2006.229.01:15:18.82;Log Opened: Mark IV Field System Version 9.7.7 2006.229.01:15:18.82;location,TSUKUB32,-140.09,36.10,61.0 2006.229.01:15:18.82;horizon1,0.,5.,360. 2006.229.01:15:18.82;antenna,32.0,180.0,180.0,10.0,710.0,5.0,88.0,azel 2006.229.01:15:18.82;equip,k42c/mk4,vlbab,vlbab,mk4,500.10,3,a/d,101,60,20,none,41,1,in,8bit,cdp,3 2006.229.01:15:18.82;drivev11,330,270,no 2006.229.01:15:18.82;drivev12,mvme117,0,11.400,2548.000,152.780,-6.655,0.014,152,10.000,54500 2006.229.01:15:18.82;drivev13,15.000,268,10.000,10.000,10.000 2006.229.01:15:18.82;drivev21,330,270,no 2006.229.01:15:18.82;drivev22,mvme117,0,11.500,2821.000,127.500,-8.640,0.015,152,14.000,54500 2006.229.01:15:18.82;drivev23,15.000,268,10.000,10.000,10.000 2006.229.01:15:18.82;head10,all,all,all,odd,adaptive,no,5.0000,1 2006.229.01:15:18.82;head11,131.5,16.4,-291.0,131.5,16.4,0.8,168.30,168.30 2006.229.01:15:18.82;head12,122.8,13.9,-150.8,122.8,14.7,2.5,167.61,167.61 2006.229.01:15:18.82;head20,all,all,all,odd,adaptive,no,5.0000,1 2006.229.01:15:18.82;head21,145.3,16.1,-209.3,137.2,16.1,58.9,165.28,165.28 2006.229.01:15:18.82;head22,157.5,17.4,-203.7,149.2,16.6,56.5,169.73,169.73 2006.229.01:15:18.82;time,-0.364,101.533,rate 2006.229.01:15:18.82;flagr,200 2006.229.01:15:18.82:" JD0608 2006 TSUKUB32 T Ts 2006.229.01:15:18.82:" T TSUKUB32 AZEL .0000 180.0 14 10.0 710.0 180.0 14 5.0 88.0 32.0 Ts 108 2006.229.01:15:18.82:" Ts TSUKUB32 -3957408.75120 3310229.34660 3737494.83600 73452301 2006.229.01:15:18.82:" 108 K4-TSUKB 0 9149 2006.229.01:15:18.82:" drudg version 050216 compiled under FS 9.7.07 2006.229.01:15:18.82:" Rack=K4-2/M4 Recorder 1=K4-2 Recorder 2=none 2006.229.01:15:18.82:exper_initi 2006.229.01:15:18.82&exper_initi/proc_library 2006.229.01:15:18.82&exper_initi/sched_initi 2006.229.01:15:18.82:scan_name=229-0200,jd0608,40 2006.229.01:15:18.82:source=4c39.25,092703.01,390220.9,2000.0,cw 2006.229.01:15:18.82#antcn#PM 1 00019 2005 228 00 22 31 00 2006.229.01:15:18.82#antcn#PM 2 90.0000 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 2006.229.01:15:18.82#antcn#PM 2 -0.0279715 0.0000000 -0.0282214 -0.0241630 -0.0014011 2006.229.01:15:18.82#antcn#PM 3 -0.0059899 0.0042895 -0.0643783 0.0000000 0.0000000 2006.229.01:15:18.82#antcn#PM 4 0.0000000 0.0000000 0.0000000 0.0000000 0.0000000 2006.229.01:15:18.82#antcn#PM 5 0.0000000 0.0000000 0.0000000 0.0000000 0.0000000 2006.229.01:15:19.14#flagr#flagr/antenna,new-source 2006.229.01:15:19.14:ready_k5 2006.229.01:15:19.14&ready_k5/obsinfo=st 2006.229.01:15:19.14&ready_k5/autoobs=1 2006.229.01:15:19.14&ready_k5/autoobs=2 2006.229.01:15:19.14&ready_k5/autoobs=3 2006.229.01:15:19.14&ready_k5/autoobs=4 2006.229.01:15:19.14&ready_k5/obsinfo 2006.229.01:15:19.14/obsinfo=st/error_log.tmp was not found (or not removed). 2006.229.01:15:22.66/autoobs//k5ts1/ autoobs started! 2006.229.01:15:26.40/autoobs//k5ts2/ autoobs started! 2006.229.01:15:29.97/autoobs//k5ts3/ autoobs started! 2006.229.01:15:33.92/autoobs//k5ts4/ autoobs started! 2006.229.01:15:33.95/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.01:15:33.95:setupk4=1 2006.229.01:15:33.95&setupk4/xlog=on 2006.229.01:15:33.95&setupk4/echo=on 2006.229.01:15:33.95&setupk4/pcalon 2006.229.01:15:33.95&setupk4/"tpicd=stop 2006.229.01:15:33.95&setupk4/"rec=synch_on 2006.229.01:15:33.95&setupk4/"rec_mode=128 2006.229.01:15:33.95&setupk4/!* 2006.229.01:15:33.95&setupk4/recpk4 2006.229.01:15:33.95&setupk4/vck44 2006.229.01:15:33.95&setupk4/ifdk4 2006.229.01:15:33.95&setupk4/!*+20s 2006.229.01:15:33.95&setupk4/"tpicd 2006.229.01:15:33.95&setupk4/echo=off 2006.229.01:15:33.95&setupk4/xlog=off 2006.229.01:15:33.95$setupk4/echo=on 2006.229.01:15:33.95$setupk4/pcalon 2006.229.01:15:33.95&pcalon/"no phase cal control is implemented here 2006.229.01:15:33.95$pcalon/"no phase cal control is implemented here 2006.229.01:15:33.95$setupk4/"tpicd=stop 2006.229.01:15:33.95$setupk4/"rec=synch_on 2006.229.01:15:33.95$setupk4/"rec_mode=128 2006.229.01:15:33.95$setupk4/!* 2006.229.01:15:33.95$setupk4/recpk4 2006.229.01:15:33.95&recpk4/recpatch= 2006.229.01:15:33.95&recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.01:15:33.95&recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.01:15:33.95$recpk4/recpatch= 2006.229.01:15:33.95$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.01:15:33.95$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.01:15:33.95$setupk4/vck44 2006.229.01:15:33.95&vck44/valo=1,524.99 2006.229.01:15:33.95&vck44/va=1,8 2006.229.01:15:33.95&vck44/valo=2,534.99 2006.229.01:15:33.95&vck44/va=2,7 2006.229.01:15:33.95&vck44/valo=3,564.99 2006.229.01:15:33.95&vck44/va=3,6 2006.229.01:15:33.95&vck44/valo=4,624.99 2006.229.01:15:33.95&vck44/va=4,7 2006.229.01:15:33.95&vck44/valo=5,734.99 2006.229.01:15:33.95&vck44/va=5,4 2006.229.01:15:33.95&vck44/valo=6,814.99 2006.229.01:15:33.95&vck44/va=6,4 2006.229.01:15:33.95&vck44/valo=7,864.99 2006.229.01:15:33.95&vck44/va=7,5 2006.229.01:15:33.95&vck44/valo=8,884.99 2006.229.01:15:33.95&vck44/va=8,6 2006.229.01:15:33.95&vck44/vblo=1,629.99 2006.229.01:15:33.95&vck44/vb=1,4 2006.229.01:15:33.95&vck44/vblo=2,634.99 2006.229.01:15:33.95&vck44/vb=2,4 2006.229.01:15:33.95&vck44/vblo=3,649.99 2006.229.01:15:33.95&vck44/vb=3,4 2006.229.01:15:33.95&vck44/vblo=4,679.99 2006.229.01:15:33.95&vck44/vb=4,4 2006.229.01:15:33.95&vck44/vblo=5,709.99 2006.229.01:15:33.95&vck44/vb=5,4 2006.229.01:15:33.95&vck44/vblo=6,719.99 2006.229.01:15:33.95&vck44/vb=6,4 2006.229.01:15:33.95&vck44/vblo=7,734.99 2006.229.01:15:33.95&vck44/vb=7,4 2006.229.01:15:33.95&vck44/vblo=8,744.99 2006.229.01:15:33.95&vck44/vb=8,4 2006.229.01:15:33.95&vck44/vabw=wide 2006.229.01:15:33.95&vck44/vbbw=wide 2006.229.01:15:33.95$vck44/valo=1,524.99 2006.229.01:15:33.95#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.01:15:33.95#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:33.95#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:33.95#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:33.95#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:33.95#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:33.95#ibcon#enter wrdev, iclass 40, count 0 2006.229.01:15:33.95#ibcon#first serial, iclass 40, count 0 2006.229.01:15:33.95#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:33.95#ibcon#flushed, iclass 40, count 0 2006.229.01:15:33.95#ibcon#about to write, iclass 40, count 0 2006.229.01:15:33.95#ibcon#wrote, iclass 40, count 0 2006.229.01:15:33.95#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:33.99#ibcon#read 3, iclass 40, count 0 2006.229.01:15:33.99#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:33.99#ibcon#read 4, iclass 40, count 0 2006.229.01:15:33.99#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:33.99#ibcon#read 5, iclass 40, count 0 2006.229.01:15:33.99#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:33.99#ibcon#read 6, iclass 40, count 0 2006.229.01:15:33.99#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:33.99#ibcon#*mode == 0, iclass 40, count 0 2006.229.01:15:33.99#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.01:15:33.99#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.01:15:33.99#ibcon#*before write, iclass 40, count 0 2006.229.01:15:33.99#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:33.99#ibcon#flushed, iclass 40, count 0 2006.229.01:15:33.99#ibcon#about to write, iclass 40, count 0 2006.229.01:15:33.99#ibcon#wrote, iclass 40, count 0 2006.229.01:15:33.99#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:34.05#ibcon#read 3, iclass 40, count 0 2006.229.01:15:34.05#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:34.05#ibcon#read 4, iclass 40, count 0 2006.229.01:15:34.05#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:34.05#ibcon#read 5, iclass 40, count 0 2006.229.01:15:34.05#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:34.05#ibcon#read 6, iclass 40, count 0 2006.229.01:15:34.05#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:34.05#ibcon#*after write, iclass 40, count 0 2006.229.01:15:34.05#ibcon#*before return 0, iclass 40, count 0 2006.229.01:15:34.05#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:34.05#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:34.05#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.01:15:34.05#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.01:15:34.05$vck44/va=1,8 2006.229.01:15:34.05#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.01:15:34.05#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.01:15:34.05#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:34.05#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:34.05#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:34.05#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:34.05#ibcon#enter wrdev, iclass 4, count 2 2006.229.01:15:34.05#ibcon#first serial, iclass 4, count 2 2006.229.01:15:34.05#ibcon#enter sib2, iclass 4, count 2 2006.229.01:15:34.05#ibcon#flushed, iclass 4, count 2 2006.229.01:15:34.05#ibcon#about to write, iclass 4, count 2 2006.229.01:15:34.05#ibcon#wrote, iclass 4, count 2 2006.229.01:15:34.05#ibcon#about to read 3, iclass 4, count 2 2006.229.01:15:34.07#ibcon#read 3, iclass 4, count 2 2006.229.01:15:34.07#ibcon#about to read 4, iclass 4, count 2 2006.229.01:15:34.07#ibcon#read 4, iclass 4, count 2 2006.229.01:15:34.07#ibcon#about to read 5, iclass 4, count 2 2006.229.01:15:34.07#ibcon#read 5, iclass 4, count 2 2006.229.01:15:34.07#ibcon#about to read 6, iclass 4, count 2 2006.229.01:15:34.07#ibcon#read 6, iclass 4, count 2 2006.229.01:15:34.07#ibcon#end of sib2, iclass 4, count 2 2006.229.01:15:34.07#ibcon#*mode == 0, iclass 4, count 2 2006.229.01:15:34.07#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.01:15:34.07#ibcon#[25=AT01-08\r\n] 2006.229.01:15:34.07#ibcon#*before write, iclass 4, count 2 2006.229.01:15:34.07#ibcon#enter sib2, iclass 4, count 2 2006.229.01:15:34.07#ibcon#flushed, iclass 4, count 2 2006.229.01:15:34.07#ibcon#about to write, iclass 4, count 2 2006.229.01:15:34.07#ibcon#wrote, iclass 4, count 2 2006.229.01:15:34.07#ibcon#about to read 3, iclass 4, count 2 2006.229.01:15:34.11#ibcon#read 3, iclass 4, count 2 2006.229.01:15:34.11#ibcon#about to read 4, iclass 4, count 2 2006.229.01:15:34.11#ibcon#read 4, iclass 4, count 2 2006.229.01:15:34.11#ibcon#about to read 5, iclass 4, count 2 2006.229.01:15:34.11#ibcon#read 5, iclass 4, count 2 2006.229.01:15:34.11#ibcon#about to read 6, iclass 4, count 2 2006.229.01:15:34.11#ibcon#read 6, iclass 4, count 2 2006.229.01:15:34.11#ibcon#end of sib2, iclass 4, count 2 2006.229.01:15:34.11#ibcon#*after write, iclass 4, count 2 2006.229.01:15:34.11#ibcon#*before return 0, iclass 4, count 2 2006.229.01:15:34.11#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:34.11#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:34.11#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.01:15:34.11#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:34.11#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:34.23#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:34.23#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:34.23#ibcon#enter wrdev, iclass 4, count 0 2006.229.01:15:34.23#ibcon#first serial, iclass 4, count 0 2006.229.01:15:34.23#ibcon#enter sib2, iclass 4, count 0 2006.229.01:15:34.23#ibcon#flushed, iclass 4, count 0 2006.229.01:15:34.23#ibcon#about to write, iclass 4, count 0 2006.229.01:15:34.23#ibcon#wrote, iclass 4, count 0 2006.229.01:15:34.23#ibcon#about to read 3, iclass 4, count 0 2006.229.01:15:34.25#ibcon#read 3, iclass 4, count 0 2006.229.01:15:34.25#ibcon#about to read 4, iclass 4, count 0 2006.229.01:15:34.25#ibcon#read 4, iclass 4, count 0 2006.229.01:15:34.25#ibcon#about to read 5, iclass 4, count 0 2006.229.01:15:34.25#ibcon#read 5, iclass 4, count 0 2006.229.01:15:34.25#ibcon#about to read 6, iclass 4, count 0 2006.229.01:15:34.25#ibcon#read 6, iclass 4, count 0 2006.229.01:15:34.25#ibcon#end of sib2, iclass 4, count 0 2006.229.01:15:34.25#ibcon#*mode == 0, iclass 4, count 0 2006.229.01:15:34.25#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.01:15:34.25#ibcon#[25=USB\r\n] 2006.229.01:15:34.25#ibcon#*before write, iclass 4, count 0 2006.229.01:15:34.25#ibcon#enter sib2, iclass 4, count 0 2006.229.01:15:34.25#ibcon#flushed, iclass 4, count 0 2006.229.01:15:34.25#ibcon#about to write, iclass 4, count 0 2006.229.01:15:34.25#ibcon#wrote, iclass 4, count 0 2006.229.01:15:34.25#ibcon#about to read 3, iclass 4, count 0 2006.229.01:15:34.28#ibcon#read 3, iclass 4, count 0 2006.229.01:15:34.28#ibcon#about to read 4, iclass 4, count 0 2006.229.01:15:34.28#ibcon#read 4, iclass 4, count 0 2006.229.01:15:34.28#ibcon#about to read 5, iclass 4, count 0 2006.229.01:15:34.28#ibcon#read 5, iclass 4, count 0 2006.229.01:15:34.28#ibcon#about to read 6, iclass 4, count 0 2006.229.01:15:34.28#ibcon#read 6, iclass 4, count 0 2006.229.01:15:34.28#ibcon#end of sib2, iclass 4, count 0 2006.229.01:15:34.28#ibcon#*after write, iclass 4, count 0 2006.229.01:15:34.28#ibcon#*before return 0, iclass 4, count 0 2006.229.01:15:34.28#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:34.28#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:34.28#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.01:15:34.28#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.01:15:34.28$vck44/valo=2,534.99 2006.229.01:15:34.28#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.01:15:34.28#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:34.28#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:34.28#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:34.28#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:34.28#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:34.28#ibcon#enter wrdev, iclass 6, count 0 2006.229.01:15:34.28#ibcon#first serial, iclass 6, count 0 2006.229.01:15:34.28#ibcon#enter sib2, iclass 6, count 0 2006.229.01:15:34.28#ibcon#flushed, iclass 6, count 0 2006.229.01:15:34.28#ibcon#about to write, iclass 6, count 0 2006.229.01:15:34.28#ibcon#wrote, iclass 6, count 0 2006.229.01:15:34.28#ibcon#about to read 3, iclass 6, count 0 2006.229.01:15:34.30#ibcon#read 3, iclass 6, count 0 2006.229.01:15:34.30#ibcon#about to read 4, iclass 6, count 0 2006.229.01:15:34.30#ibcon#read 4, iclass 6, count 0 2006.229.01:15:34.30#ibcon#about to read 5, iclass 6, count 0 2006.229.01:15:34.30#ibcon#read 5, iclass 6, count 0 2006.229.01:15:34.30#ibcon#about to read 6, iclass 6, count 0 2006.229.01:15:34.30#ibcon#read 6, iclass 6, count 0 2006.229.01:15:34.30#ibcon#end of sib2, iclass 6, count 0 2006.229.01:15:34.30#ibcon#*mode == 0, iclass 6, count 0 2006.229.01:15:34.30#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.01:15:34.30#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.01:15:34.30#ibcon#*before write, iclass 6, count 0 2006.229.01:15:34.30#ibcon#enter sib2, iclass 6, count 0 2006.229.01:15:34.30#ibcon#flushed, iclass 6, count 0 2006.229.01:15:34.30#ibcon#about to write, iclass 6, count 0 2006.229.01:15:34.30#ibcon#wrote, iclass 6, count 0 2006.229.01:15:34.30#ibcon#about to read 3, iclass 6, count 0 2006.229.01:15:34.34#ibcon#read 3, iclass 6, count 0 2006.229.01:15:34.34#ibcon#about to read 4, iclass 6, count 0 2006.229.01:15:34.34#ibcon#read 4, iclass 6, count 0 2006.229.01:15:34.34#ibcon#about to read 5, iclass 6, count 0 2006.229.01:15:34.34#ibcon#read 5, iclass 6, count 0 2006.229.01:15:34.34#ibcon#about to read 6, iclass 6, count 0 2006.229.01:15:34.34#ibcon#read 6, iclass 6, count 0 2006.229.01:15:34.34#ibcon#end of sib2, iclass 6, count 0 2006.229.01:15:34.34#ibcon#*after write, iclass 6, count 0 2006.229.01:15:34.34#ibcon#*before return 0, iclass 6, count 0 2006.229.01:15:34.34#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:34.34#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:34.34#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.01:15:34.34#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.01:15:34.34$vck44/va=2,7 2006.229.01:15:34.34#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.01:15:34.34#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.01:15:34.34#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:34.34#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.01:15:34.36#abcon#<5=/04 2.2 4.0 29.66 941001.5\r\n> 2006.229.01:15:34.38#abcon#{5=INTERFACE CLEAR} 2006.229.01:15:34.40#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.01:15:34.40#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.01:15:34.40#ibcon#enter wrdev, iclass 11, count 2 2006.229.01:15:34.40#ibcon#first serial, iclass 11, count 2 2006.229.01:15:34.40#ibcon#enter sib2, iclass 11, count 2 2006.229.01:15:34.40#ibcon#flushed, iclass 11, count 2 2006.229.01:15:34.40#ibcon#about to write, iclass 11, count 2 2006.229.01:15:34.40#ibcon#wrote, iclass 11, count 2 2006.229.01:15:34.40#ibcon#about to read 3, iclass 11, count 2 2006.229.01:15:34.42#ibcon#read 3, iclass 11, count 2 2006.229.01:15:34.42#ibcon#about to read 4, iclass 11, count 2 2006.229.01:15:34.42#ibcon#read 4, iclass 11, count 2 2006.229.01:15:34.42#ibcon#about to read 5, iclass 11, count 2 2006.229.01:15:34.42#ibcon#read 5, iclass 11, count 2 2006.229.01:15:34.42#ibcon#about to read 6, iclass 11, count 2 2006.229.01:15:34.42#ibcon#read 6, iclass 11, count 2 2006.229.01:15:34.42#ibcon#end of sib2, iclass 11, count 2 2006.229.01:15:34.42#ibcon#*mode == 0, iclass 11, count 2 2006.229.01:15:34.42#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.01:15:34.42#ibcon#[25=AT02-07\r\n] 2006.229.01:15:34.42#ibcon#*before write, iclass 11, count 2 2006.229.01:15:34.42#ibcon#enter sib2, iclass 11, count 2 2006.229.01:15:34.42#ibcon#flushed, iclass 11, count 2 2006.229.01:15:34.42#ibcon#about to write, iclass 11, count 2 2006.229.01:15:34.42#ibcon#wrote, iclass 11, count 2 2006.229.01:15:34.42#ibcon#about to read 3, iclass 11, count 2 2006.229.01:15:34.44#abcon#[5=S1D000X0/0*\r\n] 2006.229.01:15:34.45#ibcon#read 3, iclass 11, count 2 2006.229.01:15:34.45#ibcon#about to read 4, iclass 11, count 2 2006.229.01:15:34.45#ibcon#read 4, iclass 11, count 2 2006.229.01:15:34.45#ibcon#about to read 5, iclass 11, count 2 2006.229.01:15:34.45#ibcon#read 5, iclass 11, count 2 2006.229.01:15:34.45#ibcon#about to read 6, iclass 11, count 2 2006.229.01:15:34.45#ibcon#read 6, iclass 11, count 2 2006.229.01:15:34.45#ibcon#end of sib2, iclass 11, count 2 2006.229.01:15:34.45#ibcon#*after write, iclass 11, count 2 2006.229.01:15:34.45#ibcon#*before return 0, iclass 11, count 2 2006.229.01:15:34.45#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.01:15:34.45#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.01:15:34.45#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.01:15:34.45#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:34.45#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.01:15:34.57#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.01:15:34.57#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.01:15:34.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.01:15:34.57#ibcon#first serial, iclass 11, count 0 2006.229.01:15:34.57#ibcon#enter sib2, iclass 11, count 0 2006.229.01:15:34.57#ibcon#flushed, iclass 11, count 0 2006.229.01:15:34.57#ibcon#about to write, iclass 11, count 0 2006.229.01:15:34.57#ibcon#wrote, iclass 11, count 0 2006.229.01:15:34.57#ibcon#about to read 3, iclass 11, count 0 2006.229.01:15:34.59#ibcon#read 3, iclass 11, count 0 2006.229.01:15:34.59#ibcon#about to read 4, iclass 11, count 0 2006.229.01:15:34.59#ibcon#read 4, iclass 11, count 0 2006.229.01:15:34.59#ibcon#about to read 5, iclass 11, count 0 2006.229.01:15:34.59#ibcon#read 5, iclass 11, count 0 2006.229.01:15:34.59#ibcon#about to read 6, iclass 11, count 0 2006.229.01:15:34.59#ibcon#read 6, iclass 11, count 0 2006.229.01:15:34.59#ibcon#end of sib2, iclass 11, count 0 2006.229.01:15:34.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.01:15:34.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.01:15:34.59#ibcon#[25=USB\r\n] 2006.229.01:15:34.59#ibcon#*before write, iclass 11, count 0 2006.229.01:15:34.59#ibcon#enter sib2, iclass 11, count 0 2006.229.01:15:34.59#ibcon#flushed, iclass 11, count 0 2006.229.01:15:34.59#ibcon#about to write, iclass 11, count 0 2006.229.01:15:34.59#ibcon#wrote, iclass 11, count 0 2006.229.01:15:34.59#ibcon#about to read 3, iclass 11, count 0 2006.229.01:15:34.62#ibcon#read 3, iclass 11, count 0 2006.229.01:15:34.62#ibcon#about to read 4, iclass 11, count 0 2006.229.01:15:34.62#ibcon#read 4, iclass 11, count 0 2006.229.01:15:34.62#ibcon#about to read 5, iclass 11, count 0 2006.229.01:15:34.62#ibcon#read 5, iclass 11, count 0 2006.229.01:15:34.62#ibcon#about to read 6, iclass 11, count 0 2006.229.01:15:34.62#ibcon#read 6, iclass 11, count 0 2006.229.01:15:34.62#ibcon#end of sib2, iclass 11, count 0 2006.229.01:15:34.62#ibcon#*after write, iclass 11, count 0 2006.229.01:15:34.62#ibcon#*before return 0, iclass 11, count 0 2006.229.01:15:34.62#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.01:15:34.62#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.01:15:34.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.01:15:34.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.01:15:34.62$vck44/valo=3,564.99 2006.229.01:15:34.62#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.01:15:34.62#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:34.62#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:34.62#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:34.62#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:34.62#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:34.62#ibcon#enter wrdev, iclass 16, count 0 2006.229.01:15:34.62#ibcon#first serial, iclass 16, count 0 2006.229.01:15:34.62#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:34.62#ibcon#flushed, iclass 16, count 0 2006.229.01:15:34.62#ibcon#about to write, iclass 16, count 0 2006.229.01:15:34.62#ibcon#wrote, iclass 16, count 0 2006.229.01:15:34.62#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:34.64#ibcon#read 3, iclass 16, count 0 2006.229.01:15:34.64#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:34.64#ibcon#read 4, iclass 16, count 0 2006.229.01:15:34.64#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:34.64#ibcon#read 5, iclass 16, count 0 2006.229.01:15:34.64#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:34.64#ibcon#read 6, iclass 16, count 0 2006.229.01:15:34.64#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:34.64#ibcon#*mode == 0, iclass 16, count 0 2006.229.01:15:34.64#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.01:15:34.64#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.01:15:34.64#ibcon#*before write, iclass 16, count 0 2006.229.01:15:34.64#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:34.64#ibcon#flushed, iclass 16, count 0 2006.229.01:15:34.64#ibcon#about to write, iclass 16, count 0 2006.229.01:15:34.64#ibcon#wrote, iclass 16, count 0 2006.229.01:15:34.64#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:34.68#ibcon#read 3, iclass 16, count 0 2006.229.01:15:34.68#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:34.68#ibcon#read 4, iclass 16, count 0 2006.229.01:15:34.68#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:34.68#ibcon#read 5, iclass 16, count 0 2006.229.01:15:34.68#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:34.68#ibcon#read 6, iclass 16, count 0 2006.229.01:15:34.68#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:34.68#ibcon#*after write, iclass 16, count 0 2006.229.01:15:34.68#ibcon#*before return 0, iclass 16, count 0 2006.229.01:15:34.68#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:34.68#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:34.68#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.01:15:34.68#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.01:15:34.68$vck44/va=3,6 2006.229.01:15:34.68#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.01:15:34.68#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.01:15:34.68#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:34.68#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:34.74#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:34.74#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:34.74#ibcon#enter wrdev, iclass 18, count 2 2006.229.01:15:34.74#ibcon#first serial, iclass 18, count 2 2006.229.01:15:34.74#ibcon#enter sib2, iclass 18, count 2 2006.229.01:15:34.74#ibcon#flushed, iclass 18, count 2 2006.229.01:15:34.74#ibcon#about to write, iclass 18, count 2 2006.229.01:15:34.74#ibcon#wrote, iclass 18, count 2 2006.229.01:15:34.74#ibcon#about to read 3, iclass 18, count 2 2006.229.01:15:34.76#ibcon#read 3, iclass 18, count 2 2006.229.01:15:34.76#ibcon#about to read 4, iclass 18, count 2 2006.229.01:15:34.76#ibcon#read 4, iclass 18, count 2 2006.229.01:15:34.76#ibcon#about to read 5, iclass 18, count 2 2006.229.01:15:34.76#ibcon#read 5, iclass 18, count 2 2006.229.01:15:34.76#ibcon#about to read 6, iclass 18, count 2 2006.229.01:15:34.76#ibcon#read 6, iclass 18, count 2 2006.229.01:15:34.76#ibcon#end of sib2, iclass 18, count 2 2006.229.01:15:34.76#ibcon#*mode == 0, iclass 18, count 2 2006.229.01:15:34.76#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.01:15:34.76#ibcon#[25=AT03-06\r\n] 2006.229.01:15:34.76#ibcon#*before write, iclass 18, count 2 2006.229.01:15:34.76#ibcon#enter sib2, iclass 18, count 2 2006.229.01:15:34.76#ibcon#flushed, iclass 18, count 2 2006.229.01:15:34.76#ibcon#about to write, iclass 18, count 2 2006.229.01:15:34.76#ibcon#wrote, iclass 18, count 2 2006.229.01:15:34.76#ibcon#about to read 3, iclass 18, count 2 2006.229.01:15:34.79#ibcon#read 3, iclass 18, count 2 2006.229.01:15:34.79#ibcon#about to read 4, iclass 18, count 2 2006.229.01:15:34.79#ibcon#read 4, iclass 18, count 2 2006.229.01:15:34.79#ibcon#about to read 5, iclass 18, count 2 2006.229.01:15:34.79#ibcon#read 5, iclass 18, count 2 2006.229.01:15:34.79#ibcon#about to read 6, iclass 18, count 2 2006.229.01:15:34.79#ibcon#read 6, iclass 18, count 2 2006.229.01:15:34.79#ibcon#end of sib2, iclass 18, count 2 2006.229.01:15:34.79#ibcon#*after write, iclass 18, count 2 2006.229.01:15:34.79#ibcon#*before return 0, iclass 18, count 2 2006.229.01:15:34.79#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:34.79#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:34.79#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.01:15:34.79#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:34.79#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:34.91#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:34.91#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:34.91#ibcon#enter wrdev, iclass 18, count 0 2006.229.01:15:34.91#ibcon#first serial, iclass 18, count 0 2006.229.01:15:34.91#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:34.91#ibcon#flushed, iclass 18, count 0 2006.229.01:15:34.91#ibcon#about to write, iclass 18, count 0 2006.229.01:15:34.91#ibcon#wrote, iclass 18, count 0 2006.229.01:15:34.91#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:34.93#ibcon#read 3, iclass 18, count 0 2006.229.01:15:34.93#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:34.93#ibcon#read 4, iclass 18, count 0 2006.229.01:15:34.93#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:34.93#ibcon#read 5, iclass 18, count 0 2006.229.01:15:34.93#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:34.93#ibcon#read 6, iclass 18, count 0 2006.229.01:15:34.93#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:34.93#ibcon#*mode == 0, iclass 18, count 0 2006.229.01:15:34.93#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.01:15:34.93#ibcon#[25=USB\r\n] 2006.229.01:15:34.93#ibcon#*before write, iclass 18, count 0 2006.229.01:15:34.93#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:34.93#ibcon#flushed, iclass 18, count 0 2006.229.01:15:34.93#ibcon#about to write, iclass 18, count 0 2006.229.01:15:34.93#ibcon#wrote, iclass 18, count 0 2006.229.01:15:34.93#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:34.96#ibcon#read 3, iclass 18, count 0 2006.229.01:15:34.96#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:34.96#ibcon#read 4, iclass 18, count 0 2006.229.01:15:34.96#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:34.96#ibcon#read 5, iclass 18, count 0 2006.229.01:15:34.96#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:34.96#ibcon#read 6, iclass 18, count 0 2006.229.01:15:34.96#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:34.96#ibcon#*after write, iclass 18, count 0 2006.229.01:15:34.96#ibcon#*before return 0, iclass 18, count 0 2006.229.01:15:34.96#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:34.96#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:34.96#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.01:15:34.96#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.01:15:34.96$vck44/valo=4,624.99 2006.229.01:15:34.96#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.01:15:34.96#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:34.96#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:34.96#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:34.96#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:34.96#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:34.96#ibcon#enter wrdev, iclass 20, count 0 2006.229.01:15:34.96#ibcon#first serial, iclass 20, count 0 2006.229.01:15:34.96#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:34.96#ibcon#flushed, iclass 20, count 0 2006.229.01:15:34.96#ibcon#about to write, iclass 20, count 0 2006.229.01:15:34.96#ibcon#wrote, iclass 20, count 0 2006.229.01:15:34.96#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:34.98#ibcon#read 3, iclass 20, count 0 2006.229.01:15:34.98#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:34.98#ibcon#read 4, iclass 20, count 0 2006.229.01:15:34.98#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:34.98#ibcon#read 5, iclass 20, count 0 2006.229.01:15:34.98#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:34.98#ibcon#read 6, iclass 20, count 0 2006.229.01:15:34.98#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:34.98#ibcon#*mode == 0, iclass 20, count 0 2006.229.01:15:34.98#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.01:15:34.98#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.01:15:34.98#ibcon#*before write, iclass 20, count 0 2006.229.01:15:34.98#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:34.98#ibcon#flushed, iclass 20, count 0 2006.229.01:15:34.98#ibcon#about to write, iclass 20, count 0 2006.229.01:15:34.98#ibcon#wrote, iclass 20, count 0 2006.229.01:15:34.98#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:35.02#ibcon#read 3, iclass 20, count 0 2006.229.01:15:35.02#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:35.02#ibcon#read 4, iclass 20, count 0 2006.229.01:15:35.02#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:35.02#ibcon#read 5, iclass 20, count 0 2006.229.01:15:35.02#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:35.02#ibcon#read 6, iclass 20, count 0 2006.229.01:15:35.02#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:35.02#ibcon#*after write, iclass 20, count 0 2006.229.01:15:35.02#ibcon#*before return 0, iclass 20, count 0 2006.229.01:15:35.02#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:35.02#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:35.02#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.01:15:35.02#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.01:15:35.02$vck44/va=4,7 2006.229.01:15:35.02#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.01:15:35.02#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.01:15:35.02#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:35.02#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:35.08#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:35.08#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:35.08#ibcon#enter wrdev, iclass 22, count 2 2006.229.01:15:35.08#ibcon#first serial, iclass 22, count 2 2006.229.01:15:35.08#ibcon#enter sib2, iclass 22, count 2 2006.229.01:15:35.08#ibcon#flushed, iclass 22, count 2 2006.229.01:15:35.08#ibcon#about to write, iclass 22, count 2 2006.229.01:15:35.08#ibcon#wrote, iclass 22, count 2 2006.229.01:15:35.08#ibcon#about to read 3, iclass 22, count 2 2006.229.01:15:35.10#ibcon#read 3, iclass 22, count 2 2006.229.01:15:35.10#ibcon#about to read 4, iclass 22, count 2 2006.229.01:15:35.10#ibcon#read 4, iclass 22, count 2 2006.229.01:15:35.10#ibcon#about to read 5, iclass 22, count 2 2006.229.01:15:35.10#ibcon#read 5, iclass 22, count 2 2006.229.01:15:35.10#ibcon#about to read 6, iclass 22, count 2 2006.229.01:15:35.10#ibcon#read 6, iclass 22, count 2 2006.229.01:15:35.10#ibcon#end of sib2, iclass 22, count 2 2006.229.01:15:35.10#ibcon#*mode == 0, iclass 22, count 2 2006.229.01:15:35.10#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.01:15:35.10#ibcon#[25=AT04-07\r\n] 2006.229.01:15:35.10#ibcon#*before write, iclass 22, count 2 2006.229.01:15:35.10#ibcon#enter sib2, iclass 22, count 2 2006.229.01:15:35.10#ibcon#flushed, iclass 22, count 2 2006.229.01:15:35.10#ibcon#about to write, iclass 22, count 2 2006.229.01:15:35.10#ibcon#wrote, iclass 22, count 2 2006.229.01:15:35.10#ibcon#about to read 3, iclass 22, count 2 2006.229.01:15:35.13#ibcon#read 3, iclass 22, count 2 2006.229.01:15:35.13#ibcon#about to read 4, iclass 22, count 2 2006.229.01:15:35.13#ibcon#read 4, iclass 22, count 2 2006.229.01:15:35.13#ibcon#about to read 5, iclass 22, count 2 2006.229.01:15:35.13#ibcon#read 5, iclass 22, count 2 2006.229.01:15:35.13#ibcon#about to read 6, iclass 22, count 2 2006.229.01:15:35.13#ibcon#read 6, iclass 22, count 2 2006.229.01:15:35.13#ibcon#end of sib2, iclass 22, count 2 2006.229.01:15:35.13#ibcon#*after write, iclass 22, count 2 2006.229.01:15:35.13#ibcon#*before return 0, iclass 22, count 2 2006.229.01:15:35.13#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:35.13#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:35.13#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.01:15:35.13#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:35.13#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:35.25#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:35.25#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:35.25#ibcon#enter wrdev, iclass 22, count 0 2006.229.01:15:35.25#ibcon#first serial, iclass 22, count 0 2006.229.01:15:35.25#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:35.25#ibcon#flushed, iclass 22, count 0 2006.229.01:15:35.25#ibcon#about to write, iclass 22, count 0 2006.229.01:15:35.25#ibcon#wrote, iclass 22, count 0 2006.229.01:15:35.25#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:35.27#ibcon#read 3, iclass 22, count 0 2006.229.01:15:35.27#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:35.27#ibcon#read 4, iclass 22, count 0 2006.229.01:15:35.27#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:35.27#ibcon#read 5, iclass 22, count 0 2006.229.01:15:35.27#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:35.27#ibcon#read 6, iclass 22, count 0 2006.229.01:15:35.27#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:35.27#ibcon#*mode == 0, iclass 22, count 0 2006.229.01:15:35.27#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.01:15:35.27#ibcon#[25=USB\r\n] 2006.229.01:15:35.27#ibcon#*before write, iclass 22, count 0 2006.229.01:15:35.27#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:35.27#ibcon#flushed, iclass 22, count 0 2006.229.01:15:35.27#ibcon#about to write, iclass 22, count 0 2006.229.01:15:35.27#ibcon#wrote, iclass 22, count 0 2006.229.01:15:35.27#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:35.30#ibcon#read 3, iclass 22, count 0 2006.229.01:15:35.30#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:35.30#ibcon#read 4, iclass 22, count 0 2006.229.01:15:35.30#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:35.30#ibcon#read 5, iclass 22, count 0 2006.229.01:15:35.30#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:35.30#ibcon#read 6, iclass 22, count 0 2006.229.01:15:35.30#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:35.30#ibcon#*after write, iclass 22, count 0 2006.229.01:15:35.30#ibcon#*before return 0, iclass 22, count 0 2006.229.01:15:35.30#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:35.30#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:35.30#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.01:15:35.30#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.01:15:35.30$vck44/valo=5,734.99 2006.229.01:15:35.30#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.01:15:35.30#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:35.30#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:35.30#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:35.30#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:35.30#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:35.30#ibcon#enter wrdev, iclass 24, count 0 2006.229.01:15:35.30#ibcon#first serial, iclass 24, count 0 2006.229.01:15:35.30#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:35.30#ibcon#flushed, iclass 24, count 0 2006.229.01:15:35.30#ibcon#about to write, iclass 24, count 0 2006.229.01:15:35.30#ibcon#wrote, iclass 24, count 0 2006.229.01:15:35.30#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:35.32#ibcon#read 3, iclass 24, count 0 2006.229.01:15:35.32#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:35.32#ibcon#read 4, iclass 24, count 0 2006.229.01:15:35.32#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:35.32#ibcon#read 5, iclass 24, count 0 2006.229.01:15:35.32#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:35.32#ibcon#read 6, iclass 24, count 0 2006.229.01:15:35.32#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:35.32#ibcon#*mode == 0, iclass 24, count 0 2006.229.01:15:35.32#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.01:15:35.32#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.01:15:35.32#ibcon#*before write, iclass 24, count 0 2006.229.01:15:35.32#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:35.32#ibcon#flushed, iclass 24, count 0 2006.229.01:15:35.32#ibcon#about to write, iclass 24, count 0 2006.229.01:15:35.32#ibcon#wrote, iclass 24, count 0 2006.229.01:15:35.32#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:35.36#ibcon#read 3, iclass 24, count 0 2006.229.01:15:35.36#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:35.36#ibcon#read 4, iclass 24, count 0 2006.229.01:15:35.36#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:35.36#ibcon#read 5, iclass 24, count 0 2006.229.01:15:35.36#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:35.36#ibcon#read 6, iclass 24, count 0 2006.229.01:15:35.36#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:35.36#ibcon#*after write, iclass 24, count 0 2006.229.01:15:35.36#ibcon#*before return 0, iclass 24, count 0 2006.229.01:15:35.36#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:35.36#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:35.36#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.01:15:35.36#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.01:15:35.36$vck44/va=5,4 2006.229.01:15:35.36#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.01:15:35.36#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.01:15:35.36#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:35.36#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:35.42#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:35.42#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:35.42#ibcon#enter wrdev, iclass 26, count 2 2006.229.01:15:35.42#ibcon#first serial, iclass 26, count 2 2006.229.01:15:35.42#ibcon#enter sib2, iclass 26, count 2 2006.229.01:15:35.42#ibcon#flushed, iclass 26, count 2 2006.229.01:15:35.42#ibcon#about to write, iclass 26, count 2 2006.229.01:15:35.42#ibcon#wrote, iclass 26, count 2 2006.229.01:15:35.42#ibcon#about to read 3, iclass 26, count 2 2006.229.01:15:35.44#ibcon#read 3, iclass 26, count 2 2006.229.01:15:35.44#ibcon#about to read 4, iclass 26, count 2 2006.229.01:15:35.44#ibcon#read 4, iclass 26, count 2 2006.229.01:15:35.44#ibcon#about to read 5, iclass 26, count 2 2006.229.01:15:35.44#ibcon#read 5, iclass 26, count 2 2006.229.01:15:35.44#ibcon#about to read 6, iclass 26, count 2 2006.229.01:15:35.44#ibcon#read 6, iclass 26, count 2 2006.229.01:15:35.44#ibcon#end of sib2, iclass 26, count 2 2006.229.01:15:35.44#ibcon#*mode == 0, iclass 26, count 2 2006.229.01:15:35.44#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.01:15:35.44#ibcon#[25=AT05-04\r\n] 2006.229.01:15:35.44#ibcon#*before write, iclass 26, count 2 2006.229.01:15:35.44#ibcon#enter sib2, iclass 26, count 2 2006.229.01:15:35.44#ibcon#flushed, iclass 26, count 2 2006.229.01:15:35.44#ibcon#about to write, iclass 26, count 2 2006.229.01:15:35.44#ibcon#wrote, iclass 26, count 2 2006.229.01:15:35.44#ibcon#about to read 3, iclass 26, count 2 2006.229.01:15:35.47#ibcon#read 3, iclass 26, count 2 2006.229.01:15:35.47#ibcon#about to read 4, iclass 26, count 2 2006.229.01:15:35.47#ibcon#read 4, iclass 26, count 2 2006.229.01:15:35.47#ibcon#about to read 5, iclass 26, count 2 2006.229.01:15:35.47#ibcon#read 5, iclass 26, count 2 2006.229.01:15:35.47#ibcon#about to read 6, iclass 26, count 2 2006.229.01:15:35.47#ibcon#read 6, iclass 26, count 2 2006.229.01:15:35.47#ibcon#end of sib2, iclass 26, count 2 2006.229.01:15:35.47#ibcon#*after write, iclass 26, count 2 2006.229.01:15:35.47#ibcon#*before return 0, iclass 26, count 2 2006.229.01:15:35.47#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:35.47#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:35.47#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.01:15:35.47#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:35.47#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:35.59#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:35.59#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:35.59#ibcon#enter wrdev, iclass 26, count 0 2006.229.01:15:35.59#ibcon#first serial, iclass 26, count 0 2006.229.01:15:35.59#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:35.59#ibcon#flushed, iclass 26, count 0 2006.229.01:15:35.59#ibcon#about to write, iclass 26, count 0 2006.229.01:15:35.59#ibcon#wrote, iclass 26, count 0 2006.229.01:15:35.59#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:35.61#ibcon#read 3, iclass 26, count 0 2006.229.01:15:35.61#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:35.61#ibcon#read 4, iclass 26, count 0 2006.229.01:15:35.61#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:35.61#ibcon#read 5, iclass 26, count 0 2006.229.01:15:35.61#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:35.61#ibcon#read 6, iclass 26, count 0 2006.229.01:15:35.61#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:35.61#ibcon#*mode == 0, iclass 26, count 0 2006.229.01:15:35.61#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.01:15:35.61#ibcon#[25=USB\r\n] 2006.229.01:15:35.61#ibcon#*before write, iclass 26, count 0 2006.229.01:15:35.61#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:35.61#ibcon#flushed, iclass 26, count 0 2006.229.01:15:35.61#ibcon#about to write, iclass 26, count 0 2006.229.01:15:35.61#ibcon#wrote, iclass 26, count 0 2006.229.01:15:35.61#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:35.64#ibcon#read 3, iclass 26, count 0 2006.229.01:15:35.64#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:35.64#ibcon#read 4, iclass 26, count 0 2006.229.01:15:35.64#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:35.64#ibcon#read 5, iclass 26, count 0 2006.229.01:15:35.64#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:35.64#ibcon#read 6, iclass 26, count 0 2006.229.01:15:35.64#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:35.64#ibcon#*after write, iclass 26, count 0 2006.229.01:15:35.64#ibcon#*before return 0, iclass 26, count 0 2006.229.01:15:35.64#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:35.64#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:35.64#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.01:15:35.64#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.01:15:35.64$vck44/valo=6,814.99 2006.229.01:15:35.64#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.01:15:35.64#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:35.64#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:35.64#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:35.64#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:35.64#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:35.64#ibcon#enter wrdev, iclass 28, count 0 2006.229.01:15:35.64#ibcon#first serial, iclass 28, count 0 2006.229.01:15:35.64#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:35.64#ibcon#flushed, iclass 28, count 0 2006.229.01:15:35.64#ibcon#about to write, iclass 28, count 0 2006.229.01:15:35.64#ibcon#wrote, iclass 28, count 0 2006.229.01:15:35.64#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:35.66#ibcon#read 3, iclass 28, count 0 2006.229.01:15:35.66#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:35.66#ibcon#read 4, iclass 28, count 0 2006.229.01:15:35.66#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:35.66#ibcon#read 5, iclass 28, count 0 2006.229.01:15:35.66#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:35.66#ibcon#read 6, iclass 28, count 0 2006.229.01:15:35.66#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:35.66#ibcon#*mode == 0, iclass 28, count 0 2006.229.01:15:35.66#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.01:15:35.66#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.01:15:35.66#ibcon#*before write, iclass 28, count 0 2006.229.01:15:35.66#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:35.66#ibcon#flushed, iclass 28, count 0 2006.229.01:15:35.66#ibcon#about to write, iclass 28, count 0 2006.229.01:15:35.66#ibcon#wrote, iclass 28, count 0 2006.229.01:15:35.66#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:35.70#ibcon#read 3, iclass 28, count 0 2006.229.01:15:35.70#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:35.70#ibcon#read 4, iclass 28, count 0 2006.229.01:15:35.70#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:35.70#ibcon#read 5, iclass 28, count 0 2006.229.01:15:35.70#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:35.70#ibcon#read 6, iclass 28, count 0 2006.229.01:15:35.70#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:35.70#ibcon#*after write, iclass 28, count 0 2006.229.01:15:35.70#ibcon#*before return 0, iclass 28, count 0 2006.229.01:15:35.70#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:35.70#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:35.70#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.01:15:35.70#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.01:15:35.70$vck44/va=6,4 2006.229.01:15:35.70#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.01:15:35.70#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.01:15:35.70#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:35.70#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:35.76#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:35.76#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:35.76#ibcon#enter wrdev, iclass 30, count 2 2006.229.01:15:35.76#ibcon#first serial, iclass 30, count 2 2006.229.01:15:35.76#ibcon#enter sib2, iclass 30, count 2 2006.229.01:15:35.76#ibcon#flushed, iclass 30, count 2 2006.229.01:15:35.76#ibcon#about to write, iclass 30, count 2 2006.229.01:15:35.76#ibcon#wrote, iclass 30, count 2 2006.229.01:15:35.76#ibcon#about to read 3, iclass 30, count 2 2006.229.01:15:35.78#ibcon#read 3, iclass 30, count 2 2006.229.01:15:35.78#ibcon#about to read 4, iclass 30, count 2 2006.229.01:15:35.78#ibcon#read 4, iclass 30, count 2 2006.229.01:15:35.78#ibcon#about to read 5, iclass 30, count 2 2006.229.01:15:35.78#ibcon#read 5, iclass 30, count 2 2006.229.01:15:35.78#ibcon#about to read 6, iclass 30, count 2 2006.229.01:15:35.78#ibcon#read 6, iclass 30, count 2 2006.229.01:15:35.78#ibcon#end of sib2, iclass 30, count 2 2006.229.01:15:35.78#ibcon#*mode == 0, iclass 30, count 2 2006.229.01:15:35.78#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.01:15:35.78#ibcon#[25=AT06-04\r\n] 2006.229.01:15:35.78#ibcon#*before write, iclass 30, count 2 2006.229.01:15:35.78#ibcon#enter sib2, iclass 30, count 2 2006.229.01:15:35.78#ibcon#flushed, iclass 30, count 2 2006.229.01:15:35.78#ibcon#about to write, iclass 30, count 2 2006.229.01:15:35.78#ibcon#wrote, iclass 30, count 2 2006.229.01:15:35.78#ibcon#about to read 3, iclass 30, count 2 2006.229.01:15:35.81#ibcon#read 3, iclass 30, count 2 2006.229.01:15:35.81#ibcon#about to read 4, iclass 30, count 2 2006.229.01:15:35.81#ibcon#read 4, iclass 30, count 2 2006.229.01:15:35.81#ibcon#about to read 5, iclass 30, count 2 2006.229.01:15:35.81#ibcon#read 5, iclass 30, count 2 2006.229.01:15:35.81#ibcon#about to read 6, iclass 30, count 2 2006.229.01:15:35.81#ibcon#read 6, iclass 30, count 2 2006.229.01:15:35.81#ibcon#end of sib2, iclass 30, count 2 2006.229.01:15:35.81#ibcon#*after write, iclass 30, count 2 2006.229.01:15:35.81#ibcon#*before return 0, iclass 30, count 2 2006.229.01:15:35.81#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:35.81#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:35.81#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.01:15:35.81#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:35.81#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:35.93#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:35.93#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:35.93#ibcon#enter wrdev, iclass 30, count 0 2006.229.01:15:35.93#ibcon#first serial, iclass 30, count 0 2006.229.01:15:35.93#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:35.93#ibcon#flushed, iclass 30, count 0 2006.229.01:15:35.93#ibcon#about to write, iclass 30, count 0 2006.229.01:15:35.93#ibcon#wrote, iclass 30, count 0 2006.229.01:15:35.93#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:35.95#ibcon#read 3, iclass 30, count 0 2006.229.01:15:35.95#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:35.95#ibcon#read 4, iclass 30, count 0 2006.229.01:15:35.95#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:35.95#ibcon#read 5, iclass 30, count 0 2006.229.01:15:35.95#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:35.95#ibcon#read 6, iclass 30, count 0 2006.229.01:15:35.95#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:35.95#ibcon#*mode == 0, iclass 30, count 0 2006.229.01:15:35.95#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.01:15:35.95#ibcon#[25=USB\r\n] 2006.229.01:15:35.95#ibcon#*before write, iclass 30, count 0 2006.229.01:15:35.95#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:35.95#ibcon#flushed, iclass 30, count 0 2006.229.01:15:35.95#ibcon#about to write, iclass 30, count 0 2006.229.01:15:35.95#ibcon#wrote, iclass 30, count 0 2006.229.01:15:35.95#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:35.98#ibcon#read 3, iclass 30, count 0 2006.229.01:15:35.98#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:35.98#ibcon#read 4, iclass 30, count 0 2006.229.01:15:35.98#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:35.98#ibcon#read 5, iclass 30, count 0 2006.229.01:15:35.98#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:35.98#ibcon#read 6, iclass 30, count 0 2006.229.01:15:35.98#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:35.98#ibcon#*after write, iclass 30, count 0 2006.229.01:15:35.98#ibcon#*before return 0, iclass 30, count 0 2006.229.01:15:35.98#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:35.98#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:35.98#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.01:15:35.98#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.01:15:35.98$vck44/valo=7,864.99 2006.229.01:15:35.98#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.01:15:35.98#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:35.98#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:35.98#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:35.98#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:35.98#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:35.98#ibcon#enter wrdev, iclass 32, count 0 2006.229.01:15:35.98#ibcon#first serial, iclass 32, count 0 2006.229.01:15:35.98#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:35.98#ibcon#flushed, iclass 32, count 0 2006.229.01:15:35.98#ibcon#about to write, iclass 32, count 0 2006.229.01:15:35.98#ibcon#wrote, iclass 32, count 0 2006.229.01:15:35.98#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:36.00#ibcon#read 3, iclass 32, count 0 2006.229.01:15:36.00#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:36.00#ibcon#read 4, iclass 32, count 0 2006.229.01:15:36.00#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:36.00#ibcon#read 5, iclass 32, count 0 2006.229.01:15:36.00#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:36.00#ibcon#read 6, iclass 32, count 0 2006.229.01:15:36.00#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:36.00#ibcon#*mode == 0, iclass 32, count 0 2006.229.01:15:36.00#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.01:15:36.00#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.01:15:36.00#ibcon#*before write, iclass 32, count 0 2006.229.01:15:36.00#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:36.00#ibcon#flushed, iclass 32, count 0 2006.229.01:15:36.00#ibcon#about to write, iclass 32, count 0 2006.229.01:15:36.00#ibcon#wrote, iclass 32, count 0 2006.229.01:15:36.00#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:36.04#ibcon#read 3, iclass 32, count 0 2006.229.01:15:36.04#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:36.04#ibcon#read 4, iclass 32, count 0 2006.229.01:15:36.04#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:36.04#ibcon#read 5, iclass 32, count 0 2006.229.01:15:36.04#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:36.04#ibcon#read 6, iclass 32, count 0 2006.229.01:15:36.04#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:36.04#ibcon#*after write, iclass 32, count 0 2006.229.01:15:36.04#ibcon#*before return 0, iclass 32, count 0 2006.229.01:15:36.04#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:36.04#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:36.04#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.01:15:36.04#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.01:15:36.04$vck44/va=7,5 2006.229.01:15:36.04#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.01:15:36.04#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.01:15:36.04#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:36.04#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:36.10#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:36.10#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:36.10#ibcon#enter wrdev, iclass 34, count 2 2006.229.01:15:36.10#ibcon#first serial, iclass 34, count 2 2006.229.01:15:36.10#ibcon#enter sib2, iclass 34, count 2 2006.229.01:15:36.10#ibcon#flushed, iclass 34, count 2 2006.229.01:15:36.10#ibcon#about to write, iclass 34, count 2 2006.229.01:15:36.10#ibcon#wrote, iclass 34, count 2 2006.229.01:15:36.10#ibcon#about to read 3, iclass 34, count 2 2006.229.01:15:36.12#ibcon#read 3, iclass 34, count 2 2006.229.01:15:36.12#ibcon#about to read 4, iclass 34, count 2 2006.229.01:15:36.12#ibcon#read 4, iclass 34, count 2 2006.229.01:15:36.12#ibcon#about to read 5, iclass 34, count 2 2006.229.01:15:36.12#ibcon#read 5, iclass 34, count 2 2006.229.01:15:36.12#ibcon#about to read 6, iclass 34, count 2 2006.229.01:15:36.12#ibcon#read 6, iclass 34, count 2 2006.229.01:15:36.12#ibcon#end of sib2, iclass 34, count 2 2006.229.01:15:36.12#ibcon#*mode == 0, iclass 34, count 2 2006.229.01:15:36.12#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.01:15:36.12#ibcon#[25=AT07-05\r\n] 2006.229.01:15:36.12#ibcon#*before write, iclass 34, count 2 2006.229.01:15:36.12#ibcon#enter sib2, iclass 34, count 2 2006.229.01:15:36.12#ibcon#flushed, iclass 34, count 2 2006.229.01:15:36.12#ibcon#about to write, iclass 34, count 2 2006.229.01:15:36.12#ibcon#wrote, iclass 34, count 2 2006.229.01:15:36.12#ibcon#about to read 3, iclass 34, count 2 2006.229.01:15:36.15#ibcon#read 3, iclass 34, count 2 2006.229.01:15:36.15#ibcon#about to read 4, iclass 34, count 2 2006.229.01:15:36.15#ibcon#read 4, iclass 34, count 2 2006.229.01:15:36.15#ibcon#about to read 5, iclass 34, count 2 2006.229.01:15:36.15#ibcon#read 5, iclass 34, count 2 2006.229.01:15:36.15#ibcon#about to read 6, iclass 34, count 2 2006.229.01:15:36.15#ibcon#read 6, iclass 34, count 2 2006.229.01:15:36.15#ibcon#end of sib2, iclass 34, count 2 2006.229.01:15:36.15#ibcon#*after write, iclass 34, count 2 2006.229.01:15:36.15#ibcon#*before return 0, iclass 34, count 2 2006.229.01:15:36.15#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:36.15#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:36.15#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.01:15:36.15#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:36.15#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:36.27#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:36.27#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:36.27#ibcon#enter wrdev, iclass 34, count 0 2006.229.01:15:36.27#ibcon#first serial, iclass 34, count 0 2006.229.01:15:36.27#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:36.27#ibcon#flushed, iclass 34, count 0 2006.229.01:15:36.27#ibcon#about to write, iclass 34, count 0 2006.229.01:15:36.27#ibcon#wrote, iclass 34, count 0 2006.229.01:15:36.27#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:36.29#ibcon#read 3, iclass 34, count 0 2006.229.01:15:36.29#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:36.29#ibcon#read 4, iclass 34, count 0 2006.229.01:15:36.29#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:36.29#ibcon#read 5, iclass 34, count 0 2006.229.01:15:36.29#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:36.29#ibcon#read 6, iclass 34, count 0 2006.229.01:15:36.29#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:36.29#ibcon#*mode == 0, iclass 34, count 0 2006.229.01:15:36.29#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.01:15:36.29#ibcon#[25=USB\r\n] 2006.229.01:15:36.29#ibcon#*before write, iclass 34, count 0 2006.229.01:15:36.29#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:36.29#ibcon#flushed, iclass 34, count 0 2006.229.01:15:36.29#ibcon#about to write, iclass 34, count 0 2006.229.01:15:36.29#ibcon#wrote, iclass 34, count 0 2006.229.01:15:36.29#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:36.32#ibcon#read 3, iclass 34, count 0 2006.229.01:15:36.32#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:36.32#ibcon#read 4, iclass 34, count 0 2006.229.01:15:36.32#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:36.32#ibcon#read 5, iclass 34, count 0 2006.229.01:15:36.32#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:36.32#ibcon#read 6, iclass 34, count 0 2006.229.01:15:36.32#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:36.32#ibcon#*after write, iclass 34, count 0 2006.229.01:15:36.32#ibcon#*before return 0, iclass 34, count 0 2006.229.01:15:36.32#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:36.32#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:36.32#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.01:15:36.32#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.01:15:36.32$vck44/valo=8,884.99 2006.229.01:15:36.32#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.01:15:36.32#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:36.32#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:36.32#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:36.32#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:36.32#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:36.32#ibcon#enter wrdev, iclass 36, count 0 2006.229.01:15:36.32#ibcon#first serial, iclass 36, count 0 2006.229.01:15:36.32#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:36.32#ibcon#flushed, iclass 36, count 0 2006.229.01:15:36.32#ibcon#about to write, iclass 36, count 0 2006.229.01:15:36.32#ibcon#wrote, iclass 36, count 0 2006.229.01:15:36.32#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:36.34#ibcon#read 3, iclass 36, count 0 2006.229.01:15:36.34#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:36.34#ibcon#read 4, iclass 36, count 0 2006.229.01:15:36.34#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:36.34#ibcon#read 5, iclass 36, count 0 2006.229.01:15:36.34#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:36.34#ibcon#read 6, iclass 36, count 0 2006.229.01:15:36.34#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:36.34#ibcon#*mode == 0, iclass 36, count 0 2006.229.01:15:36.34#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.01:15:36.34#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.01:15:36.34#ibcon#*before write, iclass 36, count 0 2006.229.01:15:36.34#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:36.34#ibcon#flushed, iclass 36, count 0 2006.229.01:15:36.34#ibcon#about to write, iclass 36, count 0 2006.229.01:15:36.34#ibcon#wrote, iclass 36, count 0 2006.229.01:15:36.34#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:36.38#ibcon#read 3, iclass 36, count 0 2006.229.01:15:36.38#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:36.38#ibcon#read 4, iclass 36, count 0 2006.229.01:15:36.38#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:36.38#ibcon#read 5, iclass 36, count 0 2006.229.01:15:36.38#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:36.38#ibcon#read 6, iclass 36, count 0 2006.229.01:15:36.38#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:36.38#ibcon#*after write, iclass 36, count 0 2006.229.01:15:36.38#ibcon#*before return 0, iclass 36, count 0 2006.229.01:15:36.38#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:36.38#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:36.38#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.01:15:36.38#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.01:15:36.38$vck44/va=8,6 2006.229.01:15:36.38#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.01:15:36.38#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.01:15:36.38#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:36.38#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:36.44#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:36.44#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:36.44#ibcon#enter wrdev, iclass 38, count 2 2006.229.01:15:36.44#ibcon#first serial, iclass 38, count 2 2006.229.01:15:36.44#ibcon#enter sib2, iclass 38, count 2 2006.229.01:15:36.44#ibcon#flushed, iclass 38, count 2 2006.229.01:15:36.44#ibcon#about to write, iclass 38, count 2 2006.229.01:15:36.44#ibcon#wrote, iclass 38, count 2 2006.229.01:15:36.44#ibcon#about to read 3, iclass 38, count 2 2006.229.01:15:36.46#ibcon#read 3, iclass 38, count 2 2006.229.01:15:36.46#ibcon#about to read 4, iclass 38, count 2 2006.229.01:15:36.46#ibcon#read 4, iclass 38, count 2 2006.229.01:15:36.46#ibcon#about to read 5, iclass 38, count 2 2006.229.01:15:36.46#ibcon#read 5, iclass 38, count 2 2006.229.01:15:36.46#ibcon#about to read 6, iclass 38, count 2 2006.229.01:15:36.46#ibcon#read 6, iclass 38, count 2 2006.229.01:15:36.46#ibcon#end of sib2, iclass 38, count 2 2006.229.01:15:36.46#ibcon#*mode == 0, iclass 38, count 2 2006.229.01:15:36.46#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.01:15:36.46#ibcon#[25=AT08-06\r\n] 2006.229.01:15:36.46#ibcon#*before write, iclass 38, count 2 2006.229.01:15:36.46#ibcon#enter sib2, iclass 38, count 2 2006.229.01:15:36.46#ibcon#flushed, iclass 38, count 2 2006.229.01:15:36.46#ibcon#about to write, iclass 38, count 2 2006.229.01:15:36.46#ibcon#wrote, iclass 38, count 2 2006.229.01:15:36.46#ibcon#about to read 3, iclass 38, count 2 2006.229.01:15:36.49#ibcon#read 3, iclass 38, count 2 2006.229.01:15:36.49#ibcon#about to read 4, iclass 38, count 2 2006.229.01:15:36.49#ibcon#read 4, iclass 38, count 2 2006.229.01:15:36.49#ibcon#about to read 5, iclass 38, count 2 2006.229.01:15:36.49#ibcon#read 5, iclass 38, count 2 2006.229.01:15:36.49#ibcon#about to read 6, iclass 38, count 2 2006.229.01:15:36.49#ibcon#read 6, iclass 38, count 2 2006.229.01:15:36.49#ibcon#end of sib2, iclass 38, count 2 2006.229.01:15:36.49#ibcon#*after write, iclass 38, count 2 2006.229.01:15:36.49#ibcon#*before return 0, iclass 38, count 2 2006.229.01:15:36.49#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:36.49#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:36.49#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.01:15:36.49#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:36.49#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.01:15:36.61#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.01:15:36.61#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.01:15:36.61#ibcon#enter wrdev, iclass 38, count 0 2006.229.01:15:36.61#ibcon#first serial, iclass 38, count 0 2006.229.01:15:36.61#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:36.61#ibcon#flushed, iclass 38, count 0 2006.229.01:15:36.61#ibcon#about to write, iclass 38, count 0 2006.229.01:15:36.61#ibcon#wrote, iclass 38, count 0 2006.229.01:15:36.61#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:36.63#ibcon#read 3, iclass 38, count 0 2006.229.01:15:36.63#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:36.63#ibcon#read 4, iclass 38, count 0 2006.229.01:15:36.63#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:36.63#ibcon#read 5, iclass 38, count 0 2006.229.01:15:36.63#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:36.63#ibcon#read 6, iclass 38, count 0 2006.229.01:15:36.63#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:36.63#ibcon#*mode == 0, iclass 38, count 0 2006.229.01:15:36.63#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.01:15:36.63#ibcon#[25=USB\r\n] 2006.229.01:15:36.63#ibcon#*before write, iclass 38, count 0 2006.229.01:15:36.63#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:36.63#ibcon#flushed, iclass 38, count 0 2006.229.01:15:36.63#ibcon#about to write, iclass 38, count 0 2006.229.01:15:36.63#ibcon#wrote, iclass 38, count 0 2006.229.01:15:36.63#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:36.66#ibcon#read 3, iclass 38, count 0 2006.229.01:15:36.66#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:36.66#ibcon#read 4, iclass 38, count 0 2006.229.01:15:36.66#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:36.66#ibcon#read 5, iclass 38, count 0 2006.229.01:15:36.66#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:36.66#ibcon#read 6, iclass 38, count 0 2006.229.01:15:36.66#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:36.66#ibcon#*after write, iclass 38, count 0 2006.229.01:15:36.66#ibcon#*before return 0, iclass 38, count 0 2006.229.01:15:36.66#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.01:15:36.66#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.01:15:36.66#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.01:15:36.66#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.01:15:36.66$vck44/vblo=1,629.99 2006.229.01:15:36.66#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.01:15:36.66#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:36.66#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:36.66#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:36.66#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:36.66#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:36.66#ibcon#enter wrdev, iclass 40, count 0 2006.229.01:15:36.66#ibcon#first serial, iclass 40, count 0 2006.229.01:15:36.66#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:36.66#ibcon#flushed, iclass 40, count 0 2006.229.01:15:36.66#ibcon#about to write, iclass 40, count 0 2006.229.01:15:36.66#ibcon#wrote, iclass 40, count 0 2006.229.01:15:36.66#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:36.68#ibcon#read 3, iclass 40, count 0 2006.229.01:15:36.68#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:36.68#ibcon#read 4, iclass 40, count 0 2006.229.01:15:36.68#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:36.68#ibcon#read 5, iclass 40, count 0 2006.229.01:15:36.68#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:36.68#ibcon#read 6, iclass 40, count 0 2006.229.01:15:36.68#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:36.68#ibcon#*mode == 0, iclass 40, count 0 2006.229.01:15:36.68#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.01:15:36.68#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.01:15:36.68#ibcon#*before write, iclass 40, count 0 2006.229.01:15:36.68#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:36.68#ibcon#flushed, iclass 40, count 0 2006.229.01:15:36.68#ibcon#about to write, iclass 40, count 0 2006.229.01:15:36.68#ibcon#wrote, iclass 40, count 0 2006.229.01:15:36.68#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:36.74#ibcon#read 3, iclass 40, count 0 2006.229.01:15:36.74#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:36.74#ibcon#read 4, iclass 40, count 0 2006.229.01:15:36.74#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:36.74#ibcon#read 5, iclass 40, count 0 2006.229.01:15:36.74#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:36.74#ibcon#read 6, iclass 40, count 0 2006.229.01:15:36.74#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:36.74#ibcon#*after write, iclass 40, count 0 2006.229.01:15:36.74#ibcon#*before return 0, iclass 40, count 0 2006.229.01:15:36.74#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:36.74#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.01:15:36.74#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.01:15:36.74#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.01:15:36.74$vck44/vb=1,4 2006.229.01:15:36.74#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.01:15:36.74#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.01:15:36.74#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:36.74#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:36.74#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:36.74#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:36.74#ibcon#enter wrdev, iclass 4, count 2 2006.229.01:15:36.74#ibcon#first serial, iclass 4, count 2 2006.229.01:15:36.74#ibcon#enter sib2, iclass 4, count 2 2006.229.01:15:36.74#ibcon#flushed, iclass 4, count 2 2006.229.01:15:36.74#ibcon#about to write, iclass 4, count 2 2006.229.01:15:36.74#ibcon#wrote, iclass 4, count 2 2006.229.01:15:36.74#ibcon#about to read 3, iclass 4, count 2 2006.229.01:15:36.76#ibcon#read 3, iclass 4, count 2 2006.229.01:15:36.76#ibcon#about to read 4, iclass 4, count 2 2006.229.01:15:36.76#ibcon#read 4, iclass 4, count 2 2006.229.01:15:36.76#ibcon#about to read 5, iclass 4, count 2 2006.229.01:15:36.76#ibcon#read 5, iclass 4, count 2 2006.229.01:15:36.76#ibcon#about to read 6, iclass 4, count 2 2006.229.01:15:36.76#ibcon#read 6, iclass 4, count 2 2006.229.01:15:36.76#ibcon#end of sib2, iclass 4, count 2 2006.229.01:15:36.76#ibcon#*mode == 0, iclass 4, count 2 2006.229.01:15:36.76#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.01:15:36.76#ibcon#[27=AT01-04\r\n] 2006.229.01:15:36.76#ibcon#*before write, iclass 4, count 2 2006.229.01:15:36.76#ibcon#enter sib2, iclass 4, count 2 2006.229.01:15:36.76#ibcon#flushed, iclass 4, count 2 2006.229.01:15:36.76#ibcon#about to write, iclass 4, count 2 2006.229.01:15:36.76#ibcon#wrote, iclass 4, count 2 2006.229.01:15:36.76#ibcon#about to read 3, iclass 4, count 2 2006.229.01:15:36.80#ibcon#read 3, iclass 4, count 2 2006.229.01:15:36.80#ibcon#about to read 4, iclass 4, count 2 2006.229.01:15:36.80#ibcon#read 4, iclass 4, count 2 2006.229.01:15:36.80#ibcon#about to read 5, iclass 4, count 2 2006.229.01:15:36.80#ibcon#read 5, iclass 4, count 2 2006.229.01:15:36.80#ibcon#about to read 6, iclass 4, count 2 2006.229.01:15:36.80#ibcon#read 6, iclass 4, count 2 2006.229.01:15:36.80#ibcon#end of sib2, iclass 4, count 2 2006.229.01:15:36.80#ibcon#*after write, iclass 4, count 2 2006.229.01:15:36.80#ibcon#*before return 0, iclass 4, count 2 2006.229.01:15:36.80#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:36.80#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:36.80#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.01:15:36.80#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:36.80#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:36.92#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:36.92#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:36.92#ibcon#enter wrdev, iclass 4, count 0 2006.229.01:15:36.92#ibcon#first serial, iclass 4, count 0 2006.229.01:15:36.92#ibcon#enter sib2, iclass 4, count 0 2006.229.01:15:36.92#ibcon#flushed, iclass 4, count 0 2006.229.01:15:36.92#ibcon#about to write, iclass 4, count 0 2006.229.01:15:36.92#ibcon#wrote, iclass 4, count 0 2006.229.01:15:36.92#ibcon#about to read 3, iclass 4, count 0 2006.229.01:15:36.94#ibcon#read 3, iclass 4, count 0 2006.229.01:15:36.94#ibcon#about to read 4, iclass 4, count 0 2006.229.01:15:36.94#ibcon#read 4, iclass 4, count 0 2006.229.01:15:36.94#ibcon#about to read 5, iclass 4, count 0 2006.229.01:15:36.94#ibcon#read 5, iclass 4, count 0 2006.229.01:15:36.94#ibcon#about to read 6, iclass 4, count 0 2006.229.01:15:36.94#ibcon#read 6, iclass 4, count 0 2006.229.01:15:36.94#ibcon#end of sib2, iclass 4, count 0 2006.229.01:15:36.94#ibcon#*mode == 0, iclass 4, count 0 2006.229.01:15:36.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.01:15:36.94#ibcon#[27=USB\r\n] 2006.229.01:15:36.94#ibcon#*before write, iclass 4, count 0 2006.229.01:15:36.94#ibcon#enter sib2, iclass 4, count 0 2006.229.01:15:36.94#ibcon#flushed, iclass 4, count 0 2006.229.01:15:36.94#ibcon#about to write, iclass 4, count 0 2006.229.01:15:36.94#ibcon#wrote, iclass 4, count 0 2006.229.01:15:36.94#ibcon#about to read 3, iclass 4, count 0 2006.229.01:15:36.97#ibcon#read 3, iclass 4, count 0 2006.229.01:15:36.97#ibcon#about to read 4, iclass 4, count 0 2006.229.01:15:36.97#ibcon#read 4, iclass 4, count 0 2006.229.01:15:36.97#ibcon#about to read 5, iclass 4, count 0 2006.229.01:15:36.97#ibcon#read 5, iclass 4, count 0 2006.229.01:15:36.97#ibcon#about to read 6, iclass 4, count 0 2006.229.01:15:36.97#ibcon#read 6, iclass 4, count 0 2006.229.01:15:36.97#ibcon#end of sib2, iclass 4, count 0 2006.229.01:15:36.97#ibcon#*after write, iclass 4, count 0 2006.229.01:15:36.97#ibcon#*before return 0, iclass 4, count 0 2006.229.01:15:36.97#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:36.97#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.01:15:36.97#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.01:15:36.97#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.01:15:36.97$vck44/vblo=2,634.99 2006.229.01:15:36.97#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.01:15:36.97#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:36.97#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:36.97#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:36.97#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:36.97#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:36.97#ibcon#enter wrdev, iclass 6, count 0 2006.229.01:15:36.97#ibcon#first serial, iclass 6, count 0 2006.229.01:15:36.97#ibcon#enter sib2, iclass 6, count 0 2006.229.01:15:36.97#ibcon#flushed, iclass 6, count 0 2006.229.01:15:36.97#ibcon#about to write, iclass 6, count 0 2006.229.01:15:36.97#ibcon#wrote, iclass 6, count 0 2006.229.01:15:36.97#ibcon#about to read 3, iclass 6, count 0 2006.229.01:15:36.99#ibcon#read 3, iclass 6, count 0 2006.229.01:15:36.99#ibcon#about to read 4, iclass 6, count 0 2006.229.01:15:36.99#ibcon#read 4, iclass 6, count 0 2006.229.01:15:36.99#ibcon#about to read 5, iclass 6, count 0 2006.229.01:15:36.99#ibcon#read 5, iclass 6, count 0 2006.229.01:15:36.99#ibcon#about to read 6, iclass 6, count 0 2006.229.01:15:36.99#ibcon#read 6, iclass 6, count 0 2006.229.01:15:36.99#ibcon#end of sib2, iclass 6, count 0 2006.229.01:15:36.99#ibcon#*mode == 0, iclass 6, count 0 2006.229.01:15:36.99#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.01:15:36.99#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.01:15:36.99#ibcon#*before write, iclass 6, count 0 2006.229.01:15:36.99#ibcon#enter sib2, iclass 6, count 0 2006.229.01:15:36.99#ibcon#flushed, iclass 6, count 0 2006.229.01:15:36.99#ibcon#about to write, iclass 6, count 0 2006.229.01:15:36.99#ibcon#wrote, iclass 6, count 0 2006.229.01:15:36.99#ibcon#about to read 3, iclass 6, count 0 2006.229.01:15:37.03#ibcon#read 3, iclass 6, count 0 2006.229.01:15:37.03#ibcon#about to read 4, iclass 6, count 0 2006.229.01:15:37.03#ibcon#read 4, iclass 6, count 0 2006.229.01:15:37.03#ibcon#about to read 5, iclass 6, count 0 2006.229.01:15:37.03#ibcon#read 5, iclass 6, count 0 2006.229.01:15:37.03#ibcon#about to read 6, iclass 6, count 0 2006.229.01:15:37.03#ibcon#read 6, iclass 6, count 0 2006.229.01:15:37.03#ibcon#end of sib2, iclass 6, count 0 2006.229.01:15:37.03#ibcon#*after write, iclass 6, count 0 2006.229.01:15:37.03#ibcon#*before return 0, iclass 6, count 0 2006.229.01:15:37.03#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:37.03#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.01:15:37.03#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.01:15:37.03#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.01:15:37.03$vck44/vb=2,4 2006.229.01:15:37.03#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.01:15:37.03#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.01:15:37.03#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:37.03#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:37.09#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:37.09#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:37.09#ibcon#enter wrdev, iclass 10, count 2 2006.229.01:15:37.09#ibcon#first serial, iclass 10, count 2 2006.229.01:15:37.09#ibcon#enter sib2, iclass 10, count 2 2006.229.01:15:37.09#ibcon#flushed, iclass 10, count 2 2006.229.01:15:37.09#ibcon#about to write, iclass 10, count 2 2006.229.01:15:37.09#ibcon#wrote, iclass 10, count 2 2006.229.01:15:37.09#ibcon#about to read 3, iclass 10, count 2 2006.229.01:15:37.11#ibcon#read 3, iclass 10, count 2 2006.229.01:15:37.11#ibcon#about to read 4, iclass 10, count 2 2006.229.01:15:37.11#ibcon#read 4, iclass 10, count 2 2006.229.01:15:37.11#ibcon#about to read 5, iclass 10, count 2 2006.229.01:15:37.11#ibcon#read 5, iclass 10, count 2 2006.229.01:15:37.11#ibcon#about to read 6, iclass 10, count 2 2006.229.01:15:37.11#ibcon#read 6, iclass 10, count 2 2006.229.01:15:37.11#ibcon#end of sib2, iclass 10, count 2 2006.229.01:15:37.11#ibcon#*mode == 0, iclass 10, count 2 2006.229.01:15:37.11#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.01:15:37.11#ibcon#[27=AT02-04\r\n] 2006.229.01:15:37.11#ibcon#*before write, iclass 10, count 2 2006.229.01:15:37.11#ibcon#enter sib2, iclass 10, count 2 2006.229.01:15:37.11#ibcon#flushed, iclass 10, count 2 2006.229.01:15:37.11#ibcon#about to write, iclass 10, count 2 2006.229.01:15:37.11#ibcon#wrote, iclass 10, count 2 2006.229.01:15:37.11#ibcon#about to read 3, iclass 10, count 2 2006.229.01:15:37.14#ibcon#read 3, iclass 10, count 2 2006.229.01:15:37.14#ibcon#about to read 4, iclass 10, count 2 2006.229.01:15:37.14#ibcon#read 4, iclass 10, count 2 2006.229.01:15:37.14#ibcon#about to read 5, iclass 10, count 2 2006.229.01:15:37.14#ibcon#read 5, iclass 10, count 2 2006.229.01:15:37.14#ibcon#about to read 6, iclass 10, count 2 2006.229.01:15:37.14#ibcon#read 6, iclass 10, count 2 2006.229.01:15:37.14#ibcon#end of sib2, iclass 10, count 2 2006.229.01:15:37.14#ibcon#*after write, iclass 10, count 2 2006.229.01:15:37.14#ibcon#*before return 0, iclass 10, count 2 2006.229.01:15:37.14#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:37.14#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:37.14#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.01:15:37.14#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:37.14#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.01:15:37.26#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.01:15:37.26#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.01:15:37.26#ibcon#enter wrdev, iclass 10, count 0 2006.229.01:15:37.26#ibcon#first serial, iclass 10, count 0 2006.229.01:15:37.26#ibcon#enter sib2, iclass 10, count 0 2006.229.01:15:37.26#ibcon#flushed, iclass 10, count 0 2006.229.01:15:37.26#ibcon#about to write, iclass 10, count 0 2006.229.01:15:37.26#ibcon#wrote, iclass 10, count 0 2006.229.01:15:37.26#ibcon#about to read 3, iclass 10, count 0 2006.229.01:15:37.28#ibcon#read 3, iclass 10, count 0 2006.229.01:15:37.28#ibcon#about to read 4, iclass 10, count 0 2006.229.01:15:37.28#ibcon#read 4, iclass 10, count 0 2006.229.01:15:37.28#ibcon#about to read 5, iclass 10, count 0 2006.229.01:15:37.28#ibcon#read 5, iclass 10, count 0 2006.229.01:15:37.28#ibcon#about to read 6, iclass 10, count 0 2006.229.01:15:37.28#ibcon#read 6, iclass 10, count 0 2006.229.01:15:37.28#ibcon#end of sib2, iclass 10, count 0 2006.229.01:15:37.28#ibcon#*mode == 0, iclass 10, count 0 2006.229.01:15:37.28#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.01:15:37.28#ibcon#[27=USB\r\n] 2006.229.01:15:37.28#ibcon#*before write, iclass 10, count 0 2006.229.01:15:37.28#ibcon#enter sib2, iclass 10, count 0 2006.229.01:15:37.28#ibcon#flushed, iclass 10, count 0 2006.229.01:15:37.28#ibcon#about to write, iclass 10, count 0 2006.229.01:15:37.28#ibcon#wrote, iclass 10, count 0 2006.229.01:15:37.28#ibcon#about to read 3, iclass 10, count 0 2006.229.01:15:37.31#ibcon#read 3, iclass 10, count 0 2006.229.01:15:37.31#ibcon#about to read 4, iclass 10, count 0 2006.229.01:15:37.31#ibcon#read 4, iclass 10, count 0 2006.229.01:15:37.31#ibcon#about to read 5, iclass 10, count 0 2006.229.01:15:37.31#ibcon#read 5, iclass 10, count 0 2006.229.01:15:37.31#ibcon#about to read 6, iclass 10, count 0 2006.229.01:15:37.31#ibcon#read 6, iclass 10, count 0 2006.229.01:15:37.31#ibcon#end of sib2, iclass 10, count 0 2006.229.01:15:37.31#ibcon#*after write, iclass 10, count 0 2006.229.01:15:37.31#ibcon#*before return 0, iclass 10, count 0 2006.229.01:15:37.31#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.01:15:37.31#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.01:15:37.31#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.01:15:37.31#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.01:15:37.31$vck44/vblo=3,649.99 2006.229.01:15:37.31#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.01:15:37.31#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:37.31#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:37.31#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.01:15:37.31#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.01:15:37.31#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.01:15:37.31#ibcon#enter wrdev, iclass 12, count 0 2006.229.01:15:37.31#ibcon#first serial, iclass 12, count 0 2006.229.01:15:37.31#ibcon#enter sib2, iclass 12, count 0 2006.229.01:15:37.31#ibcon#flushed, iclass 12, count 0 2006.229.01:15:37.31#ibcon#about to write, iclass 12, count 0 2006.229.01:15:37.31#ibcon#wrote, iclass 12, count 0 2006.229.01:15:37.31#ibcon#about to read 3, iclass 12, count 0 2006.229.01:15:37.33#ibcon#read 3, iclass 12, count 0 2006.229.01:15:37.33#ibcon#about to read 4, iclass 12, count 0 2006.229.01:15:37.33#ibcon#read 4, iclass 12, count 0 2006.229.01:15:37.33#ibcon#about to read 5, iclass 12, count 0 2006.229.01:15:37.33#ibcon#read 5, iclass 12, count 0 2006.229.01:15:37.33#ibcon#about to read 6, iclass 12, count 0 2006.229.01:15:37.33#ibcon#read 6, iclass 12, count 0 2006.229.01:15:37.33#ibcon#end of sib2, iclass 12, count 0 2006.229.01:15:37.33#ibcon#*mode == 0, iclass 12, count 0 2006.229.01:15:37.33#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.01:15:37.33#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.01:15:37.33#ibcon#*before write, iclass 12, count 0 2006.229.01:15:37.33#ibcon#enter sib2, iclass 12, count 0 2006.229.01:15:37.33#ibcon#flushed, iclass 12, count 0 2006.229.01:15:37.33#ibcon#about to write, iclass 12, count 0 2006.229.01:15:37.33#ibcon#wrote, iclass 12, count 0 2006.229.01:15:37.33#ibcon#about to read 3, iclass 12, count 0 2006.229.01:15:37.37#ibcon#read 3, iclass 12, count 0 2006.229.01:15:37.37#ibcon#about to read 4, iclass 12, count 0 2006.229.01:15:37.37#ibcon#read 4, iclass 12, count 0 2006.229.01:15:37.37#ibcon#about to read 5, iclass 12, count 0 2006.229.01:15:37.37#ibcon#read 5, iclass 12, count 0 2006.229.01:15:37.37#ibcon#about to read 6, iclass 12, count 0 2006.229.01:15:37.37#ibcon#read 6, iclass 12, count 0 2006.229.01:15:37.37#ibcon#end of sib2, iclass 12, count 0 2006.229.01:15:37.37#ibcon#*after write, iclass 12, count 0 2006.229.01:15:37.37#ibcon#*before return 0, iclass 12, count 0 2006.229.01:15:37.37#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.01:15:37.37#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.01:15:37.37#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.01:15:37.37#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.01:15:37.37$vck44/vb=3,4 2006.229.01:15:37.37#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.01:15:37.37#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.01:15:37.37#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:37.37#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:37.43#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:37.43#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:37.43#ibcon#enter wrdev, iclass 14, count 2 2006.229.01:15:37.43#ibcon#first serial, iclass 14, count 2 2006.229.01:15:37.43#ibcon#enter sib2, iclass 14, count 2 2006.229.01:15:37.43#ibcon#flushed, iclass 14, count 2 2006.229.01:15:37.43#ibcon#about to write, iclass 14, count 2 2006.229.01:15:37.43#ibcon#wrote, iclass 14, count 2 2006.229.01:15:37.43#ibcon#about to read 3, iclass 14, count 2 2006.229.01:15:37.45#ibcon#read 3, iclass 14, count 2 2006.229.01:15:37.45#ibcon#about to read 4, iclass 14, count 2 2006.229.01:15:37.45#ibcon#read 4, iclass 14, count 2 2006.229.01:15:37.45#ibcon#about to read 5, iclass 14, count 2 2006.229.01:15:37.45#ibcon#read 5, iclass 14, count 2 2006.229.01:15:37.45#ibcon#about to read 6, iclass 14, count 2 2006.229.01:15:37.45#ibcon#read 6, iclass 14, count 2 2006.229.01:15:37.45#ibcon#end of sib2, iclass 14, count 2 2006.229.01:15:37.45#ibcon#*mode == 0, iclass 14, count 2 2006.229.01:15:37.45#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.01:15:37.45#ibcon#[27=AT03-04\r\n] 2006.229.01:15:37.45#ibcon#*before write, iclass 14, count 2 2006.229.01:15:37.45#ibcon#enter sib2, iclass 14, count 2 2006.229.01:15:37.45#ibcon#flushed, iclass 14, count 2 2006.229.01:15:37.45#ibcon#about to write, iclass 14, count 2 2006.229.01:15:37.45#ibcon#wrote, iclass 14, count 2 2006.229.01:15:37.45#ibcon#about to read 3, iclass 14, count 2 2006.229.01:15:37.48#ibcon#read 3, iclass 14, count 2 2006.229.01:15:37.48#ibcon#about to read 4, iclass 14, count 2 2006.229.01:15:37.48#ibcon#read 4, iclass 14, count 2 2006.229.01:15:37.48#ibcon#about to read 5, iclass 14, count 2 2006.229.01:15:37.48#ibcon#read 5, iclass 14, count 2 2006.229.01:15:37.48#ibcon#about to read 6, iclass 14, count 2 2006.229.01:15:37.48#ibcon#read 6, iclass 14, count 2 2006.229.01:15:37.48#ibcon#end of sib2, iclass 14, count 2 2006.229.01:15:37.48#ibcon#*after write, iclass 14, count 2 2006.229.01:15:37.48#ibcon#*before return 0, iclass 14, count 2 2006.229.01:15:37.48#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:37.48#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:37.48#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.01:15:37.48#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:37.48#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.01:15:37.60#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.01:15:37.60#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.01:15:37.60#ibcon#enter wrdev, iclass 14, count 0 2006.229.01:15:37.60#ibcon#first serial, iclass 14, count 0 2006.229.01:15:37.60#ibcon#enter sib2, iclass 14, count 0 2006.229.01:15:37.60#ibcon#flushed, iclass 14, count 0 2006.229.01:15:37.60#ibcon#about to write, iclass 14, count 0 2006.229.01:15:37.60#ibcon#wrote, iclass 14, count 0 2006.229.01:15:37.60#ibcon#about to read 3, iclass 14, count 0 2006.229.01:15:37.62#ibcon#read 3, iclass 14, count 0 2006.229.01:15:37.62#ibcon#about to read 4, iclass 14, count 0 2006.229.01:15:37.62#ibcon#read 4, iclass 14, count 0 2006.229.01:15:37.62#ibcon#about to read 5, iclass 14, count 0 2006.229.01:15:37.62#ibcon#read 5, iclass 14, count 0 2006.229.01:15:37.62#ibcon#about to read 6, iclass 14, count 0 2006.229.01:15:37.62#ibcon#read 6, iclass 14, count 0 2006.229.01:15:37.62#ibcon#end of sib2, iclass 14, count 0 2006.229.01:15:37.62#ibcon#*mode == 0, iclass 14, count 0 2006.229.01:15:37.62#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.01:15:37.62#ibcon#[27=USB\r\n] 2006.229.01:15:37.62#ibcon#*before write, iclass 14, count 0 2006.229.01:15:37.62#ibcon#enter sib2, iclass 14, count 0 2006.229.01:15:37.62#ibcon#flushed, iclass 14, count 0 2006.229.01:15:37.62#ibcon#about to write, iclass 14, count 0 2006.229.01:15:37.62#ibcon#wrote, iclass 14, count 0 2006.229.01:15:37.62#ibcon#about to read 3, iclass 14, count 0 2006.229.01:15:37.65#ibcon#read 3, iclass 14, count 0 2006.229.01:15:37.65#ibcon#about to read 4, iclass 14, count 0 2006.229.01:15:37.65#ibcon#read 4, iclass 14, count 0 2006.229.01:15:37.65#ibcon#about to read 5, iclass 14, count 0 2006.229.01:15:37.65#ibcon#read 5, iclass 14, count 0 2006.229.01:15:37.65#ibcon#about to read 6, iclass 14, count 0 2006.229.01:15:37.65#ibcon#read 6, iclass 14, count 0 2006.229.01:15:37.65#ibcon#end of sib2, iclass 14, count 0 2006.229.01:15:37.65#ibcon#*after write, iclass 14, count 0 2006.229.01:15:37.65#ibcon#*before return 0, iclass 14, count 0 2006.229.01:15:37.65#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.01:15:37.65#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.01:15:37.65#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.01:15:37.65#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.01:15:37.65$vck44/vblo=4,679.99 2006.229.01:15:37.65#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.01:15:37.65#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:37.65#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:37.65#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:37.65#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:37.65#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:37.65#ibcon#enter wrdev, iclass 16, count 0 2006.229.01:15:37.65#ibcon#first serial, iclass 16, count 0 2006.229.01:15:37.65#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:37.65#ibcon#flushed, iclass 16, count 0 2006.229.01:15:37.65#ibcon#about to write, iclass 16, count 0 2006.229.01:15:37.65#ibcon#wrote, iclass 16, count 0 2006.229.01:15:37.65#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:37.67#ibcon#read 3, iclass 16, count 0 2006.229.01:15:37.67#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:37.67#ibcon#read 4, iclass 16, count 0 2006.229.01:15:37.67#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:37.67#ibcon#read 5, iclass 16, count 0 2006.229.01:15:37.67#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:37.67#ibcon#read 6, iclass 16, count 0 2006.229.01:15:37.67#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:37.67#ibcon#*mode == 0, iclass 16, count 0 2006.229.01:15:37.67#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.01:15:37.67#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.01:15:37.67#ibcon#*before write, iclass 16, count 0 2006.229.01:15:37.67#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:37.67#ibcon#flushed, iclass 16, count 0 2006.229.01:15:37.67#ibcon#about to write, iclass 16, count 0 2006.229.01:15:37.67#ibcon#wrote, iclass 16, count 0 2006.229.01:15:37.67#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:37.71#ibcon#read 3, iclass 16, count 0 2006.229.01:15:37.71#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:37.71#ibcon#read 4, iclass 16, count 0 2006.229.01:15:37.71#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:37.71#ibcon#read 5, iclass 16, count 0 2006.229.01:15:37.71#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:37.71#ibcon#read 6, iclass 16, count 0 2006.229.01:15:37.71#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:37.71#ibcon#*after write, iclass 16, count 0 2006.229.01:15:37.71#ibcon#*before return 0, iclass 16, count 0 2006.229.01:15:37.71#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:37.71#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.01:15:37.71#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.01:15:37.71#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.01:15:37.71$vck44/vb=4,4 2006.229.01:15:37.71#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.01:15:37.71#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.01:15:37.71#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:37.71#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:37.77#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:37.77#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:37.77#ibcon#enter wrdev, iclass 18, count 2 2006.229.01:15:37.77#ibcon#first serial, iclass 18, count 2 2006.229.01:15:37.77#ibcon#enter sib2, iclass 18, count 2 2006.229.01:15:37.77#ibcon#flushed, iclass 18, count 2 2006.229.01:15:37.77#ibcon#about to write, iclass 18, count 2 2006.229.01:15:37.77#ibcon#wrote, iclass 18, count 2 2006.229.01:15:37.77#ibcon#about to read 3, iclass 18, count 2 2006.229.01:15:37.79#ibcon#read 3, iclass 18, count 2 2006.229.01:15:37.79#ibcon#about to read 4, iclass 18, count 2 2006.229.01:15:37.79#ibcon#read 4, iclass 18, count 2 2006.229.01:15:37.79#ibcon#about to read 5, iclass 18, count 2 2006.229.01:15:37.79#ibcon#read 5, iclass 18, count 2 2006.229.01:15:37.79#ibcon#about to read 6, iclass 18, count 2 2006.229.01:15:37.79#ibcon#read 6, iclass 18, count 2 2006.229.01:15:37.79#ibcon#end of sib2, iclass 18, count 2 2006.229.01:15:37.79#ibcon#*mode == 0, iclass 18, count 2 2006.229.01:15:37.79#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.01:15:37.79#ibcon#[27=AT04-04\r\n] 2006.229.01:15:37.79#ibcon#*before write, iclass 18, count 2 2006.229.01:15:37.79#ibcon#enter sib2, iclass 18, count 2 2006.229.01:15:37.79#ibcon#flushed, iclass 18, count 2 2006.229.01:15:37.79#ibcon#about to write, iclass 18, count 2 2006.229.01:15:37.79#ibcon#wrote, iclass 18, count 2 2006.229.01:15:37.79#ibcon#about to read 3, iclass 18, count 2 2006.229.01:15:37.82#ibcon#read 3, iclass 18, count 2 2006.229.01:15:37.82#ibcon#about to read 4, iclass 18, count 2 2006.229.01:15:37.82#ibcon#read 4, iclass 18, count 2 2006.229.01:15:37.82#ibcon#about to read 5, iclass 18, count 2 2006.229.01:15:37.82#ibcon#read 5, iclass 18, count 2 2006.229.01:15:37.82#ibcon#about to read 6, iclass 18, count 2 2006.229.01:15:37.82#ibcon#read 6, iclass 18, count 2 2006.229.01:15:37.82#ibcon#end of sib2, iclass 18, count 2 2006.229.01:15:37.82#ibcon#*after write, iclass 18, count 2 2006.229.01:15:37.82#ibcon#*before return 0, iclass 18, count 2 2006.229.01:15:37.82#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:37.82#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:37.82#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.01:15:37.82#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:37.82#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:37.94#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:37.94#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:37.94#ibcon#enter wrdev, iclass 18, count 0 2006.229.01:15:37.94#ibcon#first serial, iclass 18, count 0 2006.229.01:15:37.94#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:37.94#ibcon#flushed, iclass 18, count 0 2006.229.01:15:37.94#ibcon#about to write, iclass 18, count 0 2006.229.01:15:37.94#ibcon#wrote, iclass 18, count 0 2006.229.01:15:37.94#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:37.96#ibcon#read 3, iclass 18, count 0 2006.229.01:15:37.96#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:37.96#ibcon#read 4, iclass 18, count 0 2006.229.01:15:37.96#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:37.96#ibcon#read 5, iclass 18, count 0 2006.229.01:15:37.96#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:37.96#ibcon#read 6, iclass 18, count 0 2006.229.01:15:37.96#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:37.96#ibcon#*mode == 0, iclass 18, count 0 2006.229.01:15:37.96#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.01:15:37.96#ibcon#[27=USB\r\n] 2006.229.01:15:37.96#ibcon#*before write, iclass 18, count 0 2006.229.01:15:37.96#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:37.96#ibcon#flushed, iclass 18, count 0 2006.229.01:15:37.96#ibcon#about to write, iclass 18, count 0 2006.229.01:15:37.96#ibcon#wrote, iclass 18, count 0 2006.229.01:15:37.96#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:37.99#ibcon#read 3, iclass 18, count 0 2006.229.01:15:37.99#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:37.99#ibcon#read 4, iclass 18, count 0 2006.229.01:15:37.99#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:37.99#ibcon#read 5, iclass 18, count 0 2006.229.01:15:37.99#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:37.99#ibcon#read 6, iclass 18, count 0 2006.229.01:15:37.99#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:37.99#ibcon#*after write, iclass 18, count 0 2006.229.01:15:37.99#ibcon#*before return 0, iclass 18, count 0 2006.229.01:15:37.99#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:37.99#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.01:15:37.99#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.01:15:37.99#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.01:15:37.99$vck44/vblo=5,709.99 2006.229.01:15:37.99#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.01:15:37.99#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:37.99#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:37.99#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:37.99#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:37.99#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:37.99#ibcon#enter wrdev, iclass 20, count 0 2006.229.01:15:37.99#ibcon#first serial, iclass 20, count 0 2006.229.01:15:37.99#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:37.99#ibcon#flushed, iclass 20, count 0 2006.229.01:15:37.99#ibcon#about to write, iclass 20, count 0 2006.229.01:15:37.99#ibcon#wrote, iclass 20, count 0 2006.229.01:15:37.99#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:38.01#ibcon#read 3, iclass 20, count 0 2006.229.01:15:38.01#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:38.01#ibcon#read 4, iclass 20, count 0 2006.229.01:15:38.01#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:38.01#ibcon#read 5, iclass 20, count 0 2006.229.01:15:38.01#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:38.01#ibcon#read 6, iclass 20, count 0 2006.229.01:15:38.01#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:38.01#ibcon#*mode == 0, iclass 20, count 0 2006.229.01:15:38.01#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.01:15:38.01#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.01:15:38.01#ibcon#*before write, iclass 20, count 0 2006.229.01:15:38.01#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:38.01#ibcon#flushed, iclass 20, count 0 2006.229.01:15:38.01#ibcon#about to write, iclass 20, count 0 2006.229.01:15:38.01#ibcon#wrote, iclass 20, count 0 2006.229.01:15:38.01#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:38.05#ibcon#read 3, iclass 20, count 0 2006.229.01:15:38.05#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:38.05#ibcon#read 4, iclass 20, count 0 2006.229.01:15:38.05#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:38.05#ibcon#read 5, iclass 20, count 0 2006.229.01:15:38.05#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:38.05#ibcon#read 6, iclass 20, count 0 2006.229.01:15:38.05#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:38.05#ibcon#*after write, iclass 20, count 0 2006.229.01:15:38.05#ibcon#*before return 0, iclass 20, count 0 2006.229.01:15:38.05#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:38.05#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.01:15:38.05#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.01:15:38.05#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.01:15:38.05$vck44/vb=5,4 2006.229.01:15:38.05#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.01:15:38.05#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.01:15:38.05#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:38.05#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:38.11#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:38.11#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:38.11#ibcon#enter wrdev, iclass 22, count 2 2006.229.01:15:38.11#ibcon#first serial, iclass 22, count 2 2006.229.01:15:38.11#ibcon#enter sib2, iclass 22, count 2 2006.229.01:15:38.11#ibcon#flushed, iclass 22, count 2 2006.229.01:15:38.11#ibcon#about to write, iclass 22, count 2 2006.229.01:15:38.11#ibcon#wrote, iclass 22, count 2 2006.229.01:15:38.11#ibcon#about to read 3, iclass 22, count 2 2006.229.01:15:38.13#ibcon#read 3, iclass 22, count 2 2006.229.01:15:38.13#ibcon#about to read 4, iclass 22, count 2 2006.229.01:15:38.13#ibcon#read 4, iclass 22, count 2 2006.229.01:15:38.13#ibcon#about to read 5, iclass 22, count 2 2006.229.01:15:38.13#ibcon#read 5, iclass 22, count 2 2006.229.01:15:38.13#ibcon#about to read 6, iclass 22, count 2 2006.229.01:15:38.13#ibcon#read 6, iclass 22, count 2 2006.229.01:15:38.13#ibcon#end of sib2, iclass 22, count 2 2006.229.01:15:38.13#ibcon#*mode == 0, iclass 22, count 2 2006.229.01:15:38.13#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.01:15:38.13#ibcon#[27=AT05-04\r\n] 2006.229.01:15:38.13#ibcon#*before write, iclass 22, count 2 2006.229.01:15:38.13#ibcon#enter sib2, iclass 22, count 2 2006.229.01:15:38.13#ibcon#flushed, iclass 22, count 2 2006.229.01:15:38.13#ibcon#about to write, iclass 22, count 2 2006.229.01:15:38.13#ibcon#wrote, iclass 22, count 2 2006.229.01:15:38.13#ibcon#about to read 3, iclass 22, count 2 2006.229.01:15:38.16#ibcon#read 3, iclass 22, count 2 2006.229.01:15:38.16#ibcon#about to read 4, iclass 22, count 2 2006.229.01:15:38.16#ibcon#read 4, iclass 22, count 2 2006.229.01:15:38.16#ibcon#about to read 5, iclass 22, count 2 2006.229.01:15:38.16#ibcon#read 5, iclass 22, count 2 2006.229.01:15:38.16#ibcon#about to read 6, iclass 22, count 2 2006.229.01:15:38.16#ibcon#read 6, iclass 22, count 2 2006.229.01:15:38.16#ibcon#end of sib2, iclass 22, count 2 2006.229.01:15:38.16#ibcon#*after write, iclass 22, count 2 2006.229.01:15:38.16#ibcon#*before return 0, iclass 22, count 2 2006.229.01:15:38.16#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:38.16#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:38.16#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.01:15:38.16#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:38.16#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:38.28#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:38.28#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:38.28#ibcon#enter wrdev, iclass 22, count 0 2006.229.01:15:38.28#ibcon#first serial, iclass 22, count 0 2006.229.01:15:38.28#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:38.28#ibcon#flushed, iclass 22, count 0 2006.229.01:15:38.28#ibcon#about to write, iclass 22, count 0 2006.229.01:15:38.28#ibcon#wrote, iclass 22, count 0 2006.229.01:15:38.28#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:38.30#ibcon#read 3, iclass 22, count 0 2006.229.01:15:38.30#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:38.30#ibcon#read 4, iclass 22, count 0 2006.229.01:15:38.30#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:38.30#ibcon#read 5, iclass 22, count 0 2006.229.01:15:38.30#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:38.30#ibcon#read 6, iclass 22, count 0 2006.229.01:15:38.30#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:38.30#ibcon#*mode == 0, iclass 22, count 0 2006.229.01:15:38.30#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.01:15:38.30#ibcon#[27=USB\r\n] 2006.229.01:15:38.30#ibcon#*before write, iclass 22, count 0 2006.229.01:15:38.30#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:38.30#ibcon#flushed, iclass 22, count 0 2006.229.01:15:38.30#ibcon#about to write, iclass 22, count 0 2006.229.01:15:38.30#ibcon#wrote, iclass 22, count 0 2006.229.01:15:38.30#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:38.33#ibcon#read 3, iclass 22, count 0 2006.229.01:15:38.33#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:38.33#ibcon#read 4, iclass 22, count 0 2006.229.01:15:38.33#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:38.33#ibcon#read 5, iclass 22, count 0 2006.229.01:15:38.33#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:38.33#ibcon#read 6, iclass 22, count 0 2006.229.01:15:38.33#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:38.33#ibcon#*after write, iclass 22, count 0 2006.229.01:15:38.33#ibcon#*before return 0, iclass 22, count 0 2006.229.01:15:38.33#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:38.33#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.01:15:38.33#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.01:15:38.33#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.01:15:38.33$vck44/vblo=6,719.99 2006.229.01:15:38.33#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.01:15:38.33#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:38.33#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:38.33#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:38.33#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:38.33#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:38.33#ibcon#enter wrdev, iclass 24, count 0 2006.229.01:15:38.33#ibcon#first serial, iclass 24, count 0 2006.229.01:15:38.33#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:38.33#ibcon#flushed, iclass 24, count 0 2006.229.01:15:38.33#ibcon#about to write, iclass 24, count 0 2006.229.01:15:38.33#ibcon#wrote, iclass 24, count 0 2006.229.01:15:38.33#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:38.35#ibcon#read 3, iclass 24, count 0 2006.229.01:15:38.35#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:38.35#ibcon#read 4, iclass 24, count 0 2006.229.01:15:38.35#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:38.35#ibcon#read 5, iclass 24, count 0 2006.229.01:15:38.35#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:38.35#ibcon#read 6, iclass 24, count 0 2006.229.01:15:38.35#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:38.35#ibcon#*mode == 0, iclass 24, count 0 2006.229.01:15:38.35#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.01:15:38.35#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.01:15:38.35#ibcon#*before write, iclass 24, count 0 2006.229.01:15:38.35#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:38.35#ibcon#flushed, iclass 24, count 0 2006.229.01:15:38.35#ibcon#about to write, iclass 24, count 0 2006.229.01:15:38.35#ibcon#wrote, iclass 24, count 0 2006.229.01:15:38.35#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:38.39#ibcon#read 3, iclass 24, count 0 2006.229.01:15:38.39#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:38.39#ibcon#read 4, iclass 24, count 0 2006.229.01:15:38.39#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:38.39#ibcon#read 5, iclass 24, count 0 2006.229.01:15:38.39#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:38.39#ibcon#read 6, iclass 24, count 0 2006.229.01:15:38.39#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:38.39#ibcon#*after write, iclass 24, count 0 2006.229.01:15:38.39#ibcon#*before return 0, iclass 24, count 0 2006.229.01:15:38.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:38.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.01:15:38.39#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.01:15:38.39#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.01:15:38.39$vck44/vb=6,4 2006.229.01:15:38.39#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.01:15:38.39#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.01:15:38.39#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:38.39#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:38.45#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:38.45#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:38.45#ibcon#enter wrdev, iclass 26, count 2 2006.229.01:15:38.45#ibcon#first serial, iclass 26, count 2 2006.229.01:15:38.45#ibcon#enter sib2, iclass 26, count 2 2006.229.01:15:38.45#ibcon#flushed, iclass 26, count 2 2006.229.01:15:38.45#ibcon#about to write, iclass 26, count 2 2006.229.01:15:38.45#ibcon#wrote, iclass 26, count 2 2006.229.01:15:38.45#ibcon#about to read 3, iclass 26, count 2 2006.229.01:15:38.47#ibcon#read 3, iclass 26, count 2 2006.229.01:15:38.47#ibcon#about to read 4, iclass 26, count 2 2006.229.01:15:38.47#ibcon#read 4, iclass 26, count 2 2006.229.01:15:38.47#ibcon#about to read 5, iclass 26, count 2 2006.229.01:15:38.47#ibcon#read 5, iclass 26, count 2 2006.229.01:15:38.47#ibcon#about to read 6, iclass 26, count 2 2006.229.01:15:38.47#ibcon#read 6, iclass 26, count 2 2006.229.01:15:38.47#ibcon#end of sib2, iclass 26, count 2 2006.229.01:15:38.47#ibcon#*mode == 0, iclass 26, count 2 2006.229.01:15:38.47#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.01:15:38.47#ibcon#[27=AT06-04\r\n] 2006.229.01:15:38.47#ibcon#*before write, iclass 26, count 2 2006.229.01:15:38.47#ibcon#enter sib2, iclass 26, count 2 2006.229.01:15:38.47#ibcon#flushed, iclass 26, count 2 2006.229.01:15:38.47#ibcon#about to write, iclass 26, count 2 2006.229.01:15:38.47#ibcon#wrote, iclass 26, count 2 2006.229.01:15:38.47#ibcon#about to read 3, iclass 26, count 2 2006.229.01:15:38.50#ibcon#read 3, iclass 26, count 2 2006.229.01:15:38.50#ibcon#about to read 4, iclass 26, count 2 2006.229.01:15:38.50#ibcon#read 4, iclass 26, count 2 2006.229.01:15:38.50#ibcon#about to read 5, iclass 26, count 2 2006.229.01:15:38.50#ibcon#read 5, iclass 26, count 2 2006.229.01:15:38.50#ibcon#about to read 6, iclass 26, count 2 2006.229.01:15:38.50#ibcon#read 6, iclass 26, count 2 2006.229.01:15:38.50#ibcon#end of sib2, iclass 26, count 2 2006.229.01:15:38.50#ibcon#*after write, iclass 26, count 2 2006.229.01:15:38.50#ibcon#*before return 0, iclass 26, count 2 2006.229.01:15:38.50#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:38.50#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:38.50#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.01:15:38.50#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:38.50#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:38.62#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:38.62#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:38.62#ibcon#enter wrdev, iclass 26, count 0 2006.229.01:15:38.62#ibcon#first serial, iclass 26, count 0 2006.229.01:15:38.62#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:38.62#ibcon#flushed, iclass 26, count 0 2006.229.01:15:38.62#ibcon#about to write, iclass 26, count 0 2006.229.01:15:38.62#ibcon#wrote, iclass 26, count 0 2006.229.01:15:38.62#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:38.64#ibcon#read 3, iclass 26, count 0 2006.229.01:15:38.64#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:38.64#ibcon#read 4, iclass 26, count 0 2006.229.01:15:38.64#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:38.64#ibcon#read 5, iclass 26, count 0 2006.229.01:15:38.64#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:38.64#ibcon#read 6, iclass 26, count 0 2006.229.01:15:38.64#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:38.64#ibcon#*mode == 0, iclass 26, count 0 2006.229.01:15:38.64#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.01:15:38.64#ibcon#[27=USB\r\n] 2006.229.01:15:38.64#ibcon#*before write, iclass 26, count 0 2006.229.01:15:38.64#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:38.64#ibcon#flushed, iclass 26, count 0 2006.229.01:15:38.64#ibcon#about to write, iclass 26, count 0 2006.229.01:15:38.64#ibcon#wrote, iclass 26, count 0 2006.229.01:15:38.64#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:38.67#ibcon#read 3, iclass 26, count 0 2006.229.01:15:38.67#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:38.67#ibcon#read 4, iclass 26, count 0 2006.229.01:15:38.67#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:38.67#ibcon#read 5, iclass 26, count 0 2006.229.01:15:38.67#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:38.67#ibcon#read 6, iclass 26, count 0 2006.229.01:15:38.67#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:38.67#ibcon#*after write, iclass 26, count 0 2006.229.01:15:38.67#ibcon#*before return 0, iclass 26, count 0 2006.229.01:15:38.67#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:38.67#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.01:15:38.67#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.01:15:38.67#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.01:15:38.67$vck44/vblo=7,734.99 2006.229.01:15:38.67#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.01:15:38.67#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:38.67#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:38.67#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:38.67#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:38.67#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:38.67#ibcon#enter wrdev, iclass 28, count 0 2006.229.01:15:38.67#ibcon#first serial, iclass 28, count 0 2006.229.01:15:38.67#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:38.67#ibcon#flushed, iclass 28, count 0 2006.229.01:15:38.67#ibcon#about to write, iclass 28, count 0 2006.229.01:15:38.67#ibcon#wrote, iclass 28, count 0 2006.229.01:15:38.67#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:38.69#ibcon#read 3, iclass 28, count 0 2006.229.01:15:38.69#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:38.69#ibcon#read 4, iclass 28, count 0 2006.229.01:15:38.69#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:38.69#ibcon#read 5, iclass 28, count 0 2006.229.01:15:38.69#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:38.69#ibcon#read 6, iclass 28, count 0 2006.229.01:15:38.69#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:38.69#ibcon#*mode == 0, iclass 28, count 0 2006.229.01:15:38.69#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.01:15:38.69#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.01:15:38.69#ibcon#*before write, iclass 28, count 0 2006.229.01:15:38.69#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:38.69#ibcon#flushed, iclass 28, count 0 2006.229.01:15:38.69#ibcon#about to write, iclass 28, count 0 2006.229.01:15:38.69#ibcon#wrote, iclass 28, count 0 2006.229.01:15:38.69#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:38.73#ibcon#read 3, iclass 28, count 0 2006.229.01:15:38.73#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:38.73#ibcon#read 4, iclass 28, count 0 2006.229.01:15:38.73#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:38.73#ibcon#read 5, iclass 28, count 0 2006.229.01:15:38.73#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:38.73#ibcon#read 6, iclass 28, count 0 2006.229.01:15:38.73#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:38.73#ibcon#*after write, iclass 28, count 0 2006.229.01:15:38.73#ibcon#*before return 0, iclass 28, count 0 2006.229.01:15:38.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:38.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:38.73#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.01:15:38.73#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.01:15:38.73$vck44/vb=7,4 2006.229.01:15:38.73#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.01:15:38.73#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.01:15:38.73#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:38.73#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:38.79#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:38.79#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:38.79#ibcon#enter wrdev, iclass 30, count 2 2006.229.01:15:38.79#ibcon#first serial, iclass 30, count 2 2006.229.01:15:38.79#ibcon#enter sib2, iclass 30, count 2 2006.229.01:15:38.79#ibcon#flushed, iclass 30, count 2 2006.229.01:15:38.79#ibcon#about to write, iclass 30, count 2 2006.229.01:15:38.79#ibcon#wrote, iclass 30, count 2 2006.229.01:15:38.79#ibcon#about to read 3, iclass 30, count 2 2006.229.01:15:38.81#ibcon#read 3, iclass 30, count 2 2006.229.01:15:38.81#ibcon#about to read 4, iclass 30, count 2 2006.229.01:15:38.81#ibcon#read 4, iclass 30, count 2 2006.229.01:15:38.81#ibcon#about to read 5, iclass 30, count 2 2006.229.01:15:38.81#ibcon#read 5, iclass 30, count 2 2006.229.01:15:38.81#ibcon#about to read 6, iclass 30, count 2 2006.229.01:15:38.81#ibcon#read 6, iclass 30, count 2 2006.229.01:15:38.81#ibcon#end of sib2, iclass 30, count 2 2006.229.01:15:38.81#ibcon#*mode == 0, iclass 30, count 2 2006.229.01:15:38.81#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.01:15:38.81#ibcon#[27=AT07-04\r\n] 2006.229.01:15:38.81#ibcon#*before write, iclass 30, count 2 2006.229.01:15:38.81#ibcon#enter sib2, iclass 30, count 2 2006.229.01:15:38.81#ibcon#flushed, iclass 30, count 2 2006.229.01:15:38.81#ibcon#about to write, iclass 30, count 2 2006.229.01:15:38.81#ibcon#wrote, iclass 30, count 2 2006.229.01:15:38.81#ibcon#about to read 3, iclass 30, count 2 2006.229.01:15:38.84#ibcon#read 3, iclass 30, count 2 2006.229.01:15:38.84#ibcon#about to read 4, iclass 30, count 2 2006.229.01:15:38.84#ibcon#read 4, iclass 30, count 2 2006.229.01:15:38.84#ibcon#about to read 5, iclass 30, count 2 2006.229.01:15:38.84#ibcon#read 5, iclass 30, count 2 2006.229.01:15:38.84#ibcon#about to read 6, iclass 30, count 2 2006.229.01:15:38.84#ibcon#read 6, iclass 30, count 2 2006.229.01:15:38.84#ibcon#end of sib2, iclass 30, count 2 2006.229.01:15:38.84#ibcon#*after write, iclass 30, count 2 2006.229.01:15:38.84#ibcon#*before return 0, iclass 30, count 2 2006.229.01:15:38.84#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:38.84#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:38.84#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.01:15:38.84#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:38.84#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:38.96#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:38.96#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:38.96#ibcon#enter wrdev, iclass 30, count 0 2006.229.01:15:38.96#ibcon#first serial, iclass 30, count 0 2006.229.01:15:38.96#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:38.96#ibcon#flushed, iclass 30, count 0 2006.229.01:15:38.96#ibcon#about to write, iclass 30, count 0 2006.229.01:15:38.96#ibcon#wrote, iclass 30, count 0 2006.229.01:15:38.96#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:38.98#ibcon#read 3, iclass 30, count 0 2006.229.01:15:38.98#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:38.98#ibcon#read 4, iclass 30, count 0 2006.229.01:15:38.98#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:38.98#ibcon#read 5, iclass 30, count 0 2006.229.01:15:38.98#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:38.98#ibcon#read 6, iclass 30, count 0 2006.229.01:15:38.98#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:38.98#ibcon#*mode == 0, iclass 30, count 0 2006.229.01:15:38.98#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.01:15:38.98#ibcon#[27=USB\r\n] 2006.229.01:15:38.98#ibcon#*before write, iclass 30, count 0 2006.229.01:15:38.98#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:38.98#ibcon#flushed, iclass 30, count 0 2006.229.01:15:38.98#ibcon#about to write, iclass 30, count 0 2006.229.01:15:38.98#ibcon#wrote, iclass 30, count 0 2006.229.01:15:38.98#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:39.01#ibcon#read 3, iclass 30, count 0 2006.229.01:15:39.01#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:39.01#ibcon#read 4, iclass 30, count 0 2006.229.01:15:39.01#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:39.01#ibcon#read 5, iclass 30, count 0 2006.229.01:15:39.01#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:39.01#ibcon#read 6, iclass 30, count 0 2006.229.01:15:39.01#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:39.01#ibcon#*after write, iclass 30, count 0 2006.229.01:15:39.01#ibcon#*before return 0, iclass 30, count 0 2006.229.01:15:39.01#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:39.01#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.01:15:39.01#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.01:15:39.01#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.01:15:39.01$vck44/vblo=8,744.99 2006.229.01:15:39.01#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.01:15:39.01#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:39.01#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:39.01#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:39.01#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:39.01#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:39.01#ibcon#enter wrdev, iclass 32, count 0 2006.229.01:15:39.01#ibcon#first serial, iclass 32, count 0 2006.229.01:15:39.01#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:39.01#ibcon#flushed, iclass 32, count 0 2006.229.01:15:39.01#ibcon#about to write, iclass 32, count 0 2006.229.01:15:39.01#ibcon#wrote, iclass 32, count 0 2006.229.01:15:39.01#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:39.03#ibcon#read 3, iclass 32, count 0 2006.229.01:15:39.03#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:39.03#ibcon#read 4, iclass 32, count 0 2006.229.01:15:39.03#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:39.03#ibcon#read 5, iclass 32, count 0 2006.229.01:15:39.03#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:39.03#ibcon#read 6, iclass 32, count 0 2006.229.01:15:39.03#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:39.03#ibcon#*mode == 0, iclass 32, count 0 2006.229.01:15:39.03#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.01:15:39.03#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.01:15:39.03#ibcon#*before write, iclass 32, count 0 2006.229.01:15:39.03#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:39.03#ibcon#flushed, iclass 32, count 0 2006.229.01:15:39.03#ibcon#about to write, iclass 32, count 0 2006.229.01:15:39.03#ibcon#wrote, iclass 32, count 0 2006.229.01:15:39.03#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:39.07#ibcon#read 3, iclass 32, count 0 2006.229.01:15:39.07#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:39.07#ibcon#read 4, iclass 32, count 0 2006.229.01:15:39.07#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:39.07#ibcon#read 5, iclass 32, count 0 2006.229.01:15:39.07#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:39.07#ibcon#read 6, iclass 32, count 0 2006.229.01:15:39.07#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:39.07#ibcon#*after write, iclass 32, count 0 2006.229.01:15:39.07#ibcon#*before return 0, iclass 32, count 0 2006.229.01:15:39.07#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:39.07#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.01:15:39.07#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.01:15:39.07#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.01:15:39.07$vck44/vb=8,4 2006.229.01:15:39.07#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.01:15:39.07#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.01:15:39.07#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:39.07#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:39.13#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:39.13#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:39.13#ibcon#enter wrdev, iclass 34, count 2 2006.229.01:15:39.13#ibcon#first serial, iclass 34, count 2 2006.229.01:15:39.13#ibcon#enter sib2, iclass 34, count 2 2006.229.01:15:39.13#ibcon#flushed, iclass 34, count 2 2006.229.01:15:39.13#ibcon#about to write, iclass 34, count 2 2006.229.01:15:39.13#ibcon#wrote, iclass 34, count 2 2006.229.01:15:39.13#ibcon#about to read 3, iclass 34, count 2 2006.229.01:15:39.15#ibcon#read 3, iclass 34, count 2 2006.229.01:15:39.15#ibcon#about to read 4, iclass 34, count 2 2006.229.01:15:39.15#ibcon#read 4, iclass 34, count 2 2006.229.01:15:39.15#ibcon#about to read 5, iclass 34, count 2 2006.229.01:15:39.15#ibcon#read 5, iclass 34, count 2 2006.229.01:15:39.15#ibcon#about to read 6, iclass 34, count 2 2006.229.01:15:39.15#ibcon#read 6, iclass 34, count 2 2006.229.01:15:39.15#ibcon#end of sib2, iclass 34, count 2 2006.229.01:15:39.15#ibcon#*mode == 0, iclass 34, count 2 2006.229.01:15:39.15#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.01:15:39.15#ibcon#[27=AT08-04\r\n] 2006.229.01:15:39.15#ibcon#*before write, iclass 34, count 2 2006.229.01:15:39.15#ibcon#enter sib2, iclass 34, count 2 2006.229.01:15:39.15#ibcon#flushed, iclass 34, count 2 2006.229.01:15:39.15#ibcon#about to write, iclass 34, count 2 2006.229.01:15:39.15#ibcon#wrote, iclass 34, count 2 2006.229.01:15:39.15#ibcon#about to read 3, iclass 34, count 2 2006.229.01:15:39.18#ibcon#read 3, iclass 34, count 2 2006.229.01:15:39.18#ibcon#about to read 4, iclass 34, count 2 2006.229.01:15:39.18#ibcon#read 4, iclass 34, count 2 2006.229.01:15:39.18#ibcon#about to read 5, iclass 34, count 2 2006.229.01:15:39.18#ibcon#read 5, iclass 34, count 2 2006.229.01:15:39.18#ibcon#about to read 6, iclass 34, count 2 2006.229.01:15:39.18#ibcon#read 6, iclass 34, count 2 2006.229.01:15:39.18#ibcon#end of sib2, iclass 34, count 2 2006.229.01:15:39.18#ibcon#*after write, iclass 34, count 2 2006.229.01:15:39.18#ibcon#*before return 0, iclass 34, count 2 2006.229.01:15:39.18#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:39.18#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:39.18#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.01:15:39.18#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:39.18#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:39.30#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:39.30#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:39.30#ibcon#enter wrdev, iclass 34, count 0 2006.229.01:15:39.30#ibcon#first serial, iclass 34, count 0 2006.229.01:15:39.30#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:39.30#ibcon#flushed, iclass 34, count 0 2006.229.01:15:39.30#ibcon#about to write, iclass 34, count 0 2006.229.01:15:39.30#ibcon#wrote, iclass 34, count 0 2006.229.01:15:39.30#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:39.32#ibcon#read 3, iclass 34, count 0 2006.229.01:15:39.32#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:39.32#ibcon#read 4, iclass 34, count 0 2006.229.01:15:39.32#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:39.32#ibcon#read 5, iclass 34, count 0 2006.229.01:15:39.32#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:39.32#ibcon#read 6, iclass 34, count 0 2006.229.01:15:39.32#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:39.32#ibcon#*mode == 0, iclass 34, count 0 2006.229.01:15:39.32#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.01:15:39.32#ibcon#[27=USB\r\n] 2006.229.01:15:39.32#ibcon#*before write, iclass 34, count 0 2006.229.01:15:39.32#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:39.32#ibcon#flushed, iclass 34, count 0 2006.229.01:15:39.32#ibcon#about to write, iclass 34, count 0 2006.229.01:15:39.32#ibcon#wrote, iclass 34, count 0 2006.229.01:15:39.32#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:39.35#ibcon#read 3, iclass 34, count 0 2006.229.01:15:39.35#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:39.35#ibcon#read 4, iclass 34, count 0 2006.229.01:15:39.35#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:39.35#ibcon#read 5, iclass 34, count 0 2006.229.01:15:39.35#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:39.35#ibcon#read 6, iclass 34, count 0 2006.229.01:15:39.35#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:39.35#ibcon#*after write, iclass 34, count 0 2006.229.01:15:39.35#ibcon#*before return 0, iclass 34, count 0 2006.229.01:15:39.35#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:39.35#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.01:15:39.35#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.01:15:39.35#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.01:15:39.35$vck44/vabw=wide 2006.229.01:15:39.35#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.01:15:39.35#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:39.35#ibcon#ireg 8 cls_cnt 0 2006.229.01:15:39.35#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:39.35#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:39.35#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:39.35#ibcon#enter wrdev, iclass 36, count 0 2006.229.01:15:39.35#ibcon#first serial, iclass 36, count 0 2006.229.01:15:39.35#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:39.35#ibcon#flushed, iclass 36, count 0 2006.229.01:15:39.35#ibcon#about to write, iclass 36, count 0 2006.229.01:15:39.35#ibcon#wrote, iclass 36, count 0 2006.229.01:15:39.35#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:39.37#ibcon#read 3, iclass 36, count 0 2006.229.01:15:39.37#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:39.37#ibcon#read 4, iclass 36, count 0 2006.229.01:15:39.37#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:39.37#ibcon#read 5, iclass 36, count 0 2006.229.01:15:39.37#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:39.37#ibcon#read 6, iclass 36, count 0 2006.229.01:15:39.37#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:39.37#ibcon#*mode == 0, iclass 36, count 0 2006.229.01:15:39.37#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.01:15:39.37#ibcon#[25=BW32\r\n] 2006.229.01:15:39.37#ibcon#*before write, iclass 36, count 0 2006.229.01:15:39.37#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:39.37#ibcon#flushed, iclass 36, count 0 2006.229.01:15:39.37#ibcon#about to write, iclass 36, count 0 2006.229.01:15:39.37#ibcon#wrote, iclass 36, count 0 2006.229.01:15:39.37#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:39.40#ibcon#read 3, iclass 36, count 0 2006.229.01:15:39.40#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:39.40#ibcon#read 4, iclass 36, count 0 2006.229.01:15:39.40#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:39.40#ibcon#read 5, iclass 36, count 0 2006.229.01:15:39.40#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:39.40#ibcon#read 6, iclass 36, count 0 2006.229.01:15:39.40#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:39.40#ibcon#*after write, iclass 36, count 0 2006.229.01:15:39.40#ibcon#*before return 0, iclass 36, count 0 2006.229.01:15:39.40#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:39.40#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.01:15:39.40#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.01:15:39.40#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.01:15:39.40$vck44/vbbw=wide 2006.229.01:15:39.40#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.01:15:39.40#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:39.40#ibcon#ireg 8 cls_cnt 0 2006.229.01:15:39.40#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:39.47#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:39.47#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:39.47#ibcon#enter wrdev, iclass 38, count 0 2006.229.01:15:39.47#ibcon#first serial, iclass 38, count 0 2006.229.01:15:39.47#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:39.47#ibcon#flushed, iclass 38, count 0 2006.229.01:15:39.47#ibcon#about to write, iclass 38, count 0 2006.229.01:15:39.47#ibcon#wrote, iclass 38, count 0 2006.229.01:15:39.47#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:39.49#ibcon#read 3, iclass 38, count 0 2006.229.01:15:39.49#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:39.49#ibcon#read 4, iclass 38, count 0 2006.229.01:15:39.49#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:39.49#ibcon#read 5, iclass 38, count 0 2006.229.01:15:39.49#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:39.49#ibcon#read 6, iclass 38, count 0 2006.229.01:15:39.49#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:39.49#ibcon#*mode == 0, iclass 38, count 0 2006.229.01:15:39.49#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.01:15:39.49#ibcon#[27=BW32\r\n] 2006.229.01:15:39.49#ibcon#*before write, iclass 38, count 0 2006.229.01:15:39.49#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:39.49#ibcon#flushed, iclass 38, count 0 2006.229.01:15:39.49#ibcon#about to write, iclass 38, count 0 2006.229.01:15:39.49#ibcon#wrote, iclass 38, count 0 2006.229.01:15:39.49#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:39.52#ibcon#read 3, iclass 38, count 0 2006.229.01:15:39.52#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:39.52#ibcon#read 4, iclass 38, count 0 2006.229.01:15:39.52#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:39.52#ibcon#read 5, iclass 38, count 0 2006.229.01:15:39.52#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:39.52#ibcon#read 6, iclass 38, count 0 2006.229.01:15:39.52#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:39.52#ibcon#*after write, iclass 38, count 0 2006.229.01:15:39.52#ibcon#*before return 0, iclass 38, count 0 2006.229.01:15:39.52#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:39.52#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:39.52#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.01:15:39.52#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.01:15:39.52$setupk4/ifdk4 2006.229.01:15:39.52&ifdk4/lo= 2006.229.01:15:39.52&ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.01:15:39.52&ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.01:15:39.52&ifdk4/patch= 2006.229.01:15:39.52&ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.01:15:39.52&ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.01:15:39.52$ifdk4/lo= 2006.229.01:15:39.52$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.01:15:39.52$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.01:15:39.52$ifdk4/patch= 2006.229.01:15:39.52$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.01:15:39.52$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.01:15:39.52$setupk4/!*+20s 2006.229.01:15:39.52$exper_initi/proc_library 2006.229.01:15:39.52&proc_library/" jd0608 tsukub32 ts 2006.229.01:15:39.52&proc_library/" drudg version 050216 compiled under fs 9.7.7 2006.229.01:15:39.52&proc_library/"< k4-2/m4 rack >< k4-2 recorder 1> 2006.229.01:15:39.52$proc_library/" jd0608 tsukub32 ts 2006.229.01:15:39.52$proc_library/" drudg version 050216 compiled under fs 9.7.7 2006.229.01:15:39.52$proc_library/"< k4-2/m4 rack >< k4-2 recorder 1> 2006.229.01:15:39.52$exper_initi/sched_initi 2006.229.01:15:39.52&sched_initi/startcheck 2006.229.01:15:39.52$sched_initi/startcheck 2006.229.01:15:39.52&startcheck/sy=check_fsrun.pl & 2006.229.01:15:39.52&startcheck/" sy=/usr2/oper/temp/chmem.sh >& /dev/null & 2006.229.01:15:39.52$startcheck/sy=check_fsrun.pl & 2006.229.01:15:39.62$startcheck/" sy=/usr2/oper/temp/chmem.sh >& /dev/null & 2006.229.01:15:43.14#trakl#Source acquired 2006.229.01:15:44.54#abcon#<5=/04 2.3 4.0 29.67 941001.5\r\n> 2006.229.01:15:44.56#abcon#{5=INTERFACE CLEAR} 2006.229.01:15:44.64#abcon#[5=S1D000X0/0*\r\n] 2006.229.01:15:45.14#flagr#flagr/antenna,acquired 2006.229.01:15:53.96$setupk4/"tpicd 2006.229.01:15:53.96$setupk4/echo=off 2006.229.01:15:53.96$setupk4/xlog=off 2006.229.01:15:53.96:"ready=1 2006.229.01:15:53.96:setupk4=1 2006.229.01:15:53.96$setupk4/echo=on 2006.229.01:15:53.96$setupk4/pcalon 2006.229.01:15:53.96$pcalon/"no phase cal control is implemented here 2006.229.01:15:53.96$setupk4/"tpicd=stop 2006.229.01:15:53.96$setupk4/"rec=synch_on 2006.229.01:15:53.96$setupk4/"rec_mode=128 2006.229.01:15:53.96$setupk4/!* 2006.229.01:15:53.96$setupk4/recpk4 2006.229.01:15:53.96$recpk4/recpatch= 2006.229.01:15:53.96$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.01:15:53.96$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.01:15:53.96$setupk4/vck44 2006.229.01:15:53.96$vck44/valo=1,524.99 2006.229.01:15:53.96#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.01:15:53.96#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:53.96#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:53.96#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:53.96#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:53.96#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:53.96#ibcon#enter wrdev, iclass 30, count 0 2006.229.01:15:53.96#ibcon#first serial, iclass 30, count 0 2006.229.01:15:53.96#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:53.96#ibcon#flushed, iclass 30, count 0 2006.229.01:15:53.96#ibcon#about to write, iclass 30, count 0 2006.229.01:15:53.96#ibcon#wrote, iclass 30, count 0 2006.229.01:15:53.96#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:53.98#ibcon#read 3, iclass 30, count 0 2006.229.01:15:53.98#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:53.98#ibcon#read 4, iclass 30, count 0 2006.229.01:15:53.98#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:53.98#ibcon#read 5, iclass 30, count 0 2006.229.01:15:53.98#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:53.98#ibcon#read 6, iclass 30, count 0 2006.229.01:15:53.98#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:53.98#ibcon#*mode == 0, iclass 30, count 0 2006.229.01:15:53.98#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.01:15:53.98#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.01:15:53.98#ibcon#*before write, iclass 30, count 0 2006.229.01:15:53.98#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:53.98#ibcon#flushed, iclass 30, count 0 2006.229.01:15:53.98#ibcon#about to write, iclass 30, count 0 2006.229.01:15:53.98#ibcon#wrote, iclass 30, count 0 2006.229.01:15:53.98#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:54.02#ibcon#read 3, iclass 30, count 0 2006.229.01:15:54.02#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:54.02#ibcon#read 4, iclass 30, count 0 2006.229.01:15:54.02#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:54.02#ibcon#read 5, iclass 30, count 0 2006.229.01:15:54.02#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:54.02#ibcon#read 6, iclass 30, count 0 2006.229.01:15:54.02#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:54.02#ibcon#*after write, iclass 30, count 0 2006.229.01:15:54.02#ibcon#*before return 0, iclass 30, count 0 2006.229.01:15:54.02#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:54.02#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:54.02#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.01:15:54.02#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.01:15:54.03$vck44/va=1,8 2006.229.01:15:54.03#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.01:15:54.03#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.01:15:54.03#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:54.03#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:54.03#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:54.03#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:54.03#ibcon#enter wrdev, iclass 32, count 2 2006.229.01:15:54.03#ibcon#first serial, iclass 32, count 2 2006.229.01:15:54.03#ibcon#enter sib2, iclass 32, count 2 2006.229.01:15:54.03#ibcon#flushed, iclass 32, count 2 2006.229.01:15:54.03#ibcon#about to write, iclass 32, count 2 2006.229.01:15:54.03#ibcon#wrote, iclass 32, count 2 2006.229.01:15:54.03#ibcon#about to read 3, iclass 32, count 2 2006.229.01:15:54.05#ibcon#read 3, iclass 32, count 2 2006.229.01:15:54.05#ibcon#about to read 4, iclass 32, count 2 2006.229.01:15:54.05#ibcon#read 4, iclass 32, count 2 2006.229.01:15:54.05#ibcon#about to read 5, iclass 32, count 2 2006.229.01:15:54.05#ibcon#read 5, iclass 32, count 2 2006.229.01:15:54.05#ibcon#about to read 6, iclass 32, count 2 2006.229.01:15:54.05#ibcon#read 6, iclass 32, count 2 2006.229.01:15:54.05#ibcon#end of sib2, iclass 32, count 2 2006.229.01:15:54.05#ibcon#*mode == 0, iclass 32, count 2 2006.229.01:15:54.05#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.01:15:54.05#ibcon#[25=AT01-08\r\n] 2006.229.01:15:54.05#ibcon#*before write, iclass 32, count 2 2006.229.01:15:54.05#ibcon#enter sib2, iclass 32, count 2 2006.229.01:15:54.05#ibcon#flushed, iclass 32, count 2 2006.229.01:15:54.05#ibcon#about to write, iclass 32, count 2 2006.229.01:15:54.05#ibcon#wrote, iclass 32, count 2 2006.229.01:15:54.05#ibcon#about to read 3, iclass 32, count 2 2006.229.01:15:54.08#ibcon#read 3, iclass 32, count 2 2006.229.01:15:54.08#ibcon#about to read 4, iclass 32, count 2 2006.229.01:15:54.08#ibcon#read 4, iclass 32, count 2 2006.229.01:15:54.08#ibcon#about to read 5, iclass 32, count 2 2006.229.01:15:54.08#ibcon#read 5, iclass 32, count 2 2006.229.01:15:54.08#ibcon#about to read 6, iclass 32, count 2 2006.229.01:15:54.08#ibcon#read 6, iclass 32, count 2 2006.229.01:15:54.08#ibcon#end of sib2, iclass 32, count 2 2006.229.01:15:54.08#ibcon#*after write, iclass 32, count 2 2006.229.01:15:54.08#ibcon#*before return 0, iclass 32, count 2 2006.229.01:15:54.08#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:54.08#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:54.08#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.01:15:54.08#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:54.08#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:54.20#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:54.20#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:54.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.01:15:54.20#ibcon#first serial, iclass 32, count 0 2006.229.01:15:54.20#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:54.20#ibcon#flushed, iclass 32, count 0 2006.229.01:15:54.20#ibcon#about to write, iclass 32, count 0 2006.229.01:15:54.20#ibcon#wrote, iclass 32, count 0 2006.229.01:15:54.20#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:54.22#ibcon#read 3, iclass 32, count 0 2006.229.01:15:54.22#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:54.22#ibcon#read 4, iclass 32, count 0 2006.229.01:15:54.22#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:54.22#ibcon#read 5, iclass 32, count 0 2006.229.01:15:54.22#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:54.22#ibcon#read 6, iclass 32, count 0 2006.229.01:15:54.22#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:54.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.01:15:54.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.01:15:54.22#ibcon#[25=USB\r\n] 2006.229.01:15:54.22#ibcon#*before write, iclass 32, count 0 2006.229.01:15:54.22#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:54.22#ibcon#flushed, iclass 32, count 0 2006.229.01:15:54.22#ibcon#about to write, iclass 32, count 0 2006.229.01:15:54.22#ibcon#wrote, iclass 32, count 0 2006.229.01:15:54.22#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:54.25#ibcon#read 3, iclass 32, count 0 2006.229.01:15:54.25#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:54.25#ibcon#read 4, iclass 32, count 0 2006.229.01:15:54.25#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:54.25#ibcon#read 5, iclass 32, count 0 2006.229.01:15:54.25#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:54.25#ibcon#read 6, iclass 32, count 0 2006.229.01:15:54.25#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:54.25#ibcon#*after write, iclass 32, count 0 2006.229.01:15:54.25#ibcon#*before return 0, iclass 32, count 0 2006.229.01:15:54.25#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:54.25#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:54.25#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.01:15:54.25#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.01:15:54.25$vck44/valo=2,534.99 2006.229.01:15:54.25#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.01:15:54.25#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:54.25#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:54.25#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:54.25#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:54.25#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:54.25#ibcon#enter wrdev, iclass 34, count 0 2006.229.01:15:54.25#ibcon#first serial, iclass 34, count 0 2006.229.01:15:54.25#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:54.25#ibcon#flushed, iclass 34, count 0 2006.229.01:15:54.25#ibcon#about to write, iclass 34, count 0 2006.229.01:15:54.25#ibcon#wrote, iclass 34, count 0 2006.229.01:15:54.25#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:54.27#ibcon#read 3, iclass 34, count 0 2006.229.01:15:54.27#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:54.27#ibcon#read 4, iclass 34, count 0 2006.229.01:15:54.27#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:54.27#ibcon#read 5, iclass 34, count 0 2006.229.01:15:54.27#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:54.27#ibcon#read 6, iclass 34, count 0 2006.229.01:15:54.27#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:54.27#ibcon#*mode == 0, iclass 34, count 0 2006.229.01:15:54.27#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.01:15:54.27#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.01:15:54.27#ibcon#*before write, iclass 34, count 0 2006.229.01:15:54.27#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:54.27#ibcon#flushed, iclass 34, count 0 2006.229.01:15:54.27#ibcon#about to write, iclass 34, count 0 2006.229.01:15:54.27#ibcon#wrote, iclass 34, count 0 2006.229.01:15:54.27#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:54.31#ibcon#read 3, iclass 34, count 0 2006.229.01:15:54.31#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:54.31#ibcon#read 4, iclass 34, count 0 2006.229.01:15:54.31#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:54.31#ibcon#read 5, iclass 34, count 0 2006.229.01:15:54.31#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:54.31#ibcon#read 6, iclass 34, count 0 2006.229.01:15:54.31#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:54.31#ibcon#*after write, iclass 34, count 0 2006.229.01:15:54.31#ibcon#*before return 0, iclass 34, count 0 2006.229.01:15:54.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:54.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:54.31#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.01:15:54.31#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.01:15:54.31$vck44/va=2,7 2006.229.01:15:54.31#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.01:15:54.31#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.01:15:54.31#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:54.31#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:54.37#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:54.37#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:54.37#ibcon#enter wrdev, iclass 36, count 2 2006.229.01:15:54.37#ibcon#first serial, iclass 36, count 2 2006.229.01:15:54.37#ibcon#enter sib2, iclass 36, count 2 2006.229.01:15:54.37#ibcon#flushed, iclass 36, count 2 2006.229.01:15:54.37#ibcon#about to write, iclass 36, count 2 2006.229.01:15:54.37#ibcon#wrote, iclass 36, count 2 2006.229.01:15:54.37#ibcon#about to read 3, iclass 36, count 2 2006.229.01:15:54.39#ibcon#read 3, iclass 36, count 2 2006.229.01:15:54.39#ibcon#about to read 4, iclass 36, count 2 2006.229.01:15:54.39#ibcon#read 4, iclass 36, count 2 2006.229.01:15:54.39#ibcon#about to read 5, iclass 36, count 2 2006.229.01:15:54.39#ibcon#read 5, iclass 36, count 2 2006.229.01:15:54.39#ibcon#about to read 6, iclass 36, count 2 2006.229.01:15:54.39#ibcon#read 6, iclass 36, count 2 2006.229.01:15:54.39#ibcon#end of sib2, iclass 36, count 2 2006.229.01:15:54.39#ibcon#*mode == 0, iclass 36, count 2 2006.229.01:15:54.39#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.01:15:54.39#ibcon#[25=AT02-07\r\n] 2006.229.01:15:54.39#ibcon#*before write, iclass 36, count 2 2006.229.01:15:54.39#ibcon#enter sib2, iclass 36, count 2 2006.229.01:15:54.39#ibcon#flushed, iclass 36, count 2 2006.229.01:15:54.39#ibcon#about to write, iclass 36, count 2 2006.229.01:15:54.39#ibcon#wrote, iclass 36, count 2 2006.229.01:15:54.39#ibcon#about to read 3, iclass 36, count 2 2006.229.01:15:54.42#ibcon#read 3, iclass 36, count 2 2006.229.01:15:54.42#ibcon#about to read 4, iclass 36, count 2 2006.229.01:15:54.42#ibcon#read 4, iclass 36, count 2 2006.229.01:15:54.42#ibcon#about to read 5, iclass 36, count 2 2006.229.01:15:54.42#ibcon#read 5, iclass 36, count 2 2006.229.01:15:54.42#ibcon#about to read 6, iclass 36, count 2 2006.229.01:15:54.42#ibcon#read 6, iclass 36, count 2 2006.229.01:15:54.42#ibcon#end of sib2, iclass 36, count 2 2006.229.01:15:54.42#ibcon#*after write, iclass 36, count 2 2006.229.01:15:54.42#ibcon#*before return 0, iclass 36, count 2 2006.229.01:15:54.42#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:54.42#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:54.42#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.01:15:54.42#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:54.42#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:54.54#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:54.54#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:54.54#ibcon#enter wrdev, iclass 36, count 0 2006.229.01:15:54.54#ibcon#first serial, iclass 36, count 0 2006.229.01:15:54.54#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:54.54#ibcon#flushed, iclass 36, count 0 2006.229.01:15:54.54#ibcon#about to write, iclass 36, count 0 2006.229.01:15:54.54#ibcon#wrote, iclass 36, count 0 2006.229.01:15:54.54#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:54.56#ibcon#read 3, iclass 36, count 0 2006.229.01:15:54.56#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:54.56#ibcon#read 4, iclass 36, count 0 2006.229.01:15:54.56#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:54.56#ibcon#read 5, iclass 36, count 0 2006.229.01:15:54.56#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:54.56#ibcon#read 6, iclass 36, count 0 2006.229.01:15:54.56#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:54.56#ibcon#*mode == 0, iclass 36, count 0 2006.229.01:15:54.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.01:15:54.56#ibcon#[25=USB\r\n] 2006.229.01:15:54.56#ibcon#*before write, iclass 36, count 0 2006.229.01:15:54.56#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:54.56#ibcon#flushed, iclass 36, count 0 2006.229.01:15:54.56#ibcon#about to write, iclass 36, count 0 2006.229.01:15:54.56#ibcon#wrote, iclass 36, count 0 2006.229.01:15:54.56#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:54.59#ibcon#read 3, iclass 36, count 0 2006.229.01:15:54.59#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:54.59#ibcon#read 4, iclass 36, count 0 2006.229.01:15:54.59#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:54.59#ibcon#read 5, iclass 36, count 0 2006.229.01:15:54.59#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:54.59#ibcon#read 6, iclass 36, count 0 2006.229.01:15:54.59#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:54.59#ibcon#*after write, iclass 36, count 0 2006.229.01:15:54.59#ibcon#*before return 0, iclass 36, count 0 2006.229.01:15:54.59#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:54.59#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:54.59#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.01:15:54.59#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.01:15:54.59$vck44/valo=3,564.99 2006.229.01:15:54.59#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.01:15:54.59#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:54.59#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:54.59#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:54.59#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:54.59#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:54.59#ibcon#enter wrdev, iclass 38, count 0 2006.229.01:15:54.59#ibcon#first serial, iclass 38, count 0 2006.229.01:15:54.59#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:54.59#ibcon#flushed, iclass 38, count 0 2006.229.01:15:54.59#ibcon#about to write, iclass 38, count 0 2006.229.01:15:54.59#ibcon#wrote, iclass 38, count 0 2006.229.01:15:54.59#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:54.61#ibcon#read 3, iclass 38, count 0 2006.229.01:15:54.61#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:54.61#ibcon#read 4, iclass 38, count 0 2006.229.01:15:54.61#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:54.61#ibcon#read 5, iclass 38, count 0 2006.229.01:15:54.61#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:54.61#ibcon#read 6, iclass 38, count 0 2006.229.01:15:54.61#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:54.61#ibcon#*mode == 0, iclass 38, count 0 2006.229.01:15:54.61#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.01:15:54.61#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.01:15:54.61#ibcon#*before write, iclass 38, count 0 2006.229.01:15:54.61#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:54.61#ibcon#flushed, iclass 38, count 0 2006.229.01:15:54.61#ibcon#about to write, iclass 38, count 0 2006.229.01:15:54.61#ibcon#wrote, iclass 38, count 0 2006.229.01:15:54.61#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:54.66#ibcon#read 3, iclass 38, count 0 2006.229.01:15:54.66#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:54.66#ibcon#read 4, iclass 38, count 0 2006.229.01:15:54.66#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:54.66#ibcon#read 5, iclass 38, count 0 2006.229.01:15:54.66#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:54.66#ibcon#read 6, iclass 38, count 0 2006.229.01:15:54.66#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:54.66#ibcon#*after write, iclass 38, count 0 2006.229.01:15:54.66#ibcon#*before return 0, iclass 38, count 0 2006.229.01:15:54.66#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:54.66#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:54.66#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.01:15:54.66#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.01:15:54.66$vck44/va=3,6 2006.229.01:15:54.66#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.01:15:54.66#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.01:15:54.66#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:54.66#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:54.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:54.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:54.70#ibcon#enter wrdev, iclass 40, count 2 2006.229.01:15:54.70#ibcon#first serial, iclass 40, count 2 2006.229.01:15:54.70#ibcon#enter sib2, iclass 40, count 2 2006.229.01:15:54.70#ibcon#flushed, iclass 40, count 2 2006.229.01:15:54.70#ibcon#about to write, iclass 40, count 2 2006.229.01:15:54.70#ibcon#wrote, iclass 40, count 2 2006.229.01:15:54.70#ibcon#about to read 3, iclass 40, count 2 2006.229.01:15:54.72#ibcon#read 3, iclass 40, count 2 2006.229.01:15:54.72#ibcon#about to read 4, iclass 40, count 2 2006.229.01:15:54.72#ibcon#read 4, iclass 40, count 2 2006.229.01:15:54.72#ibcon#about to read 5, iclass 40, count 2 2006.229.01:15:54.72#ibcon#read 5, iclass 40, count 2 2006.229.01:15:54.72#ibcon#about to read 6, iclass 40, count 2 2006.229.01:15:54.72#ibcon#read 6, iclass 40, count 2 2006.229.01:15:54.72#ibcon#end of sib2, iclass 40, count 2 2006.229.01:15:54.72#ibcon#*mode == 0, iclass 40, count 2 2006.229.01:15:54.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.01:15:54.72#ibcon#[25=AT03-06\r\n] 2006.229.01:15:54.72#ibcon#*before write, iclass 40, count 2 2006.229.01:15:54.72#ibcon#enter sib2, iclass 40, count 2 2006.229.01:15:54.72#ibcon#flushed, iclass 40, count 2 2006.229.01:15:54.72#ibcon#about to write, iclass 40, count 2 2006.229.01:15:54.72#ibcon#wrote, iclass 40, count 2 2006.229.01:15:54.72#ibcon#about to read 3, iclass 40, count 2 2006.229.01:15:54.73#abcon#<5=/04 2.3 4.0 29.68 931001.4\r\n> 2006.229.01:15:54.75#abcon#{5=INTERFACE CLEAR} 2006.229.01:15:54.75#ibcon#read 3, iclass 40, count 2 2006.229.01:15:54.75#ibcon#about to read 4, iclass 40, count 2 2006.229.01:15:54.75#ibcon#read 4, iclass 40, count 2 2006.229.01:15:54.75#ibcon#about to read 5, iclass 40, count 2 2006.229.01:15:54.75#ibcon#read 5, iclass 40, count 2 2006.229.01:15:54.75#ibcon#about to read 6, iclass 40, count 2 2006.229.01:15:54.75#ibcon#read 6, iclass 40, count 2 2006.229.01:15:54.75#ibcon#end of sib2, iclass 40, count 2 2006.229.01:15:54.75#ibcon#*after write, iclass 40, count 2 2006.229.01:15:54.75#ibcon#*before return 0, iclass 40, count 2 2006.229.01:15:54.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:54.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:54.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.01:15:54.75#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:54.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:54.81#abcon#[5=S1D000X0/0*\r\n] 2006.229.01:15:54.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:54.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:54.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.01:15:54.87#ibcon#first serial, iclass 40, count 0 2006.229.01:15:54.87#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:54.87#ibcon#flushed, iclass 40, count 0 2006.229.01:15:54.87#ibcon#about to write, iclass 40, count 0 2006.229.01:15:54.87#ibcon#wrote, iclass 40, count 0 2006.229.01:15:54.87#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:54.89#ibcon#read 3, iclass 40, count 0 2006.229.01:15:54.89#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:54.89#ibcon#read 4, iclass 40, count 0 2006.229.01:15:54.89#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:54.89#ibcon#read 5, iclass 40, count 0 2006.229.01:15:54.89#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:54.89#ibcon#read 6, iclass 40, count 0 2006.229.01:15:54.89#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:54.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.01:15:54.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.01:15:54.89#ibcon#[25=USB\r\n] 2006.229.01:15:54.89#ibcon#*before write, iclass 40, count 0 2006.229.01:15:54.89#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:54.89#ibcon#flushed, iclass 40, count 0 2006.229.01:15:54.89#ibcon#about to write, iclass 40, count 0 2006.229.01:15:54.89#ibcon#wrote, iclass 40, count 0 2006.229.01:15:54.89#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:54.92#ibcon#read 3, iclass 40, count 0 2006.229.01:15:54.92#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:54.92#ibcon#read 4, iclass 40, count 0 2006.229.01:15:54.92#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:54.92#ibcon#read 5, iclass 40, count 0 2006.229.01:15:54.92#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:54.92#ibcon#read 6, iclass 40, count 0 2006.229.01:15:54.92#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:54.92#ibcon#*after write, iclass 40, count 0 2006.229.01:15:54.92#ibcon#*before return 0, iclass 40, count 0 2006.229.01:15:54.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:54.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:54.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.01:15:54.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.01:15:54.92$vck44/valo=4,624.99 2006.229.01:15:54.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.01:15:54.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:54.92#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:54.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:54.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:54.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:54.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.01:15:54.92#ibcon#first serial, iclass 10, count 0 2006.229.01:15:54.92#ibcon#enter sib2, iclass 10, count 0 2006.229.01:15:54.92#ibcon#flushed, iclass 10, count 0 2006.229.01:15:54.92#ibcon#about to write, iclass 10, count 0 2006.229.01:15:54.92#ibcon#wrote, iclass 10, count 0 2006.229.01:15:54.92#ibcon#about to read 3, iclass 10, count 0 2006.229.01:15:54.94#ibcon#read 3, iclass 10, count 0 2006.229.01:15:54.94#ibcon#about to read 4, iclass 10, count 0 2006.229.01:15:54.94#ibcon#read 4, iclass 10, count 0 2006.229.01:15:54.94#ibcon#about to read 5, iclass 10, count 0 2006.229.01:15:54.94#ibcon#read 5, iclass 10, count 0 2006.229.01:15:54.94#ibcon#about to read 6, iclass 10, count 0 2006.229.01:15:54.94#ibcon#read 6, iclass 10, count 0 2006.229.01:15:54.94#ibcon#end of sib2, iclass 10, count 0 2006.229.01:15:54.94#ibcon#*mode == 0, iclass 10, count 0 2006.229.01:15:54.94#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.01:15:54.94#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.01:15:54.94#ibcon#*before write, iclass 10, count 0 2006.229.01:15:54.94#ibcon#enter sib2, iclass 10, count 0 2006.229.01:15:54.94#ibcon#flushed, iclass 10, count 0 2006.229.01:15:54.94#ibcon#about to write, iclass 10, count 0 2006.229.01:15:54.94#ibcon#wrote, iclass 10, count 0 2006.229.01:15:54.94#ibcon#about to read 3, iclass 10, count 0 2006.229.01:15:54.98#ibcon#read 3, iclass 10, count 0 2006.229.01:15:54.98#ibcon#about to read 4, iclass 10, count 0 2006.229.01:15:54.98#ibcon#read 4, iclass 10, count 0 2006.229.01:15:54.98#ibcon#about to read 5, iclass 10, count 0 2006.229.01:15:54.98#ibcon#read 5, iclass 10, count 0 2006.229.01:15:54.98#ibcon#about to read 6, iclass 10, count 0 2006.229.01:15:54.98#ibcon#read 6, iclass 10, count 0 2006.229.01:15:54.98#ibcon#end of sib2, iclass 10, count 0 2006.229.01:15:54.98#ibcon#*after write, iclass 10, count 0 2006.229.01:15:54.98#ibcon#*before return 0, iclass 10, count 0 2006.229.01:15:54.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:54.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:54.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.01:15:54.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.01:15:54.98$vck44/va=4,7 2006.229.01:15:54.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.01:15:54.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.01:15:54.98#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:54.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:55.04#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:55.04#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:55.04#ibcon#enter wrdev, iclass 12, count 2 2006.229.01:15:55.04#ibcon#first serial, iclass 12, count 2 2006.229.01:15:55.04#ibcon#enter sib2, iclass 12, count 2 2006.229.01:15:55.04#ibcon#flushed, iclass 12, count 2 2006.229.01:15:55.04#ibcon#about to write, iclass 12, count 2 2006.229.01:15:55.04#ibcon#wrote, iclass 12, count 2 2006.229.01:15:55.04#ibcon#about to read 3, iclass 12, count 2 2006.229.01:15:55.06#ibcon#read 3, iclass 12, count 2 2006.229.01:15:55.06#ibcon#about to read 4, iclass 12, count 2 2006.229.01:15:55.06#ibcon#read 4, iclass 12, count 2 2006.229.01:15:55.06#ibcon#about to read 5, iclass 12, count 2 2006.229.01:15:55.06#ibcon#read 5, iclass 12, count 2 2006.229.01:15:55.06#ibcon#about to read 6, iclass 12, count 2 2006.229.01:15:55.06#ibcon#read 6, iclass 12, count 2 2006.229.01:15:55.06#ibcon#end of sib2, iclass 12, count 2 2006.229.01:15:55.06#ibcon#*mode == 0, iclass 12, count 2 2006.229.01:15:55.06#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.01:15:55.06#ibcon#[25=AT04-07\r\n] 2006.229.01:15:55.06#ibcon#*before write, iclass 12, count 2 2006.229.01:15:55.06#ibcon#enter sib2, iclass 12, count 2 2006.229.01:15:55.06#ibcon#flushed, iclass 12, count 2 2006.229.01:15:55.06#ibcon#about to write, iclass 12, count 2 2006.229.01:15:55.06#ibcon#wrote, iclass 12, count 2 2006.229.01:15:55.06#ibcon#about to read 3, iclass 12, count 2 2006.229.01:15:55.09#ibcon#read 3, iclass 12, count 2 2006.229.01:15:55.09#ibcon#about to read 4, iclass 12, count 2 2006.229.01:15:55.09#ibcon#read 4, iclass 12, count 2 2006.229.01:15:55.09#ibcon#about to read 5, iclass 12, count 2 2006.229.01:15:55.09#ibcon#read 5, iclass 12, count 2 2006.229.01:15:55.09#ibcon#about to read 6, iclass 12, count 2 2006.229.01:15:55.09#ibcon#read 6, iclass 12, count 2 2006.229.01:15:55.09#ibcon#end of sib2, iclass 12, count 2 2006.229.01:15:55.09#ibcon#*after write, iclass 12, count 2 2006.229.01:15:55.09#ibcon#*before return 0, iclass 12, count 2 2006.229.01:15:55.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:55.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:55.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.01:15:55.09#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:55.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:55.21#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:55.21#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:55.21#ibcon#enter wrdev, iclass 12, count 0 2006.229.01:15:55.21#ibcon#first serial, iclass 12, count 0 2006.229.01:15:55.21#ibcon#enter sib2, iclass 12, count 0 2006.229.01:15:55.21#ibcon#flushed, iclass 12, count 0 2006.229.01:15:55.21#ibcon#about to write, iclass 12, count 0 2006.229.01:15:55.21#ibcon#wrote, iclass 12, count 0 2006.229.01:15:55.21#ibcon#about to read 3, iclass 12, count 0 2006.229.01:15:55.23#ibcon#read 3, iclass 12, count 0 2006.229.01:15:55.23#ibcon#about to read 4, iclass 12, count 0 2006.229.01:15:55.23#ibcon#read 4, iclass 12, count 0 2006.229.01:15:55.23#ibcon#about to read 5, iclass 12, count 0 2006.229.01:15:55.23#ibcon#read 5, iclass 12, count 0 2006.229.01:15:55.23#ibcon#about to read 6, iclass 12, count 0 2006.229.01:15:55.23#ibcon#read 6, iclass 12, count 0 2006.229.01:15:55.23#ibcon#end of sib2, iclass 12, count 0 2006.229.01:15:55.23#ibcon#*mode == 0, iclass 12, count 0 2006.229.01:15:55.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.01:15:55.23#ibcon#[25=USB\r\n] 2006.229.01:15:55.23#ibcon#*before write, iclass 12, count 0 2006.229.01:15:55.23#ibcon#enter sib2, iclass 12, count 0 2006.229.01:15:55.23#ibcon#flushed, iclass 12, count 0 2006.229.01:15:55.23#ibcon#about to write, iclass 12, count 0 2006.229.01:15:55.23#ibcon#wrote, iclass 12, count 0 2006.229.01:15:55.23#ibcon#about to read 3, iclass 12, count 0 2006.229.01:15:55.26#ibcon#read 3, iclass 12, count 0 2006.229.01:15:55.26#ibcon#about to read 4, iclass 12, count 0 2006.229.01:15:55.26#ibcon#read 4, iclass 12, count 0 2006.229.01:15:55.26#ibcon#about to read 5, iclass 12, count 0 2006.229.01:15:55.26#ibcon#read 5, iclass 12, count 0 2006.229.01:15:55.26#ibcon#about to read 6, iclass 12, count 0 2006.229.01:15:55.26#ibcon#read 6, iclass 12, count 0 2006.229.01:15:55.26#ibcon#end of sib2, iclass 12, count 0 2006.229.01:15:55.26#ibcon#*after write, iclass 12, count 0 2006.229.01:15:55.26#ibcon#*before return 0, iclass 12, count 0 2006.229.01:15:55.26#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:55.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:55.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.01:15:55.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.01:15:55.26$vck44/valo=5,734.99 2006.229.01:15:55.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.01:15:55.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:55.26#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:55.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:55.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:55.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:55.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.01:15:55.26#ibcon#first serial, iclass 14, count 0 2006.229.01:15:55.26#ibcon#enter sib2, iclass 14, count 0 2006.229.01:15:55.26#ibcon#flushed, iclass 14, count 0 2006.229.01:15:55.26#ibcon#about to write, iclass 14, count 0 2006.229.01:15:55.26#ibcon#wrote, iclass 14, count 0 2006.229.01:15:55.26#ibcon#about to read 3, iclass 14, count 0 2006.229.01:15:55.28#ibcon#read 3, iclass 14, count 0 2006.229.01:15:55.28#ibcon#about to read 4, iclass 14, count 0 2006.229.01:15:55.28#ibcon#read 4, iclass 14, count 0 2006.229.01:15:55.28#ibcon#about to read 5, iclass 14, count 0 2006.229.01:15:55.28#ibcon#read 5, iclass 14, count 0 2006.229.01:15:55.28#ibcon#about to read 6, iclass 14, count 0 2006.229.01:15:55.28#ibcon#read 6, iclass 14, count 0 2006.229.01:15:55.28#ibcon#end of sib2, iclass 14, count 0 2006.229.01:15:55.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.01:15:55.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.01:15:55.28#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.01:15:55.28#ibcon#*before write, iclass 14, count 0 2006.229.01:15:55.28#ibcon#enter sib2, iclass 14, count 0 2006.229.01:15:55.28#ibcon#flushed, iclass 14, count 0 2006.229.01:15:55.28#ibcon#about to write, iclass 14, count 0 2006.229.01:15:55.28#ibcon#wrote, iclass 14, count 0 2006.229.01:15:55.28#ibcon#about to read 3, iclass 14, count 0 2006.229.01:15:55.32#ibcon#read 3, iclass 14, count 0 2006.229.01:15:55.32#ibcon#about to read 4, iclass 14, count 0 2006.229.01:15:55.32#ibcon#read 4, iclass 14, count 0 2006.229.01:15:55.32#ibcon#about to read 5, iclass 14, count 0 2006.229.01:15:55.32#ibcon#read 5, iclass 14, count 0 2006.229.01:15:55.32#ibcon#about to read 6, iclass 14, count 0 2006.229.01:15:55.32#ibcon#read 6, iclass 14, count 0 2006.229.01:15:55.32#ibcon#end of sib2, iclass 14, count 0 2006.229.01:15:55.32#ibcon#*after write, iclass 14, count 0 2006.229.01:15:55.32#ibcon#*before return 0, iclass 14, count 0 2006.229.01:15:55.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:55.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:55.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.01:15:55.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.01:15:55.32$vck44/va=5,4 2006.229.01:15:55.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.01:15:55.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.01:15:55.32#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:55.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:55.38#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:55.38#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:55.38#ibcon#enter wrdev, iclass 16, count 2 2006.229.01:15:55.38#ibcon#first serial, iclass 16, count 2 2006.229.01:15:55.38#ibcon#enter sib2, iclass 16, count 2 2006.229.01:15:55.38#ibcon#flushed, iclass 16, count 2 2006.229.01:15:55.38#ibcon#about to write, iclass 16, count 2 2006.229.01:15:55.38#ibcon#wrote, iclass 16, count 2 2006.229.01:15:55.38#ibcon#about to read 3, iclass 16, count 2 2006.229.01:15:55.40#ibcon#read 3, iclass 16, count 2 2006.229.01:15:55.40#ibcon#about to read 4, iclass 16, count 2 2006.229.01:15:55.40#ibcon#read 4, iclass 16, count 2 2006.229.01:15:55.40#ibcon#about to read 5, iclass 16, count 2 2006.229.01:15:55.40#ibcon#read 5, iclass 16, count 2 2006.229.01:15:55.40#ibcon#about to read 6, iclass 16, count 2 2006.229.01:15:55.40#ibcon#read 6, iclass 16, count 2 2006.229.01:15:55.40#ibcon#end of sib2, iclass 16, count 2 2006.229.01:15:55.40#ibcon#*mode == 0, iclass 16, count 2 2006.229.01:15:55.40#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.01:15:55.40#ibcon#[25=AT05-04\r\n] 2006.229.01:15:55.40#ibcon#*before write, iclass 16, count 2 2006.229.01:15:55.40#ibcon#enter sib2, iclass 16, count 2 2006.229.01:15:55.40#ibcon#flushed, iclass 16, count 2 2006.229.01:15:55.40#ibcon#about to write, iclass 16, count 2 2006.229.01:15:55.40#ibcon#wrote, iclass 16, count 2 2006.229.01:15:55.40#ibcon#about to read 3, iclass 16, count 2 2006.229.01:15:55.43#ibcon#read 3, iclass 16, count 2 2006.229.01:15:55.43#ibcon#about to read 4, iclass 16, count 2 2006.229.01:15:55.43#ibcon#read 4, iclass 16, count 2 2006.229.01:15:55.43#ibcon#about to read 5, iclass 16, count 2 2006.229.01:15:55.43#ibcon#read 5, iclass 16, count 2 2006.229.01:15:55.43#ibcon#about to read 6, iclass 16, count 2 2006.229.01:15:55.43#ibcon#read 6, iclass 16, count 2 2006.229.01:15:55.43#ibcon#end of sib2, iclass 16, count 2 2006.229.01:15:55.43#ibcon#*after write, iclass 16, count 2 2006.229.01:15:55.43#ibcon#*before return 0, iclass 16, count 2 2006.229.01:15:55.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:55.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:55.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.01:15:55.43#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:55.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:55.55#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:55.55#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:55.55#ibcon#enter wrdev, iclass 16, count 0 2006.229.01:15:55.55#ibcon#first serial, iclass 16, count 0 2006.229.01:15:55.55#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:55.55#ibcon#flushed, iclass 16, count 0 2006.229.01:15:55.55#ibcon#about to write, iclass 16, count 0 2006.229.01:15:55.55#ibcon#wrote, iclass 16, count 0 2006.229.01:15:55.55#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:55.57#ibcon#read 3, iclass 16, count 0 2006.229.01:15:55.57#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:55.57#ibcon#read 4, iclass 16, count 0 2006.229.01:15:55.57#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:55.57#ibcon#read 5, iclass 16, count 0 2006.229.01:15:55.57#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:55.57#ibcon#read 6, iclass 16, count 0 2006.229.01:15:55.57#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:55.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.01:15:55.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.01:15:55.57#ibcon#[25=USB\r\n] 2006.229.01:15:55.57#ibcon#*before write, iclass 16, count 0 2006.229.01:15:55.57#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:55.57#ibcon#flushed, iclass 16, count 0 2006.229.01:15:55.57#ibcon#about to write, iclass 16, count 0 2006.229.01:15:55.57#ibcon#wrote, iclass 16, count 0 2006.229.01:15:55.57#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:55.60#ibcon#read 3, iclass 16, count 0 2006.229.01:15:55.60#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:55.60#ibcon#read 4, iclass 16, count 0 2006.229.01:15:55.60#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:55.60#ibcon#read 5, iclass 16, count 0 2006.229.01:15:55.60#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:55.60#ibcon#read 6, iclass 16, count 0 2006.229.01:15:55.60#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:55.60#ibcon#*after write, iclass 16, count 0 2006.229.01:15:55.60#ibcon#*before return 0, iclass 16, count 0 2006.229.01:15:55.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:55.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:55.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.01:15:55.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.01:15:55.60$vck44/valo=6,814.99 2006.229.01:15:55.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.01:15:55.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:55.60#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:55.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:55.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:55.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:55.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.01:15:55.60#ibcon#first serial, iclass 18, count 0 2006.229.01:15:55.60#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:55.60#ibcon#flushed, iclass 18, count 0 2006.229.01:15:55.60#ibcon#about to write, iclass 18, count 0 2006.229.01:15:55.60#ibcon#wrote, iclass 18, count 0 2006.229.01:15:55.60#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:55.62#ibcon#read 3, iclass 18, count 0 2006.229.01:15:55.62#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:55.62#ibcon#read 4, iclass 18, count 0 2006.229.01:15:55.62#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:55.62#ibcon#read 5, iclass 18, count 0 2006.229.01:15:55.62#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:55.62#ibcon#read 6, iclass 18, count 0 2006.229.01:15:55.62#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:55.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.01:15:55.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.01:15:55.62#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.01:15:55.62#ibcon#*before write, iclass 18, count 0 2006.229.01:15:55.62#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:55.62#ibcon#flushed, iclass 18, count 0 2006.229.01:15:55.62#ibcon#about to write, iclass 18, count 0 2006.229.01:15:55.62#ibcon#wrote, iclass 18, count 0 2006.229.01:15:55.62#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:55.66#ibcon#read 3, iclass 18, count 0 2006.229.01:15:55.66#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:55.66#ibcon#read 4, iclass 18, count 0 2006.229.01:15:55.66#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:55.66#ibcon#read 5, iclass 18, count 0 2006.229.01:15:55.66#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:55.66#ibcon#read 6, iclass 18, count 0 2006.229.01:15:55.66#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:55.66#ibcon#*after write, iclass 18, count 0 2006.229.01:15:55.66#ibcon#*before return 0, iclass 18, count 0 2006.229.01:15:55.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:55.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:55.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.01:15:55.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.01:15:55.66$vck44/va=6,4 2006.229.01:15:55.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.01:15:55.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.01:15:55.66#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:55.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:55.72#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:55.72#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:55.72#ibcon#enter wrdev, iclass 20, count 2 2006.229.01:15:55.72#ibcon#first serial, iclass 20, count 2 2006.229.01:15:55.72#ibcon#enter sib2, iclass 20, count 2 2006.229.01:15:55.72#ibcon#flushed, iclass 20, count 2 2006.229.01:15:55.72#ibcon#about to write, iclass 20, count 2 2006.229.01:15:55.72#ibcon#wrote, iclass 20, count 2 2006.229.01:15:55.72#ibcon#about to read 3, iclass 20, count 2 2006.229.01:15:55.74#ibcon#read 3, iclass 20, count 2 2006.229.01:15:55.74#ibcon#about to read 4, iclass 20, count 2 2006.229.01:15:55.74#ibcon#read 4, iclass 20, count 2 2006.229.01:15:55.74#ibcon#about to read 5, iclass 20, count 2 2006.229.01:15:55.74#ibcon#read 5, iclass 20, count 2 2006.229.01:15:55.74#ibcon#about to read 6, iclass 20, count 2 2006.229.01:15:55.74#ibcon#read 6, iclass 20, count 2 2006.229.01:15:55.74#ibcon#end of sib2, iclass 20, count 2 2006.229.01:15:55.74#ibcon#*mode == 0, iclass 20, count 2 2006.229.01:15:55.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.01:15:55.74#ibcon#[25=AT06-04\r\n] 2006.229.01:15:55.74#ibcon#*before write, iclass 20, count 2 2006.229.01:15:55.74#ibcon#enter sib2, iclass 20, count 2 2006.229.01:15:55.74#ibcon#flushed, iclass 20, count 2 2006.229.01:15:55.74#ibcon#about to write, iclass 20, count 2 2006.229.01:15:55.74#ibcon#wrote, iclass 20, count 2 2006.229.01:15:55.74#ibcon#about to read 3, iclass 20, count 2 2006.229.01:15:55.77#ibcon#read 3, iclass 20, count 2 2006.229.01:15:55.77#ibcon#about to read 4, iclass 20, count 2 2006.229.01:15:55.77#ibcon#read 4, iclass 20, count 2 2006.229.01:15:55.77#ibcon#about to read 5, iclass 20, count 2 2006.229.01:15:55.77#ibcon#read 5, iclass 20, count 2 2006.229.01:15:55.77#ibcon#about to read 6, iclass 20, count 2 2006.229.01:15:55.77#ibcon#read 6, iclass 20, count 2 2006.229.01:15:55.77#ibcon#end of sib2, iclass 20, count 2 2006.229.01:15:55.77#ibcon#*after write, iclass 20, count 2 2006.229.01:15:55.77#ibcon#*before return 0, iclass 20, count 2 2006.229.01:15:55.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:55.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:55.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.01:15:55.77#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:55.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:55.89#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:55.89#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:55.89#ibcon#enter wrdev, iclass 20, count 0 2006.229.01:15:55.89#ibcon#first serial, iclass 20, count 0 2006.229.01:15:55.89#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:55.89#ibcon#flushed, iclass 20, count 0 2006.229.01:15:55.89#ibcon#about to write, iclass 20, count 0 2006.229.01:15:55.89#ibcon#wrote, iclass 20, count 0 2006.229.01:15:55.89#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:55.91#ibcon#read 3, iclass 20, count 0 2006.229.01:15:55.91#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:55.91#ibcon#read 4, iclass 20, count 0 2006.229.01:15:55.91#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:55.91#ibcon#read 5, iclass 20, count 0 2006.229.01:15:55.91#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:55.91#ibcon#read 6, iclass 20, count 0 2006.229.01:15:55.91#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:55.91#ibcon#*mode == 0, iclass 20, count 0 2006.229.01:15:55.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.01:15:55.91#ibcon#[25=USB\r\n] 2006.229.01:15:55.91#ibcon#*before write, iclass 20, count 0 2006.229.01:15:55.91#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:55.91#ibcon#flushed, iclass 20, count 0 2006.229.01:15:55.91#ibcon#about to write, iclass 20, count 0 2006.229.01:15:55.91#ibcon#wrote, iclass 20, count 0 2006.229.01:15:55.91#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:55.94#ibcon#read 3, iclass 20, count 0 2006.229.01:15:55.94#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:55.94#ibcon#read 4, iclass 20, count 0 2006.229.01:15:55.94#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:55.94#ibcon#read 5, iclass 20, count 0 2006.229.01:15:55.94#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:55.94#ibcon#read 6, iclass 20, count 0 2006.229.01:15:55.94#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:55.94#ibcon#*after write, iclass 20, count 0 2006.229.01:15:55.94#ibcon#*before return 0, iclass 20, count 0 2006.229.01:15:55.94#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:55.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:55.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.01:15:55.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.01:15:55.94$vck44/valo=7,864.99 2006.229.01:15:55.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.01:15:55.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:55.94#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:55.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:55.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:55.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:55.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.01:15:55.94#ibcon#first serial, iclass 22, count 0 2006.229.01:15:55.94#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:55.94#ibcon#flushed, iclass 22, count 0 2006.229.01:15:55.94#ibcon#about to write, iclass 22, count 0 2006.229.01:15:55.94#ibcon#wrote, iclass 22, count 0 2006.229.01:15:55.94#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:55.96#ibcon#read 3, iclass 22, count 0 2006.229.01:15:55.96#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:55.96#ibcon#read 4, iclass 22, count 0 2006.229.01:15:55.96#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:55.96#ibcon#read 5, iclass 22, count 0 2006.229.01:15:55.96#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:55.96#ibcon#read 6, iclass 22, count 0 2006.229.01:15:55.96#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:55.96#ibcon#*mode == 0, iclass 22, count 0 2006.229.01:15:55.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.01:15:55.96#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.01:15:55.96#ibcon#*before write, iclass 22, count 0 2006.229.01:15:55.96#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:55.96#ibcon#flushed, iclass 22, count 0 2006.229.01:15:55.96#ibcon#about to write, iclass 22, count 0 2006.229.01:15:55.96#ibcon#wrote, iclass 22, count 0 2006.229.01:15:55.96#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:56.00#ibcon#read 3, iclass 22, count 0 2006.229.01:15:56.00#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:56.00#ibcon#read 4, iclass 22, count 0 2006.229.01:15:56.00#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:56.00#ibcon#read 5, iclass 22, count 0 2006.229.01:15:56.00#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:56.00#ibcon#read 6, iclass 22, count 0 2006.229.01:15:56.00#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:56.00#ibcon#*after write, iclass 22, count 0 2006.229.01:15:56.00#ibcon#*before return 0, iclass 22, count 0 2006.229.01:15:56.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:56.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:56.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.01:15:56.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.01:15:56.00$vck44/va=7,5 2006.229.01:15:56.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.01:15:56.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.01:15:56.00#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:56.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:56.06#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:56.06#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:56.06#ibcon#enter wrdev, iclass 24, count 2 2006.229.01:15:56.06#ibcon#first serial, iclass 24, count 2 2006.229.01:15:56.06#ibcon#enter sib2, iclass 24, count 2 2006.229.01:15:56.06#ibcon#flushed, iclass 24, count 2 2006.229.01:15:56.06#ibcon#about to write, iclass 24, count 2 2006.229.01:15:56.06#ibcon#wrote, iclass 24, count 2 2006.229.01:15:56.06#ibcon#about to read 3, iclass 24, count 2 2006.229.01:15:56.08#ibcon#read 3, iclass 24, count 2 2006.229.01:15:56.08#ibcon#about to read 4, iclass 24, count 2 2006.229.01:15:56.08#ibcon#read 4, iclass 24, count 2 2006.229.01:15:56.08#ibcon#about to read 5, iclass 24, count 2 2006.229.01:15:56.08#ibcon#read 5, iclass 24, count 2 2006.229.01:15:56.08#ibcon#about to read 6, iclass 24, count 2 2006.229.01:15:56.08#ibcon#read 6, iclass 24, count 2 2006.229.01:15:56.08#ibcon#end of sib2, iclass 24, count 2 2006.229.01:15:56.08#ibcon#*mode == 0, iclass 24, count 2 2006.229.01:15:56.08#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.01:15:56.08#ibcon#[25=AT07-05\r\n] 2006.229.01:15:56.08#ibcon#*before write, iclass 24, count 2 2006.229.01:15:56.08#ibcon#enter sib2, iclass 24, count 2 2006.229.01:15:56.08#ibcon#flushed, iclass 24, count 2 2006.229.01:15:56.08#ibcon#about to write, iclass 24, count 2 2006.229.01:15:56.08#ibcon#wrote, iclass 24, count 2 2006.229.01:15:56.08#ibcon#about to read 3, iclass 24, count 2 2006.229.01:15:56.11#ibcon#read 3, iclass 24, count 2 2006.229.01:15:56.11#ibcon#about to read 4, iclass 24, count 2 2006.229.01:15:56.11#ibcon#read 4, iclass 24, count 2 2006.229.01:15:56.11#ibcon#about to read 5, iclass 24, count 2 2006.229.01:15:56.11#ibcon#read 5, iclass 24, count 2 2006.229.01:15:56.11#ibcon#about to read 6, iclass 24, count 2 2006.229.01:15:56.11#ibcon#read 6, iclass 24, count 2 2006.229.01:15:56.11#ibcon#end of sib2, iclass 24, count 2 2006.229.01:15:56.11#ibcon#*after write, iclass 24, count 2 2006.229.01:15:56.11#ibcon#*before return 0, iclass 24, count 2 2006.229.01:15:56.11#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:56.11#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:56.11#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.01:15:56.11#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:56.11#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:56.23#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:56.23#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:56.23#ibcon#enter wrdev, iclass 24, count 0 2006.229.01:15:56.23#ibcon#first serial, iclass 24, count 0 2006.229.01:15:56.23#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:56.23#ibcon#flushed, iclass 24, count 0 2006.229.01:15:56.23#ibcon#about to write, iclass 24, count 0 2006.229.01:15:56.23#ibcon#wrote, iclass 24, count 0 2006.229.01:15:56.23#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:56.25#ibcon#read 3, iclass 24, count 0 2006.229.01:15:56.25#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:56.25#ibcon#read 4, iclass 24, count 0 2006.229.01:15:56.25#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:56.25#ibcon#read 5, iclass 24, count 0 2006.229.01:15:56.25#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:56.25#ibcon#read 6, iclass 24, count 0 2006.229.01:15:56.25#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:56.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.01:15:56.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.01:15:56.25#ibcon#[25=USB\r\n] 2006.229.01:15:56.25#ibcon#*before write, iclass 24, count 0 2006.229.01:15:56.25#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:56.25#ibcon#flushed, iclass 24, count 0 2006.229.01:15:56.25#ibcon#about to write, iclass 24, count 0 2006.229.01:15:56.25#ibcon#wrote, iclass 24, count 0 2006.229.01:15:56.25#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:56.28#ibcon#read 3, iclass 24, count 0 2006.229.01:15:56.28#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:56.28#ibcon#read 4, iclass 24, count 0 2006.229.01:15:56.28#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:56.28#ibcon#read 5, iclass 24, count 0 2006.229.01:15:56.28#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:56.28#ibcon#read 6, iclass 24, count 0 2006.229.01:15:56.28#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:56.28#ibcon#*after write, iclass 24, count 0 2006.229.01:15:56.28#ibcon#*before return 0, iclass 24, count 0 2006.229.01:15:56.28#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:56.28#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:56.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.01:15:56.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.01:15:56.28$vck44/valo=8,884.99 2006.229.01:15:56.28#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.01:15:56.28#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:56.28#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:56.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:56.28#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:56.28#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:56.28#ibcon#enter wrdev, iclass 26, count 0 2006.229.01:15:56.28#ibcon#first serial, iclass 26, count 0 2006.229.01:15:56.28#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:56.28#ibcon#flushed, iclass 26, count 0 2006.229.01:15:56.28#ibcon#about to write, iclass 26, count 0 2006.229.01:15:56.28#ibcon#wrote, iclass 26, count 0 2006.229.01:15:56.28#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:56.30#ibcon#read 3, iclass 26, count 0 2006.229.01:15:56.30#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:56.30#ibcon#read 4, iclass 26, count 0 2006.229.01:15:56.30#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:56.30#ibcon#read 5, iclass 26, count 0 2006.229.01:15:56.30#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:56.30#ibcon#read 6, iclass 26, count 0 2006.229.01:15:56.30#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:56.30#ibcon#*mode == 0, iclass 26, count 0 2006.229.01:15:56.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.01:15:56.30#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.01:15:56.30#ibcon#*before write, iclass 26, count 0 2006.229.01:15:56.30#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:56.30#ibcon#flushed, iclass 26, count 0 2006.229.01:15:56.30#ibcon#about to write, iclass 26, count 0 2006.229.01:15:56.30#ibcon#wrote, iclass 26, count 0 2006.229.01:15:56.30#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:56.34#ibcon#read 3, iclass 26, count 0 2006.229.01:15:56.34#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:56.34#ibcon#read 4, iclass 26, count 0 2006.229.01:15:56.34#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:56.34#ibcon#read 5, iclass 26, count 0 2006.229.01:15:56.34#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:56.34#ibcon#read 6, iclass 26, count 0 2006.229.01:15:56.34#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:56.34#ibcon#*after write, iclass 26, count 0 2006.229.01:15:56.34#ibcon#*before return 0, iclass 26, count 0 2006.229.01:15:56.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:56.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:56.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.01:15:56.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.01:15:56.34$vck44/va=8,6 2006.229.01:15:56.34#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.01:15:56.34#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.01:15:56.34#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:56.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:56.40#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:56.40#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:56.40#ibcon#enter wrdev, iclass 28, count 2 2006.229.01:15:56.40#ibcon#first serial, iclass 28, count 2 2006.229.01:15:56.40#ibcon#enter sib2, iclass 28, count 2 2006.229.01:15:56.40#ibcon#flushed, iclass 28, count 2 2006.229.01:15:56.40#ibcon#about to write, iclass 28, count 2 2006.229.01:15:56.40#ibcon#wrote, iclass 28, count 2 2006.229.01:15:56.40#ibcon#about to read 3, iclass 28, count 2 2006.229.01:15:56.42#ibcon#read 3, iclass 28, count 2 2006.229.01:15:56.42#ibcon#about to read 4, iclass 28, count 2 2006.229.01:15:56.42#ibcon#read 4, iclass 28, count 2 2006.229.01:15:56.42#ibcon#about to read 5, iclass 28, count 2 2006.229.01:15:56.42#ibcon#read 5, iclass 28, count 2 2006.229.01:15:56.42#ibcon#about to read 6, iclass 28, count 2 2006.229.01:15:56.42#ibcon#read 6, iclass 28, count 2 2006.229.01:15:56.42#ibcon#end of sib2, iclass 28, count 2 2006.229.01:15:56.42#ibcon#*mode == 0, iclass 28, count 2 2006.229.01:15:56.42#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.01:15:56.42#ibcon#[25=AT08-06\r\n] 2006.229.01:15:56.42#ibcon#*before write, iclass 28, count 2 2006.229.01:15:56.42#ibcon#enter sib2, iclass 28, count 2 2006.229.01:15:56.42#ibcon#flushed, iclass 28, count 2 2006.229.01:15:56.42#ibcon#about to write, iclass 28, count 2 2006.229.01:15:56.42#ibcon#wrote, iclass 28, count 2 2006.229.01:15:56.42#ibcon#about to read 3, iclass 28, count 2 2006.229.01:15:56.45#ibcon#read 3, iclass 28, count 2 2006.229.01:15:56.45#ibcon#about to read 4, iclass 28, count 2 2006.229.01:15:56.45#ibcon#read 4, iclass 28, count 2 2006.229.01:15:56.45#ibcon#about to read 5, iclass 28, count 2 2006.229.01:15:56.45#ibcon#read 5, iclass 28, count 2 2006.229.01:15:56.45#ibcon#about to read 6, iclass 28, count 2 2006.229.01:15:56.45#ibcon#read 6, iclass 28, count 2 2006.229.01:15:56.45#ibcon#end of sib2, iclass 28, count 2 2006.229.01:15:56.45#ibcon#*after write, iclass 28, count 2 2006.229.01:15:56.45#ibcon#*before return 0, iclass 28, count 2 2006.229.01:15:56.45#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:56.45#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:56.45#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.01:15:56.45#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:56.45#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.01:15:56.57#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.01:15:56.57#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.01:15:56.57#ibcon#enter wrdev, iclass 28, count 0 2006.229.01:15:56.57#ibcon#first serial, iclass 28, count 0 2006.229.01:15:56.57#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:56.57#ibcon#flushed, iclass 28, count 0 2006.229.01:15:56.57#ibcon#about to write, iclass 28, count 0 2006.229.01:15:56.57#ibcon#wrote, iclass 28, count 0 2006.229.01:15:56.57#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:56.59#ibcon#read 3, iclass 28, count 0 2006.229.01:15:56.59#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:56.59#ibcon#read 4, iclass 28, count 0 2006.229.01:15:56.59#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:56.59#ibcon#read 5, iclass 28, count 0 2006.229.01:15:56.59#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:56.59#ibcon#read 6, iclass 28, count 0 2006.229.01:15:56.59#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:56.59#ibcon#*mode == 0, iclass 28, count 0 2006.229.01:15:56.59#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.01:15:56.59#ibcon#[25=USB\r\n] 2006.229.01:15:56.59#ibcon#*before write, iclass 28, count 0 2006.229.01:15:56.59#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:56.59#ibcon#flushed, iclass 28, count 0 2006.229.01:15:56.59#ibcon#about to write, iclass 28, count 0 2006.229.01:15:56.59#ibcon#wrote, iclass 28, count 0 2006.229.01:15:56.59#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:56.62#ibcon#read 3, iclass 28, count 0 2006.229.01:15:56.62#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:56.62#ibcon#read 4, iclass 28, count 0 2006.229.01:15:56.62#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:56.62#ibcon#read 5, iclass 28, count 0 2006.229.01:15:56.62#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:56.62#ibcon#read 6, iclass 28, count 0 2006.229.01:15:56.62#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:56.62#ibcon#*after write, iclass 28, count 0 2006.229.01:15:56.62#ibcon#*before return 0, iclass 28, count 0 2006.229.01:15:56.62#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.01:15:56.62#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.01:15:56.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.01:15:56.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.01:15:56.62$vck44/vblo=1,629.99 2006.229.01:15:56.62#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.01:15:56.62#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.01:15:56.62#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:56.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:56.62#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:56.62#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:56.62#ibcon#enter wrdev, iclass 30, count 0 2006.229.01:15:56.62#ibcon#first serial, iclass 30, count 0 2006.229.01:15:56.62#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:56.62#ibcon#flushed, iclass 30, count 0 2006.229.01:15:56.62#ibcon#about to write, iclass 30, count 0 2006.229.01:15:56.62#ibcon#wrote, iclass 30, count 0 2006.229.01:15:56.62#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:56.64#ibcon#read 3, iclass 30, count 0 2006.229.01:15:56.64#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:56.64#ibcon#read 4, iclass 30, count 0 2006.229.01:15:56.64#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:56.64#ibcon#read 5, iclass 30, count 0 2006.229.01:15:56.64#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:56.64#ibcon#read 6, iclass 30, count 0 2006.229.01:15:56.64#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:56.64#ibcon#*mode == 0, iclass 30, count 0 2006.229.01:15:56.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.01:15:56.64#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.01:15:56.64#ibcon#*before write, iclass 30, count 0 2006.229.01:15:56.64#ibcon#enter sib2, iclass 30, count 0 2006.229.01:15:56.64#ibcon#flushed, iclass 30, count 0 2006.229.01:15:56.64#ibcon#about to write, iclass 30, count 0 2006.229.01:15:56.64#ibcon#wrote, iclass 30, count 0 2006.229.01:15:56.64#ibcon#about to read 3, iclass 30, count 0 2006.229.01:15:56.68#ibcon#read 3, iclass 30, count 0 2006.229.01:15:56.68#ibcon#about to read 4, iclass 30, count 0 2006.229.01:15:56.68#ibcon#read 4, iclass 30, count 0 2006.229.01:15:56.68#ibcon#about to read 5, iclass 30, count 0 2006.229.01:15:56.68#ibcon#read 5, iclass 30, count 0 2006.229.01:15:56.68#ibcon#about to read 6, iclass 30, count 0 2006.229.01:15:56.68#ibcon#read 6, iclass 30, count 0 2006.229.01:15:56.68#ibcon#end of sib2, iclass 30, count 0 2006.229.01:15:56.68#ibcon#*after write, iclass 30, count 0 2006.229.01:15:56.68#ibcon#*before return 0, iclass 30, count 0 2006.229.01:15:56.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:56.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.01:15:56.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.01:15:56.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.01:15:56.68$vck44/vb=1,4 2006.229.01:15:56.68#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.01:15:56.68#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.01:15:56.68#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:56.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:56.68#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:56.68#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:56.68#ibcon#enter wrdev, iclass 32, count 2 2006.229.01:15:56.68#ibcon#first serial, iclass 32, count 2 2006.229.01:15:56.68#ibcon#enter sib2, iclass 32, count 2 2006.229.01:15:56.68#ibcon#flushed, iclass 32, count 2 2006.229.01:15:56.68#ibcon#about to write, iclass 32, count 2 2006.229.01:15:56.68#ibcon#wrote, iclass 32, count 2 2006.229.01:15:56.68#ibcon#about to read 3, iclass 32, count 2 2006.229.01:15:56.70#ibcon#read 3, iclass 32, count 2 2006.229.01:15:56.70#ibcon#about to read 4, iclass 32, count 2 2006.229.01:15:56.70#ibcon#read 4, iclass 32, count 2 2006.229.01:15:56.70#ibcon#about to read 5, iclass 32, count 2 2006.229.01:15:56.70#ibcon#read 5, iclass 32, count 2 2006.229.01:15:56.70#ibcon#about to read 6, iclass 32, count 2 2006.229.01:15:56.70#ibcon#read 6, iclass 32, count 2 2006.229.01:15:56.70#ibcon#end of sib2, iclass 32, count 2 2006.229.01:15:56.70#ibcon#*mode == 0, iclass 32, count 2 2006.229.01:15:56.70#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.01:15:56.70#ibcon#[27=AT01-04\r\n] 2006.229.01:15:56.70#ibcon#*before write, iclass 32, count 2 2006.229.01:15:56.70#ibcon#enter sib2, iclass 32, count 2 2006.229.01:15:56.70#ibcon#flushed, iclass 32, count 2 2006.229.01:15:56.70#ibcon#about to write, iclass 32, count 2 2006.229.01:15:56.70#ibcon#wrote, iclass 32, count 2 2006.229.01:15:56.70#ibcon#about to read 3, iclass 32, count 2 2006.229.01:15:56.73#ibcon#read 3, iclass 32, count 2 2006.229.01:15:56.73#ibcon#about to read 4, iclass 32, count 2 2006.229.01:15:56.73#ibcon#read 4, iclass 32, count 2 2006.229.01:15:56.73#ibcon#about to read 5, iclass 32, count 2 2006.229.01:15:56.73#ibcon#read 5, iclass 32, count 2 2006.229.01:15:56.73#ibcon#about to read 6, iclass 32, count 2 2006.229.01:15:56.73#ibcon#read 6, iclass 32, count 2 2006.229.01:15:56.73#ibcon#end of sib2, iclass 32, count 2 2006.229.01:15:56.73#ibcon#*after write, iclass 32, count 2 2006.229.01:15:56.73#ibcon#*before return 0, iclass 32, count 2 2006.229.01:15:56.73#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:56.73#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.01:15:56.73#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.01:15:56.73#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:56.73#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:56.85#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:56.85#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:56.85#ibcon#enter wrdev, iclass 32, count 0 2006.229.01:15:56.85#ibcon#first serial, iclass 32, count 0 2006.229.01:15:56.85#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:56.85#ibcon#flushed, iclass 32, count 0 2006.229.01:15:56.85#ibcon#about to write, iclass 32, count 0 2006.229.01:15:56.85#ibcon#wrote, iclass 32, count 0 2006.229.01:15:56.85#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:56.87#ibcon#read 3, iclass 32, count 0 2006.229.01:15:56.87#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:56.87#ibcon#read 4, iclass 32, count 0 2006.229.01:15:56.87#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:56.87#ibcon#read 5, iclass 32, count 0 2006.229.01:15:56.87#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:56.87#ibcon#read 6, iclass 32, count 0 2006.229.01:15:56.87#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:56.87#ibcon#*mode == 0, iclass 32, count 0 2006.229.01:15:56.87#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.01:15:56.87#ibcon#[27=USB\r\n] 2006.229.01:15:56.87#ibcon#*before write, iclass 32, count 0 2006.229.01:15:56.87#ibcon#enter sib2, iclass 32, count 0 2006.229.01:15:56.87#ibcon#flushed, iclass 32, count 0 2006.229.01:15:56.87#ibcon#about to write, iclass 32, count 0 2006.229.01:15:56.87#ibcon#wrote, iclass 32, count 0 2006.229.01:15:56.87#ibcon#about to read 3, iclass 32, count 0 2006.229.01:15:56.90#ibcon#read 3, iclass 32, count 0 2006.229.01:15:56.90#ibcon#about to read 4, iclass 32, count 0 2006.229.01:15:56.90#ibcon#read 4, iclass 32, count 0 2006.229.01:15:56.90#ibcon#about to read 5, iclass 32, count 0 2006.229.01:15:56.90#ibcon#read 5, iclass 32, count 0 2006.229.01:15:56.90#ibcon#about to read 6, iclass 32, count 0 2006.229.01:15:56.90#ibcon#read 6, iclass 32, count 0 2006.229.01:15:56.90#ibcon#end of sib2, iclass 32, count 0 2006.229.01:15:56.90#ibcon#*after write, iclass 32, count 0 2006.229.01:15:56.90#ibcon#*before return 0, iclass 32, count 0 2006.229.01:15:56.90#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:56.90#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.01:15:56.90#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.01:15:56.90#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.01:15:56.90$vck44/vblo=2,634.99 2006.229.01:15:56.90#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.01:15:56.90#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.01:15:56.90#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:56.90#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:56.90#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:56.90#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:56.90#ibcon#enter wrdev, iclass 34, count 0 2006.229.01:15:56.90#ibcon#first serial, iclass 34, count 0 2006.229.01:15:56.90#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:56.90#ibcon#flushed, iclass 34, count 0 2006.229.01:15:56.90#ibcon#about to write, iclass 34, count 0 2006.229.01:15:56.90#ibcon#wrote, iclass 34, count 0 2006.229.01:15:56.90#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:56.92#ibcon#read 3, iclass 34, count 0 2006.229.01:15:56.92#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:56.92#ibcon#read 4, iclass 34, count 0 2006.229.01:15:56.92#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:56.92#ibcon#read 5, iclass 34, count 0 2006.229.01:15:56.92#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:56.92#ibcon#read 6, iclass 34, count 0 2006.229.01:15:56.92#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:56.92#ibcon#*mode == 0, iclass 34, count 0 2006.229.01:15:56.92#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.01:15:56.92#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.01:15:56.92#ibcon#*before write, iclass 34, count 0 2006.229.01:15:56.92#ibcon#enter sib2, iclass 34, count 0 2006.229.01:15:56.92#ibcon#flushed, iclass 34, count 0 2006.229.01:15:56.92#ibcon#about to write, iclass 34, count 0 2006.229.01:15:56.92#ibcon#wrote, iclass 34, count 0 2006.229.01:15:56.92#ibcon#about to read 3, iclass 34, count 0 2006.229.01:15:56.96#ibcon#read 3, iclass 34, count 0 2006.229.01:15:56.96#ibcon#about to read 4, iclass 34, count 0 2006.229.01:15:56.96#ibcon#read 4, iclass 34, count 0 2006.229.01:15:56.96#ibcon#about to read 5, iclass 34, count 0 2006.229.01:15:56.96#ibcon#read 5, iclass 34, count 0 2006.229.01:15:56.96#ibcon#about to read 6, iclass 34, count 0 2006.229.01:15:56.96#ibcon#read 6, iclass 34, count 0 2006.229.01:15:56.96#ibcon#end of sib2, iclass 34, count 0 2006.229.01:15:56.96#ibcon#*after write, iclass 34, count 0 2006.229.01:15:56.96#ibcon#*before return 0, iclass 34, count 0 2006.229.01:15:56.96#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:56.96#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.01:15:56.96#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.01:15:56.96#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.01:15:56.96$vck44/vb=2,4 2006.229.01:15:56.96#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.01:15:56.96#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.01:15:56.96#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:56.96#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:57.02#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:57.02#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:57.02#ibcon#enter wrdev, iclass 36, count 2 2006.229.01:15:57.02#ibcon#first serial, iclass 36, count 2 2006.229.01:15:57.02#ibcon#enter sib2, iclass 36, count 2 2006.229.01:15:57.02#ibcon#flushed, iclass 36, count 2 2006.229.01:15:57.02#ibcon#about to write, iclass 36, count 2 2006.229.01:15:57.02#ibcon#wrote, iclass 36, count 2 2006.229.01:15:57.02#ibcon#about to read 3, iclass 36, count 2 2006.229.01:15:57.04#ibcon#read 3, iclass 36, count 2 2006.229.01:15:57.04#ibcon#about to read 4, iclass 36, count 2 2006.229.01:15:57.04#ibcon#read 4, iclass 36, count 2 2006.229.01:15:57.04#ibcon#about to read 5, iclass 36, count 2 2006.229.01:15:57.04#ibcon#read 5, iclass 36, count 2 2006.229.01:15:57.04#ibcon#about to read 6, iclass 36, count 2 2006.229.01:15:57.04#ibcon#read 6, iclass 36, count 2 2006.229.01:15:57.04#ibcon#end of sib2, iclass 36, count 2 2006.229.01:15:57.04#ibcon#*mode == 0, iclass 36, count 2 2006.229.01:15:57.04#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.01:15:57.04#ibcon#[27=AT02-04\r\n] 2006.229.01:15:57.04#ibcon#*before write, iclass 36, count 2 2006.229.01:15:57.04#ibcon#enter sib2, iclass 36, count 2 2006.229.01:15:57.04#ibcon#flushed, iclass 36, count 2 2006.229.01:15:57.04#ibcon#about to write, iclass 36, count 2 2006.229.01:15:57.04#ibcon#wrote, iclass 36, count 2 2006.229.01:15:57.04#ibcon#about to read 3, iclass 36, count 2 2006.229.01:15:57.07#ibcon#read 3, iclass 36, count 2 2006.229.01:15:57.07#ibcon#about to read 4, iclass 36, count 2 2006.229.01:15:57.07#ibcon#read 4, iclass 36, count 2 2006.229.01:15:57.07#ibcon#about to read 5, iclass 36, count 2 2006.229.01:15:57.07#ibcon#read 5, iclass 36, count 2 2006.229.01:15:57.07#ibcon#about to read 6, iclass 36, count 2 2006.229.01:15:57.07#ibcon#read 6, iclass 36, count 2 2006.229.01:15:57.07#ibcon#end of sib2, iclass 36, count 2 2006.229.01:15:57.07#ibcon#*after write, iclass 36, count 2 2006.229.01:15:57.07#ibcon#*before return 0, iclass 36, count 2 2006.229.01:15:57.07#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:57.07#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.01:15:57.07#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.01:15:57.07#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:57.07#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:57.19#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:57.19#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:57.19#ibcon#enter wrdev, iclass 36, count 0 2006.229.01:15:57.19#ibcon#first serial, iclass 36, count 0 2006.229.01:15:57.19#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:57.19#ibcon#flushed, iclass 36, count 0 2006.229.01:15:57.19#ibcon#about to write, iclass 36, count 0 2006.229.01:15:57.19#ibcon#wrote, iclass 36, count 0 2006.229.01:15:57.19#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:57.21#ibcon#read 3, iclass 36, count 0 2006.229.01:15:57.21#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:57.21#ibcon#read 4, iclass 36, count 0 2006.229.01:15:57.21#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:57.21#ibcon#read 5, iclass 36, count 0 2006.229.01:15:57.21#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:57.21#ibcon#read 6, iclass 36, count 0 2006.229.01:15:57.21#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:57.21#ibcon#*mode == 0, iclass 36, count 0 2006.229.01:15:57.21#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.01:15:57.21#ibcon#[27=USB\r\n] 2006.229.01:15:57.21#ibcon#*before write, iclass 36, count 0 2006.229.01:15:57.21#ibcon#enter sib2, iclass 36, count 0 2006.229.01:15:57.21#ibcon#flushed, iclass 36, count 0 2006.229.01:15:57.21#ibcon#about to write, iclass 36, count 0 2006.229.01:15:57.21#ibcon#wrote, iclass 36, count 0 2006.229.01:15:57.21#ibcon#about to read 3, iclass 36, count 0 2006.229.01:15:57.24#ibcon#read 3, iclass 36, count 0 2006.229.01:15:57.24#ibcon#about to read 4, iclass 36, count 0 2006.229.01:15:57.24#ibcon#read 4, iclass 36, count 0 2006.229.01:15:57.24#ibcon#about to read 5, iclass 36, count 0 2006.229.01:15:57.24#ibcon#read 5, iclass 36, count 0 2006.229.01:15:57.24#ibcon#about to read 6, iclass 36, count 0 2006.229.01:15:57.24#ibcon#read 6, iclass 36, count 0 2006.229.01:15:57.24#ibcon#end of sib2, iclass 36, count 0 2006.229.01:15:57.24#ibcon#*after write, iclass 36, count 0 2006.229.01:15:57.24#ibcon#*before return 0, iclass 36, count 0 2006.229.01:15:57.24#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:57.24#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.01:15:57.24#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.01:15:57.24#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.01:15:57.24$vck44/vblo=3,649.99 2006.229.01:15:57.24#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.01:15:57.24#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.01:15:57.24#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:57.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:57.24#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:57.24#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:57.24#ibcon#enter wrdev, iclass 38, count 0 2006.229.01:15:57.24#ibcon#first serial, iclass 38, count 0 2006.229.01:15:57.24#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:57.24#ibcon#flushed, iclass 38, count 0 2006.229.01:15:57.24#ibcon#about to write, iclass 38, count 0 2006.229.01:15:57.24#ibcon#wrote, iclass 38, count 0 2006.229.01:15:57.24#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:57.26#ibcon#read 3, iclass 38, count 0 2006.229.01:15:57.26#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:57.26#ibcon#read 4, iclass 38, count 0 2006.229.01:15:57.26#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:57.26#ibcon#read 5, iclass 38, count 0 2006.229.01:15:57.26#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:57.26#ibcon#read 6, iclass 38, count 0 2006.229.01:15:57.26#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:57.26#ibcon#*mode == 0, iclass 38, count 0 2006.229.01:15:57.26#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.01:15:57.26#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.01:15:57.26#ibcon#*before write, iclass 38, count 0 2006.229.01:15:57.26#ibcon#enter sib2, iclass 38, count 0 2006.229.01:15:57.26#ibcon#flushed, iclass 38, count 0 2006.229.01:15:57.26#ibcon#about to write, iclass 38, count 0 2006.229.01:15:57.26#ibcon#wrote, iclass 38, count 0 2006.229.01:15:57.26#ibcon#about to read 3, iclass 38, count 0 2006.229.01:15:57.30#ibcon#read 3, iclass 38, count 0 2006.229.01:15:57.30#ibcon#about to read 4, iclass 38, count 0 2006.229.01:15:57.30#ibcon#read 4, iclass 38, count 0 2006.229.01:15:57.30#ibcon#about to read 5, iclass 38, count 0 2006.229.01:15:57.30#ibcon#read 5, iclass 38, count 0 2006.229.01:15:57.30#ibcon#about to read 6, iclass 38, count 0 2006.229.01:15:57.30#ibcon#read 6, iclass 38, count 0 2006.229.01:15:57.30#ibcon#end of sib2, iclass 38, count 0 2006.229.01:15:57.30#ibcon#*after write, iclass 38, count 0 2006.229.01:15:57.30#ibcon#*before return 0, iclass 38, count 0 2006.229.01:15:57.30#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:57.30#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.01:15:57.30#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.01:15:57.30#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.01:15:57.30$vck44/vb=3,4 2006.229.01:15:57.30#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.01:15:57.30#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.01:15:57.30#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:57.30#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:57.36#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:57.36#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:57.36#ibcon#enter wrdev, iclass 40, count 2 2006.229.01:15:57.36#ibcon#first serial, iclass 40, count 2 2006.229.01:15:57.36#ibcon#enter sib2, iclass 40, count 2 2006.229.01:15:57.36#ibcon#flushed, iclass 40, count 2 2006.229.01:15:57.36#ibcon#about to write, iclass 40, count 2 2006.229.01:15:57.36#ibcon#wrote, iclass 40, count 2 2006.229.01:15:57.36#ibcon#about to read 3, iclass 40, count 2 2006.229.01:15:57.38#ibcon#read 3, iclass 40, count 2 2006.229.01:15:57.38#ibcon#about to read 4, iclass 40, count 2 2006.229.01:15:57.38#ibcon#read 4, iclass 40, count 2 2006.229.01:15:57.38#ibcon#about to read 5, iclass 40, count 2 2006.229.01:15:57.38#ibcon#read 5, iclass 40, count 2 2006.229.01:15:57.38#ibcon#about to read 6, iclass 40, count 2 2006.229.01:15:57.38#ibcon#read 6, iclass 40, count 2 2006.229.01:15:57.38#ibcon#end of sib2, iclass 40, count 2 2006.229.01:15:57.38#ibcon#*mode == 0, iclass 40, count 2 2006.229.01:15:57.38#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.01:15:57.38#ibcon#[27=AT03-04\r\n] 2006.229.01:15:57.38#ibcon#*before write, iclass 40, count 2 2006.229.01:15:57.38#ibcon#enter sib2, iclass 40, count 2 2006.229.01:15:57.38#ibcon#flushed, iclass 40, count 2 2006.229.01:15:57.38#ibcon#about to write, iclass 40, count 2 2006.229.01:15:57.38#ibcon#wrote, iclass 40, count 2 2006.229.01:15:57.38#ibcon#about to read 3, iclass 40, count 2 2006.229.01:15:57.41#ibcon#read 3, iclass 40, count 2 2006.229.01:15:57.41#ibcon#about to read 4, iclass 40, count 2 2006.229.01:15:57.41#ibcon#read 4, iclass 40, count 2 2006.229.01:15:57.41#ibcon#about to read 5, iclass 40, count 2 2006.229.01:15:57.41#ibcon#read 5, iclass 40, count 2 2006.229.01:15:57.41#ibcon#about to read 6, iclass 40, count 2 2006.229.01:15:57.41#ibcon#read 6, iclass 40, count 2 2006.229.01:15:57.41#ibcon#end of sib2, iclass 40, count 2 2006.229.01:15:57.41#ibcon#*after write, iclass 40, count 2 2006.229.01:15:57.41#ibcon#*before return 0, iclass 40, count 2 2006.229.01:15:57.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:57.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.01:15:57.41#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.01:15:57.41#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:57.41#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:57.53#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:57.53#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:57.53#ibcon#enter wrdev, iclass 40, count 0 2006.229.01:15:57.53#ibcon#first serial, iclass 40, count 0 2006.229.01:15:57.53#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:57.53#ibcon#flushed, iclass 40, count 0 2006.229.01:15:57.53#ibcon#about to write, iclass 40, count 0 2006.229.01:15:57.53#ibcon#wrote, iclass 40, count 0 2006.229.01:15:57.53#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:57.55#ibcon#read 3, iclass 40, count 0 2006.229.01:15:57.55#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:57.55#ibcon#read 4, iclass 40, count 0 2006.229.01:15:57.55#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:57.55#ibcon#read 5, iclass 40, count 0 2006.229.01:15:57.55#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:57.55#ibcon#read 6, iclass 40, count 0 2006.229.01:15:57.55#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:57.55#ibcon#*mode == 0, iclass 40, count 0 2006.229.01:15:57.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.01:15:57.55#ibcon#[27=USB\r\n] 2006.229.01:15:57.55#ibcon#*before write, iclass 40, count 0 2006.229.01:15:57.55#ibcon#enter sib2, iclass 40, count 0 2006.229.01:15:57.55#ibcon#flushed, iclass 40, count 0 2006.229.01:15:57.55#ibcon#about to write, iclass 40, count 0 2006.229.01:15:57.55#ibcon#wrote, iclass 40, count 0 2006.229.01:15:57.55#ibcon#about to read 3, iclass 40, count 0 2006.229.01:15:57.58#ibcon#read 3, iclass 40, count 0 2006.229.01:15:57.58#ibcon#about to read 4, iclass 40, count 0 2006.229.01:15:57.58#ibcon#read 4, iclass 40, count 0 2006.229.01:15:57.58#ibcon#about to read 5, iclass 40, count 0 2006.229.01:15:57.58#ibcon#read 5, iclass 40, count 0 2006.229.01:15:57.58#ibcon#about to read 6, iclass 40, count 0 2006.229.01:15:57.58#ibcon#read 6, iclass 40, count 0 2006.229.01:15:57.58#ibcon#end of sib2, iclass 40, count 0 2006.229.01:15:57.58#ibcon#*after write, iclass 40, count 0 2006.229.01:15:57.58#ibcon#*before return 0, iclass 40, count 0 2006.229.01:15:57.58#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:57.58#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.01:15:57.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.01:15:57.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.01:15:57.58$vck44/vblo=4,679.99 2006.229.01:15:57.58#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.01:15:57.58#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.01:15:57.58#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:57.58#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.01:15:57.58#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.01:15:57.58#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.01:15:57.58#ibcon#enter wrdev, iclass 4, count 0 2006.229.01:15:57.58#ibcon#first serial, iclass 4, count 0 2006.229.01:15:57.58#ibcon#enter sib2, iclass 4, count 0 2006.229.01:15:57.58#ibcon#flushed, iclass 4, count 0 2006.229.01:15:57.58#ibcon#about to write, iclass 4, count 0 2006.229.01:15:57.58#ibcon#wrote, iclass 4, count 0 2006.229.01:15:57.58#ibcon#about to read 3, iclass 4, count 0 2006.229.01:15:57.60#ibcon#read 3, iclass 4, count 0 2006.229.01:15:57.60#ibcon#about to read 4, iclass 4, count 0 2006.229.01:15:57.60#ibcon#read 4, iclass 4, count 0 2006.229.01:15:57.60#ibcon#about to read 5, iclass 4, count 0 2006.229.01:15:57.60#ibcon#read 5, iclass 4, count 0 2006.229.01:15:57.60#ibcon#about to read 6, iclass 4, count 0 2006.229.01:15:57.60#ibcon#read 6, iclass 4, count 0 2006.229.01:15:57.60#ibcon#end of sib2, iclass 4, count 0 2006.229.01:15:57.60#ibcon#*mode == 0, iclass 4, count 0 2006.229.01:15:57.60#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.01:15:57.60#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.01:15:57.60#ibcon#*before write, iclass 4, count 0 2006.229.01:15:57.60#ibcon#enter sib2, iclass 4, count 0 2006.229.01:15:57.60#ibcon#flushed, iclass 4, count 0 2006.229.01:15:57.60#ibcon#about to write, iclass 4, count 0 2006.229.01:15:57.60#ibcon#wrote, iclass 4, count 0 2006.229.01:15:57.60#ibcon#about to read 3, iclass 4, count 0 2006.229.01:15:57.64#ibcon#read 3, iclass 4, count 0 2006.229.01:15:57.64#ibcon#about to read 4, iclass 4, count 0 2006.229.01:15:57.64#ibcon#read 4, iclass 4, count 0 2006.229.01:15:57.64#ibcon#about to read 5, iclass 4, count 0 2006.229.01:15:57.64#ibcon#read 5, iclass 4, count 0 2006.229.01:15:57.64#ibcon#about to read 6, iclass 4, count 0 2006.229.01:15:57.64#ibcon#read 6, iclass 4, count 0 2006.229.01:15:57.64#ibcon#end of sib2, iclass 4, count 0 2006.229.01:15:57.64#ibcon#*after write, iclass 4, count 0 2006.229.01:15:57.64#ibcon#*before return 0, iclass 4, count 0 2006.229.01:15:57.64#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.01:15:57.64#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.01:15:57.64#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.01:15:57.64#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.01:15:57.64$vck44/vb=4,4 2006.229.01:15:57.64#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.01:15:57.64#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.01:15:57.64#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:57.64#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:57.70#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:57.70#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:57.70#ibcon#enter wrdev, iclass 6, count 2 2006.229.01:15:57.70#ibcon#first serial, iclass 6, count 2 2006.229.01:15:57.70#ibcon#enter sib2, iclass 6, count 2 2006.229.01:15:57.70#ibcon#flushed, iclass 6, count 2 2006.229.01:15:57.70#ibcon#about to write, iclass 6, count 2 2006.229.01:15:57.70#ibcon#wrote, iclass 6, count 2 2006.229.01:15:57.70#ibcon#about to read 3, iclass 6, count 2 2006.229.01:15:57.72#ibcon#read 3, iclass 6, count 2 2006.229.01:15:57.72#ibcon#about to read 4, iclass 6, count 2 2006.229.01:15:57.72#ibcon#read 4, iclass 6, count 2 2006.229.01:15:57.72#ibcon#about to read 5, iclass 6, count 2 2006.229.01:15:57.72#ibcon#read 5, iclass 6, count 2 2006.229.01:15:57.72#ibcon#about to read 6, iclass 6, count 2 2006.229.01:15:57.72#ibcon#read 6, iclass 6, count 2 2006.229.01:15:57.72#ibcon#end of sib2, iclass 6, count 2 2006.229.01:15:57.72#ibcon#*mode == 0, iclass 6, count 2 2006.229.01:15:57.72#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.01:15:57.72#ibcon#[27=AT04-04\r\n] 2006.229.01:15:57.72#ibcon#*before write, iclass 6, count 2 2006.229.01:15:57.72#ibcon#enter sib2, iclass 6, count 2 2006.229.01:15:57.72#ibcon#flushed, iclass 6, count 2 2006.229.01:15:57.72#ibcon#about to write, iclass 6, count 2 2006.229.01:15:57.72#ibcon#wrote, iclass 6, count 2 2006.229.01:15:57.72#ibcon#about to read 3, iclass 6, count 2 2006.229.01:15:57.75#ibcon#read 3, iclass 6, count 2 2006.229.01:15:57.75#ibcon#about to read 4, iclass 6, count 2 2006.229.01:15:57.75#ibcon#read 4, iclass 6, count 2 2006.229.01:15:57.75#ibcon#about to read 5, iclass 6, count 2 2006.229.01:15:57.75#ibcon#read 5, iclass 6, count 2 2006.229.01:15:57.75#ibcon#about to read 6, iclass 6, count 2 2006.229.01:15:57.75#ibcon#read 6, iclass 6, count 2 2006.229.01:15:57.75#ibcon#end of sib2, iclass 6, count 2 2006.229.01:15:57.75#ibcon#*after write, iclass 6, count 2 2006.229.01:15:57.75#ibcon#*before return 0, iclass 6, count 2 2006.229.01:15:57.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:57.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.01:15:57.75#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.01:15:57.75#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:57.75#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.01:15:57.87#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.01:15:57.87#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.01:15:57.87#ibcon#enter wrdev, iclass 6, count 0 2006.229.01:15:57.87#ibcon#first serial, iclass 6, count 0 2006.229.01:15:57.87#ibcon#enter sib2, iclass 6, count 0 2006.229.01:15:57.87#ibcon#flushed, iclass 6, count 0 2006.229.01:15:57.87#ibcon#about to write, iclass 6, count 0 2006.229.01:15:57.87#ibcon#wrote, iclass 6, count 0 2006.229.01:15:57.87#ibcon#about to read 3, iclass 6, count 0 2006.229.01:15:57.89#ibcon#read 3, iclass 6, count 0 2006.229.01:15:57.89#ibcon#about to read 4, iclass 6, count 0 2006.229.01:15:57.89#ibcon#read 4, iclass 6, count 0 2006.229.01:15:57.89#ibcon#about to read 5, iclass 6, count 0 2006.229.01:15:57.89#ibcon#read 5, iclass 6, count 0 2006.229.01:15:57.89#ibcon#about to read 6, iclass 6, count 0 2006.229.01:15:57.89#ibcon#read 6, iclass 6, count 0 2006.229.01:15:57.89#ibcon#end of sib2, iclass 6, count 0 2006.229.01:15:57.89#ibcon#*mode == 0, iclass 6, count 0 2006.229.01:15:57.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.01:15:57.89#ibcon#[27=USB\r\n] 2006.229.01:15:57.89#ibcon#*before write, iclass 6, count 0 2006.229.01:15:57.89#ibcon#enter sib2, iclass 6, count 0 2006.229.01:15:57.89#ibcon#flushed, iclass 6, count 0 2006.229.01:15:57.89#ibcon#about to write, iclass 6, count 0 2006.229.01:15:57.89#ibcon#wrote, iclass 6, count 0 2006.229.01:15:57.89#ibcon#about to read 3, iclass 6, count 0 2006.229.01:15:57.92#ibcon#read 3, iclass 6, count 0 2006.229.01:15:57.92#ibcon#about to read 4, iclass 6, count 0 2006.229.01:15:57.92#ibcon#read 4, iclass 6, count 0 2006.229.01:15:57.92#ibcon#about to read 5, iclass 6, count 0 2006.229.01:15:57.92#ibcon#read 5, iclass 6, count 0 2006.229.01:15:57.92#ibcon#about to read 6, iclass 6, count 0 2006.229.01:15:57.92#ibcon#read 6, iclass 6, count 0 2006.229.01:15:57.92#ibcon#end of sib2, iclass 6, count 0 2006.229.01:15:57.92#ibcon#*after write, iclass 6, count 0 2006.229.01:15:57.92#ibcon#*before return 0, iclass 6, count 0 2006.229.01:15:57.92#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.01:15:57.92#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.01:15:57.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.01:15:57.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.01:15:57.92$vck44/vblo=5,709.99 2006.229.01:15:57.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.01:15:57.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.01:15:57.92#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:57.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:57.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:57.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:57.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.01:15:57.92#ibcon#first serial, iclass 10, count 0 2006.229.01:15:57.92#ibcon#enter sib2, iclass 10, count 0 2006.229.01:15:57.92#ibcon#flushed, iclass 10, count 0 2006.229.01:15:57.92#ibcon#about to write, iclass 10, count 0 2006.229.01:15:57.92#ibcon#wrote, iclass 10, count 0 2006.229.01:15:57.92#ibcon#about to read 3, iclass 10, count 0 2006.229.01:15:57.94#ibcon#read 3, iclass 10, count 0 2006.229.01:15:57.94#ibcon#about to read 4, iclass 10, count 0 2006.229.01:15:57.94#ibcon#read 4, iclass 10, count 0 2006.229.01:15:57.94#ibcon#about to read 5, iclass 10, count 0 2006.229.01:15:57.94#ibcon#read 5, iclass 10, count 0 2006.229.01:15:57.94#ibcon#about to read 6, iclass 10, count 0 2006.229.01:15:57.94#ibcon#read 6, iclass 10, count 0 2006.229.01:15:57.94#ibcon#end of sib2, iclass 10, count 0 2006.229.01:15:57.94#ibcon#*mode == 0, iclass 10, count 0 2006.229.01:15:57.94#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.01:15:57.94#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.01:15:57.94#ibcon#*before write, iclass 10, count 0 2006.229.01:15:57.94#ibcon#enter sib2, iclass 10, count 0 2006.229.01:15:57.94#ibcon#flushed, iclass 10, count 0 2006.229.01:15:57.94#ibcon#about to write, iclass 10, count 0 2006.229.01:15:57.94#ibcon#wrote, iclass 10, count 0 2006.229.01:15:57.94#ibcon#about to read 3, iclass 10, count 0 2006.229.01:15:57.98#ibcon#read 3, iclass 10, count 0 2006.229.01:15:57.98#ibcon#about to read 4, iclass 10, count 0 2006.229.01:15:57.98#ibcon#read 4, iclass 10, count 0 2006.229.01:15:57.98#ibcon#about to read 5, iclass 10, count 0 2006.229.01:15:57.98#ibcon#read 5, iclass 10, count 0 2006.229.01:15:57.98#ibcon#about to read 6, iclass 10, count 0 2006.229.01:15:57.98#ibcon#read 6, iclass 10, count 0 2006.229.01:15:57.98#ibcon#end of sib2, iclass 10, count 0 2006.229.01:15:57.98#ibcon#*after write, iclass 10, count 0 2006.229.01:15:57.98#ibcon#*before return 0, iclass 10, count 0 2006.229.01:15:57.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:57.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.01:15:57.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.01:15:57.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.01:15:57.98$vck44/vb=5,4 2006.229.01:15:57.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.01:15:57.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.01:15:57.98#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:57.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:58.04#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:58.04#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:58.04#ibcon#enter wrdev, iclass 12, count 2 2006.229.01:15:58.04#ibcon#first serial, iclass 12, count 2 2006.229.01:15:58.04#ibcon#enter sib2, iclass 12, count 2 2006.229.01:15:58.04#ibcon#flushed, iclass 12, count 2 2006.229.01:15:58.04#ibcon#about to write, iclass 12, count 2 2006.229.01:15:58.04#ibcon#wrote, iclass 12, count 2 2006.229.01:15:58.04#ibcon#about to read 3, iclass 12, count 2 2006.229.01:15:58.06#ibcon#read 3, iclass 12, count 2 2006.229.01:15:58.06#ibcon#about to read 4, iclass 12, count 2 2006.229.01:15:58.06#ibcon#read 4, iclass 12, count 2 2006.229.01:15:58.06#ibcon#about to read 5, iclass 12, count 2 2006.229.01:15:58.06#ibcon#read 5, iclass 12, count 2 2006.229.01:15:58.06#ibcon#about to read 6, iclass 12, count 2 2006.229.01:15:58.06#ibcon#read 6, iclass 12, count 2 2006.229.01:15:58.06#ibcon#end of sib2, iclass 12, count 2 2006.229.01:15:58.06#ibcon#*mode == 0, iclass 12, count 2 2006.229.01:15:58.06#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.01:15:58.06#ibcon#[27=AT05-04\r\n] 2006.229.01:15:58.06#ibcon#*before write, iclass 12, count 2 2006.229.01:15:58.06#ibcon#enter sib2, iclass 12, count 2 2006.229.01:15:58.06#ibcon#flushed, iclass 12, count 2 2006.229.01:15:58.06#ibcon#about to write, iclass 12, count 2 2006.229.01:15:58.06#ibcon#wrote, iclass 12, count 2 2006.229.01:15:58.06#ibcon#about to read 3, iclass 12, count 2 2006.229.01:15:58.09#ibcon#read 3, iclass 12, count 2 2006.229.01:15:58.09#ibcon#about to read 4, iclass 12, count 2 2006.229.01:15:58.09#ibcon#read 4, iclass 12, count 2 2006.229.01:15:58.09#ibcon#about to read 5, iclass 12, count 2 2006.229.01:15:58.09#ibcon#read 5, iclass 12, count 2 2006.229.01:15:58.09#ibcon#about to read 6, iclass 12, count 2 2006.229.01:15:58.09#ibcon#read 6, iclass 12, count 2 2006.229.01:15:58.09#ibcon#end of sib2, iclass 12, count 2 2006.229.01:15:58.09#ibcon#*after write, iclass 12, count 2 2006.229.01:15:58.09#ibcon#*before return 0, iclass 12, count 2 2006.229.01:15:58.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:58.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.01:15:58.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.01:15:58.09#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:58.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:58.21#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:58.21#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:58.21#ibcon#enter wrdev, iclass 12, count 0 2006.229.01:15:58.21#ibcon#first serial, iclass 12, count 0 2006.229.01:15:58.21#ibcon#enter sib2, iclass 12, count 0 2006.229.01:15:58.21#ibcon#flushed, iclass 12, count 0 2006.229.01:15:58.21#ibcon#about to write, iclass 12, count 0 2006.229.01:15:58.21#ibcon#wrote, iclass 12, count 0 2006.229.01:15:58.21#ibcon#about to read 3, iclass 12, count 0 2006.229.01:15:58.23#ibcon#read 3, iclass 12, count 0 2006.229.01:15:58.23#ibcon#about to read 4, iclass 12, count 0 2006.229.01:15:58.23#ibcon#read 4, iclass 12, count 0 2006.229.01:15:58.23#ibcon#about to read 5, iclass 12, count 0 2006.229.01:15:58.23#ibcon#read 5, iclass 12, count 0 2006.229.01:15:58.23#ibcon#about to read 6, iclass 12, count 0 2006.229.01:15:58.23#ibcon#read 6, iclass 12, count 0 2006.229.01:15:58.23#ibcon#end of sib2, iclass 12, count 0 2006.229.01:15:58.23#ibcon#*mode == 0, iclass 12, count 0 2006.229.01:15:58.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.01:15:58.23#ibcon#[27=USB\r\n] 2006.229.01:15:58.23#ibcon#*before write, iclass 12, count 0 2006.229.01:15:58.23#ibcon#enter sib2, iclass 12, count 0 2006.229.01:15:58.23#ibcon#flushed, iclass 12, count 0 2006.229.01:15:58.23#ibcon#about to write, iclass 12, count 0 2006.229.01:15:58.23#ibcon#wrote, iclass 12, count 0 2006.229.01:15:58.23#ibcon#about to read 3, iclass 12, count 0 2006.229.01:15:58.26#ibcon#read 3, iclass 12, count 0 2006.229.01:15:58.26#ibcon#about to read 4, iclass 12, count 0 2006.229.01:15:58.26#ibcon#read 4, iclass 12, count 0 2006.229.01:15:58.26#ibcon#about to read 5, iclass 12, count 0 2006.229.01:15:58.26#ibcon#read 5, iclass 12, count 0 2006.229.01:15:58.26#ibcon#about to read 6, iclass 12, count 0 2006.229.01:15:58.26#ibcon#read 6, iclass 12, count 0 2006.229.01:15:58.26#ibcon#end of sib2, iclass 12, count 0 2006.229.01:15:58.26#ibcon#*after write, iclass 12, count 0 2006.229.01:15:58.26#ibcon#*before return 0, iclass 12, count 0 2006.229.01:15:58.26#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:58.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.01:15:58.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.01:15:58.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.01:15:58.26$vck44/vblo=6,719.99 2006.229.01:15:58.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.01:15:58.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.01:15:58.26#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:58.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:58.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:58.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:58.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.01:15:58.26#ibcon#first serial, iclass 14, count 0 2006.229.01:15:58.26#ibcon#enter sib2, iclass 14, count 0 2006.229.01:15:58.26#ibcon#flushed, iclass 14, count 0 2006.229.01:15:58.26#ibcon#about to write, iclass 14, count 0 2006.229.01:15:58.26#ibcon#wrote, iclass 14, count 0 2006.229.01:15:58.26#ibcon#about to read 3, iclass 14, count 0 2006.229.01:15:58.28#ibcon#read 3, iclass 14, count 0 2006.229.01:15:58.28#ibcon#about to read 4, iclass 14, count 0 2006.229.01:15:58.28#ibcon#read 4, iclass 14, count 0 2006.229.01:15:58.28#ibcon#about to read 5, iclass 14, count 0 2006.229.01:15:58.28#ibcon#read 5, iclass 14, count 0 2006.229.01:15:58.28#ibcon#about to read 6, iclass 14, count 0 2006.229.01:15:58.28#ibcon#read 6, iclass 14, count 0 2006.229.01:15:58.28#ibcon#end of sib2, iclass 14, count 0 2006.229.01:15:58.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.01:15:58.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.01:15:58.28#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.01:15:58.28#ibcon#*before write, iclass 14, count 0 2006.229.01:15:58.28#ibcon#enter sib2, iclass 14, count 0 2006.229.01:15:58.28#ibcon#flushed, iclass 14, count 0 2006.229.01:15:58.28#ibcon#about to write, iclass 14, count 0 2006.229.01:15:58.28#ibcon#wrote, iclass 14, count 0 2006.229.01:15:58.28#ibcon#about to read 3, iclass 14, count 0 2006.229.01:15:58.32#ibcon#read 3, iclass 14, count 0 2006.229.01:15:58.32#ibcon#about to read 4, iclass 14, count 0 2006.229.01:15:58.32#ibcon#read 4, iclass 14, count 0 2006.229.01:15:58.32#ibcon#about to read 5, iclass 14, count 0 2006.229.01:15:58.32#ibcon#read 5, iclass 14, count 0 2006.229.01:15:58.32#ibcon#about to read 6, iclass 14, count 0 2006.229.01:15:58.32#ibcon#read 6, iclass 14, count 0 2006.229.01:15:58.32#ibcon#end of sib2, iclass 14, count 0 2006.229.01:15:58.32#ibcon#*after write, iclass 14, count 0 2006.229.01:15:58.32#ibcon#*before return 0, iclass 14, count 0 2006.229.01:15:58.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:58.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.01:15:58.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.01:15:58.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.01:15:58.32$vck44/vb=6,4 2006.229.01:15:58.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.01:15:58.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.01:15:58.32#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:58.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:58.38#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:58.38#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:58.38#ibcon#enter wrdev, iclass 16, count 2 2006.229.01:15:58.38#ibcon#first serial, iclass 16, count 2 2006.229.01:15:58.38#ibcon#enter sib2, iclass 16, count 2 2006.229.01:15:58.38#ibcon#flushed, iclass 16, count 2 2006.229.01:15:58.38#ibcon#about to write, iclass 16, count 2 2006.229.01:15:58.38#ibcon#wrote, iclass 16, count 2 2006.229.01:15:58.38#ibcon#about to read 3, iclass 16, count 2 2006.229.01:15:58.40#ibcon#read 3, iclass 16, count 2 2006.229.01:15:58.40#ibcon#about to read 4, iclass 16, count 2 2006.229.01:15:58.40#ibcon#read 4, iclass 16, count 2 2006.229.01:15:58.40#ibcon#about to read 5, iclass 16, count 2 2006.229.01:15:58.40#ibcon#read 5, iclass 16, count 2 2006.229.01:15:58.40#ibcon#about to read 6, iclass 16, count 2 2006.229.01:15:58.40#ibcon#read 6, iclass 16, count 2 2006.229.01:15:58.40#ibcon#end of sib2, iclass 16, count 2 2006.229.01:15:58.40#ibcon#*mode == 0, iclass 16, count 2 2006.229.01:15:58.40#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.01:15:58.40#ibcon#[27=AT06-04\r\n] 2006.229.01:15:58.40#ibcon#*before write, iclass 16, count 2 2006.229.01:15:58.40#ibcon#enter sib2, iclass 16, count 2 2006.229.01:15:58.40#ibcon#flushed, iclass 16, count 2 2006.229.01:15:58.40#ibcon#about to write, iclass 16, count 2 2006.229.01:15:58.40#ibcon#wrote, iclass 16, count 2 2006.229.01:15:58.40#ibcon#about to read 3, iclass 16, count 2 2006.229.01:15:58.43#ibcon#read 3, iclass 16, count 2 2006.229.01:15:58.43#ibcon#about to read 4, iclass 16, count 2 2006.229.01:15:58.43#ibcon#read 4, iclass 16, count 2 2006.229.01:15:58.43#ibcon#about to read 5, iclass 16, count 2 2006.229.01:15:58.43#ibcon#read 5, iclass 16, count 2 2006.229.01:15:58.43#ibcon#about to read 6, iclass 16, count 2 2006.229.01:15:58.43#ibcon#read 6, iclass 16, count 2 2006.229.01:15:58.43#ibcon#end of sib2, iclass 16, count 2 2006.229.01:15:58.43#ibcon#*after write, iclass 16, count 2 2006.229.01:15:58.43#ibcon#*before return 0, iclass 16, count 2 2006.229.01:15:58.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:58.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.01:15:58.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.01:15:58.43#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:58.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:58.55#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:58.55#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:58.55#ibcon#enter wrdev, iclass 16, count 0 2006.229.01:15:58.55#ibcon#first serial, iclass 16, count 0 2006.229.01:15:58.55#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:58.55#ibcon#flushed, iclass 16, count 0 2006.229.01:15:58.55#ibcon#about to write, iclass 16, count 0 2006.229.01:15:58.55#ibcon#wrote, iclass 16, count 0 2006.229.01:15:58.55#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:58.57#ibcon#read 3, iclass 16, count 0 2006.229.01:15:58.57#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:58.57#ibcon#read 4, iclass 16, count 0 2006.229.01:15:58.57#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:58.57#ibcon#read 5, iclass 16, count 0 2006.229.01:15:58.57#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:58.57#ibcon#read 6, iclass 16, count 0 2006.229.01:15:58.57#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:58.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.01:15:58.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.01:15:58.57#ibcon#[27=USB\r\n] 2006.229.01:15:58.57#ibcon#*before write, iclass 16, count 0 2006.229.01:15:58.57#ibcon#enter sib2, iclass 16, count 0 2006.229.01:15:58.57#ibcon#flushed, iclass 16, count 0 2006.229.01:15:58.57#ibcon#about to write, iclass 16, count 0 2006.229.01:15:58.57#ibcon#wrote, iclass 16, count 0 2006.229.01:15:58.57#ibcon#about to read 3, iclass 16, count 0 2006.229.01:15:58.60#ibcon#read 3, iclass 16, count 0 2006.229.01:15:58.60#ibcon#about to read 4, iclass 16, count 0 2006.229.01:15:58.60#ibcon#read 4, iclass 16, count 0 2006.229.01:15:58.60#ibcon#about to read 5, iclass 16, count 0 2006.229.01:15:58.60#ibcon#read 5, iclass 16, count 0 2006.229.01:15:58.60#ibcon#about to read 6, iclass 16, count 0 2006.229.01:15:58.60#ibcon#read 6, iclass 16, count 0 2006.229.01:15:58.60#ibcon#end of sib2, iclass 16, count 0 2006.229.01:15:58.60#ibcon#*after write, iclass 16, count 0 2006.229.01:15:58.60#ibcon#*before return 0, iclass 16, count 0 2006.229.01:15:58.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:58.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.01:15:58.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.01:15:58.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.01:15:58.60$vck44/vblo=7,734.99 2006.229.01:15:58.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.01:15:58.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.01:15:58.60#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:58.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:58.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:58.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:58.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.01:15:58.60#ibcon#first serial, iclass 18, count 0 2006.229.01:15:58.60#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:58.60#ibcon#flushed, iclass 18, count 0 2006.229.01:15:58.60#ibcon#about to write, iclass 18, count 0 2006.229.01:15:58.60#ibcon#wrote, iclass 18, count 0 2006.229.01:15:58.60#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:58.62#ibcon#read 3, iclass 18, count 0 2006.229.01:15:58.62#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:58.62#ibcon#read 4, iclass 18, count 0 2006.229.01:15:58.62#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:58.62#ibcon#read 5, iclass 18, count 0 2006.229.01:15:58.62#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:58.62#ibcon#read 6, iclass 18, count 0 2006.229.01:15:58.62#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:58.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.01:15:58.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.01:15:58.62#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.01:15:58.62#ibcon#*before write, iclass 18, count 0 2006.229.01:15:58.62#ibcon#enter sib2, iclass 18, count 0 2006.229.01:15:58.62#ibcon#flushed, iclass 18, count 0 2006.229.01:15:58.62#ibcon#about to write, iclass 18, count 0 2006.229.01:15:58.62#ibcon#wrote, iclass 18, count 0 2006.229.01:15:58.62#ibcon#about to read 3, iclass 18, count 0 2006.229.01:15:58.66#ibcon#read 3, iclass 18, count 0 2006.229.01:15:58.66#ibcon#about to read 4, iclass 18, count 0 2006.229.01:15:58.66#ibcon#read 4, iclass 18, count 0 2006.229.01:15:58.66#ibcon#about to read 5, iclass 18, count 0 2006.229.01:15:58.66#ibcon#read 5, iclass 18, count 0 2006.229.01:15:58.66#ibcon#about to read 6, iclass 18, count 0 2006.229.01:15:58.66#ibcon#read 6, iclass 18, count 0 2006.229.01:15:58.66#ibcon#end of sib2, iclass 18, count 0 2006.229.01:15:58.66#ibcon#*after write, iclass 18, count 0 2006.229.01:15:58.66#ibcon#*before return 0, iclass 18, count 0 2006.229.01:15:58.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:58.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.01:15:58.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.01:15:58.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.01:15:58.66$vck44/vb=7,4 2006.229.01:15:58.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.01:15:58.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.01:15:58.66#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:58.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:58.72#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:58.72#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:58.72#ibcon#enter wrdev, iclass 20, count 2 2006.229.01:15:58.72#ibcon#first serial, iclass 20, count 2 2006.229.01:15:58.72#ibcon#enter sib2, iclass 20, count 2 2006.229.01:15:58.72#ibcon#flushed, iclass 20, count 2 2006.229.01:15:58.72#ibcon#about to write, iclass 20, count 2 2006.229.01:15:58.72#ibcon#wrote, iclass 20, count 2 2006.229.01:15:58.72#ibcon#about to read 3, iclass 20, count 2 2006.229.01:15:58.74#ibcon#read 3, iclass 20, count 2 2006.229.01:15:58.74#ibcon#about to read 4, iclass 20, count 2 2006.229.01:15:58.74#ibcon#read 4, iclass 20, count 2 2006.229.01:15:58.74#ibcon#about to read 5, iclass 20, count 2 2006.229.01:15:58.74#ibcon#read 5, iclass 20, count 2 2006.229.01:15:58.74#ibcon#about to read 6, iclass 20, count 2 2006.229.01:15:58.74#ibcon#read 6, iclass 20, count 2 2006.229.01:15:58.74#ibcon#end of sib2, iclass 20, count 2 2006.229.01:15:58.74#ibcon#*mode == 0, iclass 20, count 2 2006.229.01:15:58.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.01:15:58.74#ibcon#[27=AT07-04\r\n] 2006.229.01:15:58.74#ibcon#*before write, iclass 20, count 2 2006.229.01:15:58.74#ibcon#enter sib2, iclass 20, count 2 2006.229.01:15:58.74#ibcon#flushed, iclass 20, count 2 2006.229.01:15:58.74#ibcon#about to write, iclass 20, count 2 2006.229.01:15:58.74#ibcon#wrote, iclass 20, count 2 2006.229.01:15:58.74#ibcon#about to read 3, iclass 20, count 2 2006.229.01:15:58.77#ibcon#read 3, iclass 20, count 2 2006.229.01:15:58.77#ibcon#about to read 4, iclass 20, count 2 2006.229.01:15:58.77#ibcon#read 4, iclass 20, count 2 2006.229.01:15:58.77#ibcon#about to read 5, iclass 20, count 2 2006.229.01:15:58.77#ibcon#read 5, iclass 20, count 2 2006.229.01:15:58.77#ibcon#about to read 6, iclass 20, count 2 2006.229.01:15:58.77#ibcon#read 6, iclass 20, count 2 2006.229.01:15:58.77#ibcon#end of sib2, iclass 20, count 2 2006.229.01:15:58.77#ibcon#*after write, iclass 20, count 2 2006.229.01:15:58.77#ibcon#*before return 0, iclass 20, count 2 2006.229.01:15:58.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:58.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.01:15:58.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.01:15:58.77#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:58.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:58.89#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:58.89#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:58.89#ibcon#enter wrdev, iclass 20, count 0 2006.229.01:15:58.89#ibcon#first serial, iclass 20, count 0 2006.229.01:15:58.89#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:58.89#ibcon#flushed, iclass 20, count 0 2006.229.01:15:58.89#ibcon#about to write, iclass 20, count 0 2006.229.01:15:58.89#ibcon#wrote, iclass 20, count 0 2006.229.01:15:58.89#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:58.91#ibcon#read 3, iclass 20, count 0 2006.229.01:15:58.91#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:58.91#ibcon#read 4, iclass 20, count 0 2006.229.01:15:58.91#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:58.91#ibcon#read 5, iclass 20, count 0 2006.229.01:15:58.91#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:58.91#ibcon#read 6, iclass 20, count 0 2006.229.01:15:58.91#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:58.91#ibcon#*mode == 0, iclass 20, count 0 2006.229.01:15:58.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.01:15:58.91#ibcon#[27=USB\r\n] 2006.229.01:15:58.91#ibcon#*before write, iclass 20, count 0 2006.229.01:15:58.91#ibcon#enter sib2, iclass 20, count 0 2006.229.01:15:58.91#ibcon#flushed, iclass 20, count 0 2006.229.01:15:58.91#ibcon#about to write, iclass 20, count 0 2006.229.01:15:58.91#ibcon#wrote, iclass 20, count 0 2006.229.01:15:58.91#ibcon#about to read 3, iclass 20, count 0 2006.229.01:15:58.94#ibcon#read 3, iclass 20, count 0 2006.229.01:15:58.94#ibcon#about to read 4, iclass 20, count 0 2006.229.01:15:58.94#ibcon#read 4, iclass 20, count 0 2006.229.01:15:58.94#ibcon#about to read 5, iclass 20, count 0 2006.229.01:15:58.94#ibcon#read 5, iclass 20, count 0 2006.229.01:15:58.94#ibcon#about to read 6, iclass 20, count 0 2006.229.01:15:58.94#ibcon#read 6, iclass 20, count 0 2006.229.01:15:58.94#ibcon#end of sib2, iclass 20, count 0 2006.229.01:15:58.94#ibcon#*after write, iclass 20, count 0 2006.229.01:15:58.94#ibcon#*before return 0, iclass 20, count 0 2006.229.01:15:58.94#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:58.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.01:15:58.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.01:15:58.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.01:15:58.94$vck44/vblo=8,744.99 2006.229.01:15:58.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.01:15:58.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.01:15:58.94#ibcon#ireg 17 cls_cnt 0 2006.229.01:15:58.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:58.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:58.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:58.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.01:15:58.94#ibcon#first serial, iclass 22, count 0 2006.229.01:15:58.94#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:58.94#ibcon#flushed, iclass 22, count 0 2006.229.01:15:58.94#ibcon#about to write, iclass 22, count 0 2006.229.01:15:58.94#ibcon#wrote, iclass 22, count 0 2006.229.01:15:58.94#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:58.96#ibcon#read 3, iclass 22, count 0 2006.229.01:15:58.96#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:58.96#ibcon#read 4, iclass 22, count 0 2006.229.01:15:58.96#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:58.96#ibcon#read 5, iclass 22, count 0 2006.229.01:15:58.96#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:58.96#ibcon#read 6, iclass 22, count 0 2006.229.01:15:58.96#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:58.96#ibcon#*mode == 0, iclass 22, count 0 2006.229.01:15:58.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.01:15:58.96#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.01:15:58.96#ibcon#*before write, iclass 22, count 0 2006.229.01:15:58.96#ibcon#enter sib2, iclass 22, count 0 2006.229.01:15:58.96#ibcon#flushed, iclass 22, count 0 2006.229.01:15:58.96#ibcon#about to write, iclass 22, count 0 2006.229.01:15:58.96#ibcon#wrote, iclass 22, count 0 2006.229.01:15:58.96#ibcon#about to read 3, iclass 22, count 0 2006.229.01:15:59.00#ibcon#read 3, iclass 22, count 0 2006.229.01:15:59.00#ibcon#about to read 4, iclass 22, count 0 2006.229.01:15:59.00#ibcon#read 4, iclass 22, count 0 2006.229.01:15:59.00#ibcon#about to read 5, iclass 22, count 0 2006.229.01:15:59.00#ibcon#read 5, iclass 22, count 0 2006.229.01:15:59.00#ibcon#about to read 6, iclass 22, count 0 2006.229.01:15:59.00#ibcon#read 6, iclass 22, count 0 2006.229.01:15:59.00#ibcon#end of sib2, iclass 22, count 0 2006.229.01:15:59.00#ibcon#*after write, iclass 22, count 0 2006.229.01:15:59.00#ibcon#*before return 0, iclass 22, count 0 2006.229.01:15:59.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:59.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.01:15:59.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.01:15:59.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.01:15:59.00$vck44/vb=8,4 2006.229.01:15:59.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.01:15:59.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.01:15:59.00#ibcon#ireg 11 cls_cnt 2 2006.229.01:15:59.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:59.06#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:59.06#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:59.06#ibcon#enter wrdev, iclass 24, count 2 2006.229.01:15:59.06#ibcon#first serial, iclass 24, count 2 2006.229.01:15:59.06#ibcon#enter sib2, iclass 24, count 2 2006.229.01:15:59.06#ibcon#flushed, iclass 24, count 2 2006.229.01:15:59.06#ibcon#about to write, iclass 24, count 2 2006.229.01:15:59.06#ibcon#wrote, iclass 24, count 2 2006.229.01:15:59.06#ibcon#about to read 3, iclass 24, count 2 2006.229.01:15:59.08#ibcon#read 3, iclass 24, count 2 2006.229.01:15:59.08#ibcon#about to read 4, iclass 24, count 2 2006.229.01:15:59.08#ibcon#read 4, iclass 24, count 2 2006.229.01:15:59.08#ibcon#about to read 5, iclass 24, count 2 2006.229.01:15:59.08#ibcon#read 5, iclass 24, count 2 2006.229.01:15:59.08#ibcon#about to read 6, iclass 24, count 2 2006.229.01:15:59.08#ibcon#read 6, iclass 24, count 2 2006.229.01:15:59.08#ibcon#end of sib2, iclass 24, count 2 2006.229.01:15:59.08#ibcon#*mode == 0, iclass 24, count 2 2006.229.01:15:59.08#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.01:15:59.08#ibcon#[27=AT08-04\r\n] 2006.229.01:15:59.08#ibcon#*before write, iclass 24, count 2 2006.229.01:15:59.08#ibcon#enter sib2, iclass 24, count 2 2006.229.01:15:59.08#ibcon#flushed, iclass 24, count 2 2006.229.01:15:59.08#ibcon#about to write, iclass 24, count 2 2006.229.01:15:59.08#ibcon#wrote, iclass 24, count 2 2006.229.01:15:59.08#ibcon#about to read 3, iclass 24, count 2 2006.229.01:15:59.11#ibcon#read 3, iclass 24, count 2 2006.229.01:15:59.11#ibcon#about to read 4, iclass 24, count 2 2006.229.01:15:59.11#ibcon#read 4, iclass 24, count 2 2006.229.01:15:59.11#ibcon#about to read 5, iclass 24, count 2 2006.229.01:15:59.11#ibcon#read 5, iclass 24, count 2 2006.229.01:15:59.11#ibcon#about to read 6, iclass 24, count 2 2006.229.01:15:59.11#ibcon#read 6, iclass 24, count 2 2006.229.01:15:59.11#ibcon#end of sib2, iclass 24, count 2 2006.229.01:15:59.11#ibcon#*after write, iclass 24, count 2 2006.229.01:15:59.11#ibcon#*before return 0, iclass 24, count 2 2006.229.01:15:59.11#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:59.11#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.01:15:59.11#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.01:15:59.11#ibcon#ireg 7 cls_cnt 0 2006.229.01:15:59.11#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:59.23#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:59.23#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:59.23#ibcon#enter wrdev, iclass 24, count 0 2006.229.01:15:59.23#ibcon#first serial, iclass 24, count 0 2006.229.01:15:59.23#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:59.23#ibcon#flushed, iclass 24, count 0 2006.229.01:15:59.23#ibcon#about to write, iclass 24, count 0 2006.229.01:15:59.23#ibcon#wrote, iclass 24, count 0 2006.229.01:15:59.23#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:59.25#ibcon#read 3, iclass 24, count 0 2006.229.01:15:59.25#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:59.25#ibcon#read 4, iclass 24, count 0 2006.229.01:15:59.25#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:59.25#ibcon#read 5, iclass 24, count 0 2006.229.01:15:59.25#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:59.25#ibcon#read 6, iclass 24, count 0 2006.229.01:15:59.25#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:59.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.01:15:59.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.01:15:59.25#ibcon#[27=USB\r\n] 2006.229.01:15:59.25#ibcon#*before write, iclass 24, count 0 2006.229.01:15:59.25#ibcon#enter sib2, iclass 24, count 0 2006.229.01:15:59.25#ibcon#flushed, iclass 24, count 0 2006.229.01:15:59.25#ibcon#about to write, iclass 24, count 0 2006.229.01:15:59.25#ibcon#wrote, iclass 24, count 0 2006.229.01:15:59.25#ibcon#about to read 3, iclass 24, count 0 2006.229.01:15:59.28#ibcon#read 3, iclass 24, count 0 2006.229.01:15:59.28#ibcon#about to read 4, iclass 24, count 0 2006.229.01:15:59.28#ibcon#read 4, iclass 24, count 0 2006.229.01:15:59.28#ibcon#about to read 5, iclass 24, count 0 2006.229.01:15:59.28#ibcon#read 5, iclass 24, count 0 2006.229.01:15:59.28#ibcon#about to read 6, iclass 24, count 0 2006.229.01:15:59.28#ibcon#read 6, iclass 24, count 0 2006.229.01:15:59.28#ibcon#end of sib2, iclass 24, count 0 2006.229.01:15:59.28#ibcon#*after write, iclass 24, count 0 2006.229.01:15:59.28#ibcon#*before return 0, iclass 24, count 0 2006.229.01:15:59.28#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:59.28#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.01:15:59.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.01:15:59.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.01:15:59.28$vck44/vabw=wide 2006.229.01:15:59.28#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.01:15:59.28#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.01:15:59.28#ibcon#ireg 8 cls_cnt 0 2006.229.01:15:59.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:59.28#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:59.28#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:59.28#ibcon#enter wrdev, iclass 26, count 0 2006.229.01:15:59.28#ibcon#first serial, iclass 26, count 0 2006.229.01:15:59.28#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:59.28#ibcon#flushed, iclass 26, count 0 2006.229.01:15:59.28#ibcon#about to write, iclass 26, count 0 2006.229.01:15:59.28#ibcon#wrote, iclass 26, count 0 2006.229.01:15:59.28#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:59.30#ibcon#read 3, iclass 26, count 0 2006.229.01:15:59.30#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:59.30#ibcon#read 4, iclass 26, count 0 2006.229.01:15:59.30#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:59.30#ibcon#read 5, iclass 26, count 0 2006.229.01:15:59.30#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:59.30#ibcon#read 6, iclass 26, count 0 2006.229.01:15:59.30#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:59.30#ibcon#*mode == 0, iclass 26, count 0 2006.229.01:15:59.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.01:15:59.30#ibcon#[25=BW32\r\n] 2006.229.01:15:59.30#ibcon#*before write, iclass 26, count 0 2006.229.01:15:59.30#ibcon#enter sib2, iclass 26, count 0 2006.229.01:15:59.30#ibcon#flushed, iclass 26, count 0 2006.229.01:15:59.30#ibcon#about to write, iclass 26, count 0 2006.229.01:15:59.30#ibcon#wrote, iclass 26, count 0 2006.229.01:15:59.30#ibcon#about to read 3, iclass 26, count 0 2006.229.01:15:59.33#ibcon#read 3, iclass 26, count 0 2006.229.01:15:59.33#ibcon#about to read 4, iclass 26, count 0 2006.229.01:15:59.33#ibcon#read 4, iclass 26, count 0 2006.229.01:15:59.33#ibcon#about to read 5, iclass 26, count 0 2006.229.01:15:59.33#ibcon#read 5, iclass 26, count 0 2006.229.01:15:59.33#ibcon#about to read 6, iclass 26, count 0 2006.229.01:15:59.33#ibcon#read 6, iclass 26, count 0 2006.229.01:15:59.33#ibcon#end of sib2, iclass 26, count 0 2006.229.01:15:59.33#ibcon#*after write, iclass 26, count 0 2006.229.01:15:59.33#ibcon#*before return 0, iclass 26, count 0 2006.229.01:15:59.33#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:59.33#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.01:15:59.33#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.01:15:59.33#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.01:15:59.33$vck44/vbbw=wide 2006.229.01:15:59.33#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.01:15:59.33#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.01:15:59.33#ibcon#ireg 8 cls_cnt 0 2006.229.01:15:59.33#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:59.40#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:59.40#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:59.40#ibcon#enter wrdev, iclass 28, count 0 2006.229.01:15:59.40#ibcon#first serial, iclass 28, count 0 2006.229.01:15:59.40#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:59.40#ibcon#flushed, iclass 28, count 0 2006.229.01:15:59.40#ibcon#about to write, iclass 28, count 0 2006.229.01:15:59.40#ibcon#wrote, iclass 28, count 0 2006.229.01:15:59.40#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:59.42#ibcon#read 3, iclass 28, count 0 2006.229.01:15:59.42#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:59.42#ibcon#read 4, iclass 28, count 0 2006.229.01:15:59.42#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:59.42#ibcon#read 5, iclass 28, count 0 2006.229.01:15:59.42#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:59.42#ibcon#read 6, iclass 28, count 0 2006.229.01:15:59.42#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:59.42#ibcon#*mode == 0, iclass 28, count 0 2006.229.01:15:59.42#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.01:15:59.42#ibcon#[27=BW32\r\n] 2006.229.01:15:59.42#ibcon#*before write, iclass 28, count 0 2006.229.01:15:59.42#ibcon#enter sib2, iclass 28, count 0 2006.229.01:15:59.42#ibcon#flushed, iclass 28, count 0 2006.229.01:15:59.42#ibcon#about to write, iclass 28, count 0 2006.229.01:15:59.42#ibcon#wrote, iclass 28, count 0 2006.229.01:15:59.42#ibcon#about to read 3, iclass 28, count 0 2006.229.01:15:59.45#ibcon#read 3, iclass 28, count 0 2006.229.01:15:59.45#ibcon#about to read 4, iclass 28, count 0 2006.229.01:15:59.45#ibcon#read 4, iclass 28, count 0 2006.229.01:15:59.45#ibcon#about to read 5, iclass 28, count 0 2006.229.01:15:59.45#ibcon#read 5, iclass 28, count 0 2006.229.01:15:59.45#ibcon#about to read 6, iclass 28, count 0 2006.229.01:15:59.45#ibcon#read 6, iclass 28, count 0 2006.229.01:15:59.45#ibcon#end of sib2, iclass 28, count 0 2006.229.01:15:59.45#ibcon#*after write, iclass 28, count 0 2006.229.01:15:59.45#ibcon#*before return 0, iclass 28, count 0 2006.229.01:15:59.45#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:59.45#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.01:15:59.45#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.01:15:59.45#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.01:15:59.45$setupk4/ifdk4 2006.229.01:15:59.45$ifdk4/lo= 2006.229.01:15:59.45$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.01:15:59.45$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.01:15:59.45$ifdk4/patch= 2006.229.01:15:59.45$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.01:15:59.45$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.01:15:59.45$setupk4/!*+20s 2006.229.01:16:04.90#abcon#<5=/04 2.3 4.0 29.68 931001.5\r\n> 2006.229.01:16:04.92#abcon#{5=INTERFACE CLEAR} 2006.229.01:16:04.98#abcon#[5=S1D000X0/0*\r\n] 2006.229.01:16:13.97$setupk4/"tpicd 2006.229.01:16:13.97$setupk4/echo=off 2006.229.01:16:13.97$setupk4/xlog=off 2006.229.01:16:13.97:!2006.229.01:59:50 2006.229.01:17:41.12;cable 2006.229.01:17:41.21/cable/+6.4141E-03 2006.229.01:18:41.37;cablelong 2006.229.01:18:41.51/cablelong/+6.9822E-03 2006.229.01:18:45.18;cablediff 2006.229.01:18:45.18/cablediff/568.1e-6,+ 2006.229.01:19:56.90;cable 2006.229.01:19:57.10/cable/+6.4141E-03 2006.229.01:20:11.03;wx 2006.229.01:20:11.03/wx/29.72,1001.5,94 2006.229.01:20:27.14;"Sky is cloudy. 2006.229.01:20:33.26;xfe 2006.229.01:20:33.35/xfe/off,on,12.0 2006.229.01:20:37.51;clockoff 2006.229.01:20:37.51&clockoff/"gps-fmout=1p 2006.229.01:20:37.51&clockoff/fmout-gps=1p 2006.229.01:20:38.08/fmout-gps/S +4.49E-07 2006.229.01:59:50.00:preob 2006.229.01:59:50.00&preob/onsource 2006.229.01:59:50.14/onsource/TRACKING 2006.229.01:59:50.14:!2006.229.02:00:00 2006.229.02:00:00.00:"tape 2006.229.02:00:00.00:"st=record 2006.229.02:00:00.00:data_valid=on 2006.229.02:00:00.01:midob 2006.229.02:00:00.01&midob/onsource 2006.229.02:00:00.01&midob/wx 2006.229.02:00:00.01&midob/cable 2006.229.02:00:00.01&midob/va 2006.229.02:00:00.01&midob/valo 2006.229.02:00:00.01&midob/vb 2006.229.02:00:00.01&midob/vblo 2006.229.02:00:00.01&midob/vabw 2006.229.02:00:00.01&midob/vbbw 2006.229.02:00:00.01&midob/"form 2006.229.02:00:00.01&midob/xfe 2006.229.02:00:00.01&midob/ifatt 2006.229.02:00:00.01&midob/clockoff 2006.229.02:00:00.01&midob/sy=logmail 2006.229.02:00:00.01&midob/"sy=run setcl adapt & 2006.229.02:00:01.14/onsource/TRACKING 2006.229.02:00:01.14/wx/30.19,1001.1,89 2006.229.02:00:01.31/cable/+6.4071E-03 2006.229.02:00:02.40/va/01,08,usb,yes,29,32 2006.229.02:00:02.40/va/02,07,usb,yes,32,32 2006.229.02:00:02.40/va/03,06,usb,yes,40,42 2006.229.02:00:02.40/va/04,07,usb,yes,33,35 2006.229.02:00:02.40/va/05,04,usb,yes,29,30 2006.229.02:00:02.40/va/06,04,usb,yes,33,33 2006.229.02:00:02.40/va/07,05,usb,yes,29,30 2006.229.02:00:02.40/va/08,06,usb,yes,21,26 2006.229.02:00:02.63/valo/01,524.99,yes,locked 2006.229.02:00:02.63/valo/02,534.99,yes,locked 2006.229.02:00:02.63/valo/03,564.99,yes,locked 2006.229.02:00:02.63/valo/04,624.99,yes,locked 2006.229.02:00:02.63/valo/05,734.99,yes,locked 2006.229.02:00:02.63/valo/06,814.99,yes,locked 2006.229.02:00:02.63/valo/07,864.99,yes,locked 2006.229.02:00:02.63/valo/08,884.99,yes,locked 2006.229.02:00:03.72/vb/01,04,usb,yes,31,29 2006.229.02:00:03.72/vb/02,04,usb,yes,33,33 2006.229.02:00:03.72/vb/03,04,usb,yes,30,33 2006.229.02:00:03.72/vb/04,04,usb,yes,35,34 2006.229.02:00:03.72/vb/05,04,usb,yes,27,30 2006.229.02:00:03.72/vb/06,04,usb,yes,32,28 2006.229.02:00:03.72/vb/07,04,usb,yes,31,31 2006.229.02:00:03.72/vb/08,04,usb,yes,29,32 2006.229.02:00:03.96/vblo/01,629.99,yes,locked 2006.229.02:00:03.96/vblo/02,634.99,yes,locked 2006.229.02:00:03.96/vblo/03,649.99,yes,locked 2006.229.02:00:03.96/vblo/04,679.99,yes,locked 2006.229.02:00:03.96/vblo/05,709.99,yes,locked 2006.229.02:00:03.96/vblo/06,719.99,yes,locked 2006.229.02:00:03.96/vblo/07,734.99,yes,locked 2006.229.02:00:03.96/vblo/08,744.99,yes,locked 2006.229.02:00:04.11/vabw/8 2006.229.02:00:04.26/vbbw/8 2006.229.02:00:04.37/xfe/off,on,12.0 2006.229.02:00:04.76/ifatt/23,28,28,28 2006.229.02:00:05.08/fmout-gps/S +4.42E-07 2006.229.02:00:05.16:!2006.229.02:00:40 2006.229.02:00:40.00:data_valid=off 2006.229.02:00:40.00:"et 2006.229.02:00:40.00:!+3s 2006.229.02:00:43.02:"tape 2006.229.02:00:43.02:postob 2006.229.02:00:43.02&postob/cable 2006.229.02:00:43.03&postob/wx 2006.229.02:00:43.03&postob/clockoff 2006.229.02:00:43.18/cable/+6.4075E-03 2006.229.02:00:43.18/wx/30.17,1001.1,89 2006.229.02:00:43.25/fmout-gps/S +4.41E-07 2006.229.02:00:43.25:scan_name=229-0202,jd0608,40 2006.229.02:00:43.25:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.02:00:44.14#flagr#flagr/antenna,new-source 2006.229.02:00:44.14:checkk5 2006.229.02:00:44.14&checkk5/chk_autoobs=1 2006.229.02:00:44.15&checkk5/chk_autoobs=2 2006.229.02:00:44.15&checkk5/chk_autoobs=3 2006.229.02:00:44.16&checkk5/chk_autoobs=4 2006.229.02:00:44.16&checkk5/chk_obsdata=1 2006.229.02:00:44.16&checkk5/chk_obsdata=2 2006.229.02:00:44.17&checkk5/chk_obsdata=3 2006.229.02:00:44.17&checkk5/chk_obsdata=4 2006.229.02:00:44.17&checkk5/k5log=1 2006.229.02:00:44.21&checkk5/k5log=2 2006.229.02:00:44.21&checkk5/k5log=3 2006.229.02:00:44.21&checkk5/k5log=4 2006.229.02:00:44.21&checkk5/obsinfo 2006.229.02:00:44.72/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:00:45.13/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:00:45.60/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:00:45.99/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:00:46.43/chk_obsdata//k5ts1/T2290200??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:00:46.86/chk_obsdata//k5ts2/T2290200??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:00:47.32/chk_obsdata//k5ts3/T2290200??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:00:47.73/chk_obsdata//k5ts4/T2290200??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:00:48.56/k5log//k5ts1_log_newline 2006.229.02:00:49.35/k5log//k5ts2_log_newline 2006.229.02:00:50.35/k5log//k5ts3_log_newline 2006.229.02:00:51.14/k5log//k5ts4_log_newline 2006.229.02:00:51.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:00:51.16:setupk4=1 2006.229.02:00:51.16$setupk4/echo=on 2006.229.02:00:51.16$setupk4/pcalon 2006.229.02:00:51.16$pcalon/"no phase cal control is implemented here 2006.229.02:00:51.16$setupk4/"tpicd=stop 2006.229.02:00:51.16$setupk4/"rec=synch_on 2006.229.02:00:51.17$setupk4/"rec_mode=128 2006.229.02:00:51.17$setupk4/!* 2006.229.02:00:51.17$setupk4/recpk4 2006.229.02:00:51.17$recpk4/recpatch= 2006.229.02:00:51.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:00:51.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:00:51.17$setupk4/vck44 2006.229.02:00:51.17$vck44/valo=1,524.99 2006.229.02:00:51.17#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.02:00:51.17#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.02:00:51.17#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:51.17#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:51.17#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:51.17#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:51.17#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:00:51.17#ibcon#first serial, iclass 19, count 0 2006.229.02:00:51.17#ibcon#enter sib2, iclass 19, count 0 2006.229.02:00:51.17#ibcon#flushed, iclass 19, count 0 2006.229.02:00:51.17#ibcon#about to write, iclass 19, count 0 2006.229.02:00:51.17#ibcon#wrote, iclass 19, count 0 2006.229.02:00:51.17#ibcon#about to read 3, iclass 19, count 0 2006.229.02:00:51.21#ibcon#read 3, iclass 19, count 0 2006.229.02:00:51.21#ibcon#about to read 4, iclass 19, count 0 2006.229.02:00:51.21#ibcon#read 4, iclass 19, count 0 2006.229.02:00:51.21#ibcon#about to read 5, iclass 19, count 0 2006.229.02:00:51.21#ibcon#read 5, iclass 19, count 0 2006.229.02:00:51.21#ibcon#about to read 6, iclass 19, count 0 2006.229.02:00:51.21#ibcon#read 6, iclass 19, count 0 2006.229.02:00:51.21#ibcon#end of sib2, iclass 19, count 0 2006.229.02:00:51.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:00:51.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:00:51.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:00:51.21#ibcon#*before write, iclass 19, count 0 2006.229.02:00:51.21#ibcon#enter sib2, iclass 19, count 0 2006.229.02:00:51.21#ibcon#flushed, iclass 19, count 0 2006.229.02:00:51.21#ibcon#about to write, iclass 19, count 0 2006.229.02:00:51.21#ibcon#wrote, iclass 19, count 0 2006.229.02:00:51.21#ibcon#about to read 3, iclass 19, count 0 2006.229.02:00:51.26#ibcon#read 3, iclass 19, count 0 2006.229.02:00:51.26#ibcon#about to read 4, iclass 19, count 0 2006.229.02:00:51.26#ibcon#read 4, iclass 19, count 0 2006.229.02:00:51.26#ibcon#about to read 5, iclass 19, count 0 2006.229.02:00:51.26#ibcon#read 5, iclass 19, count 0 2006.229.02:00:51.26#ibcon#about to read 6, iclass 19, count 0 2006.229.02:00:51.26#ibcon#read 6, iclass 19, count 0 2006.229.02:00:51.26#ibcon#end of sib2, iclass 19, count 0 2006.229.02:00:51.26#ibcon#*after write, iclass 19, count 0 2006.229.02:00:51.26#ibcon#*before return 0, iclass 19, count 0 2006.229.02:00:51.26#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:51.26#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:51.26#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:00:51.26#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:00:51.26$vck44/va=1,8 2006.229.02:00:51.26#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.02:00:51.26#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.02:00:51.26#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:51.26#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:51.26#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:51.26#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:51.26#ibcon#enter wrdev, iclass 21, count 2 2006.229.02:00:51.26#ibcon#first serial, iclass 21, count 2 2006.229.02:00:51.26#ibcon#enter sib2, iclass 21, count 2 2006.229.02:00:51.26#ibcon#flushed, iclass 21, count 2 2006.229.02:00:51.26#ibcon#about to write, iclass 21, count 2 2006.229.02:00:51.26#ibcon#wrote, iclass 21, count 2 2006.229.02:00:51.26#ibcon#about to read 3, iclass 21, count 2 2006.229.02:00:51.28#ibcon#read 3, iclass 21, count 2 2006.229.02:00:51.28#ibcon#about to read 4, iclass 21, count 2 2006.229.02:00:51.28#ibcon#read 4, iclass 21, count 2 2006.229.02:00:51.28#ibcon#about to read 5, iclass 21, count 2 2006.229.02:00:51.28#ibcon#read 5, iclass 21, count 2 2006.229.02:00:51.28#ibcon#about to read 6, iclass 21, count 2 2006.229.02:00:51.28#ibcon#read 6, iclass 21, count 2 2006.229.02:00:51.28#ibcon#end of sib2, iclass 21, count 2 2006.229.02:00:51.28#ibcon#*mode == 0, iclass 21, count 2 2006.229.02:00:51.28#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.02:00:51.28#ibcon#[25=AT01-08\r\n] 2006.229.02:00:51.28#ibcon#*before write, iclass 21, count 2 2006.229.02:00:51.28#ibcon#enter sib2, iclass 21, count 2 2006.229.02:00:51.28#ibcon#flushed, iclass 21, count 2 2006.229.02:00:51.28#ibcon#about to write, iclass 21, count 2 2006.229.02:00:51.28#ibcon#wrote, iclass 21, count 2 2006.229.02:00:51.28#ibcon#about to read 3, iclass 21, count 2 2006.229.02:00:51.31#ibcon#read 3, iclass 21, count 2 2006.229.02:00:51.31#ibcon#about to read 4, iclass 21, count 2 2006.229.02:00:51.31#ibcon#read 4, iclass 21, count 2 2006.229.02:00:51.31#ibcon#about to read 5, iclass 21, count 2 2006.229.02:00:51.31#ibcon#read 5, iclass 21, count 2 2006.229.02:00:51.31#ibcon#about to read 6, iclass 21, count 2 2006.229.02:00:51.31#ibcon#read 6, iclass 21, count 2 2006.229.02:00:51.31#ibcon#end of sib2, iclass 21, count 2 2006.229.02:00:51.31#ibcon#*after write, iclass 21, count 2 2006.229.02:00:51.31#ibcon#*before return 0, iclass 21, count 2 2006.229.02:00:51.31#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:51.31#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:51.31#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.02:00:51.31#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:51.31#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:51.43#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:51.43#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:51.43#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:00:51.43#ibcon#first serial, iclass 21, count 0 2006.229.02:00:51.43#ibcon#enter sib2, iclass 21, count 0 2006.229.02:00:51.43#ibcon#flushed, iclass 21, count 0 2006.229.02:00:51.43#ibcon#about to write, iclass 21, count 0 2006.229.02:00:51.43#ibcon#wrote, iclass 21, count 0 2006.229.02:00:51.43#ibcon#about to read 3, iclass 21, count 0 2006.229.02:00:51.45#ibcon#read 3, iclass 21, count 0 2006.229.02:00:51.45#ibcon#about to read 4, iclass 21, count 0 2006.229.02:00:51.45#ibcon#read 4, iclass 21, count 0 2006.229.02:00:51.45#ibcon#about to read 5, iclass 21, count 0 2006.229.02:00:51.45#ibcon#read 5, iclass 21, count 0 2006.229.02:00:51.45#ibcon#about to read 6, iclass 21, count 0 2006.229.02:00:51.45#ibcon#read 6, iclass 21, count 0 2006.229.02:00:51.45#ibcon#end of sib2, iclass 21, count 0 2006.229.02:00:51.45#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:00:51.45#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:00:51.45#ibcon#[25=USB\r\n] 2006.229.02:00:51.45#ibcon#*before write, iclass 21, count 0 2006.229.02:00:51.45#ibcon#enter sib2, iclass 21, count 0 2006.229.02:00:51.45#ibcon#flushed, iclass 21, count 0 2006.229.02:00:51.45#ibcon#about to write, iclass 21, count 0 2006.229.02:00:51.45#ibcon#wrote, iclass 21, count 0 2006.229.02:00:51.45#ibcon#about to read 3, iclass 21, count 0 2006.229.02:00:51.48#ibcon#read 3, iclass 21, count 0 2006.229.02:00:51.48#ibcon#about to read 4, iclass 21, count 0 2006.229.02:00:51.48#ibcon#read 4, iclass 21, count 0 2006.229.02:00:51.48#ibcon#about to read 5, iclass 21, count 0 2006.229.02:00:51.48#ibcon#read 5, iclass 21, count 0 2006.229.02:00:51.48#ibcon#about to read 6, iclass 21, count 0 2006.229.02:00:51.48#ibcon#read 6, iclass 21, count 0 2006.229.02:00:51.48#ibcon#end of sib2, iclass 21, count 0 2006.229.02:00:51.48#ibcon#*after write, iclass 21, count 0 2006.229.02:00:51.48#ibcon#*before return 0, iclass 21, count 0 2006.229.02:00:51.48#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:51.48#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:51.48#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:00:51.48#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:00:51.48$vck44/valo=2,534.99 2006.229.02:00:51.48#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.02:00:51.48#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.02:00:51.48#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:51.48#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:51.48#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:51.48#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:51.48#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:00:51.48#ibcon#first serial, iclass 23, count 0 2006.229.02:00:51.48#ibcon#enter sib2, iclass 23, count 0 2006.229.02:00:51.48#ibcon#flushed, iclass 23, count 0 2006.229.02:00:51.48#ibcon#about to write, iclass 23, count 0 2006.229.02:00:51.48#ibcon#wrote, iclass 23, count 0 2006.229.02:00:51.48#ibcon#about to read 3, iclass 23, count 0 2006.229.02:00:51.50#ibcon#read 3, iclass 23, count 0 2006.229.02:00:51.50#ibcon#about to read 4, iclass 23, count 0 2006.229.02:00:51.50#ibcon#read 4, iclass 23, count 0 2006.229.02:00:51.50#ibcon#about to read 5, iclass 23, count 0 2006.229.02:00:51.50#ibcon#read 5, iclass 23, count 0 2006.229.02:00:51.50#ibcon#about to read 6, iclass 23, count 0 2006.229.02:00:51.50#ibcon#read 6, iclass 23, count 0 2006.229.02:00:51.50#ibcon#end of sib2, iclass 23, count 0 2006.229.02:00:51.50#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:00:51.50#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:00:51.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:00:51.50#ibcon#*before write, iclass 23, count 0 2006.229.02:00:51.50#ibcon#enter sib2, iclass 23, count 0 2006.229.02:00:51.50#ibcon#flushed, iclass 23, count 0 2006.229.02:00:51.50#ibcon#about to write, iclass 23, count 0 2006.229.02:00:51.50#ibcon#wrote, iclass 23, count 0 2006.229.02:00:51.50#ibcon#about to read 3, iclass 23, count 0 2006.229.02:00:51.54#ibcon#read 3, iclass 23, count 0 2006.229.02:00:51.54#ibcon#about to read 4, iclass 23, count 0 2006.229.02:00:51.54#ibcon#read 4, iclass 23, count 0 2006.229.02:00:51.54#ibcon#about to read 5, iclass 23, count 0 2006.229.02:00:51.54#ibcon#read 5, iclass 23, count 0 2006.229.02:00:51.54#ibcon#about to read 6, iclass 23, count 0 2006.229.02:00:51.54#ibcon#read 6, iclass 23, count 0 2006.229.02:00:51.54#ibcon#end of sib2, iclass 23, count 0 2006.229.02:00:51.54#ibcon#*after write, iclass 23, count 0 2006.229.02:00:51.54#ibcon#*before return 0, iclass 23, count 0 2006.229.02:00:51.54#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:51.54#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:51.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:00:51.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:00:51.54$vck44/va=2,7 2006.229.02:00:51.54#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.02:00:51.54#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.02:00:51.54#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:51.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:51.60#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:51.60#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:51.60#ibcon#enter wrdev, iclass 25, count 2 2006.229.02:00:51.60#ibcon#first serial, iclass 25, count 2 2006.229.02:00:51.60#ibcon#enter sib2, iclass 25, count 2 2006.229.02:00:51.60#ibcon#flushed, iclass 25, count 2 2006.229.02:00:51.60#ibcon#about to write, iclass 25, count 2 2006.229.02:00:51.60#ibcon#wrote, iclass 25, count 2 2006.229.02:00:51.60#ibcon#about to read 3, iclass 25, count 2 2006.229.02:00:51.62#ibcon#read 3, iclass 25, count 2 2006.229.02:00:51.62#ibcon#about to read 4, iclass 25, count 2 2006.229.02:00:51.62#ibcon#read 4, iclass 25, count 2 2006.229.02:00:51.62#ibcon#about to read 5, iclass 25, count 2 2006.229.02:00:51.62#ibcon#read 5, iclass 25, count 2 2006.229.02:00:51.62#ibcon#about to read 6, iclass 25, count 2 2006.229.02:00:51.62#ibcon#read 6, iclass 25, count 2 2006.229.02:00:51.62#ibcon#end of sib2, iclass 25, count 2 2006.229.02:00:51.62#ibcon#*mode == 0, iclass 25, count 2 2006.229.02:00:51.62#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.02:00:51.62#ibcon#[25=AT02-07\r\n] 2006.229.02:00:51.62#ibcon#*before write, iclass 25, count 2 2006.229.02:00:51.62#ibcon#enter sib2, iclass 25, count 2 2006.229.02:00:51.62#ibcon#flushed, iclass 25, count 2 2006.229.02:00:51.62#ibcon#about to write, iclass 25, count 2 2006.229.02:00:51.62#ibcon#wrote, iclass 25, count 2 2006.229.02:00:51.62#ibcon#about to read 3, iclass 25, count 2 2006.229.02:00:51.65#ibcon#read 3, iclass 25, count 2 2006.229.02:00:51.65#ibcon#about to read 4, iclass 25, count 2 2006.229.02:00:51.65#ibcon#read 4, iclass 25, count 2 2006.229.02:00:51.65#ibcon#about to read 5, iclass 25, count 2 2006.229.02:00:51.65#ibcon#read 5, iclass 25, count 2 2006.229.02:00:51.65#ibcon#about to read 6, iclass 25, count 2 2006.229.02:00:51.65#ibcon#read 6, iclass 25, count 2 2006.229.02:00:51.65#ibcon#end of sib2, iclass 25, count 2 2006.229.02:00:51.65#ibcon#*after write, iclass 25, count 2 2006.229.02:00:51.65#ibcon#*before return 0, iclass 25, count 2 2006.229.02:00:51.65#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:51.65#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:51.65#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.02:00:51.65#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:51.65#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:51.77#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:51.77#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:51.77#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:00:51.77#ibcon#first serial, iclass 25, count 0 2006.229.02:00:51.77#ibcon#enter sib2, iclass 25, count 0 2006.229.02:00:51.77#ibcon#flushed, iclass 25, count 0 2006.229.02:00:51.77#ibcon#about to write, iclass 25, count 0 2006.229.02:00:51.77#ibcon#wrote, iclass 25, count 0 2006.229.02:00:51.77#ibcon#about to read 3, iclass 25, count 0 2006.229.02:00:51.79#ibcon#read 3, iclass 25, count 0 2006.229.02:00:51.79#ibcon#about to read 4, iclass 25, count 0 2006.229.02:00:51.79#ibcon#read 4, iclass 25, count 0 2006.229.02:00:51.79#ibcon#about to read 5, iclass 25, count 0 2006.229.02:00:51.79#ibcon#read 5, iclass 25, count 0 2006.229.02:00:51.79#ibcon#about to read 6, iclass 25, count 0 2006.229.02:00:51.79#ibcon#read 6, iclass 25, count 0 2006.229.02:00:51.79#ibcon#end of sib2, iclass 25, count 0 2006.229.02:00:51.79#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:00:51.79#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:00:51.79#ibcon#[25=USB\r\n] 2006.229.02:00:51.79#ibcon#*before write, iclass 25, count 0 2006.229.02:00:51.79#ibcon#enter sib2, iclass 25, count 0 2006.229.02:00:51.79#ibcon#flushed, iclass 25, count 0 2006.229.02:00:51.79#ibcon#about to write, iclass 25, count 0 2006.229.02:00:51.79#ibcon#wrote, iclass 25, count 0 2006.229.02:00:51.79#ibcon#about to read 3, iclass 25, count 0 2006.229.02:00:51.82#ibcon#read 3, iclass 25, count 0 2006.229.02:00:51.82#ibcon#about to read 4, iclass 25, count 0 2006.229.02:00:51.82#ibcon#read 4, iclass 25, count 0 2006.229.02:00:51.82#ibcon#about to read 5, iclass 25, count 0 2006.229.02:00:51.82#ibcon#read 5, iclass 25, count 0 2006.229.02:00:51.82#ibcon#about to read 6, iclass 25, count 0 2006.229.02:00:51.82#ibcon#read 6, iclass 25, count 0 2006.229.02:00:51.82#ibcon#end of sib2, iclass 25, count 0 2006.229.02:00:51.82#ibcon#*after write, iclass 25, count 0 2006.229.02:00:51.82#ibcon#*before return 0, iclass 25, count 0 2006.229.02:00:51.82#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:51.82#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:51.82#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:00:51.82#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:00:51.82$vck44/valo=3,564.99 2006.229.02:00:51.82#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.02:00:51.82#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.02:00:51.82#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:51.82#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:51.82#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:51.82#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:51.82#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:00:51.82#ibcon#first serial, iclass 27, count 0 2006.229.02:00:51.82#ibcon#enter sib2, iclass 27, count 0 2006.229.02:00:51.82#ibcon#flushed, iclass 27, count 0 2006.229.02:00:51.82#ibcon#about to write, iclass 27, count 0 2006.229.02:00:51.82#ibcon#wrote, iclass 27, count 0 2006.229.02:00:51.82#ibcon#about to read 3, iclass 27, count 0 2006.229.02:00:51.84#ibcon#read 3, iclass 27, count 0 2006.229.02:00:51.84#ibcon#about to read 4, iclass 27, count 0 2006.229.02:00:51.84#ibcon#read 4, iclass 27, count 0 2006.229.02:00:51.84#ibcon#about to read 5, iclass 27, count 0 2006.229.02:00:51.84#ibcon#read 5, iclass 27, count 0 2006.229.02:00:51.84#ibcon#about to read 6, iclass 27, count 0 2006.229.02:00:51.84#ibcon#read 6, iclass 27, count 0 2006.229.02:00:51.84#ibcon#end of sib2, iclass 27, count 0 2006.229.02:00:51.84#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:00:51.84#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:00:51.84#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:00:51.84#ibcon#*before write, iclass 27, count 0 2006.229.02:00:51.84#ibcon#enter sib2, iclass 27, count 0 2006.229.02:00:51.84#ibcon#flushed, iclass 27, count 0 2006.229.02:00:51.84#ibcon#about to write, iclass 27, count 0 2006.229.02:00:51.84#ibcon#wrote, iclass 27, count 0 2006.229.02:00:51.84#ibcon#about to read 3, iclass 27, count 0 2006.229.02:00:51.88#ibcon#read 3, iclass 27, count 0 2006.229.02:00:51.88#ibcon#about to read 4, iclass 27, count 0 2006.229.02:00:51.88#ibcon#read 4, iclass 27, count 0 2006.229.02:00:51.88#ibcon#about to read 5, iclass 27, count 0 2006.229.02:00:51.88#ibcon#read 5, iclass 27, count 0 2006.229.02:00:51.88#ibcon#about to read 6, iclass 27, count 0 2006.229.02:00:51.88#ibcon#read 6, iclass 27, count 0 2006.229.02:00:51.88#ibcon#end of sib2, iclass 27, count 0 2006.229.02:00:51.88#ibcon#*after write, iclass 27, count 0 2006.229.02:00:51.88#ibcon#*before return 0, iclass 27, count 0 2006.229.02:00:51.88#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:51.88#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:51.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:00:51.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:00:51.88$vck44/va=3,6 2006.229.02:00:51.88#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.02:00:51.88#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.02:00:51.88#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:51.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:51.94#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:51.94#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:51.94#ibcon#enter wrdev, iclass 29, count 2 2006.229.02:00:51.94#ibcon#first serial, iclass 29, count 2 2006.229.02:00:51.94#ibcon#enter sib2, iclass 29, count 2 2006.229.02:00:51.94#ibcon#flushed, iclass 29, count 2 2006.229.02:00:51.94#ibcon#about to write, iclass 29, count 2 2006.229.02:00:51.94#ibcon#wrote, iclass 29, count 2 2006.229.02:00:51.94#ibcon#about to read 3, iclass 29, count 2 2006.229.02:00:51.96#ibcon#read 3, iclass 29, count 2 2006.229.02:00:51.96#ibcon#about to read 4, iclass 29, count 2 2006.229.02:00:51.96#ibcon#read 4, iclass 29, count 2 2006.229.02:00:51.96#ibcon#about to read 5, iclass 29, count 2 2006.229.02:00:51.96#ibcon#read 5, iclass 29, count 2 2006.229.02:00:51.96#ibcon#about to read 6, iclass 29, count 2 2006.229.02:00:51.96#ibcon#read 6, iclass 29, count 2 2006.229.02:00:51.96#ibcon#end of sib2, iclass 29, count 2 2006.229.02:00:51.96#ibcon#*mode == 0, iclass 29, count 2 2006.229.02:00:51.96#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.02:00:51.96#ibcon#[25=AT03-06\r\n] 2006.229.02:00:51.96#ibcon#*before write, iclass 29, count 2 2006.229.02:00:51.96#ibcon#enter sib2, iclass 29, count 2 2006.229.02:00:51.96#ibcon#flushed, iclass 29, count 2 2006.229.02:00:51.96#ibcon#about to write, iclass 29, count 2 2006.229.02:00:51.96#ibcon#wrote, iclass 29, count 2 2006.229.02:00:51.96#ibcon#about to read 3, iclass 29, count 2 2006.229.02:00:51.99#ibcon#read 3, iclass 29, count 2 2006.229.02:00:51.99#ibcon#about to read 4, iclass 29, count 2 2006.229.02:00:51.99#ibcon#read 4, iclass 29, count 2 2006.229.02:00:51.99#ibcon#about to read 5, iclass 29, count 2 2006.229.02:00:51.99#ibcon#read 5, iclass 29, count 2 2006.229.02:00:51.99#ibcon#about to read 6, iclass 29, count 2 2006.229.02:00:51.99#ibcon#read 6, iclass 29, count 2 2006.229.02:00:51.99#ibcon#end of sib2, iclass 29, count 2 2006.229.02:00:51.99#ibcon#*after write, iclass 29, count 2 2006.229.02:00:51.99#ibcon#*before return 0, iclass 29, count 2 2006.229.02:00:51.99#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:51.99#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:51.99#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.02:00:51.99#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:51.99#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:52.11#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:52.11#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:52.11#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:00:52.11#ibcon#first serial, iclass 29, count 0 2006.229.02:00:52.11#ibcon#enter sib2, iclass 29, count 0 2006.229.02:00:52.11#ibcon#flushed, iclass 29, count 0 2006.229.02:00:52.11#ibcon#about to write, iclass 29, count 0 2006.229.02:00:52.11#ibcon#wrote, iclass 29, count 0 2006.229.02:00:52.11#ibcon#about to read 3, iclass 29, count 0 2006.229.02:00:52.13#ibcon#read 3, iclass 29, count 0 2006.229.02:00:52.13#ibcon#about to read 4, iclass 29, count 0 2006.229.02:00:52.13#ibcon#read 4, iclass 29, count 0 2006.229.02:00:52.13#ibcon#about to read 5, iclass 29, count 0 2006.229.02:00:52.13#ibcon#read 5, iclass 29, count 0 2006.229.02:00:52.13#ibcon#about to read 6, iclass 29, count 0 2006.229.02:00:52.13#ibcon#read 6, iclass 29, count 0 2006.229.02:00:52.13#ibcon#end of sib2, iclass 29, count 0 2006.229.02:00:52.13#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:00:52.13#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:00:52.13#ibcon#[25=USB\r\n] 2006.229.02:00:52.13#ibcon#*before write, iclass 29, count 0 2006.229.02:00:52.13#ibcon#enter sib2, iclass 29, count 0 2006.229.02:00:52.13#ibcon#flushed, iclass 29, count 0 2006.229.02:00:52.13#ibcon#about to write, iclass 29, count 0 2006.229.02:00:52.13#ibcon#wrote, iclass 29, count 0 2006.229.02:00:52.13#ibcon#about to read 3, iclass 29, count 0 2006.229.02:00:52.16#ibcon#read 3, iclass 29, count 0 2006.229.02:00:52.16#ibcon#about to read 4, iclass 29, count 0 2006.229.02:00:52.16#ibcon#read 4, iclass 29, count 0 2006.229.02:00:52.16#ibcon#about to read 5, iclass 29, count 0 2006.229.02:00:52.16#ibcon#read 5, iclass 29, count 0 2006.229.02:00:52.16#ibcon#about to read 6, iclass 29, count 0 2006.229.02:00:52.16#ibcon#read 6, iclass 29, count 0 2006.229.02:00:52.16#ibcon#end of sib2, iclass 29, count 0 2006.229.02:00:52.16#ibcon#*after write, iclass 29, count 0 2006.229.02:00:52.16#ibcon#*before return 0, iclass 29, count 0 2006.229.02:00:52.16#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:52.16#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:52.16#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:00:52.16#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:00:52.16$vck44/valo=4,624.99 2006.229.02:00:52.16#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.02:00:52.16#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.02:00:52.16#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:52.16#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:52.16#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:52.16#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:52.16#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:00:52.16#ibcon#first serial, iclass 31, count 0 2006.229.02:00:52.16#ibcon#enter sib2, iclass 31, count 0 2006.229.02:00:52.16#ibcon#flushed, iclass 31, count 0 2006.229.02:00:52.16#ibcon#about to write, iclass 31, count 0 2006.229.02:00:52.16#ibcon#wrote, iclass 31, count 0 2006.229.02:00:52.16#ibcon#about to read 3, iclass 31, count 0 2006.229.02:00:52.18#ibcon#read 3, iclass 31, count 0 2006.229.02:00:52.18#ibcon#about to read 4, iclass 31, count 0 2006.229.02:00:52.18#ibcon#read 4, iclass 31, count 0 2006.229.02:00:52.18#ibcon#about to read 5, iclass 31, count 0 2006.229.02:00:52.18#ibcon#read 5, iclass 31, count 0 2006.229.02:00:52.18#ibcon#about to read 6, iclass 31, count 0 2006.229.02:00:52.18#ibcon#read 6, iclass 31, count 0 2006.229.02:00:52.18#ibcon#end of sib2, iclass 31, count 0 2006.229.02:00:52.18#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:00:52.18#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:00:52.18#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:00:52.18#ibcon#*before write, iclass 31, count 0 2006.229.02:00:52.18#ibcon#enter sib2, iclass 31, count 0 2006.229.02:00:52.18#ibcon#flushed, iclass 31, count 0 2006.229.02:00:52.18#ibcon#about to write, iclass 31, count 0 2006.229.02:00:52.18#ibcon#wrote, iclass 31, count 0 2006.229.02:00:52.18#ibcon#about to read 3, iclass 31, count 0 2006.229.02:00:52.22#ibcon#read 3, iclass 31, count 0 2006.229.02:00:52.22#ibcon#about to read 4, iclass 31, count 0 2006.229.02:00:52.22#ibcon#read 4, iclass 31, count 0 2006.229.02:00:52.22#ibcon#about to read 5, iclass 31, count 0 2006.229.02:00:52.22#ibcon#read 5, iclass 31, count 0 2006.229.02:00:52.22#ibcon#about to read 6, iclass 31, count 0 2006.229.02:00:52.22#ibcon#read 6, iclass 31, count 0 2006.229.02:00:52.22#ibcon#end of sib2, iclass 31, count 0 2006.229.02:00:52.22#ibcon#*after write, iclass 31, count 0 2006.229.02:00:52.22#ibcon#*before return 0, iclass 31, count 0 2006.229.02:00:52.22#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:52.22#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:52.22#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:00:52.22#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:00:52.22$vck44/va=4,7 2006.229.02:00:52.22#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.02:00:52.22#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.02:00:52.22#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:52.22#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:52.28#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:52.28#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:52.28#ibcon#enter wrdev, iclass 33, count 2 2006.229.02:00:52.28#ibcon#first serial, iclass 33, count 2 2006.229.02:00:52.28#ibcon#enter sib2, iclass 33, count 2 2006.229.02:00:52.28#ibcon#flushed, iclass 33, count 2 2006.229.02:00:52.28#ibcon#about to write, iclass 33, count 2 2006.229.02:00:52.28#ibcon#wrote, iclass 33, count 2 2006.229.02:00:52.28#ibcon#about to read 3, iclass 33, count 2 2006.229.02:00:52.30#ibcon#read 3, iclass 33, count 2 2006.229.02:00:52.30#ibcon#about to read 4, iclass 33, count 2 2006.229.02:00:52.30#ibcon#read 4, iclass 33, count 2 2006.229.02:00:52.30#ibcon#about to read 5, iclass 33, count 2 2006.229.02:00:52.30#ibcon#read 5, iclass 33, count 2 2006.229.02:00:52.30#ibcon#about to read 6, iclass 33, count 2 2006.229.02:00:52.30#ibcon#read 6, iclass 33, count 2 2006.229.02:00:52.30#ibcon#end of sib2, iclass 33, count 2 2006.229.02:00:52.30#ibcon#*mode == 0, iclass 33, count 2 2006.229.02:00:52.30#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.02:00:52.30#ibcon#[25=AT04-07\r\n] 2006.229.02:00:52.30#ibcon#*before write, iclass 33, count 2 2006.229.02:00:52.30#ibcon#enter sib2, iclass 33, count 2 2006.229.02:00:52.30#ibcon#flushed, iclass 33, count 2 2006.229.02:00:52.30#ibcon#about to write, iclass 33, count 2 2006.229.02:00:52.30#ibcon#wrote, iclass 33, count 2 2006.229.02:00:52.30#ibcon#about to read 3, iclass 33, count 2 2006.229.02:00:52.33#ibcon#read 3, iclass 33, count 2 2006.229.02:00:52.33#ibcon#about to read 4, iclass 33, count 2 2006.229.02:00:52.33#ibcon#read 4, iclass 33, count 2 2006.229.02:00:52.33#ibcon#about to read 5, iclass 33, count 2 2006.229.02:00:52.33#ibcon#read 5, iclass 33, count 2 2006.229.02:00:52.33#ibcon#about to read 6, iclass 33, count 2 2006.229.02:00:52.33#ibcon#read 6, iclass 33, count 2 2006.229.02:00:52.33#ibcon#end of sib2, iclass 33, count 2 2006.229.02:00:52.33#ibcon#*after write, iclass 33, count 2 2006.229.02:00:52.33#ibcon#*before return 0, iclass 33, count 2 2006.229.02:00:52.33#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:52.33#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:52.33#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.02:00:52.33#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:52.33#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:52.45#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:52.45#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:52.45#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:00:52.45#ibcon#first serial, iclass 33, count 0 2006.229.02:00:52.45#ibcon#enter sib2, iclass 33, count 0 2006.229.02:00:52.45#ibcon#flushed, iclass 33, count 0 2006.229.02:00:52.45#ibcon#about to write, iclass 33, count 0 2006.229.02:00:52.45#ibcon#wrote, iclass 33, count 0 2006.229.02:00:52.45#ibcon#about to read 3, iclass 33, count 0 2006.229.02:00:52.47#ibcon#read 3, iclass 33, count 0 2006.229.02:00:52.47#ibcon#about to read 4, iclass 33, count 0 2006.229.02:00:52.47#ibcon#read 4, iclass 33, count 0 2006.229.02:00:52.47#ibcon#about to read 5, iclass 33, count 0 2006.229.02:00:52.47#ibcon#read 5, iclass 33, count 0 2006.229.02:00:52.47#ibcon#about to read 6, iclass 33, count 0 2006.229.02:00:52.47#ibcon#read 6, iclass 33, count 0 2006.229.02:00:52.47#ibcon#end of sib2, iclass 33, count 0 2006.229.02:00:52.47#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:00:52.47#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:00:52.47#ibcon#[25=USB\r\n] 2006.229.02:00:52.47#ibcon#*before write, iclass 33, count 0 2006.229.02:00:52.47#ibcon#enter sib2, iclass 33, count 0 2006.229.02:00:52.47#ibcon#flushed, iclass 33, count 0 2006.229.02:00:52.47#ibcon#about to write, iclass 33, count 0 2006.229.02:00:52.47#ibcon#wrote, iclass 33, count 0 2006.229.02:00:52.47#ibcon#about to read 3, iclass 33, count 0 2006.229.02:00:52.50#ibcon#read 3, iclass 33, count 0 2006.229.02:00:52.50#ibcon#about to read 4, iclass 33, count 0 2006.229.02:00:52.50#ibcon#read 4, iclass 33, count 0 2006.229.02:00:52.50#ibcon#about to read 5, iclass 33, count 0 2006.229.02:00:52.50#ibcon#read 5, iclass 33, count 0 2006.229.02:00:52.50#ibcon#about to read 6, iclass 33, count 0 2006.229.02:00:52.50#ibcon#read 6, iclass 33, count 0 2006.229.02:00:52.50#ibcon#end of sib2, iclass 33, count 0 2006.229.02:00:52.50#ibcon#*after write, iclass 33, count 0 2006.229.02:00:52.50#ibcon#*before return 0, iclass 33, count 0 2006.229.02:00:52.50#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:52.50#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:52.50#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:00:52.50#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:00:52.50$vck44/valo=5,734.99 2006.229.02:00:52.50#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.02:00:52.50#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.02:00:52.50#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:52.50#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:52.50#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:52.50#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:52.50#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:00:52.50#ibcon#first serial, iclass 35, count 0 2006.229.02:00:52.50#ibcon#enter sib2, iclass 35, count 0 2006.229.02:00:52.50#ibcon#flushed, iclass 35, count 0 2006.229.02:00:52.50#ibcon#about to write, iclass 35, count 0 2006.229.02:00:52.50#ibcon#wrote, iclass 35, count 0 2006.229.02:00:52.50#ibcon#about to read 3, iclass 35, count 0 2006.229.02:00:52.52#ibcon#read 3, iclass 35, count 0 2006.229.02:00:52.52#ibcon#about to read 4, iclass 35, count 0 2006.229.02:00:52.52#ibcon#read 4, iclass 35, count 0 2006.229.02:00:52.52#ibcon#about to read 5, iclass 35, count 0 2006.229.02:00:52.52#ibcon#read 5, iclass 35, count 0 2006.229.02:00:52.52#ibcon#about to read 6, iclass 35, count 0 2006.229.02:00:52.52#ibcon#read 6, iclass 35, count 0 2006.229.02:00:52.52#ibcon#end of sib2, iclass 35, count 0 2006.229.02:00:52.52#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:00:52.52#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:00:52.52#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:00:52.52#ibcon#*before write, iclass 35, count 0 2006.229.02:00:52.52#ibcon#enter sib2, iclass 35, count 0 2006.229.02:00:52.52#ibcon#flushed, iclass 35, count 0 2006.229.02:00:52.52#ibcon#about to write, iclass 35, count 0 2006.229.02:00:52.52#ibcon#wrote, iclass 35, count 0 2006.229.02:00:52.52#ibcon#about to read 3, iclass 35, count 0 2006.229.02:00:52.56#ibcon#read 3, iclass 35, count 0 2006.229.02:00:52.56#ibcon#about to read 4, iclass 35, count 0 2006.229.02:00:52.56#ibcon#read 4, iclass 35, count 0 2006.229.02:00:52.56#ibcon#about to read 5, iclass 35, count 0 2006.229.02:00:52.56#ibcon#read 5, iclass 35, count 0 2006.229.02:00:52.56#ibcon#about to read 6, iclass 35, count 0 2006.229.02:00:52.56#ibcon#read 6, iclass 35, count 0 2006.229.02:00:52.56#ibcon#end of sib2, iclass 35, count 0 2006.229.02:00:52.56#ibcon#*after write, iclass 35, count 0 2006.229.02:00:52.56#ibcon#*before return 0, iclass 35, count 0 2006.229.02:00:52.56#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:52.56#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:52.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:00:52.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:00:52.56$vck44/va=5,4 2006.229.02:00:52.56#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.02:00:52.56#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.02:00:52.56#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:52.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:52.62#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:52.62#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:52.62#ibcon#enter wrdev, iclass 37, count 2 2006.229.02:00:52.62#ibcon#first serial, iclass 37, count 2 2006.229.02:00:52.62#ibcon#enter sib2, iclass 37, count 2 2006.229.02:00:52.62#ibcon#flushed, iclass 37, count 2 2006.229.02:00:52.62#ibcon#about to write, iclass 37, count 2 2006.229.02:00:52.62#ibcon#wrote, iclass 37, count 2 2006.229.02:00:52.62#ibcon#about to read 3, iclass 37, count 2 2006.229.02:00:52.64#ibcon#read 3, iclass 37, count 2 2006.229.02:00:52.64#ibcon#about to read 4, iclass 37, count 2 2006.229.02:00:52.64#ibcon#read 4, iclass 37, count 2 2006.229.02:00:52.64#ibcon#about to read 5, iclass 37, count 2 2006.229.02:00:52.64#ibcon#read 5, iclass 37, count 2 2006.229.02:00:52.64#ibcon#about to read 6, iclass 37, count 2 2006.229.02:00:52.64#ibcon#read 6, iclass 37, count 2 2006.229.02:00:52.64#ibcon#end of sib2, iclass 37, count 2 2006.229.02:00:52.64#ibcon#*mode == 0, iclass 37, count 2 2006.229.02:00:52.64#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.02:00:52.64#ibcon#[25=AT05-04\r\n] 2006.229.02:00:52.64#ibcon#*before write, iclass 37, count 2 2006.229.02:00:52.64#ibcon#enter sib2, iclass 37, count 2 2006.229.02:00:52.64#ibcon#flushed, iclass 37, count 2 2006.229.02:00:52.64#ibcon#about to write, iclass 37, count 2 2006.229.02:00:52.64#ibcon#wrote, iclass 37, count 2 2006.229.02:00:52.64#ibcon#about to read 3, iclass 37, count 2 2006.229.02:00:52.67#ibcon#read 3, iclass 37, count 2 2006.229.02:00:52.67#ibcon#about to read 4, iclass 37, count 2 2006.229.02:00:52.67#ibcon#read 4, iclass 37, count 2 2006.229.02:00:52.67#ibcon#about to read 5, iclass 37, count 2 2006.229.02:00:52.67#ibcon#read 5, iclass 37, count 2 2006.229.02:00:52.67#ibcon#about to read 6, iclass 37, count 2 2006.229.02:00:52.67#ibcon#read 6, iclass 37, count 2 2006.229.02:00:52.67#ibcon#end of sib2, iclass 37, count 2 2006.229.02:00:52.67#ibcon#*after write, iclass 37, count 2 2006.229.02:00:52.67#ibcon#*before return 0, iclass 37, count 2 2006.229.02:00:52.67#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:52.67#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:52.67#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.02:00:52.67#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:52.67#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:52.79#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:52.79#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:52.79#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:00:52.79#ibcon#first serial, iclass 37, count 0 2006.229.02:00:52.79#ibcon#enter sib2, iclass 37, count 0 2006.229.02:00:52.79#ibcon#flushed, iclass 37, count 0 2006.229.02:00:52.79#ibcon#about to write, iclass 37, count 0 2006.229.02:00:52.79#ibcon#wrote, iclass 37, count 0 2006.229.02:00:52.79#ibcon#about to read 3, iclass 37, count 0 2006.229.02:00:52.81#ibcon#read 3, iclass 37, count 0 2006.229.02:00:52.81#ibcon#about to read 4, iclass 37, count 0 2006.229.02:00:52.81#ibcon#read 4, iclass 37, count 0 2006.229.02:00:52.81#ibcon#about to read 5, iclass 37, count 0 2006.229.02:00:52.81#ibcon#read 5, iclass 37, count 0 2006.229.02:00:52.81#ibcon#about to read 6, iclass 37, count 0 2006.229.02:00:52.81#ibcon#read 6, iclass 37, count 0 2006.229.02:00:52.81#ibcon#end of sib2, iclass 37, count 0 2006.229.02:00:52.81#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:00:52.81#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:00:52.81#ibcon#[25=USB\r\n] 2006.229.02:00:52.81#ibcon#*before write, iclass 37, count 0 2006.229.02:00:52.81#ibcon#enter sib2, iclass 37, count 0 2006.229.02:00:52.81#ibcon#flushed, iclass 37, count 0 2006.229.02:00:52.81#ibcon#about to write, iclass 37, count 0 2006.229.02:00:52.81#ibcon#wrote, iclass 37, count 0 2006.229.02:00:52.81#ibcon#about to read 3, iclass 37, count 0 2006.229.02:00:52.84#ibcon#read 3, iclass 37, count 0 2006.229.02:00:52.84#ibcon#about to read 4, iclass 37, count 0 2006.229.02:00:52.84#ibcon#read 4, iclass 37, count 0 2006.229.02:00:52.84#ibcon#about to read 5, iclass 37, count 0 2006.229.02:00:52.84#ibcon#read 5, iclass 37, count 0 2006.229.02:00:52.84#ibcon#about to read 6, iclass 37, count 0 2006.229.02:00:52.84#ibcon#read 6, iclass 37, count 0 2006.229.02:00:52.84#ibcon#end of sib2, iclass 37, count 0 2006.229.02:00:52.84#ibcon#*after write, iclass 37, count 0 2006.229.02:00:52.84#ibcon#*before return 0, iclass 37, count 0 2006.229.02:00:52.84#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:52.84#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:52.84#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:00:52.84#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:00:52.84$vck44/valo=6,814.99 2006.229.02:00:52.84#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.02:00:52.84#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.02:00:52.84#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:52.84#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:52.84#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:52.84#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:52.84#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:00:52.84#ibcon#first serial, iclass 39, count 0 2006.229.02:00:52.84#ibcon#enter sib2, iclass 39, count 0 2006.229.02:00:52.84#ibcon#flushed, iclass 39, count 0 2006.229.02:00:52.84#ibcon#about to write, iclass 39, count 0 2006.229.02:00:52.84#ibcon#wrote, iclass 39, count 0 2006.229.02:00:52.84#ibcon#about to read 3, iclass 39, count 0 2006.229.02:00:52.86#ibcon#read 3, iclass 39, count 0 2006.229.02:00:52.86#ibcon#about to read 4, iclass 39, count 0 2006.229.02:00:52.86#ibcon#read 4, iclass 39, count 0 2006.229.02:00:52.86#ibcon#about to read 5, iclass 39, count 0 2006.229.02:00:52.86#ibcon#read 5, iclass 39, count 0 2006.229.02:00:52.86#ibcon#about to read 6, iclass 39, count 0 2006.229.02:00:52.86#ibcon#read 6, iclass 39, count 0 2006.229.02:00:52.86#ibcon#end of sib2, iclass 39, count 0 2006.229.02:00:52.86#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:00:52.86#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:00:52.86#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:00:52.86#ibcon#*before write, iclass 39, count 0 2006.229.02:00:52.86#ibcon#enter sib2, iclass 39, count 0 2006.229.02:00:52.86#ibcon#flushed, iclass 39, count 0 2006.229.02:00:52.86#ibcon#about to write, iclass 39, count 0 2006.229.02:00:52.86#ibcon#wrote, iclass 39, count 0 2006.229.02:00:52.86#ibcon#about to read 3, iclass 39, count 0 2006.229.02:00:52.90#ibcon#read 3, iclass 39, count 0 2006.229.02:00:52.90#ibcon#about to read 4, iclass 39, count 0 2006.229.02:00:52.90#ibcon#read 4, iclass 39, count 0 2006.229.02:00:52.90#ibcon#about to read 5, iclass 39, count 0 2006.229.02:00:52.90#ibcon#read 5, iclass 39, count 0 2006.229.02:00:52.90#ibcon#about to read 6, iclass 39, count 0 2006.229.02:00:52.90#ibcon#read 6, iclass 39, count 0 2006.229.02:00:52.90#ibcon#end of sib2, iclass 39, count 0 2006.229.02:00:52.90#ibcon#*after write, iclass 39, count 0 2006.229.02:00:52.90#ibcon#*before return 0, iclass 39, count 0 2006.229.02:00:52.90#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:52.90#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:52.90#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:00:52.90#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:00:52.90$vck44/va=6,4 2006.229.02:00:52.90#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.02:00:52.90#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.02:00:52.90#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:52.90#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:52.96#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:52.96#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:52.96#ibcon#enter wrdev, iclass 3, count 2 2006.229.02:00:52.96#ibcon#first serial, iclass 3, count 2 2006.229.02:00:52.96#ibcon#enter sib2, iclass 3, count 2 2006.229.02:00:52.96#ibcon#flushed, iclass 3, count 2 2006.229.02:00:52.96#ibcon#about to write, iclass 3, count 2 2006.229.02:00:52.96#ibcon#wrote, iclass 3, count 2 2006.229.02:00:52.96#ibcon#about to read 3, iclass 3, count 2 2006.229.02:00:52.98#ibcon#read 3, iclass 3, count 2 2006.229.02:00:52.98#ibcon#about to read 4, iclass 3, count 2 2006.229.02:00:52.98#ibcon#read 4, iclass 3, count 2 2006.229.02:00:52.98#ibcon#about to read 5, iclass 3, count 2 2006.229.02:00:52.98#ibcon#read 5, iclass 3, count 2 2006.229.02:00:52.98#ibcon#about to read 6, iclass 3, count 2 2006.229.02:00:52.98#ibcon#read 6, iclass 3, count 2 2006.229.02:00:52.98#ibcon#end of sib2, iclass 3, count 2 2006.229.02:00:52.98#ibcon#*mode == 0, iclass 3, count 2 2006.229.02:00:52.98#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.02:00:52.98#ibcon#[25=AT06-04\r\n] 2006.229.02:00:52.98#ibcon#*before write, iclass 3, count 2 2006.229.02:00:52.98#ibcon#enter sib2, iclass 3, count 2 2006.229.02:00:52.98#ibcon#flushed, iclass 3, count 2 2006.229.02:00:52.98#ibcon#about to write, iclass 3, count 2 2006.229.02:00:52.98#ibcon#wrote, iclass 3, count 2 2006.229.02:00:52.98#ibcon#about to read 3, iclass 3, count 2 2006.229.02:00:53.01#ibcon#read 3, iclass 3, count 2 2006.229.02:00:53.01#ibcon#about to read 4, iclass 3, count 2 2006.229.02:00:53.01#ibcon#read 4, iclass 3, count 2 2006.229.02:00:53.01#ibcon#about to read 5, iclass 3, count 2 2006.229.02:00:53.01#ibcon#read 5, iclass 3, count 2 2006.229.02:00:53.01#ibcon#about to read 6, iclass 3, count 2 2006.229.02:00:53.01#ibcon#read 6, iclass 3, count 2 2006.229.02:00:53.01#ibcon#end of sib2, iclass 3, count 2 2006.229.02:00:53.01#ibcon#*after write, iclass 3, count 2 2006.229.02:00:53.01#ibcon#*before return 0, iclass 3, count 2 2006.229.02:00:53.01#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:53.01#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:53.01#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.02:00:53.01#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:53.01#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:53.13#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:53.13#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:53.13#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:00:53.13#ibcon#first serial, iclass 3, count 0 2006.229.02:00:53.13#ibcon#enter sib2, iclass 3, count 0 2006.229.02:00:53.13#ibcon#flushed, iclass 3, count 0 2006.229.02:00:53.13#ibcon#about to write, iclass 3, count 0 2006.229.02:00:53.13#ibcon#wrote, iclass 3, count 0 2006.229.02:00:53.13#ibcon#about to read 3, iclass 3, count 0 2006.229.02:00:53.15#ibcon#read 3, iclass 3, count 0 2006.229.02:00:53.15#ibcon#about to read 4, iclass 3, count 0 2006.229.02:00:53.15#ibcon#read 4, iclass 3, count 0 2006.229.02:00:53.15#ibcon#about to read 5, iclass 3, count 0 2006.229.02:00:53.15#ibcon#read 5, iclass 3, count 0 2006.229.02:00:53.15#ibcon#about to read 6, iclass 3, count 0 2006.229.02:00:53.15#ibcon#read 6, iclass 3, count 0 2006.229.02:00:53.15#ibcon#end of sib2, iclass 3, count 0 2006.229.02:00:53.15#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:00:53.15#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:00:53.15#ibcon#[25=USB\r\n] 2006.229.02:00:53.15#ibcon#*before write, iclass 3, count 0 2006.229.02:00:53.15#ibcon#enter sib2, iclass 3, count 0 2006.229.02:00:53.15#ibcon#flushed, iclass 3, count 0 2006.229.02:00:53.15#ibcon#about to write, iclass 3, count 0 2006.229.02:00:53.15#ibcon#wrote, iclass 3, count 0 2006.229.02:00:53.15#ibcon#about to read 3, iclass 3, count 0 2006.229.02:00:53.18#ibcon#read 3, iclass 3, count 0 2006.229.02:00:53.18#ibcon#about to read 4, iclass 3, count 0 2006.229.02:00:53.18#ibcon#read 4, iclass 3, count 0 2006.229.02:00:53.18#ibcon#about to read 5, iclass 3, count 0 2006.229.02:00:53.18#ibcon#read 5, iclass 3, count 0 2006.229.02:00:53.18#ibcon#about to read 6, iclass 3, count 0 2006.229.02:00:53.18#ibcon#read 6, iclass 3, count 0 2006.229.02:00:53.18#ibcon#end of sib2, iclass 3, count 0 2006.229.02:00:53.18#ibcon#*after write, iclass 3, count 0 2006.229.02:00:53.18#ibcon#*before return 0, iclass 3, count 0 2006.229.02:00:53.18#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:53.18#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:53.18#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:00:53.18#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:00:53.18$vck44/valo=7,864.99 2006.229.02:00:53.18#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.02:00:53.18#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.02:00:53.18#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:53.18#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:53.18#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:53.18#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:53.18#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:00:53.18#ibcon#first serial, iclass 5, count 0 2006.229.02:00:53.18#ibcon#enter sib2, iclass 5, count 0 2006.229.02:00:53.18#ibcon#flushed, iclass 5, count 0 2006.229.02:00:53.18#ibcon#about to write, iclass 5, count 0 2006.229.02:00:53.18#ibcon#wrote, iclass 5, count 0 2006.229.02:00:53.18#ibcon#about to read 3, iclass 5, count 0 2006.229.02:00:53.20#ibcon#read 3, iclass 5, count 0 2006.229.02:00:53.20#ibcon#about to read 4, iclass 5, count 0 2006.229.02:00:53.20#ibcon#read 4, iclass 5, count 0 2006.229.02:00:53.20#ibcon#about to read 5, iclass 5, count 0 2006.229.02:00:53.20#ibcon#read 5, iclass 5, count 0 2006.229.02:00:53.20#ibcon#about to read 6, iclass 5, count 0 2006.229.02:00:53.20#ibcon#read 6, iclass 5, count 0 2006.229.02:00:53.20#ibcon#end of sib2, iclass 5, count 0 2006.229.02:00:53.20#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:00:53.20#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:00:53.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:00:53.20#ibcon#*before write, iclass 5, count 0 2006.229.02:00:53.20#ibcon#enter sib2, iclass 5, count 0 2006.229.02:00:53.20#ibcon#flushed, iclass 5, count 0 2006.229.02:00:53.20#ibcon#about to write, iclass 5, count 0 2006.229.02:00:53.20#ibcon#wrote, iclass 5, count 0 2006.229.02:00:53.20#ibcon#about to read 3, iclass 5, count 0 2006.229.02:00:53.24#ibcon#read 3, iclass 5, count 0 2006.229.02:00:53.24#ibcon#about to read 4, iclass 5, count 0 2006.229.02:00:53.24#ibcon#read 4, iclass 5, count 0 2006.229.02:00:53.24#ibcon#about to read 5, iclass 5, count 0 2006.229.02:00:53.24#ibcon#read 5, iclass 5, count 0 2006.229.02:00:53.24#ibcon#about to read 6, iclass 5, count 0 2006.229.02:00:53.24#ibcon#read 6, iclass 5, count 0 2006.229.02:00:53.24#ibcon#end of sib2, iclass 5, count 0 2006.229.02:00:53.24#ibcon#*after write, iclass 5, count 0 2006.229.02:00:53.24#ibcon#*before return 0, iclass 5, count 0 2006.229.02:00:53.24#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:53.24#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:53.24#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:00:53.24#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:00:53.24$vck44/va=7,5 2006.229.02:00:53.24#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.02:00:53.24#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.02:00:53.24#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:53.24#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:53.30#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:53.30#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:53.30#ibcon#enter wrdev, iclass 7, count 2 2006.229.02:00:53.30#ibcon#first serial, iclass 7, count 2 2006.229.02:00:53.30#ibcon#enter sib2, iclass 7, count 2 2006.229.02:00:53.30#ibcon#flushed, iclass 7, count 2 2006.229.02:00:53.30#ibcon#about to write, iclass 7, count 2 2006.229.02:00:53.30#ibcon#wrote, iclass 7, count 2 2006.229.02:00:53.30#ibcon#about to read 3, iclass 7, count 2 2006.229.02:00:53.32#ibcon#read 3, iclass 7, count 2 2006.229.02:00:53.32#ibcon#about to read 4, iclass 7, count 2 2006.229.02:00:53.32#ibcon#read 4, iclass 7, count 2 2006.229.02:00:53.32#ibcon#about to read 5, iclass 7, count 2 2006.229.02:00:53.32#ibcon#read 5, iclass 7, count 2 2006.229.02:00:53.32#ibcon#about to read 6, iclass 7, count 2 2006.229.02:00:53.32#ibcon#read 6, iclass 7, count 2 2006.229.02:00:53.32#ibcon#end of sib2, iclass 7, count 2 2006.229.02:00:53.32#ibcon#*mode == 0, iclass 7, count 2 2006.229.02:00:53.32#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.02:00:53.32#ibcon#[25=AT07-05\r\n] 2006.229.02:00:53.32#ibcon#*before write, iclass 7, count 2 2006.229.02:00:53.32#ibcon#enter sib2, iclass 7, count 2 2006.229.02:00:53.32#ibcon#flushed, iclass 7, count 2 2006.229.02:00:53.32#ibcon#about to write, iclass 7, count 2 2006.229.02:00:53.32#ibcon#wrote, iclass 7, count 2 2006.229.02:00:53.32#ibcon#about to read 3, iclass 7, count 2 2006.229.02:00:53.35#ibcon#read 3, iclass 7, count 2 2006.229.02:00:53.35#ibcon#about to read 4, iclass 7, count 2 2006.229.02:00:53.35#ibcon#read 4, iclass 7, count 2 2006.229.02:00:53.35#ibcon#about to read 5, iclass 7, count 2 2006.229.02:00:53.35#ibcon#read 5, iclass 7, count 2 2006.229.02:00:53.35#ibcon#about to read 6, iclass 7, count 2 2006.229.02:00:53.35#ibcon#read 6, iclass 7, count 2 2006.229.02:00:53.35#ibcon#end of sib2, iclass 7, count 2 2006.229.02:00:53.35#ibcon#*after write, iclass 7, count 2 2006.229.02:00:53.35#ibcon#*before return 0, iclass 7, count 2 2006.229.02:00:53.35#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:53.35#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:53.35#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.02:00:53.35#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:53.35#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:53.47#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:53.47#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:53.47#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:00:53.47#ibcon#first serial, iclass 7, count 0 2006.229.02:00:53.47#ibcon#enter sib2, iclass 7, count 0 2006.229.02:00:53.47#ibcon#flushed, iclass 7, count 0 2006.229.02:00:53.47#ibcon#about to write, iclass 7, count 0 2006.229.02:00:53.47#ibcon#wrote, iclass 7, count 0 2006.229.02:00:53.47#ibcon#about to read 3, iclass 7, count 0 2006.229.02:00:53.49#ibcon#read 3, iclass 7, count 0 2006.229.02:00:53.49#ibcon#about to read 4, iclass 7, count 0 2006.229.02:00:53.49#ibcon#read 4, iclass 7, count 0 2006.229.02:00:53.49#ibcon#about to read 5, iclass 7, count 0 2006.229.02:00:53.49#ibcon#read 5, iclass 7, count 0 2006.229.02:00:53.49#ibcon#about to read 6, iclass 7, count 0 2006.229.02:00:53.49#ibcon#read 6, iclass 7, count 0 2006.229.02:00:53.49#ibcon#end of sib2, iclass 7, count 0 2006.229.02:00:53.49#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:00:53.49#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:00:53.49#ibcon#[25=USB\r\n] 2006.229.02:00:53.49#ibcon#*before write, iclass 7, count 0 2006.229.02:00:53.49#ibcon#enter sib2, iclass 7, count 0 2006.229.02:00:53.49#ibcon#flushed, iclass 7, count 0 2006.229.02:00:53.49#ibcon#about to write, iclass 7, count 0 2006.229.02:00:53.49#ibcon#wrote, iclass 7, count 0 2006.229.02:00:53.49#ibcon#about to read 3, iclass 7, count 0 2006.229.02:00:53.52#ibcon#read 3, iclass 7, count 0 2006.229.02:00:53.52#ibcon#about to read 4, iclass 7, count 0 2006.229.02:00:53.52#ibcon#read 4, iclass 7, count 0 2006.229.02:00:53.52#ibcon#about to read 5, iclass 7, count 0 2006.229.02:00:53.52#ibcon#read 5, iclass 7, count 0 2006.229.02:00:53.52#ibcon#about to read 6, iclass 7, count 0 2006.229.02:00:53.52#ibcon#read 6, iclass 7, count 0 2006.229.02:00:53.52#ibcon#end of sib2, iclass 7, count 0 2006.229.02:00:53.52#ibcon#*after write, iclass 7, count 0 2006.229.02:00:53.52#ibcon#*before return 0, iclass 7, count 0 2006.229.02:00:53.52#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:53.52#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:53.52#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:00:53.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:00:53.52$vck44/valo=8,884.99 2006.229.02:00:53.52#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:00:53.52#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:00:53.52#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:53.52#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:53.52#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:53.52#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:53.52#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:00:53.52#ibcon#first serial, iclass 11, count 0 2006.229.02:00:53.52#ibcon#enter sib2, iclass 11, count 0 2006.229.02:00:53.52#ibcon#flushed, iclass 11, count 0 2006.229.02:00:53.52#ibcon#about to write, iclass 11, count 0 2006.229.02:00:53.52#ibcon#wrote, iclass 11, count 0 2006.229.02:00:53.52#ibcon#about to read 3, iclass 11, count 0 2006.229.02:00:53.54#ibcon#read 3, iclass 11, count 0 2006.229.02:00:53.54#ibcon#about to read 4, iclass 11, count 0 2006.229.02:00:53.54#ibcon#read 4, iclass 11, count 0 2006.229.02:00:53.54#ibcon#about to read 5, iclass 11, count 0 2006.229.02:00:53.54#ibcon#read 5, iclass 11, count 0 2006.229.02:00:53.54#ibcon#about to read 6, iclass 11, count 0 2006.229.02:00:53.54#ibcon#read 6, iclass 11, count 0 2006.229.02:00:53.54#ibcon#end of sib2, iclass 11, count 0 2006.229.02:00:53.54#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:00:53.54#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:00:53.54#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:00:53.54#ibcon#*before write, iclass 11, count 0 2006.229.02:00:53.54#ibcon#enter sib2, iclass 11, count 0 2006.229.02:00:53.54#ibcon#flushed, iclass 11, count 0 2006.229.02:00:53.54#ibcon#about to write, iclass 11, count 0 2006.229.02:00:53.54#ibcon#wrote, iclass 11, count 0 2006.229.02:00:53.54#ibcon#about to read 3, iclass 11, count 0 2006.229.02:00:53.58#ibcon#read 3, iclass 11, count 0 2006.229.02:00:53.58#ibcon#about to read 4, iclass 11, count 0 2006.229.02:00:53.58#ibcon#read 4, iclass 11, count 0 2006.229.02:00:53.58#ibcon#about to read 5, iclass 11, count 0 2006.229.02:00:53.58#ibcon#read 5, iclass 11, count 0 2006.229.02:00:53.58#ibcon#about to read 6, iclass 11, count 0 2006.229.02:00:53.58#ibcon#read 6, iclass 11, count 0 2006.229.02:00:53.58#ibcon#end of sib2, iclass 11, count 0 2006.229.02:00:53.58#ibcon#*after write, iclass 11, count 0 2006.229.02:00:53.58#ibcon#*before return 0, iclass 11, count 0 2006.229.02:00:53.58#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:53.58#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:53.58#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:00:53.58#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:00:53.58$vck44/va=8,6 2006.229.02:00:53.58#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.02:00:53.58#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.02:00:53.58#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:53.58#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:00:53.64#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:00:53.64#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:00:53.64#ibcon#enter wrdev, iclass 13, count 2 2006.229.02:00:53.64#ibcon#first serial, iclass 13, count 2 2006.229.02:00:53.64#ibcon#enter sib2, iclass 13, count 2 2006.229.02:00:53.64#ibcon#flushed, iclass 13, count 2 2006.229.02:00:53.64#ibcon#about to write, iclass 13, count 2 2006.229.02:00:53.64#ibcon#wrote, iclass 13, count 2 2006.229.02:00:53.64#ibcon#about to read 3, iclass 13, count 2 2006.229.02:00:53.66#ibcon#read 3, iclass 13, count 2 2006.229.02:00:53.66#ibcon#about to read 4, iclass 13, count 2 2006.229.02:00:53.66#ibcon#read 4, iclass 13, count 2 2006.229.02:00:53.66#ibcon#about to read 5, iclass 13, count 2 2006.229.02:00:53.66#ibcon#read 5, iclass 13, count 2 2006.229.02:00:53.66#ibcon#about to read 6, iclass 13, count 2 2006.229.02:00:53.66#ibcon#read 6, iclass 13, count 2 2006.229.02:00:53.66#ibcon#end of sib2, iclass 13, count 2 2006.229.02:00:53.66#ibcon#*mode == 0, iclass 13, count 2 2006.229.02:00:53.66#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.02:00:53.66#ibcon#[25=AT08-06\r\n] 2006.229.02:00:53.66#ibcon#*before write, iclass 13, count 2 2006.229.02:00:53.66#ibcon#enter sib2, iclass 13, count 2 2006.229.02:00:53.66#ibcon#flushed, iclass 13, count 2 2006.229.02:00:53.66#ibcon#about to write, iclass 13, count 2 2006.229.02:00:53.66#ibcon#wrote, iclass 13, count 2 2006.229.02:00:53.66#ibcon#about to read 3, iclass 13, count 2 2006.229.02:00:53.69#ibcon#read 3, iclass 13, count 2 2006.229.02:00:53.69#ibcon#about to read 4, iclass 13, count 2 2006.229.02:00:53.69#ibcon#read 4, iclass 13, count 2 2006.229.02:00:53.69#ibcon#about to read 5, iclass 13, count 2 2006.229.02:00:53.69#ibcon#read 5, iclass 13, count 2 2006.229.02:00:53.69#ibcon#about to read 6, iclass 13, count 2 2006.229.02:00:53.69#ibcon#read 6, iclass 13, count 2 2006.229.02:00:53.69#ibcon#end of sib2, iclass 13, count 2 2006.229.02:00:53.69#ibcon#*after write, iclass 13, count 2 2006.229.02:00:53.69#ibcon#*before return 0, iclass 13, count 2 2006.229.02:00:53.69#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:00:53.69#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:00:53.69#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.02:00:53.69#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:53.69#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:00:53.81#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:00:53.81#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:00:53.81#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:00:53.81#ibcon#first serial, iclass 13, count 0 2006.229.02:00:53.81#ibcon#enter sib2, iclass 13, count 0 2006.229.02:00:53.81#ibcon#flushed, iclass 13, count 0 2006.229.02:00:53.81#ibcon#about to write, iclass 13, count 0 2006.229.02:00:53.81#ibcon#wrote, iclass 13, count 0 2006.229.02:00:53.81#ibcon#about to read 3, iclass 13, count 0 2006.229.02:00:53.83#ibcon#read 3, iclass 13, count 0 2006.229.02:00:53.83#ibcon#about to read 4, iclass 13, count 0 2006.229.02:00:53.83#ibcon#read 4, iclass 13, count 0 2006.229.02:00:53.83#ibcon#about to read 5, iclass 13, count 0 2006.229.02:00:53.83#ibcon#read 5, iclass 13, count 0 2006.229.02:00:53.83#ibcon#about to read 6, iclass 13, count 0 2006.229.02:00:53.83#ibcon#read 6, iclass 13, count 0 2006.229.02:00:53.83#ibcon#end of sib2, iclass 13, count 0 2006.229.02:00:53.83#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:00:53.83#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:00:53.83#ibcon#[25=USB\r\n] 2006.229.02:00:53.83#ibcon#*before write, iclass 13, count 0 2006.229.02:00:53.83#ibcon#enter sib2, iclass 13, count 0 2006.229.02:00:53.83#ibcon#flushed, iclass 13, count 0 2006.229.02:00:53.83#ibcon#about to write, iclass 13, count 0 2006.229.02:00:53.83#ibcon#wrote, iclass 13, count 0 2006.229.02:00:53.83#ibcon#about to read 3, iclass 13, count 0 2006.229.02:00:53.86#ibcon#read 3, iclass 13, count 0 2006.229.02:00:53.86#ibcon#about to read 4, iclass 13, count 0 2006.229.02:00:53.86#ibcon#read 4, iclass 13, count 0 2006.229.02:00:53.86#ibcon#about to read 5, iclass 13, count 0 2006.229.02:00:53.86#ibcon#read 5, iclass 13, count 0 2006.229.02:00:53.86#ibcon#about to read 6, iclass 13, count 0 2006.229.02:00:53.86#ibcon#read 6, iclass 13, count 0 2006.229.02:00:53.86#ibcon#end of sib2, iclass 13, count 0 2006.229.02:00:53.86#ibcon#*after write, iclass 13, count 0 2006.229.02:00:53.86#ibcon#*before return 0, iclass 13, count 0 2006.229.02:00:53.86#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:00:53.86#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:00:53.86#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:00:53.86#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:00:53.86$vck44/vblo=1,629.99 2006.229.02:00:53.86#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.02:00:53.86#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.02:00:53.86#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:53.86#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:00:53.86#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:00:53.86#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:00:53.86#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:00:53.86#ibcon#first serial, iclass 15, count 0 2006.229.02:00:53.86#ibcon#enter sib2, iclass 15, count 0 2006.229.02:00:53.86#ibcon#flushed, iclass 15, count 0 2006.229.02:00:53.86#ibcon#about to write, iclass 15, count 0 2006.229.02:00:53.86#ibcon#wrote, iclass 15, count 0 2006.229.02:00:53.86#ibcon#about to read 3, iclass 15, count 0 2006.229.02:00:53.88#ibcon#read 3, iclass 15, count 0 2006.229.02:00:53.88#ibcon#about to read 4, iclass 15, count 0 2006.229.02:00:53.88#ibcon#read 4, iclass 15, count 0 2006.229.02:00:53.88#ibcon#about to read 5, iclass 15, count 0 2006.229.02:00:53.88#ibcon#read 5, iclass 15, count 0 2006.229.02:00:53.88#ibcon#about to read 6, iclass 15, count 0 2006.229.02:00:53.88#ibcon#read 6, iclass 15, count 0 2006.229.02:00:53.88#ibcon#end of sib2, iclass 15, count 0 2006.229.02:00:53.88#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:00:53.88#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:00:53.88#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:00:53.88#ibcon#*before write, iclass 15, count 0 2006.229.02:00:53.88#ibcon#enter sib2, iclass 15, count 0 2006.229.02:00:53.88#ibcon#flushed, iclass 15, count 0 2006.229.02:00:53.88#ibcon#about to write, iclass 15, count 0 2006.229.02:00:53.88#ibcon#wrote, iclass 15, count 0 2006.229.02:00:53.88#ibcon#about to read 3, iclass 15, count 0 2006.229.02:00:53.92#ibcon#read 3, iclass 15, count 0 2006.229.02:00:53.92#ibcon#about to read 4, iclass 15, count 0 2006.229.02:00:53.92#ibcon#read 4, iclass 15, count 0 2006.229.02:00:53.92#ibcon#about to read 5, iclass 15, count 0 2006.229.02:00:53.92#ibcon#read 5, iclass 15, count 0 2006.229.02:00:53.92#ibcon#about to read 6, iclass 15, count 0 2006.229.02:00:53.92#ibcon#read 6, iclass 15, count 0 2006.229.02:00:53.92#ibcon#end of sib2, iclass 15, count 0 2006.229.02:00:53.92#ibcon#*after write, iclass 15, count 0 2006.229.02:00:53.92#ibcon#*before return 0, iclass 15, count 0 2006.229.02:00:53.92#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:00:53.92#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:00:53.92#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:00:53.92#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:00:53.92$vck44/vb=1,4 2006.229.02:00:53.92#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.02:00:53.92#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.02:00:53.92#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:53.92#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:00:53.92#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:00:53.92#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:00:53.92#ibcon#enter wrdev, iclass 17, count 2 2006.229.02:00:53.92#ibcon#first serial, iclass 17, count 2 2006.229.02:00:53.92#ibcon#enter sib2, iclass 17, count 2 2006.229.02:00:53.92#ibcon#flushed, iclass 17, count 2 2006.229.02:00:53.92#ibcon#about to write, iclass 17, count 2 2006.229.02:00:53.92#ibcon#wrote, iclass 17, count 2 2006.229.02:00:53.92#ibcon#about to read 3, iclass 17, count 2 2006.229.02:00:53.94#ibcon#read 3, iclass 17, count 2 2006.229.02:00:53.94#ibcon#about to read 4, iclass 17, count 2 2006.229.02:00:53.94#ibcon#read 4, iclass 17, count 2 2006.229.02:00:53.94#ibcon#about to read 5, iclass 17, count 2 2006.229.02:00:53.94#ibcon#read 5, iclass 17, count 2 2006.229.02:00:53.94#ibcon#about to read 6, iclass 17, count 2 2006.229.02:00:53.94#ibcon#read 6, iclass 17, count 2 2006.229.02:00:53.94#ibcon#end of sib2, iclass 17, count 2 2006.229.02:00:53.94#ibcon#*mode == 0, iclass 17, count 2 2006.229.02:00:53.94#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.02:00:53.94#ibcon#[27=AT01-04\r\n] 2006.229.02:00:53.94#ibcon#*before write, iclass 17, count 2 2006.229.02:00:53.94#ibcon#enter sib2, iclass 17, count 2 2006.229.02:00:53.94#ibcon#flushed, iclass 17, count 2 2006.229.02:00:53.94#ibcon#about to write, iclass 17, count 2 2006.229.02:00:53.94#ibcon#wrote, iclass 17, count 2 2006.229.02:00:53.94#ibcon#about to read 3, iclass 17, count 2 2006.229.02:00:53.97#ibcon#read 3, iclass 17, count 2 2006.229.02:00:53.97#ibcon#about to read 4, iclass 17, count 2 2006.229.02:00:53.97#ibcon#read 4, iclass 17, count 2 2006.229.02:00:53.97#ibcon#about to read 5, iclass 17, count 2 2006.229.02:00:53.97#ibcon#read 5, iclass 17, count 2 2006.229.02:00:53.97#ibcon#about to read 6, iclass 17, count 2 2006.229.02:00:53.97#ibcon#read 6, iclass 17, count 2 2006.229.02:00:53.97#ibcon#end of sib2, iclass 17, count 2 2006.229.02:00:53.97#ibcon#*after write, iclass 17, count 2 2006.229.02:00:53.97#ibcon#*before return 0, iclass 17, count 2 2006.229.02:00:53.97#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:00:53.97#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:00:53.97#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.02:00:53.97#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:53.97#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:00:54.09#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:00:54.09#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:00:54.09#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:00:54.09#ibcon#first serial, iclass 17, count 0 2006.229.02:00:54.09#ibcon#enter sib2, iclass 17, count 0 2006.229.02:00:54.09#ibcon#flushed, iclass 17, count 0 2006.229.02:00:54.09#ibcon#about to write, iclass 17, count 0 2006.229.02:00:54.09#ibcon#wrote, iclass 17, count 0 2006.229.02:00:54.09#ibcon#about to read 3, iclass 17, count 0 2006.229.02:00:54.11#ibcon#read 3, iclass 17, count 0 2006.229.02:00:54.11#ibcon#about to read 4, iclass 17, count 0 2006.229.02:00:54.11#ibcon#read 4, iclass 17, count 0 2006.229.02:00:54.11#ibcon#about to read 5, iclass 17, count 0 2006.229.02:00:54.11#ibcon#read 5, iclass 17, count 0 2006.229.02:00:54.11#ibcon#about to read 6, iclass 17, count 0 2006.229.02:00:54.11#ibcon#read 6, iclass 17, count 0 2006.229.02:00:54.11#ibcon#end of sib2, iclass 17, count 0 2006.229.02:00:54.11#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:00:54.11#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:00:54.11#ibcon#[27=USB\r\n] 2006.229.02:00:54.11#ibcon#*before write, iclass 17, count 0 2006.229.02:00:54.11#ibcon#enter sib2, iclass 17, count 0 2006.229.02:00:54.11#ibcon#flushed, iclass 17, count 0 2006.229.02:00:54.11#ibcon#about to write, iclass 17, count 0 2006.229.02:00:54.11#ibcon#wrote, iclass 17, count 0 2006.229.02:00:54.11#ibcon#about to read 3, iclass 17, count 0 2006.229.02:00:54.14#ibcon#read 3, iclass 17, count 0 2006.229.02:00:54.14#ibcon#about to read 4, iclass 17, count 0 2006.229.02:00:54.14#ibcon#read 4, iclass 17, count 0 2006.229.02:00:54.14#ibcon#about to read 5, iclass 17, count 0 2006.229.02:00:54.14#ibcon#read 5, iclass 17, count 0 2006.229.02:00:54.14#ibcon#about to read 6, iclass 17, count 0 2006.229.02:00:54.14#ibcon#read 6, iclass 17, count 0 2006.229.02:00:54.14#ibcon#end of sib2, iclass 17, count 0 2006.229.02:00:54.14#ibcon#*after write, iclass 17, count 0 2006.229.02:00:54.14#ibcon#*before return 0, iclass 17, count 0 2006.229.02:00:54.14#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:00:54.14#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:00:54.14#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:00:54.14#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:00:54.14$vck44/vblo=2,634.99 2006.229.02:00:54.14#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.02:00:54.14#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.02:00:54.14#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:54.14#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:54.14#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:54.14#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:54.14#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:00:54.14#ibcon#first serial, iclass 19, count 0 2006.229.02:00:54.14#ibcon#enter sib2, iclass 19, count 0 2006.229.02:00:54.14#ibcon#flushed, iclass 19, count 0 2006.229.02:00:54.14#ibcon#about to write, iclass 19, count 0 2006.229.02:00:54.14#ibcon#wrote, iclass 19, count 0 2006.229.02:00:54.14#ibcon#about to read 3, iclass 19, count 0 2006.229.02:00:54.16#ibcon#read 3, iclass 19, count 0 2006.229.02:00:54.16#ibcon#about to read 4, iclass 19, count 0 2006.229.02:00:54.16#ibcon#read 4, iclass 19, count 0 2006.229.02:00:54.16#ibcon#about to read 5, iclass 19, count 0 2006.229.02:00:54.16#ibcon#read 5, iclass 19, count 0 2006.229.02:00:54.16#ibcon#about to read 6, iclass 19, count 0 2006.229.02:00:54.16#ibcon#read 6, iclass 19, count 0 2006.229.02:00:54.16#ibcon#end of sib2, iclass 19, count 0 2006.229.02:00:54.16#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:00:54.16#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:00:54.16#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:00:54.16#ibcon#*before write, iclass 19, count 0 2006.229.02:00:54.16#ibcon#enter sib2, iclass 19, count 0 2006.229.02:00:54.16#ibcon#flushed, iclass 19, count 0 2006.229.02:00:54.16#ibcon#about to write, iclass 19, count 0 2006.229.02:00:54.16#ibcon#wrote, iclass 19, count 0 2006.229.02:00:54.16#ibcon#about to read 3, iclass 19, count 0 2006.229.02:00:54.20#ibcon#read 3, iclass 19, count 0 2006.229.02:00:54.20#ibcon#about to read 4, iclass 19, count 0 2006.229.02:00:54.20#ibcon#read 4, iclass 19, count 0 2006.229.02:00:54.20#ibcon#about to read 5, iclass 19, count 0 2006.229.02:00:54.20#ibcon#read 5, iclass 19, count 0 2006.229.02:00:54.20#ibcon#about to read 6, iclass 19, count 0 2006.229.02:00:54.20#ibcon#read 6, iclass 19, count 0 2006.229.02:00:54.20#ibcon#end of sib2, iclass 19, count 0 2006.229.02:00:54.20#ibcon#*after write, iclass 19, count 0 2006.229.02:00:54.20#ibcon#*before return 0, iclass 19, count 0 2006.229.02:00:54.20#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:54.20#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:00:54.20#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:00:54.20#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:00:54.20$vck44/vb=2,4 2006.229.02:00:54.20#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.02:00:54.20#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.02:00:54.20#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:54.20#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:54.26#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:54.26#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:54.26#ibcon#enter wrdev, iclass 21, count 2 2006.229.02:00:54.26#ibcon#first serial, iclass 21, count 2 2006.229.02:00:54.26#ibcon#enter sib2, iclass 21, count 2 2006.229.02:00:54.26#ibcon#flushed, iclass 21, count 2 2006.229.02:00:54.26#ibcon#about to write, iclass 21, count 2 2006.229.02:00:54.26#ibcon#wrote, iclass 21, count 2 2006.229.02:00:54.26#ibcon#about to read 3, iclass 21, count 2 2006.229.02:00:54.28#ibcon#read 3, iclass 21, count 2 2006.229.02:00:54.28#ibcon#about to read 4, iclass 21, count 2 2006.229.02:00:54.28#ibcon#read 4, iclass 21, count 2 2006.229.02:00:54.28#ibcon#about to read 5, iclass 21, count 2 2006.229.02:00:54.28#ibcon#read 5, iclass 21, count 2 2006.229.02:00:54.28#ibcon#about to read 6, iclass 21, count 2 2006.229.02:00:54.28#ibcon#read 6, iclass 21, count 2 2006.229.02:00:54.28#ibcon#end of sib2, iclass 21, count 2 2006.229.02:00:54.28#ibcon#*mode == 0, iclass 21, count 2 2006.229.02:00:54.28#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.02:00:54.28#ibcon#[27=AT02-04\r\n] 2006.229.02:00:54.28#ibcon#*before write, iclass 21, count 2 2006.229.02:00:54.28#ibcon#enter sib2, iclass 21, count 2 2006.229.02:00:54.28#ibcon#flushed, iclass 21, count 2 2006.229.02:00:54.28#ibcon#about to write, iclass 21, count 2 2006.229.02:00:54.28#ibcon#wrote, iclass 21, count 2 2006.229.02:00:54.28#ibcon#about to read 3, iclass 21, count 2 2006.229.02:00:54.31#ibcon#read 3, iclass 21, count 2 2006.229.02:00:54.31#ibcon#about to read 4, iclass 21, count 2 2006.229.02:00:54.31#ibcon#read 4, iclass 21, count 2 2006.229.02:00:54.31#ibcon#about to read 5, iclass 21, count 2 2006.229.02:00:54.31#ibcon#read 5, iclass 21, count 2 2006.229.02:00:54.31#ibcon#about to read 6, iclass 21, count 2 2006.229.02:00:54.31#ibcon#read 6, iclass 21, count 2 2006.229.02:00:54.31#ibcon#end of sib2, iclass 21, count 2 2006.229.02:00:54.31#ibcon#*after write, iclass 21, count 2 2006.229.02:00:54.31#ibcon#*before return 0, iclass 21, count 2 2006.229.02:00:54.31#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:54.31#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:00:54.31#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.02:00:54.31#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:54.31#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:54.43#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:54.43#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:54.43#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:00:54.43#ibcon#first serial, iclass 21, count 0 2006.229.02:00:54.43#ibcon#enter sib2, iclass 21, count 0 2006.229.02:00:54.43#ibcon#flushed, iclass 21, count 0 2006.229.02:00:54.43#ibcon#about to write, iclass 21, count 0 2006.229.02:00:54.43#ibcon#wrote, iclass 21, count 0 2006.229.02:00:54.43#ibcon#about to read 3, iclass 21, count 0 2006.229.02:00:54.45#ibcon#read 3, iclass 21, count 0 2006.229.02:00:54.45#ibcon#about to read 4, iclass 21, count 0 2006.229.02:00:54.45#ibcon#read 4, iclass 21, count 0 2006.229.02:00:54.45#ibcon#about to read 5, iclass 21, count 0 2006.229.02:00:54.45#ibcon#read 5, iclass 21, count 0 2006.229.02:00:54.45#ibcon#about to read 6, iclass 21, count 0 2006.229.02:00:54.45#ibcon#read 6, iclass 21, count 0 2006.229.02:00:54.45#ibcon#end of sib2, iclass 21, count 0 2006.229.02:00:54.45#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:00:54.45#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:00:54.45#ibcon#[27=USB\r\n] 2006.229.02:00:54.45#ibcon#*before write, iclass 21, count 0 2006.229.02:00:54.45#ibcon#enter sib2, iclass 21, count 0 2006.229.02:00:54.45#ibcon#flushed, iclass 21, count 0 2006.229.02:00:54.45#ibcon#about to write, iclass 21, count 0 2006.229.02:00:54.45#ibcon#wrote, iclass 21, count 0 2006.229.02:00:54.45#ibcon#about to read 3, iclass 21, count 0 2006.229.02:00:54.48#ibcon#read 3, iclass 21, count 0 2006.229.02:00:54.48#ibcon#about to read 4, iclass 21, count 0 2006.229.02:00:54.48#ibcon#read 4, iclass 21, count 0 2006.229.02:00:54.48#ibcon#about to read 5, iclass 21, count 0 2006.229.02:00:54.48#ibcon#read 5, iclass 21, count 0 2006.229.02:00:54.48#ibcon#about to read 6, iclass 21, count 0 2006.229.02:00:54.48#ibcon#read 6, iclass 21, count 0 2006.229.02:00:54.48#ibcon#end of sib2, iclass 21, count 0 2006.229.02:00:54.48#ibcon#*after write, iclass 21, count 0 2006.229.02:00:54.48#ibcon#*before return 0, iclass 21, count 0 2006.229.02:00:54.48#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:54.48#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:00:54.48#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:00:54.48#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:00:54.48$vck44/vblo=3,649.99 2006.229.02:00:54.48#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.02:00:54.48#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.02:00:54.48#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:54.48#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:54.48#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:54.48#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:54.48#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:00:54.48#ibcon#first serial, iclass 23, count 0 2006.229.02:00:54.48#ibcon#enter sib2, iclass 23, count 0 2006.229.02:00:54.48#ibcon#flushed, iclass 23, count 0 2006.229.02:00:54.48#ibcon#about to write, iclass 23, count 0 2006.229.02:00:54.48#ibcon#wrote, iclass 23, count 0 2006.229.02:00:54.48#ibcon#about to read 3, iclass 23, count 0 2006.229.02:00:54.50#ibcon#read 3, iclass 23, count 0 2006.229.02:00:54.50#ibcon#about to read 4, iclass 23, count 0 2006.229.02:00:54.50#ibcon#read 4, iclass 23, count 0 2006.229.02:00:54.50#ibcon#about to read 5, iclass 23, count 0 2006.229.02:00:54.50#ibcon#read 5, iclass 23, count 0 2006.229.02:00:54.50#ibcon#about to read 6, iclass 23, count 0 2006.229.02:00:54.50#ibcon#read 6, iclass 23, count 0 2006.229.02:00:54.50#ibcon#end of sib2, iclass 23, count 0 2006.229.02:00:54.50#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:00:54.50#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:00:54.50#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:00:54.50#ibcon#*before write, iclass 23, count 0 2006.229.02:00:54.50#ibcon#enter sib2, iclass 23, count 0 2006.229.02:00:54.50#ibcon#flushed, iclass 23, count 0 2006.229.02:00:54.50#ibcon#about to write, iclass 23, count 0 2006.229.02:00:54.50#ibcon#wrote, iclass 23, count 0 2006.229.02:00:54.50#ibcon#about to read 3, iclass 23, count 0 2006.229.02:00:54.54#ibcon#read 3, iclass 23, count 0 2006.229.02:00:54.54#ibcon#about to read 4, iclass 23, count 0 2006.229.02:00:54.54#ibcon#read 4, iclass 23, count 0 2006.229.02:00:54.54#ibcon#about to read 5, iclass 23, count 0 2006.229.02:00:54.54#ibcon#read 5, iclass 23, count 0 2006.229.02:00:54.54#ibcon#about to read 6, iclass 23, count 0 2006.229.02:00:54.54#ibcon#read 6, iclass 23, count 0 2006.229.02:00:54.54#ibcon#end of sib2, iclass 23, count 0 2006.229.02:00:54.54#ibcon#*after write, iclass 23, count 0 2006.229.02:00:54.54#ibcon#*before return 0, iclass 23, count 0 2006.229.02:00:54.54#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:54.54#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:00:54.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:00:54.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:00:54.54$vck44/vb=3,4 2006.229.02:00:54.54#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.02:00:54.54#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.02:00:54.54#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:54.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:54.60#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:54.60#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:54.60#ibcon#enter wrdev, iclass 25, count 2 2006.229.02:00:54.60#ibcon#first serial, iclass 25, count 2 2006.229.02:00:54.60#ibcon#enter sib2, iclass 25, count 2 2006.229.02:00:54.60#ibcon#flushed, iclass 25, count 2 2006.229.02:00:54.60#ibcon#about to write, iclass 25, count 2 2006.229.02:00:54.60#ibcon#wrote, iclass 25, count 2 2006.229.02:00:54.60#ibcon#about to read 3, iclass 25, count 2 2006.229.02:00:54.62#ibcon#read 3, iclass 25, count 2 2006.229.02:00:54.62#ibcon#about to read 4, iclass 25, count 2 2006.229.02:00:54.62#ibcon#read 4, iclass 25, count 2 2006.229.02:00:54.62#ibcon#about to read 5, iclass 25, count 2 2006.229.02:00:54.62#ibcon#read 5, iclass 25, count 2 2006.229.02:00:54.62#ibcon#about to read 6, iclass 25, count 2 2006.229.02:00:54.62#ibcon#read 6, iclass 25, count 2 2006.229.02:00:54.62#ibcon#end of sib2, iclass 25, count 2 2006.229.02:00:54.62#ibcon#*mode == 0, iclass 25, count 2 2006.229.02:00:54.62#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.02:00:54.62#ibcon#[27=AT03-04\r\n] 2006.229.02:00:54.62#ibcon#*before write, iclass 25, count 2 2006.229.02:00:54.62#ibcon#enter sib2, iclass 25, count 2 2006.229.02:00:54.62#ibcon#flushed, iclass 25, count 2 2006.229.02:00:54.62#ibcon#about to write, iclass 25, count 2 2006.229.02:00:54.62#ibcon#wrote, iclass 25, count 2 2006.229.02:00:54.62#ibcon#about to read 3, iclass 25, count 2 2006.229.02:00:54.65#ibcon#read 3, iclass 25, count 2 2006.229.02:00:54.65#ibcon#about to read 4, iclass 25, count 2 2006.229.02:00:54.65#ibcon#read 4, iclass 25, count 2 2006.229.02:00:54.65#ibcon#about to read 5, iclass 25, count 2 2006.229.02:00:54.65#ibcon#read 5, iclass 25, count 2 2006.229.02:00:54.65#ibcon#about to read 6, iclass 25, count 2 2006.229.02:00:54.65#ibcon#read 6, iclass 25, count 2 2006.229.02:00:54.65#ibcon#end of sib2, iclass 25, count 2 2006.229.02:00:54.65#ibcon#*after write, iclass 25, count 2 2006.229.02:00:54.65#ibcon#*before return 0, iclass 25, count 2 2006.229.02:00:54.65#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:54.65#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:00:54.65#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.02:00:54.65#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:54.65#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:54.77#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:54.77#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:54.77#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:00:54.77#ibcon#first serial, iclass 25, count 0 2006.229.02:00:54.77#ibcon#enter sib2, iclass 25, count 0 2006.229.02:00:54.77#ibcon#flushed, iclass 25, count 0 2006.229.02:00:54.77#ibcon#about to write, iclass 25, count 0 2006.229.02:00:54.77#ibcon#wrote, iclass 25, count 0 2006.229.02:00:54.77#ibcon#about to read 3, iclass 25, count 0 2006.229.02:00:54.79#ibcon#read 3, iclass 25, count 0 2006.229.02:00:54.79#ibcon#about to read 4, iclass 25, count 0 2006.229.02:00:54.79#ibcon#read 4, iclass 25, count 0 2006.229.02:00:54.79#ibcon#about to read 5, iclass 25, count 0 2006.229.02:00:54.79#ibcon#read 5, iclass 25, count 0 2006.229.02:00:54.79#ibcon#about to read 6, iclass 25, count 0 2006.229.02:00:54.79#ibcon#read 6, iclass 25, count 0 2006.229.02:00:54.79#ibcon#end of sib2, iclass 25, count 0 2006.229.02:00:54.79#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:00:54.79#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:00:54.79#ibcon#[27=USB\r\n] 2006.229.02:00:54.79#ibcon#*before write, iclass 25, count 0 2006.229.02:00:54.79#ibcon#enter sib2, iclass 25, count 0 2006.229.02:00:54.79#ibcon#flushed, iclass 25, count 0 2006.229.02:00:54.79#ibcon#about to write, iclass 25, count 0 2006.229.02:00:54.79#ibcon#wrote, iclass 25, count 0 2006.229.02:00:54.79#ibcon#about to read 3, iclass 25, count 0 2006.229.02:00:54.82#ibcon#read 3, iclass 25, count 0 2006.229.02:00:54.82#ibcon#about to read 4, iclass 25, count 0 2006.229.02:00:54.82#ibcon#read 4, iclass 25, count 0 2006.229.02:00:54.82#ibcon#about to read 5, iclass 25, count 0 2006.229.02:00:54.82#ibcon#read 5, iclass 25, count 0 2006.229.02:00:54.82#ibcon#about to read 6, iclass 25, count 0 2006.229.02:00:54.82#ibcon#read 6, iclass 25, count 0 2006.229.02:00:54.82#ibcon#end of sib2, iclass 25, count 0 2006.229.02:00:54.82#ibcon#*after write, iclass 25, count 0 2006.229.02:00:54.82#ibcon#*before return 0, iclass 25, count 0 2006.229.02:00:54.82#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:54.82#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:00:54.82#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:00:54.82#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:00:54.82$vck44/vblo=4,679.99 2006.229.02:00:54.82#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.02:00:54.82#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.02:00:54.82#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:54.82#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:54.82#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:54.82#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:54.82#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:00:54.82#ibcon#first serial, iclass 27, count 0 2006.229.02:00:54.82#ibcon#enter sib2, iclass 27, count 0 2006.229.02:00:54.82#ibcon#flushed, iclass 27, count 0 2006.229.02:00:54.82#ibcon#about to write, iclass 27, count 0 2006.229.02:00:54.82#ibcon#wrote, iclass 27, count 0 2006.229.02:00:54.82#ibcon#about to read 3, iclass 27, count 0 2006.229.02:00:54.84#ibcon#read 3, iclass 27, count 0 2006.229.02:00:54.84#ibcon#about to read 4, iclass 27, count 0 2006.229.02:00:54.84#ibcon#read 4, iclass 27, count 0 2006.229.02:00:54.84#ibcon#about to read 5, iclass 27, count 0 2006.229.02:00:54.84#ibcon#read 5, iclass 27, count 0 2006.229.02:00:54.84#ibcon#about to read 6, iclass 27, count 0 2006.229.02:00:54.84#ibcon#read 6, iclass 27, count 0 2006.229.02:00:54.84#ibcon#end of sib2, iclass 27, count 0 2006.229.02:00:54.84#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:00:54.84#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:00:54.84#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:00:54.84#ibcon#*before write, iclass 27, count 0 2006.229.02:00:54.84#ibcon#enter sib2, iclass 27, count 0 2006.229.02:00:54.84#ibcon#flushed, iclass 27, count 0 2006.229.02:00:54.84#ibcon#about to write, iclass 27, count 0 2006.229.02:00:54.84#ibcon#wrote, iclass 27, count 0 2006.229.02:00:54.84#ibcon#about to read 3, iclass 27, count 0 2006.229.02:00:54.88#ibcon#read 3, iclass 27, count 0 2006.229.02:00:54.88#ibcon#about to read 4, iclass 27, count 0 2006.229.02:00:54.88#ibcon#read 4, iclass 27, count 0 2006.229.02:00:54.88#ibcon#about to read 5, iclass 27, count 0 2006.229.02:00:54.88#ibcon#read 5, iclass 27, count 0 2006.229.02:00:54.88#ibcon#about to read 6, iclass 27, count 0 2006.229.02:00:54.88#ibcon#read 6, iclass 27, count 0 2006.229.02:00:54.88#ibcon#end of sib2, iclass 27, count 0 2006.229.02:00:54.88#ibcon#*after write, iclass 27, count 0 2006.229.02:00:54.88#ibcon#*before return 0, iclass 27, count 0 2006.229.02:00:54.88#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:54.88#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:00:54.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:00:54.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:00:54.88$vck44/vb=4,4 2006.229.02:00:54.88#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.02:00:54.88#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.02:00:54.88#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:54.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:54.94#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:54.94#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:54.94#ibcon#enter wrdev, iclass 29, count 2 2006.229.02:00:54.94#ibcon#first serial, iclass 29, count 2 2006.229.02:00:54.94#ibcon#enter sib2, iclass 29, count 2 2006.229.02:00:54.94#ibcon#flushed, iclass 29, count 2 2006.229.02:00:54.94#ibcon#about to write, iclass 29, count 2 2006.229.02:00:54.94#ibcon#wrote, iclass 29, count 2 2006.229.02:00:54.94#ibcon#about to read 3, iclass 29, count 2 2006.229.02:00:54.96#ibcon#read 3, iclass 29, count 2 2006.229.02:00:54.96#ibcon#about to read 4, iclass 29, count 2 2006.229.02:00:54.96#ibcon#read 4, iclass 29, count 2 2006.229.02:00:54.96#ibcon#about to read 5, iclass 29, count 2 2006.229.02:00:54.96#ibcon#read 5, iclass 29, count 2 2006.229.02:00:54.96#ibcon#about to read 6, iclass 29, count 2 2006.229.02:00:54.96#ibcon#read 6, iclass 29, count 2 2006.229.02:00:54.96#ibcon#end of sib2, iclass 29, count 2 2006.229.02:00:54.96#ibcon#*mode == 0, iclass 29, count 2 2006.229.02:00:54.96#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.02:00:54.96#ibcon#[27=AT04-04\r\n] 2006.229.02:00:54.96#ibcon#*before write, iclass 29, count 2 2006.229.02:00:54.96#ibcon#enter sib2, iclass 29, count 2 2006.229.02:00:54.96#ibcon#flushed, iclass 29, count 2 2006.229.02:00:54.96#ibcon#about to write, iclass 29, count 2 2006.229.02:00:54.96#ibcon#wrote, iclass 29, count 2 2006.229.02:00:54.96#ibcon#about to read 3, iclass 29, count 2 2006.229.02:00:54.99#ibcon#read 3, iclass 29, count 2 2006.229.02:00:54.99#ibcon#about to read 4, iclass 29, count 2 2006.229.02:00:54.99#ibcon#read 4, iclass 29, count 2 2006.229.02:00:54.99#ibcon#about to read 5, iclass 29, count 2 2006.229.02:00:54.99#ibcon#read 5, iclass 29, count 2 2006.229.02:00:54.99#ibcon#about to read 6, iclass 29, count 2 2006.229.02:00:54.99#ibcon#read 6, iclass 29, count 2 2006.229.02:00:54.99#ibcon#end of sib2, iclass 29, count 2 2006.229.02:00:54.99#ibcon#*after write, iclass 29, count 2 2006.229.02:00:54.99#ibcon#*before return 0, iclass 29, count 2 2006.229.02:00:54.99#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:54.99#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:00:54.99#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.02:00:54.99#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:54.99#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:55.11#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:55.11#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:55.11#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:00:55.11#ibcon#first serial, iclass 29, count 0 2006.229.02:00:55.11#ibcon#enter sib2, iclass 29, count 0 2006.229.02:00:55.11#ibcon#flushed, iclass 29, count 0 2006.229.02:00:55.11#ibcon#about to write, iclass 29, count 0 2006.229.02:00:55.11#ibcon#wrote, iclass 29, count 0 2006.229.02:00:55.11#ibcon#about to read 3, iclass 29, count 0 2006.229.02:00:55.13#ibcon#read 3, iclass 29, count 0 2006.229.02:00:55.13#ibcon#about to read 4, iclass 29, count 0 2006.229.02:00:55.13#ibcon#read 4, iclass 29, count 0 2006.229.02:00:55.13#ibcon#about to read 5, iclass 29, count 0 2006.229.02:00:55.13#ibcon#read 5, iclass 29, count 0 2006.229.02:00:55.13#ibcon#about to read 6, iclass 29, count 0 2006.229.02:00:55.13#ibcon#read 6, iclass 29, count 0 2006.229.02:00:55.13#ibcon#end of sib2, iclass 29, count 0 2006.229.02:00:55.13#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:00:55.13#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:00:55.13#ibcon#[27=USB\r\n] 2006.229.02:00:55.13#ibcon#*before write, iclass 29, count 0 2006.229.02:00:55.13#ibcon#enter sib2, iclass 29, count 0 2006.229.02:00:55.13#ibcon#flushed, iclass 29, count 0 2006.229.02:00:55.13#ibcon#about to write, iclass 29, count 0 2006.229.02:00:55.13#ibcon#wrote, iclass 29, count 0 2006.229.02:00:55.13#ibcon#about to read 3, iclass 29, count 0 2006.229.02:00:55.16#ibcon#read 3, iclass 29, count 0 2006.229.02:00:55.16#ibcon#about to read 4, iclass 29, count 0 2006.229.02:00:55.16#ibcon#read 4, iclass 29, count 0 2006.229.02:00:55.16#ibcon#about to read 5, iclass 29, count 0 2006.229.02:00:55.16#ibcon#read 5, iclass 29, count 0 2006.229.02:00:55.16#ibcon#about to read 6, iclass 29, count 0 2006.229.02:00:55.16#ibcon#read 6, iclass 29, count 0 2006.229.02:00:55.16#ibcon#end of sib2, iclass 29, count 0 2006.229.02:00:55.16#ibcon#*after write, iclass 29, count 0 2006.229.02:00:55.16#ibcon#*before return 0, iclass 29, count 0 2006.229.02:00:55.16#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:55.16#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:00:55.16#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:00:55.16#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:00:55.16$vck44/vblo=5,709.99 2006.229.02:00:55.16#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.02:00:55.16#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.02:00:55.16#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:55.16#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:55.16#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:55.16#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:55.16#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:00:55.16#ibcon#first serial, iclass 31, count 0 2006.229.02:00:55.16#ibcon#enter sib2, iclass 31, count 0 2006.229.02:00:55.16#ibcon#flushed, iclass 31, count 0 2006.229.02:00:55.16#ibcon#about to write, iclass 31, count 0 2006.229.02:00:55.16#ibcon#wrote, iclass 31, count 0 2006.229.02:00:55.16#ibcon#about to read 3, iclass 31, count 0 2006.229.02:00:55.18#ibcon#read 3, iclass 31, count 0 2006.229.02:00:55.18#ibcon#about to read 4, iclass 31, count 0 2006.229.02:00:55.18#ibcon#read 4, iclass 31, count 0 2006.229.02:00:55.18#ibcon#about to read 5, iclass 31, count 0 2006.229.02:00:55.18#ibcon#read 5, iclass 31, count 0 2006.229.02:00:55.18#ibcon#about to read 6, iclass 31, count 0 2006.229.02:00:55.18#ibcon#read 6, iclass 31, count 0 2006.229.02:00:55.18#ibcon#end of sib2, iclass 31, count 0 2006.229.02:00:55.18#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:00:55.18#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:00:55.18#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:00:55.18#ibcon#*before write, iclass 31, count 0 2006.229.02:00:55.18#ibcon#enter sib2, iclass 31, count 0 2006.229.02:00:55.18#ibcon#flushed, iclass 31, count 0 2006.229.02:00:55.18#ibcon#about to write, iclass 31, count 0 2006.229.02:00:55.18#ibcon#wrote, iclass 31, count 0 2006.229.02:00:55.18#ibcon#about to read 3, iclass 31, count 0 2006.229.02:00:55.22#ibcon#read 3, iclass 31, count 0 2006.229.02:00:55.22#ibcon#about to read 4, iclass 31, count 0 2006.229.02:00:55.22#ibcon#read 4, iclass 31, count 0 2006.229.02:00:55.22#ibcon#about to read 5, iclass 31, count 0 2006.229.02:00:55.22#ibcon#read 5, iclass 31, count 0 2006.229.02:00:55.22#ibcon#about to read 6, iclass 31, count 0 2006.229.02:00:55.22#ibcon#read 6, iclass 31, count 0 2006.229.02:00:55.22#ibcon#end of sib2, iclass 31, count 0 2006.229.02:00:55.22#ibcon#*after write, iclass 31, count 0 2006.229.02:00:55.22#ibcon#*before return 0, iclass 31, count 0 2006.229.02:00:55.22#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:55.22#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:00:55.22#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:00:55.22#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:00:55.22$vck44/vb=5,4 2006.229.02:00:55.22#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.02:00:55.22#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.02:00:55.22#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:55.22#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:55.28#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:55.28#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:55.28#ibcon#enter wrdev, iclass 33, count 2 2006.229.02:00:55.28#ibcon#first serial, iclass 33, count 2 2006.229.02:00:55.28#ibcon#enter sib2, iclass 33, count 2 2006.229.02:00:55.28#ibcon#flushed, iclass 33, count 2 2006.229.02:00:55.28#ibcon#about to write, iclass 33, count 2 2006.229.02:00:55.28#ibcon#wrote, iclass 33, count 2 2006.229.02:00:55.28#ibcon#about to read 3, iclass 33, count 2 2006.229.02:00:55.30#ibcon#read 3, iclass 33, count 2 2006.229.02:00:55.30#ibcon#about to read 4, iclass 33, count 2 2006.229.02:00:55.30#ibcon#read 4, iclass 33, count 2 2006.229.02:00:55.30#ibcon#about to read 5, iclass 33, count 2 2006.229.02:00:55.30#ibcon#read 5, iclass 33, count 2 2006.229.02:00:55.30#ibcon#about to read 6, iclass 33, count 2 2006.229.02:00:55.30#ibcon#read 6, iclass 33, count 2 2006.229.02:00:55.30#ibcon#end of sib2, iclass 33, count 2 2006.229.02:00:55.30#ibcon#*mode == 0, iclass 33, count 2 2006.229.02:00:55.30#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.02:00:55.30#ibcon#[27=AT05-04\r\n] 2006.229.02:00:55.30#ibcon#*before write, iclass 33, count 2 2006.229.02:00:55.30#ibcon#enter sib2, iclass 33, count 2 2006.229.02:00:55.30#ibcon#flushed, iclass 33, count 2 2006.229.02:00:55.30#ibcon#about to write, iclass 33, count 2 2006.229.02:00:55.30#ibcon#wrote, iclass 33, count 2 2006.229.02:00:55.30#ibcon#about to read 3, iclass 33, count 2 2006.229.02:00:55.33#ibcon#read 3, iclass 33, count 2 2006.229.02:00:55.33#ibcon#about to read 4, iclass 33, count 2 2006.229.02:00:55.33#ibcon#read 4, iclass 33, count 2 2006.229.02:00:55.33#ibcon#about to read 5, iclass 33, count 2 2006.229.02:00:55.33#ibcon#read 5, iclass 33, count 2 2006.229.02:00:55.33#ibcon#about to read 6, iclass 33, count 2 2006.229.02:00:55.33#ibcon#read 6, iclass 33, count 2 2006.229.02:00:55.33#ibcon#end of sib2, iclass 33, count 2 2006.229.02:00:55.33#ibcon#*after write, iclass 33, count 2 2006.229.02:00:55.33#ibcon#*before return 0, iclass 33, count 2 2006.229.02:00:55.33#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:55.33#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:00:55.33#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.02:00:55.33#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:55.33#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:55.45#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:55.45#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:55.45#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:00:55.45#ibcon#first serial, iclass 33, count 0 2006.229.02:00:55.45#ibcon#enter sib2, iclass 33, count 0 2006.229.02:00:55.45#ibcon#flushed, iclass 33, count 0 2006.229.02:00:55.45#ibcon#about to write, iclass 33, count 0 2006.229.02:00:55.45#ibcon#wrote, iclass 33, count 0 2006.229.02:00:55.45#ibcon#about to read 3, iclass 33, count 0 2006.229.02:00:55.47#ibcon#read 3, iclass 33, count 0 2006.229.02:00:55.47#ibcon#about to read 4, iclass 33, count 0 2006.229.02:00:55.47#ibcon#read 4, iclass 33, count 0 2006.229.02:00:55.47#ibcon#about to read 5, iclass 33, count 0 2006.229.02:00:55.47#ibcon#read 5, iclass 33, count 0 2006.229.02:00:55.47#ibcon#about to read 6, iclass 33, count 0 2006.229.02:00:55.47#ibcon#read 6, iclass 33, count 0 2006.229.02:00:55.47#ibcon#end of sib2, iclass 33, count 0 2006.229.02:00:55.47#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:00:55.47#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:00:55.47#ibcon#[27=USB\r\n] 2006.229.02:00:55.47#ibcon#*before write, iclass 33, count 0 2006.229.02:00:55.47#ibcon#enter sib2, iclass 33, count 0 2006.229.02:00:55.47#ibcon#flushed, iclass 33, count 0 2006.229.02:00:55.47#ibcon#about to write, iclass 33, count 0 2006.229.02:00:55.47#ibcon#wrote, iclass 33, count 0 2006.229.02:00:55.47#ibcon#about to read 3, iclass 33, count 0 2006.229.02:00:55.50#ibcon#read 3, iclass 33, count 0 2006.229.02:00:55.50#ibcon#about to read 4, iclass 33, count 0 2006.229.02:00:55.50#ibcon#read 4, iclass 33, count 0 2006.229.02:00:55.50#ibcon#about to read 5, iclass 33, count 0 2006.229.02:00:55.50#ibcon#read 5, iclass 33, count 0 2006.229.02:00:55.50#ibcon#about to read 6, iclass 33, count 0 2006.229.02:00:55.50#ibcon#read 6, iclass 33, count 0 2006.229.02:00:55.50#ibcon#end of sib2, iclass 33, count 0 2006.229.02:00:55.50#ibcon#*after write, iclass 33, count 0 2006.229.02:00:55.50#ibcon#*before return 0, iclass 33, count 0 2006.229.02:00:55.50#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:55.50#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:00:55.50#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:00:55.50#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:00:55.50$vck44/vblo=6,719.99 2006.229.02:00:55.50#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.02:00:55.50#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.02:00:55.50#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:55.50#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:55.50#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:55.50#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:55.50#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:00:55.50#ibcon#first serial, iclass 35, count 0 2006.229.02:00:55.50#ibcon#enter sib2, iclass 35, count 0 2006.229.02:00:55.50#ibcon#flushed, iclass 35, count 0 2006.229.02:00:55.50#ibcon#about to write, iclass 35, count 0 2006.229.02:00:55.50#ibcon#wrote, iclass 35, count 0 2006.229.02:00:55.50#ibcon#about to read 3, iclass 35, count 0 2006.229.02:00:55.52#ibcon#read 3, iclass 35, count 0 2006.229.02:00:55.52#ibcon#about to read 4, iclass 35, count 0 2006.229.02:00:55.52#ibcon#read 4, iclass 35, count 0 2006.229.02:00:55.52#ibcon#about to read 5, iclass 35, count 0 2006.229.02:00:55.52#ibcon#read 5, iclass 35, count 0 2006.229.02:00:55.52#ibcon#about to read 6, iclass 35, count 0 2006.229.02:00:55.52#ibcon#read 6, iclass 35, count 0 2006.229.02:00:55.52#ibcon#end of sib2, iclass 35, count 0 2006.229.02:00:55.52#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:00:55.52#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:00:55.52#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:00:55.52#ibcon#*before write, iclass 35, count 0 2006.229.02:00:55.52#ibcon#enter sib2, iclass 35, count 0 2006.229.02:00:55.52#ibcon#flushed, iclass 35, count 0 2006.229.02:00:55.52#ibcon#about to write, iclass 35, count 0 2006.229.02:00:55.52#ibcon#wrote, iclass 35, count 0 2006.229.02:00:55.52#ibcon#about to read 3, iclass 35, count 0 2006.229.02:00:55.56#ibcon#read 3, iclass 35, count 0 2006.229.02:00:55.56#ibcon#about to read 4, iclass 35, count 0 2006.229.02:00:55.56#ibcon#read 4, iclass 35, count 0 2006.229.02:00:55.56#ibcon#about to read 5, iclass 35, count 0 2006.229.02:00:55.56#ibcon#read 5, iclass 35, count 0 2006.229.02:00:55.56#ibcon#about to read 6, iclass 35, count 0 2006.229.02:00:55.56#ibcon#read 6, iclass 35, count 0 2006.229.02:00:55.56#ibcon#end of sib2, iclass 35, count 0 2006.229.02:00:55.56#ibcon#*after write, iclass 35, count 0 2006.229.02:00:55.56#ibcon#*before return 0, iclass 35, count 0 2006.229.02:00:55.56#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:55.56#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:00:55.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:00:55.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:00:55.56$vck44/vb=6,4 2006.229.02:00:55.56#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.02:00:55.56#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.02:00:55.56#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:55.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:55.62#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:55.62#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:55.62#ibcon#enter wrdev, iclass 37, count 2 2006.229.02:00:55.62#ibcon#first serial, iclass 37, count 2 2006.229.02:00:55.62#ibcon#enter sib2, iclass 37, count 2 2006.229.02:00:55.62#ibcon#flushed, iclass 37, count 2 2006.229.02:00:55.62#ibcon#about to write, iclass 37, count 2 2006.229.02:00:55.62#ibcon#wrote, iclass 37, count 2 2006.229.02:00:55.62#ibcon#about to read 3, iclass 37, count 2 2006.229.02:00:55.64#ibcon#read 3, iclass 37, count 2 2006.229.02:00:55.64#ibcon#about to read 4, iclass 37, count 2 2006.229.02:00:55.64#ibcon#read 4, iclass 37, count 2 2006.229.02:00:55.64#ibcon#about to read 5, iclass 37, count 2 2006.229.02:00:55.64#ibcon#read 5, iclass 37, count 2 2006.229.02:00:55.64#ibcon#about to read 6, iclass 37, count 2 2006.229.02:00:55.64#ibcon#read 6, iclass 37, count 2 2006.229.02:00:55.64#ibcon#end of sib2, iclass 37, count 2 2006.229.02:00:55.64#ibcon#*mode == 0, iclass 37, count 2 2006.229.02:00:55.64#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.02:00:55.64#ibcon#[27=AT06-04\r\n] 2006.229.02:00:55.64#ibcon#*before write, iclass 37, count 2 2006.229.02:00:55.64#ibcon#enter sib2, iclass 37, count 2 2006.229.02:00:55.64#ibcon#flushed, iclass 37, count 2 2006.229.02:00:55.64#ibcon#about to write, iclass 37, count 2 2006.229.02:00:55.64#ibcon#wrote, iclass 37, count 2 2006.229.02:00:55.64#ibcon#about to read 3, iclass 37, count 2 2006.229.02:00:55.67#ibcon#read 3, iclass 37, count 2 2006.229.02:00:55.67#ibcon#about to read 4, iclass 37, count 2 2006.229.02:00:55.67#ibcon#read 4, iclass 37, count 2 2006.229.02:00:55.67#ibcon#about to read 5, iclass 37, count 2 2006.229.02:00:55.67#ibcon#read 5, iclass 37, count 2 2006.229.02:00:55.67#ibcon#about to read 6, iclass 37, count 2 2006.229.02:00:55.67#ibcon#read 6, iclass 37, count 2 2006.229.02:00:55.67#ibcon#end of sib2, iclass 37, count 2 2006.229.02:00:55.67#ibcon#*after write, iclass 37, count 2 2006.229.02:00:55.67#ibcon#*before return 0, iclass 37, count 2 2006.229.02:00:55.67#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:55.67#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:00:55.67#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.02:00:55.67#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:55.67#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:55.79#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:55.79#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:55.79#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:00:55.79#ibcon#first serial, iclass 37, count 0 2006.229.02:00:55.79#ibcon#enter sib2, iclass 37, count 0 2006.229.02:00:55.79#ibcon#flushed, iclass 37, count 0 2006.229.02:00:55.79#ibcon#about to write, iclass 37, count 0 2006.229.02:00:55.79#ibcon#wrote, iclass 37, count 0 2006.229.02:00:55.79#ibcon#about to read 3, iclass 37, count 0 2006.229.02:00:55.81#ibcon#read 3, iclass 37, count 0 2006.229.02:00:55.81#ibcon#about to read 4, iclass 37, count 0 2006.229.02:00:55.81#ibcon#read 4, iclass 37, count 0 2006.229.02:00:55.81#ibcon#about to read 5, iclass 37, count 0 2006.229.02:00:55.81#ibcon#read 5, iclass 37, count 0 2006.229.02:00:55.81#ibcon#about to read 6, iclass 37, count 0 2006.229.02:00:55.81#ibcon#read 6, iclass 37, count 0 2006.229.02:00:55.81#ibcon#end of sib2, iclass 37, count 0 2006.229.02:00:55.81#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:00:55.81#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:00:55.81#ibcon#[27=USB\r\n] 2006.229.02:00:55.81#ibcon#*before write, iclass 37, count 0 2006.229.02:00:55.81#ibcon#enter sib2, iclass 37, count 0 2006.229.02:00:55.81#ibcon#flushed, iclass 37, count 0 2006.229.02:00:55.81#ibcon#about to write, iclass 37, count 0 2006.229.02:00:55.81#ibcon#wrote, iclass 37, count 0 2006.229.02:00:55.81#ibcon#about to read 3, iclass 37, count 0 2006.229.02:00:55.84#ibcon#read 3, iclass 37, count 0 2006.229.02:00:55.84#ibcon#about to read 4, iclass 37, count 0 2006.229.02:00:55.84#ibcon#read 4, iclass 37, count 0 2006.229.02:00:55.84#ibcon#about to read 5, iclass 37, count 0 2006.229.02:00:55.84#ibcon#read 5, iclass 37, count 0 2006.229.02:00:55.84#ibcon#about to read 6, iclass 37, count 0 2006.229.02:00:55.84#ibcon#read 6, iclass 37, count 0 2006.229.02:00:55.84#ibcon#end of sib2, iclass 37, count 0 2006.229.02:00:55.84#ibcon#*after write, iclass 37, count 0 2006.229.02:00:55.84#ibcon#*before return 0, iclass 37, count 0 2006.229.02:00:55.84#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:55.84#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:00:55.84#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:00:55.84#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:00:55.84$vck44/vblo=7,734.99 2006.229.02:00:55.84#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.02:00:55.84#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.02:00:55.84#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:55.84#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:55.84#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:55.84#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:55.84#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:00:55.84#ibcon#first serial, iclass 39, count 0 2006.229.02:00:55.84#ibcon#enter sib2, iclass 39, count 0 2006.229.02:00:55.84#ibcon#flushed, iclass 39, count 0 2006.229.02:00:55.84#ibcon#about to write, iclass 39, count 0 2006.229.02:00:55.84#ibcon#wrote, iclass 39, count 0 2006.229.02:00:55.84#ibcon#about to read 3, iclass 39, count 0 2006.229.02:00:55.86#ibcon#read 3, iclass 39, count 0 2006.229.02:00:55.86#ibcon#about to read 4, iclass 39, count 0 2006.229.02:00:55.86#ibcon#read 4, iclass 39, count 0 2006.229.02:00:55.86#ibcon#about to read 5, iclass 39, count 0 2006.229.02:00:55.86#ibcon#read 5, iclass 39, count 0 2006.229.02:00:55.86#ibcon#about to read 6, iclass 39, count 0 2006.229.02:00:55.86#ibcon#read 6, iclass 39, count 0 2006.229.02:00:55.86#ibcon#end of sib2, iclass 39, count 0 2006.229.02:00:55.86#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:00:55.86#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:00:55.86#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:00:55.86#ibcon#*before write, iclass 39, count 0 2006.229.02:00:55.86#ibcon#enter sib2, iclass 39, count 0 2006.229.02:00:55.86#ibcon#flushed, iclass 39, count 0 2006.229.02:00:55.86#ibcon#about to write, iclass 39, count 0 2006.229.02:00:55.86#ibcon#wrote, iclass 39, count 0 2006.229.02:00:55.86#ibcon#about to read 3, iclass 39, count 0 2006.229.02:00:55.90#ibcon#read 3, iclass 39, count 0 2006.229.02:00:55.90#ibcon#about to read 4, iclass 39, count 0 2006.229.02:00:55.90#ibcon#read 4, iclass 39, count 0 2006.229.02:00:55.90#ibcon#about to read 5, iclass 39, count 0 2006.229.02:00:55.90#ibcon#read 5, iclass 39, count 0 2006.229.02:00:55.90#ibcon#about to read 6, iclass 39, count 0 2006.229.02:00:55.90#ibcon#read 6, iclass 39, count 0 2006.229.02:00:55.90#ibcon#end of sib2, iclass 39, count 0 2006.229.02:00:55.90#ibcon#*after write, iclass 39, count 0 2006.229.02:00:55.90#ibcon#*before return 0, iclass 39, count 0 2006.229.02:00:55.90#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:55.90#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:00:55.90#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:00:55.90#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:00:55.90$vck44/vb=7,4 2006.229.02:00:55.90#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.02:00:55.90#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.02:00:55.90#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:55.90#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:55.96#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:55.96#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:55.96#ibcon#enter wrdev, iclass 3, count 2 2006.229.02:00:55.96#ibcon#first serial, iclass 3, count 2 2006.229.02:00:55.96#ibcon#enter sib2, iclass 3, count 2 2006.229.02:00:55.96#ibcon#flushed, iclass 3, count 2 2006.229.02:00:55.96#ibcon#about to write, iclass 3, count 2 2006.229.02:00:55.96#ibcon#wrote, iclass 3, count 2 2006.229.02:00:55.96#ibcon#about to read 3, iclass 3, count 2 2006.229.02:00:55.98#ibcon#read 3, iclass 3, count 2 2006.229.02:00:55.98#ibcon#about to read 4, iclass 3, count 2 2006.229.02:00:55.98#ibcon#read 4, iclass 3, count 2 2006.229.02:00:55.98#ibcon#about to read 5, iclass 3, count 2 2006.229.02:00:55.98#ibcon#read 5, iclass 3, count 2 2006.229.02:00:55.98#ibcon#about to read 6, iclass 3, count 2 2006.229.02:00:55.98#ibcon#read 6, iclass 3, count 2 2006.229.02:00:55.98#ibcon#end of sib2, iclass 3, count 2 2006.229.02:00:55.98#ibcon#*mode == 0, iclass 3, count 2 2006.229.02:00:55.98#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.02:00:55.98#ibcon#[27=AT07-04\r\n] 2006.229.02:00:55.98#ibcon#*before write, iclass 3, count 2 2006.229.02:00:55.98#ibcon#enter sib2, iclass 3, count 2 2006.229.02:00:55.98#ibcon#flushed, iclass 3, count 2 2006.229.02:00:55.98#ibcon#about to write, iclass 3, count 2 2006.229.02:00:55.98#ibcon#wrote, iclass 3, count 2 2006.229.02:00:55.98#ibcon#about to read 3, iclass 3, count 2 2006.229.02:00:56.01#ibcon#read 3, iclass 3, count 2 2006.229.02:00:56.01#ibcon#about to read 4, iclass 3, count 2 2006.229.02:00:56.01#ibcon#read 4, iclass 3, count 2 2006.229.02:00:56.01#ibcon#about to read 5, iclass 3, count 2 2006.229.02:00:56.01#ibcon#read 5, iclass 3, count 2 2006.229.02:00:56.01#ibcon#about to read 6, iclass 3, count 2 2006.229.02:00:56.01#ibcon#read 6, iclass 3, count 2 2006.229.02:00:56.01#ibcon#end of sib2, iclass 3, count 2 2006.229.02:00:56.01#ibcon#*after write, iclass 3, count 2 2006.229.02:00:56.01#ibcon#*before return 0, iclass 3, count 2 2006.229.02:00:56.01#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:56.01#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:00:56.01#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.02:00:56.01#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:56.01#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:56.13#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:56.13#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:56.13#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:00:56.13#ibcon#first serial, iclass 3, count 0 2006.229.02:00:56.13#ibcon#enter sib2, iclass 3, count 0 2006.229.02:00:56.13#ibcon#flushed, iclass 3, count 0 2006.229.02:00:56.13#ibcon#about to write, iclass 3, count 0 2006.229.02:00:56.13#ibcon#wrote, iclass 3, count 0 2006.229.02:00:56.13#ibcon#about to read 3, iclass 3, count 0 2006.229.02:00:56.15#ibcon#read 3, iclass 3, count 0 2006.229.02:00:56.15#ibcon#about to read 4, iclass 3, count 0 2006.229.02:00:56.15#ibcon#read 4, iclass 3, count 0 2006.229.02:00:56.15#ibcon#about to read 5, iclass 3, count 0 2006.229.02:00:56.15#ibcon#read 5, iclass 3, count 0 2006.229.02:00:56.15#ibcon#about to read 6, iclass 3, count 0 2006.229.02:00:56.15#ibcon#read 6, iclass 3, count 0 2006.229.02:00:56.15#ibcon#end of sib2, iclass 3, count 0 2006.229.02:00:56.15#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:00:56.15#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:00:56.15#ibcon#[27=USB\r\n] 2006.229.02:00:56.15#ibcon#*before write, iclass 3, count 0 2006.229.02:00:56.15#ibcon#enter sib2, iclass 3, count 0 2006.229.02:00:56.15#ibcon#flushed, iclass 3, count 0 2006.229.02:00:56.15#ibcon#about to write, iclass 3, count 0 2006.229.02:00:56.15#ibcon#wrote, iclass 3, count 0 2006.229.02:00:56.15#ibcon#about to read 3, iclass 3, count 0 2006.229.02:00:56.18#ibcon#read 3, iclass 3, count 0 2006.229.02:00:56.18#ibcon#about to read 4, iclass 3, count 0 2006.229.02:00:56.18#ibcon#read 4, iclass 3, count 0 2006.229.02:00:56.18#ibcon#about to read 5, iclass 3, count 0 2006.229.02:00:56.18#ibcon#read 5, iclass 3, count 0 2006.229.02:00:56.18#ibcon#about to read 6, iclass 3, count 0 2006.229.02:00:56.18#ibcon#read 6, iclass 3, count 0 2006.229.02:00:56.18#ibcon#end of sib2, iclass 3, count 0 2006.229.02:00:56.18#ibcon#*after write, iclass 3, count 0 2006.229.02:00:56.18#ibcon#*before return 0, iclass 3, count 0 2006.229.02:00:56.18#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:56.18#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:00:56.18#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:00:56.18#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:00:56.18$vck44/vblo=8,744.99 2006.229.02:00:56.18#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.02:00:56.18#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.02:00:56.18#ibcon#ireg 17 cls_cnt 0 2006.229.02:00:56.18#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:56.18#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:56.18#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:56.18#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:00:56.18#ibcon#first serial, iclass 5, count 0 2006.229.02:00:56.18#ibcon#enter sib2, iclass 5, count 0 2006.229.02:00:56.18#ibcon#flushed, iclass 5, count 0 2006.229.02:00:56.18#ibcon#about to write, iclass 5, count 0 2006.229.02:00:56.18#ibcon#wrote, iclass 5, count 0 2006.229.02:00:56.18#ibcon#about to read 3, iclass 5, count 0 2006.229.02:00:56.20#ibcon#read 3, iclass 5, count 0 2006.229.02:00:56.20#ibcon#about to read 4, iclass 5, count 0 2006.229.02:00:56.20#ibcon#read 4, iclass 5, count 0 2006.229.02:00:56.20#ibcon#about to read 5, iclass 5, count 0 2006.229.02:00:56.20#ibcon#read 5, iclass 5, count 0 2006.229.02:00:56.20#ibcon#about to read 6, iclass 5, count 0 2006.229.02:00:56.20#ibcon#read 6, iclass 5, count 0 2006.229.02:00:56.20#ibcon#end of sib2, iclass 5, count 0 2006.229.02:00:56.20#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:00:56.20#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:00:56.20#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:00:56.20#ibcon#*before write, iclass 5, count 0 2006.229.02:00:56.20#ibcon#enter sib2, iclass 5, count 0 2006.229.02:00:56.20#ibcon#flushed, iclass 5, count 0 2006.229.02:00:56.20#ibcon#about to write, iclass 5, count 0 2006.229.02:00:56.20#ibcon#wrote, iclass 5, count 0 2006.229.02:00:56.20#ibcon#about to read 3, iclass 5, count 0 2006.229.02:00:56.24#ibcon#read 3, iclass 5, count 0 2006.229.02:00:56.24#ibcon#about to read 4, iclass 5, count 0 2006.229.02:00:56.24#ibcon#read 4, iclass 5, count 0 2006.229.02:00:56.24#ibcon#about to read 5, iclass 5, count 0 2006.229.02:00:56.24#ibcon#read 5, iclass 5, count 0 2006.229.02:00:56.24#ibcon#about to read 6, iclass 5, count 0 2006.229.02:00:56.24#ibcon#read 6, iclass 5, count 0 2006.229.02:00:56.24#ibcon#end of sib2, iclass 5, count 0 2006.229.02:00:56.24#ibcon#*after write, iclass 5, count 0 2006.229.02:00:56.24#ibcon#*before return 0, iclass 5, count 0 2006.229.02:00:56.24#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:56.24#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:00:56.24#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:00:56.24#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:00:56.24$vck44/vb=8,4 2006.229.02:00:56.24#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.02:00:56.24#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.02:00:56.24#ibcon#ireg 11 cls_cnt 2 2006.229.02:00:56.24#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:56.30#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:56.30#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:56.30#ibcon#enter wrdev, iclass 7, count 2 2006.229.02:00:56.30#ibcon#first serial, iclass 7, count 2 2006.229.02:00:56.30#ibcon#enter sib2, iclass 7, count 2 2006.229.02:00:56.30#ibcon#flushed, iclass 7, count 2 2006.229.02:00:56.30#ibcon#about to write, iclass 7, count 2 2006.229.02:00:56.30#ibcon#wrote, iclass 7, count 2 2006.229.02:00:56.30#ibcon#about to read 3, iclass 7, count 2 2006.229.02:00:56.32#ibcon#read 3, iclass 7, count 2 2006.229.02:00:56.32#ibcon#about to read 4, iclass 7, count 2 2006.229.02:00:56.32#ibcon#read 4, iclass 7, count 2 2006.229.02:00:56.32#ibcon#about to read 5, iclass 7, count 2 2006.229.02:00:56.32#ibcon#read 5, iclass 7, count 2 2006.229.02:00:56.32#ibcon#about to read 6, iclass 7, count 2 2006.229.02:00:56.32#ibcon#read 6, iclass 7, count 2 2006.229.02:00:56.32#ibcon#end of sib2, iclass 7, count 2 2006.229.02:00:56.32#ibcon#*mode == 0, iclass 7, count 2 2006.229.02:00:56.32#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.02:00:56.32#ibcon#[27=AT08-04\r\n] 2006.229.02:00:56.32#ibcon#*before write, iclass 7, count 2 2006.229.02:00:56.32#ibcon#enter sib2, iclass 7, count 2 2006.229.02:00:56.32#ibcon#flushed, iclass 7, count 2 2006.229.02:00:56.32#ibcon#about to write, iclass 7, count 2 2006.229.02:00:56.32#ibcon#wrote, iclass 7, count 2 2006.229.02:00:56.32#ibcon#about to read 3, iclass 7, count 2 2006.229.02:00:56.35#ibcon#read 3, iclass 7, count 2 2006.229.02:00:56.35#ibcon#about to read 4, iclass 7, count 2 2006.229.02:00:56.35#ibcon#read 4, iclass 7, count 2 2006.229.02:00:56.35#ibcon#about to read 5, iclass 7, count 2 2006.229.02:00:56.35#ibcon#read 5, iclass 7, count 2 2006.229.02:00:56.35#ibcon#about to read 6, iclass 7, count 2 2006.229.02:00:56.35#ibcon#read 6, iclass 7, count 2 2006.229.02:00:56.35#ibcon#end of sib2, iclass 7, count 2 2006.229.02:00:56.35#ibcon#*after write, iclass 7, count 2 2006.229.02:00:56.35#ibcon#*before return 0, iclass 7, count 2 2006.229.02:00:56.35#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:56.35#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:00:56.35#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.02:00:56.35#ibcon#ireg 7 cls_cnt 0 2006.229.02:00:56.35#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:56.47#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:56.47#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:56.47#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:00:56.47#ibcon#first serial, iclass 7, count 0 2006.229.02:00:56.47#ibcon#enter sib2, iclass 7, count 0 2006.229.02:00:56.47#ibcon#flushed, iclass 7, count 0 2006.229.02:00:56.47#ibcon#about to write, iclass 7, count 0 2006.229.02:00:56.47#ibcon#wrote, iclass 7, count 0 2006.229.02:00:56.47#ibcon#about to read 3, iclass 7, count 0 2006.229.02:00:56.49#ibcon#read 3, iclass 7, count 0 2006.229.02:00:56.49#ibcon#about to read 4, iclass 7, count 0 2006.229.02:00:56.49#ibcon#read 4, iclass 7, count 0 2006.229.02:00:56.49#ibcon#about to read 5, iclass 7, count 0 2006.229.02:00:56.49#ibcon#read 5, iclass 7, count 0 2006.229.02:00:56.49#ibcon#about to read 6, iclass 7, count 0 2006.229.02:00:56.49#ibcon#read 6, iclass 7, count 0 2006.229.02:00:56.49#ibcon#end of sib2, iclass 7, count 0 2006.229.02:00:56.49#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:00:56.49#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:00:56.49#ibcon#[27=USB\r\n] 2006.229.02:00:56.49#ibcon#*before write, iclass 7, count 0 2006.229.02:00:56.49#ibcon#enter sib2, iclass 7, count 0 2006.229.02:00:56.49#ibcon#flushed, iclass 7, count 0 2006.229.02:00:56.49#ibcon#about to write, iclass 7, count 0 2006.229.02:00:56.49#ibcon#wrote, iclass 7, count 0 2006.229.02:00:56.49#ibcon#about to read 3, iclass 7, count 0 2006.229.02:00:56.52#ibcon#read 3, iclass 7, count 0 2006.229.02:00:56.52#ibcon#about to read 4, iclass 7, count 0 2006.229.02:00:56.52#ibcon#read 4, iclass 7, count 0 2006.229.02:00:56.52#ibcon#about to read 5, iclass 7, count 0 2006.229.02:00:56.52#ibcon#read 5, iclass 7, count 0 2006.229.02:00:56.52#ibcon#about to read 6, iclass 7, count 0 2006.229.02:00:56.52#ibcon#read 6, iclass 7, count 0 2006.229.02:00:56.52#ibcon#end of sib2, iclass 7, count 0 2006.229.02:00:56.52#ibcon#*after write, iclass 7, count 0 2006.229.02:00:56.52#ibcon#*before return 0, iclass 7, count 0 2006.229.02:00:56.52#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:56.52#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:00:56.52#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:00:56.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:00:56.52$vck44/vabw=wide 2006.229.02:00:56.52#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:00:56.52#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:00:56.52#ibcon#ireg 8 cls_cnt 0 2006.229.02:00:56.52#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:56.52#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:56.52#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:56.52#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:00:56.52#ibcon#first serial, iclass 11, count 0 2006.229.02:00:56.52#ibcon#enter sib2, iclass 11, count 0 2006.229.02:00:56.52#ibcon#flushed, iclass 11, count 0 2006.229.02:00:56.52#ibcon#about to write, iclass 11, count 0 2006.229.02:00:56.52#ibcon#wrote, iclass 11, count 0 2006.229.02:00:56.52#ibcon#about to read 3, iclass 11, count 0 2006.229.02:00:56.54#ibcon#read 3, iclass 11, count 0 2006.229.02:00:56.54#ibcon#about to read 4, iclass 11, count 0 2006.229.02:00:56.54#ibcon#read 4, iclass 11, count 0 2006.229.02:00:56.54#ibcon#about to read 5, iclass 11, count 0 2006.229.02:00:56.54#ibcon#read 5, iclass 11, count 0 2006.229.02:00:56.54#ibcon#about to read 6, iclass 11, count 0 2006.229.02:00:56.54#ibcon#read 6, iclass 11, count 0 2006.229.02:00:56.54#ibcon#end of sib2, iclass 11, count 0 2006.229.02:00:56.54#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:00:56.54#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:00:56.54#ibcon#[25=BW32\r\n] 2006.229.02:00:56.54#ibcon#*before write, iclass 11, count 0 2006.229.02:00:56.54#ibcon#enter sib2, iclass 11, count 0 2006.229.02:00:56.54#ibcon#flushed, iclass 11, count 0 2006.229.02:00:56.54#ibcon#about to write, iclass 11, count 0 2006.229.02:00:56.54#ibcon#wrote, iclass 11, count 0 2006.229.02:00:56.54#ibcon#about to read 3, iclass 11, count 0 2006.229.02:00:56.57#ibcon#read 3, iclass 11, count 0 2006.229.02:00:56.57#ibcon#about to read 4, iclass 11, count 0 2006.229.02:00:56.57#ibcon#read 4, iclass 11, count 0 2006.229.02:00:56.57#ibcon#about to read 5, iclass 11, count 0 2006.229.02:00:56.57#ibcon#read 5, iclass 11, count 0 2006.229.02:00:56.57#ibcon#about to read 6, iclass 11, count 0 2006.229.02:00:56.57#ibcon#read 6, iclass 11, count 0 2006.229.02:00:56.57#ibcon#end of sib2, iclass 11, count 0 2006.229.02:00:56.57#ibcon#*after write, iclass 11, count 0 2006.229.02:00:56.57#ibcon#*before return 0, iclass 11, count 0 2006.229.02:00:56.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:56.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:00:56.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:00:56.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:00:56.57$vck44/vbbw=wide 2006.229.02:00:56.57#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.02:00:56.57#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.02:00:56.57#ibcon#ireg 8 cls_cnt 0 2006.229.02:00:56.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:00:56.64#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:00:56.64#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:00:56.64#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:00:56.64#ibcon#first serial, iclass 13, count 0 2006.229.02:00:56.64#ibcon#enter sib2, iclass 13, count 0 2006.229.02:00:56.64#ibcon#flushed, iclass 13, count 0 2006.229.02:00:56.64#ibcon#about to write, iclass 13, count 0 2006.229.02:00:56.64#ibcon#wrote, iclass 13, count 0 2006.229.02:00:56.64#ibcon#about to read 3, iclass 13, count 0 2006.229.02:00:56.66#ibcon#read 3, iclass 13, count 0 2006.229.02:00:56.66#ibcon#about to read 4, iclass 13, count 0 2006.229.02:00:56.66#ibcon#read 4, iclass 13, count 0 2006.229.02:00:56.66#ibcon#about to read 5, iclass 13, count 0 2006.229.02:00:56.66#ibcon#read 5, iclass 13, count 0 2006.229.02:00:56.66#ibcon#about to read 6, iclass 13, count 0 2006.229.02:00:56.66#ibcon#read 6, iclass 13, count 0 2006.229.02:00:56.66#ibcon#end of sib2, iclass 13, count 0 2006.229.02:00:56.66#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:00:56.66#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:00:56.66#ibcon#[27=BW32\r\n] 2006.229.02:00:56.66#ibcon#*before write, iclass 13, count 0 2006.229.02:00:56.66#ibcon#enter sib2, iclass 13, count 0 2006.229.02:00:56.66#ibcon#flushed, iclass 13, count 0 2006.229.02:00:56.66#ibcon#about to write, iclass 13, count 0 2006.229.02:00:56.66#ibcon#wrote, iclass 13, count 0 2006.229.02:00:56.66#ibcon#about to read 3, iclass 13, count 0 2006.229.02:00:56.69#ibcon#read 3, iclass 13, count 0 2006.229.02:00:56.69#ibcon#about to read 4, iclass 13, count 0 2006.229.02:00:56.69#ibcon#read 4, iclass 13, count 0 2006.229.02:00:56.69#ibcon#about to read 5, iclass 13, count 0 2006.229.02:00:56.69#ibcon#read 5, iclass 13, count 0 2006.229.02:00:56.69#ibcon#about to read 6, iclass 13, count 0 2006.229.02:00:56.69#ibcon#read 6, iclass 13, count 0 2006.229.02:00:56.69#ibcon#end of sib2, iclass 13, count 0 2006.229.02:00:56.69#ibcon#*after write, iclass 13, count 0 2006.229.02:00:56.69#ibcon#*before return 0, iclass 13, count 0 2006.229.02:00:56.69#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:00:56.69#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:00:56.69#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:00:56.69#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:00:56.69$setupk4/ifdk4 2006.229.02:00:56.69$ifdk4/lo= 2006.229.02:00:56.69$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:00:56.69$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:00:56.69$ifdk4/patch= 2006.229.02:00:56.69$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:00:56.69$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:00:56.69$setupk4/!*+20s 2006.229.02:00:58.61#abcon#<5=/05 3.4 5.4 30.16 891001.1\r\n> 2006.229.02:00:58.63#abcon#{5=INTERFACE CLEAR} 2006.229.02:00:58.69#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:01:08.78#abcon#<5=/05 3.3 5.4 30.15 891001.1\r\n> 2006.229.02:01:08.80#abcon#{5=INTERFACE CLEAR} 2006.229.02:01:08.86#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:01:11.18$setupk4/"tpicd 2006.229.02:01:11.18$setupk4/echo=off 2006.229.02:01:11.18$setupk4/xlog=off 2006.229.02:01:11.18:!2006.229.02:02:24 2006.229.02:01:21.14#trakl#Source acquired 2006.229.02:01:22.14#flagr#flagr/antenna,acquired 2006.229.02:02:24.00:preob 2006.229.02:02:24.13/onsource/TRACKING 2006.229.02:02:24.13:!2006.229.02:02:34 2006.229.02:02:34.00:"tape 2006.229.02:02:34.00:"st=record 2006.229.02:02:34.00:data_valid=on 2006.229.02:02:34.00:midob 2006.229.02:02:34.13/onsource/TRACKING 2006.229.02:02:34.13/wx/30.11,1001.2,91 2006.229.02:02:34.26/cable/+6.4081E-03 2006.229.02:02:35.35/va/01,08,usb,yes,37,40 2006.229.02:02:35.35/va/02,07,usb,yes,40,41 2006.229.02:02:35.35/va/03,06,usb,yes,50,53 2006.229.02:02:35.35/va/04,07,usb,yes,42,44 2006.229.02:02:35.35/va/05,04,usb,yes,37,38 2006.229.02:02:35.35/va/06,04,usb,yes,42,41 2006.229.02:02:35.35/va/07,05,usb,yes,37,38 2006.229.02:02:35.35/va/08,06,usb,yes,27,34 2006.229.02:02:35.58/valo/01,524.99,yes,locked 2006.229.02:02:35.58/valo/02,534.99,yes,locked 2006.229.02:02:35.58/valo/03,564.99,yes,locked 2006.229.02:02:35.58/valo/04,624.99,yes,locked 2006.229.02:02:35.58/valo/05,734.99,yes,locked 2006.229.02:02:35.58/valo/06,814.99,yes,locked 2006.229.02:02:35.58/valo/07,864.99,yes,locked 2006.229.02:02:35.58/valo/08,884.99,yes,locked 2006.229.02:02:36.67/vb/01,04,usb,yes,34,32 2006.229.02:02:36.67/vb/02,04,usb,yes,36,36 2006.229.02:02:36.67/vb/03,04,usb,yes,33,37 2006.229.02:02:36.67/vb/04,04,usb,yes,38,37 2006.229.02:02:36.67/vb/05,04,usb,yes,30,33 2006.229.02:02:36.67/vb/06,04,usb,yes,35,31 2006.229.02:02:36.67/vb/07,04,usb,yes,35,35 2006.229.02:02:36.67/vb/08,04,usb,yes,32,36 2006.229.02:02:36.90/vblo/01,629.99,yes,locked 2006.229.02:02:36.90/vblo/02,634.99,yes,locked 2006.229.02:02:36.90/vblo/03,649.99,yes,locked 2006.229.02:02:36.90/vblo/04,679.99,yes,locked 2006.229.02:02:36.90/vblo/05,709.99,yes,locked 2006.229.02:02:36.90/vblo/06,719.99,yes,locked 2006.229.02:02:36.90/vblo/07,734.99,yes,locked 2006.229.02:02:36.90/vblo/08,744.99,yes,locked 2006.229.02:02:37.05/vabw/8 2006.229.02:02:37.20/vbbw/8 2006.229.02:02:37.29/xfe/off,on,12.0 2006.229.02:02:37.66/ifatt/23,28,28,28 2006.229.02:02:38.08/fmout-gps/S +4.43E-07 2006.229.02:02:38.12:!2006.229.02:03:14 2006.229.02:03:14.02:data_valid=off 2006.229.02:03:14.02:"et 2006.229.02:03:14.02:!+3s 2006.229.02:03:17.06:"tape 2006.229.02:03:17.06:postob 2006.229.02:03:17.27/cable/+6.4071E-03 2006.229.02:03:17.27/wx/30.09,1001.2,90 2006.229.02:03:17.33/fmout-gps/S +4.44E-07 2006.229.02:03:17.33:scan_name=229-0204,jd0608,50 2006.229.02:03:17.33:source=3c345,164258.81,394837.0,2000.0,cw 2006.229.02:03:19.14#flagr#flagr/antenna,new-source 2006.229.02:03:19.14:checkk5 2006.229.02:03:19.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:03:19.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:03:20.39/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:03:20.80/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:03:21.18/chk_obsdata//k5ts1/T2290202??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:03:21.59/chk_obsdata//k5ts2/T2290202??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:03:22.01/chk_obsdata//k5ts3/T2290202??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:03:22.41/chk_obsdata//k5ts4/T2290202??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.02:03:23.18/k5log//k5ts1_log_newline 2006.229.02:03:24.00/k5log//k5ts2_log_newline 2006.229.02:03:24.82/k5log//k5ts3_log_newline 2006.229.02:03:25.56/k5log//k5ts4_log_newline 2006.229.02:03:25.59/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:03:25.59:setupk4=1 2006.229.02:03:25.59$setupk4/echo=on 2006.229.02:03:25.59$setupk4/pcalon 2006.229.02:03:25.59$pcalon/"no phase cal control is implemented here 2006.229.02:03:25.59$setupk4/"tpicd=stop 2006.229.02:03:25.59$setupk4/"rec=synch_on 2006.229.02:03:25.59$setupk4/"rec_mode=128 2006.229.02:03:25.59$setupk4/!* 2006.229.02:03:25.59$setupk4/recpk4 2006.229.02:03:25.59$recpk4/recpatch= 2006.229.02:03:25.59$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:03:25.59$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:03:25.59$setupk4/vck44 2006.229.02:03:25.59$vck44/valo=1,524.99 2006.229.02:03:25.59#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:03:25.59#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:03:25.59#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:25.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:25.59#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:25.59#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:25.59#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:03:25.59#ibcon#first serial, iclass 4, count 0 2006.229.02:03:25.59#ibcon#enter sib2, iclass 4, count 0 2006.229.02:03:25.59#ibcon#flushed, iclass 4, count 0 2006.229.02:03:25.59#ibcon#about to write, iclass 4, count 0 2006.229.02:03:25.59#ibcon#wrote, iclass 4, count 0 2006.229.02:03:25.59#ibcon#about to read 3, iclass 4, count 0 2006.229.02:03:25.63#ibcon#read 3, iclass 4, count 0 2006.229.02:03:25.63#ibcon#about to read 4, iclass 4, count 0 2006.229.02:03:25.63#ibcon#read 4, iclass 4, count 0 2006.229.02:03:25.63#ibcon#about to read 5, iclass 4, count 0 2006.229.02:03:25.63#ibcon#read 5, iclass 4, count 0 2006.229.02:03:25.63#ibcon#about to read 6, iclass 4, count 0 2006.229.02:03:25.63#ibcon#read 6, iclass 4, count 0 2006.229.02:03:25.63#ibcon#end of sib2, iclass 4, count 0 2006.229.02:03:25.63#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:03:25.63#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:03:25.63#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:03:25.63#ibcon#*before write, iclass 4, count 0 2006.229.02:03:25.63#ibcon#enter sib2, iclass 4, count 0 2006.229.02:03:25.63#ibcon#flushed, iclass 4, count 0 2006.229.02:03:25.63#ibcon#about to write, iclass 4, count 0 2006.229.02:03:25.63#ibcon#wrote, iclass 4, count 0 2006.229.02:03:25.63#ibcon#about to read 3, iclass 4, count 0 2006.229.02:03:25.68#ibcon#read 3, iclass 4, count 0 2006.229.02:03:25.68#ibcon#about to read 4, iclass 4, count 0 2006.229.02:03:25.68#ibcon#read 4, iclass 4, count 0 2006.229.02:03:25.68#ibcon#about to read 5, iclass 4, count 0 2006.229.02:03:25.68#ibcon#read 5, iclass 4, count 0 2006.229.02:03:25.68#ibcon#about to read 6, iclass 4, count 0 2006.229.02:03:25.68#ibcon#read 6, iclass 4, count 0 2006.229.02:03:25.69#ibcon#end of sib2, iclass 4, count 0 2006.229.02:03:25.69#ibcon#*after write, iclass 4, count 0 2006.229.02:03:25.69#ibcon#*before return 0, iclass 4, count 0 2006.229.02:03:25.69#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:25.69#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:25.69#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:03:25.69#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:03:25.69$vck44/va=1,8 2006.229.02:03:25.69#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:03:25.69#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:03:25.69#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:25.69#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:25.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:25.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:25.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:03:25.69#ibcon#first serial, iclass 6, count 2 2006.229.02:03:25.69#ibcon#enter sib2, iclass 6, count 2 2006.229.02:03:25.69#ibcon#flushed, iclass 6, count 2 2006.229.02:03:25.69#ibcon#about to write, iclass 6, count 2 2006.229.02:03:25.69#ibcon#wrote, iclass 6, count 2 2006.229.02:03:25.69#ibcon#about to read 3, iclass 6, count 2 2006.229.02:03:25.71#ibcon#read 3, iclass 6, count 2 2006.229.02:03:25.71#ibcon#about to read 4, iclass 6, count 2 2006.229.02:03:25.71#ibcon#read 4, iclass 6, count 2 2006.229.02:03:25.71#ibcon#about to read 5, iclass 6, count 2 2006.229.02:03:25.71#ibcon#read 5, iclass 6, count 2 2006.229.02:03:25.71#ibcon#about to read 6, iclass 6, count 2 2006.229.02:03:25.71#ibcon#read 6, iclass 6, count 2 2006.229.02:03:25.71#ibcon#end of sib2, iclass 6, count 2 2006.229.02:03:25.71#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:03:25.71#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:03:25.71#ibcon#[25=AT01-08\r\n] 2006.229.02:03:25.71#ibcon#*before write, iclass 6, count 2 2006.229.02:03:25.71#ibcon#enter sib2, iclass 6, count 2 2006.229.02:03:25.71#ibcon#flushed, iclass 6, count 2 2006.229.02:03:25.71#ibcon#about to write, iclass 6, count 2 2006.229.02:03:25.71#ibcon#wrote, iclass 6, count 2 2006.229.02:03:25.71#ibcon#about to read 3, iclass 6, count 2 2006.229.02:03:25.74#ibcon#read 3, iclass 6, count 2 2006.229.02:03:25.74#ibcon#about to read 4, iclass 6, count 2 2006.229.02:03:25.74#ibcon#read 4, iclass 6, count 2 2006.229.02:03:25.74#ibcon#about to read 5, iclass 6, count 2 2006.229.02:03:25.74#ibcon#read 5, iclass 6, count 2 2006.229.02:03:25.74#ibcon#about to read 6, iclass 6, count 2 2006.229.02:03:25.74#ibcon#read 6, iclass 6, count 2 2006.229.02:03:25.75#ibcon#end of sib2, iclass 6, count 2 2006.229.02:03:25.75#ibcon#*after write, iclass 6, count 2 2006.229.02:03:25.75#ibcon#*before return 0, iclass 6, count 2 2006.229.02:03:25.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:25.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:25.75#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:03:25.75#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:25.75#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:25.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:25.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:25.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:03:25.86#ibcon#first serial, iclass 6, count 0 2006.229.02:03:25.86#ibcon#enter sib2, iclass 6, count 0 2006.229.02:03:25.86#ibcon#flushed, iclass 6, count 0 2006.229.02:03:25.86#ibcon#about to write, iclass 6, count 0 2006.229.02:03:25.87#ibcon#wrote, iclass 6, count 0 2006.229.02:03:25.87#ibcon#about to read 3, iclass 6, count 0 2006.229.02:03:25.88#ibcon#read 3, iclass 6, count 0 2006.229.02:03:25.88#ibcon#about to read 4, iclass 6, count 0 2006.229.02:03:25.88#ibcon#read 4, iclass 6, count 0 2006.229.02:03:25.88#ibcon#about to read 5, iclass 6, count 0 2006.229.02:03:25.88#ibcon#read 5, iclass 6, count 0 2006.229.02:03:25.88#ibcon#about to read 6, iclass 6, count 0 2006.229.02:03:25.88#ibcon#read 6, iclass 6, count 0 2006.229.02:03:25.88#ibcon#end of sib2, iclass 6, count 0 2006.229.02:03:25.89#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:03:25.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:03:25.89#ibcon#[25=USB\r\n] 2006.229.02:03:25.89#ibcon#*before write, iclass 6, count 0 2006.229.02:03:25.89#ibcon#enter sib2, iclass 6, count 0 2006.229.02:03:25.89#ibcon#flushed, iclass 6, count 0 2006.229.02:03:25.89#ibcon#about to write, iclass 6, count 0 2006.229.02:03:25.89#ibcon#wrote, iclass 6, count 0 2006.229.02:03:25.89#ibcon#about to read 3, iclass 6, count 0 2006.229.02:03:25.91#ibcon#read 3, iclass 6, count 0 2006.229.02:03:25.92#ibcon#about to read 4, iclass 6, count 0 2006.229.02:03:25.92#ibcon#read 4, iclass 6, count 0 2006.229.02:03:25.92#ibcon#about to read 5, iclass 6, count 0 2006.229.02:03:25.92#ibcon#read 5, iclass 6, count 0 2006.229.02:03:25.92#ibcon#about to read 6, iclass 6, count 0 2006.229.02:03:25.92#ibcon#read 6, iclass 6, count 0 2006.229.02:03:25.92#ibcon#end of sib2, iclass 6, count 0 2006.229.02:03:25.92#ibcon#*after write, iclass 6, count 0 2006.229.02:03:25.92#ibcon#*before return 0, iclass 6, count 0 2006.229.02:03:25.92#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:25.92#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:25.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:03:25.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:03:25.92$vck44/valo=2,534.99 2006.229.02:03:25.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:03:25.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:03:25.92#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:25.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:25.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:25.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:25.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:03:25.92#ibcon#first serial, iclass 10, count 0 2006.229.02:03:25.92#ibcon#enter sib2, iclass 10, count 0 2006.229.02:03:25.92#ibcon#flushed, iclass 10, count 0 2006.229.02:03:25.92#ibcon#about to write, iclass 10, count 0 2006.229.02:03:25.92#ibcon#wrote, iclass 10, count 0 2006.229.02:03:25.92#ibcon#about to read 3, iclass 10, count 0 2006.229.02:03:25.93#ibcon#read 3, iclass 10, count 0 2006.229.02:03:25.93#ibcon#about to read 4, iclass 10, count 0 2006.229.02:03:25.93#ibcon#read 4, iclass 10, count 0 2006.229.02:03:25.93#ibcon#about to read 5, iclass 10, count 0 2006.229.02:03:25.93#ibcon#read 5, iclass 10, count 0 2006.229.02:03:25.94#ibcon#about to read 6, iclass 10, count 0 2006.229.02:03:25.94#ibcon#read 6, iclass 10, count 0 2006.229.02:03:25.94#ibcon#end of sib2, iclass 10, count 0 2006.229.02:03:25.94#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:03:25.94#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:03:25.94#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:03:25.94#ibcon#*before write, iclass 10, count 0 2006.229.02:03:25.94#ibcon#enter sib2, iclass 10, count 0 2006.229.02:03:25.94#ibcon#flushed, iclass 10, count 0 2006.229.02:03:25.94#ibcon#about to write, iclass 10, count 0 2006.229.02:03:25.94#ibcon#wrote, iclass 10, count 0 2006.229.02:03:25.94#ibcon#about to read 3, iclass 10, count 0 2006.229.02:03:25.97#ibcon#read 3, iclass 10, count 0 2006.229.02:03:25.97#ibcon#about to read 4, iclass 10, count 0 2006.229.02:03:25.98#ibcon#read 4, iclass 10, count 0 2006.229.02:03:25.98#ibcon#about to read 5, iclass 10, count 0 2006.229.02:03:25.98#ibcon#read 5, iclass 10, count 0 2006.229.02:03:25.98#ibcon#about to read 6, iclass 10, count 0 2006.229.02:03:25.98#ibcon#read 6, iclass 10, count 0 2006.229.02:03:25.98#ibcon#end of sib2, iclass 10, count 0 2006.229.02:03:25.98#ibcon#*after write, iclass 10, count 0 2006.229.02:03:25.98#ibcon#*before return 0, iclass 10, count 0 2006.229.02:03:25.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:25.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:25.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:03:25.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:03:25.98$vck44/va=2,7 2006.229.02:03:25.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:03:25.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:03:25.98#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:25.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:26.03#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:26.03#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:26.03#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:03:26.03#ibcon#first serial, iclass 12, count 2 2006.229.02:03:26.03#ibcon#enter sib2, iclass 12, count 2 2006.229.02:03:26.03#ibcon#flushed, iclass 12, count 2 2006.229.02:03:26.03#ibcon#about to write, iclass 12, count 2 2006.229.02:03:26.03#ibcon#wrote, iclass 12, count 2 2006.229.02:03:26.04#ibcon#about to read 3, iclass 12, count 2 2006.229.02:03:26.05#ibcon#read 3, iclass 12, count 2 2006.229.02:03:26.05#ibcon#about to read 4, iclass 12, count 2 2006.229.02:03:26.06#ibcon#read 4, iclass 12, count 2 2006.229.02:03:26.06#ibcon#about to read 5, iclass 12, count 2 2006.229.02:03:26.06#ibcon#read 5, iclass 12, count 2 2006.229.02:03:26.06#ibcon#about to read 6, iclass 12, count 2 2006.229.02:03:26.06#ibcon#read 6, iclass 12, count 2 2006.229.02:03:26.06#ibcon#end of sib2, iclass 12, count 2 2006.229.02:03:26.06#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:03:26.06#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:03:26.06#ibcon#[25=AT02-07\r\n] 2006.229.02:03:26.06#ibcon#*before write, iclass 12, count 2 2006.229.02:03:26.06#ibcon#enter sib2, iclass 12, count 2 2006.229.02:03:26.06#ibcon#flushed, iclass 12, count 2 2006.229.02:03:26.06#ibcon#about to write, iclass 12, count 2 2006.229.02:03:26.06#ibcon#wrote, iclass 12, count 2 2006.229.02:03:26.06#ibcon#about to read 3, iclass 12, count 2 2006.229.02:03:26.08#ibcon#read 3, iclass 12, count 2 2006.229.02:03:26.08#ibcon#about to read 4, iclass 12, count 2 2006.229.02:03:26.08#ibcon#read 4, iclass 12, count 2 2006.229.02:03:26.08#ibcon#about to read 5, iclass 12, count 2 2006.229.02:03:26.08#ibcon#read 5, iclass 12, count 2 2006.229.02:03:26.08#ibcon#about to read 6, iclass 12, count 2 2006.229.02:03:26.08#ibcon#read 6, iclass 12, count 2 2006.229.02:03:26.09#ibcon#end of sib2, iclass 12, count 2 2006.229.02:03:26.09#ibcon#*after write, iclass 12, count 2 2006.229.02:03:26.09#ibcon#*before return 0, iclass 12, count 2 2006.229.02:03:26.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:26.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:26.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:03:26.09#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:26.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:26.20#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:26.20#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:26.20#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:03:26.20#ibcon#first serial, iclass 12, count 0 2006.229.02:03:26.20#ibcon#enter sib2, iclass 12, count 0 2006.229.02:03:26.20#ibcon#flushed, iclass 12, count 0 2006.229.02:03:26.20#ibcon#about to write, iclass 12, count 0 2006.229.02:03:26.21#ibcon#wrote, iclass 12, count 0 2006.229.02:03:26.21#ibcon#about to read 3, iclass 12, count 0 2006.229.02:03:26.22#ibcon#read 3, iclass 12, count 0 2006.229.02:03:26.22#ibcon#about to read 4, iclass 12, count 0 2006.229.02:03:26.22#ibcon#read 4, iclass 12, count 0 2006.229.02:03:26.22#ibcon#about to read 5, iclass 12, count 0 2006.229.02:03:26.22#ibcon#read 5, iclass 12, count 0 2006.229.02:03:26.22#ibcon#about to read 6, iclass 12, count 0 2006.229.02:03:26.22#ibcon#read 6, iclass 12, count 0 2006.229.02:03:26.22#ibcon#end of sib2, iclass 12, count 0 2006.229.02:03:26.23#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:03:26.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:03:26.23#ibcon#[25=USB\r\n] 2006.229.02:03:26.23#ibcon#*before write, iclass 12, count 0 2006.229.02:03:26.23#ibcon#enter sib2, iclass 12, count 0 2006.229.02:03:26.23#ibcon#flushed, iclass 12, count 0 2006.229.02:03:26.23#ibcon#about to write, iclass 12, count 0 2006.229.02:03:26.23#ibcon#wrote, iclass 12, count 0 2006.229.02:03:26.23#ibcon#about to read 3, iclass 12, count 0 2006.229.02:03:26.25#ibcon#read 3, iclass 12, count 0 2006.229.02:03:26.25#ibcon#about to read 4, iclass 12, count 0 2006.229.02:03:26.25#ibcon#read 4, iclass 12, count 0 2006.229.02:03:26.25#ibcon#about to read 5, iclass 12, count 0 2006.229.02:03:26.25#ibcon#read 5, iclass 12, count 0 2006.229.02:03:26.25#ibcon#about to read 6, iclass 12, count 0 2006.229.02:03:26.25#ibcon#read 6, iclass 12, count 0 2006.229.02:03:26.25#ibcon#end of sib2, iclass 12, count 0 2006.229.02:03:26.26#ibcon#*after write, iclass 12, count 0 2006.229.02:03:26.26#ibcon#*before return 0, iclass 12, count 0 2006.229.02:03:26.26#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:26.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:26.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:03:26.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:03:26.26$vck44/valo=3,564.99 2006.229.02:03:26.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:03:26.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:03:26.26#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:26.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:26.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:26.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:26.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:03:26.26#ibcon#first serial, iclass 14, count 0 2006.229.02:03:26.26#ibcon#enter sib2, iclass 14, count 0 2006.229.02:03:26.26#ibcon#flushed, iclass 14, count 0 2006.229.02:03:26.26#ibcon#about to write, iclass 14, count 0 2006.229.02:03:26.26#ibcon#wrote, iclass 14, count 0 2006.229.02:03:26.26#ibcon#about to read 3, iclass 14, count 0 2006.229.02:03:26.27#ibcon#read 3, iclass 14, count 0 2006.229.02:03:26.28#ibcon#about to read 4, iclass 14, count 0 2006.229.02:03:26.28#ibcon#read 4, iclass 14, count 0 2006.229.02:03:26.28#ibcon#about to read 5, iclass 14, count 0 2006.229.02:03:26.28#ibcon#read 5, iclass 14, count 0 2006.229.02:03:26.28#ibcon#about to read 6, iclass 14, count 0 2006.229.02:03:26.28#ibcon#read 6, iclass 14, count 0 2006.229.02:03:26.28#ibcon#end of sib2, iclass 14, count 0 2006.229.02:03:26.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:03:26.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:03:26.28#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:03:26.28#ibcon#*before write, iclass 14, count 0 2006.229.02:03:26.28#ibcon#enter sib2, iclass 14, count 0 2006.229.02:03:26.28#ibcon#flushed, iclass 14, count 0 2006.229.02:03:26.28#ibcon#about to write, iclass 14, count 0 2006.229.02:03:26.28#ibcon#wrote, iclass 14, count 0 2006.229.02:03:26.28#ibcon#about to read 3, iclass 14, count 0 2006.229.02:03:26.31#ibcon#read 3, iclass 14, count 0 2006.229.02:03:26.31#ibcon#about to read 4, iclass 14, count 0 2006.229.02:03:26.31#ibcon#read 4, iclass 14, count 0 2006.229.02:03:26.31#ibcon#about to read 5, iclass 14, count 0 2006.229.02:03:26.31#ibcon#read 5, iclass 14, count 0 2006.229.02:03:26.31#ibcon#about to read 6, iclass 14, count 0 2006.229.02:03:26.32#ibcon#read 6, iclass 14, count 0 2006.229.02:03:26.32#ibcon#end of sib2, iclass 14, count 0 2006.229.02:03:26.32#ibcon#*after write, iclass 14, count 0 2006.229.02:03:26.32#ibcon#*before return 0, iclass 14, count 0 2006.229.02:03:26.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:26.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:26.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:03:26.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:03:26.32$vck44/va=3,6 2006.229.02:03:26.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:03:26.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:03:26.32#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:26.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:26.37#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:26.37#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:26.37#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:03:26.37#ibcon#first serial, iclass 16, count 2 2006.229.02:03:26.37#ibcon#enter sib2, iclass 16, count 2 2006.229.02:03:26.37#ibcon#flushed, iclass 16, count 2 2006.229.02:03:26.37#ibcon#about to write, iclass 16, count 2 2006.229.02:03:26.37#ibcon#wrote, iclass 16, count 2 2006.229.02:03:26.37#ibcon#about to read 3, iclass 16, count 2 2006.229.02:03:26.39#ibcon#read 3, iclass 16, count 2 2006.229.02:03:26.40#ibcon#about to read 4, iclass 16, count 2 2006.229.02:03:26.40#ibcon#read 4, iclass 16, count 2 2006.229.02:03:26.40#ibcon#about to read 5, iclass 16, count 2 2006.229.02:03:26.40#ibcon#read 5, iclass 16, count 2 2006.229.02:03:26.40#ibcon#about to read 6, iclass 16, count 2 2006.229.02:03:26.40#ibcon#read 6, iclass 16, count 2 2006.229.02:03:26.40#ibcon#end of sib2, iclass 16, count 2 2006.229.02:03:26.40#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:03:26.40#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:03:26.40#ibcon#[25=AT03-06\r\n] 2006.229.02:03:26.40#ibcon#*before write, iclass 16, count 2 2006.229.02:03:26.40#ibcon#enter sib2, iclass 16, count 2 2006.229.02:03:26.40#ibcon#flushed, iclass 16, count 2 2006.229.02:03:26.40#ibcon#about to write, iclass 16, count 2 2006.229.02:03:26.40#ibcon#wrote, iclass 16, count 2 2006.229.02:03:26.40#ibcon#about to read 3, iclass 16, count 2 2006.229.02:03:26.42#ibcon#read 3, iclass 16, count 2 2006.229.02:03:26.42#ibcon#about to read 4, iclass 16, count 2 2006.229.02:03:26.42#ibcon#read 4, iclass 16, count 2 2006.229.02:03:26.42#ibcon#about to read 5, iclass 16, count 2 2006.229.02:03:26.42#ibcon#read 5, iclass 16, count 2 2006.229.02:03:26.42#ibcon#about to read 6, iclass 16, count 2 2006.229.02:03:26.43#ibcon#read 6, iclass 16, count 2 2006.229.02:03:26.43#ibcon#end of sib2, iclass 16, count 2 2006.229.02:03:26.43#ibcon#*after write, iclass 16, count 2 2006.229.02:03:26.43#ibcon#*before return 0, iclass 16, count 2 2006.229.02:03:26.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:26.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:26.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:03:26.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:26.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:26.54#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:26.54#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:26.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:03:26.54#ibcon#first serial, iclass 16, count 0 2006.229.02:03:26.54#ibcon#enter sib2, iclass 16, count 0 2006.229.02:03:26.54#ibcon#flushed, iclass 16, count 0 2006.229.02:03:26.54#ibcon#about to write, iclass 16, count 0 2006.229.02:03:26.55#ibcon#wrote, iclass 16, count 0 2006.229.02:03:26.55#ibcon#about to read 3, iclass 16, count 0 2006.229.02:03:26.56#ibcon#read 3, iclass 16, count 0 2006.229.02:03:26.56#ibcon#about to read 4, iclass 16, count 0 2006.229.02:03:26.56#ibcon#read 4, iclass 16, count 0 2006.229.02:03:26.56#ibcon#about to read 5, iclass 16, count 0 2006.229.02:03:26.56#ibcon#read 5, iclass 16, count 0 2006.229.02:03:26.56#ibcon#about to read 6, iclass 16, count 0 2006.229.02:03:26.56#ibcon#read 6, iclass 16, count 0 2006.229.02:03:26.56#ibcon#end of sib2, iclass 16, count 0 2006.229.02:03:26.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:03:26.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:03:26.57#ibcon#[25=USB\r\n] 2006.229.02:03:26.57#ibcon#*before write, iclass 16, count 0 2006.229.02:03:26.57#ibcon#enter sib2, iclass 16, count 0 2006.229.02:03:26.57#ibcon#flushed, iclass 16, count 0 2006.229.02:03:26.57#ibcon#about to write, iclass 16, count 0 2006.229.02:03:26.57#ibcon#wrote, iclass 16, count 0 2006.229.02:03:26.57#ibcon#about to read 3, iclass 16, count 0 2006.229.02:03:26.59#ibcon#read 3, iclass 16, count 0 2006.229.02:03:26.59#ibcon#about to read 4, iclass 16, count 0 2006.229.02:03:26.59#ibcon#read 4, iclass 16, count 0 2006.229.02:03:26.59#ibcon#about to read 5, iclass 16, count 0 2006.229.02:03:26.59#ibcon#read 5, iclass 16, count 0 2006.229.02:03:26.59#ibcon#about to read 6, iclass 16, count 0 2006.229.02:03:26.59#ibcon#read 6, iclass 16, count 0 2006.229.02:03:26.59#ibcon#end of sib2, iclass 16, count 0 2006.229.02:03:26.60#ibcon#*after write, iclass 16, count 0 2006.229.02:03:26.60#ibcon#*before return 0, iclass 16, count 0 2006.229.02:03:26.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:26.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:26.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:03:26.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:03:26.60$vck44/valo=4,624.99 2006.229.02:03:26.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:03:26.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:03:26.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:26.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:26.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:26.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:26.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:03:26.60#ibcon#first serial, iclass 18, count 0 2006.229.02:03:26.60#ibcon#enter sib2, iclass 18, count 0 2006.229.02:03:26.60#ibcon#flushed, iclass 18, count 0 2006.229.02:03:26.60#ibcon#about to write, iclass 18, count 0 2006.229.02:03:26.60#ibcon#wrote, iclass 18, count 0 2006.229.02:03:26.60#ibcon#about to read 3, iclass 18, count 0 2006.229.02:03:26.61#ibcon#read 3, iclass 18, count 0 2006.229.02:03:26.61#ibcon#about to read 4, iclass 18, count 0 2006.229.02:03:26.61#ibcon#read 4, iclass 18, count 0 2006.229.02:03:26.61#ibcon#about to read 5, iclass 18, count 0 2006.229.02:03:26.62#ibcon#read 5, iclass 18, count 0 2006.229.02:03:26.62#ibcon#about to read 6, iclass 18, count 0 2006.229.02:03:26.62#ibcon#read 6, iclass 18, count 0 2006.229.02:03:26.62#ibcon#end of sib2, iclass 18, count 0 2006.229.02:03:26.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:03:26.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:03:26.62#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:03:26.62#ibcon#*before write, iclass 18, count 0 2006.229.02:03:26.62#ibcon#enter sib2, iclass 18, count 0 2006.229.02:03:26.62#ibcon#flushed, iclass 18, count 0 2006.229.02:03:26.62#ibcon#about to write, iclass 18, count 0 2006.229.02:03:26.62#ibcon#wrote, iclass 18, count 0 2006.229.02:03:26.62#ibcon#about to read 3, iclass 18, count 0 2006.229.02:03:26.65#ibcon#read 3, iclass 18, count 0 2006.229.02:03:26.65#ibcon#about to read 4, iclass 18, count 0 2006.229.02:03:26.65#ibcon#read 4, iclass 18, count 0 2006.229.02:03:26.65#ibcon#about to read 5, iclass 18, count 0 2006.229.02:03:26.65#ibcon#read 5, iclass 18, count 0 2006.229.02:03:26.65#ibcon#about to read 6, iclass 18, count 0 2006.229.02:03:26.65#ibcon#read 6, iclass 18, count 0 2006.229.02:03:26.65#ibcon#end of sib2, iclass 18, count 0 2006.229.02:03:26.65#ibcon#*after write, iclass 18, count 0 2006.229.02:03:26.66#ibcon#*before return 0, iclass 18, count 0 2006.229.02:03:26.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:26.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:26.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:03:26.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:03:26.66$vck44/va=4,7 2006.229.02:03:26.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.02:03:26.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.02:03:26.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:26.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:26.71#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:26.71#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:26.71#ibcon#enter wrdev, iclass 20, count 2 2006.229.02:03:26.71#ibcon#first serial, iclass 20, count 2 2006.229.02:03:26.71#ibcon#enter sib2, iclass 20, count 2 2006.229.02:03:26.71#ibcon#flushed, iclass 20, count 2 2006.229.02:03:26.71#ibcon#about to write, iclass 20, count 2 2006.229.02:03:26.71#ibcon#wrote, iclass 20, count 2 2006.229.02:03:26.71#ibcon#about to read 3, iclass 20, count 2 2006.229.02:03:26.73#ibcon#read 3, iclass 20, count 2 2006.229.02:03:26.73#ibcon#about to read 4, iclass 20, count 2 2006.229.02:03:26.73#ibcon#read 4, iclass 20, count 2 2006.229.02:03:26.73#ibcon#about to read 5, iclass 20, count 2 2006.229.02:03:26.73#ibcon#read 5, iclass 20, count 2 2006.229.02:03:26.73#ibcon#about to read 6, iclass 20, count 2 2006.229.02:03:26.73#ibcon#read 6, iclass 20, count 2 2006.229.02:03:26.73#ibcon#end of sib2, iclass 20, count 2 2006.229.02:03:26.74#ibcon#*mode == 0, iclass 20, count 2 2006.229.02:03:26.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.02:03:26.74#ibcon#[25=AT04-07\r\n] 2006.229.02:03:26.74#ibcon#*before write, iclass 20, count 2 2006.229.02:03:26.74#ibcon#enter sib2, iclass 20, count 2 2006.229.02:03:26.74#ibcon#flushed, iclass 20, count 2 2006.229.02:03:26.74#ibcon#about to write, iclass 20, count 2 2006.229.02:03:26.74#ibcon#wrote, iclass 20, count 2 2006.229.02:03:26.74#ibcon#about to read 3, iclass 20, count 2 2006.229.02:03:26.76#ibcon#read 3, iclass 20, count 2 2006.229.02:03:26.76#ibcon#about to read 4, iclass 20, count 2 2006.229.02:03:26.76#ibcon#read 4, iclass 20, count 2 2006.229.02:03:26.76#ibcon#about to read 5, iclass 20, count 2 2006.229.02:03:26.76#ibcon#read 5, iclass 20, count 2 2006.229.02:03:26.76#ibcon#about to read 6, iclass 20, count 2 2006.229.02:03:26.76#ibcon#read 6, iclass 20, count 2 2006.229.02:03:26.76#ibcon#end of sib2, iclass 20, count 2 2006.229.02:03:26.77#ibcon#*after write, iclass 20, count 2 2006.229.02:03:26.77#ibcon#*before return 0, iclass 20, count 2 2006.229.02:03:26.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:26.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:26.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.02:03:26.77#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:26.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:26.88#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:26.88#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:26.88#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:03:26.88#ibcon#first serial, iclass 20, count 0 2006.229.02:03:26.88#ibcon#enter sib2, iclass 20, count 0 2006.229.02:03:26.88#ibcon#flushed, iclass 20, count 0 2006.229.02:03:26.88#ibcon#about to write, iclass 20, count 0 2006.229.02:03:26.88#ibcon#wrote, iclass 20, count 0 2006.229.02:03:26.89#ibcon#about to read 3, iclass 20, count 0 2006.229.02:03:26.90#ibcon#read 3, iclass 20, count 0 2006.229.02:03:26.90#ibcon#about to read 4, iclass 20, count 0 2006.229.02:03:26.90#ibcon#read 4, iclass 20, count 0 2006.229.02:03:26.90#ibcon#about to read 5, iclass 20, count 0 2006.229.02:03:26.90#ibcon#read 5, iclass 20, count 0 2006.229.02:03:26.90#ibcon#about to read 6, iclass 20, count 0 2006.229.02:03:26.90#ibcon#read 6, iclass 20, count 0 2006.229.02:03:26.90#ibcon#end of sib2, iclass 20, count 0 2006.229.02:03:26.91#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:03:26.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:03:26.91#ibcon#[25=USB\r\n] 2006.229.02:03:26.91#ibcon#*before write, iclass 20, count 0 2006.229.02:03:26.91#ibcon#enter sib2, iclass 20, count 0 2006.229.02:03:26.91#ibcon#flushed, iclass 20, count 0 2006.229.02:03:26.91#ibcon#about to write, iclass 20, count 0 2006.229.02:03:26.91#ibcon#wrote, iclass 20, count 0 2006.229.02:03:26.91#ibcon#about to read 3, iclass 20, count 0 2006.229.02:03:26.93#ibcon#read 3, iclass 20, count 0 2006.229.02:03:26.93#ibcon#about to read 4, iclass 20, count 0 2006.229.02:03:26.93#ibcon#read 4, iclass 20, count 0 2006.229.02:03:26.93#ibcon#about to read 5, iclass 20, count 0 2006.229.02:03:26.93#ibcon#read 5, iclass 20, count 0 2006.229.02:03:26.93#ibcon#about to read 6, iclass 20, count 0 2006.229.02:03:26.93#ibcon#read 6, iclass 20, count 0 2006.229.02:03:26.93#ibcon#end of sib2, iclass 20, count 0 2006.229.02:03:26.94#ibcon#*after write, iclass 20, count 0 2006.229.02:03:26.94#ibcon#*before return 0, iclass 20, count 0 2006.229.02:03:26.94#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:26.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:26.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:03:26.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:03:26.94$vck44/valo=5,734.99 2006.229.02:03:26.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:03:26.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:03:26.94#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:26.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:26.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:26.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:26.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:03:26.94#ibcon#first serial, iclass 22, count 0 2006.229.02:03:26.94#ibcon#enter sib2, iclass 22, count 0 2006.229.02:03:26.94#ibcon#flushed, iclass 22, count 0 2006.229.02:03:26.94#ibcon#about to write, iclass 22, count 0 2006.229.02:03:26.94#ibcon#wrote, iclass 22, count 0 2006.229.02:03:26.94#ibcon#about to read 3, iclass 22, count 0 2006.229.02:03:26.95#ibcon#read 3, iclass 22, count 0 2006.229.02:03:26.95#ibcon#about to read 4, iclass 22, count 0 2006.229.02:03:26.95#ibcon#read 4, iclass 22, count 0 2006.229.02:03:26.95#ibcon#about to read 5, iclass 22, count 0 2006.229.02:03:26.95#ibcon#read 5, iclass 22, count 0 2006.229.02:03:26.95#ibcon#about to read 6, iclass 22, count 0 2006.229.02:03:26.96#ibcon#read 6, iclass 22, count 0 2006.229.02:03:26.96#ibcon#end of sib2, iclass 22, count 0 2006.229.02:03:26.96#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:03:26.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:03:26.96#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:03:26.96#ibcon#*before write, iclass 22, count 0 2006.229.02:03:26.96#ibcon#enter sib2, iclass 22, count 0 2006.229.02:03:26.96#ibcon#flushed, iclass 22, count 0 2006.229.02:03:26.96#ibcon#about to write, iclass 22, count 0 2006.229.02:03:26.96#ibcon#wrote, iclass 22, count 0 2006.229.02:03:26.96#ibcon#about to read 3, iclass 22, count 0 2006.229.02:03:26.99#ibcon#read 3, iclass 22, count 0 2006.229.02:03:26.99#ibcon#about to read 4, iclass 22, count 0 2006.229.02:03:26.99#ibcon#read 4, iclass 22, count 0 2006.229.02:03:26.99#ibcon#about to read 5, iclass 22, count 0 2006.229.02:03:26.99#ibcon#read 5, iclass 22, count 0 2006.229.02:03:26.99#ibcon#about to read 6, iclass 22, count 0 2006.229.02:03:26.99#ibcon#read 6, iclass 22, count 0 2006.229.02:03:26.99#ibcon#end of sib2, iclass 22, count 0 2006.229.02:03:26.99#ibcon#*after write, iclass 22, count 0 2006.229.02:03:27.00#ibcon#*before return 0, iclass 22, count 0 2006.229.02:03:27.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:27.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:27.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:03:27.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:03:27.00$vck44/va=5,4 2006.229.02:03:27.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.02:03:27.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.02:03:27.00#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:27.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:27.05#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:27.05#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:27.05#ibcon#enter wrdev, iclass 24, count 2 2006.229.02:03:27.05#ibcon#first serial, iclass 24, count 2 2006.229.02:03:27.05#ibcon#enter sib2, iclass 24, count 2 2006.229.02:03:27.05#ibcon#flushed, iclass 24, count 2 2006.229.02:03:27.05#ibcon#about to write, iclass 24, count 2 2006.229.02:03:27.05#ibcon#wrote, iclass 24, count 2 2006.229.02:03:27.05#ibcon#about to read 3, iclass 24, count 2 2006.229.02:03:27.07#ibcon#read 3, iclass 24, count 2 2006.229.02:03:27.08#ibcon#about to read 4, iclass 24, count 2 2006.229.02:03:27.08#ibcon#read 4, iclass 24, count 2 2006.229.02:03:27.08#ibcon#about to read 5, iclass 24, count 2 2006.229.02:03:27.08#ibcon#read 5, iclass 24, count 2 2006.229.02:03:27.08#ibcon#about to read 6, iclass 24, count 2 2006.229.02:03:27.08#ibcon#read 6, iclass 24, count 2 2006.229.02:03:27.08#ibcon#end of sib2, iclass 24, count 2 2006.229.02:03:27.08#ibcon#*mode == 0, iclass 24, count 2 2006.229.02:03:27.08#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.02:03:27.08#ibcon#[25=AT05-04\r\n] 2006.229.02:03:27.08#ibcon#*before write, iclass 24, count 2 2006.229.02:03:27.08#ibcon#enter sib2, iclass 24, count 2 2006.229.02:03:27.08#ibcon#flushed, iclass 24, count 2 2006.229.02:03:27.08#ibcon#about to write, iclass 24, count 2 2006.229.02:03:27.08#ibcon#wrote, iclass 24, count 2 2006.229.02:03:27.08#ibcon#about to read 3, iclass 24, count 2 2006.229.02:03:27.10#ibcon#read 3, iclass 24, count 2 2006.229.02:03:27.10#ibcon#about to read 4, iclass 24, count 2 2006.229.02:03:27.10#ibcon#read 4, iclass 24, count 2 2006.229.02:03:27.10#ibcon#about to read 5, iclass 24, count 2 2006.229.02:03:27.10#ibcon#read 5, iclass 24, count 2 2006.229.02:03:27.10#ibcon#about to read 6, iclass 24, count 2 2006.229.02:03:27.10#ibcon#read 6, iclass 24, count 2 2006.229.02:03:27.11#ibcon#end of sib2, iclass 24, count 2 2006.229.02:03:27.11#ibcon#*after write, iclass 24, count 2 2006.229.02:03:27.11#ibcon#*before return 0, iclass 24, count 2 2006.229.02:03:27.11#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:27.11#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:27.11#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.02:03:27.11#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:27.11#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:27.22#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:27.22#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:27.22#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:03:27.22#ibcon#first serial, iclass 24, count 0 2006.229.02:03:27.22#ibcon#enter sib2, iclass 24, count 0 2006.229.02:03:27.22#ibcon#flushed, iclass 24, count 0 2006.229.02:03:27.22#ibcon#about to write, iclass 24, count 0 2006.229.02:03:27.22#ibcon#wrote, iclass 24, count 0 2006.229.02:03:27.23#ibcon#about to read 3, iclass 24, count 0 2006.229.02:03:27.24#ibcon#read 3, iclass 24, count 0 2006.229.02:03:27.24#ibcon#about to read 4, iclass 24, count 0 2006.229.02:03:27.24#ibcon#read 4, iclass 24, count 0 2006.229.02:03:27.24#ibcon#about to read 5, iclass 24, count 0 2006.229.02:03:27.24#ibcon#read 5, iclass 24, count 0 2006.229.02:03:27.24#ibcon#about to read 6, iclass 24, count 0 2006.229.02:03:27.24#ibcon#read 6, iclass 24, count 0 2006.229.02:03:27.24#ibcon#end of sib2, iclass 24, count 0 2006.229.02:03:27.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:03:27.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:03:27.25#ibcon#[25=USB\r\n] 2006.229.02:03:27.25#ibcon#*before write, iclass 24, count 0 2006.229.02:03:27.25#ibcon#enter sib2, iclass 24, count 0 2006.229.02:03:27.25#ibcon#flushed, iclass 24, count 0 2006.229.02:03:27.25#ibcon#about to write, iclass 24, count 0 2006.229.02:03:27.25#ibcon#wrote, iclass 24, count 0 2006.229.02:03:27.25#ibcon#about to read 3, iclass 24, count 0 2006.229.02:03:27.27#ibcon#read 3, iclass 24, count 0 2006.229.02:03:27.27#ibcon#about to read 4, iclass 24, count 0 2006.229.02:03:27.27#ibcon#read 4, iclass 24, count 0 2006.229.02:03:27.27#ibcon#about to read 5, iclass 24, count 0 2006.229.02:03:27.27#ibcon#read 5, iclass 24, count 0 2006.229.02:03:27.27#ibcon#about to read 6, iclass 24, count 0 2006.229.02:03:27.27#ibcon#read 6, iclass 24, count 0 2006.229.02:03:27.27#ibcon#end of sib2, iclass 24, count 0 2006.229.02:03:27.28#ibcon#*after write, iclass 24, count 0 2006.229.02:03:27.28#ibcon#*before return 0, iclass 24, count 0 2006.229.02:03:27.28#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:27.28#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:27.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:03:27.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:03:27.28$vck44/valo=6,814.99 2006.229.02:03:27.28#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:03:27.28#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:03:27.28#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:27.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:27.28#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:27.28#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:27.28#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:03:27.28#ibcon#first serial, iclass 26, count 0 2006.229.02:03:27.28#ibcon#enter sib2, iclass 26, count 0 2006.229.02:03:27.28#ibcon#flushed, iclass 26, count 0 2006.229.02:03:27.28#ibcon#about to write, iclass 26, count 0 2006.229.02:03:27.28#ibcon#wrote, iclass 26, count 0 2006.229.02:03:27.28#ibcon#about to read 3, iclass 26, count 0 2006.229.02:03:27.29#ibcon#read 3, iclass 26, count 0 2006.229.02:03:27.29#ibcon#about to read 4, iclass 26, count 0 2006.229.02:03:27.29#ibcon#read 4, iclass 26, count 0 2006.229.02:03:27.30#ibcon#about to read 5, iclass 26, count 0 2006.229.02:03:27.30#ibcon#read 5, iclass 26, count 0 2006.229.02:03:27.30#ibcon#about to read 6, iclass 26, count 0 2006.229.02:03:27.30#ibcon#read 6, iclass 26, count 0 2006.229.02:03:27.30#ibcon#end of sib2, iclass 26, count 0 2006.229.02:03:27.30#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:03:27.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:03:27.30#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:03:27.30#ibcon#*before write, iclass 26, count 0 2006.229.02:03:27.30#ibcon#enter sib2, iclass 26, count 0 2006.229.02:03:27.30#ibcon#flushed, iclass 26, count 0 2006.229.02:03:27.30#ibcon#about to write, iclass 26, count 0 2006.229.02:03:27.30#ibcon#wrote, iclass 26, count 0 2006.229.02:03:27.30#ibcon#about to read 3, iclass 26, count 0 2006.229.02:03:27.33#ibcon#read 3, iclass 26, count 0 2006.229.02:03:27.33#ibcon#about to read 4, iclass 26, count 0 2006.229.02:03:27.33#ibcon#read 4, iclass 26, count 0 2006.229.02:03:27.33#ibcon#about to read 5, iclass 26, count 0 2006.229.02:03:27.33#ibcon#read 5, iclass 26, count 0 2006.229.02:03:27.33#ibcon#about to read 6, iclass 26, count 0 2006.229.02:03:27.33#ibcon#read 6, iclass 26, count 0 2006.229.02:03:27.33#ibcon#end of sib2, iclass 26, count 0 2006.229.02:03:27.34#ibcon#*after write, iclass 26, count 0 2006.229.02:03:27.34#ibcon#*before return 0, iclass 26, count 0 2006.229.02:03:27.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:27.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:27.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:03:27.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:03:27.34$vck44/va=6,4 2006.229.02:03:27.34#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:03:27.34#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:03:27.34#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:27.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:27.39#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:27.39#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:27.39#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:03:27.39#ibcon#first serial, iclass 28, count 2 2006.229.02:03:27.39#ibcon#enter sib2, iclass 28, count 2 2006.229.02:03:27.39#ibcon#flushed, iclass 28, count 2 2006.229.02:03:27.39#ibcon#about to write, iclass 28, count 2 2006.229.02:03:27.39#ibcon#wrote, iclass 28, count 2 2006.229.02:03:27.39#ibcon#about to read 3, iclass 28, count 2 2006.229.02:03:27.41#ibcon#read 3, iclass 28, count 2 2006.229.02:03:27.41#ibcon#about to read 4, iclass 28, count 2 2006.229.02:03:27.41#ibcon#read 4, iclass 28, count 2 2006.229.02:03:27.41#ibcon#about to read 5, iclass 28, count 2 2006.229.02:03:27.42#ibcon#read 5, iclass 28, count 2 2006.229.02:03:27.42#ibcon#about to read 6, iclass 28, count 2 2006.229.02:03:27.42#ibcon#read 6, iclass 28, count 2 2006.229.02:03:27.42#ibcon#end of sib2, iclass 28, count 2 2006.229.02:03:27.42#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:03:27.42#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:03:27.42#ibcon#[25=AT06-04\r\n] 2006.229.02:03:27.42#ibcon#*before write, iclass 28, count 2 2006.229.02:03:27.42#ibcon#enter sib2, iclass 28, count 2 2006.229.02:03:27.42#ibcon#flushed, iclass 28, count 2 2006.229.02:03:27.42#ibcon#about to write, iclass 28, count 2 2006.229.02:03:27.42#ibcon#wrote, iclass 28, count 2 2006.229.02:03:27.42#ibcon#about to read 3, iclass 28, count 2 2006.229.02:03:27.44#ibcon#read 3, iclass 28, count 2 2006.229.02:03:27.44#ibcon#about to read 4, iclass 28, count 2 2006.229.02:03:27.44#ibcon#read 4, iclass 28, count 2 2006.229.02:03:27.44#ibcon#about to read 5, iclass 28, count 2 2006.229.02:03:27.44#ibcon#read 5, iclass 28, count 2 2006.229.02:03:27.44#ibcon#about to read 6, iclass 28, count 2 2006.229.02:03:27.44#ibcon#read 6, iclass 28, count 2 2006.229.02:03:27.44#ibcon#end of sib2, iclass 28, count 2 2006.229.02:03:27.45#ibcon#*after write, iclass 28, count 2 2006.229.02:03:27.45#ibcon#*before return 0, iclass 28, count 2 2006.229.02:03:27.45#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:27.45#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:27.45#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:03:27.45#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:27.45#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:27.56#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:27.56#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:27.56#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:03:27.56#ibcon#first serial, iclass 28, count 0 2006.229.02:03:27.56#ibcon#enter sib2, iclass 28, count 0 2006.229.02:03:27.56#ibcon#flushed, iclass 28, count 0 2006.229.02:03:27.56#ibcon#about to write, iclass 28, count 0 2006.229.02:03:27.56#ibcon#wrote, iclass 28, count 0 2006.229.02:03:27.57#ibcon#about to read 3, iclass 28, count 0 2006.229.02:03:27.58#ibcon#read 3, iclass 28, count 0 2006.229.02:03:27.58#ibcon#about to read 4, iclass 28, count 0 2006.229.02:03:27.58#ibcon#read 4, iclass 28, count 0 2006.229.02:03:27.58#ibcon#about to read 5, iclass 28, count 0 2006.229.02:03:27.58#ibcon#read 5, iclass 28, count 0 2006.229.02:03:27.58#ibcon#about to read 6, iclass 28, count 0 2006.229.02:03:27.58#ibcon#read 6, iclass 28, count 0 2006.229.02:03:27.58#ibcon#end of sib2, iclass 28, count 0 2006.229.02:03:27.59#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:03:27.59#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:03:27.59#ibcon#[25=USB\r\n] 2006.229.02:03:27.59#ibcon#*before write, iclass 28, count 0 2006.229.02:03:27.59#ibcon#enter sib2, iclass 28, count 0 2006.229.02:03:27.59#ibcon#flushed, iclass 28, count 0 2006.229.02:03:27.59#ibcon#about to write, iclass 28, count 0 2006.229.02:03:27.59#ibcon#wrote, iclass 28, count 0 2006.229.02:03:27.59#ibcon#about to read 3, iclass 28, count 0 2006.229.02:03:27.61#ibcon#read 3, iclass 28, count 0 2006.229.02:03:27.61#ibcon#about to read 4, iclass 28, count 0 2006.229.02:03:27.61#ibcon#read 4, iclass 28, count 0 2006.229.02:03:27.61#ibcon#about to read 5, iclass 28, count 0 2006.229.02:03:27.61#ibcon#read 5, iclass 28, count 0 2006.229.02:03:27.61#ibcon#about to read 6, iclass 28, count 0 2006.229.02:03:27.61#ibcon#read 6, iclass 28, count 0 2006.229.02:03:27.61#ibcon#end of sib2, iclass 28, count 0 2006.229.02:03:27.62#ibcon#*after write, iclass 28, count 0 2006.229.02:03:27.62#ibcon#*before return 0, iclass 28, count 0 2006.229.02:03:27.62#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:27.62#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:27.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:03:27.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:03:27.62$vck44/valo=7,864.99 2006.229.02:03:27.62#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:03:27.62#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:03:27.62#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:27.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:27.62#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:27.62#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:27.62#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:03:27.62#ibcon#first serial, iclass 30, count 0 2006.229.02:03:27.62#ibcon#enter sib2, iclass 30, count 0 2006.229.02:03:27.62#ibcon#flushed, iclass 30, count 0 2006.229.02:03:27.62#ibcon#about to write, iclass 30, count 0 2006.229.02:03:27.62#ibcon#wrote, iclass 30, count 0 2006.229.02:03:27.62#ibcon#about to read 3, iclass 30, count 0 2006.229.02:03:27.63#ibcon#read 3, iclass 30, count 0 2006.229.02:03:27.63#ibcon#about to read 4, iclass 30, count 0 2006.229.02:03:27.63#ibcon#read 4, iclass 30, count 0 2006.229.02:03:27.63#ibcon#about to read 5, iclass 30, count 0 2006.229.02:03:27.64#ibcon#read 5, iclass 30, count 0 2006.229.02:03:27.64#ibcon#about to read 6, iclass 30, count 0 2006.229.02:03:27.64#ibcon#read 6, iclass 30, count 0 2006.229.02:03:27.64#ibcon#end of sib2, iclass 30, count 0 2006.229.02:03:27.64#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:03:27.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:03:27.64#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:03:27.64#ibcon#*before write, iclass 30, count 0 2006.229.02:03:27.64#ibcon#enter sib2, iclass 30, count 0 2006.229.02:03:27.64#ibcon#flushed, iclass 30, count 0 2006.229.02:03:27.64#ibcon#about to write, iclass 30, count 0 2006.229.02:03:27.64#ibcon#wrote, iclass 30, count 0 2006.229.02:03:27.64#ibcon#about to read 3, iclass 30, count 0 2006.229.02:03:27.67#ibcon#read 3, iclass 30, count 0 2006.229.02:03:27.67#ibcon#about to read 4, iclass 30, count 0 2006.229.02:03:27.67#ibcon#read 4, iclass 30, count 0 2006.229.02:03:27.67#ibcon#about to read 5, iclass 30, count 0 2006.229.02:03:27.67#ibcon#read 5, iclass 30, count 0 2006.229.02:03:27.67#ibcon#about to read 6, iclass 30, count 0 2006.229.02:03:27.67#ibcon#read 6, iclass 30, count 0 2006.229.02:03:27.67#ibcon#end of sib2, iclass 30, count 0 2006.229.02:03:27.68#ibcon#*after write, iclass 30, count 0 2006.229.02:03:27.68#ibcon#*before return 0, iclass 30, count 0 2006.229.02:03:27.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:27.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:27.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:03:27.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:03:27.68$vck44/va=7,5 2006.229.02:03:27.68#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:03:27.68#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:03:27.68#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:27.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:27.73#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:27.73#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:27.73#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:03:27.73#ibcon#first serial, iclass 32, count 2 2006.229.02:03:27.73#ibcon#enter sib2, iclass 32, count 2 2006.229.02:03:27.73#ibcon#flushed, iclass 32, count 2 2006.229.02:03:27.73#ibcon#about to write, iclass 32, count 2 2006.229.02:03:27.73#ibcon#wrote, iclass 32, count 2 2006.229.02:03:27.73#ibcon#about to read 3, iclass 32, count 2 2006.229.02:03:27.75#ibcon#read 3, iclass 32, count 2 2006.229.02:03:27.75#ibcon#about to read 4, iclass 32, count 2 2006.229.02:03:27.75#ibcon#read 4, iclass 32, count 2 2006.229.02:03:27.75#ibcon#about to read 5, iclass 32, count 2 2006.229.02:03:27.75#ibcon#read 5, iclass 32, count 2 2006.229.02:03:27.75#ibcon#about to read 6, iclass 32, count 2 2006.229.02:03:27.76#ibcon#read 6, iclass 32, count 2 2006.229.02:03:27.76#ibcon#end of sib2, iclass 32, count 2 2006.229.02:03:27.76#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:03:27.76#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:03:27.76#ibcon#[25=AT07-05\r\n] 2006.229.02:03:27.76#ibcon#*before write, iclass 32, count 2 2006.229.02:03:27.76#ibcon#enter sib2, iclass 32, count 2 2006.229.02:03:27.76#ibcon#flushed, iclass 32, count 2 2006.229.02:03:27.76#ibcon#about to write, iclass 32, count 2 2006.229.02:03:27.76#ibcon#wrote, iclass 32, count 2 2006.229.02:03:27.76#ibcon#about to read 3, iclass 32, count 2 2006.229.02:03:27.78#ibcon#read 3, iclass 32, count 2 2006.229.02:03:27.78#ibcon#about to read 4, iclass 32, count 2 2006.229.02:03:27.78#ibcon#read 4, iclass 32, count 2 2006.229.02:03:27.78#ibcon#about to read 5, iclass 32, count 2 2006.229.02:03:27.78#ibcon#read 5, iclass 32, count 2 2006.229.02:03:27.78#ibcon#about to read 6, iclass 32, count 2 2006.229.02:03:27.78#ibcon#read 6, iclass 32, count 2 2006.229.02:03:27.78#ibcon#end of sib2, iclass 32, count 2 2006.229.02:03:27.79#ibcon#*after write, iclass 32, count 2 2006.229.02:03:27.79#ibcon#*before return 0, iclass 32, count 2 2006.229.02:03:27.79#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:27.79#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:27.79#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:03:27.79#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:27.79#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:27.90#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:27.90#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:27.90#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:03:27.90#ibcon#first serial, iclass 32, count 0 2006.229.02:03:27.90#ibcon#enter sib2, iclass 32, count 0 2006.229.02:03:27.90#ibcon#flushed, iclass 32, count 0 2006.229.02:03:27.90#ibcon#about to write, iclass 32, count 0 2006.229.02:03:27.90#ibcon#wrote, iclass 32, count 0 2006.229.02:03:27.90#ibcon#about to read 3, iclass 32, count 0 2006.229.02:03:27.92#ibcon#read 3, iclass 32, count 0 2006.229.02:03:27.92#ibcon#about to read 4, iclass 32, count 0 2006.229.02:03:27.92#ibcon#read 4, iclass 32, count 0 2006.229.02:03:27.92#ibcon#about to read 5, iclass 32, count 0 2006.229.02:03:27.92#ibcon#read 5, iclass 32, count 0 2006.229.02:03:27.92#ibcon#about to read 6, iclass 32, count 0 2006.229.02:03:27.92#ibcon#read 6, iclass 32, count 0 2006.229.02:03:27.92#ibcon#end of sib2, iclass 32, count 0 2006.229.02:03:27.92#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:03:27.93#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:03:27.93#ibcon#[25=USB\r\n] 2006.229.02:03:27.93#ibcon#*before write, iclass 32, count 0 2006.229.02:03:27.93#ibcon#enter sib2, iclass 32, count 0 2006.229.02:03:27.93#ibcon#flushed, iclass 32, count 0 2006.229.02:03:27.93#ibcon#about to write, iclass 32, count 0 2006.229.02:03:27.93#ibcon#wrote, iclass 32, count 0 2006.229.02:03:27.93#ibcon#about to read 3, iclass 32, count 0 2006.229.02:03:27.95#ibcon#read 3, iclass 32, count 0 2006.229.02:03:27.95#ibcon#about to read 4, iclass 32, count 0 2006.229.02:03:27.95#ibcon#read 4, iclass 32, count 0 2006.229.02:03:27.95#ibcon#about to read 5, iclass 32, count 0 2006.229.02:03:27.95#ibcon#read 5, iclass 32, count 0 2006.229.02:03:27.95#ibcon#about to read 6, iclass 32, count 0 2006.229.02:03:27.95#ibcon#read 6, iclass 32, count 0 2006.229.02:03:27.95#ibcon#end of sib2, iclass 32, count 0 2006.229.02:03:27.96#ibcon#*after write, iclass 32, count 0 2006.229.02:03:27.96#ibcon#*before return 0, iclass 32, count 0 2006.229.02:03:27.96#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:27.96#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:27.96#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:03:27.96#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:03:27.96$vck44/valo=8,884.99 2006.229.02:03:27.96#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:03:27.96#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:03:27.96#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:27.96#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:27.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:27.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:27.96#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:03:27.96#ibcon#first serial, iclass 34, count 0 2006.229.02:03:27.96#ibcon#enter sib2, iclass 34, count 0 2006.229.02:03:27.96#ibcon#flushed, iclass 34, count 0 2006.229.02:03:27.96#ibcon#about to write, iclass 34, count 0 2006.229.02:03:27.96#ibcon#wrote, iclass 34, count 0 2006.229.02:03:27.96#ibcon#about to read 3, iclass 34, count 0 2006.229.02:03:27.97#ibcon#read 3, iclass 34, count 0 2006.229.02:03:27.97#ibcon#about to read 4, iclass 34, count 0 2006.229.02:03:27.97#ibcon#read 4, iclass 34, count 0 2006.229.02:03:27.98#ibcon#about to read 5, iclass 34, count 0 2006.229.02:03:27.98#ibcon#read 5, iclass 34, count 0 2006.229.02:03:27.98#ibcon#about to read 6, iclass 34, count 0 2006.229.02:03:27.98#ibcon#read 6, iclass 34, count 0 2006.229.02:03:27.98#ibcon#end of sib2, iclass 34, count 0 2006.229.02:03:27.98#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:03:27.98#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:03:27.98#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:03:27.98#ibcon#*before write, iclass 34, count 0 2006.229.02:03:27.98#ibcon#enter sib2, iclass 34, count 0 2006.229.02:03:27.98#ibcon#flushed, iclass 34, count 0 2006.229.02:03:27.98#ibcon#about to write, iclass 34, count 0 2006.229.02:03:27.98#ibcon#wrote, iclass 34, count 0 2006.229.02:03:27.98#ibcon#about to read 3, iclass 34, count 0 2006.229.02:03:28.01#ibcon#read 3, iclass 34, count 0 2006.229.02:03:28.01#ibcon#about to read 4, iclass 34, count 0 2006.229.02:03:28.01#ibcon#read 4, iclass 34, count 0 2006.229.02:03:28.01#ibcon#about to read 5, iclass 34, count 0 2006.229.02:03:28.01#ibcon#read 5, iclass 34, count 0 2006.229.02:03:28.01#ibcon#about to read 6, iclass 34, count 0 2006.229.02:03:28.01#ibcon#read 6, iclass 34, count 0 2006.229.02:03:28.02#ibcon#end of sib2, iclass 34, count 0 2006.229.02:03:28.02#ibcon#*after write, iclass 34, count 0 2006.229.02:03:28.02#ibcon#*before return 0, iclass 34, count 0 2006.229.02:03:28.02#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:28.02#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:28.02#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:03:28.02#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:03:28.02$vck44/va=8,6 2006.229.02:03:28.02#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.02:03:28.02#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.02:03:28.02#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:28.02#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:03:28.07#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:03:28.07#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:03:28.07#ibcon#enter wrdev, iclass 36, count 2 2006.229.02:03:28.07#ibcon#first serial, iclass 36, count 2 2006.229.02:03:28.07#ibcon#enter sib2, iclass 36, count 2 2006.229.02:03:28.07#ibcon#flushed, iclass 36, count 2 2006.229.02:03:28.07#ibcon#about to write, iclass 36, count 2 2006.229.02:03:28.08#ibcon#wrote, iclass 36, count 2 2006.229.02:03:28.08#ibcon#about to read 3, iclass 36, count 2 2006.229.02:03:28.09#ibcon#read 3, iclass 36, count 2 2006.229.02:03:28.09#ibcon#about to read 4, iclass 36, count 2 2006.229.02:03:28.09#ibcon#read 4, iclass 36, count 2 2006.229.02:03:28.09#ibcon#about to read 5, iclass 36, count 2 2006.229.02:03:28.09#ibcon#read 5, iclass 36, count 2 2006.229.02:03:28.09#ibcon#about to read 6, iclass 36, count 2 2006.229.02:03:28.09#ibcon#read 6, iclass 36, count 2 2006.229.02:03:28.09#ibcon#end of sib2, iclass 36, count 2 2006.229.02:03:28.09#ibcon#*mode == 0, iclass 36, count 2 2006.229.02:03:28.10#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.02:03:28.10#ibcon#[25=AT08-06\r\n] 2006.229.02:03:28.10#ibcon#*before write, iclass 36, count 2 2006.229.02:03:28.10#ibcon#enter sib2, iclass 36, count 2 2006.229.02:03:28.10#ibcon#flushed, iclass 36, count 2 2006.229.02:03:28.10#ibcon#about to write, iclass 36, count 2 2006.229.02:03:28.10#ibcon#wrote, iclass 36, count 2 2006.229.02:03:28.10#ibcon#about to read 3, iclass 36, count 2 2006.229.02:03:28.12#ibcon#read 3, iclass 36, count 2 2006.229.02:03:28.12#ibcon#about to read 4, iclass 36, count 2 2006.229.02:03:28.12#ibcon#read 4, iclass 36, count 2 2006.229.02:03:28.12#ibcon#about to read 5, iclass 36, count 2 2006.229.02:03:28.12#ibcon#read 5, iclass 36, count 2 2006.229.02:03:28.12#ibcon#about to read 6, iclass 36, count 2 2006.229.02:03:28.12#ibcon#read 6, iclass 36, count 2 2006.229.02:03:28.12#ibcon#end of sib2, iclass 36, count 2 2006.229.02:03:28.12#ibcon#*after write, iclass 36, count 2 2006.229.02:03:28.13#ibcon#*before return 0, iclass 36, count 2 2006.229.02:03:28.13#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:03:28.13#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:03:28.13#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.02:03:28.13#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:28.13#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:03:28.24#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:03:28.24#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:03:28.24#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:03:28.24#ibcon#first serial, iclass 36, count 0 2006.229.02:03:28.24#ibcon#enter sib2, iclass 36, count 0 2006.229.02:03:28.24#ibcon#flushed, iclass 36, count 0 2006.229.02:03:28.24#ibcon#about to write, iclass 36, count 0 2006.229.02:03:28.24#ibcon#wrote, iclass 36, count 0 2006.229.02:03:28.25#ibcon#about to read 3, iclass 36, count 0 2006.229.02:03:28.26#ibcon#read 3, iclass 36, count 0 2006.229.02:03:28.26#ibcon#about to read 4, iclass 36, count 0 2006.229.02:03:28.26#ibcon#read 4, iclass 36, count 0 2006.229.02:03:28.26#ibcon#about to read 5, iclass 36, count 0 2006.229.02:03:28.26#ibcon#read 5, iclass 36, count 0 2006.229.02:03:28.26#ibcon#about to read 6, iclass 36, count 0 2006.229.02:03:28.26#ibcon#read 6, iclass 36, count 0 2006.229.02:03:28.26#ibcon#end of sib2, iclass 36, count 0 2006.229.02:03:28.27#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:03:28.27#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:03:28.27#ibcon#[25=USB\r\n] 2006.229.02:03:28.27#ibcon#*before write, iclass 36, count 0 2006.229.02:03:28.27#ibcon#enter sib2, iclass 36, count 0 2006.229.02:03:28.27#ibcon#flushed, iclass 36, count 0 2006.229.02:03:28.27#ibcon#about to write, iclass 36, count 0 2006.229.02:03:28.27#ibcon#wrote, iclass 36, count 0 2006.229.02:03:28.27#ibcon#about to read 3, iclass 36, count 0 2006.229.02:03:28.29#ibcon#read 3, iclass 36, count 0 2006.229.02:03:28.29#ibcon#about to read 4, iclass 36, count 0 2006.229.02:03:28.29#ibcon#read 4, iclass 36, count 0 2006.229.02:03:28.29#ibcon#about to read 5, iclass 36, count 0 2006.229.02:03:28.29#ibcon#read 5, iclass 36, count 0 2006.229.02:03:28.29#ibcon#about to read 6, iclass 36, count 0 2006.229.02:03:28.29#ibcon#read 6, iclass 36, count 0 2006.229.02:03:28.29#ibcon#end of sib2, iclass 36, count 0 2006.229.02:03:28.30#ibcon#*after write, iclass 36, count 0 2006.229.02:03:28.30#ibcon#*before return 0, iclass 36, count 0 2006.229.02:03:28.30#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:03:28.30#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:03:28.30#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:03:28.30#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:03:28.30$vck44/vblo=1,629.99 2006.229.02:03:28.30#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:03:28.30#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:03:28.30#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:28.30#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:03:28.30#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:03:28.30#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:03:28.30#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:03:28.30#ibcon#first serial, iclass 38, count 0 2006.229.02:03:28.30#ibcon#enter sib2, iclass 38, count 0 2006.229.02:03:28.30#ibcon#flushed, iclass 38, count 0 2006.229.02:03:28.30#ibcon#about to write, iclass 38, count 0 2006.229.02:03:28.30#ibcon#wrote, iclass 38, count 0 2006.229.02:03:28.30#ibcon#about to read 3, iclass 38, count 0 2006.229.02:03:28.31#ibcon#read 3, iclass 38, count 0 2006.229.02:03:28.31#ibcon#about to read 4, iclass 38, count 0 2006.229.02:03:28.31#ibcon#read 4, iclass 38, count 0 2006.229.02:03:28.31#ibcon#about to read 5, iclass 38, count 0 2006.229.02:03:28.31#ibcon#read 5, iclass 38, count 0 2006.229.02:03:28.32#ibcon#about to read 6, iclass 38, count 0 2006.229.02:03:28.32#ibcon#read 6, iclass 38, count 0 2006.229.02:03:28.32#ibcon#end of sib2, iclass 38, count 0 2006.229.02:03:28.32#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:03:28.32#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:03:28.32#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:03:28.32#ibcon#*before write, iclass 38, count 0 2006.229.02:03:28.32#ibcon#enter sib2, iclass 38, count 0 2006.229.02:03:28.32#ibcon#flushed, iclass 38, count 0 2006.229.02:03:28.32#ibcon#about to write, iclass 38, count 0 2006.229.02:03:28.32#ibcon#wrote, iclass 38, count 0 2006.229.02:03:28.32#ibcon#about to read 3, iclass 38, count 0 2006.229.02:03:28.35#ibcon#read 3, iclass 38, count 0 2006.229.02:03:28.35#ibcon#about to read 4, iclass 38, count 0 2006.229.02:03:28.35#ibcon#read 4, iclass 38, count 0 2006.229.02:03:28.35#ibcon#about to read 5, iclass 38, count 0 2006.229.02:03:28.35#ibcon#read 5, iclass 38, count 0 2006.229.02:03:28.35#ibcon#about to read 6, iclass 38, count 0 2006.229.02:03:28.35#ibcon#read 6, iclass 38, count 0 2006.229.02:03:28.35#ibcon#end of sib2, iclass 38, count 0 2006.229.02:03:28.35#ibcon#*after write, iclass 38, count 0 2006.229.02:03:28.35#ibcon#*before return 0, iclass 38, count 0 2006.229.02:03:28.36#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:03:28.36#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:03:28.36#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:03:28.36#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:03:28.36$vck44/vb=1,4 2006.229.02:03:28.36#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.02:03:28.36#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.02:03:28.36#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:28.36#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:03:28.36#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:03:28.36#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:03:28.36#ibcon#enter wrdev, iclass 40, count 2 2006.229.02:03:28.36#ibcon#first serial, iclass 40, count 2 2006.229.02:03:28.36#ibcon#enter sib2, iclass 40, count 2 2006.229.02:03:28.36#ibcon#flushed, iclass 40, count 2 2006.229.02:03:28.36#ibcon#about to write, iclass 40, count 2 2006.229.02:03:28.36#ibcon#wrote, iclass 40, count 2 2006.229.02:03:28.36#ibcon#about to read 3, iclass 40, count 2 2006.229.02:03:28.37#ibcon#read 3, iclass 40, count 2 2006.229.02:03:28.37#ibcon#about to read 4, iclass 40, count 2 2006.229.02:03:28.37#ibcon#read 4, iclass 40, count 2 2006.229.02:03:28.37#ibcon#about to read 5, iclass 40, count 2 2006.229.02:03:28.37#ibcon#read 5, iclass 40, count 2 2006.229.02:03:28.37#ibcon#about to read 6, iclass 40, count 2 2006.229.02:03:28.38#ibcon#read 6, iclass 40, count 2 2006.229.02:03:28.38#ibcon#end of sib2, iclass 40, count 2 2006.229.02:03:28.38#ibcon#*mode == 0, iclass 40, count 2 2006.229.02:03:28.38#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.02:03:28.38#ibcon#[27=AT01-04\r\n] 2006.229.02:03:28.38#ibcon#*before write, iclass 40, count 2 2006.229.02:03:28.38#ibcon#enter sib2, iclass 40, count 2 2006.229.02:03:28.38#ibcon#flushed, iclass 40, count 2 2006.229.02:03:28.38#ibcon#about to write, iclass 40, count 2 2006.229.02:03:28.38#ibcon#wrote, iclass 40, count 2 2006.229.02:03:28.38#ibcon#about to read 3, iclass 40, count 2 2006.229.02:03:28.40#ibcon#read 3, iclass 40, count 2 2006.229.02:03:28.40#ibcon#about to read 4, iclass 40, count 2 2006.229.02:03:28.40#ibcon#read 4, iclass 40, count 2 2006.229.02:03:28.40#ibcon#about to read 5, iclass 40, count 2 2006.229.02:03:28.40#ibcon#read 5, iclass 40, count 2 2006.229.02:03:28.40#ibcon#about to read 6, iclass 40, count 2 2006.229.02:03:28.40#ibcon#read 6, iclass 40, count 2 2006.229.02:03:28.40#ibcon#end of sib2, iclass 40, count 2 2006.229.02:03:28.41#ibcon#*after write, iclass 40, count 2 2006.229.02:03:28.41#ibcon#*before return 0, iclass 40, count 2 2006.229.02:03:28.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:03:28.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:03:28.41#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.02:03:28.41#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:28.41#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:03:28.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:03:28.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:03:28.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:03:28.52#ibcon#first serial, iclass 40, count 0 2006.229.02:03:28.52#ibcon#enter sib2, iclass 40, count 0 2006.229.02:03:28.52#ibcon#flushed, iclass 40, count 0 2006.229.02:03:28.52#ibcon#about to write, iclass 40, count 0 2006.229.02:03:28.52#ibcon#wrote, iclass 40, count 0 2006.229.02:03:28.52#ibcon#about to read 3, iclass 40, count 0 2006.229.02:03:28.54#ibcon#read 3, iclass 40, count 0 2006.229.02:03:28.54#ibcon#about to read 4, iclass 40, count 0 2006.229.02:03:28.54#ibcon#read 4, iclass 40, count 0 2006.229.02:03:28.54#ibcon#about to read 5, iclass 40, count 0 2006.229.02:03:28.54#ibcon#read 5, iclass 40, count 0 2006.229.02:03:28.54#ibcon#about to read 6, iclass 40, count 0 2006.229.02:03:28.54#ibcon#read 6, iclass 40, count 0 2006.229.02:03:28.54#ibcon#end of sib2, iclass 40, count 0 2006.229.02:03:28.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:03:28.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:03:28.55#ibcon#[27=USB\r\n] 2006.229.02:03:28.55#ibcon#*before write, iclass 40, count 0 2006.229.02:03:28.55#ibcon#enter sib2, iclass 40, count 0 2006.229.02:03:28.55#ibcon#flushed, iclass 40, count 0 2006.229.02:03:28.55#ibcon#about to write, iclass 40, count 0 2006.229.02:03:28.55#ibcon#wrote, iclass 40, count 0 2006.229.02:03:28.55#ibcon#about to read 3, iclass 40, count 0 2006.229.02:03:28.57#ibcon#read 3, iclass 40, count 0 2006.229.02:03:28.57#ibcon#about to read 4, iclass 40, count 0 2006.229.02:03:28.57#ibcon#read 4, iclass 40, count 0 2006.229.02:03:28.57#ibcon#about to read 5, iclass 40, count 0 2006.229.02:03:28.57#ibcon#read 5, iclass 40, count 0 2006.229.02:03:28.58#ibcon#about to read 6, iclass 40, count 0 2006.229.02:03:28.58#ibcon#read 6, iclass 40, count 0 2006.229.02:03:28.58#ibcon#end of sib2, iclass 40, count 0 2006.229.02:03:28.58#ibcon#*after write, iclass 40, count 0 2006.229.02:03:28.58#ibcon#*before return 0, iclass 40, count 0 2006.229.02:03:28.58#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:03:28.58#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:03:28.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:03:28.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:03:28.58$vck44/vblo=2,634.99 2006.229.02:03:28.58#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:03:28.58#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:03:28.58#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:28.58#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:28.58#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:28.58#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:28.58#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:03:28.58#ibcon#first serial, iclass 4, count 0 2006.229.02:03:28.58#ibcon#enter sib2, iclass 4, count 0 2006.229.02:03:28.58#ibcon#flushed, iclass 4, count 0 2006.229.02:03:28.58#ibcon#about to write, iclass 4, count 0 2006.229.02:03:28.58#ibcon#wrote, iclass 4, count 0 2006.229.02:03:28.58#ibcon#about to read 3, iclass 4, count 0 2006.229.02:03:28.59#ibcon#read 3, iclass 4, count 0 2006.229.02:03:28.59#ibcon#about to read 4, iclass 4, count 0 2006.229.02:03:28.59#ibcon#read 4, iclass 4, count 0 2006.229.02:03:28.59#ibcon#about to read 5, iclass 4, count 0 2006.229.02:03:28.59#ibcon#read 5, iclass 4, count 0 2006.229.02:03:28.59#ibcon#about to read 6, iclass 4, count 0 2006.229.02:03:28.59#ibcon#read 6, iclass 4, count 0 2006.229.02:03:28.60#ibcon#end of sib2, iclass 4, count 0 2006.229.02:03:28.60#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:03:28.60#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:03:28.60#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:03:28.60#ibcon#*before write, iclass 4, count 0 2006.229.02:03:28.60#ibcon#enter sib2, iclass 4, count 0 2006.229.02:03:28.60#ibcon#flushed, iclass 4, count 0 2006.229.02:03:28.60#ibcon#about to write, iclass 4, count 0 2006.229.02:03:28.60#ibcon#wrote, iclass 4, count 0 2006.229.02:03:28.60#ibcon#about to read 3, iclass 4, count 0 2006.229.02:03:28.63#ibcon#read 3, iclass 4, count 0 2006.229.02:03:28.63#ibcon#about to read 4, iclass 4, count 0 2006.229.02:03:28.63#ibcon#read 4, iclass 4, count 0 2006.229.02:03:28.63#ibcon#about to read 5, iclass 4, count 0 2006.229.02:03:28.63#ibcon#read 5, iclass 4, count 0 2006.229.02:03:28.63#ibcon#about to read 6, iclass 4, count 0 2006.229.02:03:28.63#ibcon#read 6, iclass 4, count 0 2006.229.02:03:28.63#ibcon#end of sib2, iclass 4, count 0 2006.229.02:03:28.63#ibcon#*after write, iclass 4, count 0 2006.229.02:03:28.64#ibcon#*before return 0, iclass 4, count 0 2006.229.02:03:28.64#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:28.64#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:03:28.64#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:03:28.64#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:03:28.64$vck44/vb=2,4 2006.229.02:03:28.64#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:03:28.64#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:03:28.64#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:28.64#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:28.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:28.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:28.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:03:28.69#ibcon#first serial, iclass 6, count 2 2006.229.02:03:28.69#ibcon#enter sib2, iclass 6, count 2 2006.229.02:03:28.69#ibcon#flushed, iclass 6, count 2 2006.229.02:03:28.69#ibcon#about to write, iclass 6, count 2 2006.229.02:03:28.69#ibcon#wrote, iclass 6, count 2 2006.229.02:03:28.70#ibcon#about to read 3, iclass 6, count 2 2006.229.02:03:28.71#ibcon#read 3, iclass 6, count 2 2006.229.02:03:28.71#ibcon#about to read 4, iclass 6, count 2 2006.229.02:03:28.71#ibcon#read 4, iclass 6, count 2 2006.229.02:03:28.71#ibcon#about to read 5, iclass 6, count 2 2006.229.02:03:28.71#ibcon#read 5, iclass 6, count 2 2006.229.02:03:28.71#ibcon#about to read 6, iclass 6, count 2 2006.229.02:03:28.71#ibcon#read 6, iclass 6, count 2 2006.229.02:03:28.71#ibcon#end of sib2, iclass 6, count 2 2006.229.02:03:28.71#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:03:28.72#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:03:28.72#ibcon#[27=AT02-04\r\n] 2006.229.02:03:28.72#ibcon#*before write, iclass 6, count 2 2006.229.02:03:28.72#ibcon#enter sib2, iclass 6, count 2 2006.229.02:03:28.72#ibcon#flushed, iclass 6, count 2 2006.229.02:03:28.72#ibcon#about to write, iclass 6, count 2 2006.229.02:03:28.72#ibcon#wrote, iclass 6, count 2 2006.229.02:03:28.72#ibcon#about to read 3, iclass 6, count 2 2006.229.02:03:28.74#ibcon#read 3, iclass 6, count 2 2006.229.02:03:28.74#ibcon#about to read 4, iclass 6, count 2 2006.229.02:03:28.74#ibcon#read 4, iclass 6, count 2 2006.229.02:03:28.74#ibcon#about to read 5, iclass 6, count 2 2006.229.02:03:28.74#ibcon#read 5, iclass 6, count 2 2006.229.02:03:28.74#ibcon#about to read 6, iclass 6, count 2 2006.229.02:03:28.74#ibcon#read 6, iclass 6, count 2 2006.229.02:03:28.74#ibcon#end of sib2, iclass 6, count 2 2006.229.02:03:28.74#ibcon#*after write, iclass 6, count 2 2006.229.02:03:28.75#ibcon#*before return 0, iclass 6, count 2 2006.229.02:03:28.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:28.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:03:28.75#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:03:28.75#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:28.75#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:28.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:28.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:28.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:03:28.86#ibcon#first serial, iclass 6, count 0 2006.229.02:03:28.86#ibcon#enter sib2, iclass 6, count 0 2006.229.02:03:28.86#ibcon#flushed, iclass 6, count 0 2006.229.02:03:28.86#ibcon#about to write, iclass 6, count 0 2006.229.02:03:28.86#ibcon#wrote, iclass 6, count 0 2006.229.02:03:28.86#ibcon#about to read 3, iclass 6, count 0 2006.229.02:03:28.88#ibcon#read 3, iclass 6, count 0 2006.229.02:03:28.88#ibcon#about to read 4, iclass 6, count 0 2006.229.02:03:28.88#ibcon#read 4, iclass 6, count 0 2006.229.02:03:28.88#ibcon#about to read 5, iclass 6, count 0 2006.229.02:03:28.88#ibcon#read 5, iclass 6, count 0 2006.229.02:03:28.88#ibcon#about to read 6, iclass 6, count 0 2006.229.02:03:28.89#ibcon#read 6, iclass 6, count 0 2006.229.02:03:28.89#ibcon#end of sib2, iclass 6, count 0 2006.229.02:03:28.89#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:03:28.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:03:28.89#ibcon#[27=USB\r\n] 2006.229.02:03:28.89#ibcon#*before write, iclass 6, count 0 2006.229.02:03:28.89#ibcon#enter sib2, iclass 6, count 0 2006.229.02:03:28.89#ibcon#flushed, iclass 6, count 0 2006.229.02:03:28.89#ibcon#about to write, iclass 6, count 0 2006.229.02:03:28.89#ibcon#wrote, iclass 6, count 0 2006.229.02:03:28.89#ibcon#about to read 3, iclass 6, count 0 2006.229.02:03:28.91#ibcon#read 3, iclass 6, count 0 2006.229.02:03:28.91#ibcon#about to read 4, iclass 6, count 0 2006.229.02:03:28.91#ibcon#read 4, iclass 6, count 0 2006.229.02:03:28.91#ibcon#about to read 5, iclass 6, count 0 2006.229.02:03:28.91#ibcon#read 5, iclass 6, count 0 2006.229.02:03:28.91#ibcon#about to read 6, iclass 6, count 0 2006.229.02:03:28.91#ibcon#read 6, iclass 6, count 0 2006.229.02:03:28.91#ibcon#end of sib2, iclass 6, count 0 2006.229.02:03:28.92#ibcon#*after write, iclass 6, count 0 2006.229.02:03:28.92#ibcon#*before return 0, iclass 6, count 0 2006.229.02:03:28.92#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:28.92#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:03:28.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:03:28.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:03:28.92$vck44/vblo=3,649.99 2006.229.02:03:28.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:03:28.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:03:28.92#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:28.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:28.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:28.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:28.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:03:28.92#ibcon#first serial, iclass 10, count 0 2006.229.02:03:28.92#ibcon#enter sib2, iclass 10, count 0 2006.229.02:03:28.92#ibcon#flushed, iclass 10, count 0 2006.229.02:03:28.92#ibcon#about to write, iclass 10, count 0 2006.229.02:03:28.92#ibcon#wrote, iclass 10, count 0 2006.229.02:03:28.92#ibcon#about to read 3, iclass 10, count 0 2006.229.02:03:28.93#ibcon#read 3, iclass 10, count 0 2006.229.02:03:28.93#ibcon#about to read 4, iclass 10, count 0 2006.229.02:03:28.93#ibcon#read 4, iclass 10, count 0 2006.229.02:03:28.93#ibcon#about to read 5, iclass 10, count 0 2006.229.02:03:28.94#ibcon#read 5, iclass 10, count 0 2006.229.02:03:28.94#ibcon#about to read 6, iclass 10, count 0 2006.229.02:03:28.94#ibcon#read 6, iclass 10, count 0 2006.229.02:03:28.94#ibcon#end of sib2, iclass 10, count 0 2006.229.02:03:28.94#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:03:28.94#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:03:28.94#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:03:28.94#ibcon#*before write, iclass 10, count 0 2006.229.02:03:28.94#ibcon#enter sib2, iclass 10, count 0 2006.229.02:03:28.94#ibcon#flushed, iclass 10, count 0 2006.229.02:03:28.94#ibcon#about to write, iclass 10, count 0 2006.229.02:03:28.94#ibcon#wrote, iclass 10, count 0 2006.229.02:03:28.94#ibcon#about to read 3, iclass 10, count 0 2006.229.02:03:28.97#ibcon#read 3, iclass 10, count 0 2006.229.02:03:28.97#ibcon#about to read 4, iclass 10, count 0 2006.229.02:03:28.97#ibcon#read 4, iclass 10, count 0 2006.229.02:03:28.97#ibcon#about to read 5, iclass 10, count 0 2006.229.02:03:28.98#ibcon#read 5, iclass 10, count 0 2006.229.02:03:28.98#ibcon#about to read 6, iclass 10, count 0 2006.229.02:03:28.98#ibcon#read 6, iclass 10, count 0 2006.229.02:03:28.98#ibcon#end of sib2, iclass 10, count 0 2006.229.02:03:28.98#ibcon#*after write, iclass 10, count 0 2006.229.02:03:28.98#ibcon#*before return 0, iclass 10, count 0 2006.229.02:03:28.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:28.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:03:28.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:03:28.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:03:28.98$vck44/vb=3,4 2006.229.02:03:28.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:03:28.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:03:28.98#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:28.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:29.03#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:29.03#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:29.03#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:03:29.03#ibcon#first serial, iclass 12, count 2 2006.229.02:03:29.03#ibcon#enter sib2, iclass 12, count 2 2006.229.02:03:29.03#ibcon#flushed, iclass 12, count 2 2006.229.02:03:29.03#ibcon#about to write, iclass 12, count 2 2006.229.02:03:29.03#ibcon#wrote, iclass 12, count 2 2006.229.02:03:29.03#ibcon#about to read 3, iclass 12, count 2 2006.229.02:03:29.05#ibcon#read 3, iclass 12, count 2 2006.229.02:03:29.05#ibcon#about to read 4, iclass 12, count 2 2006.229.02:03:29.06#ibcon#read 4, iclass 12, count 2 2006.229.02:03:29.06#ibcon#about to read 5, iclass 12, count 2 2006.229.02:03:29.06#ibcon#read 5, iclass 12, count 2 2006.229.02:03:29.06#ibcon#about to read 6, iclass 12, count 2 2006.229.02:03:29.06#ibcon#read 6, iclass 12, count 2 2006.229.02:03:29.06#ibcon#end of sib2, iclass 12, count 2 2006.229.02:03:29.06#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:03:29.06#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:03:29.06#ibcon#[27=AT03-04\r\n] 2006.229.02:03:29.06#ibcon#*before write, iclass 12, count 2 2006.229.02:03:29.06#ibcon#enter sib2, iclass 12, count 2 2006.229.02:03:29.06#ibcon#flushed, iclass 12, count 2 2006.229.02:03:29.06#ibcon#about to write, iclass 12, count 2 2006.229.02:03:29.06#ibcon#wrote, iclass 12, count 2 2006.229.02:03:29.06#ibcon#about to read 3, iclass 12, count 2 2006.229.02:03:29.08#ibcon#read 3, iclass 12, count 2 2006.229.02:03:29.08#ibcon#about to read 4, iclass 12, count 2 2006.229.02:03:29.08#ibcon#read 4, iclass 12, count 2 2006.229.02:03:29.08#ibcon#about to read 5, iclass 12, count 2 2006.229.02:03:29.08#ibcon#read 5, iclass 12, count 2 2006.229.02:03:29.08#ibcon#about to read 6, iclass 12, count 2 2006.229.02:03:29.08#ibcon#read 6, iclass 12, count 2 2006.229.02:03:29.08#ibcon#end of sib2, iclass 12, count 2 2006.229.02:03:29.08#ibcon#*after write, iclass 12, count 2 2006.229.02:03:29.09#ibcon#*before return 0, iclass 12, count 2 2006.229.02:03:29.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:29.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:03:29.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:03:29.09#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:29.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:29.20#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:29.20#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:29.20#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:03:29.20#ibcon#first serial, iclass 12, count 0 2006.229.02:03:29.20#ibcon#enter sib2, iclass 12, count 0 2006.229.02:03:29.20#ibcon#flushed, iclass 12, count 0 2006.229.02:03:29.20#ibcon#about to write, iclass 12, count 0 2006.229.02:03:29.20#ibcon#wrote, iclass 12, count 0 2006.229.02:03:29.20#ibcon#about to read 3, iclass 12, count 0 2006.229.02:03:29.22#ibcon#read 3, iclass 12, count 0 2006.229.02:03:29.22#ibcon#about to read 4, iclass 12, count 0 2006.229.02:03:29.22#ibcon#read 4, iclass 12, count 0 2006.229.02:03:29.22#ibcon#about to read 5, iclass 12, count 0 2006.229.02:03:29.22#ibcon#read 5, iclass 12, count 0 2006.229.02:03:29.22#ibcon#about to read 6, iclass 12, count 0 2006.229.02:03:29.22#ibcon#read 6, iclass 12, count 0 2006.229.02:03:29.22#ibcon#end of sib2, iclass 12, count 0 2006.229.02:03:29.22#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:03:29.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:03:29.23#ibcon#[27=USB\r\n] 2006.229.02:03:29.23#ibcon#*before write, iclass 12, count 0 2006.229.02:03:29.23#ibcon#enter sib2, iclass 12, count 0 2006.229.02:03:29.23#ibcon#flushed, iclass 12, count 0 2006.229.02:03:29.23#ibcon#about to write, iclass 12, count 0 2006.229.02:03:29.23#ibcon#wrote, iclass 12, count 0 2006.229.02:03:29.23#ibcon#about to read 3, iclass 12, count 0 2006.229.02:03:29.25#ibcon#read 3, iclass 12, count 0 2006.229.02:03:29.25#ibcon#about to read 4, iclass 12, count 0 2006.229.02:03:29.25#ibcon#read 4, iclass 12, count 0 2006.229.02:03:29.25#ibcon#about to read 5, iclass 12, count 0 2006.229.02:03:29.25#ibcon#read 5, iclass 12, count 0 2006.229.02:03:29.25#ibcon#about to read 6, iclass 12, count 0 2006.229.02:03:29.25#ibcon#read 6, iclass 12, count 0 2006.229.02:03:29.25#ibcon#end of sib2, iclass 12, count 0 2006.229.02:03:29.25#ibcon#*after write, iclass 12, count 0 2006.229.02:03:29.26#ibcon#*before return 0, iclass 12, count 0 2006.229.02:03:29.26#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:29.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:03:29.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:03:29.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:03:29.26$vck44/vblo=4,679.99 2006.229.02:03:29.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:03:29.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:03:29.26#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:29.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:29.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:29.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:29.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:03:29.26#ibcon#first serial, iclass 14, count 0 2006.229.02:03:29.26#ibcon#enter sib2, iclass 14, count 0 2006.229.02:03:29.26#ibcon#flushed, iclass 14, count 0 2006.229.02:03:29.26#ibcon#about to write, iclass 14, count 0 2006.229.02:03:29.26#ibcon#wrote, iclass 14, count 0 2006.229.02:03:29.26#ibcon#about to read 3, iclass 14, count 0 2006.229.02:03:29.27#ibcon#read 3, iclass 14, count 0 2006.229.02:03:29.27#ibcon#about to read 4, iclass 14, count 0 2006.229.02:03:29.27#ibcon#read 4, iclass 14, count 0 2006.229.02:03:29.27#ibcon#about to read 5, iclass 14, count 0 2006.229.02:03:29.28#ibcon#read 5, iclass 14, count 0 2006.229.02:03:29.28#ibcon#about to read 6, iclass 14, count 0 2006.229.02:03:29.28#ibcon#read 6, iclass 14, count 0 2006.229.02:03:29.28#ibcon#end of sib2, iclass 14, count 0 2006.229.02:03:29.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:03:29.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:03:29.28#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:03:29.28#ibcon#*before write, iclass 14, count 0 2006.229.02:03:29.28#ibcon#enter sib2, iclass 14, count 0 2006.229.02:03:29.28#ibcon#flushed, iclass 14, count 0 2006.229.02:03:29.28#ibcon#about to write, iclass 14, count 0 2006.229.02:03:29.28#ibcon#wrote, iclass 14, count 0 2006.229.02:03:29.28#ibcon#about to read 3, iclass 14, count 0 2006.229.02:03:29.31#ibcon#read 3, iclass 14, count 0 2006.229.02:03:29.31#ibcon#about to read 4, iclass 14, count 0 2006.229.02:03:29.31#ibcon#read 4, iclass 14, count 0 2006.229.02:03:29.31#ibcon#about to read 5, iclass 14, count 0 2006.229.02:03:29.31#ibcon#read 5, iclass 14, count 0 2006.229.02:03:29.31#ibcon#about to read 6, iclass 14, count 0 2006.229.02:03:29.32#ibcon#read 6, iclass 14, count 0 2006.229.02:03:29.32#ibcon#end of sib2, iclass 14, count 0 2006.229.02:03:29.32#ibcon#*after write, iclass 14, count 0 2006.229.02:03:29.32#ibcon#*before return 0, iclass 14, count 0 2006.229.02:03:29.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:29.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:03:29.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:03:29.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:03:29.32$vck44/vb=4,4 2006.229.02:03:29.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:03:29.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:03:29.32#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:29.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:29.37#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:29.37#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:29.37#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:03:29.37#ibcon#first serial, iclass 16, count 2 2006.229.02:03:29.37#ibcon#enter sib2, iclass 16, count 2 2006.229.02:03:29.37#ibcon#flushed, iclass 16, count 2 2006.229.02:03:29.37#ibcon#about to write, iclass 16, count 2 2006.229.02:03:29.37#ibcon#wrote, iclass 16, count 2 2006.229.02:03:29.37#ibcon#about to read 3, iclass 16, count 2 2006.229.02:03:29.39#ibcon#read 3, iclass 16, count 2 2006.229.02:03:29.39#ibcon#about to read 4, iclass 16, count 2 2006.229.02:03:29.39#ibcon#read 4, iclass 16, count 2 2006.229.02:03:29.39#ibcon#about to read 5, iclass 16, count 2 2006.229.02:03:29.40#ibcon#read 5, iclass 16, count 2 2006.229.02:03:29.40#ibcon#about to read 6, iclass 16, count 2 2006.229.02:03:29.40#ibcon#read 6, iclass 16, count 2 2006.229.02:03:29.40#ibcon#end of sib2, iclass 16, count 2 2006.229.02:03:29.40#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:03:29.40#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:03:29.40#ibcon#[27=AT04-04\r\n] 2006.229.02:03:29.40#ibcon#*before write, iclass 16, count 2 2006.229.02:03:29.40#ibcon#enter sib2, iclass 16, count 2 2006.229.02:03:29.40#ibcon#flushed, iclass 16, count 2 2006.229.02:03:29.40#ibcon#about to write, iclass 16, count 2 2006.229.02:03:29.40#ibcon#wrote, iclass 16, count 2 2006.229.02:03:29.40#ibcon#about to read 3, iclass 16, count 2 2006.229.02:03:29.42#ibcon#read 3, iclass 16, count 2 2006.229.02:03:29.42#ibcon#about to read 4, iclass 16, count 2 2006.229.02:03:29.42#ibcon#read 4, iclass 16, count 2 2006.229.02:03:29.42#ibcon#about to read 5, iclass 16, count 2 2006.229.02:03:29.42#ibcon#read 5, iclass 16, count 2 2006.229.02:03:29.42#ibcon#about to read 6, iclass 16, count 2 2006.229.02:03:29.42#ibcon#read 6, iclass 16, count 2 2006.229.02:03:29.42#ibcon#end of sib2, iclass 16, count 2 2006.229.02:03:29.42#ibcon#*after write, iclass 16, count 2 2006.229.02:03:29.43#ibcon#*before return 0, iclass 16, count 2 2006.229.02:03:29.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:29.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:03:29.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:03:29.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:29.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:29.54#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:29.54#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:29.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:03:29.54#ibcon#first serial, iclass 16, count 0 2006.229.02:03:29.54#ibcon#enter sib2, iclass 16, count 0 2006.229.02:03:29.54#ibcon#flushed, iclass 16, count 0 2006.229.02:03:29.54#ibcon#about to write, iclass 16, count 0 2006.229.02:03:29.54#ibcon#wrote, iclass 16, count 0 2006.229.02:03:29.54#ibcon#about to read 3, iclass 16, count 0 2006.229.02:03:29.56#ibcon#read 3, iclass 16, count 0 2006.229.02:03:29.56#ibcon#about to read 4, iclass 16, count 0 2006.229.02:03:29.56#ibcon#read 4, iclass 16, count 0 2006.229.02:03:29.56#ibcon#about to read 5, iclass 16, count 0 2006.229.02:03:29.56#ibcon#read 5, iclass 16, count 0 2006.229.02:03:29.56#ibcon#about to read 6, iclass 16, count 0 2006.229.02:03:29.56#ibcon#read 6, iclass 16, count 0 2006.229.02:03:29.56#ibcon#end of sib2, iclass 16, count 0 2006.229.02:03:29.56#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:03:29.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:03:29.57#ibcon#[27=USB\r\n] 2006.229.02:03:29.57#ibcon#*before write, iclass 16, count 0 2006.229.02:03:29.57#ibcon#enter sib2, iclass 16, count 0 2006.229.02:03:29.57#ibcon#flushed, iclass 16, count 0 2006.229.02:03:29.57#ibcon#about to write, iclass 16, count 0 2006.229.02:03:29.57#ibcon#wrote, iclass 16, count 0 2006.229.02:03:29.57#ibcon#about to read 3, iclass 16, count 0 2006.229.02:03:29.59#ibcon#read 3, iclass 16, count 0 2006.229.02:03:29.59#ibcon#about to read 4, iclass 16, count 0 2006.229.02:03:29.59#ibcon#read 4, iclass 16, count 0 2006.229.02:03:29.59#ibcon#about to read 5, iclass 16, count 0 2006.229.02:03:29.59#ibcon#read 5, iclass 16, count 0 2006.229.02:03:29.59#ibcon#about to read 6, iclass 16, count 0 2006.229.02:03:29.59#ibcon#read 6, iclass 16, count 0 2006.229.02:03:29.59#ibcon#end of sib2, iclass 16, count 0 2006.229.02:03:29.59#ibcon#*after write, iclass 16, count 0 2006.229.02:03:29.60#ibcon#*before return 0, iclass 16, count 0 2006.229.02:03:29.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:29.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:03:29.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:03:29.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:03:29.60$vck44/vblo=5,709.99 2006.229.02:03:29.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:03:29.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:03:29.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:29.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:29.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:29.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:29.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:03:29.60#ibcon#first serial, iclass 18, count 0 2006.229.02:03:29.60#ibcon#enter sib2, iclass 18, count 0 2006.229.02:03:29.60#ibcon#flushed, iclass 18, count 0 2006.229.02:03:29.60#ibcon#about to write, iclass 18, count 0 2006.229.02:03:29.60#ibcon#wrote, iclass 18, count 0 2006.229.02:03:29.60#ibcon#about to read 3, iclass 18, count 0 2006.229.02:03:29.61#ibcon#read 3, iclass 18, count 0 2006.229.02:03:29.61#ibcon#about to read 4, iclass 18, count 0 2006.229.02:03:29.61#ibcon#read 4, iclass 18, count 0 2006.229.02:03:29.61#ibcon#about to read 5, iclass 18, count 0 2006.229.02:03:29.62#ibcon#read 5, iclass 18, count 0 2006.229.02:03:29.62#ibcon#about to read 6, iclass 18, count 0 2006.229.02:03:29.62#ibcon#read 6, iclass 18, count 0 2006.229.02:03:29.62#ibcon#end of sib2, iclass 18, count 0 2006.229.02:03:29.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:03:29.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:03:29.62#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:03:29.62#ibcon#*before write, iclass 18, count 0 2006.229.02:03:29.62#ibcon#enter sib2, iclass 18, count 0 2006.229.02:03:29.62#ibcon#flushed, iclass 18, count 0 2006.229.02:03:29.62#ibcon#about to write, iclass 18, count 0 2006.229.02:03:29.62#ibcon#wrote, iclass 18, count 0 2006.229.02:03:29.62#ibcon#about to read 3, iclass 18, count 0 2006.229.02:03:29.65#ibcon#read 3, iclass 18, count 0 2006.229.02:03:29.65#ibcon#about to read 4, iclass 18, count 0 2006.229.02:03:29.65#ibcon#read 4, iclass 18, count 0 2006.229.02:03:29.65#ibcon#about to read 5, iclass 18, count 0 2006.229.02:03:29.65#ibcon#read 5, iclass 18, count 0 2006.229.02:03:29.65#ibcon#about to read 6, iclass 18, count 0 2006.229.02:03:29.65#ibcon#read 6, iclass 18, count 0 2006.229.02:03:29.65#ibcon#end of sib2, iclass 18, count 0 2006.229.02:03:29.65#ibcon#*after write, iclass 18, count 0 2006.229.02:03:29.65#ibcon#*before return 0, iclass 18, count 0 2006.229.02:03:29.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:29.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:03:29.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:03:29.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:03:29.66$vck44/vb=5,4 2006.229.02:03:29.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.02:03:29.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.02:03:29.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:29.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:29.71#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:29.71#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:29.71#ibcon#enter wrdev, iclass 20, count 2 2006.229.02:03:29.71#ibcon#first serial, iclass 20, count 2 2006.229.02:03:29.71#ibcon#enter sib2, iclass 20, count 2 2006.229.02:03:29.71#ibcon#flushed, iclass 20, count 2 2006.229.02:03:29.71#ibcon#about to write, iclass 20, count 2 2006.229.02:03:29.71#ibcon#wrote, iclass 20, count 2 2006.229.02:03:29.71#ibcon#about to read 3, iclass 20, count 2 2006.229.02:03:29.73#ibcon#read 3, iclass 20, count 2 2006.229.02:03:29.73#ibcon#about to read 4, iclass 20, count 2 2006.229.02:03:29.73#ibcon#read 4, iclass 20, count 2 2006.229.02:03:29.73#ibcon#about to read 5, iclass 20, count 2 2006.229.02:03:29.73#ibcon#read 5, iclass 20, count 2 2006.229.02:03:29.73#ibcon#about to read 6, iclass 20, count 2 2006.229.02:03:29.73#ibcon#read 6, iclass 20, count 2 2006.229.02:03:29.73#ibcon#end of sib2, iclass 20, count 2 2006.229.02:03:29.73#ibcon#*mode == 0, iclass 20, count 2 2006.229.02:03:29.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.02:03:29.74#ibcon#[27=AT05-04\r\n] 2006.229.02:03:29.74#ibcon#*before write, iclass 20, count 2 2006.229.02:03:29.74#ibcon#enter sib2, iclass 20, count 2 2006.229.02:03:29.74#ibcon#flushed, iclass 20, count 2 2006.229.02:03:29.74#ibcon#about to write, iclass 20, count 2 2006.229.02:03:29.74#ibcon#wrote, iclass 20, count 2 2006.229.02:03:29.74#ibcon#about to read 3, iclass 20, count 2 2006.229.02:03:29.76#ibcon#read 3, iclass 20, count 2 2006.229.02:03:29.76#ibcon#about to read 4, iclass 20, count 2 2006.229.02:03:29.76#ibcon#read 4, iclass 20, count 2 2006.229.02:03:29.76#ibcon#about to read 5, iclass 20, count 2 2006.229.02:03:29.76#ibcon#read 5, iclass 20, count 2 2006.229.02:03:29.76#ibcon#about to read 6, iclass 20, count 2 2006.229.02:03:29.76#ibcon#read 6, iclass 20, count 2 2006.229.02:03:29.76#ibcon#end of sib2, iclass 20, count 2 2006.229.02:03:29.76#ibcon#*after write, iclass 20, count 2 2006.229.02:03:29.77#ibcon#*before return 0, iclass 20, count 2 2006.229.02:03:29.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:29.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:03:29.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.02:03:29.77#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:29.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:29.88#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:29.88#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:29.88#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:03:29.88#ibcon#first serial, iclass 20, count 0 2006.229.02:03:29.88#ibcon#enter sib2, iclass 20, count 0 2006.229.02:03:29.88#ibcon#flushed, iclass 20, count 0 2006.229.02:03:29.88#ibcon#about to write, iclass 20, count 0 2006.229.02:03:29.88#ibcon#wrote, iclass 20, count 0 2006.229.02:03:29.88#ibcon#about to read 3, iclass 20, count 0 2006.229.02:03:29.90#ibcon#read 3, iclass 20, count 0 2006.229.02:03:29.90#ibcon#about to read 4, iclass 20, count 0 2006.229.02:03:29.90#ibcon#read 4, iclass 20, count 0 2006.229.02:03:29.90#ibcon#about to read 5, iclass 20, count 0 2006.229.02:03:29.90#ibcon#read 5, iclass 20, count 0 2006.229.02:03:29.90#ibcon#about to read 6, iclass 20, count 0 2006.229.02:03:29.90#ibcon#read 6, iclass 20, count 0 2006.229.02:03:29.90#ibcon#end of sib2, iclass 20, count 0 2006.229.02:03:29.90#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:03:29.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:03:29.91#ibcon#[27=USB\r\n] 2006.229.02:03:29.91#ibcon#*before write, iclass 20, count 0 2006.229.02:03:29.91#ibcon#enter sib2, iclass 20, count 0 2006.229.02:03:29.91#ibcon#flushed, iclass 20, count 0 2006.229.02:03:29.91#ibcon#about to write, iclass 20, count 0 2006.229.02:03:29.91#ibcon#wrote, iclass 20, count 0 2006.229.02:03:29.91#ibcon#about to read 3, iclass 20, count 0 2006.229.02:03:29.93#ibcon#read 3, iclass 20, count 0 2006.229.02:03:29.93#ibcon#about to read 4, iclass 20, count 0 2006.229.02:03:29.93#ibcon#read 4, iclass 20, count 0 2006.229.02:03:29.93#ibcon#about to read 5, iclass 20, count 0 2006.229.02:03:29.93#ibcon#read 5, iclass 20, count 0 2006.229.02:03:29.93#ibcon#about to read 6, iclass 20, count 0 2006.229.02:03:29.93#ibcon#read 6, iclass 20, count 0 2006.229.02:03:29.93#ibcon#end of sib2, iclass 20, count 0 2006.229.02:03:29.93#ibcon#*after write, iclass 20, count 0 2006.229.02:03:29.94#ibcon#*before return 0, iclass 20, count 0 2006.229.02:03:29.94#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:29.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:03:29.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:03:29.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:03:29.94$vck44/vblo=6,719.99 2006.229.02:03:29.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:03:29.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:03:29.94#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:29.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:29.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:29.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:29.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:03:29.94#ibcon#first serial, iclass 22, count 0 2006.229.02:03:29.94#ibcon#enter sib2, iclass 22, count 0 2006.229.02:03:29.94#ibcon#flushed, iclass 22, count 0 2006.229.02:03:29.94#ibcon#about to write, iclass 22, count 0 2006.229.02:03:29.94#ibcon#wrote, iclass 22, count 0 2006.229.02:03:29.94#ibcon#about to read 3, iclass 22, count 0 2006.229.02:03:29.95#ibcon#read 3, iclass 22, count 0 2006.229.02:03:29.95#ibcon#about to read 4, iclass 22, count 0 2006.229.02:03:29.95#ibcon#read 4, iclass 22, count 0 2006.229.02:03:29.95#ibcon#about to read 5, iclass 22, count 0 2006.229.02:03:29.95#ibcon#read 5, iclass 22, count 0 2006.229.02:03:29.95#ibcon#about to read 6, iclass 22, count 0 2006.229.02:03:29.96#ibcon#read 6, iclass 22, count 0 2006.229.02:03:29.96#ibcon#end of sib2, iclass 22, count 0 2006.229.02:03:29.96#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:03:29.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:03:29.96#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:03:29.96#ibcon#*before write, iclass 22, count 0 2006.229.02:03:29.96#ibcon#enter sib2, iclass 22, count 0 2006.229.02:03:29.96#ibcon#flushed, iclass 22, count 0 2006.229.02:03:29.96#ibcon#about to write, iclass 22, count 0 2006.229.02:03:29.96#ibcon#wrote, iclass 22, count 0 2006.229.02:03:29.96#ibcon#about to read 3, iclass 22, count 0 2006.229.02:03:30.00#ibcon#read 3, iclass 22, count 0 2006.229.02:03:30.00#ibcon#about to read 4, iclass 22, count 0 2006.229.02:03:30.00#ibcon#read 4, iclass 22, count 0 2006.229.02:03:30.00#ibcon#about to read 5, iclass 22, count 0 2006.229.02:03:30.00#ibcon#read 5, iclass 22, count 0 2006.229.02:03:30.00#ibcon#about to read 6, iclass 22, count 0 2006.229.02:03:30.00#ibcon#read 6, iclass 22, count 0 2006.229.02:03:30.00#ibcon#end of sib2, iclass 22, count 0 2006.229.02:03:30.00#ibcon#*after write, iclass 22, count 0 2006.229.02:03:30.00#ibcon#*before return 0, iclass 22, count 0 2006.229.02:03:30.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:30.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:03:30.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:03:30.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:03:30.00$vck44/vb=6,4 2006.229.02:03:30.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.02:03:30.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.02:03:30.00#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:30.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:30.05#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:30.05#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:30.05#ibcon#enter wrdev, iclass 24, count 2 2006.229.02:03:30.05#ibcon#first serial, iclass 24, count 2 2006.229.02:03:30.05#ibcon#enter sib2, iclass 24, count 2 2006.229.02:03:30.05#ibcon#flushed, iclass 24, count 2 2006.229.02:03:30.05#ibcon#about to write, iclass 24, count 2 2006.229.02:03:30.06#ibcon#wrote, iclass 24, count 2 2006.229.02:03:30.06#ibcon#about to read 3, iclass 24, count 2 2006.229.02:03:30.07#ibcon#read 3, iclass 24, count 2 2006.229.02:03:30.07#ibcon#about to read 4, iclass 24, count 2 2006.229.02:03:30.07#ibcon#read 4, iclass 24, count 2 2006.229.02:03:30.07#ibcon#about to read 5, iclass 24, count 2 2006.229.02:03:30.07#ibcon#read 5, iclass 24, count 2 2006.229.02:03:30.07#ibcon#about to read 6, iclass 24, count 2 2006.229.02:03:30.08#ibcon#read 6, iclass 24, count 2 2006.229.02:03:30.08#ibcon#end of sib2, iclass 24, count 2 2006.229.02:03:30.08#ibcon#*mode == 0, iclass 24, count 2 2006.229.02:03:30.08#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.02:03:30.08#ibcon#[27=AT06-04\r\n] 2006.229.02:03:30.08#ibcon#*before write, iclass 24, count 2 2006.229.02:03:30.08#ibcon#enter sib2, iclass 24, count 2 2006.229.02:03:30.08#ibcon#flushed, iclass 24, count 2 2006.229.02:03:30.08#ibcon#about to write, iclass 24, count 2 2006.229.02:03:30.08#ibcon#wrote, iclass 24, count 2 2006.229.02:03:30.08#ibcon#about to read 3, iclass 24, count 2 2006.229.02:03:30.10#ibcon#read 3, iclass 24, count 2 2006.229.02:03:30.10#ibcon#about to read 4, iclass 24, count 2 2006.229.02:03:30.10#ibcon#read 4, iclass 24, count 2 2006.229.02:03:30.10#ibcon#about to read 5, iclass 24, count 2 2006.229.02:03:30.10#ibcon#read 5, iclass 24, count 2 2006.229.02:03:30.10#ibcon#about to read 6, iclass 24, count 2 2006.229.02:03:30.10#ibcon#read 6, iclass 24, count 2 2006.229.02:03:30.10#ibcon#end of sib2, iclass 24, count 2 2006.229.02:03:30.10#ibcon#*after write, iclass 24, count 2 2006.229.02:03:30.11#ibcon#*before return 0, iclass 24, count 2 2006.229.02:03:30.11#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:30.11#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:03:30.11#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.02:03:30.11#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:30.11#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:30.22#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:30.22#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:30.22#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:03:30.22#ibcon#first serial, iclass 24, count 0 2006.229.02:03:30.22#ibcon#enter sib2, iclass 24, count 0 2006.229.02:03:30.22#ibcon#flushed, iclass 24, count 0 2006.229.02:03:30.22#ibcon#about to write, iclass 24, count 0 2006.229.02:03:30.22#ibcon#wrote, iclass 24, count 0 2006.229.02:03:30.23#ibcon#about to read 3, iclass 24, count 0 2006.229.02:03:30.24#ibcon#read 3, iclass 24, count 0 2006.229.02:03:30.24#ibcon#about to read 4, iclass 24, count 0 2006.229.02:03:30.24#ibcon#read 4, iclass 24, count 0 2006.229.02:03:30.24#ibcon#about to read 5, iclass 24, count 0 2006.229.02:03:30.24#ibcon#read 5, iclass 24, count 0 2006.229.02:03:30.24#ibcon#about to read 6, iclass 24, count 0 2006.229.02:03:30.24#ibcon#read 6, iclass 24, count 0 2006.229.02:03:30.24#ibcon#end of sib2, iclass 24, count 0 2006.229.02:03:30.24#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:03:30.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:03:30.25#ibcon#[27=USB\r\n] 2006.229.02:03:30.25#ibcon#*before write, iclass 24, count 0 2006.229.02:03:30.25#ibcon#enter sib2, iclass 24, count 0 2006.229.02:03:30.25#ibcon#flushed, iclass 24, count 0 2006.229.02:03:30.25#ibcon#about to write, iclass 24, count 0 2006.229.02:03:30.25#ibcon#wrote, iclass 24, count 0 2006.229.02:03:30.25#ibcon#about to read 3, iclass 24, count 0 2006.229.02:03:30.27#ibcon#read 3, iclass 24, count 0 2006.229.02:03:30.27#ibcon#about to read 4, iclass 24, count 0 2006.229.02:03:30.27#ibcon#read 4, iclass 24, count 0 2006.229.02:03:30.27#ibcon#about to read 5, iclass 24, count 0 2006.229.02:03:30.27#ibcon#read 5, iclass 24, count 0 2006.229.02:03:30.27#ibcon#about to read 6, iclass 24, count 0 2006.229.02:03:30.27#ibcon#read 6, iclass 24, count 0 2006.229.02:03:30.27#ibcon#end of sib2, iclass 24, count 0 2006.229.02:03:30.27#ibcon#*after write, iclass 24, count 0 2006.229.02:03:30.28#ibcon#*before return 0, iclass 24, count 0 2006.229.02:03:30.28#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:30.28#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:03:30.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:03:30.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:03:30.28$vck44/vblo=7,734.99 2006.229.02:03:30.28#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:03:30.28#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:03:30.28#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:30.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:30.28#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:30.28#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:30.28#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:03:30.28#ibcon#first serial, iclass 26, count 0 2006.229.02:03:30.28#ibcon#enter sib2, iclass 26, count 0 2006.229.02:03:30.28#ibcon#flushed, iclass 26, count 0 2006.229.02:03:30.28#ibcon#about to write, iclass 26, count 0 2006.229.02:03:30.28#ibcon#wrote, iclass 26, count 0 2006.229.02:03:30.28#ibcon#about to read 3, iclass 26, count 0 2006.229.02:03:30.29#ibcon#read 3, iclass 26, count 0 2006.229.02:03:30.29#ibcon#about to read 4, iclass 26, count 0 2006.229.02:03:30.29#ibcon#read 4, iclass 26, count 0 2006.229.02:03:30.29#ibcon#about to read 5, iclass 26, count 0 2006.229.02:03:30.30#ibcon#read 5, iclass 26, count 0 2006.229.02:03:30.30#ibcon#about to read 6, iclass 26, count 0 2006.229.02:03:30.30#ibcon#read 6, iclass 26, count 0 2006.229.02:03:30.30#ibcon#end of sib2, iclass 26, count 0 2006.229.02:03:30.30#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:03:30.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:03:30.30#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:03:30.30#ibcon#*before write, iclass 26, count 0 2006.229.02:03:30.30#ibcon#enter sib2, iclass 26, count 0 2006.229.02:03:30.30#ibcon#flushed, iclass 26, count 0 2006.229.02:03:30.30#ibcon#about to write, iclass 26, count 0 2006.229.02:03:30.30#ibcon#wrote, iclass 26, count 0 2006.229.02:03:30.30#ibcon#about to read 3, iclass 26, count 0 2006.229.02:03:30.33#ibcon#read 3, iclass 26, count 0 2006.229.02:03:30.33#ibcon#about to read 4, iclass 26, count 0 2006.229.02:03:30.33#ibcon#read 4, iclass 26, count 0 2006.229.02:03:30.33#ibcon#about to read 5, iclass 26, count 0 2006.229.02:03:30.33#ibcon#read 5, iclass 26, count 0 2006.229.02:03:30.33#ibcon#about to read 6, iclass 26, count 0 2006.229.02:03:30.34#ibcon#read 6, iclass 26, count 0 2006.229.02:03:30.34#ibcon#end of sib2, iclass 26, count 0 2006.229.02:03:30.34#ibcon#*after write, iclass 26, count 0 2006.229.02:03:30.34#ibcon#*before return 0, iclass 26, count 0 2006.229.02:03:30.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:30.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:03:30.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:03:30.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:03:30.34$vck44/vb=7,4 2006.229.02:03:30.34#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:03:30.34#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:03:30.34#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:30.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:30.39#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:30.39#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:30.39#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:03:30.39#ibcon#first serial, iclass 28, count 2 2006.229.02:03:30.39#ibcon#enter sib2, iclass 28, count 2 2006.229.02:03:30.39#ibcon#flushed, iclass 28, count 2 2006.229.02:03:30.39#ibcon#about to write, iclass 28, count 2 2006.229.02:03:30.39#ibcon#wrote, iclass 28, count 2 2006.229.02:03:30.39#ibcon#about to read 3, iclass 28, count 2 2006.229.02:03:30.41#ibcon#read 3, iclass 28, count 2 2006.229.02:03:30.41#ibcon#about to read 4, iclass 28, count 2 2006.229.02:03:30.41#ibcon#read 4, iclass 28, count 2 2006.229.02:03:30.41#ibcon#about to read 5, iclass 28, count 2 2006.229.02:03:30.41#ibcon#read 5, iclass 28, count 2 2006.229.02:03:30.41#ibcon#about to read 6, iclass 28, count 2 2006.229.02:03:30.41#ibcon#read 6, iclass 28, count 2 2006.229.02:03:30.42#ibcon#end of sib2, iclass 28, count 2 2006.229.02:03:30.42#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:03:30.42#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:03:30.42#ibcon#[27=AT07-04\r\n] 2006.229.02:03:30.42#ibcon#*before write, iclass 28, count 2 2006.229.02:03:30.42#ibcon#enter sib2, iclass 28, count 2 2006.229.02:03:30.42#ibcon#flushed, iclass 28, count 2 2006.229.02:03:30.42#ibcon#about to write, iclass 28, count 2 2006.229.02:03:30.42#ibcon#wrote, iclass 28, count 2 2006.229.02:03:30.42#ibcon#about to read 3, iclass 28, count 2 2006.229.02:03:30.44#ibcon#read 3, iclass 28, count 2 2006.229.02:03:30.44#ibcon#about to read 4, iclass 28, count 2 2006.229.02:03:30.44#ibcon#read 4, iclass 28, count 2 2006.229.02:03:30.44#ibcon#about to read 5, iclass 28, count 2 2006.229.02:03:30.44#ibcon#read 5, iclass 28, count 2 2006.229.02:03:30.44#ibcon#about to read 6, iclass 28, count 2 2006.229.02:03:30.44#ibcon#read 6, iclass 28, count 2 2006.229.02:03:30.44#ibcon#end of sib2, iclass 28, count 2 2006.229.02:03:30.44#ibcon#*after write, iclass 28, count 2 2006.229.02:03:30.45#ibcon#*before return 0, iclass 28, count 2 2006.229.02:03:30.45#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:30.45#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:03:30.45#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:03:30.45#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:30.45#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:30.56#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:30.56#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:30.56#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:03:30.56#ibcon#first serial, iclass 28, count 0 2006.229.02:03:30.56#ibcon#enter sib2, iclass 28, count 0 2006.229.02:03:30.56#ibcon#flushed, iclass 28, count 0 2006.229.02:03:30.56#ibcon#about to write, iclass 28, count 0 2006.229.02:03:30.56#ibcon#wrote, iclass 28, count 0 2006.229.02:03:30.56#ibcon#about to read 3, iclass 28, count 0 2006.229.02:03:30.58#ibcon#read 3, iclass 28, count 0 2006.229.02:03:30.58#ibcon#about to read 4, iclass 28, count 0 2006.229.02:03:30.58#ibcon#read 4, iclass 28, count 0 2006.229.02:03:30.58#ibcon#about to read 5, iclass 28, count 0 2006.229.02:03:30.58#ibcon#read 5, iclass 28, count 0 2006.229.02:03:30.58#ibcon#about to read 6, iclass 28, count 0 2006.229.02:03:30.58#ibcon#read 6, iclass 28, count 0 2006.229.02:03:30.58#ibcon#end of sib2, iclass 28, count 0 2006.229.02:03:30.58#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:03:30.59#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:03:30.59#ibcon#[27=USB\r\n] 2006.229.02:03:30.59#ibcon#*before write, iclass 28, count 0 2006.229.02:03:30.59#ibcon#enter sib2, iclass 28, count 0 2006.229.02:03:30.59#ibcon#flushed, iclass 28, count 0 2006.229.02:03:30.59#ibcon#about to write, iclass 28, count 0 2006.229.02:03:30.59#ibcon#wrote, iclass 28, count 0 2006.229.02:03:30.59#ibcon#about to read 3, iclass 28, count 0 2006.229.02:03:30.61#ibcon#read 3, iclass 28, count 0 2006.229.02:03:30.61#ibcon#about to read 4, iclass 28, count 0 2006.229.02:03:30.61#ibcon#read 4, iclass 28, count 0 2006.229.02:03:30.61#ibcon#about to read 5, iclass 28, count 0 2006.229.02:03:30.61#ibcon#read 5, iclass 28, count 0 2006.229.02:03:30.61#ibcon#about to read 6, iclass 28, count 0 2006.229.02:03:30.61#ibcon#read 6, iclass 28, count 0 2006.229.02:03:30.61#ibcon#end of sib2, iclass 28, count 0 2006.229.02:03:30.61#ibcon#*after write, iclass 28, count 0 2006.229.02:03:30.62#ibcon#*before return 0, iclass 28, count 0 2006.229.02:03:30.62#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:30.62#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:03:30.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:03:30.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:03:30.62$vck44/vblo=8,744.99 2006.229.02:03:30.62#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:03:30.62#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:03:30.62#ibcon#ireg 17 cls_cnt 0 2006.229.02:03:30.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:30.62#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:30.62#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:30.62#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:03:30.62#ibcon#first serial, iclass 30, count 0 2006.229.02:03:30.62#ibcon#enter sib2, iclass 30, count 0 2006.229.02:03:30.62#ibcon#flushed, iclass 30, count 0 2006.229.02:03:30.62#ibcon#about to write, iclass 30, count 0 2006.229.02:03:30.62#ibcon#wrote, iclass 30, count 0 2006.229.02:03:30.62#ibcon#about to read 3, iclass 30, count 0 2006.229.02:03:30.63#ibcon#read 3, iclass 30, count 0 2006.229.02:03:30.63#ibcon#about to read 4, iclass 30, count 0 2006.229.02:03:30.63#ibcon#read 4, iclass 30, count 0 2006.229.02:03:30.64#ibcon#about to read 5, iclass 30, count 0 2006.229.02:03:30.64#ibcon#read 5, iclass 30, count 0 2006.229.02:03:30.64#ibcon#about to read 6, iclass 30, count 0 2006.229.02:03:30.64#ibcon#read 6, iclass 30, count 0 2006.229.02:03:30.64#ibcon#end of sib2, iclass 30, count 0 2006.229.02:03:30.64#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:03:30.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:03:30.64#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:03:30.64#ibcon#*before write, iclass 30, count 0 2006.229.02:03:30.64#ibcon#enter sib2, iclass 30, count 0 2006.229.02:03:30.64#ibcon#flushed, iclass 30, count 0 2006.229.02:03:30.64#ibcon#about to write, iclass 30, count 0 2006.229.02:03:30.64#ibcon#wrote, iclass 30, count 0 2006.229.02:03:30.64#ibcon#about to read 3, iclass 30, count 0 2006.229.02:03:30.67#ibcon#read 3, iclass 30, count 0 2006.229.02:03:30.67#ibcon#about to read 4, iclass 30, count 0 2006.229.02:03:30.67#ibcon#read 4, iclass 30, count 0 2006.229.02:03:30.67#ibcon#about to read 5, iclass 30, count 0 2006.229.02:03:30.67#ibcon#read 5, iclass 30, count 0 2006.229.02:03:30.67#ibcon#about to read 6, iclass 30, count 0 2006.229.02:03:30.67#ibcon#read 6, iclass 30, count 0 2006.229.02:03:30.67#ibcon#end of sib2, iclass 30, count 0 2006.229.02:03:30.68#ibcon#*after write, iclass 30, count 0 2006.229.02:03:30.68#ibcon#*before return 0, iclass 30, count 0 2006.229.02:03:30.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:30.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:03:30.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:03:30.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:03:30.68$vck44/vb=8,4 2006.229.02:03:30.68#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:03:30.68#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:03:30.68#ibcon#ireg 11 cls_cnt 2 2006.229.02:03:30.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:30.73#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:30.73#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:30.73#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:03:30.73#ibcon#first serial, iclass 32, count 2 2006.229.02:03:30.73#ibcon#enter sib2, iclass 32, count 2 2006.229.02:03:30.73#ibcon#flushed, iclass 32, count 2 2006.229.02:03:30.73#ibcon#about to write, iclass 32, count 2 2006.229.02:03:30.73#ibcon#wrote, iclass 32, count 2 2006.229.02:03:30.73#ibcon#about to read 3, iclass 32, count 2 2006.229.02:03:30.75#ibcon#read 3, iclass 32, count 2 2006.229.02:03:30.75#ibcon#about to read 4, iclass 32, count 2 2006.229.02:03:30.75#ibcon#read 4, iclass 32, count 2 2006.229.02:03:30.75#ibcon#about to read 5, iclass 32, count 2 2006.229.02:03:30.75#ibcon#read 5, iclass 32, count 2 2006.229.02:03:30.75#ibcon#about to read 6, iclass 32, count 2 2006.229.02:03:30.76#ibcon#read 6, iclass 32, count 2 2006.229.02:03:30.76#ibcon#end of sib2, iclass 32, count 2 2006.229.02:03:30.76#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:03:30.76#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:03:30.76#ibcon#[27=AT08-04\r\n] 2006.229.02:03:30.76#ibcon#*before write, iclass 32, count 2 2006.229.02:03:30.76#ibcon#enter sib2, iclass 32, count 2 2006.229.02:03:30.76#ibcon#flushed, iclass 32, count 2 2006.229.02:03:30.76#ibcon#about to write, iclass 32, count 2 2006.229.02:03:30.76#ibcon#wrote, iclass 32, count 2 2006.229.02:03:30.76#ibcon#about to read 3, iclass 32, count 2 2006.229.02:03:30.78#ibcon#read 3, iclass 32, count 2 2006.229.02:03:30.78#ibcon#about to read 4, iclass 32, count 2 2006.229.02:03:30.78#ibcon#read 4, iclass 32, count 2 2006.229.02:03:30.78#ibcon#about to read 5, iclass 32, count 2 2006.229.02:03:30.78#ibcon#read 5, iclass 32, count 2 2006.229.02:03:30.78#ibcon#about to read 6, iclass 32, count 2 2006.229.02:03:30.78#ibcon#read 6, iclass 32, count 2 2006.229.02:03:30.78#ibcon#end of sib2, iclass 32, count 2 2006.229.02:03:30.78#ibcon#*after write, iclass 32, count 2 2006.229.02:03:30.78#ibcon#*before return 0, iclass 32, count 2 2006.229.02:03:30.79#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:30.79#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:03:30.79#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:03:30.79#ibcon#ireg 7 cls_cnt 0 2006.229.02:03:30.79#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:30.90#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:30.90#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:30.90#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:03:30.90#ibcon#first serial, iclass 32, count 0 2006.229.02:03:30.90#ibcon#enter sib2, iclass 32, count 0 2006.229.02:03:30.90#ibcon#flushed, iclass 32, count 0 2006.229.02:03:30.90#ibcon#about to write, iclass 32, count 0 2006.229.02:03:30.90#ibcon#wrote, iclass 32, count 0 2006.229.02:03:30.90#ibcon#about to read 3, iclass 32, count 0 2006.229.02:03:30.92#ibcon#read 3, iclass 32, count 0 2006.229.02:03:30.92#ibcon#about to read 4, iclass 32, count 0 2006.229.02:03:30.92#ibcon#read 4, iclass 32, count 0 2006.229.02:03:30.92#ibcon#about to read 5, iclass 32, count 0 2006.229.02:03:30.92#ibcon#read 5, iclass 32, count 0 2006.229.02:03:30.92#ibcon#about to read 6, iclass 32, count 0 2006.229.02:03:30.92#ibcon#read 6, iclass 32, count 0 2006.229.02:03:30.92#ibcon#end of sib2, iclass 32, count 0 2006.229.02:03:30.92#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:03:30.92#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:03:30.93#ibcon#[27=USB\r\n] 2006.229.02:03:30.93#ibcon#*before write, iclass 32, count 0 2006.229.02:03:30.93#ibcon#enter sib2, iclass 32, count 0 2006.229.02:03:30.93#ibcon#flushed, iclass 32, count 0 2006.229.02:03:30.93#ibcon#about to write, iclass 32, count 0 2006.229.02:03:30.93#ibcon#wrote, iclass 32, count 0 2006.229.02:03:30.93#ibcon#about to read 3, iclass 32, count 0 2006.229.02:03:30.95#ibcon#read 3, iclass 32, count 0 2006.229.02:03:30.95#ibcon#about to read 4, iclass 32, count 0 2006.229.02:03:30.95#ibcon#read 4, iclass 32, count 0 2006.229.02:03:30.95#ibcon#about to read 5, iclass 32, count 0 2006.229.02:03:30.95#ibcon#read 5, iclass 32, count 0 2006.229.02:03:30.95#ibcon#about to read 6, iclass 32, count 0 2006.229.02:03:30.95#ibcon#read 6, iclass 32, count 0 2006.229.02:03:30.95#ibcon#end of sib2, iclass 32, count 0 2006.229.02:03:30.95#ibcon#*after write, iclass 32, count 0 2006.229.02:03:30.96#ibcon#*before return 0, iclass 32, count 0 2006.229.02:03:30.96#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:30.96#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:03:30.96#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:03:30.96#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:03:30.96$vck44/vabw=wide 2006.229.02:03:30.96#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:03:30.96#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:03:30.96#ibcon#ireg 8 cls_cnt 0 2006.229.02:03:30.96#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:30.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:30.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:30.96#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:03:30.96#ibcon#first serial, iclass 34, count 0 2006.229.02:03:30.96#ibcon#enter sib2, iclass 34, count 0 2006.229.02:03:30.96#ibcon#flushed, iclass 34, count 0 2006.229.02:03:30.96#ibcon#about to write, iclass 34, count 0 2006.229.02:03:30.96#ibcon#wrote, iclass 34, count 0 2006.229.02:03:30.96#ibcon#about to read 3, iclass 34, count 0 2006.229.02:03:30.97#ibcon#read 3, iclass 34, count 0 2006.229.02:03:30.97#ibcon#about to read 4, iclass 34, count 0 2006.229.02:03:30.97#ibcon#read 4, iclass 34, count 0 2006.229.02:03:30.97#ibcon#about to read 5, iclass 34, count 0 2006.229.02:03:30.97#ibcon#read 5, iclass 34, count 0 2006.229.02:03:30.97#ibcon#about to read 6, iclass 34, count 0 2006.229.02:03:30.98#ibcon#read 6, iclass 34, count 0 2006.229.02:03:30.98#ibcon#end of sib2, iclass 34, count 0 2006.229.02:03:30.98#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:03:30.98#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:03:30.98#ibcon#[25=BW32\r\n] 2006.229.02:03:30.98#ibcon#*before write, iclass 34, count 0 2006.229.02:03:30.98#ibcon#enter sib2, iclass 34, count 0 2006.229.02:03:30.98#ibcon#flushed, iclass 34, count 0 2006.229.02:03:30.98#ibcon#about to write, iclass 34, count 0 2006.229.02:03:30.98#ibcon#wrote, iclass 34, count 0 2006.229.02:03:30.98#ibcon#about to read 3, iclass 34, count 0 2006.229.02:03:31.00#ibcon#read 3, iclass 34, count 0 2006.229.02:03:31.00#ibcon#about to read 4, iclass 34, count 0 2006.229.02:03:31.00#ibcon#read 4, iclass 34, count 0 2006.229.02:03:31.00#ibcon#about to read 5, iclass 34, count 0 2006.229.02:03:31.00#ibcon#read 5, iclass 34, count 0 2006.229.02:03:31.00#ibcon#about to read 6, iclass 34, count 0 2006.229.02:03:31.00#ibcon#read 6, iclass 34, count 0 2006.229.02:03:31.00#ibcon#end of sib2, iclass 34, count 0 2006.229.02:03:31.00#ibcon#*after write, iclass 34, count 0 2006.229.02:03:31.00#ibcon#*before return 0, iclass 34, count 0 2006.229.02:03:31.01#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:31.01#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:03:31.01#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:03:31.01#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:03:31.01$vck44/vbbw=wide 2006.229.02:03:31.01#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.02:03:31.01#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.02:03:31.01#ibcon#ireg 8 cls_cnt 0 2006.229.02:03:31.01#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:03:31.07#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:03:31.07#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:03:31.07#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:03:31.07#ibcon#first serial, iclass 36, count 0 2006.229.02:03:31.07#ibcon#enter sib2, iclass 36, count 0 2006.229.02:03:31.07#ibcon#flushed, iclass 36, count 0 2006.229.02:03:31.07#ibcon#about to write, iclass 36, count 0 2006.229.02:03:31.08#ibcon#wrote, iclass 36, count 0 2006.229.02:03:31.08#ibcon#about to read 3, iclass 36, count 0 2006.229.02:03:31.09#ibcon#read 3, iclass 36, count 0 2006.229.02:03:31.09#ibcon#about to read 4, iclass 36, count 0 2006.229.02:03:31.09#ibcon#read 4, iclass 36, count 0 2006.229.02:03:31.09#ibcon#about to read 5, iclass 36, count 0 2006.229.02:03:31.09#ibcon#read 5, iclass 36, count 0 2006.229.02:03:31.09#ibcon#about to read 6, iclass 36, count 0 2006.229.02:03:31.09#ibcon#read 6, iclass 36, count 0 2006.229.02:03:31.10#ibcon#end of sib2, iclass 36, count 0 2006.229.02:03:31.10#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:03:31.10#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:03:31.10#ibcon#[27=BW32\r\n] 2006.229.02:03:31.10#ibcon#*before write, iclass 36, count 0 2006.229.02:03:31.10#ibcon#enter sib2, iclass 36, count 0 2006.229.02:03:31.10#ibcon#flushed, iclass 36, count 0 2006.229.02:03:31.10#ibcon#about to write, iclass 36, count 0 2006.229.02:03:31.10#ibcon#wrote, iclass 36, count 0 2006.229.02:03:31.10#ibcon#about to read 3, iclass 36, count 0 2006.229.02:03:31.12#ibcon#read 3, iclass 36, count 0 2006.229.02:03:31.12#ibcon#about to read 4, iclass 36, count 0 2006.229.02:03:31.12#ibcon#read 4, iclass 36, count 0 2006.229.02:03:31.12#ibcon#about to read 5, iclass 36, count 0 2006.229.02:03:31.12#ibcon#read 5, iclass 36, count 0 2006.229.02:03:31.13#ibcon#about to read 6, iclass 36, count 0 2006.229.02:03:31.13#ibcon#read 6, iclass 36, count 0 2006.229.02:03:31.13#ibcon#end of sib2, iclass 36, count 0 2006.229.02:03:31.13#ibcon#*after write, iclass 36, count 0 2006.229.02:03:31.13#ibcon#*before return 0, iclass 36, count 0 2006.229.02:03:31.13#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:03:31.13#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:03:31.13#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:03:31.13#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:03:31.13$setupk4/ifdk4 2006.229.02:03:31.13$ifdk4/lo= 2006.229.02:03:31.13$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:03:31.13$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:03:31.13$ifdk4/patch= 2006.229.02:03:31.13$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:03:31.13$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:03:31.13$setupk4/!*+20s 2006.229.02:03:31.15#abcon#<5=/05 3.1 5.4 30.08 901001.2\r\n> 2006.229.02:03:31.17#abcon#{5=INTERFACE CLEAR} 2006.229.02:03:31.23#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:03:41.32#abcon#<5=/05 3.2 5.4 30.08 901001.2\r\n> 2006.229.02:03:41.34#abcon#{5=INTERFACE CLEAR} 2006.229.02:03:41.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:03:45.61$setupk4/"tpicd 2006.229.02:03:45.61$setupk4/echo=off 2006.229.02:03:45.62$setupk4/xlog=off 2006.229.02:03:45.62:!2006.229.02:04:07 2006.229.02:03:50.13#trakl#Source acquired 2006.229.02:03:50.14#flagr#flagr/antenna,acquired 2006.229.02:04:07.02:preob 2006.229.02:04:08.14/onsource/TRACKING 2006.229.02:04:08.14:!2006.229.02:04:17 2006.229.02:04:17.01:"tape 2006.229.02:04:17.02:"st=record 2006.229.02:04:17.02:data_valid=on 2006.229.02:04:17.02:midob 2006.229.02:04:18.15/onsource/TRACKING 2006.229.02:04:18.15/wx/30.07,1001.2,90 2006.229.02:04:18.34/cable/+6.4081E-03 2006.229.02:04:19.43/va/01,08,usb,yes,38,41 2006.229.02:04:19.43/va/02,07,usb,yes,41,42 2006.229.02:04:19.43/va/03,06,usb,yes,51,54 2006.229.02:04:19.43/va/04,07,usb,yes,42,45 2006.229.02:04:19.43/va/05,04,usb,yes,38,39 2006.229.02:04:19.43/va/06,04,usb,yes,42,42 2006.229.02:04:19.43/va/07,05,usb,yes,38,38 2006.229.02:04:19.43/va/08,06,usb,yes,28,34 2006.229.02:04:19.66/valo/01,524.99,yes,locked 2006.229.02:04:19.66/valo/02,534.99,yes,locked 2006.229.02:04:19.66/valo/03,564.99,yes,locked 2006.229.02:04:19.66/valo/04,624.99,yes,locked 2006.229.02:04:19.66/valo/05,734.99,yes,locked 2006.229.02:04:19.66/valo/06,814.99,yes,locked 2006.229.02:04:19.66/valo/07,864.99,yes,locked 2006.229.02:04:19.66/valo/08,884.99,yes,locked 2006.229.02:04:20.75/vb/01,04,usb,yes,36,34 2006.229.02:04:20.75/vb/02,04,usb,yes,39,38 2006.229.02:04:20.75/vb/03,04,usb,yes,35,39 2006.229.02:04:20.75/vb/04,04,usb,yes,41,39 2006.229.02:04:20.75/vb/05,04,usb,yes,32,35 2006.229.02:04:20.75/vb/06,04,usb,yes,37,33 2006.229.02:04:20.75/vb/07,04,usb,yes,37,37 2006.229.02:04:20.75/vb/08,04,usb,yes,34,38 2006.229.02:04:20.99/vblo/01,629.99,yes,locked 2006.229.02:04:20.99/vblo/02,634.99,yes,locked 2006.229.02:04:20.99/vblo/03,649.99,yes,locked 2006.229.02:04:20.99/vblo/04,679.99,yes,locked 2006.229.02:04:20.99/vblo/05,709.99,yes,locked 2006.229.02:04:20.99/vblo/06,719.99,yes,locked 2006.229.02:04:20.99/vblo/07,734.99,yes,locked 2006.229.02:04:20.99/vblo/08,744.99,yes,locked 2006.229.02:04:21.14/vabw/8 2006.229.02:04:21.29/vbbw/8 2006.229.02:04:21.38/xfe/off,on,12.0 2006.229.02:04:21.77/ifatt/23,28,28,28 2006.229.02:04:22.07/fmout-gps/S +4.46E-07 2006.229.02:04:22.12:!2006.229.02:05:07 2006.229.02:05:07.02:data_valid=off 2006.229.02:05:07.02:"et 2006.229.02:05:07.02:!+3s 2006.229.02:05:10.05:"tape 2006.229.02:05:10.06:postob 2006.229.02:05:10.13/cable/+6.4079E-03 2006.229.02:05:10.14/wx/30.03,1001.2,90 2006.229.02:05:10.19/fmout-gps/S +4.47E-07 2006.229.02:05:10.20:scan_name=229-0206,jd0608,180 2006.229.02:05:10.20:source=0059+581,010245.76,582411.1,2000.0,ccw 2006.229.02:05:12.15#flagr#flagr/antenna,new-source 2006.229.02:05:12.15:checkk5 2006.229.02:05:12.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:05:13.00/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:05:13.50/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:05:13.96/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:05:14.38/chk_obsdata//k5ts1/T2290204??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:05:14.76/chk_obsdata//k5ts2/T2290204??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:05:15.20/chk_obsdata//k5ts3/T2290204??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:05:15.59/chk_obsdata//k5ts4/T2290204??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:05:16.33/k5log//k5ts1_log_newline 2006.229.02:05:17.14/k5log//k5ts2_log_newline 2006.229.02:05:17.92/k5log//k5ts3_log_newline 2006.229.02:05:18.75/k5log//k5ts4_log_newline 2006.229.02:05:18.77/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:05:18.77:setupk4=1 2006.229.02:05:18.77$setupk4/echo=on 2006.229.02:05:18.77$setupk4/pcalon 2006.229.02:05:18.77$pcalon/"no phase cal control is implemented here 2006.229.02:05:18.77$setupk4/"tpicd=stop 2006.229.02:05:18.77$setupk4/"rec=synch_on 2006.229.02:05:18.77$setupk4/"rec_mode=128 2006.229.02:05:18.77$setupk4/!* 2006.229.02:05:18.77$setupk4/recpk4 2006.229.02:05:18.77$recpk4/recpatch= 2006.229.02:05:18.78$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:05:18.78$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:05:18.78$setupk4/vck44 2006.229.02:05:18.78$vck44/valo=1,524.99 2006.229.02:05:18.78#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.02:05:18.78#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.02:05:18.78#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:18.78#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:18.78#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:18.78#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:18.78#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:05:18.78#ibcon#first serial, iclass 13, count 0 2006.229.02:05:18.78#ibcon#enter sib2, iclass 13, count 0 2006.229.02:05:18.78#ibcon#flushed, iclass 13, count 0 2006.229.02:05:18.78#ibcon#about to write, iclass 13, count 0 2006.229.02:05:18.78#ibcon#wrote, iclass 13, count 0 2006.229.02:05:18.78#ibcon#about to read 3, iclass 13, count 0 2006.229.02:05:18.82#ibcon#read 3, iclass 13, count 0 2006.229.02:05:18.82#ibcon#about to read 4, iclass 13, count 0 2006.229.02:05:18.82#ibcon#read 4, iclass 13, count 0 2006.229.02:05:18.82#ibcon#about to read 5, iclass 13, count 0 2006.229.02:05:18.82#ibcon#read 5, iclass 13, count 0 2006.229.02:05:18.82#ibcon#about to read 6, iclass 13, count 0 2006.229.02:05:18.82#ibcon#read 6, iclass 13, count 0 2006.229.02:05:18.82#ibcon#end of sib2, iclass 13, count 0 2006.229.02:05:18.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:05:18.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:05:18.82#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:05:18.82#ibcon#*before write, iclass 13, count 0 2006.229.02:05:18.82#ibcon#enter sib2, iclass 13, count 0 2006.229.02:05:18.82#ibcon#flushed, iclass 13, count 0 2006.229.02:05:18.82#ibcon#about to write, iclass 13, count 0 2006.229.02:05:18.82#ibcon#wrote, iclass 13, count 0 2006.229.02:05:18.82#ibcon#about to read 3, iclass 13, count 0 2006.229.02:05:18.86#ibcon#read 3, iclass 13, count 0 2006.229.02:05:18.86#ibcon#about to read 4, iclass 13, count 0 2006.229.02:05:18.86#ibcon#read 4, iclass 13, count 0 2006.229.02:05:18.86#ibcon#about to read 5, iclass 13, count 0 2006.229.02:05:18.86#ibcon#read 5, iclass 13, count 0 2006.229.02:05:18.86#ibcon#about to read 6, iclass 13, count 0 2006.229.02:05:18.86#ibcon#read 6, iclass 13, count 0 2006.229.02:05:18.86#ibcon#end of sib2, iclass 13, count 0 2006.229.02:05:18.86#ibcon#*after write, iclass 13, count 0 2006.229.02:05:18.86#ibcon#*before return 0, iclass 13, count 0 2006.229.02:05:18.86#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:18.86#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:18.86#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:05:18.86#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:05:18.86$vck44/va=1,8 2006.229.02:05:18.86#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.02:05:18.86#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.02:05:18.86#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:18.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:18.87#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:18.87#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:18.87#ibcon#enter wrdev, iclass 15, count 2 2006.229.02:05:18.87#ibcon#first serial, iclass 15, count 2 2006.229.02:05:18.87#ibcon#enter sib2, iclass 15, count 2 2006.229.02:05:18.87#ibcon#flushed, iclass 15, count 2 2006.229.02:05:18.87#ibcon#about to write, iclass 15, count 2 2006.229.02:05:18.87#ibcon#wrote, iclass 15, count 2 2006.229.02:05:18.87#ibcon#about to read 3, iclass 15, count 2 2006.229.02:05:18.88#ibcon#read 3, iclass 15, count 2 2006.229.02:05:18.88#ibcon#about to read 4, iclass 15, count 2 2006.229.02:05:18.88#ibcon#read 4, iclass 15, count 2 2006.229.02:05:18.88#ibcon#about to read 5, iclass 15, count 2 2006.229.02:05:18.88#ibcon#read 5, iclass 15, count 2 2006.229.02:05:18.88#ibcon#about to read 6, iclass 15, count 2 2006.229.02:05:18.88#ibcon#read 6, iclass 15, count 2 2006.229.02:05:18.88#ibcon#end of sib2, iclass 15, count 2 2006.229.02:05:18.88#ibcon#*mode == 0, iclass 15, count 2 2006.229.02:05:18.88#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.02:05:18.88#ibcon#[25=AT01-08\r\n] 2006.229.02:05:18.88#ibcon#*before write, iclass 15, count 2 2006.229.02:05:18.88#ibcon#enter sib2, iclass 15, count 2 2006.229.02:05:18.88#ibcon#flushed, iclass 15, count 2 2006.229.02:05:18.88#ibcon#about to write, iclass 15, count 2 2006.229.02:05:18.88#ibcon#wrote, iclass 15, count 2 2006.229.02:05:18.88#ibcon#about to read 3, iclass 15, count 2 2006.229.02:05:18.91#ibcon#read 3, iclass 15, count 2 2006.229.02:05:18.91#ibcon#about to read 4, iclass 15, count 2 2006.229.02:05:18.91#ibcon#read 4, iclass 15, count 2 2006.229.02:05:18.91#ibcon#about to read 5, iclass 15, count 2 2006.229.02:05:18.91#ibcon#read 5, iclass 15, count 2 2006.229.02:05:18.91#ibcon#about to read 6, iclass 15, count 2 2006.229.02:05:18.91#ibcon#read 6, iclass 15, count 2 2006.229.02:05:18.91#ibcon#end of sib2, iclass 15, count 2 2006.229.02:05:18.91#ibcon#*after write, iclass 15, count 2 2006.229.02:05:18.91#ibcon#*before return 0, iclass 15, count 2 2006.229.02:05:18.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:18.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:18.91#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.02:05:18.91#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:18.91#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:19.04#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:19.04#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:19.04#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:05:19.04#ibcon#first serial, iclass 15, count 0 2006.229.02:05:19.04#ibcon#enter sib2, iclass 15, count 0 2006.229.02:05:19.04#ibcon#flushed, iclass 15, count 0 2006.229.02:05:19.04#ibcon#about to write, iclass 15, count 0 2006.229.02:05:19.04#ibcon#wrote, iclass 15, count 0 2006.229.02:05:19.04#ibcon#about to read 3, iclass 15, count 0 2006.229.02:05:19.05#ibcon#read 3, iclass 15, count 0 2006.229.02:05:19.05#ibcon#about to read 4, iclass 15, count 0 2006.229.02:05:19.05#ibcon#read 4, iclass 15, count 0 2006.229.02:05:19.05#ibcon#about to read 5, iclass 15, count 0 2006.229.02:05:19.05#ibcon#read 5, iclass 15, count 0 2006.229.02:05:19.05#ibcon#about to read 6, iclass 15, count 0 2006.229.02:05:19.05#ibcon#read 6, iclass 15, count 0 2006.229.02:05:19.05#ibcon#end of sib2, iclass 15, count 0 2006.229.02:05:19.05#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:05:19.05#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:05:19.05#ibcon#[25=USB\r\n] 2006.229.02:05:19.05#ibcon#*before write, iclass 15, count 0 2006.229.02:05:19.05#ibcon#enter sib2, iclass 15, count 0 2006.229.02:05:19.05#ibcon#flushed, iclass 15, count 0 2006.229.02:05:19.05#ibcon#about to write, iclass 15, count 0 2006.229.02:05:19.05#ibcon#wrote, iclass 15, count 0 2006.229.02:05:19.05#ibcon#about to read 3, iclass 15, count 0 2006.229.02:05:19.08#ibcon#read 3, iclass 15, count 0 2006.229.02:05:19.08#ibcon#about to read 4, iclass 15, count 0 2006.229.02:05:19.08#ibcon#read 4, iclass 15, count 0 2006.229.02:05:19.08#ibcon#about to read 5, iclass 15, count 0 2006.229.02:05:19.08#ibcon#read 5, iclass 15, count 0 2006.229.02:05:19.08#ibcon#about to read 6, iclass 15, count 0 2006.229.02:05:19.08#ibcon#read 6, iclass 15, count 0 2006.229.02:05:19.08#ibcon#end of sib2, iclass 15, count 0 2006.229.02:05:19.08#ibcon#*after write, iclass 15, count 0 2006.229.02:05:19.08#ibcon#*before return 0, iclass 15, count 0 2006.229.02:05:19.08#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:19.08#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:19.08#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:05:19.08#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:05:19.08$vck44/valo=2,534.99 2006.229.02:05:19.08#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.02:05:19.08#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.02:05:19.09#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:19.09#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:19.09#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:19.09#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:19.09#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:05:19.09#ibcon#first serial, iclass 17, count 0 2006.229.02:05:19.09#ibcon#enter sib2, iclass 17, count 0 2006.229.02:05:19.09#ibcon#flushed, iclass 17, count 0 2006.229.02:05:19.09#ibcon#about to write, iclass 17, count 0 2006.229.02:05:19.09#ibcon#wrote, iclass 17, count 0 2006.229.02:05:19.09#ibcon#about to read 3, iclass 17, count 0 2006.229.02:05:19.10#ibcon#read 3, iclass 17, count 0 2006.229.02:05:19.10#ibcon#about to read 4, iclass 17, count 0 2006.229.02:05:19.10#ibcon#read 4, iclass 17, count 0 2006.229.02:05:19.10#ibcon#about to read 5, iclass 17, count 0 2006.229.02:05:19.10#ibcon#read 5, iclass 17, count 0 2006.229.02:05:19.10#ibcon#about to read 6, iclass 17, count 0 2006.229.02:05:19.10#ibcon#read 6, iclass 17, count 0 2006.229.02:05:19.10#ibcon#end of sib2, iclass 17, count 0 2006.229.02:05:19.10#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:05:19.10#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:05:19.10#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:05:19.10#ibcon#*before write, iclass 17, count 0 2006.229.02:05:19.10#ibcon#enter sib2, iclass 17, count 0 2006.229.02:05:19.10#ibcon#flushed, iclass 17, count 0 2006.229.02:05:19.10#ibcon#about to write, iclass 17, count 0 2006.229.02:05:19.10#ibcon#wrote, iclass 17, count 0 2006.229.02:05:19.10#ibcon#about to read 3, iclass 17, count 0 2006.229.02:05:19.14#ibcon#read 3, iclass 17, count 0 2006.229.02:05:19.14#ibcon#about to read 4, iclass 17, count 0 2006.229.02:05:19.14#ibcon#read 4, iclass 17, count 0 2006.229.02:05:19.14#ibcon#about to read 5, iclass 17, count 0 2006.229.02:05:19.14#ibcon#read 5, iclass 17, count 0 2006.229.02:05:19.14#ibcon#about to read 6, iclass 17, count 0 2006.229.02:05:19.14#ibcon#read 6, iclass 17, count 0 2006.229.02:05:19.14#ibcon#end of sib2, iclass 17, count 0 2006.229.02:05:19.14#ibcon#*after write, iclass 17, count 0 2006.229.02:05:19.14#ibcon#*before return 0, iclass 17, count 0 2006.229.02:05:19.14#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:19.14#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:19.14#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:05:19.14#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:05:19.15$vck44/va=2,7 2006.229.02:05:19.15#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.02:05:19.15#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.02:05:19.15#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:19.15#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:19.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:19.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:19.19#ibcon#enter wrdev, iclass 19, count 2 2006.229.02:05:19.19#ibcon#first serial, iclass 19, count 2 2006.229.02:05:19.19#ibcon#enter sib2, iclass 19, count 2 2006.229.02:05:19.19#ibcon#flushed, iclass 19, count 2 2006.229.02:05:19.19#ibcon#about to write, iclass 19, count 2 2006.229.02:05:19.19#ibcon#wrote, iclass 19, count 2 2006.229.02:05:19.19#ibcon#about to read 3, iclass 19, count 2 2006.229.02:05:19.22#ibcon#read 3, iclass 19, count 2 2006.229.02:05:19.22#ibcon#about to read 4, iclass 19, count 2 2006.229.02:05:19.22#ibcon#read 4, iclass 19, count 2 2006.229.02:05:19.22#ibcon#about to read 5, iclass 19, count 2 2006.229.02:05:19.22#ibcon#read 5, iclass 19, count 2 2006.229.02:05:19.22#ibcon#about to read 6, iclass 19, count 2 2006.229.02:05:19.22#ibcon#read 6, iclass 19, count 2 2006.229.02:05:19.22#ibcon#end of sib2, iclass 19, count 2 2006.229.02:05:19.22#ibcon#*mode == 0, iclass 19, count 2 2006.229.02:05:19.22#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.02:05:19.22#ibcon#[25=AT02-07\r\n] 2006.229.02:05:19.22#ibcon#*before write, iclass 19, count 2 2006.229.02:05:19.22#ibcon#enter sib2, iclass 19, count 2 2006.229.02:05:19.22#ibcon#flushed, iclass 19, count 2 2006.229.02:05:19.22#ibcon#about to write, iclass 19, count 2 2006.229.02:05:19.22#ibcon#wrote, iclass 19, count 2 2006.229.02:05:19.22#ibcon#about to read 3, iclass 19, count 2 2006.229.02:05:19.26#ibcon#read 3, iclass 19, count 2 2006.229.02:05:19.26#ibcon#about to read 4, iclass 19, count 2 2006.229.02:05:19.26#ibcon#read 4, iclass 19, count 2 2006.229.02:05:19.26#ibcon#about to read 5, iclass 19, count 2 2006.229.02:05:19.26#ibcon#read 5, iclass 19, count 2 2006.229.02:05:19.26#ibcon#about to read 6, iclass 19, count 2 2006.229.02:05:19.26#ibcon#read 6, iclass 19, count 2 2006.229.02:05:19.26#ibcon#end of sib2, iclass 19, count 2 2006.229.02:05:19.26#ibcon#*after write, iclass 19, count 2 2006.229.02:05:19.26#ibcon#*before return 0, iclass 19, count 2 2006.229.02:05:19.26#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:19.26#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:19.26#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.02:05:19.26#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:19.26#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:19.37#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:19.37#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:19.37#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:05:19.37#ibcon#first serial, iclass 19, count 0 2006.229.02:05:19.37#ibcon#enter sib2, iclass 19, count 0 2006.229.02:05:19.37#ibcon#flushed, iclass 19, count 0 2006.229.02:05:19.37#ibcon#about to write, iclass 19, count 0 2006.229.02:05:19.37#ibcon#wrote, iclass 19, count 0 2006.229.02:05:19.37#ibcon#about to read 3, iclass 19, count 0 2006.229.02:05:19.39#ibcon#read 3, iclass 19, count 0 2006.229.02:05:19.39#ibcon#about to read 4, iclass 19, count 0 2006.229.02:05:19.39#ibcon#read 4, iclass 19, count 0 2006.229.02:05:19.39#ibcon#about to read 5, iclass 19, count 0 2006.229.02:05:19.39#ibcon#read 5, iclass 19, count 0 2006.229.02:05:19.39#ibcon#about to read 6, iclass 19, count 0 2006.229.02:05:19.39#ibcon#read 6, iclass 19, count 0 2006.229.02:05:19.39#ibcon#end of sib2, iclass 19, count 0 2006.229.02:05:19.39#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:05:19.39#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:05:19.39#ibcon#[25=USB\r\n] 2006.229.02:05:19.39#ibcon#*before write, iclass 19, count 0 2006.229.02:05:19.39#ibcon#enter sib2, iclass 19, count 0 2006.229.02:05:19.39#ibcon#flushed, iclass 19, count 0 2006.229.02:05:19.39#ibcon#about to write, iclass 19, count 0 2006.229.02:05:19.39#ibcon#wrote, iclass 19, count 0 2006.229.02:05:19.39#ibcon#about to read 3, iclass 19, count 0 2006.229.02:05:19.42#ibcon#read 3, iclass 19, count 0 2006.229.02:05:19.42#ibcon#about to read 4, iclass 19, count 0 2006.229.02:05:19.42#ibcon#read 4, iclass 19, count 0 2006.229.02:05:19.42#ibcon#about to read 5, iclass 19, count 0 2006.229.02:05:19.42#ibcon#read 5, iclass 19, count 0 2006.229.02:05:19.42#ibcon#about to read 6, iclass 19, count 0 2006.229.02:05:19.42#ibcon#read 6, iclass 19, count 0 2006.229.02:05:19.42#ibcon#end of sib2, iclass 19, count 0 2006.229.02:05:19.42#ibcon#*after write, iclass 19, count 0 2006.229.02:05:19.42#ibcon#*before return 0, iclass 19, count 0 2006.229.02:05:19.42#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:19.42#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:19.42#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:05:19.42#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:05:19.42$vck44/valo=3,564.99 2006.229.02:05:19.42#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.02:05:19.42#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.02:05:19.42#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:19.43#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:19.43#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:19.43#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:19.43#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:05:19.43#ibcon#first serial, iclass 21, count 0 2006.229.02:05:19.43#ibcon#enter sib2, iclass 21, count 0 2006.229.02:05:19.43#ibcon#flushed, iclass 21, count 0 2006.229.02:05:19.43#ibcon#about to write, iclass 21, count 0 2006.229.02:05:19.43#ibcon#wrote, iclass 21, count 0 2006.229.02:05:19.43#ibcon#about to read 3, iclass 21, count 0 2006.229.02:05:19.44#ibcon#read 3, iclass 21, count 0 2006.229.02:05:19.44#ibcon#about to read 4, iclass 21, count 0 2006.229.02:05:19.44#ibcon#read 4, iclass 21, count 0 2006.229.02:05:19.44#ibcon#about to read 5, iclass 21, count 0 2006.229.02:05:19.44#ibcon#read 5, iclass 21, count 0 2006.229.02:05:19.44#ibcon#about to read 6, iclass 21, count 0 2006.229.02:05:19.44#ibcon#read 6, iclass 21, count 0 2006.229.02:05:19.44#ibcon#end of sib2, iclass 21, count 0 2006.229.02:05:19.44#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:05:19.44#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:05:19.44#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:05:19.44#ibcon#*before write, iclass 21, count 0 2006.229.02:05:19.44#ibcon#enter sib2, iclass 21, count 0 2006.229.02:05:19.44#ibcon#flushed, iclass 21, count 0 2006.229.02:05:19.44#ibcon#about to write, iclass 21, count 0 2006.229.02:05:19.44#ibcon#wrote, iclass 21, count 0 2006.229.02:05:19.44#ibcon#about to read 3, iclass 21, count 0 2006.229.02:05:19.48#ibcon#read 3, iclass 21, count 0 2006.229.02:05:19.48#ibcon#about to read 4, iclass 21, count 0 2006.229.02:05:19.48#ibcon#read 4, iclass 21, count 0 2006.229.02:05:19.48#ibcon#about to read 5, iclass 21, count 0 2006.229.02:05:19.48#ibcon#read 5, iclass 21, count 0 2006.229.02:05:19.48#ibcon#about to read 6, iclass 21, count 0 2006.229.02:05:19.48#ibcon#read 6, iclass 21, count 0 2006.229.02:05:19.48#ibcon#end of sib2, iclass 21, count 0 2006.229.02:05:19.48#ibcon#*after write, iclass 21, count 0 2006.229.02:05:19.48#ibcon#*before return 0, iclass 21, count 0 2006.229.02:05:19.48#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:19.48#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:19.48#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:05:19.48#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:05:19.48$vck44/va=3,6 2006.229.02:05:19.49#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.02:05:19.49#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.02:05:19.49#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:19.49#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:19.54#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:19.54#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:19.54#ibcon#enter wrdev, iclass 23, count 2 2006.229.02:05:19.54#ibcon#first serial, iclass 23, count 2 2006.229.02:05:19.54#ibcon#enter sib2, iclass 23, count 2 2006.229.02:05:19.54#ibcon#flushed, iclass 23, count 2 2006.229.02:05:19.54#ibcon#about to write, iclass 23, count 2 2006.229.02:05:19.54#ibcon#wrote, iclass 23, count 2 2006.229.02:05:19.54#ibcon#about to read 3, iclass 23, count 2 2006.229.02:05:19.55#ibcon#read 3, iclass 23, count 2 2006.229.02:05:19.55#ibcon#about to read 4, iclass 23, count 2 2006.229.02:05:19.55#ibcon#read 4, iclass 23, count 2 2006.229.02:05:19.55#ibcon#about to read 5, iclass 23, count 2 2006.229.02:05:19.55#ibcon#read 5, iclass 23, count 2 2006.229.02:05:19.55#ibcon#about to read 6, iclass 23, count 2 2006.229.02:05:19.55#ibcon#read 6, iclass 23, count 2 2006.229.02:05:19.55#ibcon#end of sib2, iclass 23, count 2 2006.229.02:05:19.55#ibcon#*mode == 0, iclass 23, count 2 2006.229.02:05:19.55#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.02:05:19.55#ibcon#[25=AT03-06\r\n] 2006.229.02:05:19.55#ibcon#*before write, iclass 23, count 2 2006.229.02:05:19.55#ibcon#enter sib2, iclass 23, count 2 2006.229.02:05:19.55#ibcon#flushed, iclass 23, count 2 2006.229.02:05:19.55#ibcon#about to write, iclass 23, count 2 2006.229.02:05:19.55#ibcon#wrote, iclass 23, count 2 2006.229.02:05:19.55#ibcon#about to read 3, iclass 23, count 2 2006.229.02:05:19.58#ibcon#read 3, iclass 23, count 2 2006.229.02:05:19.58#ibcon#about to read 4, iclass 23, count 2 2006.229.02:05:19.58#ibcon#read 4, iclass 23, count 2 2006.229.02:05:19.58#ibcon#about to read 5, iclass 23, count 2 2006.229.02:05:19.58#ibcon#read 5, iclass 23, count 2 2006.229.02:05:19.58#ibcon#about to read 6, iclass 23, count 2 2006.229.02:05:19.58#ibcon#read 6, iclass 23, count 2 2006.229.02:05:19.58#ibcon#end of sib2, iclass 23, count 2 2006.229.02:05:19.58#ibcon#*after write, iclass 23, count 2 2006.229.02:05:19.58#ibcon#*before return 0, iclass 23, count 2 2006.229.02:05:19.58#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:19.58#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:19.58#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.02:05:19.58#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:19.58#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:19.70#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:19.70#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:19.70#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:05:19.70#ibcon#first serial, iclass 23, count 0 2006.229.02:05:19.70#ibcon#enter sib2, iclass 23, count 0 2006.229.02:05:19.70#ibcon#flushed, iclass 23, count 0 2006.229.02:05:19.70#ibcon#about to write, iclass 23, count 0 2006.229.02:05:19.70#ibcon#wrote, iclass 23, count 0 2006.229.02:05:19.70#ibcon#about to read 3, iclass 23, count 0 2006.229.02:05:19.72#ibcon#read 3, iclass 23, count 0 2006.229.02:05:19.72#ibcon#about to read 4, iclass 23, count 0 2006.229.02:05:19.72#ibcon#read 4, iclass 23, count 0 2006.229.02:05:19.72#ibcon#about to read 5, iclass 23, count 0 2006.229.02:05:19.72#ibcon#read 5, iclass 23, count 0 2006.229.02:05:19.72#ibcon#about to read 6, iclass 23, count 0 2006.229.02:05:19.72#ibcon#read 6, iclass 23, count 0 2006.229.02:05:19.72#ibcon#end of sib2, iclass 23, count 0 2006.229.02:05:19.72#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:05:19.72#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:05:19.72#ibcon#[25=USB\r\n] 2006.229.02:05:19.72#ibcon#*before write, iclass 23, count 0 2006.229.02:05:19.72#ibcon#enter sib2, iclass 23, count 0 2006.229.02:05:19.72#ibcon#flushed, iclass 23, count 0 2006.229.02:05:19.72#ibcon#about to write, iclass 23, count 0 2006.229.02:05:19.72#ibcon#wrote, iclass 23, count 0 2006.229.02:05:19.72#ibcon#about to read 3, iclass 23, count 0 2006.229.02:05:19.75#ibcon#read 3, iclass 23, count 0 2006.229.02:05:19.75#ibcon#about to read 4, iclass 23, count 0 2006.229.02:05:19.75#ibcon#read 4, iclass 23, count 0 2006.229.02:05:19.75#ibcon#about to read 5, iclass 23, count 0 2006.229.02:05:19.75#ibcon#read 5, iclass 23, count 0 2006.229.02:05:19.75#ibcon#about to read 6, iclass 23, count 0 2006.229.02:05:19.75#ibcon#read 6, iclass 23, count 0 2006.229.02:05:19.75#ibcon#end of sib2, iclass 23, count 0 2006.229.02:05:19.75#ibcon#*after write, iclass 23, count 0 2006.229.02:05:19.75#ibcon#*before return 0, iclass 23, count 0 2006.229.02:05:19.75#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:19.75#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:19.75#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:05:19.75#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:05:19.75$vck44/valo=4,624.99 2006.229.02:05:19.75#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.02:05:19.75#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.02:05:19.75#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:19.76#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:19.76#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:19.76#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:19.76#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:05:19.76#ibcon#first serial, iclass 25, count 0 2006.229.02:05:19.76#ibcon#enter sib2, iclass 25, count 0 2006.229.02:05:19.76#ibcon#flushed, iclass 25, count 0 2006.229.02:05:19.76#ibcon#about to write, iclass 25, count 0 2006.229.02:05:19.76#ibcon#wrote, iclass 25, count 0 2006.229.02:05:19.76#ibcon#about to read 3, iclass 25, count 0 2006.229.02:05:19.77#ibcon#read 3, iclass 25, count 0 2006.229.02:05:19.77#ibcon#about to read 4, iclass 25, count 0 2006.229.02:05:19.77#ibcon#read 4, iclass 25, count 0 2006.229.02:05:19.77#ibcon#about to read 5, iclass 25, count 0 2006.229.02:05:19.77#ibcon#read 5, iclass 25, count 0 2006.229.02:05:19.77#ibcon#about to read 6, iclass 25, count 0 2006.229.02:05:19.77#ibcon#read 6, iclass 25, count 0 2006.229.02:05:19.77#ibcon#end of sib2, iclass 25, count 0 2006.229.02:05:19.77#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:05:19.77#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:05:19.77#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:05:19.77#ibcon#*before write, iclass 25, count 0 2006.229.02:05:19.77#ibcon#enter sib2, iclass 25, count 0 2006.229.02:05:19.77#ibcon#flushed, iclass 25, count 0 2006.229.02:05:19.77#ibcon#about to write, iclass 25, count 0 2006.229.02:05:19.77#ibcon#wrote, iclass 25, count 0 2006.229.02:05:19.77#ibcon#about to read 3, iclass 25, count 0 2006.229.02:05:19.81#ibcon#read 3, iclass 25, count 0 2006.229.02:05:19.81#ibcon#about to read 4, iclass 25, count 0 2006.229.02:05:19.81#ibcon#read 4, iclass 25, count 0 2006.229.02:05:19.81#ibcon#about to read 5, iclass 25, count 0 2006.229.02:05:19.81#ibcon#read 5, iclass 25, count 0 2006.229.02:05:19.81#ibcon#about to read 6, iclass 25, count 0 2006.229.02:05:19.81#ibcon#read 6, iclass 25, count 0 2006.229.02:05:19.81#ibcon#end of sib2, iclass 25, count 0 2006.229.02:05:19.81#ibcon#*after write, iclass 25, count 0 2006.229.02:05:19.81#ibcon#*before return 0, iclass 25, count 0 2006.229.02:05:19.81#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:19.81#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:19.81#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:05:19.81#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:05:19.81$vck44/va=4,7 2006.229.02:05:19.82#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.02:05:19.82#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.02:05:19.82#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:19.82#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:19.86#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:19.86#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:19.86#ibcon#enter wrdev, iclass 27, count 2 2006.229.02:05:19.86#ibcon#first serial, iclass 27, count 2 2006.229.02:05:19.86#ibcon#enter sib2, iclass 27, count 2 2006.229.02:05:19.86#ibcon#flushed, iclass 27, count 2 2006.229.02:05:19.86#ibcon#about to write, iclass 27, count 2 2006.229.02:05:19.86#ibcon#wrote, iclass 27, count 2 2006.229.02:05:19.86#ibcon#about to read 3, iclass 27, count 2 2006.229.02:05:19.88#ibcon#read 3, iclass 27, count 2 2006.229.02:05:19.88#ibcon#about to read 4, iclass 27, count 2 2006.229.02:05:19.88#ibcon#read 4, iclass 27, count 2 2006.229.02:05:19.88#ibcon#about to read 5, iclass 27, count 2 2006.229.02:05:19.88#ibcon#read 5, iclass 27, count 2 2006.229.02:05:19.88#ibcon#about to read 6, iclass 27, count 2 2006.229.02:05:19.88#ibcon#read 6, iclass 27, count 2 2006.229.02:05:19.88#ibcon#end of sib2, iclass 27, count 2 2006.229.02:05:19.88#ibcon#*mode == 0, iclass 27, count 2 2006.229.02:05:19.88#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.02:05:19.88#ibcon#[25=AT04-07\r\n] 2006.229.02:05:19.88#ibcon#*before write, iclass 27, count 2 2006.229.02:05:19.88#ibcon#enter sib2, iclass 27, count 2 2006.229.02:05:19.88#ibcon#flushed, iclass 27, count 2 2006.229.02:05:19.88#ibcon#about to write, iclass 27, count 2 2006.229.02:05:19.88#ibcon#wrote, iclass 27, count 2 2006.229.02:05:19.88#ibcon#about to read 3, iclass 27, count 2 2006.229.02:05:19.91#ibcon#read 3, iclass 27, count 2 2006.229.02:05:19.91#ibcon#about to read 4, iclass 27, count 2 2006.229.02:05:19.91#ibcon#read 4, iclass 27, count 2 2006.229.02:05:19.91#ibcon#about to read 5, iclass 27, count 2 2006.229.02:05:19.91#ibcon#read 5, iclass 27, count 2 2006.229.02:05:19.91#ibcon#about to read 6, iclass 27, count 2 2006.229.02:05:19.91#ibcon#read 6, iclass 27, count 2 2006.229.02:05:19.91#ibcon#end of sib2, iclass 27, count 2 2006.229.02:05:19.91#ibcon#*after write, iclass 27, count 2 2006.229.02:05:19.91#ibcon#*before return 0, iclass 27, count 2 2006.229.02:05:19.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:19.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:19.91#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.02:05:19.91#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:19.91#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:20.03#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:20.03#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:20.03#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:05:20.03#ibcon#first serial, iclass 27, count 0 2006.229.02:05:20.03#ibcon#enter sib2, iclass 27, count 0 2006.229.02:05:20.03#ibcon#flushed, iclass 27, count 0 2006.229.02:05:20.03#ibcon#about to write, iclass 27, count 0 2006.229.02:05:20.03#ibcon#wrote, iclass 27, count 0 2006.229.02:05:20.03#ibcon#about to read 3, iclass 27, count 0 2006.229.02:05:20.05#ibcon#read 3, iclass 27, count 0 2006.229.02:05:20.05#ibcon#about to read 4, iclass 27, count 0 2006.229.02:05:20.05#ibcon#read 4, iclass 27, count 0 2006.229.02:05:20.05#ibcon#about to read 5, iclass 27, count 0 2006.229.02:05:20.05#ibcon#read 5, iclass 27, count 0 2006.229.02:05:20.05#ibcon#about to read 6, iclass 27, count 0 2006.229.02:05:20.05#ibcon#read 6, iclass 27, count 0 2006.229.02:05:20.05#ibcon#end of sib2, iclass 27, count 0 2006.229.02:05:20.05#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:05:20.05#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:05:20.05#ibcon#[25=USB\r\n] 2006.229.02:05:20.05#ibcon#*before write, iclass 27, count 0 2006.229.02:05:20.05#ibcon#enter sib2, iclass 27, count 0 2006.229.02:05:20.05#ibcon#flushed, iclass 27, count 0 2006.229.02:05:20.05#ibcon#about to write, iclass 27, count 0 2006.229.02:05:20.05#ibcon#wrote, iclass 27, count 0 2006.229.02:05:20.05#ibcon#about to read 3, iclass 27, count 0 2006.229.02:05:20.08#ibcon#read 3, iclass 27, count 0 2006.229.02:05:20.08#ibcon#about to read 4, iclass 27, count 0 2006.229.02:05:20.08#ibcon#read 4, iclass 27, count 0 2006.229.02:05:20.08#ibcon#about to read 5, iclass 27, count 0 2006.229.02:05:20.08#ibcon#read 5, iclass 27, count 0 2006.229.02:05:20.08#ibcon#about to read 6, iclass 27, count 0 2006.229.02:05:20.08#ibcon#read 6, iclass 27, count 0 2006.229.02:05:20.08#ibcon#end of sib2, iclass 27, count 0 2006.229.02:05:20.08#ibcon#*after write, iclass 27, count 0 2006.229.02:05:20.08#ibcon#*before return 0, iclass 27, count 0 2006.229.02:05:20.08#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:20.08#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:20.08#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:05:20.08#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:05:20.08$vck44/valo=5,734.99 2006.229.02:05:20.08#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.02:05:20.08#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.02:05:20.08#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:20.08#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:05:20.09#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:05:20.09#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:05:20.09#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:05:20.09#ibcon#first serial, iclass 29, count 0 2006.229.02:05:20.09#ibcon#enter sib2, iclass 29, count 0 2006.229.02:05:20.09#ibcon#flushed, iclass 29, count 0 2006.229.02:05:20.09#ibcon#about to write, iclass 29, count 0 2006.229.02:05:20.09#ibcon#wrote, iclass 29, count 0 2006.229.02:05:20.09#ibcon#about to read 3, iclass 29, count 0 2006.229.02:05:20.10#ibcon#read 3, iclass 29, count 0 2006.229.02:05:20.10#ibcon#about to read 4, iclass 29, count 0 2006.229.02:05:20.10#ibcon#read 4, iclass 29, count 0 2006.229.02:05:20.10#ibcon#about to read 5, iclass 29, count 0 2006.229.02:05:20.10#ibcon#read 5, iclass 29, count 0 2006.229.02:05:20.10#ibcon#about to read 6, iclass 29, count 0 2006.229.02:05:20.10#ibcon#read 6, iclass 29, count 0 2006.229.02:05:20.10#ibcon#end of sib2, iclass 29, count 0 2006.229.02:05:20.10#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:05:20.10#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:05:20.10#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:05:20.10#ibcon#*before write, iclass 29, count 0 2006.229.02:05:20.10#ibcon#enter sib2, iclass 29, count 0 2006.229.02:05:20.10#ibcon#flushed, iclass 29, count 0 2006.229.02:05:20.10#ibcon#about to write, iclass 29, count 0 2006.229.02:05:20.10#ibcon#wrote, iclass 29, count 0 2006.229.02:05:20.10#ibcon#about to read 3, iclass 29, count 0 2006.229.02:05:20.14#ibcon#read 3, iclass 29, count 0 2006.229.02:05:20.14#ibcon#about to read 4, iclass 29, count 0 2006.229.02:05:20.14#ibcon#read 4, iclass 29, count 0 2006.229.02:05:20.14#ibcon#about to read 5, iclass 29, count 0 2006.229.02:05:20.14#ibcon#read 5, iclass 29, count 0 2006.229.02:05:20.14#ibcon#about to read 6, iclass 29, count 0 2006.229.02:05:20.14#ibcon#read 6, iclass 29, count 0 2006.229.02:05:20.14#ibcon#end of sib2, iclass 29, count 0 2006.229.02:05:20.14#ibcon#*after write, iclass 29, count 0 2006.229.02:05:20.14#ibcon#*before return 0, iclass 29, count 0 2006.229.02:05:20.14#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:05:20.14#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:05:20.14#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:05:20.14#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:05:20.14$vck44/va=5,4 2006.229.02:05:20.14#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.02:05:20.14#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.02:05:20.14#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:20.15#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:05:20.20#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:05:20.20#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:05:20.20#ibcon#enter wrdev, iclass 31, count 2 2006.229.02:05:20.20#ibcon#first serial, iclass 31, count 2 2006.229.02:05:20.20#ibcon#enter sib2, iclass 31, count 2 2006.229.02:05:20.20#ibcon#flushed, iclass 31, count 2 2006.229.02:05:20.20#ibcon#about to write, iclass 31, count 2 2006.229.02:05:20.20#ibcon#wrote, iclass 31, count 2 2006.229.02:05:20.20#ibcon#about to read 3, iclass 31, count 2 2006.229.02:05:20.22#ibcon#read 3, iclass 31, count 2 2006.229.02:05:20.22#ibcon#about to read 4, iclass 31, count 2 2006.229.02:05:20.22#ibcon#read 4, iclass 31, count 2 2006.229.02:05:20.22#ibcon#about to read 5, iclass 31, count 2 2006.229.02:05:20.22#ibcon#read 5, iclass 31, count 2 2006.229.02:05:20.22#ibcon#about to read 6, iclass 31, count 2 2006.229.02:05:20.22#ibcon#read 6, iclass 31, count 2 2006.229.02:05:20.22#ibcon#end of sib2, iclass 31, count 2 2006.229.02:05:20.22#ibcon#*mode == 0, iclass 31, count 2 2006.229.02:05:20.22#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.02:05:20.22#ibcon#[25=AT05-04\r\n] 2006.229.02:05:20.22#ibcon#*before write, iclass 31, count 2 2006.229.02:05:20.22#ibcon#enter sib2, iclass 31, count 2 2006.229.02:05:20.22#ibcon#flushed, iclass 31, count 2 2006.229.02:05:20.22#ibcon#about to write, iclass 31, count 2 2006.229.02:05:20.22#ibcon#wrote, iclass 31, count 2 2006.229.02:05:20.22#ibcon#about to read 3, iclass 31, count 2 2006.229.02:05:20.26#ibcon#read 3, iclass 31, count 2 2006.229.02:05:20.26#ibcon#about to read 4, iclass 31, count 2 2006.229.02:05:20.26#ibcon#read 4, iclass 31, count 2 2006.229.02:05:20.26#ibcon#about to read 5, iclass 31, count 2 2006.229.02:05:20.26#ibcon#read 5, iclass 31, count 2 2006.229.02:05:20.26#ibcon#about to read 6, iclass 31, count 2 2006.229.02:05:20.26#ibcon#read 6, iclass 31, count 2 2006.229.02:05:20.26#ibcon#end of sib2, iclass 31, count 2 2006.229.02:05:20.26#ibcon#*after write, iclass 31, count 2 2006.229.02:05:20.26#ibcon#*before return 0, iclass 31, count 2 2006.229.02:05:20.26#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:05:20.26#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:05:20.26#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.02:05:20.26#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:20.26#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:05:20.38#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:05:20.38#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:05:20.38#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:05:20.38#ibcon#first serial, iclass 31, count 0 2006.229.02:05:20.38#ibcon#enter sib2, iclass 31, count 0 2006.229.02:05:20.38#ibcon#flushed, iclass 31, count 0 2006.229.02:05:20.38#ibcon#about to write, iclass 31, count 0 2006.229.02:05:20.38#ibcon#wrote, iclass 31, count 0 2006.229.02:05:20.38#ibcon#about to read 3, iclass 31, count 0 2006.229.02:05:20.39#ibcon#read 3, iclass 31, count 0 2006.229.02:05:20.39#ibcon#about to read 4, iclass 31, count 0 2006.229.02:05:20.39#ibcon#read 4, iclass 31, count 0 2006.229.02:05:20.39#ibcon#about to read 5, iclass 31, count 0 2006.229.02:05:20.39#ibcon#read 5, iclass 31, count 0 2006.229.02:05:20.39#ibcon#about to read 6, iclass 31, count 0 2006.229.02:05:20.39#ibcon#read 6, iclass 31, count 0 2006.229.02:05:20.39#ibcon#end of sib2, iclass 31, count 0 2006.229.02:05:20.39#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:05:20.39#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:05:20.39#ibcon#[25=USB\r\n] 2006.229.02:05:20.39#ibcon#*before write, iclass 31, count 0 2006.229.02:05:20.39#ibcon#enter sib2, iclass 31, count 0 2006.229.02:05:20.39#ibcon#flushed, iclass 31, count 0 2006.229.02:05:20.39#ibcon#about to write, iclass 31, count 0 2006.229.02:05:20.39#ibcon#wrote, iclass 31, count 0 2006.229.02:05:20.39#ibcon#about to read 3, iclass 31, count 0 2006.229.02:05:20.42#ibcon#read 3, iclass 31, count 0 2006.229.02:05:20.42#ibcon#about to read 4, iclass 31, count 0 2006.229.02:05:20.42#ibcon#read 4, iclass 31, count 0 2006.229.02:05:20.42#ibcon#about to read 5, iclass 31, count 0 2006.229.02:05:20.42#ibcon#read 5, iclass 31, count 0 2006.229.02:05:20.42#ibcon#about to read 6, iclass 31, count 0 2006.229.02:05:20.42#ibcon#read 6, iclass 31, count 0 2006.229.02:05:20.42#ibcon#end of sib2, iclass 31, count 0 2006.229.02:05:20.42#ibcon#*after write, iclass 31, count 0 2006.229.02:05:20.42#ibcon#*before return 0, iclass 31, count 0 2006.229.02:05:20.42#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:05:20.42#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:05:20.42#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:05:20.42#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:05:20.42$vck44/valo=6,814.99 2006.229.02:05:20.42#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.02:05:20.42#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.02:05:20.42#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:20.43#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:05:20.43#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:05:20.43#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:05:20.43#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:05:20.43#ibcon#first serial, iclass 33, count 0 2006.229.02:05:20.43#ibcon#enter sib2, iclass 33, count 0 2006.229.02:05:20.43#ibcon#flushed, iclass 33, count 0 2006.229.02:05:20.43#ibcon#about to write, iclass 33, count 0 2006.229.02:05:20.43#ibcon#wrote, iclass 33, count 0 2006.229.02:05:20.43#ibcon#about to read 3, iclass 33, count 0 2006.229.02:05:20.44#ibcon#read 3, iclass 33, count 0 2006.229.02:05:20.44#ibcon#about to read 4, iclass 33, count 0 2006.229.02:05:20.44#ibcon#read 4, iclass 33, count 0 2006.229.02:05:20.44#ibcon#about to read 5, iclass 33, count 0 2006.229.02:05:20.44#ibcon#read 5, iclass 33, count 0 2006.229.02:05:20.44#ibcon#about to read 6, iclass 33, count 0 2006.229.02:05:20.44#ibcon#read 6, iclass 33, count 0 2006.229.02:05:20.44#ibcon#end of sib2, iclass 33, count 0 2006.229.02:05:20.44#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:05:20.44#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:05:20.44#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:05:20.44#ibcon#*before write, iclass 33, count 0 2006.229.02:05:20.44#ibcon#enter sib2, iclass 33, count 0 2006.229.02:05:20.44#ibcon#flushed, iclass 33, count 0 2006.229.02:05:20.44#ibcon#about to write, iclass 33, count 0 2006.229.02:05:20.44#ibcon#wrote, iclass 33, count 0 2006.229.02:05:20.44#ibcon#about to read 3, iclass 33, count 0 2006.229.02:05:20.48#ibcon#read 3, iclass 33, count 0 2006.229.02:05:20.48#ibcon#about to read 4, iclass 33, count 0 2006.229.02:05:20.48#ibcon#read 4, iclass 33, count 0 2006.229.02:05:20.48#ibcon#about to read 5, iclass 33, count 0 2006.229.02:05:20.48#ibcon#read 5, iclass 33, count 0 2006.229.02:05:20.48#ibcon#about to read 6, iclass 33, count 0 2006.229.02:05:20.48#ibcon#read 6, iclass 33, count 0 2006.229.02:05:20.48#ibcon#end of sib2, iclass 33, count 0 2006.229.02:05:20.48#ibcon#*after write, iclass 33, count 0 2006.229.02:05:20.48#ibcon#*before return 0, iclass 33, count 0 2006.229.02:05:20.48#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:05:20.48#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:05:20.48#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:05:20.48#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:05:20.48$vck44/va=6,4 2006.229.02:05:20.48#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.02:05:20.48#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.02:05:20.48#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:20.48#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:20.54#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:20.54#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:20.54#ibcon#enter wrdev, iclass 35, count 2 2006.229.02:05:20.54#ibcon#first serial, iclass 35, count 2 2006.229.02:05:20.54#ibcon#enter sib2, iclass 35, count 2 2006.229.02:05:20.54#ibcon#flushed, iclass 35, count 2 2006.229.02:05:20.54#ibcon#about to write, iclass 35, count 2 2006.229.02:05:20.54#ibcon#wrote, iclass 35, count 2 2006.229.02:05:20.54#ibcon#about to read 3, iclass 35, count 2 2006.229.02:05:20.56#ibcon#read 3, iclass 35, count 2 2006.229.02:05:20.56#ibcon#about to read 4, iclass 35, count 2 2006.229.02:05:20.56#ibcon#read 4, iclass 35, count 2 2006.229.02:05:20.56#ibcon#about to read 5, iclass 35, count 2 2006.229.02:05:20.56#ibcon#read 5, iclass 35, count 2 2006.229.02:05:20.56#ibcon#about to read 6, iclass 35, count 2 2006.229.02:05:20.56#ibcon#read 6, iclass 35, count 2 2006.229.02:05:20.56#ibcon#end of sib2, iclass 35, count 2 2006.229.02:05:20.56#ibcon#*mode == 0, iclass 35, count 2 2006.229.02:05:20.56#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.02:05:20.56#ibcon#[25=AT06-04\r\n] 2006.229.02:05:20.56#ibcon#*before write, iclass 35, count 2 2006.229.02:05:20.56#ibcon#enter sib2, iclass 35, count 2 2006.229.02:05:20.56#ibcon#flushed, iclass 35, count 2 2006.229.02:05:20.56#ibcon#about to write, iclass 35, count 2 2006.229.02:05:20.56#ibcon#wrote, iclass 35, count 2 2006.229.02:05:20.56#ibcon#about to read 3, iclass 35, count 2 2006.229.02:05:20.59#ibcon#read 3, iclass 35, count 2 2006.229.02:05:20.59#ibcon#about to read 4, iclass 35, count 2 2006.229.02:05:20.59#ibcon#read 4, iclass 35, count 2 2006.229.02:05:20.59#ibcon#about to read 5, iclass 35, count 2 2006.229.02:05:20.59#ibcon#read 5, iclass 35, count 2 2006.229.02:05:20.59#ibcon#about to read 6, iclass 35, count 2 2006.229.02:05:20.59#ibcon#read 6, iclass 35, count 2 2006.229.02:05:20.59#ibcon#end of sib2, iclass 35, count 2 2006.229.02:05:20.59#ibcon#*after write, iclass 35, count 2 2006.229.02:05:20.59#ibcon#*before return 0, iclass 35, count 2 2006.229.02:05:20.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:20.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:20.59#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.02:05:20.59#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:20.59#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:20.71#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:20.71#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:20.71#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:05:20.71#ibcon#first serial, iclass 35, count 0 2006.229.02:05:20.71#ibcon#enter sib2, iclass 35, count 0 2006.229.02:05:20.71#ibcon#flushed, iclass 35, count 0 2006.229.02:05:20.71#ibcon#about to write, iclass 35, count 0 2006.229.02:05:20.71#ibcon#wrote, iclass 35, count 0 2006.229.02:05:20.71#ibcon#about to read 3, iclass 35, count 0 2006.229.02:05:20.73#ibcon#read 3, iclass 35, count 0 2006.229.02:05:20.73#ibcon#about to read 4, iclass 35, count 0 2006.229.02:05:20.73#ibcon#read 4, iclass 35, count 0 2006.229.02:05:20.73#ibcon#about to read 5, iclass 35, count 0 2006.229.02:05:20.73#ibcon#read 5, iclass 35, count 0 2006.229.02:05:20.73#ibcon#about to read 6, iclass 35, count 0 2006.229.02:05:20.73#ibcon#read 6, iclass 35, count 0 2006.229.02:05:20.73#ibcon#end of sib2, iclass 35, count 0 2006.229.02:05:20.73#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:05:20.73#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:05:20.73#ibcon#[25=USB\r\n] 2006.229.02:05:20.73#ibcon#*before write, iclass 35, count 0 2006.229.02:05:20.73#ibcon#enter sib2, iclass 35, count 0 2006.229.02:05:20.73#ibcon#flushed, iclass 35, count 0 2006.229.02:05:20.73#ibcon#about to write, iclass 35, count 0 2006.229.02:05:20.73#ibcon#wrote, iclass 35, count 0 2006.229.02:05:20.73#ibcon#about to read 3, iclass 35, count 0 2006.229.02:05:20.76#ibcon#read 3, iclass 35, count 0 2006.229.02:05:20.76#ibcon#about to read 4, iclass 35, count 0 2006.229.02:05:20.76#ibcon#read 4, iclass 35, count 0 2006.229.02:05:20.76#ibcon#about to read 5, iclass 35, count 0 2006.229.02:05:20.76#ibcon#read 5, iclass 35, count 0 2006.229.02:05:20.76#ibcon#about to read 6, iclass 35, count 0 2006.229.02:05:20.76#ibcon#read 6, iclass 35, count 0 2006.229.02:05:20.76#ibcon#end of sib2, iclass 35, count 0 2006.229.02:05:20.76#ibcon#*after write, iclass 35, count 0 2006.229.02:05:20.76#ibcon#*before return 0, iclass 35, count 0 2006.229.02:05:20.76#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:20.76#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:20.76#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:05:20.76#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:05:20.76$vck44/valo=7,864.99 2006.229.02:05:20.76#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.02:05:20.76#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.02:05:20.76#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:20.77#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:20.77#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:20.77#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:20.77#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:05:20.77#ibcon#first serial, iclass 37, count 0 2006.229.02:05:20.77#ibcon#enter sib2, iclass 37, count 0 2006.229.02:05:20.77#ibcon#flushed, iclass 37, count 0 2006.229.02:05:20.77#ibcon#about to write, iclass 37, count 0 2006.229.02:05:20.77#ibcon#wrote, iclass 37, count 0 2006.229.02:05:20.77#ibcon#about to read 3, iclass 37, count 0 2006.229.02:05:20.78#ibcon#read 3, iclass 37, count 0 2006.229.02:05:20.78#ibcon#about to read 4, iclass 37, count 0 2006.229.02:05:20.78#ibcon#read 4, iclass 37, count 0 2006.229.02:05:20.78#ibcon#about to read 5, iclass 37, count 0 2006.229.02:05:20.78#ibcon#read 5, iclass 37, count 0 2006.229.02:05:20.78#ibcon#about to read 6, iclass 37, count 0 2006.229.02:05:20.78#ibcon#read 6, iclass 37, count 0 2006.229.02:05:20.78#ibcon#end of sib2, iclass 37, count 0 2006.229.02:05:20.78#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:05:20.78#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:05:20.78#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:05:20.78#ibcon#*before write, iclass 37, count 0 2006.229.02:05:20.78#ibcon#enter sib2, iclass 37, count 0 2006.229.02:05:20.78#ibcon#flushed, iclass 37, count 0 2006.229.02:05:20.78#ibcon#about to write, iclass 37, count 0 2006.229.02:05:20.78#ibcon#wrote, iclass 37, count 0 2006.229.02:05:20.78#ibcon#about to read 3, iclass 37, count 0 2006.229.02:05:20.82#ibcon#read 3, iclass 37, count 0 2006.229.02:05:20.82#ibcon#about to read 4, iclass 37, count 0 2006.229.02:05:20.82#ibcon#read 4, iclass 37, count 0 2006.229.02:05:20.82#ibcon#about to read 5, iclass 37, count 0 2006.229.02:05:20.82#ibcon#read 5, iclass 37, count 0 2006.229.02:05:20.82#ibcon#about to read 6, iclass 37, count 0 2006.229.02:05:20.82#ibcon#read 6, iclass 37, count 0 2006.229.02:05:20.82#ibcon#end of sib2, iclass 37, count 0 2006.229.02:05:20.82#ibcon#*after write, iclass 37, count 0 2006.229.02:05:20.82#ibcon#*before return 0, iclass 37, count 0 2006.229.02:05:20.82#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:20.82#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:20.82#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:05:20.82#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:05:20.82$vck44/va=7,5 2006.229.02:05:20.83#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.02:05:20.83#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.02:05:20.83#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:20.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:20.88#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:20.88#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:20.88#ibcon#enter wrdev, iclass 39, count 2 2006.229.02:05:20.88#ibcon#first serial, iclass 39, count 2 2006.229.02:05:20.88#ibcon#enter sib2, iclass 39, count 2 2006.229.02:05:20.88#ibcon#flushed, iclass 39, count 2 2006.229.02:05:20.88#ibcon#about to write, iclass 39, count 2 2006.229.02:05:20.88#ibcon#wrote, iclass 39, count 2 2006.229.02:05:20.88#ibcon#about to read 3, iclass 39, count 2 2006.229.02:05:20.89#ibcon#read 3, iclass 39, count 2 2006.229.02:05:20.89#ibcon#about to read 4, iclass 39, count 2 2006.229.02:05:20.89#ibcon#read 4, iclass 39, count 2 2006.229.02:05:20.89#ibcon#about to read 5, iclass 39, count 2 2006.229.02:05:20.89#ibcon#read 5, iclass 39, count 2 2006.229.02:05:20.89#ibcon#about to read 6, iclass 39, count 2 2006.229.02:05:20.89#ibcon#read 6, iclass 39, count 2 2006.229.02:05:20.89#ibcon#end of sib2, iclass 39, count 2 2006.229.02:05:20.89#ibcon#*mode == 0, iclass 39, count 2 2006.229.02:05:20.89#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.02:05:20.89#ibcon#[25=AT07-05\r\n] 2006.229.02:05:20.89#ibcon#*before write, iclass 39, count 2 2006.229.02:05:20.89#ibcon#enter sib2, iclass 39, count 2 2006.229.02:05:20.89#ibcon#flushed, iclass 39, count 2 2006.229.02:05:20.89#ibcon#about to write, iclass 39, count 2 2006.229.02:05:20.89#ibcon#wrote, iclass 39, count 2 2006.229.02:05:20.89#ibcon#about to read 3, iclass 39, count 2 2006.229.02:05:20.92#ibcon#read 3, iclass 39, count 2 2006.229.02:05:20.92#ibcon#about to read 4, iclass 39, count 2 2006.229.02:05:20.92#ibcon#read 4, iclass 39, count 2 2006.229.02:05:20.92#ibcon#about to read 5, iclass 39, count 2 2006.229.02:05:20.92#ibcon#read 5, iclass 39, count 2 2006.229.02:05:20.92#ibcon#about to read 6, iclass 39, count 2 2006.229.02:05:20.92#ibcon#read 6, iclass 39, count 2 2006.229.02:05:20.92#ibcon#end of sib2, iclass 39, count 2 2006.229.02:05:20.92#ibcon#*after write, iclass 39, count 2 2006.229.02:05:20.92#ibcon#*before return 0, iclass 39, count 2 2006.229.02:05:20.92#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:20.92#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:20.92#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.02:05:20.92#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:20.92#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:21.04#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:21.04#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:21.04#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:05:21.04#ibcon#first serial, iclass 39, count 0 2006.229.02:05:21.04#ibcon#enter sib2, iclass 39, count 0 2006.229.02:05:21.04#ibcon#flushed, iclass 39, count 0 2006.229.02:05:21.04#ibcon#about to write, iclass 39, count 0 2006.229.02:05:21.04#ibcon#wrote, iclass 39, count 0 2006.229.02:05:21.04#ibcon#about to read 3, iclass 39, count 0 2006.229.02:05:21.08#ibcon#read 3, iclass 39, count 0 2006.229.02:05:21.08#ibcon#about to read 4, iclass 39, count 0 2006.229.02:05:21.08#ibcon#read 4, iclass 39, count 0 2006.229.02:05:21.08#ibcon#about to read 5, iclass 39, count 0 2006.229.02:05:21.08#ibcon#read 5, iclass 39, count 0 2006.229.02:05:21.08#ibcon#about to read 6, iclass 39, count 0 2006.229.02:05:21.08#ibcon#read 6, iclass 39, count 0 2006.229.02:05:21.08#ibcon#end of sib2, iclass 39, count 0 2006.229.02:05:21.08#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:05:21.08#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:05:21.08#ibcon#[25=USB\r\n] 2006.229.02:05:21.08#ibcon#*before write, iclass 39, count 0 2006.229.02:05:21.08#ibcon#enter sib2, iclass 39, count 0 2006.229.02:05:21.08#ibcon#flushed, iclass 39, count 0 2006.229.02:05:21.08#ibcon#about to write, iclass 39, count 0 2006.229.02:05:21.08#ibcon#wrote, iclass 39, count 0 2006.229.02:05:21.08#ibcon#about to read 3, iclass 39, count 0 2006.229.02:05:21.11#ibcon#read 3, iclass 39, count 0 2006.229.02:05:21.11#ibcon#about to read 4, iclass 39, count 0 2006.229.02:05:21.11#ibcon#read 4, iclass 39, count 0 2006.229.02:05:21.11#ibcon#about to read 5, iclass 39, count 0 2006.229.02:05:21.11#ibcon#read 5, iclass 39, count 0 2006.229.02:05:21.11#ibcon#about to read 6, iclass 39, count 0 2006.229.02:05:21.11#ibcon#read 6, iclass 39, count 0 2006.229.02:05:21.11#ibcon#end of sib2, iclass 39, count 0 2006.229.02:05:21.11#ibcon#*after write, iclass 39, count 0 2006.229.02:05:21.11#ibcon#*before return 0, iclass 39, count 0 2006.229.02:05:21.11#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:21.11#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:21.11#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:05:21.11#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:05:21.11$vck44/valo=8,884.99 2006.229.02:05:21.12#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.02:05:21.12#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.02:05:21.12#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:21.12#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:21.12#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:21.12#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:21.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:05:21.12#ibcon#first serial, iclass 3, count 0 2006.229.02:05:21.12#ibcon#enter sib2, iclass 3, count 0 2006.229.02:05:21.12#ibcon#flushed, iclass 3, count 0 2006.229.02:05:21.12#ibcon#about to write, iclass 3, count 0 2006.229.02:05:21.12#ibcon#wrote, iclass 3, count 0 2006.229.02:05:21.12#ibcon#about to read 3, iclass 3, count 0 2006.229.02:05:21.13#ibcon#read 3, iclass 3, count 0 2006.229.02:05:21.13#ibcon#about to read 4, iclass 3, count 0 2006.229.02:05:21.13#ibcon#read 4, iclass 3, count 0 2006.229.02:05:21.13#ibcon#about to read 5, iclass 3, count 0 2006.229.02:05:21.13#ibcon#read 5, iclass 3, count 0 2006.229.02:05:21.13#ibcon#about to read 6, iclass 3, count 0 2006.229.02:05:21.13#ibcon#read 6, iclass 3, count 0 2006.229.02:05:21.13#ibcon#end of sib2, iclass 3, count 0 2006.229.02:05:21.13#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:05:21.13#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:05:21.13#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:05:21.13#ibcon#*before write, iclass 3, count 0 2006.229.02:05:21.13#ibcon#enter sib2, iclass 3, count 0 2006.229.02:05:21.13#ibcon#flushed, iclass 3, count 0 2006.229.02:05:21.13#ibcon#about to write, iclass 3, count 0 2006.229.02:05:21.13#ibcon#wrote, iclass 3, count 0 2006.229.02:05:21.13#ibcon#about to read 3, iclass 3, count 0 2006.229.02:05:21.17#ibcon#read 3, iclass 3, count 0 2006.229.02:05:21.17#ibcon#about to read 4, iclass 3, count 0 2006.229.02:05:21.17#ibcon#read 4, iclass 3, count 0 2006.229.02:05:21.17#ibcon#about to read 5, iclass 3, count 0 2006.229.02:05:21.17#ibcon#read 5, iclass 3, count 0 2006.229.02:05:21.17#ibcon#about to read 6, iclass 3, count 0 2006.229.02:05:21.17#ibcon#read 6, iclass 3, count 0 2006.229.02:05:21.17#ibcon#end of sib2, iclass 3, count 0 2006.229.02:05:21.17#ibcon#*after write, iclass 3, count 0 2006.229.02:05:21.17#ibcon#*before return 0, iclass 3, count 0 2006.229.02:05:21.17#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:21.17#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:21.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:05:21.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:05:21.17$vck44/va=8,6 2006.229.02:05:21.17#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.02:05:21.17#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.02:05:21.17#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:21.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:21.23#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:21.23#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:21.23#ibcon#enter wrdev, iclass 5, count 2 2006.229.02:05:21.23#ibcon#first serial, iclass 5, count 2 2006.229.02:05:21.23#ibcon#enter sib2, iclass 5, count 2 2006.229.02:05:21.23#ibcon#flushed, iclass 5, count 2 2006.229.02:05:21.23#ibcon#about to write, iclass 5, count 2 2006.229.02:05:21.23#ibcon#wrote, iclass 5, count 2 2006.229.02:05:21.23#ibcon#about to read 3, iclass 5, count 2 2006.229.02:05:21.25#ibcon#read 3, iclass 5, count 2 2006.229.02:05:21.25#ibcon#about to read 4, iclass 5, count 2 2006.229.02:05:21.25#ibcon#read 4, iclass 5, count 2 2006.229.02:05:21.25#ibcon#about to read 5, iclass 5, count 2 2006.229.02:05:21.25#ibcon#read 5, iclass 5, count 2 2006.229.02:05:21.25#ibcon#about to read 6, iclass 5, count 2 2006.229.02:05:21.25#ibcon#read 6, iclass 5, count 2 2006.229.02:05:21.25#ibcon#end of sib2, iclass 5, count 2 2006.229.02:05:21.25#ibcon#*mode == 0, iclass 5, count 2 2006.229.02:05:21.25#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.02:05:21.25#ibcon#[25=AT08-06\r\n] 2006.229.02:05:21.25#ibcon#*before write, iclass 5, count 2 2006.229.02:05:21.25#ibcon#enter sib2, iclass 5, count 2 2006.229.02:05:21.25#ibcon#flushed, iclass 5, count 2 2006.229.02:05:21.25#ibcon#about to write, iclass 5, count 2 2006.229.02:05:21.25#ibcon#wrote, iclass 5, count 2 2006.229.02:05:21.25#ibcon#about to read 3, iclass 5, count 2 2006.229.02:05:21.28#ibcon#read 3, iclass 5, count 2 2006.229.02:05:21.28#ibcon#about to read 4, iclass 5, count 2 2006.229.02:05:21.28#ibcon#read 4, iclass 5, count 2 2006.229.02:05:21.28#ibcon#about to read 5, iclass 5, count 2 2006.229.02:05:21.28#ibcon#read 5, iclass 5, count 2 2006.229.02:05:21.28#ibcon#about to read 6, iclass 5, count 2 2006.229.02:05:21.28#ibcon#read 6, iclass 5, count 2 2006.229.02:05:21.28#ibcon#end of sib2, iclass 5, count 2 2006.229.02:05:21.28#ibcon#*after write, iclass 5, count 2 2006.229.02:05:21.28#ibcon#*before return 0, iclass 5, count 2 2006.229.02:05:21.28#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:21.28#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:21.28#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.02:05:21.28#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:21.28#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:21.40#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:21.40#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:21.40#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:05:21.40#ibcon#first serial, iclass 5, count 0 2006.229.02:05:21.40#ibcon#enter sib2, iclass 5, count 0 2006.229.02:05:21.40#ibcon#flushed, iclass 5, count 0 2006.229.02:05:21.40#ibcon#about to write, iclass 5, count 0 2006.229.02:05:21.40#ibcon#wrote, iclass 5, count 0 2006.229.02:05:21.40#ibcon#about to read 3, iclass 5, count 0 2006.229.02:05:21.42#ibcon#read 3, iclass 5, count 0 2006.229.02:05:21.42#ibcon#about to read 4, iclass 5, count 0 2006.229.02:05:21.42#ibcon#read 4, iclass 5, count 0 2006.229.02:05:21.42#ibcon#about to read 5, iclass 5, count 0 2006.229.02:05:21.42#ibcon#read 5, iclass 5, count 0 2006.229.02:05:21.42#ibcon#about to read 6, iclass 5, count 0 2006.229.02:05:21.42#ibcon#read 6, iclass 5, count 0 2006.229.02:05:21.42#ibcon#end of sib2, iclass 5, count 0 2006.229.02:05:21.42#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:05:21.42#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:05:21.42#ibcon#[25=USB\r\n] 2006.229.02:05:21.42#ibcon#*before write, iclass 5, count 0 2006.229.02:05:21.42#ibcon#enter sib2, iclass 5, count 0 2006.229.02:05:21.42#ibcon#flushed, iclass 5, count 0 2006.229.02:05:21.42#ibcon#about to write, iclass 5, count 0 2006.229.02:05:21.42#ibcon#wrote, iclass 5, count 0 2006.229.02:05:21.42#ibcon#about to read 3, iclass 5, count 0 2006.229.02:05:21.45#ibcon#read 3, iclass 5, count 0 2006.229.02:05:21.45#ibcon#about to read 4, iclass 5, count 0 2006.229.02:05:21.45#ibcon#read 4, iclass 5, count 0 2006.229.02:05:21.45#ibcon#about to read 5, iclass 5, count 0 2006.229.02:05:21.45#ibcon#read 5, iclass 5, count 0 2006.229.02:05:21.45#ibcon#about to read 6, iclass 5, count 0 2006.229.02:05:21.45#ibcon#read 6, iclass 5, count 0 2006.229.02:05:21.45#ibcon#end of sib2, iclass 5, count 0 2006.229.02:05:21.45#ibcon#*after write, iclass 5, count 0 2006.229.02:05:21.45#ibcon#*before return 0, iclass 5, count 0 2006.229.02:05:21.45#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:21.45#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:21.45#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:05:21.45#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:05:21.45$vck44/vblo=1,629.99 2006.229.02:05:21.45#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.02:05:21.45#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.02:05:21.45#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:21.46#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:21.46#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:21.46#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:21.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:05:21.46#ibcon#first serial, iclass 7, count 0 2006.229.02:05:21.46#ibcon#enter sib2, iclass 7, count 0 2006.229.02:05:21.46#ibcon#flushed, iclass 7, count 0 2006.229.02:05:21.46#ibcon#about to write, iclass 7, count 0 2006.229.02:05:21.46#ibcon#wrote, iclass 7, count 0 2006.229.02:05:21.46#ibcon#about to read 3, iclass 7, count 0 2006.229.02:05:21.47#ibcon#read 3, iclass 7, count 0 2006.229.02:05:21.47#ibcon#about to read 4, iclass 7, count 0 2006.229.02:05:21.47#ibcon#read 4, iclass 7, count 0 2006.229.02:05:21.47#ibcon#about to read 5, iclass 7, count 0 2006.229.02:05:21.47#ibcon#read 5, iclass 7, count 0 2006.229.02:05:21.47#ibcon#about to read 6, iclass 7, count 0 2006.229.02:05:21.47#ibcon#read 6, iclass 7, count 0 2006.229.02:05:21.47#ibcon#end of sib2, iclass 7, count 0 2006.229.02:05:21.47#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:05:21.47#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:05:21.47#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:05:21.47#ibcon#*before write, iclass 7, count 0 2006.229.02:05:21.47#ibcon#enter sib2, iclass 7, count 0 2006.229.02:05:21.47#ibcon#flushed, iclass 7, count 0 2006.229.02:05:21.47#ibcon#about to write, iclass 7, count 0 2006.229.02:05:21.47#ibcon#wrote, iclass 7, count 0 2006.229.02:05:21.47#ibcon#about to read 3, iclass 7, count 0 2006.229.02:05:21.51#ibcon#read 3, iclass 7, count 0 2006.229.02:05:21.51#ibcon#about to read 4, iclass 7, count 0 2006.229.02:05:21.51#ibcon#read 4, iclass 7, count 0 2006.229.02:05:21.51#ibcon#about to read 5, iclass 7, count 0 2006.229.02:05:21.51#ibcon#read 5, iclass 7, count 0 2006.229.02:05:21.51#ibcon#about to read 6, iclass 7, count 0 2006.229.02:05:21.51#ibcon#read 6, iclass 7, count 0 2006.229.02:05:21.51#ibcon#end of sib2, iclass 7, count 0 2006.229.02:05:21.51#ibcon#*after write, iclass 7, count 0 2006.229.02:05:21.51#ibcon#*before return 0, iclass 7, count 0 2006.229.02:05:21.51#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:21.51#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:21.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:05:21.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:05:21.51$vck44/vb=1,4 2006.229.02:05:21.51#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.02:05:21.51#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.02:05:21.51#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:21.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:05:21.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:05:21.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:05:21.51#ibcon#enter wrdev, iclass 11, count 2 2006.229.02:05:21.52#ibcon#first serial, iclass 11, count 2 2006.229.02:05:21.52#ibcon#enter sib2, iclass 11, count 2 2006.229.02:05:21.52#ibcon#flushed, iclass 11, count 2 2006.229.02:05:21.52#ibcon#about to write, iclass 11, count 2 2006.229.02:05:21.52#ibcon#wrote, iclass 11, count 2 2006.229.02:05:21.52#ibcon#about to read 3, iclass 11, count 2 2006.229.02:05:21.53#ibcon#read 3, iclass 11, count 2 2006.229.02:05:21.53#ibcon#about to read 4, iclass 11, count 2 2006.229.02:05:21.53#ibcon#read 4, iclass 11, count 2 2006.229.02:05:21.53#ibcon#about to read 5, iclass 11, count 2 2006.229.02:05:21.53#ibcon#read 5, iclass 11, count 2 2006.229.02:05:21.53#ibcon#about to read 6, iclass 11, count 2 2006.229.02:05:21.53#ibcon#read 6, iclass 11, count 2 2006.229.02:05:21.53#ibcon#end of sib2, iclass 11, count 2 2006.229.02:05:21.53#ibcon#*mode == 0, iclass 11, count 2 2006.229.02:05:21.53#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.02:05:21.53#ibcon#[27=AT01-04\r\n] 2006.229.02:05:21.53#ibcon#*before write, iclass 11, count 2 2006.229.02:05:21.53#ibcon#enter sib2, iclass 11, count 2 2006.229.02:05:21.53#ibcon#flushed, iclass 11, count 2 2006.229.02:05:21.53#ibcon#about to write, iclass 11, count 2 2006.229.02:05:21.53#ibcon#wrote, iclass 11, count 2 2006.229.02:05:21.53#ibcon#about to read 3, iclass 11, count 2 2006.229.02:05:21.56#ibcon#read 3, iclass 11, count 2 2006.229.02:05:21.56#ibcon#about to read 4, iclass 11, count 2 2006.229.02:05:21.56#ibcon#read 4, iclass 11, count 2 2006.229.02:05:21.56#ibcon#about to read 5, iclass 11, count 2 2006.229.02:05:21.56#ibcon#read 5, iclass 11, count 2 2006.229.02:05:21.56#ibcon#about to read 6, iclass 11, count 2 2006.229.02:05:21.56#ibcon#read 6, iclass 11, count 2 2006.229.02:05:21.56#ibcon#end of sib2, iclass 11, count 2 2006.229.02:05:21.56#ibcon#*after write, iclass 11, count 2 2006.229.02:05:21.56#ibcon#*before return 0, iclass 11, count 2 2006.229.02:05:21.56#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:05:21.56#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:05:21.56#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.02:05:21.56#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:21.56#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:05:21.68#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:05:21.68#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:05:21.68#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:05:21.68#ibcon#first serial, iclass 11, count 0 2006.229.02:05:21.68#ibcon#enter sib2, iclass 11, count 0 2006.229.02:05:21.68#ibcon#flushed, iclass 11, count 0 2006.229.02:05:21.68#ibcon#about to write, iclass 11, count 0 2006.229.02:05:21.68#ibcon#wrote, iclass 11, count 0 2006.229.02:05:21.68#ibcon#about to read 3, iclass 11, count 0 2006.229.02:05:21.70#ibcon#read 3, iclass 11, count 0 2006.229.02:05:21.70#ibcon#about to read 4, iclass 11, count 0 2006.229.02:05:21.70#ibcon#read 4, iclass 11, count 0 2006.229.02:05:21.70#ibcon#about to read 5, iclass 11, count 0 2006.229.02:05:21.70#ibcon#read 5, iclass 11, count 0 2006.229.02:05:21.70#ibcon#about to read 6, iclass 11, count 0 2006.229.02:05:21.70#ibcon#read 6, iclass 11, count 0 2006.229.02:05:21.70#ibcon#end of sib2, iclass 11, count 0 2006.229.02:05:21.70#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:05:21.70#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:05:21.70#ibcon#[27=USB\r\n] 2006.229.02:05:21.70#ibcon#*before write, iclass 11, count 0 2006.229.02:05:21.70#ibcon#enter sib2, iclass 11, count 0 2006.229.02:05:21.70#ibcon#flushed, iclass 11, count 0 2006.229.02:05:21.70#ibcon#about to write, iclass 11, count 0 2006.229.02:05:21.70#ibcon#wrote, iclass 11, count 0 2006.229.02:05:21.70#ibcon#about to read 3, iclass 11, count 0 2006.229.02:05:21.73#ibcon#read 3, iclass 11, count 0 2006.229.02:05:21.73#ibcon#about to read 4, iclass 11, count 0 2006.229.02:05:21.73#ibcon#read 4, iclass 11, count 0 2006.229.02:05:21.73#ibcon#about to read 5, iclass 11, count 0 2006.229.02:05:21.73#ibcon#read 5, iclass 11, count 0 2006.229.02:05:21.73#ibcon#about to read 6, iclass 11, count 0 2006.229.02:05:21.73#ibcon#read 6, iclass 11, count 0 2006.229.02:05:21.73#ibcon#end of sib2, iclass 11, count 0 2006.229.02:05:21.73#ibcon#*after write, iclass 11, count 0 2006.229.02:05:21.73#ibcon#*before return 0, iclass 11, count 0 2006.229.02:05:21.73#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:05:21.73#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:05:21.73#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:05:21.73#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:05:21.73$vck44/vblo=2,634.99 2006.229.02:05:21.74#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.02:05:21.74#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.02:05:21.74#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:21.74#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:21.74#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:21.74#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:21.74#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:05:21.74#ibcon#first serial, iclass 13, count 0 2006.229.02:05:21.74#ibcon#enter sib2, iclass 13, count 0 2006.229.02:05:21.74#ibcon#flushed, iclass 13, count 0 2006.229.02:05:21.74#ibcon#about to write, iclass 13, count 0 2006.229.02:05:21.74#ibcon#wrote, iclass 13, count 0 2006.229.02:05:21.74#ibcon#about to read 3, iclass 13, count 0 2006.229.02:05:21.75#ibcon#read 3, iclass 13, count 0 2006.229.02:05:21.75#ibcon#about to read 4, iclass 13, count 0 2006.229.02:05:21.75#ibcon#read 4, iclass 13, count 0 2006.229.02:05:21.75#ibcon#about to read 5, iclass 13, count 0 2006.229.02:05:21.75#ibcon#read 5, iclass 13, count 0 2006.229.02:05:21.75#ibcon#about to read 6, iclass 13, count 0 2006.229.02:05:21.75#ibcon#read 6, iclass 13, count 0 2006.229.02:05:21.75#ibcon#end of sib2, iclass 13, count 0 2006.229.02:05:21.75#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:05:21.75#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:05:21.75#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:05:21.75#ibcon#*before write, iclass 13, count 0 2006.229.02:05:21.75#ibcon#enter sib2, iclass 13, count 0 2006.229.02:05:21.75#ibcon#flushed, iclass 13, count 0 2006.229.02:05:21.75#ibcon#about to write, iclass 13, count 0 2006.229.02:05:21.75#ibcon#wrote, iclass 13, count 0 2006.229.02:05:21.75#ibcon#about to read 3, iclass 13, count 0 2006.229.02:05:21.80#ibcon#read 3, iclass 13, count 0 2006.229.02:05:21.80#ibcon#about to read 4, iclass 13, count 0 2006.229.02:05:21.80#ibcon#read 4, iclass 13, count 0 2006.229.02:05:21.80#ibcon#about to read 5, iclass 13, count 0 2006.229.02:05:21.80#ibcon#read 5, iclass 13, count 0 2006.229.02:05:21.80#ibcon#about to read 6, iclass 13, count 0 2006.229.02:05:21.80#ibcon#read 6, iclass 13, count 0 2006.229.02:05:21.80#ibcon#end of sib2, iclass 13, count 0 2006.229.02:05:21.80#ibcon#*after write, iclass 13, count 0 2006.229.02:05:21.80#ibcon#*before return 0, iclass 13, count 0 2006.229.02:05:21.80#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:21.80#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:05:21.80#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:05:21.80#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:05:21.80$vck44/vb=2,4 2006.229.02:05:21.80#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.02:05:21.80#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.02:05:21.80#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:21.80#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:21.84#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:21.84#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:21.84#ibcon#enter wrdev, iclass 15, count 2 2006.229.02:05:21.84#ibcon#first serial, iclass 15, count 2 2006.229.02:05:21.84#ibcon#enter sib2, iclass 15, count 2 2006.229.02:05:21.84#ibcon#flushed, iclass 15, count 2 2006.229.02:05:21.84#ibcon#about to write, iclass 15, count 2 2006.229.02:05:21.84#ibcon#wrote, iclass 15, count 2 2006.229.02:05:21.84#ibcon#about to read 3, iclass 15, count 2 2006.229.02:05:21.86#ibcon#read 3, iclass 15, count 2 2006.229.02:05:21.86#ibcon#about to read 4, iclass 15, count 2 2006.229.02:05:21.86#ibcon#read 4, iclass 15, count 2 2006.229.02:05:21.86#ibcon#about to read 5, iclass 15, count 2 2006.229.02:05:21.86#ibcon#read 5, iclass 15, count 2 2006.229.02:05:21.86#ibcon#about to read 6, iclass 15, count 2 2006.229.02:05:21.86#ibcon#read 6, iclass 15, count 2 2006.229.02:05:21.86#ibcon#end of sib2, iclass 15, count 2 2006.229.02:05:21.86#ibcon#*mode == 0, iclass 15, count 2 2006.229.02:05:21.86#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.02:05:21.86#ibcon#[27=AT02-04\r\n] 2006.229.02:05:21.86#ibcon#*before write, iclass 15, count 2 2006.229.02:05:21.86#ibcon#enter sib2, iclass 15, count 2 2006.229.02:05:21.86#ibcon#flushed, iclass 15, count 2 2006.229.02:05:21.86#ibcon#about to write, iclass 15, count 2 2006.229.02:05:21.86#ibcon#wrote, iclass 15, count 2 2006.229.02:05:21.86#ibcon#about to read 3, iclass 15, count 2 2006.229.02:05:21.89#ibcon#read 3, iclass 15, count 2 2006.229.02:05:21.89#ibcon#about to read 4, iclass 15, count 2 2006.229.02:05:21.89#ibcon#read 4, iclass 15, count 2 2006.229.02:05:21.89#ibcon#about to read 5, iclass 15, count 2 2006.229.02:05:21.89#ibcon#read 5, iclass 15, count 2 2006.229.02:05:21.89#ibcon#about to read 6, iclass 15, count 2 2006.229.02:05:21.89#ibcon#read 6, iclass 15, count 2 2006.229.02:05:21.89#ibcon#end of sib2, iclass 15, count 2 2006.229.02:05:21.89#ibcon#*after write, iclass 15, count 2 2006.229.02:05:21.89#ibcon#*before return 0, iclass 15, count 2 2006.229.02:05:21.89#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:21.89#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:05:21.89#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.02:05:21.89#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:21.89#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:22.01#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:22.01#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:22.01#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:05:22.01#ibcon#first serial, iclass 15, count 0 2006.229.02:05:22.01#ibcon#enter sib2, iclass 15, count 0 2006.229.02:05:22.01#ibcon#flushed, iclass 15, count 0 2006.229.02:05:22.01#ibcon#about to write, iclass 15, count 0 2006.229.02:05:22.01#ibcon#wrote, iclass 15, count 0 2006.229.02:05:22.02#ibcon#about to read 3, iclass 15, count 0 2006.229.02:05:22.03#ibcon#read 3, iclass 15, count 0 2006.229.02:05:22.03#ibcon#about to read 4, iclass 15, count 0 2006.229.02:05:22.03#ibcon#read 4, iclass 15, count 0 2006.229.02:05:22.03#ibcon#about to read 5, iclass 15, count 0 2006.229.02:05:22.03#ibcon#read 5, iclass 15, count 0 2006.229.02:05:22.03#ibcon#about to read 6, iclass 15, count 0 2006.229.02:05:22.03#ibcon#read 6, iclass 15, count 0 2006.229.02:05:22.03#ibcon#end of sib2, iclass 15, count 0 2006.229.02:05:22.03#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:05:22.03#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:05:22.03#ibcon#[27=USB\r\n] 2006.229.02:05:22.03#ibcon#*before write, iclass 15, count 0 2006.229.02:05:22.03#ibcon#enter sib2, iclass 15, count 0 2006.229.02:05:22.03#ibcon#flushed, iclass 15, count 0 2006.229.02:05:22.03#ibcon#about to write, iclass 15, count 0 2006.229.02:05:22.03#ibcon#wrote, iclass 15, count 0 2006.229.02:05:22.03#ibcon#about to read 3, iclass 15, count 0 2006.229.02:05:22.06#ibcon#read 3, iclass 15, count 0 2006.229.02:05:22.06#ibcon#about to read 4, iclass 15, count 0 2006.229.02:05:22.06#ibcon#read 4, iclass 15, count 0 2006.229.02:05:22.06#ibcon#about to read 5, iclass 15, count 0 2006.229.02:05:22.06#ibcon#read 5, iclass 15, count 0 2006.229.02:05:22.06#ibcon#about to read 6, iclass 15, count 0 2006.229.02:05:22.06#ibcon#read 6, iclass 15, count 0 2006.229.02:05:22.06#ibcon#end of sib2, iclass 15, count 0 2006.229.02:05:22.06#ibcon#*after write, iclass 15, count 0 2006.229.02:05:22.06#ibcon#*before return 0, iclass 15, count 0 2006.229.02:05:22.06#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:22.06#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:05:22.06#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:05:22.06#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:05:22.06$vck44/vblo=3,649.99 2006.229.02:05:22.06#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.02:05:22.06#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.02:05:22.06#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:22.07#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:22.07#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:22.07#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:22.07#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:05:22.07#ibcon#first serial, iclass 17, count 0 2006.229.02:05:22.07#ibcon#enter sib2, iclass 17, count 0 2006.229.02:05:22.07#ibcon#flushed, iclass 17, count 0 2006.229.02:05:22.07#ibcon#about to write, iclass 17, count 0 2006.229.02:05:22.07#ibcon#wrote, iclass 17, count 0 2006.229.02:05:22.07#ibcon#about to read 3, iclass 17, count 0 2006.229.02:05:22.08#ibcon#read 3, iclass 17, count 0 2006.229.02:05:22.08#ibcon#about to read 4, iclass 17, count 0 2006.229.02:05:22.08#ibcon#read 4, iclass 17, count 0 2006.229.02:05:22.08#ibcon#about to read 5, iclass 17, count 0 2006.229.02:05:22.08#ibcon#read 5, iclass 17, count 0 2006.229.02:05:22.08#ibcon#about to read 6, iclass 17, count 0 2006.229.02:05:22.08#ibcon#read 6, iclass 17, count 0 2006.229.02:05:22.08#ibcon#end of sib2, iclass 17, count 0 2006.229.02:05:22.08#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:05:22.08#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:05:22.08#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:05:22.08#ibcon#*before write, iclass 17, count 0 2006.229.02:05:22.08#ibcon#enter sib2, iclass 17, count 0 2006.229.02:05:22.08#ibcon#flushed, iclass 17, count 0 2006.229.02:05:22.08#ibcon#about to write, iclass 17, count 0 2006.229.02:05:22.08#ibcon#wrote, iclass 17, count 0 2006.229.02:05:22.08#ibcon#about to read 3, iclass 17, count 0 2006.229.02:05:22.12#ibcon#read 3, iclass 17, count 0 2006.229.02:05:22.12#ibcon#about to read 4, iclass 17, count 0 2006.229.02:05:22.12#ibcon#read 4, iclass 17, count 0 2006.229.02:05:22.12#ibcon#about to read 5, iclass 17, count 0 2006.229.02:05:22.12#ibcon#read 5, iclass 17, count 0 2006.229.02:05:22.12#ibcon#about to read 6, iclass 17, count 0 2006.229.02:05:22.12#ibcon#read 6, iclass 17, count 0 2006.229.02:05:22.12#ibcon#end of sib2, iclass 17, count 0 2006.229.02:05:22.12#ibcon#*after write, iclass 17, count 0 2006.229.02:05:22.12#ibcon#*before return 0, iclass 17, count 0 2006.229.02:05:22.12#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:22.12#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:05:22.12#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:05:22.12#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:05:22.12$vck44/vb=3,4 2006.229.02:05:22.12#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.02:05:22.12#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.02:05:22.12#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:22.12#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:22.18#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:22.18#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:22.18#ibcon#enter wrdev, iclass 19, count 2 2006.229.02:05:22.18#ibcon#first serial, iclass 19, count 2 2006.229.02:05:22.18#ibcon#enter sib2, iclass 19, count 2 2006.229.02:05:22.18#ibcon#flushed, iclass 19, count 2 2006.229.02:05:22.18#ibcon#about to write, iclass 19, count 2 2006.229.02:05:22.18#ibcon#wrote, iclass 19, count 2 2006.229.02:05:22.18#ibcon#about to read 3, iclass 19, count 2 2006.229.02:05:22.20#ibcon#read 3, iclass 19, count 2 2006.229.02:05:22.20#ibcon#about to read 4, iclass 19, count 2 2006.229.02:05:22.20#ibcon#read 4, iclass 19, count 2 2006.229.02:05:22.20#ibcon#about to read 5, iclass 19, count 2 2006.229.02:05:22.20#ibcon#read 5, iclass 19, count 2 2006.229.02:05:22.20#ibcon#about to read 6, iclass 19, count 2 2006.229.02:05:22.20#ibcon#read 6, iclass 19, count 2 2006.229.02:05:22.20#ibcon#end of sib2, iclass 19, count 2 2006.229.02:05:22.20#ibcon#*mode == 0, iclass 19, count 2 2006.229.02:05:22.20#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.02:05:22.20#ibcon#[27=AT03-04\r\n] 2006.229.02:05:22.20#ibcon#*before write, iclass 19, count 2 2006.229.02:05:22.20#ibcon#enter sib2, iclass 19, count 2 2006.229.02:05:22.20#ibcon#flushed, iclass 19, count 2 2006.229.02:05:22.20#ibcon#about to write, iclass 19, count 2 2006.229.02:05:22.20#ibcon#wrote, iclass 19, count 2 2006.229.02:05:22.20#ibcon#about to read 3, iclass 19, count 2 2006.229.02:05:22.23#ibcon#read 3, iclass 19, count 2 2006.229.02:05:22.23#ibcon#about to read 4, iclass 19, count 2 2006.229.02:05:22.23#ibcon#read 4, iclass 19, count 2 2006.229.02:05:22.23#ibcon#about to read 5, iclass 19, count 2 2006.229.02:05:22.23#ibcon#read 5, iclass 19, count 2 2006.229.02:05:22.23#ibcon#about to read 6, iclass 19, count 2 2006.229.02:05:22.23#ibcon#read 6, iclass 19, count 2 2006.229.02:05:22.23#ibcon#end of sib2, iclass 19, count 2 2006.229.02:05:22.23#ibcon#*after write, iclass 19, count 2 2006.229.02:05:22.23#ibcon#*before return 0, iclass 19, count 2 2006.229.02:05:22.23#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:22.23#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:05:22.23#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.02:05:22.23#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:22.23#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:22.35#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:22.35#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:22.35#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:05:22.35#ibcon#first serial, iclass 19, count 0 2006.229.02:05:22.35#ibcon#enter sib2, iclass 19, count 0 2006.229.02:05:22.35#ibcon#flushed, iclass 19, count 0 2006.229.02:05:22.35#ibcon#about to write, iclass 19, count 0 2006.229.02:05:22.35#ibcon#wrote, iclass 19, count 0 2006.229.02:05:22.35#ibcon#about to read 3, iclass 19, count 0 2006.229.02:05:22.37#ibcon#read 3, iclass 19, count 0 2006.229.02:05:22.37#ibcon#about to read 4, iclass 19, count 0 2006.229.02:05:22.37#ibcon#read 4, iclass 19, count 0 2006.229.02:05:22.37#ibcon#about to read 5, iclass 19, count 0 2006.229.02:05:22.37#ibcon#read 5, iclass 19, count 0 2006.229.02:05:22.37#ibcon#about to read 6, iclass 19, count 0 2006.229.02:05:22.37#ibcon#read 6, iclass 19, count 0 2006.229.02:05:22.37#ibcon#end of sib2, iclass 19, count 0 2006.229.02:05:22.37#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:05:22.37#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:05:22.37#ibcon#[27=USB\r\n] 2006.229.02:05:22.37#ibcon#*before write, iclass 19, count 0 2006.229.02:05:22.37#ibcon#enter sib2, iclass 19, count 0 2006.229.02:05:22.37#ibcon#flushed, iclass 19, count 0 2006.229.02:05:22.37#ibcon#about to write, iclass 19, count 0 2006.229.02:05:22.37#ibcon#wrote, iclass 19, count 0 2006.229.02:05:22.37#ibcon#about to read 3, iclass 19, count 0 2006.229.02:05:22.40#ibcon#read 3, iclass 19, count 0 2006.229.02:05:22.40#ibcon#about to read 4, iclass 19, count 0 2006.229.02:05:22.40#ibcon#read 4, iclass 19, count 0 2006.229.02:05:22.40#ibcon#about to read 5, iclass 19, count 0 2006.229.02:05:22.40#ibcon#read 5, iclass 19, count 0 2006.229.02:05:22.40#ibcon#about to read 6, iclass 19, count 0 2006.229.02:05:22.40#ibcon#read 6, iclass 19, count 0 2006.229.02:05:22.40#ibcon#end of sib2, iclass 19, count 0 2006.229.02:05:22.40#ibcon#*after write, iclass 19, count 0 2006.229.02:05:22.40#ibcon#*before return 0, iclass 19, count 0 2006.229.02:05:22.40#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:22.40#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:05:22.40#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:05:22.40#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:05:22.40$vck44/vblo=4,679.99 2006.229.02:05:22.40#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.02:05:22.40#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.02:05:22.40#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:22.41#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:22.41#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:22.41#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:22.41#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:05:22.41#ibcon#first serial, iclass 21, count 0 2006.229.02:05:22.41#ibcon#enter sib2, iclass 21, count 0 2006.229.02:05:22.41#ibcon#flushed, iclass 21, count 0 2006.229.02:05:22.41#ibcon#about to write, iclass 21, count 0 2006.229.02:05:22.41#ibcon#wrote, iclass 21, count 0 2006.229.02:05:22.41#ibcon#about to read 3, iclass 21, count 0 2006.229.02:05:22.42#ibcon#read 3, iclass 21, count 0 2006.229.02:05:22.42#ibcon#about to read 4, iclass 21, count 0 2006.229.02:05:22.42#ibcon#read 4, iclass 21, count 0 2006.229.02:05:22.42#ibcon#about to read 5, iclass 21, count 0 2006.229.02:05:22.42#ibcon#read 5, iclass 21, count 0 2006.229.02:05:22.42#ibcon#about to read 6, iclass 21, count 0 2006.229.02:05:22.42#ibcon#read 6, iclass 21, count 0 2006.229.02:05:22.42#ibcon#end of sib2, iclass 21, count 0 2006.229.02:05:22.42#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:05:22.42#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:05:22.42#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:05:22.42#ibcon#*before write, iclass 21, count 0 2006.229.02:05:22.42#ibcon#enter sib2, iclass 21, count 0 2006.229.02:05:22.42#ibcon#flushed, iclass 21, count 0 2006.229.02:05:22.42#ibcon#about to write, iclass 21, count 0 2006.229.02:05:22.42#ibcon#wrote, iclass 21, count 0 2006.229.02:05:22.42#ibcon#about to read 3, iclass 21, count 0 2006.229.02:05:22.46#ibcon#read 3, iclass 21, count 0 2006.229.02:05:22.46#ibcon#about to read 4, iclass 21, count 0 2006.229.02:05:22.46#ibcon#read 4, iclass 21, count 0 2006.229.02:05:22.46#ibcon#about to read 5, iclass 21, count 0 2006.229.02:05:22.46#ibcon#read 5, iclass 21, count 0 2006.229.02:05:22.46#ibcon#about to read 6, iclass 21, count 0 2006.229.02:05:22.46#ibcon#read 6, iclass 21, count 0 2006.229.02:05:22.46#ibcon#end of sib2, iclass 21, count 0 2006.229.02:05:22.46#ibcon#*after write, iclass 21, count 0 2006.229.02:05:22.46#ibcon#*before return 0, iclass 21, count 0 2006.229.02:05:22.46#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:22.46#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:05:22.46#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:05:22.46#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:05:22.46$vck44/vb=4,4 2006.229.02:05:22.47#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.02:05:22.47#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.02:05:22.47#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:22.47#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:22.52#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:22.52#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:22.52#ibcon#enter wrdev, iclass 23, count 2 2006.229.02:05:22.52#ibcon#first serial, iclass 23, count 2 2006.229.02:05:22.52#ibcon#enter sib2, iclass 23, count 2 2006.229.02:05:22.52#ibcon#flushed, iclass 23, count 2 2006.229.02:05:22.52#ibcon#about to write, iclass 23, count 2 2006.229.02:05:22.52#ibcon#wrote, iclass 23, count 2 2006.229.02:05:22.52#ibcon#about to read 3, iclass 23, count 2 2006.229.02:05:22.53#ibcon#read 3, iclass 23, count 2 2006.229.02:05:22.53#ibcon#about to read 4, iclass 23, count 2 2006.229.02:05:22.53#ibcon#read 4, iclass 23, count 2 2006.229.02:05:22.53#ibcon#about to read 5, iclass 23, count 2 2006.229.02:05:22.53#ibcon#read 5, iclass 23, count 2 2006.229.02:05:22.53#ibcon#about to read 6, iclass 23, count 2 2006.229.02:05:22.53#ibcon#read 6, iclass 23, count 2 2006.229.02:05:22.53#ibcon#end of sib2, iclass 23, count 2 2006.229.02:05:22.53#ibcon#*mode == 0, iclass 23, count 2 2006.229.02:05:22.53#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.02:05:22.53#ibcon#[27=AT04-04\r\n] 2006.229.02:05:22.53#ibcon#*before write, iclass 23, count 2 2006.229.02:05:22.53#ibcon#enter sib2, iclass 23, count 2 2006.229.02:05:22.53#ibcon#flushed, iclass 23, count 2 2006.229.02:05:22.53#ibcon#about to write, iclass 23, count 2 2006.229.02:05:22.53#ibcon#wrote, iclass 23, count 2 2006.229.02:05:22.53#ibcon#about to read 3, iclass 23, count 2 2006.229.02:05:22.56#ibcon#read 3, iclass 23, count 2 2006.229.02:05:22.56#ibcon#about to read 4, iclass 23, count 2 2006.229.02:05:22.56#ibcon#read 4, iclass 23, count 2 2006.229.02:05:22.56#ibcon#about to read 5, iclass 23, count 2 2006.229.02:05:22.56#ibcon#read 5, iclass 23, count 2 2006.229.02:05:22.56#ibcon#about to read 6, iclass 23, count 2 2006.229.02:05:22.56#ibcon#read 6, iclass 23, count 2 2006.229.02:05:22.56#ibcon#end of sib2, iclass 23, count 2 2006.229.02:05:22.56#ibcon#*after write, iclass 23, count 2 2006.229.02:05:22.56#ibcon#*before return 0, iclass 23, count 2 2006.229.02:05:22.56#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:22.56#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:05:22.56#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.02:05:22.56#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:22.56#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:22.68#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:22.68#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:22.68#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:05:22.68#ibcon#first serial, iclass 23, count 0 2006.229.02:05:22.68#ibcon#enter sib2, iclass 23, count 0 2006.229.02:05:22.68#ibcon#flushed, iclass 23, count 0 2006.229.02:05:22.68#ibcon#about to write, iclass 23, count 0 2006.229.02:05:22.68#ibcon#wrote, iclass 23, count 0 2006.229.02:05:22.68#ibcon#about to read 3, iclass 23, count 0 2006.229.02:05:22.70#ibcon#read 3, iclass 23, count 0 2006.229.02:05:22.70#ibcon#about to read 4, iclass 23, count 0 2006.229.02:05:22.70#ibcon#read 4, iclass 23, count 0 2006.229.02:05:22.70#ibcon#about to read 5, iclass 23, count 0 2006.229.02:05:22.70#ibcon#read 5, iclass 23, count 0 2006.229.02:05:22.70#ibcon#about to read 6, iclass 23, count 0 2006.229.02:05:22.70#ibcon#read 6, iclass 23, count 0 2006.229.02:05:22.70#ibcon#end of sib2, iclass 23, count 0 2006.229.02:05:22.70#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:05:22.70#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:05:22.70#ibcon#[27=USB\r\n] 2006.229.02:05:22.70#ibcon#*before write, iclass 23, count 0 2006.229.02:05:22.70#ibcon#enter sib2, iclass 23, count 0 2006.229.02:05:22.70#ibcon#flushed, iclass 23, count 0 2006.229.02:05:22.70#ibcon#about to write, iclass 23, count 0 2006.229.02:05:22.70#ibcon#wrote, iclass 23, count 0 2006.229.02:05:22.70#ibcon#about to read 3, iclass 23, count 0 2006.229.02:05:22.73#ibcon#read 3, iclass 23, count 0 2006.229.02:05:22.73#ibcon#about to read 4, iclass 23, count 0 2006.229.02:05:22.73#ibcon#read 4, iclass 23, count 0 2006.229.02:05:22.73#ibcon#about to read 5, iclass 23, count 0 2006.229.02:05:22.73#ibcon#read 5, iclass 23, count 0 2006.229.02:05:22.73#ibcon#about to read 6, iclass 23, count 0 2006.229.02:05:22.73#ibcon#read 6, iclass 23, count 0 2006.229.02:05:22.73#ibcon#end of sib2, iclass 23, count 0 2006.229.02:05:22.73#ibcon#*after write, iclass 23, count 0 2006.229.02:05:22.73#ibcon#*before return 0, iclass 23, count 0 2006.229.02:05:22.73#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:22.73#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:05:22.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:05:22.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:05:22.73$vck44/vblo=5,709.99 2006.229.02:05:22.73#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.02:05:22.73#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.02:05:22.73#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:22.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:22.74#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:22.74#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:22.74#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:05:22.74#ibcon#first serial, iclass 25, count 0 2006.229.02:05:22.74#ibcon#enter sib2, iclass 25, count 0 2006.229.02:05:22.74#ibcon#flushed, iclass 25, count 0 2006.229.02:05:22.74#ibcon#about to write, iclass 25, count 0 2006.229.02:05:22.74#ibcon#wrote, iclass 25, count 0 2006.229.02:05:22.74#ibcon#about to read 3, iclass 25, count 0 2006.229.02:05:22.75#ibcon#read 3, iclass 25, count 0 2006.229.02:05:22.75#ibcon#about to read 4, iclass 25, count 0 2006.229.02:05:22.75#ibcon#read 4, iclass 25, count 0 2006.229.02:05:22.75#ibcon#about to read 5, iclass 25, count 0 2006.229.02:05:22.75#ibcon#read 5, iclass 25, count 0 2006.229.02:05:22.75#ibcon#about to read 6, iclass 25, count 0 2006.229.02:05:22.75#ibcon#read 6, iclass 25, count 0 2006.229.02:05:22.75#ibcon#end of sib2, iclass 25, count 0 2006.229.02:05:22.75#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:05:22.75#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:05:22.75#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:05:22.75#ibcon#*before write, iclass 25, count 0 2006.229.02:05:22.75#ibcon#enter sib2, iclass 25, count 0 2006.229.02:05:22.75#ibcon#flushed, iclass 25, count 0 2006.229.02:05:22.75#ibcon#about to write, iclass 25, count 0 2006.229.02:05:22.75#ibcon#wrote, iclass 25, count 0 2006.229.02:05:22.75#ibcon#about to read 3, iclass 25, count 0 2006.229.02:05:22.79#ibcon#read 3, iclass 25, count 0 2006.229.02:05:22.79#ibcon#about to read 4, iclass 25, count 0 2006.229.02:05:22.79#ibcon#read 4, iclass 25, count 0 2006.229.02:05:22.79#ibcon#about to read 5, iclass 25, count 0 2006.229.02:05:22.79#ibcon#read 5, iclass 25, count 0 2006.229.02:05:22.79#ibcon#about to read 6, iclass 25, count 0 2006.229.02:05:22.79#ibcon#read 6, iclass 25, count 0 2006.229.02:05:22.79#ibcon#end of sib2, iclass 25, count 0 2006.229.02:05:22.79#ibcon#*after write, iclass 25, count 0 2006.229.02:05:22.79#ibcon#*before return 0, iclass 25, count 0 2006.229.02:05:22.79#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:22.79#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:05:22.79#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:05:22.79#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:05:22.79$vck44/vb=5,4 2006.229.02:05:22.80#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.02:05:22.80#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.02:05:22.80#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:22.80#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:22.84#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:22.84#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:22.84#ibcon#enter wrdev, iclass 27, count 2 2006.229.02:05:22.84#ibcon#first serial, iclass 27, count 2 2006.229.02:05:22.84#ibcon#enter sib2, iclass 27, count 2 2006.229.02:05:22.84#ibcon#flushed, iclass 27, count 2 2006.229.02:05:22.84#ibcon#about to write, iclass 27, count 2 2006.229.02:05:22.84#ibcon#wrote, iclass 27, count 2 2006.229.02:05:22.84#ibcon#about to read 3, iclass 27, count 2 2006.229.02:05:22.86#ibcon#read 3, iclass 27, count 2 2006.229.02:05:22.86#ibcon#about to read 4, iclass 27, count 2 2006.229.02:05:22.86#ibcon#read 4, iclass 27, count 2 2006.229.02:05:22.86#ibcon#about to read 5, iclass 27, count 2 2006.229.02:05:22.86#ibcon#read 5, iclass 27, count 2 2006.229.02:05:22.86#ibcon#about to read 6, iclass 27, count 2 2006.229.02:05:22.86#ibcon#read 6, iclass 27, count 2 2006.229.02:05:22.86#ibcon#end of sib2, iclass 27, count 2 2006.229.02:05:22.86#ibcon#*mode == 0, iclass 27, count 2 2006.229.02:05:22.86#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.02:05:22.86#ibcon#[27=AT05-04\r\n] 2006.229.02:05:22.86#ibcon#*before write, iclass 27, count 2 2006.229.02:05:22.86#ibcon#enter sib2, iclass 27, count 2 2006.229.02:05:22.86#ibcon#flushed, iclass 27, count 2 2006.229.02:05:22.86#ibcon#about to write, iclass 27, count 2 2006.229.02:05:22.86#ibcon#wrote, iclass 27, count 2 2006.229.02:05:22.86#ibcon#about to read 3, iclass 27, count 2 2006.229.02:05:22.89#ibcon#read 3, iclass 27, count 2 2006.229.02:05:22.89#ibcon#about to read 4, iclass 27, count 2 2006.229.02:05:22.89#ibcon#read 4, iclass 27, count 2 2006.229.02:05:22.89#ibcon#about to read 5, iclass 27, count 2 2006.229.02:05:22.89#ibcon#read 5, iclass 27, count 2 2006.229.02:05:22.89#ibcon#about to read 6, iclass 27, count 2 2006.229.02:05:22.89#ibcon#read 6, iclass 27, count 2 2006.229.02:05:22.89#ibcon#end of sib2, iclass 27, count 2 2006.229.02:05:22.89#ibcon#*after write, iclass 27, count 2 2006.229.02:05:22.89#ibcon#*before return 0, iclass 27, count 2 2006.229.02:05:22.89#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:22.89#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:05:22.89#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.02:05:22.89#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:22.89#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:23.01#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:23.01#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:23.01#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:05:23.01#ibcon#first serial, iclass 27, count 0 2006.229.02:05:23.01#ibcon#enter sib2, iclass 27, count 0 2006.229.02:05:23.01#ibcon#flushed, iclass 27, count 0 2006.229.02:05:23.01#ibcon#about to write, iclass 27, count 0 2006.229.02:05:23.01#ibcon#wrote, iclass 27, count 0 2006.229.02:05:23.02#ibcon#about to read 3, iclass 27, count 0 2006.229.02:05:23.03#ibcon#read 3, iclass 27, count 0 2006.229.02:05:23.03#ibcon#about to read 4, iclass 27, count 0 2006.229.02:05:23.03#ibcon#read 4, iclass 27, count 0 2006.229.02:05:23.03#ibcon#about to read 5, iclass 27, count 0 2006.229.02:05:23.03#ibcon#read 5, iclass 27, count 0 2006.229.02:05:23.03#ibcon#about to read 6, iclass 27, count 0 2006.229.02:05:23.03#ibcon#read 6, iclass 27, count 0 2006.229.02:05:23.03#ibcon#end of sib2, iclass 27, count 0 2006.229.02:05:23.03#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:05:23.03#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:05:23.03#ibcon#[27=USB\r\n] 2006.229.02:05:23.03#ibcon#*before write, iclass 27, count 0 2006.229.02:05:23.03#ibcon#enter sib2, iclass 27, count 0 2006.229.02:05:23.03#ibcon#flushed, iclass 27, count 0 2006.229.02:05:23.03#ibcon#about to write, iclass 27, count 0 2006.229.02:05:23.03#ibcon#wrote, iclass 27, count 0 2006.229.02:05:23.03#ibcon#about to read 3, iclass 27, count 0 2006.229.02:05:23.03#abcon#<5=/05 3.2 5.4 30.02 901001.2\r\n> 2006.229.02:05:23.05#abcon#{5=INTERFACE CLEAR} 2006.229.02:05:23.06#ibcon#read 3, iclass 27, count 0 2006.229.02:05:23.06#ibcon#about to read 4, iclass 27, count 0 2006.229.02:05:23.06#ibcon#read 4, iclass 27, count 0 2006.229.02:05:23.06#ibcon#about to read 5, iclass 27, count 0 2006.229.02:05:23.06#ibcon#read 5, iclass 27, count 0 2006.229.02:05:23.06#ibcon#about to read 6, iclass 27, count 0 2006.229.02:05:23.06#ibcon#read 6, iclass 27, count 0 2006.229.02:05:23.06#ibcon#end of sib2, iclass 27, count 0 2006.229.02:05:23.06#ibcon#*after write, iclass 27, count 0 2006.229.02:05:23.06#ibcon#*before return 0, iclass 27, count 0 2006.229.02:05:23.06#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:23.06#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:05:23.06#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:05:23.06#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:05:23.06$vck44/vblo=6,719.99 2006.229.02:05:23.07#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.02:05:23.07#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.02:05:23.07#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:23.07#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:05:23.07#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:05:23.07#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:05:23.07#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:05:23.07#ibcon#first serial, iclass 32, count 0 2006.229.02:05:23.07#ibcon#enter sib2, iclass 32, count 0 2006.229.02:05:23.07#ibcon#flushed, iclass 32, count 0 2006.229.02:05:23.07#ibcon#about to write, iclass 32, count 0 2006.229.02:05:23.07#ibcon#wrote, iclass 32, count 0 2006.229.02:05:23.07#ibcon#about to read 3, iclass 32, count 0 2006.229.02:05:23.08#ibcon#read 3, iclass 32, count 0 2006.229.02:05:23.08#ibcon#about to read 4, iclass 32, count 0 2006.229.02:05:23.08#ibcon#read 4, iclass 32, count 0 2006.229.02:05:23.08#ibcon#about to read 5, iclass 32, count 0 2006.229.02:05:23.08#ibcon#read 5, iclass 32, count 0 2006.229.02:05:23.08#ibcon#about to read 6, iclass 32, count 0 2006.229.02:05:23.08#ibcon#read 6, iclass 32, count 0 2006.229.02:05:23.08#ibcon#end of sib2, iclass 32, count 0 2006.229.02:05:23.08#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:05:23.08#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:05:23.08#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:05:23.08#ibcon#*before write, iclass 32, count 0 2006.229.02:05:23.08#ibcon#enter sib2, iclass 32, count 0 2006.229.02:05:23.08#ibcon#flushed, iclass 32, count 0 2006.229.02:05:23.08#ibcon#about to write, iclass 32, count 0 2006.229.02:05:23.08#ibcon#wrote, iclass 32, count 0 2006.229.02:05:23.08#ibcon#about to read 3, iclass 32, count 0 2006.229.02:05:23.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:05:23.12#ibcon#read 3, iclass 32, count 0 2006.229.02:05:23.12#ibcon#about to read 4, iclass 32, count 0 2006.229.02:05:23.12#ibcon#read 4, iclass 32, count 0 2006.229.02:05:23.12#ibcon#about to read 5, iclass 32, count 0 2006.229.02:05:23.12#ibcon#read 5, iclass 32, count 0 2006.229.02:05:23.12#ibcon#about to read 6, iclass 32, count 0 2006.229.02:05:23.12#ibcon#read 6, iclass 32, count 0 2006.229.02:05:23.12#ibcon#end of sib2, iclass 32, count 0 2006.229.02:05:23.12#ibcon#*after write, iclass 32, count 0 2006.229.02:05:23.12#ibcon#*before return 0, iclass 32, count 0 2006.229.02:05:23.12#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:05:23.12#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:05:23.12#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:05:23.12#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:05:23.12$vck44/vb=6,4 2006.229.02:05:23.12#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.02:05:23.12#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.02:05:23.12#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:23.13#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:23.17#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:23.17#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:23.17#ibcon#enter wrdev, iclass 35, count 2 2006.229.02:05:23.17#ibcon#first serial, iclass 35, count 2 2006.229.02:05:23.17#ibcon#enter sib2, iclass 35, count 2 2006.229.02:05:23.17#ibcon#flushed, iclass 35, count 2 2006.229.02:05:23.17#ibcon#about to write, iclass 35, count 2 2006.229.02:05:23.17#ibcon#wrote, iclass 35, count 2 2006.229.02:05:23.17#ibcon#about to read 3, iclass 35, count 2 2006.229.02:05:23.19#ibcon#read 3, iclass 35, count 2 2006.229.02:05:23.19#ibcon#about to read 4, iclass 35, count 2 2006.229.02:05:23.19#ibcon#read 4, iclass 35, count 2 2006.229.02:05:23.19#ibcon#about to read 5, iclass 35, count 2 2006.229.02:05:23.19#ibcon#read 5, iclass 35, count 2 2006.229.02:05:23.19#ibcon#about to read 6, iclass 35, count 2 2006.229.02:05:23.19#ibcon#read 6, iclass 35, count 2 2006.229.02:05:23.19#ibcon#end of sib2, iclass 35, count 2 2006.229.02:05:23.19#ibcon#*mode == 0, iclass 35, count 2 2006.229.02:05:23.19#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.02:05:23.19#ibcon#[27=AT06-04\r\n] 2006.229.02:05:23.19#ibcon#*before write, iclass 35, count 2 2006.229.02:05:23.19#ibcon#enter sib2, iclass 35, count 2 2006.229.02:05:23.19#ibcon#flushed, iclass 35, count 2 2006.229.02:05:23.19#ibcon#about to write, iclass 35, count 2 2006.229.02:05:23.19#ibcon#wrote, iclass 35, count 2 2006.229.02:05:23.19#ibcon#about to read 3, iclass 35, count 2 2006.229.02:05:23.23#ibcon#read 3, iclass 35, count 2 2006.229.02:05:23.23#ibcon#about to read 4, iclass 35, count 2 2006.229.02:05:23.23#ibcon#read 4, iclass 35, count 2 2006.229.02:05:23.23#ibcon#about to read 5, iclass 35, count 2 2006.229.02:05:23.23#ibcon#read 5, iclass 35, count 2 2006.229.02:05:23.23#ibcon#about to read 6, iclass 35, count 2 2006.229.02:05:23.23#ibcon#read 6, iclass 35, count 2 2006.229.02:05:23.23#ibcon#end of sib2, iclass 35, count 2 2006.229.02:05:23.23#ibcon#*after write, iclass 35, count 2 2006.229.02:05:23.23#ibcon#*before return 0, iclass 35, count 2 2006.229.02:05:23.23#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:23.23#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:05:23.23#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.02:05:23.23#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:23.23#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:23.34#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:23.34#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:23.34#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:05:23.34#ibcon#first serial, iclass 35, count 0 2006.229.02:05:23.34#ibcon#enter sib2, iclass 35, count 0 2006.229.02:05:23.34#ibcon#flushed, iclass 35, count 0 2006.229.02:05:23.34#ibcon#about to write, iclass 35, count 0 2006.229.02:05:23.34#ibcon#wrote, iclass 35, count 0 2006.229.02:05:23.34#ibcon#about to read 3, iclass 35, count 0 2006.229.02:05:23.36#ibcon#read 3, iclass 35, count 0 2006.229.02:05:23.36#ibcon#about to read 4, iclass 35, count 0 2006.229.02:05:23.36#ibcon#read 4, iclass 35, count 0 2006.229.02:05:23.36#ibcon#about to read 5, iclass 35, count 0 2006.229.02:05:23.36#ibcon#read 5, iclass 35, count 0 2006.229.02:05:23.36#ibcon#about to read 6, iclass 35, count 0 2006.229.02:05:23.36#ibcon#read 6, iclass 35, count 0 2006.229.02:05:23.36#ibcon#end of sib2, iclass 35, count 0 2006.229.02:05:23.36#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:05:23.36#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:05:23.36#ibcon#[27=USB\r\n] 2006.229.02:05:23.36#ibcon#*before write, iclass 35, count 0 2006.229.02:05:23.36#ibcon#enter sib2, iclass 35, count 0 2006.229.02:05:23.36#ibcon#flushed, iclass 35, count 0 2006.229.02:05:23.36#ibcon#about to write, iclass 35, count 0 2006.229.02:05:23.36#ibcon#wrote, iclass 35, count 0 2006.229.02:05:23.36#ibcon#about to read 3, iclass 35, count 0 2006.229.02:05:23.39#ibcon#read 3, iclass 35, count 0 2006.229.02:05:23.39#ibcon#about to read 4, iclass 35, count 0 2006.229.02:05:23.39#ibcon#read 4, iclass 35, count 0 2006.229.02:05:23.39#ibcon#about to read 5, iclass 35, count 0 2006.229.02:05:23.39#ibcon#read 5, iclass 35, count 0 2006.229.02:05:23.39#ibcon#about to read 6, iclass 35, count 0 2006.229.02:05:23.39#ibcon#read 6, iclass 35, count 0 2006.229.02:05:23.39#ibcon#end of sib2, iclass 35, count 0 2006.229.02:05:23.39#ibcon#*after write, iclass 35, count 0 2006.229.02:05:23.39#ibcon#*before return 0, iclass 35, count 0 2006.229.02:05:23.39#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:23.39#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:05:23.39#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:05:23.39#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:05:23.39$vck44/vblo=7,734.99 2006.229.02:05:23.39#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.02:05:23.39#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.02:05:23.39#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:23.39#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:23.40#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:23.40#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:23.40#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:05:23.40#ibcon#first serial, iclass 37, count 0 2006.229.02:05:23.40#ibcon#enter sib2, iclass 37, count 0 2006.229.02:05:23.40#ibcon#flushed, iclass 37, count 0 2006.229.02:05:23.40#ibcon#about to write, iclass 37, count 0 2006.229.02:05:23.40#ibcon#wrote, iclass 37, count 0 2006.229.02:05:23.40#ibcon#about to read 3, iclass 37, count 0 2006.229.02:05:23.41#ibcon#read 3, iclass 37, count 0 2006.229.02:05:23.41#ibcon#about to read 4, iclass 37, count 0 2006.229.02:05:23.41#ibcon#read 4, iclass 37, count 0 2006.229.02:05:23.41#ibcon#about to read 5, iclass 37, count 0 2006.229.02:05:23.41#ibcon#read 5, iclass 37, count 0 2006.229.02:05:23.41#ibcon#about to read 6, iclass 37, count 0 2006.229.02:05:23.41#ibcon#read 6, iclass 37, count 0 2006.229.02:05:23.41#ibcon#end of sib2, iclass 37, count 0 2006.229.02:05:23.41#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:05:23.41#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:05:23.41#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:05:23.41#ibcon#*before write, iclass 37, count 0 2006.229.02:05:23.41#ibcon#enter sib2, iclass 37, count 0 2006.229.02:05:23.41#ibcon#flushed, iclass 37, count 0 2006.229.02:05:23.41#ibcon#about to write, iclass 37, count 0 2006.229.02:05:23.41#ibcon#wrote, iclass 37, count 0 2006.229.02:05:23.41#ibcon#about to read 3, iclass 37, count 0 2006.229.02:05:23.45#ibcon#read 3, iclass 37, count 0 2006.229.02:05:23.45#ibcon#about to read 4, iclass 37, count 0 2006.229.02:05:23.45#ibcon#read 4, iclass 37, count 0 2006.229.02:05:23.45#ibcon#about to read 5, iclass 37, count 0 2006.229.02:05:23.45#ibcon#read 5, iclass 37, count 0 2006.229.02:05:23.45#ibcon#about to read 6, iclass 37, count 0 2006.229.02:05:23.45#ibcon#read 6, iclass 37, count 0 2006.229.02:05:23.45#ibcon#end of sib2, iclass 37, count 0 2006.229.02:05:23.45#ibcon#*after write, iclass 37, count 0 2006.229.02:05:23.45#ibcon#*before return 0, iclass 37, count 0 2006.229.02:05:23.45#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:23.45#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:05:23.45#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:05:23.45#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:05:23.45$vck44/vb=7,4 2006.229.02:05:23.45#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.02:05:23.46#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.02:05:23.46#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:23.46#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:23.50#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:23.50#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:23.50#ibcon#enter wrdev, iclass 39, count 2 2006.229.02:05:23.50#ibcon#first serial, iclass 39, count 2 2006.229.02:05:23.50#ibcon#enter sib2, iclass 39, count 2 2006.229.02:05:23.50#ibcon#flushed, iclass 39, count 2 2006.229.02:05:23.50#ibcon#about to write, iclass 39, count 2 2006.229.02:05:23.50#ibcon#wrote, iclass 39, count 2 2006.229.02:05:23.50#ibcon#about to read 3, iclass 39, count 2 2006.229.02:05:23.52#ibcon#read 3, iclass 39, count 2 2006.229.02:05:23.52#ibcon#about to read 4, iclass 39, count 2 2006.229.02:05:23.52#ibcon#read 4, iclass 39, count 2 2006.229.02:05:23.52#ibcon#about to read 5, iclass 39, count 2 2006.229.02:05:23.52#ibcon#read 5, iclass 39, count 2 2006.229.02:05:23.52#ibcon#about to read 6, iclass 39, count 2 2006.229.02:05:23.52#ibcon#read 6, iclass 39, count 2 2006.229.02:05:23.52#ibcon#end of sib2, iclass 39, count 2 2006.229.02:05:23.52#ibcon#*mode == 0, iclass 39, count 2 2006.229.02:05:23.52#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.02:05:23.52#ibcon#[27=AT07-04\r\n] 2006.229.02:05:23.52#ibcon#*before write, iclass 39, count 2 2006.229.02:05:23.52#ibcon#enter sib2, iclass 39, count 2 2006.229.02:05:23.52#ibcon#flushed, iclass 39, count 2 2006.229.02:05:23.52#ibcon#about to write, iclass 39, count 2 2006.229.02:05:23.52#ibcon#wrote, iclass 39, count 2 2006.229.02:05:23.52#ibcon#about to read 3, iclass 39, count 2 2006.229.02:05:23.55#ibcon#read 3, iclass 39, count 2 2006.229.02:05:23.55#ibcon#about to read 4, iclass 39, count 2 2006.229.02:05:23.55#ibcon#read 4, iclass 39, count 2 2006.229.02:05:23.55#ibcon#about to read 5, iclass 39, count 2 2006.229.02:05:23.55#ibcon#read 5, iclass 39, count 2 2006.229.02:05:23.55#ibcon#about to read 6, iclass 39, count 2 2006.229.02:05:23.55#ibcon#read 6, iclass 39, count 2 2006.229.02:05:23.55#ibcon#end of sib2, iclass 39, count 2 2006.229.02:05:23.55#ibcon#*after write, iclass 39, count 2 2006.229.02:05:23.55#ibcon#*before return 0, iclass 39, count 2 2006.229.02:05:23.55#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:23.55#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:05:23.55#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.02:05:23.55#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:23.55#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:23.67#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:23.67#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:23.67#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:05:23.67#ibcon#first serial, iclass 39, count 0 2006.229.02:05:23.67#ibcon#enter sib2, iclass 39, count 0 2006.229.02:05:23.67#ibcon#flushed, iclass 39, count 0 2006.229.02:05:23.67#ibcon#about to write, iclass 39, count 0 2006.229.02:05:23.67#ibcon#wrote, iclass 39, count 0 2006.229.02:05:23.67#ibcon#about to read 3, iclass 39, count 0 2006.229.02:05:23.69#ibcon#read 3, iclass 39, count 0 2006.229.02:05:23.69#ibcon#about to read 4, iclass 39, count 0 2006.229.02:05:23.69#ibcon#read 4, iclass 39, count 0 2006.229.02:05:23.69#ibcon#about to read 5, iclass 39, count 0 2006.229.02:05:23.69#ibcon#read 5, iclass 39, count 0 2006.229.02:05:23.69#ibcon#about to read 6, iclass 39, count 0 2006.229.02:05:23.69#ibcon#read 6, iclass 39, count 0 2006.229.02:05:23.69#ibcon#end of sib2, iclass 39, count 0 2006.229.02:05:23.69#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:05:23.69#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:05:23.69#ibcon#[27=USB\r\n] 2006.229.02:05:23.69#ibcon#*before write, iclass 39, count 0 2006.229.02:05:23.69#ibcon#enter sib2, iclass 39, count 0 2006.229.02:05:23.69#ibcon#flushed, iclass 39, count 0 2006.229.02:05:23.69#ibcon#about to write, iclass 39, count 0 2006.229.02:05:23.69#ibcon#wrote, iclass 39, count 0 2006.229.02:05:23.69#ibcon#about to read 3, iclass 39, count 0 2006.229.02:05:23.72#ibcon#read 3, iclass 39, count 0 2006.229.02:05:23.72#ibcon#about to read 4, iclass 39, count 0 2006.229.02:05:23.72#ibcon#read 4, iclass 39, count 0 2006.229.02:05:23.72#ibcon#about to read 5, iclass 39, count 0 2006.229.02:05:23.72#ibcon#read 5, iclass 39, count 0 2006.229.02:05:23.72#ibcon#about to read 6, iclass 39, count 0 2006.229.02:05:23.72#ibcon#read 6, iclass 39, count 0 2006.229.02:05:23.72#ibcon#end of sib2, iclass 39, count 0 2006.229.02:05:23.72#ibcon#*after write, iclass 39, count 0 2006.229.02:05:23.72#ibcon#*before return 0, iclass 39, count 0 2006.229.02:05:23.72#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:23.72#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:05:23.72#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:05:23.72#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:05:23.72$vck44/vblo=8,744.99 2006.229.02:05:23.72#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.02:05:23.72#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.02:05:23.72#ibcon#ireg 17 cls_cnt 0 2006.229.02:05:23.72#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:23.73#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:23.73#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:23.73#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:05:23.73#ibcon#first serial, iclass 3, count 0 2006.229.02:05:23.73#ibcon#enter sib2, iclass 3, count 0 2006.229.02:05:23.73#ibcon#flushed, iclass 3, count 0 2006.229.02:05:23.73#ibcon#about to write, iclass 3, count 0 2006.229.02:05:23.73#ibcon#wrote, iclass 3, count 0 2006.229.02:05:23.73#ibcon#about to read 3, iclass 3, count 0 2006.229.02:05:23.74#ibcon#read 3, iclass 3, count 0 2006.229.02:05:23.74#ibcon#about to read 4, iclass 3, count 0 2006.229.02:05:23.74#ibcon#read 4, iclass 3, count 0 2006.229.02:05:23.74#ibcon#about to read 5, iclass 3, count 0 2006.229.02:05:23.74#ibcon#read 5, iclass 3, count 0 2006.229.02:05:23.74#ibcon#about to read 6, iclass 3, count 0 2006.229.02:05:23.74#ibcon#read 6, iclass 3, count 0 2006.229.02:05:23.74#ibcon#end of sib2, iclass 3, count 0 2006.229.02:05:23.74#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:05:23.74#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:05:23.74#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:05:23.74#ibcon#*before write, iclass 3, count 0 2006.229.02:05:23.74#ibcon#enter sib2, iclass 3, count 0 2006.229.02:05:23.74#ibcon#flushed, iclass 3, count 0 2006.229.02:05:23.74#ibcon#about to write, iclass 3, count 0 2006.229.02:05:23.74#ibcon#wrote, iclass 3, count 0 2006.229.02:05:23.74#ibcon#about to read 3, iclass 3, count 0 2006.229.02:05:23.78#ibcon#read 3, iclass 3, count 0 2006.229.02:05:23.78#ibcon#about to read 4, iclass 3, count 0 2006.229.02:05:23.78#ibcon#read 4, iclass 3, count 0 2006.229.02:05:23.78#ibcon#about to read 5, iclass 3, count 0 2006.229.02:05:23.78#ibcon#read 5, iclass 3, count 0 2006.229.02:05:23.78#ibcon#about to read 6, iclass 3, count 0 2006.229.02:05:23.78#ibcon#read 6, iclass 3, count 0 2006.229.02:05:23.78#ibcon#end of sib2, iclass 3, count 0 2006.229.02:05:23.78#ibcon#*after write, iclass 3, count 0 2006.229.02:05:23.78#ibcon#*before return 0, iclass 3, count 0 2006.229.02:05:23.78#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:23.78#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:05:23.78#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:05:23.78#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:05:23.78$vck44/vb=8,4 2006.229.02:05:23.78#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.02:05:23.79#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.02:05:23.79#ibcon#ireg 11 cls_cnt 2 2006.229.02:05:23.79#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:23.84#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:23.84#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:23.84#ibcon#enter wrdev, iclass 5, count 2 2006.229.02:05:23.84#ibcon#first serial, iclass 5, count 2 2006.229.02:05:23.84#ibcon#enter sib2, iclass 5, count 2 2006.229.02:05:23.84#ibcon#flushed, iclass 5, count 2 2006.229.02:05:23.84#ibcon#about to write, iclass 5, count 2 2006.229.02:05:23.84#ibcon#wrote, iclass 5, count 2 2006.229.02:05:23.84#ibcon#about to read 3, iclass 5, count 2 2006.229.02:05:23.85#ibcon#read 3, iclass 5, count 2 2006.229.02:05:23.85#ibcon#about to read 4, iclass 5, count 2 2006.229.02:05:23.85#ibcon#read 4, iclass 5, count 2 2006.229.02:05:23.85#ibcon#about to read 5, iclass 5, count 2 2006.229.02:05:23.85#ibcon#read 5, iclass 5, count 2 2006.229.02:05:23.85#ibcon#about to read 6, iclass 5, count 2 2006.229.02:05:23.85#ibcon#read 6, iclass 5, count 2 2006.229.02:05:23.85#ibcon#end of sib2, iclass 5, count 2 2006.229.02:05:23.85#ibcon#*mode == 0, iclass 5, count 2 2006.229.02:05:23.85#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.02:05:23.85#ibcon#[27=AT08-04\r\n] 2006.229.02:05:23.85#ibcon#*before write, iclass 5, count 2 2006.229.02:05:23.85#ibcon#enter sib2, iclass 5, count 2 2006.229.02:05:23.85#ibcon#flushed, iclass 5, count 2 2006.229.02:05:23.85#ibcon#about to write, iclass 5, count 2 2006.229.02:05:23.85#ibcon#wrote, iclass 5, count 2 2006.229.02:05:23.85#ibcon#about to read 3, iclass 5, count 2 2006.229.02:05:23.88#ibcon#read 3, iclass 5, count 2 2006.229.02:05:23.88#ibcon#about to read 4, iclass 5, count 2 2006.229.02:05:23.88#ibcon#read 4, iclass 5, count 2 2006.229.02:05:23.88#ibcon#about to read 5, iclass 5, count 2 2006.229.02:05:23.88#ibcon#read 5, iclass 5, count 2 2006.229.02:05:23.88#ibcon#about to read 6, iclass 5, count 2 2006.229.02:05:23.88#ibcon#read 6, iclass 5, count 2 2006.229.02:05:23.88#ibcon#end of sib2, iclass 5, count 2 2006.229.02:05:23.88#ibcon#*after write, iclass 5, count 2 2006.229.02:05:23.88#ibcon#*before return 0, iclass 5, count 2 2006.229.02:05:23.88#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:23.88#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:05:23.88#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.02:05:23.88#ibcon#ireg 7 cls_cnt 0 2006.229.02:05:23.88#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:24.00#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:24.00#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:24.00#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:05:24.00#ibcon#first serial, iclass 5, count 0 2006.229.02:05:24.00#ibcon#enter sib2, iclass 5, count 0 2006.229.02:05:24.00#ibcon#flushed, iclass 5, count 0 2006.229.02:05:24.00#ibcon#about to write, iclass 5, count 0 2006.229.02:05:24.00#ibcon#wrote, iclass 5, count 0 2006.229.02:05:24.00#ibcon#about to read 3, iclass 5, count 0 2006.229.02:05:24.02#ibcon#read 3, iclass 5, count 0 2006.229.02:05:24.02#ibcon#about to read 4, iclass 5, count 0 2006.229.02:05:24.02#ibcon#read 4, iclass 5, count 0 2006.229.02:05:24.02#ibcon#about to read 5, iclass 5, count 0 2006.229.02:05:24.02#ibcon#read 5, iclass 5, count 0 2006.229.02:05:24.02#ibcon#about to read 6, iclass 5, count 0 2006.229.02:05:24.02#ibcon#read 6, iclass 5, count 0 2006.229.02:05:24.02#ibcon#end of sib2, iclass 5, count 0 2006.229.02:05:24.02#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:05:24.02#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:05:24.02#ibcon#[27=USB\r\n] 2006.229.02:05:24.02#ibcon#*before write, iclass 5, count 0 2006.229.02:05:24.02#ibcon#enter sib2, iclass 5, count 0 2006.229.02:05:24.02#ibcon#flushed, iclass 5, count 0 2006.229.02:05:24.02#ibcon#about to write, iclass 5, count 0 2006.229.02:05:24.02#ibcon#wrote, iclass 5, count 0 2006.229.02:05:24.02#ibcon#about to read 3, iclass 5, count 0 2006.229.02:05:24.05#ibcon#read 3, iclass 5, count 0 2006.229.02:05:24.05#ibcon#about to read 4, iclass 5, count 0 2006.229.02:05:24.05#ibcon#read 4, iclass 5, count 0 2006.229.02:05:24.05#ibcon#about to read 5, iclass 5, count 0 2006.229.02:05:24.05#ibcon#read 5, iclass 5, count 0 2006.229.02:05:24.05#ibcon#about to read 6, iclass 5, count 0 2006.229.02:05:24.05#ibcon#read 6, iclass 5, count 0 2006.229.02:05:24.05#ibcon#end of sib2, iclass 5, count 0 2006.229.02:05:24.05#ibcon#*after write, iclass 5, count 0 2006.229.02:05:24.05#ibcon#*before return 0, iclass 5, count 0 2006.229.02:05:24.05#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:24.05#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:05:24.05#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:05:24.05#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:05:24.05$vck44/vabw=wide 2006.229.02:05:24.05#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.02:05:24.05#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.02:05:24.05#ibcon#ireg 8 cls_cnt 0 2006.229.02:05:24.05#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:24.05#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:24.05#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:24.06#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:05:24.06#ibcon#first serial, iclass 7, count 0 2006.229.02:05:24.06#ibcon#enter sib2, iclass 7, count 0 2006.229.02:05:24.06#ibcon#flushed, iclass 7, count 0 2006.229.02:05:24.06#ibcon#about to write, iclass 7, count 0 2006.229.02:05:24.06#ibcon#wrote, iclass 7, count 0 2006.229.02:05:24.06#ibcon#about to read 3, iclass 7, count 0 2006.229.02:05:24.07#ibcon#read 3, iclass 7, count 0 2006.229.02:05:24.07#ibcon#about to read 4, iclass 7, count 0 2006.229.02:05:24.07#ibcon#read 4, iclass 7, count 0 2006.229.02:05:24.07#ibcon#about to read 5, iclass 7, count 0 2006.229.02:05:24.07#ibcon#read 5, iclass 7, count 0 2006.229.02:05:24.07#ibcon#about to read 6, iclass 7, count 0 2006.229.02:05:24.07#ibcon#read 6, iclass 7, count 0 2006.229.02:05:24.07#ibcon#end of sib2, iclass 7, count 0 2006.229.02:05:24.07#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:05:24.07#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:05:24.07#ibcon#[25=BW32\r\n] 2006.229.02:05:24.07#ibcon#*before write, iclass 7, count 0 2006.229.02:05:24.07#ibcon#enter sib2, iclass 7, count 0 2006.229.02:05:24.07#ibcon#flushed, iclass 7, count 0 2006.229.02:05:24.07#ibcon#about to write, iclass 7, count 0 2006.229.02:05:24.07#ibcon#wrote, iclass 7, count 0 2006.229.02:05:24.07#ibcon#about to read 3, iclass 7, count 0 2006.229.02:05:24.10#ibcon#read 3, iclass 7, count 0 2006.229.02:05:24.10#ibcon#about to read 4, iclass 7, count 0 2006.229.02:05:24.10#ibcon#read 4, iclass 7, count 0 2006.229.02:05:24.10#ibcon#about to read 5, iclass 7, count 0 2006.229.02:05:24.10#ibcon#read 5, iclass 7, count 0 2006.229.02:05:24.10#ibcon#about to read 6, iclass 7, count 0 2006.229.02:05:24.10#ibcon#read 6, iclass 7, count 0 2006.229.02:05:24.10#ibcon#end of sib2, iclass 7, count 0 2006.229.02:05:24.10#ibcon#*after write, iclass 7, count 0 2006.229.02:05:24.10#ibcon#*before return 0, iclass 7, count 0 2006.229.02:05:24.10#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:24.10#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:05:24.10#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:05:24.10#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:05:24.10$vck44/vbbw=wide 2006.229.02:05:24.10#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:05:24.10#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:05:24.10#ibcon#ireg 8 cls_cnt 0 2006.229.02:05:24.10#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:05:24.17#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:05:24.17#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:05:24.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:05:24.17#ibcon#first serial, iclass 11, count 0 2006.229.02:05:24.17#ibcon#enter sib2, iclass 11, count 0 2006.229.02:05:24.17#ibcon#flushed, iclass 11, count 0 2006.229.02:05:24.17#ibcon#about to write, iclass 11, count 0 2006.229.02:05:24.17#ibcon#wrote, iclass 11, count 0 2006.229.02:05:24.17#ibcon#about to read 3, iclass 11, count 0 2006.229.02:05:24.19#ibcon#read 3, iclass 11, count 0 2006.229.02:05:24.19#ibcon#about to read 4, iclass 11, count 0 2006.229.02:05:24.19#ibcon#read 4, iclass 11, count 0 2006.229.02:05:24.19#ibcon#about to read 5, iclass 11, count 0 2006.229.02:05:24.19#ibcon#read 5, iclass 11, count 0 2006.229.02:05:24.19#ibcon#about to read 6, iclass 11, count 0 2006.229.02:05:24.19#ibcon#read 6, iclass 11, count 0 2006.229.02:05:24.19#ibcon#end of sib2, iclass 11, count 0 2006.229.02:05:24.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:05:24.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:05:24.19#ibcon#[27=BW32\r\n] 2006.229.02:05:24.19#ibcon#*before write, iclass 11, count 0 2006.229.02:05:24.19#ibcon#enter sib2, iclass 11, count 0 2006.229.02:05:24.19#ibcon#flushed, iclass 11, count 0 2006.229.02:05:24.19#ibcon#about to write, iclass 11, count 0 2006.229.02:05:24.19#ibcon#wrote, iclass 11, count 0 2006.229.02:05:24.19#ibcon#about to read 3, iclass 11, count 0 2006.229.02:05:24.22#ibcon#read 3, iclass 11, count 0 2006.229.02:05:24.22#ibcon#about to read 4, iclass 11, count 0 2006.229.02:05:24.22#ibcon#read 4, iclass 11, count 0 2006.229.02:05:24.22#ibcon#about to read 5, iclass 11, count 0 2006.229.02:05:24.22#ibcon#read 5, iclass 11, count 0 2006.229.02:05:24.22#ibcon#about to read 6, iclass 11, count 0 2006.229.02:05:24.22#ibcon#read 6, iclass 11, count 0 2006.229.02:05:24.22#ibcon#end of sib2, iclass 11, count 0 2006.229.02:05:24.22#ibcon#*after write, iclass 11, count 0 2006.229.02:05:24.22#ibcon#*before return 0, iclass 11, count 0 2006.229.02:05:24.22#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:05:24.22#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:05:24.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:05:24.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:05:24.22$setupk4/ifdk4 2006.229.02:05:24.23$ifdk4/lo= 2006.229.02:05:24.23$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:05:24.23$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:05:24.23$ifdk4/patch= 2006.229.02:05:24.23$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:05:24.23$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:05:24.23$setupk4/!*+20s 2006.229.02:05:33.20#abcon#<5=/05 3.2 5.4 30.02 901001.2\r\n> 2006.229.02:05:33.22#abcon#{5=INTERFACE CLEAR} 2006.229.02:05:33.28#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:05:38.79$setupk4/"tpicd 2006.229.02:05:38.79$setupk4/echo=off 2006.229.02:05:38.79$setupk4/xlog=off 2006.229.02:05:38.79:!2006.229.02:06:39 2006.229.02:06:39.00:preob 2006.229.02:06:39.14?ERROR an -103 Pointing computer tracking errors are too large. 2006.229.02:06:39.14?ERROR qo -301 WARNING: ONSOURCE status is SLEWING! 2006.229.02:06:39.14/onsource/SLEWING 2006.229.02:06:39.14:!2006.229.02:06:49 2006.229.02:06:49.00:"tape 2006.229.02:06:49.00:"st=record 2006.229.02:06:49.00:data_valid=on 2006.229.02:06:49.00:midob 2006.229.02:06:49.14?ERROR an -103 Pointing computer tracking errors are too large. 2006.229.02:06:49.14?ERROR qo -301 WARNING: ONSOURCE status is SLEWING! 2006.229.02:06:49.14/onsource/SLEWING 2006.229.02:06:49.14/wx/29.99,1001.2,90 2006.229.02:06:49.30/cable/+6.4086E-03 2006.229.02:06:50.14#trakl#Source acquired 2006.229.02:06:50.14#flagr#flagr/antenna,acquired 2006.229.02:06:50.39/va/01,08,usb,yes,32,35 2006.229.02:06:50.39/va/02,07,usb,yes,35,35 2006.229.02:06:50.39/va/03,06,usb,yes,43,46 2006.229.02:06:50.39/va/04,07,usb,yes,36,38 2006.229.02:06:50.39/va/05,04,usb,yes,32,33 2006.229.02:06:50.39/va/06,04,usb,yes,36,36 2006.229.02:06:50.39/va/07,05,usb,yes,32,33 2006.229.02:06:50.39/va/08,06,usb,yes,23,29 2006.229.02:06:50.62/valo/01,524.99,yes,locked 2006.229.02:06:50.62/valo/02,534.99,yes,locked 2006.229.02:06:50.62/valo/03,564.99,yes,locked 2006.229.02:06:50.62/valo/04,624.99,yes,locked 2006.229.02:06:50.62/valo/05,734.99,yes,locked 2006.229.02:06:50.62/valo/06,814.99,yes,locked 2006.229.02:06:50.62/valo/07,864.99,yes,locked 2006.229.02:06:50.62/valo/08,884.99,yes,locked 2006.229.02:06:51.71/vb/01,04,usb,yes,32,30 2006.229.02:06:51.71/vb/02,04,usb,yes,35,35 2006.229.02:06:51.71/vb/03,04,usb,yes,32,35 2006.229.02:06:51.71/vb/04,04,usb,yes,39,36 2006.229.02:06:51.71/vb/05,04,usb,yes,28,31 2006.229.02:06:51.71/vb/06,04,usb,yes,33,29 2006.229.02:06:51.71/vb/07,04,usb,yes,33,33 2006.229.02:06:51.71/vb/08,04,usb,yes,30,34 2006.229.02:06:51.94/vblo/01,629.99,yes,locked 2006.229.02:06:51.94/vblo/02,634.99,yes,locked 2006.229.02:06:51.94/vblo/03,649.99,yes,locked 2006.229.02:06:51.94/vblo/04,679.99,yes,locked 2006.229.02:06:51.94/vblo/05,709.99,yes,locked 2006.229.02:06:51.94/vblo/06,719.99,yes,locked 2006.229.02:06:51.94/vblo/07,734.99,yes,locked 2006.229.02:06:51.94/vblo/08,744.99,yes,locked 2006.229.02:06:52.09/vabw/8 2006.229.02:06:52.24/vbbw/8 2006.229.02:06:52.33/xfe/off,on,12.0 2006.229.02:06:52.70/ifatt/23,28,28,28 2006.229.02:06:53.07/fmout-gps/S +4.48E-07 2006.229.02:06:53.12:!2006.229.02:09:49 2006.229.02:09:49.01:data_valid=off 2006.229.02:09:49.01:"et 2006.229.02:09:49.01:!+3s 2006.229.02:09:52.02:"tape 2006.229.02:09:52.02:postob 2006.229.02:09:52.10/cable/+6.4082E-03 2006.229.02:09:52.10/wx/29.92,1001.1,90 2006.229.02:09:52.19/fmout-gps/S +4.51E-07 2006.229.02:09:52.19:scan_name=229-0215,jd0608,50 2006.229.02:09:52.19:source=0552+398,055530.81,394849.2,2000.0,ccw 2006.229.02:09:53.14#flagr#flagr/antenna,new-source 2006.229.02:09:53.14:checkk5 2006.229.02:09:53.60/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:09:54.01/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:09:54.44/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:09:54.89/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:09:55.32/chk_obsdata//k5ts1/T2290206??a.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.02:09:55.72/chk_obsdata//k5ts2/T2290206??b.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.02:09:56.11/chk_obsdata//k5ts3/T2290206??c.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.02:09:56.50/chk_obsdata//k5ts4/T2290206??d.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.02:09:57.20/k5log//k5ts1_log_newline 2006.229.02:09:58.02/k5log//k5ts2_log_newline 2006.229.02:09:58.78/k5log//k5ts3_log_newline 2006.229.02:09:59.56/k5log//k5ts4_log_newline 2006.229.02:09:59.58/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:09:59.58:setupk4=1 2006.229.02:09:59.58$setupk4/echo=on 2006.229.02:09:59.58$setupk4/pcalon 2006.229.02:09:59.59$pcalon/"no phase cal control is implemented here 2006.229.02:09:59.59$setupk4/"tpicd=stop 2006.229.02:09:59.59$setupk4/"rec=synch_on 2006.229.02:09:59.59$setupk4/"rec_mode=128 2006.229.02:09:59.59$setupk4/!* 2006.229.02:09:59.59$setupk4/recpk4 2006.229.02:09:59.59$recpk4/recpatch= 2006.229.02:09:59.59$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:09:59.59$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:09:59.59$setupk4/vck44 2006.229.02:09:59.59$vck44/valo=1,524.99 2006.229.02:09:59.59#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.02:09:59.59#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.02:09:59.59#ibcon#ireg 17 cls_cnt 0 2006.229.02:09:59.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:09:59.59#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:09:59.59#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:09:59.59#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:09:59.59#ibcon#first serial, iclass 24, count 0 2006.229.02:09:59.59#ibcon#enter sib2, iclass 24, count 0 2006.229.02:09:59.59#ibcon#flushed, iclass 24, count 0 2006.229.02:09:59.59#ibcon#about to write, iclass 24, count 0 2006.229.02:09:59.59#ibcon#wrote, iclass 24, count 0 2006.229.02:09:59.59#ibcon#about to read 3, iclass 24, count 0 2006.229.02:09:59.64#ibcon#read 3, iclass 24, count 0 2006.229.02:09:59.64#ibcon#about to read 4, iclass 24, count 0 2006.229.02:09:59.64#ibcon#read 4, iclass 24, count 0 2006.229.02:09:59.64#ibcon#about to read 5, iclass 24, count 0 2006.229.02:09:59.64#ibcon#read 5, iclass 24, count 0 2006.229.02:09:59.64#ibcon#about to read 6, iclass 24, count 0 2006.229.02:09:59.64#ibcon#read 6, iclass 24, count 0 2006.229.02:09:59.64#ibcon#end of sib2, iclass 24, count 0 2006.229.02:09:59.64#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:09:59.64#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:09:59.64#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:09:59.64#ibcon#*before write, iclass 24, count 0 2006.229.02:09:59.64#ibcon#enter sib2, iclass 24, count 0 2006.229.02:09:59.64#ibcon#flushed, iclass 24, count 0 2006.229.02:09:59.64#ibcon#about to write, iclass 24, count 0 2006.229.02:09:59.64#ibcon#wrote, iclass 24, count 0 2006.229.02:09:59.64#ibcon#about to read 3, iclass 24, count 0 2006.229.02:09:59.68#ibcon#read 3, iclass 24, count 0 2006.229.02:09:59.68#ibcon#about to read 4, iclass 24, count 0 2006.229.02:09:59.68#ibcon#read 4, iclass 24, count 0 2006.229.02:09:59.68#ibcon#about to read 5, iclass 24, count 0 2006.229.02:09:59.68#ibcon#read 5, iclass 24, count 0 2006.229.02:09:59.68#ibcon#about to read 6, iclass 24, count 0 2006.229.02:09:59.68#ibcon#read 6, iclass 24, count 0 2006.229.02:09:59.68#ibcon#end of sib2, iclass 24, count 0 2006.229.02:09:59.68#ibcon#*after write, iclass 24, count 0 2006.229.02:09:59.68#ibcon#*before return 0, iclass 24, count 0 2006.229.02:09:59.68#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:09:59.68#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:09:59.68#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:09:59.68#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:09:59.68$vck44/va=1,8 2006.229.02:09:59.68#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.02:09:59.68#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.02:09:59.68#ibcon#ireg 11 cls_cnt 2 2006.229.02:09:59.68#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:09:59.68#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:09:59.68#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:09:59.68#ibcon#enter wrdev, iclass 26, count 2 2006.229.02:09:59.68#ibcon#first serial, iclass 26, count 2 2006.229.02:09:59.68#ibcon#enter sib2, iclass 26, count 2 2006.229.02:09:59.68#ibcon#flushed, iclass 26, count 2 2006.229.02:09:59.68#ibcon#about to write, iclass 26, count 2 2006.229.02:09:59.68#ibcon#wrote, iclass 26, count 2 2006.229.02:09:59.68#ibcon#about to read 3, iclass 26, count 2 2006.229.02:09:59.70#ibcon#read 3, iclass 26, count 2 2006.229.02:09:59.70#ibcon#about to read 4, iclass 26, count 2 2006.229.02:09:59.70#ibcon#read 4, iclass 26, count 2 2006.229.02:09:59.70#ibcon#about to read 5, iclass 26, count 2 2006.229.02:09:59.70#ibcon#read 5, iclass 26, count 2 2006.229.02:09:59.70#ibcon#about to read 6, iclass 26, count 2 2006.229.02:09:59.70#ibcon#read 6, iclass 26, count 2 2006.229.02:09:59.70#ibcon#end of sib2, iclass 26, count 2 2006.229.02:09:59.70#ibcon#*mode == 0, iclass 26, count 2 2006.229.02:09:59.70#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.02:09:59.70#ibcon#[25=AT01-08\r\n] 2006.229.02:09:59.70#ibcon#*before write, iclass 26, count 2 2006.229.02:09:59.70#ibcon#enter sib2, iclass 26, count 2 2006.229.02:09:59.70#ibcon#flushed, iclass 26, count 2 2006.229.02:09:59.70#ibcon#about to write, iclass 26, count 2 2006.229.02:09:59.70#ibcon#wrote, iclass 26, count 2 2006.229.02:09:59.70#ibcon#about to read 3, iclass 26, count 2 2006.229.02:09:59.73#ibcon#read 3, iclass 26, count 2 2006.229.02:09:59.73#ibcon#about to read 4, iclass 26, count 2 2006.229.02:09:59.73#ibcon#read 4, iclass 26, count 2 2006.229.02:09:59.73#ibcon#about to read 5, iclass 26, count 2 2006.229.02:09:59.73#ibcon#read 5, iclass 26, count 2 2006.229.02:09:59.73#ibcon#about to read 6, iclass 26, count 2 2006.229.02:09:59.73#ibcon#read 6, iclass 26, count 2 2006.229.02:09:59.73#ibcon#end of sib2, iclass 26, count 2 2006.229.02:09:59.73#ibcon#*after write, iclass 26, count 2 2006.229.02:09:59.73#ibcon#*before return 0, iclass 26, count 2 2006.229.02:09:59.73#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:09:59.73#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:09:59.73#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.02:09:59.73#ibcon#ireg 7 cls_cnt 0 2006.229.02:09:59.73#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:09:59.85#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:09:59.85#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:09:59.85#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:09:59.85#ibcon#first serial, iclass 26, count 0 2006.229.02:09:59.85#ibcon#enter sib2, iclass 26, count 0 2006.229.02:09:59.85#ibcon#flushed, iclass 26, count 0 2006.229.02:09:59.85#ibcon#about to write, iclass 26, count 0 2006.229.02:09:59.85#ibcon#wrote, iclass 26, count 0 2006.229.02:09:59.85#ibcon#about to read 3, iclass 26, count 0 2006.229.02:09:59.87#ibcon#read 3, iclass 26, count 0 2006.229.02:09:59.87#ibcon#about to read 4, iclass 26, count 0 2006.229.02:09:59.87#ibcon#read 4, iclass 26, count 0 2006.229.02:09:59.87#ibcon#about to read 5, iclass 26, count 0 2006.229.02:09:59.87#ibcon#read 5, iclass 26, count 0 2006.229.02:09:59.87#ibcon#about to read 6, iclass 26, count 0 2006.229.02:09:59.87#ibcon#read 6, iclass 26, count 0 2006.229.02:09:59.87#ibcon#end of sib2, iclass 26, count 0 2006.229.02:09:59.87#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:09:59.87#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:09:59.87#ibcon#[25=USB\r\n] 2006.229.02:09:59.87#ibcon#*before write, iclass 26, count 0 2006.229.02:09:59.87#ibcon#enter sib2, iclass 26, count 0 2006.229.02:09:59.87#ibcon#flushed, iclass 26, count 0 2006.229.02:09:59.87#ibcon#about to write, iclass 26, count 0 2006.229.02:09:59.87#ibcon#wrote, iclass 26, count 0 2006.229.02:09:59.87#ibcon#about to read 3, iclass 26, count 0 2006.229.02:09:59.90#ibcon#read 3, iclass 26, count 0 2006.229.02:09:59.90#ibcon#about to read 4, iclass 26, count 0 2006.229.02:09:59.90#ibcon#read 4, iclass 26, count 0 2006.229.02:09:59.90#ibcon#about to read 5, iclass 26, count 0 2006.229.02:09:59.90#ibcon#read 5, iclass 26, count 0 2006.229.02:09:59.90#ibcon#about to read 6, iclass 26, count 0 2006.229.02:09:59.90#ibcon#read 6, iclass 26, count 0 2006.229.02:09:59.90#ibcon#end of sib2, iclass 26, count 0 2006.229.02:09:59.90#ibcon#*after write, iclass 26, count 0 2006.229.02:09:59.90#ibcon#*before return 0, iclass 26, count 0 2006.229.02:09:59.90#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:09:59.90#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:09:59.90#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:09:59.90#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:09:59.90$vck44/valo=2,534.99 2006.229.02:09:59.90#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.02:09:59.90#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.02:09:59.90#ibcon#ireg 17 cls_cnt 0 2006.229.02:09:59.90#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:09:59.90#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:09:59.90#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:09:59.90#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:09:59.90#ibcon#first serial, iclass 28, count 0 2006.229.02:09:59.90#ibcon#enter sib2, iclass 28, count 0 2006.229.02:09:59.90#ibcon#flushed, iclass 28, count 0 2006.229.02:09:59.90#ibcon#about to write, iclass 28, count 0 2006.229.02:09:59.90#ibcon#wrote, iclass 28, count 0 2006.229.02:09:59.90#ibcon#about to read 3, iclass 28, count 0 2006.229.02:09:59.92#ibcon#read 3, iclass 28, count 0 2006.229.02:09:59.92#ibcon#about to read 4, iclass 28, count 0 2006.229.02:09:59.92#ibcon#read 4, iclass 28, count 0 2006.229.02:09:59.92#ibcon#about to read 5, iclass 28, count 0 2006.229.02:09:59.92#ibcon#read 5, iclass 28, count 0 2006.229.02:09:59.92#ibcon#about to read 6, iclass 28, count 0 2006.229.02:09:59.92#ibcon#read 6, iclass 28, count 0 2006.229.02:09:59.92#ibcon#end of sib2, iclass 28, count 0 2006.229.02:09:59.92#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:09:59.92#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:09:59.92#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:09:59.92#ibcon#*before write, iclass 28, count 0 2006.229.02:09:59.92#ibcon#enter sib2, iclass 28, count 0 2006.229.02:09:59.92#ibcon#flushed, iclass 28, count 0 2006.229.02:09:59.92#ibcon#about to write, iclass 28, count 0 2006.229.02:09:59.92#ibcon#wrote, iclass 28, count 0 2006.229.02:09:59.92#ibcon#about to read 3, iclass 28, count 0 2006.229.02:09:59.96#ibcon#read 3, iclass 28, count 0 2006.229.02:09:59.96#ibcon#about to read 4, iclass 28, count 0 2006.229.02:09:59.96#ibcon#read 4, iclass 28, count 0 2006.229.02:09:59.96#ibcon#about to read 5, iclass 28, count 0 2006.229.02:09:59.96#ibcon#read 5, iclass 28, count 0 2006.229.02:09:59.96#ibcon#about to read 6, iclass 28, count 0 2006.229.02:09:59.96#ibcon#read 6, iclass 28, count 0 2006.229.02:09:59.96#ibcon#end of sib2, iclass 28, count 0 2006.229.02:09:59.96#ibcon#*after write, iclass 28, count 0 2006.229.02:09:59.96#ibcon#*before return 0, iclass 28, count 0 2006.229.02:09:59.96#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:09:59.96#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:09:59.96#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:09:59.96#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:09:59.96$vck44/va=2,7 2006.229.02:09:59.96#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.02:09:59.96#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.02:09:59.96#ibcon#ireg 11 cls_cnt 2 2006.229.02:09:59.96#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:00.02#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:00.02#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:00.02#ibcon#enter wrdev, iclass 30, count 2 2006.229.02:10:00.02#ibcon#first serial, iclass 30, count 2 2006.229.02:10:00.02#ibcon#enter sib2, iclass 30, count 2 2006.229.02:10:00.02#ibcon#flushed, iclass 30, count 2 2006.229.02:10:00.02#ibcon#about to write, iclass 30, count 2 2006.229.02:10:00.02#ibcon#wrote, iclass 30, count 2 2006.229.02:10:00.02#ibcon#about to read 3, iclass 30, count 2 2006.229.02:10:00.04#ibcon#read 3, iclass 30, count 2 2006.229.02:10:00.04#ibcon#about to read 4, iclass 30, count 2 2006.229.02:10:00.04#ibcon#read 4, iclass 30, count 2 2006.229.02:10:00.04#ibcon#about to read 5, iclass 30, count 2 2006.229.02:10:00.04#ibcon#read 5, iclass 30, count 2 2006.229.02:10:00.04#ibcon#about to read 6, iclass 30, count 2 2006.229.02:10:00.04#ibcon#read 6, iclass 30, count 2 2006.229.02:10:00.04#ibcon#end of sib2, iclass 30, count 2 2006.229.02:10:00.04#ibcon#*mode == 0, iclass 30, count 2 2006.229.02:10:00.04#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.02:10:00.04#ibcon#[25=AT02-07\r\n] 2006.229.02:10:00.04#ibcon#*before write, iclass 30, count 2 2006.229.02:10:00.04#ibcon#enter sib2, iclass 30, count 2 2006.229.02:10:00.04#ibcon#flushed, iclass 30, count 2 2006.229.02:10:00.04#ibcon#about to write, iclass 30, count 2 2006.229.02:10:00.04#ibcon#wrote, iclass 30, count 2 2006.229.02:10:00.04#ibcon#about to read 3, iclass 30, count 2 2006.229.02:10:00.07#ibcon#read 3, iclass 30, count 2 2006.229.02:10:00.07#ibcon#about to read 4, iclass 30, count 2 2006.229.02:10:00.07#ibcon#read 4, iclass 30, count 2 2006.229.02:10:00.07#ibcon#about to read 5, iclass 30, count 2 2006.229.02:10:00.07#ibcon#read 5, iclass 30, count 2 2006.229.02:10:00.07#ibcon#about to read 6, iclass 30, count 2 2006.229.02:10:00.07#ibcon#read 6, iclass 30, count 2 2006.229.02:10:00.07#ibcon#end of sib2, iclass 30, count 2 2006.229.02:10:00.07#ibcon#*after write, iclass 30, count 2 2006.229.02:10:00.07#ibcon#*before return 0, iclass 30, count 2 2006.229.02:10:00.07#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:00.07#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:00.07#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.02:10:00.07#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:00.07#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:00.19#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:00.19#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:00.19#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:10:00.19#ibcon#first serial, iclass 30, count 0 2006.229.02:10:00.19#ibcon#enter sib2, iclass 30, count 0 2006.229.02:10:00.19#ibcon#flushed, iclass 30, count 0 2006.229.02:10:00.19#ibcon#about to write, iclass 30, count 0 2006.229.02:10:00.19#ibcon#wrote, iclass 30, count 0 2006.229.02:10:00.19#ibcon#about to read 3, iclass 30, count 0 2006.229.02:10:00.21#ibcon#read 3, iclass 30, count 0 2006.229.02:10:00.21#ibcon#about to read 4, iclass 30, count 0 2006.229.02:10:00.21#ibcon#read 4, iclass 30, count 0 2006.229.02:10:00.21#ibcon#about to read 5, iclass 30, count 0 2006.229.02:10:00.21#ibcon#read 5, iclass 30, count 0 2006.229.02:10:00.21#ibcon#about to read 6, iclass 30, count 0 2006.229.02:10:00.21#ibcon#read 6, iclass 30, count 0 2006.229.02:10:00.21#ibcon#end of sib2, iclass 30, count 0 2006.229.02:10:00.21#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:10:00.21#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:10:00.21#ibcon#[25=USB\r\n] 2006.229.02:10:00.21#ibcon#*before write, iclass 30, count 0 2006.229.02:10:00.21#ibcon#enter sib2, iclass 30, count 0 2006.229.02:10:00.21#ibcon#flushed, iclass 30, count 0 2006.229.02:10:00.21#ibcon#about to write, iclass 30, count 0 2006.229.02:10:00.21#ibcon#wrote, iclass 30, count 0 2006.229.02:10:00.21#ibcon#about to read 3, iclass 30, count 0 2006.229.02:10:00.24#ibcon#read 3, iclass 30, count 0 2006.229.02:10:00.24#ibcon#about to read 4, iclass 30, count 0 2006.229.02:10:00.24#ibcon#read 4, iclass 30, count 0 2006.229.02:10:00.24#ibcon#about to read 5, iclass 30, count 0 2006.229.02:10:00.24#ibcon#read 5, iclass 30, count 0 2006.229.02:10:00.24#ibcon#about to read 6, iclass 30, count 0 2006.229.02:10:00.24#ibcon#read 6, iclass 30, count 0 2006.229.02:10:00.24#ibcon#end of sib2, iclass 30, count 0 2006.229.02:10:00.24#ibcon#*after write, iclass 30, count 0 2006.229.02:10:00.24#ibcon#*before return 0, iclass 30, count 0 2006.229.02:10:00.24#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:00.24#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:00.24#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:10:00.24#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:10:00.24$vck44/valo=3,564.99 2006.229.02:10:00.24#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.02:10:00.24#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.02:10:00.24#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:00.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:00.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:00.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:00.24#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:10:00.24#ibcon#first serial, iclass 32, count 0 2006.229.02:10:00.24#ibcon#enter sib2, iclass 32, count 0 2006.229.02:10:00.24#ibcon#flushed, iclass 32, count 0 2006.229.02:10:00.24#ibcon#about to write, iclass 32, count 0 2006.229.02:10:00.24#ibcon#wrote, iclass 32, count 0 2006.229.02:10:00.24#ibcon#about to read 3, iclass 32, count 0 2006.229.02:10:00.26#ibcon#read 3, iclass 32, count 0 2006.229.02:10:00.26#ibcon#about to read 4, iclass 32, count 0 2006.229.02:10:00.26#ibcon#read 4, iclass 32, count 0 2006.229.02:10:00.26#ibcon#about to read 5, iclass 32, count 0 2006.229.02:10:00.26#ibcon#read 5, iclass 32, count 0 2006.229.02:10:00.26#ibcon#about to read 6, iclass 32, count 0 2006.229.02:10:00.26#ibcon#read 6, iclass 32, count 0 2006.229.02:10:00.26#ibcon#end of sib2, iclass 32, count 0 2006.229.02:10:00.26#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:10:00.26#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:10:00.26#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:10:00.26#ibcon#*before write, iclass 32, count 0 2006.229.02:10:00.26#ibcon#enter sib2, iclass 32, count 0 2006.229.02:10:00.26#ibcon#flushed, iclass 32, count 0 2006.229.02:10:00.26#ibcon#about to write, iclass 32, count 0 2006.229.02:10:00.26#ibcon#wrote, iclass 32, count 0 2006.229.02:10:00.26#ibcon#about to read 3, iclass 32, count 0 2006.229.02:10:00.31#ibcon#read 3, iclass 32, count 0 2006.229.02:10:00.31#ibcon#about to read 4, iclass 32, count 0 2006.229.02:10:00.31#ibcon#read 4, iclass 32, count 0 2006.229.02:10:00.31#ibcon#about to read 5, iclass 32, count 0 2006.229.02:10:00.31#ibcon#read 5, iclass 32, count 0 2006.229.02:10:00.31#ibcon#about to read 6, iclass 32, count 0 2006.229.02:10:00.31#ibcon#read 6, iclass 32, count 0 2006.229.02:10:00.31#ibcon#end of sib2, iclass 32, count 0 2006.229.02:10:00.31#ibcon#*after write, iclass 32, count 0 2006.229.02:10:00.31#ibcon#*before return 0, iclass 32, count 0 2006.229.02:10:00.31#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:00.31#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:00.31#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:10:00.31#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:10:00.31$vck44/va=3,6 2006.229.02:10:00.31#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.02:10:00.31#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.02:10:00.31#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:00.31#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:00.35#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:00.35#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:00.35#ibcon#enter wrdev, iclass 34, count 2 2006.229.02:10:00.35#ibcon#first serial, iclass 34, count 2 2006.229.02:10:00.35#ibcon#enter sib2, iclass 34, count 2 2006.229.02:10:00.35#ibcon#flushed, iclass 34, count 2 2006.229.02:10:00.35#ibcon#about to write, iclass 34, count 2 2006.229.02:10:00.35#ibcon#wrote, iclass 34, count 2 2006.229.02:10:00.35#ibcon#about to read 3, iclass 34, count 2 2006.229.02:10:00.37#ibcon#read 3, iclass 34, count 2 2006.229.02:10:00.37#ibcon#about to read 4, iclass 34, count 2 2006.229.02:10:00.37#ibcon#read 4, iclass 34, count 2 2006.229.02:10:00.37#ibcon#about to read 5, iclass 34, count 2 2006.229.02:10:00.37#ibcon#read 5, iclass 34, count 2 2006.229.02:10:00.37#ibcon#about to read 6, iclass 34, count 2 2006.229.02:10:00.37#ibcon#read 6, iclass 34, count 2 2006.229.02:10:00.37#ibcon#end of sib2, iclass 34, count 2 2006.229.02:10:00.37#ibcon#*mode == 0, iclass 34, count 2 2006.229.02:10:00.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.02:10:00.37#ibcon#[25=AT03-06\r\n] 2006.229.02:10:00.37#ibcon#*before write, iclass 34, count 2 2006.229.02:10:00.37#ibcon#enter sib2, iclass 34, count 2 2006.229.02:10:00.37#ibcon#flushed, iclass 34, count 2 2006.229.02:10:00.37#ibcon#about to write, iclass 34, count 2 2006.229.02:10:00.37#ibcon#wrote, iclass 34, count 2 2006.229.02:10:00.37#ibcon#about to read 3, iclass 34, count 2 2006.229.02:10:00.41#ibcon#read 3, iclass 34, count 2 2006.229.02:10:00.41#ibcon#about to read 4, iclass 34, count 2 2006.229.02:10:00.41#ibcon#read 4, iclass 34, count 2 2006.229.02:10:00.41#ibcon#about to read 5, iclass 34, count 2 2006.229.02:10:00.41#ibcon#read 5, iclass 34, count 2 2006.229.02:10:00.41#ibcon#about to read 6, iclass 34, count 2 2006.229.02:10:00.41#ibcon#read 6, iclass 34, count 2 2006.229.02:10:00.41#ibcon#end of sib2, iclass 34, count 2 2006.229.02:10:00.41#ibcon#*after write, iclass 34, count 2 2006.229.02:10:00.41#ibcon#*before return 0, iclass 34, count 2 2006.229.02:10:00.41#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:00.41#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:00.41#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.02:10:00.41#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:00.41#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:00.52#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:00.52#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:00.52#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:10:00.52#ibcon#first serial, iclass 34, count 0 2006.229.02:10:00.52#ibcon#enter sib2, iclass 34, count 0 2006.229.02:10:00.52#ibcon#flushed, iclass 34, count 0 2006.229.02:10:00.52#ibcon#about to write, iclass 34, count 0 2006.229.02:10:00.52#ibcon#wrote, iclass 34, count 0 2006.229.02:10:00.52#ibcon#about to read 3, iclass 34, count 0 2006.229.02:10:00.54#ibcon#read 3, iclass 34, count 0 2006.229.02:10:00.54#ibcon#about to read 4, iclass 34, count 0 2006.229.02:10:00.54#ibcon#read 4, iclass 34, count 0 2006.229.02:10:00.54#ibcon#about to read 5, iclass 34, count 0 2006.229.02:10:00.54#ibcon#read 5, iclass 34, count 0 2006.229.02:10:00.54#ibcon#about to read 6, iclass 34, count 0 2006.229.02:10:00.54#ibcon#read 6, iclass 34, count 0 2006.229.02:10:00.54#ibcon#end of sib2, iclass 34, count 0 2006.229.02:10:00.54#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:10:00.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:10:00.54#ibcon#[25=USB\r\n] 2006.229.02:10:00.54#ibcon#*before write, iclass 34, count 0 2006.229.02:10:00.54#ibcon#enter sib2, iclass 34, count 0 2006.229.02:10:00.54#ibcon#flushed, iclass 34, count 0 2006.229.02:10:00.54#ibcon#about to write, iclass 34, count 0 2006.229.02:10:00.54#ibcon#wrote, iclass 34, count 0 2006.229.02:10:00.54#ibcon#about to read 3, iclass 34, count 0 2006.229.02:10:00.57#ibcon#read 3, iclass 34, count 0 2006.229.02:10:00.57#ibcon#about to read 4, iclass 34, count 0 2006.229.02:10:00.57#ibcon#read 4, iclass 34, count 0 2006.229.02:10:00.57#ibcon#about to read 5, iclass 34, count 0 2006.229.02:10:00.57#ibcon#read 5, iclass 34, count 0 2006.229.02:10:00.57#ibcon#about to read 6, iclass 34, count 0 2006.229.02:10:00.57#ibcon#read 6, iclass 34, count 0 2006.229.02:10:00.57#ibcon#end of sib2, iclass 34, count 0 2006.229.02:10:00.57#ibcon#*after write, iclass 34, count 0 2006.229.02:10:00.57#ibcon#*before return 0, iclass 34, count 0 2006.229.02:10:00.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:00.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:00.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:10:00.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:10:00.57$vck44/valo=4,624.99 2006.229.02:10:00.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.02:10:00.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.02:10:00.57#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:00.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:00.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:00.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:00.57#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:10:00.57#ibcon#first serial, iclass 36, count 0 2006.229.02:10:00.57#ibcon#enter sib2, iclass 36, count 0 2006.229.02:10:00.57#ibcon#flushed, iclass 36, count 0 2006.229.02:10:00.57#ibcon#about to write, iclass 36, count 0 2006.229.02:10:00.57#ibcon#wrote, iclass 36, count 0 2006.229.02:10:00.57#ibcon#about to read 3, iclass 36, count 0 2006.229.02:10:00.59#ibcon#read 3, iclass 36, count 0 2006.229.02:10:00.59#ibcon#about to read 4, iclass 36, count 0 2006.229.02:10:00.59#ibcon#read 4, iclass 36, count 0 2006.229.02:10:00.59#ibcon#about to read 5, iclass 36, count 0 2006.229.02:10:00.59#ibcon#read 5, iclass 36, count 0 2006.229.02:10:00.59#ibcon#about to read 6, iclass 36, count 0 2006.229.02:10:00.59#ibcon#read 6, iclass 36, count 0 2006.229.02:10:00.59#ibcon#end of sib2, iclass 36, count 0 2006.229.02:10:00.59#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:10:00.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:10:00.59#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:10:00.59#ibcon#*before write, iclass 36, count 0 2006.229.02:10:00.59#ibcon#enter sib2, iclass 36, count 0 2006.229.02:10:00.59#ibcon#flushed, iclass 36, count 0 2006.229.02:10:00.59#ibcon#about to write, iclass 36, count 0 2006.229.02:10:00.59#ibcon#wrote, iclass 36, count 0 2006.229.02:10:00.59#ibcon#about to read 3, iclass 36, count 0 2006.229.02:10:00.63#ibcon#read 3, iclass 36, count 0 2006.229.02:10:00.63#ibcon#about to read 4, iclass 36, count 0 2006.229.02:10:00.63#ibcon#read 4, iclass 36, count 0 2006.229.02:10:00.63#ibcon#about to read 5, iclass 36, count 0 2006.229.02:10:00.63#ibcon#read 5, iclass 36, count 0 2006.229.02:10:00.63#ibcon#about to read 6, iclass 36, count 0 2006.229.02:10:00.63#ibcon#read 6, iclass 36, count 0 2006.229.02:10:00.63#ibcon#end of sib2, iclass 36, count 0 2006.229.02:10:00.63#ibcon#*after write, iclass 36, count 0 2006.229.02:10:00.63#ibcon#*before return 0, iclass 36, count 0 2006.229.02:10:00.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:00.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:00.63#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:10:00.63#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:10:00.63$vck44/va=4,7 2006.229.02:10:00.63#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.02:10:00.63#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.02:10:00.63#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:00.63#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:00.69#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:00.69#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:00.69#ibcon#enter wrdev, iclass 38, count 2 2006.229.02:10:00.69#ibcon#first serial, iclass 38, count 2 2006.229.02:10:00.69#ibcon#enter sib2, iclass 38, count 2 2006.229.02:10:00.69#ibcon#flushed, iclass 38, count 2 2006.229.02:10:00.69#ibcon#about to write, iclass 38, count 2 2006.229.02:10:00.69#ibcon#wrote, iclass 38, count 2 2006.229.02:10:00.69#ibcon#about to read 3, iclass 38, count 2 2006.229.02:10:00.71#ibcon#read 3, iclass 38, count 2 2006.229.02:10:00.71#ibcon#about to read 4, iclass 38, count 2 2006.229.02:10:00.71#ibcon#read 4, iclass 38, count 2 2006.229.02:10:00.71#ibcon#about to read 5, iclass 38, count 2 2006.229.02:10:00.71#ibcon#read 5, iclass 38, count 2 2006.229.02:10:00.71#ibcon#about to read 6, iclass 38, count 2 2006.229.02:10:00.71#ibcon#read 6, iclass 38, count 2 2006.229.02:10:00.71#ibcon#end of sib2, iclass 38, count 2 2006.229.02:10:00.71#ibcon#*mode == 0, iclass 38, count 2 2006.229.02:10:00.71#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.02:10:00.71#ibcon#[25=AT04-07\r\n] 2006.229.02:10:00.71#ibcon#*before write, iclass 38, count 2 2006.229.02:10:00.71#ibcon#enter sib2, iclass 38, count 2 2006.229.02:10:00.71#ibcon#flushed, iclass 38, count 2 2006.229.02:10:00.71#ibcon#about to write, iclass 38, count 2 2006.229.02:10:00.71#ibcon#wrote, iclass 38, count 2 2006.229.02:10:00.71#ibcon#about to read 3, iclass 38, count 2 2006.229.02:10:00.74#ibcon#read 3, iclass 38, count 2 2006.229.02:10:00.74#ibcon#about to read 4, iclass 38, count 2 2006.229.02:10:00.74#ibcon#read 4, iclass 38, count 2 2006.229.02:10:00.74#ibcon#about to read 5, iclass 38, count 2 2006.229.02:10:00.74#ibcon#read 5, iclass 38, count 2 2006.229.02:10:00.74#ibcon#about to read 6, iclass 38, count 2 2006.229.02:10:00.74#ibcon#read 6, iclass 38, count 2 2006.229.02:10:00.74#ibcon#end of sib2, iclass 38, count 2 2006.229.02:10:00.74#ibcon#*after write, iclass 38, count 2 2006.229.02:10:00.74#ibcon#*before return 0, iclass 38, count 2 2006.229.02:10:00.74#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:00.74#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:00.74#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.02:10:00.74#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:00.74#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:00.86#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:00.86#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:00.86#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:10:00.86#ibcon#first serial, iclass 38, count 0 2006.229.02:10:00.86#ibcon#enter sib2, iclass 38, count 0 2006.229.02:10:00.86#ibcon#flushed, iclass 38, count 0 2006.229.02:10:00.86#ibcon#about to write, iclass 38, count 0 2006.229.02:10:00.86#ibcon#wrote, iclass 38, count 0 2006.229.02:10:00.86#ibcon#about to read 3, iclass 38, count 0 2006.229.02:10:00.88#ibcon#read 3, iclass 38, count 0 2006.229.02:10:00.88#ibcon#about to read 4, iclass 38, count 0 2006.229.02:10:00.88#ibcon#read 4, iclass 38, count 0 2006.229.02:10:00.88#ibcon#about to read 5, iclass 38, count 0 2006.229.02:10:00.88#ibcon#read 5, iclass 38, count 0 2006.229.02:10:00.88#ibcon#about to read 6, iclass 38, count 0 2006.229.02:10:00.88#ibcon#read 6, iclass 38, count 0 2006.229.02:10:00.88#ibcon#end of sib2, iclass 38, count 0 2006.229.02:10:00.88#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:10:00.88#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:10:00.88#ibcon#[25=USB\r\n] 2006.229.02:10:00.88#ibcon#*before write, iclass 38, count 0 2006.229.02:10:00.88#ibcon#enter sib2, iclass 38, count 0 2006.229.02:10:00.88#ibcon#flushed, iclass 38, count 0 2006.229.02:10:00.88#ibcon#about to write, iclass 38, count 0 2006.229.02:10:00.88#ibcon#wrote, iclass 38, count 0 2006.229.02:10:00.88#ibcon#about to read 3, iclass 38, count 0 2006.229.02:10:00.91#ibcon#read 3, iclass 38, count 0 2006.229.02:10:00.91#ibcon#about to read 4, iclass 38, count 0 2006.229.02:10:00.91#ibcon#read 4, iclass 38, count 0 2006.229.02:10:00.91#ibcon#about to read 5, iclass 38, count 0 2006.229.02:10:00.91#ibcon#read 5, iclass 38, count 0 2006.229.02:10:00.91#ibcon#about to read 6, iclass 38, count 0 2006.229.02:10:00.91#ibcon#read 6, iclass 38, count 0 2006.229.02:10:00.91#ibcon#end of sib2, iclass 38, count 0 2006.229.02:10:00.91#ibcon#*after write, iclass 38, count 0 2006.229.02:10:00.91#ibcon#*before return 0, iclass 38, count 0 2006.229.02:10:00.91#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:00.91#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:00.91#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:10:00.91#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:10:00.91$vck44/valo=5,734.99 2006.229.02:10:00.91#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.02:10:00.91#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.02:10:00.91#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:00.91#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:00.91#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:00.91#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:00.91#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:10:00.91#ibcon#first serial, iclass 40, count 0 2006.229.02:10:00.91#ibcon#enter sib2, iclass 40, count 0 2006.229.02:10:00.91#ibcon#flushed, iclass 40, count 0 2006.229.02:10:00.91#ibcon#about to write, iclass 40, count 0 2006.229.02:10:00.91#ibcon#wrote, iclass 40, count 0 2006.229.02:10:00.91#ibcon#about to read 3, iclass 40, count 0 2006.229.02:10:00.93#ibcon#read 3, iclass 40, count 0 2006.229.02:10:00.93#ibcon#about to read 4, iclass 40, count 0 2006.229.02:10:00.93#ibcon#read 4, iclass 40, count 0 2006.229.02:10:00.93#ibcon#about to read 5, iclass 40, count 0 2006.229.02:10:00.93#ibcon#read 5, iclass 40, count 0 2006.229.02:10:00.93#ibcon#about to read 6, iclass 40, count 0 2006.229.02:10:00.93#ibcon#read 6, iclass 40, count 0 2006.229.02:10:00.93#ibcon#end of sib2, iclass 40, count 0 2006.229.02:10:00.93#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:10:00.93#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:10:00.93#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:10:00.93#ibcon#*before write, iclass 40, count 0 2006.229.02:10:00.93#ibcon#enter sib2, iclass 40, count 0 2006.229.02:10:00.93#ibcon#flushed, iclass 40, count 0 2006.229.02:10:00.93#ibcon#about to write, iclass 40, count 0 2006.229.02:10:00.93#ibcon#wrote, iclass 40, count 0 2006.229.02:10:00.93#ibcon#about to read 3, iclass 40, count 0 2006.229.02:10:00.97#ibcon#read 3, iclass 40, count 0 2006.229.02:10:00.97#ibcon#about to read 4, iclass 40, count 0 2006.229.02:10:00.97#ibcon#read 4, iclass 40, count 0 2006.229.02:10:00.97#ibcon#about to read 5, iclass 40, count 0 2006.229.02:10:00.97#ibcon#read 5, iclass 40, count 0 2006.229.02:10:00.97#ibcon#about to read 6, iclass 40, count 0 2006.229.02:10:00.97#ibcon#read 6, iclass 40, count 0 2006.229.02:10:00.97#ibcon#end of sib2, iclass 40, count 0 2006.229.02:10:00.97#ibcon#*after write, iclass 40, count 0 2006.229.02:10:00.97#ibcon#*before return 0, iclass 40, count 0 2006.229.02:10:00.97#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:00.97#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:00.97#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:10:00.97#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:10:00.97$vck44/va=5,4 2006.229.02:10:00.97#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.02:10:00.97#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.02:10:00.97#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:00.97#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:01.03#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:01.03#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:01.03#ibcon#enter wrdev, iclass 4, count 2 2006.229.02:10:01.03#ibcon#first serial, iclass 4, count 2 2006.229.02:10:01.03#ibcon#enter sib2, iclass 4, count 2 2006.229.02:10:01.03#ibcon#flushed, iclass 4, count 2 2006.229.02:10:01.03#ibcon#about to write, iclass 4, count 2 2006.229.02:10:01.03#ibcon#wrote, iclass 4, count 2 2006.229.02:10:01.03#ibcon#about to read 3, iclass 4, count 2 2006.229.02:10:01.05#ibcon#read 3, iclass 4, count 2 2006.229.02:10:01.05#ibcon#about to read 4, iclass 4, count 2 2006.229.02:10:01.05#ibcon#read 4, iclass 4, count 2 2006.229.02:10:01.05#ibcon#about to read 5, iclass 4, count 2 2006.229.02:10:01.05#ibcon#read 5, iclass 4, count 2 2006.229.02:10:01.05#ibcon#about to read 6, iclass 4, count 2 2006.229.02:10:01.05#ibcon#read 6, iclass 4, count 2 2006.229.02:10:01.05#ibcon#end of sib2, iclass 4, count 2 2006.229.02:10:01.05#ibcon#*mode == 0, iclass 4, count 2 2006.229.02:10:01.05#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.02:10:01.05#ibcon#[25=AT05-04\r\n] 2006.229.02:10:01.05#ibcon#*before write, iclass 4, count 2 2006.229.02:10:01.05#ibcon#enter sib2, iclass 4, count 2 2006.229.02:10:01.05#ibcon#flushed, iclass 4, count 2 2006.229.02:10:01.05#ibcon#about to write, iclass 4, count 2 2006.229.02:10:01.05#ibcon#wrote, iclass 4, count 2 2006.229.02:10:01.05#ibcon#about to read 3, iclass 4, count 2 2006.229.02:10:01.08#ibcon#read 3, iclass 4, count 2 2006.229.02:10:01.08#ibcon#about to read 4, iclass 4, count 2 2006.229.02:10:01.08#ibcon#read 4, iclass 4, count 2 2006.229.02:10:01.08#ibcon#about to read 5, iclass 4, count 2 2006.229.02:10:01.08#ibcon#read 5, iclass 4, count 2 2006.229.02:10:01.08#ibcon#about to read 6, iclass 4, count 2 2006.229.02:10:01.08#ibcon#read 6, iclass 4, count 2 2006.229.02:10:01.08#ibcon#end of sib2, iclass 4, count 2 2006.229.02:10:01.08#ibcon#*after write, iclass 4, count 2 2006.229.02:10:01.08#ibcon#*before return 0, iclass 4, count 2 2006.229.02:10:01.08#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:01.08#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:01.08#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.02:10:01.08#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:01.08#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:01.20#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:01.20#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:01.20#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:10:01.20#ibcon#first serial, iclass 4, count 0 2006.229.02:10:01.20#ibcon#enter sib2, iclass 4, count 0 2006.229.02:10:01.20#ibcon#flushed, iclass 4, count 0 2006.229.02:10:01.20#ibcon#about to write, iclass 4, count 0 2006.229.02:10:01.20#ibcon#wrote, iclass 4, count 0 2006.229.02:10:01.20#ibcon#about to read 3, iclass 4, count 0 2006.229.02:10:01.22#ibcon#read 3, iclass 4, count 0 2006.229.02:10:01.22#ibcon#about to read 4, iclass 4, count 0 2006.229.02:10:01.22#ibcon#read 4, iclass 4, count 0 2006.229.02:10:01.22#ibcon#about to read 5, iclass 4, count 0 2006.229.02:10:01.22#ibcon#read 5, iclass 4, count 0 2006.229.02:10:01.22#ibcon#about to read 6, iclass 4, count 0 2006.229.02:10:01.22#ibcon#read 6, iclass 4, count 0 2006.229.02:10:01.22#ibcon#end of sib2, iclass 4, count 0 2006.229.02:10:01.22#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:10:01.22#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:10:01.22#ibcon#[25=USB\r\n] 2006.229.02:10:01.22#ibcon#*before write, iclass 4, count 0 2006.229.02:10:01.22#ibcon#enter sib2, iclass 4, count 0 2006.229.02:10:01.22#ibcon#flushed, iclass 4, count 0 2006.229.02:10:01.22#ibcon#about to write, iclass 4, count 0 2006.229.02:10:01.22#ibcon#wrote, iclass 4, count 0 2006.229.02:10:01.22#ibcon#about to read 3, iclass 4, count 0 2006.229.02:10:01.25#ibcon#read 3, iclass 4, count 0 2006.229.02:10:01.25#ibcon#about to read 4, iclass 4, count 0 2006.229.02:10:01.25#ibcon#read 4, iclass 4, count 0 2006.229.02:10:01.25#ibcon#about to read 5, iclass 4, count 0 2006.229.02:10:01.25#ibcon#read 5, iclass 4, count 0 2006.229.02:10:01.25#ibcon#about to read 6, iclass 4, count 0 2006.229.02:10:01.25#ibcon#read 6, iclass 4, count 0 2006.229.02:10:01.25#ibcon#end of sib2, iclass 4, count 0 2006.229.02:10:01.25#ibcon#*after write, iclass 4, count 0 2006.229.02:10:01.25#ibcon#*before return 0, iclass 4, count 0 2006.229.02:10:01.25#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:01.25#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:01.25#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:10:01.25#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:10:01.25$vck44/valo=6,814.99 2006.229.02:10:01.25#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.02:10:01.25#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.02:10:01.25#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:01.25#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:01.25#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:01.25#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:01.25#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:10:01.25#ibcon#first serial, iclass 6, count 0 2006.229.02:10:01.25#ibcon#enter sib2, iclass 6, count 0 2006.229.02:10:01.25#ibcon#flushed, iclass 6, count 0 2006.229.02:10:01.25#ibcon#about to write, iclass 6, count 0 2006.229.02:10:01.25#ibcon#wrote, iclass 6, count 0 2006.229.02:10:01.25#ibcon#about to read 3, iclass 6, count 0 2006.229.02:10:01.27#ibcon#read 3, iclass 6, count 0 2006.229.02:10:01.27#ibcon#about to read 4, iclass 6, count 0 2006.229.02:10:01.27#ibcon#read 4, iclass 6, count 0 2006.229.02:10:01.27#ibcon#about to read 5, iclass 6, count 0 2006.229.02:10:01.27#ibcon#read 5, iclass 6, count 0 2006.229.02:10:01.27#ibcon#about to read 6, iclass 6, count 0 2006.229.02:10:01.27#ibcon#read 6, iclass 6, count 0 2006.229.02:10:01.27#ibcon#end of sib2, iclass 6, count 0 2006.229.02:10:01.27#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:10:01.27#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:10:01.27#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:10:01.27#ibcon#*before write, iclass 6, count 0 2006.229.02:10:01.27#ibcon#enter sib2, iclass 6, count 0 2006.229.02:10:01.27#ibcon#flushed, iclass 6, count 0 2006.229.02:10:01.27#ibcon#about to write, iclass 6, count 0 2006.229.02:10:01.27#ibcon#wrote, iclass 6, count 0 2006.229.02:10:01.27#ibcon#about to read 3, iclass 6, count 0 2006.229.02:10:01.31#ibcon#read 3, iclass 6, count 0 2006.229.02:10:01.31#ibcon#about to read 4, iclass 6, count 0 2006.229.02:10:01.31#ibcon#read 4, iclass 6, count 0 2006.229.02:10:01.31#ibcon#about to read 5, iclass 6, count 0 2006.229.02:10:01.31#ibcon#read 5, iclass 6, count 0 2006.229.02:10:01.31#ibcon#about to read 6, iclass 6, count 0 2006.229.02:10:01.31#ibcon#read 6, iclass 6, count 0 2006.229.02:10:01.31#ibcon#end of sib2, iclass 6, count 0 2006.229.02:10:01.31#ibcon#*after write, iclass 6, count 0 2006.229.02:10:01.31#ibcon#*before return 0, iclass 6, count 0 2006.229.02:10:01.31#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:01.31#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:01.31#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:10:01.31#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:10:01.31$vck44/va=6,4 2006.229.02:10:01.31#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.02:10:01.31#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.02:10:01.31#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:01.31#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:01.37#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:01.37#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:01.37#ibcon#enter wrdev, iclass 10, count 2 2006.229.02:10:01.37#ibcon#first serial, iclass 10, count 2 2006.229.02:10:01.37#ibcon#enter sib2, iclass 10, count 2 2006.229.02:10:01.37#ibcon#flushed, iclass 10, count 2 2006.229.02:10:01.37#ibcon#about to write, iclass 10, count 2 2006.229.02:10:01.37#ibcon#wrote, iclass 10, count 2 2006.229.02:10:01.37#ibcon#about to read 3, iclass 10, count 2 2006.229.02:10:01.39#ibcon#read 3, iclass 10, count 2 2006.229.02:10:01.39#ibcon#about to read 4, iclass 10, count 2 2006.229.02:10:01.39#ibcon#read 4, iclass 10, count 2 2006.229.02:10:01.39#ibcon#about to read 5, iclass 10, count 2 2006.229.02:10:01.39#ibcon#read 5, iclass 10, count 2 2006.229.02:10:01.39#ibcon#about to read 6, iclass 10, count 2 2006.229.02:10:01.39#ibcon#read 6, iclass 10, count 2 2006.229.02:10:01.39#ibcon#end of sib2, iclass 10, count 2 2006.229.02:10:01.39#ibcon#*mode == 0, iclass 10, count 2 2006.229.02:10:01.39#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.02:10:01.39#ibcon#[25=AT06-04\r\n] 2006.229.02:10:01.39#ibcon#*before write, iclass 10, count 2 2006.229.02:10:01.39#ibcon#enter sib2, iclass 10, count 2 2006.229.02:10:01.39#ibcon#flushed, iclass 10, count 2 2006.229.02:10:01.39#ibcon#about to write, iclass 10, count 2 2006.229.02:10:01.39#ibcon#wrote, iclass 10, count 2 2006.229.02:10:01.39#ibcon#about to read 3, iclass 10, count 2 2006.229.02:10:01.42#ibcon#read 3, iclass 10, count 2 2006.229.02:10:01.42#ibcon#about to read 4, iclass 10, count 2 2006.229.02:10:01.42#ibcon#read 4, iclass 10, count 2 2006.229.02:10:01.42#ibcon#about to read 5, iclass 10, count 2 2006.229.02:10:01.42#ibcon#read 5, iclass 10, count 2 2006.229.02:10:01.42#ibcon#about to read 6, iclass 10, count 2 2006.229.02:10:01.42#ibcon#read 6, iclass 10, count 2 2006.229.02:10:01.42#ibcon#end of sib2, iclass 10, count 2 2006.229.02:10:01.42#ibcon#*after write, iclass 10, count 2 2006.229.02:10:01.42#ibcon#*before return 0, iclass 10, count 2 2006.229.02:10:01.42#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:01.42#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:01.42#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.02:10:01.42#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:01.42#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:01.54#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:01.54#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:01.54#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:10:01.54#ibcon#first serial, iclass 10, count 0 2006.229.02:10:01.54#ibcon#enter sib2, iclass 10, count 0 2006.229.02:10:01.54#ibcon#flushed, iclass 10, count 0 2006.229.02:10:01.54#ibcon#about to write, iclass 10, count 0 2006.229.02:10:01.54#ibcon#wrote, iclass 10, count 0 2006.229.02:10:01.54#ibcon#about to read 3, iclass 10, count 0 2006.229.02:10:01.56#ibcon#read 3, iclass 10, count 0 2006.229.02:10:01.56#ibcon#about to read 4, iclass 10, count 0 2006.229.02:10:01.56#ibcon#read 4, iclass 10, count 0 2006.229.02:10:01.56#ibcon#about to read 5, iclass 10, count 0 2006.229.02:10:01.56#ibcon#read 5, iclass 10, count 0 2006.229.02:10:01.56#ibcon#about to read 6, iclass 10, count 0 2006.229.02:10:01.56#ibcon#read 6, iclass 10, count 0 2006.229.02:10:01.56#ibcon#end of sib2, iclass 10, count 0 2006.229.02:10:01.56#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:10:01.56#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:10:01.56#ibcon#[25=USB\r\n] 2006.229.02:10:01.56#ibcon#*before write, iclass 10, count 0 2006.229.02:10:01.56#ibcon#enter sib2, iclass 10, count 0 2006.229.02:10:01.56#ibcon#flushed, iclass 10, count 0 2006.229.02:10:01.56#ibcon#about to write, iclass 10, count 0 2006.229.02:10:01.56#ibcon#wrote, iclass 10, count 0 2006.229.02:10:01.56#ibcon#about to read 3, iclass 10, count 0 2006.229.02:10:01.59#ibcon#read 3, iclass 10, count 0 2006.229.02:10:01.59#ibcon#about to read 4, iclass 10, count 0 2006.229.02:10:01.59#ibcon#read 4, iclass 10, count 0 2006.229.02:10:01.59#ibcon#about to read 5, iclass 10, count 0 2006.229.02:10:01.59#ibcon#read 5, iclass 10, count 0 2006.229.02:10:01.59#ibcon#about to read 6, iclass 10, count 0 2006.229.02:10:01.59#ibcon#read 6, iclass 10, count 0 2006.229.02:10:01.59#ibcon#end of sib2, iclass 10, count 0 2006.229.02:10:01.59#ibcon#*after write, iclass 10, count 0 2006.229.02:10:01.59#ibcon#*before return 0, iclass 10, count 0 2006.229.02:10:01.59#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:01.59#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:01.59#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:10:01.59#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:10:01.59$vck44/valo=7,864.99 2006.229.02:10:01.59#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.02:10:01.59#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.02:10:01.59#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:01.59#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:01.59#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:01.59#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:01.59#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:10:01.59#ibcon#first serial, iclass 12, count 0 2006.229.02:10:01.59#ibcon#enter sib2, iclass 12, count 0 2006.229.02:10:01.59#ibcon#flushed, iclass 12, count 0 2006.229.02:10:01.59#ibcon#about to write, iclass 12, count 0 2006.229.02:10:01.59#ibcon#wrote, iclass 12, count 0 2006.229.02:10:01.59#ibcon#about to read 3, iclass 12, count 0 2006.229.02:10:01.61#ibcon#read 3, iclass 12, count 0 2006.229.02:10:01.61#ibcon#about to read 4, iclass 12, count 0 2006.229.02:10:01.61#ibcon#read 4, iclass 12, count 0 2006.229.02:10:01.61#ibcon#about to read 5, iclass 12, count 0 2006.229.02:10:01.61#ibcon#read 5, iclass 12, count 0 2006.229.02:10:01.61#ibcon#about to read 6, iclass 12, count 0 2006.229.02:10:01.61#ibcon#read 6, iclass 12, count 0 2006.229.02:10:01.61#ibcon#end of sib2, iclass 12, count 0 2006.229.02:10:01.61#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:10:01.61#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:10:01.61#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:10:01.61#ibcon#*before write, iclass 12, count 0 2006.229.02:10:01.61#ibcon#enter sib2, iclass 12, count 0 2006.229.02:10:01.61#ibcon#flushed, iclass 12, count 0 2006.229.02:10:01.61#ibcon#about to write, iclass 12, count 0 2006.229.02:10:01.61#ibcon#wrote, iclass 12, count 0 2006.229.02:10:01.61#ibcon#about to read 3, iclass 12, count 0 2006.229.02:10:01.65#ibcon#read 3, iclass 12, count 0 2006.229.02:10:01.65#ibcon#about to read 4, iclass 12, count 0 2006.229.02:10:01.65#ibcon#read 4, iclass 12, count 0 2006.229.02:10:01.65#ibcon#about to read 5, iclass 12, count 0 2006.229.02:10:01.65#ibcon#read 5, iclass 12, count 0 2006.229.02:10:01.65#ibcon#about to read 6, iclass 12, count 0 2006.229.02:10:01.65#ibcon#read 6, iclass 12, count 0 2006.229.02:10:01.65#ibcon#end of sib2, iclass 12, count 0 2006.229.02:10:01.65#ibcon#*after write, iclass 12, count 0 2006.229.02:10:01.65#ibcon#*before return 0, iclass 12, count 0 2006.229.02:10:01.65#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:01.65#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:01.65#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:10:01.65#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:10:01.65$vck44/va=7,5 2006.229.02:10:01.65#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.02:10:01.65#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.02:10:01.65#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:01.65#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:01.71#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:01.71#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:01.71#ibcon#enter wrdev, iclass 14, count 2 2006.229.02:10:01.71#ibcon#first serial, iclass 14, count 2 2006.229.02:10:01.71#ibcon#enter sib2, iclass 14, count 2 2006.229.02:10:01.71#ibcon#flushed, iclass 14, count 2 2006.229.02:10:01.71#ibcon#about to write, iclass 14, count 2 2006.229.02:10:01.71#ibcon#wrote, iclass 14, count 2 2006.229.02:10:01.71#ibcon#about to read 3, iclass 14, count 2 2006.229.02:10:01.73#ibcon#read 3, iclass 14, count 2 2006.229.02:10:01.73#ibcon#about to read 4, iclass 14, count 2 2006.229.02:10:01.73#ibcon#read 4, iclass 14, count 2 2006.229.02:10:01.73#ibcon#about to read 5, iclass 14, count 2 2006.229.02:10:01.73#ibcon#read 5, iclass 14, count 2 2006.229.02:10:01.73#ibcon#about to read 6, iclass 14, count 2 2006.229.02:10:01.73#ibcon#read 6, iclass 14, count 2 2006.229.02:10:01.73#ibcon#end of sib2, iclass 14, count 2 2006.229.02:10:01.73#ibcon#*mode == 0, iclass 14, count 2 2006.229.02:10:01.73#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.02:10:01.73#ibcon#[25=AT07-05\r\n] 2006.229.02:10:01.73#ibcon#*before write, iclass 14, count 2 2006.229.02:10:01.73#ibcon#enter sib2, iclass 14, count 2 2006.229.02:10:01.73#ibcon#flushed, iclass 14, count 2 2006.229.02:10:01.73#ibcon#about to write, iclass 14, count 2 2006.229.02:10:01.73#ibcon#wrote, iclass 14, count 2 2006.229.02:10:01.73#ibcon#about to read 3, iclass 14, count 2 2006.229.02:10:01.76#ibcon#read 3, iclass 14, count 2 2006.229.02:10:01.76#ibcon#about to read 4, iclass 14, count 2 2006.229.02:10:01.76#ibcon#read 4, iclass 14, count 2 2006.229.02:10:01.76#ibcon#about to read 5, iclass 14, count 2 2006.229.02:10:01.76#ibcon#read 5, iclass 14, count 2 2006.229.02:10:01.76#ibcon#about to read 6, iclass 14, count 2 2006.229.02:10:01.76#ibcon#read 6, iclass 14, count 2 2006.229.02:10:01.76#ibcon#end of sib2, iclass 14, count 2 2006.229.02:10:01.76#ibcon#*after write, iclass 14, count 2 2006.229.02:10:01.76#ibcon#*before return 0, iclass 14, count 2 2006.229.02:10:01.76#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:01.76#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:01.76#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.02:10:01.76#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:01.76#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:01.88#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:01.88#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:01.88#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:10:01.88#ibcon#first serial, iclass 14, count 0 2006.229.02:10:01.88#ibcon#enter sib2, iclass 14, count 0 2006.229.02:10:01.88#ibcon#flushed, iclass 14, count 0 2006.229.02:10:01.88#ibcon#about to write, iclass 14, count 0 2006.229.02:10:01.88#ibcon#wrote, iclass 14, count 0 2006.229.02:10:01.88#ibcon#about to read 3, iclass 14, count 0 2006.229.02:10:01.90#ibcon#read 3, iclass 14, count 0 2006.229.02:10:01.90#ibcon#about to read 4, iclass 14, count 0 2006.229.02:10:01.90#ibcon#read 4, iclass 14, count 0 2006.229.02:10:01.90#ibcon#about to read 5, iclass 14, count 0 2006.229.02:10:01.90#ibcon#read 5, iclass 14, count 0 2006.229.02:10:01.90#ibcon#about to read 6, iclass 14, count 0 2006.229.02:10:01.90#ibcon#read 6, iclass 14, count 0 2006.229.02:10:01.90#ibcon#end of sib2, iclass 14, count 0 2006.229.02:10:01.90#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:10:01.90#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:10:01.90#ibcon#[25=USB\r\n] 2006.229.02:10:01.90#ibcon#*before write, iclass 14, count 0 2006.229.02:10:01.90#ibcon#enter sib2, iclass 14, count 0 2006.229.02:10:01.90#ibcon#flushed, iclass 14, count 0 2006.229.02:10:01.90#ibcon#about to write, iclass 14, count 0 2006.229.02:10:01.90#ibcon#wrote, iclass 14, count 0 2006.229.02:10:01.90#ibcon#about to read 3, iclass 14, count 0 2006.229.02:10:01.93#ibcon#read 3, iclass 14, count 0 2006.229.02:10:01.93#ibcon#about to read 4, iclass 14, count 0 2006.229.02:10:01.93#ibcon#read 4, iclass 14, count 0 2006.229.02:10:01.93#ibcon#about to read 5, iclass 14, count 0 2006.229.02:10:01.93#ibcon#read 5, iclass 14, count 0 2006.229.02:10:01.93#ibcon#about to read 6, iclass 14, count 0 2006.229.02:10:01.93#ibcon#read 6, iclass 14, count 0 2006.229.02:10:01.93#ibcon#end of sib2, iclass 14, count 0 2006.229.02:10:01.93#ibcon#*after write, iclass 14, count 0 2006.229.02:10:01.93#ibcon#*before return 0, iclass 14, count 0 2006.229.02:10:01.93#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:01.93#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:01.93#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:10:01.93#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:10:01.93$vck44/valo=8,884.99 2006.229.02:10:01.93#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.02:10:01.93#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.02:10:01.93#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:01.93#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:01.93#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:01.93#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:01.93#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:10:01.93#ibcon#first serial, iclass 16, count 0 2006.229.02:10:01.93#ibcon#enter sib2, iclass 16, count 0 2006.229.02:10:01.93#ibcon#flushed, iclass 16, count 0 2006.229.02:10:01.93#ibcon#about to write, iclass 16, count 0 2006.229.02:10:01.93#ibcon#wrote, iclass 16, count 0 2006.229.02:10:01.93#ibcon#about to read 3, iclass 16, count 0 2006.229.02:10:01.95#ibcon#read 3, iclass 16, count 0 2006.229.02:10:01.95#ibcon#about to read 4, iclass 16, count 0 2006.229.02:10:01.95#ibcon#read 4, iclass 16, count 0 2006.229.02:10:01.95#ibcon#about to read 5, iclass 16, count 0 2006.229.02:10:01.95#ibcon#read 5, iclass 16, count 0 2006.229.02:10:01.95#ibcon#about to read 6, iclass 16, count 0 2006.229.02:10:01.95#ibcon#read 6, iclass 16, count 0 2006.229.02:10:01.95#ibcon#end of sib2, iclass 16, count 0 2006.229.02:10:01.95#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:10:01.95#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:10:01.95#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:10:01.95#ibcon#*before write, iclass 16, count 0 2006.229.02:10:01.95#ibcon#enter sib2, iclass 16, count 0 2006.229.02:10:01.95#ibcon#flushed, iclass 16, count 0 2006.229.02:10:01.95#ibcon#about to write, iclass 16, count 0 2006.229.02:10:01.95#ibcon#wrote, iclass 16, count 0 2006.229.02:10:01.95#ibcon#about to read 3, iclass 16, count 0 2006.229.02:10:01.99#ibcon#read 3, iclass 16, count 0 2006.229.02:10:01.99#ibcon#about to read 4, iclass 16, count 0 2006.229.02:10:01.99#ibcon#read 4, iclass 16, count 0 2006.229.02:10:01.99#ibcon#about to read 5, iclass 16, count 0 2006.229.02:10:01.99#ibcon#read 5, iclass 16, count 0 2006.229.02:10:01.99#ibcon#about to read 6, iclass 16, count 0 2006.229.02:10:01.99#ibcon#read 6, iclass 16, count 0 2006.229.02:10:01.99#ibcon#end of sib2, iclass 16, count 0 2006.229.02:10:01.99#ibcon#*after write, iclass 16, count 0 2006.229.02:10:01.99#ibcon#*before return 0, iclass 16, count 0 2006.229.02:10:01.99#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:01.99#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:01.99#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:10:01.99#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:10:01.99$vck44/va=8,6 2006.229.02:10:01.99#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.02:10:01.99#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.02:10:01.99#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:01.99#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:10:02.06#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:10:02.06#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:10:02.06#ibcon#enter wrdev, iclass 18, count 2 2006.229.02:10:02.06#ibcon#first serial, iclass 18, count 2 2006.229.02:10:02.06#ibcon#enter sib2, iclass 18, count 2 2006.229.02:10:02.06#ibcon#flushed, iclass 18, count 2 2006.229.02:10:02.06#ibcon#about to write, iclass 18, count 2 2006.229.02:10:02.06#ibcon#wrote, iclass 18, count 2 2006.229.02:10:02.06#ibcon#about to read 3, iclass 18, count 2 2006.229.02:10:02.07#ibcon#read 3, iclass 18, count 2 2006.229.02:10:02.07#ibcon#about to read 4, iclass 18, count 2 2006.229.02:10:02.07#ibcon#read 4, iclass 18, count 2 2006.229.02:10:02.07#ibcon#about to read 5, iclass 18, count 2 2006.229.02:10:02.07#ibcon#read 5, iclass 18, count 2 2006.229.02:10:02.07#ibcon#about to read 6, iclass 18, count 2 2006.229.02:10:02.07#ibcon#read 6, iclass 18, count 2 2006.229.02:10:02.07#ibcon#end of sib2, iclass 18, count 2 2006.229.02:10:02.07#ibcon#*mode == 0, iclass 18, count 2 2006.229.02:10:02.07#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.02:10:02.07#ibcon#[25=AT08-06\r\n] 2006.229.02:10:02.07#ibcon#*before write, iclass 18, count 2 2006.229.02:10:02.07#ibcon#enter sib2, iclass 18, count 2 2006.229.02:10:02.07#ibcon#flushed, iclass 18, count 2 2006.229.02:10:02.07#ibcon#about to write, iclass 18, count 2 2006.229.02:10:02.07#ibcon#wrote, iclass 18, count 2 2006.229.02:10:02.07#ibcon#about to read 3, iclass 18, count 2 2006.229.02:10:02.10#ibcon#read 3, iclass 18, count 2 2006.229.02:10:02.10#ibcon#about to read 4, iclass 18, count 2 2006.229.02:10:02.10#ibcon#read 4, iclass 18, count 2 2006.229.02:10:02.10#ibcon#about to read 5, iclass 18, count 2 2006.229.02:10:02.10#ibcon#read 5, iclass 18, count 2 2006.229.02:10:02.10#ibcon#about to read 6, iclass 18, count 2 2006.229.02:10:02.10#ibcon#read 6, iclass 18, count 2 2006.229.02:10:02.10#ibcon#end of sib2, iclass 18, count 2 2006.229.02:10:02.10#ibcon#*after write, iclass 18, count 2 2006.229.02:10:02.10#ibcon#*before return 0, iclass 18, count 2 2006.229.02:10:02.10#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:10:02.10#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:10:02.10#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.02:10:02.10#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:02.10#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:10:02.22#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:10:02.22#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:10:02.22#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:10:02.22#ibcon#first serial, iclass 18, count 0 2006.229.02:10:02.22#ibcon#enter sib2, iclass 18, count 0 2006.229.02:10:02.22#ibcon#flushed, iclass 18, count 0 2006.229.02:10:02.22#ibcon#about to write, iclass 18, count 0 2006.229.02:10:02.22#ibcon#wrote, iclass 18, count 0 2006.229.02:10:02.22#ibcon#about to read 3, iclass 18, count 0 2006.229.02:10:02.24#ibcon#read 3, iclass 18, count 0 2006.229.02:10:02.24#ibcon#about to read 4, iclass 18, count 0 2006.229.02:10:02.24#ibcon#read 4, iclass 18, count 0 2006.229.02:10:02.24#ibcon#about to read 5, iclass 18, count 0 2006.229.02:10:02.24#ibcon#read 5, iclass 18, count 0 2006.229.02:10:02.24#ibcon#about to read 6, iclass 18, count 0 2006.229.02:10:02.24#ibcon#read 6, iclass 18, count 0 2006.229.02:10:02.24#ibcon#end of sib2, iclass 18, count 0 2006.229.02:10:02.24#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:10:02.24#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:10:02.24#ibcon#[25=USB\r\n] 2006.229.02:10:02.24#ibcon#*before write, iclass 18, count 0 2006.229.02:10:02.24#ibcon#enter sib2, iclass 18, count 0 2006.229.02:10:02.24#ibcon#flushed, iclass 18, count 0 2006.229.02:10:02.24#ibcon#about to write, iclass 18, count 0 2006.229.02:10:02.24#ibcon#wrote, iclass 18, count 0 2006.229.02:10:02.24#ibcon#about to read 3, iclass 18, count 0 2006.229.02:10:02.27#ibcon#read 3, iclass 18, count 0 2006.229.02:10:02.27#ibcon#about to read 4, iclass 18, count 0 2006.229.02:10:02.27#ibcon#read 4, iclass 18, count 0 2006.229.02:10:02.27#ibcon#about to read 5, iclass 18, count 0 2006.229.02:10:02.27#ibcon#read 5, iclass 18, count 0 2006.229.02:10:02.27#ibcon#about to read 6, iclass 18, count 0 2006.229.02:10:02.27#ibcon#read 6, iclass 18, count 0 2006.229.02:10:02.27#ibcon#end of sib2, iclass 18, count 0 2006.229.02:10:02.27#ibcon#*after write, iclass 18, count 0 2006.229.02:10:02.27#ibcon#*before return 0, iclass 18, count 0 2006.229.02:10:02.27#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:10:02.27#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:10:02.27#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:10:02.27#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:10:02.27$vck44/vblo=1,629.99 2006.229.02:10:02.27#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.02:10:02.27#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.02:10:02.27#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:02.27#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:10:02.27#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:10:02.27#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:10:02.27#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:10:02.27#ibcon#first serial, iclass 20, count 0 2006.229.02:10:02.27#ibcon#enter sib2, iclass 20, count 0 2006.229.02:10:02.27#ibcon#flushed, iclass 20, count 0 2006.229.02:10:02.27#ibcon#about to write, iclass 20, count 0 2006.229.02:10:02.27#ibcon#wrote, iclass 20, count 0 2006.229.02:10:02.27#ibcon#about to read 3, iclass 20, count 0 2006.229.02:10:02.29#ibcon#read 3, iclass 20, count 0 2006.229.02:10:02.29#ibcon#about to read 4, iclass 20, count 0 2006.229.02:10:02.29#ibcon#read 4, iclass 20, count 0 2006.229.02:10:02.29#ibcon#about to read 5, iclass 20, count 0 2006.229.02:10:02.29#ibcon#read 5, iclass 20, count 0 2006.229.02:10:02.29#ibcon#about to read 6, iclass 20, count 0 2006.229.02:10:02.29#ibcon#read 6, iclass 20, count 0 2006.229.02:10:02.29#ibcon#end of sib2, iclass 20, count 0 2006.229.02:10:02.29#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:10:02.29#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:10:02.29#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:10:02.29#ibcon#*before write, iclass 20, count 0 2006.229.02:10:02.29#ibcon#enter sib2, iclass 20, count 0 2006.229.02:10:02.29#ibcon#flushed, iclass 20, count 0 2006.229.02:10:02.29#ibcon#about to write, iclass 20, count 0 2006.229.02:10:02.29#ibcon#wrote, iclass 20, count 0 2006.229.02:10:02.29#ibcon#about to read 3, iclass 20, count 0 2006.229.02:10:02.33#ibcon#read 3, iclass 20, count 0 2006.229.02:10:02.33#ibcon#about to read 4, iclass 20, count 0 2006.229.02:10:02.33#ibcon#read 4, iclass 20, count 0 2006.229.02:10:02.33#ibcon#about to read 5, iclass 20, count 0 2006.229.02:10:02.33#ibcon#read 5, iclass 20, count 0 2006.229.02:10:02.33#ibcon#about to read 6, iclass 20, count 0 2006.229.02:10:02.33#ibcon#read 6, iclass 20, count 0 2006.229.02:10:02.33#ibcon#end of sib2, iclass 20, count 0 2006.229.02:10:02.33#ibcon#*after write, iclass 20, count 0 2006.229.02:10:02.33#ibcon#*before return 0, iclass 20, count 0 2006.229.02:10:02.33#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:10:02.33#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:10:02.33#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:10:02.33#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:10:02.33$vck44/vb=1,4 2006.229.02:10:02.33#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.02:10:02.33#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.02:10:02.33#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:02.33#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:10:02.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:10:02.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:10:02.33#ibcon#enter wrdev, iclass 22, count 2 2006.229.02:10:02.33#ibcon#first serial, iclass 22, count 2 2006.229.02:10:02.33#ibcon#enter sib2, iclass 22, count 2 2006.229.02:10:02.33#ibcon#flushed, iclass 22, count 2 2006.229.02:10:02.33#ibcon#about to write, iclass 22, count 2 2006.229.02:10:02.33#ibcon#wrote, iclass 22, count 2 2006.229.02:10:02.33#ibcon#about to read 3, iclass 22, count 2 2006.229.02:10:02.35#ibcon#read 3, iclass 22, count 2 2006.229.02:10:02.35#ibcon#about to read 4, iclass 22, count 2 2006.229.02:10:02.35#ibcon#read 4, iclass 22, count 2 2006.229.02:10:02.35#ibcon#about to read 5, iclass 22, count 2 2006.229.02:10:02.35#ibcon#read 5, iclass 22, count 2 2006.229.02:10:02.35#ibcon#about to read 6, iclass 22, count 2 2006.229.02:10:02.35#ibcon#read 6, iclass 22, count 2 2006.229.02:10:02.35#ibcon#end of sib2, iclass 22, count 2 2006.229.02:10:02.35#ibcon#*mode == 0, iclass 22, count 2 2006.229.02:10:02.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.02:10:02.35#ibcon#[27=AT01-04\r\n] 2006.229.02:10:02.35#ibcon#*before write, iclass 22, count 2 2006.229.02:10:02.35#ibcon#enter sib2, iclass 22, count 2 2006.229.02:10:02.35#ibcon#flushed, iclass 22, count 2 2006.229.02:10:02.35#ibcon#about to write, iclass 22, count 2 2006.229.02:10:02.35#ibcon#wrote, iclass 22, count 2 2006.229.02:10:02.35#ibcon#about to read 3, iclass 22, count 2 2006.229.02:10:02.38#ibcon#read 3, iclass 22, count 2 2006.229.02:10:02.38#ibcon#about to read 4, iclass 22, count 2 2006.229.02:10:02.38#ibcon#read 4, iclass 22, count 2 2006.229.02:10:02.38#ibcon#about to read 5, iclass 22, count 2 2006.229.02:10:02.38#ibcon#read 5, iclass 22, count 2 2006.229.02:10:02.38#ibcon#about to read 6, iclass 22, count 2 2006.229.02:10:02.38#ibcon#read 6, iclass 22, count 2 2006.229.02:10:02.38#ibcon#end of sib2, iclass 22, count 2 2006.229.02:10:02.38#ibcon#*after write, iclass 22, count 2 2006.229.02:10:02.38#ibcon#*before return 0, iclass 22, count 2 2006.229.02:10:02.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:10:02.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:10:02.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.02:10:02.38#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:02.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:10:02.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:10:02.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:10:02.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:10:02.50#ibcon#first serial, iclass 22, count 0 2006.229.02:10:02.50#ibcon#enter sib2, iclass 22, count 0 2006.229.02:10:02.50#ibcon#flushed, iclass 22, count 0 2006.229.02:10:02.50#ibcon#about to write, iclass 22, count 0 2006.229.02:10:02.50#ibcon#wrote, iclass 22, count 0 2006.229.02:10:02.50#ibcon#about to read 3, iclass 22, count 0 2006.229.02:10:02.52#ibcon#read 3, iclass 22, count 0 2006.229.02:10:02.52#ibcon#about to read 4, iclass 22, count 0 2006.229.02:10:02.52#ibcon#read 4, iclass 22, count 0 2006.229.02:10:02.52#ibcon#about to read 5, iclass 22, count 0 2006.229.02:10:02.52#ibcon#read 5, iclass 22, count 0 2006.229.02:10:02.52#ibcon#about to read 6, iclass 22, count 0 2006.229.02:10:02.52#ibcon#read 6, iclass 22, count 0 2006.229.02:10:02.52#ibcon#end of sib2, iclass 22, count 0 2006.229.02:10:02.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:10:02.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:10:02.52#ibcon#[27=USB\r\n] 2006.229.02:10:02.52#ibcon#*before write, iclass 22, count 0 2006.229.02:10:02.52#ibcon#enter sib2, iclass 22, count 0 2006.229.02:10:02.52#ibcon#flushed, iclass 22, count 0 2006.229.02:10:02.52#ibcon#about to write, iclass 22, count 0 2006.229.02:10:02.52#ibcon#wrote, iclass 22, count 0 2006.229.02:10:02.52#ibcon#about to read 3, iclass 22, count 0 2006.229.02:10:02.55#ibcon#read 3, iclass 22, count 0 2006.229.02:10:02.55#ibcon#about to read 4, iclass 22, count 0 2006.229.02:10:02.55#ibcon#read 4, iclass 22, count 0 2006.229.02:10:02.55#ibcon#about to read 5, iclass 22, count 0 2006.229.02:10:02.55#ibcon#read 5, iclass 22, count 0 2006.229.02:10:02.55#ibcon#about to read 6, iclass 22, count 0 2006.229.02:10:02.55#ibcon#read 6, iclass 22, count 0 2006.229.02:10:02.55#ibcon#end of sib2, iclass 22, count 0 2006.229.02:10:02.55#ibcon#*after write, iclass 22, count 0 2006.229.02:10:02.55#ibcon#*before return 0, iclass 22, count 0 2006.229.02:10:02.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:10:02.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:10:02.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:10:02.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:10:02.55$vck44/vblo=2,634.99 2006.229.02:10:02.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.02:10:02.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.02:10:02.55#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:02.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:10:02.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:10:02.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:10:02.55#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:10:02.55#ibcon#first serial, iclass 24, count 0 2006.229.02:10:02.55#ibcon#enter sib2, iclass 24, count 0 2006.229.02:10:02.55#ibcon#flushed, iclass 24, count 0 2006.229.02:10:02.55#ibcon#about to write, iclass 24, count 0 2006.229.02:10:02.55#ibcon#wrote, iclass 24, count 0 2006.229.02:10:02.55#ibcon#about to read 3, iclass 24, count 0 2006.229.02:10:02.57#ibcon#read 3, iclass 24, count 0 2006.229.02:10:02.57#ibcon#about to read 4, iclass 24, count 0 2006.229.02:10:02.57#ibcon#read 4, iclass 24, count 0 2006.229.02:10:02.57#ibcon#about to read 5, iclass 24, count 0 2006.229.02:10:02.57#ibcon#read 5, iclass 24, count 0 2006.229.02:10:02.57#ibcon#about to read 6, iclass 24, count 0 2006.229.02:10:02.57#ibcon#read 6, iclass 24, count 0 2006.229.02:10:02.57#ibcon#end of sib2, iclass 24, count 0 2006.229.02:10:02.57#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:10:02.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:10:02.57#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:10:02.57#ibcon#*before write, iclass 24, count 0 2006.229.02:10:02.57#ibcon#enter sib2, iclass 24, count 0 2006.229.02:10:02.57#ibcon#flushed, iclass 24, count 0 2006.229.02:10:02.57#ibcon#about to write, iclass 24, count 0 2006.229.02:10:02.57#ibcon#wrote, iclass 24, count 0 2006.229.02:10:02.57#ibcon#about to read 3, iclass 24, count 0 2006.229.02:10:02.61#ibcon#read 3, iclass 24, count 0 2006.229.02:10:02.61#ibcon#about to read 4, iclass 24, count 0 2006.229.02:10:02.61#ibcon#read 4, iclass 24, count 0 2006.229.02:10:02.61#ibcon#about to read 5, iclass 24, count 0 2006.229.02:10:02.61#ibcon#read 5, iclass 24, count 0 2006.229.02:10:02.61#ibcon#about to read 6, iclass 24, count 0 2006.229.02:10:02.61#ibcon#read 6, iclass 24, count 0 2006.229.02:10:02.61#ibcon#end of sib2, iclass 24, count 0 2006.229.02:10:02.61#ibcon#*after write, iclass 24, count 0 2006.229.02:10:02.61#ibcon#*before return 0, iclass 24, count 0 2006.229.02:10:02.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:10:02.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:10:02.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:10:02.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:10:02.61$vck44/vb=2,4 2006.229.02:10:02.61#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.02:10:02.61#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.02:10:02.61#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:02.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:10:02.67#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:10:02.67#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:10:02.67#ibcon#enter wrdev, iclass 26, count 2 2006.229.02:10:02.67#ibcon#first serial, iclass 26, count 2 2006.229.02:10:02.67#ibcon#enter sib2, iclass 26, count 2 2006.229.02:10:02.67#ibcon#flushed, iclass 26, count 2 2006.229.02:10:02.67#ibcon#about to write, iclass 26, count 2 2006.229.02:10:02.67#ibcon#wrote, iclass 26, count 2 2006.229.02:10:02.67#ibcon#about to read 3, iclass 26, count 2 2006.229.02:10:02.69#ibcon#read 3, iclass 26, count 2 2006.229.02:10:02.69#ibcon#about to read 4, iclass 26, count 2 2006.229.02:10:02.69#ibcon#read 4, iclass 26, count 2 2006.229.02:10:02.69#ibcon#about to read 5, iclass 26, count 2 2006.229.02:10:02.69#ibcon#read 5, iclass 26, count 2 2006.229.02:10:02.69#ibcon#about to read 6, iclass 26, count 2 2006.229.02:10:02.69#ibcon#read 6, iclass 26, count 2 2006.229.02:10:02.69#ibcon#end of sib2, iclass 26, count 2 2006.229.02:10:02.69#ibcon#*mode == 0, iclass 26, count 2 2006.229.02:10:02.69#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.02:10:02.69#ibcon#[27=AT02-04\r\n] 2006.229.02:10:02.69#ibcon#*before write, iclass 26, count 2 2006.229.02:10:02.69#ibcon#enter sib2, iclass 26, count 2 2006.229.02:10:02.69#ibcon#flushed, iclass 26, count 2 2006.229.02:10:02.69#ibcon#about to write, iclass 26, count 2 2006.229.02:10:02.69#ibcon#wrote, iclass 26, count 2 2006.229.02:10:02.69#ibcon#about to read 3, iclass 26, count 2 2006.229.02:10:02.72#ibcon#read 3, iclass 26, count 2 2006.229.02:10:02.72#ibcon#about to read 4, iclass 26, count 2 2006.229.02:10:02.72#ibcon#read 4, iclass 26, count 2 2006.229.02:10:02.72#ibcon#about to read 5, iclass 26, count 2 2006.229.02:10:02.72#ibcon#read 5, iclass 26, count 2 2006.229.02:10:02.72#ibcon#about to read 6, iclass 26, count 2 2006.229.02:10:02.72#ibcon#read 6, iclass 26, count 2 2006.229.02:10:02.72#ibcon#end of sib2, iclass 26, count 2 2006.229.02:10:02.72#ibcon#*after write, iclass 26, count 2 2006.229.02:10:02.72#ibcon#*before return 0, iclass 26, count 2 2006.229.02:10:02.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:10:02.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:10:02.72#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.02:10:02.72#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:02.72#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:10:02.84#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:10:02.84#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:10:02.84#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:10:02.84#ibcon#first serial, iclass 26, count 0 2006.229.02:10:02.84#ibcon#enter sib2, iclass 26, count 0 2006.229.02:10:02.84#ibcon#flushed, iclass 26, count 0 2006.229.02:10:02.84#ibcon#about to write, iclass 26, count 0 2006.229.02:10:02.84#ibcon#wrote, iclass 26, count 0 2006.229.02:10:02.84#ibcon#about to read 3, iclass 26, count 0 2006.229.02:10:02.86#ibcon#read 3, iclass 26, count 0 2006.229.02:10:02.86#ibcon#about to read 4, iclass 26, count 0 2006.229.02:10:02.86#ibcon#read 4, iclass 26, count 0 2006.229.02:10:02.86#ibcon#about to read 5, iclass 26, count 0 2006.229.02:10:02.86#ibcon#read 5, iclass 26, count 0 2006.229.02:10:02.86#ibcon#about to read 6, iclass 26, count 0 2006.229.02:10:02.86#ibcon#read 6, iclass 26, count 0 2006.229.02:10:02.86#ibcon#end of sib2, iclass 26, count 0 2006.229.02:10:02.86#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:10:02.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:10:02.86#ibcon#[27=USB\r\n] 2006.229.02:10:02.86#ibcon#*before write, iclass 26, count 0 2006.229.02:10:02.86#ibcon#enter sib2, iclass 26, count 0 2006.229.02:10:02.86#ibcon#flushed, iclass 26, count 0 2006.229.02:10:02.86#ibcon#about to write, iclass 26, count 0 2006.229.02:10:02.86#ibcon#wrote, iclass 26, count 0 2006.229.02:10:02.86#ibcon#about to read 3, iclass 26, count 0 2006.229.02:10:02.89#ibcon#read 3, iclass 26, count 0 2006.229.02:10:02.89#ibcon#about to read 4, iclass 26, count 0 2006.229.02:10:02.89#ibcon#read 4, iclass 26, count 0 2006.229.02:10:02.89#ibcon#about to read 5, iclass 26, count 0 2006.229.02:10:02.89#ibcon#read 5, iclass 26, count 0 2006.229.02:10:02.89#ibcon#about to read 6, iclass 26, count 0 2006.229.02:10:02.89#ibcon#read 6, iclass 26, count 0 2006.229.02:10:02.89#ibcon#end of sib2, iclass 26, count 0 2006.229.02:10:02.89#ibcon#*after write, iclass 26, count 0 2006.229.02:10:02.89#ibcon#*before return 0, iclass 26, count 0 2006.229.02:10:02.89#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:10:02.89#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:10:02.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:10:02.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:10:02.89$vck44/vblo=3,649.99 2006.229.02:10:02.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.02:10:02.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.02:10:02.89#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:02.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:10:02.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:10:02.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:10:02.89#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:10:02.89#ibcon#first serial, iclass 28, count 0 2006.229.02:10:02.89#ibcon#enter sib2, iclass 28, count 0 2006.229.02:10:02.89#ibcon#flushed, iclass 28, count 0 2006.229.02:10:02.89#ibcon#about to write, iclass 28, count 0 2006.229.02:10:02.89#ibcon#wrote, iclass 28, count 0 2006.229.02:10:02.89#ibcon#about to read 3, iclass 28, count 0 2006.229.02:10:02.91#ibcon#read 3, iclass 28, count 0 2006.229.02:10:02.91#ibcon#about to read 4, iclass 28, count 0 2006.229.02:10:02.91#ibcon#read 4, iclass 28, count 0 2006.229.02:10:02.91#ibcon#about to read 5, iclass 28, count 0 2006.229.02:10:02.91#ibcon#read 5, iclass 28, count 0 2006.229.02:10:02.91#ibcon#about to read 6, iclass 28, count 0 2006.229.02:10:02.91#ibcon#read 6, iclass 28, count 0 2006.229.02:10:02.91#ibcon#end of sib2, iclass 28, count 0 2006.229.02:10:02.91#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:10:02.91#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:10:02.91#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:10:02.91#ibcon#*before write, iclass 28, count 0 2006.229.02:10:02.91#ibcon#enter sib2, iclass 28, count 0 2006.229.02:10:02.91#ibcon#flushed, iclass 28, count 0 2006.229.02:10:02.91#ibcon#about to write, iclass 28, count 0 2006.229.02:10:02.91#ibcon#wrote, iclass 28, count 0 2006.229.02:10:02.91#ibcon#about to read 3, iclass 28, count 0 2006.229.02:10:02.95#ibcon#read 3, iclass 28, count 0 2006.229.02:10:02.95#ibcon#about to read 4, iclass 28, count 0 2006.229.02:10:02.95#ibcon#read 4, iclass 28, count 0 2006.229.02:10:02.95#ibcon#about to read 5, iclass 28, count 0 2006.229.02:10:02.95#ibcon#read 5, iclass 28, count 0 2006.229.02:10:02.95#ibcon#about to read 6, iclass 28, count 0 2006.229.02:10:02.95#ibcon#read 6, iclass 28, count 0 2006.229.02:10:02.95#ibcon#end of sib2, iclass 28, count 0 2006.229.02:10:02.95#ibcon#*after write, iclass 28, count 0 2006.229.02:10:02.95#ibcon#*before return 0, iclass 28, count 0 2006.229.02:10:02.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:10:02.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:10:02.95#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:10:02.95#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:10:02.95$vck44/vb=3,4 2006.229.02:10:02.95#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.02:10:02.95#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.02:10:02.95#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:02.95#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:03.01#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:03.01#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:03.01#ibcon#enter wrdev, iclass 30, count 2 2006.229.02:10:03.01#ibcon#first serial, iclass 30, count 2 2006.229.02:10:03.01#ibcon#enter sib2, iclass 30, count 2 2006.229.02:10:03.01#ibcon#flushed, iclass 30, count 2 2006.229.02:10:03.01#ibcon#about to write, iclass 30, count 2 2006.229.02:10:03.01#ibcon#wrote, iclass 30, count 2 2006.229.02:10:03.01#ibcon#about to read 3, iclass 30, count 2 2006.229.02:10:03.03#ibcon#read 3, iclass 30, count 2 2006.229.02:10:03.03#ibcon#about to read 4, iclass 30, count 2 2006.229.02:10:03.03#ibcon#read 4, iclass 30, count 2 2006.229.02:10:03.03#ibcon#about to read 5, iclass 30, count 2 2006.229.02:10:03.03#ibcon#read 5, iclass 30, count 2 2006.229.02:10:03.03#ibcon#about to read 6, iclass 30, count 2 2006.229.02:10:03.03#ibcon#read 6, iclass 30, count 2 2006.229.02:10:03.03#ibcon#end of sib2, iclass 30, count 2 2006.229.02:10:03.03#ibcon#*mode == 0, iclass 30, count 2 2006.229.02:10:03.03#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.02:10:03.03#ibcon#[27=AT03-04\r\n] 2006.229.02:10:03.03#ibcon#*before write, iclass 30, count 2 2006.229.02:10:03.03#ibcon#enter sib2, iclass 30, count 2 2006.229.02:10:03.03#ibcon#flushed, iclass 30, count 2 2006.229.02:10:03.03#ibcon#about to write, iclass 30, count 2 2006.229.02:10:03.03#ibcon#wrote, iclass 30, count 2 2006.229.02:10:03.03#ibcon#about to read 3, iclass 30, count 2 2006.229.02:10:03.06#ibcon#read 3, iclass 30, count 2 2006.229.02:10:03.06#ibcon#about to read 4, iclass 30, count 2 2006.229.02:10:03.06#ibcon#read 4, iclass 30, count 2 2006.229.02:10:03.06#ibcon#about to read 5, iclass 30, count 2 2006.229.02:10:03.06#ibcon#read 5, iclass 30, count 2 2006.229.02:10:03.06#ibcon#about to read 6, iclass 30, count 2 2006.229.02:10:03.06#ibcon#read 6, iclass 30, count 2 2006.229.02:10:03.06#ibcon#end of sib2, iclass 30, count 2 2006.229.02:10:03.06#ibcon#*after write, iclass 30, count 2 2006.229.02:10:03.06#ibcon#*before return 0, iclass 30, count 2 2006.229.02:10:03.06#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:03.06#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:10:03.06#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.02:10:03.06#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:03.06#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:03.18#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:03.18#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:03.18#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:10:03.18#ibcon#first serial, iclass 30, count 0 2006.229.02:10:03.18#ibcon#enter sib2, iclass 30, count 0 2006.229.02:10:03.18#ibcon#flushed, iclass 30, count 0 2006.229.02:10:03.18#ibcon#about to write, iclass 30, count 0 2006.229.02:10:03.18#ibcon#wrote, iclass 30, count 0 2006.229.02:10:03.18#ibcon#about to read 3, iclass 30, count 0 2006.229.02:10:03.20#ibcon#read 3, iclass 30, count 0 2006.229.02:10:03.20#ibcon#about to read 4, iclass 30, count 0 2006.229.02:10:03.20#ibcon#read 4, iclass 30, count 0 2006.229.02:10:03.20#ibcon#about to read 5, iclass 30, count 0 2006.229.02:10:03.20#ibcon#read 5, iclass 30, count 0 2006.229.02:10:03.20#ibcon#about to read 6, iclass 30, count 0 2006.229.02:10:03.20#ibcon#read 6, iclass 30, count 0 2006.229.02:10:03.20#ibcon#end of sib2, iclass 30, count 0 2006.229.02:10:03.20#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:10:03.20#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:10:03.20#ibcon#[27=USB\r\n] 2006.229.02:10:03.20#ibcon#*before write, iclass 30, count 0 2006.229.02:10:03.20#ibcon#enter sib2, iclass 30, count 0 2006.229.02:10:03.20#ibcon#flushed, iclass 30, count 0 2006.229.02:10:03.20#ibcon#about to write, iclass 30, count 0 2006.229.02:10:03.20#ibcon#wrote, iclass 30, count 0 2006.229.02:10:03.20#ibcon#about to read 3, iclass 30, count 0 2006.229.02:10:03.23#ibcon#read 3, iclass 30, count 0 2006.229.02:10:03.23#ibcon#about to read 4, iclass 30, count 0 2006.229.02:10:03.23#ibcon#read 4, iclass 30, count 0 2006.229.02:10:03.23#ibcon#about to read 5, iclass 30, count 0 2006.229.02:10:03.23#ibcon#read 5, iclass 30, count 0 2006.229.02:10:03.23#ibcon#about to read 6, iclass 30, count 0 2006.229.02:10:03.23#ibcon#read 6, iclass 30, count 0 2006.229.02:10:03.23#ibcon#end of sib2, iclass 30, count 0 2006.229.02:10:03.23#ibcon#*after write, iclass 30, count 0 2006.229.02:10:03.23#ibcon#*before return 0, iclass 30, count 0 2006.229.02:10:03.23#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:03.23#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:10:03.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:10:03.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:10:03.23$vck44/vblo=4,679.99 2006.229.02:10:03.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.02:10:03.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.02:10:03.23#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:03.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:03.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:03.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:03.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:10:03.23#ibcon#first serial, iclass 32, count 0 2006.229.02:10:03.23#ibcon#enter sib2, iclass 32, count 0 2006.229.02:10:03.23#ibcon#flushed, iclass 32, count 0 2006.229.02:10:03.23#ibcon#about to write, iclass 32, count 0 2006.229.02:10:03.23#ibcon#wrote, iclass 32, count 0 2006.229.02:10:03.23#ibcon#about to read 3, iclass 32, count 0 2006.229.02:10:03.25#ibcon#read 3, iclass 32, count 0 2006.229.02:10:03.25#ibcon#about to read 4, iclass 32, count 0 2006.229.02:10:03.25#ibcon#read 4, iclass 32, count 0 2006.229.02:10:03.25#ibcon#about to read 5, iclass 32, count 0 2006.229.02:10:03.25#ibcon#read 5, iclass 32, count 0 2006.229.02:10:03.25#ibcon#about to read 6, iclass 32, count 0 2006.229.02:10:03.25#ibcon#read 6, iclass 32, count 0 2006.229.02:10:03.25#ibcon#end of sib2, iclass 32, count 0 2006.229.02:10:03.25#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:10:03.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:10:03.25#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:10:03.25#ibcon#*before write, iclass 32, count 0 2006.229.02:10:03.25#ibcon#enter sib2, iclass 32, count 0 2006.229.02:10:03.25#ibcon#flushed, iclass 32, count 0 2006.229.02:10:03.25#ibcon#about to write, iclass 32, count 0 2006.229.02:10:03.25#ibcon#wrote, iclass 32, count 0 2006.229.02:10:03.25#ibcon#about to read 3, iclass 32, count 0 2006.229.02:10:03.29#ibcon#read 3, iclass 32, count 0 2006.229.02:10:03.29#ibcon#about to read 4, iclass 32, count 0 2006.229.02:10:03.29#ibcon#read 4, iclass 32, count 0 2006.229.02:10:03.29#ibcon#about to read 5, iclass 32, count 0 2006.229.02:10:03.29#ibcon#read 5, iclass 32, count 0 2006.229.02:10:03.29#ibcon#about to read 6, iclass 32, count 0 2006.229.02:10:03.29#ibcon#read 6, iclass 32, count 0 2006.229.02:10:03.29#ibcon#end of sib2, iclass 32, count 0 2006.229.02:10:03.29#ibcon#*after write, iclass 32, count 0 2006.229.02:10:03.29#ibcon#*before return 0, iclass 32, count 0 2006.229.02:10:03.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:03.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:10:03.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:10:03.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:10:03.29$vck44/vb=4,4 2006.229.02:10:03.29#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.02:10:03.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.02:10:03.29#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:03.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:03.35#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:03.35#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:03.35#ibcon#enter wrdev, iclass 34, count 2 2006.229.02:10:03.35#ibcon#first serial, iclass 34, count 2 2006.229.02:10:03.35#ibcon#enter sib2, iclass 34, count 2 2006.229.02:10:03.35#ibcon#flushed, iclass 34, count 2 2006.229.02:10:03.35#ibcon#about to write, iclass 34, count 2 2006.229.02:10:03.35#ibcon#wrote, iclass 34, count 2 2006.229.02:10:03.35#ibcon#about to read 3, iclass 34, count 2 2006.229.02:10:03.37#ibcon#read 3, iclass 34, count 2 2006.229.02:10:03.37#ibcon#about to read 4, iclass 34, count 2 2006.229.02:10:03.37#ibcon#read 4, iclass 34, count 2 2006.229.02:10:03.37#ibcon#about to read 5, iclass 34, count 2 2006.229.02:10:03.37#ibcon#read 5, iclass 34, count 2 2006.229.02:10:03.37#ibcon#about to read 6, iclass 34, count 2 2006.229.02:10:03.37#ibcon#read 6, iclass 34, count 2 2006.229.02:10:03.37#ibcon#end of sib2, iclass 34, count 2 2006.229.02:10:03.37#ibcon#*mode == 0, iclass 34, count 2 2006.229.02:10:03.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.02:10:03.37#ibcon#[27=AT04-04\r\n] 2006.229.02:10:03.37#ibcon#*before write, iclass 34, count 2 2006.229.02:10:03.37#ibcon#enter sib2, iclass 34, count 2 2006.229.02:10:03.37#ibcon#flushed, iclass 34, count 2 2006.229.02:10:03.37#ibcon#about to write, iclass 34, count 2 2006.229.02:10:03.37#ibcon#wrote, iclass 34, count 2 2006.229.02:10:03.37#ibcon#about to read 3, iclass 34, count 2 2006.229.02:10:03.40#ibcon#read 3, iclass 34, count 2 2006.229.02:10:03.40#ibcon#about to read 4, iclass 34, count 2 2006.229.02:10:03.40#ibcon#read 4, iclass 34, count 2 2006.229.02:10:03.40#ibcon#about to read 5, iclass 34, count 2 2006.229.02:10:03.40#ibcon#read 5, iclass 34, count 2 2006.229.02:10:03.40#ibcon#about to read 6, iclass 34, count 2 2006.229.02:10:03.40#ibcon#read 6, iclass 34, count 2 2006.229.02:10:03.40#ibcon#end of sib2, iclass 34, count 2 2006.229.02:10:03.40#ibcon#*after write, iclass 34, count 2 2006.229.02:10:03.40#ibcon#*before return 0, iclass 34, count 2 2006.229.02:10:03.40#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:03.40#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:10:03.40#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.02:10:03.40#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:03.40#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:03.53#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:03.53#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:03.53#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:10:03.53#ibcon#first serial, iclass 34, count 0 2006.229.02:10:03.53#ibcon#enter sib2, iclass 34, count 0 2006.229.02:10:03.53#ibcon#flushed, iclass 34, count 0 2006.229.02:10:03.53#ibcon#about to write, iclass 34, count 0 2006.229.02:10:03.53#ibcon#wrote, iclass 34, count 0 2006.229.02:10:03.53#ibcon#about to read 3, iclass 34, count 0 2006.229.02:10:03.54#ibcon#read 3, iclass 34, count 0 2006.229.02:10:03.54#ibcon#about to read 4, iclass 34, count 0 2006.229.02:10:03.54#ibcon#read 4, iclass 34, count 0 2006.229.02:10:03.54#ibcon#about to read 5, iclass 34, count 0 2006.229.02:10:03.54#ibcon#read 5, iclass 34, count 0 2006.229.02:10:03.54#ibcon#about to read 6, iclass 34, count 0 2006.229.02:10:03.54#ibcon#read 6, iclass 34, count 0 2006.229.02:10:03.54#ibcon#end of sib2, iclass 34, count 0 2006.229.02:10:03.54#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:10:03.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:10:03.54#ibcon#[27=USB\r\n] 2006.229.02:10:03.54#ibcon#*before write, iclass 34, count 0 2006.229.02:10:03.54#ibcon#enter sib2, iclass 34, count 0 2006.229.02:10:03.54#ibcon#flushed, iclass 34, count 0 2006.229.02:10:03.54#ibcon#about to write, iclass 34, count 0 2006.229.02:10:03.54#ibcon#wrote, iclass 34, count 0 2006.229.02:10:03.54#ibcon#about to read 3, iclass 34, count 0 2006.229.02:10:03.57#ibcon#read 3, iclass 34, count 0 2006.229.02:10:03.57#ibcon#about to read 4, iclass 34, count 0 2006.229.02:10:03.57#ibcon#read 4, iclass 34, count 0 2006.229.02:10:03.57#ibcon#about to read 5, iclass 34, count 0 2006.229.02:10:03.57#ibcon#read 5, iclass 34, count 0 2006.229.02:10:03.57#ibcon#about to read 6, iclass 34, count 0 2006.229.02:10:03.57#ibcon#read 6, iclass 34, count 0 2006.229.02:10:03.57#ibcon#end of sib2, iclass 34, count 0 2006.229.02:10:03.57#ibcon#*after write, iclass 34, count 0 2006.229.02:10:03.57#ibcon#*before return 0, iclass 34, count 0 2006.229.02:10:03.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:03.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:10:03.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:10:03.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:10:03.57$vck44/vblo=5,709.99 2006.229.02:10:03.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.02:10:03.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.02:10:03.57#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:03.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:03.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:03.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:03.57#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:10:03.57#ibcon#first serial, iclass 36, count 0 2006.229.02:10:03.57#ibcon#enter sib2, iclass 36, count 0 2006.229.02:10:03.57#ibcon#flushed, iclass 36, count 0 2006.229.02:10:03.57#ibcon#about to write, iclass 36, count 0 2006.229.02:10:03.57#ibcon#wrote, iclass 36, count 0 2006.229.02:10:03.57#ibcon#about to read 3, iclass 36, count 0 2006.229.02:10:03.59#ibcon#read 3, iclass 36, count 0 2006.229.02:10:03.59#ibcon#about to read 4, iclass 36, count 0 2006.229.02:10:03.59#ibcon#read 4, iclass 36, count 0 2006.229.02:10:03.59#ibcon#about to read 5, iclass 36, count 0 2006.229.02:10:03.59#ibcon#read 5, iclass 36, count 0 2006.229.02:10:03.59#ibcon#about to read 6, iclass 36, count 0 2006.229.02:10:03.59#ibcon#read 6, iclass 36, count 0 2006.229.02:10:03.59#ibcon#end of sib2, iclass 36, count 0 2006.229.02:10:03.59#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:10:03.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:10:03.59#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:10:03.59#ibcon#*before write, iclass 36, count 0 2006.229.02:10:03.59#ibcon#enter sib2, iclass 36, count 0 2006.229.02:10:03.59#ibcon#flushed, iclass 36, count 0 2006.229.02:10:03.59#ibcon#about to write, iclass 36, count 0 2006.229.02:10:03.59#ibcon#wrote, iclass 36, count 0 2006.229.02:10:03.59#ibcon#about to read 3, iclass 36, count 0 2006.229.02:10:03.63#ibcon#read 3, iclass 36, count 0 2006.229.02:10:03.63#ibcon#about to read 4, iclass 36, count 0 2006.229.02:10:03.63#ibcon#read 4, iclass 36, count 0 2006.229.02:10:03.63#ibcon#about to read 5, iclass 36, count 0 2006.229.02:10:03.63#ibcon#read 5, iclass 36, count 0 2006.229.02:10:03.63#ibcon#about to read 6, iclass 36, count 0 2006.229.02:10:03.63#ibcon#read 6, iclass 36, count 0 2006.229.02:10:03.63#ibcon#end of sib2, iclass 36, count 0 2006.229.02:10:03.63#ibcon#*after write, iclass 36, count 0 2006.229.02:10:03.63#ibcon#*before return 0, iclass 36, count 0 2006.229.02:10:03.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:03.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:10:03.63#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:10:03.63#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:10:03.63$vck44/vb=5,4 2006.229.02:10:03.63#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.02:10:03.63#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.02:10:03.63#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:03.63#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:03.69#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:03.69#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:03.69#ibcon#enter wrdev, iclass 38, count 2 2006.229.02:10:03.69#ibcon#first serial, iclass 38, count 2 2006.229.02:10:03.69#ibcon#enter sib2, iclass 38, count 2 2006.229.02:10:03.69#ibcon#flushed, iclass 38, count 2 2006.229.02:10:03.69#ibcon#about to write, iclass 38, count 2 2006.229.02:10:03.69#ibcon#wrote, iclass 38, count 2 2006.229.02:10:03.69#ibcon#about to read 3, iclass 38, count 2 2006.229.02:10:03.71#ibcon#read 3, iclass 38, count 2 2006.229.02:10:03.71#ibcon#about to read 4, iclass 38, count 2 2006.229.02:10:03.71#ibcon#read 4, iclass 38, count 2 2006.229.02:10:03.71#ibcon#about to read 5, iclass 38, count 2 2006.229.02:10:03.71#ibcon#read 5, iclass 38, count 2 2006.229.02:10:03.71#ibcon#about to read 6, iclass 38, count 2 2006.229.02:10:03.71#ibcon#read 6, iclass 38, count 2 2006.229.02:10:03.71#ibcon#end of sib2, iclass 38, count 2 2006.229.02:10:03.71#ibcon#*mode == 0, iclass 38, count 2 2006.229.02:10:03.71#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.02:10:03.71#ibcon#[27=AT05-04\r\n] 2006.229.02:10:03.71#ibcon#*before write, iclass 38, count 2 2006.229.02:10:03.71#ibcon#enter sib2, iclass 38, count 2 2006.229.02:10:03.71#ibcon#flushed, iclass 38, count 2 2006.229.02:10:03.71#ibcon#about to write, iclass 38, count 2 2006.229.02:10:03.71#ibcon#wrote, iclass 38, count 2 2006.229.02:10:03.71#ibcon#about to read 3, iclass 38, count 2 2006.229.02:10:03.74#ibcon#read 3, iclass 38, count 2 2006.229.02:10:03.74#ibcon#about to read 4, iclass 38, count 2 2006.229.02:10:03.74#ibcon#read 4, iclass 38, count 2 2006.229.02:10:03.74#ibcon#about to read 5, iclass 38, count 2 2006.229.02:10:03.74#ibcon#read 5, iclass 38, count 2 2006.229.02:10:03.74#ibcon#about to read 6, iclass 38, count 2 2006.229.02:10:03.74#ibcon#read 6, iclass 38, count 2 2006.229.02:10:03.74#ibcon#end of sib2, iclass 38, count 2 2006.229.02:10:03.74#ibcon#*after write, iclass 38, count 2 2006.229.02:10:03.74#ibcon#*before return 0, iclass 38, count 2 2006.229.02:10:03.74#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:03.74#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:10:03.74#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.02:10:03.74#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:03.74#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:03.86#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:03.86#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:03.86#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:10:03.86#ibcon#first serial, iclass 38, count 0 2006.229.02:10:03.86#ibcon#enter sib2, iclass 38, count 0 2006.229.02:10:03.86#ibcon#flushed, iclass 38, count 0 2006.229.02:10:03.86#ibcon#about to write, iclass 38, count 0 2006.229.02:10:03.86#ibcon#wrote, iclass 38, count 0 2006.229.02:10:03.86#ibcon#about to read 3, iclass 38, count 0 2006.229.02:10:03.88#ibcon#read 3, iclass 38, count 0 2006.229.02:10:03.88#ibcon#about to read 4, iclass 38, count 0 2006.229.02:10:03.88#ibcon#read 4, iclass 38, count 0 2006.229.02:10:03.88#ibcon#about to read 5, iclass 38, count 0 2006.229.02:10:03.88#ibcon#read 5, iclass 38, count 0 2006.229.02:10:03.88#ibcon#about to read 6, iclass 38, count 0 2006.229.02:10:03.88#ibcon#read 6, iclass 38, count 0 2006.229.02:10:03.88#ibcon#end of sib2, iclass 38, count 0 2006.229.02:10:03.88#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:10:03.88#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:10:03.88#ibcon#[27=USB\r\n] 2006.229.02:10:03.88#ibcon#*before write, iclass 38, count 0 2006.229.02:10:03.88#ibcon#enter sib2, iclass 38, count 0 2006.229.02:10:03.88#ibcon#flushed, iclass 38, count 0 2006.229.02:10:03.88#ibcon#about to write, iclass 38, count 0 2006.229.02:10:03.88#ibcon#wrote, iclass 38, count 0 2006.229.02:10:03.88#ibcon#about to read 3, iclass 38, count 0 2006.229.02:10:03.91#ibcon#read 3, iclass 38, count 0 2006.229.02:10:03.91#ibcon#about to read 4, iclass 38, count 0 2006.229.02:10:03.91#ibcon#read 4, iclass 38, count 0 2006.229.02:10:03.91#ibcon#about to read 5, iclass 38, count 0 2006.229.02:10:03.91#ibcon#read 5, iclass 38, count 0 2006.229.02:10:03.91#ibcon#about to read 6, iclass 38, count 0 2006.229.02:10:03.91#ibcon#read 6, iclass 38, count 0 2006.229.02:10:03.91#ibcon#end of sib2, iclass 38, count 0 2006.229.02:10:03.91#ibcon#*after write, iclass 38, count 0 2006.229.02:10:03.91#ibcon#*before return 0, iclass 38, count 0 2006.229.02:10:03.91#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:03.91#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:10:03.91#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:10:03.91#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:10:03.91$vck44/vblo=6,719.99 2006.229.02:10:03.91#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.02:10:03.91#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.02:10:03.91#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:03.91#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:03.91#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:03.91#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:03.91#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:10:03.91#ibcon#first serial, iclass 40, count 0 2006.229.02:10:03.91#ibcon#enter sib2, iclass 40, count 0 2006.229.02:10:03.91#ibcon#flushed, iclass 40, count 0 2006.229.02:10:03.91#ibcon#about to write, iclass 40, count 0 2006.229.02:10:03.91#ibcon#wrote, iclass 40, count 0 2006.229.02:10:03.91#ibcon#about to read 3, iclass 40, count 0 2006.229.02:10:03.93#ibcon#read 3, iclass 40, count 0 2006.229.02:10:03.93#ibcon#about to read 4, iclass 40, count 0 2006.229.02:10:03.93#ibcon#read 4, iclass 40, count 0 2006.229.02:10:03.93#ibcon#about to read 5, iclass 40, count 0 2006.229.02:10:03.93#ibcon#read 5, iclass 40, count 0 2006.229.02:10:03.93#ibcon#about to read 6, iclass 40, count 0 2006.229.02:10:03.93#ibcon#read 6, iclass 40, count 0 2006.229.02:10:03.93#ibcon#end of sib2, iclass 40, count 0 2006.229.02:10:03.93#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:10:03.93#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:10:03.93#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:10:03.93#ibcon#*before write, iclass 40, count 0 2006.229.02:10:03.93#ibcon#enter sib2, iclass 40, count 0 2006.229.02:10:03.93#ibcon#flushed, iclass 40, count 0 2006.229.02:10:03.93#ibcon#about to write, iclass 40, count 0 2006.229.02:10:03.93#ibcon#wrote, iclass 40, count 0 2006.229.02:10:03.93#ibcon#about to read 3, iclass 40, count 0 2006.229.02:10:03.97#ibcon#read 3, iclass 40, count 0 2006.229.02:10:03.97#ibcon#about to read 4, iclass 40, count 0 2006.229.02:10:03.97#ibcon#read 4, iclass 40, count 0 2006.229.02:10:03.97#ibcon#about to read 5, iclass 40, count 0 2006.229.02:10:03.97#ibcon#read 5, iclass 40, count 0 2006.229.02:10:03.97#ibcon#about to read 6, iclass 40, count 0 2006.229.02:10:03.97#ibcon#read 6, iclass 40, count 0 2006.229.02:10:03.97#ibcon#end of sib2, iclass 40, count 0 2006.229.02:10:03.97#ibcon#*after write, iclass 40, count 0 2006.229.02:10:03.97#ibcon#*before return 0, iclass 40, count 0 2006.229.02:10:03.97#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:03.97#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:10:03.97#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:10:03.97#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:10:03.97$vck44/vb=6,4 2006.229.02:10:03.97#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.02:10:03.97#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.02:10:03.97#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:03.97#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:04.03#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:04.03#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:04.03#ibcon#enter wrdev, iclass 4, count 2 2006.229.02:10:04.03#ibcon#first serial, iclass 4, count 2 2006.229.02:10:04.03#ibcon#enter sib2, iclass 4, count 2 2006.229.02:10:04.03#ibcon#flushed, iclass 4, count 2 2006.229.02:10:04.03#ibcon#about to write, iclass 4, count 2 2006.229.02:10:04.03#ibcon#wrote, iclass 4, count 2 2006.229.02:10:04.03#ibcon#about to read 3, iclass 4, count 2 2006.229.02:10:04.05#ibcon#read 3, iclass 4, count 2 2006.229.02:10:04.05#ibcon#about to read 4, iclass 4, count 2 2006.229.02:10:04.05#ibcon#read 4, iclass 4, count 2 2006.229.02:10:04.05#ibcon#about to read 5, iclass 4, count 2 2006.229.02:10:04.05#ibcon#read 5, iclass 4, count 2 2006.229.02:10:04.05#ibcon#about to read 6, iclass 4, count 2 2006.229.02:10:04.05#ibcon#read 6, iclass 4, count 2 2006.229.02:10:04.05#ibcon#end of sib2, iclass 4, count 2 2006.229.02:10:04.05#ibcon#*mode == 0, iclass 4, count 2 2006.229.02:10:04.05#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.02:10:04.05#ibcon#[27=AT06-04\r\n] 2006.229.02:10:04.05#ibcon#*before write, iclass 4, count 2 2006.229.02:10:04.05#ibcon#enter sib2, iclass 4, count 2 2006.229.02:10:04.05#ibcon#flushed, iclass 4, count 2 2006.229.02:10:04.05#ibcon#about to write, iclass 4, count 2 2006.229.02:10:04.05#ibcon#wrote, iclass 4, count 2 2006.229.02:10:04.05#ibcon#about to read 3, iclass 4, count 2 2006.229.02:10:04.08#ibcon#read 3, iclass 4, count 2 2006.229.02:10:04.08#ibcon#about to read 4, iclass 4, count 2 2006.229.02:10:04.08#ibcon#read 4, iclass 4, count 2 2006.229.02:10:04.08#ibcon#about to read 5, iclass 4, count 2 2006.229.02:10:04.08#ibcon#read 5, iclass 4, count 2 2006.229.02:10:04.08#ibcon#about to read 6, iclass 4, count 2 2006.229.02:10:04.08#ibcon#read 6, iclass 4, count 2 2006.229.02:10:04.08#ibcon#end of sib2, iclass 4, count 2 2006.229.02:10:04.08#ibcon#*after write, iclass 4, count 2 2006.229.02:10:04.08#ibcon#*before return 0, iclass 4, count 2 2006.229.02:10:04.08#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:04.08#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:10:04.08#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.02:10:04.08#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:04.08#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:04.20#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:04.20#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:04.20#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:10:04.20#ibcon#first serial, iclass 4, count 0 2006.229.02:10:04.20#ibcon#enter sib2, iclass 4, count 0 2006.229.02:10:04.20#ibcon#flushed, iclass 4, count 0 2006.229.02:10:04.20#ibcon#about to write, iclass 4, count 0 2006.229.02:10:04.20#ibcon#wrote, iclass 4, count 0 2006.229.02:10:04.20#ibcon#about to read 3, iclass 4, count 0 2006.229.02:10:04.22#ibcon#read 3, iclass 4, count 0 2006.229.02:10:04.22#ibcon#about to read 4, iclass 4, count 0 2006.229.02:10:04.22#ibcon#read 4, iclass 4, count 0 2006.229.02:10:04.22#ibcon#about to read 5, iclass 4, count 0 2006.229.02:10:04.22#ibcon#read 5, iclass 4, count 0 2006.229.02:10:04.22#ibcon#about to read 6, iclass 4, count 0 2006.229.02:10:04.22#ibcon#read 6, iclass 4, count 0 2006.229.02:10:04.22#ibcon#end of sib2, iclass 4, count 0 2006.229.02:10:04.22#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:10:04.22#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:10:04.22#ibcon#[27=USB\r\n] 2006.229.02:10:04.22#ibcon#*before write, iclass 4, count 0 2006.229.02:10:04.22#ibcon#enter sib2, iclass 4, count 0 2006.229.02:10:04.22#ibcon#flushed, iclass 4, count 0 2006.229.02:10:04.22#ibcon#about to write, iclass 4, count 0 2006.229.02:10:04.22#ibcon#wrote, iclass 4, count 0 2006.229.02:10:04.22#ibcon#about to read 3, iclass 4, count 0 2006.229.02:10:04.26#ibcon#read 3, iclass 4, count 0 2006.229.02:10:04.26#ibcon#about to read 4, iclass 4, count 0 2006.229.02:10:04.26#ibcon#read 4, iclass 4, count 0 2006.229.02:10:04.26#ibcon#about to read 5, iclass 4, count 0 2006.229.02:10:04.26#ibcon#read 5, iclass 4, count 0 2006.229.02:10:04.26#ibcon#about to read 6, iclass 4, count 0 2006.229.02:10:04.26#ibcon#read 6, iclass 4, count 0 2006.229.02:10:04.26#ibcon#end of sib2, iclass 4, count 0 2006.229.02:10:04.26#ibcon#*after write, iclass 4, count 0 2006.229.02:10:04.26#ibcon#*before return 0, iclass 4, count 0 2006.229.02:10:04.26#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:04.26#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:10:04.26#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:10:04.26#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:10:04.26$vck44/vblo=7,734.99 2006.229.02:10:04.26#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.02:10:04.26#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.02:10:04.26#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:04.26#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:04.26#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:04.26#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:04.26#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:10:04.26#ibcon#first serial, iclass 6, count 0 2006.229.02:10:04.26#ibcon#enter sib2, iclass 6, count 0 2006.229.02:10:04.26#ibcon#flushed, iclass 6, count 0 2006.229.02:10:04.26#ibcon#about to write, iclass 6, count 0 2006.229.02:10:04.26#ibcon#wrote, iclass 6, count 0 2006.229.02:10:04.26#ibcon#about to read 3, iclass 6, count 0 2006.229.02:10:04.27#ibcon#read 3, iclass 6, count 0 2006.229.02:10:04.27#ibcon#about to read 4, iclass 6, count 0 2006.229.02:10:04.27#ibcon#read 4, iclass 6, count 0 2006.229.02:10:04.27#ibcon#about to read 5, iclass 6, count 0 2006.229.02:10:04.27#ibcon#read 5, iclass 6, count 0 2006.229.02:10:04.27#ibcon#about to read 6, iclass 6, count 0 2006.229.02:10:04.27#ibcon#read 6, iclass 6, count 0 2006.229.02:10:04.27#ibcon#end of sib2, iclass 6, count 0 2006.229.02:10:04.27#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:10:04.27#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:10:04.27#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:10:04.27#ibcon#*before write, iclass 6, count 0 2006.229.02:10:04.27#ibcon#enter sib2, iclass 6, count 0 2006.229.02:10:04.27#ibcon#flushed, iclass 6, count 0 2006.229.02:10:04.27#ibcon#about to write, iclass 6, count 0 2006.229.02:10:04.27#ibcon#wrote, iclass 6, count 0 2006.229.02:10:04.27#ibcon#about to read 3, iclass 6, count 0 2006.229.02:10:04.31#ibcon#read 3, iclass 6, count 0 2006.229.02:10:04.31#ibcon#about to read 4, iclass 6, count 0 2006.229.02:10:04.31#ibcon#read 4, iclass 6, count 0 2006.229.02:10:04.31#ibcon#about to read 5, iclass 6, count 0 2006.229.02:10:04.31#ibcon#read 5, iclass 6, count 0 2006.229.02:10:04.31#ibcon#about to read 6, iclass 6, count 0 2006.229.02:10:04.31#ibcon#read 6, iclass 6, count 0 2006.229.02:10:04.31#ibcon#end of sib2, iclass 6, count 0 2006.229.02:10:04.31#ibcon#*after write, iclass 6, count 0 2006.229.02:10:04.31#ibcon#*before return 0, iclass 6, count 0 2006.229.02:10:04.31#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:04.31#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:10:04.31#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:10:04.31#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:10:04.31$vck44/vb=7,4 2006.229.02:10:04.31#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.02:10:04.31#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.02:10:04.31#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:04.31#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:04.38#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:04.38#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:04.38#ibcon#enter wrdev, iclass 10, count 2 2006.229.02:10:04.38#ibcon#first serial, iclass 10, count 2 2006.229.02:10:04.38#ibcon#enter sib2, iclass 10, count 2 2006.229.02:10:04.38#ibcon#flushed, iclass 10, count 2 2006.229.02:10:04.38#ibcon#about to write, iclass 10, count 2 2006.229.02:10:04.38#ibcon#wrote, iclass 10, count 2 2006.229.02:10:04.38#ibcon#about to read 3, iclass 10, count 2 2006.229.02:10:04.40#ibcon#read 3, iclass 10, count 2 2006.229.02:10:04.40#ibcon#about to read 4, iclass 10, count 2 2006.229.02:10:04.40#ibcon#read 4, iclass 10, count 2 2006.229.02:10:04.40#ibcon#about to read 5, iclass 10, count 2 2006.229.02:10:04.40#ibcon#read 5, iclass 10, count 2 2006.229.02:10:04.40#ibcon#about to read 6, iclass 10, count 2 2006.229.02:10:04.40#ibcon#read 6, iclass 10, count 2 2006.229.02:10:04.40#ibcon#end of sib2, iclass 10, count 2 2006.229.02:10:04.40#ibcon#*mode == 0, iclass 10, count 2 2006.229.02:10:04.40#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.02:10:04.40#ibcon#[27=AT07-04\r\n] 2006.229.02:10:04.40#ibcon#*before write, iclass 10, count 2 2006.229.02:10:04.40#ibcon#enter sib2, iclass 10, count 2 2006.229.02:10:04.40#ibcon#flushed, iclass 10, count 2 2006.229.02:10:04.40#ibcon#about to write, iclass 10, count 2 2006.229.02:10:04.40#ibcon#wrote, iclass 10, count 2 2006.229.02:10:04.40#ibcon#about to read 3, iclass 10, count 2 2006.229.02:10:04.43#ibcon#read 3, iclass 10, count 2 2006.229.02:10:04.43#ibcon#about to read 4, iclass 10, count 2 2006.229.02:10:04.43#ibcon#read 4, iclass 10, count 2 2006.229.02:10:04.43#ibcon#about to read 5, iclass 10, count 2 2006.229.02:10:04.43#ibcon#read 5, iclass 10, count 2 2006.229.02:10:04.43#ibcon#about to read 6, iclass 10, count 2 2006.229.02:10:04.43#ibcon#read 6, iclass 10, count 2 2006.229.02:10:04.43#ibcon#end of sib2, iclass 10, count 2 2006.229.02:10:04.43#ibcon#*after write, iclass 10, count 2 2006.229.02:10:04.43#ibcon#*before return 0, iclass 10, count 2 2006.229.02:10:04.43#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:04.43#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:10:04.43#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.02:10:04.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:04.43#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:04.55#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:04.55#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:04.55#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:10:04.55#ibcon#first serial, iclass 10, count 0 2006.229.02:10:04.55#ibcon#enter sib2, iclass 10, count 0 2006.229.02:10:04.55#ibcon#flushed, iclass 10, count 0 2006.229.02:10:04.55#ibcon#about to write, iclass 10, count 0 2006.229.02:10:04.55#ibcon#wrote, iclass 10, count 0 2006.229.02:10:04.55#ibcon#about to read 3, iclass 10, count 0 2006.229.02:10:04.57#ibcon#read 3, iclass 10, count 0 2006.229.02:10:04.57#ibcon#about to read 4, iclass 10, count 0 2006.229.02:10:04.57#ibcon#read 4, iclass 10, count 0 2006.229.02:10:04.57#ibcon#about to read 5, iclass 10, count 0 2006.229.02:10:04.57#ibcon#read 5, iclass 10, count 0 2006.229.02:10:04.57#ibcon#about to read 6, iclass 10, count 0 2006.229.02:10:04.57#ibcon#read 6, iclass 10, count 0 2006.229.02:10:04.57#ibcon#end of sib2, iclass 10, count 0 2006.229.02:10:04.57#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:10:04.57#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:10:04.57#ibcon#[27=USB\r\n] 2006.229.02:10:04.57#ibcon#*before write, iclass 10, count 0 2006.229.02:10:04.57#ibcon#enter sib2, iclass 10, count 0 2006.229.02:10:04.57#ibcon#flushed, iclass 10, count 0 2006.229.02:10:04.57#ibcon#about to write, iclass 10, count 0 2006.229.02:10:04.57#ibcon#wrote, iclass 10, count 0 2006.229.02:10:04.57#ibcon#about to read 3, iclass 10, count 0 2006.229.02:10:04.60#ibcon#read 3, iclass 10, count 0 2006.229.02:10:04.60#ibcon#about to read 4, iclass 10, count 0 2006.229.02:10:04.60#ibcon#read 4, iclass 10, count 0 2006.229.02:10:04.60#ibcon#about to read 5, iclass 10, count 0 2006.229.02:10:04.60#ibcon#read 5, iclass 10, count 0 2006.229.02:10:04.60#ibcon#about to read 6, iclass 10, count 0 2006.229.02:10:04.60#ibcon#read 6, iclass 10, count 0 2006.229.02:10:04.60#ibcon#end of sib2, iclass 10, count 0 2006.229.02:10:04.60#ibcon#*after write, iclass 10, count 0 2006.229.02:10:04.60#ibcon#*before return 0, iclass 10, count 0 2006.229.02:10:04.60#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:04.60#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:10:04.60#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:10:04.60#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:10:04.60$vck44/vblo=8,744.99 2006.229.02:10:04.60#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.02:10:04.60#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.02:10:04.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:10:04.60#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:04.60#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:04.60#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:04.60#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:10:04.60#ibcon#first serial, iclass 12, count 0 2006.229.02:10:04.60#ibcon#enter sib2, iclass 12, count 0 2006.229.02:10:04.60#ibcon#flushed, iclass 12, count 0 2006.229.02:10:04.60#ibcon#about to write, iclass 12, count 0 2006.229.02:10:04.60#ibcon#wrote, iclass 12, count 0 2006.229.02:10:04.60#ibcon#about to read 3, iclass 12, count 0 2006.229.02:10:04.62#ibcon#read 3, iclass 12, count 0 2006.229.02:10:04.62#ibcon#about to read 4, iclass 12, count 0 2006.229.02:10:04.62#ibcon#read 4, iclass 12, count 0 2006.229.02:10:04.62#ibcon#about to read 5, iclass 12, count 0 2006.229.02:10:04.62#ibcon#read 5, iclass 12, count 0 2006.229.02:10:04.62#ibcon#about to read 6, iclass 12, count 0 2006.229.02:10:04.62#ibcon#read 6, iclass 12, count 0 2006.229.02:10:04.62#ibcon#end of sib2, iclass 12, count 0 2006.229.02:10:04.62#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:10:04.62#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:10:04.62#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:10:04.62#ibcon#*before write, iclass 12, count 0 2006.229.02:10:04.62#ibcon#enter sib2, iclass 12, count 0 2006.229.02:10:04.62#ibcon#flushed, iclass 12, count 0 2006.229.02:10:04.62#ibcon#about to write, iclass 12, count 0 2006.229.02:10:04.62#ibcon#wrote, iclass 12, count 0 2006.229.02:10:04.62#ibcon#about to read 3, iclass 12, count 0 2006.229.02:10:04.66#ibcon#read 3, iclass 12, count 0 2006.229.02:10:04.66#ibcon#about to read 4, iclass 12, count 0 2006.229.02:10:04.66#ibcon#read 4, iclass 12, count 0 2006.229.02:10:04.66#ibcon#about to read 5, iclass 12, count 0 2006.229.02:10:04.66#ibcon#read 5, iclass 12, count 0 2006.229.02:10:04.66#ibcon#about to read 6, iclass 12, count 0 2006.229.02:10:04.66#ibcon#read 6, iclass 12, count 0 2006.229.02:10:04.66#ibcon#end of sib2, iclass 12, count 0 2006.229.02:10:04.66#ibcon#*after write, iclass 12, count 0 2006.229.02:10:04.66#ibcon#*before return 0, iclass 12, count 0 2006.229.02:10:04.66#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:04.66#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:10:04.66#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:10:04.66#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:10:04.66$vck44/vb=8,4 2006.229.02:10:04.66#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.02:10:04.66#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.02:10:04.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:10:04.66#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:04.72#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:04.72#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:04.72#ibcon#enter wrdev, iclass 14, count 2 2006.229.02:10:04.72#ibcon#first serial, iclass 14, count 2 2006.229.02:10:04.72#ibcon#enter sib2, iclass 14, count 2 2006.229.02:10:04.72#ibcon#flushed, iclass 14, count 2 2006.229.02:10:04.72#ibcon#about to write, iclass 14, count 2 2006.229.02:10:04.72#ibcon#wrote, iclass 14, count 2 2006.229.02:10:04.72#ibcon#about to read 3, iclass 14, count 2 2006.229.02:10:04.74#ibcon#read 3, iclass 14, count 2 2006.229.02:10:04.74#ibcon#about to read 4, iclass 14, count 2 2006.229.02:10:04.74#ibcon#read 4, iclass 14, count 2 2006.229.02:10:04.74#ibcon#about to read 5, iclass 14, count 2 2006.229.02:10:04.74#ibcon#read 5, iclass 14, count 2 2006.229.02:10:04.74#ibcon#about to read 6, iclass 14, count 2 2006.229.02:10:04.74#ibcon#read 6, iclass 14, count 2 2006.229.02:10:04.74#ibcon#end of sib2, iclass 14, count 2 2006.229.02:10:04.74#ibcon#*mode == 0, iclass 14, count 2 2006.229.02:10:04.74#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.02:10:04.74#ibcon#[27=AT08-04\r\n] 2006.229.02:10:04.74#ibcon#*before write, iclass 14, count 2 2006.229.02:10:04.74#ibcon#enter sib2, iclass 14, count 2 2006.229.02:10:04.74#ibcon#flushed, iclass 14, count 2 2006.229.02:10:04.74#ibcon#about to write, iclass 14, count 2 2006.229.02:10:04.74#ibcon#wrote, iclass 14, count 2 2006.229.02:10:04.74#ibcon#about to read 3, iclass 14, count 2 2006.229.02:10:04.77#ibcon#read 3, iclass 14, count 2 2006.229.02:10:04.77#ibcon#about to read 4, iclass 14, count 2 2006.229.02:10:04.77#ibcon#read 4, iclass 14, count 2 2006.229.02:10:04.77#ibcon#about to read 5, iclass 14, count 2 2006.229.02:10:04.77#ibcon#read 5, iclass 14, count 2 2006.229.02:10:04.77#ibcon#about to read 6, iclass 14, count 2 2006.229.02:10:04.77#ibcon#read 6, iclass 14, count 2 2006.229.02:10:04.77#ibcon#end of sib2, iclass 14, count 2 2006.229.02:10:04.77#ibcon#*after write, iclass 14, count 2 2006.229.02:10:04.77#ibcon#*before return 0, iclass 14, count 2 2006.229.02:10:04.77#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:04.77#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:10:04.77#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.02:10:04.77#ibcon#ireg 7 cls_cnt 0 2006.229.02:10:04.77#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:04.89#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:04.89#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:04.89#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:10:04.89#ibcon#first serial, iclass 14, count 0 2006.229.02:10:04.89#ibcon#enter sib2, iclass 14, count 0 2006.229.02:10:04.89#ibcon#flushed, iclass 14, count 0 2006.229.02:10:04.89#ibcon#about to write, iclass 14, count 0 2006.229.02:10:04.89#ibcon#wrote, iclass 14, count 0 2006.229.02:10:04.89#ibcon#about to read 3, iclass 14, count 0 2006.229.02:10:04.91#ibcon#read 3, iclass 14, count 0 2006.229.02:10:04.91#ibcon#about to read 4, iclass 14, count 0 2006.229.02:10:04.91#ibcon#read 4, iclass 14, count 0 2006.229.02:10:04.91#ibcon#about to read 5, iclass 14, count 0 2006.229.02:10:04.91#ibcon#read 5, iclass 14, count 0 2006.229.02:10:04.91#ibcon#about to read 6, iclass 14, count 0 2006.229.02:10:04.91#ibcon#read 6, iclass 14, count 0 2006.229.02:10:04.91#ibcon#end of sib2, iclass 14, count 0 2006.229.02:10:04.91#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:10:04.91#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:10:04.91#ibcon#[27=USB\r\n] 2006.229.02:10:04.91#ibcon#*before write, iclass 14, count 0 2006.229.02:10:04.91#ibcon#enter sib2, iclass 14, count 0 2006.229.02:10:04.91#ibcon#flushed, iclass 14, count 0 2006.229.02:10:04.91#ibcon#about to write, iclass 14, count 0 2006.229.02:10:04.91#ibcon#wrote, iclass 14, count 0 2006.229.02:10:04.91#ibcon#about to read 3, iclass 14, count 0 2006.229.02:10:04.94#ibcon#read 3, iclass 14, count 0 2006.229.02:10:04.94#ibcon#about to read 4, iclass 14, count 0 2006.229.02:10:04.94#ibcon#read 4, iclass 14, count 0 2006.229.02:10:04.94#ibcon#about to read 5, iclass 14, count 0 2006.229.02:10:04.94#ibcon#read 5, iclass 14, count 0 2006.229.02:10:04.94#ibcon#about to read 6, iclass 14, count 0 2006.229.02:10:04.94#ibcon#read 6, iclass 14, count 0 2006.229.02:10:04.94#ibcon#end of sib2, iclass 14, count 0 2006.229.02:10:04.94#ibcon#*after write, iclass 14, count 0 2006.229.02:10:04.94#ibcon#*before return 0, iclass 14, count 0 2006.229.02:10:04.94#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:04.94#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:10:04.94#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:10:04.94#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:10:04.94$vck44/vabw=wide 2006.229.02:10:04.94#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.02:10:04.94#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.02:10:04.94#ibcon#ireg 8 cls_cnt 0 2006.229.02:10:04.94#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:04.94#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:04.94#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:04.94#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:10:04.94#ibcon#first serial, iclass 16, count 0 2006.229.02:10:04.94#ibcon#enter sib2, iclass 16, count 0 2006.229.02:10:04.94#ibcon#flushed, iclass 16, count 0 2006.229.02:10:04.94#ibcon#about to write, iclass 16, count 0 2006.229.02:10:04.94#ibcon#wrote, iclass 16, count 0 2006.229.02:10:04.94#ibcon#about to read 3, iclass 16, count 0 2006.229.02:10:04.96#ibcon#read 3, iclass 16, count 0 2006.229.02:10:04.96#ibcon#about to read 4, iclass 16, count 0 2006.229.02:10:04.96#ibcon#read 4, iclass 16, count 0 2006.229.02:10:04.96#ibcon#about to read 5, iclass 16, count 0 2006.229.02:10:04.96#ibcon#read 5, iclass 16, count 0 2006.229.02:10:04.96#ibcon#about to read 6, iclass 16, count 0 2006.229.02:10:04.96#ibcon#read 6, iclass 16, count 0 2006.229.02:10:04.96#ibcon#end of sib2, iclass 16, count 0 2006.229.02:10:04.96#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:10:04.96#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:10:04.96#ibcon#[25=BW32\r\n] 2006.229.02:10:04.96#ibcon#*before write, iclass 16, count 0 2006.229.02:10:04.96#ibcon#enter sib2, iclass 16, count 0 2006.229.02:10:04.96#ibcon#flushed, iclass 16, count 0 2006.229.02:10:04.96#ibcon#about to write, iclass 16, count 0 2006.229.02:10:04.96#ibcon#wrote, iclass 16, count 0 2006.229.02:10:04.96#ibcon#about to read 3, iclass 16, count 0 2006.229.02:10:04.99#ibcon#read 3, iclass 16, count 0 2006.229.02:10:04.99#ibcon#about to read 4, iclass 16, count 0 2006.229.02:10:04.99#ibcon#read 4, iclass 16, count 0 2006.229.02:10:04.99#ibcon#about to read 5, iclass 16, count 0 2006.229.02:10:04.99#ibcon#read 5, iclass 16, count 0 2006.229.02:10:04.99#ibcon#about to read 6, iclass 16, count 0 2006.229.02:10:04.99#ibcon#read 6, iclass 16, count 0 2006.229.02:10:04.99#ibcon#end of sib2, iclass 16, count 0 2006.229.02:10:04.99#ibcon#*after write, iclass 16, count 0 2006.229.02:10:04.99#ibcon#*before return 0, iclass 16, count 0 2006.229.02:10:04.99#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:04.99#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:10:04.99#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:10:04.99#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:10:04.99$vck44/vbbw=wide 2006.229.02:10:04.99#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:10:04.99#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:10:04.99#ibcon#ireg 8 cls_cnt 0 2006.229.02:10:04.99#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:10:05.06#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:10:05.06#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:10:05.06#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:10:05.06#ibcon#first serial, iclass 18, count 0 2006.229.02:10:05.06#ibcon#enter sib2, iclass 18, count 0 2006.229.02:10:05.06#ibcon#flushed, iclass 18, count 0 2006.229.02:10:05.06#ibcon#about to write, iclass 18, count 0 2006.229.02:10:05.06#ibcon#wrote, iclass 18, count 0 2006.229.02:10:05.06#ibcon#about to read 3, iclass 18, count 0 2006.229.02:10:05.08#ibcon#read 3, iclass 18, count 0 2006.229.02:10:05.08#ibcon#about to read 4, iclass 18, count 0 2006.229.02:10:05.08#ibcon#read 4, iclass 18, count 0 2006.229.02:10:05.08#ibcon#about to read 5, iclass 18, count 0 2006.229.02:10:05.08#ibcon#read 5, iclass 18, count 0 2006.229.02:10:05.08#ibcon#about to read 6, iclass 18, count 0 2006.229.02:10:05.08#ibcon#read 6, iclass 18, count 0 2006.229.02:10:05.08#ibcon#end of sib2, iclass 18, count 0 2006.229.02:10:05.08#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:10:05.08#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:10:05.08#ibcon#[27=BW32\r\n] 2006.229.02:10:05.08#ibcon#*before write, iclass 18, count 0 2006.229.02:10:05.08#ibcon#enter sib2, iclass 18, count 0 2006.229.02:10:05.08#ibcon#flushed, iclass 18, count 0 2006.229.02:10:05.08#ibcon#about to write, iclass 18, count 0 2006.229.02:10:05.08#ibcon#wrote, iclass 18, count 0 2006.229.02:10:05.08#ibcon#about to read 3, iclass 18, count 0 2006.229.02:10:05.11#ibcon#read 3, iclass 18, count 0 2006.229.02:10:05.11#ibcon#about to read 4, iclass 18, count 0 2006.229.02:10:05.11#ibcon#read 4, iclass 18, count 0 2006.229.02:10:05.11#ibcon#about to read 5, iclass 18, count 0 2006.229.02:10:05.11#ibcon#read 5, iclass 18, count 0 2006.229.02:10:05.11#ibcon#about to read 6, iclass 18, count 0 2006.229.02:10:05.11#ibcon#read 6, iclass 18, count 0 2006.229.02:10:05.11#ibcon#end of sib2, iclass 18, count 0 2006.229.02:10:05.11#ibcon#*after write, iclass 18, count 0 2006.229.02:10:05.11#ibcon#*before return 0, iclass 18, count 0 2006.229.02:10:05.11#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:10:05.11#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:10:05.11#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:10:05.11#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:10:05.11$setupk4/ifdk4 2006.229.02:10:05.11$ifdk4/lo= 2006.229.02:10:05.11$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:10:05.11$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:10:05.11$ifdk4/patch= 2006.229.02:10:05.11$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:10:05.11$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:10:05.11$setupk4/!*+20s 2006.229.02:10:07.92#abcon#<5=/05 2.9 5.4 29.92 901001.1\r\n> 2006.229.02:10:07.94#abcon#{5=INTERFACE CLEAR} 2006.229.02:10:08.00#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:10:16.14#trakl#Source acquired 2006.229.02:10:16.14#flagr#flagr/antenna,acquired 2006.229.02:10:18.09#abcon#<5=/05 2.8 5.4 29.92 911001.1\r\n> 2006.229.02:10:18.11#abcon#{5=INTERFACE CLEAR} 2006.229.02:10:18.17#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:10:19.60$setupk4/"tpicd 2006.229.02:10:19.60$setupk4/echo=off 2006.229.02:10:19.60$setupk4/xlog=off 2006.229.02:10:19.60:!2006.229.02:15:36 2006.229.02:15:36.00:preob 2006.229.02:15:36.14/onsource/TRACKING 2006.229.02:15:36.14:!2006.229.02:15:46 2006.229.02:15:46.00:"tape 2006.229.02:15:46.00:"st=record 2006.229.02:15:46.00:data_valid=on 2006.229.02:15:46.00:midob 2006.229.02:15:46.14/onsource/TRACKING 2006.229.02:15:46.14/wx/29.87,1001.2,91 2006.229.02:15:46.33/cable/+6.4069E-03 2006.229.02:15:47.42/va/01,08,usb,yes,34,37 2006.229.02:15:47.42/va/02,07,usb,yes,37,38 2006.229.02:15:47.42/va/03,06,usb,yes,46,49 2006.229.02:15:47.42/va/04,07,usb,yes,38,40 2006.229.02:15:47.42/va/05,04,usb,yes,34,35 2006.229.02:15:47.42/va/06,04,usb,yes,39,38 2006.229.02:15:47.42/va/07,05,usb,yes,34,35 2006.229.02:15:47.42/va/08,06,usb,yes,25,31 2006.229.02:15:47.65/valo/01,524.99,yes,locked 2006.229.02:15:47.65/valo/02,534.99,yes,locked 2006.229.02:15:47.65/valo/03,564.99,yes,locked 2006.229.02:15:47.65/valo/04,624.99,yes,locked 2006.229.02:15:47.65/valo/05,734.99,yes,locked 2006.229.02:15:47.65/valo/06,814.99,yes,locked 2006.229.02:15:47.65/valo/07,864.99,yes,locked 2006.229.02:15:47.65/valo/08,884.99,yes,locked 2006.229.02:15:48.74/vb/01,04,usb,yes,31,29 2006.229.02:15:48.74/vb/02,04,usb,yes,34,33 2006.229.02:15:48.74/vb/03,04,usb,yes,30,34 2006.229.02:15:48.74/vb/04,04,usb,yes,35,34 2006.229.02:15:48.74/vb/05,04,usb,yes,27,30 2006.229.02:15:48.74/vb/06,04,usb,yes,32,28 2006.229.02:15:48.74/vb/07,04,usb,yes,32,31 2006.229.02:15:48.74/vb/08,04,usb,yes,29,32 2006.229.02:15:48.98/vblo/01,629.99,yes,locked 2006.229.02:15:48.98/vblo/02,634.99,yes,locked 2006.229.02:15:48.98/vblo/03,649.99,yes,locked 2006.229.02:15:48.98/vblo/04,679.99,yes,locked 2006.229.02:15:48.98/vblo/05,709.99,yes,locked 2006.229.02:15:48.98/vblo/06,719.99,yes,locked 2006.229.02:15:48.98/vblo/07,734.99,yes,locked 2006.229.02:15:48.98/vblo/08,744.99,yes,locked 2006.229.02:15:49.13/vabw/8 2006.229.02:15:49.28/vbbw/8 2006.229.02:15:49.37/xfe/off,on,12.2 2006.229.02:15:49.75/ifatt/23,28,28,28 2006.229.02:15:50.08/fmout-gps/S +4.51E-07 2006.229.02:15:50.12:!2006.229.02:16:36 2006.229.02:16:36.01:data_valid=off 2006.229.02:16:36.02:"et 2006.229.02:16:36.02:!+3s 2006.229.02:16:39.03:"tape 2006.229.02:16:39.04:postob 2006.229.02:16:39.10/cable/+6.4071E-03 2006.229.02:16:39.11/wx/29.85,1001.3,92 2006.229.02:16:39.16/fmout-gps/S +4.51E-07 2006.229.02:16:39.17:scan_name=229-0219,jd0608,70 2006.229.02:16:39.17:source=0727-115,073019.11,-114112.6,2000.0,ccw 2006.229.02:16:40.14#flagr#flagr/antenna,new-source 2006.229.02:16:40.15:checkk5 2006.229.02:16:40.82/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:16:41.20/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:16:41.59/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:16:42.05/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:16:42.54/chk_obsdata//k5ts1/T2290215??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:16:42.95/chk_obsdata//k5ts2/T2290215??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:16:43.38/chk_obsdata//k5ts3/T2290215??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:16:43.80/chk_obsdata//k5ts4/T2290215??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.02:16:44.83/k5log//k5ts1_log_newline 2006.229.02:16:45.61/k5log//k5ts2_log_newline 2006.229.02:16:46.36/k5log//k5ts3_log_newline 2006.229.02:16:47.35/k5log//k5ts4_log_newline 2006.229.02:16:47.38/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:16:47.38:setupk4=1 2006.229.02:16:47.38$setupk4/echo=on 2006.229.02:16:47.38$setupk4/pcalon 2006.229.02:16:47.38$pcalon/"no phase cal control is implemented here 2006.229.02:16:47.38$setupk4/"tpicd=stop 2006.229.02:16:47.38$setupk4/"rec=synch_on 2006.229.02:16:47.38$setupk4/"rec_mode=128 2006.229.02:16:47.38$setupk4/!* 2006.229.02:16:47.38$setupk4/recpk4 2006.229.02:16:47.38$recpk4/recpatch= 2006.229.02:16:47.38$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:16:47.38$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:16:47.39$setupk4/vck44 2006.229.02:16:47.39$vck44/valo=1,524.99 2006.229.02:16:47.39#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.02:16:47.39#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.02:16:47.39#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:47.39#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:47.39#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:47.39#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:47.39#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:16:47.39#ibcon#first serial, iclass 39, count 0 2006.229.02:16:47.39#ibcon#enter sib2, iclass 39, count 0 2006.229.02:16:47.39#ibcon#flushed, iclass 39, count 0 2006.229.02:16:47.39#ibcon#about to write, iclass 39, count 0 2006.229.02:16:47.39#ibcon#wrote, iclass 39, count 0 2006.229.02:16:47.39#ibcon#about to read 3, iclass 39, count 0 2006.229.02:16:47.42#ibcon#read 3, iclass 39, count 0 2006.229.02:16:47.42#ibcon#about to read 4, iclass 39, count 0 2006.229.02:16:47.42#ibcon#read 4, iclass 39, count 0 2006.229.02:16:47.42#ibcon#about to read 5, iclass 39, count 0 2006.229.02:16:47.42#ibcon#read 5, iclass 39, count 0 2006.229.02:16:47.42#ibcon#about to read 6, iclass 39, count 0 2006.229.02:16:47.42#ibcon#read 6, iclass 39, count 0 2006.229.02:16:47.42#ibcon#end of sib2, iclass 39, count 0 2006.229.02:16:47.42#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:16:47.42#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:16:47.42#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:16:47.42#ibcon#*before write, iclass 39, count 0 2006.229.02:16:47.42#ibcon#enter sib2, iclass 39, count 0 2006.229.02:16:47.42#ibcon#flushed, iclass 39, count 0 2006.229.02:16:47.42#ibcon#about to write, iclass 39, count 0 2006.229.02:16:47.42#ibcon#wrote, iclass 39, count 0 2006.229.02:16:47.42#ibcon#about to read 3, iclass 39, count 0 2006.229.02:16:47.47#ibcon#read 3, iclass 39, count 0 2006.229.02:16:47.47#ibcon#about to read 4, iclass 39, count 0 2006.229.02:16:47.47#ibcon#read 4, iclass 39, count 0 2006.229.02:16:47.47#ibcon#about to read 5, iclass 39, count 0 2006.229.02:16:47.47#ibcon#read 5, iclass 39, count 0 2006.229.02:16:47.47#ibcon#about to read 6, iclass 39, count 0 2006.229.02:16:47.47#ibcon#read 6, iclass 39, count 0 2006.229.02:16:47.47#ibcon#end of sib2, iclass 39, count 0 2006.229.02:16:47.47#ibcon#*after write, iclass 39, count 0 2006.229.02:16:47.47#ibcon#*before return 0, iclass 39, count 0 2006.229.02:16:47.47#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:47.47#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:47.47#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:16:47.47#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:16:47.47$vck44/va=1,8 2006.229.02:16:47.47#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.02:16:47.47#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.02:16:47.47#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:47.47#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:47.47#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:47.47#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:47.47#ibcon#enter wrdev, iclass 3, count 2 2006.229.02:16:47.47#ibcon#first serial, iclass 3, count 2 2006.229.02:16:47.47#ibcon#enter sib2, iclass 3, count 2 2006.229.02:16:47.47#ibcon#flushed, iclass 3, count 2 2006.229.02:16:47.47#ibcon#about to write, iclass 3, count 2 2006.229.02:16:47.47#ibcon#wrote, iclass 3, count 2 2006.229.02:16:47.47#ibcon#about to read 3, iclass 3, count 2 2006.229.02:16:47.50#ibcon#read 3, iclass 3, count 2 2006.229.02:16:47.50#ibcon#about to read 4, iclass 3, count 2 2006.229.02:16:47.50#ibcon#read 4, iclass 3, count 2 2006.229.02:16:47.50#ibcon#about to read 5, iclass 3, count 2 2006.229.02:16:47.50#ibcon#read 5, iclass 3, count 2 2006.229.02:16:47.50#ibcon#about to read 6, iclass 3, count 2 2006.229.02:16:47.50#ibcon#read 6, iclass 3, count 2 2006.229.02:16:47.50#ibcon#end of sib2, iclass 3, count 2 2006.229.02:16:47.50#ibcon#*mode == 0, iclass 3, count 2 2006.229.02:16:47.50#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.02:16:47.50#ibcon#[25=AT01-08\r\n] 2006.229.02:16:47.50#ibcon#*before write, iclass 3, count 2 2006.229.02:16:47.50#ibcon#enter sib2, iclass 3, count 2 2006.229.02:16:47.50#ibcon#flushed, iclass 3, count 2 2006.229.02:16:47.50#ibcon#about to write, iclass 3, count 2 2006.229.02:16:47.50#ibcon#wrote, iclass 3, count 2 2006.229.02:16:47.50#ibcon#about to read 3, iclass 3, count 2 2006.229.02:16:47.53#ibcon#read 3, iclass 3, count 2 2006.229.02:16:47.53#ibcon#about to read 4, iclass 3, count 2 2006.229.02:16:47.53#ibcon#read 4, iclass 3, count 2 2006.229.02:16:47.53#ibcon#about to read 5, iclass 3, count 2 2006.229.02:16:47.53#ibcon#read 5, iclass 3, count 2 2006.229.02:16:47.53#ibcon#about to read 6, iclass 3, count 2 2006.229.02:16:47.53#ibcon#read 6, iclass 3, count 2 2006.229.02:16:47.53#ibcon#end of sib2, iclass 3, count 2 2006.229.02:16:47.53#ibcon#*after write, iclass 3, count 2 2006.229.02:16:47.53#ibcon#*before return 0, iclass 3, count 2 2006.229.02:16:47.53#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:47.53#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:47.53#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.02:16:47.53#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:47.53#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:47.65#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:47.65#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:47.65#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:16:47.65#ibcon#first serial, iclass 3, count 0 2006.229.02:16:47.65#ibcon#enter sib2, iclass 3, count 0 2006.229.02:16:47.65#ibcon#flushed, iclass 3, count 0 2006.229.02:16:47.65#ibcon#about to write, iclass 3, count 0 2006.229.02:16:47.65#ibcon#wrote, iclass 3, count 0 2006.229.02:16:47.65#ibcon#about to read 3, iclass 3, count 0 2006.229.02:16:47.67#ibcon#read 3, iclass 3, count 0 2006.229.02:16:47.67#ibcon#about to read 4, iclass 3, count 0 2006.229.02:16:47.67#ibcon#read 4, iclass 3, count 0 2006.229.02:16:47.67#ibcon#about to read 5, iclass 3, count 0 2006.229.02:16:47.67#ibcon#read 5, iclass 3, count 0 2006.229.02:16:47.67#ibcon#about to read 6, iclass 3, count 0 2006.229.02:16:47.67#ibcon#read 6, iclass 3, count 0 2006.229.02:16:47.67#ibcon#end of sib2, iclass 3, count 0 2006.229.02:16:47.67#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:16:47.67#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:16:47.67#ibcon#[25=USB\r\n] 2006.229.02:16:47.67#ibcon#*before write, iclass 3, count 0 2006.229.02:16:47.67#ibcon#enter sib2, iclass 3, count 0 2006.229.02:16:47.67#ibcon#flushed, iclass 3, count 0 2006.229.02:16:47.67#ibcon#about to write, iclass 3, count 0 2006.229.02:16:47.67#ibcon#wrote, iclass 3, count 0 2006.229.02:16:47.67#ibcon#about to read 3, iclass 3, count 0 2006.229.02:16:47.70#ibcon#read 3, iclass 3, count 0 2006.229.02:16:47.70#ibcon#about to read 4, iclass 3, count 0 2006.229.02:16:47.70#ibcon#read 4, iclass 3, count 0 2006.229.02:16:47.70#ibcon#about to read 5, iclass 3, count 0 2006.229.02:16:47.70#ibcon#read 5, iclass 3, count 0 2006.229.02:16:47.70#ibcon#about to read 6, iclass 3, count 0 2006.229.02:16:47.70#ibcon#read 6, iclass 3, count 0 2006.229.02:16:47.70#ibcon#end of sib2, iclass 3, count 0 2006.229.02:16:47.70#ibcon#*after write, iclass 3, count 0 2006.229.02:16:47.70#ibcon#*before return 0, iclass 3, count 0 2006.229.02:16:47.70#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:47.70#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:47.70#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:16:47.70#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:16:47.70$vck44/valo=2,534.99 2006.229.02:16:47.70#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.02:16:47.70#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.02:16:47.70#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:47.70#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:47.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:47.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:47.70#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:16:47.70#ibcon#first serial, iclass 5, count 0 2006.229.02:16:47.70#ibcon#enter sib2, iclass 5, count 0 2006.229.02:16:47.70#ibcon#flushed, iclass 5, count 0 2006.229.02:16:47.70#ibcon#about to write, iclass 5, count 0 2006.229.02:16:47.70#ibcon#wrote, iclass 5, count 0 2006.229.02:16:47.70#ibcon#about to read 3, iclass 5, count 0 2006.229.02:16:47.72#ibcon#read 3, iclass 5, count 0 2006.229.02:16:47.72#ibcon#about to read 4, iclass 5, count 0 2006.229.02:16:47.72#ibcon#read 4, iclass 5, count 0 2006.229.02:16:47.72#ibcon#about to read 5, iclass 5, count 0 2006.229.02:16:47.72#ibcon#read 5, iclass 5, count 0 2006.229.02:16:47.72#ibcon#about to read 6, iclass 5, count 0 2006.229.02:16:47.72#ibcon#read 6, iclass 5, count 0 2006.229.02:16:47.72#ibcon#end of sib2, iclass 5, count 0 2006.229.02:16:47.72#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:16:47.72#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:16:47.72#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:16:47.72#ibcon#*before write, iclass 5, count 0 2006.229.02:16:47.72#ibcon#enter sib2, iclass 5, count 0 2006.229.02:16:47.72#ibcon#flushed, iclass 5, count 0 2006.229.02:16:47.72#ibcon#about to write, iclass 5, count 0 2006.229.02:16:47.72#ibcon#wrote, iclass 5, count 0 2006.229.02:16:47.72#ibcon#about to read 3, iclass 5, count 0 2006.229.02:16:47.76#ibcon#read 3, iclass 5, count 0 2006.229.02:16:47.76#ibcon#about to read 4, iclass 5, count 0 2006.229.02:16:47.76#ibcon#read 4, iclass 5, count 0 2006.229.02:16:47.76#ibcon#about to read 5, iclass 5, count 0 2006.229.02:16:47.76#ibcon#read 5, iclass 5, count 0 2006.229.02:16:47.76#ibcon#about to read 6, iclass 5, count 0 2006.229.02:16:47.76#ibcon#read 6, iclass 5, count 0 2006.229.02:16:47.76#ibcon#end of sib2, iclass 5, count 0 2006.229.02:16:47.76#ibcon#*after write, iclass 5, count 0 2006.229.02:16:47.76#ibcon#*before return 0, iclass 5, count 0 2006.229.02:16:47.76#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:47.76#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:47.76#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:16:47.76#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:16:47.76$vck44/va=2,7 2006.229.02:16:47.76#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.02:16:47.76#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.02:16:47.76#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:47.76#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:47.82#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:47.82#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:47.82#ibcon#enter wrdev, iclass 7, count 2 2006.229.02:16:47.82#ibcon#first serial, iclass 7, count 2 2006.229.02:16:47.82#ibcon#enter sib2, iclass 7, count 2 2006.229.02:16:47.82#ibcon#flushed, iclass 7, count 2 2006.229.02:16:47.82#ibcon#about to write, iclass 7, count 2 2006.229.02:16:47.82#ibcon#wrote, iclass 7, count 2 2006.229.02:16:47.82#ibcon#about to read 3, iclass 7, count 2 2006.229.02:16:47.84#ibcon#read 3, iclass 7, count 2 2006.229.02:16:47.84#ibcon#about to read 4, iclass 7, count 2 2006.229.02:16:47.84#ibcon#read 4, iclass 7, count 2 2006.229.02:16:47.84#ibcon#about to read 5, iclass 7, count 2 2006.229.02:16:47.84#ibcon#read 5, iclass 7, count 2 2006.229.02:16:47.84#ibcon#about to read 6, iclass 7, count 2 2006.229.02:16:47.84#ibcon#read 6, iclass 7, count 2 2006.229.02:16:47.84#ibcon#end of sib2, iclass 7, count 2 2006.229.02:16:47.84#ibcon#*mode == 0, iclass 7, count 2 2006.229.02:16:47.84#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.02:16:47.84#ibcon#[25=AT02-07\r\n] 2006.229.02:16:47.84#ibcon#*before write, iclass 7, count 2 2006.229.02:16:47.84#ibcon#enter sib2, iclass 7, count 2 2006.229.02:16:47.84#ibcon#flushed, iclass 7, count 2 2006.229.02:16:47.84#ibcon#about to write, iclass 7, count 2 2006.229.02:16:47.84#ibcon#wrote, iclass 7, count 2 2006.229.02:16:47.84#ibcon#about to read 3, iclass 7, count 2 2006.229.02:16:47.87#ibcon#read 3, iclass 7, count 2 2006.229.02:16:47.87#ibcon#about to read 4, iclass 7, count 2 2006.229.02:16:47.87#ibcon#read 4, iclass 7, count 2 2006.229.02:16:47.87#ibcon#about to read 5, iclass 7, count 2 2006.229.02:16:47.87#ibcon#read 5, iclass 7, count 2 2006.229.02:16:47.87#ibcon#about to read 6, iclass 7, count 2 2006.229.02:16:47.87#ibcon#read 6, iclass 7, count 2 2006.229.02:16:47.87#ibcon#end of sib2, iclass 7, count 2 2006.229.02:16:47.87#ibcon#*after write, iclass 7, count 2 2006.229.02:16:47.87#ibcon#*before return 0, iclass 7, count 2 2006.229.02:16:47.87#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:47.87#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:47.87#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.02:16:47.87#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:47.87#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:47.99#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:47.99#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:47.99#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:16:47.99#ibcon#first serial, iclass 7, count 0 2006.229.02:16:47.99#ibcon#enter sib2, iclass 7, count 0 2006.229.02:16:47.99#ibcon#flushed, iclass 7, count 0 2006.229.02:16:47.99#ibcon#about to write, iclass 7, count 0 2006.229.02:16:47.99#ibcon#wrote, iclass 7, count 0 2006.229.02:16:47.99#ibcon#about to read 3, iclass 7, count 0 2006.229.02:16:48.01#ibcon#read 3, iclass 7, count 0 2006.229.02:16:48.01#ibcon#about to read 4, iclass 7, count 0 2006.229.02:16:48.01#ibcon#read 4, iclass 7, count 0 2006.229.02:16:48.01#ibcon#about to read 5, iclass 7, count 0 2006.229.02:16:48.01#ibcon#read 5, iclass 7, count 0 2006.229.02:16:48.01#ibcon#about to read 6, iclass 7, count 0 2006.229.02:16:48.01#ibcon#read 6, iclass 7, count 0 2006.229.02:16:48.01#ibcon#end of sib2, iclass 7, count 0 2006.229.02:16:48.01#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:16:48.01#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:16:48.01#ibcon#[25=USB\r\n] 2006.229.02:16:48.01#ibcon#*before write, iclass 7, count 0 2006.229.02:16:48.01#ibcon#enter sib2, iclass 7, count 0 2006.229.02:16:48.01#ibcon#flushed, iclass 7, count 0 2006.229.02:16:48.01#ibcon#about to write, iclass 7, count 0 2006.229.02:16:48.01#ibcon#wrote, iclass 7, count 0 2006.229.02:16:48.01#ibcon#about to read 3, iclass 7, count 0 2006.229.02:16:48.04#ibcon#read 3, iclass 7, count 0 2006.229.02:16:48.04#ibcon#about to read 4, iclass 7, count 0 2006.229.02:16:48.04#ibcon#read 4, iclass 7, count 0 2006.229.02:16:48.04#ibcon#about to read 5, iclass 7, count 0 2006.229.02:16:48.04#ibcon#read 5, iclass 7, count 0 2006.229.02:16:48.04#ibcon#about to read 6, iclass 7, count 0 2006.229.02:16:48.04#ibcon#read 6, iclass 7, count 0 2006.229.02:16:48.04#ibcon#end of sib2, iclass 7, count 0 2006.229.02:16:48.04#ibcon#*after write, iclass 7, count 0 2006.229.02:16:48.04#ibcon#*before return 0, iclass 7, count 0 2006.229.02:16:48.04#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:48.04#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:48.04#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:16:48.04#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:16:48.04$vck44/valo=3,564.99 2006.229.02:16:48.04#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:16:48.04#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:16:48.04#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:48.04#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:48.04#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:48.04#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:48.04#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:16:48.04#ibcon#first serial, iclass 11, count 0 2006.229.02:16:48.04#ibcon#enter sib2, iclass 11, count 0 2006.229.02:16:48.04#ibcon#flushed, iclass 11, count 0 2006.229.02:16:48.04#ibcon#about to write, iclass 11, count 0 2006.229.02:16:48.04#ibcon#wrote, iclass 11, count 0 2006.229.02:16:48.04#ibcon#about to read 3, iclass 11, count 0 2006.229.02:16:48.06#ibcon#read 3, iclass 11, count 0 2006.229.02:16:48.06#ibcon#about to read 4, iclass 11, count 0 2006.229.02:16:48.06#ibcon#read 4, iclass 11, count 0 2006.229.02:16:48.06#ibcon#about to read 5, iclass 11, count 0 2006.229.02:16:48.06#ibcon#read 5, iclass 11, count 0 2006.229.02:16:48.06#ibcon#about to read 6, iclass 11, count 0 2006.229.02:16:48.06#ibcon#read 6, iclass 11, count 0 2006.229.02:16:48.06#ibcon#end of sib2, iclass 11, count 0 2006.229.02:16:48.06#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:16:48.06#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:16:48.06#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:16:48.06#ibcon#*before write, iclass 11, count 0 2006.229.02:16:48.06#ibcon#enter sib2, iclass 11, count 0 2006.229.02:16:48.06#ibcon#flushed, iclass 11, count 0 2006.229.02:16:48.06#ibcon#about to write, iclass 11, count 0 2006.229.02:16:48.06#ibcon#wrote, iclass 11, count 0 2006.229.02:16:48.06#ibcon#about to read 3, iclass 11, count 0 2006.229.02:16:48.10#ibcon#read 3, iclass 11, count 0 2006.229.02:16:48.10#ibcon#about to read 4, iclass 11, count 0 2006.229.02:16:48.10#ibcon#read 4, iclass 11, count 0 2006.229.02:16:48.10#ibcon#about to read 5, iclass 11, count 0 2006.229.02:16:48.10#ibcon#read 5, iclass 11, count 0 2006.229.02:16:48.10#ibcon#about to read 6, iclass 11, count 0 2006.229.02:16:48.10#ibcon#read 6, iclass 11, count 0 2006.229.02:16:48.10#ibcon#end of sib2, iclass 11, count 0 2006.229.02:16:48.10#ibcon#*after write, iclass 11, count 0 2006.229.02:16:48.10#ibcon#*before return 0, iclass 11, count 0 2006.229.02:16:48.10#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:48.10#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:48.10#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:16:48.10#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:16:48.10$vck44/va=3,6 2006.229.02:16:48.10#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.02:16:48.10#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.02:16:48.10#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:48.10#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:48.16#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:48.16#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:48.16#ibcon#enter wrdev, iclass 13, count 2 2006.229.02:16:48.16#ibcon#first serial, iclass 13, count 2 2006.229.02:16:48.16#ibcon#enter sib2, iclass 13, count 2 2006.229.02:16:48.16#ibcon#flushed, iclass 13, count 2 2006.229.02:16:48.16#ibcon#about to write, iclass 13, count 2 2006.229.02:16:48.16#ibcon#wrote, iclass 13, count 2 2006.229.02:16:48.16#ibcon#about to read 3, iclass 13, count 2 2006.229.02:16:48.18#ibcon#read 3, iclass 13, count 2 2006.229.02:16:48.18#ibcon#about to read 4, iclass 13, count 2 2006.229.02:16:48.18#ibcon#read 4, iclass 13, count 2 2006.229.02:16:48.18#ibcon#about to read 5, iclass 13, count 2 2006.229.02:16:48.18#ibcon#read 5, iclass 13, count 2 2006.229.02:16:48.18#ibcon#about to read 6, iclass 13, count 2 2006.229.02:16:48.18#ibcon#read 6, iclass 13, count 2 2006.229.02:16:48.18#ibcon#end of sib2, iclass 13, count 2 2006.229.02:16:48.18#ibcon#*mode == 0, iclass 13, count 2 2006.229.02:16:48.18#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.02:16:48.18#ibcon#[25=AT03-06\r\n] 2006.229.02:16:48.18#ibcon#*before write, iclass 13, count 2 2006.229.02:16:48.18#ibcon#enter sib2, iclass 13, count 2 2006.229.02:16:48.18#ibcon#flushed, iclass 13, count 2 2006.229.02:16:48.18#ibcon#about to write, iclass 13, count 2 2006.229.02:16:48.18#ibcon#wrote, iclass 13, count 2 2006.229.02:16:48.18#ibcon#about to read 3, iclass 13, count 2 2006.229.02:16:48.21#ibcon#read 3, iclass 13, count 2 2006.229.02:16:48.21#ibcon#about to read 4, iclass 13, count 2 2006.229.02:16:48.21#ibcon#read 4, iclass 13, count 2 2006.229.02:16:48.21#ibcon#about to read 5, iclass 13, count 2 2006.229.02:16:48.21#ibcon#read 5, iclass 13, count 2 2006.229.02:16:48.21#ibcon#about to read 6, iclass 13, count 2 2006.229.02:16:48.21#ibcon#read 6, iclass 13, count 2 2006.229.02:16:48.21#ibcon#end of sib2, iclass 13, count 2 2006.229.02:16:48.21#ibcon#*after write, iclass 13, count 2 2006.229.02:16:48.21#ibcon#*before return 0, iclass 13, count 2 2006.229.02:16:48.21#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:48.21#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:48.21#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.02:16:48.21#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:48.21#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:48.33#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:48.33#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:48.33#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:16:48.33#ibcon#first serial, iclass 13, count 0 2006.229.02:16:48.33#ibcon#enter sib2, iclass 13, count 0 2006.229.02:16:48.33#ibcon#flushed, iclass 13, count 0 2006.229.02:16:48.33#ibcon#about to write, iclass 13, count 0 2006.229.02:16:48.33#ibcon#wrote, iclass 13, count 0 2006.229.02:16:48.33#ibcon#about to read 3, iclass 13, count 0 2006.229.02:16:48.35#ibcon#read 3, iclass 13, count 0 2006.229.02:16:48.35#ibcon#about to read 4, iclass 13, count 0 2006.229.02:16:48.35#ibcon#read 4, iclass 13, count 0 2006.229.02:16:48.35#ibcon#about to read 5, iclass 13, count 0 2006.229.02:16:48.35#ibcon#read 5, iclass 13, count 0 2006.229.02:16:48.35#ibcon#about to read 6, iclass 13, count 0 2006.229.02:16:48.35#ibcon#read 6, iclass 13, count 0 2006.229.02:16:48.35#ibcon#end of sib2, iclass 13, count 0 2006.229.02:16:48.35#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:16:48.35#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:16:48.35#ibcon#[25=USB\r\n] 2006.229.02:16:48.35#ibcon#*before write, iclass 13, count 0 2006.229.02:16:48.35#ibcon#enter sib2, iclass 13, count 0 2006.229.02:16:48.35#ibcon#flushed, iclass 13, count 0 2006.229.02:16:48.35#ibcon#about to write, iclass 13, count 0 2006.229.02:16:48.35#ibcon#wrote, iclass 13, count 0 2006.229.02:16:48.35#ibcon#about to read 3, iclass 13, count 0 2006.229.02:16:48.38#ibcon#read 3, iclass 13, count 0 2006.229.02:16:48.38#ibcon#about to read 4, iclass 13, count 0 2006.229.02:16:48.38#ibcon#read 4, iclass 13, count 0 2006.229.02:16:48.38#ibcon#about to read 5, iclass 13, count 0 2006.229.02:16:48.38#ibcon#read 5, iclass 13, count 0 2006.229.02:16:48.38#ibcon#about to read 6, iclass 13, count 0 2006.229.02:16:48.38#ibcon#read 6, iclass 13, count 0 2006.229.02:16:48.38#ibcon#end of sib2, iclass 13, count 0 2006.229.02:16:48.38#ibcon#*after write, iclass 13, count 0 2006.229.02:16:48.38#ibcon#*before return 0, iclass 13, count 0 2006.229.02:16:48.38#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:48.38#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:48.38#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:16:48.38#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:16:48.38$vck44/valo=4,624.99 2006.229.02:16:48.38#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.02:16:48.38#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.02:16:48.38#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:48.38#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:48.38#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:48.38#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:48.38#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:16:48.38#ibcon#first serial, iclass 15, count 0 2006.229.02:16:48.38#ibcon#enter sib2, iclass 15, count 0 2006.229.02:16:48.38#ibcon#flushed, iclass 15, count 0 2006.229.02:16:48.38#ibcon#about to write, iclass 15, count 0 2006.229.02:16:48.38#ibcon#wrote, iclass 15, count 0 2006.229.02:16:48.38#ibcon#about to read 3, iclass 15, count 0 2006.229.02:16:48.40#ibcon#read 3, iclass 15, count 0 2006.229.02:16:48.40#ibcon#about to read 4, iclass 15, count 0 2006.229.02:16:48.40#ibcon#read 4, iclass 15, count 0 2006.229.02:16:48.40#ibcon#about to read 5, iclass 15, count 0 2006.229.02:16:48.40#ibcon#read 5, iclass 15, count 0 2006.229.02:16:48.40#ibcon#about to read 6, iclass 15, count 0 2006.229.02:16:48.40#ibcon#read 6, iclass 15, count 0 2006.229.02:16:48.40#ibcon#end of sib2, iclass 15, count 0 2006.229.02:16:48.40#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:16:48.40#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:16:48.40#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:16:48.40#ibcon#*before write, iclass 15, count 0 2006.229.02:16:48.40#ibcon#enter sib2, iclass 15, count 0 2006.229.02:16:48.40#ibcon#flushed, iclass 15, count 0 2006.229.02:16:48.40#ibcon#about to write, iclass 15, count 0 2006.229.02:16:48.40#ibcon#wrote, iclass 15, count 0 2006.229.02:16:48.40#ibcon#about to read 3, iclass 15, count 0 2006.229.02:16:48.44#ibcon#read 3, iclass 15, count 0 2006.229.02:16:48.44#ibcon#about to read 4, iclass 15, count 0 2006.229.02:16:48.44#ibcon#read 4, iclass 15, count 0 2006.229.02:16:48.44#ibcon#about to read 5, iclass 15, count 0 2006.229.02:16:48.44#ibcon#read 5, iclass 15, count 0 2006.229.02:16:48.44#ibcon#about to read 6, iclass 15, count 0 2006.229.02:16:48.44#ibcon#read 6, iclass 15, count 0 2006.229.02:16:48.44#ibcon#end of sib2, iclass 15, count 0 2006.229.02:16:48.44#ibcon#*after write, iclass 15, count 0 2006.229.02:16:48.44#ibcon#*before return 0, iclass 15, count 0 2006.229.02:16:48.44#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:48.44#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:48.44#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:16:48.44#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:16:48.44$vck44/va=4,7 2006.229.02:16:48.44#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.02:16:48.44#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.02:16:48.44#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:48.44#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:48.50#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:48.50#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:48.50#ibcon#enter wrdev, iclass 17, count 2 2006.229.02:16:48.50#ibcon#first serial, iclass 17, count 2 2006.229.02:16:48.50#ibcon#enter sib2, iclass 17, count 2 2006.229.02:16:48.50#ibcon#flushed, iclass 17, count 2 2006.229.02:16:48.50#ibcon#about to write, iclass 17, count 2 2006.229.02:16:48.50#ibcon#wrote, iclass 17, count 2 2006.229.02:16:48.50#ibcon#about to read 3, iclass 17, count 2 2006.229.02:16:48.52#ibcon#read 3, iclass 17, count 2 2006.229.02:16:48.52#ibcon#about to read 4, iclass 17, count 2 2006.229.02:16:48.52#ibcon#read 4, iclass 17, count 2 2006.229.02:16:48.52#ibcon#about to read 5, iclass 17, count 2 2006.229.02:16:48.52#ibcon#read 5, iclass 17, count 2 2006.229.02:16:48.52#ibcon#about to read 6, iclass 17, count 2 2006.229.02:16:48.52#ibcon#read 6, iclass 17, count 2 2006.229.02:16:48.52#ibcon#end of sib2, iclass 17, count 2 2006.229.02:16:48.52#ibcon#*mode == 0, iclass 17, count 2 2006.229.02:16:48.52#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.02:16:48.52#ibcon#[25=AT04-07\r\n] 2006.229.02:16:48.52#ibcon#*before write, iclass 17, count 2 2006.229.02:16:48.52#ibcon#enter sib2, iclass 17, count 2 2006.229.02:16:48.52#ibcon#flushed, iclass 17, count 2 2006.229.02:16:48.52#ibcon#about to write, iclass 17, count 2 2006.229.02:16:48.52#ibcon#wrote, iclass 17, count 2 2006.229.02:16:48.52#ibcon#about to read 3, iclass 17, count 2 2006.229.02:16:48.55#ibcon#read 3, iclass 17, count 2 2006.229.02:16:48.55#ibcon#about to read 4, iclass 17, count 2 2006.229.02:16:48.55#ibcon#read 4, iclass 17, count 2 2006.229.02:16:48.55#ibcon#about to read 5, iclass 17, count 2 2006.229.02:16:48.55#ibcon#read 5, iclass 17, count 2 2006.229.02:16:48.55#ibcon#about to read 6, iclass 17, count 2 2006.229.02:16:48.55#ibcon#read 6, iclass 17, count 2 2006.229.02:16:48.55#ibcon#end of sib2, iclass 17, count 2 2006.229.02:16:48.55#ibcon#*after write, iclass 17, count 2 2006.229.02:16:48.55#ibcon#*before return 0, iclass 17, count 2 2006.229.02:16:48.55#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:48.55#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:48.55#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.02:16:48.55#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:48.55#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:48.67#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:48.67#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:48.67#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:16:48.67#ibcon#first serial, iclass 17, count 0 2006.229.02:16:48.67#ibcon#enter sib2, iclass 17, count 0 2006.229.02:16:48.67#ibcon#flushed, iclass 17, count 0 2006.229.02:16:48.67#ibcon#about to write, iclass 17, count 0 2006.229.02:16:48.67#ibcon#wrote, iclass 17, count 0 2006.229.02:16:48.67#ibcon#about to read 3, iclass 17, count 0 2006.229.02:16:48.69#ibcon#read 3, iclass 17, count 0 2006.229.02:16:48.69#ibcon#about to read 4, iclass 17, count 0 2006.229.02:16:48.69#ibcon#read 4, iclass 17, count 0 2006.229.02:16:48.69#ibcon#about to read 5, iclass 17, count 0 2006.229.02:16:48.69#ibcon#read 5, iclass 17, count 0 2006.229.02:16:48.69#ibcon#about to read 6, iclass 17, count 0 2006.229.02:16:48.69#ibcon#read 6, iclass 17, count 0 2006.229.02:16:48.69#ibcon#end of sib2, iclass 17, count 0 2006.229.02:16:48.69#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:16:48.69#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:16:48.69#ibcon#[25=USB\r\n] 2006.229.02:16:48.69#ibcon#*before write, iclass 17, count 0 2006.229.02:16:48.69#ibcon#enter sib2, iclass 17, count 0 2006.229.02:16:48.69#ibcon#flushed, iclass 17, count 0 2006.229.02:16:48.69#ibcon#about to write, iclass 17, count 0 2006.229.02:16:48.69#ibcon#wrote, iclass 17, count 0 2006.229.02:16:48.69#ibcon#about to read 3, iclass 17, count 0 2006.229.02:16:48.72#ibcon#read 3, iclass 17, count 0 2006.229.02:16:48.72#ibcon#about to read 4, iclass 17, count 0 2006.229.02:16:48.72#ibcon#read 4, iclass 17, count 0 2006.229.02:16:48.72#ibcon#about to read 5, iclass 17, count 0 2006.229.02:16:48.72#ibcon#read 5, iclass 17, count 0 2006.229.02:16:48.72#ibcon#about to read 6, iclass 17, count 0 2006.229.02:16:48.72#ibcon#read 6, iclass 17, count 0 2006.229.02:16:48.72#ibcon#end of sib2, iclass 17, count 0 2006.229.02:16:48.72#ibcon#*after write, iclass 17, count 0 2006.229.02:16:48.72#ibcon#*before return 0, iclass 17, count 0 2006.229.02:16:48.72#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:48.72#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:48.72#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:16:48.72#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:16:48.72$vck44/valo=5,734.99 2006.229.02:16:48.72#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.02:16:48.72#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.02:16:48.72#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:48.72#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:48.72#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:48.72#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:48.72#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:16:48.72#ibcon#first serial, iclass 19, count 0 2006.229.02:16:48.72#ibcon#enter sib2, iclass 19, count 0 2006.229.02:16:48.72#ibcon#flushed, iclass 19, count 0 2006.229.02:16:48.72#ibcon#about to write, iclass 19, count 0 2006.229.02:16:48.72#ibcon#wrote, iclass 19, count 0 2006.229.02:16:48.72#ibcon#about to read 3, iclass 19, count 0 2006.229.02:16:48.74#ibcon#read 3, iclass 19, count 0 2006.229.02:16:48.74#ibcon#about to read 4, iclass 19, count 0 2006.229.02:16:48.74#ibcon#read 4, iclass 19, count 0 2006.229.02:16:48.74#ibcon#about to read 5, iclass 19, count 0 2006.229.02:16:48.74#ibcon#read 5, iclass 19, count 0 2006.229.02:16:48.74#ibcon#about to read 6, iclass 19, count 0 2006.229.02:16:48.74#ibcon#read 6, iclass 19, count 0 2006.229.02:16:48.74#ibcon#end of sib2, iclass 19, count 0 2006.229.02:16:48.74#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:16:48.74#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:16:48.74#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:16:48.74#ibcon#*before write, iclass 19, count 0 2006.229.02:16:48.74#ibcon#enter sib2, iclass 19, count 0 2006.229.02:16:48.74#ibcon#flushed, iclass 19, count 0 2006.229.02:16:48.74#ibcon#about to write, iclass 19, count 0 2006.229.02:16:48.74#ibcon#wrote, iclass 19, count 0 2006.229.02:16:48.74#ibcon#about to read 3, iclass 19, count 0 2006.229.02:16:48.78#ibcon#read 3, iclass 19, count 0 2006.229.02:16:48.78#ibcon#about to read 4, iclass 19, count 0 2006.229.02:16:48.78#ibcon#read 4, iclass 19, count 0 2006.229.02:16:48.78#ibcon#about to read 5, iclass 19, count 0 2006.229.02:16:48.78#ibcon#read 5, iclass 19, count 0 2006.229.02:16:48.78#ibcon#about to read 6, iclass 19, count 0 2006.229.02:16:48.78#ibcon#read 6, iclass 19, count 0 2006.229.02:16:48.78#ibcon#end of sib2, iclass 19, count 0 2006.229.02:16:48.78#ibcon#*after write, iclass 19, count 0 2006.229.02:16:48.78#ibcon#*before return 0, iclass 19, count 0 2006.229.02:16:48.78#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:48.78#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:48.78#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:16:48.78#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:16:48.78$vck44/va=5,4 2006.229.02:16:48.78#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.02:16:48.78#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.02:16:48.78#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:48.78#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:48.84#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:48.84#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:48.84#ibcon#enter wrdev, iclass 21, count 2 2006.229.02:16:48.84#ibcon#first serial, iclass 21, count 2 2006.229.02:16:48.84#ibcon#enter sib2, iclass 21, count 2 2006.229.02:16:48.84#ibcon#flushed, iclass 21, count 2 2006.229.02:16:48.84#ibcon#about to write, iclass 21, count 2 2006.229.02:16:48.84#ibcon#wrote, iclass 21, count 2 2006.229.02:16:48.84#ibcon#about to read 3, iclass 21, count 2 2006.229.02:16:48.86#ibcon#read 3, iclass 21, count 2 2006.229.02:16:48.86#ibcon#about to read 4, iclass 21, count 2 2006.229.02:16:48.86#ibcon#read 4, iclass 21, count 2 2006.229.02:16:48.86#ibcon#about to read 5, iclass 21, count 2 2006.229.02:16:48.86#ibcon#read 5, iclass 21, count 2 2006.229.02:16:48.86#ibcon#about to read 6, iclass 21, count 2 2006.229.02:16:48.86#ibcon#read 6, iclass 21, count 2 2006.229.02:16:48.86#ibcon#end of sib2, iclass 21, count 2 2006.229.02:16:48.86#ibcon#*mode == 0, iclass 21, count 2 2006.229.02:16:48.86#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.02:16:48.86#ibcon#[25=AT05-04\r\n] 2006.229.02:16:48.86#ibcon#*before write, iclass 21, count 2 2006.229.02:16:48.86#ibcon#enter sib2, iclass 21, count 2 2006.229.02:16:48.86#ibcon#flushed, iclass 21, count 2 2006.229.02:16:48.86#ibcon#about to write, iclass 21, count 2 2006.229.02:16:48.86#ibcon#wrote, iclass 21, count 2 2006.229.02:16:48.86#ibcon#about to read 3, iclass 21, count 2 2006.229.02:16:48.89#ibcon#read 3, iclass 21, count 2 2006.229.02:16:48.89#ibcon#about to read 4, iclass 21, count 2 2006.229.02:16:48.89#ibcon#read 4, iclass 21, count 2 2006.229.02:16:48.89#ibcon#about to read 5, iclass 21, count 2 2006.229.02:16:48.89#ibcon#read 5, iclass 21, count 2 2006.229.02:16:48.89#ibcon#about to read 6, iclass 21, count 2 2006.229.02:16:48.89#ibcon#read 6, iclass 21, count 2 2006.229.02:16:48.89#ibcon#end of sib2, iclass 21, count 2 2006.229.02:16:48.89#ibcon#*after write, iclass 21, count 2 2006.229.02:16:48.89#ibcon#*before return 0, iclass 21, count 2 2006.229.02:16:48.89#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:48.89#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:48.89#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.02:16:48.89#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:48.89#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:49.01#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:49.01#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:49.01#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:16:49.01#ibcon#first serial, iclass 21, count 0 2006.229.02:16:49.01#ibcon#enter sib2, iclass 21, count 0 2006.229.02:16:49.01#ibcon#flushed, iclass 21, count 0 2006.229.02:16:49.01#ibcon#about to write, iclass 21, count 0 2006.229.02:16:49.01#ibcon#wrote, iclass 21, count 0 2006.229.02:16:49.01#ibcon#about to read 3, iclass 21, count 0 2006.229.02:16:49.03#ibcon#read 3, iclass 21, count 0 2006.229.02:16:49.03#ibcon#about to read 4, iclass 21, count 0 2006.229.02:16:49.03#ibcon#read 4, iclass 21, count 0 2006.229.02:16:49.03#ibcon#about to read 5, iclass 21, count 0 2006.229.02:16:49.03#ibcon#read 5, iclass 21, count 0 2006.229.02:16:49.03#ibcon#about to read 6, iclass 21, count 0 2006.229.02:16:49.03#ibcon#read 6, iclass 21, count 0 2006.229.02:16:49.03#ibcon#end of sib2, iclass 21, count 0 2006.229.02:16:49.03#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:16:49.03#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:16:49.03#ibcon#[25=USB\r\n] 2006.229.02:16:49.03#ibcon#*before write, iclass 21, count 0 2006.229.02:16:49.03#ibcon#enter sib2, iclass 21, count 0 2006.229.02:16:49.03#ibcon#flushed, iclass 21, count 0 2006.229.02:16:49.03#ibcon#about to write, iclass 21, count 0 2006.229.02:16:49.03#ibcon#wrote, iclass 21, count 0 2006.229.02:16:49.03#ibcon#about to read 3, iclass 21, count 0 2006.229.02:16:49.06#ibcon#read 3, iclass 21, count 0 2006.229.02:16:49.06#ibcon#about to read 4, iclass 21, count 0 2006.229.02:16:49.06#ibcon#read 4, iclass 21, count 0 2006.229.02:16:49.06#ibcon#about to read 5, iclass 21, count 0 2006.229.02:16:49.06#ibcon#read 5, iclass 21, count 0 2006.229.02:16:49.06#ibcon#about to read 6, iclass 21, count 0 2006.229.02:16:49.06#ibcon#read 6, iclass 21, count 0 2006.229.02:16:49.06#ibcon#end of sib2, iclass 21, count 0 2006.229.02:16:49.06#ibcon#*after write, iclass 21, count 0 2006.229.02:16:49.06#ibcon#*before return 0, iclass 21, count 0 2006.229.02:16:49.06#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:49.06#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:49.06#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:16:49.06#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:16:49.06$vck44/valo=6,814.99 2006.229.02:16:49.06#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.02:16:49.06#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.02:16:49.06#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:49.06#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:49.06#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:49.06#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:49.06#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:16:49.06#ibcon#first serial, iclass 23, count 0 2006.229.02:16:49.06#ibcon#enter sib2, iclass 23, count 0 2006.229.02:16:49.06#ibcon#flushed, iclass 23, count 0 2006.229.02:16:49.06#ibcon#about to write, iclass 23, count 0 2006.229.02:16:49.06#ibcon#wrote, iclass 23, count 0 2006.229.02:16:49.06#ibcon#about to read 3, iclass 23, count 0 2006.229.02:16:49.08#ibcon#read 3, iclass 23, count 0 2006.229.02:16:49.08#ibcon#about to read 4, iclass 23, count 0 2006.229.02:16:49.08#ibcon#read 4, iclass 23, count 0 2006.229.02:16:49.08#ibcon#about to read 5, iclass 23, count 0 2006.229.02:16:49.08#ibcon#read 5, iclass 23, count 0 2006.229.02:16:49.08#ibcon#about to read 6, iclass 23, count 0 2006.229.02:16:49.08#ibcon#read 6, iclass 23, count 0 2006.229.02:16:49.08#ibcon#end of sib2, iclass 23, count 0 2006.229.02:16:49.08#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:16:49.08#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:16:49.08#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:16:49.08#ibcon#*before write, iclass 23, count 0 2006.229.02:16:49.08#ibcon#enter sib2, iclass 23, count 0 2006.229.02:16:49.08#ibcon#flushed, iclass 23, count 0 2006.229.02:16:49.08#ibcon#about to write, iclass 23, count 0 2006.229.02:16:49.08#ibcon#wrote, iclass 23, count 0 2006.229.02:16:49.08#ibcon#about to read 3, iclass 23, count 0 2006.229.02:16:49.12#ibcon#read 3, iclass 23, count 0 2006.229.02:16:49.12#ibcon#about to read 4, iclass 23, count 0 2006.229.02:16:49.12#ibcon#read 4, iclass 23, count 0 2006.229.02:16:49.12#ibcon#about to read 5, iclass 23, count 0 2006.229.02:16:49.12#ibcon#read 5, iclass 23, count 0 2006.229.02:16:49.12#ibcon#about to read 6, iclass 23, count 0 2006.229.02:16:49.12#ibcon#read 6, iclass 23, count 0 2006.229.02:16:49.12#ibcon#end of sib2, iclass 23, count 0 2006.229.02:16:49.12#ibcon#*after write, iclass 23, count 0 2006.229.02:16:49.12#ibcon#*before return 0, iclass 23, count 0 2006.229.02:16:49.12#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:49.12#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:49.12#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:16:49.12#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:16:49.12$vck44/va=6,4 2006.229.02:16:49.12#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.02:16:49.12#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.02:16:49.12#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:49.12#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:49.18#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:49.18#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:49.18#ibcon#enter wrdev, iclass 25, count 2 2006.229.02:16:49.18#ibcon#first serial, iclass 25, count 2 2006.229.02:16:49.18#ibcon#enter sib2, iclass 25, count 2 2006.229.02:16:49.18#ibcon#flushed, iclass 25, count 2 2006.229.02:16:49.18#ibcon#about to write, iclass 25, count 2 2006.229.02:16:49.18#ibcon#wrote, iclass 25, count 2 2006.229.02:16:49.18#ibcon#about to read 3, iclass 25, count 2 2006.229.02:16:49.20#ibcon#read 3, iclass 25, count 2 2006.229.02:16:49.20#ibcon#about to read 4, iclass 25, count 2 2006.229.02:16:49.20#ibcon#read 4, iclass 25, count 2 2006.229.02:16:49.20#ibcon#about to read 5, iclass 25, count 2 2006.229.02:16:49.20#ibcon#read 5, iclass 25, count 2 2006.229.02:16:49.20#ibcon#about to read 6, iclass 25, count 2 2006.229.02:16:49.20#ibcon#read 6, iclass 25, count 2 2006.229.02:16:49.20#ibcon#end of sib2, iclass 25, count 2 2006.229.02:16:49.20#ibcon#*mode == 0, iclass 25, count 2 2006.229.02:16:49.20#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.02:16:49.20#ibcon#[25=AT06-04\r\n] 2006.229.02:16:49.20#ibcon#*before write, iclass 25, count 2 2006.229.02:16:49.20#ibcon#enter sib2, iclass 25, count 2 2006.229.02:16:49.20#ibcon#flushed, iclass 25, count 2 2006.229.02:16:49.20#ibcon#about to write, iclass 25, count 2 2006.229.02:16:49.20#ibcon#wrote, iclass 25, count 2 2006.229.02:16:49.20#ibcon#about to read 3, iclass 25, count 2 2006.229.02:16:49.23#ibcon#read 3, iclass 25, count 2 2006.229.02:16:49.23#ibcon#about to read 4, iclass 25, count 2 2006.229.02:16:49.23#ibcon#read 4, iclass 25, count 2 2006.229.02:16:49.23#ibcon#about to read 5, iclass 25, count 2 2006.229.02:16:49.23#ibcon#read 5, iclass 25, count 2 2006.229.02:16:49.23#ibcon#about to read 6, iclass 25, count 2 2006.229.02:16:49.23#ibcon#read 6, iclass 25, count 2 2006.229.02:16:49.23#ibcon#end of sib2, iclass 25, count 2 2006.229.02:16:49.23#ibcon#*after write, iclass 25, count 2 2006.229.02:16:49.23#ibcon#*before return 0, iclass 25, count 2 2006.229.02:16:49.23#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:49.23#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:49.23#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.02:16:49.23#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:49.23#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:49.35#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:49.35#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:49.35#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:16:49.35#ibcon#first serial, iclass 25, count 0 2006.229.02:16:49.35#ibcon#enter sib2, iclass 25, count 0 2006.229.02:16:49.35#ibcon#flushed, iclass 25, count 0 2006.229.02:16:49.35#ibcon#about to write, iclass 25, count 0 2006.229.02:16:49.35#ibcon#wrote, iclass 25, count 0 2006.229.02:16:49.35#ibcon#about to read 3, iclass 25, count 0 2006.229.02:16:49.37#ibcon#read 3, iclass 25, count 0 2006.229.02:16:49.37#ibcon#about to read 4, iclass 25, count 0 2006.229.02:16:49.37#ibcon#read 4, iclass 25, count 0 2006.229.02:16:49.37#ibcon#about to read 5, iclass 25, count 0 2006.229.02:16:49.37#ibcon#read 5, iclass 25, count 0 2006.229.02:16:49.37#ibcon#about to read 6, iclass 25, count 0 2006.229.02:16:49.37#ibcon#read 6, iclass 25, count 0 2006.229.02:16:49.37#ibcon#end of sib2, iclass 25, count 0 2006.229.02:16:49.37#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:16:49.37#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:16:49.37#ibcon#[25=USB\r\n] 2006.229.02:16:49.37#ibcon#*before write, iclass 25, count 0 2006.229.02:16:49.37#ibcon#enter sib2, iclass 25, count 0 2006.229.02:16:49.37#ibcon#flushed, iclass 25, count 0 2006.229.02:16:49.37#ibcon#about to write, iclass 25, count 0 2006.229.02:16:49.37#ibcon#wrote, iclass 25, count 0 2006.229.02:16:49.37#ibcon#about to read 3, iclass 25, count 0 2006.229.02:16:49.40#ibcon#read 3, iclass 25, count 0 2006.229.02:16:49.40#ibcon#about to read 4, iclass 25, count 0 2006.229.02:16:49.40#ibcon#read 4, iclass 25, count 0 2006.229.02:16:49.40#ibcon#about to read 5, iclass 25, count 0 2006.229.02:16:49.40#ibcon#read 5, iclass 25, count 0 2006.229.02:16:49.40#ibcon#about to read 6, iclass 25, count 0 2006.229.02:16:49.40#ibcon#read 6, iclass 25, count 0 2006.229.02:16:49.40#ibcon#end of sib2, iclass 25, count 0 2006.229.02:16:49.40#ibcon#*after write, iclass 25, count 0 2006.229.02:16:49.40#ibcon#*before return 0, iclass 25, count 0 2006.229.02:16:49.40#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:49.40#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:49.40#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:16:49.40#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:16:49.40$vck44/valo=7,864.99 2006.229.02:16:49.40#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.02:16:49.40#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.02:16:49.40#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:49.40#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:49.40#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:49.40#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:49.40#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:16:49.40#ibcon#first serial, iclass 27, count 0 2006.229.02:16:49.40#ibcon#enter sib2, iclass 27, count 0 2006.229.02:16:49.40#ibcon#flushed, iclass 27, count 0 2006.229.02:16:49.40#ibcon#about to write, iclass 27, count 0 2006.229.02:16:49.40#ibcon#wrote, iclass 27, count 0 2006.229.02:16:49.40#ibcon#about to read 3, iclass 27, count 0 2006.229.02:16:49.42#ibcon#read 3, iclass 27, count 0 2006.229.02:16:49.42#ibcon#about to read 4, iclass 27, count 0 2006.229.02:16:49.42#ibcon#read 4, iclass 27, count 0 2006.229.02:16:49.42#ibcon#about to read 5, iclass 27, count 0 2006.229.02:16:49.42#ibcon#read 5, iclass 27, count 0 2006.229.02:16:49.42#ibcon#about to read 6, iclass 27, count 0 2006.229.02:16:49.42#ibcon#read 6, iclass 27, count 0 2006.229.02:16:49.42#ibcon#end of sib2, iclass 27, count 0 2006.229.02:16:49.42#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:16:49.42#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:16:49.42#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:16:49.42#ibcon#*before write, iclass 27, count 0 2006.229.02:16:49.42#ibcon#enter sib2, iclass 27, count 0 2006.229.02:16:49.42#ibcon#flushed, iclass 27, count 0 2006.229.02:16:49.42#ibcon#about to write, iclass 27, count 0 2006.229.02:16:49.42#ibcon#wrote, iclass 27, count 0 2006.229.02:16:49.42#ibcon#about to read 3, iclass 27, count 0 2006.229.02:16:49.46#ibcon#read 3, iclass 27, count 0 2006.229.02:16:49.46#ibcon#about to read 4, iclass 27, count 0 2006.229.02:16:49.46#ibcon#read 4, iclass 27, count 0 2006.229.02:16:49.46#ibcon#about to read 5, iclass 27, count 0 2006.229.02:16:49.46#ibcon#read 5, iclass 27, count 0 2006.229.02:16:49.46#ibcon#about to read 6, iclass 27, count 0 2006.229.02:16:49.46#ibcon#read 6, iclass 27, count 0 2006.229.02:16:49.46#ibcon#end of sib2, iclass 27, count 0 2006.229.02:16:49.46#ibcon#*after write, iclass 27, count 0 2006.229.02:16:49.46#ibcon#*before return 0, iclass 27, count 0 2006.229.02:16:49.46#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:49.46#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:49.46#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:16:49.46#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:16:49.46$vck44/va=7,5 2006.229.02:16:49.46#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.02:16:49.46#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.02:16:49.46#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:49.46#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:49.52#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:49.52#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:49.52#ibcon#enter wrdev, iclass 29, count 2 2006.229.02:16:49.52#ibcon#first serial, iclass 29, count 2 2006.229.02:16:49.52#ibcon#enter sib2, iclass 29, count 2 2006.229.02:16:49.52#ibcon#flushed, iclass 29, count 2 2006.229.02:16:49.52#ibcon#about to write, iclass 29, count 2 2006.229.02:16:49.52#ibcon#wrote, iclass 29, count 2 2006.229.02:16:49.52#ibcon#about to read 3, iclass 29, count 2 2006.229.02:16:49.54#ibcon#read 3, iclass 29, count 2 2006.229.02:16:49.54#ibcon#about to read 4, iclass 29, count 2 2006.229.02:16:49.54#ibcon#read 4, iclass 29, count 2 2006.229.02:16:49.54#ibcon#about to read 5, iclass 29, count 2 2006.229.02:16:49.54#ibcon#read 5, iclass 29, count 2 2006.229.02:16:49.54#ibcon#about to read 6, iclass 29, count 2 2006.229.02:16:49.54#ibcon#read 6, iclass 29, count 2 2006.229.02:16:49.54#ibcon#end of sib2, iclass 29, count 2 2006.229.02:16:49.54#ibcon#*mode == 0, iclass 29, count 2 2006.229.02:16:49.54#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.02:16:49.54#ibcon#[25=AT07-05\r\n] 2006.229.02:16:49.54#ibcon#*before write, iclass 29, count 2 2006.229.02:16:49.54#ibcon#enter sib2, iclass 29, count 2 2006.229.02:16:49.54#ibcon#flushed, iclass 29, count 2 2006.229.02:16:49.54#ibcon#about to write, iclass 29, count 2 2006.229.02:16:49.54#ibcon#wrote, iclass 29, count 2 2006.229.02:16:49.54#ibcon#about to read 3, iclass 29, count 2 2006.229.02:16:49.57#ibcon#read 3, iclass 29, count 2 2006.229.02:16:49.57#ibcon#about to read 4, iclass 29, count 2 2006.229.02:16:49.57#ibcon#read 4, iclass 29, count 2 2006.229.02:16:49.57#ibcon#about to read 5, iclass 29, count 2 2006.229.02:16:49.57#ibcon#read 5, iclass 29, count 2 2006.229.02:16:49.57#ibcon#about to read 6, iclass 29, count 2 2006.229.02:16:49.57#ibcon#read 6, iclass 29, count 2 2006.229.02:16:49.57#ibcon#end of sib2, iclass 29, count 2 2006.229.02:16:49.57#ibcon#*after write, iclass 29, count 2 2006.229.02:16:49.57#ibcon#*before return 0, iclass 29, count 2 2006.229.02:16:49.57#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:49.57#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:49.57#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.02:16:49.57#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:49.57#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:49.69#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:49.69#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:49.69#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:16:49.69#ibcon#first serial, iclass 29, count 0 2006.229.02:16:49.69#ibcon#enter sib2, iclass 29, count 0 2006.229.02:16:49.69#ibcon#flushed, iclass 29, count 0 2006.229.02:16:49.69#ibcon#about to write, iclass 29, count 0 2006.229.02:16:49.69#ibcon#wrote, iclass 29, count 0 2006.229.02:16:49.69#ibcon#about to read 3, iclass 29, count 0 2006.229.02:16:49.71#ibcon#read 3, iclass 29, count 0 2006.229.02:16:49.71#ibcon#about to read 4, iclass 29, count 0 2006.229.02:16:49.71#ibcon#read 4, iclass 29, count 0 2006.229.02:16:49.71#ibcon#about to read 5, iclass 29, count 0 2006.229.02:16:49.71#ibcon#read 5, iclass 29, count 0 2006.229.02:16:49.71#ibcon#about to read 6, iclass 29, count 0 2006.229.02:16:49.71#ibcon#read 6, iclass 29, count 0 2006.229.02:16:49.71#ibcon#end of sib2, iclass 29, count 0 2006.229.02:16:49.71#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:16:49.71#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:16:49.71#ibcon#[25=USB\r\n] 2006.229.02:16:49.71#ibcon#*before write, iclass 29, count 0 2006.229.02:16:49.71#ibcon#enter sib2, iclass 29, count 0 2006.229.02:16:49.71#ibcon#flushed, iclass 29, count 0 2006.229.02:16:49.71#ibcon#about to write, iclass 29, count 0 2006.229.02:16:49.71#ibcon#wrote, iclass 29, count 0 2006.229.02:16:49.71#ibcon#about to read 3, iclass 29, count 0 2006.229.02:16:49.74#ibcon#read 3, iclass 29, count 0 2006.229.02:16:49.74#ibcon#about to read 4, iclass 29, count 0 2006.229.02:16:49.74#ibcon#read 4, iclass 29, count 0 2006.229.02:16:49.74#ibcon#about to read 5, iclass 29, count 0 2006.229.02:16:49.74#ibcon#read 5, iclass 29, count 0 2006.229.02:16:49.74#ibcon#about to read 6, iclass 29, count 0 2006.229.02:16:49.74#ibcon#read 6, iclass 29, count 0 2006.229.02:16:49.74#ibcon#end of sib2, iclass 29, count 0 2006.229.02:16:49.74#ibcon#*after write, iclass 29, count 0 2006.229.02:16:49.74#ibcon#*before return 0, iclass 29, count 0 2006.229.02:16:49.74#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:49.74#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:49.74#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:16:49.74#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:16:49.74$vck44/valo=8,884.99 2006.229.02:16:49.74#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.02:16:49.74#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.02:16:49.74#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:49.74#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:49.74#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:49.74#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:49.74#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:16:49.74#ibcon#first serial, iclass 31, count 0 2006.229.02:16:49.74#ibcon#enter sib2, iclass 31, count 0 2006.229.02:16:49.74#ibcon#flushed, iclass 31, count 0 2006.229.02:16:49.74#ibcon#about to write, iclass 31, count 0 2006.229.02:16:49.74#ibcon#wrote, iclass 31, count 0 2006.229.02:16:49.74#ibcon#about to read 3, iclass 31, count 0 2006.229.02:16:49.76#ibcon#read 3, iclass 31, count 0 2006.229.02:16:49.76#ibcon#about to read 4, iclass 31, count 0 2006.229.02:16:49.76#ibcon#read 4, iclass 31, count 0 2006.229.02:16:49.76#ibcon#about to read 5, iclass 31, count 0 2006.229.02:16:49.76#ibcon#read 5, iclass 31, count 0 2006.229.02:16:49.76#ibcon#about to read 6, iclass 31, count 0 2006.229.02:16:49.76#ibcon#read 6, iclass 31, count 0 2006.229.02:16:49.76#ibcon#end of sib2, iclass 31, count 0 2006.229.02:16:49.76#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:16:49.76#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:16:49.76#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:16:49.76#ibcon#*before write, iclass 31, count 0 2006.229.02:16:49.76#ibcon#enter sib2, iclass 31, count 0 2006.229.02:16:49.76#ibcon#flushed, iclass 31, count 0 2006.229.02:16:49.76#ibcon#about to write, iclass 31, count 0 2006.229.02:16:49.76#ibcon#wrote, iclass 31, count 0 2006.229.02:16:49.76#ibcon#about to read 3, iclass 31, count 0 2006.229.02:16:49.80#ibcon#read 3, iclass 31, count 0 2006.229.02:16:49.80#ibcon#about to read 4, iclass 31, count 0 2006.229.02:16:49.80#ibcon#read 4, iclass 31, count 0 2006.229.02:16:49.80#ibcon#about to read 5, iclass 31, count 0 2006.229.02:16:49.80#ibcon#read 5, iclass 31, count 0 2006.229.02:16:49.80#ibcon#about to read 6, iclass 31, count 0 2006.229.02:16:49.80#ibcon#read 6, iclass 31, count 0 2006.229.02:16:49.80#ibcon#end of sib2, iclass 31, count 0 2006.229.02:16:49.80#ibcon#*after write, iclass 31, count 0 2006.229.02:16:49.80#ibcon#*before return 0, iclass 31, count 0 2006.229.02:16:49.80#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:49.80#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:49.80#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:16:49.80#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:16:49.80$vck44/va=8,6 2006.229.02:16:49.80#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.02:16:49.80#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.02:16:49.80#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:49.80#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:16:49.86#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:16:49.86#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:16:49.86#ibcon#enter wrdev, iclass 33, count 2 2006.229.02:16:49.86#ibcon#first serial, iclass 33, count 2 2006.229.02:16:49.86#ibcon#enter sib2, iclass 33, count 2 2006.229.02:16:49.86#ibcon#flushed, iclass 33, count 2 2006.229.02:16:49.86#ibcon#about to write, iclass 33, count 2 2006.229.02:16:49.86#ibcon#wrote, iclass 33, count 2 2006.229.02:16:49.86#ibcon#about to read 3, iclass 33, count 2 2006.229.02:16:49.88#ibcon#read 3, iclass 33, count 2 2006.229.02:16:49.88#ibcon#about to read 4, iclass 33, count 2 2006.229.02:16:49.88#ibcon#read 4, iclass 33, count 2 2006.229.02:16:49.88#ibcon#about to read 5, iclass 33, count 2 2006.229.02:16:49.88#ibcon#read 5, iclass 33, count 2 2006.229.02:16:49.88#ibcon#about to read 6, iclass 33, count 2 2006.229.02:16:49.88#ibcon#read 6, iclass 33, count 2 2006.229.02:16:49.88#ibcon#end of sib2, iclass 33, count 2 2006.229.02:16:49.88#ibcon#*mode == 0, iclass 33, count 2 2006.229.02:16:49.88#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.02:16:49.88#ibcon#[25=AT08-06\r\n] 2006.229.02:16:49.88#ibcon#*before write, iclass 33, count 2 2006.229.02:16:49.88#ibcon#enter sib2, iclass 33, count 2 2006.229.02:16:49.88#ibcon#flushed, iclass 33, count 2 2006.229.02:16:49.88#ibcon#about to write, iclass 33, count 2 2006.229.02:16:49.88#ibcon#wrote, iclass 33, count 2 2006.229.02:16:49.88#ibcon#about to read 3, iclass 33, count 2 2006.229.02:16:49.91#ibcon#read 3, iclass 33, count 2 2006.229.02:16:49.91#ibcon#about to read 4, iclass 33, count 2 2006.229.02:16:49.91#ibcon#read 4, iclass 33, count 2 2006.229.02:16:49.91#ibcon#about to read 5, iclass 33, count 2 2006.229.02:16:49.91#ibcon#read 5, iclass 33, count 2 2006.229.02:16:49.91#ibcon#about to read 6, iclass 33, count 2 2006.229.02:16:49.91#ibcon#read 6, iclass 33, count 2 2006.229.02:16:49.91#ibcon#end of sib2, iclass 33, count 2 2006.229.02:16:49.91#ibcon#*after write, iclass 33, count 2 2006.229.02:16:49.91#ibcon#*before return 0, iclass 33, count 2 2006.229.02:16:49.91#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:16:49.91#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:16:49.91#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.02:16:49.91#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:49.91#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:16:50.03#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:16:50.03#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:16:50.03#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:16:50.03#ibcon#first serial, iclass 33, count 0 2006.229.02:16:50.03#ibcon#enter sib2, iclass 33, count 0 2006.229.02:16:50.03#ibcon#flushed, iclass 33, count 0 2006.229.02:16:50.03#ibcon#about to write, iclass 33, count 0 2006.229.02:16:50.03#ibcon#wrote, iclass 33, count 0 2006.229.02:16:50.03#ibcon#about to read 3, iclass 33, count 0 2006.229.02:16:50.05#ibcon#read 3, iclass 33, count 0 2006.229.02:16:50.05#ibcon#about to read 4, iclass 33, count 0 2006.229.02:16:50.05#ibcon#read 4, iclass 33, count 0 2006.229.02:16:50.05#ibcon#about to read 5, iclass 33, count 0 2006.229.02:16:50.05#ibcon#read 5, iclass 33, count 0 2006.229.02:16:50.05#ibcon#about to read 6, iclass 33, count 0 2006.229.02:16:50.05#ibcon#read 6, iclass 33, count 0 2006.229.02:16:50.05#ibcon#end of sib2, iclass 33, count 0 2006.229.02:16:50.05#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:16:50.05#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:16:50.05#ibcon#[25=USB\r\n] 2006.229.02:16:50.05#ibcon#*before write, iclass 33, count 0 2006.229.02:16:50.05#ibcon#enter sib2, iclass 33, count 0 2006.229.02:16:50.05#ibcon#flushed, iclass 33, count 0 2006.229.02:16:50.05#ibcon#about to write, iclass 33, count 0 2006.229.02:16:50.05#ibcon#wrote, iclass 33, count 0 2006.229.02:16:50.05#ibcon#about to read 3, iclass 33, count 0 2006.229.02:16:50.08#ibcon#read 3, iclass 33, count 0 2006.229.02:16:50.08#ibcon#about to read 4, iclass 33, count 0 2006.229.02:16:50.08#ibcon#read 4, iclass 33, count 0 2006.229.02:16:50.08#ibcon#about to read 5, iclass 33, count 0 2006.229.02:16:50.08#ibcon#read 5, iclass 33, count 0 2006.229.02:16:50.08#ibcon#about to read 6, iclass 33, count 0 2006.229.02:16:50.08#ibcon#read 6, iclass 33, count 0 2006.229.02:16:50.08#ibcon#end of sib2, iclass 33, count 0 2006.229.02:16:50.08#ibcon#*after write, iclass 33, count 0 2006.229.02:16:50.08#ibcon#*before return 0, iclass 33, count 0 2006.229.02:16:50.08#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:16:50.08#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:16:50.08#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:16:50.08#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:16:50.08$vck44/vblo=1,629.99 2006.229.02:16:50.08#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.02:16:50.08#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.02:16:50.08#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:50.08#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:16:50.08#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:16:50.08#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:16:50.08#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:16:50.08#ibcon#first serial, iclass 35, count 0 2006.229.02:16:50.08#ibcon#enter sib2, iclass 35, count 0 2006.229.02:16:50.08#ibcon#flushed, iclass 35, count 0 2006.229.02:16:50.08#ibcon#about to write, iclass 35, count 0 2006.229.02:16:50.08#ibcon#wrote, iclass 35, count 0 2006.229.02:16:50.08#ibcon#about to read 3, iclass 35, count 0 2006.229.02:16:50.10#ibcon#read 3, iclass 35, count 0 2006.229.02:16:50.10#ibcon#about to read 4, iclass 35, count 0 2006.229.02:16:50.10#ibcon#read 4, iclass 35, count 0 2006.229.02:16:50.10#ibcon#about to read 5, iclass 35, count 0 2006.229.02:16:50.10#ibcon#read 5, iclass 35, count 0 2006.229.02:16:50.10#ibcon#about to read 6, iclass 35, count 0 2006.229.02:16:50.10#ibcon#read 6, iclass 35, count 0 2006.229.02:16:50.10#ibcon#end of sib2, iclass 35, count 0 2006.229.02:16:50.10#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:16:50.10#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:16:50.10#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:16:50.10#ibcon#*before write, iclass 35, count 0 2006.229.02:16:50.10#ibcon#enter sib2, iclass 35, count 0 2006.229.02:16:50.10#ibcon#flushed, iclass 35, count 0 2006.229.02:16:50.10#ibcon#about to write, iclass 35, count 0 2006.229.02:16:50.10#ibcon#wrote, iclass 35, count 0 2006.229.02:16:50.10#ibcon#about to read 3, iclass 35, count 0 2006.229.02:16:50.14#ibcon#read 3, iclass 35, count 0 2006.229.02:16:50.14#ibcon#about to read 4, iclass 35, count 0 2006.229.02:16:50.14#ibcon#read 4, iclass 35, count 0 2006.229.02:16:50.14#ibcon#about to read 5, iclass 35, count 0 2006.229.02:16:50.14#ibcon#read 5, iclass 35, count 0 2006.229.02:16:50.14#ibcon#about to read 6, iclass 35, count 0 2006.229.02:16:50.14#ibcon#read 6, iclass 35, count 0 2006.229.02:16:50.14#ibcon#end of sib2, iclass 35, count 0 2006.229.02:16:50.14#ibcon#*after write, iclass 35, count 0 2006.229.02:16:50.14#ibcon#*before return 0, iclass 35, count 0 2006.229.02:16:50.14#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:16:50.14#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:16:50.14#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:16:50.14#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:16:50.14$vck44/vb=1,4 2006.229.02:16:50.14#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.02:16:50.14#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.02:16:50.14#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:50.14#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:16:50.14#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:16:50.14#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:16:50.14#ibcon#enter wrdev, iclass 37, count 2 2006.229.02:16:50.14#ibcon#first serial, iclass 37, count 2 2006.229.02:16:50.14#ibcon#enter sib2, iclass 37, count 2 2006.229.02:16:50.14#ibcon#flushed, iclass 37, count 2 2006.229.02:16:50.14#ibcon#about to write, iclass 37, count 2 2006.229.02:16:50.14#ibcon#wrote, iclass 37, count 2 2006.229.02:16:50.14#ibcon#about to read 3, iclass 37, count 2 2006.229.02:16:50.16#ibcon#read 3, iclass 37, count 2 2006.229.02:16:50.16#ibcon#about to read 4, iclass 37, count 2 2006.229.02:16:50.16#ibcon#read 4, iclass 37, count 2 2006.229.02:16:50.16#ibcon#about to read 5, iclass 37, count 2 2006.229.02:16:50.16#ibcon#read 5, iclass 37, count 2 2006.229.02:16:50.16#ibcon#about to read 6, iclass 37, count 2 2006.229.02:16:50.16#ibcon#read 6, iclass 37, count 2 2006.229.02:16:50.16#ibcon#end of sib2, iclass 37, count 2 2006.229.02:16:50.16#ibcon#*mode == 0, iclass 37, count 2 2006.229.02:16:50.16#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.02:16:50.16#ibcon#[27=AT01-04\r\n] 2006.229.02:16:50.16#ibcon#*before write, iclass 37, count 2 2006.229.02:16:50.16#ibcon#enter sib2, iclass 37, count 2 2006.229.02:16:50.16#ibcon#flushed, iclass 37, count 2 2006.229.02:16:50.16#ibcon#about to write, iclass 37, count 2 2006.229.02:16:50.16#ibcon#wrote, iclass 37, count 2 2006.229.02:16:50.16#ibcon#about to read 3, iclass 37, count 2 2006.229.02:16:50.19#ibcon#read 3, iclass 37, count 2 2006.229.02:16:50.19#ibcon#about to read 4, iclass 37, count 2 2006.229.02:16:50.19#ibcon#read 4, iclass 37, count 2 2006.229.02:16:50.19#ibcon#about to read 5, iclass 37, count 2 2006.229.02:16:50.19#ibcon#read 5, iclass 37, count 2 2006.229.02:16:50.19#ibcon#about to read 6, iclass 37, count 2 2006.229.02:16:50.19#ibcon#read 6, iclass 37, count 2 2006.229.02:16:50.19#ibcon#end of sib2, iclass 37, count 2 2006.229.02:16:50.19#ibcon#*after write, iclass 37, count 2 2006.229.02:16:50.19#ibcon#*before return 0, iclass 37, count 2 2006.229.02:16:50.19#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:16:50.19#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:16:50.19#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.02:16:50.19#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:50.19#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:16:50.31#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:16:50.31#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:16:50.31#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:16:50.31#ibcon#first serial, iclass 37, count 0 2006.229.02:16:50.31#ibcon#enter sib2, iclass 37, count 0 2006.229.02:16:50.31#ibcon#flushed, iclass 37, count 0 2006.229.02:16:50.31#ibcon#about to write, iclass 37, count 0 2006.229.02:16:50.31#ibcon#wrote, iclass 37, count 0 2006.229.02:16:50.31#ibcon#about to read 3, iclass 37, count 0 2006.229.02:16:50.33#ibcon#read 3, iclass 37, count 0 2006.229.02:16:50.33#ibcon#about to read 4, iclass 37, count 0 2006.229.02:16:50.33#ibcon#read 4, iclass 37, count 0 2006.229.02:16:50.33#ibcon#about to read 5, iclass 37, count 0 2006.229.02:16:50.33#ibcon#read 5, iclass 37, count 0 2006.229.02:16:50.33#ibcon#about to read 6, iclass 37, count 0 2006.229.02:16:50.33#ibcon#read 6, iclass 37, count 0 2006.229.02:16:50.33#ibcon#end of sib2, iclass 37, count 0 2006.229.02:16:50.33#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:16:50.33#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:16:50.33#ibcon#[27=USB\r\n] 2006.229.02:16:50.33#ibcon#*before write, iclass 37, count 0 2006.229.02:16:50.33#ibcon#enter sib2, iclass 37, count 0 2006.229.02:16:50.33#ibcon#flushed, iclass 37, count 0 2006.229.02:16:50.33#ibcon#about to write, iclass 37, count 0 2006.229.02:16:50.33#ibcon#wrote, iclass 37, count 0 2006.229.02:16:50.33#ibcon#about to read 3, iclass 37, count 0 2006.229.02:16:50.36#ibcon#read 3, iclass 37, count 0 2006.229.02:16:50.36#ibcon#about to read 4, iclass 37, count 0 2006.229.02:16:50.36#ibcon#read 4, iclass 37, count 0 2006.229.02:16:50.36#ibcon#about to read 5, iclass 37, count 0 2006.229.02:16:50.36#ibcon#read 5, iclass 37, count 0 2006.229.02:16:50.36#ibcon#about to read 6, iclass 37, count 0 2006.229.02:16:50.36#ibcon#read 6, iclass 37, count 0 2006.229.02:16:50.36#ibcon#end of sib2, iclass 37, count 0 2006.229.02:16:50.36#ibcon#*after write, iclass 37, count 0 2006.229.02:16:50.36#ibcon#*before return 0, iclass 37, count 0 2006.229.02:16:50.36#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:16:50.36#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:16:50.36#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:16:50.36#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:16:50.36$vck44/vblo=2,634.99 2006.229.02:16:50.36#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.02:16:50.36#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.02:16:50.36#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:50.36#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:50.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:50.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:50.36#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:16:50.36#ibcon#first serial, iclass 39, count 0 2006.229.02:16:50.36#ibcon#enter sib2, iclass 39, count 0 2006.229.02:16:50.36#ibcon#flushed, iclass 39, count 0 2006.229.02:16:50.36#ibcon#about to write, iclass 39, count 0 2006.229.02:16:50.36#ibcon#wrote, iclass 39, count 0 2006.229.02:16:50.36#ibcon#about to read 3, iclass 39, count 0 2006.229.02:16:50.38#ibcon#read 3, iclass 39, count 0 2006.229.02:16:50.38#ibcon#about to read 4, iclass 39, count 0 2006.229.02:16:50.38#ibcon#read 4, iclass 39, count 0 2006.229.02:16:50.38#ibcon#about to read 5, iclass 39, count 0 2006.229.02:16:50.38#ibcon#read 5, iclass 39, count 0 2006.229.02:16:50.38#ibcon#about to read 6, iclass 39, count 0 2006.229.02:16:50.38#ibcon#read 6, iclass 39, count 0 2006.229.02:16:50.38#ibcon#end of sib2, iclass 39, count 0 2006.229.02:16:50.38#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:16:50.38#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:16:50.38#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:16:50.38#ibcon#*before write, iclass 39, count 0 2006.229.02:16:50.38#ibcon#enter sib2, iclass 39, count 0 2006.229.02:16:50.38#ibcon#flushed, iclass 39, count 0 2006.229.02:16:50.38#ibcon#about to write, iclass 39, count 0 2006.229.02:16:50.38#ibcon#wrote, iclass 39, count 0 2006.229.02:16:50.38#ibcon#about to read 3, iclass 39, count 0 2006.229.02:16:50.42#ibcon#read 3, iclass 39, count 0 2006.229.02:16:50.42#ibcon#about to read 4, iclass 39, count 0 2006.229.02:16:50.42#ibcon#read 4, iclass 39, count 0 2006.229.02:16:50.42#ibcon#about to read 5, iclass 39, count 0 2006.229.02:16:50.42#ibcon#read 5, iclass 39, count 0 2006.229.02:16:50.42#ibcon#about to read 6, iclass 39, count 0 2006.229.02:16:50.42#ibcon#read 6, iclass 39, count 0 2006.229.02:16:50.42#ibcon#end of sib2, iclass 39, count 0 2006.229.02:16:50.42#ibcon#*after write, iclass 39, count 0 2006.229.02:16:50.42#ibcon#*before return 0, iclass 39, count 0 2006.229.02:16:50.42#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:50.42#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:16:50.42#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:16:50.42#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:16:50.42$vck44/vb=2,4 2006.229.02:16:50.42#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.02:16:50.42#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.02:16:50.42#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:50.42#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:50.48#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:50.48#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:50.48#ibcon#enter wrdev, iclass 3, count 2 2006.229.02:16:50.48#ibcon#first serial, iclass 3, count 2 2006.229.02:16:50.48#ibcon#enter sib2, iclass 3, count 2 2006.229.02:16:50.48#ibcon#flushed, iclass 3, count 2 2006.229.02:16:50.48#ibcon#about to write, iclass 3, count 2 2006.229.02:16:50.48#ibcon#wrote, iclass 3, count 2 2006.229.02:16:50.48#ibcon#about to read 3, iclass 3, count 2 2006.229.02:16:50.50#ibcon#read 3, iclass 3, count 2 2006.229.02:16:50.50#ibcon#about to read 4, iclass 3, count 2 2006.229.02:16:50.50#ibcon#read 4, iclass 3, count 2 2006.229.02:16:50.50#ibcon#about to read 5, iclass 3, count 2 2006.229.02:16:50.50#ibcon#read 5, iclass 3, count 2 2006.229.02:16:50.50#ibcon#about to read 6, iclass 3, count 2 2006.229.02:16:50.50#ibcon#read 6, iclass 3, count 2 2006.229.02:16:50.50#ibcon#end of sib2, iclass 3, count 2 2006.229.02:16:50.50#ibcon#*mode == 0, iclass 3, count 2 2006.229.02:16:50.50#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.02:16:50.50#ibcon#[27=AT02-04\r\n] 2006.229.02:16:50.50#ibcon#*before write, iclass 3, count 2 2006.229.02:16:50.50#ibcon#enter sib2, iclass 3, count 2 2006.229.02:16:50.50#ibcon#flushed, iclass 3, count 2 2006.229.02:16:50.50#ibcon#about to write, iclass 3, count 2 2006.229.02:16:50.50#ibcon#wrote, iclass 3, count 2 2006.229.02:16:50.50#ibcon#about to read 3, iclass 3, count 2 2006.229.02:16:50.53#ibcon#read 3, iclass 3, count 2 2006.229.02:16:50.53#ibcon#about to read 4, iclass 3, count 2 2006.229.02:16:50.53#ibcon#read 4, iclass 3, count 2 2006.229.02:16:50.53#ibcon#about to read 5, iclass 3, count 2 2006.229.02:16:50.53#ibcon#read 5, iclass 3, count 2 2006.229.02:16:50.53#ibcon#about to read 6, iclass 3, count 2 2006.229.02:16:50.53#ibcon#read 6, iclass 3, count 2 2006.229.02:16:50.53#ibcon#end of sib2, iclass 3, count 2 2006.229.02:16:50.53#ibcon#*after write, iclass 3, count 2 2006.229.02:16:50.53#ibcon#*before return 0, iclass 3, count 2 2006.229.02:16:50.53#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:50.53#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:16:50.53#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.02:16:50.53#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:50.53#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:50.65#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:50.65#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:50.65#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:16:50.65#ibcon#first serial, iclass 3, count 0 2006.229.02:16:50.65#ibcon#enter sib2, iclass 3, count 0 2006.229.02:16:50.65#ibcon#flushed, iclass 3, count 0 2006.229.02:16:50.65#ibcon#about to write, iclass 3, count 0 2006.229.02:16:50.65#ibcon#wrote, iclass 3, count 0 2006.229.02:16:50.65#ibcon#about to read 3, iclass 3, count 0 2006.229.02:16:50.67#ibcon#read 3, iclass 3, count 0 2006.229.02:16:50.67#ibcon#about to read 4, iclass 3, count 0 2006.229.02:16:50.67#ibcon#read 4, iclass 3, count 0 2006.229.02:16:50.67#ibcon#about to read 5, iclass 3, count 0 2006.229.02:16:50.67#ibcon#read 5, iclass 3, count 0 2006.229.02:16:50.67#ibcon#about to read 6, iclass 3, count 0 2006.229.02:16:50.67#ibcon#read 6, iclass 3, count 0 2006.229.02:16:50.67#ibcon#end of sib2, iclass 3, count 0 2006.229.02:16:50.67#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:16:50.67#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:16:50.67#ibcon#[27=USB\r\n] 2006.229.02:16:50.67#ibcon#*before write, iclass 3, count 0 2006.229.02:16:50.67#ibcon#enter sib2, iclass 3, count 0 2006.229.02:16:50.67#ibcon#flushed, iclass 3, count 0 2006.229.02:16:50.67#ibcon#about to write, iclass 3, count 0 2006.229.02:16:50.67#ibcon#wrote, iclass 3, count 0 2006.229.02:16:50.67#ibcon#about to read 3, iclass 3, count 0 2006.229.02:16:50.70#ibcon#read 3, iclass 3, count 0 2006.229.02:16:50.70#ibcon#about to read 4, iclass 3, count 0 2006.229.02:16:50.70#ibcon#read 4, iclass 3, count 0 2006.229.02:16:50.70#ibcon#about to read 5, iclass 3, count 0 2006.229.02:16:50.70#ibcon#read 5, iclass 3, count 0 2006.229.02:16:50.70#ibcon#about to read 6, iclass 3, count 0 2006.229.02:16:50.70#ibcon#read 6, iclass 3, count 0 2006.229.02:16:50.70#ibcon#end of sib2, iclass 3, count 0 2006.229.02:16:50.70#ibcon#*after write, iclass 3, count 0 2006.229.02:16:50.70#ibcon#*before return 0, iclass 3, count 0 2006.229.02:16:50.70#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:50.70#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:16:50.70#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:16:50.70#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:16:50.70$vck44/vblo=3,649.99 2006.229.02:16:50.70#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.02:16:50.70#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.02:16:50.70#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:50.70#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:50.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:50.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:50.70#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:16:50.70#ibcon#first serial, iclass 5, count 0 2006.229.02:16:50.70#ibcon#enter sib2, iclass 5, count 0 2006.229.02:16:50.70#ibcon#flushed, iclass 5, count 0 2006.229.02:16:50.70#ibcon#about to write, iclass 5, count 0 2006.229.02:16:50.70#ibcon#wrote, iclass 5, count 0 2006.229.02:16:50.70#ibcon#about to read 3, iclass 5, count 0 2006.229.02:16:50.72#ibcon#read 3, iclass 5, count 0 2006.229.02:16:50.72#ibcon#about to read 4, iclass 5, count 0 2006.229.02:16:50.72#ibcon#read 4, iclass 5, count 0 2006.229.02:16:50.72#ibcon#about to read 5, iclass 5, count 0 2006.229.02:16:50.72#ibcon#read 5, iclass 5, count 0 2006.229.02:16:50.72#ibcon#about to read 6, iclass 5, count 0 2006.229.02:16:50.72#ibcon#read 6, iclass 5, count 0 2006.229.02:16:50.72#ibcon#end of sib2, iclass 5, count 0 2006.229.02:16:50.72#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:16:50.72#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:16:50.72#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:16:50.72#ibcon#*before write, iclass 5, count 0 2006.229.02:16:50.72#ibcon#enter sib2, iclass 5, count 0 2006.229.02:16:50.72#ibcon#flushed, iclass 5, count 0 2006.229.02:16:50.72#ibcon#about to write, iclass 5, count 0 2006.229.02:16:50.72#ibcon#wrote, iclass 5, count 0 2006.229.02:16:50.72#ibcon#about to read 3, iclass 5, count 0 2006.229.02:16:50.76#ibcon#read 3, iclass 5, count 0 2006.229.02:16:50.76#ibcon#about to read 4, iclass 5, count 0 2006.229.02:16:50.76#ibcon#read 4, iclass 5, count 0 2006.229.02:16:50.76#ibcon#about to read 5, iclass 5, count 0 2006.229.02:16:50.76#ibcon#read 5, iclass 5, count 0 2006.229.02:16:50.76#ibcon#about to read 6, iclass 5, count 0 2006.229.02:16:50.76#ibcon#read 6, iclass 5, count 0 2006.229.02:16:50.76#ibcon#end of sib2, iclass 5, count 0 2006.229.02:16:50.76#ibcon#*after write, iclass 5, count 0 2006.229.02:16:50.76#ibcon#*before return 0, iclass 5, count 0 2006.229.02:16:50.76#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:50.76#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:16:50.76#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:16:50.76#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:16:50.76$vck44/vb=3,4 2006.229.02:16:50.76#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.02:16:50.76#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.02:16:50.76#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:50.76#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:50.82#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:50.82#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:50.82#ibcon#enter wrdev, iclass 7, count 2 2006.229.02:16:50.82#ibcon#first serial, iclass 7, count 2 2006.229.02:16:50.82#ibcon#enter sib2, iclass 7, count 2 2006.229.02:16:50.82#ibcon#flushed, iclass 7, count 2 2006.229.02:16:50.82#ibcon#about to write, iclass 7, count 2 2006.229.02:16:50.82#ibcon#wrote, iclass 7, count 2 2006.229.02:16:50.82#ibcon#about to read 3, iclass 7, count 2 2006.229.02:16:50.84#ibcon#read 3, iclass 7, count 2 2006.229.02:16:50.84#ibcon#about to read 4, iclass 7, count 2 2006.229.02:16:50.84#ibcon#read 4, iclass 7, count 2 2006.229.02:16:50.84#ibcon#about to read 5, iclass 7, count 2 2006.229.02:16:50.84#ibcon#read 5, iclass 7, count 2 2006.229.02:16:50.84#ibcon#about to read 6, iclass 7, count 2 2006.229.02:16:50.84#ibcon#read 6, iclass 7, count 2 2006.229.02:16:50.84#ibcon#end of sib2, iclass 7, count 2 2006.229.02:16:50.84#ibcon#*mode == 0, iclass 7, count 2 2006.229.02:16:50.84#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.02:16:50.84#ibcon#[27=AT03-04\r\n] 2006.229.02:16:50.84#ibcon#*before write, iclass 7, count 2 2006.229.02:16:50.84#ibcon#enter sib2, iclass 7, count 2 2006.229.02:16:50.84#ibcon#flushed, iclass 7, count 2 2006.229.02:16:50.84#ibcon#about to write, iclass 7, count 2 2006.229.02:16:50.84#ibcon#wrote, iclass 7, count 2 2006.229.02:16:50.84#ibcon#about to read 3, iclass 7, count 2 2006.229.02:16:50.87#ibcon#read 3, iclass 7, count 2 2006.229.02:16:50.87#ibcon#about to read 4, iclass 7, count 2 2006.229.02:16:50.87#ibcon#read 4, iclass 7, count 2 2006.229.02:16:50.87#ibcon#about to read 5, iclass 7, count 2 2006.229.02:16:50.87#ibcon#read 5, iclass 7, count 2 2006.229.02:16:50.87#ibcon#about to read 6, iclass 7, count 2 2006.229.02:16:50.87#ibcon#read 6, iclass 7, count 2 2006.229.02:16:50.87#ibcon#end of sib2, iclass 7, count 2 2006.229.02:16:50.87#ibcon#*after write, iclass 7, count 2 2006.229.02:16:50.87#ibcon#*before return 0, iclass 7, count 2 2006.229.02:16:50.87#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:50.87#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:16:50.87#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.02:16:50.87#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:50.87#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:50.99#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:50.99#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:50.99#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:16:50.99#ibcon#first serial, iclass 7, count 0 2006.229.02:16:50.99#ibcon#enter sib2, iclass 7, count 0 2006.229.02:16:50.99#ibcon#flushed, iclass 7, count 0 2006.229.02:16:50.99#ibcon#about to write, iclass 7, count 0 2006.229.02:16:50.99#ibcon#wrote, iclass 7, count 0 2006.229.02:16:50.99#ibcon#about to read 3, iclass 7, count 0 2006.229.02:16:51.01#ibcon#read 3, iclass 7, count 0 2006.229.02:16:51.01#ibcon#about to read 4, iclass 7, count 0 2006.229.02:16:51.01#ibcon#read 4, iclass 7, count 0 2006.229.02:16:51.01#ibcon#about to read 5, iclass 7, count 0 2006.229.02:16:51.01#ibcon#read 5, iclass 7, count 0 2006.229.02:16:51.01#ibcon#about to read 6, iclass 7, count 0 2006.229.02:16:51.01#ibcon#read 6, iclass 7, count 0 2006.229.02:16:51.01#ibcon#end of sib2, iclass 7, count 0 2006.229.02:16:51.01#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:16:51.01#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:16:51.01#ibcon#[27=USB\r\n] 2006.229.02:16:51.01#ibcon#*before write, iclass 7, count 0 2006.229.02:16:51.01#ibcon#enter sib2, iclass 7, count 0 2006.229.02:16:51.01#ibcon#flushed, iclass 7, count 0 2006.229.02:16:51.01#ibcon#about to write, iclass 7, count 0 2006.229.02:16:51.01#ibcon#wrote, iclass 7, count 0 2006.229.02:16:51.01#ibcon#about to read 3, iclass 7, count 0 2006.229.02:16:51.04#ibcon#read 3, iclass 7, count 0 2006.229.02:16:51.04#ibcon#about to read 4, iclass 7, count 0 2006.229.02:16:51.04#ibcon#read 4, iclass 7, count 0 2006.229.02:16:51.04#ibcon#about to read 5, iclass 7, count 0 2006.229.02:16:51.04#ibcon#read 5, iclass 7, count 0 2006.229.02:16:51.04#ibcon#about to read 6, iclass 7, count 0 2006.229.02:16:51.04#ibcon#read 6, iclass 7, count 0 2006.229.02:16:51.04#ibcon#end of sib2, iclass 7, count 0 2006.229.02:16:51.04#ibcon#*after write, iclass 7, count 0 2006.229.02:16:51.04#ibcon#*before return 0, iclass 7, count 0 2006.229.02:16:51.04#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:51.04#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:16:51.04#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:16:51.04#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:16:51.04$vck44/vblo=4,679.99 2006.229.02:16:51.04#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:16:51.04#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:16:51.04#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:51.04#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:51.04#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:51.04#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:51.04#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:16:51.04#ibcon#first serial, iclass 11, count 0 2006.229.02:16:51.04#ibcon#enter sib2, iclass 11, count 0 2006.229.02:16:51.04#ibcon#flushed, iclass 11, count 0 2006.229.02:16:51.04#ibcon#about to write, iclass 11, count 0 2006.229.02:16:51.04#ibcon#wrote, iclass 11, count 0 2006.229.02:16:51.04#ibcon#about to read 3, iclass 11, count 0 2006.229.02:16:51.06#ibcon#read 3, iclass 11, count 0 2006.229.02:16:51.06#ibcon#about to read 4, iclass 11, count 0 2006.229.02:16:51.06#ibcon#read 4, iclass 11, count 0 2006.229.02:16:51.06#ibcon#about to read 5, iclass 11, count 0 2006.229.02:16:51.06#ibcon#read 5, iclass 11, count 0 2006.229.02:16:51.06#ibcon#about to read 6, iclass 11, count 0 2006.229.02:16:51.06#ibcon#read 6, iclass 11, count 0 2006.229.02:16:51.06#ibcon#end of sib2, iclass 11, count 0 2006.229.02:16:51.06#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:16:51.06#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:16:51.06#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:16:51.06#ibcon#*before write, iclass 11, count 0 2006.229.02:16:51.06#ibcon#enter sib2, iclass 11, count 0 2006.229.02:16:51.06#ibcon#flushed, iclass 11, count 0 2006.229.02:16:51.06#ibcon#about to write, iclass 11, count 0 2006.229.02:16:51.06#ibcon#wrote, iclass 11, count 0 2006.229.02:16:51.06#ibcon#about to read 3, iclass 11, count 0 2006.229.02:16:51.10#ibcon#read 3, iclass 11, count 0 2006.229.02:16:51.10#ibcon#about to read 4, iclass 11, count 0 2006.229.02:16:51.10#ibcon#read 4, iclass 11, count 0 2006.229.02:16:51.10#ibcon#about to read 5, iclass 11, count 0 2006.229.02:16:51.10#ibcon#read 5, iclass 11, count 0 2006.229.02:16:51.10#ibcon#about to read 6, iclass 11, count 0 2006.229.02:16:51.10#ibcon#read 6, iclass 11, count 0 2006.229.02:16:51.10#ibcon#end of sib2, iclass 11, count 0 2006.229.02:16:51.10#ibcon#*after write, iclass 11, count 0 2006.229.02:16:51.10#ibcon#*before return 0, iclass 11, count 0 2006.229.02:16:51.10#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:51.10#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:16:51.10#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:16:51.10#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:16:51.10$vck44/vb=4,4 2006.229.02:16:51.10#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.02:16:51.10#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.02:16:51.10#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:51.10#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:51.16#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:51.16#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:51.16#ibcon#enter wrdev, iclass 13, count 2 2006.229.02:16:51.16#ibcon#first serial, iclass 13, count 2 2006.229.02:16:51.16#ibcon#enter sib2, iclass 13, count 2 2006.229.02:16:51.16#ibcon#flushed, iclass 13, count 2 2006.229.02:16:51.16#ibcon#about to write, iclass 13, count 2 2006.229.02:16:51.16#ibcon#wrote, iclass 13, count 2 2006.229.02:16:51.16#ibcon#about to read 3, iclass 13, count 2 2006.229.02:16:51.18#ibcon#read 3, iclass 13, count 2 2006.229.02:16:51.18#ibcon#about to read 4, iclass 13, count 2 2006.229.02:16:51.18#ibcon#read 4, iclass 13, count 2 2006.229.02:16:51.18#ibcon#about to read 5, iclass 13, count 2 2006.229.02:16:51.18#ibcon#read 5, iclass 13, count 2 2006.229.02:16:51.18#ibcon#about to read 6, iclass 13, count 2 2006.229.02:16:51.18#ibcon#read 6, iclass 13, count 2 2006.229.02:16:51.18#ibcon#end of sib2, iclass 13, count 2 2006.229.02:16:51.18#ibcon#*mode == 0, iclass 13, count 2 2006.229.02:16:51.18#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.02:16:51.18#ibcon#[27=AT04-04\r\n] 2006.229.02:16:51.18#ibcon#*before write, iclass 13, count 2 2006.229.02:16:51.18#ibcon#enter sib2, iclass 13, count 2 2006.229.02:16:51.18#ibcon#flushed, iclass 13, count 2 2006.229.02:16:51.18#ibcon#about to write, iclass 13, count 2 2006.229.02:16:51.18#ibcon#wrote, iclass 13, count 2 2006.229.02:16:51.18#ibcon#about to read 3, iclass 13, count 2 2006.229.02:16:51.21#ibcon#read 3, iclass 13, count 2 2006.229.02:16:51.21#ibcon#about to read 4, iclass 13, count 2 2006.229.02:16:51.21#ibcon#read 4, iclass 13, count 2 2006.229.02:16:51.21#ibcon#about to read 5, iclass 13, count 2 2006.229.02:16:51.21#ibcon#read 5, iclass 13, count 2 2006.229.02:16:51.21#ibcon#about to read 6, iclass 13, count 2 2006.229.02:16:51.21#ibcon#read 6, iclass 13, count 2 2006.229.02:16:51.21#ibcon#end of sib2, iclass 13, count 2 2006.229.02:16:51.21#ibcon#*after write, iclass 13, count 2 2006.229.02:16:51.21#ibcon#*before return 0, iclass 13, count 2 2006.229.02:16:51.21#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:51.21#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:16:51.21#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.02:16:51.21#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:51.21#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:51.33#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:51.33#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:51.33#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:16:51.33#ibcon#first serial, iclass 13, count 0 2006.229.02:16:51.33#ibcon#enter sib2, iclass 13, count 0 2006.229.02:16:51.33#ibcon#flushed, iclass 13, count 0 2006.229.02:16:51.33#ibcon#about to write, iclass 13, count 0 2006.229.02:16:51.33#ibcon#wrote, iclass 13, count 0 2006.229.02:16:51.33#ibcon#about to read 3, iclass 13, count 0 2006.229.02:16:51.35#ibcon#read 3, iclass 13, count 0 2006.229.02:16:51.35#ibcon#about to read 4, iclass 13, count 0 2006.229.02:16:51.35#ibcon#read 4, iclass 13, count 0 2006.229.02:16:51.35#ibcon#about to read 5, iclass 13, count 0 2006.229.02:16:51.35#ibcon#read 5, iclass 13, count 0 2006.229.02:16:51.35#ibcon#about to read 6, iclass 13, count 0 2006.229.02:16:51.35#ibcon#read 6, iclass 13, count 0 2006.229.02:16:51.35#ibcon#end of sib2, iclass 13, count 0 2006.229.02:16:51.35#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:16:51.35#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:16:51.35#ibcon#[27=USB\r\n] 2006.229.02:16:51.35#ibcon#*before write, iclass 13, count 0 2006.229.02:16:51.35#ibcon#enter sib2, iclass 13, count 0 2006.229.02:16:51.35#ibcon#flushed, iclass 13, count 0 2006.229.02:16:51.35#ibcon#about to write, iclass 13, count 0 2006.229.02:16:51.35#ibcon#wrote, iclass 13, count 0 2006.229.02:16:51.35#ibcon#about to read 3, iclass 13, count 0 2006.229.02:16:51.38#ibcon#read 3, iclass 13, count 0 2006.229.02:16:51.38#ibcon#about to read 4, iclass 13, count 0 2006.229.02:16:51.38#ibcon#read 4, iclass 13, count 0 2006.229.02:16:51.38#ibcon#about to read 5, iclass 13, count 0 2006.229.02:16:51.38#ibcon#read 5, iclass 13, count 0 2006.229.02:16:51.38#ibcon#about to read 6, iclass 13, count 0 2006.229.02:16:51.38#ibcon#read 6, iclass 13, count 0 2006.229.02:16:51.38#ibcon#end of sib2, iclass 13, count 0 2006.229.02:16:51.38#ibcon#*after write, iclass 13, count 0 2006.229.02:16:51.38#ibcon#*before return 0, iclass 13, count 0 2006.229.02:16:51.38#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:51.38#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:16:51.38#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:16:51.38#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:16:51.38$vck44/vblo=5,709.99 2006.229.02:16:51.38#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.02:16:51.38#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.02:16:51.38#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:51.38#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:51.38#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:51.38#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:51.38#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:16:51.38#ibcon#first serial, iclass 15, count 0 2006.229.02:16:51.38#ibcon#enter sib2, iclass 15, count 0 2006.229.02:16:51.38#ibcon#flushed, iclass 15, count 0 2006.229.02:16:51.38#ibcon#about to write, iclass 15, count 0 2006.229.02:16:51.38#ibcon#wrote, iclass 15, count 0 2006.229.02:16:51.38#ibcon#about to read 3, iclass 15, count 0 2006.229.02:16:51.40#ibcon#read 3, iclass 15, count 0 2006.229.02:16:51.40#ibcon#about to read 4, iclass 15, count 0 2006.229.02:16:51.40#ibcon#read 4, iclass 15, count 0 2006.229.02:16:51.40#ibcon#about to read 5, iclass 15, count 0 2006.229.02:16:51.40#ibcon#read 5, iclass 15, count 0 2006.229.02:16:51.40#ibcon#about to read 6, iclass 15, count 0 2006.229.02:16:51.40#ibcon#read 6, iclass 15, count 0 2006.229.02:16:51.40#ibcon#end of sib2, iclass 15, count 0 2006.229.02:16:51.40#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:16:51.40#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:16:51.40#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:16:51.40#ibcon#*before write, iclass 15, count 0 2006.229.02:16:51.40#ibcon#enter sib2, iclass 15, count 0 2006.229.02:16:51.40#ibcon#flushed, iclass 15, count 0 2006.229.02:16:51.40#ibcon#about to write, iclass 15, count 0 2006.229.02:16:51.40#ibcon#wrote, iclass 15, count 0 2006.229.02:16:51.40#ibcon#about to read 3, iclass 15, count 0 2006.229.02:16:51.44#ibcon#read 3, iclass 15, count 0 2006.229.02:16:51.44#ibcon#about to read 4, iclass 15, count 0 2006.229.02:16:51.44#ibcon#read 4, iclass 15, count 0 2006.229.02:16:51.44#ibcon#about to read 5, iclass 15, count 0 2006.229.02:16:51.44#ibcon#read 5, iclass 15, count 0 2006.229.02:16:51.44#ibcon#about to read 6, iclass 15, count 0 2006.229.02:16:51.44#ibcon#read 6, iclass 15, count 0 2006.229.02:16:51.44#ibcon#end of sib2, iclass 15, count 0 2006.229.02:16:51.44#ibcon#*after write, iclass 15, count 0 2006.229.02:16:51.44#ibcon#*before return 0, iclass 15, count 0 2006.229.02:16:51.44#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:51.44#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:16:51.44#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:16:51.44#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:16:51.44$vck44/vb=5,4 2006.229.02:16:51.44#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.02:16:51.44#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.02:16:51.44#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:51.44#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:51.50#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:51.50#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:51.50#ibcon#enter wrdev, iclass 17, count 2 2006.229.02:16:51.50#ibcon#first serial, iclass 17, count 2 2006.229.02:16:51.50#ibcon#enter sib2, iclass 17, count 2 2006.229.02:16:51.50#ibcon#flushed, iclass 17, count 2 2006.229.02:16:51.50#ibcon#about to write, iclass 17, count 2 2006.229.02:16:51.50#ibcon#wrote, iclass 17, count 2 2006.229.02:16:51.50#ibcon#about to read 3, iclass 17, count 2 2006.229.02:16:51.52#ibcon#read 3, iclass 17, count 2 2006.229.02:16:51.52#ibcon#about to read 4, iclass 17, count 2 2006.229.02:16:51.52#ibcon#read 4, iclass 17, count 2 2006.229.02:16:51.52#ibcon#about to read 5, iclass 17, count 2 2006.229.02:16:51.52#ibcon#read 5, iclass 17, count 2 2006.229.02:16:51.52#ibcon#about to read 6, iclass 17, count 2 2006.229.02:16:51.52#ibcon#read 6, iclass 17, count 2 2006.229.02:16:51.52#ibcon#end of sib2, iclass 17, count 2 2006.229.02:16:51.52#ibcon#*mode == 0, iclass 17, count 2 2006.229.02:16:51.52#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.02:16:51.52#ibcon#[27=AT05-04\r\n] 2006.229.02:16:51.52#ibcon#*before write, iclass 17, count 2 2006.229.02:16:51.52#ibcon#enter sib2, iclass 17, count 2 2006.229.02:16:51.52#ibcon#flushed, iclass 17, count 2 2006.229.02:16:51.52#ibcon#about to write, iclass 17, count 2 2006.229.02:16:51.52#ibcon#wrote, iclass 17, count 2 2006.229.02:16:51.52#ibcon#about to read 3, iclass 17, count 2 2006.229.02:16:51.55#ibcon#read 3, iclass 17, count 2 2006.229.02:16:51.55#ibcon#about to read 4, iclass 17, count 2 2006.229.02:16:51.55#ibcon#read 4, iclass 17, count 2 2006.229.02:16:51.55#ibcon#about to read 5, iclass 17, count 2 2006.229.02:16:51.55#ibcon#read 5, iclass 17, count 2 2006.229.02:16:51.55#ibcon#about to read 6, iclass 17, count 2 2006.229.02:16:51.55#ibcon#read 6, iclass 17, count 2 2006.229.02:16:51.55#ibcon#end of sib2, iclass 17, count 2 2006.229.02:16:51.55#ibcon#*after write, iclass 17, count 2 2006.229.02:16:51.55#ibcon#*before return 0, iclass 17, count 2 2006.229.02:16:51.55#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:51.55#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:16:51.55#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.02:16:51.55#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:51.55#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:51.67#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:51.67#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:51.67#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:16:51.67#ibcon#first serial, iclass 17, count 0 2006.229.02:16:51.67#ibcon#enter sib2, iclass 17, count 0 2006.229.02:16:51.67#ibcon#flushed, iclass 17, count 0 2006.229.02:16:51.67#ibcon#about to write, iclass 17, count 0 2006.229.02:16:51.67#ibcon#wrote, iclass 17, count 0 2006.229.02:16:51.67#ibcon#about to read 3, iclass 17, count 0 2006.229.02:16:51.69#ibcon#read 3, iclass 17, count 0 2006.229.02:16:51.69#ibcon#about to read 4, iclass 17, count 0 2006.229.02:16:51.69#ibcon#read 4, iclass 17, count 0 2006.229.02:16:51.69#ibcon#about to read 5, iclass 17, count 0 2006.229.02:16:51.69#ibcon#read 5, iclass 17, count 0 2006.229.02:16:51.69#ibcon#about to read 6, iclass 17, count 0 2006.229.02:16:51.69#ibcon#read 6, iclass 17, count 0 2006.229.02:16:51.69#ibcon#end of sib2, iclass 17, count 0 2006.229.02:16:51.69#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:16:51.69#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:16:51.69#ibcon#[27=USB\r\n] 2006.229.02:16:51.69#ibcon#*before write, iclass 17, count 0 2006.229.02:16:51.69#ibcon#enter sib2, iclass 17, count 0 2006.229.02:16:51.69#ibcon#flushed, iclass 17, count 0 2006.229.02:16:51.69#ibcon#about to write, iclass 17, count 0 2006.229.02:16:51.69#ibcon#wrote, iclass 17, count 0 2006.229.02:16:51.69#ibcon#about to read 3, iclass 17, count 0 2006.229.02:16:51.72#ibcon#read 3, iclass 17, count 0 2006.229.02:16:51.72#ibcon#about to read 4, iclass 17, count 0 2006.229.02:16:51.72#ibcon#read 4, iclass 17, count 0 2006.229.02:16:51.72#ibcon#about to read 5, iclass 17, count 0 2006.229.02:16:51.72#ibcon#read 5, iclass 17, count 0 2006.229.02:16:51.72#ibcon#about to read 6, iclass 17, count 0 2006.229.02:16:51.72#ibcon#read 6, iclass 17, count 0 2006.229.02:16:51.72#ibcon#end of sib2, iclass 17, count 0 2006.229.02:16:51.72#ibcon#*after write, iclass 17, count 0 2006.229.02:16:51.72#ibcon#*before return 0, iclass 17, count 0 2006.229.02:16:51.72#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:51.72#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:16:51.72#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:16:51.72#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:16:51.72$vck44/vblo=6,719.99 2006.229.02:16:51.72#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.02:16:51.72#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.02:16:51.72#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:51.72#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:51.72#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:51.72#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:51.72#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:16:51.72#ibcon#first serial, iclass 19, count 0 2006.229.02:16:51.72#ibcon#enter sib2, iclass 19, count 0 2006.229.02:16:51.72#ibcon#flushed, iclass 19, count 0 2006.229.02:16:51.72#ibcon#about to write, iclass 19, count 0 2006.229.02:16:51.72#ibcon#wrote, iclass 19, count 0 2006.229.02:16:51.72#ibcon#about to read 3, iclass 19, count 0 2006.229.02:16:51.74#ibcon#read 3, iclass 19, count 0 2006.229.02:16:51.74#ibcon#about to read 4, iclass 19, count 0 2006.229.02:16:51.74#ibcon#read 4, iclass 19, count 0 2006.229.02:16:51.74#ibcon#about to read 5, iclass 19, count 0 2006.229.02:16:51.74#ibcon#read 5, iclass 19, count 0 2006.229.02:16:51.74#ibcon#about to read 6, iclass 19, count 0 2006.229.02:16:51.74#ibcon#read 6, iclass 19, count 0 2006.229.02:16:51.74#ibcon#end of sib2, iclass 19, count 0 2006.229.02:16:51.74#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:16:51.74#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:16:51.74#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:16:51.74#ibcon#*before write, iclass 19, count 0 2006.229.02:16:51.74#ibcon#enter sib2, iclass 19, count 0 2006.229.02:16:51.74#ibcon#flushed, iclass 19, count 0 2006.229.02:16:51.74#ibcon#about to write, iclass 19, count 0 2006.229.02:16:51.74#ibcon#wrote, iclass 19, count 0 2006.229.02:16:51.74#ibcon#about to read 3, iclass 19, count 0 2006.229.02:16:51.78#ibcon#read 3, iclass 19, count 0 2006.229.02:16:51.78#ibcon#about to read 4, iclass 19, count 0 2006.229.02:16:51.78#ibcon#read 4, iclass 19, count 0 2006.229.02:16:51.78#ibcon#about to read 5, iclass 19, count 0 2006.229.02:16:51.78#ibcon#read 5, iclass 19, count 0 2006.229.02:16:51.78#ibcon#about to read 6, iclass 19, count 0 2006.229.02:16:51.78#ibcon#read 6, iclass 19, count 0 2006.229.02:16:51.78#ibcon#end of sib2, iclass 19, count 0 2006.229.02:16:51.78#ibcon#*after write, iclass 19, count 0 2006.229.02:16:51.78#ibcon#*before return 0, iclass 19, count 0 2006.229.02:16:51.78#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:51.78#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:16:51.78#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:16:51.78#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:16:51.78$vck44/vb=6,4 2006.229.02:16:51.78#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.02:16:51.78#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.02:16:51.78#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:51.78#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:51.84#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:51.84#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:51.84#ibcon#enter wrdev, iclass 21, count 2 2006.229.02:16:51.84#ibcon#first serial, iclass 21, count 2 2006.229.02:16:51.84#ibcon#enter sib2, iclass 21, count 2 2006.229.02:16:51.84#ibcon#flushed, iclass 21, count 2 2006.229.02:16:51.84#ibcon#about to write, iclass 21, count 2 2006.229.02:16:51.84#ibcon#wrote, iclass 21, count 2 2006.229.02:16:51.84#ibcon#about to read 3, iclass 21, count 2 2006.229.02:16:51.86#ibcon#read 3, iclass 21, count 2 2006.229.02:16:51.86#ibcon#about to read 4, iclass 21, count 2 2006.229.02:16:51.86#ibcon#read 4, iclass 21, count 2 2006.229.02:16:51.86#ibcon#about to read 5, iclass 21, count 2 2006.229.02:16:51.86#ibcon#read 5, iclass 21, count 2 2006.229.02:16:51.86#ibcon#about to read 6, iclass 21, count 2 2006.229.02:16:51.86#ibcon#read 6, iclass 21, count 2 2006.229.02:16:51.86#ibcon#end of sib2, iclass 21, count 2 2006.229.02:16:51.86#ibcon#*mode == 0, iclass 21, count 2 2006.229.02:16:51.86#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.02:16:51.86#ibcon#[27=AT06-04\r\n] 2006.229.02:16:51.86#ibcon#*before write, iclass 21, count 2 2006.229.02:16:51.86#ibcon#enter sib2, iclass 21, count 2 2006.229.02:16:51.86#ibcon#flushed, iclass 21, count 2 2006.229.02:16:51.86#ibcon#about to write, iclass 21, count 2 2006.229.02:16:51.86#ibcon#wrote, iclass 21, count 2 2006.229.02:16:51.86#ibcon#about to read 3, iclass 21, count 2 2006.229.02:16:51.89#ibcon#read 3, iclass 21, count 2 2006.229.02:16:51.89#ibcon#about to read 4, iclass 21, count 2 2006.229.02:16:51.89#ibcon#read 4, iclass 21, count 2 2006.229.02:16:51.89#ibcon#about to read 5, iclass 21, count 2 2006.229.02:16:51.89#ibcon#read 5, iclass 21, count 2 2006.229.02:16:51.89#ibcon#about to read 6, iclass 21, count 2 2006.229.02:16:51.89#ibcon#read 6, iclass 21, count 2 2006.229.02:16:51.89#ibcon#end of sib2, iclass 21, count 2 2006.229.02:16:51.89#ibcon#*after write, iclass 21, count 2 2006.229.02:16:51.89#ibcon#*before return 0, iclass 21, count 2 2006.229.02:16:51.89#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:51.89#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:16:51.89#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.02:16:51.89#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:51.89#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:52.01#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:52.01#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:52.01#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:16:52.01#ibcon#first serial, iclass 21, count 0 2006.229.02:16:52.01#ibcon#enter sib2, iclass 21, count 0 2006.229.02:16:52.01#ibcon#flushed, iclass 21, count 0 2006.229.02:16:52.01#ibcon#about to write, iclass 21, count 0 2006.229.02:16:52.01#ibcon#wrote, iclass 21, count 0 2006.229.02:16:52.01#ibcon#about to read 3, iclass 21, count 0 2006.229.02:16:52.03#ibcon#read 3, iclass 21, count 0 2006.229.02:16:52.03#ibcon#about to read 4, iclass 21, count 0 2006.229.02:16:52.03#ibcon#read 4, iclass 21, count 0 2006.229.02:16:52.03#ibcon#about to read 5, iclass 21, count 0 2006.229.02:16:52.03#ibcon#read 5, iclass 21, count 0 2006.229.02:16:52.03#ibcon#about to read 6, iclass 21, count 0 2006.229.02:16:52.03#ibcon#read 6, iclass 21, count 0 2006.229.02:16:52.03#ibcon#end of sib2, iclass 21, count 0 2006.229.02:16:52.03#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:16:52.03#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:16:52.03#ibcon#[27=USB\r\n] 2006.229.02:16:52.03#ibcon#*before write, iclass 21, count 0 2006.229.02:16:52.03#ibcon#enter sib2, iclass 21, count 0 2006.229.02:16:52.03#ibcon#flushed, iclass 21, count 0 2006.229.02:16:52.03#ibcon#about to write, iclass 21, count 0 2006.229.02:16:52.03#ibcon#wrote, iclass 21, count 0 2006.229.02:16:52.03#ibcon#about to read 3, iclass 21, count 0 2006.229.02:16:52.06#ibcon#read 3, iclass 21, count 0 2006.229.02:16:52.06#ibcon#about to read 4, iclass 21, count 0 2006.229.02:16:52.06#ibcon#read 4, iclass 21, count 0 2006.229.02:16:52.06#ibcon#about to read 5, iclass 21, count 0 2006.229.02:16:52.06#ibcon#read 5, iclass 21, count 0 2006.229.02:16:52.06#ibcon#about to read 6, iclass 21, count 0 2006.229.02:16:52.06#ibcon#read 6, iclass 21, count 0 2006.229.02:16:52.06#ibcon#end of sib2, iclass 21, count 0 2006.229.02:16:52.06#ibcon#*after write, iclass 21, count 0 2006.229.02:16:52.06#ibcon#*before return 0, iclass 21, count 0 2006.229.02:16:52.06#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:52.06#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:16:52.06#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:16:52.06#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:16:52.06$vck44/vblo=7,734.99 2006.229.02:16:52.06#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.02:16:52.06#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.02:16:52.06#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:52.06#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:52.06#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:52.06#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:52.06#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:16:52.06#ibcon#first serial, iclass 23, count 0 2006.229.02:16:52.06#ibcon#enter sib2, iclass 23, count 0 2006.229.02:16:52.06#ibcon#flushed, iclass 23, count 0 2006.229.02:16:52.06#ibcon#about to write, iclass 23, count 0 2006.229.02:16:52.06#ibcon#wrote, iclass 23, count 0 2006.229.02:16:52.06#ibcon#about to read 3, iclass 23, count 0 2006.229.02:16:52.08#ibcon#read 3, iclass 23, count 0 2006.229.02:16:52.08#ibcon#about to read 4, iclass 23, count 0 2006.229.02:16:52.08#ibcon#read 4, iclass 23, count 0 2006.229.02:16:52.08#ibcon#about to read 5, iclass 23, count 0 2006.229.02:16:52.08#ibcon#read 5, iclass 23, count 0 2006.229.02:16:52.08#ibcon#about to read 6, iclass 23, count 0 2006.229.02:16:52.08#ibcon#read 6, iclass 23, count 0 2006.229.02:16:52.08#ibcon#end of sib2, iclass 23, count 0 2006.229.02:16:52.08#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:16:52.08#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:16:52.08#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:16:52.08#ibcon#*before write, iclass 23, count 0 2006.229.02:16:52.08#ibcon#enter sib2, iclass 23, count 0 2006.229.02:16:52.08#ibcon#flushed, iclass 23, count 0 2006.229.02:16:52.08#ibcon#about to write, iclass 23, count 0 2006.229.02:16:52.08#ibcon#wrote, iclass 23, count 0 2006.229.02:16:52.08#ibcon#about to read 3, iclass 23, count 0 2006.229.02:16:52.12#ibcon#read 3, iclass 23, count 0 2006.229.02:16:52.12#ibcon#about to read 4, iclass 23, count 0 2006.229.02:16:52.12#ibcon#read 4, iclass 23, count 0 2006.229.02:16:52.12#ibcon#about to read 5, iclass 23, count 0 2006.229.02:16:52.12#ibcon#read 5, iclass 23, count 0 2006.229.02:16:52.12#ibcon#about to read 6, iclass 23, count 0 2006.229.02:16:52.12#ibcon#read 6, iclass 23, count 0 2006.229.02:16:52.12#ibcon#end of sib2, iclass 23, count 0 2006.229.02:16:52.12#ibcon#*after write, iclass 23, count 0 2006.229.02:16:52.12#ibcon#*before return 0, iclass 23, count 0 2006.229.02:16:52.12#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:52.12#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:16:52.12#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:16:52.12#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:16:52.12$vck44/vb=7,4 2006.229.02:16:52.12#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.02:16:52.12#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.02:16:52.12#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:52.12#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:52.18#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:52.18#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:52.18#ibcon#enter wrdev, iclass 25, count 2 2006.229.02:16:52.18#ibcon#first serial, iclass 25, count 2 2006.229.02:16:52.18#ibcon#enter sib2, iclass 25, count 2 2006.229.02:16:52.18#ibcon#flushed, iclass 25, count 2 2006.229.02:16:52.18#ibcon#about to write, iclass 25, count 2 2006.229.02:16:52.18#ibcon#wrote, iclass 25, count 2 2006.229.02:16:52.18#ibcon#about to read 3, iclass 25, count 2 2006.229.02:16:52.20#ibcon#read 3, iclass 25, count 2 2006.229.02:16:52.20#ibcon#about to read 4, iclass 25, count 2 2006.229.02:16:52.20#ibcon#read 4, iclass 25, count 2 2006.229.02:16:52.20#ibcon#about to read 5, iclass 25, count 2 2006.229.02:16:52.20#ibcon#read 5, iclass 25, count 2 2006.229.02:16:52.20#ibcon#about to read 6, iclass 25, count 2 2006.229.02:16:52.20#ibcon#read 6, iclass 25, count 2 2006.229.02:16:52.20#ibcon#end of sib2, iclass 25, count 2 2006.229.02:16:52.20#ibcon#*mode == 0, iclass 25, count 2 2006.229.02:16:52.20#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.02:16:52.20#ibcon#[27=AT07-04\r\n] 2006.229.02:16:52.20#ibcon#*before write, iclass 25, count 2 2006.229.02:16:52.20#ibcon#enter sib2, iclass 25, count 2 2006.229.02:16:52.20#ibcon#flushed, iclass 25, count 2 2006.229.02:16:52.20#ibcon#about to write, iclass 25, count 2 2006.229.02:16:52.20#ibcon#wrote, iclass 25, count 2 2006.229.02:16:52.20#ibcon#about to read 3, iclass 25, count 2 2006.229.02:16:52.23#ibcon#read 3, iclass 25, count 2 2006.229.02:16:52.23#ibcon#about to read 4, iclass 25, count 2 2006.229.02:16:52.23#ibcon#read 4, iclass 25, count 2 2006.229.02:16:52.23#ibcon#about to read 5, iclass 25, count 2 2006.229.02:16:52.23#ibcon#read 5, iclass 25, count 2 2006.229.02:16:52.23#ibcon#about to read 6, iclass 25, count 2 2006.229.02:16:52.23#ibcon#read 6, iclass 25, count 2 2006.229.02:16:52.23#ibcon#end of sib2, iclass 25, count 2 2006.229.02:16:52.23#ibcon#*after write, iclass 25, count 2 2006.229.02:16:52.23#ibcon#*before return 0, iclass 25, count 2 2006.229.02:16:52.23#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:52.23#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:16:52.23#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.02:16:52.23#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:52.23#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:52.35#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:52.35#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:52.35#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:16:52.35#ibcon#first serial, iclass 25, count 0 2006.229.02:16:52.35#ibcon#enter sib2, iclass 25, count 0 2006.229.02:16:52.35#ibcon#flushed, iclass 25, count 0 2006.229.02:16:52.35#ibcon#about to write, iclass 25, count 0 2006.229.02:16:52.35#ibcon#wrote, iclass 25, count 0 2006.229.02:16:52.35#ibcon#about to read 3, iclass 25, count 0 2006.229.02:16:52.37#ibcon#read 3, iclass 25, count 0 2006.229.02:16:52.37#ibcon#about to read 4, iclass 25, count 0 2006.229.02:16:52.37#ibcon#read 4, iclass 25, count 0 2006.229.02:16:52.37#ibcon#about to read 5, iclass 25, count 0 2006.229.02:16:52.37#ibcon#read 5, iclass 25, count 0 2006.229.02:16:52.37#ibcon#about to read 6, iclass 25, count 0 2006.229.02:16:52.37#ibcon#read 6, iclass 25, count 0 2006.229.02:16:52.37#ibcon#end of sib2, iclass 25, count 0 2006.229.02:16:52.37#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:16:52.37#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:16:52.37#ibcon#[27=USB\r\n] 2006.229.02:16:52.37#ibcon#*before write, iclass 25, count 0 2006.229.02:16:52.37#ibcon#enter sib2, iclass 25, count 0 2006.229.02:16:52.37#ibcon#flushed, iclass 25, count 0 2006.229.02:16:52.37#ibcon#about to write, iclass 25, count 0 2006.229.02:16:52.37#ibcon#wrote, iclass 25, count 0 2006.229.02:16:52.37#ibcon#about to read 3, iclass 25, count 0 2006.229.02:16:52.40#ibcon#read 3, iclass 25, count 0 2006.229.02:16:52.40#ibcon#about to read 4, iclass 25, count 0 2006.229.02:16:52.40#ibcon#read 4, iclass 25, count 0 2006.229.02:16:52.40#ibcon#about to read 5, iclass 25, count 0 2006.229.02:16:52.40#ibcon#read 5, iclass 25, count 0 2006.229.02:16:52.40#ibcon#about to read 6, iclass 25, count 0 2006.229.02:16:52.40#ibcon#read 6, iclass 25, count 0 2006.229.02:16:52.40#ibcon#end of sib2, iclass 25, count 0 2006.229.02:16:52.40#ibcon#*after write, iclass 25, count 0 2006.229.02:16:52.40#ibcon#*before return 0, iclass 25, count 0 2006.229.02:16:52.40#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:52.40#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:16:52.40#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:16:52.40#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:16:52.40$vck44/vblo=8,744.99 2006.229.02:16:52.40#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.02:16:52.40#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.02:16:52.40#ibcon#ireg 17 cls_cnt 0 2006.229.02:16:52.40#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:52.40#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:52.40#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:52.40#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:16:52.40#ibcon#first serial, iclass 27, count 0 2006.229.02:16:52.40#ibcon#enter sib2, iclass 27, count 0 2006.229.02:16:52.40#ibcon#flushed, iclass 27, count 0 2006.229.02:16:52.40#ibcon#about to write, iclass 27, count 0 2006.229.02:16:52.40#ibcon#wrote, iclass 27, count 0 2006.229.02:16:52.40#ibcon#about to read 3, iclass 27, count 0 2006.229.02:16:52.42#ibcon#read 3, iclass 27, count 0 2006.229.02:16:52.42#ibcon#about to read 4, iclass 27, count 0 2006.229.02:16:52.42#ibcon#read 4, iclass 27, count 0 2006.229.02:16:52.42#ibcon#about to read 5, iclass 27, count 0 2006.229.02:16:52.42#ibcon#read 5, iclass 27, count 0 2006.229.02:16:52.42#ibcon#about to read 6, iclass 27, count 0 2006.229.02:16:52.42#ibcon#read 6, iclass 27, count 0 2006.229.02:16:52.42#ibcon#end of sib2, iclass 27, count 0 2006.229.02:16:52.42#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:16:52.42#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:16:52.42#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:16:52.42#ibcon#*before write, iclass 27, count 0 2006.229.02:16:52.42#ibcon#enter sib2, iclass 27, count 0 2006.229.02:16:52.42#ibcon#flushed, iclass 27, count 0 2006.229.02:16:52.42#ibcon#about to write, iclass 27, count 0 2006.229.02:16:52.42#ibcon#wrote, iclass 27, count 0 2006.229.02:16:52.42#ibcon#about to read 3, iclass 27, count 0 2006.229.02:16:52.46#ibcon#read 3, iclass 27, count 0 2006.229.02:16:52.46#ibcon#about to read 4, iclass 27, count 0 2006.229.02:16:52.46#ibcon#read 4, iclass 27, count 0 2006.229.02:16:52.46#ibcon#about to read 5, iclass 27, count 0 2006.229.02:16:52.46#ibcon#read 5, iclass 27, count 0 2006.229.02:16:52.46#ibcon#about to read 6, iclass 27, count 0 2006.229.02:16:52.46#ibcon#read 6, iclass 27, count 0 2006.229.02:16:52.46#ibcon#end of sib2, iclass 27, count 0 2006.229.02:16:52.46#ibcon#*after write, iclass 27, count 0 2006.229.02:16:52.46#ibcon#*before return 0, iclass 27, count 0 2006.229.02:16:52.46#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:52.46#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:16:52.46#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:16:52.46#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:16:52.46$vck44/vb=8,4 2006.229.02:16:52.46#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.02:16:52.46#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.02:16:52.46#ibcon#ireg 11 cls_cnt 2 2006.229.02:16:52.46#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:52.52#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:52.52#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:52.52#ibcon#enter wrdev, iclass 29, count 2 2006.229.02:16:52.52#ibcon#first serial, iclass 29, count 2 2006.229.02:16:52.52#ibcon#enter sib2, iclass 29, count 2 2006.229.02:16:52.52#ibcon#flushed, iclass 29, count 2 2006.229.02:16:52.52#ibcon#about to write, iclass 29, count 2 2006.229.02:16:52.52#ibcon#wrote, iclass 29, count 2 2006.229.02:16:52.52#ibcon#about to read 3, iclass 29, count 2 2006.229.02:16:52.54#ibcon#read 3, iclass 29, count 2 2006.229.02:16:52.54#ibcon#about to read 4, iclass 29, count 2 2006.229.02:16:52.54#ibcon#read 4, iclass 29, count 2 2006.229.02:16:52.54#ibcon#about to read 5, iclass 29, count 2 2006.229.02:16:52.54#ibcon#read 5, iclass 29, count 2 2006.229.02:16:52.54#ibcon#about to read 6, iclass 29, count 2 2006.229.02:16:52.54#ibcon#read 6, iclass 29, count 2 2006.229.02:16:52.54#ibcon#end of sib2, iclass 29, count 2 2006.229.02:16:52.54#ibcon#*mode == 0, iclass 29, count 2 2006.229.02:16:52.54#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.02:16:52.54#ibcon#[27=AT08-04\r\n] 2006.229.02:16:52.54#ibcon#*before write, iclass 29, count 2 2006.229.02:16:52.54#ibcon#enter sib2, iclass 29, count 2 2006.229.02:16:52.54#ibcon#flushed, iclass 29, count 2 2006.229.02:16:52.54#ibcon#about to write, iclass 29, count 2 2006.229.02:16:52.54#ibcon#wrote, iclass 29, count 2 2006.229.02:16:52.54#ibcon#about to read 3, iclass 29, count 2 2006.229.02:16:52.57#ibcon#read 3, iclass 29, count 2 2006.229.02:16:52.57#ibcon#about to read 4, iclass 29, count 2 2006.229.02:16:52.57#ibcon#read 4, iclass 29, count 2 2006.229.02:16:52.57#ibcon#about to read 5, iclass 29, count 2 2006.229.02:16:52.57#ibcon#read 5, iclass 29, count 2 2006.229.02:16:52.57#ibcon#about to read 6, iclass 29, count 2 2006.229.02:16:52.57#ibcon#read 6, iclass 29, count 2 2006.229.02:16:52.57#ibcon#end of sib2, iclass 29, count 2 2006.229.02:16:52.57#ibcon#*after write, iclass 29, count 2 2006.229.02:16:52.57#ibcon#*before return 0, iclass 29, count 2 2006.229.02:16:52.57#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:52.57#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:16:52.57#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.02:16:52.57#ibcon#ireg 7 cls_cnt 0 2006.229.02:16:52.57#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:52.69#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:52.69#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:52.69#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:16:52.69#ibcon#first serial, iclass 29, count 0 2006.229.02:16:52.69#ibcon#enter sib2, iclass 29, count 0 2006.229.02:16:52.69#ibcon#flushed, iclass 29, count 0 2006.229.02:16:52.69#ibcon#about to write, iclass 29, count 0 2006.229.02:16:52.69#ibcon#wrote, iclass 29, count 0 2006.229.02:16:52.69#ibcon#about to read 3, iclass 29, count 0 2006.229.02:16:52.71#ibcon#read 3, iclass 29, count 0 2006.229.02:16:52.71#ibcon#about to read 4, iclass 29, count 0 2006.229.02:16:52.71#ibcon#read 4, iclass 29, count 0 2006.229.02:16:52.71#ibcon#about to read 5, iclass 29, count 0 2006.229.02:16:52.71#ibcon#read 5, iclass 29, count 0 2006.229.02:16:52.71#ibcon#about to read 6, iclass 29, count 0 2006.229.02:16:52.71#ibcon#read 6, iclass 29, count 0 2006.229.02:16:52.71#ibcon#end of sib2, iclass 29, count 0 2006.229.02:16:52.71#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:16:52.71#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:16:52.71#ibcon#[27=USB\r\n] 2006.229.02:16:52.71#ibcon#*before write, iclass 29, count 0 2006.229.02:16:52.71#ibcon#enter sib2, iclass 29, count 0 2006.229.02:16:52.71#ibcon#flushed, iclass 29, count 0 2006.229.02:16:52.71#ibcon#about to write, iclass 29, count 0 2006.229.02:16:52.71#ibcon#wrote, iclass 29, count 0 2006.229.02:16:52.71#ibcon#about to read 3, iclass 29, count 0 2006.229.02:16:52.74#ibcon#read 3, iclass 29, count 0 2006.229.02:16:52.74#ibcon#about to read 4, iclass 29, count 0 2006.229.02:16:52.74#ibcon#read 4, iclass 29, count 0 2006.229.02:16:52.74#ibcon#about to read 5, iclass 29, count 0 2006.229.02:16:52.74#ibcon#read 5, iclass 29, count 0 2006.229.02:16:52.74#ibcon#about to read 6, iclass 29, count 0 2006.229.02:16:52.74#ibcon#read 6, iclass 29, count 0 2006.229.02:16:52.74#ibcon#end of sib2, iclass 29, count 0 2006.229.02:16:52.74#ibcon#*after write, iclass 29, count 0 2006.229.02:16:52.74#ibcon#*before return 0, iclass 29, count 0 2006.229.02:16:52.74#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:52.74#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:16:52.74#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:16:52.74#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:16:52.74$vck44/vabw=wide 2006.229.02:16:52.74#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.02:16:52.74#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.02:16:52.74#ibcon#ireg 8 cls_cnt 0 2006.229.02:16:52.74#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:52.74#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:52.74#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:52.74#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:16:52.74#ibcon#first serial, iclass 31, count 0 2006.229.02:16:52.74#ibcon#enter sib2, iclass 31, count 0 2006.229.02:16:52.74#ibcon#flushed, iclass 31, count 0 2006.229.02:16:52.74#ibcon#about to write, iclass 31, count 0 2006.229.02:16:52.74#ibcon#wrote, iclass 31, count 0 2006.229.02:16:52.74#ibcon#about to read 3, iclass 31, count 0 2006.229.02:16:52.76#ibcon#read 3, iclass 31, count 0 2006.229.02:16:52.76#ibcon#about to read 4, iclass 31, count 0 2006.229.02:16:52.76#ibcon#read 4, iclass 31, count 0 2006.229.02:16:52.76#ibcon#about to read 5, iclass 31, count 0 2006.229.02:16:52.76#ibcon#read 5, iclass 31, count 0 2006.229.02:16:52.76#ibcon#about to read 6, iclass 31, count 0 2006.229.02:16:52.76#ibcon#read 6, iclass 31, count 0 2006.229.02:16:52.76#ibcon#end of sib2, iclass 31, count 0 2006.229.02:16:52.76#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:16:52.76#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:16:52.76#ibcon#[25=BW32\r\n] 2006.229.02:16:52.76#ibcon#*before write, iclass 31, count 0 2006.229.02:16:52.76#ibcon#enter sib2, iclass 31, count 0 2006.229.02:16:52.76#ibcon#flushed, iclass 31, count 0 2006.229.02:16:52.76#ibcon#about to write, iclass 31, count 0 2006.229.02:16:52.76#ibcon#wrote, iclass 31, count 0 2006.229.02:16:52.76#ibcon#about to read 3, iclass 31, count 0 2006.229.02:16:52.79#ibcon#read 3, iclass 31, count 0 2006.229.02:16:52.79#ibcon#about to read 4, iclass 31, count 0 2006.229.02:16:52.79#ibcon#read 4, iclass 31, count 0 2006.229.02:16:52.79#ibcon#about to read 5, iclass 31, count 0 2006.229.02:16:52.79#ibcon#read 5, iclass 31, count 0 2006.229.02:16:52.79#ibcon#about to read 6, iclass 31, count 0 2006.229.02:16:52.79#ibcon#read 6, iclass 31, count 0 2006.229.02:16:52.79#ibcon#end of sib2, iclass 31, count 0 2006.229.02:16:52.79#ibcon#*after write, iclass 31, count 0 2006.229.02:16:52.79#ibcon#*before return 0, iclass 31, count 0 2006.229.02:16:52.79#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:52.79#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:16:52.79#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:16:52.79#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:16:52.79$vck44/vbbw=wide 2006.229.02:16:52.79#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.02:16:52.79#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.02:16:52.79#ibcon#ireg 8 cls_cnt 0 2006.229.02:16:52.79#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:16:52.86#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:16:52.86#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:16:52.86#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:16:52.86#ibcon#first serial, iclass 33, count 0 2006.229.02:16:52.86#ibcon#enter sib2, iclass 33, count 0 2006.229.02:16:52.86#ibcon#flushed, iclass 33, count 0 2006.229.02:16:52.86#ibcon#about to write, iclass 33, count 0 2006.229.02:16:52.86#ibcon#wrote, iclass 33, count 0 2006.229.02:16:52.86#ibcon#about to read 3, iclass 33, count 0 2006.229.02:16:52.88#ibcon#read 3, iclass 33, count 0 2006.229.02:16:52.88#ibcon#about to read 4, iclass 33, count 0 2006.229.02:16:52.88#ibcon#read 4, iclass 33, count 0 2006.229.02:16:52.88#ibcon#about to read 5, iclass 33, count 0 2006.229.02:16:52.88#ibcon#read 5, iclass 33, count 0 2006.229.02:16:52.88#ibcon#about to read 6, iclass 33, count 0 2006.229.02:16:52.88#ibcon#read 6, iclass 33, count 0 2006.229.02:16:52.88#ibcon#end of sib2, iclass 33, count 0 2006.229.02:16:52.88#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:16:52.88#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:16:52.88#ibcon#[27=BW32\r\n] 2006.229.02:16:52.88#ibcon#*before write, iclass 33, count 0 2006.229.02:16:52.88#ibcon#enter sib2, iclass 33, count 0 2006.229.02:16:52.88#ibcon#flushed, iclass 33, count 0 2006.229.02:16:52.88#ibcon#about to write, iclass 33, count 0 2006.229.02:16:52.88#ibcon#wrote, iclass 33, count 0 2006.229.02:16:52.88#ibcon#about to read 3, iclass 33, count 0 2006.229.02:16:52.91#ibcon#read 3, iclass 33, count 0 2006.229.02:16:52.91#ibcon#about to read 4, iclass 33, count 0 2006.229.02:16:52.91#ibcon#read 4, iclass 33, count 0 2006.229.02:16:52.91#ibcon#about to read 5, iclass 33, count 0 2006.229.02:16:52.91#ibcon#read 5, iclass 33, count 0 2006.229.02:16:52.91#ibcon#about to read 6, iclass 33, count 0 2006.229.02:16:52.91#ibcon#read 6, iclass 33, count 0 2006.229.02:16:52.91#ibcon#end of sib2, iclass 33, count 0 2006.229.02:16:52.91#ibcon#*after write, iclass 33, count 0 2006.229.02:16:52.91#ibcon#*before return 0, iclass 33, count 0 2006.229.02:16:52.91#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:16:52.91#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:16:52.91#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:16:52.91#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:16:52.91$setupk4/ifdk4 2006.229.02:16:52.91$ifdk4/lo= 2006.229.02:16:52.91$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:16:52.91$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:16:52.91$ifdk4/patch= 2006.229.02:16:52.91$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:16:52.91$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:16:52.91$setupk4/!*+20s 2006.229.02:16:54.86#abcon#<5=/05 3.2 7.2 29.84 931001.3\r\n> 2006.229.02:16:54.88#abcon#{5=INTERFACE CLEAR} 2006.229.02:16:54.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:17:05.03#abcon#<5=/05 3.3 7.2 29.84 931001.3\r\n> 2006.229.02:17:05.05#abcon#{5=INTERFACE CLEAR} 2006.229.02:17:05.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:17:07.39$setupk4/"tpicd 2006.229.02:17:07.39$setupk4/echo=off 2006.229.02:17:07.39$setupk4/xlog=off 2006.229.02:17:07.39:!2006.229.02:19:13 2006.229.02:17:14.14#trakl#Source acquired 2006.229.02:17:14.14#flagr#flagr/antenna,acquired 2006.229.02:19:13.00:preob 2006.229.02:19:13.13/onsource/TRACKING 2006.229.02:19:13.13:!2006.229.02:19:23 2006.229.02:19:23.00:"tape 2006.229.02:19:23.00:"st=record 2006.229.02:19:23.00:data_valid=on 2006.229.02:19:23.00:midob 2006.229.02:19:23.13/onsource/TRACKING 2006.229.02:19:23.13/wx/29.81,1001.4,96 2006.229.02:19:23.19/cable/+6.4087E-03 2006.229.02:19:24.28/va/01,08,usb,yes,57,61 2006.229.02:19:24.28/va/02,07,usb,yes,61,62 2006.229.02:19:24.28/va/03,06,usb,yes,75,79 2006.229.02:19:24.28/va/04,07,usb,yes,63,66 2006.229.02:19:24.28/va/05,04,usb,yes,57,58 2006.229.02:19:24.28/va/06,04,usb,yes,63,63 2006.229.02:19:24.28/va/07,05,usb,yes,57,58 2006.229.02:19:24.28/va/08,06,usb,yes,43,52 2006.229.02:19:24.51/valo/01,524.99,yes,locked 2006.229.02:19:24.51/valo/02,534.99,yes,locked 2006.229.02:19:24.51/valo/03,564.99,yes,locked 2006.229.02:19:24.51/valo/04,624.99,yes,locked 2006.229.02:19:24.51/valo/05,734.99,yes,locked 2006.229.02:19:24.51/valo/06,814.99,yes,locked 2006.229.02:19:24.51/valo/07,864.99,yes,locked 2006.229.02:19:24.51/valo/08,884.99,yes,locked 2006.229.02:19:25.60/vb/01,04,usb,yes,35,33 2006.229.02:19:25.60/vb/02,04,usb,yes,38,38 2006.229.02:19:25.60/vb/03,04,usb,yes,35,38 2006.229.02:19:25.60/vb/04,04,usb,yes,40,38 2006.229.02:19:25.60/vb/05,04,usb,yes,31,34 2006.229.02:19:25.60/vb/06,04,usb,yes,36,32 2006.229.02:19:25.60/vb/07,04,usb,yes,36,36 2006.229.02:19:25.60/vb/08,04,usb,yes,33,37 2006.229.02:19:25.84/vblo/01,629.99,yes,locked 2006.229.02:19:25.84/vblo/02,634.99,yes,locked 2006.229.02:19:25.84/vblo/03,649.99,yes,locked 2006.229.02:19:25.84/vblo/04,679.99,yes,locked 2006.229.02:19:25.84/vblo/05,709.99,yes,locked 2006.229.02:19:25.84/vblo/06,719.99,yes,locked 2006.229.02:19:25.84/vblo/07,734.99,yes,locked 2006.229.02:19:25.84/vblo/08,744.99,yes,locked 2006.229.02:19:25.99/vabw/8 2006.229.02:19:26.14/vbbw/8 2006.229.02:19:26.23/xfe/off,on,12.0 2006.229.02:19:26.61/ifatt/23,28,28,28 2006.229.02:19:27.08/fmout-gps/S +4.51E-07 2006.229.02:19:27.12:!2006.229.02:20:33 2006.229.02:20:33.00:data_valid=off 2006.229.02:20:33.00:"et 2006.229.02:20:33.01:!+3s 2006.229.02:20:36.02:"tape 2006.229.02:20:36.02:postob 2006.229.02:20:36.10/cable/+6.4071E-03 2006.229.02:20:36.10/wx/29.75,1001.4,97 2006.229.02:20:37.08/fmout-gps/S +4.52E-07 2006.229.02:20:37.08:scan_name=229-0223,jd0608,120 2006.229.02:20:37.09:source=3c274,123049.42,122328.0,2000.0,ccw 2006.229.02:20:38.13#flagr#flagr/antenna,new-source 2006.229.02:20:38.13:checkk5 2006.229.02:20:38.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:20:39.00/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:20:39.41/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:20:39.80/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:20:40.19/chk_obsdata//k5ts1/T2290219??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.02:20:40.62/chk_obsdata//k5ts2/T2290219??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.02:20:41.14/chk_obsdata//k5ts3/T2290219??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.02:20:41.57/chk_obsdata//k5ts4/T2290219??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.02:20:42.35/k5log//k5ts1_log_newline 2006.229.02:20:43.09/k5log//k5ts2_log_newline 2006.229.02:20:43.87/k5log//k5ts3_log_newline 2006.229.02:20:44.66/k5log//k5ts4_log_newline 2006.229.02:20:44.68/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:20:44.68:setupk4=1 2006.229.02:20:44.68$setupk4/echo=on 2006.229.02:20:44.68$setupk4/pcalon 2006.229.02:20:44.68$pcalon/"no phase cal control is implemented here 2006.229.02:20:44.68$setupk4/"tpicd=stop 2006.229.02:20:44.68$setupk4/"rec=synch_on 2006.229.02:20:44.68$setupk4/"rec_mode=128 2006.229.02:20:44.68$setupk4/!* 2006.229.02:20:44.68$setupk4/recpk4 2006.229.02:20:44.68$recpk4/recpatch= 2006.229.02:20:44.68$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:20:44.68$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:20:44.68$setupk4/vck44 2006.229.02:20:44.68$vck44/valo=1,524.99 2006.229.02:20:44.68#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:20:44.68#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:20:44.68#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:44.68#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:44.68#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:44.68#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:44.68#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:20:44.68#ibcon#first serial, iclass 22, count 0 2006.229.02:20:44.68#ibcon#enter sib2, iclass 22, count 0 2006.229.02:20:44.68#ibcon#flushed, iclass 22, count 0 2006.229.02:20:44.68#ibcon#about to write, iclass 22, count 0 2006.229.02:20:44.68#ibcon#wrote, iclass 22, count 0 2006.229.02:20:44.68#ibcon#about to read 3, iclass 22, count 0 2006.229.02:20:44.73#ibcon#read 3, iclass 22, count 0 2006.229.02:20:44.73#ibcon#about to read 4, iclass 22, count 0 2006.229.02:20:44.73#ibcon#read 4, iclass 22, count 0 2006.229.02:20:44.73#ibcon#about to read 5, iclass 22, count 0 2006.229.02:20:44.73#ibcon#read 5, iclass 22, count 0 2006.229.02:20:44.73#ibcon#about to read 6, iclass 22, count 0 2006.229.02:20:44.73#ibcon#read 6, iclass 22, count 0 2006.229.02:20:44.73#ibcon#end of sib2, iclass 22, count 0 2006.229.02:20:44.73#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:20:44.73#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:20:44.73#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:20:44.73#ibcon#*before write, iclass 22, count 0 2006.229.02:20:44.73#ibcon#enter sib2, iclass 22, count 0 2006.229.02:20:44.73#ibcon#flushed, iclass 22, count 0 2006.229.02:20:44.73#ibcon#about to write, iclass 22, count 0 2006.229.02:20:44.73#ibcon#wrote, iclass 22, count 0 2006.229.02:20:44.73#ibcon#about to read 3, iclass 22, count 0 2006.229.02:20:44.78#ibcon#read 3, iclass 22, count 0 2006.229.02:20:44.78#ibcon#about to read 4, iclass 22, count 0 2006.229.02:20:44.78#ibcon#read 4, iclass 22, count 0 2006.229.02:20:44.78#ibcon#about to read 5, iclass 22, count 0 2006.229.02:20:44.78#ibcon#read 5, iclass 22, count 0 2006.229.02:20:44.78#ibcon#about to read 6, iclass 22, count 0 2006.229.02:20:44.78#ibcon#read 6, iclass 22, count 0 2006.229.02:20:44.78#ibcon#end of sib2, iclass 22, count 0 2006.229.02:20:44.78#ibcon#*after write, iclass 22, count 0 2006.229.02:20:44.78#ibcon#*before return 0, iclass 22, count 0 2006.229.02:20:44.78#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:44.78#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:44.78#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:20:44.78#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:20:44.78$vck44/va=1,8 2006.229.02:20:44.78#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.02:20:44.78#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.02:20:44.78#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:44.78#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:44.78#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:44.78#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:44.78#ibcon#enter wrdev, iclass 24, count 2 2006.229.02:20:44.78#ibcon#first serial, iclass 24, count 2 2006.229.02:20:44.78#ibcon#enter sib2, iclass 24, count 2 2006.229.02:20:44.78#ibcon#flushed, iclass 24, count 2 2006.229.02:20:44.78#ibcon#about to write, iclass 24, count 2 2006.229.02:20:44.78#ibcon#wrote, iclass 24, count 2 2006.229.02:20:44.78#ibcon#about to read 3, iclass 24, count 2 2006.229.02:20:44.81#ibcon#read 3, iclass 24, count 2 2006.229.02:20:44.81#ibcon#about to read 4, iclass 24, count 2 2006.229.02:20:44.81#ibcon#read 4, iclass 24, count 2 2006.229.02:20:44.81#ibcon#about to read 5, iclass 24, count 2 2006.229.02:20:44.81#ibcon#read 5, iclass 24, count 2 2006.229.02:20:44.81#ibcon#about to read 6, iclass 24, count 2 2006.229.02:20:44.81#ibcon#read 6, iclass 24, count 2 2006.229.02:20:44.81#ibcon#end of sib2, iclass 24, count 2 2006.229.02:20:44.81#ibcon#*mode == 0, iclass 24, count 2 2006.229.02:20:44.81#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.02:20:44.81#ibcon#[25=AT01-08\r\n] 2006.229.02:20:44.81#ibcon#*before write, iclass 24, count 2 2006.229.02:20:44.81#ibcon#enter sib2, iclass 24, count 2 2006.229.02:20:44.81#ibcon#flushed, iclass 24, count 2 2006.229.02:20:44.81#ibcon#about to write, iclass 24, count 2 2006.229.02:20:44.81#ibcon#wrote, iclass 24, count 2 2006.229.02:20:44.81#ibcon#about to read 3, iclass 24, count 2 2006.229.02:20:44.84#ibcon#read 3, iclass 24, count 2 2006.229.02:20:44.84#ibcon#about to read 4, iclass 24, count 2 2006.229.02:20:44.84#ibcon#read 4, iclass 24, count 2 2006.229.02:20:44.84#ibcon#about to read 5, iclass 24, count 2 2006.229.02:20:44.84#ibcon#read 5, iclass 24, count 2 2006.229.02:20:44.84#ibcon#about to read 6, iclass 24, count 2 2006.229.02:20:44.84#ibcon#read 6, iclass 24, count 2 2006.229.02:20:44.84#ibcon#end of sib2, iclass 24, count 2 2006.229.02:20:44.84#ibcon#*after write, iclass 24, count 2 2006.229.02:20:44.84#ibcon#*before return 0, iclass 24, count 2 2006.229.02:20:44.84#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:44.84#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:44.84#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.02:20:44.84#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:44.84#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:44.96#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:44.96#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:44.96#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:20:44.96#ibcon#first serial, iclass 24, count 0 2006.229.02:20:44.96#ibcon#enter sib2, iclass 24, count 0 2006.229.02:20:44.96#ibcon#flushed, iclass 24, count 0 2006.229.02:20:44.96#ibcon#about to write, iclass 24, count 0 2006.229.02:20:44.96#ibcon#wrote, iclass 24, count 0 2006.229.02:20:44.96#ibcon#about to read 3, iclass 24, count 0 2006.229.02:20:44.98#ibcon#read 3, iclass 24, count 0 2006.229.02:20:44.98#ibcon#about to read 4, iclass 24, count 0 2006.229.02:20:44.98#ibcon#read 4, iclass 24, count 0 2006.229.02:20:44.98#ibcon#about to read 5, iclass 24, count 0 2006.229.02:20:44.98#ibcon#read 5, iclass 24, count 0 2006.229.02:20:44.98#ibcon#about to read 6, iclass 24, count 0 2006.229.02:20:44.98#ibcon#read 6, iclass 24, count 0 2006.229.02:20:44.98#ibcon#end of sib2, iclass 24, count 0 2006.229.02:20:44.98#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:20:44.98#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:20:44.98#ibcon#[25=USB\r\n] 2006.229.02:20:44.98#ibcon#*before write, iclass 24, count 0 2006.229.02:20:44.98#ibcon#enter sib2, iclass 24, count 0 2006.229.02:20:44.98#ibcon#flushed, iclass 24, count 0 2006.229.02:20:44.98#ibcon#about to write, iclass 24, count 0 2006.229.02:20:44.98#ibcon#wrote, iclass 24, count 0 2006.229.02:20:44.98#ibcon#about to read 3, iclass 24, count 0 2006.229.02:20:45.01#ibcon#read 3, iclass 24, count 0 2006.229.02:20:45.01#ibcon#about to read 4, iclass 24, count 0 2006.229.02:20:45.01#ibcon#read 4, iclass 24, count 0 2006.229.02:20:45.01#ibcon#about to read 5, iclass 24, count 0 2006.229.02:20:45.01#ibcon#read 5, iclass 24, count 0 2006.229.02:20:45.01#ibcon#about to read 6, iclass 24, count 0 2006.229.02:20:45.01#ibcon#read 6, iclass 24, count 0 2006.229.02:20:45.01#ibcon#end of sib2, iclass 24, count 0 2006.229.02:20:45.01#ibcon#*after write, iclass 24, count 0 2006.229.02:20:45.01#ibcon#*before return 0, iclass 24, count 0 2006.229.02:20:45.01#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:45.01#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:45.01#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:20:45.01#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:20:45.01$vck44/valo=2,534.99 2006.229.02:20:45.01#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:20:45.01#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:20:45.01#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:45.01#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:45.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:45.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:45.01#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:20:45.01#ibcon#first serial, iclass 26, count 0 2006.229.02:20:45.01#ibcon#enter sib2, iclass 26, count 0 2006.229.02:20:45.01#ibcon#flushed, iclass 26, count 0 2006.229.02:20:45.01#ibcon#about to write, iclass 26, count 0 2006.229.02:20:45.01#ibcon#wrote, iclass 26, count 0 2006.229.02:20:45.01#ibcon#about to read 3, iclass 26, count 0 2006.229.02:20:45.03#ibcon#read 3, iclass 26, count 0 2006.229.02:20:45.03#ibcon#about to read 4, iclass 26, count 0 2006.229.02:20:45.03#ibcon#read 4, iclass 26, count 0 2006.229.02:20:45.03#ibcon#about to read 5, iclass 26, count 0 2006.229.02:20:45.03#ibcon#read 5, iclass 26, count 0 2006.229.02:20:45.03#ibcon#about to read 6, iclass 26, count 0 2006.229.02:20:45.03#ibcon#read 6, iclass 26, count 0 2006.229.02:20:45.03#ibcon#end of sib2, iclass 26, count 0 2006.229.02:20:45.03#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:20:45.03#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:20:45.03#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:20:45.03#ibcon#*before write, iclass 26, count 0 2006.229.02:20:45.03#ibcon#enter sib2, iclass 26, count 0 2006.229.02:20:45.03#ibcon#flushed, iclass 26, count 0 2006.229.02:20:45.03#ibcon#about to write, iclass 26, count 0 2006.229.02:20:45.03#ibcon#wrote, iclass 26, count 0 2006.229.02:20:45.03#ibcon#about to read 3, iclass 26, count 0 2006.229.02:20:45.07#ibcon#read 3, iclass 26, count 0 2006.229.02:20:45.07#ibcon#about to read 4, iclass 26, count 0 2006.229.02:20:45.07#ibcon#read 4, iclass 26, count 0 2006.229.02:20:45.07#ibcon#about to read 5, iclass 26, count 0 2006.229.02:20:45.07#ibcon#read 5, iclass 26, count 0 2006.229.02:20:45.07#ibcon#about to read 6, iclass 26, count 0 2006.229.02:20:45.07#ibcon#read 6, iclass 26, count 0 2006.229.02:20:45.07#ibcon#end of sib2, iclass 26, count 0 2006.229.02:20:45.07#ibcon#*after write, iclass 26, count 0 2006.229.02:20:45.07#ibcon#*before return 0, iclass 26, count 0 2006.229.02:20:45.07#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:45.07#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:45.07#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:20:45.07#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:20:45.07$vck44/va=2,7 2006.229.02:20:45.07#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:20:45.07#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:20:45.07#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:45.07#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:45.13#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:45.13#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:45.13#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:20:45.13#ibcon#first serial, iclass 28, count 2 2006.229.02:20:45.13#ibcon#enter sib2, iclass 28, count 2 2006.229.02:20:45.13#ibcon#flushed, iclass 28, count 2 2006.229.02:20:45.13#ibcon#about to write, iclass 28, count 2 2006.229.02:20:45.13#ibcon#wrote, iclass 28, count 2 2006.229.02:20:45.13#ibcon#about to read 3, iclass 28, count 2 2006.229.02:20:45.15#ibcon#read 3, iclass 28, count 2 2006.229.02:20:45.15#ibcon#about to read 4, iclass 28, count 2 2006.229.02:20:45.15#ibcon#read 4, iclass 28, count 2 2006.229.02:20:45.15#ibcon#about to read 5, iclass 28, count 2 2006.229.02:20:45.15#ibcon#read 5, iclass 28, count 2 2006.229.02:20:45.15#ibcon#about to read 6, iclass 28, count 2 2006.229.02:20:45.15#ibcon#read 6, iclass 28, count 2 2006.229.02:20:45.15#ibcon#end of sib2, iclass 28, count 2 2006.229.02:20:45.15#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:20:45.15#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:20:45.15#ibcon#[25=AT02-07\r\n] 2006.229.02:20:45.15#ibcon#*before write, iclass 28, count 2 2006.229.02:20:45.15#ibcon#enter sib2, iclass 28, count 2 2006.229.02:20:45.15#ibcon#flushed, iclass 28, count 2 2006.229.02:20:45.15#ibcon#about to write, iclass 28, count 2 2006.229.02:20:45.15#ibcon#wrote, iclass 28, count 2 2006.229.02:20:45.15#ibcon#about to read 3, iclass 28, count 2 2006.229.02:20:45.18#ibcon#read 3, iclass 28, count 2 2006.229.02:20:45.18#ibcon#about to read 4, iclass 28, count 2 2006.229.02:20:45.18#ibcon#read 4, iclass 28, count 2 2006.229.02:20:45.18#ibcon#about to read 5, iclass 28, count 2 2006.229.02:20:45.18#ibcon#read 5, iclass 28, count 2 2006.229.02:20:45.18#ibcon#about to read 6, iclass 28, count 2 2006.229.02:20:45.18#ibcon#read 6, iclass 28, count 2 2006.229.02:20:45.18#ibcon#end of sib2, iclass 28, count 2 2006.229.02:20:45.18#ibcon#*after write, iclass 28, count 2 2006.229.02:20:45.18#ibcon#*before return 0, iclass 28, count 2 2006.229.02:20:45.18#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:45.18#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:45.18#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:20:45.18#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:45.18#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:45.30#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:45.30#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:45.30#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:20:45.30#ibcon#first serial, iclass 28, count 0 2006.229.02:20:45.30#ibcon#enter sib2, iclass 28, count 0 2006.229.02:20:45.30#ibcon#flushed, iclass 28, count 0 2006.229.02:20:45.30#ibcon#about to write, iclass 28, count 0 2006.229.02:20:45.30#ibcon#wrote, iclass 28, count 0 2006.229.02:20:45.30#ibcon#about to read 3, iclass 28, count 0 2006.229.02:20:45.32#ibcon#read 3, iclass 28, count 0 2006.229.02:20:45.32#ibcon#about to read 4, iclass 28, count 0 2006.229.02:20:45.32#ibcon#read 4, iclass 28, count 0 2006.229.02:20:45.32#ibcon#about to read 5, iclass 28, count 0 2006.229.02:20:45.32#ibcon#read 5, iclass 28, count 0 2006.229.02:20:45.32#ibcon#about to read 6, iclass 28, count 0 2006.229.02:20:45.32#ibcon#read 6, iclass 28, count 0 2006.229.02:20:45.32#ibcon#end of sib2, iclass 28, count 0 2006.229.02:20:45.32#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:20:45.32#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:20:45.32#ibcon#[25=USB\r\n] 2006.229.02:20:45.32#ibcon#*before write, iclass 28, count 0 2006.229.02:20:45.32#ibcon#enter sib2, iclass 28, count 0 2006.229.02:20:45.32#ibcon#flushed, iclass 28, count 0 2006.229.02:20:45.32#ibcon#about to write, iclass 28, count 0 2006.229.02:20:45.32#ibcon#wrote, iclass 28, count 0 2006.229.02:20:45.32#ibcon#about to read 3, iclass 28, count 0 2006.229.02:20:45.35#ibcon#read 3, iclass 28, count 0 2006.229.02:20:45.35#ibcon#about to read 4, iclass 28, count 0 2006.229.02:20:45.35#ibcon#read 4, iclass 28, count 0 2006.229.02:20:45.35#ibcon#about to read 5, iclass 28, count 0 2006.229.02:20:45.35#ibcon#read 5, iclass 28, count 0 2006.229.02:20:45.35#ibcon#about to read 6, iclass 28, count 0 2006.229.02:20:45.35#ibcon#read 6, iclass 28, count 0 2006.229.02:20:45.35#ibcon#end of sib2, iclass 28, count 0 2006.229.02:20:45.35#ibcon#*after write, iclass 28, count 0 2006.229.02:20:45.35#ibcon#*before return 0, iclass 28, count 0 2006.229.02:20:45.35#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:45.35#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:45.35#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:20:45.35#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:20:45.35$vck44/valo=3,564.99 2006.229.02:20:45.35#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:20:45.35#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:20:45.35#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:45.35#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:45.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:45.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:45.35#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:20:45.35#ibcon#first serial, iclass 30, count 0 2006.229.02:20:45.35#ibcon#enter sib2, iclass 30, count 0 2006.229.02:20:45.35#ibcon#flushed, iclass 30, count 0 2006.229.02:20:45.35#ibcon#about to write, iclass 30, count 0 2006.229.02:20:45.35#ibcon#wrote, iclass 30, count 0 2006.229.02:20:45.35#ibcon#about to read 3, iclass 30, count 0 2006.229.02:20:45.37#ibcon#read 3, iclass 30, count 0 2006.229.02:20:45.37#ibcon#about to read 4, iclass 30, count 0 2006.229.02:20:45.37#ibcon#read 4, iclass 30, count 0 2006.229.02:20:45.37#ibcon#about to read 5, iclass 30, count 0 2006.229.02:20:45.37#ibcon#read 5, iclass 30, count 0 2006.229.02:20:45.37#ibcon#about to read 6, iclass 30, count 0 2006.229.02:20:45.37#ibcon#read 6, iclass 30, count 0 2006.229.02:20:45.37#ibcon#end of sib2, iclass 30, count 0 2006.229.02:20:45.37#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:20:45.37#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:20:45.37#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:20:45.37#ibcon#*before write, iclass 30, count 0 2006.229.02:20:45.37#ibcon#enter sib2, iclass 30, count 0 2006.229.02:20:45.37#ibcon#flushed, iclass 30, count 0 2006.229.02:20:45.37#ibcon#about to write, iclass 30, count 0 2006.229.02:20:45.37#ibcon#wrote, iclass 30, count 0 2006.229.02:20:45.37#ibcon#about to read 3, iclass 30, count 0 2006.229.02:20:45.41#ibcon#read 3, iclass 30, count 0 2006.229.02:20:45.41#ibcon#about to read 4, iclass 30, count 0 2006.229.02:20:45.41#ibcon#read 4, iclass 30, count 0 2006.229.02:20:45.41#ibcon#about to read 5, iclass 30, count 0 2006.229.02:20:45.41#ibcon#read 5, iclass 30, count 0 2006.229.02:20:45.41#ibcon#about to read 6, iclass 30, count 0 2006.229.02:20:45.41#ibcon#read 6, iclass 30, count 0 2006.229.02:20:45.41#ibcon#end of sib2, iclass 30, count 0 2006.229.02:20:45.41#ibcon#*after write, iclass 30, count 0 2006.229.02:20:45.41#ibcon#*before return 0, iclass 30, count 0 2006.229.02:20:45.41#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:45.41#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:45.41#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:20:45.41#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:20:45.41$vck44/va=3,6 2006.229.02:20:45.41#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:20:45.41#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:20:45.41#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:45.41#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:45.47#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:45.47#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:45.47#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:20:45.47#ibcon#first serial, iclass 32, count 2 2006.229.02:20:45.47#ibcon#enter sib2, iclass 32, count 2 2006.229.02:20:45.47#ibcon#flushed, iclass 32, count 2 2006.229.02:20:45.47#ibcon#about to write, iclass 32, count 2 2006.229.02:20:45.47#ibcon#wrote, iclass 32, count 2 2006.229.02:20:45.47#ibcon#about to read 3, iclass 32, count 2 2006.229.02:20:45.49#ibcon#read 3, iclass 32, count 2 2006.229.02:20:45.49#ibcon#about to read 4, iclass 32, count 2 2006.229.02:20:45.49#ibcon#read 4, iclass 32, count 2 2006.229.02:20:45.49#ibcon#about to read 5, iclass 32, count 2 2006.229.02:20:45.49#ibcon#read 5, iclass 32, count 2 2006.229.02:20:45.49#ibcon#about to read 6, iclass 32, count 2 2006.229.02:20:45.49#ibcon#read 6, iclass 32, count 2 2006.229.02:20:45.49#ibcon#end of sib2, iclass 32, count 2 2006.229.02:20:45.49#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:20:45.49#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:20:45.49#ibcon#[25=AT03-06\r\n] 2006.229.02:20:45.49#ibcon#*before write, iclass 32, count 2 2006.229.02:20:45.49#ibcon#enter sib2, iclass 32, count 2 2006.229.02:20:45.49#ibcon#flushed, iclass 32, count 2 2006.229.02:20:45.49#ibcon#about to write, iclass 32, count 2 2006.229.02:20:45.49#ibcon#wrote, iclass 32, count 2 2006.229.02:20:45.49#ibcon#about to read 3, iclass 32, count 2 2006.229.02:20:45.52#ibcon#read 3, iclass 32, count 2 2006.229.02:20:45.52#ibcon#about to read 4, iclass 32, count 2 2006.229.02:20:45.52#ibcon#read 4, iclass 32, count 2 2006.229.02:20:45.52#ibcon#about to read 5, iclass 32, count 2 2006.229.02:20:45.52#ibcon#read 5, iclass 32, count 2 2006.229.02:20:45.52#ibcon#about to read 6, iclass 32, count 2 2006.229.02:20:45.52#ibcon#read 6, iclass 32, count 2 2006.229.02:20:45.52#ibcon#end of sib2, iclass 32, count 2 2006.229.02:20:45.52#ibcon#*after write, iclass 32, count 2 2006.229.02:20:45.52#ibcon#*before return 0, iclass 32, count 2 2006.229.02:20:45.52#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:45.52#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:45.52#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:20:45.52#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:45.52#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:45.64#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:45.64#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:45.64#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:20:45.64#ibcon#first serial, iclass 32, count 0 2006.229.02:20:45.64#ibcon#enter sib2, iclass 32, count 0 2006.229.02:20:45.64#ibcon#flushed, iclass 32, count 0 2006.229.02:20:45.64#ibcon#about to write, iclass 32, count 0 2006.229.02:20:45.64#ibcon#wrote, iclass 32, count 0 2006.229.02:20:45.64#ibcon#about to read 3, iclass 32, count 0 2006.229.02:20:45.66#ibcon#read 3, iclass 32, count 0 2006.229.02:20:45.66#ibcon#about to read 4, iclass 32, count 0 2006.229.02:20:45.66#ibcon#read 4, iclass 32, count 0 2006.229.02:20:45.66#ibcon#about to read 5, iclass 32, count 0 2006.229.02:20:45.66#ibcon#read 5, iclass 32, count 0 2006.229.02:20:45.66#ibcon#about to read 6, iclass 32, count 0 2006.229.02:20:45.66#ibcon#read 6, iclass 32, count 0 2006.229.02:20:45.66#ibcon#end of sib2, iclass 32, count 0 2006.229.02:20:45.66#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:20:45.66#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:20:45.66#ibcon#[25=USB\r\n] 2006.229.02:20:45.66#ibcon#*before write, iclass 32, count 0 2006.229.02:20:45.66#ibcon#enter sib2, iclass 32, count 0 2006.229.02:20:45.66#ibcon#flushed, iclass 32, count 0 2006.229.02:20:45.66#ibcon#about to write, iclass 32, count 0 2006.229.02:20:45.66#ibcon#wrote, iclass 32, count 0 2006.229.02:20:45.66#ibcon#about to read 3, iclass 32, count 0 2006.229.02:20:45.69#ibcon#read 3, iclass 32, count 0 2006.229.02:20:45.69#ibcon#about to read 4, iclass 32, count 0 2006.229.02:20:45.69#ibcon#read 4, iclass 32, count 0 2006.229.02:20:45.69#ibcon#about to read 5, iclass 32, count 0 2006.229.02:20:45.69#ibcon#read 5, iclass 32, count 0 2006.229.02:20:45.69#ibcon#about to read 6, iclass 32, count 0 2006.229.02:20:45.69#ibcon#read 6, iclass 32, count 0 2006.229.02:20:45.69#ibcon#end of sib2, iclass 32, count 0 2006.229.02:20:45.69#ibcon#*after write, iclass 32, count 0 2006.229.02:20:45.69#ibcon#*before return 0, iclass 32, count 0 2006.229.02:20:45.69#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:45.69#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:45.69#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:20:45.69#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:20:45.69$vck44/valo=4,624.99 2006.229.02:20:45.69#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:20:45.69#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:20:45.69#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:45.69#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:45.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:45.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:45.69#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:20:45.69#ibcon#first serial, iclass 34, count 0 2006.229.02:20:45.69#ibcon#enter sib2, iclass 34, count 0 2006.229.02:20:45.69#ibcon#flushed, iclass 34, count 0 2006.229.02:20:45.69#ibcon#about to write, iclass 34, count 0 2006.229.02:20:45.69#ibcon#wrote, iclass 34, count 0 2006.229.02:20:45.69#ibcon#about to read 3, iclass 34, count 0 2006.229.02:20:45.71#ibcon#read 3, iclass 34, count 0 2006.229.02:20:45.71#ibcon#about to read 4, iclass 34, count 0 2006.229.02:20:45.71#ibcon#read 4, iclass 34, count 0 2006.229.02:20:45.71#ibcon#about to read 5, iclass 34, count 0 2006.229.02:20:45.71#ibcon#read 5, iclass 34, count 0 2006.229.02:20:45.71#ibcon#about to read 6, iclass 34, count 0 2006.229.02:20:45.71#ibcon#read 6, iclass 34, count 0 2006.229.02:20:45.71#ibcon#end of sib2, iclass 34, count 0 2006.229.02:20:45.71#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:20:45.71#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:20:45.71#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:20:45.71#ibcon#*before write, iclass 34, count 0 2006.229.02:20:45.71#ibcon#enter sib2, iclass 34, count 0 2006.229.02:20:45.71#ibcon#flushed, iclass 34, count 0 2006.229.02:20:45.71#ibcon#about to write, iclass 34, count 0 2006.229.02:20:45.71#ibcon#wrote, iclass 34, count 0 2006.229.02:20:45.71#ibcon#about to read 3, iclass 34, count 0 2006.229.02:20:45.75#ibcon#read 3, iclass 34, count 0 2006.229.02:20:45.75#ibcon#about to read 4, iclass 34, count 0 2006.229.02:20:45.75#ibcon#read 4, iclass 34, count 0 2006.229.02:20:45.75#ibcon#about to read 5, iclass 34, count 0 2006.229.02:20:45.75#ibcon#read 5, iclass 34, count 0 2006.229.02:20:45.75#ibcon#about to read 6, iclass 34, count 0 2006.229.02:20:45.75#ibcon#read 6, iclass 34, count 0 2006.229.02:20:45.75#ibcon#end of sib2, iclass 34, count 0 2006.229.02:20:45.75#ibcon#*after write, iclass 34, count 0 2006.229.02:20:45.75#ibcon#*before return 0, iclass 34, count 0 2006.229.02:20:45.75#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:45.75#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:45.75#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:20:45.75#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:20:45.75$vck44/va=4,7 2006.229.02:20:45.75#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.02:20:45.75#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.02:20:45.75#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:45.75#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:20:45.81#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:20:45.81#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:20:45.81#ibcon#enter wrdev, iclass 36, count 2 2006.229.02:20:45.81#ibcon#first serial, iclass 36, count 2 2006.229.02:20:45.81#ibcon#enter sib2, iclass 36, count 2 2006.229.02:20:45.81#ibcon#flushed, iclass 36, count 2 2006.229.02:20:45.81#ibcon#about to write, iclass 36, count 2 2006.229.02:20:45.81#ibcon#wrote, iclass 36, count 2 2006.229.02:20:45.81#ibcon#about to read 3, iclass 36, count 2 2006.229.02:20:45.83#ibcon#read 3, iclass 36, count 2 2006.229.02:20:45.83#ibcon#about to read 4, iclass 36, count 2 2006.229.02:20:45.83#ibcon#read 4, iclass 36, count 2 2006.229.02:20:45.83#ibcon#about to read 5, iclass 36, count 2 2006.229.02:20:45.83#ibcon#read 5, iclass 36, count 2 2006.229.02:20:45.83#ibcon#about to read 6, iclass 36, count 2 2006.229.02:20:45.83#ibcon#read 6, iclass 36, count 2 2006.229.02:20:45.83#ibcon#end of sib2, iclass 36, count 2 2006.229.02:20:45.83#ibcon#*mode == 0, iclass 36, count 2 2006.229.02:20:45.83#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.02:20:45.83#ibcon#[25=AT04-07\r\n] 2006.229.02:20:45.83#ibcon#*before write, iclass 36, count 2 2006.229.02:20:45.83#ibcon#enter sib2, iclass 36, count 2 2006.229.02:20:45.83#ibcon#flushed, iclass 36, count 2 2006.229.02:20:45.83#ibcon#about to write, iclass 36, count 2 2006.229.02:20:45.83#ibcon#wrote, iclass 36, count 2 2006.229.02:20:45.83#ibcon#about to read 3, iclass 36, count 2 2006.229.02:20:45.86#ibcon#read 3, iclass 36, count 2 2006.229.02:20:45.86#ibcon#about to read 4, iclass 36, count 2 2006.229.02:20:45.86#ibcon#read 4, iclass 36, count 2 2006.229.02:20:45.86#ibcon#about to read 5, iclass 36, count 2 2006.229.02:20:45.86#ibcon#read 5, iclass 36, count 2 2006.229.02:20:45.86#ibcon#about to read 6, iclass 36, count 2 2006.229.02:20:45.86#ibcon#read 6, iclass 36, count 2 2006.229.02:20:45.86#ibcon#end of sib2, iclass 36, count 2 2006.229.02:20:45.86#ibcon#*after write, iclass 36, count 2 2006.229.02:20:45.86#ibcon#*before return 0, iclass 36, count 2 2006.229.02:20:45.86#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:20:45.86#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:20:45.86#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.02:20:45.86#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:45.86#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:20:45.98#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:20:45.98#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:20:45.98#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:20:45.98#ibcon#first serial, iclass 36, count 0 2006.229.02:20:45.98#ibcon#enter sib2, iclass 36, count 0 2006.229.02:20:45.98#ibcon#flushed, iclass 36, count 0 2006.229.02:20:45.98#ibcon#about to write, iclass 36, count 0 2006.229.02:20:45.98#ibcon#wrote, iclass 36, count 0 2006.229.02:20:45.98#ibcon#about to read 3, iclass 36, count 0 2006.229.02:20:46.00#ibcon#read 3, iclass 36, count 0 2006.229.02:20:46.00#ibcon#about to read 4, iclass 36, count 0 2006.229.02:20:46.00#ibcon#read 4, iclass 36, count 0 2006.229.02:20:46.00#ibcon#about to read 5, iclass 36, count 0 2006.229.02:20:46.00#ibcon#read 5, iclass 36, count 0 2006.229.02:20:46.00#ibcon#about to read 6, iclass 36, count 0 2006.229.02:20:46.00#ibcon#read 6, iclass 36, count 0 2006.229.02:20:46.00#ibcon#end of sib2, iclass 36, count 0 2006.229.02:20:46.00#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:20:46.00#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:20:46.00#ibcon#[25=USB\r\n] 2006.229.02:20:46.00#ibcon#*before write, iclass 36, count 0 2006.229.02:20:46.00#ibcon#enter sib2, iclass 36, count 0 2006.229.02:20:46.00#ibcon#flushed, iclass 36, count 0 2006.229.02:20:46.00#ibcon#about to write, iclass 36, count 0 2006.229.02:20:46.00#ibcon#wrote, iclass 36, count 0 2006.229.02:20:46.00#ibcon#about to read 3, iclass 36, count 0 2006.229.02:20:46.03#ibcon#read 3, iclass 36, count 0 2006.229.02:20:46.03#ibcon#about to read 4, iclass 36, count 0 2006.229.02:20:46.03#ibcon#read 4, iclass 36, count 0 2006.229.02:20:46.03#ibcon#about to read 5, iclass 36, count 0 2006.229.02:20:46.03#ibcon#read 5, iclass 36, count 0 2006.229.02:20:46.03#ibcon#about to read 6, iclass 36, count 0 2006.229.02:20:46.03#ibcon#read 6, iclass 36, count 0 2006.229.02:20:46.03#ibcon#end of sib2, iclass 36, count 0 2006.229.02:20:46.03#ibcon#*after write, iclass 36, count 0 2006.229.02:20:46.03#ibcon#*before return 0, iclass 36, count 0 2006.229.02:20:46.03#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:20:46.03#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:20:46.03#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:20:46.03#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:20:46.03$vck44/valo=5,734.99 2006.229.02:20:46.03#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:20:46.03#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:20:46.03#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:46.03#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:20:46.03#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:20:46.03#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:20:46.03#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:20:46.03#ibcon#first serial, iclass 38, count 0 2006.229.02:20:46.03#ibcon#enter sib2, iclass 38, count 0 2006.229.02:20:46.03#ibcon#flushed, iclass 38, count 0 2006.229.02:20:46.03#ibcon#about to write, iclass 38, count 0 2006.229.02:20:46.03#ibcon#wrote, iclass 38, count 0 2006.229.02:20:46.03#ibcon#about to read 3, iclass 38, count 0 2006.229.02:20:46.05#ibcon#read 3, iclass 38, count 0 2006.229.02:20:46.05#ibcon#about to read 4, iclass 38, count 0 2006.229.02:20:46.05#ibcon#read 4, iclass 38, count 0 2006.229.02:20:46.05#ibcon#about to read 5, iclass 38, count 0 2006.229.02:20:46.05#ibcon#read 5, iclass 38, count 0 2006.229.02:20:46.05#ibcon#about to read 6, iclass 38, count 0 2006.229.02:20:46.05#ibcon#read 6, iclass 38, count 0 2006.229.02:20:46.05#ibcon#end of sib2, iclass 38, count 0 2006.229.02:20:46.05#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:20:46.05#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:20:46.05#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:20:46.05#ibcon#*before write, iclass 38, count 0 2006.229.02:20:46.05#ibcon#enter sib2, iclass 38, count 0 2006.229.02:20:46.05#ibcon#flushed, iclass 38, count 0 2006.229.02:20:46.05#ibcon#about to write, iclass 38, count 0 2006.229.02:20:46.05#ibcon#wrote, iclass 38, count 0 2006.229.02:20:46.05#ibcon#about to read 3, iclass 38, count 0 2006.229.02:20:46.09#ibcon#read 3, iclass 38, count 0 2006.229.02:20:46.09#ibcon#about to read 4, iclass 38, count 0 2006.229.02:20:46.09#ibcon#read 4, iclass 38, count 0 2006.229.02:20:46.09#ibcon#about to read 5, iclass 38, count 0 2006.229.02:20:46.09#ibcon#read 5, iclass 38, count 0 2006.229.02:20:46.09#ibcon#about to read 6, iclass 38, count 0 2006.229.02:20:46.09#ibcon#read 6, iclass 38, count 0 2006.229.02:20:46.09#ibcon#end of sib2, iclass 38, count 0 2006.229.02:20:46.09#ibcon#*after write, iclass 38, count 0 2006.229.02:20:46.09#ibcon#*before return 0, iclass 38, count 0 2006.229.02:20:46.09#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:20:46.09#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:20:46.09#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:20:46.09#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:20:46.09$vck44/va=5,4 2006.229.02:20:46.09#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.02:20:46.09#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.02:20:46.09#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:46.09#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:20:46.15#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:20:46.15#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:20:46.15#ibcon#enter wrdev, iclass 40, count 2 2006.229.02:20:46.15#ibcon#first serial, iclass 40, count 2 2006.229.02:20:46.15#ibcon#enter sib2, iclass 40, count 2 2006.229.02:20:46.15#ibcon#flushed, iclass 40, count 2 2006.229.02:20:46.15#ibcon#about to write, iclass 40, count 2 2006.229.02:20:46.15#ibcon#wrote, iclass 40, count 2 2006.229.02:20:46.15#ibcon#about to read 3, iclass 40, count 2 2006.229.02:20:46.17#ibcon#read 3, iclass 40, count 2 2006.229.02:20:46.17#ibcon#about to read 4, iclass 40, count 2 2006.229.02:20:46.17#ibcon#read 4, iclass 40, count 2 2006.229.02:20:46.17#ibcon#about to read 5, iclass 40, count 2 2006.229.02:20:46.17#ibcon#read 5, iclass 40, count 2 2006.229.02:20:46.17#ibcon#about to read 6, iclass 40, count 2 2006.229.02:20:46.17#ibcon#read 6, iclass 40, count 2 2006.229.02:20:46.17#ibcon#end of sib2, iclass 40, count 2 2006.229.02:20:46.17#ibcon#*mode == 0, iclass 40, count 2 2006.229.02:20:46.17#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.02:20:46.17#ibcon#[25=AT05-04\r\n] 2006.229.02:20:46.17#ibcon#*before write, iclass 40, count 2 2006.229.02:20:46.17#ibcon#enter sib2, iclass 40, count 2 2006.229.02:20:46.17#ibcon#flushed, iclass 40, count 2 2006.229.02:20:46.17#ibcon#about to write, iclass 40, count 2 2006.229.02:20:46.17#ibcon#wrote, iclass 40, count 2 2006.229.02:20:46.17#ibcon#about to read 3, iclass 40, count 2 2006.229.02:20:46.20#ibcon#read 3, iclass 40, count 2 2006.229.02:20:46.20#ibcon#about to read 4, iclass 40, count 2 2006.229.02:20:46.20#ibcon#read 4, iclass 40, count 2 2006.229.02:20:46.20#ibcon#about to read 5, iclass 40, count 2 2006.229.02:20:46.20#ibcon#read 5, iclass 40, count 2 2006.229.02:20:46.20#ibcon#about to read 6, iclass 40, count 2 2006.229.02:20:46.20#ibcon#read 6, iclass 40, count 2 2006.229.02:20:46.20#ibcon#end of sib2, iclass 40, count 2 2006.229.02:20:46.20#ibcon#*after write, iclass 40, count 2 2006.229.02:20:46.20#ibcon#*before return 0, iclass 40, count 2 2006.229.02:20:46.20#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:20:46.20#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:20:46.20#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.02:20:46.20#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:46.20#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:20:46.32#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:20:46.32#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:20:46.32#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:20:46.32#ibcon#first serial, iclass 40, count 0 2006.229.02:20:46.32#ibcon#enter sib2, iclass 40, count 0 2006.229.02:20:46.32#ibcon#flushed, iclass 40, count 0 2006.229.02:20:46.32#ibcon#about to write, iclass 40, count 0 2006.229.02:20:46.32#ibcon#wrote, iclass 40, count 0 2006.229.02:20:46.32#ibcon#about to read 3, iclass 40, count 0 2006.229.02:20:46.34#ibcon#read 3, iclass 40, count 0 2006.229.02:20:46.34#ibcon#about to read 4, iclass 40, count 0 2006.229.02:20:46.34#ibcon#read 4, iclass 40, count 0 2006.229.02:20:46.34#ibcon#about to read 5, iclass 40, count 0 2006.229.02:20:46.34#ibcon#read 5, iclass 40, count 0 2006.229.02:20:46.34#ibcon#about to read 6, iclass 40, count 0 2006.229.02:20:46.34#ibcon#read 6, iclass 40, count 0 2006.229.02:20:46.34#ibcon#end of sib2, iclass 40, count 0 2006.229.02:20:46.34#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:20:46.34#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:20:46.34#ibcon#[25=USB\r\n] 2006.229.02:20:46.34#ibcon#*before write, iclass 40, count 0 2006.229.02:20:46.34#ibcon#enter sib2, iclass 40, count 0 2006.229.02:20:46.34#ibcon#flushed, iclass 40, count 0 2006.229.02:20:46.34#ibcon#about to write, iclass 40, count 0 2006.229.02:20:46.34#ibcon#wrote, iclass 40, count 0 2006.229.02:20:46.34#ibcon#about to read 3, iclass 40, count 0 2006.229.02:20:46.37#ibcon#read 3, iclass 40, count 0 2006.229.02:20:46.37#ibcon#about to read 4, iclass 40, count 0 2006.229.02:20:46.37#ibcon#read 4, iclass 40, count 0 2006.229.02:20:46.37#ibcon#about to read 5, iclass 40, count 0 2006.229.02:20:46.37#ibcon#read 5, iclass 40, count 0 2006.229.02:20:46.37#ibcon#about to read 6, iclass 40, count 0 2006.229.02:20:46.37#ibcon#read 6, iclass 40, count 0 2006.229.02:20:46.37#ibcon#end of sib2, iclass 40, count 0 2006.229.02:20:46.37#ibcon#*after write, iclass 40, count 0 2006.229.02:20:46.37#ibcon#*before return 0, iclass 40, count 0 2006.229.02:20:46.37#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:20:46.37#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:20:46.37#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:20:46.37#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:20:46.37$vck44/valo=6,814.99 2006.229.02:20:46.37#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:20:46.37#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:20:46.37#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:46.37#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:46.37#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:46.37#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:46.37#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:20:46.37#ibcon#first serial, iclass 4, count 0 2006.229.02:20:46.37#ibcon#enter sib2, iclass 4, count 0 2006.229.02:20:46.37#ibcon#flushed, iclass 4, count 0 2006.229.02:20:46.37#ibcon#about to write, iclass 4, count 0 2006.229.02:20:46.37#ibcon#wrote, iclass 4, count 0 2006.229.02:20:46.37#ibcon#about to read 3, iclass 4, count 0 2006.229.02:20:46.39#ibcon#read 3, iclass 4, count 0 2006.229.02:20:46.39#ibcon#about to read 4, iclass 4, count 0 2006.229.02:20:46.39#ibcon#read 4, iclass 4, count 0 2006.229.02:20:46.39#ibcon#about to read 5, iclass 4, count 0 2006.229.02:20:46.39#ibcon#read 5, iclass 4, count 0 2006.229.02:20:46.39#ibcon#about to read 6, iclass 4, count 0 2006.229.02:20:46.39#ibcon#read 6, iclass 4, count 0 2006.229.02:20:46.39#ibcon#end of sib2, iclass 4, count 0 2006.229.02:20:46.39#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:20:46.39#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:20:46.39#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:20:46.39#ibcon#*before write, iclass 4, count 0 2006.229.02:20:46.39#ibcon#enter sib2, iclass 4, count 0 2006.229.02:20:46.39#ibcon#flushed, iclass 4, count 0 2006.229.02:20:46.39#ibcon#about to write, iclass 4, count 0 2006.229.02:20:46.39#ibcon#wrote, iclass 4, count 0 2006.229.02:20:46.39#ibcon#about to read 3, iclass 4, count 0 2006.229.02:20:46.43#ibcon#read 3, iclass 4, count 0 2006.229.02:20:46.43#ibcon#about to read 4, iclass 4, count 0 2006.229.02:20:46.43#ibcon#read 4, iclass 4, count 0 2006.229.02:20:46.43#ibcon#about to read 5, iclass 4, count 0 2006.229.02:20:46.43#ibcon#read 5, iclass 4, count 0 2006.229.02:20:46.43#ibcon#about to read 6, iclass 4, count 0 2006.229.02:20:46.43#ibcon#read 6, iclass 4, count 0 2006.229.02:20:46.43#ibcon#end of sib2, iclass 4, count 0 2006.229.02:20:46.43#ibcon#*after write, iclass 4, count 0 2006.229.02:20:46.43#ibcon#*before return 0, iclass 4, count 0 2006.229.02:20:46.43#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:46.43#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:46.43#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:20:46.43#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:20:46.43$vck44/va=6,4 2006.229.02:20:46.43#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:20:46.43#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:20:46.43#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:46.43#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:46.49#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:46.49#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:46.49#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:20:46.49#ibcon#first serial, iclass 6, count 2 2006.229.02:20:46.49#ibcon#enter sib2, iclass 6, count 2 2006.229.02:20:46.49#ibcon#flushed, iclass 6, count 2 2006.229.02:20:46.49#ibcon#about to write, iclass 6, count 2 2006.229.02:20:46.49#ibcon#wrote, iclass 6, count 2 2006.229.02:20:46.49#ibcon#about to read 3, iclass 6, count 2 2006.229.02:20:46.51#ibcon#read 3, iclass 6, count 2 2006.229.02:20:46.51#ibcon#about to read 4, iclass 6, count 2 2006.229.02:20:46.51#ibcon#read 4, iclass 6, count 2 2006.229.02:20:46.51#ibcon#about to read 5, iclass 6, count 2 2006.229.02:20:46.51#ibcon#read 5, iclass 6, count 2 2006.229.02:20:46.51#ibcon#about to read 6, iclass 6, count 2 2006.229.02:20:46.51#ibcon#read 6, iclass 6, count 2 2006.229.02:20:46.51#ibcon#end of sib2, iclass 6, count 2 2006.229.02:20:46.51#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:20:46.51#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:20:46.51#ibcon#[25=AT06-04\r\n] 2006.229.02:20:46.51#ibcon#*before write, iclass 6, count 2 2006.229.02:20:46.51#ibcon#enter sib2, iclass 6, count 2 2006.229.02:20:46.51#ibcon#flushed, iclass 6, count 2 2006.229.02:20:46.51#ibcon#about to write, iclass 6, count 2 2006.229.02:20:46.51#ibcon#wrote, iclass 6, count 2 2006.229.02:20:46.51#ibcon#about to read 3, iclass 6, count 2 2006.229.02:20:46.54#ibcon#read 3, iclass 6, count 2 2006.229.02:20:46.54#ibcon#about to read 4, iclass 6, count 2 2006.229.02:20:46.54#ibcon#read 4, iclass 6, count 2 2006.229.02:20:46.54#ibcon#about to read 5, iclass 6, count 2 2006.229.02:20:46.54#ibcon#read 5, iclass 6, count 2 2006.229.02:20:46.54#ibcon#about to read 6, iclass 6, count 2 2006.229.02:20:46.54#ibcon#read 6, iclass 6, count 2 2006.229.02:20:46.54#ibcon#end of sib2, iclass 6, count 2 2006.229.02:20:46.54#ibcon#*after write, iclass 6, count 2 2006.229.02:20:46.54#ibcon#*before return 0, iclass 6, count 2 2006.229.02:20:46.54#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:46.54#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:46.54#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:20:46.54#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:46.54#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:46.66#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:46.66#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:46.66#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:20:46.66#ibcon#first serial, iclass 6, count 0 2006.229.02:20:46.66#ibcon#enter sib2, iclass 6, count 0 2006.229.02:20:46.66#ibcon#flushed, iclass 6, count 0 2006.229.02:20:46.66#ibcon#about to write, iclass 6, count 0 2006.229.02:20:46.66#ibcon#wrote, iclass 6, count 0 2006.229.02:20:46.66#ibcon#about to read 3, iclass 6, count 0 2006.229.02:20:46.68#ibcon#read 3, iclass 6, count 0 2006.229.02:20:46.68#ibcon#about to read 4, iclass 6, count 0 2006.229.02:20:46.68#ibcon#read 4, iclass 6, count 0 2006.229.02:20:46.68#ibcon#about to read 5, iclass 6, count 0 2006.229.02:20:46.68#ibcon#read 5, iclass 6, count 0 2006.229.02:20:46.68#ibcon#about to read 6, iclass 6, count 0 2006.229.02:20:46.68#ibcon#read 6, iclass 6, count 0 2006.229.02:20:46.68#ibcon#end of sib2, iclass 6, count 0 2006.229.02:20:46.68#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:20:46.68#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:20:46.68#ibcon#[25=USB\r\n] 2006.229.02:20:46.68#ibcon#*before write, iclass 6, count 0 2006.229.02:20:46.68#ibcon#enter sib2, iclass 6, count 0 2006.229.02:20:46.68#ibcon#flushed, iclass 6, count 0 2006.229.02:20:46.68#ibcon#about to write, iclass 6, count 0 2006.229.02:20:46.68#ibcon#wrote, iclass 6, count 0 2006.229.02:20:46.68#ibcon#about to read 3, iclass 6, count 0 2006.229.02:20:46.71#ibcon#read 3, iclass 6, count 0 2006.229.02:20:46.71#ibcon#about to read 4, iclass 6, count 0 2006.229.02:20:46.71#ibcon#read 4, iclass 6, count 0 2006.229.02:20:46.71#ibcon#about to read 5, iclass 6, count 0 2006.229.02:20:46.71#ibcon#read 5, iclass 6, count 0 2006.229.02:20:46.71#ibcon#about to read 6, iclass 6, count 0 2006.229.02:20:46.71#ibcon#read 6, iclass 6, count 0 2006.229.02:20:46.71#ibcon#end of sib2, iclass 6, count 0 2006.229.02:20:46.71#ibcon#*after write, iclass 6, count 0 2006.229.02:20:46.71#ibcon#*before return 0, iclass 6, count 0 2006.229.02:20:46.71#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:46.71#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:46.71#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:20:46.71#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:20:46.71$vck44/valo=7,864.99 2006.229.02:20:46.71#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:20:46.71#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:20:46.71#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:46.71#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:46.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:46.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:46.71#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:20:46.71#ibcon#first serial, iclass 10, count 0 2006.229.02:20:46.71#ibcon#enter sib2, iclass 10, count 0 2006.229.02:20:46.71#ibcon#flushed, iclass 10, count 0 2006.229.02:20:46.71#ibcon#about to write, iclass 10, count 0 2006.229.02:20:46.71#ibcon#wrote, iclass 10, count 0 2006.229.02:20:46.71#ibcon#about to read 3, iclass 10, count 0 2006.229.02:20:46.73#ibcon#read 3, iclass 10, count 0 2006.229.02:20:46.73#ibcon#about to read 4, iclass 10, count 0 2006.229.02:20:46.73#ibcon#read 4, iclass 10, count 0 2006.229.02:20:46.73#ibcon#about to read 5, iclass 10, count 0 2006.229.02:20:46.73#ibcon#read 5, iclass 10, count 0 2006.229.02:20:46.73#ibcon#about to read 6, iclass 10, count 0 2006.229.02:20:46.73#ibcon#read 6, iclass 10, count 0 2006.229.02:20:46.73#ibcon#end of sib2, iclass 10, count 0 2006.229.02:20:46.73#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:20:46.73#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:20:46.73#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:20:46.73#ibcon#*before write, iclass 10, count 0 2006.229.02:20:46.73#ibcon#enter sib2, iclass 10, count 0 2006.229.02:20:46.73#ibcon#flushed, iclass 10, count 0 2006.229.02:20:46.73#ibcon#about to write, iclass 10, count 0 2006.229.02:20:46.73#ibcon#wrote, iclass 10, count 0 2006.229.02:20:46.73#ibcon#about to read 3, iclass 10, count 0 2006.229.02:20:46.77#ibcon#read 3, iclass 10, count 0 2006.229.02:20:46.77#ibcon#about to read 4, iclass 10, count 0 2006.229.02:20:46.77#ibcon#read 4, iclass 10, count 0 2006.229.02:20:46.77#ibcon#about to read 5, iclass 10, count 0 2006.229.02:20:46.77#ibcon#read 5, iclass 10, count 0 2006.229.02:20:46.77#ibcon#about to read 6, iclass 10, count 0 2006.229.02:20:46.77#ibcon#read 6, iclass 10, count 0 2006.229.02:20:46.77#ibcon#end of sib2, iclass 10, count 0 2006.229.02:20:46.77#ibcon#*after write, iclass 10, count 0 2006.229.02:20:46.77#ibcon#*before return 0, iclass 10, count 0 2006.229.02:20:46.77#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:46.77#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:46.77#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:20:46.77#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:20:46.77$vck44/va=7,5 2006.229.02:20:46.77#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:20:46.77#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:20:46.77#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:46.77#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:46.83#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:46.83#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:46.83#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:20:46.83#ibcon#first serial, iclass 12, count 2 2006.229.02:20:46.83#ibcon#enter sib2, iclass 12, count 2 2006.229.02:20:46.83#ibcon#flushed, iclass 12, count 2 2006.229.02:20:46.83#ibcon#about to write, iclass 12, count 2 2006.229.02:20:46.83#ibcon#wrote, iclass 12, count 2 2006.229.02:20:46.83#ibcon#about to read 3, iclass 12, count 2 2006.229.02:20:46.85#ibcon#read 3, iclass 12, count 2 2006.229.02:20:46.85#ibcon#about to read 4, iclass 12, count 2 2006.229.02:20:46.85#ibcon#read 4, iclass 12, count 2 2006.229.02:20:46.85#ibcon#about to read 5, iclass 12, count 2 2006.229.02:20:46.85#ibcon#read 5, iclass 12, count 2 2006.229.02:20:46.85#ibcon#about to read 6, iclass 12, count 2 2006.229.02:20:46.85#ibcon#read 6, iclass 12, count 2 2006.229.02:20:46.85#ibcon#end of sib2, iclass 12, count 2 2006.229.02:20:46.85#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:20:46.85#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:20:46.85#ibcon#[25=AT07-05\r\n] 2006.229.02:20:46.85#ibcon#*before write, iclass 12, count 2 2006.229.02:20:46.85#ibcon#enter sib2, iclass 12, count 2 2006.229.02:20:46.85#ibcon#flushed, iclass 12, count 2 2006.229.02:20:46.85#ibcon#about to write, iclass 12, count 2 2006.229.02:20:46.85#ibcon#wrote, iclass 12, count 2 2006.229.02:20:46.85#ibcon#about to read 3, iclass 12, count 2 2006.229.02:20:46.88#ibcon#read 3, iclass 12, count 2 2006.229.02:20:46.88#ibcon#about to read 4, iclass 12, count 2 2006.229.02:20:46.88#ibcon#read 4, iclass 12, count 2 2006.229.02:20:46.88#ibcon#about to read 5, iclass 12, count 2 2006.229.02:20:46.88#ibcon#read 5, iclass 12, count 2 2006.229.02:20:46.88#ibcon#about to read 6, iclass 12, count 2 2006.229.02:20:46.88#ibcon#read 6, iclass 12, count 2 2006.229.02:20:46.88#ibcon#end of sib2, iclass 12, count 2 2006.229.02:20:46.88#ibcon#*after write, iclass 12, count 2 2006.229.02:20:46.88#ibcon#*before return 0, iclass 12, count 2 2006.229.02:20:46.88#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:46.88#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:46.88#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:20:46.88#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:46.88#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:47.00#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:47.00#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:47.00#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:20:47.00#ibcon#first serial, iclass 12, count 0 2006.229.02:20:47.00#ibcon#enter sib2, iclass 12, count 0 2006.229.02:20:47.00#ibcon#flushed, iclass 12, count 0 2006.229.02:20:47.00#ibcon#about to write, iclass 12, count 0 2006.229.02:20:47.00#ibcon#wrote, iclass 12, count 0 2006.229.02:20:47.00#ibcon#about to read 3, iclass 12, count 0 2006.229.02:20:47.02#ibcon#read 3, iclass 12, count 0 2006.229.02:20:47.02#ibcon#about to read 4, iclass 12, count 0 2006.229.02:20:47.02#ibcon#read 4, iclass 12, count 0 2006.229.02:20:47.02#ibcon#about to read 5, iclass 12, count 0 2006.229.02:20:47.02#ibcon#read 5, iclass 12, count 0 2006.229.02:20:47.02#ibcon#about to read 6, iclass 12, count 0 2006.229.02:20:47.02#ibcon#read 6, iclass 12, count 0 2006.229.02:20:47.02#ibcon#end of sib2, iclass 12, count 0 2006.229.02:20:47.02#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:20:47.02#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:20:47.02#ibcon#[25=USB\r\n] 2006.229.02:20:47.02#ibcon#*before write, iclass 12, count 0 2006.229.02:20:47.02#ibcon#enter sib2, iclass 12, count 0 2006.229.02:20:47.02#ibcon#flushed, iclass 12, count 0 2006.229.02:20:47.02#ibcon#about to write, iclass 12, count 0 2006.229.02:20:47.02#ibcon#wrote, iclass 12, count 0 2006.229.02:20:47.02#ibcon#about to read 3, iclass 12, count 0 2006.229.02:20:47.05#ibcon#read 3, iclass 12, count 0 2006.229.02:20:47.05#ibcon#about to read 4, iclass 12, count 0 2006.229.02:20:47.05#ibcon#read 4, iclass 12, count 0 2006.229.02:20:47.05#ibcon#about to read 5, iclass 12, count 0 2006.229.02:20:47.05#ibcon#read 5, iclass 12, count 0 2006.229.02:20:47.05#ibcon#about to read 6, iclass 12, count 0 2006.229.02:20:47.05#ibcon#read 6, iclass 12, count 0 2006.229.02:20:47.05#ibcon#end of sib2, iclass 12, count 0 2006.229.02:20:47.05#ibcon#*after write, iclass 12, count 0 2006.229.02:20:47.05#ibcon#*before return 0, iclass 12, count 0 2006.229.02:20:47.05#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:47.05#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:47.05#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:20:47.05#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:20:47.05$vck44/valo=8,884.99 2006.229.02:20:47.05#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:20:47.05#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:20:47.05#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:47.05#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:47.05#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:47.05#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:47.05#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:20:47.05#ibcon#first serial, iclass 14, count 0 2006.229.02:20:47.05#ibcon#enter sib2, iclass 14, count 0 2006.229.02:20:47.05#ibcon#flushed, iclass 14, count 0 2006.229.02:20:47.05#ibcon#about to write, iclass 14, count 0 2006.229.02:20:47.05#ibcon#wrote, iclass 14, count 0 2006.229.02:20:47.05#ibcon#about to read 3, iclass 14, count 0 2006.229.02:20:47.07#ibcon#read 3, iclass 14, count 0 2006.229.02:20:47.07#ibcon#about to read 4, iclass 14, count 0 2006.229.02:20:47.07#ibcon#read 4, iclass 14, count 0 2006.229.02:20:47.07#ibcon#about to read 5, iclass 14, count 0 2006.229.02:20:47.07#ibcon#read 5, iclass 14, count 0 2006.229.02:20:47.07#ibcon#about to read 6, iclass 14, count 0 2006.229.02:20:47.07#ibcon#read 6, iclass 14, count 0 2006.229.02:20:47.07#ibcon#end of sib2, iclass 14, count 0 2006.229.02:20:47.07#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:20:47.07#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:20:47.07#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:20:47.07#ibcon#*before write, iclass 14, count 0 2006.229.02:20:47.07#ibcon#enter sib2, iclass 14, count 0 2006.229.02:20:47.07#ibcon#flushed, iclass 14, count 0 2006.229.02:20:47.07#ibcon#about to write, iclass 14, count 0 2006.229.02:20:47.07#ibcon#wrote, iclass 14, count 0 2006.229.02:20:47.07#ibcon#about to read 3, iclass 14, count 0 2006.229.02:20:47.11#ibcon#read 3, iclass 14, count 0 2006.229.02:20:47.11#ibcon#about to read 4, iclass 14, count 0 2006.229.02:20:47.11#ibcon#read 4, iclass 14, count 0 2006.229.02:20:47.11#ibcon#about to read 5, iclass 14, count 0 2006.229.02:20:47.11#ibcon#read 5, iclass 14, count 0 2006.229.02:20:47.11#ibcon#about to read 6, iclass 14, count 0 2006.229.02:20:47.11#ibcon#read 6, iclass 14, count 0 2006.229.02:20:47.11#ibcon#end of sib2, iclass 14, count 0 2006.229.02:20:47.11#ibcon#*after write, iclass 14, count 0 2006.229.02:20:47.11#ibcon#*before return 0, iclass 14, count 0 2006.229.02:20:47.11#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:47.11#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:47.11#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:20:47.11#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:20:47.11$vck44/va=8,6 2006.229.02:20:47.11#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:20:47.11#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:20:47.11#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:47.11#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:47.17#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:47.17#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:47.17#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:20:47.17#ibcon#first serial, iclass 16, count 2 2006.229.02:20:47.17#ibcon#enter sib2, iclass 16, count 2 2006.229.02:20:47.17#ibcon#flushed, iclass 16, count 2 2006.229.02:20:47.17#ibcon#about to write, iclass 16, count 2 2006.229.02:20:47.17#ibcon#wrote, iclass 16, count 2 2006.229.02:20:47.17#ibcon#about to read 3, iclass 16, count 2 2006.229.02:20:47.19#ibcon#read 3, iclass 16, count 2 2006.229.02:20:47.19#ibcon#about to read 4, iclass 16, count 2 2006.229.02:20:47.19#ibcon#read 4, iclass 16, count 2 2006.229.02:20:47.19#ibcon#about to read 5, iclass 16, count 2 2006.229.02:20:47.19#ibcon#read 5, iclass 16, count 2 2006.229.02:20:47.19#ibcon#about to read 6, iclass 16, count 2 2006.229.02:20:47.19#ibcon#read 6, iclass 16, count 2 2006.229.02:20:47.19#ibcon#end of sib2, iclass 16, count 2 2006.229.02:20:47.19#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:20:47.19#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:20:47.19#ibcon#[25=AT08-06\r\n] 2006.229.02:20:47.19#ibcon#*before write, iclass 16, count 2 2006.229.02:20:47.19#ibcon#enter sib2, iclass 16, count 2 2006.229.02:20:47.19#ibcon#flushed, iclass 16, count 2 2006.229.02:20:47.19#ibcon#about to write, iclass 16, count 2 2006.229.02:20:47.19#ibcon#wrote, iclass 16, count 2 2006.229.02:20:47.19#ibcon#about to read 3, iclass 16, count 2 2006.229.02:20:47.22#ibcon#read 3, iclass 16, count 2 2006.229.02:20:47.22#ibcon#about to read 4, iclass 16, count 2 2006.229.02:20:47.22#ibcon#read 4, iclass 16, count 2 2006.229.02:20:47.22#ibcon#about to read 5, iclass 16, count 2 2006.229.02:20:47.22#ibcon#read 5, iclass 16, count 2 2006.229.02:20:47.22#ibcon#about to read 6, iclass 16, count 2 2006.229.02:20:47.22#ibcon#read 6, iclass 16, count 2 2006.229.02:20:47.22#ibcon#end of sib2, iclass 16, count 2 2006.229.02:20:47.22#ibcon#*after write, iclass 16, count 2 2006.229.02:20:47.22#ibcon#*before return 0, iclass 16, count 2 2006.229.02:20:47.22#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:47.22#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:47.22#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:20:47.22#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:47.22#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:47.34#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:47.34#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:47.34#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:20:47.34#ibcon#first serial, iclass 16, count 0 2006.229.02:20:47.34#ibcon#enter sib2, iclass 16, count 0 2006.229.02:20:47.34#ibcon#flushed, iclass 16, count 0 2006.229.02:20:47.34#ibcon#about to write, iclass 16, count 0 2006.229.02:20:47.34#ibcon#wrote, iclass 16, count 0 2006.229.02:20:47.34#ibcon#about to read 3, iclass 16, count 0 2006.229.02:20:47.36#ibcon#read 3, iclass 16, count 0 2006.229.02:20:47.36#ibcon#about to read 4, iclass 16, count 0 2006.229.02:20:47.36#ibcon#read 4, iclass 16, count 0 2006.229.02:20:47.36#ibcon#about to read 5, iclass 16, count 0 2006.229.02:20:47.36#ibcon#read 5, iclass 16, count 0 2006.229.02:20:47.36#ibcon#about to read 6, iclass 16, count 0 2006.229.02:20:47.36#ibcon#read 6, iclass 16, count 0 2006.229.02:20:47.36#ibcon#end of sib2, iclass 16, count 0 2006.229.02:20:47.36#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:20:47.36#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:20:47.36#ibcon#[25=USB\r\n] 2006.229.02:20:47.36#ibcon#*before write, iclass 16, count 0 2006.229.02:20:47.36#ibcon#enter sib2, iclass 16, count 0 2006.229.02:20:47.36#ibcon#flushed, iclass 16, count 0 2006.229.02:20:47.36#ibcon#about to write, iclass 16, count 0 2006.229.02:20:47.36#ibcon#wrote, iclass 16, count 0 2006.229.02:20:47.36#ibcon#about to read 3, iclass 16, count 0 2006.229.02:20:47.39#ibcon#read 3, iclass 16, count 0 2006.229.02:20:47.39#ibcon#about to read 4, iclass 16, count 0 2006.229.02:20:47.39#ibcon#read 4, iclass 16, count 0 2006.229.02:20:47.39#ibcon#about to read 5, iclass 16, count 0 2006.229.02:20:47.39#ibcon#read 5, iclass 16, count 0 2006.229.02:20:47.39#ibcon#about to read 6, iclass 16, count 0 2006.229.02:20:47.39#ibcon#read 6, iclass 16, count 0 2006.229.02:20:47.39#ibcon#end of sib2, iclass 16, count 0 2006.229.02:20:47.39#ibcon#*after write, iclass 16, count 0 2006.229.02:20:47.39#ibcon#*before return 0, iclass 16, count 0 2006.229.02:20:47.39#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:47.39#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:47.39#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:20:47.39#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:20:47.39$vck44/vblo=1,629.99 2006.229.02:20:47.39#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:20:47.39#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:20:47.39#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:47.39#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:47.39#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:47.39#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:47.39#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:20:47.39#ibcon#first serial, iclass 18, count 0 2006.229.02:20:47.39#ibcon#enter sib2, iclass 18, count 0 2006.229.02:20:47.39#ibcon#flushed, iclass 18, count 0 2006.229.02:20:47.39#ibcon#about to write, iclass 18, count 0 2006.229.02:20:47.39#ibcon#wrote, iclass 18, count 0 2006.229.02:20:47.39#ibcon#about to read 3, iclass 18, count 0 2006.229.02:20:47.41#ibcon#read 3, iclass 18, count 0 2006.229.02:20:47.41#ibcon#about to read 4, iclass 18, count 0 2006.229.02:20:47.41#ibcon#read 4, iclass 18, count 0 2006.229.02:20:47.41#ibcon#about to read 5, iclass 18, count 0 2006.229.02:20:47.41#ibcon#read 5, iclass 18, count 0 2006.229.02:20:47.41#ibcon#about to read 6, iclass 18, count 0 2006.229.02:20:47.41#ibcon#read 6, iclass 18, count 0 2006.229.02:20:47.41#ibcon#end of sib2, iclass 18, count 0 2006.229.02:20:47.41#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:20:47.41#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:20:47.41#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:20:47.41#ibcon#*before write, iclass 18, count 0 2006.229.02:20:47.41#ibcon#enter sib2, iclass 18, count 0 2006.229.02:20:47.41#ibcon#flushed, iclass 18, count 0 2006.229.02:20:47.41#ibcon#about to write, iclass 18, count 0 2006.229.02:20:47.41#ibcon#wrote, iclass 18, count 0 2006.229.02:20:47.41#ibcon#about to read 3, iclass 18, count 0 2006.229.02:20:47.45#ibcon#read 3, iclass 18, count 0 2006.229.02:20:47.45#ibcon#about to read 4, iclass 18, count 0 2006.229.02:20:47.45#ibcon#read 4, iclass 18, count 0 2006.229.02:20:47.45#ibcon#about to read 5, iclass 18, count 0 2006.229.02:20:47.45#ibcon#read 5, iclass 18, count 0 2006.229.02:20:47.45#ibcon#about to read 6, iclass 18, count 0 2006.229.02:20:47.45#ibcon#read 6, iclass 18, count 0 2006.229.02:20:47.45#ibcon#end of sib2, iclass 18, count 0 2006.229.02:20:47.45#ibcon#*after write, iclass 18, count 0 2006.229.02:20:47.45#ibcon#*before return 0, iclass 18, count 0 2006.229.02:20:47.45#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:47.45#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:47.45#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:20:47.45#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:20:47.45$vck44/vb=1,4 2006.229.02:20:47.45#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.02:20:47.45#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.02:20:47.45#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:47.45#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:20:47.45#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:20:47.45#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:20:47.45#ibcon#enter wrdev, iclass 20, count 2 2006.229.02:20:47.45#ibcon#first serial, iclass 20, count 2 2006.229.02:20:47.45#ibcon#enter sib2, iclass 20, count 2 2006.229.02:20:47.45#ibcon#flushed, iclass 20, count 2 2006.229.02:20:47.45#ibcon#about to write, iclass 20, count 2 2006.229.02:20:47.45#ibcon#wrote, iclass 20, count 2 2006.229.02:20:47.45#ibcon#about to read 3, iclass 20, count 2 2006.229.02:20:47.47#ibcon#read 3, iclass 20, count 2 2006.229.02:20:47.47#ibcon#about to read 4, iclass 20, count 2 2006.229.02:20:47.47#ibcon#read 4, iclass 20, count 2 2006.229.02:20:47.47#ibcon#about to read 5, iclass 20, count 2 2006.229.02:20:47.47#ibcon#read 5, iclass 20, count 2 2006.229.02:20:47.47#ibcon#about to read 6, iclass 20, count 2 2006.229.02:20:47.47#ibcon#read 6, iclass 20, count 2 2006.229.02:20:47.47#ibcon#end of sib2, iclass 20, count 2 2006.229.02:20:47.47#ibcon#*mode == 0, iclass 20, count 2 2006.229.02:20:47.47#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.02:20:47.47#ibcon#[27=AT01-04\r\n] 2006.229.02:20:47.47#ibcon#*before write, iclass 20, count 2 2006.229.02:20:47.47#ibcon#enter sib2, iclass 20, count 2 2006.229.02:20:47.47#ibcon#flushed, iclass 20, count 2 2006.229.02:20:47.47#ibcon#about to write, iclass 20, count 2 2006.229.02:20:47.47#ibcon#wrote, iclass 20, count 2 2006.229.02:20:47.47#ibcon#about to read 3, iclass 20, count 2 2006.229.02:20:47.50#ibcon#read 3, iclass 20, count 2 2006.229.02:20:47.50#ibcon#about to read 4, iclass 20, count 2 2006.229.02:20:47.50#ibcon#read 4, iclass 20, count 2 2006.229.02:20:47.50#ibcon#about to read 5, iclass 20, count 2 2006.229.02:20:47.50#ibcon#read 5, iclass 20, count 2 2006.229.02:20:47.50#ibcon#about to read 6, iclass 20, count 2 2006.229.02:20:47.50#ibcon#read 6, iclass 20, count 2 2006.229.02:20:47.50#ibcon#end of sib2, iclass 20, count 2 2006.229.02:20:47.50#ibcon#*after write, iclass 20, count 2 2006.229.02:20:47.50#ibcon#*before return 0, iclass 20, count 2 2006.229.02:20:47.50#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:20:47.50#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:20:47.50#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.02:20:47.50#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:47.50#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:20:47.62#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:20:47.62#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:20:47.62#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:20:47.62#ibcon#first serial, iclass 20, count 0 2006.229.02:20:47.62#ibcon#enter sib2, iclass 20, count 0 2006.229.02:20:47.62#ibcon#flushed, iclass 20, count 0 2006.229.02:20:47.62#ibcon#about to write, iclass 20, count 0 2006.229.02:20:47.62#ibcon#wrote, iclass 20, count 0 2006.229.02:20:47.62#ibcon#about to read 3, iclass 20, count 0 2006.229.02:20:47.64#ibcon#read 3, iclass 20, count 0 2006.229.02:20:47.64#ibcon#about to read 4, iclass 20, count 0 2006.229.02:20:47.64#ibcon#read 4, iclass 20, count 0 2006.229.02:20:47.64#ibcon#about to read 5, iclass 20, count 0 2006.229.02:20:47.64#ibcon#read 5, iclass 20, count 0 2006.229.02:20:47.64#ibcon#about to read 6, iclass 20, count 0 2006.229.02:20:47.64#ibcon#read 6, iclass 20, count 0 2006.229.02:20:47.64#ibcon#end of sib2, iclass 20, count 0 2006.229.02:20:47.64#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:20:47.64#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:20:47.64#ibcon#[27=USB\r\n] 2006.229.02:20:47.64#ibcon#*before write, iclass 20, count 0 2006.229.02:20:47.64#ibcon#enter sib2, iclass 20, count 0 2006.229.02:20:47.64#ibcon#flushed, iclass 20, count 0 2006.229.02:20:47.64#ibcon#about to write, iclass 20, count 0 2006.229.02:20:47.64#ibcon#wrote, iclass 20, count 0 2006.229.02:20:47.64#ibcon#about to read 3, iclass 20, count 0 2006.229.02:20:47.67#ibcon#read 3, iclass 20, count 0 2006.229.02:20:47.67#ibcon#about to read 4, iclass 20, count 0 2006.229.02:20:47.67#ibcon#read 4, iclass 20, count 0 2006.229.02:20:47.67#ibcon#about to read 5, iclass 20, count 0 2006.229.02:20:47.67#ibcon#read 5, iclass 20, count 0 2006.229.02:20:47.67#ibcon#about to read 6, iclass 20, count 0 2006.229.02:20:47.67#ibcon#read 6, iclass 20, count 0 2006.229.02:20:47.67#ibcon#end of sib2, iclass 20, count 0 2006.229.02:20:47.67#ibcon#*after write, iclass 20, count 0 2006.229.02:20:47.67#ibcon#*before return 0, iclass 20, count 0 2006.229.02:20:47.67#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:20:47.67#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:20:47.67#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:20:47.67#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:20:47.67$vck44/vblo=2,634.99 2006.229.02:20:47.67#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:20:47.67#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:20:47.67#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:47.67#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:47.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:47.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:47.67#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:20:47.67#ibcon#first serial, iclass 22, count 0 2006.229.02:20:47.67#ibcon#enter sib2, iclass 22, count 0 2006.229.02:20:47.67#ibcon#flushed, iclass 22, count 0 2006.229.02:20:47.67#ibcon#about to write, iclass 22, count 0 2006.229.02:20:47.67#ibcon#wrote, iclass 22, count 0 2006.229.02:20:47.67#ibcon#about to read 3, iclass 22, count 0 2006.229.02:20:47.69#ibcon#read 3, iclass 22, count 0 2006.229.02:20:47.69#ibcon#about to read 4, iclass 22, count 0 2006.229.02:20:47.69#ibcon#read 4, iclass 22, count 0 2006.229.02:20:47.69#ibcon#about to read 5, iclass 22, count 0 2006.229.02:20:47.69#ibcon#read 5, iclass 22, count 0 2006.229.02:20:47.69#ibcon#about to read 6, iclass 22, count 0 2006.229.02:20:47.69#ibcon#read 6, iclass 22, count 0 2006.229.02:20:47.69#ibcon#end of sib2, iclass 22, count 0 2006.229.02:20:47.69#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:20:47.69#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:20:47.69#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:20:47.69#ibcon#*before write, iclass 22, count 0 2006.229.02:20:47.69#ibcon#enter sib2, iclass 22, count 0 2006.229.02:20:47.69#ibcon#flushed, iclass 22, count 0 2006.229.02:20:47.69#ibcon#about to write, iclass 22, count 0 2006.229.02:20:47.69#ibcon#wrote, iclass 22, count 0 2006.229.02:20:47.69#ibcon#about to read 3, iclass 22, count 0 2006.229.02:20:47.73#ibcon#read 3, iclass 22, count 0 2006.229.02:20:47.73#ibcon#about to read 4, iclass 22, count 0 2006.229.02:20:47.73#ibcon#read 4, iclass 22, count 0 2006.229.02:20:47.73#ibcon#about to read 5, iclass 22, count 0 2006.229.02:20:47.73#ibcon#read 5, iclass 22, count 0 2006.229.02:20:47.73#ibcon#about to read 6, iclass 22, count 0 2006.229.02:20:47.73#ibcon#read 6, iclass 22, count 0 2006.229.02:20:47.73#ibcon#end of sib2, iclass 22, count 0 2006.229.02:20:47.73#ibcon#*after write, iclass 22, count 0 2006.229.02:20:47.73#ibcon#*before return 0, iclass 22, count 0 2006.229.02:20:47.73#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:47.73#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:20:47.73#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:20:47.73#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:20:47.73$vck44/vb=2,4 2006.229.02:20:47.73#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.02:20:47.73#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.02:20:47.73#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:47.73#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:47.79#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:47.79#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:47.79#ibcon#enter wrdev, iclass 24, count 2 2006.229.02:20:47.79#ibcon#first serial, iclass 24, count 2 2006.229.02:20:47.79#ibcon#enter sib2, iclass 24, count 2 2006.229.02:20:47.79#ibcon#flushed, iclass 24, count 2 2006.229.02:20:47.79#ibcon#about to write, iclass 24, count 2 2006.229.02:20:47.79#ibcon#wrote, iclass 24, count 2 2006.229.02:20:47.79#ibcon#about to read 3, iclass 24, count 2 2006.229.02:20:47.81#ibcon#read 3, iclass 24, count 2 2006.229.02:20:47.81#ibcon#about to read 4, iclass 24, count 2 2006.229.02:20:47.81#ibcon#read 4, iclass 24, count 2 2006.229.02:20:47.81#ibcon#about to read 5, iclass 24, count 2 2006.229.02:20:47.81#ibcon#read 5, iclass 24, count 2 2006.229.02:20:47.81#ibcon#about to read 6, iclass 24, count 2 2006.229.02:20:47.81#ibcon#read 6, iclass 24, count 2 2006.229.02:20:47.81#ibcon#end of sib2, iclass 24, count 2 2006.229.02:20:47.81#ibcon#*mode == 0, iclass 24, count 2 2006.229.02:20:47.81#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.02:20:47.81#ibcon#[27=AT02-04\r\n] 2006.229.02:20:47.81#ibcon#*before write, iclass 24, count 2 2006.229.02:20:47.81#ibcon#enter sib2, iclass 24, count 2 2006.229.02:20:47.81#ibcon#flushed, iclass 24, count 2 2006.229.02:20:47.81#ibcon#about to write, iclass 24, count 2 2006.229.02:20:47.81#ibcon#wrote, iclass 24, count 2 2006.229.02:20:47.81#ibcon#about to read 3, iclass 24, count 2 2006.229.02:20:47.84#ibcon#read 3, iclass 24, count 2 2006.229.02:20:47.84#ibcon#about to read 4, iclass 24, count 2 2006.229.02:20:47.84#ibcon#read 4, iclass 24, count 2 2006.229.02:20:47.84#ibcon#about to read 5, iclass 24, count 2 2006.229.02:20:47.84#ibcon#read 5, iclass 24, count 2 2006.229.02:20:47.84#ibcon#about to read 6, iclass 24, count 2 2006.229.02:20:47.84#ibcon#read 6, iclass 24, count 2 2006.229.02:20:47.84#ibcon#end of sib2, iclass 24, count 2 2006.229.02:20:47.84#ibcon#*after write, iclass 24, count 2 2006.229.02:20:47.84#ibcon#*before return 0, iclass 24, count 2 2006.229.02:20:47.84#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:47.84#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:20:47.84#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.02:20:47.84#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:47.84#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:47.96#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:47.96#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:47.96#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:20:47.96#ibcon#first serial, iclass 24, count 0 2006.229.02:20:47.96#ibcon#enter sib2, iclass 24, count 0 2006.229.02:20:47.96#ibcon#flushed, iclass 24, count 0 2006.229.02:20:47.96#ibcon#about to write, iclass 24, count 0 2006.229.02:20:47.96#ibcon#wrote, iclass 24, count 0 2006.229.02:20:47.96#ibcon#about to read 3, iclass 24, count 0 2006.229.02:20:47.98#ibcon#read 3, iclass 24, count 0 2006.229.02:20:47.98#ibcon#about to read 4, iclass 24, count 0 2006.229.02:20:47.98#ibcon#read 4, iclass 24, count 0 2006.229.02:20:47.98#ibcon#about to read 5, iclass 24, count 0 2006.229.02:20:47.98#ibcon#read 5, iclass 24, count 0 2006.229.02:20:47.98#ibcon#about to read 6, iclass 24, count 0 2006.229.02:20:47.98#ibcon#read 6, iclass 24, count 0 2006.229.02:20:47.98#ibcon#end of sib2, iclass 24, count 0 2006.229.02:20:47.98#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:20:47.98#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:20:47.98#ibcon#[27=USB\r\n] 2006.229.02:20:47.98#ibcon#*before write, iclass 24, count 0 2006.229.02:20:47.98#ibcon#enter sib2, iclass 24, count 0 2006.229.02:20:47.98#ibcon#flushed, iclass 24, count 0 2006.229.02:20:47.98#ibcon#about to write, iclass 24, count 0 2006.229.02:20:47.98#ibcon#wrote, iclass 24, count 0 2006.229.02:20:47.98#ibcon#about to read 3, iclass 24, count 0 2006.229.02:20:48.01#ibcon#read 3, iclass 24, count 0 2006.229.02:20:48.01#ibcon#about to read 4, iclass 24, count 0 2006.229.02:20:48.01#ibcon#read 4, iclass 24, count 0 2006.229.02:20:48.01#ibcon#about to read 5, iclass 24, count 0 2006.229.02:20:48.01#ibcon#read 5, iclass 24, count 0 2006.229.02:20:48.01#ibcon#about to read 6, iclass 24, count 0 2006.229.02:20:48.01#ibcon#read 6, iclass 24, count 0 2006.229.02:20:48.01#ibcon#end of sib2, iclass 24, count 0 2006.229.02:20:48.01#ibcon#*after write, iclass 24, count 0 2006.229.02:20:48.01#ibcon#*before return 0, iclass 24, count 0 2006.229.02:20:48.01#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:48.01#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:20:48.01#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:20:48.01#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:20:48.01$vck44/vblo=3,649.99 2006.229.02:20:48.01#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:20:48.01#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:20:48.01#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:48.01#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:48.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:48.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:48.01#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:20:48.01#ibcon#first serial, iclass 26, count 0 2006.229.02:20:48.01#ibcon#enter sib2, iclass 26, count 0 2006.229.02:20:48.01#ibcon#flushed, iclass 26, count 0 2006.229.02:20:48.01#ibcon#about to write, iclass 26, count 0 2006.229.02:20:48.01#ibcon#wrote, iclass 26, count 0 2006.229.02:20:48.01#ibcon#about to read 3, iclass 26, count 0 2006.229.02:20:48.03#ibcon#read 3, iclass 26, count 0 2006.229.02:20:48.03#ibcon#about to read 4, iclass 26, count 0 2006.229.02:20:48.03#ibcon#read 4, iclass 26, count 0 2006.229.02:20:48.03#ibcon#about to read 5, iclass 26, count 0 2006.229.02:20:48.03#ibcon#read 5, iclass 26, count 0 2006.229.02:20:48.03#ibcon#about to read 6, iclass 26, count 0 2006.229.02:20:48.03#ibcon#read 6, iclass 26, count 0 2006.229.02:20:48.03#ibcon#end of sib2, iclass 26, count 0 2006.229.02:20:48.03#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:20:48.03#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:20:48.03#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:20:48.03#ibcon#*before write, iclass 26, count 0 2006.229.02:20:48.03#ibcon#enter sib2, iclass 26, count 0 2006.229.02:20:48.03#ibcon#flushed, iclass 26, count 0 2006.229.02:20:48.03#ibcon#about to write, iclass 26, count 0 2006.229.02:20:48.03#ibcon#wrote, iclass 26, count 0 2006.229.02:20:48.03#ibcon#about to read 3, iclass 26, count 0 2006.229.02:20:48.07#ibcon#read 3, iclass 26, count 0 2006.229.02:20:48.07#ibcon#about to read 4, iclass 26, count 0 2006.229.02:20:48.07#ibcon#read 4, iclass 26, count 0 2006.229.02:20:48.07#ibcon#about to read 5, iclass 26, count 0 2006.229.02:20:48.07#ibcon#read 5, iclass 26, count 0 2006.229.02:20:48.07#ibcon#about to read 6, iclass 26, count 0 2006.229.02:20:48.07#ibcon#read 6, iclass 26, count 0 2006.229.02:20:48.07#ibcon#end of sib2, iclass 26, count 0 2006.229.02:20:48.07#ibcon#*after write, iclass 26, count 0 2006.229.02:20:48.07#ibcon#*before return 0, iclass 26, count 0 2006.229.02:20:48.07#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:48.07#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:20:48.07#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:20:48.07#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:20:48.07$vck44/vb=3,4 2006.229.02:20:48.07#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:20:48.07#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:20:48.07#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:48.07#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:48.13#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:48.13#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:48.13#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:20:48.13#ibcon#first serial, iclass 28, count 2 2006.229.02:20:48.13#ibcon#enter sib2, iclass 28, count 2 2006.229.02:20:48.13#ibcon#flushed, iclass 28, count 2 2006.229.02:20:48.13#ibcon#about to write, iclass 28, count 2 2006.229.02:20:48.13#ibcon#wrote, iclass 28, count 2 2006.229.02:20:48.13#ibcon#about to read 3, iclass 28, count 2 2006.229.02:20:48.15#ibcon#read 3, iclass 28, count 2 2006.229.02:20:48.15#ibcon#about to read 4, iclass 28, count 2 2006.229.02:20:48.15#ibcon#read 4, iclass 28, count 2 2006.229.02:20:48.15#ibcon#about to read 5, iclass 28, count 2 2006.229.02:20:48.15#ibcon#read 5, iclass 28, count 2 2006.229.02:20:48.15#ibcon#about to read 6, iclass 28, count 2 2006.229.02:20:48.15#ibcon#read 6, iclass 28, count 2 2006.229.02:20:48.15#ibcon#end of sib2, iclass 28, count 2 2006.229.02:20:48.15#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:20:48.15#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:20:48.15#ibcon#[27=AT03-04\r\n] 2006.229.02:20:48.15#ibcon#*before write, iclass 28, count 2 2006.229.02:20:48.15#ibcon#enter sib2, iclass 28, count 2 2006.229.02:20:48.15#ibcon#flushed, iclass 28, count 2 2006.229.02:20:48.15#ibcon#about to write, iclass 28, count 2 2006.229.02:20:48.15#ibcon#wrote, iclass 28, count 2 2006.229.02:20:48.15#ibcon#about to read 3, iclass 28, count 2 2006.229.02:20:48.18#ibcon#read 3, iclass 28, count 2 2006.229.02:20:48.18#ibcon#about to read 4, iclass 28, count 2 2006.229.02:20:48.18#ibcon#read 4, iclass 28, count 2 2006.229.02:20:48.18#ibcon#about to read 5, iclass 28, count 2 2006.229.02:20:48.18#ibcon#read 5, iclass 28, count 2 2006.229.02:20:48.18#ibcon#about to read 6, iclass 28, count 2 2006.229.02:20:48.18#ibcon#read 6, iclass 28, count 2 2006.229.02:20:48.18#ibcon#end of sib2, iclass 28, count 2 2006.229.02:20:48.18#ibcon#*after write, iclass 28, count 2 2006.229.02:20:48.18#ibcon#*before return 0, iclass 28, count 2 2006.229.02:20:48.18#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:48.18#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:20:48.18#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:20:48.18#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:48.18#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:48.30#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:48.30#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:48.30#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:20:48.30#ibcon#first serial, iclass 28, count 0 2006.229.02:20:48.30#ibcon#enter sib2, iclass 28, count 0 2006.229.02:20:48.30#ibcon#flushed, iclass 28, count 0 2006.229.02:20:48.30#ibcon#about to write, iclass 28, count 0 2006.229.02:20:48.30#ibcon#wrote, iclass 28, count 0 2006.229.02:20:48.30#ibcon#about to read 3, iclass 28, count 0 2006.229.02:20:48.32#ibcon#read 3, iclass 28, count 0 2006.229.02:20:48.32#ibcon#about to read 4, iclass 28, count 0 2006.229.02:20:48.32#ibcon#read 4, iclass 28, count 0 2006.229.02:20:48.32#ibcon#about to read 5, iclass 28, count 0 2006.229.02:20:48.32#ibcon#read 5, iclass 28, count 0 2006.229.02:20:48.32#ibcon#about to read 6, iclass 28, count 0 2006.229.02:20:48.32#ibcon#read 6, iclass 28, count 0 2006.229.02:20:48.32#ibcon#end of sib2, iclass 28, count 0 2006.229.02:20:48.32#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:20:48.32#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:20:48.32#ibcon#[27=USB\r\n] 2006.229.02:20:48.32#ibcon#*before write, iclass 28, count 0 2006.229.02:20:48.32#ibcon#enter sib2, iclass 28, count 0 2006.229.02:20:48.32#ibcon#flushed, iclass 28, count 0 2006.229.02:20:48.32#ibcon#about to write, iclass 28, count 0 2006.229.02:20:48.32#ibcon#wrote, iclass 28, count 0 2006.229.02:20:48.32#ibcon#about to read 3, iclass 28, count 0 2006.229.02:20:48.35#ibcon#read 3, iclass 28, count 0 2006.229.02:20:48.35#ibcon#about to read 4, iclass 28, count 0 2006.229.02:20:48.35#ibcon#read 4, iclass 28, count 0 2006.229.02:20:48.35#ibcon#about to read 5, iclass 28, count 0 2006.229.02:20:48.35#ibcon#read 5, iclass 28, count 0 2006.229.02:20:48.35#ibcon#about to read 6, iclass 28, count 0 2006.229.02:20:48.35#ibcon#read 6, iclass 28, count 0 2006.229.02:20:48.35#ibcon#end of sib2, iclass 28, count 0 2006.229.02:20:48.35#ibcon#*after write, iclass 28, count 0 2006.229.02:20:48.35#ibcon#*before return 0, iclass 28, count 0 2006.229.02:20:48.35#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:48.35#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:20:48.35#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:20:48.35#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:20:48.35$vck44/vblo=4,679.99 2006.229.02:20:48.35#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:20:48.35#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:20:48.35#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:48.35#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:48.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:48.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:48.35#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:20:48.35#ibcon#first serial, iclass 30, count 0 2006.229.02:20:48.35#ibcon#enter sib2, iclass 30, count 0 2006.229.02:20:48.35#ibcon#flushed, iclass 30, count 0 2006.229.02:20:48.35#ibcon#about to write, iclass 30, count 0 2006.229.02:20:48.35#ibcon#wrote, iclass 30, count 0 2006.229.02:20:48.35#ibcon#about to read 3, iclass 30, count 0 2006.229.02:20:48.37#ibcon#read 3, iclass 30, count 0 2006.229.02:20:48.37#ibcon#about to read 4, iclass 30, count 0 2006.229.02:20:48.37#ibcon#read 4, iclass 30, count 0 2006.229.02:20:48.37#ibcon#about to read 5, iclass 30, count 0 2006.229.02:20:48.37#ibcon#read 5, iclass 30, count 0 2006.229.02:20:48.37#ibcon#about to read 6, iclass 30, count 0 2006.229.02:20:48.37#ibcon#read 6, iclass 30, count 0 2006.229.02:20:48.37#ibcon#end of sib2, iclass 30, count 0 2006.229.02:20:48.37#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:20:48.37#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:20:48.37#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:20:48.37#ibcon#*before write, iclass 30, count 0 2006.229.02:20:48.37#ibcon#enter sib2, iclass 30, count 0 2006.229.02:20:48.37#ibcon#flushed, iclass 30, count 0 2006.229.02:20:48.37#ibcon#about to write, iclass 30, count 0 2006.229.02:20:48.37#ibcon#wrote, iclass 30, count 0 2006.229.02:20:48.37#ibcon#about to read 3, iclass 30, count 0 2006.229.02:20:48.41#ibcon#read 3, iclass 30, count 0 2006.229.02:20:48.41#ibcon#about to read 4, iclass 30, count 0 2006.229.02:20:48.41#ibcon#read 4, iclass 30, count 0 2006.229.02:20:48.41#ibcon#about to read 5, iclass 30, count 0 2006.229.02:20:48.41#ibcon#read 5, iclass 30, count 0 2006.229.02:20:48.41#ibcon#about to read 6, iclass 30, count 0 2006.229.02:20:48.41#ibcon#read 6, iclass 30, count 0 2006.229.02:20:48.41#ibcon#end of sib2, iclass 30, count 0 2006.229.02:20:48.41#ibcon#*after write, iclass 30, count 0 2006.229.02:20:48.41#ibcon#*before return 0, iclass 30, count 0 2006.229.02:20:48.41#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:48.41#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:20:48.41#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:20:48.41#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:20:48.41$vck44/vb=4,4 2006.229.02:20:48.41#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:20:48.41#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:20:48.41#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:48.41#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:48.47#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:48.47#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:48.47#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:20:48.47#ibcon#first serial, iclass 32, count 2 2006.229.02:20:48.47#ibcon#enter sib2, iclass 32, count 2 2006.229.02:20:48.47#ibcon#flushed, iclass 32, count 2 2006.229.02:20:48.47#ibcon#about to write, iclass 32, count 2 2006.229.02:20:48.47#ibcon#wrote, iclass 32, count 2 2006.229.02:20:48.47#ibcon#about to read 3, iclass 32, count 2 2006.229.02:20:48.49#ibcon#read 3, iclass 32, count 2 2006.229.02:20:48.49#ibcon#about to read 4, iclass 32, count 2 2006.229.02:20:48.49#ibcon#read 4, iclass 32, count 2 2006.229.02:20:48.49#ibcon#about to read 5, iclass 32, count 2 2006.229.02:20:48.49#ibcon#read 5, iclass 32, count 2 2006.229.02:20:48.49#ibcon#about to read 6, iclass 32, count 2 2006.229.02:20:48.49#ibcon#read 6, iclass 32, count 2 2006.229.02:20:48.49#ibcon#end of sib2, iclass 32, count 2 2006.229.02:20:48.49#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:20:48.49#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:20:48.49#ibcon#[27=AT04-04\r\n] 2006.229.02:20:48.49#ibcon#*before write, iclass 32, count 2 2006.229.02:20:48.49#ibcon#enter sib2, iclass 32, count 2 2006.229.02:20:48.49#ibcon#flushed, iclass 32, count 2 2006.229.02:20:48.49#ibcon#about to write, iclass 32, count 2 2006.229.02:20:48.49#ibcon#wrote, iclass 32, count 2 2006.229.02:20:48.49#ibcon#about to read 3, iclass 32, count 2 2006.229.02:20:48.52#ibcon#read 3, iclass 32, count 2 2006.229.02:20:48.52#ibcon#about to read 4, iclass 32, count 2 2006.229.02:20:48.52#ibcon#read 4, iclass 32, count 2 2006.229.02:20:48.52#ibcon#about to read 5, iclass 32, count 2 2006.229.02:20:48.52#ibcon#read 5, iclass 32, count 2 2006.229.02:20:48.52#ibcon#about to read 6, iclass 32, count 2 2006.229.02:20:48.52#ibcon#read 6, iclass 32, count 2 2006.229.02:20:48.52#ibcon#end of sib2, iclass 32, count 2 2006.229.02:20:48.52#ibcon#*after write, iclass 32, count 2 2006.229.02:20:48.52#ibcon#*before return 0, iclass 32, count 2 2006.229.02:20:48.52#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:48.52#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:20:48.52#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:20:48.52#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:48.52#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:48.64#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:48.64#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:48.64#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:20:48.64#ibcon#first serial, iclass 32, count 0 2006.229.02:20:48.64#ibcon#enter sib2, iclass 32, count 0 2006.229.02:20:48.64#ibcon#flushed, iclass 32, count 0 2006.229.02:20:48.64#ibcon#about to write, iclass 32, count 0 2006.229.02:20:48.64#ibcon#wrote, iclass 32, count 0 2006.229.02:20:48.64#ibcon#about to read 3, iclass 32, count 0 2006.229.02:20:48.66#ibcon#read 3, iclass 32, count 0 2006.229.02:20:48.66#ibcon#about to read 4, iclass 32, count 0 2006.229.02:20:48.66#ibcon#read 4, iclass 32, count 0 2006.229.02:20:48.66#ibcon#about to read 5, iclass 32, count 0 2006.229.02:20:48.66#ibcon#read 5, iclass 32, count 0 2006.229.02:20:48.66#ibcon#about to read 6, iclass 32, count 0 2006.229.02:20:48.66#ibcon#read 6, iclass 32, count 0 2006.229.02:20:48.66#ibcon#end of sib2, iclass 32, count 0 2006.229.02:20:48.66#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:20:48.66#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:20:48.66#ibcon#[27=USB\r\n] 2006.229.02:20:48.66#ibcon#*before write, iclass 32, count 0 2006.229.02:20:48.66#ibcon#enter sib2, iclass 32, count 0 2006.229.02:20:48.66#ibcon#flushed, iclass 32, count 0 2006.229.02:20:48.66#ibcon#about to write, iclass 32, count 0 2006.229.02:20:48.66#ibcon#wrote, iclass 32, count 0 2006.229.02:20:48.66#ibcon#about to read 3, iclass 32, count 0 2006.229.02:20:48.69#ibcon#read 3, iclass 32, count 0 2006.229.02:20:48.69#ibcon#about to read 4, iclass 32, count 0 2006.229.02:20:48.69#ibcon#read 4, iclass 32, count 0 2006.229.02:20:48.69#ibcon#about to read 5, iclass 32, count 0 2006.229.02:20:48.69#ibcon#read 5, iclass 32, count 0 2006.229.02:20:48.69#ibcon#about to read 6, iclass 32, count 0 2006.229.02:20:48.69#ibcon#read 6, iclass 32, count 0 2006.229.02:20:48.69#ibcon#end of sib2, iclass 32, count 0 2006.229.02:20:48.69#ibcon#*after write, iclass 32, count 0 2006.229.02:20:48.69#ibcon#*before return 0, iclass 32, count 0 2006.229.02:20:48.69#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:48.69#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:20:48.69#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:20:48.69#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:20:48.69$vck44/vblo=5,709.99 2006.229.02:20:48.69#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:20:48.69#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:20:48.69#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:48.69#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:48.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:48.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:48.69#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:20:48.69#ibcon#first serial, iclass 34, count 0 2006.229.02:20:48.69#ibcon#enter sib2, iclass 34, count 0 2006.229.02:20:48.69#ibcon#flushed, iclass 34, count 0 2006.229.02:20:48.69#ibcon#about to write, iclass 34, count 0 2006.229.02:20:48.69#ibcon#wrote, iclass 34, count 0 2006.229.02:20:48.69#ibcon#about to read 3, iclass 34, count 0 2006.229.02:20:48.71#ibcon#read 3, iclass 34, count 0 2006.229.02:20:48.71#ibcon#about to read 4, iclass 34, count 0 2006.229.02:20:48.71#ibcon#read 4, iclass 34, count 0 2006.229.02:20:48.71#ibcon#about to read 5, iclass 34, count 0 2006.229.02:20:48.71#ibcon#read 5, iclass 34, count 0 2006.229.02:20:48.71#ibcon#about to read 6, iclass 34, count 0 2006.229.02:20:48.71#ibcon#read 6, iclass 34, count 0 2006.229.02:20:48.71#ibcon#end of sib2, iclass 34, count 0 2006.229.02:20:48.71#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:20:48.71#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:20:48.71#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:20:48.71#ibcon#*before write, iclass 34, count 0 2006.229.02:20:48.71#ibcon#enter sib2, iclass 34, count 0 2006.229.02:20:48.71#ibcon#flushed, iclass 34, count 0 2006.229.02:20:48.71#ibcon#about to write, iclass 34, count 0 2006.229.02:20:48.71#ibcon#wrote, iclass 34, count 0 2006.229.02:20:48.71#ibcon#about to read 3, iclass 34, count 0 2006.229.02:20:48.75#ibcon#read 3, iclass 34, count 0 2006.229.02:20:48.75#ibcon#about to read 4, iclass 34, count 0 2006.229.02:20:48.75#ibcon#read 4, iclass 34, count 0 2006.229.02:20:48.75#ibcon#about to read 5, iclass 34, count 0 2006.229.02:20:48.75#ibcon#read 5, iclass 34, count 0 2006.229.02:20:48.75#ibcon#about to read 6, iclass 34, count 0 2006.229.02:20:48.75#ibcon#read 6, iclass 34, count 0 2006.229.02:20:48.75#ibcon#end of sib2, iclass 34, count 0 2006.229.02:20:48.75#ibcon#*after write, iclass 34, count 0 2006.229.02:20:48.75#ibcon#*before return 0, iclass 34, count 0 2006.229.02:20:48.75#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:48.75#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:20:48.75#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:20:48.75#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:20:48.75$vck44/vb=5,4 2006.229.02:20:48.75#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.02:20:48.75#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.02:20:48.75#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:48.75#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:20:48.78#abcon#<5=/06 3.9 7.3 29.73 981001.4\r\n> 2006.229.02:20:48.80#abcon#{5=INTERFACE CLEAR} 2006.229.02:20:48.81#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:20:48.81#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:20:48.81#ibcon#enter wrdev, iclass 37, count 2 2006.229.02:20:48.81#ibcon#first serial, iclass 37, count 2 2006.229.02:20:48.81#ibcon#enter sib2, iclass 37, count 2 2006.229.02:20:48.81#ibcon#flushed, iclass 37, count 2 2006.229.02:20:48.81#ibcon#about to write, iclass 37, count 2 2006.229.02:20:48.81#ibcon#wrote, iclass 37, count 2 2006.229.02:20:48.81#ibcon#about to read 3, iclass 37, count 2 2006.229.02:20:48.83#ibcon#read 3, iclass 37, count 2 2006.229.02:20:48.83#ibcon#about to read 4, iclass 37, count 2 2006.229.02:20:48.83#ibcon#read 4, iclass 37, count 2 2006.229.02:20:48.83#ibcon#about to read 5, iclass 37, count 2 2006.229.02:20:48.83#ibcon#read 5, iclass 37, count 2 2006.229.02:20:48.83#ibcon#about to read 6, iclass 37, count 2 2006.229.02:20:48.83#ibcon#read 6, iclass 37, count 2 2006.229.02:20:48.83#ibcon#end of sib2, iclass 37, count 2 2006.229.02:20:48.83#ibcon#*mode == 0, iclass 37, count 2 2006.229.02:20:48.83#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.02:20:48.83#ibcon#[27=AT05-04\r\n] 2006.229.02:20:48.83#ibcon#*before write, iclass 37, count 2 2006.229.02:20:48.83#ibcon#enter sib2, iclass 37, count 2 2006.229.02:20:48.83#ibcon#flushed, iclass 37, count 2 2006.229.02:20:48.83#ibcon#about to write, iclass 37, count 2 2006.229.02:20:48.83#ibcon#wrote, iclass 37, count 2 2006.229.02:20:48.83#ibcon#about to read 3, iclass 37, count 2 2006.229.02:20:48.86#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:20:48.86#ibcon#read 3, iclass 37, count 2 2006.229.02:20:48.86#ibcon#about to read 4, iclass 37, count 2 2006.229.02:20:48.86#ibcon#read 4, iclass 37, count 2 2006.229.02:20:48.86#ibcon#about to read 5, iclass 37, count 2 2006.229.02:20:48.86#ibcon#read 5, iclass 37, count 2 2006.229.02:20:48.86#ibcon#about to read 6, iclass 37, count 2 2006.229.02:20:48.86#ibcon#read 6, iclass 37, count 2 2006.229.02:20:48.86#ibcon#end of sib2, iclass 37, count 2 2006.229.02:20:48.86#ibcon#*after write, iclass 37, count 2 2006.229.02:20:48.86#ibcon#*before return 0, iclass 37, count 2 2006.229.02:20:48.86#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:20:48.86#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:20:48.86#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.02:20:48.86#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:48.86#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:20:48.98#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:20:48.98#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:20:48.98#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:20:48.98#ibcon#first serial, iclass 37, count 0 2006.229.02:20:48.98#ibcon#enter sib2, iclass 37, count 0 2006.229.02:20:48.98#ibcon#flushed, iclass 37, count 0 2006.229.02:20:48.98#ibcon#about to write, iclass 37, count 0 2006.229.02:20:48.98#ibcon#wrote, iclass 37, count 0 2006.229.02:20:48.98#ibcon#about to read 3, iclass 37, count 0 2006.229.02:20:49.00#ibcon#read 3, iclass 37, count 0 2006.229.02:20:49.00#ibcon#about to read 4, iclass 37, count 0 2006.229.02:20:49.00#ibcon#read 4, iclass 37, count 0 2006.229.02:20:49.00#ibcon#about to read 5, iclass 37, count 0 2006.229.02:20:49.00#ibcon#read 5, iclass 37, count 0 2006.229.02:20:49.00#ibcon#about to read 6, iclass 37, count 0 2006.229.02:20:49.00#ibcon#read 6, iclass 37, count 0 2006.229.02:20:49.00#ibcon#end of sib2, iclass 37, count 0 2006.229.02:20:49.00#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:20:49.00#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:20:49.00#ibcon#[27=USB\r\n] 2006.229.02:20:49.00#ibcon#*before write, iclass 37, count 0 2006.229.02:20:49.00#ibcon#enter sib2, iclass 37, count 0 2006.229.02:20:49.00#ibcon#flushed, iclass 37, count 0 2006.229.02:20:49.00#ibcon#about to write, iclass 37, count 0 2006.229.02:20:49.00#ibcon#wrote, iclass 37, count 0 2006.229.02:20:49.00#ibcon#about to read 3, iclass 37, count 0 2006.229.02:20:49.03#ibcon#read 3, iclass 37, count 0 2006.229.02:20:49.03#ibcon#about to read 4, iclass 37, count 0 2006.229.02:20:49.03#ibcon#read 4, iclass 37, count 0 2006.229.02:20:49.03#ibcon#about to read 5, iclass 37, count 0 2006.229.02:20:49.03#ibcon#read 5, iclass 37, count 0 2006.229.02:20:49.03#ibcon#about to read 6, iclass 37, count 0 2006.229.02:20:49.03#ibcon#read 6, iclass 37, count 0 2006.229.02:20:49.03#ibcon#end of sib2, iclass 37, count 0 2006.229.02:20:49.03#ibcon#*after write, iclass 37, count 0 2006.229.02:20:49.03#ibcon#*before return 0, iclass 37, count 0 2006.229.02:20:49.03#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:20:49.03#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:20:49.03#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:20:49.03#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:20:49.03$vck44/vblo=6,719.99 2006.229.02:20:49.03#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:20:49.03#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:20:49.03#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:49.03#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:49.03#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:49.03#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:49.03#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:20:49.03#ibcon#first serial, iclass 4, count 0 2006.229.02:20:49.03#ibcon#enter sib2, iclass 4, count 0 2006.229.02:20:49.03#ibcon#flushed, iclass 4, count 0 2006.229.02:20:49.03#ibcon#about to write, iclass 4, count 0 2006.229.02:20:49.03#ibcon#wrote, iclass 4, count 0 2006.229.02:20:49.03#ibcon#about to read 3, iclass 4, count 0 2006.229.02:20:49.05#ibcon#read 3, iclass 4, count 0 2006.229.02:20:49.05#ibcon#about to read 4, iclass 4, count 0 2006.229.02:20:49.05#ibcon#read 4, iclass 4, count 0 2006.229.02:20:49.05#ibcon#about to read 5, iclass 4, count 0 2006.229.02:20:49.05#ibcon#read 5, iclass 4, count 0 2006.229.02:20:49.05#ibcon#about to read 6, iclass 4, count 0 2006.229.02:20:49.05#ibcon#read 6, iclass 4, count 0 2006.229.02:20:49.05#ibcon#end of sib2, iclass 4, count 0 2006.229.02:20:49.05#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:20:49.05#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:20:49.05#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:20:49.05#ibcon#*before write, iclass 4, count 0 2006.229.02:20:49.05#ibcon#enter sib2, iclass 4, count 0 2006.229.02:20:49.05#ibcon#flushed, iclass 4, count 0 2006.229.02:20:49.05#ibcon#about to write, iclass 4, count 0 2006.229.02:20:49.05#ibcon#wrote, iclass 4, count 0 2006.229.02:20:49.05#ibcon#about to read 3, iclass 4, count 0 2006.229.02:20:49.09#ibcon#read 3, iclass 4, count 0 2006.229.02:20:49.09#ibcon#about to read 4, iclass 4, count 0 2006.229.02:20:49.09#ibcon#read 4, iclass 4, count 0 2006.229.02:20:49.09#ibcon#about to read 5, iclass 4, count 0 2006.229.02:20:49.09#ibcon#read 5, iclass 4, count 0 2006.229.02:20:49.09#ibcon#about to read 6, iclass 4, count 0 2006.229.02:20:49.09#ibcon#read 6, iclass 4, count 0 2006.229.02:20:49.09#ibcon#end of sib2, iclass 4, count 0 2006.229.02:20:49.09#ibcon#*after write, iclass 4, count 0 2006.229.02:20:49.09#ibcon#*before return 0, iclass 4, count 0 2006.229.02:20:49.09#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:49.09#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:20:49.09#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:20:49.09#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:20:49.09$vck44/vb=6,4 2006.229.02:20:49.09#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:20:49.09#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:20:49.09#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:49.09#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:49.15#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:49.15#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:49.15#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:20:49.15#ibcon#first serial, iclass 6, count 2 2006.229.02:20:49.15#ibcon#enter sib2, iclass 6, count 2 2006.229.02:20:49.15#ibcon#flushed, iclass 6, count 2 2006.229.02:20:49.15#ibcon#about to write, iclass 6, count 2 2006.229.02:20:49.15#ibcon#wrote, iclass 6, count 2 2006.229.02:20:49.15#ibcon#about to read 3, iclass 6, count 2 2006.229.02:20:49.17#ibcon#read 3, iclass 6, count 2 2006.229.02:20:49.17#ibcon#about to read 4, iclass 6, count 2 2006.229.02:20:49.17#ibcon#read 4, iclass 6, count 2 2006.229.02:20:49.17#ibcon#about to read 5, iclass 6, count 2 2006.229.02:20:49.17#ibcon#read 5, iclass 6, count 2 2006.229.02:20:49.17#ibcon#about to read 6, iclass 6, count 2 2006.229.02:20:49.17#ibcon#read 6, iclass 6, count 2 2006.229.02:20:49.17#ibcon#end of sib2, iclass 6, count 2 2006.229.02:20:49.17#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:20:49.17#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:20:49.17#ibcon#[27=AT06-04\r\n] 2006.229.02:20:49.17#ibcon#*before write, iclass 6, count 2 2006.229.02:20:49.17#ibcon#enter sib2, iclass 6, count 2 2006.229.02:20:49.17#ibcon#flushed, iclass 6, count 2 2006.229.02:20:49.17#ibcon#about to write, iclass 6, count 2 2006.229.02:20:49.17#ibcon#wrote, iclass 6, count 2 2006.229.02:20:49.17#ibcon#about to read 3, iclass 6, count 2 2006.229.02:20:49.20#ibcon#read 3, iclass 6, count 2 2006.229.02:20:49.20#ibcon#about to read 4, iclass 6, count 2 2006.229.02:20:49.20#ibcon#read 4, iclass 6, count 2 2006.229.02:20:49.20#ibcon#about to read 5, iclass 6, count 2 2006.229.02:20:49.20#ibcon#read 5, iclass 6, count 2 2006.229.02:20:49.20#ibcon#about to read 6, iclass 6, count 2 2006.229.02:20:49.20#ibcon#read 6, iclass 6, count 2 2006.229.02:20:49.20#ibcon#end of sib2, iclass 6, count 2 2006.229.02:20:49.20#ibcon#*after write, iclass 6, count 2 2006.229.02:20:49.20#ibcon#*before return 0, iclass 6, count 2 2006.229.02:20:49.20#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:49.20#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:20:49.20#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:20:49.20#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:49.20#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:49.32#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:49.32#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:49.32#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:20:49.32#ibcon#first serial, iclass 6, count 0 2006.229.02:20:49.32#ibcon#enter sib2, iclass 6, count 0 2006.229.02:20:49.32#ibcon#flushed, iclass 6, count 0 2006.229.02:20:49.32#ibcon#about to write, iclass 6, count 0 2006.229.02:20:49.32#ibcon#wrote, iclass 6, count 0 2006.229.02:20:49.32#ibcon#about to read 3, iclass 6, count 0 2006.229.02:20:49.34#ibcon#read 3, iclass 6, count 0 2006.229.02:20:49.34#ibcon#about to read 4, iclass 6, count 0 2006.229.02:20:49.34#ibcon#read 4, iclass 6, count 0 2006.229.02:20:49.34#ibcon#about to read 5, iclass 6, count 0 2006.229.02:20:49.34#ibcon#read 5, iclass 6, count 0 2006.229.02:20:49.34#ibcon#about to read 6, iclass 6, count 0 2006.229.02:20:49.34#ibcon#read 6, iclass 6, count 0 2006.229.02:20:49.34#ibcon#end of sib2, iclass 6, count 0 2006.229.02:20:49.34#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:20:49.34#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:20:49.34#ibcon#[27=USB\r\n] 2006.229.02:20:49.34#ibcon#*before write, iclass 6, count 0 2006.229.02:20:49.34#ibcon#enter sib2, iclass 6, count 0 2006.229.02:20:49.34#ibcon#flushed, iclass 6, count 0 2006.229.02:20:49.34#ibcon#about to write, iclass 6, count 0 2006.229.02:20:49.34#ibcon#wrote, iclass 6, count 0 2006.229.02:20:49.34#ibcon#about to read 3, iclass 6, count 0 2006.229.02:20:49.37#ibcon#read 3, iclass 6, count 0 2006.229.02:20:49.37#ibcon#about to read 4, iclass 6, count 0 2006.229.02:20:49.37#ibcon#read 4, iclass 6, count 0 2006.229.02:20:49.37#ibcon#about to read 5, iclass 6, count 0 2006.229.02:20:49.37#ibcon#read 5, iclass 6, count 0 2006.229.02:20:49.37#ibcon#about to read 6, iclass 6, count 0 2006.229.02:20:49.37#ibcon#read 6, iclass 6, count 0 2006.229.02:20:49.37#ibcon#end of sib2, iclass 6, count 0 2006.229.02:20:49.37#ibcon#*after write, iclass 6, count 0 2006.229.02:20:49.37#ibcon#*before return 0, iclass 6, count 0 2006.229.02:20:49.37#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:49.37#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:20:49.37#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:20:49.37#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:20:49.37$vck44/vblo=7,734.99 2006.229.02:20:49.37#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:20:49.37#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:20:49.37#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:49.37#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:49.37#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:49.37#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:49.37#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:20:49.37#ibcon#first serial, iclass 10, count 0 2006.229.02:20:49.37#ibcon#enter sib2, iclass 10, count 0 2006.229.02:20:49.37#ibcon#flushed, iclass 10, count 0 2006.229.02:20:49.37#ibcon#about to write, iclass 10, count 0 2006.229.02:20:49.37#ibcon#wrote, iclass 10, count 0 2006.229.02:20:49.37#ibcon#about to read 3, iclass 10, count 0 2006.229.02:20:49.39#ibcon#read 3, iclass 10, count 0 2006.229.02:20:49.39#ibcon#about to read 4, iclass 10, count 0 2006.229.02:20:49.39#ibcon#read 4, iclass 10, count 0 2006.229.02:20:49.39#ibcon#about to read 5, iclass 10, count 0 2006.229.02:20:49.39#ibcon#read 5, iclass 10, count 0 2006.229.02:20:49.39#ibcon#about to read 6, iclass 10, count 0 2006.229.02:20:49.39#ibcon#read 6, iclass 10, count 0 2006.229.02:20:49.39#ibcon#end of sib2, iclass 10, count 0 2006.229.02:20:49.39#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:20:49.39#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:20:49.39#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:20:49.39#ibcon#*before write, iclass 10, count 0 2006.229.02:20:49.39#ibcon#enter sib2, iclass 10, count 0 2006.229.02:20:49.39#ibcon#flushed, iclass 10, count 0 2006.229.02:20:49.39#ibcon#about to write, iclass 10, count 0 2006.229.02:20:49.39#ibcon#wrote, iclass 10, count 0 2006.229.02:20:49.39#ibcon#about to read 3, iclass 10, count 0 2006.229.02:20:49.43#ibcon#read 3, iclass 10, count 0 2006.229.02:20:49.43#ibcon#about to read 4, iclass 10, count 0 2006.229.02:20:49.43#ibcon#read 4, iclass 10, count 0 2006.229.02:20:49.43#ibcon#about to read 5, iclass 10, count 0 2006.229.02:20:49.43#ibcon#read 5, iclass 10, count 0 2006.229.02:20:49.43#ibcon#about to read 6, iclass 10, count 0 2006.229.02:20:49.43#ibcon#read 6, iclass 10, count 0 2006.229.02:20:49.43#ibcon#end of sib2, iclass 10, count 0 2006.229.02:20:49.43#ibcon#*after write, iclass 10, count 0 2006.229.02:20:49.43#ibcon#*before return 0, iclass 10, count 0 2006.229.02:20:49.43#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:49.43#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:20:49.43#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:20:49.43#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:20:49.43$vck44/vb=7,4 2006.229.02:20:49.43#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:20:49.43#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:20:49.43#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:49.43#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:49.49#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:49.49#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:49.49#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:20:49.49#ibcon#first serial, iclass 12, count 2 2006.229.02:20:49.49#ibcon#enter sib2, iclass 12, count 2 2006.229.02:20:49.49#ibcon#flushed, iclass 12, count 2 2006.229.02:20:49.49#ibcon#about to write, iclass 12, count 2 2006.229.02:20:49.49#ibcon#wrote, iclass 12, count 2 2006.229.02:20:49.49#ibcon#about to read 3, iclass 12, count 2 2006.229.02:20:49.51#ibcon#read 3, iclass 12, count 2 2006.229.02:20:49.51#ibcon#about to read 4, iclass 12, count 2 2006.229.02:20:49.51#ibcon#read 4, iclass 12, count 2 2006.229.02:20:49.51#ibcon#about to read 5, iclass 12, count 2 2006.229.02:20:49.51#ibcon#read 5, iclass 12, count 2 2006.229.02:20:49.51#ibcon#about to read 6, iclass 12, count 2 2006.229.02:20:49.51#ibcon#read 6, iclass 12, count 2 2006.229.02:20:49.51#ibcon#end of sib2, iclass 12, count 2 2006.229.02:20:49.51#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:20:49.51#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:20:49.51#ibcon#[27=AT07-04\r\n] 2006.229.02:20:49.51#ibcon#*before write, iclass 12, count 2 2006.229.02:20:49.51#ibcon#enter sib2, iclass 12, count 2 2006.229.02:20:49.51#ibcon#flushed, iclass 12, count 2 2006.229.02:20:49.51#ibcon#about to write, iclass 12, count 2 2006.229.02:20:49.51#ibcon#wrote, iclass 12, count 2 2006.229.02:20:49.51#ibcon#about to read 3, iclass 12, count 2 2006.229.02:20:49.54#ibcon#read 3, iclass 12, count 2 2006.229.02:20:49.54#ibcon#about to read 4, iclass 12, count 2 2006.229.02:20:49.54#ibcon#read 4, iclass 12, count 2 2006.229.02:20:49.54#ibcon#about to read 5, iclass 12, count 2 2006.229.02:20:49.54#ibcon#read 5, iclass 12, count 2 2006.229.02:20:49.54#ibcon#about to read 6, iclass 12, count 2 2006.229.02:20:49.54#ibcon#read 6, iclass 12, count 2 2006.229.02:20:49.54#ibcon#end of sib2, iclass 12, count 2 2006.229.02:20:49.54#ibcon#*after write, iclass 12, count 2 2006.229.02:20:49.54#ibcon#*before return 0, iclass 12, count 2 2006.229.02:20:49.54#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:49.54#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:20:49.54#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:20:49.54#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:49.54#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:49.66#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:49.66#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:49.66#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:20:49.66#ibcon#first serial, iclass 12, count 0 2006.229.02:20:49.66#ibcon#enter sib2, iclass 12, count 0 2006.229.02:20:49.66#ibcon#flushed, iclass 12, count 0 2006.229.02:20:49.66#ibcon#about to write, iclass 12, count 0 2006.229.02:20:49.66#ibcon#wrote, iclass 12, count 0 2006.229.02:20:49.66#ibcon#about to read 3, iclass 12, count 0 2006.229.02:20:49.68#ibcon#read 3, iclass 12, count 0 2006.229.02:20:49.68#ibcon#about to read 4, iclass 12, count 0 2006.229.02:20:49.68#ibcon#read 4, iclass 12, count 0 2006.229.02:20:49.68#ibcon#about to read 5, iclass 12, count 0 2006.229.02:20:49.68#ibcon#read 5, iclass 12, count 0 2006.229.02:20:49.68#ibcon#about to read 6, iclass 12, count 0 2006.229.02:20:49.68#ibcon#read 6, iclass 12, count 0 2006.229.02:20:49.68#ibcon#end of sib2, iclass 12, count 0 2006.229.02:20:49.68#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:20:49.68#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:20:49.68#ibcon#[27=USB\r\n] 2006.229.02:20:49.68#ibcon#*before write, iclass 12, count 0 2006.229.02:20:49.68#ibcon#enter sib2, iclass 12, count 0 2006.229.02:20:49.68#ibcon#flushed, iclass 12, count 0 2006.229.02:20:49.68#ibcon#about to write, iclass 12, count 0 2006.229.02:20:49.68#ibcon#wrote, iclass 12, count 0 2006.229.02:20:49.68#ibcon#about to read 3, iclass 12, count 0 2006.229.02:20:49.71#ibcon#read 3, iclass 12, count 0 2006.229.02:20:49.71#ibcon#about to read 4, iclass 12, count 0 2006.229.02:20:49.71#ibcon#read 4, iclass 12, count 0 2006.229.02:20:49.71#ibcon#about to read 5, iclass 12, count 0 2006.229.02:20:49.71#ibcon#read 5, iclass 12, count 0 2006.229.02:20:49.71#ibcon#about to read 6, iclass 12, count 0 2006.229.02:20:49.71#ibcon#read 6, iclass 12, count 0 2006.229.02:20:49.71#ibcon#end of sib2, iclass 12, count 0 2006.229.02:20:49.71#ibcon#*after write, iclass 12, count 0 2006.229.02:20:49.71#ibcon#*before return 0, iclass 12, count 0 2006.229.02:20:49.71#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:49.71#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:20:49.71#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:20:49.71#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:20:49.71$vck44/vblo=8,744.99 2006.229.02:20:49.71#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:20:49.71#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:20:49.71#ibcon#ireg 17 cls_cnt 0 2006.229.02:20:49.71#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:49.71#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:49.71#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:49.71#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:20:49.71#ibcon#first serial, iclass 14, count 0 2006.229.02:20:49.71#ibcon#enter sib2, iclass 14, count 0 2006.229.02:20:49.71#ibcon#flushed, iclass 14, count 0 2006.229.02:20:49.71#ibcon#about to write, iclass 14, count 0 2006.229.02:20:49.71#ibcon#wrote, iclass 14, count 0 2006.229.02:20:49.71#ibcon#about to read 3, iclass 14, count 0 2006.229.02:20:49.73#ibcon#read 3, iclass 14, count 0 2006.229.02:20:49.73#ibcon#about to read 4, iclass 14, count 0 2006.229.02:20:49.73#ibcon#read 4, iclass 14, count 0 2006.229.02:20:49.73#ibcon#about to read 5, iclass 14, count 0 2006.229.02:20:49.73#ibcon#read 5, iclass 14, count 0 2006.229.02:20:49.73#ibcon#about to read 6, iclass 14, count 0 2006.229.02:20:49.73#ibcon#read 6, iclass 14, count 0 2006.229.02:20:49.73#ibcon#end of sib2, iclass 14, count 0 2006.229.02:20:49.73#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:20:49.73#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:20:49.73#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:20:49.73#ibcon#*before write, iclass 14, count 0 2006.229.02:20:49.73#ibcon#enter sib2, iclass 14, count 0 2006.229.02:20:49.73#ibcon#flushed, iclass 14, count 0 2006.229.02:20:49.73#ibcon#about to write, iclass 14, count 0 2006.229.02:20:49.73#ibcon#wrote, iclass 14, count 0 2006.229.02:20:49.73#ibcon#about to read 3, iclass 14, count 0 2006.229.02:20:49.77#ibcon#read 3, iclass 14, count 0 2006.229.02:20:49.77#ibcon#about to read 4, iclass 14, count 0 2006.229.02:20:49.77#ibcon#read 4, iclass 14, count 0 2006.229.02:20:49.77#ibcon#about to read 5, iclass 14, count 0 2006.229.02:20:49.77#ibcon#read 5, iclass 14, count 0 2006.229.02:20:49.77#ibcon#about to read 6, iclass 14, count 0 2006.229.02:20:49.77#ibcon#read 6, iclass 14, count 0 2006.229.02:20:49.77#ibcon#end of sib2, iclass 14, count 0 2006.229.02:20:49.77#ibcon#*after write, iclass 14, count 0 2006.229.02:20:49.77#ibcon#*before return 0, iclass 14, count 0 2006.229.02:20:49.77#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:49.77#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:20:49.77#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:20:49.77#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:20:49.77$vck44/vb=8,4 2006.229.02:20:49.77#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:20:49.77#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:20:49.77#ibcon#ireg 11 cls_cnt 2 2006.229.02:20:49.77#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:49.83#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:49.83#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:49.83#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:20:49.83#ibcon#first serial, iclass 16, count 2 2006.229.02:20:49.83#ibcon#enter sib2, iclass 16, count 2 2006.229.02:20:49.83#ibcon#flushed, iclass 16, count 2 2006.229.02:20:49.83#ibcon#about to write, iclass 16, count 2 2006.229.02:20:49.83#ibcon#wrote, iclass 16, count 2 2006.229.02:20:49.83#ibcon#about to read 3, iclass 16, count 2 2006.229.02:20:49.85#ibcon#read 3, iclass 16, count 2 2006.229.02:20:49.85#ibcon#about to read 4, iclass 16, count 2 2006.229.02:20:49.85#ibcon#read 4, iclass 16, count 2 2006.229.02:20:49.85#ibcon#about to read 5, iclass 16, count 2 2006.229.02:20:49.85#ibcon#read 5, iclass 16, count 2 2006.229.02:20:49.85#ibcon#about to read 6, iclass 16, count 2 2006.229.02:20:49.85#ibcon#read 6, iclass 16, count 2 2006.229.02:20:49.85#ibcon#end of sib2, iclass 16, count 2 2006.229.02:20:49.85#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:20:49.85#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:20:49.85#ibcon#[27=AT08-04\r\n] 2006.229.02:20:49.85#ibcon#*before write, iclass 16, count 2 2006.229.02:20:49.85#ibcon#enter sib2, iclass 16, count 2 2006.229.02:20:49.85#ibcon#flushed, iclass 16, count 2 2006.229.02:20:49.85#ibcon#about to write, iclass 16, count 2 2006.229.02:20:49.85#ibcon#wrote, iclass 16, count 2 2006.229.02:20:49.85#ibcon#about to read 3, iclass 16, count 2 2006.229.02:20:49.88#ibcon#read 3, iclass 16, count 2 2006.229.02:20:49.88#ibcon#about to read 4, iclass 16, count 2 2006.229.02:20:49.88#ibcon#read 4, iclass 16, count 2 2006.229.02:20:49.88#ibcon#about to read 5, iclass 16, count 2 2006.229.02:20:49.88#ibcon#read 5, iclass 16, count 2 2006.229.02:20:49.88#ibcon#about to read 6, iclass 16, count 2 2006.229.02:20:49.88#ibcon#read 6, iclass 16, count 2 2006.229.02:20:49.88#ibcon#end of sib2, iclass 16, count 2 2006.229.02:20:49.88#ibcon#*after write, iclass 16, count 2 2006.229.02:20:49.88#ibcon#*before return 0, iclass 16, count 2 2006.229.02:20:49.88#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:49.88#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:20:49.88#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:20:49.88#ibcon#ireg 7 cls_cnt 0 2006.229.02:20:49.88#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:50.00#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:50.00#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:50.00#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:20:50.00#ibcon#first serial, iclass 16, count 0 2006.229.02:20:50.00#ibcon#enter sib2, iclass 16, count 0 2006.229.02:20:50.00#ibcon#flushed, iclass 16, count 0 2006.229.02:20:50.00#ibcon#about to write, iclass 16, count 0 2006.229.02:20:50.00#ibcon#wrote, iclass 16, count 0 2006.229.02:20:50.00#ibcon#about to read 3, iclass 16, count 0 2006.229.02:20:50.02#ibcon#read 3, iclass 16, count 0 2006.229.02:20:50.02#ibcon#about to read 4, iclass 16, count 0 2006.229.02:20:50.02#ibcon#read 4, iclass 16, count 0 2006.229.02:20:50.02#ibcon#about to read 5, iclass 16, count 0 2006.229.02:20:50.02#ibcon#read 5, iclass 16, count 0 2006.229.02:20:50.02#ibcon#about to read 6, iclass 16, count 0 2006.229.02:20:50.02#ibcon#read 6, iclass 16, count 0 2006.229.02:20:50.02#ibcon#end of sib2, iclass 16, count 0 2006.229.02:20:50.02#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:20:50.02#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:20:50.02#ibcon#[27=USB\r\n] 2006.229.02:20:50.02#ibcon#*before write, iclass 16, count 0 2006.229.02:20:50.02#ibcon#enter sib2, iclass 16, count 0 2006.229.02:20:50.02#ibcon#flushed, iclass 16, count 0 2006.229.02:20:50.02#ibcon#about to write, iclass 16, count 0 2006.229.02:20:50.02#ibcon#wrote, iclass 16, count 0 2006.229.02:20:50.02#ibcon#about to read 3, iclass 16, count 0 2006.229.02:20:50.05#ibcon#read 3, iclass 16, count 0 2006.229.02:20:50.05#ibcon#about to read 4, iclass 16, count 0 2006.229.02:20:50.05#ibcon#read 4, iclass 16, count 0 2006.229.02:20:50.05#ibcon#about to read 5, iclass 16, count 0 2006.229.02:20:50.05#ibcon#read 5, iclass 16, count 0 2006.229.02:20:50.05#ibcon#about to read 6, iclass 16, count 0 2006.229.02:20:50.05#ibcon#read 6, iclass 16, count 0 2006.229.02:20:50.05#ibcon#end of sib2, iclass 16, count 0 2006.229.02:20:50.05#ibcon#*after write, iclass 16, count 0 2006.229.02:20:50.05#ibcon#*before return 0, iclass 16, count 0 2006.229.02:20:50.05#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:50.05#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:20:50.05#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:20:50.05#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:20:50.05$vck44/vabw=wide 2006.229.02:20:50.05#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:20:50.05#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:20:50.05#ibcon#ireg 8 cls_cnt 0 2006.229.02:20:50.05#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:50.05#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:50.05#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:50.05#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:20:50.05#ibcon#first serial, iclass 18, count 0 2006.229.02:20:50.05#ibcon#enter sib2, iclass 18, count 0 2006.229.02:20:50.05#ibcon#flushed, iclass 18, count 0 2006.229.02:20:50.05#ibcon#about to write, iclass 18, count 0 2006.229.02:20:50.05#ibcon#wrote, iclass 18, count 0 2006.229.02:20:50.05#ibcon#about to read 3, iclass 18, count 0 2006.229.02:20:50.07#ibcon#read 3, iclass 18, count 0 2006.229.02:20:50.07#ibcon#about to read 4, iclass 18, count 0 2006.229.02:20:50.07#ibcon#read 4, iclass 18, count 0 2006.229.02:20:50.07#ibcon#about to read 5, iclass 18, count 0 2006.229.02:20:50.07#ibcon#read 5, iclass 18, count 0 2006.229.02:20:50.07#ibcon#about to read 6, iclass 18, count 0 2006.229.02:20:50.07#ibcon#read 6, iclass 18, count 0 2006.229.02:20:50.07#ibcon#end of sib2, iclass 18, count 0 2006.229.02:20:50.07#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:20:50.07#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:20:50.07#ibcon#[25=BW32\r\n] 2006.229.02:20:50.07#ibcon#*before write, iclass 18, count 0 2006.229.02:20:50.07#ibcon#enter sib2, iclass 18, count 0 2006.229.02:20:50.07#ibcon#flushed, iclass 18, count 0 2006.229.02:20:50.07#ibcon#about to write, iclass 18, count 0 2006.229.02:20:50.07#ibcon#wrote, iclass 18, count 0 2006.229.02:20:50.07#ibcon#about to read 3, iclass 18, count 0 2006.229.02:20:50.10#ibcon#read 3, iclass 18, count 0 2006.229.02:20:50.10#ibcon#about to read 4, iclass 18, count 0 2006.229.02:20:50.10#ibcon#read 4, iclass 18, count 0 2006.229.02:20:50.10#ibcon#about to read 5, iclass 18, count 0 2006.229.02:20:50.10#ibcon#read 5, iclass 18, count 0 2006.229.02:20:50.10#ibcon#about to read 6, iclass 18, count 0 2006.229.02:20:50.10#ibcon#read 6, iclass 18, count 0 2006.229.02:20:50.10#ibcon#end of sib2, iclass 18, count 0 2006.229.02:20:50.10#ibcon#*after write, iclass 18, count 0 2006.229.02:20:50.10#ibcon#*before return 0, iclass 18, count 0 2006.229.02:20:50.10#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:50.10#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:20:50.10#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:20:50.10#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:20:50.10$vck44/vbbw=wide 2006.229.02:20:50.10#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.02:20:50.10#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.02:20:50.10#ibcon#ireg 8 cls_cnt 0 2006.229.02:20:50.10#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:20:50.17#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:20:50.17#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:20:50.17#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:20:50.17#ibcon#first serial, iclass 20, count 0 2006.229.02:20:50.17#ibcon#enter sib2, iclass 20, count 0 2006.229.02:20:50.17#ibcon#flushed, iclass 20, count 0 2006.229.02:20:50.17#ibcon#about to write, iclass 20, count 0 2006.229.02:20:50.17#ibcon#wrote, iclass 20, count 0 2006.229.02:20:50.17#ibcon#about to read 3, iclass 20, count 0 2006.229.02:20:50.19#ibcon#read 3, iclass 20, count 0 2006.229.02:20:50.19#ibcon#about to read 4, iclass 20, count 0 2006.229.02:20:50.19#ibcon#read 4, iclass 20, count 0 2006.229.02:20:50.19#ibcon#about to read 5, iclass 20, count 0 2006.229.02:20:50.19#ibcon#read 5, iclass 20, count 0 2006.229.02:20:50.19#ibcon#about to read 6, iclass 20, count 0 2006.229.02:20:50.19#ibcon#read 6, iclass 20, count 0 2006.229.02:20:50.19#ibcon#end of sib2, iclass 20, count 0 2006.229.02:20:50.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:20:50.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:20:50.19#ibcon#[27=BW32\r\n] 2006.229.02:20:50.19#ibcon#*before write, iclass 20, count 0 2006.229.02:20:50.19#ibcon#enter sib2, iclass 20, count 0 2006.229.02:20:50.19#ibcon#flushed, iclass 20, count 0 2006.229.02:20:50.19#ibcon#about to write, iclass 20, count 0 2006.229.02:20:50.19#ibcon#wrote, iclass 20, count 0 2006.229.02:20:50.19#ibcon#about to read 3, iclass 20, count 0 2006.229.02:20:50.22#ibcon#read 3, iclass 20, count 0 2006.229.02:20:50.22#ibcon#about to read 4, iclass 20, count 0 2006.229.02:20:50.22#ibcon#read 4, iclass 20, count 0 2006.229.02:20:50.22#ibcon#about to read 5, iclass 20, count 0 2006.229.02:20:50.22#ibcon#read 5, iclass 20, count 0 2006.229.02:20:50.22#ibcon#about to read 6, iclass 20, count 0 2006.229.02:20:50.22#ibcon#read 6, iclass 20, count 0 2006.229.02:20:50.22#ibcon#end of sib2, iclass 20, count 0 2006.229.02:20:50.22#ibcon#*after write, iclass 20, count 0 2006.229.02:20:50.22#ibcon#*before return 0, iclass 20, count 0 2006.229.02:20:50.22#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:20:50.22#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:20:50.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:20:50.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:20:50.22$setupk4/ifdk4 2006.229.02:20:50.22$ifdk4/lo= 2006.229.02:20:50.22$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:20:50.22$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:20:50.22$ifdk4/patch= 2006.229.02:20:50.22$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:20:50.22$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:20:50.22$setupk4/!*+20s 2006.229.02:20:58.95#abcon#<5=/06 3.9 7.2 29.72 981001.3\r\n> 2006.229.02:20:58.97#abcon#{5=INTERFACE CLEAR} 2006.229.02:20:59.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:21:04.69$setupk4/"tpicd 2006.229.02:21:04.69$setupk4/echo=off 2006.229.02:21:04.69$setupk4/xlog=off 2006.229.02:21:04.69:!2006.229.02:22:50 2006.229.02:21:21.14#trakl#Source acquired 2006.229.02:21:21.14#flagr#flagr/antenna,acquired 2006.229.02:22:50.00:preob 2006.229.02:22:50.14/onsource/TRACKING 2006.229.02:22:50.14:!2006.229.02:23:00 2006.229.02:23:00.00:"tape 2006.229.02:23:00.00:"st=record 2006.229.02:23:00.00:data_valid=on 2006.229.02:23:00.00:midob 2006.229.02:23:00.14/onsource/TRACKING 2006.229.02:23:00.14/wx/29.61,1001.3,99 2006.229.02:23:00.25/cable/+6.4083E-03 2006.229.02:23:01.34/va/01,08,usb,yes,43,46 2006.229.02:23:01.34/va/02,07,usb,yes,47,47 2006.229.02:23:01.34/va/03,06,usb,yes,57,61 2006.229.02:23:01.34/va/04,07,usb,yes,48,51 2006.229.02:23:01.34/va/05,04,usb,yes,43,44 2006.229.02:23:01.34/va/06,04,usb,yes,48,48 2006.229.02:23:01.34/va/07,05,usb,yes,43,44 2006.229.02:23:01.34/va/08,06,usb,yes,32,39 2006.229.02:23:01.57/valo/01,524.99,yes,locked 2006.229.02:23:01.57/valo/02,534.99,yes,locked 2006.229.02:23:01.57/valo/03,564.99,yes,locked 2006.229.02:23:01.57/valo/04,624.99,yes,locked 2006.229.02:23:01.57/valo/05,734.99,yes,locked 2006.229.02:23:01.57/valo/06,814.99,yes,locked 2006.229.02:23:01.57/valo/07,864.99,yes,locked 2006.229.02:23:01.57/valo/08,884.99,yes,locked 2006.229.02:23:02.66/vb/01,04,usb,yes,39,36 2006.229.02:23:02.66/vb/02,04,usb,yes,42,42 2006.229.02:23:02.66/vb/03,04,usb,yes,38,42 2006.229.02:23:02.66/vb/04,04,usb,yes,44,43 2006.229.02:23:02.66/vb/05,04,usb,yes,35,38 2006.229.02:23:02.66/vb/06,04,usb,yes,40,35 2006.229.02:23:02.66/vb/07,04,usb,yes,40,40 2006.229.02:23:02.66/vb/08,04,usb,yes,36,41 2006.229.02:23:02.90/vblo/01,629.99,yes,locked 2006.229.02:23:02.90/vblo/02,634.99,yes,locked 2006.229.02:23:02.90/vblo/03,649.99,yes,locked 2006.229.02:23:02.90/vblo/04,679.99,yes,locked 2006.229.02:23:02.90/vblo/05,709.99,yes,locked 2006.229.02:23:02.90/vblo/06,719.99,yes,locked 2006.229.02:23:02.90/vblo/07,734.99,yes,locked 2006.229.02:23:02.90/vblo/08,744.99,yes,locked 2006.229.02:23:03.05/vabw/8 2006.229.02:23:03.22/vbbw/8 2006.229.02:23:03.33/xfe/off,on,12.0 2006.229.02:23:03.70/ifatt/23,28,28,28 2006.229.02:23:04.08/fmout-gps/S +4.53E-07 2006.229.02:23:04.12:!2006.229.02:25:00 2006.229.02:25:00.00:data_valid=off 2006.229.02:25:00.00:"et 2006.229.02:25:00.01:!+3s 2006.229.02:25:03.02:"tape 2006.229.02:25:03.02:postob 2006.229.02:25:03.15/cable/+6.4069E-03 2006.229.02:25:03.15/wx/29.49,1001.2,100 2006.229.02:25:04.07/fmout-gps/S +4.55E-07 2006.229.02:25:04.07:scan_name=229-0229,jd0608,220 2006.229.02:25:04.08:source=1044+719,104827.62,714335.9,2000.0,ccw 2006.229.02:25:04.14#flagr#flagr/antenna,new-source 2006.229.02:25:05.14:checkk5 2006.229.02:25:05.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:25:05.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:25:06.39/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:25:06.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:25:07.15/chk_obsdata//k5ts1/T2290223??a.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.02:25:07.57/chk_obsdata//k5ts2/T2290223??b.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.02:25:07.97/chk_obsdata//k5ts3/T2290223??c.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.02:25:08.37/chk_obsdata//k5ts4/T2290223??d.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.02:25:09.15/k5log//k5ts1_log_newline 2006.229.02:25:10.02/k5log//k5ts2_log_newline 2006.229.02:25:10.78/k5log//k5ts3_log_newline 2006.229.02:25:11.65/k5log//k5ts4_log_newline 2006.229.02:25:11.67/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:25:11.67:setupk4=1 2006.229.02:25:11.67$setupk4/echo=on 2006.229.02:25:11.67$setupk4/pcalon 2006.229.02:25:11.67$pcalon/"no phase cal control is implemented here 2006.229.02:25:11.67$setupk4/"tpicd=stop 2006.229.02:25:11.67$setupk4/"rec=synch_on 2006.229.02:25:11.67$setupk4/"rec_mode=128 2006.229.02:25:11.67$setupk4/!* 2006.229.02:25:11.67$setupk4/recpk4 2006.229.02:25:11.67$recpk4/recpatch= 2006.229.02:25:11.67$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:25:11.67$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:25:11.67$setupk4/vck44 2006.229.02:25:11.67$vck44/valo=1,524.99 2006.229.02:25:11.67#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.02:25:11.67#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.02:25:11.67#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:11.67#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:11.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:11.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:11.67#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:25:11.67#ibcon#first serial, iclass 17, count 0 2006.229.02:25:11.67#ibcon#enter sib2, iclass 17, count 0 2006.229.02:25:11.67#ibcon#flushed, iclass 17, count 0 2006.229.02:25:11.67#ibcon#about to write, iclass 17, count 0 2006.229.02:25:11.67#ibcon#wrote, iclass 17, count 0 2006.229.02:25:11.67#ibcon#about to read 3, iclass 17, count 0 2006.229.02:25:11.72#ibcon#read 3, iclass 17, count 0 2006.229.02:25:11.72#ibcon#about to read 4, iclass 17, count 0 2006.229.02:25:11.72#ibcon#read 4, iclass 17, count 0 2006.229.02:25:11.72#ibcon#about to read 5, iclass 17, count 0 2006.229.02:25:11.72#ibcon#read 5, iclass 17, count 0 2006.229.02:25:11.72#ibcon#about to read 6, iclass 17, count 0 2006.229.02:25:11.72#ibcon#read 6, iclass 17, count 0 2006.229.02:25:11.72#ibcon#end of sib2, iclass 17, count 0 2006.229.02:25:11.72#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:25:11.72#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:25:11.72#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:25:11.72#ibcon#*before write, iclass 17, count 0 2006.229.02:25:11.72#ibcon#enter sib2, iclass 17, count 0 2006.229.02:25:11.72#ibcon#flushed, iclass 17, count 0 2006.229.02:25:11.72#ibcon#about to write, iclass 17, count 0 2006.229.02:25:11.72#ibcon#wrote, iclass 17, count 0 2006.229.02:25:11.72#ibcon#about to read 3, iclass 17, count 0 2006.229.02:25:11.77#ibcon#read 3, iclass 17, count 0 2006.229.02:25:11.77#ibcon#about to read 4, iclass 17, count 0 2006.229.02:25:11.77#ibcon#read 4, iclass 17, count 0 2006.229.02:25:11.77#ibcon#about to read 5, iclass 17, count 0 2006.229.02:25:11.77#ibcon#read 5, iclass 17, count 0 2006.229.02:25:11.77#ibcon#about to read 6, iclass 17, count 0 2006.229.02:25:11.77#ibcon#read 6, iclass 17, count 0 2006.229.02:25:11.77#ibcon#end of sib2, iclass 17, count 0 2006.229.02:25:11.77#ibcon#*after write, iclass 17, count 0 2006.229.02:25:11.77#ibcon#*before return 0, iclass 17, count 0 2006.229.02:25:11.77#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:11.77#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:11.77#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:25:11.77#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:25:11.77$vck44/va=1,8 2006.229.02:25:11.77#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.02:25:11.77#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.02:25:11.77#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:11.77#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:11.77#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:11.77#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:11.77#ibcon#enter wrdev, iclass 19, count 2 2006.229.02:25:11.77#ibcon#first serial, iclass 19, count 2 2006.229.02:25:11.77#ibcon#enter sib2, iclass 19, count 2 2006.229.02:25:11.77#ibcon#flushed, iclass 19, count 2 2006.229.02:25:11.77#ibcon#about to write, iclass 19, count 2 2006.229.02:25:11.77#ibcon#wrote, iclass 19, count 2 2006.229.02:25:11.77#ibcon#about to read 3, iclass 19, count 2 2006.229.02:25:11.80#ibcon#read 3, iclass 19, count 2 2006.229.02:25:11.80#ibcon#about to read 4, iclass 19, count 2 2006.229.02:25:11.80#ibcon#read 4, iclass 19, count 2 2006.229.02:25:11.80#ibcon#about to read 5, iclass 19, count 2 2006.229.02:25:11.80#ibcon#read 5, iclass 19, count 2 2006.229.02:25:11.80#ibcon#about to read 6, iclass 19, count 2 2006.229.02:25:11.80#ibcon#read 6, iclass 19, count 2 2006.229.02:25:11.80#ibcon#end of sib2, iclass 19, count 2 2006.229.02:25:11.80#ibcon#*mode == 0, iclass 19, count 2 2006.229.02:25:11.80#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.02:25:11.80#ibcon#[25=AT01-08\r\n] 2006.229.02:25:11.80#ibcon#*before write, iclass 19, count 2 2006.229.02:25:11.80#ibcon#enter sib2, iclass 19, count 2 2006.229.02:25:11.80#ibcon#flushed, iclass 19, count 2 2006.229.02:25:11.80#ibcon#about to write, iclass 19, count 2 2006.229.02:25:11.80#ibcon#wrote, iclass 19, count 2 2006.229.02:25:11.80#ibcon#about to read 3, iclass 19, count 2 2006.229.02:25:11.83#ibcon#read 3, iclass 19, count 2 2006.229.02:25:11.83#ibcon#about to read 4, iclass 19, count 2 2006.229.02:25:11.83#ibcon#read 4, iclass 19, count 2 2006.229.02:25:11.83#ibcon#about to read 5, iclass 19, count 2 2006.229.02:25:11.83#ibcon#read 5, iclass 19, count 2 2006.229.02:25:11.83#ibcon#about to read 6, iclass 19, count 2 2006.229.02:25:11.83#ibcon#read 6, iclass 19, count 2 2006.229.02:25:11.83#ibcon#end of sib2, iclass 19, count 2 2006.229.02:25:11.83#ibcon#*after write, iclass 19, count 2 2006.229.02:25:11.83#ibcon#*before return 0, iclass 19, count 2 2006.229.02:25:11.83#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:11.83#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:11.83#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.02:25:11.83#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:11.83#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:11.95#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:11.95#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:11.95#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:25:11.95#ibcon#first serial, iclass 19, count 0 2006.229.02:25:11.95#ibcon#enter sib2, iclass 19, count 0 2006.229.02:25:11.95#ibcon#flushed, iclass 19, count 0 2006.229.02:25:11.95#ibcon#about to write, iclass 19, count 0 2006.229.02:25:11.95#ibcon#wrote, iclass 19, count 0 2006.229.02:25:11.95#ibcon#about to read 3, iclass 19, count 0 2006.229.02:25:11.97#ibcon#read 3, iclass 19, count 0 2006.229.02:25:11.97#ibcon#about to read 4, iclass 19, count 0 2006.229.02:25:11.97#ibcon#read 4, iclass 19, count 0 2006.229.02:25:11.97#ibcon#about to read 5, iclass 19, count 0 2006.229.02:25:11.97#ibcon#read 5, iclass 19, count 0 2006.229.02:25:11.97#ibcon#about to read 6, iclass 19, count 0 2006.229.02:25:11.97#ibcon#read 6, iclass 19, count 0 2006.229.02:25:11.97#ibcon#end of sib2, iclass 19, count 0 2006.229.02:25:11.97#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:25:11.97#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:25:11.97#ibcon#[25=USB\r\n] 2006.229.02:25:11.97#ibcon#*before write, iclass 19, count 0 2006.229.02:25:11.97#ibcon#enter sib2, iclass 19, count 0 2006.229.02:25:11.97#ibcon#flushed, iclass 19, count 0 2006.229.02:25:11.97#ibcon#about to write, iclass 19, count 0 2006.229.02:25:11.97#ibcon#wrote, iclass 19, count 0 2006.229.02:25:11.97#ibcon#about to read 3, iclass 19, count 0 2006.229.02:25:12.00#ibcon#read 3, iclass 19, count 0 2006.229.02:25:12.00#ibcon#about to read 4, iclass 19, count 0 2006.229.02:25:12.00#ibcon#read 4, iclass 19, count 0 2006.229.02:25:12.00#ibcon#about to read 5, iclass 19, count 0 2006.229.02:25:12.00#ibcon#read 5, iclass 19, count 0 2006.229.02:25:12.00#ibcon#about to read 6, iclass 19, count 0 2006.229.02:25:12.00#ibcon#read 6, iclass 19, count 0 2006.229.02:25:12.00#ibcon#end of sib2, iclass 19, count 0 2006.229.02:25:12.00#ibcon#*after write, iclass 19, count 0 2006.229.02:25:12.00#ibcon#*before return 0, iclass 19, count 0 2006.229.02:25:12.00#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:12.00#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:12.00#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:25:12.00#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:25:12.00$vck44/valo=2,534.99 2006.229.02:25:12.00#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.02:25:12.00#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.02:25:12.00#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:12.00#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:12.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:12.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:12.00#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:25:12.00#ibcon#first serial, iclass 21, count 0 2006.229.02:25:12.00#ibcon#enter sib2, iclass 21, count 0 2006.229.02:25:12.00#ibcon#flushed, iclass 21, count 0 2006.229.02:25:12.00#ibcon#about to write, iclass 21, count 0 2006.229.02:25:12.00#ibcon#wrote, iclass 21, count 0 2006.229.02:25:12.00#ibcon#about to read 3, iclass 21, count 0 2006.229.02:25:12.02#ibcon#read 3, iclass 21, count 0 2006.229.02:25:12.02#ibcon#about to read 4, iclass 21, count 0 2006.229.02:25:12.02#ibcon#read 4, iclass 21, count 0 2006.229.02:25:12.02#ibcon#about to read 5, iclass 21, count 0 2006.229.02:25:12.02#ibcon#read 5, iclass 21, count 0 2006.229.02:25:12.02#ibcon#about to read 6, iclass 21, count 0 2006.229.02:25:12.02#ibcon#read 6, iclass 21, count 0 2006.229.02:25:12.02#ibcon#end of sib2, iclass 21, count 0 2006.229.02:25:12.02#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:25:12.02#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:25:12.02#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:25:12.02#ibcon#*before write, iclass 21, count 0 2006.229.02:25:12.02#ibcon#enter sib2, iclass 21, count 0 2006.229.02:25:12.02#ibcon#flushed, iclass 21, count 0 2006.229.02:25:12.02#ibcon#about to write, iclass 21, count 0 2006.229.02:25:12.02#ibcon#wrote, iclass 21, count 0 2006.229.02:25:12.02#ibcon#about to read 3, iclass 21, count 0 2006.229.02:25:12.06#ibcon#read 3, iclass 21, count 0 2006.229.02:25:12.06#ibcon#about to read 4, iclass 21, count 0 2006.229.02:25:12.06#ibcon#read 4, iclass 21, count 0 2006.229.02:25:12.06#ibcon#about to read 5, iclass 21, count 0 2006.229.02:25:12.06#ibcon#read 5, iclass 21, count 0 2006.229.02:25:12.06#ibcon#about to read 6, iclass 21, count 0 2006.229.02:25:12.06#ibcon#read 6, iclass 21, count 0 2006.229.02:25:12.06#ibcon#end of sib2, iclass 21, count 0 2006.229.02:25:12.06#ibcon#*after write, iclass 21, count 0 2006.229.02:25:12.06#ibcon#*before return 0, iclass 21, count 0 2006.229.02:25:12.06#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:12.06#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:12.06#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:25:12.06#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:25:12.06$vck44/va=2,7 2006.229.02:25:12.06#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.02:25:12.06#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.02:25:12.06#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:12.06#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:12.12#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:12.12#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:12.12#ibcon#enter wrdev, iclass 23, count 2 2006.229.02:25:12.12#ibcon#first serial, iclass 23, count 2 2006.229.02:25:12.12#ibcon#enter sib2, iclass 23, count 2 2006.229.02:25:12.12#ibcon#flushed, iclass 23, count 2 2006.229.02:25:12.12#ibcon#about to write, iclass 23, count 2 2006.229.02:25:12.12#ibcon#wrote, iclass 23, count 2 2006.229.02:25:12.12#ibcon#about to read 3, iclass 23, count 2 2006.229.02:25:12.14#ibcon#read 3, iclass 23, count 2 2006.229.02:25:12.14#ibcon#about to read 4, iclass 23, count 2 2006.229.02:25:12.14#ibcon#read 4, iclass 23, count 2 2006.229.02:25:12.14#ibcon#about to read 5, iclass 23, count 2 2006.229.02:25:12.14#ibcon#read 5, iclass 23, count 2 2006.229.02:25:12.14#ibcon#about to read 6, iclass 23, count 2 2006.229.02:25:12.14#ibcon#read 6, iclass 23, count 2 2006.229.02:25:12.14#ibcon#end of sib2, iclass 23, count 2 2006.229.02:25:12.14#ibcon#*mode == 0, iclass 23, count 2 2006.229.02:25:12.14#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.02:25:12.14#ibcon#[25=AT02-07\r\n] 2006.229.02:25:12.14#ibcon#*before write, iclass 23, count 2 2006.229.02:25:12.14#ibcon#enter sib2, iclass 23, count 2 2006.229.02:25:12.14#ibcon#flushed, iclass 23, count 2 2006.229.02:25:12.14#ibcon#about to write, iclass 23, count 2 2006.229.02:25:12.14#ibcon#wrote, iclass 23, count 2 2006.229.02:25:12.14#ibcon#about to read 3, iclass 23, count 2 2006.229.02:25:12.17#ibcon#read 3, iclass 23, count 2 2006.229.02:25:12.17#ibcon#about to read 4, iclass 23, count 2 2006.229.02:25:12.17#ibcon#read 4, iclass 23, count 2 2006.229.02:25:12.17#ibcon#about to read 5, iclass 23, count 2 2006.229.02:25:12.17#ibcon#read 5, iclass 23, count 2 2006.229.02:25:12.17#ibcon#about to read 6, iclass 23, count 2 2006.229.02:25:12.17#ibcon#read 6, iclass 23, count 2 2006.229.02:25:12.17#ibcon#end of sib2, iclass 23, count 2 2006.229.02:25:12.17#ibcon#*after write, iclass 23, count 2 2006.229.02:25:12.17#ibcon#*before return 0, iclass 23, count 2 2006.229.02:25:12.17#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:12.17#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:12.17#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.02:25:12.17#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:12.17#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:12.29#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:12.29#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:12.29#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:25:12.29#ibcon#first serial, iclass 23, count 0 2006.229.02:25:12.29#ibcon#enter sib2, iclass 23, count 0 2006.229.02:25:12.29#ibcon#flushed, iclass 23, count 0 2006.229.02:25:12.29#ibcon#about to write, iclass 23, count 0 2006.229.02:25:12.29#ibcon#wrote, iclass 23, count 0 2006.229.02:25:12.29#ibcon#about to read 3, iclass 23, count 0 2006.229.02:25:12.31#ibcon#read 3, iclass 23, count 0 2006.229.02:25:12.31#ibcon#about to read 4, iclass 23, count 0 2006.229.02:25:12.31#ibcon#read 4, iclass 23, count 0 2006.229.02:25:12.31#ibcon#about to read 5, iclass 23, count 0 2006.229.02:25:12.31#ibcon#read 5, iclass 23, count 0 2006.229.02:25:12.31#ibcon#about to read 6, iclass 23, count 0 2006.229.02:25:12.31#ibcon#read 6, iclass 23, count 0 2006.229.02:25:12.31#ibcon#end of sib2, iclass 23, count 0 2006.229.02:25:12.31#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:25:12.31#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:25:12.31#ibcon#[25=USB\r\n] 2006.229.02:25:12.31#ibcon#*before write, iclass 23, count 0 2006.229.02:25:12.31#ibcon#enter sib2, iclass 23, count 0 2006.229.02:25:12.31#ibcon#flushed, iclass 23, count 0 2006.229.02:25:12.31#ibcon#about to write, iclass 23, count 0 2006.229.02:25:12.31#ibcon#wrote, iclass 23, count 0 2006.229.02:25:12.31#ibcon#about to read 3, iclass 23, count 0 2006.229.02:25:12.34#ibcon#read 3, iclass 23, count 0 2006.229.02:25:12.34#ibcon#about to read 4, iclass 23, count 0 2006.229.02:25:12.34#ibcon#read 4, iclass 23, count 0 2006.229.02:25:12.34#ibcon#about to read 5, iclass 23, count 0 2006.229.02:25:12.34#ibcon#read 5, iclass 23, count 0 2006.229.02:25:12.34#ibcon#about to read 6, iclass 23, count 0 2006.229.02:25:12.34#ibcon#read 6, iclass 23, count 0 2006.229.02:25:12.34#ibcon#end of sib2, iclass 23, count 0 2006.229.02:25:12.34#ibcon#*after write, iclass 23, count 0 2006.229.02:25:12.34#ibcon#*before return 0, iclass 23, count 0 2006.229.02:25:12.34#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:12.34#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:12.34#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:25:12.34#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:25:12.34$vck44/valo=3,564.99 2006.229.02:25:12.34#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.02:25:12.34#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.02:25:12.34#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:12.34#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:12.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:12.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:12.34#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:25:12.34#ibcon#first serial, iclass 25, count 0 2006.229.02:25:12.34#ibcon#enter sib2, iclass 25, count 0 2006.229.02:25:12.34#ibcon#flushed, iclass 25, count 0 2006.229.02:25:12.34#ibcon#about to write, iclass 25, count 0 2006.229.02:25:12.34#ibcon#wrote, iclass 25, count 0 2006.229.02:25:12.34#ibcon#about to read 3, iclass 25, count 0 2006.229.02:25:12.36#ibcon#read 3, iclass 25, count 0 2006.229.02:25:12.36#ibcon#about to read 4, iclass 25, count 0 2006.229.02:25:12.36#ibcon#read 4, iclass 25, count 0 2006.229.02:25:12.36#ibcon#about to read 5, iclass 25, count 0 2006.229.02:25:12.36#ibcon#read 5, iclass 25, count 0 2006.229.02:25:12.36#ibcon#about to read 6, iclass 25, count 0 2006.229.02:25:12.36#ibcon#read 6, iclass 25, count 0 2006.229.02:25:12.36#ibcon#end of sib2, iclass 25, count 0 2006.229.02:25:12.36#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:25:12.36#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:25:12.36#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:25:12.36#ibcon#*before write, iclass 25, count 0 2006.229.02:25:12.36#ibcon#enter sib2, iclass 25, count 0 2006.229.02:25:12.36#ibcon#flushed, iclass 25, count 0 2006.229.02:25:12.36#ibcon#about to write, iclass 25, count 0 2006.229.02:25:12.36#ibcon#wrote, iclass 25, count 0 2006.229.02:25:12.36#ibcon#about to read 3, iclass 25, count 0 2006.229.02:25:12.40#ibcon#read 3, iclass 25, count 0 2006.229.02:25:12.40#ibcon#about to read 4, iclass 25, count 0 2006.229.02:25:12.40#ibcon#read 4, iclass 25, count 0 2006.229.02:25:12.40#ibcon#about to read 5, iclass 25, count 0 2006.229.02:25:12.40#ibcon#read 5, iclass 25, count 0 2006.229.02:25:12.40#ibcon#about to read 6, iclass 25, count 0 2006.229.02:25:12.40#ibcon#read 6, iclass 25, count 0 2006.229.02:25:12.40#ibcon#end of sib2, iclass 25, count 0 2006.229.02:25:12.40#ibcon#*after write, iclass 25, count 0 2006.229.02:25:12.40#ibcon#*before return 0, iclass 25, count 0 2006.229.02:25:12.40#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:12.40#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:12.40#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:25:12.40#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:25:12.40$vck44/va=3,6 2006.229.02:25:12.40#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.02:25:12.40#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.02:25:12.40#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:12.40#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:12.46#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:12.46#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:12.46#ibcon#enter wrdev, iclass 27, count 2 2006.229.02:25:12.46#ibcon#first serial, iclass 27, count 2 2006.229.02:25:12.46#ibcon#enter sib2, iclass 27, count 2 2006.229.02:25:12.46#ibcon#flushed, iclass 27, count 2 2006.229.02:25:12.46#ibcon#about to write, iclass 27, count 2 2006.229.02:25:12.46#ibcon#wrote, iclass 27, count 2 2006.229.02:25:12.46#ibcon#about to read 3, iclass 27, count 2 2006.229.02:25:12.48#ibcon#read 3, iclass 27, count 2 2006.229.02:25:12.48#ibcon#about to read 4, iclass 27, count 2 2006.229.02:25:12.48#ibcon#read 4, iclass 27, count 2 2006.229.02:25:12.48#ibcon#about to read 5, iclass 27, count 2 2006.229.02:25:12.48#ibcon#read 5, iclass 27, count 2 2006.229.02:25:12.48#ibcon#about to read 6, iclass 27, count 2 2006.229.02:25:12.48#ibcon#read 6, iclass 27, count 2 2006.229.02:25:12.48#ibcon#end of sib2, iclass 27, count 2 2006.229.02:25:12.48#ibcon#*mode == 0, iclass 27, count 2 2006.229.02:25:12.48#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.02:25:12.48#ibcon#[25=AT03-06\r\n] 2006.229.02:25:12.48#ibcon#*before write, iclass 27, count 2 2006.229.02:25:12.48#ibcon#enter sib2, iclass 27, count 2 2006.229.02:25:12.48#ibcon#flushed, iclass 27, count 2 2006.229.02:25:12.48#ibcon#about to write, iclass 27, count 2 2006.229.02:25:12.48#ibcon#wrote, iclass 27, count 2 2006.229.02:25:12.48#ibcon#about to read 3, iclass 27, count 2 2006.229.02:25:12.51#ibcon#read 3, iclass 27, count 2 2006.229.02:25:12.51#ibcon#about to read 4, iclass 27, count 2 2006.229.02:25:12.51#ibcon#read 4, iclass 27, count 2 2006.229.02:25:12.51#ibcon#about to read 5, iclass 27, count 2 2006.229.02:25:12.51#ibcon#read 5, iclass 27, count 2 2006.229.02:25:12.51#ibcon#about to read 6, iclass 27, count 2 2006.229.02:25:12.51#ibcon#read 6, iclass 27, count 2 2006.229.02:25:12.51#ibcon#end of sib2, iclass 27, count 2 2006.229.02:25:12.51#ibcon#*after write, iclass 27, count 2 2006.229.02:25:12.51#ibcon#*before return 0, iclass 27, count 2 2006.229.02:25:12.51#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:12.51#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:12.51#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.02:25:12.51#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:12.51#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:12.63#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:12.63#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:12.63#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:25:12.63#ibcon#first serial, iclass 27, count 0 2006.229.02:25:12.63#ibcon#enter sib2, iclass 27, count 0 2006.229.02:25:12.63#ibcon#flushed, iclass 27, count 0 2006.229.02:25:12.63#ibcon#about to write, iclass 27, count 0 2006.229.02:25:12.63#ibcon#wrote, iclass 27, count 0 2006.229.02:25:12.63#ibcon#about to read 3, iclass 27, count 0 2006.229.02:25:12.65#ibcon#read 3, iclass 27, count 0 2006.229.02:25:12.65#ibcon#about to read 4, iclass 27, count 0 2006.229.02:25:12.65#ibcon#read 4, iclass 27, count 0 2006.229.02:25:12.65#ibcon#about to read 5, iclass 27, count 0 2006.229.02:25:12.65#ibcon#read 5, iclass 27, count 0 2006.229.02:25:12.65#ibcon#about to read 6, iclass 27, count 0 2006.229.02:25:12.65#ibcon#read 6, iclass 27, count 0 2006.229.02:25:12.65#ibcon#end of sib2, iclass 27, count 0 2006.229.02:25:12.65#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:25:12.65#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:25:12.65#ibcon#[25=USB\r\n] 2006.229.02:25:12.65#ibcon#*before write, iclass 27, count 0 2006.229.02:25:12.65#ibcon#enter sib2, iclass 27, count 0 2006.229.02:25:12.65#ibcon#flushed, iclass 27, count 0 2006.229.02:25:12.65#ibcon#about to write, iclass 27, count 0 2006.229.02:25:12.65#ibcon#wrote, iclass 27, count 0 2006.229.02:25:12.65#ibcon#about to read 3, iclass 27, count 0 2006.229.02:25:12.68#ibcon#read 3, iclass 27, count 0 2006.229.02:25:12.68#ibcon#about to read 4, iclass 27, count 0 2006.229.02:25:12.68#ibcon#read 4, iclass 27, count 0 2006.229.02:25:12.68#ibcon#about to read 5, iclass 27, count 0 2006.229.02:25:12.68#ibcon#read 5, iclass 27, count 0 2006.229.02:25:12.68#ibcon#about to read 6, iclass 27, count 0 2006.229.02:25:12.68#ibcon#read 6, iclass 27, count 0 2006.229.02:25:12.68#ibcon#end of sib2, iclass 27, count 0 2006.229.02:25:12.68#ibcon#*after write, iclass 27, count 0 2006.229.02:25:12.68#ibcon#*before return 0, iclass 27, count 0 2006.229.02:25:12.68#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:12.68#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:12.68#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:25:12.68#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:25:12.68$vck44/valo=4,624.99 2006.229.02:25:12.68#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.02:25:12.68#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.02:25:12.68#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:12.68#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:12.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:12.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:12.68#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:25:12.68#ibcon#first serial, iclass 29, count 0 2006.229.02:25:12.68#ibcon#enter sib2, iclass 29, count 0 2006.229.02:25:12.68#ibcon#flushed, iclass 29, count 0 2006.229.02:25:12.68#ibcon#about to write, iclass 29, count 0 2006.229.02:25:12.68#ibcon#wrote, iclass 29, count 0 2006.229.02:25:12.68#ibcon#about to read 3, iclass 29, count 0 2006.229.02:25:12.70#ibcon#read 3, iclass 29, count 0 2006.229.02:25:12.70#ibcon#about to read 4, iclass 29, count 0 2006.229.02:25:12.70#ibcon#read 4, iclass 29, count 0 2006.229.02:25:12.70#ibcon#about to read 5, iclass 29, count 0 2006.229.02:25:12.70#ibcon#read 5, iclass 29, count 0 2006.229.02:25:12.70#ibcon#about to read 6, iclass 29, count 0 2006.229.02:25:12.70#ibcon#read 6, iclass 29, count 0 2006.229.02:25:12.70#ibcon#end of sib2, iclass 29, count 0 2006.229.02:25:12.70#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:25:12.70#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:25:12.70#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:25:12.70#ibcon#*before write, iclass 29, count 0 2006.229.02:25:12.70#ibcon#enter sib2, iclass 29, count 0 2006.229.02:25:12.70#ibcon#flushed, iclass 29, count 0 2006.229.02:25:12.70#ibcon#about to write, iclass 29, count 0 2006.229.02:25:12.70#ibcon#wrote, iclass 29, count 0 2006.229.02:25:12.70#ibcon#about to read 3, iclass 29, count 0 2006.229.02:25:12.74#ibcon#read 3, iclass 29, count 0 2006.229.02:25:12.74#ibcon#about to read 4, iclass 29, count 0 2006.229.02:25:12.74#ibcon#read 4, iclass 29, count 0 2006.229.02:25:12.74#ibcon#about to read 5, iclass 29, count 0 2006.229.02:25:12.74#ibcon#read 5, iclass 29, count 0 2006.229.02:25:12.74#ibcon#about to read 6, iclass 29, count 0 2006.229.02:25:12.74#ibcon#read 6, iclass 29, count 0 2006.229.02:25:12.74#ibcon#end of sib2, iclass 29, count 0 2006.229.02:25:12.74#ibcon#*after write, iclass 29, count 0 2006.229.02:25:12.74#ibcon#*before return 0, iclass 29, count 0 2006.229.02:25:12.74#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:12.74#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:12.74#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:25:12.74#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:25:12.74$vck44/va=4,7 2006.229.02:25:12.74#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.02:25:12.74#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.02:25:12.74#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:12.74#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:12.80#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:12.80#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:12.80#ibcon#enter wrdev, iclass 31, count 2 2006.229.02:25:12.80#ibcon#first serial, iclass 31, count 2 2006.229.02:25:12.80#ibcon#enter sib2, iclass 31, count 2 2006.229.02:25:12.80#ibcon#flushed, iclass 31, count 2 2006.229.02:25:12.80#ibcon#about to write, iclass 31, count 2 2006.229.02:25:12.80#ibcon#wrote, iclass 31, count 2 2006.229.02:25:12.80#ibcon#about to read 3, iclass 31, count 2 2006.229.02:25:12.82#ibcon#read 3, iclass 31, count 2 2006.229.02:25:12.82#ibcon#about to read 4, iclass 31, count 2 2006.229.02:25:12.82#ibcon#read 4, iclass 31, count 2 2006.229.02:25:12.82#ibcon#about to read 5, iclass 31, count 2 2006.229.02:25:12.82#ibcon#read 5, iclass 31, count 2 2006.229.02:25:12.82#ibcon#about to read 6, iclass 31, count 2 2006.229.02:25:12.82#ibcon#read 6, iclass 31, count 2 2006.229.02:25:12.82#ibcon#end of sib2, iclass 31, count 2 2006.229.02:25:12.82#ibcon#*mode == 0, iclass 31, count 2 2006.229.02:25:12.82#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.02:25:12.82#ibcon#[25=AT04-07\r\n] 2006.229.02:25:12.82#ibcon#*before write, iclass 31, count 2 2006.229.02:25:12.82#ibcon#enter sib2, iclass 31, count 2 2006.229.02:25:12.82#ibcon#flushed, iclass 31, count 2 2006.229.02:25:12.82#ibcon#about to write, iclass 31, count 2 2006.229.02:25:12.82#ibcon#wrote, iclass 31, count 2 2006.229.02:25:12.82#ibcon#about to read 3, iclass 31, count 2 2006.229.02:25:12.85#ibcon#read 3, iclass 31, count 2 2006.229.02:25:12.85#ibcon#about to read 4, iclass 31, count 2 2006.229.02:25:12.85#ibcon#read 4, iclass 31, count 2 2006.229.02:25:12.85#ibcon#about to read 5, iclass 31, count 2 2006.229.02:25:12.85#ibcon#read 5, iclass 31, count 2 2006.229.02:25:12.85#ibcon#about to read 6, iclass 31, count 2 2006.229.02:25:12.85#ibcon#read 6, iclass 31, count 2 2006.229.02:25:12.85#ibcon#end of sib2, iclass 31, count 2 2006.229.02:25:12.85#ibcon#*after write, iclass 31, count 2 2006.229.02:25:12.85#ibcon#*before return 0, iclass 31, count 2 2006.229.02:25:12.85#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:12.85#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:12.85#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.02:25:12.85#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:12.85#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:12.97#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:12.97#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:12.97#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:25:12.97#ibcon#first serial, iclass 31, count 0 2006.229.02:25:12.97#ibcon#enter sib2, iclass 31, count 0 2006.229.02:25:12.97#ibcon#flushed, iclass 31, count 0 2006.229.02:25:12.97#ibcon#about to write, iclass 31, count 0 2006.229.02:25:12.97#ibcon#wrote, iclass 31, count 0 2006.229.02:25:12.97#ibcon#about to read 3, iclass 31, count 0 2006.229.02:25:12.99#ibcon#read 3, iclass 31, count 0 2006.229.02:25:12.99#ibcon#about to read 4, iclass 31, count 0 2006.229.02:25:12.99#ibcon#read 4, iclass 31, count 0 2006.229.02:25:12.99#ibcon#about to read 5, iclass 31, count 0 2006.229.02:25:12.99#ibcon#read 5, iclass 31, count 0 2006.229.02:25:12.99#ibcon#about to read 6, iclass 31, count 0 2006.229.02:25:12.99#ibcon#read 6, iclass 31, count 0 2006.229.02:25:12.99#ibcon#end of sib2, iclass 31, count 0 2006.229.02:25:12.99#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:25:12.99#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:25:12.99#ibcon#[25=USB\r\n] 2006.229.02:25:12.99#ibcon#*before write, iclass 31, count 0 2006.229.02:25:12.99#ibcon#enter sib2, iclass 31, count 0 2006.229.02:25:12.99#ibcon#flushed, iclass 31, count 0 2006.229.02:25:12.99#ibcon#about to write, iclass 31, count 0 2006.229.02:25:12.99#ibcon#wrote, iclass 31, count 0 2006.229.02:25:12.99#ibcon#about to read 3, iclass 31, count 0 2006.229.02:25:13.02#ibcon#read 3, iclass 31, count 0 2006.229.02:25:13.02#ibcon#about to read 4, iclass 31, count 0 2006.229.02:25:13.02#ibcon#read 4, iclass 31, count 0 2006.229.02:25:13.02#ibcon#about to read 5, iclass 31, count 0 2006.229.02:25:13.02#ibcon#read 5, iclass 31, count 0 2006.229.02:25:13.02#ibcon#about to read 6, iclass 31, count 0 2006.229.02:25:13.02#ibcon#read 6, iclass 31, count 0 2006.229.02:25:13.02#ibcon#end of sib2, iclass 31, count 0 2006.229.02:25:13.02#ibcon#*after write, iclass 31, count 0 2006.229.02:25:13.02#ibcon#*before return 0, iclass 31, count 0 2006.229.02:25:13.02#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:13.02#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:13.02#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:25:13.02#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:25:13.02$vck44/valo=5,734.99 2006.229.02:25:13.02#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.02:25:13.02#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.02:25:13.02#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:13.02#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:13.02#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:13.02#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:13.02#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:25:13.02#ibcon#first serial, iclass 33, count 0 2006.229.02:25:13.02#ibcon#enter sib2, iclass 33, count 0 2006.229.02:25:13.02#ibcon#flushed, iclass 33, count 0 2006.229.02:25:13.02#ibcon#about to write, iclass 33, count 0 2006.229.02:25:13.02#ibcon#wrote, iclass 33, count 0 2006.229.02:25:13.02#ibcon#about to read 3, iclass 33, count 0 2006.229.02:25:13.04#ibcon#read 3, iclass 33, count 0 2006.229.02:25:13.04#ibcon#about to read 4, iclass 33, count 0 2006.229.02:25:13.04#ibcon#read 4, iclass 33, count 0 2006.229.02:25:13.04#ibcon#about to read 5, iclass 33, count 0 2006.229.02:25:13.04#ibcon#read 5, iclass 33, count 0 2006.229.02:25:13.04#ibcon#about to read 6, iclass 33, count 0 2006.229.02:25:13.04#ibcon#read 6, iclass 33, count 0 2006.229.02:25:13.04#ibcon#end of sib2, iclass 33, count 0 2006.229.02:25:13.04#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:25:13.04#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:25:13.04#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:25:13.04#ibcon#*before write, iclass 33, count 0 2006.229.02:25:13.04#ibcon#enter sib2, iclass 33, count 0 2006.229.02:25:13.04#ibcon#flushed, iclass 33, count 0 2006.229.02:25:13.04#ibcon#about to write, iclass 33, count 0 2006.229.02:25:13.04#ibcon#wrote, iclass 33, count 0 2006.229.02:25:13.04#ibcon#about to read 3, iclass 33, count 0 2006.229.02:25:13.08#ibcon#read 3, iclass 33, count 0 2006.229.02:25:13.08#ibcon#about to read 4, iclass 33, count 0 2006.229.02:25:13.08#ibcon#read 4, iclass 33, count 0 2006.229.02:25:13.08#ibcon#about to read 5, iclass 33, count 0 2006.229.02:25:13.08#ibcon#read 5, iclass 33, count 0 2006.229.02:25:13.08#ibcon#about to read 6, iclass 33, count 0 2006.229.02:25:13.08#ibcon#read 6, iclass 33, count 0 2006.229.02:25:13.08#ibcon#end of sib2, iclass 33, count 0 2006.229.02:25:13.08#ibcon#*after write, iclass 33, count 0 2006.229.02:25:13.08#ibcon#*before return 0, iclass 33, count 0 2006.229.02:25:13.08#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:13.08#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:13.08#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:25:13.08#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:25:13.08$vck44/va=5,4 2006.229.02:25:13.08#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.02:25:13.08#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.02:25:13.08#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:13.08#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:13.14#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:13.14#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:13.14#ibcon#enter wrdev, iclass 35, count 2 2006.229.02:25:13.14#ibcon#first serial, iclass 35, count 2 2006.229.02:25:13.14#ibcon#enter sib2, iclass 35, count 2 2006.229.02:25:13.14#ibcon#flushed, iclass 35, count 2 2006.229.02:25:13.14#ibcon#about to write, iclass 35, count 2 2006.229.02:25:13.14#ibcon#wrote, iclass 35, count 2 2006.229.02:25:13.14#ibcon#about to read 3, iclass 35, count 2 2006.229.02:25:13.16#ibcon#read 3, iclass 35, count 2 2006.229.02:25:13.16#ibcon#about to read 4, iclass 35, count 2 2006.229.02:25:13.16#ibcon#read 4, iclass 35, count 2 2006.229.02:25:13.16#ibcon#about to read 5, iclass 35, count 2 2006.229.02:25:13.16#ibcon#read 5, iclass 35, count 2 2006.229.02:25:13.16#ibcon#about to read 6, iclass 35, count 2 2006.229.02:25:13.16#ibcon#read 6, iclass 35, count 2 2006.229.02:25:13.16#ibcon#end of sib2, iclass 35, count 2 2006.229.02:25:13.16#ibcon#*mode == 0, iclass 35, count 2 2006.229.02:25:13.16#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.02:25:13.16#ibcon#[25=AT05-04\r\n] 2006.229.02:25:13.16#ibcon#*before write, iclass 35, count 2 2006.229.02:25:13.16#ibcon#enter sib2, iclass 35, count 2 2006.229.02:25:13.16#ibcon#flushed, iclass 35, count 2 2006.229.02:25:13.16#ibcon#about to write, iclass 35, count 2 2006.229.02:25:13.16#ibcon#wrote, iclass 35, count 2 2006.229.02:25:13.16#ibcon#about to read 3, iclass 35, count 2 2006.229.02:25:13.19#ibcon#read 3, iclass 35, count 2 2006.229.02:25:13.19#ibcon#about to read 4, iclass 35, count 2 2006.229.02:25:13.19#ibcon#read 4, iclass 35, count 2 2006.229.02:25:13.19#ibcon#about to read 5, iclass 35, count 2 2006.229.02:25:13.19#ibcon#read 5, iclass 35, count 2 2006.229.02:25:13.19#ibcon#about to read 6, iclass 35, count 2 2006.229.02:25:13.19#ibcon#read 6, iclass 35, count 2 2006.229.02:25:13.19#ibcon#end of sib2, iclass 35, count 2 2006.229.02:25:13.19#ibcon#*after write, iclass 35, count 2 2006.229.02:25:13.19#ibcon#*before return 0, iclass 35, count 2 2006.229.02:25:13.19#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:13.19#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:13.19#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.02:25:13.19#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:13.19#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:13.20#abcon#<5=/06 3.6 7.2 29.481001001.2\r\n> 2006.229.02:25:13.22#abcon#{5=INTERFACE CLEAR} 2006.229.02:25:13.28#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:25:13.31#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:13.31#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:13.31#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:25:13.31#ibcon#first serial, iclass 35, count 0 2006.229.02:25:13.31#ibcon#enter sib2, iclass 35, count 0 2006.229.02:25:13.31#ibcon#flushed, iclass 35, count 0 2006.229.02:25:13.31#ibcon#about to write, iclass 35, count 0 2006.229.02:25:13.31#ibcon#wrote, iclass 35, count 0 2006.229.02:25:13.31#ibcon#about to read 3, iclass 35, count 0 2006.229.02:25:13.33#ibcon#read 3, iclass 35, count 0 2006.229.02:25:13.33#ibcon#about to read 4, iclass 35, count 0 2006.229.02:25:13.33#ibcon#read 4, iclass 35, count 0 2006.229.02:25:13.33#ibcon#about to read 5, iclass 35, count 0 2006.229.02:25:13.33#ibcon#read 5, iclass 35, count 0 2006.229.02:25:13.33#ibcon#about to read 6, iclass 35, count 0 2006.229.02:25:13.33#ibcon#read 6, iclass 35, count 0 2006.229.02:25:13.33#ibcon#end of sib2, iclass 35, count 0 2006.229.02:25:13.33#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:25:13.33#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:25:13.33#ibcon#[25=USB\r\n] 2006.229.02:25:13.33#ibcon#*before write, iclass 35, count 0 2006.229.02:25:13.33#ibcon#enter sib2, iclass 35, count 0 2006.229.02:25:13.33#ibcon#flushed, iclass 35, count 0 2006.229.02:25:13.33#ibcon#about to write, iclass 35, count 0 2006.229.02:25:13.33#ibcon#wrote, iclass 35, count 0 2006.229.02:25:13.33#ibcon#about to read 3, iclass 35, count 0 2006.229.02:25:13.36#ibcon#read 3, iclass 35, count 0 2006.229.02:25:13.36#ibcon#about to read 4, iclass 35, count 0 2006.229.02:25:13.36#ibcon#read 4, iclass 35, count 0 2006.229.02:25:13.36#ibcon#about to read 5, iclass 35, count 0 2006.229.02:25:13.36#ibcon#read 5, iclass 35, count 0 2006.229.02:25:13.36#ibcon#about to read 6, iclass 35, count 0 2006.229.02:25:13.36#ibcon#read 6, iclass 35, count 0 2006.229.02:25:13.36#ibcon#end of sib2, iclass 35, count 0 2006.229.02:25:13.36#ibcon#*after write, iclass 35, count 0 2006.229.02:25:13.36#ibcon#*before return 0, iclass 35, count 0 2006.229.02:25:13.36#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:13.36#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:13.36#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:25:13.36#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:25:13.36$vck44/valo=6,814.99 2006.229.02:25:13.36#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.02:25:13.36#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.02:25:13.36#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:13.36#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:13.36#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:13.36#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:13.36#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:25:13.36#ibcon#first serial, iclass 3, count 0 2006.229.02:25:13.36#ibcon#enter sib2, iclass 3, count 0 2006.229.02:25:13.36#ibcon#flushed, iclass 3, count 0 2006.229.02:25:13.36#ibcon#about to write, iclass 3, count 0 2006.229.02:25:13.36#ibcon#wrote, iclass 3, count 0 2006.229.02:25:13.36#ibcon#about to read 3, iclass 3, count 0 2006.229.02:25:13.38#ibcon#read 3, iclass 3, count 0 2006.229.02:25:13.38#ibcon#about to read 4, iclass 3, count 0 2006.229.02:25:13.38#ibcon#read 4, iclass 3, count 0 2006.229.02:25:13.38#ibcon#about to read 5, iclass 3, count 0 2006.229.02:25:13.38#ibcon#read 5, iclass 3, count 0 2006.229.02:25:13.38#ibcon#about to read 6, iclass 3, count 0 2006.229.02:25:13.38#ibcon#read 6, iclass 3, count 0 2006.229.02:25:13.38#ibcon#end of sib2, iclass 3, count 0 2006.229.02:25:13.38#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:25:13.38#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:25:13.38#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:25:13.38#ibcon#*before write, iclass 3, count 0 2006.229.02:25:13.38#ibcon#enter sib2, iclass 3, count 0 2006.229.02:25:13.38#ibcon#flushed, iclass 3, count 0 2006.229.02:25:13.38#ibcon#about to write, iclass 3, count 0 2006.229.02:25:13.38#ibcon#wrote, iclass 3, count 0 2006.229.02:25:13.38#ibcon#about to read 3, iclass 3, count 0 2006.229.02:25:13.42#ibcon#read 3, iclass 3, count 0 2006.229.02:25:13.42#ibcon#about to read 4, iclass 3, count 0 2006.229.02:25:13.42#ibcon#read 4, iclass 3, count 0 2006.229.02:25:13.42#ibcon#about to read 5, iclass 3, count 0 2006.229.02:25:13.42#ibcon#read 5, iclass 3, count 0 2006.229.02:25:13.42#ibcon#about to read 6, iclass 3, count 0 2006.229.02:25:13.42#ibcon#read 6, iclass 3, count 0 2006.229.02:25:13.42#ibcon#end of sib2, iclass 3, count 0 2006.229.02:25:13.42#ibcon#*after write, iclass 3, count 0 2006.229.02:25:13.42#ibcon#*before return 0, iclass 3, count 0 2006.229.02:25:13.42#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:13.42#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:13.42#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:25:13.42#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:25:13.42$vck44/va=6,4 2006.229.02:25:13.42#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.02:25:13.42#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.02:25:13.42#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:13.42#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:13.48#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:13.48#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:13.48#ibcon#enter wrdev, iclass 5, count 2 2006.229.02:25:13.48#ibcon#first serial, iclass 5, count 2 2006.229.02:25:13.48#ibcon#enter sib2, iclass 5, count 2 2006.229.02:25:13.48#ibcon#flushed, iclass 5, count 2 2006.229.02:25:13.48#ibcon#about to write, iclass 5, count 2 2006.229.02:25:13.48#ibcon#wrote, iclass 5, count 2 2006.229.02:25:13.48#ibcon#about to read 3, iclass 5, count 2 2006.229.02:25:13.50#ibcon#read 3, iclass 5, count 2 2006.229.02:25:13.50#ibcon#about to read 4, iclass 5, count 2 2006.229.02:25:13.50#ibcon#read 4, iclass 5, count 2 2006.229.02:25:13.50#ibcon#about to read 5, iclass 5, count 2 2006.229.02:25:13.50#ibcon#read 5, iclass 5, count 2 2006.229.02:25:13.50#ibcon#about to read 6, iclass 5, count 2 2006.229.02:25:13.50#ibcon#read 6, iclass 5, count 2 2006.229.02:25:13.50#ibcon#end of sib2, iclass 5, count 2 2006.229.02:25:13.50#ibcon#*mode == 0, iclass 5, count 2 2006.229.02:25:13.50#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.02:25:13.50#ibcon#[25=AT06-04\r\n] 2006.229.02:25:13.50#ibcon#*before write, iclass 5, count 2 2006.229.02:25:13.50#ibcon#enter sib2, iclass 5, count 2 2006.229.02:25:13.50#ibcon#flushed, iclass 5, count 2 2006.229.02:25:13.50#ibcon#about to write, iclass 5, count 2 2006.229.02:25:13.50#ibcon#wrote, iclass 5, count 2 2006.229.02:25:13.50#ibcon#about to read 3, iclass 5, count 2 2006.229.02:25:13.53#ibcon#read 3, iclass 5, count 2 2006.229.02:25:13.53#ibcon#about to read 4, iclass 5, count 2 2006.229.02:25:13.53#ibcon#read 4, iclass 5, count 2 2006.229.02:25:13.53#ibcon#about to read 5, iclass 5, count 2 2006.229.02:25:13.53#ibcon#read 5, iclass 5, count 2 2006.229.02:25:13.53#ibcon#about to read 6, iclass 5, count 2 2006.229.02:25:13.53#ibcon#read 6, iclass 5, count 2 2006.229.02:25:13.53#ibcon#end of sib2, iclass 5, count 2 2006.229.02:25:13.53#ibcon#*after write, iclass 5, count 2 2006.229.02:25:13.53#ibcon#*before return 0, iclass 5, count 2 2006.229.02:25:13.53#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:13.53#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:13.53#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.02:25:13.53#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:13.53#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:13.65#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:13.65#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:13.65#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:25:13.65#ibcon#first serial, iclass 5, count 0 2006.229.02:25:13.65#ibcon#enter sib2, iclass 5, count 0 2006.229.02:25:13.65#ibcon#flushed, iclass 5, count 0 2006.229.02:25:13.65#ibcon#about to write, iclass 5, count 0 2006.229.02:25:13.65#ibcon#wrote, iclass 5, count 0 2006.229.02:25:13.65#ibcon#about to read 3, iclass 5, count 0 2006.229.02:25:13.67#ibcon#read 3, iclass 5, count 0 2006.229.02:25:13.67#ibcon#about to read 4, iclass 5, count 0 2006.229.02:25:13.67#ibcon#read 4, iclass 5, count 0 2006.229.02:25:13.67#ibcon#about to read 5, iclass 5, count 0 2006.229.02:25:13.67#ibcon#read 5, iclass 5, count 0 2006.229.02:25:13.67#ibcon#about to read 6, iclass 5, count 0 2006.229.02:25:13.67#ibcon#read 6, iclass 5, count 0 2006.229.02:25:13.67#ibcon#end of sib2, iclass 5, count 0 2006.229.02:25:13.67#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:25:13.67#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:25:13.67#ibcon#[25=USB\r\n] 2006.229.02:25:13.67#ibcon#*before write, iclass 5, count 0 2006.229.02:25:13.67#ibcon#enter sib2, iclass 5, count 0 2006.229.02:25:13.67#ibcon#flushed, iclass 5, count 0 2006.229.02:25:13.67#ibcon#about to write, iclass 5, count 0 2006.229.02:25:13.67#ibcon#wrote, iclass 5, count 0 2006.229.02:25:13.67#ibcon#about to read 3, iclass 5, count 0 2006.229.02:25:13.70#ibcon#read 3, iclass 5, count 0 2006.229.02:25:13.70#ibcon#about to read 4, iclass 5, count 0 2006.229.02:25:13.70#ibcon#read 4, iclass 5, count 0 2006.229.02:25:13.70#ibcon#about to read 5, iclass 5, count 0 2006.229.02:25:13.70#ibcon#read 5, iclass 5, count 0 2006.229.02:25:13.70#ibcon#about to read 6, iclass 5, count 0 2006.229.02:25:13.70#ibcon#read 6, iclass 5, count 0 2006.229.02:25:13.70#ibcon#end of sib2, iclass 5, count 0 2006.229.02:25:13.70#ibcon#*after write, iclass 5, count 0 2006.229.02:25:13.70#ibcon#*before return 0, iclass 5, count 0 2006.229.02:25:13.70#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:13.70#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:13.70#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:25:13.70#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:25:13.70$vck44/valo=7,864.99 2006.229.02:25:13.70#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.02:25:13.70#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.02:25:13.70#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:13.70#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:13.70#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:13.70#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:13.70#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:25:13.70#ibcon#first serial, iclass 7, count 0 2006.229.02:25:13.70#ibcon#enter sib2, iclass 7, count 0 2006.229.02:25:13.70#ibcon#flushed, iclass 7, count 0 2006.229.02:25:13.70#ibcon#about to write, iclass 7, count 0 2006.229.02:25:13.70#ibcon#wrote, iclass 7, count 0 2006.229.02:25:13.70#ibcon#about to read 3, iclass 7, count 0 2006.229.02:25:13.72#ibcon#read 3, iclass 7, count 0 2006.229.02:25:13.72#ibcon#about to read 4, iclass 7, count 0 2006.229.02:25:13.72#ibcon#read 4, iclass 7, count 0 2006.229.02:25:13.72#ibcon#about to read 5, iclass 7, count 0 2006.229.02:25:13.72#ibcon#read 5, iclass 7, count 0 2006.229.02:25:13.72#ibcon#about to read 6, iclass 7, count 0 2006.229.02:25:13.72#ibcon#read 6, iclass 7, count 0 2006.229.02:25:13.72#ibcon#end of sib2, iclass 7, count 0 2006.229.02:25:13.72#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:25:13.72#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:25:13.72#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:25:13.72#ibcon#*before write, iclass 7, count 0 2006.229.02:25:13.72#ibcon#enter sib2, iclass 7, count 0 2006.229.02:25:13.72#ibcon#flushed, iclass 7, count 0 2006.229.02:25:13.72#ibcon#about to write, iclass 7, count 0 2006.229.02:25:13.72#ibcon#wrote, iclass 7, count 0 2006.229.02:25:13.72#ibcon#about to read 3, iclass 7, count 0 2006.229.02:25:13.76#ibcon#read 3, iclass 7, count 0 2006.229.02:25:13.76#ibcon#about to read 4, iclass 7, count 0 2006.229.02:25:13.76#ibcon#read 4, iclass 7, count 0 2006.229.02:25:13.76#ibcon#about to read 5, iclass 7, count 0 2006.229.02:25:13.76#ibcon#read 5, iclass 7, count 0 2006.229.02:25:13.76#ibcon#about to read 6, iclass 7, count 0 2006.229.02:25:13.76#ibcon#read 6, iclass 7, count 0 2006.229.02:25:13.76#ibcon#end of sib2, iclass 7, count 0 2006.229.02:25:13.76#ibcon#*after write, iclass 7, count 0 2006.229.02:25:13.76#ibcon#*before return 0, iclass 7, count 0 2006.229.02:25:13.76#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:13.76#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:13.76#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:25:13.76#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:25:13.76$vck44/va=7,5 2006.229.02:25:13.76#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.02:25:13.76#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.02:25:13.76#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:13.76#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:13.82#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:13.82#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:13.82#ibcon#enter wrdev, iclass 11, count 2 2006.229.02:25:13.82#ibcon#first serial, iclass 11, count 2 2006.229.02:25:13.82#ibcon#enter sib2, iclass 11, count 2 2006.229.02:25:13.82#ibcon#flushed, iclass 11, count 2 2006.229.02:25:13.82#ibcon#about to write, iclass 11, count 2 2006.229.02:25:13.82#ibcon#wrote, iclass 11, count 2 2006.229.02:25:13.82#ibcon#about to read 3, iclass 11, count 2 2006.229.02:25:13.84#ibcon#read 3, iclass 11, count 2 2006.229.02:25:13.84#ibcon#about to read 4, iclass 11, count 2 2006.229.02:25:13.84#ibcon#read 4, iclass 11, count 2 2006.229.02:25:13.84#ibcon#about to read 5, iclass 11, count 2 2006.229.02:25:13.84#ibcon#read 5, iclass 11, count 2 2006.229.02:25:13.84#ibcon#about to read 6, iclass 11, count 2 2006.229.02:25:13.84#ibcon#read 6, iclass 11, count 2 2006.229.02:25:13.84#ibcon#end of sib2, iclass 11, count 2 2006.229.02:25:13.84#ibcon#*mode == 0, iclass 11, count 2 2006.229.02:25:13.84#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.02:25:13.84#ibcon#[25=AT07-05\r\n] 2006.229.02:25:13.84#ibcon#*before write, iclass 11, count 2 2006.229.02:25:13.84#ibcon#enter sib2, iclass 11, count 2 2006.229.02:25:13.84#ibcon#flushed, iclass 11, count 2 2006.229.02:25:13.84#ibcon#about to write, iclass 11, count 2 2006.229.02:25:13.84#ibcon#wrote, iclass 11, count 2 2006.229.02:25:13.84#ibcon#about to read 3, iclass 11, count 2 2006.229.02:25:13.87#ibcon#read 3, iclass 11, count 2 2006.229.02:25:13.87#ibcon#about to read 4, iclass 11, count 2 2006.229.02:25:13.87#ibcon#read 4, iclass 11, count 2 2006.229.02:25:13.87#ibcon#about to read 5, iclass 11, count 2 2006.229.02:25:13.87#ibcon#read 5, iclass 11, count 2 2006.229.02:25:13.87#ibcon#about to read 6, iclass 11, count 2 2006.229.02:25:13.87#ibcon#read 6, iclass 11, count 2 2006.229.02:25:13.87#ibcon#end of sib2, iclass 11, count 2 2006.229.02:25:13.87#ibcon#*after write, iclass 11, count 2 2006.229.02:25:13.87#ibcon#*before return 0, iclass 11, count 2 2006.229.02:25:13.87#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:13.87#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:13.87#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.02:25:13.87#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:13.87#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:13.99#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:13.99#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:13.99#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:25:13.99#ibcon#first serial, iclass 11, count 0 2006.229.02:25:13.99#ibcon#enter sib2, iclass 11, count 0 2006.229.02:25:13.99#ibcon#flushed, iclass 11, count 0 2006.229.02:25:13.99#ibcon#about to write, iclass 11, count 0 2006.229.02:25:13.99#ibcon#wrote, iclass 11, count 0 2006.229.02:25:13.99#ibcon#about to read 3, iclass 11, count 0 2006.229.02:25:14.01#ibcon#read 3, iclass 11, count 0 2006.229.02:25:14.01#ibcon#about to read 4, iclass 11, count 0 2006.229.02:25:14.01#ibcon#read 4, iclass 11, count 0 2006.229.02:25:14.01#ibcon#about to read 5, iclass 11, count 0 2006.229.02:25:14.01#ibcon#read 5, iclass 11, count 0 2006.229.02:25:14.01#ibcon#about to read 6, iclass 11, count 0 2006.229.02:25:14.01#ibcon#read 6, iclass 11, count 0 2006.229.02:25:14.01#ibcon#end of sib2, iclass 11, count 0 2006.229.02:25:14.01#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:25:14.01#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:25:14.01#ibcon#[25=USB\r\n] 2006.229.02:25:14.01#ibcon#*before write, iclass 11, count 0 2006.229.02:25:14.01#ibcon#enter sib2, iclass 11, count 0 2006.229.02:25:14.01#ibcon#flushed, iclass 11, count 0 2006.229.02:25:14.01#ibcon#about to write, iclass 11, count 0 2006.229.02:25:14.01#ibcon#wrote, iclass 11, count 0 2006.229.02:25:14.01#ibcon#about to read 3, iclass 11, count 0 2006.229.02:25:14.04#ibcon#read 3, iclass 11, count 0 2006.229.02:25:14.04#ibcon#about to read 4, iclass 11, count 0 2006.229.02:25:14.04#ibcon#read 4, iclass 11, count 0 2006.229.02:25:14.04#ibcon#about to read 5, iclass 11, count 0 2006.229.02:25:14.04#ibcon#read 5, iclass 11, count 0 2006.229.02:25:14.04#ibcon#about to read 6, iclass 11, count 0 2006.229.02:25:14.04#ibcon#read 6, iclass 11, count 0 2006.229.02:25:14.04#ibcon#end of sib2, iclass 11, count 0 2006.229.02:25:14.04#ibcon#*after write, iclass 11, count 0 2006.229.02:25:14.04#ibcon#*before return 0, iclass 11, count 0 2006.229.02:25:14.04#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:14.04#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:14.04#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:25:14.04#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:25:14.04$vck44/valo=8,884.99 2006.229.02:25:14.04#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.02:25:14.04#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.02:25:14.04#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:14.04#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:14.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:14.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:14.04#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:25:14.04#ibcon#first serial, iclass 13, count 0 2006.229.02:25:14.04#ibcon#enter sib2, iclass 13, count 0 2006.229.02:25:14.04#ibcon#flushed, iclass 13, count 0 2006.229.02:25:14.04#ibcon#about to write, iclass 13, count 0 2006.229.02:25:14.04#ibcon#wrote, iclass 13, count 0 2006.229.02:25:14.04#ibcon#about to read 3, iclass 13, count 0 2006.229.02:25:14.06#ibcon#read 3, iclass 13, count 0 2006.229.02:25:14.06#ibcon#about to read 4, iclass 13, count 0 2006.229.02:25:14.06#ibcon#read 4, iclass 13, count 0 2006.229.02:25:14.06#ibcon#about to read 5, iclass 13, count 0 2006.229.02:25:14.06#ibcon#read 5, iclass 13, count 0 2006.229.02:25:14.06#ibcon#about to read 6, iclass 13, count 0 2006.229.02:25:14.06#ibcon#read 6, iclass 13, count 0 2006.229.02:25:14.06#ibcon#end of sib2, iclass 13, count 0 2006.229.02:25:14.06#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:25:14.06#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:25:14.06#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:25:14.06#ibcon#*before write, iclass 13, count 0 2006.229.02:25:14.06#ibcon#enter sib2, iclass 13, count 0 2006.229.02:25:14.06#ibcon#flushed, iclass 13, count 0 2006.229.02:25:14.06#ibcon#about to write, iclass 13, count 0 2006.229.02:25:14.06#ibcon#wrote, iclass 13, count 0 2006.229.02:25:14.06#ibcon#about to read 3, iclass 13, count 0 2006.229.02:25:14.10#ibcon#read 3, iclass 13, count 0 2006.229.02:25:14.10#ibcon#about to read 4, iclass 13, count 0 2006.229.02:25:14.10#ibcon#read 4, iclass 13, count 0 2006.229.02:25:14.10#ibcon#about to read 5, iclass 13, count 0 2006.229.02:25:14.10#ibcon#read 5, iclass 13, count 0 2006.229.02:25:14.10#ibcon#about to read 6, iclass 13, count 0 2006.229.02:25:14.10#ibcon#read 6, iclass 13, count 0 2006.229.02:25:14.10#ibcon#end of sib2, iclass 13, count 0 2006.229.02:25:14.10#ibcon#*after write, iclass 13, count 0 2006.229.02:25:14.10#ibcon#*before return 0, iclass 13, count 0 2006.229.02:25:14.10#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:14.10#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:14.10#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:25:14.10#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:25:14.10$vck44/va=8,6 2006.229.02:25:14.10#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.02:25:14.10#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.02:25:14.10#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:14.10#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:25:14.16#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:25:14.16#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:25:14.16#ibcon#enter wrdev, iclass 15, count 2 2006.229.02:25:14.16#ibcon#first serial, iclass 15, count 2 2006.229.02:25:14.16#ibcon#enter sib2, iclass 15, count 2 2006.229.02:25:14.16#ibcon#flushed, iclass 15, count 2 2006.229.02:25:14.16#ibcon#about to write, iclass 15, count 2 2006.229.02:25:14.16#ibcon#wrote, iclass 15, count 2 2006.229.02:25:14.16#ibcon#about to read 3, iclass 15, count 2 2006.229.02:25:14.18#ibcon#read 3, iclass 15, count 2 2006.229.02:25:14.18#ibcon#about to read 4, iclass 15, count 2 2006.229.02:25:14.18#ibcon#read 4, iclass 15, count 2 2006.229.02:25:14.18#ibcon#about to read 5, iclass 15, count 2 2006.229.02:25:14.18#ibcon#read 5, iclass 15, count 2 2006.229.02:25:14.18#ibcon#about to read 6, iclass 15, count 2 2006.229.02:25:14.18#ibcon#read 6, iclass 15, count 2 2006.229.02:25:14.18#ibcon#end of sib2, iclass 15, count 2 2006.229.02:25:14.18#ibcon#*mode == 0, iclass 15, count 2 2006.229.02:25:14.18#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.02:25:14.18#ibcon#[25=AT08-06\r\n] 2006.229.02:25:14.18#ibcon#*before write, iclass 15, count 2 2006.229.02:25:14.18#ibcon#enter sib2, iclass 15, count 2 2006.229.02:25:14.18#ibcon#flushed, iclass 15, count 2 2006.229.02:25:14.18#ibcon#about to write, iclass 15, count 2 2006.229.02:25:14.18#ibcon#wrote, iclass 15, count 2 2006.229.02:25:14.18#ibcon#about to read 3, iclass 15, count 2 2006.229.02:25:14.21#ibcon#read 3, iclass 15, count 2 2006.229.02:25:14.21#ibcon#about to read 4, iclass 15, count 2 2006.229.02:25:14.21#ibcon#read 4, iclass 15, count 2 2006.229.02:25:14.21#ibcon#about to read 5, iclass 15, count 2 2006.229.02:25:14.21#ibcon#read 5, iclass 15, count 2 2006.229.02:25:14.21#ibcon#about to read 6, iclass 15, count 2 2006.229.02:25:14.21#ibcon#read 6, iclass 15, count 2 2006.229.02:25:14.21#ibcon#end of sib2, iclass 15, count 2 2006.229.02:25:14.21#ibcon#*after write, iclass 15, count 2 2006.229.02:25:14.21#ibcon#*before return 0, iclass 15, count 2 2006.229.02:25:14.21#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:25:14.21#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.02:25:14.21#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.02:25:14.21#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:14.21#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:25:14.33#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:25:14.33#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:25:14.33#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:25:14.33#ibcon#first serial, iclass 15, count 0 2006.229.02:25:14.33#ibcon#enter sib2, iclass 15, count 0 2006.229.02:25:14.33#ibcon#flushed, iclass 15, count 0 2006.229.02:25:14.33#ibcon#about to write, iclass 15, count 0 2006.229.02:25:14.33#ibcon#wrote, iclass 15, count 0 2006.229.02:25:14.33#ibcon#about to read 3, iclass 15, count 0 2006.229.02:25:14.35#ibcon#read 3, iclass 15, count 0 2006.229.02:25:14.35#ibcon#about to read 4, iclass 15, count 0 2006.229.02:25:14.35#ibcon#read 4, iclass 15, count 0 2006.229.02:25:14.35#ibcon#about to read 5, iclass 15, count 0 2006.229.02:25:14.35#ibcon#read 5, iclass 15, count 0 2006.229.02:25:14.35#ibcon#about to read 6, iclass 15, count 0 2006.229.02:25:14.35#ibcon#read 6, iclass 15, count 0 2006.229.02:25:14.35#ibcon#end of sib2, iclass 15, count 0 2006.229.02:25:14.35#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:25:14.35#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:25:14.35#ibcon#[25=USB\r\n] 2006.229.02:25:14.35#ibcon#*before write, iclass 15, count 0 2006.229.02:25:14.35#ibcon#enter sib2, iclass 15, count 0 2006.229.02:25:14.35#ibcon#flushed, iclass 15, count 0 2006.229.02:25:14.35#ibcon#about to write, iclass 15, count 0 2006.229.02:25:14.35#ibcon#wrote, iclass 15, count 0 2006.229.02:25:14.35#ibcon#about to read 3, iclass 15, count 0 2006.229.02:25:14.38#ibcon#read 3, iclass 15, count 0 2006.229.02:25:14.38#ibcon#about to read 4, iclass 15, count 0 2006.229.02:25:14.38#ibcon#read 4, iclass 15, count 0 2006.229.02:25:14.38#ibcon#about to read 5, iclass 15, count 0 2006.229.02:25:14.38#ibcon#read 5, iclass 15, count 0 2006.229.02:25:14.38#ibcon#about to read 6, iclass 15, count 0 2006.229.02:25:14.38#ibcon#read 6, iclass 15, count 0 2006.229.02:25:14.38#ibcon#end of sib2, iclass 15, count 0 2006.229.02:25:14.38#ibcon#*after write, iclass 15, count 0 2006.229.02:25:14.38#ibcon#*before return 0, iclass 15, count 0 2006.229.02:25:14.38#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:25:14.38#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.02:25:14.38#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:25:14.38#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:25:14.38$vck44/vblo=1,629.99 2006.229.02:25:14.38#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.02:25:14.38#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.02:25:14.38#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:14.38#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:14.38#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:14.38#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:14.38#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:25:14.38#ibcon#first serial, iclass 17, count 0 2006.229.02:25:14.38#ibcon#enter sib2, iclass 17, count 0 2006.229.02:25:14.38#ibcon#flushed, iclass 17, count 0 2006.229.02:25:14.38#ibcon#about to write, iclass 17, count 0 2006.229.02:25:14.38#ibcon#wrote, iclass 17, count 0 2006.229.02:25:14.38#ibcon#about to read 3, iclass 17, count 0 2006.229.02:25:14.40#ibcon#read 3, iclass 17, count 0 2006.229.02:25:14.40#ibcon#about to read 4, iclass 17, count 0 2006.229.02:25:14.40#ibcon#read 4, iclass 17, count 0 2006.229.02:25:14.40#ibcon#about to read 5, iclass 17, count 0 2006.229.02:25:14.40#ibcon#read 5, iclass 17, count 0 2006.229.02:25:14.40#ibcon#about to read 6, iclass 17, count 0 2006.229.02:25:14.40#ibcon#read 6, iclass 17, count 0 2006.229.02:25:14.40#ibcon#end of sib2, iclass 17, count 0 2006.229.02:25:14.40#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:25:14.40#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:25:14.40#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:25:14.40#ibcon#*before write, iclass 17, count 0 2006.229.02:25:14.40#ibcon#enter sib2, iclass 17, count 0 2006.229.02:25:14.40#ibcon#flushed, iclass 17, count 0 2006.229.02:25:14.40#ibcon#about to write, iclass 17, count 0 2006.229.02:25:14.40#ibcon#wrote, iclass 17, count 0 2006.229.02:25:14.40#ibcon#about to read 3, iclass 17, count 0 2006.229.02:25:14.44#ibcon#read 3, iclass 17, count 0 2006.229.02:25:14.44#ibcon#about to read 4, iclass 17, count 0 2006.229.02:25:14.44#ibcon#read 4, iclass 17, count 0 2006.229.02:25:14.44#ibcon#about to read 5, iclass 17, count 0 2006.229.02:25:14.44#ibcon#read 5, iclass 17, count 0 2006.229.02:25:14.44#ibcon#about to read 6, iclass 17, count 0 2006.229.02:25:14.44#ibcon#read 6, iclass 17, count 0 2006.229.02:25:14.44#ibcon#end of sib2, iclass 17, count 0 2006.229.02:25:14.44#ibcon#*after write, iclass 17, count 0 2006.229.02:25:14.44#ibcon#*before return 0, iclass 17, count 0 2006.229.02:25:14.44#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:14.44#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.02:25:14.44#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:25:14.44#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:25:14.44$vck44/vb=1,4 2006.229.02:25:14.44#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.02:25:14.44#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.02:25:14.44#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:14.44#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:14.44#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:14.44#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:14.44#ibcon#enter wrdev, iclass 19, count 2 2006.229.02:25:14.44#ibcon#first serial, iclass 19, count 2 2006.229.02:25:14.44#ibcon#enter sib2, iclass 19, count 2 2006.229.02:25:14.44#ibcon#flushed, iclass 19, count 2 2006.229.02:25:14.44#ibcon#about to write, iclass 19, count 2 2006.229.02:25:14.44#ibcon#wrote, iclass 19, count 2 2006.229.02:25:14.44#ibcon#about to read 3, iclass 19, count 2 2006.229.02:25:14.46#ibcon#read 3, iclass 19, count 2 2006.229.02:25:14.46#ibcon#about to read 4, iclass 19, count 2 2006.229.02:25:14.46#ibcon#read 4, iclass 19, count 2 2006.229.02:25:14.46#ibcon#about to read 5, iclass 19, count 2 2006.229.02:25:14.46#ibcon#read 5, iclass 19, count 2 2006.229.02:25:14.46#ibcon#about to read 6, iclass 19, count 2 2006.229.02:25:14.46#ibcon#read 6, iclass 19, count 2 2006.229.02:25:14.46#ibcon#end of sib2, iclass 19, count 2 2006.229.02:25:14.46#ibcon#*mode == 0, iclass 19, count 2 2006.229.02:25:14.46#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.02:25:14.46#ibcon#[27=AT01-04\r\n] 2006.229.02:25:14.46#ibcon#*before write, iclass 19, count 2 2006.229.02:25:14.46#ibcon#enter sib2, iclass 19, count 2 2006.229.02:25:14.46#ibcon#flushed, iclass 19, count 2 2006.229.02:25:14.46#ibcon#about to write, iclass 19, count 2 2006.229.02:25:14.46#ibcon#wrote, iclass 19, count 2 2006.229.02:25:14.46#ibcon#about to read 3, iclass 19, count 2 2006.229.02:25:14.49#ibcon#read 3, iclass 19, count 2 2006.229.02:25:14.49#ibcon#about to read 4, iclass 19, count 2 2006.229.02:25:14.49#ibcon#read 4, iclass 19, count 2 2006.229.02:25:14.49#ibcon#about to read 5, iclass 19, count 2 2006.229.02:25:14.49#ibcon#read 5, iclass 19, count 2 2006.229.02:25:14.49#ibcon#about to read 6, iclass 19, count 2 2006.229.02:25:14.49#ibcon#read 6, iclass 19, count 2 2006.229.02:25:14.49#ibcon#end of sib2, iclass 19, count 2 2006.229.02:25:14.49#ibcon#*after write, iclass 19, count 2 2006.229.02:25:14.49#ibcon#*before return 0, iclass 19, count 2 2006.229.02:25:14.49#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:14.49#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.02:25:14.49#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.02:25:14.49#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:14.49#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:14.61#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:14.61#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:14.61#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:25:14.61#ibcon#first serial, iclass 19, count 0 2006.229.02:25:14.61#ibcon#enter sib2, iclass 19, count 0 2006.229.02:25:14.61#ibcon#flushed, iclass 19, count 0 2006.229.02:25:14.61#ibcon#about to write, iclass 19, count 0 2006.229.02:25:14.61#ibcon#wrote, iclass 19, count 0 2006.229.02:25:14.61#ibcon#about to read 3, iclass 19, count 0 2006.229.02:25:14.63#ibcon#read 3, iclass 19, count 0 2006.229.02:25:14.63#ibcon#about to read 4, iclass 19, count 0 2006.229.02:25:14.63#ibcon#read 4, iclass 19, count 0 2006.229.02:25:14.63#ibcon#about to read 5, iclass 19, count 0 2006.229.02:25:14.63#ibcon#read 5, iclass 19, count 0 2006.229.02:25:14.63#ibcon#about to read 6, iclass 19, count 0 2006.229.02:25:14.63#ibcon#read 6, iclass 19, count 0 2006.229.02:25:14.63#ibcon#end of sib2, iclass 19, count 0 2006.229.02:25:14.63#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:25:14.63#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:25:14.63#ibcon#[27=USB\r\n] 2006.229.02:25:14.63#ibcon#*before write, iclass 19, count 0 2006.229.02:25:14.63#ibcon#enter sib2, iclass 19, count 0 2006.229.02:25:14.63#ibcon#flushed, iclass 19, count 0 2006.229.02:25:14.63#ibcon#about to write, iclass 19, count 0 2006.229.02:25:14.63#ibcon#wrote, iclass 19, count 0 2006.229.02:25:14.63#ibcon#about to read 3, iclass 19, count 0 2006.229.02:25:14.66#ibcon#read 3, iclass 19, count 0 2006.229.02:25:14.66#ibcon#about to read 4, iclass 19, count 0 2006.229.02:25:14.66#ibcon#read 4, iclass 19, count 0 2006.229.02:25:14.66#ibcon#about to read 5, iclass 19, count 0 2006.229.02:25:14.66#ibcon#read 5, iclass 19, count 0 2006.229.02:25:14.66#ibcon#about to read 6, iclass 19, count 0 2006.229.02:25:14.66#ibcon#read 6, iclass 19, count 0 2006.229.02:25:14.66#ibcon#end of sib2, iclass 19, count 0 2006.229.02:25:14.66#ibcon#*after write, iclass 19, count 0 2006.229.02:25:14.66#ibcon#*before return 0, iclass 19, count 0 2006.229.02:25:14.66#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:14.66#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.02:25:14.66#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:25:14.66#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:25:14.66$vck44/vblo=2,634.99 2006.229.02:25:14.66#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.02:25:14.66#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.02:25:14.66#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:14.66#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:14.66#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:14.66#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:14.66#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:25:14.66#ibcon#first serial, iclass 21, count 0 2006.229.02:25:14.66#ibcon#enter sib2, iclass 21, count 0 2006.229.02:25:14.66#ibcon#flushed, iclass 21, count 0 2006.229.02:25:14.66#ibcon#about to write, iclass 21, count 0 2006.229.02:25:14.66#ibcon#wrote, iclass 21, count 0 2006.229.02:25:14.66#ibcon#about to read 3, iclass 21, count 0 2006.229.02:25:14.68#ibcon#read 3, iclass 21, count 0 2006.229.02:25:14.68#ibcon#about to read 4, iclass 21, count 0 2006.229.02:25:14.68#ibcon#read 4, iclass 21, count 0 2006.229.02:25:14.68#ibcon#about to read 5, iclass 21, count 0 2006.229.02:25:14.68#ibcon#read 5, iclass 21, count 0 2006.229.02:25:14.68#ibcon#about to read 6, iclass 21, count 0 2006.229.02:25:14.68#ibcon#read 6, iclass 21, count 0 2006.229.02:25:14.68#ibcon#end of sib2, iclass 21, count 0 2006.229.02:25:14.68#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:25:14.68#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:25:14.68#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:25:14.68#ibcon#*before write, iclass 21, count 0 2006.229.02:25:14.68#ibcon#enter sib2, iclass 21, count 0 2006.229.02:25:14.68#ibcon#flushed, iclass 21, count 0 2006.229.02:25:14.68#ibcon#about to write, iclass 21, count 0 2006.229.02:25:14.68#ibcon#wrote, iclass 21, count 0 2006.229.02:25:14.68#ibcon#about to read 3, iclass 21, count 0 2006.229.02:25:14.72#ibcon#read 3, iclass 21, count 0 2006.229.02:25:14.72#ibcon#about to read 4, iclass 21, count 0 2006.229.02:25:14.72#ibcon#read 4, iclass 21, count 0 2006.229.02:25:14.72#ibcon#about to read 5, iclass 21, count 0 2006.229.02:25:14.72#ibcon#read 5, iclass 21, count 0 2006.229.02:25:14.72#ibcon#about to read 6, iclass 21, count 0 2006.229.02:25:14.72#ibcon#read 6, iclass 21, count 0 2006.229.02:25:14.72#ibcon#end of sib2, iclass 21, count 0 2006.229.02:25:14.72#ibcon#*after write, iclass 21, count 0 2006.229.02:25:14.72#ibcon#*before return 0, iclass 21, count 0 2006.229.02:25:14.72#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:14.72#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.02:25:14.72#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:25:14.72#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:25:14.72$vck44/vb=2,4 2006.229.02:25:14.72#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.02:25:14.72#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.02:25:14.72#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:14.72#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:14.78#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:14.78#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:14.78#ibcon#enter wrdev, iclass 23, count 2 2006.229.02:25:14.78#ibcon#first serial, iclass 23, count 2 2006.229.02:25:14.78#ibcon#enter sib2, iclass 23, count 2 2006.229.02:25:14.78#ibcon#flushed, iclass 23, count 2 2006.229.02:25:14.78#ibcon#about to write, iclass 23, count 2 2006.229.02:25:14.78#ibcon#wrote, iclass 23, count 2 2006.229.02:25:14.78#ibcon#about to read 3, iclass 23, count 2 2006.229.02:25:14.80#ibcon#read 3, iclass 23, count 2 2006.229.02:25:14.80#ibcon#about to read 4, iclass 23, count 2 2006.229.02:25:14.80#ibcon#read 4, iclass 23, count 2 2006.229.02:25:14.80#ibcon#about to read 5, iclass 23, count 2 2006.229.02:25:14.80#ibcon#read 5, iclass 23, count 2 2006.229.02:25:14.80#ibcon#about to read 6, iclass 23, count 2 2006.229.02:25:14.80#ibcon#read 6, iclass 23, count 2 2006.229.02:25:14.80#ibcon#end of sib2, iclass 23, count 2 2006.229.02:25:14.80#ibcon#*mode == 0, iclass 23, count 2 2006.229.02:25:14.80#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.02:25:14.80#ibcon#[27=AT02-04\r\n] 2006.229.02:25:14.80#ibcon#*before write, iclass 23, count 2 2006.229.02:25:14.80#ibcon#enter sib2, iclass 23, count 2 2006.229.02:25:14.80#ibcon#flushed, iclass 23, count 2 2006.229.02:25:14.80#ibcon#about to write, iclass 23, count 2 2006.229.02:25:14.80#ibcon#wrote, iclass 23, count 2 2006.229.02:25:14.80#ibcon#about to read 3, iclass 23, count 2 2006.229.02:25:14.83#ibcon#read 3, iclass 23, count 2 2006.229.02:25:14.83#ibcon#about to read 4, iclass 23, count 2 2006.229.02:25:14.83#ibcon#read 4, iclass 23, count 2 2006.229.02:25:14.83#ibcon#about to read 5, iclass 23, count 2 2006.229.02:25:14.83#ibcon#read 5, iclass 23, count 2 2006.229.02:25:14.83#ibcon#about to read 6, iclass 23, count 2 2006.229.02:25:14.83#ibcon#read 6, iclass 23, count 2 2006.229.02:25:14.83#ibcon#end of sib2, iclass 23, count 2 2006.229.02:25:14.83#ibcon#*after write, iclass 23, count 2 2006.229.02:25:14.83#ibcon#*before return 0, iclass 23, count 2 2006.229.02:25:14.83#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:14.83#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:25:14.83#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.02:25:14.83#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:14.83#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:14.95#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:14.95#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:14.95#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:25:14.95#ibcon#first serial, iclass 23, count 0 2006.229.02:25:14.95#ibcon#enter sib2, iclass 23, count 0 2006.229.02:25:14.95#ibcon#flushed, iclass 23, count 0 2006.229.02:25:14.95#ibcon#about to write, iclass 23, count 0 2006.229.02:25:14.95#ibcon#wrote, iclass 23, count 0 2006.229.02:25:14.95#ibcon#about to read 3, iclass 23, count 0 2006.229.02:25:14.97#ibcon#read 3, iclass 23, count 0 2006.229.02:25:14.97#ibcon#about to read 4, iclass 23, count 0 2006.229.02:25:14.97#ibcon#read 4, iclass 23, count 0 2006.229.02:25:14.97#ibcon#about to read 5, iclass 23, count 0 2006.229.02:25:14.97#ibcon#read 5, iclass 23, count 0 2006.229.02:25:14.97#ibcon#about to read 6, iclass 23, count 0 2006.229.02:25:14.97#ibcon#read 6, iclass 23, count 0 2006.229.02:25:14.97#ibcon#end of sib2, iclass 23, count 0 2006.229.02:25:14.97#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:25:14.97#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:25:14.97#ibcon#[27=USB\r\n] 2006.229.02:25:14.97#ibcon#*before write, iclass 23, count 0 2006.229.02:25:14.97#ibcon#enter sib2, iclass 23, count 0 2006.229.02:25:14.97#ibcon#flushed, iclass 23, count 0 2006.229.02:25:14.97#ibcon#about to write, iclass 23, count 0 2006.229.02:25:14.97#ibcon#wrote, iclass 23, count 0 2006.229.02:25:14.97#ibcon#about to read 3, iclass 23, count 0 2006.229.02:25:15.00#ibcon#read 3, iclass 23, count 0 2006.229.02:25:15.00#ibcon#about to read 4, iclass 23, count 0 2006.229.02:25:15.00#ibcon#read 4, iclass 23, count 0 2006.229.02:25:15.00#ibcon#about to read 5, iclass 23, count 0 2006.229.02:25:15.00#ibcon#read 5, iclass 23, count 0 2006.229.02:25:15.00#ibcon#about to read 6, iclass 23, count 0 2006.229.02:25:15.00#ibcon#read 6, iclass 23, count 0 2006.229.02:25:15.00#ibcon#end of sib2, iclass 23, count 0 2006.229.02:25:15.00#ibcon#*after write, iclass 23, count 0 2006.229.02:25:15.00#ibcon#*before return 0, iclass 23, count 0 2006.229.02:25:15.00#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:15.00#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:25:15.00#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:25:15.00#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:25:15.00$vck44/vblo=3,649.99 2006.229.02:25:15.00#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.02:25:15.00#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.02:25:15.00#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:15.00#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:15.00#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:15.00#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:15.00#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:25:15.00#ibcon#first serial, iclass 25, count 0 2006.229.02:25:15.00#ibcon#enter sib2, iclass 25, count 0 2006.229.02:25:15.00#ibcon#flushed, iclass 25, count 0 2006.229.02:25:15.00#ibcon#about to write, iclass 25, count 0 2006.229.02:25:15.00#ibcon#wrote, iclass 25, count 0 2006.229.02:25:15.00#ibcon#about to read 3, iclass 25, count 0 2006.229.02:25:15.02#ibcon#read 3, iclass 25, count 0 2006.229.02:25:15.02#ibcon#about to read 4, iclass 25, count 0 2006.229.02:25:15.02#ibcon#read 4, iclass 25, count 0 2006.229.02:25:15.02#ibcon#about to read 5, iclass 25, count 0 2006.229.02:25:15.02#ibcon#read 5, iclass 25, count 0 2006.229.02:25:15.02#ibcon#about to read 6, iclass 25, count 0 2006.229.02:25:15.02#ibcon#read 6, iclass 25, count 0 2006.229.02:25:15.02#ibcon#end of sib2, iclass 25, count 0 2006.229.02:25:15.02#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:25:15.02#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:25:15.02#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:25:15.02#ibcon#*before write, iclass 25, count 0 2006.229.02:25:15.02#ibcon#enter sib2, iclass 25, count 0 2006.229.02:25:15.02#ibcon#flushed, iclass 25, count 0 2006.229.02:25:15.02#ibcon#about to write, iclass 25, count 0 2006.229.02:25:15.02#ibcon#wrote, iclass 25, count 0 2006.229.02:25:15.02#ibcon#about to read 3, iclass 25, count 0 2006.229.02:25:15.06#ibcon#read 3, iclass 25, count 0 2006.229.02:25:15.06#ibcon#about to read 4, iclass 25, count 0 2006.229.02:25:15.06#ibcon#read 4, iclass 25, count 0 2006.229.02:25:15.06#ibcon#about to read 5, iclass 25, count 0 2006.229.02:25:15.06#ibcon#read 5, iclass 25, count 0 2006.229.02:25:15.06#ibcon#about to read 6, iclass 25, count 0 2006.229.02:25:15.06#ibcon#read 6, iclass 25, count 0 2006.229.02:25:15.06#ibcon#end of sib2, iclass 25, count 0 2006.229.02:25:15.06#ibcon#*after write, iclass 25, count 0 2006.229.02:25:15.06#ibcon#*before return 0, iclass 25, count 0 2006.229.02:25:15.06#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:15.06#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.02:25:15.06#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:25:15.06#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:25:15.06$vck44/vb=3,4 2006.229.02:25:15.06#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.02:25:15.06#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.02:25:15.06#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:15.06#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:15.12#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:15.12#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:15.12#ibcon#enter wrdev, iclass 27, count 2 2006.229.02:25:15.12#ibcon#first serial, iclass 27, count 2 2006.229.02:25:15.12#ibcon#enter sib2, iclass 27, count 2 2006.229.02:25:15.12#ibcon#flushed, iclass 27, count 2 2006.229.02:25:15.12#ibcon#about to write, iclass 27, count 2 2006.229.02:25:15.12#ibcon#wrote, iclass 27, count 2 2006.229.02:25:15.12#ibcon#about to read 3, iclass 27, count 2 2006.229.02:25:15.14#ibcon#read 3, iclass 27, count 2 2006.229.02:25:15.14#ibcon#about to read 4, iclass 27, count 2 2006.229.02:25:15.14#ibcon#read 4, iclass 27, count 2 2006.229.02:25:15.14#ibcon#about to read 5, iclass 27, count 2 2006.229.02:25:15.14#ibcon#read 5, iclass 27, count 2 2006.229.02:25:15.14#ibcon#about to read 6, iclass 27, count 2 2006.229.02:25:15.14#ibcon#read 6, iclass 27, count 2 2006.229.02:25:15.14#ibcon#end of sib2, iclass 27, count 2 2006.229.02:25:15.14#ibcon#*mode == 0, iclass 27, count 2 2006.229.02:25:15.14#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.02:25:15.14#ibcon#[27=AT03-04\r\n] 2006.229.02:25:15.14#ibcon#*before write, iclass 27, count 2 2006.229.02:25:15.14#ibcon#enter sib2, iclass 27, count 2 2006.229.02:25:15.14#ibcon#flushed, iclass 27, count 2 2006.229.02:25:15.14#ibcon#about to write, iclass 27, count 2 2006.229.02:25:15.14#ibcon#wrote, iclass 27, count 2 2006.229.02:25:15.14#ibcon#about to read 3, iclass 27, count 2 2006.229.02:25:15.17#ibcon#read 3, iclass 27, count 2 2006.229.02:25:15.17#ibcon#about to read 4, iclass 27, count 2 2006.229.02:25:15.17#ibcon#read 4, iclass 27, count 2 2006.229.02:25:15.17#ibcon#about to read 5, iclass 27, count 2 2006.229.02:25:15.17#ibcon#read 5, iclass 27, count 2 2006.229.02:25:15.17#ibcon#about to read 6, iclass 27, count 2 2006.229.02:25:15.17#ibcon#read 6, iclass 27, count 2 2006.229.02:25:15.17#ibcon#end of sib2, iclass 27, count 2 2006.229.02:25:15.17#ibcon#*after write, iclass 27, count 2 2006.229.02:25:15.17#ibcon#*before return 0, iclass 27, count 2 2006.229.02:25:15.17#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:15.17#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.02:25:15.17#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.02:25:15.17#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:15.17#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:15.29#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:15.29#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:15.29#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:25:15.29#ibcon#first serial, iclass 27, count 0 2006.229.02:25:15.29#ibcon#enter sib2, iclass 27, count 0 2006.229.02:25:15.29#ibcon#flushed, iclass 27, count 0 2006.229.02:25:15.29#ibcon#about to write, iclass 27, count 0 2006.229.02:25:15.29#ibcon#wrote, iclass 27, count 0 2006.229.02:25:15.29#ibcon#about to read 3, iclass 27, count 0 2006.229.02:25:15.31#ibcon#read 3, iclass 27, count 0 2006.229.02:25:15.31#ibcon#about to read 4, iclass 27, count 0 2006.229.02:25:15.31#ibcon#read 4, iclass 27, count 0 2006.229.02:25:15.31#ibcon#about to read 5, iclass 27, count 0 2006.229.02:25:15.31#ibcon#read 5, iclass 27, count 0 2006.229.02:25:15.31#ibcon#about to read 6, iclass 27, count 0 2006.229.02:25:15.31#ibcon#read 6, iclass 27, count 0 2006.229.02:25:15.31#ibcon#end of sib2, iclass 27, count 0 2006.229.02:25:15.31#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:25:15.31#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:25:15.31#ibcon#[27=USB\r\n] 2006.229.02:25:15.31#ibcon#*before write, iclass 27, count 0 2006.229.02:25:15.31#ibcon#enter sib2, iclass 27, count 0 2006.229.02:25:15.31#ibcon#flushed, iclass 27, count 0 2006.229.02:25:15.31#ibcon#about to write, iclass 27, count 0 2006.229.02:25:15.31#ibcon#wrote, iclass 27, count 0 2006.229.02:25:15.31#ibcon#about to read 3, iclass 27, count 0 2006.229.02:25:15.34#ibcon#read 3, iclass 27, count 0 2006.229.02:25:15.34#ibcon#about to read 4, iclass 27, count 0 2006.229.02:25:15.34#ibcon#read 4, iclass 27, count 0 2006.229.02:25:15.34#ibcon#about to read 5, iclass 27, count 0 2006.229.02:25:15.34#ibcon#read 5, iclass 27, count 0 2006.229.02:25:15.34#ibcon#about to read 6, iclass 27, count 0 2006.229.02:25:15.34#ibcon#read 6, iclass 27, count 0 2006.229.02:25:15.34#ibcon#end of sib2, iclass 27, count 0 2006.229.02:25:15.34#ibcon#*after write, iclass 27, count 0 2006.229.02:25:15.34#ibcon#*before return 0, iclass 27, count 0 2006.229.02:25:15.34#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:15.34#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.02:25:15.34#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:25:15.34#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:25:15.34$vck44/vblo=4,679.99 2006.229.02:25:15.34#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.02:25:15.34#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.02:25:15.34#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:15.34#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:15.34#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:15.34#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:15.34#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:25:15.34#ibcon#first serial, iclass 29, count 0 2006.229.02:25:15.34#ibcon#enter sib2, iclass 29, count 0 2006.229.02:25:15.34#ibcon#flushed, iclass 29, count 0 2006.229.02:25:15.34#ibcon#about to write, iclass 29, count 0 2006.229.02:25:15.34#ibcon#wrote, iclass 29, count 0 2006.229.02:25:15.34#ibcon#about to read 3, iclass 29, count 0 2006.229.02:25:15.36#ibcon#read 3, iclass 29, count 0 2006.229.02:25:15.36#ibcon#about to read 4, iclass 29, count 0 2006.229.02:25:15.36#ibcon#read 4, iclass 29, count 0 2006.229.02:25:15.36#ibcon#about to read 5, iclass 29, count 0 2006.229.02:25:15.36#ibcon#read 5, iclass 29, count 0 2006.229.02:25:15.36#ibcon#about to read 6, iclass 29, count 0 2006.229.02:25:15.36#ibcon#read 6, iclass 29, count 0 2006.229.02:25:15.36#ibcon#end of sib2, iclass 29, count 0 2006.229.02:25:15.36#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:25:15.36#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:25:15.36#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:25:15.36#ibcon#*before write, iclass 29, count 0 2006.229.02:25:15.36#ibcon#enter sib2, iclass 29, count 0 2006.229.02:25:15.36#ibcon#flushed, iclass 29, count 0 2006.229.02:25:15.36#ibcon#about to write, iclass 29, count 0 2006.229.02:25:15.36#ibcon#wrote, iclass 29, count 0 2006.229.02:25:15.36#ibcon#about to read 3, iclass 29, count 0 2006.229.02:25:15.40#ibcon#read 3, iclass 29, count 0 2006.229.02:25:15.40#ibcon#about to read 4, iclass 29, count 0 2006.229.02:25:15.40#ibcon#read 4, iclass 29, count 0 2006.229.02:25:15.40#ibcon#about to read 5, iclass 29, count 0 2006.229.02:25:15.40#ibcon#read 5, iclass 29, count 0 2006.229.02:25:15.40#ibcon#about to read 6, iclass 29, count 0 2006.229.02:25:15.40#ibcon#read 6, iclass 29, count 0 2006.229.02:25:15.40#ibcon#end of sib2, iclass 29, count 0 2006.229.02:25:15.40#ibcon#*after write, iclass 29, count 0 2006.229.02:25:15.40#ibcon#*before return 0, iclass 29, count 0 2006.229.02:25:15.40#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:15.40#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.02:25:15.40#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:25:15.40#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:25:15.40$vck44/vb=4,4 2006.229.02:25:15.40#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.02:25:15.40#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.02:25:15.40#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:15.40#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:15.46#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:15.46#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:15.46#ibcon#enter wrdev, iclass 31, count 2 2006.229.02:25:15.46#ibcon#first serial, iclass 31, count 2 2006.229.02:25:15.46#ibcon#enter sib2, iclass 31, count 2 2006.229.02:25:15.46#ibcon#flushed, iclass 31, count 2 2006.229.02:25:15.46#ibcon#about to write, iclass 31, count 2 2006.229.02:25:15.46#ibcon#wrote, iclass 31, count 2 2006.229.02:25:15.46#ibcon#about to read 3, iclass 31, count 2 2006.229.02:25:15.48#ibcon#read 3, iclass 31, count 2 2006.229.02:25:15.48#ibcon#about to read 4, iclass 31, count 2 2006.229.02:25:15.48#ibcon#read 4, iclass 31, count 2 2006.229.02:25:15.48#ibcon#about to read 5, iclass 31, count 2 2006.229.02:25:15.48#ibcon#read 5, iclass 31, count 2 2006.229.02:25:15.48#ibcon#about to read 6, iclass 31, count 2 2006.229.02:25:15.48#ibcon#read 6, iclass 31, count 2 2006.229.02:25:15.48#ibcon#end of sib2, iclass 31, count 2 2006.229.02:25:15.48#ibcon#*mode == 0, iclass 31, count 2 2006.229.02:25:15.48#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.02:25:15.48#ibcon#[27=AT04-04\r\n] 2006.229.02:25:15.48#ibcon#*before write, iclass 31, count 2 2006.229.02:25:15.48#ibcon#enter sib2, iclass 31, count 2 2006.229.02:25:15.48#ibcon#flushed, iclass 31, count 2 2006.229.02:25:15.48#ibcon#about to write, iclass 31, count 2 2006.229.02:25:15.48#ibcon#wrote, iclass 31, count 2 2006.229.02:25:15.48#ibcon#about to read 3, iclass 31, count 2 2006.229.02:25:15.51#ibcon#read 3, iclass 31, count 2 2006.229.02:25:15.51#ibcon#about to read 4, iclass 31, count 2 2006.229.02:25:15.51#ibcon#read 4, iclass 31, count 2 2006.229.02:25:15.51#ibcon#about to read 5, iclass 31, count 2 2006.229.02:25:15.51#ibcon#read 5, iclass 31, count 2 2006.229.02:25:15.51#ibcon#about to read 6, iclass 31, count 2 2006.229.02:25:15.51#ibcon#read 6, iclass 31, count 2 2006.229.02:25:15.51#ibcon#end of sib2, iclass 31, count 2 2006.229.02:25:15.51#ibcon#*after write, iclass 31, count 2 2006.229.02:25:15.51#ibcon#*before return 0, iclass 31, count 2 2006.229.02:25:15.51#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:15.51#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.02:25:15.51#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.02:25:15.51#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:15.51#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:15.63#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:15.63#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:15.63#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:25:15.63#ibcon#first serial, iclass 31, count 0 2006.229.02:25:15.63#ibcon#enter sib2, iclass 31, count 0 2006.229.02:25:15.63#ibcon#flushed, iclass 31, count 0 2006.229.02:25:15.63#ibcon#about to write, iclass 31, count 0 2006.229.02:25:15.63#ibcon#wrote, iclass 31, count 0 2006.229.02:25:15.63#ibcon#about to read 3, iclass 31, count 0 2006.229.02:25:15.65#ibcon#read 3, iclass 31, count 0 2006.229.02:25:15.65#ibcon#about to read 4, iclass 31, count 0 2006.229.02:25:15.65#ibcon#read 4, iclass 31, count 0 2006.229.02:25:15.65#ibcon#about to read 5, iclass 31, count 0 2006.229.02:25:15.65#ibcon#read 5, iclass 31, count 0 2006.229.02:25:15.65#ibcon#about to read 6, iclass 31, count 0 2006.229.02:25:15.65#ibcon#read 6, iclass 31, count 0 2006.229.02:25:15.65#ibcon#end of sib2, iclass 31, count 0 2006.229.02:25:15.65#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:25:15.65#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:25:15.65#ibcon#[27=USB\r\n] 2006.229.02:25:15.65#ibcon#*before write, iclass 31, count 0 2006.229.02:25:15.65#ibcon#enter sib2, iclass 31, count 0 2006.229.02:25:15.65#ibcon#flushed, iclass 31, count 0 2006.229.02:25:15.65#ibcon#about to write, iclass 31, count 0 2006.229.02:25:15.65#ibcon#wrote, iclass 31, count 0 2006.229.02:25:15.65#ibcon#about to read 3, iclass 31, count 0 2006.229.02:25:15.68#ibcon#read 3, iclass 31, count 0 2006.229.02:25:15.68#ibcon#about to read 4, iclass 31, count 0 2006.229.02:25:15.68#ibcon#read 4, iclass 31, count 0 2006.229.02:25:15.68#ibcon#about to read 5, iclass 31, count 0 2006.229.02:25:15.68#ibcon#read 5, iclass 31, count 0 2006.229.02:25:15.68#ibcon#about to read 6, iclass 31, count 0 2006.229.02:25:15.68#ibcon#read 6, iclass 31, count 0 2006.229.02:25:15.68#ibcon#end of sib2, iclass 31, count 0 2006.229.02:25:15.68#ibcon#*after write, iclass 31, count 0 2006.229.02:25:15.68#ibcon#*before return 0, iclass 31, count 0 2006.229.02:25:15.68#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:15.68#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.02:25:15.68#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:25:15.68#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:25:15.68$vck44/vblo=5,709.99 2006.229.02:25:15.68#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.02:25:15.68#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.02:25:15.68#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:15.68#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:15.68#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:15.68#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:15.68#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:25:15.68#ibcon#first serial, iclass 33, count 0 2006.229.02:25:15.68#ibcon#enter sib2, iclass 33, count 0 2006.229.02:25:15.68#ibcon#flushed, iclass 33, count 0 2006.229.02:25:15.68#ibcon#about to write, iclass 33, count 0 2006.229.02:25:15.68#ibcon#wrote, iclass 33, count 0 2006.229.02:25:15.68#ibcon#about to read 3, iclass 33, count 0 2006.229.02:25:15.70#ibcon#read 3, iclass 33, count 0 2006.229.02:25:15.70#ibcon#about to read 4, iclass 33, count 0 2006.229.02:25:15.70#ibcon#read 4, iclass 33, count 0 2006.229.02:25:15.70#ibcon#about to read 5, iclass 33, count 0 2006.229.02:25:15.70#ibcon#read 5, iclass 33, count 0 2006.229.02:25:15.70#ibcon#about to read 6, iclass 33, count 0 2006.229.02:25:15.70#ibcon#read 6, iclass 33, count 0 2006.229.02:25:15.70#ibcon#end of sib2, iclass 33, count 0 2006.229.02:25:15.70#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:25:15.70#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:25:15.70#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:25:15.70#ibcon#*before write, iclass 33, count 0 2006.229.02:25:15.70#ibcon#enter sib2, iclass 33, count 0 2006.229.02:25:15.70#ibcon#flushed, iclass 33, count 0 2006.229.02:25:15.70#ibcon#about to write, iclass 33, count 0 2006.229.02:25:15.70#ibcon#wrote, iclass 33, count 0 2006.229.02:25:15.70#ibcon#about to read 3, iclass 33, count 0 2006.229.02:25:15.74#ibcon#read 3, iclass 33, count 0 2006.229.02:25:15.74#ibcon#about to read 4, iclass 33, count 0 2006.229.02:25:15.74#ibcon#read 4, iclass 33, count 0 2006.229.02:25:15.74#ibcon#about to read 5, iclass 33, count 0 2006.229.02:25:15.74#ibcon#read 5, iclass 33, count 0 2006.229.02:25:15.74#ibcon#about to read 6, iclass 33, count 0 2006.229.02:25:15.74#ibcon#read 6, iclass 33, count 0 2006.229.02:25:15.74#ibcon#end of sib2, iclass 33, count 0 2006.229.02:25:15.74#ibcon#*after write, iclass 33, count 0 2006.229.02:25:15.74#ibcon#*before return 0, iclass 33, count 0 2006.229.02:25:15.74#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:15.74#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.02:25:15.74#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:25:15.74#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:25:15.74$vck44/vb=5,4 2006.229.02:25:15.74#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.02:25:15.74#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.02:25:15.74#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:15.74#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:15.80#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:15.80#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:15.80#ibcon#enter wrdev, iclass 35, count 2 2006.229.02:25:15.80#ibcon#first serial, iclass 35, count 2 2006.229.02:25:15.80#ibcon#enter sib2, iclass 35, count 2 2006.229.02:25:15.80#ibcon#flushed, iclass 35, count 2 2006.229.02:25:15.80#ibcon#about to write, iclass 35, count 2 2006.229.02:25:15.80#ibcon#wrote, iclass 35, count 2 2006.229.02:25:15.80#ibcon#about to read 3, iclass 35, count 2 2006.229.02:25:15.82#ibcon#read 3, iclass 35, count 2 2006.229.02:25:15.82#ibcon#about to read 4, iclass 35, count 2 2006.229.02:25:15.82#ibcon#read 4, iclass 35, count 2 2006.229.02:25:15.82#ibcon#about to read 5, iclass 35, count 2 2006.229.02:25:15.82#ibcon#read 5, iclass 35, count 2 2006.229.02:25:15.82#ibcon#about to read 6, iclass 35, count 2 2006.229.02:25:15.82#ibcon#read 6, iclass 35, count 2 2006.229.02:25:15.82#ibcon#end of sib2, iclass 35, count 2 2006.229.02:25:15.82#ibcon#*mode == 0, iclass 35, count 2 2006.229.02:25:15.82#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.02:25:15.82#ibcon#[27=AT05-04\r\n] 2006.229.02:25:15.82#ibcon#*before write, iclass 35, count 2 2006.229.02:25:15.82#ibcon#enter sib2, iclass 35, count 2 2006.229.02:25:15.82#ibcon#flushed, iclass 35, count 2 2006.229.02:25:15.82#ibcon#about to write, iclass 35, count 2 2006.229.02:25:15.82#ibcon#wrote, iclass 35, count 2 2006.229.02:25:15.82#ibcon#about to read 3, iclass 35, count 2 2006.229.02:25:15.85#ibcon#read 3, iclass 35, count 2 2006.229.02:25:15.85#ibcon#about to read 4, iclass 35, count 2 2006.229.02:25:15.85#ibcon#read 4, iclass 35, count 2 2006.229.02:25:15.85#ibcon#about to read 5, iclass 35, count 2 2006.229.02:25:15.85#ibcon#read 5, iclass 35, count 2 2006.229.02:25:15.85#ibcon#about to read 6, iclass 35, count 2 2006.229.02:25:15.85#ibcon#read 6, iclass 35, count 2 2006.229.02:25:15.85#ibcon#end of sib2, iclass 35, count 2 2006.229.02:25:15.85#ibcon#*after write, iclass 35, count 2 2006.229.02:25:15.85#ibcon#*before return 0, iclass 35, count 2 2006.229.02:25:15.85#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:15.85#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.02:25:15.85#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.02:25:15.85#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:15.85#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:15.97#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:15.97#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:15.97#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:25:15.97#ibcon#first serial, iclass 35, count 0 2006.229.02:25:15.97#ibcon#enter sib2, iclass 35, count 0 2006.229.02:25:15.97#ibcon#flushed, iclass 35, count 0 2006.229.02:25:15.97#ibcon#about to write, iclass 35, count 0 2006.229.02:25:15.97#ibcon#wrote, iclass 35, count 0 2006.229.02:25:15.97#ibcon#about to read 3, iclass 35, count 0 2006.229.02:25:15.99#ibcon#read 3, iclass 35, count 0 2006.229.02:25:15.99#ibcon#about to read 4, iclass 35, count 0 2006.229.02:25:15.99#ibcon#read 4, iclass 35, count 0 2006.229.02:25:15.99#ibcon#about to read 5, iclass 35, count 0 2006.229.02:25:15.99#ibcon#read 5, iclass 35, count 0 2006.229.02:25:15.99#ibcon#about to read 6, iclass 35, count 0 2006.229.02:25:15.99#ibcon#read 6, iclass 35, count 0 2006.229.02:25:15.99#ibcon#end of sib2, iclass 35, count 0 2006.229.02:25:15.99#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:25:15.99#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:25:15.99#ibcon#[27=USB\r\n] 2006.229.02:25:15.99#ibcon#*before write, iclass 35, count 0 2006.229.02:25:15.99#ibcon#enter sib2, iclass 35, count 0 2006.229.02:25:15.99#ibcon#flushed, iclass 35, count 0 2006.229.02:25:15.99#ibcon#about to write, iclass 35, count 0 2006.229.02:25:15.99#ibcon#wrote, iclass 35, count 0 2006.229.02:25:15.99#ibcon#about to read 3, iclass 35, count 0 2006.229.02:25:16.02#ibcon#read 3, iclass 35, count 0 2006.229.02:25:16.02#ibcon#about to read 4, iclass 35, count 0 2006.229.02:25:16.02#ibcon#read 4, iclass 35, count 0 2006.229.02:25:16.02#ibcon#about to read 5, iclass 35, count 0 2006.229.02:25:16.02#ibcon#read 5, iclass 35, count 0 2006.229.02:25:16.02#ibcon#about to read 6, iclass 35, count 0 2006.229.02:25:16.02#ibcon#read 6, iclass 35, count 0 2006.229.02:25:16.02#ibcon#end of sib2, iclass 35, count 0 2006.229.02:25:16.02#ibcon#*after write, iclass 35, count 0 2006.229.02:25:16.02#ibcon#*before return 0, iclass 35, count 0 2006.229.02:25:16.02#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:16.02#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.02:25:16.02#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:25:16.02#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:25:16.02$vck44/vblo=6,719.99 2006.229.02:25:16.02#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.02:25:16.02#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.02:25:16.02#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:16.02#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:25:16.02#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:25:16.02#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:25:16.02#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:25:16.02#ibcon#first serial, iclass 37, count 0 2006.229.02:25:16.02#ibcon#enter sib2, iclass 37, count 0 2006.229.02:25:16.02#ibcon#flushed, iclass 37, count 0 2006.229.02:25:16.02#ibcon#about to write, iclass 37, count 0 2006.229.02:25:16.02#ibcon#wrote, iclass 37, count 0 2006.229.02:25:16.02#ibcon#about to read 3, iclass 37, count 0 2006.229.02:25:16.04#ibcon#read 3, iclass 37, count 0 2006.229.02:25:16.04#ibcon#about to read 4, iclass 37, count 0 2006.229.02:25:16.04#ibcon#read 4, iclass 37, count 0 2006.229.02:25:16.04#ibcon#about to read 5, iclass 37, count 0 2006.229.02:25:16.04#ibcon#read 5, iclass 37, count 0 2006.229.02:25:16.04#ibcon#about to read 6, iclass 37, count 0 2006.229.02:25:16.04#ibcon#read 6, iclass 37, count 0 2006.229.02:25:16.04#ibcon#end of sib2, iclass 37, count 0 2006.229.02:25:16.04#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:25:16.04#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:25:16.04#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:25:16.04#ibcon#*before write, iclass 37, count 0 2006.229.02:25:16.04#ibcon#enter sib2, iclass 37, count 0 2006.229.02:25:16.04#ibcon#flushed, iclass 37, count 0 2006.229.02:25:16.04#ibcon#about to write, iclass 37, count 0 2006.229.02:25:16.04#ibcon#wrote, iclass 37, count 0 2006.229.02:25:16.04#ibcon#about to read 3, iclass 37, count 0 2006.229.02:25:16.08#ibcon#read 3, iclass 37, count 0 2006.229.02:25:16.08#ibcon#about to read 4, iclass 37, count 0 2006.229.02:25:16.08#ibcon#read 4, iclass 37, count 0 2006.229.02:25:16.08#ibcon#about to read 5, iclass 37, count 0 2006.229.02:25:16.08#ibcon#read 5, iclass 37, count 0 2006.229.02:25:16.08#ibcon#about to read 6, iclass 37, count 0 2006.229.02:25:16.08#ibcon#read 6, iclass 37, count 0 2006.229.02:25:16.08#ibcon#end of sib2, iclass 37, count 0 2006.229.02:25:16.08#ibcon#*after write, iclass 37, count 0 2006.229.02:25:16.08#ibcon#*before return 0, iclass 37, count 0 2006.229.02:25:16.08#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:25:16.08#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.02:25:16.08#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:25:16.08#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:25:16.08$vck44/vb=6,4 2006.229.02:25:16.08#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.02:25:16.08#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.02:25:16.08#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:16.08#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:25:16.14#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:25:16.14#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:25:16.14#ibcon#enter wrdev, iclass 39, count 2 2006.229.02:25:16.14#ibcon#first serial, iclass 39, count 2 2006.229.02:25:16.14#ibcon#enter sib2, iclass 39, count 2 2006.229.02:25:16.14#ibcon#flushed, iclass 39, count 2 2006.229.02:25:16.14#ibcon#about to write, iclass 39, count 2 2006.229.02:25:16.14#ibcon#wrote, iclass 39, count 2 2006.229.02:25:16.14#ibcon#about to read 3, iclass 39, count 2 2006.229.02:25:16.16#ibcon#read 3, iclass 39, count 2 2006.229.02:25:16.16#ibcon#about to read 4, iclass 39, count 2 2006.229.02:25:16.16#ibcon#read 4, iclass 39, count 2 2006.229.02:25:16.16#ibcon#about to read 5, iclass 39, count 2 2006.229.02:25:16.16#ibcon#read 5, iclass 39, count 2 2006.229.02:25:16.16#ibcon#about to read 6, iclass 39, count 2 2006.229.02:25:16.16#ibcon#read 6, iclass 39, count 2 2006.229.02:25:16.16#ibcon#end of sib2, iclass 39, count 2 2006.229.02:25:16.16#ibcon#*mode == 0, iclass 39, count 2 2006.229.02:25:16.16#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.02:25:16.16#ibcon#[27=AT06-04\r\n] 2006.229.02:25:16.16#ibcon#*before write, iclass 39, count 2 2006.229.02:25:16.16#ibcon#enter sib2, iclass 39, count 2 2006.229.02:25:16.16#ibcon#flushed, iclass 39, count 2 2006.229.02:25:16.16#ibcon#about to write, iclass 39, count 2 2006.229.02:25:16.16#ibcon#wrote, iclass 39, count 2 2006.229.02:25:16.16#ibcon#about to read 3, iclass 39, count 2 2006.229.02:25:16.19#ibcon#read 3, iclass 39, count 2 2006.229.02:25:16.19#ibcon#about to read 4, iclass 39, count 2 2006.229.02:25:16.19#ibcon#read 4, iclass 39, count 2 2006.229.02:25:16.19#ibcon#about to read 5, iclass 39, count 2 2006.229.02:25:16.19#ibcon#read 5, iclass 39, count 2 2006.229.02:25:16.19#ibcon#about to read 6, iclass 39, count 2 2006.229.02:25:16.19#ibcon#read 6, iclass 39, count 2 2006.229.02:25:16.19#ibcon#end of sib2, iclass 39, count 2 2006.229.02:25:16.19#ibcon#*after write, iclass 39, count 2 2006.229.02:25:16.19#ibcon#*before return 0, iclass 39, count 2 2006.229.02:25:16.19#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:25:16.19#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.02:25:16.19#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.02:25:16.19#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:16.19#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:25:16.31#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:25:16.31#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:25:16.31#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:25:16.31#ibcon#first serial, iclass 39, count 0 2006.229.02:25:16.31#ibcon#enter sib2, iclass 39, count 0 2006.229.02:25:16.31#ibcon#flushed, iclass 39, count 0 2006.229.02:25:16.31#ibcon#about to write, iclass 39, count 0 2006.229.02:25:16.31#ibcon#wrote, iclass 39, count 0 2006.229.02:25:16.31#ibcon#about to read 3, iclass 39, count 0 2006.229.02:25:16.33#ibcon#read 3, iclass 39, count 0 2006.229.02:25:16.33#ibcon#about to read 4, iclass 39, count 0 2006.229.02:25:16.33#ibcon#read 4, iclass 39, count 0 2006.229.02:25:16.33#ibcon#about to read 5, iclass 39, count 0 2006.229.02:25:16.33#ibcon#read 5, iclass 39, count 0 2006.229.02:25:16.33#ibcon#about to read 6, iclass 39, count 0 2006.229.02:25:16.33#ibcon#read 6, iclass 39, count 0 2006.229.02:25:16.33#ibcon#end of sib2, iclass 39, count 0 2006.229.02:25:16.33#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:25:16.33#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:25:16.33#ibcon#[27=USB\r\n] 2006.229.02:25:16.33#ibcon#*before write, iclass 39, count 0 2006.229.02:25:16.33#ibcon#enter sib2, iclass 39, count 0 2006.229.02:25:16.33#ibcon#flushed, iclass 39, count 0 2006.229.02:25:16.33#ibcon#about to write, iclass 39, count 0 2006.229.02:25:16.33#ibcon#wrote, iclass 39, count 0 2006.229.02:25:16.33#ibcon#about to read 3, iclass 39, count 0 2006.229.02:25:16.36#ibcon#read 3, iclass 39, count 0 2006.229.02:25:16.36#ibcon#about to read 4, iclass 39, count 0 2006.229.02:25:16.36#ibcon#read 4, iclass 39, count 0 2006.229.02:25:16.36#ibcon#about to read 5, iclass 39, count 0 2006.229.02:25:16.36#ibcon#read 5, iclass 39, count 0 2006.229.02:25:16.36#ibcon#about to read 6, iclass 39, count 0 2006.229.02:25:16.36#ibcon#read 6, iclass 39, count 0 2006.229.02:25:16.36#ibcon#end of sib2, iclass 39, count 0 2006.229.02:25:16.36#ibcon#*after write, iclass 39, count 0 2006.229.02:25:16.36#ibcon#*before return 0, iclass 39, count 0 2006.229.02:25:16.36#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:25:16.36#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.02:25:16.36#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:25:16.36#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:25:16.36$vck44/vblo=7,734.99 2006.229.02:25:16.36#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.02:25:16.36#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.02:25:16.36#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:16.36#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:16.36#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:16.36#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:16.36#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:25:16.36#ibcon#first serial, iclass 3, count 0 2006.229.02:25:16.36#ibcon#enter sib2, iclass 3, count 0 2006.229.02:25:16.36#ibcon#flushed, iclass 3, count 0 2006.229.02:25:16.36#ibcon#about to write, iclass 3, count 0 2006.229.02:25:16.36#ibcon#wrote, iclass 3, count 0 2006.229.02:25:16.36#ibcon#about to read 3, iclass 3, count 0 2006.229.02:25:16.38#ibcon#read 3, iclass 3, count 0 2006.229.02:25:16.38#ibcon#about to read 4, iclass 3, count 0 2006.229.02:25:16.38#ibcon#read 4, iclass 3, count 0 2006.229.02:25:16.38#ibcon#about to read 5, iclass 3, count 0 2006.229.02:25:16.38#ibcon#read 5, iclass 3, count 0 2006.229.02:25:16.38#ibcon#about to read 6, iclass 3, count 0 2006.229.02:25:16.38#ibcon#read 6, iclass 3, count 0 2006.229.02:25:16.38#ibcon#end of sib2, iclass 3, count 0 2006.229.02:25:16.38#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:25:16.38#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:25:16.38#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:25:16.38#ibcon#*before write, iclass 3, count 0 2006.229.02:25:16.38#ibcon#enter sib2, iclass 3, count 0 2006.229.02:25:16.38#ibcon#flushed, iclass 3, count 0 2006.229.02:25:16.38#ibcon#about to write, iclass 3, count 0 2006.229.02:25:16.38#ibcon#wrote, iclass 3, count 0 2006.229.02:25:16.38#ibcon#about to read 3, iclass 3, count 0 2006.229.02:25:16.42#ibcon#read 3, iclass 3, count 0 2006.229.02:25:16.42#ibcon#about to read 4, iclass 3, count 0 2006.229.02:25:16.42#ibcon#read 4, iclass 3, count 0 2006.229.02:25:16.42#ibcon#about to read 5, iclass 3, count 0 2006.229.02:25:16.42#ibcon#read 5, iclass 3, count 0 2006.229.02:25:16.42#ibcon#about to read 6, iclass 3, count 0 2006.229.02:25:16.42#ibcon#read 6, iclass 3, count 0 2006.229.02:25:16.42#ibcon#end of sib2, iclass 3, count 0 2006.229.02:25:16.42#ibcon#*after write, iclass 3, count 0 2006.229.02:25:16.42#ibcon#*before return 0, iclass 3, count 0 2006.229.02:25:16.42#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:16.42#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:25:16.42#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:25:16.42#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:25:16.42$vck44/vb=7,4 2006.229.02:25:16.42#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.02:25:16.42#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.02:25:16.42#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:16.42#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:16.48#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:16.48#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:16.48#ibcon#enter wrdev, iclass 5, count 2 2006.229.02:25:16.48#ibcon#first serial, iclass 5, count 2 2006.229.02:25:16.48#ibcon#enter sib2, iclass 5, count 2 2006.229.02:25:16.48#ibcon#flushed, iclass 5, count 2 2006.229.02:25:16.48#ibcon#about to write, iclass 5, count 2 2006.229.02:25:16.48#ibcon#wrote, iclass 5, count 2 2006.229.02:25:16.48#ibcon#about to read 3, iclass 5, count 2 2006.229.02:25:16.50#ibcon#read 3, iclass 5, count 2 2006.229.02:25:16.50#ibcon#about to read 4, iclass 5, count 2 2006.229.02:25:16.50#ibcon#read 4, iclass 5, count 2 2006.229.02:25:16.50#ibcon#about to read 5, iclass 5, count 2 2006.229.02:25:16.50#ibcon#read 5, iclass 5, count 2 2006.229.02:25:16.50#ibcon#about to read 6, iclass 5, count 2 2006.229.02:25:16.50#ibcon#read 6, iclass 5, count 2 2006.229.02:25:16.50#ibcon#end of sib2, iclass 5, count 2 2006.229.02:25:16.50#ibcon#*mode == 0, iclass 5, count 2 2006.229.02:25:16.50#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.02:25:16.50#ibcon#[27=AT07-04\r\n] 2006.229.02:25:16.50#ibcon#*before write, iclass 5, count 2 2006.229.02:25:16.50#ibcon#enter sib2, iclass 5, count 2 2006.229.02:25:16.50#ibcon#flushed, iclass 5, count 2 2006.229.02:25:16.50#ibcon#about to write, iclass 5, count 2 2006.229.02:25:16.50#ibcon#wrote, iclass 5, count 2 2006.229.02:25:16.50#ibcon#about to read 3, iclass 5, count 2 2006.229.02:25:16.53#ibcon#read 3, iclass 5, count 2 2006.229.02:25:16.53#ibcon#about to read 4, iclass 5, count 2 2006.229.02:25:16.53#ibcon#read 4, iclass 5, count 2 2006.229.02:25:16.53#ibcon#about to read 5, iclass 5, count 2 2006.229.02:25:16.53#ibcon#read 5, iclass 5, count 2 2006.229.02:25:16.53#ibcon#about to read 6, iclass 5, count 2 2006.229.02:25:16.53#ibcon#read 6, iclass 5, count 2 2006.229.02:25:16.53#ibcon#end of sib2, iclass 5, count 2 2006.229.02:25:16.53#ibcon#*after write, iclass 5, count 2 2006.229.02:25:16.53#ibcon#*before return 0, iclass 5, count 2 2006.229.02:25:16.53#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:16.53#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.02:25:16.53#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.02:25:16.53#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:16.53#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:16.65#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:16.65#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:16.65#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:25:16.65#ibcon#first serial, iclass 5, count 0 2006.229.02:25:16.65#ibcon#enter sib2, iclass 5, count 0 2006.229.02:25:16.65#ibcon#flushed, iclass 5, count 0 2006.229.02:25:16.65#ibcon#about to write, iclass 5, count 0 2006.229.02:25:16.65#ibcon#wrote, iclass 5, count 0 2006.229.02:25:16.65#ibcon#about to read 3, iclass 5, count 0 2006.229.02:25:16.67#ibcon#read 3, iclass 5, count 0 2006.229.02:25:16.67#ibcon#about to read 4, iclass 5, count 0 2006.229.02:25:16.67#ibcon#read 4, iclass 5, count 0 2006.229.02:25:16.67#ibcon#about to read 5, iclass 5, count 0 2006.229.02:25:16.67#ibcon#read 5, iclass 5, count 0 2006.229.02:25:16.67#ibcon#about to read 6, iclass 5, count 0 2006.229.02:25:16.67#ibcon#read 6, iclass 5, count 0 2006.229.02:25:16.67#ibcon#end of sib2, iclass 5, count 0 2006.229.02:25:16.67#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:25:16.67#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:25:16.67#ibcon#[27=USB\r\n] 2006.229.02:25:16.67#ibcon#*before write, iclass 5, count 0 2006.229.02:25:16.67#ibcon#enter sib2, iclass 5, count 0 2006.229.02:25:16.67#ibcon#flushed, iclass 5, count 0 2006.229.02:25:16.67#ibcon#about to write, iclass 5, count 0 2006.229.02:25:16.67#ibcon#wrote, iclass 5, count 0 2006.229.02:25:16.67#ibcon#about to read 3, iclass 5, count 0 2006.229.02:25:16.70#ibcon#read 3, iclass 5, count 0 2006.229.02:25:16.70#ibcon#about to read 4, iclass 5, count 0 2006.229.02:25:16.70#ibcon#read 4, iclass 5, count 0 2006.229.02:25:16.70#ibcon#about to read 5, iclass 5, count 0 2006.229.02:25:16.70#ibcon#read 5, iclass 5, count 0 2006.229.02:25:16.70#ibcon#about to read 6, iclass 5, count 0 2006.229.02:25:16.70#ibcon#read 6, iclass 5, count 0 2006.229.02:25:16.70#ibcon#end of sib2, iclass 5, count 0 2006.229.02:25:16.70#ibcon#*after write, iclass 5, count 0 2006.229.02:25:16.70#ibcon#*before return 0, iclass 5, count 0 2006.229.02:25:16.70#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:16.70#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.02:25:16.70#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:25:16.70#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:25:16.70$vck44/vblo=8,744.99 2006.229.02:25:16.70#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.02:25:16.70#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.02:25:16.70#ibcon#ireg 17 cls_cnt 0 2006.229.02:25:16.70#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:16.70#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:16.70#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:16.70#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:25:16.70#ibcon#first serial, iclass 7, count 0 2006.229.02:25:16.70#ibcon#enter sib2, iclass 7, count 0 2006.229.02:25:16.70#ibcon#flushed, iclass 7, count 0 2006.229.02:25:16.70#ibcon#about to write, iclass 7, count 0 2006.229.02:25:16.70#ibcon#wrote, iclass 7, count 0 2006.229.02:25:16.70#ibcon#about to read 3, iclass 7, count 0 2006.229.02:25:16.72#ibcon#read 3, iclass 7, count 0 2006.229.02:25:16.72#ibcon#about to read 4, iclass 7, count 0 2006.229.02:25:16.72#ibcon#read 4, iclass 7, count 0 2006.229.02:25:16.72#ibcon#about to read 5, iclass 7, count 0 2006.229.02:25:16.72#ibcon#read 5, iclass 7, count 0 2006.229.02:25:16.72#ibcon#about to read 6, iclass 7, count 0 2006.229.02:25:16.72#ibcon#read 6, iclass 7, count 0 2006.229.02:25:16.72#ibcon#end of sib2, iclass 7, count 0 2006.229.02:25:16.72#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:25:16.72#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:25:16.72#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:25:16.72#ibcon#*before write, iclass 7, count 0 2006.229.02:25:16.72#ibcon#enter sib2, iclass 7, count 0 2006.229.02:25:16.72#ibcon#flushed, iclass 7, count 0 2006.229.02:25:16.72#ibcon#about to write, iclass 7, count 0 2006.229.02:25:16.72#ibcon#wrote, iclass 7, count 0 2006.229.02:25:16.72#ibcon#about to read 3, iclass 7, count 0 2006.229.02:25:16.76#ibcon#read 3, iclass 7, count 0 2006.229.02:25:16.76#ibcon#about to read 4, iclass 7, count 0 2006.229.02:25:16.76#ibcon#read 4, iclass 7, count 0 2006.229.02:25:16.76#ibcon#about to read 5, iclass 7, count 0 2006.229.02:25:16.76#ibcon#read 5, iclass 7, count 0 2006.229.02:25:16.76#ibcon#about to read 6, iclass 7, count 0 2006.229.02:25:16.76#ibcon#read 6, iclass 7, count 0 2006.229.02:25:16.76#ibcon#end of sib2, iclass 7, count 0 2006.229.02:25:16.76#ibcon#*after write, iclass 7, count 0 2006.229.02:25:16.76#ibcon#*before return 0, iclass 7, count 0 2006.229.02:25:16.76#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:16.76#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.02:25:16.76#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:25:16.76#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:25:16.76$vck44/vb=8,4 2006.229.02:25:16.76#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.02:25:16.76#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.02:25:16.76#ibcon#ireg 11 cls_cnt 2 2006.229.02:25:16.76#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:16.82#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:16.82#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:16.82#ibcon#enter wrdev, iclass 11, count 2 2006.229.02:25:16.82#ibcon#first serial, iclass 11, count 2 2006.229.02:25:16.82#ibcon#enter sib2, iclass 11, count 2 2006.229.02:25:16.82#ibcon#flushed, iclass 11, count 2 2006.229.02:25:16.82#ibcon#about to write, iclass 11, count 2 2006.229.02:25:16.82#ibcon#wrote, iclass 11, count 2 2006.229.02:25:16.82#ibcon#about to read 3, iclass 11, count 2 2006.229.02:25:16.84#ibcon#read 3, iclass 11, count 2 2006.229.02:25:16.84#ibcon#about to read 4, iclass 11, count 2 2006.229.02:25:16.84#ibcon#read 4, iclass 11, count 2 2006.229.02:25:16.84#ibcon#about to read 5, iclass 11, count 2 2006.229.02:25:16.84#ibcon#read 5, iclass 11, count 2 2006.229.02:25:16.84#ibcon#about to read 6, iclass 11, count 2 2006.229.02:25:16.84#ibcon#read 6, iclass 11, count 2 2006.229.02:25:16.84#ibcon#end of sib2, iclass 11, count 2 2006.229.02:25:16.84#ibcon#*mode == 0, iclass 11, count 2 2006.229.02:25:16.84#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.02:25:16.84#ibcon#[27=AT08-04\r\n] 2006.229.02:25:16.84#ibcon#*before write, iclass 11, count 2 2006.229.02:25:16.84#ibcon#enter sib2, iclass 11, count 2 2006.229.02:25:16.84#ibcon#flushed, iclass 11, count 2 2006.229.02:25:16.84#ibcon#about to write, iclass 11, count 2 2006.229.02:25:16.84#ibcon#wrote, iclass 11, count 2 2006.229.02:25:16.84#ibcon#about to read 3, iclass 11, count 2 2006.229.02:25:16.87#ibcon#read 3, iclass 11, count 2 2006.229.02:25:16.87#ibcon#about to read 4, iclass 11, count 2 2006.229.02:25:16.87#ibcon#read 4, iclass 11, count 2 2006.229.02:25:16.87#ibcon#about to read 5, iclass 11, count 2 2006.229.02:25:16.87#ibcon#read 5, iclass 11, count 2 2006.229.02:25:16.87#ibcon#about to read 6, iclass 11, count 2 2006.229.02:25:16.87#ibcon#read 6, iclass 11, count 2 2006.229.02:25:16.87#ibcon#end of sib2, iclass 11, count 2 2006.229.02:25:16.87#ibcon#*after write, iclass 11, count 2 2006.229.02:25:16.87#ibcon#*before return 0, iclass 11, count 2 2006.229.02:25:16.87#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:16.87#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.02:25:16.87#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.02:25:16.87#ibcon#ireg 7 cls_cnt 0 2006.229.02:25:16.87#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:16.99#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:16.99#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:16.99#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:25:16.99#ibcon#first serial, iclass 11, count 0 2006.229.02:25:16.99#ibcon#enter sib2, iclass 11, count 0 2006.229.02:25:16.99#ibcon#flushed, iclass 11, count 0 2006.229.02:25:16.99#ibcon#about to write, iclass 11, count 0 2006.229.02:25:16.99#ibcon#wrote, iclass 11, count 0 2006.229.02:25:16.99#ibcon#about to read 3, iclass 11, count 0 2006.229.02:25:17.01#ibcon#read 3, iclass 11, count 0 2006.229.02:25:17.01#ibcon#about to read 4, iclass 11, count 0 2006.229.02:25:17.01#ibcon#read 4, iclass 11, count 0 2006.229.02:25:17.01#ibcon#about to read 5, iclass 11, count 0 2006.229.02:25:17.01#ibcon#read 5, iclass 11, count 0 2006.229.02:25:17.01#ibcon#about to read 6, iclass 11, count 0 2006.229.02:25:17.01#ibcon#read 6, iclass 11, count 0 2006.229.02:25:17.01#ibcon#end of sib2, iclass 11, count 0 2006.229.02:25:17.01#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:25:17.01#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:25:17.01#ibcon#[27=USB\r\n] 2006.229.02:25:17.01#ibcon#*before write, iclass 11, count 0 2006.229.02:25:17.01#ibcon#enter sib2, iclass 11, count 0 2006.229.02:25:17.01#ibcon#flushed, iclass 11, count 0 2006.229.02:25:17.01#ibcon#about to write, iclass 11, count 0 2006.229.02:25:17.01#ibcon#wrote, iclass 11, count 0 2006.229.02:25:17.01#ibcon#about to read 3, iclass 11, count 0 2006.229.02:25:17.04#ibcon#read 3, iclass 11, count 0 2006.229.02:25:17.04#ibcon#about to read 4, iclass 11, count 0 2006.229.02:25:17.04#ibcon#read 4, iclass 11, count 0 2006.229.02:25:17.04#ibcon#about to read 5, iclass 11, count 0 2006.229.02:25:17.04#ibcon#read 5, iclass 11, count 0 2006.229.02:25:17.04#ibcon#about to read 6, iclass 11, count 0 2006.229.02:25:17.04#ibcon#read 6, iclass 11, count 0 2006.229.02:25:17.04#ibcon#end of sib2, iclass 11, count 0 2006.229.02:25:17.04#ibcon#*after write, iclass 11, count 0 2006.229.02:25:17.04#ibcon#*before return 0, iclass 11, count 0 2006.229.02:25:17.04#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:17.04#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.02:25:17.04#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:25:17.04#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:25:17.04$vck44/vabw=wide 2006.229.02:25:17.04#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.02:25:17.04#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.02:25:17.04#ibcon#ireg 8 cls_cnt 0 2006.229.02:25:17.04#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:17.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:17.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:17.04#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:25:17.04#ibcon#first serial, iclass 13, count 0 2006.229.02:25:17.04#ibcon#enter sib2, iclass 13, count 0 2006.229.02:25:17.04#ibcon#flushed, iclass 13, count 0 2006.229.02:25:17.04#ibcon#about to write, iclass 13, count 0 2006.229.02:25:17.04#ibcon#wrote, iclass 13, count 0 2006.229.02:25:17.04#ibcon#about to read 3, iclass 13, count 0 2006.229.02:25:17.06#ibcon#read 3, iclass 13, count 0 2006.229.02:25:17.06#ibcon#about to read 4, iclass 13, count 0 2006.229.02:25:17.06#ibcon#read 4, iclass 13, count 0 2006.229.02:25:17.06#ibcon#about to read 5, iclass 13, count 0 2006.229.02:25:17.06#ibcon#read 5, iclass 13, count 0 2006.229.02:25:17.06#ibcon#about to read 6, iclass 13, count 0 2006.229.02:25:17.06#ibcon#read 6, iclass 13, count 0 2006.229.02:25:17.06#ibcon#end of sib2, iclass 13, count 0 2006.229.02:25:17.06#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:25:17.06#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:25:17.06#ibcon#[25=BW32\r\n] 2006.229.02:25:17.06#ibcon#*before write, iclass 13, count 0 2006.229.02:25:17.06#ibcon#enter sib2, iclass 13, count 0 2006.229.02:25:17.06#ibcon#flushed, iclass 13, count 0 2006.229.02:25:17.06#ibcon#about to write, iclass 13, count 0 2006.229.02:25:17.06#ibcon#wrote, iclass 13, count 0 2006.229.02:25:17.06#ibcon#about to read 3, iclass 13, count 0 2006.229.02:25:17.09#ibcon#read 3, iclass 13, count 0 2006.229.02:25:17.09#ibcon#about to read 4, iclass 13, count 0 2006.229.02:25:17.09#ibcon#read 4, iclass 13, count 0 2006.229.02:25:17.09#ibcon#about to read 5, iclass 13, count 0 2006.229.02:25:17.09#ibcon#read 5, iclass 13, count 0 2006.229.02:25:17.09#ibcon#about to read 6, iclass 13, count 0 2006.229.02:25:17.09#ibcon#read 6, iclass 13, count 0 2006.229.02:25:17.09#ibcon#end of sib2, iclass 13, count 0 2006.229.02:25:17.09#ibcon#*after write, iclass 13, count 0 2006.229.02:25:17.09#ibcon#*before return 0, iclass 13, count 0 2006.229.02:25:17.09#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:17.09#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.02:25:17.09#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:25:17.09#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:25:17.09$vck44/vbbw=wide 2006.229.02:25:17.09#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.02:25:17.09#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.02:25:17.09#ibcon#ireg 8 cls_cnt 0 2006.229.02:25:17.09#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:25:17.16#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:25:17.16#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:25:17.16#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:25:17.16#ibcon#first serial, iclass 15, count 0 2006.229.02:25:17.16#ibcon#enter sib2, iclass 15, count 0 2006.229.02:25:17.16#ibcon#flushed, iclass 15, count 0 2006.229.02:25:17.16#ibcon#about to write, iclass 15, count 0 2006.229.02:25:17.16#ibcon#wrote, iclass 15, count 0 2006.229.02:25:17.16#ibcon#about to read 3, iclass 15, count 0 2006.229.02:25:17.18#ibcon#read 3, iclass 15, count 0 2006.229.02:25:17.18#ibcon#about to read 4, iclass 15, count 0 2006.229.02:25:17.18#ibcon#read 4, iclass 15, count 0 2006.229.02:25:17.18#ibcon#about to read 5, iclass 15, count 0 2006.229.02:25:17.18#ibcon#read 5, iclass 15, count 0 2006.229.02:25:17.18#ibcon#about to read 6, iclass 15, count 0 2006.229.02:25:17.18#ibcon#read 6, iclass 15, count 0 2006.229.02:25:17.18#ibcon#end of sib2, iclass 15, count 0 2006.229.02:25:17.18#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:25:17.18#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:25:17.18#ibcon#[27=BW32\r\n] 2006.229.02:25:17.18#ibcon#*before write, iclass 15, count 0 2006.229.02:25:17.18#ibcon#enter sib2, iclass 15, count 0 2006.229.02:25:17.18#ibcon#flushed, iclass 15, count 0 2006.229.02:25:17.18#ibcon#about to write, iclass 15, count 0 2006.229.02:25:17.18#ibcon#wrote, iclass 15, count 0 2006.229.02:25:17.18#ibcon#about to read 3, iclass 15, count 0 2006.229.02:25:17.21#ibcon#read 3, iclass 15, count 0 2006.229.02:25:17.21#ibcon#about to read 4, iclass 15, count 0 2006.229.02:25:17.21#ibcon#read 4, iclass 15, count 0 2006.229.02:25:17.21#ibcon#about to read 5, iclass 15, count 0 2006.229.02:25:17.21#ibcon#read 5, iclass 15, count 0 2006.229.02:25:17.21#ibcon#about to read 6, iclass 15, count 0 2006.229.02:25:17.21#ibcon#read 6, iclass 15, count 0 2006.229.02:25:17.21#ibcon#end of sib2, iclass 15, count 0 2006.229.02:25:17.21#ibcon#*after write, iclass 15, count 0 2006.229.02:25:17.21#ibcon#*before return 0, iclass 15, count 0 2006.229.02:25:17.21#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:25:17.21#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:25:17.21#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:25:17.21#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:25:17.21$setupk4/ifdk4 2006.229.02:25:17.21$ifdk4/lo= 2006.229.02:25:17.21$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:25:17.21$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:25:17.21$ifdk4/patch= 2006.229.02:25:17.21$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:25:17.21$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:25:17.21$setupk4/!*+20s 2006.229.02:25:23.37#abcon#<5=/06 3.6 7.2 29.481001001.1\r\n> 2006.229.02:25:23.39#abcon#{5=INTERFACE CLEAR} 2006.229.02:25:23.45#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:25:31.68$setupk4/"tpicd 2006.229.02:25:31.68$setupk4/echo=off 2006.229.02:25:31.68$setupk4/xlog=off 2006.229.02:25:31.68:!2006.229.02:29:32 2006.229.02:25:45.14#trakl#Source acquired 2006.229.02:25:46.14#flagr#flagr/antenna,acquired 2006.229.02:29:22.13#trakl#Off source 2006.229.02:29:22.13?ERROR st -7 Antenna off-source! 2006.229.02:29:22.13#trakl#az 9.996 el 52.984 azerr*cos(el) 0.1687 elerr -0.0048 2006.229.02:29:22.13#flagr#flagr/antenna,off-source 2006.229.02:29:32.00:preob 2006.229.02:29:32.14?ERROR an -103 Pointing computer tracking errors are too large. 2006.229.02:29:32.14?ERROR qo -301 WARNING: ONSOURCE status is SLEWING! 2006.229.02:29:32.14/onsource/SLEWING 2006.229.02:29:32.14:!2006.229.02:29:42 2006.229.02:29:37.14#trakl#Off source 2006.229.02:29:37.14?ERROR st -7 Antenna off-source! 2006.229.02:29:37.14#trakl#az 9.967 el 52.993 azerr*cos(el) 24.1083 elerr -0.0006 2006.229.02:29:42.00:"tape 2006.229.02:29:42.00:"st=record 2006.229.02:29:42.00:data_valid=on 2006.229.02:29:42.00:midob 2006.229.02:29:43.14?ERROR an -103 Pointing computer tracking errors are too large. 2006.229.02:29:43.14?ERROR qo -301 WARNING: ONSOURCE status is SLEWING! 2006.229.02:29:43.14/onsource/SLEWING 2006.229.02:29:43.14/wx/29.34,1001.2,100 2006.229.02:29:43.35/cable/+6.4075E-03 2006.229.02:29:44.44/va/01,08,usb,yes,36,39 2006.229.02:29:44.44/va/02,07,usb,yes,39,39 2006.229.02:29:44.44/va/03,06,usb,yes,48,51 2006.229.02:29:44.44/va/04,07,usb,yes,40,42 2006.229.02:29:44.44/va/05,04,usb,yes,36,36 2006.229.02:29:44.44/va/06,04,usb,yes,40,40 2006.229.02:29:44.44/va/07,05,usb,yes,36,36 2006.229.02:29:44.44/va/08,06,usb,yes,26,32 2006.229.02:29:44.67/valo/01,524.99,yes,locked 2006.229.02:29:44.67/valo/02,534.99,yes,locked 2006.229.02:29:44.67/valo/03,564.99,yes,locked 2006.229.02:29:44.67/valo/04,624.99,yes,locked 2006.229.02:29:44.67/valo/05,734.99,yes,locked 2006.229.02:29:44.67/valo/06,814.99,yes,locked 2006.229.02:29:44.67/valo/07,864.99,yes,locked 2006.229.02:29:44.67/valo/08,884.99,yes,locked 2006.229.02:29:45.76/vb/01,04,usb,yes,31,29 2006.229.02:29:45.76/vb/02,04,usb,yes,33,33 2006.229.02:29:45.76/vb/03,04,usb,yes,30,33 2006.229.02:29:45.76/vb/04,04,usb,yes,35,34 2006.229.02:29:45.76/vb/05,04,usb,yes,27,30 2006.229.02:29:45.76/vb/06,04,usb,yes,32,28 2006.229.02:29:45.76/vb/07,04,usb,yes,31,31 2006.229.02:29:45.76/vb/08,04,usb,yes,29,32 2006.229.02:29:46.00/vblo/01,629.99,yes,locked 2006.229.02:29:46.00/vblo/02,634.99,yes,locked 2006.229.02:29:46.00/vblo/03,649.99,yes,locked 2006.229.02:29:46.00/vblo/04,679.99,yes,locked 2006.229.02:29:46.00/vblo/05,709.99,yes,locked 2006.229.02:29:46.00/vblo/06,719.99,yes,locked 2006.229.02:29:46.00/vblo/07,734.99,yes,locked 2006.229.02:29:46.00/vblo/08,744.99,yes,locked 2006.229.02:29:46.15/vabw/8 2006.229.02:29:46.30/vbbw/8 2006.229.02:29:46.39/xfe/off,on,12.0 2006.229.02:29:46.76/ifatt/23,28,28,28 2006.229.02:29:47.08/fmout-gps/S +4.62E-07 2006.229.02:29:47.12:!2006.229.02:33:22 2006.229.02:29:52.14#trakl#Off source 2006.229.02:29:52.14?ERROR st -7 Antenna off-source! 2006.229.02:29:52.14#trakl#az 9.937 el 53.001 azerr*cos(el) 53.5363 elerr -0.0033 2006.229.02:30:07.14#trakl#Off source 2006.229.02:30:07.14?ERROR st -7 Antenna off-source! 2006.229.02:30:07.14#trakl#az 9.908 el 53.010 azerr*cos(el) 82.9487 elerr -0.0031 2006.229.02:30:22.14#trakl#Off source 2006.229.02:30:22.14?ERROR st -7 Antenna off-source! 2006.229.02:30:22.14#trakl#az 9.879 el 53.019 azerr*cos(el) -104.2104 elerr 0.0012 2006.229.02:30:37.14#trakl#Off source 2006.229.02:30:37.14?ERROR st -7 Antenna off-source! 2006.229.02:30:37.14#trakl#az 9.849 el 53.027 azerr*cos(el) -74.7473 elerr -0.0025 2006.229.02:30:52.14#trakl#Off source 2006.229.02:30:52.14?ERROR st -7 Antenna off-source! 2006.229.02:30:52.14#trakl#az 9.820 el 53.036 azerr*cos(el) -45.2611 elerr -0.0012 2006.229.02:31:07.14#trakl#Off source 2006.229.02:31:07.14?ERROR st -7 Antenna off-source! 2006.229.02:31:07.14#trakl#az 9.790 el 53.045 azerr*cos(el) -15.8121 elerr 0.0002 2006.229.02:31:22.14#trakl#Off source 2006.229.02:31:22.14?ERROR st -7 Antenna off-source! 2006.229.02:31:22.14#trakl#az 9.761 el 53.053 azerr*cos(el) 0.0001 elerr -0.0004 2006.229.02:31:23.14#trakl#Source re-acquired 2006.229.02:31:23.14#flagr#flagr/antenna,re-acquired 2006.229.02:33:22.00:data_valid=off 2006.229.02:33:22.00:"et 2006.229.02:33:22.00:!+3s 2006.229.02:33:25.01:"tape 2006.229.02:33:25.01:postob 2006.229.02:33:25.10/cable/+6.4076E-03 2006.229.02:33:25.10/wx/29.29,1001.2,100 2006.229.02:33:26.08/fmout-gps/S +4.65E-07 2006.229.02:33:26.08:scan_name=229-0237,jd0608,110 2006.229.02:33:26.08:source=0528+134,053056.42,133155.1,2000.0,ccw 2006.229.02:33:27.14#flagr#flagr/antenna,new-source 2006.229.02:33:27.14:checkk5 2006.229.02:33:27.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:33:27.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:33:28.41/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:33:28.81/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:33:29.21/chk_obsdata//k5ts1/T2290229??a.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.02:33:29.82/chk_obsdata//k5ts2/T2290229??b.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.02:33:30.20/chk_obsdata//k5ts3/T2290229??c.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.02:33:30.62/chk_obsdata//k5ts4/T2290229??d.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.02:33:36.42/k5log//k5ts1_log_newline 2006.229.02:33:37.17/k5log//k5ts2_log_newline 2006.229.02:33:37.91/k5log//k5ts3_log_newline 2006.229.02:33:38.71/k5log//k5ts4_log_newline 2006.229.02:33:38.74/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:33:38.74:setupk4=1 2006.229.02:33:38.74$setupk4/echo=on 2006.229.02:33:38.74$setupk4/pcalon 2006.229.02:33:38.74$pcalon/"no phase cal control is implemented here 2006.229.02:33:38.74$setupk4/"tpicd=stop 2006.229.02:33:38.74$setupk4/"rec=synch_on 2006.229.02:33:38.74$setupk4/"rec_mode=128 2006.229.02:33:38.74$setupk4/!* 2006.229.02:33:38.74$setupk4/recpk4 2006.229.02:33:38.74$recpk4/recpatch= 2006.229.02:33:38.74$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:33:38.74$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:33:38.74$setupk4/vck44 2006.229.02:33:38.74$vck44/valo=1,524.99 2006.229.02:33:38.74#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:33:38.74#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:33:38.74#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:38.74#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:38.74#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:38.74#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:38.74#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:33:38.74#ibcon#first serial, iclass 26, count 0 2006.229.02:33:38.74#ibcon#enter sib2, iclass 26, count 0 2006.229.02:33:38.74#ibcon#flushed, iclass 26, count 0 2006.229.02:33:38.74#ibcon#about to write, iclass 26, count 0 2006.229.02:33:38.74#ibcon#wrote, iclass 26, count 0 2006.229.02:33:38.74#ibcon#about to read 3, iclass 26, count 0 2006.229.02:33:38.78#ibcon#read 3, iclass 26, count 0 2006.229.02:33:38.78#ibcon#about to read 4, iclass 26, count 0 2006.229.02:33:38.78#ibcon#read 4, iclass 26, count 0 2006.229.02:33:38.78#ibcon#about to read 5, iclass 26, count 0 2006.229.02:33:38.78#ibcon#read 5, iclass 26, count 0 2006.229.02:33:38.78#ibcon#about to read 6, iclass 26, count 0 2006.229.02:33:38.78#ibcon#read 6, iclass 26, count 0 2006.229.02:33:38.78#ibcon#end of sib2, iclass 26, count 0 2006.229.02:33:38.78#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:33:38.78#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:33:38.78#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:33:38.78#ibcon#*before write, iclass 26, count 0 2006.229.02:33:38.78#ibcon#enter sib2, iclass 26, count 0 2006.229.02:33:38.78#ibcon#flushed, iclass 26, count 0 2006.229.02:33:38.78#ibcon#about to write, iclass 26, count 0 2006.229.02:33:38.78#ibcon#wrote, iclass 26, count 0 2006.229.02:33:38.78#ibcon#about to read 3, iclass 26, count 0 2006.229.02:33:38.83#ibcon#read 3, iclass 26, count 0 2006.229.02:33:38.83#ibcon#about to read 4, iclass 26, count 0 2006.229.02:33:38.83#ibcon#read 4, iclass 26, count 0 2006.229.02:33:38.83#ibcon#about to read 5, iclass 26, count 0 2006.229.02:33:38.83#ibcon#read 5, iclass 26, count 0 2006.229.02:33:38.83#ibcon#about to read 6, iclass 26, count 0 2006.229.02:33:38.83#ibcon#read 6, iclass 26, count 0 2006.229.02:33:38.83#ibcon#end of sib2, iclass 26, count 0 2006.229.02:33:38.83#ibcon#*after write, iclass 26, count 0 2006.229.02:33:38.83#ibcon#*before return 0, iclass 26, count 0 2006.229.02:33:38.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:38.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:38.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:33:38.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:33:38.83$vck44/va=1,8 2006.229.02:33:38.83#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:33:38.83#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:33:38.83#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:38.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:38.83#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:38.83#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:38.83#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:33:38.83#ibcon#first serial, iclass 28, count 2 2006.229.02:33:38.83#ibcon#enter sib2, iclass 28, count 2 2006.229.02:33:38.83#ibcon#flushed, iclass 28, count 2 2006.229.02:33:38.83#ibcon#about to write, iclass 28, count 2 2006.229.02:33:38.83#ibcon#wrote, iclass 28, count 2 2006.229.02:33:38.83#ibcon#about to read 3, iclass 28, count 2 2006.229.02:33:38.85#ibcon#read 3, iclass 28, count 2 2006.229.02:33:38.85#ibcon#about to read 4, iclass 28, count 2 2006.229.02:33:38.85#ibcon#read 4, iclass 28, count 2 2006.229.02:33:38.85#ibcon#about to read 5, iclass 28, count 2 2006.229.02:33:38.85#ibcon#read 5, iclass 28, count 2 2006.229.02:33:38.85#ibcon#about to read 6, iclass 28, count 2 2006.229.02:33:38.85#ibcon#read 6, iclass 28, count 2 2006.229.02:33:38.85#ibcon#end of sib2, iclass 28, count 2 2006.229.02:33:38.85#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:33:38.85#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:33:38.85#ibcon#[25=AT01-08\r\n] 2006.229.02:33:38.85#ibcon#*before write, iclass 28, count 2 2006.229.02:33:38.85#ibcon#enter sib2, iclass 28, count 2 2006.229.02:33:38.85#ibcon#flushed, iclass 28, count 2 2006.229.02:33:38.85#ibcon#about to write, iclass 28, count 2 2006.229.02:33:38.85#ibcon#wrote, iclass 28, count 2 2006.229.02:33:38.85#ibcon#about to read 3, iclass 28, count 2 2006.229.02:33:38.88#ibcon#read 3, iclass 28, count 2 2006.229.02:33:38.88#ibcon#about to read 4, iclass 28, count 2 2006.229.02:33:38.88#ibcon#read 4, iclass 28, count 2 2006.229.02:33:38.88#ibcon#about to read 5, iclass 28, count 2 2006.229.02:33:38.88#ibcon#read 5, iclass 28, count 2 2006.229.02:33:38.88#ibcon#about to read 6, iclass 28, count 2 2006.229.02:33:38.88#ibcon#read 6, iclass 28, count 2 2006.229.02:33:38.88#ibcon#end of sib2, iclass 28, count 2 2006.229.02:33:38.88#ibcon#*after write, iclass 28, count 2 2006.229.02:33:38.88#ibcon#*before return 0, iclass 28, count 2 2006.229.02:33:38.88#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:38.88#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:38.88#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:33:38.88#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:38.88#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:39.00#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:39.00#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:39.00#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:33:39.00#ibcon#first serial, iclass 28, count 0 2006.229.02:33:39.00#ibcon#enter sib2, iclass 28, count 0 2006.229.02:33:39.00#ibcon#flushed, iclass 28, count 0 2006.229.02:33:39.00#ibcon#about to write, iclass 28, count 0 2006.229.02:33:39.00#ibcon#wrote, iclass 28, count 0 2006.229.02:33:39.00#ibcon#about to read 3, iclass 28, count 0 2006.229.02:33:39.02#ibcon#read 3, iclass 28, count 0 2006.229.02:33:39.02#ibcon#about to read 4, iclass 28, count 0 2006.229.02:33:39.02#ibcon#read 4, iclass 28, count 0 2006.229.02:33:39.02#ibcon#about to read 5, iclass 28, count 0 2006.229.02:33:39.02#ibcon#read 5, iclass 28, count 0 2006.229.02:33:39.02#ibcon#about to read 6, iclass 28, count 0 2006.229.02:33:39.02#ibcon#read 6, iclass 28, count 0 2006.229.02:33:39.02#ibcon#end of sib2, iclass 28, count 0 2006.229.02:33:39.02#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:33:39.02#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:33:39.02#ibcon#[25=USB\r\n] 2006.229.02:33:39.02#ibcon#*before write, iclass 28, count 0 2006.229.02:33:39.02#ibcon#enter sib2, iclass 28, count 0 2006.229.02:33:39.02#ibcon#flushed, iclass 28, count 0 2006.229.02:33:39.02#ibcon#about to write, iclass 28, count 0 2006.229.02:33:39.02#ibcon#wrote, iclass 28, count 0 2006.229.02:33:39.02#ibcon#about to read 3, iclass 28, count 0 2006.229.02:33:39.05#ibcon#read 3, iclass 28, count 0 2006.229.02:33:39.05#ibcon#about to read 4, iclass 28, count 0 2006.229.02:33:39.05#ibcon#read 4, iclass 28, count 0 2006.229.02:33:39.05#ibcon#about to read 5, iclass 28, count 0 2006.229.02:33:39.05#ibcon#read 5, iclass 28, count 0 2006.229.02:33:39.05#ibcon#about to read 6, iclass 28, count 0 2006.229.02:33:39.05#ibcon#read 6, iclass 28, count 0 2006.229.02:33:39.05#ibcon#end of sib2, iclass 28, count 0 2006.229.02:33:39.05#ibcon#*after write, iclass 28, count 0 2006.229.02:33:39.05#ibcon#*before return 0, iclass 28, count 0 2006.229.02:33:39.05#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:39.05#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:39.05#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:33:39.05#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:33:39.05$vck44/valo=2,534.99 2006.229.02:33:39.05#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:33:39.05#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:33:39.05#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:39.05#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:33:39.05#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:33:39.05#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:33:39.05#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:33:39.05#ibcon#first serial, iclass 30, count 0 2006.229.02:33:39.05#ibcon#enter sib2, iclass 30, count 0 2006.229.02:33:39.05#ibcon#flushed, iclass 30, count 0 2006.229.02:33:39.05#ibcon#about to write, iclass 30, count 0 2006.229.02:33:39.05#ibcon#wrote, iclass 30, count 0 2006.229.02:33:39.05#ibcon#about to read 3, iclass 30, count 0 2006.229.02:33:39.07#ibcon#read 3, iclass 30, count 0 2006.229.02:33:39.07#ibcon#about to read 4, iclass 30, count 0 2006.229.02:33:39.07#ibcon#read 4, iclass 30, count 0 2006.229.02:33:39.07#ibcon#about to read 5, iclass 30, count 0 2006.229.02:33:39.07#ibcon#read 5, iclass 30, count 0 2006.229.02:33:39.07#ibcon#about to read 6, iclass 30, count 0 2006.229.02:33:39.07#ibcon#read 6, iclass 30, count 0 2006.229.02:33:39.07#ibcon#end of sib2, iclass 30, count 0 2006.229.02:33:39.07#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:33:39.07#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:33:39.07#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:33:39.07#ibcon#*before write, iclass 30, count 0 2006.229.02:33:39.07#ibcon#enter sib2, iclass 30, count 0 2006.229.02:33:39.07#ibcon#flushed, iclass 30, count 0 2006.229.02:33:39.07#ibcon#about to write, iclass 30, count 0 2006.229.02:33:39.07#ibcon#wrote, iclass 30, count 0 2006.229.02:33:39.07#ibcon#about to read 3, iclass 30, count 0 2006.229.02:33:39.12#ibcon#read 3, iclass 30, count 0 2006.229.02:33:39.12#ibcon#about to read 4, iclass 30, count 0 2006.229.02:33:39.12#ibcon#read 4, iclass 30, count 0 2006.229.02:33:39.12#ibcon#about to read 5, iclass 30, count 0 2006.229.02:33:39.12#ibcon#read 5, iclass 30, count 0 2006.229.02:33:39.12#ibcon#about to read 6, iclass 30, count 0 2006.229.02:33:39.12#ibcon#read 6, iclass 30, count 0 2006.229.02:33:39.12#ibcon#end of sib2, iclass 30, count 0 2006.229.02:33:39.12#ibcon#*after write, iclass 30, count 0 2006.229.02:33:39.12#ibcon#*before return 0, iclass 30, count 0 2006.229.02:33:39.12#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:33:39.12#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:33:39.12#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:33:39.12#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:33:39.12$vck44/va=2,7 2006.229.02:33:39.12#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:33:39.12#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:33:39.12#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:39.12#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:33:39.17#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:33:39.17#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:33:39.17#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:33:39.17#ibcon#first serial, iclass 32, count 2 2006.229.02:33:39.17#ibcon#enter sib2, iclass 32, count 2 2006.229.02:33:39.17#ibcon#flushed, iclass 32, count 2 2006.229.02:33:39.17#ibcon#about to write, iclass 32, count 2 2006.229.02:33:39.17#ibcon#wrote, iclass 32, count 2 2006.229.02:33:39.17#ibcon#about to read 3, iclass 32, count 2 2006.229.02:33:39.19#ibcon#read 3, iclass 32, count 2 2006.229.02:33:39.19#ibcon#about to read 4, iclass 32, count 2 2006.229.02:33:39.19#ibcon#read 4, iclass 32, count 2 2006.229.02:33:39.19#ibcon#about to read 5, iclass 32, count 2 2006.229.02:33:39.19#ibcon#read 5, iclass 32, count 2 2006.229.02:33:39.19#ibcon#about to read 6, iclass 32, count 2 2006.229.02:33:39.19#ibcon#read 6, iclass 32, count 2 2006.229.02:33:39.19#ibcon#end of sib2, iclass 32, count 2 2006.229.02:33:39.19#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:33:39.19#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:33:39.19#ibcon#[25=AT02-07\r\n] 2006.229.02:33:39.19#ibcon#*before write, iclass 32, count 2 2006.229.02:33:39.19#ibcon#enter sib2, iclass 32, count 2 2006.229.02:33:39.19#ibcon#flushed, iclass 32, count 2 2006.229.02:33:39.19#ibcon#about to write, iclass 32, count 2 2006.229.02:33:39.19#ibcon#wrote, iclass 32, count 2 2006.229.02:33:39.19#ibcon#about to read 3, iclass 32, count 2 2006.229.02:33:39.23#ibcon#read 3, iclass 32, count 2 2006.229.02:33:39.23#ibcon#about to read 4, iclass 32, count 2 2006.229.02:33:39.23#ibcon#read 4, iclass 32, count 2 2006.229.02:33:39.23#ibcon#about to read 5, iclass 32, count 2 2006.229.02:33:39.23#ibcon#read 5, iclass 32, count 2 2006.229.02:33:39.23#ibcon#about to read 6, iclass 32, count 2 2006.229.02:33:39.23#ibcon#read 6, iclass 32, count 2 2006.229.02:33:39.23#ibcon#end of sib2, iclass 32, count 2 2006.229.02:33:39.23#ibcon#*after write, iclass 32, count 2 2006.229.02:33:39.23#ibcon#*before return 0, iclass 32, count 2 2006.229.02:33:39.23#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:33:39.23#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:33:39.23#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:33:39.23#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:39.23#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:33:39.35#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:33:39.35#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:33:39.35#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:33:39.35#ibcon#first serial, iclass 32, count 0 2006.229.02:33:39.35#ibcon#enter sib2, iclass 32, count 0 2006.229.02:33:39.35#ibcon#flushed, iclass 32, count 0 2006.229.02:33:39.35#ibcon#about to write, iclass 32, count 0 2006.229.02:33:39.35#ibcon#wrote, iclass 32, count 0 2006.229.02:33:39.35#ibcon#about to read 3, iclass 32, count 0 2006.229.02:33:39.37#ibcon#read 3, iclass 32, count 0 2006.229.02:33:39.37#ibcon#about to read 4, iclass 32, count 0 2006.229.02:33:39.37#ibcon#read 4, iclass 32, count 0 2006.229.02:33:39.37#ibcon#about to read 5, iclass 32, count 0 2006.229.02:33:39.37#ibcon#read 5, iclass 32, count 0 2006.229.02:33:39.37#ibcon#about to read 6, iclass 32, count 0 2006.229.02:33:39.37#ibcon#read 6, iclass 32, count 0 2006.229.02:33:39.37#ibcon#end of sib2, iclass 32, count 0 2006.229.02:33:39.37#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:33:39.37#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:33:39.37#ibcon#[25=USB\r\n] 2006.229.02:33:39.37#ibcon#*before write, iclass 32, count 0 2006.229.02:33:39.37#ibcon#enter sib2, iclass 32, count 0 2006.229.02:33:39.37#ibcon#flushed, iclass 32, count 0 2006.229.02:33:39.37#ibcon#about to write, iclass 32, count 0 2006.229.02:33:39.37#ibcon#wrote, iclass 32, count 0 2006.229.02:33:39.37#ibcon#about to read 3, iclass 32, count 0 2006.229.02:33:39.40#ibcon#read 3, iclass 32, count 0 2006.229.02:33:39.40#ibcon#about to read 4, iclass 32, count 0 2006.229.02:33:39.40#ibcon#read 4, iclass 32, count 0 2006.229.02:33:39.40#ibcon#about to read 5, iclass 32, count 0 2006.229.02:33:39.40#ibcon#read 5, iclass 32, count 0 2006.229.02:33:39.40#ibcon#about to read 6, iclass 32, count 0 2006.229.02:33:39.40#ibcon#read 6, iclass 32, count 0 2006.229.02:33:39.40#ibcon#end of sib2, iclass 32, count 0 2006.229.02:33:39.40#ibcon#*after write, iclass 32, count 0 2006.229.02:33:39.40#ibcon#*before return 0, iclass 32, count 0 2006.229.02:33:39.40#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:33:39.40#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:33:39.40#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:33:39.40#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:33:39.40$vck44/valo=3,564.99 2006.229.02:33:39.40#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:33:39.40#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:33:39.40#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:39.40#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:39.40#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:39.40#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:39.40#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:33:39.40#ibcon#first serial, iclass 34, count 0 2006.229.02:33:39.40#ibcon#enter sib2, iclass 34, count 0 2006.229.02:33:39.40#ibcon#flushed, iclass 34, count 0 2006.229.02:33:39.40#ibcon#about to write, iclass 34, count 0 2006.229.02:33:39.40#ibcon#wrote, iclass 34, count 0 2006.229.02:33:39.40#ibcon#about to read 3, iclass 34, count 0 2006.229.02:33:39.42#ibcon#read 3, iclass 34, count 0 2006.229.02:33:39.42#ibcon#about to read 4, iclass 34, count 0 2006.229.02:33:39.42#ibcon#read 4, iclass 34, count 0 2006.229.02:33:39.42#ibcon#about to read 5, iclass 34, count 0 2006.229.02:33:39.42#ibcon#read 5, iclass 34, count 0 2006.229.02:33:39.42#ibcon#about to read 6, iclass 34, count 0 2006.229.02:33:39.42#ibcon#read 6, iclass 34, count 0 2006.229.02:33:39.42#ibcon#end of sib2, iclass 34, count 0 2006.229.02:33:39.42#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:33:39.42#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:33:39.42#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:33:39.42#ibcon#*before write, iclass 34, count 0 2006.229.02:33:39.42#ibcon#enter sib2, iclass 34, count 0 2006.229.02:33:39.42#ibcon#flushed, iclass 34, count 0 2006.229.02:33:39.42#ibcon#about to write, iclass 34, count 0 2006.229.02:33:39.42#ibcon#wrote, iclass 34, count 0 2006.229.02:33:39.42#ibcon#about to read 3, iclass 34, count 0 2006.229.02:33:39.46#ibcon#read 3, iclass 34, count 0 2006.229.02:33:39.46#ibcon#about to read 4, iclass 34, count 0 2006.229.02:33:39.46#ibcon#read 4, iclass 34, count 0 2006.229.02:33:39.46#ibcon#about to read 5, iclass 34, count 0 2006.229.02:33:39.46#ibcon#read 5, iclass 34, count 0 2006.229.02:33:39.46#ibcon#about to read 6, iclass 34, count 0 2006.229.02:33:39.46#ibcon#read 6, iclass 34, count 0 2006.229.02:33:39.46#ibcon#end of sib2, iclass 34, count 0 2006.229.02:33:39.46#ibcon#*after write, iclass 34, count 0 2006.229.02:33:39.46#ibcon#*before return 0, iclass 34, count 0 2006.229.02:33:39.46#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:39.46#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:39.46#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:33:39.46#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:33:39.46$vck44/va=3,6 2006.229.02:33:39.46#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.02:33:39.46#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.02:33:39.46#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:39.46#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:39.52#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:39.52#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:39.52#ibcon#enter wrdev, iclass 36, count 2 2006.229.02:33:39.52#ibcon#first serial, iclass 36, count 2 2006.229.02:33:39.52#ibcon#enter sib2, iclass 36, count 2 2006.229.02:33:39.52#ibcon#flushed, iclass 36, count 2 2006.229.02:33:39.52#ibcon#about to write, iclass 36, count 2 2006.229.02:33:39.52#ibcon#wrote, iclass 36, count 2 2006.229.02:33:39.52#ibcon#about to read 3, iclass 36, count 2 2006.229.02:33:39.54#ibcon#read 3, iclass 36, count 2 2006.229.02:33:39.54#ibcon#about to read 4, iclass 36, count 2 2006.229.02:33:39.54#ibcon#read 4, iclass 36, count 2 2006.229.02:33:39.54#ibcon#about to read 5, iclass 36, count 2 2006.229.02:33:39.54#ibcon#read 5, iclass 36, count 2 2006.229.02:33:39.54#ibcon#about to read 6, iclass 36, count 2 2006.229.02:33:39.54#ibcon#read 6, iclass 36, count 2 2006.229.02:33:39.54#ibcon#end of sib2, iclass 36, count 2 2006.229.02:33:39.54#ibcon#*mode == 0, iclass 36, count 2 2006.229.02:33:39.54#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.02:33:39.54#ibcon#[25=AT03-06\r\n] 2006.229.02:33:39.54#ibcon#*before write, iclass 36, count 2 2006.229.02:33:39.54#ibcon#enter sib2, iclass 36, count 2 2006.229.02:33:39.54#ibcon#flushed, iclass 36, count 2 2006.229.02:33:39.54#ibcon#about to write, iclass 36, count 2 2006.229.02:33:39.54#ibcon#wrote, iclass 36, count 2 2006.229.02:33:39.54#ibcon#about to read 3, iclass 36, count 2 2006.229.02:33:39.57#ibcon#read 3, iclass 36, count 2 2006.229.02:33:39.57#ibcon#about to read 4, iclass 36, count 2 2006.229.02:33:39.57#ibcon#read 4, iclass 36, count 2 2006.229.02:33:39.57#ibcon#about to read 5, iclass 36, count 2 2006.229.02:33:39.57#ibcon#read 5, iclass 36, count 2 2006.229.02:33:39.57#ibcon#about to read 6, iclass 36, count 2 2006.229.02:33:39.57#ibcon#read 6, iclass 36, count 2 2006.229.02:33:39.57#ibcon#end of sib2, iclass 36, count 2 2006.229.02:33:39.57#ibcon#*after write, iclass 36, count 2 2006.229.02:33:39.57#ibcon#*before return 0, iclass 36, count 2 2006.229.02:33:39.57#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:39.57#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:39.57#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.02:33:39.57#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:39.57#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:39.69#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:39.69#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:39.69#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:33:39.69#ibcon#first serial, iclass 36, count 0 2006.229.02:33:39.69#ibcon#enter sib2, iclass 36, count 0 2006.229.02:33:39.69#ibcon#flushed, iclass 36, count 0 2006.229.02:33:39.69#ibcon#about to write, iclass 36, count 0 2006.229.02:33:39.69#ibcon#wrote, iclass 36, count 0 2006.229.02:33:39.69#ibcon#about to read 3, iclass 36, count 0 2006.229.02:33:39.71#ibcon#read 3, iclass 36, count 0 2006.229.02:33:39.71#ibcon#about to read 4, iclass 36, count 0 2006.229.02:33:39.71#ibcon#read 4, iclass 36, count 0 2006.229.02:33:39.71#ibcon#about to read 5, iclass 36, count 0 2006.229.02:33:39.71#ibcon#read 5, iclass 36, count 0 2006.229.02:33:39.71#ibcon#about to read 6, iclass 36, count 0 2006.229.02:33:39.71#ibcon#read 6, iclass 36, count 0 2006.229.02:33:39.71#ibcon#end of sib2, iclass 36, count 0 2006.229.02:33:39.71#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:33:39.71#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:33:39.71#ibcon#[25=USB\r\n] 2006.229.02:33:39.71#ibcon#*before write, iclass 36, count 0 2006.229.02:33:39.71#ibcon#enter sib2, iclass 36, count 0 2006.229.02:33:39.71#ibcon#flushed, iclass 36, count 0 2006.229.02:33:39.71#ibcon#about to write, iclass 36, count 0 2006.229.02:33:39.71#ibcon#wrote, iclass 36, count 0 2006.229.02:33:39.71#ibcon#about to read 3, iclass 36, count 0 2006.229.02:33:39.74#ibcon#read 3, iclass 36, count 0 2006.229.02:33:39.74#ibcon#about to read 4, iclass 36, count 0 2006.229.02:33:39.74#ibcon#read 4, iclass 36, count 0 2006.229.02:33:39.74#ibcon#about to read 5, iclass 36, count 0 2006.229.02:33:39.74#ibcon#read 5, iclass 36, count 0 2006.229.02:33:39.74#ibcon#about to read 6, iclass 36, count 0 2006.229.02:33:39.74#ibcon#read 6, iclass 36, count 0 2006.229.02:33:39.74#ibcon#end of sib2, iclass 36, count 0 2006.229.02:33:39.74#ibcon#*after write, iclass 36, count 0 2006.229.02:33:39.74#ibcon#*before return 0, iclass 36, count 0 2006.229.02:33:39.74#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:39.74#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:39.74#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:33:39.74#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:33:39.74$vck44/valo=4,624.99 2006.229.02:33:39.74#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:33:39.74#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:33:39.74#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:39.74#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:39.74#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:39.74#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:39.74#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:33:39.74#ibcon#first serial, iclass 38, count 0 2006.229.02:33:39.74#ibcon#enter sib2, iclass 38, count 0 2006.229.02:33:39.74#ibcon#flushed, iclass 38, count 0 2006.229.02:33:39.74#ibcon#about to write, iclass 38, count 0 2006.229.02:33:39.74#ibcon#wrote, iclass 38, count 0 2006.229.02:33:39.74#ibcon#about to read 3, iclass 38, count 0 2006.229.02:33:39.76#ibcon#read 3, iclass 38, count 0 2006.229.02:33:39.76#ibcon#about to read 4, iclass 38, count 0 2006.229.02:33:39.76#ibcon#read 4, iclass 38, count 0 2006.229.02:33:39.76#ibcon#about to read 5, iclass 38, count 0 2006.229.02:33:39.76#ibcon#read 5, iclass 38, count 0 2006.229.02:33:39.76#ibcon#about to read 6, iclass 38, count 0 2006.229.02:33:39.76#ibcon#read 6, iclass 38, count 0 2006.229.02:33:39.76#ibcon#end of sib2, iclass 38, count 0 2006.229.02:33:39.76#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:33:39.76#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:33:39.76#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:33:39.76#ibcon#*before write, iclass 38, count 0 2006.229.02:33:39.76#ibcon#enter sib2, iclass 38, count 0 2006.229.02:33:39.76#ibcon#flushed, iclass 38, count 0 2006.229.02:33:39.76#ibcon#about to write, iclass 38, count 0 2006.229.02:33:39.76#ibcon#wrote, iclass 38, count 0 2006.229.02:33:39.76#ibcon#about to read 3, iclass 38, count 0 2006.229.02:33:39.80#ibcon#read 3, iclass 38, count 0 2006.229.02:33:39.80#ibcon#about to read 4, iclass 38, count 0 2006.229.02:33:39.80#ibcon#read 4, iclass 38, count 0 2006.229.02:33:39.80#ibcon#about to read 5, iclass 38, count 0 2006.229.02:33:39.80#ibcon#read 5, iclass 38, count 0 2006.229.02:33:39.80#ibcon#about to read 6, iclass 38, count 0 2006.229.02:33:39.80#ibcon#read 6, iclass 38, count 0 2006.229.02:33:39.80#ibcon#end of sib2, iclass 38, count 0 2006.229.02:33:39.80#ibcon#*after write, iclass 38, count 0 2006.229.02:33:39.80#ibcon#*before return 0, iclass 38, count 0 2006.229.02:33:39.80#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:39.80#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:39.80#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:33:39.80#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:33:39.80$vck44/va=4,7 2006.229.02:33:39.80#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.02:33:39.80#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.02:33:39.80#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:39.80#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:39.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:39.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:39.86#ibcon#enter wrdev, iclass 40, count 2 2006.229.02:33:39.86#ibcon#first serial, iclass 40, count 2 2006.229.02:33:39.86#ibcon#enter sib2, iclass 40, count 2 2006.229.02:33:39.86#ibcon#flushed, iclass 40, count 2 2006.229.02:33:39.86#ibcon#about to write, iclass 40, count 2 2006.229.02:33:39.86#ibcon#wrote, iclass 40, count 2 2006.229.02:33:39.86#ibcon#about to read 3, iclass 40, count 2 2006.229.02:33:39.88#ibcon#read 3, iclass 40, count 2 2006.229.02:33:39.88#ibcon#about to read 4, iclass 40, count 2 2006.229.02:33:39.88#ibcon#read 4, iclass 40, count 2 2006.229.02:33:39.88#ibcon#about to read 5, iclass 40, count 2 2006.229.02:33:39.88#ibcon#read 5, iclass 40, count 2 2006.229.02:33:39.88#ibcon#about to read 6, iclass 40, count 2 2006.229.02:33:39.88#ibcon#read 6, iclass 40, count 2 2006.229.02:33:39.88#ibcon#end of sib2, iclass 40, count 2 2006.229.02:33:39.88#ibcon#*mode == 0, iclass 40, count 2 2006.229.02:33:39.88#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.02:33:39.88#ibcon#[25=AT04-07\r\n] 2006.229.02:33:39.88#ibcon#*before write, iclass 40, count 2 2006.229.02:33:39.88#ibcon#enter sib2, iclass 40, count 2 2006.229.02:33:39.88#ibcon#flushed, iclass 40, count 2 2006.229.02:33:39.88#ibcon#about to write, iclass 40, count 2 2006.229.02:33:39.88#ibcon#wrote, iclass 40, count 2 2006.229.02:33:39.88#ibcon#about to read 3, iclass 40, count 2 2006.229.02:33:39.91#ibcon#read 3, iclass 40, count 2 2006.229.02:33:39.91#ibcon#about to read 4, iclass 40, count 2 2006.229.02:33:39.91#ibcon#read 4, iclass 40, count 2 2006.229.02:33:39.91#ibcon#about to read 5, iclass 40, count 2 2006.229.02:33:39.91#ibcon#read 5, iclass 40, count 2 2006.229.02:33:39.91#ibcon#about to read 6, iclass 40, count 2 2006.229.02:33:39.91#ibcon#read 6, iclass 40, count 2 2006.229.02:33:39.91#ibcon#end of sib2, iclass 40, count 2 2006.229.02:33:39.91#ibcon#*after write, iclass 40, count 2 2006.229.02:33:39.91#ibcon#*before return 0, iclass 40, count 2 2006.229.02:33:39.91#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:39.91#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:39.91#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.02:33:39.91#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:39.91#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:40.03#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:40.03#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:40.03#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:33:40.03#ibcon#first serial, iclass 40, count 0 2006.229.02:33:40.03#ibcon#enter sib2, iclass 40, count 0 2006.229.02:33:40.03#ibcon#flushed, iclass 40, count 0 2006.229.02:33:40.03#ibcon#about to write, iclass 40, count 0 2006.229.02:33:40.03#ibcon#wrote, iclass 40, count 0 2006.229.02:33:40.03#ibcon#about to read 3, iclass 40, count 0 2006.229.02:33:40.05#ibcon#read 3, iclass 40, count 0 2006.229.02:33:40.05#ibcon#about to read 4, iclass 40, count 0 2006.229.02:33:40.05#ibcon#read 4, iclass 40, count 0 2006.229.02:33:40.05#ibcon#about to read 5, iclass 40, count 0 2006.229.02:33:40.05#ibcon#read 5, iclass 40, count 0 2006.229.02:33:40.05#ibcon#about to read 6, iclass 40, count 0 2006.229.02:33:40.05#ibcon#read 6, iclass 40, count 0 2006.229.02:33:40.05#ibcon#end of sib2, iclass 40, count 0 2006.229.02:33:40.05#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:33:40.05#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:33:40.05#ibcon#[25=USB\r\n] 2006.229.02:33:40.05#ibcon#*before write, iclass 40, count 0 2006.229.02:33:40.05#ibcon#enter sib2, iclass 40, count 0 2006.229.02:33:40.05#ibcon#flushed, iclass 40, count 0 2006.229.02:33:40.05#ibcon#about to write, iclass 40, count 0 2006.229.02:33:40.05#ibcon#wrote, iclass 40, count 0 2006.229.02:33:40.05#ibcon#about to read 3, iclass 40, count 0 2006.229.02:33:40.08#ibcon#read 3, iclass 40, count 0 2006.229.02:33:40.08#ibcon#about to read 4, iclass 40, count 0 2006.229.02:33:40.08#ibcon#read 4, iclass 40, count 0 2006.229.02:33:40.08#ibcon#about to read 5, iclass 40, count 0 2006.229.02:33:40.08#ibcon#read 5, iclass 40, count 0 2006.229.02:33:40.08#ibcon#about to read 6, iclass 40, count 0 2006.229.02:33:40.08#ibcon#read 6, iclass 40, count 0 2006.229.02:33:40.08#ibcon#end of sib2, iclass 40, count 0 2006.229.02:33:40.08#ibcon#*after write, iclass 40, count 0 2006.229.02:33:40.08#ibcon#*before return 0, iclass 40, count 0 2006.229.02:33:40.08#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:40.08#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:40.08#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:33:40.08#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:33:40.08$vck44/valo=5,734.99 2006.229.02:33:40.08#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:33:40.08#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:33:40.08#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:40.08#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:40.08#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:40.08#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:40.08#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:33:40.08#ibcon#first serial, iclass 4, count 0 2006.229.02:33:40.08#ibcon#enter sib2, iclass 4, count 0 2006.229.02:33:40.08#ibcon#flushed, iclass 4, count 0 2006.229.02:33:40.08#ibcon#about to write, iclass 4, count 0 2006.229.02:33:40.08#ibcon#wrote, iclass 4, count 0 2006.229.02:33:40.08#ibcon#about to read 3, iclass 4, count 0 2006.229.02:33:40.10#ibcon#read 3, iclass 4, count 0 2006.229.02:33:40.10#ibcon#about to read 4, iclass 4, count 0 2006.229.02:33:40.10#ibcon#read 4, iclass 4, count 0 2006.229.02:33:40.10#ibcon#about to read 5, iclass 4, count 0 2006.229.02:33:40.10#ibcon#read 5, iclass 4, count 0 2006.229.02:33:40.10#ibcon#about to read 6, iclass 4, count 0 2006.229.02:33:40.10#ibcon#read 6, iclass 4, count 0 2006.229.02:33:40.10#ibcon#end of sib2, iclass 4, count 0 2006.229.02:33:40.10#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:33:40.10#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:33:40.10#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:33:40.10#ibcon#*before write, iclass 4, count 0 2006.229.02:33:40.10#ibcon#enter sib2, iclass 4, count 0 2006.229.02:33:40.10#ibcon#flushed, iclass 4, count 0 2006.229.02:33:40.10#ibcon#about to write, iclass 4, count 0 2006.229.02:33:40.10#ibcon#wrote, iclass 4, count 0 2006.229.02:33:40.10#ibcon#about to read 3, iclass 4, count 0 2006.229.02:33:40.14#ibcon#read 3, iclass 4, count 0 2006.229.02:33:40.14#ibcon#about to read 4, iclass 4, count 0 2006.229.02:33:40.14#ibcon#read 4, iclass 4, count 0 2006.229.02:33:40.14#ibcon#about to read 5, iclass 4, count 0 2006.229.02:33:40.14#ibcon#read 5, iclass 4, count 0 2006.229.02:33:40.14#ibcon#about to read 6, iclass 4, count 0 2006.229.02:33:40.14#ibcon#read 6, iclass 4, count 0 2006.229.02:33:40.14#ibcon#end of sib2, iclass 4, count 0 2006.229.02:33:40.14#ibcon#*after write, iclass 4, count 0 2006.229.02:33:40.14#ibcon#*before return 0, iclass 4, count 0 2006.229.02:33:40.14#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:40.14#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:40.14#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:33:40.14#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:33:40.14$vck44/va=5,4 2006.229.02:33:40.14#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:33:40.14#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:33:40.14#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:40.14#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:40.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:40.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:40.20#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:33:40.20#ibcon#first serial, iclass 6, count 2 2006.229.02:33:40.20#ibcon#enter sib2, iclass 6, count 2 2006.229.02:33:40.20#ibcon#flushed, iclass 6, count 2 2006.229.02:33:40.20#ibcon#about to write, iclass 6, count 2 2006.229.02:33:40.20#ibcon#wrote, iclass 6, count 2 2006.229.02:33:40.20#ibcon#about to read 3, iclass 6, count 2 2006.229.02:33:40.22#ibcon#read 3, iclass 6, count 2 2006.229.02:33:40.22#ibcon#about to read 4, iclass 6, count 2 2006.229.02:33:40.22#ibcon#read 4, iclass 6, count 2 2006.229.02:33:40.22#ibcon#about to read 5, iclass 6, count 2 2006.229.02:33:40.22#ibcon#read 5, iclass 6, count 2 2006.229.02:33:40.22#ibcon#about to read 6, iclass 6, count 2 2006.229.02:33:40.22#ibcon#read 6, iclass 6, count 2 2006.229.02:33:40.22#ibcon#end of sib2, iclass 6, count 2 2006.229.02:33:40.22#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:33:40.22#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:33:40.22#ibcon#[25=AT05-04\r\n] 2006.229.02:33:40.22#ibcon#*before write, iclass 6, count 2 2006.229.02:33:40.22#ibcon#enter sib2, iclass 6, count 2 2006.229.02:33:40.22#ibcon#flushed, iclass 6, count 2 2006.229.02:33:40.22#ibcon#about to write, iclass 6, count 2 2006.229.02:33:40.22#ibcon#wrote, iclass 6, count 2 2006.229.02:33:40.22#ibcon#about to read 3, iclass 6, count 2 2006.229.02:33:40.25#ibcon#read 3, iclass 6, count 2 2006.229.02:33:40.25#ibcon#about to read 4, iclass 6, count 2 2006.229.02:33:40.25#ibcon#read 4, iclass 6, count 2 2006.229.02:33:40.25#ibcon#about to read 5, iclass 6, count 2 2006.229.02:33:40.25#ibcon#read 5, iclass 6, count 2 2006.229.02:33:40.25#ibcon#about to read 6, iclass 6, count 2 2006.229.02:33:40.25#ibcon#read 6, iclass 6, count 2 2006.229.02:33:40.25#ibcon#end of sib2, iclass 6, count 2 2006.229.02:33:40.25#ibcon#*after write, iclass 6, count 2 2006.229.02:33:40.25#ibcon#*before return 0, iclass 6, count 2 2006.229.02:33:40.25#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:40.25#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:40.25#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:33:40.25#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:40.25#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:40.37#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:40.37#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:40.37#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:33:40.37#ibcon#first serial, iclass 6, count 0 2006.229.02:33:40.37#ibcon#enter sib2, iclass 6, count 0 2006.229.02:33:40.37#ibcon#flushed, iclass 6, count 0 2006.229.02:33:40.37#ibcon#about to write, iclass 6, count 0 2006.229.02:33:40.37#ibcon#wrote, iclass 6, count 0 2006.229.02:33:40.37#ibcon#about to read 3, iclass 6, count 0 2006.229.02:33:40.39#ibcon#read 3, iclass 6, count 0 2006.229.02:33:40.39#ibcon#about to read 4, iclass 6, count 0 2006.229.02:33:40.39#ibcon#read 4, iclass 6, count 0 2006.229.02:33:40.39#ibcon#about to read 5, iclass 6, count 0 2006.229.02:33:40.39#ibcon#read 5, iclass 6, count 0 2006.229.02:33:40.39#ibcon#about to read 6, iclass 6, count 0 2006.229.02:33:40.39#ibcon#read 6, iclass 6, count 0 2006.229.02:33:40.39#ibcon#end of sib2, iclass 6, count 0 2006.229.02:33:40.39#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:33:40.39#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:33:40.39#ibcon#[25=USB\r\n] 2006.229.02:33:40.39#ibcon#*before write, iclass 6, count 0 2006.229.02:33:40.39#ibcon#enter sib2, iclass 6, count 0 2006.229.02:33:40.39#ibcon#flushed, iclass 6, count 0 2006.229.02:33:40.39#ibcon#about to write, iclass 6, count 0 2006.229.02:33:40.39#ibcon#wrote, iclass 6, count 0 2006.229.02:33:40.39#ibcon#about to read 3, iclass 6, count 0 2006.229.02:33:40.42#ibcon#read 3, iclass 6, count 0 2006.229.02:33:40.42#ibcon#about to read 4, iclass 6, count 0 2006.229.02:33:40.42#ibcon#read 4, iclass 6, count 0 2006.229.02:33:40.42#ibcon#about to read 5, iclass 6, count 0 2006.229.02:33:40.42#ibcon#read 5, iclass 6, count 0 2006.229.02:33:40.42#ibcon#about to read 6, iclass 6, count 0 2006.229.02:33:40.42#ibcon#read 6, iclass 6, count 0 2006.229.02:33:40.42#ibcon#end of sib2, iclass 6, count 0 2006.229.02:33:40.42#ibcon#*after write, iclass 6, count 0 2006.229.02:33:40.42#ibcon#*before return 0, iclass 6, count 0 2006.229.02:33:40.42#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:40.42#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:40.42#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:33:40.42#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:33:40.42$vck44/valo=6,814.99 2006.229.02:33:40.42#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:33:40.42#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:33:40.42#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:40.42#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:40.42#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:40.42#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:40.42#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:33:40.42#ibcon#first serial, iclass 10, count 0 2006.229.02:33:40.42#ibcon#enter sib2, iclass 10, count 0 2006.229.02:33:40.42#ibcon#flushed, iclass 10, count 0 2006.229.02:33:40.42#ibcon#about to write, iclass 10, count 0 2006.229.02:33:40.42#ibcon#wrote, iclass 10, count 0 2006.229.02:33:40.42#ibcon#about to read 3, iclass 10, count 0 2006.229.02:33:40.44#ibcon#read 3, iclass 10, count 0 2006.229.02:33:40.44#ibcon#about to read 4, iclass 10, count 0 2006.229.02:33:40.44#ibcon#read 4, iclass 10, count 0 2006.229.02:33:40.44#ibcon#about to read 5, iclass 10, count 0 2006.229.02:33:40.44#ibcon#read 5, iclass 10, count 0 2006.229.02:33:40.44#ibcon#about to read 6, iclass 10, count 0 2006.229.02:33:40.44#ibcon#read 6, iclass 10, count 0 2006.229.02:33:40.44#ibcon#end of sib2, iclass 10, count 0 2006.229.02:33:40.44#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:33:40.44#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:33:40.44#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:33:40.44#ibcon#*before write, iclass 10, count 0 2006.229.02:33:40.44#ibcon#enter sib2, iclass 10, count 0 2006.229.02:33:40.44#ibcon#flushed, iclass 10, count 0 2006.229.02:33:40.44#ibcon#about to write, iclass 10, count 0 2006.229.02:33:40.44#ibcon#wrote, iclass 10, count 0 2006.229.02:33:40.44#ibcon#about to read 3, iclass 10, count 0 2006.229.02:33:40.48#ibcon#read 3, iclass 10, count 0 2006.229.02:33:40.48#ibcon#about to read 4, iclass 10, count 0 2006.229.02:33:40.48#ibcon#read 4, iclass 10, count 0 2006.229.02:33:40.48#ibcon#about to read 5, iclass 10, count 0 2006.229.02:33:40.48#ibcon#read 5, iclass 10, count 0 2006.229.02:33:40.48#ibcon#about to read 6, iclass 10, count 0 2006.229.02:33:40.48#ibcon#read 6, iclass 10, count 0 2006.229.02:33:40.48#ibcon#end of sib2, iclass 10, count 0 2006.229.02:33:40.48#ibcon#*after write, iclass 10, count 0 2006.229.02:33:40.48#ibcon#*before return 0, iclass 10, count 0 2006.229.02:33:40.48#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:40.48#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:40.48#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:33:40.48#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:33:40.48$vck44/va=6,4 2006.229.02:33:40.48#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:33:40.48#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:33:40.48#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:40.48#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:40.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:40.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:40.54#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:33:40.54#ibcon#first serial, iclass 12, count 2 2006.229.02:33:40.54#ibcon#enter sib2, iclass 12, count 2 2006.229.02:33:40.54#ibcon#flushed, iclass 12, count 2 2006.229.02:33:40.54#ibcon#about to write, iclass 12, count 2 2006.229.02:33:40.54#ibcon#wrote, iclass 12, count 2 2006.229.02:33:40.54#ibcon#about to read 3, iclass 12, count 2 2006.229.02:33:40.56#ibcon#read 3, iclass 12, count 2 2006.229.02:33:40.56#ibcon#about to read 4, iclass 12, count 2 2006.229.02:33:40.56#ibcon#read 4, iclass 12, count 2 2006.229.02:33:40.56#ibcon#about to read 5, iclass 12, count 2 2006.229.02:33:40.56#ibcon#read 5, iclass 12, count 2 2006.229.02:33:40.56#ibcon#about to read 6, iclass 12, count 2 2006.229.02:33:40.56#ibcon#read 6, iclass 12, count 2 2006.229.02:33:40.56#ibcon#end of sib2, iclass 12, count 2 2006.229.02:33:40.56#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:33:40.56#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:33:40.56#ibcon#[25=AT06-04\r\n] 2006.229.02:33:40.56#ibcon#*before write, iclass 12, count 2 2006.229.02:33:40.56#ibcon#enter sib2, iclass 12, count 2 2006.229.02:33:40.56#ibcon#flushed, iclass 12, count 2 2006.229.02:33:40.56#ibcon#about to write, iclass 12, count 2 2006.229.02:33:40.56#ibcon#wrote, iclass 12, count 2 2006.229.02:33:40.56#ibcon#about to read 3, iclass 12, count 2 2006.229.02:33:40.59#ibcon#read 3, iclass 12, count 2 2006.229.02:33:40.59#ibcon#about to read 4, iclass 12, count 2 2006.229.02:33:40.59#ibcon#read 4, iclass 12, count 2 2006.229.02:33:40.59#ibcon#about to read 5, iclass 12, count 2 2006.229.02:33:40.59#ibcon#read 5, iclass 12, count 2 2006.229.02:33:40.59#ibcon#about to read 6, iclass 12, count 2 2006.229.02:33:40.59#ibcon#read 6, iclass 12, count 2 2006.229.02:33:40.59#ibcon#end of sib2, iclass 12, count 2 2006.229.02:33:40.59#ibcon#*after write, iclass 12, count 2 2006.229.02:33:40.59#ibcon#*before return 0, iclass 12, count 2 2006.229.02:33:40.59#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:40.59#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:40.59#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:33:40.59#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:40.59#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:40.71#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:40.71#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:40.71#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:33:40.71#ibcon#first serial, iclass 12, count 0 2006.229.02:33:40.71#ibcon#enter sib2, iclass 12, count 0 2006.229.02:33:40.71#ibcon#flushed, iclass 12, count 0 2006.229.02:33:40.71#ibcon#about to write, iclass 12, count 0 2006.229.02:33:40.71#ibcon#wrote, iclass 12, count 0 2006.229.02:33:40.71#ibcon#about to read 3, iclass 12, count 0 2006.229.02:33:40.73#ibcon#read 3, iclass 12, count 0 2006.229.02:33:40.73#ibcon#about to read 4, iclass 12, count 0 2006.229.02:33:40.73#ibcon#read 4, iclass 12, count 0 2006.229.02:33:40.73#ibcon#about to read 5, iclass 12, count 0 2006.229.02:33:40.73#ibcon#read 5, iclass 12, count 0 2006.229.02:33:40.73#ibcon#about to read 6, iclass 12, count 0 2006.229.02:33:40.73#ibcon#read 6, iclass 12, count 0 2006.229.02:33:40.73#ibcon#end of sib2, iclass 12, count 0 2006.229.02:33:40.73#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:33:40.73#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:33:40.73#ibcon#[25=USB\r\n] 2006.229.02:33:40.73#ibcon#*before write, iclass 12, count 0 2006.229.02:33:40.73#ibcon#enter sib2, iclass 12, count 0 2006.229.02:33:40.73#ibcon#flushed, iclass 12, count 0 2006.229.02:33:40.73#ibcon#about to write, iclass 12, count 0 2006.229.02:33:40.73#ibcon#wrote, iclass 12, count 0 2006.229.02:33:40.73#ibcon#about to read 3, iclass 12, count 0 2006.229.02:33:40.76#ibcon#read 3, iclass 12, count 0 2006.229.02:33:40.76#ibcon#about to read 4, iclass 12, count 0 2006.229.02:33:40.76#ibcon#read 4, iclass 12, count 0 2006.229.02:33:40.76#ibcon#about to read 5, iclass 12, count 0 2006.229.02:33:40.76#ibcon#read 5, iclass 12, count 0 2006.229.02:33:40.76#ibcon#about to read 6, iclass 12, count 0 2006.229.02:33:40.76#ibcon#read 6, iclass 12, count 0 2006.229.02:33:40.76#ibcon#end of sib2, iclass 12, count 0 2006.229.02:33:40.76#ibcon#*after write, iclass 12, count 0 2006.229.02:33:40.76#ibcon#*before return 0, iclass 12, count 0 2006.229.02:33:40.76#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:40.76#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:40.76#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:33:40.76#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:33:40.76$vck44/valo=7,864.99 2006.229.02:33:40.76#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:33:40.76#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:33:40.76#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:40.76#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:40.76#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:40.76#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:40.76#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:33:40.76#ibcon#first serial, iclass 14, count 0 2006.229.02:33:40.76#ibcon#enter sib2, iclass 14, count 0 2006.229.02:33:40.76#ibcon#flushed, iclass 14, count 0 2006.229.02:33:40.76#ibcon#about to write, iclass 14, count 0 2006.229.02:33:40.76#ibcon#wrote, iclass 14, count 0 2006.229.02:33:40.76#ibcon#about to read 3, iclass 14, count 0 2006.229.02:33:40.78#ibcon#read 3, iclass 14, count 0 2006.229.02:33:40.78#ibcon#about to read 4, iclass 14, count 0 2006.229.02:33:40.78#ibcon#read 4, iclass 14, count 0 2006.229.02:33:40.78#ibcon#about to read 5, iclass 14, count 0 2006.229.02:33:40.78#ibcon#read 5, iclass 14, count 0 2006.229.02:33:40.78#ibcon#about to read 6, iclass 14, count 0 2006.229.02:33:40.78#ibcon#read 6, iclass 14, count 0 2006.229.02:33:40.78#ibcon#end of sib2, iclass 14, count 0 2006.229.02:33:40.78#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:33:40.78#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:33:40.78#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:33:40.78#ibcon#*before write, iclass 14, count 0 2006.229.02:33:40.78#ibcon#enter sib2, iclass 14, count 0 2006.229.02:33:40.78#ibcon#flushed, iclass 14, count 0 2006.229.02:33:40.78#ibcon#about to write, iclass 14, count 0 2006.229.02:33:40.78#ibcon#wrote, iclass 14, count 0 2006.229.02:33:40.78#ibcon#about to read 3, iclass 14, count 0 2006.229.02:33:40.82#ibcon#read 3, iclass 14, count 0 2006.229.02:33:40.82#ibcon#about to read 4, iclass 14, count 0 2006.229.02:33:40.82#ibcon#read 4, iclass 14, count 0 2006.229.02:33:40.82#ibcon#about to read 5, iclass 14, count 0 2006.229.02:33:40.82#ibcon#read 5, iclass 14, count 0 2006.229.02:33:40.82#ibcon#about to read 6, iclass 14, count 0 2006.229.02:33:40.82#ibcon#read 6, iclass 14, count 0 2006.229.02:33:40.82#ibcon#end of sib2, iclass 14, count 0 2006.229.02:33:40.82#ibcon#*after write, iclass 14, count 0 2006.229.02:33:40.82#ibcon#*before return 0, iclass 14, count 0 2006.229.02:33:40.82#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:40.82#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:40.82#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:33:40.82#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:33:40.82$vck44/va=7,5 2006.229.02:33:40.82#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:33:40.82#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:33:40.82#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:40.82#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:40.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:40.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:40.88#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:33:40.88#ibcon#first serial, iclass 16, count 2 2006.229.02:33:40.88#ibcon#enter sib2, iclass 16, count 2 2006.229.02:33:40.88#ibcon#flushed, iclass 16, count 2 2006.229.02:33:40.88#ibcon#about to write, iclass 16, count 2 2006.229.02:33:40.88#ibcon#wrote, iclass 16, count 2 2006.229.02:33:40.88#ibcon#about to read 3, iclass 16, count 2 2006.229.02:33:40.90#ibcon#read 3, iclass 16, count 2 2006.229.02:33:40.90#ibcon#about to read 4, iclass 16, count 2 2006.229.02:33:40.90#ibcon#read 4, iclass 16, count 2 2006.229.02:33:40.90#ibcon#about to read 5, iclass 16, count 2 2006.229.02:33:40.90#ibcon#read 5, iclass 16, count 2 2006.229.02:33:40.90#ibcon#about to read 6, iclass 16, count 2 2006.229.02:33:40.90#ibcon#read 6, iclass 16, count 2 2006.229.02:33:40.90#ibcon#end of sib2, iclass 16, count 2 2006.229.02:33:40.90#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:33:40.90#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:33:40.90#ibcon#[25=AT07-05\r\n] 2006.229.02:33:40.90#ibcon#*before write, iclass 16, count 2 2006.229.02:33:40.90#ibcon#enter sib2, iclass 16, count 2 2006.229.02:33:40.90#ibcon#flushed, iclass 16, count 2 2006.229.02:33:40.90#ibcon#about to write, iclass 16, count 2 2006.229.02:33:40.90#ibcon#wrote, iclass 16, count 2 2006.229.02:33:40.90#ibcon#about to read 3, iclass 16, count 2 2006.229.02:33:40.93#ibcon#read 3, iclass 16, count 2 2006.229.02:33:40.93#ibcon#about to read 4, iclass 16, count 2 2006.229.02:33:40.93#ibcon#read 4, iclass 16, count 2 2006.229.02:33:40.93#ibcon#about to read 5, iclass 16, count 2 2006.229.02:33:40.93#ibcon#read 5, iclass 16, count 2 2006.229.02:33:40.93#ibcon#about to read 6, iclass 16, count 2 2006.229.02:33:40.93#ibcon#read 6, iclass 16, count 2 2006.229.02:33:40.93#ibcon#end of sib2, iclass 16, count 2 2006.229.02:33:40.93#ibcon#*after write, iclass 16, count 2 2006.229.02:33:40.93#ibcon#*before return 0, iclass 16, count 2 2006.229.02:33:40.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:40.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:40.93#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:33:40.93#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:40.93#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:41.05#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:41.05#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:41.05#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:33:41.05#ibcon#first serial, iclass 16, count 0 2006.229.02:33:41.05#ibcon#enter sib2, iclass 16, count 0 2006.229.02:33:41.05#ibcon#flushed, iclass 16, count 0 2006.229.02:33:41.05#ibcon#about to write, iclass 16, count 0 2006.229.02:33:41.05#ibcon#wrote, iclass 16, count 0 2006.229.02:33:41.05#ibcon#about to read 3, iclass 16, count 0 2006.229.02:33:41.07#ibcon#read 3, iclass 16, count 0 2006.229.02:33:41.07#ibcon#about to read 4, iclass 16, count 0 2006.229.02:33:41.07#ibcon#read 4, iclass 16, count 0 2006.229.02:33:41.07#ibcon#about to read 5, iclass 16, count 0 2006.229.02:33:41.07#ibcon#read 5, iclass 16, count 0 2006.229.02:33:41.07#ibcon#about to read 6, iclass 16, count 0 2006.229.02:33:41.07#ibcon#read 6, iclass 16, count 0 2006.229.02:33:41.07#ibcon#end of sib2, iclass 16, count 0 2006.229.02:33:41.07#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:33:41.07#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:33:41.07#ibcon#[25=USB\r\n] 2006.229.02:33:41.07#ibcon#*before write, iclass 16, count 0 2006.229.02:33:41.07#ibcon#enter sib2, iclass 16, count 0 2006.229.02:33:41.07#ibcon#flushed, iclass 16, count 0 2006.229.02:33:41.07#ibcon#about to write, iclass 16, count 0 2006.229.02:33:41.07#ibcon#wrote, iclass 16, count 0 2006.229.02:33:41.07#ibcon#about to read 3, iclass 16, count 0 2006.229.02:33:41.10#ibcon#read 3, iclass 16, count 0 2006.229.02:33:41.10#ibcon#about to read 4, iclass 16, count 0 2006.229.02:33:41.10#ibcon#read 4, iclass 16, count 0 2006.229.02:33:41.10#ibcon#about to read 5, iclass 16, count 0 2006.229.02:33:41.10#ibcon#read 5, iclass 16, count 0 2006.229.02:33:41.10#ibcon#about to read 6, iclass 16, count 0 2006.229.02:33:41.10#ibcon#read 6, iclass 16, count 0 2006.229.02:33:41.10#ibcon#end of sib2, iclass 16, count 0 2006.229.02:33:41.10#ibcon#*after write, iclass 16, count 0 2006.229.02:33:41.10#ibcon#*before return 0, iclass 16, count 0 2006.229.02:33:41.10#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:41.10#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:41.10#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:33:41.10#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:33:41.10$vck44/valo=8,884.99 2006.229.02:33:41.10#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:33:41.10#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:33:41.10#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:41.10#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:41.10#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:41.10#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:41.10#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:33:41.10#ibcon#first serial, iclass 18, count 0 2006.229.02:33:41.10#ibcon#enter sib2, iclass 18, count 0 2006.229.02:33:41.10#ibcon#flushed, iclass 18, count 0 2006.229.02:33:41.10#ibcon#about to write, iclass 18, count 0 2006.229.02:33:41.10#ibcon#wrote, iclass 18, count 0 2006.229.02:33:41.10#ibcon#about to read 3, iclass 18, count 0 2006.229.02:33:41.12#ibcon#read 3, iclass 18, count 0 2006.229.02:33:41.12#ibcon#about to read 4, iclass 18, count 0 2006.229.02:33:41.12#ibcon#read 4, iclass 18, count 0 2006.229.02:33:41.12#ibcon#about to read 5, iclass 18, count 0 2006.229.02:33:41.12#ibcon#read 5, iclass 18, count 0 2006.229.02:33:41.12#ibcon#about to read 6, iclass 18, count 0 2006.229.02:33:41.12#ibcon#read 6, iclass 18, count 0 2006.229.02:33:41.12#ibcon#end of sib2, iclass 18, count 0 2006.229.02:33:41.12#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:33:41.12#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:33:41.12#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:33:41.12#ibcon#*before write, iclass 18, count 0 2006.229.02:33:41.12#ibcon#enter sib2, iclass 18, count 0 2006.229.02:33:41.12#ibcon#flushed, iclass 18, count 0 2006.229.02:33:41.12#ibcon#about to write, iclass 18, count 0 2006.229.02:33:41.12#ibcon#wrote, iclass 18, count 0 2006.229.02:33:41.12#ibcon#about to read 3, iclass 18, count 0 2006.229.02:33:41.16#ibcon#read 3, iclass 18, count 0 2006.229.02:33:41.16#ibcon#about to read 4, iclass 18, count 0 2006.229.02:33:41.16#ibcon#read 4, iclass 18, count 0 2006.229.02:33:41.16#ibcon#about to read 5, iclass 18, count 0 2006.229.02:33:41.16#ibcon#read 5, iclass 18, count 0 2006.229.02:33:41.16#ibcon#about to read 6, iclass 18, count 0 2006.229.02:33:41.16#ibcon#read 6, iclass 18, count 0 2006.229.02:33:41.16#ibcon#end of sib2, iclass 18, count 0 2006.229.02:33:41.16#ibcon#*after write, iclass 18, count 0 2006.229.02:33:41.16#ibcon#*before return 0, iclass 18, count 0 2006.229.02:33:41.16#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:41.16#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:41.16#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:33:41.16#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:33:41.16$vck44/va=8,6 2006.229.02:33:41.16#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.02:33:41.16#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.02:33:41.16#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:41.16#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:41.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:41.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:41.22#ibcon#enter wrdev, iclass 20, count 2 2006.229.02:33:41.22#ibcon#first serial, iclass 20, count 2 2006.229.02:33:41.22#ibcon#enter sib2, iclass 20, count 2 2006.229.02:33:41.22#ibcon#flushed, iclass 20, count 2 2006.229.02:33:41.22#ibcon#about to write, iclass 20, count 2 2006.229.02:33:41.22#ibcon#wrote, iclass 20, count 2 2006.229.02:33:41.22#ibcon#about to read 3, iclass 20, count 2 2006.229.02:33:41.24#ibcon#read 3, iclass 20, count 2 2006.229.02:33:41.24#ibcon#about to read 4, iclass 20, count 2 2006.229.02:33:41.24#ibcon#read 4, iclass 20, count 2 2006.229.02:33:41.24#ibcon#about to read 5, iclass 20, count 2 2006.229.02:33:41.24#ibcon#read 5, iclass 20, count 2 2006.229.02:33:41.24#ibcon#about to read 6, iclass 20, count 2 2006.229.02:33:41.24#ibcon#read 6, iclass 20, count 2 2006.229.02:33:41.24#ibcon#end of sib2, iclass 20, count 2 2006.229.02:33:41.24#ibcon#*mode == 0, iclass 20, count 2 2006.229.02:33:41.24#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.02:33:41.24#ibcon#[25=AT08-06\r\n] 2006.229.02:33:41.24#ibcon#*before write, iclass 20, count 2 2006.229.02:33:41.24#ibcon#enter sib2, iclass 20, count 2 2006.229.02:33:41.24#ibcon#flushed, iclass 20, count 2 2006.229.02:33:41.24#ibcon#about to write, iclass 20, count 2 2006.229.02:33:41.24#ibcon#wrote, iclass 20, count 2 2006.229.02:33:41.24#ibcon#about to read 3, iclass 20, count 2 2006.229.02:33:41.27#ibcon#read 3, iclass 20, count 2 2006.229.02:33:41.27#ibcon#about to read 4, iclass 20, count 2 2006.229.02:33:41.27#ibcon#read 4, iclass 20, count 2 2006.229.02:33:41.27#ibcon#about to read 5, iclass 20, count 2 2006.229.02:33:41.27#ibcon#read 5, iclass 20, count 2 2006.229.02:33:41.27#ibcon#about to read 6, iclass 20, count 2 2006.229.02:33:41.27#ibcon#read 6, iclass 20, count 2 2006.229.02:33:41.27#ibcon#end of sib2, iclass 20, count 2 2006.229.02:33:41.27#ibcon#*after write, iclass 20, count 2 2006.229.02:33:41.27#ibcon#*before return 0, iclass 20, count 2 2006.229.02:33:41.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:41.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:41.27#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.02:33:41.27#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:41.27#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:41.39#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:41.39#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:41.39#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:33:41.39#ibcon#first serial, iclass 20, count 0 2006.229.02:33:41.39#ibcon#enter sib2, iclass 20, count 0 2006.229.02:33:41.39#ibcon#flushed, iclass 20, count 0 2006.229.02:33:41.39#ibcon#about to write, iclass 20, count 0 2006.229.02:33:41.39#ibcon#wrote, iclass 20, count 0 2006.229.02:33:41.39#ibcon#about to read 3, iclass 20, count 0 2006.229.02:33:41.41#ibcon#read 3, iclass 20, count 0 2006.229.02:33:41.41#ibcon#about to read 4, iclass 20, count 0 2006.229.02:33:41.41#ibcon#read 4, iclass 20, count 0 2006.229.02:33:41.41#ibcon#about to read 5, iclass 20, count 0 2006.229.02:33:41.41#ibcon#read 5, iclass 20, count 0 2006.229.02:33:41.41#ibcon#about to read 6, iclass 20, count 0 2006.229.02:33:41.41#ibcon#read 6, iclass 20, count 0 2006.229.02:33:41.41#ibcon#end of sib2, iclass 20, count 0 2006.229.02:33:41.41#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:33:41.41#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:33:41.41#ibcon#[25=USB\r\n] 2006.229.02:33:41.41#ibcon#*before write, iclass 20, count 0 2006.229.02:33:41.41#ibcon#enter sib2, iclass 20, count 0 2006.229.02:33:41.41#ibcon#flushed, iclass 20, count 0 2006.229.02:33:41.41#ibcon#about to write, iclass 20, count 0 2006.229.02:33:41.41#ibcon#wrote, iclass 20, count 0 2006.229.02:33:41.41#ibcon#about to read 3, iclass 20, count 0 2006.229.02:33:41.44#ibcon#read 3, iclass 20, count 0 2006.229.02:33:41.44#ibcon#about to read 4, iclass 20, count 0 2006.229.02:33:41.44#ibcon#read 4, iclass 20, count 0 2006.229.02:33:41.44#ibcon#about to read 5, iclass 20, count 0 2006.229.02:33:41.44#ibcon#read 5, iclass 20, count 0 2006.229.02:33:41.44#ibcon#about to read 6, iclass 20, count 0 2006.229.02:33:41.44#ibcon#read 6, iclass 20, count 0 2006.229.02:33:41.44#ibcon#end of sib2, iclass 20, count 0 2006.229.02:33:41.44#ibcon#*after write, iclass 20, count 0 2006.229.02:33:41.44#ibcon#*before return 0, iclass 20, count 0 2006.229.02:33:41.44#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:41.44#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:41.44#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:33:41.44#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:33:41.44$vck44/vblo=1,629.99 2006.229.02:33:41.44#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:33:41.44#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:33:41.44#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:41.44#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:41.44#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:41.44#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:41.44#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:33:41.44#ibcon#first serial, iclass 22, count 0 2006.229.02:33:41.44#ibcon#enter sib2, iclass 22, count 0 2006.229.02:33:41.44#ibcon#flushed, iclass 22, count 0 2006.229.02:33:41.44#ibcon#about to write, iclass 22, count 0 2006.229.02:33:41.44#ibcon#wrote, iclass 22, count 0 2006.229.02:33:41.44#ibcon#about to read 3, iclass 22, count 0 2006.229.02:33:41.46#ibcon#read 3, iclass 22, count 0 2006.229.02:33:41.46#ibcon#about to read 4, iclass 22, count 0 2006.229.02:33:41.46#ibcon#read 4, iclass 22, count 0 2006.229.02:33:41.46#ibcon#about to read 5, iclass 22, count 0 2006.229.02:33:41.46#ibcon#read 5, iclass 22, count 0 2006.229.02:33:41.46#ibcon#about to read 6, iclass 22, count 0 2006.229.02:33:41.46#ibcon#read 6, iclass 22, count 0 2006.229.02:33:41.46#ibcon#end of sib2, iclass 22, count 0 2006.229.02:33:41.46#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:33:41.46#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:33:41.46#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:33:41.46#ibcon#*before write, iclass 22, count 0 2006.229.02:33:41.46#ibcon#enter sib2, iclass 22, count 0 2006.229.02:33:41.46#ibcon#flushed, iclass 22, count 0 2006.229.02:33:41.46#ibcon#about to write, iclass 22, count 0 2006.229.02:33:41.46#ibcon#wrote, iclass 22, count 0 2006.229.02:33:41.46#ibcon#about to read 3, iclass 22, count 0 2006.229.02:33:41.50#ibcon#read 3, iclass 22, count 0 2006.229.02:33:41.50#ibcon#about to read 4, iclass 22, count 0 2006.229.02:33:41.50#ibcon#read 4, iclass 22, count 0 2006.229.02:33:41.50#ibcon#about to read 5, iclass 22, count 0 2006.229.02:33:41.50#ibcon#read 5, iclass 22, count 0 2006.229.02:33:41.50#ibcon#about to read 6, iclass 22, count 0 2006.229.02:33:41.50#ibcon#read 6, iclass 22, count 0 2006.229.02:33:41.50#ibcon#end of sib2, iclass 22, count 0 2006.229.02:33:41.50#ibcon#*after write, iclass 22, count 0 2006.229.02:33:41.50#ibcon#*before return 0, iclass 22, count 0 2006.229.02:33:41.50#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:41.50#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:41.50#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:33:41.50#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:33:41.50$vck44/vb=1,4 2006.229.02:33:41.50#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.02:33:41.50#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.02:33:41.50#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:41.50#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:33:41.50#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:33:41.50#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:33:41.50#ibcon#enter wrdev, iclass 24, count 2 2006.229.02:33:41.50#ibcon#first serial, iclass 24, count 2 2006.229.02:33:41.50#ibcon#enter sib2, iclass 24, count 2 2006.229.02:33:41.50#ibcon#flushed, iclass 24, count 2 2006.229.02:33:41.50#ibcon#about to write, iclass 24, count 2 2006.229.02:33:41.50#ibcon#wrote, iclass 24, count 2 2006.229.02:33:41.50#ibcon#about to read 3, iclass 24, count 2 2006.229.02:33:41.52#ibcon#read 3, iclass 24, count 2 2006.229.02:33:41.52#ibcon#about to read 4, iclass 24, count 2 2006.229.02:33:41.52#ibcon#read 4, iclass 24, count 2 2006.229.02:33:41.52#ibcon#about to read 5, iclass 24, count 2 2006.229.02:33:41.52#ibcon#read 5, iclass 24, count 2 2006.229.02:33:41.52#ibcon#about to read 6, iclass 24, count 2 2006.229.02:33:41.52#ibcon#read 6, iclass 24, count 2 2006.229.02:33:41.52#ibcon#end of sib2, iclass 24, count 2 2006.229.02:33:41.52#ibcon#*mode == 0, iclass 24, count 2 2006.229.02:33:41.52#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.02:33:41.52#ibcon#[27=AT01-04\r\n] 2006.229.02:33:41.52#ibcon#*before write, iclass 24, count 2 2006.229.02:33:41.52#ibcon#enter sib2, iclass 24, count 2 2006.229.02:33:41.52#ibcon#flushed, iclass 24, count 2 2006.229.02:33:41.52#ibcon#about to write, iclass 24, count 2 2006.229.02:33:41.52#ibcon#wrote, iclass 24, count 2 2006.229.02:33:41.52#ibcon#about to read 3, iclass 24, count 2 2006.229.02:33:41.55#ibcon#read 3, iclass 24, count 2 2006.229.02:33:41.55#ibcon#about to read 4, iclass 24, count 2 2006.229.02:33:41.55#ibcon#read 4, iclass 24, count 2 2006.229.02:33:41.55#ibcon#about to read 5, iclass 24, count 2 2006.229.02:33:41.55#ibcon#read 5, iclass 24, count 2 2006.229.02:33:41.55#ibcon#about to read 6, iclass 24, count 2 2006.229.02:33:41.55#ibcon#read 6, iclass 24, count 2 2006.229.02:33:41.55#ibcon#end of sib2, iclass 24, count 2 2006.229.02:33:41.55#ibcon#*after write, iclass 24, count 2 2006.229.02:33:41.55#ibcon#*before return 0, iclass 24, count 2 2006.229.02:33:41.55#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:33:41.55#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:33:41.55#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.02:33:41.55#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:41.55#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:33:41.67#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:33:41.67#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:33:41.67#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:33:41.67#ibcon#first serial, iclass 24, count 0 2006.229.02:33:41.67#ibcon#enter sib2, iclass 24, count 0 2006.229.02:33:41.67#ibcon#flushed, iclass 24, count 0 2006.229.02:33:41.67#ibcon#about to write, iclass 24, count 0 2006.229.02:33:41.67#ibcon#wrote, iclass 24, count 0 2006.229.02:33:41.67#ibcon#about to read 3, iclass 24, count 0 2006.229.02:33:41.69#ibcon#read 3, iclass 24, count 0 2006.229.02:33:41.69#ibcon#about to read 4, iclass 24, count 0 2006.229.02:33:41.69#ibcon#read 4, iclass 24, count 0 2006.229.02:33:41.69#ibcon#about to read 5, iclass 24, count 0 2006.229.02:33:41.69#ibcon#read 5, iclass 24, count 0 2006.229.02:33:41.69#ibcon#about to read 6, iclass 24, count 0 2006.229.02:33:41.69#ibcon#read 6, iclass 24, count 0 2006.229.02:33:41.69#ibcon#end of sib2, iclass 24, count 0 2006.229.02:33:41.69#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:33:41.69#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:33:41.69#ibcon#[27=USB\r\n] 2006.229.02:33:41.69#ibcon#*before write, iclass 24, count 0 2006.229.02:33:41.69#ibcon#enter sib2, iclass 24, count 0 2006.229.02:33:41.69#ibcon#flushed, iclass 24, count 0 2006.229.02:33:41.69#ibcon#about to write, iclass 24, count 0 2006.229.02:33:41.69#ibcon#wrote, iclass 24, count 0 2006.229.02:33:41.69#ibcon#about to read 3, iclass 24, count 0 2006.229.02:33:41.72#ibcon#read 3, iclass 24, count 0 2006.229.02:33:41.72#ibcon#about to read 4, iclass 24, count 0 2006.229.02:33:41.72#ibcon#read 4, iclass 24, count 0 2006.229.02:33:41.72#ibcon#about to read 5, iclass 24, count 0 2006.229.02:33:41.72#ibcon#read 5, iclass 24, count 0 2006.229.02:33:41.72#ibcon#about to read 6, iclass 24, count 0 2006.229.02:33:41.72#ibcon#read 6, iclass 24, count 0 2006.229.02:33:41.72#ibcon#end of sib2, iclass 24, count 0 2006.229.02:33:41.72#ibcon#*after write, iclass 24, count 0 2006.229.02:33:41.72#ibcon#*before return 0, iclass 24, count 0 2006.229.02:33:41.72#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:33:41.72#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:33:41.72#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:33:41.72#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:33:41.72$vck44/vblo=2,634.99 2006.229.02:33:41.72#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:33:41.72#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:33:41.72#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:41.72#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:41.72#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:41.72#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:41.72#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:33:41.72#ibcon#first serial, iclass 26, count 0 2006.229.02:33:41.72#ibcon#enter sib2, iclass 26, count 0 2006.229.02:33:41.72#ibcon#flushed, iclass 26, count 0 2006.229.02:33:41.72#ibcon#about to write, iclass 26, count 0 2006.229.02:33:41.72#ibcon#wrote, iclass 26, count 0 2006.229.02:33:41.72#ibcon#about to read 3, iclass 26, count 0 2006.229.02:33:41.74#ibcon#read 3, iclass 26, count 0 2006.229.02:33:41.74#ibcon#about to read 4, iclass 26, count 0 2006.229.02:33:41.74#ibcon#read 4, iclass 26, count 0 2006.229.02:33:41.74#ibcon#about to read 5, iclass 26, count 0 2006.229.02:33:41.74#ibcon#read 5, iclass 26, count 0 2006.229.02:33:41.74#ibcon#about to read 6, iclass 26, count 0 2006.229.02:33:41.74#ibcon#read 6, iclass 26, count 0 2006.229.02:33:41.74#ibcon#end of sib2, iclass 26, count 0 2006.229.02:33:41.74#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:33:41.74#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:33:41.74#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:33:41.74#ibcon#*before write, iclass 26, count 0 2006.229.02:33:41.74#ibcon#enter sib2, iclass 26, count 0 2006.229.02:33:41.74#ibcon#flushed, iclass 26, count 0 2006.229.02:33:41.74#ibcon#about to write, iclass 26, count 0 2006.229.02:33:41.74#ibcon#wrote, iclass 26, count 0 2006.229.02:33:41.74#ibcon#about to read 3, iclass 26, count 0 2006.229.02:33:41.78#ibcon#read 3, iclass 26, count 0 2006.229.02:33:41.78#ibcon#about to read 4, iclass 26, count 0 2006.229.02:33:41.78#ibcon#read 4, iclass 26, count 0 2006.229.02:33:41.78#ibcon#about to read 5, iclass 26, count 0 2006.229.02:33:41.78#ibcon#read 5, iclass 26, count 0 2006.229.02:33:41.78#ibcon#about to read 6, iclass 26, count 0 2006.229.02:33:41.78#ibcon#read 6, iclass 26, count 0 2006.229.02:33:41.78#ibcon#end of sib2, iclass 26, count 0 2006.229.02:33:41.78#ibcon#*after write, iclass 26, count 0 2006.229.02:33:41.78#ibcon#*before return 0, iclass 26, count 0 2006.229.02:33:41.78#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:41.78#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:33:41.78#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:33:41.78#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:33:41.78$vck44/vb=2,4 2006.229.02:33:41.78#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:33:41.78#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:33:41.78#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:41.78#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:41.84#abcon#<5=/07 1.3 3.2 29.291001001.2\r\n> 2006.229.02:33:41.84#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:41.84#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:41.84#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:33:41.84#ibcon#first serial, iclass 28, count 2 2006.229.02:33:41.84#ibcon#enter sib2, iclass 28, count 2 2006.229.02:33:41.84#ibcon#flushed, iclass 28, count 2 2006.229.02:33:41.84#ibcon#about to write, iclass 28, count 2 2006.229.02:33:41.84#ibcon#wrote, iclass 28, count 2 2006.229.02:33:41.84#ibcon#about to read 3, iclass 28, count 2 2006.229.02:33:41.86#ibcon#read 3, iclass 28, count 2 2006.229.02:33:41.86#ibcon#about to read 4, iclass 28, count 2 2006.229.02:33:41.86#ibcon#read 4, iclass 28, count 2 2006.229.02:33:41.86#ibcon#about to read 5, iclass 28, count 2 2006.229.02:33:41.86#ibcon#read 5, iclass 28, count 2 2006.229.02:33:41.86#ibcon#about to read 6, iclass 28, count 2 2006.229.02:33:41.86#ibcon#read 6, iclass 28, count 2 2006.229.02:33:41.86#ibcon#end of sib2, iclass 28, count 2 2006.229.02:33:41.86#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:33:41.86#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:33:41.86#ibcon#[27=AT02-04\r\n] 2006.229.02:33:41.86#ibcon#*before write, iclass 28, count 2 2006.229.02:33:41.86#ibcon#enter sib2, iclass 28, count 2 2006.229.02:33:41.86#ibcon#flushed, iclass 28, count 2 2006.229.02:33:41.86#ibcon#about to write, iclass 28, count 2 2006.229.02:33:41.86#ibcon#wrote, iclass 28, count 2 2006.229.02:33:41.86#ibcon#about to read 3, iclass 28, count 2 2006.229.02:33:41.86#abcon#{5=INTERFACE CLEAR} 2006.229.02:33:41.89#ibcon#read 3, iclass 28, count 2 2006.229.02:33:41.89#ibcon#about to read 4, iclass 28, count 2 2006.229.02:33:41.89#ibcon#read 4, iclass 28, count 2 2006.229.02:33:41.89#ibcon#about to read 5, iclass 28, count 2 2006.229.02:33:41.89#ibcon#read 5, iclass 28, count 2 2006.229.02:33:41.89#ibcon#about to read 6, iclass 28, count 2 2006.229.02:33:41.89#ibcon#read 6, iclass 28, count 2 2006.229.02:33:41.89#ibcon#end of sib2, iclass 28, count 2 2006.229.02:33:41.89#ibcon#*after write, iclass 28, count 2 2006.229.02:33:41.89#ibcon#*before return 0, iclass 28, count 2 2006.229.02:33:41.89#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:41.89#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:33:41.89#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:33:41.89#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:41.89#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:41.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:33:42.01#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:42.01#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:42.01#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:33:42.01#ibcon#first serial, iclass 28, count 0 2006.229.02:33:42.01#ibcon#enter sib2, iclass 28, count 0 2006.229.02:33:42.01#ibcon#flushed, iclass 28, count 0 2006.229.02:33:42.01#ibcon#about to write, iclass 28, count 0 2006.229.02:33:42.01#ibcon#wrote, iclass 28, count 0 2006.229.02:33:42.01#ibcon#about to read 3, iclass 28, count 0 2006.229.02:33:42.03#ibcon#read 3, iclass 28, count 0 2006.229.02:33:42.03#ibcon#about to read 4, iclass 28, count 0 2006.229.02:33:42.03#ibcon#read 4, iclass 28, count 0 2006.229.02:33:42.03#ibcon#about to read 5, iclass 28, count 0 2006.229.02:33:42.03#ibcon#read 5, iclass 28, count 0 2006.229.02:33:42.03#ibcon#about to read 6, iclass 28, count 0 2006.229.02:33:42.03#ibcon#read 6, iclass 28, count 0 2006.229.02:33:42.03#ibcon#end of sib2, iclass 28, count 0 2006.229.02:33:42.03#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:33:42.03#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:33:42.03#ibcon#[27=USB\r\n] 2006.229.02:33:42.03#ibcon#*before write, iclass 28, count 0 2006.229.02:33:42.03#ibcon#enter sib2, iclass 28, count 0 2006.229.02:33:42.03#ibcon#flushed, iclass 28, count 0 2006.229.02:33:42.03#ibcon#about to write, iclass 28, count 0 2006.229.02:33:42.03#ibcon#wrote, iclass 28, count 0 2006.229.02:33:42.03#ibcon#about to read 3, iclass 28, count 0 2006.229.02:33:42.06#ibcon#read 3, iclass 28, count 0 2006.229.02:33:42.06#ibcon#about to read 4, iclass 28, count 0 2006.229.02:33:42.06#ibcon#read 4, iclass 28, count 0 2006.229.02:33:42.06#ibcon#about to read 5, iclass 28, count 0 2006.229.02:33:42.06#ibcon#read 5, iclass 28, count 0 2006.229.02:33:42.06#ibcon#about to read 6, iclass 28, count 0 2006.229.02:33:42.06#ibcon#read 6, iclass 28, count 0 2006.229.02:33:42.06#ibcon#end of sib2, iclass 28, count 0 2006.229.02:33:42.06#ibcon#*after write, iclass 28, count 0 2006.229.02:33:42.06#ibcon#*before return 0, iclass 28, count 0 2006.229.02:33:42.06#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:42.06#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:33:42.06#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:33:42.06#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:33:42.06$vck44/vblo=3,649.99 2006.229.02:33:42.06#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:33:42.06#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:33:42.06#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:42.06#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:42.06#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:42.06#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:42.06#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:33:42.06#ibcon#first serial, iclass 34, count 0 2006.229.02:33:42.06#ibcon#enter sib2, iclass 34, count 0 2006.229.02:33:42.06#ibcon#flushed, iclass 34, count 0 2006.229.02:33:42.06#ibcon#about to write, iclass 34, count 0 2006.229.02:33:42.06#ibcon#wrote, iclass 34, count 0 2006.229.02:33:42.06#ibcon#about to read 3, iclass 34, count 0 2006.229.02:33:42.08#ibcon#read 3, iclass 34, count 0 2006.229.02:33:42.08#ibcon#about to read 4, iclass 34, count 0 2006.229.02:33:42.08#ibcon#read 4, iclass 34, count 0 2006.229.02:33:42.08#ibcon#about to read 5, iclass 34, count 0 2006.229.02:33:42.08#ibcon#read 5, iclass 34, count 0 2006.229.02:33:42.08#ibcon#about to read 6, iclass 34, count 0 2006.229.02:33:42.08#ibcon#read 6, iclass 34, count 0 2006.229.02:33:42.08#ibcon#end of sib2, iclass 34, count 0 2006.229.02:33:42.08#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:33:42.08#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:33:42.08#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:33:42.08#ibcon#*before write, iclass 34, count 0 2006.229.02:33:42.08#ibcon#enter sib2, iclass 34, count 0 2006.229.02:33:42.08#ibcon#flushed, iclass 34, count 0 2006.229.02:33:42.08#ibcon#about to write, iclass 34, count 0 2006.229.02:33:42.08#ibcon#wrote, iclass 34, count 0 2006.229.02:33:42.08#ibcon#about to read 3, iclass 34, count 0 2006.229.02:33:42.12#ibcon#read 3, iclass 34, count 0 2006.229.02:33:42.12#ibcon#about to read 4, iclass 34, count 0 2006.229.02:33:42.12#ibcon#read 4, iclass 34, count 0 2006.229.02:33:42.12#ibcon#about to read 5, iclass 34, count 0 2006.229.02:33:42.12#ibcon#read 5, iclass 34, count 0 2006.229.02:33:42.12#ibcon#about to read 6, iclass 34, count 0 2006.229.02:33:42.12#ibcon#read 6, iclass 34, count 0 2006.229.02:33:42.12#ibcon#end of sib2, iclass 34, count 0 2006.229.02:33:42.12#ibcon#*after write, iclass 34, count 0 2006.229.02:33:42.12#ibcon#*before return 0, iclass 34, count 0 2006.229.02:33:42.12#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:42.12#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:33:42.12#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:33:42.12#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:33:42.12$vck44/vb=3,4 2006.229.02:33:42.12#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.02:33:42.12#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.02:33:42.12#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:42.12#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:42.18#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:42.18#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:42.18#ibcon#enter wrdev, iclass 36, count 2 2006.229.02:33:42.18#ibcon#first serial, iclass 36, count 2 2006.229.02:33:42.18#ibcon#enter sib2, iclass 36, count 2 2006.229.02:33:42.18#ibcon#flushed, iclass 36, count 2 2006.229.02:33:42.18#ibcon#about to write, iclass 36, count 2 2006.229.02:33:42.18#ibcon#wrote, iclass 36, count 2 2006.229.02:33:42.18#ibcon#about to read 3, iclass 36, count 2 2006.229.02:33:42.20#ibcon#read 3, iclass 36, count 2 2006.229.02:33:42.20#ibcon#about to read 4, iclass 36, count 2 2006.229.02:33:42.20#ibcon#read 4, iclass 36, count 2 2006.229.02:33:42.20#ibcon#about to read 5, iclass 36, count 2 2006.229.02:33:42.20#ibcon#read 5, iclass 36, count 2 2006.229.02:33:42.20#ibcon#about to read 6, iclass 36, count 2 2006.229.02:33:42.20#ibcon#read 6, iclass 36, count 2 2006.229.02:33:42.20#ibcon#end of sib2, iclass 36, count 2 2006.229.02:33:42.20#ibcon#*mode == 0, iclass 36, count 2 2006.229.02:33:42.20#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.02:33:42.20#ibcon#[27=AT03-04\r\n] 2006.229.02:33:42.20#ibcon#*before write, iclass 36, count 2 2006.229.02:33:42.20#ibcon#enter sib2, iclass 36, count 2 2006.229.02:33:42.20#ibcon#flushed, iclass 36, count 2 2006.229.02:33:42.20#ibcon#about to write, iclass 36, count 2 2006.229.02:33:42.20#ibcon#wrote, iclass 36, count 2 2006.229.02:33:42.20#ibcon#about to read 3, iclass 36, count 2 2006.229.02:33:42.23#ibcon#read 3, iclass 36, count 2 2006.229.02:33:42.23#ibcon#about to read 4, iclass 36, count 2 2006.229.02:33:42.23#ibcon#read 4, iclass 36, count 2 2006.229.02:33:42.23#ibcon#about to read 5, iclass 36, count 2 2006.229.02:33:42.23#ibcon#read 5, iclass 36, count 2 2006.229.02:33:42.23#ibcon#about to read 6, iclass 36, count 2 2006.229.02:33:42.23#ibcon#read 6, iclass 36, count 2 2006.229.02:33:42.23#ibcon#end of sib2, iclass 36, count 2 2006.229.02:33:42.23#ibcon#*after write, iclass 36, count 2 2006.229.02:33:42.23#ibcon#*before return 0, iclass 36, count 2 2006.229.02:33:42.23#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:42.23#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:33:42.23#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.02:33:42.23#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:42.23#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:42.35#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:42.35#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:42.35#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:33:42.35#ibcon#first serial, iclass 36, count 0 2006.229.02:33:42.35#ibcon#enter sib2, iclass 36, count 0 2006.229.02:33:42.35#ibcon#flushed, iclass 36, count 0 2006.229.02:33:42.35#ibcon#about to write, iclass 36, count 0 2006.229.02:33:42.35#ibcon#wrote, iclass 36, count 0 2006.229.02:33:42.35#ibcon#about to read 3, iclass 36, count 0 2006.229.02:33:42.37#ibcon#read 3, iclass 36, count 0 2006.229.02:33:42.37#ibcon#about to read 4, iclass 36, count 0 2006.229.02:33:42.37#ibcon#read 4, iclass 36, count 0 2006.229.02:33:42.37#ibcon#about to read 5, iclass 36, count 0 2006.229.02:33:42.37#ibcon#read 5, iclass 36, count 0 2006.229.02:33:42.37#ibcon#about to read 6, iclass 36, count 0 2006.229.02:33:42.37#ibcon#read 6, iclass 36, count 0 2006.229.02:33:42.37#ibcon#end of sib2, iclass 36, count 0 2006.229.02:33:42.37#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:33:42.37#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:33:42.37#ibcon#[27=USB\r\n] 2006.229.02:33:42.37#ibcon#*before write, iclass 36, count 0 2006.229.02:33:42.37#ibcon#enter sib2, iclass 36, count 0 2006.229.02:33:42.37#ibcon#flushed, iclass 36, count 0 2006.229.02:33:42.37#ibcon#about to write, iclass 36, count 0 2006.229.02:33:42.37#ibcon#wrote, iclass 36, count 0 2006.229.02:33:42.37#ibcon#about to read 3, iclass 36, count 0 2006.229.02:33:42.40#ibcon#read 3, iclass 36, count 0 2006.229.02:33:42.40#ibcon#about to read 4, iclass 36, count 0 2006.229.02:33:42.40#ibcon#read 4, iclass 36, count 0 2006.229.02:33:42.40#ibcon#about to read 5, iclass 36, count 0 2006.229.02:33:42.40#ibcon#read 5, iclass 36, count 0 2006.229.02:33:42.40#ibcon#about to read 6, iclass 36, count 0 2006.229.02:33:42.40#ibcon#read 6, iclass 36, count 0 2006.229.02:33:42.40#ibcon#end of sib2, iclass 36, count 0 2006.229.02:33:42.40#ibcon#*after write, iclass 36, count 0 2006.229.02:33:42.40#ibcon#*before return 0, iclass 36, count 0 2006.229.02:33:42.40#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:42.40#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:33:42.40#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:33:42.40#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:33:42.40$vck44/vblo=4,679.99 2006.229.02:33:42.40#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:33:42.40#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:33:42.40#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:42.40#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:42.40#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:42.40#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:42.40#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:33:42.40#ibcon#first serial, iclass 38, count 0 2006.229.02:33:42.40#ibcon#enter sib2, iclass 38, count 0 2006.229.02:33:42.40#ibcon#flushed, iclass 38, count 0 2006.229.02:33:42.40#ibcon#about to write, iclass 38, count 0 2006.229.02:33:42.40#ibcon#wrote, iclass 38, count 0 2006.229.02:33:42.40#ibcon#about to read 3, iclass 38, count 0 2006.229.02:33:42.42#ibcon#read 3, iclass 38, count 0 2006.229.02:33:42.42#ibcon#about to read 4, iclass 38, count 0 2006.229.02:33:42.42#ibcon#read 4, iclass 38, count 0 2006.229.02:33:42.42#ibcon#about to read 5, iclass 38, count 0 2006.229.02:33:42.42#ibcon#read 5, iclass 38, count 0 2006.229.02:33:42.42#ibcon#about to read 6, iclass 38, count 0 2006.229.02:33:42.42#ibcon#read 6, iclass 38, count 0 2006.229.02:33:42.42#ibcon#end of sib2, iclass 38, count 0 2006.229.02:33:42.42#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:33:42.42#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:33:42.42#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:33:42.42#ibcon#*before write, iclass 38, count 0 2006.229.02:33:42.42#ibcon#enter sib2, iclass 38, count 0 2006.229.02:33:42.42#ibcon#flushed, iclass 38, count 0 2006.229.02:33:42.42#ibcon#about to write, iclass 38, count 0 2006.229.02:33:42.42#ibcon#wrote, iclass 38, count 0 2006.229.02:33:42.42#ibcon#about to read 3, iclass 38, count 0 2006.229.02:33:42.46#ibcon#read 3, iclass 38, count 0 2006.229.02:33:42.46#ibcon#about to read 4, iclass 38, count 0 2006.229.02:33:42.46#ibcon#read 4, iclass 38, count 0 2006.229.02:33:42.46#ibcon#about to read 5, iclass 38, count 0 2006.229.02:33:42.46#ibcon#read 5, iclass 38, count 0 2006.229.02:33:42.46#ibcon#about to read 6, iclass 38, count 0 2006.229.02:33:42.46#ibcon#read 6, iclass 38, count 0 2006.229.02:33:42.46#ibcon#end of sib2, iclass 38, count 0 2006.229.02:33:42.46#ibcon#*after write, iclass 38, count 0 2006.229.02:33:42.46#ibcon#*before return 0, iclass 38, count 0 2006.229.02:33:42.46#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:42.46#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:33:42.46#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:33:42.46#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:33:42.46$vck44/vb=4,4 2006.229.02:33:42.46#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.02:33:42.46#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.02:33:42.46#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:42.46#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:42.52#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:42.52#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:42.52#ibcon#enter wrdev, iclass 40, count 2 2006.229.02:33:42.52#ibcon#first serial, iclass 40, count 2 2006.229.02:33:42.52#ibcon#enter sib2, iclass 40, count 2 2006.229.02:33:42.52#ibcon#flushed, iclass 40, count 2 2006.229.02:33:42.52#ibcon#about to write, iclass 40, count 2 2006.229.02:33:42.52#ibcon#wrote, iclass 40, count 2 2006.229.02:33:42.52#ibcon#about to read 3, iclass 40, count 2 2006.229.02:33:42.54#ibcon#read 3, iclass 40, count 2 2006.229.02:33:42.54#ibcon#about to read 4, iclass 40, count 2 2006.229.02:33:42.54#ibcon#read 4, iclass 40, count 2 2006.229.02:33:42.54#ibcon#about to read 5, iclass 40, count 2 2006.229.02:33:42.54#ibcon#read 5, iclass 40, count 2 2006.229.02:33:42.54#ibcon#about to read 6, iclass 40, count 2 2006.229.02:33:42.54#ibcon#read 6, iclass 40, count 2 2006.229.02:33:42.54#ibcon#end of sib2, iclass 40, count 2 2006.229.02:33:42.54#ibcon#*mode == 0, iclass 40, count 2 2006.229.02:33:42.54#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.02:33:42.54#ibcon#[27=AT04-04\r\n] 2006.229.02:33:42.54#ibcon#*before write, iclass 40, count 2 2006.229.02:33:42.54#ibcon#enter sib2, iclass 40, count 2 2006.229.02:33:42.54#ibcon#flushed, iclass 40, count 2 2006.229.02:33:42.54#ibcon#about to write, iclass 40, count 2 2006.229.02:33:42.54#ibcon#wrote, iclass 40, count 2 2006.229.02:33:42.54#ibcon#about to read 3, iclass 40, count 2 2006.229.02:33:42.57#ibcon#read 3, iclass 40, count 2 2006.229.02:33:42.57#ibcon#about to read 4, iclass 40, count 2 2006.229.02:33:42.57#ibcon#read 4, iclass 40, count 2 2006.229.02:33:42.57#ibcon#about to read 5, iclass 40, count 2 2006.229.02:33:42.57#ibcon#read 5, iclass 40, count 2 2006.229.02:33:42.57#ibcon#about to read 6, iclass 40, count 2 2006.229.02:33:42.57#ibcon#read 6, iclass 40, count 2 2006.229.02:33:42.57#ibcon#end of sib2, iclass 40, count 2 2006.229.02:33:42.57#ibcon#*after write, iclass 40, count 2 2006.229.02:33:42.57#ibcon#*before return 0, iclass 40, count 2 2006.229.02:33:42.57#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:42.57#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:33:42.57#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.02:33:42.57#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:42.57#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:42.69#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:42.69#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:42.69#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:33:42.69#ibcon#first serial, iclass 40, count 0 2006.229.02:33:42.69#ibcon#enter sib2, iclass 40, count 0 2006.229.02:33:42.69#ibcon#flushed, iclass 40, count 0 2006.229.02:33:42.69#ibcon#about to write, iclass 40, count 0 2006.229.02:33:42.69#ibcon#wrote, iclass 40, count 0 2006.229.02:33:42.69#ibcon#about to read 3, iclass 40, count 0 2006.229.02:33:42.71#ibcon#read 3, iclass 40, count 0 2006.229.02:33:42.71#ibcon#about to read 4, iclass 40, count 0 2006.229.02:33:42.71#ibcon#read 4, iclass 40, count 0 2006.229.02:33:42.71#ibcon#about to read 5, iclass 40, count 0 2006.229.02:33:42.71#ibcon#read 5, iclass 40, count 0 2006.229.02:33:42.71#ibcon#about to read 6, iclass 40, count 0 2006.229.02:33:42.71#ibcon#read 6, iclass 40, count 0 2006.229.02:33:42.71#ibcon#end of sib2, iclass 40, count 0 2006.229.02:33:42.71#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:33:42.71#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:33:42.71#ibcon#[27=USB\r\n] 2006.229.02:33:42.71#ibcon#*before write, iclass 40, count 0 2006.229.02:33:42.71#ibcon#enter sib2, iclass 40, count 0 2006.229.02:33:42.71#ibcon#flushed, iclass 40, count 0 2006.229.02:33:42.71#ibcon#about to write, iclass 40, count 0 2006.229.02:33:42.71#ibcon#wrote, iclass 40, count 0 2006.229.02:33:42.71#ibcon#about to read 3, iclass 40, count 0 2006.229.02:33:42.74#ibcon#read 3, iclass 40, count 0 2006.229.02:33:42.74#ibcon#about to read 4, iclass 40, count 0 2006.229.02:33:42.74#ibcon#read 4, iclass 40, count 0 2006.229.02:33:42.74#ibcon#about to read 5, iclass 40, count 0 2006.229.02:33:42.74#ibcon#read 5, iclass 40, count 0 2006.229.02:33:42.74#ibcon#about to read 6, iclass 40, count 0 2006.229.02:33:42.74#ibcon#read 6, iclass 40, count 0 2006.229.02:33:42.74#ibcon#end of sib2, iclass 40, count 0 2006.229.02:33:42.74#ibcon#*after write, iclass 40, count 0 2006.229.02:33:42.74#ibcon#*before return 0, iclass 40, count 0 2006.229.02:33:42.74#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:42.74#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:33:42.74#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:33:42.74#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:33:42.74$vck44/vblo=5,709.99 2006.229.02:33:42.74#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:33:42.74#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:33:42.74#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:42.74#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:42.74#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:42.74#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:42.74#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:33:42.74#ibcon#first serial, iclass 4, count 0 2006.229.02:33:42.74#ibcon#enter sib2, iclass 4, count 0 2006.229.02:33:42.74#ibcon#flushed, iclass 4, count 0 2006.229.02:33:42.74#ibcon#about to write, iclass 4, count 0 2006.229.02:33:42.74#ibcon#wrote, iclass 4, count 0 2006.229.02:33:42.74#ibcon#about to read 3, iclass 4, count 0 2006.229.02:33:42.76#ibcon#read 3, iclass 4, count 0 2006.229.02:33:42.76#ibcon#about to read 4, iclass 4, count 0 2006.229.02:33:42.76#ibcon#read 4, iclass 4, count 0 2006.229.02:33:42.76#ibcon#about to read 5, iclass 4, count 0 2006.229.02:33:42.76#ibcon#read 5, iclass 4, count 0 2006.229.02:33:42.76#ibcon#about to read 6, iclass 4, count 0 2006.229.02:33:42.76#ibcon#read 6, iclass 4, count 0 2006.229.02:33:42.76#ibcon#end of sib2, iclass 4, count 0 2006.229.02:33:42.76#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:33:42.76#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:33:42.76#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:33:42.76#ibcon#*before write, iclass 4, count 0 2006.229.02:33:42.76#ibcon#enter sib2, iclass 4, count 0 2006.229.02:33:42.76#ibcon#flushed, iclass 4, count 0 2006.229.02:33:42.76#ibcon#about to write, iclass 4, count 0 2006.229.02:33:42.76#ibcon#wrote, iclass 4, count 0 2006.229.02:33:42.76#ibcon#about to read 3, iclass 4, count 0 2006.229.02:33:42.80#ibcon#read 3, iclass 4, count 0 2006.229.02:33:42.80#ibcon#about to read 4, iclass 4, count 0 2006.229.02:33:42.80#ibcon#read 4, iclass 4, count 0 2006.229.02:33:42.80#ibcon#about to read 5, iclass 4, count 0 2006.229.02:33:42.80#ibcon#read 5, iclass 4, count 0 2006.229.02:33:42.80#ibcon#about to read 6, iclass 4, count 0 2006.229.02:33:42.80#ibcon#read 6, iclass 4, count 0 2006.229.02:33:42.80#ibcon#end of sib2, iclass 4, count 0 2006.229.02:33:42.80#ibcon#*after write, iclass 4, count 0 2006.229.02:33:42.80#ibcon#*before return 0, iclass 4, count 0 2006.229.02:33:42.80#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:42.80#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:33:42.80#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:33:42.80#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:33:42.80$vck44/vb=5,4 2006.229.02:33:42.80#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:33:42.80#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:33:42.80#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:42.80#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:42.86#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:42.86#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:42.86#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:33:42.86#ibcon#first serial, iclass 6, count 2 2006.229.02:33:42.86#ibcon#enter sib2, iclass 6, count 2 2006.229.02:33:42.86#ibcon#flushed, iclass 6, count 2 2006.229.02:33:42.86#ibcon#about to write, iclass 6, count 2 2006.229.02:33:42.86#ibcon#wrote, iclass 6, count 2 2006.229.02:33:42.86#ibcon#about to read 3, iclass 6, count 2 2006.229.02:33:42.88#ibcon#read 3, iclass 6, count 2 2006.229.02:33:42.88#ibcon#about to read 4, iclass 6, count 2 2006.229.02:33:42.88#ibcon#read 4, iclass 6, count 2 2006.229.02:33:42.88#ibcon#about to read 5, iclass 6, count 2 2006.229.02:33:42.88#ibcon#read 5, iclass 6, count 2 2006.229.02:33:42.88#ibcon#about to read 6, iclass 6, count 2 2006.229.02:33:42.88#ibcon#read 6, iclass 6, count 2 2006.229.02:33:42.88#ibcon#end of sib2, iclass 6, count 2 2006.229.02:33:42.88#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:33:42.88#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:33:42.88#ibcon#[27=AT05-04\r\n] 2006.229.02:33:42.88#ibcon#*before write, iclass 6, count 2 2006.229.02:33:42.88#ibcon#enter sib2, iclass 6, count 2 2006.229.02:33:42.88#ibcon#flushed, iclass 6, count 2 2006.229.02:33:42.88#ibcon#about to write, iclass 6, count 2 2006.229.02:33:42.88#ibcon#wrote, iclass 6, count 2 2006.229.02:33:42.88#ibcon#about to read 3, iclass 6, count 2 2006.229.02:33:42.91#ibcon#read 3, iclass 6, count 2 2006.229.02:33:42.91#ibcon#about to read 4, iclass 6, count 2 2006.229.02:33:42.91#ibcon#read 4, iclass 6, count 2 2006.229.02:33:42.91#ibcon#about to read 5, iclass 6, count 2 2006.229.02:33:42.91#ibcon#read 5, iclass 6, count 2 2006.229.02:33:42.91#ibcon#about to read 6, iclass 6, count 2 2006.229.02:33:42.91#ibcon#read 6, iclass 6, count 2 2006.229.02:33:42.91#ibcon#end of sib2, iclass 6, count 2 2006.229.02:33:42.91#ibcon#*after write, iclass 6, count 2 2006.229.02:33:42.91#ibcon#*before return 0, iclass 6, count 2 2006.229.02:33:42.91#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:42.91#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:33:42.91#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:33:42.91#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:42.91#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:43.03#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:43.03#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:43.03#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:33:43.03#ibcon#first serial, iclass 6, count 0 2006.229.02:33:43.03#ibcon#enter sib2, iclass 6, count 0 2006.229.02:33:43.03#ibcon#flushed, iclass 6, count 0 2006.229.02:33:43.03#ibcon#about to write, iclass 6, count 0 2006.229.02:33:43.03#ibcon#wrote, iclass 6, count 0 2006.229.02:33:43.03#ibcon#about to read 3, iclass 6, count 0 2006.229.02:33:43.05#ibcon#read 3, iclass 6, count 0 2006.229.02:33:43.05#ibcon#about to read 4, iclass 6, count 0 2006.229.02:33:43.05#ibcon#read 4, iclass 6, count 0 2006.229.02:33:43.05#ibcon#about to read 5, iclass 6, count 0 2006.229.02:33:43.05#ibcon#read 5, iclass 6, count 0 2006.229.02:33:43.05#ibcon#about to read 6, iclass 6, count 0 2006.229.02:33:43.05#ibcon#read 6, iclass 6, count 0 2006.229.02:33:43.05#ibcon#end of sib2, iclass 6, count 0 2006.229.02:33:43.05#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:33:43.05#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:33:43.05#ibcon#[27=USB\r\n] 2006.229.02:33:43.05#ibcon#*before write, iclass 6, count 0 2006.229.02:33:43.05#ibcon#enter sib2, iclass 6, count 0 2006.229.02:33:43.05#ibcon#flushed, iclass 6, count 0 2006.229.02:33:43.05#ibcon#about to write, iclass 6, count 0 2006.229.02:33:43.05#ibcon#wrote, iclass 6, count 0 2006.229.02:33:43.05#ibcon#about to read 3, iclass 6, count 0 2006.229.02:33:43.08#ibcon#read 3, iclass 6, count 0 2006.229.02:33:43.08#ibcon#about to read 4, iclass 6, count 0 2006.229.02:33:43.08#ibcon#read 4, iclass 6, count 0 2006.229.02:33:43.08#ibcon#about to read 5, iclass 6, count 0 2006.229.02:33:43.08#ibcon#read 5, iclass 6, count 0 2006.229.02:33:43.08#ibcon#about to read 6, iclass 6, count 0 2006.229.02:33:43.08#ibcon#read 6, iclass 6, count 0 2006.229.02:33:43.08#ibcon#end of sib2, iclass 6, count 0 2006.229.02:33:43.08#ibcon#*after write, iclass 6, count 0 2006.229.02:33:43.08#ibcon#*before return 0, iclass 6, count 0 2006.229.02:33:43.08#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:43.08#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:33:43.08#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:33:43.08#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:33:43.08$vck44/vblo=6,719.99 2006.229.02:33:43.08#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:33:43.08#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:33:43.08#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:43.08#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:43.08#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:43.08#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:43.08#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:33:43.08#ibcon#first serial, iclass 10, count 0 2006.229.02:33:43.08#ibcon#enter sib2, iclass 10, count 0 2006.229.02:33:43.08#ibcon#flushed, iclass 10, count 0 2006.229.02:33:43.08#ibcon#about to write, iclass 10, count 0 2006.229.02:33:43.08#ibcon#wrote, iclass 10, count 0 2006.229.02:33:43.08#ibcon#about to read 3, iclass 10, count 0 2006.229.02:33:43.10#ibcon#read 3, iclass 10, count 0 2006.229.02:33:43.10#ibcon#about to read 4, iclass 10, count 0 2006.229.02:33:43.10#ibcon#read 4, iclass 10, count 0 2006.229.02:33:43.10#ibcon#about to read 5, iclass 10, count 0 2006.229.02:33:43.10#ibcon#read 5, iclass 10, count 0 2006.229.02:33:43.10#ibcon#about to read 6, iclass 10, count 0 2006.229.02:33:43.10#ibcon#read 6, iclass 10, count 0 2006.229.02:33:43.10#ibcon#end of sib2, iclass 10, count 0 2006.229.02:33:43.10#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:33:43.10#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:33:43.10#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:33:43.10#ibcon#*before write, iclass 10, count 0 2006.229.02:33:43.10#ibcon#enter sib2, iclass 10, count 0 2006.229.02:33:43.10#ibcon#flushed, iclass 10, count 0 2006.229.02:33:43.10#ibcon#about to write, iclass 10, count 0 2006.229.02:33:43.10#ibcon#wrote, iclass 10, count 0 2006.229.02:33:43.10#ibcon#about to read 3, iclass 10, count 0 2006.229.02:33:43.14#ibcon#read 3, iclass 10, count 0 2006.229.02:33:43.14#ibcon#about to read 4, iclass 10, count 0 2006.229.02:33:43.14#ibcon#read 4, iclass 10, count 0 2006.229.02:33:43.14#ibcon#about to read 5, iclass 10, count 0 2006.229.02:33:43.14#ibcon#read 5, iclass 10, count 0 2006.229.02:33:43.14#ibcon#about to read 6, iclass 10, count 0 2006.229.02:33:43.14#ibcon#read 6, iclass 10, count 0 2006.229.02:33:43.14#ibcon#end of sib2, iclass 10, count 0 2006.229.02:33:43.14#ibcon#*after write, iclass 10, count 0 2006.229.02:33:43.14#ibcon#*before return 0, iclass 10, count 0 2006.229.02:33:43.14#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:43.14#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:33:43.14#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:33:43.14#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:33:43.14$vck44/vb=6,4 2006.229.02:33:43.14#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:33:43.14#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:33:43.14#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:43.14#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:43.20#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:43.20#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:43.20#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:33:43.20#ibcon#first serial, iclass 12, count 2 2006.229.02:33:43.20#ibcon#enter sib2, iclass 12, count 2 2006.229.02:33:43.20#ibcon#flushed, iclass 12, count 2 2006.229.02:33:43.20#ibcon#about to write, iclass 12, count 2 2006.229.02:33:43.20#ibcon#wrote, iclass 12, count 2 2006.229.02:33:43.20#ibcon#about to read 3, iclass 12, count 2 2006.229.02:33:43.22#ibcon#read 3, iclass 12, count 2 2006.229.02:33:43.22#ibcon#about to read 4, iclass 12, count 2 2006.229.02:33:43.22#ibcon#read 4, iclass 12, count 2 2006.229.02:33:43.22#ibcon#about to read 5, iclass 12, count 2 2006.229.02:33:43.22#ibcon#read 5, iclass 12, count 2 2006.229.02:33:43.22#ibcon#about to read 6, iclass 12, count 2 2006.229.02:33:43.22#ibcon#read 6, iclass 12, count 2 2006.229.02:33:43.22#ibcon#end of sib2, iclass 12, count 2 2006.229.02:33:43.22#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:33:43.22#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:33:43.22#ibcon#[27=AT06-04\r\n] 2006.229.02:33:43.22#ibcon#*before write, iclass 12, count 2 2006.229.02:33:43.22#ibcon#enter sib2, iclass 12, count 2 2006.229.02:33:43.22#ibcon#flushed, iclass 12, count 2 2006.229.02:33:43.22#ibcon#about to write, iclass 12, count 2 2006.229.02:33:43.22#ibcon#wrote, iclass 12, count 2 2006.229.02:33:43.22#ibcon#about to read 3, iclass 12, count 2 2006.229.02:33:43.25#ibcon#read 3, iclass 12, count 2 2006.229.02:33:43.25#ibcon#about to read 4, iclass 12, count 2 2006.229.02:33:43.25#ibcon#read 4, iclass 12, count 2 2006.229.02:33:43.25#ibcon#about to read 5, iclass 12, count 2 2006.229.02:33:43.25#ibcon#read 5, iclass 12, count 2 2006.229.02:33:43.25#ibcon#about to read 6, iclass 12, count 2 2006.229.02:33:43.25#ibcon#read 6, iclass 12, count 2 2006.229.02:33:43.25#ibcon#end of sib2, iclass 12, count 2 2006.229.02:33:43.25#ibcon#*after write, iclass 12, count 2 2006.229.02:33:43.25#ibcon#*before return 0, iclass 12, count 2 2006.229.02:33:43.25#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:43.25#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:33:43.25#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:33:43.25#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:43.25#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:43.37#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:43.37#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:43.37#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:33:43.37#ibcon#first serial, iclass 12, count 0 2006.229.02:33:43.37#ibcon#enter sib2, iclass 12, count 0 2006.229.02:33:43.37#ibcon#flushed, iclass 12, count 0 2006.229.02:33:43.37#ibcon#about to write, iclass 12, count 0 2006.229.02:33:43.37#ibcon#wrote, iclass 12, count 0 2006.229.02:33:43.37#ibcon#about to read 3, iclass 12, count 0 2006.229.02:33:43.39#ibcon#read 3, iclass 12, count 0 2006.229.02:33:43.39#ibcon#about to read 4, iclass 12, count 0 2006.229.02:33:43.39#ibcon#read 4, iclass 12, count 0 2006.229.02:33:43.39#ibcon#about to read 5, iclass 12, count 0 2006.229.02:33:43.39#ibcon#read 5, iclass 12, count 0 2006.229.02:33:43.39#ibcon#about to read 6, iclass 12, count 0 2006.229.02:33:43.39#ibcon#read 6, iclass 12, count 0 2006.229.02:33:43.39#ibcon#end of sib2, iclass 12, count 0 2006.229.02:33:43.39#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:33:43.39#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:33:43.39#ibcon#[27=USB\r\n] 2006.229.02:33:43.39#ibcon#*before write, iclass 12, count 0 2006.229.02:33:43.39#ibcon#enter sib2, iclass 12, count 0 2006.229.02:33:43.39#ibcon#flushed, iclass 12, count 0 2006.229.02:33:43.39#ibcon#about to write, iclass 12, count 0 2006.229.02:33:43.39#ibcon#wrote, iclass 12, count 0 2006.229.02:33:43.39#ibcon#about to read 3, iclass 12, count 0 2006.229.02:33:43.42#ibcon#read 3, iclass 12, count 0 2006.229.02:33:43.42#ibcon#about to read 4, iclass 12, count 0 2006.229.02:33:43.42#ibcon#read 4, iclass 12, count 0 2006.229.02:33:43.42#ibcon#about to read 5, iclass 12, count 0 2006.229.02:33:43.42#ibcon#read 5, iclass 12, count 0 2006.229.02:33:43.42#ibcon#about to read 6, iclass 12, count 0 2006.229.02:33:43.42#ibcon#read 6, iclass 12, count 0 2006.229.02:33:43.42#ibcon#end of sib2, iclass 12, count 0 2006.229.02:33:43.42#ibcon#*after write, iclass 12, count 0 2006.229.02:33:43.42#ibcon#*before return 0, iclass 12, count 0 2006.229.02:33:43.42#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:43.42#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:33:43.42#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:33:43.42#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:33:43.42$vck44/vblo=7,734.99 2006.229.02:33:43.42#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:33:43.42#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:33:43.42#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:43.42#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:43.42#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:43.42#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:43.42#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:33:43.42#ibcon#first serial, iclass 14, count 0 2006.229.02:33:43.42#ibcon#enter sib2, iclass 14, count 0 2006.229.02:33:43.42#ibcon#flushed, iclass 14, count 0 2006.229.02:33:43.42#ibcon#about to write, iclass 14, count 0 2006.229.02:33:43.42#ibcon#wrote, iclass 14, count 0 2006.229.02:33:43.42#ibcon#about to read 3, iclass 14, count 0 2006.229.02:33:43.44#ibcon#read 3, iclass 14, count 0 2006.229.02:33:43.44#ibcon#about to read 4, iclass 14, count 0 2006.229.02:33:43.44#ibcon#read 4, iclass 14, count 0 2006.229.02:33:43.44#ibcon#about to read 5, iclass 14, count 0 2006.229.02:33:43.44#ibcon#read 5, iclass 14, count 0 2006.229.02:33:43.44#ibcon#about to read 6, iclass 14, count 0 2006.229.02:33:43.44#ibcon#read 6, iclass 14, count 0 2006.229.02:33:43.44#ibcon#end of sib2, iclass 14, count 0 2006.229.02:33:43.44#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:33:43.44#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:33:43.44#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:33:43.44#ibcon#*before write, iclass 14, count 0 2006.229.02:33:43.44#ibcon#enter sib2, iclass 14, count 0 2006.229.02:33:43.44#ibcon#flushed, iclass 14, count 0 2006.229.02:33:43.44#ibcon#about to write, iclass 14, count 0 2006.229.02:33:43.44#ibcon#wrote, iclass 14, count 0 2006.229.02:33:43.44#ibcon#about to read 3, iclass 14, count 0 2006.229.02:33:43.48#ibcon#read 3, iclass 14, count 0 2006.229.02:33:43.48#ibcon#about to read 4, iclass 14, count 0 2006.229.02:33:43.48#ibcon#read 4, iclass 14, count 0 2006.229.02:33:43.48#ibcon#about to read 5, iclass 14, count 0 2006.229.02:33:43.48#ibcon#read 5, iclass 14, count 0 2006.229.02:33:43.48#ibcon#about to read 6, iclass 14, count 0 2006.229.02:33:43.48#ibcon#read 6, iclass 14, count 0 2006.229.02:33:43.48#ibcon#end of sib2, iclass 14, count 0 2006.229.02:33:43.48#ibcon#*after write, iclass 14, count 0 2006.229.02:33:43.48#ibcon#*before return 0, iclass 14, count 0 2006.229.02:33:43.48#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:43.48#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:33:43.48#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:33:43.48#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:33:43.48$vck44/vb=7,4 2006.229.02:33:43.48#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:33:43.48#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:33:43.48#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:43.48#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:43.54#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:43.54#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:43.54#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:33:43.54#ibcon#first serial, iclass 16, count 2 2006.229.02:33:43.54#ibcon#enter sib2, iclass 16, count 2 2006.229.02:33:43.54#ibcon#flushed, iclass 16, count 2 2006.229.02:33:43.54#ibcon#about to write, iclass 16, count 2 2006.229.02:33:43.54#ibcon#wrote, iclass 16, count 2 2006.229.02:33:43.54#ibcon#about to read 3, iclass 16, count 2 2006.229.02:33:43.56#ibcon#read 3, iclass 16, count 2 2006.229.02:33:43.56#ibcon#about to read 4, iclass 16, count 2 2006.229.02:33:43.56#ibcon#read 4, iclass 16, count 2 2006.229.02:33:43.56#ibcon#about to read 5, iclass 16, count 2 2006.229.02:33:43.56#ibcon#read 5, iclass 16, count 2 2006.229.02:33:43.56#ibcon#about to read 6, iclass 16, count 2 2006.229.02:33:43.56#ibcon#read 6, iclass 16, count 2 2006.229.02:33:43.56#ibcon#end of sib2, iclass 16, count 2 2006.229.02:33:43.56#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:33:43.56#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:33:43.56#ibcon#[27=AT07-04\r\n] 2006.229.02:33:43.56#ibcon#*before write, iclass 16, count 2 2006.229.02:33:43.56#ibcon#enter sib2, iclass 16, count 2 2006.229.02:33:43.56#ibcon#flushed, iclass 16, count 2 2006.229.02:33:43.56#ibcon#about to write, iclass 16, count 2 2006.229.02:33:43.56#ibcon#wrote, iclass 16, count 2 2006.229.02:33:43.56#ibcon#about to read 3, iclass 16, count 2 2006.229.02:33:43.59#ibcon#read 3, iclass 16, count 2 2006.229.02:33:43.59#ibcon#about to read 4, iclass 16, count 2 2006.229.02:33:43.59#ibcon#read 4, iclass 16, count 2 2006.229.02:33:43.59#ibcon#about to read 5, iclass 16, count 2 2006.229.02:33:43.59#ibcon#read 5, iclass 16, count 2 2006.229.02:33:43.59#ibcon#about to read 6, iclass 16, count 2 2006.229.02:33:43.59#ibcon#read 6, iclass 16, count 2 2006.229.02:33:43.59#ibcon#end of sib2, iclass 16, count 2 2006.229.02:33:43.59#ibcon#*after write, iclass 16, count 2 2006.229.02:33:43.59#ibcon#*before return 0, iclass 16, count 2 2006.229.02:33:43.59#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:43.59#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:33:43.59#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:33:43.59#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:43.59#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:43.71#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:43.71#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:43.71#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:33:43.71#ibcon#first serial, iclass 16, count 0 2006.229.02:33:43.71#ibcon#enter sib2, iclass 16, count 0 2006.229.02:33:43.71#ibcon#flushed, iclass 16, count 0 2006.229.02:33:43.71#ibcon#about to write, iclass 16, count 0 2006.229.02:33:43.71#ibcon#wrote, iclass 16, count 0 2006.229.02:33:43.71#ibcon#about to read 3, iclass 16, count 0 2006.229.02:33:43.73#ibcon#read 3, iclass 16, count 0 2006.229.02:33:43.73#ibcon#about to read 4, iclass 16, count 0 2006.229.02:33:43.73#ibcon#read 4, iclass 16, count 0 2006.229.02:33:43.73#ibcon#about to read 5, iclass 16, count 0 2006.229.02:33:43.73#ibcon#read 5, iclass 16, count 0 2006.229.02:33:43.73#ibcon#about to read 6, iclass 16, count 0 2006.229.02:33:43.73#ibcon#read 6, iclass 16, count 0 2006.229.02:33:43.73#ibcon#end of sib2, iclass 16, count 0 2006.229.02:33:43.73#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:33:43.73#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:33:43.73#ibcon#[27=USB\r\n] 2006.229.02:33:43.73#ibcon#*before write, iclass 16, count 0 2006.229.02:33:43.73#ibcon#enter sib2, iclass 16, count 0 2006.229.02:33:43.73#ibcon#flushed, iclass 16, count 0 2006.229.02:33:43.73#ibcon#about to write, iclass 16, count 0 2006.229.02:33:43.73#ibcon#wrote, iclass 16, count 0 2006.229.02:33:43.73#ibcon#about to read 3, iclass 16, count 0 2006.229.02:33:43.76#ibcon#read 3, iclass 16, count 0 2006.229.02:33:43.76#ibcon#about to read 4, iclass 16, count 0 2006.229.02:33:43.76#ibcon#read 4, iclass 16, count 0 2006.229.02:33:43.76#ibcon#about to read 5, iclass 16, count 0 2006.229.02:33:43.76#ibcon#read 5, iclass 16, count 0 2006.229.02:33:43.76#ibcon#about to read 6, iclass 16, count 0 2006.229.02:33:43.76#ibcon#read 6, iclass 16, count 0 2006.229.02:33:43.76#ibcon#end of sib2, iclass 16, count 0 2006.229.02:33:43.76#ibcon#*after write, iclass 16, count 0 2006.229.02:33:43.76#ibcon#*before return 0, iclass 16, count 0 2006.229.02:33:43.76#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:43.76#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:33:43.76#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:33:43.76#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:33:43.76$vck44/vblo=8,744.99 2006.229.02:33:43.76#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:33:43.76#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:33:43.76#ibcon#ireg 17 cls_cnt 0 2006.229.02:33:43.76#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:43.76#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:43.76#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:43.76#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:33:43.76#ibcon#first serial, iclass 18, count 0 2006.229.02:33:43.76#ibcon#enter sib2, iclass 18, count 0 2006.229.02:33:43.76#ibcon#flushed, iclass 18, count 0 2006.229.02:33:43.76#ibcon#about to write, iclass 18, count 0 2006.229.02:33:43.76#ibcon#wrote, iclass 18, count 0 2006.229.02:33:43.76#ibcon#about to read 3, iclass 18, count 0 2006.229.02:33:43.78#ibcon#read 3, iclass 18, count 0 2006.229.02:33:43.78#ibcon#about to read 4, iclass 18, count 0 2006.229.02:33:43.78#ibcon#read 4, iclass 18, count 0 2006.229.02:33:43.78#ibcon#about to read 5, iclass 18, count 0 2006.229.02:33:43.78#ibcon#read 5, iclass 18, count 0 2006.229.02:33:43.78#ibcon#about to read 6, iclass 18, count 0 2006.229.02:33:43.78#ibcon#read 6, iclass 18, count 0 2006.229.02:33:43.78#ibcon#end of sib2, iclass 18, count 0 2006.229.02:33:43.78#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:33:43.78#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:33:43.78#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:33:43.78#ibcon#*before write, iclass 18, count 0 2006.229.02:33:43.78#ibcon#enter sib2, iclass 18, count 0 2006.229.02:33:43.78#ibcon#flushed, iclass 18, count 0 2006.229.02:33:43.78#ibcon#about to write, iclass 18, count 0 2006.229.02:33:43.78#ibcon#wrote, iclass 18, count 0 2006.229.02:33:43.78#ibcon#about to read 3, iclass 18, count 0 2006.229.02:33:43.82#ibcon#read 3, iclass 18, count 0 2006.229.02:33:43.82#ibcon#about to read 4, iclass 18, count 0 2006.229.02:33:43.82#ibcon#read 4, iclass 18, count 0 2006.229.02:33:43.82#ibcon#about to read 5, iclass 18, count 0 2006.229.02:33:43.82#ibcon#read 5, iclass 18, count 0 2006.229.02:33:43.82#ibcon#about to read 6, iclass 18, count 0 2006.229.02:33:43.82#ibcon#read 6, iclass 18, count 0 2006.229.02:33:43.82#ibcon#end of sib2, iclass 18, count 0 2006.229.02:33:43.82#ibcon#*after write, iclass 18, count 0 2006.229.02:33:43.82#ibcon#*before return 0, iclass 18, count 0 2006.229.02:33:43.82#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:43.82#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:33:43.82#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:33:43.82#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:33:43.82$vck44/vb=8,4 2006.229.02:33:43.82#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.02:33:43.82#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.02:33:43.82#ibcon#ireg 11 cls_cnt 2 2006.229.02:33:43.82#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:43.88#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:43.88#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:43.88#ibcon#enter wrdev, iclass 20, count 2 2006.229.02:33:43.88#ibcon#first serial, iclass 20, count 2 2006.229.02:33:43.88#ibcon#enter sib2, iclass 20, count 2 2006.229.02:33:43.88#ibcon#flushed, iclass 20, count 2 2006.229.02:33:43.88#ibcon#about to write, iclass 20, count 2 2006.229.02:33:43.88#ibcon#wrote, iclass 20, count 2 2006.229.02:33:43.88#ibcon#about to read 3, iclass 20, count 2 2006.229.02:33:43.90#ibcon#read 3, iclass 20, count 2 2006.229.02:33:43.90#ibcon#about to read 4, iclass 20, count 2 2006.229.02:33:43.90#ibcon#read 4, iclass 20, count 2 2006.229.02:33:43.90#ibcon#about to read 5, iclass 20, count 2 2006.229.02:33:43.90#ibcon#read 5, iclass 20, count 2 2006.229.02:33:43.90#ibcon#about to read 6, iclass 20, count 2 2006.229.02:33:43.90#ibcon#read 6, iclass 20, count 2 2006.229.02:33:43.90#ibcon#end of sib2, iclass 20, count 2 2006.229.02:33:43.90#ibcon#*mode == 0, iclass 20, count 2 2006.229.02:33:43.90#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.02:33:43.90#ibcon#[27=AT08-04\r\n] 2006.229.02:33:43.90#ibcon#*before write, iclass 20, count 2 2006.229.02:33:43.90#ibcon#enter sib2, iclass 20, count 2 2006.229.02:33:43.90#ibcon#flushed, iclass 20, count 2 2006.229.02:33:43.90#ibcon#about to write, iclass 20, count 2 2006.229.02:33:43.90#ibcon#wrote, iclass 20, count 2 2006.229.02:33:43.90#ibcon#about to read 3, iclass 20, count 2 2006.229.02:33:43.93#ibcon#read 3, iclass 20, count 2 2006.229.02:33:43.93#ibcon#about to read 4, iclass 20, count 2 2006.229.02:33:43.93#ibcon#read 4, iclass 20, count 2 2006.229.02:33:43.93#ibcon#about to read 5, iclass 20, count 2 2006.229.02:33:43.93#ibcon#read 5, iclass 20, count 2 2006.229.02:33:43.93#ibcon#about to read 6, iclass 20, count 2 2006.229.02:33:43.93#ibcon#read 6, iclass 20, count 2 2006.229.02:33:43.93#ibcon#end of sib2, iclass 20, count 2 2006.229.02:33:43.93#ibcon#*after write, iclass 20, count 2 2006.229.02:33:43.93#ibcon#*before return 0, iclass 20, count 2 2006.229.02:33:43.93#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:43.93#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:33:43.93#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.02:33:43.93#ibcon#ireg 7 cls_cnt 0 2006.229.02:33:43.93#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:44.05#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:44.05#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:44.05#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:33:44.05#ibcon#first serial, iclass 20, count 0 2006.229.02:33:44.05#ibcon#enter sib2, iclass 20, count 0 2006.229.02:33:44.05#ibcon#flushed, iclass 20, count 0 2006.229.02:33:44.05#ibcon#about to write, iclass 20, count 0 2006.229.02:33:44.05#ibcon#wrote, iclass 20, count 0 2006.229.02:33:44.05#ibcon#about to read 3, iclass 20, count 0 2006.229.02:33:44.07#ibcon#read 3, iclass 20, count 0 2006.229.02:33:44.07#ibcon#about to read 4, iclass 20, count 0 2006.229.02:33:44.07#ibcon#read 4, iclass 20, count 0 2006.229.02:33:44.07#ibcon#about to read 5, iclass 20, count 0 2006.229.02:33:44.07#ibcon#read 5, iclass 20, count 0 2006.229.02:33:44.07#ibcon#about to read 6, iclass 20, count 0 2006.229.02:33:44.07#ibcon#read 6, iclass 20, count 0 2006.229.02:33:44.07#ibcon#end of sib2, iclass 20, count 0 2006.229.02:33:44.07#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:33:44.07#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:33:44.07#ibcon#[27=USB\r\n] 2006.229.02:33:44.07#ibcon#*before write, iclass 20, count 0 2006.229.02:33:44.07#ibcon#enter sib2, iclass 20, count 0 2006.229.02:33:44.07#ibcon#flushed, iclass 20, count 0 2006.229.02:33:44.07#ibcon#about to write, iclass 20, count 0 2006.229.02:33:44.07#ibcon#wrote, iclass 20, count 0 2006.229.02:33:44.07#ibcon#about to read 3, iclass 20, count 0 2006.229.02:33:44.10#ibcon#read 3, iclass 20, count 0 2006.229.02:33:44.10#ibcon#about to read 4, iclass 20, count 0 2006.229.02:33:44.10#ibcon#read 4, iclass 20, count 0 2006.229.02:33:44.10#ibcon#about to read 5, iclass 20, count 0 2006.229.02:33:44.10#ibcon#read 5, iclass 20, count 0 2006.229.02:33:44.10#ibcon#about to read 6, iclass 20, count 0 2006.229.02:33:44.10#ibcon#read 6, iclass 20, count 0 2006.229.02:33:44.10#ibcon#end of sib2, iclass 20, count 0 2006.229.02:33:44.10#ibcon#*after write, iclass 20, count 0 2006.229.02:33:44.10#ibcon#*before return 0, iclass 20, count 0 2006.229.02:33:44.10#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:44.10#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:33:44.10#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:33:44.10#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:33:44.10$vck44/vabw=wide 2006.229.02:33:44.10#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:33:44.10#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:33:44.10#ibcon#ireg 8 cls_cnt 0 2006.229.02:33:44.10#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:44.10#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:44.10#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:44.10#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:33:44.10#ibcon#first serial, iclass 22, count 0 2006.229.02:33:44.10#ibcon#enter sib2, iclass 22, count 0 2006.229.02:33:44.10#ibcon#flushed, iclass 22, count 0 2006.229.02:33:44.10#ibcon#about to write, iclass 22, count 0 2006.229.02:33:44.10#ibcon#wrote, iclass 22, count 0 2006.229.02:33:44.10#ibcon#about to read 3, iclass 22, count 0 2006.229.02:33:44.12#ibcon#read 3, iclass 22, count 0 2006.229.02:33:44.12#ibcon#about to read 4, iclass 22, count 0 2006.229.02:33:44.12#ibcon#read 4, iclass 22, count 0 2006.229.02:33:44.12#ibcon#about to read 5, iclass 22, count 0 2006.229.02:33:44.12#ibcon#read 5, iclass 22, count 0 2006.229.02:33:44.12#ibcon#about to read 6, iclass 22, count 0 2006.229.02:33:44.12#ibcon#read 6, iclass 22, count 0 2006.229.02:33:44.12#ibcon#end of sib2, iclass 22, count 0 2006.229.02:33:44.12#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:33:44.12#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:33:44.12#ibcon#[25=BW32\r\n] 2006.229.02:33:44.12#ibcon#*before write, iclass 22, count 0 2006.229.02:33:44.12#ibcon#enter sib2, iclass 22, count 0 2006.229.02:33:44.12#ibcon#flushed, iclass 22, count 0 2006.229.02:33:44.12#ibcon#about to write, iclass 22, count 0 2006.229.02:33:44.12#ibcon#wrote, iclass 22, count 0 2006.229.02:33:44.12#ibcon#about to read 3, iclass 22, count 0 2006.229.02:33:44.15#ibcon#read 3, iclass 22, count 0 2006.229.02:33:44.15#ibcon#about to read 4, iclass 22, count 0 2006.229.02:33:44.15#ibcon#read 4, iclass 22, count 0 2006.229.02:33:44.15#ibcon#about to read 5, iclass 22, count 0 2006.229.02:33:44.15#ibcon#read 5, iclass 22, count 0 2006.229.02:33:44.15#ibcon#about to read 6, iclass 22, count 0 2006.229.02:33:44.15#ibcon#read 6, iclass 22, count 0 2006.229.02:33:44.15#ibcon#end of sib2, iclass 22, count 0 2006.229.02:33:44.15#ibcon#*after write, iclass 22, count 0 2006.229.02:33:44.15#ibcon#*before return 0, iclass 22, count 0 2006.229.02:33:44.15#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:44.15#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:33:44.15#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:33:44.15#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:33:44.15$vck44/vbbw=wide 2006.229.02:33:44.15#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.02:33:44.15#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.02:33:44.15#ibcon#ireg 8 cls_cnt 0 2006.229.02:33:44.15#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:33:44.22#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:33:44.22#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:33:44.22#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:33:44.22#ibcon#first serial, iclass 24, count 0 2006.229.02:33:44.22#ibcon#enter sib2, iclass 24, count 0 2006.229.02:33:44.22#ibcon#flushed, iclass 24, count 0 2006.229.02:33:44.22#ibcon#about to write, iclass 24, count 0 2006.229.02:33:44.22#ibcon#wrote, iclass 24, count 0 2006.229.02:33:44.22#ibcon#about to read 3, iclass 24, count 0 2006.229.02:33:44.24#ibcon#read 3, iclass 24, count 0 2006.229.02:33:44.24#ibcon#about to read 4, iclass 24, count 0 2006.229.02:33:44.24#ibcon#read 4, iclass 24, count 0 2006.229.02:33:44.24#ibcon#about to read 5, iclass 24, count 0 2006.229.02:33:44.24#ibcon#read 5, iclass 24, count 0 2006.229.02:33:44.24#ibcon#about to read 6, iclass 24, count 0 2006.229.02:33:44.24#ibcon#read 6, iclass 24, count 0 2006.229.02:33:44.24#ibcon#end of sib2, iclass 24, count 0 2006.229.02:33:44.24#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:33:44.24#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:33:44.24#ibcon#[27=BW32\r\n] 2006.229.02:33:44.24#ibcon#*before write, iclass 24, count 0 2006.229.02:33:44.24#ibcon#enter sib2, iclass 24, count 0 2006.229.02:33:44.24#ibcon#flushed, iclass 24, count 0 2006.229.02:33:44.24#ibcon#about to write, iclass 24, count 0 2006.229.02:33:44.24#ibcon#wrote, iclass 24, count 0 2006.229.02:33:44.24#ibcon#about to read 3, iclass 24, count 0 2006.229.02:33:44.27#ibcon#read 3, iclass 24, count 0 2006.229.02:33:44.27#ibcon#about to read 4, iclass 24, count 0 2006.229.02:33:44.27#ibcon#read 4, iclass 24, count 0 2006.229.02:33:44.27#ibcon#about to read 5, iclass 24, count 0 2006.229.02:33:44.27#ibcon#read 5, iclass 24, count 0 2006.229.02:33:44.27#ibcon#about to read 6, iclass 24, count 0 2006.229.02:33:44.27#ibcon#read 6, iclass 24, count 0 2006.229.02:33:44.27#ibcon#end of sib2, iclass 24, count 0 2006.229.02:33:44.27#ibcon#*after write, iclass 24, count 0 2006.229.02:33:44.27#ibcon#*before return 0, iclass 24, count 0 2006.229.02:33:44.27#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:33:44.27#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:33:44.27#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:33:44.27#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:33:44.27$setupk4/ifdk4 2006.229.02:33:44.27$ifdk4/lo= 2006.229.02:33:44.27$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:33:44.27$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:33:44.27$ifdk4/patch= 2006.229.02:33:44.27$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:33:44.27$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:33:44.27$setupk4/!*+20s 2006.229.02:33:52.01#abcon#<5=/07 1.3 3.2 29.281001001.2\r\n> 2006.229.02:33:52.03#abcon#{5=INTERFACE CLEAR} 2006.229.02:33:52.09#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:33:58.75$setupk4/"tpicd 2006.229.02:33:58.75$setupk4/echo=off 2006.229.02:33:58.75$setupk4/xlog=off 2006.229.02:33:58.75:!2006.229.02:36:55 2006.229.02:34:09.14#trakl#Source acquired 2006.229.02:34:10.14#flagr#flagr/antenna,acquired 2006.229.02:36:55.00:preob 2006.229.02:36:56.13/onsource/TRACKING 2006.229.02:36:56.13:!2006.229.02:37:05 2006.229.02:37:05.00:"tape 2006.229.02:37:05.00:"st=record 2006.229.02:37:05.00:data_valid=on 2006.229.02:37:05.00:midob 2006.229.02:37:05.13/onsource/TRACKING 2006.229.02:37:05.13/wx/29.21,1001.1,100 2006.229.02:37:05.26/cable/+6.4087E-03 2006.229.02:37:06.35/va/01,08,usb,yes,46,49 2006.229.02:37:06.35/va/02,07,usb,yes,50,50 2006.229.02:37:06.35/va/03,06,usb,yes,61,64 2006.229.02:37:06.35/va/04,07,usb,yes,51,54 2006.229.02:37:06.35/va/05,04,usb,yes,46,47 2006.229.02:37:06.35/va/06,04,usb,yes,52,51 2006.229.02:37:06.35/va/07,05,usb,yes,46,47 2006.229.02:37:06.35/va/08,06,usb,yes,34,42 2006.229.02:37:06.58/valo/01,524.99,yes,locked 2006.229.02:37:06.58/valo/02,534.99,yes,locked 2006.229.02:37:06.58/valo/03,564.99,yes,locked 2006.229.02:37:06.58/valo/04,624.99,yes,locked 2006.229.02:37:06.58/valo/05,734.99,yes,locked 2006.229.02:37:06.58/valo/06,814.99,yes,locked 2006.229.02:37:06.58/valo/07,864.99,yes,locked 2006.229.02:37:06.58/valo/08,884.99,yes,locked 2006.229.02:37:07.67/vb/01,04,usb,yes,33,31 2006.229.02:37:07.67/vb/02,04,usb,yes,36,35 2006.229.02:37:07.67/vb/03,04,usb,yes,32,36 2006.229.02:37:07.67/vb/04,04,usb,yes,37,36 2006.229.02:37:07.67/vb/05,04,usb,yes,29,32 2006.229.02:37:07.67/vb/06,04,usb,yes,34,30 2006.229.02:37:07.67/vb/07,04,usb,yes,34,33 2006.229.02:37:07.67/vb/08,04,usb,yes,31,35 2006.229.02:37:07.90/vblo/01,629.99,yes,locked 2006.229.02:37:07.90/vblo/02,634.99,yes,locked 2006.229.02:37:07.90/vblo/03,649.99,yes,locked 2006.229.02:37:07.90/vblo/04,679.99,yes,locked 2006.229.02:37:07.90/vblo/05,709.99,yes,locked 2006.229.02:37:07.90/vblo/06,719.99,yes,locked 2006.229.02:37:07.90/vblo/07,734.99,yes,locked 2006.229.02:37:07.90/vblo/08,744.99,yes,locked 2006.229.02:37:08.05/vabw/8 2006.229.02:37:08.20/vbbw/8 2006.229.02:37:08.29/xfe/off,on,12.0 2006.229.02:37:08.72/ifatt/23,28,28,28 2006.229.02:37:09.08/fmout-gps/S +4.62E-07 2006.229.02:37:09.12:!2006.229.02:38:55 2006.229.02:38:55.02:data_valid=off 2006.229.02:38:55.02:"et 2006.229.02:38:55.02:!+3s 2006.229.02:38:58.05:"tape 2006.229.02:38:58.06:postob 2006.229.02:38:58.13/cable/+6.4096E-03 2006.229.02:38:58.14/wx/29.14,1001.1,100 2006.229.02:38:58.19/fmout-gps/S +4.60E-07 2006.229.02:38:58.20:scan_name=229-0241,jd0608,350 2006.229.02:38:58.20:source=nrao150,035929.75,505750.2,2000.0,ccw 2006.229.02:38:59.15#flagr#flagr/antenna,new-source 2006.229.02:38:59.15:checkk5 2006.229.02:38:59.59/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:39:00.00/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:39:00.48/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:39:00.89/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:39:01.44/chk_obsdata//k5ts1/T2290237??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.02:39:01.86/chk_obsdata//k5ts2/T2290237??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.02:39:02.28/chk_obsdata//k5ts3/T2290237??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.02:39:02.67/chk_obsdata//k5ts4/T2290237??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.02:39:03.44/k5log//k5ts1_log_newline 2006.229.02:39:04.22/k5log//k5ts2_log_newline 2006.229.02:39:04.98/k5log//k5ts3_log_newline 2006.229.02:39:05.97/k5log//k5ts4_log_newline 2006.229.02:39:05.99/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:39:05.99:setupk4=1 2006.229.02:39:05.99$setupk4/echo=on 2006.229.02:39:05.99$setupk4/pcalon 2006.229.02:39:05.99$pcalon/"no phase cal control is implemented here 2006.229.02:39:05.99$setupk4/"tpicd=stop 2006.229.02:39:05.99$setupk4/"rec=synch_on 2006.229.02:39:05.99$setupk4/"rec_mode=128 2006.229.02:39:05.99$setupk4/!* 2006.229.02:39:05.99$setupk4/recpk4 2006.229.02:39:05.99$recpk4/recpatch= 2006.229.02:39:06.00$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:39:06.00$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:39:06.00$setupk4/vck44 2006.229.02:39:06.00$vck44/valo=1,524.99 2006.229.02:39:06.00#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.02:39:06.00#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.02:39:06.00#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:06.00#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:06.00#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:06.00#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:06.00#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:39:06.00#ibcon#first serial, iclass 40, count 0 2006.229.02:39:06.00#ibcon#enter sib2, iclass 40, count 0 2006.229.02:39:06.00#ibcon#flushed, iclass 40, count 0 2006.229.02:39:06.00#ibcon#about to write, iclass 40, count 0 2006.229.02:39:06.00#ibcon#wrote, iclass 40, count 0 2006.229.02:39:06.00#ibcon#about to read 3, iclass 40, count 0 2006.229.02:39:06.04#ibcon#read 3, iclass 40, count 0 2006.229.02:39:06.04#ibcon#about to read 4, iclass 40, count 0 2006.229.02:39:06.04#ibcon#read 4, iclass 40, count 0 2006.229.02:39:06.04#ibcon#about to read 5, iclass 40, count 0 2006.229.02:39:06.04#ibcon#read 5, iclass 40, count 0 2006.229.02:39:06.04#ibcon#about to read 6, iclass 40, count 0 2006.229.02:39:06.04#ibcon#read 6, iclass 40, count 0 2006.229.02:39:06.04#ibcon#end of sib2, iclass 40, count 0 2006.229.02:39:06.04#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:39:06.04#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:39:06.04#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:39:06.04#ibcon#*before write, iclass 40, count 0 2006.229.02:39:06.04#ibcon#enter sib2, iclass 40, count 0 2006.229.02:39:06.04#ibcon#flushed, iclass 40, count 0 2006.229.02:39:06.04#ibcon#about to write, iclass 40, count 0 2006.229.02:39:06.04#ibcon#wrote, iclass 40, count 0 2006.229.02:39:06.04#ibcon#about to read 3, iclass 40, count 0 2006.229.02:39:06.09#ibcon#read 3, iclass 40, count 0 2006.229.02:39:06.09#ibcon#about to read 4, iclass 40, count 0 2006.229.02:39:06.09#ibcon#read 4, iclass 40, count 0 2006.229.02:39:06.09#ibcon#about to read 5, iclass 40, count 0 2006.229.02:39:06.09#ibcon#read 5, iclass 40, count 0 2006.229.02:39:06.09#ibcon#about to read 6, iclass 40, count 0 2006.229.02:39:06.09#ibcon#read 6, iclass 40, count 0 2006.229.02:39:06.09#ibcon#end of sib2, iclass 40, count 0 2006.229.02:39:06.09#ibcon#*after write, iclass 40, count 0 2006.229.02:39:06.09#ibcon#*before return 0, iclass 40, count 0 2006.229.02:39:06.09#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:06.09#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:06.09#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:39:06.09#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:39:06.09$vck44/va=1,8 2006.229.02:39:06.09#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.02:39:06.09#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.02:39:06.09#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:06.09#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:06.09#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:06.09#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:06.09#ibcon#enter wrdev, iclass 4, count 2 2006.229.02:39:06.09#ibcon#first serial, iclass 4, count 2 2006.229.02:39:06.09#ibcon#enter sib2, iclass 4, count 2 2006.229.02:39:06.09#ibcon#flushed, iclass 4, count 2 2006.229.02:39:06.09#ibcon#about to write, iclass 4, count 2 2006.229.02:39:06.09#ibcon#wrote, iclass 4, count 2 2006.229.02:39:06.09#ibcon#about to read 3, iclass 4, count 2 2006.229.02:39:06.11#ibcon#read 3, iclass 4, count 2 2006.229.02:39:06.11#ibcon#about to read 4, iclass 4, count 2 2006.229.02:39:06.11#ibcon#read 4, iclass 4, count 2 2006.229.02:39:06.11#ibcon#about to read 5, iclass 4, count 2 2006.229.02:39:06.11#ibcon#read 5, iclass 4, count 2 2006.229.02:39:06.11#ibcon#about to read 6, iclass 4, count 2 2006.229.02:39:06.11#ibcon#read 6, iclass 4, count 2 2006.229.02:39:06.11#ibcon#end of sib2, iclass 4, count 2 2006.229.02:39:06.11#ibcon#*mode == 0, iclass 4, count 2 2006.229.02:39:06.11#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.02:39:06.11#ibcon#[25=AT01-08\r\n] 2006.229.02:39:06.11#ibcon#*before write, iclass 4, count 2 2006.229.02:39:06.11#ibcon#enter sib2, iclass 4, count 2 2006.229.02:39:06.11#ibcon#flushed, iclass 4, count 2 2006.229.02:39:06.11#ibcon#about to write, iclass 4, count 2 2006.229.02:39:06.11#ibcon#wrote, iclass 4, count 2 2006.229.02:39:06.11#ibcon#about to read 3, iclass 4, count 2 2006.229.02:39:06.13#ibcon#read 3, iclass 4, count 2 2006.229.02:39:06.13#ibcon#about to read 4, iclass 4, count 2 2006.229.02:39:06.13#ibcon#read 4, iclass 4, count 2 2006.229.02:39:06.13#ibcon#about to read 5, iclass 4, count 2 2006.229.02:39:06.13#ibcon#read 5, iclass 4, count 2 2006.229.02:39:06.13#ibcon#about to read 6, iclass 4, count 2 2006.229.02:39:06.13#ibcon#read 6, iclass 4, count 2 2006.229.02:39:06.13#ibcon#end of sib2, iclass 4, count 2 2006.229.02:39:06.13#ibcon#*after write, iclass 4, count 2 2006.229.02:39:06.13#ibcon#*before return 0, iclass 4, count 2 2006.229.02:39:06.13#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:06.13#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:06.13#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.02:39:06.13#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:06.13#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:06.25#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:06.25#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:06.25#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:39:06.25#ibcon#first serial, iclass 4, count 0 2006.229.02:39:06.25#ibcon#enter sib2, iclass 4, count 0 2006.229.02:39:06.25#ibcon#flushed, iclass 4, count 0 2006.229.02:39:06.25#ibcon#about to write, iclass 4, count 0 2006.229.02:39:06.25#ibcon#wrote, iclass 4, count 0 2006.229.02:39:06.25#ibcon#about to read 3, iclass 4, count 0 2006.229.02:39:06.27#ibcon#read 3, iclass 4, count 0 2006.229.02:39:06.27#ibcon#about to read 4, iclass 4, count 0 2006.229.02:39:06.27#ibcon#read 4, iclass 4, count 0 2006.229.02:39:06.27#ibcon#about to read 5, iclass 4, count 0 2006.229.02:39:06.27#ibcon#read 5, iclass 4, count 0 2006.229.02:39:06.27#ibcon#about to read 6, iclass 4, count 0 2006.229.02:39:06.27#ibcon#read 6, iclass 4, count 0 2006.229.02:39:06.27#ibcon#end of sib2, iclass 4, count 0 2006.229.02:39:06.27#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:39:06.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:39:06.27#ibcon#[25=USB\r\n] 2006.229.02:39:06.27#ibcon#*before write, iclass 4, count 0 2006.229.02:39:06.27#ibcon#enter sib2, iclass 4, count 0 2006.229.02:39:06.27#ibcon#flushed, iclass 4, count 0 2006.229.02:39:06.27#ibcon#about to write, iclass 4, count 0 2006.229.02:39:06.27#ibcon#wrote, iclass 4, count 0 2006.229.02:39:06.27#ibcon#about to read 3, iclass 4, count 0 2006.229.02:39:06.30#ibcon#read 3, iclass 4, count 0 2006.229.02:39:06.30#ibcon#about to read 4, iclass 4, count 0 2006.229.02:39:06.30#ibcon#read 4, iclass 4, count 0 2006.229.02:39:06.30#ibcon#about to read 5, iclass 4, count 0 2006.229.02:39:06.30#ibcon#read 5, iclass 4, count 0 2006.229.02:39:06.30#ibcon#about to read 6, iclass 4, count 0 2006.229.02:39:06.30#ibcon#read 6, iclass 4, count 0 2006.229.02:39:06.30#ibcon#end of sib2, iclass 4, count 0 2006.229.02:39:06.30#ibcon#*after write, iclass 4, count 0 2006.229.02:39:06.30#ibcon#*before return 0, iclass 4, count 0 2006.229.02:39:06.30#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:06.30#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:06.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:39:06.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:39:06.31$vck44/valo=2,534.99 2006.229.02:39:06.31#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.02:39:06.31#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.02:39:06.31#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:06.31#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:06.31#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:06.31#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:06.31#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:39:06.31#ibcon#first serial, iclass 6, count 0 2006.229.02:39:06.31#ibcon#enter sib2, iclass 6, count 0 2006.229.02:39:06.31#ibcon#flushed, iclass 6, count 0 2006.229.02:39:06.31#ibcon#about to write, iclass 6, count 0 2006.229.02:39:06.31#ibcon#wrote, iclass 6, count 0 2006.229.02:39:06.31#ibcon#about to read 3, iclass 6, count 0 2006.229.02:39:06.33#ibcon#read 3, iclass 6, count 0 2006.229.02:39:06.33#ibcon#about to read 4, iclass 6, count 0 2006.229.02:39:06.33#ibcon#read 4, iclass 6, count 0 2006.229.02:39:06.33#ibcon#about to read 5, iclass 6, count 0 2006.229.02:39:06.33#ibcon#read 5, iclass 6, count 0 2006.229.02:39:06.33#ibcon#about to read 6, iclass 6, count 0 2006.229.02:39:06.33#ibcon#read 6, iclass 6, count 0 2006.229.02:39:06.33#ibcon#end of sib2, iclass 6, count 0 2006.229.02:39:06.33#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:39:06.33#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:39:06.33#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:39:06.33#ibcon#*before write, iclass 6, count 0 2006.229.02:39:06.33#ibcon#enter sib2, iclass 6, count 0 2006.229.02:39:06.33#ibcon#flushed, iclass 6, count 0 2006.229.02:39:06.33#ibcon#about to write, iclass 6, count 0 2006.229.02:39:06.33#ibcon#wrote, iclass 6, count 0 2006.229.02:39:06.33#ibcon#about to read 3, iclass 6, count 0 2006.229.02:39:06.37#ibcon#read 3, iclass 6, count 0 2006.229.02:39:06.37#ibcon#about to read 4, iclass 6, count 0 2006.229.02:39:06.37#ibcon#read 4, iclass 6, count 0 2006.229.02:39:06.37#ibcon#about to read 5, iclass 6, count 0 2006.229.02:39:06.37#ibcon#read 5, iclass 6, count 0 2006.229.02:39:06.37#ibcon#about to read 6, iclass 6, count 0 2006.229.02:39:06.37#ibcon#read 6, iclass 6, count 0 2006.229.02:39:06.37#ibcon#end of sib2, iclass 6, count 0 2006.229.02:39:06.37#ibcon#*after write, iclass 6, count 0 2006.229.02:39:06.37#ibcon#*before return 0, iclass 6, count 0 2006.229.02:39:06.37#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:06.37#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:06.37#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:39:06.37#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:39:06.38$vck44/va=2,7 2006.229.02:39:06.38#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.02:39:06.38#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.02:39:06.38#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:06.38#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:06.41#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:06.41#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:06.41#ibcon#enter wrdev, iclass 10, count 2 2006.229.02:39:06.41#ibcon#first serial, iclass 10, count 2 2006.229.02:39:06.41#ibcon#enter sib2, iclass 10, count 2 2006.229.02:39:06.41#ibcon#flushed, iclass 10, count 2 2006.229.02:39:06.41#ibcon#about to write, iclass 10, count 2 2006.229.02:39:06.41#ibcon#wrote, iclass 10, count 2 2006.229.02:39:06.41#ibcon#about to read 3, iclass 10, count 2 2006.229.02:39:06.43#ibcon#read 3, iclass 10, count 2 2006.229.02:39:06.43#ibcon#about to read 4, iclass 10, count 2 2006.229.02:39:06.43#ibcon#read 4, iclass 10, count 2 2006.229.02:39:06.43#ibcon#about to read 5, iclass 10, count 2 2006.229.02:39:06.43#ibcon#read 5, iclass 10, count 2 2006.229.02:39:06.43#ibcon#about to read 6, iclass 10, count 2 2006.229.02:39:06.43#ibcon#read 6, iclass 10, count 2 2006.229.02:39:06.43#ibcon#end of sib2, iclass 10, count 2 2006.229.02:39:06.43#ibcon#*mode == 0, iclass 10, count 2 2006.229.02:39:06.43#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.02:39:06.43#ibcon#[25=AT02-07\r\n] 2006.229.02:39:06.43#ibcon#*before write, iclass 10, count 2 2006.229.02:39:06.43#ibcon#enter sib2, iclass 10, count 2 2006.229.02:39:06.44#ibcon#flushed, iclass 10, count 2 2006.229.02:39:06.44#ibcon#about to write, iclass 10, count 2 2006.229.02:39:06.44#ibcon#wrote, iclass 10, count 2 2006.229.02:39:06.44#ibcon#about to read 3, iclass 10, count 2 2006.229.02:39:06.46#ibcon#read 3, iclass 10, count 2 2006.229.02:39:06.46#ibcon#about to read 4, iclass 10, count 2 2006.229.02:39:06.46#ibcon#read 4, iclass 10, count 2 2006.229.02:39:06.46#ibcon#about to read 5, iclass 10, count 2 2006.229.02:39:06.46#ibcon#read 5, iclass 10, count 2 2006.229.02:39:06.46#ibcon#about to read 6, iclass 10, count 2 2006.229.02:39:06.46#ibcon#read 6, iclass 10, count 2 2006.229.02:39:06.46#ibcon#end of sib2, iclass 10, count 2 2006.229.02:39:06.46#ibcon#*after write, iclass 10, count 2 2006.229.02:39:06.46#ibcon#*before return 0, iclass 10, count 2 2006.229.02:39:06.46#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:06.46#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:06.46#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.02:39:06.47#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:06.47#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:06.57#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:06.57#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:06.57#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:39:06.57#ibcon#first serial, iclass 10, count 0 2006.229.02:39:06.57#ibcon#enter sib2, iclass 10, count 0 2006.229.02:39:06.57#ibcon#flushed, iclass 10, count 0 2006.229.02:39:06.57#ibcon#about to write, iclass 10, count 0 2006.229.02:39:06.57#ibcon#wrote, iclass 10, count 0 2006.229.02:39:06.57#ibcon#about to read 3, iclass 10, count 0 2006.229.02:39:06.59#ibcon#read 3, iclass 10, count 0 2006.229.02:39:06.59#ibcon#about to read 4, iclass 10, count 0 2006.229.02:39:06.59#ibcon#read 4, iclass 10, count 0 2006.229.02:39:06.59#ibcon#about to read 5, iclass 10, count 0 2006.229.02:39:06.59#ibcon#read 5, iclass 10, count 0 2006.229.02:39:06.59#ibcon#about to read 6, iclass 10, count 0 2006.229.02:39:06.59#ibcon#read 6, iclass 10, count 0 2006.229.02:39:06.59#ibcon#end of sib2, iclass 10, count 0 2006.229.02:39:06.59#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:39:06.59#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:39:06.59#ibcon#[25=USB\r\n] 2006.229.02:39:06.59#ibcon#*before write, iclass 10, count 0 2006.229.02:39:06.59#ibcon#enter sib2, iclass 10, count 0 2006.229.02:39:06.59#ibcon#flushed, iclass 10, count 0 2006.229.02:39:06.59#ibcon#about to write, iclass 10, count 0 2006.229.02:39:06.59#ibcon#wrote, iclass 10, count 0 2006.229.02:39:06.59#ibcon#about to read 3, iclass 10, count 0 2006.229.02:39:06.62#ibcon#read 3, iclass 10, count 0 2006.229.02:39:06.62#ibcon#about to read 4, iclass 10, count 0 2006.229.02:39:06.62#ibcon#read 4, iclass 10, count 0 2006.229.02:39:06.62#ibcon#about to read 5, iclass 10, count 0 2006.229.02:39:06.62#ibcon#read 5, iclass 10, count 0 2006.229.02:39:06.62#ibcon#about to read 6, iclass 10, count 0 2006.229.02:39:06.62#ibcon#read 6, iclass 10, count 0 2006.229.02:39:06.62#ibcon#end of sib2, iclass 10, count 0 2006.229.02:39:06.62#ibcon#*after write, iclass 10, count 0 2006.229.02:39:06.62#ibcon#*before return 0, iclass 10, count 0 2006.229.02:39:06.62#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:06.62#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:06.62#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:39:06.62#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:39:06.63$vck44/valo=3,564.99 2006.229.02:39:06.63#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.02:39:06.63#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.02:39:06.63#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:06.63#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:06.63#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:06.63#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:06.63#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:39:06.63#ibcon#first serial, iclass 12, count 0 2006.229.02:39:06.63#ibcon#enter sib2, iclass 12, count 0 2006.229.02:39:06.63#ibcon#flushed, iclass 12, count 0 2006.229.02:39:06.63#ibcon#about to write, iclass 12, count 0 2006.229.02:39:06.63#ibcon#wrote, iclass 12, count 0 2006.229.02:39:06.63#ibcon#about to read 3, iclass 12, count 0 2006.229.02:39:06.65#ibcon#read 3, iclass 12, count 0 2006.229.02:39:06.65#ibcon#about to read 4, iclass 12, count 0 2006.229.02:39:06.65#ibcon#read 4, iclass 12, count 0 2006.229.02:39:06.65#ibcon#about to read 5, iclass 12, count 0 2006.229.02:39:06.65#ibcon#read 5, iclass 12, count 0 2006.229.02:39:06.65#ibcon#about to read 6, iclass 12, count 0 2006.229.02:39:06.65#ibcon#read 6, iclass 12, count 0 2006.229.02:39:06.65#ibcon#end of sib2, iclass 12, count 0 2006.229.02:39:06.65#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:39:06.65#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:39:06.65#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:39:06.65#ibcon#*before write, iclass 12, count 0 2006.229.02:39:06.65#ibcon#enter sib2, iclass 12, count 0 2006.229.02:39:06.65#ibcon#flushed, iclass 12, count 0 2006.229.02:39:06.65#ibcon#about to write, iclass 12, count 0 2006.229.02:39:06.65#ibcon#wrote, iclass 12, count 0 2006.229.02:39:06.65#ibcon#about to read 3, iclass 12, count 0 2006.229.02:39:06.69#ibcon#read 3, iclass 12, count 0 2006.229.02:39:06.69#ibcon#about to read 4, iclass 12, count 0 2006.229.02:39:06.69#ibcon#read 4, iclass 12, count 0 2006.229.02:39:06.69#ibcon#about to read 5, iclass 12, count 0 2006.229.02:39:06.69#ibcon#read 5, iclass 12, count 0 2006.229.02:39:06.69#ibcon#about to read 6, iclass 12, count 0 2006.229.02:39:06.69#ibcon#read 6, iclass 12, count 0 2006.229.02:39:06.69#ibcon#end of sib2, iclass 12, count 0 2006.229.02:39:06.69#ibcon#*after write, iclass 12, count 0 2006.229.02:39:06.69#ibcon#*before return 0, iclass 12, count 0 2006.229.02:39:06.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:06.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:06.69#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:39:06.69#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:39:06.70$vck44/va=3,6 2006.229.02:39:06.70#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.02:39:06.70#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.02:39:06.70#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:06.70#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:06.73#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:06.73#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:06.73#ibcon#enter wrdev, iclass 14, count 2 2006.229.02:39:06.73#ibcon#first serial, iclass 14, count 2 2006.229.02:39:06.73#ibcon#enter sib2, iclass 14, count 2 2006.229.02:39:06.73#ibcon#flushed, iclass 14, count 2 2006.229.02:39:06.73#ibcon#about to write, iclass 14, count 2 2006.229.02:39:06.73#ibcon#wrote, iclass 14, count 2 2006.229.02:39:06.73#ibcon#about to read 3, iclass 14, count 2 2006.229.02:39:06.75#ibcon#read 3, iclass 14, count 2 2006.229.02:39:06.75#ibcon#about to read 4, iclass 14, count 2 2006.229.02:39:06.75#ibcon#read 4, iclass 14, count 2 2006.229.02:39:06.75#ibcon#about to read 5, iclass 14, count 2 2006.229.02:39:06.75#ibcon#read 5, iclass 14, count 2 2006.229.02:39:06.75#ibcon#about to read 6, iclass 14, count 2 2006.229.02:39:06.75#ibcon#read 6, iclass 14, count 2 2006.229.02:39:06.75#ibcon#end of sib2, iclass 14, count 2 2006.229.02:39:06.75#ibcon#*mode == 0, iclass 14, count 2 2006.229.02:39:06.75#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.02:39:06.75#ibcon#[25=AT03-06\r\n] 2006.229.02:39:06.75#ibcon#*before write, iclass 14, count 2 2006.229.02:39:06.75#ibcon#enter sib2, iclass 14, count 2 2006.229.02:39:06.75#ibcon#flushed, iclass 14, count 2 2006.229.02:39:06.75#ibcon#about to write, iclass 14, count 2 2006.229.02:39:06.76#ibcon#wrote, iclass 14, count 2 2006.229.02:39:06.76#ibcon#about to read 3, iclass 14, count 2 2006.229.02:39:06.78#ibcon#read 3, iclass 14, count 2 2006.229.02:39:06.78#ibcon#about to read 4, iclass 14, count 2 2006.229.02:39:06.78#ibcon#read 4, iclass 14, count 2 2006.229.02:39:06.78#ibcon#about to read 5, iclass 14, count 2 2006.229.02:39:06.78#ibcon#read 5, iclass 14, count 2 2006.229.02:39:06.78#ibcon#about to read 6, iclass 14, count 2 2006.229.02:39:06.78#ibcon#read 6, iclass 14, count 2 2006.229.02:39:06.78#ibcon#end of sib2, iclass 14, count 2 2006.229.02:39:06.78#ibcon#*after write, iclass 14, count 2 2006.229.02:39:06.78#ibcon#*before return 0, iclass 14, count 2 2006.229.02:39:06.78#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:06.78#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:06.78#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.02:39:06.78#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:06.79#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:06.89#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:06.89#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:06.89#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:39:06.89#ibcon#first serial, iclass 14, count 0 2006.229.02:39:06.89#ibcon#enter sib2, iclass 14, count 0 2006.229.02:39:06.89#ibcon#flushed, iclass 14, count 0 2006.229.02:39:06.89#ibcon#about to write, iclass 14, count 0 2006.229.02:39:06.89#ibcon#wrote, iclass 14, count 0 2006.229.02:39:06.89#ibcon#about to read 3, iclass 14, count 0 2006.229.02:39:06.91#ibcon#read 3, iclass 14, count 0 2006.229.02:39:06.91#ibcon#about to read 4, iclass 14, count 0 2006.229.02:39:06.91#ibcon#read 4, iclass 14, count 0 2006.229.02:39:06.91#ibcon#about to read 5, iclass 14, count 0 2006.229.02:39:06.91#ibcon#read 5, iclass 14, count 0 2006.229.02:39:06.91#ibcon#about to read 6, iclass 14, count 0 2006.229.02:39:06.91#ibcon#read 6, iclass 14, count 0 2006.229.02:39:06.91#ibcon#end of sib2, iclass 14, count 0 2006.229.02:39:06.91#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:39:06.91#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:39:06.91#ibcon#[25=USB\r\n] 2006.229.02:39:06.91#ibcon#*before write, iclass 14, count 0 2006.229.02:39:06.91#ibcon#enter sib2, iclass 14, count 0 2006.229.02:39:06.91#ibcon#flushed, iclass 14, count 0 2006.229.02:39:06.91#ibcon#about to write, iclass 14, count 0 2006.229.02:39:06.91#ibcon#wrote, iclass 14, count 0 2006.229.02:39:06.91#ibcon#about to read 3, iclass 14, count 0 2006.229.02:39:06.94#ibcon#read 3, iclass 14, count 0 2006.229.02:39:06.94#ibcon#about to read 4, iclass 14, count 0 2006.229.02:39:06.94#ibcon#read 4, iclass 14, count 0 2006.229.02:39:06.94#ibcon#about to read 5, iclass 14, count 0 2006.229.02:39:06.94#ibcon#read 5, iclass 14, count 0 2006.229.02:39:06.94#ibcon#about to read 6, iclass 14, count 0 2006.229.02:39:06.94#ibcon#read 6, iclass 14, count 0 2006.229.02:39:06.94#ibcon#end of sib2, iclass 14, count 0 2006.229.02:39:06.94#ibcon#*after write, iclass 14, count 0 2006.229.02:39:06.94#ibcon#*before return 0, iclass 14, count 0 2006.229.02:39:06.94#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:06.94#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:06.94#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:39:06.94#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:39:06.95$vck44/valo=4,624.99 2006.229.02:39:06.95#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.02:39:06.95#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.02:39:06.95#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:06.95#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:06.95#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:06.95#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:06.95#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:39:06.95#ibcon#first serial, iclass 16, count 0 2006.229.02:39:06.95#ibcon#enter sib2, iclass 16, count 0 2006.229.02:39:06.95#ibcon#flushed, iclass 16, count 0 2006.229.02:39:06.95#ibcon#about to write, iclass 16, count 0 2006.229.02:39:06.95#ibcon#wrote, iclass 16, count 0 2006.229.02:39:06.95#ibcon#about to read 3, iclass 16, count 0 2006.229.02:39:06.96#ibcon#read 3, iclass 16, count 0 2006.229.02:39:06.96#ibcon#about to read 4, iclass 16, count 0 2006.229.02:39:06.96#ibcon#read 4, iclass 16, count 0 2006.229.02:39:06.96#ibcon#about to read 5, iclass 16, count 0 2006.229.02:39:06.96#ibcon#read 5, iclass 16, count 0 2006.229.02:39:06.96#ibcon#about to read 6, iclass 16, count 0 2006.229.02:39:06.96#ibcon#read 6, iclass 16, count 0 2006.229.02:39:06.96#ibcon#end of sib2, iclass 16, count 0 2006.229.02:39:06.96#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:39:06.96#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:39:06.96#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:39:06.96#ibcon#*before write, iclass 16, count 0 2006.229.02:39:06.96#ibcon#enter sib2, iclass 16, count 0 2006.229.02:39:06.96#ibcon#flushed, iclass 16, count 0 2006.229.02:39:06.96#ibcon#about to write, iclass 16, count 0 2006.229.02:39:06.96#ibcon#wrote, iclass 16, count 0 2006.229.02:39:06.96#ibcon#about to read 3, iclass 16, count 0 2006.229.02:39:07.00#ibcon#read 3, iclass 16, count 0 2006.229.02:39:07.00#ibcon#about to read 4, iclass 16, count 0 2006.229.02:39:07.00#ibcon#read 4, iclass 16, count 0 2006.229.02:39:07.00#ibcon#about to read 5, iclass 16, count 0 2006.229.02:39:07.00#ibcon#read 5, iclass 16, count 0 2006.229.02:39:07.00#ibcon#about to read 6, iclass 16, count 0 2006.229.02:39:07.00#ibcon#read 6, iclass 16, count 0 2006.229.02:39:07.00#ibcon#end of sib2, iclass 16, count 0 2006.229.02:39:07.00#ibcon#*after write, iclass 16, count 0 2006.229.02:39:07.00#ibcon#*before return 0, iclass 16, count 0 2006.229.02:39:07.00#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:07.00#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:07.00#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:39:07.00#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:39:07.01$vck44/va=4,7 2006.229.02:39:07.01#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.02:39:07.01#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.02:39:07.01#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:07.01#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:07.05#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:07.05#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:07.05#ibcon#enter wrdev, iclass 18, count 2 2006.229.02:39:07.05#ibcon#first serial, iclass 18, count 2 2006.229.02:39:07.05#ibcon#enter sib2, iclass 18, count 2 2006.229.02:39:07.05#ibcon#flushed, iclass 18, count 2 2006.229.02:39:07.05#ibcon#about to write, iclass 18, count 2 2006.229.02:39:07.05#ibcon#wrote, iclass 18, count 2 2006.229.02:39:07.05#ibcon#about to read 3, iclass 18, count 2 2006.229.02:39:07.07#ibcon#read 3, iclass 18, count 2 2006.229.02:39:07.07#ibcon#about to read 4, iclass 18, count 2 2006.229.02:39:07.07#ibcon#read 4, iclass 18, count 2 2006.229.02:39:07.07#ibcon#about to read 5, iclass 18, count 2 2006.229.02:39:07.07#ibcon#read 5, iclass 18, count 2 2006.229.02:39:07.07#ibcon#about to read 6, iclass 18, count 2 2006.229.02:39:07.07#ibcon#read 6, iclass 18, count 2 2006.229.02:39:07.07#ibcon#end of sib2, iclass 18, count 2 2006.229.02:39:07.07#ibcon#*mode == 0, iclass 18, count 2 2006.229.02:39:07.07#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.02:39:07.07#ibcon#[25=AT04-07\r\n] 2006.229.02:39:07.07#ibcon#*before write, iclass 18, count 2 2006.229.02:39:07.07#ibcon#enter sib2, iclass 18, count 2 2006.229.02:39:07.07#ibcon#flushed, iclass 18, count 2 2006.229.02:39:07.07#ibcon#about to write, iclass 18, count 2 2006.229.02:39:07.08#ibcon#wrote, iclass 18, count 2 2006.229.02:39:07.08#ibcon#about to read 3, iclass 18, count 2 2006.229.02:39:07.10#ibcon#read 3, iclass 18, count 2 2006.229.02:39:07.10#ibcon#about to read 4, iclass 18, count 2 2006.229.02:39:07.10#ibcon#read 4, iclass 18, count 2 2006.229.02:39:07.10#ibcon#about to read 5, iclass 18, count 2 2006.229.02:39:07.10#ibcon#read 5, iclass 18, count 2 2006.229.02:39:07.10#ibcon#about to read 6, iclass 18, count 2 2006.229.02:39:07.10#ibcon#read 6, iclass 18, count 2 2006.229.02:39:07.10#ibcon#end of sib2, iclass 18, count 2 2006.229.02:39:07.10#ibcon#*after write, iclass 18, count 2 2006.229.02:39:07.10#ibcon#*before return 0, iclass 18, count 2 2006.229.02:39:07.10#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:07.10#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:07.10#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.02:39:07.10#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:07.10#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:07.22#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:07.22#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:07.22#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:39:07.22#ibcon#first serial, iclass 18, count 0 2006.229.02:39:07.22#ibcon#enter sib2, iclass 18, count 0 2006.229.02:39:07.22#ibcon#flushed, iclass 18, count 0 2006.229.02:39:07.22#ibcon#about to write, iclass 18, count 0 2006.229.02:39:07.22#ibcon#wrote, iclass 18, count 0 2006.229.02:39:07.22#ibcon#about to read 3, iclass 18, count 0 2006.229.02:39:07.24#ibcon#read 3, iclass 18, count 0 2006.229.02:39:07.24#ibcon#about to read 4, iclass 18, count 0 2006.229.02:39:07.24#ibcon#read 4, iclass 18, count 0 2006.229.02:39:07.24#ibcon#about to read 5, iclass 18, count 0 2006.229.02:39:07.24#ibcon#read 5, iclass 18, count 0 2006.229.02:39:07.24#ibcon#about to read 6, iclass 18, count 0 2006.229.02:39:07.24#ibcon#read 6, iclass 18, count 0 2006.229.02:39:07.24#ibcon#end of sib2, iclass 18, count 0 2006.229.02:39:07.24#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:39:07.24#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:39:07.24#ibcon#[25=USB\r\n] 2006.229.02:39:07.24#ibcon#*before write, iclass 18, count 0 2006.229.02:39:07.24#ibcon#enter sib2, iclass 18, count 0 2006.229.02:39:07.24#ibcon#flushed, iclass 18, count 0 2006.229.02:39:07.24#ibcon#about to write, iclass 18, count 0 2006.229.02:39:07.24#ibcon#wrote, iclass 18, count 0 2006.229.02:39:07.24#ibcon#about to read 3, iclass 18, count 0 2006.229.02:39:07.27#ibcon#read 3, iclass 18, count 0 2006.229.02:39:07.27#ibcon#about to read 4, iclass 18, count 0 2006.229.02:39:07.27#ibcon#read 4, iclass 18, count 0 2006.229.02:39:07.27#ibcon#about to read 5, iclass 18, count 0 2006.229.02:39:07.27#ibcon#read 5, iclass 18, count 0 2006.229.02:39:07.27#ibcon#about to read 6, iclass 18, count 0 2006.229.02:39:07.27#ibcon#read 6, iclass 18, count 0 2006.229.02:39:07.27#ibcon#end of sib2, iclass 18, count 0 2006.229.02:39:07.27#ibcon#*after write, iclass 18, count 0 2006.229.02:39:07.27#ibcon#*before return 0, iclass 18, count 0 2006.229.02:39:07.27#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:07.27#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:07.27#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:39:07.27#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:39:07.28$vck44/valo=5,734.99 2006.229.02:39:07.28#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.02:39:07.28#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.02:39:07.28#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:07.28#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:07.28#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:07.28#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:07.28#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:39:07.28#ibcon#first serial, iclass 20, count 0 2006.229.02:39:07.28#ibcon#enter sib2, iclass 20, count 0 2006.229.02:39:07.28#ibcon#flushed, iclass 20, count 0 2006.229.02:39:07.28#ibcon#about to write, iclass 20, count 0 2006.229.02:39:07.28#ibcon#wrote, iclass 20, count 0 2006.229.02:39:07.28#ibcon#about to read 3, iclass 20, count 0 2006.229.02:39:07.29#ibcon#read 3, iclass 20, count 0 2006.229.02:39:07.29#ibcon#about to read 4, iclass 20, count 0 2006.229.02:39:07.29#ibcon#read 4, iclass 20, count 0 2006.229.02:39:07.29#ibcon#about to read 5, iclass 20, count 0 2006.229.02:39:07.29#ibcon#read 5, iclass 20, count 0 2006.229.02:39:07.29#ibcon#about to read 6, iclass 20, count 0 2006.229.02:39:07.29#ibcon#read 6, iclass 20, count 0 2006.229.02:39:07.29#ibcon#end of sib2, iclass 20, count 0 2006.229.02:39:07.29#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:39:07.29#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:39:07.29#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:39:07.29#ibcon#*before write, iclass 20, count 0 2006.229.02:39:07.29#ibcon#enter sib2, iclass 20, count 0 2006.229.02:39:07.29#ibcon#flushed, iclass 20, count 0 2006.229.02:39:07.29#ibcon#about to write, iclass 20, count 0 2006.229.02:39:07.29#ibcon#wrote, iclass 20, count 0 2006.229.02:39:07.29#ibcon#about to read 3, iclass 20, count 0 2006.229.02:39:07.33#ibcon#read 3, iclass 20, count 0 2006.229.02:39:07.33#ibcon#about to read 4, iclass 20, count 0 2006.229.02:39:07.33#ibcon#read 4, iclass 20, count 0 2006.229.02:39:07.33#ibcon#about to read 5, iclass 20, count 0 2006.229.02:39:07.33#ibcon#read 5, iclass 20, count 0 2006.229.02:39:07.34#ibcon#about to read 6, iclass 20, count 0 2006.229.02:39:07.34#ibcon#read 6, iclass 20, count 0 2006.229.02:39:07.34#ibcon#end of sib2, iclass 20, count 0 2006.229.02:39:07.34#ibcon#*after write, iclass 20, count 0 2006.229.02:39:07.34#ibcon#*before return 0, iclass 20, count 0 2006.229.02:39:07.34#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:07.34#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:07.34#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:39:07.34#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:39:07.34$vck44/va=5,4 2006.229.02:39:07.34#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.02:39:07.34#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.02:39:07.34#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:07.34#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:39:07.38#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:39:07.38#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:39:07.38#ibcon#enter wrdev, iclass 22, count 2 2006.229.02:39:07.38#ibcon#first serial, iclass 22, count 2 2006.229.02:39:07.38#ibcon#enter sib2, iclass 22, count 2 2006.229.02:39:07.38#ibcon#flushed, iclass 22, count 2 2006.229.02:39:07.38#ibcon#about to write, iclass 22, count 2 2006.229.02:39:07.38#ibcon#wrote, iclass 22, count 2 2006.229.02:39:07.38#ibcon#about to read 3, iclass 22, count 2 2006.229.02:39:07.40#ibcon#read 3, iclass 22, count 2 2006.229.02:39:07.40#ibcon#about to read 4, iclass 22, count 2 2006.229.02:39:07.40#ibcon#read 4, iclass 22, count 2 2006.229.02:39:07.40#ibcon#about to read 5, iclass 22, count 2 2006.229.02:39:07.40#ibcon#read 5, iclass 22, count 2 2006.229.02:39:07.40#ibcon#about to read 6, iclass 22, count 2 2006.229.02:39:07.40#ibcon#read 6, iclass 22, count 2 2006.229.02:39:07.40#ibcon#end of sib2, iclass 22, count 2 2006.229.02:39:07.40#ibcon#*mode == 0, iclass 22, count 2 2006.229.02:39:07.40#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.02:39:07.40#ibcon#[25=AT05-04\r\n] 2006.229.02:39:07.40#ibcon#*before write, iclass 22, count 2 2006.229.02:39:07.40#ibcon#enter sib2, iclass 22, count 2 2006.229.02:39:07.40#ibcon#flushed, iclass 22, count 2 2006.229.02:39:07.40#ibcon#about to write, iclass 22, count 2 2006.229.02:39:07.41#ibcon#wrote, iclass 22, count 2 2006.229.02:39:07.41#ibcon#about to read 3, iclass 22, count 2 2006.229.02:39:07.43#ibcon#read 3, iclass 22, count 2 2006.229.02:39:07.43#ibcon#about to read 4, iclass 22, count 2 2006.229.02:39:07.43#ibcon#read 4, iclass 22, count 2 2006.229.02:39:07.43#ibcon#about to read 5, iclass 22, count 2 2006.229.02:39:07.43#ibcon#read 5, iclass 22, count 2 2006.229.02:39:07.43#ibcon#about to read 6, iclass 22, count 2 2006.229.02:39:07.43#ibcon#read 6, iclass 22, count 2 2006.229.02:39:07.43#ibcon#end of sib2, iclass 22, count 2 2006.229.02:39:07.43#ibcon#*after write, iclass 22, count 2 2006.229.02:39:07.43#ibcon#*before return 0, iclass 22, count 2 2006.229.02:39:07.43#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:39:07.43#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.02:39:07.43#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.02:39:07.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:07.43#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:39:07.55#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:39:07.55#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:39:07.55#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:39:07.55#ibcon#first serial, iclass 22, count 0 2006.229.02:39:07.55#ibcon#enter sib2, iclass 22, count 0 2006.229.02:39:07.55#ibcon#flushed, iclass 22, count 0 2006.229.02:39:07.55#ibcon#about to write, iclass 22, count 0 2006.229.02:39:07.55#ibcon#wrote, iclass 22, count 0 2006.229.02:39:07.55#ibcon#about to read 3, iclass 22, count 0 2006.229.02:39:07.57#ibcon#read 3, iclass 22, count 0 2006.229.02:39:07.57#ibcon#about to read 4, iclass 22, count 0 2006.229.02:39:07.57#ibcon#read 4, iclass 22, count 0 2006.229.02:39:07.57#ibcon#about to read 5, iclass 22, count 0 2006.229.02:39:07.57#ibcon#read 5, iclass 22, count 0 2006.229.02:39:07.57#ibcon#about to read 6, iclass 22, count 0 2006.229.02:39:07.57#ibcon#read 6, iclass 22, count 0 2006.229.02:39:07.57#ibcon#end of sib2, iclass 22, count 0 2006.229.02:39:07.57#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:39:07.57#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:39:07.57#ibcon#[25=USB\r\n] 2006.229.02:39:07.57#ibcon#*before write, iclass 22, count 0 2006.229.02:39:07.57#ibcon#enter sib2, iclass 22, count 0 2006.229.02:39:07.57#ibcon#flushed, iclass 22, count 0 2006.229.02:39:07.57#ibcon#about to write, iclass 22, count 0 2006.229.02:39:07.57#ibcon#wrote, iclass 22, count 0 2006.229.02:39:07.57#ibcon#about to read 3, iclass 22, count 0 2006.229.02:39:07.60#ibcon#read 3, iclass 22, count 0 2006.229.02:39:07.60#ibcon#about to read 4, iclass 22, count 0 2006.229.02:39:07.60#ibcon#read 4, iclass 22, count 0 2006.229.02:39:07.60#ibcon#about to read 5, iclass 22, count 0 2006.229.02:39:07.60#ibcon#read 5, iclass 22, count 0 2006.229.02:39:07.60#ibcon#about to read 6, iclass 22, count 0 2006.229.02:39:07.60#ibcon#read 6, iclass 22, count 0 2006.229.02:39:07.60#ibcon#end of sib2, iclass 22, count 0 2006.229.02:39:07.60#ibcon#*after write, iclass 22, count 0 2006.229.02:39:07.60#ibcon#*before return 0, iclass 22, count 0 2006.229.02:39:07.60#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:39:07.60#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.02:39:07.60#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:39:07.60#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:39:07.61$vck44/valo=6,814.99 2006.229.02:39:07.61#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.02:39:07.61#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.02:39:07.61#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:07.61#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:39:07.61#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:39:07.61#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:39:07.61#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:39:07.61#ibcon#first serial, iclass 24, count 0 2006.229.02:39:07.61#ibcon#enter sib2, iclass 24, count 0 2006.229.02:39:07.61#ibcon#flushed, iclass 24, count 0 2006.229.02:39:07.61#ibcon#about to write, iclass 24, count 0 2006.229.02:39:07.61#ibcon#wrote, iclass 24, count 0 2006.229.02:39:07.61#ibcon#about to read 3, iclass 24, count 0 2006.229.02:39:07.63#ibcon#read 3, iclass 24, count 0 2006.229.02:39:07.63#ibcon#about to read 4, iclass 24, count 0 2006.229.02:39:07.63#ibcon#read 4, iclass 24, count 0 2006.229.02:39:07.63#ibcon#about to read 5, iclass 24, count 0 2006.229.02:39:07.63#ibcon#read 5, iclass 24, count 0 2006.229.02:39:07.63#ibcon#about to read 6, iclass 24, count 0 2006.229.02:39:07.63#ibcon#read 6, iclass 24, count 0 2006.229.02:39:07.63#ibcon#end of sib2, iclass 24, count 0 2006.229.02:39:07.63#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:39:07.63#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:39:07.63#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:39:07.63#ibcon#*before write, iclass 24, count 0 2006.229.02:39:07.63#ibcon#enter sib2, iclass 24, count 0 2006.229.02:39:07.63#ibcon#flushed, iclass 24, count 0 2006.229.02:39:07.63#ibcon#about to write, iclass 24, count 0 2006.229.02:39:07.63#ibcon#wrote, iclass 24, count 0 2006.229.02:39:07.63#ibcon#about to read 3, iclass 24, count 0 2006.229.02:39:07.67#ibcon#read 3, iclass 24, count 0 2006.229.02:39:07.67#ibcon#about to read 4, iclass 24, count 0 2006.229.02:39:07.67#ibcon#read 4, iclass 24, count 0 2006.229.02:39:07.67#ibcon#about to read 5, iclass 24, count 0 2006.229.02:39:07.67#ibcon#read 5, iclass 24, count 0 2006.229.02:39:07.67#ibcon#about to read 6, iclass 24, count 0 2006.229.02:39:07.67#ibcon#read 6, iclass 24, count 0 2006.229.02:39:07.67#ibcon#end of sib2, iclass 24, count 0 2006.229.02:39:07.67#ibcon#*after write, iclass 24, count 0 2006.229.02:39:07.67#ibcon#*before return 0, iclass 24, count 0 2006.229.02:39:07.67#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:39:07.67#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.02:39:07.67#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:39:07.67#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:39:07.68$vck44/va=6,4 2006.229.02:39:07.68#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.02:39:07.68#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.02:39:07.68#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:07.68#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:39:07.71#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:39:07.71#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:39:07.71#ibcon#enter wrdev, iclass 26, count 2 2006.229.02:39:07.71#ibcon#first serial, iclass 26, count 2 2006.229.02:39:07.71#ibcon#enter sib2, iclass 26, count 2 2006.229.02:39:07.71#ibcon#flushed, iclass 26, count 2 2006.229.02:39:07.71#ibcon#about to write, iclass 26, count 2 2006.229.02:39:07.71#ibcon#wrote, iclass 26, count 2 2006.229.02:39:07.71#ibcon#about to read 3, iclass 26, count 2 2006.229.02:39:07.73#ibcon#read 3, iclass 26, count 2 2006.229.02:39:07.73#ibcon#about to read 4, iclass 26, count 2 2006.229.02:39:07.73#ibcon#read 4, iclass 26, count 2 2006.229.02:39:07.73#ibcon#about to read 5, iclass 26, count 2 2006.229.02:39:07.73#ibcon#read 5, iclass 26, count 2 2006.229.02:39:07.73#ibcon#about to read 6, iclass 26, count 2 2006.229.02:39:07.73#ibcon#read 6, iclass 26, count 2 2006.229.02:39:07.73#ibcon#end of sib2, iclass 26, count 2 2006.229.02:39:07.73#ibcon#*mode == 0, iclass 26, count 2 2006.229.02:39:07.73#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.02:39:07.73#ibcon#[25=AT06-04\r\n] 2006.229.02:39:07.73#ibcon#*before write, iclass 26, count 2 2006.229.02:39:07.73#ibcon#enter sib2, iclass 26, count 2 2006.229.02:39:07.73#ibcon#flushed, iclass 26, count 2 2006.229.02:39:07.73#ibcon#about to write, iclass 26, count 2 2006.229.02:39:07.73#ibcon#wrote, iclass 26, count 2 2006.229.02:39:07.73#ibcon#about to read 3, iclass 26, count 2 2006.229.02:39:07.76#ibcon#read 3, iclass 26, count 2 2006.229.02:39:07.76#ibcon#about to read 4, iclass 26, count 2 2006.229.02:39:07.76#ibcon#read 4, iclass 26, count 2 2006.229.02:39:07.76#ibcon#about to read 5, iclass 26, count 2 2006.229.02:39:07.76#ibcon#read 5, iclass 26, count 2 2006.229.02:39:07.76#ibcon#about to read 6, iclass 26, count 2 2006.229.02:39:07.76#ibcon#read 6, iclass 26, count 2 2006.229.02:39:07.76#ibcon#end of sib2, iclass 26, count 2 2006.229.02:39:07.76#ibcon#*after write, iclass 26, count 2 2006.229.02:39:07.76#ibcon#*before return 0, iclass 26, count 2 2006.229.02:39:07.76#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:39:07.76#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.02:39:07.76#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.02:39:07.76#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:07.76#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:39:07.88#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:39:07.88#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:39:07.88#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:39:07.88#ibcon#first serial, iclass 26, count 0 2006.229.02:39:07.88#ibcon#enter sib2, iclass 26, count 0 2006.229.02:39:07.88#ibcon#flushed, iclass 26, count 0 2006.229.02:39:07.88#ibcon#about to write, iclass 26, count 0 2006.229.02:39:07.88#ibcon#wrote, iclass 26, count 0 2006.229.02:39:07.88#ibcon#about to read 3, iclass 26, count 0 2006.229.02:39:07.90#ibcon#read 3, iclass 26, count 0 2006.229.02:39:07.90#ibcon#about to read 4, iclass 26, count 0 2006.229.02:39:07.90#ibcon#read 4, iclass 26, count 0 2006.229.02:39:07.90#ibcon#about to read 5, iclass 26, count 0 2006.229.02:39:07.90#ibcon#read 5, iclass 26, count 0 2006.229.02:39:07.90#ibcon#about to read 6, iclass 26, count 0 2006.229.02:39:07.90#ibcon#read 6, iclass 26, count 0 2006.229.02:39:07.90#ibcon#end of sib2, iclass 26, count 0 2006.229.02:39:07.90#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:39:07.90#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:39:07.90#ibcon#[25=USB\r\n] 2006.229.02:39:07.90#ibcon#*before write, iclass 26, count 0 2006.229.02:39:07.90#ibcon#enter sib2, iclass 26, count 0 2006.229.02:39:07.90#ibcon#flushed, iclass 26, count 0 2006.229.02:39:07.90#ibcon#about to write, iclass 26, count 0 2006.229.02:39:07.90#ibcon#wrote, iclass 26, count 0 2006.229.02:39:07.90#ibcon#about to read 3, iclass 26, count 0 2006.229.02:39:07.93#ibcon#read 3, iclass 26, count 0 2006.229.02:39:07.93#ibcon#about to read 4, iclass 26, count 0 2006.229.02:39:07.93#ibcon#read 4, iclass 26, count 0 2006.229.02:39:07.93#ibcon#about to read 5, iclass 26, count 0 2006.229.02:39:07.93#ibcon#read 5, iclass 26, count 0 2006.229.02:39:07.93#ibcon#about to read 6, iclass 26, count 0 2006.229.02:39:07.93#ibcon#read 6, iclass 26, count 0 2006.229.02:39:07.93#ibcon#end of sib2, iclass 26, count 0 2006.229.02:39:07.93#ibcon#*after write, iclass 26, count 0 2006.229.02:39:07.93#ibcon#*before return 0, iclass 26, count 0 2006.229.02:39:07.93#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:39:07.93#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.02:39:07.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:39:07.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:39:07.94$vck44/valo=7,864.99 2006.229.02:39:07.94#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.02:39:07.94#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.02:39:07.94#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:07.94#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:07.94#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:07.94#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:07.94#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:39:07.94#ibcon#first serial, iclass 28, count 0 2006.229.02:39:07.94#ibcon#enter sib2, iclass 28, count 0 2006.229.02:39:07.94#ibcon#flushed, iclass 28, count 0 2006.229.02:39:07.94#ibcon#about to write, iclass 28, count 0 2006.229.02:39:07.94#ibcon#wrote, iclass 28, count 0 2006.229.02:39:07.94#ibcon#about to read 3, iclass 28, count 0 2006.229.02:39:07.95#ibcon#read 3, iclass 28, count 0 2006.229.02:39:07.95#ibcon#about to read 4, iclass 28, count 0 2006.229.02:39:07.95#ibcon#read 4, iclass 28, count 0 2006.229.02:39:07.95#ibcon#about to read 5, iclass 28, count 0 2006.229.02:39:07.95#ibcon#read 5, iclass 28, count 0 2006.229.02:39:07.95#ibcon#about to read 6, iclass 28, count 0 2006.229.02:39:07.95#ibcon#read 6, iclass 28, count 0 2006.229.02:39:07.95#ibcon#end of sib2, iclass 28, count 0 2006.229.02:39:07.95#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:39:07.95#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:39:07.95#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:39:07.95#ibcon#*before write, iclass 28, count 0 2006.229.02:39:07.95#ibcon#enter sib2, iclass 28, count 0 2006.229.02:39:07.95#ibcon#flushed, iclass 28, count 0 2006.229.02:39:07.95#ibcon#about to write, iclass 28, count 0 2006.229.02:39:07.95#ibcon#wrote, iclass 28, count 0 2006.229.02:39:07.95#ibcon#about to read 3, iclass 28, count 0 2006.229.02:39:08.00#ibcon#read 3, iclass 28, count 0 2006.229.02:39:08.00#ibcon#about to read 4, iclass 28, count 0 2006.229.02:39:08.00#ibcon#read 4, iclass 28, count 0 2006.229.02:39:08.00#ibcon#about to read 5, iclass 28, count 0 2006.229.02:39:08.00#ibcon#read 5, iclass 28, count 0 2006.229.02:39:08.00#ibcon#about to read 6, iclass 28, count 0 2006.229.02:39:08.00#ibcon#read 6, iclass 28, count 0 2006.229.02:39:08.00#ibcon#end of sib2, iclass 28, count 0 2006.229.02:39:08.00#ibcon#*after write, iclass 28, count 0 2006.229.02:39:08.00#ibcon#*before return 0, iclass 28, count 0 2006.229.02:39:08.00#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:08.00#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:08.00#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:39:08.00#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:39:08.00$vck44/va=7,5 2006.229.02:39:08.00#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.02:39:08.00#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.02:39:08.00#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:08.00#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:08.04#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:08.04#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:08.04#ibcon#enter wrdev, iclass 30, count 2 2006.229.02:39:08.04#ibcon#first serial, iclass 30, count 2 2006.229.02:39:08.04#ibcon#enter sib2, iclass 30, count 2 2006.229.02:39:08.04#ibcon#flushed, iclass 30, count 2 2006.229.02:39:08.04#ibcon#about to write, iclass 30, count 2 2006.229.02:39:08.04#ibcon#wrote, iclass 30, count 2 2006.229.02:39:08.04#ibcon#about to read 3, iclass 30, count 2 2006.229.02:39:08.06#ibcon#read 3, iclass 30, count 2 2006.229.02:39:08.06#ibcon#about to read 4, iclass 30, count 2 2006.229.02:39:08.06#ibcon#read 4, iclass 30, count 2 2006.229.02:39:08.06#ibcon#about to read 5, iclass 30, count 2 2006.229.02:39:08.06#ibcon#read 5, iclass 30, count 2 2006.229.02:39:08.06#ibcon#about to read 6, iclass 30, count 2 2006.229.02:39:08.06#ibcon#read 6, iclass 30, count 2 2006.229.02:39:08.06#ibcon#end of sib2, iclass 30, count 2 2006.229.02:39:08.06#ibcon#*mode == 0, iclass 30, count 2 2006.229.02:39:08.06#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.02:39:08.06#ibcon#[25=AT07-05\r\n] 2006.229.02:39:08.06#ibcon#*before write, iclass 30, count 2 2006.229.02:39:08.06#ibcon#enter sib2, iclass 30, count 2 2006.229.02:39:08.06#ibcon#flushed, iclass 30, count 2 2006.229.02:39:08.06#ibcon#about to write, iclass 30, count 2 2006.229.02:39:08.07#ibcon#wrote, iclass 30, count 2 2006.229.02:39:08.07#ibcon#about to read 3, iclass 30, count 2 2006.229.02:39:08.09#ibcon#read 3, iclass 30, count 2 2006.229.02:39:08.09#ibcon#about to read 4, iclass 30, count 2 2006.229.02:39:08.09#ibcon#read 4, iclass 30, count 2 2006.229.02:39:08.09#ibcon#about to read 5, iclass 30, count 2 2006.229.02:39:08.09#ibcon#read 5, iclass 30, count 2 2006.229.02:39:08.09#ibcon#about to read 6, iclass 30, count 2 2006.229.02:39:08.09#ibcon#read 6, iclass 30, count 2 2006.229.02:39:08.09#ibcon#end of sib2, iclass 30, count 2 2006.229.02:39:08.09#ibcon#*after write, iclass 30, count 2 2006.229.02:39:08.09#ibcon#*before return 0, iclass 30, count 2 2006.229.02:39:08.09#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:08.09#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:08.09#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.02:39:08.09#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:08.09#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:08.21#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:08.21#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:08.21#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:39:08.21#ibcon#first serial, iclass 30, count 0 2006.229.02:39:08.21#ibcon#enter sib2, iclass 30, count 0 2006.229.02:39:08.21#ibcon#flushed, iclass 30, count 0 2006.229.02:39:08.21#ibcon#about to write, iclass 30, count 0 2006.229.02:39:08.21#ibcon#wrote, iclass 30, count 0 2006.229.02:39:08.21#ibcon#about to read 3, iclass 30, count 0 2006.229.02:39:08.23#ibcon#read 3, iclass 30, count 0 2006.229.02:39:08.23#ibcon#about to read 4, iclass 30, count 0 2006.229.02:39:08.23#ibcon#read 4, iclass 30, count 0 2006.229.02:39:08.23#ibcon#about to read 5, iclass 30, count 0 2006.229.02:39:08.23#ibcon#read 5, iclass 30, count 0 2006.229.02:39:08.23#ibcon#about to read 6, iclass 30, count 0 2006.229.02:39:08.23#ibcon#read 6, iclass 30, count 0 2006.229.02:39:08.23#ibcon#end of sib2, iclass 30, count 0 2006.229.02:39:08.23#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:39:08.23#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:39:08.23#ibcon#[25=USB\r\n] 2006.229.02:39:08.23#ibcon#*before write, iclass 30, count 0 2006.229.02:39:08.23#ibcon#enter sib2, iclass 30, count 0 2006.229.02:39:08.23#ibcon#flushed, iclass 30, count 0 2006.229.02:39:08.23#ibcon#about to write, iclass 30, count 0 2006.229.02:39:08.23#ibcon#wrote, iclass 30, count 0 2006.229.02:39:08.23#ibcon#about to read 3, iclass 30, count 0 2006.229.02:39:08.26#ibcon#read 3, iclass 30, count 0 2006.229.02:39:08.26#ibcon#about to read 4, iclass 30, count 0 2006.229.02:39:08.26#ibcon#read 4, iclass 30, count 0 2006.229.02:39:08.26#ibcon#about to read 5, iclass 30, count 0 2006.229.02:39:08.26#ibcon#read 5, iclass 30, count 0 2006.229.02:39:08.26#ibcon#about to read 6, iclass 30, count 0 2006.229.02:39:08.26#ibcon#read 6, iclass 30, count 0 2006.229.02:39:08.26#ibcon#end of sib2, iclass 30, count 0 2006.229.02:39:08.26#ibcon#*after write, iclass 30, count 0 2006.229.02:39:08.26#ibcon#*before return 0, iclass 30, count 0 2006.229.02:39:08.26#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:08.26#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:08.26#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:39:08.26#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:39:08.27$vck44/valo=8,884.99 2006.229.02:39:08.27#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.02:39:08.27#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.02:39:08.27#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:08.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:08.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:08.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:08.27#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:39:08.27#ibcon#first serial, iclass 32, count 0 2006.229.02:39:08.27#ibcon#enter sib2, iclass 32, count 0 2006.229.02:39:08.27#ibcon#flushed, iclass 32, count 0 2006.229.02:39:08.27#ibcon#about to write, iclass 32, count 0 2006.229.02:39:08.27#ibcon#wrote, iclass 32, count 0 2006.229.02:39:08.27#ibcon#about to read 3, iclass 32, count 0 2006.229.02:39:08.28#ibcon#read 3, iclass 32, count 0 2006.229.02:39:08.28#ibcon#about to read 4, iclass 32, count 0 2006.229.02:39:08.28#ibcon#read 4, iclass 32, count 0 2006.229.02:39:08.28#ibcon#about to read 5, iclass 32, count 0 2006.229.02:39:08.28#ibcon#read 5, iclass 32, count 0 2006.229.02:39:08.28#ibcon#about to read 6, iclass 32, count 0 2006.229.02:39:08.28#ibcon#read 6, iclass 32, count 0 2006.229.02:39:08.28#ibcon#end of sib2, iclass 32, count 0 2006.229.02:39:08.28#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:39:08.28#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:39:08.28#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:39:08.28#ibcon#*before write, iclass 32, count 0 2006.229.02:39:08.28#ibcon#enter sib2, iclass 32, count 0 2006.229.02:39:08.28#ibcon#flushed, iclass 32, count 0 2006.229.02:39:08.28#ibcon#about to write, iclass 32, count 0 2006.229.02:39:08.28#ibcon#wrote, iclass 32, count 0 2006.229.02:39:08.28#ibcon#about to read 3, iclass 32, count 0 2006.229.02:39:08.32#ibcon#read 3, iclass 32, count 0 2006.229.02:39:08.32#ibcon#about to read 4, iclass 32, count 0 2006.229.02:39:08.32#ibcon#read 4, iclass 32, count 0 2006.229.02:39:08.32#ibcon#about to read 5, iclass 32, count 0 2006.229.02:39:08.32#ibcon#read 5, iclass 32, count 0 2006.229.02:39:08.32#ibcon#about to read 6, iclass 32, count 0 2006.229.02:39:08.32#ibcon#read 6, iclass 32, count 0 2006.229.02:39:08.32#ibcon#end of sib2, iclass 32, count 0 2006.229.02:39:08.32#ibcon#*after write, iclass 32, count 0 2006.229.02:39:08.32#ibcon#*before return 0, iclass 32, count 0 2006.229.02:39:08.32#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:08.32#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:08.32#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:39:08.32#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:39:08.33$vck44/va=8,6 2006.229.02:39:08.33#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.02:39:08.33#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.02:39:08.33#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:08.33#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:08.37#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:08.37#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:08.37#ibcon#enter wrdev, iclass 34, count 2 2006.229.02:39:08.37#ibcon#first serial, iclass 34, count 2 2006.229.02:39:08.37#ibcon#enter sib2, iclass 34, count 2 2006.229.02:39:08.37#ibcon#flushed, iclass 34, count 2 2006.229.02:39:08.37#ibcon#about to write, iclass 34, count 2 2006.229.02:39:08.37#ibcon#wrote, iclass 34, count 2 2006.229.02:39:08.37#ibcon#about to read 3, iclass 34, count 2 2006.229.02:39:08.39#ibcon#read 3, iclass 34, count 2 2006.229.02:39:08.39#ibcon#about to read 4, iclass 34, count 2 2006.229.02:39:08.39#ibcon#read 4, iclass 34, count 2 2006.229.02:39:08.39#ibcon#about to read 5, iclass 34, count 2 2006.229.02:39:08.39#ibcon#read 5, iclass 34, count 2 2006.229.02:39:08.39#ibcon#about to read 6, iclass 34, count 2 2006.229.02:39:08.39#ibcon#read 6, iclass 34, count 2 2006.229.02:39:08.39#ibcon#end of sib2, iclass 34, count 2 2006.229.02:39:08.39#ibcon#*mode == 0, iclass 34, count 2 2006.229.02:39:08.39#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.02:39:08.39#ibcon#[25=AT08-06\r\n] 2006.229.02:39:08.39#ibcon#*before write, iclass 34, count 2 2006.229.02:39:08.39#ibcon#enter sib2, iclass 34, count 2 2006.229.02:39:08.39#ibcon#flushed, iclass 34, count 2 2006.229.02:39:08.39#ibcon#about to write, iclass 34, count 2 2006.229.02:39:08.39#ibcon#wrote, iclass 34, count 2 2006.229.02:39:08.40#ibcon#about to read 3, iclass 34, count 2 2006.229.02:39:08.42#ibcon#read 3, iclass 34, count 2 2006.229.02:39:08.42#ibcon#about to read 4, iclass 34, count 2 2006.229.02:39:08.42#ibcon#read 4, iclass 34, count 2 2006.229.02:39:08.42#ibcon#about to read 5, iclass 34, count 2 2006.229.02:39:08.42#ibcon#read 5, iclass 34, count 2 2006.229.02:39:08.42#ibcon#about to read 6, iclass 34, count 2 2006.229.02:39:08.42#ibcon#read 6, iclass 34, count 2 2006.229.02:39:08.42#ibcon#end of sib2, iclass 34, count 2 2006.229.02:39:08.42#ibcon#*after write, iclass 34, count 2 2006.229.02:39:08.42#ibcon#*before return 0, iclass 34, count 2 2006.229.02:39:08.42#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:08.42#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:08.42#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.02:39:08.42#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:08.42#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:08.54#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:08.54#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:08.54#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:39:08.54#ibcon#first serial, iclass 34, count 0 2006.229.02:39:08.54#ibcon#enter sib2, iclass 34, count 0 2006.229.02:39:08.54#ibcon#flushed, iclass 34, count 0 2006.229.02:39:08.54#ibcon#about to write, iclass 34, count 0 2006.229.02:39:08.54#ibcon#wrote, iclass 34, count 0 2006.229.02:39:08.54#ibcon#about to read 3, iclass 34, count 0 2006.229.02:39:08.56#ibcon#read 3, iclass 34, count 0 2006.229.02:39:08.56#ibcon#about to read 4, iclass 34, count 0 2006.229.02:39:08.56#ibcon#read 4, iclass 34, count 0 2006.229.02:39:08.56#ibcon#about to read 5, iclass 34, count 0 2006.229.02:39:08.56#ibcon#read 5, iclass 34, count 0 2006.229.02:39:08.56#ibcon#about to read 6, iclass 34, count 0 2006.229.02:39:08.56#ibcon#read 6, iclass 34, count 0 2006.229.02:39:08.56#ibcon#end of sib2, iclass 34, count 0 2006.229.02:39:08.56#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:39:08.56#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:39:08.56#ibcon#[25=USB\r\n] 2006.229.02:39:08.56#ibcon#*before write, iclass 34, count 0 2006.229.02:39:08.56#ibcon#enter sib2, iclass 34, count 0 2006.229.02:39:08.56#ibcon#flushed, iclass 34, count 0 2006.229.02:39:08.56#ibcon#about to write, iclass 34, count 0 2006.229.02:39:08.56#ibcon#wrote, iclass 34, count 0 2006.229.02:39:08.56#ibcon#about to read 3, iclass 34, count 0 2006.229.02:39:08.59#ibcon#read 3, iclass 34, count 0 2006.229.02:39:08.59#ibcon#about to read 4, iclass 34, count 0 2006.229.02:39:08.59#ibcon#read 4, iclass 34, count 0 2006.229.02:39:08.59#ibcon#about to read 5, iclass 34, count 0 2006.229.02:39:08.59#ibcon#read 5, iclass 34, count 0 2006.229.02:39:08.59#ibcon#about to read 6, iclass 34, count 0 2006.229.02:39:08.59#ibcon#read 6, iclass 34, count 0 2006.229.02:39:08.59#ibcon#end of sib2, iclass 34, count 0 2006.229.02:39:08.59#ibcon#*after write, iclass 34, count 0 2006.229.02:39:08.59#ibcon#*before return 0, iclass 34, count 0 2006.229.02:39:08.59#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:08.59#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:08.59#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:39:08.59#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:39:08.60$vck44/vblo=1,629.99 2006.229.02:39:08.60#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.02:39:08.60#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.02:39:08.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:08.60#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:08.60#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:08.60#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:08.60#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:39:08.60#ibcon#first serial, iclass 36, count 0 2006.229.02:39:08.60#ibcon#enter sib2, iclass 36, count 0 2006.229.02:39:08.60#ibcon#flushed, iclass 36, count 0 2006.229.02:39:08.60#ibcon#about to write, iclass 36, count 0 2006.229.02:39:08.60#ibcon#wrote, iclass 36, count 0 2006.229.02:39:08.60#ibcon#about to read 3, iclass 36, count 0 2006.229.02:39:08.61#ibcon#read 3, iclass 36, count 0 2006.229.02:39:08.61#ibcon#about to read 4, iclass 36, count 0 2006.229.02:39:08.61#ibcon#read 4, iclass 36, count 0 2006.229.02:39:08.61#ibcon#about to read 5, iclass 36, count 0 2006.229.02:39:08.61#ibcon#read 5, iclass 36, count 0 2006.229.02:39:08.61#ibcon#about to read 6, iclass 36, count 0 2006.229.02:39:08.61#ibcon#read 6, iclass 36, count 0 2006.229.02:39:08.61#ibcon#end of sib2, iclass 36, count 0 2006.229.02:39:08.61#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:39:08.61#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:39:08.61#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:39:08.61#ibcon#*before write, iclass 36, count 0 2006.229.02:39:08.61#ibcon#enter sib2, iclass 36, count 0 2006.229.02:39:08.61#ibcon#flushed, iclass 36, count 0 2006.229.02:39:08.61#ibcon#about to write, iclass 36, count 0 2006.229.02:39:08.61#ibcon#wrote, iclass 36, count 0 2006.229.02:39:08.61#ibcon#about to read 3, iclass 36, count 0 2006.229.02:39:08.65#ibcon#read 3, iclass 36, count 0 2006.229.02:39:08.65#ibcon#about to read 4, iclass 36, count 0 2006.229.02:39:08.65#ibcon#read 4, iclass 36, count 0 2006.229.02:39:08.65#ibcon#about to read 5, iclass 36, count 0 2006.229.02:39:08.65#ibcon#read 5, iclass 36, count 0 2006.229.02:39:08.65#ibcon#about to read 6, iclass 36, count 0 2006.229.02:39:08.65#ibcon#read 6, iclass 36, count 0 2006.229.02:39:08.65#ibcon#end of sib2, iclass 36, count 0 2006.229.02:39:08.65#ibcon#*after write, iclass 36, count 0 2006.229.02:39:08.65#ibcon#*before return 0, iclass 36, count 0 2006.229.02:39:08.65#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:08.65#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:08.65#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:39:08.65#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:39:08.66$vck44/vb=1,4 2006.229.02:39:08.66#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.02:39:08.66#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.02:39:08.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:08.66#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:39:08.66#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:39:08.66#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:39:08.66#ibcon#enter wrdev, iclass 38, count 2 2006.229.02:39:08.66#ibcon#first serial, iclass 38, count 2 2006.229.02:39:08.66#ibcon#enter sib2, iclass 38, count 2 2006.229.02:39:08.66#ibcon#flushed, iclass 38, count 2 2006.229.02:39:08.66#ibcon#about to write, iclass 38, count 2 2006.229.02:39:08.66#ibcon#wrote, iclass 38, count 2 2006.229.02:39:08.66#ibcon#about to read 3, iclass 38, count 2 2006.229.02:39:08.67#ibcon#read 3, iclass 38, count 2 2006.229.02:39:08.67#ibcon#about to read 4, iclass 38, count 2 2006.229.02:39:08.67#ibcon#read 4, iclass 38, count 2 2006.229.02:39:08.67#ibcon#about to read 5, iclass 38, count 2 2006.229.02:39:08.67#ibcon#read 5, iclass 38, count 2 2006.229.02:39:08.67#ibcon#about to read 6, iclass 38, count 2 2006.229.02:39:08.67#ibcon#read 6, iclass 38, count 2 2006.229.02:39:08.67#ibcon#end of sib2, iclass 38, count 2 2006.229.02:39:08.67#ibcon#*mode == 0, iclass 38, count 2 2006.229.02:39:08.67#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.02:39:08.67#ibcon#[27=AT01-04\r\n] 2006.229.02:39:08.67#ibcon#*before write, iclass 38, count 2 2006.229.02:39:08.67#ibcon#enter sib2, iclass 38, count 2 2006.229.02:39:08.67#ibcon#flushed, iclass 38, count 2 2006.229.02:39:08.67#ibcon#about to write, iclass 38, count 2 2006.229.02:39:08.67#ibcon#wrote, iclass 38, count 2 2006.229.02:39:08.67#ibcon#about to read 3, iclass 38, count 2 2006.229.02:39:08.70#ibcon#read 3, iclass 38, count 2 2006.229.02:39:08.70#ibcon#about to read 4, iclass 38, count 2 2006.229.02:39:08.70#ibcon#read 4, iclass 38, count 2 2006.229.02:39:08.70#ibcon#about to read 5, iclass 38, count 2 2006.229.02:39:08.70#ibcon#read 5, iclass 38, count 2 2006.229.02:39:08.70#ibcon#about to read 6, iclass 38, count 2 2006.229.02:39:08.70#ibcon#read 6, iclass 38, count 2 2006.229.02:39:08.70#ibcon#end of sib2, iclass 38, count 2 2006.229.02:39:08.70#ibcon#*after write, iclass 38, count 2 2006.229.02:39:08.70#ibcon#*before return 0, iclass 38, count 2 2006.229.02:39:08.70#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:39:08.70#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.02:39:08.70#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.02:39:08.70#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:08.70#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:39:08.82#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:39:08.82#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:39:08.82#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:39:08.82#ibcon#first serial, iclass 38, count 0 2006.229.02:39:08.82#ibcon#enter sib2, iclass 38, count 0 2006.229.02:39:08.82#ibcon#flushed, iclass 38, count 0 2006.229.02:39:08.82#ibcon#about to write, iclass 38, count 0 2006.229.02:39:08.82#ibcon#wrote, iclass 38, count 0 2006.229.02:39:08.82#ibcon#about to read 3, iclass 38, count 0 2006.229.02:39:08.84#ibcon#read 3, iclass 38, count 0 2006.229.02:39:08.84#ibcon#about to read 4, iclass 38, count 0 2006.229.02:39:08.84#ibcon#read 4, iclass 38, count 0 2006.229.02:39:08.84#ibcon#about to read 5, iclass 38, count 0 2006.229.02:39:08.84#ibcon#read 5, iclass 38, count 0 2006.229.02:39:08.84#ibcon#about to read 6, iclass 38, count 0 2006.229.02:39:08.84#ibcon#read 6, iclass 38, count 0 2006.229.02:39:08.84#ibcon#end of sib2, iclass 38, count 0 2006.229.02:39:08.84#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:39:08.84#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:39:08.84#ibcon#[27=USB\r\n] 2006.229.02:39:08.84#ibcon#*before write, iclass 38, count 0 2006.229.02:39:08.84#ibcon#enter sib2, iclass 38, count 0 2006.229.02:39:08.84#ibcon#flushed, iclass 38, count 0 2006.229.02:39:08.84#ibcon#about to write, iclass 38, count 0 2006.229.02:39:08.84#ibcon#wrote, iclass 38, count 0 2006.229.02:39:08.84#ibcon#about to read 3, iclass 38, count 0 2006.229.02:39:08.87#ibcon#read 3, iclass 38, count 0 2006.229.02:39:08.87#ibcon#about to read 4, iclass 38, count 0 2006.229.02:39:08.87#ibcon#read 4, iclass 38, count 0 2006.229.02:39:08.87#ibcon#about to read 5, iclass 38, count 0 2006.229.02:39:08.87#ibcon#read 5, iclass 38, count 0 2006.229.02:39:08.87#ibcon#about to read 6, iclass 38, count 0 2006.229.02:39:08.87#ibcon#read 6, iclass 38, count 0 2006.229.02:39:08.87#ibcon#end of sib2, iclass 38, count 0 2006.229.02:39:08.87#ibcon#*after write, iclass 38, count 0 2006.229.02:39:08.87#ibcon#*before return 0, iclass 38, count 0 2006.229.02:39:08.87#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:39:08.87#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.02:39:08.87#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:39:08.87#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:39:08.88$vck44/vblo=2,634.99 2006.229.02:39:08.88#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.02:39:08.88#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.02:39:08.88#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:08.88#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:08.88#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:08.88#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:08.88#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:39:08.88#ibcon#first serial, iclass 40, count 0 2006.229.02:39:08.88#ibcon#enter sib2, iclass 40, count 0 2006.229.02:39:08.88#ibcon#flushed, iclass 40, count 0 2006.229.02:39:08.88#ibcon#about to write, iclass 40, count 0 2006.229.02:39:08.88#ibcon#wrote, iclass 40, count 0 2006.229.02:39:08.88#ibcon#about to read 3, iclass 40, count 0 2006.229.02:39:08.89#ibcon#read 3, iclass 40, count 0 2006.229.02:39:08.89#ibcon#about to read 4, iclass 40, count 0 2006.229.02:39:08.89#ibcon#read 4, iclass 40, count 0 2006.229.02:39:08.89#ibcon#about to read 5, iclass 40, count 0 2006.229.02:39:08.89#ibcon#read 5, iclass 40, count 0 2006.229.02:39:08.89#ibcon#about to read 6, iclass 40, count 0 2006.229.02:39:08.89#ibcon#read 6, iclass 40, count 0 2006.229.02:39:08.89#ibcon#end of sib2, iclass 40, count 0 2006.229.02:39:08.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:39:08.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:39:08.89#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:39:08.89#ibcon#*before write, iclass 40, count 0 2006.229.02:39:08.89#ibcon#enter sib2, iclass 40, count 0 2006.229.02:39:08.89#ibcon#flushed, iclass 40, count 0 2006.229.02:39:08.89#ibcon#about to write, iclass 40, count 0 2006.229.02:39:08.89#ibcon#wrote, iclass 40, count 0 2006.229.02:39:08.89#ibcon#about to read 3, iclass 40, count 0 2006.229.02:39:08.93#ibcon#read 3, iclass 40, count 0 2006.229.02:39:08.93#ibcon#about to read 4, iclass 40, count 0 2006.229.02:39:08.93#ibcon#read 4, iclass 40, count 0 2006.229.02:39:08.93#ibcon#about to read 5, iclass 40, count 0 2006.229.02:39:08.93#ibcon#read 5, iclass 40, count 0 2006.229.02:39:08.93#ibcon#about to read 6, iclass 40, count 0 2006.229.02:39:08.93#ibcon#read 6, iclass 40, count 0 2006.229.02:39:08.93#ibcon#end of sib2, iclass 40, count 0 2006.229.02:39:08.93#ibcon#*after write, iclass 40, count 0 2006.229.02:39:08.93#ibcon#*before return 0, iclass 40, count 0 2006.229.02:39:08.93#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:08.93#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.02:39:08.93#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:39:08.93#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:39:08.94$vck44/vb=2,4 2006.229.02:39:08.94#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.02:39:08.94#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.02:39:08.94#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:08.94#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:08.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:08.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:08.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.02:39:08.98#ibcon#first serial, iclass 4, count 2 2006.229.02:39:08.98#ibcon#enter sib2, iclass 4, count 2 2006.229.02:39:08.98#ibcon#flushed, iclass 4, count 2 2006.229.02:39:08.98#ibcon#about to write, iclass 4, count 2 2006.229.02:39:08.98#ibcon#wrote, iclass 4, count 2 2006.229.02:39:08.98#ibcon#about to read 3, iclass 4, count 2 2006.229.02:39:09.00#ibcon#read 3, iclass 4, count 2 2006.229.02:39:09.00#ibcon#about to read 4, iclass 4, count 2 2006.229.02:39:09.00#ibcon#read 4, iclass 4, count 2 2006.229.02:39:09.00#ibcon#about to read 5, iclass 4, count 2 2006.229.02:39:09.00#ibcon#read 5, iclass 4, count 2 2006.229.02:39:09.00#ibcon#about to read 6, iclass 4, count 2 2006.229.02:39:09.00#ibcon#read 6, iclass 4, count 2 2006.229.02:39:09.00#ibcon#end of sib2, iclass 4, count 2 2006.229.02:39:09.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.02:39:09.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.02:39:09.00#ibcon#[27=AT02-04\r\n] 2006.229.02:39:09.00#ibcon#*before write, iclass 4, count 2 2006.229.02:39:09.00#ibcon#enter sib2, iclass 4, count 2 2006.229.02:39:09.00#ibcon#flushed, iclass 4, count 2 2006.229.02:39:09.00#ibcon#about to write, iclass 4, count 2 2006.229.02:39:09.00#ibcon#wrote, iclass 4, count 2 2006.229.02:39:09.00#ibcon#about to read 3, iclass 4, count 2 2006.229.02:39:09.03#ibcon#read 3, iclass 4, count 2 2006.229.02:39:09.03#ibcon#about to read 4, iclass 4, count 2 2006.229.02:39:09.03#ibcon#read 4, iclass 4, count 2 2006.229.02:39:09.03#ibcon#about to read 5, iclass 4, count 2 2006.229.02:39:09.03#ibcon#read 5, iclass 4, count 2 2006.229.02:39:09.03#ibcon#about to read 6, iclass 4, count 2 2006.229.02:39:09.03#ibcon#read 6, iclass 4, count 2 2006.229.02:39:09.03#ibcon#end of sib2, iclass 4, count 2 2006.229.02:39:09.03#ibcon#*after write, iclass 4, count 2 2006.229.02:39:09.03#ibcon#*before return 0, iclass 4, count 2 2006.229.02:39:09.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:09.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.02:39:09.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.02:39:09.03#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:09.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:09.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:09.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:09.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:39:09.15#ibcon#first serial, iclass 4, count 0 2006.229.02:39:09.15#ibcon#enter sib2, iclass 4, count 0 2006.229.02:39:09.15#ibcon#flushed, iclass 4, count 0 2006.229.02:39:09.15#ibcon#about to write, iclass 4, count 0 2006.229.02:39:09.15#ibcon#wrote, iclass 4, count 0 2006.229.02:39:09.15#ibcon#about to read 3, iclass 4, count 0 2006.229.02:39:09.17#ibcon#read 3, iclass 4, count 0 2006.229.02:39:09.17#ibcon#about to read 4, iclass 4, count 0 2006.229.02:39:09.17#ibcon#read 4, iclass 4, count 0 2006.229.02:39:09.17#ibcon#about to read 5, iclass 4, count 0 2006.229.02:39:09.17#ibcon#read 5, iclass 4, count 0 2006.229.02:39:09.17#ibcon#about to read 6, iclass 4, count 0 2006.229.02:39:09.17#ibcon#read 6, iclass 4, count 0 2006.229.02:39:09.17#ibcon#end of sib2, iclass 4, count 0 2006.229.02:39:09.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:39:09.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:39:09.17#ibcon#[27=USB\r\n] 2006.229.02:39:09.17#ibcon#*before write, iclass 4, count 0 2006.229.02:39:09.17#ibcon#enter sib2, iclass 4, count 0 2006.229.02:39:09.17#ibcon#flushed, iclass 4, count 0 2006.229.02:39:09.17#ibcon#about to write, iclass 4, count 0 2006.229.02:39:09.17#ibcon#wrote, iclass 4, count 0 2006.229.02:39:09.17#ibcon#about to read 3, iclass 4, count 0 2006.229.02:39:09.20#ibcon#read 3, iclass 4, count 0 2006.229.02:39:09.20#ibcon#about to read 4, iclass 4, count 0 2006.229.02:39:09.20#ibcon#read 4, iclass 4, count 0 2006.229.02:39:09.20#ibcon#about to read 5, iclass 4, count 0 2006.229.02:39:09.20#ibcon#read 5, iclass 4, count 0 2006.229.02:39:09.20#ibcon#about to read 6, iclass 4, count 0 2006.229.02:39:09.20#ibcon#read 6, iclass 4, count 0 2006.229.02:39:09.20#ibcon#end of sib2, iclass 4, count 0 2006.229.02:39:09.20#ibcon#*after write, iclass 4, count 0 2006.229.02:39:09.20#ibcon#*before return 0, iclass 4, count 0 2006.229.02:39:09.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:09.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.02:39:09.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:39:09.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:39:09.21$vck44/vblo=3,649.99 2006.229.02:39:09.21#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.02:39:09.21#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.02:39:09.21#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:09.21#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:09.21#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:09.21#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:09.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:39:09.21#ibcon#first serial, iclass 6, count 0 2006.229.02:39:09.21#ibcon#enter sib2, iclass 6, count 0 2006.229.02:39:09.21#ibcon#flushed, iclass 6, count 0 2006.229.02:39:09.21#ibcon#about to write, iclass 6, count 0 2006.229.02:39:09.21#ibcon#wrote, iclass 6, count 0 2006.229.02:39:09.21#ibcon#about to read 3, iclass 6, count 0 2006.229.02:39:09.22#ibcon#read 3, iclass 6, count 0 2006.229.02:39:09.22#ibcon#about to read 4, iclass 6, count 0 2006.229.02:39:09.22#ibcon#read 4, iclass 6, count 0 2006.229.02:39:09.22#ibcon#about to read 5, iclass 6, count 0 2006.229.02:39:09.22#ibcon#read 5, iclass 6, count 0 2006.229.02:39:09.22#ibcon#about to read 6, iclass 6, count 0 2006.229.02:39:09.22#ibcon#read 6, iclass 6, count 0 2006.229.02:39:09.22#ibcon#end of sib2, iclass 6, count 0 2006.229.02:39:09.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:39:09.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:39:09.22#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:39:09.22#ibcon#*before write, iclass 6, count 0 2006.229.02:39:09.22#ibcon#enter sib2, iclass 6, count 0 2006.229.02:39:09.22#ibcon#flushed, iclass 6, count 0 2006.229.02:39:09.22#ibcon#about to write, iclass 6, count 0 2006.229.02:39:09.23#ibcon#wrote, iclass 6, count 0 2006.229.02:39:09.23#ibcon#about to read 3, iclass 6, count 0 2006.229.02:39:09.26#ibcon#read 3, iclass 6, count 0 2006.229.02:39:09.26#ibcon#about to read 4, iclass 6, count 0 2006.229.02:39:09.26#ibcon#read 4, iclass 6, count 0 2006.229.02:39:09.26#ibcon#about to read 5, iclass 6, count 0 2006.229.02:39:09.26#ibcon#read 5, iclass 6, count 0 2006.229.02:39:09.26#ibcon#about to read 6, iclass 6, count 0 2006.229.02:39:09.26#ibcon#read 6, iclass 6, count 0 2006.229.02:39:09.26#ibcon#end of sib2, iclass 6, count 0 2006.229.02:39:09.26#ibcon#*after write, iclass 6, count 0 2006.229.02:39:09.26#ibcon#*before return 0, iclass 6, count 0 2006.229.02:39:09.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:09.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.02:39:09.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:39:09.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:39:09.27$vck44/vb=3,4 2006.229.02:39:09.27#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.02:39:09.27#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.02:39:09.27#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:09.27#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:09.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:09.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:09.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.02:39:09.32#ibcon#first serial, iclass 10, count 2 2006.229.02:39:09.32#ibcon#enter sib2, iclass 10, count 2 2006.229.02:39:09.32#ibcon#flushed, iclass 10, count 2 2006.229.02:39:09.32#ibcon#about to write, iclass 10, count 2 2006.229.02:39:09.32#ibcon#wrote, iclass 10, count 2 2006.229.02:39:09.32#ibcon#about to read 3, iclass 10, count 2 2006.229.02:39:09.33#ibcon#read 3, iclass 10, count 2 2006.229.02:39:09.33#ibcon#about to read 4, iclass 10, count 2 2006.229.02:39:09.33#ibcon#read 4, iclass 10, count 2 2006.229.02:39:09.33#ibcon#about to read 5, iclass 10, count 2 2006.229.02:39:09.33#ibcon#read 5, iclass 10, count 2 2006.229.02:39:09.33#ibcon#about to read 6, iclass 10, count 2 2006.229.02:39:09.33#ibcon#read 6, iclass 10, count 2 2006.229.02:39:09.33#ibcon#end of sib2, iclass 10, count 2 2006.229.02:39:09.33#ibcon#*mode == 0, iclass 10, count 2 2006.229.02:39:09.33#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.02:39:09.33#ibcon#[27=AT03-04\r\n] 2006.229.02:39:09.33#ibcon#*before write, iclass 10, count 2 2006.229.02:39:09.33#ibcon#enter sib2, iclass 10, count 2 2006.229.02:39:09.33#ibcon#flushed, iclass 10, count 2 2006.229.02:39:09.33#ibcon#about to write, iclass 10, count 2 2006.229.02:39:09.33#ibcon#wrote, iclass 10, count 2 2006.229.02:39:09.33#ibcon#about to read 3, iclass 10, count 2 2006.229.02:39:09.36#ibcon#read 3, iclass 10, count 2 2006.229.02:39:09.36#ibcon#about to read 4, iclass 10, count 2 2006.229.02:39:09.36#ibcon#read 4, iclass 10, count 2 2006.229.02:39:09.36#ibcon#about to read 5, iclass 10, count 2 2006.229.02:39:09.36#ibcon#read 5, iclass 10, count 2 2006.229.02:39:09.36#ibcon#about to read 6, iclass 10, count 2 2006.229.02:39:09.36#ibcon#read 6, iclass 10, count 2 2006.229.02:39:09.36#ibcon#end of sib2, iclass 10, count 2 2006.229.02:39:09.36#ibcon#*after write, iclass 10, count 2 2006.229.02:39:09.36#ibcon#*before return 0, iclass 10, count 2 2006.229.02:39:09.36#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:09.36#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.02:39:09.36#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.02:39:09.36#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:09.36#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:09.48#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:09.48#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:09.48#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:39:09.48#ibcon#first serial, iclass 10, count 0 2006.229.02:39:09.48#ibcon#enter sib2, iclass 10, count 0 2006.229.02:39:09.48#ibcon#flushed, iclass 10, count 0 2006.229.02:39:09.48#ibcon#about to write, iclass 10, count 0 2006.229.02:39:09.48#ibcon#wrote, iclass 10, count 0 2006.229.02:39:09.48#ibcon#about to read 3, iclass 10, count 0 2006.229.02:39:09.50#ibcon#read 3, iclass 10, count 0 2006.229.02:39:09.50#ibcon#about to read 4, iclass 10, count 0 2006.229.02:39:09.50#ibcon#read 4, iclass 10, count 0 2006.229.02:39:09.50#ibcon#about to read 5, iclass 10, count 0 2006.229.02:39:09.50#ibcon#read 5, iclass 10, count 0 2006.229.02:39:09.50#ibcon#about to read 6, iclass 10, count 0 2006.229.02:39:09.50#ibcon#read 6, iclass 10, count 0 2006.229.02:39:09.50#ibcon#end of sib2, iclass 10, count 0 2006.229.02:39:09.50#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:39:09.50#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:39:09.50#ibcon#[27=USB\r\n] 2006.229.02:39:09.50#ibcon#*before write, iclass 10, count 0 2006.229.02:39:09.50#ibcon#enter sib2, iclass 10, count 0 2006.229.02:39:09.50#ibcon#flushed, iclass 10, count 0 2006.229.02:39:09.50#ibcon#about to write, iclass 10, count 0 2006.229.02:39:09.50#ibcon#wrote, iclass 10, count 0 2006.229.02:39:09.50#ibcon#about to read 3, iclass 10, count 0 2006.229.02:39:09.53#ibcon#read 3, iclass 10, count 0 2006.229.02:39:09.53#ibcon#about to read 4, iclass 10, count 0 2006.229.02:39:09.53#ibcon#read 4, iclass 10, count 0 2006.229.02:39:09.53#ibcon#about to read 5, iclass 10, count 0 2006.229.02:39:09.53#ibcon#read 5, iclass 10, count 0 2006.229.02:39:09.53#ibcon#about to read 6, iclass 10, count 0 2006.229.02:39:09.53#ibcon#read 6, iclass 10, count 0 2006.229.02:39:09.53#ibcon#end of sib2, iclass 10, count 0 2006.229.02:39:09.53#ibcon#*after write, iclass 10, count 0 2006.229.02:39:09.53#ibcon#*before return 0, iclass 10, count 0 2006.229.02:39:09.53#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:09.53#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.02:39:09.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:39:09.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:39:09.54$vck44/vblo=4,679.99 2006.229.02:39:09.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.02:39:09.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.02:39:09.54#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:09.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:09.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:09.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:09.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:39:09.54#ibcon#first serial, iclass 12, count 0 2006.229.02:39:09.54#ibcon#enter sib2, iclass 12, count 0 2006.229.02:39:09.54#ibcon#flushed, iclass 12, count 0 2006.229.02:39:09.54#ibcon#about to write, iclass 12, count 0 2006.229.02:39:09.54#ibcon#wrote, iclass 12, count 0 2006.229.02:39:09.54#ibcon#about to read 3, iclass 12, count 0 2006.229.02:39:09.55#ibcon#read 3, iclass 12, count 0 2006.229.02:39:09.55#ibcon#about to read 4, iclass 12, count 0 2006.229.02:39:09.55#ibcon#read 4, iclass 12, count 0 2006.229.02:39:09.55#ibcon#about to read 5, iclass 12, count 0 2006.229.02:39:09.55#ibcon#read 5, iclass 12, count 0 2006.229.02:39:09.55#ibcon#about to read 6, iclass 12, count 0 2006.229.02:39:09.55#ibcon#read 6, iclass 12, count 0 2006.229.02:39:09.55#ibcon#end of sib2, iclass 12, count 0 2006.229.02:39:09.55#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:39:09.55#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:39:09.55#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:39:09.55#ibcon#*before write, iclass 12, count 0 2006.229.02:39:09.55#ibcon#enter sib2, iclass 12, count 0 2006.229.02:39:09.55#ibcon#flushed, iclass 12, count 0 2006.229.02:39:09.55#ibcon#about to write, iclass 12, count 0 2006.229.02:39:09.55#ibcon#wrote, iclass 12, count 0 2006.229.02:39:09.55#ibcon#about to read 3, iclass 12, count 0 2006.229.02:39:09.59#ibcon#read 3, iclass 12, count 0 2006.229.02:39:09.59#ibcon#about to read 4, iclass 12, count 0 2006.229.02:39:09.59#ibcon#read 4, iclass 12, count 0 2006.229.02:39:09.59#ibcon#about to read 5, iclass 12, count 0 2006.229.02:39:09.59#ibcon#read 5, iclass 12, count 0 2006.229.02:39:09.59#ibcon#about to read 6, iclass 12, count 0 2006.229.02:39:09.59#ibcon#read 6, iclass 12, count 0 2006.229.02:39:09.59#ibcon#end of sib2, iclass 12, count 0 2006.229.02:39:09.59#ibcon#*after write, iclass 12, count 0 2006.229.02:39:09.59#ibcon#*before return 0, iclass 12, count 0 2006.229.02:39:09.59#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:09.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.02:39:09.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:39:09.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:39:09.60$vck44/vb=4,4 2006.229.02:39:09.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.02:39:09.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.02:39:09.60#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:09.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:09.64#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:09.64#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:09.64#ibcon#enter wrdev, iclass 14, count 2 2006.229.02:39:09.64#ibcon#first serial, iclass 14, count 2 2006.229.02:39:09.64#ibcon#enter sib2, iclass 14, count 2 2006.229.02:39:09.64#ibcon#flushed, iclass 14, count 2 2006.229.02:39:09.64#ibcon#about to write, iclass 14, count 2 2006.229.02:39:09.64#ibcon#wrote, iclass 14, count 2 2006.229.02:39:09.64#ibcon#about to read 3, iclass 14, count 2 2006.229.02:39:09.66#ibcon#read 3, iclass 14, count 2 2006.229.02:39:09.66#ibcon#about to read 4, iclass 14, count 2 2006.229.02:39:09.66#ibcon#read 4, iclass 14, count 2 2006.229.02:39:09.66#ibcon#about to read 5, iclass 14, count 2 2006.229.02:39:09.66#ibcon#read 5, iclass 14, count 2 2006.229.02:39:09.66#ibcon#about to read 6, iclass 14, count 2 2006.229.02:39:09.66#ibcon#read 6, iclass 14, count 2 2006.229.02:39:09.66#ibcon#end of sib2, iclass 14, count 2 2006.229.02:39:09.66#ibcon#*mode == 0, iclass 14, count 2 2006.229.02:39:09.66#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.02:39:09.66#ibcon#[27=AT04-04\r\n] 2006.229.02:39:09.66#ibcon#*before write, iclass 14, count 2 2006.229.02:39:09.66#ibcon#enter sib2, iclass 14, count 2 2006.229.02:39:09.66#ibcon#flushed, iclass 14, count 2 2006.229.02:39:09.66#ibcon#about to write, iclass 14, count 2 2006.229.02:39:09.67#ibcon#wrote, iclass 14, count 2 2006.229.02:39:09.67#ibcon#about to read 3, iclass 14, count 2 2006.229.02:39:09.69#ibcon#read 3, iclass 14, count 2 2006.229.02:39:09.69#ibcon#about to read 4, iclass 14, count 2 2006.229.02:39:09.69#ibcon#read 4, iclass 14, count 2 2006.229.02:39:09.69#ibcon#about to read 5, iclass 14, count 2 2006.229.02:39:09.69#ibcon#read 5, iclass 14, count 2 2006.229.02:39:09.69#ibcon#about to read 6, iclass 14, count 2 2006.229.02:39:09.69#ibcon#read 6, iclass 14, count 2 2006.229.02:39:09.69#ibcon#end of sib2, iclass 14, count 2 2006.229.02:39:09.69#ibcon#*after write, iclass 14, count 2 2006.229.02:39:09.69#ibcon#*before return 0, iclass 14, count 2 2006.229.02:39:09.69#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:09.69#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.02:39:09.69#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.02:39:09.69#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:09.69#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:09.81#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:09.81#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:09.81#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:39:09.81#ibcon#first serial, iclass 14, count 0 2006.229.02:39:09.81#ibcon#enter sib2, iclass 14, count 0 2006.229.02:39:09.81#ibcon#flushed, iclass 14, count 0 2006.229.02:39:09.81#ibcon#about to write, iclass 14, count 0 2006.229.02:39:09.81#ibcon#wrote, iclass 14, count 0 2006.229.02:39:09.81#ibcon#about to read 3, iclass 14, count 0 2006.229.02:39:09.83#ibcon#read 3, iclass 14, count 0 2006.229.02:39:09.83#ibcon#about to read 4, iclass 14, count 0 2006.229.02:39:09.83#ibcon#read 4, iclass 14, count 0 2006.229.02:39:09.83#ibcon#about to read 5, iclass 14, count 0 2006.229.02:39:09.83#ibcon#read 5, iclass 14, count 0 2006.229.02:39:09.83#ibcon#about to read 6, iclass 14, count 0 2006.229.02:39:09.83#ibcon#read 6, iclass 14, count 0 2006.229.02:39:09.83#ibcon#end of sib2, iclass 14, count 0 2006.229.02:39:09.83#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:39:09.83#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:39:09.83#ibcon#[27=USB\r\n] 2006.229.02:39:09.83#ibcon#*before write, iclass 14, count 0 2006.229.02:39:09.83#ibcon#enter sib2, iclass 14, count 0 2006.229.02:39:09.83#ibcon#flushed, iclass 14, count 0 2006.229.02:39:09.83#ibcon#about to write, iclass 14, count 0 2006.229.02:39:09.83#ibcon#wrote, iclass 14, count 0 2006.229.02:39:09.83#ibcon#about to read 3, iclass 14, count 0 2006.229.02:39:09.86#ibcon#read 3, iclass 14, count 0 2006.229.02:39:09.86#ibcon#about to read 4, iclass 14, count 0 2006.229.02:39:09.86#ibcon#read 4, iclass 14, count 0 2006.229.02:39:09.86#ibcon#about to read 5, iclass 14, count 0 2006.229.02:39:09.86#ibcon#read 5, iclass 14, count 0 2006.229.02:39:09.86#ibcon#about to read 6, iclass 14, count 0 2006.229.02:39:09.86#ibcon#read 6, iclass 14, count 0 2006.229.02:39:09.86#ibcon#end of sib2, iclass 14, count 0 2006.229.02:39:09.86#ibcon#*after write, iclass 14, count 0 2006.229.02:39:09.86#ibcon#*before return 0, iclass 14, count 0 2006.229.02:39:09.86#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:09.86#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.02:39:09.86#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:39:09.86#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:39:09.87$vck44/vblo=5,709.99 2006.229.02:39:09.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.02:39:09.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.02:39:09.87#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:09.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:09.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:09.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:09.87#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:39:09.87#ibcon#first serial, iclass 16, count 0 2006.229.02:39:09.87#ibcon#enter sib2, iclass 16, count 0 2006.229.02:39:09.87#ibcon#flushed, iclass 16, count 0 2006.229.02:39:09.87#ibcon#about to write, iclass 16, count 0 2006.229.02:39:09.87#ibcon#wrote, iclass 16, count 0 2006.229.02:39:09.87#ibcon#about to read 3, iclass 16, count 0 2006.229.02:39:09.88#ibcon#read 3, iclass 16, count 0 2006.229.02:39:09.88#ibcon#about to read 4, iclass 16, count 0 2006.229.02:39:09.88#ibcon#read 4, iclass 16, count 0 2006.229.02:39:09.88#ibcon#about to read 5, iclass 16, count 0 2006.229.02:39:09.88#ibcon#read 5, iclass 16, count 0 2006.229.02:39:09.88#ibcon#about to read 6, iclass 16, count 0 2006.229.02:39:09.88#ibcon#read 6, iclass 16, count 0 2006.229.02:39:09.88#ibcon#end of sib2, iclass 16, count 0 2006.229.02:39:09.88#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:39:09.88#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:39:09.88#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:39:09.88#ibcon#*before write, iclass 16, count 0 2006.229.02:39:09.88#ibcon#enter sib2, iclass 16, count 0 2006.229.02:39:09.88#ibcon#flushed, iclass 16, count 0 2006.229.02:39:09.88#ibcon#about to write, iclass 16, count 0 2006.229.02:39:09.88#ibcon#wrote, iclass 16, count 0 2006.229.02:39:09.88#ibcon#about to read 3, iclass 16, count 0 2006.229.02:39:09.92#ibcon#read 3, iclass 16, count 0 2006.229.02:39:09.92#ibcon#about to read 4, iclass 16, count 0 2006.229.02:39:09.92#ibcon#read 4, iclass 16, count 0 2006.229.02:39:09.92#ibcon#about to read 5, iclass 16, count 0 2006.229.02:39:09.92#ibcon#read 5, iclass 16, count 0 2006.229.02:39:09.92#ibcon#about to read 6, iclass 16, count 0 2006.229.02:39:09.92#ibcon#read 6, iclass 16, count 0 2006.229.02:39:09.92#ibcon#end of sib2, iclass 16, count 0 2006.229.02:39:09.92#ibcon#*after write, iclass 16, count 0 2006.229.02:39:09.92#ibcon#*before return 0, iclass 16, count 0 2006.229.02:39:09.92#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:09.92#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.02:39:09.92#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:39:09.92#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:39:09.93$vck44/vb=5,4 2006.229.02:39:09.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.02:39:09.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.02:39:09.93#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:09.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:09.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:09.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:09.97#ibcon#enter wrdev, iclass 18, count 2 2006.229.02:39:09.97#ibcon#first serial, iclass 18, count 2 2006.229.02:39:09.97#ibcon#enter sib2, iclass 18, count 2 2006.229.02:39:09.97#ibcon#flushed, iclass 18, count 2 2006.229.02:39:09.97#ibcon#about to write, iclass 18, count 2 2006.229.02:39:09.97#ibcon#wrote, iclass 18, count 2 2006.229.02:39:09.97#ibcon#about to read 3, iclass 18, count 2 2006.229.02:39:09.99#ibcon#read 3, iclass 18, count 2 2006.229.02:39:09.99#ibcon#about to read 4, iclass 18, count 2 2006.229.02:39:09.99#ibcon#read 4, iclass 18, count 2 2006.229.02:39:09.99#ibcon#about to read 5, iclass 18, count 2 2006.229.02:39:09.99#ibcon#read 5, iclass 18, count 2 2006.229.02:39:09.99#ibcon#about to read 6, iclass 18, count 2 2006.229.02:39:09.99#ibcon#read 6, iclass 18, count 2 2006.229.02:39:09.99#ibcon#end of sib2, iclass 18, count 2 2006.229.02:39:09.99#ibcon#*mode == 0, iclass 18, count 2 2006.229.02:39:09.99#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.02:39:09.99#ibcon#[27=AT05-04\r\n] 2006.229.02:39:09.99#ibcon#*before write, iclass 18, count 2 2006.229.02:39:09.99#ibcon#enter sib2, iclass 18, count 2 2006.229.02:39:09.99#ibcon#flushed, iclass 18, count 2 2006.229.02:39:09.99#ibcon#about to write, iclass 18, count 2 2006.229.02:39:09.99#ibcon#wrote, iclass 18, count 2 2006.229.02:39:10.00#ibcon#about to read 3, iclass 18, count 2 2006.229.02:39:10.02#ibcon#read 3, iclass 18, count 2 2006.229.02:39:10.02#ibcon#about to read 4, iclass 18, count 2 2006.229.02:39:10.02#ibcon#read 4, iclass 18, count 2 2006.229.02:39:10.02#ibcon#about to read 5, iclass 18, count 2 2006.229.02:39:10.02#ibcon#read 5, iclass 18, count 2 2006.229.02:39:10.02#ibcon#about to read 6, iclass 18, count 2 2006.229.02:39:10.02#ibcon#read 6, iclass 18, count 2 2006.229.02:39:10.02#ibcon#end of sib2, iclass 18, count 2 2006.229.02:39:10.02#ibcon#*after write, iclass 18, count 2 2006.229.02:39:10.02#ibcon#*before return 0, iclass 18, count 2 2006.229.02:39:10.02#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:10.02#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.02:39:10.02#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.02:39:10.02#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:10.02#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:10.15#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:10.15#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:10.15#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:39:10.15#ibcon#first serial, iclass 18, count 0 2006.229.02:39:10.15#ibcon#enter sib2, iclass 18, count 0 2006.229.02:39:10.15#ibcon#flushed, iclass 18, count 0 2006.229.02:39:10.15#ibcon#about to write, iclass 18, count 0 2006.229.02:39:10.15#ibcon#wrote, iclass 18, count 0 2006.229.02:39:10.15#ibcon#about to read 3, iclass 18, count 0 2006.229.02:39:10.16#ibcon#read 3, iclass 18, count 0 2006.229.02:39:10.16#ibcon#about to read 4, iclass 18, count 0 2006.229.02:39:10.16#ibcon#read 4, iclass 18, count 0 2006.229.02:39:10.16#ibcon#about to read 5, iclass 18, count 0 2006.229.02:39:10.16#ibcon#read 5, iclass 18, count 0 2006.229.02:39:10.16#ibcon#about to read 6, iclass 18, count 0 2006.229.02:39:10.16#ibcon#read 6, iclass 18, count 0 2006.229.02:39:10.16#ibcon#end of sib2, iclass 18, count 0 2006.229.02:39:10.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:39:10.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:39:10.16#ibcon#[27=USB\r\n] 2006.229.02:39:10.16#ibcon#*before write, iclass 18, count 0 2006.229.02:39:10.16#ibcon#enter sib2, iclass 18, count 0 2006.229.02:39:10.16#ibcon#flushed, iclass 18, count 0 2006.229.02:39:10.16#ibcon#about to write, iclass 18, count 0 2006.229.02:39:10.16#ibcon#wrote, iclass 18, count 0 2006.229.02:39:10.16#ibcon#about to read 3, iclass 18, count 0 2006.229.02:39:10.19#ibcon#read 3, iclass 18, count 0 2006.229.02:39:10.19#ibcon#about to read 4, iclass 18, count 0 2006.229.02:39:10.19#ibcon#read 4, iclass 18, count 0 2006.229.02:39:10.19#ibcon#about to read 5, iclass 18, count 0 2006.229.02:39:10.19#ibcon#read 5, iclass 18, count 0 2006.229.02:39:10.19#ibcon#about to read 6, iclass 18, count 0 2006.229.02:39:10.19#ibcon#read 6, iclass 18, count 0 2006.229.02:39:10.19#ibcon#end of sib2, iclass 18, count 0 2006.229.02:39:10.19#ibcon#*after write, iclass 18, count 0 2006.229.02:39:10.19#ibcon#*before return 0, iclass 18, count 0 2006.229.02:39:10.19#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:10.19#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.02:39:10.19#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:39:10.19#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:39:10.20$vck44/vblo=6,719.99 2006.229.02:39:10.20#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.02:39:10.20#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.02:39:10.20#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:10.20#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:10.20#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:10.20#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:10.20#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:39:10.20#ibcon#first serial, iclass 20, count 0 2006.229.02:39:10.20#ibcon#enter sib2, iclass 20, count 0 2006.229.02:39:10.20#ibcon#flushed, iclass 20, count 0 2006.229.02:39:10.20#ibcon#about to write, iclass 20, count 0 2006.229.02:39:10.20#ibcon#wrote, iclass 20, count 0 2006.229.02:39:10.20#ibcon#about to read 3, iclass 20, count 0 2006.229.02:39:10.22#ibcon#read 3, iclass 20, count 0 2006.229.02:39:10.22#ibcon#about to read 4, iclass 20, count 0 2006.229.02:39:10.22#ibcon#read 4, iclass 20, count 0 2006.229.02:39:10.22#ibcon#about to read 5, iclass 20, count 0 2006.229.02:39:10.22#ibcon#read 5, iclass 20, count 0 2006.229.02:39:10.22#ibcon#about to read 6, iclass 20, count 0 2006.229.02:39:10.22#ibcon#read 6, iclass 20, count 0 2006.229.02:39:10.22#ibcon#end of sib2, iclass 20, count 0 2006.229.02:39:10.22#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:39:10.22#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:39:10.22#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:39:10.22#ibcon#*before write, iclass 20, count 0 2006.229.02:39:10.22#ibcon#enter sib2, iclass 20, count 0 2006.229.02:39:10.22#ibcon#flushed, iclass 20, count 0 2006.229.02:39:10.22#ibcon#about to write, iclass 20, count 0 2006.229.02:39:10.22#ibcon#wrote, iclass 20, count 0 2006.229.02:39:10.22#ibcon#about to read 3, iclass 20, count 0 2006.229.02:39:10.26#ibcon#read 3, iclass 20, count 0 2006.229.02:39:10.26#ibcon#about to read 4, iclass 20, count 0 2006.229.02:39:10.26#ibcon#read 4, iclass 20, count 0 2006.229.02:39:10.26#ibcon#about to read 5, iclass 20, count 0 2006.229.02:39:10.26#ibcon#read 5, iclass 20, count 0 2006.229.02:39:10.26#ibcon#about to read 6, iclass 20, count 0 2006.229.02:39:10.26#ibcon#read 6, iclass 20, count 0 2006.229.02:39:10.26#ibcon#end of sib2, iclass 20, count 0 2006.229.02:39:10.26#ibcon#*after write, iclass 20, count 0 2006.229.02:39:10.26#ibcon#*before return 0, iclass 20, count 0 2006.229.02:39:10.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:10.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:39:10.26#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:39:10.26#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:39:10.27$vck44/vb=6,4 2006.229.02:39:10.27#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.02:39:10.27#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.02:39:10.27#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:10.27#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:39:10.28#abcon#<5=/07 1.8 5.8 29.121001001.1\r\n> 2006.229.02:39:10.30#abcon#{5=INTERFACE CLEAR} 2006.229.02:39:10.30#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:39:10.30#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:39:10.30#ibcon#enter wrdev, iclass 23, count 2 2006.229.02:39:10.30#ibcon#first serial, iclass 23, count 2 2006.229.02:39:10.31#ibcon#enter sib2, iclass 23, count 2 2006.229.02:39:10.31#ibcon#flushed, iclass 23, count 2 2006.229.02:39:10.31#ibcon#about to write, iclass 23, count 2 2006.229.02:39:10.31#ibcon#wrote, iclass 23, count 2 2006.229.02:39:10.31#ibcon#about to read 3, iclass 23, count 2 2006.229.02:39:10.32#ibcon#read 3, iclass 23, count 2 2006.229.02:39:10.32#ibcon#about to read 4, iclass 23, count 2 2006.229.02:39:10.32#ibcon#read 4, iclass 23, count 2 2006.229.02:39:10.32#ibcon#about to read 5, iclass 23, count 2 2006.229.02:39:10.32#ibcon#read 5, iclass 23, count 2 2006.229.02:39:10.32#ibcon#about to read 6, iclass 23, count 2 2006.229.02:39:10.32#ibcon#read 6, iclass 23, count 2 2006.229.02:39:10.32#ibcon#end of sib2, iclass 23, count 2 2006.229.02:39:10.32#ibcon#*mode == 0, iclass 23, count 2 2006.229.02:39:10.32#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.02:39:10.32#ibcon#[27=AT06-04\r\n] 2006.229.02:39:10.32#ibcon#*before write, iclass 23, count 2 2006.229.02:39:10.32#ibcon#enter sib2, iclass 23, count 2 2006.229.02:39:10.32#ibcon#flushed, iclass 23, count 2 2006.229.02:39:10.32#ibcon#about to write, iclass 23, count 2 2006.229.02:39:10.32#ibcon#wrote, iclass 23, count 2 2006.229.02:39:10.32#ibcon#about to read 3, iclass 23, count 2 2006.229.02:39:10.35#ibcon#read 3, iclass 23, count 2 2006.229.02:39:10.35#ibcon#about to read 4, iclass 23, count 2 2006.229.02:39:10.35#ibcon#read 4, iclass 23, count 2 2006.229.02:39:10.35#ibcon#about to read 5, iclass 23, count 2 2006.229.02:39:10.35#ibcon#read 5, iclass 23, count 2 2006.229.02:39:10.35#ibcon#about to read 6, iclass 23, count 2 2006.229.02:39:10.35#ibcon#read 6, iclass 23, count 2 2006.229.02:39:10.35#ibcon#end of sib2, iclass 23, count 2 2006.229.02:39:10.35#ibcon#*after write, iclass 23, count 2 2006.229.02:39:10.35#ibcon#*before return 0, iclass 23, count 2 2006.229.02:39:10.35#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:39:10.35#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.02:39:10.35#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.02:39:10.35#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:10.35#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:39:10.36#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:39:10.47#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:39:10.47#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:39:10.47#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:39:10.47#ibcon#first serial, iclass 23, count 0 2006.229.02:39:10.47#ibcon#enter sib2, iclass 23, count 0 2006.229.02:39:10.47#ibcon#flushed, iclass 23, count 0 2006.229.02:39:10.47#ibcon#about to write, iclass 23, count 0 2006.229.02:39:10.47#ibcon#wrote, iclass 23, count 0 2006.229.02:39:10.47#ibcon#about to read 3, iclass 23, count 0 2006.229.02:39:10.49#ibcon#read 3, iclass 23, count 0 2006.229.02:39:10.49#ibcon#about to read 4, iclass 23, count 0 2006.229.02:39:10.49#ibcon#read 4, iclass 23, count 0 2006.229.02:39:10.49#ibcon#about to read 5, iclass 23, count 0 2006.229.02:39:10.49#ibcon#read 5, iclass 23, count 0 2006.229.02:39:10.49#ibcon#about to read 6, iclass 23, count 0 2006.229.02:39:10.49#ibcon#read 6, iclass 23, count 0 2006.229.02:39:10.49#ibcon#end of sib2, iclass 23, count 0 2006.229.02:39:10.49#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:39:10.49#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:39:10.49#ibcon#[27=USB\r\n] 2006.229.02:39:10.49#ibcon#*before write, iclass 23, count 0 2006.229.02:39:10.49#ibcon#enter sib2, iclass 23, count 0 2006.229.02:39:10.49#ibcon#flushed, iclass 23, count 0 2006.229.02:39:10.49#ibcon#about to write, iclass 23, count 0 2006.229.02:39:10.49#ibcon#wrote, iclass 23, count 0 2006.229.02:39:10.49#ibcon#about to read 3, iclass 23, count 0 2006.229.02:39:10.52#ibcon#read 3, iclass 23, count 0 2006.229.02:39:10.52#ibcon#about to read 4, iclass 23, count 0 2006.229.02:39:10.52#ibcon#read 4, iclass 23, count 0 2006.229.02:39:10.52#ibcon#about to read 5, iclass 23, count 0 2006.229.02:39:10.52#ibcon#read 5, iclass 23, count 0 2006.229.02:39:10.52#ibcon#about to read 6, iclass 23, count 0 2006.229.02:39:10.52#ibcon#read 6, iclass 23, count 0 2006.229.02:39:10.52#ibcon#end of sib2, iclass 23, count 0 2006.229.02:39:10.52#ibcon#*after write, iclass 23, count 0 2006.229.02:39:10.52#ibcon#*before return 0, iclass 23, count 0 2006.229.02:39:10.52#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:39:10.52#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.02:39:10.52#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:39:10.52#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:39:10.53$vck44/vblo=7,734.99 2006.229.02:39:10.53#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.02:39:10.53#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.02:39:10.53#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:10.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:10.53#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:10.53#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:10.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:39:10.53#ibcon#first serial, iclass 28, count 0 2006.229.02:39:10.53#ibcon#enter sib2, iclass 28, count 0 2006.229.02:39:10.53#ibcon#flushed, iclass 28, count 0 2006.229.02:39:10.53#ibcon#about to write, iclass 28, count 0 2006.229.02:39:10.53#ibcon#wrote, iclass 28, count 0 2006.229.02:39:10.53#ibcon#about to read 3, iclass 28, count 0 2006.229.02:39:10.54#ibcon#read 3, iclass 28, count 0 2006.229.02:39:10.54#ibcon#about to read 4, iclass 28, count 0 2006.229.02:39:10.54#ibcon#read 4, iclass 28, count 0 2006.229.02:39:10.54#ibcon#about to read 5, iclass 28, count 0 2006.229.02:39:10.54#ibcon#read 5, iclass 28, count 0 2006.229.02:39:10.54#ibcon#about to read 6, iclass 28, count 0 2006.229.02:39:10.54#ibcon#read 6, iclass 28, count 0 2006.229.02:39:10.54#ibcon#end of sib2, iclass 28, count 0 2006.229.02:39:10.54#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:39:10.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:39:10.54#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:39:10.54#ibcon#*before write, iclass 28, count 0 2006.229.02:39:10.54#ibcon#enter sib2, iclass 28, count 0 2006.229.02:39:10.54#ibcon#flushed, iclass 28, count 0 2006.229.02:39:10.54#ibcon#about to write, iclass 28, count 0 2006.229.02:39:10.54#ibcon#wrote, iclass 28, count 0 2006.229.02:39:10.54#ibcon#about to read 3, iclass 28, count 0 2006.229.02:39:10.58#ibcon#read 3, iclass 28, count 0 2006.229.02:39:10.58#ibcon#about to read 4, iclass 28, count 0 2006.229.02:39:10.58#ibcon#read 4, iclass 28, count 0 2006.229.02:39:10.58#ibcon#about to read 5, iclass 28, count 0 2006.229.02:39:10.58#ibcon#read 5, iclass 28, count 0 2006.229.02:39:10.58#ibcon#about to read 6, iclass 28, count 0 2006.229.02:39:10.58#ibcon#read 6, iclass 28, count 0 2006.229.02:39:10.58#ibcon#end of sib2, iclass 28, count 0 2006.229.02:39:10.58#ibcon#*after write, iclass 28, count 0 2006.229.02:39:10.58#ibcon#*before return 0, iclass 28, count 0 2006.229.02:39:10.58#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:10.58#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.02:39:10.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:39:10.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:39:10.59$vck44/vb=7,4 2006.229.02:39:10.59#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.02:39:10.59#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.02:39:10.59#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:10.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:10.63#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:10.63#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:10.63#ibcon#enter wrdev, iclass 30, count 2 2006.229.02:39:10.63#ibcon#first serial, iclass 30, count 2 2006.229.02:39:10.63#ibcon#enter sib2, iclass 30, count 2 2006.229.02:39:10.63#ibcon#flushed, iclass 30, count 2 2006.229.02:39:10.63#ibcon#about to write, iclass 30, count 2 2006.229.02:39:10.63#ibcon#wrote, iclass 30, count 2 2006.229.02:39:10.63#ibcon#about to read 3, iclass 30, count 2 2006.229.02:39:10.65#ibcon#read 3, iclass 30, count 2 2006.229.02:39:10.65#ibcon#about to read 4, iclass 30, count 2 2006.229.02:39:10.65#ibcon#read 4, iclass 30, count 2 2006.229.02:39:10.65#ibcon#about to read 5, iclass 30, count 2 2006.229.02:39:10.65#ibcon#read 5, iclass 30, count 2 2006.229.02:39:10.65#ibcon#about to read 6, iclass 30, count 2 2006.229.02:39:10.65#ibcon#read 6, iclass 30, count 2 2006.229.02:39:10.65#ibcon#end of sib2, iclass 30, count 2 2006.229.02:39:10.65#ibcon#*mode == 0, iclass 30, count 2 2006.229.02:39:10.65#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.02:39:10.65#ibcon#[27=AT07-04\r\n] 2006.229.02:39:10.65#ibcon#*before write, iclass 30, count 2 2006.229.02:39:10.65#ibcon#enter sib2, iclass 30, count 2 2006.229.02:39:10.65#ibcon#flushed, iclass 30, count 2 2006.229.02:39:10.65#ibcon#about to write, iclass 30, count 2 2006.229.02:39:10.65#ibcon#wrote, iclass 30, count 2 2006.229.02:39:10.65#ibcon#about to read 3, iclass 30, count 2 2006.229.02:39:10.68#ibcon#read 3, iclass 30, count 2 2006.229.02:39:10.68#ibcon#about to read 4, iclass 30, count 2 2006.229.02:39:10.68#ibcon#read 4, iclass 30, count 2 2006.229.02:39:10.68#ibcon#about to read 5, iclass 30, count 2 2006.229.02:39:10.68#ibcon#read 5, iclass 30, count 2 2006.229.02:39:10.68#ibcon#about to read 6, iclass 30, count 2 2006.229.02:39:10.68#ibcon#read 6, iclass 30, count 2 2006.229.02:39:10.68#ibcon#end of sib2, iclass 30, count 2 2006.229.02:39:10.68#ibcon#*after write, iclass 30, count 2 2006.229.02:39:10.68#ibcon#*before return 0, iclass 30, count 2 2006.229.02:39:10.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:10.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.02:39:10.68#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.02:39:10.68#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:10.68#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:10.80#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:10.80#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:10.80#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:39:10.80#ibcon#first serial, iclass 30, count 0 2006.229.02:39:10.80#ibcon#enter sib2, iclass 30, count 0 2006.229.02:39:10.80#ibcon#flushed, iclass 30, count 0 2006.229.02:39:10.80#ibcon#about to write, iclass 30, count 0 2006.229.02:39:10.80#ibcon#wrote, iclass 30, count 0 2006.229.02:39:10.80#ibcon#about to read 3, iclass 30, count 0 2006.229.02:39:10.82#ibcon#read 3, iclass 30, count 0 2006.229.02:39:10.82#ibcon#about to read 4, iclass 30, count 0 2006.229.02:39:10.82#ibcon#read 4, iclass 30, count 0 2006.229.02:39:10.82#ibcon#about to read 5, iclass 30, count 0 2006.229.02:39:10.82#ibcon#read 5, iclass 30, count 0 2006.229.02:39:10.82#ibcon#about to read 6, iclass 30, count 0 2006.229.02:39:10.82#ibcon#read 6, iclass 30, count 0 2006.229.02:39:10.82#ibcon#end of sib2, iclass 30, count 0 2006.229.02:39:10.82#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:39:10.82#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:39:10.82#ibcon#[27=USB\r\n] 2006.229.02:39:10.82#ibcon#*before write, iclass 30, count 0 2006.229.02:39:10.82#ibcon#enter sib2, iclass 30, count 0 2006.229.02:39:10.82#ibcon#flushed, iclass 30, count 0 2006.229.02:39:10.82#ibcon#about to write, iclass 30, count 0 2006.229.02:39:10.82#ibcon#wrote, iclass 30, count 0 2006.229.02:39:10.82#ibcon#about to read 3, iclass 30, count 0 2006.229.02:39:10.85#ibcon#read 3, iclass 30, count 0 2006.229.02:39:10.85#ibcon#about to read 4, iclass 30, count 0 2006.229.02:39:10.85#ibcon#read 4, iclass 30, count 0 2006.229.02:39:10.85#ibcon#about to read 5, iclass 30, count 0 2006.229.02:39:10.85#ibcon#read 5, iclass 30, count 0 2006.229.02:39:10.85#ibcon#about to read 6, iclass 30, count 0 2006.229.02:39:10.85#ibcon#read 6, iclass 30, count 0 2006.229.02:39:10.85#ibcon#end of sib2, iclass 30, count 0 2006.229.02:39:10.85#ibcon#*after write, iclass 30, count 0 2006.229.02:39:10.85#ibcon#*before return 0, iclass 30, count 0 2006.229.02:39:10.85#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:10.85#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.02:39:10.85#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:39:10.85#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:39:10.86$vck44/vblo=8,744.99 2006.229.02:39:10.86#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.02:39:10.86#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.02:39:10.86#ibcon#ireg 17 cls_cnt 0 2006.229.02:39:10.86#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:10.86#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:10.86#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:10.86#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:39:10.86#ibcon#first serial, iclass 32, count 0 2006.229.02:39:10.86#ibcon#enter sib2, iclass 32, count 0 2006.229.02:39:10.86#ibcon#flushed, iclass 32, count 0 2006.229.02:39:10.86#ibcon#about to write, iclass 32, count 0 2006.229.02:39:10.86#ibcon#wrote, iclass 32, count 0 2006.229.02:39:10.86#ibcon#about to read 3, iclass 32, count 0 2006.229.02:39:10.87#ibcon#read 3, iclass 32, count 0 2006.229.02:39:10.87#ibcon#about to read 4, iclass 32, count 0 2006.229.02:39:10.87#ibcon#read 4, iclass 32, count 0 2006.229.02:39:10.87#ibcon#about to read 5, iclass 32, count 0 2006.229.02:39:10.87#ibcon#read 5, iclass 32, count 0 2006.229.02:39:10.87#ibcon#about to read 6, iclass 32, count 0 2006.229.02:39:10.87#ibcon#read 6, iclass 32, count 0 2006.229.02:39:10.87#ibcon#end of sib2, iclass 32, count 0 2006.229.02:39:10.87#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:39:10.87#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:39:10.87#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:39:10.87#ibcon#*before write, iclass 32, count 0 2006.229.02:39:10.87#ibcon#enter sib2, iclass 32, count 0 2006.229.02:39:10.87#ibcon#flushed, iclass 32, count 0 2006.229.02:39:10.87#ibcon#about to write, iclass 32, count 0 2006.229.02:39:10.87#ibcon#wrote, iclass 32, count 0 2006.229.02:39:10.87#ibcon#about to read 3, iclass 32, count 0 2006.229.02:39:10.91#ibcon#read 3, iclass 32, count 0 2006.229.02:39:10.91#ibcon#about to read 4, iclass 32, count 0 2006.229.02:39:10.91#ibcon#read 4, iclass 32, count 0 2006.229.02:39:10.91#ibcon#about to read 5, iclass 32, count 0 2006.229.02:39:10.91#ibcon#read 5, iclass 32, count 0 2006.229.02:39:10.91#ibcon#about to read 6, iclass 32, count 0 2006.229.02:39:10.91#ibcon#read 6, iclass 32, count 0 2006.229.02:39:10.91#ibcon#end of sib2, iclass 32, count 0 2006.229.02:39:10.91#ibcon#*after write, iclass 32, count 0 2006.229.02:39:10.91#ibcon#*before return 0, iclass 32, count 0 2006.229.02:39:10.91#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:10.91#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.02:39:10.91#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:39:10.91#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:39:10.92$vck44/vb=8,4 2006.229.02:39:10.92#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.02:39:10.92#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.02:39:10.92#ibcon#ireg 11 cls_cnt 2 2006.229.02:39:10.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:10.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:10.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:10.96#ibcon#enter wrdev, iclass 34, count 2 2006.229.02:39:10.96#ibcon#first serial, iclass 34, count 2 2006.229.02:39:10.96#ibcon#enter sib2, iclass 34, count 2 2006.229.02:39:10.96#ibcon#flushed, iclass 34, count 2 2006.229.02:39:10.96#ibcon#about to write, iclass 34, count 2 2006.229.02:39:10.96#ibcon#wrote, iclass 34, count 2 2006.229.02:39:10.96#ibcon#about to read 3, iclass 34, count 2 2006.229.02:39:10.98#ibcon#read 3, iclass 34, count 2 2006.229.02:39:10.98#ibcon#about to read 4, iclass 34, count 2 2006.229.02:39:10.98#ibcon#read 4, iclass 34, count 2 2006.229.02:39:10.98#ibcon#about to read 5, iclass 34, count 2 2006.229.02:39:10.98#ibcon#read 5, iclass 34, count 2 2006.229.02:39:10.98#ibcon#about to read 6, iclass 34, count 2 2006.229.02:39:10.98#ibcon#read 6, iclass 34, count 2 2006.229.02:39:10.98#ibcon#end of sib2, iclass 34, count 2 2006.229.02:39:10.98#ibcon#*mode == 0, iclass 34, count 2 2006.229.02:39:10.98#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.02:39:10.98#ibcon#[27=AT08-04\r\n] 2006.229.02:39:10.98#ibcon#*before write, iclass 34, count 2 2006.229.02:39:10.98#ibcon#enter sib2, iclass 34, count 2 2006.229.02:39:10.98#ibcon#flushed, iclass 34, count 2 2006.229.02:39:10.98#ibcon#about to write, iclass 34, count 2 2006.229.02:39:10.98#ibcon#wrote, iclass 34, count 2 2006.229.02:39:10.99#ibcon#about to read 3, iclass 34, count 2 2006.229.02:39:11.01#ibcon#read 3, iclass 34, count 2 2006.229.02:39:11.01#ibcon#about to read 4, iclass 34, count 2 2006.229.02:39:11.01#ibcon#read 4, iclass 34, count 2 2006.229.02:39:11.01#ibcon#about to read 5, iclass 34, count 2 2006.229.02:39:11.01#ibcon#read 5, iclass 34, count 2 2006.229.02:39:11.01#ibcon#about to read 6, iclass 34, count 2 2006.229.02:39:11.01#ibcon#read 6, iclass 34, count 2 2006.229.02:39:11.01#ibcon#end of sib2, iclass 34, count 2 2006.229.02:39:11.01#ibcon#*after write, iclass 34, count 2 2006.229.02:39:11.01#ibcon#*before return 0, iclass 34, count 2 2006.229.02:39:11.01#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:11.01#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.02:39:11.01#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.02:39:11.01#ibcon#ireg 7 cls_cnt 0 2006.229.02:39:11.01#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:11.13#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:11.13#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:11.13#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:39:11.13#ibcon#first serial, iclass 34, count 0 2006.229.02:39:11.13#ibcon#enter sib2, iclass 34, count 0 2006.229.02:39:11.13#ibcon#flushed, iclass 34, count 0 2006.229.02:39:11.13#ibcon#about to write, iclass 34, count 0 2006.229.02:39:11.13#ibcon#wrote, iclass 34, count 0 2006.229.02:39:11.13#ibcon#about to read 3, iclass 34, count 0 2006.229.02:39:11.15#ibcon#read 3, iclass 34, count 0 2006.229.02:39:11.15#ibcon#about to read 4, iclass 34, count 0 2006.229.02:39:11.15#ibcon#read 4, iclass 34, count 0 2006.229.02:39:11.15#ibcon#about to read 5, iclass 34, count 0 2006.229.02:39:11.15#ibcon#read 5, iclass 34, count 0 2006.229.02:39:11.15#ibcon#about to read 6, iclass 34, count 0 2006.229.02:39:11.15#ibcon#read 6, iclass 34, count 0 2006.229.02:39:11.15#ibcon#end of sib2, iclass 34, count 0 2006.229.02:39:11.15#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:39:11.15#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:39:11.15#ibcon#[27=USB\r\n] 2006.229.02:39:11.15#ibcon#*before write, iclass 34, count 0 2006.229.02:39:11.15#ibcon#enter sib2, iclass 34, count 0 2006.229.02:39:11.15#ibcon#flushed, iclass 34, count 0 2006.229.02:39:11.15#ibcon#about to write, iclass 34, count 0 2006.229.02:39:11.15#ibcon#wrote, iclass 34, count 0 2006.229.02:39:11.15#ibcon#about to read 3, iclass 34, count 0 2006.229.02:39:11.18#ibcon#read 3, iclass 34, count 0 2006.229.02:39:11.18#ibcon#about to read 4, iclass 34, count 0 2006.229.02:39:11.18#ibcon#read 4, iclass 34, count 0 2006.229.02:39:11.18#ibcon#about to read 5, iclass 34, count 0 2006.229.02:39:11.18#ibcon#read 5, iclass 34, count 0 2006.229.02:39:11.18#ibcon#about to read 6, iclass 34, count 0 2006.229.02:39:11.18#ibcon#read 6, iclass 34, count 0 2006.229.02:39:11.18#ibcon#end of sib2, iclass 34, count 0 2006.229.02:39:11.18#ibcon#*after write, iclass 34, count 0 2006.229.02:39:11.18#ibcon#*before return 0, iclass 34, count 0 2006.229.02:39:11.18#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:11.18#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.02:39:11.18#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:39:11.18#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:39:11.19$vck44/vabw=wide 2006.229.02:39:11.19#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.02:39:11.19#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.02:39:11.19#ibcon#ireg 8 cls_cnt 0 2006.229.02:39:11.19#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:11.19#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:11.19#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:11.19#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:39:11.19#ibcon#first serial, iclass 36, count 0 2006.229.02:39:11.19#ibcon#enter sib2, iclass 36, count 0 2006.229.02:39:11.19#ibcon#flushed, iclass 36, count 0 2006.229.02:39:11.19#ibcon#about to write, iclass 36, count 0 2006.229.02:39:11.19#ibcon#wrote, iclass 36, count 0 2006.229.02:39:11.19#ibcon#about to read 3, iclass 36, count 0 2006.229.02:39:11.20#ibcon#read 3, iclass 36, count 0 2006.229.02:39:11.20#ibcon#about to read 4, iclass 36, count 0 2006.229.02:39:11.20#ibcon#read 4, iclass 36, count 0 2006.229.02:39:11.20#ibcon#about to read 5, iclass 36, count 0 2006.229.02:39:11.20#ibcon#read 5, iclass 36, count 0 2006.229.02:39:11.20#ibcon#about to read 6, iclass 36, count 0 2006.229.02:39:11.20#ibcon#read 6, iclass 36, count 0 2006.229.02:39:11.20#ibcon#end of sib2, iclass 36, count 0 2006.229.02:39:11.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:39:11.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:39:11.20#ibcon#[25=BW32\r\n] 2006.229.02:39:11.20#ibcon#*before write, iclass 36, count 0 2006.229.02:39:11.20#ibcon#enter sib2, iclass 36, count 0 2006.229.02:39:11.20#ibcon#flushed, iclass 36, count 0 2006.229.02:39:11.20#ibcon#about to write, iclass 36, count 0 2006.229.02:39:11.20#ibcon#wrote, iclass 36, count 0 2006.229.02:39:11.20#ibcon#about to read 3, iclass 36, count 0 2006.229.02:39:11.23#ibcon#read 3, iclass 36, count 0 2006.229.02:39:11.23#ibcon#about to read 4, iclass 36, count 0 2006.229.02:39:11.23#ibcon#read 4, iclass 36, count 0 2006.229.02:39:11.23#ibcon#about to read 5, iclass 36, count 0 2006.229.02:39:11.23#ibcon#read 5, iclass 36, count 0 2006.229.02:39:11.23#ibcon#about to read 6, iclass 36, count 0 2006.229.02:39:11.23#ibcon#read 6, iclass 36, count 0 2006.229.02:39:11.23#ibcon#end of sib2, iclass 36, count 0 2006.229.02:39:11.23#ibcon#*after write, iclass 36, count 0 2006.229.02:39:11.23#ibcon#*before return 0, iclass 36, count 0 2006.229.02:39:11.23#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:11.23#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.02:39:11.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:39:11.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:39:11.24$vck44/vbbw=wide 2006.229.02:39:11.24#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:39:11.24#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:39:11.24#ibcon#ireg 8 cls_cnt 0 2006.229.02:39:11.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:39:11.29#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:39:11.29#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:39:11.29#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:39:11.29#ibcon#first serial, iclass 38, count 0 2006.229.02:39:11.29#ibcon#enter sib2, iclass 38, count 0 2006.229.02:39:11.29#ibcon#flushed, iclass 38, count 0 2006.229.02:39:11.29#ibcon#about to write, iclass 38, count 0 2006.229.02:39:11.29#ibcon#wrote, iclass 38, count 0 2006.229.02:39:11.29#ibcon#about to read 3, iclass 38, count 0 2006.229.02:39:11.31#ibcon#read 3, iclass 38, count 0 2006.229.02:39:11.31#ibcon#about to read 4, iclass 38, count 0 2006.229.02:39:11.31#ibcon#read 4, iclass 38, count 0 2006.229.02:39:11.31#ibcon#about to read 5, iclass 38, count 0 2006.229.02:39:11.31#ibcon#read 5, iclass 38, count 0 2006.229.02:39:11.31#ibcon#about to read 6, iclass 38, count 0 2006.229.02:39:11.31#ibcon#read 6, iclass 38, count 0 2006.229.02:39:11.31#ibcon#end of sib2, iclass 38, count 0 2006.229.02:39:11.31#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:39:11.31#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:39:11.31#ibcon#[27=BW32\r\n] 2006.229.02:39:11.31#ibcon#*before write, iclass 38, count 0 2006.229.02:39:11.31#ibcon#enter sib2, iclass 38, count 0 2006.229.02:39:11.31#ibcon#flushed, iclass 38, count 0 2006.229.02:39:11.31#ibcon#about to write, iclass 38, count 0 2006.229.02:39:11.31#ibcon#wrote, iclass 38, count 0 2006.229.02:39:11.32#ibcon#about to read 3, iclass 38, count 0 2006.229.02:39:11.34#ibcon#read 3, iclass 38, count 0 2006.229.02:39:11.34#ibcon#about to read 4, iclass 38, count 0 2006.229.02:39:11.34#ibcon#read 4, iclass 38, count 0 2006.229.02:39:11.34#ibcon#about to read 5, iclass 38, count 0 2006.229.02:39:11.34#ibcon#read 5, iclass 38, count 0 2006.229.02:39:11.34#ibcon#about to read 6, iclass 38, count 0 2006.229.02:39:11.34#ibcon#read 6, iclass 38, count 0 2006.229.02:39:11.34#ibcon#end of sib2, iclass 38, count 0 2006.229.02:39:11.34#ibcon#*after write, iclass 38, count 0 2006.229.02:39:11.34#ibcon#*before return 0, iclass 38, count 0 2006.229.02:39:11.34#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:39:11.34#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:39:11.34#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:39:11.34#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:39:11.35$setupk4/ifdk4 2006.229.02:39:11.35$ifdk4/lo= 2006.229.02:39:11.35$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:39:11.35$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:39:11.35$ifdk4/patch= 2006.229.02:39:11.35$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:39:11.35$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:39:11.35$setupk4/!*+20s 2006.229.02:39:20.45#abcon#<5=/07 1.8 5.8 29.121001001.1\r\n> 2006.229.02:39:20.47#abcon#{5=INTERFACE CLEAR} 2006.229.02:39:20.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:39:24.14#trakl#Source acquired 2006.229.02:39:24.15#flagr#flagr/antenna,acquired 2006.229.02:39:26.02$setupk4/"tpicd 2006.229.02:39:26.02$setupk4/echo=off 2006.229.02:39:26.02$setupk4/xlog=off 2006.229.02:39:26.02:!2006.229.02:40:52 2006.229.02:40:52.01:preob 2006.229.02:40:53.14/onsource/TRACKING 2006.229.02:40:53.15:!2006.229.02:41:02 2006.229.02:41:02.01:"tape 2006.229.02:41:02.01:"st=record 2006.229.02:41:02.02:data_valid=on 2006.229.02:41:02.02:midob 2006.229.02:41:03.14/onsource/TRACKING 2006.229.02:41:03.15/wx/29.05,1001.1,100 2006.229.02:41:03.22/cable/+6.4088E-03 2006.229.02:41:04.31/va/01,08,usb,yes,42,45 2006.229.02:41:04.31/va/02,07,usb,yes,45,46 2006.229.02:41:04.31/va/03,06,usb,yes,55,59 2006.229.02:41:04.31/va/04,07,usb,yes,47,49 2006.229.02:41:04.31/va/05,04,usb,yes,42,43 2006.229.02:41:04.31/va/06,04,usb,yes,47,46 2006.229.02:41:04.31/va/07,05,usb,yes,42,43 2006.229.02:41:04.31/va/08,06,usb,yes,31,38 2006.229.02:41:04.54/valo/01,524.99,yes,locked 2006.229.02:41:04.54/valo/02,534.99,yes,locked 2006.229.02:41:04.54/valo/03,564.99,yes,locked 2006.229.02:41:04.54/valo/04,624.99,yes,locked 2006.229.02:41:04.54/valo/05,734.99,yes,locked 2006.229.02:41:04.54/valo/06,814.99,yes,locked 2006.229.02:41:04.54/valo/07,864.99,yes,locked 2006.229.02:41:04.54/valo/08,884.99,yes,locked 2006.229.02:41:05.63/vb/01,04,usb,yes,33,30 2006.229.02:41:05.63/vb/02,04,usb,yes,35,35 2006.229.02:41:05.63/vb/03,04,usb,yes,32,35 2006.229.02:41:05.63/vb/04,04,usb,yes,37,35 2006.229.02:41:05.63/vb/05,04,usb,yes,29,31 2006.229.02:41:05.63/vb/06,04,usb,yes,33,29 2006.229.02:41:05.63/vb/07,04,usb,yes,33,33 2006.229.02:41:05.63/vb/08,04,usb,yes,30,34 2006.229.02:41:05.87/vblo/01,629.99,yes,locked 2006.229.02:41:05.87/vblo/02,634.99,yes,locked 2006.229.02:41:05.87/vblo/03,649.99,yes,locked 2006.229.02:41:05.87/vblo/04,679.99,yes,locked 2006.229.02:41:05.87/vblo/05,709.99,yes,locked 2006.229.02:41:05.87/vblo/06,719.99,yes,locked 2006.229.02:41:05.87/vblo/07,734.99,yes,locked 2006.229.02:41:05.87/vblo/08,744.99,yes,locked 2006.229.02:41:06.02/vabw/8 2006.229.02:41:06.17/vbbw/8 2006.229.02:41:06.26/xfe/off,on,12.0 2006.229.02:41:06.65/ifatt/23,28,28,28 2006.229.02:41:07.07/fmout-gps/S +4.59E-07 2006.229.02:41:07.12:!2006.229.02:46:52 2006.229.02:46:52.00:data_valid=off 2006.229.02:46:52.00:"et 2006.229.02:46:52.00:!+3s 2006.229.02:46:55.01:"tape 2006.229.02:46:55.01:postob 2006.229.02:46:55.17/cable/+6.4079E-03 2006.229.02:46:55.17/wx/28.82,1001.0,100 2006.229.02:46:56.08/fmout-gps/S +4.60E-07 2006.229.02:46:56.08:scan_name=229-0251,jd0608,280 2006.229.02:46:56.08:source=0014+813,001708.47,813508.1,2000.0,neutral 2006.229.02:46:57.14#flagr#flagr/antenna,new-source 2006.229.02:46:57.14:checkk5 2006.229.02:46:57.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:46:57.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:46:58.28/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:46:58.66/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:46:59.03/chk_obsdata//k5ts1/T2290241??a.dat file size is correct (nominal:1400MB, actual:1396MB). 2006.229.02:46:59.39/chk_obsdata//k5ts2/T2290241??b.dat file size is correct (nominal:1400MB, actual:1396MB). 2006.229.02:46:59.76/chk_obsdata//k5ts3/T2290241??c.dat file size is correct (nominal:1400MB, actual:1396MB). 2006.229.02:47:00.13/chk_obsdata//k5ts4/T2290241??d.dat file size is correct (nominal:1400MB, actual:1396MB). 2006.229.02:47:00.82/k5log//k5ts1_log_newline 2006.229.02:47:01.52/k5log//k5ts2_log_newline 2006.229.02:47:02.20/k5log//k5ts3_log_newline 2006.229.02:47:02.89/k5log//k5ts4_log_newline 2006.229.02:47:02.92/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:47:02.92:setupk4=1 2006.229.02:47:02.92$setupk4/echo=on 2006.229.02:47:02.92$setupk4/pcalon 2006.229.02:47:02.92$pcalon/"no phase cal control is implemented here 2006.229.02:47:02.92$setupk4/"tpicd=stop 2006.229.02:47:02.92$setupk4/"rec=synch_on 2006.229.02:47:02.92$setupk4/"rec_mode=128 2006.229.02:47:02.92$setupk4/!* 2006.229.02:47:02.92$setupk4/recpk4 2006.229.02:47:02.92$recpk4/recpatch= 2006.229.02:47:02.93$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:47:02.93$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:47:02.93$setupk4/vck44 2006.229.02:47:02.93$vck44/valo=1,524.99 2006.229.02:47:02.93#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:47:02.93#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:47:02.93#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:02.93#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:02.93#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:02.93#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:02.93#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:47:02.93#ibcon#first serial, iclass 11, count 0 2006.229.02:47:02.93#ibcon#enter sib2, iclass 11, count 0 2006.229.02:47:02.93#ibcon#flushed, iclass 11, count 0 2006.229.02:47:02.93#ibcon#about to write, iclass 11, count 0 2006.229.02:47:02.93#ibcon#wrote, iclass 11, count 0 2006.229.02:47:02.93#ibcon#about to read 3, iclass 11, count 0 2006.229.02:47:02.96#ibcon#read 3, iclass 11, count 0 2006.229.02:47:02.96#ibcon#about to read 4, iclass 11, count 0 2006.229.02:47:02.96#ibcon#read 4, iclass 11, count 0 2006.229.02:47:02.96#ibcon#about to read 5, iclass 11, count 0 2006.229.02:47:02.96#ibcon#read 5, iclass 11, count 0 2006.229.02:47:02.96#ibcon#about to read 6, iclass 11, count 0 2006.229.02:47:02.96#ibcon#read 6, iclass 11, count 0 2006.229.02:47:02.96#ibcon#end of sib2, iclass 11, count 0 2006.229.02:47:02.96#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:47:02.96#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:47:02.96#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:47:02.96#ibcon#*before write, iclass 11, count 0 2006.229.02:47:02.96#ibcon#enter sib2, iclass 11, count 0 2006.229.02:47:02.96#ibcon#flushed, iclass 11, count 0 2006.229.02:47:02.96#ibcon#about to write, iclass 11, count 0 2006.229.02:47:02.96#ibcon#wrote, iclass 11, count 0 2006.229.02:47:02.96#ibcon#about to read 3, iclass 11, count 0 2006.229.02:47:03.01#ibcon#read 3, iclass 11, count 0 2006.229.02:47:03.01#ibcon#about to read 4, iclass 11, count 0 2006.229.02:47:03.01#ibcon#read 4, iclass 11, count 0 2006.229.02:47:03.01#ibcon#about to read 5, iclass 11, count 0 2006.229.02:47:03.01#ibcon#read 5, iclass 11, count 0 2006.229.02:47:03.01#ibcon#about to read 6, iclass 11, count 0 2006.229.02:47:03.01#ibcon#read 6, iclass 11, count 0 2006.229.02:47:03.01#ibcon#end of sib2, iclass 11, count 0 2006.229.02:47:03.01#ibcon#*after write, iclass 11, count 0 2006.229.02:47:03.01#ibcon#*before return 0, iclass 11, count 0 2006.229.02:47:03.01#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:03.01#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:03.01#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:47:03.01#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:47:03.01$vck44/va=1,8 2006.229.02:47:03.01#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.02:47:03.01#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.02:47:03.01#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:03.01#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:03.01#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:03.01#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:03.01#ibcon#enter wrdev, iclass 13, count 2 2006.229.02:47:03.01#ibcon#first serial, iclass 13, count 2 2006.229.02:47:03.01#ibcon#enter sib2, iclass 13, count 2 2006.229.02:47:03.01#ibcon#flushed, iclass 13, count 2 2006.229.02:47:03.01#ibcon#about to write, iclass 13, count 2 2006.229.02:47:03.01#ibcon#wrote, iclass 13, count 2 2006.229.02:47:03.01#ibcon#about to read 3, iclass 13, count 2 2006.229.02:47:03.03#ibcon#read 3, iclass 13, count 2 2006.229.02:47:03.03#ibcon#about to read 4, iclass 13, count 2 2006.229.02:47:03.03#ibcon#read 4, iclass 13, count 2 2006.229.02:47:03.03#ibcon#about to read 5, iclass 13, count 2 2006.229.02:47:03.03#ibcon#read 5, iclass 13, count 2 2006.229.02:47:03.03#ibcon#about to read 6, iclass 13, count 2 2006.229.02:47:03.03#ibcon#read 6, iclass 13, count 2 2006.229.02:47:03.03#ibcon#end of sib2, iclass 13, count 2 2006.229.02:47:03.03#ibcon#*mode == 0, iclass 13, count 2 2006.229.02:47:03.03#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.02:47:03.03#ibcon#[25=AT01-08\r\n] 2006.229.02:47:03.03#ibcon#*before write, iclass 13, count 2 2006.229.02:47:03.03#ibcon#enter sib2, iclass 13, count 2 2006.229.02:47:03.03#ibcon#flushed, iclass 13, count 2 2006.229.02:47:03.03#ibcon#about to write, iclass 13, count 2 2006.229.02:47:03.03#ibcon#wrote, iclass 13, count 2 2006.229.02:47:03.03#ibcon#about to read 3, iclass 13, count 2 2006.229.02:47:03.06#ibcon#read 3, iclass 13, count 2 2006.229.02:47:03.06#ibcon#about to read 4, iclass 13, count 2 2006.229.02:47:03.06#ibcon#read 4, iclass 13, count 2 2006.229.02:47:03.06#ibcon#about to read 5, iclass 13, count 2 2006.229.02:47:03.06#ibcon#read 5, iclass 13, count 2 2006.229.02:47:03.06#ibcon#about to read 6, iclass 13, count 2 2006.229.02:47:03.06#ibcon#read 6, iclass 13, count 2 2006.229.02:47:03.06#ibcon#end of sib2, iclass 13, count 2 2006.229.02:47:03.06#ibcon#*after write, iclass 13, count 2 2006.229.02:47:03.06#ibcon#*before return 0, iclass 13, count 2 2006.229.02:47:03.06#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:03.06#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:03.06#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.02:47:03.06#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:03.06#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:03.18#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:03.18#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:03.18#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:47:03.18#ibcon#first serial, iclass 13, count 0 2006.229.02:47:03.18#ibcon#enter sib2, iclass 13, count 0 2006.229.02:47:03.18#ibcon#flushed, iclass 13, count 0 2006.229.02:47:03.18#ibcon#about to write, iclass 13, count 0 2006.229.02:47:03.18#ibcon#wrote, iclass 13, count 0 2006.229.02:47:03.18#ibcon#about to read 3, iclass 13, count 0 2006.229.02:47:03.20#ibcon#read 3, iclass 13, count 0 2006.229.02:47:03.20#ibcon#about to read 4, iclass 13, count 0 2006.229.02:47:03.20#ibcon#read 4, iclass 13, count 0 2006.229.02:47:03.20#ibcon#about to read 5, iclass 13, count 0 2006.229.02:47:03.20#ibcon#read 5, iclass 13, count 0 2006.229.02:47:03.20#ibcon#about to read 6, iclass 13, count 0 2006.229.02:47:03.20#ibcon#read 6, iclass 13, count 0 2006.229.02:47:03.20#ibcon#end of sib2, iclass 13, count 0 2006.229.02:47:03.20#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:47:03.20#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:47:03.20#ibcon#[25=USB\r\n] 2006.229.02:47:03.20#ibcon#*before write, iclass 13, count 0 2006.229.02:47:03.20#ibcon#enter sib2, iclass 13, count 0 2006.229.02:47:03.20#ibcon#flushed, iclass 13, count 0 2006.229.02:47:03.20#ibcon#about to write, iclass 13, count 0 2006.229.02:47:03.20#ibcon#wrote, iclass 13, count 0 2006.229.02:47:03.20#ibcon#about to read 3, iclass 13, count 0 2006.229.02:47:03.23#ibcon#read 3, iclass 13, count 0 2006.229.02:47:03.23#ibcon#about to read 4, iclass 13, count 0 2006.229.02:47:03.23#ibcon#read 4, iclass 13, count 0 2006.229.02:47:03.23#ibcon#about to read 5, iclass 13, count 0 2006.229.02:47:03.23#ibcon#read 5, iclass 13, count 0 2006.229.02:47:03.23#ibcon#about to read 6, iclass 13, count 0 2006.229.02:47:03.23#ibcon#read 6, iclass 13, count 0 2006.229.02:47:03.23#ibcon#end of sib2, iclass 13, count 0 2006.229.02:47:03.23#ibcon#*after write, iclass 13, count 0 2006.229.02:47:03.23#ibcon#*before return 0, iclass 13, count 0 2006.229.02:47:03.23#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:03.23#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:03.23#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:47:03.23#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:47:03.23$vck44/valo=2,534.99 2006.229.02:47:03.23#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.02:47:03.23#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.02:47:03.23#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:03.23#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:03.23#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:03.23#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:03.23#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:47:03.23#ibcon#first serial, iclass 15, count 0 2006.229.02:47:03.23#ibcon#enter sib2, iclass 15, count 0 2006.229.02:47:03.23#ibcon#flushed, iclass 15, count 0 2006.229.02:47:03.23#ibcon#about to write, iclass 15, count 0 2006.229.02:47:03.23#ibcon#wrote, iclass 15, count 0 2006.229.02:47:03.23#ibcon#about to read 3, iclass 15, count 0 2006.229.02:47:03.25#ibcon#read 3, iclass 15, count 0 2006.229.02:47:03.25#ibcon#about to read 4, iclass 15, count 0 2006.229.02:47:03.25#ibcon#read 4, iclass 15, count 0 2006.229.02:47:03.25#ibcon#about to read 5, iclass 15, count 0 2006.229.02:47:03.25#ibcon#read 5, iclass 15, count 0 2006.229.02:47:03.25#ibcon#about to read 6, iclass 15, count 0 2006.229.02:47:03.25#ibcon#read 6, iclass 15, count 0 2006.229.02:47:03.25#ibcon#end of sib2, iclass 15, count 0 2006.229.02:47:03.25#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:47:03.25#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:47:03.25#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:47:03.25#ibcon#*before write, iclass 15, count 0 2006.229.02:47:03.25#ibcon#enter sib2, iclass 15, count 0 2006.229.02:47:03.25#ibcon#flushed, iclass 15, count 0 2006.229.02:47:03.25#ibcon#about to write, iclass 15, count 0 2006.229.02:47:03.25#ibcon#wrote, iclass 15, count 0 2006.229.02:47:03.25#ibcon#about to read 3, iclass 15, count 0 2006.229.02:47:03.29#ibcon#read 3, iclass 15, count 0 2006.229.02:47:03.29#ibcon#about to read 4, iclass 15, count 0 2006.229.02:47:03.29#ibcon#read 4, iclass 15, count 0 2006.229.02:47:03.29#ibcon#about to read 5, iclass 15, count 0 2006.229.02:47:03.29#ibcon#read 5, iclass 15, count 0 2006.229.02:47:03.29#ibcon#about to read 6, iclass 15, count 0 2006.229.02:47:03.29#ibcon#read 6, iclass 15, count 0 2006.229.02:47:03.29#ibcon#end of sib2, iclass 15, count 0 2006.229.02:47:03.29#ibcon#*after write, iclass 15, count 0 2006.229.02:47:03.29#ibcon#*before return 0, iclass 15, count 0 2006.229.02:47:03.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:03.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:03.29#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:47:03.29#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:47:03.29$vck44/va=2,7 2006.229.02:47:03.29#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.02:47:03.29#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.02:47:03.29#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:03.29#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:03.36#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:03.36#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:03.36#ibcon#enter wrdev, iclass 17, count 2 2006.229.02:47:03.36#ibcon#first serial, iclass 17, count 2 2006.229.02:47:03.36#ibcon#enter sib2, iclass 17, count 2 2006.229.02:47:03.36#ibcon#flushed, iclass 17, count 2 2006.229.02:47:03.36#ibcon#about to write, iclass 17, count 2 2006.229.02:47:03.36#ibcon#wrote, iclass 17, count 2 2006.229.02:47:03.36#ibcon#about to read 3, iclass 17, count 2 2006.229.02:47:03.37#ibcon#read 3, iclass 17, count 2 2006.229.02:47:03.37#ibcon#about to read 4, iclass 17, count 2 2006.229.02:47:03.37#ibcon#read 4, iclass 17, count 2 2006.229.02:47:03.37#ibcon#about to read 5, iclass 17, count 2 2006.229.02:47:03.37#ibcon#read 5, iclass 17, count 2 2006.229.02:47:03.37#ibcon#about to read 6, iclass 17, count 2 2006.229.02:47:03.37#ibcon#read 6, iclass 17, count 2 2006.229.02:47:03.37#ibcon#end of sib2, iclass 17, count 2 2006.229.02:47:03.37#ibcon#*mode == 0, iclass 17, count 2 2006.229.02:47:03.37#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.02:47:03.37#ibcon#[25=AT02-07\r\n] 2006.229.02:47:03.37#ibcon#*before write, iclass 17, count 2 2006.229.02:47:03.37#ibcon#enter sib2, iclass 17, count 2 2006.229.02:47:03.37#ibcon#flushed, iclass 17, count 2 2006.229.02:47:03.37#ibcon#about to write, iclass 17, count 2 2006.229.02:47:03.37#ibcon#wrote, iclass 17, count 2 2006.229.02:47:03.37#ibcon#about to read 3, iclass 17, count 2 2006.229.02:47:03.40#ibcon#read 3, iclass 17, count 2 2006.229.02:47:03.40#ibcon#about to read 4, iclass 17, count 2 2006.229.02:47:03.40#ibcon#read 4, iclass 17, count 2 2006.229.02:47:03.40#ibcon#about to read 5, iclass 17, count 2 2006.229.02:47:03.40#ibcon#read 5, iclass 17, count 2 2006.229.02:47:03.40#ibcon#about to read 6, iclass 17, count 2 2006.229.02:47:03.40#ibcon#read 6, iclass 17, count 2 2006.229.02:47:03.40#ibcon#end of sib2, iclass 17, count 2 2006.229.02:47:03.40#ibcon#*after write, iclass 17, count 2 2006.229.02:47:03.40#ibcon#*before return 0, iclass 17, count 2 2006.229.02:47:03.40#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:03.40#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:03.40#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.02:47:03.40#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:03.40#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:03.52#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:03.52#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:03.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:47:03.52#ibcon#first serial, iclass 17, count 0 2006.229.02:47:03.52#ibcon#enter sib2, iclass 17, count 0 2006.229.02:47:03.52#ibcon#flushed, iclass 17, count 0 2006.229.02:47:03.52#ibcon#about to write, iclass 17, count 0 2006.229.02:47:03.52#ibcon#wrote, iclass 17, count 0 2006.229.02:47:03.52#ibcon#about to read 3, iclass 17, count 0 2006.229.02:47:03.54#ibcon#read 3, iclass 17, count 0 2006.229.02:47:03.54#ibcon#about to read 4, iclass 17, count 0 2006.229.02:47:03.54#ibcon#read 4, iclass 17, count 0 2006.229.02:47:03.54#ibcon#about to read 5, iclass 17, count 0 2006.229.02:47:03.54#ibcon#read 5, iclass 17, count 0 2006.229.02:47:03.54#ibcon#about to read 6, iclass 17, count 0 2006.229.02:47:03.54#ibcon#read 6, iclass 17, count 0 2006.229.02:47:03.54#ibcon#end of sib2, iclass 17, count 0 2006.229.02:47:03.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:47:03.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:47:03.54#ibcon#[25=USB\r\n] 2006.229.02:47:03.54#ibcon#*before write, iclass 17, count 0 2006.229.02:47:03.54#ibcon#enter sib2, iclass 17, count 0 2006.229.02:47:03.54#ibcon#flushed, iclass 17, count 0 2006.229.02:47:03.54#ibcon#about to write, iclass 17, count 0 2006.229.02:47:03.54#ibcon#wrote, iclass 17, count 0 2006.229.02:47:03.54#ibcon#about to read 3, iclass 17, count 0 2006.229.02:47:03.57#ibcon#read 3, iclass 17, count 0 2006.229.02:47:03.57#ibcon#about to read 4, iclass 17, count 0 2006.229.02:47:03.57#ibcon#read 4, iclass 17, count 0 2006.229.02:47:03.57#ibcon#about to read 5, iclass 17, count 0 2006.229.02:47:03.57#ibcon#read 5, iclass 17, count 0 2006.229.02:47:03.57#ibcon#about to read 6, iclass 17, count 0 2006.229.02:47:03.57#ibcon#read 6, iclass 17, count 0 2006.229.02:47:03.57#ibcon#end of sib2, iclass 17, count 0 2006.229.02:47:03.57#ibcon#*after write, iclass 17, count 0 2006.229.02:47:03.57#ibcon#*before return 0, iclass 17, count 0 2006.229.02:47:03.57#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:03.57#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:03.57#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:47:03.57#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:47:03.57$vck44/valo=3,564.99 2006.229.02:47:03.57#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.02:47:03.57#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.02:47:03.57#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:03.57#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:03.57#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:03.57#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:03.57#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:47:03.57#ibcon#first serial, iclass 19, count 0 2006.229.02:47:03.57#ibcon#enter sib2, iclass 19, count 0 2006.229.02:47:03.57#ibcon#flushed, iclass 19, count 0 2006.229.02:47:03.57#ibcon#about to write, iclass 19, count 0 2006.229.02:47:03.57#ibcon#wrote, iclass 19, count 0 2006.229.02:47:03.57#ibcon#about to read 3, iclass 19, count 0 2006.229.02:47:03.60#ibcon#read 3, iclass 19, count 0 2006.229.02:47:03.60#ibcon#about to read 4, iclass 19, count 0 2006.229.02:47:03.60#ibcon#read 4, iclass 19, count 0 2006.229.02:47:03.60#ibcon#about to read 5, iclass 19, count 0 2006.229.02:47:03.60#ibcon#read 5, iclass 19, count 0 2006.229.02:47:03.60#ibcon#about to read 6, iclass 19, count 0 2006.229.02:47:03.60#ibcon#read 6, iclass 19, count 0 2006.229.02:47:03.60#ibcon#end of sib2, iclass 19, count 0 2006.229.02:47:03.60#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:47:03.60#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:47:03.60#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:47:03.60#ibcon#*before write, iclass 19, count 0 2006.229.02:47:03.60#ibcon#enter sib2, iclass 19, count 0 2006.229.02:47:03.60#ibcon#flushed, iclass 19, count 0 2006.229.02:47:03.60#ibcon#about to write, iclass 19, count 0 2006.229.02:47:03.60#ibcon#wrote, iclass 19, count 0 2006.229.02:47:03.60#ibcon#about to read 3, iclass 19, count 0 2006.229.02:47:03.64#ibcon#read 3, iclass 19, count 0 2006.229.02:47:03.64#ibcon#about to read 4, iclass 19, count 0 2006.229.02:47:03.64#ibcon#read 4, iclass 19, count 0 2006.229.02:47:03.64#ibcon#about to read 5, iclass 19, count 0 2006.229.02:47:03.64#ibcon#read 5, iclass 19, count 0 2006.229.02:47:03.64#ibcon#about to read 6, iclass 19, count 0 2006.229.02:47:03.64#ibcon#read 6, iclass 19, count 0 2006.229.02:47:03.64#ibcon#end of sib2, iclass 19, count 0 2006.229.02:47:03.64#ibcon#*after write, iclass 19, count 0 2006.229.02:47:03.64#ibcon#*before return 0, iclass 19, count 0 2006.229.02:47:03.64#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:03.64#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:03.64#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:47:03.64#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:47:03.64$vck44/va=3,6 2006.229.02:47:03.64#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.02:47:03.64#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.02:47:03.64#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:03.64#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:03.69#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:03.69#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:03.69#ibcon#enter wrdev, iclass 21, count 2 2006.229.02:47:03.69#ibcon#first serial, iclass 21, count 2 2006.229.02:47:03.69#ibcon#enter sib2, iclass 21, count 2 2006.229.02:47:03.69#ibcon#flushed, iclass 21, count 2 2006.229.02:47:03.69#ibcon#about to write, iclass 21, count 2 2006.229.02:47:03.69#ibcon#wrote, iclass 21, count 2 2006.229.02:47:03.69#ibcon#about to read 3, iclass 21, count 2 2006.229.02:47:03.71#ibcon#read 3, iclass 21, count 2 2006.229.02:47:03.71#ibcon#about to read 4, iclass 21, count 2 2006.229.02:47:03.71#ibcon#read 4, iclass 21, count 2 2006.229.02:47:03.71#ibcon#about to read 5, iclass 21, count 2 2006.229.02:47:03.71#ibcon#read 5, iclass 21, count 2 2006.229.02:47:03.71#ibcon#about to read 6, iclass 21, count 2 2006.229.02:47:03.71#ibcon#read 6, iclass 21, count 2 2006.229.02:47:03.71#ibcon#end of sib2, iclass 21, count 2 2006.229.02:47:03.71#ibcon#*mode == 0, iclass 21, count 2 2006.229.02:47:03.71#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.02:47:03.71#ibcon#[25=AT03-06\r\n] 2006.229.02:47:03.71#ibcon#*before write, iclass 21, count 2 2006.229.02:47:03.71#ibcon#enter sib2, iclass 21, count 2 2006.229.02:47:03.71#ibcon#flushed, iclass 21, count 2 2006.229.02:47:03.71#ibcon#about to write, iclass 21, count 2 2006.229.02:47:03.71#ibcon#wrote, iclass 21, count 2 2006.229.02:47:03.71#ibcon#about to read 3, iclass 21, count 2 2006.229.02:47:03.74#ibcon#read 3, iclass 21, count 2 2006.229.02:47:03.74#ibcon#about to read 4, iclass 21, count 2 2006.229.02:47:03.74#ibcon#read 4, iclass 21, count 2 2006.229.02:47:03.74#ibcon#about to read 5, iclass 21, count 2 2006.229.02:47:03.74#ibcon#read 5, iclass 21, count 2 2006.229.02:47:03.74#ibcon#about to read 6, iclass 21, count 2 2006.229.02:47:03.74#ibcon#read 6, iclass 21, count 2 2006.229.02:47:03.74#ibcon#end of sib2, iclass 21, count 2 2006.229.02:47:03.74#ibcon#*after write, iclass 21, count 2 2006.229.02:47:03.74#ibcon#*before return 0, iclass 21, count 2 2006.229.02:47:03.74#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:03.74#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:03.74#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.02:47:03.74#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:03.74#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:03.86#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:03.86#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:03.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:47:03.86#ibcon#first serial, iclass 21, count 0 2006.229.02:47:03.86#ibcon#enter sib2, iclass 21, count 0 2006.229.02:47:03.86#ibcon#flushed, iclass 21, count 0 2006.229.02:47:03.86#ibcon#about to write, iclass 21, count 0 2006.229.02:47:03.86#ibcon#wrote, iclass 21, count 0 2006.229.02:47:03.86#ibcon#about to read 3, iclass 21, count 0 2006.229.02:47:03.88#ibcon#read 3, iclass 21, count 0 2006.229.02:47:03.88#ibcon#about to read 4, iclass 21, count 0 2006.229.02:47:03.88#ibcon#read 4, iclass 21, count 0 2006.229.02:47:03.88#ibcon#about to read 5, iclass 21, count 0 2006.229.02:47:03.88#ibcon#read 5, iclass 21, count 0 2006.229.02:47:03.88#ibcon#about to read 6, iclass 21, count 0 2006.229.02:47:03.88#ibcon#read 6, iclass 21, count 0 2006.229.02:47:03.88#ibcon#end of sib2, iclass 21, count 0 2006.229.02:47:03.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:47:03.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:47:03.88#ibcon#[25=USB\r\n] 2006.229.02:47:03.88#ibcon#*before write, iclass 21, count 0 2006.229.02:47:03.88#ibcon#enter sib2, iclass 21, count 0 2006.229.02:47:03.88#ibcon#flushed, iclass 21, count 0 2006.229.02:47:03.88#ibcon#about to write, iclass 21, count 0 2006.229.02:47:03.88#ibcon#wrote, iclass 21, count 0 2006.229.02:47:03.88#ibcon#about to read 3, iclass 21, count 0 2006.229.02:47:03.91#ibcon#read 3, iclass 21, count 0 2006.229.02:47:03.91#ibcon#about to read 4, iclass 21, count 0 2006.229.02:47:03.91#ibcon#read 4, iclass 21, count 0 2006.229.02:47:03.91#ibcon#about to read 5, iclass 21, count 0 2006.229.02:47:03.91#ibcon#read 5, iclass 21, count 0 2006.229.02:47:03.91#ibcon#about to read 6, iclass 21, count 0 2006.229.02:47:03.91#ibcon#read 6, iclass 21, count 0 2006.229.02:47:03.91#ibcon#end of sib2, iclass 21, count 0 2006.229.02:47:03.91#ibcon#*after write, iclass 21, count 0 2006.229.02:47:03.91#ibcon#*before return 0, iclass 21, count 0 2006.229.02:47:03.91#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:03.91#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:03.91#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:47:03.91#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:47:03.91$vck44/valo=4,624.99 2006.229.02:47:03.91#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.02:47:03.91#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.02:47:03.91#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:03.91#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:03.91#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:03.91#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:03.91#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:47:03.91#ibcon#first serial, iclass 23, count 0 2006.229.02:47:03.91#ibcon#enter sib2, iclass 23, count 0 2006.229.02:47:03.91#ibcon#flushed, iclass 23, count 0 2006.229.02:47:03.91#ibcon#about to write, iclass 23, count 0 2006.229.02:47:03.91#ibcon#wrote, iclass 23, count 0 2006.229.02:47:03.91#ibcon#about to read 3, iclass 23, count 0 2006.229.02:47:03.94#ibcon#read 3, iclass 23, count 0 2006.229.02:47:03.94#ibcon#about to read 4, iclass 23, count 0 2006.229.02:47:03.94#ibcon#read 4, iclass 23, count 0 2006.229.02:47:03.94#ibcon#about to read 5, iclass 23, count 0 2006.229.02:47:03.94#ibcon#read 5, iclass 23, count 0 2006.229.02:47:03.94#ibcon#about to read 6, iclass 23, count 0 2006.229.02:47:03.94#ibcon#read 6, iclass 23, count 0 2006.229.02:47:03.94#ibcon#end of sib2, iclass 23, count 0 2006.229.02:47:03.94#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:47:03.94#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:47:03.94#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:47:03.94#ibcon#*before write, iclass 23, count 0 2006.229.02:47:03.94#ibcon#enter sib2, iclass 23, count 0 2006.229.02:47:03.94#ibcon#flushed, iclass 23, count 0 2006.229.02:47:03.94#ibcon#about to write, iclass 23, count 0 2006.229.02:47:03.94#ibcon#wrote, iclass 23, count 0 2006.229.02:47:03.94#ibcon#about to read 3, iclass 23, count 0 2006.229.02:47:03.98#ibcon#read 3, iclass 23, count 0 2006.229.02:47:03.98#ibcon#about to read 4, iclass 23, count 0 2006.229.02:47:03.98#ibcon#read 4, iclass 23, count 0 2006.229.02:47:03.98#ibcon#about to read 5, iclass 23, count 0 2006.229.02:47:03.98#ibcon#read 5, iclass 23, count 0 2006.229.02:47:03.98#ibcon#about to read 6, iclass 23, count 0 2006.229.02:47:03.98#ibcon#read 6, iclass 23, count 0 2006.229.02:47:03.98#ibcon#end of sib2, iclass 23, count 0 2006.229.02:47:03.98#ibcon#*after write, iclass 23, count 0 2006.229.02:47:03.98#ibcon#*before return 0, iclass 23, count 0 2006.229.02:47:03.98#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:03.98#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:03.98#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:47:03.98#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:47:03.98$vck44/va=4,7 2006.229.02:47:03.98#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.02:47:03.98#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.02:47:03.98#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:03.98#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:04.03#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:04.03#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:04.03#ibcon#enter wrdev, iclass 25, count 2 2006.229.02:47:04.03#ibcon#first serial, iclass 25, count 2 2006.229.02:47:04.03#ibcon#enter sib2, iclass 25, count 2 2006.229.02:47:04.03#ibcon#flushed, iclass 25, count 2 2006.229.02:47:04.03#ibcon#about to write, iclass 25, count 2 2006.229.02:47:04.03#ibcon#wrote, iclass 25, count 2 2006.229.02:47:04.03#ibcon#about to read 3, iclass 25, count 2 2006.229.02:47:04.05#ibcon#read 3, iclass 25, count 2 2006.229.02:47:04.05#ibcon#about to read 4, iclass 25, count 2 2006.229.02:47:04.05#ibcon#read 4, iclass 25, count 2 2006.229.02:47:04.05#ibcon#about to read 5, iclass 25, count 2 2006.229.02:47:04.05#ibcon#read 5, iclass 25, count 2 2006.229.02:47:04.05#ibcon#about to read 6, iclass 25, count 2 2006.229.02:47:04.05#ibcon#read 6, iclass 25, count 2 2006.229.02:47:04.05#ibcon#end of sib2, iclass 25, count 2 2006.229.02:47:04.05#ibcon#*mode == 0, iclass 25, count 2 2006.229.02:47:04.05#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.02:47:04.05#ibcon#[25=AT04-07\r\n] 2006.229.02:47:04.05#ibcon#*before write, iclass 25, count 2 2006.229.02:47:04.05#ibcon#enter sib2, iclass 25, count 2 2006.229.02:47:04.05#ibcon#flushed, iclass 25, count 2 2006.229.02:47:04.05#ibcon#about to write, iclass 25, count 2 2006.229.02:47:04.05#ibcon#wrote, iclass 25, count 2 2006.229.02:47:04.05#ibcon#about to read 3, iclass 25, count 2 2006.229.02:47:04.08#ibcon#read 3, iclass 25, count 2 2006.229.02:47:04.08#ibcon#about to read 4, iclass 25, count 2 2006.229.02:47:04.08#ibcon#read 4, iclass 25, count 2 2006.229.02:47:04.08#ibcon#about to read 5, iclass 25, count 2 2006.229.02:47:04.08#ibcon#read 5, iclass 25, count 2 2006.229.02:47:04.08#ibcon#about to read 6, iclass 25, count 2 2006.229.02:47:04.08#ibcon#read 6, iclass 25, count 2 2006.229.02:47:04.08#ibcon#end of sib2, iclass 25, count 2 2006.229.02:47:04.08#ibcon#*after write, iclass 25, count 2 2006.229.02:47:04.08#ibcon#*before return 0, iclass 25, count 2 2006.229.02:47:04.08#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:04.08#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:04.08#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.02:47:04.08#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:04.08#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:04.20#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:04.20#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:04.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:47:04.20#ibcon#first serial, iclass 25, count 0 2006.229.02:47:04.20#ibcon#enter sib2, iclass 25, count 0 2006.229.02:47:04.20#ibcon#flushed, iclass 25, count 0 2006.229.02:47:04.20#ibcon#about to write, iclass 25, count 0 2006.229.02:47:04.20#ibcon#wrote, iclass 25, count 0 2006.229.02:47:04.20#ibcon#about to read 3, iclass 25, count 0 2006.229.02:47:04.22#ibcon#read 3, iclass 25, count 0 2006.229.02:47:04.22#ibcon#about to read 4, iclass 25, count 0 2006.229.02:47:04.22#ibcon#read 4, iclass 25, count 0 2006.229.02:47:04.22#ibcon#about to read 5, iclass 25, count 0 2006.229.02:47:04.22#ibcon#read 5, iclass 25, count 0 2006.229.02:47:04.22#ibcon#about to read 6, iclass 25, count 0 2006.229.02:47:04.22#ibcon#read 6, iclass 25, count 0 2006.229.02:47:04.22#ibcon#end of sib2, iclass 25, count 0 2006.229.02:47:04.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:47:04.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:47:04.22#ibcon#[25=USB\r\n] 2006.229.02:47:04.22#ibcon#*before write, iclass 25, count 0 2006.229.02:47:04.22#ibcon#enter sib2, iclass 25, count 0 2006.229.02:47:04.22#ibcon#flushed, iclass 25, count 0 2006.229.02:47:04.22#ibcon#about to write, iclass 25, count 0 2006.229.02:47:04.22#ibcon#wrote, iclass 25, count 0 2006.229.02:47:04.22#ibcon#about to read 3, iclass 25, count 0 2006.229.02:47:04.25#ibcon#read 3, iclass 25, count 0 2006.229.02:47:04.25#ibcon#about to read 4, iclass 25, count 0 2006.229.02:47:04.25#ibcon#read 4, iclass 25, count 0 2006.229.02:47:04.25#ibcon#about to read 5, iclass 25, count 0 2006.229.02:47:04.25#ibcon#read 5, iclass 25, count 0 2006.229.02:47:04.25#ibcon#about to read 6, iclass 25, count 0 2006.229.02:47:04.25#ibcon#read 6, iclass 25, count 0 2006.229.02:47:04.25#ibcon#end of sib2, iclass 25, count 0 2006.229.02:47:04.25#ibcon#*after write, iclass 25, count 0 2006.229.02:47:04.25#ibcon#*before return 0, iclass 25, count 0 2006.229.02:47:04.25#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:04.25#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:04.25#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:47:04.25#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:47:04.25$vck44/valo=5,734.99 2006.229.02:47:04.25#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.02:47:04.25#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.02:47:04.25#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:04.25#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:04.25#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:04.25#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:04.25#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:47:04.25#ibcon#first serial, iclass 27, count 0 2006.229.02:47:04.25#ibcon#enter sib2, iclass 27, count 0 2006.229.02:47:04.25#ibcon#flushed, iclass 27, count 0 2006.229.02:47:04.25#ibcon#about to write, iclass 27, count 0 2006.229.02:47:04.25#ibcon#wrote, iclass 27, count 0 2006.229.02:47:04.25#ibcon#about to read 3, iclass 27, count 0 2006.229.02:47:04.27#ibcon#read 3, iclass 27, count 0 2006.229.02:47:04.27#ibcon#about to read 4, iclass 27, count 0 2006.229.02:47:04.27#ibcon#read 4, iclass 27, count 0 2006.229.02:47:04.27#ibcon#about to read 5, iclass 27, count 0 2006.229.02:47:04.27#ibcon#read 5, iclass 27, count 0 2006.229.02:47:04.27#ibcon#about to read 6, iclass 27, count 0 2006.229.02:47:04.27#ibcon#read 6, iclass 27, count 0 2006.229.02:47:04.27#ibcon#end of sib2, iclass 27, count 0 2006.229.02:47:04.27#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:47:04.27#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:47:04.27#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:47:04.27#ibcon#*before write, iclass 27, count 0 2006.229.02:47:04.27#ibcon#enter sib2, iclass 27, count 0 2006.229.02:47:04.27#ibcon#flushed, iclass 27, count 0 2006.229.02:47:04.27#ibcon#about to write, iclass 27, count 0 2006.229.02:47:04.27#ibcon#wrote, iclass 27, count 0 2006.229.02:47:04.27#ibcon#about to read 3, iclass 27, count 0 2006.229.02:47:04.31#ibcon#read 3, iclass 27, count 0 2006.229.02:47:04.31#ibcon#about to read 4, iclass 27, count 0 2006.229.02:47:04.31#ibcon#read 4, iclass 27, count 0 2006.229.02:47:04.31#ibcon#about to read 5, iclass 27, count 0 2006.229.02:47:04.31#ibcon#read 5, iclass 27, count 0 2006.229.02:47:04.31#ibcon#about to read 6, iclass 27, count 0 2006.229.02:47:04.31#ibcon#read 6, iclass 27, count 0 2006.229.02:47:04.31#ibcon#end of sib2, iclass 27, count 0 2006.229.02:47:04.31#ibcon#*after write, iclass 27, count 0 2006.229.02:47:04.31#ibcon#*before return 0, iclass 27, count 0 2006.229.02:47:04.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:04.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:04.31#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:47:04.31#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:47:04.31$vck44/va=5,4 2006.229.02:47:04.31#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.02:47:04.31#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.02:47:04.31#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:04.31#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:04.37#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:04.37#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:04.37#ibcon#enter wrdev, iclass 29, count 2 2006.229.02:47:04.37#ibcon#first serial, iclass 29, count 2 2006.229.02:47:04.37#ibcon#enter sib2, iclass 29, count 2 2006.229.02:47:04.37#ibcon#flushed, iclass 29, count 2 2006.229.02:47:04.37#ibcon#about to write, iclass 29, count 2 2006.229.02:47:04.37#ibcon#wrote, iclass 29, count 2 2006.229.02:47:04.37#ibcon#about to read 3, iclass 29, count 2 2006.229.02:47:04.39#ibcon#read 3, iclass 29, count 2 2006.229.02:47:04.39#ibcon#about to read 4, iclass 29, count 2 2006.229.02:47:04.39#ibcon#read 4, iclass 29, count 2 2006.229.02:47:04.39#ibcon#about to read 5, iclass 29, count 2 2006.229.02:47:04.39#ibcon#read 5, iclass 29, count 2 2006.229.02:47:04.39#ibcon#about to read 6, iclass 29, count 2 2006.229.02:47:04.39#ibcon#read 6, iclass 29, count 2 2006.229.02:47:04.39#ibcon#end of sib2, iclass 29, count 2 2006.229.02:47:04.39#ibcon#*mode == 0, iclass 29, count 2 2006.229.02:47:04.39#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.02:47:04.39#ibcon#[25=AT05-04\r\n] 2006.229.02:47:04.39#ibcon#*before write, iclass 29, count 2 2006.229.02:47:04.39#ibcon#enter sib2, iclass 29, count 2 2006.229.02:47:04.39#ibcon#flushed, iclass 29, count 2 2006.229.02:47:04.39#ibcon#about to write, iclass 29, count 2 2006.229.02:47:04.39#ibcon#wrote, iclass 29, count 2 2006.229.02:47:04.39#ibcon#about to read 3, iclass 29, count 2 2006.229.02:47:04.43#ibcon#read 3, iclass 29, count 2 2006.229.02:47:04.43#ibcon#about to read 4, iclass 29, count 2 2006.229.02:47:04.43#ibcon#read 4, iclass 29, count 2 2006.229.02:47:04.43#ibcon#about to read 5, iclass 29, count 2 2006.229.02:47:04.43#ibcon#read 5, iclass 29, count 2 2006.229.02:47:04.43#ibcon#about to read 6, iclass 29, count 2 2006.229.02:47:04.43#ibcon#read 6, iclass 29, count 2 2006.229.02:47:04.43#ibcon#end of sib2, iclass 29, count 2 2006.229.02:47:04.43#ibcon#*after write, iclass 29, count 2 2006.229.02:47:04.43#ibcon#*before return 0, iclass 29, count 2 2006.229.02:47:04.43#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:04.43#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:04.43#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.02:47:04.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:04.43#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:04.54#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:04.54#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:04.54#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:47:04.54#ibcon#first serial, iclass 29, count 0 2006.229.02:47:04.54#ibcon#enter sib2, iclass 29, count 0 2006.229.02:47:04.54#ibcon#flushed, iclass 29, count 0 2006.229.02:47:04.54#ibcon#about to write, iclass 29, count 0 2006.229.02:47:04.54#ibcon#wrote, iclass 29, count 0 2006.229.02:47:04.54#ibcon#about to read 3, iclass 29, count 0 2006.229.02:47:04.56#ibcon#read 3, iclass 29, count 0 2006.229.02:47:04.56#ibcon#about to read 4, iclass 29, count 0 2006.229.02:47:04.56#ibcon#read 4, iclass 29, count 0 2006.229.02:47:04.56#ibcon#about to read 5, iclass 29, count 0 2006.229.02:47:04.56#ibcon#read 5, iclass 29, count 0 2006.229.02:47:04.56#ibcon#about to read 6, iclass 29, count 0 2006.229.02:47:04.56#ibcon#read 6, iclass 29, count 0 2006.229.02:47:04.56#ibcon#end of sib2, iclass 29, count 0 2006.229.02:47:04.56#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:47:04.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:47:04.56#ibcon#[25=USB\r\n] 2006.229.02:47:04.56#ibcon#*before write, iclass 29, count 0 2006.229.02:47:04.56#ibcon#enter sib2, iclass 29, count 0 2006.229.02:47:04.56#ibcon#flushed, iclass 29, count 0 2006.229.02:47:04.56#ibcon#about to write, iclass 29, count 0 2006.229.02:47:04.56#ibcon#wrote, iclass 29, count 0 2006.229.02:47:04.56#ibcon#about to read 3, iclass 29, count 0 2006.229.02:47:04.59#ibcon#read 3, iclass 29, count 0 2006.229.02:47:04.59#ibcon#about to read 4, iclass 29, count 0 2006.229.02:47:04.59#ibcon#read 4, iclass 29, count 0 2006.229.02:47:04.59#ibcon#about to read 5, iclass 29, count 0 2006.229.02:47:04.59#ibcon#read 5, iclass 29, count 0 2006.229.02:47:04.59#ibcon#about to read 6, iclass 29, count 0 2006.229.02:47:04.59#ibcon#read 6, iclass 29, count 0 2006.229.02:47:04.59#ibcon#end of sib2, iclass 29, count 0 2006.229.02:47:04.59#ibcon#*after write, iclass 29, count 0 2006.229.02:47:04.59#ibcon#*before return 0, iclass 29, count 0 2006.229.02:47:04.59#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:04.59#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:04.59#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:47:04.59#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:47:04.59$vck44/valo=6,814.99 2006.229.02:47:04.59#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.02:47:04.59#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.02:47:04.59#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:04.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:04.59#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:04.59#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:04.59#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:47:04.59#ibcon#first serial, iclass 31, count 0 2006.229.02:47:04.59#ibcon#enter sib2, iclass 31, count 0 2006.229.02:47:04.59#ibcon#flushed, iclass 31, count 0 2006.229.02:47:04.59#ibcon#about to write, iclass 31, count 0 2006.229.02:47:04.59#ibcon#wrote, iclass 31, count 0 2006.229.02:47:04.59#ibcon#about to read 3, iclass 31, count 0 2006.229.02:47:04.61#ibcon#read 3, iclass 31, count 0 2006.229.02:47:04.61#ibcon#about to read 4, iclass 31, count 0 2006.229.02:47:04.61#ibcon#read 4, iclass 31, count 0 2006.229.02:47:04.61#ibcon#about to read 5, iclass 31, count 0 2006.229.02:47:04.61#ibcon#read 5, iclass 31, count 0 2006.229.02:47:04.61#ibcon#about to read 6, iclass 31, count 0 2006.229.02:47:04.61#ibcon#read 6, iclass 31, count 0 2006.229.02:47:04.61#ibcon#end of sib2, iclass 31, count 0 2006.229.02:47:04.61#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:47:04.61#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:47:04.61#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:47:04.61#ibcon#*before write, iclass 31, count 0 2006.229.02:47:04.61#ibcon#enter sib2, iclass 31, count 0 2006.229.02:47:04.61#ibcon#flushed, iclass 31, count 0 2006.229.02:47:04.61#ibcon#about to write, iclass 31, count 0 2006.229.02:47:04.61#ibcon#wrote, iclass 31, count 0 2006.229.02:47:04.61#ibcon#about to read 3, iclass 31, count 0 2006.229.02:47:04.65#ibcon#read 3, iclass 31, count 0 2006.229.02:47:04.65#ibcon#about to read 4, iclass 31, count 0 2006.229.02:47:04.65#ibcon#read 4, iclass 31, count 0 2006.229.02:47:04.65#ibcon#about to read 5, iclass 31, count 0 2006.229.02:47:04.65#ibcon#read 5, iclass 31, count 0 2006.229.02:47:04.65#ibcon#about to read 6, iclass 31, count 0 2006.229.02:47:04.65#ibcon#read 6, iclass 31, count 0 2006.229.02:47:04.65#ibcon#end of sib2, iclass 31, count 0 2006.229.02:47:04.65#ibcon#*after write, iclass 31, count 0 2006.229.02:47:04.65#ibcon#*before return 0, iclass 31, count 0 2006.229.02:47:04.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:04.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:04.65#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:47:04.65#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:47:04.65$vck44/va=6,4 2006.229.02:47:04.65#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.02:47:04.65#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.02:47:04.65#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:04.65#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:04.71#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:04.71#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:04.71#ibcon#enter wrdev, iclass 33, count 2 2006.229.02:47:04.71#ibcon#first serial, iclass 33, count 2 2006.229.02:47:04.71#ibcon#enter sib2, iclass 33, count 2 2006.229.02:47:04.71#ibcon#flushed, iclass 33, count 2 2006.229.02:47:04.71#ibcon#about to write, iclass 33, count 2 2006.229.02:47:04.71#ibcon#wrote, iclass 33, count 2 2006.229.02:47:04.71#ibcon#about to read 3, iclass 33, count 2 2006.229.02:47:04.73#ibcon#read 3, iclass 33, count 2 2006.229.02:47:04.73#ibcon#about to read 4, iclass 33, count 2 2006.229.02:47:04.73#ibcon#read 4, iclass 33, count 2 2006.229.02:47:04.73#ibcon#about to read 5, iclass 33, count 2 2006.229.02:47:04.73#ibcon#read 5, iclass 33, count 2 2006.229.02:47:04.73#ibcon#about to read 6, iclass 33, count 2 2006.229.02:47:04.73#ibcon#read 6, iclass 33, count 2 2006.229.02:47:04.73#ibcon#end of sib2, iclass 33, count 2 2006.229.02:47:04.73#ibcon#*mode == 0, iclass 33, count 2 2006.229.02:47:04.73#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.02:47:04.73#ibcon#[25=AT06-04\r\n] 2006.229.02:47:04.73#ibcon#*before write, iclass 33, count 2 2006.229.02:47:04.73#ibcon#enter sib2, iclass 33, count 2 2006.229.02:47:04.73#ibcon#flushed, iclass 33, count 2 2006.229.02:47:04.73#ibcon#about to write, iclass 33, count 2 2006.229.02:47:04.73#ibcon#wrote, iclass 33, count 2 2006.229.02:47:04.73#ibcon#about to read 3, iclass 33, count 2 2006.229.02:47:04.76#ibcon#read 3, iclass 33, count 2 2006.229.02:47:04.76#ibcon#about to read 4, iclass 33, count 2 2006.229.02:47:04.76#ibcon#read 4, iclass 33, count 2 2006.229.02:47:04.76#ibcon#about to read 5, iclass 33, count 2 2006.229.02:47:04.76#ibcon#read 5, iclass 33, count 2 2006.229.02:47:04.76#ibcon#about to read 6, iclass 33, count 2 2006.229.02:47:04.76#ibcon#read 6, iclass 33, count 2 2006.229.02:47:04.76#ibcon#end of sib2, iclass 33, count 2 2006.229.02:47:04.76#ibcon#*after write, iclass 33, count 2 2006.229.02:47:04.76#ibcon#*before return 0, iclass 33, count 2 2006.229.02:47:04.76#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:04.76#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:04.76#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.02:47:04.76#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:04.76#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:04.88#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:04.88#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:04.88#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:47:04.88#ibcon#first serial, iclass 33, count 0 2006.229.02:47:04.88#ibcon#enter sib2, iclass 33, count 0 2006.229.02:47:04.88#ibcon#flushed, iclass 33, count 0 2006.229.02:47:04.88#ibcon#about to write, iclass 33, count 0 2006.229.02:47:04.88#ibcon#wrote, iclass 33, count 0 2006.229.02:47:04.88#ibcon#about to read 3, iclass 33, count 0 2006.229.02:47:04.90#ibcon#read 3, iclass 33, count 0 2006.229.02:47:04.90#ibcon#about to read 4, iclass 33, count 0 2006.229.02:47:04.90#ibcon#read 4, iclass 33, count 0 2006.229.02:47:04.90#ibcon#about to read 5, iclass 33, count 0 2006.229.02:47:04.90#ibcon#read 5, iclass 33, count 0 2006.229.02:47:04.90#ibcon#about to read 6, iclass 33, count 0 2006.229.02:47:04.90#ibcon#read 6, iclass 33, count 0 2006.229.02:47:04.90#ibcon#end of sib2, iclass 33, count 0 2006.229.02:47:04.90#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:47:04.90#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:47:04.90#ibcon#[25=USB\r\n] 2006.229.02:47:04.90#ibcon#*before write, iclass 33, count 0 2006.229.02:47:04.90#ibcon#enter sib2, iclass 33, count 0 2006.229.02:47:04.90#ibcon#flushed, iclass 33, count 0 2006.229.02:47:04.90#ibcon#about to write, iclass 33, count 0 2006.229.02:47:04.90#ibcon#wrote, iclass 33, count 0 2006.229.02:47:04.90#ibcon#about to read 3, iclass 33, count 0 2006.229.02:47:04.93#ibcon#read 3, iclass 33, count 0 2006.229.02:47:04.93#ibcon#about to read 4, iclass 33, count 0 2006.229.02:47:04.93#ibcon#read 4, iclass 33, count 0 2006.229.02:47:04.93#ibcon#about to read 5, iclass 33, count 0 2006.229.02:47:04.93#ibcon#read 5, iclass 33, count 0 2006.229.02:47:04.93#ibcon#about to read 6, iclass 33, count 0 2006.229.02:47:04.93#ibcon#read 6, iclass 33, count 0 2006.229.02:47:04.93#ibcon#end of sib2, iclass 33, count 0 2006.229.02:47:04.93#ibcon#*after write, iclass 33, count 0 2006.229.02:47:04.93#ibcon#*before return 0, iclass 33, count 0 2006.229.02:47:04.93#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:04.93#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:04.93#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:47:04.93#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:47:04.93$vck44/valo=7,864.99 2006.229.02:47:04.93#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.02:47:04.93#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.02:47:04.93#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:04.93#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:04.93#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:04.93#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:04.93#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:47:04.93#ibcon#first serial, iclass 35, count 0 2006.229.02:47:04.93#ibcon#enter sib2, iclass 35, count 0 2006.229.02:47:04.93#ibcon#flushed, iclass 35, count 0 2006.229.02:47:04.93#ibcon#about to write, iclass 35, count 0 2006.229.02:47:04.93#ibcon#wrote, iclass 35, count 0 2006.229.02:47:04.93#ibcon#about to read 3, iclass 35, count 0 2006.229.02:47:04.95#ibcon#read 3, iclass 35, count 0 2006.229.02:47:04.95#ibcon#about to read 4, iclass 35, count 0 2006.229.02:47:04.95#ibcon#read 4, iclass 35, count 0 2006.229.02:47:04.95#ibcon#about to read 5, iclass 35, count 0 2006.229.02:47:04.95#ibcon#read 5, iclass 35, count 0 2006.229.02:47:04.95#ibcon#about to read 6, iclass 35, count 0 2006.229.02:47:04.95#ibcon#read 6, iclass 35, count 0 2006.229.02:47:04.95#ibcon#end of sib2, iclass 35, count 0 2006.229.02:47:04.95#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:47:04.95#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:47:04.95#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:47:04.95#ibcon#*before write, iclass 35, count 0 2006.229.02:47:04.95#ibcon#enter sib2, iclass 35, count 0 2006.229.02:47:04.95#ibcon#flushed, iclass 35, count 0 2006.229.02:47:04.95#ibcon#about to write, iclass 35, count 0 2006.229.02:47:04.95#ibcon#wrote, iclass 35, count 0 2006.229.02:47:04.95#ibcon#about to read 3, iclass 35, count 0 2006.229.02:47:04.99#ibcon#read 3, iclass 35, count 0 2006.229.02:47:04.99#ibcon#about to read 4, iclass 35, count 0 2006.229.02:47:04.99#ibcon#read 4, iclass 35, count 0 2006.229.02:47:04.99#ibcon#about to read 5, iclass 35, count 0 2006.229.02:47:04.99#ibcon#read 5, iclass 35, count 0 2006.229.02:47:04.99#ibcon#about to read 6, iclass 35, count 0 2006.229.02:47:04.99#ibcon#read 6, iclass 35, count 0 2006.229.02:47:04.99#ibcon#end of sib2, iclass 35, count 0 2006.229.02:47:04.99#ibcon#*after write, iclass 35, count 0 2006.229.02:47:04.99#ibcon#*before return 0, iclass 35, count 0 2006.229.02:47:04.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:04.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:04.99#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:47:04.99#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:47:04.99$vck44/va=7,5 2006.229.02:47:04.99#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.02:47:04.99#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.02:47:04.99#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:04.99#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:05.05#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:05.05#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:05.05#ibcon#enter wrdev, iclass 37, count 2 2006.229.02:47:05.05#ibcon#first serial, iclass 37, count 2 2006.229.02:47:05.05#ibcon#enter sib2, iclass 37, count 2 2006.229.02:47:05.05#ibcon#flushed, iclass 37, count 2 2006.229.02:47:05.05#ibcon#about to write, iclass 37, count 2 2006.229.02:47:05.05#ibcon#wrote, iclass 37, count 2 2006.229.02:47:05.05#ibcon#about to read 3, iclass 37, count 2 2006.229.02:47:05.07#ibcon#read 3, iclass 37, count 2 2006.229.02:47:05.07#ibcon#about to read 4, iclass 37, count 2 2006.229.02:47:05.07#ibcon#read 4, iclass 37, count 2 2006.229.02:47:05.07#ibcon#about to read 5, iclass 37, count 2 2006.229.02:47:05.07#ibcon#read 5, iclass 37, count 2 2006.229.02:47:05.07#ibcon#about to read 6, iclass 37, count 2 2006.229.02:47:05.07#ibcon#read 6, iclass 37, count 2 2006.229.02:47:05.07#ibcon#end of sib2, iclass 37, count 2 2006.229.02:47:05.07#ibcon#*mode == 0, iclass 37, count 2 2006.229.02:47:05.07#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.02:47:05.07#ibcon#[25=AT07-05\r\n] 2006.229.02:47:05.07#ibcon#*before write, iclass 37, count 2 2006.229.02:47:05.07#ibcon#enter sib2, iclass 37, count 2 2006.229.02:47:05.07#ibcon#flushed, iclass 37, count 2 2006.229.02:47:05.07#ibcon#about to write, iclass 37, count 2 2006.229.02:47:05.07#ibcon#wrote, iclass 37, count 2 2006.229.02:47:05.07#ibcon#about to read 3, iclass 37, count 2 2006.229.02:47:05.10#ibcon#read 3, iclass 37, count 2 2006.229.02:47:05.10#ibcon#about to read 4, iclass 37, count 2 2006.229.02:47:05.10#ibcon#read 4, iclass 37, count 2 2006.229.02:47:05.10#ibcon#about to read 5, iclass 37, count 2 2006.229.02:47:05.10#ibcon#read 5, iclass 37, count 2 2006.229.02:47:05.10#ibcon#about to read 6, iclass 37, count 2 2006.229.02:47:05.10#ibcon#read 6, iclass 37, count 2 2006.229.02:47:05.10#ibcon#end of sib2, iclass 37, count 2 2006.229.02:47:05.10#ibcon#*after write, iclass 37, count 2 2006.229.02:47:05.10#ibcon#*before return 0, iclass 37, count 2 2006.229.02:47:05.10#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:05.10#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:05.10#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.02:47:05.10#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:05.10#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:05.22#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:05.22#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:05.22#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:47:05.22#ibcon#first serial, iclass 37, count 0 2006.229.02:47:05.22#ibcon#enter sib2, iclass 37, count 0 2006.229.02:47:05.22#ibcon#flushed, iclass 37, count 0 2006.229.02:47:05.22#ibcon#about to write, iclass 37, count 0 2006.229.02:47:05.22#ibcon#wrote, iclass 37, count 0 2006.229.02:47:05.22#ibcon#about to read 3, iclass 37, count 0 2006.229.02:47:05.26#ibcon#read 3, iclass 37, count 0 2006.229.02:47:05.26#ibcon#about to read 4, iclass 37, count 0 2006.229.02:47:05.26#ibcon#read 4, iclass 37, count 0 2006.229.02:47:05.26#ibcon#about to read 5, iclass 37, count 0 2006.229.02:47:05.26#ibcon#read 5, iclass 37, count 0 2006.229.02:47:05.26#ibcon#about to read 6, iclass 37, count 0 2006.229.02:47:05.26#ibcon#read 6, iclass 37, count 0 2006.229.02:47:05.26#ibcon#end of sib2, iclass 37, count 0 2006.229.02:47:05.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:47:05.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:47:05.26#ibcon#[25=USB\r\n] 2006.229.02:47:05.26#ibcon#*before write, iclass 37, count 0 2006.229.02:47:05.26#ibcon#enter sib2, iclass 37, count 0 2006.229.02:47:05.26#ibcon#flushed, iclass 37, count 0 2006.229.02:47:05.26#ibcon#about to write, iclass 37, count 0 2006.229.02:47:05.26#ibcon#wrote, iclass 37, count 0 2006.229.02:47:05.26#ibcon#about to read 3, iclass 37, count 0 2006.229.02:47:05.28#ibcon#read 3, iclass 37, count 0 2006.229.02:47:05.28#ibcon#about to read 4, iclass 37, count 0 2006.229.02:47:05.28#ibcon#read 4, iclass 37, count 0 2006.229.02:47:05.28#ibcon#about to read 5, iclass 37, count 0 2006.229.02:47:05.28#ibcon#read 5, iclass 37, count 0 2006.229.02:47:05.28#ibcon#about to read 6, iclass 37, count 0 2006.229.02:47:05.28#ibcon#read 6, iclass 37, count 0 2006.229.02:47:05.28#ibcon#end of sib2, iclass 37, count 0 2006.229.02:47:05.28#ibcon#*after write, iclass 37, count 0 2006.229.02:47:05.28#ibcon#*before return 0, iclass 37, count 0 2006.229.02:47:05.28#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:05.28#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:05.28#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:47:05.28#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:47:05.28$vck44/valo=8,884.99 2006.229.02:47:05.28#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.02:47:05.28#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.02:47:05.28#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:05.28#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:05.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:05.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:05.28#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:47:05.28#ibcon#first serial, iclass 39, count 0 2006.229.02:47:05.28#ibcon#enter sib2, iclass 39, count 0 2006.229.02:47:05.28#ibcon#flushed, iclass 39, count 0 2006.229.02:47:05.28#ibcon#about to write, iclass 39, count 0 2006.229.02:47:05.28#ibcon#wrote, iclass 39, count 0 2006.229.02:47:05.28#ibcon#about to read 3, iclass 39, count 0 2006.229.02:47:05.30#ibcon#read 3, iclass 39, count 0 2006.229.02:47:05.30#ibcon#about to read 4, iclass 39, count 0 2006.229.02:47:05.30#ibcon#read 4, iclass 39, count 0 2006.229.02:47:05.30#ibcon#about to read 5, iclass 39, count 0 2006.229.02:47:05.30#ibcon#read 5, iclass 39, count 0 2006.229.02:47:05.30#ibcon#about to read 6, iclass 39, count 0 2006.229.02:47:05.30#ibcon#read 6, iclass 39, count 0 2006.229.02:47:05.30#ibcon#end of sib2, iclass 39, count 0 2006.229.02:47:05.30#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:47:05.30#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:47:05.30#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:47:05.30#ibcon#*before write, iclass 39, count 0 2006.229.02:47:05.30#ibcon#enter sib2, iclass 39, count 0 2006.229.02:47:05.30#ibcon#flushed, iclass 39, count 0 2006.229.02:47:05.30#ibcon#about to write, iclass 39, count 0 2006.229.02:47:05.30#ibcon#wrote, iclass 39, count 0 2006.229.02:47:05.30#ibcon#about to read 3, iclass 39, count 0 2006.229.02:47:05.34#ibcon#read 3, iclass 39, count 0 2006.229.02:47:05.34#ibcon#about to read 4, iclass 39, count 0 2006.229.02:47:05.34#ibcon#read 4, iclass 39, count 0 2006.229.02:47:05.34#ibcon#about to read 5, iclass 39, count 0 2006.229.02:47:05.34#ibcon#read 5, iclass 39, count 0 2006.229.02:47:05.34#ibcon#about to read 6, iclass 39, count 0 2006.229.02:47:05.34#ibcon#read 6, iclass 39, count 0 2006.229.02:47:05.34#ibcon#end of sib2, iclass 39, count 0 2006.229.02:47:05.34#ibcon#*after write, iclass 39, count 0 2006.229.02:47:05.34#ibcon#*before return 0, iclass 39, count 0 2006.229.02:47:05.34#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:05.34#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:05.34#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:47:05.34#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:47:05.34$vck44/va=8,6 2006.229.02:47:05.34#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.02:47:05.34#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.02:47:05.34#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:05.34#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:47:05.40#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:47:05.40#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:47:05.40#ibcon#enter wrdev, iclass 3, count 2 2006.229.02:47:05.40#ibcon#first serial, iclass 3, count 2 2006.229.02:47:05.40#ibcon#enter sib2, iclass 3, count 2 2006.229.02:47:05.40#ibcon#flushed, iclass 3, count 2 2006.229.02:47:05.40#ibcon#about to write, iclass 3, count 2 2006.229.02:47:05.40#ibcon#wrote, iclass 3, count 2 2006.229.02:47:05.40#ibcon#about to read 3, iclass 3, count 2 2006.229.02:47:05.42#ibcon#read 3, iclass 3, count 2 2006.229.02:47:05.42#ibcon#about to read 4, iclass 3, count 2 2006.229.02:47:05.42#ibcon#read 4, iclass 3, count 2 2006.229.02:47:05.42#ibcon#about to read 5, iclass 3, count 2 2006.229.02:47:05.42#ibcon#read 5, iclass 3, count 2 2006.229.02:47:05.42#ibcon#about to read 6, iclass 3, count 2 2006.229.02:47:05.42#ibcon#read 6, iclass 3, count 2 2006.229.02:47:05.42#ibcon#end of sib2, iclass 3, count 2 2006.229.02:47:05.42#ibcon#*mode == 0, iclass 3, count 2 2006.229.02:47:05.42#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.02:47:05.42#ibcon#[25=AT08-06\r\n] 2006.229.02:47:05.42#ibcon#*before write, iclass 3, count 2 2006.229.02:47:05.42#ibcon#enter sib2, iclass 3, count 2 2006.229.02:47:05.42#ibcon#flushed, iclass 3, count 2 2006.229.02:47:05.42#ibcon#about to write, iclass 3, count 2 2006.229.02:47:05.42#ibcon#wrote, iclass 3, count 2 2006.229.02:47:05.42#ibcon#about to read 3, iclass 3, count 2 2006.229.02:47:05.45#ibcon#read 3, iclass 3, count 2 2006.229.02:47:05.45#ibcon#about to read 4, iclass 3, count 2 2006.229.02:47:05.45#ibcon#read 4, iclass 3, count 2 2006.229.02:47:05.45#ibcon#about to read 5, iclass 3, count 2 2006.229.02:47:05.45#ibcon#read 5, iclass 3, count 2 2006.229.02:47:05.45#ibcon#about to read 6, iclass 3, count 2 2006.229.02:47:05.45#ibcon#read 6, iclass 3, count 2 2006.229.02:47:05.45#ibcon#end of sib2, iclass 3, count 2 2006.229.02:47:05.45#ibcon#*after write, iclass 3, count 2 2006.229.02:47:05.45#ibcon#*before return 0, iclass 3, count 2 2006.229.02:47:05.45#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:47:05.45#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.02:47:05.45#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.02:47:05.45#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:05.45#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:47:05.57#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:47:05.57#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:47:05.57#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:47:05.57#ibcon#first serial, iclass 3, count 0 2006.229.02:47:05.57#ibcon#enter sib2, iclass 3, count 0 2006.229.02:47:05.57#ibcon#flushed, iclass 3, count 0 2006.229.02:47:05.57#ibcon#about to write, iclass 3, count 0 2006.229.02:47:05.57#ibcon#wrote, iclass 3, count 0 2006.229.02:47:05.57#ibcon#about to read 3, iclass 3, count 0 2006.229.02:47:05.59#ibcon#read 3, iclass 3, count 0 2006.229.02:47:05.59#ibcon#about to read 4, iclass 3, count 0 2006.229.02:47:05.59#ibcon#read 4, iclass 3, count 0 2006.229.02:47:05.59#ibcon#about to read 5, iclass 3, count 0 2006.229.02:47:05.59#ibcon#read 5, iclass 3, count 0 2006.229.02:47:05.59#ibcon#about to read 6, iclass 3, count 0 2006.229.02:47:05.59#ibcon#read 6, iclass 3, count 0 2006.229.02:47:05.59#ibcon#end of sib2, iclass 3, count 0 2006.229.02:47:05.59#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:47:05.59#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:47:05.59#ibcon#[25=USB\r\n] 2006.229.02:47:05.59#ibcon#*before write, iclass 3, count 0 2006.229.02:47:05.59#ibcon#enter sib2, iclass 3, count 0 2006.229.02:47:05.59#ibcon#flushed, iclass 3, count 0 2006.229.02:47:05.59#ibcon#about to write, iclass 3, count 0 2006.229.02:47:05.59#ibcon#wrote, iclass 3, count 0 2006.229.02:47:05.59#ibcon#about to read 3, iclass 3, count 0 2006.229.02:47:05.62#ibcon#read 3, iclass 3, count 0 2006.229.02:47:05.62#ibcon#about to read 4, iclass 3, count 0 2006.229.02:47:05.62#ibcon#read 4, iclass 3, count 0 2006.229.02:47:05.62#ibcon#about to read 5, iclass 3, count 0 2006.229.02:47:05.62#ibcon#read 5, iclass 3, count 0 2006.229.02:47:05.62#ibcon#about to read 6, iclass 3, count 0 2006.229.02:47:05.62#ibcon#read 6, iclass 3, count 0 2006.229.02:47:05.62#ibcon#end of sib2, iclass 3, count 0 2006.229.02:47:05.62#ibcon#*after write, iclass 3, count 0 2006.229.02:47:05.62#ibcon#*before return 0, iclass 3, count 0 2006.229.02:47:05.62#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:47:05.62#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.02:47:05.62#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:47:05.62#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:47:05.62$vck44/vblo=1,629.99 2006.229.02:47:05.62#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.02:47:05.62#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.02:47:05.62#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:05.62#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:47:05.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:47:05.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:47:05.62#ibcon#enter wrdev, iclass 5, count 0 2006.229.02:47:05.62#ibcon#first serial, iclass 5, count 0 2006.229.02:47:05.62#ibcon#enter sib2, iclass 5, count 0 2006.229.02:47:05.62#ibcon#flushed, iclass 5, count 0 2006.229.02:47:05.62#ibcon#about to write, iclass 5, count 0 2006.229.02:47:05.62#ibcon#wrote, iclass 5, count 0 2006.229.02:47:05.62#ibcon#about to read 3, iclass 5, count 0 2006.229.02:47:05.64#ibcon#read 3, iclass 5, count 0 2006.229.02:47:05.64#ibcon#about to read 4, iclass 5, count 0 2006.229.02:47:05.64#ibcon#read 4, iclass 5, count 0 2006.229.02:47:05.64#ibcon#about to read 5, iclass 5, count 0 2006.229.02:47:05.64#ibcon#read 5, iclass 5, count 0 2006.229.02:47:05.64#ibcon#about to read 6, iclass 5, count 0 2006.229.02:47:05.64#ibcon#read 6, iclass 5, count 0 2006.229.02:47:05.64#ibcon#end of sib2, iclass 5, count 0 2006.229.02:47:05.64#ibcon#*mode == 0, iclass 5, count 0 2006.229.02:47:05.64#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.02:47:05.64#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:47:05.64#ibcon#*before write, iclass 5, count 0 2006.229.02:47:05.64#ibcon#enter sib2, iclass 5, count 0 2006.229.02:47:05.64#ibcon#flushed, iclass 5, count 0 2006.229.02:47:05.64#ibcon#about to write, iclass 5, count 0 2006.229.02:47:05.64#ibcon#wrote, iclass 5, count 0 2006.229.02:47:05.64#ibcon#about to read 3, iclass 5, count 0 2006.229.02:47:05.68#ibcon#read 3, iclass 5, count 0 2006.229.02:47:05.68#ibcon#about to read 4, iclass 5, count 0 2006.229.02:47:05.68#ibcon#read 4, iclass 5, count 0 2006.229.02:47:05.68#ibcon#about to read 5, iclass 5, count 0 2006.229.02:47:05.68#ibcon#read 5, iclass 5, count 0 2006.229.02:47:05.68#ibcon#about to read 6, iclass 5, count 0 2006.229.02:47:05.68#ibcon#read 6, iclass 5, count 0 2006.229.02:47:05.68#ibcon#end of sib2, iclass 5, count 0 2006.229.02:47:05.68#ibcon#*after write, iclass 5, count 0 2006.229.02:47:05.68#ibcon#*before return 0, iclass 5, count 0 2006.229.02:47:05.68#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:47:05.68#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.02:47:05.68#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.02:47:05.68#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.02:47:05.68$vck44/vb=1,4 2006.229.02:47:05.68#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.02:47:05.68#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.02:47:05.68#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:05.68#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:47:05.68#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:47:05.68#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:47:05.68#ibcon#enter wrdev, iclass 7, count 2 2006.229.02:47:05.68#ibcon#first serial, iclass 7, count 2 2006.229.02:47:05.68#ibcon#enter sib2, iclass 7, count 2 2006.229.02:47:05.68#ibcon#flushed, iclass 7, count 2 2006.229.02:47:05.68#ibcon#about to write, iclass 7, count 2 2006.229.02:47:05.68#ibcon#wrote, iclass 7, count 2 2006.229.02:47:05.68#ibcon#about to read 3, iclass 7, count 2 2006.229.02:47:05.70#ibcon#read 3, iclass 7, count 2 2006.229.02:47:05.70#ibcon#about to read 4, iclass 7, count 2 2006.229.02:47:05.70#ibcon#read 4, iclass 7, count 2 2006.229.02:47:05.70#ibcon#about to read 5, iclass 7, count 2 2006.229.02:47:05.70#ibcon#read 5, iclass 7, count 2 2006.229.02:47:05.70#ibcon#about to read 6, iclass 7, count 2 2006.229.02:47:05.70#ibcon#read 6, iclass 7, count 2 2006.229.02:47:05.70#ibcon#end of sib2, iclass 7, count 2 2006.229.02:47:05.70#ibcon#*mode == 0, iclass 7, count 2 2006.229.02:47:05.70#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.02:47:05.70#ibcon#[27=AT01-04\r\n] 2006.229.02:47:05.70#ibcon#*before write, iclass 7, count 2 2006.229.02:47:05.70#ibcon#enter sib2, iclass 7, count 2 2006.229.02:47:05.70#ibcon#flushed, iclass 7, count 2 2006.229.02:47:05.70#ibcon#about to write, iclass 7, count 2 2006.229.02:47:05.70#ibcon#wrote, iclass 7, count 2 2006.229.02:47:05.70#ibcon#about to read 3, iclass 7, count 2 2006.229.02:47:05.73#ibcon#read 3, iclass 7, count 2 2006.229.02:47:05.73#ibcon#about to read 4, iclass 7, count 2 2006.229.02:47:05.73#ibcon#read 4, iclass 7, count 2 2006.229.02:47:05.73#ibcon#about to read 5, iclass 7, count 2 2006.229.02:47:05.73#ibcon#read 5, iclass 7, count 2 2006.229.02:47:05.73#ibcon#about to read 6, iclass 7, count 2 2006.229.02:47:05.73#ibcon#read 6, iclass 7, count 2 2006.229.02:47:05.73#ibcon#end of sib2, iclass 7, count 2 2006.229.02:47:05.73#ibcon#*after write, iclass 7, count 2 2006.229.02:47:05.73#ibcon#*before return 0, iclass 7, count 2 2006.229.02:47:05.73#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:47:05.73#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.02:47:05.73#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.02:47:05.73#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:05.73#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:47:05.85#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:47:05.85#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:47:05.85#ibcon#enter wrdev, iclass 7, count 0 2006.229.02:47:05.85#ibcon#first serial, iclass 7, count 0 2006.229.02:47:05.85#ibcon#enter sib2, iclass 7, count 0 2006.229.02:47:05.85#ibcon#flushed, iclass 7, count 0 2006.229.02:47:05.85#ibcon#about to write, iclass 7, count 0 2006.229.02:47:05.85#ibcon#wrote, iclass 7, count 0 2006.229.02:47:05.85#ibcon#about to read 3, iclass 7, count 0 2006.229.02:47:05.87#ibcon#read 3, iclass 7, count 0 2006.229.02:47:05.87#ibcon#about to read 4, iclass 7, count 0 2006.229.02:47:05.87#ibcon#read 4, iclass 7, count 0 2006.229.02:47:05.87#ibcon#about to read 5, iclass 7, count 0 2006.229.02:47:05.87#ibcon#read 5, iclass 7, count 0 2006.229.02:47:05.87#ibcon#about to read 6, iclass 7, count 0 2006.229.02:47:05.87#ibcon#read 6, iclass 7, count 0 2006.229.02:47:05.87#ibcon#end of sib2, iclass 7, count 0 2006.229.02:47:05.87#ibcon#*mode == 0, iclass 7, count 0 2006.229.02:47:05.87#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.02:47:05.87#ibcon#[27=USB\r\n] 2006.229.02:47:05.87#ibcon#*before write, iclass 7, count 0 2006.229.02:47:05.87#ibcon#enter sib2, iclass 7, count 0 2006.229.02:47:05.87#ibcon#flushed, iclass 7, count 0 2006.229.02:47:05.87#ibcon#about to write, iclass 7, count 0 2006.229.02:47:05.87#ibcon#wrote, iclass 7, count 0 2006.229.02:47:05.87#ibcon#about to read 3, iclass 7, count 0 2006.229.02:47:05.90#ibcon#read 3, iclass 7, count 0 2006.229.02:47:05.90#ibcon#about to read 4, iclass 7, count 0 2006.229.02:47:05.90#ibcon#read 4, iclass 7, count 0 2006.229.02:47:05.90#ibcon#about to read 5, iclass 7, count 0 2006.229.02:47:05.90#ibcon#read 5, iclass 7, count 0 2006.229.02:47:05.90#ibcon#about to read 6, iclass 7, count 0 2006.229.02:47:05.90#ibcon#read 6, iclass 7, count 0 2006.229.02:47:05.90#ibcon#end of sib2, iclass 7, count 0 2006.229.02:47:05.90#ibcon#*after write, iclass 7, count 0 2006.229.02:47:05.90#ibcon#*before return 0, iclass 7, count 0 2006.229.02:47:05.90#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:47:05.90#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.02:47:05.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.02:47:05.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.02:47:05.90$vck44/vblo=2,634.99 2006.229.02:47:05.90#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.02:47:05.90#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.02:47:05.90#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:05.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:05.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:05.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:05.90#ibcon#enter wrdev, iclass 11, count 0 2006.229.02:47:05.90#ibcon#first serial, iclass 11, count 0 2006.229.02:47:05.90#ibcon#enter sib2, iclass 11, count 0 2006.229.02:47:05.90#ibcon#flushed, iclass 11, count 0 2006.229.02:47:05.90#ibcon#about to write, iclass 11, count 0 2006.229.02:47:05.90#ibcon#wrote, iclass 11, count 0 2006.229.02:47:05.90#ibcon#about to read 3, iclass 11, count 0 2006.229.02:47:05.92#ibcon#read 3, iclass 11, count 0 2006.229.02:47:05.92#ibcon#about to read 4, iclass 11, count 0 2006.229.02:47:05.92#ibcon#read 4, iclass 11, count 0 2006.229.02:47:05.92#ibcon#about to read 5, iclass 11, count 0 2006.229.02:47:05.92#ibcon#read 5, iclass 11, count 0 2006.229.02:47:05.92#ibcon#about to read 6, iclass 11, count 0 2006.229.02:47:05.92#ibcon#read 6, iclass 11, count 0 2006.229.02:47:05.92#ibcon#end of sib2, iclass 11, count 0 2006.229.02:47:05.92#ibcon#*mode == 0, iclass 11, count 0 2006.229.02:47:05.92#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.02:47:05.92#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:47:05.92#ibcon#*before write, iclass 11, count 0 2006.229.02:47:05.92#ibcon#enter sib2, iclass 11, count 0 2006.229.02:47:05.92#ibcon#flushed, iclass 11, count 0 2006.229.02:47:05.92#ibcon#about to write, iclass 11, count 0 2006.229.02:47:05.92#ibcon#wrote, iclass 11, count 0 2006.229.02:47:05.92#ibcon#about to read 3, iclass 11, count 0 2006.229.02:47:05.96#ibcon#read 3, iclass 11, count 0 2006.229.02:47:05.96#ibcon#about to read 4, iclass 11, count 0 2006.229.02:47:05.96#ibcon#read 4, iclass 11, count 0 2006.229.02:47:05.96#ibcon#about to read 5, iclass 11, count 0 2006.229.02:47:05.96#ibcon#read 5, iclass 11, count 0 2006.229.02:47:05.96#ibcon#about to read 6, iclass 11, count 0 2006.229.02:47:05.96#ibcon#read 6, iclass 11, count 0 2006.229.02:47:05.96#ibcon#end of sib2, iclass 11, count 0 2006.229.02:47:05.96#ibcon#*after write, iclass 11, count 0 2006.229.02:47:05.96#ibcon#*before return 0, iclass 11, count 0 2006.229.02:47:05.96#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:05.96#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.02:47:05.96#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.02:47:05.96#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.02:47:05.96$vck44/vb=2,4 2006.229.02:47:05.96#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.02:47:05.96#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.02:47:05.96#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:05.96#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:06.03#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:06.03#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:06.03#ibcon#enter wrdev, iclass 13, count 2 2006.229.02:47:06.03#ibcon#first serial, iclass 13, count 2 2006.229.02:47:06.03#ibcon#enter sib2, iclass 13, count 2 2006.229.02:47:06.03#ibcon#flushed, iclass 13, count 2 2006.229.02:47:06.03#ibcon#about to write, iclass 13, count 2 2006.229.02:47:06.03#ibcon#wrote, iclass 13, count 2 2006.229.02:47:06.03#ibcon#about to read 3, iclass 13, count 2 2006.229.02:47:06.04#ibcon#read 3, iclass 13, count 2 2006.229.02:47:06.04#ibcon#about to read 4, iclass 13, count 2 2006.229.02:47:06.04#ibcon#read 4, iclass 13, count 2 2006.229.02:47:06.04#ibcon#about to read 5, iclass 13, count 2 2006.229.02:47:06.04#ibcon#read 5, iclass 13, count 2 2006.229.02:47:06.04#ibcon#about to read 6, iclass 13, count 2 2006.229.02:47:06.04#ibcon#read 6, iclass 13, count 2 2006.229.02:47:06.04#ibcon#end of sib2, iclass 13, count 2 2006.229.02:47:06.04#ibcon#*mode == 0, iclass 13, count 2 2006.229.02:47:06.04#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.02:47:06.04#ibcon#[27=AT02-04\r\n] 2006.229.02:47:06.04#ibcon#*before write, iclass 13, count 2 2006.229.02:47:06.04#ibcon#enter sib2, iclass 13, count 2 2006.229.02:47:06.04#ibcon#flushed, iclass 13, count 2 2006.229.02:47:06.04#ibcon#about to write, iclass 13, count 2 2006.229.02:47:06.04#ibcon#wrote, iclass 13, count 2 2006.229.02:47:06.04#ibcon#about to read 3, iclass 13, count 2 2006.229.02:47:06.07#ibcon#read 3, iclass 13, count 2 2006.229.02:47:06.07#ibcon#about to read 4, iclass 13, count 2 2006.229.02:47:06.07#ibcon#read 4, iclass 13, count 2 2006.229.02:47:06.07#ibcon#about to read 5, iclass 13, count 2 2006.229.02:47:06.07#ibcon#read 5, iclass 13, count 2 2006.229.02:47:06.07#ibcon#about to read 6, iclass 13, count 2 2006.229.02:47:06.07#ibcon#read 6, iclass 13, count 2 2006.229.02:47:06.07#ibcon#end of sib2, iclass 13, count 2 2006.229.02:47:06.07#ibcon#*after write, iclass 13, count 2 2006.229.02:47:06.07#ibcon#*before return 0, iclass 13, count 2 2006.229.02:47:06.07#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:06.07#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.02:47:06.07#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.02:47:06.07#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:06.07#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:06.19#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:06.19#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:06.19#ibcon#enter wrdev, iclass 13, count 0 2006.229.02:47:06.19#ibcon#first serial, iclass 13, count 0 2006.229.02:47:06.19#ibcon#enter sib2, iclass 13, count 0 2006.229.02:47:06.19#ibcon#flushed, iclass 13, count 0 2006.229.02:47:06.19#ibcon#about to write, iclass 13, count 0 2006.229.02:47:06.19#ibcon#wrote, iclass 13, count 0 2006.229.02:47:06.19#ibcon#about to read 3, iclass 13, count 0 2006.229.02:47:06.21#ibcon#read 3, iclass 13, count 0 2006.229.02:47:06.21#ibcon#about to read 4, iclass 13, count 0 2006.229.02:47:06.21#ibcon#read 4, iclass 13, count 0 2006.229.02:47:06.21#ibcon#about to read 5, iclass 13, count 0 2006.229.02:47:06.21#ibcon#read 5, iclass 13, count 0 2006.229.02:47:06.21#ibcon#about to read 6, iclass 13, count 0 2006.229.02:47:06.21#ibcon#read 6, iclass 13, count 0 2006.229.02:47:06.21#ibcon#end of sib2, iclass 13, count 0 2006.229.02:47:06.21#ibcon#*mode == 0, iclass 13, count 0 2006.229.02:47:06.21#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.02:47:06.21#ibcon#[27=USB\r\n] 2006.229.02:47:06.21#ibcon#*before write, iclass 13, count 0 2006.229.02:47:06.21#ibcon#enter sib2, iclass 13, count 0 2006.229.02:47:06.21#ibcon#flushed, iclass 13, count 0 2006.229.02:47:06.21#ibcon#about to write, iclass 13, count 0 2006.229.02:47:06.21#ibcon#wrote, iclass 13, count 0 2006.229.02:47:06.21#ibcon#about to read 3, iclass 13, count 0 2006.229.02:47:06.24#ibcon#read 3, iclass 13, count 0 2006.229.02:47:06.24#ibcon#about to read 4, iclass 13, count 0 2006.229.02:47:06.24#ibcon#read 4, iclass 13, count 0 2006.229.02:47:06.24#ibcon#about to read 5, iclass 13, count 0 2006.229.02:47:06.24#ibcon#read 5, iclass 13, count 0 2006.229.02:47:06.24#ibcon#about to read 6, iclass 13, count 0 2006.229.02:47:06.24#ibcon#read 6, iclass 13, count 0 2006.229.02:47:06.24#ibcon#end of sib2, iclass 13, count 0 2006.229.02:47:06.24#ibcon#*after write, iclass 13, count 0 2006.229.02:47:06.24#ibcon#*before return 0, iclass 13, count 0 2006.229.02:47:06.24#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:06.24#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.02:47:06.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.02:47:06.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.02:47:06.24$vck44/vblo=3,649.99 2006.229.02:47:06.24#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.02:47:06.24#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.02:47:06.24#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:06.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:06.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:06.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:06.24#ibcon#enter wrdev, iclass 15, count 0 2006.229.02:47:06.24#ibcon#first serial, iclass 15, count 0 2006.229.02:47:06.24#ibcon#enter sib2, iclass 15, count 0 2006.229.02:47:06.24#ibcon#flushed, iclass 15, count 0 2006.229.02:47:06.24#ibcon#about to write, iclass 15, count 0 2006.229.02:47:06.24#ibcon#wrote, iclass 15, count 0 2006.229.02:47:06.24#ibcon#about to read 3, iclass 15, count 0 2006.229.02:47:06.26#ibcon#read 3, iclass 15, count 0 2006.229.02:47:06.26#ibcon#about to read 4, iclass 15, count 0 2006.229.02:47:06.26#ibcon#read 4, iclass 15, count 0 2006.229.02:47:06.26#ibcon#about to read 5, iclass 15, count 0 2006.229.02:47:06.26#ibcon#read 5, iclass 15, count 0 2006.229.02:47:06.26#ibcon#about to read 6, iclass 15, count 0 2006.229.02:47:06.26#ibcon#read 6, iclass 15, count 0 2006.229.02:47:06.26#ibcon#end of sib2, iclass 15, count 0 2006.229.02:47:06.26#ibcon#*mode == 0, iclass 15, count 0 2006.229.02:47:06.26#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.02:47:06.26#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:47:06.26#ibcon#*before write, iclass 15, count 0 2006.229.02:47:06.26#ibcon#enter sib2, iclass 15, count 0 2006.229.02:47:06.26#ibcon#flushed, iclass 15, count 0 2006.229.02:47:06.26#ibcon#about to write, iclass 15, count 0 2006.229.02:47:06.26#ibcon#wrote, iclass 15, count 0 2006.229.02:47:06.26#ibcon#about to read 3, iclass 15, count 0 2006.229.02:47:06.30#ibcon#read 3, iclass 15, count 0 2006.229.02:47:06.30#ibcon#about to read 4, iclass 15, count 0 2006.229.02:47:06.30#ibcon#read 4, iclass 15, count 0 2006.229.02:47:06.30#ibcon#about to read 5, iclass 15, count 0 2006.229.02:47:06.30#ibcon#read 5, iclass 15, count 0 2006.229.02:47:06.30#ibcon#about to read 6, iclass 15, count 0 2006.229.02:47:06.30#ibcon#read 6, iclass 15, count 0 2006.229.02:47:06.30#ibcon#end of sib2, iclass 15, count 0 2006.229.02:47:06.30#ibcon#*after write, iclass 15, count 0 2006.229.02:47:06.30#ibcon#*before return 0, iclass 15, count 0 2006.229.02:47:06.30#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:06.30#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.02:47:06.30#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.02:47:06.30#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.02:47:06.30$vck44/vb=3,4 2006.229.02:47:06.30#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.02:47:06.30#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.02:47:06.30#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:06.30#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:06.36#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:06.36#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:06.36#ibcon#enter wrdev, iclass 17, count 2 2006.229.02:47:06.36#ibcon#first serial, iclass 17, count 2 2006.229.02:47:06.36#ibcon#enter sib2, iclass 17, count 2 2006.229.02:47:06.36#ibcon#flushed, iclass 17, count 2 2006.229.02:47:06.36#ibcon#about to write, iclass 17, count 2 2006.229.02:47:06.36#ibcon#wrote, iclass 17, count 2 2006.229.02:47:06.36#ibcon#about to read 3, iclass 17, count 2 2006.229.02:47:06.38#ibcon#read 3, iclass 17, count 2 2006.229.02:47:06.38#ibcon#about to read 4, iclass 17, count 2 2006.229.02:47:06.38#ibcon#read 4, iclass 17, count 2 2006.229.02:47:06.38#ibcon#about to read 5, iclass 17, count 2 2006.229.02:47:06.38#ibcon#read 5, iclass 17, count 2 2006.229.02:47:06.38#ibcon#about to read 6, iclass 17, count 2 2006.229.02:47:06.38#ibcon#read 6, iclass 17, count 2 2006.229.02:47:06.38#ibcon#end of sib2, iclass 17, count 2 2006.229.02:47:06.38#ibcon#*mode == 0, iclass 17, count 2 2006.229.02:47:06.38#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.02:47:06.38#ibcon#[27=AT03-04\r\n] 2006.229.02:47:06.38#ibcon#*before write, iclass 17, count 2 2006.229.02:47:06.38#ibcon#enter sib2, iclass 17, count 2 2006.229.02:47:06.38#ibcon#flushed, iclass 17, count 2 2006.229.02:47:06.38#ibcon#about to write, iclass 17, count 2 2006.229.02:47:06.38#ibcon#wrote, iclass 17, count 2 2006.229.02:47:06.38#ibcon#about to read 3, iclass 17, count 2 2006.229.02:47:06.41#ibcon#read 3, iclass 17, count 2 2006.229.02:47:06.41#ibcon#about to read 4, iclass 17, count 2 2006.229.02:47:06.41#ibcon#read 4, iclass 17, count 2 2006.229.02:47:06.41#ibcon#about to read 5, iclass 17, count 2 2006.229.02:47:06.41#ibcon#read 5, iclass 17, count 2 2006.229.02:47:06.41#ibcon#about to read 6, iclass 17, count 2 2006.229.02:47:06.41#ibcon#read 6, iclass 17, count 2 2006.229.02:47:06.41#ibcon#end of sib2, iclass 17, count 2 2006.229.02:47:06.41#ibcon#*after write, iclass 17, count 2 2006.229.02:47:06.41#ibcon#*before return 0, iclass 17, count 2 2006.229.02:47:06.41#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:06.41#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.02:47:06.41#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.02:47:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:06.41#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:06.53#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:06.53#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:06.53#ibcon#enter wrdev, iclass 17, count 0 2006.229.02:47:06.53#ibcon#first serial, iclass 17, count 0 2006.229.02:47:06.53#ibcon#enter sib2, iclass 17, count 0 2006.229.02:47:06.53#ibcon#flushed, iclass 17, count 0 2006.229.02:47:06.53#ibcon#about to write, iclass 17, count 0 2006.229.02:47:06.53#ibcon#wrote, iclass 17, count 0 2006.229.02:47:06.53#ibcon#about to read 3, iclass 17, count 0 2006.229.02:47:06.55#ibcon#read 3, iclass 17, count 0 2006.229.02:47:06.55#ibcon#about to read 4, iclass 17, count 0 2006.229.02:47:06.55#ibcon#read 4, iclass 17, count 0 2006.229.02:47:06.55#ibcon#about to read 5, iclass 17, count 0 2006.229.02:47:06.55#ibcon#read 5, iclass 17, count 0 2006.229.02:47:06.55#ibcon#about to read 6, iclass 17, count 0 2006.229.02:47:06.55#ibcon#read 6, iclass 17, count 0 2006.229.02:47:06.55#ibcon#end of sib2, iclass 17, count 0 2006.229.02:47:06.55#ibcon#*mode == 0, iclass 17, count 0 2006.229.02:47:06.55#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.02:47:06.55#ibcon#[27=USB\r\n] 2006.229.02:47:06.55#ibcon#*before write, iclass 17, count 0 2006.229.02:47:06.55#ibcon#enter sib2, iclass 17, count 0 2006.229.02:47:06.55#ibcon#flushed, iclass 17, count 0 2006.229.02:47:06.55#ibcon#about to write, iclass 17, count 0 2006.229.02:47:06.55#ibcon#wrote, iclass 17, count 0 2006.229.02:47:06.55#ibcon#about to read 3, iclass 17, count 0 2006.229.02:47:06.58#ibcon#read 3, iclass 17, count 0 2006.229.02:47:06.58#ibcon#about to read 4, iclass 17, count 0 2006.229.02:47:06.58#ibcon#read 4, iclass 17, count 0 2006.229.02:47:06.58#ibcon#about to read 5, iclass 17, count 0 2006.229.02:47:06.58#ibcon#read 5, iclass 17, count 0 2006.229.02:47:06.58#ibcon#about to read 6, iclass 17, count 0 2006.229.02:47:06.58#ibcon#read 6, iclass 17, count 0 2006.229.02:47:06.58#ibcon#end of sib2, iclass 17, count 0 2006.229.02:47:06.58#ibcon#*after write, iclass 17, count 0 2006.229.02:47:06.58#ibcon#*before return 0, iclass 17, count 0 2006.229.02:47:06.58#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:06.58#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.02:47:06.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.02:47:06.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.02:47:06.58$vck44/vblo=4,679.99 2006.229.02:47:06.58#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.02:47:06.58#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.02:47:06.58#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:06.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:06.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:06.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:06.58#ibcon#enter wrdev, iclass 19, count 0 2006.229.02:47:06.58#ibcon#first serial, iclass 19, count 0 2006.229.02:47:06.58#ibcon#enter sib2, iclass 19, count 0 2006.229.02:47:06.58#ibcon#flushed, iclass 19, count 0 2006.229.02:47:06.58#ibcon#about to write, iclass 19, count 0 2006.229.02:47:06.58#ibcon#wrote, iclass 19, count 0 2006.229.02:47:06.58#ibcon#about to read 3, iclass 19, count 0 2006.229.02:47:06.60#ibcon#read 3, iclass 19, count 0 2006.229.02:47:06.60#ibcon#about to read 4, iclass 19, count 0 2006.229.02:47:06.60#ibcon#read 4, iclass 19, count 0 2006.229.02:47:06.60#ibcon#about to read 5, iclass 19, count 0 2006.229.02:47:06.60#ibcon#read 5, iclass 19, count 0 2006.229.02:47:06.60#ibcon#about to read 6, iclass 19, count 0 2006.229.02:47:06.60#ibcon#read 6, iclass 19, count 0 2006.229.02:47:06.60#ibcon#end of sib2, iclass 19, count 0 2006.229.02:47:06.60#ibcon#*mode == 0, iclass 19, count 0 2006.229.02:47:06.60#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.02:47:06.60#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:47:06.60#ibcon#*before write, iclass 19, count 0 2006.229.02:47:06.60#ibcon#enter sib2, iclass 19, count 0 2006.229.02:47:06.60#ibcon#flushed, iclass 19, count 0 2006.229.02:47:06.60#ibcon#about to write, iclass 19, count 0 2006.229.02:47:06.60#ibcon#wrote, iclass 19, count 0 2006.229.02:47:06.60#ibcon#about to read 3, iclass 19, count 0 2006.229.02:47:06.64#ibcon#read 3, iclass 19, count 0 2006.229.02:47:06.64#ibcon#about to read 4, iclass 19, count 0 2006.229.02:47:06.64#ibcon#read 4, iclass 19, count 0 2006.229.02:47:06.64#ibcon#about to read 5, iclass 19, count 0 2006.229.02:47:06.64#ibcon#read 5, iclass 19, count 0 2006.229.02:47:06.64#ibcon#about to read 6, iclass 19, count 0 2006.229.02:47:06.64#ibcon#read 6, iclass 19, count 0 2006.229.02:47:06.64#ibcon#end of sib2, iclass 19, count 0 2006.229.02:47:06.64#ibcon#*after write, iclass 19, count 0 2006.229.02:47:06.64#ibcon#*before return 0, iclass 19, count 0 2006.229.02:47:06.64#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:06.64#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.02:47:06.64#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.02:47:06.64#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.02:47:06.64$vck44/vb=4,4 2006.229.02:47:06.64#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.02:47:06.64#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.02:47:06.64#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:06.64#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:06.70#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:06.70#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:06.70#ibcon#enter wrdev, iclass 21, count 2 2006.229.02:47:06.70#ibcon#first serial, iclass 21, count 2 2006.229.02:47:06.70#ibcon#enter sib2, iclass 21, count 2 2006.229.02:47:06.70#ibcon#flushed, iclass 21, count 2 2006.229.02:47:06.70#ibcon#about to write, iclass 21, count 2 2006.229.02:47:06.70#ibcon#wrote, iclass 21, count 2 2006.229.02:47:06.70#ibcon#about to read 3, iclass 21, count 2 2006.229.02:47:06.72#ibcon#read 3, iclass 21, count 2 2006.229.02:47:06.72#ibcon#about to read 4, iclass 21, count 2 2006.229.02:47:06.72#ibcon#read 4, iclass 21, count 2 2006.229.02:47:06.72#ibcon#about to read 5, iclass 21, count 2 2006.229.02:47:06.72#ibcon#read 5, iclass 21, count 2 2006.229.02:47:06.72#ibcon#about to read 6, iclass 21, count 2 2006.229.02:47:06.72#ibcon#read 6, iclass 21, count 2 2006.229.02:47:06.72#ibcon#end of sib2, iclass 21, count 2 2006.229.02:47:06.72#ibcon#*mode == 0, iclass 21, count 2 2006.229.02:47:06.72#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.02:47:06.72#ibcon#[27=AT04-04\r\n] 2006.229.02:47:06.72#ibcon#*before write, iclass 21, count 2 2006.229.02:47:06.72#ibcon#enter sib2, iclass 21, count 2 2006.229.02:47:06.72#ibcon#flushed, iclass 21, count 2 2006.229.02:47:06.72#ibcon#about to write, iclass 21, count 2 2006.229.02:47:06.72#ibcon#wrote, iclass 21, count 2 2006.229.02:47:06.72#ibcon#about to read 3, iclass 21, count 2 2006.229.02:47:06.75#ibcon#read 3, iclass 21, count 2 2006.229.02:47:06.75#ibcon#about to read 4, iclass 21, count 2 2006.229.02:47:06.75#ibcon#read 4, iclass 21, count 2 2006.229.02:47:06.75#ibcon#about to read 5, iclass 21, count 2 2006.229.02:47:06.75#ibcon#read 5, iclass 21, count 2 2006.229.02:47:06.75#ibcon#about to read 6, iclass 21, count 2 2006.229.02:47:06.75#ibcon#read 6, iclass 21, count 2 2006.229.02:47:06.75#ibcon#end of sib2, iclass 21, count 2 2006.229.02:47:06.75#ibcon#*after write, iclass 21, count 2 2006.229.02:47:06.75#ibcon#*before return 0, iclass 21, count 2 2006.229.02:47:06.75#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:06.75#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.02:47:06.75#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.02:47:06.75#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:06.75#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:06.87#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:06.87#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:06.87#ibcon#enter wrdev, iclass 21, count 0 2006.229.02:47:06.87#ibcon#first serial, iclass 21, count 0 2006.229.02:47:06.87#ibcon#enter sib2, iclass 21, count 0 2006.229.02:47:06.87#ibcon#flushed, iclass 21, count 0 2006.229.02:47:06.87#ibcon#about to write, iclass 21, count 0 2006.229.02:47:06.87#ibcon#wrote, iclass 21, count 0 2006.229.02:47:06.87#ibcon#about to read 3, iclass 21, count 0 2006.229.02:47:06.89#ibcon#read 3, iclass 21, count 0 2006.229.02:47:06.89#ibcon#about to read 4, iclass 21, count 0 2006.229.02:47:06.89#ibcon#read 4, iclass 21, count 0 2006.229.02:47:06.89#ibcon#about to read 5, iclass 21, count 0 2006.229.02:47:06.89#ibcon#read 5, iclass 21, count 0 2006.229.02:47:06.89#ibcon#about to read 6, iclass 21, count 0 2006.229.02:47:06.89#ibcon#read 6, iclass 21, count 0 2006.229.02:47:06.89#ibcon#end of sib2, iclass 21, count 0 2006.229.02:47:06.89#ibcon#*mode == 0, iclass 21, count 0 2006.229.02:47:06.89#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.02:47:06.89#ibcon#[27=USB\r\n] 2006.229.02:47:06.89#ibcon#*before write, iclass 21, count 0 2006.229.02:47:06.89#ibcon#enter sib2, iclass 21, count 0 2006.229.02:47:06.89#ibcon#flushed, iclass 21, count 0 2006.229.02:47:06.89#ibcon#about to write, iclass 21, count 0 2006.229.02:47:06.89#ibcon#wrote, iclass 21, count 0 2006.229.02:47:06.89#ibcon#about to read 3, iclass 21, count 0 2006.229.02:47:06.92#ibcon#read 3, iclass 21, count 0 2006.229.02:47:06.92#ibcon#about to read 4, iclass 21, count 0 2006.229.02:47:06.92#ibcon#read 4, iclass 21, count 0 2006.229.02:47:06.92#ibcon#about to read 5, iclass 21, count 0 2006.229.02:47:06.92#ibcon#read 5, iclass 21, count 0 2006.229.02:47:06.92#ibcon#about to read 6, iclass 21, count 0 2006.229.02:47:06.92#ibcon#read 6, iclass 21, count 0 2006.229.02:47:06.92#ibcon#end of sib2, iclass 21, count 0 2006.229.02:47:06.92#ibcon#*after write, iclass 21, count 0 2006.229.02:47:06.92#ibcon#*before return 0, iclass 21, count 0 2006.229.02:47:06.92#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:06.92#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.02:47:06.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.02:47:06.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.02:47:06.92$vck44/vblo=5,709.99 2006.229.02:47:06.92#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.02:47:06.92#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.02:47:06.92#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:06.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:06.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:06.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:06.92#ibcon#enter wrdev, iclass 23, count 0 2006.229.02:47:06.92#ibcon#first serial, iclass 23, count 0 2006.229.02:47:06.92#ibcon#enter sib2, iclass 23, count 0 2006.229.02:47:06.92#ibcon#flushed, iclass 23, count 0 2006.229.02:47:06.92#ibcon#about to write, iclass 23, count 0 2006.229.02:47:06.92#ibcon#wrote, iclass 23, count 0 2006.229.02:47:06.92#ibcon#about to read 3, iclass 23, count 0 2006.229.02:47:06.95#ibcon#read 3, iclass 23, count 0 2006.229.02:47:06.95#ibcon#about to read 4, iclass 23, count 0 2006.229.02:47:06.95#ibcon#read 4, iclass 23, count 0 2006.229.02:47:06.95#ibcon#about to read 5, iclass 23, count 0 2006.229.02:47:06.95#ibcon#read 5, iclass 23, count 0 2006.229.02:47:06.95#ibcon#about to read 6, iclass 23, count 0 2006.229.02:47:06.95#ibcon#read 6, iclass 23, count 0 2006.229.02:47:06.95#ibcon#end of sib2, iclass 23, count 0 2006.229.02:47:06.95#ibcon#*mode == 0, iclass 23, count 0 2006.229.02:47:06.95#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.02:47:06.95#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:47:06.95#ibcon#*before write, iclass 23, count 0 2006.229.02:47:06.95#ibcon#enter sib2, iclass 23, count 0 2006.229.02:47:06.95#ibcon#flushed, iclass 23, count 0 2006.229.02:47:06.95#ibcon#about to write, iclass 23, count 0 2006.229.02:47:06.95#ibcon#wrote, iclass 23, count 0 2006.229.02:47:06.95#ibcon#about to read 3, iclass 23, count 0 2006.229.02:47:06.99#ibcon#read 3, iclass 23, count 0 2006.229.02:47:06.99#ibcon#about to read 4, iclass 23, count 0 2006.229.02:47:06.99#ibcon#read 4, iclass 23, count 0 2006.229.02:47:06.99#ibcon#about to read 5, iclass 23, count 0 2006.229.02:47:06.99#ibcon#read 5, iclass 23, count 0 2006.229.02:47:06.99#ibcon#about to read 6, iclass 23, count 0 2006.229.02:47:06.99#ibcon#read 6, iclass 23, count 0 2006.229.02:47:06.99#ibcon#end of sib2, iclass 23, count 0 2006.229.02:47:06.99#ibcon#*after write, iclass 23, count 0 2006.229.02:47:06.99#ibcon#*before return 0, iclass 23, count 0 2006.229.02:47:06.99#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:06.99#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.02:47:06.99#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.02:47:06.99#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.02:47:06.99$vck44/vb=5,4 2006.229.02:47:06.99#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.02:47:06.99#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.02:47:06.99#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:06.99#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:07.04#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:07.04#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:07.04#ibcon#enter wrdev, iclass 25, count 2 2006.229.02:47:07.04#ibcon#first serial, iclass 25, count 2 2006.229.02:47:07.04#ibcon#enter sib2, iclass 25, count 2 2006.229.02:47:07.04#ibcon#flushed, iclass 25, count 2 2006.229.02:47:07.04#ibcon#about to write, iclass 25, count 2 2006.229.02:47:07.04#ibcon#wrote, iclass 25, count 2 2006.229.02:47:07.04#ibcon#about to read 3, iclass 25, count 2 2006.229.02:47:07.06#ibcon#read 3, iclass 25, count 2 2006.229.02:47:07.06#ibcon#about to read 4, iclass 25, count 2 2006.229.02:47:07.06#ibcon#read 4, iclass 25, count 2 2006.229.02:47:07.06#ibcon#about to read 5, iclass 25, count 2 2006.229.02:47:07.06#ibcon#read 5, iclass 25, count 2 2006.229.02:47:07.06#ibcon#about to read 6, iclass 25, count 2 2006.229.02:47:07.06#ibcon#read 6, iclass 25, count 2 2006.229.02:47:07.06#ibcon#end of sib2, iclass 25, count 2 2006.229.02:47:07.06#ibcon#*mode == 0, iclass 25, count 2 2006.229.02:47:07.06#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.02:47:07.06#ibcon#[27=AT05-04\r\n] 2006.229.02:47:07.06#ibcon#*before write, iclass 25, count 2 2006.229.02:47:07.06#ibcon#enter sib2, iclass 25, count 2 2006.229.02:47:07.06#ibcon#flushed, iclass 25, count 2 2006.229.02:47:07.06#ibcon#about to write, iclass 25, count 2 2006.229.02:47:07.06#ibcon#wrote, iclass 25, count 2 2006.229.02:47:07.06#ibcon#about to read 3, iclass 25, count 2 2006.229.02:47:07.09#ibcon#read 3, iclass 25, count 2 2006.229.02:47:07.09#ibcon#about to read 4, iclass 25, count 2 2006.229.02:47:07.09#ibcon#read 4, iclass 25, count 2 2006.229.02:47:07.09#ibcon#about to read 5, iclass 25, count 2 2006.229.02:47:07.09#ibcon#read 5, iclass 25, count 2 2006.229.02:47:07.09#ibcon#about to read 6, iclass 25, count 2 2006.229.02:47:07.09#ibcon#read 6, iclass 25, count 2 2006.229.02:47:07.09#ibcon#end of sib2, iclass 25, count 2 2006.229.02:47:07.09#ibcon#*after write, iclass 25, count 2 2006.229.02:47:07.09#ibcon#*before return 0, iclass 25, count 2 2006.229.02:47:07.09#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:07.09#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.02:47:07.09#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.02:47:07.09#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:07.09#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:07.21#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:07.21#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:07.21#ibcon#enter wrdev, iclass 25, count 0 2006.229.02:47:07.21#ibcon#first serial, iclass 25, count 0 2006.229.02:47:07.21#ibcon#enter sib2, iclass 25, count 0 2006.229.02:47:07.21#ibcon#flushed, iclass 25, count 0 2006.229.02:47:07.21#ibcon#about to write, iclass 25, count 0 2006.229.02:47:07.21#ibcon#wrote, iclass 25, count 0 2006.229.02:47:07.21#ibcon#about to read 3, iclass 25, count 0 2006.229.02:47:07.23#ibcon#read 3, iclass 25, count 0 2006.229.02:47:07.23#ibcon#about to read 4, iclass 25, count 0 2006.229.02:47:07.23#ibcon#read 4, iclass 25, count 0 2006.229.02:47:07.23#ibcon#about to read 5, iclass 25, count 0 2006.229.02:47:07.23#ibcon#read 5, iclass 25, count 0 2006.229.02:47:07.23#ibcon#about to read 6, iclass 25, count 0 2006.229.02:47:07.23#ibcon#read 6, iclass 25, count 0 2006.229.02:47:07.23#ibcon#end of sib2, iclass 25, count 0 2006.229.02:47:07.23#ibcon#*mode == 0, iclass 25, count 0 2006.229.02:47:07.23#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.02:47:07.23#ibcon#[27=USB\r\n] 2006.229.02:47:07.23#ibcon#*before write, iclass 25, count 0 2006.229.02:47:07.23#ibcon#enter sib2, iclass 25, count 0 2006.229.02:47:07.23#ibcon#flushed, iclass 25, count 0 2006.229.02:47:07.23#ibcon#about to write, iclass 25, count 0 2006.229.02:47:07.23#ibcon#wrote, iclass 25, count 0 2006.229.02:47:07.23#ibcon#about to read 3, iclass 25, count 0 2006.229.02:47:07.26#ibcon#read 3, iclass 25, count 0 2006.229.02:47:07.26#ibcon#about to read 4, iclass 25, count 0 2006.229.02:47:07.26#ibcon#read 4, iclass 25, count 0 2006.229.02:47:07.26#ibcon#about to read 5, iclass 25, count 0 2006.229.02:47:07.26#ibcon#read 5, iclass 25, count 0 2006.229.02:47:07.26#ibcon#about to read 6, iclass 25, count 0 2006.229.02:47:07.26#ibcon#read 6, iclass 25, count 0 2006.229.02:47:07.26#ibcon#end of sib2, iclass 25, count 0 2006.229.02:47:07.26#ibcon#*after write, iclass 25, count 0 2006.229.02:47:07.26#ibcon#*before return 0, iclass 25, count 0 2006.229.02:47:07.26#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:07.26#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.02:47:07.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.02:47:07.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.02:47:07.26$vck44/vblo=6,719.99 2006.229.02:47:07.26#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.02:47:07.26#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.02:47:07.26#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:07.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:07.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:07.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:07.26#ibcon#enter wrdev, iclass 27, count 0 2006.229.02:47:07.26#ibcon#first serial, iclass 27, count 0 2006.229.02:47:07.26#ibcon#enter sib2, iclass 27, count 0 2006.229.02:47:07.26#ibcon#flushed, iclass 27, count 0 2006.229.02:47:07.26#ibcon#about to write, iclass 27, count 0 2006.229.02:47:07.26#ibcon#wrote, iclass 27, count 0 2006.229.02:47:07.26#ibcon#about to read 3, iclass 27, count 0 2006.229.02:47:07.28#ibcon#read 3, iclass 27, count 0 2006.229.02:47:07.28#ibcon#about to read 4, iclass 27, count 0 2006.229.02:47:07.28#ibcon#read 4, iclass 27, count 0 2006.229.02:47:07.28#ibcon#about to read 5, iclass 27, count 0 2006.229.02:47:07.28#ibcon#read 5, iclass 27, count 0 2006.229.02:47:07.28#ibcon#about to read 6, iclass 27, count 0 2006.229.02:47:07.28#ibcon#read 6, iclass 27, count 0 2006.229.02:47:07.28#ibcon#end of sib2, iclass 27, count 0 2006.229.02:47:07.28#ibcon#*mode == 0, iclass 27, count 0 2006.229.02:47:07.28#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.02:47:07.28#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:47:07.28#ibcon#*before write, iclass 27, count 0 2006.229.02:47:07.28#ibcon#enter sib2, iclass 27, count 0 2006.229.02:47:07.28#ibcon#flushed, iclass 27, count 0 2006.229.02:47:07.28#ibcon#about to write, iclass 27, count 0 2006.229.02:47:07.28#ibcon#wrote, iclass 27, count 0 2006.229.02:47:07.28#ibcon#about to read 3, iclass 27, count 0 2006.229.02:47:07.32#ibcon#read 3, iclass 27, count 0 2006.229.02:47:07.32#ibcon#about to read 4, iclass 27, count 0 2006.229.02:47:07.32#ibcon#read 4, iclass 27, count 0 2006.229.02:47:07.32#ibcon#about to read 5, iclass 27, count 0 2006.229.02:47:07.32#ibcon#read 5, iclass 27, count 0 2006.229.02:47:07.32#ibcon#about to read 6, iclass 27, count 0 2006.229.02:47:07.32#ibcon#read 6, iclass 27, count 0 2006.229.02:47:07.32#ibcon#end of sib2, iclass 27, count 0 2006.229.02:47:07.32#ibcon#*after write, iclass 27, count 0 2006.229.02:47:07.32#ibcon#*before return 0, iclass 27, count 0 2006.229.02:47:07.32#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:07.32#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.02:47:07.32#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.02:47:07.32#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.02:47:07.32$vck44/vb=6,4 2006.229.02:47:07.32#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.02:47:07.32#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.02:47:07.32#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:07.32#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:07.38#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:07.38#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:07.38#ibcon#enter wrdev, iclass 29, count 2 2006.229.02:47:07.38#ibcon#first serial, iclass 29, count 2 2006.229.02:47:07.38#ibcon#enter sib2, iclass 29, count 2 2006.229.02:47:07.38#ibcon#flushed, iclass 29, count 2 2006.229.02:47:07.38#ibcon#about to write, iclass 29, count 2 2006.229.02:47:07.38#ibcon#wrote, iclass 29, count 2 2006.229.02:47:07.38#ibcon#about to read 3, iclass 29, count 2 2006.229.02:47:07.40#ibcon#read 3, iclass 29, count 2 2006.229.02:47:07.40#ibcon#about to read 4, iclass 29, count 2 2006.229.02:47:07.40#ibcon#read 4, iclass 29, count 2 2006.229.02:47:07.40#ibcon#about to read 5, iclass 29, count 2 2006.229.02:47:07.40#ibcon#read 5, iclass 29, count 2 2006.229.02:47:07.40#ibcon#about to read 6, iclass 29, count 2 2006.229.02:47:07.40#ibcon#read 6, iclass 29, count 2 2006.229.02:47:07.40#ibcon#end of sib2, iclass 29, count 2 2006.229.02:47:07.40#ibcon#*mode == 0, iclass 29, count 2 2006.229.02:47:07.40#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.02:47:07.40#ibcon#[27=AT06-04\r\n] 2006.229.02:47:07.40#ibcon#*before write, iclass 29, count 2 2006.229.02:47:07.40#ibcon#enter sib2, iclass 29, count 2 2006.229.02:47:07.40#ibcon#flushed, iclass 29, count 2 2006.229.02:47:07.40#ibcon#about to write, iclass 29, count 2 2006.229.02:47:07.40#ibcon#wrote, iclass 29, count 2 2006.229.02:47:07.40#ibcon#about to read 3, iclass 29, count 2 2006.229.02:47:07.43#ibcon#read 3, iclass 29, count 2 2006.229.02:47:07.43#ibcon#about to read 4, iclass 29, count 2 2006.229.02:47:07.43#ibcon#read 4, iclass 29, count 2 2006.229.02:47:07.43#ibcon#about to read 5, iclass 29, count 2 2006.229.02:47:07.43#ibcon#read 5, iclass 29, count 2 2006.229.02:47:07.43#ibcon#about to read 6, iclass 29, count 2 2006.229.02:47:07.43#ibcon#read 6, iclass 29, count 2 2006.229.02:47:07.43#ibcon#end of sib2, iclass 29, count 2 2006.229.02:47:07.43#ibcon#*after write, iclass 29, count 2 2006.229.02:47:07.43#ibcon#*before return 0, iclass 29, count 2 2006.229.02:47:07.43#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:07.43#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.02:47:07.43#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.02:47:07.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:07.43#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:07.55#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:07.55#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:07.55#ibcon#enter wrdev, iclass 29, count 0 2006.229.02:47:07.55#ibcon#first serial, iclass 29, count 0 2006.229.02:47:07.55#ibcon#enter sib2, iclass 29, count 0 2006.229.02:47:07.55#ibcon#flushed, iclass 29, count 0 2006.229.02:47:07.55#ibcon#about to write, iclass 29, count 0 2006.229.02:47:07.55#ibcon#wrote, iclass 29, count 0 2006.229.02:47:07.55#ibcon#about to read 3, iclass 29, count 0 2006.229.02:47:07.57#ibcon#read 3, iclass 29, count 0 2006.229.02:47:07.57#ibcon#about to read 4, iclass 29, count 0 2006.229.02:47:07.57#ibcon#read 4, iclass 29, count 0 2006.229.02:47:07.57#ibcon#about to read 5, iclass 29, count 0 2006.229.02:47:07.57#ibcon#read 5, iclass 29, count 0 2006.229.02:47:07.57#ibcon#about to read 6, iclass 29, count 0 2006.229.02:47:07.57#ibcon#read 6, iclass 29, count 0 2006.229.02:47:07.57#ibcon#end of sib2, iclass 29, count 0 2006.229.02:47:07.57#ibcon#*mode == 0, iclass 29, count 0 2006.229.02:47:07.57#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.02:47:07.57#ibcon#[27=USB\r\n] 2006.229.02:47:07.57#ibcon#*before write, iclass 29, count 0 2006.229.02:47:07.57#ibcon#enter sib2, iclass 29, count 0 2006.229.02:47:07.57#ibcon#flushed, iclass 29, count 0 2006.229.02:47:07.57#ibcon#about to write, iclass 29, count 0 2006.229.02:47:07.57#ibcon#wrote, iclass 29, count 0 2006.229.02:47:07.57#ibcon#about to read 3, iclass 29, count 0 2006.229.02:47:07.60#ibcon#read 3, iclass 29, count 0 2006.229.02:47:07.60#ibcon#about to read 4, iclass 29, count 0 2006.229.02:47:07.60#ibcon#read 4, iclass 29, count 0 2006.229.02:47:07.60#ibcon#about to read 5, iclass 29, count 0 2006.229.02:47:07.60#ibcon#read 5, iclass 29, count 0 2006.229.02:47:07.60#ibcon#about to read 6, iclass 29, count 0 2006.229.02:47:07.60#ibcon#read 6, iclass 29, count 0 2006.229.02:47:07.60#ibcon#end of sib2, iclass 29, count 0 2006.229.02:47:07.60#ibcon#*after write, iclass 29, count 0 2006.229.02:47:07.60#ibcon#*before return 0, iclass 29, count 0 2006.229.02:47:07.60#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:07.60#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.02:47:07.60#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.02:47:07.60#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.02:47:07.60$vck44/vblo=7,734.99 2006.229.02:47:07.60#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.02:47:07.60#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.02:47:07.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:07.60#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:07.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:07.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:07.60#ibcon#enter wrdev, iclass 31, count 0 2006.229.02:47:07.60#ibcon#first serial, iclass 31, count 0 2006.229.02:47:07.60#ibcon#enter sib2, iclass 31, count 0 2006.229.02:47:07.60#ibcon#flushed, iclass 31, count 0 2006.229.02:47:07.60#ibcon#about to write, iclass 31, count 0 2006.229.02:47:07.60#ibcon#wrote, iclass 31, count 0 2006.229.02:47:07.60#ibcon#about to read 3, iclass 31, count 0 2006.229.02:47:07.62#ibcon#read 3, iclass 31, count 0 2006.229.02:47:07.62#ibcon#about to read 4, iclass 31, count 0 2006.229.02:47:07.62#ibcon#read 4, iclass 31, count 0 2006.229.02:47:07.62#ibcon#about to read 5, iclass 31, count 0 2006.229.02:47:07.62#ibcon#read 5, iclass 31, count 0 2006.229.02:47:07.62#ibcon#about to read 6, iclass 31, count 0 2006.229.02:47:07.62#ibcon#read 6, iclass 31, count 0 2006.229.02:47:07.62#ibcon#end of sib2, iclass 31, count 0 2006.229.02:47:07.62#ibcon#*mode == 0, iclass 31, count 0 2006.229.02:47:07.62#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.02:47:07.62#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:47:07.62#ibcon#*before write, iclass 31, count 0 2006.229.02:47:07.62#ibcon#enter sib2, iclass 31, count 0 2006.229.02:47:07.62#ibcon#flushed, iclass 31, count 0 2006.229.02:47:07.62#ibcon#about to write, iclass 31, count 0 2006.229.02:47:07.62#ibcon#wrote, iclass 31, count 0 2006.229.02:47:07.62#ibcon#about to read 3, iclass 31, count 0 2006.229.02:47:07.66#ibcon#read 3, iclass 31, count 0 2006.229.02:47:07.66#ibcon#about to read 4, iclass 31, count 0 2006.229.02:47:07.66#ibcon#read 4, iclass 31, count 0 2006.229.02:47:07.66#ibcon#about to read 5, iclass 31, count 0 2006.229.02:47:07.66#ibcon#read 5, iclass 31, count 0 2006.229.02:47:07.66#ibcon#about to read 6, iclass 31, count 0 2006.229.02:47:07.66#ibcon#read 6, iclass 31, count 0 2006.229.02:47:07.66#ibcon#end of sib2, iclass 31, count 0 2006.229.02:47:07.66#ibcon#*after write, iclass 31, count 0 2006.229.02:47:07.66#ibcon#*before return 0, iclass 31, count 0 2006.229.02:47:07.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:07.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.02:47:07.66#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.02:47:07.66#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.02:47:07.66$vck44/vb=7,4 2006.229.02:47:07.66#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.02:47:07.66#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.02:47:07.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:07.66#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:07.72#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:07.72#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:07.72#ibcon#enter wrdev, iclass 33, count 2 2006.229.02:47:07.72#ibcon#first serial, iclass 33, count 2 2006.229.02:47:07.72#ibcon#enter sib2, iclass 33, count 2 2006.229.02:47:07.72#ibcon#flushed, iclass 33, count 2 2006.229.02:47:07.72#ibcon#about to write, iclass 33, count 2 2006.229.02:47:07.72#ibcon#wrote, iclass 33, count 2 2006.229.02:47:07.72#ibcon#about to read 3, iclass 33, count 2 2006.229.02:47:07.74#ibcon#read 3, iclass 33, count 2 2006.229.02:47:07.74#ibcon#about to read 4, iclass 33, count 2 2006.229.02:47:07.74#ibcon#read 4, iclass 33, count 2 2006.229.02:47:07.74#ibcon#about to read 5, iclass 33, count 2 2006.229.02:47:07.74#ibcon#read 5, iclass 33, count 2 2006.229.02:47:07.74#ibcon#about to read 6, iclass 33, count 2 2006.229.02:47:07.74#ibcon#read 6, iclass 33, count 2 2006.229.02:47:07.74#ibcon#end of sib2, iclass 33, count 2 2006.229.02:47:07.74#ibcon#*mode == 0, iclass 33, count 2 2006.229.02:47:07.74#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.02:47:07.74#ibcon#[27=AT07-04\r\n] 2006.229.02:47:07.74#ibcon#*before write, iclass 33, count 2 2006.229.02:47:07.74#ibcon#enter sib2, iclass 33, count 2 2006.229.02:47:07.74#ibcon#flushed, iclass 33, count 2 2006.229.02:47:07.74#ibcon#about to write, iclass 33, count 2 2006.229.02:47:07.74#ibcon#wrote, iclass 33, count 2 2006.229.02:47:07.74#ibcon#about to read 3, iclass 33, count 2 2006.229.02:47:07.77#ibcon#read 3, iclass 33, count 2 2006.229.02:47:07.77#ibcon#about to read 4, iclass 33, count 2 2006.229.02:47:07.77#ibcon#read 4, iclass 33, count 2 2006.229.02:47:07.77#ibcon#about to read 5, iclass 33, count 2 2006.229.02:47:07.77#ibcon#read 5, iclass 33, count 2 2006.229.02:47:07.77#ibcon#about to read 6, iclass 33, count 2 2006.229.02:47:07.77#ibcon#read 6, iclass 33, count 2 2006.229.02:47:07.77#ibcon#end of sib2, iclass 33, count 2 2006.229.02:47:07.77#ibcon#*after write, iclass 33, count 2 2006.229.02:47:07.77#ibcon#*before return 0, iclass 33, count 2 2006.229.02:47:07.77#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:07.77#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.02:47:07.77#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.02:47:07.77#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:07.77#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:07.89#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:07.89#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:07.89#ibcon#enter wrdev, iclass 33, count 0 2006.229.02:47:07.89#ibcon#first serial, iclass 33, count 0 2006.229.02:47:07.89#ibcon#enter sib2, iclass 33, count 0 2006.229.02:47:07.89#ibcon#flushed, iclass 33, count 0 2006.229.02:47:07.89#ibcon#about to write, iclass 33, count 0 2006.229.02:47:07.89#ibcon#wrote, iclass 33, count 0 2006.229.02:47:07.89#ibcon#about to read 3, iclass 33, count 0 2006.229.02:47:07.91#ibcon#read 3, iclass 33, count 0 2006.229.02:47:07.91#ibcon#about to read 4, iclass 33, count 0 2006.229.02:47:07.91#ibcon#read 4, iclass 33, count 0 2006.229.02:47:07.91#ibcon#about to read 5, iclass 33, count 0 2006.229.02:47:07.91#ibcon#read 5, iclass 33, count 0 2006.229.02:47:07.91#ibcon#about to read 6, iclass 33, count 0 2006.229.02:47:07.91#ibcon#read 6, iclass 33, count 0 2006.229.02:47:07.91#ibcon#end of sib2, iclass 33, count 0 2006.229.02:47:07.91#ibcon#*mode == 0, iclass 33, count 0 2006.229.02:47:07.91#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.02:47:07.91#ibcon#[27=USB\r\n] 2006.229.02:47:07.91#ibcon#*before write, iclass 33, count 0 2006.229.02:47:07.91#ibcon#enter sib2, iclass 33, count 0 2006.229.02:47:07.91#ibcon#flushed, iclass 33, count 0 2006.229.02:47:07.91#ibcon#about to write, iclass 33, count 0 2006.229.02:47:07.91#ibcon#wrote, iclass 33, count 0 2006.229.02:47:07.91#ibcon#about to read 3, iclass 33, count 0 2006.229.02:47:07.94#ibcon#read 3, iclass 33, count 0 2006.229.02:47:07.94#ibcon#about to read 4, iclass 33, count 0 2006.229.02:47:07.94#ibcon#read 4, iclass 33, count 0 2006.229.02:47:07.94#ibcon#about to read 5, iclass 33, count 0 2006.229.02:47:07.94#ibcon#read 5, iclass 33, count 0 2006.229.02:47:07.94#ibcon#about to read 6, iclass 33, count 0 2006.229.02:47:07.94#ibcon#read 6, iclass 33, count 0 2006.229.02:47:07.94#ibcon#end of sib2, iclass 33, count 0 2006.229.02:47:07.94#ibcon#*after write, iclass 33, count 0 2006.229.02:47:07.94#ibcon#*before return 0, iclass 33, count 0 2006.229.02:47:07.94#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:07.94#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.02:47:07.94#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.02:47:07.94#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.02:47:07.94$vck44/vblo=8,744.99 2006.229.02:47:07.94#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.02:47:07.94#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.02:47:07.94#ibcon#ireg 17 cls_cnt 0 2006.229.02:47:07.94#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:07.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:07.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:07.94#ibcon#enter wrdev, iclass 35, count 0 2006.229.02:47:07.94#ibcon#first serial, iclass 35, count 0 2006.229.02:47:07.94#ibcon#enter sib2, iclass 35, count 0 2006.229.02:47:07.94#ibcon#flushed, iclass 35, count 0 2006.229.02:47:07.94#ibcon#about to write, iclass 35, count 0 2006.229.02:47:07.94#ibcon#wrote, iclass 35, count 0 2006.229.02:47:07.94#ibcon#about to read 3, iclass 35, count 0 2006.229.02:47:07.96#ibcon#read 3, iclass 35, count 0 2006.229.02:47:07.96#ibcon#about to read 4, iclass 35, count 0 2006.229.02:47:07.96#ibcon#read 4, iclass 35, count 0 2006.229.02:47:07.96#ibcon#about to read 5, iclass 35, count 0 2006.229.02:47:07.96#ibcon#read 5, iclass 35, count 0 2006.229.02:47:07.96#ibcon#about to read 6, iclass 35, count 0 2006.229.02:47:07.96#ibcon#read 6, iclass 35, count 0 2006.229.02:47:07.96#ibcon#end of sib2, iclass 35, count 0 2006.229.02:47:07.96#ibcon#*mode == 0, iclass 35, count 0 2006.229.02:47:07.96#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.02:47:07.96#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:47:07.96#ibcon#*before write, iclass 35, count 0 2006.229.02:47:07.96#ibcon#enter sib2, iclass 35, count 0 2006.229.02:47:07.96#ibcon#flushed, iclass 35, count 0 2006.229.02:47:07.96#ibcon#about to write, iclass 35, count 0 2006.229.02:47:07.96#ibcon#wrote, iclass 35, count 0 2006.229.02:47:07.96#ibcon#about to read 3, iclass 35, count 0 2006.229.02:47:08.00#ibcon#read 3, iclass 35, count 0 2006.229.02:47:08.00#ibcon#about to read 4, iclass 35, count 0 2006.229.02:47:08.00#ibcon#read 4, iclass 35, count 0 2006.229.02:47:08.00#ibcon#about to read 5, iclass 35, count 0 2006.229.02:47:08.00#ibcon#read 5, iclass 35, count 0 2006.229.02:47:08.00#ibcon#about to read 6, iclass 35, count 0 2006.229.02:47:08.00#ibcon#read 6, iclass 35, count 0 2006.229.02:47:08.00#ibcon#end of sib2, iclass 35, count 0 2006.229.02:47:08.00#ibcon#*after write, iclass 35, count 0 2006.229.02:47:08.00#ibcon#*before return 0, iclass 35, count 0 2006.229.02:47:08.00#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:08.00#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.02:47:08.00#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.02:47:08.00#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.02:47:08.00$vck44/vb=8,4 2006.229.02:47:08.00#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.02:47:08.00#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.02:47:08.00#ibcon#ireg 11 cls_cnt 2 2006.229.02:47:08.00#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:08.06#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:08.06#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:08.06#ibcon#enter wrdev, iclass 37, count 2 2006.229.02:47:08.06#ibcon#first serial, iclass 37, count 2 2006.229.02:47:08.06#ibcon#enter sib2, iclass 37, count 2 2006.229.02:47:08.06#ibcon#flushed, iclass 37, count 2 2006.229.02:47:08.06#ibcon#about to write, iclass 37, count 2 2006.229.02:47:08.06#ibcon#wrote, iclass 37, count 2 2006.229.02:47:08.06#ibcon#about to read 3, iclass 37, count 2 2006.229.02:47:08.08#ibcon#read 3, iclass 37, count 2 2006.229.02:47:08.08#ibcon#about to read 4, iclass 37, count 2 2006.229.02:47:08.08#ibcon#read 4, iclass 37, count 2 2006.229.02:47:08.08#ibcon#about to read 5, iclass 37, count 2 2006.229.02:47:08.08#ibcon#read 5, iclass 37, count 2 2006.229.02:47:08.08#ibcon#about to read 6, iclass 37, count 2 2006.229.02:47:08.08#ibcon#read 6, iclass 37, count 2 2006.229.02:47:08.08#ibcon#end of sib2, iclass 37, count 2 2006.229.02:47:08.08#ibcon#*mode == 0, iclass 37, count 2 2006.229.02:47:08.08#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.02:47:08.08#ibcon#[27=AT08-04\r\n] 2006.229.02:47:08.08#ibcon#*before write, iclass 37, count 2 2006.229.02:47:08.08#ibcon#enter sib2, iclass 37, count 2 2006.229.02:47:08.08#ibcon#flushed, iclass 37, count 2 2006.229.02:47:08.08#ibcon#about to write, iclass 37, count 2 2006.229.02:47:08.08#ibcon#wrote, iclass 37, count 2 2006.229.02:47:08.08#ibcon#about to read 3, iclass 37, count 2 2006.229.02:47:08.11#ibcon#read 3, iclass 37, count 2 2006.229.02:47:08.11#ibcon#about to read 4, iclass 37, count 2 2006.229.02:47:08.11#ibcon#read 4, iclass 37, count 2 2006.229.02:47:08.11#ibcon#about to read 5, iclass 37, count 2 2006.229.02:47:08.11#ibcon#read 5, iclass 37, count 2 2006.229.02:47:08.11#ibcon#about to read 6, iclass 37, count 2 2006.229.02:47:08.11#ibcon#read 6, iclass 37, count 2 2006.229.02:47:08.11#ibcon#end of sib2, iclass 37, count 2 2006.229.02:47:08.11#ibcon#*after write, iclass 37, count 2 2006.229.02:47:08.11#ibcon#*before return 0, iclass 37, count 2 2006.229.02:47:08.11#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:08.11#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.02:47:08.11#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.02:47:08.11#ibcon#ireg 7 cls_cnt 0 2006.229.02:47:08.11#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:08.23#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:08.23#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:08.23#ibcon#enter wrdev, iclass 37, count 0 2006.229.02:47:08.23#ibcon#first serial, iclass 37, count 0 2006.229.02:47:08.23#ibcon#enter sib2, iclass 37, count 0 2006.229.02:47:08.23#ibcon#flushed, iclass 37, count 0 2006.229.02:47:08.23#ibcon#about to write, iclass 37, count 0 2006.229.02:47:08.23#ibcon#wrote, iclass 37, count 0 2006.229.02:47:08.23#ibcon#about to read 3, iclass 37, count 0 2006.229.02:47:08.25#ibcon#read 3, iclass 37, count 0 2006.229.02:47:08.25#ibcon#about to read 4, iclass 37, count 0 2006.229.02:47:08.25#ibcon#read 4, iclass 37, count 0 2006.229.02:47:08.25#ibcon#about to read 5, iclass 37, count 0 2006.229.02:47:08.25#ibcon#read 5, iclass 37, count 0 2006.229.02:47:08.25#ibcon#about to read 6, iclass 37, count 0 2006.229.02:47:08.25#ibcon#read 6, iclass 37, count 0 2006.229.02:47:08.25#ibcon#end of sib2, iclass 37, count 0 2006.229.02:47:08.25#ibcon#*mode == 0, iclass 37, count 0 2006.229.02:47:08.25#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.02:47:08.25#ibcon#[27=USB\r\n] 2006.229.02:47:08.25#ibcon#*before write, iclass 37, count 0 2006.229.02:47:08.25#ibcon#enter sib2, iclass 37, count 0 2006.229.02:47:08.25#ibcon#flushed, iclass 37, count 0 2006.229.02:47:08.25#ibcon#about to write, iclass 37, count 0 2006.229.02:47:08.25#ibcon#wrote, iclass 37, count 0 2006.229.02:47:08.25#ibcon#about to read 3, iclass 37, count 0 2006.229.02:47:08.28#ibcon#read 3, iclass 37, count 0 2006.229.02:47:08.28#ibcon#about to read 4, iclass 37, count 0 2006.229.02:47:08.28#ibcon#read 4, iclass 37, count 0 2006.229.02:47:08.28#ibcon#about to read 5, iclass 37, count 0 2006.229.02:47:08.28#ibcon#read 5, iclass 37, count 0 2006.229.02:47:08.28#ibcon#about to read 6, iclass 37, count 0 2006.229.02:47:08.28#ibcon#read 6, iclass 37, count 0 2006.229.02:47:08.28#ibcon#end of sib2, iclass 37, count 0 2006.229.02:47:08.28#ibcon#*after write, iclass 37, count 0 2006.229.02:47:08.28#ibcon#*before return 0, iclass 37, count 0 2006.229.02:47:08.28#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:08.28#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.02:47:08.28#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.02:47:08.28#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.02:47:08.28$vck44/vabw=wide 2006.229.02:47:08.28#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.02:47:08.28#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.02:47:08.28#ibcon#ireg 8 cls_cnt 0 2006.229.02:47:08.28#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:08.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:08.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:08.28#ibcon#enter wrdev, iclass 39, count 0 2006.229.02:47:08.28#ibcon#first serial, iclass 39, count 0 2006.229.02:47:08.28#ibcon#enter sib2, iclass 39, count 0 2006.229.02:47:08.28#ibcon#flushed, iclass 39, count 0 2006.229.02:47:08.28#ibcon#about to write, iclass 39, count 0 2006.229.02:47:08.28#ibcon#wrote, iclass 39, count 0 2006.229.02:47:08.28#ibcon#about to read 3, iclass 39, count 0 2006.229.02:47:08.30#ibcon#read 3, iclass 39, count 0 2006.229.02:47:08.30#ibcon#about to read 4, iclass 39, count 0 2006.229.02:47:08.30#ibcon#read 4, iclass 39, count 0 2006.229.02:47:08.30#ibcon#about to read 5, iclass 39, count 0 2006.229.02:47:08.30#ibcon#read 5, iclass 39, count 0 2006.229.02:47:08.30#ibcon#about to read 6, iclass 39, count 0 2006.229.02:47:08.30#ibcon#read 6, iclass 39, count 0 2006.229.02:47:08.30#ibcon#end of sib2, iclass 39, count 0 2006.229.02:47:08.30#ibcon#*mode == 0, iclass 39, count 0 2006.229.02:47:08.30#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.02:47:08.30#ibcon#[25=BW32\r\n] 2006.229.02:47:08.30#ibcon#*before write, iclass 39, count 0 2006.229.02:47:08.30#ibcon#enter sib2, iclass 39, count 0 2006.229.02:47:08.30#ibcon#flushed, iclass 39, count 0 2006.229.02:47:08.30#ibcon#about to write, iclass 39, count 0 2006.229.02:47:08.30#ibcon#wrote, iclass 39, count 0 2006.229.02:47:08.30#ibcon#about to read 3, iclass 39, count 0 2006.229.02:47:08.33#ibcon#read 3, iclass 39, count 0 2006.229.02:47:08.33#ibcon#about to read 4, iclass 39, count 0 2006.229.02:47:08.33#ibcon#read 4, iclass 39, count 0 2006.229.02:47:08.33#ibcon#about to read 5, iclass 39, count 0 2006.229.02:47:08.33#ibcon#read 5, iclass 39, count 0 2006.229.02:47:08.33#ibcon#about to read 6, iclass 39, count 0 2006.229.02:47:08.33#ibcon#read 6, iclass 39, count 0 2006.229.02:47:08.33#ibcon#end of sib2, iclass 39, count 0 2006.229.02:47:08.33#ibcon#*after write, iclass 39, count 0 2006.229.02:47:08.33#ibcon#*before return 0, iclass 39, count 0 2006.229.02:47:08.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:08.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.02:47:08.33#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.02:47:08.33#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.02:47:08.33$vck44/vbbw=wide 2006.229.02:47:08.33#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.02:47:08.33#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.02:47:08.33#ibcon#ireg 8 cls_cnt 0 2006.229.02:47:08.33#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:47:08.40#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:47:08.40#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:47:08.40#ibcon#enter wrdev, iclass 3, count 0 2006.229.02:47:08.40#ibcon#first serial, iclass 3, count 0 2006.229.02:47:08.40#ibcon#enter sib2, iclass 3, count 0 2006.229.02:47:08.40#ibcon#flushed, iclass 3, count 0 2006.229.02:47:08.40#ibcon#about to write, iclass 3, count 0 2006.229.02:47:08.40#ibcon#wrote, iclass 3, count 0 2006.229.02:47:08.40#ibcon#about to read 3, iclass 3, count 0 2006.229.02:47:08.42#ibcon#read 3, iclass 3, count 0 2006.229.02:47:08.42#ibcon#about to read 4, iclass 3, count 0 2006.229.02:47:08.42#ibcon#read 4, iclass 3, count 0 2006.229.02:47:08.42#ibcon#about to read 5, iclass 3, count 0 2006.229.02:47:08.42#ibcon#read 5, iclass 3, count 0 2006.229.02:47:08.42#ibcon#about to read 6, iclass 3, count 0 2006.229.02:47:08.42#ibcon#read 6, iclass 3, count 0 2006.229.02:47:08.42#ibcon#end of sib2, iclass 3, count 0 2006.229.02:47:08.42#ibcon#*mode == 0, iclass 3, count 0 2006.229.02:47:08.42#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.02:47:08.42#ibcon#[27=BW32\r\n] 2006.229.02:47:08.42#ibcon#*before write, iclass 3, count 0 2006.229.02:47:08.42#ibcon#enter sib2, iclass 3, count 0 2006.229.02:47:08.42#ibcon#flushed, iclass 3, count 0 2006.229.02:47:08.42#ibcon#about to write, iclass 3, count 0 2006.229.02:47:08.42#ibcon#wrote, iclass 3, count 0 2006.229.02:47:08.42#ibcon#about to read 3, iclass 3, count 0 2006.229.02:47:08.44#abcon#<5=/06 3.1 7.0 28.801001001.0\r\n> 2006.229.02:47:08.45#ibcon#read 3, iclass 3, count 0 2006.229.02:47:08.45#ibcon#about to read 4, iclass 3, count 0 2006.229.02:47:08.45#ibcon#read 4, iclass 3, count 0 2006.229.02:47:08.45#ibcon#about to read 5, iclass 3, count 0 2006.229.02:47:08.45#ibcon#read 5, iclass 3, count 0 2006.229.02:47:08.45#ibcon#about to read 6, iclass 3, count 0 2006.229.02:47:08.45#ibcon#read 6, iclass 3, count 0 2006.229.02:47:08.45#ibcon#end of sib2, iclass 3, count 0 2006.229.02:47:08.45#ibcon#*after write, iclass 3, count 0 2006.229.02:47:08.45#ibcon#*before return 0, iclass 3, count 0 2006.229.02:47:08.45#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:47:08.45#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.02:47:08.45#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.02:47:08.45#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.02:47:08.45$setupk4/ifdk4 2006.229.02:47:08.45$ifdk4/lo= 2006.229.02:47:08.45$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:47:08.45$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:47:08.45$ifdk4/patch= 2006.229.02:47:08.45$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:47:08.45$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:47:08.45$setupk4/!*+20s 2006.229.02:47:08.46#abcon#{5=INTERFACE CLEAR} 2006.229.02:47:08.52#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:47:18.61#abcon#<5=/06 3.1 7.0 28.791001001.1\r\n> 2006.229.02:47:18.63#abcon#{5=INTERFACE CLEAR} 2006.229.02:47:18.70#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:47:20.14#trakl#Source acquired 2006.229.02:47:22.14#flagr#flagr/antenna,acquired 2006.229.02:47:22.93$setupk4/"tpicd 2006.229.02:47:22.93$setupk4/echo=off 2006.229.02:47:22.93$setupk4/xlog=off 2006.229.02:47:22.93:!2006.229.02:51:49 2006.229.02:51:49.00:preob 2006.229.02:51:50.14/onsource/TRACKING 2006.229.02:51:50.14:!2006.229.02:51:59 2006.229.02:51:59.00:"tape 2006.229.02:51:59.00:"st=record 2006.229.02:51:59.00:data_valid=on 2006.229.02:51:59.00:midob 2006.229.02:51:59.14/onsource/TRACKING 2006.229.02:51:59.14/wx/28.55,1001.0,100 2006.229.02:51:59.30/cable/+6.4091E-03 2006.229.02:52:00.39/va/01,08,usb,yes,42,45 2006.229.02:52:00.39/va/02,07,usb,yes,46,46 2006.229.02:52:00.39/va/03,06,usb,yes,56,59 2006.229.02:52:00.39/va/04,07,usb,yes,47,49 2006.229.02:52:00.39/va/05,04,usb,yes,42,43 2006.229.02:52:00.39/va/06,04,usb,yes,47,47 2006.229.02:52:00.39/va/07,05,usb,yes,42,43 2006.229.02:52:00.39/va/08,06,usb,yes,31,38 2006.229.02:52:00.62/valo/01,524.99,yes,locked 2006.229.02:52:00.62/valo/02,534.99,yes,locked 2006.229.02:52:00.62/valo/03,564.99,yes,locked 2006.229.02:52:00.62/valo/04,624.99,yes,locked 2006.229.02:52:00.62/valo/05,734.99,yes,locked 2006.229.02:52:00.62/valo/06,814.99,yes,locked 2006.229.02:52:00.62/valo/07,864.99,yes,locked 2006.229.02:52:00.62/valo/08,884.99,yes,locked 2006.229.02:52:01.71/vb/01,04,usb,yes,32,30 2006.229.02:52:01.71/vb/02,04,usb,yes,35,34 2006.229.02:52:01.71/vb/03,04,usb,yes,32,35 2006.229.02:52:01.71/vb/04,04,usb,yes,36,35 2006.229.02:52:01.71/vb/05,04,usb,yes,28,31 2006.229.02:52:01.71/vb/06,04,usb,yes,33,29 2006.229.02:52:01.71/vb/07,04,usb,yes,33,33 2006.229.02:52:01.71/vb/08,04,usb,yes,30,34 2006.229.02:52:01.95/vblo/01,629.99,yes,locked 2006.229.02:52:01.95/vblo/02,634.99,yes,locked 2006.229.02:52:01.95/vblo/03,649.99,yes,locked 2006.229.02:52:01.95/vblo/04,679.99,yes,locked 2006.229.02:52:01.95/vblo/05,709.99,yes,locked 2006.229.02:52:01.95/vblo/06,719.99,yes,locked 2006.229.02:52:01.95/vblo/07,734.99,yes,locked 2006.229.02:52:01.95/vblo/08,744.99,yes,locked 2006.229.02:52:02.10/vabw/8 2006.229.02:52:02.25/vbbw/8 2006.229.02:52:02.34/xfe/off,on,12.0 2006.229.02:52:02.73/ifatt/23,28,28,28 2006.229.02:52:03.08/fmout-gps/S +4.59E-07 2006.229.02:52:03.12:!2006.229.02:56:39 2006.229.02:56:39.00:data_valid=off 2006.229.02:56:39.00:"et 2006.229.02:56:39.00:!+3s 2006.229.02:56:42.01:"tape 2006.229.02:56:42.01:postob 2006.229.02:56:42.22/cable/+6.4084E-03 2006.229.02:56:42.22/wx/28.38,1000.9,100 2006.229.02:56:43.07/fmout-gps/S +4.56E-07 2006.229.02:56:43.07:scan_name=229-0305,jd0608,40 2006.229.02:56:43.07:source=3c345,164258.81,394837.0,2000.0,cw 2006.229.02:56:44.14:checkk5 2006.229.02:56:44.14#flagr#flagr/antenna,new-source 2006.229.02:56:44.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.02:56:44.85/chk_autoobs//k5ts2/ autoobs is running! 2006.229.02:56:45.21/chk_autoobs//k5ts3/ autoobs is running! 2006.229.02:56:45.55/chk_autoobs//k5ts4/ autoobs is running! 2006.229.02:56:45.89/chk_obsdata//k5ts1/T2290251??a.dat file size is correct (nominal:1120MB, actual:1120MB). 2006.229.02:56:46.23/chk_obsdata//k5ts2/T2290251??b.dat file size is correct (nominal:1120MB, actual:1120MB). 2006.229.02:56:46.58/chk_obsdata//k5ts3/T2290251??c.dat file size is correct (nominal:1120MB, actual:1120MB). 2006.229.02:56:46.94/chk_obsdata//k5ts4/T2290251??d.dat file size is correct (nominal:1120MB, actual:1120MB). 2006.229.02:56:47.60/k5log//k5ts1_log_newline 2006.229.02:56:48.26/k5log//k5ts2_log_newline 2006.229.02:56:48.92/k5log//k5ts3_log_newline 2006.229.02:56:49.58/k5log//k5ts4_log_newline 2006.229.02:56:49.61/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.02:56:49.61:setupk4=1 2006.229.02:56:49.61$setupk4/echo=on 2006.229.02:56:49.61$setupk4/pcalon 2006.229.02:56:49.61$pcalon/"no phase cal control is implemented here 2006.229.02:56:49.61$setupk4/"tpicd=stop 2006.229.02:56:49.61$setupk4/"rec=synch_on 2006.229.02:56:49.61$setupk4/"rec_mode=128 2006.229.02:56:49.61$setupk4/!* 2006.229.02:56:49.61$setupk4/recpk4 2006.229.02:56:49.61$recpk4/recpatch= 2006.229.02:56:49.61$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.02:56:49.61$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.02:56:49.61$setupk4/vck44 2006.229.02:56:49.61$vck44/valo=1,524.99 2006.229.02:56:49.61#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:56:49.61#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:56:49.61#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:49.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:49.61#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:49.61#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:49.61#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:56:49.61#ibcon#first serial, iclass 26, count 0 2006.229.02:56:49.61#ibcon#enter sib2, iclass 26, count 0 2006.229.02:56:49.61#ibcon#flushed, iclass 26, count 0 2006.229.02:56:49.61#ibcon#about to write, iclass 26, count 0 2006.229.02:56:49.61#ibcon#wrote, iclass 26, count 0 2006.229.02:56:49.61#ibcon#about to read 3, iclass 26, count 0 2006.229.02:56:49.63#ibcon#read 3, iclass 26, count 0 2006.229.02:56:49.63#ibcon#about to read 4, iclass 26, count 0 2006.229.02:56:49.63#ibcon#read 4, iclass 26, count 0 2006.229.02:56:49.63#ibcon#about to read 5, iclass 26, count 0 2006.229.02:56:49.63#ibcon#read 5, iclass 26, count 0 2006.229.02:56:49.63#ibcon#about to read 6, iclass 26, count 0 2006.229.02:56:49.63#ibcon#read 6, iclass 26, count 0 2006.229.02:56:49.63#ibcon#end of sib2, iclass 26, count 0 2006.229.02:56:49.63#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:56:49.63#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:56:49.63#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.02:56:49.63#ibcon#*before write, iclass 26, count 0 2006.229.02:56:49.63#ibcon#enter sib2, iclass 26, count 0 2006.229.02:56:49.63#ibcon#flushed, iclass 26, count 0 2006.229.02:56:49.63#ibcon#about to write, iclass 26, count 0 2006.229.02:56:49.63#ibcon#wrote, iclass 26, count 0 2006.229.02:56:49.63#ibcon#about to read 3, iclass 26, count 0 2006.229.02:56:49.68#ibcon#read 3, iclass 26, count 0 2006.229.02:56:49.68#ibcon#about to read 4, iclass 26, count 0 2006.229.02:56:49.68#ibcon#read 4, iclass 26, count 0 2006.229.02:56:49.68#ibcon#about to read 5, iclass 26, count 0 2006.229.02:56:49.68#ibcon#read 5, iclass 26, count 0 2006.229.02:56:49.68#ibcon#about to read 6, iclass 26, count 0 2006.229.02:56:49.68#ibcon#read 6, iclass 26, count 0 2006.229.02:56:49.68#ibcon#end of sib2, iclass 26, count 0 2006.229.02:56:49.68#ibcon#*after write, iclass 26, count 0 2006.229.02:56:49.68#ibcon#*before return 0, iclass 26, count 0 2006.229.02:56:49.68#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:49.68#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:49.68#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:56:49.68#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:56:49.68$vck44/va=1,8 2006.229.02:56:49.68#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:56:49.68#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:56:49.68#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:49.68#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:49.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:49.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:49.68#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:56:49.68#ibcon#first serial, iclass 28, count 2 2006.229.02:56:49.68#ibcon#enter sib2, iclass 28, count 2 2006.229.02:56:49.68#ibcon#flushed, iclass 28, count 2 2006.229.02:56:49.68#ibcon#about to write, iclass 28, count 2 2006.229.02:56:49.68#ibcon#wrote, iclass 28, count 2 2006.229.02:56:49.68#ibcon#about to read 3, iclass 28, count 2 2006.229.02:56:49.70#ibcon#read 3, iclass 28, count 2 2006.229.02:56:49.70#ibcon#about to read 4, iclass 28, count 2 2006.229.02:56:49.70#ibcon#read 4, iclass 28, count 2 2006.229.02:56:49.70#ibcon#about to read 5, iclass 28, count 2 2006.229.02:56:49.70#ibcon#read 5, iclass 28, count 2 2006.229.02:56:49.70#ibcon#about to read 6, iclass 28, count 2 2006.229.02:56:49.70#ibcon#read 6, iclass 28, count 2 2006.229.02:56:49.70#ibcon#end of sib2, iclass 28, count 2 2006.229.02:56:49.70#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:56:49.70#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:56:49.70#ibcon#[25=AT01-08\r\n] 2006.229.02:56:49.70#ibcon#*before write, iclass 28, count 2 2006.229.02:56:49.70#ibcon#enter sib2, iclass 28, count 2 2006.229.02:56:49.70#ibcon#flushed, iclass 28, count 2 2006.229.02:56:49.70#ibcon#about to write, iclass 28, count 2 2006.229.02:56:49.70#ibcon#wrote, iclass 28, count 2 2006.229.02:56:49.70#ibcon#about to read 3, iclass 28, count 2 2006.229.02:56:49.73#ibcon#read 3, iclass 28, count 2 2006.229.02:56:49.73#ibcon#about to read 4, iclass 28, count 2 2006.229.02:56:49.73#ibcon#read 4, iclass 28, count 2 2006.229.02:56:49.73#ibcon#about to read 5, iclass 28, count 2 2006.229.02:56:49.73#ibcon#read 5, iclass 28, count 2 2006.229.02:56:49.73#ibcon#about to read 6, iclass 28, count 2 2006.229.02:56:49.73#ibcon#read 6, iclass 28, count 2 2006.229.02:56:49.73#ibcon#end of sib2, iclass 28, count 2 2006.229.02:56:49.73#ibcon#*after write, iclass 28, count 2 2006.229.02:56:49.73#ibcon#*before return 0, iclass 28, count 2 2006.229.02:56:49.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:49.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:49.73#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:56:49.73#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:49.73#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:49.85#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:49.85#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:49.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:56:49.85#ibcon#first serial, iclass 28, count 0 2006.229.02:56:49.85#ibcon#enter sib2, iclass 28, count 0 2006.229.02:56:49.85#ibcon#flushed, iclass 28, count 0 2006.229.02:56:49.85#ibcon#about to write, iclass 28, count 0 2006.229.02:56:49.85#ibcon#wrote, iclass 28, count 0 2006.229.02:56:49.85#ibcon#about to read 3, iclass 28, count 0 2006.229.02:56:49.87#ibcon#read 3, iclass 28, count 0 2006.229.02:56:49.87#ibcon#about to read 4, iclass 28, count 0 2006.229.02:56:49.87#ibcon#read 4, iclass 28, count 0 2006.229.02:56:49.87#ibcon#about to read 5, iclass 28, count 0 2006.229.02:56:49.87#ibcon#read 5, iclass 28, count 0 2006.229.02:56:49.87#ibcon#about to read 6, iclass 28, count 0 2006.229.02:56:49.87#ibcon#read 6, iclass 28, count 0 2006.229.02:56:49.87#ibcon#end of sib2, iclass 28, count 0 2006.229.02:56:49.87#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:56:49.87#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:56:49.87#ibcon#[25=USB\r\n] 2006.229.02:56:49.87#ibcon#*before write, iclass 28, count 0 2006.229.02:56:49.87#ibcon#enter sib2, iclass 28, count 0 2006.229.02:56:49.87#ibcon#flushed, iclass 28, count 0 2006.229.02:56:49.87#ibcon#about to write, iclass 28, count 0 2006.229.02:56:49.87#ibcon#wrote, iclass 28, count 0 2006.229.02:56:49.87#ibcon#about to read 3, iclass 28, count 0 2006.229.02:56:49.90#ibcon#read 3, iclass 28, count 0 2006.229.02:56:49.90#ibcon#about to read 4, iclass 28, count 0 2006.229.02:56:49.90#ibcon#read 4, iclass 28, count 0 2006.229.02:56:49.90#ibcon#about to read 5, iclass 28, count 0 2006.229.02:56:49.90#ibcon#read 5, iclass 28, count 0 2006.229.02:56:49.90#ibcon#about to read 6, iclass 28, count 0 2006.229.02:56:49.90#ibcon#read 6, iclass 28, count 0 2006.229.02:56:49.90#ibcon#end of sib2, iclass 28, count 0 2006.229.02:56:49.90#ibcon#*after write, iclass 28, count 0 2006.229.02:56:49.90#ibcon#*before return 0, iclass 28, count 0 2006.229.02:56:49.90#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:49.90#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:49.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:56:49.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:56:49.90$vck44/valo=2,534.99 2006.229.02:56:49.90#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:56:49.90#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:56:49.90#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:49.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:49.90#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:49.90#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:49.90#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:56:49.90#ibcon#first serial, iclass 30, count 0 2006.229.02:56:49.90#ibcon#enter sib2, iclass 30, count 0 2006.229.02:56:49.90#ibcon#flushed, iclass 30, count 0 2006.229.02:56:49.90#ibcon#about to write, iclass 30, count 0 2006.229.02:56:49.90#ibcon#wrote, iclass 30, count 0 2006.229.02:56:49.90#ibcon#about to read 3, iclass 30, count 0 2006.229.02:56:49.92#ibcon#read 3, iclass 30, count 0 2006.229.02:56:49.92#ibcon#about to read 4, iclass 30, count 0 2006.229.02:56:49.92#ibcon#read 4, iclass 30, count 0 2006.229.02:56:49.92#ibcon#about to read 5, iclass 30, count 0 2006.229.02:56:49.92#ibcon#read 5, iclass 30, count 0 2006.229.02:56:49.92#ibcon#about to read 6, iclass 30, count 0 2006.229.02:56:49.92#ibcon#read 6, iclass 30, count 0 2006.229.02:56:49.92#ibcon#end of sib2, iclass 30, count 0 2006.229.02:56:49.92#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:56:49.92#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:56:49.92#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.02:56:49.92#ibcon#*before write, iclass 30, count 0 2006.229.02:56:49.92#ibcon#enter sib2, iclass 30, count 0 2006.229.02:56:49.92#ibcon#flushed, iclass 30, count 0 2006.229.02:56:49.92#ibcon#about to write, iclass 30, count 0 2006.229.02:56:49.92#ibcon#wrote, iclass 30, count 0 2006.229.02:56:49.92#ibcon#about to read 3, iclass 30, count 0 2006.229.02:56:49.96#ibcon#read 3, iclass 30, count 0 2006.229.02:56:49.96#ibcon#about to read 4, iclass 30, count 0 2006.229.02:56:49.96#ibcon#read 4, iclass 30, count 0 2006.229.02:56:49.96#ibcon#about to read 5, iclass 30, count 0 2006.229.02:56:49.96#ibcon#read 5, iclass 30, count 0 2006.229.02:56:49.96#ibcon#about to read 6, iclass 30, count 0 2006.229.02:56:49.96#ibcon#read 6, iclass 30, count 0 2006.229.02:56:49.96#ibcon#end of sib2, iclass 30, count 0 2006.229.02:56:49.96#ibcon#*after write, iclass 30, count 0 2006.229.02:56:49.96#ibcon#*before return 0, iclass 30, count 0 2006.229.02:56:49.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:49.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:49.96#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:56:49.96#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:56:49.96$vck44/va=2,7 2006.229.02:56:49.96#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:56:49.96#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:56:49.96#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:49.96#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:50.02#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:50.02#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:50.02#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:56:50.02#ibcon#first serial, iclass 32, count 2 2006.229.02:56:50.02#ibcon#enter sib2, iclass 32, count 2 2006.229.02:56:50.02#ibcon#flushed, iclass 32, count 2 2006.229.02:56:50.02#ibcon#about to write, iclass 32, count 2 2006.229.02:56:50.02#ibcon#wrote, iclass 32, count 2 2006.229.02:56:50.02#ibcon#about to read 3, iclass 32, count 2 2006.229.02:56:50.04#ibcon#read 3, iclass 32, count 2 2006.229.02:56:50.04#ibcon#about to read 4, iclass 32, count 2 2006.229.02:56:50.04#ibcon#read 4, iclass 32, count 2 2006.229.02:56:50.04#ibcon#about to read 5, iclass 32, count 2 2006.229.02:56:50.04#ibcon#read 5, iclass 32, count 2 2006.229.02:56:50.04#ibcon#about to read 6, iclass 32, count 2 2006.229.02:56:50.04#ibcon#read 6, iclass 32, count 2 2006.229.02:56:50.04#ibcon#end of sib2, iclass 32, count 2 2006.229.02:56:50.04#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:56:50.04#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:56:50.04#ibcon#[25=AT02-07\r\n] 2006.229.02:56:50.04#ibcon#*before write, iclass 32, count 2 2006.229.02:56:50.04#ibcon#enter sib2, iclass 32, count 2 2006.229.02:56:50.04#ibcon#flushed, iclass 32, count 2 2006.229.02:56:50.04#ibcon#about to write, iclass 32, count 2 2006.229.02:56:50.04#ibcon#wrote, iclass 32, count 2 2006.229.02:56:50.04#ibcon#about to read 3, iclass 32, count 2 2006.229.02:56:50.07#ibcon#read 3, iclass 32, count 2 2006.229.02:56:50.07#ibcon#about to read 4, iclass 32, count 2 2006.229.02:56:50.07#ibcon#read 4, iclass 32, count 2 2006.229.02:56:50.07#ibcon#about to read 5, iclass 32, count 2 2006.229.02:56:50.07#ibcon#read 5, iclass 32, count 2 2006.229.02:56:50.07#ibcon#about to read 6, iclass 32, count 2 2006.229.02:56:50.07#ibcon#read 6, iclass 32, count 2 2006.229.02:56:50.07#ibcon#end of sib2, iclass 32, count 2 2006.229.02:56:50.07#ibcon#*after write, iclass 32, count 2 2006.229.02:56:50.07#ibcon#*before return 0, iclass 32, count 2 2006.229.02:56:50.07#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:50.07#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:50.07#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:56:50.07#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:50.07#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:50.19#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:50.19#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:50.19#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:56:50.19#ibcon#first serial, iclass 32, count 0 2006.229.02:56:50.19#ibcon#enter sib2, iclass 32, count 0 2006.229.02:56:50.19#ibcon#flushed, iclass 32, count 0 2006.229.02:56:50.19#ibcon#about to write, iclass 32, count 0 2006.229.02:56:50.19#ibcon#wrote, iclass 32, count 0 2006.229.02:56:50.19#ibcon#about to read 3, iclass 32, count 0 2006.229.02:56:50.21#ibcon#read 3, iclass 32, count 0 2006.229.02:56:50.21#ibcon#about to read 4, iclass 32, count 0 2006.229.02:56:50.21#ibcon#read 4, iclass 32, count 0 2006.229.02:56:50.21#ibcon#about to read 5, iclass 32, count 0 2006.229.02:56:50.21#ibcon#read 5, iclass 32, count 0 2006.229.02:56:50.21#ibcon#about to read 6, iclass 32, count 0 2006.229.02:56:50.21#ibcon#read 6, iclass 32, count 0 2006.229.02:56:50.21#ibcon#end of sib2, iclass 32, count 0 2006.229.02:56:50.21#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:56:50.21#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:56:50.21#ibcon#[25=USB\r\n] 2006.229.02:56:50.21#ibcon#*before write, iclass 32, count 0 2006.229.02:56:50.21#ibcon#enter sib2, iclass 32, count 0 2006.229.02:56:50.21#ibcon#flushed, iclass 32, count 0 2006.229.02:56:50.21#ibcon#about to write, iclass 32, count 0 2006.229.02:56:50.21#ibcon#wrote, iclass 32, count 0 2006.229.02:56:50.21#ibcon#about to read 3, iclass 32, count 0 2006.229.02:56:50.24#ibcon#read 3, iclass 32, count 0 2006.229.02:56:50.24#ibcon#about to read 4, iclass 32, count 0 2006.229.02:56:50.24#ibcon#read 4, iclass 32, count 0 2006.229.02:56:50.24#ibcon#about to read 5, iclass 32, count 0 2006.229.02:56:50.24#ibcon#read 5, iclass 32, count 0 2006.229.02:56:50.24#ibcon#about to read 6, iclass 32, count 0 2006.229.02:56:50.24#ibcon#read 6, iclass 32, count 0 2006.229.02:56:50.24#ibcon#end of sib2, iclass 32, count 0 2006.229.02:56:50.24#ibcon#*after write, iclass 32, count 0 2006.229.02:56:50.24#ibcon#*before return 0, iclass 32, count 0 2006.229.02:56:50.24#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:50.24#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:50.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:56:50.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:56:50.24$vck44/valo=3,564.99 2006.229.02:56:50.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:56:50.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:56:50.24#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:50.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:50.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:50.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:50.24#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:56:50.24#ibcon#first serial, iclass 34, count 0 2006.229.02:56:50.24#ibcon#enter sib2, iclass 34, count 0 2006.229.02:56:50.24#ibcon#flushed, iclass 34, count 0 2006.229.02:56:50.24#ibcon#about to write, iclass 34, count 0 2006.229.02:56:50.24#ibcon#wrote, iclass 34, count 0 2006.229.02:56:50.24#ibcon#about to read 3, iclass 34, count 0 2006.229.02:56:50.26#ibcon#read 3, iclass 34, count 0 2006.229.02:56:50.26#ibcon#about to read 4, iclass 34, count 0 2006.229.02:56:50.26#ibcon#read 4, iclass 34, count 0 2006.229.02:56:50.26#ibcon#about to read 5, iclass 34, count 0 2006.229.02:56:50.26#ibcon#read 5, iclass 34, count 0 2006.229.02:56:50.26#ibcon#about to read 6, iclass 34, count 0 2006.229.02:56:50.26#ibcon#read 6, iclass 34, count 0 2006.229.02:56:50.26#ibcon#end of sib2, iclass 34, count 0 2006.229.02:56:50.26#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:56:50.26#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:56:50.26#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.02:56:50.26#ibcon#*before write, iclass 34, count 0 2006.229.02:56:50.26#ibcon#enter sib2, iclass 34, count 0 2006.229.02:56:50.26#ibcon#flushed, iclass 34, count 0 2006.229.02:56:50.26#ibcon#about to write, iclass 34, count 0 2006.229.02:56:50.26#ibcon#wrote, iclass 34, count 0 2006.229.02:56:50.26#ibcon#about to read 3, iclass 34, count 0 2006.229.02:56:50.30#ibcon#read 3, iclass 34, count 0 2006.229.02:56:50.30#ibcon#about to read 4, iclass 34, count 0 2006.229.02:56:50.30#ibcon#read 4, iclass 34, count 0 2006.229.02:56:50.30#ibcon#about to read 5, iclass 34, count 0 2006.229.02:56:50.30#ibcon#read 5, iclass 34, count 0 2006.229.02:56:50.30#ibcon#about to read 6, iclass 34, count 0 2006.229.02:56:50.30#ibcon#read 6, iclass 34, count 0 2006.229.02:56:50.30#ibcon#end of sib2, iclass 34, count 0 2006.229.02:56:50.30#ibcon#*after write, iclass 34, count 0 2006.229.02:56:50.30#ibcon#*before return 0, iclass 34, count 0 2006.229.02:56:50.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:50.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:50.30#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:56:50.30#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:56:50.30$vck44/va=3,6 2006.229.02:56:50.30#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.02:56:50.30#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.02:56:50.30#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:50.30#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:50.36#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:50.36#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:50.36#ibcon#enter wrdev, iclass 36, count 2 2006.229.02:56:50.36#ibcon#first serial, iclass 36, count 2 2006.229.02:56:50.36#ibcon#enter sib2, iclass 36, count 2 2006.229.02:56:50.36#ibcon#flushed, iclass 36, count 2 2006.229.02:56:50.36#ibcon#about to write, iclass 36, count 2 2006.229.02:56:50.36#ibcon#wrote, iclass 36, count 2 2006.229.02:56:50.36#ibcon#about to read 3, iclass 36, count 2 2006.229.02:56:50.38#ibcon#read 3, iclass 36, count 2 2006.229.02:56:50.38#ibcon#about to read 4, iclass 36, count 2 2006.229.02:56:50.38#ibcon#read 4, iclass 36, count 2 2006.229.02:56:50.38#ibcon#about to read 5, iclass 36, count 2 2006.229.02:56:50.38#ibcon#read 5, iclass 36, count 2 2006.229.02:56:50.38#ibcon#about to read 6, iclass 36, count 2 2006.229.02:56:50.38#ibcon#read 6, iclass 36, count 2 2006.229.02:56:50.38#ibcon#end of sib2, iclass 36, count 2 2006.229.02:56:50.38#ibcon#*mode == 0, iclass 36, count 2 2006.229.02:56:50.38#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.02:56:50.38#ibcon#[25=AT03-06\r\n] 2006.229.02:56:50.38#ibcon#*before write, iclass 36, count 2 2006.229.02:56:50.38#ibcon#enter sib2, iclass 36, count 2 2006.229.02:56:50.38#ibcon#flushed, iclass 36, count 2 2006.229.02:56:50.38#ibcon#about to write, iclass 36, count 2 2006.229.02:56:50.38#ibcon#wrote, iclass 36, count 2 2006.229.02:56:50.38#ibcon#about to read 3, iclass 36, count 2 2006.229.02:56:50.41#ibcon#read 3, iclass 36, count 2 2006.229.02:56:50.41#ibcon#about to read 4, iclass 36, count 2 2006.229.02:56:50.41#ibcon#read 4, iclass 36, count 2 2006.229.02:56:50.41#ibcon#about to read 5, iclass 36, count 2 2006.229.02:56:50.41#ibcon#read 5, iclass 36, count 2 2006.229.02:56:50.41#ibcon#about to read 6, iclass 36, count 2 2006.229.02:56:50.41#ibcon#read 6, iclass 36, count 2 2006.229.02:56:50.41#ibcon#end of sib2, iclass 36, count 2 2006.229.02:56:50.41#ibcon#*after write, iclass 36, count 2 2006.229.02:56:50.41#ibcon#*before return 0, iclass 36, count 2 2006.229.02:56:50.41#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:50.41#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:50.41#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.02:56:50.41#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:50.41#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:50.53#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:50.53#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:50.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:56:50.53#ibcon#first serial, iclass 36, count 0 2006.229.02:56:50.53#ibcon#enter sib2, iclass 36, count 0 2006.229.02:56:50.53#ibcon#flushed, iclass 36, count 0 2006.229.02:56:50.53#ibcon#about to write, iclass 36, count 0 2006.229.02:56:50.53#ibcon#wrote, iclass 36, count 0 2006.229.02:56:50.53#ibcon#about to read 3, iclass 36, count 0 2006.229.02:56:50.55#ibcon#read 3, iclass 36, count 0 2006.229.02:56:50.55#ibcon#about to read 4, iclass 36, count 0 2006.229.02:56:50.55#ibcon#read 4, iclass 36, count 0 2006.229.02:56:50.55#ibcon#about to read 5, iclass 36, count 0 2006.229.02:56:50.55#ibcon#read 5, iclass 36, count 0 2006.229.02:56:50.55#ibcon#about to read 6, iclass 36, count 0 2006.229.02:56:50.55#ibcon#read 6, iclass 36, count 0 2006.229.02:56:50.55#ibcon#end of sib2, iclass 36, count 0 2006.229.02:56:50.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:56:50.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:56:50.55#ibcon#[25=USB\r\n] 2006.229.02:56:50.55#ibcon#*before write, iclass 36, count 0 2006.229.02:56:50.55#ibcon#enter sib2, iclass 36, count 0 2006.229.02:56:50.55#ibcon#flushed, iclass 36, count 0 2006.229.02:56:50.55#ibcon#about to write, iclass 36, count 0 2006.229.02:56:50.55#ibcon#wrote, iclass 36, count 0 2006.229.02:56:50.55#ibcon#about to read 3, iclass 36, count 0 2006.229.02:56:50.58#ibcon#read 3, iclass 36, count 0 2006.229.02:56:50.58#ibcon#about to read 4, iclass 36, count 0 2006.229.02:56:50.58#ibcon#read 4, iclass 36, count 0 2006.229.02:56:50.58#ibcon#about to read 5, iclass 36, count 0 2006.229.02:56:50.58#ibcon#read 5, iclass 36, count 0 2006.229.02:56:50.58#ibcon#about to read 6, iclass 36, count 0 2006.229.02:56:50.58#ibcon#read 6, iclass 36, count 0 2006.229.02:56:50.58#ibcon#end of sib2, iclass 36, count 0 2006.229.02:56:50.58#ibcon#*after write, iclass 36, count 0 2006.229.02:56:50.58#ibcon#*before return 0, iclass 36, count 0 2006.229.02:56:50.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:50.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:50.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:56:50.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:56:50.58$vck44/valo=4,624.99 2006.229.02:56:50.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:56:50.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:56:50.58#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:50.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:50.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:50.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:50.58#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:56:50.58#ibcon#first serial, iclass 38, count 0 2006.229.02:56:50.58#ibcon#enter sib2, iclass 38, count 0 2006.229.02:56:50.58#ibcon#flushed, iclass 38, count 0 2006.229.02:56:50.58#ibcon#about to write, iclass 38, count 0 2006.229.02:56:50.58#ibcon#wrote, iclass 38, count 0 2006.229.02:56:50.58#ibcon#about to read 3, iclass 38, count 0 2006.229.02:56:50.60#ibcon#read 3, iclass 38, count 0 2006.229.02:56:50.60#ibcon#about to read 4, iclass 38, count 0 2006.229.02:56:50.60#ibcon#read 4, iclass 38, count 0 2006.229.02:56:50.60#ibcon#about to read 5, iclass 38, count 0 2006.229.02:56:50.60#ibcon#read 5, iclass 38, count 0 2006.229.02:56:50.60#ibcon#about to read 6, iclass 38, count 0 2006.229.02:56:50.60#ibcon#read 6, iclass 38, count 0 2006.229.02:56:50.60#ibcon#end of sib2, iclass 38, count 0 2006.229.02:56:50.60#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:56:50.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:56:50.60#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.02:56:50.60#ibcon#*before write, iclass 38, count 0 2006.229.02:56:50.60#ibcon#enter sib2, iclass 38, count 0 2006.229.02:56:50.60#ibcon#flushed, iclass 38, count 0 2006.229.02:56:50.60#ibcon#about to write, iclass 38, count 0 2006.229.02:56:50.60#ibcon#wrote, iclass 38, count 0 2006.229.02:56:50.60#ibcon#about to read 3, iclass 38, count 0 2006.229.02:56:50.64#ibcon#read 3, iclass 38, count 0 2006.229.02:56:50.64#ibcon#about to read 4, iclass 38, count 0 2006.229.02:56:50.64#ibcon#read 4, iclass 38, count 0 2006.229.02:56:50.64#ibcon#about to read 5, iclass 38, count 0 2006.229.02:56:50.64#ibcon#read 5, iclass 38, count 0 2006.229.02:56:50.64#ibcon#about to read 6, iclass 38, count 0 2006.229.02:56:50.64#ibcon#read 6, iclass 38, count 0 2006.229.02:56:50.64#ibcon#end of sib2, iclass 38, count 0 2006.229.02:56:50.64#ibcon#*after write, iclass 38, count 0 2006.229.02:56:50.64#ibcon#*before return 0, iclass 38, count 0 2006.229.02:56:50.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:50.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:50.64#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:56:50.64#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:56:50.64$vck44/va=4,7 2006.229.02:56:50.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.02:56:50.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.02:56:50.64#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:50.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:50.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:50.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:50.70#ibcon#enter wrdev, iclass 40, count 2 2006.229.02:56:50.70#ibcon#first serial, iclass 40, count 2 2006.229.02:56:50.70#ibcon#enter sib2, iclass 40, count 2 2006.229.02:56:50.70#ibcon#flushed, iclass 40, count 2 2006.229.02:56:50.70#ibcon#about to write, iclass 40, count 2 2006.229.02:56:50.70#ibcon#wrote, iclass 40, count 2 2006.229.02:56:50.70#ibcon#about to read 3, iclass 40, count 2 2006.229.02:56:50.72#ibcon#read 3, iclass 40, count 2 2006.229.02:56:50.72#ibcon#about to read 4, iclass 40, count 2 2006.229.02:56:50.72#ibcon#read 4, iclass 40, count 2 2006.229.02:56:50.72#ibcon#about to read 5, iclass 40, count 2 2006.229.02:56:50.72#ibcon#read 5, iclass 40, count 2 2006.229.02:56:50.72#ibcon#about to read 6, iclass 40, count 2 2006.229.02:56:50.72#ibcon#read 6, iclass 40, count 2 2006.229.02:56:50.72#ibcon#end of sib2, iclass 40, count 2 2006.229.02:56:50.72#ibcon#*mode == 0, iclass 40, count 2 2006.229.02:56:50.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.02:56:50.72#ibcon#[25=AT04-07\r\n] 2006.229.02:56:50.72#ibcon#*before write, iclass 40, count 2 2006.229.02:56:50.72#ibcon#enter sib2, iclass 40, count 2 2006.229.02:56:50.72#ibcon#flushed, iclass 40, count 2 2006.229.02:56:50.72#ibcon#about to write, iclass 40, count 2 2006.229.02:56:50.72#ibcon#wrote, iclass 40, count 2 2006.229.02:56:50.72#ibcon#about to read 3, iclass 40, count 2 2006.229.02:56:50.75#ibcon#read 3, iclass 40, count 2 2006.229.02:56:50.75#ibcon#about to read 4, iclass 40, count 2 2006.229.02:56:50.75#ibcon#read 4, iclass 40, count 2 2006.229.02:56:50.75#ibcon#about to read 5, iclass 40, count 2 2006.229.02:56:50.75#ibcon#read 5, iclass 40, count 2 2006.229.02:56:50.75#ibcon#about to read 6, iclass 40, count 2 2006.229.02:56:50.75#ibcon#read 6, iclass 40, count 2 2006.229.02:56:50.75#ibcon#end of sib2, iclass 40, count 2 2006.229.02:56:50.75#ibcon#*after write, iclass 40, count 2 2006.229.02:56:50.75#ibcon#*before return 0, iclass 40, count 2 2006.229.02:56:50.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:50.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:50.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.02:56:50.75#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:50.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:50.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:50.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:50.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:56:50.87#ibcon#first serial, iclass 40, count 0 2006.229.02:56:50.87#ibcon#enter sib2, iclass 40, count 0 2006.229.02:56:50.87#ibcon#flushed, iclass 40, count 0 2006.229.02:56:50.87#ibcon#about to write, iclass 40, count 0 2006.229.02:56:50.87#ibcon#wrote, iclass 40, count 0 2006.229.02:56:50.87#ibcon#about to read 3, iclass 40, count 0 2006.229.02:56:50.89#ibcon#read 3, iclass 40, count 0 2006.229.02:56:50.89#ibcon#about to read 4, iclass 40, count 0 2006.229.02:56:50.89#ibcon#read 4, iclass 40, count 0 2006.229.02:56:50.89#ibcon#about to read 5, iclass 40, count 0 2006.229.02:56:50.89#ibcon#read 5, iclass 40, count 0 2006.229.02:56:50.89#ibcon#about to read 6, iclass 40, count 0 2006.229.02:56:50.89#ibcon#read 6, iclass 40, count 0 2006.229.02:56:50.89#ibcon#end of sib2, iclass 40, count 0 2006.229.02:56:50.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:56:50.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:56:50.89#ibcon#[25=USB\r\n] 2006.229.02:56:50.89#ibcon#*before write, iclass 40, count 0 2006.229.02:56:50.89#ibcon#enter sib2, iclass 40, count 0 2006.229.02:56:50.89#ibcon#flushed, iclass 40, count 0 2006.229.02:56:50.89#ibcon#about to write, iclass 40, count 0 2006.229.02:56:50.89#ibcon#wrote, iclass 40, count 0 2006.229.02:56:50.89#ibcon#about to read 3, iclass 40, count 0 2006.229.02:56:50.92#ibcon#read 3, iclass 40, count 0 2006.229.02:56:50.92#ibcon#about to read 4, iclass 40, count 0 2006.229.02:56:50.92#ibcon#read 4, iclass 40, count 0 2006.229.02:56:50.92#ibcon#about to read 5, iclass 40, count 0 2006.229.02:56:50.92#ibcon#read 5, iclass 40, count 0 2006.229.02:56:50.92#ibcon#about to read 6, iclass 40, count 0 2006.229.02:56:50.92#ibcon#read 6, iclass 40, count 0 2006.229.02:56:50.92#ibcon#end of sib2, iclass 40, count 0 2006.229.02:56:50.92#ibcon#*after write, iclass 40, count 0 2006.229.02:56:50.92#ibcon#*before return 0, iclass 40, count 0 2006.229.02:56:50.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:50.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:50.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:56:50.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:56:50.92$vck44/valo=5,734.99 2006.229.02:56:50.92#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:56:50.92#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:56:50.92#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:50.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:50.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:50.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:50.92#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:56:50.92#ibcon#first serial, iclass 4, count 0 2006.229.02:56:50.92#ibcon#enter sib2, iclass 4, count 0 2006.229.02:56:50.92#ibcon#flushed, iclass 4, count 0 2006.229.02:56:50.92#ibcon#about to write, iclass 4, count 0 2006.229.02:56:50.92#ibcon#wrote, iclass 4, count 0 2006.229.02:56:50.92#ibcon#about to read 3, iclass 4, count 0 2006.229.02:56:50.94#ibcon#read 3, iclass 4, count 0 2006.229.02:56:50.94#ibcon#about to read 4, iclass 4, count 0 2006.229.02:56:50.94#ibcon#read 4, iclass 4, count 0 2006.229.02:56:50.94#ibcon#about to read 5, iclass 4, count 0 2006.229.02:56:50.94#ibcon#read 5, iclass 4, count 0 2006.229.02:56:50.94#ibcon#about to read 6, iclass 4, count 0 2006.229.02:56:50.94#ibcon#read 6, iclass 4, count 0 2006.229.02:56:50.94#ibcon#end of sib2, iclass 4, count 0 2006.229.02:56:50.94#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:56:50.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:56:50.94#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.02:56:50.94#ibcon#*before write, iclass 4, count 0 2006.229.02:56:50.94#ibcon#enter sib2, iclass 4, count 0 2006.229.02:56:50.94#ibcon#flushed, iclass 4, count 0 2006.229.02:56:50.94#ibcon#about to write, iclass 4, count 0 2006.229.02:56:50.94#ibcon#wrote, iclass 4, count 0 2006.229.02:56:50.94#ibcon#about to read 3, iclass 4, count 0 2006.229.02:56:50.98#ibcon#read 3, iclass 4, count 0 2006.229.02:56:50.98#ibcon#about to read 4, iclass 4, count 0 2006.229.02:56:50.98#ibcon#read 4, iclass 4, count 0 2006.229.02:56:50.98#ibcon#about to read 5, iclass 4, count 0 2006.229.02:56:50.98#ibcon#read 5, iclass 4, count 0 2006.229.02:56:50.98#ibcon#about to read 6, iclass 4, count 0 2006.229.02:56:50.98#ibcon#read 6, iclass 4, count 0 2006.229.02:56:50.98#ibcon#end of sib2, iclass 4, count 0 2006.229.02:56:50.98#ibcon#*after write, iclass 4, count 0 2006.229.02:56:50.98#ibcon#*before return 0, iclass 4, count 0 2006.229.02:56:50.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:50.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:50.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:56:50.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:56:50.98$vck44/va=5,4 2006.229.02:56:50.98#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:56:50.98#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:56:50.98#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:50.98#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:51.04#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:51.04#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:51.04#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:56:51.04#ibcon#first serial, iclass 6, count 2 2006.229.02:56:51.04#ibcon#enter sib2, iclass 6, count 2 2006.229.02:56:51.04#ibcon#flushed, iclass 6, count 2 2006.229.02:56:51.04#ibcon#about to write, iclass 6, count 2 2006.229.02:56:51.04#ibcon#wrote, iclass 6, count 2 2006.229.02:56:51.04#ibcon#about to read 3, iclass 6, count 2 2006.229.02:56:51.06#ibcon#read 3, iclass 6, count 2 2006.229.02:56:51.06#ibcon#about to read 4, iclass 6, count 2 2006.229.02:56:51.06#ibcon#read 4, iclass 6, count 2 2006.229.02:56:51.06#ibcon#about to read 5, iclass 6, count 2 2006.229.02:56:51.06#ibcon#read 5, iclass 6, count 2 2006.229.02:56:51.06#ibcon#about to read 6, iclass 6, count 2 2006.229.02:56:51.06#ibcon#read 6, iclass 6, count 2 2006.229.02:56:51.06#ibcon#end of sib2, iclass 6, count 2 2006.229.02:56:51.06#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:56:51.06#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:56:51.06#ibcon#[25=AT05-04\r\n] 2006.229.02:56:51.06#ibcon#*before write, iclass 6, count 2 2006.229.02:56:51.06#ibcon#enter sib2, iclass 6, count 2 2006.229.02:56:51.06#ibcon#flushed, iclass 6, count 2 2006.229.02:56:51.06#ibcon#about to write, iclass 6, count 2 2006.229.02:56:51.06#ibcon#wrote, iclass 6, count 2 2006.229.02:56:51.06#ibcon#about to read 3, iclass 6, count 2 2006.229.02:56:51.09#ibcon#read 3, iclass 6, count 2 2006.229.02:56:51.09#ibcon#about to read 4, iclass 6, count 2 2006.229.02:56:51.09#ibcon#read 4, iclass 6, count 2 2006.229.02:56:51.09#ibcon#about to read 5, iclass 6, count 2 2006.229.02:56:51.09#ibcon#read 5, iclass 6, count 2 2006.229.02:56:51.09#ibcon#about to read 6, iclass 6, count 2 2006.229.02:56:51.09#ibcon#read 6, iclass 6, count 2 2006.229.02:56:51.09#ibcon#end of sib2, iclass 6, count 2 2006.229.02:56:51.09#ibcon#*after write, iclass 6, count 2 2006.229.02:56:51.09#ibcon#*before return 0, iclass 6, count 2 2006.229.02:56:51.09#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:51.09#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:51.09#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:56:51.09#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:51.09#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:51.21#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:51.21#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:51.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:56:51.21#ibcon#first serial, iclass 6, count 0 2006.229.02:56:51.21#ibcon#enter sib2, iclass 6, count 0 2006.229.02:56:51.21#ibcon#flushed, iclass 6, count 0 2006.229.02:56:51.21#ibcon#about to write, iclass 6, count 0 2006.229.02:56:51.21#ibcon#wrote, iclass 6, count 0 2006.229.02:56:51.21#ibcon#about to read 3, iclass 6, count 0 2006.229.02:56:51.23#ibcon#read 3, iclass 6, count 0 2006.229.02:56:51.23#ibcon#about to read 4, iclass 6, count 0 2006.229.02:56:51.23#ibcon#read 4, iclass 6, count 0 2006.229.02:56:51.23#ibcon#about to read 5, iclass 6, count 0 2006.229.02:56:51.23#ibcon#read 5, iclass 6, count 0 2006.229.02:56:51.23#ibcon#about to read 6, iclass 6, count 0 2006.229.02:56:51.23#ibcon#read 6, iclass 6, count 0 2006.229.02:56:51.23#ibcon#end of sib2, iclass 6, count 0 2006.229.02:56:51.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:56:51.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:56:51.23#ibcon#[25=USB\r\n] 2006.229.02:56:51.23#ibcon#*before write, iclass 6, count 0 2006.229.02:56:51.23#ibcon#enter sib2, iclass 6, count 0 2006.229.02:56:51.23#ibcon#flushed, iclass 6, count 0 2006.229.02:56:51.23#ibcon#about to write, iclass 6, count 0 2006.229.02:56:51.23#ibcon#wrote, iclass 6, count 0 2006.229.02:56:51.23#ibcon#about to read 3, iclass 6, count 0 2006.229.02:56:51.26#ibcon#read 3, iclass 6, count 0 2006.229.02:56:51.26#ibcon#about to read 4, iclass 6, count 0 2006.229.02:56:51.26#ibcon#read 4, iclass 6, count 0 2006.229.02:56:51.26#ibcon#about to read 5, iclass 6, count 0 2006.229.02:56:51.26#ibcon#read 5, iclass 6, count 0 2006.229.02:56:51.26#ibcon#about to read 6, iclass 6, count 0 2006.229.02:56:51.26#ibcon#read 6, iclass 6, count 0 2006.229.02:56:51.26#ibcon#end of sib2, iclass 6, count 0 2006.229.02:56:51.26#ibcon#*after write, iclass 6, count 0 2006.229.02:56:51.26#ibcon#*before return 0, iclass 6, count 0 2006.229.02:56:51.26#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:51.26#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:51.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:56:51.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:56:51.26$vck44/valo=6,814.99 2006.229.02:56:51.26#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:56:51.26#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:56:51.26#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:51.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:51.26#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:51.26#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:51.26#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:56:51.26#ibcon#first serial, iclass 10, count 0 2006.229.02:56:51.26#ibcon#enter sib2, iclass 10, count 0 2006.229.02:56:51.26#ibcon#flushed, iclass 10, count 0 2006.229.02:56:51.26#ibcon#about to write, iclass 10, count 0 2006.229.02:56:51.26#ibcon#wrote, iclass 10, count 0 2006.229.02:56:51.26#ibcon#about to read 3, iclass 10, count 0 2006.229.02:56:51.28#ibcon#read 3, iclass 10, count 0 2006.229.02:56:51.28#ibcon#about to read 4, iclass 10, count 0 2006.229.02:56:51.28#ibcon#read 4, iclass 10, count 0 2006.229.02:56:51.28#ibcon#about to read 5, iclass 10, count 0 2006.229.02:56:51.28#ibcon#read 5, iclass 10, count 0 2006.229.02:56:51.28#ibcon#about to read 6, iclass 10, count 0 2006.229.02:56:51.28#ibcon#read 6, iclass 10, count 0 2006.229.02:56:51.28#ibcon#end of sib2, iclass 10, count 0 2006.229.02:56:51.28#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:56:51.28#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:56:51.28#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.02:56:51.28#ibcon#*before write, iclass 10, count 0 2006.229.02:56:51.28#ibcon#enter sib2, iclass 10, count 0 2006.229.02:56:51.28#ibcon#flushed, iclass 10, count 0 2006.229.02:56:51.28#ibcon#about to write, iclass 10, count 0 2006.229.02:56:51.28#ibcon#wrote, iclass 10, count 0 2006.229.02:56:51.28#ibcon#about to read 3, iclass 10, count 0 2006.229.02:56:51.32#ibcon#read 3, iclass 10, count 0 2006.229.02:56:51.32#ibcon#about to read 4, iclass 10, count 0 2006.229.02:56:51.32#ibcon#read 4, iclass 10, count 0 2006.229.02:56:51.32#ibcon#about to read 5, iclass 10, count 0 2006.229.02:56:51.32#ibcon#read 5, iclass 10, count 0 2006.229.02:56:51.32#ibcon#about to read 6, iclass 10, count 0 2006.229.02:56:51.32#ibcon#read 6, iclass 10, count 0 2006.229.02:56:51.32#ibcon#end of sib2, iclass 10, count 0 2006.229.02:56:51.32#ibcon#*after write, iclass 10, count 0 2006.229.02:56:51.32#ibcon#*before return 0, iclass 10, count 0 2006.229.02:56:51.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:51.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:51.32#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:56:51.32#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:56:51.32$vck44/va=6,4 2006.229.02:56:51.32#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:56:51.32#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:56:51.32#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:51.32#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:51.38#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:51.38#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:51.38#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:56:51.38#ibcon#first serial, iclass 12, count 2 2006.229.02:56:51.38#ibcon#enter sib2, iclass 12, count 2 2006.229.02:56:51.38#ibcon#flushed, iclass 12, count 2 2006.229.02:56:51.38#ibcon#about to write, iclass 12, count 2 2006.229.02:56:51.38#ibcon#wrote, iclass 12, count 2 2006.229.02:56:51.38#ibcon#about to read 3, iclass 12, count 2 2006.229.02:56:51.40#ibcon#read 3, iclass 12, count 2 2006.229.02:56:51.40#ibcon#about to read 4, iclass 12, count 2 2006.229.02:56:51.40#ibcon#read 4, iclass 12, count 2 2006.229.02:56:51.40#ibcon#about to read 5, iclass 12, count 2 2006.229.02:56:51.40#ibcon#read 5, iclass 12, count 2 2006.229.02:56:51.40#ibcon#about to read 6, iclass 12, count 2 2006.229.02:56:51.40#ibcon#read 6, iclass 12, count 2 2006.229.02:56:51.40#ibcon#end of sib2, iclass 12, count 2 2006.229.02:56:51.40#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:56:51.40#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:56:51.40#ibcon#[25=AT06-04\r\n] 2006.229.02:56:51.40#ibcon#*before write, iclass 12, count 2 2006.229.02:56:51.40#ibcon#enter sib2, iclass 12, count 2 2006.229.02:56:51.40#ibcon#flushed, iclass 12, count 2 2006.229.02:56:51.40#ibcon#about to write, iclass 12, count 2 2006.229.02:56:51.40#ibcon#wrote, iclass 12, count 2 2006.229.02:56:51.40#ibcon#about to read 3, iclass 12, count 2 2006.229.02:56:51.43#ibcon#read 3, iclass 12, count 2 2006.229.02:56:51.43#ibcon#about to read 4, iclass 12, count 2 2006.229.02:56:51.43#ibcon#read 4, iclass 12, count 2 2006.229.02:56:51.43#ibcon#about to read 5, iclass 12, count 2 2006.229.02:56:51.43#ibcon#read 5, iclass 12, count 2 2006.229.02:56:51.43#ibcon#about to read 6, iclass 12, count 2 2006.229.02:56:51.43#ibcon#read 6, iclass 12, count 2 2006.229.02:56:51.43#ibcon#end of sib2, iclass 12, count 2 2006.229.02:56:51.43#ibcon#*after write, iclass 12, count 2 2006.229.02:56:51.43#ibcon#*before return 0, iclass 12, count 2 2006.229.02:56:51.43#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:51.43#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:51.43#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:56:51.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:51.43#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:51.55#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:51.55#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:51.55#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:56:51.55#ibcon#first serial, iclass 12, count 0 2006.229.02:56:51.55#ibcon#enter sib2, iclass 12, count 0 2006.229.02:56:51.55#ibcon#flushed, iclass 12, count 0 2006.229.02:56:51.55#ibcon#about to write, iclass 12, count 0 2006.229.02:56:51.55#ibcon#wrote, iclass 12, count 0 2006.229.02:56:51.55#ibcon#about to read 3, iclass 12, count 0 2006.229.02:56:51.57#ibcon#read 3, iclass 12, count 0 2006.229.02:56:51.57#ibcon#about to read 4, iclass 12, count 0 2006.229.02:56:51.57#ibcon#read 4, iclass 12, count 0 2006.229.02:56:51.57#ibcon#about to read 5, iclass 12, count 0 2006.229.02:56:51.57#ibcon#read 5, iclass 12, count 0 2006.229.02:56:51.57#ibcon#about to read 6, iclass 12, count 0 2006.229.02:56:51.57#ibcon#read 6, iclass 12, count 0 2006.229.02:56:51.57#ibcon#end of sib2, iclass 12, count 0 2006.229.02:56:51.57#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:56:51.57#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:56:51.57#ibcon#[25=USB\r\n] 2006.229.02:56:51.57#ibcon#*before write, iclass 12, count 0 2006.229.02:56:51.57#ibcon#enter sib2, iclass 12, count 0 2006.229.02:56:51.57#ibcon#flushed, iclass 12, count 0 2006.229.02:56:51.57#ibcon#about to write, iclass 12, count 0 2006.229.02:56:51.57#ibcon#wrote, iclass 12, count 0 2006.229.02:56:51.57#ibcon#about to read 3, iclass 12, count 0 2006.229.02:56:51.60#ibcon#read 3, iclass 12, count 0 2006.229.02:56:51.60#ibcon#about to read 4, iclass 12, count 0 2006.229.02:56:51.60#ibcon#read 4, iclass 12, count 0 2006.229.02:56:51.60#ibcon#about to read 5, iclass 12, count 0 2006.229.02:56:51.60#ibcon#read 5, iclass 12, count 0 2006.229.02:56:51.60#ibcon#about to read 6, iclass 12, count 0 2006.229.02:56:51.60#ibcon#read 6, iclass 12, count 0 2006.229.02:56:51.60#ibcon#end of sib2, iclass 12, count 0 2006.229.02:56:51.60#ibcon#*after write, iclass 12, count 0 2006.229.02:56:51.60#ibcon#*before return 0, iclass 12, count 0 2006.229.02:56:51.60#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:51.60#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:51.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:56:51.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:56:51.60$vck44/valo=7,864.99 2006.229.02:56:51.60#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:56:51.60#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:56:51.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:51.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:51.60#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:51.60#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:51.60#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:56:51.60#ibcon#first serial, iclass 14, count 0 2006.229.02:56:51.60#ibcon#enter sib2, iclass 14, count 0 2006.229.02:56:51.60#ibcon#flushed, iclass 14, count 0 2006.229.02:56:51.60#ibcon#about to write, iclass 14, count 0 2006.229.02:56:51.60#ibcon#wrote, iclass 14, count 0 2006.229.02:56:51.60#ibcon#about to read 3, iclass 14, count 0 2006.229.02:56:51.62#ibcon#read 3, iclass 14, count 0 2006.229.02:56:51.62#ibcon#about to read 4, iclass 14, count 0 2006.229.02:56:51.62#ibcon#read 4, iclass 14, count 0 2006.229.02:56:51.62#ibcon#about to read 5, iclass 14, count 0 2006.229.02:56:51.62#ibcon#read 5, iclass 14, count 0 2006.229.02:56:51.62#ibcon#about to read 6, iclass 14, count 0 2006.229.02:56:51.62#ibcon#read 6, iclass 14, count 0 2006.229.02:56:51.62#ibcon#end of sib2, iclass 14, count 0 2006.229.02:56:51.62#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:56:51.62#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:56:51.62#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.02:56:51.62#ibcon#*before write, iclass 14, count 0 2006.229.02:56:51.62#ibcon#enter sib2, iclass 14, count 0 2006.229.02:56:51.62#ibcon#flushed, iclass 14, count 0 2006.229.02:56:51.62#ibcon#about to write, iclass 14, count 0 2006.229.02:56:51.62#ibcon#wrote, iclass 14, count 0 2006.229.02:56:51.62#ibcon#about to read 3, iclass 14, count 0 2006.229.02:56:51.66#ibcon#read 3, iclass 14, count 0 2006.229.02:56:51.66#ibcon#about to read 4, iclass 14, count 0 2006.229.02:56:51.66#ibcon#read 4, iclass 14, count 0 2006.229.02:56:51.66#ibcon#about to read 5, iclass 14, count 0 2006.229.02:56:51.66#ibcon#read 5, iclass 14, count 0 2006.229.02:56:51.66#ibcon#about to read 6, iclass 14, count 0 2006.229.02:56:51.66#ibcon#read 6, iclass 14, count 0 2006.229.02:56:51.66#ibcon#end of sib2, iclass 14, count 0 2006.229.02:56:51.66#ibcon#*after write, iclass 14, count 0 2006.229.02:56:51.66#ibcon#*before return 0, iclass 14, count 0 2006.229.02:56:51.66#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:51.66#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:51.66#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:56:51.66#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:56:51.66$vck44/va=7,5 2006.229.02:56:51.66#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:56:51.66#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:56:51.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:51.66#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:51.72#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:51.72#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:51.72#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:56:51.72#ibcon#first serial, iclass 16, count 2 2006.229.02:56:51.72#ibcon#enter sib2, iclass 16, count 2 2006.229.02:56:51.72#ibcon#flushed, iclass 16, count 2 2006.229.02:56:51.72#ibcon#about to write, iclass 16, count 2 2006.229.02:56:51.72#ibcon#wrote, iclass 16, count 2 2006.229.02:56:51.72#ibcon#about to read 3, iclass 16, count 2 2006.229.02:56:51.74#ibcon#read 3, iclass 16, count 2 2006.229.02:56:51.74#ibcon#about to read 4, iclass 16, count 2 2006.229.02:56:51.74#ibcon#read 4, iclass 16, count 2 2006.229.02:56:51.74#ibcon#about to read 5, iclass 16, count 2 2006.229.02:56:51.74#ibcon#read 5, iclass 16, count 2 2006.229.02:56:51.74#ibcon#about to read 6, iclass 16, count 2 2006.229.02:56:51.74#ibcon#read 6, iclass 16, count 2 2006.229.02:56:51.74#ibcon#end of sib2, iclass 16, count 2 2006.229.02:56:51.74#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:56:51.74#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:56:51.74#ibcon#[25=AT07-05\r\n] 2006.229.02:56:51.74#ibcon#*before write, iclass 16, count 2 2006.229.02:56:51.74#ibcon#enter sib2, iclass 16, count 2 2006.229.02:56:51.74#ibcon#flushed, iclass 16, count 2 2006.229.02:56:51.74#ibcon#about to write, iclass 16, count 2 2006.229.02:56:51.74#ibcon#wrote, iclass 16, count 2 2006.229.02:56:51.74#ibcon#about to read 3, iclass 16, count 2 2006.229.02:56:51.77#ibcon#read 3, iclass 16, count 2 2006.229.02:56:51.77#ibcon#about to read 4, iclass 16, count 2 2006.229.02:56:51.77#ibcon#read 4, iclass 16, count 2 2006.229.02:56:51.77#ibcon#about to read 5, iclass 16, count 2 2006.229.02:56:51.77#ibcon#read 5, iclass 16, count 2 2006.229.02:56:51.77#ibcon#about to read 6, iclass 16, count 2 2006.229.02:56:51.77#ibcon#read 6, iclass 16, count 2 2006.229.02:56:51.77#ibcon#end of sib2, iclass 16, count 2 2006.229.02:56:51.77#ibcon#*after write, iclass 16, count 2 2006.229.02:56:51.77#ibcon#*before return 0, iclass 16, count 2 2006.229.02:56:51.77#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:51.77#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:51.77#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:56:51.77#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:51.77#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:51.89#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:51.89#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:51.89#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:56:51.89#ibcon#first serial, iclass 16, count 0 2006.229.02:56:51.89#ibcon#enter sib2, iclass 16, count 0 2006.229.02:56:51.89#ibcon#flushed, iclass 16, count 0 2006.229.02:56:51.89#ibcon#about to write, iclass 16, count 0 2006.229.02:56:51.89#ibcon#wrote, iclass 16, count 0 2006.229.02:56:51.89#ibcon#about to read 3, iclass 16, count 0 2006.229.02:56:51.91#ibcon#read 3, iclass 16, count 0 2006.229.02:56:51.91#ibcon#about to read 4, iclass 16, count 0 2006.229.02:56:51.91#ibcon#read 4, iclass 16, count 0 2006.229.02:56:51.91#ibcon#about to read 5, iclass 16, count 0 2006.229.02:56:51.91#ibcon#read 5, iclass 16, count 0 2006.229.02:56:51.91#ibcon#about to read 6, iclass 16, count 0 2006.229.02:56:51.91#ibcon#read 6, iclass 16, count 0 2006.229.02:56:51.91#ibcon#end of sib2, iclass 16, count 0 2006.229.02:56:51.91#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:56:51.91#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:56:51.91#ibcon#[25=USB\r\n] 2006.229.02:56:51.91#ibcon#*before write, iclass 16, count 0 2006.229.02:56:51.91#ibcon#enter sib2, iclass 16, count 0 2006.229.02:56:51.91#ibcon#flushed, iclass 16, count 0 2006.229.02:56:51.91#ibcon#about to write, iclass 16, count 0 2006.229.02:56:51.91#ibcon#wrote, iclass 16, count 0 2006.229.02:56:51.91#ibcon#about to read 3, iclass 16, count 0 2006.229.02:56:51.94#ibcon#read 3, iclass 16, count 0 2006.229.02:56:51.94#ibcon#about to read 4, iclass 16, count 0 2006.229.02:56:51.94#ibcon#read 4, iclass 16, count 0 2006.229.02:56:51.94#ibcon#about to read 5, iclass 16, count 0 2006.229.02:56:51.94#ibcon#read 5, iclass 16, count 0 2006.229.02:56:51.94#ibcon#about to read 6, iclass 16, count 0 2006.229.02:56:51.94#ibcon#read 6, iclass 16, count 0 2006.229.02:56:51.94#ibcon#end of sib2, iclass 16, count 0 2006.229.02:56:51.94#ibcon#*after write, iclass 16, count 0 2006.229.02:56:51.94#ibcon#*before return 0, iclass 16, count 0 2006.229.02:56:51.94#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:51.94#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:51.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:56:51.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:56:51.94$vck44/valo=8,884.99 2006.229.02:56:51.94#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:56:51.94#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:56:51.94#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:51.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:51.94#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:51.94#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:51.94#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:56:51.94#ibcon#first serial, iclass 18, count 0 2006.229.02:56:51.94#ibcon#enter sib2, iclass 18, count 0 2006.229.02:56:51.94#ibcon#flushed, iclass 18, count 0 2006.229.02:56:51.94#ibcon#about to write, iclass 18, count 0 2006.229.02:56:51.94#ibcon#wrote, iclass 18, count 0 2006.229.02:56:51.94#ibcon#about to read 3, iclass 18, count 0 2006.229.02:56:51.96#ibcon#read 3, iclass 18, count 0 2006.229.02:56:51.96#ibcon#about to read 4, iclass 18, count 0 2006.229.02:56:51.96#ibcon#read 4, iclass 18, count 0 2006.229.02:56:51.96#ibcon#about to read 5, iclass 18, count 0 2006.229.02:56:51.96#ibcon#read 5, iclass 18, count 0 2006.229.02:56:51.96#ibcon#about to read 6, iclass 18, count 0 2006.229.02:56:51.96#ibcon#read 6, iclass 18, count 0 2006.229.02:56:51.96#ibcon#end of sib2, iclass 18, count 0 2006.229.02:56:51.96#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:56:51.96#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:56:51.96#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.02:56:51.96#ibcon#*before write, iclass 18, count 0 2006.229.02:56:51.96#ibcon#enter sib2, iclass 18, count 0 2006.229.02:56:51.96#ibcon#flushed, iclass 18, count 0 2006.229.02:56:51.96#ibcon#about to write, iclass 18, count 0 2006.229.02:56:51.96#ibcon#wrote, iclass 18, count 0 2006.229.02:56:51.96#ibcon#about to read 3, iclass 18, count 0 2006.229.02:56:52.00#ibcon#read 3, iclass 18, count 0 2006.229.02:56:52.00#ibcon#about to read 4, iclass 18, count 0 2006.229.02:56:52.00#ibcon#read 4, iclass 18, count 0 2006.229.02:56:52.00#ibcon#about to read 5, iclass 18, count 0 2006.229.02:56:52.00#ibcon#read 5, iclass 18, count 0 2006.229.02:56:52.00#ibcon#about to read 6, iclass 18, count 0 2006.229.02:56:52.00#ibcon#read 6, iclass 18, count 0 2006.229.02:56:52.00#ibcon#end of sib2, iclass 18, count 0 2006.229.02:56:52.00#ibcon#*after write, iclass 18, count 0 2006.229.02:56:52.00#ibcon#*before return 0, iclass 18, count 0 2006.229.02:56:52.00#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:52.00#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:52.00#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:56:52.00#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:56:52.00$vck44/va=8,6 2006.229.02:56:52.00#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.02:56:52.00#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.02:56:52.00#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:52.00#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:56:52.06#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:56:52.06#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:56:52.06#ibcon#enter wrdev, iclass 20, count 2 2006.229.02:56:52.06#ibcon#first serial, iclass 20, count 2 2006.229.02:56:52.06#ibcon#enter sib2, iclass 20, count 2 2006.229.02:56:52.06#ibcon#flushed, iclass 20, count 2 2006.229.02:56:52.06#ibcon#about to write, iclass 20, count 2 2006.229.02:56:52.06#ibcon#wrote, iclass 20, count 2 2006.229.02:56:52.06#ibcon#about to read 3, iclass 20, count 2 2006.229.02:56:52.08#ibcon#read 3, iclass 20, count 2 2006.229.02:56:52.08#ibcon#about to read 4, iclass 20, count 2 2006.229.02:56:52.08#ibcon#read 4, iclass 20, count 2 2006.229.02:56:52.08#ibcon#about to read 5, iclass 20, count 2 2006.229.02:56:52.08#ibcon#read 5, iclass 20, count 2 2006.229.02:56:52.08#ibcon#about to read 6, iclass 20, count 2 2006.229.02:56:52.08#ibcon#read 6, iclass 20, count 2 2006.229.02:56:52.08#ibcon#end of sib2, iclass 20, count 2 2006.229.02:56:52.08#ibcon#*mode == 0, iclass 20, count 2 2006.229.02:56:52.08#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.02:56:52.08#ibcon#[25=AT08-06\r\n] 2006.229.02:56:52.08#ibcon#*before write, iclass 20, count 2 2006.229.02:56:52.08#ibcon#enter sib2, iclass 20, count 2 2006.229.02:56:52.08#ibcon#flushed, iclass 20, count 2 2006.229.02:56:52.08#ibcon#about to write, iclass 20, count 2 2006.229.02:56:52.08#ibcon#wrote, iclass 20, count 2 2006.229.02:56:52.08#ibcon#about to read 3, iclass 20, count 2 2006.229.02:56:52.11#ibcon#read 3, iclass 20, count 2 2006.229.02:56:52.11#ibcon#about to read 4, iclass 20, count 2 2006.229.02:56:52.11#ibcon#read 4, iclass 20, count 2 2006.229.02:56:52.11#ibcon#about to read 5, iclass 20, count 2 2006.229.02:56:52.11#ibcon#read 5, iclass 20, count 2 2006.229.02:56:52.11#ibcon#about to read 6, iclass 20, count 2 2006.229.02:56:52.11#ibcon#read 6, iclass 20, count 2 2006.229.02:56:52.11#ibcon#end of sib2, iclass 20, count 2 2006.229.02:56:52.11#ibcon#*after write, iclass 20, count 2 2006.229.02:56:52.11#ibcon#*before return 0, iclass 20, count 2 2006.229.02:56:52.11#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:56:52.11#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.02:56:52.11#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.02:56:52.11#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:52.11#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:56:52.23#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:56:52.23#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:56:52.23#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:56:52.23#ibcon#first serial, iclass 20, count 0 2006.229.02:56:52.23#ibcon#enter sib2, iclass 20, count 0 2006.229.02:56:52.23#ibcon#flushed, iclass 20, count 0 2006.229.02:56:52.23#ibcon#about to write, iclass 20, count 0 2006.229.02:56:52.23#ibcon#wrote, iclass 20, count 0 2006.229.02:56:52.23#ibcon#about to read 3, iclass 20, count 0 2006.229.02:56:52.25#ibcon#read 3, iclass 20, count 0 2006.229.02:56:52.25#ibcon#about to read 4, iclass 20, count 0 2006.229.02:56:52.25#ibcon#read 4, iclass 20, count 0 2006.229.02:56:52.25#ibcon#about to read 5, iclass 20, count 0 2006.229.02:56:52.25#ibcon#read 5, iclass 20, count 0 2006.229.02:56:52.25#ibcon#about to read 6, iclass 20, count 0 2006.229.02:56:52.25#ibcon#read 6, iclass 20, count 0 2006.229.02:56:52.25#ibcon#end of sib2, iclass 20, count 0 2006.229.02:56:52.25#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:56:52.25#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:56:52.25#ibcon#[25=USB\r\n] 2006.229.02:56:52.25#ibcon#*before write, iclass 20, count 0 2006.229.02:56:52.25#ibcon#enter sib2, iclass 20, count 0 2006.229.02:56:52.25#ibcon#flushed, iclass 20, count 0 2006.229.02:56:52.25#ibcon#about to write, iclass 20, count 0 2006.229.02:56:52.25#ibcon#wrote, iclass 20, count 0 2006.229.02:56:52.25#ibcon#about to read 3, iclass 20, count 0 2006.229.02:56:52.28#ibcon#read 3, iclass 20, count 0 2006.229.02:56:52.28#ibcon#about to read 4, iclass 20, count 0 2006.229.02:56:52.28#ibcon#read 4, iclass 20, count 0 2006.229.02:56:52.28#ibcon#about to read 5, iclass 20, count 0 2006.229.02:56:52.28#ibcon#read 5, iclass 20, count 0 2006.229.02:56:52.28#ibcon#about to read 6, iclass 20, count 0 2006.229.02:56:52.28#ibcon#read 6, iclass 20, count 0 2006.229.02:56:52.28#ibcon#end of sib2, iclass 20, count 0 2006.229.02:56:52.28#ibcon#*after write, iclass 20, count 0 2006.229.02:56:52.28#ibcon#*before return 0, iclass 20, count 0 2006.229.02:56:52.28#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:56:52.28#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.02:56:52.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:56:52.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:56:52.28$vck44/vblo=1,629.99 2006.229.02:56:52.28#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.02:56:52.28#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.02:56:52.28#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:52.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:56:52.28#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:56:52.28#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:56:52.28#ibcon#enter wrdev, iclass 22, count 0 2006.229.02:56:52.28#ibcon#first serial, iclass 22, count 0 2006.229.02:56:52.28#ibcon#enter sib2, iclass 22, count 0 2006.229.02:56:52.28#ibcon#flushed, iclass 22, count 0 2006.229.02:56:52.28#ibcon#about to write, iclass 22, count 0 2006.229.02:56:52.28#ibcon#wrote, iclass 22, count 0 2006.229.02:56:52.28#ibcon#about to read 3, iclass 22, count 0 2006.229.02:56:52.30#ibcon#read 3, iclass 22, count 0 2006.229.02:56:52.30#ibcon#about to read 4, iclass 22, count 0 2006.229.02:56:52.30#ibcon#read 4, iclass 22, count 0 2006.229.02:56:52.30#ibcon#about to read 5, iclass 22, count 0 2006.229.02:56:52.30#ibcon#read 5, iclass 22, count 0 2006.229.02:56:52.30#ibcon#about to read 6, iclass 22, count 0 2006.229.02:56:52.30#ibcon#read 6, iclass 22, count 0 2006.229.02:56:52.30#ibcon#end of sib2, iclass 22, count 0 2006.229.02:56:52.30#ibcon#*mode == 0, iclass 22, count 0 2006.229.02:56:52.30#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.02:56:52.30#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.02:56:52.30#ibcon#*before write, iclass 22, count 0 2006.229.02:56:52.30#ibcon#enter sib2, iclass 22, count 0 2006.229.02:56:52.30#ibcon#flushed, iclass 22, count 0 2006.229.02:56:52.30#ibcon#about to write, iclass 22, count 0 2006.229.02:56:52.30#ibcon#wrote, iclass 22, count 0 2006.229.02:56:52.30#ibcon#about to read 3, iclass 22, count 0 2006.229.02:56:52.34#ibcon#read 3, iclass 22, count 0 2006.229.02:56:52.34#ibcon#about to read 4, iclass 22, count 0 2006.229.02:56:52.34#ibcon#read 4, iclass 22, count 0 2006.229.02:56:52.34#ibcon#about to read 5, iclass 22, count 0 2006.229.02:56:52.34#ibcon#read 5, iclass 22, count 0 2006.229.02:56:52.34#ibcon#about to read 6, iclass 22, count 0 2006.229.02:56:52.34#ibcon#read 6, iclass 22, count 0 2006.229.02:56:52.34#ibcon#end of sib2, iclass 22, count 0 2006.229.02:56:52.34#ibcon#*after write, iclass 22, count 0 2006.229.02:56:52.34#ibcon#*before return 0, iclass 22, count 0 2006.229.02:56:52.34#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:56:52.34#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.02:56:52.34#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.02:56:52.34#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.02:56:52.34$vck44/vb=1,4 2006.229.02:56:52.34#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.02:56:52.34#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.02:56:52.34#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:52.34#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:56:52.34#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:56:52.34#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:56:52.34#ibcon#enter wrdev, iclass 24, count 2 2006.229.02:56:52.34#ibcon#first serial, iclass 24, count 2 2006.229.02:56:52.34#ibcon#enter sib2, iclass 24, count 2 2006.229.02:56:52.34#ibcon#flushed, iclass 24, count 2 2006.229.02:56:52.34#ibcon#about to write, iclass 24, count 2 2006.229.02:56:52.34#ibcon#wrote, iclass 24, count 2 2006.229.02:56:52.34#ibcon#about to read 3, iclass 24, count 2 2006.229.02:56:52.36#ibcon#read 3, iclass 24, count 2 2006.229.02:56:52.36#ibcon#about to read 4, iclass 24, count 2 2006.229.02:56:52.36#ibcon#read 4, iclass 24, count 2 2006.229.02:56:52.36#ibcon#about to read 5, iclass 24, count 2 2006.229.02:56:52.36#ibcon#read 5, iclass 24, count 2 2006.229.02:56:52.36#ibcon#about to read 6, iclass 24, count 2 2006.229.02:56:52.36#ibcon#read 6, iclass 24, count 2 2006.229.02:56:52.36#ibcon#end of sib2, iclass 24, count 2 2006.229.02:56:52.36#ibcon#*mode == 0, iclass 24, count 2 2006.229.02:56:52.36#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.02:56:52.36#ibcon#[27=AT01-04\r\n] 2006.229.02:56:52.36#ibcon#*before write, iclass 24, count 2 2006.229.02:56:52.36#ibcon#enter sib2, iclass 24, count 2 2006.229.02:56:52.36#ibcon#flushed, iclass 24, count 2 2006.229.02:56:52.36#ibcon#about to write, iclass 24, count 2 2006.229.02:56:52.36#ibcon#wrote, iclass 24, count 2 2006.229.02:56:52.36#ibcon#about to read 3, iclass 24, count 2 2006.229.02:56:52.39#ibcon#read 3, iclass 24, count 2 2006.229.02:56:52.39#ibcon#about to read 4, iclass 24, count 2 2006.229.02:56:52.39#ibcon#read 4, iclass 24, count 2 2006.229.02:56:52.39#ibcon#about to read 5, iclass 24, count 2 2006.229.02:56:52.39#ibcon#read 5, iclass 24, count 2 2006.229.02:56:52.39#ibcon#about to read 6, iclass 24, count 2 2006.229.02:56:52.39#ibcon#read 6, iclass 24, count 2 2006.229.02:56:52.39#ibcon#end of sib2, iclass 24, count 2 2006.229.02:56:52.39#ibcon#*after write, iclass 24, count 2 2006.229.02:56:52.39#ibcon#*before return 0, iclass 24, count 2 2006.229.02:56:52.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:56:52.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.02:56:52.39#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.02:56:52.39#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:52.39#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:56:52.51#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:56:52.51#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:56:52.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.02:56:52.51#ibcon#first serial, iclass 24, count 0 2006.229.02:56:52.51#ibcon#enter sib2, iclass 24, count 0 2006.229.02:56:52.51#ibcon#flushed, iclass 24, count 0 2006.229.02:56:52.51#ibcon#about to write, iclass 24, count 0 2006.229.02:56:52.51#ibcon#wrote, iclass 24, count 0 2006.229.02:56:52.51#ibcon#about to read 3, iclass 24, count 0 2006.229.02:56:52.53#ibcon#read 3, iclass 24, count 0 2006.229.02:56:52.53#ibcon#about to read 4, iclass 24, count 0 2006.229.02:56:52.53#ibcon#read 4, iclass 24, count 0 2006.229.02:56:52.53#ibcon#about to read 5, iclass 24, count 0 2006.229.02:56:52.53#ibcon#read 5, iclass 24, count 0 2006.229.02:56:52.53#ibcon#about to read 6, iclass 24, count 0 2006.229.02:56:52.53#ibcon#read 6, iclass 24, count 0 2006.229.02:56:52.53#ibcon#end of sib2, iclass 24, count 0 2006.229.02:56:52.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.02:56:52.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.02:56:52.53#ibcon#[27=USB\r\n] 2006.229.02:56:52.53#ibcon#*before write, iclass 24, count 0 2006.229.02:56:52.53#ibcon#enter sib2, iclass 24, count 0 2006.229.02:56:52.53#ibcon#flushed, iclass 24, count 0 2006.229.02:56:52.53#ibcon#about to write, iclass 24, count 0 2006.229.02:56:52.53#ibcon#wrote, iclass 24, count 0 2006.229.02:56:52.53#ibcon#about to read 3, iclass 24, count 0 2006.229.02:56:52.56#ibcon#read 3, iclass 24, count 0 2006.229.02:56:52.56#ibcon#about to read 4, iclass 24, count 0 2006.229.02:56:52.56#ibcon#read 4, iclass 24, count 0 2006.229.02:56:52.56#ibcon#about to read 5, iclass 24, count 0 2006.229.02:56:52.56#ibcon#read 5, iclass 24, count 0 2006.229.02:56:52.56#ibcon#about to read 6, iclass 24, count 0 2006.229.02:56:52.56#ibcon#read 6, iclass 24, count 0 2006.229.02:56:52.56#ibcon#end of sib2, iclass 24, count 0 2006.229.02:56:52.56#ibcon#*after write, iclass 24, count 0 2006.229.02:56:52.56#ibcon#*before return 0, iclass 24, count 0 2006.229.02:56:52.56#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:56:52.56#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.02:56:52.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.02:56:52.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.02:56:52.56$vck44/vblo=2,634.99 2006.229.02:56:52.56#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.02:56:52.56#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.02:56:52.56#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:52.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:52.56#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:52.56#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:52.56#ibcon#enter wrdev, iclass 26, count 0 2006.229.02:56:52.56#ibcon#first serial, iclass 26, count 0 2006.229.02:56:52.56#ibcon#enter sib2, iclass 26, count 0 2006.229.02:56:52.56#ibcon#flushed, iclass 26, count 0 2006.229.02:56:52.56#ibcon#about to write, iclass 26, count 0 2006.229.02:56:52.56#ibcon#wrote, iclass 26, count 0 2006.229.02:56:52.56#ibcon#about to read 3, iclass 26, count 0 2006.229.02:56:52.58#ibcon#read 3, iclass 26, count 0 2006.229.02:56:52.58#ibcon#about to read 4, iclass 26, count 0 2006.229.02:56:52.58#ibcon#read 4, iclass 26, count 0 2006.229.02:56:52.58#ibcon#about to read 5, iclass 26, count 0 2006.229.02:56:52.58#ibcon#read 5, iclass 26, count 0 2006.229.02:56:52.58#ibcon#about to read 6, iclass 26, count 0 2006.229.02:56:52.58#ibcon#read 6, iclass 26, count 0 2006.229.02:56:52.58#ibcon#end of sib2, iclass 26, count 0 2006.229.02:56:52.58#ibcon#*mode == 0, iclass 26, count 0 2006.229.02:56:52.58#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.02:56:52.58#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.02:56:52.58#ibcon#*before write, iclass 26, count 0 2006.229.02:56:52.58#ibcon#enter sib2, iclass 26, count 0 2006.229.02:56:52.58#ibcon#flushed, iclass 26, count 0 2006.229.02:56:52.58#ibcon#about to write, iclass 26, count 0 2006.229.02:56:52.58#ibcon#wrote, iclass 26, count 0 2006.229.02:56:52.58#ibcon#about to read 3, iclass 26, count 0 2006.229.02:56:52.62#ibcon#read 3, iclass 26, count 0 2006.229.02:56:52.62#ibcon#about to read 4, iclass 26, count 0 2006.229.02:56:52.62#ibcon#read 4, iclass 26, count 0 2006.229.02:56:52.62#ibcon#about to read 5, iclass 26, count 0 2006.229.02:56:52.62#ibcon#read 5, iclass 26, count 0 2006.229.02:56:52.62#ibcon#about to read 6, iclass 26, count 0 2006.229.02:56:52.62#ibcon#read 6, iclass 26, count 0 2006.229.02:56:52.62#ibcon#end of sib2, iclass 26, count 0 2006.229.02:56:52.62#ibcon#*after write, iclass 26, count 0 2006.229.02:56:52.62#ibcon#*before return 0, iclass 26, count 0 2006.229.02:56:52.62#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:52.62#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.02:56:52.62#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.02:56:52.62#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.02:56:52.62$vck44/vb=2,4 2006.229.02:56:52.62#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.02:56:52.62#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.02:56:52.62#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:52.62#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:52.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:52.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:52.68#ibcon#enter wrdev, iclass 28, count 2 2006.229.02:56:52.68#ibcon#first serial, iclass 28, count 2 2006.229.02:56:52.68#ibcon#enter sib2, iclass 28, count 2 2006.229.02:56:52.68#ibcon#flushed, iclass 28, count 2 2006.229.02:56:52.68#ibcon#about to write, iclass 28, count 2 2006.229.02:56:52.68#ibcon#wrote, iclass 28, count 2 2006.229.02:56:52.68#ibcon#about to read 3, iclass 28, count 2 2006.229.02:56:52.70#ibcon#read 3, iclass 28, count 2 2006.229.02:56:52.70#ibcon#about to read 4, iclass 28, count 2 2006.229.02:56:52.70#ibcon#read 4, iclass 28, count 2 2006.229.02:56:52.70#ibcon#about to read 5, iclass 28, count 2 2006.229.02:56:52.70#ibcon#read 5, iclass 28, count 2 2006.229.02:56:52.70#ibcon#about to read 6, iclass 28, count 2 2006.229.02:56:52.70#ibcon#read 6, iclass 28, count 2 2006.229.02:56:52.70#ibcon#end of sib2, iclass 28, count 2 2006.229.02:56:52.70#ibcon#*mode == 0, iclass 28, count 2 2006.229.02:56:52.70#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.02:56:52.70#ibcon#[27=AT02-04\r\n] 2006.229.02:56:52.70#ibcon#*before write, iclass 28, count 2 2006.229.02:56:52.70#ibcon#enter sib2, iclass 28, count 2 2006.229.02:56:52.70#ibcon#flushed, iclass 28, count 2 2006.229.02:56:52.70#ibcon#about to write, iclass 28, count 2 2006.229.02:56:52.70#ibcon#wrote, iclass 28, count 2 2006.229.02:56:52.70#ibcon#about to read 3, iclass 28, count 2 2006.229.02:56:52.73#ibcon#read 3, iclass 28, count 2 2006.229.02:56:52.73#ibcon#about to read 4, iclass 28, count 2 2006.229.02:56:52.73#ibcon#read 4, iclass 28, count 2 2006.229.02:56:52.73#ibcon#about to read 5, iclass 28, count 2 2006.229.02:56:52.73#ibcon#read 5, iclass 28, count 2 2006.229.02:56:52.73#ibcon#about to read 6, iclass 28, count 2 2006.229.02:56:52.73#ibcon#read 6, iclass 28, count 2 2006.229.02:56:52.73#ibcon#end of sib2, iclass 28, count 2 2006.229.02:56:52.73#ibcon#*after write, iclass 28, count 2 2006.229.02:56:52.73#ibcon#*before return 0, iclass 28, count 2 2006.229.02:56:52.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:52.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.02:56:52.73#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.02:56:52.73#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:52.73#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:52.85#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:52.85#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:52.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.02:56:52.85#ibcon#first serial, iclass 28, count 0 2006.229.02:56:52.85#ibcon#enter sib2, iclass 28, count 0 2006.229.02:56:52.85#ibcon#flushed, iclass 28, count 0 2006.229.02:56:52.85#ibcon#about to write, iclass 28, count 0 2006.229.02:56:52.85#ibcon#wrote, iclass 28, count 0 2006.229.02:56:52.85#ibcon#about to read 3, iclass 28, count 0 2006.229.02:56:52.87#ibcon#read 3, iclass 28, count 0 2006.229.02:56:52.87#ibcon#about to read 4, iclass 28, count 0 2006.229.02:56:52.87#ibcon#read 4, iclass 28, count 0 2006.229.02:56:52.87#ibcon#about to read 5, iclass 28, count 0 2006.229.02:56:52.87#ibcon#read 5, iclass 28, count 0 2006.229.02:56:52.87#ibcon#about to read 6, iclass 28, count 0 2006.229.02:56:52.87#ibcon#read 6, iclass 28, count 0 2006.229.02:56:52.87#ibcon#end of sib2, iclass 28, count 0 2006.229.02:56:52.87#ibcon#*mode == 0, iclass 28, count 0 2006.229.02:56:52.87#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.02:56:52.87#ibcon#[27=USB\r\n] 2006.229.02:56:52.87#ibcon#*before write, iclass 28, count 0 2006.229.02:56:52.87#ibcon#enter sib2, iclass 28, count 0 2006.229.02:56:52.87#ibcon#flushed, iclass 28, count 0 2006.229.02:56:52.87#ibcon#about to write, iclass 28, count 0 2006.229.02:56:52.87#ibcon#wrote, iclass 28, count 0 2006.229.02:56:52.87#ibcon#about to read 3, iclass 28, count 0 2006.229.02:56:52.90#ibcon#read 3, iclass 28, count 0 2006.229.02:56:52.90#ibcon#about to read 4, iclass 28, count 0 2006.229.02:56:52.90#ibcon#read 4, iclass 28, count 0 2006.229.02:56:52.90#ibcon#about to read 5, iclass 28, count 0 2006.229.02:56:52.90#ibcon#read 5, iclass 28, count 0 2006.229.02:56:52.90#ibcon#about to read 6, iclass 28, count 0 2006.229.02:56:52.90#ibcon#read 6, iclass 28, count 0 2006.229.02:56:52.90#ibcon#end of sib2, iclass 28, count 0 2006.229.02:56:52.90#ibcon#*after write, iclass 28, count 0 2006.229.02:56:52.90#ibcon#*before return 0, iclass 28, count 0 2006.229.02:56:52.90#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:52.90#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.02:56:52.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.02:56:52.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.02:56:52.90$vck44/vblo=3,649.99 2006.229.02:56:52.90#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.02:56:52.90#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.02:56:52.90#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:52.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:52.90#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:52.90#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:52.90#ibcon#enter wrdev, iclass 30, count 0 2006.229.02:56:52.90#ibcon#first serial, iclass 30, count 0 2006.229.02:56:52.90#ibcon#enter sib2, iclass 30, count 0 2006.229.02:56:52.90#ibcon#flushed, iclass 30, count 0 2006.229.02:56:52.90#ibcon#about to write, iclass 30, count 0 2006.229.02:56:52.90#ibcon#wrote, iclass 30, count 0 2006.229.02:56:52.90#ibcon#about to read 3, iclass 30, count 0 2006.229.02:56:52.92#ibcon#read 3, iclass 30, count 0 2006.229.02:56:52.92#ibcon#about to read 4, iclass 30, count 0 2006.229.02:56:52.92#ibcon#read 4, iclass 30, count 0 2006.229.02:56:52.92#ibcon#about to read 5, iclass 30, count 0 2006.229.02:56:52.92#ibcon#read 5, iclass 30, count 0 2006.229.02:56:52.92#ibcon#about to read 6, iclass 30, count 0 2006.229.02:56:52.92#ibcon#read 6, iclass 30, count 0 2006.229.02:56:52.92#ibcon#end of sib2, iclass 30, count 0 2006.229.02:56:52.92#ibcon#*mode == 0, iclass 30, count 0 2006.229.02:56:52.92#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.02:56:52.92#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.02:56:52.92#ibcon#*before write, iclass 30, count 0 2006.229.02:56:52.92#ibcon#enter sib2, iclass 30, count 0 2006.229.02:56:52.92#ibcon#flushed, iclass 30, count 0 2006.229.02:56:52.92#ibcon#about to write, iclass 30, count 0 2006.229.02:56:52.92#ibcon#wrote, iclass 30, count 0 2006.229.02:56:52.92#ibcon#about to read 3, iclass 30, count 0 2006.229.02:56:52.96#ibcon#read 3, iclass 30, count 0 2006.229.02:56:52.96#ibcon#about to read 4, iclass 30, count 0 2006.229.02:56:52.96#ibcon#read 4, iclass 30, count 0 2006.229.02:56:52.96#ibcon#about to read 5, iclass 30, count 0 2006.229.02:56:52.96#ibcon#read 5, iclass 30, count 0 2006.229.02:56:52.96#ibcon#about to read 6, iclass 30, count 0 2006.229.02:56:52.96#ibcon#read 6, iclass 30, count 0 2006.229.02:56:52.96#ibcon#end of sib2, iclass 30, count 0 2006.229.02:56:52.96#ibcon#*after write, iclass 30, count 0 2006.229.02:56:52.96#ibcon#*before return 0, iclass 30, count 0 2006.229.02:56:52.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:52.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.02:56:52.96#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.02:56:52.96#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.02:56:52.96$vck44/vb=3,4 2006.229.02:56:52.96#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.02:56:52.96#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.02:56:52.96#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:52.96#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:53.02#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:53.02#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:53.02#ibcon#enter wrdev, iclass 32, count 2 2006.229.02:56:53.02#ibcon#first serial, iclass 32, count 2 2006.229.02:56:53.02#ibcon#enter sib2, iclass 32, count 2 2006.229.02:56:53.02#ibcon#flushed, iclass 32, count 2 2006.229.02:56:53.02#ibcon#about to write, iclass 32, count 2 2006.229.02:56:53.02#ibcon#wrote, iclass 32, count 2 2006.229.02:56:53.02#ibcon#about to read 3, iclass 32, count 2 2006.229.02:56:53.04#ibcon#read 3, iclass 32, count 2 2006.229.02:56:53.04#ibcon#about to read 4, iclass 32, count 2 2006.229.02:56:53.04#ibcon#read 4, iclass 32, count 2 2006.229.02:56:53.04#ibcon#about to read 5, iclass 32, count 2 2006.229.02:56:53.04#ibcon#read 5, iclass 32, count 2 2006.229.02:56:53.04#ibcon#about to read 6, iclass 32, count 2 2006.229.02:56:53.04#ibcon#read 6, iclass 32, count 2 2006.229.02:56:53.04#ibcon#end of sib2, iclass 32, count 2 2006.229.02:56:53.04#ibcon#*mode == 0, iclass 32, count 2 2006.229.02:56:53.04#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.02:56:53.04#ibcon#[27=AT03-04\r\n] 2006.229.02:56:53.04#ibcon#*before write, iclass 32, count 2 2006.229.02:56:53.04#ibcon#enter sib2, iclass 32, count 2 2006.229.02:56:53.04#ibcon#flushed, iclass 32, count 2 2006.229.02:56:53.04#ibcon#about to write, iclass 32, count 2 2006.229.02:56:53.04#ibcon#wrote, iclass 32, count 2 2006.229.02:56:53.04#ibcon#about to read 3, iclass 32, count 2 2006.229.02:56:53.07#ibcon#read 3, iclass 32, count 2 2006.229.02:56:53.07#ibcon#about to read 4, iclass 32, count 2 2006.229.02:56:53.07#ibcon#read 4, iclass 32, count 2 2006.229.02:56:53.07#ibcon#about to read 5, iclass 32, count 2 2006.229.02:56:53.07#ibcon#read 5, iclass 32, count 2 2006.229.02:56:53.07#ibcon#about to read 6, iclass 32, count 2 2006.229.02:56:53.07#ibcon#read 6, iclass 32, count 2 2006.229.02:56:53.07#ibcon#end of sib2, iclass 32, count 2 2006.229.02:56:53.07#ibcon#*after write, iclass 32, count 2 2006.229.02:56:53.07#ibcon#*before return 0, iclass 32, count 2 2006.229.02:56:53.07#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:53.07#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.02:56:53.07#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.02:56:53.07#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:53.07#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:53.19#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:53.19#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:53.19#ibcon#enter wrdev, iclass 32, count 0 2006.229.02:56:53.19#ibcon#first serial, iclass 32, count 0 2006.229.02:56:53.19#ibcon#enter sib2, iclass 32, count 0 2006.229.02:56:53.19#ibcon#flushed, iclass 32, count 0 2006.229.02:56:53.19#ibcon#about to write, iclass 32, count 0 2006.229.02:56:53.19#ibcon#wrote, iclass 32, count 0 2006.229.02:56:53.19#ibcon#about to read 3, iclass 32, count 0 2006.229.02:56:53.21#ibcon#read 3, iclass 32, count 0 2006.229.02:56:53.21#ibcon#about to read 4, iclass 32, count 0 2006.229.02:56:53.21#ibcon#read 4, iclass 32, count 0 2006.229.02:56:53.21#ibcon#about to read 5, iclass 32, count 0 2006.229.02:56:53.21#ibcon#read 5, iclass 32, count 0 2006.229.02:56:53.21#ibcon#about to read 6, iclass 32, count 0 2006.229.02:56:53.21#ibcon#read 6, iclass 32, count 0 2006.229.02:56:53.21#ibcon#end of sib2, iclass 32, count 0 2006.229.02:56:53.21#ibcon#*mode == 0, iclass 32, count 0 2006.229.02:56:53.21#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.02:56:53.21#ibcon#[27=USB\r\n] 2006.229.02:56:53.21#ibcon#*before write, iclass 32, count 0 2006.229.02:56:53.21#ibcon#enter sib2, iclass 32, count 0 2006.229.02:56:53.21#ibcon#flushed, iclass 32, count 0 2006.229.02:56:53.21#ibcon#about to write, iclass 32, count 0 2006.229.02:56:53.21#ibcon#wrote, iclass 32, count 0 2006.229.02:56:53.21#ibcon#about to read 3, iclass 32, count 0 2006.229.02:56:53.24#ibcon#read 3, iclass 32, count 0 2006.229.02:56:53.24#ibcon#about to read 4, iclass 32, count 0 2006.229.02:56:53.24#ibcon#read 4, iclass 32, count 0 2006.229.02:56:53.24#ibcon#about to read 5, iclass 32, count 0 2006.229.02:56:53.24#ibcon#read 5, iclass 32, count 0 2006.229.02:56:53.24#ibcon#about to read 6, iclass 32, count 0 2006.229.02:56:53.24#ibcon#read 6, iclass 32, count 0 2006.229.02:56:53.24#ibcon#end of sib2, iclass 32, count 0 2006.229.02:56:53.24#ibcon#*after write, iclass 32, count 0 2006.229.02:56:53.24#ibcon#*before return 0, iclass 32, count 0 2006.229.02:56:53.24#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:53.24#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.02:56:53.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.02:56:53.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.02:56:53.24$vck44/vblo=4,679.99 2006.229.02:56:53.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.02:56:53.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.02:56:53.24#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:53.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:53.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:53.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:53.24#ibcon#enter wrdev, iclass 34, count 0 2006.229.02:56:53.24#ibcon#first serial, iclass 34, count 0 2006.229.02:56:53.24#ibcon#enter sib2, iclass 34, count 0 2006.229.02:56:53.24#ibcon#flushed, iclass 34, count 0 2006.229.02:56:53.24#ibcon#about to write, iclass 34, count 0 2006.229.02:56:53.24#ibcon#wrote, iclass 34, count 0 2006.229.02:56:53.24#ibcon#about to read 3, iclass 34, count 0 2006.229.02:56:53.26#ibcon#read 3, iclass 34, count 0 2006.229.02:56:53.26#ibcon#about to read 4, iclass 34, count 0 2006.229.02:56:53.26#ibcon#read 4, iclass 34, count 0 2006.229.02:56:53.26#ibcon#about to read 5, iclass 34, count 0 2006.229.02:56:53.26#ibcon#read 5, iclass 34, count 0 2006.229.02:56:53.26#ibcon#about to read 6, iclass 34, count 0 2006.229.02:56:53.26#ibcon#read 6, iclass 34, count 0 2006.229.02:56:53.26#ibcon#end of sib2, iclass 34, count 0 2006.229.02:56:53.26#ibcon#*mode == 0, iclass 34, count 0 2006.229.02:56:53.26#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.02:56:53.26#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.02:56:53.26#ibcon#*before write, iclass 34, count 0 2006.229.02:56:53.26#ibcon#enter sib2, iclass 34, count 0 2006.229.02:56:53.26#ibcon#flushed, iclass 34, count 0 2006.229.02:56:53.26#ibcon#about to write, iclass 34, count 0 2006.229.02:56:53.26#ibcon#wrote, iclass 34, count 0 2006.229.02:56:53.26#ibcon#about to read 3, iclass 34, count 0 2006.229.02:56:53.30#ibcon#read 3, iclass 34, count 0 2006.229.02:56:53.30#ibcon#about to read 4, iclass 34, count 0 2006.229.02:56:53.30#ibcon#read 4, iclass 34, count 0 2006.229.02:56:53.30#ibcon#about to read 5, iclass 34, count 0 2006.229.02:56:53.30#ibcon#read 5, iclass 34, count 0 2006.229.02:56:53.30#ibcon#about to read 6, iclass 34, count 0 2006.229.02:56:53.30#ibcon#read 6, iclass 34, count 0 2006.229.02:56:53.30#ibcon#end of sib2, iclass 34, count 0 2006.229.02:56:53.30#ibcon#*after write, iclass 34, count 0 2006.229.02:56:53.30#ibcon#*before return 0, iclass 34, count 0 2006.229.02:56:53.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:53.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.02:56:53.30#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.02:56:53.30#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.02:56:53.30$vck44/vb=4,4 2006.229.02:56:53.30#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.02:56:53.30#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.02:56:53.30#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:53.30#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:53.36#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:53.36#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:53.36#ibcon#enter wrdev, iclass 36, count 2 2006.229.02:56:53.36#ibcon#first serial, iclass 36, count 2 2006.229.02:56:53.36#ibcon#enter sib2, iclass 36, count 2 2006.229.02:56:53.36#ibcon#flushed, iclass 36, count 2 2006.229.02:56:53.36#ibcon#about to write, iclass 36, count 2 2006.229.02:56:53.36#ibcon#wrote, iclass 36, count 2 2006.229.02:56:53.36#ibcon#about to read 3, iclass 36, count 2 2006.229.02:56:53.38#ibcon#read 3, iclass 36, count 2 2006.229.02:56:53.38#ibcon#about to read 4, iclass 36, count 2 2006.229.02:56:53.38#ibcon#read 4, iclass 36, count 2 2006.229.02:56:53.38#ibcon#about to read 5, iclass 36, count 2 2006.229.02:56:53.38#ibcon#read 5, iclass 36, count 2 2006.229.02:56:53.38#ibcon#about to read 6, iclass 36, count 2 2006.229.02:56:53.38#ibcon#read 6, iclass 36, count 2 2006.229.02:56:53.38#ibcon#end of sib2, iclass 36, count 2 2006.229.02:56:53.38#ibcon#*mode == 0, iclass 36, count 2 2006.229.02:56:53.38#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.02:56:53.38#ibcon#[27=AT04-04\r\n] 2006.229.02:56:53.38#ibcon#*before write, iclass 36, count 2 2006.229.02:56:53.38#ibcon#enter sib2, iclass 36, count 2 2006.229.02:56:53.38#ibcon#flushed, iclass 36, count 2 2006.229.02:56:53.38#ibcon#about to write, iclass 36, count 2 2006.229.02:56:53.38#ibcon#wrote, iclass 36, count 2 2006.229.02:56:53.38#ibcon#about to read 3, iclass 36, count 2 2006.229.02:56:53.41#ibcon#read 3, iclass 36, count 2 2006.229.02:56:53.41#ibcon#about to read 4, iclass 36, count 2 2006.229.02:56:53.41#ibcon#read 4, iclass 36, count 2 2006.229.02:56:53.41#ibcon#about to read 5, iclass 36, count 2 2006.229.02:56:53.41#ibcon#read 5, iclass 36, count 2 2006.229.02:56:53.41#ibcon#about to read 6, iclass 36, count 2 2006.229.02:56:53.41#ibcon#read 6, iclass 36, count 2 2006.229.02:56:53.41#ibcon#end of sib2, iclass 36, count 2 2006.229.02:56:53.41#ibcon#*after write, iclass 36, count 2 2006.229.02:56:53.41#ibcon#*before return 0, iclass 36, count 2 2006.229.02:56:53.41#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:53.41#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.02:56:53.41#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.02:56:53.41#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:53.41#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:53.53#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:53.53#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:53.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.02:56:53.53#ibcon#first serial, iclass 36, count 0 2006.229.02:56:53.53#ibcon#enter sib2, iclass 36, count 0 2006.229.02:56:53.53#ibcon#flushed, iclass 36, count 0 2006.229.02:56:53.53#ibcon#about to write, iclass 36, count 0 2006.229.02:56:53.53#ibcon#wrote, iclass 36, count 0 2006.229.02:56:53.53#ibcon#about to read 3, iclass 36, count 0 2006.229.02:56:53.55#ibcon#read 3, iclass 36, count 0 2006.229.02:56:53.55#ibcon#about to read 4, iclass 36, count 0 2006.229.02:56:53.55#ibcon#read 4, iclass 36, count 0 2006.229.02:56:53.55#ibcon#about to read 5, iclass 36, count 0 2006.229.02:56:53.55#ibcon#read 5, iclass 36, count 0 2006.229.02:56:53.55#ibcon#about to read 6, iclass 36, count 0 2006.229.02:56:53.55#ibcon#read 6, iclass 36, count 0 2006.229.02:56:53.55#ibcon#end of sib2, iclass 36, count 0 2006.229.02:56:53.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.02:56:53.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.02:56:53.55#ibcon#[27=USB\r\n] 2006.229.02:56:53.55#ibcon#*before write, iclass 36, count 0 2006.229.02:56:53.55#ibcon#enter sib2, iclass 36, count 0 2006.229.02:56:53.55#ibcon#flushed, iclass 36, count 0 2006.229.02:56:53.55#ibcon#about to write, iclass 36, count 0 2006.229.02:56:53.55#ibcon#wrote, iclass 36, count 0 2006.229.02:56:53.55#ibcon#about to read 3, iclass 36, count 0 2006.229.02:56:53.58#ibcon#read 3, iclass 36, count 0 2006.229.02:56:53.58#ibcon#about to read 4, iclass 36, count 0 2006.229.02:56:53.58#ibcon#read 4, iclass 36, count 0 2006.229.02:56:53.58#ibcon#about to read 5, iclass 36, count 0 2006.229.02:56:53.58#ibcon#read 5, iclass 36, count 0 2006.229.02:56:53.58#ibcon#about to read 6, iclass 36, count 0 2006.229.02:56:53.58#ibcon#read 6, iclass 36, count 0 2006.229.02:56:53.58#ibcon#end of sib2, iclass 36, count 0 2006.229.02:56:53.58#ibcon#*after write, iclass 36, count 0 2006.229.02:56:53.58#ibcon#*before return 0, iclass 36, count 0 2006.229.02:56:53.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:53.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.02:56:53.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.02:56:53.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.02:56:53.58$vck44/vblo=5,709.99 2006.229.02:56:53.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.02:56:53.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.02:56:53.58#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:53.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:53.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:53.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:53.58#ibcon#enter wrdev, iclass 38, count 0 2006.229.02:56:53.58#ibcon#first serial, iclass 38, count 0 2006.229.02:56:53.58#ibcon#enter sib2, iclass 38, count 0 2006.229.02:56:53.58#ibcon#flushed, iclass 38, count 0 2006.229.02:56:53.58#ibcon#about to write, iclass 38, count 0 2006.229.02:56:53.58#ibcon#wrote, iclass 38, count 0 2006.229.02:56:53.58#ibcon#about to read 3, iclass 38, count 0 2006.229.02:56:53.60#ibcon#read 3, iclass 38, count 0 2006.229.02:56:53.60#ibcon#about to read 4, iclass 38, count 0 2006.229.02:56:53.60#ibcon#read 4, iclass 38, count 0 2006.229.02:56:53.60#ibcon#about to read 5, iclass 38, count 0 2006.229.02:56:53.60#ibcon#read 5, iclass 38, count 0 2006.229.02:56:53.60#ibcon#about to read 6, iclass 38, count 0 2006.229.02:56:53.60#ibcon#read 6, iclass 38, count 0 2006.229.02:56:53.60#ibcon#end of sib2, iclass 38, count 0 2006.229.02:56:53.60#ibcon#*mode == 0, iclass 38, count 0 2006.229.02:56:53.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.02:56:53.60#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.02:56:53.60#ibcon#*before write, iclass 38, count 0 2006.229.02:56:53.60#ibcon#enter sib2, iclass 38, count 0 2006.229.02:56:53.60#ibcon#flushed, iclass 38, count 0 2006.229.02:56:53.60#ibcon#about to write, iclass 38, count 0 2006.229.02:56:53.60#ibcon#wrote, iclass 38, count 0 2006.229.02:56:53.60#ibcon#about to read 3, iclass 38, count 0 2006.229.02:56:53.64#ibcon#read 3, iclass 38, count 0 2006.229.02:56:53.64#ibcon#about to read 4, iclass 38, count 0 2006.229.02:56:53.64#ibcon#read 4, iclass 38, count 0 2006.229.02:56:53.64#ibcon#about to read 5, iclass 38, count 0 2006.229.02:56:53.64#ibcon#read 5, iclass 38, count 0 2006.229.02:56:53.64#ibcon#about to read 6, iclass 38, count 0 2006.229.02:56:53.64#ibcon#read 6, iclass 38, count 0 2006.229.02:56:53.64#ibcon#end of sib2, iclass 38, count 0 2006.229.02:56:53.64#ibcon#*after write, iclass 38, count 0 2006.229.02:56:53.64#ibcon#*before return 0, iclass 38, count 0 2006.229.02:56:53.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:53.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.02:56:53.64#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.02:56:53.64#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.02:56:53.64$vck44/vb=5,4 2006.229.02:56:53.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.02:56:53.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.02:56:53.64#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:53.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:53.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:53.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:53.70#ibcon#enter wrdev, iclass 40, count 2 2006.229.02:56:53.70#ibcon#first serial, iclass 40, count 2 2006.229.02:56:53.70#ibcon#enter sib2, iclass 40, count 2 2006.229.02:56:53.70#ibcon#flushed, iclass 40, count 2 2006.229.02:56:53.70#ibcon#about to write, iclass 40, count 2 2006.229.02:56:53.70#ibcon#wrote, iclass 40, count 2 2006.229.02:56:53.70#ibcon#about to read 3, iclass 40, count 2 2006.229.02:56:53.72#ibcon#read 3, iclass 40, count 2 2006.229.02:56:53.72#ibcon#about to read 4, iclass 40, count 2 2006.229.02:56:53.72#ibcon#read 4, iclass 40, count 2 2006.229.02:56:53.72#ibcon#about to read 5, iclass 40, count 2 2006.229.02:56:53.72#ibcon#read 5, iclass 40, count 2 2006.229.02:56:53.72#ibcon#about to read 6, iclass 40, count 2 2006.229.02:56:53.72#ibcon#read 6, iclass 40, count 2 2006.229.02:56:53.72#ibcon#end of sib2, iclass 40, count 2 2006.229.02:56:53.72#ibcon#*mode == 0, iclass 40, count 2 2006.229.02:56:53.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.02:56:53.72#ibcon#[27=AT05-04\r\n] 2006.229.02:56:53.72#ibcon#*before write, iclass 40, count 2 2006.229.02:56:53.72#ibcon#enter sib2, iclass 40, count 2 2006.229.02:56:53.72#ibcon#flushed, iclass 40, count 2 2006.229.02:56:53.72#ibcon#about to write, iclass 40, count 2 2006.229.02:56:53.72#ibcon#wrote, iclass 40, count 2 2006.229.02:56:53.72#ibcon#about to read 3, iclass 40, count 2 2006.229.02:56:53.75#ibcon#read 3, iclass 40, count 2 2006.229.02:56:53.75#ibcon#about to read 4, iclass 40, count 2 2006.229.02:56:53.75#ibcon#read 4, iclass 40, count 2 2006.229.02:56:53.75#ibcon#about to read 5, iclass 40, count 2 2006.229.02:56:53.75#ibcon#read 5, iclass 40, count 2 2006.229.02:56:53.75#ibcon#about to read 6, iclass 40, count 2 2006.229.02:56:53.75#ibcon#read 6, iclass 40, count 2 2006.229.02:56:53.75#ibcon#end of sib2, iclass 40, count 2 2006.229.02:56:53.75#ibcon#*after write, iclass 40, count 2 2006.229.02:56:53.75#ibcon#*before return 0, iclass 40, count 2 2006.229.02:56:53.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:53.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.02:56:53.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.02:56:53.75#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:53.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:53.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:53.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:53.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.02:56:53.87#ibcon#first serial, iclass 40, count 0 2006.229.02:56:53.87#ibcon#enter sib2, iclass 40, count 0 2006.229.02:56:53.87#ibcon#flushed, iclass 40, count 0 2006.229.02:56:53.87#ibcon#about to write, iclass 40, count 0 2006.229.02:56:53.87#ibcon#wrote, iclass 40, count 0 2006.229.02:56:53.87#ibcon#about to read 3, iclass 40, count 0 2006.229.02:56:53.89#ibcon#read 3, iclass 40, count 0 2006.229.02:56:53.89#ibcon#about to read 4, iclass 40, count 0 2006.229.02:56:53.89#ibcon#read 4, iclass 40, count 0 2006.229.02:56:53.89#ibcon#about to read 5, iclass 40, count 0 2006.229.02:56:53.89#ibcon#read 5, iclass 40, count 0 2006.229.02:56:53.89#ibcon#about to read 6, iclass 40, count 0 2006.229.02:56:53.89#ibcon#read 6, iclass 40, count 0 2006.229.02:56:53.89#ibcon#end of sib2, iclass 40, count 0 2006.229.02:56:53.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.02:56:53.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.02:56:53.89#ibcon#[27=USB\r\n] 2006.229.02:56:53.89#ibcon#*before write, iclass 40, count 0 2006.229.02:56:53.89#ibcon#enter sib2, iclass 40, count 0 2006.229.02:56:53.89#ibcon#flushed, iclass 40, count 0 2006.229.02:56:53.89#ibcon#about to write, iclass 40, count 0 2006.229.02:56:53.89#ibcon#wrote, iclass 40, count 0 2006.229.02:56:53.89#ibcon#about to read 3, iclass 40, count 0 2006.229.02:56:53.92#ibcon#read 3, iclass 40, count 0 2006.229.02:56:53.92#ibcon#about to read 4, iclass 40, count 0 2006.229.02:56:53.92#ibcon#read 4, iclass 40, count 0 2006.229.02:56:53.92#ibcon#about to read 5, iclass 40, count 0 2006.229.02:56:53.92#ibcon#read 5, iclass 40, count 0 2006.229.02:56:53.92#ibcon#about to read 6, iclass 40, count 0 2006.229.02:56:53.92#ibcon#read 6, iclass 40, count 0 2006.229.02:56:53.92#ibcon#end of sib2, iclass 40, count 0 2006.229.02:56:53.92#ibcon#*after write, iclass 40, count 0 2006.229.02:56:53.92#ibcon#*before return 0, iclass 40, count 0 2006.229.02:56:53.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:53.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.02:56:53.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.02:56:53.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.02:56:53.92$vck44/vblo=6,719.99 2006.229.02:56:53.92#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.02:56:53.92#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.02:56:53.92#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:53.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:53.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:53.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:53.92#ibcon#enter wrdev, iclass 4, count 0 2006.229.02:56:53.92#ibcon#first serial, iclass 4, count 0 2006.229.02:56:53.92#ibcon#enter sib2, iclass 4, count 0 2006.229.02:56:53.92#ibcon#flushed, iclass 4, count 0 2006.229.02:56:53.92#ibcon#about to write, iclass 4, count 0 2006.229.02:56:53.92#ibcon#wrote, iclass 4, count 0 2006.229.02:56:53.92#ibcon#about to read 3, iclass 4, count 0 2006.229.02:56:53.94#ibcon#read 3, iclass 4, count 0 2006.229.02:56:53.94#ibcon#about to read 4, iclass 4, count 0 2006.229.02:56:53.94#ibcon#read 4, iclass 4, count 0 2006.229.02:56:53.94#ibcon#about to read 5, iclass 4, count 0 2006.229.02:56:53.94#ibcon#read 5, iclass 4, count 0 2006.229.02:56:53.94#ibcon#about to read 6, iclass 4, count 0 2006.229.02:56:53.94#ibcon#read 6, iclass 4, count 0 2006.229.02:56:53.94#ibcon#end of sib2, iclass 4, count 0 2006.229.02:56:53.94#ibcon#*mode == 0, iclass 4, count 0 2006.229.02:56:53.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.02:56:53.94#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.02:56:53.94#ibcon#*before write, iclass 4, count 0 2006.229.02:56:53.94#ibcon#enter sib2, iclass 4, count 0 2006.229.02:56:53.94#ibcon#flushed, iclass 4, count 0 2006.229.02:56:53.94#ibcon#about to write, iclass 4, count 0 2006.229.02:56:53.94#ibcon#wrote, iclass 4, count 0 2006.229.02:56:53.94#ibcon#about to read 3, iclass 4, count 0 2006.229.02:56:53.98#ibcon#read 3, iclass 4, count 0 2006.229.02:56:53.98#ibcon#about to read 4, iclass 4, count 0 2006.229.02:56:53.98#ibcon#read 4, iclass 4, count 0 2006.229.02:56:53.98#ibcon#about to read 5, iclass 4, count 0 2006.229.02:56:53.98#ibcon#read 5, iclass 4, count 0 2006.229.02:56:53.98#ibcon#about to read 6, iclass 4, count 0 2006.229.02:56:53.98#ibcon#read 6, iclass 4, count 0 2006.229.02:56:53.98#ibcon#end of sib2, iclass 4, count 0 2006.229.02:56:53.98#ibcon#*after write, iclass 4, count 0 2006.229.02:56:53.98#ibcon#*before return 0, iclass 4, count 0 2006.229.02:56:53.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:53.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.02:56:53.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.02:56:53.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.02:56:53.98$vck44/vb=6,4 2006.229.02:56:53.98#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.02:56:53.98#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.02:56:53.98#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:53.98#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:54.04#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:54.04#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:54.04#ibcon#enter wrdev, iclass 6, count 2 2006.229.02:56:54.04#ibcon#first serial, iclass 6, count 2 2006.229.02:56:54.04#ibcon#enter sib2, iclass 6, count 2 2006.229.02:56:54.04#ibcon#flushed, iclass 6, count 2 2006.229.02:56:54.04#ibcon#about to write, iclass 6, count 2 2006.229.02:56:54.04#ibcon#wrote, iclass 6, count 2 2006.229.02:56:54.04#ibcon#about to read 3, iclass 6, count 2 2006.229.02:56:54.06#ibcon#read 3, iclass 6, count 2 2006.229.02:56:54.06#ibcon#about to read 4, iclass 6, count 2 2006.229.02:56:54.06#ibcon#read 4, iclass 6, count 2 2006.229.02:56:54.06#ibcon#about to read 5, iclass 6, count 2 2006.229.02:56:54.06#ibcon#read 5, iclass 6, count 2 2006.229.02:56:54.06#ibcon#about to read 6, iclass 6, count 2 2006.229.02:56:54.06#ibcon#read 6, iclass 6, count 2 2006.229.02:56:54.06#ibcon#end of sib2, iclass 6, count 2 2006.229.02:56:54.06#ibcon#*mode == 0, iclass 6, count 2 2006.229.02:56:54.06#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.02:56:54.06#ibcon#[27=AT06-04\r\n] 2006.229.02:56:54.06#ibcon#*before write, iclass 6, count 2 2006.229.02:56:54.06#ibcon#enter sib2, iclass 6, count 2 2006.229.02:56:54.06#ibcon#flushed, iclass 6, count 2 2006.229.02:56:54.06#ibcon#about to write, iclass 6, count 2 2006.229.02:56:54.06#ibcon#wrote, iclass 6, count 2 2006.229.02:56:54.06#ibcon#about to read 3, iclass 6, count 2 2006.229.02:56:54.09#ibcon#read 3, iclass 6, count 2 2006.229.02:56:54.09#ibcon#about to read 4, iclass 6, count 2 2006.229.02:56:54.09#ibcon#read 4, iclass 6, count 2 2006.229.02:56:54.09#ibcon#about to read 5, iclass 6, count 2 2006.229.02:56:54.09#ibcon#read 5, iclass 6, count 2 2006.229.02:56:54.09#ibcon#about to read 6, iclass 6, count 2 2006.229.02:56:54.09#ibcon#read 6, iclass 6, count 2 2006.229.02:56:54.09#ibcon#end of sib2, iclass 6, count 2 2006.229.02:56:54.09#ibcon#*after write, iclass 6, count 2 2006.229.02:56:54.09#ibcon#*before return 0, iclass 6, count 2 2006.229.02:56:54.09#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:54.09#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.02:56:54.09#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.02:56:54.09#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:54.09#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:54.21#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:54.21#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:54.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.02:56:54.21#ibcon#first serial, iclass 6, count 0 2006.229.02:56:54.21#ibcon#enter sib2, iclass 6, count 0 2006.229.02:56:54.21#ibcon#flushed, iclass 6, count 0 2006.229.02:56:54.21#ibcon#about to write, iclass 6, count 0 2006.229.02:56:54.21#ibcon#wrote, iclass 6, count 0 2006.229.02:56:54.21#ibcon#about to read 3, iclass 6, count 0 2006.229.02:56:54.23#ibcon#read 3, iclass 6, count 0 2006.229.02:56:54.23#ibcon#about to read 4, iclass 6, count 0 2006.229.02:56:54.23#ibcon#read 4, iclass 6, count 0 2006.229.02:56:54.23#ibcon#about to read 5, iclass 6, count 0 2006.229.02:56:54.23#ibcon#read 5, iclass 6, count 0 2006.229.02:56:54.23#ibcon#about to read 6, iclass 6, count 0 2006.229.02:56:54.23#ibcon#read 6, iclass 6, count 0 2006.229.02:56:54.23#ibcon#end of sib2, iclass 6, count 0 2006.229.02:56:54.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.02:56:54.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.02:56:54.23#ibcon#[27=USB\r\n] 2006.229.02:56:54.23#ibcon#*before write, iclass 6, count 0 2006.229.02:56:54.23#ibcon#enter sib2, iclass 6, count 0 2006.229.02:56:54.23#ibcon#flushed, iclass 6, count 0 2006.229.02:56:54.23#ibcon#about to write, iclass 6, count 0 2006.229.02:56:54.23#ibcon#wrote, iclass 6, count 0 2006.229.02:56:54.23#ibcon#about to read 3, iclass 6, count 0 2006.229.02:56:54.26#ibcon#read 3, iclass 6, count 0 2006.229.02:56:54.26#ibcon#about to read 4, iclass 6, count 0 2006.229.02:56:54.26#ibcon#read 4, iclass 6, count 0 2006.229.02:56:54.26#ibcon#about to read 5, iclass 6, count 0 2006.229.02:56:54.26#ibcon#read 5, iclass 6, count 0 2006.229.02:56:54.26#ibcon#about to read 6, iclass 6, count 0 2006.229.02:56:54.26#ibcon#read 6, iclass 6, count 0 2006.229.02:56:54.26#ibcon#end of sib2, iclass 6, count 0 2006.229.02:56:54.26#ibcon#*after write, iclass 6, count 0 2006.229.02:56:54.26#ibcon#*before return 0, iclass 6, count 0 2006.229.02:56:54.26#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:54.26#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.02:56:54.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.02:56:54.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.02:56:54.26$vck44/vblo=7,734.99 2006.229.02:56:54.26#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.02:56:54.26#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.02:56:54.26#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:54.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:54.26#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:54.26#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:54.26#ibcon#enter wrdev, iclass 10, count 0 2006.229.02:56:54.26#ibcon#first serial, iclass 10, count 0 2006.229.02:56:54.26#ibcon#enter sib2, iclass 10, count 0 2006.229.02:56:54.26#ibcon#flushed, iclass 10, count 0 2006.229.02:56:54.26#ibcon#about to write, iclass 10, count 0 2006.229.02:56:54.26#ibcon#wrote, iclass 10, count 0 2006.229.02:56:54.26#ibcon#about to read 3, iclass 10, count 0 2006.229.02:56:54.28#ibcon#read 3, iclass 10, count 0 2006.229.02:56:54.28#ibcon#about to read 4, iclass 10, count 0 2006.229.02:56:54.28#ibcon#read 4, iclass 10, count 0 2006.229.02:56:54.28#ibcon#about to read 5, iclass 10, count 0 2006.229.02:56:54.28#ibcon#read 5, iclass 10, count 0 2006.229.02:56:54.28#ibcon#about to read 6, iclass 10, count 0 2006.229.02:56:54.28#ibcon#read 6, iclass 10, count 0 2006.229.02:56:54.28#ibcon#end of sib2, iclass 10, count 0 2006.229.02:56:54.28#ibcon#*mode == 0, iclass 10, count 0 2006.229.02:56:54.28#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.02:56:54.28#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.02:56:54.28#ibcon#*before write, iclass 10, count 0 2006.229.02:56:54.28#ibcon#enter sib2, iclass 10, count 0 2006.229.02:56:54.28#ibcon#flushed, iclass 10, count 0 2006.229.02:56:54.28#ibcon#about to write, iclass 10, count 0 2006.229.02:56:54.28#ibcon#wrote, iclass 10, count 0 2006.229.02:56:54.28#ibcon#about to read 3, iclass 10, count 0 2006.229.02:56:54.32#ibcon#read 3, iclass 10, count 0 2006.229.02:56:54.32#ibcon#about to read 4, iclass 10, count 0 2006.229.02:56:54.32#ibcon#read 4, iclass 10, count 0 2006.229.02:56:54.32#ibcon#about to read 5, iclass 10, count 0 2006.229.02:56:54.32#ibcon#read 5, iclass 10, count 0 2006.229.02:56:54.32#ibcon#about to read 6, iclass 10, count 0 2006.229.02:56:54.32#ibcon#read 6, iclass 10, count 0 2006.229.02:56:54.32#ibcon#end of sib2, iclass 10, count 0 2006.229.02:56:54.32#ibcon#*after write, iclass 10, count 0 2006.229.02:56:54.32#ibcon#*before return 0, iclass 10, count 0 2006.229.02:56:54.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:54.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.02:56:54.32#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.02:56:54.32#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.02:56:54.32$vck44/vb=7,4 2006.229.02:56:54.32#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.02:56:54.32#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.02:56:54.32#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:54.32#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:54.38#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:54.38#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:54.38#ibcon#enter wrdev, iclass 12, count 2 2006.229.02:56:54.38#ibcon#first serial, iclass 12, count 2 2006.229.02:56:54.38#ibcon#enter sib2, iclass 12, count 2 2006.229.02:56:54.38#ibcon#flushed, iclass 12, count 2 2006.229.02:56:54.38#ibcon#about to write, iclass 12, count 2 2006.229.02:56:54.38#ibcon#wrote, iclass 12, count 2 2006.229.02:56:54.38#ibcon#about to read 3, iclass 12, count 2 2006.229.02:56:54.40#ibcon#read 3, iclass 12, count 2 2006.229.02:56:54.40#ibcon#about to read 4, iclass 12, count 2 2006.229.02:56:54.40#ibcon#read 4, iclass 12, count 2 2006.229.02:56:54.40#ibcon#about to read 5, iclass 12, count 2 2006.229.02:56:54.40#ibcon#read 5, iclass 12, count 2 2006.229.02:56:54.40#ibcon#about to read 6, iclass 12, count 2 2006.229.02:56:54.40#ibcon#read 6, iclass 12, count 2 2006.229.02:56:54.40#ibcon#end of sib2, iclass 12, count 2 2006.229.02:56:54.40#ibcon#*mode == 0, iclass 12, count 2 2006.229.02:56:54.40#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.02:56:54.40#ibcon#[27=AT07-04\r\n] 2006.229.02:56:54.40#ibcon#*before write, iclass 12, count 2 2006.229.02:56:54.40#ibcon#enter sib2, iclass 12, count 2 2006.229.02:56:54.40#ibcon#flushed, iclass 12, count 2 2006.229.02:56:54.40#ibcon#about to write, iclass 12, count 2 2006.229.02:56:54.40#ibcon#wrote, iclass 12, count 2 2006.229.02:56:54.40#ibcon#about to read 3, iclass 12, count 2 2006.229.02:56:54.43#ibcon#read 3, iclass 12, count 2 2006.229.02:56:54.43#ibcon#about to read 4, iclass 12, count 2 2006.229.02:56:54.43#ibcon#read 4, iclass 12, count 2 2006.229.02:56:54.43#ibcon#about to read 5, iclass 12, count 2 2006.229.02:56:54.43#ibcon#read 5, iclass 12, count 2 2006.229.02:56:54.43#ibcon#about to read 6, iclass 12, count 2 2006.229.02:56:54.43#ibcon#read 6, iclass 12, count 2 2006.229.02:56:54.43#ibcon#end of sib2, iclass 12, count 2 2006.229.02:56:54.43#ibcon#*after write, iclass 12, count 2 2006.229.02:56:54.43#ibcon#*before return 0, iclass 12, count 2 2006.229.02:56:54.43#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:54.43#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.02:56:54.43#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.02:56:54.43#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:54.43#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:54.55#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:54.55#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:54.55#ibcon#enter wrdev, iclass 12, count 0 2006.229.02:56:54.55#ibcon#first serial, iclass 12, count 0 2006.229.02:56:54.55#ibcon#enter sib2, iclass 12, count 0 2006.229.02:56:54.55#ibcon#flushed, iclass 12, count 0 2006.229.02:56:54.55#ibcon#about to write, iclass 12, count 0 2006.229.02:56:54.55#ibcon#wrote, iclass 12, count 0 2006.229.02:56:54.55#ibcon#about to read 3, iclass 12, count 0 2006.229.02:56:54.57#ibcon#read 3, iclass 12, count 0 2006.229.02:56:54.57#ibcon#about to read 4, iclass 12, count 0 2006.229.02:56:54.57#ibcon#read 4, iclass 12, count 0 2006.229.02:56:54.57#ibcon#about to read 5, iclass 12, count 0 2006.229.02:56:54.57#ibcon#read 5, iclass 12, count 0 2006.229.02:56:54.57#ibcon#about to read 6, iclass 12, count 0 2006.229.02:56:54.57#ibcon#read 6, iclass 12, count 0 2006.229.02:56:54.57#ibcon#end of sib2, iclass 12, count 0 2006.229.02:56:54.57#ibcon#*mode == 0, iclass 12, count 0 2006.229.02:56:54.57#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.02:56:54.57#ibcon#[27=USB\r\n] 2006.229.02:56:54.57#ibcon#*before write, iclass 12, count 0 2006.229.02:56:54.57#ibcon#enter sib2, iclass 12, count 0 2006.229.02:56:54.57#ibcon#flushed, iclass 12, count 0 2006.229.02:56:54.57#ibcon#about to write, iclass 12, count 0 2006.229.02:56:54.57#ibcon#wrote, iclass 12, count 0 2006.229.02:56:54.57#ibcon#about to read 3, iclass 12, count 0 2006.229.02:56:54.60#ibcon#read 3, iclass 12, count 0 2006.229.02:56:54.60#ibcon#about to read 4, iclass 12, count 0 2006.229.02:56:54.60#ibcon#read 4, iclass 12, count 0 2006.229.02:56:54.60#ibcon#about to read 5, iclass 12, count 0 2006.229.02:56:54.60#ibcon#read 5, iclass 12, count 0 2006.229.02:56:54.60#ibcon#about to read 6, iclass 12, count 0 2006.229.02:56:54.60#ibcon#read 6, iclass 12, count 0 2006.229.02:56:54.60#ibcon#end of sib2, iclass 12, count 0 2006.229.02:56:54.60#ibcon#*after write, iclass 12, count 0 2006.229.02:56:54.60#ibcon#*before return 0, iclass 12, count 0 2006.229.02:56:54.60#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:54.60#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.02:56:54.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.02:56:54.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.02:56:54.60$vck44/vblo=8,744.99 2006.229.02:56:54.60#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.02:56:54.60#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.02:56:54.60#ibcon#ireg 17 cls_cnt 0 2006.229.02:56:54.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:54.60#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:54.60#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:54.60#ibcon#enter wrdev, iclass 14, count 0 2006.229.02:56:54.60#ibcon#first serial, iclass 14, count 0 2006.229.02:56:54.60#ibcon#enter sib2, iclass 14, count 0 2006.229.02:56:54.60#ibcon#flushed, iclass 14, count 0 2006.229.02:56:54.60#ibcon#about to write, iclass 14, count 0 2006.229.02:56:54.60#ibcon#wrote, iclass 14, count 0 2006.229.02:56:54.60#ibcon#about to read 3, iclass 14, count 0 2006.229.02:56:54.62#ibcon#read 3, iclass 14, count 0 2006.229.02:56:54.62#ibcon#about to read 4, iclass 14, count 0 2006.229.02:56:54.62#ibcon#read 4, iclass 14, count 0 2006.229.02:56:54.62#ibcon#about to read 5, iclass 14, count 0 2006.229.02:56:54.62#ibcon#read 5, iclass 14, count 0 2006.229.02:56:54.62#ibcon#about to read 6, iclass 14, count 0 2006.229.02:56:54.62#ibcon#read 6, iclass 14, count 0 2006.229.02:56:54.62#ibcon#end of sib2, iclass 14, count 0 2006.229.02:56:54.62#ibcon#*mode == 0, iclass 14, count 0 2006.229.02:56:54.62#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.02:56:54.62#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.02:56:54.62#ibcon#*before write, iclass 14, count 0 2006.229.02:56:54.62#ibcon#enter sib2, iclass 14, count 0 2006.229.02:56:54.62#ibcon#flushed, iclass 14, count 0 2006.229.02:56:54.62#ibcon#about to write, iclass 14, count 0 2006.229.02:56:54.62#ibcon#wrote, iclass 14, count 0 2006.229.02:56:54.62#ibcon#about to read 3, iclass 14, count 0 2006.229.02:56:54.66#ibcon#read 3, iclass 14, count 0 2006.229.02:56:54.66#ibcon#about to read 4, iclass 14, count 0 2006.229.02:56:54.66#ibcon#read 4, iclass 14, count 0 2006.229.02:56:54.66#ibcon#about to read 5, iclass 14, count 0 2006.229.02:56:54.66#ibcon#read 5, iclass 14, count 0 2006.229.02:56:54.66#ibcon#about to read 6, iclass 14, count 0 2006.229.02:56:54.66#ibcon#read 6, iclass 14, count 0 2006.229.02:56:54.66#ibcon#end of sib2, iclass 14, count 0 2006.229.02:56:54.66#ibcon#*after write, iclass 14, count 0 2006.229.02:56:54.66#ibcon#*before return 0, iclass 14, count 0 2006.229.02:56:54.66#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:54.66#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.02:56:54.66#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.02:56:54.66#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.02:56:54.66$vck44/vb=8,4 2006.229.02:56:54.66#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.02:56:54.66#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.02:56:54.66#ibcon#ireg 11 cls_cnt 2 2006.229.02:56:54.66#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:54.72#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:54.72#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:54.72#ibcon#enter wrdev, iclass 16, count 2 2006.229.02:56:54.72#ibcon#first serial, iclass 16, count 2 2006.229.02:56:54.72#ibcon#enter sib2, iclass 16, count 2 2006.229.02:56:54.72#ibcon#flushed, iclass 16, count 2 2006.229.02:56:54.72#ibcon#about to write, iclass 16, count 2 2006.229.02:56:54.72#ibcon#wrote, iclass 16, count 2 2006.229.02:56:54.72#ibcon#about to read 3, iclass 16, count 2 2006.229.02:56:54.74#ibcon#read 3, iclass 16, count 2 2006.229.02:56:54.74#ibcon#about to read 4, iclass 16, count 2 2006.229.02:56:54.74#ibcon#read 4, iclass 16, count 2 2006.229.02:56:54.74#ibcon#about to read 5, iclass 16, count 2 2006.229.02:56:54.74#ibcon#read 5, iclass 16, count 2 2006.229.02:56:54.74#ibcon#about to read 6, iclass 16, count 2 2006.229.02:56:54.74#ibcon#read 6, iclass 16, count 2 2006.229.02:56:54.74#ibcon#end of sib2, iclass 16, count 2 2006.229.02:56:54.74#ibcon#*mode == 0, iclass 16, count 2 2006.229.02:56:54.74#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.02:56:54.74#ibcon#[27=AT08-04\r\n] 2006.229.02:56:54.74#ibcon#*before write, iclass 16, count 2 2006.229.02:56:54.74#ibcon#enter sib2, iclass 16, count 2 2006.229.02:56:54.74#ibcon#flushed, iclass 16, count 2 2006.229.02:56:54.74#ibcon#about to write, iclass 16, count 2 2006.229.02:56:54.74#ibcon#wrote, iclass 16, count 2 2006.229.02:56:54.74#ibcon#about to read 3, iclass 16, count 2 2006.229.02:56:54.77#ibcon#read 3, iclass 16, count 2 2006.229.02:56:54.77#ibcon#about to read 4, iclass 16, count 2 2006.229.02:56:54.77#ibcon#read 4, iclass 16, count 2 2006.229.02:56:54.77#ibcon#about to read 5, iclass 16, count 2 2006.229.02:56:54.77#ibcon#read 5, iclass 16, count 2 2006.229.02:56:54.77#ibcon#about to read 6, iclass 16, count 2 2006.229.02:56:54.77#ibcon#read 6, iclass 16, count 2 2006.229.02:56:54.77#ibcon#end of sib2, iclass 16, count 2 2006.229.02:56:54.77#ibcon#*after write, iclass 16, count 2 2006.229.02:56:54.77#ibcon#*before return 0, iclass 16, count 2 2006.229.02:56:54.77#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:54.77#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.02:56:54.77#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.02:56:54.77#ibcon#ireg 7 cls_cnt 0 2006.229.02:56:54.77#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:54.89#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:54.89#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:54.89#ibcon#enter wrdev, iclass 16, count 0 2006.229.02:56:54.89#ibcon#first serial, iclass 16, count 0 2006.229.02:56:54.89#ibcon#enter sib2, iclass 16, count 0 2006.229.02:56:54.89#ibcon#flushed, iclass 16, count 0 2006.229.02:56:54.89#ibcon#about to write, iclass 16, count 0 2006.229.02:56:54.89#ibcon#wrote, iclass 16, count 0 2006.229.02:56:54.89#ibcon#about to read 3, iclass 16, count 0 2006.229.02:56:54.91#ibcon#read 3, iclass 16, count 0 2006.229.02:56:54.91#ibcon#about to read 4, iclass 16, count 0 2006.229.02:56:54.91#ibcon#read 4, iclass 16, count 0 2006.229.02:56:54.91#ibcon#about to read 5, iclass 16, count 0 2006.229.02:56:54.91#ibcon#read 5, iclass 16, count 0 2006.229.02:56:54.91#ibcon#about to read 6, iclass 16, count 0 2006.229.02:56:54.91#ibcon#read 6, iclass 16, count 0 2006.229.02:56:54.91#ibcon#end of sib2, iclass 16, count 0 2006.229.02:56:54.91#ibcon#*mode == 0, iclass 16, count 0 2006.229.02:56:54.91#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.02:56:54.91#ibcon#[27=USB\r\n] 2006.229.02:56:54.91#ibcon#*before write, iclass 16, count 0 2006.229.02:56:54.91#ibcon#enter sib2, iclass 16, count 0 2006.229.02:56:54.91#ibcon#flushed, iclass 16, count 0 2006.229.02:56:54.91#ibcon#about to write, iclass 16, count 0 2006.229.02:56:54.91#ibcon#wrote, iclass 16, count 0 2006.229.02:56:54.91#ibcon#about to read 3, iclass 16, count 0 2006.229.02:56:54.94#ibcon#read 3, iclass 16, count 0 2006.229.02:56:54.94#ibcon#about to read 4, iclass 16, count 0 2006.229.02:56:54.94#ibcon#read 4, iclass 16, count 0 2006.229.02:56:54.94#ibcon#about to read 5, iclass 16, count 0 2006.229.02:56:54.94#ibcon#read 5, iclass 16, count 0 2006.229.02:56:54.94#ibcon#about to read 6, iclass 16, count 0 2006.229.02:56:54.94#ibcon#read 6, iclass 16, count 0 2006.229.02:56:54.94#ibcon#end of sib2, iclass 16, count 0 2006.229.02:56:54.94#ibcon#*after write, iclass 16, count 0 2006.229.02:56:54.94#ibcon#*before return 0, iclass 16, count 0 2006.229.02:56:54.94#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:54.94#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.02:56:54.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.02:56:54.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.02:56:54.94$vck44/vabw=wide 2006.229.02:56:54.94#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.02:56:54.94#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.02:56:54.94#ibcon#ireg 8 cls_cnt 0 2006.229.02:56:54.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:54.94#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:54.94#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:54.94#ibcon#enter wrdev, iclass 18, count 0 2006.229.02:56:54.94#ibcon#first serial, iclass 18, count 0 2006.229.02:56:54.94#ibcon#enter sib2, iclass 18, count 0 2006.229.02:56:54.94#ibcon#flushed, iclass 18, count 0 2006.229.02:56:54.94#ibcon#about to write, iclass 18, count 0 2006.229.02:56:54.94#ibcon#wrote, iclass 18, count 0 2006.229.02:56:54.94#ibcon#about to read 3, iclass 18, count 0 2006.229.02:56:54.96#ibcon#read 3, iclass 18, count 0 2006.229.02:56:54.96#ibcon#about to read 4, iclass 18, count 0 2006.229.02:56:54.96#ibcon#read 4, iclass 18, count 0 2006.229.02:56:54.96#ibcon#about to read 5, iclass 18, count 0 2006.229.02:56:54.96#ibcon#read 5, iclass 18, count 0 2006.229.02:56:54.96#ibcon#about to read 6, iclass 18, count 0 2006.229.02:56:54.96#ibcon#read 6, iclass 18, count 0 2006.229.02:56:54.96#ibcon#end of sib2, iclass 18, count 0 2006.229.02:56:54.96#ibcon#*mode == 0, iclass 18, count 0 2006.229.02:56:54.96#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.02:56:54.96#ibcon#[25=BW32\r\n] 2006.229.02:56:54.96#ibcon#*before write, iclass 18, count 0 2006.229.02:56:54.96#ibcon#enter sib2, iclass 18, count 0 2006.229.02:56:54.96#ibcon#flushed, iclass 18, count 0 2006.229.02:56:54.96#ibcon#about to write, iclass 18, count 0 2006.229.02:56:54.96#ibcon#wrote, iclass 18, count 0 2006.229.02:56:54.96#ibcon#about to read 3, iclass 18, count 0 2006.229.02:56:54.99#ibcon#read 3, iclass 18, count 0 2006.229.02:56:54.99#ibcon#about to read 4, iclass 18, count 0 2006.229.02:56:54.99#ibcon#read 4, iclass 18, count 0 2006.229.02:56:54.99#ibcon#about to read 5, iclass 18, count 0 2006.229.02:56:54.99#ibcon#read 5, iclass 18, count 0 2006.229.02:56:54.99#ibcon#about to read 6, iclass 18, count 0 2006.229.02:56:54.99#ibcon#read 6, iclass 18, count 0 2006.229.02:56:54.99#ibcon#end of sib2, iclass 18, count 0 2006.229.02:56:54.99#ibcon#*after write, iclass 18, count 0 2006.229.02:56:54.99#ibcon#*before return 0, iclass 18, count 0 2006.229.02:56:54.99#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:54.99#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.02:56:54.99#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.02:56:54.99#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.02:56:54.99$vck44/vbbw=wide 2006.229.02:56:54.99#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.02:56:54.99#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.02:56:54.99#ibcon#ireg 8 cls_cnt 0 2006.229.02:56:54.99#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:56:55.06#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:56:55.06#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:56:55.06#ibcon#enter wrdev, iclass 20, count 0 2006.229.02:56:55.06#ibcon#first serial, iclass 20, count 0 2006.229.02:56:55.06#ibcon#enter sib2, iclass 20, count 0 2006.229.02:56:55.06#ibcon#flushed, iclass 20, count 0 2006.229.02:56:55.06#ibcon#about to write, iclass 20, count 0 2006.229.02:56:55.06#ibcon#wrote, iclass 20, count 0 2006.229.02:56:55.06#ibcon#about to read 3, iclass 20, count 0 2006.229.02:56:55.08#ibcon#read 3, iclass 20, count 0 2006.229.02:56:55.08#ibcon#about to read 4, iclass 20, count 0 2006.229.02:56:55.08#ibcon#read 4, iclass 20, count 0 2006.229.02:56:55.08#ibcon#about to read 5, iclass 20, count 0 2006.229.02:56:55.08#ibcon#read 5, iclass 20, count 0 2006.229.02:56:55.08#ibcon#about to read 6, iclass 20, count 0 2006.229.02:56:55.08#ibcon#read 6, iclass 20, count 0 2006.229.02:56:55.08#ibcon#end of sib2, iclass 20, count 0 2006.229.02:56:55.08#ibcon#*mode == 0, iclass 20, count 0 2006.229.02:56:55.08#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.02:56:55.08#ibcon#[27=BW32\r\n] 2006.229.02:56:55.08#ibcon#*before write, iclass 20, count 0 2006.229.02:56:55.08#ibcon#enter sib2, iclass 20, count 0 2006.229.02:56:55.08#ibcon#flushed, iclass 20, count 0 2006.229.02:56:55.08#ibcon#about to write, iclass 20, count 0 2006.229.02:56:55.08#ibcon#wrote, iclass 20, count 0 2006.229.02:56:55.08#ibcon#about to read 3, iclass 20, count 0 2006.229.02:56:55.11#ibcon#read 3, iclass 20, count 0 2006.229.02:56:55.11#ibcon#about to read 4, iclass 20, count 0 2006.229.02:56:55.11#ibcon#read 4, iclass 20, count 0 2006.229.02:56:55.11#ibcon#about to read 5, iclass 20, count 0 2006.229.02:56:55.11#ibcon#read 5, iclass 20, count 0 2006.229.02:56:55.11#ibcon#about to read 6, iclass 20, count 0 2006.229.02:56:55.11#ibcon#read 6, iclass 20, count 0 2006.229.02:56:55.11#ibcon#end of sib2, iclass 20, count 0 2006.229.02:56:55.11#ibcon#*after write, iclass 20, count 0 2006.229.02:56:55.11#ibcon#*before return 0, iclass 20, count 0 2006.229.02:56:55.11#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:56:55.11#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.02:56:55.11#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.02:56:55.11#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.02:56:55.11$setupk4/ifdk4 2006.229.02:56:55.11$ifdk4/lo= 2006.229.02:56:55.11$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.02:56:55.11$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.02:56:55.11$ifdk4/patch= 2006.229.02:56:55.11$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.02:56:55.11$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.02:56:55.11$setupk4/!*+20s 2006.229.02:56:58.43#abcon#<5=/05 2.8 5.6 28.371001000.9\r\n> 2006.229.02:56:58.45#abcon#{5=INTERFACE CLEAR} 2006.229.02:56:58.51#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:57:08.60#abcon#<5=/05 2.7 5.7 28.371001000.9\r\n> 2006.229.02:57:08.62#abcon#{5=INTERFACE CLEAR} 2006.229.02:57:08.68#abcon#[5=S1D000X0/0*\r\n] 2006.229.02:57:09.62$setupk4/"tpicd 2006.229.02:57:09.62$setupk4/echo=off 2006.229.02:57:09.62$setupk4/xlog=off 2006.229.02:57:09.62:!2006.229.03:05:40 2006.229.02:57:11.14#trakl#Source acquired 2006.229.02:57:12.14#flagr#flagr/antenna,acquired 2006.229.03:05:40.00:preob 2006.229.03:05:40.14/onsource/TRACKING 2006.229.03:05:40.14:!2006.229.03:05:50 2006.229.03:05:50.00:"tape 2006.229.03:05:50.00:"st=record 2006.229.03:05:50.00:data_valid=on 2006.229.03:05:50.00:midob 2006.229.03:05:51.14/onsource/TRACKING 2006.229.03:05:51.14/wx/28.54,1000.8,100 2006.229.03:05:51.22/cable/+6.4071E-03 2006.229.03:05:52.31/va/01,08,usb,yes,33,35 2006.229.03:05:52.31/va/02,07,usb,yes,36,36 2006.229.03:05:52.31/va/03,06,usb,yes,44,47 2006.229.03:05:52.31/va/04,07,usb,yes,37,38 2006.229.03:05:52.31/va/05,04,usb,yes,33,33 2006.229.03:05:52.31/va/06,04,usb,yes,37,36 2006.229.03:05:52.31/va/07,05,usb,yes,33,33 2006.229.03:05:52.31/va/08,06,usb,yes,24,29 2006.229.03:05:52.54/valo/01,524.99,yes,locked 2006.229.03:05:52.54/valo/02,534.99,yes,locked 2006.229.03:05:52.54/valo/03,564.99,yes,locked 2006.229.03:05:52.54/valo/04,624.99,yes,locked 2006.229.03:05:52.54/valo/05,734.99,yes,locked 2006.229.03:05:52.54/valo/06,814.99,yes,locked 2006.229.03:05:52.54/valo/07,864.99,yes,locked 2006.229.03:05:52.54/valo/08,884.99,yes,locked 2006.229.03:05:53.63/vb/01,04,usb,yes,33,31 2006.229.03:05:53.63/vb/02,04,usb,yes,35,35 2006.229.03:05:53.63/vb/03,04,usb,yes,32,36 2006.229.03:05:53.63/vb/04,04,usb,yes,37,36 2006.229.03:05:53.63/vb/05,04,usb,yes,29,32 2006.229.03:05:53.63/vb/06,04,usb,yes,34,30 2006.229.03:05:53.63/vb/07,04,usb,yes,34,33 2006.229.03:05:53.63/vb/08,04,usb,yes,31,34 2006.229.03:05:53.86/vblo/01,629.99,yes,locked 2006.229.03:05:53.86/vblo/02,634.99,yes,locked 2006.229.03:05:53.86/vblo/03,649.99,yes,locked 2006.229.03:05:53.86/vblo/04,679.99,yes,locked 2006.229.03:05:53.86/vblo/05,709.99,yes,locked 2006.229.03:05:53.86/vblo/06,719.99,yes,locked 2006.229.03:05:53.86/vblo/07,734.99,yes,locked 2006.229.03:05:53.86/vblo/08,744.99,yes,locked 2006.229.03:05:54.01/vabw/8 2006.229.03:05:54.16/vbbw/8 2006.229.03:05:54.25/xfe/off,on,12.0 2006.229.03:05:54.64/ifatt/23,28,28,28 2006.229.03:05:55.08/fmout-gps/S +4.51E-07 2006.229.03:05:55.12:!2006.229.03:06:30 2006.229.03:06:30.00:data_valid=off 2006.229.03:06:30.00:"et 2006.229.03:06:30.00:!+3s 2006.229.03:06:33.02:"tape 2006.229.03:06:33.02:postob 2006.229.03:06:33.19/cable/+6.4068E-03 2006.229.03:06:33.19/wx/28.52,1000.8,100 2006.229.03:06:34.08/fmout-gps/S +4.52E-07 2006.229.03:06:34.08:scan_name=229-0309,jd0608,210 2006.229.03:06:34.08:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.03:06:35.14#flagr#flagr/antenna,new-source 2006.229.03:06:35.14:checkk5 2006.229.03:06:35.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:06:35.85/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:06:36.20/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:06:36.55/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:06:36.89/chk_obsdata//k5ts1/T2290305??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.03:06:37.23/chk_obsdata//k5ts2/T2290305??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.03:06:37.58/chk_obsdata//k5ts3/T2290305??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.03:06:37.93/chk_obsdata//k5ts4/T2290305??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.03:06:38.60/k5log//k5ts1_log_newline 2006.229.03:06:39.25/k5log//k5ts2_log_newline 2006.229.03:06:39.90/k5log//k5ts3_log_newline 2006.229.03:06:40.57/k5log//k5ts4_log_newline 2006.229.03:06:40.59/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:06:40.59:setupk4=1 2006.229.03:06:40.59$setupk4/echo=on 2006.229.03:06:40.59$setupk4/pcalon 2006.229.03:06:40.59$pcalon/"no phase cal control is implemented here 2006.229.03:06:40.59$setupk4/"tpicd=stop 2006.229.03:06:40.59$setupk4/"rec=synch_on 2006.229.03:06:40.59$setupk4/"rec_mode=128 2006.229.03:06:40.59$setupk4/!* 2006.229.03:06:40.59$setupk4/recpk4 2006.229.03:06:40.59$recpk4/recpatch= 2006.229.03:06:40.59$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:06:40.59$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:06:40.59$setupk4/vck44 2006.229.03:06:40.59$vck44/valo=1,524.99 2006.229.03:06:40.59#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.03:06:40.59#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.03:06:40.59#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:40.59#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:40.59#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:40.59#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:40.59#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:06:40.59#ibcon#first serial, iclass 3, count 0 2006.229.03:06:40.59#ibcon#enter sib2, iclass 3, count 0 2006.229.03:06:40.59#ibcon#flushed, iclass 3, count 0 2006.229.03:06:40.59#ibcon#about to write, iclass 3, count 0 2006.229.03:06:40.59#ibcon#wrote, iclass 3, count 0 2006.229.03:06:40.59#ibcon#about to read 3, iclass 3, count 0 2006.229.03:06:40.61#ibcon#read 3, iclass 3, count 0 2006.229.03:06:40.61#ibcon#about to read 4, iclass 3, count 0 2006.229.03:06:40.61#ibcon#read 4, iclass 3, count 0 2006.229.03:06:40.61#ibcon#about to read 5, iclass 3, count 0 2006.229.03:06:40.61#ibcon#read 5, iclass 3, count 0 2006.229.03:06:40.61#ibcon#about to read 6, iclass 3, count 0 2006.229.03:06:40.61#ibcon#read 6, iclass 3, count 0 2006.229.03:06:40.61#ibcon#end of sib2, iclass 3, count 0 2006.229.03:06:40.61#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:06:40.61#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:06:40.61#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:06:40.61#ibcon#*before write, iclass 3, count 0 2006.229.03:06:40.61#ibcon#enter sib2, iclass 3, count 0 2006.229.03:06:40.61#ibcon#flushed, iclass 3, count 0 2006.229.03:06:40.61#ibcon#about to write, iclass 3, count 0 2006.229.03:06:40.61#ibcon#wrote, iclass 3, count 0 2006.229.03:06:40.61#ibcon#about to read 3, iclass 3, count 0 2006.229.03:06:40.66#ibcon#read 3, iclass 3, count 0 2006.229.03:06:40.66#ibcon#about to read 4, iclass 3, count 0 2006.229.03:06:40.66#ibcon#read 4, iclass 3, count 0 2006.229.03:06:40.66#ibcon#about to read 5, iclass 3, count 0 2006.229.03:06:40.66#ibcon#read 5, iclass 3, count 0 2006.229.03:06:40.66#ibcon#about to read 6, iclass 3, count 0 2006.229.03:06:40.66#ibcon#read 6, iclass 3, count 0 2006.229.03:06:40.66#ibcon#end of sib2, iclass 3, count 0 2006.229.03:06:40.66#ibcon#*after write, iclass 3, count 0 2006.229.03:06:40.66#ibcon#*before return 0, iclass 3, count 0 2006.229.03:06:40.66#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:40.66#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:40.66#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:06:40.66#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:06:40.66$vck44/va=1,8 2006.229.03:06:40.66#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.03:06:40.66#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.03:06:40.66#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:40.66#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:40.66#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:40.66#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:40.66#ibcon#enter wrdev, iclass 5, count 2 2006.229.03:06:40.66#ibcon#first serial, iclass 5, count 2 2006.229.03:06:40.66#ibcon#enter sib2, iclass 5, count 2 2006.229.03:06:40.66#ibcon#flushed, iclass 5, count 2 2006.229.03:06:40.66#ibcon#about to write, iclass 5, count 2 2006.229.03:06:40.66#ibcon#wrote, iclass 5, count 2 2006.229.03:06:40.66#ibcon#about to read 3, iclass 5, count 2 2006.229.03:06:40.68#ibcon#read 3, iclass 5, count 2 2006.229.03:06:40.68#ibcon#about to read 4, iclass 5, count 2 2006.229.03:06:40.68#ibcon#read 4, iclass 5, count 2 2006.229.03:06:40.68#ibcon#about to read 5, iclass 5, count 2 2006.229.03:06:40.68#ibcon#read 5, iclass 5, count 2 2006.229.03:06:40.68#ibcon#about to read 6, iclass 5, count 2 2006.229.03:06:40.68#ibcon#read 6, iclass 5, count 2 2006.229.03:06:40.68#ibcon#end of sib2, iclass 5, count 2 2006.229.03:06:40.68#ibcon#*mode == 0, iclass 5, count 2 2006.229.03:06:40.68#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.03:06:40.68#ibcon#[25=AT01-08\r\n] 2006.229.03:06:40.68#ibcon#*before write, iclass 5, count 2 2006.229.03:06:40.68#ibcon#enter sib2, iclass 5, count 2 2006.229.03:06:40.68#ibcon#flushed, iclass 5, count 2 2006.229.03:06:40.68#ibcon#about to write, iclass 5, count 2 2006.229.03:06:40.68#ibcon#wrote, iclass 5, count 2 2006.229.03:06:40.68#ibcon#about to read 3, iclass 5, count 2 2006.229.03:06:40.71#ibcon#read 3, iclass 5, count 2 2006.229.03:06:40.71#ibcon#about to read 4, iclass 5, count 2 2006.229.03:06:40.71#ibcon#read 4, iclass 5, count 2 2006.229.03:06:40.71#ibcon#about to read 5, iclass 5, count 2 2006.229.03:06:40.71#ibcon#read 5, iclass 5, count 2 2006.229.03:06:40.71#ibcon#about to read 6, iclass 5, count 2 2006.229.03:06:40.71#ibcon#read 6, iclass 5, count 2 2006.229.03:06:40.71#ibcon#end of sib2, iclass 5, count 2 2006.229.03:06:40.71#ibcon#*after write, iclass 5, count 2 2006.229.03:06:40.71#ibcon#*before return 0, iclass 5, count 2 2006.229.03:06:40.71#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:40.71#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:40.71#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.03:06:40.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:40.71#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:40.83#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:40.83#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:40.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:06:40.83#ibcon#first serial, iclass 5, count 0 2006.229.03:06:40.83#ibcon#enter sib2, iclass 5, count 0 2006.229.03:06:40.83#ibcon#flushed, iclass 5, count 0 2006.229.03:06:40.83#ibcon#about to write, iclass 5, count 0 2006.229.03:06:40.83#ibcon#wrote, iclass 5, count 0 2006.229.03:06:40.83#ibcon#about to read 3, iclass 5, count 0 2006.229.03:06:40.85#ibcon#read 3, iclass 5, count 0 2006.229.03:06:40.85#ibcon#about to read 4, iclass 5, count 0 2006.229.03:06:40.85#ibcon#read 4, iclass 5, count 0 2006.229.03:06:40.85#ibcon#about to read 5, iclass 5, count 0 2006.229.03:06:40.85#ibcon#read 5, iclass 5, count 0 2006.229.03:06:40.85#ibcon#about to read 6, iclass 5, count 0 2006.229.03:06:40.85#ibcon#read 6, iclass 5, count 0 2006.229.03:06:40.85#ibcon#end of sib2, iclass 5, count 0 2006.229.03:06:40.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:06:40.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:06:40.85#ibcon#[25=USB\r\n] 2006.229.03:06:40.85#ibcon#*before write, iclass 5, count 0 2006.229.03:06:40.85#ibcon#enter sib2, iclass 5, count 0 2006.229.03:06:40.85#ibcon#flushed, iclass 5, count 0 2006.229.03:06:40.85#ibcon#about to write, iclass 5, count 0 2006.229.03:06:40.85#ibcon#wrote, iclass 5, count 0 2006.229.03:06:40.85#ibcon#about to read 3, iclass 5, count 0 2006.229.03:06:40.88#ibcon#read 3, iclass 5, count 0 2006.229.03:06:40.88#ibcon#about to read 4, iclass 5, count 0 2006.229.03:06:40.88#ibcon#read 4, iclass 5, count 0 2006.229.03:06:40.88#ibcon#about to read 5, iclass 5, count 0 2006.229.03:06:40.88#ibcon#read 5, iclass 5, count 0 2006.229.03:06:40.88#ibcon#about to read 6, iclass 5, count 0 2006.229.03:06:40.88#ibcon#read 6, iclass 5, count 0 2006.229.03:06:40.88#ibcon#end of sib2, iclass 5, count 0 2006.229.03:06:40.88#ibcon#*after write, iclass 5, count 0 2006.229.03:06:40.88#ibcon#*before return 0, iclass 5, count 0 2006.229.03:06:40.88#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:40.88#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:40.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:06:40.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:06:40.88$vck44/valo=2,534.99 2006.229.03:06:40.88#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.03:06:40.88#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.03:06:40.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:40.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:40.88#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:40.88#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:40.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:06:40.88#ibcon#first serial, iclass 7, count 0 2006.229.03:06:40.88#ibcon#enter sib2, iclass 7, count 0 2006.229.03:06:40.88#ibcon#flushed, iclass 7, count 0 2006.229.03:06:40.88#ibcon#about to write, iclass 7, count 0 2006.229.03:06:40.88#ibcon#wrote, iclass 7, count 0 2006.229.03:06:40.88#ibcon#about to read 3, iclass 7, count 0 2006.229.03:06:40.90#ibcon#read 3, iclass 7, count 0 2006.229.03:06:40.90#ibcon#about to read 4, iclass 7, count 0 2006.229.03:06:40.90#ibcon#read 4, iclass 7, count 0 2006.229.03:06:40.90#ibcon#about to read 5, iclass 7, count 0 2006.229.03:06:40.90#ibcon#read 5, iclass 7, count 0 2006.229.03:06:40.90#ibcon#about to read 6, iclass 7, count 0 2006.229.03:06:40.90#ibcon#read 6, iclass 7, count 0 2006.229.03:06:40.90#ibcon#end of sib2, iclass 7, count 0 2006.229.03:06:40.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:06:40.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:06:40.90#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:06:40.90#ibcon#*before write, iclass 7, count 0 2006.229.03:06:40.90#ibcon#enter sib2, iclass 7, count 0 2006.229.03:06:40.90#ibcon#flushed, iclass 7, count 0 2006.229.03:06:40.90#ibcon#about to write, iclass 7, count 0 2006.229.03:06:40.90#ibcon#wrote, iclass 7, count 0 2006.229.03:06:40.90#ibcon#about to read 3, iclass 7, count 0 2006.229.03:06:40.94#ibcon#read 3, iclass 7, count 0 2006.229.03:06:40.94#ibcon#about to read 4, iclass 7, count 0 2006.229.03:06:40.94#ibcon#read 4, iclass 7, count 0 2006.229.03:06:40.94#ibcon#about to read 5, iclass 7, count 0 2006.229.03:06:40.94#ibcon#read 5, iclass 7, count 0 2006.229.03:06:40.94#ibcon#about to read 6, iclass 7, count 0 2006.229.03:06:40.94#ibcon#read 6, iclass 7, count 0 2006.229.03:06:40.94#ibcon#end of sib2, iclass 7, count 0 2006.229.03:06:40.94#ibcon#*after write, iclass 7, count 0 2006.229.03:06:40.94#ibcon#*before return 0, iclass 7, count 0 2006.229.03:06:40.94#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:40.94#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:40.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:06:40.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:06:40.94$vck44/va=2,7 2006.229.03:06:40.94#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.03:06:40.94#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.03:06:40.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:40.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:41.00#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:41.00#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:41.00#ibcon#enter wrdev, iclass 11, count 2 2006.229.03:06:41.00#ibcon#first serial, iclass 11, count 2 2006.229.03:06:41.00#ibcon#enter sib2, iclass 11, count 2 2006.229.03:06:41.00#ibcon#flushed, iclass 11, count 2 2006.229.03:06:41.00#ibcon#about to write, iclass 11, count 2 2006.229.03:06:41.00#ibcon#wrote, iclass 11, count 2 2006.229.03:06:41.00#ibcon#about to read 3, iclass 11, count 2 2006.229.03:06:41.02#ibcon#read 3, iclass 11, count 2 2006.229.03:06:41.02#ibcon#about to read 4, iclass 11, count 2 2006.229.03:06:41.02#ibcon#read 4, iclass 11, count 2 2006.229.03:06:41.02#ibcon#about to read 5, iclass 11, count 2 2006.229.03:06:41.02#ibcon#read 5, iclass 11, count 2 2006.229.03:06:41.02#ibcon#about to read 6, iclass 11, count 2 2006.229.03:06:41.02#ibcon#read 6, iclass 11, count 2 2006.229.03:06:41.02#ibcon#end of sib2, iclass 11, count 2 2006.229.03:06:41.02#ibcon#*mode == 0, iclass 11, count 2 2006.229.03:06:41.02#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.03:06:41.02#ibcon#[25=AT02-07\r\n] 2006.229.03:06:41.02#ibcon#*before write, iclass 11, count 2 2006.229.03:06:41.02#ibcon#enter sib2, iclass 11, count 2 2006.229.03:06:41.02#ibcon#flushed, iclass 11, count 2 2006.229.03:06:41.02#ibcon#about to write, iclass 11, count 2 2006.229.03:06:41.02#ibcon#wrote, iclass 11, count 2 2006.229.03:06:41.02#ibcon#about to read 3, iclass 11, count 2 2006.229.03:06:41.05#ibcon#read 3, iclass 11, count 2 2006.229.03:06:41.05#ibcon#about to read 4, iclass 11, count 2 2006.229.03:06:41.05#ibcon#read 4, iclass 11, count 2 2006.229.03:06:41.05#ibcon#about to read 5, iclass 11, count 2 2006.229.03:06:41.05#ibcon#read 5, iclass 11, count 2 2006.229.03:06:41.05#ibcon#about to read 6, iclass 11, count 2 2006.229.03:06:41.05#ibcon#read 6, iclass 11, count 2 2006.229.03:06:41.05#ibcon#end of sib2, iclass 11, count 2 2006.229.03:06:41.05#ibcon#*after write, iclass 11, count 2 2006.229.03:06:41.05#ibcon#*before return 0, iclass 11, count 2 2006.229.03:06:41.05#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:41.05#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:41.05#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.03:06:41.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:41.05#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:41.17#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:41.17#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:41.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:06:41.17#ibcon#first serial, iclass 11, count 0 2006.229.03:06:41.17#ibcon#enter sib2, iclass 11, count 0 2006.229.03:06:41.17#ibcon#flushed, iclass 11, count 0 2006.229.03:06:41.17#ibcon#about to write, iclass 11, count 0 2006.229.03:06:41.17#ibcon#wrote, iclass 11, count 0 2006.229.03:06:41.17#ibcon#about to read 3, iclass 11, count 0 2006.229.03:06:41.19#ibcon#read 3, iclass 11, count 0 2006.229.03:06:41.19#ibcon#about to read 4, iclass 11, count 0 2006.229.03:06:41.19#ibcon#read 4, iclass 11, count 0 2006.229.03:06:41.19#ibcon#about to read 5, iclass 11, count 0 2006.229.03:06:41.19#ibcon#read 5, iclass 11, count 0 2006.229.03:06:41.19#ibcon#about to read 6, iclass 11, count 0 2006.229.03:06:41.19#ibcon#read 6, iclass 11, count 0 2006.229.03:06:41.19#ibcon#end of sib2, iclass 11, count 0 2006.229.03:06:41.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:06:41.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:06:41.19#ibcon#[25=USB\r\n] 2006.229.03:06:41.19#ibcon#*before write, iclass 11, count 0 2006.229.03:06:41.19#ibcon#enter sib2, iclass 11, count 0 2006.229.03:06:41.19#ibcon#flushed, iclass 11, count 0 2006.229.03:06:41.19#ibcon#about to write, iclass 11, count 0 2006.229.03:06:41.19#ibcon#wrote, iclass 11, count 0 2006.229.03:06:41.19#ibcon#about to read 3, iclass 11, count 0 2006.229.03:06:41.22#ibcon#read 3, iclass 11, count 0 2006.229.03:06:41.22#ibcon#about to read 4, iclass 11, count 0 2006.229.03:06:41.22#ibcon#read 4, iclass 11, count 0 2006.229.03:06:41.22#ibcon#about to read 5, iclass 11, count 0 2006.229.03:06:41.22#ibcon#read 5, iclass 11, count 0 2006.229.03:06:41.22#ibcon#about to read 6, iclass 11, count 0 2006.229.03:06:41.22#ibcon#read 6, iclass 11, count 0 2006.229.03:06:41.22#ibcon#end of sib2, iclass 11, count 0 2006.229.03:06:41.22#ibcon#*after write, iclass 11, count 0 2006.229.03:06:41.22#ibcon#*before return 0, iclass 11, count 0 2006.229.03:06:41.22#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:41.22#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:41.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:06:41.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:06:41.22$vck44/valo=3,564.99 2006.229.03:06:41.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.03:06:41.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.03:06:41.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:41.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:41.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:41.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:41.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:06:41.22#ibcon#first serial, iclass 13, count 0 2006.229.03:06:41.22#ibcon#enter sib2, iclass 13, count 0 2006.229.03:06:41.22#ibcon#flushed, iclass 13, count 0 2006.229.03:06:41.22#ibcon#about to write, iclass 13, count 0 2006.229.03:06:41.22#ibcon#wrote, iclass 13, count 0 2006.229.03:06:41.22#ibcon#about to read 3, iclass 13, count 0 2006.229.03:06:41.24#ibcon#read 3, iclass 13, count 0 2006.229.03:06:41.24#ibcon#about to read 4, iclass 13, count 0 2006.229.03:06:41.24#ibcon#read 4, iclass 13, count 0 2006.229.03:06:41.24#ibcon#about to read 5, iclass 13, count 0 2006.229.03:06:41.24#ibcon#read 5, iclass 13, count 0 2006.229.03:06:41.24#ibcon#about to read 6, iclass 13, count 0 2006.229.03:06:41.24#ibcon#read 6, iclass 13, count 0 2006.229.03:06:41.24#ibcon#end of sib2, iclass 13, count 0 2006.229.03:06:41.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:06:41.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:06:41.24#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:06:41.24#ibcon#*before write, iclass 13, count 0 2006.229.03:06:41.24#ibcon#enter sib2, iclass 13, count 0 2006.229.03:06:41.24#ibcon#flushed, iclass 13, count 0 2006.229.03:06:41.24#ibcon#about to write, iclass 13, count 0 2006.229.03:06:41.24#ibcon#wrote, iclass 13, count 0 2006.229.03:06:41.24#ibcon#about to read 3, iclass 13, count 0 2006.229.03:06:41.28#ibcon#read 3, iclass 13, count 0 2006.229.03:06:41.28#ibcon#about to read 4, iclass 13, count 0 2006.229.03:06:41.28#ibcon#read 4, iclass 13, count 0 2006.229.03:06:41.28#ibcon#about to read 5, iclass 13, count 0 2006.229.03:06:41.28#ibcon#read 5, iclass 13, count 0 2006.229.03:06:41.28#ibcon#about to read 6, iclass 13, count 0 2006.229.03:06:41.28#ibcon#read 6, iclass 13, count 0 2006.229.03:06:41.28#ibcon#end of sib2, iclass 13, count 0 2006.229.03:06:41.28#ibcon#*after write, iclass 13, count 0 2006.229.03:06:41.28#ibcon#*before return 0, iclass 13, count 0 2006.229.03:06:41.28#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:41.28#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:41.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:06:41.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:06:41.28$vck44/va=3,6 2006.229.03:06:41.28#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.03:06:41.28#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.03:06:41.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:41.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:41.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:41.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:41.34#ibcon#enter wrdev, iclass 15, count 2 2006.229.03:06:41.34#ibcon#first serial, iclass 15, count 2 2006.229.03:06:41.34#ibcon#enter sib2, iclass 15, count 2 2006.229.03:06:41.34#ibcon#flushed, iclass 15, count 2 2006.229.03:06:41.34#ibcon#about to write, iclass 15, count 2 2006.229.03:06:41.34#ibcon#wrote, iclass 15, count 2 2006.229.03:06:41.34#ibcon#about to read 3, iclass 15, count 2 2006.229.03:06:41.36#ibcon#read 3, iclass 15, count 2 2006.229.03:06:41.36#ibcon#about to read 4, iclass 15, count 2 2006.229.03:06:41.36#ibcon#read 4, iclass 15, count 2 2006.229.03:06:41.36#ibcon#about to read 5, iclass 15, count 2 2006.229.03:06:41.36#ibcon#read 5, iclass 15, count 2 2006.229.03:06:41.36#ibcon#about to read 6, iclass 15, count 2 2006.229.03:06:41.36#ibcon#read 6, iclass 15, count 2 2006.229.03:06:41.36#ibcon#end of sib2, iclass 15, count 2 2006.229.03:06:41.36#ibcon#*mode == 0, iclass 15, count 2 2006.229.03:06:41.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.03:06:41.36#ibcon#[25=AT03-06\r\n] 2006.229.03:06:41.36#ibcon#*before write, iclass 15, count 2 2006.229.03:06:41.36#ibcon#enter sib2, iclass 15, count 2 2006.229.03:06:41.36#ibcon#flushed, iclass 15, count 2 2006.229.03:06:41.36#ibcon#about to write, iclass 15, count 2 2006.229.03:06:41.36#ibcon#wrote, iclass 15, count 2 2006.229.03:06:41.36#ibcon#about to read 3, iclass 15, count 2 2006.229.03:06:41.39#ibcon#read 3, iclass 15, count 2 2006.229.03:06:41.39#ibcon#about to read 4, iclass 15, count 2 2006.229.03:06:41.39#ibcon#read 4, iclass 15, count 2 2006.229.03:06:41.39#ibcon#about to read 5, iclass 15, count 2 2006.229.03:06:41.39#ibcon#read 5, iclass 15, count 2 2006.229.03:06:41.39#ibcon#about to read 6, iclass 15, count 2 2006.229.03:06:41.39#ibcon#read 6, iclass 15, count 2 2006.229.03:06:41.39#ibcon#end of sib2, iclass 15, count 2 2006.229.03:06:41.39#ibcon#*after write, iclass 15, count 2 2006.229.03:06:41.39#ibcon#*before return 0, iclass 15, count 2 2006.229.03:06:41.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:41.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:41.39#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.03:06:41.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:41.39#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:41.51#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:41.51#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:41.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:06:41.51#ibcon#first serial, iclass 15, count 0 2006.229.03:06:41.51#ibcon#enter sib2, iclass 15, count 0 2006.229.03:06:41.51#ibcon#flushed, iclass 15, count 0 2006.229.03:06:41.51#ibcon#about to write, iclass 15, count 0 2006.229.03:06:41.51#ibcon#wrote, iclass 15, count 0 2006.229.03:06:41.51#ibcon#about to read 3, iclass 15, count 0 2006.229.03:06:41.53#ibcon#read 3, iclass 15, count 0 2006.229.03:06:41.53#ibcon#about to read 4, iclass 15, count 0 2006.229.03:06:41.53#ibcon#read 4, iclass 15, count 0 2006.229.03:06:41.53#ibcon#about to read 5, iclass 15, count 0 2006.229.03:06:41.53#ibcon#read 5, iclass 15, count 0 2006.229.03:06:41.53#ibcon#about to read 6, iclass 15, count 0 2006.229.03:06:41.53#ibcon#read 6, iclass 15, count 0 2006.229.03:06:41.53#ibcon#end of sib2, iclass 15, count 0 2006.229.03:06:41.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:06:41.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:06:41.53#ibcon#[25=USB\r\n] 2006.229.03:06:41.53#ibcon#*before write, iclass 15, count 0 2006.229.03:06:41.53#ibcon#enter sib2, iclass 15, count 0 2006.229.03:06:41.53#ibcon#flushed, iclass 15, count 0 2006.229.03:06:41.53#ibcon#about to write, iclass 15, count 0 2006.229.03:06:41.53#ibcon#wrote, iclass 15, count 0 2006.229.03:06:41.53#ibcon#about to read 3, iclass 15, count 0 2006.229.03:06:41.56#ibcon#read 3, iclass 15, count 0 2006.229.03:06:41.56#ibcon#about to read 4, iclass 15, count 0 2006.229.03:06:41.56#ibcon#read 4, iclass 15, count 0 2006.229.03:06:41.56#ibcon#about to read 5, iclass 15, count 0 2006.229.03:06:41.56#ibcon#read 5, iclass 15, count 0 2006.229.03:06:41.56#ibcon#about to read 6, iclass 15, count 0 2006.229.03:06:41.56#ibcon#read 6, iclass 15, count 0 2006.229.03:06:41.56#ibcon#end of sib2, iclass 15, count 0 2006.229.03:06:41.56#ibcon#*after write, iclass 15, count 0 2006.229.03:06:41.56#ibcon#*before return 0, iclass 15, count 0 2006.229.03:06:41.56#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:41.56#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:41.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:06:41.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:06:41.56$vck44/valo=4,624.99 2006.229.03:06:41.56#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.03:06:41.56#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.03:06:41.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:41.56#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:41.56#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:41.56#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:41.56#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:06:41.56#ibcon#first serial, iclass 17, count 0 2006.229.03:06:41.56#ibcon#enter sib2, iclass 17, count 0 2006.229.03:06:41.56#ibcon#flushed, iclass 17, count 0 2006.229.03:06:41.56#ibcon#about to write, iclass 17, count 0 2006.229.03:06:41.56#ibcon#wrote, iclass 17, count 0 2006.229.03:06:41.56#ibcon#about to read 3, iclass 17, count 0 2006.229.03:06:41.58#ibcon#read 3, iclass 17, count 0 2006.229.03:06:41.58#ibcon#about to read 4, iclass 17, count 0 2006.229.03:06:41.58#ibcon#read 4, iclass 17, count 0 2006.229.03:06:41.58#ibcon#about to read 5, iclass 17, count 0 2006.229.03:06:41.58#ibcon#read 5, iclass 17, count 0 2006.229.03:06:41.58#ibcon#about to read 6, iclass 17, count 0 2006.229.03:06:41.58#ibcon#read 6, iclass 17, count 0 2006.229.03:06:41.58#ibcon#end of sib2, iclass 17, count 0 2006.229.03:06:41.58#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:06:41.58#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:06:41.58#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:06:41.58#ibcon#*before write, iclass 17, count 0 2006.229.03:06:41.58#ibcon#enter sib2, iclass 17, count 0 2006.229.03:06:41.58#ibcon#flushed, iclass 17, count 0 2006.229.03:06:41.58#ibcon#about to write, iclass 17, count 0 2006.229.03:06:41.58#ibcon#wrote, iclass 17, count 0 2006.229.03:06:41.58#ibcon#about to read 3, iclass 17, count 0 2006.229.03:06:41.62#ibcon#read 3, iclass 17, count 0 2006.229.03:06:41.62#ibcon#about to read 4, iclass 17, count 0 2006.229.03:06:41.62#ibcon#read 4, iclass 17, count 0 2006.229.03:06:41.62#ibcon#about to read 5, iclass 17, count 0 2006.229.03:06:41.62#ibcon#read 5, iclass 17, count 0 2006.229.03:06:41.62#ibcon#about to read 6, iclass 17, count 0 2006.229.03:06:41.62#ibcon#read 6, iclass 17, count 0 2006.229.03:06:41.62#ibcon#end of sib2, iclass 17, count 0 2006.229.03:06:41.62#ibcon#*after write, iclass 17, count 0 2006.229.03:06:41.62#ibcon#*before return 0, iclass 17, count 0 2006.229.03:06:41.62#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:41.62#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:41.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:06:41.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:06:41.62$vck44/va=4,7 2006.229.03:06:41.62#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.03:06:41.62#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.03:06:41.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:41.62#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:41.68#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:41.68#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:41.68#ibcon#enter wrdev, iclass 19, count 2 2006.229.03:06:41.68#ibcon#first serial, iclass 19, count 2 2006.229.03:06:41.68#ibcon#enter sib2, iclass 19, count 2 2006.229.03:06:41.68#ibcon#flushed, iclass 19, count 2 2006.229.03:06:41.68#ibcon#about to write, iclass 19, count 2 2006.229.03:06:41.68#ibcon#wrote, iclass 19, count 2 2006.229.03:06:41.68#ibcon#about to read 3, iclass 19, count 2 2006.229.03:06:41.70#ibcon#read 3, iclass 19, count 2 2006.229.03:06:41.70#ibcon#about to read 4, iclass 19, count 2 2006.229.03:06:41.70#ibcon#read 4, iclass 19, count 2 2006.229.03:06:41.70#ibcon#about to read 5, iclass 19, count 2 2006.229.03:06:41.70#ibcon#read 5, iclass 19, count 2 2006.229.03:06:41.70#ibcon#about to read 6, iclass 19, count 2 2006.229.03:06:41.70#ibcon#read 6, iclass 19, count 2 2006.229.03:06:41.70#ibcon#end of sib2, iclass 19, count 2 2006.229.03:06:41.70#ibcon#*mode == 0, iclass 19, count 2 2006.229.03:06:41.70#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.03:06:41.70#ibcon#[25=AT04-07\r\n] 2006.229.03:06:41.70#ibcon#*before write, iclass 19, count 2 2006.229.03:06:41.70#ibcon#enter sib2, iclass 19, count 2 2006.229.03:06:41.70#ibcon#flushed, iclass 19, count 2 2006.229.03:06:41.70#ibcon#about to write, iclass 19, count 2 2006.229.03:06:41.70#ibcon#wrote, iclass 19, count 2 2006.229.03:06:41.70#ibcon#about to read 3, iclass 19, count 2 2006.229.03:06:41.73#ibcon#read 3, iclass 19, count 2 2006.229.03:06:41.73#ibcon#about to read 4, iclass 19, count 2 2006.229.03:06:41.73#ibcon#read 4, iclass 19, count 2 2006.229.03:06:41.73#ibcon#about to read 5, iclass 19, count 2 2006.229.03:06:41.73#ibcon#read 5, iclass 19, count 2 2006.229.03:06:41.73#ibcon#about to read 6, iclass 19, count 2 2006.229.03:06:41.73#ibcon#read 6, iclass 19, count 2 2006.229.03:06:41.73#ibcon#end of sib2, iclass 19, count 2 2006.229.03:06:41.73#ibcon#*after write, iclass 19, count 2 2006.229.03:06:41.73#ibcon#*before return 0, iclass 19, count 2 2006.229.03:06:41.73#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:41.73#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:41.73#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.03:06:41.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:41.73#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:41.85#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:41.85#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:41.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:06:41.85#ibcon#first serial, iclass 19, count 0 2006.229.03:06:41.85#ibcon#enter sib2, iclass 19, count 0 2006.229.03:06:41.85#ibcon#flushed, iclass 19, count 0 2006.229.03:06:41.85#ibcon#about to write, iclass 19, count 0 2006.229.03:06:41.85#ibcon#wrote, iclass 19, count 0 2006.229.03:06:41.85#ibcon#about to read 3, iclass 19, count 0 2006.229.03:06:41.87#ibcon#read 3, iclass 19, count 0 2006.229.03:06:41.87#ibcon#about to read 4, iclass 19, count 0 2006.229.03:06:41.87#ibcon#read 4, iclass 19, count 0 2006.229.03:06:41.87#ibcon#about to read 5, iclass 19, count 0 2006.229.03:06:41.87#ibcon#read 5, iclass 19, count 0 2006.229.03:06:41.87#ibcon#about to read 6, iclass 19, count 0 2006.229.03:06:41.87#ibcon#read 6, iclass 19, count 0 2006.229.03:06:41.87#ibcon#end of sib2, iclass 19, count 0 2006.229.03:06:41.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:06:41.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:06:41.87#ibcon#[25=USB\r\n] 2006.229.03:06:41.87#ibcon#*before write, iclass 19, count 0 2006.229.03:06:41.87#ibcon#enter sib2, iclass 19, count 0 2006.229.03:06:41.87#ibcon#flushed, iclass 19, count 0 2006.229.03:06:41.87#ibcon#about to write, iclass 19, count 0 2006.229.03:06:41.87#ibcon#wrote, iclass 19, count 0 2006.229.03:06:41.87#ibcon#about to read 3, iclass 19, count 0 2006.229.03:06:41.90#ibcon#read 3, iclass 19, count 0 2006.229.03:06:41.90#ibcon#about to read 4, iclass 19, count 0 2006.229.03:06:41.90#ibcon#read 4, iclass 19, count 0 2006.229.03:06:41.90#ibcon#about to read 5, iclass 19, count 0 2006.229.03:06:41.90#ibcon#read 5, iclass 19, count 0 2006.229.03:06:41.90#ibcon#about to read 6, iclass 19, count 0 2006.229.03:06:41.90#ibcon#read 6, iclass 19, count 0 2006.229.03:06:41.90#ibcon#end of sib2, iclass 19, count 0 2006.229.03:06:41.90#ibcon#*after write, iclass 19, count 0 2006.229.03:06:41.90#ibcon#*before return 0, iclass 19, count 0 2006.229.03:06:41.90#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:41.90#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:41.90#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:06:41.90#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:06:41.90$vck44/valo=5,734.99 2006.229.03:06:41.90#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.03:06:41.90#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.03:06:41.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:41.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:41.90#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:41.90#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:41.90#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:06:41.90#ibcon#first serial, iclass 21, count 0 2006.229.03:06:41.90#ibcon#enter sib2, iclass 21, count 0 2006.229.03:06:41.90#ibcon#flushed, iclass 21, count 0 2006.229.03:06:41.90#ibcon#about to write, iclass 21, count 0 2006.229.03:06:41.90#ibcon#wrote, iclass 21, count 0 2006.229.03:06:41.90#ibcon#about to read 3, iclass 21, count 0 2006.229.03:06:41.92#ibcon#read 3, iclass 21, count 0 2006.229.03:06:41.92#ibcon#about to read 4, iclass 21, count 0 2006.229.03:06:41.92#ibcon#read 4, iclass 21, count 0 2006.229.03:06:41.92#ibcon#about to read 5, iclass 21, count 0 2006.229.03:06:41.92#ibcon#read 5, iclass 21, count 0 2006.229.03:06:41.92#ibcon#about to read 6, iclass 21, count 0 2006.229.03:06:41.92#ibcon#read 6, iclass 21, count 0 2006.229.03:06:41.92#ibcon#end of sib2, iclass 21, count 0 2006.229.03:06:41.92#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:06:41.92#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:06:41.92#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:06:41.92#ibcon#*before write, iclass 21, count 0 2006.229.03:06:41.92#ibcon#enter sib2, iclass 21, count 0 2006.229.03:06:41.92#ibcon#flushed, iclass 21, count 0 2006.229.03:06:41.92#ibcon#about to write, iclass 21, count 0 2006.229.03:06:41.92#ibcon#wrote, iclass 21, count 0 2006.229.03:06:41.92#ibcon#about to read 3, iclass 21, count 0 2006.229.03:06:41.96#ibcon#read 3, iclass 21, count 0 2006.229.03:06:41.96#ibcon#about to read 4, iclass 21, count 0 2006.229.03:06:41.96#ibcon#read 4, iclass 21, count 0 2006.229.03:06:41.96#ibcon#about to read 5, iclass 21, count 0 2006.229.03:06:41.96#ibcon#read 5, iclass 21, count 0 2006.229.03:06:41.96#ibcon#about to read 6, iclass 21, count 0 2006.229.03:06:41.96#ibcon#read 6, iclass 21, count 0 2006.229.03:06:41.96#ibcon#end of sib2, iclass 21, count 0 2006.229.03:06:41.96#ibcon#*after write, iclass 21, count 0 2006.229.03:06:41.96#ibcon#*before return 0, iclass 21, count 0 2006.229.03:06:41.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:41.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:41.96#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:06:41.96#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:06:41.96$vck44/va=5,4 2006.229.03:06:41.96#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.03:06:41.96#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.03:06:41.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:41.96#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:42.02#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:42.02#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:42.02#ibcon#enter wrdev, iclass 23, count 2 2006.229.03:06:42.02#ibcon#first serial, iclass 23, count 2 2006.229.03:06:42.02#ibcon#enter sib2, iclass 23, count 2 2006.229.03:06:42.02#ibcon#flushed, iclass 23, count 2 2006.229.03:06:42.02#ibcon#about to write, iclass 23, count 2 2006.229.03:06:42.02#ibcon#wrote, iclass 23, count 2 2006.229.03:06:42.02#ibcon#about to read 3, iclass 23, count 2 2006.229.03:06:42.04#ibcon#read 3, iclass 23, count 2 2006.229.03:06:42.04#ibcon#about to read 4, iclass 23, count 2 2006.229.03:06:42.04#ibcon#read 4, iclass 23, count 2 2006.229.03:06:42.04#ibcon#about to read 5, iclass 23, count 2 2006.229.03:06:42.04#ibcon#read 5, iclass 23, count 2 2006.229.03:06:42.04#ibcon#about to read 6, iclass 23, count 2 2006.229.03:06:42.04#ibcon#read 6, iclass 23, count 2 2006.229.03:06:42.04#ibcon#end of sib2, iclass 23, count 2 2006.229.03:06:42.04#ibcon#*mode == 0, iclass 23, count 2 2006.229.03:06:42.04#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.03:06:42.04#ibcon#[25=AT05-04\r\n] 2006.229.03:06:42.04#ibcon#*before write, iclass 23, count 2 2006.229.03:06:42.04#ibcon#enter sib2, iclass 23, count 2 2006.229.03:06:42.04#ibcon#flushed, iclass 23, count 2 2006.229.03:06:42.04#ibcon#about to write, iclass 23, count 2 2006.229.03:06:42.04#ibcon#wrote, iclass 23, count 2 2006.229.03:06:42.04#ibcon#about to read 3, iclass 23, count 2 2006.229.03:06:42.07#ibcon#read 3, iclass 23, count 2 2006.229.03:06:42.07#ibcon#about to read 4, iclass 23, count 2 2006.229.03:06:42.07#ibcon#read 4, iclass 23, count 2 2006.229.03:06:42.07#ibcon#about to read 5, iclass 23, count 2 2006.229.03:06:42.07#ibcon#read 5, iclass 23, count 2 2006.229.03:06:42.07#ibcon#about to read 6, iclass 23, count 2 2006.229.03:06:42.07#ibcon#read 6, iclass 23, count 2 2006.229.03:06:42.07#ibcon#end of sib2, iclass 23, count 2 2006.229.03:06:42.07#ibcon#*after write, iclass 23, count 2 2006.229.03:06:42.07#ibcon#*before return 0, iclass 23, count 2 2006.229.03:06:42.07#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:42.07#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:42.07#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.03:06:42.07#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:42.07#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:42.19#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:42.19#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:42.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:06:42.19#ibcon#first serial, iclass 23, count 0 2006.229.03:06:42.19#ibcon#enter sib2, iclass 23, count 0 2006.229.03:06:42.19#ibcon#flushed, iclass 23, count 0 2006.229.03:06:42.19#ibcon#about to write, iclass 23, count 0 2006.229.03:06:42.19#ibcon#wrote, iclass 23, count 0 2006.229.03:06:42.19#ibcon#about to read 3, iclass 23, count 0 2006.229.03:06:42.21#ibcon#read 3, iclass 23, count 0 2006.229.03:06:42.21#ibcon#about to read 4, iclass 23, count 0 2006.229.03:06:42.21#ibcon#read 4, iclass 23, count 0 2006.229.03:06:42.21#ibcon#about to read 5, iclass 23, count 0 2006.229.03:06:42.21#ibcon#read 5, iclass 23, count 0 2006.229.03:06:42.21#ibcon#about to read 6, iclass 23, count 0 2006.229.03:06:42.21#ibcon#read 6, iclass 23, count 0 2006.229.03:06:42.21#ibcon#end of sib2, iclass 23, count 0 2006.229.03:06:42.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:06:42.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:06:42.21#ibcon#[25=USB\r\n] 2006.229.03:06:42.21#ibcon#*before write, iclass 23, count 0 2006.229.03:06:42.21#ibcon#enter sib2, iclass 23, count 0 2006.229.03:06:42.21#ibcon#flushed, iclass 23, count 0 2006.229.03:06:42.21#ibcon#about to write, iclass 23, count 0 2006.229.03:06:42.21#ibcon#wrote, iclass 23, count 0 2006.229.03:06:42.21#ibcon#about to read 3, iclass 23, count 0 2006.229.03:06:42.24#ibcon#read 3, iclass 23, count 0 2006.229.03:06:42.24#ibcon#about to read 4, iclass 23, count 0 2006.229.03:06:42.24#ibcon#read 4, iclass 23, count 0 2006.229.03:06:42.24#ibcon#about to read 5, iclass 23, count 0 2006.229.03:06:42.24#ibcon#read 5, iclass 23, count 0 2006.229.03:06:42.24#ibcon#about to read 6, iclass 23, count 0 2006.229.03:06:42.24#ibcon#read 6, iclass 23, count 0 2006.229.03:06:42.24#ibcon#end of sib2, iclass 23, count 0 2006.229.03:06:42.24#ibcon#*after write, iclass 23, count 0 2006.229.03:06:42.24#ibcon#*before return 0, iclass 23, count 0 2006.229.03:06:42.24#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:42.24#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:42.24#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:06:42.24#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:06:42.24$vck44/valo=6,814.99 2006.229.03:06:42.24#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.03:06:42.24#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.03:06:42.24#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:42.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:42.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:42.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:42.24#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:06:42.24#ibcon#first serial, iclass 25, count 0 2006.229.03:06:42.24#ibcon#enter sib2, iclass 25, count 0 2006.229.03:06:42.24#ibcon#flushed, iclass 25, count 0 2006.229.03:06:42.24#ibcon#about to write, iclass 25, count 0 2006.229.03:06:42.24#ibcon#wrote, iclass 25, count 0 2006.229.03:06:42.24#ibcon#about to read 3, iclass 25, count 0 2006.229.03:06:42.26#ibcon#read 3, iclass 25, count 0 2006.229.03:06:42.26#ibcon#about to read 4, iclass 25, count 0 2006.229.03:06:42.26#ibcon#read 4, iclass 25, count 0 2006.229.03:06:42.26#ibcon#about to read 5, iclass 25, count 0 2006.229.03:06:42.26#ibcon#read 5, iclass 25, count 0 2006.229.03:06:42.26#ibcon#about to read 6, iclass 25, count 0 2006.229.03:06:42.26#ibcon#read 6, iclass 25, count 0 2006.229.03:06:42.26#ibcon#end of sib2, iclass 25, count 0 2006.229.03:06:42.26#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:06:42.26#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:06:42.26#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:06:42.26#ibcon#*before write, iclass 25, count 0 2006.229.03:06:42.26#ibcon#enter sib2, iclass 25, count 0 2006.229.03:06:42.26#ibcon#flushed, iclass 25, count 0 2006.229.03:06:42.26#ibcon#about to write, iclass 25, count 0 2006.229.03:06:42.26#ibcon#wrote, iclass 25, count 0 2006.229.03:06:42.26#ibcon#about to read 3, iclass 25, count 0 2006.229.03:06:42.30#ibcon#read 3, iclass 25, count 0 2006.229.03:06:42.30#ibcon#about to read 4, iclass 25, count 0 2006.229.03:06:42.30#ibcon#read 4, iclass 25, count 0 2006.229.03:06:42.30#ibcon#about to read 5, iclass 25, count 0 2006.229.03:06:42.30#ibcon#read 5, iclass 25, count 0 2006.229.03:06:42.30#ibcon#about to read 6, iclass 25, count 0 2006.229.03:06:42.30#ibcon#read 6, iclass 25, count 0 2006.229.03:06:42.30#ibcon#end of sib2, iclass 25, count 0 2006.229.03:06:42.30#ibcon#*after write, iclass 25, count 0 2006.229.03:06:42.30#ibcon#*before return 0, iclass 25, count 0 2006.229.03:06:42.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:42.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:42.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:06:42.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:06:42.30$vck44/va=6,4 2006.229.03:06:42.30#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.03:06:42.30#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.03:06:42.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:42.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:42.36#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:42.36#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:42.36#ibcon#enter wrdev, iclass 27, count 2 2006.229.03:06:42.36#ibcon#first serial, iclass 27, count 2 2006.229.03:06:42.36#ibcon#enter sib2, iclass 27, count 2 2006.229.03:06:42.36#ibcon#flushed, iclass 27, count 2 2006.229.03:06:42.36#ibcon#about to write, iclass 27, count 2 2006.229.03:06:42.36#ibcon#wrote, iclass 27, count 2 2006.229.03:06:42.36#ibcon#about to read 3, iclass 27, count 2 2006.229.03:06:42.38#ibcon#read 3, iclass 27, count 2 2006.229.03:06:42.38#ibcon#about to read 4, iclass 27, count 2 2006.229.03:06:42.38#ibcon#read 4, iclass 27, count 2 2006.229.03:06:42.38#ibcon#about to read 5, iclass 27, count 2 2006.229.03:06:42.38#ibcon#read 5, iclass 27, count 2 2006.229.03:06:42.38#ibcon#about to read 6, iclass 27, count 2 2006.229.03:06:42.38#ibcon#read 6, iclass 27, count 2 2006.229.03:06:42.38#ibcon#end of sib2, iclass 27, count 2 2006.229.03:06:42.38#ibcon#*mode == 0, iclass 27, count 2 2006.229.03:06:42.38#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.03:06:42.38#ibcon#[25=AT06-04\r\n] 2006.229.03:06:42.38#ibcon#*before write, iclass 27, count 2 2006.229.03:06:42.38#ibcon#enter sib2, iclass 27, count 2 2006.229.03:06:42.38#ibcon#flushed, iclass 27, count 2 2006.229.03:06:42.38#ibcon#about to write, iclass 27, count 2 2006.229.03:06:42.38#ibcon#wrote, iclass 27, count 2 2006.229.03:06:42.38#ibcon#about to read 3, iclass 27, count 2 2006.229.03:06:42.41#ibcon#read 3, iclass 27, count 2 2006.229.03:06:42.41#ibcon#about to read 4, iclass 27, count 2 2006.229.03:06:42.41#ibcon#read 4, iclass 27, count 2 2006.229.03:06:42.41#ibcon#about to read 5, iclass 27, count 2 2006.229.03:06:42.41#ibcon#read 5, iclass 27, count 2 2006.229.03:06:42.41#ibcon#about to read 6, iclass 27, count 2 2006.229.03:06:42.41#ibcon#read 6, iclass 27, count 2 2006.229.03:06:42.41#ibcon#end of sib2, iclass 27, count 2 2006.229.03:06:42.41#ibcon#*after write, iclass 27, count 2 2006.229.03:06:42.41#ibcon#*before return 0, iclass 27, count 2 2006.229.03:06:42.41#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:42.41#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:42.41#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.03:06:42.41#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:42.41#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:42.53#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:42.53#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:42.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:06:42.53#ibcon#first serial, iclass 27, count 0 2006.229.03:06:42.53#ibcon#enter sib2, iclass 27, count 0 2006.229.03:06:42.53#ibcon#flushed, iclass 27, count 0 2006.229.03:06:42.53#ibcon#about to write, iclass 27, count 0 2006.229.03:06:42.53#ibcon#wrote, iclass 27, count 0 2006.229.03:06:42.53#ibcon#about to read 3, iclass 27, count 0 2006.229.03:06:42.55#ibcon#read 3, iclass 27, count 0 2006.229.03:06:42.55#ibcon#about to read 4, iclass 27, count 0 2006.229.03:06:42.55#ibcon#read 4, iclass 27, count 0 2006.229.03:06:42.55#ibcon#about to read 5, iclass 27, count 0 2006.229.03:06:42.55#ibcon#read 5, iclass 27, count 0 2006.229.03:06:42.55#ibcon#about to read 6, iclass 27, count 0 2006.229.03:06:42.55#ibcon#read 6, iclass 27, count 0 2006.229.03:06:42.55#ibcon#end of sib2, iclass 27, count 0 2006.229.03:06:42.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:06:42.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:06:42.55#ibcon#[25=USB\r\n] 2006.229.03:06:42.55#ibcon#*before write, iclass 27, count 0 2006.229.03:06:42.55#ibcon#enter sib2, iclass 27, count 0 2006.229.03:06:42.55#ibcon#flushed, iclass 27, count 0 2006.229.03:06:42.55#ibcon#about to write, iclass 27, count 0 2006.229.03:06:42.55#ibcon#wrote, iclass 27, count 0 2006.229.03:06:42.55#ibcon#about to read 3, iclass 27, count 0 2006.229.03:06:42.58#ibcon#read 3, iclass 27, count 0 2006.229.03:06:42.58#ibcon#about to read 4, iclass 27, count 0 2006.229.03:06:42.58#ibcon#read 4, iclass 27, count 0 2006.229.03:06:42.58#ibcon#about to read 5, iclass 27, count 0 2006.229.03:06:42.58#ibcon#read 5, iclass 27, count 0 2006.229.03:06:42.58#ibcon#about to read 6, iclass 27, count 0 2006.229.03:06:42.58#ibcon#read 6, iclass 27, count 0 2006.229.03:06:42.58#ibcon#end of sib2, iclass 27, count 0 2006.229.03:06:42.58#ibcon#*after write, iclass 27, count 0 2006.229.03:06:42.58#ibcon#*before return 0, iclass 27, count 0 2006.229.03:06:42.58#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:42.58#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:42.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:06:42.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:06:42.58$vck44/valo=7,864.99 2006.229.03:06:42.58#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.03:06:42.58#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.03:06:42.58#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:42.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:42.58#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:42.58#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:42.58#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:06:42.58#ibcon#first serial, iclass 29, count 0 2006.229.03:06:42.58#ibcon#enter sib2, iclass 29, count 0 2006.229.03:06:42.58#ibcon#flushed, iclass 29, count 0 2006.229.03:06:42.58#ibcon#about to write, iclass 29, count 0 2006.229.03:06:42.58#ibcon#wrote, iclass 29, count 0 2006.229.03:06:42.58#ibcon#about to read 3, iclass 29, count 0 2006.229.03:06:42.60#ibcon#read 3, iclass 29, count 0 2006.229.03:06:42.60#ibcon#about to read 4, iclass 29, count 0 2006.229.03:06:42.60#ibcon#read 4, iclass 29, count 0 2006.229.03:06:42.60#ibcon#about to read 5, iclass 29, count 0 2006.229.03:06:42.60#ibcon#read 5, iclass 29, count 0 2006.229.03:06:42.60#ibcon#about to read 6, iclass 29, count 0 2006.229.03:06:42.60#ibcon#read 6, iclass 29, count 0 2006.229.03:06:42.60#ibcon#end of sib2, iclass 29, count 0 2006.229.03:06:42.60#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:06:42.60#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:06:42.60#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:06:42.60#ibcon#*before write, iclass 29, count 0 2006.229.03:06:42.60#ibcon#enter sib2, iclass 29, count 0 2006.229.03:06:42.60#ibcon#flushed, iclass 29, count 0 2006.229.03:06:42.60#ibcon#about to write, iclass 29, count 0 2006.229.03:06:42.60#ibcon#wrote, iclass 29, count 0 2006.229.03:06:42.60#ibcon#about to read 3, iclass 29, count 0 2006.229.03:06:42.64#ibcon#read 3, iclass 29, count 0 2006.229.03:06:42.64#ibcon#about to read 4, iclass 29, count 0 2006.229.03:06:42.64#ibcon#read 4, iclass 29, count 0 2006.229.03:06:42.64#ibcon#about to read 5, iclass 29, count 0 2006.229.03:06:42.64#ibcon#read 5, iclass 29, count 0 2006.229.03:06:42.64#ibcon#about to read 6, iclass 29, count 0 2006.229.03:06:42.64#ibcon#read 6, iclass 29, count 0 2006.229.03:06:42.64#ibcon#end of sib2, iclass 29, count 0 2006.229.03:06:42.64#ibcon#*after write, iclass 29, count 0 2006.229.03:06:42.64#ibcon#*before return 0, iclass 29, count 0 2006.229.03:06:42.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:42.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:42.64#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:06:42.64#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:06:42.64$vck44/va=7,5 2006.229.03:06:42.64#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.03:06:42.64#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.03:06:42.64#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:42.64#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:42.70#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:42.70#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:42.70#ibcon#enter wrdev, iclass 31, count 2 2006.229.03:06:42.70#ibcon#first serial, iclass 31, count 2 2006.229.03:06:42.70#ibcon#enter sib2, iclass 31, count 2 2006.229.03:06:42.70#ibcon#flushed, iclass 31, count 2 2006.229.03:06:42.70#ibcon#about to write, iclass 31, count 2 2006.229.03:06:42.70#ibcon#wrote, iclass 31, count 2 2006.229.03:06:42.70#ibcon#about to read 3, iclass 31, count 2 2006.229.03:06:42.72#ibcon#read 3, iclass 31, count 2 2006.229.03:06:42.72#ibcon#about to read 4, iclass 31, count 2 2006.229.03:06:42.72#ibcon#read 4, iclass 31, count 2 2006.229.03:06:42.72#ibcon#about to read 5, iclass 31, count 2 2006.229.03:06:42.72#ibcon#read 5, iclass 31, count 2 2006.229.03:06:42.72#ibcon#about to read 6, iclass 31, count 2 2006.229.03:06:42.72#ibcon#read 6, iclass 31, count 2 2006.229.03:06:42.72#ibcon#end of sib2, iclass 31, count 2 2006.229.03:06:42.72#ibcon#*mode == 0, iclass 31, count 2 2006.229.03:06:42.72#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.03:06:42.72#ibcon#[25=AT07-05\r\n] 2006.229.03:06:42.72#ibcon#*before write, iclass 31, count 2 2006.229.03:06:42.72#ibcon#enter sib2, iclass 31, count 2 2006.229.03:06:42.72#ibcon#flushed, iclass 31, count 2 2006.229.03:06:42.72#ibcon#about to write, iclass 31, count 2 2006.229.03:06:42.72#ibcon#wrote, iclass 31, count 2 2006.229.03:06:42.72#ibcon#about to read 3, iclass 31, count 2 2006.229.03:06:42.75#ibcon#read 3, iclass 31, count 2 2006.229.03:06:42.75#ibcon#about to read 4, iclass 31, count 2 2006.229.03:06:42.75#ibcon#read 4, iclass 31, count 2 2006.229.03:06:42.75#ibcon#about to read 5, iclass 31, count 2 2006.229.03:06:42.75#ibcon#read 5, iclass 31, count 2 2006.229.03:06:42.75#ibcon#about to read 6, iclass 31, count 2 2006.229.03:06:42.75#ibcon#read 6, iclass 31, count 2 2006.229.03:06:42.75#ibcon#end of sib2, iclass 31, count 2 2006.229.03:06:42.75#ibcon#*after write, iclass 31, count 2 2006.229.03:06:42.75#ibcon#*before return 0, iclass 31, count 2 2006.229.03:06:42.75#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:42.75#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:42.75#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.03:06:42.75#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:42.75#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:42.87#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:42.87#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:42.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:06:42.87#ibcon#first serial, iclass 31, count 0 2006.229.03:06:42.87#ibcon#enter sib2, iclass 31, count 0 2006.229.03:06:42.87#ibcon#flushed, iclass 31, count 0 2006.229.03:06:42.87#ibcon#about to write, iclass 31, count 0 2006.229.03:06:42.87#ibcon#wrote, iclass 31, count 0 2006.229.03:06:42.87#ibcon#about to read 3, iclass 31, count 0 2006.229.03:06:42.89#ibcon#read 3, iclass 31, count 0 2006.229.03:06:42.89#ibcon#about to read 4, iclass 31, count 0 2006.229.03:06:42.89#ibcon#read 4, iclass 31, count 0 2006.229.03:06:42.89#ibcon#about to read 5, iclass 31, count 0 2006.229.03:06:42.89#ibcon#read 5, iclass 31, count 0 2006.229.03:06:42.89#ibcon#about to read 6, iclass 31, count 0 2006.229.03:06:42.89#ibcon#read 6, iclass 31, count 0 2006.229.03:06:42.89#ibcon#end of sib2, iclass 31, count 0 2006.229.03:06:42.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:06:42.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:06:42.89#ibcon#[25=USB\r\n] 2006.229.03:06:42.89#ibcon#*before write, iclass 31, count 0 2006.229.03:06:42.89#ibcon#enter sib2, iclass 31, count 0 2006.229.03:06:42.89#ibcon#flushed, iclass 31, count 0 2006.229.03:06:42.89#ibcon#about to write, iclass 31, count 0 2006.229.03:06:42.89#ibcon#wrote, iclass 31, count 0 2006.229.03:06:42.89#ibcon#about to read 3, iclass 31, count 0 2006.229.03:06:42.92#ibcon#read 3, iclass 31, count 0 2006.229.03:06:42.92#ibcon#about to read 4, iclass 31, count 0 2006.229.03:06:42.92#ibcon#read 4, iclass 31, count 0 2006.229.03:06:42.92#ibcon#about to read 5, iclass 31, count 0 2006.229.03:06:42.92#ibcon#read 5, iclass 31, count 0 2006.229.03:06:42.92#ibcon#about to read 6, iclass 31, count 0 2006.229.03:06:42.92#ibcon#read 6, iclass 31, count 0 2006.229.03:06:42.92#ibcon#end of sib2, iclass 31, count 0 2006.229.03:06:42.92#ibcon#*after write, iclass 31, count 0 2006.229.03:06:42.92#ibcon#*before return 0, iclass 31, count 0 2006.229.03:06:42.92#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:42.92#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:42.92#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:06:42.92#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:06:42.92$vck44/valo=8,884.99 2006.229.03:06:42.92#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.03:06:42.92#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.03:06:42.92#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:42.92#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:42.92#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:42.92#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:42.92#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:06:42.92#ibcon#first serial, iclass 33, count 0 2006.229.03:06:42.92#ibcon#enter sib2, iclass 33, count 0 2006.229.03:06:42.92#ibcon#flushed, iclass 33, count 0 2006.229.03:06:42.92#ibcon#about to write, iclass 33, count 0 2006.229.03:06:42.92#ibcon#wrote, iclass 33, count 0 2006.229.03:06:42.92#ibcon#about to read 3, iclass 33, count 0 2006.229.03:06:42.94#ibcon#read 3, iclass 33, count 0 2006.229.03:06:42.94#ibcon#about to read 4, iclass 33, count 0 2006.229.03:06:42.94#ibcon#read 4, iclass 33, count 0 2006.229.03:06:42.94#ibcon#about to read 5, iclass 33, count 0 2006.229.03:06:42.94#ibcon#read 5, iclass 33, count 0 2006.229.03:06:42.94#ibcon#about to read 6, iclass 33, count 0 2006.229.03:06:42.94#ibcon#read 6, iclass 33, count 0 2006.229.03:06:42.94#ibcon#end of sib2, iclass 33, count 0 2006.229.03:06:42.94#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:06:42.94#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:06:42.94#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:06:42.94#ibcon#*before write, iclass 33, count 0 2006.229.03:06:42.94#ibcon#enter sib2, iclass 33, count 0 2006.229.03:06:42.94#ibcon#flushed, iclass 33, count 0 2006.229.03:06:42.94#ibcon#about to write, iclass 33, count 0 2006.229.03:06:42.94#ibcon#wrote, iclass 33, count 0 2006.229.03:06:42.94#ibcon#about to read 3, iclass 33, count 0 2006.229.03:06:42.98#ibcon#read 3, iclass 33, count 0 2006.229.03:06:42.98#ibcon#about to read 4, iclass 33, count 0 2006.229.03:06:42.98#ibcon#read 4, iclass 33, count 0 2006.229.03:06:42.98#ibcon#about to read 5, iclass 33, count 0 2006.229.03:06:42.98#ibcon#read 5, iclass 33, count 0 2006.229.03:06:42.98#ibcon#about to read 6, iclass 33, count 0 2006.229.03:06:42.98#ibcon#read 6, iclass 33, count 0 2006.229.03:06:42.98#ibcon#end of sib2, iclass 33, count 0 2006.229.03:06:42.98#ibcon#*after write, iclass 33, count 0 2006.229.03:06:42.98#ibcon#*before return 0, iclass 33, count 0 2006.229.03:06:42.98#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:42.98#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:42.98#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:06:42.98#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:06:42.98$vck44/va=8,6 2006.229.03:06:42.98#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.03:06:42.98#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.03:06:42.98#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:42.98#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:06:43.04#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:06:43.04#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:06:43.04#ibcon#enter wrdev, iclass 35, count 2 2006.229.03:06:43.04#ibcon#first serial, iclass 35, count 2 2006.229.03:06:43.04#ibcon#enter sib2, iclass 35, count 2 2006.229.03:06:43.04#ibcon#flushed, iclass 35, count 2 2006.229.03:06:43.04#ibcon#about to write, iclass 35, count 2 2006.229.03:06:43.04#ibcon#wrote, iclass 35, count 2 2006.229.03:06:43.04#ibcon#about to read 3, iclass 35, count 2 2006.229.03:06:43.06#ibcon#read 3, iclass 35, count 2 2006.229.03:06:43.06#ibcon#about to read 4, iclass 35, count 2 2006.229.03:06:43.06#ibcon#read 4, iclass 35, count 2 2006.229.03:06:43.06#ibcon#about to read 5, iclass 35, count 2 2006.229.03:06:43.06#ibcon#read 5, iclass 35, count 2 2006.229.03:06:43.06#ibcon#about to read 6, iclass 35, count 2 2006.229.03:06:43.06#ibcon#read 6, iclass 35, count 2 2006.229.03:06:43.06#ibcon#end of sib2, iclass 35, count 2 2006.229.03:06:43.06#ibcon#*mode == 0, iclass 35, count 2 2006.229.03:06:43.06#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.03:06:43.06#ibcon#[25=AT08-06\r\n] 2006.229.03:06:43.06#ibcon#*before write, iclass 35, count 2 2006.229.03:06:43.06#ibcon#enter sib2, iclass 35, count 2 2006.229.03:06:43.06#ibcon#flushed, iclass 35, count 2 2006.229.03:06:43.06#ibcon#about to write, iclass 35, count 2 2006.229.03:06:43.06#ibcon#wrote, iclass 35, count 2 2006.229.03:06:43.06#ibcon#about to read 3, iclass 35, count 2 2006.229.03:06:43.09#ibcon#read 3, iclass 35, count 2 2006.229.03:06:43.09#ibcon#about to read 4, iclass 35, count 2 2006.229.03:06:43.09#ibcon#read 4, iclass 35, count 2 2006.229.03:06:43.09#ibcon#about to read 5, iclass 35, count 2 2006.229.03:06:43.09#ibcon#read 5, iclass 35, count 2 2006.229.03:06:43.09#ibcon#about to read 6, iclass 35, count 2 2006.229.03:06:43.09#ibcon#read 6, iclass 35, count 2 2006.229.03:06:43.09#ibcon#end of sib2, iclass 35, count 2 2006.229.03:06:43.09#ibcon#*after write, iclass 35, count 2 2006.229.03:06:43.09#ibcon#*before return 0, iclass 35, count 2 2006.229.03:06:43.09#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:06:43.09#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:06:43.09#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.03:06:43.09#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:43.09#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:06:43.21#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:06:43.21#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:06:43.21#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:06:43.21#ibcon#first serial, iclass 35, count 0 2006.229.03:06:43.21#ibcon#enter sib2, iclass 35, count 0 2006.229.03:06:43.21#ibcon#flushed, iclass 35, count 0 2006.229.03:06:43.21#ibcon#about to write, iclass 35, count 0 2006.229.03:06:43.21#ibcon#wrote, iclass 35, count 0 2006.229.03:06:43.21#ibcon#about to read 3, iclass 35, count 0 2006.229.03:06:43.23#ibcon#read 3, iclass 35, count 0 2006.229.03:06:43.23#ibcon#about to read 4, iclass 35, count 0 2006.229.03:06:43.23#ibcon#read 4, iclass 35, count 0 2006.229.03:06:43.23#ibcon#about to read 5, iclass 35, count 0 2006.229.03:06:43.23#ibcon#read 5, iclass 35, count 0 2006.229.03:06:43.23#ibcon#about to read 6, iclass 35, count 0 2006.229.03:06:43.23#ibcon#read 6, iclass 35, count 0 2006.229.03:06:43.23#ibcon#end of sib2, iclass 35, count 0 2006.229.03:06:43.23#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:06:43.23#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:06:43.23#ibcon#[25=USB\r\n] 2006.229.03:06:43.23#ibcon#*before write, iclass 35, count 0 2006.229.03:06:43.23#ibcon#enter sib2, iclass 35, count 0 2006.229.03:06:43.23#ibcon#flushed, iclass 35, count 0 2006.229.03:06:43.23#ibcon#about to write, iclass 35, count 0 2006.229.03:06:43.23#ibcon#wrote, iclass 35, count 0 2006.229.03:06:43.23#ibcon#about to read 3, iclass 35, count 0 2006.229.03:06:43.26#ibcon#read 3, iclass 35, count 0 2006.229.03:06:43.26#ibcon#about to read 4, iclass 35, count 0 2006.229.03:06:43.26#ibcon#read 4, iclass 35, count 0 2006.229.03:06:43.26#ibcon#about to read 5, iclass 35, count 0 2006.229.03:06:43.26#ibcon#read 5, iclass 35, count 0 2006.229.03:06:43.26#ibcon#about to read 6, iclass 35, count 0 2006.229.03:06:43.26#ibcon#read 6, iclass 35, count 0 2006.229.03:06:43.26#ibcon#end of sib2, iclass 35, count 0 2006.229.03:06:43.26#ibcon#*after write, iclass 35, count 0 2006.229.03:06:43.26#ibcon#*before return 0, iclass 35, count 0 2006.229.03:06:43.26#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:06:43.26#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:06:43.26#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:06:43.26#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:06:43.26$vck44/vblo=1,629.99 2006.229.03:06:43.26#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.03:06:43.26#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.03:06:43.26#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:43.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:06:43.26#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:06:43.26#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:06:43.26#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:06:43.26#ibcon#first serial, iclass 37, count 0 2006.229.03:06:43.26#ibcon#enter sib2, iclass 37, count 0 2006.229.03:06:43.26#ibcon#flushed, iclass 37, count 0 2006.229.03:06:43.26#ibcon#about to write, iclass 37, count 0 2006.229.03:06:43.26#ibcon#wrote, iclass 37, count 0 2006.229.03:06:43.26#ibcon#about to read 3, iclass 37, count 0 2006.229.03:06:43.28#ibcon#read 3, iclass 37, count 0 2006.229.03:06:43.28#ibcon#about to read 4, iclass 37, count 0 2006.229.03:06:43.28#ibcon#read 4, iclass 37, count 0 2006.229.03:06:43.28#ibcon#about to read 5, iclass 37, count 0 2006.229.03:06:43.28#ibcon#read 5, iclass 37, count 0 2006.229.03:06:43.28#ibcon#about to read 6, iclass 37, count 0 2006.229.03:06:43.28#ibcon#read 6, iclass 37, count 0 2006.229.03:06:43.28#ibcon#end of sib2, iclass 37, count 0 2006.229.03:06:43.28#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:06:43.28#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:06:43.28#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:06:43.28#ibcon#*before write, iclass 37, count 0 2006.229.03:06:43.28#ibcon#enter sib2, iclass 37, count 0 2006.229.03:06:43.28#ibcon#flushed, iclass 37, count 0 2006.229.03:06:43.28#ibcon#about to write, iclass 37, count 0 2006.229.03:06:43.28#ibcon#wrote, iclass 37, count 0 2006.229.03:06:43.28#ibcon#about to read 3, iclass 37, count 0 2006.229.03:06:43.32#ibcon#read 3, iclass 37, count 0 2006.229.03:06:43.32#ibcon#about to read 4, iclass 37, count 0 2006.229.03:06:43.32#ibcon#read 4, iclass 37, count 0 2006.229.03:06:43.32#ibcon#about to read 5, iclass 37, count 0 2006.229.03:06:43.32#ibcon#read 5, iclass 37, count 0 2006.229.03:06:43.32#ibcon#about to read 6, iclass 37, count 0 2006.229.03:06:43.32#ibcon#read 6, iclass 37, count 0 2006.229.03:06:43.32#ibcon#end of sib2, iclass 37, count 0 2006.229.03:06:43.32#ibcon#*after write, iclass 37, count 0 2006.229.03:06:43.32#ibcon#*before return 0, iclass 37, count 0 2006.229.03:06:43.32#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:06:43.32#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:06:43.32#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:06:43.32#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:06:43.32$vck44/vb=1,4 2006.229.03:06:43.32#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.03:06:43.32#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.03:06:43.32#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:43.32#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:06:43.32#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:06:43.32#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:06:43.32#ibcon#enter wrdev, iclass 39, count 2 2006.229.03:06:43.32#ibcon#first serial, iclass 39, count 2 2006.229.03:06:43.32#ibcon#enter sib2, iclass 39, count 2 2006.229.03:06:43.32#ibcon#flushed, iclass 39, count 2 2006.229.03:06:43.32#ibcon#about to write, iclass 39, count 2 2006.229.03:06:43.32#ibcon#wrote, iclass 39, count 2 2006.229.03:06:43.32#ibcon#about to read 3, iclass 39, count 2 2006.229.03:06:43.34#ibcon#read 3, iclass 39, count 2 2006.229.03:06:43.34#ibcon#about to read 4, iclass 39, count 2 2006.229.03:06:43.34#ibcon#read 4, iclass 39, count 2 2006.229.03:06:43.34#ibcon#about to read 5, iclass 39, count 2 2006.229.03:06:43.34#ibcon#read 5, iclass 39, count 2 2006.229.03:06:43.34#ibcon#about to read 6, iclass 39, count 2 2006.229.03:06:43.34#ibcon#read 6, iclass 39, count 2 2006.229.03:06:43.34#ibcon#end of sib2, iclass 39, count 2 2006.229.03:06:43.34#ibcon#*mode == 0, iclass 39, count 2 2006.229.03:06:43.34#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.03:06:43.34#ibcon#[27=AT01-04\r\n] 2006.229.03:06:43.34#ibcon#*before write, iclass 39, count 2 2006.229.03:06:43.34#ibcon#enter sib2, iclass 39, count 2 2006.229.03:06:43.34#ibcon#flushed, iclass 39, count 2 2006.229.03:06:43.34#ibcon#about to write, iclass 39, count 2 2006.229.03:06:43.34#ibcon#wrote, iclass 39, count 2 2006.229.03:06:43.34#ibcon#about to read 3, iclass 39, count 2 2006.229.03:06:43.37#ibcon#read 3, iclass 39, count 2 2006.229.03:06:43.37#ibcon#about to read 4, iclass 39, count 2 2006.229.03:06:43.37#ibcon#read 4, iclass 39, count 2 2006.229.03:06:43.37#ibcon#about to read 5, iclass 39, count 2 2006.229.03:06:43.37#ibcon#read 5, iclass 39, count 2 2006.229.03:06:43.37#ibcon#about to read 6, iclass 39, count 2 2006.229.03:06:43.37#ibcon#read 6, iclass 39, count 2 2006.229.03:06:43.37#ibcon#end of sib2, iclass 39, count 2 2006.229.03:06:43.37#ibcon#*after write, iclass 39, count 2 2006.229.03:06:43.37#ibcon#*before return 0, iclass 39, count 2 2006.229.03:06:43.37#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:06:43.37#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:06:43.37#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.03:06:43.37#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:43.37#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:06:43.49#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:06:43.49#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:06:43.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:06:43.49#ibcon#first serial, iclass 39, count 0 2006.229.03:06:43.49#ibcon#enter sib2, iclass 39, count 0 2006.229.03:06:43.49#ibcon#flushed, iclass 39, count 0 2006.229.03:06:43.49#ibcon#about to write, iclass 39, count 0 2006.229.03:06:43.49#ibcon#wrote, iclass 39, count 0 2006.229.03:06:43.49#ibcon#about to read 3, iclass 39, count 0 2006.229.03:06:43.51#ibcon#read 3, iclass 39, count 0 2006.229.03:06:43.51#ibcon#about to read 4, iclass 39, count 0 2006.229.03:06:43.51#ibcon#read 4, iclass 39, count 0 2006.229.03:06:43.51#ibcon#about to read 5, iclass 39, count 0 2006.229.03:06:43.51#ibcon#read 5, iclass 39, count 0 2006.229.03:06:43.51#ibcon#about to read 6, iclass 39, count 0 2006.229.03:06:43.51#ibcon#read 6, iclass 39, count 0 2006.229.03:06:43.51#ibcon#end of sib2, iclass 39, count 0 2006.229.03:06:43.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:06:43.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:06:43.51#ibcon#[27=USB\r\n] 2006.229.03:06:43.51#ibcon#*before write, iclass 39, count 0 2006.229.03:06:43.51#ibcon#enter sib2, iclass 39, count 0 2006.229.03:06:43.51#ibcon#flushed, iclass 39, count 0 2006.229.03:06:43.51#ibcon#about to write, iclass 39, count 0 2006.229.03:06:43.51#ibcon#wrote, iclass 39, count 0 2006.229.03:06:43.51#ibcon#about to read 3, iclass 39, count 0 2006.229.03:06:43.54#ibcon#read 3, iclass 39, count 0 2006.229.03:06:43.54#ibcon#about to read 4, iclass 39, count 0 2006.229.03:06:43.54#ibcon#read 4, iclass 39, count 0 2006.229.03:06:43.54#ibcon#about to read 5, iclass 39, count 0 2006.229.03:06:43.54#ibcon#read 5, iclass 39, count 0 2006.229.03:06:43.54#ibcon#about to read 6, iclass 39, count 0 2006.229.03:06:43.54#ibcon#read 6, iclass 39, count 0 2006.229.03:06:43.54#ibcon#end of sib2, iclass 39, count 0 2006.229.03:06:43.54#ibcon#*after write, iclass 39, count 0 2006.229.03:06:43.54#ibcon#*before return 0, iclass 39, count 0 2006.229.03:06:43.54#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:06:43.54#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:06:43.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:06:43.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:06:43.54$vck44/vblo=2,634.99 2006.229.03:06:43.54#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.03:06:43.54#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.03:06:43.54#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:43.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:43.54#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:43.54#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:43.54#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:06:43.54#ibcon#first serial, iclass 3, count 0 2006.229.03:06:43.54#ibcon#enter sib2, iclass 3, count 0 2006.229.03:06:43.54#ibcon#flushed, iclass 3, count 0 2006.229.03:06:43.54#ibcon#about to write, iclass 3, count 0 2006.229.03:06:43.54#ibcon#wrote, iclass 3, count 0 2006.229.03:06:43.54#ibcon#about to read 3, iclass 3, count 0 2006.229.03:06:43.56#ibcon#read 3, iclass 3, count 0 2006.229.03:06:43.56#ibcon#about to read 4, iclass 3, count 0 2006.229.03:06:43.56#ibcon#read 4, iclass 3, count 0 2006.229.03:06:43.56#ibcon#about to read 5, iclass 3, count 0 2006.229.03:06:43.56#ibcon#read 5, iclass 3, count 0 2006.229.03:06:43.56#ibcon#about to read 6, iclass 3, count 0 2006.229.03:06:43.56#ibcon#read 6, iclass 3, count 0 2006.229.03:06:43.56#ibcon#end of sib2, iclass 3, count 0 2006.229.03:06:43.56#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:06:43.56#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:06:43.56#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:06:43.56#ibcon#*before write, iclass 3, count 0 2006.229.03:06:43.56#ibcon#enter sib2, iclass 3, count 0 2006.229.03:06:43.56#ibcon#flushed, iclass 3, count 0 2006.229.03:06:43.56#ibcon#about to write, iclass 3, count 0 2006.229.03:06:43.56#ibcon#wrote, iclass 3, count 0 2006.229.03:06:43.56#ibcon#about to read 3, iclass 3, count 0 2006.229.03:06:43.60#ibcon#read 3, iclass 3, count 0 2006.229.03:06:43.60#ibcon#about to read 4, iclass 3, count 0 2006.229.03:06:43.60#ibcon#read 4, iclass 3, count 0 2006.229.03:06:43.60#ibcon#about to read 5, iclass 3, count 0 2006.229.03:06:43.60#ibcon#read 5, iclass 3, count 0 2006.229.03:06:43.60#ibcon#about to read 6, iclass 3, count 0 2006.229.03:06:43.60#ibcon#read 6, iclass 3, count 0 2006.229.03:06:43.60#ibcon#end of sib2, iclass 3, count 0 2006.229.03:06:43.60#ibcon#*after write, iclass 3, count 0 2006.229.03:06:43.60#ibcon#*before return 0, iclass 3, count 0 2006.229.03:06:43.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:43.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:06:43.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:06:43.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:06:43.60$vck44/vb=2,4 2006.229.03:06:43.60#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.03:06:43.60#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.03:06:43.60#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:43.60#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:43.66#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:43.66#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:43.66#ibcon#enter wrdev, iclass 5, count 2 2006.229.03:06:43.66#ibcon#first serial, iclass 5, count 2 2006.229.03:06:43.66#ibcon#enter sib2, iclass 5, count 2 2006.229.03:06:43.66#ibcon#flushed, iclass 5, count 2 2006.229.03:06:43.66#ibcon#about to write, iclass 5, count 2 2006.229.03:06:43.66#ibcon#wrote, iclass 5, count 2 2006.229.03:06:43.66#ibcon#about to read 3, iclass 5, count 2 2006.229.03:06:43.68#ibcon#read 3, iclass 5, count 2 2006.229.03:06:43.68#ibcon#about to read 4, iclass 5, count 2 2006.229.03:06:43.68#ibcon#read 4, iclass 5, count 2 2006.229.03:06:43.68#ibcon#about to read 5, iclass 5, count 2 2006.229.03:06:43.68#ibcon#read 5, iclass 5, count 2 2006.229.03:06:43.68#ibcon#about to read 6, iclass 5, count 2 2006.229.03:06:43.68#ibcon#read 6, iclass 5, count 2 2006.229.03:06:43.68#ibcon#end of sib2, iclass 5, count 2 2006.229.03:06:43.68#ibcon#*mode == 0, iclass 5, count 2 2006.229.03:06:43.68#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.03:06:43.68#ibcon#[27=AT02-04\r\n] 2006.229.03:06:43.68#ibcon#*before write, iclass 5, count 2 2006.229.03:06:43.68#ibcon#enter sib2, iclass 5, count 2 2006.229.03:06:43.68#ibcon#flushed, iclass 5, count 2 2006.229.03:06:43.68#ibcon#about to write, iclass 5, count 2 2006.229.03:06:43.68#ibcon#wrote, iclass 5, count 2 2006.229.03:06:43.68#ibcon#about to read 3, iclass 5, count 2 2006.229.03:06:43.71#ibcon#read 3, iclass 5, count 2 2006.229.03:06:43.71#ibcon#about to read 4, iclass 5, count 2 2006.229.03:06:43.71#ibcon#read 4, iclass 5, count 2 2006.229.03:06:43.71#ibcon#about to read 5, iclass 5, count 2 2006.229.03:06:43.71#ibcon#read 5, iclass 5, count 2 2006.229.03:06:43.71#ibcon#about to read 6, iclass 5, count 2 2006.229.03:06:43.71#ibcon#read 6, iclass 5, count 2 2006.229.03:06:43.71#ibcon#end of sib2, iclass 5, count 2 2006.229.03:06:43.71#ibcon#*after write, iclass 5, count 2 2006.229.03:06:43.71#ibcon#*before return 0, iclass 5, count 2 2006.229.03:06:43.71#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:43.71#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:06:43.71#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.03:06:43.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:43.71#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:43.83#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:43.83#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:43.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:06:43.83#ibcon#first serial, iclass 5, count 0 2006.229.03:06:43.83#ibcon#enter sib2, iclass 5, count 0 2006.229.03:06:43.83#ibcon#flushed, iclass 5, count 0 2006.229.03:06:43.83#ibcon#about to write, iclass 5, count 0 2006.229.03:06:43.83#ibcon#wrote, iclass 5, count 0 2006.229.03:06:43.83#ibcon#about to read 3, iclass 5, count 0 2006.229.03:06:43.85#ibcon#read 3, iclass 5, count 0 2006.229.03:06:43.85#ibcon#about to read 4, iclass 5, count 0 2006.229.03:06:43.85#ibcon#read 4, iclass 5, count 0 2006.229.03:06:43.85#ibcon#about to read 5, iclass 5, count 0 2006.229.03:06:43.85#ibcon#read 5, iclass 5, count 0 2006.229.03:06:43.85#ibcon#about to read 6, iclass 5, count 0 2006.229.03:06:43.85#ibcon#read 6, iclass 5, count 0 2006.229.03:06:43.85#ibcon#end of sib2, iclass 5, count 0 2006.229.03:06:43.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:06:43.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:06:43.85#ibcon#[27=USB\r\n] 2006.229.03:06:43.85#ibcon#*before write, iclass 5, count 0 2006.229.03:06:43.85#ibcon#enter sib2, iclass 5, count 0 2006.229.03:06:43.85#ibcon#flushed, iclass 5, count 0 2006.229.03:06:43.85#ibcon#about to write, iclass 5, count 0 2006.229.03:06:43.85#ibcon#wrote, iclass 5, count 0 2006.229.03:06:43.85#ibcon#about to read 3, iclass 5, count 0 2006.229.03:06:43.88#ibcon#read 3, iclass 5, count 0 2006.229.03:06:43.88#ibcon#about to read 4, iclass 5, count 0 2006.229.03:06:43.88#ibcon#read 4, iclass 5, count 0 2006.229.03:06:43.88#ibcon#about to read 5, iclass 5, count 0 2006.229.03:06:43.88#ibcon#read 5, iclass 5, count 0 2006.229.03:06:43.88#ibcon#about to read 6, iclass 5, count 0 2006.229.03:06:43.88#ibcon#read 6, iclass 5, count 0 2006.229.03:06:43.88#ibcon#end of sib2, iclass 5, count 0 2006.229.03:06:43.88#ibcon#*after write, iclass 5, count 0 2006.229.03:06:43.88#ibcon#*before return 0, iclass 5, count 0 2006.229.03:06:43.88#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:43.88#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:06:43.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:06:43.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:06:43.88$vck44/vblo=3,649.99 2006.229.03:06:43.88#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.03:06:43.88#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.03:06:43.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:43.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:43.88#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:43.88#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:43.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:06:43.88#ibcon#first serial, iclass 7, count 0 2006.229.03:06:43.88#ibcon#enter sib2, iclass 7, count 0 2006.229.03:06:43.88#ibcon#flushed, iclass 7, count 0 2006.229.03:06:43.88#ibcon#about to write, iclass 7, count 0 2006.229.03:06:43.88#ibcon#wrote, iclass 7, count 0 2006.229.03:06:43.88#ibcon#about to read 3, iclass 7, count 0 2006.229.03:06:43.90#ibcon#read 3, iclass 7, count 0 2006.229.03:06:43.90#ibcon#about to read 4, iclass 7, count 0 2006.229.03:06:43.90#ibcon#read 4, iclass 7, count 0 2006.229.03:06:43.90#ibcon#about to read 5, iclass 7, count 0 2006.229.03:06:43.90#ibcon#read 5, iclass 7, count 0 2006.229.03:06:43.90#ibcon#about to read 6, iclass 7, count 0 2006.229.03:06:43.90#ibcon#read 6, iclass 7, count 0 2006.229.03:06:43.90#ibcon#end of sib2, iclass 7, count 0 2006.229.03:06:43.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:06:43.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:06:43.90#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:06:43.90#ibcon#*before write, iclass 7, count 0 2006.229.03:06:43.90#ibcon#enter sib2, iclass 7, count 0 2006.229.03:06:43.90#ibcon#flushed, iclass 7, count 0 2006.229.03:06:43.90#ibcon#about to write, iclass 7, count 0 2006.229.03:06:43.90#ibcon#wrote, iclass 7, count 0 2006.229.03:06:43.90#ibcon#about to read 3, iclass 7, count 0 2006.229.03:06:43.94#ibcon#read 3, iclass 7, count 0 2006.229.03:06:43.94#ibcon#about to read 4, iclass 7, count 0 2006.229.03:06:43.94#ibcon#read 4, iclass 7, count 0 2006.229.03:06:43.94#ibcon#about to read 5, iclass 7, count 0 2006.229.03:06:43.94#ibcon#read 5, iclass 7, count 0 2006.229.03:06:43.94#ibcon#about to read 6, iclass 7, count 0 2006.229.03:06:43.94#ibcon#read 6, iclass 7, count 0 2006.229.03:06:43.94#ibcon#end of sib2, iclass 7, count 0 2006.229.03:06:43.94#ibcon#*after write, iclass 7, count 0 2006.229.03:06:43.94#ibcon#*before return 0, iclass 7, count 0 2006.229.03:06:43.94#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:43.94#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:06:43.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:06:43.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:06:43.94$vck44/vb=3,4 2006.229.03:06:43.94#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.03:06:43.94#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.03:06:43.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:43.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:44.00#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:44.00#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:44.00#ibcon#enter wrdev, iclass 11, count 2 2006.229.03:06:44.00#ibcon#first serial, iclass 11, count 2 2006.229.03:06:44.00#ibcon#enter sib2, iclass 11, count 2 2006.229.03:06:44.00#ibcon#flushed, iclass 11, count 2 2006.229.03:06:44.00#ibcon#about to write, iclass 11, count 2 2006.229.03:06:44.00#ibcon#wrote, iclass 11, count 2 2006.229.03:06:44.00#ibcon#about to read 3, iclass 11, count 2 2006.229.03:06:44.02#ibcon#read 3, iclass 11, count 2 2006.229.03:06:44.02#ibcon#about to read 4, iclass 11, count 2 2006.229.03:06:44.02#ibcon#read 4, iclass 11, count 2 2006.229.03:06:44.02#ibcon#about to read 5, iclass 11, count 2 2006.229.03:06:44.02#ibcon#read 5, iclass 11, count 2 2006.229.03:06:44.02#ibcon#about to read 6, iclass 11, count 2 2006.229.03:06:44.02#ibcon#read 6, iclass 11, count 2 2006.229.03:06:44.02#ibcon#end of sib2, iclass 11, count 2 2006.229.03:06:44.02#ibcon#*mode == 0, iclass 11, count 2 2006.229.03:06:44.02#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.03:06:44.02#ibcon#[27=AT03-04\r\n] 2006.229.03:06:44.02#ibcon#*before write, iclass 11, count 2 2006.229.03:06:44.02#ibcon#enter sib2, iclass 11, count 2 2006.229.03:06:44.02#ibcon#flushed, iclass 11, count 2 2006.229.03:06:44.02#ibcon#about to write, iclass 11, count 2 2006.229.03:06:44.02#ibcon#wrote, iclass 11, count 2 2006.229.03:06:44.02#ibcon#about to read 3, iclass 11, count 2 2006.229.03:06:44.05#ibcon#read 3, iclass 11, count 2 2006.229.03:06:44.05#ibcon#about to read 4, iclass 11, count 2 2006.229.03:06:44.05#ibcon#read 4, iclass 11, count 2 2006.229.03:06:44.05#ibcon#about to read 5, iclass 11, count 2 2006.229.03:06:44.05#ibcon#read 5, iclass 11, count 2 2006.229.03:06:44.05#ibcon#about to read 6, iclass 11, count 2 2006.229.03:06:44.05#ibcon#read 6, iclass 11, count 2 2006.229.03:06:44.05#ibcon#end of sib2, iclass 11, count 2 2006.229.03:06:44.05#ibcon#*after write, iclass 11, count 2 2006.229.03:06:44.05#ibcon#*before return 0, iclass 11, count 2 2006.229.03:06:44.05#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:44.05#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:06:44.05#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.03:06:44.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:44.05#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:44.17#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:44.17#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:44.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:06:44.17#ibcon#first serial, iclass 11, count 0 2006.229.03:06:44.17#ibcon#enter sib2, iclass 11, count 0 2006.229.03:06:44.17#ibcon#flushed, iclass 11, count 0 2006.229.03:06:44.17#ibcon#about to write, iclass 11, count 0 2006.229.03:06:44.17#ibcon#wrote, iclass 11, count 0 2006.229.03:06:44.17#ibcon#about to read 3, iclass 11, count 0 2006.229.03:06:44.19#ibcon#read 3, iclass 11, count 0 2006.229.03:06:44.19#ibcon#about to read 4, iclass 11, count 0 2006.229.03:06:44.19#ibcon#read 4, iclass 11, count 0 2006.229.03:06:44.19#ibcon#about to read 5, iclass 11, count 0 2006.229.03:06:44.19#ibcon#read 5, iclass 11, count 0 2006.229.03:06:44.19#ibcon#about to read 6, iclass 11, count 0 2006.229.03:06:44.19#ibcon#read 6, iclass 11, count 0 2006.229.03:06:44.19#ibcon#end of sib2, iclass 11, count 0 2006.229.03:06:44.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:06:44.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:06:44.19#ibcon#[27=USB\r\n] 2006.229.03:06:44.19#ibcon#*before write, iclass 11, count 0 2006.229.03:06:44.19#ibcon#enter sib2, iclass 11, count 0 2006.229.03:06:44.19#ibcon#flushed, iclass 11, count 0 2006.229.03:06:44.19#ibcon#about to write, iclass 11, count 0 2006.229.03:06:44.19#ibcon#wrote, iclass 11, count 0 2006.229.03:06:44.19#ibcon#about to read 3, iclass 11, count 0 2006.229.03:06:44.22#ibcon#read 3, iclass 11, count 0 2006.229.03:06:44.22#ibcon#about to read 4, iclass 11, count 0 2006.229.03:06:44.22#ibcon#read 4, iclass 11, count 0 2006.229.03:06:44.22#ibcon#about to read 5, iclass 11, count 0 2006.229.03:06:44.22#ibcon#read 5, iclass 11, count 0 2006.229.03:06:44.22#ibcon#about to read 6, iclass 11, count 0 2006.229.03:06:44.22#ibcon#read 6, iclass 11, count 0 2006.229.03:06:44.22#ibcon#end of sib2, iclass 11, count 0 2006.229.03:06:44.22#ibcon#*after write, iclass 11, count 0 2006.229.03:06:44.22#ibcon#*before return 0, iclass 11, count 0 2006.229.03:06:44.22#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:44.22#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:06:44.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:06:44.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:06:44.22$vck44/vblo=4,679.99 2006.229.03:06:44.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.03:06:44.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.03:06:44.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:44.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:44.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:44.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:44.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:06:44.22#ibcon#first serial, iclass 13, count 0 2006.229.03:06:44.22#ibcon#enter sib2, iclass 13, count 0 2006.229.03:06:44.22#ibcon#flushed, iclass 13, count 0 2006.229.03:06:44.22#ibcon#about to write, iclass 13, count 0 2006.229.03:06:44.22#ibcon#wrote, iclass 13, count 0 2006.229.03:06:44.22#ibcon#about to read 3, iclass 13, count 0 2006.229.03:06:44.24#ibcon#read 3, iclass 13, count 0 2006.229.03:06:44.24#ibcon#about to read 4, iclass 13, count 0 2006.229.03:06:44.24#ibcon#read 4, iclass 13, count 0 2006.229.03:06:44.24#ibcon#about to read 5, iclass 13, count 0 2006.229.03:06:44.24#ibcon#read 5, iclass 13, count 0 2006.229.03:06:44.24#ibcon#about to read 6, iclass 13, count 0 2006.229.03:06:44.24#ibcon#read 6, iclass 13, count 0 2006.229.03:06:44.24#ibcon#end of sib2, iclass 13, count 0 2006.229.03:06:44.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:06:44.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:06:44.24#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:06:44.24#ibcon#*before write, iclass 13, count 0 2006.229.03:06:44.24#ibcon#enter sib2, iclass 13, count 0 2006.229.03:06:44.24#ibcon#flushed, iclass 13, count 0 2006.229.03:06:44.24#ibcon#about to write, iclass 13, count 0 2006.229.03:06:44.24#ibcon#wrote, iclass 13, count 0 2006.229.03:06:44.24#ibcon#about to read 3, iclass 13, count 0 2006.229.03:06:44.28#ibcon#read 3, iclass 13, count 0 2006.229.03:06:44.28#ibcon#about to read 4, iclass 13, count 0 2006.229.03:06:44.28#ibcon#read 4, iclass 13, count 0 2006.229.03:06:44.28#ibcon#about to read 5, iclass 13, count 0 2006.229.03:06:44.28#ibcon#read 5, iclass 13, count 0 2006.229.03:06:44.28#ibcon#about to read 6, iclass 13, count 0 2006.229.03:06:44.28#ibcon#read 6, iclass 13, count 0 2006.229.03:06:44.28#ibcon#end of sib2, iclass 13, count 0 2006.229.03:06:44.28#ibcon#*after write, iclass 13, count 0 2006.229.03:06:44.28#ibcon#*before return 0, iclass 13, count 0 2006.229.03:06:44.28#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:44.28#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:06:44.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:06:44.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:06:44.28$vck44/vb=4,4 2006.229.03:06:44.28#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.03:06:44.28#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.03:06:44.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:44.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:44.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:44.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:44.34#ibcon#enter wrdev, iclass 15, count 2 2006.229.03:06:44.34#ibcon#first serial, iclass 15, count 2 2006.229.03:06:44.34#ibcon#enter sib2, iclass 15, count 2 2006.229.03:06:44.34#ibcon#flushed, iclass 15, count 2 2006.229.03:06:44.34#ibcon#about to write, iclass 15, count 2 2006.229.03:06:44.34#ibcon#wrote, iclass 15, count 2 2006.229.03:06:44.34#ibcon#about to read 3, iclass 15, count 2 2006.229.03:06:44.36#ibcon#read 3, iclass 15, count 2 2006.229.03:06:44.36#ibcon#about to read 4, iclass 15, count 2 2006.229.03:06:44.36#ibcon#read 4, iclass 15, count 2 2006.229.03:06:44.36#ibcon#about to read 5, iclass 15, count 2 2006.229.03:06:44.36#ibcon#read 5, iclass 15, count 2 2006.229.03:06:44.36#ibcon#about to read 6, iclass 15, count 2 2006.229.03:06:44.36#ibcon#read 6, iclass 15, count 2 2006.229.03:06:44.36#ibcon#end of sib2, iclass 15, count 2 2006.229.03:06:44.36#ibcon#*mode == 0, iclass 15, count 2 2006.229.03:06:44.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.03:06:44.36#ibcon#[27=AT04-04\r\n] 2006.229.03:06:44.36#ibcon#*before write, iclass 15, count 2 2006.229.03:06:44.36#ibcon#enter sib2, iclass 15, count 2 2006.229.03:06:44.36#ibcon#flushed, iclass 15, count 2 2006.229.03:06:44.36#ibcon#about to write, iclass 15, count 2 2006.229.03:06:44.36#ibcon#wrote, iclass 15, count 2 2006.229.03:06:44.36#ibcon#about to read 3, iclass 15, count 2 2006.229.03:06:44.39#ibcon#read 3, iclass 15, count 2 2006.229.03:06:44.39#ibcon#about to read 4, iclass 15, count 2 2006.229.03:06:44.39#ibcon#read 4, iclass 15, count 2 2006.229.03:06:44.39#ibcon#about to read 5, iclass 15, count 2 2006.229.03:06:44.39#ibcon#read 5, iclass 15, count 2 2006.229.03:06:44.39#ibcon#about to read 6, iclass 15, count 2 2006.229.03:06:44.39#ibcon#read 6, iclass 15, count 2 2006.229.03:06:44.39#ibcon#end of sib2, iclass 15, count 2 2006.229.03:06:44.39#ibcon#*after write, iclass 15, count 2 2006.229.03:06:44.39#ibcon#*before return 0, iclass 15, count 2 2006.229.03:06:44.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:44.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:06:44.39#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.03:06:44.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:44.39#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:44.51#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:44.51#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:44.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:06:44.51#ibcon#first serial, iclass 15, count 0 2006.229.03:06:44.51#ibcon#enter sib2, iclass 15, count 0 2006.229.03:06:44.51#ibcon#flushed, iclass 15, count 0 2006.229.03:06:44.51#ibcon#about to write, iclass 15, count 0 2006.229.03:06:44.51#ibcon#wrote, iclass 15, count 0 2006.229.03:06:44.51#ibcon#about to read 3, iclass 15, count 0 2006.229.03:06:44.53#ibcon#read 3, iclass 15, count 0 2006.229.03:06:44.53#ibcon#about to read 4, iclass 15, count 0 2006.229.03:06:44.53#ibcon#read 4, iclass 15, count 0 2006.229.03:06:44.53#ibcon#about to read 5, iclass 15, count 0 2006.229.03:06:44.53#ibcon#read 5, iclass 15, count 0 2006.229.03:06:44.53#ibcon#about to read 6, iclass 15, count 0 2006.229.03:06:44.53#ibcon#read 6, iclass 15, count 0 2006.229.03:06:44.53#ibcon#end of sib2, iclass 15, count 0 2006.229.03:06:44.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:06:44.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:06:44.53#ibcon#[27=USB\r\n] 2006.229.03:06:44.53#ibcon#*before write, iclass 15, count 0 2006.229.03:06:44.53#ibcon#enter sib2, iclass 15, count 0 2006.229.03:06:44.53#ibcon#flushed, iclass 15, count 0 2006.229.03:06:44.53#ibcon#about to write, iclass 15, count 0 2006.229.03:06:44.53#ibcon#wrote, iclass 15, count 0 2006.229.03:06:44.53#ibcon#about to read 3, iclass 15, count 0 2006.229.03:06:44.56#ibcon#read 3, iclass 15, count 0 2006.229.03:06:44.56#ibcon#about to read 4, iclass 15, count 0 2006.229.03:06:44.56#ibcon#read 4, iclass 15, count 0 2006.229.03:06:44.56#ibcon#about to read 5, iclass 15, count 0 2006.229.03:06:44.56#ibcon#read 5, iclass 15, count 0 2006.229.03:06:44.56#ibcon#about to read 6, iclass 15, count 0 2006.229.03:06:44.56#ibcon#read 6, iclass 15, count 0 2006.229.03:06:44.56#ibcon#end of sib2, iclass 15, count 0 2006.229.03:06:44.56#ibcon#*after write, iclass 15, count 0 2006.229.03:06:44.56#ibcon#*before return 0, iclass 15, count 0 2006.229.03:06:44.56#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:44.56#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:06:44.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:06:44.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:06:44.56$vck44/vblo=5,709.99 2006.229.03:06:44.56#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.03:06:44.56#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.03:06:44.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:44.56#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:44.56#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:44.56#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:44.56#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:06:44.56#ibcon#first serial, iclass 17, count 0 2006.229.03:06:44.56#ibcon#enter sib2, iclass 17, count 0 2006.229.03:06:44.56#ibcon#flushed, iclass 17, count 0 2006.229.03:06:44.56#ibcon#about to write, iclass 17, count 0 2006.229.03:06:44.56#ibcon#wrote, iclass 17, count 0 2006.229.03:06:44.56#ibcon#about to read 3, iclass 17, count 0 2006.229.03:06:44.58#ibcon#read 3, iclass 17, count 0 2006.229.03:06:44.58#ibcon#about to read 4, iclass 17, count 0 2006.229.03:06:44.58#ibcon#read 4, iclass 17, count 0 2006.229.03:06:44.58#ibcon#about to read 5, iclass 17, count 0 2006.229.03:06:44.58#ibcon#read 5, iclass 17, count 0 2006.229.03:06:44.58#ibcon#about to read 6, iclass 17, count 0 2006.229.03:06:44.58#ibcon#read 6, iclass 17, count 0 2006.229.03:06:44.58#ibcon#end of sib2, iclass 17, count 0 2006.229.03:06:44.58#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:06:44.58#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:06:44.58#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:06:44.58#ibcon#*before write, iclass 17, count 0 2006.229.03:06:44.58#ibcon#enter sib2, iclass 17, count 0 2006.229.03:06:44.58#ibcon#flushed, iclass 17, count 0 2006.229.03:06:44.58#ibcon#about to write, iclass 17, count 0 2006.229.03:06:44.58#ibcon#wrote, iclass 17, count 0 2006.229.03:06:44.58#ibcon#about to read 3, iclass 17, count 0 2006.229.03:06:44.62#ibcon#read 3, iclass 17, count 0 2006.229.03:06:44.62#ibcon#about to read 4, iclass 17, count 0 2006.229.03:06:44.62#ibcon#read 4, iclass 17, count 0 2006.229.03:06:44.62#ibcon#about to read 5, iclass 17, count 0 2006.229.03:06:44.62#ibcon#read 5, iclass 17, count 0 2006.229.03:06:44.62#ibcon#about to read 6, iclass 17, count 0 2006.229.03:06:44.62#ibcon#read 6, iclass 17, count 0 2006.229.03:06:44.62#ibcon#end of sib2, iclass 17, count 0 2006.229.03:06:44.62#ibcon#*after write, iclass 17, count 0 2006.229.03:06:44.62#ibcon#*before return 0, iclass 17, count 0 2006.229.03:06:44.62#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:44.62#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:06:44.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:06:44.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:06:44.62$vck44/vb=5,4 2006.229.03:06:44.62#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.03:06:44.62#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.03:06:44.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:44.62#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:44.68#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:44.68#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:44.68#ibcon#enter wrdev, iclass 19, count 2 2006.229.03:06:44.68#ibcon#first serial, iclass 19, count 2 2006.229.03:06:44.68#ibcon#enter sib2, iclass 19, count 2 2006.229.03:06:44.68#ibcon#flushed, iclass 19, count 2 2006.229.03:06:44.68#ibcon#about to write, iclass 19, count 2 2006.229.03:06:44.68#ibcon#wrote, iclass 19, count 2 2006.229.03:06:44.68#ibcon#about to read 3, iclass 19, count 2 2006.229.03:06:44.70#ibcon#read 3, iclass 19, count 2 2006.229.03:06:44.70#ibcon#about to read 4, iclass 19, count 2 2006.229.03:06:44.70#ibcon#read 4, iclass 19, count 2 2006.229.03:06:44.70#ibcon#about to read 5, iclass 19, count 2 2006.229.03:06:44.70#ibcon#read 5, iclass 19, count 2 2006.229.03:06:44.70#ibcon#about to read 6, iclass 19, count 2 2006.229.03:06:44.70#ibcon#read 6, iclass 19, count 2 2006.229.03:06:44.70#ibcon#end of sib2, iclass 19, count 2 2006.229.03:06:44.70#ibcon#*mode == 0, iclass 19, count 2 2006.229.03:06:44.70#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.03:06:44.70#ibcon#[27=AT05-04\r\n] 2006.229.03:06:44.70#ibcon#*before write, iclass 19, count 2 2006.229.03:06:44.70#ibcon#enter sib2, iclass 19, count 2 2006.229.03:06:44.70#ibcon#flushed, iclass 19, count 2 2006.229.03:06:44.70#ibcon#about to write, iclass 19, count 2 2006.229.03:06:44.70#ibcon#wrote, iclass 19, count 2 2006.229.03:06:44.70#ibcon#about to read 3, iclass 19, count 2 2006.229.03:06:44.73#ibcon#read 3, iclass 19, count 2 2006.229.03:06:44.73#ibcon#about to read 4, iclass 19, count 2 2006.229.03:06:44.73#ibcon#read 4, iclass 19, count 2 2006.229.03:06:44.73#ibcon#about to read 5, iclass 19, count 2 2006.229.03:06:44.73#ibcon#read 5, iclass 19, count 2 2006.229.03:06:44.73#ibcon#about to read 6, iclass 19, count 2 2006.229.03:06:44.73#ibcon#read 6, iclass 19, count 2 2006.229.03:06:44.73#ibcon#end of sib2, iclass 19, count 2 2006.229.03:06:44.73#ibcon#*after write, iclass 19, count 2 2006.229.03:06:44.73#ibcon#*before return 0, iclass 19, count 2 2006.229.03:06:44.73#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:44.73#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:06:44.73#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.03:06:44.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:44.73#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:44.85#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:44.85#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:44.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:06:44.85#ibcon#first serial, iclass 19, count 0 2006.229.03:06:44.85#ibcon#enter sib2, iclass 19, count 0 2006.229.03:06:44.85#ibcon#flushed, iclass 19, count 0 2006.229.03:06:44.85#ibcon#about to write, iclass 19, count 0 2006.229.03:06:44.85#ibcon#wrote, iclass 19, count 0 2006.229.03:06:44.85#ibcon#about to read 3, iclass 19, count 0 2006.229.03:06:44.87#ibcon#read 3, iclass 19, count 0 2006.229.03:06:44.87#ibcon#about to read 4, iclass 19, count 0 2006.229.03:06:44.87#ibcon#read 4, iclass 19, count 0 2006.229.03:06:44.87#ibcon#about to read 5, iclass 19, count 0 2006.229.03:06:44.87#ibcon#read 5, iclass 19, count 0 2006.229.03:06:44.87#ibcon#about to read 6, iclass 19, count 0 2006.229.03:06:44.87#ibcon#read 6, iclass 19, count 0 2006.229.03:06:44.87#ibcon#end of sib2, iclass 19, count 0 2006.229.03:06:44.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:06:44.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:06:44.87#ibcon#[27=USB\r\n] 2006.229.03:06:44.87#ibcon#*before write, iclass 19, count 0 2006.229.03:06:44.87#ibcon#enter sib2, iclass 19, count 0 2006.229.03:06:44.87#ibcon#flushed, iclass 19, count 0 2006.229.03:06:44.87#ibcon#about to write, iclass 19, count 0 2006.229.03:06:44.87#ibcon#wrote, iclass 19, count 0 2006.229.03:06:44.87#ibcon#about to read 3, iclass 19, count 0 2006.229.03:06:44.90#ibcon#read 3, iclass 19, count 0 2006.229.03:06:44.90#ibcon#about to read 4, iclass 19, count 0 2006.229.03:06:44.90#ibcon#read 4, iclass 19, count 0 2006.229.03:06:44.90#ibcon#about to read 5, iclass 19, count 0 2006.229.03:06:44.90#ibcon#read 5, iclass 19, count 0 2006.229.03:06:44.90#ibcon#about to read 6, iclass 19, count 0 2006.229.03:06:44.90#ibcon#read 6, iclass 19, count 0 2006.229.03:06:44.90#ibcon#end of sib2, iclass 19, count 0 2006.229.03:06:44.90#ibcon#*after write, iclass 19, count 0 2006.229.03:06:44.90#ibcon#*before return 0, iclass 19, count 0 2006.229.03:06:44.90#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:44.90#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:06:44.90#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:06:44.90#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:06:44.90$vck44/vblo=6,719.99 2006.229.03:06:44.90#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.03:06:44.90#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.03:06:44.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:44.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:44.90#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:44.90#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:44.90#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:06:44.90#ibcon#first serial, iclass 21, count 0 2006.229.03:06:44.90#ibcon#enter sib2, iclass 21, count 0 2006.229.03:06:44.90#ibcon#flushed, iclass 21, count 0 2006.229.03:06:44.90#ibcon#about to write, iclass 21, count 0 2006.229.03:06:44.90#ibcon#wrote, iclass 21, count 0 2006.229.03:06:44.90#ibcon#about to read 3, iclass 21, count 0 2006.229.03:06:44.92#ibcon#read 3, iclass 21, count 0 2006.229.03:06:44.92#ibcon#about to read 4, iclass 21, count 0 2006.229.03:06:44.92#ibcon#read 4, iclass 21, count 0 2006.229.03:06:44.92#ibcon#about to read 5, iclass 21, count 0 2006.229.03:06:44.92#ibcon#read 5, iclass 21, count 0 2006.229.03:06:44.92#ibcon#about to read 6, iclass 21, count 0 2006.229.03:06:44.92#ibcon#read 6, iclass 21, count 0 2006.229.03:06:44.92#ibcon#end of sib2, iclass 21, count 0 2006.229.03:06:44.92#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:06:44.92#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:06:44.92#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:06:44.92#ibcon#*before write, iclass 21, count 0 2006.229.03:06:44.92#ibcon#enter sib2, iclass 21, count 0 2006.229.03:06:44.92#ibcon#flushed, iclass 21, count 0 2006.229.03:06:44.92#ibcon#about to write, iclass 21, count 0 2006.229.03:06:44.92#ibcon#wrote, iclass 21, count 0 2006.229.03:06:44.92#ibcon#about to read 3, iclass 21, count 0 2006.229.03:06:44.96#ibcon#read 3, iclass 21, count 0 2006.229.03:06:44.96#ibcon#about to read 4, iclass 21, count 0 2006.229.03:06:44.96#ibcon#read 4, iclass 21, count 0 2006.229.03:06:44.96#ibcon#about to read 5, iclass 21, count 0 2006.229.03:06:44.96#ibcon#read 5, iclass 21, count 0 2006.229.03:06:44.96#ibcon#about to read 6, iclass 21, count 0 2006.229.03:06:44.96#ibcon#read 6, iclass 21, count 0 2006.229.03:06:44.96#ibcon#end of sib2, iclass 21, count 0 2006.229.03:06:44.96#ibcon#*after write, iclass 21, count 0 2006.229.03:06:44.96#ibcon#*before return 0, iclass 21, count 0 2006.229.03:06:44.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:44.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:06:44.96#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:06:44.96#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:06:44.96$vck44/vb=6,4 2006.229.03:06:44.96#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.03:06:44.96#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.03:06:44.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:44.96#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:45.02#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:45.02#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:45.02#ibcon#enter wrdev, iclass 23, count 2 2006.229.03:06:45.02#ibcon#first serial, iclass 23, count 2 2006.229.03:06:45.02#ibcon#enter sib2, iclass 23, count 2 2006.229.03:06:45.02#ibcon#flushed, iclass 23, count 2 2006.229.03:06:45.02#ibcon#about to write, iclass 23, count 2 2006.229.03:06:45.02#ibcon#wrote, iclass 23, count 2 2006.229.03:06:45.02#ibcon#about to read 3, iclass 23, count 2 2006.229.03:06:45.04#ibcon#read 3, iclass 23, count 2 2006.229.03:06:45.04#ibcon#about to read 4, iclass 23, count 2 2006.229.03:06:45.04#ibcon#read 4, iclass 23, count 2 2006.229.03:06:45.04#ibcon#about to read 5, iclass 23, count 2 2006.229.03:06:45.04#ibcon#read 5, iclass 23, count 2 2006.229.03:06:45.04#ibcon#about to read 6, iclass 23, count 2 2006.229.03:06:45.04#ibcon#read 6, iclass 23, count 2 2006.229.03:06:45.04#ibcon#end of sib2, iclass 23, count 2 2006.229.03:06:45.04#ibcon#*mode == 0, iclass 23, count 2 2006.229.03:06:45.04#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.03:06:45.04#ibcon#[27=AT06-04\r\n] 2006.229.03:06:45.04#ibcon#*before write, iclass 23, count 2 2006.229.03:06:45.04#ibcon#enter sib2, iclass 23, count 2 2006.229.03:06:45.04#ibcon#flushed, iclass 23, count 2 2006.229.03:06:45.04#ibcon#about to write, iclass 23, count 2 2006.229.03:06:45.04#ibcon#wrote, iclass 23, count 2 2006.229.03:06:45.04#ibcon#about to read 3, iclass 23, count 2 2006.229.03:06:45.07#ibcon#read 3, iclass 23, count 2 2006.229.03:06:45.07#ibcon#about to read 4, iclass 23, count 2 2006.229.03:06:45.07#ibcon#read 4, iclass 23, count 2 2006.229.03:06:45.07#ibcon#about to read 5, iclass 23, count 2 2006.229.03:06:45.07#ibcon#read 5, iclass 23, count 2 2006.229.03:06:45.07#ibcon#about to read 6, iclass 23, count 2 2006.229.03:06:45.07#ibcon#read 6, iclass 23, count 2 2006.229.03:06:45.07#ibcon#end of sib2, iclass 23, count 2 2006.229.03:06:45.07#ibcon#*after write, iclass 23, count 2 2006.229.03:06:45.07#ibcon#*before return 0, iclass 23, count 2 2006.229.03:06:45.07#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:45.07#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:06:45.07#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.03:06:45.07#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:45.07#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:45.19#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:45.19#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:45.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:06:45.19#ibcon#first serial, iclass 23, count 0 2006.229.03:06:45.19#ibcon#enter sib2, iclass 23, count 0 2006.229.03:06:45.19#ibcon#flushed, iclass 23, count 0 2006.229.03:06:45.19#ibcon#about to write, iclass 23, count 0 2006.229.03:06:45.19#ibcon#wrote, iclass 23, count 0 2006.229.03:06:45.19#ibcon#about to read 3, iclass 23, count 0 2006.229.03:06:45.21#ibcon#read 3, iclass 23, count 0 2006.229.03:06:45.21#ibcon#about to read 4, iclass 23, count 0 2006.229.03:06:45.21#ibcon#read 4, iclass 23, count 0 2006.229.03:06:45.21#ibcon#about to read 5, iclass 23, count 0 2006.229.03:06:45.21#ibcon#read 5, iclass 23, count 0 2006.229.03:06:45.21#ibcon#about to read 6, iclass 23, count 0 2006.229.03:06:45.21#ibcon#read 6, iclass 23, count 0 2006.229.03:06:45.21#ibcon#end of sib2, iclass 23, count 0 2006.229.03:06:45.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:06:45.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:06:45.21#ibcon#[27=USB\r\n] 2006.229.03:06:45.21#ibcon#*before write, iclass 23, count 0 2006.229.03:06:45.21#ibcon#enter sib2, iclass 23, count 0 2006.229.03:06:45.21#ibcon#flushed, iclass 23, count 0 2006.229.03:06:45.21#ibcon#about to write, iclass 23, count 0 2006.229.03:06:45.21#ibcon#wrote, iclass 23, count 0 2006.229.03:06:45.21#ibcon#about to read 3, iclass 23, count 0 2006.229.03:06:45.24#ibcon#read 3, iclass 23, count 0 2006.229.03:06:45.24#ibcon#about to read 4, iclass 23, count 0 2006.229.03:06:45.24#ibcon#read 4, iclass 23, count 0 2006.229.03:06:45.24#ibcon#about to read 5, iclass 23, count 0 2006.229.03:06:45.24#ibcon#read 5, iclass 23, count 0 2006.229.03:06:45.24#ibcon#about to read 6, iclass 23, count 0 2006.229.03:06:45.24#ibcon#read 6, iclass 23, count 0 2006.229.03:06:45.24#ibcon#end of sib2, iclass 23, count 0 2006.229.03:06:45.24#ibcon#*after write, iclass 23, count 0 2006.229.03:06:45.24#ibcon#*before return 0, iclass 23, count 0 2006.229.03:06:45.24#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:45.24#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:06:45.24#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:06:45.24#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:06:45.24$vck44/vblo=7,734.99 2006.229.03:06:45.24#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.03:06:45.24#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.03:06:45.24#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:45.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:45.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:45.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:45.24#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:06:45.24#ibcon#first serial, iclass 25, count 0 2006.229.03:06:45.24#ibcon#enter sib2, iclass 25, count 0 2006.229.03:06:45.24#ibcon#flushed, iclass 25, count 0 2006.229.03:06:45.24#ibcon#about to write, iclass 25, count 0 2006.229.03:06:45.24#ibcon#wrote, iclass 25, count 0 2006.229.03:06:45.24#ibcon#about to read 3, iclass 25, count 0 2006.229.03:06:45.26#ibcon#read 3, iclass 25, count 0 2006.229.03:06:45.26#ibcon#about to read 4, iclass 25, count 0 2006.229.03:06:45.26#ibcon#read 4, iclass 25, count 0 2006.229.03:06:45.26#ibcon#about to read 5, iclass 25, count 0 2006.229.03:06:45.26#ibcon#read 5, iclass 25, count 0 2006.229.03:06:45.26#ibcon#about to read 6, iclass 25, count 0 2006.229.03:06:45.26#ibcon#read 6, iclass 25, count 0 2006.229.03:06:45.26#ibcon#end of sib2, iclass 25, count 0 2006.229.03:06:45.26#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:06:45.26#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:06:45.26#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:06:45.26#ibcon#*before write, iclass 25, count 0 2006.229.03:06:45.26#ibcon#enter sib2, iclass 25, count 0 2006.229.03:06:45.26#ibcon#flushed, iclass 25, count 0 2006.229.03:06:45.26#ibcon#about to write, iclass 25, count 0 2006.229.03:06:45.26#ibcon#wrote, iclass 25, count 0 2006.229.03:06:45.26#ibcon#about to read 3, iclass 25, count 0 2006.229.03:06:45.30#ibcon#read 3, iclass 25, count 0 2006.229.03:06:45.30#ibcon#about to read 4, iclass 25, count 0 2006.229.03:06:45.30#ibcon#read 4, iclass 25, count 0 2006.229.03:06:45.30#ibcon#about to read 5, iclass 25, count 0 2006.229.03:06:45.30#ibcon#read 5, iclass 25, count 0 2006.229.03:06:45.30#ibcon#about to read 6, iclass 25, count 0 2006.229.03:06:45.30#ibcon#read 6, iclass 25, count 0 2006.229.03:06:45.30#ibcon#end of sib2, iclass 25, count 0 2006.229.03:06:45.30#ibcon#*after write, iclass 25, count 0 2006.229.03:06:45.30#ibcon#*before return 0, iclass 25, count 0 2006.229.03:06:45.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:45.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:06:45.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:06:45.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:06:45.30$vck44/vb=7,4 2006.229.03:06:45.30#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.03:06:45.30#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.03:06:45.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:45.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:45.36#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:45.36#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:45.36#ibcon#enter wrdev, iclass 27, count 2 2006.229.03:06:45.36#ibcon#first serial, iclass 27, count 2 2006.229.03:06:45.36#ibcon#enter sib2, iclass 27, count 2 2006.229.03:06:45.36#ibcon#flushed, iclass 27, count 2 2006.229.03:06:45.36#ibcon#about to write, iclass 27, count 2 2006.229.03:06:45.36#ibcon#wrote, iclass 27, count 2 2006.229.03:06:45.36#ibcon#about to read 3, iclass 27, count 2 2006.229.03:06:45.38#ibcon#read 3, iclass 27, count 2 2006.229.03:06:45.38#ibcon#about to read 4, iclass 27, count 2 2006.229.03:06:45.38#ibcon#read 4, iclass 27, count 2 2006.229.03:06:45.38#ibcon#about to read 5, iclass 27, count 2 2006.229.03:06:45.38#ibcon#read 5, iclass 27, count 2 2006.229.03:06:45.38#ibcon#about to read 6, iclass 27, count 2 2006.229.03:06:45.38#ibcon#read 6, iclass 27, count 2 2006.229.03:06:45.38#ibcon#end of sib2, iclass 27, count 2 2006.229.03:06:45.38#ibcon#*mode == 0, iclass 27, count 2 2006.229.03:06:45.38#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.03:06:45.38#ibcon#[27=AT07-04\r\n] 2006.229.03:06:45.38#ibcon#*before write, iclass 27, count 2 2006.229.03:06:45.38#ibcon#enter sib2, iclass 27, count 2 2006.229.03:06:45.38#ibcon#flushed, iclass 27, count 2 2006.229.03:06:45.38#ibcon#about to write, iclass 27, count 2 2006.229.03:06:45.38#ibcon#wrote, iclass 27, count 2 2006.229.03:06:45.38#ibcon#about to read 3, iclass 27, count 2 2006.229.03:06:45.41#ibcon#read 3, iclass 27, count 2 2006.229.03:06:45.41#ibcon#about to read 4, iclass 27, count 2 2006.229.03:06:45.41#ibcon#read 4, iclass 27, count 2 2006.229.03:06:45.41#ibcon#about to read 5, iclass 27, count 2 2006.229.03:06:45.41#ibcon#read 5, iclass 27, count 2 2006.229.03:06:45.41#ibcon#about to read 6, iclass 27, count 2 2006.229.03:06:45.41#ibcon#read 6, iclass 27, count 2 2006.229.03:06:45.41#ibcon#end of sib2, iclass 27, count 2 2006.229.03:06:45.41#ibcon#*after write, iclass 27, count 2 2006.229.03:06:45.41#ibcon#*before return 0, iclass 27, count 2 2006.229.03:06:45.41#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:45.41#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:06:45.41#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.03:06:45.41#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:45.41#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:45.53#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:45.53#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:45.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:06:45.53#ibcon#first serial, iclass 27, count 0 2006.229.03:06:45.53#ibcon#enter sib2, iclass 27, count 0 2006.229.03:06:45.53#ibcon#flushed, iclass 27, count 0 2006.229.03:06:45.53#ibcon#about to write, iclass 27, count 0 2006.229.03:06:45.53#ibcon#wrote, iclass 27, count 0 2006.229.03:06:45.53#ibcon#about to read 3, iclass 27, count 0 2006.229.03:06:45.55#ibcon#read 3, iclass 27, count 0 2006.229.03:06:45.55#ibcon#about to read 4, iclass 27, count 0 2006.229.03:06:45.55#ibcon#read 4, iclass 27, count 0 2006.229.03:06:45.55#ibcon#about to read 5, iclass 27, count 0 2006.229.03:06:45.55#ibcon#read 5, iclass 27, count 0 2006.229.03:06:45.55#ibcon#about to read 6, iclass 27, count 0 2006.229.03:06:45.55#ibcon#read 6, iclass 27, count 0 2006.229.03:06:45.55#ibcon#end of sib2, iclass 27, count 0 2006.229.03:06:45.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:06:45.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:06:45.55#ibcon#[27=USB\r\n] 2006.229.03:06:45.55#ibcon#*before write, iclass 27, count 0 2006.229.03:06:45.55#ibcon#enter sib2, iclass 27, count 0 2006.229.03:06:45.55#ibcon#flushed, iclass 27, count 0 2006.229.03:06:45.55#ibcon#about to write, iclass 27, count 0 2006.229.03:06:45.55#ibcon#wrote, iclass 27, count 0 2006.229.03:06:45.55#ibcon#about to read 3, iclass 27, count 0 2006.229.03:06:45.58#ibcon#read 3, iclass 27, count 0 2006.229.03:06:45.58#ibcon#about to read 4, iclass 27, count 0 2006.229.03:06:45.58#ibcon#read 4, iclass 27, count 0 2006.229.03:06:45.58#ibcon#about to read 5, iclass 27, count 0 2006.229.03:06:45.58#ibcon#read 5, iclass 27, count 0 2006.229.03:06:45.58#ibcon#about to read 6, iclass 27, count 0 2006.229.03:06:45.58#ibcon#read 6, iclass 27, count 0 2006.229.03:06:45.58#ibcon#end of sib2, iclass 27, count 0 2006.229.03:06:45.58#ibcon#*after write, iclass 27, count 0 2006.229.03:06:45.58#ibcon#*before return 0, iclass 27, count 0 2006.229.03:06:45.58#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:45.58#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:06:45.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:06:45.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:06:45.58$vck44/vblo=8,744.99 2006.229.03:06:45.58#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.03:06:45.58#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.03:06:45.58#ibcon#ireg 17 cls_cnt 0 2006.229.03:06:45.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:45.58#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:45.58#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:45.58#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:06:45.58#ibcon#first serial, iclass 29, count 0 2006.229.03:06:45.58#ibcon#enter sib2, iclass 29, count 0 2006.229.03:06:45.58#ibcon#flushed, iclass 29, count 0 2006.229.03:06:45.58#ibcon#about to write, iclass 29, count 0 2006.229.03:06:45.58#ibcon#wrote, iclass 29, count 0 2006.229.03:06:45.58#ibcon#about to read 3, iclass 29, count 0 2006.229.03:06:45.60#ibcon#read 3, iclass 29, count 0 2006.229.03:06:45.60#ibcon#about to read 4, iclass 29, count 0 2006.229.03:06:45.60#ibcon#read 4, iclass 29, count 0 2006.229.03:06:45.60#ibcon#about to read 5, iclass 29, count 0 2006.229.03:06:45.60#ibcon#read 5, iclass 29, count 0 2006.229.03:06:45.60#ibcon#about to read 6, iclass 29, count 0 2006.229.03:06:45.60#ibcon#read 6, iclass 29, count 0 2006.229.03:06:45.60#ibcon#end of sib2, iclass 29, count 0 2006.229.03:06:45.60#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:06:45.60#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:06:45.60#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:06:45.60#ibcon#*before write, iclass 29, count 0 2006.229.03:06:45.60#ibcon#enter sib2, iclass 29, count 0 2006.229.03:06:45.60#ibcon#flushed, iclass 29, count 0 2006.229.03:06:45.60#ibcon#about to write, iclass 29, count 0 2006.229.03:06:45.60#ibcon#wrote, iclass 29, count 0 2006.229.03:06:45.60#ibcon#about to read 3, iclass 29, count 0 2006.229.03:06:45.64#ibcon#read 3, iclass 29, count 0 2006.229.03:06:45.64#ibcon#about to read 4, iclass 29, count 0 2006.229.03:06:45.64#ibcon#read 4, iclass 29, count 0 2006.229.03:06:45.64#ibcon#about to read 5, iclass 29, count 0 2006.229.03:06:45.64#ibcon#read 5, iclass 29, count 0 2006.229.03:06:45.64#ibcon#about to read 6, iclass 29, count 0 2006.229.03:06:45.64#ibcon#read 6, iclass 29, count 0 2006.229.03:06:45.64#ibcon#end of sib2, iclass 29, count 0 2006.229.03:06:45.64#ibcon#*after write, iclass 29, count 0 2006.229.03:06:45.64#ibcon#*before return 0, iclass 29, count 0 2006.229.03:06:45.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:45.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:06:45.64#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:06:45.64#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:06:45.64$vck44/vb=8,4 2006.229.03:06:45.64#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.03:06:45.64#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.03:06:45.64#ibcon#ireg 11 cls_cnt 2 2006.229.03:06:45.64#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:45.70#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:45.70#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:45.70#ibcon#enter wrdev, iclass 31, count 2 2006.229.03:06:45.70#ibcon#first serial, iclass 31, count 2 2006.229.03:06:45.70#ibcon#enter sib2, iclass 31, count 2 2006.229.03:06:45.70#ibcon#flushed, iclass 31, count 2 2006.229.03:06:45.70#ibcon#about to write, iclass 31, count 2 2006.229.03:06:45.70#ibcon#wrote, iclass 31, count 2 2006.229.03:06:45.70#ibcon#about to read 3, iclass 31, count 2 2006.229.03:06:45.72#ibcon#read 3, iclass 31, count 2 2006.229.03:06:45.72#ibcon#about to read 4, iclass 31, count 2 2006.229.03:06:45.72#ibcon#read 4, iclass 31, count 2 2006.229.03:06:45.72#ibcon#about to read 5, iclass 31, count 2 2006.229.03:06:45.72#ibcon#read 5, iclass 31, count 2 2006.229.03:06:45.72#ibcon#about to read 6, iclass 31, count 2 2006.229.03:06:45.72#ibcon#read 6, iclass 31, count 2 2006.229.03:06:45.72#ibcon#end of sib2, iclass 31, count 2 2006.229.03:06:45.72#ibcon#*mode == 0, iclass 31, count 2 2006.229.03:06:45.72#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.03:06:45.72#ibcon#[27=AT08-04\r\n] 2006.229.03:06:45.72#ibcon#*before write, iclass 31, count 2 2006.229.03:06:45.72#ibcon#enter sib2, iclass 31, count 2 2006.229.03:06:45.72#ibcon#flushed, iclass 31, count 2 2006.229.03:06:45.72#ibcon#about to write, iclass 31, count 2 2006.229.03:06:45.72#ibcon#wrote, iclass 31, count 2 2006.229.03:06:45.72#ibcon#about to read 3, iclass 31, count 2 2006.229.03:06:45.75#ibcon#read 3, iclass 31, count 2 2006.229.03:06:45.75#ibcon#about to read 4, iclass 31, count 2 2006.229.03:06:45.75#ibcon#read 4, iclass 31, count 2 2006.229.03:06:45.75#ibcon#about to read 5, iclass 31, count 2 2006.229.03:06:45.75#ibcon#read 5, iclass 31, count 2 2006.229.03:06:45.75#ibcon#about to read 6, iclass 31, count 2 2006.229.03:06:45.75#ibcon#read 6, iclass 31, count 2 2006.229.03:06:45.75#ibcon#end of sib2, iclass 31, count 2 2006.229.03:06:45.75#ibcon#*after write, iclass 31, count 2 2006.229.03:06:45.75#ibcon#*before return 0, iclass 31, count 2 2006.229.03:06:45.75#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:45.75#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:06:45.75#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.03:06:45.75#ibcon#ireg 7 cls_cnt 0 2006.229.03:06:45.75#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:45.87#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:45.87#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:45.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:06:45.87#ibcon#first serial, iclass 31, count 0 2006.229.03:06:45.87#ibcon#enter sib2, iclass 31, count 0 2006.229.03:06:45.87#ibcon#flushed, iclass 31, count 0 2006.229.03:06:45.87#ibcon#about to write, iclass 31, count 0 2006.229.03:06:45.87#ibcon#wrote, iclass 31, count 0 2006.229.03:06:45.87#ibcon#about to read 3, iclass 31, count 0 2006.229.03:06:45.89#ibcon#read 3, iclass 31, count 0 2006.229.03:06:45.89#ibcon#about to read 4, iclass 31, count 0 2006.229.03:06:45.89#ibcon#read 4, iclass 31, count 0 2006.229.03:06:45.89#ibcon#about to read 5, iclass 31, count 0 2006.229.03:06:45.89#ibcon#read 5, iclass 31, count 0 2006.229.03:06:45.89#ibcon#about to read 6, iclass 31, count 0 2006.229.03:06:45.89#ibcon#read 6, iclass 31, count 0 2006.229.03:06:45.89#ibcon#end of sib2, iclass 31, count 0 2006.229.03:06:45.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:06:45.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:06:45.89#ibcon#[27=USB\r\n] 2006.229.03:06:45.89#ibcon#*before write, iclass 31, count 0 2006.229.03:06:45.89#ibcon#enter sib2, iclass 31, count 0 2006.229.03:06:45.89#ibcon#flushed, iclass 31, count 0 2006.229.03:06:45.89#ibcon#about to write, iclass 31, count 0 2006.229.03:06:45.89#ibcon#wrote, iclass 31, count 0 2006.229.03:06:45.89#ibcon#about to read 3, iclass 31, count 0 2006.229.03:06:45.92#ibcon#read 3, iclass 31, count 0 2006.229.03:06:45.92#ibcon#about to read 4, iclass 31, count 0 2006.229.03:06:45.92#ibcon#read 4, iclass 31, count 0 2006.229.03:06:45.92#ibcon#about to read 5, iclass 31, count 0 2006.229.03:06:45.92#ibcon#read 5, iclass 31, count 0 2006.229.03:06:45.92#ibcon#about to read 6, iclass 31, count 0 2006.229.03:06:45.92#ibcon#read 6, iclass 31, count 0 2006.229.03:06:45.92#ibcon#end of sib2, iclass 31, count 0 2006.229.03:06:45.92#ibcon#*after write, iclass 31, count 0 2006.229.03:06:45.92#ibcon#*before return 0, iclass 31, count 0 2006.229.03:06:45.92#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:45.92#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:06:45.92#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:06:45.92#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:06:45.92$vck44/vabw=wide 2006.229.03:06:45.92#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.03:06:45.92#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.03:06:45.92#ibcon#ireg 8 cls_cnt 0 2006.229.03:06:45.92#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:45.92#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:45.92#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:45.92#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:06:45.92#ibcon#first serial, iclass 33, count 0 2006.229.03:06:45.92#ibcon#enter sib2, iclass 33, count 0 2006.229.03:06:45.92#ibcon#flushed, iclass 33, count 0 2006.229.03:06:45.92#ibcon#about to write, iclass 33, count 0 2006.229.03:06:45.92#ibcon#wrote, iclass 33, count 0 2006.229.03:06:45.92#ibcon#about to read 3, iclass 33, count 0 2006.229.03:06:45.94#ibcon#read 3, iclass 33, count 0 2006.229.03:06:45.94#ibcon#about to read 4, iclass 33, count 0 2006.229.03:06:45.94#ibcon#read 4, iclass 33, count 0 2006.229.03:06:45.94#ibcon#about to read 5, iclass 33, count 0 2006.229.03:06:45.94#ibcon#read 5, iclass 33, count 0 2006.229.03:06:45.94#ibcon#about to read 6, iclass 33, count 0 2006.229.03:06:45.94#ibcon#read 6, iclass 33, count 0 2006.229.03:06:45.94#ibcon#end of sib2, iclass 33, count 0 2006.229.03:06:45.94#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:06:45.94#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:06:45.94#ibcon#[25=BW32\r\n] 2006.229.03:06:45.94#ibcon#*before write, iclass 33, count 0 2006.229.03:06:45.94#ibcon#enter sib2, iclass 33, count 0 2006.229.03:06:45.94#ibcon#flushed, iclass 33, count 0 2006.229.03:06:45.94#ibcon#about to write, iclass 33, count 0 2006.229.03:06:45.94#ibcon#wrote, iclass 33, count 0 2006.229.03:06:45.94#ibcon#about to read 3, iclass 33, count 0 2006.229.03:06:45.97#ibcon#read 3, iclass 33, count 0 2006.229.03:06:45.97#ibcon#about to read 4, iclass 33, count 0 2006.229.03:06:45.97#ibcon#read 4, iclass 33, count 0 2006.229.03:06:45.97#ibcon#about to read 5, iclass 33, count 0 2006.229.03:06:45.97#ibcon#read 5, iclass 33, count 0 2006.229.03:06:45.97#ibcon#about to read 6, iclass 33, count 0 2006.229.03:06:45.97#ibcon#read 6, iclass 33, count 0 2006.229.03:06:45.97#ibcon#end of sib2, iclass 33, count 0 2006.229.03:06:45.97#ibcon#*after write, iclass 33, count 0 2006.229.03:06:45.97#ibcon#*before return 0, iclass 33, count 0 2006.229.03:06:45.97#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:45.97#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:06:45.97#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:06:45.97#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:06:45.97$vck44/vbbw=wide 2006.229.03:06:45.97#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.03:06:45.97#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.03:06:45.97#ibcon#ireg 8 cls_cnt 0 2006.229.03:06:45.97#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:06:46.04#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:06:46.04#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:06:46.04#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:06:46.04#ibcon#first serial, iclass 35, count 0 2006.229.03:06:46.04#ibcon#enter sib2, iclass 35, count 0 2006.229.03:06:46.04#ibcon#flushed, iclass 35, count 0 2006.229.03:06:46.04#ibcon#about to write, iclass 35, count 0 2006.229.03:06:46.04#ibcon#wrote, iclass 35, count 0 2006.229.03:06:46.04#ibcon#about to read 3, iclass 35, count 0 2006.229.03:06:46.06#ibcon#read 3, iclass 35, count 0 2006.229.03:06:46.06#ibcon#about to read 4, iclass 35, count 0 2006.229.03:06:46.06#ibcon#read 4, iclass 35, count 0 2006.229.03:06:46.06#ibcon#about to read 5, iclass 35, count 0 2006.229.03:06:46.06#ibcon#read 5, iclass 35, count 0 2006.229.03:06:46.06#ibcon#about to read 6, iclass 35, count 0 2006.229.03:06:46.06#ibcon#read 6, iclass 35, count 0 2006.229.03:06:46.06#ibcon#end of sib2, iclass 35, count 0 2006.229.03:06:46.06#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:06:46.06#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:06:46.06#ibcon#[27=BW32\r\n] 2006.229.03:06:46.06#ibcon#*before write, iclass 35, count 0 2006.229.03:06:46.06#ibcon#enter sib2, iclass 35, count 0 2006.229.03:06:46.06#ibcon#flushed, iclass 35, count 0 2006.229.03:06:46.06#ibcon#about to write, iclass 35, count 0 2006.229.03:06:46.06#ibcon#wrote, iclass 35, count 0 2006.229.03:06:46.06#ibcon#about to read 3, iclass 35, count 0 2006.229.03:06:46.09#ibcon#read 3, iclass 35, count 0 2006.229.03:06:46.09#ibcon#about to read 4, iclass 35, count 0 2006.229.03:06:46.09#ibcon#read 4, iclass 35, count 0 2006.229.03:06:46.09#ibcon#about to read 5, iclass 35, count 0 2006.229.03:06:46.09#ibcon#read 5, iclass 35, count 0 2006.229.03:06:46.09#ibcon#about to read 6, iclass 35, count 0 2006.229.03:06:46.09#ibcon#read 6, iclass 35, count 0 2006.229.03:06:46.09#ibcon#end of sib2, iclass 35, count 0 2006.229.03:06:46.09#ibcon#*after write, iclass 35, count 0 2006.229.03:06:46.09#ibcon#*before return 0, iclass 35, count 0 2006.229.03:06:46.09#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:06:46.09#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:06:46.09#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:06:46.09#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:06:46.09$setupk4/ifdk4 2006.229.03:06:46.09$ifdk4/lo= 2006.229.03:06:46.09$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:06:46.09$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:06:46.09$ifdk4/patch= 2006.229.03:06:46.09$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:06:46.09$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:06:46.09$setupk4/!*+20s 2006.229.03:06:48.44#abcon#<5=/04 1.7 3.1 28.521001000.8\r\n> 2006.229.03:06:48.46#abcon#{5=INTERFACE CLEAR} 2006.229.03:06:48.52#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:06:58.61#abcon#<5=/04 1.8 3.1 28.511001000.8\r\n> 2006.229.03:06:58.63#abcon#{5=INTERFACE CLEAR} 2006.229.03:06:58.69#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:07:00.60$setupk4/"tpicd 2006.229.03:07:00.60$setupk4/echo=off 2006.229.03:07:00.60$setupk4/xlog=off 2006.229.03:07:00.60:!2006.229.03:09:20 2006.229.03:07:08.14#trakl#Source acquired 2006.229.03:07:09.14#flagr#flagr/antenna,acquired 2006.229.03:09:20.00:preob 2006.229.03:09:20.14/onsource/TRACKING 2006.229.03:09:20.14:!2006.229.03:09:30 2006.229.03:09:30.00:"tape 2006.229.03:09:30.00:"st=record 2006.229.03:09:30.00:data_valid=on 2006.229.03:09:30.00:midob 2006.229.03:09:30.13/onsource/TRACKING 2006.229.03:09:30.13/wx/28.55,1000.8,100 2006.229.03:09:30.30/cable/+6.4083E-03 2006.229.03:09:31.39/va/01,08,usb,yes,31,34 2006.229.03:09:31.39/va/02,07,usb,yes,34,34 2006.229.03:09:31.39/va/03,06,usb,yes,42,44 2006.229.03:09:31.39/va/04,07,usb,yes,35,37 2006.229.03:09:31.39/va/05,04,usb,yes,31,32 2006.229.03:09:31.39/va/06,04,usb,yes,35,35 2006.229.03:09:31.39/va/07,05,usb,yes,31,32 2006.229.03:09:31.39/va/08,06,usb,yes,22,28 2006.229.03:09:31.62/valo/01,524.99,yes,locked 2006.229.03:09:31.62/valo/02,534.99,yes,locked 2006.229.03:09:31.62/valo/03,564.99,yes,locked 2006.229.03:09:31.62/valo/04,624.99,yes,locked 2006.229.03:09:31.62/valo/05,734.99,yes,locked 2006.229.03:09:31.62/valo/06,814.99,yes,locked 2006.229.03:09:31.62/valo/07,864.99,yes,locked 2006.229.03:09:31.62/valo/08,884.99,yes,locked 2006.229.03:09:32.71/vb/01,04,usb,yes,32,29 2006.229.03:09:32.71/vb/02,04,usb,yes,34,34 2006.229.03:09:32.71/vb/03,04,usb,yes,31,34 2006.229.03:09:32.71/vb/04,04,usb,yes,36,35 2006.229.03:09:32.71/vb/05,04,usb,yes,28,30 2006.229.03:09:32.71/vb/06,04,usb,yes,32,28 2006.229.03:09:32.71/vb/07,04,usb,yes,32,32 2006.229.03:09:32.71/vb/08,04,usb,yes,30,33 2006.229.03:09:32.95/vblo/01,629.99,yes,locked 2006.229.03:09:32.95/vblo/02,634.99,yes,locked 2006.229.03:09:32.95/vblo/03,649.99,yes,locked 2006.229.03:09:32.95/vblo/04,679.99,yes,locked 2006.229.03:09:32.95/vblo/05,709.99,yes,locked 2006.229.03:09:32.95/vblo/06,719.99,yes,locked 2006.229.03:09:32.95/vblo/07,734.99,yes,locked 2006.229.03:09:32.95/vblo/08,744.99,yes,locked 2006.229.03:09:33.10/vabw/8 2006.229.03:09:33.25/vbbw/8 2006.229.03:09:33.34/xfe/off,on,12.0 2006.229.03:09:33.72/ifatt/23,28,28,28 2006.229.03:09:34.08/fmout-gps/S +4.52E-07 2006.229.03:09:34.12:!2006.229.03:13:00 2006.229.03:13:00.00:data_valid=off 2006.229.03:13:00.00:"et 2006.229.03:13:00.00:!+3s 2006.229.03:13:03.02:"tape 2006.229.03:13:03.02:postob 2006.229.03:13:03.14/cable/+6.4084E-03 2006.229.03:13:03.14/wx/28.60,1000.7,100 2006.229.03:13:04.08/fmout-gps/S +4.50E-07 2006.229.03:13:04.08:scan_name=229-0316,jd0608,40 2006.229.03:13:04.08:source=4c39.25,092703.01,390220.9,2000.0,cw 2006.229.03:13:04.14#flagr#flagr/antenna,new-source 2006.229.03:13:05.14:checkk5 2006.229.03:13:05.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:13:05.83/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:13:06.18/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:13:06.52/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:13:06.86/chk_obsdata//k5ts1/T2290309??a.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.03:13:07.21/chk_obsdata//k5ts2/T2290309??b.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.03:13:07.56/chk_obsdata//k5ts3/T2290309??c.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.03:13:07.91/chk_obsdata//k5ts4/T2290309??d.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.03:13:08.57/k5log//k5ts1_log_newline 2006.229.03:13:09.22/k5log//k5ts2_log_newline 2006.229.03:13:09.88/k5log//k5ts3_log_newline 2006.229.03:13:10.53/k5log//k5ts4_log_newline 2006.229.03:13:10.56/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:13:10.56:setupk4=1 2006.229.03:13:10.56$setupk4/echo=on 2006.229.03:13:10.56$setupk4/pcalon 2006.229.03:13:10.56$pcalon/"no phase cal control is implemented here 2006.229.03:13:10.56$setupk4/"tpicd=stop 2006.229.03:13:10.56$setupk4/"rec=synch_on 2006.229.03:13:10.56$setupk4/"rec_mode=128 2006.229.03:13:10.56$setupk4/!* 2006.229.03:13:10.56$setupk4/recpk4 2006.229.03:13:10.56$recpk4/recpatch= 2006.229.03:13:10.56$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:13:10.56$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:13:10.56$setupk4/vck44 2006.229.03:13:10.56$vck44/valo=1,524.99 2006.229.03:13:10.56#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.03:13:10.56#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.03:13:10.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:10.56#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:10.56#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:10.56#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:10.56#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:13:10.56#ibcon#first serial, iclass 12, count 0 2006.229.03:13:10.56#ibcon#enter sib2, iclass 12, count 0 2006.229.03:13:10.56#ibcon#flushed, iclass 12, count 0 2006.229.03:13:10.56#ibcon#about to write, iclass 12, count 0 2006.229.03:13:10.56#ibcon#wrote, iclass 12, count 0 2006.229.03:13:10.56#ibcon#about to read 3, iclass 12, count 0 2006.229.03:13:10.58#ibcon#read 3, iclass 12, count 0 2006.229.03:13:10.58#ibcon#about to read 4, iclass 12, count 0 2006.229.03:13:10.58#ibcon#read 4, iclass 12, count 0 2006.229.03:13:10.58#ibcon#about to read 5, iclass 12, count 0 2006.229.03:13:10.58#ibcon#read 5, iclass 12, count 0 2006.229.03:13:10.58#ibcon#about to read 6, iclass 12, count 0 2006.229.03:13:10.58#ibcon#read 6, iclass 12, count 0 2006.229.03:13:10.58#ibcon#end of sib2, iclass 12, count 0 2006.229.03:13:10.58#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:13:10.58#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:13:10.58#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:13:10.58#ibcon#*before write, iclass 12, count 0 2006.229.03:13:10.58#ibcon#enter sib2, iclass 12, count 0 2006.229.03:13:10.58#ibcon#flushed, iclass 12, count 0 2006.229.03:13:10.58#ibcon#about to write, iclass 12, count 0 2006.229.03:13:10.58#ibcon#wrote, iclass 12, count 0 2006.229.03:13:10.58#ibcon#about to read 3, iclass 12, count 0 2006.229.03:13:10.63#ibcon#read 3, iclass 12, count 0 2006.229.03:13:10.63#ibcon#about to read 4, iclass 12, count 0 2006.229.03:13:10.63#ibcon#read 4, iclass 12, count 0 2006.229.03:13:10.63#ibcon#about to read 5, iclass 12, count 0 2006.229.03:13:10.63#ibcon#read 5, iclass 12, count 0 2006.229.03:13:10.63#ibcon#about to read 6, iclass 12, count 0 2006.229.03:13:10.63#ibcon#read 6, iclass 12, count 0 2006.229.03:13:10.63#ibcon#end of sib2, iclass 12, count 0 2006.229.03:13:10.63#ibcon#*after write, iclass 12, count 0 2006.229.03:13:10.63#ibcon#*before return 0, iclass 12, count 0 2006.229.03:13:10.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:10.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:10.63#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:13:10.63#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:13:10.63$vck44/va=1,8 2006.229.03:13:10.63#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.03:13:10.63#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.03:13:10.63#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:10.63#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:10.63#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:10.63#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:10.63#ibcon#enter wrdev, iclass 14, count 2 2006.229.03:13:10.63#ibcon#first serial, iclass 14, count 2 2006.229.03:13:10.63#ibcon#enter sib2, iclass 14, count 2 2006.229.03:13:10.63#ibcon#flushed, iclass 14, count 2 2006.229.03:13:10.63#ibcon#about to write, iclass 14, count 2 2006.229.03:13:10.63#ibcon#wrote, iclass 14, count 2 2006.229.03:13:10.63#ibcon#about to read 3, iclass 14, count 2 2006.229.03:13:10.65#ibcon#read 3, iclass 14, count 2 2006.229.03:13:10.65#ibcon#about to read 4, iclass 14, count 2 2006.229.03:13:10.65#ibcon#read 4, iclass 14, count 2 2006.229.03:13:10.65#ibcon#about to read 5, iclass 14, count 2 2006.229.03:13:10.65#ibcon#read 5, iclass 14, count 2 2006.229.03:13:10.65#ibcon#about to read 6, iclass 14, count 2 2006.229.03:13:10.65#ibcon#read 6, iclass 14, count 2 2006.229.03:13:10.65#ibcon#end of sib2, iclass 14, count 2 2006.229.03:13:10.65#ibcon#*mode == 0, iclass 14, count 2 2006.229.03:13:10.65#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.03:13:10.65#ibcon#[25=AT01-08\r\n] 2006.229.03:13:10.65#ibcon#*before write, iclass 14, count 2 2006.229.03:13:10.65#ibcon#enter sib2, iclass 14, count 2 2006.229.03:13:10.65#ibcon#flushed, iclass 14, count 2 2006.229.03:13:10.65#ibcon#about to write, iclass 14, count 2 2006.229.03:13:10.65#ibcon#wrote, iclass 14, count 2 2006.229.03:13:10.65#ibcon#about to read 3, iclass 14, count 2 2006.229.03:13:10.68#ibcon#read 3, iclass 14, count 2 2006.229.03:13:10.68#ibcon#about to read 4, iclass 14, count 2 2006.229.03:13:10.68#ibcon#read 4, iclass 14, count 2 2006.229.03:13:10.68#ibcon#about to read 5, iclass 14, count 2 2006.229.03:13:10.68#ibcon#read 5, iclass 14, count 2 2006.229.03:13:10.68#ibcon#about to read 6, iclass 14, count 2 2006.229.03:13:10.68#ibcon#read 6, iclass 14, count 2 2006.229.03:13:10.68#ibcon#end of sib2, iclass 14, count 2 2006.229.03:13:10.68#ibcon#*after write, iclass 14, count 2 2006.229.03:13:10.68#ibcon#*before return 0, iclass 14, count 2 2006.229.03:13:10.68#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:10.68#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:10.68#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.03:13:10.68#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:10.68#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:10.80#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:10.80#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:10.80#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:13:10.80#ibcon#first serial, iclass 14, count 0 2006.229.03:13:10.80#ibcon#enter sib2, iclass 14, count 0 2006.229.03:13:10.80#ibcon#flushed, iclass 14, count 0 2006.229.03:13:10.80#ibcon#about to write, iclass 14, count 0 2006.229.03:13:10.80#ibcon#wrote, iclass 14, count 0 2006.229.03:13:10.80#ibcon#about to read 3, iclass 14, count 0 2006.229.03:13:10.82#ibcon#read 3, iclass 14, count 0 2006.229.03:13:10.82#ibcon#about to read 4, iclass 14, count 0 2006.229.03:13:10.82#ibcon#read 4, iclass 14, count 0 2006.229.03:13:10.82#ibcon#about to read 5, iclass 14, count 0 2006.229.03:13:10.82#ibcon#read 5, iclass 14, count 0 2006.229.03:13:10.82#ibcon#about to read 6, iclass 14, count 0 2006.229.03:13:10.82#ibcon#read 6, iclass 14, count 0 2006.229.03:13:10.82#ibcon#end of sib2, iclass 14, count 0 2006.229.03:13:10.82#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:13:10.82#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:13:10.82#ibcon#[25=USB\r\n] 2006.229.03:13:10.82#ibcon#*before write, iclass 14, count 0 2006.229.03:13:10.82#ibcon#enter sib2, iclass 14, count 0 2006.229.03:13:10.82#ibcon#flushed, iclass 14, count 0 2006.229.03:13:10.82#ibcon#about to write, iclass 14, count 0 2006.229.03:13:10.82#ibcon#wrote, iclass 14, count 0 2006.229.03:13:10.82#ibcon#about to read 3, iclass 14, count 0 2006.229.03:13:10.85#ibcon#read 3, iclass 14, count 0 2006.229.03:13:10.85#ibcon#about to read 4, iclass 14, count 0 2006.229.03:13:10.85#ibcon#read 4, iclass 14, count 0 2006.229.03:13:10.85#ibcon#about to read 5, iclass 14, count 0 2006.229.03:13:10.85#ibcon#read 5, iclass 14, count 0 2006.229.03:13:10.85#ibcon#about to read 6, iclass 14, count 0 2006.229.03:13:10.85#ibcon#read 6, iclass 14, count 0 2006.229.03:13:10.85#ibcon#end of sib2, iclass 14, count 0 2006.229.03:13:10.85#ibcon#*after write, iclass 14, count 0 2006.229.03:13:10.85#ibcon#*before return 0, iclass 14, count 0 2006.229.03:13:10.85#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:10.85#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:10.85#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:13:10.85#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:13:10.85$vck44/valo=2,534.99 2006.229.03:13:10.85#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:13:10.85#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:13:10.85#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:10.85#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:10.85#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:10.85#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:10.85#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:13:10.85#ibcon#first serial, iclass 16, count 0 2006.229.03:13:10.85#ibcon#enter sib2, iclass 16, count 0 2006.229.03:13:10.85#ibcon#flushed, iclass 16, count 0 2006.229.03:13:10.85#ibcon#about to write, iclass 16, count 0 2006.229.03:13:10.85#ibcon#wrote, iclass 16, count 0 2006.229.03:13:10.85#ibcon#about to read 3, iclass 16, count 0 2006.229.03:13:10.87#ibcon#read 3, iclass 16, count 0 2006.229.03:13:10.87#ibcon#about to read 4, iclass 16, count 0 2006.229.03:13:10.87#ibcon#read 4, iclass 16, count 0 2006.229.03:13:10.87#ibcon#about to read 5, iclass 16, count 0 2006.229.03:13:10.87#ibcon#read 5, iclass 16, count 0 2006.229.03:13:10.87#ibcon#about to read 6, iclass 16, count 0 2006.229.03:13:10.87#ibcon#read 6, iclass 16, count 0 2006.229.03:13:10.87#ibcon#end of sib2, iclass 16, count 0 2006.229.03:13:10.87#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:13:10.87#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:13:10.87#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:13:10.87#ibcon#*before write, iclass 16, count 0 2006.229.03:13:10.87#ibcon#enter sib2, iclass 16, count 0 2006.229.03:13:10.87#ibcon#flushed, iclass 16, count 0 2006.229.03:13:10.87#ibcon#about to write, iclass 16, count 0 2006.229.03:13:10.87#ibcon#wrote, iclass 16, count 0 2006.229.03:13:10.87#ibcon#about to read 3, iclass 16, count 0 2006.229.03:13:10.91#ibcon#read 3, iclass 16, count 0 2006.229.03:13:10.91#ibcon#about to read 4, iclass 16, count 0 2006.229.03:13:10.91#ibcon#read 4, iclass 16, count 0 2006.229.03:13:10.91#ibcon#about to read 5, iclass 16, count 0 2006.229.03:13:10.91#ibcon#read 5, iclass 16, count 0 2006.229.03:13:10.91#ibcon#about to read 6, iclass 16, count 0 2006.229.03:13:10.91#ibcon#read 6, iclass 16, count 0 2006.229.03:13:10.91#ibcon#end of sib2, iclass 16, count 0 2006.229.03:13:10.91#ibcon#*after write, iclass 16, count 0 2006.229.03:13:10.91#ibcon#*before return 0, iclass 16, count 0 2006.229.03:13:10.91#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:10.91#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:10.91#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:13:10.91#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:13:10.91$vck44/va=2,7 2006.229.03:13:10.91#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.03:13:10.91#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.03:13:10.91#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:10.91#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:10.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:10.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:10.97#ibcon#enter wrdev, iclass 18, count 2 2006.229.03:13:10.97#ibcon#first serial, iclass 18, count 2 2006.229.03:13:10.97#ibcon#enter sib2, iclass 18, count 2 2006.229.03:13:10.97#ibcon#flushed, iclass 18, count 2 2006.229.03:13:10.97#ibcon#about to write, iclass 18, count 2 2006.229.03:13:10.97#ibcon#wrote, iclass 18, count 2 2006.229.03:13:10.97#ibcon#about to read 3, iclass 18, count 2 2006.229.03:13:10.99#ibcon#read 3, iclass 18, count 2 2006.229.03:13:10.99#ibcon#about to read 4, iclass 18, count 2 2006.229.03:13:10.99#ibcon#read 4, iclass 18, count 2 2006.229.03:13:10.99#ibcon#about to read 5, iclass 18, count 2 2006.229.03:13:10.99#ibcon#read 5, iclass 18, count 2 2006.229.03:13:10.99#ibcon#about to read 6, iclass 18, count 2 2006.229.03:13:10.99#ibcon#read 6, iclass 18, count 2 2006.229.03:13:10.99#ibcon#end of sib2, iclass 18, count 2 2006.229.03:13:10.99#ibcon#*mode == 0, iclass 18, count 2 2006.229.03:13:10.99#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.03:13:10.99#ibcon#[25=AT02-07\r\n] 2006.229.03:13:10.99#ibcon#*before write, iclass 18, count 2 2006.229.03:13:10.99#ibcon#enter sib2, iclass 18, count 2 2006.229.03:13:10.99#ibcon#flushed, iclass 18, count 2 2006.229.03:13:10.99#ibcon#about to write, iclass 18, count 2 2006.229.03:13:10.99#ibcon#wrote, iclass 18, count 2 2006.229.03:13:10.99#ibcon#about to read 3, iclass 18, count 2 2006.229.03:13:11.02#ibcon#read 3, iclass 18, count 2 2006.229.03:13:11.02#ibcon#about to read 4, iclass 18, count 2 2006.229.03:13:11.02#ibcon#read 4, iclass 18, count 2 2006.229.03:13:11.02#ibcon#about to read 5, iclass 18, count 2 2006.229.03:13:11.02#ibcon#read 5, iclass 18, count 2 2006.229.03:13:11.02#ibcon#about to read 6, iclass 18, count 2 2006.229.03:13:11.02#ibcon#read 6, iclass 18, count 2 2006.229.03:13:11.02#ibcon#end of sib2, iclass 18, count 2 2006.229.03:13:11.02#ibcon#*after write, iclass 18, count 2 2006.229.03:13:11.02#ibcon#*before return 0, iclass 18, count 2 2006.229.03:13:11.02#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:11.02#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:11.02#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.03:13:11.02#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:11.02#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:11.14#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:11.14#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:11.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:13:11.14#ibcon#first serial, iclass 18, count 0 2006.229.03:13:11.14#ibcon#enter sib2, iclass 18, count 0 2006.229.03:13:11.14#ibcon#flushed, iclass 18, count 0 2006.229.03:13:11.14#ibcon#about to write, iclass 18, count 0 2006.229.03:13:11.14#ibcon#wrote, iclass 18, count 0 2006.229.03:13:11.14#ibcon#about to read 3, iclass 18, count 0 2006.229.03:13:11.16#ibcon#read 3, iclass 18, count 0 2006.229.03:13:11.16#ibcon#about to read 4, iclass 18, count 0 2006.229.03:13:11.16#ibcon#read 4, iclass 18, count 0 2006.229.03:13:11.16#ibcon#about to read 5, iclass 18, count 0 2006.229.03:13:11.16#ibcon#read 5, iclass 18, count 0 2006.229.03:13:11.16#ibcon#about to read 6, iclass 18, count 0 2006.229.03:13:11.16#ibcon#read 6, iclass 18, count 0 2006.229.03:13:11.16#ibcon#end of sib2, iclass 18, count 0 2006.229.03:13:11.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:13:11.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:13:11.16#ibcon#[25=USB\r\n] 2006.229.03:13:11.16#ibcon#*before write, iclass 18, count 0 2006.229.03:13:11.16#ibcon#enter sib2, iclass 18, count 0 2006.229.03:13:11.16#ibcon#flushed, iclass 18, count 0 2006.229.03:13:11.16#ibcon#about to write, iclass 18, count 0 2006.229.03:13:11.16#ibcon#wrote, iclass 18, count 0 2006.229.03:13:11.16#ibcon#about to read 3, iclass 18, count 0 2006.229.03:13:11.19#ibcon#read 3, iclass 18, count 0 2006.229.03:13:11.19#ibcon#about to read 4, iclass 18, count 0 2006.229.03:13:11.19#ibcon#read 4, iclass 18, count 0 2006.229.03:13:11.19#ibcon#about to read 5, iclass 18, count 0 2006.229.03:13:11.19#ibcon#read 5, iclass 18, count 0 2006.229.03:13:11.19#ibcon#about to read 6, iclass 18, count 0 2006.229.03:13:11.19#ibcon#read 6, iclass 18, count 0 2006.229.03:13:11.19#ibcon#end of sib2, iclass 18, count 0 2006.229.03:13:11.19#ibcon#*after write, iclass 18, count 0 2006.229.03:13:11.19#ibcon#*before return 0, iclass 18, count 0 2006.229.03:13:11.19#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:11.19#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:11.19#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:13:11.19#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:13:11.19$vck44/valo=3,564.99 2006.229.03:13:11.19#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.03:13:11.19#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.03:13:11.19#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:11.19#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:11.19#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:11.19#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:11.19#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:13:11.19#ibcon#first serial, iclass 20, count 0 2006.229.03:13:11.19#ibcon#enter sib2, iclass 20, count 0 2006.229.03:13:11.19#ibcon#flushed, iclass 20, count 0 2006.229.03:13:11.19#ibcon#about to write, iclass 20, count 0 2006.229.03:13:11.19#ibcon#wrote, iclass 20, count 0 2006.229.03:13:11.19#ibcon#about to read 3, iclass 20, count 0 2006.229.03:13:11.21#ibcon#read 3, iclass 20, count 0 2006.229.03:13:11.21#ibcon#about to read 4, iclass 20, count 0 2006.229.03:13:11.21#ibcon#read 4, iclass 20, count 0 2006.229.03:13:11.21#ibcon#about to read 5, iclass 20, count 0 2006.229.03:13:11.21#ibcon#read 5, iclass 20, count 0 2006.229.03:13:11.21#ibcon#about to read 6, iclass 20, count 0 2006.229.03:13:11.21#ibcon#read 6, iclass 20, count 0 2006.229.03:13:11.21#ibcon#end of sib2, iclass 20, count 0 2006.229.03:13:11.21#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:13:11.21#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:13:11.21#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:13:11.21#ibcon#*before write, iclass 20, count 0 2006.229.03:13:11.21#ibcon#enter sib2, iclass 20, count 0 2006.229.03:13:11.21#ibcon#flushed, iclass 20, count 0 2006.229.03:13:11.21#ibcon#about to write, iclass 20, count 0 2006.229.03:13:11.21#ibcon#wrote, iclass 20, count 0 2006.229.03:13:11.21#ibcon#about to read 3, iclass 20, count 0 2006.229.03:13:11.25#ibcon#read 3, iclass 20, count 0 2006.229.03:13:11.25#ibcon#about to read 4, iclass 20, count 0 2006.229.03:13:11.25#ibcon#read 4, iclass 20, count 0 2006.229.03:13:11.25#ibcon#about to read 5, iclass 20, count 0 2006.229.03:13:11.25#ibcon#read 5, iclass 20, count 0 2006.229.03:13:11.25#ibcon#about to read 6, iclass 20, count 0 2006.229.03:13:11.25#ibcon#read 6, iclass 20, count 0 2006.229.03:13:11.25#ibcon#end of sib2, iclass 20, count 0 2006.229.03:13:11.25#ibcon#*after write, iclass 20, count 0 2006.229.03:13:11.25#ibcon#*before return 0, iclass 20, count 0 2006.229.03:13:11.25#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:11.25#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:11.25#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:13:11.25#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:13:11.25$vck44/va=3,6 2006.229.03:13:11.25#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.03:13:11.25#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.03:13:11.25#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:11.25#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:11.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:11.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:11.31#ibcon#enter wrdev, iclass 22, count 2 2006.229.03:13:11.31#ibcon#first serial, iclass 22, count 2 2006.229.03:13:11.31#ibcon#enter sib2, iclass 22, count 2 2006.229.03:13:11.31#ibcon#flushed, iclass 22, count 2 2006.229.03:13:11.31#ibcon#about to write, iclass 22, count 2 2006.229.03:13:11.31#ibcon#wrote, iclass 22, count 2 2006.229.03:13:11.31#ibcon#about to read 3, iclass 22, count 2 2006.229.03:13:11.33#ibcon#read 3, iclass 22, count 2 2006.229.03:13:11.33#ibcon#about to read 4, iclass 22, count 2 2006.229.03:13:11.33#ibcon#read 4, iclass 22, count 2 2006.229.03:13:11.33#ibcon#about to read 5, iclass 22, count 2 2006.229.03:13:11.33#ibcon#read 5, iclass 22, count 2 2006.229.03:13:11.33#ibcon#about to read 6, iclass 22, count 2 2006.229.03:13:11.33#ibcon#read 6, iclass 22, count 2 2006.229.03:13:11.33#ibcon#end of sib2, iclass 22, count 2 2006.229.03:13:11.33#ibcon#*mode == 0, iclass 22, count 2 2006.229.03:13:11.33#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.03:13:11.33#ibcon#[25=AT03-06\r\n] 2006.229.03:13:11.33#ibcon#*before write, iclass 22, count 2 2006.229.03:13:11.33#ibcon#enter sib2, iclass 22, count 2 2006.229.03:13:11.33#ibcon#flushed, iclass 22, count 2 2006.229.03:13:11.33#ibcon#about to write, iclass 22, count 2 2006.229.03:13:11.33#ibcon#wrote, iclass 22, count 2 2006.229.03:13:11.33#ibcon#about to read 3, iclass 22, count 2 2006.229.03:13:11.36#ibcon#read 3, iclass 22, count 2 2006.229.03:13:11.36#ibcon#about to read 4, iclass 22, count 2 2006.229.03:13:11.36#ibcon#read 4, iclass 22, count 2 2006.229.03:13:11.36#ibcon#about to read 5, iclass 22, count 2 2006.229.03:13:11.36#ibcon#read 5, iclass 22, count 2 2006.229.03:13:11.36#ibcon#about to read 6, iclass 22, count 2 2006.229.03:13:11.36#ibcon#read 6, iclass 22, count 2 2006.229.03:13:11.36#ibcon#end of sib2, iclass 22, count 2 2006.229.03:13:11.36#ibcon#*after write, iclass 22, count 2 2006.229.03:13:11.36#ibcon#*before return 0, iclass 22, count 2 2006.229.03:13:11.36#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:11.36#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:11.36#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.03:13:11.36#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:11.36#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:11.48#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:11.48#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:11.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:13:11.48#ibcon#first serial, iclass 22, count 0 2006.229.03:13:11.48#ibcon#enter sib2, iclass 22, count 0 2006.229.03:13:11.48#ibcon#flushed, iclass 22, count 0 2006.229.03:13:11.48#ibcon#about to write, iclass 22, count 0 2006.229.03:13:11.48#ibcon#wrote, iclass 22, count 0 2006.229.03:13:11.48#ibcon#about to read 3, iclass 22, count 0 2006.229.03:13:11.50#ibcon#read 3, iclass 22, count 0 2006.229.03:13:11.50#ibcon#about to read 4, iclass 22, count 0 2006.229.03:13:11.50#ibcon#read 4, iclass 22, count 0 2006.229.03:13:11.50#ibcon#about to read 5, iclass 22, count 0 2006.229.03:13:11.50#ibcon#read 5, iclass 22, count 0 2006.229.03:13:11.50#ibcon#about to read 6, iclass 22, count 0 2006.229.03:13:11.50#ibcon#read 6, iclass 22, count 0 2006.229.03:13:11.50#ibcon#end of sib2, iclass 22, count 0 2006.229.03:13:11.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:13:11.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:13:11.50#ibcon#[25=USB\r\n] 2006.229.03:13:11.50#ibcon#*before write, iclass 22, count 0 2006.229.03:13:11.50#ibcon#enter sib2, iclass 22, count 0 2006.229.03:13:11.50#ibcon#flushed, iclass 22, count 0 2006.229.03:13:11.50#ibcon#about to write, iclass 22, count 0 2006.229.03:13:11.50#ibcon#wrote, iclass 22, count 0 2006.229.03:13:11.50#ibcon#about to read 3, iclass 22, count 0 2006.229.03:13:11.53#ibcon#read 3, iclass 22, count 0 2006.229.03:13:11.53#ibcon#about to read 4, iclass 22, count 0 2006.229.03:13:11.53#ibcon#read 4, iclass 22, count 0 2006.229.03:13:11.53#ibcon#about to read 5, iclass 22, count 0 2006.229.03:13:11.53#ibcon#read 5, iclass 22, count 0 2006.229.03:13:11.53#ibcon#about to read 6, iclass 22, count 0 2006.229.03:13:11.53#ibcon#read 6, iclass 22, count 0 2006.229.03:13:11.53#ibcon#end of sib2, iclass 22, count 0 2006.229.03:13:11.53#ibcon#*after write, iclass 22, count 0 2006.229.03:13:11.53#ibcon#*before return 0, iclass 22, count 0 2006.229.03:13:11.53#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:11.53#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:11.53#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:13:11.53#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:13:11.53$vck44/valo=4,624.99 2006.229.03:13:11.53#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.03:13:11.53#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.03:13:11.53#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:11.53#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:11.53#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:11.53#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:11.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:13:11.53#ibcon#first serial, iclass 24, count 0 2006.229.03:13:11.53#ibcon#enter sib2, iclass 24, count 0 2006.229.03:13:11.53#ibcon#flushed, iclass 24, count 0 2006.229.03:13:11.53#ibcon#about to write, iclass 24, count 0 2006.229.03:13:11.53#ibcon#wrote, iclass 24, count 0 2006.229.03:13:11.53#ibcon#about to read 3, iclass 24, count 0 2006.229.03:13:11.55#ibcon#read 3, iclass 24, count 0 2006.229.03:13:11.55#ibcon#about to read 4, iclass 24, count 0 2006.229.03:13:11.55#ibcon#read 4, iclass 24, count 0 2006.229.03:13:11.55#ibcon#about to read 5, iclass 24, count 0 2006.229.03:13:11.55#ibcon#read 5, iclass 24, count 0 2006.229.03:13:11.55#ibcon#about to read 6, iclass 24, count 0 2006.229.03:13:11.55#ibcon#read 6, iclass 24, count 0 2006.229.03:13:11.55#ibcon#end of sib2, iclass 24, count 0 2006.229.03:13:11.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:13:11.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:13:11.55#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:13:11.55#ibcon#*before write, iclass 24, count 0 2006.229.03:13:11.55#ibcon#enter sib2, iclass 24, count 0 2006.229.03:13:11.55#ibcon#flushed, iclass 24, count 0 2006.229.03:13:11.55#ibcon#about to write, iclass 24, count 0 2006.229.03:13:11.55#ibcon#wrote, iclass 24, count 0 2006.229.03:13:11.55#ibcon#about to read 3, iclass 24, count 0 2006.229.03:13:11.59#ibcon#read 3, iclass 24, count 0 2006.229.03:13:11.59#ibcon#about to read 4, iclass 24, count 0 2006.229.03:13:11.59#ibcon#read 4, iclass 24, count 0 2006.229.03:13:11.59#ibcon#about to read 5, iclass 24, count 0 2006.229.03:13:11.59#ibcon#read 5, iclass 24, count 0 2006.229.03:13:11.59#ibcon#about to read 6, iclass 24, count 0 2006.229.03:13:11.59#ibcon#read 6, iclass 24, count 0 2006.229.03:13:11.59#ibcon#end of sib2, iclass 24, count 0 2006.229.03:13:11.59#ibcon#*after write, iclass 24, count 0 2006.229.03:13:11.59#ibcon#*before return 0, iclass 24, count 0 2006.229.03:13:11.59#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:11.59#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:11.59#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:13:11.59#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:13:11.59$vck44/va=4,7 2006.229.03:13:11.59#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.03:13:11.59#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.03:13:11.59#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:11.59#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:11.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:11.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:11.65#ibcon#enter wrdev, iclass 26, count 2 2006.229.03:13:11.65#ibcon#first serial, iclass 26, count 2 2006.229.03:13:11.65#ibcon#enter sib2, iclass 26, count 2 2006.229.03:13:11.65#ibcon#flushed, iclass 26, count 2 2006.229.03:13:11.65#ibcon#about to write, iclass 26, count 2 2006.229.03:13:11.65#ibcon#wrote, iclass 26, count 2 2006.229.03:13:11.65#ibcon#about to read 3, iclass 26, count 2 2006.229.03:13:11.67#ibcon#read 3, iclass 26, count 2 2006.229.03:13:11.67#ibcon#about to read 4, iclass 26, count 2 2006.229.03:13:11.67#ibcon#read 4, iclass 26, count 2 2006.229.03:13:11.67#ibcon#about to read 5, iclass 26, count 2 2006.229.03:13:11.67#ibcon#read 5, iclass 26, count 2 2006.229.03:13:11.67#ibcon#about to read 6, iclass 26, count 2 2006.229.03:13:11.67#ibcon#read 6, iclass 26, count 2 2006.229.03:13:11.67#ibcon#end of sib2, iclass 26, count 2 2006.229.03:13:11.67#ibcon#*mode == 0, iclass 26, count 2 2006.229.03:13:11.67#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.03:13:11.67#ibcon#[25=AT04-07\r\n] 2006.229.03:13:11.67#ibcon#*before write, iclass 26, count 2 2006.229.03:13:11.67#ibcon#enter sib2, iclass 26, count 2 2006.229.03:13:11.67#ibcon#flushed, iclass 26, count 2 2006.229.03:13:11.67#ibcon#about to write, iclass 26, count 2 2006.229.03:13:11.67#ibcon#wrote, iclass 26, count 2 2006.229.03:13:11.67#ibcon#about to read 3, iclass 26, count 2 2006.229.03:13:11.70#ibcon#read 3, iclass 26, count 2 2006.229.03:13:11.70#ibcon#about to read 4, iclass 26, count 2 2006.229.03:13:11.70#ibcon#read 4, iclass 26, count 2 2006.229.03:13:11.70#ibcon#about to read 5, iclass 26, count 2 2006.229.03:13:11.70#ibcon#read 5, iclass 26, count 2 2006.229.03:13:11.70#ibcon#about to read 6, iclass 26, count 2 2006.229.03:13:11.70#ibcon#read 6, iclass 26, count 2 2006.229.03:13:11.70#ibcon#end of sib2, iclass 26, count 2 2006.229.03:13:11.70#ibcon#*after write, iclass 26, count 2 2006.229.03:13:11.70#ibcon#*before return 0, iclass 26, count 2 2006.229.03:13:11.70#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:11.70#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:11.70#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.03:13:11.70#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:11.70#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:11.82#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:11.82#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:11.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:13:11.82#ibcon#first serial, iclass 26, count 0 2006.229.03:13:11.82#ibcon#enter sib2, iclass 26, count 0 2006.229.03:13:11.82#ibcon#flushed, iclass 26, count 0 2006.229.03:13:11.82#ibcon#about to write, iclass 26, count 0 2006.229.03:13:11.82#ibcon#wrote, iclass 26, count 0 2006.229.03:13:11.82#ibcon#about to read 3, iclass 26, count 0 2006.229.03:13:11.84#ibcon#read 3, iclass 26, count 0 2006.229.03:13:11.84#ibcon#about to read 4, iclass 26, count 0 2006.229.03:13:11.84#ibcon#read 4, iclass 26, count 0 2006.229.03:13:11.84#ibcon#about to read 5, iclass 26, count 0 2006.229.03:13:11.84#ibcon#read 5, iclass 26, count 0 2006.229.03:13:11.84#ibcon#about to read 6, iclass 26, count 0 2006.229.03:13:11.84#ibcon#read 6, iclass 26, count 0 2006.229.03:13:11.84#ibcon#end of sib2, iclass 26, count 0 2006.229.03:13:11.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:13:11.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:13:11.84#ibcon#[25=USB\r\n] 2006.229.03:13:11.84#ibcon#*before write, iclass 26, count 0 2006.229.03:13:11.84#ibcon#enter sib2, iclass 26, count 0 2006.229.03:13:11.84#ibcon#flushed, iclass 26, count 0 2006.229.03:13:11.84#ibcon#about to write, iclass 26, count 0 2006.229.03:13:11.84#ibcon#wrote, iclass 26, count 0 2006.229.03:13:11.84#ibcon#about to read 3, iclass 26, count 0 2006.229.03:13:11.87#ibcon#read 3, iclass 26, count 0 2006.229.03:13:11.87#ibcon#about to read 4, iclass 26, count 0 2006.229.03:13:11.87#ibcon#read 4, iclass 26, count 0 2006.229.03:13:11.87#ibcon#about to read 5, iclass 26, count 0 2006.229.03:13:11.87#ibcon#read 5, iclass 26, count 0 2006.229.03:13:11.87#ibcon#about to read 6, iclass 26, count 0 2006.229.03:13:11.87#ibcon#read 6, iclass 26, count 0 2006.229.03:13:11.87#ibcon#end of sib2, iclass 26, count 0 2006.229.03:13:11.87#ibcon#*after write, iclass 26, count 0 2006.229.03:13:11.87#ibcon#*before return 0, iclass 26, count 0 2006.229.03:13:11.87#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:11.87#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:11.87#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:13:11.87#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:13:11.87$vck44/valo=5,734.99 2006.229.03:13:11.87#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.03:13:11.87#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.03:13:11.87#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:11.87#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:11.87#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:11.87#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:11.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:13:11.87#ibcon#first serial, iclass 28, count 0 2006.229.03:13:11.87#ibcon#enter sib2, iclass 28, count 0 2006.229.03:13:11.87#ibcon#flushed, iclass 28, count 0 2006.229.03:13:11.87#ibcon#about to write, iclass 28, count 0 2006.229.03:13:11.87#ibcon#wrote, iclass 28, count 0 2006.229.03:13:11.87#ibcon#about to read 3, iclass 28, count 0 2006.229.03:13:11.89#ibcon#read 3, iclass 28, count 0 2006.229.03:13:11.89#ibcon#about to read 4, iclass 28, count 0 2006.229.03:13:11.89#ibcon#read 4, iclass 28, count 0 2006.229.03:13:11.89#ibcon#about to read 5, iclass 28, count 0 2006.229.03:13:11.89#ibcon#read 5, iclass 28, count 0 2006.229.03:13:11.89#ibcon#about to read 6, iclass 28, count 0 2006.229.03:13:11.89#ibcon#read 6, iclass 28, count 0 2006.229.03:13:11.89#ibcon#end of sib2, iclass 28, count 0 2006.229.03:13:11.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:13:11.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:13:11.89#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:13:11.89#ibcon#*before write, iclass 28, count 0 2006.229.03:13:11.89#ibcon#enter sib2, iclass 28, count 0 2006.229.03:13:11.89#ibcon#flushed, iclass 28, count 0 2006.229.03:13:11.89#ibcon#about to write, iclass 28, count 0 2006.229.03:13:11.89#ibcon#wrote, iclass 28, count 0 2006.229.03:13:11.89#ibcon#about to read 3, iclass 28, count 0 2006.229.03:13:11.93#ibcon#read 3, iclass 28, count 0 2006.229.03:13:11.93#ibcon#about to read 4, iclass 28, count 0 2006.229.03:13:11.93#ibcon#read 4, iclass 28, count 0 2006.229.03:13:11.93#ibcon#about to read 5, iclass 28, count 0 2006.229.03:13:11.93#ibcon#read 5, iclass 28, count 0 2006.229.03:13:11.93#ibcon#about to read 6, iclass 28, count 0 2006.229.03:13:11.93#ibcon#read 6, iclass 28, count 0 2006.229.03:13:11.93#ibcon#end of sib2, iclass 28, count 0 2006.229.03:13:11.93#ibcon#*after write, iclass 28, count 0 2006.229.03:13:11.93#ibcon#*before return 0, iclass 28, count 0 2006.229.03:13:11.93#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:11.93#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:11.93#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:13:11.93#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:13:11.93$vck44/va=5,4 2006.229.03:13:11.93#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.03:13:11.93#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.03:13:11.93#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:11.93#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:13:11.99#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:13:11.99#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:13:11.99#ibcon#enter wrdev, iclass 30, count 2 2006.229.03:13:11.99#ibcon#first serial, iclass 30, count 2 2006.229.03:13:11.99#ibcon#enter sib2, iclass 30, count 2 2006.229.03:13:11.99#ibcon#flushed, iclass 30, count 2 2006.229.03:13:11.99#ibcon#about to write, iclass 30, count 2 2006.229.03:13:11.99#ibcon#wrote, iclass 30, count 2 2006.229.03:13:11.99#ibcon#about to read 3, iclass 30, count 2 2006.229.03:13:12.01#ibcon#read 3, iclass 30, count 2 2006.229.03:13:12.01#ibcon#about to read 4, iclass 30, count 2 2006.229.03:13:12.01#ibcon#read 4, iclass 30, count 2 2006.229.03:13:12.01#ibcon#about to read 5, iclass 30, count 2 2006.229.03:13:12.01#ibcon#read 5, iclass 30, count 2 2006.229.03:13:12.01#ibcon#about to read 6, iclass 30, count 2 2006.229.03:13:12.01#ibcon#read 6, iclass 30, count 2 2006.229.03:13:12.01#ibcon#end of sib2, iclass 30, count 2 2006.229.03:13:12.01#ibcon#*mode == 0, iclass 30, count 2 2006.229.03:13:12.01#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.03:13:12.01#ibcon#[25=AT05-04\r\n] 2006.229.03:13:12.01#ibcon#*before write, iclass 30, count 2 2006.229.03:13:12.01#ibcon#enter sib2, iclass 30, count 2 2006.229.03:13:12.01#ibcon#flushed, iclass 30, count 2 2006.229.03:13:12.01#ibcon#about to write, iclass 30, count 2 2006.229.03:13:12.01#ibcon#wrote, iclass 30, count 2 2006.229.03:13:12.01#ibcon#about to read 3, iclass 30, count 2 2006.229.03:13:12.04#ibcon#read 3, iclass 30, count 2 2006.229.03:13:12.04#ibcon#about to read 4, iclass 30, count 2 2006.229.03:13:12.04#ibcon#read 4, iclass 30, count 2 2006.229.03:13:12.04#ibcon#about to read 5, iclass 30, count 2 2006.229.03:13:12.04#ibcon#read 5, iclass 30, count 2 2006.229.03:13:12.04#ibcon#about to read 6, iclass 30, count 2 2006.229.03:13:12.04#ibcon#read 6, iclass 30, count 2 2006.229.03:13:12.04#ibcon#end of sib2, iclass 30, count 2 2006.229.03:13:12.04#ibcon#*after write, iclass 30, count 2 2006.229.03:13:12.04#ibcon#*before return 0, iclass 30, count 2 2006.229.03:13:12.04#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:13:12.04#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:13:12.04#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.03:13:12.04#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:12.04#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:13:12.16#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:13:12.16#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:13:12.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:13:12.16#ibcon#first serial, iclass 30, count 0 2006.229.03:13:12.16#ibcon#enter sib2, iclass 30, count 0 2006.229.03:13:12.16#ibcon#flushed, iclass 30, count 0 2006.229.03:13:12.16#ibcon#about to write, iclass 30, count 0 2006.229.03:13:12.16#ibcon#wrote, iclass 30, count 0 2006.229.03:13:12.16#ibcon#about to read 3, iclass 30, count 0 2006.229.03:13:12.18#ibcon#read 3, iclass 30, count 0 2006.229.03:13:12.18#ibcon#about to read 4, iclass 30, count 0 2006.229.03:13:12.18#ibcon#read 4, iclass 30, count 0 2006.229.03:13:12.18#ibcon#about to read 5, iclass 30, count 0 2006.229.03:13:12.18#ibcon#read 5, iclass 30, count 0 2006.229.03:13:12.18#ibcon#about to read 6, iclass 30, count 0 2006.229.03:13:12.18#ibcon#read 6, iclass 30, count 0 2006.229.03:13:12.18#ibcon#end of sib2, iclass 30, count 0 2006.229.03:13:12.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:13:12.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:13:12.18#ibcon#[25=USB\r\n] 2006.229.03:13:12.18#ibcon#*before write, iclass 30, count 0 2006.229.03:13:12.18#ibcon#enter sib2, iclass 30, count 0 2006.229.03:13:12.18#ibcon#flushed, iclass 30, count 0 2006.229.03:13:12.18#ibcon#about to write, iclass 30, count 0 2006.229.03:13:12.18#ibcon#wrote, iclass 30, count 0 2006.229.03:13:12.18#ibcon#about to read 3, iclass 30, count 0 2006.229.03:13:12.21#ibcon#read 3, iclass 30, count 0 2006.229.03:13:12.21#ibcon#about to read 4, iclass 30, count 0 2006.229.03:13:12.21#ibcon#read 4, iclass 30, count 0 2006.229.03:13:12.21#ibcon#about to read 5, iclass 30, count 0 2006.229.03:13:12.21#ibcon#read 5, iclass 30, count 0 2006.229.03:13:12.21#ibcon#about to read 6, iclass 30, count 0 2006.229.03:13:12.21#ibcon#read 6, iclass 30, count 0 2006.229.03:13:12.21#ibcon#end of sib2, iclass 30, count 0 2006.229.03:13:12.21#ibcon#*after write, iclass 30, count 0 2006.229.03:13:12.21#ibcon#*before return 0, iclass 30, count 0 2006.229.03:13:12.21#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:13:12.21#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:13:12.21#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:13:12.21#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:13:12.21$vck44/valo=6,814.99 2006.229.03:13:12.21#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.03:13:12.21#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.03:13:12.21#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:12.21#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:13:12.21#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:13:12.21#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:13:12.21#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:13:12.21#ibcon#first serial, iclass 32, count 0 2006.229.03:13:12.21#ibcon#enter sib2, iclass 32, count 0 2006.229.03:13:12.21#ibcon#flushed, iclass 32, count 0 2006.229.03:13:12.21#ibcon#about to write, iclass 32, count 0 2006.229.03:13:12.21#ibcon#wrote, iclass 32, count 0 2006.229.03:13:12.21#ibcon#about to read 3, iclass 32, count 0 2006.229.03:13:12.23#ibcon#read 3, iclass 32, count 0 2006.229.03:13:12.23#ibcon#about to read 4, iclass 32, count 0 2006.229.03:13:12.23#ibcon#read 4, iclass 32, count 0 2006.229.03:13:12.23#ibcon#about to read 5, iclass 32, count 0 2006.229.03:13:12.23#ibcon#read 5, iclass 32, count 0 2006.229.03:13:12.23#ibcon#about to read 6, iclass 32, count 0 2006.229.03:13:12.23#ibcon#read 6, iclass 32, count 0 2006.229.03:13:12.23#ibcon#end of sib2, iclass 32, count 0 2006.229.03:13:12.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:13:12.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:13:12.23#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:13:12.23#ibcon#*before write, iclass 32, count 0 2006.229.03:13:12.23#ibcon#enter sib2, iclass 32, count 0 2006.229.03:13:12.23#ibcon#flushed, iclass 32, count 0 2006.229.03:13:12.23#ibcon#about to write, iclass 32, count 0 2006.229.03:13:12.23#ibcon#wrote, iclass 32, count 0 2006.229.03:13:12.23#ibcon#about to read 3, iclass 32, count 0 2006.229.03:13:12.27#ibcon#read 3, iclass 32, count 0 2006.229.03:13:12.27#ibcon#about to read 4, iclass 32, count 0 2006.229.03:13:12.27#ibcon#read 4, iclass 32, count 0 2006.229.03:13:12.27#ibcon#about to read 5, iclass 32, count 0 2006.229.03:13:12.27#ibcon#read 5, iclass 32, count 0 2006.229.03:13:12.27#ibcon#about to read 6, iclass 32, count 0 2006.229.03:13:12.27#ibcon#read 6, iclass 32, count 0 2006.229.03:13:12.27#ibcon#end of sib2, iclass 32, count 0 2006.229.03:13:12.27#ibcon#*after write, iclass 32, count 0 2006.229.03:13:12.27#ibcon#*before return 0, iclass 32, count 0 2006.229.03:13:12.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:13:12.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:13:12.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:13:12.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:13:12.27$vck44/va=6,4 2006.229.03:13:12.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.03:13:12.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.03:13:12.27#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:12.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:13:12.33#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:13:12.33#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:13:12.33#ibcon#enter wrdev, iclass 34, count 2 2006.229.03:13:12.33#ibcon#first serial, iclass 34, count 2 2006.229.03:13:12.33#ibcon#enter sib2, iclass 34, count 2 2006.229.03:13:12.33#ibcon#flushed, iclass 34, count 2 2006.229.03:13:12.33#ibcon#about to write, iclass 34, count 2 2006.229.03:13:12.33#ibcon#wrote, iclass 34, count 2 2006.229.03:13:12.33#ibcon#about to read 3, iclass 34, count 2 2006.229.03:13:12.35#ibcon#read 3, iclass 34, count 2 2006.229.03:13:12.35#ibcon#about to read 4, iclass 34, count 2 2006.229.03:13:12.35#ibcon#read 4, iclass 34, count 2 2006.229.03:13:12.35#ibcon#about to read 5, iclass 34, count 2 2006.229.03:13:12.35#ibcon#read 5, iclass 34, count 2 2006.229.03:13:12.35#ibcon#about to read 6, iclass 34, count 2 2006.229.03:13:12.35#ibcon#read 6, iclass 34, count 2 2006.229.03:13:12.35#ibcon#end of sib2, iclass 34, count 2 2006.229.03:13:12.35#ibcon#*mode == 0, iclass 34, count 2 2006.229.03:13:12.35#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.03:13:12.35#ibcon#[25=AT06-04\r\n] 2006.229.03:13:12.35#ibcon#*before write, iclass 34, count 2 2006.229.03:13:12.35#ibcon#enter sib2, iclass 34, count 2 2006.229.03:13:12.35#ibcon#flushed, iclass 34, count 2 2006.229.03:13:12.35#ibcon#about to write, iclass 34, count 2 2006.229.03:13:12.35#ibcon#wrote, iclass 34, count 2 2006.229.03:13:12.35#ibcon#about to read 3, iclass 34, count 2 2006.229.03:13:12.38#ibcon#read 3, iclass 34, count 2 2006.229.03:13:12.38#ibcon#about to read 4, iclass 34, count 2 2006.229.03:13:12.38#ibcon#read 4, iclass 34, count 2 2006.229.03:13:12.38#ibcon#about to read 5, iclass 34, count 2 2006.229.03:13:12.38#ibcon#read 5, iclass 34, count 2 2006.229.03:13:12.38#ibcon#about to read 6, iclass 34, count 2 2006.229.03:13:12.38#ibcon#read 6, iclass 34, count 2 2006.229.03:13:12.38#ibcon#end of sib2, iclass 34, count 2 2006.229.03:13:12.38#ibcon#*after write, iclass 34, count 2 2006.229.03:13:12.38#ibcon#*before return 0, iclass 34, count 2 2006.229.03:13:12.38#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:13:12.38#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:13:12.38#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.03:13:12.38#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:12.38#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:13:12.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:13:12.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:13:12.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:13:12.50#ibcon#first serial, iclass 34, count 0 2006.229.03:13:12.50#ibcon#enter sib2, iclass 34, count 0 2006.229.03:13:12.50#ibcon#flushed, iclass 34, count 0 2006.229.03:13:12.50#ibcon#about to write, iclass 34, count 0 2006.229.03:13:12.50#ibcon#wrote, iclass 34, count 0 2006.229.03:13:12.50#ibcon#about to read 3, iclass 34, count 0 2006.229.03:13:12.52#ibcon#read 3, iclass 34, count 0 2006.229.03:13:12.52#ibcon#about to read 4, iclass 34, count 0 2006.229.03:13:12.52#ibcon#read 4, iclass 34, count 0 2006.229.03:13:12.52#ibcon#about to read 5, iclass 34, count 0 2006.229.03:13:12.52#ibcon#read 5, iclass 34, count 0 2006.229.03:13:12.52#ibcon#about to read 6, iclass 34, count 0 2006.229.03:13:12.52#ibcon#read 6, iclass 34, count 0 2006.229.03:13:12.52#ibcon#end of sib2, iclass 34, count 0 2006.229.03:13:12.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:13:12.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:13:12.52#ibcon#[25=USB\r\n] 2006.229.03:13:12.52#ibcon#*before write, iclass 34, count 0 2006.229.03:13:12.52#ibcon#enter sib2, iclass 34, count 0 2006.229.03:13:12.52#ibcon#flushed, iclass 34, count 0 2006.229.03:13:12.52#ibcon#about to write, iclass 34, count 0 2006.229.03:13:12.52#ibcon#wrote, iclass 34, count 0 2006.229.03:13:12.52#ibcon#about to read 3, iclass 34, count 0 2006.229.03:13:12.55#ibcon#read 3, iclass 34, count 0 2006.229.03:13:12.55#ibcon#about to read 4, iclass 34, count 0 2006.229.03:13:12.55#ibcon#read 4, iclass 34, count 0 2006.229.03:13:12.55#ibcon#about to read 5, iclass 34, count 0 2006.229.03:13:12.55#ibcon#read 5, iclass 34, count 0 2006.229.03:13:12.55#ibcon#about to read 6, iclass 34, count 0 2006.229.03:13:12.55#ibcon#read 6, iclass 34, count 0 2006.229.03:13:12.55#ibcon#end of sib2, iclass 34, count 0 2006.229.03:13:12.55#ibcon#*after write, iclass 34, count 0 2006.229.03:13:12.55#ibcon#*before return 0, iclass 34, count 0 2006.229.03:13:12.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:13:12.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:13:12.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:13:12.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:13:12.55$vck44/valo=7,864.99 2006.229.03:13:12.55#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.03:13:12.55#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.03:13:12.55#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:12.55#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:12.55#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:12.55#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:12.55#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:13:12.55#ibcon#first serial, iclass 36, count 0 2006.229.03:13:12.55#ibcon#enter sib2, iclass 36, count 0 2006.229.03:13:12.55#ibcon#flushed, iclass 36, count 0 2006.229.03:13:12.55#ibcon#about to write, iclass 36, count 0 2006.229.03:13:12.55#ibcon#wrote, iclass 36, count 0 2006.229.03:13:12.55#ibcon#about to read 3, iclass 36, count 0 2006.229.03:13:12.57#ibcon#read 3, iclass 36, count 0 2006.229.03:13:12.57#ibcon#about to read 4, iclass 36, count 0 2006.229.03:13:12.57#ibcon#read 4, iclass 36, count 0 2006.229.03:13:12.57#ibcon#about to read 5, iclass 36, count 0 2006.229.03:13:12.57#ibcon#read 5, iclass 36, count 0 2006.229.03:13:12.57#ibcon#about to read 6, iclass 36, count 0 2006.229.03:13:12.57#ibcon#read 6, iclass 36, count 0 2006.229.03:13:12.57#ibcon#end of sib2, iclass 36, count 0 2006.229.03:13:12.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:13:12.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:13:12.57#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:13:12.57#ibcon#*before write, iclass 36, count 0 2006.229.03:13:12.57#ibcon#enter sib2, iclass 36, count 0 2006.229.03:13:12.57#ibcon#flushed, iclass 36, count 0 2006.229.03:13:12.57#ibcon#about to write, iclass 36, count 0 2006.229.03:13:12.57#ibcon#wrote, iclass 36, count 0 2006.229.03:13:12.57#ibcon#about to read 3, iclass 36, count 0 2006.229.03:13:12.61#ibcon#read 3, iclass 36, count 0 2006.229.03:13:12.61#ibcon#about to read 4, iclass 36, count 0 2006.229.03:13:12.61#ibcon#read 4, iclass 36, count 0 2006.229.03:13:12.61#ibcon#about to read 5, iclass 36, count 0 2006.229.03:13:12.61#ibcon#read 5, iclass 36, count 0 2006.229.03:13:12.61#ibcon#about to read 6, iclass 36, count 0 2006.229.03:13:12.61#ibcon#read 6, iclass 36, count 0 2006.229.03:13:12.61#ibcon#end of sib2, iclass 36, count 0 2006.229.03:13:12.61#ibcon#*after write, iclass 36, count 0 2006.229.03:13:12.61#ibcon#*before return 0, iclass 36, count 0 2006.229.03:13:12.61#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:12.61#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:12.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:13:12.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:13:12.61$vck44/va=7,5 2006.229.03:13:12.61#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.03:13:12.61#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.03:13:12.61#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:12.61#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:12.67#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:12.67#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:12.67#ibcon#enter wrdev, iclass 38, count 2 2006.229.03:13:12.67#ibcon#first serial, iclass 38, count 2 2006.229.03:13:12.67#ibcon#enter sib2, iclass 38, count 2 2006.229.03:13:12.67#ibcon#flushed, iclass 38, count 2 2006.229.03:13:12.67#ibcon#about to write, iclass 38, count 2 2006.229.03:13:12.67#ibcon#wrote, iclass 38, count 2 2006.229.03:13:12.67#ibcon#about to read 3, iclass 38, count 2 2006.229.03:13:12.69#ibcon#read 3, iclass 38, count 2 2006.229.03:13:12.69#ibcon#about to read 4, iclass 38, count 2 2006.229.03:13:12.69#ibcon#read 4, iclass 38, count 2 2006.229.03:13:12.69#ibcon#about to read 5, iclass 38, count 2 2006.229.03:13:12.69#ibcon#read 5, iclass 38, count 2 2006.229.03:13:12.69#ibcon#about to read 6, iclass 38, count 2 2006.229.03:13:12.69#ibcon#read 6, iclass 38, count 2 2006.229.03:13:12.69#ibcon#end of sib2, iclass 38, count 2 2006.229.03:13:12.69#ibcon#*mode == 0, iclass 38, count 2 2006.229.03:13:12.69#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.03:13:12.69#ibcon#[25=AT07-05\r\n] 2006.229.03:13:12.69#ibcon#*before write, iclass 38, count 2 2006.229.03:13:12.69#ibcon#enter sib2, iclass 38, count 2 2006.229.03:13:12.69#ibcon#flushed, iclass 38, count 2 2006.229.03:13:12.69#ibcon#about to write, iclass 38, count 2 2006.229.03:13:12.69#ibcon#wrote, iclass 38, count 2 2006.229.03:13:12.69#ibcon#about to read 3, iclass 38, count 2 2006.229.03:13:12.72#ibcon#read 3, iclass 38, count 2 2006.229.03:13:12.72#ibcon#about to read 4, iclass 38, count 2 2006.229.03:13:12.72#ibcon#read 4, iclass 38, count 2 2006.229.03:13:12.72#ibcon#about to read 5, iclass 38, count 2 2006.229.03:13:12.72#ibcon#read 5, iclass 38, count 2 2006.229.03:13:12.72#ibcon#about to read 6, iclass 38, count 2 2006.229.03:13:12.72#ibcon#read 6, iclass 38, count 2 2006.229.03:13:12.72#ibcon#end of sib2, iclass 38, count 2 2006.229.03:13:12.72#ibcon#*after write, iclass 38, count 2 2006.229.03:13:12.72#ibcon#*before return 0, iclass 38, count 2 2006.229.03:13:12.72#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:12.72#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:12.72#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.03:13:12.72#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:12.72#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:12.84#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:12.84#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:12.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:13:12.84#ibcon#first serial, iclass 38, count 0 2006.229.03:13:12.84#ibcon#enter sib2, iclass 38, count 0 2006.229.03:13:12.84#ibcon#flushed, iclass 38, count 0 2006.229.03:13:12.84#ibcon#about to write, iclass 38, count 0 2006.229.03:13:12.84#ibcon#wrote, iclass 38, count 0 2006.229.03:13:12.84#ibcon#about to read 3, iclass 38, count 0 2006.229.03:13:12.86#ibcon#read 3, iclass 38, count 0 2006.229.03:13:12.86#ibcon#about to read 4, iclass 38, count 0 2006.229.03:13:12.86#ibcon#read 4, iclass 38, count 0 2006.229.03:13:12.86#ibcon#about to read 5, iclass 38, count 0 2006.229.03:13:12.86#ibcon#read 5, iclass 38, count 0 2006.229.03:13:12.86#ibcon#about to read 6, iclass 38, count 0 2006.229.03:13:12.86#ibcon#read 6, iclass 38, count 0 2006.229.03:13:12.86#ibcon#end of sib2, iclass 38, count 0 2006.229.03:13:12.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:13:12.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:13:12.86#ibcon#[25=USB\r\n] 2006.229.03:13:12.86#ibcon#*before write, iclass 38, count 0 2006.229.03:13:12.86#ibcon#enter sib2, iclass 38, count 0 2006.229.03:13:12.86#ibcon#flushed, iclass 38, count 0 2006.229.03:13:12.86#ibcon#about to write, iclass 38, count 0 2006.229.03:13:12.86#ibcon#wrote, iclass 38, count 0 2006.229.03:13:12.86#ibcon#about to read 3, iclass 38, count 0 2006.229.03:13:12.89#ibcon#read 3, iclass 38, count 0 2006.229.03:13:12.89#ibcon#about to read 4, iclass 38, count 0 2006.229.03:13:12.89#ibcon#read 4, iclass 38, count 0 2006.229.03:13:12.89#ibcon#about to read 5, iclass 38, count 0 2006.229.03:13:12.89#ibcon#read 5, iclass 38, count 0 2006.229.03:13:12.89#ibcon#about to read 6, iclass 38, count 0 2006.229.03:13:12.89#ibcon#read 6, iclass 38, count 0 2006.229.03:13:12.89#ibcon#end of sib2, iclass 38, count 0 2006.229.03:13:12.89#ibcon#*after write, iclass 38, count 0 2006.229.03:13:12.89#ibcon#*before return 0, iclass 38, count 0 2006.229.03:13:12.89#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:12.89#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:12.89#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:13:12.89#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:13:12.89$vck44/valo=8,884.99 2006.229.03:13:12.89#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.03:13:12.89#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.03:13:12.89#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:12.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:12.89#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:12.89#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:12.89#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:13:12.89#ibcon#first serial, iclass 40, count 0 2006.229.03:13:12.89#ibcon#enter sib2, iclass 40, count 0 2006.229.03:13:12.89#ibcon#flushed, iclass 40, count 0 2006.229.03:13:12.89#ibcon#about to write, iclass 40, count 0 2006.229.03:13:12.89#ibcon#wrote, iclass 40, count 0 2006.229.03:13:12.89#ibcon#about to read 3, iclass 40, count 0 2006.229.03:13:12.91#ibcon#read 3, iclass 40, count 0 2006.229.03:13:12.91#ibcon#about to read 4, iclass 40, count 0 2006.229.03:13:12.91#ibcon#read 4, iclass 40, count 0 2006.229.03:13:12.91#ibcon#about to read 5, iclass 40, count 0 2006.229.03:13:12.91#ibcon#read 5, iclass 40, count 0 2006.229.03:13:12.91#ibcon#about to read 6, iclass 40, count 0 2006.229.03:13:12.91#ibcon#read 6, iclass 40, count 0 2006.229.03:13:12.91#ibcon#end of sib2, iclass 40, count 0 2006.229.03:13:12.91#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:13:12.91#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:13:12.91#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:13:12.91#ibcon#*before write, iclass 40, count 0 2006.229.03:13:12.91#ibcon#enter sib2, iclass 40, count 0 2006.229.03:13:12.91#ibcon#flushed, iclass 40, count 0 2006.229.03:13:12.91#ibcon#about to write, iclass 40, count 0 2006.229.03:13:12.91#ibcon#wrote, iclass 40, count 0 2006.229.03:13:12.91#ibcon#about to read 3, iclass 40, count 0 2006.229.03:13:12.95#ibcon#read 3, iclass 40, count 0 2006.229.03:13:12.95#ibcon#about to read 4, iclass 40, count 0 2006.229.03:13:12.95#ibcon#read 4, iclass 40, count 0 2006.229.03:13:12.95#ibcon#about to read 5, iclass 40, count 0 2006.229.03:13:12.95#ibcon#read 5, iclass 40, count 0 2006.229.03:13:12.95#ibcon#about to read 6, iclass 40, count 0 2006.229.03:13:12.95#ibcon#read 6, iclass 40, count 0 2006.229.03:13:12.95#ibcon#end of sib2, iclass 40, count 0 2006.229.03:13:12.95#ibcon#*after write, iclass 40, count 0 2006.229.03:13:12.95#ibcon#*before return 0, iclass 40, count 0 2006.229.03:13:12.95#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:12.95#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:12.95#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:13:12.95#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:13:12.95$vck44/va=8,6 2006.229.03:13:12.95#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.03:13:12.95#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.03:13:12.95#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:12.95#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:13.01#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:13.01#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:13.01#ibcon#enter wrdev, iclass 4, count 2 2006.229.03:13:13.01#ibcon#first serial, iclass 4, count 2 2006.229.03:13:13.01#ibcon#enter sib2, iclass 4, count 2 2006.229.03:13:13.01#ibcon#flushed, iclass 4, count 2 2006.229.03:13:13.01#ibcon#about to write, iclass 4, count 2 2006.229.03:13:13.01#ibcon#wrote, iclass 4, count 2 2006.229.03:13:13.01#ibcon#about to read 3, iclass 4, count 2 2006.229.03:13:13.03#ibcon#read 3, iclass 4, count 2 2006.229.03:13:13.03#ibcon#about to read 4, iclass 4, count 2 2006.229.03:13:13.03#ibcon#read 4, iclass 4, count 2 2006.229.03:13:13.03#ibcon#about to read 5, iclass 4, count 2 2006.229.03:13:13.03#ibcon#read 5, iclass 4, count 2 2006.229.03:13:13.03#ibcon#about to read 6, iclass 4, count 2 2006.229.03:13:13.03#ibcon#read 6, iclass 4, count 2 2006.229.03:13:13.03#ibcon#end of sib2, iclass 4, count 2 2006.229.03:13:13.03#ibcon#*mode == 0, iclass 4, count 2 2006.229.03:13:13.03#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.03:13:13.03#ibcon#[25=AT08-06\r\n] 2006.229.03:13:13.03#ibcon#*before write, iclass 4, count 2 2006.229.03:13:13.03#ibcon#enter sib2, iclass 4, count 2 2006.229.03:13:13.03#ibcon#flushed, iclass 4, count 2 2006.229.03:13:13.03#ibcon#about to write, iclass 4, count 2 2006.229.03:13:13.03#ibcon#wrote, iclass 4, count 2 2006.229.03:13:13.03#ibcon#about to read 3, iclass 4, count 2 2006.229.03:13:13.06#ibcon#read 3, iclass 4, count 2 2006.229.03:13:13.06#ibcon#about to read 4, iclass 4, count 2 2006.229.03:13:13.06#ibcon#read 4, iclass 4, count 2 2006.229.03:13:13.06#ibcon#about to read 5, iclass 4, count 2 2006.229.03:13:13.06#ibcon#read 5, iclass 4, count 2 2006.229.03:13:13.06#ibcon#about to read 6, iclass 4, count 2 2006.229.03:13:13.06#ibcon#read 6, iclass 4, count 2 2006.229.03:13:13.06#ibcon#end of sib2, iclass 4, count 2 2006.229.03:13:13.06#ibcon#*after write, iclass 4, count 2 2006.229.03:13:13.06#ibcon#*before return 0, iclass 4, count 2 2006.229.03:13:13.06#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:13.06#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:13.06#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.03:13:13.06#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:13.06#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:13.18#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:13.18#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:13.18#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:13:13.18#ibcon#first serial, iclass 4, count 0 2006.229.03:13:13.18#ibcon#enter sib2, iclass 4, count 0 2006.229.03:13:13.18#ibcon#flushed, iclass 4, count 0 2006.229.03:13:13.18#ibcon#about to write, iclass 4, count 0 2006.229.03:13:13.18#ibcon#wrote, iclass 4, count 0 2006.229.03:13:13.18#ibcon#about to read 3, iclass 4, count 0 2006.229.03:13:13.20#ibcon#read 3, iclass 4, count 0 2006.229.03:13:13.20#ibcon#about to read 4, iclass 4, count 0 2006.229.03:13:13.20#ibcon#read 4, iclass 4, count 0 2006.229.03:13:13.20#ibcon#about to read 5, iclass 4, count 0 2006.229.03:13:13.20#ibcon#read 5, iclass 4, count 0 2006.229.03:13:13.20#ibcon#about to read 6, iclass 4, count 0 2006.229.03:13:13.20#ibcon#read 6, iclass 4, count 0 2006.229.03:13:13.20#ibcon#end of sib2, iclass 4, count 0 2006.229.03:13:13.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:13:13.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:13:13.20#ibcon#[25=USB\r\n] 2006.229.03:13:13.20#ibcon#*before write, iclass 4, count 0 2006.229.03:13:13.20#ibcon#enter sib2, iclass 4, count 0 2006.229.03:13:13.20#ibcon#flushed, iclass 4, count 0 2006.229.03:13:13.20#ibcon#about to write, iclass 4, count 0 2006.229.03:13:13.20#ibcon#wrote, iclass 4, count 0 2006.229.03:13:13.20#ibcon#about to read 3, iclass 4, count 0 2006.229.03:13:13.23#ibcon#read 3, iclass 4, count 0 2006.229.03:13:13.23#ibcon#about to read 4, iclass 4, count 0 2006.229.03:13:13.23#ibcon#read 4, iclass 4, count 0 2006.229.03:13:13.23#ibcon#about to read 5, iclass 4, count 0 2006.229.03:13:13.23#ibcon#read 5, iclass 4, count 0 2006.229.03:13:13.23#ibcon#about to read 6, iclass 4, count 0 2006.229.03:13:13.23#ibcon#read 6, iclass 4, count 0 2006.229.03:13:13.23#ibcon#end of sib2, iclass 4, count 0 2006.229.03:13:13.23#ibcon#*after write, iclass 4, count 0 2006.229.03:13:13.23#ibcon#*before return 0, iclass 4, count 0 2006.229.03:13:13.23#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:13.23#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:13.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:13:13.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:13:13.23$vck44/vblo=1,629.99 2006.229.03:13:13.23#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.03:13:13.23#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.03:13:13.23#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:13.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:13.23#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:13.23#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:13.23#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:13:13.23#ibcon#first serial, iclass 6, count 0 2006.229.03:13:13.23#ibcon#enter sib2, iclass 6, count 0 2006.229.03:13:13.23#ibcon#flushed, iclass 6, count 0 2006.229.03:13:13.23#ibcon#about to write, iclass 6, count 0 2006.229.03:13:13.23#ibcon#wrote, iclass 6, count 0 2006.229.03:13:13.23#ibcon#about to read 3, iclass 6, count 0 2006.229.03:13:13.25#ibcon#read 3, iclass 6, count 0 2006.229.03:13:13.25#ibcon#about to read 4, iclass 6, count 0 2006.229.03:13:13.25#ibcon#read 4, iclass 6, count 0 2006.229.03:13:13.25#ibcon#about to read 5, iclass 6, count 0 2006.229.03:13:13.25#ibcon#read 5, iclass 6, count 0 2006.229.03:13:13.25#ibcon#about to read 6, iclass 6, count 0 2006.229.03:13:13.25#ibcon#read 6, iclass 6, count 0 2006.229.03:13:13.25#ibcon#end of sib2, iclass 6, count 0 2006.229.03:13:13.25#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:13:13.25#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:13:13.25#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:13:13.25#ibcon#*before write, iclass 6, count 0 2006.229.03:13:13.25#ibcon#enter sib2, iclass 6, count 0 2006.229.03:13:13.25#ibcon#flushed, iclass 6, count 0 2006.229.03:13:13.25#ibcon#about to write, iclass 6, count 0 2006.229.03:13:13.25#ibcon#wrote, iclass 6, count 0 2006.229.03:13:13.25#ibcon#about to read 3, iclass 6, count 0 2006.229.03:13:13.29#ibcon#read 3, iclass 6, count 0 2006.229.03:13:13.29#ibcon#about to read 4, iclass 6, count 0 2006.229.03:13:13.29#ibcon#read 4, iclass 6, count 0 2006.229.03:13:13.29#ibcon#about to read 5, iclass 6, count 0 2006.229.03:13:13.29#ibcon#read 5, iclass 6, count 0 2006.229.03:13:13.29#ibcon#about to read 6, iclass 6, count 0 2006.229.03:13:13.29#ibcon#read 6, iclass 6, count 0 2006.229.03:13:13.29#ibcon#end of sib2, iclass 6, count 0 2006.229.03:13:13.29#ibcon#*after write, iclass 6, count 0 2006.229.03:13:13.29#ibcon#*before return 0, iclass 6, count 0 2006.229.03:13:13.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:13.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:13.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:13:13.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:13:13.29$vck44/vb=1,4 2006.229.03:13:13.29#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.03:13:13.29#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.03:13:13.29#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:13.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:13:13.29#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:13:13.29#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:13:13.29#ibcon#enter wrdev, iclass 10, count 2 2006.229.03:13:13.29#ibcon#first serial, iclass 10, count 2 2006.229.03:13:13.29#ibcon#enter sib2, iclass 10, count 2 2006.229.03:13:13.29#ibcon#flushed, iclass 10, count 2 2006.229.03:13:13.29#ibcon#about to write, iclass 10, count 2 2006.229.03:13:13.29#ibcon#wrote, iclass 10, count 2 2006.229.03:13:13.29#ibcon#about to read 3, iclass 10, count 2 2006.229.03:13:13.31#ibcon#read 3, iclass 10, count 2 2006.229.03:13:13.31#ibcon#about to read 4, iclass 10, count 2 2006.229.03:13:13.31#ibcon#read 4, iclass 10, count 2 2006.229.03:13:13.31#ibcon#about to read 5, iclass 10, count 2 2006.229.03:13:13.31#ibcon#read 5, iclass 10, count 2 2006.229.03:13:13.31#ibcon#about to read 6, iclass 10, count 2 2006.229.03:13:13.31#ibcon#read 6, iclass 10, count 2 2006.229.03:13:13.31#ibcon#end of sib2, iclass 10, count 2 2006.229.03:13:13.31#ibcon#*mode == 0, iclass 10, count 2 2006.229.03:13:13.31#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.03:13:13.31#ibcon#[27=AT01-04\r\n] 2006.229.03:13:13.31#ibcon#*before write, iclass 10, count 2 2006.229.03:13:13.31#ibcon#enter sib2, iclass 10, count 2 2006.229.03:13:13.31#ibcon#flushed, iclass 10, count 2 2006.229.03:13:13.31#ibcon#about to write, iclass 10, count 2 2006.229.03:13:13.31#ibcon#wrote, iclass 10, count 2 2006.229.03:13:13.31#ibcon#about to read 3, iclass 10, count 2 2006.229.03:13:13.34#ibcon#read 3, iclass 10, count 2 2006.229.03:13:13.34#ibcon#about to read 4, iclass 10, count 2 2006.229.03:13:13.34#ibcon#read 4, iclass 10, count 2 2006.229.03:13:13.34#ibcon#about to read 5, iclass 10, count 2 2006.229.03:13:13.34#ibcon#read 5, iclass 10, count 2 2006.229.03:13:13.34#ibcon#about to read 6, iclass 10, count 2 2006.229.03:13:13.34#ibcon#read 6, iclass 10, count 2 2006.229.03:13:13.34#ibcon#end of sib2, iclass 10, count 2 2006.229.03:13:13.34#ibcon#*after write, iclass 10, count 2 2006.229.03:13:13.34#ibcon#*before return 0, iclass 10, count 2 2006.229.03:13:13.34#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:13:13.34#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:13:13.34#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.03:13:13.34#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:13.34#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:13:13.46#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:13:13.46#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:13:13.46#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:13:13.46#ibcon#first serial, iclass 10, count 0 2006.229.03:13:13.46#ibcon#enter sib2, iclass 10, count 0 2006.229.03:13:13.46#ibcon#flushed, iclass 10, count 0 2006.229.03:13:13.46#ibcon#about to write, iclass 10, count 0 2006.229.03:13:13.46#ibcon#wrote, iclass 10, count 0 2006.229.03:13:13.46#ibcon#about to read 3, iclass 10, count 0 2006.229.03:13:13.48#ibcon#read 3, iclass 10, count 0 2006.229.03:13:13.48#ibcon#about to read 4, iclass 10, count 0 2006.229.03:13:13.48#ibcon#read 4, iclass 10, count 0 2006.229.03:13:13.48#ibcon#about to read 5, iclass 10, count 0 2006.229.03:13:13.48#ibcon#read 5, iclass 10, count 0 2006.229.03:13:13.48#ibcon#about to read 6, iclass 10, count 0 2006.229.03:13:13.48#ibcon#read 6, iclass 10, count 0 2006.229.03:13:13.48#ibcon#end of sib2, iclass 10, count 0 2006.229.03:13:13.48#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:13:13.48#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:13:13.48#ibcon#[27=USB\r\n] 2006.229.03:13:13.48#ibcon#*before write, iclass 10, count 0 2006.229.03:13:13.48#ibcon#enter sib2, iclass 10, count 0 2006.229.03:13:13.48#ibcon#flushed, iclass 10, count 0 2006.229.03:13:13.48#ibcon#about to write, iclass 10, count 0 2006.229.03:13:13.48#ibcon#wrote, iclass 10, count 0 2006.229.03:13:13.48#ibcon#about to read 3, iclass 10, count 0 2006.229.03:13:13.51#ibcon#read 3, iclass 10, count 0 2006.229.03:13:13.51#ibcon#about to read 4, iclass 10, count 0 2006.229.03:13:13.51#ibcon#read 4, iclass 10, count 0 2006.229.03:13:13.51#ibcon#about to read 5, iclass 10, count 0 2006.229.03:13:13.51#ibcon#read 5, iclass 10, count 0 2006.229.03:13:13.51#ibcon#about to read 6, iclass 10, count 0 2006.229.03:13:13.51#ibcon#read 6, iclass 10, count 0 2006.229.03:13:13.51#ibcon#end of sib2, iclass 10, count 0 2006.229.03:13:13.51#ibcon#*after write, iclass 10, count 0 2006.229.03:13:13.51#ibcon#*before return 0, iclass 10, count 0 2006.229.03:13:13.51#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:13:13.51#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:13:13.51#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:13:13.51#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:13:13.51$vck44/vblo=2,634.99 2006.229.03:13:13.51#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.03:13:13.51#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.03:13:13.51#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:13.51#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:13.51#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:13.51#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:13.51#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:13:13.51#ibcon#first serial, iclass 12, count 0 2006.229.03:13:13.51#ibcon#enter sib2, iclass 12, count 0 2006.229.03:13:13.51#ibcon#flushed, iclass 12, count 0 2006.229.03:13:13.51#ibcon#about to write, iclass 12, count 0 2006.229.03:13:13.51#ibcon#wrote, iclass 12, count 0 2006.229.03:13:13.51#ibcon#about to read 3, iclass 12, count 0 2006.229.03:13:13.53#ibcon#read 3, iclass 12, count 0 2006.229.03:13:13.53#ibcon#about to read 4, iclass 12, count 0 2006.229.03:13:13.53#ibcon#read 4, iclass 12, count 0 2006.229.03:13:13.53#ibcon#about to read 5, iclass 12, count 0 2006.229.03:13:13.53#ibcon#read 5, iclass 12, count 0 2006.229.03:13:13.53#ibcon#about to read 6, iclass 12, count 0 2006.229.03:13:13.53#ibcon#read 6, iclass 12, count 0 2006.229.03:13:13.53#ibcon#end of sib2, iclass 12, count 0 2006.229.03:13:13.53#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:13:13.53#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:13:13.53#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:13:13.53#ibcon#*before write, iclass 12, count 0 2006.229.03:13:13.53#ibcon#enter sib2, iclass 12, count 0 2006.229.03:13:13.53#ibcon#flushed, iclass 12, count 0 2006.229.03:13:13.53#ibcon#about to write, iclass 12, count 0 2006.229.03:13:13.53#ibcon#wrote, iclass 12, count 0 2006.229.03:13:13.53#ibcon#about to read 3, iclass 12, count 0 2006.229.03:13:13.57#ibcon#read 3, iclass 12, count 0 2006.229.03:13:13.57#ibcon#about to read 4, iclass 12, count 0 2006.229.03:13:13.57#ibcon#read 4, iclass 12, count 0 2006.229.03:13:13.57#ibcon#about to read 5, iclass 12, count 0 2006.229.03:13:13.57#ibcon#read 5, iclass 12, count 0 2006.229.03:13:13.57#ibcon#about to read 6, iclass 12, count 0 2006.229.03:13:13.57#ibcon#read 6, iclass 12, count 0 2006.229.03:13:13.57#ibcon#end of sib2, iclass 12, count 0 2006.229.03:13:13.57#ibcon#*after write, iclass 12, count 0 2006.229.03:13:13.57#ibcon#*before return 0, iclass 12, count 0 2006.229.03:13:13.57#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:13.57#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:13:13.57#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:13:13.57#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:13:13.57$vck44/vb=2,4 2006.229.03:13:13.57#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.03:13:13.57#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.03:13:13.57#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:13.57#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:13.63#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:13.63#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:13.63#ibcon#enter wrdev, iclass 14, count 2 2006.229.03:13:13.63#ibcon#first serial, iclass 14, count 2 2006.229.03:13:13.63#ibcon#enter sib2, iclass 14, count 2 2006.229.03:13:13.63#ibcon#flushed, iclass 14, count 2 2006.229.03:13:13.63#ibcon#about to write, iclass 14, count 2 2006.229.03:13:13.63#ibcon#wrote, iclass 14, count 2 2006.229.03:13:13.63#ibcon#about to read 3, iclass 14, count 2 2006.229.03:13:13.65#ibcon#read 3, iclass 14, count 2 2006.229.03:13:13.65#ibcon#about to read 4, iclass 14, count 2 2006.229.03:13:13.65#ibcon#read 4, iclass 14, count 2 2006.229.03:13:13.65#ibcon#about to read 5, iclass 14, count 2 2006.229.03:13:13.65#ibcon#read 5, iclass 14, count 2 2006.229.03:13:13.65#ibcon#about to read 6, iclass 14, count 2 2006.229.03:13:13.65#ibcon#read 6, iclass 14, count 2 2006.229.03:13:13.65#ibcon#end of sib2, iclass 14, count 2 2006.229.03:13:13.65#ibcon#*mode == 0, iclass 14, count 2 2006.229.03:13:13.65#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.03:13:13.65#ibcon#[27=AT02-04\r\n] 2006.229.03:13:13.65#ibcon#*before write, iclass 14, count 2 2006.229.03:13:13.65#ibcon#enter sib2, iclass 14, count 2 2006.229.03:13:13.65#ibcon#flushed, iclass 14, count 2 2006.229.03:13:13.65#ibcon#about to write, iclass 14, count 2 2006.229.03:13:13.65#ibcon#wrote, iclass 14, count 2 2006.229.03:13:13.65#ibcon#about to read 3, iclass 14, count 2 2006.229.03:13:13.68#ibcon#read 3, iclass 14, count 2 2006.229.03:13:13.68#ibcon#about to read 4, iclass 14, count 2 2006.229.03:13:13.68#ibcon#read 4, iclass 14, count 2 2006.229.03:13:13.68#ibcon#about to read 5, iclass 14, count 2 2006.229.03:13:13.68#ibcon#read 5, iclass 14, count 2 2006.229.03:13:13.68#ibcon#about to read 6, iclass 14, count 2 2006.229.03:13:13.68#ibcon#read 6, iclass 14, count 2 2006.229.03:13:13.68#ibcon#end of sib2, iclass 14, count 2 2006.229.03:13:13.68#ibcon#*after write, iclass 14, count 2 2006.229.03:13:13.68#ibcon#*before return 0, iclass 14, count 2 2006.229.03:13:13.75#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:13.75#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:13:13.75#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.03:13:13.75#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:13.75#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:13.87#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:13.87#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:13.87#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:13:13.87#ibcon#first serial, iclass 14, count 0 2006.229.03:13:13.87#ibcon#enter sib2, iclass 14, count 0 2006.229.03:13:13.87#ibcon#flushed, iclass 14, count 0 2006.229.03:13:13.87#ibcon#about to write, iclass 14, count 0 2006.229.03:13:13.87#ibcon#wrote, iclass 14, count 0 2006.229.03:13:13.87#ibcon#about to read 3, iclass 14, count 0 2006.229.03:13:13.89#ibcon#read 3, iclass 14, count 0 2006.229.03:13:13.89#ibcon#about to read 4, iclass 14, count 0 2006.229.03:13:13.89#ibcon#read 4, iclass 14, count 0 2006.229.03:13:13.89#ibcon#about to read 5, iclass 14, count 0 2006.229.03:13:13.89#ibcon#read 5, iclass 14, count 0 2006.229.03:13:13.89#ibcon#about to read 6, iclass 14, count 0 2006.229.03:13:13.89#ibcon#read 6, iclass 14, count 0 2006.229.03:13:13.89#ibcon#end of sib2, iclass 14, count 0 2006.229.03:13:13.89#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:13:13.89#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:13:13.89#ibcon#[27=USB\r\n] 2006.229.03:13:13.89#ibcon#*before write, iclass 14, count 0 2006.229.03:13:13.89#ibcon#enter sib2, iclass 14, count 0 2006.229.03:13:13.89#ibcon#flushed, iclass 14, count 0 2006.229.03:13:13.89#ibcon#about to write, iclass 14, count 0 2006.229.03:13:13.89#ibcon#wrote, iclass 14, count 0 2006.229.03:13:13.89#ibcon#about to read 3, iclass 14, count 0 2006.229.03:13:13.92#ibcon#read 3, iclass 14, count 0 2006.229.03:13:13.92#ibcon#about to read 4, iclass 14, count 0 2006.229.03:13:13.92#ibcon#read 4, iclass 14, count 0 2006.229.03:13:13.92#ibcon#about to read 5, iclass 14, count 0 2006.229.03:13:13.92#ibcon#read 5, iclass 14, count 0 2006.229.03:13:13.92#ibcon#about to read 6, iclass 14, count 0 2006.229.03:13:13.92#ibcon#read 6, iclass 14, count 0 2006.229.03:13:13.92#ibcon#end of sib2, iclass 14, count 0 2006.229.03:13:13.92#ibcon#*after write, iclass 14, count 0 2006.229.03:13:13.92#ibcon#*before return 0, iclass 14, count 0 2006.229.03:13:13.92#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:13.92#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:13:13.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:13:13.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:13:13.92$vck44/vblo=3,649.99 2006.229.03:13:13.92#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:13:13.92#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:13:13.92#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:13.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:13.92#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:13.92#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:13.92#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:13:13.92#ibcon#first serial, iclass 16, count 0 2006.229.03:13:13.92#ibcon#enter sib2, iclass 16, count 0 2006.229.03:13:13.92#ibcon#flushed, iclass 16, count 0 2006.229.03:13:13.92#ibcon#about to write, iclass 16, count 0 2006.229.03:13:13.92#ibcon#wrote, iclass 16, count 0 2006.229.03:13:13.92#ibcon#about to read 3, iclass 16, count 0 2006.229.03:13:13.94#ibcon#read 3, iclass 16, count 0 2006.229.03:13:13.94#ibcon#about to read 4, iclass 16, count 0 2006.229.03:13:13.94#ibcon#read 4, iclass 16, count 0 2006.229.03:13:13.94#ibcon#about to read 5, iclass 16, count 0 2006.229.03:13:13.94#ibcon#read 5, iclass 16, count 0 2006.229.03:13:13.94#ibcon#about to read 6, iclass 16, count 0 2006.229.03:13:13.94#ibcon#read 6, iclass 16, count 0 2006.229.03:13:13.94#ibcon#end of sib2, iclass 16, count 0 2006.229.03:13:13.94#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:13:13.94#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:13:13.94#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:13:13.94#ibcon#*before write, iclass 16, count 0 2006.229.03:13:13.94#ibcon#enter sib2, iclass 16, count 0 2006.229.03:13:13.94#ibcon#flushed, iclass 16, count 0 2006.229.03:13:13.94#ibcon#about to write, iclass 16, count 0 2006.229.03:13:13.94#ibcon#wrote, iclass 16, count 0 2006.229.03:13:13.94#ibcon#about to read 3, iclass 16, count 0 2006.229.03:13:13.98#ibcon#read 3, iclass 16, count 0 2006.229.03:13:13.98#ibcon#about to read 4, iclass 16, count 0 2006.229.03:13:13.98#ibcon#read 4, iclass 16, count 0 2006.229.03:13:13.98#ibcon#about to read 5, iclass 16, count 0 2006.229.03:13:13.98#ibcon#read 5, iclass 16, count 0 2006.229.03:13:13.98#ibcon#about to read 6, iclass 16, count 0 2006.229.03:13:13.98#ibcon#read 6, iclass 16, count 0 2006.229.03:13:13.98#ibcon#end of sib2, iclass 16, count 0 2006.229.03:13:13.98#ibcon#*after write, iclass 16, count 0 2006.229.03:13:13.98#ibcon#*before return 0, iclass 16, count 0 2006.229.03:13:13.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:13.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:13:13.98#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:13:13.98#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:13:13.98$vck44/vb=3,4 2006.229.03:13:13.98#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.03:13:13.98#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.03:13:13.98#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:13.98#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:14.04#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:14.04#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:14.04#ibcon#enter wrdev, iclass 18, count 2 2006.229.03:13:14.04#ibcon#first serial, iclass 18, count 2 2006.229.03:13:14.04#ibcon#enter sib2, iclass 18, count 2 2006.229.03:13:14.04#ibcon#flushed, iclass 18, count 2 2006.229.03:13:14.04#ibcon#about to write, iclass 18, count 2 2006.229.03:13:14.04#ibcon#wrote, iclass 18, count 2 2006.229.03:13:14.04#ibcon#about to read 3, iclass 18, count 2 2006.229.03:13:14.06#ibcon#read 3, iclass 18, count 2 2006.229.03:13:14.06#ibcon#about to read 4, iclass 18, count 2 2006.229.03:13:14.06#ibcon#read 4, iclass 18, count 2 2006.229.03:13:14.06#ibcon#about to read 5, iclass 18, count 2 2006.229.03:13:14.06#ibcon#read 5, iclass 18, count 2 2006.229.03:13:14.06#ibcon#about to read 6, iclass 18, count 2 2006.229.03:13:14.06#ibcon#read 6, iclass 18, count 2 2006.229.03:13:14.06#ibcon#end of sib2, iclass 18, count 2 2006.229.03:13:14.06#ibcon#*mode == 0, iclass 18, count 2 2006.229.03:13:14.06#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.03:13:14.06#ibcon#[27=AT03-04\r\n] 2006.229.03:13:14.06#ibcon#*before write, iclass 18, count 2 2006.229.03:13:14.06#ibcon#enter sib2, iclass 18, count 2 2006.229.03:13:14.06#ibcon#flushed, iclass 18, count 2 2006.229.03:13:14.06#ibcon#about to write, iclass 18, count 2 2006.229.03:13:14.06#ibcon#wrote, iclass 18, count 2 2006.229.03:13:14.06#ibcon#about to read 3, iclass 18, count 2 2006.229.03:13:14.09#ibcon#read 3, iclass 18, count 2 2006.229.03:13:14.09#ibcon#about to read 4, iclass 18, count 2 2006.229.03:13:14.09#ibcon#read 4, iclass 18, count 2 2006.229.03:13:14.09#ibcon#about to read 5, iclass 18, count 2 2006.229.03:13:14.09#ibcon#read 5, iclass 18, count 2 2006.229.03:13:14.09#ibcon#about to read 6, iclass 18, count 2 2006.229.03:13:14.09#ibcon#read 6, iclass 18, count 2 2006.229.03:13:14.09#ibcon#end of sib2, iclass 18, count 2 2006.229.03:13:14.09#ibcon#*after write, iclass 18, count 2 2006.229.03:13:14.09#ibcon#*before return 0, iclass 18, count 2 2006.229.03:13:14.09#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:14.09#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:13:14.09#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.03:13:14.09#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:14.09#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:14.21#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:14.21#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:14.21#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:13:14.21#ibcon#first serial, iclass 18, count 0 2006.229.03:13:14.21#ibcon#enter sib2, iclass 18, count 0 2006.229.03:13:14.21#ibcon#flushed, iclass 18, count 0 2006.229.03:13:14.21#ibcon#about to write, iclass 18, count 0 2006.229.03:13:14.21#ibcon#wrote, iclass 18, count 0 2006.229.03:13:14.21#ibcon#about to read 3, iclass 18, count 0 2006.229.03:13:14.23#ibcon#read 3, iclass 18, count 0 2006.229.03:13:14.23#ibcon#about to read 4, iclass 18, count 0 2006.229.03:13:14.23#ibcon#read 4, iclass 18, count 0 2006.229.03:13:14.23#ibcon#about to read 5, iclass 18, count 0 2006.229.03:13:14.23#ibcon#read 5, iclass 18, count 0 2006.229.03:13:14.23#ibcon#about to read 6, iclass 18, count 0 2006.229.03:13:14.23#ibcon#read 6, iclass 18, count 0 2006.229.03:13:14.23#ibcon#end of sib2, iclass 18, count 0 2006.229.03:13:14.23#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:13:14.23#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:13:14.23#ibcon#[27=USB\r\n] 2006.229.03:13:14.23#ibcon#*before write, iclass 18, count 0 2006.229.03:13:14.23#ibcon#enter sib2, iclass 18, count 0 2006.229.03:13:14.23#ibcon#flushed, iclass 18, count 0 2006.229.03:13:14.23#ibcon#about to write, iclass 18, count 0 2006.229.03:13:14.23#ibcon#wrote, iclass 18, count 0 2006.229.03:13:14.23#ibcon#about to read 3, iclass 18, count 0 2006.229.03:13:14.26#ibcon#read 3, iclass 18, count 0 2006.229.03:13:14.26#ibcon#about to read 4, iclass 18, count 0 2006.229.03:13:14.26#ibcon#read 4, iclass 18, count 0 2006.229.03:13:14.26#ibcon#about to read 5, iclass 18, count 0 2006.229.03:13:14.26#ibcon#read 5, iclass 18, count 0 2006.229.03:13:14.26#ibcon#about to read 6, iclass 18, count 0 2006.229.03:13:14.26#ibcon#read 6, iclass 18, count 0 2006.229.03:13:14.26#ibcon#end of sib2, iclass 18, count 0 2006.229.03:13:14.26#ibcon#*after write, iclass 18, count 0 2006.229.03:13:14.26#ibcon#*before return 0, iclass 18, count 0 2006.229.03:13:14.26#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:14.26#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:13:14.26#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:13:14.26#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:13:14.26$vck44/vblo=4,679.99 2006.229.03:13:14.26#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.03:13:14.26#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.03:13:14.26#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:14.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:14.26#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:14.26#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:14.26#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:13:14.26#ibcon#first serial, iclass 20, count 0 2006.229.03:13:14.26#ibcon#enter sib2, iclass 20, count 0 2006.229.03:13:14.26#ibcon#flushed, iclass 20, count 0 2006.229.03:13:14.26#ibcon#about to write, iclass 20, count 0 2006.229.03:13:14.26#ibcon#wrote, iclass 20, count 0 2006.229.03:13:14.26#ibcon#about to read 3, iclass 20, count 0 2006.229.03:13:14.28#ibcon#read 3, iclass 20, count 0 2006.229.03:13:14.28#ibcon#about to read 4, iclass 20, count 0 2006.229.03:13:14.28#ibcon#read 4, iclass 20, count 0 2006.229.03:13:14.28#ibcon#about to read 5, iclass 20, count 0 2006.229.03:13:14.28#ibcon#read 5, iclass 20, count 0 2006.229.03:13:14.28#ibcon#about to read 6, iclass 20, count 0 2006.229.03:13:14.28#ibcon#read 6, iclass 20, count 0 2006.229.03:13:14.28#ibcon#end of sib2, iclass 20, count 0 2006.229.03:13:14.28#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:13:14.28#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:13:14.28#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:13:14.28#ibcon#*before write, iclass 20, count 0 2006.229.03:13:14.28#ibcon#enter sib2, iclass 20, count 0 2006.229.03:13:14.28#ibcon#flushed, iclass 20, count 0 2006.229.03:13:14.28#ibcon#about to write, iclass 20, count 0 2006.229.03:13:14.28#ibcon#wrote, iclass 20, count 0 2006.229.03:13:14.28#ibcon#about to read 3, iclass 20, count 0 2006.229.03:13:14.32#ibcon#read 3, iclass 20, count 0 2006.229.03:13:14.32#ibcon#about to read 4, iclass 20, count 0 2006.229.03:13:14.32#ibcon#read 4, iclass 20, count 0 2006.229.03:13:14.32#ibcon#about to read 5, iclass 20, count 0 2006.229.03:13:14.32#ibcon#read 5, iclass 20, count 0 2006.229.03:13:14.32#ibcon#about to read 6, iclass 20, count 0 2006.229.03:13:14.32#ibcon#read 6, iclass 20, count 0 2006.229.03:13:14.32#ibcon#end of sib2, iclass 20, count 0 2006.229.03:13:14.32#ibcon#*after write, iclass 20, count 0 2006.229.03:13:14.32#ibcon#*before return 0, iclass 20, count 0 2006.229.03:13:14.32#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:14.32#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:13:14.32#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:13:14.32#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:13:14.32$vck44/vb=4,4 2006.229.03:13:14.32#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.03:13:14.32#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.03:13:14.32#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:14.32#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:14.38#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:14.38#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:14.38#ibcon#enter wrdev, iclass 22, count 2 2006.229.03:13:14.38#ibcon#first serial, iclass 22, count 2 2006.229.03:13:14.38#ibcon#enter sib2, iclass 22, count 2 2006.229.03:13:14.38#ibcon#flushed, iclass 22, count 2 2006.229.03:13:14.38#ibcon#about to write, iclass 22, count 2 2006.229.03:13:14.38#ibcon#wrote, iclass 22, count 2 2006.229.03:13:14.38#ibcon#about to read 3, iclass 22, count 2 2006.229.03:13:14.40#ibcon#read 3, iclass 22, count 2 2006.229.03:13:14.40#ibcon#about to read 4, iclass 22, count 2 2006.229.03:13:14.40#ibcon#read 4, iclass 22, count 2 2006.229.03:13:14.40#ibcon#about to read 5, iclass 22, count 2 2006.229.03:13:14.40#ibcon#read 5, iclass 22, count 2 2006.229.03:13:14.40#ibcon#about to read 6, iclass 22, count 2 2006.229.03:13:14.40#ibcon#read 6, iclass 22, count 2 2006.229.03:13:14.40#ibcon#end of sib2, iclass 22, count 2 2006.229.03:13:14.40#ibcon#*mode == 0, iclass 22, count 2 2006.229.03:13:14.40#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.03:13:14.40#ibcon#[27=AT04-04\r\n] 2006.229.03:13:14.40#ibcon#*before write, iclass 22, count 2 2006.229.03:13:14.40#ibcon#enter sib2, iclass 22, count 2 2006.229.03:13:14.40#ibcon#flushed, iclass 22, count 2 2006.229.03:13:14.40#ibcon#about to write, iclass 22, count 2 2006.229.03:13:14.40#ibcon#wrote, iclass 22, count 2 2006.229.03:13:14.40#ibcon#about to read 3, iclass 22, count 2 2006.229.03:13:14.43#ibcon#read 3, iclass 22, count 2 2006.229.03:13:14.43#ibcon#about to read 4, iclass 22, count 2 2006.229.03:13:14.43#ibcon#read 4, iclass 22, count 2 2006.229.03:13:14.43#ibcon#about to read 5, iclass 22, count 2 2006.229.03:13:14.43#ibcon#read 5, iclass 22, count 2 2006.229.03:13:14.43#ibcon#about to read 6, iclass 22, count 2 2006.229.03:13:14.43#ibcon#read 6, iclass 22, count 2 2006.229.03:13:14.43#ibcon#end of sib2, iclass 22, count 2 2006.229.03:13:14.43#ibcon#*after write, iclass 22, count 2 2006.229.03:13:14.43#ibcon#*before return 0, iclass 22, count 2 2006.229.03:13:14.43#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:14.43#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:13:14.43#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.03:13:14.43#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:14.43#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:14.55#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:14.55#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:14.55#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:13:14.55#ibcon#first serial, iclass 22, count 0 2006.229.03:13:14.55#ibcon#enter sib2, iclass 22, count 0 2006.229.03:13:14.55#ibcon#flushed, iclass 22, count 0 2006.229.03:13:14.55#ibcon#about to write, iclass 22, count 0 2006.229.03:13:14.55#ibcon#wrote, iclass 22, count 0 2006.229.03:13:14.55#ibcon#about to read 3, iclass 22, count 0 2006.229.03:13:14.57#ibcon#read 3, iclass 22, count 0 2006.229.03:13:14.57#ibcon#about to read 4, iclass 22, count 0 2006.229.03:13:14.57#ibcon#read 4, iclass 22, count 0 2006.229.03:13:14.57#ibcon#about to read 5, iclass 22, count 0 2006.229.03:13:14.57#ibcon#read 5, iclass 22, count 0 2006.229.03:13:14.57#ibcon#about to read 6, iclass 22, count 0 2006.229.03:13:14.57#ibcon#read 6, iclass 22, count 0 2006.229.03:13:14.57#ibcon#end of sib2, iclass 22, count 0 2006.229.03:13:14.57#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:13:14.57#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:13:14.57#ibcon#[27=USB\r\n] 2006.229.03:13:14.57#ibcon#*before write, iclass 22, count 0 2006.229.03:13:14.57#ibcon#enter sib2, iclass 22, count 0 2006.229.03:13:14.57#ibcon#flushed, iclass 22, count 0 2006.229.03:13:14.57#ibcon#about to write, iclass 22, count 0 2006.229.03:13:14.57#ibcon#wrote, iclass 22, count 0 2006.229.03:13:14.57#ibcon#about to read 3, iclass 22, count 0 2006.229.03:13:14.60#ibcon#read 3, iclass 22, count 0 2006.229.03:13:14.60#ibcon#about to read 4, iclass 22, count 0 2006.229.03:13:14.60#ibcon#read 4, iclass 22, count 0 2006.229.03:13:14.60#ibcon#about to read 5, iclass 22, count 0 2006.229.03:13:14.60#ibcon#read 5, iclass 22, count 0 2006.229.03:13:14.60#ibcon#about to read 6, iclass 22, count 0 2006.229.03:13:14.60#ibcon#read 6, iclass 22, count 0 2006.229.03:13:14.60#ibcon#end of sib2, iclass 22, count 0 2006.229.03:13:14.60#ibcon#*after write, iclass 22, count 0 2006.229.03:13:14.60#ibcon#*before return 0, iclass 22, count 0 2006.229.03:13:14.60#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:14.60#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:13:14.60#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:13:14.60#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:13:14.60$vck44/vblo=5,709.99 2006.229.03:13:14.60#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.03:13:14.60#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.03:13:14.60#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:14.60#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:14.60#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:14.60#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:14.60#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:13:14.60#ibcon#first serial, iclass 24, count 0 2006.229.03:13:14.60#ibcon#enter sib2, iclass 24, count 0 2006.229.03:13:14.60#ibcon#flushed, iclass 24, count 0 2006.229.03:13:14.60#ibcon#about to write, iclass 24, count 0 2006.229.03:13:14.60#ibcon#wrote, iclass 24, count 0 2006.229.03:13:14.60#ibcon#about to read 3, iclass 24, count 0 2006.229.03:13:14.62#ibcon#read 3, iclass 24, count 0 2006.229.03:13:14.62#ibcon#about to read 4, iclass 24, count 0 2006.229.03:13:14.62#ibcon#read 4, iclass 24, count 0 2006.229.03:13:14.62#ibcon#about to read 5, iclass 24, count 0 2006.229.03:13:14.62#ibcon#read 5, iclass 24, count 0 2006.229.03:13:14.62#ibcon#about to read 6, iclass 24, count 0 2006.229.03:13:14.62#ibcon#read 6, iclass 24, count 0 2006.229.03:13:14.62#ibcon#end of sib2, iclass 24, count 0 2006.229.03:13:14.62#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:13:14.62#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:13:14.62#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:13:14.62#ibcon#*before write, iclass 24, count 0 2006.229.03:13:14.62#ibcon#enter sib2, iclass 24, count 0 2006.229.03:13:14.62#ibcon#flushed, iclass 24, count 0 2006.229.03:13:14.62#ibcon#about to write, iclass 24, count 0 2006.229.03:13:14.62#ibcon#wrote, iclass 24, count 0 2006.229.03:13:14.62#ibcon#about to read 3, iclass 24, count 0 2006.229.03:13:14.66#ibcon#read 3, iclass 24, count 0 2006.229.03:13:14.66#ibcon#about to read 4, iclass 24, count 0 2006.229.03:13:14.66#ibcon#read 4, iclass 24, count 0 2006.229.03:13:14.66#ibcon#about to read 5, iclass 24, count 0 2006.229.03:13:14.66#ibcon#read 5, iclass 24, count 0 2006.229.03:13:14.66#ibcon#about to read 6, iclass 24, count 0 2006.229.03:13:14.66#ibcon#read 6, iclass 24, count 0 2006.229.03:13:14.66#ibcon#end of sib2, iclass 24, count 0 2006.229.03:13:14.66#ibcon#*after write, iclass 24, count 0 2006.229.03:13:14.66#ibcon#*before return 0, iclass 24, count 0 2006.229.03:13:14.66#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:14.66#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:13:14.66#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:13:14.66#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:13:14.66$vck44/vb=5,4 2006.229.03:13:14.66#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.03:13:14.66#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.03:13:14.66#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:14.66#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:14.72#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:14.72#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:14.72#ibcon#enter wrdev, iclass 26, count 2 2006.229.03:13:14.72#ibcon#first serial, iclass 26, count 2 2006.229.03:13:14.72#ibcon#enter sib2, iclass 26, count 2 2006.229.03:13:14.72#ibcon#flushed, iclass 26, count 2 2006.229.03:13:14.72#ibcon#about to write, iclass 26, count 2 2006.229.03:13:14.72#ibcon#wrote, iclass 26, count 2 2006.229.03:13:14.72#ibcon#about to read 3, iclass 26, count 2 2006.229.03:13:14.74#ibcon#read 3, iclass 26, count 2 2006.229.03:13:14.74#ibcon#about to read 4, iclass 26, count 2 2006.229.03:13:14.74#ibcon#read 4, iclass 26, count 2 2006.229.03:13:14.74#ibcon#about to read 5, iclass 26, count 2 2006.229.03:13:14.74#ibcon#read 5, iclass 26, count 2 2006.229.03:13:14.74#ibcon#about to read 6, iclass 26, count 2 2006.229.03:13:14.74#ibcon#read 6, iclass 26, count 2 2006.229.03:13:14.74#ibcon#end of sib2, iclass 26, count 2 2006.229.03:13:14.74#ibcon#*mode == 0, iclass 26, count 2 2006.229.03:13:14.74#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.03:13:14.74#ibcon#[27=AT05-04\r\n] 2006.229.03:13:14.74#ibcon#*before write, iclass 26, count 2 2006.229.03:13:14.74#ibcon#enter sib2, iclass 26, count 2 2006.229.03:13:14.74#ibcon#flushed, iclass 26, count 2 2006.229.03:13:14.74#ibcon#about to write, iclass 26, count 2 2006.229.03:13:14.74#ibcon#wrote, iclass 26, count 2 2006.229.03:13:14.74#ibcon#about to read 3, iclass 26, count 2 2006.229.03:13:14.77#ibcon#read 3, iclass 26, count 2 2006.229.03:13:14.77#ibcon#about to read 4, iclass 26, count 2 2006.229.03:13:14.77#ibcon#read 4, iclass 26, count 2 2006.229.03:13:14.77#ibcon#about to read 5, iclass 26, count 2 2006.229.03:13:14.77#ibcon#read 5, iclass 26, count 2 2006.229.03:13:14.77#ibcon#about to read 6, iclass 26, count 2 2006.229.03:13:14.77#ibcon#read 6, iclass 26, count 2 2006.229.03:13:14.77#ibcon#end of sib2, iclass 26, count 2 2006.229.03:13:14.77#ibcon#*after write, iclass 26, count 2 2006.229.03:13:14.77#ibcon#*before return 0, iclass 26, count 2 2006.229.03:13:14.77#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:14.77#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:13:14.77#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.03:13:14.77#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:14.77#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:14.89#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:14.89#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:14.89#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:13:14.89#ibcon#first serial, iclass 26, count 0 2006.229.03:13:14.89#ibcon#enter sib2, iclass 26, count 0 2006.229.03:13:14.89#ibcon#flushed, iclass 26, count 0 2006.229.03:13:14.89#ibcon#about to write, iclass 26, count 0 2006.229.03:13:14.89#ibcon#wrote, iclass 26, count 0 2006.229.03:13:14.89#ibcon#about to read 3, iclass 26, count 0 2006.229.03:13:14.91#ibcon#read 3, iclass 26, count 0 2006.229.03:13:14.91#ibcon#about to read 4, iclass 26, count 0 2006.229.03:13:14.91#ibcon#read 4, iclass 26, count 0 2006.229.03:13:14.91#ibcon#about to read 5, iclass 26, count 0 2006.229.03:13:14.91#ibcon#read 5, iclass 26, count 0 2006.229.03:13:14.91#ibcon#about to read 6, iclass 26, count 0 2006.229.03:13:14.91#ibcon#read 6, iclass 26, count 0 2006.229.03:13:14.91#ibcon#end of sib2, iclass 26, count 0 2006.229.03:13:14.91#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:13:14.91#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:13:14.91#ibcon#[27=USB\r\n] 2006.229.03:13:14.91#ibcon#*before write, iclass 26, count 0 2006.229.03:13:14.91#ibcon#enter sib2, iclass 26, count 0 2006.229.03:13:14.91#ibcon#flushed, iclass 26, count 0 2006.229.03:13:14.91#ibcon#about to write, iclass 26, count 0 2006.229.03:13:14.91#ibcon#wrote, iclass 26, count 0 2006.229.03:13:14.91#ibcon#about to read 3, iclass 26, count 0 2006.229.03:13:14.94#ibcon#read 3, iclass 26, count 0 2006.229.03:13:14.94#ibcon#about to read 4, iclass 26, count 0 2006.229.03:13:14.94#ibcon#read 4, iclass 26, count 0 2006.229.03:13:14.94#ibcon#about to read 5, iclass 26, count 0 2006.229.03:13:14.94#ibcon#read 5, iclass 26, count 0 2006.229.03:13:14.94#ibcon#about to read 6, iclass 26, count 0 2006.229.03:13:14.94#ibcon#read 6, iclass 26, count 0 2006.229.03:13:14.94#ibcon#end of sib2, iclass 26, count 0 2006.229.03:13:14.94#ibcon#*after write, iclass 26, count 0 2006.229.03:13:14.94#ibcon#*before return 0, iclass 26, count 0 2006.229.03:13:14.94#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:14.94#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:13:14.94#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:13:14.94#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:13:14.94$vck44/vblo=6,719.99 2006.229.03:13:14.94#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.03:13:14.94#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.03:13:14.94#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:14.94#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:14.94#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:14.94#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:14.94#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:13:14.94#ibcon#first serial, iclass 28, count 0 2006.229.03:13:14.94#ibcon#enter sib2, iclass 28, count 0 2006.229.03:13:14.94#ibcon#flushed, iclass 28, count 0 2006.229.03:13:14.94#ibcon#about to write, iclass 28, count 0 2006.229.03:13:14.94#ibcon#wrote, iclass 28, count 0 2006.229.03:13:14.94#ibcon#about to read 3, iclass 28, count 0 2006.229.03:13:14.96#ibcon#read 3, iclass 28, count 0 2006.229.03:13:14.96#ibcon#about to read 4, iclass 28, count 0 2006.229.03:13:14.96#ibcon#read 4, iclass 28, count 0 2006.229.03:13:14.96#ibcon#about to read 5, iclass 28, count 0 2006.229.03:13:14.96#ibcon#read 5, iclass 28, count 0 2006.229.03:13:14.96#ibcon#about to read 6, iclass 28, count 0 2006.229.03:13:14.96#ibcon#read 6, iclass 28, count 0 2006.229.03:13:14.96#ibcon#end of sib2, iclass 28, count 0 2006.229.03:13:14.96#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:13:14.96#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:13:14.96#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:13:14.96#ibcon#*before write, iclass 28, count 0 2006.229.03:13:14.96#ibcon#enter sib2, iclass 28, count 0 2006.229.03:13:14.96#ibcon#flushed, iclass 28, count 0 2006.229.03:13:14.96#ibcon#about to write, iclass 28, count 0 2006.229.03:13:14.96#ibcon#wrote, iclass 28, count 0 2006.229.03:13:14.96#ibcon#about to read 3, iclass 28, count 0 2006.229.03:13:15.00#ibcon#read 3, iclass 28, count 0 2006.229.03:13:15.00#ibcon#about to read 4, iclass 28, count 0 2006.229.03:13:15.00#ibcon#read 4, iclass 28, count 0 2006.229.03:13:15.00#ibcon#about to read 5, iclass 28, count 0 2006.229.03:13:15.00#ibcon#read 5, iclass 28, count 0 2006.229.03:13:15.00#ibcon#about to read 6, iclass 28, count 0 2006.229.03:13:15.00#ibcon#read 6, iclass 28, count 0 2006.229.03:13:15.00#ibcon#end of sib2, iclass 28, count 0 2006.229.03:13:15.00#ibcon#*after write, iclass 28, count 0 2006.229.03:13:15.00#ibcon#*before return 0, iclass 28, count 0 2006.229.03:13:15.00#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:15.00#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:13:15.00#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:13:15.00#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:13:15.00$vck44/vb=6,4 2006.229.03:13:15.00#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.03:13:15.00#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.03:13:15.00#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:15.00#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:13:15.04#abcon#<5=/04 1.7 3.1 28.601001000.7\r\n> 2006.229.03:13:15.06#abcon#{5=INTERFACE CLEAR} 2006.229.03:13:15.06#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:13:15.06#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:13:15.06#ibcon#enter wrdev, iclass 31, count 2 2006.229.03:13:15.06#ibcon#first serial, iclass 31, count 2 2006.229.03:13:15.06#ibcon#enter sib2, iclass 31, count 2 2006.229.03:13:15.06#ibcon#flushed, iclass 31, count 2 2006.229.03:13:15.06#ibcon#about to write, iclass 31, count 2 2006.229.03:13:15.06#ibcon#wrote, iclass 31, count 2 2006.229.03:13:15.06#ibcon#about to read 3, iclass 31, count 2 2006.229.03:13:15.08#ibcon#read 3, iclass 31, count 2 2006.229.03:13:15.08#ibcon#about to read 4, iclass 31, count 2 2006.229.03:13:15.08#ibcon#read 4, iclass 31, count 2 2006.229.03:13:15.08#ibcon#about to read 5, iclass 31, count 2 2006.229.03:13:15.08#ibcon#read 5, iclass 31, count 2 2006.229.03:13:15.08#ibcon#about to read 6, iclass 31, count 2 2006.229.03:13:15.08#ibcon#read 6, iclass 31, count 2 2006.229.03:13:15.08#ibcon#end of sib2, iclass 31, count 2 2006.229.03:13:15.08#ibcon#*mode == 0, iclass 31, count 2 2006.229.03:13:15.08#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.03:13:15.08#ibcon#[27=AT06-04\r\n] 2006.229.03:13:15.08#ibcon#*before write, iclass 31, count 2 2006.229.03:13:15.08#ibcon#enter sib2, iclass 31, count 2 2006.229.03:13:15.08#ibcon#flushed, iclass 31, count 2 2006.229.03:13:15.08#ibcon#about to write, iclass 31, count 2 2006.229.03:13:15.08#ibcon#wrote, iclass 31, count 2 2006.229.03:13:15.08#ibcon#about to read 3, iclass 31, count 2 2006.229.03:13:15.11#ibcon#read 3, iclass 31, count 2 2006.229.03:13:15.11#ibcon#about to read 4, iclass 31, count 2 2006.229.03:13:15.11#ibcon#read 4, iclass 31, count 2 2006.229.03:13:15.11#ibcon#about to read 5, iclass 31, count 2 2006.229.03:13:15.11#ibcon#read 5, iclass 31, count 2 2006.229.03:13:15.11#ibcon#about to read 6, iclass 31, count 2 2006.229.03:13:15.11#ibcon#read 6, iclass 31, count 2 2006.229.03:13:15.11#ibcon#end of sib2, iclass 31, count 2 2006.229.03:13:15.11#ibcon#*after write, iclass 31, count 2 2006.229.03:13:15.11#ibcon#*before return 0, iclass 31, count 2 2006.229.03:13:15.11#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:13:15.11#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:13:15.11#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.03:13:15.11#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:15.11#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:13:15.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:13:15.23#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:13:15.23#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:13:15.23#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:13:15.23#ibcon#first serial, iclass 31, count 0 2006.229.03:13:15.23#ibcon#enter sib2, iclass 31, count 0 2006.229.03:13:15.23#ibcon#flushed, iclass 31, count 0 2006.229.03:13:15.23#ibcon#about to write, iclass 31, count 0 2006.229.03:13:15.23#ibcon#wrote, iclass 31, count 0 2006.229.03:13:15.23#ibcon#about to read 3, iclass 31, count 0 2006.229.03:13:15.25#ibcon#read 3, iclass 31, count 0 2006.229.03:13:15.25#ibcon#about to read 4, iclass 31, count 0 2006.229.03:13:15.25#ibcon#read 4, iclass 31, count 0 2006.229.03:13:15.25#ibcon#about to read 5, iclass 31, count 0 2006.229.03:13:15.25#ibcon#read 5, iclass 31, count 0 2006.229.03:13:15.25#ibcon#about to read 6, iclass 31, count 0 2006.229.03:13:15.25#ibcon#read 6, iclass 31, count 0 2006.229.03:13:15.25#ibcon#end of sib2, iclass 31, count 0 2006.229.03:13:15.25#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:13:15.25#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:13:15.25#ibcon#[27=USB\r\n] 2006.229.03:13:15.25#ibcon#*before write, iclass 31, count 0 2006.229.03:13:15.25#ibcon#enter sib2, iclass 31, count 0 2006.229.03:13:15.25#ibcon#flushed, iclass 31, count 0 2006.229.03:13:15.25#ibcon#about to write, iclass 31, count 0 2006.229.03:13:15.25#ibcon#wrote, iclass 31, count 0 2006.229.03:13:15.25#ibcon#about to read 3, iclass 31, count 0 2006.229.03:13:15.28#ibcon#read 3, iclass 31, count 0 2006.229.03:13:15.28#ibcon#about to read 4, iclass 31, count 0 2006.229.03:13:15.28#ibcon#read 4, iclass 31, count 0 2006.229.03:13:15.28#ibcon#about to read 5, iclass 31, count 0 2006.229.03:13:15.28#ibcon#read 5, iclass 31, count 0 2006.229.03:13:15.28#ibcon#about to read 6, iclass 31, count 0 2006.229.03:13:15.28#ibcon#read 6, iclass 31, count 0 2006.229.03:13:15.28#ibcon#end of sib2, iclass 31, count 0 2006.229.03:13:15.28#ibcon#*after write, iclass 31, count 0 2006.229.03:13:15.28#ibcon#*before return 0, iclass 31, count 0 2006.229.03:13:15.28#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:13:15.28#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:13:15.28#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:13:15.28#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:13:15.28$vck44/vblo=7,734.99 2006.229.03:13:15.28#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.03:13:15.28#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.03:13:15.28#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:15.28#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:15.28#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:15.28#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:15.28#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:13:15.28#ibcon#first serial, iclass 36, count 0 2006.229.03:13:15.28#ibcon#enter sib2, iclass 36, count 0 2006.229.03:13:15.28#ibcon#flushed, iclass 36, count 0 2006.229.03:13:15.28#ibcon#about to write, iclass 36, count 0 2006.229.03:13:15.28#ibcon#wrote, iclass 36, count 0 2006.229.03:13:15.28#ibcon#about to read 3, iclass 36, count 0 2006.229.03:13:15.30#ibcon#read 3, iclass 36, count 0 2006.229.03:13:15.30#ibcon#about to read 4, iclass 36, count 0 2006.229.03:13:15.30#ibcon#read 4, iclass 36, count 0 2006.229.03:13:15.30#ibcon#about to read 5, iclass 36, count 0 2006.229.03:13:15.30#ibcon#read 5, iclass 36, count 0 2006.229.03:13:15.30#ibcon#about to read 6, iclass 36, count 0 2006.229.03:13:15.30#ibcon#read 6, iclass 36, count 0 2006.229.03:13:15.30#ibcon#end of sib2, iclass 36, count 0 2006.229.03:13:15.30#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:13:15.30#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:13:15.30#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:13:15.30#ibcon#*before write, iclass 36, count 0 2006.229.03:13:15.30#ibcon#enter sib2, iclass 36, count 0 2006.229.03:13:15.30#ibcon#flushed, iclass 36, count 0 2006.229.03:13:15.30#ibcon#about to write, iclass 36, count 0 2006.229.03:13:15.30#ibcon#wrote, iclass 36, count 0 2006.229.03:13:15.30#ibcon#about to read 3, iclass 36, count 0 2006.229.03:13:15.34#ibcon#read 3, iclass 36, count 0 2006.229.03:13:15.34#ibcon#about to read 4, iclass 36, count 0 2006.229.03:13:15.34#ibcon#read 4, iclass 36, count 0 2006.229.03:13:15.34#ibcon#about to read 5, iclass 36, count 0 2006.229.03:13:15.34#ibcon#read 5, iclass 36, count 0 2006.229.03:13:15.34#ibcon#about to read 6, iclass 36, count 0 2006.229.03:13:15.34#ibcon#read 6, iclass 36, count 0 2006.229.03:13:15.34#ibcon#end of sib2, iclass 36, count 0 2006.229.03:13:15.34#ibcon#*after write, iclass 36, count 0 2006.229.03:13:15.34#ibcon#*before return 0, iclass 36, count 0 2006.229.03:13:15.34#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:15.34#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:13:15.34#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:13:15.34#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:13:15.34$vck44/vb=7,4 2006.229.03:13:15.34#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.03:13:15.34#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.03:13:15.34#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:15.34#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:15.40#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:15.40#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:15.40#ibcon#enter wrdev, iclass 38, count 2 2006.229.03:13:15.40#ibcon#first serial, iclass 38, count 2 2006.229.03:13:15.40#ibcon#enter sib2, iclass 38, count 2 2006.229.03:13:15.40#ibcon#flushed, iclass 38, count 2 2006.229.03:13:15.40#ibcon#about to write, iclass 38, count 2 2006.229.03:13:15.40#ibcon#wrote, iclass 38, count 2 2006.229.03:13:15.40#ibcon#about to read 3, iclass 38, count 2 2006.229.03:13:15.42#ibcon#read 3, iclass 38, count 2 2006.229.03:13:15.42#ibcon#about to read 4, iclass 38, count 2 2006.229.03:13:15.42#ibcon#read 4, iclass 38, count 2 2006.229.03:13:15.42#ibcon#about to read 5, iclass 38, count 2 2006.229.03:13:15.42#ibcon#read 5, iclass 38, count 2 2006.229.03:13:15.42#ibcon#about to read 6, iclass 38, count 2 2006.229.03:13:15.42#ibcon#read 6, iclass 38, count 2 2006.229.03:13:15.42#ibcon#end of sib2, iclass 38, count 2 2006.229.03:13:15.42#ibcon#*mode == 0, iclass 38, count 2 2006.229.03:13:15.42#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.03:13:15.42#ibcon#[27=AT07-04\r\n] 2006.229.03:13:15.42#ibcon#*before write, iclass 38, count 2 2006.229.03:13:15.42#ibcon#enter sib2, iclass 38, count 2 2006.229.03:13:15.42#ibcon#flushed, iclass 38, count 2 2006.229.03:13:15.42#ibcon#about to write, iclass 38, count 2 2006.229.03:13:15.42#ibcon#wrote, iclass 38, count 2 2006.229.03:13:15.42#ibcon#about to read 3, iclass 38, count 2 2006.229.03:13:15.45#ibcon#read 3, iclass 38, count 2 2006.229.03:13:15.45#ibcon#about to read 4, iclass 38, count 2 2006.229.03:13:15.45#ibcon#read 4, iclass 38, count 2 2006.229.03:13:15.45#ibcon#about to read 5, iclass 38, count 2 2006.229.03:13:15.45#ibcon#read 5, iclass 38, count 2 2006.229.03:13:15.45#ibcon#about to read 6, iclass 38, count 2 2006.229.03:13:15.45#ibcon#read 6, iclass 38, count 2 2006.229.03:13:15.45#ibcon#end of sib2, iclass 38, count 2 2006.229.03:13:15.45#ibcon#*after write, iclass 38, count 2 2006.229.03:13:15.45#ibcon#*before return 0, iclass 38, count 2 2006.229.03:13:15.45#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:15.45#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:13:15.45#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.03:13:15.45#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:15.45#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:15.57#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:15.57#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:15.57#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:13:15.57#ibcon#first serial, iclass 38, count 0 2006.229.03:13:15.57#ibcon#enter sib2, iclass 38, count 0 2006.229.03:13:15.57#ibcon#flushed, iclass 38, count 0 2006.229.03:13:15.57#ibcon#about to write, iclass 38, count 0 2006.229.03:13:15.57#ibcon#wrote, iclass 38, count 0 2006.229.03:13:15.57#ibcon#about to read 3, iclass 38, count 0 2006.229.03:13:15.59#ibcon#read 3, iclass 38, count 0 2006.229.03:13:15.59#ibcon#about to read 4, iclass 38, count 0 2006.229.03:13:15.59#ibcon#read 4, iclass 38, count 0 2006.229.03:13:15.59#ibcon#about to read 5, iclass 38, count 0 2006.229.03:13:15.59#ibcon#read 5, iclass 38, count 0 2006.229.03:13:15.59#ibcon#about to read 6, iclass 38, count 0 2006.229.03:13:15.59#ibcon#read 6, iclass 38, count 0 2006.229.03:13:15.59#ibcon#end of sib2, iclass 38, count 0 2006.229.03:13:15.59#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:13:15.59#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:13:15.59#ibcon#[27=USB\r\n] 2006.229.03:13:15.59#ibcon#*before write, iclass 38, count 0 2006.229.03:13:15.59#ibcon#enter sib2, iclass 38, count 0 2006.229.03:13:15.59#ibcon#flushed, iclass 38, count 0 2006.229.03:13:15.59#ibcon#about to write, iclass 38, count 0 2006.229.03:13:15.59#ibcon#wrote, iclass 38, count 0 2006.229.03:13:15.59#ibcon#about to read 3, iclass 38, count 0 2006.229.03:13:15.62#ibcon#read 3, iclass 38, count 0 2006.229.03:13:15.62#ibcon#about to read 4, iclass 38, count 0 2006.229.03:13:15.62#ibcon#read 4, iclass 38, count 0 2006.229.03:13:15.62#ibcon#about to read 5, iclass 38, count 0 2006.229.03:13:15.62#ibcon#read 5, iclass 38, count 0 2006.229.03:13:15.62#ibcon#about to read 6, iclass 38, count 0 2006.229.03:13:15.62#ibcon#read 6, iclass 38, count 0 2006.229.03:13:15.62#ibcon#end of sib2, iclass 38, count 0 2006.229.03:13:15.62#ibcon#*after write, iclass 38, count 0 2006.229.03:13:15.62#ibcon#*before return 0, iclass 38, count 0 2006.229.03:13:15.62#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:15.62#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:13:15.62#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:13:15.62#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:13:15.62$vck44/vblo=8,744.99 2006.229.03:13:15.62#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.03:13:15.62#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.03:13:15.62#ibcon#ireg 17 cls_cnt 0 2006.229.03:13:15.62#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:15.62#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:15.62#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:15.62#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:13:15.62#ibcon#first serial, iclass 40, count 0 2006.229.03:13:15.62#ibcon#enter sib2, iclass 40, count 0 2006.229.03:13:15.62#ibcon#flushed, iclass 40, count 0 2006.229.03:13:15.62#ibcon#about to write, iclass 40, count 0 2006.229.03:13:15.62#ibcon#wrote, iclass 40, count 0 2006.229.03:13:15.62#ibcon#about to read 3, iclass 40, count 0 2006.229.03:13:15.64#ibcon#read 3, iclass 40, count 0 2006.229.03:13:15.64#ibcon#about to read 4, iclass 40, count 0 2006.229.03:13:15.64#ibcon#read 4, iclass 40, count 0 2006.229.03:13:15.64#ibcon#about to read 5, iclass 40, count 0 2006.229.03:13:15.64#ibcon#read 5, iclass 40, count 0 2006.229.03:13:15.64#ibcon#about to read 6, iclass 40, count 0 2006.229.03:13:15.64#ibcon#read 6, iclass 40, count 0 2006.229.03:13:15.64#ibcon#end of sib2, iclass 40, count 0 2006.229.03:13:15.64#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:13:15.64#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:13:15.64#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:13:15.64#ibcon#*before write, iclass 40, count 0 2006.229.03:13:15.64#ibcon#enter sib2, iclass 40, count 0 2006.229.03:13:15.64#ibcon#flushed, iclass 40, count 0 2006.229.03:13:15.64#ibcon#about to write, iclass 40, count 0 2006.229.03:13:15.64#ibcon#wrote, iclass 40, count 0 2006.229.03:13:15.64#ibcon#about to read 3, iclass 40, count 0 2006.229.03:13:15.68#ibcon#read 3, iclass 40, count 0 2006.229.03:13:15.68#ibcon#about to read 4, iclass 40, count 0 2006.229.03:13:15.68#ibcon#read 4, iclass 40, count 0 2006.229.03:13:15.68#ibcon#about to read 5, iclass 40, count 0 2006.229.03:13:15.68#ibcon#read 5, iclass 40, count 0 2006.229.03:13:15.68#ibcon#about to read 6, iclass 40, count 0 2006.229.03:13:15.68#ibcon#read 6, iclass 40, count 0 2006.229.03:13:15.68#ibcon#end of sib2, iclass 40, count 0 2006.229.03:13:15.68#ibcon#*after write, iclass 40, count 0 2006.229.03:13:15.68#ibcon#*before return 0, iclass 40, count 0 2006.229.03:13:15.68#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:15.68#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:13:15.68#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:13:15.68#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:13:15.68$vck44/vb=8,4 2006.229.03:13:15.68#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.03:13:15.68#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.03:13:15.68#ibcon#ireg 11 cls_cnt 2 2006.229.03:13:15.68#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:15.74#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:15.74#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:15.74#ibcon#enter wrdev, iclass 4, count 2 2006.229.03:13:15.74#ibcon#first serial, iclass 4, count 2 2006.229.03:13:15.74#ibcon#enter sib2, iclass 4, count 2 2006.229.03:13:15.74#ibcon#flushed, iclass 4, count 2 2006.229.03:13:15.74#ibcon#about to write, iclass 4, count 2 2006.229.03:13:15.74#ibcon#wrote, iclass 4, count 2 2006.229.03:13:15.74#ibcon#about to read 3, iclass 4, count 2 2006.229.03:13:15.76#ibcon#read 3, iclass 4, count 2 2006.229.03:13:15.76#ibcon#about to read 4, iclass 4, count 2 2006.229.03:13:15.76#ibcon#read 4, iclass 4, count 2 2006.229.03:13:15.76#ibcon#about to read 5, iclass 4, count 2 2006.229.03:13:15.76#ibcon#read 5, iclass 4, count 2 2006.229.03:13:15.76#ibcon#about to read 6, iclass 4, count 2 2006.229.03:13:15.76#ibcon#read 6, iclass 4, count 2 2006.229.03:13:15.76#ibcon#end of sib2, iclass 4, count 2 2006.229.03:13:15.76#ibcon#*mode == 0, iclass 4, count 2 2006.229.03:13:15.76#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.03:13:15.76#ibcon#[27=AT08-04\r\n] 2006.229.03:13:15.76#ibcon#*before write, iclass 4, count 2 2006.229.03:13:15.76#ibcon#enter sib2, iclass 4, count 2 2006.229.03:13:15.76#ibcon#flushed, iclass 4, count 2 2006.229.03:13:15.76#ibcon#about to write, iclass 4, count 2 2006.229.03:13:15.76#ibcon#wrote, iclass 4, count 2 2006.229.03:13:15.76#ibcon#about to read 3, iclass 4, count 2 2006.229.03:13:15.79#ibcon#read 3, iclass 4, count 2 2006.229.03:13:15.79#ibcon#about to read 4, iclass 4, count 2 2006.229.03:13:15.79#ibcon#read 4, iclass 4, count 2 2006.229.03:13:15.79#ibcon#about to read 5, iclass 4, count 2 2006.229.03:13:15.79#ibcon#read 5, iclass 4, count 2 2006.229.03:13:15.79#ibcon#about to read 6, iclass 4, count 2 2006.229.03:13:15.79#ibcon#read 6, iclass 4, count 2 2006.229.03:13:15.79#ibcon#end of sib2, iclass 4, count 2 2006.229.03:13:15.79#ibcon#*after write, iclass 4, count 2 2006.229.03:13:15.79#ibcon#*before return 0, iclass 4, count 2 2006.229.03:13:15.79#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:15.79#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:13:15.79#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.03:13:15.79#ibcon#ireg 7 cls_cnt 0 2006.229.03:13:15.79#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:15.91#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:15.91#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:15.91#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:13:15.91#ibcon#first serial, iclass 4, count 0 2006.229.03:13:15.91#ibcon#enter sib2, iclass 4, count 0 2006.229.03:13:15.91#ibcon#flushed, iclass 4, count 0 2006.229.03:13:15.91#ibcon#about to write, iclass 4, count 0 2006.229.03:13:15.91#ibcon#wrote, iclass 4, count 0 2006.229.03:13:15.91#ibcon#about to read 3, iclass 4, count 0 2006.229.03:13:15.93#ibcon#read 3, iclass 4, count 0 2006.229.03:13:15.93#ibcon#about to read 4, iclass 4, count 0 2006.229.03:13:15.93#ibcon#read 4, iclass 4, count 0 2006.229.03:13:15.93#ibcon#about to read 5, iclass 4, count 0 2006.229.03:13:15.93#ibcon#read 5, iclass 4, count 0 2006.229.03:13:15.93#ibcon#about to read 6, iclass 4, count 0 2006.229.03:13:15.93#ibcon#read 6, iclass 4, count 0 2006.229.03:13:15.93#ibcon#end of sib2, iclass 4, count 0 2006.229.03:13:15.93#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:13:15.93#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:13:15.93#ibcon#[27=USB\r\n] 2006.229.03:13:15.93#ibcon#*before write, iclass 4, count 0 2006.229.03:13:15.93#ibcon#enter sib2, iclass 4, count 0 2006.229.03:13:15.93#ibcon#flushed, iclass 4, count 0 2006.229.03:13:15.93#ibcon#about to write, iclass 4, count 0 2006.229.03:13:15.93#ibcon#wrote, iclass 4, count 0 2006.229.03:13:15.93#ibcon#about to read 3, iclass 4, count 0 2006.229.03:13:15.96#ibcon#read 3, iclass 4, count 0 2006.229.03:13:15.96#ibcon#about to read 4, iclass 4, count 0 2006.229.03:13:15.96#ibcon#read 4, iclass 4, count 0 2006.229.03:13:15.96#ibcon#about to read 5, iclass 4, count 0 2006.229.03:13:15.96#ibcon#read 5, iclass 4, count 0 2006.229.03:13:15.96#ibcon#about to read 6, iclass 4, count 0 2006.229.03:13:15.96#ibcon#read 6, iclass 4, count 0 2006.229.03:13:15.96#ibcon#end of sib2, iclass 4, count 0 2006.229.03:13:15.96#ibcon#*after write, iclass 4, count 0 2006.229.03:13:15.96#ibcon#*before return 0, iclass 4, count 0 2006.229.03:13:15.96#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:15.96#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:13:15.96#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:13:15.96#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:13:15.96$vck44/vabw=wide 2006.229.03:13:15.96#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.03:13:15.96#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.03:13:15.96#ibcon#ireg 8 cls_cnt 0 2006.229.03:13:15.96#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:15.96#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:15.96#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:15.96#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:13:15.96#ibcon#first serial, iclass 6, count 0 2006.229.03:13:15.96#ibcon#enter sib2, iclass 6, count 0 2006.229.03:13:15.96#ibcon#flushed, iclass 6, count 0 2006.229.03:13:15.96#ibcon#about to write, iclass 6, count 0 2006.229.03:13:15.96#ibcon#wrote, iclass 6, count 0 2006.229.03:13:15.96#ibcon#about to read 3, iclass 6, count 0 2006.229.03:13:15.98#ibcon#read 3, iclass 6, count 0 2006.229.03:13:15.98#ibcon#about to read 4, iclass 6, count 0 2006.229.03:13:15.98#ibcon#read 4, iclass 6, count 0 2006.229.03:13:15.98#ibcon#about to read 5, iclass 6, count 0 2006.229.03:13:15.98#ibcon#read 5, iclass 6, count 0 2006.229.03:13:15.98#ibcon#about to read 6, iclass 6, count 0 2006.229.03:13:15.98#ibcon#read 6, iclass 6, count 0 2006.229.03:13:15.98#ibcon#end of sib2, iclass 6, count 0 2006.229.03:13:15.98#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:13:15.98#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:13:15.98#ibcon#[25=BW32\r\n] 2006.229.03:13:15.98#ibcon#*before write, iclass 6, count 0 2006.229.03:13:15.98#ibcon#enter sib2, iclass 6, count 0 2006.229.03:13:15.98#ibcon#flushed, iclass 6, count 0 2006.229.03:13:15.98#ibcon#about to write, iclass 6, count 0 2006.229.03:13:15.98#ibcon#wrote, iclass 6, count 0 2006.229.03:13:15.98#ibcon#about to read 3, iclass 6, count 0 2006.229.03:13:16.01#ibcon#read 3, iclass 6, count 0 2006.229.03:13:16.01#ibcon#about to read 4, iclass 6, count 0 2006.229.03:13:16.01#ibcon#read 4, iclass 6, count 0 2006.229.03:13:16.01#ibcon#about to read 5, iclass 6, count 0 2006.229.03:13:16.01#ibcon#read 5, iclass 6, count 0 2006.229.03:13:16.01#ibcon#about to read 6, iclass 6, count 0 2006.229.03:13:16.01#ibcon#read 6, iclass 6, count 0 2006.229.03:13:16.01#ibcon#end of sib2, iclass 6, count 0 2006.229.03:13:16.01#ibcon#*after write, iclass 6, count 0 2006.229.03:13:16.01#ibcon#*before return 0, iclass 6, count 0 2006.229.03:13:16.01#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:16.01#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:13:16.01#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:13:16.01#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:13:16.01$vck44/vbbw=wide 2006.229.03:13:16.01#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.03:13:16.01#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.03:13:16.01#ibcon#ireg 8 cls_cnt 0 2006.229.03:13:16.01#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:13:16.08#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:13:16.08#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:13:16.08#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:13:16.08#ibcon#first serial, iclass 10, count 0 2006.229.03:13:16.08#ibcon#enter sib2, iclass 10, count 0 2006.229.03:13:16.08#ibcon#flushed, iclass 10, count 0 2006.229.03:13:16.08#ibcon#about to write, iclass 10, count 0 2006.229.03:13:16.08#ibcon#wrote, iclass 10, count 0 2006.229.03:13:16.08#ibcon#about to read 3, iclass 10, count 0 2006.229.03:13:16.10#ibcon#read 3, iclass 10, count 0 2006.229.03:13:16.10#ibcon#about to read 4, iclass 10, count 0 2006.229.03:13:16.10#ibcon#read 4, iclass 10, count 0 2006.229.03:13:16.10#ibcon#about to read 5, iclass 10, count 0 2006.229.03:13:16.10#ibcon#read 5, iclass 10, count 0 2006.229.03:13:16.10#ibcon#about to read 6, iclass 10, count 0 2006.229.03:13:16.10#ibcon#read 6, iclass 10, count 0 2006.229.03:13:16.10#ibcon#end of sib2, iclass 10, count 0 2006.229.03:13:16.10#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:13:16.10#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:13:16.10#ibcon#[27=BW32\r\n] 2006.229.03:13:16.10#ibcon#*before write, iclass 10, count 0 2006.229.03:13:16.10#ibcon#enter sib2, iclass 10, count 0 2006.229.03:13:16.10#ibcon#flushed, iclass 10, count 0 2006.229.03:13:16.10#ibcon#about to write, iclass 10, count 0 2006.229.03:13:16.10#ibcon#wrote, iclass 10, count 0 2006.229.03:13:16.10#ibcon#about to read 3, iclass 10, count 0 2006.229.03:13:16.13#ibcon#read 3, iclass 10, count 0 2006.229.03:13:16.13#ibcon#about to read 4, iclass 10, count 0 2006.229.03:13:16.13#ibcon#read 4, iclass 10, count 0 2006.229.03:13:16.13#ibcon#about to read 5, iclass 10, count 0 2006.229.03:13:16.13#ibcon#read 5, iclass 10, count 0 2006.229.03:13:16.13#ibcon#about to read 6, iclass 10, count 0 2006.229.03:13:16.13#ibcon#read 6, iclass 10, count 0 2006.229.03:13:16.13#ibcon#end of sib2, iclass 10, count 0 2006.229.03:13:16.13#ibcon#*after write, iclass 10, count 0 2006.229.03:13:16.13#ibcon#*before return 0, iclass 10, count 0 2006.229.03:13:16.13#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:13:16.13#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:13:16.13#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:13:16.13#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:13:16.13$setupk4/ifdk4 2006.229.03:13:16.13$ifdk4/lo= 2006.229.03:13:16.13$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:13:16.13$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:13:16.13$ifdk4/patch= 2006.229.03:13:16.13$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:13:16.13$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:13:16.13$setupk4/!*+20s 2006.229.03:13:25.21#abcon#<5=/04 1.7 3.1 28.601001000.7\r\n> 2006.229.03:13:25.23#abcon#{5=INTERFACE CLEAR} 2006.229.03:13:25.29#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:13:30.57$setupk4/"tpicd 2006.229.03:13:30.57$setupk4/echo=off 2006.229.03:13:30.57$setupk4/xlog=off 2006.229.03:13:30.57:!2006.229.03:16:02 2006.229.03:14:05.13#trakl#Source acquired 2006.229.03:14:07.14#flagr#flagr/antenna,acquired 2006.229.03:16:02.02:preob 2006.229.03:16:03.15/onsource/TRACKING 2006.229.03:16:03.15:!2006.229.03:16:12 2006.229.03:16:12.01:"tape 2006.229.03:16:12.02:"st=record 2006.229.03:16:12.02:data_valid=on 2006.229.03:16:12.02:midob 2006.229.03:16:13.15/onsource/TRACKING 2006.229.03:16:13.15/wx/28.65,1000.7,100 2006.229.03:16:13.29/cable/+6.4117E-03 2006.229.03:16:14.38/va/01,08,usb,yes,29,31 2006.229.03:16:14.38/va/02,07,usb,yes,32,32 2006.229.03:16:14.38/va/03,06,usb,yes,39,42 2006.229.03:16:14.38/va/04,07,usb,yes,33,34 2006.229.03:16:14.38/va/05,04,usb,yes,29,30 2006.229.03:16:14.38/va/06,04,usb,yes,33,32 2006.229.03:16:14.38/va/07,05,usb,yes,29,29 2006.229.03:16:14.38/va/08,06,usb,yes,21,26 2006.229.03:16:14.61/valo/01,524.99,yes,locked 2006.229.03:16:14.61/valo/02,534.99,yes,locked 2006.229.03:16:14.61/valo/03,564.99,yes,locked 2006.229.03:16:14.61/valo/04,624.99,yes,locked 2006.229.03:16:14.61/valo/05,734.99,yes,locked 2006.229.03:16:14.61/valo/06,814.99,yes,locked 2006.229.03:16:14.61/valo/07,864.99,yes,locked 2006.229.03:16:14.61/valo/08,884.99,yes,locked 2006.229.03:16:15.70/vb/01,04,usb,yes,31,29 2006.229.03:16:15.70/vb/02,04,usb,yes,33,33 2006.229.03:16:15.70/vb/03,04,usb,yes,30,33 2006.229.03:16:15.70/vb/04,04,usb,yes,35,33 2006.229.03:16:15.70/vb/05,04,usb,yes,27,29 2006.229.03:16:15.70/vb/06,04,usb,yes,31,28 2006.229.03:16:15.70/vb/07,04,usb,yes,31,31 2006.229.03:16:15.70/vb/08,04,usb,yes,29,32 2006.229.03:16:15.94/vblo/01,629.99,yes,locked 2006.229.03:16:15.94/vblo/02,634.99,yes,locked 2006.229.03:16:15.94/vblo/03,649.99,yes,locked 2006.229.03:16:15.94/vblo/04,679.99,yes,locked 2006.229.03:16:15.94/vblo/05,709.99,yes,locked 2006.229.03:16:15.94/vblo/06,719.99,yes,locked 2006.229.03:16:15.94/vblo/07,734.99,yes,locked 2006.229.03:16:15.94/vblo/08,744.99,yes,locked 2006.229.03:16:16.09/vabw/8 2006.229.03:16:16.24/vbbw/8 2006.229.03:16:16.33/xfe/off,on,12.0 2006.229.03:16:16.71/ifatt/23,28,28,28 2006.229.03:16:17.07/fmout-gps/S +4.46E-07 2006.229.03:16:17.12:!2006.229.03:16:52 2006.229.03:16:52.01:data_valid=off 2006.229.03:16:52.02:"et 2006.229.03:16:52.02:!+3s 2006.229.03:16:55.03:"tape 2006.229.03:16:55.03:postob 2006.229.03:16:55.17/cable/+6.4114E-03 2006.229.03:16:55.18/wx/28.67,1000.7,100 2006.229.03:16:55.23/fmout-gps/S +4.46E-07 2006.229.03:16:55.23:scan_name=229-0318,jd0608,70 2006.229.03:16:55.24:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.229.03:16:56.14#flagr#flagr/antenna,new-source 2006.229.03:16:56.15:checkk5 2006.229.03:16:56.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:16:56.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:16:57.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:16:57.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:16:58.13/chk_obsdata//k5ts1/T2290316??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.03:16:58.52/chk_obsdata//k5ts2/T2290316??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.03:16:58.92/chk_obsdata//k5ts3/T2290316??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.03:16:59.31/chk_obsdata//k5ts4/T2290316??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.03:17:00.03/k5log//k5ts1_log_newline 2006.229.03:17:00.74/k5log//k5ts2_log_newline 2006.229.03:17:01.46/k5log//k5ts3_log_newline 2006.229.03:17:02.17/k5log//k5ts4_log_newline 2006.229.03:17:02.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:17:02.20:setupk4=1 2006.229.03:17:02.20$setupk4/echo=on 2006.229.03:17:02.20$setupk4/pcalon 2006.229.03:17:02.20$pcalon/"no phase cal control is implemented here 2006.229.03:17:02.20$setupk4/"tpicd=stop 2006.229.03:17:02.20$setupk4/"rec=synch_on 2006.229.03:17:02.20$setupk4/"rec_mode=128 2006.229.03:17:02.20$setupk4/!* 2006.229.03:17:02.20$setupk4/recpk4 2006.229.03:17:02.20$recpk4/recpatch= 2006.229.03:17:02.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:17:02.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:17:02.21$setupk4/vck44 2006.229.03:17:02.21$vck44/valo=1,524.99 2006.229.03:17:02.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.03:17:02.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.03:17:02.21#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:02.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:02.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:02.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:02.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:17:02.21#ibcon#first serial, iclass 31, count 0 2006.229.03:17:02.21#ibcon#enter sib2, iclass 31, count 0 2006.229.03:17:02.21#ibcon#flushed, iclass 31, count 0 2006.229.03:17:02.21#ibcon#about to write, iclass 31, count 0 2006.229.03:17:02.21#ibcon#wrote, iclass 31, count 0 2006.229.03:17:02.21#ibcon#about to read 3, iclass 31, count 0 2006.229.03:17:02.22#ibcon#read 3, iclass 31, count 0 2006.229.03:17:02.22#ibcon#about to read 4, iclass 31, count 0 2006.229.03:17:02.22#ibcon#read 4, iclass 31, count 0 2006.229.03:17:02.22#ibcon#about to read 5, iclass 31, count 0 2006.229.03:17:02.22#ibcon#read 5, iclass 31, count 0 2006.229.03:17:02.22#ibcon#about to read 6, iclass 31, count 0 2006.229.03:17:02.22#ibcon#read 6, iclass 31, count 0 2006.229.03:17:02.22#ibcon#end of sib2, iclass 31, count 0 2006.229.03:17:02.22#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:17:02.22#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:17:02.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:17:02.22#ibcon#*before write, iclass 31, count 0 2006.229.03:17:02.22#ibcon#enter sib2, iclass 31, count 0 2006.229.03:17:02.22#ibcon#flushed, iclass 31, count 0 2006.229.03:17:02.22#ibcon#about to write, iclass 31, count 0 2006.229.03:17:02.22#ibcon#wrote, iclass 31, count 0 2006.229.03:17:02.22#ibcon#about to read 3, iclass 31, count 0 2006.229.03:17:02.27#ibcon#read 3, iclass 31, count 0 2006.229.03:17:02.27#ibcon#about to read 4, iclass 31, count 0 2006.229.03:17:02.27#ibcon#read 4, iclass 31, count 0 2006.229.03:17:02.27#ibcon#about to read 5, iclass 31, count 0 2006.229.03:17:02.27#ibcon#read 5, iclass 31, count 0 2006.229.03:17:02.27#ibcon#about to read 6, iclass 31, count 0 2006.229.03:17:02.27#ibcon#read 6, iclass 31, count 0 2006.229.03:17:02.27#ibcon#end of sib2, iclass 31, count 0 2006.229.03:17:02.27#ibcon#*after write, iclass 31, count 0 2006.229.03:17:02.27#ibcon#*before return 0, iclass 31, count 0 2006.229.03:17:02.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:02.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:02.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:17:02.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:17:02.27$vck44/va=1,8 2006.229.03:17:02.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.03:17:02.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.03:17:02.27#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:02.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:02.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:02.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:02.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.03:17:02.27#ibcon#first serial, iclass 33, count 2 2006.229.03:17:02.27#ibcon#enter sib2, iclass 33, count 2 2006.229.03:17:02.28#ibcon#flushed, iclass 33, count 2 2006.229.03:17:02.28#ibcon#about to write, iclass 33, count 2 2006.229.03:17:02.28#ibcon#wrote, iclass 33, count 2 2006.229.03:17:02.28#ibcon#about to read 3, iclass 33, count 2 2006.229.03:17:02.29#ibcon#read 3, iclass 33, count 2 2006.229.03:17:02.29#ibcon#about to read 4, iclass 33, count 2 2006.229.03:17:02.29#ibcon#read 4, iclass 33, count 2 2006.229.03:17:02.29#ibcon#about to read 5, iclass 33, count 2 2006.229.03:17:02.29#ibcon#read 5, iclass 33, count 2 2006.229.03:17:02.29#ibcon#about to read 6, iclass 33, count 2 2006.229.03:17:02.29#ibcon#read 6, iclass 33, count 2 2006.229.03:17:02.29#ibcon#end of sib2, iclass 33, count 2 2006.229.03:17:02.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.03:17:02.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.03:17:02.29#ibcon#[25=AT01-08\r\n] 2006.229.03:17:02.29#ibcon#*before write, iclass 33, count 2 2006.229.03:17:02.29#ibcon#enter sib2, iclass 33, count 2 2006.229.03:17:02.29#ibcon#flushed, iclass 33, count 2 2006.229.03:17:02.29#ibcon#about to write, iclass 33, count 2 2006.229.03:17:02.29#ibcon#wrote, iclass 33, count 2 2006.229.03:17:02.29#ibcon#about to read 3, iclass 33, count 2 2006.229.03:17:02.32#ibcon#read 3, iclass 33, count 2 2006.229.03:17:02.32#ibcon#about to read 4, iclass 33, count 2 2006.229.03:17:02.32#ibcon#read 4, iclass 33, count 2 2006.229.03:17:02.32#ibcon#about to read 5, iclass 33, count 2 2006.229.03:17:02.32#ibcon#read 5, iclass 33, count 2 2006.229.03:17:02.32#ibcon#about to read 6, iclass 33, count 2 2006.229.03:17:02.32#ibcon#read 6, iclass 33, count 2 2006.229.03:17:02.32#ibcon#end of sib2, iclass 33, count 2 2006.229.03:17:02.32#ibcon#*after write, iclass 33, count 2 2006.229.03:17:02.32#ibcon#*before return 0, iclass 33, count 2 2006.229.03:17:02.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:02.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:02.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.03:17:02.32#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:02.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:02.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:02.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:02.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:17:02.44#ibcon#first serial, iclass 33, count 0 2006.229.03:17:02.44#ibcon#enter sib2, iclass 33, count 0 2006.229.03:17:02.44#ibcon#flushed, iclass 33, count 0 2006.229.03:17:02.44#ibcon#about to write, iclass 33, count 0 2006.229.03:17:02.44#ibcon#wrote, iclass 33, count 0 2006.229.03:17:02.44#ibcon#about to read 3, iclass 33, count 0 2006.229.03:17:02.46#ibcon#read 3, iclass 33, count 0 2006.229.03:17:02.46#ibcon#about to read 4, iclass 33, count 0 2006.229.03:17:02.46#ibcon#read 4, iclass 33, count 0 2006.229.03:17:02.46#ibcon#about to read 5, iclass 33, count 0 2006.229.03:17:02.46#ibcon#read 5, iclass 33, count 0 2006.229.03:17:02.46#ibcon#about to read 6, iclass 33, count 0 2006.229.03:17:02.46#ibcon#read 6, iclass 33, count 0 2006.229.03:17:02.46#ibcon#end of sib2, iclass 33, count 0 2006.229.03:17:02.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:17:02.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:17:02.46#ibcon#[25=USB\r\n] 2006.229.03:17:02.46#ibcon#*before write, iclass 33, count 0 2006.229.03:17:02.46#ibcon#enter sib2, iclass 33, count 0 2006.229.03:17:02.46#ibcon#flushed, iclass 33, count 0 2006.229.03:17:02.46#ibcon#about to write, iclass 33, count 0 2006.229.03:17:02.46#ibcon#wrote, iclass 33, count 0 2006.229.03:17:02.46#ibcon#about to read 3, iclass 33, count 0 2006.229.03:17:02.49#ibcon#read 3, iclass 33, count 0 2006.229.03:17:02.49#ibcon#about to read 4, iclass 33, count 0 2006.229.03:17:02.49#ibcon#read 4, iclass 33, count 0 2006.229.03:17:02.49#ibcon#about to read 5, iclass 33, count 0 2006.229.03:17:02.49#ibcon#read 5, iclass 33, count 0 2006.229.03:17:02.49#ibcon#about to read 6, iclass 33, count 0 2006.229.03:17:02.49#ibcon#read 6, iclass 33, count 0 2006.229.03:17:02.49#ibcon#end of sib2, iclass 33, count 0 2006.229.03:17:02.49#ibcon#*after write, iclass 33, count 0 2006.229.03:17:02.49#ibcon#*before return 0, iclass 33, count 0 2006.229.03:17:02.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:02.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:02.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:17:02.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:17:02.49$vck44/valo=2,534.99 2006.229.03:17:02.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.03:17:02.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.03:17:02.49#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:02.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:02.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:02.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:02.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:17:02.49#ibcon#first serial, iclass 35, count 0 2006.229.03:17:02.49#ibcon#enter sib2, iclass 35, count 0 2006.229.03:17:02.49#ibcon#flushed, iclass 35, count 0 2006.229.03:17:02.49#ibcon#about to write, iclass 35, count 0 2006.229.03:17:02.49#ibcon#wrote, iclass 35, count 0 2006.229.03:17:02.49#ibcon#about to read 3, iclass 35, count 0 2006.229.03:17:02.51#ibcon#read 3, iclass 35, count 0 2006.229.03:17:02.51#ibcon#about to read 4, iclass 35, count 0 2006.229.03:17:02.51#ibcon#read 4, iclass 35, count 0 2006.229.03:17:02.51#ibcon#about to read 5, iclass 35, count 0 2006.229.03:17:02.51#ibcon#read 5, iclass 35, count 0 2006.229.03:17:02.51#ibcon#about to read 6, iclass 35, count 0 2006.229.03:17:02.51#ibcon#read 6, iclass 35, count 0 2006.229.03:17:02.51#ibcon#end of sib2, iclass 35, count 0 2006.229.03:17:02.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:17:02.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:17:02.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:17:02.51#ibcon#*before write, iclass 35, count 0 2006.229.03:17:02.51#ibcon#enter sib2, iclass 35, count 0 2006.229.03:17:02.51#ibcon#flushed, iclass 35, count 0 2006.229.03:17:02.51#ibcon#about to write, iclass 35, count 0 2006.229.03:17:02.51#ibcon#wrote, iclass 35, count 0 2006.229.03:17:02.51#ibcon#about to read 3, iclass 35, count 0 2006.229.03:17:02.55#ibcon#read 3, iclass 35, count 0 2006.229.03:17:02.55#ibcon#about to read 4, iclass 35, count 0 2006.229.03:17:02.55#ibcon#read 4, iclass 35, count 0 2006.229.03:17:02.55#ibcon#about to read 5, iclass 35, count 0 2006.229.03:17:02.55#ibcon#read 5, iclass 35, count 0 2006.229.03:17:02.55#ibcon#about to read 6, iclass 35, count 0 2006.229.03:17:02.55#ibcon#read 6, iclass 35, count 0 2006.229.03:17:02.55#ibcon#end of sib2, iclass 35, count 0 2006.229.03:17:02.55#ibcon#*after write, iclass 35, count 0 2006.229.03:17:02.55#ibcon#*before return 0, iclass 35, count 0 2006.229.03:17:02.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:02.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:02.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:17:02.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:17:02.55$vck44/va=2,7 2006.229.03:17:02.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.03:17:02.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.03:17:02.55#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:02.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:02.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:02.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:02.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.03:17:02.61#ibcon#first serial, iclass 37, count 2 2006.229.03:17:02.61#ibcon#enter sib2, iclass 37, count 2 2006.229.03:17:02.61#ibcon#flushed, iclass 37, count 2 2006.229.03:17:02.61#ibcon#about to write, iclass 37, count 2 2006.229.03:17:02.61#ibcon#wrote, iclass 37, count 2 2006.229.03:17:02.61#ibcon#about to read 3, iclass 37, count 2 2006.229.03:17:02.63#ibcon#read 3, iclass 37, count 2 2006.229.03:17:02.63#ibcon#about to read 4, iclass 37, count 2 2006.229.03:17:02.63#ibcon#read 4, iclass 37, count 2 2006.229.03:17:02.63#ibcon#about to read 5, iclass 37, count 2 2006.229.03:17:02.63#ibcon#read 5, iclass 37, count 2 2006.229.03:17:02.63#ibcon#about to read 6, iclass 37, count 2 2006.229.03:17:02.63#ibcon#read 6, iclass 37, count 2 2006.229.03:17:02.63#ibcon#end of sib2, iclass 37, count 2 2006.229.03:17:02.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.03:17:02.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.03:17:02.63#ibcon#[25=AT02-07\r\n] 2006.229.03:17:02.63#ibcon#*before write, iclass 37, count 2 2006.229.03:17:02.63#ibcon#enter sib2, iclass 37, count 2 2006.229.03:17:02.63#ibcon#flushed, iclass 37, count 2 2006.229.03:17:02.63#ibcon#about to write, iclass 37, count 2 2006.229.03:17:02.63#ibcon#wrote, iclass 37, count 2 2006.229.03:17:02.63#ibcon#about to read 3, iclass 37, count 2 2006.229.03:17:02.66#ibcon#read 3, iclass 37, count 2 2006.229.03:17:02.66#ibcon#about to read 4, iclass 37, count 2 2006.229.03:17:02.66#ibcon#read 4, iclass 37, count 2 2006.229.03:17:02.66#ibcon#about to read 5, iclass 37, count 2 2006.229.03:17:02.66#ibcon#read 5, iclass 37, count 2 2006.229.03:17:02.66#ibcon#about to read 6, iclass 37, count 2 2006.229.03:17:02.66#ibcon#read 6, iclass 37, count 2 2006.229.03:17:02.66#ibcon#end of sib2, iclass 37, count 2 2006.229.03:17:02.66#ibcon#*after write, iclass 37, count 2 2006.229.03:17:02.66#ibcon#*before return 0, iclass 37, count 2 2006.229.03:17:02.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:02.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:02.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.03:17:02.66#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:02.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:02.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:02.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:02.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:17:02.78#ibcon#first serial, iclass 37, count 0 2006.229.03:17:02.78#ibcon#enter sib2, iclass 37, count 0 2006.229.03:17:02.78#ibcon#flushed, iclass 37, count 0 2006.229.03:17:02.78#ibcon#about to write, iclass 37, count 0 2006.229.03:17:02.78#ibcon#wrote, iclass 37, count 0 2006.229.03:17:02.78#ibcon#about to read 3, iclass 37, count 0 2006.229.03:17:02.80#ibcon#read 3, iclass 37, count 0 2006.229.03:17:02.80#ibcon#about to read 4, iclass 37, count 0 2006.229.03:17:02.80#ibcon#read 4, iclass 37, count 0 2006.229.03:17:02.80#ibcon#about to read 5, iclass 37, count 0 2006.229.03:17:02.80#ibcon#read 5, iclass 37, count 0 2006.229.03:17:02.80#ibcon#about to read 6, iclass 37, count 0 2006.229.03:17:02.80#ibcon#read 6, iclass 37, count 0 2006.229.03:17:02.80#ibcon#end of sib2, iclass 37, count 0 2006.229.03:17:02.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:17:02.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:17:02.80#ibcon#[25=USB\r\n] 2006.229.03:17:02.80#ibcon#*before write, iclass 37, count 0 2006.229.03:17:02.80#ibcon#enter sib2, iclass 37, count 0 2006.229.03:17:02.80#ibcon#flushed, iclass 37, count 0 2006.229.03:17:02.80#ibcon#about to write, iclass 37, count 0 2006.229.03:17:02.80#ibcon#wrote, iclass 37, count 0 2006.229.03:17:02.80#ibcon#about to read 3, iclass 37, count 0 2006.229.03:17:02.83#ibcon#read 3, iclass 37, count 0 2006.229.03:17:02.83#ibcon#about to read 4, iclass 37, count 0 2006.229.03:17:02.83#ibcon#read 4, iclass 37, count 0 2006.229.03:17:02.83#ibcon#about to read 5, iclass 37, count 0 2006.229.03:17:02.83#ibcon#read 5, iclass 37, count 0 2006.229.03:17:02.83#ibcon#about to read 6, iclass 37, count 0 2006.229.03:17:02.83#ibcon#read 6, iclass 37, count 0 2006.229.03:17:02.83#ibcon#end of sib2, iclass 37, count 0 2006.229.03:17:02.83#ibcon#*after write, iclass 37, count 0 2006.229.03:17:02.83#ibcon#*before return 0, iclass 37, count 0 2006.229.03:17:02.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:02.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:02.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:17:02.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:17:02.83$vck44/valo=3,564.99 2006.229.03:17:02.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.03:17:02.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.03:17:02.83#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:02.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:02.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:02.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:02.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:17:02.83#ibcon#first serial, iclass 39, count 0 2006.229.03:17:02.83#ibcon#enter sib2, iclass 39, count 0 2006.229.03:17:02.83#ibcon#flushed, iclass 39, count 0 2006.229.03:17:02.83#ibcon#about to write, iclass 39, count 0 2006.229.03:17:02.84#ibcon#wrote, iclass 39, count 0 2006.229.03:17:02.84#ibcon#about to read 3, iclass 39, count 0 2006.229.03:17:02.85#ibcon#read 3, iclass 39, count 0 2006.229.03:17:02.85#ibcon#about to read 4, iclass 39, count 0 2006.229.03:17:02.85#ibcon#read 4, iclass 39, count 0 2006.229.03:17:02.85#ibcon#about to read 5, iclass 39, count 0 2006.229.03:17:02.85#ibcon#read 5, iclass 39, count 0 2006.229.03:17:02.85#ibcon#about to read 6, iclass 39, count 0 2006.229.03:17:02.85#ibcon#read 6, iclass 39, count 0 2006.229.03:17:02.85#ibcon#end of sib2, iclass 39, count 0 2006.229.03:17:02.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:17:02.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:17:02.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:17:02.85#ibcon#*before write, iclass 39, count 0 2006.229.03:17:02.85#ibcon#enter sib2, iclass 39, count 0 2006.229.03:17:02.85#ibcon#flushed, iclass 39, count 0 2006.229.03:17:02.85#ibcon#about to write, iclass 39, count 0 2006.229.03:17:02.85#ibcon#wrote, iclass 39, count 0 2006.229.03:17:02.85#ibcon#about to read 3, iclass 39, count 0 2006.229.03:17:02.89#ibcon#read 3, iclass 39, count 0 2006.229.03:17:02.89#ibcon#about to read 4, iclass 39, count 0 2006.229.03:17:02.89#ibcon#read 4, iclass 39, count 0 2006.229.03:17:02.89#ibcon#about to read 5, iclass 39, count 0 2006.229.03:17:02.89#ibcon#read 5, iclass 39, count 0 2006.229.03:17:02.89#ibcon#about to read 6, iclass 39, count 0 2006.229.03:17:02.89#ibcon#read 6, iclass 39, count 0 2006.229.03:17:02.89#ibcon#end of sib2, iclass 39, count 0 2006.229.03:17:02.89#ibcon#*after write, iclass 39, count 0 2006.229.03:17:02.89#ibcon#*before return 0, iclass 39, count 0 2006.229.03:17:02.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:02.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:02.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:17:02.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:17:02.89$vck44/va=3,6 2006.229.03:17:02.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.03:17:02.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.03:17:02.89#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:02.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:02.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:02.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:02.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.03:17:02.95#ibcon#first serial, iclass 3, count 2 2006.229.03:17:02.95#ibcon#enter sib2, iclass 3, count 2 2006.229.03:17:02.95#ibcon#flushed, iclass 3, count 2 2006.229.03:17:02.95#ibcon#about to write, iclass 3, count 2 2006.229.03:17:02.95#ibcon#wrote, iclass 3, count 2 2006.229.03:17:02.95#ibcon#about to read 3, iclass 3, count 2 2006.229.03:17:02.97#ibcon#read 3, iclass 3, count 2 2006.229.03:17:02.97#ibcon#about to read 4, iclass 3, count 2 2006.229.03:17:02.97#ibcon#read 4, iclass 3, count 2 2006.229.03:17:02.97#ibcon#about to read 5, iclass 3, count 2 2006.229.03:17:02.97#ibcon#read 5, iclass 3, count 2 2006.229.03:17:02.97#ibcon#about to read 6, iclass 3, count 2 2006.229.03:17:02.97#ibcon#read 6, iclass 3, count 2 2006.229.03:17:02.97#ibcon#end of sib2, iclass 3, count 2 2006.229.03:17:02.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.03:17:02.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.03:17:02.97#ibcon#[25=AT03-06\r\n] 2006.229.03:17:02.97#ibcon#*before write, iclass 3, count 2 2006.229.03:17:02.97#ibcon#enter sib2, iclass 3, count 2 2006.229.03:17:02.97#ibcon#flushed, iclass 3, count 2 2006.229.03:17:02.97#ibcon#about to write, iclass 3, count 2 2006.229.03:17:02.97#ibcon#wrote, iclass 3, count 2 2006.229.03:17:02.97#ibcon#about to read 3, iclass 3, count 2 2006.229.03:17:03.00#ibcon#read 3, iclass 3, count 2 2006.229.03:17:03.00#ibcon#about to read 4, iclass 3, count 2 2006.229.03:17:03.00#ibcon#read 4, iclass 3, count 2 2006.229.03:17:03.00#ibcon#about to read 5, iclass 3, count 2 2006.229.03:17:03.00#ibcon#read 5, iclass 3, count 2 2006.229.03:17:03.00#ibcon#about to read 6, iclass 3, count 2 2006.229.03:17:03.00#ibcon#read 6, iclass 3, count 2 2006.229.03:17:03.00#ibcon#end of sib2, iclass 3, count 2 2006.229.03:17:03.00#ibcon#*after write, iclass 3, count 2 2006.229.03:17:03.00#ibcon#*before return 0, iclass 3, count 2 2006.229.03:17:03.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:03.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:03.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.03:17:03.00#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:03.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:03.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:03.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:03.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:17:03.12#ibcon#first serial, iclass 3, count 0 2006.229.03:17:03.12#ibcon#enter sib2, iclass 3, count 0 2006.229.03:17:03.12#ibcon#flushed, iclass 3, count 0 2006.229.03:17:03.12#ibcon#about to write, iclass 3, count 0 2006.229.03:17:03.12#ibcon#wrote, iclass 3, count 0 2006.229.03:17:03.12#ibcon#about to read 3, iclass 3, count 0 2006.229.03:17:03.14#ibcon#read 3, iclass 3, count 0 2006.229.03:17:03.14#ibcon#about to read 4, iclass 3, count 0 2006.229.03:17:03.14#ibcon#read 4, iclass 3, count 0 2006.229.03:17:03.14#ibcon#about to read 5, iclass 3, count 0 2006.229.03:17:03.14#ibcon#read 5, iclass 3, count 0 2006.229.03:17:03.14#ibcon#about to read 6, iclass 3, count 0 2006.229.03:17:03.14#ibcon#read 6, iclass 3, count 0 2006.229.03:17:03.14#ibcon#end of sib2, iclass 3, count 0 2006.229.03:17:03.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:17:03.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:17:03.14#ibcon#[25=USB\r\n] 2006.229.03:17:03.14#ibcon#*before write, iclass 3, count 0 2006.229.03:17:03.14#ibcon#enter sib2, iclass 3, count 0 2006.229.03:17:03.14#ibcon#flushed, iclass 3, count 0 2006.229.03:17:03.14#ibcon#about to write, iclass 3, count 0 2006.229.03:17:03.14#ibcon#wrote, iclass 3, count 0 2006.229.03:17:03.14#ibcon#about to read 3, iclass 3, count 0 2006.229.03:17:03.17#ibcon#read 3, iclass 3, count 0 2006.229.03:17:03.17#ibcon#about to read 4, iclass 3, count 0 2006.229.03:17:03.17#ibcon#read 4, iclass 3, count 0 2006.229.03:17:03.17#ibcon#about to read 5, iclass 3, count 0 2006.229.03:17:03.17#ibcon#read 5, iclass 3, count 0 2006.229.03:17:03.17#ibcon#about to read 6, iclass 3, count 0 2006.229.03:17:03.17#ibcon#read 6, iclass 3, count 0 2006.229.03:17:03.17#ibcon#end of sib2, iclass 3, count 0 2006.229.03:17:03.17#ibcon#*after write, iclass 3, count 0 2006.229.03:17:03.17#ibcon#*before return 0, iclass 3, count 0 2006.229.03:17:03.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:03.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:03.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:17:03.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:17:03.17$vck44/valo=4,624.99 2006.229.03:17:03.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.03:17:03.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.03:17:03.17#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:03.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:03.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:03.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:03.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:17:03.17#ibcon#first serial, iclass 5, count 0 2006.229.03:17:03.17#ibcon#enter sib2, iclass 5, count 0 2006.229.03:17:03.17#ibcon#flushed, iclass 5, count 0 2006.229.03:17:03.17#ibcon#about to write, iclass 5, count 0 2006.229.03:17:03.17#ibcon#wrote, iclass 5, count 0 2006.229.03:17:03.17#ibcon#about to read 3, iclass 5, count 0 2006.229.03:17:03.19#ibcon#read 3, iclass 5, count 0 2006.229.03:17:03.19#ibcon#about to read 4, iclass 5, count 0 2006.229.03:17:03.19#ibcon#read 4, iclass 5, count 0 2006.229.03:17:03.19#ibcon#about to read 5, iclass 5, count 0 2006.229.03:17:03.19#ibcon#read 5, iclass 5, count 0 2006.229.03:17:03.19#ibcon#about to read 6, iclass 5, count 0 2006.229.03:17:03.19#ibcon#read 6, iclass 5, count 0 2006.229.03:17:03.19#ibcon#end of sib2, iclass 5, count 0 2006.229.03:17:03.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:17:03.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:17:03.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:17:03.19#ibcon#*before write, iclass 5, count 0 2006.229.03:17:03.19#ibcon#enter sib2, iclass 5, count 0 2006.229.03:17:03.19#ibcon#flushed, iclass 5, count 0 2006.229.03:17:03.19#ibcon#about to write, iclass 5, count 0 2006.229.03:17:03.19#ibcon#wrote, iclass 5, count 0 2006.229.03:17:03.19#ibcon#about to read 3, iclass 5, count 0 2006.229.03:17:03.23#ibcon#read 3, iclass 5, count 0 2006.229.03:17:03.23#ibcon#about to read 4, iclass 5, count 0 2006.229.03:17:03.23#ibcon#read 4, iclass 5, count 0 2006.229.03:17:03.23#ibcon#about to read 5, iclass 5, count 0 2006.229.03:17:03.23#ibcon#read 5, iclass 5, count 0 2006.229.03:17:03.23#ibcon#about to read 6, iclass 5, count 0 2006.229.03:17:03.23#ibcon#read 6, iclass 5, count 0 2006.229.03:17:03.23#ibcon#end of sib2, iclass 5, count 0 2006.229.03:17:03.23#ibcon#*after write, iclass 5, count 0 2006.229.03:17:03.23#ibcon#*before return 0, iclass 5, count 0 2006.229.03:17:03.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:03.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:03.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:17:03.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:17:03.23$vck44/va=4,7 2006.229.03:17:03.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.03:17:03.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.03:17:03.23#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:03.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:03.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:03.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:03.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.03:17:03.29#ibcon#first serial, iclass 7, count 2 2006.229.03:17:03.29#ibcon#enter sib2, iclass 7, count 2 2006.229.03:17:03.29#ibcon#flushed, iclass 7, count 2 2006.229.03:17:03.29#ibcon#about to write, iclass 7, count 2 2006.229.03:17:03.29#ibcon#wrote, iclass 7, count 2 2006.229.03:17:03.29#ibcon#about to read 3, iclass 7, count 2 2006.229.03:17:03.31#ibcon#read 3, iclass 7, count 2 2006.229.03:17:03.31#ibcon#about to read 4, iclass 7, count 2 2006.229.03:17:03.31#ibcon#read 4, iclass 7, count 2 2006.229.03:17:03.31#ibcon#about to read 5, iclass 7, count 2 2006.229.03:17:03.31#ibcon#read 5, iclass 7, count 2 2006.229.03:17:03.31#ibcon#about to read 6, iclass 7, count 2 2006.229.03:17:03.31#ibcon#read 6, iclass 7, count 2 2006.229.03:17:03.31#ibcon#end of sib2, iclass 7, count 2 2006.229.03:17:03.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.03:17:03.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.03:17:03.31#ibcon#[25=AT04-07\r\n] 2006.229.03:17:03.31#ibcon#*before write, iclass 7, count 2 2006.229.03:17:03.31#ibcon#enter sib2, iclass 7, count 2 2006.229.03:17:03.31#ibcon#flushed, iclass 7, count 2 2006.229.03:17:03.31#ibcon#about to write, iclass 7, count 2 2006.229.03:17:03.31#ibcon#wrote, iclass 7, count 2 2006.229.03:17:03.31#ibcon#about to read 3, iclass 7, count 2 2006.229.03:17:03.34#ibcon#read 3, iclass 7, count 2 2006.229.03:17:03.34#ibcon#about to read 4, iclass 7, count 2 2006.229.03:17:03.34#ibcon#read 4, iclass 7, count 2 2006.229.03:17:03.34#ibcon#about to read 5, iclass 7, count 2 2006.229.03:17:03.34#ibcon#read 5, iclass 7, count 2 2006.229.03:17:03.34#ibcon#about to read 6, iclass 7, count 2 2006.229.03:17:03.34#ibcon#read 6, iclass 7, count 2 2006.229.03:17:03.34#ibcon#end of sib2, iclass 7, count 2 2006.229.03:17:03.34#ibcon#*after write, iclass 7, count 2 2006.229.03:17:03.34#ibcon#*before return 0, iclass 7, count 2 2006.229.03:17:03.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:03.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:03.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.03:17:03.34#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:03.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:03.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:03.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:03.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:17:03.46#ibcon#first serial, iclass 7, count 0 2006.229.03:17:03.46#ibcon#enter sib2, iclass 7, count 0 2006.229.03:17:03.46#ibcon#flushed, iclass 7, count 0 2006.229.03:17:03.46#ibcon#about to write, iclass 7, count 0 2006.229.03:17:03.46#ibcon#wrote, iclass 7, count 0 2006.229.03:17:03.46#ibcon#about to read 3, iclass 7, count 0 2006.229.03:17:03.48#ibcon#read 3, iclass 7, count 0 2006.229.03:17:03.48#ibcon#about to read 4, iclass 7, count 0 2006.229.03:17:03.48#ibcon#read 4, iclass 7, count 0 2006.229.03:17:03.48#ibcon#about to read 5, iclass 7, count 0 2006.229.03:17:03.48#ibcon#read 5, iclass 7, count 0 2006.229.03:17:03.48#ibcon#about to read 6, iclass 7, count 0 2006.229.03:17:03.48#ibcon#read 6, iclass 7, count 0 2006.229.03:17:03.48#ibcon#end of sib2, iclass 7, count 0 2006.229.03:17:03.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:17:03.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:17:03.48#ibcon#[25=USB\r\n] 2006.229.03:17:03.48#ibcon#*before write, iclass 7, count 0 2006.229.03:17:03.48#ibcon#enter sib2, iclass 7, count 0 2006.229.03:17:03.48#ibcon#flushed, iclass 7, count 0 2006.229.03:17:03.48#ibcon#about to write, iclass 7, count 0 2006.229.03:17:03.48#ibcon#wrote, iclass 7, count 0 2006.229.03:17:03.48#ibcon#about to read 3, iclass 7, count 0 2006.229.03:17:03.51#ibcon#read 3, iclass 7, count 0 2006.229.03:17:03.51#ibcon#about to read 4, iclass 7, count 0 2006.229.03:17:03.51#ibcon#read 4, iclass 7, count 0 2006.229.03:17:03.51#ibcon#about to read 5, iclass 7, count 0 2006.229.03:17:03.51#ibcon#read 5, iclass 7, count 0 2006.229.03:17:03.51#ibcon#about to read 6, iclass 7, count 0 2006.229.03:17:03.51#ibcon#read 6, iclass 7, count 0 2006.229.03:17:03.51#ibcon#end of sib2, iclass 7, count 0 2006.229.03:17:03.51#ibcon#*after write, iclass 7, count 0 2006.229.03:17:03.51#ibcon#*before return 0, iclass 7, count 0 2006.229.03:17:03.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:03.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:03.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:17:03.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:17:03.51$vck44/valo=5,734.99 2006.229.03:17:03.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.03:17:03.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.03:17:03.51#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:03.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:03.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:03.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:03.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:17:03.51#ibcon#first serial, iclass 11, count 0 2006.229.03:17:03.51#ibcon#enter sib2, iclass 11, count 0 2006.229.03:17:03.51#ibcon#flushed, iclass 11, count 0 2006.229.03:17:03.51#ibcon#about to write, iclass 11, count 0 2006.229.03:17:03.51#ibcon#wrote, iclass 11, count 0 2006.229.03:17:03.51#ibcon#about to read 3, iclass 11, count 0 2006.229.03:17:03.53#ibcon#read 3, iclass 11, count 0 2006.229.03:17:03.53#ibcon#about to read 4, iclass 11, count 0 2006.229.03:17:03.53#ibcon#read 4, iclass 11, count 0 2006.229.03:17:03.53#ibcon#about to read 5, iclass 11, count 0 2006.229.03:17:03.53#ibcon#read 5, iclass 11, count 0 2006.229.03:17:03.53#ibcon#about to read 6, iclass 11, count 0 2006.229.03:17:03.53#ibcon#read 6, iclass 11, count 0 2006.229.03:17:03.53#ibcon#end of sib2, iclass 11, count 0 2006.229.03:17:03.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:17:03.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:17:03.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:17:03.53#ibcon#*before write, iclass 11, count 0 2006.229.03:17:03.53#ibcon#enter sib2, iclass 11, count 0 2006.229.03:17:03.53#ibcon#flushed, iclass 11, count 0 2006.229.03:17:03.53#ibcon#about to write, iclass 11, count 0 2006.229.03:17:03.53#ibcon#wrote, iclass 11, count 0 2006.229.03:17:03.53#ibcon#about to read 3, iclass 11, count 0 2006.229.03:17:03.57#ibcon#read 3, iclass 11, count 0 2006.229.03:17:03.57#ibcon#about to read 4, iclass 11, count 0 2006.229.03:17:03.57#ibcon#read 4, iclass 11, count 0 2006.229.03:17:03.57#ibcon#about to read 5, iclass 11, count 0 2006.229.03:17:03.57#ibcon#read 5, iclass 11, count 0 2006.229.03:17:03.57#ibcon#about to read 6, iclass 11, count 0 2006.229.03:17:03.57#ibcon#read 6, iclass 11, count 0 2006.229.03:17:03.57#ibcon#end of sib2, iclass 11, count 0 2006.229.03:17:03.57#ibcon#*after write, iclass 11, count 0 2006.229.03:17:03.57#ibcon#*before return 0, iclass 11, count 0 2006.229.03:17:03.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:03.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:03.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:17:03.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:17:03.57$vck44/va=5,4 2006.229.03:17:03.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.03:17:03.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.03:17:03.57#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:03.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:03.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:03.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:03.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.03:17:03.63#ibcon#first serial, iclass 13, count 2 2006.229.03:17:03.63#ibcon#enter sib2, iclass 13, count 2 2006.229.03:17:03.63#ibcon#flushed, iclass 13, count 2 2006.229.03:17:03.63#ibcon#about to write, iclass 13, count 2 2006.229.03:17:03.63#ibcon#wrote, iclass 13, count 2 2006.229.03:17:03.63#ibcon#about to read 3, iclass 13, count 2 2006.229.03:17:03.65#ibcon#read 3, iclass 13, count 2 2006.229.03:17:03.65#ibcon#about to read 4, iclass 13, count 2 2006.229.03:17:03.65#ibcon#read 4, iclass 13, count 2 2006.229.03:17:03.65#ibcon#about to read 5, iclass 13, count 2 2006.229.03:17:03.65#ibcon#read 5, iclass 13, count 2 2006.229.03:17:03.65#ibcon#about to read 6, iclass 13, count 2 2006.229.03:17:03.65#ibcon#read 6, iclass 13, count 2 2006.229.03:17:03.65#ibcon#end of sib2, iclass 13, count 2 2006.229.03:17:03.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.03:17:03.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.03:17:03.65#ibcon#[25=AT05-04\r\n] 2006.229.03:17:03.65#ibcon#*before write, iclass 13, count 2 2006.229.03:17:03.65#ibcon#enter sib2, iclass 13, count 2 2006.229.03:17:03.65#ibcon#flushed, iclass 13, count 2 2006.229.03:17:03.65#ibcon#about to write, iclass 13, count 2 2006.229.03:17:03.65#ibcon#wrote, iclass 13, count 2 2006.229.03:17:03.65#ibcon#about to read 3, iclass 13, count 2 2006.229.03:17:03.68#ibcon#read 3, iclass 13, count 2 2006.229.03:17:03.68#ibcon#about to read 4, iclass 13, count 2 2006.229.03:17:03.68#ibcon#read 4, iclass 13, count 2 2006.229.03:17:03.68#ibcon#about to read 5, iclass 13, count 2 2006.229.03:17:03.68#ibcon#read 5, iclass 13, count 2 2006.229.03:17:03.68#ibcon#about to read 6, iclass 13, count 2 2006.229.03:17:03.68#ibcon#read 6, iclass 13, count 2 2006.229.03:17:03.68#ibcon#end of sib2, iclass 13, count 2 2006.229.03:17:03.68#ibcon#*after write, iclass 13, count 2 2006.229.03:17:03.68#ibcon#*before return 0, iclass 13, count 2 2006.229.03:17:03.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:03.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:03.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.03:17:03.68#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:03.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:03.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:03.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:03.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:17:03.80#ibcon#first serial, iclass 13, count 0 2006.229.03:17:03.80#ibcon#enter sib2, iclass 13, count 0 2006.229.03:17:03.80#ibcon#flushed, iclass 13, count 0 2006.229.03:17:03.80#ibcon#about to write, iclass 13, count 0 2006.229.03:17:03.80#ibcon#wrote, iclass 13, count 0 2006.229.03:17:03.80#ibcon#about to read 3, iclass 13, count 0 2006.229.03:17:03.82#ibcon#read 3, iclass 13, count 0 2006.229.03:17:03.82#ibcon#about to read 4, iclass 13, count 0 2006.229.03:17:03.82#ibcon#read 4, iclass 13, count 0 2006.229.03:17:03.82#ibcon#about to read 5, iclass 13, count 0 2006.229.03:17:03.82#ibcon#read 5, iclass 13, count 0 2006.229.03:17:03.82#ibcon#about to read 6, iclass 13, count 0 2006.229.03:17:03.82#ibcon#read 6, iclass 13, count 0 2006.229.03:17:03.82#ibcon#end of sib2, iclass 13, count 0 2006.229.03:17:03.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:17:03.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:17:03.82#ibcon#[25=USB\r\n] 2006.229.03:17:03.82#ibcon#*before write, iclass 13, count 0 2006.229.03:17:03.82#ibcon#enter sib2, iclass 13, count 0 2006.229.03:17:03.82#ibcon#flushed, iclass 13, count 0 2006.229.03:17:03.82#ibcon#about to write, iclass 13, count 0 2006.229.03:17:03.82#ibcon#wrote, iclass 13, count 0 2006.229.03:17:03.82#ibcon#about to read 3, iclass 13, count 0 2006.229.03:17:03.85#ibcon#read 3, iclass 13, count 0 2006.229.03:17:03.85#ibcon#about to read 4, iclass 13, count 0 2006.229.03:17:03.85#ibcon#read 4, iclass 13, count 0 2006.229.03:17:03.85#ibcon#about to read 5, iclass 13, count 0 2006.229.03:17:03.85#ibcon#read 5, iclass 13, count 0 2006.229.03:17:03.85#ibcon#about to read 6, iclass 13, count 0 2006.229.03:17:03.85#ibcon#read 6, iclass 13, count 0 2006.229.03:17:03.85#ibcon#end of sib2, iclass 13, count 0 2006.229.03:17:03.85#ibcon#*after write, iclass 13, count 0 2006.229.03:17:03.85#ibcon#*before return 0, iclass 13, count 0 2006.229.03:17:03.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:03.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:03.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:17:03.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:17:03.85$vck44/valo=6,814.99 2006.229.03:17:03.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.03:17:03.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.03:17:03.85#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:03.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:03.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:03.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:03.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:17:03.85#ibcon#first serial, iclass 15, count 0 2006.229.03:17:03.85#ibcon#enter sib2, iclass 15, count 0 2006.229.03:17:03.85#ibcon#flushed, iclass 15, count 0 2006.229.03:17:03.85#ibcon#about to write, iclass 15, count 0 2006.229.03:17:03.85#ibcon#wrote, iclass 15, count 0 2006.229.03:17:03.86#ibcon#about to read 3, iclass 15, count 0 2006.229.03:17:03.87#ibcon#read 3, iclass 15, count 0 2006.229.03:17:03.87#ibcon#about to read 4, iclass 15, count 0 2006.229.03:17:03.87#ibcon#read 4, iclass 15, count 0 2006.229.03:17:03.87#ibcon#about to read 5, iclass 15, count 0 2006.229.03:17:03.87#ibcon#read 5, iclass 15, count 0 2006.229.03:17:03.87#ibcon#about to read 6, iclass 15, count 0 2006.229.03:17:03.87#ibcon#read 6, iclass 15, count 0 2006.229.03:17:03.87#ibcon#end of sib2, iclass 15, count 0 2006.229.03:17:03.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:17:03.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:17:03.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:17:03.87#ibcon#*before write, iclass 15, count 0 2006.229.03:17:03.87#ibcon#enter sib2, iclass 15, count 0 2006.229.03:17:03.87#ibcon#flushed, iclass 15, count 0 2006.229.03:17:03.87#ibcon#about to write, iclass 15, count 0 2006.229.03:17:03.87#ibcon#wrote, iclass 15, count 0 2006.229.03:17:03.87#ibcon#about to read 3, iclass 15, count 0 2006.229.03:17:03.91#ibcon#read 3, iclass 15, count 0 2006.229.03:17:03.91#ibcon#about to read 4, iclass 15, count 0 2006.229.03:17:03.91#ibcon#read 4, iclass 15, count 0 2006.229.03:17:03.91#ibcon#about to read 5, iclass 15, count 0 2006.229.03:17:03.91#ibcon#read 5, iclass 15, count 0 2006.229.03:17:03.91#ibcon#about to read 6, iclass 15, count 0 2006.229.03:17:03.91#ibcon#read 6, iclass 15, count 0 2006.229.03:17:03.91#ibcon#end of sib2, iclass 15, count 0 2006.229.03:17:03.91#ibcon#*after write, iclass 15, count 0 2006.229.03:17:03.91#ibcon#*before return 0, iclass 15, count 0 2006.229.03:17:03.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:03.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:03.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:17:03.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:17:03.91$vck44/va=6,4 2006.229.03:17:03.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.03:17:03.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.03:17:03.91#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:03.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:03.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:03.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:03.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.03:17:03.97#ibcon#first serial, iclass 17, count 2 2006.229.03:17:03.97#ibcon#enter sib2, iclass 17, count 2 2006.229.03:17:03.97#ibcon#flushed, iclass 17, count 2 2006.229.03:17:03.97#ibcon#about to write, iclass 17, count 2 2006.229.03:17:03.97#ibcon#wrote, iclass 17, count 2 2006.229.03:17:03.97#ibcon#about to read 3, iclass 17, count 2 2006.229.03:17:03.99#ibcon#read 3, iclass 17, count 2 2006.229.03:17:03.99#ibcon#about to read 4, iclass 17, count 2 2006.229.03:17:03.99#ibcon#read 4, iclass 17, count 2 2006.229.03:17:03.99#ibcon#about to read 5, iclass 17, count 2 2006.229.03:17:03.99#ibcon#read 5, iclass 17, count 2 2006.229.03:17:03.99#ibcon#about to read 6, iclass 17, count 2 2006.229.03:17:03.99#ibcon#read 6, iclass 17, count 2 2006.229.03:17:03.99#ibcon#end of sib2, iclass 17, count 2 2006.229.03:17:03.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.03:17:03.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.03:17:03.99#ibcon#[25=AT06-04\r\n] 2006.229.03:17:03.99#ibcon#*before write, iclass 17, count 2 2006.229.03:17:03.99#ibcon#enter sib2, iclass 17, count 2 2006.229.03:17:03.99#ibcon#flushed, iclass 17, count 2 2006.229.03:17:03.99#ibcon#about to write, iclass 17, count 2 2006.229.03:17:03.99#ibcon#wrote, iclass 17, count 2 2006.229.03:17:03.99#ibcon#about to read 3, iclass 17, count 2 2006.229.03:17:04.02#ibcon#read 3, iclass 17, count 2 2006.229.03:17:04.02#ibcon#about to read 4, iclass 17, count 2 2006.229.03:17:04.02#ibcon#read 4, iclass 17, count 2 2006.229.03:17:04.02#ibcon#about to read 5, iclass 17, count 2 2006.229.03:17:04.02#ibcon#read 5, iclass 17, count 2 2006.229.03:17:04.02#ibcon#about to read 6, iclass 17, count 2 2006.229.03:17:04.02#ibcon#read 6, iclass 17, count 2 2006.229.03:17:04.02#ibcon#end of sib2, iclass 17, count 2 2006.229.03:17:04.02#ibcon#*after write, iclass 17, count 2 2006.229.03:17:04.02#ibcon#*before return 0, iclass 17, count 2 2006.229.03:17:04.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:04.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:04.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.03:17:04.02#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:04.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:04.15#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:04.15#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:04.15#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:17:04.15#ibcon#first serial, iclass 17, count 0 2006.229.03:17:04.15#ibcon#enter sib2, iclass 17, count 0 2006.229.03:17:04.15#ibcon#flushed, iclass 17, count 0 2006.229.03:17:04.15#ibcon#about to write, iclass 17, count 0 2006.229.03:17:04.15#ibcon#wrote, iclass 17, count 0 2006.229.03:17:04.15#ibcon#about to read 3, iclass 17, count 0 2006.229.03:17:04.16#ibcon#read 3, iclass 17, count 0 2006.229.03:17:04.16#ibcon#about to read 4, iclass 17, count 0 2006.229.03:17:04.16#ibcon#read 4, iclass 17, count 0 2006.229.03:17:04.16#ibcon#about to read 5, iclass 17, count 0 2006.229.03:17:04.16#ibcon#read 5, iclass 17, count 0 2006.229.03:17:04.16#ibcon#about to read 6, iclass 17, count 0 2006.229.03:17:04.16#ibcon#read 6, iclass 17, count 0 2006.229.03:17:04.16#ibcon#end of sib2, iclass 17, count 0 2006.229.03:17:04.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:17:04.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:17:04.16#ibcon#[25=USB\r\n] 2006.229.03:17:04.16#ibcon#*before write, iclass 17, count 0 2006.229.03:17:04.16#ibcon#enter sib2, iclass 17, count 0 2006.229.03:17:04.16#ibcon#flushed, iclass 17, count 0 2006.229.03:17:04.16#ibcon#about to write, iclass 17, count 0 2006.229.03:17:04.16#ibcon#wrote, iclass 17, count 0 2006.229.03:17:04.16#ibcon#about to read 3, iclass 17, count 0 2006.229.03:17:04.19#ibcon#read 3, iclass 17, count 0 2006.229.03:17:04.19#ibcon#about to read 4, iclass 17, count 0 2006.229.03:17:04.19#ibcon#read 4, iclass 17, count 0 2006.229.03:17:04.19#ibcon#about to read 5, iclass 17, count 0 2006.229.03:17:04.19#ibcon#read 5, iclass 17, count 0 2006.229.03:17:04.19#ibcon#about to read 6, iclass 17, count 0 2006.229.03:17:04.19#ibcon#read 6, iclass 17, count 0 2006.229.03:17:04.19#ibcon#end of sib2, iclass 17, count 0 2006.229.03:17:04.19#ibcon#*after write, iclass 17, count 0 2006.229.03:17:04.19#ibcon#*before return 0, iclass 17, count 0 2006.229.03:17:04.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:04.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:04.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:17:04.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:17:04.19$vck44/valo=7,864.99 2006.229.03:17:04.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.03:17:04.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.03:17:04.19#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:04.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:04.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:04.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:04.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:17:04.19#ibcon#first serial, iclass 19, count 0 2006.229.03:17:04.19#ibcon#enter sib2, iclass 19, count 0 2006.229.03:17:04.19#ibcon#flushed, iclass 19, count 0 2006.229.03:17:04.19#ibcon#about to write, iclass 19, count 0 2006.229.03:17:04.19#ibcon#wrote, iclass 19, count 0 2006.229.03:17:04.20#ibcon#about to read 3, iclass 19, count 0 2006.229.03:17:04.21#ibcon#read 3, iclass 19, count 0 2006.229.03:17:04.21#ibcon#about to read 4, iclass 19, count 0 2006.229.03:17:04.21#ibcon#read 4, iclass 19, count 0 2006.229.03:17:04.21#ibcon#about to read 5, iclass 19, count 0 2006.229.03:17:04.21#ibcon#read 5, iclass 19, count 0 2006.229.03:17:04.21#ibcon#about to read 6, iclass 19, count 0 2006.229.03:17:04.21#ibcon#read 6, iclass 19, count 0 2006.229.03:17:04.21#ibcon#end of sib2, iclass 19, count 0 2006.229.03:17:04.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:17:04.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:17:04.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:17:04.21#ibcon#*before write, iclass 19, count 0 2006.229.03:17:04.21#ibcon#enter sib2, iclass 19, count 0 2006.229.03:17:04.21#ibcon#flushed, iclass 19, count 0 2006.229.03:17:04.21#ibcon#about to write, iclass 19, count 0 2006.229.03:17:04.21#ibcon#wrote, iclass 19, count 0 2006.229.03:17:04.21#ibcon#about to read 3, iclass 19, count 0 2006.229.03:17:04.25#ibcon#read 3, iclass 19, count 0 2006.229.03:17:04.25#ibcon#about to read 4, iclass 19, count 0 2006.229.03:17:04.25#ibcon#read 4, iclass 19, count 0 2006.229.03:17:04.25#ibcon#about to read 5, iclass 19, count 0 2006.229.03:17:04.25#ibcon#read 5, iclass 19, count 0 2006.229.03:17:04.25#ibcon#about to read 6, iclass 19, count 0 2006.229.03:17:04.25#ibcon#read 6, iclass 19, count 0 2006.229.03:17:04.25#ibcon#end of sib2, iclass 19, count 0 2006.229.03:17:04.25#ibcon#*after write, iclass 19, count 0 2006.229.03:17:04.25#ibcon#*before return 0, iclass 19, count 0 2006.229.03:17:04.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:04.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:04.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:17:04.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:17:04.25$vck44/va=7,5 2006.229.03:17:04.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.03:17:04.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.03:17:04.25#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:04.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:04.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:04.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:04.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.03:17:04.31#ibcon#first serial, iclass 21, count 2 2006.229.03:17:04.31#ibcon#enter sib2, iclass 21, count 2 2006.229.03:17:04.31#ibcon#flushed, iclass 21, count 2 2006.229.03:17:04.31#ibcon#about to write, iclass 21, count 2 2006.229.03:17:04.31#ibcon#wrote, iclass 21, count 2 2006.229.03:17:04.31#ibcon#about to read 3, iclass 21, count 2 2006.229.03:17:04.33#ibcon#read 3, iclass 21, count 2 2006.229.03:17:04.33#ibcon#about to read 4, iclass 21, count 2 2006.229.03:17:04.33#ibcon#read 4, iclass 21, count 2 2006.229.03:17:04.33#ibcon#about to read 5, iclass 21, count 2 2006.229.03:17:04.33#ibcon#read 5, iclass 21, count 2 2006.229.03:17:04.33#ibcon#about to read 6, iclass 21, count 2 2006.229.03:17:04.33#ibcon#read 6, iclass 21, count 2 2006.229.03:17:04.33#ibcon#end of sib2, iclass 21, count 2 2006.229.03:17:04.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.03:17:04.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.03:17:04.33#ibcon#[25=AT07-05\r\n] 2006.229.03:17:04.33#ibcon#*before write, iclass 21, count 2 2006.229.03:17:04.33#ibcon#enter sib2, iclass 21, count 2 2006.229.03:17:04.33#ibcon#flushed, iclass 21, count 2 2006.229.03:17:04.33#ibcon#about to write, iclass 21, count 2 2006.229.03:17:04.33#ibcon#wrote, iclass 21, count 2 2006.229.03:17:04.33#ibcon#about to read 3, iclass 21, count 2 2006.229.03:17:04.36#ibcon#read 3, iclass 21, count 2 2006.229.03:17:04.36#ibcon#about to read 4, iclass 21, count 2 2006.229.03:17:04.36#ibcon#read 4, iclass 21, count 2 2006.229.03:17:04.36#ibcon#about to read 5, iclass 21, count 2 2006.229.03:17:04.36#ibcon#read 5, iclass 21, count 2 2006.229.03:17:04.36#ibcon#about to read 6, iclass 21, count 2 2006.229.03:17:04.36#ibcon#read 6, iclass 21, count 2 2006.229.03:17:04.36#ibcon#end of sib2, iclass 21, count 2 2006.229.03:17:04.36#ibcon#*after write, iclass 21, count 2 2006.229.03:17:04.36#ibcon#*before return 0, iclass 21, count 2 2006.229.03:17:04.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:04.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:04.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.03:17:04.36#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:04.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:04.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:04.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:04.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:17:04.48#ibcon#first serial, iclass 21, count 0 2006.229.03:17:04.48#ibcon#enter sib2, iclass 21, count 0 2006.229.03:17:04.48#ibcon#flushed, iclass 21, count 0 2006.229.03:17:04.48#ibcon#about to write, iclass 21, count 0 2006.229.03:17:04.48#ibcon#wrote, iclass 21, count 0 2006.229.03:17:04.48#ibcon#about to read 3, iclass 21, count 0 2006.229.03:17:04.50#ibcon#read 3, iclass 21, count 0 2006.229.03:17:04.50#ibcon#about to read 4, iclass 21, count 0 2006.229.03:17:04.50#ibcon#read 4, iclass 21, count 0 2006.229.03:17:04.50#ibcon#about to read 5, iclass 21, count 0 2006.229.03:17:04.50#ibcon#read 5, iclass 21, count 0 2006.229.03:17:04.50#ibcon#about to read 6, iclass 21, count 0 2006.229.03:17:04.50#ibcon#read 6, iclass 21, count 0 2006.229.03:17:04.50#ibcon#end of sib2, iclass 21, count 0 2006.229.03:17:04.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:17:04.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:17:04.50#ibcon#[25=USB\r\n] 2006.229.03:17:04.50#ibcon#*before write, iclass 21, count 0 2006.229.03:17:04.50#ibcon#enter sib2, iclass 21, count 0 2006.229.03:17:04.50#ibcon#flushed, iclass 21, count 0 2006.229.03:17:04.50#ibcon#about to write, iclass 21, count 0 2006.229.03:17:04.50#ibcon#wrote, iclass 21, count 0 2006.229.03:17:04.50#ibcon#about to read 3, iclass 21, count 0 2006.229.03:17:04.53#ibcon#read 3, iclass 21, count 0 2006.229.03:17:04.53#ibcon#about to read 4, iclass 21, count 0 2006.229.03:17:04.53#ibcon#read 4, iclass 21, count 0 2006.229.03:17:04.53#ibcon#about to read 5, iclass 21, count 0 2006.229.03:17:04.53#ibcon#read 5, iclass 21, count 0 2006.229.03:17:04.53#ibcon#about to read 6, iclass 21, count 0 2006.229.03:17:04.53#ibcon#read 6, iclass 21, count 0 2006.229.03:17:04.53#ibcon#end of sib2, iclass 21, count 0 2006.229.03:17:04.53#ibcon#*after write, iclass 21, count 0 2006.229.03:17:04.53#ibcon#*before return 0, iclass 21, count 0 2006.229.03:17:04.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:04.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:04.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:17:04.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:17:04.53$vck44/valo=8,884.99 2006.229.03:17:04.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.03:17:04.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.03:17:04.53#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:04.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:04.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:04.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:04.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:17:04.53#ibcon#first serial, iclass 23, count 0 2006.229.03:17:04.53#ibcon#enter sib2, iclass 23, count 0 2006.229.03:17:04.53#ibcon#flushed, iclass 23, count 0 2006.229.03:17:04.53#ibcon#about to write, iclass 23, count 0 2006.229.03:17:04.53#ibcon#wrote, iclass 23, count 0 2006.229.03:17:04.53#ibcon#about to read 3, iclass 23, count 0 2006.229.03:17:04.55#ibcon#read 3, iclass 23, count 0 2006.229.03:17:04.55#ibcon#about to read 4, iclass 23, count 0 2006.229.03:17:04.55#ibcon#read 4, iclass 23, count 0 2006.229.03:17:04.55#ibcon#about to read 5, iclass 23, count 0 2006.229.03:17:04.55#ibcon#read 5, iclass 23, count 0 2006.229.03:17:04.55#ibcon#about to read 6, iclass 23, count 0 2006.229.03:17:04.55#ibcon#read 6, iclass 23, count 0 2006.229.03:17:04.55#ibcon#end of sib2, iclass 23, count 0 2006.229.03:17:04.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:17:04.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:17:04.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:17:04.55#ibcon#*before write, iclass 23, count 0 2006.229.03:17:04.55#ibcon#enter sib2, iclass 23, count 0 2006.229.03:17:04.55#ibcon#flushed, iclass 23, count 0 2006.229.03:17:04.55#ibcon#about to write, iclass 23, count 0 2006.229.03:17:04.55#ibcon#wrote, iclass 23, count 0 2006.229.03:17:04.55#ibcon#about to read 3, iclass 23, count 0 2006.229.03:17:04.59#ibcon#read 3, iclass 23, count 0 2006.229.03:17:04.59#ibcon#about to read 4, iclass 23, count 0 2006.229.03:17:04.59#ibcon#read 4, iclass 23, count 0 2006.229.03:17:04.59#ibcon#about to read 5, iclass 23, count 0 2006.229.03:17:04.59#ibcon#read 5, iclass 23, count 0 2006.229.03:17:04.59#ibcon#about to read 6, iclass 23, count 0 2006.229.03:17:04.59#ibcon#read 6, iclass 23, count 0 2006.229.03:17:04.59#ibcon#end of sib2, iclass 23, count 0 2006.229.03:17:04.59#ibcon#*after write, iclass 23, count 0 2006.229.03:17:04.59#ibcon#*before return 0, iclass 23, count 0 2006.229.03:17:04.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:04.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:04.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:17:04.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:17:04.59$vck44/va=8,6 2006.229.03:17:04.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.03:17:04.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.03:17:04.59#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:04.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:17:04.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:17:04.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:17:04.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.03:17:04.65#ibcon#first serial, iclass 25, count 2 2006.229.03:17:04.65#ibcon#enter sib2, iclass 25, count 2 2006.229.03:17:04.65#ibcon#flushed, iclass 25, count 2 2006.229.03:17:04.65#ibcon#about to write, iclass 25, count 2 2006.229.03:17:04.65#ibcon#wrote, iclass 25, count 2 2006.229.03:17:04.65#ibcon#about to read 3, iclass 25, count 2 2006.229.03:17:04.67#ibcon#read 3, iclass 25, count 2 2006.229.03:17:04.67#ibcon#about to read 4, iclass 25, count 2 2006.229.03:17:04.67#ibcon#read 4, iclass 25, count 2 2006.229.03:17:04.67#ibcon#about to read 5, iclass 25, count 2 2006.229.03:17:04.67#ibcon#read 5, iclass 25, count 2 2006.229.03:17:04.67#ibcon#about to read 6, iclass 25, count 2 2006.229.03:17:04.67#ibcon#read 6, iclass 25, count 2 2006.229.03:17:04.67#ibcon#end of sib2, iclass 25, count 2 2006.229.03:17:04.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.03:17:04.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.03:17:04.67#ibcon#[25=AT08-06\r\n] 2006.229.03:17:04.67#ibcon#*before write, iclass 25, count 2 2006.229.03:17:04.67#ibcon#enter sib2, iclass 25, count 2 2006.229.03:17:04.67#ibcon#flushed, iclass 25, count 2 2006.229.03:17:04.67#ibcon#about to write, iclass 25, count 2 2006.229.03:17:04.67#ibcon#wrote, iclass 25, count 2 2006.229.03:17:04.67#ibcon#about to read 3, iclass 25, count 2 2006.229.03:17:04.70#ibcon#read 3, iclass 25, count 2 2006.229.03:17:04.70#ibcon#about to read 4, iclass 25, count 2 2006.229.03:17:04.70#ibcon#read 4, iclass 25, count 2 2006.229.03:17:04.70#ibcon#about to read 5, iclass 25, count 2 2006.229.03:17:04.70#ibcon#read 5, iclass 25, count 2 2006.229.03:17:04.70#ibcon#about to read 6, iclass 25, count 2 2006.229.03:17:04.70#ibcon#read 6, iclass 25, count 2 2006.229.03:17:04.70#ibcon#end of sib2, iclass 25, count 2 2006.229.03:17:04.70#ibcon#*after write, iclass 25, count 2 2006.229.03:17:04.70#ibcon#*before return 0, iclass 25, count 2 2006.229.03:17:04.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:17:04.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:17:04.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.03:17:04.70#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:04.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:17:04.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:17:04.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:17:04.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:17:04.82#ibcon#first serial, iclass 25, count 0 2006.229.03:17:04.82#ibcon#enter sib2, iclass 25, count 0 2006.229.03:17:04.82#ibcon#flushed, iclass 25, count 0 2006.229.03:17:04.82#ibcon#about to write, iclass 25, count 0 2006.229.03:17:04.82#ibcon#wrote, iclass 25, count 0 2006.229.03:17:04.82#ibcon#about to read 3, iclass 25, count 0 2006.229.03:17:04.84#ibcon#read 3, iclass 25, count 0 2006.229.03:17:04.84#ibcon#about to read 4, iclass 25, count 0 2006.229.03:17:04.84#ibcon#read 4, iclass 25, count 0 2006.229.03:17:04.84#ibcon#about to read 5, iclass 25, count 0 2006.229.03:17:04.84#ibcon#read 5, iclass 25, count 0 2006.229.03:17:04.84#ibcon#about to read 6, iclass 25, count 0 2006.229.03:17:04.84#ibcon#read 6, iclass 25, count 0 2006.229.03:17:04.84#ibcon#end of sib2, iclass 25, count 0 2006.229.03:17:04.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:17:04.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:17:04.84#ibcon#[25=USB\r\n] 2006.229.03:17:04.84#ibcon#*before write, iclass 25, count 0 2006.229.03:17:04.84#ibcon#enter sib2, iclass 25, count 0 2006.229.03:17:04.84#ibcon#flushed, iclass 25, count 0 2006.229.03:17:04.84#ibcon#about to write, iclass 25, count 0 2006.229.03:17:04.84#ibcon#wrote, iclass 25, count 0 2006.229.03:17:04.84#ibcon#about to read 3, iclass 25, count 0 2006.229.03:17:04.87#ibcon#read 3, iclass 25, count 0 2006.229.03:17:04.87#ibcon#about to read 4, iclass 25, count 0 2006.229.03:17:04.87#ibcon#read 4, iclass 25, count 0 2006.229.03:17:04.87#ibcon#about to read 5, iclass 25, count 0 2006.229.03:17:04.87#ibcon#read 5, iclass 25, count 0 2006.229.03:17:04.87#ibcon#about to read 6, iclass 25, count 0 2006.229.03:17:04.87#ibcon#read 6, iclass 25, count 0 2006.229.03:17:04.87#ibcon#end of sib2, iclass 25, count 0 2006.229.03:17:04.87#ibcon#*after write, iclass 25, count 0 2006.229.03:17:04.87#ibcon#*before return 0, iclass 25, count 0 2006.229.03:17:04.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:17:04.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:17:04.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:17:04.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:17:04.87$vck44/vblo=1,629.99 2006.229.03:17:04.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.03:17:04.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.03:17:04.87#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:04.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:17:04.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:17:04.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:17:04.88#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:17:04.88#ibcon#first serial, iclass 27, count 0 2006.229.03:17:04.88#ibcon#enter sib2, iclass 27, count 0 2006.229.03:17:04.88#ibcon#flushed, iclass 27, count 0 2006.229.03:17:04.88#ibcon#about to write, iclass 27, count 0 2006.229.03:17:04.88#ibcon#wrote, iclass 27, count 0 2006.229.03:17:04.88#ibcon#about to read 3, iclass 27, count 0 2006.229.03:17:04.89#ibcon#read 3, iclass 27, count 0 2006.229.03:17:04.89#ibcon#about to read 4, iclass 27, count 0 2006.229.03:17:04.89#ibcon#read 4, iclass 27, count 0 2006.229.03:17:04.89#ibcon#about to read 5, iclass 27, count 0 2006.229.03:17:04.89#ibcon#read 5, iclass 27, count 0 2006.229.03:17:04.89#ibcon#about to read 6, iclass 27, count 0 2006.229.03:17:04.89#ibcon#read 6, iclass 27, count 0 2006.229.03:17:04.89#ibcon#end of sib2, iclass 27, count 0 2006.229.03:17:04.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:17:04.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:17:04.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:17:04.89#ibcon#*before write, iclass 27, count 0 2006.229.03:17:04.89#ibcon#enter sib2, iclass 27, count 0 2006.229.03:17:04.89#ibcon#flushed, iclass 27, count 0 2006.229.03:17:04.89#ibcon#about to write, iclass 27, count 0 2006.229.03:17:04.89#ibcon#wrote, iclass 27, count 0 2006.229.03:17:04.89#ibcon#about to read 3, iclass 27, count 0 2006.229.03:17:04.93#ibcon#read 3, iclass 27, count 0 2006.229.03:17:04.93#ibcon#about to read 4, iclass 27, count 0 2006.229.03:17:04.93#ibcon#read 4, iclass 27, count 0 2006.229.03:17:04.93#ibcon#about to read 5, iclass 27, count 0 2006.229.03:17:04.93#ibcon#read 5, iclass 27, count 0 2006.229.03:17:04.93#ibcon#about to read 6, iclass 27, count 0 2006.229.03:17:04.93#ibcon#read 6, iclass 27, count 0 2006.229.03:17:04.93#ibcon#end of sib2, iclass 27, count 0 2006.229.03:17:04.93#ibcon#*after write, iclass 27, count 0 2006.229.03:17:04.93#ibcon#*before return 0, iclass 27, count 0 2006.229.03:17:04.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:17:04.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:17:04.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:17:04.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:17:04.93$vck44/vb=1,4 2006.229.03:17:04.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.03:17:04.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.03:17:04.93#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:04.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:17:04.93#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:17:04.93#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:17:04.93#ibcon#enter wrdev, iclass 29, count 2 2006.229.03:17:04.93#ibcon#first serial, iclass 29, count 2 2006.229.03:17:04.93#ibcon#enter sib2, iclass 29, count 2 2006.229.03:17:04.93#ibcon#flushed, iclass 29, count 2 2006.229.03:17:04.93#ibcon#about to write, iclass 29, count 2 2006.229.03:17:04.93#ibcon#wrote, iclass 29, count 2 2006.229.03:17:04.93#ibcon#about to read 3, iclass 29, count 2 2006.229.03:17:04.95#ibcon#read 3, iclass 29, count 2 2006.229.03:17:04.95#ibcon#about to read 4, iclass 29, count 2 2006.229.03:17:04.95#ibcon#read 4, iclass 29, count 2 2006.229.03:17:04.95#ibcon#about to read 5, iclass 29, count 2 2006.229.03:17:04.95#ibcon#read 5, iclass 29, count 2 2006.229.03:17:04.95#ibcon#about to read 6, iclass 29, count 2 2006.229.03:17:04.95#ibcon#read 6, iclass 29, count 2 2006.229.03:17:04.95#ibcon#end of sib2, iclass 29, count 2 2006.229.03:17:04.95#ibcon#*mode == 0, iclass 29, count 2 2006.229.03:17:04.95#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.03:17:04.95#ibcon#[27=AT01-04\r\n] 2006.229.03:17:04.95#ibcon#*before write, iclass 29, count 2 2006.229.03:17:04.95#ibcon#enter sib2, iclass 29, count 2 2006.229.03:17:04.95#ibcon#flushed, iclass 29, count 2 2006.229.03:17:04.95#ibcon#about to write, iclass 29, count 2 2006.229.03:17:04.95#ibcon#wrote, iclass 29, count 2 2006.229.03:17:04.95#ibcon#about to read 3, iclass 29, count 2 2006.229.03:17:04.98#ibcon#read 3, iclass 29, count 2 2006.229.03:17:04.98#ibcon#about to read 4, iclass 29, count 2 2006.229.03:17:04.98#ibcon#read 4, iclass 29, count 2 2006.229.03:17:04.98#ibcon#about to read 5, iclass 29, count 2 2006.229.03:17:04.98#ibcon#read 5, iclass 29, count 2 2006.229.03:17:04.98#ibcon#about to read 6, iclass 29, count 2 2006.229.03:17:04.98#ibcon#read 6, iclass 29, count 2 2006.229.03:17:04.98#ibcon#end of sib2, iclass 29, count 2 2006.229.03:17:04.98#ibcon#*after write, iclass 29, count 2 2006.229.03:17:04.98#ibcon#*before return 0, iclass 29, count 2 2006.229.03:17:04.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:17:04.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:17:04.98#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.03:17:04.98#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:04.98#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:17:05.10#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:17:05.10#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:17:05.10#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:17:05.10#ibcon#first serial, iclass 29, count 0 2006.229.03:17:05.10#ibcon#enter sib2, iclass 29, count 0 2006.229.03:17:05.10#ibcon#flushed, iclass 29, count 0 2006.229.03:17:05.10#ibcon#about to write, iclass 29, count 0 2006.229.03:17:05.10#ibcon#wrote, iclass 29, count 0 2006.229.03:17:05.10#ibcon#about to read 3, iclass 29, count 0 2006.229.03:17:05.12#ibcon#read 3, iclass 29, count 0 2006.229.03:17:05.12#ibcon#about to read 4, iclass 29, count 0 2006.229.03:17:05.12#ibcon#read 4, iclass 29, count 0 2006.229.03:17:05.12#ibcon#about to read 5, iclass 29, count 0 2006.229.03:17:05.12#ibcon#read 5, iclass 29, count 0 2006.229.03:17:05.12#ibcon#about to read 6, iclass 29, count 0 2006.229.03:17:05.12#ibcon#read 6, iclass 29, count 0 2006.229.03:17:05.12#ibcon#end of sib2, iclass 29, count 0 2006.229.03:17:05.12#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:17:05.12#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:17:05.12#ibcon#[27=USB\r\n] 2006.229.03:17:05.12#ibcon#*before write, iclass 29, count 0 2006.229.03:17:05.12#ibcon#enter sib2, iclass 29, count 0 2006.229.03:17:05.12#ibcon#flushed, iclass 29, count 0 2006.229.03:17:05.12#ibcon#about to write, iclass 29, count 0 2006.229.03:17:05.12#ibcon#wrote, iclass 29, count 0 2006.229.03:17:05.12#ibcon#about to read 3, iclass 29, count 0 2006.229.03:17:05.15#ibcon#read 3, iclass 29, count 0 2006.229.03:17:05.15#ibcon#about to read 4, iclass 29, count 0 2006.229.03:17:05.15#ibcon#read 4, iclass 29, count 0 2006.229.03:17:05.15#ibcon#about to read 5, iclass 29, count 0 2006.229.03:17:05.15#ibcon#read 5, iclass 29, count 0 2006.229.03:17:05.15#ibcon#about to read 6, iclass 29, count 0 2006.229.03:17:05.15#ibcon#read 6, iclass 29, count 0 2006.229.03:17:05.15#ibcon#end of sib2, iclass 29, count 0 2006.229.03:17:05.15#ibcon#*after write, iclass 29, count 0 2006.229.03:17:05.15#ibcon#*before return 0, iclass 29, count 0 2006.229.03:17:05.15#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:17:05.15#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:17:05.15#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:17:05.15#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:17:05.15$vck44/vblo=2,634.99 2006.229.03:17:05.15#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.03:17:05.15#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.03:17:05.15#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:05.15#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:05.15#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:05.15#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:05.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:17:05.15#ibcon#first serial, iclass 31, count 0 2006.229.03:17:05.15#ibcon#enter sib2, iclass 31, count 0 2006.229.03:17:05.15#ibcon#flushed, iclass 31, count 0 2006.229.03:17:05.15#ibcon#about to write, iclass 31, count 0 2006.229.03:17:05.15#ibcon#wrote, iclass 31, count 0 2006.229.03:17:05.15#ibcon#about to read 3, iclass 31, count 0 2006.229.03:17:05.17#ibcon#read 3, iclass 31, count 0 2006.229.03:17:05.17#ibcon#about to read 4, iclass 31, count 0 2006.229.03:17:05.17#ibcon#read 4, iclass 31, count 0 2006.229.03:17:05.17#ibcon#about to read 5, iclass 31, count 0 2006.229.03:17:05.17#ibcon#read 5, iclass 31, count 0 2006.229.03:17:05.17#ibcon#about to read 6, iclass 31, count 0 2006.229.03:17:05.17#ibcon#read 6, iclass 31, count 0 2006.229.03:17:05.17#ibcon#end of sib2, iclass 31, count 0 2006.229.03:17:05.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:17:05.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:17:05.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:17:05.17#ibcon#*before write, iclass 31, count 0 2006.229.03:17:05.17#ibcon#enter sib2, iclass 31, count 0 2006.229.03:17:05.17#ibcon#flushed, iclass 31, count 0 2006.229.03:17:05.17#ibcon#about to write, iclass 31, count 0 2006.229.03:17:05.17#ibcon#wrote, iclass 31, count 0 2006.229.03:17:05.17#ibcon#about to read 3, iclass 31, count 0 2006.229.03:17:05.21#ibcon#read 3, iclass 31, count 0 2006.229.03:17:05.21#ibcon#about to read 4, iclass 31, count 0 2006.229.03:17:05.21#ibcon#read 4, iclass 31, count 0 2006.229.03:17:05.21#ibcon#about to read 5, iclass 31, count 0 2006.229.03:17:05.21#ibcon#read 5, iclass 31, count 0 2006.229.03:17:05.21#ibcon#about to read 6, iclass 31, count 0 2006.229.03:17:05.21#ibcon#read 6, iclass 31, count 0 2006.229.03:17:05.21#ibcon#end of sib2, iclass 31, count 0 2006.229.03:17:05.21#ibcon#*after write, iclass 31, count 0 2006.229.03:17:05.21#ibcon#*before return 0, iclass 31, count 0 2006.229.03:17:05.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:05.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:17:05.21#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:17:05.21#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:17:05.21$vck44/vb=2,4 2006.229.03:17:05.21#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.03:17:05.21#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.03:17:05.21#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:05.21#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:05.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:05.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:05.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.03:17:05.27#ibcon#first serial, iclass 33, count 2 2006.229.03:17:05.27#ibcon#enter sib2, iclass 33, count 2 2006.229.03:17:05.27#ibcon#flushed, iclass 33, count 2 2006.229.03:17:05.27#ibcon#about to write, iclass 33, count 2 2006.229.03:17:05.27#ibcon#wrote, iclass 33, count 2 2006.229.03:17:05.27#ibcon#about to read 3, iclass 33, count 2 2006.229.03:17:05.29#ibcon#read 3, iclass 33, count 2 2006.229.03:17:05.29#ibcon#about to read 4, iclass 33, count 2 2006.229.03:17:05.29#ibcon#read 4, iclass 33, count 2 2006.229.03:17:05.29#ibcon#about to read 5, iclass 33, count 2 2006.229.03:17:05.29#ibcon#read 5, iclass 33, count 2 2006.229.03:17:05.29#ibcon#about to read 6, iclass 33, count 2 2006.229.03:17:05.29#ibcon#read 6, iclass 33, count 2 2006.229.03:17:05.29#ibcon#end of sib2, iclass 33, count 2 2006.229.03:17:05.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.03:17:05.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.03:17:05.29#ibcon#[27=AT02-04\r\n] 2006.229.03:17:05.29#ibcon#*before write, iclass 33, count 2 2006.229.03:17:05.29#ibcon#enter sib2, iclass 33, count 2 2006.229.03:17:05.29#ibcon#flushed, iclass 33, count 2 2006.229.03:17:05.29#ibcon#about to write, iclass 33, count 2 2006.229.03:17:05.29#ibcon#wrote, iclass 33, count 2 2006.229.03:17:05.29#ibcon#about to read 3, iclass 33, count 2 2006.229.03:17:05.32#ibcon#read 3, iclass 33, count 2 2006.229.03:17:05.32#ibcon#about to read 4, iclass 33, count 2 2006.229.03:17:05.32#ibcon#read 4, iclass 33, count 2 2006.229.03:17:05.32#ibcon#about to read 5, iclass 33, count 2 2006.229.03:17:05.32#ibcon#read 5, iclass 33, count 2 2006.229.03:17:05.32#ibcon#about to read 6, iclass 33, count 2 2006.229.03:17:05.32#ibcon#read 6, iclass 33, count 2 2006.229.03:17:05.32#ibcon#end of sib2, iclass 33, count 2 2006.229.03:17:05.32#ibcon#*after write, iclass 33, count 2 2006.229.03:17:05.32#ibcon#*before return 0, iclass 33, count 2 2006.229.03:17:05.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:05.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:17:05.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.03:17:05.32#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:05.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:05.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:05.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:05.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:17:05.44#ibcon#first serial, iclass 33, count 0 2006.229.03:17:05.44#ibcon#enter sib2, iclass 33, count 0 2006.229.03:17:05.44#ibcon#flushed, iclass 33, count 0 2006.229.03:17:05.44#ibcon#about to write, iclass 33, count 0 2006.229.03:17:05.44#ibcon#wrote, iclass 33, count 0 2006.229.03:17:05.44#ibcon#about to read 3, iclass 33, count 0 2006.229.03:17:05.46#ibcon#read 3, iclass 33, count 0 2006.229.03:17:05.46#ibcon#about to read 4, iclass 33, count 0 2006.229.03:17:05.46#ibcon#read 4, iclass 33, count 0 2006.229.03:17:05.46#ibcon#about to read 5, iclass 33, count 0 2006.229.03:17:05.46#ibcon#read 5, iclass 33, count 0 2006.229.03:17:05.46#ibcon#about to read 6, iclass 33, count 0 2006.229.03:17:05.46#ibcon#read 6, iclass 33, count 0 2006.229.03:17:05.46#ibcon#end of sib2, iclass 33, count 0 2006.229.03:17:05.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:17:05.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:17:05.46#ibcon#[27=USB\r\n] 2006.229.03:17:05.46#ibcon#*before write, iclass 33, count 0 2006.229.03:17:05.46#ibcon#enter sib2, iclass 33, count 0 2006.229.03:17:05.46#ibcon#flushed, iclass 33, count 0 2006.229.03:17:05.46#ibcon#about to write, iclass 33, count 0 2006.229.03:17:05.46#ibcon#wrote, iclass 33, count 0 2006.229.03:17:05.46#ibcon#about to read 3, iclass 33, count 0 2006.229.03:17:05.49#ibcon#read 3, iclass 33, count 0 2006.229.03:17:05.49#ibcon#about to read 4, iclass 33, count 0 2006.229.03:17:05.49#ibcon#read 4, iclass 33, count 0 2006.229.03:17:05.49#ibcon#about to read 5, iclass 33, count 0 2006.229.03:17:05.49#ibcon#read 5, iclass 33, count 0 2006.229.03:17:05.49#ibcon#about to read 6, iclass 33, count 0 2006.229.03:17:05.49#ibcon#read 6, iclass 33, count 0 2006.229.03:17:05.49#ibcon#end of sib2, iclass 33, count 0 2006.229.03:17:05.49#ibcon#*after write, iclass 33, count 0 2006.229.03:17:05.49#ibcon#*before return 0, iclass 33, count 0 2006.229.03:17:05.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:05.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:17:05.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:17:05.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:17:05.49$vck44/vblo=3,649.99 2006.229.03:17:05.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.03:17:05.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.03:17:05.49#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:05.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:05.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:05.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:05.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:17:05.49#ibcon#first serial, iclass 35, count 0 2006.229.03:17:05.49#ibcon#enter sib2, iclass 35, count 0 2006.229.03:17:05.49#ibcon#flushed, iclass 35, count 0 2006.229.03:17:05.49#ibcon#about to write, iclass 35, count 0 2006.229.03:17:05.49#ibcon#wrote, iclass 35, count 0 2006.229.03:17:05.49#ibcon#about to read 3, iclass 35, count 0 2006.229.03:17:05.51#ibcon#read 3, iclass 35, count 0 2006.229.03:17:05.51#ibcon#about to read 4, iclass 35, count 0 2006.229.03:17:05.51#ibcon#read 4, iclass 35, count 0 2006.229.03:17:05.51#ibcon#about to read 5, iclass 35, count 0 2006.229.03:17:05.51#ibcon#read 5, iclass 35, count 0 2006.229.03:17:05.51#ibcon#about to read 6, iclass 35, count 0 2006.229.03:17:05.51#ibcon#read 6, iclass 35, count 0 2006.229.03:17:05.51#ibcon#end of sib2, iclass 35, count 0 2006.229.03:17:05.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:17:05.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:17:05.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:17:05.51#ibcon#*before write, iclass 35, count 0 2006.229.03:17:05.51#ibcon#enter sib2, iclass 35, count 0 2006.229.03:17:05.51#ibcon#flushed, iclass 35, count 0 2006.229.03:17:05.51#ibcon#about to write, iclass 35, count 0 2006.229.03:17:05.51#ibcon#wrote, iclass 35, count 0 2006.229.03:17:05.51#ibcon#about to read 3, iclass 35, count 0 2006.229.03:17:05.55#ibcon#read 3, iclass 35, count 0 2006.229.03:17:05.55#ibcon#about to read 4, iclass 35, count 0 2006.229.03:17:05.55#ibcon#read 4, iclass 35, count 0 2006.229.03:17:05.55#ibcon#about to read 5, iclass 35, count 0 2006.229.03:17:05.55#ibcon#read 5, iclass 35, count 0 2006.229.03:17:05.55#ibcon#about to read 6, iclass 35, count 0 2006.229.03:17:05.55#ibcon#read 6, iclass 35, count 0 2006.229.03:17:05.55#ibcon#end of sib2, iclass 35, count 0 2006.229.03:17:05.55#ibcon#*after write, iclass 35, count 0 2006.229.03:17:05.55#ibcon#*before return 0, iclass 35, count 0 2006.229.03:17:05.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:05.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:17:05.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:17:05.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:17:05.55$vck44/vb=3,4 2006.229.03:17:05.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.03:17:05.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.03:17:05.55#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:05.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:05.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:05.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:05.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.03:17:05.61#ibcon#first serial, iclass 37, count 2 2006.229.03:17:05.61#ibcon#enter sib2, iclass 37, count 2 2006.229.03:17:05.61#ibcon#flushed, iclass 37, count 2 2006.229.03:17:05.61#ibcon#about to write, iclass 37, count 2 2006.229.03:17:05.61#ibcon#wrote, iclass 37, count 2 2006.229.03:17:05.61#ibcon#about to read 3, iclass 37, count 2 2006.229.03:17:05.63#ibcon#read 3, iclass 37, count 2 2006.229.03:17:05.63#ibcon#about to read 4, iclass 37, count 2 2006.229.03:17:05.63#ibcon#read 4, iclass 37, count 2 2006.229.03:17:05.63#ibcon#about to read 5, iclass 37, count 2 2006.229.03:17:05.63#ibcon#read 5, iclass 37, count 2 2006.229.03:17:05.63#ibcon#about to read 6, iclass 37, count 2 2006.229.03:17:05.63#ibcon#read 6, iclass 37, count 2 2006.229.03:17:05.63#ibcon#end of sib2, iclass 37, count 2 2006.229.03:17:05.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.03:17:05.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.03:17:05.63#ibcon#[27=AT03-04\r\n] 2006.229.03:17:05.63#ibcon#*before write, iclass 37, count 2 2006.229.03:17:05.63#ibcon#enter sib2, iclass 37, count 2 2006.229.03:17:05.63#ibcon#flushed, iclass 37, count 2 2006.229.03:17:05.63#ibcon#about to write, iclass 37, count 2 2006.229.03:17:05.63#ibcon#wrote, iclass 37, count 2 2006.229.03:17:05.63#ibcon#about to read 3, iclass 37, count 2 2006.229.03:17:05.66#ibcon#read 3, iclass 37, count 2 2006.229.03:17:05.66#ibcon#about to read 4, iclass 37, count 2 2006.229.03:17:05.66#ibcon#read 4, iclass 37, count 2 2006.229.03:17:05.66#ibcon#about to read 5, iclass 37, count 2 2006.229.03:17:05.66#ibcon#read 5, iclass 37, count 2 2006.229.03:17:05.66#ibcon#about to read 6, iclass 37, count 2 2006.229.03:17:05.66#ibcon#read 6, iclass 37, count 2 2006.229.03:17:05.66#ibcon#end of sib2, iclass 37, count 2 2006.229.03:17:05.66#ibcon#*after write, iclass 37, count 2 2006.229.03:17:05.66#ibcon#*before return 0, iclass 37, count 2 2006.229.03:17:05.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:05.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:17:05.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.03:17:05.66#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:05.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:05.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:05.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:05.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:17:05.78#ibcon#first serial, iclass 37, count 0 2006.229.03:17:05.78#ibcon#enter sib2, iclass 37, count 0 2006.229.03:17:05.78#ibcon#flushed, iclass 37, count 0 2006.229.03:17:05.78#ibcon#about to write, iclass 37, count 0 2006.229.03:17:05.78#ibcon#wrote, iclass 37, count 0 2006.229.03:17:05.78#ibcon#about to read 3, iclass 37, count 0 2006.229.03:17:05.80#ibcon#read 3, iclass 37, count 0 2006.229.03:17:05.80#ibcon#about to read 4, iclass 37, count 0 2006.229.03:17:05.80#ibcon#read 4, iclass 37, count 0 2006.229.03:17:05.80#ibcon#about to read 5, iclass 37, count 0 2006.229.03:17:05.80#ibcon#read 5, iclass 37, count 0 2006.229.03:17:05.80#ibcon#about to read 6, iclass 37, count 0 2006.229.03:17:05.80#ibcon#read 6, iclass 37, count 0 2006.229.03:17:05.80#ibcon#end of sib2, iclass 37, count 0 2006.229.03:17:05.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:17:05.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:17:05.80#ibcon#[27=USB\r\n] 2006.229.03:17:05.80#ibcon#*before write, iclass 37, count 0 2006.229.03:17:05.80#ibcon#enter sib2, iclass 37, count 0 2006.229.03:17:05.80#ibcon#flushed, iclass 37, count 0 2006.229.03:17:05.80#ibcon#about to write, iclass 37, count 0 2006.229.03:17:05.80#ibcon#wrote, iclass 37, count 0 2006.229.03:17:05.80#ibcon#about to read 3, iclass 37, count 0 2006.229.03:17:05.83#ibcon#read 3, iclass 37, count 0 2006.229.03:17:05.83#ibcon#about to read 4, iclass 37, count 0 2006.229.03:17:05.83#ibcon#read 4, iclass 37, count 0 2006.229.03:17:05.83#ibcon#about to read 5, iclass 37, count 0 2006.229.03:17:05.83#ibcon#read 5, iclass 37, count 0 2006.229.03:17:05.83#ibcon#about to read 6, iclass 37, count 0 2006.229.03:17:05.83#ibcon#read 6, iclass 37, count 0 2006.229.03:17:05.83#ibcon#end of sib2, iclass 37, count 0 2006.229.03:17:05.83#ibcon#*after write, iclass 37, count 0 2006.229.03:17:05.83#ibcon#*before return 0, iclass 37, count 0 2006.229.03:17:05.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:05.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:17:05.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:17:05.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:17:05.83$vck44/vblo=4,679.99 2006.229.03:17:05.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.03:17:05.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.03:17:05.83#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:05.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:05.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:05.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:05.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:17:05.83#ibcon#first serial, iclass 39, count 0 2006.229.03:17:05.83#ibcon#enter sib2, iclass 39, count 0 2006.229.03:17:05.83#ibcon#flushed, iclass 39, count 0 2006.229.03:17:05.83#ibcon#about to write, iclass 39, count 0 2006.229.03:17:05.84#ibcon#wrote, iclass 39, count 0 2006.229.03:17:05.84#ibcon#about to read 3, iclass 39, count 0 2006.229.03:17:05.85#ibcon#read 3, iclass 39, count 0 2006.229.03:17:05.85#ibcon#about to read 4, iclass 39, count 0 2006.229.03:17:05.85#ibcon#read 4, iclass 39, count 0 2006.229.03:17:05.85#ibcon#about to read 5, iclass 39, count 0 2006.229.03:17:05.85#ibcon#read 5, iclass 39, count 0 2006.229.03:17:05.85#ibcon#about to read 6, iclass 39, count 0 2006.229.03:17:05.85#ibcon#read 6, iclass 39, count 0 2006.229.03:17:05.85#ibcon#end of sib2, iclass 39, count 0 2006.229.03:17:05.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:17:05.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:17:05.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:17:05.85#ibcon#*before write, iclass 39, count 0 2006.229.03:17:05.85#ibcon#enter sib2, iclass 39, count 0 2006.229.03:17:05.85#ibcon#flushed, iclass 39, count 0 2006.229.03:17:05.85#ibcon#about to write, iclass 39, count 0 2006.229.03:17:05.85#ibcon#wrote, iclass 39, count 0 2006.229.03:17:05.85#ibcon#about to read 3, iclass 39, count 0 2006.229.03:17:05.89#ibcon#read 3, iclass 39, count 0 2006.229.03:17:05.89#ibcon#about to read 4, iclass 39, count 0 2006.229.03:17:05.89#ibcon#read 4, iclass 39, count 0 2006.229.03:17:05.89#ibcon#about to read 5, iclass 39, count 0 2006.229.03:17:05.89#ibcon#read 5, iclass 39, count 0 2006.229.03:17:05.89#ibcon#about to read 6, iclass 39, count 0 2006.229.03:17:05.89#ibcon#read 6, iclass 39, count 0 2006.229.03:17:05.89#ibcon#end of sib2, iclass 39, count 0 2006.229.03:17:05.89#ibcon#*after write, iclass 39, count 0 2006.229.03:17:05.89#ibcon#*before return 0, iclass 39, count 0 2006.229.03:17:05.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:05.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:17:05.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:17:05.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:17:05.89$vck44/vb=4,4 2006.229.03:17:05.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.03:17:05.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.03:17:05.89#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:05.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:05.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:05.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:05.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.03:17:05.95#ibcon#first serial, iclass 3, count 2 2006.229.03:17:05.95#ibcon#enter sib2, iclass 3, count 2 2006.229.03:17:05.95#ibcon#flushed, iclass 3, count 2 2006.229.03:17:05.95#ibcon#about to write, iclass 3, count 2 2006.229.03:17:05.95#ibcon#wrote, iclass 3, count 2 2006.229.03:17:05.95#ibcon#about to read 3, iclass 3, count 2 2006.229.03:17:05.97#ibcon#read 3, iclass 3, count 2 2006.229.03:17:05.97#ibcon#about to read 4, iclass 3, count 2 2006.229.03:17:05.97#ibcon#read 4, iclass 3, count 2 2006.229.03:17:05.97#ibcon#about to read 5, iclass 3, count 2 2006.229.03:17:05.97#ibcon#read 5, iclass 3, count 2 2006.229.03:17:05.97#ibcon#about to read 6, iclass 3, count 2 2006.229.03:17:05.97#ibcon#read 6, iclass 3, count 2 2006.229.03:17:05.97#ibcon#end of sib2, iclass 3, count 2 2006.229.03:17:05.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.03:17:05.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.03:17:05.97#ibcon#[27=AT04-04\r\n] 2006.229.03:17:05.97#ibcon#*before write, iclass 3, count 2 2006.229.03:17:05.97#ibcon#enter sib2, iclass 3, count 2 2006.229.03:17:05.97#ibcon#flushed, iclass 3, count 2 2006.229.03:17:05.97#ibcon#about to write, iclass 3, count 2 2006.229.03:17:05.97#ibcon#wrote, iclass 3, count 2 2006.229.03:17:05.97#ibcon#about to read 3, iclass 3, count 2 2006.229.03:17:06.00#ibcon#read 3, iclass 3, count 2 2006.229.03:17:06.00#ibcon#about to read 4, iclass 3, count 2 2006.229.03:17:06.00#ibcon#read 4, iclass 3, count 2 2006.229.03:17:06.00#ibcon#about to read 5, iclass 3, count 2 2006.229.03:17:06.00#ibcon#read 5, iclass 3, count 2 2006.229.03:17:06.00#ibcon#about to read 6, iclass 3, count 2 2006.229.03:17:06.00#ibcon#read 6, iclass 3, count 2 2006.229.03:17:06.00#ibcon#end of sib2, iclass 3, count 2 2006.229.03:17:06.00#ibcon#*after write, iclass 3, count 2 2006.229.03:17:06.00#ibcon#*before return 0, iclass 3, count 2 2006.229.03:17:06.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:06.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:17:06.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.03:17:06.00#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:06.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:06.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:06.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:06.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:17:06.12#ibcon#first serial, iclass 3, count 0 2006.229.03:17:06.12#ibcon#enter sib2, iclass 3, count 0 2006.229.03:17:06.12#ibcon#flushed, iclass 3, count 0 2006.229.03:17:06.12#ibcon#about to write, iclass 3, count 0 2006.229.03:17:06.12#ibcon#wrote, iclass 3, count 0 2006.229.03:17:06.12#ibcon#about to read 3, iclass 3, count 0 2006.229.03:17:06.14#ibcon#read 3, iclass 3, count 0 2006.229.03:17:06.14#ibcon#about to read 4, iclass 3, count 0 2006.229.03:17:06.14#ibcon#read 4, iclass 3, count 0 2006.229.03:17:06.14#ibcon#about to read 5, iclass 3, count 0 2006.229.03:17:06.14#ibcon#read 5, iclass 3, count 0 2006.229.03:17:06.14#ibcon#about to read 6, iclass 3, count 0 2006.229.03:17:06.14#ibcon#read 6, iclass 3, count 0 2006.229.03:17:06.14#ibcon#end of sib2, iclass 3, count 0 2006.229.03:17:06.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:17:06.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:17:06.14#ibcon#[27=USB\r\n] 2006.229.03:17:06.14#ibcon#*before write, iclass 3, count 0 2006.229.03:17:06.14#ibcon#enter sib2, iclass 3, count 0 2006.229.03:17:06.14#ibcon#flushed, iclass 3, count 0 2006.229.03:17:06.14#ibcon#about to write, iclass 3, count 0 2006.229.03:17:06.14#ibcon#wrote, iclass 3, count 0 2006.229.03:17:06.14#ibcon#about to read 3, iclass 3, count 0 2006.229.03:17:06.17#ibcon#read 3, iclass 3, count 0 2006.229.03:17:06.17#ibcon#about to read 4, iclass 3, count 0 2006.229.03:17:06.17#ibcon#read 4, iclass 3, count 0 2006.229.03:17:06.17#ibcon#about to read 5, iclass 3, count 0 2006.229.03:17:06.17#ibcon#read 5, iclass 3, count 0 2006.229.03:17:06.17#ibcon#about to read 6, iclass 3, count 0 2006.229.03:17:06.17#ibcon#read 6, iclass 3, count 0 2006.229.03:17:06.17#ibcon#end of sib2, iclass 3, count 0 2006.229.03:17:06.17#ibcon#*after write, iclass 3, count 0 2006.229.03:17:06.17#ibcon#*before return 0, iclass 3, count 0 2006.229.03:17:06.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:06.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:17:06.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:17:06.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:17:06.17$vck44/vblo=5,709.99 2006.229.03:17:06.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.03:17:06.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.03:17:06.17#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:06.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:06.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:06.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:06.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:17:06.17#ibcon#first serial, iclass 5, count 0 2006.229.03:17:06.17#ibcon#enter sib2, iclass 5, count 0 2006.229.03:17:06.17#ibcon#flushed, iclass 5, count 0 2006.229.03:17:06.17#ibcon#about to write, iclass 5, count 0 2006.229.03:17:06.17#ibcon#wrote, iclass 5, count 0 2006.229.03:17:06.18#ibcon#about to read 3, iclass 5, count 0 2006.229.03:17:06.19#ibcon#read 3, iclass 5, count 0 2006.229.03:17:06.19#ibcon#about to read 4, iclass 5, count 0 2006.229.03:17:06.19#ibcon#read 4, iclass 5, count 0 2006.229.03:17:06.19#ibcon#about to read 5, iclass 5, count 0 2006.229.03:17:06.19#ibcon#read 5, iclass 5, count 0 2006.229.03:17:06.19#ibcon#about to read 6, iclass 5, count 0 2006.229.03:17:06.19#ibcon#read 6, iclass 5, count 0 2006.229.03:17:06.19#ibcon#end of sib2, iclass 5, count 0 2006.229.03:17:06.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:17:06.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:17:06.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:17:06.19#ibcon#*before write, iclass 5, count 0 2006.229.03:17:06.19#ibcon#enter sib2, iclass 5, count 0 2006.229.03:17:06.19#ibcon#flushed, iclass 5, count 0 2006.229.03:17:06.19#ibcon#about to write, iclass 5, count 0 2006.229.03:17:06.19#ibcon#wrote, iclass 5, count 0 2006.229.03:17:06.19#ibcon#about to read 3, iclass 5, count 0 2006.229.03:17:06.23#ibcon#read 3, iclass 5, count 0 2006.229.03:17:06.23#ibcon#about to read 4, iclass 5, count 0 2006.229.03:17:06.23#ibcon#read 4, iclass 5, count 0 2006.229.03:17:06.23#ibcon#about to read 5, iclass 5, count 0 2006.229.03:17:06.23#ibcon#read 5, iclass 5, count 0 2006.229.03:17:06.23#ibcon#about to read 6, iclass 5, count 0 2006.229.03:17:06.23#ibcon#read 6, iclass 5, count 0 2006.229.03:17:06.23#ibcon#end of sib2, iclass 5, count 0 2006.229.03:17:06.23#ibcon#*after write, iclass 5, count 0 2006.229.03:17:06.23#ibcon#*before return 0, iclass 5, count 0 2006.229.03:17:06.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:06.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:17:06.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:17:06.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:17:06.23$vck44/vb=5,4 2006.229.03:17:06.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.03:17:06.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.03:17:06.23#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:06.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:06.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:06.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:06.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.03:17:06.29#ibcon#first serial, iclass 7, count 2 2006.229.03:17:06.29#ibcon#enter sib2, iclass 7, count 2 2006.229.03:17:06.29#ibcon#flushed, iclass 7, count 2 2006.229.03:17:06.29#ibcon#about to write, iclass 7, count 2 2006.229.03:17:06.29#ibcon#wrote, iclass 7, count 2 2006.229.03:17:06.29#ibcon#about to read 3, iclass 7, count 2 2006.229.03:17:06.31#ibcon#read 3, iclass 7, count 2 2006.229.03:17:06.31#ibcon#about to read 4, iclass 7, count 2 2006.229.03:17:06.31#ibcon#read 4, iclass 7, count 2 2006.229.03:17:06.31#ibcon#about to read 5, iclass 7, count 2 2006.229.03:17:06.31#ibcon#read 5, iclass 7, count 2 2006.229.03:17:06.31#ibcon#about to read 6, iclass 7, count 2 2006.229.03:17:06.31#ibcon#read 6, iclass 7, count 2 2006.229.03:17:06.31#ibcon#end of sib2, iclass 7, count 2 2006.229.03:17:06.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.03:17:06.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.03:17:06.31#ibcon#[27=AT05-04\r\n] 2006.229.03:17:06.31#ibcon#*before write, iclass 7, count 2 2006.229.03:17:06.31#ibcon#enter sib2, iclass 7, count 2 2006.229.03:17:06.31#ibcon#flushed, iclass 7, count 2 2006.229.03:17:06.31#ibcon#about to write, iclass 7, count 2 2006.229.03:17:06.31#ibcon#wrote, iclass 7, count 2 2006.229.03:17:06.31#ibcon#about to read 3, iclass 7, count 2 2006.229.03:17:06.34#ibcon#read 3, iclass 7, count 2 2006.229.03:17:06.34#ibcon#about to read 4, iclass 7, count 2 2006.229.03:17:06.34#ibcon#read 4, iclass 7, count 2 2006.229.03:17:06.34#ibcon#about to read 5, iclass 7, count 2 2006.229.03:17:06.34#ibcon#read 5, iclass 7, count 2 2006.229.03:17:06.34#ibcon#about to read 6, iclass 7, count 2 2006.229.03:17:06.34#ibcon#read 6, iclass 7, count 2 2006.229.03:17:06.34#ibcon#end of sib2, iclass 7, count 2 2006.229.03:17:06.34#ibcon#*after write, iclass 7, count 2 2006.229.03:17:06.34#ibcon#*before return 0, iclass 7, count 2 2006.229.03:17:06.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:06.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:17:06.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.03:17:06.34#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:06.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:06.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:06.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:06.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:17:06.46#ibcon#first serial, iclass 7, count 0 2006.229.03:17:06.46#ibcon#enter sib2, iclass 7, count 0 2006.229.03:17:06.46#ibcon#flushed, iclass 7, count 0 2006.229.03:17:06.46#ibcon#about to write, iclass 7, count 0 2006.229.03:17:06.46#ibcon#wrote, iclass 7, count 0 2006.229.03:17:06.46#ibcon#about to read 3, iclass 7, count 0 2006.229.03:17:06.48#ibcon#read 3, iclass 7, count 0 2006.229.03:17:06.48#ibcon#about to read 4, iclass 7, count 0 2006.229.03:17:06.48#ibcon#read 4, iclass 7, count 0 2006.229.03:17:06.48#ibcon#about to read 5, iclass 7, count 0 2006.229.03:17:06.48#ibcon#read 5, iclass 7, count 0 2006.229.03:17:06.48#ibcon#about to read 6, iclass 7, count 0 2006.229.03:17:06.48#ibcon#read 6, iclass 7, count 0 2006.229.03:17:06.48#ibcon#end of sib2, iclass 7, count 0 2006.229.03:17:06.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:17:06.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:17:06.48#ibcon#[27=USB\r\n] 2006.229.03:17:06.48#ibcon#*before write, iclass 7, count 0 2006.229.03:17:06.48#ibcon#enter sib2, iclass 7, count 0 2006.229.03:17:06.48#ibcon#flushed, iclass 7, count 0 2006.229.03:17:06.48#ibcon#about to write, iclass 7, count 0 2006.229.03:17:06.48#ibcon#wrote, iclass 7, count 0 2006.229.03:17:06.48#ibcon#about to read 3, iclass 7, count 0 2006.229.03:17:06.51#ibcon#read 3, iclass 7, count 0 2006.229.03:17:06.51#ibcon#about to read 4, iclass 7, count 0 2006.229.03:17:06.51#ibcon#read 4, iclass 7, count 0 2006.229.03:17:06.51#ibcon#about to read 5, iclass 7, count 0 2006.229.03:17:06.51#ibcon#read 5, iclass 7, count 0 2006.229.03:17:06.51#ibcon#about to read 6, iclass 7, count 0 2006.229.03:17:06.51#ibcon#read 6, iclass 7, count 0 2006.229.03:17:06.51#ibcon#end of sib2, iclass 7, count 0 2006.229.03:17:06.51#ibcon#*after write, iclass 7, count 0 2006.229.03:17:06.51#ibcon#*before return 0, iclass 7, count 0 2006.229.03:17:06.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:06.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:17:06.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:17:06.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:17:06.51$vck44/vblo=6,719.99 2006.229.03:17:06.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.03:17:06.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.03:17:06.51#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:06.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:06.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:06.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:06.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:17:06.51#ibcon#first serial, iclass 11, count 0 2006.229.03:17:06.51#ibcon#enter sib2, iclass 11, count 0 2006.229.03:17:06.51#ibcon#flushed, iclass 11, count 0 2006.229.03:17:06.51#ibcon#about to write, iclass 11, count 0 2006.229.03:17:06.51#ibcon#wrote, iclass 11, count 0 2006.229.03:17:06.51#ibcon#about to read 3, iclass 11, count 0 2006.229.03:17:06.53#ibcon#read 3, iclass 11, count 0 2006.229.03:17:06.53#ibcon#about to read 4, iclass 11, count 0 2006.229.03:17:06.53#ibcon#read 4, iclass 11, count 0 2006.229.03:17:06.53#ibcon#about to read 5, iclass 11, count 0 2006.229.03:17:06.53#ibcon#read 5, iclass 11, count 0 2006.229.03:17:06.53#ibcon#about to read 6, iclass 11, count 0 2006.229.03:17:06.53#ibcon#read 6, iclass 11, count 0 2006.229.03:17:06.53#ibcon#end of sib2, iclass 11, count 0 2006.229.03:17:06.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:17:06.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:17:06.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:17:06.53#ibcon#*before write, iclass 11, count 0 2006.229.03:17:06.53#ibcon#enter sib2, iclass 11, count 0 2006.229.03:17:06.53#ibcon#flushed, iclass 11, count 0 2006.229.03:17:06.53#ibcon#about to write, iclass 11, count 0 2006.229.03:17:06.53#ibcon#wrote, iclass 11, count 0 2006.229.03:17:06.53#ibcon#about to read 3, iclass 11, count 0 2006.229.03:17:06.57#ibcon#read 3, iclass 11, count 0 2006.229.03:17:06.57#ibcon#about to read 4, iclass 11, count 0 2006.229.03:17:06.57#ibcon#read 4, iclass 11, count 0 2006.229.03:17:06.57#ibcon#about to read 5, iclass 11, count 0 2006.229.03:17:06.57#ibcon#read 5, iclass 11, count 0 2006.229.03:17:06.57#ibcon#about to read 6, iclass 11, count 0 2006.229.03:17:06.57#ibcon#read 6, iclass 11, count 0 2006.229.03:17:06.57#ibcon#end of sib2, iclass 11, count 0 2006.229.03:17:06.57#ibcon#*after write, iclass 11, count 0 2006.229.03:17:06.57#ibcon#*before return 0, iclass 11, count 0 2006.229.03:17:06.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:06.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:17:06.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:17:06.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:17:06.57$vck44/vb=6,4 2006.229.03:17:06.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.03:17:06.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.03:17:06.57#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:06.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:06.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:06.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:06.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.03:17:06.63#ibcon#first serial, iclass 13, count 2 2006.229.03:17:06.63#ibcon#enter sib2, iclass 13, count 2 2006.229.03:17:06.63#ibcon#flushed, iclass 13, count 2 2006.229.03:17:06.63#ibcon#about to write, iclass 13, count 2 2006.229.03:17:06.63#ibcon#wrote, iclass 13, count 2 2006.229.03:17:06.63#ibcon#about to read 3, iclass 13, count 2 2006.229.03:17:06.65#ibcon#read 3, iclass 13, count 2 2006.229.03:17:06.65#ibcon#about to read 4, iclass 13, count 2 2006.229.03:17:06.65#ibcon#read 4, iclass 13, count 2 2006.229.03:17:06.65#ibcon#about to read 5, iclass 13, count 2 2006.229.03:17:06.65#ibcon#read 5, iclass 13, count 2 2006.229.03:17:06.65#ibcon#about to read 6, iclass 13, count 2 2006.229.03:17:06.65#ibcon#read 6, iclass 13, count 2 2006.229.03:17:06.65#ibcon#end of sib2, iclass 13, count 2 2006.229.03:17:06.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.03:17:06.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.03:17:06.65#ibcon#[27=AT06-04\r\n] 2006.229.03:17:06.65#ibcon#*before write, iclass 13, count 2 2006.229.03:17:06.65#ibcon#enter sib2, iclass 13, count 2 2006.229.03:17:06.65#ibcon#flushed, iclass 13, count 2 2006.229.03:17:06.65#ibcon#about to write, iclass 13, count 2 2006.229.03:17:06.65#ibcon#wrote, iclass 13, count 2 2006.229.03:17:06.65#ibcon#about to read 3, iclass 13, count 2 2006.229.03:17:06.68#ibcon#read 3, iclass 13, count 2 2006.229.03:17:06.68#ibcon#about to read 4, iclass 13, count 2 2006.229.03:17:06.68#ibcon#read 4, iclass 13, count 2 2006.229.03:17:06.68#ibcon#about to read 5, iclass 13, count 2 2006.229.03:17:06.68#ibcon#read 5, iclass 13, count 2 2006.229.03:17:06.68#ibcon#about to read 6, iclass 13, count 2 2006.229.03:17:06.68#ibcon#read 6, iclass 13, count 2 2006.229.03:17:06.68#ibcon#end of sib2, iclass 13, count 2 2006.229.03:17:06.68#ibcon#*after write, iclass 13, count 2 2006.229.03:17:06.68#ibcon#*before return 0, iclass 13, count 2 2006.229.03:17:06.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:06.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:17:06.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.03:17:06.68#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:06.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:06.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:06.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:06.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:17:06.80#ibcon#first serial, iclass 13, count 0 2006.229.03:17:06.80#ibcon#enter sib2, iclass 13, count 0 2006.229.03:17:06.80#ibcon#flushed, iclass 13, count 0 2006.229.03:17:06.80#ibcon#about to write, iclass 13, count 0 2006.229.03:17:06.80#ibcon#wrote, iclass 13, count 0 2006.229.03:17:06.80#ibcon#about to read 3, iclass 13, count 0 2006.229.03:17:06.82#ibcon#read 3, iclass 13, count 0 2006.229.03:17:06.82#ibcon#about to read 4, iclass 13, count 0 2006.229.03:17:06.82#ibcon#read 4, iclass 13, count 0 2006.229.03:17:06.82#ibcon#about to read 5, iclass 13, count 0 2006.229.03:17:06.82#ibcon#read 5, iclass 13, count 0 2006.229.03:17:06.82#ibcon#about to read 6, iclass 13, count 0 2006.229.03:17:06.82#ibcon#read 6, iclass 13, count 0 2006.229.03:17:06.82#ibcon#end of sib2, iclass 13, count 0 2006.229.03:17:06.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:17:06.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:17:06.82#ibcon#[27=USB\r\n] 2006.229.03:17:06.82#ibcon#*before write, iclass 13, count 0 2006.229.03:17:06.82#ibcon#enter sib2, iclass 13, count 0 2006.229.03:17:06.82#ibcon#flushed, iclass 13, count 0 2006.229.03:17:06.82#ibcon#about to write, iclass 13, count 0 2006.229.03:17:06.82#ibcon#wrote, iclass 13, count 0 2006.229.03:17:06.82#ibcon#about to read 3, iclass 13, count 0 2006.229.03:17:06.85#ibcon#read 3, iclass 13, count 0 2006.229.03:17:06.85#ibcon#about to read 4, iclass 13, count 0 2006.229.03:17:06.85#ibcon#read 4, iclass 13, count 0 2006.229.03:17:06.85#ibcon#about to read 5, iclass 13, count 0 2006.229.03:17:06.85#ibcon#read 5, iclass 13, count 0 2006.229.03:17:06.85#ibcon#about to read 6, iclass 13, count 0 2006.229.03:17:06.85#ibcon#read 6, iclass 13, count 0 2006.229.03:17:06.85#ibcon#end of sib2, iclass 13, count 0 2006.229.03:17:06.85#ibcon#*after write, iclass 13, count 0 2006.229.03:17:06.85#ibcon#*before return 0, iclass 13, count 0 2006.229.03:17:06.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:06.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:17:06.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:17:06.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:17:06.85$vck44/vblo=7,734.99 2006.229.03:17:06.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.03:17:06.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.03:17:06.85#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:06.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:06.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:06.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:06.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:17:06.85#ibcon#first serial, iclass 15, count 0 2006.229.03:17:06.85#ibcon#enter sib2, iclass 15, count 0 2006.229.03:17:06.85#ibcon#flushed, iclass 15, count 0 2006.229.03:17:06.85#ibcon#about to write, iclass 15, count 0 2006.229.03:17:06.85#ibcon#wrote, iclass 15, count 0 2006.229.03:17:06.85#ibcon#about to read 3, iclass 15, count 0 2006.229.03:17:06.87#ibcon#read 3, iclass 15, count 0 2006.229.03:17:06.87#ibcon#about to read 4, iclass 15, count 0 2006.229.03:17:06.87#ibcon#read 4, iclass 15, count 0 2006.229.03:17:06.87#ibcon#about to read 5, iclass 15, count 0 2006.229.03:17:06.87#ibcon#read 5, iclass 15, count 0 2006.229.03:17:06.87#ibcon#about to read 6, iclass 15, count 0 2006.229.03:17:06.87#ibcon#read 6, iclass 15, count 0 2006.229.03:17:06.87#ibcon#end of sib2, iclass 15, count 0 2006.229.03:17:06.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:17:06.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:17:06.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:17:06.87#ibcon#*before write, iclass 15, count 0 2006.229.03:17:06.87#ibcon#enter sib2, iclass 15, count 0 2006.229.03:17:06.87#ibcon#flushed, iclass 15, count 0 2006.229.03:17:06.87#ibcon#about to write, iclass 15, count 0 2006.229.03:17:06.87#ibcon#wrote, iclass 15, count 0 2006.229.03:17:06.87#ibcon#about to read 3, iclass 15, count 0 2006.229.03:17:06.91#ibcon#read 3, iclass 15, count 0 2006.229.03:17:06.91#ibcon#about to read 4, iclass 15, count 0 2006.229.03:17:06.91#ibcon#read 4, iclass 15, count 0 2006.229.03:17:06.91#ibcon#about to read 5, iclass 15, count 0 2006.229.03:17:06.91#ibcon#read 5, iclass 15, count 0 2006.229.03:17:06.91#ibcon#about to read 6, iclass 15, count 0 2006.229.03:17:06.91#ibcon#read 6, iclass 15, count 0 2006.229.03:17:06.91#ibcon#end of sib2, iclass 15, count 0 2006.229.03:17:06.91#ibcon#*after write, iclass 15, count 0 2006.229.03:17:06.91#ibcon#*before return 0, iclass 15, count 0 2006.229.03:17:06.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:06.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:17:06.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:17:06.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:17:06.91$vck44/vb=7,4 2006.229.03:17:06.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.03:17:06.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.03:17:06.91#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:06.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:06.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:06.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:06.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.03:17:06.97#ibcon#first serial, iclass 17, count 2 2006.229.03:17:06.97#ibcon#enter sib2, iclass 17, count 2 2006.229.03:17:06.97#ibcon#flushed, iclass 17, count 2 2006.229.03:17:06.97#ibcon#about to write, iclass 17, count 2 2006.229.03:17:06.97#ibcon#wrote, iclass 17, count 2 2006.229.03:17:06.97#ibcon#about to read 3, iclass 17, count 2 2006.229.03:17:06.99#ibcon#read 3, iclass 17, count 2 2006.229.03:17:06.99#ibcon#about to read 4, iclass 17, count 2 2006.229.03:17:06.99#ibcon#read 4, iclass 17, count 2 2006.229.03:17:06.99#ibcon#about to read 5, iclass 17, count 2 2006.229.03:17:06.99#ibcon#read 5, iclass 17, count 2 2006.229.03:17:06.99#ibcon#about to read 6, iclass 17, count 2 2006.229.03:17:06.99#ibcon#read 6, iclass 17, count 2 2006.229.03:17:06.99#ibcon#end of sib2, iclass 17, count 2 2006.229.03:17:06.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.03:17:06.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.03:17:06.99#ibcon#[27=AT07-04\r\n] 2006.229.03:17:06.99#ibcon#*before write, iclass 17, count 2 2006.229.03:17:06.99#ibcon#enter sib2, iclass 17, count 2 2006.229.03:17:06.99#ibcon#flushed, iclass 17, count 2 2006.229.03:17:06.99#ibcon#about to write, iclass 17, count 2 2006.229.03:17:06.99#ibcon#wrote, iclass 17, count 2 2006.229.03:17:06.99#ibcon#about to read 3, iclass 17, count 2 2006.229.03:17:07.02#ibcon#read 3, iclass 17, count 2 2006.229.03:17:07.02#ibcon#about to read 4, iclass 17, count 2 2006.229.03:17:07.02#ibcon#read 4, iclass 17, count 2 2006.229.03:17:07.02#ibcon#about to read 5, iclass 17, count 2 2006.229.03:17:07.02#ibcon#read 5, iclass 17, count 2 2006.229.03:17:07.02#ibcon#about to read 6, iclass 17, count 2 2006.229.03:17:07.02#ibcon#read 6, iclass 17, count 2 2006.229.03:17:07.02#ibcon#end of sib2, iclass 17, count 2 2006.229.03:17:07.02#ibcon#*after write, iclass 17, count 2 2006.229.03:17:07.02#ibcon#*before return 0, iclass 17, count 2 2006.229.03:17:07.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:07.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:17:07.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.03:17:07.02#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:07.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:07.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:07.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:07.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:17:07.14#ibcon#first serial, iclass 17, count 0 2006.229.03:17:07.14#ibcon#enter sib2, iclass 17, count 0 2006.229.03:17:07.14#ibcon#flushed, iclass 17, count 0 2006.229.03:17:07.14#ibcon#about to write, iclass 17, count 0 2006.229.03:17:07.15#ibcon#wrote, iclass 17, count 0 2006.229.03:17:07.15#ibcon#about to read 3, iclass 17, count 0 2006.229.03:17:07.16#ibcon#read 3, iclass 17, count 0 2006.229.03:17:07.16#ibcon#about to read 4, iclass 17, count 0 2006.229.03:17:07.16#ibcon#read 4, iclass 17, count 0 2006.229.03:17:07.16#ibcon#about to read 5, iclass 17, count 0 2006.229.03:17:07.16#ibcon#read 5, iclass 17, count 0 2006.229.03:17:07.16#ibcon#about to read 6, iclass 17, count 0 2006.229.03:17:07.16#ibcon#read 6, iclass 17, count 0 2006.229.03:17:07.16#ibcon#end of sib2, iclass 17, count 0 2006.229.03:17:07.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:17:07.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:17:07.16#ibcon#[27=USB\r\n] 2006.229.03:17:07.16#ibcon#*before write, iclass 17, count 0 2006.229.03:17:07.16#ibcon#enter sib2, iclass 17, count 0 2006.229.03:17:07.16#ibcon#flushed, iclass 17, count 0 2006.229.03:17:07.16#ibcon#about to write, iclass 17, count 0 2006.229.03:17:07.16#ibcon#wrote, iclass 17, count 0 2006.229.03:17:07.16#ibcon#about to read 3, iclass 17, count 0 2006.229.03:17:07.19#ibcon#read 3, iclass 17, count 0 2006.229.03:17:07.19#ibcon#about to read 4, iclass 17, count 0 2006.229.03:17:07.19#ibcon#read 4, iclass 17, count 0 2006.229.03:17:07.19#ibcon#about to read 5, iclass 17, count 0 2006.229.03:17:07.19#ibcon#read 5, iclass 17, count 0 2006.229.03:17:07.19#ibcon#about to read 6, iclass 17, count 0 2006.229.03:17:07.19#ibcon#read 6, iclass 17, count 0 2006.229.03:17:07.19#ibcon#end of sib2, iclass 17, count 0 2006.229.03:17:07.19#ibcon#*after write, iclass 17, count 0 2006.229.03:17:07.19#ibcon#*before return 0, iclass 17, count 0 2006.229.03:17:07.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:07.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:17:07.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:17:07.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:17:07.19$vck44/vblo=8,744.99 2006.229.03:17:07.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.03:17:07.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.03:17:07.19#ibcon#ireg 17 cls_cnt 0 2006.229.03:17:07.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:07.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:07.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:07.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:17:07.19#ibcon#first serial, iclass 19, count 0 2006.229.03:17:07.19#ibcon#enter sib2, iclass 19, count 0 2006.229.03:17:07.19#ibcon#flushed, iclass 19, count 0 2006.229.03:17:07.19#ibcon#about to write, iclass 19, count 0 2006.229.03:17:07.19#ibcon#wrote, iclass 19, count 0 2006.229.03:17:07.19#ibcon#about to read 3, iclass 19, count 0 2006.229.03:17:07.21#ibcon#read 3, iclass 19, count 0 2006.229.03:17:07.21#ibcon#about to read 4, iclass 19, count 0 2006.229.03:17:07.21#ibcon#read 4, iclass 19, count 0 2006.229.03:17:07.21#ibcon#about to read 5, iclass 19, count 0 2006.229.03:17:07.21#ibcon#read 5, iclass 19, count 0 2006.229.03:17:07.21#ibcon#about to read 6, iclass 19, count 0 2006.229.03:17:07.21#ibcon#read 6, iclass 19, count 0 2006.229.03:17:07.21#ibcon#end of sib2, iclass 19, count 0 2006.229.03:17:07.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:17:07.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:17:07.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:17:07.21#ibcon#*before write, iclass 19, count 0 2006.229.03:17:07.21#ibcon#enter sib2, iclass 19, count 0 2006.229.03:17:07.21#ibcon#flushed, iclass 19, count 0 2006.229.03:17:07.21#ibcon#about to write, iclass 19, count 0 2006.229.03:17:07.21#ibcon#wrote, iclass 19, count 0 2006.229.03:17:07.21#ibcon#about to read 3, iclass 19, count 0 2006.229.03:17:07.25#ibcon#read 3, iclass 19, count 0 2006.229.03:17:07.25#ibcon#about to read 4, iclass 19, count 0 2006.229.03:17:07.25#ibcon#read 4, iclass 19, count 0 2006.229.03:17:07.25#ibcon#about to read 5, iclass 19, count 0 2006.229.03:17:07.25#ibcon#read 5, iclass 19, count 0 2006.229.03:17:07.25#ibcon#about to read 6, iclass 19, count 0 2006.229.03:17:07.25#ibcon#read 6, iclass 19, count 0 2006.229.03:17:07.25#ibcon#end of sib2, iclass 19, count 0 2006.229.03:17:07.25#ibcon#*after write, iclass 19, count 0 2006.229.03:17:07.25#ibcon#*before return 0, iclass 19, count 0 2006.229.03:17:07.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:07.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:17:07.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:17:07.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:17:07.25$vck44/vb=8,4 2006.229.03:17:07.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.03:17:07.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.03:17:07.25#ibcon#ireg 11 cls_cnt 2 2006.229.03:17:07.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:07.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:07.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:07.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.03:17:07.31#ibcon#first serial, iclass 21, count 2 2006.229.03:17:07.31#ibcon#enter sib2, iclass 21, count 2 2006.229.03:17:07.31#ibcon#flushed, iclass 21, count 2 2006.229.03:17:07.31#ibcon#about to write, iclass 21, count 2 2006.229.03:17:07.31#ibcon#wrote, iclass 21, count 2 2006.229.03:17:07.31#ibcon#about to read 3, iclass 21, count 2 2006.229.03:17:07.33#ibcon#read 3, iclass 21, count 2 2006.229.03:17:07.33#ibcon#about to read 4, iclass 21, count 2 2006.229.03:17:07.33#ibcon#read 4, iclass 21, count 2 2006.229.03:17:07.33#ibcon#about to read 5, iclass 21, count 2 2006.229.03:17:07.33#ibcon#read 5, iclass 21, count 2 2006.229.03:17:07.33#ibcon#about to read 6, iclass 21, count 2 2006.229.03:17:07.33#ibcon#read 6, iclass 21, count 2 2006.229.03:17:07.33#ibcon#end of sib2, iclass 21, count 2 2006.229.03:17:07.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.03:17:07.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.03:17:07.33#ibcon#[27=AT08-04\r\n] 2006.229.03:17:07.33#ibcon#*before write, iclass 21, count 2 2006.229.03:17:07.33#ibcon#enter sib2, iclass 21, count 2 2006.229.03:17:07.33#ibcon#flushed, iclass 21, count 2 2006.229.03:17:07.33#ibcon#about to write, iclass 21, count 2 2006.229.03:17:07.33#ibcon#wrote, iclass 21, count 2 2006.229.03:17:07.33#ibcon#about to read 3, iclass 21, count 2 2006.229.03:17:07.36#ibcon#read 3, iclass 21, count 2 2006.229.03:17:07.36#ibcon#about to read 4, iclass 21, count 2 2006.229.03:17:07.36#ibcon#read 4, iclass 21, count 2 2006.229.03:17:07.36#ibcon#about to read 5, iclass 21, count 2 2006.229.03:17:07.36#ibcon#read 5, iclass 21, count 2 2006.229.03:17:07.36#ibcon#about to read 6, iclass 21, count 2 2006.229.03:17:07.36#ibcon#read 6, iclass 21, count 2 2006.229.03:17:07.36#ibcon#end of sib2, iclass 21, count 2 2006.229.03:17:07.36#ibcon#*after write, iclass 21, count 2 2006.229.03:17:07.36#ibcon#*before return 0, iclass 21, count 2 2006.229.03:17:07.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:07.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:17:07.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.03:17:07.36#ibcon#ireg 7 cls_cnt 0 2006.229.03:17:07.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:07.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:07.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:07.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:17:07.48#ibcon#first serial, iclass 21, count 0 2006.229.03:17:07.48#ibcon#enter sib2, iclass 21, count 0 2006.229.03:17:07.48#ibcon#flushed, iclass 21, count 0 2006.229.03:17:07.48#ibcon#about to write, iclass 21, count 0 2006.229.03:17:07.48#ibcon#wrote, iclass 21, count 0 2006.229.03:17:07.48#ibcon#about to read 3, iclass 21, count 0 2006.229.03:17:07.50#ibcon#read 3, iclass 21, count 0 2006.229.03:17:07.50#ibcon#about to read 4, iclass 21, count 0 2006.229.03:17:07.50#ibcon#read 4, iclass 21, count 0 2006.229.03:17:07.50#ibcon#about to read 5, iclass 21, count 0 2006.229.03:17:07.50#ibcon#read 5, iclass 21, count 0 2006.229.03:17:07.50#ibcon#about to read 6, iclass 21, count 0 2006.229.03:17:07.50#ibcon#read 6, iclass 21, count 0 2006.229.03:17:07.50#ibcon#end of sib2, iclass 21, count 0 2006.229.03:17:07.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:17:07.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:17:07.50#ibcon#[27=USB\r\n] 2006.229.03:17:07.50#ibcon#*before write, iclass 21, count 0 2006.229.03:17:07.50#ibcon#enter sib2, iclass 21, count 0 2006.229.03:17:07.50#ibcon#flushed, iclass 21, count 0 2006.229.03:17:07.50#ibcon#about to write, iclass 21, count 0 2006.229.03:17:07.50#ibcon#wrote, iclass 21, count 0 2006.229.03:17:07.50#ibcon#about to read 3, iclass 21, count 0 2006.229.03:17:07.53#ibcon#read 3, iclass 21, count 0 2006.229.03:17:07.53#ibcon#about to read 4, iclass 21, count 0 2006.229.03:17:07.53#ibcon#read 4, iclass 21, count 0 2006.229.03:17:07.53#ibcon#about to read 5, iclass 21, count 0 2006.229.03:17:07.53#ibcon#read 5, iclass 21, count 0 2006.229.03:17:07.53#ibcon#about to read 6, iclass 21, count 0 2006.229.03:17:07.53#ibcon#read 6, iclass 21, count 0 2006.229.03:17:07.53#ibcon#end of sib2, iclass 21, count 0 2006.229.03:17:07.53#ibcon#*after write, iclass 21, count 0 2006.229.03:17:07.53#ibcon#*before return 0, iclass 21, count 0 2006.229.03:17:07.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:07.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:17:07.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:17:07.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:17:07.53$vck44/vabw=wide 2006.229.03:17:07.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.03:17:07.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.03:17:07.53#ibcon#ireg 8 cls_cnt 0 2006.229.03:17:07.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:07.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:07.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:07.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:17:07.53#ibcon#first serial, iclass 23, count 0 2006.229.03:17:07.53#ibcon#enter sib2, iclass 23, count 0 2006.229.03:17:07.53#ibcon#flushed, iclass 23, count 0 2006.229.03:17:07.53#ibcon#about to write, iclass 23, count 0 2006.229.03:17:07.53#ibcon#wrote, iclass 23, count 0 2006.229.03:17:07.53#ibcon#about to read 3, iclass 23, count 0 2006.229.03:17:07.55#ibcon#read 3, iclass 23, count 0 2006.229.03:17:07.55#ibcon#about to read 4, iclass 23, count 0 2006.229.03:17:07.55#ibcon#read 4, iclass 23, count 0 2006.229.03:17:07.55#ibcon#about to read 5, iclass 23, count 0 2006.229.03:17:07.55#ibcon#read 5, iclass 23, count 0 2006.229.03:17:07.55#ibcon#about to read 6, iclass 23, count 0 2006.229.03:17:07.55#ibcon#read 6, iclass 23, count 0 2006.229.03:17:07.55#ibcon#end of sib2, iclass 23, count 0 2006.229.03:17:07.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:17:07.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:17:07.55#ibcon#[25=BW32\r\n] 2006.229.03:17:07.55#ibcon#*before write, iclass 23, count 0 2006.229.03:17:07.55#ibcon#enter sib2, iclass 23, count 0 2006.229.03:17:07.55#ibcon#flushed, iclass 23, count 0 2006.229.03:17:07.55#ibcon#about to write, iclass 23, count 0 2006.229.03:17:07.55#ibcon#wrote, iclass 23, count 0 2006.229.03:17:07.55#ibcon#about to read 3, iclass 23, count 0 2006.229.03:17:07.58#ibcon#read 3, iclass 23, count 0 2006.229.03:17:07.58#ibcon#about to read 4, iclass 23, count 0 2006.229.03:17:07.58#ibcon#read 4, iclass 23, count 0 2006.229.03:17:07.58#ibcon#about to read 5, iclass 23, count 0 2006.229.03:17:07.58#ibcon#read 5, iclass 23, count 0 2006.229.03:17:07.58#ibcon#about to read 6, iclass 23, count 0 2006.229.03:17:07.58#ibcon#read 6, iclass 23, count 0 2006.229.03:17:07.58#ibcon#end of sib2, iclass 23, count 0 2006.229.03:17:07.58#ibcon#*after write, iclass 23, count 0 2006.229.03:17:07.58#ibcon#*before return 0, iclass 23, count 0 2006.229.03:17:07.58#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:07.58#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:17:07.58#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:17:07.58#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:17:07.58$vck44/vbbw=wide 2006.229.03:17:07.58#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.03:17:07.58#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.03:17:07.58#ibcon#ireg 8 cls_cnt 0 2006.229.03:17:07.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:17:07.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:17:07.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:17:07.65#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:17:07.65#ibcon#first serial, iclass 25, count 0 2006.229.03:17:07.65#ibcon#enter sib2, iclass 25, count 0 2006.229.03:17:07.65#ibcon#flushed, iclass 25, count 0 2006.229.03:17:07.65#ibcon#about to write, iclass 25, count 0 2006.229.03:17:07.65#ibcon#wrote, iclass 25, count 0 2006.229.03:17:07.65#ibcon#about to read 3, iclass 25, count 0 2006.229.03:17:07.67#ibcon#read 3, iclass 25, count 0 2006.229.03:17:07.67#ibcon#about to read 4, iclass 25, count 0 2006.229.03:17:07.67#ibcon#read 4, iclass 25, count 0 2006.229.03:17:07.67#ibcon#about to read 5, iclass 25, count 0 2006.229.03:17:07.67#ibcon#read 5, iclass 25, count 0 2006.229.03:17:07.67#ibcon#about to read 6, iclass 25, count 0 2006.229.03:17:07.67#ibcon#read 6, iclass 25, count 0 2006.229.03:17:07.67#ibcon#end of sib2, iclass 25, count 0 2006.229.03:17:07.67#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:17:07.67#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:17:07.67#ibcon#[27=BW32\r\n] 2006.229.03:17:07.67#ibcon#*before write, iclass 25, count 0 2006.229.03:17:07.67#ibcon#enter sib2, iclass 25, count 0 2006.229.03:17:07.67#ibcon#flushed, iclass 25, count 0 2006.229.03:17:07.67#ibcon#about to write, iclass 25, count 0 2006.229.03:17:07.67#ibcon#wrote, iclass 25, count 0 2006.229.03:17:07.67#ibcon#about to read 3, iclass 25, count 0 2006.229.03:17:07.70#ibcon#read 3, iclass 25, count 0 2006.229.03:17:07.70#ibcon#about to read 4, iclass 25, count 0 2006.229.03:17:07.70#ibcon#read 4, iclass 25, count 0 2006.229.03:17:07.70#ibcon#about to read 5, iclass 25, count 0 2006.229.03:17:07.70#ibcon#read 5, iclass 25, count 0 2006.229.03:17:07.70#ibcon#about to read 6, iclass 25, count 0 2006.229.03:17:07.70#ibcon#read 6, iclass 25, count 0 2006.229.03:17:07.70#ibcon#end of sib2, iclass 25, count 0 2006.229.03:17:07.70#ibcon#*after write, iclass 25, count 0 2006.229.03:17:07.70#ibcon#*before return 0, iclass 25, count 0 2006.229.03:17:07.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:17:07.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:17:07.70#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:17:07.70#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:17:07.70$setupk4/ifdk4 2006.229.03:17:07.70$ifdk4/lo= 2006.229.03:17:07.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:17:07.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:17:07.71$ifdk4/patch= 2006.229.03:17:07.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:17:07.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:17:07.71$setupk4/!*+20s 2006.229.03:17:08.95#abcon#<5=/04 1.8 3.8 28.691001000.7\r\n> 2006.229.03:17:08.97#abcon#{5=INTERFACE CLEAR} 2006.229.03:17:09.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:17:19.12#abcon#<5=/04 1.8 3.8 28.701001000.7\r\n> 2006.229.03:17:19.14#abcon#{5=INTERFACE CLEAR} 2006.229.03:17:19.20#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:17:22.22$setupk4/"tpicd 2006.229.03:17:22.22$setupk4/echo=off 2006.229.03:17:22.22$setupk4/xlog=off 2006.229.03:17:22.22:!2006.229.03:18:05 2006.229.03:17:25.14#trakl#Source acquired 2006.229.03:17:25.14#flagr#flagr/antenna,acquired 2006.229.03:18:05.00:preob 2006.229.03:18:05.13/onsource/TRACKING 2006.229.03:18:05.13:!2006.229.03:18:15 2006.229.03:18:15.00:"tape 2006.229.03:18:15.00:"st=record 2006.229.03:18:15.00:data_valid=on 2006.229.03:18:15.00:midob 2006.229.03:18:16.13/onsource/TRACKING 2006.229.03:18:16.14/wx/28.73,1000.6,100 2006.229.03:18:16.24/cable/+6.4102E-03 2006.229.03:18:17.33/va/01,08,usb,yes,30,33 2006.229.03:18:17.33/va/02,07,usb,yes,33,33 2006.229.03:18:17.33/va/03,06,usb,yes,41,43 2006.229.03:18:17.33/va/04,07,usb,yes,34,36 2006.229.03:18:17.33/va/05,04,usb,yes,30,31 2006.229.03:18:17.33/va/06,04,usb,yes,34,34 2006.229.03:18:17.33/va/07,05,usb,yes,30,31 2006.229.03:18:17.33/va/08,06,usb,yes,22,27 2006.229.03:18:17.56/valo/01,524.99,yes,locked 2006.229.03:18:17.56/valo/02,534.99,yes,locked 2006.229.03:18:17.56/valo/03,564.99,yes,locked 2006.229.03:18:17.56/valo/04,624.99,yes,locked 2006.229.03:18:17.56/valo/05,734.99,yes,locked 2006.229.03:18:17.56/valo/06,814.99,yes,locked 2006.229.03:18:17.56/valo/07,864.99,yes,locked 2006.229.03:18:17.56/valo/08,884.99,yes,locked 2006.229.03:18:18.65/vb/01,04,usb,yes,32,29 2006.229.03:18:18.65/vb/02,04,usb,yes,34,34 2006.229.03:18:18.65/vb/03,04,usb,yes,31,34 2006.229.03:18:18.65/vb/04,04,usb,yes,35,34 2006.229.03:18:18.65/vb/05,04,usb,yes,27,30 2006.229.03:18:18.65/vb/06,04,usb,yes,32,28 2006.229.03:18:18.65/vb/07,04,usb,yes,32,32 2006.229.03:18:18.65/vb/08,04,usb,yes,29,33 2006.229.03:18:18.88/vblo/01,629.99,yes,locked 2006.229.03:18:18.88/vblo/02,634.99,yes,locked 2006.229.03:18:18.88/vblo/03,649.99,yes,locked 2006.229.03:18:18.88/vblo/04,679.99,yes,locked 2006.229.03:18:18.88/vblo/05,709.99,yes,locked 2006.229.03:18:18.88/vblo/06,719.99,yes,locked 2006.229.03:18:18.88/vblo/07,734.99,yes,locked 2006.229.03:18:18.88/vblo/08,744.99,yes,locked 2006.229.03:18:19.03/vabw/8 2006.229.03:18:19.18/vbbw/8 2006.229.03:18:19.27/xfe/off,on,12.0 2006.229.03:18:19.65/ifatt/23,28,28,28 2006.229.03:18:20.07/fmout-gps/S +4.46E-07 2006.229.03:18:20.12:!2006.229.03:19:25 2006.229.03:19:25.01:data_valid=off 2006.229.03:19:25.02:"et 2006.229.03:19:25.02:!+3s 2006.229.03:19:28.03:"tape 2006.229.03:19:28.04:postob 2006.229.03:19:28.13/cable/+6.4115E-03 2006.229.03:19:28.14/wx/28.77,1000.6,100 2006.229.03:19:28.19/fmout-gps/S +4.45E-07 2006.229.03:19:28.20:scan_name=229-0322,jd0608,110 2006.229.03:19:28.20:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.03:19:30.13#flagr#flagr/antenna,new-source 2006.229.03:19:30.14:checkk5 2006.229.03:19:30.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:19:30.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:19:31.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:19:31.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:19:32.14/chk_obsdata//k5ts1/T2290318??a.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.03:19:32.55/chk_obsdata//k5ts2/T2290318??b.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.03:19:32.96/chk_obsdata//k5ts3/T2290318??c.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.03:19:33.35/chk_obsdata//k5ts4/T2290318??d.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.03:19:34.07/k5log//k5ts1_log_newline 2006.229.03:19:34.78/k5log//k5ts2_log_newline 2006.229.03:19:35.50/k5log//k5ts3_log_newline 2006.229.03:19:36.22/k5log//k5ts4_log_newline 2006.229.03:19:36.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:19:36.24:setupk4=1 2006.229.03:19:36.24$setupk4/echo=on 2006.229.03:19:36.24$setupk4/pcalon 2006.229.03:19:36.24$pcalon/"no phase cal control is implemented here 2006.229.03:19:36.24$setupk4/"tpicd=stop 2006.229.03:19:36.24$setupk4/"rec=synch_on 2006.229.03:19:36.24$setupk4/"rec_mode=128 2006.229.03:19:36.24$setupk4/!* 2006.229.03:19:36.24$setupk4/recpk4 2006.229.03:19:36.24$recpk4/recpatch= 2006.229.03:19:36.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:19:36.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:19:36.25$setupk4/vck44 2006.229.03:19:36.25$vck44/valo=1,524.99 2006.229.03:19:36.25#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.03:19:36.25#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.03:19:36.25#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:36.25#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:36.25#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:36.25#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:36.25#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:19:36.25#ibcon#first serial, iclass 18, count 0 2006.229.03:19:36.25#ibcon#enter sib2, iclass 18, count 0 2006.229.03:19:36.25#ibcon#flushed, iclass 18, count 0 2006.229.03:19:36.25#ibcon#about to write, iclass 18, count 0 2006.229.03:19:36.25#ibcon#wrote, iclass 18, count 0 2006.229.03:19:36.25#ibcon#about to read 3, iclass 18, count 0 2006.229.03:19:36.26#ibcon#read 3, iclass 18, count 0 2006.229.03:19:36.26#ibcon#about to read 4, iclass 18, count 0 2006.229.03:19:36.26#ibcon#read 4, iclass 18, count 0 2006.229.03:19:36.26#ibcon#about to read 5, iclass 18, count 0 2006.229.03:19:36.26#ibcon#read 5, iclass 18, count 0 2006.229.03:19:36.26#ibcon#about to read 6, iclass 18, count 0 2006.229.03:19:36.26#ibcon#read 6, iclass 18, count 0 2006.229.03:19:36.26#ibcon#end of sib2, iclass 18, count 0 2006.229.03:19:36.26#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:19:36.26#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:19:36.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:19:36.26#ibcon#*before write, iclass 18, count 0 2006.229.03:19:36.26#ibcon#enter sib2, iclass 18, count 0 2006.229.03:19:36.26#ibcon#flushed, iclass 18, count 0 2006.229.03:19:36.26#ibcon#about to write, iclass 18, count 0 2006.229.03:19:36.26#ibcon#wrote, iclass 18, count 0 2006.229.03:19:36.26#ibcon#about to read 3, iclass 18, count 0 2006.229.03:19:36.31#ibcon#read 3, iclass 18, count 0 2006.229.03:19:36.31#ibcon#about to read 4, iclass 18, count 0 2006.229.03:19:36.31#ibcon#read 4, iclass 18, count 0 2006.229.03:19:36.31#ibcon#about to read 5, iclass 18, count 0 2006.229.03:19:36.31#ibcon#read 5, iclass 18, count 0 2006.229.03:19:36.31#ibcon#about to read 6, iclass 18, count 0 2006.229.03:19:36.31#ibcon#read 6, iclass 18, count 0 2006.229.03:19:36.31#ibcon#end of sib2, iclass 18, count 0 2006.229.03:19:36.31#ibcon#*after write, iclass 18, count 0 2006.229.03:19:36.31#ibcon#*before return 0, iclass 18, count 0 2006.229.03:19:36.31#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:36.31#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:36.31#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:19:36.31#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:19:36.31$vck44/va=1,8 2006.229.03:19:36.31#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.03:19:36.31#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.03:19:36.31#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:36.31#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:36.31#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:36.31#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:36.31#ibcon#enter wrdev, iclass 20, count 2 2006.229.03:19:36.31#ibcon#first serial, iclass 20, count 2 2006.229.03:19:36.31#ibcon#enter sib2, iclass 20, count 2 2006.229.03:19:36.31#ibcon#flushed, iclass 20, count 2 2006.229.03:19:36.31#ibcon#about to write, iclass 20, count 2 2006.229.03:19:36.31#ibcon#wrote, iclass 20, count 2 2006.229.03:19:36.31#ibcon#about to read 3, iclass 20, count 2 2006.229.03:19:36.33#ibcon#read 3, iclass 20, count 2 2006.229.03:19:36.33#ibcon#about to read 4, iclass 20, count 2 2006.229.03:19:36.33#ibcon#read 4, iclass 20, count 2 2006.229.03:19:36.33#ibcon#about to read 5, iclass 20, count 2 2006.229.03:19:36.33#ibcon#read 5, iclass 20, count 2 2006.229.03:19:36.33#ibcon#about to read 6, iclass 20, count 2 2006.229.03:19:36.33#ibcon#read 6, iclass 20, count 2 2006.229.03:19:36.33#ibcon#end of sib2, iclass 20, count 2 2006.229.03:19:36.33#ibcon#*mode == 0, iclass 20, count 2 2006.229.03:19:36.33#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.03:19:36.33#ibcon#[25=AT01-08\r\n] 2006.229.03:19:36.33#ibcon#*before write, iclass 20, count 2 2006.229.03:19:36.33#ibcon#enter sib2, iclass 20, count 2 2006.229.03:19:36.33#ibcon#flushed, iclass 20, count 2 2006.229.03:19:36.33#ibcon#about to write, iclass 20, count 2 2006.229.03:19:36.33#ibcon#wrote, iclass 20, count 2 2006.229.03:19:36.33#ibcon#about to read 3, iclass 20, count 2 2006.229.03:19:36.36#ibcon#read 3, iclass 20, count 2 2006.229.03:19:36.36#ibcon#about to read 4, iclass 20, count 2 2006.229.03:19:36.36#ibcon#read 4, iclass 20, count 2 2006.229.03:19:36.36#ibcon#about to read 5, iclass 20, count 2 2006.229.03:19:36.36#ibcon#read 5, iclass 20, count 2 2006.229.03:19:36.36#ibcon#about to read 6, iclass 20, count 2 2006.229.03:19:36.36#ibcon#read 6, iclass 20, count 2 2006.229.03:19:36.36#ibcon#end of sib2, iclass 20, count 2 2006.229.03:19:36.36#ibcon#*after write, iclass 20, count 2 2006.229.03:19:36.36#ibcon#*before return 0, iclass 20, count 2 2006.229.03:19:36.36#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:36.36#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:36.36#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.03:19:36.36#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:36.36#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:36.48#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:36.48#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:36.48#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:19:36.48#ibcon#first serial, iclass 20, count 0 2006.229.03:19:36.48#ibcon#enter sib2, iclass 20, count 0 2006.229.03:19:36.48#ibcon#flushed, iclass 20, count 0 2006.229.03:19:36.48#ibcon#about to write, iclass 20, count 0 2006.229.03:19:36.48#ibcon#wrote, iclass 20, count 0 2006.229.03:19:36.48#ibcon#about to read 3, iclass 20, count 0 2006.229.03:19:36.50#ibcon#read 3, iclass 20, count 0 2006.229.03:19:36.50#ibcon#about to read 4, iclass 20, count 0 2006.229.03:19:36.50#ibcon#read 4, iclass 20, count 0 2006.229.03:19:36.50#ibcon#about to read 5, iclass 20, count 0 2006.229.03:19:36.50#ibcon#read 5, iclass 20, count 0 2006.229.03:19:36.50#ibcon#about to read 6, iclass 20, count 0 2006.229.03:19:36.50#ibcon#read 6, iclass 20, count 0 2006.229.03:19:36.50#ibcon#end of sib2, iclass 20, count 0 2006.229.03:19:36.50#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:19:36.50#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:19:36.50#ibcon#[25=USB\r\n] 2006.229.03:19:36.50#ibcon#*before write, iclass 20, count 0 2006.229.03:19:36.50#ibcon#enter sib2, iclass 20, count 0 2006.229.03:19:36.50#ibcon#flushed, iclass 20, count 0 2006.229.03:19:36.50#ibcon#about to write, iclass 20, count 0 2006.229.03:19:36.50#ibcon#wrote, iclass 20, count 0 2006.229.03:19:36.50#ibcon#about to read 3, iclass 20, count 0 2006.229.03:19:36.53#ibcon#read 3, iclass 20, count 0 2006.229.03:19:36.53#ibcon#about to read 4, iclass 20, count 0 2006.229.03:19:36.53#ibcon#read 4, iclass 20, count 0 2006.229.03:19:36.53#ibcon#about to read 5, iclass 20, count 0 2006.229.03:19:36.53#ibcon#read 5, iclass 20, count 0 2006.229.03:19:36.53#ibcon#about to read 6, iclass 20, count 0 2006.229.03:19:36.53#ibcon#read 6, iclass 20, count 0 2006.229.03:19:36.53#ibcon#end of sib2, iclass 20, count 0 2006.229.03:19:36.53#ibcon#*after write, iclass 20, count 0 2006.229.03:19:36.53#ibcon#*before return 0, iclass 20, count 0 2006.229.03:19:36.53#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:36.53#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:36.53#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:19:36.53#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:19:36.53$vck44/valo=2,534.99 2006.229.03:19:36.53#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.03:19:36.53#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.03:19:36.53#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:36.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:36.53#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:36.53#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:36.53#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:19:36.53#ibcon#first serial, iclass 22, count 0 2006.229.03:19:36.53#ibcon#enter sib2, iclass 22, count 0 2006.229.03:19:36.53#ibcon#flushed, iclass 22, count 0 2006.229.03:19:36.53#ibcon#about to write, iclass 22, count 0 2006.229.03:19:36.53#ibcon#wrote, iclass 22, count 0 2006.229.03:19:36.53#ibcon#about to read 3, iclass 22, count 0 2006.229.03:19:36.55#ibcon#read 3, iclass 22, count 0 2006.229.03:19:36.55#ibcon#about to read 4, iclass 22, count 0 2006.229.03:19:36.55#ibcon#read 4, iclass 22, count 0 2006.229.03:19:36.55#ibcon#about to read 5, iclass 22, count 0 2006.229.03:19:36.55#ibcon#read 5, iclass 22, count 0 2006.229.03:19:36.55#ibcon#about to read 6, iclass 22, count 0 2006.229.03:19:36.55#ibcon#read 6, iclass 22, count 0 2006.229.03:19:36.55#ibcon#end of sib2, iclass 22, count 0 2006.229.03:19:36.55#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:19:36.55#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:19:36.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:19:36.55#ibcon#*before write, iclass 22, count 0 2006.229.03:19:36.55#ibcon#enter sib2, iclass 22, count 0 2006.229.03:19:36.55#ibcon#flushed, iclass 22, count 0 2006.229.03:19:36.55#ibcon#about to write, iclass 22, count 0 2006.229.03:19:36.55#ibcon#wrote, iclass 22, count 0 2006.229.03:19:36.55#ibcon#about to read 3, iclass 22, count 0 2006.229.03:19:36.59#ibcon#read 3, iclass 22, count 0 2006.229.03:19:36.59#ibcon#about to read 4, iclass 22, count 0 2006.229.03:19:36.59#ibcon#read 4, iclass 22, count 0 2006.229.03:19:36.59#ibcon#about to read 5, iclass 22, count 0 2006.229.03:19:36.59#ibcon#read 5, iclass 22, count 0 2006.229.03:19:36.59#ibcon#about to read 6, iclass 22, count 0 2006.229.03:19:36.59#ibcon#read 6, iclass 22, count 0 2006.229.03:19:36.59#ibcon#end of sib2, iclass 22, count 0 2006.229.03:19:36.59#ibcon#*after write, iclass 22, count 0 2006.229.03:19:36.59#ibcon#*before return 0, iclass 22, count 0 2006.229.03:19:36.59#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:36.59#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:36.59#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:19:36.59#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:19:36.59$vck44/va=2,7 2006.229.03:19:36.59#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.03:19:36.59#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.03:19:36.59#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:36.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:36.65#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:36.65#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:36.65#ibcon#enter wrdev, iclass 24, count 2 2006.229.03:19:36.65#ibcon#first serial, iclass 24, count 2 2006.229.03:19:36.65#ibcon#enter sib2, iclass 24, count 2 2006.229.03:19:36.65#ibcon#flushed, iclass 24, count 2 2006.229.03:19:36.65#ibcon#about to write, iclass 24, count 2 2006.229.03:19:36.65#ibcon#wrote, iclass 24, count 2 2006.229.03:19:36.65#ibcon#about to read 3, iclass 24, count 2 2006.229.03:19:36.67#ibcon#read 3, iclass 24, count 2 2006.229.03:19:36.67#ibcon#about to read 4, iclass 24, count 2 2006.229.03:19:36.67#ibcon#read 4, iclass 24, count 2 2006.229.03:19:36.67#ibcon#about to read 5, iclass 24, count 2 2006.229.03:19:36.67#ibcon#read 5, iclass 24, count 2 2006.229.03:19:36.67#ibcon#about to read 6, iclass 24, count 2 2006.229.03:19:36.67#ibcon#read 6, iclass 24, count 2 2006.229.03:19:36.67#ibcon#end of sib2, iclass 24, count 2 2006.229.03:19:36.67#ibcon#*mode == 0, iclass 24, count 2 2006.229.03:19:36.67#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.03:19:36.67#ibcon#[25=AT02-07\r\n] 2006.229.03:19:36.67#ibcon#*before write, iclass 24, count 2 2006.229.03:19:36.67#ibcon#enter sib2, iclass 24, count 2 2006.229.03:19:36.67#ibcon#flushed, iclass 24, count 2 2006.229.03:19:36.67#ibcon#about to write, iclass 24, count 2 2006.229.03:19:36.67#ibcon#wrote, iclass 24, count 2 2006.229.03:19:36.67#ibcon#about to read 3, iclass 24, count 2 2006.229.03:19:36.70#ibcon#read 3, iclass 24, count 2 2006.229.03:19:36.70#ibcon#about to read 4, iclass 24, count 2 2006.229.03:19:36.70#ibcon#read 4, iclass 24, count 2 2006.229.03:19:36.70#ibcon#about to read 5, iclass 24, count 2 2006.229.03:19:36.70#ibcon#read 5, iclass 24, count 2 2006.229.03:19:36.70#ibcon#about to read 6, iclass 24, count 2 2006.229.03:19:36.70#ibcon#read 6, iclass 24, count 2 2006.229.03:19:36.70#ibcon#end of sib2, iclass 24, count 2 2006.229.03:19:36.70#ibcon#*after write, iclass 24, count 2 2006.229.03:19:36.70#ibcon#*before return 0, iclass 24, count 2 2006.229.03:19:36.70#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:36.70#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:36.70#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.03:19:36.70#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:36.70#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:36.82#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:36.82#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:36.82#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:19:36.82#ibcon#first serial, iclass 24, count 0 2006.229.03:19:36.82#ibcon#enter sib2, iclass 24, count 0 2006.229.03:19:36.82#ibcon#flushed, iclass 24, count 0 2006.229.03:19:36.82#ibcon#about to write, iclass 24, count 0 2006.229.03:19:36.82#ibcon#wrote, iclass 24, count 0 2006.229.03:19:36.82#ibcon#about to read 3, iclass 24, count 0 2006.229.03:19:36.84#ibcon#read 3, iclass 24, count 0 2006.229.03:19:36.84#ibcon#about to read 4, iclass 24, count 0 2006.229.03:19:36.84#ibcon#read 4, iclass 24, count 0 2006.229.03:19:36.84#ibcon#about to read 5, iclass 24, count 0 2006.229.03:19:36.84#ibcon#read 5, iclass 24, count 0 2006.229.03:19:36.84#ibcon#about to read 6, iclass 24, count 0 2006.229.03:19:36.84#ibcon#read 6, iclass 24, count 0 2006.229.03:19:36.84#ibcon#end of sib2, iclass 24, count 0 2006.229.03:19:36.84#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:19:36.84#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:19:36.84#ibcon#[25=USB\r\n] 2006.229.03:19:36.84#ibcon#*before write, iclass 24, count 0 2006.229.03:19:36.84#ibcon#enter sib2, iclass 24, count 0 2006.229.03:19:36.84#ibcon#flushed, iclass 24, count 0 2006.229.03:19:36.84#ibcon#about to write, iclass 24, count 0 2006.229.03:19:36.84#ibcon#wrote, iclass 24, count 0 2006.229.03:19:36.84#ibcon#about to read 3, iclass 24, count 0 2006.229.03:19:36.87#ibcon#read 3, iclass 24, count 0 2006.229.03:19:36.87#ibcon#about to read 4, iclass 24, count 0 2006.229.03:19:36.87#ibcon#read 4, iclass 24, count 0 2006.229.03:19:36.87#ibcon#about to read 5, iclass 24, count 0 2006.229.03:19:36.87#ibcon#read 5, iclass 24, count 0 2006.229.03:19:36.87#ibcon#about to read 6, iclass 24, count 0 2006.229.03:19:36.87#ibcon#read 6, iclass 24, count 0 2006.229.03:19:36.87#ibcon#end of sib2, iclass 24, count 0 2006.229.03:19:36.87#ibcon#*after write, iclass 24, count 0 2006.229.03:19:36.87#ibcon#*before return 0, iclass 24, count 0 2006.229.03:19:36.87#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:36.87#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:36.87#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:19:36.87#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:19:36.87$vck44/valo=3,564.99 2006.229.03:19:36.87#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.03:19:36.87#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.03:19:36.87#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:36.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:36.87#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:36.87#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:36.87#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:19:36.87#ibcon#first serial, iclass 26, count 0 2006.229.03:19:36.87#ibcon#enter sib2, iclass 26, count 0 2006.229.03:19:36.87#ibcon#flushed, iclass 26, count 0 2006.229.03:19:36.87#ibcon#about to write, iclass 26, count 0 2006.229.03:19:36.87#ibcon#wrote, iclass 26, count 0 2006.229.03:19:36.87#ibcon#about to read 3, iclass 26, count 0 2006.229.03:19:36.89#ibcon#read 3, iclass 26, count 0 2006.229.03:19:36.89#ibcon#about to read 4, iclass 26, count 0 2006.229.03:19:36.89#ibcon#read 4, iclass 26, count 0 2006.229.03:19:36.89#ibcon#about to read 5, iclass 26, count 0 2006.229.03:19:36.89#ibcon#read 5, iclass 26, count 0 2006.229.03:19:36.89#ibcon#about to read 6, iclass 26, count 0 2006.229.03:19:36.89#ibcon#read 6, iclass 26, count 0 2006.229.03:19:36.89#ibcon#end of sib2, iclass 26, count 0 2006.229.03:19:36.89#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:19:36.89#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:19:36.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:19:36.89#ibcon#*before write, iclass 26, count 0 2006.229.03:19:36.89#ibcon#enter sib2, iclass 26, count 0 2006.229.03:19:36.89#ibcon#flushed, iclass 26, count 0 2006.229.03:19:36.89#ibcon#about to write, iclass 26, count 0 2006.229.03:19:36.89#ibcon#wrote, iclass 26, count 0 2006.229.03:19:36.89#ibcon#about to read 3, iclass 26, count 0 2006.229.03:19:36.93#ibcon#read 3, iclass 26, count 0 2006.229.03:19:36.93#ibcon#about to read 4, iclass 26, count 0 2006.229.03:19:36.93#ibcon#read 4, iclass 26, count 0 2006.229.03:19:36.93#ibcon#about to read 5, iclass 26, count 0 2006.229.03:19:36.93#ibcon#read 5, iclass 26, count 0 2006.229.03:19:36.93#ibcon#about to read 6, iclass 26, count 0 2006.229.03:19:36.93#ibcon#read 6, iclass 26, count 0 2006.229.03:19:36.93#ibcon#end of sib2, iclass 26, count 0 2006.229.03:19:36.93#ibcon#*after write, iclass 26, count 0 2006.229.03:19:36.93#ibcon#*before return 0, iclass 26, count 0 2006.229.03:19:36.93#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:36.93#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:36.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:19:36.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:19:36.93$vck44/va=3,6 2006.229.03:19:36.93#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.03:19:36.93#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.03:19:36.93#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:36.93#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:36.99#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:36.99#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:36.99#ibcon#enter wrdev, iclass 28, count 2 2006.229.03:19:36.99#ibcon#first serial, iclass 28, count 2 2006.229.03:19:36.99#ibcon#enter sib2, iclass 28, count 2 2006.229.03:19:36.99#ibcon#flushed, iclass 28, count 2 2006.229.03:19:36.99#ibcon#about to write, iclass 28, count 2 2006.229.03:19:36.99#ibcon#wrote, iclass 28, count 2 2006.229.03:19:36.99#ibcon#about to read 3, iclass 28, count 2 2006.229.03:19:37.01#ibcon#read 3, iclass 28, count 2 2006.229.03:19:37.01#ibcon#about to read 4, iclass 28, count 2 2006.229.03:19:37.01#ibcon#read 4, iclass 28, count 2 2006.229.03:19:37.01#ibcon#about to read 5, iclass 28, count 2 2006.229.03:19:37.01#ibcon#read 5, iclass 28, count 2 2006.229.03:19:37.01#ibcon#about to read 6, iclass 28, count 2 2006.229.03:19:37.01#ibcon#read 6, iclass 28, count 2 2006.229.03:19:37.01#ibcon#end of sib2, iclass 28, count 2 2006.229.03:19:37.01#ibcon#*mode == 0, iclass 28, count 2 2006.229.03:19:37.01#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.03:19:37.01#ibcon#[25=AT03-06\r\n] 2006.229.03:19:37.01#ibcon#*before write, iclass 28, count 2 2006.229.03:19:37.01#ibcon#enter sib2, iclass 28, count 2 2006.229.03:19:37.01#ibcon#flushed, iclass 28, count 2 2006.229.03:19:37.01#ibcon#about to write, iclass 28, count 2 2006.229.03:19:37.01#ibcon#wrote, iclass 28, count 2 2006.229.03:19:37.01#ibcon#about to read 3, iclass 28, count 2 2006.229.03:19:37.04#ibcon#read 3, iclass 28, count 2 2006.229.03:19:37.04#ibcon#about to read 4, iclass 28, count 2 2006.229.03:19:37.04#ibcon#read 4, iclass 28, count 2 2006.229.03:19:37.04#ibcon#about to read 5, iclass 28, count 2 2006.229.03:19:37.04#ibcon#read 5, iclass 28, count 2 2006.229.03:19:37.04#ibcon#about to read 6, iclass 28, count 2 2006.229.03:19:37.04#ibcon#read 6, iclass 28, count 2 2006.229.03:19:37.04#ibcon#end of sib2, iclass 28, count 2 2006.229.03:19:37.04#ibcon#*after write, iclass 28, count 2 2006.229.03:19:37.04#ibcon#*before return 0, iclass 28, count 2 2006.229.03:19:37.04#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:37.04#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:37.04#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.03:19:37.04#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:37.04#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:37.16#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:37.16#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:37.16#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:19:37.16#ibcon#first serial, iclass 28, count 0 2006.229.03:19:37.16#ibcon#enter sib2, iclass 28, count 0 2006.229.03:19:37.16#ibcon#flushed, iclass 28, count 0 2006.229.03:19:37.16#ibcon#about to write, iclass 28, count 0 2006.229.03:19:37.16#ibcon#wrote, iclass 28, count 0 2006.229.03:19:37.16#ibcon#about to read 3, iclass 28, count 0 2006.229.03:19:37.18#ibcon#read 3, iclass 28, count 0 2006.229.03:19:37.18#ibcon#about to read 4, iclass 28, count 0 2006.229.03:19:37.18#ibcon#read 4, iclass 28, count 0 2006.229.03:19:37.18#ibcon#about to read 5, iclass 28, count 0 2006.229.03:19:37.18#ibcon#read 5, iclass 28, count 0 2006.229.03:19:37.18#ibcon#about to read 6, iclass 28, count 0 2006.229.03:19:37.18#ibcon#read 6, iclass 28, count 0 2006.229.03:19:37.18#ibcon#end of sib2, iclass 28, count 0 2006.229.03:19:37.18#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:19:37.18#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:19:37.18#ibcon#[25=USB\r\n] 2006.229.03:19:37.18#ibcon#*before write, iclass 28, count 0 2006.229.03:19:37.18#ibcon#enter sib2, iclass 28, count 0 2006.229.03:19:37.18#ibcon#flushed, iclass 28, count 0 2006.229.03:19:37.18#ibcon#about to write, iclass 28, count 0 2006.229.03:19:37.18#ibcon#wrote, iclass 28, count 0 2006.229.03:19:37.18#ibcon#about to read 3, iclass 28, count 0 2006.229.03:19:37.21#ibcon#read 3, iclass 28, count 0 2006.229.03:19:37.21#ibcon#about to read 4, iclass 28, count 0 2006.229.03:19:37.21#ibcon#read 4, iclass 28, count 0 2006.229.03:19:37.21#ibcon#about to read 5, iclass 28, count 0 2006.229.03:19:37.21#ibcon#read 5, iclass 28, count 0 2006.229.03:19:37.21#ibcon#about to read 6, iclass 28, count 0 2006.229.03:19:37.21#ibcon#read 6, iclass 28, count 0 2006.229.03:19:37.21#ibcon#end of sib2, iclass 28, count 0 2006.229.03:19:37.21#ibcon#*after write, iclass 28, count 0 2006.229.03:19:37.21#ibcon#*before return 0, iclass 28, count 0 2006.229.03:19:37.21#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:37.21#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:37.21#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:19:37.21#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:19:37.21$vck44/valo=4,624.99 2006.229.03:19:37.21#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.03:19:37.21#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.03:19:37.21#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:37.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:37.21#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:37.21#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:37.21#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:19:37.21#ibcon#first serial, iclass 30, count 0 2006.229.03:19:37.21#ibcon#enter sib2, iclass 30, count 0 2006.229.03:19:37.21#ibcon#flushed, iclass 30, count 0 2006.229.03:19:37.21#ibcon#about to write, iclass 30, count 0 2006.229.03:19:37.21#ibcon#wrote, iclass 30, count 0 2006.229.03:19:37.21#ibcon#about to read 3, iclass 30, count 0 2006.229.03:19:37.23#ibcon#read 3, iclass 30, count 0 2006.229.03:19:37.23#ibcon#about to read 4, iclass 30, count 0 2006.229.03:19:37.23#ibcon#read 4, iclass 30, count 0 2006.229.03:19:37.23#ibcon#about to read 5, iclass 30, count 0 2006.229.03:19:37.23#ibcon#read 5, iclass 30, count 0 2006.229.03:19:37.23#ibcon#about to read 6, iclass 30, count 0 2006.229.03:19:37.23#ibcon#read 6, iclass 30, count 0 2006.229.03:19:37.23#ibcon#end of sib2, iclass 30, count 0 2006.229.03:19:37.23#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:19:37.23#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:19:37.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:19:37.23#ibcon#*before write, iclass 30, count 0 2006.229.03:19:37.23#ibcon#enter sib2, iclass 30, count 0 2006.229.03:19:37.23#ibcon#flushed, iclass 30, count 0 2006.229.03:19:37.23#ibcon#about to write, iclass 30, count 0 2006.229.03:19:37.23#ibcon#wrote, iclass 30, count 0 2006.229.03:19:37.23#ibcon#about to read 3, iclass 30, count 0 2006.229.03:19:37.27#ibcon#read 3, iclass 30, count 0 2006.229.03:19:37.27#ibcon#about to read 4, iclass 30, count 0 2006.229.03:19:37.27#ibcon#read 4, iclass 30, count 0 2006.229.03:19:37.27#ibcon#about to read 5, iclass 30, count 0 2006.229.03:19:37.27#ibcon#read 5, iclass 30, count 0 2006.229.03:19:37.27#ibcon#about to read 6, iclass 30, count 0 2006.229.03:19:37.27#ibcon#read 6, iclass 30, count 0 2006.229.03:19:37.27#ibcon#end of sib2, iclass 30, count 0 2006.229.03:19:37.27#ibcon#*after write, iclass 30, count 0 2006.229.03:19:37.27#ibcon#*before return 0, iclass 30, count 0 2006.229.03:19:37.27#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:37.27#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:37.27#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:19:37.27#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:19:37.27$vck44/va=4,7 2006.229.03:19:37.27#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.03:19:37.27#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.03:19:37.27#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:37.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:37.33#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:37.33#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:37.33#ibcon#enter wrdev, iclass 32, count 2 2006.229.03:19:37.33#ibcon#first serial, iclass 32, count 2 2006.229.03:19:37.33#ibcon#enter sib2, iclass 32, count 2 2006.229.03:19:37.33#ibcon#flushed, iclass 32, count 2 2006.229.03:19:37.33#ibcon#about to write, iclass 32, count 2 2006.229.03:19:37.33#ibcon#wrote, iclass 32, count 2 2006.229.03:19:37.33#ibcon#about to read 3, iclass 32, count 2 2006.229.03:19:37.35#ibcon#read 3, iclass 32, count 2 2006.229.03:19:37.35#ibcon#about to read 4, iclass 32, count 2 2006.229.03:19:37.35#ibcon#read 4, iclass 32, count 2 2006.229.03:19:37.35#ibcon#about to read 5, iclass 32, count 2 2006.229.03:19:37.35#ibcon#read 5, iclass 32, count 2 2006.229.03:19:37.35#ibcon#about to read 6, iclass 32, count 2 2006.229.03:19:37.35#ibcon#read 6, iclass 32, count 2 2006.229.03:19:37.35#ibcon#end of sib2, iclass 32, count 2 2006.229.03:19:37.35#ibcon#*mode == 0, iclass 32, count 2 2006.229.03:19:37.35#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.03:19:37.35#ibcon#[25=AT04-07\r\n] 2006.229.03:19:37.35#ibcon#*before write, iclass 32, count 2 2006.229.03:19:37.35#ibcon#enter sib2, iclass 32, count 2 2006.229.03:19:37.35#ibcon#flushed, iclass 32, count 2 2006.229.03:19:37.35#ibcon#about to write, iclass 32, count 2 2006.229.03:19:37.35#ibcon#wrote, iclass 32, count 2 2006.229.03:19:37.35#ibcon#about to read 3, iclass 32, count 2 2006.229.03:19:37.38#ibcon#read 3, iclass 32, count 2 2006.229.03:19:37.38#ibcon#about to read 4, iclass 32, count 2 2006.229.03:19:37.38#ibcon#read 4, iclass 32, count 2 2006.229.03:19:37.38#ibcon#about to read 5, iclass 32, count 2 2006.229.03:19:37.38#ibcon#read 5, iclass 32, count 2 2006.229.03:19:37.38#ibcon#about to read 6, iclass 32, count 2 2006.229.03:19:37.38#ibcon#read 6, iclass 32, count 2 2006.229.03:19:37.38#ibcon#end of sib2, iclass 32, count 2 2006.229.03:19:37.38#ibcon#*after write, iclass 32, count 2 2006.229.03:19:37.38#ibcon#*before return 0, iclass 32, count 2 2006.229.03:19:37.38#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:37.38#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:37.38#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.03:19:37.38#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:37.38#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:37.50#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:37.50#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:37.50#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:19:37.50#ibcon#first serial, iclass 32, count 0 2006.229.03:19:37.50#ibcon#enter sib2, iclass 32, count 0 2006.229.03:19:37.50#ibcon#flushed, iclass 32, count 0 2006.229.03:19:37.50#ibcon#about to write, iclass 32, count 0 2006.229.03:19:37.50#ibcon#wrote, iclass 32, count 0 2006.229.03:19:37.50#ibcon#about to read 3, iclass 32, count 0 2006.229.03:19:37.52#ibcon#read 3, iclass 32, count 0 2006.229.03:19:37.52#ibcon#about to read 4, iclass 32, count 0 2006.229.03:19:37.52#ibcon#read 4, iclass 32, count 0 2006.229.03:19:37.52#ibcon#about to read 5, iclass 32, count 0 2006.229.03:19:37.52#ibcon#read 5, iclass 32, count 0 2006.229.03:19:37.52#ibcon#about to read 6, iclass 32, count 0 2006.229.03:19:37.52#ibcon#read 6, iclass 32, count 0 2006.229.03:19:37.52#ibcon#end of sib2, iclass 32, count 0 2006.229.03:19:37.52#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:19:37.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:19:37.52#ibcon#[25=USB\r\n] 2006.229.03:19:37.52#ibcon#*before write, iclass 32, count 0 2006.229.03:19:37.52#ibcon#enter sib2, iclass 32, count 0 2006.229.03:19:37.52#ibcon#flushed, iclass 32, count 0 2006.229.03:19:37.52#ibcon#about to write, iclass 32, count 0 2006.229.03:19:37.52#ibcon#wrote, iclass 32, count 0 2006.229.03:19:37.52#ibcon#about to read 3, iclass 32, count 0 2006.229.03:19:37.55#ibcon#read 3, iclass 32, count 0 2006.229.03:19:37.55#ibcon#about to read 4, iclass 32, count 0 2006.229.03:19:37.55#ibcon#read 4, iclass 32, count 0 2006.229.03:19:37.55#ibcon#about to read 5, iclass 32, count 0 2006.229.03:19:37.55#ibcon#read 5, iclass 32, count 0 2006.229.03:19:37.55#ibcon#about to read 6, iclass 32, count 0 2006.229.03:19:37.55#ibcon#read 6, iclass 32, count 0 2006.229.03:19:37.55#ibcon#end of sib2, iclass 32, count 0 2006.229.03:19:37.55#ibcon#*after write, iclass 32, count 0 2006.229.03:19:37.55#ibcon#*before return 0, iclass 32, count 0 2006.229.03:19:37.55#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:37.55#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:37.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:19:37.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:19:37.55$vck44/valo=5,734.99 2006.229.03:19:37.55#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.03:19:37.55#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.03:19:37.55#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:37.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:37.55#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:37.55#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:37.55#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:19:37.55#ibcon#first serial, iclass 34, count 0 2006.229.03:19:37.55#ibcon#enter sib2, iclass 34, count 0 2006.229.03:19:37.55#ibcon#flushed, iclass 34, count 0 2006.229.03:19:37.55#ibcon#about to write, iclass 34, count 0 2006.229.03:19:37.55#ibcon#wrote, iclass 34, count 0 2006.229.03:19:37.55#ibcon#about to read 3, iclass 34, count 0 2006.229.03:19:37.57#ibcon#read 3, iclass 34, count 0 2006.229.03:19:37.57#ibcon#about to read 4, iclass 34, count 0 2006.229.03:19:37.57#ibcon#read 4, iclass 34, count 0 2006.229.03:19:37.57#ibcon#about to read 5, iclass 34, count 0 2006.229.03:19:37.57#ibcon#read 5, iclass 34, count 0 2006.229.03:19:37.57#ibcon#about to read 6, iclass 34, count 0 2006.229.03:19:37.57#ibcon#read 6, iclass 34, count 0 2006.229.03:19:37.57#ibcon#end of sib2, iclass 34, count 0 2006.229.03:19:37.57#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:19:37.57#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:19:37.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:19:37.57#ibcon#*before write, iclass 34, count 0 2006.229.03:19:37.57#ibcon#enter sib2, iclass 34, count 0 2006.229.03:19:37.57#ibcon#flushed, iclass 34, count 0 2006.229.03:19:37.57#ibcon#about to write, iclass 34, count 0 2006.229.03:19:37.57#ibcon#wrote, iclass 34, count 0 2006.229.03:19:37.57#ibcon#about to read 3, iclass 34, count 0 2006.229.03:19:37.61#ibcon#read 3, iclass 34, count 0 2006.229.03:19:37.61#ibcon#about to read 4, iclass 34, count 0 2006.229.03:19:37.61#ibcon#read 4, iclass 34, count 0 2006.229.03:19:37.61#ibcon#about to read 5, iclass 34, count 0 2006.229.03:19:37.61#ibcon#read 5, iclass 34, count 0 2006.229.03:19:37.61#ibcon#about to read 6, iclass 34, count 0 2006.229.03:19:37.61#ibcon#read 6, iclass 34, count 0 2006.229.03:19:37.61#ibcon#end of sib2, iclass 34, count 0 2006.229.03:19:37.61#ibcon#*after write, iclass 34, count 0 2006.229.03:19:37.61#ibcon#*before return 0, iclass 34, count 0 2006.229.03:19:37.61#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:37.61#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:37.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:19:37.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:19:37.61$vck44/va=5,4 2006.229.03:19:37.61#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.03:19:37.61#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.03:19:37.61#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:37.61#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:37.67#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:37.67#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:37.67#ibcon#enter wrdev, iclass 36, count 2 2006.229.03:19:37.67#ibcon#first serial, iclass 36, count 2 2006.229.03:19:37.67#ibcon#enter sib2, iclass 36, count 2 2006.229.03:19:37.67#ibcon#flushed, iclass 36, count 2 2006.229.03:19:37.67#ibcon#about to write, iclass 36, count 2 2006.229.03:19:37.67#ibcon#wrote, iclass 36, count 2 2006.229.03:19:37.67#ibcon#about to read 3, iclass 36, count 2 2006.229.03:19:37.69#ibcon#read 3, iclass 36, count 2 2006.229.03:19:37.69#ibcon#about to read 4, iclass 36, count 2 2006.229.03:19:37.69#ibcon#read 4, iclass 36, count 2 2006.229.03:19:37.69#ibcon#about to read 5, iclass 36, count 2 2006.229.03:19:37.69#ibcon#read 5, iclass 36, count 2 2006.229.03:19:37.69#ibcon#about to read 6, iclass 36, count 2 2006.229.03:19:37.69#ibcon#read 6, iclass 36, count 2 2006.229.03:19:37.69#ibcon#end of sib2, iclass 36, count 2 2006.229.03:19:37.69#ibcon#*mode == 0, iclass 36, count 2 2006.229.03:19:37.69#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.03:19:37.69#ibcon#[25=AT05-04\r\n] 2006.229.03:19:37.69#ibcon#*before write, iclass 36, count 2 2006.229.03:19:37.69#ibcon#enter sib2, iclass 36, count 2 2006.229.03:19:37.69#ibcon#flushed, iclass 36, count 2 2006.229.03:19:37.69#ibcon#about to write, iclass 36, count 2 2006.229.03:19:37.69#ibcon#wrote, iclass 36, count 2 2006.229.03:19:37.69#ibcon#about to read 3, iclass 36, count 2 2006.229.03:19:37.72#ibcon#read 3, iclass 36, count 2 2006.229.03:19:37.72#ibcon#about to read 4, iclass 36, count 2 2006.229.03:19:37.72#ibcon#read 4, iclass 36, count 2 2006.229.03:19:37.72#ibcon#about to read 5, iclass 36, count 2 2006.229.03:19:37.72#ibcon#read 5, iclass 36, count 2 2006.229.03:19:37.72#ibcon#about to read 6, iclass 36, count 2 2006.229.03:19:37.72#ibcon#read 6, iclass 36, count 2 2006.229.03:19:37.72#ibcon#end of sib2, iclass 36, count 2 2006.229.03:19:37.72#ibcon#*after write, iclass 36, count 2 2006.229.03:19:37.72#ibcon#*before return 0, iclass 36, count 2 2006.229.03:19:37.72#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:37.72#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:37.72#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.03:19:37.72#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:37.72#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:37.84#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:37.84#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:37.84#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:19:37.84#ibcon#first serial, iclass 36, count 0 2006.229.03:19:37.84#ibcon#enter sib2, iclass 36, count 0 2006.229.03:19:37.84#ibcon#flushed, iclass 36, count 0 2006.229.03:19:37.84#ibcon#about to write, iclass 36, count 0 2006.229.03:19:37.84#ibcon#wrote, iclass 36, count 0 2006.229.03:19:37.84#ibcon#about to read 3, iclass 36, count 0 2006.229.03:19:37.86#ibcon#read 3, iclass 36, count 0 2006.229.03:19:37.86#ibcon#about to read 4, iclass 36, count 0 2006.229.03:19:37.86#ibcon#read 4, iclass 36, count 0 2006.229.03:19:37.86#ibcon#about to read 5, iclass 36, count 0 2006.229.03:19:37.86#ibcon#read 5, iclass 36, count 0 2006.229.03:19:37.86#ibcon#about to read 6, iclass 36, count 0 2006.229.03:19:37.86#ibcon#read 6, iclass 36, count 0 2006.229.03:19:37.86#ibcon#end of sib2, iclass 36, count 0 2006.229.03:19:37.86#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:19:37.86#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:19:37.86#ibcon#[25=USB\r\n] 2006.229.03:19:37.86#ibcon#*before write, iclass 36, count 0 2006.229.03:19:37.86#ibcon#enter sib2, iclass 36, count 0 2006.229.03:19:37.86#ibcon#flushed, iclass 36, count 0 2006.229.03:19:37.86#ibcon#about to write, iclass 36, count 0 2006.229.03:19:37.86#ibcon#wrote, iclass 36, count 0 2006.229.03:19:37.86#ibcon#about to read 3, iclass 36, count 0 2006.229.03:19:37.89#ibcon#read 3, iclass 36, count 0 2006.229.03:19:37.89#ibcon#about to read 4, iclass 36, count 0 2006.229.03:19:37.89#ibcon#read 4, iclass 36, count 0 2006.229.03:19:37.89#ibcon#about to read 5, iclass 36, count 0 2006.229.03:19:37.89#ibcon#read 5, iclass 36, count 0 2006.229.03:19:37.89#ibcon#about to read 6, iclass 36, count 0 2006.229.03:19:37.89#ibcon#read 6, iclass 36, count 0 2006.229.03:19:37.89#ibcon#end of sib2, iclass 36, count 0 2006.229.03:19:37.89#ibcon#*after write, iclass 36, count 0 2006.229.03:19:37.89#ibcon#*before return 0, iclass 36, count 0 2006.229.03:19:37.89#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:37.89#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:37.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:19:37.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:19:37.89$vck44/valo=6,814.99 2006.229.03:19:37.89#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.03:19:37.89#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.03:19:37.89#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:37.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:37.89#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:37.89#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:37.89#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:19:37.89#ibcon#first serial, iclass 38, count 0 2006.229.03:19:37.89#ibcon#enter sib2, iclass 38, count 0 2006.229.03:19:37.89#ibcon#flushed, iclass 38, count 0 2006.229.03:19:37.89#ibcon#about to write, iclass 38, count 0 2006.229.03:19:37.89#ibcon#wrote, iclass 38, count 0 2006.229.03:19:37.89#ibcon#about to read 3, iclass 38, count 0 2006.229.03:19:37.91#ibcon#read 3, iclass 38, count 0 2006.229.03:19:37.91#ibcon#about to read 4, iclass 38, count 0 2006.229.03:19:37.91#ibcon#read 4, iclass 38, count 0 2006.229.03:19:37.91#ibcon#about to read 5, iclass 38, count 0 2006.229.03:19:37.91#ibcon#read 5, iclass 38, count 0 2006.229.03:19:37.91#ibcon#about to read 6, iclass 38, count 0 2006.229.03:19:37.91#ibcon#read 6, iclass 38, count 0 2006.229.03:19:37.91#ibcon#end of sib2, iclass 38, count 0 2006.229.03:19:37.91#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:19:37.91#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:19:37.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:19:37.91#ibcon#*before write, iclass 38, count 0 2006.229.03:19:37.91#ibcon#enter sib2, iclass 38, count 0 2006.229.03:19:37.91#ibcon#flushed, iclass 38, count 0 2006.229.03:19:37.91#ibcon#about to write, iclass 38, count 0 2006.229.03:19:37.91#ibcon#wrote, iclass 38, count 0 2006.229.03:19:37.91#ibcon#about to read 3, iclass 38, count 0 2006.229.03:19:37.95#ibcon#read 3, iclass 38, count 0 2006.229.03:19:37.95#ibcon#about to read 4, iclass 38, count 0 2006.229.03:19:37.95#ibcon#read 4, iclass 38, count 0 2006.229.03:19:37.95#ibcon#about to read 5, iclass 38, count 0 2006.229.03:19:37.95#ibcon#read 5, iclass 38, count 0 2006.229.03:19:37.95#ibcon#about to read 6, iclass 38, count 0 2006.229.03:19:37.95#ibcon#read 6, iclass 38, count 0 2006.229.03:19:37.95#ibcon#end of sib2, iclass 38, count 0 2006.229.03:19:37.95#ibcon#*after write, iclass 38, count 0 2006.229.03:19:37.95#ibcon#*before return 0, iclass 38, count 0 2006.229.03:19:37.95#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:37.95#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:37.95#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:19:37.95#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:19:37.95$vck44/va=6,4 2006.229.03:19:37.95#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.03:19:37.95#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.03:19:37.95#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:37.95#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:38.01#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:38.01#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:38.01#ibcon#enter wrdev, iclass 40, count 2 2006.229.03:19:38.01#ibcon#first serial, iclass 40, count 2 2006.229.03:19:38.01#ibcon#enter sib2, iclass 40, count 2 2006.229.03:19:38.01#ibcon#flushed, iclass 40, count 2 2006.229.03:19:38.01#ibcon#about to write, iclass 40, count 2 2006.229.03:19:38.01#ibcon#wrote, iclass 40, count 2 2006.229.03:19:38.01#ibcon#about to read 3, iclass 40, count 2 2006.229.03:19:38.03#ibcon#read 3, iclass 40, count 2 2006.229.03:19:38.03#ibcon#about to read 4, iclass 40, count 2 2006.229.03:19:38.03#ibcon#read 4, iclass 40, count 2 2006.229.03:19:38.03#ibcon#about to read 5, iclass 40, count 2 2006.229.03:19:38.03#ibcon#read 5, iclass 40, count 2 2006.229.03:19:38.03#ibcon#about to read 6, iclass 40, count 2 2006.229.03:19:38.03#ibcon#read 6, iclass 40, count 2 2006.229.03:19:38.03#ibcon#end of sib2, iclass 40, count 2 2006.229.03:19:38.03#ibcon#*mode == 0, iclass 40, count 2 2006.229.03:19:38.03#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.03:19:38.03#ibcon#[25=AT06-04\r\n] 2006.229.03:19:38.03#ibcon#*before write, iclass 40, count 2 2006.229.03:19:38.03#ibcon#enter sib2, iclass 40, count 2 2006.229.03:19:38.03#ibcon#flushed, iclass 40, count 2 2006.229.03:19:38.03#ibcon#about to write, iclass 40, count 2 2006.229.03:19:38.03#ibcon#wrote, iclass 40, count 2 2006.229.03:19:38.03#ibcon#about to read 3, iclass 40, count 2 2006.229.03:19:38.06#ibcon#read 3, iclass 40, count 2 2006.229.03:19:38.06#ibcon#about to read 4, iclass 40, count 2 2006.229.03:19:38.06#ibcon#read 4, iclass 40, count 2 2006.229.03:19:38.06#ibcon#about to read 5, iclass 40, count 2 2006.229.03:19:38.06#ibcon#read 5, iclass 40, count 2 2006.229.03:19:38.06#ibcon#about to read 6, iclass 40, count 2 2006.229.03:19:38.06#ibcon#read 6, iclass 40, count 2 2006.229.03:19:38.06#ibcon#end of sib2, iclass 40, count 2 2006.229.03:19:38.06#ibcon#*after write, iclass 40, count 2 2006.229.03:19:38.06#ibcon#*before return 0, iclass 40, count 2 2006.229.03:19:38.06#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:38.06#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:38.06#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.03:19:38.06#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:38.06#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:38.18#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:38.18#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:38.18#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:19:38.18#ibcon#first serial, iclass 40, count 0 2006.229.03:19:38.18#ibcon#enter sib2, iclass 40, count 0 2006.229.03:19:38.18#ibcon#flushed, iclass 40, count 0 2006.229.03:19:38.18#ibcon#about to write, iclass 40, count 0 2006.229.03:19:38.18#ibcon#wrote, iclass 40, count 0 2006.229.03:19:38.18#ibcon#about to read 3, iclass 40, count 0 2006.229.03:19:38.20#ibcon#read 3, iclass 40, count 0 2006.229.03:19:38.20#ibcon#about to read 4, iclass 40, count 0 2006.229.03:19:38.20#ibcon#read 4, iclass 40, count 0 2006.229.03:19:38.20#ibcon#about to read 5, iclass 40, count 0 2006.229.03:19:38.20#ibcon#read 5, iclass 40, count 0 2006.229.03:19:38.20#ibcon#about to read 6, iclass 40, count 0 2006.229.03:19:38.20#ibcon#read 6, iclass 40, count 0 2006.229.03:19:38.20#ibcon#end of sib2, iclass 40, count 0 2006.229.03:19:38.20#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:19:38.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:19:38.20#ibcon#[25=USB\r\n] 2006.229.03:19:38.20#ibcon#*before write, iclass 40, count 0 2006.229.03:19:38.20#ibcon#enter sib2, iclass 40, count 0 2006.229.03:19:38.20#ibcon#flushed, iclass 40, count 0 2006.229.03:19:38.20#ibcon#about to write, iclass 40, count 0 2006.229.03:19:38.20#ibcon#wrote, iclass 40, count 0 2006.229.03:19:38.20#ibcon#about to read 3, iclass 40, count 0 2006.229.03:19:38.23#ibcon#read 3, iclass 40, count 0 2006.229.03:19:38.23#ibcon#about to read 4, iclass 40, count 0 2006.229.03:19:38.23#ibcon#read 4, iclass 40, count 0 2006.229.03:19:38.23#ibcon#about to read 5, iclass 40, count 0 2006.229.03:19:38.23#ibcon#read 5, iclass 40, count 0 2006.229.03:19:38.23#ibcon#about to read 6, iclass 40, count 0 2006.229.03:19:38.23#ibcon#read 6, iclass 40, count 0 2006.229.03:19:38.23#ibcon#end of sib2, iclass 40, count 0 2006.229.03:19:38.23#ibcon#*after write, iclass 40, count 0 2006.229.03:19:38.23#ibcon#*before return 0, iclass 40, count 0 2006.229.03:19:38.23#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:38.23#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:38.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:19:38.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:19:38.23$vck44/valo=7,864.99 2006.229.03:19:38.23#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.03:19:38.23#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.03:19:38.23#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:38.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:38.23#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:38.23#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:38.23#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:19:38.23#ibcon#first serial, iclass 4, count 0 2006.229.03:19:38.23#ibcon#enter sib2, iclass 4, count 0 2006.229.03:19:38.23#ibcon#flushed, iclass 4, count 0 2006.229.03:19:38.23#ibcon#about to write, iclass 4, count 0 2006.229.03:19:38.23#ibcon#wrote, iclass 4, count 0 2006.229.03:19:38.23#ibcon#about to read 3, iclass 4, count 0 2006.229.03:19:38.25#ibcon#read 3, iclass 4, count 0 2006.229.03:19:38.25#ibcon#about to read 4, iclass 4, count 0 2006.229.03:19:38.25#ibcon#read 4, iclass 4, count 0 2006.229.03:19:38.25#ibcon#about to read 5, iclass 4, count 0 2006.229.03:19:38.25#ibcon#read 5, iclass 4, count 0 2006.229.03:19:38.25#ibcon#about to read 6, iclass 4, count 0 2006.229.03:19:38.25#ibcon#read 6, iclass 4, count 0 2006.229.03:19:38.25#ibcon#end of sib2, iclass 4, count 0 2006.229.03:19:38.25#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:19:38.25#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:19:38.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:19:38.25#ibcon#*before write, iclass 4, count 0 2006.229.03:19:38.25#ibcon#enter sib2, iclass 4, count 0 2006.229.03:19:38.25#ibcon#flushed, iclass 4, count 0 2006.229.03:19:38.25#ibcon#about to write, iclass 4, count 0 2006.229.03:19:38.25#ibcon#wrote, iclass 4, count 0 2006.229.03:19:38.25#ibcon#about to read 3, iclass 4, count 0 2006.229.03:19:38.29#ibcon#read 3, iclass 4, count 0 2006.229.03:19:38.29#ibcon#about to read 4, iclass 4, count 0 2006.229.03:19:38.29#ibcon#read 4, iclass 4, count 0 2006.229.03:19:38.29#ibcon#about to read 5, iclass 4, count 0 2006.229.03:19:38.29#ibcon#read 5, iclass 4, count 0 2006.229.03:19:38.29#ibcon#about to read 6, iclass 4, count 0 2006.229.03:19:38.29#ibcon#read 6, iclass 4, count 0 2006.229.03:19:38.29#ibcon#end of sib2, iclass 4, count 0 2006.229.03:19:38.29#ibcon#*after write, iclass 4, count 0 2006.229.03:19:38.29#ibcon#*before return 0, iclass 4, count 0 2006.229.03:19:38.29#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:38.29#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:38.29#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:19:38.29#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:19:38.29$vck44/va=7,5 2006.229.03:19:38.29#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.03:19:38.29#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.03:19:38.29#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:38.29#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:38.35#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:38.35#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:38.35#ibcon#enter wrdev, iclass 6, count 2 2006.229.03:19:38.35#ibcon#first serial, iclass 6, count 2 2006.229.03:19:38.35#ibcon#enter sib2, iclass 6, count 2 2006.229.03:19:38.35#ibcon#flushed, iclass 6, count 2 2006.229.03:19:38.35#ibcon#about to write, iclass 6, count 2 2006.229.03:19:38.35#ibcon#wrote, iclass 6, count 2 2006.229.03:19:38.35#ibcon#about to read 3, iclass 6, count 2 2006.229.03:19:38.37#ibcon#read 3, iclass 6, count 2 2006.229.03:19:38.37#ibcon#about to read 4, iclass 6, count 2 2006.229.03:19:38.37#ibcon#read 4, iclass 6, count 2 2006.229.03:19:38.37#ibcon#about to read 5, iclass 6, count 2 2006.229.03:19:38.37#ibcon#read 5, iclass 6, count 2 2006.229.03:19:38.37#ibcon#about to read 6, iclass 6, count 2 2006.229.03:19:38.37#ibcon#read 6, iclass 6, count 2 2006.229.03:19:38.37#ibcon#end of sib2, iclass 6, count 2 2006.229.03:19:38.37#ibcon#*mode == 0, iclass 6, count 2 2006.229.03:19:38.37#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.03:19:38.37#ibcon#[25=AT07-05\r\n] 2006.229.03:19:38.37#ibcon#*before write, iclass 6, count 2 2006.229.03:19:38.37#ibcon#enter sib2, iclass 6, count 2 2006.229.03:19:38.37#ibcon#flushed, iclass 6, count 2 2006.229.03:19:38.37#ibcon#about to write, iclass 6, count 2 2006.229.03:19:38.37#ibcon#wrote, iclass 6, count 2 2006.229.03:19:38.37#ibcon#about to read 3, iclass 6, count 2 2006.229.03:19:38.40#ibcon#read 3, iclass 6, count 2 2006.229.03:19:38.40#ibcon#about to read 4, iclass 6, count 2 2006.229.03:19:38.40#ibcon#read 4, iclass 6, count 2 2006.229.03:19:38.40#ibcon#about to read 5, iclass 6, count 2 2006.229.03:19:38.40#ibcon#read 5, iclass 6, count 2 2006.229.03:19:38.40#ibcon#about to read 6, iclass 6, count 2 2006.229.03:19:38.40#ibcon#read 6, iclass 6, count 2 2006.229.03:19:38.40#ibcon#end of sib2, iclass 6, count 2 2006.229.03:19:38.40#ibcon#*after write, iclass 6, count 2 2006.229.03:19:38.40#ibcon#*before return 0, iclass 6, count 2 2006.229.03:19:38.40#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:38.40#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:38.40#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.03:19:38.40#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:38.40#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:38.52#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:38.52#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:38.52#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:19:38.52#ibcon#first serial, iclass 6, count 0 2006.229.03:19:38.52#ibcon#enter sib2, iclass 6, count 0 2006.229.03:19:38.52#ibcon#flushed, iclass 6, count 0 2006.229.03:19:38.52#ibcon#about to write, iclass 6, count 0 2006.229.03:19:38.52#ibcon#wrote, iclass 6, count 0 2006.229.03:19:38.52#ibcon#about to read 3, iclass 6, count 0 2006.229.03:19:38.54#ibcon#read 3, iclass 6, count 0 2006.229.03:19:38.54#ibcon#about to read 4, iclass 6, count 0 2006.229.03:19:38.54#ibcon#read 4, iclass 6, count 0 2006.229.03:19:38.54#ibcon#about to read 5, iclass 6, count 0 2006.229.03:19:38.54#ibcon#read 5, iclass 6, count 0 2006.229.03:19:38.54#ibcon#about to read 6, iclass 6, count 0 2006.229.03:19:38.54#ibcon#read 6, iclass 6, count 0 2006.229.03:19:38.54#ibcon#end of sib2, iclass 6, count 0 2006.229.03:19:38.54#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:19:38.54#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:19:38.54#ibcon#[25=USB\r\n] 2006.229.03:19:38.54#ibcon#*before write, iclass 6, count 0 2006.229.03:19:38.54#ibcon#enter sib2, iclass 6, count 0 2006.229.03:19:38.54#ibcon#flushed, iclass 6, count 0 2006.229.03:19:38.54#ibcon#about to write, iclass 6, count 0 2006.229.03:19:38.54#ibcon#wrote, iclass 6, count 0 2006.229.03:19:38.54#ibcon#about to read 3, iclass 6, count 0 2006.229.03:19:38.57#ibcon#read 3, iclass 6, count 0 2006.229.03:19:38.57#ibcon#about to read 4, iclass 6, count 0 2006.229.03:19:38.57#ibcon#read 4, iclass 6, count 0 2006.229.03:19:38.57#ibcon#about to read 5, iclass 6, count 0 2006.229.03:19:38.57#ibcon#read 5, iclass 6, count 0 2006.229.03:19:38.57#ibcon#about to read 6, iclass 6, count 0 2006.229.03:19:38.57#ibcon#read 6, iclass 6, count 0 2006.229.03:19:38.57#ibcon#end of sib2, iclass 6, count 0 2006.229.03:19:38.57#ibcon#*after write, iclass 6, count 0 2006.229.03:19:38.57#ibcon#*before return 0, iclass 6, count 0 2006.229.03:19:38.57#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:38.57#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:38.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:19:38.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:19:38.57$vck44/valo=8,884.99 2006.229.03:19:38.57#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.03:19:38.57#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.03:19:38.57#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:38.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:19:38.57#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:19:38.57#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:19:38.57#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:19:38.57#ibcon#first serial, iclass 10, count 0 2006.229.03:19:38.57#ibcon#enter sib2, iclass 10, count 0 2006.229.03:19:38.57#ibcon#flushed, iclass 10, count 0 2006.229.03:19:38.57#ibcon#about to write, iclass 10, count 0 2006.229.03:19:38.57#ibcon#wrote, iclass 10, count 0 2006.229.03:19:38.57#ibcon#about to read 3, iclass 10, count 0 2006.229.03:19:38.59#ibcon#read 3, iclass 10, count 0 2006.229.03:19:38.59#ibcon#about to read 4, iclass 10, count 0 2006.229.03:19:38.59#ibcon#read 4, iclass 10, count 0 2006.229.03:19:38.59#ibcon#about to read 5, iclass 10, count 0 2006.229.03:19:38.59#ibcon#read 5, iclass 10, count 0 2006.229.03:19:38.59#ibcon#about to read 6, iclass 10, count 0 2006.229.03:19:38.59#ibcon#read 6, iclass 10, count 0 2006.229.03:19:38.59#ibcon#end of sib2, iclass 10, count 0 2006.229.03:19:38.59#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:19:38.59#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:19:38.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:19:38.59#ibcon#*before write, iclass 10, count 0 2006.229.03:19:38.59#ibcon#enter sib2, iclass 10, count 0 2006.229.03:19:38.59#ibcon#flushed, iclass 10, count 0 2006.229.03:19:38.59#ibcon#about to write, iclass 10, count 0 2006.229.03:19:38.59#ibcon#wrote, iclass 10, count 0 2006.229.03:19:38.59#ibcon#about to read 3, iclass 10, count 0 2006.229.03:19:38.63#ibcon#read 3, iclass 10, count 0 2006.229.03:19:38.63#ibcon#about to read 4, iclass 10, count 0 2006.229.03:19:38.63#ibcon#read 4, iclass 10, count 0 2006.229.03:19:38.63#ibcon#about to read 5, iclass 10, count 0 2006.229.03:19:38.63#ibcon#read 5, iclass 10, count 0 2006.229.03:19:38.63#ibcon#about to read 6, iclass 10, count 0 2006.229.03:19:38.63#ibcon#read 6, iclass 10, count 0 2006.229.03:19:38.63#ibcon#end of sib2, iclass 10, count 0 2006.229.03:19:38.63#ibcon#*after write, iclass 10, count 0 2006.229.03:19:38.63#ibcon#*before return 0, iclass 10, count 0 2006.229.03:19:38.63#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:19:38.63#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:19:38.63#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:19:38.63#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:19:38.63$vck44/va=8,6 2006.229.03:19:38.63#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.03:19:38.63#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.03:19:38.63#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:38.63#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:19:38.69#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:19:38.69#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:19:38.69#ibcon#enter wrdev, iclass 12, count 2 2006.229.03:19:38.69#ibcon#first serial, iclass 12, count 2 2006.229.03:19:38.69#ibcon#enter sib2, iclass 12, count 2 2006.229.03:19:38.69#ibcon#flushed, iclass 12, count 2 2006.229.03:19:38.69#ibcon#about to write, iclass 12, count 2 2006.229.03:19:38.69#ibcon#wrote, iclass 12, count 2 2006.229.03:19:38.69#ibcon#about to read 3, iclass 12, count 2 2006.229.03:19:38.71#ibcon#read 3, iclass 12, count 2 2006.229.03:19:38.71#ibcon#about to read 4, iclass 12, count 2 2006.229.03:19:38.71#ibcon#read 4, iclass 12, count 2 2006.229.03:19:38.71#ibcon#about to read 5, iclass 12, count 2 2006.229.03:19:38.71#ibcon#read 5, iclass 12, count 2 2006.229.03:19:38.71#ibcon#about to read 6, iclass 12, count 2 2006.229.03:19:38.71#ibcon#read 6, iclass 12, count 2 2006.229.03:19:38.71#ibcon#end of sib2, iclass 12, count 2 2006.229.03:19:38.71#ibcon#*mode == 0, iclass 12, count 2 2006.229.03:19:38.71#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.03:19:38.71#ibcon#[25=AT08-06\r\n] 2006.229.03:19:38.71#ibcon#*before write, iclass 12, count 2 2006.229.03:19:38.71#ibcon#enter sib2, iclass 12, count 2 2006.229.03:19:38.71#ibcon#flushed, iclass 12, count 2 2006.229.03:19:38.71#ibcon#about to write, iclass 12, count 2 2006.229.03:19:38.71#ibcon#wrote, iclass 12, count 2 2006.229.03:19:38.71#ibcon#about to read 3, iclass 12, count 2 2006.229.03:19:38.74#ibcon#read 3, iclass 12, count 2 2006.229.03:19:38.74#ibcon#about to read 4, iclass 12, count 2 2006.229.03:19:38.74#ibcon#read 4, iclass 12, count 2 2006.229.03:19:38.74#ibcon#about to read 5, iclass 12, count 2 2006.229.03:19:38.74#ibcon#read 5, iclass 12, count 2 2006.229.03:19:38.74#ibcon#about to read 6, iclass 12, count 2 2006.229.03:19:38.74#ibcon#read 6, iclass 12, count 2 2006.229.03:19:38.74#ibcon#end of sib2, iclass 12, count 2 2006.229.03:19:38.74#ibcon#*after write, iclass 12, count 2 2006.229.03:19:38.74#ibcon#*before return 0, iclass 12, count 2 2006.229.03:19:38.74#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:19:38.74#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:19:38.74#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.03:19:38.74#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:38.74#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:19:38.86#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:19:38.86#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:19:38.86#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:19:38.86#ibcon#first serial, iclass 12, count 0 2006.229.03:19:38.86#ibcon#enter sib2, iclass 12, count 0 2006.229.03:19:38.86#ibcon#flushed, iclass 12, count 0 2006.229.03:19:38.86#ibcon#about to write, iclass 12, count 0 2006.229.03:19:38.86#ibcon#wrote, iclass 12, count 0 2006.229.03:19:38.86#ibcon#about to read 3, iclass 12, count 0 2006.229.03:19:38.88#ibcon#read 3, iclass 12, count 0 2006.229.03:19:38.88#ibcon#about to read 4, iclass 12, count 0 2006.229.03:19:38.88#ibcon#read 4, iclass 12, count 0 2006.229.03:19:38.88#ibcon#about to read 5, iclass 12, count 0 2006.229.03:19:38.88#ibcon#read 5, iclass 12, count 0 2006.229.03:19:38.88#ibcon#about to read 6, iclass 12, count 0 2006.229.03:19:38.88#ibcon#read 6, iclass 12, count 0 2006.229.03:19:38.88#ibcon#end of sib2, iclass 12, count 0 2006.229.03:19:38.88#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:19:38.88#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:19:38.88#ibcon#[25=USB\r\n] 2006.229.03:19:38.88#ibcon#*before write, iclass 12, count 0 2006.229.03:19:38.88#ibcon#enter sib2, iclass 12, count 0 2006.229.03:19:38.88#ibcon#flushed, iclass 12, count 0 2006.229.03:19:38.88#ibcon#about to write, iclass 12, count 0 2006.229.03:19:38.88#ibcon#wrote, iclass 12, count 0 2006.229.03:19:38.88#ibcon#about to read 3, iclass 12, count 0 2006.229.03:19:38.91#ibcon#read 3, iclass 12, count 0 2006.229.03:19:38.91#ibcon#about to read 4, iclass 12, count 0 2006.229.03:19:38.91#ibcon#read 4, iclass 12, count 0 2006.229.03:19:38.91#ibcon#about to read 5, iclass 12, count 0 2006.229.03:19:38.91#ibcon#read 5, iclass 12, count 0 2006.229.03:19:38.91#ibcon#about to read 6, iclass 12, count 0 2006.229.03:19:38.91#ibcon#read 6, iclass 12, count 0 2006.229.03:19:38.91#ibcon#end of sib2, iclass 12, count 0 2006.229.03:19:38.91#ibcon#*after write, iclass 12, count 0 2006.229.03:19:38.91#ibcon#*before return 0, iclass 12, count 0 2006.229.03:19:38.91#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:19:38.91#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:19:38.91#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:19:38.91#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:19:38.91$vck44/vblo=1,629.99 2006.229.03:19:38.91#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.03:19:38.91#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.03:19:38.91#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:38.91#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:38.91#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:38.91#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:38.91#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:19:38.91#ibcon#first serial, iclass 14, count 0 2006.229.03:19:38.91#ibcon#enter sib2, iclass 14, count 0 2006.229.03:19:38.91#ibcon#flushed, iclass 14, count 0 2006.229.03:19:38.91#ibcon#about to write, iclass 14, count 0 2006.229.03:19:38.91#ibcon#wrote, iclass 14, count 0 2006.229.03:19:38.91#ibcon#about to read 3, iclass 14, count 0 2006.229.03:19:38.93#ibcon#read 3, iclass 14, count 0 2006.229.03:19:38.93#ibcon#about to read 4, iclass 14, count 0 2006.229.03:19:38.93#ibcon#read 4, iclass 14, count 0 2006.229.03:19:38.93#ibcon#about to read 5, iclass 14, count 0 2006.229.03:19:38.93#ibcon#read 5, iclass 14, count 0 2006.229.03:19:38.93#ibcon#about to read 6, iclass 14, count 0 2006.229.03:19:38.93#ibcon#read 6, iclass 14, count 0 2006.229.03:19:38.93#ibcon#end of sib2, iclass 14, count 0 2006.229.03:19:38.93#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:19:38.93#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:19:38.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:19:38.93#ibcon#*before write, iclass 14, count 0 2006.229.03:19:38.93#ibcon#enter sib2, iclass 14, count 0 2006.229.03:19:38.93#ibcon#flushed, iclass 14, count 0 2006.229.03:19:38.93#ibcon#about to write, iclass 14, count 0 2006.229.03:19:38.93#ibcon#wrote, iclass 14, count 0 2006.229.03:19:38.93#ibcon#about to read 3, iclass 14, count 0 2006.229.03:19:38.97#ibcon#read 3, iclass 14, count 0 2006.229.03:19:38.97#ibcon#about to read 4, iclass 14, count 0 2006.229.03:19:38.97#ibcon#read 4, iclass 14, count 0 2006.229.03:19:38.97#ibcon#about to read 5, iclass 14, count 0 2006.229.03:19:38.97#ibcon#read 5, iclass 14, count 0 2006.229.03:19:38.97#ibcon#about to read 6, iclass 14, count 0 2006.229.03:19:38.97#ibcon#read 6, iclass 14, count 0 2006.229.03:19:38.97#ibcon#end of sib2, iclass 14, count 0 2006.229.03:19:38.97#ibcon#*after write, iclass 14, count 0 2006.229.03:19:38.97#ibcon#*before return 0, iclass 14, count 0 2006.229.03:19:38.97#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:38.97#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:38.97#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:19:38.97#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:19:38.97$vck44/vb=1,4 2006.229.03:19:38.97#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.03:19:38.97#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.03:19:38.97#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:38.97#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:19:38.97#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:19:38.97#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:19:38.97#ibcon#enter wrdev, iclass 16, count 2 2006.229.03:19:38.97#ibcon#first serial, iclass 16, count 2 2006.229.03:19:38.97#ibcon#enter sib2, iclass 16, count 2 2006.229.03:19:38.97#ibcon#flushed, iclass 16, count 2 2006.229.03:19:38.97#ibcon#about to write, iclass 16, count 2 2006.229.03:19:38.97#ibcon#wrote, iclass 16, count 2 2006.229.03:19:38.97#ibcon#about to read 3, iclass 16, count 2 2006.229.03:19:38.99#ibcon#read 3, iclass 16, count 2 2006.229.03:19:38.99#ibcon#about to read 4, iclass 16, count 2 2006.229.03:19:38.99#ibcon#read 4, iclass 16, count 2 2006.229.03:19:38.99#ibcon#about to read 5, iclass 16, count 2 2006.229.03:19:38.99#ibcon#read 5, iclass 16, count 2 2006.229.03:19:38.99#ibcon#about to read 6, iclass 16, count 2 2006.229.03:19:38.99#ibcon#read 6, iclass 16, count 2 2006.229.03:19:38.99#ibcon#end of sib2, iclass 16, count 2 2006.229.03:19:38.99#ibcon#*mode == 0, iclass 16, count 2 2006.229.03:19:38.99#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.03:19:38.99#ibcon#[27=AT01-04\r\n] 2006.229.03:19:38.99#ibcon#*before write, iclass 16, count 2 2006.229.03:19:38.99#ibcon#enter sib2, iclass 16, count 2 2006.229.03:19:38.99#ibcon#flushed, iclass 16, count 2 2006.229.03:19:38.99#ibcon#about to write, iclass 16, count 2 2006.229.03:19:38.99#ibcon#wrote, iclass 16, count 2 2006.229.03:19:38.99#ibcon#about to read 3, iclass 16, count 2 2006.229.03:19:39.02#ibcon#read 3, iclass 16, count 2 2006.229.03:19:39.02#ibcon#about to read 4, iclass 16, count 2 2006.229.03:19:39.02#ibcon#read 4, iclass 16, count 2 2006.229.03:19:39.02#ibcon#about to read 5, iclass 16, count 2 2006.229.03:19:39.02#ibcon#read 5, iclass 16, count 2 2006.229.03:19:39.02#ibcon#about to read 6, iclass 16, count 2 2006.229.03:19:39.02#ibcon#read 6, iclass 16, count 2 2006.229.03:19:39.02#ibcon#end of sib2, iclass 16, count 2 2006.229.03:19:39.02#ibcon#*after write, iclass 16, count 2 2006.229.03:19:39.02#ibcon#*before return 0, iclass 16, count 2 2006.229.03:19:39.02#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:19:39.02#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:19:39.02#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.03:19:39.02#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:39.02#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:19:39.14#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:19:39.14#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:19:39.14#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:19:39.14#ibcon#first serial, iclass 16, count 0 2006.229.03:19:39.14#ibcon#enter sib2, iclass 16, count 0 2006.229.03:19:39.14#ibcon#flushed, iclass 16, count 0 2006.229.03:19:39.14#ibcon#about to write, iclass 16, count 0 2006.229.03:19:39.14#ibcon#wrote, iclass 16, count 0 2006.229.03:19:39.14#ibcon#about to read 3, iclass 16, count 0 2006.229.03:19:39.16#ibcon#read 3, iclass 16, count 0 2006.229.03:19:39.16#ibcon#about to read 4, iclass 16, count 0 2006.229.03:19:39.16#ibcon#read 4, iclass 16, count 0 2006.229.03:19:39.16#ibcon#about to read 5, iclass 16, count 0 2006.229.03:19:39.16#ibcon#read 5, iclass 16, count 0 2006.229.03:19:39.16#ibcon#about to read 6, iclass 16, count 0 2006.229.03:19:39.16#ibcon#read 6, iclass 16, count 0 2006.229.03:19:39.16#ibcon#end of sib2, iclass 16, count 0 2006.229.03:19:39.16#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:19:39.16#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:19:39.16#ibcon#[27=USB\r\n] 2006.229.03:19:39.16#ibcon#*before write, iclass 16, count 0 2006.229.03:19:39.16#ibcon#enter sib2, iclass 16, count 0 2006.229.03:19:39.16#ibcon#flushed, iclass 16, count 0 2006.229.03:19:39.16#ibcon#about to write, iclass 16, count 0 2006.229.03:19:39.16#ibcon#wrote, iclass 16, count 0 2006.229.03:19:39.16#ibcon#about to read 3, iclass 16, count 0 2006.229.03:19:39.19#ibcon#read 3, iclass 16, count 0 2006.229.03:19:39.19#ibcon#about to read 4, iclass 16, count 0 2006.229.03:19:39.19#ibcon#read 4, iclass 16, count 0 2006.229.03:19:39.19#ibcon#about to read 5, iclass 16, count 0 2006.229.03:19:39.19#ibcon#read 5, iclass 16, count 0 2006.229.03:19:39.19#ibcon#about to read 6, iclass 16, count 0 2006.229.03:19:39.19#ibcon#read 6, iclass 16, count 0 2006.229.03:19:39.19#ibcon#end of sib2, iclass 16, count 0 2006.229.03:19:39.19#ibcon#*after write, iclass 16, count 0 2006.229.03:19:39.19#ibcon#*before return 0, iclass 16, count 0 2006.229.03:19:39.19#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:19:39.19#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:19:39.19#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:19:39.19#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:19:39.19$vck44/vblo=2,634.99 2006.229.03:19:39.19#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.03:19:39.19#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.03:19:39.19#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:39.19#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:39.19#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:39.19#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:39.19#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:19:39.19#ibcon#first serial, iclass 18, count 0 2006.229.03:19:39.19#ibcon#enter sib2, iclass 18, count 0 2006.229.03:19:39.19#ibcon#flushed, iclass 18, count 0 2006.229.03:19:39.19#ibcon#about to write, iclass 18, count 0 2006.229.03:19:39.19#ibcon#wrote, iclass 18, count 0 2006.229.03:19:39.19#ibcon#about to read 3, iclass 18, count 0 2006.229.03:19:39.21#ibcon#read 3, iclass 18, count 0 2006.229.03:19:39.21#ibcon#about to read 4, iclass 18, count 0 2006.229.03:19:39.21#ibcon#read 4, iclass 18, count 0 2006.229.03:19:39.21#ibcon#about to read 5, iclass 18, count 0 2006.229.03:19:39.21#ibcon#read 5, iclass 18, count 0 2006.229.03:19:39.21#ibcon#about to read 6, iclass 18, count 0 2006.229.03:19:39.21#ibcon#read 6, iclass 18, count 0 2006.229.03:19:39.21#ibcon#end of sib2, iclass 18, count 0 2006.229.03:19:39.21#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:19:39.21#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:19:39.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:19:39.21#ibcon#*before write, iclass 18, count 0 2006.229.03:19:39.21#ibcon#enter sib2, iclass 18, count 0 2006.229.03:19:39.21#ibcon#flushed, iclass 18, count 0 2006.229.03:19:39.21#ibcon#about to write, iclass 18, count 0 2006.229.03:19:39.21#ibcon#wrote, iclass 18, count 0 2006.229.03:19:39.21#ibcon#about to read 3, iclass 18, count 0 2006.229.03:19:39.25#ibcon#read 3, iclass 18, count 0 2006.229.03:19:39.25#ibcon#about to read 4, iclass 18, count 0 2006.229.03:19:39.25#ibcon#read 4, iclass 18, count 0 2006.229.03:19:39.25#ibcon#about to read 5, iclass 18, count 0 2006.229.03:19:39.25#ibcon#read 5, iclass 18, count 0 2006.229.03:19:39.25#ibcon#about to read 6, iclass 18, count 0 2006.229.03:19:39.25#ibcon#read 6, iclass 18, count 0 2006.229.03:19:39.25#ibcon#end of sib2, iclass 18, count 0 2006.229.03:19:39.25#ibcon#*after write, iclass 18, count 0 2006.229.03:19:39.25#ibcon#*before return 0, iclass 18, count 0 2006.229.03:19:39.25#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:39.25#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:19:39.25#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:19:39.25#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:19:39.25$vck44/vb=2,4 2006.229.03:19:39.25#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.03:19:39.25#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.03:19:39.25#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:39.25#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:39.31#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:39.31#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:39.31#ibcon#enter wrdev, iclass 20, count 2 2006.229.03:19:39.31#ibcon#first serial, iclass 20, count 2 2006.229.03:19:39.31#ibcon#enter sib2, iclass 20, count 2 2006.229.03:19:39.31#ibcon#flushed, iclass 20, count 2 2006.229.03:19:39.31#ibcon#about to write, iclass 20, count 2 2006.229.03:19:39.31#ibcon#wrote, iclass 20, count 2 2006.229.03:19:39.31#ibcon#about to read 3, iclass 20, count 2 2006.229.03:19:39.33#ibcon#read 3, iclass 20, count 2 2006.229.03:19:39.33#ibcon#about to read 4, iclass 20, count 2 2006.229.03:19:39.33#ibcon#read 4, iclass 20, count 2 2006.229.03:19:39.33#ibcon#about to read 5, iclass 20, count 2 2006.229.03:19:39.33#ibcon#read 5, iclass 20, count 2 2006.229.03:19:39.33#ibcon#about to read 6, iclass 20, count 2 2006.229.03:19:39.33#ibcon#read 6, iclass 20, count 2 2006.229.03:19:39.33#ibcon#end of sib2, iclass 20, count 2 2006.229.03:19:39.33#ibcon#*mode == 0, iclass 20, count 2 2006.229.03:19:39.33#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.03:19:39.33#ibcon#[27=AT02-04\r\n] 2006.229.03:19:39.33#ibcon#*before write, iclass 20, count 2 2006.229.03:19:39.33#ibcon#enter sib2, iclass 20, count 2 2006.229.03:19:39.33#ibcon#flushed, iclass 20, count 2 2006.229.03:19:39.33#ibcon#about to write, iclass 20, count 2 2006.229.03:19:39.33#ibcon#wrote, iclass 20, count 2 2006.229.03:19:39.33#ibcon#about to read 3, iclass 20, count 2 2006.229.03:19:39.36#ibcon#read 3, iclass 20, count 2 2006.229.03:19:39.36#ibcon#about to read 4, iclass 20, count 2 2006.229.03:19:39.36#ibcon#read 4, iclass 20, count 2 2006.229.03:19:39.36#ibcon#about to read 5, iclass 20, count 2 2006.229.03:19:39.36#ibcon#read 5, iclass 20, count 2 2006.229.03:19:39.36#ibcon#about to read 6, iclass 20, count 2 2006.229.03:19:39.36#ibcon#read 6, iclass 20, count 2 2006.229.03:19:39.36#ibcon#end of sib2, iclass 20, count 2 2006.229.03:19:39.36#ibcon#*after write, iclass 20, count 2 2006.229.03:19:39.36#ibcon#*before return 0, iclass 20, count 2 2006.229.03:19:39.36#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:39.36#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:19:39.36#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.03:19:39.36#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:39.36#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:39.48#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:39.48#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:39.48#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:19:39.48#ibcon#first serial, iclass 20, count 0 2006.229.03:19:39.48#ibcon#enter sib2, iclass 20, count 0 2006.229.03:19:39.48#ibcon#flushed, iclass 20, count 0 2006.229.03:19:39.48#ibcon#about to write, iclass 20, count 0 2006.229.03:19:39.48#ibcon#wrote, iclass 20, count 0 2006.229.03:19:39.48#ibcon#about to read 3, iclass 20, count 0 2006.229.03:19:39.50#ibcon#read 3, iclass 20, count 0 2006.229.03:19:39.50#ibcon#about to read 4, iclass 20, count 0 2006.229.03:19:39.50#ibcon#read 4, iclass 20, count 0 2006.229.03:19:39.50#ibcon#about to read 5, iclass 20, count 0 2006.229.03:19:39.50#ibcon#read 5, iclass 20, count 0 2006.229.03:19:39.50#ibcon#about to read 6, iclass 20, count 0 2006.229.03:19:39.50#ibcon#read 6, iclass 20, count 0 2006.229.03:19:39.50#ibcon#end of sib2, iclass 20, count 0 2006.229.03:19:39.50#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:19:39.50#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:19:39.50#ibcon#[27=USB\r\n] 2006.229.03:19:39.50#ibcon#*before write, iclass 20, count 0 2006.229.03:19:39.50#ibcon#enter sib2, iclass 20, count 0 2006.229.03:19:39.50#ibcon#flushed, iclass 20, count 0 2006.229.03:19:39.50#ibcon#about to write, iclass 20, count 0 2006.229.03:19:39.50#ibcon#wrote, iclass 20, count 0 2006.229.03:19:39.50#ibcon#about to read 3, iclass 20, count 0 2006.229.03:19:39.53#ibcon#read 3, iclass 20, count 0 2006.229.03:19:39.53#ibcon#about to read 4, iclass 20, count 0 2006.229.03:19:39.53#ibcon#read 4, iclass 20, count 0 2006.229.03:19:39.53#ibcon#about to read 5, iclass 20, count 0 2006.229.03:19:39.53#ibcon#read 5, iclass 20, count 0 2006.229.03:19:39.53#ibcon#about to read 6, iclass 20, count 0 2006.229.03:19:39.53#ibcon#read 6, iclass 20, count 0 2006.229.03:19:39.53#ibcon#end of sib2, iclass 20, count 0 2006.229.03:19:39.53#ibcon#*after write, iclass 20, count 0 2006.229.03:19:39.53#ibcon#*before return 0, iclass 20, count 0 2006.229.03:19:39.53#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:39.53#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:19:39.53#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:19:39.53#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:19:39.53$vck44/vblo=3,649.99 2006.229.03:19:39.53#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.03:19:39.53#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.03:19:39.53#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:39.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:39.53#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:39.53#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:39.53#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:19:39.53#ibcon#first serial, iclass 22, count 0 2006.229.03:19:39.53#ibcon#enter sib2, iclass 22, count 0 2006.229.03:19:39.53#ibcon#flushed, iclass 22, count 0 2006.229.03:19:39.53#ibcon#about to write, iclass 22, count 0 2006.229.03:19:39.53#ibcon#wrote, iclass 22, count 0 2006.229.03:19:39.53#ibcon#about to read 3, iclass 22, count 0 2006.229.03:19:39.55#ibcon#read 3, iclass 22, count 0 2006.229.03:19:39.55#ibcon#about to read 4, iclass 22, count 0 2006.229.03:19:39.55#ibcon#read 4, iclass 22, count 0 2006.229.03:19:39.55#ibcon#about to read 5, iclass 22, count 0 2006.229.03:19:39.55#ibcon#read 5, iclass 22, count 0 2006.229.03:19:39.55#ibcon#about to read 6, iclass 22, count 0 2006.229.03:19:39.55#ibcon#read 6, iclass 22, count 0 2006.229.03:19:39.55#ibcon#end of sib2, iclass 22, count 0 2006.229.03:19:39.55#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:19:39.55#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:19:39.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:19:39.55#ibcon#*before write, iclass 22, count 0 2006.229.03:19:39.55#ibcon#enter sib2, iclass 22, count 0 2006.229.03:19:39.55#ibcon#flushed, iclass 22, count 0 2006.229.03:19:39.55#ibcon#about to write, iclass 22, count 0 2006.229.03:19:39.55#ibcon#wrote, iclass 22, count 0 2006.229.03:19:39.55#ibcon#about to read 3, iclass 22, count 0 2006.229.03:19:39.59#ibcon#read 3, iclass 22, count 0 2006.229.03:19:39.59#ibcon#about to read 4, iclass 22, count 0 2006.229.03:19:39.59#ibcon#read 4, iclass 22, count 0 2006.229.03:19:39.59#ibcon#about to read 5, iclass 22, count 0 2006.229.03:19:39.59#ibcon#read 5, iclass 22, count 0 2006.229.03:19:39.59#ibcon#about to read 6, iclass 22, count 0 2006.229.03:19:39.59#ibcon#read 6, iclass 22, count 0 2006.229.03:19:39.59#ibcon#end of sib2, iclass 22, count 0 2006.229.03:19:39.59#ibcon#*after write, iclass 22, count 0 2006.229.03:19:39.59#ibcon#*before return 0, iclass 22, count 0 2006.229.03:19:39.59#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:39.59#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:19:39.59#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:19:39.59#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:19:39.59$vck44/vb=3,4 2006.229.03:19:39.59#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.03:19:39.59#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.03:19:39.59#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:39.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:39.65#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:39.65#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:39.65#ibcon#enter wrdev, iclass 24, count 2 2006.229.03:19:39.65#ibcon#first serial, iclass 24, count 2 2006.229.03:19:39.65#ibcon#enter sib2, iclass 24, count 2 2006.229.03:19:39.65#ibcon#flushed, iclass 24, count 2 2006.229.03:19:39.65#ibcon#about to write, iclass 24, count 2 2006.229.03:19:39.65#ibcon#wrote, iclass 24, count 2 2006.229.03:19:39.65#ibcon#about to read 3, iclass 24, count 2 2006.229.03:19:39.67#ibcon#read 3, iclass 24, count 2 2006.229.03:19:39.67#ibcon#about to read 4, iclass 24, count 2 2006.229.03:19:39.67#ibcon#read 4, iclass 24, count 2 2006.229.03:19:39.67#ibcon#about to read 5, iclass 24, count 2 2006.229.03:19:39.67#ibcon#read 5, iclass 24, count 2 2006.229.03:19:39.67#ibcon#about to read 6, iclass 24, count 2 2006.229.03:19:39.67#ibcon#read 6, iclass 24, count 2 2006.229.03:19:39.67#ibcon#end of sib2, iclass 24, count 2 2006.229.03:19:39.67#ibcon#*mode == 0, iclass 24, count 2 2006.229.03:19:39.67#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.03:19:39.67#ibcon#[27=AT03-04\r\n] 2006.229.03:19:39.67#ibcon#*before write, iclass 24, count 2 2006.229.03:19:39.67#ibcon#enter sib2, iclass 24, count 2 2006.229.03:19:39.67#ibcon#flushed, iclass 24, count 2 2006.229.03:19:39.67#ibcon#about to write, iclass 24, count 2 2006.229.03:19:39.67#ibcon#wrote, iclass 24, count 2 2006.229.03:19:39.67#ibcon#about to read 3, iclass 24, count 2 2006.229.03:19:39.70#ibcon#read 3, iclass 24, count 2 2006.229.03:19:39.70#ibcon#about to read 4, iclass 24, count 2 2006.229.03:19:39.70#ibcon#read 4, iclass 24, count 2 2006.229.03:19:39.70#ibcon#about to read 5, iclass 24, count 2 2006.229.03:19:39.70#ibcon#read 5, iclass 24, count 2 2006.229.03:19:39.70#ibcon#about to read 6, iclass 24, count 2 2006.229.03:19:39.70#ibcon#read 6, iclass 24, count 2 2006.229.03:19:39.70#ibcon#end of sib2, iclass 24, count 2 2006.229.03:19:39.70#ibcon#*after write, iclass 24, count 2 2006.229.03:19:39.70#ibcon#*before return 0, iclass 24, count 2 2006.229.03:19:39.70#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:39.70#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:19:39.70#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.03:19:39.70#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:39.70#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:39.82#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:39.82#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:39.82#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:19:39.82#ibcon#first serial, iclass 24, count 0 2006.229.03:19:39.82#ibcon#enter sib2, iclass 24, count 0 2006.229.03:19:39.82#ibcon#flushed, iclass 24, count 0 2006.229.03:19:39.82#ibcon#about to write, iclass 24, count 0 2006.229.03:19:39.82#ibcon#wrote, iclass 24, count 0 2006.229.03:19:39.82#ibcon#about to read 3, iclass 24, count 0 2006.229.03:19:39.84#ibcon#read 3, iclass 24, count 0 2006.229.03:19:39.84#ibcon#about to read 4, iclass 24, count 0 2006.229.03:19:39.84#ibcon#read 4, iclass 24, count 0 2006.229.03:19:39.84#ibcon#about to read 5, iclass 24, count 0 2006.229.03:19:39.84#ibcon#read 5, iclass 24, count 0 2006.229.03:19:39.84#ibcon#about to read 6, iclass 24, count 0 2006.229.03:19:39.84#ibcon#read 6, iclass 24, count 0 2006.229.03:19:39.84#ibcon#end of sib2, iclass 24, count 0 2006.229.03:19:39.84#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:19:39.84#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:19:39.84#ibcon#[27=USB\r\n] 2006.229.03:19:39.84#ibcon#*before write, iclass 24, count 0 2006.229.03:19:39.84#ibcon#enter sib2, iclass 24, count 0 2006.229.03:19:39.84#ibcon#flushed, iclass 24, count 0 2006.229.03:19:39.84#ibcon#about to write, iclass 24, count 0 2006.229.03:19:39.84#ibcon#wrote, iclass 24, count 0 2006.229.03:19:39.84#ibcon#about to read 3, iclass 24, count 0 2006.229.03:19:39.87#ibcon#read 3, iclass 24, count 0 2006.229.03:19:39.87#ibcon#about to read 4, iclass 24, count 0 2006.229.03:19:39.87#ibcon#read 4, iclass 24, count 0 2006.229.03:19:39.87#ibcon#about to read 5, iclass 24, count 0 2006.229.03:19:39.87#ibcon#read 5, iclass 24, count 0 2006.229.03:19:39.87#ibcon#about to read 6, iclass 24, count 0 2006.229.03:19:39.87#ibcon#read 6, iclass 24, count 0 2006.229.03:19:39.87#ibcon#end of sib2, iclass 24, count 0 2006.229.03:19:39.87#ibcon#*after write, iclass 24, count 0 2006.229.03:19:39.87#ibcon#*before return 0, iclass 24, count 0 2006.229.03:19:39.87#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:39.87#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:19:39.87#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:19:39.87#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:19:39.87$vck44/vblo=4,679.99 2006.229.03:19:39.87#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.03:19:39.87#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.03:19:39.87#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:39.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:39.87#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:39.87#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:39.87#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:19:39.87#ibcon#first serial, iclass 26, count 0 2006.229.03:19:39.87#ibcon#enter sib2, iclass 26, count 0 2006.229.03:19:39.87#ibcon#flushed, iclass 26, count 0 2006.229.03:19:39.87#ibcon#about to write, iclass 26, count 0 2006.229.03:19:39.87#ibcon#wrote, iclass 26, count 0 2006.229.03:19:39.87#ibcon#about to read 3, iclass 26, count 0 2006.229.03:19:39.89#ibcon#read 3, iclass 26, count 0 2006.229.03:19:39.89#ibcon#about to read 4, iclass 26, count 0 2006.229.03:19:39.89#ibcon#read 4, iclass 26, count 0 2006.229.03:19:39.89#ibcon#about to read 5, iclass 26, count 0 2006.229.03:19:39.89#ibcon#read 5, iclass 26, count 0 2006.229.03:19:39.89#ibcon#about to read 6, iclass 26, count 0 2006.229.03:19:39.89#ibcon#read 6, iclass 26, count 0 2006.229.03:19:39.89#ibcon#end of sib2, iclass 26, count 0 2006.229.03:19:39.89#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:19:39.89#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:19:39.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:19:39.89#ibcon#*before write, iclass 26, count 0 2006.229.03:19:39.89#ibcon#enter sib2, iclass 26, count 0 2006.229.03:19:39.89#ibcon#flushed, iclass 26, count 0 2006.229.03:19:39.89#ibcon#about to write, iclass 26, count 0 2006.229.03:19:39.89#ibcon#wrote, iclass 26, count 0 2006.229.03:19:39.89#ibcon#about to read 3, iclass 26, count 0 2006.229.03:19:39.93#ibcon#read 3, iclass 26, count 0 2006.229.03:19:39.93#ibcon#about to read 4, iclass 26, count 0 2006.229.03:19:39.93#ibcon#read 4, iclass 26, count 0 2006.229.03:19:39.93#ibcon#about to read 5, iclass 26, count 0 2006.229.03:19:39.93#ibcon#read 5, iclass 26, count 0 2006.229.03:19:39.93#ibcon#about to read 6, iclass 26, count 0 2006.229.03:19:39.93#ibcon#read 6, iclass 26, count 0 2006.229.03:19:39.93#ibcon#end of sib2, iclass 26, count 0 2006.229.03:19:39.93#ibcon#*after write, iclass 26, count 0 2006.229.03:19:39.93#ibcon#*before return 0, iclass 26, count 0 2006.229.03:19:39.93#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:39.93#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:19:39.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:19:39.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:19:39.93$vck44/vb=4,4 2006.229.03:19:39.93#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.03:19:39.93#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.03:19:39.93#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:39.93#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:39.99#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:39.99#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:39.99#ibcon#enter wrdev, iclass 28, count 2 2006.229.03:19:39.99#ibcon#first serial, iclass 28, count 2 2006.229.03:19:39.99#ibcon#enter sib2, iclass 28, count 2 2006.229.03:19:39.99#ibcon#flushed, iclass 28, count 2 2006.229.03:19:39.99#ibcon#about to write, iclass 28, count 2 2006.229.03:19:39.99#ibcon#wrote, iclass 28, count 2 2006.229.03:19:39.99#ibcon#about to read 3, iclass 28, count 2 2006.229.03:19:40.01#ibcon#read 3, iclass 28, count 2 2006.229.03:19:40.01#ibcon#about to read 4, iclass 28, count 2 2006.229.03:19:40.01#ibcon#read 4, iclass 28, count 2 2006.229.03:19:40.01#ibcon#about to read 5, iclass 28, count 2 2006.229.03:19:40.01#ibcon#read 5, iclass 28, count 2 2006.229.03:19:40.01#ibcon#about to read 6, iclass 28, count 2 2006.229.03:19:40.01#ibcon#read 6, iclass 28, count 2 2006.229.03:19:40.01#ibcon#end of sib2, iclass 28, count 2 2006.229.03:19:40.01#ibcon#*mode == 0, iclass 28, count 2 2006.229.03:19:40.01#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.03:19:40.01#ibcon#[27=AT04-04\r\n] 2006.229.03:19:40.01#ibcon#*before write, iclass 28, count 2 2006.229.03:19:40.01#ibcon#enter sib2, iclass 28, count 2 2006.229.03:19:40.01#ibcon#flushed, iclass 28, count 2 2006.229.03:19:40.01#ibcon#about to write, iclass 28, count 2 2006.229.03:19:40.01#ibcon#wrote, iclass 28, count 2 2006.229.03:19:40.01#ibcon#about to read 3, iclass 28, count 2 2006.229.03:19:40.04#ibcon#read 3, iclass 28, count 2 2006.229.03:19:40.04#ibcon#about to read 4, iclass 28, count 2 2006.229.03:19:40.04#ibcon#read 4, iclass 28, count 2 2006.229.03:19:40.04#ibcon#about to read 5, iclass 28, count 2 2006.229.03:19:40.04#ibcon#read 5, iclass 28, count 2 2006.229.03:19:40.04#ibcon#about to read 6, iclass 28, count 2 2006.229.03:19:40.04#ibcon#read 6, iclass 28, count 2 2006.229.03:19:40.04#ibcon#end of sib2, iclass 28, count 2 2006.229.03:19:40.04#ibcon#*after write, iclass 28, count 2 2006.229.03:19:40.04#ibcon#*before return 0, iclass 28, count 2 2006.229.03:19:40.04#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:40.04#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:19:40.04#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.03:19:40.04#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:40.04#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:40.16#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:40.16#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:40.16#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:19:40.16#ibcon#first serial, iclass 28, count 0 2006.229.03:19:40.16#ibcon#enter sib2, iclass 28, count 0 2006.229.03:19:40.16#ibcon#flushed, iclass 28, count 0 2006.229.03:19:40.16#ibcon#about to write, iclass 28, count 0 2006.229.03:19:40.16#ibcon#wrote, iclass 28, count 0 2006.229.03:19:40.16#ibcon#about to read 3, iclass 28, count 0 2006.229.03:19:40.18#ibcon#read 3, iclass 28, count 0 2006.229.03:19:40.18#ibcon#about to read 4, iclass 28, count 0 2006.229.03:19:40.18#ibcon#read 4, iclass 28, count 0 2006.229.03:19:40.18#ibcon#about to read 5, iclass 28, count 0 2006.229.03:19:40.18#ibcon#read 5, iclass 28, count 0 2006.229.03:19:40.18#ibcon#about to read 6, iclass 28, count 0 2006.229.03:19:40.18#ibcon#read 6, iclass 28, count 0 2006.229.03:19:40.18#ibcon#end of sib2, iclass 28, count 0 2006.229.03:19:40.18#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:19:40.18#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:19:40.18#ibcon#[27=USB\r\n] 2006.229.03:19:40.18#ibcon#*before write, iclass 28, count 0 2006.229.03:19:40.18#ibcon#enter sib2, iclass 28, count 0 2006.229.03:19:40.18#ibcon#flushed, iclass 28, count 0 2006.229.03:19:40.18#ibcon#about to write, iclass 28, count 0 2006.229.03:19:40.18#ibcon#wrote, iclass 28, count 0 2006.229.03:19:40.18#ibcon#about to read 3, iclass 28, count 0 2006.229.03:19:40.21#ibcon#read 3, iclass 28, count 0 2006.229.03:19:40.21#ibcon#about to read 4, iclass 28, count 0 2006.229.03:19:40.21#ibcon#read 4, iclass 28, count 0 2006.229.03:19:40.21#ibcon#about to read 5, iclass 28, count 0 2006.229.03:19:40.21#ibcon#read 5, iclass 28, count 0 2006.229.03:19:40.21#ibcon#about to read 6, iclass 28, count 0 2006.229.03:19:40.21#ibcon#read 6, iclass 28, count 0 2006.229.03:19:40.21#ibcon#end of sib2, iclass 28, count 0 2006.229.03:19:40.21#ibcon#*after write, iclass 28, count 0 2006.229.03:19:40.21#ibcon#*before return 0, iclass 28, count 0 2006.229.03:19:40.21#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:40.21#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:19:40.21#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:19:40.21#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:19:40.21$vck44/vblo=5,709.99 2006.229.03:19:40.21#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.03:19:40.21#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.03:19:40.21#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:40.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:40.21#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:40.21#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:40.21#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:19:40.21#ibcon#first serial, iclass 30, count 0 2006.229.03:19:40.21#ibcon#enter sib2, iclass 30, count 0 2006.229.03:19:40.21#ibcon#flushed, iclass 30, count 0 2006.229.03:19:40.21#ibcon#about to write, iclass 30, count 0 2006.229.03:19:40.21#ibcon#wrote, iclass 30, count 0 2006.229.03:19:40.21#ibcon#about to read 3, iclass 30, count 0 2006.229.03:19:40.23#ibcon#read 3, iclass 30, count 0 2006.229.03:19:40.23#ibcon#about to read 4, iclass 30, count 0 2006.229.03:19:40.23#ibcon#read 4, iclass 30, count 0 2006.229.03:19:40.23#ibcon#about to read 5, iclass 30, count 0 2006.229.03:19:40.23#ibcon#read 5, iclass 30, count 0 2006.229.03:19:40.23#ibcon#about to read 6, iclass 30, count 0 2006.229.03:19:40.23#ibcon#read 6, iclass 30, count 0 2006.229.03:19:40.23#ibcon#end of sib2, iclass 30, count 0 2006.229.03:19:40.23#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:19:40.23#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:19:40.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:19:40.23#ibcon#*before write, iclass 30, count 0 2006.229.03:19:40.23#ibcon#enter sib2, iclass 30, count 0 2006.229.03:19:40.23#ibcon#flushed, iclass 30, count 0 2006.229.03:19:40.23#ibcon#about to write, iclass 30, count 0 2006.229.03:19:40.23#ibcon#wrote, iclass 30, count 0 2006.229.03:19:40.23#ibcon#about to read 3, iclass 30, count 0 2006.229.03:19:40.27#ibcon#read 3, iclass 30, count 0 2006.229.03:19:40.27#ibcon#about to read 4, iclass 30, count 0 2006.229.03:19:40.27#ibcon#read 4, iclass 30, count 0 2006.229.03:19:40.27#ibcon#about to read 5, iclass 30, count 0 2006.229.03:19:40.27#ibcon#read 5, iclass 30, count 0 2006.229.03:19:40.27#ibcon#about to read 6, iclass 30, count 0 2006.229.03:19:40.27#ibcon#read 6, iclass 30, count 0 2006.229.03:19:40.27#ibcon#end of sib2, iclass 30, count 0 2006.229.03:19:40.27#ibcon#*after write, iclass 30, count 0 2006.229.03:19:40.27#ibcon#*before return 0, iclass 30, count 0 2006.229.03:19:40.27#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:40.27#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:19:40.27#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:19:40.27#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:19:40.27$vck44/vb=5,4 2006.229.03:19:40.27#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.03:19:40.27#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.03:19:40.27#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:40.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:40.33#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:40.33#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:40.33#ibcon#enter wrdev, iclass 32, count 2 2006.229.03:19:40.33#ibcon#first serial, iclass 32, count 2 2006.229.03:19:40.33#ibcon#enter sib2, iclass 32, count 2 2006.229.03:19:40.33#ibcon#flushed, iclass 32, count 2 2006.229.03:19:40.33#ibcon#about to write, iclass 32, count 2 2006.229.03:19:40.33#ibcon#wrote, iclass 32, count 2 2006.229.03:19:40.33#ibcon#about to read 3, iclass 32, count 2 2006.229.03:19:40.35#ibcon#read 3, iclass 32, count 2 2006.229.03:19:40.35#ibcon#about to read 4, iclass 32, count 2 2006.229.03:19:40.35#ibcon#read 4, iclass 32, count 2 2006.229.03:19:40.35#ibcon#about to read 5, iclass 32, count 2 2006.229.03:19:40.35#ibcon#read 5, iclass 32, count 2 2006.229.03:19:40.35#ibcon#about to read 6, iclass 32, count 2 2006.229.03:19:40.35#ibcon#read 6, iclass 32, count 2 2006.229.03:19:40.35#ibcon#end of sib2, iclass 32, count 2 2006.229.03:19:40.35#ibcon#*mode == 0, iclass 32, count 2 2006.229.03:19:40.35#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.03:19:40.35#ibcon#[27=AT05-04\r\n] 2006.229.03:19:40.35#ibcon#*before write, iclass 32, count 2 2006.229.03:19:40.35#ibcon#enter sib2, iclass 32, count 2 2006.229.03:19:40.35#ibcon#flushed, iclass 32, count 2 2006.229.03:19:40.35#ibcon#about to write, iclass 32, count 2 2006.229.03:19:40.35#ibcon#wrote, iclass 32, count 2 2006.229.03:19:40.35#ibcon#about to read 3, iclass 32, count 2 2006.229.03:19:40.38#ibcon#read 3, iclass 32, count 2 2006.229.03:19:40.38#ibcon#about to read 4, iclass 32, count 2 2006.229.03:19:40.38#ibcon#read 4, iclass 32, count 2 2006.229.03:19:40.38#ibcon#about to read 5, iclass 32, count 2 2006.229.03:19:40.38#ibcon#read 5, iclass 32, count 2 2006.229.03:19:40.38#ibcon#about to read 6, iclass 32, count 2 2006.229.03:19:40.38#ibcon#read 6, iclass 32, count 2 2006.229.03:19:40.38#ibcon#end of sib2, iclass 32, count 2 2006.229.03:19:40.38#ibcon#*after write, iclass 32, count 2 2006.229.03:19:40.38#ibcon#*before return 0, iclass 32, count 2 2006.229.03:19:40.38#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:40.38#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:19:40.38#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.03:19:40.38#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:40.38#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:40.50#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:40.50#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:40.50#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:19:40.50#ibcon#first serial, iclass 32, count 0 2006.229.03:19:40.50#ibcon#enter sib2, iclass 32, count 0 2006.229.03:19:40.50#ibcon#flushed, iclass 32, count 0 2006.229.03:19:40.50#ibcon#about to write, iclass 32, count 0 2006.229.03:19:40.50#ibcon#wrote, iclass 32, count 0 2006.229.03:19:40.50#ibcon#about to read 3, iclass 32, count 0 2006.229.03:19:40.52#ibcon#read 3, iclass 32, count 0 2006.229.03:19:40.52#ibcon#about to read 4, iclass 32, count 0 2006.229.03:19:40.52#ibcon#read 4, iclass 32, count 0 2006.229.03:19:40.52#ibcon#about to read 5, iclass 32, count 0 2006.229.03:19:40.52#ibcon#read 5, iclass 32, count 0 2006.229.03:19:40.52#ibcon#about to read 6, iclass 32, count 0 2006.229.03:19:40.52#ibcon#read 6, iclass 32, count 0 2006.229.03:19:40.52#ibcon#end of sib2, iclass 32, count 0 2006.229.03:19:40.52#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:19:40.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:19:40.52#ibcon#[27=USB\r\n] 2006.229.03:19:40.52#ibcon#*before write, iclass 32, count 0 2006.229.03:19:40.52#ibcon#enter sib2, iclass 32, count 0 2006.229.03:19:40.52#ibcon#flushed, iclass 32, count 0 2006.229.03:19:40.52#ibcon#about to write, iclass 32, count 0 2006.229.03:19:40.52#ibcon#wrote, iclass 32, count 0 2006.229.03:19:40.52#ibcon#about to read 3, iclass 32, count 0 2006.229.03:19:40.55#ibcon#read 3, iclass 32, count 0 2006.229.03:19:40.55#ibcon#about to read 4, iclass 32, count 0 2006.229.03:19:40.55#ibcon#read 4, iclass 32, count 0 2006.229.03:19:40.55#ibcon#about to read 5, iclass 32, count 0 2006.229.03:19:40.55#ibcon#read 5, iclass 32, count 0 2006.229.03:19:40.55#ibcon#about to read 6, iclass 32, count 0 2006.229.03:19:40.55#ibcon#read 6, iclass 32, count 0 2006.229.03:19:40.55#ibcon#end of sib2, iclass 32, count 0 2006.229.03:19:40.55#ibcon#*after write, iclass 32, count 0 2006.229.03:19:40.55#ibcon#*before return 0, iclass 32, count 0 2006.229.03:19:40.55#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:40.55#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:19:40.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:19:40.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:19:40.55$vck44/vblo=6,719.99 2006.229.03:19:40.55#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.03:19:40.55#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.03:19:40.55#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:40.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:40.55#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:40.55#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:40.55#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:19:40.55#ibcon#first serial, iclass 34, count 0 2006.229.03:19:40.55#ibcon#enter sib2, iclass 34, count 0 2006.229.03:19:40.55#ibcon#flushed, iclass 34, count 0 2006.229.03:19:40.55#ibcon#about to write, iclass 34, count 0 2006.229.03:19:40.55#ibcon#wrote, iclass 34, count 0 2006.229.03:19:40.55#ibcon#about to read 3, iclass 34, count 0 2006.229.03:19:40.57#ibcon#read 3, iclass 34, count 0 2006.229.03:19:40.57#ibcon#about to read 4, iclass 34, count 0 2006.229.03:19:40.57#ibcon#read 4, iclass 34, count 0 2006.229.03:19:40.57#ibcon#about to read 5, iclass 34, count 0 2006.229.03:19:40.57#ibcon#read 5, iclass 34, count 0 2006.229.03:19:40.57#ibcon#about to read 6, iclass 34, count 0 2006.229.03:19:40.57#ibcon#read 6, iclass 34, count 0 2006.229.03:19:40.57#ibcon#end of sib2, iclass 34, count 0 2006.229.03:19:40.57#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:19:40.57#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:19:40.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:19:40.57#ibcon#*before write, iclass 34, count 0 2006.229.03:19:40.57#ibcon#enter sib2, iclass 34, count 0 2006.229.03:19:40.57#ibcon#flushed, iclass 34, count 0 2006.229.03:19:40.57#ibcon#about to write, iclass 34, count 0 2006.229.03:19:40.57#ibcon#wrote, iclass 34, count 0 2006.229.03:19:40.57#ibcon#about to read 3, iclass 34, count 0 2006.229.03:19:40.61#ibcon#read 3, iclass 34, count 0 2006.229.03:19:40.61#ibcon#about to read 4, iclass 34, count 0 2006.229.03:19:40.61#ibcon#read 4, iclass 34, count 0 2006.229.03:19:40.61#ibcon#about to read 5, iclass 34, count 0 2006.229.03:19:40.61#ibcon#read 5, iclass 34, count 0 2006.229.03:19:40.61#ibcon#about to read 6, iclass 34, count 0 2006.229.03:19:40.61#ibcon#read 6, iclass 34, count 0 2006.229.03:19:40.61#ibcon#end of sib2, iclass 34, count 0 2006.229.03:19:40.61#ibcon#*after write, iclass 34, count 0 2006.229.03:19:40.61#ibcon#*before return 0, iclass 34, count 0 2006.229.03:19:40.61#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:40.61#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:19:40.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:19:40.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:19:40.61$vck44/vb=6,4 2006.229.03:19:40.61#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.03:19:40.61#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.03:19:40.61#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:40.61#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:40.67#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:40.67#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:40.67#ibcon#enter wrdev, iclass 36, count 2 2006.229.03:19:40.67#ibcon#first serial, iclass 36, count 2 2006.229.03:19:40.67#ibcon#enter sib2, iclass 36, count 2 2006.229.03:19:40.67#ibcon#flushed, iclass 36, count 2 2006.229.03:19:40.67#ibcon#about to write, iclass 36, count 2 2006.229.03:19:40.67#ibcon#wrote, iclass 36, count 2 2006.229.03:19:40.67#ibcon#about to read 3, iclass 36, count 2 2006.229.03:19:40.69#ibcon#read 3, iclass 36, count 2 2006.229.03:19:40.69#ibcon#about to read 4, iclass 36, count 2 2006.229.03:19:40.69#ibcon#read 4, iclass 36, count 2 2006.229.03:19:40.69#ibcon#about to read 5, iclass 36, count 2 2006.229.03:19:40.69#ibcon#read 5, iclass 36, count 2 2006.229.03:19:40.69#ibcon#about to read 6, iclass 36, count 2 2006.229.03:19:40.69#ibcon#read 6, iclass 36, count 2 2006.229.03:19:40.69#ibcon#end of sib2, iclass 36, count 2 2006.229.03:19:40.69#ibcon#*mode == 0, iclass 36, count 2 2006.229.03:19:40.69#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.03:19:40.69#ibcon#[27=AT06-04\r\n] 2006.229.03:19:40.69#ibcon#*before write, iclass 36, count 2 2006.229.03:19:40.69#ibcon#enter sib2, iclass 36, count 2 2006.229.03:19:40.69#ibcon#flushed, iclass 36, count 2 2006.229.03:19:40.69#ibcon#about to write, iclass 36, count 2 2006.229.03:19:40.69#ibcon#wrote, iclass 36, count 2 2006.229.03:19:40.69#ibcon#about to read 3, iclass 36, count 2 2006.229.03:19:40.72#ibcon#read 3, iclass 36, count 2 2006.229.03:19:40.72#ibcon#about to read 4, iclass 36, count 2 2006.229.03:19:40.72#ibcon#read 4, iclass 36, count 2 2006.229.03:19:40.72#ibcon#about to read 5, iclass 36, count 2 2006.229.03:19:40.72#ibcon#read 5, iclass 36, count 2 2006.229.03:19:40.72#ibcon#about to read 6, iclass 36, count 2 2006.229.03:19:40.72#ibcon#read 6, iclass 36, count 2 2006.229.03:19:40.72#ibcon#end of sib2, iclass 36, count 2 2006.229.03:19:40.72#ibcon#*after write, iclass 36, count 2 2006.229.03:19:40.72#ibcon#*before return 0, iclass 36, count 2 2006.229.03:19:40.72#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:40.72#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:19:40.72#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.03:19:40.72#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:40.72#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:40.84#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:40.84#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:40.84#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:19:40.84#ibcon#first serial, iclass 36, count 0 2006.229.03:19:40.84#ibcon#enter sib2, iclass 36, count 0 2006.229.03:19:40.84#ibcon#flushed, iclass 36, count 0 2006.229.03:19:40.84#ibcon#about to write, iclass 36, count 0 2006.229.03:19:40.84#ibcon#wrote, iclass 36, count 0 2006.229.03:19:40.84#ibcon#about to read 3, iclass 36, count 0 2006.229.03:19:40.86#ibcon#read 3, iclass 36, count 0 2006.229.03:19:40.86#ibcon#about to read 4, iclass 36, count 0 2006.229.03:19:40.86#ibcon#read 4, iclass 36, count 0 2006.229.03:19:40.86#ibcon#about to read 5, iclass 36, count 0 2006.229.03:19:40.86#ibcon#read 5, iclass 36, count 0 2006.229.03:19:40.86#ibcon#about to read 6, iclass 36, count 0 2006.229.03:19:40.86#ibcon#read 6, iclass 36, count 0 2006.229.03:19:40.86#ibcon#end of sib2, iclass 36, count 0 2006.229.03:19:40.86#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:19:40.86#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:19:40.86#ibcon#[27=USB\r\n] 2006.229.03:19:40.86#ibcon#*before write, iclass 36, count 0 2006.229.03:19:40.86#ibcon#enter sib2, iclass 36, count 0 2006.229.03:19:40.86#ibcon#flushed, iclass 36, count 0 2006.229.03:19:40.86#ibcon#about to write, iclass 36, count 0 2006.229.03:19:40.86#ibcon#wrote, iclass 36, count 0 2006.229.03:19:40.86#ibcon#about to read 3, iclass 36, count 0 2006.229.03:19:40.89#ibcon#read 3, iclass 36, count 0 2006.229.03:19:40.89#ibcon#about to read 4, iclass 36, count 0 2006.229.03:19:40.89#ibcon#read 4, iclass 36, count 0 2006.229.03:19:40.89#ibcon#about to read 5, iclass 36, count 0 2006.229.03:19:40.89#ibcon#read 5, iclass 36, count 0 2006.229.03:19:40.89#ibcon#about to read 6, iclass 36, count 0 2006.229.03:19:40.89#ibcon#read 6, iclass 36, count 0 2006.229.03:19:40.89#ibcon#end of sib2, iclass 36, count 0 2006.229.03:19:40.89#ibcon#*after write, iclass 36, count 0 2006.229.03:19:40.89#ibcon#*before return 0, iclass 36, count 0 2006.229.03:19:40.89#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:40.89#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:19:40.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:19:40.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:19:40.89$vck44/vblo=7,734.99 2006.229.03:19:40.89#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.03:19:40.89#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.03:19:40.89#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:40.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:40.89#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:40.89#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:40.89#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:19:40.89#ibcon#first serial, iclass 38, count 0 2006.229.03:19:40.89#ibcon#enter sib2, iclass 38, count 0 2006.229.03:19:40.89#ibcon#flushed, iclass 38, count 0 2006.229.03:19:40.89#ibcon#about to write, iclass 38, count 0 2006.229.03:19:40.89#ibcon#wrote, iclass 38, count 0 2006.229.03:19:40.89#ibcon#about to read 3, iclass 38, count 0 2006.229.03:19:40.91#ibcon#read 3, iclass 38, count 0 2006.229.03:19:40.91#ibcon#about to read 4, iclass 38, count 0 2006.229.03:19:40.91#ibcon#read 4, iclass 38, count 0 2006.229.03:19:40.91#ibcon#about to read 5, iclass 38, count 0 2006.229.03:19:40.91#ibcon#read 5, iclass 38, count 0 2006.229.03:19:40.91#ibcon#about to read 6, iclass 38, count 0 2006.229.03:19:40.91#ibcon#read 6, iclass 38, count 0 2006.229.03:19:40.91#ibcon#end of sib2, iclass 38, count 0 2006.229.03:19:40.91#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:19:40.91#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:19:40.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:19:40.91#ibcon#*before write, iclass 38, count 0 2006.229.03:19:40.91#ibcon#enter sib2, iclass 38, count 0 2006.229.03:19:40.91#ibcon#flushed, iclass 38, count 0 2006.229.03:19:40.91#ibcon#about to write, iclass 38, count 0 2006.229.03:19:40.91#ibcon#wrote, iclass 38, count 0 2006.229.03:19:40.91#ibcon#about to read 3, iclass 38, count 0 2006.229.03:19:40.95#ibcon#read 3, iclass 38, count 0 2006.229.03:19:40.95#ibcon#about to read 4, iclass 38, count 0 2006.229.03:19:40.95#ibcon#read 4, iclass 38, count 0 2006.229.03:19:40.95#ibcon#about to read 5, iclass 38, count 0 2006.229.03:19:40.95#ibcon#read 5, iclass 38, count 0 2006.229.03:19:40.95#ibcon#about to read 6, iclass 38, count 0 2006.229.03:19:40.95#ibcon#read 6, iclass 38, count 0 2006.229.03:19:40.95#ibcon#end of sib2, iclass 38, count 0 2006.229.03:19:40.95#ibcon#*after write, iclass 38, count 0 2006.229.03:19:40.95#ibcon#*before return 0, iclass 38, count 0 2006.229.03:19:40.95#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:40.95#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:19:40.95#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:19:40.95#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:19:40.95$vck44/vb=7,4 2006.229.03:19:40.95#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.03:19:40.95#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.03:19:40.95#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:40.95#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:41.01#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:41.01#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:41.01#ibcon#enter wrdev, iclass 40, count 2 2006.229.03:19:41.01#ibcon#first serial, iclass 40, count 2 2006.229.03:19:41.01#ibcon#enter sib2, iclass 40, count 2 2006.229.03:19:41.01#ibcon#flushed, iclass 40, count 2 2006.229.03:19:41.01#ibcon#about to write, iclass 40, count 2 2006.229.03:19:41.01#ibcon#wrote, iclass 40, count 2 2006.229.03:19:41.01#ibcon#about to read 3, iclass 40, count 2 2006.229.03:19:41.03#ibcon#read 3, iclass 40, count 2 2006.229.03:19:41.03#ibcon#about to read 4, iclass 40, count 2 2006.229.03:19:41.03#ibcon#read 4, iclass 40, count 2 2006.229.03:19:41.03#ibcon#about to read 5, iclass 40, count 2 2006.229.03:19:41.03#ibcon#read 5, iclass 40, count 2 2006.229.03:19:41.03#ibcon#about to read 6, iclass 40, count 2 2006.229.03:19:41.03#ibcon#read 6, iclass 40, count 2 2006.229.03:19:41.03#ibcon#end of sib2, iclass 40, count 2 2006.229.03:19:41.03#ibcon#*mode == 0, iclass 40, count 2 2006.229.03:19:41.03#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.03:19:41.03#ibcon#[27=AT07-04\r\n] 2006.229.03:19:41.03#ibcon#*before write, iclass 40, count 2 2006.229.03:19:41.03#ibcon#enter sib2, iclass 40, count 2 2006.229.03:19:41.03#ibcon#flushed, iclass 40, count 2 2006.229.03:19:41.03#ibcon#about to write, iclass 40, count 2 2006.229.03:19:41.03#ibcon#wrote, iclass 40, count 2 2006.229.03:19:41.03#ibcon#about to read 3, iclass 40, count 2 2006.229.03:19:41.06#ibcon#read 3, iclass 40, count 2 2006.229.03:19:41.06#ibcon#about to read 4, iclass 40, count 2 2006.229.03:19:41.06#ibcon#read 4, iclass 40, count 2 2006.229.03:19:41.06#ibcon#about to read 5, iclass 40, count 2 2006.229.03:19:41.06#ibcon#read 5, iclass 40, count 2 2006.229.03:19:41.06#ibcon#about to read 6, iclass 40, count 2 2006.229.03:19:41.06#ibcon#read 6, iclass 40, count 2 2006.229.03:19:41.06#ibcon#end of sib2, iclass 40, count 2 2006.229.03:19:41.06#ibcon#*after write, iclass 40, count 2 2006.229.03:19:41.06#ibcon#*before return 0, iclass 40, count 2 2006.229.03:19:41.06#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:41.06#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:19:41.06#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.03:19:41.06#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:41.06#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:41.18#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:41.18#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:41.18#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:19:41.18#ibcon#first serial, iclass 40, count 0 2006.229.03:19:41.18#ibcon#enter sib2, iclass 40, count 0 2006.229.03:19:41.18#ibcon#flushed, iclass 40, count 0 2006.229.03:19:41.18#ibcon#about to write, iclass 40, count 0 2006.229.03:19:41.18#ibcon#wrote, iclass 40, count 0 2006.229.03:19:41.18#ibcon#about to read 3, iclass 40, count 0 2006.229.03:19:41.20#ibcon#read 3, iclass 40, count 0 2006.229.03:19:41.20#ibcon#about to read 4, iclass 40, count 0 2006.229.03:19:41.20#ibcon#read 4, iclass 40, count 0 2006.229.03:19:41.20#ibcon#about to read 5, iclass 40, count 0 2006.229.03:19:41.20#ibcon#read 5, iclass 40, count 0 2006.229.03:19:41.20#ibcon#about to read 6, iclass 40, count 0 2006.229.03:19:41.20#ibcon#read 6, iclass 40, count 0 2006.229.03:19:41.20#ibcon#end of sib2, iclass 40, count 0 2006.229.03:19:41.20#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:19:41.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:19:41.20#ibcon#[27=USB\r\n] 2006.229.03:19:41.20#ibcon#*before write, iclass 40, count 0 2006.229.03:19:41.20#ibcon#enter sib2, iclass 40, count 0 2006.229.03:19:41.20#ibcon#flushed, iclass 40, count 0 2006.229.03:19:41.20#ibcon#about to write, iclass 40, count 0 2006.229.03:19:41.20#ibcon#wrote, iclass 40, count 0 2006.229.03:19:41.20#ibcon#about to read 3, iclass 40, count 0 2006.229.03:19:41.23#ibcon#read 3, iclass 40, count 0 2006.229.03:19:41.23#ibcon#about to read 4, iclass 40, count 0 2006.229.03:19:41.23#ibcon#read 4, iclass 40, count 0 2006.229.03:19:41.23#ibcon#about to read 5, iclass 40, count 0 2006.229.03:19:41.23#ibcon#read 5, iclass 40, count 0 2006.229.03:19:41.23#ibcon#about to read 6, iclass 40, count 0 2006.229.03:19:41.23#ibcon#read 6, iclass 40, count 0 2006.229.03:19:41.23#ibcon#end of sib2, iclass 40, count 0 2006.229.03:19:41.23#ibcon#*after write, iclass 40, count 0 2006.229.03:19:41.23#ibcon#*before return 0, iclass 40, count 0 2006.229.03:19:41.23#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:41.23#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:19:41.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:19:41.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:19:41.23$vck44/vblo=8,744.99 2006.229.03:19:41.23#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.03:19:41.23#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.03:19:41.23#ibcon#ireg 17 cls_cnt 0 2006.229.03:19:41.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:41.23#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:41.23#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:41.23#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:19:41.23#ibcon#first serial, iclass 4, count 0 2006.229.03:19:41.23#ibcon#enter sib2, iclass 4, count 0 2006.229.03:19:41.23#ibcon#flushed, iclass 4, count 0 2006.229.03:19:41.23#ibcon#about to write, iclass 4, count 0 2006.229.03:19:41.23#ibcon#wrote, iclass 4, count 0 2006.229.03:19:41.23#ibcon#about to read 3, iclass 4, count 0 2006.229.03:19:41.25#ibcon#read 3, iclass 4, count 0 2006.229.03:19:41.25#ibcon#about to read 4, iclass 4, count 0 2006.229.03:19:41.25#ibcon#read 4, iclass 4, count 0 2006.229.03:19:41.25#ibcon#about to read 5, iclass 4, count 0 2006.229.03:19:41.25#ibcon#read 5, iclass 4, count 0 2006.229.03:19:41.25#ibcon#about to read 6, iclass 4, count 0 2006.229.03:19:41.25#ibcon#read 6, iclass 4, count 0 2006.229.03:19:41.25#ibcon#end of sib2, iclass 4, count 0 2006.229.03:19:41.25#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:19:41.25#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:19:41.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:19:41.25#ibcon#*before write, iclass 4, count 0 2006.229.03:19:41.25#ibcon#enter sib2, iclass 4, count 0 2006.229.03:19:41.25#ibcon#flushed, iclass 4, count 0 2006.229.03:19:41.25#ibcon#about to write, iclass 4, count 0 2006.229.03:19:41.25#ibcon#wrote, iclass 4, count 0 2006.229.03:19:41.25#ibcon#about to read 3, iclass 4, count 0 2006.229.03:19:41.29#ibcon#read 3, iclass 4, count 0 2006.229.03:19:41.29#ibcon#about to read 4, iclass 4, count 0 2006.229.03:19:41.29#ibcon#read 4, iclass 4, count 0 2006.229.03:19:41.29#ibcon#about to read 5, iclass 4, count 0 2006.229.03:19:41.29#ibcon#read 5, iclass 4, count 0 2006.229.03:19:41.29#ibcon#about to read 6, iclass 4, count 0 2006.229.03:19:41.29#ibcon#read 6, iclass 4, count 0 2006.229.03:19:41.29#ibcon#end of sib2, iclass 4, count 0 2006.229.03:19:41.29#ibcon#*after write, iclass 4, count 0 2006.229.03:19:41.29#ibcon#*before return 0, iclass 4, count 0 2006.229.03:19:41.29#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:41.29#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:19:41.29#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:19:41.29#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:19:41.29$vck44/vb=8,4 2006.229.03:19:41.29#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.03:19:41.29#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.03:19:41.29#ibcon#ireg 11 cls_cnt 2 2006.229.03:19:41.29#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:41.35#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:41.35#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:41.35#ibcon#enter wrdev, iclass 6, count 2 2006.229.03:19:41.35#ibcon#first serial, iclass 6, count 2 2006.229.03:19:41.35#ibcon#enter sib2, iclass 6, count 2 2006.229.03:19:41.35#ibcon#flushed, iclass 6, count 2 2006.229.03:19:41.35#ibcon#about to write, iclass 6, count 2 2006.229.03:19:41.35#ibcon#wrote, iclass 6, count 2 2006.229.03:19:41.35#ibcon#about to read 3, iclass 6, count 2 2006.229.03:19:41.37#ibcon#read 3, iclass 6, count 2 2006.229.03:19:41.37#ibcon#about to read 4, iclass 6, count 2 2006.229.03:19:41.37#ibcon#read 4, iclass 6, count 2 2006.229.03:19:41.37#ibcon#about to read 5, iclass 6, count 2 2006.229.03:19:41.37#ibcon#read 5, iclass 6, count 2 2006.229.03:19:41.37#ibcon#about to read 6, iclass 6, count 2 2006.229.03:19:41.37#ibcon#read 6, iclass 6, count 2 2006.229.03:19:41.37#ibcon#end of sib2, iclass 6, count 2 2006.229.03:19:41.37#ibcon#*mode == 0, iclass 6, count 2 2006.229.03:19:41.37#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.03:19:41.37#ibcon#[27=AT08-04\r\n] 2006.229.03:19:41.37#ibcon#*before write, iclass 6, count 2 2006.229.03:19:41.37#ibcon#enter sib2, iclass 6, count 2 2006.229.03:19:41.37#ibcon#flushed, iclass 6, count 2 2006.229.03:19:41.37#ibcon#about to write, iclass 6, count 2 2006.229.03:19:41.37#ibcon#wrote, iclass 6, count 2 2006.229.03:19:41.37#ibcon#about to read 3, iclass 6, count 2 2006.229.03:19:41.40#ibcon#read 3, iclass 6, count 2 2006.229.03:19:41.40#ibcon#about to read 4, iclass 6, count 2 2006.229.03:19:41.40#ibcon#read 4, iclass 6, count 2 2006.229.03:19:41.40#ibcon#about to read 5, iclass 6, count 2 2006.229.03:19:41.40#ibcon#read 5, iclass 6, count 2 2006.229.03:19:41.40#ibcon#about to read 6, iclass 6, count 2 2006.229.03:19:41.40#ibcon#read 6, iclass 6, count 2 2006.229.03:19:41.40#ibcon#end of sib2, iclass 6, count 2 2006.229.03:19:41.40#ibcon#*after write, iclass 6, count 2 2006.229.03:19:41.40#ibcon#*before return 0, iclass 6, count 2 2006.229.03:19:41.40#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:41.40#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:19:41.40#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.03:19:41.40#ibcon#ireg 7 cls_cnt 0 2006.229.03:19:41.40#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:41.50#abcon#<5=/04 2.0 3.8 28.771001000.6\r\n> 2006.229.03:19:41.52#abcon#{5=INTERFACE CLEAR} 2006.229.03:19:41.52#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:41.52#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:41.52#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:19:41.52#ibcon#first serial, iclass 6, count 0 2006.229.03:19:41.52#ibcon#enter sib2, iclass 6, count 0 2006.229.03:19:41.52#ibcon#flushed, iclass 6, count 0 2006.229.03:19:41.52#ibcon#about to write, iclass 6, count 0 2006.229.03:19:41.52#ibcon#wrote, iclass 6, count 0 2006.229.03:19:41.52#ibcon#about to read 3, iclass 6, count 0 2006.229.03:19:41.54#ibcon#read 3, iclass 6, count 0 2006.229.03:19:41.54#ibcon#about to read 4, iclass 6, count 0 2006.229.03:19:41.54#ibcon#read 4, iclass 6, count 0 2006.229.03:19:41.54#ibcon#about to read 5, iclass 6, count 0 2006.229.03:19:41.54#ibcon#read 5, iclass 6, count 0 2006.229.03:19:41.54#ibcon#about to read 6, iclass 6, count 0 2006.229.03:19:41.54#ibcon#read 6, iclass 6, count 0 2006.229.03:19:41.54#ibcon#end of sib2, iclass 6, count 0 2006.229.03:19:41.54#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:19:41.54#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:19:41.54#ibcon#[27=USB\r\n] 2006.229.03:19:41.54#ibcon#*before write, iclass 6, count 0 2006.229.03:19:41.54#ibcon#enter sib2, iclass 6, count 0 2006.229.03:19:41.54#ibcon#flushed, iclass 6, count 0 2006.229.03:19:41.54#ibcon#about to write, iclass 6, count 0 2006.229.03:19:41.54#ibcon#wrote, iclass 6, count 0 2006.229.03:19:41.54#ibcon#about to read 3, iclass 6, count 0 2006.229.03:19:41.57#ibcon#read 3, iclass 6, count 0 2006.229.03:19:41.57#ibcon#about to read 4, iclass 6, count 0 2006.229.03:19:41.57#ibcon#read 4, iclass 6, count 0 2006.229.03:19:41.57#ibcon#about to read 5, iclass 6, count 0 2006.229.03:19:41.57#ibcon#read 5, iclass 6, count 0 2006.229.03:19:41.57#ibcon#about to read 6, iclass 6, count 0 2006.229.03:19:41.57#ibcon#read 6, iclass 6, count 0 2006.229.03:19:41.57#ibcon#end of sib2, iclass 6, count 0 2006.229.03:19:41.57#ibcon#*after write, iclass 6, count 0 2006.229.03:19:41.57#ibcon#*before return 0, iclass 6, count 0 2006.229.03:19:41.57#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:41.57#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:19:41.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:19:41.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:19:41.57$vck44/vabw=wide 2006.229.03:19:41.57#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.03:19:41.57#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.03:19:41.57#ibcon#ireg 8 cls_cnt 0 2006.229.03:19:41.57#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:41.57#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:41.57#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:41.57#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:19:41.57#ibcon#first serial, iclass 14, count 0 2006.229.03:19:41.57#ibcon#enter sib2, iclass 14, count 0 2006.229.03:19:41.57#ibcon#flushed, iclass 14, count 0 2006.229.03:19:41.57#ibcon#about to write, iclass 14, count 0 2006.229.03:19:41.57#ibcon#wrote, iclass 14, count 0 2006.229.03:19:41.57#ibcon#about to read 3, iclass 14, count 0 2006.229.03:19:41.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:19:41.59#ibcon#read 3, iclass 14, count 0 2006.229.03:19:41.59#ibcon#about to read 4, iclass 14, count 0 2006.229.03:19:41.59#ibcon#read 4, iclass 14, count 0 2006.229.03:19:41.59#ibcon#about to read 5, iclass 14, count 0 2006.229.03:19:41.59#ibcon#read 5, iclass 14, count 0 2006.229.03:19:41.59#ibcon#about to read 6, iclass 14, count 0 2006.229.03:19:41.59#ibcon#read 6, iclass 14, count 0 2006.229.03:19:41.59#ibcon#end of sib2, iclass 14, count 0 2006.229.03:19:41.59#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:19:41.59#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:19:41.59#ibcon#[25=BW32\r\n] 2006.229.03:19:41.59#ibcon#*before write, iclass 14, count 0 2006.229.03:19:41.59#ibcon#enter sib2, iclass 14, count 0 2006.229.03:19:41.59#ibcon#flushed, iclass 14, count 0 2006.229.03:19:41.59#ibcon#about to write, iclass 14, count 0 2006.229.03:19:41.59#ibcon#wrote, iclass 14, count 0 2006.229.03:19:41.59#ibcon#about to read 3, iclass 14, count 0 2006.229.03:19:41.62#ibcon#read 3, iclass 14, count 0 2006.229.03:19:41.62#ibcon#about to read 4, iclass 14, count 0 2006.229.03:19:41.62#ibcon#read 4, iclass 14, count 0 2006.229.03:19:41.62#ibcon#about to read 5, iclass 14, count 0 2006.229.03:19:41.62#ibcon#read 5, iclass 14, count 0 2006.229.03:19:41.62#ibcon#about to read 6, iclass 14, count 0 2006.229.03:19:41.62#ibcon#read 6, iclass 14, count 0 2006.229.03:19:41.62#ibcon#end of sib2, iclass 14, count 0 2006.229.03:19:41.62#ibcon#*after write, iclass 14, count 0 2006.229.03:19:41.62#ibcon#*before return 0, iclass 14, count 0 2006.229.03:19:41.62#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:41.62#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:19:41.62#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:19:41.62#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:19:41.62$vck44/vbbw=wide 2006.229.03:19:41.62#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:19:41.62#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:19:41.62#ibcon#ireg 8 cls_cnt 0 2006.229.03:19:41.62#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:19:41.69#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:19:41.69#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:19:41.69#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:19:41.69#ibcon#first serial, iclass 16, count 0 2006.229.03:19:41.69#ibcon#enter sib2, iclass 16, count 0 2006.229.03:19:41.69#ibcon#flushed, iclass 16, count 0 2006.229.03:19:41.69#ibcon#about to write, iclass 16, count 0 2006.229.03:19:41.69#ibcon#wrote, iclass 16, count 0 2006.229.03:19:41.69#ibcon#about to read 3, iclass 16, count 0 2006.229.03:19:41.71#ibcon#read 3, iclass 16, count 0 2006.229.03:19:41.71#ibcon#about to read 4, iclass 16, count 0 2006.229.03:19:41.71#ibcon#read 4, iclass 16, count 0 2006.229.03:19:41.71#ibcon#about to read 5, iclass 16, count 0 2006.229.03:19:41.71#ibcon#read 5, iclass 16, count 0 2006.229.03:19:41.71#ibcon#about to read 6, iclass 16, count 0 2006.229.03:19:41.71#ibcon#read 6, iclass 16, count 0 2006.229.03:19:41.71#ibcon#end of sib2, iclass 16, count 0 2006.229.03:19:41.71#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:19:41.71#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:19:41.71#ibcon#[27=BW32\r\n] 2006.229.03:19:41.71#ibcon#*before write, iclass 16, count 0 2006.229.03:19:41.71#ibcon#enter sib2, iclass 16, count 0 2006.229.03:19:41.71#ibcon#flushed, iclass 16, count 0 2006.229.03:19:41.71#ibcon#about to write, iclass 16, count 0 2006.229.03:19:41.71#ibcon#wrote, iclass 16, count 0 2006.229.03:19:41.71#ibcon#about to read 3, iclass 16, count 0 2006.229.03:19:41.74#ibcon#read 3, iclass 16, count 0 2006.229.03:19:41.74#ibcon#about to read 4, iclass 16, count 0 2006.229.03:19:41.74#ibcon#read 4, iclass 16, count 0 2006.229.03:19:41.74#ibcon#about to read 5, iclass 16, count 0 2006.229.03:19:41.74#ibcon#read 5, iclass 16, count 0 2006.229.03:19:41.74#ibcon#about to read 6, iclass 16, count 0 2006.229.03:19:41.74#ibcon#read 6, iclass 16, count 0 2006.229.03:19:41.74#ibcon#end of sib2, iclass 16, count 0 2006.229.03:19:41.74#ibcon#*after write, iclass 16, count 0 2006.229.03:19:41.74#ibcon#*before return 0, iclass 16, count 0 2006.229.03:19:41.74#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:19:41.74#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:19:41.74#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:19:41.74#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:19:41.74$setupk4/ifdk4 2006.229.03:19:41.74$ifdk4/lo= 2006.229.03:19:41.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:19:41.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:19:41.74$ifdk4/patch= 2006.229.03:19:41.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:19:41.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:19:41.75$setupk4/!*+20s 2006.229.03:19:51.67#abcon#<5=/04 2.0 3.8 28.771001000.6\r\n> 2006.229.03:19:51.69#abcon#{5=INTERFACE CLEAR} 2006.229.03:19:51.75#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:19:56.26$setupk4/"tpicd 2006.229.03:19:56.26$setupk4/echo=off 2006.229.03:19:56.26$setupk4/xlog=off 2006.229.03:19:56.26:!2006.229.03:21:52 2006.229.03:20:13.14#trakl#Source acquired 2006.229.03:20:13.14#flagr#flagr/antenna,acquired 2006.229.03:21:52.00:preob 2006.229.03:21:53.14/onsource/TRACKING 2006.229.03:21:53.14:!2006.229.03:22:02 2006.229.03:22:02.00:"tape 2006.229.03:22:02.00:"st=record 2006.229.03:22:02.00:data_valid=on 2006.229.03:22:02.00:midob 2006.229.03:22:02.14/onsource/TRACKING 2006.229.03:22:02.14/wx/28.92,1000.6,100 2006.229.03:22:02.34/cable/+6.4099E-03 2006.229.03:22:03.43/va/01,08,usb,yes,31,34 2006.229.03:22:03.43/va/02,07,usb,yes,34,34 2006.229.03:22:03.43/va/03,06,usb,yes,42,45 2006.229.03:22:03.43/va/04,07,usb,yes,35,37 2006.229.03:22:03.43/va/05,04,usb,yes,31,32 2006.229.03:22:03.43/va/06,04,usb,yes,35,34 2006.229.03:22:03.43/va/07,05,usb,yes,31,31 2006.229.03:22:03.43/va/08,06,usb,yes,22,28 2006.229.03:22:03.66/valo/01,524.99,yes,locked 2006.229.03:22:03.66/valo/02,534.99,yes,locked 2006.229.03:22:03.66/valo/03,564.99,yes,locked 2006.229.03:22:03.66/valo/04,624.99,yes,locked 2006.229.03:22:03.66/valo/05,734.99,yes,locked 2006.229.03:22:03.66/valo/06,814.99,yes,locked 2006.229.03:22:03.66/valo/07,864.99,yes,locked 2006.229.03:22:03.66/valo/08,884.99,yes,locked 2006.229.03:22:04.75/vb/01,04,usb,yes,38,35 2006.229.03:22:04.75/vb/02,04,usb,yes,41,40 2006.229.03:22:04.75/vb/03,04,usb,yes,37,41 2006.229.03:22:04.75/vb/04,04,usb,yes,42,41 2006.229.03:22:04.75/vb/05,04,usb,yes,33,36 2006.229.03:22:04.75/vb/06,04,usb,yes,39,34 2006.229.03:22:04.75/vb/07,04,usb,yes,38,38 2006.229.03:22:04.75/vb/08,04,usb,yes,35,39 2006.229.03:22:04.98/vblo/01,629.99,yes,locked 2006.229.03:22:04.98/vblo/02,634.99,yes,locked 2006.229.03:22:04.98/vblo/03,649.99,yes,locked 2006.229.03:22:04.98/vblo/04,679.99,yes,locked 2006.229.03:22:04.98/vblo/05,709.99,yes,locked 2006.229.03:22:04.98/vblo/06,719.99,yes,locked 2006.229.03:22:04.98/vblo/07,734.99,yes,locked 2006.229.03:22:04.98/vblo/08,744.99,yes,locked 2006.229.03:22:05.13/vabw/8 2006.229.03:22:05.28/vbbw/8 2006.229.03:22:05.45/xfe/off,on,12.0 2006.229.03:22:05.85/ifatt/23,28,28,28 2006.229.03:22:06.08/fmout-gps/S +4.42E-07 2006.229.03:22:06.12:!2006.229.03:23:52 2006.229.03:23:52.00:data_valid=off 2006.229.03:23:52.00:"et 2006.229.03:23:52.00:!+3s 2006.229.03:23:55.01:"tape 2006.229.03:23:55.01:postob 2006.229.03:23:55.22/cable/+6.4095E-03 2006.229.03:23:55.22/wx/29.02,1000.6,99 2006.229.03:23:56.08/fmout-gps/S +4.42E-07 2006.229.03:23:56.08:scan_name=229-0329,jd0608,50 2006.229.03:23:56.08:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.03:23:57.14#flagr#flagr/antenna,new-source 2006.229.03:23:57.14:checkk5 2006.229.03:23:57.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:23:57.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:23:58.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:23:58.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:23:59.15/chk_obsdata//k5ts1/T2290322??a.dat file size is correct (nominal:440MB, actual:440MB). 2006.229.03:23:59.56/chk_obsdata//k5ts2/T2290322??b.dat file size is correct (nominal:440MB, actual:440MB). 2006.229.03:23:59.97/chk_obsdata//k5ts3/T2290322??c.dat file size is correct (nominal:440MB, actual:440MB). 2006.229.03:24:00.36/chk_obsdata//k5ts4/T2290322??d.dat file size is correct (nominal:440MB, actual:440MB). 2006.229.03:24:01.07/k5log//k5ts1_log_newline 2006.229.03:24:01.77/k5log//k5ts2_log_newline 2006.229.03:24:02.49/k5log//k5ts3_log_newline 2006.229.03:24:03.20/k5log//k5ts4_log_newline 2006.229.03:24:03.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:24:03.23:setupk4=1 2006.229.03:24:03.23$setupk4/echo=on 2006.229.03:24:03.23$setupk4/pcalon 2006.229.03:24:03.23$pcalon/"no phase cal control is implemented here 2006.229.03:24:03.23$setupk4/"tpicd=stop 2006.229.03:24:03.23$setupk4/"rec=synch_on 2006.229.03:24:03.23$setupk4/"rec_mode=128 2006.229.03:24:03.23$setupk4/!* 2006.229.03:24:03.23$setupk4/recpk4 2006.229.03:24:03.23$recpk4/recpatch= 2006.229.03:24:03.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:24:03.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:24:03.23$setupk4/vck44 2006.229.03:24:03.23$vck44/valo=1,524.99 2006.229.03:24:03.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.03:24:03.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.03:24:03.23#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:03.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:24:03.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:24:03.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:24:03.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:24:03.23#ibcon#first serial, iclass 13, count 0 2006.229.03:24:03.23#ibcon#enter sib2, iclass 13, count 0 2006.229.03:24:03.23#ibcon#flushed, iclass 13, count 0 2006.229.03:24:03.23#ibcon#about to write, iclass 13, count 0 2006.229.03:24:03.23#ibcon#wrote, iclass 13, count 0 2006.229.03:24:03.23#ibcon#about to read 3, iclass 13, count 0 2006.229.03:24:03.25#ibcon#read 3, iclass 13, count 0 2006.229.03:24:03.25#ibcon#about to read 4, iclass 13, count 0 2006.229.03:24:03.25#ibcon#read 4, iclass 13, count 0 2006.229.03:24:03.25#ibcon#about to read 5, iclass 13, count 0 2006.229.03:24:03.25#ibcon#read 5, iclass 13, count 0 2006.229.03:24:03.25#ibcon#about to read 6, iclass 13, count 0 2006.229.03:24:03.25#ibcon#read 6, iclass 13, count 0 2006.229.03:24:03.25#ibcon#end of sib2, iclass 13, count 0 2006.229.03:24:03.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:24:03.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:24:03.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:24:03.25#ibcon#*before write, iclass 13, count 0 2006.229.03:24:03.25#ibcon#enter sib2, iclass 13, count 0 2006.229.03:24:03.25#ibcon#flushed, iclass 13, count 0 2006.229.03:24:03.25#ibcon#about to write, iclass 13, count 0 2006.229.03:24:03.25#ibcon#wrote, iclass 13, count 0 2006.229.03:24:03.25#ibcon#about to read 3, iclass 13, count 0 2006.229.03:24:03.30#ibcon#read 3, iclass 13, count 0 2006.229.03:24:03.30#ibcon#about to read 4, iclass 13, count 0 2006.229.03:24:03.30#ibcon#read 4, iclass 13, count 0 2006.229.03:24:03.30#ibcon#about to read 5, iclass 13, count 0 2006.229.03:24:03.30#ibcon#read 5, iclass 13, count 0 2006.229.03:24:03.30#ibcon#about to read 6, iclass 13, count 0 2006.229.03:24:03.30#ibcon#read 6, iclass 13, count 0 2006.229.03:24:03.30#ibcon#end of sib2, iclass 13, count 0 2006.229.03:24:03.30#ibcon#*after write, iclass 13, count 0 2006.229.03:24:03.30#ibcon#*before return 0, iclass 13, count 0 2006.229.03:24:03.30#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:24:03.30#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.03:24:03.30#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:24:03.30#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:24:03.30$vck44/va=1,8 2006.229.03:24:03.30#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.03:24:03.30#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.03:24:03.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:03.30#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:24:03.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:24:03.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:24:03.30#ibcon#enter wrdev, iclass 15, count 2 2006.229.03:24:03.30#ibcon#first serial, iclass 15, count 2 2006.229.03:24:03.30#ibcon#enter sib2, iclass 15, count 2 2006.229.03:24:03.30#ibcon#flushed, iclass 15, count 2 2006.229.03:24:03.30#ibcon#about to write, iclass 15, count 2 2006.229.03:24:03.30#ibcon#wrote, iclass 15, count 2 2006.229.03:24:03.30#ibcon#about to read 3, iclass 15, count 2 2006.229.03:24:03.32#ibcon#read 3, iclass 15, count 2 2006.229.03:24:03.32#ibcon#about to read 4, iclass 15, count 2 2006.229.03:24:03.32#ibcon#read 4, iclass 15, count 2 2006.229.03:24:03.32#ibcon#about to read 5, iclass 15, count 2 2006.229.03:24:03.32#ibcon#read 5, iclass 15, count 2 2006.229.03:24:03.32#ibcon#about to read 6, iclass 15, count 2 2006.229.03:24:03.32#ibcon#read 6, iclass 15, count 2 2006.229.03:24:03.32#ibcon#end of sib2, iclass 15, count 2 2006.229.03:24:03.32#ibcon#*mode == 0, iclass 15, count 2 2006.229.03:24:03.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.03:24:03.32#ibcon#[25=AT01-08\r\n] 2006.229.03:24:03.32#ibcon#*before write, iclass 15, count 2 2006.229.03:24:03.32#ibcon#enter sib2, iclass 15, count 2 2006.229.03:24:03.32#ibcon#flushed, iclass 15, count 2 2006.229.03:24:03.32#ibcon#about to write, iclass 15, count 2 2006.229.03:24:03.32#ibcon#wrote, iclass 15, count 2 2006.229.03:24:03.32#ibcon#about to read 3, iclass 15, count 2 2006.229.03:24:03.35#ibcon#read 3, iclass 15, count 2 2006.229.03:24:03.35#ibcon#about to read 4, iclass 15, count 2 2006.229.03:24:03.35#ibcon#read 4, iclass 15, count 2 2006.229.03:24:03.35#ibcon#about to read 5, iclass 15, count 2 2006.229.03:24:03.35#ibcon#read 5, iclass 15, count 2 2006.229.03:24:03.35#ibcon#about to read 6, iclass 15, count 2 2006.229.03:24:03.35#ibcon#read 6, iclass 15, count 2 2006.229.03:24:03.35#ibcon#end of sib2, iclass 15, count 2 2006.229.03:24:03.35#ibcon#*after write, iclass 15, count 2 2006.229.03:24:03.35#ibcon#*before return 0, iclass 15, count 2 2006.229.03:24:03.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:24:03.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.03:24:03.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.03:24:03.35#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:03.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:24:03.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:24:03.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:24:03.47#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:24:03.47#ibcon#first serial, iclass 15, count 0 2006.229.03:24:03.47#ibcon#enter sib2, iclass 15, count 0 2006.229.03:24:03.47#ibcon#flushed, iclass 15, count 0 2006.229.03:24:03.47#ibcon#about to write, iclass 15, count 0 2006.229.03:24:03.47#ibcon#wrote, iclass 15, count 0 2006.229.03:24:03.47#ibcon#about to read 3, iclass 15, count 0 2006.229.03:24:03.49#ibcon#read 3, iclass 15, count 0 2006.229.03:24:03.49#ibcon#about to read 4, iclass 15, count 0 2006.229.03:24:03.49#ibcon#read 4, iclass 15, count 0 2006.229.03:24:03.49#ibcon#about to read 5, iclass 15, count 0 2006.229.03:24:03.49#ibcon#read 5, iclass 15, count 0 2006.229.03:24:03.49#ibcon#about to read 6, iclass 15, count 0 2006.229.03:24:03.49#ibcon#read 6, iclass 15, count 0 2006.229.03:24:03.49#ibcon#end of sib2, iclass 15, count 0 2006.229.03:24:03.49#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:24:03.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:24:03.49#ibcon#[25=USB\r\n] 2006.229.03:24:03.49#ibcon#*before write, iclass 15, count 0 2006.229.03:24:03.49#ibcon#enter sib2, iclass 15, count 0 2006.229.03:24:03.49#ibcon#flushed, iclass 15, count 0 2006.229.03:24:03.49#ibcon#about to write, iclass 15, count 0 2006.229.03:24:03.49#ibcon#wrote, iclass 15, count 0 2006.229.03:24:03.49#ibcon#about to read 3, iclass 15, count 0 2006.229.03:24:03.52#ibcon#read 3, iclass 15, count 0 2006.229.03:24:03.52#ibcon#about to read 4, iclass 15, count 0 2006.229.03:24:03.52#ibcon#read 4, iclass 15, count 0 2006.229.03:24:03.52#ibcon#about to read 5, iclass 15, count 0 2006.229.03:24:03.52#ibcon#read 5, iclass 15, count 0 2006.229.03:24:03.52#ibcon#about to read 6, iclass 15, count 0 2006.229.03:24:03.52#ibcon#read 6, iclass 15, count 0 2006.229.03:24:03.52#ibcon#end of sib2, iclass 15, count 0 2006.229.03:24:03.52#ibcon#*after write, iclass 15, count 0 2006.229.03:24:03.52#ibcon#*before return 0, iclass 15, count 0 2006.229.03:24:03.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:24:03.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.03:24:03.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:24:03.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:24:03.52$vck44/valo=2,534.99 2006.229.03:24:03.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.03:24:03.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.03:24:03.52#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:03.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:03.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:03.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:03.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:24:03.52#ibcon#first serial, iclass 17, count 0 2006.229.03:24:03.52#ibcon#enter sib2, iclass 17, count 0 2006.229.03:24:03.52#ibcon#flushed, iclass 17, count 0 2006.229.03:24:03.52#ibcon#about to write, iclass 17, count 0 2006.229.03:24:03.52#ibcon#wrote, iclass 17, count 0 2006.229.03:24:03.52#ibcon#about to read 3, iclass 17, count 0 2006.229.03:24:03.54#ibcon#read 3, iclass 17, count 0 2006.229.03:24:03.54#ibcon#about to read 4, iclass 17, count 0 2006.229.03:24:03.54#ibcon#read 4, iclass 17, count 0 2006.229.03:24:03.54#ibcon#about to read 5, iclass 17, count 0 2006.229.03:24:03.54#ibcon#read 5, iclass 17, count 0 2006.229.03:24:03.54#ibcon#about to read 6, iclass 17, count 0 2006.229.03:24:03.54#ibcon#read 6, iclass 17, count 0 2006.229.03:24:03.54#ibcon#end of sib2, iclass 17, count 0 2006.229.03:24:03.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:24:03.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:24:03.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:24:03.54#ibcon#*before write, iclass 17, count 0 2006.229.03:24:03.54#ibcon#enter sib2, iclass 17, count 0 2006.229.03:24:03.54#ibcon#flushed, iclass 17, count 0 2006.229.03:24:03.54#ibcon#about to write, iclass 17, count 0 2006.229.03:24:03.54#ibcon#wrote, iclass 17, count 0 2006.229.03:24:03.54#ibcon#about to read 3, iclass 17, count 0 2006.229.03:24:03.58#ibcon#read 3, iclass 17, count 0 2006.229.03:24:03.58#ibcon#about to read 4, iclass 17, count 0 2006.229.03:24:03.58#ibcon#read 4, iclass 17, count 0 2006.229.03:24:03.58#ibcon#about to read 5, iclass 17, count 0 2006.229.03:24:03.58#ibcon#read 5, iclass 17, count 0 2006.229.03:24:03.58#ibcon#about to read 6, iclass 17, count 0 2006.229.03:24:03.58#ibcon#read 6, iclass 17, count 0 2006.229.03:24:03.58#ibcon#end of sib2, iclass 17, count 0 2006.229.03:24:03.58#ibcon#*after write, iclass 17, count 0 2006.229.03:24:03.58#ibcon#*before return 0, iclass 17, count 0 2006.229.03:24:03.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:03.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:03.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:24:03.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:24:03.58$vck44/va=2,7 2006.229.03:24:03.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.03:24:03.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.03:24:03.58#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:03.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:03.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:03.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:03.64#ibcon#enter wrdev, iclass 19, count 2 2006.229.03:24:03.64#ibcon#first serial, iclass 19, count 2 2006.229.03:24:03.64#ibcon#enter sib2, iclass 19, count 2 2006.229.03:24:03.64#ibcon#flushed, iclass 19, count 2 2006.229.03:24:03.64#ibcon#about to write, iclass 19, count 2 2006.229.03:24:03.64#ibcon#wrote, iclass 19, count 2 2006.229.03:24:03.64#ibcon#about to read 3, iclass 19, count 2 2006.229.03:24:03.66#ibcon#read 3, iclass 19, count 2 2006.229.03:24:03.66#ibcon#about to read 4, iclass 19, count 2 2006.229.03:24:03.66#ibcon#read 4, iclass 19, count 2 2006.229.03:24:03.66#ibcon#about to read 5, iclass 19, count 2 2006.229.03:24:03.66#ibcon#read 5, iclass 19, count 2 2006.229.03:24:03.66#ibcon#about to read 6, iclass 19, count 2 2006.229.03:24:03.66#ibcon#read 6, iclass 19, count 2 2006.229.03:24:03.66#ibcon#end of sib2, iclass 19, count 2 2006.229.03:24:03.66#ibcon#*mode == 0, iclass 19, count 2 2006.229.03:24:03.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.03:24:03.66#ibcon#[25=AT02-07\r\n] 2006.229.03:24:03.66#ibcon#*before write, iclass 19, count 2 2006.229.03:24:03.66#ibcon#enter sib2, iclass 19, count 2 2006.229.03:24:03.66#ibcon#flushed, iclass 19, count 2 2006.229.03:24:03.66#ibcon#about to write, iclass 19, count 2 2006.229.03:24:03.66#ibcon#wrote, iclass 19, count 2 2006.229.03:24:03.66#ibcon#about to read 3, iclass 19, count 2 2006.229.03:24:03.69#ibcon#read 3, iclass 19, count 2 2006.229.03:24:03.69#ibcon#about to read 4, iclass 19, count 2 2006.229.03:24:03.69#ibcon#read 4, iclass 19, count 2 2006.229.03:24:03.69#ibcon#about to read 5, iclass 19, count 2 2006.229.03:24:03.69#ibcon#read 5, iclass 19, count 2 2006.229.03:24:03.69#ibcon#about to read 6, iclass 19, count 2 2006.229.03:24:03.69#ibcon#read 6, iclass 19, count 2 2006.229.03:24:03.69#ibcon#end of sib2, iclass 19, count 2 2006.229.03:24:03.69#ibcon#*after write, iclass 19, count 2 2006.229.03:24:03.69#ibcon#*before return 0, iclass 19, count 2 2006.229.03:24:03.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:03.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:03.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.03:24:03.69#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:03.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:03.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:03.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:03.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:24:03.81#ibcon#first serial, iclass 19, count 0 2006.229.03:24:03.81#ibcon#enter sib2, iclass 19, count 0 2006.229.03:24:03.81#ibcon#flushed, iclass 19, count 0 2006.229.03:24:03.81#ibcon#about to write, iclass 19, count 0 2006.229.03:24:03.81#ibcon#wrote, iclass 19, count 0 2006.229.03:24:03.81#ibcon#about to read 3, iclass 19, count 0 2006.229.03:24:03.83#ibcon#read 3, iclass 19, count 0 2006.229.03:24:03.83#ibcon#about to read 4, iclass 19, count 0 2006.229.03:24:03.83#ibcon#read 4, iclass 19, count 0 2006.229.03:24:03.83#ibcon#about to read 5, iclass 19, count 0 2006.229.03:24:03.83#ibcon#read 5, iclass 19, count 0 2006.229.03:24:03.83#ibcon#about to read 6, iclass 19, count 0 2006.229.03:24:03.83#ibcon#read 6, iclass 19, count 0 2006.229.03:24:03.83#ibcon#end of sib2, iclass 19, count 0 2006.229.03:24:03.83#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:24:03.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:24:03.83#ibcon#[25=USB\r\n] 2006.229.03:24:03.83#ibcon#*before write, iclass 19, count 0 2006.229.03:24:03.83#ibcon#enter sib2, iclass 19, count 0 2006.229.03:24:03.83#ibcon#flushed, iclass 19, count 0 2006.229.03:24:03.83#ibcon#about to write, iclass 19, count 0 2006.229.03:24:03.83#ibcon#wrote, iclass 19, count 0 2006.229.03:24:03.83#ibcon#about to read 3, iclass 19, count 0 2006.229.03:24:03.86#ibcon#read 3, iclass 19, count 0 2006.229.03:24:03.86#ibcon#about to read 4, iclass 19, count 0 2006.229.03:24:03.86#ibcon#read 4, iclass 19, count 0 2006.229.03:24:03.86#ibcon#about to read 5, iclass 19, count 0 2006.229.03:24:03.86#ibcon#read 5, iclass 19, count 0 2006.229.03:24:03.86#ibcon#about to read 6, iclass 19, count 0 2006.229.03:24:03.86#ibcon#read 6, iclass 19, count 0 2006.229.03:24:03.86#ibcon#end of sib2, iclass 19, count 0 2006.229.03:24:03.86#ibcon#*after write, iclass 19, count 0 2006.229.03:24:03.86#ibcon#*before return 0, iclass 19, count 0 2006.229.03:24:03.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:03.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:03.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:24:03.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:24:03.86$vck44/valo=3,564.99 2006.229.03:24:03.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.03:24:03.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.03:24:03.86#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:03.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:03.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:03.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:03.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:24:03.86#ibcon#first serial, iclass 21, count 0 2006.229.03:24:03.86#ibcon#enter sib2, iclass 21, count 0 2006.229.03:24:03.86#ibcon#flushed, iclass 21, count 0 2006.229.03:24:03.86#ibcon#about to write, iclass 21, count 0 2006.229.03:24:03.86#ibcon#wrote, iclass 21, count 0 2006.229.03:24:03.86#ibcon#about to read 3, iclass 21, count 0 2006.229.03:24:03.88#ibcon#read 3, iclass 21, count 0 2006.229.03:24:03.88#ibcon#about to read 4, iclass 21, count 0 2006.229.03:24:03.88#ibcon#read 4, iclass 21, count 0 2006.229.03:24:03.88#ibcon#about to read 5, iclass 21, count 0 2006.229.03:24:03.88#ibcon#read 5, iclass 21, count 0 2006.229.03:24:03.88#ibcon#about to read 6, iclass 21, count 0 2006.229.03:24:03.88#ibcon#read 6, iclass 21, count 0 2006.229.03:24:03.88#ibcon#end of sib2, iclass 21, count 0 2006.229.03:24:03.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:24:03.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:24:03.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:24:03.88#ibcon#*before write, iclass 21, count 0 2006.229.03:24:03.88#ibcon#enter sib2, iclass 21, count 0 2006.229.03:24:03.88#ibcon#flushed, iclass 21, count 0 2006.229.03:24:03.88#ibcon#about to write, iclass 21, count 0 2006.229.03:24:03.88#ibcon#wrote, iclass 21, count 0 2006.229.03:24:03.88#ibcon#about to read 3, iclass 21, count 0 2006.229.03:24:03.92#ibcon#read 3, iclass 21, count 0 2006.229.03:24:03.92#ibcon#about to read 4, iclass 21, count 0 2006.229.03:24:03.92#ibcon#read 4, iclass 21, count 0 2006.229.03:24:03.92#ibcon#about to read 5, iclass 21, count 0 2006.229.03:24:03.92#ibcon#read 5, iclass 21, count 0 2006.229.03:24:03.92#ibcon#about to read 6, iclass 21, count 0 2006.229.03:24:03.92#ibcon#read 6, iclass 21, count 0 2006.229.03:24:03.92#ibcon#end of sib2, iclass 21, count 0 2006.229.03:24:03.92#ibcon#*after write, iclass 21, count 0 2006.229.03:24:03.92#ibcon#*before return 0, iclass 21, count 0 2006.229.03:24:03.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:03.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:03.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:24:03.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:24:03.92$vck44/va=3,6 2006.229.03:24:03.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.03:24:03.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.03:24:03.92#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:03.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:03.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:03.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:03.98#ibcon#enter wrdev, iclass 23, count 2 2006.229.03:24:03.98#ibcon#first serial, iclass 23, count 2 2006.229.03:24:03.98#ibcon#enter sib2, iclass 23, count 2 2006.229.03:24:03.98#ibcon#flushed, iclass 23, count 2 2006.229.03:24:03.98#ibcon#about to write, iclass 23, count 2 2006.229.03:24:03.98#ibcon#wrote, iclass 23, count 2 2006.229.03:24:03.98#ibcon#about to read 3, iclass 23, count 2 2006.229.03:24:04.00#ibcon#read 3, iclass 23, count 2 2006.229.03:24:04.00#ibcon#about to read 4, iclass 23, count 2 2006.229.03:24:04.00#ibcon#read 4, iclass 23, count 2 2006.229.03:24:04.00#ibcon#about to read 5, iclass 23, count 2 2006.229.03:24:04.00#ibcon#read 5, iclass 23, count 2 2006.229.03:24:04.00#ibcon#about to read 6, iclass 23, count 2 2006.229.03:24:04.00#ibcon#read 6, iclass 23, count 2 2006.229.03:24:04.00#ibcon#end of sib2, iclass 23, count 2 2006.229.03:24:04.00#ibcon#*mode == 0, iclass 23, count 2 2006.229.03:24:04.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.03:24:04.00#ibcon#[25=AT03-06\r\n] 2006.229.03:24:04.00#ibcon#*before write, iclass 23, count 2 2006.229.03:24:04.00#ibcon#enter sib2, iclass 23, count 2 2006.229.03:24:04.00#ibcon#flushed, iclass 23, count 2 2006.229.03:24:04.00#ibcon#about to write, iclass 23, count 2 2006.229.03:24:04.00#ibcon#wrote, iclass 23, count 2 2006.229.03:24:04.00#ibcon#about to read 3, iclass 23, count 2 2006.229.03:24:04.03#ibcon#read 3, iclass 23, count 2 2006.229.03:24:04.03#ibcon#about to read 4, iclass 23, count 2 2006.229.03:24:04.03#ibcon#read 4, iclass 23, count 2 2006.229.03:24:04.03#ibcon#about to read 5, iclass 23, count 2 2006.229.03:24:04.03#ibcon#read 5, iclass 23, count 2 2006.229.03:24:04.03#ibcon#about to read 6, iclass 23, count 2 2006.229.03:24:04.03#ibcon#read 6, iclass 23, count 2 2006.229.03:24:04.03#ibcon#end of sib2, iclass 23, count 2 2006.229.03:24:04.03#ibcon#*after write, iclass 23, count 2 2006.229.03:24:04.03#ibcon#*before return 0, iclass 23, count 2 2006.229.03:24:04.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:04.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:04.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.03:24:04.03#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:04.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:04.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:04.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:04.15#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:24:04.15#ibcon#first serial, iclass 23, count 0 2006.229.03:24:04.15#ibcon#enter sib2, iclass 23, count 0 2006.229.03:24:04.15#ibcon#flushed, iclass 23, count 0 2006.229.03:24:04.15#ibcon#about to write, iclass 23, count 0 2006.229.03:24:04.15#ibcon#wrote, iclass 23, count 0 2006.229.03:24:04.15#ibcon#about to read 3, iclass 23, count 0 2006.229.03:24:04.17#ibcon#read 3, iclass 23, count 0 2006.229.03:24:04.17#ibcon#about to read 4, iclass 23, count 0 2006.229.03:24:04.17#ibcon#read 4, iclass 23, count 0 2006.229.03:24:04.17#ibcon#about to read 5, iclass 23, count 0 2006.229.03:24:04.17#ibcon#read 5, iclass 23, count 0 2006.229.03:24:04.17#ibcon#about to read 6, iclass 23, count 0 2006.229.03:24:04.17#ibcon#read 6, iclass 23, count 0 2006.229.03:24:04.17#ibcon#end of sib2, iclass 23, count 0 2006.229.03:24:04.17#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:24:04.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:24:04.17#ibcon#[25=USB\r\n] 2006.229.03:24:04.17#ibcon#*before write, iclass 23, count 0 2006.229.03:24:04.17#ibcon#enter sib2, iclass 23, count 0 2006.229.03:24:04.17#ibcon#flushed, iclass 23, count 0 2006.229.03:24:04.17#ibcon#about to write, iclass 23, count 0 2006.229.03:24:04.17#ibcon#wrote, iclass 23, count 0 2006.229.03:24:04.17#ibcon#about to read 3, iclass 23, count 0 2006.229.03:24:04.20#ibcon#read 3, iclass 23, count 0 2006.229.03:24:04.20#ibcon#about to read 4, iclass 23, count 0 2006.229.03:24:04.20#ibcon#read 4, iclass 23, count 0 2006.229.03:24:04.20#ibcon#about to read 5, iclass 23, count 0 2006.229.03:24:04.20#ibcon#read 5, iclass 23, count 0 2006.229.03:24:04.20#ibcon#about to read 6, iclass 23, count 0 2006.229.03:24:04.20#ibcon#read 6, iclass 23, count 0 2006.229.03:24:04.20#ibcon#end of sib2, iclass 23, count 0 2006.229.03:24:04.20#ibcon#*after write, iclass 23, count 0 2006.229.03:24:04.20#ibcon#*before return 0, iclass 23, count 0 2006.229.03:24:04.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:04.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:04.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:24:04.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:24:04.20$vck44/valo=4,624.99 2006.229.03:24:04.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.03:24:04.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.03:24:04.20#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:04.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:04.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:04.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:04.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:24:04.20#ibcon#first serial, iclass 25, count 0 2006.229.03:24:04.20#ibcon#enter sib2, iclass 25, count 0 2006.229.03:24:04.20#ibcon#flushed, iclass 25, count 0 2006.229.03:24:04.20#ibcon#about to write, iclass 25, count 0 2006.229.03:24:04.20#ibcon#wrote, iclass 25, count 0 2006.229.03:24:04.20#ibcon#about to read 3, iclass 25, count 0 2006.229.03:24:04.22#ibcon#read 3, iclass 25, count 0 2006.229.03:24:04.22#ibcon#about to read 4, iclass 25, count 0 2006.229.03:24:04.22#ibcon#read 4, iclass 25, count 0 2006.229.03:24:04.22#ibcon#about to read 5, iclass 25, count 0 2006.229.03:24:04.22#ibcon#read 5, iclass 25, count 0 2006.229.03:24:04.22#ibcon#about to read 6, iclass 25, count 0 2006.229.03:24:04.22#ibcon#read 6, iclass 25, count 0 2006.229.03:24:04.22#ibcon#end of sib2, iclass 25, count 0 2006.229.03:24:04.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:24:04.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:24:04.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:24:04.22#ibcon#*before write, iclass 25, count 0 2006.229.03:24:04.22#ibcon#enter sib2, iclass 25, count 0 2006.229.03:24:04.22#ibcon#flushed, iclass 25, count 0 2006.229.03:24:04.22#ibcon#about to write, iclass 25, count 0 2006.229.03:24:04.22#ibcon#wrote, iclass 25, count 0 2006.229.03:24:04.22#ibcon#about to read 3, iclass 25, count 0 2006.229.03:24:04.26#ibcon#read 3, iclass 25, count 0 2006.229.03:24:04.26#ibcon#about to read 4, iclass 25, count 0 2006.229.03:24:04.26#ibcon#read 4, iclass 25, count 0 2006.229.03:24:04.26#ibcon#about to read 5, iclass 25, count 0 2006.229.03:24:04.26#ibcon#read 5, iclass 25, count 0 2006.229.03:24:04.26#ibcon#about to read 6, iclass 25, count 0 2006.229.03:24:04.26#ibcon#read 6, iclass 25, count 0 2006.229.03:24:04.26#ibcon#end of sib2, iclass 25, count 0 2006.229.03:24:04.26#ibcon#*after write, iclass 25, count 0 2006.229.03:24:04.26#ibcon#*before return 0, iclass 25, count 0 2006.229.03:24:04.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:04.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:04.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:24:04.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:24:04.26$vck44/va=4,7 2006.229.03:24:04.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.03:24:04.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.03:24:04.26#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:04.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:04.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:04.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:04.32#ibcon#enter wrdev, iclass 27, count 2 2006.229.03:24:04.32#ibcon#first serial, iclass 27, count 2 2006.229.03:24:04.32#ibcon#enter sib2, iclass 27, count 2 2006.229.03:24:04.32#ibcon#flushed, iclass 27, count 2 2006.229.03:24:04.32#ibcon#about to write, iclass 27, count 2 2006.229.03:24:04.32#ibcon#wrote, iclass 27, count 2 2006.229.03:24:04.32#ibcon#about to read 3, iclass 27, count 2 2006.229.03:24:04.34#ibcon#read 3, iclass 27, count 2 2006.229.03:24:04.34#ibcon#about to read 4, iclass 27, count 2 2006.229.03:24:04.34#ibcon#read 4, iclass 27, count 2 2006.229.03:24:04.34#ibcon#about to read 5, iclass 27, count 2 2006.229.03:24:04.34#ibcon#read 5, iclass 27, count 2 2006.229.03:24:04.34#ibcon#about to read 6, iclass 27, count 2 2006.229.03:24:04.34#ibcon#read 6, iclass 27, count 2 2006.229.03:24:04.34#ibcon#end of sib2, iclass 27, count 2 2006.229.03:24:04.34#ibcon#*mode == 0, iclass 27, count 2 2006.229.03:24:04.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.03:24:04.34#ibcon#[25=AT04-07\r\n] 2006.229.03:24:04.34#ibcon#*before write, iclass 27, count 2 2006.229.03:24:04.34#ibcon#enter sib2, iclass 27, count 2 2006.229.03:24:04.34#ibcon#flushed, iclass 27, count 2 2006.229.03:24:04.34#ibcon#about to write, iclass 27, count 2 2006.229.03:24:04.34#ibcon#wrote, iclass 27, count 2 2006.229.03:24:04.34#ibcon#about to read 3, iclass 27, count 2 2006.229.03:24:04.37#ibcon#read 3, iclass 27, count 2 2006.229.03:24:04.37#ibcon#about to read 4, iclass 27, count 2 2006.229.03:24:04.37#ibcon#read 4, iclass 27, count 2 2006.229.03:24:04.37#ibcon#about to read 5, iclass 27, count 2 2006.229.03:24:04.37#ibcon#read 5, iclass 27, count 2 2006.229.03:24:04.37#ibcon#about to read 6, iclass 27, count 2 2006.229.03:24:04.37#ibcon#read 6, iclass 27, count 2 2006.229.03:24:04.37#ibcon#end of sib2, iclass 27, count 2 2006.229.03:24:04.37#ibcon#*after write, iclass 27, count 2 2006.229.03:24:04.37#ibcon#*before return 0, iclass 27, count 2 2006.229.03:24:04.40#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:04.40#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:04.40#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.03:24:04.40#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:04.40#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:04.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:04.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:04.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:24:04.51#ibcon#first serial, iclass 27, count 0 2006.229.03:24:04.51#ibcon#enter sib2, iclass 27, count 0 2006.229.03:24:04.51#ibcon#flushed, iclass 27, count 0 2006.229.03:24:04.51#ibcon#about to write, iclass 27, count 0 2006.229.03:24:04.51#ibcon#wrote, iclass 27, count 0 2006.229.03:24:04.51#ibcon#about to read 3, iclass 27, count 0 2006.229.03:24:04.53#ibcon#read 3, iclass 27, count 0 2006.229.03:24:04.53#ibcon#about to read 4, iclass 27, count 0 2006.229.03:24:04.53#ibcon#read 4, iclass 27, count 0 2006.229.03:24:04.53#ibcon#about to read 5, iclass 27, count 0 2006.229.03:24:04.53#ibcon#read 5, iclass 27, count 0 2006.229.03:24:04.53#ibcon#about to read 6, iclass 27, count 0 2006.229.03:24:04.53#ibcon#read 6, iclass 27, count 0 2006.229.03:24:04.53#ibcon#end of sib2, iclass 27, count 0 2006.229.03:24:04.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:24:04.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:24:04.53#ibcon#[25=USB\r\n] 2006.229.03:24:04.53#ibcon#*before write, iclass 27, count 0 2006.229.03:24:04.53#ibcon#enter sib2, iclass 27, count 0 2006.229.03:24:04.53#ibcon#flushed, iclass 27, count 0 2006.229.03:24:04.53#ibcon#about to write, iclass 27, count 0 2006.229.03:24:04.53#ibcon#wrote, iclass 27, count 0 2006.229.03:24:04.53#ibcon#about to read 3, iclass 27, count 0 2006.229.03:24:04.56#ibcon#read 3, iclass 27, count 0 2006.229.03:24:04.56#ibcon#about to read 4, iclass 27, count 0 2006.229.03:24:04.56#ibcon#read 4, iclass 27, count 0 2006.229.03:24:04.56#ibcon#about to read 5, iclass 27, count 0 2006.229.03:24:04.56#ibcon#read 5, iclass 27, count 0 2006.229.03:24:04.56#ibcon#about to read 6, iclass 27, count 0 2006.229.03:24:04.56#ibcon#read 6, iclass 27, count 0 2006.229.03:24:04.56#ibcon#end of sib2, iclass 27, count 0 2006.229.03:24:04.56#ibcon#*after write, iclass 27, count 0 2006.229.03:24:04.56#ibcon#*before return 0, iclass 27, count 0 2006.229.03:24:04.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:04.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:04.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:24:04.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:24:04.56$vck44/valo=5,734.99 2006.229.03:24:04.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.03:24:04.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.03:24:04.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:04.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:04.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:04.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:04.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:24:04.56#ibcon#first serial, iclass 29, count 0 2006.229.03:24:04.56#ibcon#enter sib2, iclass 29, count 0 2006.229.03:24:04.56#ibcon#flushed, iclass 29, count 0 2006.229.03:24:04.56#ibcon#about to write, iclass 29, count 0 2006.229.03:24:04.56#ibcon#wrote, iclass 29, count 0 2006.229.03:24:04.56#ibcon#about to read 3, iclass 29, count 0 2006.229.03:24:04.58#ibcon#read 3, iclass 29, count 0 2006.229.03:24:04.58#ibcon#about to read 4, iclass 29, count 0 2006.229.03:24:04.58#ibcon#read 4, iclass 29, count 0 2006.229.03:24:04.58#ibcon#about to read 5, iclass 29, count 0 2006.229.03:24:04.58#ibcon#read 5, iclass 29, count 0 2006.229.03:24:04.58#ibcon#about to read 6, iclass 29, count 0 2006.229.03:24:04.58#ibcon#read 6, iclass 29, count 0 2006.229.03:24:04.58#ibcon#end of sib2, iclass 29, count 0 2006.229.03:24:04.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:24:04.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:24:04.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:24:04.58#ibcon#*before write, iclass 29, count 0 2006.229.03:24:04.58#ibcon#enter sib2, iclass 29, count 0 2006.229.03:24:04.58#ibcon#flushed, iclass 29, count 0 2006.229.03:24:04.58#ibcon#about to write, iclass 29, count 0 2006.229.03:24:04.58#ibcon#wrote, iclass 29, count 0 2006.229.03:24:04.58#ibcon#about to read 3, iclass 29, count 0 2006.229.03:24:04.62#ibcon#read 3, iclass 29, count 0 2006.229.03:24:04.62#ibcon#about to read 4, iclass 29, count 0 2006.229.03:24:04.62#ibcon#read 4, iclass 29, count 0 2006.229.03:24:04.62#ibcon#about to read 5, iclass 29, count 0 2006.229.03:24:04.62#ibcon#read 5, iclass 29, count 0 2006.229.03:24:04.62#ibcon#about to read 6, iclass 29, count 0 2006.229.03:24:04.62#ibcon#read 6, iclass 29, count 0 2006.229.03:24:04.62#ibcon#end of sib2, iclass 29, count 0 2006.229.03:24:04.62#ibcon#*after write, iclass 29, count 0 2006.229.03:24:04.62#ibcon#*before return 0, iclass 29, count 0 2006.229.03:24:04.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:04.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:04.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:24:04.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:24:04.62$vck44/va=5,4 2006.229.03:24:04.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.03:24:04.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.03:24:04.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:04.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:04.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:04.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:04.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.03:24:04.68#ibcon#first serial, iclass 31, count 2 2006.229.03:24:04.68#ibcon#enter sib2, iclass 31, count 2 2006.229.03:24:04.68#ibcon#flushed, iclass 31, count 2 2006.229.03:24:04.68#ibcon#about to write, iclass 31, count 2 2006.229.03:24:04.68#ibcon#wrote, iclass 31, count 2 2006.229.03:24:04.68#ibcon#about to read 3, iclass 31, count 2 2006.229.03:24:04.70#ibcon#read 3, iclass 31, count 2 2006.229.03:24:04.70#ibcon#about to read 4, iclass 31, count 2 2006.229.03:24:04.70#ibcon#read 4, iclass 31, count 2 2006.229.03:24:04.70#ibcon#about to read 5, iclass 31, count 2 2006.229.03:24:04.70#ibcon#read 5, iclass 31, count 2 2006.229.03:24:04.70#ibcon#about to read 6, iclass 31, count 2 2006.229.03:24:04.70#ibcon#read 6, iclass 31, count 2 2006.229.03:24:04.70#ibcon#end of sib2, iclass 31, count 2 2006.229.03:24:04.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.03:24:04.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.03:24:04.70#ibcon#[25=AT05-04\r\n] 2006.229.03:24:04.70#ibcon#*before write, iclass 31, count 2 2006.229.03:24:04.70#ibcon#enter sib2, iclass 31, count 2 2006.229.03:24:04.70#ibcon#flushed, iclass 31, count 2 2006.229.03:24:04.70#ibcon#about to write, iclass 31, count 2 2006.229.03:24:04.70#ibcon#wrote, iclass 31, count 2 2006.229.03:24:04.70#ibcon#about to read 3, iclass 31, count 2 2006.229.03:24:04.73#ibcon#read 3, iclass 31, count 2 2006.229.03:24:04.73#ibcon#about to read 4, iclass 31, count 2 2006.229.03:24:04.73#ibcon#read 4, iclass 31, count 2 2006.229.03:24:04.73#ibcon#about to read 5, iclass 31, count 2 2006.229.03:24:04.73#ibcon#read 5, iclass 31, count 2 2006.229.03:24:04.73#ibcon#about to read 6, iclass 31, count 2 2006.229.03:24:04.73#ibcon#read 6, iclass 31, count 2 2006.229.03:24:04.73#ibcon#end of sib2, iclass 31, count 2 2006.229.03:24:04.73#ibcon#*after write, iclass 31, count 2 2006.229.03:24:04.73#ibcon#*before return 0, iclass 31, count 2 2006.229.03:24:04.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:04.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:04.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.03:24:04.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:04.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:04.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:04.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:04.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:24:04.85#ibcon#first serial, iclass 31, count 0 2006.229.03:24:04.85#ibcon#enter sib2, iclass 31, count 0 2006.229.03:24:04.85#ibcon#flushed, iclass 31, count 0 2006.229.03:24:04.85#ibcon#about to write, iclass 31, count 0 2006.229.03:24:04.85#ibcon#wrote, iclass 31, count 0 2006.229.03:24:04.85#ibcon#about to read 3, iclass 31, count 0 2006.229.03:24:04.87#ibcon#read 3, iclass 31, count 0 2006.229.03:24:04.87#ibcon#about to read 4, iclass 31, count 0 2006.229.03:24:04.87#ibcon#read 4, iclass 31, count 0 2006.229.03:24:04.87#ibcon#about to read 5, iclass 31, count 0 2006.229.03:24:04.87#ibcon#read 5, iclass 31, count 0 2006.229.03:24:04.87#ibcon#about to read 6, iclass 31, count 0 2006.229.03:24:04.87#ibcon#read 6, iclass 31, count 0 2006.229.03:24:04.87#ibcon#end of sib2, iclass 31, count 0 2006.229.03:24:04.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:24:04.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:24:04.87#ibcon#[25=USB\r\n] 2006.229.03:24:04.87#ibcon#*before write, iclass 31, count 0 2006.229.03:24:04.87#ibcon#enter sib2, iclass 31, count 0 2006.229.03:24:04.87#ibcon#flushed, iclass 31, count 0 2006.229.03:24:04.87#ibcon#about to write, iclass 31, count 0 2006.229.03:24:04.87#ibcon#wrote, iclass 31, count 0 2006.229.03:24:04.87#ibcon#about to read 3, iclass 31, count 0 2006.229.03:24:04.90#ibcon#read 3, iclass 31, count 0 2006.229.03:24:04.90#ibcon#about to read 4, iclass 31, count 0 2006.229.03:24:04.90#ibcon#read 4, iclass 31, count 0 2006.229.03:24:04.90#ibcon#about to read 5, iclass 31, count 0 2006.229.03:24:04.90#ibcon#read 5, iclass 31, count 0 2006.229.03:24:04.90#ibcon#about to read 6, iclass 31, count 0 2006.229.03:24:04.90#ibcon#read 6, iclass 31, count 0 2006.229.03:24:04.90#ibcon#end of sib2, iclass 31, count 0 2006.229.03:24:04.90#ibcon#*after write, iclass 31, count 0 2006.229.03:24:04.90#ibcon#*before return 0, iclass 31, count 0 2006.229.03:24:04.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:04.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:04.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:24:04.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:24:04.90$vck44/valo=6,814.99 2006.229.03:24:04.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.03:24:04.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.03:24:04.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:04.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:04.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:04.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:04.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:24:04.90#ibcon#first serial, iclass 33, count 0 2006.229.03:24:04.90#ibcon#enter sib2, iclass 33, count 0 2006.229.03:24:04.90#ibcon#flushed, iclass 33, count 0 2006.229.03:24:04.90#ibcon#about to write, iclass 33, count 0 2006.229.03:24:04.90#ibcon#wrote, iclass 33, count 0 2006.229.03:24:04.90#ibcon#about to read 3, iclass 33, count 0 2006.229.03:24:04.92#ibcon#read 3, iclass 33, count 0 2006.229.03:24:04.92#ibcon#about to read 4, iclass 33, count 0 2006.229.03:24:04.92#ibcon#read 4, iclass 33, count 0 2006.229.03:24:04.92#ibcon#about to read 5, iclass 33, count 0 2006.229.03:24:04.92#ibcon#read 5, iclass 33, count 0 2006.229.03:24:04.92#ibcon#about to read 6, iclass 33, count 0 2006.229.03:24:04.92#ibcon#read 6, iclass 33, count 0 2006.229.03:24:04.92#ibcon#end of sib2, iclass 33, count 0 2006.229.03:24:04.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:24:04.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:24:04.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:24:04.92#ibcon#*before write, iclass 33, count 0 2006.229.03:24:04.92#ibcon#enter sib2, iclass 33, count 0 2006.229.03:24:04.92#ibcon#flushed, iclass 33, count 0 2006.229.03:24:04.92#ibcon#about to write, iclass 33, count 0 2006.229.03:24:04.92#ibcon#wrote, iclass 33, count 0 2006.229.03:24:04.92#ibcon#about to read 3, iclass 33, count 0 2006.229.03:24:04.96#ibcon#read 3, iclass 33, count 0 2006.229.03:24:04.96#ibcon#about to read 4, iclass 33, count 0 2006.229.03:24:04.96#ibcon#read 4, iclass 33, count 0 2006.229.03:24:04.96#ibcon#about to read 5, iclass 33, count 0 2006.229.03:24:04.96#ibcon#read 5, iclass 33, count 0 2006.229.03:24:04.96#ibcon#about to read 6, iclass 33, count 0 2006.229.03:24:04.96#ibcon#read 6, iclass 33, count 0 2006.229.03:24:04.96#ibcon#end of sib2, iclass 33, count 0 2006.229.03:24:04.96#ibcon#*after write, iclass 33, count 0 2006.229.03:24:04.96#ibcon#*before return 0, iclass 33, count 0 2006.229.03:24:04.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:04.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:04.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:24:04.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:24:04.96$vck44/va=6,4 2006.229.03:24:04.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.03:24:04.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.03:24:04.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:04.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:05.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:05.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:05.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.03:24:05.02#ibcon#first serial, iclass 35, count 2 2006.229.03:24:05.02#ibcon#enter sib2, iclass 35, count 2 2006.229.03:24:05.02#ibcon#flushed, iclass 35, count 2 2006.229.03:24:05.02#ibcon#about to write, iclass 35, count 2 2006.229.03:24:05.02#ibcon#wrote, iclass 35, count 2 2006.229.03:24:05.02#ibcon#about to read 3, iclass 35, count 2 2006.229.03:24:05.04#ibcon#read 3, iclass 35, count 2 2006.229.03:24:05.04#ibcon#about to read 4, iclass 35, count 2 2006.229.03:24:05.04#ibcon#read 4, iclass 35, count 2 2006.229.03:24:05.04#ibcon#about to read 5, iclass 35, count 2 2006.229.03:24:05.04#ibcon#read 5, iclass 35, count 2 2006.229.03:24:05.04#ibcon#about to read 6, iclass 35, count 2 2006.229.03:24:05.04#ibcon#read 6, iclass 35, count 2 2006.229.03:24:05.04#ibcon#end of sib2, iclass 35, count 2 2006.229.03:24:05.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.03:24:05.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.03:24:05.04#ibcon#[25=AT06-04\r\n] 2006.229.03:24:05.04#ibcon#*before write, iclass 35, count 2 2006.229.03:24:05.04#ibcon#enter sib2, iclass 35, count 2 2006.229.03:24:05.04#ibcon#flushed, iclass 35, count 2 2006.229.03:24:05.04#ibcon#about to write, iclass 35, count 2 2006.229.03:24:05.04#ibcon#wrote, iclass 35, count 2 2006.229.03:24:05.04#ibcon#about to read 3, iclass 35, count 2 2006.229.03:24:05.07#ibcon#read 3, iclass 35, count 2 2006.229.03:24:05.07#ibcon#about to read 4, iclass 35, count 2 2006.229.03:24:05.07#ibcon#read 4, iclass 35, count 2 2006.229.03:24:05.07#ibcon#about to read 5, iclass 35, count 2 2006.229.03:24:05.07#ibcon#read 5, iclass 35, count 2 2006.229.03:24:05.07#ibcon#about to read 6, iclass 35, count 2 2006.229.03:24:05.07#ibcon#read 6, iclass 35, count 2 2006.229.03:24:05.07#ibcon#end of sib2, iclass 35, count 2 2006.229.03:24:05.07#ibcon#*after write, iclass 35, count 2 2006.229.03:24:05.07#ibcon#*before return 0, iclass 35, count 2 2006.229.03:24:05.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:05.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:05.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.03:24:05.07#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:05.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:05.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:05.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:05.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:24:05.19#ibcon#first serial, iclass 35, count 0 2006.229.03:24:05.19#ibcon#enter sib2, iclass 35, count 0 2006.229.03:24:05.19#ibcon#flushed, iclass 35, count 0 2006.229.03:24:05.19#ibcon#about to write, iclass 35, count 0 2006.229.03:24:05.19#ibcon#wrote, iclass 35, count 0 2006.229.03:24:05.19#ibcon#about to read 3, iclass 35, count 0 2006.229.03:24:05.21#ibcon#read 3, iclass 35, count 0 2006.229.03:24:05.21#ibcon#about to read 4, iclass 35, count 0 2006.229.03:24:05.21#ibcon#read 4, iclass 35, count 0 2006.229.03:24:05.21#ibcon#about to read 5, iclass 35, count 0 2006.229.03:24:05.21#ibcon#read 5, iclass 35, count 0 2006.229.03:24:05.21#ibcon#about to read 6, iclass 35, count 0 2006.229.03:24:05.21#ibcon#read 6, iclass 35, count 0 2006.229.03:24:05.21#ibcon#end of sib2, iclass 35, count 0 2006.229.03:24:05.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:24:05.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:24:05.21#ibcon#[25=USB\r\n] 2006.229.03:24:05.21#ibcon#*before write, iclass 35, count 0 2006.229.03:24:05.21#ibcon#enter sib2, iclass 35, count 0 2006.229.03:24:05.21#ibcon#flushed, iclass 35, count 0 2006.229.03:24:05.21#ibcon#about to write, iclass 35, count 0 2006.229.03:24:05.21#ibcon#wrote, iclass 35, count 0 2006.229.03:24:05.21#ibcon#about to read 3, iclass 35, count 0 2006.229.03:24:05.24#ibcon#read 3, iclass 35, count 0 2006.229.03:24:05.24#ibcon#about to read 4, iclass 35, count 0 2006.229.03:24:05.24#ibcon#read 4, iclass 35, count 0 2006.229.03:24:05.24#ibcon#about to read 5, iclass 35, count 0 2006.229.03:24:05.24#ibcon#read 5, iclass 35, count 0 2006.229.03:24:05.24#ibcon#about to read 6, iclass 35, count 0 2006.229.03:24:05.24#ibcon#read 6, iclass 35, count 0 2006.229.03:24:05.24#ibcon#end of sib2, iclass 35, count 0 2006.229.03:24:05.24#ibcon#*after write, iclass 35, count 0 2006.229.03:24:05.24#ibcon#*before return 0, iclass 35, count 0 2006.229.03:24:05.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:05.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:05.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:24:05.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:24:05.24$vck44/valo=7,864.99 2006.229.03:24:05.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.03:24:05.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.03:24:05.24#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:05.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:05.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:05.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:05.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:24:05.24#ibcon#first serial, iclass 37, count 0 2006.229.03:24:05.24#ibcon#enter sib2, iclass 37, count 0 2006.229.03:24:05.24#ibcon#flushed, iclass 37, count 0 2006.229.03:24:05.24#ibcon#about to write, iclass 37, count 0 2006.229.03:24:05.24#ibcon#wrote, iclass 37, count 0 2006.229.03:24:05.24#ibcon#about to read 3, iclass 37, count 0 2006.229.03:24:05.26#ibcon#read 3, iclass 37, count 0 2006.229.03:24:05.26#ibcon#about to read 4, iclass 37, count 0 2006.229.03:24:05.26#ibcon#read 4, iclass 37, count 0 2006.229.03:24:05.26#ibcon#about to read 5, iclass 37, count 0 2006.229.03:24:05.26#ibcon#read 5, iclass 37, count 0 2006.229.03:24:05.26#ibcon#about to read 6, iclass 37, count 0 2006.229.03:24:05.26#ibcon#read 6, iclass 37, count 0 2006.229.03:24:05.26#ibcon#end of sib2, iclass 37, count 0 2006.229.03:24:05.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:24:05.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:24:05.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:24:05.26#ibcon#*before write, iclass 37, count 0 2006.229.03:24:05.26#ibcon#enter sib2, iclass 37, count 0 2006.229.03:24:05.26#ibcon#flushed, iclass 37, count 0 2006.229.03:24:05.26#ibcon#about to write, iclass 37, count 0 2006.229.03:24:05.26#ibcon#wrote, iclass 37, count 0 2006.229.03:24:05.26#ibcon#about to read 3, iclass 37, count 0 2006.229.03:24:05.30#ibcon#read 3, iclass 37, count 0 2006.229.03:24:05.30#ibcon#about to read 4, iclass 37, count 0 2006.229.03:24:05.30#ibcon#read 4, iclass 37, count 0 2006.229.03:24:05.30#ibcon#about to read 5, iclass 37, count 0 2006.229.03:24:05.30#ibcon#read 5, iclass 37, count 0 2006.229.03:24:05.30#ibcon#about to read 6, iclass 37, count 0 2006.229.03:24:05.30#ibcon#read 6, iclass 37, count 0 2006.229.03:24:05.30#ibcon#end of sib2, iclass 37, count 0 2006.229.03:24:05.30#ibcon#*after write, iclass 37, count 0 2006.229.03:24:05.30#ibcon#*before return 0, iclass 37, count 0 2006.229.03:24:05.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:05.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:05.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:24:05.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:24:05.30$vck44/va=7,5 2006.229.03:24:05.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.03:24:05.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.03:24:05.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:05.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:05.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:05.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:05.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.03:24:05.36#ibcon#first serial, iclass 39, count 2 2006.229.03:24:05.36#ibcon#enter sib2, iclass 39, count 2 2006.229.03:24:05.36#ibcon#flushed, iclass 39, count 2 2006.229.03:24:05.36#ibcon#about to write, iclass 39, count 2 2006.229.03:24:05.36#ibcon#wrote, iclass 39, count 2 2006.229.03:24:05.36#ibcon#about to read 3, iclass 39, count 2 2006.229.03:24:05.38#ibcon#read 3, iclass 39, count 2 2006.229.03:24:05.38#ibcon#about to read 4, iclass 39, count 2 2006.229.03:24:05.38#ibcon#read 4, iclass 39, count 2 2006.229.03:24:05.38#ibcon#about to read 5, iclass 39, count 2 2006.229.03:24:05.38#ibcon#read 5, iclass 39, count 2 2006.229.03:24:05.38#ibcon#about to read 6, iclass 39, count 2 2006.229.03:24:05.38#ibcon#read 6, iclass 39, count 2 2006.229.03:24:05.38#ibcon#end of sib2, iclass 39, count 2 2006.229.03:24:05.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.03:24:05.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.03:24:05.38#ibcon#[25=AT07-05\r\n] 2006.229.03:24:05.38#ibcon#*before write, iclass 39, count 2 2006.229.03:24:05.38#ibcon#enter sib2, iclass 39, count 2 2006.229.03:24:05.38#ibcon#flushed, iclass 39, count 2 2006.229.03:24:05.38#ibcon#about to write, iclass 39, count 2 2006.229.03:24:05.38#ibcon#wrote, iclass 39, count 2 2006.229.03:24:05.38#ibcon#about to read 3, iclass 39, count 2 2006.229.03:24:05.41#ibcon#read 3, iclass 39, count 2 2006.229.03:24:05.41#ibcon#about to read 4, iclass 39, count 2 2006.229.03:24:05.41#ibcon#read 4, iclass 39, count 2 2006.229.03:24:05.41#ibcon#about to read 5, iclass 39, count 2 2006.229.03:24:05.41#ibcon#read 5, iclass 39, count 2 2006.229.03:24:05.41#ibcon#about to read 6, iclass 39, count 2 2006.229.03:24:05.41#ibcon#read 6, iclass 39, count 2 2006.229.03:24:05.41#ibcon#end of sib2, iclass 39, count 2 2006.229.03:24:05.41#ibcon#*after write, iclass 39, count 2 2006.229.03:24:05.41#ibcon#*before return 0, iclass 39, count 2 2006.229.03:24:05.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:05.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:05.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.03:24:05.41#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:05.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:05.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:05.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:05.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:24:05.53#ibcon#first serial, iclass 39, count 0 2006.229.03:24:05.53#ibcon#enter sib2, iclass 39, count 0 2006.229.03:24:05.53#ibcon#flushed, iclass 39, count 0 2006.229.03:24:05.53#ibcon#about to write, iclass 39, count 0 2006.229.03:24:05.53#ibcon#wrote, iclass 39, count 0 2006.229.03:24:05.53#ibcon#about to read 3, iclass 39, count 0 2006.229.03:24:05.55#ibcon#read 3, iclass 39, count 0 2006.229.03:24:05.55#ibcon#about to read 4, iclass 39, count 0 2006.229.03:24:05.55#ibcon#read 4, iclass 39, count 0 2006.229.03:24:05.55#ibcon#about to read 5, iclass 39, count 0 2006.229.03:24:05.55#ibcon#read 5, iclass 39, count 0 2006.229.03:24:05.55#ibcon#about to read 6, iclass 39, count 0 2006.229.03:24:05.55#ibcon#read 6, iclass 39, count 0 2006.229.03:24:05.55#ibcon#end of sib2, iclass 39, count 0 2006.229.03:24:05.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:24:05.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:24:05.55#ibcon#[25=USB\r\n] 2006.229.03:24:05.55#ibcon#*before write, iclass 39, count 0 2006.229.03:24:05.55#ibcon#enter sib2, iclass 39, count 0 2006.229.03:24:05.55#ibcon#flushed, iclass 39, count 0 2006.229.03:24:05.55#ibcon#about to write, iclass 39, count 0 2006.229.03:24:05.55#ibcon#wrote, iclass 39, count 0 2006.229.03:24:05.55#ibcon#about to read 3, iclass 39, count 0 2006.229.03:24:05.58#ibcon#read 3, iclass 39, count 0 2006.229.03:24:05.58#ibcon#about to read 4, iclass 39, count 0 2006.229.03:24:05.58#ibcon#read 4, iclass 39, count 0 2006.229.03:24:05.58#ibcon#about to read 5, iclass 39, count 0 2006.229.03:24:05.58#ibcon#read 5, iclass 39, count 0 2006.229.03:24:05.58#ibcon#about to read 6, iclass 39, count 0 2006.229.03:24:05.58#ibcon#read 6, iclass 39, count 0 2006.229.03:24:05.58#ibcon#end of sib2, iclass 39, count 0 2006.229.03:24:05.58#ibcon#*after write, iclass 39, count 0 2006.229.03:24:05.58#ibcon#*before return 0, iclass 39, count 0 2006.229.03:24:05.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:05.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:05.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:24:05.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:24:05.58$vck44/valo=8,884.99 2006.229.03:24:05.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.03:24:05.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.03:24:05.58#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:05.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:05.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:05.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:05.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:24:05.58#ibcon#first serial, iclass 3, count 0 2006.229.03:24:05.58#ibcon#enter sib2, iclass 3, count 0 2006.229.03:24:05.58#ibcon#flushed, iclass 3, count 0 2006.229.03:24:05.58#ibcon#about to write, iclass 3, count 0 2006.229.03:24:05.58#ibcon#wrote, iclass 3, count 0 2006.229.03:24:05.58#ibcon#about to read 3, iclass 3, count 0 2006.229.03:24:05.60#ibcon#read 3, iclass 3, count 0 2006.229.03:24:05.60#ibcon#about to read 4, iclass 3, count 0 2006.229.03:24:05.60#ibcon#read 4, iclass 3, count 0 2006.229.03:24:05.60#ibcon#about to read 5, iclass 3, count 0 2006.229.03:24:05.60#ibcon#read 5, iclass 3, count 0 2006.229.03:24:05.60#ibcon#about to read 6, iclass 3, count 0 2006.229.03:24:05.60#ibcon#read 6, iclass 3, count 0 2006.229.03:24:05.60#ibcon#end of sib2, iclass 3, count 0 2006.229.03:24:05.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:24:05.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:24:05.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:24:05.60#ibcon#*before write, iclass 3, count 0 2006.229.03:24:05.60#ibcon#enter sib2, iclass 3, count 0 2006.229.03:24:05.60#ibcon#flushed, iclass 3, count 0 2006.229.03:24:05.60#ibcon#about to write, iclass 3, count 0 2006.229.03:24:05.60#ibcon#wrote, iclass 3, count 0 2006.229.03:24:05.60#ibcon#about to read 3, iclass 3, count 0 2006.229.03:24:05.64#ibcon#read 3, iclass 3, count 0 2006.229.03:24:05.64#ibcon#about to read 4, iclass 3, count 0 2006.229.03:24:05.64#ibcon#read 4, iclass 3, count 0 2006.229.03:24:05.64#ibcon#about to read 5, iclass 3, count 0 2006.229.03:24:05.64#ibcon#read 5, iclass 3, count 0 2006.229.03:24:05.64#ibcon#about to read 6, iclass 3, count 0 2006.229.03:24:05.64#ibcon#read 6, iclass 3, count 0 2006.229.03:24:05.64#ibcon#end of sib2, iclass 3, count 0 2006.229.03:24:05.64#ibcon#*after write, iclass 3, count 0 2006.229.03:24:05.64#ibcon#*before return 0, iclass 3, count 0 2006.229.03:24:05.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:05.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:05.64#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:24:05.64#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:24:05.64$vck44/va=8,6 2006.229.03:24:05.64#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.03:24:05.64#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.03:24:05.64#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:05.64#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:05.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:05.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:05.70#ibcon#enter wrdev, iclass 5, count 2 2006.229.03:24:05.70#ibcon#first serial, iclass 5, count 2 2006.229.03:24:05.70#ibcon#enter sib2, iclass 5, count 2 2006.229.03:24:05.70#ibcon#flushed, iclass 5, count 2 2006.229.03:24:05.70#ibcon#about to write, iclass 5, count 2 2006.229.03:24:05.70#ibcon#wrote, iclass 5, count 2 2006.229.03:24:05.70#ibcon#about to read 3, iclass 5, count 2 2006.229.03:24:05.72#ibcon#read 3, iclass 5, count 2 2006.229.03:24:05.72#ibcon#about to read 4, iclass 5, count 2 2006.229.03:24:05.72#ibcon#read 4, iclass 5, count 2 2006.229.03:24:05.72#ibcon#about to read 5, iclass 5, count 2 2006.229.03:24:05.72#ibcon#read 5, iclass 5, count 2 2006.229.03:24:05.72#ibcon#about to read 6, iclass 5, count 2 2006.229.03:24:05.72#ibcon#read 6, iclass 5, count 2 2006.229.03:24:05.72#ibcon#end of sib2, iclass 5, count 2 2006.229.03:24:05.72#ibcon#*mode == 0, iclass 5, count 2 2006.229.03:24:05.72#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.03:24:05.72#ibcon#[25=AT08-06\r\n] 2006.229.03:24:05.72#ibcon#*before write, iclass 5, count 2 2006.229.03:24:05.72#ibcon#enter sib2, iclass 5, count 2 2006.229.03:24:05.72#ibcon#flushed, iclass 5, count 2 2006.229.03:24:05.72#ibcon#about to write, iclass 5, count 2 2006.229.03:24:05.72#ibcon#wrote, iclass 5, count 2 2006.229.03:24:05.72#ibcon#about to read 3, iclass 5, count 2 2006.229.03:24:05.75#ibcon#read 3, iclass 5, count 2 2006.229.03:24:05.75#ibcon#about to read 4, iclass 5, count 2 2006.229.03:24:05.75#ibcon#read 4, iclass 5, count 2 2006.229.03:24:05.75#ibcon#about to read 5, iclass 5, count 2 2006.229.03:24:05.75#ibcon#read 5, iclass 5, count 2 2006.229.03:24:05.75#ibcon#about to read 6, iclass 5, count 2 2006.229.03:24:05.75#ibcon#read 6, iclass 5, count 2 2006.229.03:24:05.75#ibcon#end of sib2, iclass 5, count 2 2006.229.03:24:05.75#ibcon#*after write, iclass 5, count 2 2006.229.03:24:05.75#ibcon#*before return 0, iclass 5, count 2 2006.229.03:24:05.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:05.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:05.75#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.03:24:05.75#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:05.75#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:05.87#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:05.87#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:05.87#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:24:05.87#ibcon#first serial, iclass 5, count 0 2006.229.03:24:05.87#ibcon#enter sib2, iclass 5, count 0 2006.229.03:24:05.87#ibcon#flushed, iclass 5, count 0 2006.229.03:24:05.87#ibcon#about to write, iclass 5, count 0 2006.229.03:24:05.87#ibcon#wrote, iclass 5, count 0 2006.229.03:24:05.87#ibcon#about to read 3, iclass 5, count 0 2006.229.03:24:05.89#ibcon#read 3, iclass 5, count 0 2006.229.03:24:05.89#ibcon#about to read 4, iclass 5, count 0 2006.229.03:24:05.89#ibcon#read 4, iclass 5, count 0 2006.229.03:24:05.89#ibcon#about to read 5, iclass 5, count 0 2006.229.03:24:05.89#ibcon#read 5, iclass 5, count 0 2006.229.03:24:05.89#ibcon#about to read 6, iclass 5, count 0 2006.229.03:24:05.89#ibcon#read 6, iclass 5, count 0 2006.229.03:24:05.89#ibcon#end of sib2, iclass 5, count 0 2006.229.03:24:05.89#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:24:05.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:24:05.89#ibcon#[25=USB\r\n] 2006.229.03:24:05.89#ibcon#*before write, iclass 5, count 0 2006.229.03:24:05.89#ibcon#enter sib2, iclass 5, count 0 2006.229.03:24:05.89#ibcon#flushed, iclass 5, count 0 2006.229.03:24:05.89#ibcon#about to write, iclass 5, count 0 2006.229.03:24:05.89#ibcon#wrote, iclass 5, count 0 2006.229.03:24:05.89#ibcon#about to read 3, iclass 5, count 0 2006.229.03:24:05.92#ibcon#read 3, iclass 5, count 0 2006.229.03:24:05.92#ibcon#about to read 4, iclass 5, count 0 2006.229.03:24:05.92#ibcon#read 4, iclass 5, count 0 2006.229.03:24:05.92#ibcon#about to read 5, iclass 5, count 0 2006.229.03:24:05.92#ibcon#read 5, iclass 5, count 0 2006.229.03:24:05.92#ibcon#about to read 6, iclass 5, count 0 2006.229.03:24:05.92#ibcon#read 6, iclass 5, count 0 2006.229.03:24:05.92#ibcon#end of sib2, iclass 5, count 0 2006.229.03:24:05.92#ibcon#*after write, iclass 5, count 0 2006.229.03:24:05.92#ibcon#*before return 0, iclass 5, count 0 2006.229.03:24:05.92#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:05.92#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:05.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:24:05.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:24:05.92$vck44/vblo=1,629.99 2006.229.03:24:05.92#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.03:24:05.92#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.03:24:05.92#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:05.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:05.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:05.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:05.92#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:24:05.92#ibcon#first serial, iclass 7, count 0 2006.229.03:24:05.92#ibcon#enter sib2, iclass 7, count 0 2006.229.03:24:05.92#ibcon#flushed, iclass 7, count 0 2006.229.03:24:05.92#ibcon#about to write, iclass 7, count 0 2006.229.03:24:05.92#ibcon#wrote, iclass 7, count 0 2006.229.03:24:05.92#ibcon#about to read 3, iclass 7, count 0 2006.229.03:24:05.94#ibcon#read 3, iclass 7, count 0 2006.229.03:24:05.94#ibcon#about to read 4, iclass 7, count 0 2006.229.03:24:05.94#ibcon#read 4, iclass 7, count 0 2006.229.03:24:05.94#ibcon#about to read 5, iclass 7, count 0 2006.229.03:24:05.94#ibcon#read 5, iclass 7, count 0 2006.229.03:24:05.94#ibcon#about to read 6, iclass 7, count 0 2006.229.03:24:05.94#ibcon#read 6, iclass 7, count 0 2006.229.03:24:05.94#ibcon#end of sib2, iclass 7, count 0 2006.229.03:24:05.94#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:24:05.94#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:24:05.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:24:05.94#ibcon#*before write, iclass 7, count 0 2006.229.03:24:05.94#ibcon#enter sib2, iclass 7, count 0 2006.229.03:24:05.94#ibcon#flushed, iclass 7, count 0 2006.229.03:24:05.94#ibcon#about to write, iclass 7, count 0 2006.229.03:24:05.94#ibcon#wrote, iclass 7, count 0 2006.229.03:24:05.94#ibcon#about to read 3, iclass 7, count 0 2006.229.03:24:05.98#ibcon#read 3, iclass 7, count 0 2006.229.03:24:05.98#ibcon#about to read 4, iclass 7, count 0 2006.229.03:24:05.98#ibcon#read 4, iclass 7, count 0 2006.229.03:24:05.98#ibcon#about to read 5, iclass 7, count 0 2006.229.03:24:05.98#ibcon#read 5, iclass 7, count 0 2006.229.03:24:05.98#ibcon#about to read 6, iclass 7, count 0 2006.229.03:24:05.98#ibcon#read 6, iclass 7, count 0 2006.229.03:24:05.98#ibcon#end of sib2, iclass 7, count 0 2006.229.03:24:05.98#ibcon#*after write, iclass 7, count 0 2006.229.03:24:05.98#ibcon#*before return 0, iclass 7, count 0 2006.229.03:24:05.98#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:05.98#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:05.98#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:24:05.98#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:24:05.98$vck44/vb=1,4 2006.229.03:24:05.98#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.03:24:05.98#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.03:24:05.98#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:05.98#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:24:05.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:24:05.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:24:05.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.03:24:05.98#ibcon#first serial, iclass 11, count 2 2006.229.03:24:05.98#ibcon#enter sib2, iclass 11, count 2 2006.229.03:24:05.98#ibcon#flushed, iclass 11, count 2 2006.229.03:24:05.98#ibcon#about to write, iclass 11, count 2 2006.229.03:24:05.98#ibcon#wrote, iclass 11, count 2 2006.229.03:24:05.98#ibcon#about to read 3, iclass 11, count 2 2006.229.03:24:06.00#ibcon#read 3, iclass 11, count 2 2006.229.03:24:06.00#ibcon#about to read 4, iclass 11, count 2 2006.229.03:24:06.00#ibcon#read 4, iclass 11, count 2 2006.229.03:24:06.00#ibcon#about to read 5, iclass 11, count 2 2006.229.03:24:06.00#ibcon#read 5, iclass 11, count 2 2006.229.03:24:06.00#ibcon#about to read 6, iclass 11, count 2 2006.229.03:24:06.00#ibcon#read 6, iclass 11, count 2 2006.229.03:24:06.00#ibcon#end of sib2, iclass 11, count 2 2006.229.03:24:06.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.03:24:06.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.03:24:06.00#ibcon#[27=AT01-04\r\n] 2006.229.03:24:06.00#ibcon#*before write, iclass 11, count 2 2006.229.03:24:06.00#ibcon#enter sib2, iclass 11, count 2 2006.229.03:24:06.00#ibcon#flushed, iclass 11, count 2 2006.229.03:24:06.00#ibcon#about to write, iclass 11, count 2 2006.229.03:24:06.00#ibcon#wrote, iclass 11, count 2 2006.229.03:24:06.00#ibcon#about to read 3, iclass 11, count 2 2006.229.03:24:06.03#ibcon#read 3, iclass 11, count 2 2006.229.03:24:06.03#ibcon#about to read 4, iclass 11, count 2 2006.229.03:24:06.03#ibcon#read 4, iclass 11, count 2 2006.229.03:24:06.03#ibcon#about to read 5, iclass 11, count 2 2006.229.03:24:06.03#ibcon#read 5, iclass 11, count 2 2006.229.03:24:06.03#ibcon#about to read 6, iclass 11, count 2 2006.229.03:24:06.03#ibcon#read 6, iclass 11, count 2 2006.229.03:24:06.03#ibcon#end of sib2, iclass 11, count 2 2006.229.03:24:06.03#ibcon#*after write, iclass 11, count 2 2006.229.03:24:06.03#ibcon#*before return 0, iclass 11, count 2 2006.229.03:24:06.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:24:06.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.03:24:06.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.03:24:06.03#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:06.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:24:06.05#abcon#<5=/04 2.3 4.4 29.03 981000.6\r\n> 2006.229.03:24:06.07#abcon#{5=INTERFACE CLEAR} 2006.229.03:24:06.13#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:24:06.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:24:06.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:24:06.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:24:06.15#ibcon#first serial, iclass 11, count 0 2006.229.03:24:06.15#ibcon#enter sib2, iclass 11, count 0 2006.229.03:24:06.15#ibcon#flushed, iclass 11, count 0 2006.229.03:24:06.15#ibcon#about to write, iclass 11, count 0 2006.229.03:24:06.15#ibcon#wrote, iclass 11, count 0 2006.229.03:24:06.15#ibcon#about to read 3, iclass 11, count 0 2006.229.03:24:06.17#ibcon#read 3, iclass 11, count 0 2006.229.03:24:06.17#ibcon#about to read 4, iclass 11, count 0 2006.229.03:24:06.17#ibcon#read 4, iclass 11, count 0 2006.229.03:24:06.17#ibcon#about to read 5, iclass 11, count 0 2006.229.03:24:06.17#ibcon#read 5, iclass 11, count 0 2006.229.03:24:06.17#ibcon#about to read 6, iclass 11, count 0 2006.229.03:24:06.17#ibcon#read 6, iclass 11, count 0 2006.229.03:24:06.17#ibcon#end of sib2, iclass 11, count 0 2006.229.03:24:06.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:24:06.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:24:06.17#ibcon#[27=USB\r\n] 2006.229.03:24:06.17#ibcon#*before write, iclass 11, count 0 2006.229.03:24:06.17#ibcon#enter sib2, iclass 11, count 0 2006.229.03:24:06.17#ibcon#flushed, iclass 11, count 0 2006.229.03:24:06.17#ibcon#about to write, iclass 11, count 0 2006.229.03:24:06.17#ibcon#wrote, iclass 11, count 0 2006.229.03:24:06.17#ibcon#about to read 3, iclass 11, count 0 2006.229.03:24:06.20#ibcon#read 3, iclass 11, count 0 2006.229.03:24:06.20#ibcon#about to read 4, iclass 11, count 0 2006.229.03:24:06.20#ibcon#read 4, iclass 11, count 0 2006.229.03:24:06.20#ibcon#about to read 5, iclass 11, count 0 2006.229.03:24:06.20#ibcon#read 5, iclass 11, count 0 2006.229.03:24:06.20#ibcon#about to read 6, iclass 11, count 0 2006.229.03:24:06.20#ibcon#read 6, iclass 11, count 0 2006.229.03:24:06.20#ibcon#end of sib2, iclass 11, count 0 2006.229.03:24:06.20#ibcon#*after write, iclass 11, count 0 2006.229.03:24:06.20#ibcon#*before return 0, iclass 11, count 0 2006.229.03:24:06.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:24:06.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.03:24:06.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:24:06.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:24:06.20$vck44/vblo=2,634.99 2006.229.03:24:06.20#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.03:24:06.20#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.03:24:06.20#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:06.20#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:06.20#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:06.20#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:06.20#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:24:06.20#ibcon#first serial, iclass 17, count 0 2006.229.03:24:06.20#ibcon#enter sib2, iclass 17, count 0 2006.229.03:24:06.20#ibcon#flushed, iclass 17, count 0 2006.229.03:24:06.20#ibcon#about to write, iclass 17, count 0 2006.229.03:24:06.20#ibcon#wrote, iclass 17, count 0 2006.229.03:24:06.20#ibcon#about to read 3, iclass 17, count 0 2006.229.03:24:06.22#ibcon#read 3, iclass 17, count 0 2006.229.03:24:06.22#ibcon#about to read 4, iclass 17, count 0 2006.229.03:24:06.22#ibcon#read 4, iclass 17, count 0 2006.229.03:24:06.22#ibcon#about to read 5, iclass 17, count 0 2006.229.03:24:06.22#ibcon#read 5, iclass 17, count 0 2006.229.03:24:06.22#ibcon#about to read 6, iclass 17, count 0 2006.229.03:24:06.22#ibcon#read 6, iclass 17, count 0 2006.229.03:24:06.22#ibcon#end of sib2, iclass 17, count 0 2006.229.03:24:06.22#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:24:06.22#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:24:06.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:24:06.22#ibcon#*before write, iclass 17, count 0 2006.229.03:24:06.22#ibcon#enter sib2, iclass 17, count 0 2006.229.03:24:06.22#ibcon#flushed, iclass 17, count 0 2006.229.03:24:06.22#ibcon#about to write, iclass 17, count 0 2006.229.03:24:06.22#ibcon#wrote, iclass 17, count 0 2006.229.03:24:06.22#ibcon#about to read 3, iclass 17, count 0 2006.229.03:24:06.26#ibcon#read 3, iclass 17, count 0 2006.229.03:24:06.26#ibcon#about to read 4, iclass 17, count 0 2006.229.03:24:06.26#ibcon#read 4, iclass 17, count 0 2006.229.03:24:06.26#ibcon#about to read 5, iclass 17, count 0 2006.229.03:24:06.26#ibcon#read 5, iclass 17, count 0 2006.229.03:24:06.26#ibcon#about to read 6, iclass 17, count 0 2006.229.03:24:06.26#ibcon#read 6, iclass 17, count 0 2006.229.03:24:06.26#ibcon#end of sib2, iclass 17, count 0 2006.229.03:24:06.26#ibcon#*after write, iclass 17, count 0 2006.229.03:24:06.26#ibcon#*before return 0, iclass 17, count 0 2006.229.03:24:06.26#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:06.26#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.03:24:06.26#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:24:06.26#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:24:06.26$vck44/vb=2,4 2006.229.03:24:06.26#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.03:24:06.26#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.03:24:06.26#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:06.26#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:06.32#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:06.32#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:06.32#ibcon#enter wrdev, iclass 19, count 2 2006.229.03:24:06.32#ibcon#first serial, iclass 19, count 2 2006.229.03:24:06.32#ibcon#enter sib2, iclass 19, count 2 2006.229.03:24:06.32#ibcon#flushed, iclass 19, count 2 2006.229.03:24:06.32#ibcon#about to write, iclass 19, count 2 2006.229.03:24:06.32#ibcon#wrote, iclass 19, count 2 2006.229.03:24:06.32#ibcon#about to read 3, iclass 19, count 2 2006.229.03:24:06.34#ibcon#read 3, iclass 19, count 2 2006.229.03:24:06.34#ibcon#about to read 4, iclass 19, count 2 2006.229.03:24:06.34#ibcon#read 4, iclass 19, count 2 2006.229.03:24:06.34#ibcon#about to read 5, iclass 19, count 2 2006.229.03:24:06.34#ibcon#read 5, iclass 19, count 2 2006.229.03:24:06.34#ibcon#about to read 6, iclass 19, count 2 2006.229.03:24:06.34#ibcon#read 6, iclass 19, count 2 2006.229.03:24:06.34#ibcon#end of sib2, iclass 19, count 2 2006.229.03:24:06.34#ibcon#*mode == 0, iclass 19, count 2 2006.229.03:24:06.34#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.03:24:06.34#ibcon#[27=AT02-04\r\n] 2006.229.03:24:06.34#ibcon#*before write, iclass 19, count 2 2006.229.03:24:06.34#ibcon#enter sib2, iclass 19, count 2 2006.229.03:24:06.34#ibcon#flushed, iclass 19, count 2 2006.229.03:24:06.34#ibcon#about to write, iclass 19, count 2 2006.229.03:24:06.34#ibcon#wrote, iclass 19, count 2 2006.229.03:24:06.34#ibcon#about to read 3, iclass 19, count 2 2006.229.03:24:06.37#ibcon#read 3, iclass 19, count 2 2006.229.03:24:06.37#ibcon#about to read 4, iclass 19, count 2 2006.229.03:24:06.37#ibcon#read 4, iclass 19, count 2 2006.229.03:24:06.37#ibcon#about to read 5, iclass 19, count 2 2006.229.03:24:06.37#ibcon#read 5, iclass 19, count 2 2006.229.03:24:06.37#ibcon#about to read 6, iclass 19, count 2 2006.229.03:24:06.37#ibcon#read 6, iclass 19, count 2 2006.229.03:24:06.37#ibcon#end of sib2, iclass 19, count 2 2006.229.03:24:06.37#ibcon#*after write, iclass 19, count 2 2006.229.03:24:06.37#ibcon#*before return 0, iclass 19, count 2 2006.229.03:24:06.37#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:06.37#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.03:24:06.37#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.03:24:06.37#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:06.37#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:06.49#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:06.49#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:06.49#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:24:06.49#ibcon#first serial, iclass 19, count 0 2006.229.03:24:06.49#ibcon#enter sib2, iclass 19, count 0 2006.229.03:24:06.49#ibcon#flushed, iclass 19, count 0 2006.229.03:24:06.49#ibcon#about to write, iclass 19, count 0 2006.229.03:24:06.49#ibcon#wrote, iclass 19, count 0 2006.229.03:24:06.49#ibcon#about to read 3, iclass 19, count 0 2006.229.03:24:06.51#ibcon#read 3, iclass 19, count 0 2006.229.03:24:06.51#ibcon#about to read 4, iclass 19, count 0 2006.229.03:24:06.51#ibcon#read 4, iclass 19, count 0 2006.229.03:24:06.51#ibcon#about to read 5, iclass 19, count 0 2006.229.03:24:06.51#ibcon#read 5, iclass 19, count 0 2006.229.03:24:06.51#ibcon#about to read 6, iclass 19, count 0 2006.229.03:24:06.51#ibcon#read 6, iclass 19, count 0 2006.229.03:24:06.51#ibcon#end of sib2, iclass 19, count 0 2006.229.03:24:06.51#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:24:06.51#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:24:06.51#ibcon#[27=USB\r\n] 2006.229.03:24:06.51#ibcon#*before write, iclass 19, count 0 2006.229.03:24:06.51#ibcon#enter sib2, iclass 19, count 0 2006.229.03:24:06.51#ibcon#flushed, iclass 19, count 0 2006.229.03:24:06.51#ibcon#about to write, iclass 19, count 0 2006.229.03:24:06.51#ibcon#wrote, iclass 19, count 0 2006.229.03:24:06.51#ibcon#about to read 3, iclass 19, count 0 2006.229.03:24:06.54#ibcon#read 3, iclass 19, count 0 2006.229.03:24:06.54#ibcon#about to read 4, iclass 19, count 0 2006.229.03:24:06.54#ibcon#read 4, iclass 19, count 0 2006.229.03:24:06.54#ibcon#about to read 5, iclass 19, count 0 2006.229.03:24:06.54#ibcon#read 5, iclass 19, count 0 2006.229.03:24:06.54#ibcon#about to read 6, iclass 19, count 0 2006.229.03:24:06.54#ibcon#read 6, iclass 19, count 0 2006.229.03:24:06.54#ibcon#end of sib2, iclass 19, count 0 2006.229.03:24:06.54#ibcon#*after write, iclass 19, count 0 2006.229.03:24:06.54#ibcon#*before return 0, iclass 19, count 0 2006.229.03:24:06.54#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:06.54#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.03:24:06.54#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:24:06.54#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:24:06.54$vck44/vblo=3,649.99 2006.229.03:24:06.54#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.03:24:06.54#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.03:24:06.54#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:06.54#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:06.54#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:06.54#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:06.54#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:24:06.54#ibcon#first serial, iclass 21, count 0 2006.229.03:24:06.54#ibcon#enter sib2, iclass 21, count 0 2006.229.03:24:06.54#ibcon#flushed, iclass 21, count 0 2006.229.03:24:06.54#ibcon#about to write, iclass 21, count 0 2006.229.03:24:06.54#ibcon#wrote, iclass 21, count 0 2006.229.03:24:06.54#ibcon#about to read 3, iclass 21, count 0 2006.229.03:24:06.56#ibcon#read 3, iclass 21, count 0 2006.229.03:24:06.56#ibcon#about to read 4, iclass 21, count 0 2006.229.03:24:06.56#ibcon#read 4, iclass 21, count 0 2006.229.03:24:06.56#ibcon#about to read 5, iclass 21, count 0 2006.229.03:24:06.56#ibcon#read 5, iclass 21, count 0 2006.229.03:24:06.56#ibcon#about to read 6, iclass 21, count 0 2006.229.03:24:06.56#ibcon#read 6, iclass 21, count 0 2006.229.03:24:06.56#ibcon#end of sib2, iclass 21, count 0 2006.229.03:24:06.56#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:24:06.56#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:24:06.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:24:06.56#ibcon#*before write, iclass 21, count 0 2006.229.03:24:06.56#ibcon#enter sib2, iclass 21, count 0 2006.229.03:24:06.56#ibcon#flushed, iclass 21, count 0 2006.229.03:24:06.56#ibcon#about to write, iclass 21, count 0 2006.229.03:24:06.56#ibcon#wrote, iclass 21, count 0 2006.229.03:24:06.56#ibcon#about to read 3, iclass 21, count 0 2006.229.03:24:06.60#ibcon#read 3, iclass 21, count 0 2006.229.03:24:06.60#ibcon#about to read 4, iclass 21, count 0 2006.229.03:24:06.60#ibcon#read 4, iclass 21, count 0 2006.229.03:24:06.60#ibcon#about to read 5, iclass 21, count 0 2006.229.03:24:06.60#ibcon#read 5, iclass 21, count 0 2006.229.03:24:06.60#ibcon#about to read 6, iclass 21, count 0 2006.229.03:24:06.60#ibcon#read 6, iclass 21, count 0 2006.229.03:24:06.60#ibcon#end of sib2, iclass 21, count 0 2006.229.03:24:06.60#ibcon#*after write, iclass 21, count 0 2006.229.03:24:06.60#ibcon#*before return 0, iclass 21, count 0 2006.229.03:24:06.60#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:06.60#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.03:24:06.60#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:24:06.60#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:24:06.60$vck44/vb=3,4 2006.229.03:24:06.60#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.03:24:06.60#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.03:24:06.60#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:06.60#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:06.66#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:06.66#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:06.66#ibcon#enter wrdev, iclass 23, count 2 2006.229.03:24:06.66#ibcon#first serial, iclass 23, count 2 2006.229.03:24:06.66#ibcon#enter sib2, iclass 23, count 2 2006.229.03:24:06.66#ibcon#flushed, iclass 23, count 2 2006.229.03:24:06.66#ibcon#about to write, iclass 23, count 2 2006.229.03:24:06.66#ibcon#wrote, iclass 23, count 2 2006.229.03:24:06.66#ibcon#about to read 3, iclass 23, count 2 2006.229.03:24:06.68#ibcon#read 3, iclass 23, count 2 2006.229.03:24:06.68#ibcon#about to read 4, iclass 23, count 2 2006.229.03:24:06.68#ibcon#read 4, iclass 23, count 2 2006.229.03:24:06.68#ibcon#about to read 5, iclass 23, count 2 2006.229.03:24:06.68#ibcon#read 5, iclass 23, count 2 2006.229.03:24:06.68#ibcon#about to read 6, iclass 23, count 2 2006.229.03:24:06.68#ibcon#read 6, iclass 23, count 2 2006.229.03:24:06.68#ibcon#end of sib2, iclass 23, count 2 2006.229.03:24:06.68#ibcon#*mode == 0, iclass 23, count 2 2006.229.03:24:06.68#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.03:24:06.68#ibcon#[27=AT03-04\r\n] 2006.229.03:24:06.68#ibcon#*before write, iclass 23, count 2 2006.229.03:24:06.68#ibcon#enter sib2, iclass 23, count 2 2006.229.03:24:06.68#ibcon#flushed, iclass 23, count 2 2006.229.03:24:06.68#ibcon#about to write, iclass 23, count 2 2006.229.03:24:06.68#ibcon#wrote, iclass 23, count 2 2006.229.03:24:06.68#ibcon#about to read 3, iclass 23, count 2 2006.229.03:24:06.71#ibcon#read 3, iclass 23, count 2 2006.229.03:24:06.71#ibcon#about to read 4, iclass 23, count 2 2006.229.03:24:06.71#ibcon#read 4, iclass 23, count 2 2006.229.03:24:06.71#ibcon#about to read 5, iclass 23, count 2 2006.229.03:24:06.71#ibcon#read 5, iclass 23, count 2 2006.229.03:24:06.71#ibcon#about to read 6, iclass 23, count 2 2006.229.03:24:06.71#ibcon#read 6, iclass 23, count 2 2006.229.03:24:06.71#ibcon#end of sib2, iclass 23, count 2 2006.229.03:24:06.71#ibcon#*after write, iclass 23, count 2 2006.229.03:24:06.71#ibcon#*before return 0, iclass 23, count 2 2006.229.03:24:06.71#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:06.71#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.03:24:06.71#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.03:24:06.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:06.71#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:06.83#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:06.83#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:06.83#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:24:06.83#ibcon#first serial, iclass 23, count 0 2006.229.03:24:06.83#ibcon#enter sib2, iclass 23, count 0 2006.229.03:24:06.83#ibcon#flushed, iclass 23, count 0 2006.229.03:24:06.83#ibcon#about to write, iclass 23, count 0 2006.229.03:24:06.83#ibcon#wrote, iclass 23, count 0 2006.229.03:24:06.83#ibcon#about to read 3, iclass 23, count 0 2006.229.03:24:06.85#ibcon#read 3, iclass 23, count 0 2006.229.03:24:06.85#ibcon#about to read 4, iclass 23, count 0 2006.229.03:24:06.85#ibcon#read 4, iclass 23, count 0 2006.229.03:24:06.85#ibcon#about to read 5, iclass 23, count 0 2006.229.03:24:06.85#ibcon#read 5, iclass 23, count 0 2006.229.03:24:06.85#ibcon#about to read 6, iclass 23, count 0 2006.229.03:24:06.85#ibcon#read 6, iclass 23, count 0 2006.229.03:24:06.85#ibcon#end of sib2, iclass 23, count 0 2006.229.03:24:06.85#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:24:06.85#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:24:06.85#ibcon#[27=USB\r\n] 2006.229.03:24:06.85#ibcon#*before write, iclass 23, count 0 2006.229.03:24:06.85#ibcon#enter sib2, iclass 23, count 0 2006.229.03:24:06.85#ibcon#flushed, iclass 23, count 0 2006.229.03:24:06.85#ibcon#about to write, iclass 23, count 0 2006.229.03:24:06.85#ibcon#wrote, iclass 23, count 0 2006.229.03:24:06.85#ibcon#about to read 3, iclass 23, count 0 2006.229.03:24:06.88#ibcon#read 3, iclass 23, count 0 2006.229.03:24:06.88#ibcon#about to read 4, iclass 23, count 0 2006.229.03:24:06.88#ibcon#read 4, iclass 23, count 0 2006.229.03:24:06.88#ibcon#about to read 5, iclass 23, count 0 2006.229.03:24:06.88#ibcon#read 5, iclass 23, count 0 2006.229.03:24:06.88#ibcon#about to read 6, iclass 23, count 0 2006.229.03:24:06.88#ibcon#read 6, iclass 23, count 0 2006.229.03:24:06.88#ibcon#end of sib2, iclass 23, count 0 2006.229.03:24:06.88#ibcon#*after write, iclass 23, count 0 2006.229.03:24:06.88#ibcon#*before return 0, iclass 23, count 0 2006.229.03:24:06.88#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:06.88#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.03:24:06.88#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:24:06.88#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:24:06.88$vck44/vblo=4,679.99 2006.229.03:24:06.88#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.03:24:06.88#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.03:24:06.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:06.88#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:06.88#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:06.88#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:06.88#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:24:06.88#ibcon#first serial, iclass 25, count 0 2006.229.03:24:06.88#ibcon#enter sib2, iclass 25, count 0 2006.229.03:24:06.88#ibcon#flushed, iclass 25, count 0 2006.229.03:24:06.88#ibcon#about to write, iclass 25, count 0 2006.229.03:24:06.88#ibcon#wrote, iclass 25, count 0 2006.229.03:24:06.88#ibcon#about to read 3, iclass 25, count 0 2006.229.03:24:06.90#ibcon#read 3, iclass 25, count 0 2006.229.03:24:06.90#ibcon#about to read 4, iclass 25, count 0 2006.229.03:24:06.90#ibcon#read 4, iclass 25, count 0 2006.229.03:24:06.90#ibcon#about to read 5, iclass 25, count 0 2006.229.03:24:06.90#ibcon#read 5, iclass 25, count 0 2006.229.03:24:06.90#ibcon#about to read 6, iclass 25, count 0 2006.229.03:24:06.90#ibcon#read 6, iclass 25, count 0 2006.229.03:24:06.90#ibcon#end of sib2, iclass 25, count 0 2006.229.03:24:06.90#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:24:06.90#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:24:06.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:24:06.90#ibcon#*before write, iclass 25, count 0 2006.229.03:24:06.90#ibcon#enter sib2, iclass 25, count 0 2006.229.03:24:06.90#ibcon#flushed, iclass 25, count 0 2006.229.03:24:06.90#ibcon#about to write, iclass 25, count 0 2006.229.03:24:06.90#ibcon#wrote, iclass 25, count 0 2006.229.03:24:06.90#ibcon#about to read 3, iclass 25, count 0 2006.229.03:24:06.94#ibcon#read 3, iclass 25, count 0 2006.229.03:24:06.94#ibcon#about to read 4, iclass 25, count 0 2006.229.03:24:06.94#ibcon#read 4, iclass 25, count 0 2006.229.03:24:06.94#ibcon#about to read 5, iclass 25, count 0 2006.229.03:24:06.94#ibcon#read 5, iclass 25, count 0 2006.229.03:24:06.94#ibcon#about to read 6, iclass 25, count 0 2006.229.03:24:06.94#ibcon#read 6, iclass 25, count 0 2006.229.03:24:06.94#ibcon#end of sib2, iclass 25, count 0 2006.229.03:24:06.94#ibcon#*after write, iclass 25, count 0 2006.229.03:24:06.94#ibcon#*before return 0, iclass 25, count 0 2006.229.03:24:06.94#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:06.94#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:24:06.94#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:24:06.94#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:24:06.94$vck44/vb=4,4 2006.229.03:24:06.94#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.03:24:06.94#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.03:24:06.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:06.94#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:07.00#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:07.00#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:07.00#ibcon#enter wrdev, iclass 27, count 2 2006.229.03:24:07.00#ibcon#first serial, iclass 27, count 2 2006.229.03:24:07.00#ibcon#enter sib2, iclass 27, count 2 2006.229.03:24:07.00#ibcon#flushed, iclass 27, count 2 2006.229.03:24:07.00#ibcon#about to write, iclass 27, count 2 2006.229.03:24:07.00#ibcon#wrote, iclass 27, count 2 2006.229.03:24:07.00#ibcon#about to read 3, iclass 27, count 2 2006.229.03:24:07.02#ibcon#read 3, iclass 27, count 2 2006.229.03:24:07.02#ibcon#about to read 4, iclass 27, count 2 2006.229.03:24:07.02#ibcon#read 4, iclass 27, count 2 2006.229.03:24:07.02#ibcon#about to read 5, iclass 27, count 2 2006.229.03:24:07.02#ibcon#read 5, iclass 27, count 2 2006.229.03:24:07.02#ibcon#about to read 6, iclass 27, count 2 2006.229.03:24:07.02#ibcon#read 6, iclass 27, count 2 2006.229.03:24:07.02#ibcon#end of sib2, iclass 27, count 2 2006.229.03:24:07.02#ibcon#*mode == 0, iclass 27, count 2 2006.229.03:24:07.02#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.03:24:07.02#ibcon#[27=AT04-04\r\n] 2006.229.03:24:07.02#ibcon#*before write, iclass 27, count 2 2006.229.03:24:07.02#ibcon#enter sib2, iclass 27, count 2 2006.229.03:24:07.02#ibcon#flushed, iclass 27, count 2 2006.229.03:24:07.02#ibcon#about to write, iclass 27, count 2 2006.229.03:24:07.02#ibcon#wrote, iclass 27, count 2 2006.229.03:24:07.02#ibcon#about to read 3, iclass 27, count 2 2006.229.03:24:07.05#ibcon#read 3, iclass 27, count 2 2006.229.03:24:07.05#ibcon#about to read 4, iclass 27, count 2 2006.229.03:24:07.05#ibcon#read 4, iclass 27, count 2 2006.229.03:24:07.05#ibcon#about to read 5, iclass 27, count 2 2006.229.03:24:07.05#ibcon#read 5, iclass 27, count 2 2006.229.03:24:07.05#ibcon#about to read 6, iclass 27, count 2 2006.229.03:24:07.05#ibcon#read 6, iclass 27, count 2 2006.229.03:24:07.05#ibcon#end of sib2, iclass 27, count 2 2006.229.03:24:07.05#ibcon#*after write, iclass 27, count 2 2006.229.03:24:07.05#ibcon#*before return 0, iclass 27, count 2 2006.229.03:24:07.05#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:07.05#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.03:24:07.05#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.03:24:07.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:07.05#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:07.17#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:07.17#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:07.17#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:24:07.17#ibcon#first serial, iclass 27, count 0 2006.229.03:24:07.17#ibcon#enter sib2, iclass 27, count 0 2006.229.03:24:07.17#ibcon#flushed, iclass 27, count 0 2006.229.03:24:07.17#ibcon#about to write, iclass 27, count 0 2006.229.03:24:07.17#ibcon#wrote, iclass 27, count 0 2006.229.03:24:07.17#ibcon#about to read 3, iclass 27, count 0 2006.229.03:24:07.19#ibcon#read 3, iclass 27, count 0 2006.229.03:24:07.19#ibcon#about to read 4, iclass 27, count 0 2006.229.03:24:07.19#ibcon#read 4, iclass 27, count 0 2006.229.03:24:07.19#ibcon#about to read 5, iclass 27, count 0 2006.229.03:24:07.19#ibcon#read 5, iclass 27, count 0 2006.229.03:24:07.19#ibcon#about to read 6, iclass 27, count 0 2006.229.03:24:07.19#ibcon#read 6, iclass 27, count 0 2006.229.03:24:07.19#ibcon#end of sib2, iclass 27, count 0 2006.229.03:24:07.19#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:24:07.19#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:24:07.19#ibcon#[27=USB\r\n] 2006.229.03:24:07.19#ibcon#*before write, iclass 27, count 0 2006.229.03:24:07.19#ibcon#enter sib2, iclass 27, count 0 2006.229.03:24:07.19#ibcon#flushed, iclass 27, count 0 2006.229.03:24:07.19#ibcon#about to write, iclass 27, count 0 2006.229.03:24:07.19#ibcon#wrote, iclass 27, count 0 2006.229.03:24:07.19#ibcon#about to read 3, iclass 27, count 0 2006.229.03:24:07.22#ibcon#read 3, iclass 27, count 0 2006.229.03:24:07.22#ibcon#about to read 4, iclass 27, count 0 2006.229.03:24:07.22#ibcon#read 4, iclass 27, count 0 2006.229.03:24:07.22#ibcon#about to read 5, iclass 27, count 0 2006.229.03:24:07.22#ibcon#read 5, iclass 27, count 0 2006.229.03:24:07.22#ibcon#about to read 6, iclass 27, count 0 2006.229.03:24:07.22#ibcon#read 6, iclass 27, count 0 2006.229.03:24:07.22#ibcon#end of sib2, iclass 27, count 0 2006.229.03:24:07.22#ibcon#*after write, iclass 27, count 0 2006.229.03:24:07.22#ibcon#*before return 0, iclass 27, count 0 2006.229.03:24:07.22#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:07.22#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.03:24:07.22#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:24:07.22#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:24:07.22$vck44/vblo=5,709.99 2006.229.03:24:07.22#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.03:24:07.22#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.03:24:07.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:07.22#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:07.22#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:07.22#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:07.22#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:24:07.22#ibcon#first serial, iclass 29, count 0 2006.229.03:24:07.22#ibcon#enter sib2, iclass 29, count 0 2006.229.03:24:07.22#ibcon#flushed, iclass 29, count 0 2006.229.03:24:07.22#ibcon#about to write, iclass 29, count 0 2006.229.03:24:07.22#ibcon#wrote, iclass 29, count 0 2006.229.03:24:07.22#ibcon#about to read 3, iclass 29, count 0 2006.229.03:24:07.24#ibcon#read 3, iclass 29, count 0 2006.229.03:24:07.24#ibcon#about to read 4, iclass 29, count 0 2006.229.03:24:07.24#ibcon#read 4, iclass 29, count 0 2006.229.03:24:07.24#ibcon#about to read 5, iclass 29, count 0 2006.229.03:24:07.24#ibcon#read 5, iclass 29, count 0 2006.229.03:24:07.24#ibcon#about to read 6, iclass 29, count 0 2006.229.03:24:07.24#ibcon#read 6, iclass 29, count 0 2006.229.03:24:07.24#ibcon#end of sib2, iclass 29, count 0 2006.229.03:24:07.24#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:24:07.24#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:24:07.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:24:07.24#ibcon#*before write, iclass 29, count 0 2006.229.03:24:07.24#ibcon#enter sib2, iclass 29, count 0 2006.229.03:24:07.24#ibcon#flushed, iclass 29, count 0 2006.229.03:24:07.24#ibcon#about to write, iclass 29, count 0 2006.229.03:24:07.24#ibcon#wrote, iclass 29, count 0 2006.229.03:24:07.24#ibcon#about to read 3, iclass 29, count 0 2006.229.03:24:07.28#ibcon#read 3, iclass 29, count 0 2006.229.03:24:07.28#ibcon#about to read 4, iclass 29, count 0 2006.229.03:24:07.28#ibcon#read 4, iclass 29, count 0 2006.229.03:24:07.28#ibcon#about to read 5, iclass 29, count 0 2006.229.03:24:07.28#ibcon#read 5, iclass 29, count 0 2006.229.03:24:07.28#ibcon#about to read 6, iclass 29, count 0 2006.229.03:24:07.28#ibcon#read 6, iclass 29, count 0 2006.229.03:24:07.28#ibcon#end of sib2, iclass 29, count 0 2006.229.03:24:07.28#ibcon#*after write, iclass 29, count 0 2006.229.03:24:07.28#ibcon#*before return 0, iclass 29, count 0 2006.229.03:24:07.28#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:07.28#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:24:07.28#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:24:07.28#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:24:07.28$vck44/vb=5,4 2006.229.03:24:07.28#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.03:24:07.28#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.03:24:07.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:07.28#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:07.34#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:07.34#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:07.34#ibcon#enter wrdev, iclass 31, count 2 2006.229.03:24:07.34#ibcon#first serial, iclass 31, count 2 2006.229.03:24:07.34#ibcon#enter sib2, iclass 31, count 2 2006.229.03:24:07.34#ibcon#flushed, iclass 31, count 2 2006.229.03:24:07.34#ibcon#about to write, iclass 31, count 2 2006.229.03:24:07.34#ibcon#wrote, iclass 31, count 2 2006.229.03:24:07.34#ibcon#about to read 3, iclass 31, count 2 2006.229.03:24:07.36#ibcon#read 3, iclass 31, count 2 2006.229.03:24:07.36#ibcon#about to read 4, iclass 31, count 2 2006.229.03:24:07.36#ibcon#read 4, iclass 31, count 2 2006.229.03:24:07.36#ibcon#about to read 5, iclass 31, count 2 2006.229.03:24:07.36#ibcon#read 5, iclass 31, count 2 2006.229.03:24:07.36#ibcon#about to read 6, iclass 31, count 2 2006.229.03:24:07.36#ibcon#read 6, iclass 31, count 2 2006.229.03:24:07.36#ibcon#end of sib2, iclass 31, count 2 2006.229.03:24:07.36#ibcon#*mode == 0, iclass 31, count 2 2006.229.03:24:07.36#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.03:24:07.36#ibcon#[27=AT05-04\r\n] 2006.229.03:24:07.36#ibcon#*before write, iclass 31, count 2 2006.229.03:24:07.36#ibcon#enter sib2, iclass 31, count 2 2006.229.03:24:07.36#ibcon#flushed, iclass 31, count 2 2006.229.03:24:07.36#ibcon#about to write, iclass 31, count 2 2006.229.03:24:07.36#ibcon#wrote, iclass 31, count 2 2006.229.03:24:07.36#ibcon#about to read 3, iclass 31, count 2 2006.229.03:24:07.39#ibcon#read 3, iclass 31, count 2 2006.229.03:24:07.39#ibcon#about to read 4, iclass 31, count 2 2006.229.03:24:07.39#ibcon#read 4, iclass 31, count 2 2006.229.03:24:07.39#ibcon#about to read 5, iclass 31, count 2 2006.229.03:24:07.39#ibcon#read 5, iclass 31, count 2 2006.229.03:24:07.39#ibcon#about to read 6, iclass 31, count 2 2006.229.03:24:07.39#ibcon#read 6, iclass 31, count 2 2006.229.03:24:07.39#ibcon#end of sib2, iclass 31, count 2 2006.229.03:24:07.39#ibcon#*after write, iclass 31, count 2 2006.229.03:24:07.39#ibcon#*before return 0, iclass 31, count 2 2006.229.03:24:07.39#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:07.39#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.03:24:07.39#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.03:24:07.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:07.39#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:07.51#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:07.51#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:07.51#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:24:07.51#ibcon#first serial, iclass 31, count 0 2006.229.03:24:07.51#ibcon#enter sib2, iclass 31, count 0 2006.229.03:24:07.51#ibcon#flushed, iclass 31, count 0 2006.229.03:24:07.51#ibcon#about to write, iclass 31, count 0 2006.229.03:24:07.51#ibcon#wrote, iclass 31, count 0 2006.229.03:24:07.51#ibcon#about to read 3, iclass 31, count 0 2006.229.03:24:07.53#ibcon#read 3, iclass 31, count 0 2006.229.03:24:07.53#ibcon#about to read 4, iclass 31, count 0 2006.229.03:24:07.53#ibcon#read 4, iclass 31, count 0 2006.229.03:24:07.53#ibcon#about to read 5, iclass 31, count 0 2006.229.03:24:07.53#ibcon#read 5, iclass 31, count 0 2006.229.03:24:07.53#ibcon#about to read 6, iclass 31, count 0 2006.229.03:24:07.53#ibcon#read 6, iclass 31, count 0 2006.229.03:24:07.53#ibcon#end of sib2, iclass 31, count 0 2006.229.03:24:07.53#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:24:07.53#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:24:07.53#ibcon#[27=USB\r\n] 2006.229.03:24:07.53#ibcon#*before write, iclass 31, count 0 2006.229.03:24:07.53#ibcon#enter sib2, iclass 31, count 0 2006.229.03:24:07.53#ibcon#flushed, iclass 31, count 0 2006.229.03:24:07.53#ibcon#about to write, iclass 31, count 0 2006.229.03:24:07.53#ibcon#wrote, iclass 31, count 0 2006.229.03:24:07.53#ibcon#about to read 3, iclass 31, count 0 2006.229.03:24:07.56#ibcon#read 3, iclass 31, count 0 2006.229.03:24:07.56#ibcon#about to read 4, iclass 31, count 0 2006.229.03:24:07.56#ibcon#read 4, iclass 31, count 0 2006.229.03:24:07.56#ibcon#about to read 5, iclass 31, count 0 2006.229.03:24:07.56#ibcon#read 5, iclass 31, count 0 2006.229.03:24:07.56#ibcon#about to read 6, iclass 31, count 0 2006.229.03:24:07.56#ibcon#read 6, iclass 31, count 0 2006.229.03:24:07.56#ibcon#end of sib2, iclass 31, count 0 2006.229.03:24:07.56#ibcon#*after write, iclass 31, count 0 2006.229.03:24:07.56#ibcon#*before return 0, iclass 31, count 0 2006.229.03:24:07.56#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:07.56#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.03:24:07.56#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:24:07.56#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:24:07.56$vck44/vblo=6,719.99 2006.229.03:24:07.56#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.03:24:07.56#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.03:24:07.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:07.56#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:07.56#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:07.56#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:07.56#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:24:07.56#ibcon#first serial, iclass 33, count 0 2006.229.03:24:07.56#ibcon#enter sib2, iclass 33, count 0 2006.229.03:24:07.56#ibcon#flushed, iclass 33, count 0 2006.229.03:24:07.56#ibcon#about to write, iclass 33, count 0 2006.229.03:24:07.56#ibcon#wrote, iclass 33, count 0 2006.229.03:24:07.56#ibcon#about to read 3, iclass 33, count 0 2006.229.03:24:07.58#ibcon#read 3, iclass 33, count 0 2006.229.03:24:07.58#ibcon#about to read 4, iclass 33, count 0 2006.229.03:24:07.58#ibcon#read 4, iclass 33, count 0 2006.229.03:24:07.58#ibcon#about to read 5, iclass 33, count 0 2006.229.03:24:07.58#ibcon#read 5, iclass 33, count 0 2006.229.03:24:07.58#ibcon#about to read 6, iclass 33, count 0 2006.229.03:24:07.58#ibcon#read 6, iclass 33, count 0 2006.229.03:24:07.58#ibcon#end of sib2, iclass 33, count 0 2006.229.03:24:07.58#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:24:07.58#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:24:07.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:24:07.58#ibcon#*before write, iclass 33, count 0 2006.229.03:24:07.58#ibcon#enter sib2, iclass 33, count 0 2006.229.03:24:07.58#ibcon#flushed, iclass 33, count 0 2006.229.03:24:07.58#ibcon#about to write, iclass 33, count 0 2006.229.03:24:07.58#ibcon#wrote, iclass 33, count 0 2006.229.03:24:07.58#ibcon#about to read 3, iclass 33, count 0 2006.229.03:24:07.62#ibcon#read 3, iclass 33, count 0 2006.229.03:24:07.62#ibcon#about to read 4, iclass 33, count 0 2006.229.03:24:07.62#ibcon#read 4, iclass 33, count 0 2006.229.03:24:07.62#ibcon#about to read 5, iclass 33, count 0 2006.229.03:24:07.62#ibcon#read 5, iclass 33, count 0 2006.229.03:24:07.62#ibcon#about to read 6, iclass 33, count 0 2006.229.03:24:07.62#ibcon#read 6, iclass 33, count 0 2006.229.03:24:07.62#ibcon#end of sib2, iclass 33, count 0 2006.229.03:24:07.62#ibcon#*after write, iclass 33, count 0 2006.229.03:24:07.62#ibcon#*before return 0, iclass 33, count 0 2006.229.03:24:07.62#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:07.62#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.03:24:07.62#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:24:07.62#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:24:07.62$vck44/vb=6,4 2006.229.03:24:07.62#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.03:24:07.62#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.03:24:07.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:07.62#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:07.68#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:07.68#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:07.68#ibcon#enter wrdev, iclass 35, count 2 2006.229.03:24:07.68#ibcon#first serial, iclass 35, count 2 2006.229.03:24:07.68#ibcon#enter sib2, iclass 35, count 2 2006.229.03:24:07.68#ibcon#flushed, iclass 35, count 2 2006.229.03:24:07.68#ibcon#about to write, iclass 35, count 2 2006.229.03:24:07.68#ibcon#wrote, iclass 35, count 2 2006.229.03:24:07.68#ibcon#about to read 3, iclass 35, count 2 2006.229.03:24:07.70#ibcon#read 3, iclass 35, count 2 2006.229.03:24:07.70#ibcon#about to read 4, iclass 35, count 2 2006.229.03:24:07.70#ibcon#read 4, iclass 35, count 2 2006.229.03:24:07.70#ibcon#about to read 5, iclass 35, count 2 2006.229.03:24:07.70#ibcon#read 5, iclass 35, count 2 2006.229.03:24:07.70#ibcon#about to read 6, iclass 35, count 2 2006.229.03:24:07.70#ibcon#read 6, iclass 35, count 2 2006.229.03:24:07.70#ibcon#end of sib2, iclass 35, count 2 2006.229.03:24:07.70#ibcon#*mode == 0, iclass 35, count 2 2006.229.03:24:07.70#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.03:24:07.70#ibcon#[27=AT06-04\r\n] 2006.229.03:24:07.70#ibcon#*before write, iclass 35, count 2 2006.229.03:24:07.70#ibcon#enter sib2, iclass 35, count 2 2006.229.03:24:07.70#ibcon#flushed, iclass 35, count 2 2006.229.03:24:07.70#ibcon#about to write, iclass 35, count 2 2006.229.03:24:07.70#ibcon#wrote, iclass 35, count 2 2006.229.03:24:07.70#ibcon#about to read 3, iclass 35, count 2 2006.229.03:24:07.73#ibcon#read 3, iclass 35, count 2 2006.229.03:24:07.73#ibcon#about to read 4, iclass 35, count 2 2006.229.03:24:07.73#ibcon#read 4, iclass 35, count 2 2006.229.03:24:07.73#ibcon#about to read 5, iclass 35, count 2 2006.229.03:24:07.73#ibcon#read 5, iclass 35, count 2 2006.229.03:24:07.73#ibcon#about to read 6, iclass 35, count 2 2006.229.03:24:07.73#ibcon#read 6, iclass 35, count 2 2006.229.03:24:07.73#ibcon#end of sib2, iclass 35, count 2 2006.229.03:24:07.73#ibcon#*after write, iclass 35, count 2 2006.229.03:24:07.73#ibcon#*before return 0, iclass 35, count 2 2006.229.03:24:07.73#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:07.73#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.03:24:07.73#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.03:24:07.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:07.73#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:07.85#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:07.85#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:07.85#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:24:07.85#ibcon#first serial, iclass 35, count 0 2006.229.03:24:07.85#ibcon#enter sib2, iclass 35, count 0 2006.229.03:24:07.85#ibcon#flushed, iclass 35, count 0 2006.229.03:24:07.85#ibcon#about to write, iclass 35, count 0 2006.229.03:24:07.85#ibcon#wrote, iclass 35, count 0 2006.229.03:24:07.85#ibcon#about to read 3, iclass 35, count 0 2006.229.03:24:07.87#ibcon#read 3, iclass 35, count 0 2006.229.03:24:07.87#ibcon#about to read 4, iclass 35, count 0 2006.229.03:24:07.87#ibcon#read 4, iclass 35, count 0 2006.229.03:24:07.87#ibcon#about to read 5, iclass 35, count 0 2006.229.03:24:07.87#ibcon#read 5, iclass 35, count 0 2006.229.03:24:07.87#ibcon#about to read 6, iclass 35, count 0 2006.229.03:24:07.87#ibcon#read 6, iclass 35, count 0 2006.229.03:24:07.87#ibcon#end of sib2, iclass 35, count 0 2006.229.03:24:07.87#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:24:07.87#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:24:07.87#ibcon#[27=USB\r\n] 2006.229.03:24:07.87#ibcon#*before write, iclass 35, count 0 2006.229.03:24:07.87#ibcon#enter sib2, iclass 35, count 0 2006.229.03:24:07.87#ibcon#flushed, iclass 35, count 0 2006.229.03:24:07.87#ibcon#about to write, iclass 35, count 0 2006.229.03:24:07.87#ibcon#wrote, iclass 35, count 0 2006.229.03:24:07.87#ibcon#about to read 3, iclass 35, count 0 2006.229.03:24:07.90#ibcon#read 3, iclass 35, count 0 2006.229.03:24:07.90#ibcon#about to read 4, iclass 35, count 0 2006.229.03:24:07.90#ibcon#read 4, iclass 35, count 0 2006.229.03:24:07.90#ibcon#about to read 5, iclass 35, count 0 2006.229.03:24:07.90#ibcon#read 5, iclass 35, count 0 2006.229.03:24:07.90#ibcon#about to read 6, iclass 35, count 0 2006.229.03:24:07.90#ibcon#read 6, iclass 35, count 0 2006.229.03:24:07.90#ibcon#end of sib2, iclass 35, count 0 2006.229.03:24:07.90#ibcon#*after write, iclass 35, count 0 2006.229.03:24:07.90#ibcon#*before return 0, iclass 35, count 0 2006.229.03:24:07.90#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:07.90#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.03:24:07.90#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:24:07.90#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:24:07.90$vck44/vblo=7,734.99 2006.229.03:24:07.90#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.03:24:07.90#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.03:24:07.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:07.90#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:07.90#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:07.90#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:07.90#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:24:07.90#ibcon#first serial, iclass 37, count 0 2006.229.03:24:07.90#ibcon#enter sib2, iclass 37, count 0 2006.229.03:24:07.90#ibcon#flushed, iclass 37, count 0 2006.229.03:24:07.90#ibcon#about to write, iclass 37, count 0 2006.229.03:24:07.90#ibcon#wrote, iclass 37, count 0 2006.229.03:24:07.90#ibcon#about to read 3, iclass 37, count 0 2006.229.03:24:07.92#ibcon#read 3, iclass 37, count 0 2006.229.03:24:07.92#ibcon#about to read 4, iclass 37, count 0 2006.229.03:24:07.92#ibcon#read 4, iclass 37, count 0 2006.229.03:24:07.92#ibcon#about to read 5, iclass 37, count 0 2006.229.03:24:07.92#ibcon#read 5, iclass 37, count 0 2006.229.03:24:07.92#ibcon#about to read 6, iclass 37, count 0 2006.229.03:24:07.92#ibcon#read 6, iclass 37, count 0 2006.229.03:24:07.92#ibcon#end of sib2, iclass 37, count 0 2006.229.03:24:07.92#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:24:07.92#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:24:07.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:24:07.92#ibcon#*before write, iclass 37, count 0 2006.229.03:24:07.92#ibcon#enter sib2, iclass 37, count 0 2006.229.03:24:07.92#ibcon#flushed, iclass 37, count 0 2006.229.03:24:07.92#ibcon#about to write, iclass 37, count 0 2006.229.03:24:07.92#ibcon#wrote, iclass 37, count 0 2006.229.03:24:07.92#ibcon#about to read 3, iclass 37, count 0 2006.229.03:24:07.96#ibcon#read 3, iclass 37, count 0 2006.229.03:24:07.96#ibcon#about to read 4, iclass 37, count 0 2006.229.03:24:07.96#ibcon#read 4, iclass 37, count 0 2006.229.03:24:07.96#ibcon#about to read 5, iclass 37, count 0 2006.229.03:24:07.96#ibcon#read 5, iclass 37, count 0 2006.229.03:24:07.96#ibcon#about to read 6, iclass 37, count 0 2006.229.03:24:07.96#ibcon#read 6, iclass 37, count 0 2006.229.03:24:07.96#ibcon#end of sib2, iclass 37, count 0 2006.229.03:24:07.96#ibcon#*after write, iclass 37, count 0 2006.229.03:24:07.96#ibcon#*before return 0, iclass 37, count 0 2006.229.03:24:07.96#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:07.96#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.03:24:07.96#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:24:07.96#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:24:07.96$vck44/vb=7,4 2006.229.03:24:07.96#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.03:24:07.96#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.03:24:07.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:07.96#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:08.02#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:08.02#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:08.02#ibcon#enter wrdev, iclass 39, count 2 2006.229.03:24:08.02#ibcon#first serial, iclass 39, count 2 2006.229.03:24:08.02#ibcon#enter sib2, iclass 39, count 2 2006.229.03:24:08.02#ibcon#flushed, iclass 39, count 2 2006.229.03:24:08.02#ibcon#about to write, iclass 39, count 2 2006.229.03:24:08.02#ibcon#wrote, iclass 39, count 2 2006.229.03:24:08.02#ibcon#about to read 3, iclass 39, count 2 2006.229.03:24:08.04#ibcon#read 3, iclass 39, count 2 2006.229.03:24:08.04#ibcon#about to read 4, iclass 39, count 2 2006.229.03:24:08.04#ibcon#read 4, iclass 39, count 2 2006.229.03:24:08.04#ibcon#about to read 5, iclass 39, count 2 2006.229.03:24:08.04#ibcon#read 5, iclass 39, count 2 2006.229.03:24:08.04#ibcon#about to read 6, iclass 39, count 2 2006.229.03:24:08.04#ibcon#read 6, iclass 39, count 2 2006.229.03:24:08.04#ibcon#end of sib2, iclass 39, count 2 2006.229.03:24:08.04#ibcon#*mode == 0, iclass 39, count 2 2006.229.03:24:08.04#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.03:24:08.04#ibcon#[27=AT07-04\r\n] 2006.229.03:24:08.04#ibcon#*before write, iclass 39, count 2 2006.229.03:24:08.04#ibcon#enter sib2, iclass 39, count 2 2006.229.03:24:08.04#ibcon#flushed, iclass 39, count 2 2006.229.03:24:08.04#ibcon#about to write, iclass 39, count 2 2006.229.03:24:08.04#ibcon#wrote, iclass 39, count 2 2006.229.03:24:08.04#ibcon#about to read 3, iclass 39, count 2 2006.229.03:24:08.07#ibcon#read 3, iclass 39, count 2 2006.229.03:24:08.07#ibcon#about to read 4, iclass 39, count 2 2006.229.03:24:08.07#ibcon#read 4, iclass 39, count 2 2006.229.03:24:08.07#ibcon#about to read 5, iclass 39, count 2 2006.229.03:24:08.07#ibcon#read 5, iclass 39, count 2 2006.229.03:24:08.07#ibcon#about to read 6, iclass 39, count 2 2006.229.03:24:08.07#ibcon#read 6, iclass 39, count 2 2006.229.03:24:08.07#ibcon#end of sib2, iclass 39, count 2 2006.229.03:24:08.07#ibcon#*after write, iclass 39, count 2 2006.229.03:24:08.07#ibcon#*before return 0, iclass 39, count 2 2006.229.03:24:08.07#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:08.07#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.03:24:08.07#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.03:24:08.07#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:08.07#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:08.19#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:08.19#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:08.19#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:24:08.19#ibcon#first serial, iclass 39, count 0 2006.229.03:24:08.19#ibcon#enter sib2, iclass 39, count 0 2006.229.03:24:08.19#ibcon#flushed, iclass 39, count 0 2006.229.03:24:08.19#ibcon#about to write, iclass 39, count 0 2006.229.03:24:08.19#ibcon#wrote, iclass 39, count 0 2006.229.03:24:08.19#ibcon#about to read 3, iclass 39, count 0 2006.229.03:24:08.21#ibcon#read 3, iclass 39, count 0 2006.229.03:24:08.21#ibcon#about to read 4, iclass 39, count 0 2006.229.03:24:08.21#ibcon#read 4, iclass 39, count 0 2006.229.03:24:08.21#ibcon#about to read 5, iclass 39, count 0 2006.229.03:24:08.21#ibcon#read 5, iclass 39, count 0 2006.229.03:24:08.21#ibcon#about to read 6, iclass 39, count 0 2006.229.03:24:08.21#ibcon#read 6, iclass 39, count 0 2006.229.03:24:08.21#ibcon#end of sib2, iclass 39, count 0 2006.229.03:24:08.21#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:24:08.21#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:24:08.21#ibcon#[27=USB\r\n] 2006.229.03:24:08.21#ibcon#*before write, iclass 39, count 0 2006.229.03:24:08.21#ibcon#enter sib2, iclass 39, count 0 2006.229.03:24:08.21#ibcon#flushed, iclass 39, count 0 2006.229.03:24:08.21#ibcon#about to write, iclass 39, count 0 2006.229.03:24:08.21#ibcon#wrote, iclass 39, count 0 2006.229.03:24:08.21#ibcon#about to read 3, iclass 39, count 0 2006.229.03:24:08.24#ibcon#read 3, iclass 39, count 0 2006.229.03:24:08.24#ibcon#about to read 4, iclass 39, count 0 2006.229.03:24:08.24#ibcon#read 4, iclass 39, count 0 2006.229.03:24:08.24#ibcon#about to read 5, iclass 39, count 0 2006.229.03:24:08.24#ibcon#read 5, iclass 39, count 0 2006.229.03:24:08.24#ibcon#about to read 6, iclass 39, count 0 2006.229.03:24:08.24#ibcon#read 6, iclass 39, count 0 2006.229.03:24:08.24#ibcon#end of sib2, iclass 39, count 0 2006.229.03:24:08.24#ibcon#*after write, iclass 39, count 0 2006.229.03:24:08.24#ibcon#*before return 0, iclass 39, count 0 2006.229.03:24:08.24#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:08.24#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.03:24:08.24#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:24:08.24#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:24:08.24$vck44/vblo=8,744.99 2006.229.03:24:08.24#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.03:24:08.24#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.03:24:08.24#ibcon#ireg 17 cls_cnt 0 2006.229.03:24:08.24#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:08.24#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:08.24#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:08.24#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:24:08.24#ibcon#first serial, iclass 3, count 0 2006.229.03:24:08.24#ibcon#enter sib2, iclass 3, count 0 2006.229.03:24:08.24#ibcon#flushed, iclass 3, count 0 2006.229.03:24:08.24#ibcon#about to write, iclass 3, count 0 2006.229.03:24:08.24#ibcon#wrote, iclass 3, count 0 2006.229.03:24:08.24#ibcon#about to read 3, iclass 3, count 0 2006.229.03:24:08.26#ibcon#read 3, iclass 3, count 0 2006.229.03:24:08.26#ibcon#about to read 4, iclass 3, count 0 2006.229.03:24:08.26#ibcon#read 4, iclass 3, count 0 2006.229.03:24:08.26#ibcon#about to read 5, iclass 3, count 0 2006.229.03:24:08.26#ibcon#read 5, iclass 3, count 0 2006.229.03:24:08.26#ibcon#about to read 6, iclass 3, count 0 2006.229.03:24:08.26#ibcon#read 6, iclass 3, count 0 2006.229.03:24:08.26#ibcon#end of sib2, iclass 3, count 0 2006.229.03:24:08.26#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:24:08.26#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:24:08.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:24:08.26#ibcon#*before write, iclass 3, count 0 2006.229.03:24:08.26#ibcon#enter sib2, iclass 3, count 0 2006.229.03:24:08.26#ibcon#flushed, iclass 3, count 0 2006.229.03:24:08.26#ibcon#about to write, iclass 3, count 0 2006.229.03:24:08.26#ibcon#wrote, iclass 3, count 0 2006.229.03:24:08.26#ibcon#about to read 3, iclass 3, count 0 2006.229.03:24:08.30#ibcon#read 3, iclass 3, count 0 2006.229.03:24:08.30#ibcon#about to read 4, iclass 3, count 0 2006.229.03:24:08.30#ibcon#read 4, iclass 3, count 0 2006.229.03:24:08.30#ibcon#about to read 5, iclass 3, count 0 2006.229.03:24:08.30#ibcon#read 5, iclass 3, count 0 2006.229.03:24:08.30#ibcon#about to read 6, iclass 3, count 0 2006.229.03:24:08.30#ibcon#read 6, iclass 3, count 0 2006.229.03:24:08.30#ibcon#end of sib2, iclass 3, count 0 2006.229.03:24:08.30#ibcon#*after write, iclass 3, count 0 2006.229.03:24:08.30#ibcon#*before return 0, iclass 3, count 0 2006.229.03:24:08.30#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:08.30#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.03:24:08.30#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:24:08.30#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:24:08.30$vck44/vb=8,4 2006.229.03:24:08.30#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.03:24:08.30#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.03:24:08.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:24:08.30#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:08.36#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:08.36#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:08.36#ibcon#enter wrdev, iclass 5, count 2 2006.229.03:24:08.36#ibcon#first serial, iclass 5, count 2 2006.229.03:24:08.36#ibcon#enter sib2, iclass 5, count 2 2006.229.03:24:08.36#ibcon#flushed, iclass 5, count 2 2006.229.03:24:08.36#ibcon#about to write, iclass 5, count 2 2006.229.03:24:08.36#ibcon#wrote, iclass 5, count 2 2006.229.03:24:08.36#ibcon#about to read 3, iclass 5, count 2 2006.229.03:24:08.38#ibcon#read 3, iclass 5, count 2 2006.229.03:24:08.38#ibcon#about to read 4, iclass 5, count 2 2006.229.03:24:08.38#ibcon#read 4, iclass 5, count 2 2006.229.03:24:08.38#ibcon#about to read 5, iclass 5, count 2 2006.229.03:24:08.38#ibcon#read 5, iclass 5, count 2 2006.229.03:24:08.38#ibcon#about to read 6, iclass 5, count 2 2006.229.03:24:08.38#ibcon#read 6, iclass 5, count 2 2006.229.03:24:08.38#ibcon#end of sib2, iclass 5, count 2 2006.229.03:24:08.38#ibcon#*mode == 0, iclass 5, count 2 2006.229.03:24:08.38#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.03:24:08.38#ibcon#[27=AT08-04\r\n] 2006.229.03:24:08.38#ibcon#*before write, iclass 5, count 2 2006.229.03:24:08.38#ibcon#enter sib2, iclass 5, count 2 2006.229.03:24:08.38#ibcon#flushed, iclass 5, count 2 2006.229.03:24:08.38#ibcon#about to write, iclass 5, count 2 2006.229.03:24:08.38#ibcon#wrote, iclass 5, count 2 2006.229.03:24:08.38#ibcon#about to read 3, iclass 5, count 2 2006.229.03:24:08.41#ibcon#read 3, iclass 5, count 2 2006.229.03:24:08.41#ibcon#about to read 4, iclass 5, count 2 2006.229.03:24:08.41#ibcon#read 4, iclass 5, count 2 2006.229.03:24:08.41#ibcon#about to read 5, iclass 5, count 2 2006.229.03:24:08.41#ibcon#read 5, iclass 5, count 2 2006.229.03:24:08.41#ibcon#about to read 6, iclass 5, count 2 2006.229.03:24:08.41#ibcon#read 6, iclass 5, count 2 2006.229.03:24:08.41#ibcon#end of sib2, iclass 5, count 2 2006.229.03:24:08.41#ibcon#*after write, iclass 5, count 2 2006.229.03:24:08.41#ibcon#*before return 0, iclass 5, count 2 2006.229.03:24:08.41#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:08.41#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.03:24:08.41#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.03:24:08.41#ibcon#ireg 7 cls_cnt 0 2006.229.03:24:08.41#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:08.53#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:08.53#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:08.53#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:24:08.53#ibcon#first serial, iclass 5, count 0 2006.229.03:24:08.53#ibcon#enter sib2, iclass 5, count 0 2006.229.03:24:08.53#ibcon#flushed, iclass 5, count 0 2006.229.03:24:08.53#ibcon#about to write, iclass 5, count 0 2006.229.03:24:08.53#ibcon#wrote, iclass 5, count 0 2006.229.03:24:08.53#ibcon#about to read 3, iclass 5, count 0 2006.229.03:24:08.55#ibcon#read 3, iclass 5, count 0 2006.229.03:24:08.55#ibcon#about to read 4, iclass 5, count 0 2006.229.03:24:08.55#ibcon#read 4, iclass 5, count 0 2006.229.03:24:08.55#ibcon#about to read 5, iclass 5, count 0 2006.229.03:24:08.55#ibcon#read 5, iclass 5, count 0 2006.229.03:24:08.55#ibcon#about to read 6, iclass 5, count 0 2006.229.03:24:08.55#ibcon#read 6, iclass 5, count 0 2006.229.03:24:08.55#ibcon#end of sib2, iclass 5, count 0 2006.229.03:24:08.55#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:24:08.55#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:24:08.55#ibcon#[27=USB\r\n] 2006.229.03:24:08.55#ibcon#*before write, iclass 5, count 0 2006.229.03:24:08.55#ibcon#enter sib2, iclass 5, count 0 2006.229.03:24:08.55#ibcon#flushed, iclass 5, count 0 2006.229.03:24:08.55#ibcon#about to write, iclass 5, count 0 2006.229.03:24:08.55#ibcon#wrote, iclass 5, count 0 2006.229.03:24:08.55#ibcon#about to read 3, iclass 5, count 0 2006.229.03:24:08.58#ibcon#read 3, iclass 5, count 0 2006.229.03:24:08.58#ibcon#about to read 4, iclass 5, count 0 2006.229.03:24:08.58#ibcon#read 4, iclass 5, count 0 2006.229.03:24:08.58#ibcon#about to read 5, iclass 5, count 0 2006.229.03:24:08.58#ibcon#read 5, iclass 5, count 0 2006.229.03:24:08.58#ibcon#about to read 6, iclass 5, count 0 2006.229.03:24:08.58#ibcon#read 6, iclass 5, count 0 2006.229.03:24:08.58#ibcon#end of sib2, iclass 5, count 0 2006.229.03:24:08.58#ibcon#*after write, iclass 5, count 0 2006.229.03:24:08.58#ibcon#*before return 0, iclass 5, count 0 2006.229.03:24:08.58#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:08.58#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.03:24:08.58#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:24:08.58#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:24:08.58$vck44/vabw=wide 2006.229.03:24:08.58#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.03:24:08.58#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.03:24:08.58#ibcon#ireg 8 cls_cnt 0 2006.229.03:24:08.58#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:08.58#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:08.58#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:08.58#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:24:08.58#ibcon#first serial, iclass 7, count 0 2006.229.03:24:08.58#ibcon#enter sib2, iclass 7, count 0 2006.229.03:24:08.58#ibcon#flushed, iclass 7, count 0 2006.229.03:24:08.58#ibcon#about to write, iclass 7, count 0 2006.229.03:24:08.58#ibcon#wrote, iclass 7, count 0 2006.229.03:24:08.58#ibcon#about to read 3, iclass 7, count 0 2006.229.03:24:08.60#ibcon#read 3, iclass 7, count 0 2006.229.03:24:08.60#ibcon#about to read 4, iclass 7, count 0 2006.229.03:24:08.60#ibcon#read 4, iclass 7, count 0 2006.229.03:24:08.60#ibcon#about to read 5, iclass 7, count 0 2006.229.03:24:08.60#ibcon#read 5, iclass 7, count 0 2006.229.03:24:08.60#ibcon#about to read 6, iclass 7, count 0 2006.229.03:24:08.60#ibcon#read 6, iclass 7, count 0 2006.229.03:24:08.60#ibcon#end of sib2, iclass 7, count 0 2006.229.03:24:08.60#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:24:08.60#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:24:08.60#ibcon#[25=BW32\r\n] 2006.229.03:24:08.60#ibcon#*before write, iclass 7, count 0 2006.229.03:24:08.60#ibcon#enter sib2, iclass 7, count 0 2006.229.03:24:08.60#ibcon#flushed, iclass 7, count 0 2006.229.03:24:08.60#ibcon#about to write, iclass 7, count 0 2006.229.03:24:08.60#ibcon#wrote, iclass 7, count 0 2006.229.03:24:08.60#ibcon#about to read 3, iclass 7, count 0 2006.229.03:24:08.63#ibcon#read 3, iclass 7, count 0 2006.229.03:24:08.63#ibcon#about to read 4, iclass 7, count 0 2006.229.03:24:08.63#ibcon#read 4, iclass 7, count 0 2006.229.03:24:08.63#ibcon#about to read 5, iclass 7, count 0 2006.229.03:24:08.63#ibcon#read 5, iclass 7, count 0 2006.229.03:24:08.63#ibcon#about to read 6, iclass 7, count 0 2006.229.03:24:08.63#ibcon#read 6, iclass 7, count 0 2006.229.03:24:08.63#ibcon#end of sib2, iclass 7, count 0 2006.229.03:24:08.63#ibcon#*after write, iclass 7, count 0 2006.229.03:24:08.63#ibcon#*before return 0, iclass 7, count 0 2006.229.03:24:08.63#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:08.63#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.03:24:08.63#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:24:08.63#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:24:08.63$vck44/vbbw=wide 2006.229.03:24:08.63#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.03:24:08.63#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.03:24:08.63#ibcon#ireg 8 cls_cnt 0 2006.229.03:24:08.63#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:24:08.70#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:24:08.70#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:24:08.70#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:24:08.70#ibcon#first serial, iclass 11, count 0 2006.229.03:24:08.70#ibcon#enter sib2, iclass 11, count 0 2006.229.03:24:08.70#ibcon#flushed, iclass 11, count 0 2006.229.03:24:08.70#ibcon#about to write, iclass 11, count 0 2006.229.03:24:08.70#ibcon#wrote, iclass 11, count 0 2006.229.03:24:08.70#ibcon#about to read 3, iclass 11, count 0 2006.229.03:24:08.72#ibcon#read 3, iclass 11, count 0 2006.229.03:24:08.72#ibcon#about to read 4, iclass 11, count 0 2006.229.03:24:08.72#ibcon#read 4, iclass 11, count 0 2006.229.03:24:08.72#ibcon#about to read 5, iclass 11, count 0 2006.229.03:24:08.72#ibcon#read 5, iclass 11, count 0 2006.229.03:24:08.72#ibcon#about to read 6, iclass 11, count 0 2006.229.03:24:08.72#ibcon#read 6, iclass 11, count 0 2006.229.03:24:08.72#ibcon#end of sib2, iclass 11, count 0 2006.229.03:24:08.72#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:24:08.72#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:24:08.72#ibcon#[27=BW32\r\n] 2006.229.03:24:08.72#ibcon#*before write, iclass 11, count 0 2006.229.03:24:08.72#ibcon#enter sib2, iclass 11, count 0 2006.229.03:24:08.72#ibcon#flushed, iclass 11, count 0 2006.229.03:24:08.72#ibcon#about to write, iclass 11, count 0 2006.229.03:24:08.72#ibcon#wrote, iclass 11, count 0 2006.229.03:24:08.72#ibcon#about to read 3, iclass 11, count 0 2006.229.03:24:08.75#ibcon#read 3, iclass 11, count 0 2006.229.03:24:08.75#ibcon#about to read 4, iclass 11, count 0 2006.229.03:24:08.75#ibcon#read 4, iclass 11, count 0 2006.229.03:24:08.75#ibcon#about to read 5, iclass 11, count 0 2006.229.03:24:08.75#ibcon#read 5, iclass 11, count 0 2006.229.03:24:08.75#ibcon#about to read 6, iclass 11, count 0 2006.229.03:24:08.75#ibcon#read 6, iclass 11, count 0 2006.229.03:24:08.75#ibcon#end of sib2, iclass 11, count 0 2006.229.03:24:08.75#ibcon#*after write, iclass 11, count 0 2006.229.03:24:08.75#ibcon#*before return 0, iclass 11, count 0 2006.229.03:24:08.75#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:24:08.75#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:24:08.75#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:24:08.75#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:24:08.75$setupk4/ifdk4 2006.229.03:24:08.75$ifdk4/lo= 2006.229.03:24:08.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:24:08.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:24:08.75$ifdk4/patch= 2006.229.03:24:08.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:24:08.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:24:08.75$setupk4/!*+20s 2006.229.03:24:16.22#abcon#<5=/04 2.4 4.3 29.03 991000.6\r\n> 2006.229.03:24:16.24#abcon#{5=INTERFACE CLEAR} 2006.229.03:24:16.30#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:24:23.24$setupk4/"tpicd 2006.229.03:24:23.24$setupk4/echo=off 2006.229.03:24:23.24$setupk4/xlog=off 2006.229.03:24:23.24:!2006.229.03:29:41 2006.229.03:25:00.14#trakl#Source acquired 2006.229.03:25:02.14#flagr#flagr/antenna,acquired 2006.229.03:29:41.00:preob 2006.229.03:29:42.14/onsource/TRACKING 2006.229.03:29:42.14:!2006.229.03:29:51 2006.229.03:29:51.00:"tape 2006.229.03:29:51.00:"st=record 2006.229.03:29:51.00:data_valid=on 2006.229.03:29:51.00:midob 2006.229.03:29:51.14/onsource/TRACKING 2006.229.03:29:51.14/wx/29.23,1000.6,96 2006.229.03:29:51.21/cable/+6.4119E-03 2006.229.03:29:52.30/va/01,08,usb,yes,30,32 2006.229.03:29:52.30/va/02,07,usb,yes,32,33 2006.229.03:29:52.30/va/03,06,usb,yes,40,42 2006.229.03:29:52.30/va/04,07,usb,yes,33,35 2006.229.03:29:52.30/va/05,04,usb,yes,30,30 2006.229.03:29:52.30/va/06,04,usb,yes,33,33 2006.229.03:29:52.30/va/07,05,usb,yes,29,30 2006.229.03:29:52.30/va/08,06,usb,yes,21,26 2006.229.03:29:52.53/valo/01,524.99,yes,locked 2006.229.03:29:52.53/valo/02,534.99,yes,locked 2006.229.03:29:52.53/valo/03,564.99,yes,locked 2006.229.03:29:52.53/valo/04,624.99,yes,locked 2006.229.03:29:52.53/valo/05,734.99,yes,locked 2006.229.03:29:52.53/valo/06,814.99,yes,locked 2006.229.03:29:52.53/valo/07,864.99,yes,locked 2006.229.03:29:52.53/valo/08,884.99,yes,locked 2006.229.03:29:53.62/vb/01,04,usb,yes,31,29 2006.229.03:29:53.62/vb/02,04,usb,yes,33,33 2006.229.03:29:53.62/vb/03,04,usb,yes,30,33 2006.229.03:29:53.62/vb/04,04,usb,yes,35,34 2006.229.03:29:53.62/vb/05,04,usb,yes,27,30 2006.229.03:29:53.62/vb/06,04,usb,yes,32,28 2006.229.03:29:53.62/vb/07,04,usb,yes,31,31 2006.229.03:29:53.62/vb/08,04,usb,yes,29,32 2006.229.03:29:53.85/vblo/01,629.99,yes,locked 2006.229.03:29:53.85/vblo/02,634.99,yes,locked 2006.229.03:29:53.85/vblo/03,649.99,yes,locked 2006.229.03:29:53.85/vblo/04,679.99,yes,locked 2006.229.03:29:53.85/vblo/05,709.99,yes,locked 2006.229.03:29:53.85/vblo/06,719.99,yes,locked 2006.229.03:29:53.85/vblo/07,734.99,yes,locked 2006.229.03:29:53.85/vblo/08,744.99,yes,locked 2006.229.03:29:54.00/vabw/8 2006.229.03:29:54.15/vbbw/8 2006.229.03:29:54.24/xfe/off,on,12.0 2006.229.03:29:54.62/ifatt/23,28,28,28 2006.229.03:29:55.08/fmout-gps/S +4.41E-07 2006.229.03:29:55.12:!2006.229.03:30:41 2006.229.03:30:41.00:data_valid=off 2006.229.03:30:41.00:"et 2006.229.03:30:41.00:!+3s 2006.229.03:30:44.01:"tape 2006.229.03:30:44.01:postob 2006.229.03:30:44.22/cable/+6.4093E-03 2006.229.03:30:44.22/wx/29.20,1000.6,97 2006.229.03:30:45.08/fmout-gps/S +4.41E-07 2006.229.03:30:45.08:scan_name=229-0333,jd0608,120 2006.229.03:30:45.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.03:30:46.14#flagr#flagr/antenna,new-source 2006.229.03:30:46.14:checkk5 2006.229.03:30:46.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:30:46.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:30:47.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:30:47.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:30:48.13/chk_obsdata//k5ts1/T2290329??a.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.03:30:48.52/chk_obsdata//k5ts2/T2290329??b.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.03:30:48.92/chk_obsdata//k5ts3/T2290329??c.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.03:30:49.33/chk_obsdata//k5ts4/T2290329??d.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.03:30:50.06/k5log//k5ts1_log_newline 2006.229.03:30:50.79/k5log//k5ts2_log_newline 2006.229.03:30:51.50/k5log//k5ts3_log_newline 2006.229.03:30:52.20/k5log//k5ts4_log_newline 2006.229.03:30:52.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:30:52.23:setupk4=1 2006.229.03:30:52.23$setupk4/echo=on 2006.229.03:30:52.23$setupk4/pcalon 2006.229.03:30:52.23$pcalon/"no phase cal control is implemented here 2006.229.03:30:52.23$setupk4/"tpicd=stop 2006.229.03:30:52.23$setupk4/"rec=synch_on 2006.229.03:30:52.23$setupk4/"rec_mode=128 2006.229.03:30:52.23$setupk4/!* 2006.229.03:30:52.23$setupk4/recpk4 2006.229.03:30:52.23$recpk4/recpatch= 2006.229.03:30:52.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:30:52.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:30:52.23$setupk4/vck44 2006.229.03:30:52.23$vck44/valo=1,524.99 2006.229.03:30:52.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.03:30:52.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.03:30:52.23#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:52.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:52.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:52.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:52.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:30:52.23#ibcon#first serial, iclass 28, count 0 2006.229.03:30:52.23#ibcon#enter sib2, iclass 28, count 0 2006.229.03:30:52.23#ibcon#flushed, iclass 28, count 0 2006.229.03:30:52.23#ibcon#about to write, iclass 28, count 0 2006.229.03:30:52.23#ibcon#wrote, iclass 28, count 0 2006.229.03:30:52.23#ibcon#about to read 3, iclass 28, count 0 2006.229.03:30:52.25#ibcon#read 3, iclass 28, count 0 2006.229.03:30:52.25#ibcon#about to read 4, iclass 28, count 0 2006.229.03:30:52.25#ibcon#read 4, iclass 28, count 0 2006.229.03:30:52.25#ibcon#about to read 5, iclass 28, count 0 2006.229.03:30:52.25#ibcon#read 5, iclass 28, count 0 2006.229.03:30:52.25#ibcon#about to read 6, iclass 28, count 0 2006.229.03:30:52.25#ibcon#read 6, iclass 28, count 0 2006.229.03:30:52.25#ibcon#end of sib2, iclass 28, count 0 2006.229.03:30:52.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:30:52.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:30:52.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:30:52.25#ibcon#*before write, iclass 28, count 0 2006.229.03:30:52.25#ibcon#enter sib2, iclass 28, count 0 2006.229.03:30:52.25#ibcon#flushed, iclass 28, count 0 2006.229.03:30:52.25#ibcon#about to write, iclass 28, count 0 2006.229.03:30:52.25#ibcon#wrote, iclass 28, count 0 2006.229.03:30:52.25#ibcon#about to read 3, iclass 28, count 0 2006.229.03:30:52.30#ibcon#read 3, iclass 28, count 0 2006.229.03:30:52.30#ibcon#about to read 4, iclass 28, count 0 2006.229.03:30:52.30#ibcon#read 4, iclass 28, count 0 2006.229.03:30:52.30#ibcon#about to read 5, iclass 28, count 0 2006.229.03:30:52.30#ibcon#read 5, iclass 28, count 0 2006.229.03:30:52.30#ibcon#about to read 6, iclass 28, count 0 2006.229.03:30:52.30#ibcon#read 6, iclass 28, count 0 2006.229.03:30:52.30#ibcon#end of sib2, iclass 28, count 0 2006.229.03:30:52.30#ibcon#*after write, iclass 28, count 0 2006.229.03:30:52.30#ibcon#*before return 0, iclass 28, count 0 2006.229.03:30:52.30#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:52.30#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:52.30#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:30:52.30#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:30:52.30$vck44/va=1,8 2006.229.03:30:52.30#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.03:30:52.30#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.03:30:52.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:52.30#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:52.30#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:52.30#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:52.30#ibcon#enter wrdev, iclass 30, count 2 2006.229.03:30:52.30#ibcon#first serial, iclass 30, count 2 2006.229.03:30:52.30#ibcon#enter sib2, iclass 30, count 2 2006.229.03:30:52.30#ibcon#flushed, iclass 30, count 2 2006.229.03:30:52.30#ibcon#about to write, iclass 30, count 2 2006.229.03:30:52.30#ibcon#wrote, iclass 30, count 2 2006.229.03:30:52.30#ibcon#about to read 3, iclass 30, count 2 2006.229.03:30:52.32#ibcon#read 3, iclass 30, count 2 2006.229.03:30:52.32#ibcon#about to read 4, iclass 30, count 2 2006.229.03:30:52.32#ibcon#read 4, iclass 30, count 2 2006.229.03:30:52.32#ibcon#about to read 5, iclass 30, count 2 2006.229.03:30:52.32#ibcon#read 5, iclass 30, count 2 2006.229.03:30:52.32#ibcon#about to read 6, iclass 30, count 2 2006.229.03:30:52.32#ibcon#read 6, iclass 30, count 2 2006.229.03:30:52.32#ibcon#end of sib2, iclass 30, count 2 2006.229.03:30:52.32#ibcon#*mode == 0, iclass 30, count 2 2006.229.03:30:52.32#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.03:30:52.32#ibcon#[25=AT01-08\r\n] 2006.229.03:30:52.32#ibcon#*before write, iclass 30, count 2 2006.229.03:30:52.32#ibcon#enter sib2, iclass 30, count 2 2006.229.03:30:52.32#ibcon#flushed, iclass 30, count 2 2006.229.03:30:52.32#ibcon#about to write, iclass 30, count 2 2006.229.03:30:52.32#ibcon#wrote, iclass 30, count 2 2006.229.03:30:52.32#ibcon#about to read 3, iclass 30, count 2 2006.229.03:30:52.35#ibcon#read 3, iclass 30, count 2 2006.229.03:30:52.35#ibcon#about to read 4, iclass 30, count 2 2006.229.03:30:52.35#ibcon#read 4, iclass 30, count 2 2006.229.03:30:52.35#ibcon#about to read 5, iclass 30, count 2 2006.229.03:30:52.35#ibcon#read 5, iclass 30, count 2 2006.229.03:30:52.35#ibcon#about to read 6, iclass 30, count 2 2006.229.03:30:52.35#ibcon#read 6, iclass 30, count 2 2006.229.03:30:52.35#ibcon#end of sib2, iclass 30, count 2 2006.229.03:30:52.35#ibcon#*after write, iclass 30, count 2 2006.229.03:30:52.35#ibcon#*before return 0, iclass 30, count 2 2006.229.03:30:52.35#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:52.35#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:52.35#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.03:30:52.35#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:52.35#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:52.47#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:52.47#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:52.47#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:30:52.47#ibcon#first serial, iclass 30, count 0 2006.229.03:30:52.47#ibcon#enter sib2, iclass 30, count 0 2006.229.03:30:52.47#ibcon#flushed, iclass 30, count 0 2006.229.03:30:52.47#ibcon#about to write, iclass 30, count 0 2006.229.03:30:52.47#ibcon#wrote, iclass 30, count 0 2006.229.03:30:52.47#ibcon#about to read 3, iclass 30, count 0 2006.229.03:30:52.49#ibcon#read 3, iclass 30, count 0 2006.229.03:30:52.49#ibcon#about to read 4, iclass 30, count 0 2006.229.03:30:52.49#ibcon#read 4, iclass 30, count 0 2006.229.03:30:52.49#ibcon#about to read 5, iclass 30, count 0 2006.229.03:30:52.49#ibcon#read 5, iclass 30, count 0 2006.229.03:30:52.49#ibcon#about to read 6, iclass 30, count 0 2006.229.03:30:52.49#ibcon#read 6, iclass 30, count 0 2006.229.03:30:52.49#ibcon#end of sib2, iclass 30, count 0 2006.229.03:30:52.49#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:30:52.49#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:30:52.49#ibcon#[25=USB\r\n] 2006.229.03:30:52.49#ibcon#*before write, iclass 30, count 0 2006.229.03:30:52.49#ibcon#enter sib2, iclass 30, count 0 2006.229.03:30:52.49#ibcon#flushed, iclass 30, count 0 2006.229.03:30:52.49#ibcon#about to write, iclass 30, count 0 2006.229.03:30:52.49#ibcon#wrote, iclass 30, count 0 2006.229.03:30:52.49#ibcon#about to read 3, iclass 30, count 0 2006.229.03:30:52.52#ibcon#read 3, iclass 30, count 0 2006.229.03:30:52.52#ibcon#about to read 4, iclass 30, count 0 2006.229.03:30:52.52#ibcon#read 4, iclass 30, count 0 2006.229.03:30:52.52#ibcon#about to read 5, iclass 30, count 0 2006.229.03:30:52.52#ibcon#read 5, iclass 30, count 0 2006.229.03:30:52.52#ibcon#about to read 6, iclass 30, count 0 2006.229.03:30:52.52#ibcon#read 6, iclass 30, count 0 2006.229.03:30:52.52#ibcon#end of sib2, iclass 30, count 0 2006.229.03:30:52.52#ibcon#*after write, iclass 30, count 0 2006.229.03:30:52.52#ibcon#*before return 0, iclass 30, count 0 2006.229.03:30:52.52#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:52.52#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:52.52#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:30:52.52#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:30:52.52$vck44/valo=2,534.99 2006.229.03:30:52.52#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.03:30:52.52#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.03:30:52.52#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:52.52#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:52.52#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:52.52#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:52.52#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:30:52.52#ibcon#first serial, iclass 32, count 0 2006.229.03:30:52.52#ibcon#enter sib2, iclass 32, count 0 2006.229.03:30:52.52#ibcon#flushed, iclass 32, count 0 2006.229.03:30:52.52#ibcon#about to write, iclass 32, count 0 2006.229.03:30:52.52#ibcon#wrote, iclass 32, count 0 2006.229.03:30:52.52#ibcon#about to read 3, iclass 32, count 0 2006.229.03:30:52.54#ibcon#read 3, iclass 32, count 0 2006.229.03:30:52.54#ibcon#about to read 4, iclass 32, count 0 2006.229.03:30:52.54#ibcon#read 4, iclass 32, count 0 2006.229.03:30:52.54#ibcon#about to read 5, iclass 32, count 0 2006.229.03:30:52.54#ibcon#read 5, iclass 32, count 0 2006.229.03:30:52.54#ibcon#about to read 6, iclass 32, count 0 2006.229.03:30:52.54#ibcon#read 6, iclass 32, count 0 2006.229.03:30:52.54#ibcon#end of sib2, iclass 32, count 0 2006.229.03:30:52.54#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:30:52.54#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:30:52.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:30:52.54#ibcon#*before write, iclass 32, count 0 2006.229.03:30:52.54#ibcon#enter sib2, iclass 32, count 0 2006.229.03:30:52.54#ibcon#flushed, iclass 32, count 0 2006.229.03:30:52.54#ibcon#about to write, iclass 32, count 0 2006.229.03:30:52.54#ibcon#wrote, iclass 32, count 0 2006.229.03:30:52.54#ibcon#about to read 3, iclass 32, count 0 2006.229.03:30:52.58#ibcon#read 3, iclass 32, count 0 2006.229.03:30:52.58#ibcon#about to read 4, iclass 32, count 0 2006.229.03:30:52.58#ibcon#read 4, iclass 32, count 0 2006.229.03:30:52.58#ibcon#about to read 5, iclass 32, count 0 2006.229.03:30:52.58#ibcon#read 5, iclass 32, count 0 2006.229.03:30:52.58#ibcon#about to read 6, iclass 32, count 0 2006.229.03:30:52.58#ibcon#read 6, iclass 32, count 0 2006.229.03:30:52.58#ibcon#end of sib2, iclass 32, count 0 2006.229.03:30:52.58#ibcon#*after write, iclass 32, count 0 2006.229.03:30:52.58#ibcon#*before return 0, iclass 32, count 0 2006.229.03:30:52.58#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:52.58#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:52.58#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:30:52.58#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:30:52.58$vck44/va=2,7 2006.229.03:30:52.58#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.03:30:52.58#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.03:30:52.58#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:52.58#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:52.64#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:52.64#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:52.64#ibcon#enter wrdev, iclass 34, count 2 2006.229.03:30:52.64#ibcon#first serial, iclass 34, count 2 2006.229.03:30:52.64#ibcon#enter sib2, iclass 34, count 2 2006.229.03:30:52.64#ibcon#flushed, iclass 34, count 2 2006.229.03:30:52.64#ibcon#about to write, iclass 34, count 2 2006.229.03:30:52.64#ibcon#wrote, iclass 34, count 2 2006.229.03:30:52.64#ibcon#about to read 3, iclass 34, count 2 2006.229.03:30:52.66#ibcon#read 3, iclass 34, count 2 2006.229.03:30:52.66#ibcon#about to read 4, iclass 34, count 2 2006.229.03:30:52.66#ibcon#read 4, iclass 34, count 2 2006.229.03:30:52.66#ibcon#about to read 5, iclass 34, count 2 2006.229.03:30:52.66#ibcon#read 5, iclass 34, count 2 2006.229.03:30:52.66#ibcon#about to read 6, iclass 34, count 2 2006.229.03:30:52.66#ibcon#read 6, iclass 34, count 2 2006.229.03:30:52.66#ibcon#end of sib2, iclass 34, count 2 2006.229.03:30:52.66#ibcon#*mode == 0, iclass 34, count 2 2006.229.03:30:52.66#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.03:30:52.66#ibcon#[25=AT02-07\r\n] 2006.229.03:30:52.66#ibcon#*before write, iclass 34, count 2 2006.229.03:30:52.66#ibcon#enter sib2, iclass 34, count 2 2006.229.03:30:52.66#ibcon#flushed, iclass 34, count 2 2006.229.03:30:52.66#ibcon#about to write, iclass 34, count 2 2006.229.03:30:52.66#ibcon#wrote, iclass 34, count 2 2006.229.03:30:52.66#ibcon#about to read 3, iclass 34, count 2 2006.229.03:30:52.69#ibcon#read 3, iclass 34, count 2 2006.229.03:30:52.69#ibcon#about to read 4, iclass 34, count 2 2006.229.03:30:52.69#ibcon#read 4, iclass 34, count 2 2006.229.03:30:52.69#ibcon#about to read 5, iclass 34, count 2 2006.229.03:30:52.69#ibcon#read 5, iclass 34, count 2 2006.229.03:30:52.69#ibcon#about to read 6, iclass 34, count 2 2006.229.03:30:52.69#ibcon#read 6, iclass 34, count 2 2006.229.03:30:52.69#ibcon#end of sib2, iclass 34, count 2 2006.229.03:30:52.69#ibcon#*after write, iclass 34, count 2 2006.229.03:30:52.69#ibcon#*before return 0, iclass 34, count 2 2006.229.03:30:52.69#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:52.69#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:52.69#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.03:30:52.69#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:52.69#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:52.81#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:52.81#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:52.81#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:30:52.81#ibcon#first serial, iclass 34, count 0 2006.229.03:30:52.81#ibcon#enter sib2, iclass 34, count 0 2006.229.03:30:52.81#ibcon#flushed, iclass 34, count 0 2006.229.03:30:52.81#ibcon#about to write, iclass 34, count 0 2006.229.03:30:52.81#ibcon#wrote, iclass 34, count 0 2006.229.03:30:52.81#ibcon#about to read 3, iclass 34, count 0 2006.229.03:30:52.83#ibcon#read 3, iclass 34, count 0 2006.229.03:30:52.83#ibcon#about to read 4, iclass 34, count 0 2006.229.03:30:52.83#ibcon#read 4, iclass 34, count 0 2006.229.03:30:52.83#ibcon#about to read 5, iclass 34, count 0 2006.229.03:30:52.83#ibcon#read 5, iclass 34, count 0 2006.229.03:30:52.83#ibcon#about to read 6, iclass 34, count 0 2006.229.03:30:52.83#ibcon#read 6, iclass 34, count 0 2006.229.03:30:52.83#ibcon#end of sib2, iclass 34, count 0 2006.229.03:30:52.83#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:30:52.83#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:30:52.83#ibcon#[25=USB\r\n] 2006.229.03:30:52.83#ibcon#*before write, iclass 34, count 0 2006.229.03:30:52.83#ibcon#enter sib2, iclass 34, count 0 2006.229.03:30:52.83#ibcon#flushed, iclass 34, count 0 2006.229.03:30:52.83#ibcon#about to write, iclass 34, count 0 2006.229.03:30:52.83#ibcon#wrote, iclass 34, count 0 2006.229.03:30:52.83#ibcon#about to read 3, iclass 34, count 0 2006.229.03:30:52.85#abcon#<5=/04 2.7 4.6 29.20 981000.6\r\n> 2006.229.03:30:52.86#ibcon#read 3, iclass 34, count 0 2006.229.03:30:52.86#ibcon#about to read 4, iclass 34, count 0 2006.229.03:30:52.86#ibcon#read 4, iclass 34, count 0 2006.229.03:30:52.86#ibcon#about to read 5, iclass 34, count 0 2006.229.03:30:52.86#ibcon#read 5, iclass 34, count 0 2006.229.03:30:52.86#ibcon#about to read 6, iclass 34, count 0 2006.229.03:30:52.86#ibcon#read 6, iclass 34, count 0 2006.229.03:30:52.86#ibcon#end of sib2, iclass 34, count 0 2006.229.03:30:52.86#ibcon#*after write, iclass 34, count 0 2006.229.03:30:52.86#ibcon#*before return 0, iclass 34, count 0 2006.229.03:30:52.86#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:52.86#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:52.86#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:30:52.86#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:30:52.86$vck44/valo=3,564.99 2006.229.03:30:52.86#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.03:30:52.86#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.03:30:52.86#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:52.86#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:30:52.86#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:30:52.86#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:30:52.86#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:30:52.86#ibcon#first serial, iclass 39, count 0 2006.229.03:30:52.86#ibcon#enter sib2, iclass 39, count 0 2006.229.03:30:52.86#ibcon#flushed, iclass 39, count 0 2006.229.03:30:52.86#ibcon#about to write, iclass 39, count 0 2006.229.03:30:52.86#ibcon#wrote, iclass 39, count 0 2006.229.03:30:52.86#ibcon#about to read 3, iclass 39, count 0 2006.229.03:30:52.87#abcon#{5=INTERFACE CLEAR} 2006.229.03:30:52.88#ibcon#read 3, iclass 39, count 0 2006.229.03:30:52.88#ibcon#about to read 4, iclass 39, count 0 2006.229.03:30:52.88#ibcon#read 4, iclass 39, count 0 2006.229.03:30:52.88#ibcon#about to read 5, iclass 39, count 0 2006.229.03:30:52.88#ibcon#read 5, iclass 39, count 0 2006.229.03:30:52.88#ibcon#about to read 6, iclass 39, count 0 2006.229.03:30:52.88#ibcon#read 6, iclass 39, count 0 2006.229.03:30:52.88#ibcon#end of sib2, iclass 39, count 0 2006.229.03:30:52.88#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:30:52.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:30:52.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:30:52.88#ibcon#*before write, iclass 39, count 0 2006.229.03:30:52.88#ibcon#enter sib2, iclass 39, count 0 2006.229.03:30:52.88#ibcon#flushed, iclass 39, count 0 2006.229.03:30:52.88#ibcon#about to write, iclass 39, count 0 2006.229.03:30:52.88#ibcon#wrote, iclass 39, count 0 2006.229.03:30:52.88#ibcon#about to read 3, iclass 39, count 0 2006.229.03:30:52.92#ibcon#read 3, iclass 39, count 0 2006.229.03:30:52.92#ibcon#about to read 4, iclass 39, count 0 2006.229.03:30:52.92#ibcon#read 4, iclass 39, count 0 2006.229.03:30:52.92#ibcon#about to read 5, iclass 39, count 0 2006.229.03:30:52.92#ibcon#read 5, iclass 39, count 0 2006.229.03:30:52.92#ibcon#about to read 6, iclass 39, count 0 2006.229.03:30:52.92#ibcon#read 6, iclass 39, count 0 2006.229.03:30:52.92#ibcon#end of sib2, iclass 39, count 0 2006.229.03:30:52.92#ibcon#*after write, iclass 39, count 0 2006.229.03:30:52.92#ibcon#*before return 0, iclass 39, count 0 2006.229.03:30:52.92#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:30:52.92#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:30:52.92#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:30:52.92#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:30:52.92$vck44/va=3,6 2006.229.03:30:52.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.03:30:52.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.03:30:52.92#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:52.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:52.93#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:30:52.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:52.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:52.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.03:30:52.98#ibcon#first serial, iclass 4, count 2 2006.229.03:30:52.98#ibcon#enter sib2, iclass 4, count 2 2006.229.03:30:52.98#ibcon#flushed, iclass 4, count 2 2006.229.03:30:52.98#ibcon#about to write, iclass 4, count 2 2006.229.03:30:52.98#ibcon#wrote, iclass 4, count 2 2006.229.03:30:52.98#ibcon#about to read 3, iclass 4, count 2 2006.229.03:30:53.00#ibcon#read 3, iclass 4, count 2 2006.229.03:30:53.00#ibcon#about to read 4, iclass 4, count 2 2006.229.03:30:53.00#ibcon#read 4, iclass 4, count 2 2006.229.03:30:53.00#ibcon#about to read 5, iclass 4, count 2 2006.229.03:30:53.00#ibcon#read 5, iclass 4, count 2 2006.229.03:30:53.00#ibcon#about to read 6, iclass 4, count 2 2006.229.03:30:53.00#ibcon#read 6, iclass 4, count 2 2006.229.03:30:53.00#ibcon#end of sib2, iclass 4, count 2 2006.229.03:30:53.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.03:30:53.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.03:30:53.00#ibcon#[25=AT03-06\r\n] 2006.229.03:30:53.00#ibcon#*before write, iclass 4, count 2 2006.229.03:30:53.00#ibcon#enter sib2, iclass 4, count 2 2006.229.03:30:53.00#ibcon#flushed, iclass 4, count 2 2006.229.03:30:53.00#ibcon#about to write, iclass 4, count 2 2006.229.03:30:53.00#ibcon#wrote, iclass 4, count 2 2006.229.03:30:53.00#ibcon#about to read 3, iclass 4, count 2 2006.229.03:30:53.03#ibcon#read 3, iclass 4, count 2 2006.229.03:30:53.03#ibcon#about to read 4, iclass 4, count 2 2006.229.03:30:53.03#ibcon#read 4, iclass 4, count 2 2006.229.03:30:53.03#ibcon#about to read 5, iclass 4, count 2 2006.229.03:30:53.03#ibcon#read 5, iclass 4, count 2 2006.229.03:30:53.03#ibcon#about to read 6, iclass 4, count 2 2006.229.03:30:53.03#ibcon#read 6, iclass 4, count 2 2006.229.03:30:53.03#ibcon#end of sib2, iclass 4, count 2 2006.229.03:30:53.03#ibcon#*after write, iclass 4, count 2 2006.229.03:30:53.03#ibcon#*before return 0, iclass 4, count 2 2006.229.03:30:53.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:53.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:53.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.03:30:53.03#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:53.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:53.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:53.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:53.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:30:53.15#ibcon#first serial, iclass 4, count 0 2006.229.03:30:53.15#ibcon#enter sib2, iclass 4, count 0 2006.229.03:30:53.15#ibcon#flushed, iclass 4, count 0 2006.229.03:30:53.15#ibcon#about to write, iclass 4, count 0 2006.229.03:30:53.15#ibcon#wrote, iclass 4, count 0 2006.229.03:30:53.15#ibcon#about to read 3, iclass 4, count 0 2006.229.03:30:53.17#ibcon#read 3, iclass 4, count 0 2006.229.03:30:53.17#ibcon#about to read 4, iclass 4, count 0 2006.229.03:30:53.17#ibcon#read 4, iclass 4, count 0 2006.229.03:30:53.17#ibcon#about to read 5, iclass 4, count 0 2006.229.03:30:53.17#ibcon#read 5, iclass 4, count 0 2006.229.03:30:53.17#ibcon#about to read 6, iclass 4, count 0 2006.229.03:30:53.17#ibcon#read 6, iclass 4, count 0 2006.229.03:30:53.17#ibcon#end of sib2, iclass 4, count 0 2006.229.03:30:53.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:30:53.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:30:53.17#ibcon#[25=USB\r\n] 2006.229.03:30:53.17#ibcon#*before write, iclass 4, count 0 2006.229.03:30:53.17#ibcon#enter sib2, iclass 4, count 0 2006.229.03:30:53.17#ibcon#flushed, iclass 4, count 0 2006.229.03:30:53.17#ibcon#about to write, iclass 4, count 0 2006.229.03:30:53.17#ibcon#wrote, iclass 4, count 0 2006.229.03:30:53.17#ibcon#about to read 3, iclass 4, count 0 2006.229.03:30:53.20#ibcon#read 3, iclass 4, count 0 2006.229.03:30:53.20#ibcon#about to read 4, iclass 4, count 0 2006.229.03:30:53.20#ibcon#read 4, iclass 4, count 0 2006.229.03:30:53.20#ibcon#about to read 5, iclass 4, count 0 2006.229.03:30:53.20#ibcon#read 5, iclass 4, count 0 2006.229.03:30:53.20#ibcon#about to read 6, iclass 4, count 0 2006.229.03:30:53.20#ibcon#read 6, iclass 4, count 0 2006.229.03:30:53.20#ibcon#end of sib2, iclass 4, count 0 2006.229.03:30:53.20#ibcon#*after write, iclass 4, count 0 2006.229.03:30:53.20#ibcon#*before return 0, iclass 4, count 0 2006.229.03:30:53.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:53.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:53.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:30:53.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:30:53.20$vck44/valo=4,624.99 2006.229.03:30:53.20#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.03:30:53.20#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.03:30:53.20#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:53.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:53.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:53.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:53.20#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:30:53.20#ibcon#first serial, iclass 6, count 0 2006.229.03:30:53.20#ibcon#enter sib2, iclass 6, count 0 2006.229.03:30:53.20#ibcon#flushed, iclass 6, count 0 2006.229.03:30:53.20#ibcon#about to write, iclass 6, count 0 2006.229.03:30:53.20#ibcon#wrote, iclass 6, count 0 2006.229.03:30:53.20#ibcon#about to read 3, iclass 6, count 0 2006.229.03:30:53.22#ibcon#read 3, iclass 6, count 0 2006.229.03:30:53.22#ibcon#about to read 4, iclass 6, count 0 2006.229.03:30:53.22#ibcon#read 4, iclass 6, count 0 2006.229.03:30:53.22#ibcon#about to read 5, iclass 6, count 0 2006.229.03:30:53.22#ibcon#read 5, iclass 6, count 0 2006.229.03:30:53.22#ibcon#about to read 6, iclass 6, count 0 2006.229.03:30:53.22#ibcon#read 6, iclass 6, count 0 2006.229.03:30:53.22#ibcon#end of sib2, iclass 6, count 0 2006.229.03:30:53.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:30:53.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:30:53.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:30:53.22#ibcon#*before write, iclass 6, count 0 2006.229.03:30:53.22#ibcon#enter sib2, iclass 6, count 0 2006.229.03:30:53.22#ibcon#flushed, iclass 6, count 0 2006.229.03:30:53.22#ibcon#about to write, iclass 6, count 0 2006.229.03:30:53.22#ibcon#wrote, iclass 6, count 0 2006.229.03:30:53.22#ibcon#about to read 3, iclass 6, count 0 2006.229.03:30:53.26#ibcon#read 3, iclass 6, count 0 2006.229.03:30:53.26#ibcon#about to read 4, iclass 6, count 0 2006.229.03:30:53.26#ibcon#read 4, iclass 6, count 0 2006.229.03:30:53.26#ibcon#about to read 5, iclass 6, count 0 2006.229.03:30:53.26#ibcon#read 5, iclass 6, count 0 2006.229.03:30:53.26#ibcon#about to read 6, iclass 6, count 0 2006.229.03:30:53.26#ibcon#read 6, iclass 6, count 0 2006.229.03:30:53.26#ibcon#end of sib2, iclass 6, count 0 2006.229.03:30:53.26#ibcon#*after write, iclass 6, count 0 2006.229.03:30:53.26#ibcon#*before return 0, iclass 6, count 0 2006.229.03:30:53.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:53.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:53.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:30:53.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:30:53.26$vck44/va=4,7 2006.229.03:30:53.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.03:30:53.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.03:30:53.26#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:53.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:53.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:53.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:53.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.03:30:53.32#ibcon#first serial, iclass 10, count 2 2006.229.03:30:53.32#ibcon#enter sib2, iclass 10, count 2 2006.229.03:30:53.32#ibcon#flushed, iclass 10, count 2 2006.229.03:30:53.32#ibcon#about to write, iclass 10, count 2 2006.229.03:30:53.32#ibcon#wrote, iclass 10, count 2 2006.229.03:30:53.32#ibcon#about to read 3, iclass 10, count 2 2006.229.03:30:53.34#ibcon#read 3, iclass 10, count 2 2006.229.03:30:53.34#ibcon#about to read 4, iclass 10, count 2 2006.229.03:30:53.34#ibcon#read 4, iclass 10, count 2 2006.229.03:30:53.34#ibcon#about to read 5, iclass 10, count 2 2006.229.03:30:53.34#ibcon#read 5, iclass 10, count 2 2006.229.03:30:53.34#ibcon#about to read 6, iclass 10, count 2 2006.229.03:30:53.34#ibcon#read 6, iclass 10, count 2 2006.229.03:30:53.34#ibcon#end of sib2, iclass 10, count 2 2006.229.03:30:53.34#ibcon#*mode == 0, iclass 10, count 2 2006.229.03:30:53.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.03:30:53.34#ibcon#[25=AT04-07\r\n] 2006.229.03:30:53.34#ibcon#*before write, iclass 10, count 2 2006.229.03:30:53.34#ibcon#enter sib2, iclass 10, count 2 2006.229.03:30:53.34#ibcon#flushed, iclass 10, count 2 2006.229.03:30:53.34#ibcon#about to write, iclass 10, count 2 2006.229.03:30:53.34#ibcon#wrote, iclass 10, count 2 2006.229.03:30:53.34#ibcon#about to read 3, iclass 10, count 2 2006.229.03:30:53.37#ibcon#read 3, iclass 10, count 2 2006.229.03:30:53.37#ibcon#about to read 4, iclass 10, count 2 2006.229.03:30:53.37#ibcon#read 4, iclass 10, count 2 2006.229.03:30:53.37#ibcon#about to read 5, iclass 10, count 2 2006.229.03:30:53.37#ibcon#read 5, iclass 10, count 2 2006.229.03:30:53.37#ibcon#about to read 6, iclass 10, count 2 2006.229.03:30:53.37#ibcon#read 6, iclass 10, count 2 2006.229.03:30:53.37#ibcon#end of sib2, iclass 10, count 2 2006.229.03:30:53.37#ibcon#*after write, iclass 10, count 2 2006.229.03:30:53.37#ibcon#*before return 0, iclass 10, count 2 2006.229.03:30:53.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:53.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:53.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.03:30:53.37#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:53.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:53.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:53.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:53.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:30:53.49#ibcon#first serial, iclass 10, count 0 2006.229.03:30:53.49#ibcon#enter sib2, iclass 10, count 0 2006.229.03:30:53.49#ibcon#flushed, iclass 10, count 0 2006.229.03:30:53.49#ibcon#about to write, iclass 10, count 0 2006.229.03:30:53.49#ibcon#wrote, iclass 10, count 0 2006.229.03:30:53.49#ibcon#about to read 3, iclass 10, count 0 2006.229.03:30:53.51#ibcon#read 3, iclass 10, count 0 2006.229.03:30:53.51#ibcon#about to read 4, iclass 10, count 0 2006.229.03:30:53.51#ibcon#read 4, iclass 10, count 0 2006.229.03:30:53.51#ibcon#about to read 5, iclass 10, count 0 2006.229.03:30:53.51#ibcon#read 5, iclass 10, count 0 2006.229.03:30:53.51#ibcon#about to read 6, iclass 10, count 0 2006.229.03:30:53.51#ibcon#read 6, iclass 10, count 0 2006.229.03:30:53.51#ibcon#end of sib2, iclass 10, count 0 2006.229.03:30:53.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:30:53.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:30:53.51#ibcon#[25=USB\r\n] 2006.229.03:30:53.51#ibcon#*before write, iclass 10, count 0 2006.229.03:30:53.51#ibcon#enter sib2, iclass 10, count 0 2006.229.03:30:53.51#ibcon#flushed, iclass 10, count 0 2006.229.03:30:53.51#ibcon#about to write, iclass 10, count 0 2006.229.03:30:53.51#ibcon#wrote, iclass 10, count 0 2006.229.03:30:53.51#ibcon#about to read 3, iclass 10, count 0 2006.229.03:30:53.54#ibcon#read 3, iclass 10, count 0 2006.229.03:30:53.54#ibcon#about to read 4, iclass 10, count 0 2006.229.03:30:53.54#ibcon#read 4, iclass 10, count 0 2006.229.03:30:53.54#ibcon#about to read 5, iclass 10, count 0 2006.229.03:30:53.54#ibcon#read 5, iclass 10, count 0 2006.229.03:30:53.54#ibcon#about to read 6, iclass 10, count 0 2006.229.03:30:53.54#ibcon#read 6, iclass 10, count 0 2006.229.03:30:53.54#ibcon#end of sib2, iclass 10, count 0 2006.229.03:30:53.54#ibcon#*after write, iclass 10, count 0 2006.229.03:30:53.54#ibcon#*before return 0, iclass 10, count 0 2006.229.03:30:53.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:53.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:53.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:30:53.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:30:53.54$vck44/valo=5,734.99 2006.229.03:30:53.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.03:30:53.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.03:30:53.54#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:53.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:53.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:53.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:53.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:30:53.54#ibcon#first serial, iclass 12, count 0 2006.229.03:30:53.54#ibcon#enter sib2, iclass 12, count 0 2006.229.03:30:53.54#ibcon#flushed, iclass 12, count 0 2006.229.03:30:53.54#ibcon#about to write, iclass 12, count 0 2006.229.03:30:53.54#ibcon#wrote, iclass 12, count 0 2006.229.03:30:53.54#ibcon#about to read 3, iclass 12, count 0 2006.229.03:30:53.56#ibcon#read 3, iclass 12, count 0 2006.229.03:30:53.56#ibcon#about to read 4, iclass 12, count 0 2006.229.03:30:53.56#ibcon#read 4, iclass 12, count 0 2006.229.03:30:53.56#ibcon#about to read 5, iclass 12, count 0 2006.229.03:30:53.56#ibcon#read 5, iclass 12, count 0 2006.229.03:30:53.56#ibcon#about to read 6, iclass 12, count 0 2006.229.03:30:53.56#ibcon#read 6, iclass 12, count 0 2006.229.03:30:53.56#ibcon#end of sib2, iclass 12, count 0 2006.229.03:30:53.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:30:53.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:30:53.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:30:53.56#ibcon#*before write, iclass 12, count 0 2006.229.03:30:53.56#ibcon#enter sib2, iclass 12, count 0 2006.229.03:30:53.56#ibcon#flushed, iclass 12, count 0 2006.229.03:30:53.56#ibcon#about to write, iclass 12, count 0 2006.229.03:30:53.56#ibcon#wrote, iclass 12, count 0 2006.229.03:30:53.56#ibcon#about to read 3, iclass 12, count 0 2006.229.03:30:53.60#ibcon#read 3, iclass 12, count 0 2006.229.03:30:53.60#ibcon#about to read 4, iclass 12, count 0 2006.229.03:30:53.60#ibcon#read 4, iclass 12, count 0 2006.229.03:30:53.60#ibcon#about to read 5, iclass 12, count 0 2006.229.03:30:53.60#ibcon#read 5, iclass 12, count 0 2006.229.03:30:53.60#ibcon#about to read 6, iclass 12, count 0 2006.229.03:30:53.60#ibcon#read 6, iclass 12, count 0 2006.229.03:30:53.60#ibcon#end of sib2, iclass 12, count 0 2006.229.03:30:53.60#ibcon#*after write, iclass 12, count 0 2006.229.03:30:53.60#ibcon#*before return 0, iclass 12, count 0 2006.229.03:30:53.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:53.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:53.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:30:53.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:30:53.60$vck44/va=5,4 2006.229.03:30:53.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.03:30:53.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.03:30:53.60#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:53.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:53.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:53.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:53.66#ibcon#enter wrdev, iclass 14, count 2 2006.229.03:30:53.66#ibcon#first serial, iclass 14, count 2 2006.229.03:30:53.66#ibcon#enter sib2, iclass 14, count 2 2006.229.03:30:53.66#ibcon#flushed, iclass 14, count 2 2006.229.03:30:53.66#ibcon#about to write, iclass 14, count 2 2006.229.03:30:53.66#ibcon#wrote, iclass 14, count 2 2006.229.03:30:53.66#ibcon#about to read 3, iclass 14, count 2 2006.229.03:30:53.68#ibcon#read 3, iclass 14, count 2 2006.229.03:30:53.68#ibcon#about to read 4, iclass 14, count 2 2006.229.03:30:53.68#ibcon#read 4, iclass 14, count 2 2006.229.03:30:53.68#ibcon#about to read 5, iclass 14, count 2 2006.229.03:30:53.68#ibcon#read 5, iclass 14, count 2 2006.229.03:30:53.68#ibcon#about to read 6, iclass 14, count 2 2006.229.03:30:53.68#ibcon#read 6, iclass 14, count 2 2006.229.03:30:53.68#ibcon#end of sib2, iclass 14, count 2 2006.229.03:30:53.68#ibcon#*mode == 0, iclass 14, count 2 2006.229.03:30:53.68#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.03:30:53.68#ibcon#[25=AT05-04\r\n] 2006.229.03:30:53.68#ibcon#*before write, iclass 14, count 2 2006.229.03:30:53.68#ibcon#enter sib2, iclass 14, count 2 2006.229.03:30:53.68#ibcon#flushed, iclass 14, count 2 2006.229.03:30:53.68#ibcon#about to write, iclass 14, count 2 2006.229.03:30:53.68#ibcon#wrote, iclass 14, count 2 2006.229.03:30:53.68#ibcon#about to read 3, iclass 14, count 2 2006.229.03:30:53.71#ibcon#read 3, iclass 14, count 2 2006.229.03:30:53.71#ibcon#about to read 4, iclass 14, count 2 2006.229.03:30:53.71#ibcon#read 4, iclass 14, count 2 2006.229.03:30:53.71#ibcon#about to read 5, iclass 14, count 2 2006.229.03:30:53.71#ibcon#read 5, iclass 14, count 2 2006.229.03:30:53.71#ibcon#about to read 6, iclass 14, count 2 2006.229.03:30:53.71#ibcon#read 6, iclass 14, count 2 2006.229.03:30:53.71#ibcon#end of sib2, iclass 14, count 2 2006.229.03:30:53.71#ibcon#*after write, iclass 14, count 2 2006.229.03:30:53.71#ibcon#*before return 0, iclass 14, count 2 2006.229.03:30:53.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:53.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:53.71#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.03:30:53.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:53.71#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:53.83#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:53.83#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:53.83#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:30:53.83#ibcon#first serial, iclass 14, count 0 2006.229.03:30:53.83#ibcon#enter sib2, iclass 14, count 0 2006.229.03:30:53.83#ibcon#flushed, iclass 14, count 0 2006.229.03:30:53.83#ibcon#about to write, iclass 14, count 0 2006.229.03:30:53.83#ibcon#wrote, iclass 14, count 0 2006.229.03:30:53.83#ibcon#about to read 3, iclass 14, count 0 2006.229.03:30:53.85#ibcon#read 3, iclass 14, count 0 2006.229.03:30:53.85#ibcon#about to read 4, iclass 14, count 0 2006.229.03:30:53.85#ibcon#read 4, iclass 14, count 0 2006.229.03:30:53.85#ibcon#about to read 5, iclass 14, count 0 2006.229.03:30:53.85#ibcon#read 5, iclass 14, count 0 2006.229.03:30:53.85#ibcon#about to read 6, iclass 14, count 0 2006.229.03:30:53.85#ibcon#read 6, iclass 14, count 0 2006.229.03:30:53.85#ibcon#end of sib2, iclass 14, count 0 2006.229.03:30:53.85#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:30:53.85#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:30:53.85#ibcon#[25=USB\r\n] 2006.229.03:30:53.85#ibcon#*before write, iclass 14, count 0 2006.229.03:30:53.85#ibcon#enter sib2, iclass 14, count 0 2006.229.03:30:53.85#ibcon#flushed, iclass 14, count 0 2006.229.03:30:53.85#ibcon#about to write, iclass 14, count 0 2006.229.03:30:53.85#ibcon#wrote, iclass 14, count 0 2006.229.03:30:53.85#ibcon#about to read 3, iclass 14, count 0 2006.229.03:30:53.88#ibcon#read 3, iclass 14, count 0 2006.229.03:30:53.88#ibcon#about to read 4, iclass 14, count 0 2006.229.03:30:53.88#ibcon#read 4, iclass 14, count 0 2006.229.03:30:53.88#ibcon#about to read 5, iclass 14, count 0 2006.229.03:30:53.88#ibcon#read 5, iclass 14, count 0 2006.229.03:30:53.88#ibcon#about to read 6, iclass 14, count 0 2006.229.03:30:53.88#ibcon#read 6, iclass 14, count 0 2006.229.03:30:53.88#ibcon#end of sib2, iclass 14, count 0 2006.229.03:30:53.88#ibcon#*after write, iclass 14, count 0 2006.229.03:30:53.88#ibcon#*before return 0, iclass 14, count 0 2006.229.03:30:53.88#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:53.88#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:53.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:30:53.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:30:53.88$vck44/valo=6,814.99 2006.229.03:30:53.88#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:30:53.88#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:30:53.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:53.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:53.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:53.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:53.88#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:30:53.88#ibcon#first serial, iclass 16, count 0 2006.229.03:30:53.88#ibcon#enter sib2, iclass 16, count 0 2006.229.03:30:53.88#ibcon#flushed, iclass 16, count 0 2006.229.03:30:53.88#ibcon#about to write, iclass 16, count 0 2006.229.03:30:53.88#ibcon#wrote, iclass 16, count 0 2006.229.03:30:53.88#ibcon#about to read 3, iclass 16, count 0 2006.229.03:30:53.90#ibcon#read 3, iclass 16, count 0 2006.229.03:30:53.90#ibcon#about to read 4, iclass 16, count 0 2006.229.03:30:53.90#ibcon#read 4, iclass 16, count 0 2006.229.03:30:53.90#ibcon#about to read 5, iclass 16, count 0 2006.229.03:30:53.90#ibcon#read 5, iclass 16, count 0 2006.229.03:30:53.90#ibcon#about to read 6, iclass 16, count 0 2006.229.03:30:53.90#ibcon#read 6, iclass 16, count 0 2006.229.03:30:53.90#ibcon#end of sib2, iclass 16, count 0 2006.229.03:30:53.90#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:30:53.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:30:53.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:30:53.90#ibcon#*before write, iclass 16, count 0 2006.229.03:30:53.90#ibcon#enter sib2, iclass 16, count 0 2006.229.03:30:53.90#ibcon#flushed, iclass 16, count 0 2006.229.03:30:53.90#ibcon#about to write, iclass 16, count 0 2006.229.03:30:53.90#ibcon#wrote, iclass 16, count 0 2006.229.03:30:53.90#ibcon#about to read 3, iclass 16, count 0 2006.229.03:30:53.94#ibcon#read 3, iclass 16, count 0 2006.229.03:30:53.94#ibcon#about to read 4, iclass 16, count 0 2006.229.03:30:53.94#ibcon#read 4, iclass 16, count 0 2006.229.03:30:53.94#ibcon#about to read 5, iclass 16, count 0 2006.229.03:30:53.94#ibcon#read 5, iclass 16, count 0 2006.229.03:30:53.94#ibcon#about to read 6, iclass 16, count 0 2006.229.03:30:53.94#ibcon#read 6, iclass 16, count 0 2006.229.03:30:53.94#ibcon#end of sib2, iclass 16, count 0 2006.229.03:30:53.94#ibcon#*after write, iclass 16, count 0 2006.229.03:30:53.94#ibcon#*before return 0, iclass 16, count 0 2006.229.03:30:53.94#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:53.94#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:53.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:30:53.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:30:53.94$vck44/va=6,4 2006.229.03:30:53.94#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.03:30:53.94#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.03:30:53.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:53.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:54.00#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:54.00#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:54.00#ibcon#enter wrdev, iclass 18, count 2 2006.229.03:30:54.00#ibcon#first serial, iclass 18, count 2 2006.229.03:30:54.00#ibcon#enter sib2, iclass 18, count 2 2006.229.03:30:54.00#ibcon#flushed, iclass 18, count 2 2006.229.03:30:54.00#ibcon#about to write, iclass 18, count 2 2006.229.03:30:54.00#ibcon#wrote, iclass 18, count 2 2006.229.03:30:54.00#ibcon#about to read 3, iclass 18, count 2 2006.229.03:30:54.02#ibcon#read 3, iclass 18, count 2 2006.229.03:30:54.02#ibcon#about to read 4, iclass 18, count 2 2006.229.03:30:54.02#ibcon#read 4, iclass 18, count 2 2006.229.03:30:54.02#ibcon#about to read 5, iclass 18, count 2 2006.229.03:30:54.02#ibcon#read 5, iclass 18, count 2 2006.229.03:30:54.02#ibcon#about to read 6, iclass 18, count 2 2006.229.03:30:54.02#ibcon#read 6, iclass 18, count 2 2006.229.03:30:54.02#ibcon#end of sib2, iclass 18, count 2 2006.229.03:30:54.02#ibcon#*mode == 0, iclass 18, count 2 2006.229.03:30:54.02#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.03:30:54.02#ibcon#[25=AT06-04\r\n] 2006.229.03:30:54.02#ibcon#*before write, iclass 18, count 2 2006.229.03:30:54.02#ibcon#enter sib2, iclass 18, count 2 2006.229.03:30:54.02#ibcon#flushed, iclass 18, count 2 2006.229.03:30:54.02#ibcon#about to write, iclass 18, count 2 2006.229.03:30:54.02#ibcon#wrote, iclass 18, count 2 2006.229.03:30:54.02#ibcon#about to read 3, iclass 18, count 2 2006.229.03:30:54.05#ibcon#read 3, iclass 18, count 2 2006.229.03:30:54.05#ibcon#about to read 4, iclass 18, count 2 2006.229.03:30:54.05#ibcon#read 4, iclass 18, count 2 2006.229.03:30:54.05#ibcon#about to read 5, iclass 18, count 2 2006.229.03:30:54.05#ibcon#read 5, iclass 18, count 2 2006.229.03:30:54.05#ibcon#about to read 6, iclass 18, count 2 2006.229.03:30:54.05#ibcon#read 6, iclass 18, count 2 2006.229.03:30:54.05#ibcon#end of sib2, iclass 18, count 2 2006.229.03:30:54.05#ibcon#*after write, iclass 18, count 2 2006.229.03:30:54.05#ibcon#*before return 0, iclass 18, count 2 2006.229.03:30:54.05#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:54.05#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:54.05#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.03:30:54.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:54.05#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:54.17#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:54.17#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:54.17#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:30:54.17#ibcon#first serial, iclass 18, count 0 2006.229.03:30:54.17#ibcon#enter sib2, iclass 18, count 0 2006.229.03:30:54.17#ibcon#flushed, iclass 18, count 0 2006.229.03:30:54.17#ibcon#about to write, iclass 18, count 0 2006.229.03:30:54.17#ibcon#wrote, iclass 18, count 0 2006.229.03:30:54.17#ibcon#about to read 3, iclass 18, count 0 2006.229.03:30:54.19#ibcon#read 3, iclass 18, count 0 2006.229.03:30:54.19#ibcon#about to read 4, iclass 18, count 0 2006.229.03:30:54.19#ibcon#read 4, iclass 18, count 0 2006.229.03:30:54.19#ibcon#about to read 5, iclass 18, count 0 2006.229.03:30:54.19#ibcon#read 5, iclass 18, count 0 2006.229.03:30:54.19#ibcon#about to read 6, iclass 18, count 0 2006.229.03:30:54.19#ibcon#read 6, iclass 18, count 0 2006.229.03:30:54.19#ibcon#end of sib2, iclass 18, count 0 2006.229.03:30:54.19#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:30:54.19#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:30:54.19#ibcon#[25=USB\r\n] 2006.229.03:30:54.19#ibcon#*before write, iclass 18, count 0 2006.229.03:30:54.19#ibcon#enter sib2, iclass 18, count 0 2006.229.03:30:54.19#ibcon#flushed, iclass 18, count 0 2006.229.03:30:54.19#ibcon#about to write, iclass 18, count 0 2006.229.03:30:54.19#ibcon#wrote, iclass 18, count 0 2006.229.03:30:54.19#ibcon#about to read 3, iclass 18, count 0 2006.229.03:30:54.22#ibcon#read 3, iclass 18, count 0 2006.229.03:30:54.22#ibcon#about to read 4, iclass 18, count 0 2006.229.03:30:54.22#ibcon#read 4, iclass 18, count 0 2006.229.03:30:54.22#ibcon#about to read 5, iclass 18, count 0 2006.229.03:30:54.22#ibcon#read 5, iclass 18, count 0 2006.229.03:30:54.22#ibcon#about to read 6, iclass 18, count 0 2006.229.03:30:54.22#ibcon#read 6, iclass 18, count 0 2006.229.03:30:54.22#ibcon#end of sib2, iclass 18, count 0 2006.229.03:30:54.22#ibcon#*after write, iclass 18, count 0 2006.229.03:30:54.22#ibcon#*before return 0, iclass 18, count 0 2006.229.03:30:54.22#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:54.22#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:54.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:30:54.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:30:54.22$vck44/valo=7,864.99 2006.229.03:30:54.22#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.03:30:54.22#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.03:30:54.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:54.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:54.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:54.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:54.22#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:30:54.22#ibcon#first serial, iclass 20, count 0 2006.229.03:30:54.22#ibcon#enter sib2, iclass 20, count 0 2006.229.03:30:54.22#ibcon#flushed, iclass 20, count 0 2006.229.03:30:54.22#ibcon#about to write, iclass 20, count 0 2006.229.03:30:54.22#ibcon#wrote, iclass 20, count 0 2006.229.03:30:54.22#ibcon#about to read 3, iclass 20, count 0 2006.229.03:30:54.24#ibcon#read 3, iclass 20, count 0 2006.229.03:30:54.24#ibcon#about to read 4, iclass 20, count 0 2006.229.03:30:54.24#ibcon#read 4, iclass 20, count 0 2006.229.03:30:54.24#ibcon#about to read 5, iclass 20, count 0 2006.229.03:30:54.24#ibcon#read 5, iclass 20, count 0 2006.229.03:30:54.24#ibcon#about to read 6, iclass 20, count 0 2006.229.03:30:54.24#ibcon#read 6, iclass 20, count 0 2006.229.03:30:54.24#ibcon#end of sib2, iclass 20, count 0 2006.229.03:30:54.24#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:30:54.24#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:30:54.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:30:54.24#ibcon#*before write, iclass 20, count 0 2006.229.03:30:54.24#ibcon#enter sib2, iclass 20, count 0 2006.229.03:30:54.24#ibcon#flushed, iclass 20, count 0 2006.229.03:30:54.24#ibcon#about to write, iclass 20, count 0 2006.229.03:30:54.24#ibcon#wrote, iclass 20, count 0 2006.229.03:30:54.24#ibcon#about to read 3, iclass 20, count 0 2006.229.03:30:54.28#ibcon#read 3, iclass 20, count 0 2006.229.03:30:54.28#ibcon#about to read 4, iclass 20, count 0 2006.229.03:30:54.28#ibcon#read 4, iclass 20, count 0 2006.229.03:30:54.28#ibcon#about to read 5, iclass 20, count 0 2006.229.03:30:54.28#ibcon#read 5, iclass 20, count 0 2006.229.03:30:54.28#ibcon#about to read 6, iclass 20, count 0 2006.229.03:30:54.28#ibcon#read 6, iclass 20, count 0 2006.229.03:30:54.28#ibcon#end of sib2, iclass 20, count 0 2006.229.03:30:54.28#ibcon#*after write, iclass 20, count 0 2006.229.03:30:54.28#ibcon#*before return 0, iclass 20, count 0 2006.229.03:30:54.28#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:54.28#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:54.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:30:54.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:30:54.28$vck44/va=7,5 2006.229.03:30:54.28#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.03:30:54.28#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.03:30:54.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:54.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:54.34#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:54.34#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:54.34#ibcon#enter wrdev, iclass 22, count 2 2006.229.03:30:54.34#ibcon#first serial, iclass 22, count 2 2006.229.03:30:54.34#ibcon#enter sib2, iclass 22, count 2 2006.229.03:30:54.34#ibcon#flushed, iclass 22, count 2 2006.229.03:30:54.34#ibcon#about to write, iclass 22, count 2 2006.229.03:30:54.34#ibcon#wrote, iclass 22, count 2 2006.229.03:30:54.34#ibcon#about to read 3, iclass 22, count 2 2006.229.03:30:54.36#ibcon#read 3, iclass 22, count 2 2006.229.03:30:54.36#ibcon#about to read 4, iclass 22, count 2 2006.229.03:30:54.36#ibcon#read 4, iclass 22, count 2 2006.229.03:30:54.36#ibcon#about to read 5, iclass 22, count 2 2006.229.03:30:54.36#ibcon#read 5, iclass 22, count 2 2006.229.03:30:54.36#ibcon#about to read 6, iclass 22, count 2 2006.229.03:30:54.36#ibcon#read 6, iclass 22, count 2 2006.229.03:30:54.36#ibcon#end of sib2, iclass 22, count 2 2006.229.03:30:54.36#ibcon#*mode == 0, iclass 22, count 2 2006.229.03:30:54.36#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.03:30:54.36#ibcon#[25=AT07-05\r\n] 2006.229.03:30:54.36#ibcon#*before write, iclass 22, count 2 2006.229.03:30:54.36#ibcon#enter sib2, iclass 22, count 2 2006.229.03:30:54.36#ibcon#flushed, iclass 22, count 2 2006.229.03:30:54.36#ibcon#about to write, iclass 22, count 2 2006.229.03:30:54.36#ibcon#wrote, iclass 22, count 2 2006.229.03:30:54.36#ibcon#about to read 3, iclass 22, count 2 2006.229.03:30:54.39#ibcon#read 3, iclass 22, count 2 2006.229.03:30:54.39#ibcon#about to read 4, iclass 22, count 2 2006.229.03:30:54.39#ibcon#read 4, iclass 22, count 2 2006.229.03:30:54.39#ibcon#about to read 5, iclass 22, count 2 2006.229.03:30:54.39#ibcon#read 5, iclass 22, count 2 2006.229.03:30:54.39#ibcon#about to read 6, iclass 22, count 2 2006.229.03:30:54.39#ibcon#read 6, iclass 22, count 2 2006.229.03:30:54.39#ibcon#end of sib2, iclass 22, count 2 2006.229.03:30:54.39#ibcon#*after write, iclass 22, count 2 2006.229.03:30:54.39#ibcon#*before return 0, iclass 22, count 2 2006.229.03:30:54.39#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:54.39#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:54.39#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.03:30:54.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:54.39#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:54.51#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:54.51#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:54.51#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:30:54.51#ibcon#first serial, iclass 22, count 0 2006.229.03:30:54.51#ibcon#enter sib2, iclass 22, count 0 2006.229.03:30:54.51#ibcon#flushed, iclass 22, count 0 2006.229.03:30:54.51#ibcon#about to write, iclass 22, count 0 2006.229.03:30:54.51#ibcon#wrote, iclass 22, count 0 2006.229.03:30:54.51#ibcon#about to read 3, iclass 22, count 0 2006.229.03:30:54.53#ibcon#read 3, iclass 22, count 0 2006.229.03:30:54.53#ibcon#about to read 4, iclass 22, count 0 2006.229.03:30:54.53#ibcon#read 4, iclass 22, count 0 2006.229.03:30:54.53#ibcon#about to read 5, iclass 22, count 0 2006.229.03:30:54.53#ibcon#read 5, iclass 22, count 0 2006.229.03:30:54.53#ibcon#about to read 6, iclass 22, count 0 2006.229.03:30:54.53#ibcon#read 6, iclass 22, count 0 2006.229.03:30:54.53#ibcon#end of sib2, iclass 22, count 0 2006.229.03:30:54.53#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:30:54.53#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:30:54.53#ibcon#[25=USB\r\n] 2006.229.03:30:54.53#ibcon#*before write, iclass 22, count 0 2006.229.03:30:54.53#ibcon#enter sib2, iclass 22, count 0 2006.229.03:30:54.53#ibcon#flushed, iclass 22, count 0 2006.229.03:30:54.53#ibcon#about to write, iclass 22, count 0 2006.229.03:30:54.53#ibcon#wrote, iclass 22, count 0 2006.229.03:30:54.53#ibcon#about to read 3, iclass 22, count 0 2006.229.03:30:54.56#ibcon#read 3, iclass 22, count 0 2006.229.03:30:54.56#ibcon#about to read 4, iclass 22, count 0 2006.229.03:30:54.56#ibcon#read 4, iclass 22, count 0 2006.229.03:30:54.56#ibcon#about to read 5, iclass 22, count 0 2006.229.03:30:54.56#ibcon#read 5, iclass 22, count 0 2006.229.03:30:54.56#ibcon#about to read 6, iclass 22, count 0 2006.229.03:30:54.56#ibcon#read 6, iclass 22, count 0 2006.229.03:30:54.56#ibcon#end of sib2, iclass 22, count 0 2006.229.03:30:54.56#ibcon#*after write, iclass 22, count 0 2006.229.03:30:54.56#ibcon#*before return 0, iclass 22, count 0 2006.229.03:30:54.56#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:54.56#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:54.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:30:54.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:30:54.56$vck44/valo=8,884.99 2006.229.03:30:54.56#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.03:30:54.56#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.03:30:54.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:54.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:54.56#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:54.56#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:54.56#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:30:54.56#ibcon#first serial, iclass 24, count 0 2006.229.03:30:54.56#ibcon#enter sib2, iclass 24, count 0 2006.229.03:30:54.56#ibcon#flushed, iclass 24, count 0 2006.229.03:30:54.56#ibcon#about to write, iclass 24, count 0 2006.229.03:30:54.56#ibcon#wrote, iclass 24, count 0 2006.229.03:30:54.56#ibcon#about to read 3, iclass 24, count 0 2006.229.03:30:54.58#ibcon#read 3, iclass 24, count 0 2006.229.03:30:54.58#ibcon#about to read 4, iclass 24, count 0 2006.229.03:30:54.58#ibcon#read 4, iclass 24, count 0 2006.229.03:30:54.58#ibcon#about to read 5, iclass 24, count 0 2006.229.03:30:54.58#ibcon#read 5, iclass 24, count 0 2006.229.03:30:54.58#ibcon#about to read 6, iclass 24, count 0 2006.229.03:30:54.58#ibcon#read 6, iclass 24, count 0 2006.229.03:30:54.58#ibcon#end of sib2, iclass 24, count 0 2006.229.03:30:54.58#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:30:54.58#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:30:54.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:30:54.58#ibcon#*before write, iclass 24, count 0 2006.229.03:30:54.58#ibcon#enter sib2, iclass 24, count 0 2006.229.03:30:54.58#ibcon#flushed, iclass 24, count 0 2006.229.03:30:54.58#ibcon#about to write, iclass 24, count 0 2006.229.03:30:54.58#ibcon#wrote, iclass 24, count 0 2006.229.03:30:54.58#ibcon#about to read 3, iclass 24, count 0 2006.229.03:30:54.62#ibcon#read 3, iclass 24, count 0 2006.229.03:30:54.62#ibcon#about to read 4, iclass 24, count 0 2006.229.03:30:54.62#ibcon#read 4, iclass 24, count 0 2006.229.03:30:54.62#ibcon#about to read 5, iclass 24, count 0 2006.229.03:30:54.62#ibcon#read 5, iclass 24, count 0 2006.229.03:30:54.62#ibcon#about to read 6, iclass 24, count 0 2006.229.03:30:54.62#ibcon#read 6, iclass 24, count 0 2006.229.03:30:54.62#ibcon#end of sib2, iclass 24, count 0 2006.229.03:30:54.62#ibcon#*after write, iclass 24, count 0 2006.229.03:30:54.62#ibcon#*before return 0, iclass 24, count 0 2006.229.03:30:54.62#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:54.62#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:54.62#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:30:54.62#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:30:54.62$vck44/va=8,6 2006.229.03:30:54.62#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.03:30:54.62#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.03:30:54.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:54.62#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:30:54.68#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:30:54.68#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:30:54.68#ibcon#enter wrdev, iclass 26, count 2 2006.229.03:30:54.68#ibcon#first serial, iclass 26, count 2 2006.229.03:30:54.68#ibcon#enter sib2, iclass 26, count 2 2006.229.03:30:54.68#ibcon#flushed, iclass 26, count 2 2006.229.03:30:54.68#ibcon#about to write, iclass 26, count 2 2006.229.03:30:54.68#ibcon#wrote, iclass 26, count 2 2006.229.03:30:54.68#ibcon#about to read 3, iclass 26, count 2 2006.229.03:30:54.70#ibcon#read 3, iclass 26, count 2 2006.229.03:30:54.70#ibcon#about to read 4, iclass 26, count 2 2006.229.03:30:54.70#ibcon#read 4, iclass 26, count 2 2006.229.03:30:54.70#ibcon#about to read 5, iclass 26, count 2 2006.229.03:30:54.70#ibcon#read 5, iclass 26, count 2 2006.229.03:30:54.70#ibcon#about to read 6, iclass 26, count 2 2006.229.03:30:54.70#ibcon#read 6, iclass 26, count 2 2006.229.03:30:54.70#ibcon#end of sib2, iclass 26, count 2 2006.229.03:30:54.70#ibcon#*mode == 0, iclass 26, count 2 2006.229.03:30:54.70#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.03:30:54.70#ibcon#[25=AT08-06\r\n] 2006.229.03:30:54.70#ibcon#*before write, iclass 26, count 2 2006.229.03:30:54.70#ibcon#enter sib2, iclass 26, count 2 2006.229.03:30:54.70#ibcon#flushed, iclass 26, count 2 2006.229.03:30:54.70#ibcon#about to write, iclass 26, count 2 2006.229.03:30:54.70#ibcon#wrote, iclass 26, count 2 2006.229.03:30:54.70#ibcon#about to read 3, iclass 26, count 2 2006.229.03:30:54.73#ibcon#read 3, iclass 26, count 2 2006.229.03:30:54.73#ibcon#about to read 4, iclass 26, count 2 2006.229.03:30:54.73#ibcon#read 4, iclass 26, count 2 2006.229.03:30:54.73#ibcon#about to read 5, iclass 26, count 2 2006.229.03:30:54.73#ibcon#read 5, iclass 26, count 2 2006.229.03:30:54.73#ibcon#about to read 6, iclass 26, count 2 2006.229.03:30:54.73#ibcon#read 6, iclass 26, count 2 2006.229.03:30:54.73#ibcon#end of sib2, iclass 26, count 2 2006.229.03:30:54.73#ibcon#*after write, iclass 26, count 2 2006.229.03:30:54.73#ibcon#*before return 0, iclass 26, count 2 2006.229.03:30:54.73#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:30:54.73#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:30:54.73#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.03:30:54.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:54.73#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:30:54.85#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:30:54.85#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:30:54.85#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:30:54.85#ibcon#first serial, iclass 26, count 0 2006.229.03:30:54.85#ibcon#enter sib2, iclass 26, count 0 2006.229.03:30:54.85#ibcon#flushed, iclass 26, count 0 2006.229.03:30:54.85#ibcon#about to write, iclass 26, count 0 2006.229.03:30:54.85#ibcon#wrote, iclass 26, count 0 2006.229.03:30:54.85#ibcon#about to read 3, iclass 26, count 0 2006.229.03:30:54.87#ibcon#read 3, iclass 26, count 0 2006.229.03:30:54.87#ibcon#about to read 4, iclass 26, count 0 2006.229.03:30:54.87#ibcon#read 4, iclass 26, count 0 2006.229.03:30:54.87#ibcon#about to read 5, iclass 26, count 0 2006.229.03:30:54.87#ibcon#read 5, iclass 26, count 0 2006.229.03:30:54.87#ibcon#about to read 6, iclass 26, count 0 2006.229.03:30:54.87#ibcon#read 6, iclass 26, count 0 2006.229.03:30:54.87#ibcon#end of sib2, iclass 26, count 0 2006.229.03:30:54.87#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:30:54.87#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:30:54.87#ibcon#[25=USB\r\n] 2006.229.03:30:54.87#ibcon#*before write, iclass 26, count 0 2006.229.03:30:54.87#ibcon#enter sib2, iclass 26, count 0 2006.229.03:30:54.87#ibcon#flushed, iclass 26, count 0 2006.229.03:30:54.87#ibcon#about to write, iclass 26, count 0 2006.229.03:30:54.87#ibcon#wrote, iclass 26, count 0 2006.229.03:30:54.87#ibcon#about to read 3, iclass 26, count 0 2006.229.03:30:54.90#ibcon#read 3, iclass 26, count 0 2006.229.03:30:54.90#ibcon#about to read 4, iclass 26, count 0 2006.229.03:30:54.90#ibcon#read 4, iclass 26, count 0 2006.229.03:30:54.90#ibcon#about to read 5, iclass 26, count 0 2006.229.03:30:54.90#ibcon#read 5, iclass 26, count 0 2006.229.03:30:54.90#ibcon#about to read 6, iclass 26, count 0 2006.229.03:30:54.90#ibcon#read 6, iclass 26, count 0 2006.229.03:30:54.90#ibcon#end of sib2, iclass 26, count 0 2006.229.03:30:54.90#ibcon#*after write, iclass 26, count 0 2006.229.03:30:54.90#ibcon#*before return 0, iclass 26, count 0 2006.229.03:30:54.90#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:30:54.90#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:30:54.90#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:30:54.90#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:30:54.90$vck44/vblo=1,629.99 2006.229.03:30:54.90#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.03:30:54.90#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.03:30:54.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:54.90#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:54.90#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:54.90#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:54.90#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:30:54.90#ibcon#first serial, iclass 28, count 0 2006.229.03:30:54.90#ibcon#enter sib2, iclass 28, count 0 2006.229.03:30:54.90#ibcon#flushed, iclass 28, count 0 2006.229.03:30:54.90#ibcon#about to write, iclass 28, count 0 2006.229.03:30:54.90#ibcon#wrote, iclass 28, count 0 2006.229.03:30:54.90#ibcon#about to read 3, iclass 28, count 0 2006.229.03:30:54.92#ibcon#read 3, iclass 28, count 0 2006.229.03:30:54.92#ibcon#about to read 4, iclass 28, count 0 2006.229.03:30:54.92#ibcon#read 4, iclass 28, count 0 2006.229.03:30:54.92#ibcon#about to read 5, iclass 28, count 0 2006.229.03:30:54.92#ibcon#read 5, iclass 28, count 0 2006.229.03:30:54.92#ibcon#about to read 6, iclass 28, count 0 2006.229.03:30:54.92#ibcon#read 6, iclass 28, count 0 2006.229.03:30:54.92#ibcon#end of sib2, iclass 28, count 0 2006.229.03:30:54.92#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:30:54.92#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:30:54.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:30:54.92#ibcon#*before write, iclass 28, count 0 2006.229.03:30:54.92#ibcon#enter sib2, iclass 28, count 0 2006.229.03:30:54.92#ibcon#flushed, iclass 28, count 0 2006.229.03:30:54.92#ibcon#about to write, iclass 28, count 0 2006.229.03:30:54.92#ibcon#wrote, iclass 28, count 0 2006.229.03:30:54.92#ibcon#about to read 3, iclass 28, count 0 2006.229.03:30:54.96#ibcon#read 3, iclass 28, count 0 2006.229.03:30:54.96#ibcon#about to read 4, iclass 28, count 0 2006.229.03:30:54.96#ibcon#read 4, iclass 28, count 0 2006.229.03:30:54.96#ibcon#about to read 5, iclass 28, count 0 2006.229.03:30:54.96#ibcon#read 5, iclass 28, count 0 2006.229.03:30:54.96#ibcon#about to read 6, iclass 28, count 0 2006.229.03:30:54.96#ibcon#read 6, iclass 28, count 0 2006.229.03:30:54.96#ibcon#end of sib2, iclass 28, count 0 2006.229.03:30:54.96#ibcon#*after write, iclass 28, count 0 2006.229.03:30:54.96#ibcon#*before return 0, iclass 28, count 0 2006.229.03:30:54.96#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:54.96#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:30:54.96#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:30:54.96#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:30:54.96$vck44/vb=1,4 2006.229.03:30:54.96#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.03:30:54.96#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.03:30:54.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:54.96#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:54.96#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:54.96#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:54.96#ibcon#enter wrdev, iclass 30, count 2 2006.229.03:30:54.96#ibcon#first serial, iclass 30, count 2 2006.229.03:30:54.96#ibcon#enter sib2, iclass 30, count 2 2006.229.03:30:54.96#ibcon#flushed, iclass 30, count 2 2006.229.03:30:54.96#ibcon#about to write, iclass 30, count 2 2006.229.03:30:54.96#ibcon#wrote, iclass 30, count 2 2006.229.03:30:54.96#ibcon#about to read 3, iclass 30, count 2 2006.229.03:30:54.98#ibcon#read 3, iclass 30, count 2 2006.229.03:30:54.98#ibcon#about to read 4, iclass 30, count 2 2006.229.03:30:54.98#ibcon#read 4, iclass 30, count 2 2006.229.03:30:54.98#ibcon#about to read 5, iclass 30, count 2 2006.229.03:30:54.98#ibcon#read 5, iclass 30, count 2 2006.229.03:30:54.98#ibcon#about to read 6, iclass 30, count 2 2006.229.03:30:54.98#ibcon#read 6, iclass 30, count 2 2006.229.03:30:54.98#ibcon#end of sib2, iclass 30, count 2 2006.229.03:30:54.98#ibcon#*mode == 0, iclass 30, count 2 2006.229.03:30:54.98#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.03:30:54.98#ibcon#[27=AT01-04\r\n] 2006.229.03:30:54.98#ibcon#*before write, iclass 30, count 2 2006.229.03:30:54.98#ibcon#enter sib2, iclass 30, count 2 2006.229.03:30:54.98#ibcon#flushed, iclass 30, count 2 2006.229.03:30:54.98#ibcon#about to write, iclass 30, count 2 2006.229.03:30:54.98#ibcon#wrote, iclass 30, count 2 2006.229.03:30:54.98#ibcon#about to read 3, iclass 30, count 2 2006.229.03:30:55.01#ibcon#read 3, iclass 30, count 2 2006.229.03:30:55.01#ibcon#about to read 4, iclass 30, count 2 2006.229.03:30:55.01#ibcon#read 4, iclass 30, count 2 2006.229.03:30:55.01#ibcon#about to read 5, iclass 30, count 2 2006.229.03:30:55.01#ibcon#read 5, iclass 30, count 2 2006.229.03:30:55.01#ibcon#about to read 6, iclass 30, count 2 2006.229.03:30:55.01#ibcon#read 6, iclass 30, count 2 2006.229.03:30:55.01#ibcon#end of sib2, iclass 30, count 2 2006.229.03:30:55.01#ibcon#*after write, iclass 30, count 2 2006.229.03:30:55.01#ibcon#*before return 0, iclass 30, count 2 2006.229.03:30:55.01#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:55.01#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:30:55.01#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.03:30:55.01#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:55.01#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:55.13#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:55.13#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:55.13#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:30:55.13#ibcon#first serial, iclass 30, count 0 2006.229.03:30:55.13#ibcon#enter sib2, iclass 30, count 0 2006.229.03:30:55.13#ibcon#flushed, iclass 30, count 0 2006.229.03:30:55.13#ibcon#about to write, iclass 30, count 0 2006.229.03:30:55.13#ibcon#wrote, iclass 30, count 0 2006.229.03:30:55.13#ibcon#about to read 3, iclass 30, count 0 2006.229.03:30:55.15#ibcon#read 3, iclass 30, count 0 2006.229.03:30:55.15#ibcon#about to read 4, iclass 30, count 0 2006.229.03:30:55.15#ibcon#read 4, iclass 30, count 0 2006.229.03:30:55.15#ibcon#about to read 5, iclass 30, count 0 2006.229.03:30:55.15#ibcon#read 5, iclass 30, count 0 2006.229.03:30:55.15#ibcon#about to read 6, iclass 30, count 0 2006.229.03:30:55.15#ibcon#read 6, iclass 30, count 0 2006.229.03:30:55.15#ibcon#end of sib2, iclass 30, count 0 2006.229.03:30:55.15#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:30:55.15#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:30:55.15#ibcon#[27=USB\r\n] 2006.229.03:30:55.15#ibcon#*before write, iclass 30, count 0 2006.229.03:30:55.15#ibcon#enter sib2, iclass 30, count 0 2006.229.03:30:55.15#ibcon#flushed, iclass 30, count 0 2006.229.03:30:55.15#ibcon#about to write, iclass 30, count 0 2006.229.03:30:55.15#ibcon#wrote, iclass 30, count 0 2006.229.03:30:55.15#ibcon#about to read 3, iclass 30, count 0 2006.229.03:30:55.18#ibcon#read 3, iclass 30, count 0 2006.229.03:30:55.18#ibcon#about to read 4, iclass 30, count 0 2006.229.03:30:55.18#ibcon#read 4, iclass 30, count 0 2006.229.03:30:55.18#ibcon#about to read 5, iclass 30, count 0 2006.229.03:30:55.18#ibcon#read 5, iclass 30, count 0 2006.229.03:30:55.18#ibcon#about to read 6, iclass 30, count 0 2006.229.03:30:55.18#ibcon#read 6, iclass 30, count 0 2006.229.03:30:55.18#ibcon#end of sib2, iclass 30, count 0 2006.229.03:30:55.18#ibcon#*after write, iclass 30, count 0 2006.229.03:30:55.18#ibcon#*before return 0, iclass 30, count 0 2006.229.03:30:55.18#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:55.18#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:30:55.18#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:30:55.18#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:30:55.18$vck44/vblo=2,634.99 2006.229.03:30:55.18#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.03:30:55.18#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.03:30:55.18#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:55.18#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:55.18#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:55.18#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:55.18#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:30:55.18#ibcon#first serial, iclass 32, count 0 2006.229.03:30:55.18#ibcon#enter sib2, iclass 32, count 0 2006.229.03:30:55.18#ibcon#flushed, iclass 32, count 0 2006.229.03:30:55.18#ibcon#about to write, iclass 32, count 0 2006.229.03:30:55.18#ibcon#wrote, iclass 32, count 0 2006.229.03:30:55.18#ibcon#about to read 3, iclass 32, count 0 2006.229.03:30:55.20#ibcon#read 3, iclass 32, count 0 2006.229.03:30:55.20#ibcon#about to read 4, iclass 32, count 0 2006.229.03:30:55.20#ibcon#read 4, iclass 32, count 0 2006.229.03:30:55.20#ibcon#about to read 5, iclass 32, count 0 2006.229.03:30:55.20#ibcon#read 5, iclass 32, count 0 2006.229.03:30:55.20#ibcon#about to read 6, iclass 32, count 0 2006.229.03:30:55.20#ibcon#read 6, iclass 32, count 0 2006.229.03:30:55.20#ibcon#end of sib2, iclass 32, count 0 2006.229.03:30:55.20#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:30:55.20#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:30:55.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:30:55.20#ibcon#*before write, iclass 32, count 0 2006.229.03:30:55.20#ibcon#enter sib2, iclass 32, count 0 2006.229.03:30:55.20#ibcon#flushed, iclass 32, count 0 2006.229.03:30:55.20#ibcon#about to write, iclass 32, count 0 2006.229.03:30:55.20#ibcon#wrote, iclass 32, count 0 2006.229.03:30:55.20#ibcon#about to read 3, iclass 32, count 0 2006.229.03:30:55.24#ibcon#read 3, iclass 32, count 0 2006.229.03:30:55.24#ibcon#about to read 4, iclass 32, count 0 2006.229.03:30:55.24#ibcon#read 4, iclass 32, count 0 2006.229.03:30:55.24#ibcon#about to read 5, iclass 32, count 0 2006.229.03:30:55.24#ibcon#read 5, iclass 32, count 0 2006.229.03:30:55.24#ibcon#about to read 6, iclass 32, count 0 2006.229.03:30:55.24#ibcon#read 6, iclass 32, count 0 2006.229.03:30:55.24#ibcon#end of sib2, iclass 32, count 0 2006.229.03:30:55.24#ibcon#*after write, iclass 32, count 0 2006.229.03:30:55.24#ibcon#*before return 0, iclass 32, count 0 2006.229.03:30:55.24#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:55.24#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:30:55.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:30:55.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:30:55.24$vck44/vb=2,4 2006.229.03:30:55.24#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.03:30:55.24#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.03:30:55.24#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:55.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:55.30#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:55.30#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:55.30#ibcon#enter wrdev, iclass 34, count 2 2006.229.03:30:55.30#ibcon#first serial, iclass 34, count 2 2006.229.03:30:55.30#ibcon#enter sib2, iclass 34, count 2 2006.229.03:30:55.30#ibcon#flushed, iclass 34, count 2 2006.229.03:30:55.30#ibcon#about to write, iclass 34, count 2 2006.229.03:30:55.30#ibcon#wrote, iclass 34, count 2 2006.229.03:30:55.30#ibcon#about to read 3, iclass 34, count 2 2006.229.03:30:55.32#ibcon#read 3, iclass 34, count 2 2006.229.03:30:55.32#ibcon#about to read 4, iclass 34, count 2 2006.229.03:30:55.32#ibcon#read 4, iclass 34, count 2 2006.229.03:30:55.32#ibcon#about to read 5, iclass 34, count 2 2006.229.03:30:55.32#ibcon#read 5, iclass 34, count 2 2006.229.03:30:55.32#ibcon#about to read 6, iclass 34, count 2 2006.229.03:30:55.32#ibcon#read 6, iclass 34, count 2 2006.229.03:30:55.32#ibcon#end of sib2, iclass 34, count 2 2006.229.03:30:55.32#ibcon#*mode == 0, iclass 34, count 2 2006.229.03:30:55.32#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.03:30:55.32#ibcon#[27=AT02-04\r\n] 2006.229.03:30:55.32#ibcon#*before write, iclass 34, count 2 2006.229.03:30:55.32#ibcon#enter sib2, iclass 34, count 2 2006.229.03:30:55.32#ibcon#flushed, iclass 34, count 2 2006.229.03:30:55.32#ibcon#about to write, iclass 34, count 2 2006.229.03:30:55.32#ibcon#wrote, iclass 34, count 2 2006.229.03:30:55.32#ibcon#about to read 3, iclass 34, count 2 2006.229.03:30:55.35#ibcon#read 3, iclass 34, count 2 2006.229.03:30:55.35#ibcon#about to read 4, iclass 34, count 2 2006.229.03:30:55.35#ibcon#read 4, iclass 34, count 2 2006.229.03:30:55.35#ibcon#about to read 5, iclass 34, count 2 2006.229.03:30:55.35#ibcon#read 5, iclass 34, count 2 2006.229.03:30:55.35#ibcon#about to read 6, iclass 34, count 2 2006.229.03:30:55.35#ibcon#read 6, iclass 34, count 2 2006.229.03:30:55.35#ibcon#end of sib2, iclass 34, count 2 2006.229.03:30:55.35#ibcon#*after write, iclass 34, count 2 2006.229.03:30:55.35#ibcon#*before return 0, iclass 34, count 2 2006.229.03:30:55.35#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:55.35#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:30:55.35#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.03:30:55.35#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:55.35#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:55.47#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:55.47#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:55.47#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:30:55.47#ibcon#first serial, iclass 34, count 0 2006.229.03:30:55.47#ibcon#enter sib2, iclass 34, count 0 2006.229.03:30:55.47#ibcon#flushed, iclass 34, count 0 2006.229.03:30:55.47#ibcon#about to write, iclass 34, count 0 2006.229.03:30:55.47#ibcon#wrote, iclass 34, count 0 2006.229.03:30:55.47#ibcon#about to read 3, iclass 34, count 0 2006.229.03:30:55.49#ibcon#read 3, iclass 34, count 0 2006.229.03:30:55.49#ibcon#about to read 4, iclass 34, count 0 2006.229.03:30:55.49#ibcon#read 4, iclass 34, count 0 2006.229.03:30:55.49#ibcon#about to read 5, iclass 34, count 0 2006.229.03:30:55.49#ibcon#read 5, iclass 34, count 0 2006.229.03:30:55.49#ibcon#about to read 6, iclass 34, count 0 2006.229.03:30:55.49#ibcon#read 6, iclass 34, count 0 2006.229.03:30:55.49#ibcon#end of sib2, iclass 34, count 0 2006.229.03:30:55.49#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:30:55.49#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:30:55.49#ibcon#[27=USB\r\n] 2006.229.03:30:55.49#ibcon#*before write, iclass 34, count 0 2006.229.03:30:55.49#ibcon#enter sib2, iclass 34, count 0 2006.229.03:30:55.49#ibcon#flushed, iclass 34, count 0 2006.229.03:30:55.49#ibcon#about to write, iclass 34, count 0 2006.229.03:30:55.49#ibcon#wrote, iclass 34, count 0 2006.229.03:30:55.49#ibcon#about to read 3, iclass 34, count 0 2006.229.03:30:55.52#ibcon#read 3, iclass 34, count 0 2006.229.03:30:55.52#ibcon#about to read 4, iclass 34, count 0 2006.229.03:30:55.52#ibcon#read 4, iclass 34, count 0 2006.229.03:30:55.52#ibcon#about to read 5, iclass 34, count 0 2006.229.03:30:55.52#ibcon#read 5, iclass 34, count 0 2006.229.03:30:55.52#ibcon#about to read 6, iclass 34, count 0 2006.229.03:30:55.52#ibcon#read 6, iclass 34, count 0 2006.229.03:30:55.52#ibcon#end of sib2, iclass 34, count 0 2006.229.03:30:55.52#ibcon#*after write, iclass 34, count 0 2006.229.03:30:55.52#ibcon#*before return 0, iclass 34, count 0 2006.229.03:30:55.52#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:55.52#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:30:55.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:30:55.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:30:55.52$vck44/vblo=3,649.99 2006.229.03:30:55.52#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.03:30:55.52#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.03:30:55.52#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:55.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:30:55.52#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:30:55.52#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:30:55.52#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:30:55.52#ibcon#first serial, iclass 36, count 0 2006.229.03:30:55.52#ibcon#enter sib2, iclass 36, count 0 2006.229.03:30:55.52#ibcon#flushed, iclass 36, count 0 2006.229.03:30:55.52#ibcon#about to write, iclass 36, count 0 2006.229.03:30:55.52#ibcon#wrote, iclass 36, count 0 2006.229.03:30:55.52#ibcon#about to read 3, iclass 36, count 0 2006.229.03:30:55.54#ibcon#read 3, iclass 36, count 0 2006.229.03:30:55.54#ibcon#about to read 4, iclass 36, count 0 2006.229.03:30:55.54#ibcon#read 4, iclass 36, count 0 2006.229.03:30:55.54#ibcon#about to read 5, iclass 36, count 0 2006.229.03:30:55.54#ibcon#read 5, iclass 36, count 0 2006.229.03:30:55.54#ibcon#about to read 6, iclass 36, count 0 2006.229.03:30:55.54#ibcon#read 6, iclass 36, count 0 2006.229.03:30:55.54#ibcon#end of sib2, iclass 36, count 0 2006.229.03:30:55.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:30:55.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:30:55.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:30:55.54#ibcon#*before write, iclass 36, count 0 2006.229.03:30:55.54#ibcon#enter sib2, iclass 36, count 0 2006.229.03:30:55.54#ibcon#flushed, iclass 36, count 0 2006.229.03:30:55.54#ibcon#about to write, iclass 36, count 0 2006.229.03:30:55.54#ibcon#wrote, iclass 36, count 0 2006.229.03:30:55.54#ibcon#about to read 3, iclass 36, count 0 2006.229.03:30:55.58#ibcon#read 3, iclass 36, count 0 2006.229.03:30:55.58#ibcon#about to read 4, iclass 36, count 0 2006.229.03:30:55.58#ibcon#read 4, iclass 36, count 0 2006.229.03:30:55.58#ibcon#about to read 5, iclass 36, count 0 2006.229.03:30:55.58#ibcon#read 5, iclass 36, count 0 2006.229.03:30:55.58#ibcon#about to read 6, iclass 36, count 0 2006.229.03:30:55.58#ibcon#read 6, iclass 36, count 0 2006.229.03:30:55.58#ibcon#end of sib2, iclass 36, count 0 2006.229.03:30:55.58#ibcon#*after write, iclass 36, count 0 2006.229.03:30:55.58#ibcon#*before return 0, iclass 36, count 0 2006.229.03:30:55.58#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:30:55.58#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:30:55.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:30:55.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:30:55.58$vck44/vb=3,4 2006.229.03:30:55.58#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.03:30:55.58#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.03:30:55.58#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:55.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:30:55.64#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:30:55.64#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:30:55.64#ibcon#enter wrdev, iclass 38, count 2 2006.229.03:30:55.64#ibcon#first serial, iclass 38, count 2 2006.229.03:30:55.64#ibcon#enter sib2, iclass 38, count 2 2006.229.03:30:55.64#ibcon#flushed, iclass 38, count 2 2006.229.03:30:55.64#ibcon#about to write, iclass 38, count 2 2006.229.03:30:55.64#ibcon#wrote, iclass 38, count 2 2006.229.03:30:55.64#ibcon#about to read 3, iclass 38, count 2 2006.229.03:30:55.66#ibcon#read 3, iclass 38, count 2 2006.229.03:30:55.66#ibcon#about to read 4, iclass 38, count 2 2006.229.03:30:55.66#ibcon#read 4, iclass 38, count 2 2006.229.03:30:55.66#ibcon#about to read 5, iclass 38, count 2 2006.229.03:30:55.66#ibcon#read 5, iclass 38, count 2 2006.229.03:30:55.66#ibcon#about to read 6, iclass 38, count 2 2006.229.03:30:55.66#ibcon#read 6, iclass 38, count 2 2006.229.03:30:55.66#ibcon#end of sib2, iclass 38, count 2 2006.229.03:30:55.66#ibcon#*mode == 0, iclass 38, count 2 2006.229.03:30:55.66#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.03:30:55.66#ibcon#[27=AT03-04\r\n] 2006.229.03:30:55.66#ibcon#*before write, iclass 38, count 2 2006.229.03:30:55.66#ibcon#enter sib2, iclass 38, count 2 2006.229.03:30:55.66#ibcon#flushed, iclass 38, count 2 2006.229.03:30:55.66#ibcon#about to write, iclass 38, count 2 2006.229.03:30:55.66#ibcon#wrote, iclass 38, count 2 2006.229.03:30:55.66#ibcon#about to read 3, iclass 38, count 2 2006.229.03:30:55.69#ibcon#read 3, iclass 38, count 2 2006.229.03:30:55.69#ibcon#about to read 4, iclass 38, count 2 2006.229.03:30:55.69#ibcon#read 4, iclass 38, count 2 2006.229.03:30:55.69#ibcon#about to read 5, iclass 38, count 2 2006.229.03:30:55.69#ibcon#read 5, iclass 38, count 2 2006.229.03:30:55.69#ibcon#about to read 6, iclass 38, count 2 2006.229.03:30:55.69#ibcon#read 6, iclass 38, count 2 2006.229.03:30:55.69#ibcon#end of sib2, iclass 38, count 2 2006.229.03:30:55.69#ibcon#*after write, iclass 38, count 2 2006.229.03:30:55.69#ibcon#*before return 0, iclass 38, count 2 2006.229.03:30:55.69#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:30:55.69#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:30:55.69#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.03:30:55.69#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:55.69#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:30:55.81#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:30:55.81#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:30:55.81#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:30:55.81#ibcon#first serial, iclass 38, count 0 2006.229.03:30:55.81#ibcon#enter sib2, iclass 38, count 0 2006.229.03:30:55.81#ibcon#flushed, iclass 38, count 0 2006.229.03:30:55.81#ibcon#about to write, iclass 38, count 0 2006.229.03:30:55.81#ibcon#wrote, iclass 38, count 0 2006.229.03:30:55.81#ibcon#about to read 3, iclass 38, count 0 2006.229.03:30:55.83#ibcon#read 3, iclass 38, count 0 2006.229.03:30:55.83#ibcon#about to read 4, iclass 38, count 0 2006.229.03:30:55.83#ibcon#read 4, iclass 38, count 0 2006.229.03:30:55.83#ibcon#about to read 5, iclass 38, count 0 2006.229.03:30:55.83#ibcon#read 5, iclass 38, count 0 2006.229.03:30:55.83#ibcon#about to read 6, iclass 38, count 0 2006.229.03:30:55.83#ibcon#read 6, iclass 38, count 0 2006.229.03:30:55.83#ibcon#end of sib2, iclass 38, count 0 2006.229.03:30:55.83#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:30:55.83#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:30:55.83#ibcon#[27=USB\r\n] 2006.229.03:30:55.83#ibcon#*before write, iclass 38, count 0 2006.229.03:30:55.83#ibcon#enter sib2, iclass 38, count 0 2006.229.03:30:55.83#ibcon#flushed, iclass 38, count 0 2006.229.03:30:55.83#ibcon#about to write, iclass 38, count 0 2006.229.03:30:55.83#ibcon#wrote, iclass 38, count 0 2006.229.03:30:55.83#ibcon#about to read 3, iclass 38, count 0 2006.229.03:30:55.86#ibcon#read 3, iclass 38, count 0 2006.229.03:30:55.86#ibcon#about to read 4, iclass 38, count 0 2006.229.03:30:55.86#ibcon#read 4, iclass 38, count 0 2006.229.03:30:55.86#ibcon#about to read 5, iclass 38, count 0 2006.229.03:30:55.86#ibcon#read 5, iclass 38, count 0 2006.229.03:30:55.86#ibcon#about to read 6, iclass 38, count 0 2006.229.03:30:55.86#ibcon#read 6, iclass 38, count 0 2006.229.03:30:55.86#ibcon#end of sib2, iclass 38, count 0 2006.229.03:30:55.86#ibcon#*after write, iclass 38, count 0 2006.229.03:30:55.86#ibcon#*before return 0, iclass 38, count 0 2006.229.03:30:55.86#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:30:55.86#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:30:55.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:30:55.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:30:55.86$vck44/vblo=4,679.99 2006.229.03:30:55.86#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.03:30:55.86#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.03:30:55.86#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:55.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:30:55.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:30:55.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:30:55.86#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:30:55.86#ibcon#first serial, iclass 40, count 0 2006.229.03:30:55.86#ibcon#enter sib2, iclass 40, count 0 2006.229.03:30:55.86#ibcon#flushed, iclass 40, count 0 2006.229.03:30:55.86#ibcon#about to write, iclass 40, count 0 2006.229.03:30:55.86#ibcon#wrote, iclass 40, count 0 2006.229.03:30:55.86#ibcon#about to read 3, iclass 40, count 0 2006.229.03:30:55.88#ibcon#read 3, iclass 40, count 0 2006.229.03:30:55.88#ibcon#about to read 4, iclass 40, count 0 2006.229.03:30:55.88#ibcon#read 4, iclass 40, count 0 2006.229.03:30:55.88#ibcon#about to read 5, iclass 40, count 0 2006.229.03:30:55.88#ibcon#read 5, iclass 40, count 0 2006.229.03:30:55.88#ibcon#about to read 6, iclass 40, count 0 2006.229.03:30:55.88#ibcon#read 6, iclass 40, count 0 2006.229.03:30:55.88#ibcon#end of sib2, iclass 40, count 0 2006.229.03:30:55.88#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:30:55.88#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:30:55.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:30:55.88#ibcon#*before write, iclass 40, count 0 2006.229.03:30:55.88#ibcon#enter sib2, iclass 40, count 0 2006.229.03:30:55.88#ibcon#flushed, iclass 40, count 0 2006.229.03:30:55.88#ibcon#about to write, iclass 40, count 0 2006.229.03:30:55.88#ibcon#wrote, iclass 40, count 0 2006.229.03:30:55.88#ibcon#about to read 3, iclass 40, count 0 2006.229.03:30:55.92#ibcon#read 3, iclass 40, count 0 2006.229.03:30:55.92#ibcon#about to read 4, iclass 40, count 0 2006.229.03:30:55.92#ibcon#read 4, iclass 40, count 0 2006.229.03:30:55.92#ibcon#about to read 5, iclass 40, count 0 2006.229.03:30:55.92#ibcon#read 5, iclass 40, count 0 2006.229.03:30:55.92#ibcon#about to read 6, iclass 40, count 0 2006.229.03:30:55.92#ibcon#read 6, iclass 40, count 0 2006.229.03:30:55.92#ibcon#end of sib2, iclass 40, count 0 2006.229.03:30:55.92#ibcon#*after write, iclass 40, count 0 2006.229.03:30:55.92#ibcon#*before return 0, iclass 40, count 0 2006.229.03:30:55.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:30:55.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:30:55.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:30:55.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:30:55.92$vck44/vb=4,4 2006.229.03:30:55.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.03:30:55.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.03:30:55.92#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:55.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:55.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:55.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:55.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.03:30:55.98#ibcon#first serial, iclass 4, count 2 2006.229.03:30:55.98#ibcon#enter sib2, iclass 4, count 2 2006.229.03:30:55.98#ibcon#flushed, iclass 4, count 2 2006.229.03:30:55.98#ibcon#about to write, iclass 4, count 2 2006.229.03:30:55.98#ibcon#wrote, iclass 4, count 2 2006.229.03:30:55.98#ibcon#about to read 3, iclass 4, count 2 2006.229.03:30:56.00#ibcon#read 3, iclass 4, count 2 2006.229.03:30:56.00#ibcon#about to read 4, iclass 4, count 2 2006.229.03:30:56.00#ibcon#read 4, iclass 4, count 2 2006.229.03:30:56.00#ibcon#about to read 5, iclass 4, count 2 2006.229.03:30:56.00#ibcon#read 5, iclass 4, count 2 2006.229.03:30:56.00#ibcon#about to read 6, iclass 4, count 2 2006.229.03:30:56.00#ibcon#read 6, iclass 4, count 2 2006.229.03:30:56.00#ibcon#end of sib2, iclass 4, count 2 2006.229.03:30:56.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.03:30:56.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.03:30:56.00#ibcon#[27=AT04-04\r\n] 2006.229.03:30:56.00#ibcon#*before write, iclass 4, count 2 2006.229.03:30:56.00#ibcon#enter sib2, iclass 4, count 2 2006.229.03:30:56.00#ibcon#flushed, iclass 4, count 2 2006.229.03:30:56.00#ibcon#about to write, iclass 4, count 2 2006.229.03:30:56.00#ibcon#wrote, iclass 4, count 2 2006.229.03:30:56.00#ibcon#about to read 3, iclass 4, count 2 2006.229.03:30:56.03#ibcon#read 3, iclass 4, count 2 2006.229.03:30:56.03#ibcon#about to read 4, iclass 4, count 2 2006.229.03:30:56.03#ibcon#read 4, iclass 4, count 2 2006.229.03:30:56.03#ibcon#about to read 5, iclass 4, count 2 2006.229.03:30:56.03#ibcon#read 5, iclass 4, count 2 2006.229.03:30:56.03#ibcon#about to read 6, iclass 4, count 2 2006.229.03:30:56.03#ibcon#read 6, iclass 4, count 2 2006.229.03:30:56.03#ibcon#end of sib2, iclass 4, count 2 2006.229.03:30:56.03#ibcon#*after write, iclass 4, count 2 2006.229.03:30:56.03#ibcon#*before return 0, iclass 4, count 2 2006.229.03:30:56.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:56.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:30:56.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.03:30:56.03#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:56.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:56.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:56.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:56.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:30:56.15#ibcon#first serial, iclass 4, count 0 2006.229.03:30:56.15#ibcon#enter sib2, iclass 4, count 0 2006.229.03:30:56.15#ibcon#flushed, iclass 4, count 0 2006.229.03:30:56.15#ibcon#about to write, iclass 4, count 0 2006.229.03:30:56.15#ibcon#wrote, iclass 4, count 0 2006.229.03:30:56.15#ibcon#about to read 3, iclass 4, count 0 2006.229.03:30:56.17#ibcon#read 3, iclass 4, count 0 2006.229.03:30:56.17#ibcon#about to read 4, iclass 4, count 0 2006.229.03:30:56.17#ibcon#read 4, iclass 4, count 0 2006.229.03:30:56.17#ibcon#about to read 5, iclass 4, count 0 2006.229.03:30:56.17#ibcon#read 5, iclass 4, count 0 2006.229.03:30:56.17#ibcon#about to read 6, iclass 4, count 0 2006.229.03:30:56.17#ibcon#read 6, iclass 4, count 0 2006.229.03:30:56.17#ibcon#end of sib2, iclass 4, count 0 2006.229.03:30:56.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:30:56.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:30:56.17#ibcon#[27=USB\r\n] 2006.229.03:30:56.17#ibcon#*before write, iclass 4, count 0 2006.229.03:30:56.17#ibcon#enter sib2, iclass 4, count 0 2006.229.03:30:56.17#ibcon#flushed, iclass 4, count 0 2006.229.03:30:56.17#ibcon#about to write, iclass 4, count 0 2006.229.03:30:56.17#ibcon#wrote, iclass 4, count 0 2006.229.03:30:56.17#ibcon#about to read 3, iclass 4, count 0 2006.229.03:30:56.20#ibcon#read 3, iclass 4, count 0 2006.229.03:30:56.20#ibcon#about to read 4, iclass 4, count 0 2006.229.03:30:56.20#ibcon#read 4, iclass 4, count 0 2006.229.03:30:56.20#ibcon#about to read 5, iclass 4, count 0 2006.229.03:30:56.20#ibcon#read 5, iclass 4, count 0 2006.229.03:30:56.20#ibcon#about to read 6, iclass 4, count 0 2006.229.03:30:56.20#ibcon#read 6, iclass 4, count 0 2006.229.03:30:56.20#ibcon#end of sib2, iclass 4, count 0 2006.229.03:30:56.20#ibcon#*after write, iclass 4, count 0 2006.229.03:30:56.20#ibcon#*before return 0, iclass 4, count 0 2006.229.03:30:56.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:56.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:30:56.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:30:56.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:30:56.20$vck44/vblo=5,709.99 2006.229.03:30:56.20#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.03:30:56.20#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.03:30:56.20#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:56.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:56.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:56.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:56.20#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:30:56.20#ibcon#first serial, iclass 6, count 0 2006.229.03:30:56.20#ibcon#enter sib2, iclass 6, count 0 2006.229.03:30:56.20#ibcon#flushed, iclass 6, count 0 2006.229.03:30:56.20#ibcon#about to write, iclass 6, count 0 2006.229.03:30:56.20#ibcon#wrote, iclass 6, count 0 2006.229.03:30:56.20#ibcon#about to read 3, iclass 6, count 0 2006.229.03:30:56.22#ibcon#read 3, iclass 6, count 0 2006.229.03:30:56.22#ibcon#about to read 4, iclass 6, count 0 2006.229.03:30:56.22#ibcon#read 4, iclass 6, count 0 2006.229.03:30:56.22#ibcon#about to read 5, iclass 6, count 0 2006.229.03:30:56.22#ibcon#read 5, iclass 6, count 0 2006.229.03:30:56.22#ibcon#about to read 6, iclass 6, count 0 2006.229.03:30:56.22#ibcon#read 6, iclass 6, count 0 2006.229.03:30:56.22#ibcon#end of sib2, iclass 6, count 0 2006.229.03:30:56.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:30:56.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:30:56.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:30:56.22#ibcon#*before write, iclass 6, count 0 2006.229.03:30:56.22#ibcon#enter sib2, iclass 6, count 0 2006.229.03:30:56.22#ibcon#flushed, iclass 6, count 0 2006.229.03:30:56.22#ibcon#about to write, iclass 6, count 0 2006.229.03:30:56.22#ibcon#wrote, iclass 6, count 0 2006.229.03:30:56.22#ibcon#about to read 3, iclass 6, count 0 2006.229.03:30:56.26#ibcon#read 3, iclass 6, count 0 2006.229.03:30:56.26#ibcon#about to read 4, iclass 6, count 0 2006.229.03:30:56.26#ibcon#read 4, iclass 6, count 0 2006.229.03:30:56.26#ibcon#about to read 5, iclass 6, count 0 2006.229.03:30:56.26#ibcon#read 5, iclass 6, count 0 2006.229.03:30:56.26#ibcon#about to read 6, iclass 6, count 0 2006.229.03:30:56.26#ibcon#read 6, iclass 6, count 0 2006.229.03:30:56.26#ibcon#end of sib2, iclass 6, count 0 2006.229.03:30:56.26#ibcon#*after write, iclass 6, count 0 2006.229.03:30:56.26#ibcon#*before return 0, iclass 6, count 0 2006.229.03:30:56.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:56.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:30:56.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:30:56.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:30:56.26$vck44/vb=5,4 2006.229.03:30:56.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.03:30:56.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.03:30:56.26#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:56.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:56.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:56.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:56.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.03:30:56.32#ibcon#first serial, iclass 10, count 2 2006.229.03:30:56.32#ibcon#enter sib2, iclass 10, count 2 2006.229.03:30:56.32#ibcon#flushed, iclass 10, count 2 2006.229.03:30:56.32#ibcon#about to write, iclass 10, count 2 2006.229.03:30:56.32#ibcon#wrote, iclass 10, count 2 2006.229.03:30:56.32#ibcon#about to read 3, iclass 10, count 2 2006.229.03:30:56.34#ibcon#read 3, iclass 10, count 2 2006.229.03:30:56.34#ibcon#about to read 4, iclass 10, count 2 2006.229.03:30:56.34#ibcon#read 4, iclass 10, count 2 2006.229.03:30:56.34#ibcon#about to read 5, iclass 10, count 2 2006.229.03:30:56.34#ibcon#read 5, iclass 10, count 2 2006.229.03:30:56.34#ibcon#about to read 6, iclass 10, count 2 2006.229.03:30:56.34#ibcon#read 6, iclass 10, count 2 2006.229.03:30:56.34#ibcon#end of sib2, iclass 10, count 2 2006.229.03:30:56.34#ibcon#*mode == 0, iclass 10, count 2 2006.229.03:30:56.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.03:30:56.34#ibcon#[27=AT05-04\r\n] 2006.229.03:30:56.34#ibcon#*before write, iclass 10, count 2 2006.229.03:30:56.34#ibcon#enter sib2, iclass 10, count 2 2006.229.03:30:56.34#ibcon#flushed, iclass 10, count 2 2006.229.03:30:56.34#ibcon#about to write, iclass 10, count 2 2006.229.03:30:56.34#ibcon#wrote, iclass 10, count 2 2006.229.03:30:56.34#ibcon#about to read 3, iclass 10, count 2 2006.229.03:30:56.37#ibcon#read 3, iclass 10, count 2 2006.229.03:30:56.37#ibcon#about to read 4, iclass 10, count 2 2006.229.03:30:56.37#ibcon#read 4, iclass 10, count 2 2006.229.03:30:56.37#ibcon#about to read 5, iclass 10, count 2 2006.229.03:30:56.37#ibcon#read 5, iclass 10, count 2 2006.229.03:30:56.37#ibcon#about to read 6, iclass 10, count 2 2006.229.03:30:56.37#ibcon#read 6, iclass 10, count 2 2006.229.03:30:56.37#ibcon#end of sib2, iclass 10, count 2 2006.229.03:30:56.37#ibcon#*after write, iclass 10, count 2 2006.229.03:30:56.37#ibcon#*before return 0, iclass 10, count 2 2006.229.03:30:56.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:56.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:30:56.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.03:30:56.37#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:56.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:56.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:56.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:56.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:30:56.49#ibcon#first serial, iclass 10, count 0 2006.229.03:30:56.49#ibcon#enter sib2, iclass 10, count 0 2006.229.03:30:56.49#ibcon#flushed, iclass 10, count 0 2006.229.03:30:56.49#ibcon#about to write, iclass 10, count 0 2006.229.03:30:56.49#ibcon#wrote, iclass 10, count 0 2006.229.03:30:56.49#ibcon#about to read 3, iclass 10, count 0 2006.229.03:30:56.51#ibcon#read 3, iclass 10, count 0 2006.229.03:30:56.51#ibcon#about to read 4, iclass 10, count 0 2006.229.03:30:56.51#ibcon#read 4, iclass 10, count 0 2006.229.03:30:56.51#ibcon#about to read 5, iclass 10, count 0 2006.229.03:30:56.51#ibcon#read 5, iclass 10, count 0 2006.229.03:30:56.51#ibcon#about to read 6, iclass 10, count 0 2006.229.03:30:56.51#ibcon#read 6, iclass 10, count 0 2006.229.03:30:56.51#ibcon#end of sib2, iclass 10, count 0 2006.229.03:30:56.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:30:56.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:30:56.51#ibcon#[27=USB\r\n] 2006.229.03:30:56.51#ibcon#*before write, iclass 10, count 0 2006.229.03:30:56.51#ibcon#enter sib2, iclass 10, count 0 2006.229.03:30:56.51#ibcon#flushed, iclass 10, count 0 2006.229.03:30:56.51#ibcon#about to write, iclass 10, count 0 2006.229.03:30:56.51#ibcon#wrote, iclass 10, count 0 2006.229.03:30:56.51#ibcon#about to read 3, iclass 10, count 0 2006.229.03:30:56.54#ibcon#read 3, iclass 10, count 0 2006.229.03:30:56.54#ibcon#about to read 4, iclass 10, count 0 2006.229.03:30:56.54#ibcon#read 4, iclass 10, count 0 2006.229.03:30:56.54#ibcon#about to read 5, iclass 10, count 0 2006.229.03:30:56.54#ibcon#read 5, iclass 10, count 0 2006.229.03:30:56.54#ibcon#about to read 6, iclass 10, count 0 2006.229.03:30:56.54#ibcon#read 6, iclass 10, count 0 2006.229.03:30:56.54#ibcon#end of sib2, iclass 10, count 0 2006.229.03:30:56.54#ibcon#*after write, iclass 10, count 0 2006.229.03:30:56.54#ibcon#*before return 0, iclass 10, count 0 2006.229.03:30:56.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:56.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:30:56.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:30:56.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:30:56.54$vck44/vblo=6,719.99 2006.229.03:30:56.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.03:30:56.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.03:30:56.54#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:56.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:56.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:56.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:56.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:30:56.54#ibcon#first serial, iclass 12, count 0 2006.229.03:30:56.54#ibcon#enter sib2, iclass 12, count 0 2006.229.03:30:56.54#ibcon#flushed, iclass 12, count 0 2006.229.03:30:56.54#ibcon#about to write, iclass 12, count 0 2006.229.03:30:56.54#ibcon#wrote, iclass 12, count 0 2006.229.03:30:56.54#ibcon#about to read 3, iclass 12, count 0 2006.229.03:30:56.56#ibcon#read 3, iclass 12, count 0 2006.229.03:30:56.56#ibcon#about to read 4, iclass 12, count 0 2006.229.03:30:56.56#ibcon#read 4, iclass 12, count 0 2006.229.03:30:56.56#ibcon#about to read 5, iclass 12, count 0 2006.229.03:30:56.56#ibcon#read 5, iclass 12, count 0 2006.229.03:30:56.56#ibcon#about to read 6, iclass 12, count 0 2006.229.03:30:56.56#ibcon#read 6, iclass 12, count 0 2006.229.03:30:56.56#ibcon#end of sib2, iclass 12, count 0 2006.229.03:30:56.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:30:56.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:30:56.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:30:56.56#ibcon#*before write, iclass 12, count 0 2006.229.03:30:56.56#ibcon#enter sib2, iclass 12, count 0 2006.229.03:30:56.56#ibcon#flushed, iclass 12, count 0 2006.229.03:30:56.56#ibcon#about to write, iclass 12, count 0 2006.229.03:30:56.56#ibcon#wrote, iclass 12, count 0 2006.229.03:30:56.56#ibcon#about to read 3, iclass 12, count 0 2006.229.03:30:56.60#ibcon#read 3, iclass 12, count 0 2006.229.03:30:56.60#ibcon#about to read 4, iclass 12, count 0 2006.229.03:30:56.60#ibcon#read 4, iclass 12, count 0 2006.229.03:30:56.60#ibcon#about to read 5, iclass 12, count 0 2006.229.03:30:56.60#ibcon#read 5, iclass 12, count 0 2006.229.03:30:56.60#ibcon#about to read 6, iclass 12, count 0 2006.229.03:30:56.60#ibcon#read 6, iclass 12, count 0 2006.229.03:30:56.60#ibcon#end of sib2, iclass 12, count 0 2006.229.03:30:56.60#ibcon#*after write, iclass 12, count 0 2006.229.03:30:56.60#ibcon#*before return 0, iclass 12, count 0 2006.229.03:30:56.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:56.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:30:56.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:30:56.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:30:56.60$vck44/vb=6,4 2006.229.03:30:56.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.03:30:56.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.03:30:56.60#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:56.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:56.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:56.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:56.66#ibcon#enter wrdev, iclass 14, count 2 2006.229.03:30:56.66#ibcon#first serial, iclass 14, count 2 2006.229.03:30:56.66#ibcon#enter sib2, iclass 14, count 2 2006.229.03:30:56.66#ibcon#flushed, iclass 14, count 2 2006.229.03:30:56.66#ibcon#about to write, iclass 14, count 2 2006.229.03:30:56.66#ibcon#wrote, iclass 14, count 2 2006.229.03:30:56.66#ibcon#about to read 3, iclass 14, count 2 2006.229.03:30:56.68#ibcon#read 3, iclass 14, count 2 2006.229.03:30:56.68#ibcon#about to read 4, iclass 14, count 2 2006.229.03:30:56.68#ibcon#read 4, iclass 14, count 2 2006.229.03:30:56.68#ibcon#about to read 5, iclass 14, count 2 2006.229.03:30:56.68#ibcon#read 5, iclass 14, count 2 2006.229.03:30:56.68#ibcon#about to read 6, iclass 14, count 2 2006.229.03:30:56.68#ibcon#read 6, iclass 14, count 2 2006.229.03:30:56.68#ibcon#end of sib2, iclass 14, count 2 2006.229.03:30:56.68#ibcon#*mode == 0, iclass 14, count 2 2006.229.03:30:56.68#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.03:30:56.68#ibcon#[27=AT06-04\r\n] 2006.229.03:30:56.68#ibcon#*before write, iclass 14, count 2 2006.229.03:30:56.68#ibcon#enter sib2, iclass 14, count 2 2006.229.03:30:56.68#ibcon#flushed, iclass 14, count 2 2006.229.03:30:56.68#ibcon#about to write, iclass 14, count 2 2006.229.03:30:56.68#ibcon#wrote, iclass 14, count 2 2006.229.03:30:56.68#ibcon#about to read 3, iclass 14, count 2 2006.229.03:30:56.71#ibcon#read 3, iclass 14, count 2 2006.229.03:30:56.71#ibcon#about to read 4, iclass 14, count 2 2006.229.03:30:56.71#ibcon#read 4, iclass 14, count 2 2006.229.03:30:56.71#ibcon#about to read 5, iclass 14, count 2 2006.229.03:30:56.71#ibcon#read 5, iclass 14, count 2 2006.229.03:30:56.71#ibcon#about to read 6, iclass 14, count 2 2006.229.03:30:56.71#ibcon#read 6, iclass 14, count 2 2006.229.03:30:56.71#ibcon#end of sib2, iclass 14, count 2 2006.229.03:30:56.71#ibcon#*after write, iclass 14, count 2 2006.229.03:30:56.71#ibcon#*before return 0, iclass 14, count 2 2006.229.03:30:56.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:56.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:30:56.71#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.03:30:56.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:56.71#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:56.83#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:56.83#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:56.83#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:30:56.83#ibcon#first serial, iclass 14, count 0 2006.229.03:30:56.83#ibcon#enter sib2, iclass 14, count 0 2006.229.03:30:56.83#ibcon#flushed, iclass 14, count 0 2006.229.03:30:56.83#ibcon#about to write, iclass 14, count 0 2006.229.03:30:56.83#ibcon#wrote, iclass 14, count 0 2006.229.03:30:56.83#ibcon#about to read 3, iclass 14, count 0 2006.229.03:30:56.85#ibcon#read 3, iclass 14, count 0 2006.229.03:30:56.85#ibcon#about to read 4, iclass 14, count 0 2006.229.03:30:56.85#ibcon#read 4, iclass 14, count 0 2006.229.03:30:56.85#ibcon#about to read 5, iclass 14, count 0 2006.229.03:30:56.85#ibcon#read 5, iclass 14, count 0 2006.229.03:30:56.85#ibcon#about to read 6, iclass 14, count 0 2006.229.03:30:56.85#ibcon#read 6, iclass 14, count 0 2006.229.03:30:56.85#ibcon#end of sib2, iclass 14, count 0 2006.229.03:30:56.85#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:30:56.85#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:30:56.85#ibcon#[27=USB\r\n] 2006.229.03:30:56.85#ibcon#*before write, iclass 14, count 0 2006.229.03:30:56.85#ibcon#enter sib2, iclass 14, count 0 2006.229.03:30:56.85#ibcon#flushed, iclass 14, count 0 2006.229.03:30:56.85#ibcon#about to write, iclass 14, count 0 2006.229.03:30:56.85#ibcon#wrote, iclass 14, count 0 2006.229.03:30:56.85#ibcon#about to read 3, iclass 14, count 0 2006.229.03:30:56.88#ibcon#read 3, iclass 14, count 0 2006.229.03:30:56.88#ibcon#about to read 4, iclass 14, count 0 2006.229.03:30:56.88#ibcon#read 4, iclass 14, count 0 2006.229.03:30:56.88#ibcon#about to read 5, iclass 14, count 0 2006.229.03:30:56.88#ibcon#read 5, iclass 14, count 0 2006.229.03:30:56.88#ibcon#about to read 6, iclass 14, count 0 2006.229.03:30:56.88#ibcon#read 6, iclass 14, count 0 2006.229.03:30:56.88#ibcon#end of sib2, iclass 14, count 0 2006.229.03:30:56.88#ibcon#*after write, iclass 14, count 0 2006.229.03:30:56.88#ibcon#*before return 0, iclass 14, count 0 2006.229.03:30:56.88#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:56.88#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:30:56.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:30:56.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:30:56.88$vck44/vblo=7,734.99 2006.229.03:30:56.88#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:30:56.88#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:30:56.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:56.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:56.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:56.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:56.88#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:30:56.88#ibcon#first serial, iclass 16, count 0 2006.229.03:30:56.88#ibcon#enter sib2, iclass 16, count 0 2006.229.03:30:56.88#ibcon#flushed, iclass 16, count 0 2006.229.03:30:56.88#ibcon#about to write, iclass 16, count 0 2006.229.03:30:56.88#ibcon#wrote, iclass 16, count 0 2006.229.03:30:56.88#ibcon#about to read 3, iclass 16, count 0 2006.229.03:30:56.90#ibcon#read 3, iclass 16, count 0 2006.229.03:30:56.90#ibcon#about to read 4, iclass 16, count 0 2006.229.03:30:56.90#ibcon#read 4, iclass 16, count 0 2006.229.03:30:56.90#ibcon#about to read 5, iclass 16, count 0 2006.229.03:30:56.90#ibcon#read 5, iclass 16, count 0 2006.229.03:30:56.90#ibcon#about to read 6, iclass 16, count 0 2006.229.03:30:56.90#ibcon#read 6, iclass 16, count 0 2006.229.03:30:56.90#ibcon#end of sib2, iclass 16, count 0 2006.229.03:30:56.90#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:30:56.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:30:56.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:30:56.90#ibcon#*before write, iclass 16, count 0 2006.229.03:30:56.90#ibcon#enter sib2, iclass 16, count 0 2006.229.03:30:56.90#ibcon#flushed, iclass 16, count 0 2006.229.03:30:56.90#ibcon#about to write, iclass 16, count 0 2006.229.03:30:56.90#ibcon#wrote, iclass 16, count 0 2006.229.03:30:56.90#ibcon#about to read 3, iclass 16, count 0 2006.229.03:30:56.94#ibcon#read 3, iclass 16, count 0 2006.229.03:30:56.94#ibcon#about to read 4, iclass 16, count 0 2006.229.03:30:56.94#ibcon#read 4, iclass 16, count 0 2006.229.03:30:56.94#ibcon#about to read 5, iclass 16, count 0 2006.229.03:30:56.94#ibcon#read 5, iclass 16, count 0 2006.229.03:30:56.94#ibcon#about to read 6, iclass 16, count 0 2006.229.03:30:56.94#ibcon#read 6, iclass 16, count 0 2006.229.03:30:56.94#ibcon#end of sib2, iclass 16, count 0 2006.229.03:30:56.94#ibcon#*after write, iclass 16, count 0 2006.229.03:30:56.94#ibcon#*before return 0, iclass 16, count 0 2006.229.03:30:56.94#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:56.94#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:30:56.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:30:56.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:30:56.94$vck44/vb=7,4 2006.229.03:30:56.94#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.03:30:56.94#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.03:30:56.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:56.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:57.00#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:57.00#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:57.00#ibcon#enter wrdev, iclass 18, count 2 2006.229.03:30:57.00#ibcon#first serial, iclass 18, count 2 2006.229.03:30:57.00#ibcon#enter sib2, iclass 18, count 2 2006.229.03:30:57.00#ibcon#flushed, iclass 18, count 2 2006.229.03:30:57.00#ibcon#about to write, iclass 18, count 2 2006.229.03:30:57.00#ibcon#wrote, iclass 18, count 2 2006.229.03:30:57.00#ibcon#about to read 3, iclass 18, count 2 2006.229.03:30:57.02#ibcon#read 3, iclass 18, count 2 2006.229.03:30:57.02#ibcon#about to read 4, iclass 18, count 2 2006.229.03:30:57.02#ibcon#read 4, iclass 18, count 2 2006.229.03:30:57.02#ibcon#about to read 5, iclass 18, count 2 2006.229.03:30:57.02#ibcon#read 5, iclass 18, count 2 2006.229.03:30:57.02#ibcon#about to read 6, iclass 18, count 2 2006.229.03:30:57.02#ibcon#read 6, iclass 18, count 2 2006.229.03:30:57.02#ibcon#end of sib2, iclass 18, count 2 2006.229.03:30:57.02#ibcon#*mode == 0, iclass 18, count 2 2006.229.03:30:57.02#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.03:30:57.02#ibcon#[27=AT07-04\r\n] 2006.229.03:30:57.02#ibcon#*before write, iclass 18, count 2 2006.229.03:30:57.02#ibcon#enter sib2, iclass 18, count 2 2006.229.03:30:57.02#ibcon#flushed, iclass 18, count 2 2006.229.03:30:57.02#ibcon#about to write, iclass 18, count 2 2006.229.03:30:57.02#ibcon#wrote, iclass 18, count 2 2006.229.03:30:57.02#ibcon#about to read 3, iclass 18, count 2 2006.229.03:30:57.05#ibcon#read 3, iclass 18, count 2 2006.229.03:30:57.05#ibcon#about to read 4, iclass 18, count 2 2006.229.03:30:57.05#ibcon#read 4, iclass 18, count 2 2006.229.03:30:57.05#ibcon#about to read 5, iclass 18, count 2 2006.229.03:30:57.05#ibcon#read 5, iclass 18, count 2 2006.229.03:30:57.05#ibcon#about to read 6, iclass 18, count 2 2006.229.03:30:57.05#ibcon#read 6, iclass 18, count 2 2006.229.03:30:57.05#ibcon#end of sib2, iclass 18, count 2 2006.229.03:30:57.05#ibcon#*after write, iclass 18, count 2 2006.229.03:30:57.05#ibcon#*before return 0, iclass 18, count 2 2006.229.03:30:57.05#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:57.05#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:30:57.05#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.03:30:57.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:57.05#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:57.17#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:57.17#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:57.17#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:30:57.17#ibcon#first serial, iclass 18, count 0 2006.229.03:30:57.17#ibcon#enter sib2, iclass 18, count 0 2006.229.03:30:57.17#ibcon#flushed, iclass 18, count 0 2006.229.03:30:57.17#ibcon#about to write, iclass 18, count 0 2006.229.03:30:57.17#ibcon#wrote, iclass 18, count 0 2006.229.03:30:57.17#ibcon#about to read 3, iclass 18, count 0 2006.229.03:30:57.19#ibcon#read 3, iclass 18, count 0 2006.229.03:30:57.19#ibcon#about to read 4, iclass 18, count 0 2006.229.03:30:57.19#ibcon#read 4, iclass 18, count 0 2006.229.03:30:57.19#ibcon#about to read 5, iclass 18, count 0 2006.229.03:30:57.19#ibcon#read 5, iclass 18, count 0 2006.229.03:30:57.19#ibcon#about to read 6, iclass 18, count 0 2006.229.03:30:57.19#ibcon#read 6, iclass 18, count 0 2006.229.03:30:57.19#ibcon#end of sib2, iclass 18, count 0 2006.229.03:30:57.19#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:30:57.19#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:30:57.19#ibcon#[27=USB\r\n] 2006.229.03:30:57.19#ibcon#*before write, iclass 18, count 0 2006.229.03:30:57.19#ibcon#enter sib2, iclass 18, count 0 2006.229.03:30:57.19#ibcon#flushed, iclass 18, count 0 2006.229.03:30:57.19#ibcon#about to write, iclass 18, count 0 2006.229.03:30:57.19#ibcon#wrote, iclass 18, count 0 2006.229.03:30:57.19#ibcon#about to read 3, iclass 18, count 0 2006.229.03:30:57.22#ibcon#read 3, iclass 18, count 0 2006.229.03:30:57.22#ibcon#about to read 4, iclass 18, count 0 2006.229.03:30:57.22#ibcon#read 4, iclass 18, count 0 2006.229.03:30:57.22#ibcon#about to read 5, iclass 18, count 0 2006.229.03:30:57.22#ibcon#read 5, iclass 18, count 0 2006.229.03:30:57.22#ibcon#about to read 6, iclass 18, count 0 2006.229.03:30:57.22#ibcon#read 6, iclass 18, count 0 2006.229.03:30:57.22#ibcon#end of sib2, iclass 18, count 0 2006.229.03:30:57.22#ibcon#*after write, iclass 18, count 0 2006.229.03:30:57.22#ibcon#*before return 0, iclass 18, count 0 2006.229.03:30:57.22#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:57.22#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:30:57.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:30:57.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:30:57.22$vck44/vblo=8,744.99 2006.229.03:30:57.22#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.03:30:57.22#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.03:30:57.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:30:57.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:57.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:57.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:57.22#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:30:57.22#ibcon#first serial, iclass 20, count 0 2006.229.03:30:57.22#ibcon#enter sib2, iclass 20, count 0 2006.229.03:30:57.22#ibcon#flushed, iclass 20, count 0 2006.229.03:30:57.22#ibcon#about to write, iclass 20, count 0 2006.229.03:30:57.22#ibcon#wrote, iclass 20, count 0 2006.229.03:30:57.22#ibcon#about to read 3, iclass 20, count 0 2006.229.03:30:57.24#ibcon#read 3, iclass 20, count 0 2006.229.03:30:57.24#ibcon#about to read 4, iclass 20, count 0 2006.229.03:30:57.24#ibcon#read 4, iclass 20, count 0 2006.229.03:30:57.24#ibcon#about to read 5, iclass 20, count 0 2006.229.03:30:57.24#ibcon#read 5, iclass 20, count 0 2006.229.03:30:57.24#ibcon#about to read 6, iclass 20, count 0 2006.229.03:30:57.24#ibcon#read 6, iclass 20, count 0 2006.229.03:30:57.24#ibcon#end of sib2, iclass 20, count 0 2006.229.03:30:57.24#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:30:57.24#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:30:57.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:30:57.24#ibcon#*before write, iclass 20, count 0 2006.229.03:30:57.24#ibcon#enter sib2, iclass 20, count 0 2006.229.03:30:57.24#ibcon#flushed, iclass 20, count 0 2006.229.03:30:57.24#ibcon#about to write, iclass 20, count 0 2006.229.03:30:57.24#ibcon#wrote, iclass 20, count 0 2006.229.03:30:57.24#ibcon#about to read 3, iclass 20, count 0 2006.229.03:30:57.28#ibcon#read 3, iclass 20, count 0 2006.229.03:30:57.28#ibcon#about to read 4, iclass 20, count 0 2006.229.03:30:57.28#ibcon#read 4, iclass 20, count 0 2006.229.03:30:57.28#ibcon#about to read 5, iclass 20, count 0 2006.229.03:30:57.28#ibcon#read 5, iclass 20, count 0 2006.229.03:30:57.28#ibcon#about to read 6, iclass 20, count 0 2006.229.03:30:57.28#ibcon#read 6, iclass 20, count 0 2006.229.03:30:57.28#ibcon#end of sib2, iclass 20, count 0 2006.229.03:30:57.28#ibcon#*after write, iclass 20, count 0 2006.229.03:30:57.28#ibcon#*before return 0, iclass 20, count 0 2006.229.03:30:57.28#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:57.28#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:30:57.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:30:57.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:30:57.28$vck44/vb=8,4 2006.229.03:30:57.28#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.03:30:57.28#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.03:30:57.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:30:57.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:57.34#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:57.34#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:57.34#ibcon#enter wrdev, iclass 22, count 2 2006.229.03:30:57.34#ibcon#first serial, iclass 22, count 2 2006.229.03:30:57.34#ibcon#enter sib2, iclass 22, count 2 2006.229.03:30:57.34#ibcon#flushed, iclass 22, count 2 2006.229.03:30:57.34#ibcon#about to write, iclass 22, count 2 2006.229.03:30:57.34#ibcon#wrote, iclass 22, count 2 2006.229.03:30:57.34#ibcon#about to read 3, iclass 22, count 2 2006.229.03:30:57.36#ibcon#read 3, iclass 22, count 2 2006.229.03:30:57.36#ibcon#about to read 4, iclass 22, count 2 2006.229.03:30:57.36#ibcon#read 4, iclass 22, count 2 2006.229.03:30:57.36#ibcon#about to read 5, iclass 22, count 2 2006.229.03:30:57.36#ibcon#read 5, iclass 22, count 2 2006.229.03:30:57.36#ibcon#about to read 6, iclass 22, count 2 2006.229.03:30:57.36#ibcon#read 6, iclass 22, count 2 2006.229.03:30:57.36#ibcon#end of sib2, iclass 22, count 2 2006.229.03:30:57.36#ibcon#*mode == 0, iclass 22, count 2 2006.229.03:30:57.36#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.03:30:57.36#ibcon#[27=AT08-04\r\n] 2006.229.03:30:57.36#ibcon#*before write, iclass 22, count 2 2006.229.03:30:57.36#ibcon#enter sib2, iclass 22, count 2 2006.229.03:30:57.36#ibcon#flushed, iclass 22, count 2 2006.229.03:30:57.36#ibcon#about to write, iclass 22, count 2 2006.229.03:30:57.36#ibcon#wrote, iclass 22, count 2 2006.229.03:30:57.36#ibcon#about to read 3, iclass 22, count 2 2006.229.03:30:57.39#ibcon#read 3, iclass 22, count 2 2006.229.03:30:57.39#ibcon#about to read 4, iclass 22, count 2 2006.229.03:30:57.39#ibcon#read 4, iclass 22, count 2 2006.229.03:30:57.39#ibcon#about to read 5, iclass 22, count 2 2006.229.03:30:57.39#ibcon#read 5, iclass 22, count 2 2006.229.03:30:57.39#ibcon#about to read 6, iclass 22, count 2 2006.229.03:30:57.39#ibcon#read 6, iclass 22, count 2 2006.229.03:30:57.39#ibcon#end of sib2, iclass 22, count 2 2006.229.03:30:57.39#ibcon#*after write, iclass 22, count 2 2006.229.03:30:57.39#ibcon#*before return 0, iclass 22, count 2 2006.229.03:30:57.39#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:57.39#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:30:57.39#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.03:30:57.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:30:57.39#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:57.51#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:57.51#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:57.51#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:30:57.51#ibcon#first serial, iclass 22, count 0 2006.229.03:30:57.51#ibcon#enter sib2, iclass 22, count 0 2006.229.03:30:57.51#ibcon#flushed, iclass 22, count 0 2006.229.03:30:57.51#ibcon#about to write, iclass 22, count 0 2006.229.03:30:57.51#ibcon#wrote, iclass 22, count 0 2006.229.03:30:57.51#ibcon#about to read 3, iclass 22, count 0 2006.229.03:30:57.53#ibcon#read 3, iclass 22, count 0 2006.229.03:30:57.53#ibcon#about to read 4, iclass 22, count 0 2006.229.03:30:57.53#ibcon#read 4, iclass 22, count 0 2006.229.03:30:57.53#ibcon#about to read 5, iclass 22, count 0 2006.229.03:30:57.53#ibcon#read 5, iclass 22, count 0 2006.229.03:30:57.53#ibcon#about to read 6, iclass 22, count 0 2006.229.03:30:57.53#ibcon#read 6, iclass 22, count 0 2006.229.03:30:57.53#ibcon#end of sib2, iclass 22, count 0 2006.229.03:30:57.53#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:30:57.53#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:30:57.53#ibcon#[27=USB\r\n] 2006.229.03:30:57.53#ibcon#*before write, iclass 22, count 0 2006.229.03:30:57.53#ibcon#enter sib2, iclass 22, count 0 2006.229.03:30:57.53#ibcon#flushed, iclass 22, count 0 2006.229.03:30:57.53#ibcon#about to write, iclass 22, count 0 2006.229.03:30:57.53#ibcon#wrote, iclass 22, count 0 2006.229.03:30:57.53#ibcon#about to read 3, iclass 22, count 0 2006.229.03:30:57.56#ibcon#read 3, iclass 22, count 0 2006.229.03:30:57.56#ibcon#about to read 4, iclass 22, count 0 2006.229.03:30:57.56#ibcon#read 4, iclass 22, count 0 2006.229.03:30:57.56#ibcon#about to read 5, iclass 22, count 0 2006.229.03:30:57.56#ibcon#read 5, iclass 22, count 0 2006.229.03:30:57.56#ibcon#about to read 6, iclass 22, count 0 2006.229.03:30:57.56#ibcon#read 6, iclass 22, count 0 2006.229.03:30:57.56#ibcon#end of sib2, iclass 22, count 0 2006.229.03:30:57.56#ibcon#*after write, iclass 22, count 0 2006.229.03:30:57.56#ibcon#*before return 0, iclass 22, count 0 2006.229.03:30:57.56#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:57.56#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:30:57.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:30:57.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:30:57.56$vck44/vabw=wide 2006.229.03:30:57.56#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.03:30:57.56#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.03:30:57.56#ibcon#ireg 8 cls_cnt 0 2006.229.03:30:57.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:57.56#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:57.56#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:57.56#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:30:57.56#ibcon#first serial, iclass 24, count 0 2006.229.03:30:57.56#ibcon#enter sib2, iclass 24, count 0 2006.229.03:30:57.56#ibcon#flushed, iclass 24, count 0 2006.229.03:30:57.56#ibcon#about to write, iclass 24, count 0 2006.229.03:30:57.56#ibcon#wrote, iclass 24, count 0 2006.229.03:30:57.56#ibcon#about to read 3, iclass 24, count 0 2006.229.03:30:57.58#ibcon#read 3, iclass 24, count 0 2006.229.03:30:57.58#ibcon#about to read 4, iclass 24, count 0 2006.229.03:30:57.58#ibcon#read 4, iclass 24, count 0 2006.229.03:30:57.58#ibcon#about to read 5, iclass 24, count 0 2006.229.03:30:57.58#ibcon#read 5, iclass 24, count 0 2006.229.03:30:57.58#ibcon#about to read 6, iclass 24, count 0 2006.229.03:30:57.58#ibcon#read 6, iclass 24, count 0 2006.229.03:30:57.58#ibcon#end of sib2, iclass 24, count 0 2006.229.03:30:57.58#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:30:57.58#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:30:57.58#ibcon#[25=BW32\r\n] 2006.229.03:30:57.58#ibcon#*before write, iclass 24, count 0 2006.229.03:30:57.58#ibcon#enter sib2, iclass 24, count 0 2006.229.03:30:57.58#ibcon#flushed, iclass 24, count 0 2006.229.03:30:57.58#ibcon#about to write, iclass 24, count 0 2006.229.03:30:57.58#ibcon#wrote, iclass 24, count 0 2006.229.03:30:57.58#ibcon#about to read 3, iclass 24, count 0 2006.229.03:30:57.61#ibcon#read 3, iclass 24, count 0 2006.229.03:30:57.61#ibcon#about to read 4, iclass 24, count 0 2006.229.03:30:57.61#ibcon#read 4, iclass 24, count 0 2006.229.03:30:57.61#ibcon#about to read 5, iclass 24, count 0 2006.229.03:30:57.61#ibcon#read 5, iclass 24, count 0 2006.229.03:30:57.61#ibcon#about to read 6, iclass 24, count 0 2006.229.03:30:57.61#ibcon#read 6, iclass 24, count 0 2006.229.03:30:57.61#ibcon#end of sib2, iclass 24, count 0 2006.229.03:30:57.61#ibcon#*after write, iclass 24, count 0 2006.229.03:30:57.61#ibcon#*before return 0, iclass 24, count 0 2006.229.03:30:57.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:57.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:30:57.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:30:57.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:30:57.61$vck44/vbbw=wide 2006.229.03:30:57.61#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.03:30:57.61#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.03:30:57.61#ibcon#ireg 8 cls_cnt 0 2006.229.03:30:57.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:30:57.68#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:30:57.68#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:30:57.68#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:30:57.68#ibcon#first serial, iclass 26, count 0 2006.229.03:30:57.68#ibcon#enter sib2, iclass 26, count 0 2006.229.03:30:57.68#ibcon#flushed, iclass 26, count 0 2006.229.03:30:57.68#ibcon#about to write, iclass 26, count 0 2006.229.03:30:57.68#ibcon#wrote, iclass 26, count 0 2006.229.03:30:57.68#ibcon#about to read 3, iclass 26, count 0 2006.229.03:30:57.70#ibcon#read 3, iclass 26, count 0 2006.229.03:30:57.70#ibcon#about to read 4, iclass 26, count 0 2006.229.03:30:57.70#ibcon#read 4, iclass 26, count 0 2006.229.03:30:57.70#ibcon#about to read 5, iclass 26, count 0 2006.229.03:30:57.70#ibcon#read 5, iclass 26, count 0 2006.229.03:30:57.70#ibcon#about to read 6, iclass 26, count 0 2006.229.03:30:57.70#ibcon#read 6, iclass 26, count 0 2006.229.03:30:57.70#ibcon#end of sib2, iclass 26, count 0 2006.229.03:30:57.70#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:30:57.70#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:30:57.70#ibcon#[27=BW32\r\n] 2006.229.03:30:57.70#ibcon#*before write, iclass 26, count 0 2006.229.03:30:57.70#ibcon#enter sib2, iclass 26, count 0 2006.229.03:30:57.70#ibcon#flushed, iclass 26, count 0 2006.229.03:30:57.70#ibcon#about to write, iclass 26, count 0 2006.229.03:30:57.70#ibcon#wrote, iclass 26, count 0 2006.229.03:30:57.70#ibcon#about to read 3, iclass 26, count 0 2006.229.03:30:57.73#ibcon#read 3, iclass 26, count 0 2006.229.03:30:57.73#ibcon#about to read 4, iclass 26, count 0 2006.229.03:30:57.73#ibcon#read 4, iclass 26, count 0 2006.229.03:30:57.73#ibcon#about to read 5, iclass 26, count 0 2006.229.03:30:57.73#ibcon#read 5, iclass 26, count 0 2006.229.03:30:57.73#ibcon#about to read 6, iclass 26, count 0 2006.229.03:30:57.73#ibcon#read 6, iclass 26, count 0 2006.229.03:30:57.73#ibcon#end of sib2, iclass 26, count 0 2006.229.03:30:57.73#ibcon#*after write, iclass 26, count 0 2006.229.03:30:57.73#ibcon#*before return 0, iclass 26, count 0 2006.229.03:30:57.73#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:30:57.73#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:30:57.73#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:30:57.73#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:30:57.73$setupk4/ifdk4 2006.229.03:30:57.73$ifdk4/lo= 2006.229.03:30:57.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:30:57.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:30:57.73$ifdk4/patch= 2006.229.03:30:57.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:30:57.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:30:57.73$setupk4/!*+20s 2006.229.03:31:03.02#abcon#<5=/04 2.7 4.6 29.21 971000.6\r\n> 2006.229.03:31:03.04#abcon#{5=INTERFACE CLEAR} 2006.229.03:31:03.10#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:31:04.14#trakl#Source acquired 2006.229.03:31:06.14#flagr#flagr/antenna,acquired 2006.229.03:31:12.24$setupk4/"tpicd 2006.229.03:31:12.24$setupk4/echo=off 2006.229.03:31:12.24$setupk4/xlog=off 2006.229.03:31:12.24:!2006.229.03:33:18 2006.229.03:33:18.00:preob 2006.229.03:33:19.14/onsource/TRACKING 2006.229.03:33:19.14:!2006.229.03:33:28 2006.229.03:33:28.00:"tape 2006.229.03:33:28.00:"st=record 2006.229.03:33:28.00:data_valid=on 2006.229.03:33:28.00:midob 2006.229.03:33:28.14/onsource/TRACKING 2006.229.03:33:28.14/wx/29.26,1000.6,98 2006.229.03:33:28.22/cable/+6.4094E-03 2006.229.03:33:29.31/va/01,08,usb,yes,31,34 2006.229.03:33:29.31/va/02,07,usb,yes,34,35 2006.229.03:33:29.31/va/03,06,usb,yes,42,45 2006.229.03:33:29.31/va/04,07,usb,yes,35,37 2006.229.03:33:29.31/va/05,04,usb,yes,31,32 2006.229.03:33:29.31/va/06,04,usb,yes,35,35 2006.229.03:33:29.31/va/07,05,usb,yes,31,32 2006.229.03:33:29.31/va/08,06,usb,yes,22,28 2006.229.03:33:29.54/valo/01,524.99,yes,locked 2006.229.03:33:29.54/valo/02,534.99,yes,locked 2006.229.03:33:29.54/valo/03,564.99,yes,locked 2006.229.03:33:29.54/valo/04,624.99,yes,locked 2006.229.03:33:29.54/valo/05,734.99,yes,locked 2006.229.03:33:29.54/valo/06,814.99,yes,locked 2006.229.03:33:29.54/valo/07,864.99,yes,locked 2006.229.03:33:29.54/valo/08,884.99,yes,locked 2006.229.03:33:30.63/vb/01,04,usb,yes,32,30 2006.229.03:33:30.63/vb/02,04,usb,yes,34,34 2006.229.03:33:30.63/vb/03,04,usb,yes,31,35 2006.229.03:33:30.63/vb/04,04,usb,yes,36,35 2006.229.03:33:30.63/vb/05,04,usb,yes,28,31 2006.229.03:33:30.63/vb/06,04,usb,yes,33,29 2006.229.03:33:30.63/vb/07,04,usb,yes,33,32 2006.229.03:33:30.63/vb/08,04,usb,yes,30,33 2006.229.03:33:30.87/vblo/01,629.99,yes,locked 2006.229.03:33:30.87/vblo/02,634.99,yes,locked 2006.229.03:33:30.87/vblo/03,649.99,yes,locked 2006.229.03:33:30.87/vblo/04,679.99,yes,locked 2006.229.03:33:30.87/vblo/05,709.99,yes,locked 2006.229.03:33:30.87/vblo/06,719.99,yes,locked 2006.229.03:33:30.87/vblo/07,734.99,yes,locked 2006.229.03:33:30.87/vblo/08,744.99,yes,locked 2006.229.03:33:31.02/vabw/8 2006.229.03:33:31.17/vbbw/8 2006.229.03:33:31.26/xfe/off,on,12.0 2006.229.03:33:31.63/ifatt/23,28,28,28 2006.229.03:33:32.08/fmout-gps/S +4.43E-07 2006.229.03:33:32.12:!2006.229.03:35:28 2006.229.03:35:28.00:data_valid=off 2006.229.03:35:28.00:"et 2006.229.03:35:28.00:!+3s 2006.229.03:35:31.01:"tape 2006.229.03:35:31.01:postob 2006.229.03:35:31.23/cable/+6.4104E-03 2006.229.03:35:31.23/wx/29.39,1000.6,96 2006.229.03:35:32.08/fmout-gps/S +4.42E-07 2006.229.03:35:32.08:scan_name=229-0339,jd0608,60 2006.229.03:35:32.08:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.03:35:32.13#flagr#flagr/antenna,new-source 2006.229.03:35:33.13:checkk5 2006.229.03:35:33.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:35:33.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:35:34.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:35:34.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:35:35.11/chk_obsdata//k5ts1/T2290333??a.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.03:35:35.50/chk_obsdata//k5ts2/T2290333??b.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.03:35:35.91/chk_obsdata//k5ts3/T2290333??c.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.03:35:36.30/chk_obsdata//k5ts4/T2290333??d.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.03:35:37.03/k5log//k5ts1_log_newline 2006.229.03:35:37.74/k5log//k5ts2_log_newline 2006.229.03:35:38.45/k5log//k5ts3_log_newline 2006.229.03:35:39.16/k5log//k5ts4_log_newline 2006.229.03:35:39.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:35:39.19:setupk4=1 2006.229.03:35:39.19$setupk4/echo=on 2006.229.03:35:39.19$setupk4/pcalon 2006.229.03:35:39.19$pcalon/"no phase cal control is implemented here 2006.229.03:35:39.19$setupk4/"tpicd=stop 2006.229.03:35:39.19$setupk4/"rec=synch_on 2006.229.03:35:39.19$setupk4/"rec_mode=128 2006.229.03:35:39.19$setupk4/!* 2006.229.03:35:39.19$setupk4/recpk4 2006.229.03:35:39.19$recpk4/recpatch= 2006.229.03:35:39.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:35:39.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:35:39.19$setupk4/vck44 2006.229.03:35:39.19$vck44/valo=1,524.99 2006.229.03:35:39.19#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.03:35:39.19#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.03:35:39.19#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:39.19#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:39.19#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:39.19#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:39.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:35:39.19#ibcon#first serial, iclass 35, count 0 2006.229.03:35:39.19#ibcon#enter sib2, iclass 35, count 0 2006.229.03:35:39.19#ibcon#flushed, iclass 35, count 0 2006.229.03:35:39.19#ibcon#about to write, iclass 35, count 0 2006.229.03:35:39.19#ibcon#wrote, iclass 35, count 0 2006.229.03:35:39.19#ibcon#about to read 3, iclass 35, count 0 2006.229.03:35:39.21#ibcon#read 3, iclass 35, count 0 2006.229.03:35:39.21#ibcon#about to read 4, iclass 35, count 0 2006.229.03:35:39.21#ibcon#read 4, iclass 35, count 0 2006.229.03:35:39.21#ibcon#about to read 5, iclass 35, count 0 2006.229.03:35:39.21#ibcon#read 5, iclass 35, count 0 2006.229.03:35:39.21#ibcon#about to read 6, iclass 35, count 0 2006.229.03:35:39.21#ibcon#read 6, iclass 35, count 0 2006.229.03:35:39.21#ibcon#end of sib2, iclass 35, count 0 2006.229.03:35:39.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:35:39.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:35:39.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:35:39.21#ibcon#*before write, iclass 35, count 0 2006.229.03:35:39.21#ibcon#enter sib2, iclass 35, count 0 2006.229.03:35:39.21#ibcon#flushed, iclass 35, count 0 2006.229.03:35:39.21#ibcon#about to write, iclass 35, count 0 2006.229.03:35:39.21#ibcon#wrote, iclass 35, count 0 2006.229.03:35:39.21#ibcon#about to read 3, iclass 35, count 0 2006.229.03:35:39.26#ibcon#read 3, iclass 35, count 0 2006.229.03:35:39.26#ibcon#about to read 4, iclass 35, count 0 2006.229.03:35:39.26#ibcon#read 4, iclass 35, count 0 2006.229.03:35:39.26#ibcon#about to read 5, iclass 35, count 0 2006.229.03:35:39.26#ibcon#read 5, iclass 35, count 0 2006.229.03:35:39.26#ibcon#about to read 6, iclass 35, count 0 2006.229.03:35:39.26#ibcon#read 6, iclass 35, count 0 2006.229.03:35:39.26#ibcon#end of sib2, iclass 35, count 0 2006.229.03:35:39.26#ibcon#*after write, iclass 35, count 0 2006.229.03:35:39.26#ibcon#*before return 0, iclass 35, count 0 2006.229.03:35:39.26#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:39.26#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:39.26#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:35:39.26#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:35:39.26$vck44/va=1,8 2006.229.03:35:39.26#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.03:35:39.26#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.03:35:39.26#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:39.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:39.26#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:39.26#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:39.26#ibcon#enter wrdev, iclass 37, count 2 2006.229.03:35:39.26#ibcon#first serial, iclass 37, count 2 2006.229.03:35:39.26#ibcon#enter sib2, iclass 37, count 2 2006.229.03:35:39.26#ibcon#flushed, iclass 37, count 2 2006.229.03:35:39.26#ibcon#about to write, iclass 37, count 2 2006.229.03:35:39.26#ibcon#wrote, iclass 37, count 2 2006.229.03:35:39.26#ibcon#about to read 3, iclass 37, count 2 2006.229.03:35:39.28#ibcon#read 3, iclass 37, count 2 2006.229.03:35:39.28#ibcon#about to read 4, iclass 37, count 2 2006.229.03:35:39.28#ibcon#read 4, iclass 37, count 2 2006.229.03:35:39.28#ibcon#about to read 5, iclass 37, count 2 2006.229.03:35:39.28#ibcon#read 5, iclass 37, count 2 2006.229.03:35:39.28#ibcon#about to read 6, iclass 37, count 2 2006.229.03:35:39.28#ibcon#read 6, iclass 37, count 2 2006.229.03:35:39.28#ibcon#end of sib2, iclass 37, count 2 2006.229.03:35:39.28#ibcon#*mode == 0, iclass 37, count 2 2006.229.03:35:39.28#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.03:35:39.28#ibcon#[25=AT01-08\r\n] 2006.229.03:35:39.28#ibcon#*before write, iclass 37, count 2 2006.229.03:35:39.28#ibcon#enter sib2, iclass 37, count 2 2006.229.03:35:39.28#ibcon#flushed, iclass 37, count 2 2006.229.03:35:39.28#ibcon#about to write, iclass 37, count 2 2006.229.03:35:39.28#ibcon#wrote, iclass 37, count 2 2006.229.03:35:39.28#ibcon#about to read 3, iclass 37, count 2 2006.229.03:35:39.31#ibcon#read 3, iclass 37, count 2 2006.229.03:35:39.31#ibcon#about to read 4, iclass 37, count 2 2006.229.03:35:39.31#ibcon#read 4, iclass 37, count 2 2006.229.03:35:39.31#ibcon#about to read 5, iclass 37, count 2 2006.229.03:35:39.31#ibcon#read 5, iclass 37, count 2 2006.229.03:35:39.31#ibcon#about to read 6, iclass 37, count 2 2006.229.03:35:39.31#ibcon#read 6, iclass 37, count 2 2006.229.03:35:39.31#ibcon#end of sib2, iclass 37, count 2 2006.229.03:35:39.31#ibcon#*after write, iclass 37, count 2 2006.229.03:35:39.31#ibcon#*before return 0, iclass 37, count 2 2006.229.03:35:39.31#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:39.31#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:39.31#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.03:35:39.31#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:39.31#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:39.43#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:39.43#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:39.43#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:35:39.43#ibcon#first serial, iclass 37, count 0 2006.229.03:35:39.43#ibcon#enter sib2, iclass 37, count 0 2006.229.03:35:39.43#ibcon#flushed, iclass 37, count 0 2006.229.03:35:39.43#ibcon#about to write, iclass 37, count 0 2006.229.03:35:39.43#ibcon#wrote, iclass 37, count 0 2006.229.03:35:39.43#ibcon#about to read 3, iclass 37, count 0 2006.229.03:35:39.45#ibcon#read 3, iclass 37, count 0 2006.229.03:35:39.45#ibcon#about to read 4, iclass 37, count 0 2006.229.03:35:39.45#ibcon#read 4, iclass 37, count 0 2006.229.03:35:39.45#ibcon#about to read 5, iclass 37, count 0 2006.229.03:35:39.45#ibcon#read 5, iclass 37, count 0 2006.229.03:35:39.45#ibcon#about to read 6, iclass 37, count 0 2006.229.03:35:39.45#ibcon#read 6, iclass 37, count 0 2006.229.03:35:39.45#ibcon#end of sib2, iclass 37, count 0 2006.229.03:35:39.45#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:35:39.45#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:35:39.45#ibcon#[25=USB\r\n] 2006.229.03:35:39.45#ibcon#*before write, iclass 37, count 0 2006.229.03:35:39.45#ibcon#enter sib2, iclass 37, count 0 2006.229.03:35:39.45#ibcon#flushed, iclass 37, count 0 2006.229.03:35:39.45#ibcon#about to write, iclass 37, count 0 2006.229.03:35:39.45#ibcon#wrote, iclass 37, count 0 2006.229.03:35:39.45#ibcon#about to read 3, iclass 37, count 0 2006.229.03:35:39.48#ibcon#read 3, iclass 37, count 0 2006.229.03:35:39.48#ibcon#about to read 4, iclass 37, count 0 2006.229.03:35:39.48#ibcon#read 4, iclass 37, count 0 2006.229.03:35:39.48#ibcon#about to read 5, iclass 37, count 0 2006.229.03:35:39.48#ibcon#read 5, iclass 37, count 0 2006.229.03:35:39.48#ibcon#about to read 6, iclass 37, count 0 2006.229.03:35:39.48#ibcon#read 6, iclass 37, count 0 2006.229.03:35:39.48#ibcon#end of sib2, iclass 37, count 0 2006.229.03:35:39.48#ibcon#*after write, iclass 37, count 0 2006.229.03:35:39.48#ibcon#*before return 0, iclass 37, count 0 2006.229.03:35:39.48#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:39.48#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:39.48#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:35:39.48#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:35:39.48$vck44/valo=2,534.99 2006.229.03:35:39.48#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.03:35:39.48#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.03:35:39.48#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:39.48#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:39.48#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:39.48#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:39.48#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:35:39.48#ibcon#first serial, iclass 39, count 0 2006.229.03:35:39.48#ibcon#enter sib2, iclass 39, count 0 2006.229.03:35:39.48#ibcon#flushed, iclass 39, count 0 2006.229.03:35:39.48#ibcon#about to write, iclass 39, count 0 2006.229.03:35:39.48#ibcon#wrote, iclass 39, count 0 2006.229.03:35:39.48#ibcon#about to read 3, iclass 39, count 0 2006.229.03:35:39.50#ibcon#read 3, iclass 39, count 0 2006.229.03:35:39.50#ibcon#about to read 4, iclass 39, count 0 2006.229.03:35:39.50#ibcon#read 4, iclass 39, count 0 2006.229.03:35:39.50#ibcon#about to read 5, iclass 39, count 0 2006.229.03:35:39.50#ibcon#read 5, iclass 39, count 0 2006.229.03:35:39.50#ibcon#about to read 6, iclass 39, count 0 2006.229.03:35:39.50#ibcon#read 6, iclass 39, count 0 2006.229.03:35:39.50#ibcon#end of sib2, iclass 39, count 0 2006.229.03:35:39.50#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:35:39.50#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:35:39.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:35:39.50#ibcon#*before write, iclass 39, count 0 2006.229.03:35:39.50#ibcon#enter sib2, iclass 39, count 0 2006.229.03:35:39.50#ibcon#flushed, iclass 39, count 0 2006.229.03:35:39.50#ibcon#about to write, iclass 39, count 0 2006.229.03:35:39.50#ibcon#wrote, iclass 39, count 0 2006.229.03:35:39.50#ibcon#about to read 3, iclass 39, count 0 2006.229.03:35:39.54#ibcon#read 3, iclass 39, count 0 2006.229.03:35:39.54#ibcon#about to read 4, iclass 39, count 0 2006.229.03:35:39.54#ibcon#read 4, iclass 39, count 0 2006.229.03:35:39.54#ibcon#about to read 5, iclass 39, count 0 2006.229.03:35:39.54#ibcon#read 5, iclass 39, count 0 2006.229.03:35:39.54#ibcon#about to read 6, iclass 39, count 0 2006.229.03:35:39.54#ibcon#read 6, iclass 39, count 0 2006.229.03:35:39.54#ibcon#end of sib2, iclass 39, count 0 2006.229.03:35:39.54#ibcon#*after write, iclass 39, count 0 2006.229.03:35:39.54#ibcon#*before return 0, iclass 39, count 0 2006.229.03:35:39.54#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:39.54#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:39.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:35:39.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:35:39.54$vck44/va=2,7 2006.229.03:35:39.54#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.03:35:39.54#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.03:35:39.54#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:39.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:39.60#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:39.60#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:39.60#ibcon#enter wrdev, iclass 3, count 2 2006.229.03:35:39.60#ibcon#first serial, iclass 3, count 2 2006.229.03:35:39.60#ibcon#enter sib2, iclass 3, count 2 2006.229.03:35:39.60#ibcon#flushed, iclass 3, count 2 2006.229.03:35:39.60#ibcon#about to write, iclass 3, count 2 2006.229.03:35:39.60#ibcon#wrote, iclass 3, count 2 2006.229.03:35:39.60#ibcon#about to read 3, iclass 3, count 2 2006.229.03:35:39.62#ibcon#read 3, iclass 3, count 2 2006.229.03:35:39.62#ibcon#about to read 4, iclass 3, count 2 2006.229.03:35:39.62#ibcon#read 4, iclass 3, count 2 2006.229.03:35:39.62#ibcon#about to read 5, iclass 3, count 2 2006.229.03:35:39.62#ibcon#read 5, iclass 3, count 2 2006.229.03:35:39.62#ibcon#about to read 6, iclass 3, count 2 2006.229.03:35:39.62#ibcon#read 6, iclass 3, count 2 2006.229.03:35:39.62#ibcon#end of sib2, iclass 3, count 2 2006.229.03:35:39.62#ibcon#*mode == 0, iclass 3, count 2 2006.229.03:35:39.62#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.03:35:39.62#ibcon#[25=AT02-07\r\n] 2006.229.03:35:39.62#ibcon#*before write, iclass 3, count 2 2006.229.03:35:39.62#ibcon#enter sib2, iclass 3, count 2 2006.229.03:35:39.62#ibcon#flushed, iclass 3, count 2 2006.229.03:35:39.62#ibcon#about to write, iclass 3, count 2 2006.229.03:35:39.62#ibcon#wrote, iclass 3, count 2 2006.229.03:35:39.62#ibcon#about to read 3, iclass 3, count 2 2006.229.03:35:39.65#ibcon#read 3, iclass 3, count 2 2006.229.03:35:39.65#ibcon#about to read 4, iclass 3, count 2 2006.229.03:35:39.65#ibcon#read 4, iclass 3, count 2 2006.229.03:35:39.65#ibcon#about to read 5, iclass 3, count 2 2006.229.03:35:39.65#ibcon#read 5, iclass 3, count 2 2006.229.03:35:39.65#ibcon#about to read 6, iclass 3, count 2 2006.229.03:35:39.65#ibcon#read 6, iclass 3, count 2 2006.229.03:35:39.65#ibcon#end of sib2, iclass 3, count 2 2006.229.03:35:39.65#ibcon#*after write, iclass 3, count 2 2006.229.03:35:39.65#ibcon#*before return 0, iclass 3, count 2 2006.229.03:35:39.65#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:39.65#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:39.65#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.03:35:39.65#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:39.65#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:39.77#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:39.77#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:39.77#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:35:39.77#ibcon#first serial, iclass 3, count 0 2006.229.03:35:39.77#ibcon#enter sib2, iclass 3, count 0 2006.229.03:35:39.77#ibcon#flushed, iclass 3, count 0 2006.229.03:35:39.77#ibcon#about to write, iclass 3, count 0 2006.229.03:35:39.77#ibcon#wrote, iclass 3, count 0 2006.229.03:35:39.77#ibcon#about to read 3, iclass 3, count 0 2006.229.03:35:39.79#ibcon#read 3, iclass 3, count 0 2006.229.03:35:39.79#ibcon#about to read 4, iclass 3, count 0 2006.229.03:35:39.79#ibcon#read 4, iclass 3, count 0 2006.229.03:35:39.79#ibcon#about to read 5, iclass 3, count 0 2006.229.03:35:39.79#ibcon#read 5, iclass 3, count 0 2006.229.03:35:39.79#ibcon#about to read 6, iclass 3, count 0 2006.229.03:35:39.79#ibcon#read 6, iclass 3, count 0 2006.229.03:35:39.79#ibcon#end of sib2, iclass 3, count 0 2006.229.03:35:39.79#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:35:39.79#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:35:39.79#ibcon#[25=USB\r\n] 2006.229.03:35:39.79#ibcon#*before write, iclass 3, count 0 2006.229.03:35:39.79#ibcon#enter sib2, iclass 3, count 0 2006.229.03:35:39.79#ibcon#flushed, iclass 3, count 0 2006.229.03:35:39.79#ibcon#about to write, iclass 3, count 0 2006.229.03:35:39.79#ibcon#wrote, iclass 3, count 0 2006.229.03:35:39.79#ibcon#about to read 3, iclass 3, count 0 2006.229.03:35:39.82#ibcon#read 3, iclass 3, count 0 2006.229.03:35:39.82#ibcon#about to read 4, iclass 3, count 0 2006.229.03:35:39.82#ibcon#read 4, iclass 3, count 0 2006.229.03:35:39.82#ibcon#about to read 5, iclass 3, count 0 2006.229.03:35:39.82#ibcon#read 5, iclass 3, count 0 2006.229.03:35:39.82#ibcon#about to read 6, iclass 3, count 0 2006.229.03:35:39.82#ibcon#read 6, iclass 3, count 0 2006.229.03:35:39.82#ibcon#end of sib2, iclass 3, count 0 2006.229.03:35:39.82#ibcon#*after write, iclass 3, count 0 2006.229.03:35:39.82#ibcon#*before return 0, iclass 3, count 0 2006.229.03:35:39.82#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:39.82#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:39.82#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:35:39.82#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:35:39.82$vck44/valo=3,564.99 2006.229.03:35:39.82#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.03:35:39.82#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.03:35:39.82#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:39.82#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:39.82#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:39.82#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:39.82#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:35:39.82#ibcon#first serial, iclass 5, count 0 2006.229.03:35:39.82#ibcon#enter sib2, iclass 5, count 0 2006.229.03:35:39.82#ibcon#flushed, iclass 5, count 0 2006.229.03:35:39.82#ibcon#about to write, iclass 5, count 0 2006.229.03:35:39.82#ibcon#wrote, iclass 5, count 0 2006.229.03:35:39.82#ibcon#about to read 3, iclass 5, count 0 2006.229.03:35:39.84#ibcon#read 3, iclass 5, count 0 2006.229.03:35:39.84#ibcon#about to read 4, iclass 5, count 0 2006.229.03:35:39.84#ibcon#read 4, iclass 5, count 0 2006.229.03:35:39.84#ibcon#about to read 5, iclass 5, count 0 2006.229.03:35:39.84#ibcon#read 5, iclass 5, count 0 2006.229.03:35:39.84#ibcon#about to read 6, iclass 5, count 0 2006.229.03:35:39.84#ibcon#read 6, iclass 5, count 0 2006.229.03:35:39.84#ibcon#end of sib2, iclass 5, count 0 2006.229.03:35:39.84#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:35:39.84#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:35:39.84#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:35:39.84#ibcon#*before write, iclass 5, count 0 2006.229.03:35:39.84#ibcon#enter sib2, iclass 5, count 0 2006.229.03:35:39.84#ibcon#flushed, iclass 5, count 0 2006.229.03:35:39.84#ibcon#about to write, iclass 5, count 0 2006.229.03:35:39.84#ibcon#wrote, iclass 5, count 0 2006.229.03:35:39.84#ibcon#about to read 3, iclass 5, count 0 2006.229.03:35:39.88#ibcon#read 3, iclass 5, count 0 2006.229.03:35:39.88#ibcon#about to read 4, iclass 5, count 0 2006.229.03:35:39.88#ibcon#read 4, iclass 5, count 0 2006.229.03:35:39.88#ibcon#about to read 5, iclass 5, count 0 2006.229.03:35:39.88#ibcon#read 5, iclass 5, count 0 2006.229.03:35:39.88#ibcon#about to read 6, iclass 5, count 0 2006.229.03:35:39.88#ibcon#read 6, iclass 5, count 0 2006.229.03:35:39.88#ibcon#end of sib2, iclass 5, count 0 2006.229.03:35:39.88#ibcon#*after write, iclass 5, count 0 2006.229.03:35:39.88#ibcon#*before return 0, iclass 5, count 0 2006.229.03:35:39.88#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:39.88#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:39.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:35:39.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:35:39.88$vck44/va=3,6 2006.229.03:35:39.88#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.03:35:39.88#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.03:35:39.88#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:39.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:39.94#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:39.94#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:39.94#ibcon#enter wrdev, iclass 7, count 2 2006.229.03:35:39.94#ibcon#first serial, iclass 7, count 2 2006.229.03:35:39.94#ibcon#enter sib2, iclass 7, count 2 2006.229.03:35:39.94#ibcon#flushed, iclass 7, count 2 2006.229.03:35:39.94#ibcon#about to write, iclass 7, count 2 2006.229.03:35:39.94#ibcon#wrote, iclass 7, count 2 2006.229.03:35:39.94#ibcon#about to read 3, iclass 7, count 2 2006.229.03:35:39.96#ibcon#read 3, iclass 7, count 2 2006.229.03:35:39.96#ibcon#about to read 4, iclass 7, count 2 2006.229.03:35:39.96#ibcon#read 4, iclass 7, count 2 2006.229.03:35:39.96#ibcon#about to read 5, iclass 7, count 2 2006.229.03:35:39.96#ibcon#read 5, iclass 7, count 2 2006.229.03:35:39.96#ibcon#about to read 6, iclass 7, count 2 2006.229.03:35:39.96#ibcon#read 6, iclass 7, count 2 2006.229.03:35:39.96#ibcon#end of sib2, iclass 7, count 2 2006.229.03:35:39.96#ibcon#*mode == 0, iclass 7, count 2 2006.229.03:35:39.96#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.03:35:39.96#ibcon#[25=AT03-06\r\n] 2006.229.03:35:39.96#ibcon#*before write, iclass 7, count 2 2006.229.03:35:39.96#ibcon#enter sib2, iclass 7, count 2 2006.229.03:35:39.96#ibcon#flushed, iclass 7, count 2 2006.229.03:35:39.96#ibcon#about to write, iclass 7, count 2 2006.229.03:35:39.96#ibcon#wrote, iclass 7, count 2 2006.229.03:35:39.96#ibcon#about to read 3, iclass 7, count 2 2006.229.03:35:39.99#ibcon#read 3, iclass 7, count 2 2006.229.03:35:39.99#ibcon#about to read 4, iclass 7, count 2 2006.229.03:35:39.99#ibcon#read 4, iclass 7, count 2 2006.229.03:35:39.99#ibcon#about to read 5, iclass 7, count 2 2006.229.03:35:39.99#ibcon#read 5, iclass 7, count 2 2006.229.03:35:39.99#ibcon#about to read 6, iclass 7, count 2 2006.229.03:35:39.99#ibcon#read 6, iclass 7, count 2 2006.229.03:35:39.99#ibcon#end of sib2, iclass 7, count 2 2006.229.03:35:39.99#ibcon#*after write, iclass 7, count 2 2006.229.03:35:39.99#ibcon#*before return 0, iclass 7, count 2 2006.229.03:35:39.99#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:39.99#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:39.99#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.03:35:39.99#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:39.99#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:40.11#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:40.11#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:40.11#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:35:40.11#ibcon#first serial, iclass 7, count 0 2006.229.03:35:40.11#ibcon#enter sib2, iclass 7, count 0 2006.229.03:35:40.11#ibcon#flushed, iclass 7, count 0 2006.229.03:35:40.11#ibcon#about to write, iclass 7, count 0 2006.229.03:35:40.11#ibcon#wrote, iclass 7, count 0 2006.229.03:35:40.11#ibcon#about to read 3, iclass 7, count 0 2006.229.03:35:40.13#ibcon#read 3, iclass 7, count 0 2006.229.03:35:40.13#ibcon#about to read 4, iclass 7, count 0 2006.229.03:35:40.13#ibcon#read 4, iclass 7, count 0 2006.229.03:35:40.13#ibcon#about to read 5, iclass 7, count 0 2006.229.03:35:40.13#ibcon#read 5, iclass 7, count 0 2006.229.03:35:40.13#ibcon#about to read 6, iclass 7, count 0 2006.229.03:35:40.13#ibcon#read 6, iclass 7, count 0 2006.229.03:35:40.13#ibcon#end of sib2, iclass 7, count 0 2006.229.03:35:40.13#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:35:40.13#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:35:40.13#ibcon#[25=USB\r\n] 2006.229.03:35:40.13#ibcon#*before write, iclass 7, count 0 2006.229.03:35:40.13#ibcon#enter sib2, iclass 7, count 0 2006.229.03:35:40.13#ibcon#flushed, iclass 7, count 0 2006.229.03:35:40.13#ibcon#about to write, iclass 7, count 0 2006.229.03:35:40.13#ibcon#wrote, iclass 7, count 0 2006.229.03:35:40.13#ibcon#about to read 3, iclass 7, count 0 2006.229.03:35:40.16#ibcon#read 3, iclass 7, count 0 2006.229.03:35:40.16#ibcon#about to read 4, iclass 7, count 0 2006.229.03:35:40.16#ibcon#read 4, iclass 7, count 0 2006.229.03:35:40.16#ibcon#about to read 5, iclass 7, count 0 2006.229.03:35:40.16#ibcon#read 5, iclass 7, count 0 2006.229.03:35:40.16#ibcon#about to read 6, iclass 7, count 0 2006.229.03:35:40.16#ibcon#read 6, iclass 7, count 0 2006.229.03:35:40.16#ibcon#end of sib2, iclass 7, count 0 2006.229.03:35:40.16#ibcon#*after write, iclass 7, count 0 2006.229.03:35:40.16#ibcon#*before return 0, iclass 7, count 0 2006.229.03:35:40.16#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:40.16#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:40.16#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:35:40.16#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:35:40.16$vck44/valo=4,624.99 2006.229.03:35:40.16#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.03:35:40.16#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.03:35:40.16#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:40.16#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:40.16#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:40.16#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:40.16#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:35:40.16#ibcon#first serial, iclass 11, count 0 2006.229.03:35:40.16#ibcon#enter sib2, iclass 11, count 0 2006.229.03:35:40.16#ibcon#flushed, iclass 11, count 0 2006.229.03:35:40.16#ibcon#about to write, iclass 11, count 0 2006.229.03:35:40.16#ibcon#wrote, iclass 11, count 0 2006.229.03:35:40.16#ibcon#about to read 3, iclass 11, count 0 2006.229.03:35:40.18#ibcon#read 3, iclass 11, count 0 2006.229.03:35:40.18#ibcon#about to read 4, iclass 11, count 0 2006.229.03:35:40.18#ibcon#read 4, iclass 11, count 0 2006.229.03:35:40.18#ibcon#about to read 5, iclass 11, count 0 2006.229.03:35:40.18#ibcon#read 5, iclass 11, count 0 2006.229.03:35:40.18#ibcon#about to read 6, iclass 11, count 0 2006.229.03:35:40.18#ibcon#read 6, iclass 11, count 0 2006.229.03:35:40.18#ibcon#end of sib2, iclass 11, count 0 2006.229.03:35:40.18#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:35:40.18#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:35:40.18#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:35:40.18#ibcon#*before write, iclass 11, count 0 2006.229.03:35:40.18#ibcon#enter sib2, iclass 11, count 0 2006.229.03:35:40.18#ibcon#flushed, iclass 11, count 0 2006.229.03:35:40.18#ibcon#about to write, iclass 11, count 0 2006.229.03:35:40.18#ibcon#wrote, iclass 11, count 0 2006.229.03:35:40.18#ibcon#about to read 3, iclass 11, count 0 2006.229.03:35:40.22#ibcon#read 3, iclass 11, count 0 2006.229.03:35:40.22#ibcon#about to read 4, iclass 11, count 0 2006.229.03:35:40.22#ibcon#read 4, iclass 11, count 0 2006.229.03:35:40.22#ibcon#about to read 5, iclass 11, count 0 2006.229.03:35:40.22#ibcon#read 5, iclass 11, count 0 2006.229.03:35:40.22#ibcon#about to read 6, iclass 11, count 0 2006.229.03:35:40.22#ibcon#read 6, iclass 11, count 0 2006.229.03:35:40.22#ibcon#end of sib2, iclass 11, count 0 2006.229.03:35:40.22#ibcon#*after write, iclass 11, count 0 2006.229.03:35:40.22#ibcon#*before return 0, iclass 11, count 0 2006.229.03:35:40.22#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:40.22#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:40.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:35:40.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:35:40.22$vck44/va=4,7 2006.229.03:35:40.22#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.03:35:40.22#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.03:35:40.22#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:40.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:40.28#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:40.28#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:40.28#ibcon#enter wrdev, iclass 13, count 2 2006.229.03:35:40.28#ibcon#first serial, iclass 13, count 2 2006.229.03:35:40.28#ibcon#enter sib2, iclass 13, count 2 2006.229.03:35:40.28#ibcon#flushed, iclass 13, count 2 2006.229.03:35:40.28#ibcon#about to write, iclass 13, count 2 2006.229.03:35:40.28#ibcon#wrote, iclass 13, count 2 2006.229.03:35:40.28#ibcon#about to read 3, iclass 13, count 2 2006.229.03:35:40.30#ibcon#read 3, iclass 13, count 2 2006.229.03:35:40.30#ibcon#about to read 4, iclass 13, count 2 2006.229.03:35:40.30#ibcon#read 4, iclass 13, count 2 2006.229.03:35:40.30#ibcon#about to read 5, iclass 13, count 2 2006.229.03:35:40.30#ibcon#read 5, iclass 13, count 2 2006.229.03:35:40.30#ibcon#about to read 6, iclass 13, count 2 2006.229.03:35:40.30#ibcon#read 6, iclass 13, count 2 2006.229.03:35:40.30#ibcon#end of sib2, iclass 13, count 2 2006.229.03:35:40.30#ibcon#*mode == 0, iclass 13, count 2 2006.229.03:35:40.30#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.03:35:40.30#ibcon#[25=AT04-07\r\n] 2006.229.03:35:40.30#ibcon#*before write, iclass 13, count 2 2006.229.03:35:40.30#ibcon#enter sib2, iclass 13, count 2 2006.229.03:35:40.30#ibcon#flushed, iclass 13, count 2 2006.229.03:35:40.30#ibcon#about to write, iclass 13, count 2 2006.229.03:35:40.30#ibcon#wrote, iclass 13, count 2 2006.229.03:35:40.30#ibcon#about to read 3, iclass 13, count 2 2006.229.03:35:40.33#ibcon#read 3, iclass 13, count 2 2006.229.03:35:40.33#ibcon#about to read 4, iclass 13, count 2 2006.229.03:35:40.33#ibcon#read 4, iclass 13, count 2 2006.229.03:35:40.33#ibcon#about to read 5, iclass 13, count 2 2006.229.03:35:40.33#ibcon#read 5, iclass 13, count 2 2006.229.03:35:40.33#ibcon#about to read 6, iclass 13, count 2 2006.229.03:35:40.33#ibcon#read 6, iclass 13, count 2 2006.229.03:35:40.33#ibcon#end of sib2, iclass 13, count 2 2006.229.03:35:40.33#ibcon#*after write, iclass 13, count 2 2006.229.03:35:40.33#ibcon#*before return 0, iclass 13, count 2 2006.229.03:35:40.33#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:40.33#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:40.33#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.03:35:40.33#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:40.33#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:40.45#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:40.45#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:40.45#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:35:40.45#ibcon#first serial, iclass 13, count 0 2006.229.03:35:40.45#ibcon#enter sib2, iclass 13, count 0 2006.229.03:35:40.45#ibcon#flushed, iclass 13, count 0 2006.229.03:35:40.45#ibcon#about to write, iclass 13, count 0 2006.229.03:35:40.45#ibcon#wrote, iclass 13, count 0 2006.229.03:35:40.45#ibcon#about to read 3, iclass 13, count 0 2006.229.03:35:40.47#ibcon#read 3, iclass 13, count 0 2006.229.03:35:40.47#ibcon#about to read 4, iclass 13, count 0 2006.229.03:35:40.47#ibcon#read 4, iclass 13, count 0 2006.229.03:35:40.47#ibcon#about to read 5, iclass 13, count 0 2006.229.03:35:40.47#ibcon#read 5, iclass 13, count 0 2006.229.03:35:40.47#ibcon#about to read 6, iclass 13, count 0 2006.229.03:35:40.47#ibcon#read 6, iclass 13, count 0 2006.229.03:35:40.47#ibcon#end of sib2, iclass 13, count 0 2006.229.03:35:40.47#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:35:40.47#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:35:40.47#ibcon#[25=USB\r\n] 2006.229.03:35:40.47#ibcon#*before write, iclass 13, count 0 2006.229.03:35:40.47#ibcon#enter sib2, iclass 13, count 0 2006.229.03:35:40.47#ibcon#flushed, iclass 13, count 0 2006.229.03:35:40.47#ibcon#about to write, iclass 13, count 0 2006.229.03:35:40.47#ibcon#wrote, iclass 13, count 0 2006.229.03:35:40.47#ibcon#about to read 3, iclass 13, count 0 2006.229.03:35:40.50#ibcon#read 3, iclass 13, count 0 2006.229.03:35:40.50#ibcon#about to read 4, iclass 13, count 0 2006.229.03:35:40.50#ibcon#read 4, iclass 13, count 0 2006.229.03:35:40.50#ibcon#about to read 5, iclass 13, count 0 2006.229.03:35:40.50#ibcon#read 5, iclass 13, count 0 2006.229.03:35:40.50#ibcon#about to read 6, iclass 13, count 0 2006.229.03:35:40.50#ibcon#read 6, iclass 13, count 0 2006.229.03:35:40.50#ibcon#end of sib2, iclass 13, count 0 2006.229.03:35:40.50#ibcon#*after write, iclass 13, count 0 2006.229.03:35:40.50#ibcon#*before return 0, iclass 13, count 0 2006.229.03:35:40.50#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:40.50#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:40.50#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:35:40.50#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:35:40.50$vck44/valo=5,734.99 2006.229.03:35:40.50#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.03:35:40.50#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.03:35:40.50#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:40.50#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:40.50#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:40.50#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:40.50#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:35:40.50#ibcon#first serial, iclass 15, count 0 2006.229.03:35:40.50#ibcon#enter sib2, iclass 15, count 0 2006.229.03:35:40.50#ibcon#flushed, iclass 15, count 0 2006.229.03:35:40.50#ibcon#about to write, iclass 15, count 0 2006.229.03:35:40.50#ibcon#wrote, iclass 15, count 0 2006.229.03:35:40.50#ibcon#about to read 3, iclass 15, count 0 2006.229.03:35:40.52#ibcon#read 3, iclass 15, count 0 2006.229.03:35:40.52#ibcon#about to read 4, iclass 15, count 0 2006.229.03:35:40.52#ibcon#read 4, iclass 15, count 0 2006.229.03:35:40.52#ibcon#about to read 5, iclass 15, count 0 2006.229.03:35:40.52#ibcon#read 5, iclass 15, count 0 2006.229.03:35:40.52#ibcon#about to read 6, iclass 15, count 0 2006.229.03:35:40.52#ibcon#read 6, iclass 15, count 0 2006.229.03:35:40.52#ibcon#end of sib2, iclass 15, count 0 2006.229.03:35:40.52#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:35:40.52#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:35:40.52#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:35:40.52#ibcon#*before write, iclass 15, count 0 2006.229.03:35:40.52#ibcon#enter sib2, iclass 15, count 0 2006.229.03:35:40.52#ibcon#flushed, iclass 15, count 0 2006.229.03:35:40.52#ibcon#about to write, iclass 15, count 0 2006.229.03:35:40.52#ibcon#wrote, iclass 15, count 0 2006.229.03:35:40.52#ibcon#about to read 3, iclass 15, count 0 2006.229.03:35:40.56#ibcon#read 3, iclass 15, count 0 2006.229.03:35:40.56#ibcon#about to read 4, iclass 15, count 0 2006.229.03:35:40.56#ibcon#read 4, iclass 15, count 0 2006.229.03:35:40.56#ibcon#about to read 5, iclass 15, count 0 2006.229.03:35:40.56#ibcon#read 5, iclass 15, count 0 2006.229.03:35:40.56#ibcon#about to read 6, iclass 15, count 0 2006.229.03:35:40.56#ibcon#read 6, iclass 15, count 0 2006.229.03:35:40.56#ibcon#end of sib2, iclass 15, count 0 2006.229.03:35:40.56#ibcon#*after write, iclass 15, count 0 2006.229.03:35:40.56#ibcon#*before return 0, iclass 15, count 0 2006.229.03:35:40.56#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:40.56#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:40.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:35:40.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:35:40.56$vck44/va=5,4 2006.229.03:35:40.56#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.03:35:40.56#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.03:35:40.56#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:40.56#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:40.62#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:40.62#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:40.62#ibcon#enter wrdev, iclass 17, count 2 2006.229.03:35:40.62#ibcon#first serial, iclass 17, count 2 2006.229.03:35:40.62#ibcon#enter sib2, iclass 17, count 2 2006.229.03:35:40.62#ibcon#flushed, iclass 17, count 2 2006.229.03:35:40.62#ibcon#about to write, iclass 17, count 2 2006.229.03:35:40.62#ibcon#wrote, iclass 17, count 2 2006.229.03:35:40.62#ibcon#about to read 3, iclass 17, count 2 2006.229.03:35:40.64#ibcon#read 3, iclass 17, count 2 2006.229.03:35:40.64#ibcon#about to read 4, iclass 17, count 2 2006.229.03:35:40.64#ibcon#read 4, iclass 17, count 2 2006.229.03:35:40.64#ibcon#about to read 5, iclass 17, count 2 2006.229.03:35:40.64#ibcon#read 5, iclass 17, count 2 2006.229.03:35:40.64#ibcon#about to read 6, iclass 17, count 2 2006.229.03:35:40.64#ibcon#read 6, iclass 17, count 2 2006.229.03:35:40.64#ibcon#end of sib2, iclass 17, count 2 2006.229.03:35:40.64#ibcon#*mode == 0, iclass 17, count 2 2006.229.03:35:40.64#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.03:35:40.64#ibcon#[25=AT05-04\r\n] 2006.229.03:35:40.64#ibcon#*before write, iclass 17, count 2 2006.229.03:35:40.64#ibcon#enter sib2, iclass 17, count 2 2006.229.03:35:40.64#ibcon#flushed, iclass 17, count 2 2006.229.03:35:40.64#ibcon#about to write, iclass 17, count 2 2006.229.03:35:40.64#ibcon#wrote, iclass 17, count 2 2006.229.03:35:40.64#ibcon#about to read 3, iclass 17, count 2 2006.229.03:35:40.67#ibcon#read 3, iclass 17, count 2 2006.229.03:35:40.67#ibcon#about to read 4, iclass 17, count 2 2006.229.03:35:40.67#ibcon#read 4, iclass 17, count 2 2006.229.03:35:40.67#ibcon#about to read 5, iclass 17, count 2 2006.229.03:35:40.67#ibcon#read 5, iclass 17, count 2 2006.229.03:35:40.67#ibcon#about to read 6, iclass 17, count 2 2006.229.03:35:40.67#ibcon#read 6, iclass 17, count 2 2006.229.03:35:40.67#ibcon#end of sib2, iclass 17, count 2 2006.229.03:35:40.67#ibcon#*after write, iclass 17, count 2 2006.229.03:35:40.67#ibcon#*before return 0, iclass 17, count 2 2006.229.03:35:40.67#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:40.67#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:40.67#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.03:35:40.67#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:40.67#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:40.79#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:40.79#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:40.79#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:35:40.79#ibcon#first serial, iclass 17, count 0 2006.229.03:35:40.79#ibcon#enter sib2, iclass 17, count 0 2006.229.03:35:40.79#ibcon#flushed, iclass 17, count 0 2006.229.03:35:40.79#ibcon#about to write, iclass 17, count 0 2006.229.03:35:40.79#ibcon#wrote, iclass 17, count 0 2006.229.03:35:40.79#ibcon#about to read 3, iclass 17, count 0 2006.229.03:35:40.81#ibcon#read 3, iclass 17, count 0 2006.229.03:35:40.81#ibcon#about to read 4, iclass 17, count 0 2006.229.03:35:40.81#ibcon#read 4, iclass 17, count 0 2006.229.03:35:40.81#ibcon#about to read 5, iclass 17, count 0 2006.229.03:35:40.81#ibcon#read 5, iclass 17, count 0 2006.229.03:35:40.81#ibcon#about to read 6, iclass 17, count 0 2006.229.03:35:40.81#ibcon#read 6, iclass 17, count 0 2006.229.03:35:40.81#ibcon#end of sib2, iclass 17, count 0 2006.229.03:35:40.81#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:35:40.81#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:35:40.81#ibcon#[25=USB\r\n] 2006.229.03:35:40.81#ibcon#*before write, iclass 17, count 0 2006.229.03:35:40.81#ibcon#enter sib2, iclass 17, count 0 2006.229.03:35:40.81#ibcon#flushed, iclass 17, count 0 2006.229.03:35:40.81#ibcon#about to write, iclass 17, count 0 2006.229.03:35:40.81#ibcon#wrote, iclass 17, count 0 2006.229.03:35:40.81#ibcon#about to read 3, iclass 17, count 0 2006.229.03:35:40.84#ibcon#read 3, iclass 17, count 0 2006.229.03:35:40.84#ibcon#about to read 4, iclass 17, count 0 2006.229.03:35:40.84#ibcon#read 4, iclass 17, count 0 2006.229.03:35:40.84#ibcon#about to read 5, iclass 17, count 0 2006.229.03:35:40.84#ibcon#read 5, iclass 17, count 0 2006.229.03:35:40.84#ibcon#about to read 6, iclass 17, count 0 2006.229.03:35:40.84#ibcon#read 6, iclass 17, count 0 2006.229.03:35:40.84#ibcon#end of sib2, iclass 17, count 0 2006.229.03:35:40.84#ibcon#*after write, iclass 17, count 0 2006.229.03:35:40.84#ibcon#*before return 0, iclass 17, count 0 2006.229.03:35:40.84#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:40.84#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:40.84#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:35:40.84#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:35:40.84$vck44/valo=6,814.99 2006.229.03:35:40.84#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.03:35:40.84#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.03:35:40.84#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:40.84#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:40.84#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:40.84#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:40.84#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:35:40.84#ibcon#first serial, iclass 19, count 0 2006.229.03:35:40.84#ibcon#enter sib2, iclass 19, count 0 2006.229.03:35:40.84#ibcon#flushed, iclass 19, count 0 2006.229.03:35:40.84#ibcon#about to write, iclass 19, count 0 2006.229.03:35:40.84#ibcon#wrote, iclass 19, count 0 2006.229.03:35:40.84#ibcon#about to read 3, iclass 19, count 0 2006.229.03:35:40.86#ibcon#read 3, iclass 19, count 0 2006.229.03:35:40.86#ibcon#about to read 4, iclass 19, count 0 2006.229.03:35:40.86#ibcon#read 4, iclass 19, count 0 2006.229.03:35:40.86#ibcon#about to read 5, iclass 19, count 0 2006.229.03:35:40.86#ibcon#read 5, iclass 19, count 0 2006.229.03:35:40.86#ibcon#about to read 6, iclass 19, count 0 2006.229.03:35:40.86#ibcon#read 6, iclass 19, count 0 2006.229.03:35:40.86#ibcon#end of sib2, iclass 19, count 0 2006.229.03:35:40.86#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:35:40.86#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:35:40.86#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:35:40.86#ibcon#*before write, iclass 19, count 0 2006.229.03:35:40.86#ibcon#enter sib2, iclass 19, count 0 2006.229.03:35:40.86#ibcon#flushed, iclass 19, count 0 2006.229.03:35:40.86#ibcon#about to write, iclass 19, count 0 2006.229.03:35:40.86#ibcon#wrote, iclass 19, count 0 2006.229.03:35:40.86#ibcon#about to read 3, iclass 19, count 0 2006.229.03:35:40.90#ibcon#read 3, iclass 19, count 0 2006.229.03:35:40.90#ibcon#about to read 4, iclass 19, count 0 2006.229.03:35:40.90#ibcon#read 4, iclass 19, count 0 2006.229.03:35:40.90#ibcon#about to read 5, iclass 19, count 0 2006.229.03:35:40.90#ibcon#read 5, iclass 19, count 0 2006.229.03:35:40.90#ibcon#about to read 6, iclass 19, count 0 2006.229.03:35:40.90#ibcon#read 6, iclass 19, count 0 2006.229.03:35:40.90#ibcon#end of sib2, iclass 19, count 0 2006.229.03:35:40.90#ibcon#*after write, iclass 19, count 0 2006.229.03:35:40.90#ibcon#*before return 0, iclass 19, count 0 2006.229.03:35:40.90#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:40.90#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:40.90#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:35:40.90#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:35:40.90$vck44/va=6,4 2006.229.03:35:40.90#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.03:35:40.90#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.03:35:40.90#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:40.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:40.96#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:40.96#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:40.96#ibcon#enter wrdev, iclass 21, count 2 2006.229.03:35:40.96#ibcon#first serial, iclass 21, count 2 2006.229.03:35:40.96#ibcon#enter sib2, iclass 21, count 2 2006.229.03:35:40.96#ibcon#flushed, iclass 21, count 2 2006.229.03:35:40.96#ibcon#about to write, iclass 21, count 2 2006.229.03:35:40.96#ibcon#wrote, iclass 21, count 2 2006.229.03:35:40.96#ibcon#about to read 3, iclass 21, count 2 2006.229.03:35:40.98#ibcon#read 3, iclass 21, count 2 2006.229.03:35:40.98#ibcon#about to read 4, iclass 21, count 2 2006.229.03:35:40.98#ibcon#read 4, iclass 21, count 2 2006.229.03:35:40.98#ibcon#about to read 5, iclass 21, count 2 2006.229.03:35:40.98#ibcon#read 5, iclass 21, count 2 2006.229.03:35:40.98#ibcon#about to read 6, iclass 21, count 2 2006.229.03:35:40.98#ibcon#read 6, iclass 21, count 2 2006.229.03:35:40.98#ibcon#end of sib2, iclass 21, count 2 2006.229.03:35:40.98#ibcon#*mode == 0, iclass 21, count 2 2006.229.03:35:40.98#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.03:35:40.98#ibcon#[25=AT06-04\r\n] 2006.229.03:35:40.98#ibcon#*before write, iclass 21, count 2 2006.229.03:35:40.98#ibcon#enter sib2, iclass 21, count 2 2006.229.03:35:40.98#ibcon#flushed, iclass 21, count 2 2006.229.03:35:40.98#ibcon#about to write, iclass 21, count 2 2006.229.03:35:40.98#ibcon#wrote, iclass 21, count 2 2006.229.03:35:40.98#ibcon#about to read 3, iclass 21, count 2 2006.229.03:35:41.01#ibcon#read 3, iclass 21, count 2 2006.229.03:35:41.01#ibcon#about to read 4, iclass 21, count 2 2006.229.03:35:41.01#ibcon#read 4, iclass 21, count 2 2006.229.03:35:41.01#ibcon#about to read 5, iclass 21, count 2 2006.229.03:35:41.01#ibcon#read 5, iclass 21, count 2 2006.229.03:35:41.01#ibcon#about to read 6, iclass 21, count 2 2006.229.03:35:41.01#ibcon#read 6, iclass 21, count 2 2006.229.03:35:41.01#ibcon#end of sib2, iclass 21, count 2 2006.229.03:35:41.01#ibcon#*after write, iclass 21, count 2 2006.229.03:35:41.01#ibcon#*before return 0, iclass 21, count 2 2006.229.03:35:41.01#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:41.01#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:41.01#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.03:35:41.01#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:41.01#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:41.13#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:41.13#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:41.13#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:35:41.13#ibcon#first serial, iclass 21, count 0 2006.229.03:35:41.13#ibcon#enter sib2, iclass 21, count 0 2006.229.03:35:41.13#ibcon#flushed, iclass 21, count 0 2006.229.03:35:41.13#ibcon#about to write, iclass 21, count 0 2006.229.03:35:41.13#ibcon#wrote, iclass 21, count 0 2006.229.03:35:41.13#ibcon#about to read 3, iclass 21, count 0 2006.229.03:35:41.15#ibcon#read 3, iclass 21, count 0 2006.229.03:35:41.15#ibcon#about to read 4, iclass 21, count 0 2006.229.03:35:41.15#ibcon#read 4, iclass 21, count 0 2006.229.03:35:41.15#ibcon#about to read 5, iclass 21, count 0 2006.229.03:35:41.15#ibcon#read 5, iclass 21, count 0 2006.229.03:35:41.15#ibcon#about to read 6, iclass 21, count 0 2006.229.03:35:41.15#ibcon#read 6, iclass 21, count 0 2006.229.03:35:41.15#ibcon#end of sib2, iclass 21, count 0 2006.229.03:35:41.15#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:35:41.15#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:35:41.15#ibcon#[25=USB\r\n] 2006.229.03:35:41.15#ibcon#*before write, iclass 21, count 0 2006.229.03:35:41.15#ibcon#enter sib2, iclass 21, count 0 2006.229.03:35:41.15#ibcon#flushed, iclass 21, count 0 2006.229.03:35:41.15#ibcon#about to write, iclass 21, count 0 2006.229.03:35:41.15#ibcon#wrote, iclass 21, count 0 2006.229.03:35:41.15#ibcon#about to read 3, iclass 21, count 0 2006.229.03:35:41.18#ibcon#read 3, iclass 21, count 0 2006.229.03:35:41.18#ibcon#about to read 4, iclass 21, count 0 2006.229.03:35:41.18#ibcon#read 4, iclass 21, count 0 2006.229.03:35:41.18#ibcon#about to read 5, iclass 21, count 0 2006.229.03:35:41.18#ibcon#read 5, iclass 21, count 0 2006.229.03:35:41.18#ibcon#about to read 6, iclass 21, count 0 2006.229.03:35:41.18#ibcon#read 6, iclass 21, count 0 2006.229.03:35:41.18#ibcon#end of sib2, iclass 21, count 0 2006.229.03:35:41.18#ibcon#*after write, iclass 21, count 0 2006.229.03:35:41.18#ibcon#*before return 0, iclass 21, count 0 2006.229.03:35:41.18#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:41.18#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:41.18#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:35:41.18#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:35:41.18$vck44/valo=7,864.99 2006.229.03:35:41.18#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.03:35:41.18#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.03:35:41.18#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:41.18#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:41.18#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:41.18#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:41.18#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:35:41.18#ibcon#first serial, iclass 23, count 0 2006.229.03:35:41.18#ibcon#enter sib2, iclass 23, count 0 2006.229.03:35:41.18#ibcon#flushed, iclass 23, count 0 2006.229.03:35:41.18#ibcon#about to write, iclass 23, count 0 2006.229.03:35:41.18#ibcon#wrote, iclass 23, count 0 2006.229.03:35:41.18#ibcon#about to read 3, iclass 23, count 0 2006.229.03:35:41.20#ibcon#read 3, iclass 23, count 0 2006.229.03:35:41.20#ibcon#about to read 4, iclass 23, count 0 2006.229.03:35:41.20#ibcon#read 4, iclass 23, count 0 2006.229.03:35:41.20#ibcon#about to read 5, iclass 23, count 0 2006.229.03:35:41.20#ibcon#read 5, iclass 23, count 0 2006.229.03:35:41.20#ibcon#about to read 6, iclass 23, count 0 2006.229.03:35:41.20#ibcon#read 6, iclass 23, count 0 2006.229.03:35:41.20#ibcon#end of sib2, iclass 23, count 0 2006.229.03:35:41.20#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:35:41.20#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:35:41.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:35:41.20#ibcon#*before write, iclass 23, count 0 2006.229.03:35:41.20#ibcon#enter sib2, iclass 23, count 0 2006.229.03:35:41.20#ibcon#flushed, iclass 23, count 0 2006.229.03:35:41.20#ibcon#about to write, iclass 23, count 0 2006.229.03:35:41.20#ibcon#wrote, iclass 23, count 0 2006.229.03:35:41.20#ibcon#about to read 3, iclass 23, count 0 2006.229.03:35:41.24#ibcon#read 3, iclass 23, count 0 2006.229.03:35:41.24#ibcon#about to read 4, iclass 23, count 0 2006.229.03:35:41.24#ibcon#read 4, iclass 23, count 0 2006.229.03:35:41.24#ibcon#about to read 5, iclass 23, count 0 2006.229.03:35:41.24#ibcon#read 5, iclass 23, count 0 2006.229.03:35:41.24#ibcon#about to read 6, iclass 23, count 0 2006.229.03:35:41.24#ibcon#read 6, iclass 23, count 0 2006.229.03:35:41.24#ibcon#end of sib2, iclass 23, count 0 2006.229.03:35:41.24#ibcon#*after write, iclass 23, count 0 2006.229.03:35:41.24#ibcon#*before return 0, iclass 23, count 0 2006.229.03:35:41.24#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:41.24#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:41.24#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:35:41.24#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:35:41.24$vck44/va=7,5 2006.229.03:35:41.24#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.03:35:41.24#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.03:35:41.24#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:41.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:41.30#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:41.30#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:41.30#ibcon#enter wrdev, iclass 25, count 2 2006.229.03:35:41.30#ibcon#first serial, iclass 25, count 2 2006.229.03:35:41.30#ibcon#enter sib2, iclass 25, count 2 2006.229.03:35:41.30#ibcon#flushed, iclass 25, count 2 2006.229.03:35:41.30#ibcon#about to write, iclass 25, count 2 2006.229.03:35:41.30#ibcon#wrote, iclass 25, count 2 2006.229.03:35:41.30#ibcon#about to read 3, iclass 25, count 2 2006.229.03:35:41.32#ibcon#read 3, iclass 25, count 2 2006.229.03:35:41.32#ibcon#about to read 4, iclass 25, count 2 2006.229.03:35:41.32#ibcon#read 4, iclass 25, count 2 2006.229.03:35:41.32#ibcon#about to read 5, iclass 25, count 2 2006.229.03:35:41.32#ibcon#read 5, iclass 25, count 2 2006.229.03:35:41.32#ibcon#about to read 6, iclass 25, count 2 2006.229.03:35:41.32#ibcon#read 6, iclass 25, count 2 2006.229.03:35:41.32#ibcon#end of sib2, iclass 25, count 2 2006.229.03:35:41.32#ibcon#*mode == 0, iclass 25, count 2 2006.229.03:35:41.32#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.03:35:41.32#ibcon#[25=AT07-05\r\n] 2006.229.03:35:41.32#ibcon#*before write, iclass 25, count 2 2006.229.03:35:41.32#ibcon#enter sib2, iclass 25, count 2 2006.229.03:35:41.32#ibcon#flushed, iclass 25, count 2 2006.229.03:35:41.32#ibcon#about to write, iclass 25, count 2 2006.229.03:35:41.32#ibcon#wrote, iclass 25, count 2 2006.229.03:35:41.32#ibcon#about to read 3, iclass 25, count 2 2006.229.03:35:41.35#ibcon#read 3, iclass 25, count 2 2006.229.03:35:41.35#ibcon#about to read 4, iclass 25, count 2 2006.229.03:35:41.35#ibcon#read 4, iclass 25, count 2 2006.229.03:35:41.35#ibcon#about to read 5, iclass 25, count 2 2006.229.03:35:41.35#ibcon#read 5, iclass 25, count 2 2006.229.03:35:41.35#ibcon#about to read 6, iclass 25, count 2 2006.229.03:35:41.35#ibcon#read 6, iclass 25, count 2 2006.229.03:35:41.35#ibcon#end of sib2, iclass 25, count 2 2006.229.03:35:41.35#ibcon#*after write, iclass 25, count 2 2006.229.03:35:41.35#ibcon#*before return 0, iclass 25, count 2 2006.229.03:35:41.35#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:41.35#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:41.35#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.03:35:41.35#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:41.35#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:41.47#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:41.47#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:41.47#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:35:41.47#ibcon#first serial, iclass 25, count 0 2006.229.03:35:41.47#ibcon#enter sib2, iclass 25, count 0 2006.229.03:35:41.47#ibcon#flushed, iclass 25, count 0 2006.229.03:35:41.47#ibcon#about to write, iclass 25, count 0 2006.229.03:35:41.47#ibcon#wrote, iclass 25, count 0 2006.229.03:35:41.47#ibcon#about to read 3, iclass 25, count 0 2006.229.03:35:41.49#ibcon#read 3, iclass 25, count 0 2006.229.03:35:41.49#ibcon#about to read 4, iclass 25, count 0 2006.229.03:35:41.49#ibcon#read 4, iclass 25, count 0 2006.229.03:35:41.49#ibcon#about to read 5, iclass 25, count 0 2006.229.03:35:41.49#ibcon#read 5, iclass 25, count 0 2006.229.03:35:41.49#ibcon#about to read 6, iclass 25, count 0 2006.229.03:35:41.49#ibcon#read 6, iclass 25, count 0 2006.229.03:35:41.49#ibcon#end of sib2, iclass 25, count 0 2006.229.03:35:41.49#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:35:41.49#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:35:41.49#ibcon#[25=USB\r\n] 2006.229.03:35:41.49#ibcon#*before write, iclass 25, count 0 2006.229.03:35:41.49#ibcon#enter sib2, iclass 25, count 0 2006.229.03:35:41.49#ibcon#flushed, iclass 25, count 0 2006.229.03:35:41.49#ibcon#about to write, iclass 25, count 0 2006.229.03:35:41.49#ibcon#wrote, iclass 25, count 0 2006.229.03:35:41.49#ibcon#about to read 3, iclass 25, count 0 2006.229.03:35:41.52#ibcon#read 3, iclass 25, count 0 2006.229.03:35:41.52#ibcon#about to read 4, iclass 25, count 0 2006.229.03:35:41.52#ibcon#read 4, iclass 25, count 0 2006.229.03:35:41.52#ibcon#about to read 5, iclass 25, count 0 2006.229.03:35:41.52#ibcon#read 5, iclass 25, count 0 2006.229.03:35:41.52#ibcon#about to read 6, iclass 25, count 0 2006.229.03:35:41.52#ibcon#read 6, iclass 25, count 0 2006.229.03:35:41.52#ibcon#end of sib2, iclass 25, count 0 2006.229.03:35:41.52#ibcon#*after write, iclass 25, count 0 2006.229.03:35:41.52#ibcon#*before return 0, iclass 25, count 0 2006.229.03:35:41.52#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:41.52#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:41.52#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:35:41.52#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:35:41.52$vck44/valo=8,884.99 2006.229.03:35:41.52#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.03:35:41.52#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.03:35:41.52#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:41.52#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:41.52#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:41.52#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:41.52#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:35:41.52#ibcon#first serial, iclass 27, count 0 2006.229.03:35:41.52#ibcon#enter sib2, iclass 27, count 0 2006.229.03:35:41.52#ibcon#flushed, iclass 27, count 0 2006.229.03:35:41.52#ibcon#about to write, iclass 27, count 0 2006.229.03:35:41.52#ibcon#wrote, iclass 27, count 0 2006.229.03:35:41.52#ibcon#about to read 3, iclass 27, count 0 2006.229.03:35:41.54#ibcon#read 3, iclass 27, count 0 2006.229.03:35:41.54#ibcon#about to read 4, iclass 27, count 0 2006.229.03:35:41.54#ibcon#read 4, iclass 27, count 0 2006.229.03:35:41.54#ibcon#about to read 5, iclass 27, count 0 2006.229.03:35:41.54#ibcon#read 5, iclass 27, count 0 2006.229.03:35:41.54#ibcon#about to read 6, iclass 27, count 0 2006.229.03:35:41.54#ibcon#read 6, iclass 27, count 0 2006.229.03:35:41.54#ibcon#end of sib2, iclass 27, count 0 2006.229.03:35:41.54#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:35:41.54#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:35:41.54#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:35:41.54#ibcon#*before write, iclass 27, count 0 2006.229.03:35:41.54#ibcon#enter sib2, iclass 27, count 0 2006.229.03:35:41.54#ibcon#flushed, iclass 27, count 0 2006.229.03:35:41.54#ibcon#about to write, iclass 27, count 0 2006.229.03:35:41.54#ibcon#wrote, iclass 27, count 0 2006.229.03:35:41.54#ibcon#about to read 3, iclass 27, count 0 2006.229.03:35:41.58#ibcon#read 3, iclass 27, count 0 2006.229.03:35:41.58#ibcon#about to read 4, iclass 27, count 0 2006.229.03:35:41.58#ibcon#read 4, iclass 27, count 0 2006.229.03:35:41.58#ibcon#about to read 5, iclass 27, count 0 2006.229.03:35:41.58#ibcon#read 5, iclass 27, count 0 2006.229.03:35:41.58#ibcon#about to read 6, iclass 27, count 0 2006.229.03:35:41.58#ibcon#read 6, iclass 27, count 0 2006.229.03:35:41.58#ibcon#end of sib2, iclass 27, count 0 2006.229.03:35:41.58#ibcon#*after write, iclass 27, count 0 2006.229.03:35:41.58#ibcon#*before return 0, iclass 27, count 0 2006.229.03:35:41.58#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:41.58#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:41.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:35:41.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:35:41.58$vck44/va=8,6 2006.229.03:35:41.58#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.03:35:41.58#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.03:35:41.58#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:41.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:35:41.64#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:35:41.64#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:35:41.64#ibcon#enter wrdev, iclass 29, count 2 2006.229.03:35:41.64#ibcon#first serial, iclass 29, count 2 2006.229.03:35:41.64#ibcon#enter sib2, iclass 29, count 2 2006.229.03:35:41.64#ibcon#flushed, iclass 29, count 2 2006.229.03:35:41.64#ibcon#about to write, iclass 29, count 2 2006.229.03:35:41.64#ibcon#wrote, iclass 29, count 2 2006.229.03:35:41.64#ibcon#about to read 3, iclass 29, count 2 2006.229.03:35:41.66#ibcon#read 3, iclass 29, count 2 2006.229.03:35:41.66#ibcon#about to read 4, iclass 29, count 2 2006.229.03:35:41.66#ibcon#read 4, iclass 29, count 2 2006.229.03:35:41.66#ibcon#about to read 5, iclass 29, count 2 2006.229.03:35:41.66#ibcon#read 5, iclass 29, count 2 2006.229.03:35:41.66#ibcon#about to read 6, iclass 29, count 2 2006.229.03:35:41.66#ibcon#read 6, iclass 29, count 2 2006.229.03:35:41.66#ibcon#end of sib2, iclass 29, count 2 2006.229.03:35:41.66#ibcon#*mode == 0, iclass 29, count 2 2006.229.03:35:41.66#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.03:35:41.66#ibcon#[25=AT08-06\r\n] 2006.229.03:35:41.66#ibcon#*before write, iclass 29, count 2 2006.229.03:35:41.66#ibcon#enter sib2, iclass 29, count 2 2006.229.03:35:41.66#ibcon#flushed, iclass 29, count 2 2006.229.03:35:41.66#ibcon#about to write, iclass 29, count 2 2006.229.03:35:41.66#ibcon#wrote, iclass 29, count 2 2006.229.03:35:41.66#ibcon#about to read 3, iclass 29, count 2 2006.229.03:35:41.69#ibcon#read 3, iclass 29, count 2 2006.229.03:35:41.69#ibcon#about to read 4, iclass 29, count 2 2006.229.03:35:41.69#ibcon#read 4, iclass 29, count 2 2006.229.03:35:41.69#ibcon#about to read 5, iclass 29, count 2 2006.229.03:35:41.69#ibcon#read 5, iclass 29, count 2 2006.229.03:35:41.69#ibcon#about to read 6, iclass 29, count 2 2006.229.03:35:41.69#ibcon#read 6, iclass 29, count 2 2006.229.03:35:41.69#ibcon#end of sib2, iclass 29, count 2 2006.229.03:35:41.69#ibcon#*after write, iclass 29, count 2 2006.229.03:35:41.69#ibcon#*before return 0, iclass 29, count 2 2006.229.03:35:41.69#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:35:41.69#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.03:35:41.69#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.03:35:41.69#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:41.69#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:35:41.81#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:35:41.81#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:35:41.81#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:35:41.81#ibcon#first serial, iclass 29, count 0 2006.229.03:35:41.81#ibcon#enter sib2, iclass 29, count 0 2006.229.03:35:41.81#ibcon#flushed, iclass 29, count 0 2006.229.03:35:41.81#ibcon#about to write, iclass 29, count 0 2006.229.03:35:41.81#ibcon#wrote, iclass 29, count 0 2006.229.03:35:41.81#ibcon#about to read 3, iclass 29, count 0 2006.229.03:35:41.83#ibcon#read 3, iclass 29, count 0 2006.229.03:35:41.83#ibcon#about to read 4, iclass 29, count 0 2006.229.03:35:41.83#ibcon#read 4, iclass 29, count 0 2006.229.03:35:41.83#ibcon#about to read 5, iclass 29, count 0 2006.229.03:35:41.83#ibcon#read 5, iclass 29, count 0 2006.229.03:35:41.83#ibcon#about to read 6, iclass 29, count 0 2006.229.03:35:41.83#ibcon#read 6, iclass 29, count 0 2006.229.03:35:41.83#ibcon#end of sib2, iclass 29, count 0 2006.229.03:35:41.83#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:35:41.83#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:35:41.83#ibcon#[25=USB\r\n] 2006.229.03:35:41.83#ibcon#*before write, iclass 29, count 0 2006.229.03:35:41.83#ibcon#enter sib2, iclass 29, count 0 2006.229.03:35:41.83#ibcon#flushed, iclass 29, count 0 2006.229.03:35:41.83#ibcon#about to write, iclass 29, count 0 2006.229.03:35:41.83#ibcon#wrote, iclass 29, count 0 2006.229.03:35:41.83#ibcon#about to read 3, iclass 29, count 0 2006.229.03:35:41.86#ibcon#read 3, iclass 29, count 0 2006.229.03:35:41.86#ibcon#about to read 4, iclass 29, count 0 2006.229.03:35:41.86#ibcon#read 4, iclass 29, count 0 2006.229.03:35:41.86#ibcon#about to read 5, iclass 29, count 0 2006.229.03:35:41.86#ibcon#read 5, iclass 29, count 0 2006.229.03:35:41.86#ibcon#about to read 6, iclass 29, count 0 2006.229.03:35:41.86#ibcon#read 6, iclass 29, count 0 2006.229.03:35:41.86#ibcon#end of sib2, iclass 29, count 0 2006.229.03:35:41.86#ibcon#*after write, iclass 29, count 0 2006.229.03:35:41.86#ibcon#*before return 0, iclass 29, count 0 2006.229.03:35:41.86#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:35:41.86#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.03:35:41.86#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:35:41.86#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:35:41.86$vck44/vblo=1,629.99 2006.229.03:35:41.86#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.03:35:41.86#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.03:35:41.86#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:41.86#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:35:41.86#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:35:41.86#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:35:41.86#ibcon#enter wrdev, iclass 31, count 0 2006.229.03:35:41.86#ibcon#first serial, iclass 31, count 0 2006.229.03:35:41.86#ibcon#enter sib2, iclass 31, count 0 2006.229.03:35:41.86#ibcon#flushed, iclass 31, count 0 2006.229.03:35:41.86#ibcon#about to write, iclass 31, count 0 2006.229.03:35:41.86#ibcon#wrote, iclass 31, count 0 2006.229.03:35:41.86#ibcon#about to read 3, iclass 31, count 0 2006.229.03:35:41.89#ibcon#read 3, iclass 31, count 0 2006.229.03:35:41.89#ibcon#about to read 4, iclass 31, count 0 2006.229.03:35:41.89#ibcon#read 4, iclass 31, count 0 2006.229.03:35:41.89#ibcon#about to read 5, iclass 31, count 0 2006.229.03:35:41.89#ibcon#read 5, iclass 31, count 0 2006.229.03:35:41.89#ibcon#about to read 6, iclass 31, count 0 2006.229.03:35:41.89#ibcon#read 6, iclass 31, count 0 2006.229.03:35:41.89#ibcon#end of sib2, iclass 31, count 0 2006.229.03:35:41.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.03:35:41.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.03:35:41.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:35:41.89#ibcon#*before write, iclass 31, count 0 2006.229.03:35:41.89#ibcon#enter sib2, iclass 31, count 0 2006.229.03:35:41.89#ibcon#flushed, iclass 31, count 0 2006.229.03:35:41.89#ibcon#about to write, iclass 31, count 0 2006.229.03:35:41.89#ibcon#wrote, iclass 31, count 0 2006.229.03:35:41.89#ibcon#about to read 3, iclass 31, count 0 2006.229.03:35:41.93#ibcon#read 3, iclass 31, count 0 2006.229.03:35:41.93#ibcon#about to read 4, iclass 31, count 0 2006.229.03:35:41.93#ibcon#read 4, iclass 31, count 0 2006.229.03:35:41.93#ibcon#about to read 5, iclass 31, count 0 2006.229.03:35:41.93#ibcon#read 5, iclass 31, count 0 2006.229.03:35:41.93#ibcon#about to read 6, iclass 31, count 0 2006.229.03:35:41.93#ibcon#read 6, iclass 31, count 0 2006.229.03:35:41.93#ibcon#end of sib2, iclass 31, count 0 2006.229.03:35:41.93#ibcon#*after write, iclass 31, count 0 2006.229.03:35:41.93#ibcon#*before return 0, iclass 31, count 0 2006.229.03:35:41.93#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:35:41.93#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.03:35:41.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.03:35:41.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.03:35:41.93$vck44/vb=1,4 2006.229.03:35:41.93#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.03:35:41.93#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.03:35:41.93#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:41.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:35:41.93#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:35:41.93#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:35:41.93#ibcon#enter wrdev, iclass 33, count 2 2006.229.03:35:41.93#ibcon#first serial, iclass 33, count 2 2006.229.03:35:41.93#ibcon#enter sib2, iclass 33, count 2 2006.229.03:35:41.93#ibcon#flushed, iclass 33, count 2 2006.229.03:35:41.93#ibcon#about to write, iclass 33, count 2 2006.229.03:35:41.93#ibcon#wrote, iclass 33, count 2 2006.229.03:35:41.93#ibcon#about to read 3, iclass 33, count 2 2006.229.03:35:41.95#ibcon#read 3, iclass 33, count 2 2006.229.03:35:41.95#ibcon#about to read 4, iclass 33, count 2 2006.229.03:35:41.95#ibcon#read 4, iclass 33, count 2 2006.229.03:35:41.95#ibcon#about to read 5, iclass 33, count 2 2006.229.03:35:41.95#ibcon#read 5, iclass 33, count 2 2006.229.03:35:41.95#ibcon#about to read 6, iclass 33, count 2 2006.229.03:35:41.95#ibcon#read 6, iclass 33, count 2 2006.229.03:35:41.95#ibcon#end of sib2, iclass 33, count 2 2006.229.03:35:41.95#ibcon#*mode == 0, iclass 33, count 2 2006.229.03:35:41.95#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.03:35:41.95#ibcon#[27=AT01-04\r\n] 2006.229.03:35:41.95#ibcon#*before write, iclass 33, count 2 2006.229.03:35:41.95#ibcon#enter sib2, iclass 33, count 2 2006.229.03:35:41.95#ibcon#flushed, iclass 33, count 2 2006.229.03:35:41.95#ibcon#about to write, iclass 33, count 2 2006.229.03:35:41.95#ibcon#wrote, iclass 33, count 2 2006.229.03:35:41.95#ibcon#about to read 3, iclass 33, count 2 2006.229.03:35:41.98#ibcon#read 3, iclass 33, count 2 2006.229.03:35:41.98#ibcon#about to read 4, iclass 33, count 2 2006.229.03:35:41.98#ibcon#read 4, iclass 33, count 2 2006.229.03:35:41.98#ibcon#about to read 5, iclass 33, count 2 2006.229.03:35:41.98#ibcon#read 5, iclass 33, count 2 2006.229.03:35:41.98#ibcon#about to read 6, iclass 33, count 2 2006.229.03:35:41.98#ibcon#read 6, iclass 33, count 2 2006.229.03:35:41.98#ibcon#end of sib2, iclass 33, count 2 2006.229.03:35:41.98#ibcon#*after write, iclass 33, count 2 2006.229.03:35:41.98#ibcon#*before return 0, iclass 33, count 2 2006.229.03:35:41.98#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:35:41.98#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.03:35:41.98#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.03:35:41.98#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:41.98#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:35:42.10#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:35:42.10#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:35:42.10#ibcon#enter wrdev, iclass 33, count 0 2006.229.03:35:42.10#ibcon#first serial, iclass 33, count 0 2006.229.03:35:42.10#ibcon#enter sib2, iclass 33, count 0 2006.229.03:35:42.10#ibcon#flushed, iclass 33, count 0 2006.229.03:35:42.10#ibcon#about to write, iclass 33, count 0 2006.229.03:35:42.10#ibcon#wrote, iclass 33, count 0 2006.229.03:35:42.10#ibcon#about to read 3, iclass 33, count 0 2006.229.03:35:42.12#ibcon#read 3, iclass 33, count 0 2006.229.03:35:42.12#ibcon#about to read 4, iclass 33, count 0 2006.229.03:35:42.12#ibcon#read 4, iclass 33, count 0 2006.229.03:35:42.12#ibcon#about to read 5, iclass 33, count 0 2006.229.03:35:42.12#ibcon#read 5, iclass 33, count 0 2006.229.03:35:42.12#ibcon#about to read 6, iclass 33, count 0 2006.229.03:35:42.12#ibcon#read 6, iclass 33, count 0 2006.229.03:35:42.12#ibcon#end of sib2, iclass 33, count 0 2006.229.03:35:42.12#ibcon#*mode == 0, iclass 33, count 0 2006.229.03:35:42.12#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.03:35:42.12#ibcon#[27=USB\r\n] 2006.229.03:35:42.12#ibcon#*before write, iclass 33, count 0 2006.229.03:35:42.12#ibcon#enter sib2, iclass 33, count 0 2006.229.03:35:42.12#ibcon#flushed, iclass 33, count 0 2006.229.03:35:42.12#ibcon#about to write, iclass 33, count 0 2006.229.03:35:42.12#ibcon#wrote, iclass 33, count 0 2006.229.03:35:42.12#ibcon#about to read 3, iclass 33, count 0 2006.229.03:35:42.15#ibcon#read 3, iclass 33, count 0 2006.229.03:35:42.15#ibcon#about to read 4, iclass 33, count 0 2006.229.03:35:42.15#ibcon#read 4, iclass 33, count 0 2006.229.03:35:42.15#ibcon#about to read 5, iclass 33, count 0 2006.229.03:35:42.15#ibcon#read 5, iclass 33, count 0 2006.229.03:35:42.15#ibcon#about to read 6, iclass 33, count 0 2006.229.03:35:42.15#ibcon#read 6, iclass 33, count 0 2006.229.03:35:42.15#ibcon#end of sib2, iclass 33, count 0 2006.229.03:35:42.15#ibcon#*after write, iclass 33, count 0 2006.229.03:35:42.15#ibcon#*before return 0, iclass 33, count 0 2006.229.03:35:42.15#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:35:42.15#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.03:35:42.15#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.03:35:42.15#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.03:35:42.15$vck44/vblo=2,634.99 2006.229.03:35:42.15#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.03:35:42.15#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.03:35:42.15#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:42.15#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:42.15#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:42.15#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:42.15#ibcon#enter wrdev, iclass 35, count 0 2006.229.03:35:42.15#ibcon#first serial, iclass 35, count 0 2006.229.03:35:42.15#ibcon#enter sib2, iclass 35, count 0 2006.229.03:35:42.15#ibcon#flushed, iclass 35, count 0 2006.229.03:35:42.15#ibcon#about to write, iclass 35, count 0 2006.229.03:35:42.15#ibcon#wrote, iclass 35, count 0 2006.229.03:35:42.15#ibcon#about to read 3, iclass 35, count 0 2006.229.03:35:42.17#ibcon#read 3, iclass 35, count 0 2006.229.03:35:42.17#ibcon#about to read 4, iclass 35, count 0 2006.229.03:35:42.17#ibcon#read 4, iclass 35, count 0 2006.229.03:35:42.17#ibcon#about to read 5, iclass 35, count 0 2006.229.03:35:42.17#ibcon#read 5, iclass 35, count 0 2006.229.03:35:42.17#ibcon#about to read 6, iclass 35, count 0 2006.229.03:35:42.17#ibcon#read 6, iclass 35, count 0 2006.229.03:35:42.17#ibcon#end of sib2, iclass 35, count 0 2006.229.03:35:42.17#ibcon#*mode == 0, iclass 35, count 0 2006.229.03:35:42.17#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.03:35:42.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:35:42.17#ibcon#*before write, iclass 35, count 0 2006.229.03:35:42.17#ibcon#enter sib2, iclass 35, count 0 2006.229.03:35:42.17#ibcon#flushed, iclass 35, count 0 2006.229.03:35:42.17#ibcon#about to write, iclass 35, count 0 2006.229.03:35:42.17#ibcon#wrote, iclass 35, count 0 2006.229.03:35:42.17#ibcon#about to read 3, iclass 35, count 0 2006.229.03:35:42.21#ibcon#read 3, iclass 35, count 0 2006.229.03:35:42.21#ibcon#about to read 4, iclass 35, count 0 2006.229.03:35:42.21#ibcon#read 4, iclass 35, count 0 2006.229.03:35:42.21#ibcon#about to read 5, iclass 35, count 0 2006.229.03:35:42.21#ibcon#read 5, iclass 35, count 0 2006.229.03:35:42.21#ibcon#about to read 6, iclass 35, count 0 2006.229.03:35:42.21#ibcon#read 6, iclass 35, count 0 2006.229.03:35:42.21#ibcon#end of sib2, iclass 35, count 0 2006.229.03:35:42.21#ibcon#*after write, iclass 35, count 0 2006.229.03:35:42.21#ibcon#*before return 0, iclass 35, count 0 2006.229.03:35:42.21#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:42.21#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.03:35:42.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.03:35:42.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.03:35:42.21$vck44/vb=2,4 2006.229.03:35:42.21#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.03:35:42.21#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.03:35:42.21#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:42.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:42.27#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:42.27#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:42.27#ibcon#enter wrdev, iclass 37, count 2 2006.229.03:35:42.27#ibcon#first serial, iclass 37, count 2 2006.229.03:35:42.27#ibcon#enter sib2, iclass 37, count 2 2006.229.03:35:42.27#ibcon#flushed, iclass 37, count 2 2006.229.03:35:42.27#ibcon#about to write, iclass 37, count 2 2006.229.03:35:42.27#ibcon#wrote, iclass 37, count 2 2006.229.03:35:42.27#ibcon#about to read 3, iclass 37, count 2 2006.229.03:35:42.29#ibcon#read 3, iclass 37, count 2 2006.229.03:35:42.29#ibcon#about to read 4, iclass 37, count 2 2006.229.03:35:42.29#ibcon#read 4, iclass 37, count 2 2006.229.03:35:42.29#ibcon#about to read 5, iclass 37, count 2 2006.229.03:35:42.29#ibcon#read 5, iclass 37, count 2 2006.229.03:35:42.29#ibcon#about to read 6, iclass 37, count 2 2006.229.03:35:42.29#ibcon#read 6, iclass 37, count 2 2006.229.03:35:42.29#ibcon#end of sib2, iclass 37, count 2 2006.229.03:35:42.29#ibcon#*mode == 0, iclass 37, count 2 2006.229.03:35:42.29#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.03:35:42.29#ibcon#[27=AT02-04\r\n] 2006.229.03:35:42.29#ibcon#*before write, iclass 37, count 2 2006.229.03:35:42.29#ibcon#enter sib2, iclass 37, count 2 2006.229.03:35:42.29#ibcon#flushed, iclass 37, count 2 2006.229.03:35:42.29#ibcon#about to write, iclass 37, count 2 2006.229.03:35:42.29#ibcon#wrote, iclass 37, count 2 2006.229.03:35:42.29#ibcon#about to read 3, iclass 37, count 2 2006.229.03:35:42.32#ibcon#read 3, iclass 37, count 2 2006.229.03:35:42.32#ibcon#about to read 4, iclass 37, count 2 2006.229.03:35:42.32#ibcon#read 4, iclass 37, count 2 2006.229.03:35:42.32#ibcon#about to read 5, iclass 37, count 2 2006.229.03:35:42.32#ibcon#read 5, iclass 37, count 2 2006.229.03:35:42.32#ibcon#about to read 6, iclass 37, count 2 2006.229.03:35:42.32#ibcon#read 6, iclass 37, count 2 2006.229.03:35:42.32#ibcon#end of sib2, iclass 37, count 2 2006.229.03:35:42.32#ibcon#*after write, iclass 37, count 2 2006.229.03:35:42.32#ibcon#*before return 0, iclass 37, count 2 2006.229.03:35:42.32#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:42.32#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.03:35:42.32#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.03:35:42.32#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:42.32#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:42.44#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:42.44#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:42.44#ibcon#enter wrdev, iclass 37, count 0 2006.229.03:35:42.44#ibcon#first serial, iclass 37, count 0 2006.229.03:35:42.44#ibcon#enter sib2, iclass 37, count 0 2006.229.03:35:42.44#ibcon#flushed, iclass 37, count 0 2006.229.03:35:42.44#ibcon#about to write, iclass 37, count 0 2006.229.03:35:42.44#ibcon#wrote, iclass 37, count 0 2006.229.03:35:42.44#ibcon#about to read 3, iclass 37, count 0 2006.229.03:35:42.46#ibcon#read 3, iclass 37, count 0 2006.229.03:35:42.46#ibcon#about to read 4, iclass 37, count 0 2006.229.03:35:42.46#ibcon#read 4, iclass 37, count 0 2006.229.03:35:42.46#ibcon#about to read 5, iclass 37, count 0 2006.229.03:35:42.46#ibcon#read 5, iclass 37, count 0 2006.229.03:35:42.46#ibcon#about to read 6, iclass 37, count 0 2006.229.03:35:42.46#ibcon#read 6, iclass 37, count 0 2006.229.03:35:42.46#ibcon#end of sib2, iclass 37, count 0 2006.229.03:35:42.46#ibcon#*mode == 0, iclass 37, count 0 2006.229.03:35:42.46#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.03:35:42.46#ibcon#[27=USB\r\n] 2006.229.03:35:42.46#ibcon#*before write, iclass 37, count 0 2006.229.03:35:42.46#ibcon#enter sib2, iclass 37, count 0 2006.229.03:35:42.46#ibcon#flushed, iclass 37, count 0 2006.229.03:35:42.46#ibcon#about to write, iclass 37, count 0 2006.229.03:35:42.46#ibcon#wrote, iclass 37, count 0 2006.229.03:35:42.46#ibcon#about to read 3, iclass 37, count 0 2006.229.03:35:42.49#ibcon#read 3, iclass 37, count 0 2006.229.03:35:42.49#ibcon#about to read 4, iclass 37, count 0 2006.229.03:35:42.49#ibcon#read 4, iclass 37, count 0 2006.229.03:35:42.49#ibcon#about to read 5, iclass 37, count 0 2006.229.03:35:42.49#ibcon#read 5, iclass 37, count 0 2006.229.03:35:42.49#ibcon#about to read 6, iclass 37, count 0 2006.229.03:35:42.49#ibcon#read 6, iclass 37, count 0 2006.229.03:35:42.49#ibcon#end of sib2, iclass 37, count 0 2006.229.03:35:42.49#ibcon#*after write, iclass 37, count 0 2006.229.03:35:42.49#ibcon#*before return 0, iclass 37, count 0 2006.229.03:35:42.49#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:42.49#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.03:35:42.49#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.03:35:42.49#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.03:35:42.49$vck44/vblo=3,649.99 2006.229.03:35:42.49#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.03:35:42.49#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.03:35:42.49#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:42.49#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:42.49#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:42.49#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:42.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.03:35:42.49#ibcon#first serial, iclass 39, count 0 2006.229.03:35:42.49#ibcon#enter sib2, iclass 39, count 0 2006.229.03:35:42.49#ibcon#flushed, iclass 39, count 0 2006.229.03:35:42.49#ibcon#about to write, iclass 39, count 0 2006.229.03:35:42.49#ibcon#wrote, iclass 39, count 0 2006.229.03:35:42.49#ibcon#about to read 3, iclass 39, count 0 2006.229.03:35:42.51#ibcon#read 3, iclass 39, count 0 2006.229.03:35:42.51#ibcon#about to read 4, iclass 39, count 0 2006.229.03:35:42.51#ibcon#read 4, iclass 39, count 0 2006.229.03:35:42.51#ibcon#about to read 5, iclass 39, count 0 2006.229.03:35:42.51#ibcon#read 5, iclass 39, count 0 2006.229.03:35:42.51#ibcon#about to read 6, iclass 39, count 0 2006.229.03:35:42.51#ibcon#read 6, iclass 39, count 0 2006.229.03:35:42.51#ibcon#end of sib2, iclass 39, count 0 2006.229.03:35:42.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.03:35:42.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.03:35:42.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:35:42.51#ibcon#*before write, iclass 39, count 0 2006.229.03:35:42.51#ibcon#enter sib2, iclass 39, count 0 2006.229.03:35:42.51#ibcon#flushed, iclass 39, count 0 2006.229.03:35:42.51#ibcon#about to write, iclass 39, count 0 2006.229.03:35:42.51#ibcon#wrote, iclass 39, count 0 2006.229.03:35:42.51#ibcon#about to read 3, iclass 39, count 0 2006.229.03:35:42.55#ibcon#read 3, iclass 39, count 0 2006.229.03:35:42.55#ibcon#about to read 4, iclass 39, count 0 2006.229.03:35:42.55#ibcon#read 4, iclass 39, count 0 2006.229.03:35:42.55#ibcon#about to read 5, iclass 39, count 0 2006.229.03:35:42.55#ibcon#read 5, iclass 39, count 0 2006.229.03:35:42.55#ibcon#about to read 6, iclass 39, count 0 2006.229.03:35:42.55#ibcon#read 6, iclass 39, count 0 2006.229.03:35:42.55#ibcon#end of sib2, iclass 39, count 0 2006.229.03:35:42.55#ibcon#*after write, iclass 39, count 0 2006.229.03:35:42.55#ibcon#*before return 0, iclass 39, count 0 2006.229.03:35:42.55#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:42.55#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.03:35:42.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.03:35:42.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.03:35:42.55$vck44/vb=3,4 2006.229.03:35:42.55#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.03:35:42.55#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.03:35:42.55#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:42.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:42.61#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:42.61#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:42.61#ibcon#enter wrdev, iclass 3, count 2 2006.229.03:35:42.61#ibcon#first serial, iclass 3, count 2 2006.229.03:35:42.61#ibcon#enter sib2, iclass 3, count 2 2006.229.03:35:42.61#ibcon#flushed, iclass 3, count 2 2006.229.03:35:42.61#ibcon#about to write, iclass 3, count 2 2006.229.03:35:42.61#ibcon#wrote, iclass 3, count 2 2006.229.03:35:42.61#ibcon#about to read 3, iclass 3, count 2 2006.229.03:35:42.63#ibcon#read 3, iclass 3, count 2 2006.229.03:35:42.63#ibcon#about to read 4, iclass 3, count 2 2006.229.03:35:42.63#ibcon#read 4, iclass 3, count 2 2006.229.03:35:42.63#ibcon#about to read 5, iclass 3, count 2 2006.229.03:35:42.63#ibcon#read 5, iclass 3, count 2 2006.229.03:35:42.63#ibcon#about to read 6, iclass 3, count 2 2006.229.03:35:42.63#ibcon#read 6, iclass 3, count 2 2006.229.03:35:42.63#ibcon#end of sib2, iclass 3, count 2 2006.229.03:35:42.63#ibcon#*mode == 0, iclass 3, count 2 2006.229.03:35:42.63#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.03:35:42.63#ibcon#[27=AT03-04\r\n] 2006.229.03:35:42.63#ibcon#*before write, iclass 3, count 2 2006.229.03:35:42.63#ibcon#enter sib2, iclass 3, count 2 2006.229.03:35:42.63#ibcon#flushed, iclass 3, count 2 2006.229.03:35:42.63#ibcon#about to write, iclass 3, count 2 2006.229.03:35:42.63#ibcon#wrote, iclass 3, count 2 2006.229.03:35:42.63#ibcon#about to read 3, iclass 3, count 2 2006.229.03:35:42.66#ibcon#read 3, iclass 3, count 2 2006.229.03:35:42.66#ibcon#about to read 4, iclass 3, count 2 2006.229.03:35:42.66#ibcon#read 4, iclass 3, count 2 2006.229.03:35:42.66#ibcon#about to read 5, iclass 3, count 2 2006.229.03:35:42.66#ibcon#read 5, iclass 3, count 2 2006.229.03:35:42.66#ibcon#about to read 6, iclass 3, count 2 2006.229.03:35:42.66#ibcon#read 6, iclass 3, count 2 2006.229.03:35:42.66#ibcon#end of sib2, iclass 3, count 2 2006.229.03:35:42.66#ibcon#*after write, iclass 3, count 2 2006.229.03:35:42.66#ibcon#*before return 0, iclass 3, count 2 2006.229.03:35:42.66#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:42.66#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.03:35:42.66#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.03:35:42.66#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:42.66#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:42.78#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:42.78#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:42.78#ibcon#enter wrdev, iclass 3, count 0 2006.229.03:35:42.78#ibcon#first serial, iclass 3, count 0 2006.229.03:35:42.78#ibcon#enter sib2, iclass 3, count 0 2006.229.03:35:42.78#ibcon#flushed, iclass 3, count 0 2006.229.03:35:42.78#ibcon#about to write, iclass 3, count 0 2006.229.03:35:42.78#ibcon#wrote, iclass 3, count 0 2006.229.03:35:42.78#ibcon#about to read 3, iclass 3, count 0 2006.229.03:35:42.80#ibcon#read 3, iclass 3, count 0 2006.229.03:35:42.80#ibcon#about to read 4, iclass 3, count 0 2006.229.03:35:42.80#ibcon#read 4, iclass 3, count 0 2006.229.03:35:42.80#ibcon#about to read 5, iclass 3, count 0 2006.229.03:35:42.80#ibcon#read 5, iclass 3, count 0 2006.229.03:35:42.80#ibcon#about to read 6, iclass 3, count 0 2006.229.03:35:42.80#ibcon#read 6, iclass 3, count 0 2006.229.03:35:42.80#ibcon#end of sib2, iclass 3, count 0 2006.229.03:35:42.80#ibcon#*mode == 0, iclass 3, count 0 2006.229.03:35:42.80#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.03:35:42.80#ibcon#[27=USB\r\n] 2006.229.03:35:42.80#ibcon#*before write, iclass 3, count 0 2006.229.03:35:42.80#ibcon#enter sib2, iclass 3, count 0 2006.229.03:35:42.80#ibcon#flushed, iclass 3, count 0 2006.229.03:35:42.80#ibcon#about to write, iclass 3, count 0 2006.229.03:35:42.80#ibcon#wrote, iclass 3, count 0 2006.229.03:35:42.80#ibcon#about to read 3, iclass 3, count 0 2006.229.03:35:42.83#ibcon#read 3, iclass 3, count 0 2006.229.03:35:42.83#ibcon#about to read 4, iclass 3, count 0 2006.229.03:35:42.83#ibcon#read 4, iclass 3, count 0 2006.229.03:35:42.83#ibcon#about to read 5, iclass 3, count 0 2006.229.03:35:42.83#ibcon#read 5, iclass 3, count 0 2006.229.03:35:42.83#ibcon#about to read 6, iclass 3, count 0 2006.229.03:35:42.83#ibcon#read 6, iclass 3, count 0 2006.229.03:35:42.83#ibcon#end of sib2, iclass 3, count 0 2006.229.03:35:42.83#ibcon#*after write, iclass 3, count 0 2006.229.03:35:42.83#ibcon#*before return 0, iclass 3, count 0 2006.229.03:35:42.83#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:42.83#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.03:35:42.83#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.03:35:42.83#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.03:35:42.83$vck44/vblo=4,679.99 2006.229.03:35:42.83#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.03:35:42.83#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.03:35:42.83#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:42.83#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:42.83#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:42.83#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:42.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:35:42.83#ibcon#first serial, iclass 5, count 0 2006.229.03:35:42.83#ibcon#enter sib2, iclass 5, count 0 2006.229.03:35:42.83#ibcon#flushed, iclass 5, count 0 2006.229.03:35:42.83#ibcon#about to write, iclass 5, count 0 2006.229.03:35:42.83#ibcon#wrote, iclass 5, count 0 2006.229.03:35:42.83#ibcon#about to read 3, iclass 5, count 0 2006.229.03:35:42.85#ibcon#read 3, iclass 5, count 0 2006.229.03:35:42.85#ibcon#about to read 4, iclass 5, count 0 2006.229.03:35:42.85#ibcon#read 4, iclass 5, count 0 2006.229.03:35:42.85#ibcon#about to read 5, iclass 5, count 0 2006.229.03:35:42.85#ibcon#read 5, iclass 5, count 0 2006.229.03:35:42.85#ibcon#about to read 6, iclass 5, count 0 2006.229.03:35:42.85#ibcon#read 6, iclass 5, count 0 2006.229.03:35:42.85#ibcon#end of sib2, iclass 5, count 0 2006.229.03:35:42.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:35:42.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:35:42.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:35:42.85#ibcon#*before write, iclass 5, count 0 2006.229.03:35:42.85#ibcon#enter sib2, iclass 5, count 0 2006.229.03:35:42.85#ibcon#flushed, iclass 5, count 0 2006.229.03:35:42.85#ibcon#about to write, iclass 5, count 0 2006.229.03:35:42.85#ibcon#wrote, iclass 5, count 0 2006.229.03:35:42.85#ibcon#about to read 3, iclass 5, count 0 2006.229.03:35:42.89#ibcon#read 3, iclass 5, count 0 2006.229.03:35:42.89#ibcon#about to read 4, iclass 5, count 0 2006.229.03:35:42.89#ibcon#read 4, iclass 5, count 0 2006.229.03:35:42.89#ibcon#about to read 5, iclass 5, count 0 2006.229.03:35:42.89#ibcon#read 5, iclass 5, count 0 2006.229.03:35:42.89#ibcon#about to read 6, iclass 5, count 0 2006.229.03:35:42.89#ibcon#read 6, iclass 5, count 0 2006.229.03:35:42.89#ibcon#end of sib2, iclass 5, count 0 2006.229.03:35:42.89#ibcon#*after write, iclass 5, count 0 2006.229.03:35:42.89#ibcon#*before return 0, iclass 5, count 0 2006.229.03:35:42.89#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:42.89#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:35:42.89#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:35:42.89#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:35:42.89$vck44/vb=4,4 2006.229.03:35:42.89#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.03:35:42.89#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.03:35:42.89#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:42.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:42.95#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:42.95#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:42.95#ibcon#enter wrdev, iclass 7, count 2 2006.229.03:35:42.95#ibcon#first serial, iclass 7, count 2 2006.229.03:35:42.95#ibcon#enter sib2, iclass 7, count 2 2006.229.03:35:42.95#ibcon#flushed, iclass 7, count 2 2006.229.03:35:42.95#ibcon#about to write, iclass 7, count 2 2006.229.03:35:42.95#ibcon#wrote, iclass 7, count 2 2006.229.03:35:42.95#ibcon#about to read 3, iclass 7, count 2 2006.229.03:35:42.97#ibcon#read 3, iclass 7, count 2 2006.229.03:35:42.97#ibcon#about to read 4, iclass 7, count 2 2006.229.03:35:42.97#ibcon#read 4, iclass 7, count 2 2006.229.03:35:42.97#ibcon#about to read 5, iclass 7, count 2 2006.229.03:35:42.97#ibcon#read 5, iclass 7, count 2 2006.229.03:35:42.97#ibcon#about to read 6, iclass 7, count 2 2006.229.03:35:42.97#ibcon#read 6, iclass 7, count 2 2006.229.03:35:42.97#ibcon#end of sib2, iclass 7, count 2 2006.229.03:35:42.97#ibcon#*mode == 0, iclass 7, count 2 2006.229.03:35:42.97#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.03:35:42.97#ibcon#[27=AT04-04\r\n] 2006.229.03:35:42.97#ibcon#*before write, iclass 7, count 2 2006.229.03:35:42.97#ibcon#enter sib2, iclass 7, count 2 2006.229.03:35:42.97#ibcon#flushed, iclass 7, count 2 2006.229.03:35:42.97#ibcon#about to write, iclass 7, count 2 2006.229.03:35:42.97#ibcon#wrote, iclass 7, count 2 2006.229.03:35:42.97#ibcon#about to read 3, iclass 7, count 2 2006.229.03:35:43.00#ibcon#read 3, iclass 7, count 2 2006.229.03:35:43.00#ibcon#about to read 4, iclass 7, count 2 2006.229.03:35:43.00#ibcon#read 4, iclass 7, count 2 2006.229.03:35:43.00#ibcon#about to read 5, iclass 7, count 2 2006.229.03:35:43.00#ibcon#read 5, iclass 7, count 2 2006.229.03:35:43.00#ibcon#about to read 6, iclass 7, count 2 2006.229.03:35:43.00#ibcon#read 6, iclass 7, count 2 2006.229.03:35:43.00#ibcon#end of sib2, iclass 7, count 2 2006.229.03:35:43.00#ibcon#*after write, iclass 7, count 2 2006.229.03:35:43.00#ibcon#*before return 0, iclass 7, count 2 2006.229.03:35:43.00#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:43.00#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.03:35:43.00#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.03:35:43.00#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:43.00#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:43.12#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:43.12#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:43.12#ibcon#enter wrdev, iclass 7, count 0 2006.229.03:35:43.12#ibcon#first serial, iclass 7, count 0 2006.229.03:35:43.12#ibcon#enter sib2, iclass 7, count 0 2006.229.03:35:43.12#ibcon#flushed, iclass 7, count 0 2006.229.03:35:43.12#ibcon#about to write, iclass 7, count 0 2006.229.03:35:43.12#ibcon#wrote, iclass 7, count 0 2006.229.03:35:43.12#ibcon#about to read 3, iclass 7, count 0 2006.229.03:35:43.14#ibcon#read 3, iclass 7, count 0 2006.229.03:35:43.14#ibcon#about to read 4, iclass 7, count 0 2006.229.03:35:43.14#ibcon#read 4, iclass 7, count 0 2006.229.03:35:43.14#ibcon#about to read 5, iclass 7, count 0 2006.229.03:35:43.14#ibcon#read 5, iclass 7, count 0 2006.229.03:35:43.14#ibcon#about to read 6, iclass 7, count 0 2006.229.03:35:43.14#ibcon#read 6, iclass 7, count 0 2006.229.03:35:43.14#ibcon#end of sib2, iclass 7, count 0 2006.229.03:35:43.14#ibcon#*mode == 0, iclass 7, count 0 2006.229.03:35:43.14#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.03:35:43.14#ibcon#[27=USB\r\n] 2006.229.03:35:43.14#ibcon#*before write, iclass 7, count 0 2006.229.03:35:43.14#ibcon#enter sib2, iclass 7, count 0 2006.229.03:35:43.14#ibcon#flushed, iclass 7, count 0 2006.229.03:35:43.14#ibcon#about to write, iclass 7, count 0 2006.229.03:35:43.14#ibcon#wrote, iclass 7, count 0 2006.229.03:35:43.14#ibcon#about to read 3, iclass 7, count 0 2006.229.03:35:43.17#ibcon#read 3, iclass 7, count 0 2006.229.03:35:43.17#ibcon#about to read 4, iclass 7, count 0 2006.229.03:35:43.17#ibcon#read 4, iclass 7, count 0 2006.229.03:35:43.17#ibcon#about to read 5, iclass 7, count 0 2006.229.03:35:43.17#ibcon#read 5, iclass 7, count 0 2006.229.03:35:43.17#ibcon#about to read 6, iclass 7, count 0 2006.229.03:35:43.17#ibcon#read 6, iclass 7, count 0 2006.229.03:35:43.17#ibcon#end of sib2, iclass 7, count 0 2006.229.03:35:43.17#ibcon#*after write, iclass 7, count 0 2006.229.03:35:43.17#ibcon#*before return 0, iclass 7, count 0 2006.229.03:35:43.17#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:43.17#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.03:35:43.17#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.03:35:43.17#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.03:35:43.17$vck44/vblo=5,709.99 2006.229.03:35:43.17#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.03:35:43.17#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.03:35:43.17#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:43.17#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:43.17#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:43.17#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:43.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.03:35:43.17#ibcon#first serial, iclass 11, count 0 2006.229.03:35:43.17#ibcon#enter sib2, iclass 11, count 0 2006.229.03:35:43.17#ibcon#flushed, iclass 11, count 0 2006.229.03:35:43.17#ibcon#about to write, iclass 11, count 0 2006.229.03:35:43.17#ibcon#wrote, iclass 11, count 0 2006.229.03:35:43.17#ibcon#about to read 3, iclass 11, count 0 2006.229.03:35:43.19#ibcon#read 3, iclass 11, count 0 2006.229.03:35:43.19#ibcon#about to read 4, iclass 11, count 0 2006.229.03:35:43.19#ibcon#read 4, iclass 11, count 0 2006.229.03:35:43.19#ibcon#about to read 5, iclass 11, count 0 2006.229.03:35:43.19#ibcon#read 5, iclass 11, count 0 2006.229.03:35:43.19#ibcon#about to read 6, iclass 11, count 0 2006.229.03:35:43.19#ibcon#read 6, iclass 11, count 0 2006.229.03:35:43.19#ibcon#end of sib2, iclass 11, count 0 2006.229.03:35:43.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.03:35:43.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.03:35:43.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:35:43.19#ibcon#*before write, iclass 11, count 0 2006.229.03:35:43.19#ibcon#enter sib2, iclass 11, count 0 2006.229.03:35:43.19#ibcon#flushed, iclass 11, count 0 2006.229.03:35:43.19#ibcon#about to write, iclass 11, count 0 2006.229.03:35:43.19#ibcon#wrote, iclass 11, count 0 2006.229.03:35:43.19#ibcon#about to read 3, iclass 11, count 0 2006.229.03:35:43.23#ibcon#read 3, iclass 11, count 0 2006.229.03:35:43.23#ibcon#about to read 4, iclass 11, count 0 2006.229.03:35:43.23#ibcon#read 4, iclass 11, count 0 2006.229.03:35:43.23#ibcon#about to read 5, iclass 11, count 0 2006.229.03:35:43.23#ibcon#read 5, iclass 11, count 0 2006.229.03:35:43.23#ibcon#about to read 6, iclass 11, count 0 2006.229.03:35:43.23#ibcon#read 6, iclass 11, count 0 2006.229.03:35:43.23#ibcon#end of sib2, iclass 11, count 0 2006.229.03:35:43.23#ibcon#*after write, iclass 11, count 0 2006.229.03:35:43.23#ibcon#*before return 0, iclass 11, count 0 2006.229.03:35:43.23#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:43.23#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.03:35:43.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.03:35:43.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.03:35:43.23$vck44/vb=5,4 2006.229.03:35:43.23#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.03:35:43.23#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.03:35:43.23#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:43.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:43.29#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:43.29#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:43.29#ibcon#enter wrdev, iclass 13, count 2 2006.229.03:35:43.29#ibcon#first serial, iclass 13, count 2 2006.229.03:35:43.29#ibcon#enter sib2, iclass 13, count 2 2006.229.03:35:43.29#ibcon#flushed, iclass 13, count 2 2006.229.03:35:43.29#ibcon#about to write, iclass 13, count 2 2006.229.03:35:43.29#ibcon#wrote, iclass 13, count 2 2006.229.03:35:43.29#ibcon#about to read 3, iclass 13, count 2 2006.229.03:35:43.31#ibcon#read 3, iclass 13, count 2 2006.229.03:35:43.31#ibcon#about to read 4, iclass 13, count 2 2006.229.03:35:43.31#ibcon#read 4, iclass 13, count 2 2006.229.03:35:43.31#ibcon#about to read 5, iclass 13, count 2 2006.229.03:35:43.31#ibcon#read 5, iclass 13, count 2 2006.229.03:35:43.31#ibcon#about to read 6, iclass 13, count 2 2006.229.03:35:43.31#ibcon#read 6, iclass 13, count 2 2006.229.03:35:43.31#ibcon#end of sib2, iclass 13, count 2 2006.229.03:35:43.31#ibcon#*mode == 0, iclass 13, count 2 2006.229.03:35:43.31#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.03:35:43.31#ibcon#[27=AT05-04\r\n] 2006.229.03:35:43.31#ibcon#*before write, iclass 13, count 2 2006.229.03:35:43.31#ibcon#enter sib2, iclass 13, count 2 2006.229.03:35:43.31#ibcon#flushed, iclass 13, count 2 2006.229.03:35:43.31#ibcon#about to write, iclass 13, count 2 2006.229.03:35:43.31#ibcon#wrote, iclass 13, count 2 2006.229.03:35:43.31#ibcon#about to read 3, iclass 13, count 2 2006.229.03:35:43.34#ibcon#read 3, iclass 13, count 2 2006.229.03:35:43.34#ibcon#about to read 4, iclass 13, count 2 2006.229.03:35:43.34#ibcon#read 4, iclass 13, count 2 2006.229.03:35:43.34#ibcon#about to read 5, iclass 13, count 2 2006.229.03:35:43.34#ibcon#read 5, iclass 13, count 2 2006.229.03:35:43.34#ibcon#about to read 6, iclass 13, count 2 2006.229.03:35:43.34#ibcon#read 6, iclass 13, count 2 2006.229.03:35:43.34#ibcon#end of sib2, iclass 13, count 2 2006.229.03:35:43.34#ibcon#*after write, iclass 13, count 2 2006.229.03:35:43.34#ibcon#*before return 0, iclass 13, count 2 2006.229.03:35:43.34#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:43.34#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.03:35:43.34#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.03:35:43.34#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:43.34#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:43.46#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:43.46#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:43.46#ibcon#enter wrdev, iclass 13, count 0 2006.229.03:35:43.46#ibcon#first serial, iclass 13, count 0 2006.229.03:35:43.46#ibcon#enter sib2, iclass 13, count 0 2006.229.03:35:43.46#ibcon#flushed, iclass 13, count 0 2006.229.03:35:43.46#ibcon#about to write, iclass 13, count 0 2006.229.03:35:43.46#ibcon#wrote, iclass 13, count 0 2006.229.03:35:43.46#ibcon#about to read 3, iclass 13, count 0 2006.229.03:35:43.48#ibcon#read 3, iclass 13, count 0 2006.229.03:35:43.48#ibcon#about to read 4, iclass 13, count 0 2006.229.03:35:43.48#ibcon#read 4, iclass 13, count 0 2006.229.03:35:43.48#ibcon#about to read 5, iclass 13, count 0 2006.229.03:35:43.48#ibcon#read 5, iclass 13, count 0 2006.229.03:35:43.48#ibcon#about to read 6, iclass 13, count 0 2006.229.03:35:43.48#ibcon#read 6, iclass 13, count 0 2006.229.03:35:43.48#ibcon#end of sib2, iclass 13, count 0 2006.229.03:35:43.48#ibcon#*mode == 0, iclass 13, count 0 2006.229.03:35:43.48#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.03:35:43.48#ibcon#[27=USB\r\n] 2006.229.03:35:43.48#ibcon#*before write, iclass 13, count 0 2006.229.03:35:43.48#ibcon#enter sib2, iclass 13, count 0 2006.229.03:35:43.48#ibcon#flushed, iclass 13, count 0 2006.229.03:35:43.48#ibcon#about to write, iclass 13, count 0 2006.229.03:35:43.48#ibcon#wrote, iclass 13, count 0 2006.229.03:35:43.48#ibcon#about to read 3, iclass 13, count 0 2006.229.03:35:43.51#ibcon#read 3, iclass 13, count 0 2006.229.03:35:43.51#ibcon#about to read 4, iclass 13, count 0 2006.229.03:35:43.51#ibcon#read 4, iclass 13, count 0 2006.229.03:35:43.51#ibcon#about to read 5, iclass 13, count 0 2006.229.03:35:43.51#ibcon#read 5, iclass 13, count 0 2006.229.03:35:43.51#ibcon#about to read 6, iclass 13, count 0 2006.229.03:35:43.51#ibcon#read 6, iclass 13, count 0 2006.229.03:35:43.51#ibcon#end of sib2, iclass 13, count 0 2006.229.03:35:43.51#ibcon#*after write, iclass 13, count 0 2006.229.03:35:43.51#ibcon#*before return 0, iclass 13, count 0 2006.229.03:35:43.51#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:43.51#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.03:35:43.51#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.03:35:43.51#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.03:35:43.51$vck44/vblo=6,719.99 2006.229.03:35:43.51#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.03:35:43.51#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.03:35:43.51#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:43.51#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:43.51#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:43.51#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:43.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.03:35:43.51#ibcon#first serial, iclass 15, count 0 2006.229.03:35:43.51#ibcon#enter sib2, iclass 15, count 0 2006.229.03:35:43.51#ibcon#flushed, iclass 15, count 0 2006.229.03:35:43.51#ibcon#about to write, iclass 15, count 0 2006.229.03:35:43.51#ibcon#wrote, iclass 15, count 0 2006.229.03:35:43.51#ibcon#about to read 3, iclass 15, count 0 2006.229.03:35:43.53#ibcon#read 3, iclass 15, count 0 2006.229.03:35:43.53#ibcon#about to read 4, iclass 15, count 0 2006.229.03:35:43.53#ibcon#read 4, iclass 15, count 0 2006.229.03:35:43.53#ibcon#about to read 5, iclass 15, count 0 2006.229.03:35:43.53#ibcon#read 5, iclass 15, count 0 2006.229.03:35:43.53#ibcon#about to read 6, iclass 15, count 0 2006.229.03:35:43.53#ibcon#read 6, iclass 15, count 0 2006.229.03:35:43.53#ibcon#end of sib2, iclass 15, count 0 2006.229.03:35:43.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.03:35:43.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.03:35:43.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:35:43.53#ibcon#*before write, iclass 15, count 0 2006.229.03:35:43.53#ibcon#enter sib2, iclass 15, count 0 2006.229.03:35:43.53#ibcon#flushed, iclass 15, count 0 2006.229.03:35:43.53#ibcon#about to write, iclass 15, count 0 2006.229.03:35:43.53#ibcon#wrote, iclass 15, count 0 2006.229.03:35:43.53#ibcon#about to read 3, iclass 15, count 0 2006.229.03:35:43.57#ibcon#read 3, iclass 15, count 0 2006.229.03:35:43.57#ibcon#about to read 4, iclass 15, count 0 2006.229.03:35:43.57#ibcon#read 4, iclass 15, count 0 2006.229.03:35:43.57#ibcon#about to read 5, iclass 15, count 0 2006.229.03:35:43.57#ibcon#read 5, iclass 15, count 0 2006.229.03:35:43.57#ibcon#about to read 6, iclass 15, count 0 2006.229.03:35:43.57#ibcon#read 6, iclass 15, count 0 2006.229.03:35:43.57#ibcon#end of sib2, iclass 15, count 0 2006.229.03:35:43.57#ibcon#*after write, iclass 15, count 0 2006.229.03:35:43.57#ibcon#*before return 0, iclass 15, count 0 2006.229.03:35:43.57#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:43.57#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.03:35:43.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.03:35:43.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.03:35:43.57$vck44/vb=6,4 2006.229.03:35:43.57#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.03:35:43.57#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.03:35:43.57#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:43.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:43.63#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:43.63#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:43.63#ibcon#enter wrdev, iclass 17, count 2 2006.229.03:35:43.63#ibcon#first serial, iclass 17, count 2 2006.229.03:35:43.63#ibcon#enter sib2, iclass 17, count 2 2006.229.03:35:43.63#ibcon#flushed, iclass 17, count 2 2006.229.03:35:43.63#ibcon#about to write, iclass 17, count 2 2006.229.03:35:43.63#ibcon#wrote, iclass 17, count 2 2006.229.03:35:43.63#ibcon#about to read 3, iclass 17, count 2 2006.229.03:35:43.65#ibcon#read 3, iclass 17, count 2 2006.229.03:35:43.65#ibcon#about to read 4, iclass 17, count 2 2006.229.03:35:43.65#ibcon#read 4, iclass 17, count 2 2006.229.03:35:43.65#ibcon#about to read 5, iclass 17, count 2 2006.229.03:35:43.65#ibcon#read 5, iclass 17, count 2 2006.229.03:35:43.65#ibcon#about to read 6, iclass 17, count 2 2006.229.03:35:43.65#ibcon#read 6, iclass 17, count 2 2006.229.03:35:43.65#ibcon#end of sib2, iclass 17, count 2 2006.229.03:35:43.65#ibcon#*mode == 0, iclass 17, count 2 2006.229.03:35:43.65#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.03:35:43.65#ibcon#[27=AT06-04\r\n] 2006.229.03:35:43.65#ibcon#*before write, iclass 17, count 2 2006.229.03:35:43.65#ibcon#enter sib2, iclass 17, count 2 2006.229.03:35:43.65#ibcon#flushed, iclass 17, count 2 2006.229.03:35:43.65#ibcon#about to write, iclass 17, count 2 2006.229.03:35:43.65#ibcon#wrote, iclass 17, count 2 2006.229.03:35:43.65#ibcon#about to read 3, iclass 17, count 2 2006.229.03:35:43.68#ibcon#read 3, iclass 17, count 2 2006.229.03:35:43.68#ibcon#about to read 4, iclass 17, count 2 2006.229.03:35:43.68#ibcon#read 4, iclass 17, count 2 2006.229.03:35:43.68#ibcon#about to read 5, iclass 17, count 2 2006.229.03:35:43.68#ibcon#read 5, iclass 17, count 2 2006.229.03:35:43.68#ibcon#about to read 6, iclass 17, count 2 2006.229.03:35:43.68#ibcon#read 6, iclass 17, count 2 2006.229.03:35:43.68#ibcon#end of sib2, iclass 17, count 2 2006.229.03:35:43.68#ibcon#*after write, iclass 17, count 2 2006.229.03:35:43.68#ibcon#*before return 0, iclass 17, count 2 2006.229.03:35:43.68#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:43.68#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.03:35:43.68#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.03:35:43.68#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:43.68#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:43.80#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:43.80#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:43.80#ibcon#enter wrdev, iclass 17, count 0 2006.229.03:35:43.80#ibcon#first serial, iclass 17, count 0 2006.229.03:35:43.80#ibcon#enter sib2, iclass 17, count 0 2006.229.03:35:43.80#ibcon#flushed, iclass 17, count 0 2006.229.03:35:43.80#ibcon#about to write, iclass 17, count 0 2006.229.03:35:43.80#ibcon#wrote, iclass 17, count 0 2006.229.03:35:43.80#ibcon#about to read 3, iclass 17, count 0 2006.229.03:35:43.82#ibcon#read 3, iclass 17, count 0 2006.229.03:35:43.82#ibcon#about to read 4, iclass 17, count 0 2006.229.03:35:43.82#ibcon#read 4, iclass 17, count 0 2006.229.03:35:43.82#ibcon#about to read 5, iclass 17, count 0 2006.229.03:35:43.82#ibcon#read 5, iclass 17, count 0 2006.229.03:35:43.82#ibcon#about to read 6, iclass 17, count 0 2006.229.03:35:43.82#ibcon#read 6, iclass 17, count 0 2006.229.03:35:43.82#ibcon#end of sib2, iclass 17, count 0 2006.229.03:35:43.82#ibcon#*mode == 0, iclass 17, count 0 2006.229.03:35:43.82#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.03:35:43.82#ibcon#[27=USB\r\n] 2006.229.03:35:43.82#ibcon#*before write, iclass 17, count 0 2006.229.03:35:43.82#ibcon#enter sib2, iclass 17, count 0 2006.229.03:35:43.82#ibcon#flushed, iclass 17, count 0 2006.229.03:35:43.82#ibcon#about to write, iclass 17, count 0 2006.229.03:35:43.82#ibcon#wrote, iclass 17, count 0 2006.229.03:35:43.82#ibcon#about to read 3, iclass 17, count 0 2006.229.03:35:43.85#ibcon#read 3, iclass 17, count 0 2006.229.03:35:43.85#ibcon#about to read 4, iclass 17, count 0 2006.229.03:35:43.85#ibcon#read 4, iclass 17, count 0 2006.229.03:35:43.85#ibcon#about to read 5, iclass 17, count 0 2006.229.03:35:43.85#ibcon#read 5, iclass 17, count 0 2006.229.03:35:43.85#ibcon#about to read 6, iclass 17, count 0 2006.229.03:35:43.85#ibcon#read 6, iclass 17, count 0 2006.229.03:35:43.85#ibcon#end of sib2, iclass 17, count 0 2006.229.03:35:43.85#ibcon#*after write, iclass 17, count 0 2006.229.03:35:43.85#ibcon#*before return 0, iclass 17, count 0 2006.229.03:35:43.85#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:43.85#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.03:35:43.85#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.03:35:43.85#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.03:35:43.85$vck44/vblo=7,734.99 2006.229.03:35:43.85#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.03:35:43.85#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.03:35:43.85#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:43.85#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:43.85#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:43.85#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:43.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.03:35:43.85#ibcon#first serial, iclass 19, count 0 2006.229.03:35:43.85#ibcon#enter sib2, iclass 19, count 0 2006.229.03:35:43.85#ibcon#flushed, iclass 19, count 0 2006.229.03:35:43.85#ibcon#about to write, iclass 19, count 0 2006.229.03:35:43.85#ibcon#wrote, iclass 19, count 0 2006.229.03:35:43.85#ibcon#about to read 3, iclass 19, count 0 2006.229.03:35:43.87#ibcon#read 3, iclass 19, count 0 2006.229.03:35:43.87#ibcon#about to read 4, iclass 19, count 0 2006.229.03:35:43.87#ibcon#read 4, iclass 19, count 0 2006.229.03:35:43.87#ibcon#about to read 5, iclass 19, count 0 2006.229.03:35:43.87#ibcon#read 5, iclass 19, count 0 2006.229.03:35:43.87#ibcon#about to read 6, iclass 19, count 0 2006.229.03:35:43.87#ibcon#read 6, iclass 19, count 0 2006.229.03:35:43.87#ibcon#end of sib2, iclass 19, count 0 2006.229.03:35:43.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.03:35:43.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.03:35:43.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:35:43.87#ibcon#*before write, iclass 19, count 0 2006.229.03:35:43.87#ibcon#enter sib2, iclass 19, count 0 2006.229.03:35:43.87#ibcon#flushed, iclass 19, count 0 2006.229.03:35:43.87#ibcon#about to write, iclass 19, count 0 2006.229.03:35:43.87#ibcon#wrote, iclass 19, count 0 2006.229.03:35:43.87#ibcon#about to read 3, iclass 19, count 0 2006.229.03:35:43.91#ibcon#read 3, iclass 19, count 0 2006.229.03:35:43.91#ibcon#about to read 4, iclass 19, count 0 2006.229.03:35:43.91#ibcon#read 4, iclass 19, count 0 2006.229.03:35:43.91#ibcon#about to read 5, iclass 19, count 0 2006.229.03:35:43.91#ibcon#read 5, iclass 19, count 0 2006.229.03:35:43.91#ibcon#about to read 6, iclass 19, count 0 2006.229.03:35:43.91#ibcon#read 6, iclass 19, count 0 2006.229.03:35:43.91#ibcon#end of sib2, iclass 19, count 0 2006.229.03:35:43.91#ibcon#*after write, iclass 19, count 0 2006.229.03:35:43.91#ibcon#*before return 0, iclass 19, count 0 2006.229.03:35:43.91#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:43.91#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.03:35:43.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.03:35:43.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.03:35:43.91$vck44/vb=7,4 2006.229.03:35:43.91#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.03:35:43.91#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.03:35:43.91#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:43.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:43.97#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:43.97#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:43.97#ibcon#enter wrdev, iclass 21, count 2 2006.229.03:35:43.97#ibcon#first serial, iclass 21, count 2 2006.229.03:35:43.97#ibcon#enter sib2, iclass 21, count 2 2006.229.03:35:43.97#ibcon#flushed, iclass 21, count 2 2006.229.03:35:43.97#ibcon#about to write, iclass 21, count 2 2006.229.03:35:43.97#ibcon#wrote, iclass 21, count 2 2006.229.03:35:43.97#ibcon#about to read 3, iclass 21, count 2 2006.229.03:35:43.99#ibcon#read 3, iclass 21, count 2 2006.229.03:35:43.99#ibcon#about to read 4, iclass 21, count 2 2006.229.03:35:43.99#ibcon#read 4, iclass 21, count 2 2006.229.03:35:43.99#ibcon#about to read 5, iclass 21, count 2 2006.229.03:35:43.99#ibcon#read 5, iclass 21, count 2 2006.229.03:35:43.99#ibcon#about to read 6, iclass 21, count 2 2006.229.03:35:43.99#ibcon#read 6, iclass 21, count 2 2006.229.03:35:43.99#ibcon#end of sib2, iclass 21, count 2 2006.229.03:35:43.99#ibcon#*mode == 0, iclass 21, count 2 2006.229.03:35:43.99#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.03:35:43.99#ibcon#[27=AT07-04\r\n] 2006.229.03:35:43.99#ibcon#*before write, iclass 21, count 2 2006.229.03:35:43.99#ibcon#enter sib2, iclass 21, count 2 2006.229.03:35:43.99#ibcon#flushed, iclass 21, count 2 2006.229.03:35:43.99#ibcon#about to write, iclass 21, count 2 2006.229.03:35:43.99#ibcon#wrote, iclass 21, count 2 2006.229.03:35:43.99#ibcon#about to read 3, iclass 21, count 2 2006.229.03:35:44.02#ibcon#read 3, iclass 21, count 2 2006.229.03:35:44.02#ibcon#about to read 4, iclass 21, count 2 2006.229.03:35:44.02#ibcon#read 4, iclass 21, count 2 2006.229.03:35:44.02#ibcon#about to read 5, iclass 21, count 2 2006.229.03:35:44.02#ibcon#read 5, iclass 21, count 2 2006.229.03:35:44.02#ibcon#about to read 6, iclass 21, count 2 2006.229.03:35:44.02#ibcon#read 6, iclass 21, count 2 2006.229.03:35:44.02#ibcon#end of sib2, iclass 21, count 2 2006.229.03:35:44.02#ibcon#*after write, iclass 21, count 2 2006.229.03:35:44.02#ibcon#*before return 0, iclass 21, count 2 2006.229.03:35:44.02#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:44.02#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.03:35:44.02#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.03:35:44.02#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:44.02#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:44.14#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:44.14#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:44.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.03:35:44.14#ibcon#first serial, iclass 21, count 0 2006.229.03:35:44.14#ibcon#enter sib2, iclass 21, count 0 2006.229.03:35:44.14#ibcon#flushed, iclass 21, count 0 2006.229.03:35:44.14#ibcon#about to write, iclass 21, count 0 2006.229.03:35:44.14#ibcon#wrote, iclass 21, count 0 2006.229.03:35:44.14#ibcon#about to read 3, iclass 21, count 0 2006.229.03:35:44.16#ibcon#read 3, iclass 21, count 0 2006.229.03:35:44.16#ibcon#about to read 4, iclass 21, count 0 2006.229.03:35:44.16#ibcon#read 4, iclass 21, count 0 2006.229.03:35:44.16#ibcon#about to read 5, iclass 21, count 0 2006.229.03:35:44.16#ibcon#read 5, iclass 21, count 0 2006.229.03:35:44.16#ibcon#about to read 6, iclass 21, count 0 2006.229.03:35:44.16#ibcon#read 6, iclass 21, count 0 2006.229.03:35:44.16#ibcon#end of sib2, iclass 21, count 0 2006.229.03:35:44.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.03:35:44.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.03:35:44.16#ibcon#[27=USB\r\n] 2006.229.03:35:44.16#ibcon#*before write, iclass 21, count 0 2006.229.03:35:44.16#ibcon#enter sib2, iclass 21, count 0 2006.229.03:35:44.16#ibcon#flushed, iclass 21, count 0 2006.229.03:35:44.16#ibcon#about to write, iclass 21, count 0 2006.229.03:35:44.16#ibcon#wrote, iclass 21, count 0 2006.229.03:35:44.16#ibcon#about to read 3, iclass 21, count 0 2006.229.03:35:44.19#ibcon#read 3, iclass 21, count 0 2006.229.03:35:44.19#ibcon#about to read 4, iclass 21, count 0 2006.229.03:35:44.19#ibcon#read 4, iclass 21, count 0 2006.229.03:35:44.19#ibcon#about to read 5, iclass 21, count 0 2006.229.03:35:44.19#ibcon#read 5, iclass 21, count 0 2006.229.03:35:44.19#ibcon#about to read 6, iclass 21, count 0 2006.229.03:35:44.19#ibcon#read 6, iclass 21, count 0 2006.229.03:35:44.19#ibcon#end of sib2, iclass 21, count 0 2006.229.03:35:44.19#ibcon#*after write, iclass 21, count 0 2006.229.03:35:44.19#ibcon#*before return 0, iclass 21, count 0 2006.229.03:35:44.19#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:44.19#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.03:35:44.19#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.03:35:44.19#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.03:35:44.19$vck44/vblo=8,744.99 2006.229.03:35:44.19#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.03:35:44.19#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.03:35:44.19#ibcon#ireg 17 cls_cnt 0 2006.229.03:35:44.19#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:44.19#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:44.19#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:44.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.03:35:44.19#ibcon#first serial, iclass 23, count 0 2006.229.03:35:44.19#ibcon#enter sib2, iclass 23, count 0 2006.229.03:35:44.19#ibcon#flushed, iclass 23, count 0 2006.229.03:35:44.19#ibcon#about to write, iclass 23, count 0 2006.229.03:35:44.19#ibcon#wrote, iclass 23, count 0 2006.229.03:35:44.19#ibcon#about to read 3, iclass 23, count 0 2006.229.03:35:44.21#ibcon#read 3, iclass 23, count 0 2006.229.03:35:44.21#ibcon#about to read 4, iclass 23, count 0 2006.229.03:35:44.21#ibcon#read 4, iclass 23, count 0 2006.229.03:35:44.21#ibcon#about to read 5, iclass 23, count 0 2006.229.03:35:44.21#ibcon#read 5, iclass 23, count 0 2006.229.03:35:44.21#ibcon#about to read 6, iclass 23, count 0 2006.229.03:35:44.21#ibcon#read 6, iclass 23, count 0 2006.229.03:35:44.21#ibcon#end of sib2, iclass 23, count 0 2006.229.03:35:44.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.03:35:44.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.03:35:44.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:35:44.21#ibcon#*before write, iclass 23, count 0 2006.229.03:35:44.21#ibcon#enter sib2, iclass 23, count 0 2006.229.03:35:44.21#ibcon#flushed, iclass 23, count 0 2006.229.03:35:44.21#ibcon#about to write, iclass 23, count 0 2006.229.03:35:44.21#ibcon#wrote, iclass 23, count 0 2006.229.03:35:44.21#ibcon#about to read 3, iclass 23, count 0 2006.229.03:35:44.25#ibcon#read 3, iclass 23, count 0 2006.229.03:35:44.25#ibcon#about to read 4, iclass 23, count 0 2006.229.03:35:44.25#ibcon#read 4, iclass 23, count 0 2006.229.03:35:44.25#ibcon#about to read 5, iclass 23, count 0 2006.229.03:35:44.25#ibcon#read 5, iclass 23, count 0 2006.229.03:35:44.25#ibcon#about to read 6, iclass 23, count 0 2006.229.03:35:44.25#ibcon#read 6, iclass 23, count 0 2006.229.03:35:44.25#ibcon#end of sib2, iclass 23, count 0 2006.229.03:35:44.25#ibcon#*after write, iclass 23, count 0 2006.229.03:35:44.25#ibcon#*before return 0, iclass 23, count 0 2006.229.03:35:44.25#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:44.25#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.03:35:44.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.03:35:44.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.03:35:44.25$vck44/vb=8,4 2006.229.03:35:44.25#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.03:35:44.25#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.03:35:44.25#ibcon#ireg 11 cls_cnt 2 2006.229.03:35:44.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:44.31#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:44.31#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:44.31#ibcon#enter wrdev, iclass 25, count 2 2006.229.03:35:44.31#ibcon#first serial, iclass 25, count 2 2006.229.03:35:44.31#ibcon#enter sib2, iclass 25, count 2 2006.229.03:35:44.31#ibcon#flushed, iclass 25, count 2 2006.229.03:35:44.31#ibcon#about to write, iclass 25, count 2 2006.229.03:35:44.31#ibcon#wrote, iclass 25, count 2 2006.229.03:35:44.31#ibcon#about to read 3, iclass 25, count 2 2006.229.03:35:44.33#ibcon#read 3, iclass 25, count 2 2006.229.03:35:44.33#ibcon#about to read 4, iclass 25, count 2 2006.229.03:35:44.33#ibcon#read 4, iclass 25, count 2 2006.229.03:35:44.33#ibcon#about to read 5, iclass 25, count 2 2006.229.03:35:44.33#ibcon#read 5, iclass 25, count 2 2006.229.03:35:44.33#ibcon#about to read 6, iclass 25, count 2 2006.229.03:35:44.33#ibcon#read 6, iclass 25, count 2 2006.229.03:35:44.33#ibcon#end of sib2, iclass 25, count 2 2006.229.03:35:44.33#ibcon#*mode == 0, iclass 25, count 2 2006.229.03:35:44.33#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.03:35:44.33#ibcon#[27=AT08-04\r\n] 2006.229.03:35:44.33#ibcon#*before write, iclass 25, count 2 2006.229.03:35:44.33#ibcon#enter sib2, iclass 25, count 2 2006.229.03:35:44.33#ibcon#flushed, iclass 25, count 2 2006.229.03:35:44.33#ibcon#about to write, iclass 25, count 2 2006.229.03:35:44.33#ibcon#wrote, iclass 25, count 2 2006.229.03:35:44.33#ibcon#about to read 3, iclass 25, count 2 2006.229.03:35:44.36#ibcon#read 3, iclass 25, count 2 2006.229.03:35:44.36#ibcon#about to read 4, iclass 25, count 2 2006.229.03:35:44.36#ibcon#read 4, iclass 25, count 2 2006.229.03:35:44.36#ibcon#about to read 5, iclass 25, count 2 2006.229.03:35:44.36#ibcon#read 5, iclass 25, count 2 2006.229.03:35:44.36#ibcon#about to read 6, iclass 25, count 2 2006.229.03:35:44.36#ibcon#read 6, iclass 25, count 2 2006.229.03:35:44.36#ibcon#end of sib2, iclass 25, count 2 2006.229.03:35:44.36#ibcon#*after write, iclass 25, count 2 2006.229.03:35:44.36#ibcon#*before return 0, iclass 25, count 2 2006.229.03:35:44.36#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:44.36#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.03:35:44.36#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.03:35:44.36#ibcon#ireg 7 cls_cnt 0 2006.229.03:35:44.36#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:44.48#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:44.48#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:44.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:35:44.48#ibcon#first serial, iclass 25, count 0 2006.229.03:35:44.48#ibcon#enter sib2, iclass 25, count 0 2006.229.03:35:44.48#ibcon#flushed, iclass 25, count 0 2006.229.03:35:44.48#ibcon#about to write, iclass 25, count 0 2006.229.03:35:44.48#ibcon#wrote, iclass 25, count 0 2006.229.03:35:44.48#ibcon#about to read 3, iclass 25, count 0 2006.229.03:35:44.50#ibcon#read 3, iclass 25, count 0 2006.229.03:35:44.50#ibcon#about to read 4, iclass 25, count 0 2006.229.03:35:44.50#ibcon#read 4, iclass 25, count 0 2006.229.03:35:44.50#ibcon#about to read 5, iclass 25, count 0 2006.229.03:35:44.50#ibcon#read 5, iclass 25, count 0 2006.229.03:35:44.50#ibcon#about to read 6, iclass 25, count 0 2006.229.03:35:44.50#ibcon#read 6, iclass 25, count 0 2006.229.03:35:44.50#ibcon#end of sib2, iclass 25, count 0 2006.229.03:35:44.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:35:44.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:35:44.50#ibcon#[27=USB\r\n] 2006.229.03:35:44.50#ibcon#*before write, iclass 25, count 0 2006.229.03:35:44.50#ibcon#enter sib2, iclass 25, count 0 2006.229.03:35:44.50#ibcon#flushed, iclass 25, count 0 2006.229.03:35:44.50#ibcon#about to write, iclass 25, count 0 2006.229.03:35:44.50#ibcon#wrote, iclass 25, count 0 2006.229.03:35:44.50#ibcon#about to read 3, iclass 25, count 0 2006.229.03:35:44.53#ibcon#read 3, iclass 25, count 0 2006.229.03:35:44.53#ibcon#about to read 4, iclass 25, count 0 2006.229.03:35:44.53#ibcon#read 4, iclass 25, count 0 2006.229.03:35:44.53#ibcon#about to read 5, iclass 25, count 0 2006.229.03:35:44.53#ibcon#read 5, iclass 25, count 0 2006.229.03:35:44.53#ibcon#about to read 6, iclass 25, count 0 2006.229.03:35:44.53#ibcon#read 6, iclass 25, count 0 2006.229.03:35:44.53#ibcon#end of sib2, iclass 25, count 0 2006.229.03:35:44.53#ibcon#*after write, iclass 25, count 0 2006.229.03:35:44.53#ibcon#*before return 0, iclass 25, count 0 2006.229.03:35:44.53#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:44.53#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.03:35:44.53#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:35:44.53#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:35:44.53$vck44/vabw=wide 2006.229.03:35:44.53#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.03:35:44.53#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.03:35:44.53#ibcon#ireg 8 cls_cnt 0 2006.229.03:35:44.53#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:44.53#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:44.53#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:44.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.03:35:44.53#ibcon#first serial, iclass 27, count 0 2006.229.03:35:44.53#ibcon#enter sib2, iclass 27, count 0 2006.229.03:35:44.53#ibcon#flushed, iclass 27, count 0 2006.229.03:35:44.53#ibcon#about to write, iclass 27, count 0 2006.229.03:35:44.53#ibcon#wrote, iclass 27, count 0 2006.229.03:35:44.53#ibcon#about to read 3, iclass 27, count 0 2006.229.03:35:44.55#ibcon#read 3, iclass 27, count 0 2006.229.03:35:44.55#ibcon#about to read 4, iclass 27, count 0 2006.229.03:35:44.55#ibcon#read 4, iclass 27, count 0 2006.229.03:35:44.55#ibcon#about to read 5, iclass 27, count 0 2006.229.03:35:44.55#ibcon#read 5, iclass 27, count 0 2006.229.03:35:44.55#ibcon#about to read 6, iclass 27, count 0 2006.229.03:35:44.55#ibcon#read 6, iclass 27, count 0 2006.229.03:35:44.55#ibcon#end of sib2, iclass 27, count 0 2006.229.03:35:44.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.03:35:44.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.03:35:44.55#ibcon#[25=BW32\r\n] 2006.229.03:35:44.55#ibcon#*before write, iclass 27, count 0 2006.229.03:35:44.55#ibcon#enter sib2, iclass 27, count 0 2006.229.03:35:44.55#ibcon#flushed, iclass 27, count 0 2006.229.03:35:44.55#ibcon#about to write, iclass 27, count 0 2006.229.03:35:44.55#ibcon#wrote, iclass 27, count 0 2006.229.03:35:44.55#ibcon#about to read 3, iclass 27, count 0 2006.229.03:35:44.58#ibcon#read 3, iclass 27, count 0 2006.229.03:35:44.58#ibcon#about to read 4, iclass 27, count 0 2006.229.03:35:44.58#ibcon#read 4, iclass 27, count 0 2006.229.03:35:44.58#ibcon#about to read 5, iclass 27, count 0 2006.229.03:35:44.58#ibcon#read 5, iclass 27, count 0 2006.229.03:35:44.58#ibcon#about to read 6, iclass 27, count 0 2006.229.03:35:44.58#ibcon#read 6, iclass 27, count 0 2006.229.03:35:44.58#ibcon#end of sib2, iclass 27, count 0 2006.229.03:35:44.58#ibcon#*after write, iclass 27, count 0 2006.229.03:35:44.58#ibcon#*before return 0, iclass 27, count 0 2006.229.03:35:44.58#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:44.58#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.03:35:44.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.03:35:44.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.03:35:44.58$vck44/vbbw=wide 2006.229.03:35:44.58#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.03:35:44.58#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.03:35:44.58#ibcon#ireg 8 cls_cnt 0 2006.229.03:35:44.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:35:44.65#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:35:44.65#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:35:44.65#ibcon#enter wrdev, iclass 29, count 0 2006.229.03:35:44.65#ibcon#first serial, iclass 29, count 0 2006.229.03:35:44.65#ibcon#enter sib2, iclass 29, count 0 2006.229.03:35:44.65#ibcon#flushed, iclass 29, count 0 2006.229.03:35:44.65#ibcon#about to write, iclass 29, count 0 2006.229.03:35:44.65#ibcon#wrote, iclass 29, count 0 2006.229.03:35:44.65#ibcon#about to read 3, iclass 29, count 0 2006.229.03:35:44.67#ibcon#read 3, iclass 29, count 0 2006.229.03:35:44.67#ibcon#about to read 4, iclass 29, count 0 2006.229.03:35:44.67#ibcon#read 4, iclass 29, count 0 2006.229.03:35:44.67#ibcon#about to read 5, iclass 29, count 0 2006.229.03:35:44.67#ibcon#read 5, iclass 29, count 0 2006.229.03:35:44.67#ibcon#about to read 6, iclass 29, count 0 2006.229.03:35:44.67#ibcon#read 6, iclass 29, count 0 2006.229.03:35:44.67#ibcon#end of sib2, iclass 29, count 0 2006.229.03:35:44.67#ibcon#*mode == 0, iclass 29, count 0 2006.229.03:35:44.67#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.03:35:44.67#ibcon#[27=BW32\r\n] 2006.229.03:35:44.67#ibcon#*before write, iclass 29, count 0 2006.229.03:35:44.67#ibcon#enter sib2, iclass 29, count 0 2006.229.03:35:44.67#ibcon#flushed, iclass 29, count 0 2006.229.03:35:44.67#ibcon#about to write, iclass 29, count 0 2006.229.03:35:44.67#ibcon#wrote, iclass 29, count 0 2006.229.03:35:44.67#ibcon#about to read 3, iclass 29, count 0 2006.229.03:35:44.70#ibcon#read 3, iclass 29, count 0 2006.229.03:35:44.70#ibcon#about to read 4, iclass 29, count 0 2006.229.03:35:44.70#ibcon#read 4, iclass 29, count 0 2006.229.03:35:44.70#ibcon#about to read 5, iclass 29, count 0 2006.229.03:35:44.70#ibcon#read 5, iclass 29, count 0 2006.229.03:35:44.70#ibcon#about to read 6, iclass 29, count 0 2006.229.03:35:44.70#ibcon#read 6, iclass 29, count 0 2006.229.03:35:44.70#ibcon#end of sib2, iclass 29, count 0 2006.229.03:35:44.70#ibcon#*after write, iclass 29, count 0 2006.229.03:35:44.70#ibcon#*before return 0, iclass 29, count 0 2006.229.03:35:44.70#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:35:44.70#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.03:35:44.70#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.03:35:44.70#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.03:35:44.70$setupk4/ifdk4 2006.229.03:35:44.70$ifdk4/lo= 2006.229.03:35:44.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:35:44.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:35:44.70$ifdk4/patch= 2006.229.03:35:44.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:35:44.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:35:44.70$setupk4/!*+20s 2006.229.03:35:47.93#abcon#<5=/04 2.9 6.1 29.41 951000.6\r\n> 2006.229.03:35:47.95#abcon#{5=INTERFACE CLEAR} 2006.229.03:35:48.01#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:35:58.10#abcon#<5=/04 2.9 6.1 29.42 961000.6\r\n> 2006.229.03:35:58.12#abcon#{5=INTERFACE CLEAR} 2006.229.03:35:58.18#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:35:59.20$setupk4/"tpicd 2006.229.03:35:59.20$setupk4/echo=off 2006.229.03:35:59.20$setupk4/xlog=off 2006.229.03:35:59.20:!2006.229.03:39:08 2006.229.03:36:47.13#trakl#Source acquired 2006.229.03:36:47.13#flagr#flagr/antenna,acquired 2006.229.03:39:08.00:preob 2006.229.03:39:09.14/onsource/TRACKING 2006.229.03:39:09.14:!2006.229.03:39:18 2006.229.03:39:18.00:"tape 2006.229.03:39:18.00:"st=record 2006.229.03:39:18.00:data_valid=on 2006.229.03:39:18.00:midob 2006.229.03:39:18.14/onsource/TRACKING 2006.229.03:39:18.14/wx/29.53,1000.5,96 2006.229.03:39:18.22/cable/+6.4094E-03 2006.229.03:39:19.31/va/01,08,usb,yes,31,33 2006.229.03:39:19.31/va/02,07,usb,yes,33,34 2006.229.03:39:19.31/va/03,06,usb,yes,41,44 2006.229.03:39:19.31/va/04,07,usb,yes,34,36 2006.229.03:39:19.31/va/05,04,usb,yes,31,31 2006.229.03:39:19.31/va/06,04,usb,yes,34,34 2006.229.03:39:19.31/va/07,05,usb,yes,30,31 2006.229.03:39:19.31/va/08,06,usb,yes,22,27 2006.229.03:39:19.54/valo/01,524.99,yes,locked 2006.229.03:39:19.54/valo/02,534.99,yes,locked 2006.229.03:39:19.54/valo/03,564.99,yes,locked 2006.229.03:39:19.54/valo/04,624.99,yes,locked 2006.229.03:39:19.54/valo/05,734.99,yes,locked 2006.229.03:39:19.54/valo/06,814.99,yes,locked 2006.229.03:39:19.54/valo/07,864.99,yes,locked 2006.229.03:39:19.54/valo/08,884.99,yes,locked 2006.229.03:39:20.63/vb/01,04,usb,yes,32,30 2006.229.03:39:20.63/vb/02,04,usb,yes,34,34 2006.229.03:39:20.63/vb/03,04,usb,yes,31,34 2006.229.03:39:20.63/vb/04,04,usb,yes,36,35 2006.229.03:39:20.63/vb/05,04,usb,yes,28,30 2006.229.03:39:20.63/vb/06,04,usb,yes,33,28 2006.229.03:39:20.63/vb/07,04,usb,yes,32,32 2006.229.03:39:20.63/vb/08,04,usb,yes,30,33 2006.229.03:39:20.86/vblo/01,629.99,yes,locked 2006.229.03:39:20.86/vblo/02,634.99,yes,locked 2006.229.03:39:20.86/vblo/03,649.99,yes,locked 2006.229.03:39:20.86/vblo/04,679.99,yes,locked 2006.229.03:39:20.86/vblo/05,709.99,yes,locked 2006.229.03:39:20.86/vblo/06,719.99,yes,locked 2006.229.03:39:20.86/vblo/07,734.99,yes,locked 2006.229.03:39:20.86/vblo/08,744.99,yes,locked 2006.229.03:39:21.01/vabw/8 2006.229.03:39:21.16/vbbw/8 2006.229.03:39:21.25/xfe/off,on,12.2 2006.229.03:39:21.63/ifatt/23,28,28,28 2006.229.03:39:22.08/fmout-gps/S +4.45E-07 2006.229.03:39:22.12:!2006.229.03:40:18 2006.229.03:40:18.01:data_valid=off 2006.229.03:40:18.01:"et 2006.229.03:40:18.02:!+3s 2006.229.03:40:21.03:"tape 2006.229.03:40:21.03:postob 2006.229.03:40:21.23/cable/+6.4072E-03 2006.229.03:40:21.23/wx/29.56,1000.5,96 2006.229.03:40:21.29/fmout-gps/S +4.45E-07 2006.229.03:40:21.29:scan_name=229-0347,jd0608,290 2006.229.03:40:21.30:source=1803+784,180045.68,782804.0,2000.0,cw 2006.229.03:40:22.14#flagr#flagr/antenna,new-source 2006.229.03:40:22.14:checkk5 2006.229.03:40:22.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:40:22.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:40:23.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:40:23.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:40:24.12/chk_obsdata//k5ts1/T2290339??a.dat file size is correct (nominal:240MB, actual:240MB). 2006.229.03:40:24.53/chk_obsdata//k5ts2/T2290339??b.dat file size is correct (nominal:240MB, actual:240MB). 2006.229.03:40:24.93/chk_obsdata//k5ts3/T2290339??c.dat file size is correct (nominal:240MB, actual:240MB). 2006.229.03:40:25.33/chk_obsdata//k5ts4/T2290339??d.dat file size is correct (nominal:240MB, actual:240MB). 2006.229.03:40:26.07/k5log//k5ts1_log_newline 2006.229.03:40:26.79/k5log//k5ts2_log_newline 2006.229.03:40:27.50/k5log//k5ts3_log_newline 2006.229.03:40:28.22/k5log//k5ts4_log_newline 2006.229.03:40:28.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:40:28.25:setupk4=1 2006.229.03:40:28.25$setupk4/echo=on 2006.229.03:40:28.25$setupk4/pcalon 2006.229.03:40:28.25$pcalon/"no phase cal control is implemented here 2006.229.03:40:28.25$setupk4/"tpicd=stop 2006.229.03:40:28.25$setupk4/"rec=synch_on 2006.229.03:40:28.25$setupk4/"rec_mode=128 2006.229.03:40:28.25$setupk4/!* 2006.229.03:40:28.25$setupk4/recpk4 2006.229.03:40:28.25$recpk4/recpatch= 2006.229.03:40:28.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:40:28.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:40:28.25$setupk4/vck44 2006.229.03:40:28.25$vck44/valo=1,524.99 2006.229.03:40:28.25#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.03:40:28.25#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.03:40:28.25#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:28.25#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:28.25#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:28.25#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:28.25#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:40:28.25#ibcon#first serial, iclass 38, count 0 2006.229.03:40:28.25#ibcon#enter sib2, iclass 38, count 0 2006.229.03:40:28.25#ibcon#flushed, iclass 38, count 0 2006.229.03:40:28.25#ibcon#about to write, iclass 38, count 0 2006.229.03:40:28.25#ibcon#wrote, iclass 38, count 0 2006.229.03:40:28.25#ibcon#about to read 3, iclass 38, count 0 2006.229.03:40:28.27#ibcon#read 3, iclass 38, count 0 2006.229.03:40:28.27#ibcon#about to read 4, iclass 38, count 0 2006.229.03:40:28.27#ibcon#read 4, iclass 38, count 0 2006.229.03:40:28.27#ibcon#about to read 5, iclass 38, count 0 2006.229.03:40:28.27#ibcon#read 5, iclass 38, count 0 2006.229.03:40:28.27#ibcon#about to read 6, iclass 38, count 0 2006.229.03:40:28.27#ibcon#read 6, iclass 38, count 0 2006.229.03:40:28.27#ibcon#end of sib2, iclass 38, count 0 2006.229.03:40:28.27#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:40:28.27#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:40:28.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:40:28.27#ibcon#*before write, iclass 38, count 0 2006.229.03:40:28.27#ibcon#enter sib2, iclass 38, count 0 2006.229.03:40:28.27#ibcon#flushed, iclass 38, count 0 2006.229.03:40:28.27#ibcon#about to write, iclass 38, count 0 2006.229.03:40:28.27#ibcon#wrote, iclass 38, count 0 2006.229.03:40:28.27#ibcon#about to read 3, iclass 38, count 0 2006.229.03:40:28.32#ibcon#read 3, iclass 38, count 0 2006.229.03:40:28.32#ibcon#about to read 4, iclass 38, count 0 2006.229.03:40:28.32#ibcon#read 4, iclass 38, count 0 2006.229.03:40:28.32#ibcon#about to read 5, iclass 38, count 0 2006.229.03:40:28.32#ibcon#read 5, iclass 38, count 0 2006.229.03:40:28.32#ibcon#about to read 6, iclass 38, count 0 2006.229.03:40:28.32#ibcon#read 6, iclass 38, count 0 2006.229.03:40:28.32#ibcon#end of sib2, iclass 38, count 0 2006.229.03:40:28.32#ibcon#*after write, iclass 38, count 0 2006.229.03:40:28.32#ibcon#*before return 0, iclass 38, count 0 2006.229.03:40:28.32#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:28.32#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:28.32#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:40:28.32#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:40:28.32$vck44/va=1,8 2006.229.03:40:28.32#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.03:40:28.32#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.03:40:28.32#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:28.32#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:28.32#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:28.32#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:28.32#ibcon#enter wrdev, iclass 40, count 2 2006.229.03:40:28.32#ibcon#first serial, iclass 40, count 2 2006.229.03:40:28.32#ibcon#enter sib2, iclass 40, count 2 2006.229.03:40:28.32#ibcon#flushed, iclass 40, count 2 2006.229.03:40:28.32#ibcon#about to write, iclass 40, count 2 2006.229.03:40:28.32#ibcon#wrote, iclass 40, count 2 2006.229.03:40:28.32#ibcon#about to read 3, iclass 40, count 2 2006.229.03:40:28.34#ibcon#read 3, iclass 40, count 2 2006.229.03:40:28.34#ibcon#about to read 4, iclass 40, count 2 2006.229.03:40:28.34#ibcon#read 4, iclass 40, count 2 2006.229.03:40:28.34#ibcon#about to read 5, iclass 40, count 2 2006.229.03:40:28.34#ibcon#read 5, iclass 40, count 2 2006.229.03:40:28.34#ibcon#about to read 6, iclass 40, count 2 2006.229.03:40:28.34#ibcon#read 6, iclass 40, count 2 2006.229.03:40:28.34#ibcon#end of sib2, iclass 40, count 2 2006.229.03:40:28.34#ibcon#*mode == 0, iclass 40, count 2 2006.229.03:40:28.34#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.03:40:28.34#ibcon#[25=AT01-08\r\n] 2006.229.03:40:28.34#ibcon#*before write, iclass 40, count 2 2006.229.03:40:28.34#ibcon#enter sib2, iclass 40, count 2 2006.229.03:40:28.34#ibcon#flushed, iclass 40, count 2 2006.229.03:40:28.34#ibcon#about to write, iclass 40, count 2 2006.229.03:40:28.34#ibcon#wrote, iclass 40, count 2 2006.229.03:40:28.34#ibcon#about to read 3, iclass 40, count 2 2006.229.03:40:28.37#ibcon#read 3, iclass 40, count 2 2006.229.03:40:28.37#ibcon#about to read 4, iclass 40, count 2 2006.229.03:40:28.37#ibcon#read 4, iclass 40, count 2 2006.229.03:40:28.37#ibcon#about to read 5, iclass 40, count 2 2006.229.03:40:28.37#ibcon#read 5, iclass 40, count 2 2006.229.03:40:28.37#ibcon#about to read 6, iclass 40, count 2 2006.229.03:40:28.37#ibcon#read 6, iclass 40, count 2 2006.229.03:40:28.37#ibcon#end of sib2, iclass 40, count 2 2006.229.03:40:28.37#ibcon#*after write, iclass 40, count 2 2006.229.03:40:28.37#ibcon#*before return 0, iclass 40, count 2 2006.229.03:40:28.37#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:28.37#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:28.37#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.03:40:28.37#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:28.37#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:28.49#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:28.49#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:28.49#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:40:28.49#ibcon#first serial, iclass 40, count 0 2006.229.03:40:28.49#ibcon#enter sib2, iclass 40, count 0 2006.229.03:40:28.49#ibcon#flushed, iclass 40, count 0 2006.229.03:40:28.49#ibcon#about to write, iclass 40, count 0 2006.229.03:40:28.49#ibcon#wrote, iclass 40, count 0 2006.229.03:40:28.49#ibcon#about to read 3, iclass 40, count 0 2006.229.03:40:28.51#ibcon#read 3, iclass 40, count 0 2006.229.03:40:28.51#ibcon#about to read 4, iclass 40, count 0 2006.229.03:40:28.51#ibcon#read 4, iclass 40, count 0 2006.229.03:40:28.51#ibcon#about to read 5, iclass 40, count 0 2006.229.03:40:28.51#ibcon#read 5, iclass 40, count 0 2006.229.03:40:28.51#ibcon#about to read 6, iclass 40, count 0 2006.229.03:40:28.51#ibcon#read 6, iclass 40, count 0 2006.229.03:40:28.51#ibcon#end of sib2, iclass 40, count 0 2006.229.03:40:28.51#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:40:28.51#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:40:28.51#ibcon#[25=USB\r\n] 2006.229.03:40:28.51#ibcon#*before write, iclass 40, count 0 2006.229.03:40:28.51#ibcon#enter sib2, iclass 40, count 0 2006.229.03:40:28.51#ibcon#flushed, iclass 40, count 0 2006.229.03:40:28.51#ibcon#about to write, iclass 40, count 0 2006.229.03:40:28.51#ibcon#wrote, iclass 40, count 0 2006.229.03:40:28.51#ibcon#about to read 3, iclass 40, count 0 2006.229.03:40:28.54#ibcon#read 3, iclass 40, count 0 2006.229.03:40:28.54#ibcon#about to read 4, iclass 40, count 0 2006.229.03:40:28.54#ibcon#read 4, iclass 40, count 0 2006.229.03:40:28.54#ibcon#about to read 5, iclass 40, count 0 2006.229.03:40:28.54#ibcon#read 5, iclass 40, count 0 2006.229.03:40:28.54#ibcon#about to read 6, iclass 40, count 0 2006.229.03:40:28.54#ibcon#read 6, iclass 40, count 0 2006.229.03:40:28.54#ibcon#end of sib2, iclass 40, count 0 2006.229.03:40:28.54#ibcon#*after write, iclass 40, count 0 2006.229.03:40:28.54#ibcon#*before return 0, iclass 40, count 0 2006.229.03:40:28.54#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:28.54#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:28.54#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:40:28.54#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:40:28.54$vck44/valo=2,534.99 2006.229.03:40:28.54#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.03:40:28.54#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.03:40:28.54#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:28.54#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:28.54#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:28.54#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:28.54#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:40:28.54#ibcon#first serial, iclass 4, count 0 2006.229.03:40:28.54#ibcon#enter sib2, iclass 4, count 0 2006.229.03:40:28.54#ibcon#flushed, iclass 4, count 0 2006.229.03:40:28.54#ibcon#about to write, iclass 4, count 0 2006.229.03:40:28.54#ibcon#wrote, iclass 4, count 0 2006.229.03:40:28.54#ibcon#about to read 3, iclass 4, count 0 2006.229.03:40:28.56#ibcon#read 3, iclass 4, count 0 2006.229.03:40:28.56#ibcon#about to read 4, iclass 4, count 0 2006.229.03:40:28.56#ibcon#read 4, iclass 4, count 0 2006.229.03:40:28.56#ibcon#about to read 5, iclass 4, count 0 2006.229.03:40:28.56#ibcon#read 5, iclass 4, count 0 2006.229.03:40:28.56#ibcon#about to read 6, iclass 4, count 0 2006.229.03:40:28.56#ibcon#read 6, iclass 4, count 0 2006.229.03:40:28.56#ibcon#end of sib2, iclass 4, count 0 2006.229.03:40:28.56#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:40:28.56#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:40:28.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:40:28.56#ibcon#*before write, iclass 4, count 0 2006.229.03:40:28.56#ibcon#enter sib2, iclass 4, count 0 2006.229.03:40:28.56#ibcon#flushed, iclass 4, count 0 2006.229.03:40:28.56#ibcon#about to write, iclass 4, count 0 2006.229.03:40:28.56#ibcon#wrote, iclass 4, count 0 2006.229.03:40:28.56#ibcon#about to read 3, iclass 4, count 0 2006.229.03:40:28.60#ibcon#read 3, iclass 4, count 0 2006.229.03:40:28.60#ibcon#about to read 4, iclass 4, count 0 2006.229.03:40:28.60#ibcon#read 4, iclass 4, count 0 2006.229.03:40:28.60#ibcon#about to read 5, iclass 4, count 0 2006.229.03:40:28.60#ibcon#read 5, iclass 4, count 0 2006.229.03:40:28.60#ibcon#about to read 6, iclass 4, count 0 2006.229.03:40:28.60#ibcon#read 6, iclass 4, count 0 2006.229.03:40:28.60#ibcon#end of sib2, iclass 4, count 0 2006.229.03:40:28.60#ibcon#*after write, iclass 4, count 0 2006.229.03:40:28.60#ibcon#*before return 0, iclass 4, count 0 2006.229.03:40:28.60#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:28.60#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:28.60#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:40:28.60#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:40:28.60$vck44/va=2,7 2006.229.03:40:28.60#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.03:40:28.60#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.03:40:28.60#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:28.60#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:28.66#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:28.66#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:28.66#ibcon#enter wrdev, iclass 6, count 2 2006.229.03:40:28.66#ibcon#first serial, iclass 6, count 2 2006.229.03:40:28.66#ibcon#enter sib2, iclass 6, count 2 2006.229.03:40:28.66#ibcon#flushed, iclass 6, count 2 2006.229.03:40:28.66#ibcon#about to write, iclass 6, count 2 2006.229.03:40:28.66#ibcon#wrote, iclass 6, count 2 2006.229.03:40:28.66#ibcon#about to read 3, iclass 6, count 2 2006.229.03:40:28.68#ibcon#read 3, iclass 6, count 2 2006.229.03:40:28.68#ibcon#about to read 4, iclass 6, count 2 2006.229.03:40:28.68#ibcon#read 4, iclass 6, count 2 2006.229.03:40:28.68#ibcon#about to read 5, iclass 6, count 2 2006.229.03:40:28.68#ibcon#read 5, iclass 6, count 2 2006.229.03:40:28.68#ibcon#about to read 6, iclass 6, count 2 2006.229.03:40:28.68#ibcon#read 6, iclass 6, count 2 2006.229.03:40:28.68#ibcon#end of sib2, iclass 6, count 2 2006.229.03:40:28.68#ibcon#*mode == 0, iclass 6, count 2 2006.229.03:40:28.68#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.03:40:28.68#ibcon#[25=AT02-07\r\n] 2006.229.03:40:28.68#ibcon#*before write, iclass 6, count 2 2006.229.03:40:28.68#ibcon#enter sib2, iclass 6, count 2 2006.229.03:40:28.68#ibcon#flushed, iclass 6, count 2 2006.229.03:40:28.68#ibcon#about to write, iclass 6, count 2 2006.229.03:40:28.68#ibcon#wrote, iclass 6, count 2 2006.229.03:40:28.68#ibcon#about to read 3, iclass 6, count 2 2006.229.03:40:28.71#ibcon#read 3, iclass 6, count 2 2006.229.03:40:28.71#ibcon#about to read 4, iclass 6, count 2 2006.229.03:40:28.71#ibcon#read 4, iclass 6, count 2 2006.229.03:40:28.71#ibcon#about to read 5, iclass 6, count 2 2006.229.03:40:28.71#ibcon#read 5, iclass 6, count 2 2006.229.03:40:28.71#ibcon#about to read 6, iclass 6, count 2 2006.229.03:40:28.71#ibcon#read 6, iclass 6, count 2 2006.229.03:40:28.71#ibcon#end of sib2, iclass 6, count 2 2006.229.03:40:28.71#ibcon#*after write, iclass 6, count 2 2006.229.03:40:28.71#ibcon#*before return 0, iclass 6, count 2 2006.229.03:40:28.71#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:28.71#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:28.71#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.03:40:28.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:28.71#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:28.83#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:28.83#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:28.83#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:40:28.83#ibcon#first serial, iclass 6, count 0 2006.229.03:40:28.83#ibcon#enter sib2, iclass 6, count 0 2006.229.03:40:28.83#ibcon#flushed, iclass 6, count 0 2006.229.03:40:28.83#ibcon#about to write, iclass 6, count 0 2006.229.03:40:28.83#ibcon#wrote, iclass 6, count 0 2006.229.03:40:28.83#ibcon#about to read 3, iclass 6, count 0 2006.229.03:40:28.85#ibcon#read 3, iclass 6, count 0 2006.229.03:40:28.85#ibcon#about to read 4, iclass 6, count 0 2006.229.03:40:28.85#ibcon#read 4, iclass 6, count 0 2006.229.03:40:28.85#ibcon#about to read 5, iclass 6, count 0 2006.229.03:40:28.85#ibcon#read 5, iclass 6, count 0 2006.229.03:40:28.85#ibcon#about to read 6, iclass 6, count 0 2006.229.03:40:28.85#ibcon#read 6, iclass 6, count 0 2006.229.03:40:28.85#ibcon#end of sib2, iclass 6, count 0 2006.229.03:40:28.85#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:40:28.85#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:40:28.85#ibcon#[25=USB\r\n] 2006.229.03:40:28.85#ibcon#*before write, iclass 6, count 0 2006.229.03:40:28.85#ibcon#enter sib2, iclass 6, count 0 2006.229.03:40:28.85#ibcon#flushed, iclass 6, count 0 2006.229.03:40:28.85#ibcon#about to write, iclass 6, count 0 2006.229.03:40:28.85#ibcon#wrote, iclass 6, count 0 2006.229.03:40:28.85#ibcon#about to read 3, iclass 6, count 0 2006.229.03:40:28.88#ibcon#read 3, iclass 6, count 0 2006.229.03:40:28.88#ibcon#about to read 4, iclass 6, count 0 2006.229.03:40:28.88#ibcon#read 4, iclass 6, count 0 2006.229.03:40:28.88#ibcon#about to read 5, iclass 6, count 0 2006.229.03:40:28.88#ibcon#read 5, iclass 6, count 0 2006.229.03:40:28.88#ibcon#about to read 6, iclass 6, count 0 2006.229.03:40:28.88#ibcon#read 6, iclass 6, count 0 2006.229.03:40:28.88#ibcon#end of sib2, iclass 6, count 0 2006.229.03:40:28.88#ibcon#*after write, iclass 6, count 0 2006.229.03:40:28.88#ibcon#*before return 0, iclass 6, count 0 2006.229.03:40:28.88#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:28.88#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:28.88#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:40:28.88#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:40:28.88$vck44/valo=3,564.99 2006.229.03:40:28.88#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.03:40:28.88#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.03:40:28.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:28.88#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:28.88#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:28.88#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:28.88#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:40:28.88#ibcon#first serial, iclass 10, count 0 2006.229.03:40:28.88#ibcon#enter sib2, iclass 10, count 0 2006.229.03:40:28.88#ibcon#flushed, iclass 10, count 0 2006.229.03:40:28.88#ibcon#about to write, iclass 10, count 0 2006.229.03:40:28.88#ibcon#wrote, iclass 10, count 0 2006.229.03:40:28.88#ibcon#about to read 3, iclass 10, count 0 2006.229.03:40:28.90#ibcon#read 3, iclass 10, count 0 2006.229.03:40:28.90#ibcon#about to read 4, iclass 10, count 0 2006.229.03:40:28.90#ibcon#read 4, iclass 10, count 0 2006.229.03:40:28.90#ibcon#about to read 5, iclass 10, count 0 2006.229.03:40:28.90#ibcon#read 5, iclass 10, count 0 2006.229.03:40:28.90#ibcon#about to read 6, iclass 10, count 0 2006.229.03:40:28.90#ibcon#read 6, iclass 10, count 0 2006.229.03:40:28.90#ibcon#end of sib2, iclass 10, count 0 2006.229.03:40:28.90#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:40:28.90#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:40:28.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:40:28.90#ibcon#*before write, iclass 10, count 0 2006.229.03:40:28.90#ibcon#enter sib2, iclass 10, count 0 2006.229.03:40:28.90#ibcon#flushed, iclass 10, count 0 2006.229.03:40:28.90#ibcon#about to write, iclass 10, count 0 2006.229.03:40:28.90#ibcon#wrote, iclass 10, count 0 2006.229.03:40:28.90#ibcon#about to read 3, iclass 10, count 0 2006.229.03:40:28.94#ibcon#read 3, iclass 10, count 0 2006.229.03:40:28.94#ibcon#about to read 4, iclass 10, count 0 2006.229.03:40:28.94#ibcon#read 4, iclass 10, count 0 2006.229.03:40:28.94#ibcon#about to read 5, iclass 10, count 0 2006.229.03:40:28.94#ibcon#read 5, iclass 10, count 0 2006.229.03:40:28.94#ibcon#about to read 6, iclass 10, count 0 2006.229.03:40:28.94#ibcon#read 6, iclass 10, count 0 2006.229.03:40:28.94#ibcon#end of sib2, iclass 10, count 0 2006.229.03:40:28.94#ibcon#*after write, iclass 10, count 0 2006.229.03:40:28.94#ibcon#*before return 0, iclass 10, count 0 2006.229.03:40:28.94#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:28.94#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:28.94#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:40:28.94#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:40:28.94$vck44/va=3,6 2006.229.03:40:28.94#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.03:40:28.94#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.03:40:28.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:28.94#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:29.00#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:29.00#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:29.00#ibcon#enter wrdev, iclass 12, count 2 2006.229.03:40:29.00#ibcon#first serial, iclass 12, count 2 2006.229.03:40:29.00#ibcon#enter sib2, iclass 12, count 2 2006.229.03:40:29.00#ibcon#flushed, iclass 12, count 2 2006.229.03:40:29.00#ibcon#about to write, iclass 12, count 2 2006.229.03:40:29.00#ibcon#wrote, iclass 12, count 2 2006.229.03:40:29.00#ibcon#about to read 3, iclass 12, count 2 2006.229.03:40:29.02#ibcon#read 3, iclass 12, count 2 2006.229.03:40:29.02#ibcon#about to read 4, iclass 12, count 2 2006.229.03:40:29.02#ibcon#read 4, iclass 12, count 2 2006.229.03:40:29.02#ibcon#about to read 5, iclass 12, count 2 2006.229.03:40:29.02#ibcon#read 5, iclass 12, count 2 2006.229.03:40:29.02#ibcon#about to read 6, iclass 12, count 2 2006.229.03:40:29.02#ibcon#read 6, iclass 12, count 2 2006.229.03:40:29.02#ibcon#end of sib2, iclass 12, count 2 2006.229.03:40:29.02#ibcon#*mode == 0, iclass 12, count 2 2006.229.03:40:29.02#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.03:40:29.02#ibcon#[25=AT03-06\r\n] 2006.229.03:40:29.02#ibcon#*before write, iclass 12, count 2 2006.229.03:40:29.02#ibcon#enter sib2, iclass 12, count 2 2006.229.03:40:29.02#ibcon#flushed, iclass 12, count 2 2006.229.03:40:29.02#ibcon#about to write, iclass 12, count 2 2006.229.03:40:29.02#ibcon#wrote, iclass 12, count 2 2006.229.03:40:29.02#ibcon#about to read 3, iclass 12, count 2 2006.229.03:40:29.05#ibcon#read 3, iclass 12, count 2 2006.229.03:40:29.05#ibcon#about to read 4, iclass 12, count 2 2006.229.03:40:29.05#ibcon#read 4, iclass 12, count 2 2006.229.03:40:29.05#ibcon#about to read 5, iclass 12, count 2 2006.229.03:40:29.05#ibcon#read 5, iclass 12, count 2 2006.229.03:40:29.05#ibcon#about to read 6, iclass 12, count 2 2006.229.03:40:29.05#ibcon#read 6, iclass 12, count 2 2006.229.03:40:29.05#ibcon#end of sib2, iclass 12, count 2 2006.229.03:40:29.05#ibcon#*after write, iclass 12, count 2 2006.229.03:40:29.05#ibcon#*before return 0, iclass 12, count 2 2006.229.03:40:29.05#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:29.05#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:29.05#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.03:40:29.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:29.05#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:29.17#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:29.17#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:29.17#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:40:29.17#ibcon#first serial, iclass 12, count 0 2006.229.03:40:29.17#ibcon#enter sib2, iclass 12, count 0 2006.229.03:40:29.17#ibcon#flushed, iclass 12, count 0 2006.229.03:40:29.17#ibcon#about to write, iclass 12, count 0 2006.229.03:40:29.17#ibcon#wrote, iclass 12, count 0 2006.229.03:40:29.17#ibcon#about to read 3, iclass 12, count 0 2006.229.03:40:29.19#ibcon#read 3, iclass 12, count 0 2006.229.03:40:29.19#ibcon#about to read 4, iclass 12, count 0 2006.229.03:40:29.19#ibcon#read 4, iclass 12, count 0 2006.229.03:40:29.19#ibcon#about to read 5, iclass 12, count 0 2006.229.03:40:29.19#ibcon#read 5, iclass 12, count 0 2006.229.03:40:29.19#ibcon#about to read 6, iclass 12, count 0 2006.229.03:40:29.19#ibcon#read 6, iclass 12, count 0 2006.229.03:40:29.19#ibcon#end of sib2, iclass 12, count 0 2006.229.03:40:29.19#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:40:29.19#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:40:29.19#ibcon#[25=USB\r\n] 2006.229.03:40:29.19#ibcon#*before write, iclass 12, count 0 2006.229.03:40:29.19#ibcon#enter sib2, iclass 12, count 0 2006.229.03:40:29.19#ibcon#flushed, iclass 12, count 0 2006.229.03:40:29.19#ibcon#about to write, iclass 12, count 0 2006.229.03:40:29.19#ibcon#wrote, iclass 12, count 0 2006.229.03:40:29.19#ibcon#about to read 3, iclass 12, count 0 2006.229.03:40:29.22#ibcon#read 3, iclass 12, count 0 2006.229.03:40:29.22#ibcon#about to read 4, iclass 12, count 0 2006.229.03:40:29.22#ibcon#read 4, iclass 12, count 0 2006.229.03:40:29.22#ibcon#about to read 5, iclass 12, count 0 2006.229.03:40:29.22#ibcon#read 5, iclass 12, count 0 2006.229.03:40:29.22#ibcon#about to read 6, iclass 12, count 0 2006.229.03:40:29.22#ibcon#read 6, iclass 12, count 0 2006.229.03:40:29.22#ibcon#end of sib2, iclass 12, count 0 2006.229.03:40:29.22#ibcon#*after write, iclass 12, count 0 2006.229.03:40:29.22#ibcon#*before return 0, iclass 12, count 0 2006.229.03:40:29.22#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:29.22#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:29.22#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:40:29.22#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:40:29.22$vck44/valo=4,624.99 2006.229.03:40:29.22#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.03:40:29.22#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.03:40:29.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:29.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:29.22#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:29.22#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:29.22#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:40:29.22#ibcon#first serial, iclass 14, count 0 2006.229.03:40:29.22#ibcon#enter sib2, iclass 14, count 0 2006.229.03:40:29.22#ibcon#flushed, iclass 14, count 0 2006.229.03:40:29.22#ibcon#about to write, iclass 14, count 0 2006.229.03:40:29.22#ibcon#wrote, iclass 14, count 0 2006.229.03:40:29.22#ibcon#about to read 3, iclass 14, count 0 2006.229.03:40:29.24#ibcon#read 3, iclass 14, count 0 2006.229.03:40:29.24#ibcon#about to read 4, iclass 14, count 0 2006.229.03:40:29.24#ibcon#read 4, iclass 14, count 0 2006.229.03:40:29.24#ibcon#about to read 5, iclass 14, count 0 2006.229.03:40:29.24#ibcon#read 5, iclass 14, count 0 2006.229.03:40:29.24#ibcon#about to read 6, iclass 14, count 0 2006.229.03:40:29.24#ibcon#read 6, iclass 14, count 0 2006.229.03:40:29.24#ibcon#end of sib2, iclass 14, count 0 2006.229.03:40:29.24#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:40:29.24#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:40:29.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:40:29.24#ibcon#*before write, iclass 14, count 0 2006.229.03:40:29.24#ibcon#enter sib2, iclass 14, count 0 2006.229.03:40:29.24#ibcon#flushed, iclass 14, count 0 2006.229.03:40:29.24#ibcon#about to write, iclass 14, count 0 2006.229.03:40:29.24#ibcon#wrote, iclass 14, count 0 2006.229.03:40:29.24#ibcon#about to read 3, iclass 14, count 0 2006.229.03:40:29.28#ibcon#read 3, iclass 14, count 0 2006.229.03:40:29.28#ibcon#about to read 4, iclass 14, count 0 2006.229.03:40:29.28#ibcon#read 4, iclass 14, count 0 2006.229.03:40:29.28#ibcon#about to read 5, iclass 14, count 0 2006.229.03:40:29.28#ibcon#read 5, iclass 14, count 0 2006.229.03:40:29.28#ibcon#about to read 6, iclass 14, count 0 2006.229.03:40:29.28#ibcon#read 6, iclass 14, count 0 2006.229.03:40:29.28#ibcon#end of sib2, iclass 14, count 0 2006.229.03:40:29.28#ibcon#*after write, iclass 14, count 0 2006.229.03:40:29.28#ibcon#*before return 0, iclass 14, count 0 2006.229.03:40:29.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:29.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:29.28#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:40:29.28#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:40:29.28$vck44/va=4,7 2006.229.03:40:29.28#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.03:40:29.28#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.03:40:29.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:29.28#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:29.34#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:29.34#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:29.34#ibcon#enter wrdev, iclass 16, count 2 2006.229.03:40:29.34#ibcon#first serial, iclass 16, count 2 2006.229.03:40:29.34#ibcon#enter sib2, iclass 16, count 2 2006.229.03:40:29.34#ibcon#flushed, iclass 16, count 2 2006.229.03:40:29.34#ibcon#about to write, iclass 16, count 2 2006.229.03:40:29.34#ibcon#wrote, iclass 16, count 2 2006.229.03:40:29.34#ibcon#about to read 3, iclass 16, count 2 2006.229.03:40:29.36#ibcon#read 3, iclass 16, count 2 2006.229.03:40:29.36#ibcon#about to read 4, iclass 16, count 2 2006.229.03:40:29.36#ibcon#read 4, iclass 16, count 2 2006.229.03:40:29.36#ibcon#about to read 5, iclass 16, count 2 2006.229.03:40:29.36#ibcon#read 5, iclass 16, count 2 2006.229.03:40:29.36#ibcon#about to read 6, iclass 16, count 2 2006.229.03:40:29.36#ibcon#read 6, iclass 16, count 2 2006.229.03:40:29.36#ibcon#end of sib2, iclass 16, count 2 2006.229.03:40:29.36#ibcon#*mode == 0, iclass 16, count 2 2006.229.03:40:29.36#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.03:40:29.36#ibcon#[25=AT04-07\r\n] 2006.229.03:40:29.36#ibcon#*before write, iclass 16, count 2 2006.229.03:40:29.36#ibcon#enter sib2, iclass 16, count 2 2006.229.03:40:29.36#ibcon#flushed, iclass 16, count 2 2006.229.03:40:29.36#ibcon#about to write, iclass 16, count 2 2006.229.03:40:29.36#ibcon#wrote, iclass 16, count 2 2006.229.03:40:29.36#ibcon#about to read 3, iclass 16, count 2 2006.229.03:40:29.39#ibcon#read 3, iclass 16, count 2 2006.229.03:40:29.39#ibcon#about to read 4, iclass 16, count 2 2006.229.03:40:29.39#ibcon#read 4, iclass 16, count 2 2006.229.03:40:29.39#ibcon#about to read 5, iclass 16, count 2 2006.229.03:40:29.39#ibcon#read 5, iclass 16, count 2 2006.229.03:40:29.39#ibcon#about to read 6, iclass 16, count 2 2006.229.03:40:29.39#ibcon#read 6, iclass 16, count 2 2006.229.03:40:29.39#ibcon#end of sib2, iclass 16, count 2 2006.229.03:40:29.39#ibcon#*after write, iclass 16, count 2 2006.229.03:40:29.39#ibcon#*before return 0, iclass 16, count 2 2006.229.03:40:29.39#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:29.39#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:29.39#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.03:40:29.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:29.39#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:29.51#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:29.51#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:29.51#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:40:29.51#ibcon#first serial, iclass 16, count 0 2006.229.03:40:29.51#ibcon#enter sib2, iclass 16, count 0 2006.229.03:40:29.51#ibcon#flushed, iclass 16, count 0 2006.229.03:40:29.51#ibcon#about to write, iclass 16, count 0 2006.229.03:40:29.51#ibcon#wrote, iclass 16, count 0 2006.229.03:40:29.51#ibcon#about to read 3, iclass 16, count 0 2006.229.03:40:29.53#ibcon#read 3, iclass 16, count 0 2006.229.03:40:29.53#ibcon#about to read 4, iclass 16, count 0 2006.229.03:40:29.53#ibcon#read 4, iclass 16, count 0 2006.229.03:40:29.53#ibcon#about to read 5, iclass 16, count 0 2006.229.03:40:29.53#ibcon#read 5, iclass 16, count 0 2006.229.03:40:29.53#ibcon#about to read 6, iclass 16, count 0 2006.229.03:40:29.53#ibcon#read 6, iclass 16, count 0 2006.229.03:40:29.53#ibcon#end of sib2, iclass 16, count 0 2006.229.03:40:29.53#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:40:29.53#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:40:29.53#ibcon#[25=USB\r\n] 2006.229.03:40:29.53#ibcon#*before write, iclass 16, count 0 2006.229.03:40:29.53#ibcon#enter sib2, iclass 16, count 0 2006.229.03:40:29.53#ibcon#flushed, iclass 16, count 0 2006.229.03:40:29.53#ibcon#about to write, iclass 16, count 0 2006.229.03:40:29.53#ibcon#wrote, iclass 16, count 0 2006.229.03:40:29.53#ibcon#about to read 3, iclass 16, count 0 2006.229.03:40:29.56#ibcon#read 3, iclass 16, count 0 2006.229.03:40:29.56#ibcon#about to read 4, iclass 16, count 0 2006.229.03:40:29.56#ibcon#read 4, iclass 16, count 0 2006.229.03:40:29.56#ibcon#about to read 5, iclass 16, count 0 2006.229.03:40:29.56#ibcon#read 5, iclass 16, count 0 2006.229.03:40:29.56#ibcon#about to read 6, iclass 16, count 0 2006.229.03:40:29.56#ibcon#read 6, iclass 16, count 0 2006.229.03:40:29.56#ibcon#end of sib2, iclass 16, count 0 2006.229.03:40:29.56#ibcon#*after write, iclass 16, count 0 2006.229.03:40:29.56#ibcon#*before return 0, iclass 16, count 0 2006.229.03:40:29.56#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:29.56#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:29.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:40:29.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:40:29.56$vck44/valo=5,734.99 2006.229.03:40:29.56#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.03:40:29.56#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.03:40:29.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:29.56#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:29.56#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:29.56#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:29.56#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:40:29.56#ibcon#first serial, iclass 18, count 0 2006.229.03:40:29.56#ibcon#enter sib2, iclass 18, count 0 2006.229.03:40:29.56#ibcon#flushed, iclass 18, count 0 2006.229.03:40:29.56#ibcon#about to write, iclass 18, count 0 2006.229.03:40:29.56#ibcon#wrote, iclass 18, count 0 2006.229.03:40:29.56#ibcon#about to read 3, iclass 18, count 0 2006.229.03:40:29.58#ibcon#read 3, iclass 18, count 0 2006.229.03:40:29.58#ibcon#about to read 4, iclass 18, count 0 2006.229.03:40:29.58#ibcon#read 4, iclass 18, count 0 2006.229.03:40:29.58#ibcon#about to read 5, iclass 18, count 0 2006.229.03:40:29.58#ibcon#read 5, iclass 18, count 0 2006.229.03:40:29.58#ibcon#about to read 6, iclass 18, count 0 2006.229.03:40:29.58#ibcon#read 6, iclass 18, count 0 2006.229.03:40:29.58#ibcon#end of sib2, iclass 18, count 0 2006.229.03:40:29.58#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:40:29.58#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:40:29.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:40:29.58#ibcon#*before write, iclass 18, count 0 2006.229.03:40:29.58#ibcon#enter sib2, iclass 18, count 0 2006.229.03:40:29.58#ibcon#flushed, iclass 18, count 0 2006.229.03:40:29.58#ibcon#about to write, iclass 18, count 0 2006.229.03:40:29.58#ibcon#wrote, iclass 18, count 0 2006.229.03:40:29.58#ibcon#about to read 3, iclass 18, count 0 2006.229.03:40:29.62#ibcon#read 3, iclass 18, count 0 2006.229.03:40:29.62#ibcon#about to read 4, iclass 18, count 0 2006.229.03:40:29.62#ibcon#read 4, iclass 18, count 0 2006.229.03:40:29.62#ibcon#about to read 5, iclass 18, count 0 2006.229.03:40:29.62#ibcon#read 5, iclass 18, count 0 2006.229.03:40:29.62#ibcon#about to read 6, iclass 18, count 0 2006.229.03:40:29.62#ibcon#read 6, iclass 18, count 0 2006.229.03:40:29.62#ibcon#end of sib2, iclass 18, count 0 2006.229.03:40:29.62#ibcon#*after write, iclass 18, count 0 2006.229.03:40:29.62#ibcon#*before return 0, iclass 18, count 0 2006.229.03:40:29.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:29.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:29.62#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:40:29.62#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:40:29.62$vck44/va=5,4 2006.229.03:40:29.62#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.03:40:29.62#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.03:40:29.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:29.62#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:29.68#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:29.68#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:29.68#ibcon#enter wrdev, iclass 20, count 2 2006.229.03:40:29.68#ibcon#first serial, iclass 20, count 2 2006.229.03:40:29.68#ibcon#enter sib2, iclass 20, count 2 2006.229.03:40:29.68#ibcon#flushed, iclass 20, count 2 2006.229.03:40:29.68#ibcon#about to write, iclass 20, count 2 2006.229.03:40:29.68#ibcon#wrote, iclass 20, count 2 2006.229.03:40:29.68#ibcon#about to read 3, iclass 20, count 2 2006.229.03:40:29.70#ibcon#read 3, iclass 20, count 2 2006.229.03:40:29.70#ibcon#about to read 4, iclass 20, count 2 2006.229.03:40:29.70#ibcon#read 4, iclass 20, count 2 2006.229.03:40:29.70#ibcon#about to read 5, iclass 20, count 2 2006.229.03:40:29.70#ibcon#read 5, iclass 20, count 2 2006.229.03:40:29.70#ibcon#about to read 6, iclass 20, count 2 2006.229.03:40:29.70#ibcon#read 6, iclass 20, count 2 2006.229.03:40:29.70#ibcon#end of sib2, iclass 20, count 2 2006.229.03:40:29.70#ibcon#*mode == 0, iclass 20, count 2 2006.229.03:40:29.70#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.03:40:29.70#ibcon#[25=AT05-04\r\n] 2006.229.03:40:29.70#ibcon#*before write, iclass 20, count 2 2006.229.03:40:29.70#ibcon#enter sib2, iclass 20, count 2 2006.229.03:40:29.70#ibcon#flushed, iclass 20, count 2 2006.229.03:40:29.70#ibcon#about to write, iclass 20, count 2 2006.229.03:40:29.70#ibcon#wrote, iclass 20, count 2 2006.229.03:40:29.70#ibcon#about to read 3, iclass 20, count 2 2006.229.03:40:29.73#ibcon#read 3, iclass 20, count 2 2006.229.03:40:29.73#ibcon#about to read 4, iclass 20, count 2 2006.229.03:40:29.73#ibcon#read 4, iclass 20, count 2 2006.229.03:40:29.73#ibcon#about to read 5, iclass 20, count 2 2006.229.03:40:29.73#ibcon#read 5, iclass 20, count 2 2006.229.03:40:29.73#ibcon#about to read 6, iclass 20, count 2 2006.229.03:40:29.73#ibcon#read 6, iclass 20, count 2 2006.229.03:40:29.73#ibcon#end of sib2, iclass 20, count 2 2006.229.03:40:29.73#ibcon#*after write, iclass 20, count 2 2006.229.03:40:29.73#ibcon#*before return 0, iclass 20, count 2 2006.229.03:40:29.73#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:29.73#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:29.73#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.03:40:29.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:29.73#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:29.85#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:29.85#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:29.85#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:40:29.85#ibcon#first serial, iclass 20, count 0 2006.229.03:40:29.85#ibcon#enter sib2, iclass 20, count 0 2006.229.03:40:29.85#ibcon#flushed, iclass 20, count 0 2006.229.03:40:29.85#ibcon#about to write, iclass 20, count 0 2006.229.03:40:29.85#ibcon#wrote, iclass 20, count 0 2006.229.03:40:29.85#ibcon#about to read 3, iclass 20, count 0 2006.229.03:40:29.87#ibcon#read 3, iclass 20, count 0 2006.229.03:40:29.87#ibcon#about to read 4, iclass 20, count 0 2006.229.03:40:29.87#ibcon#read 4, iclass 20, count 0 2006.229.03:40:29.87#ibcon#about to read 5, iclass 20, count 0 2006.229.03:40:29.87#ibcon#read 5, iclass 20, count 0 2006.229.03:40:29.87#ibcon#about to read 6, iclass 20, count 0 2006.229.03:40:29.87#ibcon#read 6, iclass 20, count 0 2006.229.03:40:29.87#ibcon#end of sib2, iclass 20, count 0 2006.229.03:40:29.87#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:40:29.87#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:40:29.87#ibcon#[25=USB\r\n] 2006.229.03:40:29.87#ibcon#*before write, iclass 20, count 0 2006.229.03:40:29.87#ibcon#enter sib2, iclass 20, count 0 2006.229.03:40:29.87#ibcon#flushed, iclass 20, count 0 2006.229.03:40:29.87#ibcon#about to write, iclass 20, count 0 2006.229.03:40:29.87#ibcon#wrote, iclass 20, count 0 2006.229.03:40:29.87#ibcon#about to read 3, iclass 20, count 0 2006.229.03:40:29.90#ibcon#read 3, iclass 20, count 0 2006.229.03:40:29.90#ibcon#about to read 4, iclass 20, count 0 2006.229.03:40:29.90#ibcon#read 4, iclass 20, count 0 2006.229.03:40:29.90#ibcon#about to read 5, iclass 20, count 0 2006.229.03:40:29.90#ibcon#read 5, iclass 20, count 0 2006.229.03:40:29.90#ibcon#about to read 6, iclass 20, count 0 2006.229.03:40:29.90#ibcon#read 6, iclass 20, count 0 2006.229.03:40:29.90#ibcon#end of sib2, iclass 20, count 0 2006.229.03:40:29.90#ibcon#*after write, iclass 20, count 0 2006.229.03:40:29.90#ibcon#*before return 0, iclass 20, count 0 2006.229.03:40:29.90#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:29.90#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:29.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:40:29.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:40:29.90$vck44/valo=6,814.99 2006.229.03:40:29.90#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.03:40:29.90#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.03:40:29.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:29.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:40:29.90#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:40:29.90#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:40:29.90#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:40:29.90#ibcon#first serial, iclass 22, count 0 2006.229.03:40:29.90#ibcon#enter sib2, iclass 22, count 0 2006.229.03:40:29.90#ibcon#flushed, iclass 22, count 0 2006.229.03:40:29.90#ibcon#about to write, iclass 22, count 0 2006.229.03:40:29.90#ibcon#wrote, iclass 22, count 0 2006.229.03:40:29.90#ibcon#about to read 3, iclass 22, count 0 2006.229.03:40:29.92#ibcon#read 3, iclass 22, count 0 2006.229.03:40:29.92#ibcon#about to read 4, iclass 22, count 0 2006.229.03:40:29.92#ibcon#read 4, iclass 22, count 0 2006.229.03:40:29.92#ibcon#about to read 5, iclass 22, count 0 2006.229.03:40:29.92#ibcon#read 5, iclass 22, count 0 2006.229.03:40:29.92#ibcon#about to read 6, iclass 22, count 0 2006.229.03:40:29.92#ibcon#read 6, iclass 22, count 0 2006.229.03:40:29.92#ibcon#end of sib2, iclass 22, count 0 2006.229.03:40:29.92#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:40:29.92#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:40:29.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:40:29.92#ibcon#*before write, iclass 22, count 0 2006.229.03:40:29.92#ibcon#enter sib2, iclass 22, count 0 2006.229.03:40:29.92#ibcon#flushed, iclass 22, count 0 2006.229.03:40:29.92#ibcon#about to write, iclass 22, count 0 2006.229.03:40:29.92#ibcon#wrote, iclass 22, count 0 2006.229.03:40:29.92#ibcon#about to read 3, iclass 22, count 0 2006.229.03:40:29.96#ibcon#read 3, iclass 22, count 0 2006.229.03:40:29.96#ibcon#about to read 4, iclass 22, count 0 2006.229.03:40:29.96#ibcon#read 4, iclass 22, count 0 2006.229.03:40:29.96#ibcon#about to read 5, iclass 22, count 0 2006.229.03:40:29.96#ibcon#read 5, iclass 22, count 0 2006.229.03:40:29.96#ibcon#about to read 6, iclass 22, count 0 2006.229.03:40:29.96#ibcon#read 6, iclass 22, count 0 2006.229.03:40:29.96#ibcon#end of sib2, iclass 22, count 0 2006.229.03:40:29.96#ibcon#*after write, iclass 22, count 0 2006.229.03:40:29.96#ibcon#*before return 0, iclass 22, count 0 2006.229.03:40:29.96#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:40:29.96#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.03:40:29.96#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:40:29.96#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:40:29.96$vck44/va=6,4 2006.229.03:40:29.96#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.03:40:29.96#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.03:40:29.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:29.96#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:40:30.02#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:40:30.02#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:40:30.02#ibcon#enter wrdev, iclass 24, count 2 2006.229.03:40:30.02#ibcon#first serial, iclass 24, count 2 2006.229.03:40:30.02#ibcon#enter sib2, iclass 24, count 2 2006.229.03:40:30.02#ibcon#flushed, iclass 24, count 2 2006.229.03:40:30.02#ibcon#about to write, iclass 24, count 2 2006.229.03:40:30.02#ibcon#wrote, iclass 24, count 2 2006.229.03:40:30.02#ibcon#about to read 3, iclass 24, count 2 2006.229.03:40:30.04#ibcon#read 3, iclass 24, count 2 2006.229.03:40:30.04#ibcon#about to read 4, iclass 24, count 2 2006.229.03:40:30.04#ibcon#read 4, iclass 24, count 2 2006.229.03:40:30.04#ibcon#about to read 5, iclass 24, count 2 2006.229.03:40:30.04#ibcon#read 5, iclass 24, count 2 2006.229.03:40:30.04#ibcon#about to read 6, iclass 24, count 2 2006.229.03:40:30.04#ibcon#read 6, iclass 24, count 2 2006.229.03:40:30.04#ibcon#end of sib2, iclass 24, count 2 2006.229.03:40:30.04#ibcon#*mode == 0, iclass 24, count 2 2006.229.03:40:30.04#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.03:40:30.04#ibcon#[25=AT06-04\r\n] 2006.229.03:40:30.04#ibcon#*before write, iclass 24, count 2 2006.229.03:40:30.04#ibcon#enter sib2, iclass 24, count 2 2006.229.03:40:30.04#ibcon#flushed, iclass 24, count 2 2006.229.03:40:30.04#ibcon#about to write, iclass 24, count 2 2006.229.03:40:30.04#ibcon#wrote, iclass 24, count 2 2006.229.03:40:30.04#ibcon#about to read 3, iclass 24, count 2 2006.229.03:40:30.07#ibcon#read 3, iclass 24, count 2 2006.229.03:40:30.07#ibcon#about to read 4, iclass 24, count 2 2006.229.03:40:30.07#ibcon#read 4, iclass 24, count 2 2006.229.03:40:30.07#ibcon#about to read 5, iclass 24, count 2 2006.229.03:40:30.07#ibcon#read 5, iclass 24, count 2 2006.229.03:40:30.07#ibcon#about to read 6, iclass 24, count 2 2006.229.03:40:30.07#ibcon#read 6, iclass 24, count 2 2006.229.03:40:30.07#ibcon#end of sib2, iclass 24, count 2 2006.229.03:40:30.07#ibcon#*after write, iclass 24, count 2 2006.229.03:40:30.07#ibcon#*before return 0, iclass 24, count 2 2006.229.03:40:30.07#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:40:30.07#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.03:40:30.07#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.03:40:30.07#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:30.07#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:40:30.19#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:40:30.19#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:40:30.19#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:40:30.19#ibcon#first serial, iclass 24, count 0 2006.229.03:40:30.19#ibcon#enter sib2, iclass 24, count 0 2006.229.03:40:30.19#ibcon#flushed, iclass 24, count 0 2006.229.03:40:30.19#ibcon#about to write, iclass 24, count 0 2006.229.03:40:30.19#ibcon#wrote, iclass 24, count 0 2006.229.03:40:30.19#ibcon#about to read 3, iclass 24, count 0 2006.229.03:40:30.21#ibcon#read 3, iclass 24, count 0 2006.229.03:40:30.21#ibcon#about to read 4, iclass 24, count 0 2006.229.03:40:30.21#ibcon#read 4, iclass 24, count 0 2006.229.03:40:30.21#ibcon#about to read 5, iclass 24, count 0 2006.229.03:40:30.21#ibcon#read 5, iclass 24, count 0 2006.229.03:40:30.21#ibcon#about to read 6, iclass 24, count 0 2006.229.03:40:30.21#ibcon#read 6, iclass 24, count 0 2006.229.03:40:30.21#ibcon#end of sib2, iclass 24, count 0 2006.229.03:40:30.21#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:40:30.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:40:30.21#ibcon#[25=USB\r\n] 2006.229.03:40:30.21#ibcon#*before write, iclass 24, count 0 2006.229.03:40:30.21#ibcon#enter sib2, iclass 24, count 0 2006.229.03:40:30.21#ibcon#flushed, iclass 24, count 0 2006.229.03:40:30.21#ibcon#about to write, iclass 24, count 0 2006.229.03:40:30.21#ibcon#wrote, iclass 24, count 0 2006.229.03:40:30.21#ibcon#about to read 3, iclass 24, count 0 2006.229.03:40:30.24#ibcon#read 3, iclass 24, count 0 2006.229.03:40:30.24#ibcon#about to read 4, iclass 24, count 0 2006.229.03:40:30.24#ibcon#read 4, iclass 24, count 0 2006.229.03:40:30.24#ibcon#about to read 5, iclass 24, count 0 2006.229.03:40:30.24#ibcon#read 5, iclass 24, count 0 2006.229.03:40:30.24#ibcon#about to read 6, iclass 24, count 0 2006.229.03:40:30.24#ibcon#read 6, iclass 24, count 0 2006.229.03:40:30.24#ibcon#end of sib2, iclass 24, count 0 2006.229.03:40:30.24#ibcon#*after write, iclass 24, count 0 2006.229.03:40:30.24#ibcon#*before return 0, iclass 24, count 0 2006.229.03:40:30.24#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:40:30.24#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.03:40:30.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:40:30.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:40:30.24$vck44/valo=7,864.99 2006.229.03:40:30.24#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.03:40:30.24#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.03:40:30.24#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:30.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:40:30.24#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:40:30.24#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:40:30.24#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:40:30.24#ibcon#first serial, iclass 26, count 0 2006.229.03:40:30.24#ibcon#enter sib2, iclass 26, count 0 2006.229.03:40:30.24#ibcon#flushed, iclass 26, count 0 2006.229.03:40:30.24#ibcon#about to write, iclass 26, count 0 2006.229.03:40:30.24#ibcon#wrote, iclass 26, count 0 2006.229.03:40:30.24#ibcon#about to read 3, iclass 26, count 0 2006.229.03:40:30.26#ibcon#read 3, iclass 26, count 0 2006.229.03:40:30.26#ibcon#about to read 4, iclass 26, count 0 2006.229.03:40:30.26#ibcon#read 4, iclass 26, count 0 2006.229.03:40:30.26#ibcon#about to read 5, iclass 26, count 0 2006.229.03:40:30.26#ibcon#read 5, iclass 26, count 0 2006.229.03:40:30.26#ibcon#about to read 6, iclass 26, count 0 2006.229.03:40:30.26#ibcon#read 6, iclass 26, count 0 2006.229.03:40:30.26#ibcon#end of sib2, iclass 26, count 0 2006.229.03:40:30.26#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:40:30.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:40:30.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:40:30.26#ibcon#*before write, iclass 26, count 0 2006.229.03:40:30.26#ibcon#enter sib2, iclass 26, count 0 2006.229.03:40:30.26#ibcon#flushed, iclass 26, count 0 2006.229.03:40:30.26#ibcon#about to write, iclass 26, count 0 2006.229.03:40:30.26#ibcon#wrote, iclass 26, count 0 2006.229.03:40:30.26#ibcon#about to read 3, iclass 26, count 0 2006.229.03:40:30.30#ibcon#read 3, iclass 26, count 0 2006.229.03:40:30.30#ibcon#about to read 4, iclass 26, count 0 2006.229.03:40:30.30#ibcon#read 4, iclass 26, count 0 2006.229.03:40:30.30#ibcon#about to read 5, iclass 26, count 0 2006.229.03:40:30.30#ibcon#read 5, iclass 26, count 0 2006.229.03:40:30.30#ibcon#about to read 6, iclass 26, count 0 2006.229.03:40:30.30#ibcon#read 6, iclass 26, count 0 2006.229.03:40:30.30#ibcon#end of sib2, iclass 26, count 0 2006.229.03:40:30.30#ibcon#*after write, iclass 26, count 0 2006.229.03:40:30.30#ibcon#*before return 0, iclass 26, count 0 2006.229.03:40:30.30#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:40:30.30#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.03:40:30.30#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:40:30.30#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:40:30.30$vck44/va=7,5 2006.229.03:40:30.30#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.03:40:30.30#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.03:40:30.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:30.30#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:30.36#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:30.36#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:30.36#ibcon#enter wrdev, iclass 28, count 2 2006.229.03:40:30.36#ibcon#first serial, iclass 28, count 2 2006.229.03:40:30.36#ibcon#enter sib2, iclass 28, count 2 2006.229.03:40:30.36#ibcon#flushed, iclass 28, count 2 2006.229.03:40:30.36#ibcon#about to write, iclass 28, count 2 2006.229.03:40:30.36#ibcon#wrote, iclass 28, count 2 2006.229.03:40:30.36#ibcon#about to read 3, iclass 28, count 2 2006.229.03:40:30.38#ibcon#read 3, iclass 28, count 2 2006.229.03:40:30.38#ibcon#about to read 4, iclass 28, count 2 2006.229.03:40:30.38#ibcon#read 4, iclass 28, count 2 2006.229.03:40:30.38#ibcon#about to read 5, iclass 28, count 2 2006.229.03:40:30.38#ibcon#read 5, iclass 28, count 2 2006.229.03:40:30.38#ibcon#about to read 6, iclass 28, count 2 2006.229.03:40:30.38#ibcon#read 6, iclass 28, count 2 2006.229.03:40:30.38#ibcon#end of sib2, iclass 28, count 2 2006.229.03:40:30.38#ibcon#*mode == 0, iclass 28, count 2 2006.229.03:40:30.38#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.03:40:30.38#ibcon#[25=AT07-05\r\n] 2006.229.03:40:30.38#ibcon#*before write, iclass 28, count 2 2006.229.03:40:30.38#ibcon#enter sib2, iclass 28, count 2 2006.229.03:40:30.38#ibcon#flushed, iclass 28, count 2 2006.229.03:40:30.38#ibcon#about to write, iclass 28, count 2 2006.229.03:40:30.38#ibcon#wrote, iclass 28, count 2 2006.229.03:40:30.38#ibcon#about to read 3, iclass 28, count 2 2006.229.03:40:30.41#ibcon#read 3, iclass 28, count 2 2006.229.03:40:30.41#ibcon#about to read 4, iclass 28, count 2 2006.229.03:40:30.41#ibcon#read 4, iclass 28, count 2 2006.229.03:40:30.41#ibcon#about to read 5, iclass 28, count 2 2006.229.03:40:30.41#ibcon#read 5, iclass 28, count 2 2006.229.03:40:30.41#ibcon#about to read 6, iclass 28, count 2 2006.229.03:40:30.41#ibcon#read 6, iclass 28, count 2 2006.229.03:40:30.41#ibcon#end of sib2, iclass 28, count 2 2006.229.03:40:30.41#ibcon#*after write, iclass 28, count 2 2006.229.03:40:30.41#ibcon#*before return 0, iclass 28, count 2 2006.229.03:40:30.41#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:30.41#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:30.41#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.03:40:30.41#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:30.41#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:30.53#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:30.53#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:30.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:40:30.53#ibcon#first serial, iclass 28, count 0 2006.229.03:40:30.53#ibcon#enter sib2, iclass 28, count 0 2006.229.03:40:30.53#ibcon#flushed, iclass 28, count 0 2006.229.03:40:30.53#ibcon#about to write, iclass 28, count 0 2006.229.03:40:30.53#ibcon#wrote, iclass 28, count 0 2006.229.03:40:30.53#ibcon#about to read 3, iclass 28, count 0 2006.229.03:40:30.55#ibcon#read 3, iclass 28, count 0 2006.229.03:40:30.55#ibcon#about to read 4, iclass 28, count 0 2006.229.03:40:30.55#ibcon#read 4, iclass 28, count 0 2006.229.03:40:30.55#ibcon#about to read 5, iclass 28, count 0 2006.229.03:40:30.55#ibcon#read 5, iclass 28, count 0 2006.229.03:40:30.55#ibcon#about to read 6, iclass 28, count 0 2006.229.03:40:30.55#ibcon#read 6, iclass 28, count 0 2006.229.03:40:30.55#ibcon#end of sib2, iclass 28, count 0 2006.229.03:40:30.55#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:40:30.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:40:30.55#ibcon#[25=USB\r\n] 2006.229.03:40:30.55#ibcon#*before write, iclass 28, count 0 2006.229.03:40:30.55#ibcon#enter sib2, iclass 28, count 0 2006.229.03:40:30.55#ibcon#flushed, iclass 28, count 0 2006.229.03:40:30.55#ibcon#about to write, iclass 28, count 0 2006.229.03:40:30.55#ibcon#wrote, iclass 28, count 0 2006.229.03:40:30.55#ibcon#about to read 3, iclass 28, count 0 2006.229.03:40:30.58#ibcon#read 3, iclass 28, count 0 2006.229.03:40:30.58#ibcon#about to read 4, iclass 28, count 0 2006.229.03:40:30.58#ibcon#read 4, iclass 28, count 0 2006.229.03:40:30.58#ibcon#about to read 5, iclass 28, count 0 2006.229.03:40:30.58#ibcon#read 5, iclass 28, count 0 2006.229.03:40:30.58#ibcon#about to read 6, iclass 28, count 0 2006.229.03:40:30.58#ibcon#read 6, iclass 28, count 0 2006.229.03:40:30.58#ibcon#end of sib2, iclass 28, count 0 2006.229.03:40:30.58#ibcon#*after write, iclass 28, count 0 2006.229.03:40:30.58#ibcon#*before return 0, iclass 28, count 0 2006.229.03:40:30.58#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:30.58#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:30.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:40:30.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:40:30.58$vck44/valo=8,884.99 2006.229.03:40:30.58#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.03:40:30.58#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.03:40:30.58#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:30.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:30.58#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:30.58#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:30.58#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:40:30.58#ibcon#first serial, iclass 30, count 0 2006.229.03:40:30.58#ibcon#enter sib2, iclass 30, count 0 2006.229.03:40:30.58#ibcon#flushed, iclass 30, count 0 2006.229.03:40:30.58#ibcon#about to write, iclass 30, count 0 2006.229.03:40:30.58#ibcon#wrote, iclass 30, count 0 2006.229.03:40:30.58#ibcon#about to read 3, iclass 30, count 0 2006.229.03:40:30.60#ibcon#read 3, iclass 30, count 0 2006.229.03:40:30.60#ibcon#about to read 4, iclass 30, count 0 2006.229.03:40:30.60#ibcon#read 4, iclass 30, count 0 2006.229.03:40:30.60#ibcon#about to read 5, iclass 30, count 0 2006.229.03:40:30.60#ibcon#read 5, iclass 30, count 0 2006.229.03:40:30.60#ibcon#about to read 6, iclass 30, count 0 2006.229.03:40:30.60#ibcon#read 6, iclass 30, count 0 2006.229.03:40:30.60#ibcon#end of sib2, iclass 30, count 0 2006.229.03:40:30.60#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:40:30.60#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:40:30.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:40:30.60#ibcon#*before write, iclass 30, count 0 2006.229.03:40:30.60#ibcon#enter sib2, iclass 30, count 0 2006.229.03:40:30.60#ibcon#flushed, iclass 30, count 0 2006.229.03:40:30.60#ibcon#about to write, iclass 30, count 0 2006.229.03:40:30.60#ibcon#wrote, iclass 30, count 0 2006.229.03:40:30.60#ibcon#about to read 3, iclass 30, count 0 2006.229.03:40:30.64#ibcon#read 3, iclass 30, count 0 2006.229.03:40:30.64#ibcon#about to read 4, iclass 30, count 0 2006.229.03:40:30.64#ibcon#read 4, iclass 30, count 0 2006.229.03:40:30.64#ibcon#about to read 5, iclass 30, count 0 2006.229.03:40:30.64#ibcon#read 5, iclass 30, count 0 2006.229.03:40:30.64#ibcon#about to read 6, iclass 30, count 0 2006.229.03:40:30.64#ibcon#read 6, iclass 30, count 0 2006.229.03:40:30.64#ibcon#end of sib2, iclass 30, count 0 2006.229.03:40:30.64#ibcon#*after write, iclass 30, count 0 2006.229.03:40:30.64#ibcon#*before return 0, iclass 30, count 0 2006.229.03:40:30.64#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:30.64#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:30.64#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:40:30.64#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:40:30.64$vck44/va=8,6 2006.229.03:40:30.64#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.03:40:30.64#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.03:40:30.64#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:30.64#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:30.70#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:30.70#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:30.70#ibcon#enter wrdev, iclass 32, count 2 2006.229.03:40:30.70#ibcon#first serial, iclass 32, count 2 2006.229.03:40:30.70#ibcon#enter sib2, iclass 32, count 2 2006.229.03:40:30.70#ibcon#flushed, iclass 32, count 2 2006.229.03:40:30.70#ibcon#about to write, iclass 32, count 2 2006.229.03:40:30.70#ibcon#wrote, iclass 32, count 2 2006.229.03:40:30.70#ibcon#about to read 3, iclass 32, count 2 2006.229.03:40:30.72#ibcon#read 3, iclass 32, count 2 2006.229.03:40:30.72#ibcon#about to read 4, iclass 32, count 2 2006.229.03:40:30.72#ibcon#read 4, iclass 32, count 2 2006.229.03:40:30.72#ibcon#about to read 5, iclass 32, count 2 2006.229.03:40:30.72#ibcon#read 5, iclass 32, count 2 2006.229.03:40:30.72#ibcon#about to read 6, iclass 32, count 2 2006.229.03:40:30.72#ibcon#read 6, iclass 32, count 2 2006.229.03:40:30.72#ibcon#end of sib2, iclass 32, count 2 2006.229.03:40:30.72#ibcon#*mode == 0, iclass 32, count 2 2006.229.03:40:30.72#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.03:40:30.72#ibcon#[25=AT08-06\r\n] 2006.229.03:40:30.72#ibcon#*before write, iclass 32, count 2 2006.229.03:40:30.72#ibcon#enter sib2, iclass 32, count 2 2006.229.03:40:30.72#ibcon#flushed, iclass 32, count 2 2006.229.03:40:30.72#ibcon#about to write, iclass 32, count 2 2006.229.03:40:30.72#ibcon#wrote, iclass 32, count 2 2006.229.03:40:30.72#ibcon#about to read 3, iclass 32, count 2 2006.229.03:40:30.75#ibcon#read 3, iclass 32, count 2 2006.229.03:40:30.75#ibcon#about to read 4, iclass 32, count 2 2006.229.03:40:30.75#ibcon#read 4, iclass 32, count 2 2006.229.03:40:30.75#ibcon#about to read 5, iclass 32, count 2 2006.229.03:40:30.75#ibcon#read 5, iclass 32, count 2 2006.229.03:40:30.75#ibcon#about to read 6, iclass 32, count 2 2006.229.03:40:30.75#ibcon#read 6, iclass 32, count 2 2006.229.03:40:30.75#ibcon#end of sib2, iclass 32, count 2 2006.229.03:40:30.75#ibcon#*after write, iclass 32, count 2 2006.229.03:40:30.75#ibcon#*before return 0, iclass 32, count 2 2006.229.03:40:30.75#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:30.75#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:30.75#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.03:40:30.75#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:30.75#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:30.87#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:30.87#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:30.87#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:40:30.87#ibcon#first serial, iclass 32, count 0 2006.229.03:40:30.87#ibcon#enter sib2, iclass 32, count 0 2006.229.03:40:30.87#ibcon#flushed, iclass 32, count 0 2006.229.03:40:30.87#ibcon#about to write, iclass 32, count 0 2006.229.03:40:30.87#ibcon#wrote, iclass 32, count 0 2006.229.03:40:30.87#ibcon#about to read 3, iclass 32, count 0 2006.229.03:40:30.89#ibcon#read 3, iclass 32, count 0 2006.229.03:40:30.89#ibcon#about to read 4, iclass 32, count 0 2006.229.03:40:30.89#ibcon#read 4, iclass 32, count 0 2006.229.03:40:30.89#ibcon#about to read 5, iclass 32, count 0 2006.229.03:40:30.89#ibcon#read 5, iclass 32, count 0 2006.229.03:40:30.89#ibcon#about to read 6, iclass 32, count 0 2006.229.03:40:30.89#ibcon#read 6, iclass 32, count 0 2006.229.03:40:30.89#ibcon#end of sib2, iclass 32, count 0 2006.229.03:40:30.89#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:40:30.89#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:40:30.89#ibcon#[25=USB\r\n] 2006.229.03:40:30.89#ibcon#*before write, iclass 32, count 0 2006.229.03:40:30.89#ibcon#enter sib2, iclass 32, count 0 2006.229.03:40:30.89#ibcon#flushed, iclass 32, count 0 2006.229.03:40:30.89#ibcon#about to write, iclass 32, count 0 2006.229.03:40:30.89#ibcon#wrote, iclass 32, count 0 2006.229.03:40:30.89#ibcon#about to read 3, iclass 32, count 0 2006.229.03:40:30.92#ibcon#read 3, iclass 32, count 0 2006.229.03:40:30.92#ibcon#about to read 4, iclass 32, count 0 2006.229.03:40:30.92#ibcon#read 4, iclass 32, count 0 2006.229.03:40:30.92#ibcon#about to read 5, iclass 32, count 0 2006.229.03:40:30.92#ibcon#read 5, iclass 32, count 0 2006.229.03:40:30.92#ibcon#about to read 6, iclass 32, count 0 2006.229.03:40:30.92#ibcon#read 6, iclass 32, count 0 2006.229.03:40:30.92#ibcon#end of sib2, iclass 32, count 0 2006.229.03:40:30.92#ibcon#*after write, iclass 32, count 0 2006.229.03:40:30.92#ibcon#*before return 0, iclass 32, count 0 2006.229.03:40:30.92#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:30.92#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:30.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:40:30.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:40:30.92$vck44/vblo=1,629.99 2006.229.03:40:30.92#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.03:40:30.92#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.03:40:30.92#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:30.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:30.92#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:30.92#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:30.92#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:40:30.92#ibcon#first serial, iclass 34, count 0 2006.229.03:40:30.92#ibcon#enter sib2, iclass 34, count 0 2006.229.03:40:30.92#ibcon#flushed, iclass 34, count 0 2006.229.03:40:30.92#ibcon#about to write, iclass 34, count 0 2006.229.03:40:30.92#ibcon#wrote, iclass 34, count 0 2006.229.03:40:30.92#ibcon#about to read 3, iclass 34, count 0 2006.229.03:40:30.94#ibcon#read 3, iclass 34, count 0 2006.229.03:40:30.94#ibcon#about to read 4, iclass 34, count 0 2006.229.03:40:30.94#ibcon#read 4, iclass 34, count 0 2006.229.03:40:30.94#ibcon#about to read 5, iclass 34, count 0 2006.229.03:40:30.94#ibcon#read 5, iclass 34, count 0 2006.229.03:40:30.94#ibcon#about to read 6, iclass 34, count 0 2006.229.03:40:30.94#ibcon#read 6, iclass 34, count 0 2006.229.03:40:30.94#ibcon#end of sib2, iclass 34, count 0 2006.229.03:40:30.94#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:40:30.94#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:40:30.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:40:30.94#ibcon#*before write, iclass 34, count 0 2006.229.03:40:30.94#ibcon#enter sib2, iclass 34, count 0 2006.229.03:40:30.94#ibcon#flushed, iclass 34, count 0 2006.229.03:40:30.94#ibcon#about to write, iclass 34, count 0 2006.229.03:40:30.94#ibcon#wrote, iclass 34, count 0 2006.229.03:40:30.94#ibcon#about to read 3, iclass 34, count 0 2006.229.03:40:30.98#ibcon#read 3, iclass 34, count 0 2006.229.03:40:30.98#ibcon#about to read 4, iclass 34, count 0 2006.229.03:40:30.98#ibcon#read 4, iclass 34, count 0 2006.229.03:40:30.98#ibcon#about to read 5, iclass 34, count 0 2006.229.03:40:30.98#ibcon#read 5, iclass 34, count 0 2006.229.03:40:30.98#ibcon#about to read 6, iclass 34, count 0 2006.229.03:40:30.98#ibcon#read 6, iclass 34, count 0 2006.229.03:40:30.98#ibcon#end of sib2, iclass 34, count 0 2006.229.03:40:30.98#ibcon#*after write, iclass 34, count 0 2006.229.03:40:30.98#ibcon#*before return 0, iclass 34, count 0 2006.229.03:40:30.98#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:30.98#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:30.98#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:40:30.98#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:40:30.98$vck44/vb=1,4 2006.229.03:40:30.98#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.03:40:30.98#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.03:40:30.98#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:30.98#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:40:30.98#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:40:30.98#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:40:30.98#ibcon#enter wrdev, iclass 36, count 2 2006.229.03:40:30.98#ibcon#first serial, iclass 36, count 2 2006.229.03:40:30.98#ibcon#enter sib2, iclass 36, count 2 2006.229.03:40:30.98#ibcon#flushed, iclass 36, count 2 2006.229.03:40:30.98#ibcon#about to write, iclass 36, count 2 2006.229.03:40:30.98#ibcon#wrote, iclass 36, count 2 2006.229.03:40:30.98#ibcon#about to read 3, iclass 36, count 2 2006.229.03:40:31.00#ibcon#read 3, iclass 36, count 2 2006.229.03:40:31.00#ibcon#about to read 4, iclass 36, count 2 2006.229.03:40:31.00#ibcon#read 4, iclass 36, count 2 2006.229.03:40:31.00#ibcon#about to read 5, iclass 36, count 2 2006.229.03:40:31.00#ibcon#read 5, iclass 36, count 2 2006.229.03:40:31.00#ibcon#about to read 6, iclass 36, count 2 2006.229.03:40:31.00#ibcon#read 6, iclass 36, count 2 2006.229.03:40:31.00#ibcon#end of sib2, iclass 36, count 2 2006.229.03:40:31.00#ibcon#*mode == 0, iclass 36, count 2 2006.229.03:40:31.00#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.03:40:31.00#ibcon#[27=AT01-04\r\n] 2006.229.03:40:31.00#ibcon#*before write, iclass 36, count 2 2006.229.03:40:31.00#ibcon#enter sib2, iclass 36, count 2 2006.229.03:40:31.00#ibcon#flushed, iclass 36, count 2 2006.229.03:40:31.00#ibcon#about to write, iclass 36, count 2 2006.229.03:40:31.00#ibcon#wrote, iclass 36, count 2 2006.229.03:40:31.00#ibcon#about to read 3, iclass 36, count 2 2006.229.03:40:31.03#ibcon#read 3, iclass 36, count 2 2006.229.03:40:31.03#ibcon#about to read 4, iclass 36, count 2 2006.229.03:40:31.03#ibcon#read 4, iclass 36, count 2 2006.229.03:40:31.03#ibcon#about to read 5, iclass 36, count 2 2006.229.03:40:31.03#ibcon#read 5, iclass 36, count 2 2006.229.03:40:31.03#ibcon#about to read 6, iclass 36, count 2 2006.229.03:40:31.03#ibcon#read 6, iclass 36, count 2 2006.229.03:40:31.03#ibcon#end of sib2, iclass 36, count 2 2006.229.03:40:31.03#ibcon#*after write, iclass 36, count 2 2006.229.03:40:31.03#ibcon#*before return 0, iclass 36, count 2 2006.229.03:40:31.03#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:40:31.03#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.03:40:31.03#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.03:40:31.03#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:31.03#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:40:31.15#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:40:31.15#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:40:31.15#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:40:31.15#ibcon#first serial, iclass 36, count 0 2006.229.03:40:31.15#ibcon#enter sib2, iclass 36, count 0 2006.229.03:40:31.15#ibcon#flushed, iclass 36, count 0 2006.229.03:40:31.15#ibcon#about to write, iclass 36, count 0 2006.229.03:40:31.15#ibcon#wrote, iclass 36, count 0 2006.229.03:40:31.15#ibcon#about to read 3, iclass 36, count 0 2006.229.03:40:31.17#ibcon#read 3, iclass 36, count 0 2006.229.03:40:31.17#ibcon#about to read 4, iclass 36, count 0 2006.229.03:40:31.17#ibcon#read 4, iclass 36, count 0 2006.229.03:40:31.17#ibcon#about to read 5, iclass 36, count 0 2006.229.03:40:31.17#ibcon#read 5, iclass 36, count 0 2006.229.03:40:31.17#ibcon#about to read 6, iclass 36, count 0 2006.229.03:40:31.17#ibcon#read 6, iclass 36, count 0 2006.229.03:40:31.17#ibcon#end of sib2, iclass 36, count 0 2006.229.03:40:31.17#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:40:31.17#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:40:31.17#ibcon#[27=USB\r\n] 2006.229.03:40:31.17#ibcon#*before write, iclass 36, count 0 2006.229.03:40:31.17#ibcon#enter sib2, iclass 36, count 0 2006.229.03:40:31.17#ibcon#flushed, iclass 36, count 0 2006.229.03:40:31.17#ibcon#about to write, iclass 36, count 0 2006.229.03:40:31.17#ibcon#wrote, iclass 36, count 0 2006.229.03:40:31.17#ibcon#about to read 3, iclass 36, count 0 2006.229.03:40:31.20#ibcon#read 3, iclass 36, count 0 2006.229.03:40:31.20#ibcon#about to read 4, iclass 36, count 0 2006.229.03:40:31.20#ibcon#read 4, iclass 36, count 0 2006.229.03:40:31.20#ibcon#about to read 5, iclass 36, count 0 2006.229.03:40:31.20#ibcon#read 5, iclass 36, count 0 2006.229.03:40:31.20#ibcon#about to read 6, iclass 36, count 0 2006.229.03:40:31.20#ibcon#read 6, iclass 36, count 0 2006.229.03:40:31.20#ibcon#end of sib2, iclass 36, count 0 2006.229.03:40:31.20#ibcon#*after write, iclass 36, count 0 2006.229.03:40:31.20#ibcon#*before return 0, iclass 36, count 0 2006.229.03:40:31.20#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:40:31.20#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.03:40:31.20#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:40:31.20#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:40:31.20$vck44/vblo=2,634.99 2006.229.03:40:31.20#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.03:40:31.20#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.03:40:31.20#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:31.20#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:31.20#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:31.20#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:31.20#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:40:31.20#ibcon#first serial, iclass 38, count 0 2006.229.03:40:31.20#ibcon#enter sib2, iclass 38, count 0 2006.229.03:40:31.20#ibcon#flushed, iclass 38, count 0 2006.229.03:40:31.20#ibcon#about to write, iclass 38, count 0 2006.229.03:40:31.20#ibcon#wrote, iclass 38, count 0 2006.229.03:40:31.20#ibcon#about to read 3, iclass 38, count 0 2006.229.03:40:31.22#ibcon#read 3, iclass 38, count 0 2006.229.03:40:31.22#ibcon#about to read 4, iclass 38, count 0 2006.229.03:40:31.22#ibcon#read 4, iclass 38, count 0 2006.229.03:40:31.22#ibcon#about to read 5, iclass 38, count 0 2006.229.03:40:31.22#ibcon#read 5, iclass 38, count 0 2006.229.03:40:31.22#ibcon#about to read 6, iclass 38, count 0 2006.229.03:40:31.22#ibcon#read 6, iclass 38, count 0 2006.229.03:40:31.22#ibcon#end of sib2, iclass 38, count 0 2006.229.03:40:31.22#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:40:31.22#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:40:31.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:40:31.22#ibcon#*before write, iclass 38, count 0 2006.229.03:40:31.22#ibcon#enter sib2, iclass 38, count 0 2006.229.03:40:31.22#ibcon#flushed, iclass 38, count 0 2006.229.03:40:31.22#ibcon#about to write, iclass 38, count 0 2006.229.03:40:31.22#ibcon#wrote, iclass 38, count 0 2006.229.03:40:31.22#ibcon#about to read 3, iclass 38, count 0 2006.229.03:40:31.26#ibcon#read 3, iclass 38, count 0 2006.229.03:40:31.26#ibcon#about to read 4, iclass 38, count 0 2006.229.03:40:31.26#ibcon#read 4, iclass 38, count 0 2006.229.03:40:31.26#ibcon#about to read 5, iclass 38, count 0 2006.229.03:40:31.26#ibcon#read 5, iclass 38, count 0 2006.229.03:40:31.26#ibcon#about to read 6, iclass 38, count 0 2006.229.03:40:31.26#ibcon#read 6, iclass 38, count 0 2006.229.03:40:31.26#ibcon#end of sib2, iclass 38, count 0 2006.229.03:40:31.26#ibcon#*after write, iclass 38, count 0 2006.229.03:40:31.26#ibcon#*before return 0, iclass 38, count 0 2006.229.03:40:31.26#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:31.26#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.03:40:31.26#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:40:31.26#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:40:31.26$vck44/vb=2,4 2006.229.03:40:31.26#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.03:40:31.26#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.03:40:31.26#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:31.26#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:31.32#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:31.32#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:31.32#ibcon#enter wrdev, iclass 40, count 2 2006.229.03:40:31.32#ibcon#first serial, iclass 40, count 2 2006.229.03:40:31.32#ibcon#enter sib2, iclass 40, count 2 2006.229.03:40:31.32#ibcon#flushed, iclass 40, count 2 2006.229.03:40:31.32#ibcon#about to write, iclass 40, count 2 2006.229.03:40:31.32#ibcon#wrote, iclass 40, count 2 2006.229.03:40:31.32#ibcon#about to read 3, iclass 40, count 2 2006.229.03:40:31.34#ibcon#read 3, iclass 40, count 2 2006.229.03:40:31.34#ibcon#about to read 4, iclass 40, count 2 2006.229.03:40:31.34#ibcon#read 4, iclass 40, count 2 2006.229.03:40:31.34#ibcon#about to read 5, iclass 40, count 2 2006.229.03:40:31.34#ibcon#read 5, iclass 40, count 2 2006.229.03:40:31.34#ibcon#about to read 6, iclass 40, count 2 2006.229.03:40:31.34#ibcon#read 6, iclass 40, count 2 2006.229.03:40:31.34#ibcon#end of sib2, iclass 40, count 2 2006.229.03:40:31.34#ibcon#*mode == 0, iclass 40, count 2 2006.229.03:40:31.34#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.03:40:31.34#ibcon#[27=AT02-04\r\n] 2006.229.03:40:31.34#ibcon#*before write, iclass 40, count 2 2006.229.03:40:31.34#ibcon#enter sib2, iclass 40, count 2 2006.229.03:40:31.34#ibcon#flushed, iclass 40, count 2 2006.229.03:40:31.34#ibcon#about to write, iclass 40, count 2 2006.229.03:40:31.34#ibcon#wrote, iclass 40, count 2 2006.229.03:40:31.34#ibcon#about to read 3, iclass 40, count 2 2006.229.03:40:31.37#ibcon#read 3, iclass 40, count 2 2006.229.03:40:31.37#ibcon#about to read 4, iclass 40, count 2 2006.229.03:40:31.37#ibcon#read 4, iclass 40, count 2 2006.229.03:40:31.37#ibcon#about to read 5, iclass 40, count 2 2006.229.03:40:31.37#ibcon#read 5, iclass 40, count 2 2006.229.03:40:31.37#ibcon#about to read 6, iclass 40, count 2 2006.229.03:40:31.37#ibcon#read 6, iclass 40, count 2 2006.229.03:40:31.37#ibcon#end of sib2, iclass 40, count 2 2006.229.03:40:31.37#ibcon#*after write, iclass 40, count 2 2006.229.03:40:31.37#ibcon#*before return 0, iclass 40, count 2 2006.229.03:40:31.37#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:31.37#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.03:40:31.37#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.03:40:31.37#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:31.37#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:31.49#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:31.49#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:31.49#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:40:31.49#ibcon#first serial, iclass 40, count 0 2006.229.03:40:31.49#ibcon#enter sib2, iclass 40, count 0 2006.229.03:40:31.49#ibcon#flushed, iclass 40, count 0 2006.229.03:40:31.49#ibcon#about to write, iclass 40, count 0 2006.229.03:40:31.49#ibcon#wrote, iclass 40, count 0 2006.229.03:40:31.49#ibcon#about to read 3, iclass 40, count 0 2006.229.03:40:31.51#ibcon#read 3, iclass 40, count 0 2006.229.03:40:31.51#ibcon#about to read 4, iclass 40, count 0 2006.229.03:40:31.51#ibcon#read 4, iclass 40, count 0 2006.229.03:40:31.51#ibcon#about to read 5, iclass 40, count 0 2006.229.03:40:31.51#ibcon#read 5, iclass 40, count 0 2006.229.03:40:31.51#ibcon#about to read 6, iclass 40, count 0 2006.229.03:40:31.51#ibcon#read 6, iclass 40, count 0 2006.229.03:40:31.51#ibcon#end of sib2, iclass 40, count 0 2006.229.03:40:31.51#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:40:31.51#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:40:31.51#ibcon#[27=USB\r\n] 2006.229.03:40:31.51#ibcon#*before write, iclass 40, count 0 2006.229.03:40:31.51#ibcon#enter sib2, iclass 40, count 0 2006.229.03:40:31.51#ibcon#flushed, iclass 40, count 0 2006.229.03:40:31.51#ibcon#about to write, iclass 40, count 0 2006.229.03:40:31.51#ibcon#wrote, iclass 40, count 0 2006.229.03:40:31.51#ibcon#about to read 3, iclass 40, count 0 2006.229.03:40:31.54#ibcon#read 3, iclass 40, count 0 2006.229.03:40:31.54#ibcon#about to read 4, iclass 40, count 0 2006.229.03:40:31.54#ibcon#read 4, iclass 40, count 0 2006.229.03:40:31.54#ibcon#about to read 5, iclass 40, count 0 2006.229.03:40:31.54#ibcon#read 5, iclass 40, count 0 2006.229.03:40:31.54#ibcon#about to read 6, iclass 40, count 0 2006.229.03:40:31.54#ibcon#read 6, iclass 40, count 0 2006.229.03:40:31.54#ibcon#end of sib2, iclass 40, count 0 2006.229.03:40:31.54#ibcon#*after write, iclass 40, count 0 2006.229.03:40:31.54#ibcon#*before return 0, iclass 40, count 0 2006.229.03:40:31.54#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:31.54#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.03:40:31.54#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:40:31.54#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:40:31.54$vck44/vblo=3,649.99 2006.229.03:40:31.54#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.03:40:31.54#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.03:40:31.54#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:31.54#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:31.54#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:31.54#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:31.54#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:40:31.54#ibcon#first serial, iclass 4, count 0 2006.229.03:40:31.54#ibcon#enter sib2, iclass 4, count 0 2006.229.03:40:31.54#ibcon#flushed, iclass 4, count 0 2006.229.03:40:31.54#ibcon#about to write, iclass 4, count 0 2006.229.03:40:31.54#ibcon#wrote, iclass 4, count 0 2006.229.03:40:31.54#ibcon#about to read 3, iclass 4, count 0 2006.229.03:40:31.56#ibcon#read 3, iclass 4, count 0 2006.229.03:40:31.56#ibcon#about to read 4, iclass 4, count 0 2006.229.03:40:31.56#ibcon#read 4, iclass 4, count 0 2006.229.03:40:31.56#ibcon#about to read 5, iclass 4, count 0 2006.229.03:40:31.56#ibcon#read 5, iclass 4, count 0 2006.229.03:40:31.56#ibcon#about to read 6, iclass 4, count 0 2006.229.03:40:31.56#ibcon#read 6, iclass 4, count 0 2006.229.03:40:31.56#ibcon#end of sib2, iclass 4, count 0 2006.229.03:40:31.56#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:40:31.56#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:40:31.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:40:31.56#ibcon#*before write, iclass 4, count 0 2006.229.03:40:31.56#ibcon#enter sib2, iclass 4, count 0 2006.229.03:40:31.56#ibcon#flushed, iclass 4, count 0 2006.229.03:40:31.56#ibcon#about to write, iclass 4, count 0 2006.229.03:40:31.56#ibcon#wrote, iclass 4, count 0 2006.229.03:40:31.56#ibcon#about to read 3, iclass 4, count 0 2006.229.03:40:31.60#ibcon#read 3, iclass 4, count 0 2006.229.03:40:31.60#ibcon#about to read 4, iclass 4, count 0 2006.229.03:40:31.60#ibcon#read 4, iclass 4, count 0 2006.229.03:40:31.60#ibcon#about to read 5, iclass 4, count 0 2006.229.03:40:31.60#ibcon#read 5, iclass 4, count 0 2006.229.03:40:31.60#ibcon#about to read 6, iclass 4, count 0 2006.229.03:40:31.60#ibcon#read 6, iclass 4, count 0 2006.229.03:40:31.60#ibcon#end of sib2, iclass 4, count 0 2006.229.03:40:31.60#ibcon#*after write, iclass 4, count 0 2006.229.03:40:31.60#ibcon#*before return 0, iclass 4, count 0 2006.229.03:40:31.60#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:31.60#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.03:40:31.60#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:40:31.60#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:40:31.60$vck44/vb=3,4 2006.229.03:40:31.60#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.03:40:31.60#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.03:40:31.60#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:31.60#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:31.66#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:31.66#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:31.66#ibcon#enter wrdev, iclass 6, count 2 2006.229.03:40:31.66#ibcon#first serial, iclass 6, count 2 2006.229.03:40:31.66#ibcon#enter sib2, iclass 6, count 2 2006.229.03:40:31.66#ibcon#flushed, iclass 6, count 2 2006.229.03:40:31.66#ibcon#about to write, iclass 6, count 2 2006.229.03:40:31.66#ibcon#wrote, iclass 6, count 2 2006.229.03:40:31.66#ibcon#about to read 3, iclass 6, count 2 2006.229.03:40:31.68#ibcon#read 3, iclass 6, count 2 2006.229.03:40:31.68#ibcon#about to read 4, iclass 6, count 2 2006.229.03:40:31.68#ibcon#read 4, iclass 6, count 2 2006.229.03:40:31.68#ibcon#about to read 5, iclass 6, count 2 2006.229.03:40:31.68#ibcon#read 5, iclass 6, count 2 2006.229.03:40:31.68#ibcon#about to read 6, iclass 6, count 2 2006.229.03:40:31.68#ibcon#read 6, iclass 6, count 2 2006.229.03:40:31.68#ibcon#end of sib2, iclass 6, count 2 2006.229.03:40:31.68#ibcon#*mode == 0, iclass 6, count 2 2006.229.03:40:31.68#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.03:40:31.68#ibcon#[27=AT03-04\r\n] 2006.229.03:40:31.68#ibcon#*before write, iclass 6, count 2 2006.229.03:40:31.68#ibcon#enter sib2, iclass 6, count 2 2006.229.03:40:31.68#ibcon#flushed, iclass 6, count 2 2006.229.03:40:31.68#ibcon#about to write, iclass 6, count 2 2006.229.03:40:31.68#ibcon#wrote, iclass 6, count 2 2006.229.03:40:31.68#ibcon#about to read 3, iclass 6, count 2 2006.229.03:40:31.71#ibcon#read 3, iclass 6, count 2 2006.229.03:40:31.71#ibcon#about to read 4, iclass 6, count 2 2006.229.03:40:31.71#ibcon#read 4, iclass 6, count 2 2006.229.03:40:31.71#ibcon#about to read 5, iclass 6, count 2 2006.229.03:40:31.71#ibcon#read 5, iclass 6, count 2 2006.229.03:40:31.71#ibcon#about to read 6, iclass 6, count 2 2006.229.03:40:31.71#ibcon#read 6, iclass 6, count 2 2006.229.03:40:31.71#ibcon#end of sib2, iclass 6, count 2 2006.229.03:40:31.71#ibcon#*after write, iclass 6, count 2 2006.229.03:40:31.71#ibcon#*before return 0, iclass 6, count 2 2006.229.03:40:31.71#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:31.71#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.03:40:31.71#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.03:40:31.71#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:31.71#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:31.83#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:31.83#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:31.83#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:40:31.83#ibcon#first serial, iclass 6, count 0 2006.229.03:40:31.83#ibcon#enter sib2, iclass 6, count 0 2006.229.03:40:31.83#ibcon#flushed, iclass 6, count 0 2006.229.03:40:31.83#ibcon#about to write, iclass 6, count 0 2006.229.03:40:31.83#ibcon#wrote, iclass 6, count 0 2006.229.03:40:31.83#ibcon#about to read 3, iclass 6, count 0 2006.229.03:40:31.85#ibcon#read 3, iclass 6, count 0 2006.229.03:40:31.85#ibcon#about to read 4, iclass 6, count 0 2006.229.03:40:31.85#ibcon#read 4, iclass 6, count 0 2006.229.03:40:31.85#ibcon#about to read 5, iclass 6, count 0 2006.229.03:40:31.85#ibcon#read 5, iclass 6, count 0 2006.229.03:40:31.85#ibcon#about to read 6, iclass 6, count 0 2006.229.03:40:31.85#ibcon#read 6, iclass 6, count 0 2006.229.03:40:31.85#ibcon#end of sib2, iclass 6, count 0 2006.229.03:40:31.85#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:40:31.85#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:40:31.85#ibcon#[27=USB\r\n] 2006.229.03:40:31.85#ibcon#*before write, iclass 6, count 0 2006.229.03:40:31.85#ibcon#enter sib2, iclass 6, count 0 2006.229.03:40:31.85#ibcon#flushed, iclass 6, count 0 2006.229.03:40:31.85#ibcon#about to write, iclass 6, count 0 2006.229.03:40:31.85#ibcon#wrote, iclass 6, count 0 2006.229.03:40:31.85#ibcon#about to read 3, iclass 6, count 0 2006.229.03:40:31.88#ibcon#read 3, iclass 6, count 0 2006.229.03:40:31.88#ibcon#about to read 4, iclass 6, count 0 2006.229.03:40:31.88#ibcon#read 4, iclass 6, count 0 2006.229.03:40:31.88#ibcon#about to read 5, iclass 6, count 0 2006.229.03:40:31.88#ibcon#read 5, iclass 6, count 0 2006.229.03:40:31.88#ibcon#about to read 6, iclass 6, count 0 2006.229.03:40:31.88#ibcon#read 6, iclass 6, count 0 2006.229.03:40:31.88#ibcon#end of sib2, iclass 6, count 0 2006.229.03:40:31.88#ibcon#*after write, iclass 6, count 0 2006.229.03:40:31.88#ibcon#*before return 0, iclass 6, count 0 2006.229.03:40:31.88#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:31.88#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.03:40:31.88#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:40:31.88#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:40:31.88$vck44/vblo=4,679.99 2006.229.03:40:31.88#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.03:40:31.88#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.03:40:31.88#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:31.88#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:31.88#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:31.88#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:31.88#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:40:31.88#ibcon#first serial, iclass 10, count 0 2006.229.03:40:31.88#ibcon#enter sib2, iclass 10, count 0 2006.229.03:40:31.88#ibcon#flushed, iclass 10, count 0 2006.229.03:40:31.88#ibcon#about to write, iclass 10, count 0 2006.229.03:40:31.88#ibcon#wrote, iclass 10, count 0 2006.229.03:40:31.88#ibcon#about to read 3, iclass 10, count 0 2006.229.03:40:31.90#ibcon#read 3, iclass 10, count 0 2006.229.03:40:31.90#ibcon#about to read 4, iclass 10, count 0 2006.229.03:40:31.90#ibcon#read 4, iclass 10, count 0 2006.229.03:40:31.90#ibcon#about to read 5, iclass 10, count 0 2006.229.03:40:31.90#ibcon#read 5, iclass 10, count 0 2006.229.03:40:31.90#ibcon#about to read 6, iclass 10, count 0 2006.229.03:40:31.90#ibcon#read 6, iclass 10, count 0 2006.229.03:40:31.90#ibcon#end of sib2, iclass 10, count 0 2006.229.03:40:31.90#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:40:31.90#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:40:31.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:40:31.90#ibcon#*before write, iclass 10, count 0 2006.229.03:40:31.90#ibcon#enter sib2, iclass 10, count 0 2006.229.03:40:31.90#ibcon#flushed, iclass 10, count 0 2006.229.03:40:31.90#ibcon#about to write, iclass 10, count 0 2006.229.03:40:31.90#ibcon#wrote, iclass 10, count 0 2006.229.03:40:31.90#ibcon#about to read 3, iclass 10, count 0 2006.229.03:40:31.94#ibcon#read 3, iclass 10, count 0 2006.229.03:40:31.94#ibcon#about to read 4, iclass 10, count 0 2006.229.03:40:31.94#ibcon#read 4, iclass 10, count 0 2006.229.03:40:31.94#ibcon#about to read 5, iclass 10, count 0 2006.229.03:40:31.94#ibcon#read 5, iclass 10, count 0 2006.229.03:40:31.94#ibcon#about to read 6, iclass 10, count 0 2006.229.03:40:31.94#ibcon#read 6, iclass 10, count 0 2006.229.03:40:31.94#ibcon#end of sib2, iclass 10, count 0 2006.229.03:40:31.94#ibcon#*after write, iclass 10, count 0 2006.229.03:40:31.94#ibcon#*before return 0, iclass 10, count 0 2006.229.03:40:31.94#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:31.94#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.03:40:31.94#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:40:31.94#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:40:31.94$vck44/vb=4,4 2006.229.03:40:31.94#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.03:40:31.94#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.03:40:31.94#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:31.94#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:32.00#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:32.00#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:32.00#ibcon#enter wrdev, iclass 12, count 2 2006.229.03:40:32.00#ibcon#first serial, iclass 12, count 2 2006.229.03:40:32.00#ibcon#enter sib2, iclass 12, count 2 2006.229.03:40:32.00#ibcon#flushed, iclass 12, count 2 2006.229.03:40:32.00#ibcon#about to write, iclass 12, count 2 2006.229.03:40:32.00#ibcon#wrote, iclass 12, count 2 2006.229.03:40:32.00#ibcon#about to read 3, iclass 12, count 2 2006.229.03:40:32.02#ibcon#read 3, iclass 12, count 2 2006.229.03:40:32.02#ibcon#about to read 4, iclass 12, count 2 2006.229.03:40:32.02#ibcon#read 4, iclass 12, count 2 2006.229.03:40:32.02#ibcon#about to read 5, iclass 12, count 2 2006.229.03:40:32.02#ibcon#read 5, iclass 12, count 2 2006.229.03:40:32.02#ibcon#about to read 6, iclass 12, count 2 2006.229.03:40:32.02#ibcon#read 6, iclass 12, count 2 2006.229.03:40:32.02#ibcon#end of sib2, iclass 12, count 2 2006.229.03:40:32.02#ibcon#*mode == 0, iclass 12, count 2 2006.229.03:40:32.02#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.03:40:32.02#ibcon#[27=AT04-04\r\n] 2006.229.03:40:32.02#ibcon#*before write, iclass 12, count 2 2006.229.03:40:32.02#ibcon#enter sib2, iclass 12, count 2 2006.229.03:40:32.02#ibcon#flushed, iclass 12, count 2 2006.229.03:40:32.02#ibcon#about to write, iclass 12, count 2 2006.229.03:40:32.02#ibcon#wrote, iclass 12, count 2 2006.229.03:40:32.02#ibcon#about to read 3, iclass 12, count 2 2006.229.03:40:32.05#ibcon#read 3, iclass 12, count 2 2006.229.03:40:32.05#ibcon#about to read 4, iclass 12, count 2 2006.229.03:40:32.05#ibcon#read 4, iclass 12, count 2 2006.229.03:40:32.05#ibcon#about to read 5, iclass 12, count 2 2006.229.03:40:32.05#ibcon#read 5, iclass 12, count 2 2006.229.03:40:32.05#ibcon#about to read 6, iclass 12, count 2 2006.229.03:40:32.05#ibcon#read 6, iclass 12, count 2 2006.229.03:40:32.05#ibcon#end of sib2, iclass 12, count 2 2006.229.03:40:32.05#ibcon#*after write, iclass 12, count 2 2006.229.03:40:32.05#ibcon#*before return 0, iclass 12, count 2 2006.229.03:40:32.05#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:32.05#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.03:40:32.05#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.03:40:32.05#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:32.05#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:32.17#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:32.17#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:32.17#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:40:32.17#ibcon#first serial, iclass 12, count 0 2006.229.03:40:32.17#ibcon#enter sib2, iclass 12, count 0 2006.229.03:40:32.17#ibcon#flushed, iclass 12, count 0 2006.229.03:40:32.17#ibcon#about to write, iclass 12, count 0 2006.229.03:40:32.17#ibcon#wrote, iclass 12, count 0 2006.229.03:40:32.17#ibcon#about to read 3, iclass 12, count 0 2006.229.03:40:32.19#ibcon#read 3, iclass 12, count 0 2006.229.03:40:32.19#ibcon#about to read 4, iclass 12, count 0 2006.229.03:40:32.19#ibcon#read 4, iclass 12, count 0 2006.229.03:40:32.19#ibcon#about to read 5, iclass 12, count 0 2006.229.03:40:32.19#ibcon#read 5, iclass 12, count 0 2006.229.03:40:32.19#ibcon#about to read 6, iclass 12, count 0 2006.229.03:40:32.19#ibcon#read 6, iclass 12, count 0 2006.229.03:40:32.19#ibcon#end of sib2, iclass 12, count 0 2006.229.03:40:32.19#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:40:32.19#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:40:32.19#ibcon#[27=USB\r\n] 2006.229.03:40:32.19#ibcon#*before write, iclass 12, count 0 2006.229.03:40:32.19#ibcon#enter sib2, iclass 12, count 0 2006.229.03:40:32.19#ibcon#flushed, iclass 12, count 0 2006.229.03:40:32.19#ibcon#about to write, iclass 12, count 0 2006.229.03:40:32.19#ibcon#wrote, iclass 12, count 0 2006.229.03:40:32.19#ibcon#about to read 3, iclass 12, count 0 2006.229.03:40:32.22#ibcon#read 3, iclass 12, count 0 2006.229.03:40:32.22#ibcon#about to read 4, iclass 12, count 0 2006.229.03:40:32.22#ibcon#read 4, iclass 12, count 0 2006.229.03:40:32.22#ibcon#about to read 5, iclass 12, count 0 2006.229.03:40:32.22#ibcon#read 5, iclass 12, count 0 2006.229.03:40:32.22#ibcon#about to read 6, iclass 12, count 0 2006.229.03:40:32.22#ibcon#read 6, iclass 12, count 0 2006.229.03:40:32.22#ibcon#end of sib2, iclass 12, count 0 2006.229.03:40:32.22#ibcon#*after write, iclass 12, count 0 2006.229.03:40:32.22#ibcon#*before return 0, iclass 12, count 0 2006.229.03:40:32.22#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:32.22#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.03:40:32.22#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:40:32.22#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:40:32.22$vck44/vblo=5,709.99 2006.229.03:40:32.22#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.03:40:32.22#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.03:40:32.22#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:32.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:32.22#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:32.22#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:32.22#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:40:32.22#ibcon#first serial, iclass 14, count 0 2006.229.03:40:32.22#ibcon#enter sib2, iclass 14, count 0 2006.229.03:40:32.22#ibcon#flushed, iclass 14, count 0 2006.229.03:40:32.22#ibcon#about to write, iclass 14, count 0 2006.229.03:40:32.22#ibcon#wrote, iclass 14, count 0 2006.229.03:40:32.22#ibcon#about to read 3, iclass 14, count 0 2006.229.03:40:32.24#ibcon#read 3, iclass 14, count 0 2006.229.03:40:32.24#ibcon#about to read 4, iclass 14, count 0 2006.229.03:40:32.24#ibcon#read 4, iclass 14, count 0 2006.229.03:40:32.24#ibcon#about to read 5, iclass 14, count 0 2006.229.03:40:32.24#ibcon#read 5, iclass 14, count 0 2006.229.03:40:32.24#ibcon#about to read 6, iclass 14, count 0 2006.229.03:40:32.24#ibcon#read 6, iclass 14, count 0 2006.229.03:40:32.24#ibcon#end of sib2, iclass 14, count 0 2006.229.03:40:32.24#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:40:32.24#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:40:32.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:40:32.24#ibcon#*before write, iclass 14, count 0 2006.229.03:40:32.24#ibcon#enter sib2, iclass 14, count 0 2006.229.03:40:32.24#ibcon#flushed, iclass 14, count 0 2006.229.03:40:32.24#ibcon#about to write, iclass 14, count 0 2006.229.03:40:32.24#ibcon#wrote, iclass 14, count 0 2006.229.03:40:32.24#ibcon#about to read 3, iclass 14, count 0 2006.229.03:40:32.28#ibcon#read 3, iclass 14, count 0 2006.229.03:40:32.28#ibcon#about to read 4, iclass 14, count 0 2006.229.03:40:32.28#ibcon#read 4, iclass 14, count 0 2006.229.03:40:32.28#ibcon#about to read 5, iclass 14, count 0 2006.229.03:40:32.28#ibcon#read 5, iclass 14, count 0 2006.229.03:40:32.28#ibcon#about to read 6, iclass 14, count 0 2006.229.03:40:32.28#ibcon#read 6, iclass 14, count 0 2006.229.03:40:32.28#ibcon#end of sib2, iclass 14, count 0 2006.229.03:40:32.28#ibcon#*after write, iclass 14, count 0 2006.229.03:40:32.28#ibcon#*before return 0, iclass 14, count 0 2006.229.03:40:32.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:32.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.03:40:32.28#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:40:32.28#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:40:32.28$vck44/vb=5,4 2006.229.03:40:32.28#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.03:40:32.28#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.03:40:32.28#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:32.28#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:32.34#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:32.34#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:32.34#ibcon#enter wrdev, iclass 16, count 2 2006.229.03:40:32.34#ibcon#first serial, iclass 16, count 2 2006.229.03:40:32.34#ibcon#enter sib2, iclass 16, count 2 2006.229.03:40:32.34#ibcon#flushed, iclass 16, count 2 2006.229.03:40:32.34#ibcon#about to write, iclass 16, count 2 2006.229.03:40:32.34#ibcon#wrote, iclass 16, count 2 2006.229.03:40:32.34#ibcon#about to read 3, iclass 16, count 2 2006.229.03:40:32.36#ibcon#read 3, iclass 16, count 2 2006.229.03:40:32.36#ibcon#about to read 4, iclass 16, count 2 2006.229.03:40:32.36#ibcon#read 4, iclass 16, count 2 2006.229.03:40:32.36#ibcon#about to read 5, iclass 16, count 2 2006.229.03:40:32.36#ibcon#read 5, iclass 16, count 2 2006.229.03:40:32.36#ibcon#about to read 6, iclass 16, count 2 2006.229.03:40:32.36#ibcon#read 6, iclass 16, count 2 2006.229.03:40:32.36#ibcon#end of sib2, iclass 16, count 2 2006.229.03:40:32.36#ibcon#*mode == 0, iclass 16, count 2 2006.229.03:40:32.36#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.03:40:32.36#ibcon#[27=AT05-04\r\n] 2006.229.03:40:32.36#ibcon#*before write, iclass 16, count 2 2006.229.03:40:32.36#ibcon#enter sib2, iclass 16, count 2 2006.229.03:40:32.36#ibcon#flushed, iclass 16, count 2 2006.229.03:40:32.36#ibcon#about to write, iclass 16, count 2 2006.229.03:40:32.36#ibcon#wrote, iclass 16, count 2 2006.229.03:40:32.36#ibcon#about to read 3, iclass 16, count 2 2006.229.03:40:32.39#ibcon#read 3, iclass 16, count 2 2006.229.03:40:32.39#ibcon#about to read 4, iclass 16, count 2 2006.229.03:40:32.39#ibcon#read 4, iclass 16, count 2 2006.229.03:40:32.39#ibcon#about to read 5, iclass 16, count 2 2006.229.03:40:32.39#ibcon#read 5, iclass 16, count 2 2006.229.03:40:32.39#ibcon#about to read 6, iclass 16, count 2 2006.229.03:40:32.39#ibcon#read 6, iclass 16, count 2 2006.229.03:40:32.39#ibcon#end of sib2, iclass 16, count 2 2006.229.03:40:32.39#ibcon#*after write, iclass 16, count 2 2006.229.03:40:32.39#ibcon#*before return 0, iclass 16, count 2 2006.229.03:40:32.39#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:32.39#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.03:40:32.39#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.03:40:32.39#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:32.39#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:32.51#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:32.51#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:32.51#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:40:32.51#ibcon#first serial, iclass 16, count 0 2006.229.03:40:32.51#ibcon#enter sib2, iclass 16, count 0 2006.229.03:40:32.51#ibcon#flushed, iclass 16, count 0 2006.229.03:40:32.51#ibcon#about to write, iclass 16, count 0 2006.229.03:40:32.51#ibcon#wrote, iclass 16, count 0 2006.229.03:40:32.51#ibcon#about to read 3, iclass 16, count 0 2006.229.03:40:32.53#ibcon#read 3, iclass 16, count 0 2006.229.03:40:32.53#ibcon#about to read 4, iclass 16, count 0 2006.229.03:40:32.53#ibcon#read 4, iclass 16, count 0 2006.229.03:40:32.53#ibcon#about to read 5, iclass 16, count 0 2006.229.03:40:32.53#ibcon#read 5, iclass 16, count 0 2006.229.03:40:32.53#ibcon#about to read 6, iclass 16, count 0 2006.229.03:40:32.53#ibcon#read 6, iclass 16, count 0 2006.229.03:40:32.53#ibcon#end of sib2, iclass 16, count 0 2006.229.03:40:32.53#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:40:32.53#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:40:32.53#ibcon#[27=USB\r\n] 2006.229.03:40:32.53#ibcon#*before write, iclass 16, count 0 2006.229.03:40:32.53#ibcon#enter sib2, iclass 16, count 0 2006.229.03:40:32.53#ibcon#flushed, iclass 16, count 0 2006.229.03:40:32.53#ibcon#about to write, iclass 16, count 0 2006.229.03:40:32.53#ibcon#wrote, iclass 16, count 0 2006.229.03:40:32.53#ibcon#about to read 3, iclass 16, count 0 2006.229.03:40:32.56#ibcon#read 3, iclass 16, count 0 2006.229.03:40:32.56#ibcon#about to read 4, iclass 16, count 0 2006.229.03:40:32.56#ibcon#read 4, iclass 16, count 0 2006.229.03:40:32.56#ibcon#about to read 5, iclass 16, count 0 2006.229.03:40:32.56#ibcon#read 5, iclass 16, count 0 2006.229.03:40:32.56#ibcon#about to read 6, iclass 16, count 0 2006.229.03:40:32.56#ibcon#read 6, iclass 16, count 0 2006.229.03:40:32.56#ibcon#end of sib2, iclass 16, count 0 2006.229.03:40:32.56#ibcon#*after write, iclass 16, count 0 2006.229.03:40:32.56#ibcon#*before return 0, iclass 16, count 0 2006.229.03:40:32.56#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:32.56#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.03:40:32.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:40:32.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:40:32.56$vck44/vblo=6,719.99 2006.229.03:40:32.56#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.03:40:32.56#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.03:40:32.56#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:32.56#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:32.56#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:32.56#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:32.56#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:40:32.56#ibcon#first serial, iclass 18, count 0 2006.229.03:40:32.56#ibcon#enter sib2, iclass 18, count 0 2006.229.03:40:32.56#ibcon#flushed, iclass 18, count 0 2006.229.03:40:32.56#ibcon#about to write, iclass 18, count 0 2006.229.03:40:32.56#ibcon#wrote, iclass 18, count 0 2006.229.03:40:32.56#ibcon#about to read 3, iclass 18, count 0 2006.229.03:40:32.58#ibcon#read 3, iclass 18, count 0 2006.229.03:40:32.58#ibcon#about to read 4, iclass 18, count 0 2006.229.03:40:32.58#ibcon#read 4, iclass 18, count 0 2006.229.03:40:32.58#ibcon#about to read 5, iclass 18, count 0 2006.229.03:40:32.58#ibcon#read 5, iclass 18, count 0 2006.229.03:40:32.58#ibcon#about to read 6, iclass 18, count 0 2006.229.03:40:32.58#ibcon#read 6, iclass 18, count 0 2006.229.03:40:32.58#ibcon#end of sib2, iclass 18, count 0 2006.229.03:40:32.58#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:40:32.58#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:40:32.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:40:32.58#ibcon#*before write, iclass 18, count 0 2006.229.03:40:32.58#ibcon#enter sib2, iclass 18, count 0 2006.229.03:40:32.58#ibcon#flushed, iclass 18, count 0 2006.229.03:40:32.58#ibcon#about to write, iclass 18, count 0 2006.229.03:40:32.58#ibcon#wrote, iclass 18, count 0 2006.229.03:40:32.58#ibcon#about to read 3, iclass 18, count 0 2006.229.03:40:32.62#ibcon#read 3, iclass 18, count 0 2006.229.03:40:32.62#ibcon#about to read 4, iclass 18, count 0 2006.229.03:40:32.62#ibcon#read 4, iclass 18, count 0 2006.229.03:40:32.62#ibcon#about to read 5, iclass 18, count 0 2006.229.03:40:32.62#ibcon#read 5, iclass 18, count 0 2006.229.03:40:32.62#ibcon#about to read 6, iclass 18, count 0 2006.229.03:40:32.62#ibcon#read 6, iclass 18, count 0 2006.229.03:40:32.62#ibcon#end of sib2, iclass 18, count 0 2006.229.03:40:32.62#ibcon#*after write, iclass 18, count 0 2006.229.03:40:32.62#ibcon#*before return 0, iclass 18, count 0 2006.229.03:40:32.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:32.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.03:40:32.62#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:40:32.62#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:40:32.62$vck44/vb=6,4 2006.229.03:40:32.62#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.03:40:32.62#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.03:40:32.62#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:32.62#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:32.68#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:32.68#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:32.68#ibcon#enter wrdev, iclass 20, count 2 2006.229.03:40:32.68#ibcon#first serial, iclass 20, count 2 2006.229.03:40:32.68#ibcon#enter sib2, iclass 20, count 2 2006.229.03:40:32.68#ibcon#flushed, iclass 20, count 2 2006.229.03:40:32.68#ibcon#about to write, iclass 20, count 2 2006.229.03:40:32.68#ibcon#wrote, iclass 20, count 2 2006.229.03:40:32.68#ibcon#about to read 3, iclass 20, count 2 2006.229.03:40:32.70#ibcon#read 3, iclass 20, count 2 2006.229.03:40:32.70#ibcon#about to read 4, iclass 20, count 2 2006.229.03:40:32.70#ibcon#read 4, iclass 20, count 2 2006.229.03:40:32.70#ibcon#about to read 5, iclass 20, count 2 2006.229.03:40:32.70#ibcon#read 5, iclass 20, count 2 2006.229.03:40:32.70#ibcon#about to read 6, iclass 20, count 2 2006.229.03:40:32.70#ibcon#read 6, iclass 20, count 2 2006.229.03:40:32.70#ibcon#end of sib2, iclass 20, count 2 2006.229.03:40:32.70#ibcon#*mode == 0, iclass 20, count 2 2006.229.03:40:32.70#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.03:40:32.70#ibcon#[27=AT06-04\r\n] 2006.229.03:40:32.70#ibcon#*before write, iclass 20, count 2 2006.229.03:40:32.70#ibcon#enter sib2, iclass 20, count 2 2006.229.03:40:32.70#ibcon#flushed, iclass 20, count 2 2006.229.03:40:32.70#ibcon#about to write, iclass 20, count 2 2006.229.03:40:32.70#ibcon#wrote, iclass 20, count 2 2006.229.03:40:32.70#ibcon#about to read 3, iclass 20, count 2 2006.229.03:40:32.73#ibcon#read 3, iclass 20, count 2 2006.229.03:40:32.73#ibcon#about to read 4, iclass 20, count 2 2006.229.03:40:32.73#ibcon#read 4, iclass 20, count 2 2006.229.03:40:32.73#ibcon#about to read 5, iclass 20, count 2 2006.229.03:40:32.73#ibcon#read 5, iclass 20, count 2 2006.229.03:40:32.73#ibcon#about to read 6, iclass 20, count 2 2006.229.03:40:32.73#ibcon#read 6, iclass 20, count 2 2006.229.03:40:32.73#ibcon#end of sib2, iclass 20, count 2 2006.229.03:40:32.73#ibcon#*after write, iclass 20, count 2 2006.229.03:40:32.73#ibcon#*before return 0, iclass 20, count 2 2006.229.03:40:32.73#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:32.73#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.03:40:32.73#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.03:40:32.73#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:32.73#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:32.85#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:32.85#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:32.85#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:40:32.85#ibcon#first serial, iclass 20, count 0 2006.229.03:40:32.85#ibcon#enter sib2, iclass 20, count 0 2006.229.03:40:32.85#ibcon#flushed, iclass 20, count 0 2006.229.03:40:32.85#ibcon#about to write, iclass 20, count 0 2006.229.03:40:32.85#ibcon#wrote, iclass 20, count 0 2006.229.03:40:32.85#ibcon#about to read 3, iclass 20, count 0 2006.229.03:40:32.87#ibcon#read 3, iclass 20, count 0 2006.229.03:40:32.87#ibcon#about to read 4, iclass 20, count 0 2006.229.03:40:32.87#ibcon#read 4, iclass 20, count 0 2006.229.03:40:32.87#ibcon#about to read 5, iclass 20, count 0 2006.229.03:40:32.87#ibcon#read 5, iclass 20, count 0 2006.229.03:40:32.87#ibcon#about to read 6, iclass 20, count 0 2006.229.03:40:32.87#ibcon#read 6, iclass 20, count 0 2006.229.03:40:32.87#ibcon#end of sib2, iclass 20, count 0 2006.229.03:40:32.87#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:40:32.87#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:40:32.87#ibcon#[27=USB\r\n] 2006.229.03:40:32.87#ibcon#*before write, iclass 20, count 0 2006.229.03:40:32.87#ibcon#enter sib2, iclass 20, count 0 2006.229.03:40:32.87#ibcon#flushed, iclass 20, count 0 2006.229.03:40:32.87#ibcon#about to write, iclass 20, count 0 2006.229.03:40:32.87#ibcon#wrote, iclass 20, count 0 2006.229.03:40:32.87#ibcon#about to read 3, iclass 20, count 0 2006.229.03:40:32.87#abcon#<5=/04 2.7 6.1 29.57 961000.5\r\n> 2006.229.03:40:32.89#abcon#{5=INTERFACE CLEAR} 2006.229.03:40:32.90#ibcon#read 3, iclass 20, count 0 2006.229.03:40:32.90#ibcon#about to read 4, iclass 20, count 0 2006.229.03:40:32.90#ibcon#read 4, iclass 20, count 0 2006.229.03:40:32.90#ibcon#about to read 5, iclass 20, count 0 2006.229.03:40:32.90#ibcon#read 5, iclass 20, count 0 2006.229.03:40:32.90#ibcon#about to read 6, iclass 20, count 0 2006.229.03:40:32.90#ibcon#read 6, iclass 20, count 0 2006.229.03:40:32.90#ibcon#end of sib2, iclass 20, count 0 2006.229.03:40:32.90#ibcon#*after write, iclass 20, count 0 2006.229.03:40:32.90#ibcon#*before return 0, iclass 20, count 0 2006.229.03:40:32.90#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:32.90#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.03:40:32.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:40:32.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:40:32.90$vck44/vblo=7,734.99 2006.229.03:40:32.90#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.03:40:32.90#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.03:40:32.90#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:32.90#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:40:32.90#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:40:32.90#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:40:32.90#ibcon#enter wrdev, iclass 25, count 0 2006.229.03:40:32.90#ibcon#first serial, iclass 25, count 0 2006.229.03:40:32.90#ibcon#enter sib2, iclass 25, count 0 2006.229.03:40:32.90#ibcon#flushed, iclass 25, count 0 2006.229.03:40:32.90#ibcon#about to write, iclass 25, count 0 2006.229.03:40:32.90#ibcon#wrote, iclass 25, count 0 2006.229.03:40:32.90#ibcon#about to read 3, iclass 25, count 0 2006.229.03:40:32.92#ibcon#read 3, iclass 25, count 0 2006.229.03:40:32.92#ibcon#about to read 4, iclass 25, count 0 2006.229.03:40:32.92#ibcon#read 4, iclass 25, count 0 2006.229.03:40:32.92#ibcon#about to read 5, iclass 25, count 0 2006.229.03:40:32.92#ibcon#read 5, iclass 25, count 0 2006.229.03:40:32.92#ibcon#about to read 6, iclass 25, count 0 2006.229.03:40:32.92#ibcon#read 6, iclass 25, count 0 2006.229.03:40:32.92#ibcon#end of sib2, iclass 25, count 0 2006.229.03:40:32.92#ibcon#*mode == 0, iclass 25, count 0 2006.229.03:40:32.92#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.03:40:32.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:40:32.92#ibcon#*before write, iclass 25, count 0 2006.229.03:40:32.92#ibcon#enter sib2, iclass 25, count 0 2006.229.03:40:32.92#ibcon#flushed, iclass 25, count 0 2006.229.03:40:32.92#ibcon#about to write, iclass 25, count 0 2006.229.03:40:32.92#ibcon#wrote, iclass 25, count 0 2006.229.03:40:32.92#ibcon#about to read 3, iclass 25, count 0 2006.229.03:40:32.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:40:32.96#ibcon#read 3, iclass 25, count 0 2006.229.03:40:32.96#ibcon#about to read 4, iclass 25, count 0 2006.229.03:40:32.96#ibcon#read 4, iclass 25, count 0 2006.229.03:40:32.96#ibcon#about to read 5, iclass 25, count 0 2006.229.03:40:32.96#ibcon#read 5, iclass 25, count 0 2006.229.03:40:32.96#ibcon#about to read 6, iclass 25, count 0 2006.229.03:40:32.96#ibcon#read 6, iclass 25, count 0 2006.229.03:40:32.96#ibcon#end of sib2, iclass 25, count 0 2006.229.03:40:32.96#ibcon#*after write, iclass 25, count 0 2006.229.03:40:32.96#ibcon#*before return 0, iclass 25, count 0 2006.229.03:40:32.96#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:40:32.96#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.03:40:32.96#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.03:40:32.96#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.03:40:32.96$vck44/vb=7,4 2006.229.03:40:32.96#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.03:40:32.96#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.03:40:32.96#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:32.96#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:33.02#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:33.02#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:33.02#ibcon#enter wrdev, iclass 28, count 2 2006.229.03:40:33.02#ibcon#first serial, iclass 28, count 2 2006.229.03:40:33.02#ibcon#enter sib2, iclass 28, count 2 2006.229.03:40:33.02#ibcon#flushed, iclass 28, count 2 2006.229.03:40:33.02#ibcon#about to write, iclass 28, count 2 2006.229.03:40:33.02#ibcon#wrote, iclass 28, count 2 2006.229.03:40:33.02#ibcon#about to read 3, iclass 28, count 2 2006.229.03:40:33.04#ibcon#read 3, iclass 28, count 2 2006.229.03:40:33.04#ibcon#about to read 4, iclass 28, count 2 2006.229.03:40:33.04#ibcon#read 4, iclass 28, count 2 2006.229.03:40:33.04#ibcon#about to read 5, iclass 28, count 2 2006.229.03:40:33.04#ibcon#read 5, iclass 28, count 2 2006.229.03:40:33.04#ibcon#about to read 6, iclass 28, count 2 2006.229.03:40:33.04#ibcon#read 6, iclass 28, count 2 2006.229.03:40:33.04#ibcon#end of sib2, iclass 28, count 2 2006.229.03:40:33.04#ibcon#*mode == 0, iclass 28, count 2 2006.229.03:40:33.04#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.03:40:33.04#ibcon#[27=AT07-04\r\n] 2006.229.03:40:33.04#ibcon#*before write, iclass 28, count 2 2006.229.03:40:33.04#ibcon#enter sib2, iclass 28, count 2 2006.229.03:40:33.04#ibcon#flushed, iclass 28, count 2 2006.229.03:40:33.04#ibcon#about to write, iclass 28, count 2 2006.229.03:40:33.04#ibcon#wrote, iclass 28, count 2 2006.229.03:40:33.04#ibcon#about to read 3, iclass 28, count 2 2006.229.03:40:33.07#ibcon#read 3, iclass 28, count 2 2006.229.03:40:33.07#ibcon#about to read 4, iclass 28, count 2 2006.229.03:40:33.07#ibcon#read 4, iclass 28, count 2 2006.229.03:40:33.07#ibcon#about to read 5, iclass 28, count 2 2006.229.03:40:33.07#ibcon#read 5, iclass 28, count 2 2006.229.03:40:33.07#ibcon#about to read 6, iclass 28, count 2 2006.229.03:40:33.07#ibcon#read 6, iclass 28, count 2 2006.229.03:40:33.07#ibcon#end of sib2, iclass 28, count 2 2006.229.03:40:33.07#ibcon#*after write, iclass 28, count 2 2006.229.03:40:33.07#ibcon#*before return 0, iclass 28, count 2 2006.229.03:40:33.07#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:33.07#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.03:40:33.07#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.03:40:33.07#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:33.07#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:33.19#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:33.19#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:33.19#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:40:33.19#ibcon#first serial, iclass 28, count 0 2006.229.03:40:33.19#ibcon#enter sib2, iclass 28, count 0 2006.229.03:40:33.19#ibcon#flushed, iclass 28, count 0 2006.229.03:40:33.19#ibcon#about to write, iclass 28, count 0 2006.229.03:40:33.19#ibcon#wrote, iclass 28, count 0 2006.229.03:40:33.19#ibcon#about to read 3, iclass 28, count 0 2006.229.03:40:33.21#ibcon#read 3, iclass 28, count 0 2006.229.03:40:33.21#ibcon#about to read 4, iclass 28, count 0 2006.229.03:40:33.21#ibcon#read 4, iclass 28, count 0 2006.229.03:40:33.21#ibcon#about to read 5, iclass 28, count 0 2006.229.03:40:33.21#ibcon#read 5, iclass 28, count 0 2006.229.03:40:33.21#ibcon#about to read 6, iclass 28, count 0 2006.229.03:40:33.21#ibcon#read 6, iclass 28, count 0 2006.229.03:40:33.21#ibcon#end of sib2, iclass 28, count 0 2006.229.03:40:33.21#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:40:33.21#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:40:33.21#ibcon#[27=USB\r\n] 2006.229.03:40:33.21#ibcon#*before write, iclass 28, count 0 2006.229.03:40:33.21#ibcon#enter sib2, iclass 28, count 0 2006.229.03:40:33.21#ibcon#flushed, iclass 28, count 0 2006.229.03:40:33.21#ibcon#about to write, iclass 28, count 0 2006.229.03:40:33.21#ibcon#wrote, iclass 28, count 0 2006.229.03:40:33.21#ibcon#about to read 3, iclass 28, count 0 2006.229.03:40:33.24#ibcon#read 3, iclass 28, count 0 2006.229.03:40:33.24#ibcon#about to read 4, iclass 28, count 0 2006.229.03:40:33.24#ibcon#read 4, iclass 28, count 0 2006.229.03:40:33.24#ibcon#about to read 5, iclass 28, count 0 2006.229.03:40:33.24#ibcon#read 5, iclass 28, count 0 2006.229.03:40:33.24#ibcon#about to read 6, iclass 28, count 0 2006.229.03:40:33.24#ibcon#read 6, iclass 28, count 0 2006.229.03:40:33.24#ibcon#end of sib2, iclass 28, count 0 2006.229.03:40:33.24#ibcon#*after write, iclass 28, count 0 2006.229.03:40:33.24#ibcon#*before return 0, iclass 28, count 0 2006.229.03:40:33.24#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:33.24#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.03:40:33.24#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:40:33.24#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:40:33.24$vck44/vblo=8,744.99 2006.229.03:40:33.24#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.03:40:33.24#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.03:40:33.24#ibcon#ireg 17 cls_cnt 0 2006.229.03:40:33.24#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:33.24#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:33.24#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:33.24#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:40:33.24#ibcon#first serial, iclass 30, count 0 2006.229.03:40:33.24#ibcon#enter sib2, iclass 30, count 0 2006.229.03:40:33.24#ibcon#flushed, iclass 30, count 0 2006.229.03:40:33.24#ibcon#about to write, iclass 30, count 0 2006.229.03:40:33.24#ibcon#wrote, iclass 30, count 0 2006.229.03:40:33.24#ibcon#about to read 3, iclass 30, count 0 2006.229.03:40:33.26#ibcon#read 3, iclass 30, count 0 2006.229.03:40:33.26#ibcon#about to read 4, iclass 30, count 0 2006.229.03:40:33.26#ibcon#read 4, iclass 30, count 0 2006.229.03:40:33.26#ibcon#about to read 5, iclass 30, count 0 2006.229.03:40:33.26#ibcon#read 5, iclass 30, count 0 2006.229.03:40:33.26#ibcon#about to read 6, iclass 30, count 0 2006.229.03:40:33.26#ibcon#read 6, iclass 30, count 0 2006.229.03:40:33.26#ibcon#end of sib2, iclass 30, count 0 2006.229.03:40:33.26#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:40:33.26#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:40:33.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:40:33.26#ibcon#*before write, iclass 30, count 0 2006.229.03:40:33.26#ibcon#enter sib2, iclass 30, count 0 2006.229.03:40:33.26#ibcon#flushed, iclass 30, count 0 2006.229.03:40:33.26#ibcon#about to write, iclass 30, count 0 2006.229.03:40:33.26#ibcon#wrote, iclass 30, count 0 2006.229.03:40:33.26#ibcon#about to read 3, iclass 30, count 0 2006.229.03:40:33.30#ibcon#read 3, iclass 30, count 0 2006.229.03:40:33.30#ibcon#about to read 4, iclass 30, count 0 2006.229.03:40:33.30#ibcon#read 4, iclass 30, count 0 2006.229.03:40:33.30#ibcon#about to read 5, iclass 30, count 0 2006.229.03:40:33.30#ibcon#read 5, iclass 30, count 0 2006.229.03:40:33.30#ibcon#about to read 6, iclass 30, count 0 2006.229.03:40:33.30#ibcon#read 6, iclass 30, count 0 2006.229.03:40:33.30#ibcon#end of sib2, iclass 30, count 0 2006.229.03:40:33.30#ibcon#*after write, iclass 30, count 0 2006.229.03:40:33.30#ibcon#*before return 0, iclass 30, count 0 2006.229.03:40:33.30#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:33.30#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.03:40:33.30#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:40:33.30#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:40:33.30$vck44/vb=8,4 2006.229.03:40:33.30#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.03:40:33.30#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.03:40:33.30#ibcon#ireg 11 cls_cnt 2 2006.229.03:40:33.30#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:33.36#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:33.36#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:33.36#ibcon#enter wrdev, iclass 32, count 2 2006.229.03:40:33.36#ibcon#first serial, iclass 32, count 2 2006.229.03:40:33.36#ibcon#enter sib2, iclass 32, count 2 2006.229.03:40:33.36#ibcon#flushed, iclass 32, count 2 2006.229.03:40:33.36#ibcon#about to write, iclass 32, count 2 2006.229.03:40:33.36#ibcon#wrote, iclass 32, count 2 2006.229.03:40:33.36#ibcon#about to read 3, iclass 32, count 2 2006.229.03:40:33.38#ibcon#read 3, iclass 32, count 2 2006.229.03:40:33.38#ibcon#about to read 4, iclass 32, count 2 2006.229.03:40:33.38#ibcon#read 4, iclass 32, count 2 2006.229.03:40:33.38#ibcon#about to read 5, iclass 32, count 2 2006.229.03:40:33.38#ibcon#read 5, iclass 32, count 2 2006.229.03:40:33.38#ibcon#about to read 6, iclass 32, count 2 2006.229.03:40:33.38#ibcon#read 6, iclass 32, count 2 2006.229.03:40:33.38#ibcon#end of sib2, iclass 32, count 2 2006.229.03:40:33.38#ibcon#*mode == 0, iclass 32, count 2 2006.229.03:40:33.38#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.03:40:33.38#ibcon#[27=AT08-04\r\n] 2006.229.03:40:33.38#ibcon#*before write, iclass 32, count 2 2006.229.03:40:33.38#ibcon#enter sib2, iclass 32, count 2 2006.229.03:40:33.38#ibcon#flushed, iclass 32, count 2 2006.229.03:40:33.38#ibcon#about to write, iclass 32, count 2 2006.229.03:40:33.38#ibcon#wrote, iclass 32, count 2 2006.229.03:40:33.38#ibcon#about to read 3, iclass 32, count 2 2006.229.03:40:33.41#ibcon#read 3, iclass 32, count 2 2006.229.03:40:33.41#ibcon#about to read 4, iclass 32, count 2 2006.229.03:40:33.41#ibcon#read 4, iclass 32, count 2 2006.229.03:40:33.41#ibcon#about to read 5, iclass 32, count 2 2006.229.03:40:33.41#ibcon#read 5, iclass 32, count 2 2006.229.03:40:33.41#ibcon#about to read 6, iclass 32, count 2 2006.229.03:40:33.41#ibcon#read 6, iclass 32, count 2 2006.229.03:40:33.41#ibcon#end of sib2, iclass 32, count 2 2006.229.03:40:33.41#ibcon#*after write, iclass 32, count 2 2006.229.03:40:33.41#ibcon#*before return 0, iclass 32, count 2 2006.229.03:40:33.41#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:33.41#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.03:40:33.41#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.03:40:33.41#ibcon#ireg 7 cls_cnt 0 2006.229.03:40:33.41#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:33.53#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:33.53#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:33.53#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:40:33.53#ibcon#first serial, iclass 32, count 0 2006.229.03:40:33.53#ibcon#enter sib2, iclass 32, count 0 2006.229.03:40:33.53#ibcon#flushed, iclass 32, count 0 2006.229.03:40:33.53#ibcon#about to write, iclass 32, count 0 2006.229.03:40:33.53#ibcon#wrote, iclass 32, count 0 2006.229.03:40:33.53#ibcon#about to read 3, iclass 32, count 0 2006.229.03:40:33.55#ibcon#read 3, iclass 32, count 0 2006.229.03:40:33.55#ibcon#about to read 4, iclass 32, count 0 2006.229.03:40:33.55#ibcon#read 4, iclass 32, count 0 2006.229.03:40:33.55#ibcon#about to read 5, iclass 32, count 0 2006.229.03:40:33.55#ibcon#read 5, iclass 32, count 0 2006.229.03:40:33.55#ibcon#about to read 6, iclass 32, count 0 2006.229.03:40:33.55#ibcon#read 6, iclass 32, count 0 2006.229.03:40:33.55#ibcon#end of sib2, iclass 32, count 0 2006.229.03:40:33.55#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:40:33.55#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:40:33.55#ibcon#[27=USB\r\n] 2006.229.03:40:33.55#ibcon#*before write, iclass 32, count 0 2006.229.03:40:33.55#ibcon#enter sib2, iclass 32, count 0 2006.229.03:40:33.55#ibcon#flushed, iclass 32, count 0 2006.229.03:40:33.55#ibcon#about to write, iclass 32, count 0 2006.229.03:40:33.55#ibcon#wrote, iclass 32, count 0 2006.229.03:40:33.55#ibcon#about to read 3, iclass 32, count 0 2006.229.03:40:33.58#ibcon#read 3, iclass 32, count 0 2006.229.03:40:33.58#ibcon#about to read 4, iclass 32, count 0 2006.229.03:40:33.58#ibcon#read 4, iclass 32, count 0 2006.229.03:40:33.58#ibcon#about to read 5, iclass 32, count 0 2006.229.03:40:33.58#ibcon#read 5, iclass 32, count 0 2006.229.03:40:33.58#ibcon#about to read 6, iclass 32, count 0 2006.229.03:40:33.58#ibcon#read 6, iclass 32, count 0 2006.229.03:40:33.58#ibcon#end of sib2, iclass 32, count 0 2006.229.03:40:33.58#ibcon#*after write, iclass 32, count 0 2006.229.03:40:33.58#ibcon#*before return 0, iclass 32, count 0 2006.229.03:40:33.58#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:33.58#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.03:40:33.58#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:40:33.58#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:40:33.58$vck44/vabw=wide 2006.229.03:40:33.58#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.03:40:33.58#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.03:40:33.58#ibcon#ireg 8 cls_cnt 0 2006.229.03:40:33.58#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:33.58#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:33.58#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:33.58#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:40:33.58#ibcon#first serial, iclass 34, count 0 2006.229.03:40:33.58#ibcon#enter sib2, iclass 34, count 0 2006.229.03:40:33.58#ibcon#flushed, iclass 34, count 0 2006.229.03:40:33.58#ibcon#about to write, iclass 34, count 0 2006.229.03:40:33.58#ibcon#wrote, iclass 34, count 0 2006.229.03:40:33.58#ibcon#about to read 3, iclass 34, count 0 2006.229.03:40:33.60#ibcon#read 3, iclass 34, count 0 2006.229.03:40:33.60#ibcon#about to read 4, iclass 34, count 0 2006.229.03:40:33.60#ibcon#read 4, iclass 34, count 0 2006.229.03:40:33.60#ibcon#about to read 5, iclass 34, count 0 2006.229.03:40:33.60#ibcon#read 5, iclass 34, count 0 2006.229.03:40:33.60#ibcon#about to read 6, iclass 34, count 0 2006.229.03:40:33.60#ibcon#read 6, iclass 34, count 0 2006.229.03:40:33.60#ibcon#end of sib2, iclass 34, count 0 2006.229.03:40:33.60#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:40:33.60#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:40:33.60#ibcon#[25=BW32\r\n] 2006.229.03:40:33.60#ibcon#*before write, iclass 34, count 0 2006.229.03:40:33.60#ibcon#enter sib2, iclass 34, count 0 2006.229.03:40:33.60#ibcon#flushed, iclass 34, count 0 2006.229.03:40:33.60#ibcon#about to write, iclass 34, count 0 2006.229.03:40:33.60#ibcon#wrote, iclass 34, count 0 2006.229.03:40:33.60#ibcon#about to read 3, iclass 34, count 0 2006.229.03:40:33.63#ibcon#read 3, iclass 34, count 0 2006.229.03:40:33.63#ibcon#about to read 4, iclass 34, count 0 2006.229.03:40:33.63#ibcon#read 4, iclass 34, count 0 2006.229.03:40:33.63#ibcon#about to read 5, iclass 34, count 0 2006.229.03:40:33.63#ibcon#read 5, iclass 34, count 0 2006.229.03:40:33.63#ibcon#about to read 6, iclass 34, count 0 2006.229.03:40:33.63#ibcon#read 6, iclass 34, count 0 2006.229.03:40:33.63#ibcon#end of sib2, iclass 34, count 0 2006.229.03:40:33.63#ibcon#*after write, iclass 34, count 0 2006.229.03:40:33.63#ibcon#*before return 0, iclass 34, count 0 2006.229.03:40:33.63#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:33.63#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:40:33.63#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:40:33.63#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:40:33.63$vck44/vbbw=wide 2006.229.03:40:33.63#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.03:40:33.63#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.03:40:33.63#ibcon#ireg 8 cls_cnt 0 2006.229.03:40:33.63#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:40:33.70#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:40:33.70#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:40:33.70#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:40:33.70#ibcon#first serial, iclass 36, count 0 2006.229.03:40:33.70#ibcon#enter sib2, iclass 36, count 0 2006.229.03:40:33.70#ibcon#flushed, iclass 36, count 0 2006.229.03:40:33.70#ibcon#about to write, iclass 36, count 0 2006.229.03:40:33.70#ibcon#wrote, iclass 36, count 0 2006.229.03:40:33.70#ibcon#about to read 3, iclass 36, count 0 2006.229.03:40:33.72#ibcon#read 3, iclass 36, count 0 2006.229.03:40:33.72#ibcon#about to read 4, iclass 36, count 0 2006.229.03:40:33.72#ibcon#read 4, iclass 36, count 0 2006.229.03:40:33.72#ibcon#about to read 5, iclass 36, count 0 2006.229.03:40:33.72#ibcon#read 5, iclass 36, count 0 2006.229.03:40:33.72#ibcon#about to read 6, iclass 36, count 0 2006.229.03:40:33.72#ibcon#read 6, iclass 36, count 0 2006.229.03:40:33.72#ibcon#end of sib2, iclass 36, count 0 2006.229.03:40:33.72#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:40:33.72#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:40:33.72#ibcon#[27=BW32\r\n] 2006.229.03:40:33.72#ibcon#*before write, iclass 36, count 0 2006.229.03:40:33.72#ibcon#enter sib2, iclass 36, count 0 2006.229.03:40:33.72#ibcon#flushed, iclass 36, count 0 2006.229.03:40:33.72#ibcon#about to write, iclass 36, count 0 2006.229.03:40:33.72#ibcon#wrote, iclass 36, count 0 2006.229.03:40:33.72#ibcon#about to read 3, iclass 36, count 0 2006.229.03:40:33.75#ibcon#read 3, iclass 36, count 0 2006.229.03:40:33.75#ibcon#about to read 4, iclass 36, count 0 2006.229.03:40:33.75#ibcon#read 4, iclass 36, count 0 2006.229.03:40:33.75#ibcon#about to read 5, iclass 36, count 0 2006.229.03:40:33.75#ibcon#read 5, iclass 36, count 0 2006.229.03:40:33.75#ibcon#about to read 6, iclass 36, count 0 2006.229.03:40:33.75#ibcon#read 6, iclass 36, count 0 2006.229.03:40:33.75#ibcon#end of sib2, iclass 36, count 0 2006.229.03:40:33.75#ibcon#*after write, iclass 36, count 0 2006.229.03:40:33.75#ibcon#*before return 0, iclass 36, count 0 2006.229.03:40:33.75#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:40:33.75#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:40:33.75#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:40:33.75#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:40:33.75$setupk4/ifdk4 2006.229.03:40:33.75$ifdk4/lo= 2006.229.03:40:33.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:40:33.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:40:33.75$ifdk4/patch= 2006.229.03:40:33.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:40:33.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:40:33.75$setupk4/!*+20s 2006.229.03:40:43.04#abcon#<5=/04 2.7 6.1 29.57 951000.5\r\n> 2006.229.03:40:43.06#abcon#{5=INTERFACE CLEAR} 2006.229.03:40:43.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:40:48.26$setupk4/"tpicd 2006.229.03:40:48.26$setupk4/echo=off 2006.229.03:40:48.26$setupk4/xlog=off 2006.229.03:40:48.26:!2006.229.03:47:45 2006.229.03:40:50.14#trakl#Source acquired 2006.229.03:40:51.14#flagr#flagr/antenna,acquired 2006.229.03:47:45.00:preob 2006.229.03:47:46.14/onsource/TRACKING 2006.229.03:47:46.14:!2006.229.03:47:55 2006.229.03:47:55.00:"tape 2006.229.03:47:55.00:"st=record 2006.229.03:47:55.00:data_valid=on 2006.229.03:47:55.00:midob 2006.229.03:47:55.14/onsource/TRACKING 2006.229.03:47:55.14/wx/29.96,1000.3,94 2006.229.03:47:55.30/cable/+6.4089E-03 2006.229.03:47:56.39/va/01,08,usb,yes,30,32 2006.229.03:47:56.39/va/02,07,usb,yes,32,33 2006.229.03:47:56.39/va/03,06,usb,yes,40,42 2006.229.03:47:56.39/va/04,07,usb,yes,33,35 2006.229.03:47:56.39/va/05,04,usb,yes,30,30 2006.229.03:47:56.39/va/06,04,usb,yes,33,33 2006.229.03:47:56.39/va/07,05,usb,yes,30,30 2006.229.03:47:56.39/va/08,06,usb,yes,21,27 2006.229.03:47:56.62/valo/01,524.99,yes,locked 2006.229.03:47:56.62/valo/02,534.99,yes,locked 2006.229.03:47:56.62/valo/03,564.99,yes,locked 2006.229.03:47:56.62/valo/04,624.99,yes,locked 2006.229.03:47:56.62/valo/05,734.99,yes,locked 2006.229.03:47:56.62/valo/06,814.99,yes,locked 2006.229.03:47:56.62/valo/07,864.99,yes,locked 2006.229.03:47:56.62/valo/08,884.99,yes,locked 2006.229.03:47:57.71/vb/01,04,usb,yes,31,29 2006.229.03:47:57.71/vb/02,04,usb,yes,33,33 2006.229.03:47:57.71/vb/03,04,usb,yes,30,33 2006.229.03:47:57.71/vb/04,04,usb,yes,35,34 2006.229.03:47:57.71/vb/05,04,usb,yes,27,30 2006.229.03:47:57.71/vb/06,04,usb,yes,32,28 2006.229.03:47:57.71/vb/07,04,usb,yes,32,31 2006.229.03:47:57.71/vb/08,04,usb,yes,29,32 2006.229.03:47:57.95/vblo/01,629.99,yes,locked 2006.229.03:47:57.95/vblo/02,634.99,yes,locked 2006.229.03:47:57.95/vblo/03,649.99,yes,locked 2006.229.03:47:57.95/vblo/04,679.99,yes,locked 2006.229.03:47:57.95/vblo/05,709.99,yes,locked 2006.229.03:47:57.95/vblo/06,719.99,yes,locked 2006.229.03:47:57.95/vblo/07,734.99,yes,locked 2006.229.03:47:57.95/vblo/08,744.99,yes,locked 2006.229.03:47:58.10/vabw/8 2006.229.03:47:58.25/vbbw/8 2006.229.03:47:58.34/xfe/off,on,12.0 2006.229.03:47:58.72/ifatt/23,28,28,28 2006.229.03:47:59.08/fmout-gps/S +4.45E-07 2006.229.03:47:59.12:!2006.229.03:52:45 2006.229.03:52:45.01:data_valid=off 2006.229.03:52:45.02:"et 2006.229.03:52:45.02:!+3s 2006.229.03:52:48.04:"tape 2006.229.03:52:48.04:postob 2006.229.03:52:48.18/cable/+6.4070E-03 2006.229.03:52:48.19/wx/29.97,1000.4,95 2006.229.03:52:48.24/fmout-gps/S +4.44E-07 2006.229.03:52:48.24:scan_name=229-0401,jd0608,50 2006.229.03:52:48.25:source=0059+581,010245.76,582411.1,2000.0,ccw 2006.229.03:52:49.13#flagr#flagr/antenna,new-source 2006.229.03:52:49.14:checkk5 2006.229.03:52:49.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.03:52:49.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.03:52:50.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.03:52:50.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.03:52:51.09/chk_obsdata//k5ts1/T2290347??a.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.229.03:52:51.49/chk_obsdata//k5ts2/T2290347??b.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.229.03:52:51.88/chk_obsdata//k5ts3/T2290347??c.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.229.03:52:52.28/chk_obsdata//k5ts4/T2290347??d.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.229.03:52:53.01/k5log//k5ts1_log_newline 2006.229.03:52:53.73/k5log//k5ts2_log_newline 2006.229.03:52:54.43/k5log//k5ts3_log_newline 2006.229.03:52:55.15/k5log//k5ts4_log_newline 2006.229.03:52:55.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.03:52:55.18:setupk4=1 2006.229.03:52:55.18$setupk4/echo=on 2006.229.03:52:55.18$setupk4/pcalon 2006.229.03:52:55.18$pcalon/"no phase cal control is implemented here 2006.229.03:52:55.18$setupk4/"tpicd=stop 2006.229.03:52:55.18$setupk4/"rec=synch_on 2006.229.03:52:55.18$setupk4/"rec_mode=128 2006.229.03:52:55.18$setupk4/!* 2006.229.03:52:55.18$setupk4/recpk4 2006.229.03:52:55.18$recpk4/recpatch= 2006.229.03:52:55.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.03:52:55.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.03:52:55.18$setupk4/vck44 2006.229.03:52:55.18$vck44/valo=1,524.99 2006.229.03:52:55.18#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.03:52:55.18#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.03:52:55.18#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:55.18#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:55.18#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:55.18#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:55.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:52:55.18#ibcon#first serial, iclass 36, count 0 2006.229.03:52:55.18#ibcon#enter sib2, iclass 36, count 0 2006.229.03:52:55.18#ibcon#flushed, iclass 36, count 0 2006.229.03:52:55.18#ibcon#about to write, iclass 36, count 0 2006.229.03:52:55.18#ibcon#wrote, iclass 36, count 0 2006.229.03:52:55.18#ibcon#about to read 3, iclass 36, count 0 2006.229.03:52:55.19#ibcon#read 3, iclass 36, count 0 2006.229.03:52:55.19#ibcon#about to read 4, iclass 36, count 0 2006.229.03:52:55.19#ibcon#read 4, iclass 36, count 0 2006.229.03:52:55.19#ibcon#about to read 5, iclass 36, count 0 2006.229.03:52:55.19#ibcon#read 5, iclass 36, count 0 2006.229.03:52:55.19#ibcon#about to read 6, iclass 36, count 0 2006.229.03:52:55.19#ibcon#read 6, iclass 36, count 0 2006.229.03:52:55.19#ibcon#end of sib2, iclass 36, count 0 2006.229.03:52:55.19#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:52:55.19#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:52:55.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.03:52:55.19#ibcon#*before write, iclass 36, count 0 2006.229.03:52:55.19#ibcon#enter sib2, iclass 36, count 0 2006.229.03:52:55.19#ibcon#flushed, iclass 36, count 0 2006.229.03:52:55.19#ibcon#about to write, iclass 36, count 0 2006.229.03:52:55.19#ibcon#wrote, iclass 36, count 0 2006.229.03:52:55.19#ibcon#about to read 3, iclass 36, count 0 2006.229.03:52:55.24#ibcon#read 3, iclass 36, count 0 2006.229.03:52:55.24#ibcon#about to read 4, iclass 36, count 0 2006.229.03:52:55.24#ibcon#read 4, iclass 36, count 0 2006.229.03:52:55.24#ibcon#about to read 5, iclass 36, count 0 2006.229.03:52:55.24#ibcon#read 5, iclass 36, count 0 2006.229.03:52:55.24#ibcon#about to read 6, iclass 36, count 0 2006.229.03:52:55.24#ibcon#read 6, iclass 36, count 0 2006.229.03:52:55.24#ibcon#end of sib2, iclass 36, count 0 2006.229.03:52:55.24#ibcon#*after write, iclass 36, count 0 2006.229.03:52:55.24#ibcon#*before return 0, iclass 36, count 0 2006.229.03:52:55.24#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:55.24#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:55.24#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:52:55.24#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:52:55.24$vck44/va=1,8 2006.229.03:52:55.24#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.03:52:55.24#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.03:52:55.24#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:55.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:55.24#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:55.24#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:55.24#ibcon#enter wrdev, iclass 38, count 2 2006.229.03:52:55.24#ibcon#first serial, iclass 38, count 2 2006.229.03:52:55.24#ibcon#enter sib2, iclass 38, count 2 2006.229.03:52:55.24#ibcon#flushed, iclass 38, count 2 2006.229.03:52:55.24#ibcon#about to write, iclass 38, count 2 2006.229.03:52:55.24#ibcon#wrote, iclass 38, count 2 2006.229.03:52:55.24#ibcon#about to read 3, iclass 38, count 2 2006.229.03:52:55.26#ibcon#read 3, iclass 38, count 2 2006.229.03:52:55.26#ibcon#about to read 4, iclass 38, count 2 2006.229.03:52:55.26#ibcon#read 4, iclass 38, count 2 2006.229.03:52:55.26#ibcon#about to read 5, iclass 38, count 2 2006.229.03:52:55.26#ibcon#read 5, iclass 38, count 2 2006.229.03:52:55.26#ibcon#about to read 6, iclass 38, count 2 2006.229.03:52:55.26#ibcon#read 6, iclass 38, count 2 2006.229.03:52:55.26#ibcon#end of sib2, iclass 38, count 2 2006.229.03:52:55.26#ibcon#*mode == 0, iclass 38, count 2 2006.229.03:52:55.26#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.03:52:55.26#ibcon#[25=AT01-08\r\n] 2006.229.03:52:55.26#ibcon#*before write, iclass 38, count 2 2006.229.03:52:55.26#ibcon#enter sib2, iclass 38, count 2 2006.229.03:52:55.26#ibcon#flushed, iclass 38, count 2 2006.229.03:52:55.26#ibcon#about to write, iclass 38, count 2 2006.229.03:52:55.26#ibcon#wrote, iclass 38, count 2 2006.229.03:52:55.26#ibcon#about to read 3, iclass 38, count 2 2006.229.03:52:55.29#ibcon#read 3, iclass 38, count 2 2006.229.03:52:55.29#ibcon#about to read 4, iclass 38, count 2 2006.229.03:52:55.29#ibcon#read 4, iclass 38, count 2 2006.229.03:52:55.29#ibcon#about to read 5, iclass 38, count 2 2006.229.03:52:55.29#ibcon#read 5, iclass 38, count 2 2006.229.03:52:55.29#ibcon#about to read 6, iclass 38, count 2 2006.229.03:52:55.29#ibcon#read 6, iclass 38, count 2 2006.229.03:52:55.29#ibcon#end of sib2, iclass 38, count 2 2006.229.03:52:55.29#ibcon#*after write, iclass 38, count 2 2006.229.03:52:55.29#ibcon#*before return 0, iclass 38, count 2 2006.229.03:52:55.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:55.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:55.29#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.03:52:55.29#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:55.29#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:55.41#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:55.41#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:55.41#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:52:55.41#ibcon#first serial, iclass 38, count 0 2006.229.03:52:55.41#ibcon#enter sib2, iclass 38, count 0 2006.229.03:52:55.41#ibcon#flushed, iclass 38, count 0 2006.229.03:52:55.41#ibcon#about to write, iclass 38, count 0 2006.229.03:52:55.41#ibcon#wrote, iclass 38, count 0 2006.229.03:52:55.41#ibcon#about to read 3, iclass 38, count 0 2006.229.03:52:55.43#ibcon#read 3, iclass 38, count 0 2006.229.03:52:55.43#ibcon#about to read 4, iclass 38, count 0 2006.229.03:52:55.43#ibcon#read 4, iclass 38, count 0 2006.229.03:52:55.43#ibcon#about to read 5, iclass 38, count 0 2006.229.03:52:55.43#ibcon#read 5, iclass 38, count 0 2006.229.03:52:55.43#ibcon#about to read 6, iclass 38, count 0 2006.229.03:52:55.43#ibcon#read 6, iclass 38, count 0 2006.229.03:52:55.43#ibcon#end of sib2, iclass 38, count 0 2006.229.03:52:55.43#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:52:55.43#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:52:55.43#ibcon#[25=USB\r\n] 2006.229.03:52:55.43#ibcon#*before write, iclass 38, count 0 2006.229.03:52:55.43#ibcon#enter sib2, iclass 38, count 0 2006.229.03:52:55.43#ibcon#flushed, iclass 38, count 0 2006.229.03:52:55.43#ibcon#about to write, iclass 38, count 0 2006.229.03:52:55.43#ibcon#wrote, iclass 38, count 0 2006.229.03:52:55.43#ibcon#about to read 3, iclass 38, count 0 2006.229.03:52:55.46#ibcon#read 3, iclass 38, count 0 2006.229.03:52:55.46#ibcon#about to read 4, iclass 38, count 0 2006.229.03:52:55.46#ibcon#read 4, iclass 38, count 0 2006.229.03:52:55.46#ibcon#about to read 5, iclass 38, count 0 2006.229.03:52:55.46#ibcon#read 5, iclass 38, count 0 2006.229.03:52:55.46#ibcon#about to read 6, iclass 38, count 0 2006.229.03:52:55.46#ibcon#read 6, iclass 38, count 0 2006.229.03:52:55.46#ibcon#end of sib2, iclass 38, count 0 2006.229.03:52:55.46#ibcon#*after write, iclass 38, count 0 2006.229.03:52:55.46#ibcon#*before return 0, iclass 38, count 0 2006.229.03:52:55.46#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:55.46#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:55.46#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:52:55.46#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:52:55.46$vck44/valo=2,534.99 2006.229.03:52:55.46#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.03:52:55.46#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.03:52:55.46#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:55.46#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:52:55.46#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:52:55.46#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:52:55.46#ibcon#enter wrdev, iclass 40, count 0 2006.229.03:52:55.46#ibcon#first serial, iclass 40, count 0 2006.229.03:52:55.46#ibcon#enter sib2, iclass 40, count 0 2006.229.03:52:55.46#ibcon#flushed, iclass 40, count 0 2006.229.03:52:55.46#ibcon#about to write, iclass 40, count 0 2006.229.03:52:55.46#ibcon#wrote, iclass 40, count 0 2006.229.03:52:55.46#ibcon#about to read 3, iclass 40, count 0 2006.229.03:52:55.48#ibcon#read 3, iclass 40, count 0 2006.229.03:52:55.48#ibcon#about to read 4, iclass 40, count 0 2006.229.03:52:55.48#ibcon#read 4, iclass 40, count 0 2006.229.03:52:55.48#ibcon#about to read 5, iclass 40, count 0 2006.229.03:52:55.48#ibcon#read 5, iclass 40, count 0 2006.229.03:52:55.48#ibcon#about to read 6, iclass 40, count 0 2006.229.03:52:55.48#ibcon#read 6, iclass 40, count 0 2006.229.03:52:55.48#ibcon#end of sib2, iclass 40, count 0 2006.229.03:52:55.48#ibcon#*mode == 0, iclass 40, count 0 2006.229.03:52:55.48#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.03:52:55.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.03:52:55.48#ibcon#*before write, iclass 40, count 0 2006.229.03:52:55.48#ibcon#enter sib2, iclass 40, count 0 2006.229.03:52:55.48#ibcon#flushed, iclass 40, count 0 2006.229.03:52:55.48#ibcon#about to write, iclass 40, count 0 2006.229.03:52:55.48#ibcon#wrote, iclass 40, count 0 2006.229.03:52:55.48#ibcon#about to read 3, iclass 40, count 0 2006.229.03:52:55.52#ibcon#read 3, iclass 40, count 0 2006.229.03:52:55.52#ibcon#about to read 4, iclass 40, count 0 2006.229.03:52:55.52#ibcon#read 4, iclass 40, count 0 2006.229.03:52:55.52#ibcon#about to read 5, iclass 40, count 0 2006.229.03:52:55.52#ibcon#read 5, iclass 40, count 0 2006.229.03:52:55.52#ibcon#about to read 6, iclass 40, count 0 2006.229.03:52:55.52#ibcon#read 6, iclass 40, count 0 2006.229.03:52:55.52#ibcon#end of sib2, iclass 40, count 0 2006.229.03:52:55.52#ibcon#*after write, iclass 40, count 0 2006.229.03:52:55.52#ibcon#*before return 0, iclass 40, count 0 2006.229.03:52:55.52#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:52:55.52#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.03:52:55.52#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.03:52:55.52#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.03:52:55.52$vck44/va=2,7 2006.229.03:52:55.52#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.03:52:55.52#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.03:52:55.52#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:55.52#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:52:55.58#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:52:55.58#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:52:55.58#ibcon#enter wrdev, iclass 4, count 2 2006.229.03:52:55.58#ibcon#first serial, iclass 4, count 2 2006.229.03:52:55.58#ibcon#enter sib2, iclass 4, count 2 2006.229.03:52:55.58#ibcon#flushed, iclass 4, count 2 2006.229.03:52:55.58#ibcon#about to write, iclass 4, count 2 2006.229.03:52:55.58#ibcon#wrote, iclass 4, count 2 2006.229.03:52:55.58#ibcon#about to read 3, iclass 4, count 2 2006.229.03:52:55.60#ibcon#read 3, iclass 4, count 2 2006.229.03:52:55.60#ibcon#about to read 4, iclass 4, count 2 2006.229.03:52:55.60#ibcon#read 4, iclass 4, count 2 2006.229.03:52:55.60#ibcon#about to read 5, iclass 4, count 2 2006.229.03:52:55.60#ibcon#read 5, iclass 4, count 2 2006.229.03:52:55.60#ibcon#about to read 6, iclass 4, count 2 2006.229.03:52:55.60#ibcon#read 6, iclass 4, count 2 2006.229.03:52:55.60#ibcon#end of sib2, iclass 4, count 2 2006.229.03:52:55.60#ibcon#*mode == 0, iclass 4, count 2 2006.229.03:52:55.60#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.03:52:55.60#ibcon#[25=AT02-07\r\n] 2006.229.03:52:55.60#ibcon#*before write, iclass 4, count 2 2006.229.03:52:55.60#ibcon#enter sib2, iclass 4, count 2 2006.229.03:52:55.60#ibcon#flushed, iclass 4, count 2 2006.229.03:52:55.60#ibcon#about to write, iclass 4, count 2 2006.229.03:52:55.60#ibcon#wrote, iclass 4, count 2 2006.229.03:52:55.60#ibcon#about to read 3, iclass 4, count 2 2006.229.03:52:55.63#ibcon#read 3, iclass 4, count 2 2006.229.03:52:55.63#ibcon#about to read 4, iclass 4, count 2 2006.229.03:52:55.63#ibcon#read 4, iclass 4, count 2 2006.229.03:52:55.63#ibcon#about to read 5, iclass 4, count 2 2006.229.03:52:55.63#ibcon#read 5, iclass 4, count 2 2006.229.03:52:55.63#ibcon#about to read 6, iclass 4, count 2 2006.229.03:52:55.63#ibcon#read 6, iclass 4, count 2 2006.229.03:52:55.63#ibcon#end of sib2, iclass 4, count 2 2006.229.03:52:55.63#ibcon#*after write, iclass 4, count 2 2006.229.03:52:55.63#ibcon#*before return 0, iclass 4, count 2 2006.229.03:52:55.63#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:52:55.63#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.03:52:55.63#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.03:52:55.63#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:55.63#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:52:55.75#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:52:55.75#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:52:55.75#ibcon#enter wrdev, iclass 4, count 0 2006.229.03:52:55.75#ibcon#first serial, iclass 4, count 0 2006.229.03:52:55.75#ibcon#enter sib2, iclass 4, count 0 2006.229.03:52:55.75#ibcon#flushed, iclass 4, count 0 2006.229.03:52:55.75#ibcon#about to write, iclass 4, count 0 2006.229.03:52:55.75#ibcon#wrote, iclass 4, count 0 2006.229.03:52:55.75#ibcon#about to read 3, iclass 4, count 0 2006.229.03:52:55.77#ibcon#read 3, iclass 4, count 0 2006.229.03:52:55.77#ibcon#about to read 4, iclass 4, count 0 2006.229.03:52:55.77#ibcon#read 4, iclass 4, count 0 2006.229.03:52:55.77#ibcon#about to read 5, iclass 4, count 0 2006.229.03:52:55.77#ibcon#read 5, iclass 4, count 0 2006.229.03:52:55.77#ibcon#about to read 6, iclass 4, count 0 2006.229.03:52:55.77#ibcon#read 6, iclass 4, count 0 2006.229.03:52:55.77#ibcon#end of sib2, iclass 4, count 0 2006.229.03:52:55.77#ibcon#*mode == 0, iclass 4, count 0 2006.229.03:52:55.77#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.03:52:55.77#ibcon#[25=USB\r\n] 2006.229.03:52:55.77#ibcon#*before write, iclass 4, count 0 2006.229.03:52:55.77#ibcon#enter sib2, iclass 4, count 0 2006.229.03:52:55.77#ibcon#flushed, iclass 4, count 0 2006.229.03:52:55.77#ibcon#about to write, iclass 4, count 0 2006.229.03:52:55.77#ibcon#wrote, iclass 4, count 0 2006.229.03:52:55.77#ibcon#about to read 3, iclass 4, count 0 2006.229.03:52:55.80#ibcon#read 3, iclass 4, count 0 2006.229.03:52:55.80#ibcon#about to read 4, iclass 4, count 0 2006.229.03:52:55.80#ibcon#read 4, iclass 4, count 0 2006.229.03:52:55.80#ibcon#about to read 5, iclass 4, count 0 2006.229.03:52:55.80#ibcon#read 5, iclass 4, count 0 2006.229.03:52:55.80#ibcon#about to read 6, iclass 4, count 0 2006.229.03:52:55.80#ibcon#read 6, iclass 4, count 0 2006.229.03:52:55.80#ibcon#end of sib2, iclass 4, count 0 2006.229.03:52:55.80#ibcon#*after write, iclass 4, count 0 2006.229.03:52:55.80#ibcon#*before return 0, iclass 4, count 0 2006.229.03:52:55.80#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:52:55.80#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.03:52:55.80#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.03:52:55.80#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.03:52:55.80$vck44/valo=3,564.99 2006.229.03:52:55.80#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.03:52:55.80#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.03:52:55.80#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:55.80#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:52:55.80#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:52:55.80#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:52:55.80#ibcon#enter wrdev, iclass 6, count 0 2006.229.03:52:55.80#ibcon#first serial, iclass 6, count 0 2006.229.03:52:55.80#ibcon#enter sib2, iclass 6, count 0 2006.229.03:52:55.80#ibcon#flushed, iclass 6, count 0 2006.229.03:52:55.80#ibcon#about to write, iclass 6, count 0 2006.229.03:52:55.80#ibcon#wrote, iclass 6, count 0 2006.229.03:52:55.80#ibcon#about to read 3, iclass 6, count 0 2006.229.03:52:55.82#ibcon#read 3, iclass 6, count 0 2006.229.03:52:55.82#ibcon#about to read 4, iclass 6, count 0 2006.229.03:52:55.82#ibcon#read 4, iclass 6, count 0 2006.229.03:52:55.82#ibcon#about to read 5, iclass 6, count 0 2006.229.03:52:55.82#ibcon#read 5, iclass 6, count 0 2006.229.03:52:55.82#ibcon#about to read 6, iclass 6, count 0 2006.229.03:52:55.82#ibcon#read 6, iclass 6, count 0 2006.229.03:52:55.82#ibcon#end of sib2, iclass 6, count 0 2006.229.03:52:55.82#ibcon#*mode == 0, iclass 6, count 0 2006.229.03:52:55.82#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.03:52:55.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.03:52:55.82#ibcon#*before write, iclass 6, count 0 2006.229.03:52:55.82#ibcon#enter sib2, iclass 6, count 0 2006.229.03:52:55.82#ibcon#flushed, iclass 6, count 0 2006.229.03:52:55.82#ibcon#about to write, iclass 6, count 0 2006.229.03:52:55.82#ibcon#wrote, iclass 6, count 0 2006.229.03:52:55.82#ibcon#about to read 3, iclass 6, count 0 2006.229.03:52:55.86#ibcon#read 3, iclass 6, count 0 2006.229.03:52:55.86#ibcon#about to read 4, iclass 6, count 0 2006.229.03:52:55.86#ibcon#read 4, iclass 6, count 0 2006.229.03:52:55.86#ibcon#about to read 5, iclass 6, count 0 2006.229.03:52:55.86#ibcon#read 5, iclass 6, count 0 2006.229.03:52:55.86#ibcon#about to read 6, iclass 6, count 0 2006.229.03:52:55.86#ibcon#read 6, iclass 6, count 0 2006.229.03:52:55.86#ibcon#end of sib2, iclass 6, count 0 2006.229.03:52:55.86#ibcon#*after write, iclass 6, count 0 2006.229.03:52:55.86#ibcon#*before return 0, iclass 6, count 0 2006.229.03:52:55.86#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:52:55.86#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.03:52:55.86#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.03:52:55.86#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.03:52:55.86$vck44/va=3,6 2006.229.03:52:55.86#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.03:52:55.86#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.03:52:55.86#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:55.86#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:55.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:55.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:55.92#ibcon#enter wrdev, iclass 10, count 2 2006.229.03:52:55.92#ibcon#first serial, iclass 10, count 2 2006.229.03:52:55.92#ibcon#enter sib2, iclass 10, count 2 2006.229.03:52:55.92#ibcon#flushed, iclass 10, count 2 2006.229.03:52:55.92#ibcon#about to write, iclass 10, count 2 2006.229.03:52:55.92#ibcon#wrote, iclass 10, count 2 2006.229.03:52:55.92#ibcon#about to read 3, iclass 10, count 2 2006.229.03:52:55.94#ibcon#read 3, iclass 10, count 2 2006.229.03:52:55.94#ibcon#about to read 4, iclass 10, count 2 2006.229.03:52:55.94#ibcon#read 4, iclass 10, count 2 2006.229.03:52:55.94#ibcon#about to read 5, iclass 10, count 2 2006.229.03:52:55.94#ibcon#read 5, iclass 10, count 2 2006.229.03:52:55.94#ibcon#about to read 6, iclass 10, count 2 2006.229.03:52:55.94#ibcon#read 6, iclass 10, count 2 2006.229.03:52:55.94#ibcon#end of sib2, iclass 10, count 2 2006.229.03:52:55.94#ibcon#*mode == 0, iclass 10, count 2 2006.229.03:52:55.94#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.03:52:55.94#ibcon#[25=AT03-06\r\n] 2006.229.03:52:55.94#ibcon#*before write, iclass 10, count 2 2006.229.03:52:55.94#ibcon#enter sib2, iclass 10, count 2 2006.229.03:52:55.94#ibcon#flushed, iclass 10, count 2 2006.229.03:52:55.94#ibcon#about to write, iclass 10, count 2 2006.229.03:52:55.94#ibcon#wrote, iclass 10, count 2 2006.229.03:52:55.94#ibcon#about to read 3, iclass 10, count 2 2006.229.03:52:55.97#ibcon#read 3, iclass 10, count 2 2006.229.03:52:55.97#ibcon#about to read 4, iclass 10, count 2 2006.229.03:52:55.97#ibcon#read 4, iclass 10, count 2 2006.229.03:52:55.97#ibcon#about to read 5, iclass 10, count 2 2006.229.03:52:55.97#ibcon#read 5, iclass 10, count 2 2006.229.03:52:55.97#ibcon#about to read 6, iclass 10, count 2 2006.229.03:52:55.97#ibcon#read 6, iclass 10, count 2 2006.229.03:52:55.97#ibcon#end of sib2, iclass 10, count 2 2006.229.03:52:55.97#ibcon#*after write, iclass 10, count 2 2006.229.03:52:55.97#ibcon#*before return 0, iclass 10, count 2 2006.229.03:52:55.97#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:55.97#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:55.97#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.03:52:55.97#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:55.97#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:56.09#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:56.09#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:56.09#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:52:56.09#ibcon#first serial, iclass 10, count 0 2006.229.03:52:56.09#ibcon#enter sib2, iclass 10, count 0 2006.229.03:52:56.09#ibcon#flushed, iclass 10, count 0 2006.229.03:52:56.09#ibcon#about to write, iclass 10, count 0 2006.229.03:52:56.09#ibcon#wrote, iclass 10, count 0 2006.229.03:52:56.09#ibcon#about to read 3, iclass 10, count 0 2006.229.03:52:56.11#ibcon#read 3, iclass 10, count 0 2006.229.03:52:56.11#ibcon#about to read 4, iclass 10, count 0 2006.229.03:52:56.11#ibcon#read 4, iclass 10, count 0 2006.229.03:52:56.11#ibcon#about to read 5, iclass 10, count 0 2006.229.03:52:56.11#ibcon#read 5, iclass 10, count 0 2006.229.03:52:56.11#ibcon#about to read 6, iclass 10, count 0 2006.229.03:52:56.11#ibcon#read 6, iclass 10, count 0 2006.229.03:52:56.11#ibcon#end of sib2, iclass 10, count 0 2006.229.03:52:56.11#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:52:56.11#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:52:56.11#ibcon#[25=USB\r\n] 2006.229.03:52:56.11#ibcon#*before write, iclass 10, count 0 2006.229.03:52:56.11#ibcon#enter sib2, iclass 10, count 0 2006.229.03:52:56.11#ibcon#flushed, iclass 10, count 0 2006.229.03:52:56.11#ibcon#about to write, iclass 10, count 0 2006.229.03:52:56.11#ibcon#wrote, iclass 10, count 0 2006.229.03:52:56.11#ibcon#about to read 3, iclass 10, count 0 2006.229.03:52:56.14#ibcon#read 3, iclass 10, count 0 2006.229.03:52:56.14#ibcon#about to read 4, iclass 10, count 0 2006.229.03:52:56.14#ibcon#read 4, iclass 10, count 0 2006.229.03:52:56.14#ibcon#about to read 5, iclass 10, count 0 2006.229.03:52:56.14#ibcon#read 5, iclass 10, count 0 2006.229.03:52:56.14#ibcon#about to read 6, iclass 10, count 0 2006.229.03:52:56.14#ibcon#read 6, iclass 10, count 0 2006.229.03:52:56.14#ibcon#end of sib2, iclass 10, count 0 2006.229.03:52:56.14#ibcon#*after write, iclass 10, count 0 2006.229.03:52:56.14#ibcon#*before return 0, iclass 10, count 0 2006.229.03:52:56.14#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:56.14#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:56.14#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:52:56.14#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:52:56.14$vck44/valo=4,624.99 2006.229.03:52:56.14#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.03:52:56.14#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.03:52:56.14#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:56.14#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:56.14#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:56.14#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:56.14#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:52:56.14#ibcon#first serial, iclass 12, count 0 2006.229.03:52:56.14#ibcon#enter sib2, iclass 12, count 0 2006.229.03:52:56.14#ibcon#flushed, iclass 12, count 0 2006.229.03:52:56.14#ibcon#about to write, iclass 12, count 0 2006.229.03:52:56.15#ibcon#wrote, iclass 12, count 0 2006.229.03:52:56.15#ibcon#about to read 3, iclass 12, count 0 2006.229.03:52:56.16#ibcon#read 3, iclass 12, count 0 2006.229.03:52:56.16#ibcon#about to read 4, iclass 12, count 0 2006.229.03:52:56.16#ibcon#read 4, iclass 12, count 0 2006.229.03:52:56.16#ibcon#about to read 5, iclass 12, count 0 2006.229.03:52:56.16#ibcon#read 5, iclass 12, count 0 2006.229.03:52:56.16#ibcon#about to read 6, iclass 12, count 0 2006.229.03:52:56.16#ibcon#read 6, iclass 12, count 0 2006.229.03:52:56.16#ibcon#end of sib2, iclass 12, count 0 2006.229.03:52:56.16#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:52:56.16#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:52:56.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.03:52:56.16#ibcon#*before write, iclass 12, count 0 2006.229.03:52:56.16#ibcon#enter sib2, iclass 12, count 0 2006.229.03:52:56.16#ibcon#flushed, iclass 12, count 0 2006.229.03:52:56.16#ibcon#about to write, iclass 12, count 0 2006.229.03:52:56.16#ibcon#wrote, iclass 12, count 0 2006.229.03:52:56.16#ibcon#about to read 3, iclass 12, count 0 2006.229.03:52:56.20#ibcon#read 3, iclass 12, count 0 2006.229.03:52:56.20#ibcon#about to read 4, iclass 12, count 0 2006.229.03:52:56.20#ibcon#read 4, iclass 12, count 0 2006.229.03:52:56.20#ibcon#about to read 5, iclass 12, count 0 2006.229.03:52:56.20#ibcon#read 5, iclass 12, count 0 2006.229.03:52:56.20#ibcon#about to read 6, iclass 12, count 0 2006.229.03:52:56.20#ibcon#read 6, iclass 12, count 0 2006.229.03:52:56.20#ibcon#end of sib2, iclass 12, count 0 2006.229.03:52:56.20#ibcon#*after write, iclass 12, count 0 2006.229.03:52:56.20#ibcon#*before return 0, iclass 12, count 0 2006.229.03:52:56.20#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:56.20#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:56.20#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:52:56.20#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:52:56.20$vck44/va=4,7 2006.229.03:52:56.20#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.03:52:56.20#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.03:52:56.20#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:56.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:56.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:56.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:56.26#ibcon#enter wrdev, iclass 14, count 2 2006.229.03:52:56.26#ibcon#first serial, iclass 14, count 2 2006.229.03:52:56.26#ibcon#enter sib2, iclass 14, count 2 2006.229.03:52:56.26#ibcon#flushed, iclass 14, count 2 2006.229.03:52:56.26#ibcon#about to write, iclass 14, count 2 2006.229.03:52:56.26#ibcon#wrote, iclass 14, count 2 2006.229.03:52:56.26#ibcon#about to read 3, iclass 14, count 2 2006.229.03:52:56.28#ibcon#read 3, iclass 14, count 2 2006.229.03:52:56.28#ibcon#about to read 4, iclass 14, count 2 2006.229.03:52:56.28#ibcon#read 4, iclass 14, count 2 2006.229.03:52:56.28#ibcon#about to read 5, iclass 14, count 2 2006.229.03:52:56.28#ibcon#read 5, iclass 14, count 2 2006.229.03:52:56.28#ibcon#about to read 6, iclass 14, count 2 2006.229.03:52:56.28#ibcon#read 6, iclass 14, count 2 2006.229.03:52:56.28#ibcon#end of sib2, iclass 14, count 2 2006.229.03:52:56.28#ibcon#*mode == 0, iclass 14, count 2 2006.229.03:52:56.28#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.03:52:56.28#ibcon#[25=AT04-07\r\n] 2006.229.03:52:56.28#ibcon#*before write, iclass 14, count 2 2006.229.03:52:56.28#ibcon#enter sib2, iclass 14, count 2 2006.229.03:52:56.28#ibcon#flushed, iclass 14, count 2 2006.229.03:52:56.28#ibcon#about to write, iclass 14, count 2 2006.229.03:52:56.28#ibcon#wrote, iclass 14, count 2 2006.229.03:52:56.28#ibcon#about to read 3, iclass 14, count 2 2006.229.03:52:56.31#ibcon#read 3, iclass 14, count 2 2006.229.03:52:56.31#ibcon#about to read 4, iclass 14, count 2 2006.229.03:52:56.31#ibcon#read 4, iclass 14, count 2 2006.229.03:52:56.31#ibcon#about to read 5, iclass 14, count 2 2006.229.03:52:56.31#ibcon#read 5, iclass 14, count 2 2006.229.03:52:56.31#ibcon#about to read 6, iclass 14, count 2 2006.229.03:52:56.31#ibcon#read 6, iclass 14, count 2 2006.229.03:52:56.31#ibcon#end of sib2, iclass 14, count 2 2006.229.03:52:56.31#ibcon#*after write, iclass 14, count 2 2006.229.03:52:56.31#ibcon#*before return 0, iclass 14, count 2 2006.229.03:52:56.31#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:56.31#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:56.31#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.03:52:56.31#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:56.31#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:56.43#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:56.43#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:56.43#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:52:56.43#ibcon#first serial, iclass 14, count 0 2006.229.03:52:56.43#ibcon#enter sib2, iclass 14, count 0 2006.229.03:52:56.43#ibcon#flushed, iclass 14, count 0 2006.229.03:52:56.43#ibcon#about to write, iclass 14, count 0 2006.229.03:52:56.43#ibcon#wrote, iclass 14, count 0 2006.229.03:52:56.43#ibcon#about to read 3, iclass 14, count 0 2006.229.03:52:56.45#ibcon#read 3, iclass 14, count 0 2006.229.03:52:56.45#ibcon#about to read 4, iclass 14, count 0 2006.229.03:52:56.45#ibcon#read 4, iclass 14, count 0 2006.229.03:52:56.45#ibcon#about to read 5, iclass 14, count 0 2006.229.03:52:56.45#ibcon#read 5, iclass 14, count 0 2006.229.03:52:56.45#ibcon#about to read 6, iclass 14, count 0 2006.229.03:52:56.45#ibcon#read 6, iclass 14, count 0 2006.229.03:52:56.45#ibcon#end of sib2, iclass 14, count 0 2006.229.03:52:56.45#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:52:56.45#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:52:56.45#ibcon#[25=USB\r\n] 2006.229.03:52:56.45#ibcon#*before write, iclass 14, count 0 2006.229.03:52:56.45#ibcon#enter sib2, iclass 14, count 0 2006.229.03:52:56.45#ibcon#flushed, iclass 14, count 0 2006.229.03:52:56.45#ibcon#about to write, iclass 14, count 0 2006.229.03:52:56.45#ibcon#wrote, iclass 14, count 0 2006.229.03:52:56.45#ibcon#about to read 3, iclass 14, count 0 2006.229.03:52:56.48#ibcon#read 3, iclass 14, count 0 2006.229.03:52:56.48#ibcon#about to read 4, iclass 14, count 0 2006.229.03:52:56.48#ibcon#read 4, iclass 14, count 0 2006.229.03:52:56.48#ibcon#about to read 5, iclass 14, count 0 2006.229.03:52:56.48#ibcon#read 5, iclass 14, count 0 2006.229.03:52:56.48#ibcon#about to read 6, iclass 14, count 0 2006.229.03:52:56.48#ibcon#read 6, iclass 14, count 0 2006.229.03:52:56.48#ibcon#end of sib2, iclass 14, count 0 2006.229.03:52:56.48#ibcon#*after write, iclass 14, count 0 2006.229.03:52:56.48#ibcon#*before return 0, iclass 14, count 0 2006.229.03:52:56.48#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:56.48#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:56.48#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:52:56.48#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:52:56.48$vck44/valo=5,734.99 2006.229.03:52:56.48#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:52:56.48#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:52:56.48#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:56.48#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:56.48#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:56.48#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:56.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:52:56.48#ibcon#first serial, iclass 16, count 0 2006.229.03:52:56.48#ibcon#enter sib2, iclass 16, count 0 2006.229.03:52:56.48#ibcon#flushed, iclass 16, count 0 2006.229.03:52:56.48#ibcon#about to write, iclass 16, count 0 2006.229.03:52:56.48#ibcon#wrote, iclass 16, count 0 2006.229.03:52:56.48#ibcon#about to read 3, iclass 16, count 0 2006.229.03:52:56.50#ibcon#read 3, iclass 16, count 0 2006.229.03:52:56.50#ibcon#about to read 4, iclass 16, count 0 2006.229.03:52:56.50#ibcon#read 4, iclass 16, count 0 2006.229.03:52:56.50#ibcon#about to read 5, iclass 16, count 0 2006.229.03:52:56.50#ibcon#read 5, iclass 16, count 0 2006.229.03:52:56.50#ibcon#about to read 6, iclass 16, count 0 2006.229.03:52:56.50#ibcon#read 6, iclass 16, count 0 2006.229.03:52:56.50#ibcon#end of sib2, iclass 16, count 0 2006.229.03:52:56.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:52:56.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:52:56.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.03:52:56.50#ibcon#*before write, iclass 16, count 0 2006.229.03:52:56.50#ibcon#enter sib2, iclass 16, count 0 2006.229.03:52:56.50#ibcon#flushed, iclass 16, count 0 2006.229.03:52:56.50#ibcon#about to write, iclass 16, count 0 2006.229.03:52:56.50#ibcon#wrote, iclass 16, count 0 2006.229.03:52:56.50#ibcon#about to read 3, iclass 16, count 0 2006.229.03:52:56.54#ibcon#read 3, iclass 16, count 0 2006.229.03:52:56.54#ibcon#about to read 4, iclass 16, count 0 2006.229.03:52:56.54#ibcon#read 4, iclass 16, count 0 2006.229.03:52:56.54#ibcon#about to read 5, iclass 16, count 0 2006.229.03:52:56.54#ibcon#read 5, iclass 16, count 0 2006.229.03:52:56.54#ibcon#about to read 6, iclass 16, count 0 2006.229.03:52:56.54#ibcon#read 6, iclass 16, count 0 2006.229.03:52:56.54#ibcon#end of sib2, iclass 16, count 0 2006.229.03:52:56.54#ibcon#*after write, iclass 16, count 0 2006.229.03:52:56.54#ibcon#*before return 0, iclass 16, count 0 2006.229.03:52:56.54#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:56.54#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:56.54#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:52:56.54#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:52:56.54$vck44/va=5,4 2006.229.03:52:56.54#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.03:52:56.54#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.03:52:56.54#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:56.54#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:56.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:56.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:56.60#ibcon#enter wrdev, iclass 18, count 2 2006.229.03:52:56.60#ibcon#first serial, iclass 18, count 2 2006.229.03:52:56.60#ibcon#enter sib2, iclass 18, count 2 2006.229.03:52:56.60#ibcon#flushed, iclass 18, count 2 2006.229.03:52:56.60#ibcon#about to write, iclass 18, count 2 2006.229.03:52:56.60#ibcon#wrote, iclass 18, count 2 2006.229.03:52:56.60#ibcon#about to read 3, iclass 18, count 2 2006.229.03:52:56.62#ibcon#read 3, iclass 18, count 2 2006.229.03:52:56.62#ibcon#about to read 4, iclass 18, count 2 2006.229.03:52:56.62#ibcon#read 4, iclass 18, count 2 2006.229.03:52:56.62#ibcon#about to read 5, iclass 18, count 2 2006.229.03:52:56.62#ibcon#read 5, iclass 18, count 2 2006.229.03:52:56.62#ibcon#about to read 6, iclass 18, count 2 2006.229.03:52:56.62#ibcon#read 6, iclass 18, count 2 2006.229.03:52:56.62#ibcon#end of sib2, iclass 18, count 2 2006.229.03:52:56.62#ibcon#*mode == 0, iclass 18, count 2 2006.229.03:52:56.62#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.03:52:56.62#ibcon#[25=AT05-04\r\n] 2006.229.03:52:56.62#ibcon#*before write, iclass 18, count 2 2006.229.03:52:56.62#ibcon#enter sib2, iclass 18, count 2 2006.229.03:52:56.62#ibcon#flushed, iclass 18, count 2 2006.229.03:52:56.62#ibcon#about to write, iclass 18, count 2 2006.229.03:52:56.62#ibcon#wrote, iclass 18, count 2 2006.229.03:52:56.62#ibcon#about to read 3, iclass 18, count 2 2006.229.03:52:56.65#ibcon#read 3, iclass 18, count 2 2006.229.03:52:56.65#ibcon#about to read 4, iclass 18, count 2 2006.229.03:52:56.65#ibcon#read 4, iclass 18, count 2 2006.229.03:52:56.65#ibcon#about to read 5, iclass 18, count 2 2006.229.03:52:56.65#ibcon#read 5, iclass 18, count 2 2006.229.03:52:56.65#ibcon#about to read 6, iclass 18, count 2 2006.229.03:52:56.65#ibcon#read 6, iclass 18, count 2 2006.229.03:52:56.65#ibcon#end of sib2, iclass 18, count 2 2006.229.03:52:56.65#ibcon#*after write, iclass 18, count 2 2006.229.03:52:56.65#ibcon#*before return 0, iclass 18, count 2 2006.229.03:52:56.65#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:56.65#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:56.65#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.03:52:56.65#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:56.65#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:56.77#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:56.77#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:56.77#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:52:56.77#ibcon#first serial, iclass 18, count 0 2006.229.03:52:56.77#ibcon#enter sib2, iclass 18, count 0 2006.229.03:52:56.77#ibcon#flushed, iclass 18, count 0 2006.229.03:52:56.77#ibcon#about to write, iclass 18, count 0 2006.229.03:52:56.77#ibcon#wrote, iclass 18, count 0 2006.229.03:52:56.77#ibcon#about to read 3, iclass 18, count 0 2006.229.03:52:56.79#ibcon#read 3, iclass 18, count 0 2006.229.03:52:56.79#ibcon#about to read 4, iclass 18, count 0 2006.229.03:52:56.79#ibcon#read 4, iclass 18, count 0 2006.229.03:52:56.79#ibcon#about to read 5, iclass 18, count 0 2006.229.03:52:56.79#ibcon#read 5, iclass 18, count 0 2006.229.03:52:56.79#ibcon#about to read 6, iclass 18, count 0 2006.229.03:52:56.79#ibcon#read 6, iclass 18, count 0 2006.229.03:52:56.79#ibcon#end of sib2, iclass 18, count 0 2006.229.03:52:56.79#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:52:56.79#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:52:56.79#ibcon#[25=USB\r\n] 2006.229.03:52:56.79#ibcon#*before write, iclass 18, count 0 2006.229.03:52:56.79#ibcon#enter sib2, iclass 18, count 0 2006.229.03:52:56.79#ibcon#flushed, iclass 18, count 0 2006.229.03:52:56.79#ibcon#about to write, iclass 18, count 0 2006.229.03:52:56.79#ibcon#wrote, iclass 18, count 0 2006.229.03:52:56.79#ibcon#about to read 3, iclass 18, count 0 2006.229.03:52:56.82#ibcon#read 3, iclass 18, count 0 2006.229.03:52:56.82#ibcon#about to read 4, iclass 18, count 0 2006.229.03:52:56.82#ibcon#read 4, iclass 18, count 0 2006.229.03:52:56.82#ibcon#about to read 5, iclass 18, count 0 2006.229.03:52:56.82#ibcon#read 5, iclass 18, count 0 2006.229.03:52:56.82#ibcon#about to read 6, iclass 18, count 0 2006.229.03:52:56.82#ibcon#read 6, iclass 18, count 0 2006.229.03:52:56.82#ibcon#end of sib2, iclass 18, count 0 2006.229.03:52:56.82#ibcon#*after write, iclass 18, count 0 2006.229.03:52:56.82#ibcon#*before return 0, iclass 18, count 0 2006.229.03:52:56.82#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:56.82#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:56.82#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:52:56.82#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:52:56.82$vck44/valo=6,814.99 2006.229.03:52:56.82#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.03:52:56.82#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.03:52:56.82#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:56.82#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:56.82#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:56.82#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:56.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:52:56.82#ibcon#first serial, iclass 20, count 0 2006.229.03:52:56.82#ibcon#enter sib2, iclass 20, count 0 2006.229.03:52:56.82#ibcon#flushed, iclass 20, count 0 2006.229.03:52:56.82#ibcon#about to write, iclass 20, count 0 2006.229.03:52:56.82#ibcon#wrote, iclass 20, count 0 2006.229.03:52:56.82#ibcon#about to read 3, iclass 20, count 0 2006.229.03:52:56.84#ibcon#read 3, iclass 20, count 0 2006.229.03:52:56.84#ibcon#about to read 4, iclass 20, count 0 2006.229.03:52:56.84#ibcon#read 4, iclass 20, count 0 2006.229.03:52:56.84#ibcon#about to read 5, iclass 20, count 0 2006.229.03:52:56.84#ibcon#read 5, iclass 20, count 0 2006.229.03:52:56.84#ibcon#about to read 6, iclass 20, count 0 2006.229.03:52:56.84#ibcon#read 6, iclass 20, count 0 2006.229.03:52:56.84#ibcon#end of sib2, iclass 20, count 0 2006.229.03:52:56.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:52:56.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:52:56.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.03:52:56.84#ibcon#*before write, iclass 20, count 0 2006.229.03:52:56.84#ibcon#enter sib2, iclass 20, count 0 2006.229.03:52:56.84#ibcon#flushed, iclass 20, count 0 2006.229.03:52:56.84#ibcon#about to write, iclass 20, count 0 2006.229.03:52:56.84#ibcon#wrote, iclass 20, count 0 2006.229.03:52:56.84#ibcon#about to read 3, iclass 20, count 0 2006.229.03:52:56.88#ibcon#read 3, iclass 20, count 0 2006.229.03:52:56.88#ibcon#about to read 4, iclass 20, count 0 2006.229.03:52:56.88#ibcon#read 4, iclass 20, count 0 2006.229.03:52:56.88#ibcon#about to read 5, iclass 20, count 0 2006.229.03:52:56.88#ibcon#read 5, iclass 20, count 0 2006.229.03:52:56.88#ibcon#about to read 6, iclass 20, count 0 2006.229.03:52:56.88#ibcon#read 6, iclass 20, count 0 2006.229.03:52:56.88#ibcon#end of sib2, iclass 20, count 0 2006.229.03:52:56.88#ibcon#*after write, iclass 20, count 0 2006.229.03:52:56.88#ibcon#*before return 0, iclass 20, count 0 2006.229.03:52:56.88#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:56.88#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:56.88#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:52:56.88#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:52:56.88$vck44/va=6,4 2006.229.03:52:56.88#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.03:52:56.88#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.03:52:56.88#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:56.88#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:56.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:56.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:56.94#ibcon#enter wrdev, iclass 22, count 2 2006.229.03:52:56.94#ibcon#first serial, iclass 22, count 2 2006.229.03:52:56.94#ibcon#enter sib2, iclass 22, count 2 2006.229.03:52:56.94#ibcon#flushed, iclass 22, count 2 2006.229.03:52:56.94#ibcon#about to write, iclass 22, count 2 2006.229.03:52:56.94#ibcon#wrote, iclass 22, count 2 2006.229.03:52:56.94#ibcon#about to read 3, iclass 22, count 2 2006.229.03:52:56.96#ibcon#read 3, iclass 22, count 2 2006.229.03:52:56.96#ibcon#about to read 4, iclass 22, count 2 2006.229.03:52:56.96#ibcon#read 4, iclass 22, count 2 2006.229.03:52:56.96#ibcon#about to read 5, iclass 22, count 2 2006.229.03:52:56.96#ibcon#read 5, iclass 22, count 2 2006.229.03:52:56.96#ibcon#about to read 6, iclass 22, count 2 2006.229.03:52:56.96#ibcon#read 6, iclass 22, count 2 2006.229.03:52:56.96#ibcon#end of sib2, iclass 22, count 2 2006.229.03:52:56.96#ibcon#*mode == 0, iclass 22, count 2 2006.229.03:52:56.96#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.03:52:56.96#ibcon#[25=AT06-04\r\n] 2006.229.03:52:56.96#ibcon#*before write, iclass 22, count 2 2006.229.03:52:56.96#ibcon#enter sib2, iclass 22, count 2 2006.229.03:52:56.96#ibcon#flushed, iclass 22, count 2 2006.229.03:52:56.96#ibcon#about to write, iclass 22, count 2 2006.229.03:52:56.96#ibcon#wrote, iclass 22, count 2 2006.229.03:52:56.96#ibcon#about to read 3, iclass 22, count 2 2006.229.03:52:56.99#ibcon#read 3, iclass 22, count 2 2006.229.03:52:56.99#ibcon#about to read 4, iclass 22, count 2 2006.229.03:52:56.99#ibcon#read 4, iclass 22, count 2 2006.229.03:52:56.99#ibcon#about to read 5, iclass 22, count 2 2006.229.03:52:56.99#ibcon#read 5, iclass 22, count 2 2006.229.03:52:56.99#ibcon#about to read 6, iclass 22, count 2 2006.229.03:52:56.99#ibcon#read 6, iclass 22, count 2 2006.229.03:52:56.99#ibcon#end of sib2, iclass 22, count 2 2006.229.03:52:56.99#ibcon#*after write, iclass 22, count 2 2006.229.03:52:56.99#ibcon#*before return 0, iclass 22, count 2 2006.229.03:52:56.99#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:56.99#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:56.99#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.03:52:56.99#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:56.99#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:57.11#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:57.11#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:57.11#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:52:57.11#ibcon#first serial, iclass 22, count 0 2006.229.03:52:57.11#ibcon#enter sib2, iclass 22, count 0 2006.229.03:52:57.11#ibcon#flushed, iclass 22, count 0 2006.229.03:52:57.11#ibcon#about to write, iclass 22, count 0 2006.229.03:52:57.11#ibcon#wrote, iclass 22, count 0 2006.229.03:52:57.11#ibcon#about to read 3, iclass 22, count 0 2006.229.03:52:57.13#ibcon#read 3, iclass 22, count 0 2006.229.03:52:57.13#ibcon#about to read 4, iclass 22, count 0 2006.229.03:52:57.13#ibcon#read 4, iclass 22, count 0 2006.229.03:52:57.13#ibcon#about to read 5, iclass 22, count 0 2006.229.03:52:57.13#ibcon#read 5, iclass 22, count 0 2006.229.03:52:57.13#ibcon#about to read 6, iclass 22, count 0 2006.229.03:52:57.13#ibcon#read 6, iclass 22, count 0 2006.229.03:52:57.13#ibcon#end of sib2, iclass 22, count 0 2006.229.03:52:57.13#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:52:57.13#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:52:57.13#ibcon#[25=USB\r\n] 2006.229.03:52:57.13#ibcon#*before write, iclass 22, count 0 2006.229.03:52:57.13#ibcon#enter sib2, iclass 22, count 0 2006.229.03:52:57.13#ibcon#flushed, iclass 22, count 0 2006.229.03:52:57.13#ibcon#about to write, iclass 22, count 0 2006.229.03:52:57.13#ibcon#wrote, iclass 22, count 0 2006.229.03:52:57.13#ibcon#about to read 3, iclass 22, count 0 2006.229.03:52:57.16#ibcon#read 3, iclass 22, count 0 2006.229.03:52:57.16#ibcon#about to read 4, iclass 22, count 0 2006.229.03:52:57.16#ibcon#read 4, iclass 22, count 0 2006.229.03:52:57.16#ibcon#about to read 5, iclass 22, count 0 2006.229.03:52:57.16#ibcon#read 5, iclass 22, count 0 2006.229.03:52:57.16#ibcon#about to read 6, iclass 22, count 0 2006.229.03:52:57.16#ibcon#read 6, iclass 22, count 0 2006.229.03:52:57.16#ibcon#end of sib2, iclass 22, count 0 2006.229.03:52:57.16#ibcon#*after write, iclass 22, count 0 2006.229.03:52:57.16#ibcon#*before return 0, iclass 22, count 0 2006.229.03:52:57.16#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:57.16#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:57.16#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:52:57.16#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:52:57.16$vck44/valo=7,864.99 2006.229.03:52:57.16#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.03:52:57.16#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.03:52:57.16#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:57.16#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:57.16#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:57.16#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:57.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:52:57.16#ibcon#first serial, iclass 24, count 0 2006.229.03:52:57.16#ibcon#enter sib2, iclass 24, count 0 2006.229.03:52:57.16#ibcon#flushed, iclass 24, count 0 2006.229.03:52:57.16#ibcon#about to write, iclass 24, count 0 2006.229.03:52:57.16#ibcon#wrote, iclass 24, count 0 2006.229.03:52:57.16#ibcon#about to read 3, iclass 24, count 0 2006.229.03:52:57.18#ibcon#read 3, iclass 24, count 0 2006.229.03:52:57.18#ibcon#about to read 4, iclass 24, count 0 2006.229.03:52:57.18#ibcon#read 4, iclass 24, count 0 2006.229.03:52:57.18#ibcon#about to read 5, iclass 24, count 0 2006.229.03:52:57.18#ibcon#read 5, iclass 24, count 0 2006.229.03:52:57.18#ibcon#about to read 6, iclass 24, count 0 2006.229.03:52:57.18#ibcon#read 6, iclass 24, count 0 2006.229.03:52:57.18#ibcon#end of sib2, iclass 24, count 0 2006.229.03:52:57.18#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:52:57.18#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:52:57.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.03:52:57.18#ibcon#*before write, iclass 24, count 0 2006.229.03:52:57.18#ibcon#enter sib2, iclass 24, count 0 2006.229.03:52:57.18#ibcon#flushed, iclass 24, count 0 2006.229.03:52:57.18#ibcon#about to write, iclass 24, count 0 2006.229.03:52:57.18#ibcon#wrote, iclass 24, count 0 2006.229.03:52:57.18#ibcon#about to read 3, iclass 24, count 0 2006.229.03:52:57.22#ibcon#read 3, iclass 24, count 0 2006.229.03:52:57.22#ibcon#about to read 4, iclass 24, count 0 2006.229.03:52:57.22#ibcon#read 4, iclass 24, count 0 2006.229.03:52:57.22#ibcon#about to read 5, iclass 24, count 0 2006.229.03:52:57.22#ibcon#read 5, iclass 24, count 0 2006.229.03:52:57.22#ibcon#about to read 6, iclass 24, count 0 2006.229.03:52:57.22#ibcon#read 6, iclass 24, count 0 2006.229.03:52:57.22#ibcon#end of sib2, iclass 24, count 0 2006.229.03:52:57.22#ibcon#*after write, iclass 24, count 0 2006.229.03:52:57.22#ibcon#*before return 0, iclass 24, count 0 2006.229.03:52:57.22#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:57.22#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:57.22#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:52:57.22#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:52:57.22$vck44/va=7,5 2006.229.03:52:57.22#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.03:52:57.22#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.03:52:57.22#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:57.22#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:57.28#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:57.28#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:57.28#ibcon#enter wrdev, iclass 26, count 2 2006.229.03:52:57.28#ibcon#first serial, iclass 26, count 2 2006.229.03:52:57.28#ibcon#enter sib2, iclass 26, count 2 2006.229.03:52:57.28#ibcon#flushed, iclass 26, count 2 2006.229.03:52:57.28#ibcon#about to write, iclass 26, count 2 2006.229.03:52:57.28#ibcon#wrote, iclass 26, count 2 2006.229.03:52:57.28#ibcon#about to read 3, iclass 26, count 2 2006.229.03:52:57.30#ibcon#read 3, iclass 26, count 2 2006.229.03:52:57.30#ibcon#about to read 4, iclass 26, count 2 2006.229.03:52:57.30#ibcon#read 4, iclass 26, count 2 2006.229.03:52:57.30#ibcon#about to read 5, iclass 26, count 2 2006.229.03:52:57.30#ibcon#read 5, iclass 26, count 2 2006.229.03:52:57.30#ibcon#about to read 6, iclass 26, count 2 2006.229.03:52:57.30#ibcon#read 6, iclass 26, count 2 2006.229.03:52:57.30#ibcon#end of sib2, iclass 26, count 2 2006.229.03:52:57.30#ibcon#*mode == 0, iclass 26, count 2 2006.229.03:52:57.30#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.03:52:57.30#ibcon#[25=AT07-05\r\n] 2006.229.03:52:57.30#ibcon#*before write, iclass 26, count 2 2006.229.03:52:57.30#ibcon#enter sib2, iclass 26, count 2 2006.229.03:52:57.30#ibcon#flushed, iclass 26, count 2 2006.229.03:52:57.30#ibcon#about to write, iclass 26, count 2 2006.229.03:52:57.30#ibcon#wrote, iclass 26, count 2 2006.229.03:52:57.30#ibcon#about to read 3, iclass 26, count 2 2006.229.03:52:57.33#ibcon#read 3, iclass 26, count 2 2006.229.03:52:57.33#ibcon#about to read 4, iclass 26, count 2 2006.229.03:52:57.33#ibcon#read 4, iclass 26, count 2 2006.229.03:52:57.33#ibcon#about to read 5, iclass 26, count 2 2006.229.03:52:57.33#ibcon#read 5, iclass 26, count 2 2006.229.03:52:57.33#ibcon#about to read 6, iclass 26, count 2 2006.229.03:52:57.33#ibcon#read 6, iclass 26, count 2 2006.229.03:52:57.33#ibcon#end of sib2, iclass 26, count 2 2006.229.03:52:57.33#ibcon#*after write, iclass 26, count 2 2006.229.03:52:57.33#ibcon#*before return 0, iclass 26, count 2 2006.229.03:52:57.33#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:57.33#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:57.33#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.03:52:57.33#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:57.33#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:52:57.45#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:52:57.45#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:52:57.45#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:52:57.45#ibcon#first serial, iclass 26, count 0 2006.229.03:52:57.45#ibcon#enter sib2, iclass 26, count 0 2006.229.03:52:57.45#ibcon#flushed, iclass 26, count 0 2006.229.03:52:57.45#ibcon#about to write, iclass 26, count 0 2006.229.03:52:57.45#ibcon#wrote, iclass 26, count 0 2006.229.03:52:57.45#ibcon#about to read 3, iclass 26, count 0 2006.229.03:52:57.47#ibcon#read 3, iclass 26, count 0 2006.229.03:52:57.47#ibcon#about to read 4, iclass 26, count 0 2006.229.03:52:57.47#ibcon#read 4, iclass 26, count 0 2006.229.03:52:57.47#ibcon#about to read 5, iclass 26, count 0 2006.229.03:52:57.47#ibcon#read 5, iclass 26, count 0 2006.229.03:52:57.47#ibcon#about to read 6, iclass 26, count 0 2006.229.03:52:57.47#ibcon#read 6, iclass 26, count 0 2006.229.03:52:57.47#ibcon#end of sib2, iclass 26, count 0 2006.229.03:52:57.47#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:52:57.47#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:52:57.47#ibcon#[25=USB\r\n] 2006.229.03:52:57.47#ibcon#*before write, iclass 26, count 0 2006.229.03:52:57.47#ibcon#enter sib2, iclass 26, count 0 2006.229.03:52:57.47#ibcon#flushed, iclass 26, count 0 2006.229.03:52:57.47#ibcon#about to write, iclass 26, count 0 2006.229.03:52:57.47#ibcon#wrote, iclass 26, count 0 2006.229.03:52:57.47#ibcon#about to read 3, iclass 26, count 0 2006.229.03:52:57.50#ibcon#read 3, iclass 26, count 0 2006.229.03:52:57.50#ibcon#about to read 4, iclass 26, count 0 2006.229.03:52:57.50#ibcon#read 4, iclass 26, count 0 2006.229.03:52:57.50#ibcon#about to read 5, iclass 26, count 0 2006.229.03:52:57.50#ibcon#read 5, iclass 26, count 0 2006.229.03:52:57.50#ibcon#about to read 6, iclass 26, count 0 2006.229.03:52:57.50#ibcon#read 6, iclass 26, count 0 2006.229.03:52:57.50#ibcon#end of sib2, iclass 26, count 0 2006.229.03:52:57.50#ibcon#*after write, iclass 26, count 0 2006.229.03:52:57.50#ibcon#*before return 0, iclass 26, count 0 2006.229.03:52:57.50#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:52:57.50#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:52:57.50#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:52:57.50#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:52:57.50$vck44/valo=8,884.99 2006.229.03:52:57.50#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.03:52:57.50#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.03:52:57.50#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:57.50#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:52:57.50#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:52:57.50#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:52:57.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:52:57.50#ibcon#first serial, iclass 28, count 0 2006.229.03:52:57.50#ibcon#enter sib2, iclass 28, count 0 2006.229.03:52:57.50#ibcon#flushed, iclass 28, count 0 2006.229.03:52:57.50#ibcon#about to write, iclass 28, count 0 2006.229.03:52:57.50#ibcon#wrote, iclass 28, count 0 2006.229.03:52:57.50#ibcon#about to read 3, iclass 28, count 0 2006.229.03:52:57.52#ibcon#read 3, iclass 28, count 0 2006.229.03:52:57.52#ibcon#about to read 4, iclass 28, count 0 2006.229.03:52:57.52#ibcon#read 4, iclass 28, count 0 2006.229.03:52:57.52#ibcon#about to read 5, iclass 28, count 0 2006.229.03:52:57.52#ibcon#read 5, iclass 28, count 0 2006.229.03:52:57.52#ibcon#about to read 6, iclass 28, count 0 2006.229.03:52:57.52#ibcon#read 6, iclass 28, count 0 2006.229.03:52:57.52#ibcon#end of sib2, iclass 28, count 0 2006.229.03:52:57.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:52:57.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:52:57.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.03:52:57.52#ibcon#*before write, iclass 28, count 0 2006.229.03:52:57.52#ibcon#enter sib2, iclass 28, count 0 2006.229.03:52:57.52#ibcon#flushed, iclass 28, count 0 2006.229.03:52:57.52#ibcon#about to write, iclass 28, count 0 2006.229.03:52:57.52#ibcon#wrote, iclass 28, count 0 2006.229.03:52:57.52#ibcon#about to read 3, iclass 28, count 0 2006.229.03:52:57.56#ibcon#read 3, iclass 28, count 0 2006.229.03:52:57.56#ibcon#about to read 4, iclass 28, count 0 2006.229.03:52:57.56#ibcon#read 4, iclass 28, count 0 2006.229.03:52:57.56#ibcon#about to read 5, iclass 28, count 0 2006.229.03:52:57.56#ibcon#read 5, iclass 28, count 0 2006.229.03:52:57.56#ibcon#about to read 6, iclass 28, count 0 2006.229.03:52:57.56#ibcon#read 6, iclass 28, count 0 2006.229.03:52:57.56#ibcon#end of sib2, iclass 28, count 0 2006.229.03:52:57.56#ibcon#*after write, iclass 28, count 0 2006.229.03:52:57.56#ibcon#*before return 0, iclass 28, count 0 2006.229.03:52:57.56#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:52:57.56#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:52:57.56#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:52:57.56#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:52:57.56$vck44/va=8,6 2006.229.03:52:57.56#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.03:52:57.56#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.03:52:57.56#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:57.56#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:52:57.62#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:52:57.62#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:52:57.62#ibcon#enter wrdev, iclass 30, count 2 2006.229.03:52:57.62#ibcon#first serial, iclass 30, count 2 2006.229.03:52:57.62#ibcon#enter sib2, iclass 30, count 2 2006.229.03:52:57.62#ibcon#flushed, iclass 30, count 2 2006.229.03:52:57.62#ibcon#about to write, iclass 30, count 2 2006.229.03:52:57.62#ibcon#wrote, iclass 30, count 2 2006.229.03:52:57.62#ibcon#about to read 3, iclass 30, count 2 2006.229.03:52:57.64#ibcon#read 3, iclass 30, count 2 2006.229.03:52:57.64#ibcon#about to read 4, iclass 30, count 2 2006.229.03:52:57.64#ibcon#read 4, iclass 30, count 2 2006.229.03:52:57.64#ibcon#about to read 5, iclass 30, count 2 2006.229.03:52:57.64#ibcon#read 5, iclass 30, count 2 2006.229.03:52:57.64#ibcon#about to read 6, iclass 30, count 2 2006.229.03:52:57.64#ibcon#read 6, iclass 30, count 2 2006.229.03:52:57.64#ibcon#end of sib2, iclass 30, count 2 2006.229.03:52:57.64#ibcon#*mode == 0, iclass 30, count 2 2006.229.03:52:57.64#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.03:52:57.64#ibcon#[25=AT08-06\r\n] 2006.229.03:52:57.64#ibcon#*before write, iclass 30, count 2 2006.229.03:52:57.64#ibcon#enter sib2, iclass 30, count 2 2006.229.03:52:57.64#ibcon#flushed, iclass 30, count 2 2006.229.03:52:57.64#ibcon#about to write, iclass 30, count 2 2006.229.03:52:57.64#ibcon#wrote, iclass 30, count 2 2006.229.03:52:57.64#ibcon#about to read 3, iclass 30, count 2 2006.229.03:52:57.67#ibcon#read 3, iclass 30, count 2 2006.229.03:52:57.67#ibcon#about to read 4, iclass 30, count 2 2006.229.03:52:57.67#ibcon#read 4, iclass 30, count 2 2006.229.03:52:57.67#ibcon#about to read 5, iclass 30, count 2 2006.229.03:52:57.67#ibcon#read 5, iclass 30, count 2 2006.229.03:52:57.67#ibcon#about to read 6, iclass 30, count 2 2006.229.03:52:57.67#ibcon#read 6, iclass 30, count 2 2006.229.03:52:57.67#ibcon#end of sib2, iclass 30, count 2 2006.229.03:52:57.67#ibcon#*after write, iclass 30, count 2 2006.229.03:52:57.67#ibcon#*before return 0, iclass 30, count 2 2006.229.03:52:57.67#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:52:57.67#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:52:57.67#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.03:52:57.67#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:57.67#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:52:57.79#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:52:57.79#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:52:57.79#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:52:57.79#ibcon#first serial, iclass 30, count 0 2006.229.03:52:57.79#ibcon#enter sib2, iclass 30, count 0 2006.229.03:52:57.79#ibcon#flushed, iclass 30, count 0 2006.229.03:52:57.79#ibcon#about to write, iclass 30, count 0 2006.229.03:52:57.79#ibcon#wrote, iclass 30, count 0 2006.229.03:52:57.79#ibcon#about to read 3, iclass 30, count 0 2006.229.03:52:57.81#ibcon#read 3, iclass 30, count 0 2006.229.03:52:57.81#ibcon#about to read 4, iclass 30, count 0 2006.229.03:52:57.81#ibcon#read 4, iclass 30, count 0 2006.229.03:52:57.81#ibcon#about to read 5, iclass 30, count 0 2006.229.03:52:57.81#ibcon#read 5, iclass 30, count 0 2006.229.03:52:57.81#ibcon#about to read 6, iclass 30, count 0 2006.229.03:52:57.81#ibcon#read 6, iclass 30, count 0 2006.229.03:52:57.81#ibcon#end of sib2, iclass 30, count 0 2006.229.03:52:57.81#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:52:57.81#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:52:57.81#ibcon#[25=USB\r\n] 2006.229.03:52:57.81#ibcon#*before write, iclass 30, count 0 2006.229.03:52:57.81#ibcon#enter sib2, iclass 30, count 0 2006.229.03:52:57.81#ibcon#flushed, iclass 30, count 0 2006.229.03:52:57.81#ibcon#about to write, iclass 30, count 0 2006.229.03:52:57.81#ibcon#wrote, iclass 30, count 0 2006.229.03:52:57.81#ibcon#about to read 3, iclass 30, count 0 2006.229.03:52:57.84#ibcon#read 3, iclass 30, count 0 2006.229.03:52:57.84#ibcon#about to read 4, iclass 30, count 0 2006.229.03:52:57.84#ibcon#read 4, iclass 30, count 0 2006.229.03:52:57.84#ibcon#about to read 5, iclass 30, count 0 2006.229.03:52:57.84#ibcon#read 5, iclass 30, count 0 2006.229.03:52:57.84#ibcon#about to read 6, iclass 30, count 0 2006.229.03:52:57.84#ibcon#read 6, iclass 30, count 0 2006.229.03:52:57.84#ibcon#end of sib2, iclass 30, count 0 2006.229.03:52:57.84#ibcon#*after write, iclass 30, count 0 2006.229.03:52:57.84#ibcon#*before return 0, iclass 30, count 0 2006.229.03:52:57.84#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:52:57.84#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:52:57.84#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:52:57.84#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:52:57.84$vck44/vblo=1,629.99 2006.229.03:52:57.84#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.03:52:57.84#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.03:52:57.84#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:57.84#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:52:57.84#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:52:57.84#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:52:57.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:52:57.84#ibcon#first serial, iclass 32, count 0 2006.229.03:52:57.84#ibcon#enter sib2, iclass 32, count 0 2006.229.03:52:57.84#ibcon#flushed, iclass 32, count 0 2006.229.03:52:57.84#ibcon#about to write, iclass 32, count 0 2006.229.03:52:57.84#ibcon#wrote, iclass 32, count 0 2006.229.03:52:57.84#ibcon#about to read 3, iclass 32, count 0 2006.229.03:52:57.86#ibcon#read 3, iclass 32, count 0 2006.229.03:52:57.86#ibcon#about to read 4, iclass 32, count 0 2006.229.03:52:57.86#ibcon#read 4, iclass 32, count 0 2006.229.03:52:57.86#ibcon#about to read 5, iclass 32, count 0 2006.229.03:52:57.86#ibcon#read 5, iclass 32, count 0 2006.229.03:52:57.86#ibcon#about to read 6, iclass 32, count 0 2006.229.03:52:57.86#ibcon#read 6, iclass 32, count 0 2006.229.03:52:57.86#ibcon#end of sib2, iclass 32, count 0 2006.229.03:52:57.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:52:57.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:52:57.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.03:52:57.86#ibcon#*before write, iclass 32, count 0 2006.229.03:52:57.86#ibcon#enter sib2, iclass 32, count 0 2006.229.03:52:57.86#ibcon#flushed, iclass 32, count 0 2006.229.03:52:57.86#ibcon#about to write, iclass 32, count 0 2006.229.03:52:57.86#ibcon#wrote, iclass 32, count 0 2006.229.03:52:57.86#ibcon#about to read 3, iclass 32, count 0 2006.229.03:52:57.90#ibcon#read 3, iclass 32, count 0 2006.229.03:52:57.90#ibcon#about to read 4, iclass 32, count 0 2006.229.03:52:57.90#ibcon#read 4, iclass 32, count 0 2006.229.03:52:57.90#ibcon#about to read 5, iclass 32, count 0 2006.229.03:52:57.90#ibcon#read 5, iclass 32, count 0 2006.229.03:52:57.90#ibcon#about to read 6, iclass 32, count 0 2006.229.03:52:57.90#ibcon#read 6, iclass 32, count 0 2006.229.03:52:57.90#ibcon#end of sib2, iclass 32, count 0 2006.229.03:52:57.90#ibcon#*after write, iclass 32, count 0 2006.229.03:52:57.90#ibcon#*before return 0, iclass 32, count 0 2006.229.03:52:57.90#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:52:57.90#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:52:57.90#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:52:57.90#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:52:57.90$vck44/vb=1,4 2006.229.03:52:57.90#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.03:52:57.90#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.03:52:57.90#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:57.90#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:52:57.90#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:52:57.90#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:52:57.90#ibcon#enter wrdev, iclass 34, count 2 2006.229.03:52:57.90#ibcon#first serial, iclass 34, count 2 2006.229.03:52:57.90#ibcon#enter sib2, iclass 34, count 2 2006.229.03:52:57.90#ibcon#flushed, iclass 34, count 2 2006.229.03:52:57.90#ibcon#about to write, iclass 34, count 2 2006.229.03:52:57.90#ibcon#wrote, iclass 34, count 2 2006.229.03:52:57.90#ibcon#about to read 3, iclass 34, count 2 2006.229.03:52:57.92#ibcon#read 3, iclass 34, count 2 2006.229.03:52:57.92#ibcon#about to read 4, iclass 34, count 2 2006.229.03:52:57.92#ibcon#read 4, iclass 34, count 2 2006.229.03:52:57.92#ibcon#about to read 5, iclass 34, count 2 2006.229.03:52:57.92#ibcon#read 5, iclass 34, count 2 2006.229.03:52:57.92#ibcon#about to read 6, iclass 34, count 2 2006.229.03:52:57.92#ibcon#read 6, iclass 34, count 2 2006.229.03:52:57.92#ibcon#end of sib2, iclass 34, count 2 2006.229.03:52:57.92#ibcon#*mode == 0, iclass 34, count 2 2006.229.03:52:57.92#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.03:52:57.92#ibcon#[27=AT01-04\r\n] 2006.229.03:52:57.92#ibcon#*before write, iclass 34, count 2 2006.229.03:52:57.92#ibcon#enter sib2, iclass 34, count 2 2006.229.03:52:57.92#ibcon#flushed, iclass 34, count 2 2006.229.03:52:57.92#ibcon#about to write, iclass 34, count 2 2006.229.03:52:57.92#ibcon#wrote, iclass 34, count 2 2006.229.03:52:57.92#ibcon#about to read 3, iclass 34, count 2 2006.229.03:52:57.95#ibcon#read 3, iclass 34, count 2 2006.229.03:52:57.95#ibcon#about to read 4, iclass 34, count 2 2006.229.03:52:57.95#ibcon#read 4, iclass 34, count 2 2006.229.03:52:57.95#ibcon#about to read 5, iclass 34, count 2 2006.229.03:52:57.95#ibcon#read 5, iclass 34, count 2 2006.229.03:52:57.95#ibcon#about to read 6, iclass 34, count 2 2006.229.03:52:57.95#ibcon#read 6, iclass 34, count 2 2006.229.03:52:57.95#ibcon#end of sib2, iclass 34, count 2 2006.229.03:52:57.95#ibcon#*after write, iclass 34, count 2 2006.229.03:52:57.95#ibcon#*before return 0, iclass 34, count 2 2006.229.03:52:57.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:52:57.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.03:52:57.95#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.03:52:57.95#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:57.95#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:52:58.07#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:52:58.07#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:52:58.07#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:52:58.07#ibcon#first serial, iclass 34, count 0 2006.229.03:52:58.07#ibcon#enter sib2, iclass 34, count 0 2006.229.03:52:58.07#ibcon#flushed, iclass 34, count 0 2006.229.03:52:58.07#ibcon#about to write, iclass 34, count 0 2006.229.03:52:58.07#ibcon#wrote, iclass 34, count 0 2006.229.03:52:58.07#ibcon#about to read 3, iclass 34, count 0 2006.229.03:52:58.09#ibcon#read 3, iclass 34, count 0 2006.229.03:52:58.09#ibcon#about to read 4, iclass 34, count 0 2006.229.03:52:58.09#ibcon#read 4, iclass 34, count 0 2006.229.03:52:58.09#ibcon#about to read 5, iclass 34, count 0 2006.229.03:52:58.09#ibcon#read 5, iclass 34, count 0 2006.229.03:52:58.09#ibcon#about to read 6, iclass 34, count 0 2006.229.03:52:58.09#ibcon#read 6, iclass 34, count 0 2006.229.03:52:58.09#ibcon#end of sib2, iclass 34, count 0 2006.229.03:52:58.09#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:52:58.09#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:52:58.09#ibcon#[27=USB\r\n] 2006.229.03:52:58.09#ibcon#*before write, iclass 34, count 0 2006.229.03:52:58.09#ibcon#enter sib2, iclass 34, count 0 2006.229.03:52:58.09#ibcon#flushed, iclass 34, count 0 2006.229.03:52:58.09#ibcon#about to write, iclass 34, count 0 2006.229.03:52:58.09#ibcon#wrote, iclass 34, count 0 2006.229.03:52:58.09#ibcon#about to read 3, iclass 34, count 0 2006.229.03:52:58.12#ibcon#read 3, iclass 34, count 0 2006.229.03:52:58.12#ibcon#about to read 4, iclass 34, count 0 2006.229.03:52:58.12#ibcon#read 4, iclass 34, count 0 2006.229.03:52:58.12#ibcon#about to read 5, iclass 34, count 0 2006.229.03:52:58.12#ibcon#read 5, iclass 34, count 0 2006.229.03:52:58.12#ibcon#about to read 6, iclass 34, count 0 2006.229.03:52:58.12#ibcon#read 6, iclass 34, count 0 2006.229.03:52:58.12#ibcon#end of sib2, iclass 34, count 0 2006.229.03:52:58.12#ibcon#*after write, iclass 34, count 0 2006.229.03:52:58.12#ibcon#*before return 0, iclass 34, count 0 2006.229.03:52:58.12#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:52:58.12#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.03:52:58.12#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:52:58.12#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:52:58.12$vck44/vblo=2,634.99 2006.229.03:52:58.12#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.03:52:58.12#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.03:52:58.12#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:58.12#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:58.12#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:58.12#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:58.12#ibcon#enter wrdev, iclass 36, count 0 2006.229.03:52:58.12#ibcon#first serial, iclass 36, count 0 2006.229.03:52:58.12#ibcon#enter sib2, iclass 36, count 0 2006.229.03:52:58.12#ibcon#flushed, iclass 36, count 0 2006.229.03:52:58.12#ibcon#about to write, iclass 36, count 0 2006.229.03:52:58.12#ibcon#wrote, iclass 36, count 0 2006.229.03:52:58.12#ibcon#about to read 3, iclass 36, count 0 2006.229.03:52:58.14#ibcon#read 3, iclass 36, count 0 2006.229.03:52:58.14#ibcon#about to read 4, iclass 36, count 0 2006.229.03:52:58.14#ibcon#read 4, iclass 36, count 0 2006.229.03:52:58.14#ibcon#about to read 5, iclass 36, count 0 2006.229.03:52:58.14#ibcon#read 5, iclass 36, count 0 2006.229.03:52:58.14#ibcon#about to read 6, iclass 36, count 0 2006.229.03:52:58.14#ibcon#read 6, iclass 36, count 0 2006.229.03:52:58.14#ibcon#end of sib2, iclass 36, count 0 2006.229.03:52:58.14#ibcon#*mode == 0, iclass 36, count 0 2006.229.03:52:58.14#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.03:52:58.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.03:52:58.14#ibcon#*before write, iclass 36, count 0 2006.229.03:52:58.14#ibcon#enter sib2, iclass 36, count 0 2006.229.03:52:58.14#ibcon#flushed, iclass 36, count 0 2006.229.03:52:58.14#ibcon#about to write, iclass 36, count 0 2006.229.03:52:58.14#ibcon#wrote, iclass 36, count 0 2006.229.03:52:58.14#ibcon#about to read 3, iclass 36, count 0 2006.229.03:52:58.18#ibcon#read 3, iclass 36, count 0 2006.229.03:52:58.18#ibcon#about to read 4, iclass 36, count 0 2006.229.03:52:58.18#ibcon#read 4, iclass 36, count 0 2006.229.03:52:58.18#ibcon#about to read 5, iclass 36, count 0 2006.229.03:52:58.18#ibcon#read 5, iclass 36, count 0 2006.229.03:52:58.18#ibcon#about to read 6, iclass 36, count 0 2006.229.03:52:58.18#ibcon#read 6, iclass 36, count 0 2006.229.03:52:58.18#ibcon#end of sib2, iclass 36, count 0 2006.229.03:52:58.18#ibcon#*after write, iclass 36, count 0 2006.229.03:52:58.18#ibcon#*before return 0, iclass 36, count 0 2006.229.03:52:58.18#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:58.18#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.03:52:58.18#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.03:52:58.18#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.03:52:58.18$vck44/vb=2,4 2006.229.03:52:58.18#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.03:52:58.18#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.03:52:58.18#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:58.18#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:58.24#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:58.24#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:58.24#ibcon#enter wrdev, iclass 38, count 2 2006.229.03:52:58.24#ibcon#first serial, iclass 38, count 2 2006.229.03:52:58.24#ibcon#enter sib2, iclass 38, count 2 2006.229.03:52:58.24#ibcon#flushed, iclass 38, count 2 2006.229.03:52:58.24#ibcon#about to write, iclass 38, count 2 2006.229.03:52:58.24#ibcon#wrote, iclass 38, count 2 2006.229.03:52:58.24#ibcon#about to read 3, iclass 38, count 2 2006.229.03:52:58.26#ibcon#read 3, iclass 38, count 2 2006.229.03:52:58.26#ibcon#about to read 4, iclass 38, count 2 2006.229.03:52:58.26#ibcon#read 4, iclass 38, count 2 2006.229.03:52:58.26#ibcon#about to read 5, iclass 38, count 2 2006.229.03:52:58.26#ibcon#read 5, iclass 38, count 2 2006.229.03:52:58.26#ibcon#about to read 6, iclass 38, count 2 2006.229.03:52:58.26#ibcon#read 6, iclass 38, count 2 2006.229.03:52:58.26#ibcon#end of sib2, iclass 38, count 2 2006.229.03:52:58.26#ibcon#*mode == 0, iclass 38, count 2 2006.229.03:52:58.26#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.03:52:58.26#ibcon#[27=AT02-04\r\n] 2006.229.03:52:58.26#ibcon#*before write, iclass 38, count 2 2006.229.03:52:58.26#ibcon#enter sib2, iclass 38, count 2 2006.229.03:52:58.26#ibcon#flushed, iclass 38, count 2 2006.229.03:52:58.26#ibcon#about to write, iclass 38, count 2 2006.229.03:52:58.26#ibcon#wrote, iclass 38, count 2 2006.229.03:52:58.26#ibcon#about to read 3, iclass 38, count 2 2006.229.03:52:58.29#ibcon#read 3, iclass 38, count 2 2006.229.03:52:58.29#ibcon#about to read 4, iclass 38, count 2 2006.229.03:52:58.29#ibcon#read 4, iclass 38, count 2 2006.229.03:52:58.29#ibcon#about to read 5, iclass 38, count 2 2006.229.03:52:58.29#ibcon#read 5, iclass 38, count 2 2006.229.03:52:58.29#ibcon#about to read 6, iclass 38, count 2 2006.229.03:52:58.29#ibcon#read 6, iclass 38, count 2 2006.229.03:52:58.29#ibcon#end of sib2, iclass 38, count 2 2006.229.03:52:58.29#ibcon#*after write, iclass 38, count 2 2006.229.03:52:58.29#ibcon#*before return 0, iclass 38, count 2 2006.229.03:52:58.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:58.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.03:52:58.29#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.03:52:58.29#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:58.29#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:58.41#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:58.41#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:58.41#ibcon#enter wrdev, iclass 38, count 0 2006.229.03:52:58.41#ibcon#first serial, iclass 38, count 0 2006.229.03:52:58.41#ibcon#enter sib2, iclass 38, count 0 2006.229.03:52:58.41#ibcon#flushed, iclass 38, count 0 2006.229.03:52:58.41#ibcon#about to write, iclass 38, count 0 2006.229.03:52:58.41#ibcon#wrote, iclass 38, count 0 2006.229.03:52:58.41#ibcon#about to read 3, iclass 38, count 0 2006.229.03:52:58.43#ibcon#read 3, iclass 38, count 0 2006.229.03:52:58.43#ibcon#about to read 4, iclass 38, count 0 2006.229.03:52:58.43#ibcon#read 4, iclass 38, count 0 2006.229.03:52:58.43#ibcon#about to read 5, iclass 38, count 0 2006.229.03:52:58.43#ibcon#read 5, iclass 38, count 0 2006.229.03:52:58.43#ibcon#about to read 6, iclass 38, count 0 2006.229.03:52:58.43#ibcon#read 6, iclass 38, count 0 2006.229.03:52:58.43#ibcon#end of sib2, iclass 38, count 0 2006.229.03:52:58.43#ibcon#*mode == 0, iclass 38, count 0 2006.229.03:52:58.43#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.03:52:58.43#ibcon#[27=USB\r\n] 2006.229.03:52:58.43#ibcon#*before write, iclass 38, count 0 2006.229.03:52:58.43#ibcon#enter sib2, iclass 38, count 0 2006.229.03:52:58.43#ibcon#flushed, iclass 38, count 0 2006.229.03:52:58.43#ibcon#about to write, iclass 38, count 0 2006.229.03:52:58.43#ibcon#wrote, iclass 38, count 0 2006.229.03:52:58.43#ibcon#about to read 3, iclass 38, count 0 2006.229.03:52:58.43#abcon#<5=/05 2.5 5.0 29.97 951000.4\r\n> 2006.229.03:52:58.45#abcon#{5=INTERFACE CLEAR} 2006.229.03:52:58.46#ibcon#read 3, iclass 38, count 0 2006.229.03:52:58.46#ibcon#about to read 4, iclass 38, count 0 2006.229.03:52:58.46#ibcon#read 4, iclass 38, count 0 2006.229.03:52:58.46#ibcon#about to read 5, iclass 38, count 0 2006.229.03:52:58.46#ibcon#read 5, iclass 38, count 0 2006.229.03:52:58.46#ibcon#about to read 6, iclass 38, count 0 2006.229.03:52:58.46#ibcon#read 6, iclass 38, count 0 2006.229.03:52:58.46#ibcon#end of sib2, iclass 38, count 0 2006.229.03:52:58.46#ibcon#*after write, iclass 38, count 0 2006.229.03:52:58.46#ibcon#*before return 0, iclass 38, count 0 2006.229.03:52:58.46#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:58.46#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.03:52:58.46#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.03:52:58.46#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.03:52:58.46$vck44/vblo=3,649.99 2006.229.03:52:58.46#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.03:52:58.46#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.03:52:58.46#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:58.46#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:52:58.46#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:52:58.46#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:52:58.46#ibcon#enter wrdev, iclass 5, count 0 2006.229.03:52:58.46#ibcon#first serial, iclass 5, count 0 2006.229.03:52:58.46#ibcon#enter sib2, iclass 5, count 0 2006.229.03:52:58.46#ibcon#flushed, iclass 5, count 0 2006.229.03:52:58.46#ibcon#about to write, iclass 5, count 0 2006.229.03:52:58.46#ibcon#wrote, iclass 5, count 0 2006.229.03:52:58.46#ibcon#about to read 3, iclass 5, count 0 2006.229.03:52:58.48#ibcon#read 3, iclass 5, count 0 2006.229.03:52:58.48#ibcon#about to read 4, iclass 5, count 0 2006.229.03:52:58.48#ibcon#read 4, iclass 5, count 0 2006.229.03:52:58.48#ibcon#about to read 5, iclass 5, count 0 2006.229.03:52:58.48#ibcon#read 5, iclass 5, count 0 2006.229.03:52:58.48#ibcon#about to read 6, iclass 5, count 0 2006.229.03:52:58.48#ibcon#read 6, iclass 5, count 0 2006.229.03:52:58.48#ibcon#end of sib2, iclass 5, count 0 2006.229.03:52:58.48#ibcon#*mode == 0, iclass 5, count 0 2006.229.03:52:58.48#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.03:52:58.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.03:52:58.48#ibcon#*before write, iclass 5, count 0 2006.229.03:52:58.48#ibcon#enter sib2, iclass 5, count 0 2006.229.03:52:58.48#ibcon#flushed, iclass 5, count 0 2006.229.03:52:58.48#ibcon#about to write, iclass 5, count 0 2006.229.03:52:58.48#ibcon#wrote, iclass 5, count 0 2006.229.03:52:58.48#ibcon#about to read 3, iclass 5, count 0 2006.229.03:52:58.51#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:52:58.52#ibcon#read 3, iclass 5, count 0 2006.229.03:52:58.52#ibcon#about to read 4, iclass 5, count 0 2006.229.03:52:58.52#ibcon#read 4, iclass 5, count 0 2006.229.03:52:58.52#ibcon#about to read 5, iclass 5, count 0 2006.229.03:52:58.52#ibcon#read 5, iclass 5, count 0 2006.229.03:52:58.52#ibcon#about to read 6, iclass 5, count 0 2006.229.03:52:58.52#ibcon#read 6, iclass 5, count 0 2006.229.03:52:58.52#ibcon#end of sib2, iclass 5, count 0 2006.229.03:52:58.52#ibcon#*after write, iclass 5, count 0 2006.229.03:52:58.52#ibcon#*before return 0, iclass 5, count 0 2006.229.03:52:58.52#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:52:58.52#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.03:52:58.52#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.03:52:58.52#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.03:52:58.52$vck44/vb=3,4 2006.229.03:52:58.52#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.03:52:58.52#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.03:52:58.52#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:58.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:58.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:58.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:58.58#ibcon#enter wrdev, iclass 10, count 2 2006.229.03:52:58.58#ibcon#first serial, iclass 10, count 2 2006.229.03:52:58.58#ibcon#enter sib2, iclass 10, count 2 2006.229.03:52:58.58#ibcon#flushed, iclass 10, count 2 2006.229.03:52:58.58#ibcon#about to write, iclass 10, count 2 2006.229.03:52:58.58#ibcon#wrote, iclass 10, count 2 2006.229.03:52:58.58#ibcon#about to read 3, iclass 10, count 2 2006.229.03:52:58.60#ibcon#read 3, iclass 10, count 2 2006.229.03:52:58.60#ibcon#about to read 4, iclass 10, count 2 2006.229.03:52:58.60#ibcon#read 4, iclass 10, count 2 2006.229.03:52:58.60#ibcon#about to read 5, iclass 10, count 2 2006.229.03:52:58.60#ibcon#read 5, iclass 10, count 2 2006.229.03:52:58.60#ibcon#about to read 6, iclass 10, count 2 2006.229.03:52:58.60#ibcon#read 6, iclass 10, count 2 2006.229.03:52:58.60#ibcon#end of sib2, iclass 10, count 2 2006.229.03:52:58.60#ibcon#*mode == 0, iclass 10, count 2 2006.229.03:52:58.60#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.03:52:58.60#ibcon#[27=AT03-04\r\n] 2006.229.03:52:58.60#ibcon#*before write, iclass 10, count 2 2006.229.03:52:58.60#ibcon#enter sib2, iclass 10, count 2 2006.229.03:52:58.60#ibcon#flushed, iclass 10, count 2 2006.229.03:52:58.60#ibcon#about to write, iclass 10, count 2 2006.229.03:52:58.60#ibcon#wrote, iclass 10, count 2 2006.229.03:52:58.60#ibcon#about to read 3, iclass 10, count 2 2006.229.03:52:58.63#ibcon#read 3, iclass 10, count 2 2006.229.03:52:58.63#ibcon#about to read 4, iclass 10, count 2 2006.229.03:52:58.63#ibcon#read 4, iclass 10, count 2 2006.229.03:52:58.63#ibcon#about to read 5, iclass 10, count 2 2006.229.03:52:58.63#ibcon#read 5, iclass 10, count 2 2006.229.03:52:58.63#ibcon#about to read 6, iclass 10, count 2 2006.229.03:52:58.63#ibcon#read 6, iclass 10, count 2 2006.229.03:52:58.63#ibcon#end of sib2, iclass 10, count 2 2006.229.03:52:58.63#ibcon#*after write, iclass 10, count 2 2006.229.03:52:58.63#ibcon#*before return 0, iclass 10, count 2 2006.229.03:52:58.63#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:58.63#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.03:52:58.63#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.03:52:58.63#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:58.63#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:58.75#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:58.75#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:58.75#ibcon#enter wrdev, iclass 10, count 0 2006.229.03:52:58.75#ibcon#first serial, iclass 10, count 0 2006.229.03:52:58.75#ibcon#enter sib2, iclass 10, count 0 2006.229.03:52:58.75#ibcon#flushed, iclass 10, count 0 2006.229.03:52:58.75#ibcon#about to write, iclass 10, count 0 2006.229.03:52:58.75#ibcon#wrote, iclass 10, count 0 2006.229.03:52:58.75#ibcon#about to read 3, iclass 10, count 0 2006.229.03:52:58.77#ibcon#read 3, iclass 10, count 0 2006.229.03:52:58.77#ibcon#about to read 4, iclass 10, count 0 2006.229.03:52:58.77#ibcon#read 4, iclass 10, count 0 2006.229.03:52:58.77#ibcon#about to read 5, iclass 10, count 0 2006.229.03:52:58.77#ibcon#read 5, iclass 10, count 0 2006.229.03:52:58.77#ibcon#about to read 6, iclass 10, count 0 2006.229.03:52:58.77#ibcon#read 6, iclass 10, count 0 2006.229.03:52:58.77#ibcon#end of sib2, iclass 10, count 0 2006.229.03:52:58.77#ibcon#*mode == 0, iclass 10, count 0 2006.229.03:52:58.77#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.03:52:58.77#ibcon#[27=USB\r\n] 2006.229.03:52:58.77#ibcon#*before write, iclass 10, count 0 2006.229.03:52:58.77#ibcon#enter sib2, iclass 10, count 0 2006.229.03:52:58.77#ibcon#flushed, iclass 10, count 0 2006.229.03:52:58.77#ibcon#about to write, iclass 10, count 0 2006.229.03:52:58.77#ibcon#wrote, iclass 10, count 0 2006.229.03:52:58.77#ibcon#about to read 3, iclass 10, count 0 2006.229.03:52:58.80#ibcon#read 3, iclass 10, count 0 2006.229.03:52:58.80#ibcon#about to read 4, iclass 10, count 0 2006.229.03:52:58.80#ibcon#read 4, iclass 10, count 0 2006.229.03:52:58.80#ibcon#about to read 5, iclass 10, count 0 2006.229.03:52:58.80#ibcon#read 5, iclass 10, count 0 2006.229.03:52:58.80#ibcon#about to read 6, iclass 10, count 0 2006.229.03:52:58.80#ibcon#read 6, iclass 10, count 0 2006.229.03:52:58.80#ibcon#end of sib2, iclass 10, count 0 2006.229.03:52:58.80#ibcon#*after write, iclass 10, count 0 2006.229.03:52:58.80#ibcon#*before return 0, iclass 10, count 0 2006.229.03:52:58.80#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:58.80#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.03:52:58.80#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.03:52:58.80#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.03:52:58.80$vck44/vblo=4,679.99 2006.229.03:52:58.80#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.03:52:58.80#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.03:52:58.80#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:58.80#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:58.80#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:58.80#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:58.80#ibcon#enter wrdev, iclass 12, count 0 2006.229.03:52:58.80#ibcon#first serial, iclass 12, count 0 2006.229.03:52:58.80#ibcon#enter sib2, iclass 12, count 0 2006.229.03:52:58.80#ibcon#flushed, iclass 12, count 0 2006.229.03:52:58.80#ibcon#about to write, iclass 12, count 0 2006.229.03:52:58.80#ibcon#wrote, iclass 12, count 0 2006.229.03:52:58.80#ibcon#about to read 3, iclass 12, count 0 2006.229.03:52:58.82#ibcon#read 3, iclass 12, count 0 2006.229.03:52:58.82#ibcon#about to read 4, iclass 12, count 0 2006.229.03:52:58.82#ibcon#read 4, iclass 12, count 0 2006.229.03:52:58.82#ibcon#about to read 5, iclass 12, count 0 2006.229.03:52:58.82#ibcon#read 5, iclass 12, count 0 2006.229.03:52:58.82#ibcon#about to read 6, iclass 12, count 0 2006.229.03:52:58.82#ibcon#read 6, iclass 12, count 0 2006.229.03:52:58.82#ibcon#end of sib2, iclass 12, count 0 2006.229.03:52:58.82#ibcon#*mode == 0, iclass 12, count 0 2006.229.03:52:58.82#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.03:52:58.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.03:52:58.82#ibcon#*before write, iclass 12, count 0 2006.229.03:52:58.82#ibcon#enter sib2, iclass 12, count 0 2006.229.03:52:58.82#ibcon#flushed, iclass 12, count 0 2006.229.03:52:58.82#ibcon#about to write, iclass 12, count 0 2006.229.03:52:58.82#ibcon#wrote, iclass 12, count 0 2006.229.03:52:58.82#ibcon#about to read 3, iclass 12, count 0 2006.229.03:52:58.86#ibcon#read 3, iclass 12, count 0 2006.229.03:52:58.86#ibcon#about to read 4, iclass 12, count 0 2006.229.03:52:58.86#ibcon#read 4, iclass 12, count 0 2006.229.03:52:58.86#ibcon#about to read 5, iclass 12, count 0 2006.229.03:52:58.86#ibcon#read 5, iclass 12, count 0 2006.229.03:52:58.86#ibcon#about to read 6, iclass 12, count 0 2006.229.03:52:58.86#ibcon#read 6, iclass 12, count 0 2006.229.03:52:58.86#ibcon#end of sib2, iclass 12, count 0 2006.229.03:52:58.86#ibcon#*after write, iclass 12, count 0 2006.229.03:52:58.86#ibcon#*before return 0, iclass 12, count 0 2006.229.03:52:58.86#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:58.86#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.03:52:58.86#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.03:52:58.86#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.03:52:58.86$vck44/vb=4,4 2006.229.03:52:58.86#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.03:52:58.86#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.03:52:58.86#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:58.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:58.92#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:58.92#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:58.92#ibcon#enter wrdev, iclass 14, count 2 2006.229.03:52:58.92#ibcon#first serial, iclass 14, count 2 2006.229.03:52:58.92#ibcon#enter sib2, iclass 14, count 2 2006.229.03:52:58.92#ibcon#flushed, iclass 14, count 2 2006.229.03:52:58.92#ibcon#about to write, iclass 14, count 2 2006.229.03:52:58.92#ibcon#wrote, iclass 14, count 2 2006.229.03:52:58.92#ibcon#about to read 3, iclass 14, count 2 2006.229.03:52:58.94#ibcon#read 3, iclass 14, count 2 2006.229.03:52:58.94#ibcon#about to read 4, iclass 14, count 2 2006.229.03:52:58.94#ibcon#read 4, iclass 14, count 2 2006.229.03:52:58.94#ibcon#about to read 5, iclass 14, count 2 2006.229.03:52:58.94#ibcon#read 5, iclass 14, count 2 2006.229.03:52:58.94#ibcon#about to read 6, iclass 14, count 2 2006.229.03:52:58.94#ibcon#read 6, iclass 14, count 2 2006.229.03:52:58.94#ibcon#end of sib2, iclass 14, count 2 2006.229.03:52:58.94#ibcon#*mode == 0, iclass 14, count 2 2006.229.03:52:58.94#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.03:52:58.94#ibcon#[27=AT04-04\r\n] 2006.229.03:52:58.94#ibcon#*before write, iclass 14, count 2 2006.229.03:52:58.94#ibcon#enter sib2, iclass 14, count 2 2006.229.03:52:58.94#ibcon#flushed, iclass 14, count 2 2006.229.03:52:58.94#ibcon#about to write, iclass 14, count 2 2006.229.03:52:58.94#ibcon#wrote, iclass 14, count 2 2006.229.03:52:58.94#ibcon#about to read 3, iclass 14, count 2 2006.229.03:52:58.97#ibcon#read 3, iclass 14, count 2 2006.229.03:52:58.97#ibcon#about to read 4, iclass 14, count 2 2006.229.03:52:58.97#ibcon#read 4, iclass 14, count 2 2006.229.03:52:58.97#ibcon#about to read 5, iclass 14, count 2 2006.229.03:52:58.97#ibcon#read 5, iclass 14, count 2 2006.229.03:52:58.97#ibcon#about to read 6, iclass 14, count 2 2006.229.03:52:58.97#ibcon#read 6, iclass 14, count 2 2006.229.03:52:58.97#ibcon#end of sib2, iclass 14, count 2 2006.229.03:52:58.97#ibcon#*after write, iclass 14, count 2 2006.229.03:52:58.97#ibcon#*before return 0, iclass 14, count 2 2006.229.03:52:58.97#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:58.97#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.03:52:58.97#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.03:52:58.97#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:58.97#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:59.09#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:59.09#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:59.09#ibcon#enter wrdev, iclass 14, count 0 2006.229.03:52:59.09#ibcon#first serial, iclass 14, count 0 2006.229.03:52:59.09#ibcon#enter sib2, iclass 14, count 0 2006.229.03:52:59.09#ibcon#flushed, iclass 14, count 0 2006.229.03:52:59.09#ibcon#about to write, iclass 14, count 0 2006.229.03:52:59.09#ibcon#wrote, iclass 14, count 0 2006.229.03:52:59.09#ibcon#about to read 3, iclass 14, count 0 2006.229.03:52:59.11#ibcon#read 3, iclass 14, count 0 2006.229.03:52:59.11#ibcon#about to read 4, iclass 14, count 0 2006.229.03:52:59.11#ibcon#read 4, iclass 14, count 0 2006.229.03:52:59.11#ibcon#about to read 5, iclass 14, count 0 2006.229.03:52:59.11#ibcon#read 5, iclass 14, count 0 2006.229.03:52:59.11#ibcon#about to read 6, iclass 14, count 0 2006.229.03:52:59.11#ibcon#read 6, iclass 14, count 0 2006.229.03:52:59.11#ibcon#end of sib2, iclass 14, count 0 2006.229.03:52:59.11#ibcon#*mode == 0, iclass 14, count 0 2006.229.03:52:59.11#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.03:52:59.11#ibcon#[27=USB\r\n] 2006.229.03:52:59.11#ibcon#*before write, iclass 14, count 0 2006.229.03:52:59.11#ibcon#enter sib2, iclass 14, count 0 2006.229.03:52:59.11#ibcon#flushed, iclass 14, count 0 2006.229.03:52:59.11#ibcon#about to write, iclass 14, count 0 2006.229.03:52:59.11#ibcon#wrote, iclass 14, count 0 2006.229.03:52:59.11#ibcon#about to read 3, iclass 14, count 0 2006.229.03:52:59.14#ibcon#read 3, iclass 14, count 0 2006.229.03:52:59.14#ibcon#about to read 4, iclass 14, count 0 2006.229.03:52:59.14#ibcon#read 4, iclass 14, count 0 2006.229.03:52:59.14#ibcon#about to read 5, iclass 14, count 0 2006.229.03:52:59.14#ibcon#read 5, iclass 14, count 0 2006.229.03:52:59.14#ibcon#about to read 6, iclass 14, count 0 2006.229.03:52:59.14#ibcon#read 6, iclass 14, count 0 2006.229.03:52:59.14#ibcon#end of sib2, iclass 14, count 0 2006.229.03:52:59.14#ibcon#*after write, iclass 14, count 0 2006.229.03:52:59.14#ibcon#*before return 0, iclass 14, count 0 2006.229.03:52:59.14#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:59.14#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.03:52:59.14#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.03:52:59.14#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.03:52:59.14$vck44/vblo=5,709.99 2006.229.03:52:59.14#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.03:52:59.14#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.03:52:59.14#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:59.14#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:59.14#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:59.14#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:59.14#ibcon#enter wrdev, iclass 16, count 0 2006.229.03:52:59.14#ibcon#first serial, iclass 16, count 0 2006.229.03:52:59.14#ibcon#enter sib2, iclass 16, count 0 2006.229.03:52:59.14#ibcon#flushed, iclass 16, count 0 2006.229.03:52:59.14#ibcon#about to write, iclass 16, count 0 2006.229.03:52:59.14#ibcon#wrote, iclass 16, count 0 2006.229.03:52:59.14#ibcon#about to read 3, iclass 16, count 0 2006.229.03:52:59.16#ibcon#read 3, iclass 16, count 0 2006.229.03:52:59.16#ibcon#about to read 4, iclass 16, count 0 2006.229.03:52:59.16#ibcon#read 4, iclass 16, count 0 2006.229.03:52:59.16#ibcon#about to read 5, iclass 16, count 0 2006.229.03:52:59.16#ibcon#read 5, iclass 16, count 0 2006.229.03:52:59.16#ibcon#about to read 6, iclass 16, count 0 2006.229.03:52:59.16#ibcon#read 6, iclass 16, count 0 2006.229.03:52:59.16#ibcon#end of sib2, iclass 16, count 0 2006.229.03:52:59.16#ibcon#*mode == 0, iclass 16, count 0 2006.229.03:52:59.16#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.03:52:59.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.03:52:59.16#ibcon#*before write, iclass 16, count 0 2006.229.03:52:59.16#ibcon#enter sib2, iclass 16, count 0 2006.229.03:52:59.16#ibcon#flushed, iclass 16, count 0 2006.229.03:52:59.16#ibcon#about to write, iclass 16, count 0 2006.229.03:52:59.16#ibcon#wrote, iclass 16, count 0 2006.229.03:52:59.16#ibcon#about to read 3, iclass 16, count 0 2006.229.03:52:59.20#ibcon#read 3, iclass 16, count 0 2006.229.03:52:59.20#ibcon#about to read 4, iclass 16, count 0 2006.229.03:52:59.20#ibcon#read 4, iclass 16, count 0 2006.229.03:52:59.20#ibcon#about to read 5, iclass 16, count 0 2006.229.03:52:59.20#ibcon#read 5, iclass 16, count 0 2006.229.03:52:59.20#ibcon#about to read 6, iclass 16, count 0 2006.229.03:52:59.20#ibcon#read 6, iclass 16, count 0 2006.229.03:52:59.20#ibcon#end of sib2, iclass 16, count 0 2006.229.03:52:59.20#ibcon#*after write, iclass 16, count 0 2006.229.03:52:59.20#ibcon#*before return 0, iclass 16, count 0 2006.229.03:52:59.20#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:59.20#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.03:52:59.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.03:52:59.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.03:52:59.20$vck44/vb=5,4 2006.229.03:52:59.20#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.03:52:59.20#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.03:52:59.20#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:59.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:59.26#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:59.26#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:59.26#ibcon#enter wrdev, iclass 18, count 2 2006.229.03:52:59.26#ibcon#first serial, iclass 18, count 2 2006.229.03:52:59.26#ibcon#enter sib2, iclass 18, count 2 2006.229.03:52:59.26#ibcon#flushed, iclass 18, count 2 2006.229.03:52:59.26#ibcon#about to write, iclass 18, count 2 2006.229.03:52:59.26#ibcon#wrote, iclass 18, count 2 2006.229.03:52:59.26#ibcon#about to read 3, iclass 18, count 2 2006.229.03:52:59.28#ibcon#read 3, iclass 18, count 2 2006.229.03:52:59.28#ibcon#about to read 4, iclass 18, count 2 2006.229.03:52:59.28#ibcon#read 4, iclass 18, count 2 2006.229.03:52:59.28#ibcon#about to read 5, iclass 18, count 2 2006.229.03:52:59.28#ibcon#read 5, iclass 18, count 2 2006.229.03:52:59.28#ibcon#about to read 6, iclass 18, count 2 2006.229.03:52:59.28#ibcon#read 6, iclass 18, count 2 2006.229.03:52:59.28#ibcon#end of sib2, iclass 18, count 2 2006.229.03:52:59.28#ibcon#*mode == 0, iclass 18, count 2 2006.229.03:52:59.28#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.03:52:59.28#ibcon#[27=AT05-04\r\n] 2006.229.03:52:59.28#ibcon#*before write, iclass 18, count 2 2006.229.03:52:59.28#ibcon#enter sib2, iclass 18, count 2 2006.229.03:52:59.28#ibcon#flushed, iclass 18, count 2 2006.229.03:52:59.28#ibcon#about to write, iclass 18, count 2 2006.229.03:52:59.28#ibcon#wrote, iclass 18, count 2 2006.229.03:52:59.28#ibcon#about to read 3, iclass 18, count 2 2006.229.03:52:59.32#ibcon#read 3, iclass 18, count 2 2006.229.03:52:59.32#ibcon#about to read 4, iclass 18, count 2 2006.229.03:52:59.32#ibcon#read 4, iclass 18, count 2 2006.229.03:52:59.32#ibcon#about to read 5, iclass 18, count 2 2006.229.03:52:59.32#ibcon#read 5, iclass 18, count 2 2006.229.03:52:59.32#ibcon#about to read 6, iclass 18, count 2 2006.229.03:52:59.32#ibcon#read 6, iclass 18, count 2 2006.229.03:52:59.32#ibcon#end of sib2, iclass 18, count 2 2006.229.03:52:59.32#ibcon#*after write, iclass 18, count 2 2006.229.03:52:59.32#ibcon#*before return 0, iclass 18, count 2 2006.229.03:52:59.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:59.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.03:52:59.32#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.03:52:59.32#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:59.32#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:59.43#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:59.43#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:59.43#ibcon#enter wrdev, iclass 18, count 0 2006.229.03:52:59.43#ibcon#first serial, iclass 18, count 0 2006.229.03:52:59.43#ibcon#enter sib2, iclass 18, count 0 2006.229.03:52:59.43#ibcon#flushed, iclass 18, count 0 2006.229.03:52:59.43#ibcon#about to write, iclass 18, count 0 2006.229.03:52:59.43#ibcon#wrote, iclass 18, count 0 2006.229.03:52:59.43#ibcon#about to read 3, iclass 18, count 0 2006.229.03:52:59.45#ibcon#read 3, iclass 18, count 0 2006.229.03:52:59.45#ibcon#about to read 4, iclass 18, count 0 2006.229.03:52:59.45#ibcon#read 4, iclass 18, count 0 2006.229.03:52:59.45#ibcon#about to read 5, iclass 18, count 0 2006.229.03:52:59.45#ibcon#read 5, iclass 18, count 0 2006.229.03:52:59.45#ibcon#about to read 6, iclass 18, count 0 2006.229.03:52:59.45#ibcon#read 6, iclass 18, count 0 2006.229.03:52:59.45#ibcon#end of sib2, iclass 18, count 0 2006.229.03:52:59.45#ibcon#*mode == 0, iclass 18, count 0 2006.229.03:52:59.45#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.03:52:59.45#ibcon#[27=USB\r\n] 2006.229.03:52:59.45#ibcon#*before write, iclass 18, count 0 2006.229.03:52:59.45#ibcon#enter sib2, iclass 18, count 0 2006.229.03:52:59.45#ibcon#flushed, iclass 18, count 0 2006.229.03:52:59.45#ibcon#about to write, iclass 18, count 0 2006.229.03:52:59.45#ibcon#wrote, iclass 18, count 0 2006.229.03:52:59.45#ibcon#about to read 3, iclass 18, count 0 2006.229.03:52:59.48#ibcon#read 3, iclass 18, count 0 2006.229.03:52:59.48#ibcon#about to read 4, iclass 18, count 0 2006.229.03:52:59.48#ibcon#read 4, iclass 18, count 0 2006.229.03:52:59.48#ibcon#about to read 5, iclass 18, count 0 2006.229.03:52:59.48#ibcon#read 5, iclass 18, count 0 2006.229.03:52:59.48#ibcon#about to read 6, iclass 18, count 0 2006.229.03:52:59.48#ibcon#read 6, iclass 18, count 0 2006.229.03:52:59.48#ibcon#end of sib2, iclass 18, count 0 2006.229.03:52:59.48#ibcon#*after write, iclass 18, count 0 2006.229.03:52:59.48#ibcon#*before return 0, iclass 18, count 0 2006.229.03:52:59.48#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:59.48#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.03:52:59.48#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.03:52:59.48#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.03:52:59.48$vck44/vblo=6,719.99 2006.229.03:52:59.48#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.03:52:59.48#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.03:52:59.48#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:59.48#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:59.48#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:59.48#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:59.48#ibcon#enter wrdev, iclass 20, count 0 2006.229.03:52:59.48#ibcon#first serial, iclass 20, count 0 2006.229.03:52:59.48#ibcon#enter sib2, iclass 20, count 0 2006.229.03:52:59.48#ibcon#flushed, iclass 20, count 0 2006.229.03:52:59.48#ibcon#about to write, iclass 20, count 0 2006.229.03:52:59.48#ibcon#wrote, iclass 20, count 0 2006.229.03:52:59.48#ibcon#about to read 3, iclass 20, count 0 2006.229.03:52:59.50#ibcon#read 3, iclass 20, count 0 2006.229.03:52:59.50#ibcon#about to read 4, iclass 20, count 0 2006.229.03:52:59.50#ibcon#read 4, iclass 20, count 0 2006.229.03:52:59.50#ibcon#about to read 5, iclass 20, count 0 2006.229.03:52:59.50#ibcon#read 5, iclass 20, count 0 2006.229.03:52:59.50#ibcon#about to read 6, iclass 20, count 0 2006.229.03:52:59.50#ibcon#read 6, iclass 20, count 0 2006.229.03:52:59.50#ibcon#end of sib2, iclass 20, count 0 2006.229.03:52:59.50#ibcon#*mode == 0, iclass 20, count 0 2006.229.03:52:59.50#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.03:52:59.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.03:52:59.50#ibcon#*before write, iclass 20, count 0 2006.229.03:52:59.50#ibcon#enter sib2, iclass 20, count 0 2006.229.03:52:59.50#ibcon#flushed, iclass 20, count 0 2006.229.03:52:59.50#ibcon#about to write, iclass 20, count 0 2006.229.03:52:59.50#ibcon#wrote, iclass 20, count 0 2006.229.03:52:59.50#ibcon#about to read 3, iclass 20, count 0 2006.229.03:52:59.54#ibcon#read 3, iclass 20, count 0 2006.229.03:52:59.54#ibcon#about to read 4, iclass 20, count 0 2006.229.03:52:59.54#ibcon#read 4, iclass 20, count 0 2006.229.03:52:59.54#ibcon#about to read 5, iclass 20, count 0 2006.229.03:52:59.54#ibcon#read 5, iclass 20, count 0 2006.229.03:52:59.54#ibcon#about to read 6, iclass 20, count 0 2006.229.03:52:59.54#ibcon#read 6, iclass 20, count 0 2006.229.03:52:59.54#ibcon#end of sib2, iclass 20, count 0 2006.229.03:52:59.54#ibcon#*after write, iclass 20, count 0 2006.229.03:52:59.54#ibcon#*before return 0, iclass 20, count 0 2006.229.03:52:59.54#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:59.54#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.03:52:59.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.03:52:59.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.03:52:59.54$vck44/vb=6,4 2006.229.03:52:59.54#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.03:52:59.54#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.03:52:59.54#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:59.54#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:59.60#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:59.60#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:59.60#ibcon#enter wrdev, iclass 22, count 2 2006.229.03:52:59.60#ibcon#first serial, iclass 22, count 2 2006.229.03:52:59.60#ibcon#enter sib2, iclass 22, count 2 2006.229.03:52:59.60#ibcon#flushed, iclass 22, count 2 2006.229.03:52:59.60#ibcon#about to write, iclass 22, count 2 2006.229.03:52:59.60#ibcon#wrote, iclass 22, count 2 2006.229.03:52:59.60#ibcon#about to read 3, iclass 22, count 2 2006.229.03:52:59.62#ibcon#read 3, iclass 22, count 2 2006.229.03:52:59.62#ibcon#about to read 4, iclass 22, count 2 2006.229.03:52:59.62#ibcon#read 4, iclass 22, count 2 2006.229.03:52:59.62#ibcon#about to read 5, iclass 22, count 2 2006.229.03:52:59.62#ibcon#read 5, iclass 22, count 2 2006.229.03:52:59.62#ibcon#about to read 6, iclass 22, count 2 2006.229.03:52:59.62#ibcon#read 6, iclass 22, count 2 2006.229.03:52:59.62#ibcon#end of sib2, iclass 22, count 2 2006.229.03:52:59.62#ibcon#*mode == 0, iclass 22, count 2 2006.229.03:52:59.62#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.03:52:59.62#ibcon#[27=AT06-04\r\n] 2006.229.03:52:59.62#ibcon#*before write, iclass 22, count 2 2006.229.03:52:59.62#ibcon#enter sib2, iclass 22, count 2 2006.229.03:52:59.62#ibcon#flushed, iclass 22, count 2 2006.229.03:52:59.62#ibcon#about to write, iclass 22, count 2 2006.229.03:52:59.62#ibcon#wrote, iclass 22, count 2 2006.229.03:52:59.62#ibcon#about to read 3, iclass 22, count 2 2006.229.03:52:59.65#ibcon#read 3, iclass 22, count 2 2006.229.03:52:59.65#ibcon#about to read 4, iclass 22, count 2 2006.229.03:52:59.65#ibcon#read 4, iclass 22, count 2 2006.229.03:52:59.65#ibcon#about to read 5, iclass 22, count 2 2006.229.03:52:59.65#ibcon#read 5, iclass 22, count 2 2006.229.03:52:59.65#ibcon#about to read 6, iclass 22, count 2 2006.229.03:52:59.65#ibcon#read 6, iclass 22, count 2 2006.229.03:52:59.65#ibcon#end of sib2, iclass 22, count 2 2006.229.03:52:59.65#ibcon#*after write, iclass 22, count 2 2006.229.03:52:59.65#ibcon#*before return 0, iclass 22, count 2 2006.229.03:52:59.65#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:59.65#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.03:52:59.65#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.03:52:59.65#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:59.65#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:59.77#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:59.77#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:59.77#ibcon#enter wrdev, iclass 22, count 0 2006.229.03:52:59.77#ibcon#first serial, iclass 22, count 0 2006.229.03:52:59.77#ibcon#enter sib2, iclass 22, count 0 2006.229.03:52:59.77#ibcon#flushed, iclass 22, count 0 2006.229.03:52:59.77#ibcon#about to write, iclass 22, count 0 2006.229.03:52:59.77#ibcon#wrote, iclass 22, count 0 2006.229.03:52:59.77#ibcon#about to read 3, iclass 22, count 0 2006.229.03:52:59.79#ibcon#read 3, iclass 22, count 0 2006.229.03:52:59.79#ibcon#about to read 4, iclass 22, count 0 2006.229.03:52:59.79#ibcon#read 4, iclass 22, count 0 2006.229.03:52:59.79#ibcon#about to read 5, iclass 22, count 0 2006.229.03:52:59.79#ibcon#read 5, iclass 22, count 0 2006.229.03:52:59.79#ibcon#about to read 6, iclass 22, count 0 2006.229.03:52:59.79#ibcon#read 6, iclass 22, count 0 2006.229.03:52:59.79#ibcon#end of sib2, iclass 22, count 0 2006.229.03:52:59.79#ibcon#*mode == 0, iclass 22, count 0 2006.229.03:52:59.79#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.03:52:59.79#ibcon#[27=USB\r\n] 2006.229.03:52:59.79#ibcon#*before write, iclass 22, count 0 2006.229.03:52:59.79#ibcon#enter sib2, iclass 22, count 0 2006.229.03:52:59.79#ibcon#flushed, iclass 22, count 0 2006.229.03:52:59.79#ibcon#about to write, iclass 22, count 0 2006.229.03:52:59.79#ibcon#wrote, iclass 22, count 0 2006.229.03:52:59.79#ibcon#about to read 3, iclass 22, count 0 2006.229.03:52:59.82#ibcon#read 3, iclass 22, count 0 2006.229.03:52:59.82#ibcon#about to read 4, iclass 22, count 0 2006.229.03:52:59.82#ibcon#read 4, iclass 22, count 0 2006.229.03:52:59.82#ibcon#about to read 5, iclass 22, count 0 2006.229.03:52:59.82#ibcon#read 5, iclass 22, count 0 2006.229.03:52:59.82#ibcon#about to read 6, iclass 22, count 0 2006.229.03:52:59.82#ibcon#read 6, iclass 22, count 0 2006.229.03:52:59.82#ibcon#end of sib2, iclass 22, count 0 2006.229.03:52:59.82#ibcon#*after write, iclass 22, count 0 2006.229.03:52:59.82#ibcon#*before return 0, iclass 22, count 0 2006.229.03:52:59.82#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:59.82#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.03:52:59.82#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.03:52:59.82#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.03:52:59.82$vck44/vblo=7,734.99 2006.229.03:52:59.82#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.03:52:59.82#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.03:52:59.82#ibcon#ireg 17 cls_cnt 0 2006.229.03:52:59.82#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:59.82#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:59.82#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:59.82#ibcon#enter wrdev, iclass 24, count 0 2006.229.03:52:59.82#ibcon#first serial, iclass 24, count 0 2006.229.03:52:59.82#ibcon#enter sib2, iclass 24, count 0 2006.229.03:52:59.82#ibcon#flushed, iclass 24, count 0 2006.229.03:52:59.82#ibcon#about to write, iclass 24, count 0 2006.229.03:52:59.82#ibcon#wrote, iclass 24, count 0 2006.229.03:52:59.82#ibcon#about to read 3, iclass 24, count 0 2006.229.03:52:59.84#ibcon#read 3, iclass 24, count 0 2006.229.03:52:59.84#ibcon#about to read 4, iclass 24, count 0 2006.229.03:52:59.84#ibcon#read 4, iclass 24, count 0 2006.229.03:52:59.84#ibcon#about to read 5, iclass 24, count 0 2006.229.03:52:59.84#ibcon#read 5, iclass 24, count 0 2006.229.03:52:59.84#ibcon#about to read 6, iclass 24, count 0 2006.229.03:52:59.84#ibcon#read 6, iclass 24, count 0 2006.229.03:52:59.84#ibcon#end of sib2, iclass 24, count 0 2006.229.03:52:59.84#ibcon#*mode == 0, iclass 24, count 0 2006.229.03:52:59.84#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.03:52:59.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.03:52:59.84#ibcon#*before write, iclass 24, count 0 2006.229.03:52:59.84#ibcon#enter sib2, iclass 24, count 0 2006.229.03:52:59.84#ibcon#flushed, iclass 24, count 0 2006.229.03:52:59.84#ibcon#about to write, iclass 24, count 0 2006.229.03:52:59.84#ibcon#wrote, iclass 24, count 0 2006.229.03:52:59.84#ibcon#about to read 3, iclass 24, count 0 2006.229.03:52:59.88#ibcon#read 3, iclass 24, count 0 2006.229.03:52:59.88#ibcon#about to read 4, iclass 24, count 0 2006.229.03:52:59.88#ibcon#read 4, iclass 24, count 0 2006.229.03:52:59.88#ibcon#about to read 5, iclass 24, count 0 2006.229.03:52:59.88#ibcon#read 5, iclass 24, count 0 2006.229.03:52:59.88#ibcon#about to read 6, iclass 24, count 0 2006.229.03:52:59.88#ibcon#read 6, iclass 24, count 0 2006.229.03:52:59.88#ibcon#end of sib2, iclass 24, count 0 2006.229.03:52:59.88#ibcon#*after write, iclass 24, count 0 2006.229.03:52:59.88#ibcon#*before return 0, iclass 24, count 0 2006.229.03:52:59.88#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:59.88#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.03:52:59.88#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.03:52:59.88#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.03:52:59.88$vck44/vb=7,4 2006.229.03:52:59.88#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.03:52:59.88#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.03:52:59.88#ibcon#ireg 11 cls_cnt 2 2006.229.03:52:59.88#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:59.94#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:59.94#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:59.94#ibcon#enter wrdev, iclass 26, count 2 2006.229.03:52:59.94#ibcon#first serial, iclass 26, count 2 2006.229.03:52:59.94#ibcon#enter sib2, iclass 26, count 2 2006.229.03:52:59.94#ibcon#flushed, iclass 26, count 2 2006.229.03:52:59.94#ibcon#about to write, iclass 26, count 2 2006.229.03:52:59.94#ibcon#wrote, iclass 26, count 2 2006.229.03:52:59.94#ibcon#about to read 3, iclass 26, count 2 2006.229.03:52:59.96#ibcon#read 3, iclass 26, count 2 2006.229.03:52:59.96#ibcon#about to read 4, iclass 26, count 2 2006.229.03:52:59.96#ibcon#read 4, iclass 26, count 2 2006.229.03:52:59.96#ibcon#about to read 5, iclass 26, count 2 2006.229.03:52:59.96#ibcon#read 5, iclass 26, count 2 2006.229.03:52:59.96#ibcon#about to read 6, iclass 26, count 2 2006.229.03:52:59.96#ibcon#read 6, iclass 26, count 2 2006.229.03:52:59.96#ibcon#end of sib2, iclass 26, count 2 2006.229.03:52:59.96#ibcon#*mode == 0, iclass 26, count 2 2006.229.03:52:59.96#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.03:52:59.96#ibcon#[27=AT07-04\r\n] 2006.229.03:52:59.96#ibcon#*before write, iclass 26, count 2 2006.229.03:52:59.96#ibcon#enter sib2, iclass 26, count 2 2006.229.03:52:59.96#ibcon#flushed, iclass 26, count 2 2006.229.03:52:59.96#ibcon#about to write, iclass 26, count 2 2006.229.03:52:59.96#ibcon#wrote, iclass 26, count 2 2006.229.03:52:59.96#ibcon#about to read 3, iclass 26, count 2 2006.229.03:52:59.99#ibcon#read 3, iclass 26, count 2 2006.229.03:52:59.99#ibcon#about to read 4, iclass 26, count 2 2006.229.03:52:59.99#ibcon#read 4, iclass 26, count 2 2006.229.03:52:59.99#ibcon#about to read 5, iclass 26, count 2 2006.229.03:52:59.99#ibcon#read 5, iclass 26, count 2 2006.229.03:52:59.99#ibcon#about to read 6, iclass 26, count 2 2006.229.03:52:59.99#ibcon#read 6, iclass 26, count 2 2006.229.03:52:59.99#ibcon#end of sib2, iclass 26, count 2 2006.229.03:52:59.99#ibcon#*after write, iclass 26, count 2 2006.229.03:52:59.99#ibcon#*before return 0, iclass 26, count 2 2006.229.03:52:59.99#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:59.99#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.03:52:59.99#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.03:52:59.99#ibcon#ireg 7 cls_cnt 0 2006.229.03:52:59.99#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:53:00.11#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:53:00.11#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:53:00.11#ibcon#enter wrdev, iclass 26, count 0 2006.229.03:53:00.11#ibcon#first serial, iclass 26, count 0 2006.229.03:53:00.11#ibcon#enter sib2, iclass 26, count 0 2006.229.03:53:00.11#ibcon#flushed, iclass 26, count 0 2006.229.03:53:00.11#ibcon#about to write, iclass 26, count 0 2006.229.03:53:00.11#ibcon#wrote, iclass 26, count 0 2006.229.03:53:00.11#ibcon#about to read 3, iclass 26, count 0 2006.229.03:53:00.13#ibcon#read 3, iclass 26, count 0 2006.229.03:53:00.13#ibcon#about to read 4, iclass 26, count 0 2006.229.03:53:00.13#ibcon#read 4, iclass 26, count 0 2006.229.03:53:00.13#ibcon#about to read 5, iclass 26, count 0 2006.229.03:53:00.13#ibcon#read 5, iclass 26, count 0 2006.229.03:53:00.13#ibcon#about to read 6, iclass 26, count 0 2006.229.03:53:00.13#ibcon#read 6, iclass 26, count 0 2006.229.03:53:00.13#ibcon#end of sib2, iclass 26, count 0 2006.229.03:53:00.13#ibcon#*mode == 0, iclass 26, count 0 2006.229.03:53:00.13#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.03:53:00.13#ibcon#[27=USB\r\n] 2006.229.03:53:00.13#ibcon#*before write, iclass 26, count 0 2006.229.03:53:00.13#ibcon#enter sib2, iclass 26, count 0 2006.229.03:53:00.13#ibcon#flushed, iclass 26, count 0 2006.229.03:53:00.13#ibcon#about to write, iclass 26, count 0 2006.229.03:53:00.13#ibcon#wrote, iclass 26, count 0 2006.229.03:53:00.13#ibcon#about to read 3, iclass 26, count 0 2006.229.03:53:00.16#ibcon#read 3, iclass 26, count 0 2006.229.03:53:00.16#ibcon#about to read 4, iclass 26, count 0 2006.229.03:53:00.16#ibcon#read 4, iclass 26, count 0 2006.229.03:53:00.16#ibcon#about to read 5, iclass 26, count 0 2006.229.03:53:00.16#ibcon#read 5, iclass 26, count 0 2006.229.03:53:00.16#ibcon#about to read 6, iclass 26, count 0 2006.229.03:53:00.16#ibcon#read 6, iclass 26, count 0 2006.229.03:53:00.16#ibcon#end of sib2, iclass 26, count 0 2006.229.03:53:00.16#ibcon#*after write, iclass 26, count 0 2006.229.03:53:00.16#ibcon#*before return 0, iclass 26, count 0 2006.229.03:53:00.16#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:53:00.16#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.03:53:00.16#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.03:53:00.16#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.03:53:00.16$vck44/vblo=8,744.99 2006.229.03:53:00.16#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.03:53:00.16#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.03:53:00.16#ibcon#ireg 17 cls_cnt 0 2006.229.03:53:00.16#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:53:00.16#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:53:00.16#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:53:00.16#ibcon#enter wrdev, iclass 28, count 0 2006.229.03:53:00.16#ibcon#first serial, iclass 28, count 0 2006.229.03:53:00.16#ibcon#enter sib2, iclass 28, count 0 2006.229.03:53:00.16#ibcon#flushed, iclass 28, count 0 2006.229.03:53:00.16#ibcon#about to write, iclass 28, count 0 2006.229.03:53:00.16#ibcon#wrote, iclass 28, count 0 2006.229.03:53:00.16#ibcon#about to read 3, iclass 28, count 0 2006.229.03:53:00.18#ibcon#read 3, iclass 28, count 0 2006.229.03:53:00.18#ibcon#about to read 4, iclass 28, count 0 2006.229.03:53:00.18#ibcon#read 4, iclass 28, count 0 2006.229.03:53:00.18#ibcon#about to read 5, iclass 28, count 0 2006.229.03:53:00.18#ibcon#read 5, iclass 28, count 0 2006.229.03:53:00.18#ibcon#about to read 6, iclass 28, count 0 2006.229.03:53:00.18#ibcon#read 6, iclass 28, count 0 2006.229.03:53:00.18#ibcon#end of sib2, iclass 28, count 0 2006.229.03:53:00.18#ibcon#*mode == 0, iclass 28, count 0 2006.229.03:53:00.18#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.03:53:00.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.03:53:00.18#ibcon#*before write, iclass 28, count 0 2006.229.03:53:00.18#ibcon#enter sib2, iclass 28, count 0 2006.229.03:53:00.18#ibcon#flushed, iclass 28, count 0 2006.229.03:53:00.18#ibcon#about to write, iclass 28, count 0 2006.229.03:53:00.18#ibcon#wrote, iclass 28, count 0 2006.229.03:53:00.18#ibcon#about to read 3, iclass 28, count 0 2006.229.03:53:00.22#ibcon#read 3, iclass 28, count 0 2006.229.03:53:00.22#ibcon#about to read 4, iclass 28, count 0 2006.229.03:53:00.22#ibcon#read 4, iclass 28, count 0 2006.229.03:53:00.22#ibcon#about to read 5, iclass 28, count 0 2006.229.03:53:00.22#ibcon#read 5, iclass 28, count 0 2006.229.03:53:00.22#ibcon#about to read 6, iclass 28, count 0 2006.229.03:53:00.22#ibcon#read 6, iclass 28, count 0 2006.229.03:53:00.22#ibcon#end of sib2, iclass 28, count 0 2006.229.03:53:00.22#ibcon#*after write, iclass 28, count 0 2006.229.03:53:00.22#ibcon#*before return 0, iclass 28, count 0 2006.229.03:53:00.22#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:53:00.22#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.03:53:00.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.03:53:00.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.03:53:00.22$vck44/vb=8,4 2006.229.03:53:00.22#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.03:53:00.22#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.03:53:00.22#ibcon#ireg 11 cls_cnt 2 2006.229.03:53:00.22#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:53:00.28#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:53:00.28#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:53:00.28#ibcon#enter wrdev, iclass 30, count 2 2006.229.03:53:00.28#ibcon#first serial, iclass 30, count 2 2006.229.03:53:00.28#ibcon#enter sib2, iclass 30, count 2 2006.229.03:53:00.28#ibcon#flushed, iclass 30, count 2 2006.229.03:53:00.28#ibcon#about to write, iclass 30, count 2 2006.229.03:53:00.28#ibcon#wrote, iclass 30, count 2 2006.229.03:53:00.28#ibcon#about to read 3, iclass 30, count 2 2006.229.03:53:00.30#ibcon#read 3, iclass 30, count 2 2006.229.03:53:00.30#ibcon#about to read 4, iclass 30, count 2 2006.229.03:53:00.30#ibcon#read 4, iclass 30, count 2 2006.229.03:53:00.30#ibcon#about to read 5, iclass 30, count 2 2006.229.03:53:00.30#ibcon#read 5, iclass 30, count 2 2006.229.03:53:00.30#ibcon#about to read 6, iclass 30, count 2 2006.229.03:53:00.30#ibcon#read 6, iclass 30, count 2 2006.229.03:53:00.30#ibcon#end of sib2, iclass 30, count 2 2006.229.03:53:00.30#ibcon#*mode == 0, iclass 30, count 2 2006.229.03:53:00.30#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.03:53:00.30#ibcon#[27=AT08-04\r\n] 2006.229.03:53:00.30#ibcon#*before write, iclass 30, count 2 2006.229.03:53:00.30#ibcon#enter sib2, iclass 30, count 2 2006.229.03:53:00.30#ibcon#flushed, iclass 30, count 2 2006.229.03:53:00.30#ibcon#about to write, iclass 30, count 2 2006.229.03:53:00.30#ibcon#wrote, iclass 30, count 2 2006.229.03:53:00.30#ibcon#about to read 3, iclass 30, count 2 2006.229.03:53:00.33#ibcon#read 3, iclass 30, count 2 2006.229.03:53:00.33#ibcon#about to read 4, iclass 30, count 2 2006.229.03:53:00.33#ibcon#read 4, iclass 30, count 2 2006.229.03:53:00.33#ibcon#about to read 5, iclass 30, count 2 2006.229.03:53:00.33#ibcon#read 5, iclass 30, count 2 2006.229.03:53:00.33#ibcon#about to read 6, iclass 30, count 2 2006.229.03:53:00.33#ibcon#read 6, iclass 30, count 2 2006.229.03:53:00.33#ibcon#end of sib2, iclass 30, count 2 2006.229.03:53:00.33#ibcon#*after write, iclass 30, count 2 2006.229.03:53:00.33#ibcon#*before return 0, iclass 30, count 2 2006.229.03:53:00.33#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:53:00.33#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.03:53:00.33#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.03:53:00.33#ibcon#ireg 7 cls_cnt 0 2006.229.03:53:00.33#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:53:00.45#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:53:00.45#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:53:00.45#ibcon#enter wrdev, iclass 30, count 0 2006.229.03:53:00.45#ibcon#first serial, iclass 30, count 0 2006.229.03:53:00.45#ibcon#enter sib2, iclass 30, count 0 2006.229.03:53:00.45#ibcon#flushed, iclass 30, count 0 2006.229.03:53:00.45#ibcon#about to write, iclass 30, count 0 2006.229.03:53:00.45#ibcon#wrote, iclass 30, count 0 2006.229.03:53:00.45#ibcon#about to read 3, iclass 30, count 0 2006.229.03:53:00.47#ibcon#read 3, iclass 30, count 0 2006.229.03:53:00.47#ibcon#about to read 4, iclass 30, count 0 2006.229.03:53:00.47#ibcon#read 4, iclass 30, count 0 2006.229.03:53:00.47#ibcon#about to read 5, iclass 30, count 0 2006.229.03:53:00.47#ibcon#read 5, iclass 30, count 0 2006.229.03:53:00.47#ibcon#about to read 6, iclass 30, count 0 2006.229.03:53:00.47#ibcon#read 6, iclass 30, count 0 2006.229.03:53:00.47#ibcon#end of sib2, iclass 30, count 0 2006.229.03:53:00.47#ibcon#*mode == 0, iclass 30, count 0 2006.229.03:53:00.47#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.03:53:00.47#ibcon#[27=USB\r\n] 2006.229.03:53:00.47#ibcon#*before write, iclass 30, count 0 2006.229.03:53:00.47#ibcon#enter sib2, iclass 30, count 0 2006.229.03:53:00.47#ibcon#flushed, iclass 30, count 0 2006.229.03:53:00.47#ibcon#about to write, iclass 30, count 0 2006.229.03:53:00.47#ibcon#wrote, iclass 30, count 0 2006.229.03:53:00.47#ibcon#about to read 3, iclass 30, count 0 2006.229.03:53:00.50#ibcon#read 3, iclass 30, count 0 2006.229.03:53:00.50#ibcon#about to read 4, iclass 30, count 0 2006.229.03:53:00.50#ibcon#read 4, iclass 30, count 0 2006.229.03:53:00.50#ibcon#about to read 5, iclass 30, count 0 2006.229.03:53:00.50#ibcon#read 5, iclass 30, count 0 2006.229.03:53:00.50#ibcon#about to read 6, iclass 30, count 0 2006.229.03:53:00.50#ibcon#read 6, iclass 30, count 0 2006.229.03:53:00.50#ibcon#end of sib2, iclass 30, count 0 2006.229.03:53:00.50#ibcon#*after write, iclass 30, count 0 2006.229.03:53:00.50#ibcon#*before return 0, iclass 30, count 0 2006.229.03:53:00.50#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:53:00.50#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.03:53:00.50#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.03:53:00.50#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.03:53:00.50$vck44/vabw=wide 2006.229.03:53:00.50#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.03:53:00.50#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.03:53:00.50#ibcon#ireg 8 cls_cnt 0 2006.229.03:53:00.50#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:53:00.50#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:53:00.50#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:53:00.50#ibcon#enter wrdev, iclass 32, count 0 2006.229.03:53:00.50#ibcon#first serial, iclass 32, count 0 2006.229.03:53:00.50#ibcon#enter sib2, iclass 32, count 0 2006.229.03:53:00.50#ibcon#flushed, iclass 32, count 0 2006.229.03:53:00.50#ibcon#about to write, iclass 32, count 0 2006.229.03:53:00.50#ibcon#wrote, iclass 32, count 0 2006.229.03:53:00.50#ibcon#about to read 3, iclass 32, count 0 2006.229.03:53:00.52#ibcon#read 3, iclass 32, count 0 2006.229.03:53:00.52#ibcon#about to read 4, iclass 32, count 0 2006.229.03:53:00.52#ibcon#read 4, iclass 32, count 0 2006.229.03:53:00.52#ibcon#about to read 5, iclass 32, count 0 2006.229.03:53:00.52#ibcon#read 5, iclass 32, count 0 2006.229.03:53:00.52#ibcon#about to read 6, iclass 32, count 0 2006.229.03:53:00.52#ibcon#read 6, iclass 32, count 0 2006.229.03:53:00.52#ibcon#end of sib2, iclass 32, count 0 2006.229.03:53:00.52#ibcon#*mode == 0, iclass 32, count 0 2006.229.03:53:00.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.03:53:00.52#ibcon#[25=BW32\r\n] 2006.229.03:53:00.52#ibcon#*before write, iclass 32, count 0 2006.229.03:53:00.52#ibcon#enter sib2, iclass 32, count 0 2006.229.03:53:00.52#ibcon#flushed, iclass 32, count 0 2006.229.03:53:00.52#ibcon#about to write, iclass 32, count 0 2006.229.03:53:00.52#ibcon#wrote, iclass 32, count 0 2006.229.03:53:00.52#ibcon#about to read 3, iclass 32, count 0 2006.229.03:53:00.55#ibcon#read 3, iclass 32, count 0 2006.229.03:53:00.55#ibcon#about to read 4, iclass 32, count 0 2006.229.03:53:00.55#ibcon#read 4, iclass 32, count 0 2006.229.03:53:00.55#ibcon#about to read 5, iclass 32, count 0 2006.229.03:53:00.55#ibcon#read 5, iclass 32, count 0 2006.229.03:53:00.55#ibcon#about to read 6, iclass 32, count 0 2006.229.03:53:00.55#ibcon#read 6, iclass 32, count 0 2006.229.03:53:00.55#ibcon#end of sib2, iclass 32, count 0 2006.229.03:53:00.55#ibcon#*after write, iclass 32, count 0 2006.229.03:53:00.55#ibcon#*before return 0, iclass 32, count 0 2006.229.03:53:00.55#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:53:00.55#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.03:53:00.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.03:53:00.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.03:53:00.55$vck44/vbbw=wide 2006.229.03:53:00.55#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.03:53:00.55#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.03:53:00.55#ibcon#ireg 8 cls_cnt 0 2006.229.03:53:00.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:53:00.62#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:53:00.62#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:53:00.62#ibcon#enter wrdev, iclass 34, count 0 2006.229.03:53:00.62#ibcon#first serial, iclass 34, count 0 2006.229.03:53:00.62#ibcon#enter sib2, iclass 34, count 0 2006.229.03:53:00.62#ibcon#flushed, iclass 34, count 0 2006.229.03:53:00.62#ibcon#about to write, iclass 34, count 0 2006.229.03:53:00.62#ibcon#wrote, iclass 34, count 0 2006.229.03:53:00.62#ibcon#about to read 3, iclass 34, count 0 2006.229.03:53:00.64#ibcon#read 3, iclass 34, count 0 2006.229.03:53:00.64#ibcon#about to read 4, iclass 34, count 0 2006.229.03:53:00.64#ibcon#read 4, iclass 34, count 0 2006.229.03:53:00.64#ibcon#about to read 5, iclass 34, count 0 2006.229.03:53:00.64#ibcon#read 5, iclass 34, count 0 2006.229.03:53:00.64#ibcon#about to read 6, iclass 34, count 0 2006.229.03:53:00.64#ibcon#read 6, iclass 34, count 0 2006.229.03:53:00.64#ibcon#end of sib2, iclass 34, count 0 2006.229.03:53:00.64#ibcon#*mode == 0, iclass 34, count 0 2006.229.03:53:00.64#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.03:53:00.64#ibcon#[27=BW32\r\n] 2006.229.03:53:00.64#ibcon#*before write, iclass 34, count 0 2006.229.03:53:00.64#ibcon#enter sib2, iclass 34, count 0 2006.229.03:53:00.64#ibcon#flushed, iclass 34, count 0 2006.229.03:53:00.64#ibcon#about to write, iclass 34, count 0 2006.229.03:53:00.64#ibcon#wrote, iclass 34, count 0 2006.229.03:53:00.64#ibcon#about to read 3, iclass 34, count 0 2006.229.03:53:00.67#ibcon#read 3, iclass 34, count 0 2006.229.03:53:00.67#ibcon#about to read 4, iclass 34, count 0 2006.229.03:53:00.67#ibcon#read 4, iclass 34, count 0 2006.229.03:53:00.67#ibcon#about to read 5, iclass 34, count 0 2006.229.03:53:00.67#ibcon#read 5, iclass 34, count 0 2006.229.03:53:00.67#ibcon#about to read 6, iclass 34, count 0 2006.229.03:53:00.67#ibcon#read 6, iclass 34, count 0 2006.229.03:53:00.67#ibcon#end of sib2, iclass 34, count 0 2006.229.03:53:00.67#ibcon#*after write, iclass 34, count 0 2006.229.03:53:00.67#ibcon#*before return 0, iclass 34, count 0 2006.229.03:53:00.67#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:53:00.67#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.03:53:00.67#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.03:53:00.67#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.03:53:00.67$setupk4/ifdk4 2006.229.03:53:00.67$ifdk4/lo= 2006.229.03:53:00.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.03:53:00.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.03:53:00.68$ifdk4/patch= 2006.229.03:53:00.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.03:53:00.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.03:53:00.68$setupk4/!*+20s 2006.229.03:53:08.60#abcon#<5=/05 2.5 5.0 29.96 951000.4\r\n> 2006.229.03:53:08.62#abcon#{5=INTERFACE CLEAR} 2006.229.03:53:08.68#abcon#[5=S1D000X0/0*\r\n] 2006.229.03:53:10.13#trakl#Source acquired 2006.229.03:53:11.13#flagr#flagr/antenna,acquired 2006.229.03:53:15.20$setupk4/"tpicd 2006.229.03:53:15.20$setupk4/echo=off 2006.229.03:53:15.20$setupk4/xlog=off 2006.229.03:53:15.20:!2006.229.04:01:36 2006.229.04:01:36.00:preob 2006.229.04:01:36.13/onsource/TRACKING 2006.229.04:01:36.13:!2006.229.04:01:46 2006.229.04:01:46.00:"tape 2006.229.04:01:46.00:"st=record 2006.229.04:01:46.00:data_valid=on 2006.229.04:01:46.00:midob 2006.229.04:01:47.13/onsource/TRACKING 2006.229.04:01:47.13/wx/30.09,1000.4,95 2006.229.04:01:47.25/cable/+6.4075E-03 2006.229.04:01:48.34/va/01,08,usb,yes,46,50 2006.229.04:01:48.34/va/02,07,usb,yes,50,51 2006.229.04:01:48.34/va/03,06,usb,yes,61,65 2006.229.04:01:48.34/va/04,07,usb,yes,52,54 2006.229.04:01:48.34/va/05,04,usb,yes,47,48 2006.229.04:01:48.34/va/06,04,usb,yes,52,52 2006.229.04:01:48.34/va/07,05,usb,yes,47,47 2006.229.04:01:48.34/va/08,06,usb,yes,35,42 2006.229.04:01:48.57/valo/01,524.99,yes,locked 2006.229.04:01:48.57/valo/02,534.99,yes,locked 2006.229.04:01:48.57/valo/03,564.99,yes,locked 2006.229.04:01:48.57/valo/04,624.99,yes,locked 2006.229.04:01:48.57/valo/05,734.99,yes,locked 2006.229.04:01:48.57/valo/06,814.99,yes,locked 2006.229.04:01:48.57/valo/07,864.99,yes,locked 2006.229.04:01:48.57/valo/08,884.99,yes,locked 2006.229.04:01:49.66/vb/01,04,usb,yes,35,33 2006.229.04:01:49.66/vb/02,04,usb,yes,38,37 2006.229.04:01:49.66/vb/03,04,usb,yes,34,38 2006.229.04:01:49.66/vb/04,04,usb,yes,39,38 2006.229.04:01:49.66/vb/05,04,usb,yes,31,34 2006.229.04:01:49.66/vb/06,04,usb,yes,36,32 2006.229.04:01:49.66/vb/07,04,usb,yes,36,36 2006.229.04:01:49.66/vb/08,04,usb,yes,33,37 2006.229.04:01:49.90/vblo/01,629.99,yes,locked 2006.229.04:01:49.90/vblo/02,634.99,yes,locked 2006.229.04:01:49.90/vblo/03,649.99,yes,locked 2006.229.04:01:49.90/vblo/04,679.99,yes,locked 2006.229.04:01:49.90/vblo/05,709.99,yes,locked 2006.229.04:01:49.90/vblo/06,719.99,yes,locked 2006.229.04:01:49.90/vblo/07,734.99,yes,locked 2006.229.04:01:49.90/vblo/08,744.99,yes,locked 2006.229.04:01:50.05/vabw/8 2006.229.04:01:50.20/vbbw/8 2006.229.04:01:50.29/xfe/off,on,12.0 2006.229.04:01:50.67/ifatt/23,28,28,28 2006.229.04:01:51.08/fmout-gps/S +4.43E-07 2006.229.04:01:51.12:!2006.229.04:02:36 2006.229.04:02:36.01:data_valid=off 2006.229.04:02:36.02:"et 2006.229.04:02:36.02:!+3s 2006.229.04:02:39.03:"tape 2006.229.04:02:39.04:postob 2006.229.04:02:39.14/cable/+6.4091E-03 2006.229.04:02:39.15/wx/30.14,1000.4,94 2006.229.04:02:39.20/fmout-gps/S +4.44E-07 2006.229.04:02:39.21:scan_name=229-0403,jd0608,80 2006.229.04:02:39.21:source=0727-115,073019.11,-114112.6,2000.0,ccw 2006.229.04:02:40.14#flagr#flagr/antenna,new-source 2006.229.04:02:40.15:checkk5 2006.229.04:02:40.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:02:40.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:02:41.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:02:41.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:02:42.14/chk_obsdata//k5ts1/T2290401??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:02:42.54/chk_obsdata//k5ts2/T2290401??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:02:42.96/chk_obsdata//k5ts3/T2290401??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:02:43.36/chk_obsdata//k5ts4/T2290401??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:02:44.09/k5log//k5ts1_log_newline 2006.229.04:02:44.80/k5log//k5ts2_log_newline 2006.229.04:02:45.51/k5log//k5ts3_log_newline 2006.229.04:02:46.21/k5log//k5ts4_log_newline 2006.229.04:02:46.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:02:46.24:setupk4=1 2006.229.04:02:46.24$setupk4/echo=on 2006.229.04:02:46.24$setupk4/pcalon 2006.229.04:02:46.24$pcalon/"no phase cal control is implemented here 2006.229.04:02:46.24$setupk4/"tpicd=stop 2006.229.04:02:46.24$setupk4/"rec=synch_on 2006.229.04:02:46.24$setupk4/"rec_mode=128 2006.229.04:02:46.24$setupk4/!* 2006.229.04:02:46.24$setupk4/recpk4 2006.229.04:02:46.24$recpk4/recpatch= 2006.229.04:02:46.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:02:46.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:02:46.24$setupk4/vck44 2006.229.04:02:46.24$vck44/valo=1,524.99 2006.229.04:02:46.24#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.04:02:46.24#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.04:02:46.24#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:46.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:46.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:46.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:46.24#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:02:46.24#ibcon#first serial, iclass 15, count 0 2006.229.04:02:46.24#ibcon#enter sib2, iclass 15, count 0 2006.229.04:02:46.24#ibcon#flushed, iclass 15, count 0 2006.229.04:02:46.24#ibcon#about to write, iclass 15, count 0 2006.229.04:02:46.24#ibcon#wrote, iclass 15, count 0 2006.229.04:02:46.24#ibcon#about to read 3, iclass 15, count 0 2006.229.04:02:46.26#ibcon#read 3, iclass 15, count 0 2006.229.04:02:46.26#ibcon#about to read 4, iclass 15, count 0 2006.229.04:02:46.26#ibcon#read 4, iclass 15, count 0 2006.229.04:02:46.26#ibcon#about to read 5, iclass 15, count 0 2006.229.04:02:46.26#ibcon#read 5, iclass 15, count 0 2006.229.04:02:46.26#ibcon#about to read 6, iclass 15, count 0 2006.229.04:02:46.26#ibcon#read 6, iclass 15, count 0 2006.229.04:02:46.26#ibcon#end of sib2, iclass 15, count 0 2006.229.04:02:46.26#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:02:46.26#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:02:46.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:02:46.26#ibcon#*before write, iclass 15, count 0 2006.229.04:02:46.26#ibcon#enter sib2, iclass 15, count 0 2006.229.04:02:46.26#ibcon#flushed, iclass 15, count 0 2006.229.04:02:46.26#ibcon#about to write, iclass 15, count 0 2006.229.04:02:46.26#ibcon#wrote, iclass 15, count 0 2006.229.04:02:46.26#ibcon#about to read 3, iclass 15, count 0 2006.229.04:02:46.31#ibcon#read 3, iclass 15, count 0 2006.229.04:02:46.31#ibcon#about to read 4, iclass 15, count 0 2006.229.04:02:46.31#ibcon#read 4, iclass 15, count 0 2006.229.04:02:46.31#ibcon#about to read 5, iclass 15, count 0 2006.229.04:02:46.31#ibcon#read 5, iclass 15, count 0 2006.229.04:02:46.31#ibcon#about to read 6, iclass 15, count 0 2006.229.04:02:46.31#ibcon#read 6, iclass 15, count 0 2006.229.04:02:46.31#ibcon#end of sib2, iclass 15, count 0 2006.229.04:02:46.31#ibcon#*after write, iclass 15, count 0 2006.229.04:02:46.31#ibcon#*before return 0, iclass 15, count 0 2006.229.04:02:46.31#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:46.31#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:46.31#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:02:46.31#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:02:46.31$vck44/va=1,8 2006.229.04:02:46.31#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.04:02:46.31#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.04:02:46.31#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:46.31#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:46.31#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:46.31#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:46.31#ibcon#enter wrdev, iclass 17, count 2 2006.229.04:02:46.31#ibcon#first serial, iclass 17, count 2 2006.229.04:02:46.31#ibcon#enter sib2, iclass 17, count 2 2006.229.04:02:46.31#ibcon#flushed, iclass 17, count 2 2006.229.04:02:46.31#ibcon#about to write, iclass 17, count 2 2006.229.04:02:46.31#ibcon#wrote, iclass 17, count 2 2006.229.04:02:46.31#ibcon#about to read 3, iclass 17, count 2 2006.229.04:02:46.33#ibcon#read 3, iclass 17, count 2 2006.229.04:02:46.33#ibcon#about to read 4, iclass 17, count 2 2006.229.04:02:46.33#ibcon#read 4, iclass 17, count 2 2006.229.04:02:46.33#ibcon#about to read 5, iclass 17, count 2 2006.229.04:02:46.33#ibcon#read 5, iclass 17, count 2 2006.229.04:02:46.33#ibcon#about to read 6, iclass 17, count 2 2006.229.04:02:46.33#ibcon#read 6, iclass 17, count 2 2006.229.04:02:46.33#ibcon#end of sib2, iclass 17, count 2 2006.229.04:02:46.33#ibcon#*mode == 0, iclass 17, count 2 2006.229.04:02:46.33#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.04:02:46.33#ibcon#[25=AT01-08\r\n] 2006.229.04:02:46.33#ibcon#*before write, iclass 17, count 2 2006.229.04:02:46.33#ibcon#enter sib2, iclass 17, count 2 2006.229.04:02:46.33#ibcon#flushed, iclass 17, count 2 2006.229.04:02:46.33#ibcon#about to write, iclass 17, count 2 2006.229.04:02:46.33#ibcon#wrote, iclass 17, count 2 2006.229.04:02:46.33#ibcon#about to read 3, iclass 17, count 2 2006.229.04:02:46.36#ibcon#read 3, iclass 17, count 2 2006.229.04:02:46.36#ibcon#about to read 4, iclass 17, count 2 2006.229.04:02:46.36#ibcon#read 4, iclass 17, count 2 2006.229.04:02:46.36#ibcon#about to read 5, iclass 17, count 2 2006.229.04:02:46.36#ibcon#read 5, iclass 17, count 2 2006.229.04:02:46.36#ibcon#about to read 6, iclass 17, count 2 2006.229.04:02:46.36#ibcon#read 6, iclass 17, count 2 2006.229.04:02:46.36#ibcon#end of sib2, iclass 17, count 2 2006.229.04:02:46.36#ibcon#*after write, iclass 17, count 2 2006.229.04:02:46.36#ibcon#*before return 0, iclass 17, count 2 2006.229.04:02:46.36#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:46.36#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:46.36#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.04:02:46.36#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:46.36#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:46.48#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:46.48#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:46.48#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:02:46.48#ibcon#first serial, iclass 17, count 0 2006.229.04:02:46.48#ibcon#enter sib2, iclass 17, count 0 2006.229.04:02:46.48#ibcon#flushed, iclass 17, count 0 2006.229.04:02:46.48#ibcon#about to write, iclass 17, count 0 2006.229.04:02:46.48#ibcon#wrote, iclass 17, count 0 2006.229.04:02:46.48#ibcon#about to read 3, iclass 17, count 0 2006.229.04:02:46.50#ibcon#read 3, iclass 17, count 0 2006.229.04:02:46.50#ibcon#about to read 4, iclass 17, count 0 2006.229.04:02:46.50#ibcon#read 4, iclass 17, count 0 2006.229.04:02:46.50#ibcon#about to read 5, iclass 17, count 0 2006.229.04:02:46.50#ibcon#read 5, iclass 17, count 0 2006.229.04:02:46.50#ibcon#about to read 6, iclass 17, count 0 2006.229.04:02:46.50#ibcon#read 6, iclass 17, count 0 2006.229.04:02:46.50#ibcon#end of sib2, iclass 17, count 0 2006.229.04:02:46.50#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:02:46.50#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:02:46.50#ibcon#[25=USB\r\n] 2006.229.04:02:46.50#ibcon#*before write, iclass 17, count 0 2006.229.04:02:46.50#ibcon#enter sib2, iclass 17, count 0 2006.229.04:02:46.50#ibcon#flushed, iclass 17, count 0 2006.229.04:02:46.50#ibcon#about to write, iclass 17, count 0 2006.229.04:02:46.50#ibcon#wrote, iclass 17, count 0 2006.229.04:02:46.50#ibcon#about to read 3, iclass 17, count 0 2006.229.04:02:46.53#ibcon#read 3, iclass 17, count 0 2006.229.04:02:46.53#ibcon#about to read 4, iclass 17, count 0 2006.229.04:02:46.53#ibcon#read 4, iclass 17, count 0 2006.229.04:02:46.53#ibcon#about to read 5, iclass 17, count 0 2006.229.04:02:46.53#ibcon#read 5, iclass 17, count 0 2006.229.04:02:46.53#ibcon#about to read 6, iclass 17, count 0 2006.229.04:02:46.53#ibcon#read 6, iclass 17, count 0 2006.229.04:02:46.53#ibcon#end of sib2, iclass 17, count 0 2006.229.04:02:46.53#ibcon#*after write, iclass 17, count 0 2006.229.04:02:46.53#ibcon#*before return 0, iclass 17, count 0 2006.229.04:02:46.53#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:46.53#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:46.53#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:02:46.53#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:02:46.53$vck44/valo=2,534.99 2006.229.04:02:46.53#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.04:02:46.53#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.04:02:46.53#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:46.53#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:46.53#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:46.53#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:46.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:02:46.53#ibcon#first serial, iclass 19, count 0 2006.229.04:02:46.53#ibcon#enter sib2, iclass 19, count 0 2006.229.04:02:46.53#ibcon#flushed, iclass 19, count 0 2006.229.04:02:46.53#ibcon#about to write, iclass 19, count 0 2006.229.04:02:46.53#ibcon#wrote, iclass 19, count 0 2006.229.04:02:46.53#ibcon#about to read 3, iclass 19, count 0 2006.229.04:02:46.55#ibcon#read 3, iclass 19, count 0 2006.229.04:02:46.55#ibcon#about to read 4, iclass 19, count 0 2006.229.04:02:46.55#ibcon#read 4, iclass 19, count 0 2006.229.04:02:46.55#ibcon#about to read 5, iclass 19, count 0 2006.229.04:02:46.55#ibcon#read 5, iclass 19, count 0 2006.229.04:02:46.55#ibcon#about to read 6, iclass 19, count 0 2006.229.04:02:46.55#ibcon#read 6, iclass 19, count 0 2006.229.04:02:46.55#ibcon#end of sib2, iclass 19, count 0 2006.229.04:02:46.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:02:46.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:02:46.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:02:46.55#ibcon#*before write, iclass 19, count 0 2006.229.04:02:46.55#ibcon#enter sib2, iclass 19, count 0 2006.229.04:02:46.55#ibcon#flushed, iclass 19, count 0 2006.229.04:02:46.55#ibcon#about to write, iclass 19, count 0 2006.229.04:02:46.55#ibcon#wrote, iclass 19, count 0 2006.229.04:02:46.55#ibcon#about to read 3, iclass 19, count 0 2006.229.04:02:46.59#ibcon#read 3, iclass 19, count 0 2006.229.04:02:46.59#ibcon#about to read 4, iclass 19, count 0 2006.229.04:02:46.59#ibcon#read 4, iclass 19, count 0 2006.229.04:02:46.59#ibcon#about to read 5, iclass 19, count 0 2006.229.04:02:46.59#ibcon#read 5, iclass 19, count 0 2006.229.04:02:46.59#ibcon#about to read 6, iclass 19, count 0 2006.229.04:02:46.59#ibcon#read 6, iclass 19, count 0 2006.229.04:02:46.59#ibcon#end of sib2, iclass 19, count 0 2006.229.04:02:46.59#ibcon#*after write, iclass 19, count 0 2006.229.04:02:46.59#ibcon#*before return 0, iclass 19, count 0 2006.229.04:02:46.59#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:46.59#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:46.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:02:46.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:02:46.59$vck44/va=2,7 2006.229.04:02:46.59#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.04:02:46.59#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.04:02:46.59#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:46.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:46.65#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:46.65#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:46.65#ibcon#enter wrdev, iclass 21, count 2 2006.229.04:02:46.65#ibcon#first serial, iclass 21, count 2 2006.229.04:02:46.65#ibcon#enter sib2, iclass 21, count 2 2006.229.04:02:46.65#ibcon#flushed, iclass 21, count 2 2006.229.04:02:46.65#ibcon#about to write, iclass 21, count 2 2006.229.04:02:46.65#ibcon#wrote, iclass 21, count 2 2006.229.04:02:46.65#ibcon#about to read 3, iclass 21, count 2 2006.229.04:02:46.67#ibcon#read 3, iclass 21, count 2 2006.229.04:02:46.67#ibcon#about to read 4, iclass 21, count 2 2006.229.04:02:46.67#ibcon#read 4, iclass 21, count 2 2006.229.04:02:46.67#ibcon#about to read 5, iclass 21, count 2 2006.229.04:02:46.67#ibcon#read 5, iclass 21, count 2 2006.229.04:02:46.67#ibcon#about to read 6, iclass 21, count 2 2006.229.04:02:46.67#ibcon#read 6, iclass 21, count 2 2006.229.04:02:46.67#ibcon#end of sib2, iclass 21, count 2 2006.229.04:02:46.67#ibcon#*mode == 0, iclass 21, count 2 2006.229.04:02:46.67#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.04:02:46.67#ibcon#[25=AT02-07\r\n] 2006.229.04:02:46.67#ibcon#*before write, iclass 21, count 2 2006.229.04:02:46.67#ibcon#enter sib2, iclass 21, count 2 2006.229.04:02:46.67#ibcon#flushed, iclass 21, count 2 2006.229.04:02:46.67#ibcon#about to write, iclass 21, count 2 2006.229.04:02:46.67#ibcon#wrote, iclass 21, count 2 2006.229.04:02:46.67#ibcon#about to read 3, iclass 21, count 2 2006.229.04:02:46.70#ibcon#read 3, iclass 21, count 2 2006.229.04:02:46.70#ibcon#about to read 4, iclass 21, count 2 2006.229.04:02:46.70#ibcon#read 4, iclass 21, count 2 2006.229.04:02:46.70#ibcon#about to read 5, iclass 21, count 2 2006.229.04:02:46.70#ibcon#read 5, iclass 21, count 2 2006.229.04:02:46.70#ibcon#about to read 6, iclass 21, count 2 2006.229.04:02:46.70#ibcon#read 6, iclass 21, count 2 2006.229.04:02:46.70#ibcon#end of sib2, iclass 21, count 2 2006.229.04:02:46.70#ibcon#*after write, iclass 21, count 2 2006.229.04:02:46.70#ibcon#*before return 0, iclass 21, count 2 2006.229.04:02:46.70#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:46.70#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:46.70#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.04:02:46.70#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:46.70#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:46.82#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:46.82#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:46.82#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:02:46.82#ibcon#first serial, iclass 21, count 0 2006.229.04:02:46.82#ibcon#enter sib2, iclass 21, count 0 2006.229.04:02:46.82#ibcon#flushed, iclass 21, count 0 2006.229.04:02:46.82#ibcon#about to write, iclass 21, count 0 2006.229.04:02:46.82#ibcon#wrote, iclass 21, count 0 2006.229.04:02:46.82#ibcon#about to read 3, iclass 21, count 0 2006.229.04:02:46.84#ibcon#read 3, iclass 21, count 0 2006.229.04:02:46.84#ibcon#about to read 4, iclass 21, count 0 2006.229.04:02:46.84#ibcon#read 4, iclass 21, count 0 2006.229.04:02:46.84#ibcon#about to read 5, iclass 21, count 0 2006.229.04:02:46.84#ibcon#read 5, iclass 21, count 0 2006.229.04:02:46.84#ibcon#about to read 6, iclass 21, count 0 2006.229.04:02:46.84#ibcon#read 6, iclass 21, count 0 2006.229.04:02:46.84#ibcon#end of sib2, iclass 21, count 0 2006.229.04:02:46.84#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:02:46.84#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:02:46.84#ibcon#[25=USB\r\n] 2006.229.04:02:46.84#ibcon#*before write, iclass 21, count 0 2006.229.04:02:46.84#ibcon#enter sib2, iclass 21, count 0 2006.229.04:02:46.84#ibcon#flushed, iclass 21, count 0 2006.229.04:02:46.84#ibcon#about to write, iclass 21, count 0 2006.229.04:02:46.84#ibcon#wrote, iclass 21, count 0 2006.229.04:02:46.84#ibcon#about to read 3, iclass 21, count 0 2006.229.04:02:46.87#ibcon#read 3, iclass 21, count 0 2006.229.04:02:46.87#ibcon#about to read 4, iclass 21, count 0 2006.229.04:02:46.87#ibcon#read 4, iclass 21, count 0 2006.229.04:02:46.87#ibcon#about to read 5, iclass 21, count 0 2006.229.04:02:46.87#ibcon#read 5, iclass 21, count 0 2006.229.04:02:46.87#ibcon#about to read 6, iclass 21, count 0 2006.229.04:02:46.87#ibcon#read 6, iclass 21, count 0 2006.229.04:02:46.87#ibcon#end of sib2, iclass 21, count 0 2006.229.04:02:46.87#ibcon#*after write, iclass 21, count 0 2006.229.04:02:46.87#ibcon#*before return 0, iclass 21, count 0 2006.229.04:02:46.87#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:46.87#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:46.87#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:02:46.87#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:02:46.87$vck44/valo=3,564.99 2006.229.04:02:46.87#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.04:02:46.87#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.04:02:46.87#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:46.87#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:46.87#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:46.87#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:46.87#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:02:46.87#ibcon#first serial, iclass 23, count 0 2006.229.04:02:46.87#ibcon#enter sib2, iclass 23, count 0 2006.229.04:02:46.87#ibcon#flushed, iclass 23, count 0 2006.229.04:02:46.87#ibcon#about to write, iclass 23, count 0 2006.229.04:02:46.87#ibcon#wrote, iclass 23, count 0 2006.229.04:02:46.87#ibcon#about to read 3, iclass 23, count 0 2006.229.04:02:46.89#ibcon#read 3, iclass 23, count 0 2006.229.04:02:46.89#ibcon#about to read 4, iclass 23, count 0 2006.229.04:02:46.89#ibcon#read 4, iclass 23, count 0 2006.229.04:02:46.89#ibcon#about to read 5, iclass 23, count 0 2006.229.04:02:46.89#ibcon#read 5, iclass 23, count 0 2006.229.04:02:46.89#ibcon#about to read 6, iclass 23, count 0 2006.229.04:02:46.89#ibcon#read 6, iclass 23, count 0 2006.229.04:02:46.89#ibcon#end of sib2, iclass 23, count 0 2006.229.04:02:46.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:02:46.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:02:46.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:02:46.89#ibcon#*before write, iclass 23, count 0 2006.229.04:02:46.89#ibcon#enter sib2, iclass 23, count 0 2006.229.04:02:46.89#ibcon#flushed, iclass 23, count 0 2006.229.04:02:46.89#ibcon#about to write, iclass 23, count 0 2006.229.04:02:46.89#ibcon#wrote, iclass 23, count 0 2006.229.04:02:46.89#ibcon#about to read 3, iclass 23, count 0 2006.229.04:02:46.93#ibcon#read 3, iclass 23, count 0 2006.229.04:02:46.93#ibcon#about to read 4, iclass 23, count 0 2006.229.04:02:46.93#ibcon#read 4, iclass 23, count 0 2006.229.04:02:46.93#ibcon#about to read 5, iclass 23, count 0 2006.229.04:02:46.93#ibcon#read 5, iclass 23, count 0 2006.229.04:02:46.93#ibcon#about to read 6, iclass 23, count 0 2006.229.04:02:46.93#ibcon#read 6, iclass 23, count 0 2006.229.04:02:46.93#ibcon#end of sib2, iclass 23, count 0 2006.229.04:02:46.93#ibcon#*after write, iclass 23, count 0 2006.229.04:02:46.93#ibcon#*before return 0, iclass 23, count 0 2006.229.04:02:46.93#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:46.93#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:46.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:02:46.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:02:46.93$vck44/va=3,6 2006.229.04:02:46.93#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.04:02:46.93#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.04:02:46.93#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:46.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:46.99#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:46.99#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:46.99#ibcon#enter wrdev, iclass 25, count 2 2006.229.04:02:46.99#ibcon#first serial, iclass 25, count 2 2006.229.04:02:46.99#ibcon#enter sib2, iclass 25, count 2 2006.229.04:02:46.99#ibcon#flushed, iclass 25, count 2 2006.229.04:02:46.99#ibcon#about to write, iclass 25, count 2 2006.229.04:02:46.99#ibcon#wrote, iclass 25, count 2 2006.229.04:02:46.99#ibcon#about to read 3, iclass 25, count 2 2006.229.04:02:47.01#ibcon#read 3, iclass 25, count 2 2006.229.04:02:47.01#ibcon#about to read 4, iclass 25, count 2 2006.229.04:02:47.01#ibcon#read 4, iclass 25, count 2 2006.229.04:02:47.01#ibcon#about to read 5, iclass 25, count 2 2006.229.04:02:47.01#ibcon#read 5, iclass 25, count 2 2006.229.04:02:47.01#ibcon#about to read 6, iclass 25, count 2 2006.229.04:02:47.01#ibcon#read 6, iclass 25, count 2 2006.229.04:02:47.01#ibcon#end of sib2, iclass 25, count 2 2006.229.04:02:47.01#ibcon#*mode == 0, iclass 25, count 2 2006.229.04:02:47.01#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.04:02:47.01#ibcon#[25=AT03-06\r\n] 2006.229.04:02:47.01#ibcon#*before write, iclass 25, count 2 2006.229.04:02:47.01#ibcon#enter sib2, iclass 25, count 2 2006.229.04:02:47.01#ibcon#flushed, iclass 25, count 2 2006.229.04:02:47.01#ibcon#about to write, iclass 25, count 2 2006.229.04:02:47.01#ibcon#wrote, iclass 25, count 2 2006.229.04:02:47.01#ibcon#about to read 3, iclass 25, count 2 2006.229.04:02:47.04#ibcon#read 3, iclass 25, count 2 2006.229.04:02:47.04#ibcon#about to read 4, iclass 25, count 2 2006.229.04:02:47.04#ibcon#read 4, iclass 25, count 2 2006.229.04:02:47.04#ibcon#about to read 5, iclass 25, count 2 2006.229.04:02:47.04#ibcon#read 5, iclass 25, count 2 2006.229.04:02:47.04#ibcon#about to read 6, iclass 25, count 2 2006.229.04:02:47.04#ibcon#read 6, iclass 25, count 2 2006.229.04:02:47.04#ibcon#end of sib2, iclass 25, count 2 2006.229.04:02:47.04#ibcon#*after write, iclass 25, count 2 2006.229.04:02:47.04#ibcon#*before return 0, iclass 25, count 2 2006.229.04:02:47.04#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:47.04#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:47.04#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.04:02:47.04#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:47.04#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:47.16#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:47.16#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:47.16#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:02:47.16#ibcon#first serial, iclass 25, count 0 2006.229.04:02:47.16#ibcon#enter sib2, iclass 25, count 0 2006.229.04:02:47.16#ibcon#flushed, iclass 25, count 0 2006.229.04:02:47.16#ibcon#about to write, iclass 25, count 0 2006.229.04:02:47.16#ibcon#wrote, iclass 25, count 0 2006.229.04:02:47.16#ibcon#about to read 3, iclass 25, count 0 2006.229.04:02:47.18#ibcon#read 3, iclass 25, count 0 2006.229.04:02:47.18#ibcon#about to read 4, iclass 25, count 0 2006.229.04:02:47.18#ibcon#read 4, iclass 25, count 0 2006.229.04:02:47.18#ibcon#about to read 5, iclass 25, count 0 2006.229.04:02:47.18#ibcon#read 5, iclass 25, count 0 2006.229.04:02:47.18#ibcon#about to read 6, iclass 25, count 0 2006.229.04:02:47.18#ibcon#read 6, iclass 25, count 0 2006.229.04:02:47.18#ibcon#end of sib2, iclass 25, count 0 2006.229.04:02:47.18#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:02:47.18#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:02:47.18#ibcon#[25=USB\r\n] 2006.229.04:02:47.18#ibcon#*before write, iclass 25, count 0 2006.229.04:02:47.18#ibcon#enter sib2, iclass 25, count 0 2006.229.04:02:47.18#ibcon#flushed, iclass 25, count 0 2006.229.04:02:47.18#ibcon#about to write, iclass 25, count 0 2006.229.04:02:47.18#ibcon#wrote, iclass 25, count 0 2006.229.04:02:47.18#ibcon#about to read 3, iclass 25, count 0 2006.229.04:02:47.21#ibcon#read 3, iclass 25, count 0 2006.229.04:02:47.21#ibcon#about to read 4, iclass 25, count 0 2006.229.04:02:47.21#ibcon#read 4, iclass 25, count 0 2006.229.04:02:47.21#ibcon#about to read 5, iclass 25, count 0 2006.229.04:02:47.21#ibcon#read 5, iclass 25, count 0 2006.229.04:02:47.21#ibcon#about to read 6, iclass 25, count 0 2006.229.04:02:47.21#ibcon#read 6, iclass 25, count 0 2006.229.04:02:47.21#ibcon#end of sib2, iclass 25, count 0 2006.229.04:02:47.21#ibcon#*after write, iclass 25, count 0 2006.229.04:02:47.21#ibcon#*before return 0, iclass 25, count 0 2006.229.04:02:47.21#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:47.21#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:47.21#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:02:47.21#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:02:47.21$vck44/valo=4,624.99 2006.229.04:02:47.21#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.04:02:47.21#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.04:02:47.21#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:47.21#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:47.21#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:47.21#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:47.21#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:02:47.21#ibcon#first serial, iclass 27, count 0 2006.229.04:02:47.21#ibcon#enter sib2, iclass 27, count 0 2006.229.04:02:47.21#ibcon#flushed, iclass 27, count 0 2006.229.04:02:47.21#ibcon#about to write, iclass 27, count 0 2006.229.04:02:47.21#ibcon#wrote, iclass 27, count 0 2006.229.04:02:47.21#ibcon#about to read 3, iclass 27, count 0 2006.229.04:02:47.23#ibcon#read 3, iclass 27, count 0 2006.229.04:02:47.23#ibcon#about to read 4, iclass 27, count 0 2006.229.04:02:47.23#ibcon#read 4, iclass 27, count 0 2006.229.04:02:47.23#ibcon#about to read 5, iclass 27, count 0 2006.229.04:02:47.23#ibcon#read 5, iclass 27, count 0 2006.229.04:02:47.23#ibcon#about to read 6, iclass 27, count 0 2006.229.04:02:47.23#ibcon#read 6, iclass 27, count 0 2006.229.04:02:47.23#ibcon#end of sib2, iclass 27, count 0 2006.229.04:02:47.23#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:02:47.23#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:02:47.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:02:47.23#ibcon#*before write, iclass 27, count 0 2006.229.04:02:47.23#ibcon#enter sib2, iclass 27, count 0 2006.229.04:02:47.23#ibcon#flushed, iclass 27, count 0 2006.229.04:02:47.23#ibcon#about to write, iclass 27, count 0 2006.229.04:02:47.23#ibcon#wrote, iclass 27, count 0 2006.229.04:02:47.23#ibcon#about to read 3, iclass 27, count 0 2006.229.04:02:47.27#ibcon#read 3, iclass 27, count 0 2006.229.04:02:47.27#ibcon#about to read 4, iclass 27, count 0 2006.229.04:02:47.27#ibcon#read 4, iclass 27, count 0 2006.229.04:02:47.27#ibcon#about to read 5, iclass 27, count 0 2006.229.04:02:47.27#ibcon#read 5, iclass 27, count 0 2006.229.04:02:47.27#ibcon#about to read 6, iclass 27, count 0 2006.229.04:02:47.27#ibcon#read 6, iclass 27, count 0 2006.229.04:02:47.27#ibcon#end of sib2, iclass 27, count 0 2006.229.04:02:47.27#ibcon#*after write, iclass 27, count 0 2006.229.04:02:47.27#ibcon#*before return 0, iclass 27, count 0 2006.229.04:02:47.27#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:47.27#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:47.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:02:47.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:02:47.27$vck44/va=4,7 2006.229.04:02:47.27#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.04:02:47.27#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.04:02:47.27#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:47.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:47.33#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:47.33#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:47.33#ibcon#enter wrdev, iclass 29, count 2 2006.229.04:02:47.33#ibcon#first serial, iclass 29, count 2 2006.229.04:02:47.33#ibcon#enter sib2, iclass 29, count 2 2006.229.04:02:47.33#ibcon#flushed, iclass 29, count 2 2006.229.04:02:47.33#ibcon#about to write, iclass 29, count 2 2006.229.04:02:47.33#ibcon#wrote, iclass 29, count 2 2006.229.04:02:47.33#ibcon#about to read 3, iclass 29, count 2 2006.229.04:02:47.35#ibcon#read 3, iclass 29, count 2 2006.229.04:02:47.35#ibcon#about to read 4, iclass 29, count 2 2006.229.04:02:47.35#ibcon#read 4, iclass 29, count 2 2006.229.04:02:47.35#ibcon#about to read 5, iclass 29, count 2 2006.229.04:02:47.35#ibcon#read 5, iclass 29, count 2 2006.229.04:02:47.35#ibcon#about to read 6, iclass 29, count 2 2006.229.04:02:47.35#ibcon#read 6, iclass 29, count 2 2006.229.04:02:47.35#ibcon#end of sib2, iclass 29, count 2 2006.229.04:02:47.35#ibcon#*mode == 0, iclass 29, count 2 2006.229.04:02:47.35#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.04:02:47.35#ibcon#[25=AT04-07\r\n] 2006.229.04:02:47.35#ibcon#*before write, iclass 29, count 2 2006.229.04:02:47.35#ibcon#enter sib2, iclass 29, count 2 2006.229.04:02:47.35#ibcon#flushed, iclass 29, count 2 2006.229.04:02:47.35#ibcon#about to write, iclass 29, count 2 2006.229.04:02:47.35#ibcon#wrote, iclass 29, count 2 2006.229.04:02:47.35#ibcon#about to read 3, iclass 29, count 2 2006.229.04:02:47.38#ibcon#read 3, iclass 29, count 2 2006.229.04:02:47.38#ibcon#about to read 4, iclass 29, count 2 2006.229.04:02:47.38#ibcon#read 4, iclass 29, count 2 2006.229.04:02:47.38#ibcon#about to read 5, iclass 29, count 2 2006.229.04:02:47.38#ibcon#read 5, iclass 29, count 2 2006.229.04:02:47.38#ibcon#about to read 6, iclass 29, count 2 2006.229.04:02:47.38#ibcon#read 6, iclass 29, count 2 2006.229.04:02:47.38#ibcon#end of sib2, iclass 29, count 2 2006.229.04:02:47.38#ibcon#*after write, iclass 29, count 2 2006.229.04:02:47.38#ibcon#*before return 0, iclass 29, count 2 2006.229.04:02:47.38#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:47.38#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:47.38#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.04:02:47.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:47.38#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:47.50#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:47.50#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:47.50#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:02:47.50#ibcon#first serial, iclass 29, count 0 2006.229.04:02:47.50#ibcon#enter sib2, iclass 29, count 0 2006.229.04:02:47.50#ibcon#flushed, iclass 29, count 0 2006.229.04:02:47.50#ibcon#about to write, iclass 29, count 0 2006.229.04:02:47.50#ibcon#wrote, iclass 29, count 0 2006.229.04:02:47.50#ibcon#about to read 3, iclass 29, count 0 2006.229.04:02:47.52#ibcon#read 3, iclass 29, count 0 2006.229.04:02:47.52#ibcon#about to read 4, iclass 29, count 0 2006.229.04:02:47.52#ibcon#read 4, iclass 29, count 0 2006.229.04:02:47.52#ibcon#about to read 5, iclass 29, count 0 2006.229.04:02:47.52#ibcon#read 5, iclass 29, count 0 2006.229.04:02:47.52#ibcon#about to read 6, iclass 29, count 0 2006.229.04:02:47.52#ibcon#read 6, iclass 29, count 0 2006.229.04:02:47.52#ibcon#end of sib2, iclass 29, count 0 2006.229.04:02:47.52#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:02:47.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:02:47.52#ibcon#[25=USB\r\n] 2006.229.04:02:47.52#ibcon#*before write, iclass 29, count 0 2006.229.04:02:47.52#ibcon#enter sib2, iclass 29, count 0 2006.229.04:02:47.52#ibcon#flushed, iclass 29, count 0 2006.229.04:02:47.52#ibcon#about to write, iclass 29, count 0 2006.229.04:02:47.52#ibcon#wrote, iclass 29, count 0 2006.229.04:02:47.52#ibcon#about to read 3, iclass 29, count 0 2006.229.04:02:47.55#ibcon#read 3, iclass 29, count 0 2006.229.04:02:47.55#ibcon#about to read 4, iclass 29, count 0 2006.229.04:02:47.55#ibcon#read 4, iclass 29, count 0 2006.229.04:02:47.55#ibcon#about to read 5, iclass 29, count 0 2006.229.04:02:47.55#ibcon#read 5, iclass 29, count 0 2006.229.04:02:47.55#ibcon#about to read 6, iclass 29, count 0 2006.229.04:02:47.55#ibcon#read 6, iclass 29, count 0 2006.229.04:02:47.55#ibcon#end of sib2, iclass 29, count 0 2006.229.04:02:47.55#ibcon#*after write, iclass 29, count 0 2006.229.04:02:47.55#ibcon#*before return 0, iclass 29, count 0 2006.229.04:02:47.55#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:47.55#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:47.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:02:47.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:02:47.55$vck44/valo=5,734.99 2006.229.04:02:47.55#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.04:02:47.55#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.04:02:47.55#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:47.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:47.55#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:47.55#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:47.55#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:02:47.55#ibcon#first serial, iclass 31, count 0 2006.229.04:02:47.55#ibcon#enter sib2, iclass 31, count 0 2006.229.04:02:47.55#ibcon#flushed, iclass 31, count 0 2006.229.04:02:47.55#ibcon#about to write, iclass 31, count 0 2006.229.04:02:47.55#ibcon#wrote, iclass 31, count 0 2006.229.04:02:47.55#ibcon#about to read 3, iclass 31, count 0 2006.229.04:02:47.57#ibcon#read 3, iclass 31, count 0 2006.229.04:02:47.57#ibcon#about to read 4, iclass 31, count 0 2006.229.04:02:47.57#ibcon#read 4, iclass 31, count 0 2006.229.04:02:47.57#ibcon#about to read 5, iclass 31, count 0 2006.229.04:02:47.57#ibcon#read 5, iclass 31, count 0 2006.229.04:02:47.57#ibcon#about to read 6, iclass 31, count 0 2006.229.04:02:47.57#ibcon#read 6, iclass 31, count 0 2006.229.04:02:47.57#ibcon#end of sib2, iclass 31, count 0 2006.229.04:02:47.57#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:02:47.57#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:02:47.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:02:47.57#ibcon#*before write, iclass 31, count 0 2006.229.04:02:47.57#ibcon#enter sib2, iclass 31, count 0 2006.229.04:02:47.57#ibcon#flushed, iclass 31, count 0 2006.229.04:02:47.57#ibcon#about to write, iclass 31, count 0 2006.229.04:02:47.57#ibcon#wrote, iclass 31, count 0 2006.229.04:02:47.57#ibcon#about to read 3, iclass 31, count 0 2006.229.04:02:47.61#ibcon#read 3, iclass 31, count 0 2006.229.04:02:47.61#ibcon#about to read 4, iclass 31, count 0 2006.229.04:02:47.61#ibcon#read 4, iclass 31, count 0 2006.229.04:02:47.61#ibcon#about to read 5, iclass 31, count 0 2006.229.04:02:47.61#ibcon#read 5, iclass 31, count 0 2006.229.04:02:47.61#ibcon#about to read 6, iclass 31, count 0 2006.229.04:02:47.61#ibcon#read 6, iclass 31, count 0 2006.229.04:02:47.61#ibcon#end of sib2, iclass 31, count 0 2006.229.04:02:47.61#ibcon#*after write, iclass 31, count 0 2006.229.04:02:47.61#ibcon#*before return 0, iclass 31, count 0 2006.229.04:02:47.61#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:47.61#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:47.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:02:47.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:02:47.61$vck44/va=5,4 2006.229.04:02:47.61#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.04:02:47.61#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.04:02:47.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:47.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:47.67#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:47.67#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:47.67#ibcon#enter wrdev, iclass 33, count 2 2006.229.04:02:47.67#ibcon#first serial, iclass 33, count 2 2006.229.04:02:47.67#ibcon#enter sib2, iclass 33, count 2 2006.229.04:02:47.67#ibcon#flushed, iclass 33, count 2 2006.229.04:02:47.67#ibcon#about to write, iclass 33, count 2 2006.229.04:02:47.67#ibcon#wrote, iclass 33, count 2 2006.229.04:02:47.67#ibcon#about to read 3, iclass 33, count 2 2006.229.04:02:47.69#ibcon#read 3, iclass 33, count 2 2006.229.04:02:47.69#ibcon#about to read 4, iclass 33, count 2 2006.229.04:02:47.69#ibcon#read 4, iclass 33, count 2 2006.229.04:02:47.69#ibcon#about to read 5, iclass 33, count 2 2006.229.04:02:47.69#ibcon#read 5, iclass 33, count 2 2006.229.04:02:47.69#ibcon#about to read 6, iclass 33, count 2 2006.229.04:02:47.69#ibcon#read 6, iclass 33, count 2 2006.229.04:02:47.69#ibcon#end of sib2, iclass 33, count 2 2006.229.04:02:47.69#ibcon#*mode == 0, iclass 33, count 2 2006.229.04:02:47.69#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.04:02:47.69#ibcon#[25=AT05-04\r\n] 2006.229.04:02:47.69#ibcon#*before write, iclass 33, count 2 2006.229.04:02:47.69#ibcon#enter sib2, iclass 33, count 2 2006.229.04:02:47.69#ibcon#flushed, iclass 33, count 2 2006.229.04:02:47.69#ibcon#about to write, iclass 33, count 2 2006.229.04:02:47.69#ibcon#wrote, iclass 33, count 2 2006.229.04:02:47.69#ibcon#about to read 3, iclass 33, count 2 2006.229.04:02:47.72#ibcon#read 3, iclass 33, count 2 2006.229.04:02:47.72#ibcon#about to read 4, iclass 33, count 2 2006.229.04:02:47.72#ibcon#read 4, iclass 33, count 2 2006.229.04:02:47.72#ibcon#about to read 5, iclass 33, count 2 2006.229.04:02:47.72#ibcon#read 5, iclass 33, count 2 2006.229.04:02:47.72#ibcon#about to read 6, iclass 33, count 2 2006.229.04:02:47.72#ibcon#read 6, iclass 33, count 2 2006.229.04:02:47.72#ibcon#end of sib2, iclass 33, count 2 2006.229.04:02:47.72#ibcon#*after write, iclass 33, count 2 2006.229.04:02:47.72#ibcon#*before return 0, iclass 33, count 2 2006.229.04:02:47.72#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:47.72#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:47.72#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.04:02:47.72#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:47.72#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:47.84#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:47.84#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:47.84#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:02:47.84#ibcon#first serial, iclass 33, count 0 2006.229.04:02:47.84#ibcon#enter sib2, iclass 33, count 0 2006.229.04:02:47.84#ibcon#flushed, iclass 33, count 0 2006.229.04:02:47.84#ibcon#about to write, iclass 33, count 0 2006.229.04:02:47.84#ibcon#wrote, iclass 33, count 0 2006.229.04:02:47.84#ibcon#about to read 3, iclass 33, count 0 2006.229.04:02:47.86#ibcon#read 3, iclass 33, count 0 2006.229.04:02:47.86#ibcon#about to read 4, iclass 33, count 0 2006.229.04:02:47.86#ibcon#read 4, iclass 33, count 0 2006.229.04:02:47.86#ibcon#about to read 5, iclass 33, count 0 2006.229.04:02:47.86#ibcon#read 5, iclass 33, count 0 2006.229.04:02:47.86#ibcon#about to read 6, iclass 33, count 0 2006.229.04:02:47.86#ibcon#read 6, iclass 33, count 0 2006.229.04:02:47.86#ibcon#end of sib2, iclass 33, count 0 2006.229.04:02:47.86#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:02:47.86#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:02:47.86#ibcon#[25=USB\r\n] 2006.229.04:02:47.86#ibcon#*before write, iclass 33, count 0 2006.229.04:02:47.86#ibcon#enter sib2, iclass 33, count 0 2006.229.04:02:47.86#ibcon#flushed, iclass 33, count 0 2006.229.04:02:47.86#ibcon#about to write, iclass 33, count 0 2006.229.04:02:47.86#ibcon#wrote, iclass 33, count 0 2006.229.04:02:47.86#ibcon#about to read 3, iclass 33, count 0 2006.229.04:02:47.89#ibcon#read 3, iclass 33, count 0 2006.229.04:02:47.89#ibcon#about to read 4, iclass 33, count 0 2006.229.04:02:47.89#ibcon#read 4, iclass 33, count 0 2006.229.04:02:47.89#ibcon#about to read 5, iclass 33, count 0 2006.229.04:02:47.89#ibcon#read 5, iclass 33, count 0 2006.229.04:02:47.89#ibcon#about to read 6, iclass 33, count 0 2006.229.04:02:47.89#ibcon#read 6, iclass 33, count 0 2006.229.04:02:47.89#ibcon#end of sib2, iclass 33, count 0 2006.229.04:02:47.89#ibcon#*after write, iclass 33, count 0 2006.229.04:02:47.89#ibcon#*before return 0, iclass 33, count 0 2006.229.04:02:47.89#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:47.89#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:47.89#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:02:47.89#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:02:47.89$vck44/valo=6,814.99 2006.229.04:02:47.89#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.04:02:47.89#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.04:02:47.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:47.89#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:47.89#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:47.89#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:47.89#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:02:47.89#ibcon#first serial, iclass 35, count 0 2006.229.04:02:47.89#ibcon#enter sib2, iclass 35, count 0 2006.229.04:02:47.89#ibcon#flushed, iclass 35, count 0 2006.229.04:02:47.89#ibcon#about to write, iclass 35, count 0 2006.229.04:02:47.89#ibcon#wrote, iclass 35, count 0 2006.229.04:02:47.89#ibcon#about to read 3, iclass 35, count 0 2006.229.04:02:47.91#ibcon#read 3, iclass 35, count 0 2006.229.04:02:47.91#ibcon#about to read 4, iclass 35, count 0 2006.229.04:02:47.91#ibcon#read 4, iclass 35, count 0 2006.229.04:02:47.91#ibcon#about to read 5, iclass 35, count 0 2006.229.04:02:47.91#ibcon#read 5, iclass 35, count 0 2006.229.04:02:47.91#ibcon#about to read 6, iclass 35, count 0 2006.229.04:02:47.91#ibcon#read 6, iclass 35, count 0 2006.229.04:02:47.91#ibcon#end of sib2, iclass 35, count 0 2006.229.04:02:47.91#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:02:47.91#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:02:47.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:02:47.91#ibcon#*before write, iclass 35, count 0 2006.229.04:02:47.91#ibcon#enter sib2, iclass 35, count 0 2006.229.04:02:47.91#ibcon#flushed, iclass 35, count 0 2006.229.04:02:47.91#ibcon#about to write, iclass 35, count 0 2006.229.04:02:47.91#ibcon#wrote, iclass 35, count 0 2006.229.04:02:47.91#ibcon#about to read 3, iclass 35, count 0 2006.229.04:02:47.95#ibcon#read 3, iclass 35, count 0 2006.229.04:02:47.95#ibcon#about to read 4, iclass 35, count 0 2006.229.04:02:47.95#ibcon#read 4, iclass 35, count 0 2006.229.04:02:47.95#ibcon#about to read 5, iclass 35, count 0 2006.229.04:02:47.95#ibcon#read 5, iclass 35, count 0 2006.229.04:02:47.95#ibcon#about to read 6, iclass 35, count 0 2006.229.04:02:47.95#ibcon#read 6, iclass 35, count 0 2006.229.04:02:47.95#ibcon#end of sib2, iclass 35, count 0 2006.229.04:02:47.95#ibcon#*after write, iclass 35, count 0 2006.229.04:02:47.95#ibcon#*before return 0, iclass 35, count 0 2006.229.04:02:47.95#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:47.95#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:47.95#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:02:47.95#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:02:47.95$vck44/va=6,4 2006.229.04:02:47.95#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.04:02:47.95#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.04:02:47.95#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:47.95#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:48.01#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:48.01#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:48.01#ibcon#enter wrdev, iclass 37, count 2 2006.229.04:02:48.01#ibcon#first serial, iclass 37, count 2 2006.229.04:02:48.01#ibcon#enter sib2, iclass 37, count 2 2006.229.04:02:48.01#ibcon#flushed, iclass 37, count 2 2006.229.04:02:48.01#ibcon#about to write, iclass 37, count 2 2006.229.04:02:48.01#ibcon#wrote, iclass 37, count 2 2006.229.04:02:48.01#ibcon#about to read 3, iclass 37, count 2 2006.229.04:02:48.03#ibcon#read 3, iclass 37, count 2 2006.229.04:02:48.03#ibcon#about to read 4, iclass 37, count 2 2006.229.04:02:48.03#ibcon#read 4, iclass 37, count 2 2006.229.04:02:48.03#ibcon#about to read 5, iclass 37, count 2 2006.229.04:02:48.03#ibcon#read 5, iclass 37, count 2 2006.229.04:02:48.03#ibcon#about to read 6, iclass 37, count 2 2006.229.04:02:48.03#ibcon#read 6, iclass 37, count 2 2006.229.04:02:48.03#ibcon#end of sib2, iclass 37, count 2 2006.229.04:02:48.03#ibcon#*mode == 0, iclass 37, count 2 2006.229.04:02:48.03#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.04:02:48.03#ibcon#[25=AT06-04\r\n] 2006.229.04:02:48.03#ibcon#*before write, iclass 37, count 2 2006.229.04:02:48.03#ibcon#enter sib2, iclass 37, count 2 2006.229.04:02:48.03#ibcon#flushed, iclass 37, count 2 2006.229.04:02:48.03#ibcon#about to write, iclass 37, count 2 2006.229.04:02:48.03#ibcon#wrote, iclass 37, count 2 2006.229.04:02:48.03#ibcon#about to read 3, iclass 37, count 2 2006.229.04:02:48.06#ibcon#read 3, iclass 37, count 2 2006.229.04:02:48.06#ibcon#about to read 4, iclass 37, count 2 2006.229.04:02:48.06#ibcon#read 4, iclass 37, count 2 2006.229.04:02:48.06#ibcon#about to read 5, iclass 37, count 2 2006.229.04:02:48.06#ibcon#read 5, iclass 37, count 2 2006.229.04:02:48.06#ibcon#about to read 6, iclass 37, count 2 2006.229.04:02:48.06#ibcon#read 6, iclass 37, count 2 2006.229.04:02:48.06#ibcon#end of sib2, iclass 37, count 2 2006.229.04:02:48.06#ibcon#*after write, iclass 37, count 2 2006.229.04:02:48.06#ibcon#*before return 0, iclass 37, count 2 2006.229.04:02:48.06#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:48.06#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:48.06#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.04:02:48.06#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:48.06#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:48.18#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:48.18#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:48.18#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:02:48.18#ibcon#first serial, iclass 37, count 0 2006.229.04:02:48.18#ibcon#enter sib2, iclass 37, count 0 2006.229.04:02:48.18#ibcon#flushed, iclass 37, count 0 2006.229.04:02:48.18#ibcon#about to write, iclass 37, count 0 2006.229.04:02:48.18#ibcon#wrote, iclass 37, count 0 2006.229.04:02:48.18#ibcon#about to read 3, iclass 37, count 0 2006.229.04:02:48.20#ibcon#read 3, iclass 37, count 0 2006.229.04:02:48.20#ibcon#about to read 4, iclass 37, count 0 2006.229.04:02:48.20#ibcon#read 4, iclass 37, count 0 2006.229.04:02:48.20#ibcon#about to read 5, iclass 37, count 0 2006.229.04:02:48.20#ibcon#read 5, iclass 37, count 0 2006.229.04:02:48.20#ibcon#about to read 6, iclass 37, count 0 2006.229.04:02:48.20#ibcon#read 6, iclass 37, count 0 2006.229.04:02:48.20#ibcon#end of sib2, iclass 37, count 0 2006.229.04:02:48.20#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:02:48.20#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:02:48.20#ibcon#[25=USB\r\n] 2006.229.04:02:48.20#ibcon#*before write, iclass 37, count 0 2006.229.04:02:48.20#ibcon#enter sib2, iclass 37, count 0 2006.229.04:02:48.20#ibcon#flushed, iclass 37, count 0 2006.229.04:02:48.20#ibcon#about to write, iclass 37, count 0 2006.229.04:02:48.20#ibcon#wrote, iclass 37, count 0 2006.229.04:02:48.20#ibcon#about to read 3, iclass 37, count 0 2006.229.04:02:48.23#ibcon#read 3, iclass 37, count 0 2006.229.04:02:48.23#ibcon#about to read 4, iclass 37, count 0 2006.229.04:02:48.23#ibcon#read 4, iclass 37, count 0 2006.229.04:02:48.23#ibcon#about to read 5, iclass 37, count 0 2006.229.04:02:48.23#ibcon#read 5, iclass 37, count 0 2006.229.04:02:48.23#ibcon#about to read 6, iclass 37, count 0 2006.229.04:02:48.23#ibcon#read 6, iclass 37, count 0 2006.229.04:02:48.23#ibcon#end of sib2, iclass 37, count 0 2006.229.04:02:48.23#ibcon#*after write, iclass 37, count 0 2006.229.04:02:48.23#ibcon#*before return 0, iclass 37, count 0 2006.229.04:02:48.23#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:48.23#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:48.23#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:02:48.23#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:02:48.23$vck44/valo=7,864.99 2006.229.04:02:48.23#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.04:02:48.23#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.04:02:48.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:48.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:48.23#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:48.23#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:48.23#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:02:48.23#ibcon#first serial, iclass 39, count 0 2006.229.04:02:48.23#ibcon#enter sib2, iclass 39, count 0 2006.229.04:02:48.23#ibcon#flushed, iclass 39, count 0 2006.229.04:02:48.23#ibcon#about to write, iclass 39, count 0 2006.229.04:02:48.23#ibcon#wrote, iclass 39, count 0 2006.229.04:02:48.23#ibcon#about to read 3, iclass 39, count 0 2006.229.04:02:48.25#ibcon#read 3, iclass 39, count 0 2006.229.04:02:48.25#ibcon#about to read 4, iclass 39, count 0 2006.229.04:02:48.25#ibcon#read 4, iclass 39, count 0 2006.229.04:02:48.25#ibcon#about to read 5, iclass 39, count 0 2006.229.04:02:48.25#ibcon#read 5, iclass 39, count 0 2006.229.04:02:48.25#ibcon#about to read 6, iclass 39, count 0 2006.229.04:02:48.25#ibcon#read 6, iclass 39, count 0 2006.229.04:02:48.25#ibcon#end of sib2, iclass 39, count 0 2006.229.04:02:48.25#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:02:48.25#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:02:48.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:02:48.25#ibcon#*before write, iclass 39, count 0 2006.229.04:02:48.25#ibcon#enter sib2, iclass 39, count 0 2006.229.04:02:48.25#ibcon#flushed, iclass 39, count 0 2006.229.04:02:48.25#ibcon#about to write, iclass 39, count 0 2006.229.04:02:48.25#ibcon#wrote, iclass 39, count 0 2006.229.04:02:48.25#ibcon#about to read 3, iclass 39, count 0 2006.229.04:02:48.29#ibcon#read 3, iclass 39, count 0 2006.229.04:02:48.29#ibcon#about to read 4, iclass 39, count 0 2006.229.04:02:48.29#ibcon#read 4, iclass 39, count 0 2006.229.04:02:48.29#ibcon#about to read 5, iclass 39, count 0 2006.229.04:02:48.29#ibcon#read 5, iclass 39, count 0 2006.229.04:02:48.29#ibcon#about to read 6, iclass 39, count 0 2006.229.04:02:48.29#ibcon#read 6, iclass 39, count 0 2006.229.04:02:48.29#ibcon#end of sib2, iclass 39, count 0 2006.229.04:02:48.29#ibcon#*after write, iclass 39, count 0 2006.229.04:02:48.29#ibcon#*before return 0, iclass 39, count 0 2006.229.04:02:48.29#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:48.29#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:48.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:02:48.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:02:48.29$vck44/va=7,5 2006.229.04:02:48.29#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.04:02:48.29#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.04:02:48.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:48.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:48.35#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:48.35#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:48.35#ibcon#enter wrdev, iclass 3, count 2 2006.229.04:02:48.35#ibcon#first serial, iclass 3, count 2 2006.229.04:02:48.35#ibcon#enter sib2, iclass 3, count 2 2006.229.04:02:48.35#ibcon#flushed, iclass 3, count 2 2006.229.04:02:48.35#ibcon#about to write, iclass 3, count 2 2006.229.04:02:48.35#ibcon#wrote, iclass 3, count 2 2006.229.04:02:48.35#ibcon#about to read 3, iclass 3, count 2 2006.229.04:02:48.37#ibcon#read 3, iclass 3, count 2 2006.229.04:02:48.37#ibcon#about to read 4, iclass 3, count 2 2006.229.04:02:48.37#ibcon#read 4, iclass 3, count 2 2006.229.04:02:48.37#ibcon#about to read 5, iclass 3, count 2 2006.229.04:02:48.37#ibcon#read 5, iclass 3, count 2 2006.229.04:02:48.37#ibcon#about to read 6, iclass 3, count 2 2006.229.04:02:48.37#ibcon#read 6, iclass 3, count 2 2006.229.04:02:48.37#ibcon#end of sib2, iclass 3, count 2 2006.229.04:02:48.37#ibcon#*mode == 0, iclass 3, count 2 2006.229.04:02:48.37#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.04:02:48.37#ibcon#[25=AT07-05\r\n] 2006.229.04:02:48.37#ibcon#*before write, iclass 3, count 2 2006.229.04:02:48.37#ibcon#enter sib2, iclass 3, count 2 2006.229.04:02:48.37#ibcon#flushed, iclass 3, count 2 2006.229.04:02:48.37#ibcon#about to write, iclass 3, count 2 2006.229.04:02:48.37#ibcon#wrote, iclass 3, count 2 2006.229.04:02:48.37#ibcon#about to read 3, iclass 3, count 2 2006.229.04:02:48.40#ibcon#read 3, iclass 3, count 2 2006.229.04:02:48.40#ibcon#about to read 4, iclass 3, count 2 2006.229.04:02:48.40#ibcon#read 4, iclass 3, count 2 2006.229.04:02:48.40#ibcon#about to read 5, iclass 3, count 2 2006.229.04:02:48.40#ibcon#read 5, iclass 3, count 2 2006.229.04:02:48.40#ibcon#about to read 6, iclass 3, count 2 2006.229.04:02:48.40#ibcon#read 6, iclass 3, count 2 2006.229.04:02:48.40#ibcon#end of sib2, iclass 3, count 2 2006.229.04:02:48.40#ibcon#*after write, iclass 3, count 2 2006.229.04:02:48.40#ibcon#*before return 0, iclass 3, count 2 2006.229.04:02:48.40#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:48.40#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:48.40#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.04:02:48.40#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:48.40#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:48.51#abcon#<5=/04 2.4 4.0 30.14 941000.4\r\n> 2006.229.04:02:48.52#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:48.52#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:48.52#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:02:48.52#ibcon#first serial, iclass 3, count 0 2006.229.04:02:48.52#ibcon#enter sib2, iclass 3, count 0 2006.229.04:02:48.52#ibcon#flushed, iclass 3, count 0 2006.229.04:02:48.52#ibcon#about to write, iclass 3, count 0 2006.229.04:02:48.52#ibcon#wrote, iclass 3, count 0 2006.229.04:02:48.52#ibcon#about to read 3, iclass 3, count 0 2006.229.04:02:48.53#abcon#{5=INTERFACE CLEAR} 2006.229.04:02:48.54#ibcon#read 3, iclass 3, count 0 2006.229.04:02:48.54#ibcon#about to read 4, iclass 3, count 0 2006.229.04:02:48.54#ibcon#read 4, iclass 3, count 0 2006.229.04:02:48.54#ibcon#about to read 5, iclass 3, count 0 2006.229.04:02:48.54#ibcon#read 5, iclass 3, count 0 2006.229.04:02:48.54#ibcon#about to read 6, iclass 3, count 0 2006.229.04:02:48.54#ibcon#read 6, iclass 3, count 0 2006.229.04:02:48.54#ibcon#end of sib2, iclass 3, count 0 2006.229.04:02:48.54#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:02:48.54#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:02:48.54#ibcon#[25=USB\r\n] 2006.229.04:02:48.54#ibcon#*before write, iclass 3, count 0 2006.229.04:02:48.54#ibcon#enter sib2, iclass 3, count 0 2006.229.04:02:48.54#ibcon#flushed, iclass 3, count 0 2006.229.04:02:48.54#ibcon#about to write, iclass 3, count 0 2006.229.04:02:48.54#ibcon#wrote, iclass 3, count 0 2006.229.04:02:48.54#ibcon#about to read 3, iclass 3, count 0 2006.229.04:02:48.57#ibcon#read 3, iclass 3, count 0 2006.229.04:02:48.57#ibcon#about to read 4, iclass 3, count 0 2006.229.04:02:48.57#ibcon#read 4, iclass 3, count 0 2006.229.04:02:48.57#ibcon#about to read 5, iclass 3, count 0 2006.229.04:02:48.57#ibcon#read 5, iclass 3, count 0 2006.229.04:02:48.57#ibcon#about to read 6, iclass 3, count 0 2006.229.04:02:48.57#ibcon#read 6, iclass 3, count 0 2006.229.04:02:48.57#ibcon#end of sib2, iclass 3, count 0 2006.229.04:02:48.57#ibcon#*after write, iclass 3, count 0 2006.229.04:02:48.57#ibcon#*before return 0, iclass 3, count 0 2006.229.04:02:48.57#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:48.57#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:48.57#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:02:48.57#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:02:48.57$vck44/valo=8,884.99 2006.229.04:02:48.57#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:02:48.57#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:02:48.57#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:48.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:02:48.57#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:02:48.57#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:02:48.57#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:02:48.57#ibcon#first serial, iclass 10, count 0 2006.229.04:02:48.57#ibcon#enter sib2, iclass 10, count 0 2006.229.04:02:48.57#ibcon#flushed, iclass 10, count 0 2006.229.04:02:48.57#ibcon#about to write, iclass 10, count 0 2006.229.04:02:48.57#ibcon#wrote, iclass 10, count 0 2006.229.04:02:48.57#ibcon#about to read 3, iclass 10, count 0 2006.229.04:02:48.59#ibcon#read 3, iclass 10, count 0 2006.229.04:02:48.59#ibcon#about to read 4, iclass 10, count 0 2006.229.04:02:48.59#ibcon#read 4, iclass 10, count 0 2006.229.04:02:48.59#ibcon#about to read 5, iclass 10, count 0 2006.229.04:02:48.59#ibcon#read 5, iclass 10, count 0 2006.229.04:02:48.59#ibcon#about to read 6, iclass 10, count 0 2006.229.04:02:48.59#ibcon#read 6, iclass 10, count 0 2006.229.04:02:48.59#ibcon#end of sib2, iclass 10, count 0 2006.229.04:02:48.59#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:02:48.59#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:02:48.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:02:48.59#ibcon#*before write, iclass 10, count 0 2006.229.04:02:48.59#ibcon#enter sib2, iclass 10, count 0 2006.229.04:02:48.59#ibcon#flushed, iclass 10, count 0 2006.229.04:02:48.59#ibcon#about to write, iclass 10, count 0 2006.229.04:02:48.59#ibcon#wrote, iclass 10, count 0 2006.229.04:02:48.59#ibcon#about to read 3, iclass 10, count 0 2006.229.04:02:48.59#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:02:48.63#ibcon#read 3, iclass 10, count 0 2006.229.04:02:48.63#ibcon#about to read 4, iclass 10, count 0 2006.229.04:02:48.63#ibcon#read 4, iclass 10, count 0 2006.229.04:02:48.63#ibcon#about to read 5, iclass 10, count 0 2006.229.04:02:48.63#ibcon#read 5, iclass 10, count 0 2006.229.04:02:48.63#ibcon#about to read 6, iclass 10, count 0 2006.229.04:02:48.63#ibcon#read 6, iclass 10, count 0 2006.229.04:02:48.63#ibcon#end of sib2, iclass 10, count 0 2006.229.04:02:48.63#ibcon#*after write, iclass 10, count 0 2006.229.04:02:48.63#ibcon#*before return 0, iclass 10, count 0 2006.229.04:02:48.63#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:02:48.63#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:02:48.63#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:02:48.63#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:02:48.63$vck44/va=8,6 2006.229.04:02:48.63#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.04:02:48.63#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.04:02:48.63#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:48.63#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:02:48.69#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:02:48.69#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:02:48.69#ibcon#enter wrdev, iclass 13, count 2 2006.229.04:02:48.69#ibcon#first serial, iclass 13, count 2 2006.229.04:02:48.69#ibcon#enter sib2, iclass 13, count 2 2006.229.04:02:48.69#ibcon#flushed, iclass 13, count 2 2006.229.04:02:48.69#ibcon#about to write, iclass 13, count 2 2006.229.04:02:48.69#ibcon#wrote, iclass 13, count 2 2006.229.04:02:48.69#ibcon#about to read 3, iclass 13, count 2 2006.229.04:02:48.71#ibcon#read 3, iclass 13, count 2 2006.229.04:02:48.71#ibcon#about to read 4, iclass 13, count 2 2006.229.04:02:48.71#ibcon#read 4, iclass 13, count 2 2006.229.04:02:48.71#ibcon#about to read 5, iclass 13, count 2 2006.229.04:02:48.71#ibcon#read 5, iclass 13, count 2 2006.229.04:02:48.71#ibcon#about to read 6, iclass 13, count 2 2006.229.04:02:48.71#ibcon#read 6, iclass 13, count 2 2006.229.04:02:48.71#ibcon#end of sib2, iclass 13, count 2 2006.229.04:02:48.71#ibcon#*mode == 0, iclass 13, count 2 2006.229.04:02:48.71#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.04:02:48.71#ibcon#[25=AT08-06\r\n] 2006.229.04:02:48.71#ibcon#*before write, iclass 13, count 2 2006.229.04:02:48.71#ibcon#enter sib2, iclass 13, count 2 2006.229.04:02:48.71#ibcon#flushed, iclass 13, count 2 2006.229.04:02:48.71#ibcon#about to write, iclass 13, count 2 2006.229.04:02:48.71#ibcon#wrote, iclass 13, count 2 2006.229.04:02:48.71#ibcon#about to read 3, iclass 13, count 2 2006.229.04:02:48.74#ibcon#read 3, iclass 13, count 2 2006.229.04:02:48.74#ibcon#about to read 4, iclass 13, count 2 2006.229.04:02:48.74#ibcon#read 4, iclass 13, count 2 2006.229.04:02:48.74#ibcon#about to read 5, iclass 13, count 2 2006.229.04:02:48.74#ibcon#read 5, iclass 13, count 2 2006.229.04:02:48.74#ibcon#about to read 6, iclass 13, count 2 2006.229.04:02:48.74#ibcon#read 6, iclass 13, count 2 2006.229.04:02:48.74#ibcon#end of sib2, iclass 13, count 2 2006.229.04:02:48.74#ibcon#*after write, iclass 13, count 2 2006.229.04:02:48.74#ibcon#*before return 0, iclass 13, count 2 2006.229.04:02:48.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:02:48.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:02:48.74#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.04:02:48.74#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:48.74#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:02:48.86#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:02:48.86#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:02:48.86#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:02:48.86#ibcon#first serial, iclass 13, count 0 2006.229.04:02:48.86#ibcon#enter sib2, iclass 13, count 0 2006.229.04:02:48.86#ibcon#flushed, iclass 13, count 0 2006.229.04:02:48.86#ibcon#about to write, iclass 13, count 0 2006.229.04:02:48.86#ibcon#wrote, iclass 13, count 0 2006.229.04:02:48.86#ibcon#about to read 3, iclass 13, count 0 2006.229.04:02:48.88#ibcon#read 3, iclass 13, count 0 2006.229.04:02:48.88#ibcon#about to read 4, iclass 13, count 0 2006.229.04:02:48.88#ibcon#read 4, iclass 13, count 0 2006.229.04:02:48.88#ibcon#about to read 5, iclass 13, count 0 2006.229.04:02:48.88#ibcon#read 5, iclass 13, count 0 2006.229.04:02:48.88#ibcon#about to read 6, iclass 13, count 0 2006.229.04:02:48.88#ibcon#read 6, iclass 13, count 0 2006.229.04:02:48.88#ibcon#end of sib2, iclass 13, count 0 2006.229.04:02:48.88#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:02:48.88#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:02:48.88#ibcon#[25=USB\r\n] 2006.229.04:02:48.88#ibcon#*before write, iclass 13, count 0 2006.229.04:02:48.88#ibcon#enter sib2, iclass 13, count 0 2006.229.04:02:48.88#ibcon#flushed, iclass 13, count 0 2006.229.04:02:48.88#ibcon#about to write, iclass 13, count 0 2006.229.04:02:48.88#ibcon#wrote, iclass 13, count 0 2006.229.04:02:48.88#ibcon#about to read 3, iclass 13, count 0 2006.229.04:02:48.91#ibcon#read 3, iclass 13, count 0 2006.229.04:02:48.91#ibcon#about to read 4, iclass 13, count 0 2006.229.04:02:48.91#ibcon#read 4, iclass 13, count 0 2006.229.04:02:48.91#ibcon#about to read 5, iclass 13, count 0 2006.229.04:02:48.91#ibcon#read 5, iclass 13, count 0 2006.229.04:02:48.91#ibcon#about to read 6, iclass 13, count 0 2006.229.04:02:48.91#ibcon#read 6, iclass 13, count 0 2006.229.04:02:48.91#ibcon#end of sib2, iclass 13, count 0 2006.229.04:02:48.91#ibcon#*after write, iclass 13, count 0 2006.229.04:02:48.91#ibcon#*before return 0, iclass 13, count 0 2006.229.04:02:48.91#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:02:48.91#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:02:48.91#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:02:48.91#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:02:48.91$vck44/vblo=1,629.99 2006.229.04:02:48.91#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.04:02:48.91#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.04:02:48.91#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:48.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:48.91#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:48.91#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:48.91#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:02:48.91#ibcon#first serial, iclass 15, count 0 2006.229.04:02:48.91#ibcon#enter sib2, iclass 15, count 0 2006.229.04:02:48.91#ibcon#flushed, iclass 15, count 0 2006.229.04:02:48.91#ibcon#about to write, iclass 15, count 0 2006.229.04:02:48.91#ibcon#wrote, iclass 15, count 0 2006.229.04:02:48.91#ibcon#about to read 3, iclass 15, count 0 2006.229.04:02:48.93#ibcon#read 3, iclass 15, count 0 2006.229.04:02:48.93#ibcon#about to read 4, iclass 15, count 0 2006.229.04:02:48.93#ibcon#read 4, iclass 15, count 0 2006.229.04:02:48.93#ibcon#about to read 5, iclass 15, count 0 2006.229.04:02:48.93#ibcon#read 5, iclass 15, count 0 2006.229.04:02:48.93#ibcon#about to read 6, iclass 15, count 0 2006.229.04:02:48.93#ibcon#read 6, iclass 15, count 0 2006.229.04:02:48.93#ibcon#end of sib2, iclass 15, count 0 2006.229.04:02:48.93#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:02:48.93#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:02:48.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:02:48.93#ibcon#*before write, iclass 15, count 0 2006.229.04:02:48.93#ibcon#enter sib2, iclass 15, count 0 2006.229.04:02:48.93#ibcon#flushed, iclass 15, count 0 2006.229.04:02:48.93#ibcon#about to write, iclass 15, count 0 2006.229.04:02:48.93#ibcon#wrote, iclass 15, count 0 2006.229.04:02:48.93#ibcon#about to read 3, iclass 15, count 0 2006.229.04:02:48.97#ibcon#read 3, iclass 15, count 0 2006.229.04:02:48.97#ibcon#about to read 4, iclass 15, count 0 2006.229.04:02:48.97#ibcon#read 4, iclass 15, count 0 2006.229.04:02:48.97#ibcon#about to read 5, iclass 15, count 0 2006.229.04:02:48.97#ibcon#read 5, iclass 15, count 0 2006.229.04:02:48.97#ibcon#about to read 6, iclass 15, count 0 2006.229.04:02:48.97#ibcon#read 6, iclass 15, count 0 2006.229.04:02:48.97#ibcon#end of sib2, iclass 15, count 0 2006.229.04:02:48.97#ibcon#*after write, iclass 15, count 0 2006.229.04:02:48.97#ibcon#*before return 0, iclass 15, count 0 2006.229.04:02:48.97#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:48.97#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:02:48.97#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:02:48.97#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:02:48.97$vck44/vb=1,4 2006.229.04:02:48.97#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.04:02:48.97#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.04:02:48.97#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:48.97#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:48.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:48.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:48.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.04:02:48.97#ibcon#first serial, iclass 17, count 2 2006.229.04:02:48.97#ibcon#enter sib2, iclass 17, count 2 2006.229.04:02:48.97#ibcon#flushed, iclass 17, count 2 2006.229.04:02:48.97#ibcon#about to write, iclass 17, count 2 2006.229.04:02:48.97#ibcon#wrote, iclass 17, count 2 2006.229.04:02:48.97#ibcon#about to read 3, iclass 17, count 2 2006.229.04:02:48.99#ibcon#read 3, iclass 17, count 2 2006.229.04:02:48.99#ibcon#about to read 4, iclass 17, count 2 2006.229.04:02:48.99#ibcon#read 4, iclass 17, count 2 2006.229.04:02:48.99#ibcon#about to read 5, iclass 17, count 2 2006.229.04:02:48.99#ibcon#read 5, iclass 17, count 2 2006.229.04:02:48.99#ibcon#about to read 6, iclass 17, count 2 2006.229.04:02:48.99#ibcon#read 6, iclass 17, count 2 2006.229.04:02:48.99#ibcon#end of sib2, iclass 17, count 2 2006.229.04:02:48.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.04:02:48.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.04:02:48.99#ibcon#[27=AT01-04\r\n] 2006.229.04:02:48.99#ibcon#*before write, iclass 17, count 2 2006.229.04:02:48.99#ibcon#enter sib2, iclass 17, count 2 2006.229.04:02:48.99#ibcon#flushed, iclass 17, count 2 2006.229.04:02:48.99#ibcon#about to write, iclass 17, count 2 2006.229.04:02:48.99#ibcon#wrote, iclass 17, count 2 2006.229.04:02:48.99#ibcon#about to read 3, iclass 17, count 2 2006.229.04:02:49.02#ibcon#read 3, iclass 17, count 2 2006.229.04:02:49.02#ibcon#about to read 4, iclass 17, count 2 2006.229.04:02:49.02#ibcon#read 4, iclass 17, count 2 2006.229.04:02:49.02#ibcon#about to read 5, iclass 17, count 2 2006.229.04:02:49.02#ibcon#read 5, iclass 17, count 2 2006.229.04:02:49.02#ibcon#about to read 6, iclass 17, count 2 2006.229.04:02:49.02#ibcon#read 6, iclass 17, count 2 2006.229.04:02:49.02#ibcon#end of sib2, iclass 17, count 2 2006.229.04:02:49.02#ibcon#*after write, iclass 17, count 2 2006.229.04:02:49.02#ibcon#*before return 0, iclass 17, count 2 2006.229.04:02:49.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:49.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:02:49.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.04:02:49.02#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:49.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:49.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:49.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:49.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:02:49.14#ibcon#first serial, iclass 17, count 0 2006.229.04:02:49.14#ibcon#enter sib2, iclass 17, count 0 2006.229.04:02:49.14#ibcon#flushed, iclass 17, count 0 2006.229.04:02:49.14#ibcon#about to write, iclass 17, count 0 2006.229.04:02:49.14#ibcon#wrote, iclass 17, count 0 2006.229.04:02:49.14#ibcon#about to read 3, iclass 17, count 0 2006.229.04:02:49.16#ibcon#read 3, iclass 17, count 0 2006.229.04:02:49.16#ibcon#about to read 4, iclass 17, count 0 2006.229.04:02:49.16#ibcon#read 4, iclass 17, count 0 2006.229.04:02:49.16#ibcon#about to read 5, iclass 17, count 0 2006.229.04:02:49.16#ibcon#read 5, iclass 17, count 0 2006.229.04:02:49.16#ibcon#about to read 6, iclass 17, count 0 2006.229.04:02:49.16#ibcon#read 6, iclass 17, count 0 2006.229.04:02:49.16#ibcon#end of sib2, iclass 17, count 0 2006.229.04:02:49.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:02:49.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:02:49.16#ibcon#[27=USB\r\n] 2006.229.04:02:49.16#ibcon#*before write, iclass 17, count 0 2006.229.04:02:49.16#ibcon#enter sib2, iclass 17, count 0 2006.229.04:02:49.16#ibcon#flushed, iclass 17, count 0 2006.229.04:02:49.16#ibcon#about to write, iclass 17, count 0 2006.229.04:02:49.16#ibcon#wrote, iclass 17, count 0 2006.229.04:02:49.16#ibcon#about to read 3, iclass 17, count 0 2006.229.04:02:49.19#ibcon#read 3, iclass 17, count 0 2006.229.04:02:49.19#ibcon#about to read 4, iclass 17, count 0 2006.229.04:02:49.19#ibcon#read 4, iclass 17, count 0 2006.229.04:02:49.19#ibcon#about to read 5, iclass 17, count 0 2006.229.04:02:49.19#ibcon#read 5, iclass 17, count 0 2006.229.04:02:49.19#ibcon#about to read 6, iclass 17, count 0 2006.229.04:02:49.19#ibcon#read 6, iclass 17, count 0 2006.229.04:02:49.19#ibcon#end of sib2, iclass 17, count 0 2006.229.04:02:49.19#ibcon#*after write, iclass 17, count 0 2006.229.04:02:49.19#ibcon#*before return 0, iclass 17, count 0 2006.229.04:02:49.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:49.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:02:49.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:02:49.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:02:49.19$vck44/vblo=2,634.99 2006.229.04:02:49.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.04:02:49.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.04:02:49.19#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:49.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:49.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:49.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:49.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:02:49.19#ibcon#first serial, iclass 19, count 0 2006.229.04:02:49.19#ibcon#enter sib2, iclass 19, count 0 2006.229.04:02:49.19#ibcon#flushed, iclass 19, count 0 2006.229.04:02:49.19#ibcon#about to write, iclass 19, count 0 2006.229.04:02:49.19#ibcon#wrote, iclass 19, count 0 2006.229.04:02:49.19#ibcon#about to read 3, iclass 19, count 0 2006.229.04:02:49.21#ibcon#read 3, iclass 19, count 0 2006.229.04:02:49.21#ibcon#about to read 4, iclass 19, count 0 2006.229.04:02:49.21#ibcon#read 4, iclass 19, count 0 2006.229.04:02:49.21#ibcon#about to read 5, iclass 19, count 0 2006.229.04:02:49.21#ibcon#read 5, iclass 19, count 0 2006.229.04:02:49.21#ibcon#about to read 6, iclass 19, count 0 2006.229.04:02:49.21#ibcon#read 6, iclass 19, count 0 2006.229.04:02:49.21#ibcon#end of sib2, iclass 19, count 0 2006.229.04:02:49.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:02:49.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:02:49.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:02:49.21#ibcon#*before write, iclass 19, count 0 2006.229.04:02:49.21#ibcon#enter sib2, iclass 19, count 0 2006.229.04:02:49.21#ibcon#flushed, iclass 19, count 0 2006.229.04:02:49.21#ibcon#about to write, iclass 19, count 0 2006.229.04:02:49.21#ibcon#wrote, iclass 19, count 0 2006.229.04:02:49.21#ibcon#about to read 3, iclass 19, count 0 2006.229.04:02:49.25#ibcon#read 3, iclass 19, count 0 2006.229.04:02:49.25#ibcon#about to read 4, iclass 19, count 0 2006.229.04:02:49.25#ibcon#read 4, iclass 19, count 0 2006.229.04:02:49.25#ibcon#about to read 5, iclass 19, count 0 2006.229.04:02:49.25#ibcon#read 5, iclass 19, count 0 2006.229.04:02:49.25#ibcon#about to read 6, iclass 19, count 0 2006.229.04:02:49.25#ibcon#read 6, iclass 19, count 0 2006.229.04:02:49.25#ibcon#end of sib2, iclass 19, count 0 2006.229.04:02:49.25#ibcon#*after write, iclass 19, count 0 2006.229.04:02:49.25#ibcon#*before return 0, iclass 19, count 0 2006.229.04:02:49.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:49.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:02:49.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:02:49.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:02:49.25$vck44/vb=2,4 2006.229.04:02:49.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.04:02:49.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.04:02:49.25#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:49.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:49.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:49.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:49.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.04:02:49.31#ibcon#first serial, iclass 21, count 2 2006.229.04:02:49.31#ibcon#enter sib2, iclass 21, count 2 2006.229.04:02:49.31#ibcon#flushed, iclass 21, count 2 2006.229.04:02:49.31#ibcon#about to write, iclass 21, count 2 2006.229.04:02:49.31#ibcon#wrote, iclass 21, count 2 2006.229.04:02:49.31#ibcon#about to read 3, iclass 21, count 2 2006.229.04:02:49.33#ibcon#read 3, iclass 21, count 2 2006.229.04:02:49.33#ibcon#about to read 4, iclass 21, count 2 2006.229.04:02:49.33#ibcon#read 4, iclass 21, count 2 2006.229.04:02:49.33#ibcon#about to read 5, iclass 21, count 2 2006.229.04:02:49.33#ibcon#read 5, iclass 21, count 2 2006.229.04:02:49.33#ibcon#about to read 6, iclass 21, count 2 2006.229.04:02:49.33#ibcon#read 6, iclass 21, count 2 2006.229.04:02:49.33#ibcon#end of sib2, iclass 21, count 2 2006.229.04:02:49.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.04:02:49.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.04:02:49.33#ibcon#[27=AT02-04\r\n] 2006.229.04:02:49.33#ibcon#*before write, iclass 21, count 2 2006.229.04:02:49.33#ibcon#enter sib2, iclass 21, count 2 2006.229.04:02:49.33#ibcon#flushed, iclass 21, count 2 2006.229.04:02:49.33#ibcon#about to write, iclass 21, count 2 2006.229.04:02:49.33#ibcon#wrote, iclass 21, count 2 2006.229.04:02:49.33#ibcon#about to read 3, iclass 21, count 2 2006.229.04:02:49.36#ibcon#read 3, iclass 21, count 2 2006.229.04:02:49.36#ibcon#about to read 4, iclass 21, count 2 2006.229.04:02:49.36#ibcon#read 4, iclass 21, count 2 2006.229.04:02:49.36#ibcon#about to read 5, iclass 21, count 2 2006.229.04:02:49.36#ibcon#read 5, iclass 21, count 2 2006.229.04:02:49.36#ibcon#about to read 6, iclass 21, count 2 2006.229.04:02:49.36#ibcon#read 6, iclass 21, count 2 2006.229.04:02:49.36#ibcon#end of sib2, iclass 21, count 2 2006.229.04:02:49.36#ibcon#*after write, iclass 21, count 2 2006.229.04:02:49.36#ibcon#*before return 0, iclass 21, count 2 2006.229.04:02:49.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:49.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:02:49.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.04:02:49.36#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:49.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:49.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:49.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:49.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:02:49.48#ibcon#first serial, iclass 21, count 0 2006.229.04:02:49.48#ibcon#enter sib2, iclass 21, count 0 2006.229.04:02:49.48#ibcon#flushed, iclass 21, count 0 2006.229.04:02:49.48#ibcon#about to write, iclass 21, count 0 2006.229.04:02:49.48#ibcon#wrote, iclass 21, count 0 2006.229.04:02:49.48#ibcon#about to read 3, iclass 21, count 0 2006.229.04:02:49.50#ibcon#read 3, iclass 21, count 0 2006.229.04:02:49.50#ibcon#about to read 4, iclass 21, count 0 2006.229.04:02:49.50#ibcon#read 4, iclass 21, count 0 2006.229.04:02:49.50#ibcon#about to read 5, iclass 21, count 0 2006.229.04:02:49.50#ibcon#read 5, iclass 21, count 0 2006.229.04:02:49.50#ibcon#about to read 6, iclass 21, count 0 2006.229.04:02:49.50#ibcon#read 6, iclass 21, count 0 2006.229.04:02:49.50#ibcon#end of sib2, iclass 21, count 0 2006.229.04:02:49.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:02:49.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:02:49.50#ibcon#[27=USB\r\n] 2006.229.04:02:49.50#ibcon#*before write, iclass 21, count 0 2006.229.04:02:49.50#ibcon#enter sib2, iclass 21, count 0 2006.229.04:02:49.50#ibcon#flushed, iclass 21, count 0 2006.229.04:02:49.50#ibcon#about to write, iclass 21, count 0 2006.229.04:02:49.50#ibcon#wrote, iclass 21, count 0 2006.229.04:02:49.50#ibcon#about to read 3, iclass 21, count 0 2006.229.04:02:49.53#ibcon#read 3, iclass 21, count 0 2006.229.04:02:49.53#ibcon#about to read 4, iclass 21, count 0 2006.229.04:02:49.53#ibcon#read 4, iclass 21, count 0 2006.229.04:02:49.53#ibcon#about to read 5, iclass 21, count 0 2006.229.04:02:49.53#ibcon#read 5, iclass 21, count 0 2006.229.04:02:49.53#ibcon#about to read 6, iclass 21, count 0 2006.229.04:02:49.53#ibcon#read 6, iclass 21, count 0 2006.229.04:02:49.53#ibcon#end of sib2, iclass 21, count 0 2006.229.04:02:49.53#ibcon#*after write, iclass 21, count 0 2006.229.04:02:49.53#ibcon#*before return 0, iclass 21, count 0 2006.229.04:02:49.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:49.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:02:49.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:02:49.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:02:49.53$vck44/vblo=3,649.99 2006.229.04:02:49.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.04:02:49.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.04:02:49.53#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:49.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:49.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:49.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:49.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:02:49.53#ibcon#first serial, iclass 23, count 0 2006.229.04:02:49.53#ibcon#enter sib2, iclass 23, count 0 2006.229.04:02:49.53#ibcon#flushed, iclass 23, count 0 2006.229.04:02:49.53#ibcon#about to write, iclass 23, count 0 2006.229.04:02:49.53#ibcon#wrote, iclass 23, count 0 2006.229.04:02:49.53#ibcon#about to read 3, iclass 23, count 0 2006.229.04:02:49.55#ibcon#read 3, iclass 23, count 0 2006.229.04:02:49.55#ibcon#about to read 4, iclass 23, count 0 2006.229.04:02:49.55#ibcon#read 4, iclass 23, count 0 2006.229.04:02:49.55#ibcon#about to read 5, iclass 23, count 0 2006.229.04:02:49.55#ibcon#read 5, iclass 23, count 0 2006.229.04:02:49.55#ibcon#about to read 6, iclass 23, count 0 2006.229.04:02:49.55#ibcon#read 6, iclass 23, count 0 2006.229.04:02:49.55#ibcon#end of sib2, iclass 23, count 0 2006.229.04:02:49.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:02:49.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:02:49.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:02:49.55#ibcon#*before write, iclass 23, count 0 2006.229.04:02:49.55#ibcon#enter sib2, iclass 23, count 0 2006.229.04:02:49.55#ibcon#flushed, iclass 23, count 0 2006.229.04:02:49.55#ibcon#about to write, iclass 23, count 0 2006.229.04:02:49.55#ibcon#wrote, iclass 23, count 0 2006.229.04:02:49.55#ibcon#about to read 3, iclass 23, count 0 2006.229.04:02:49.59#ibcon#read 3, iclass 23, count 0 2006.229.04:02:49.59#ibcon#about to read 4, iclass 23, count 0 2006.229.04:02:49.59#ibcon#read 4, iclass 23, count 0 2006.229.04:02:49.59#ibcon#about to read 5, iclass 23, count 0 2006.229.04:02:49.59#ibcon#read 5, iclass 23, count 0 2006.229.04:02:49.59#ibcon#about to read 6, iclass 23, count 0 2006.229.04:02:49.59#ibcon#read 6, iclass 23, count 0 2006.229.04:02:49.59#ibcon#end of sib2, iclass 23, count 0 2006.229.04:02:49.59#ibcon#*after write, iclass 23, count 0 2006.229.04:02:49.59#ibcon#*before return 0, iclass 23, count 0 2006.229.04:02:49.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:49.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:02:49.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:02:49.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:02:49.59$vck44/vb=3,4 2006.229.04:02:49.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.04:02:49.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.04:02:49.59#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:49.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:49.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:49.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:49.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.04:02:49.65#ibcon#first serial, iclass 25, count 2 2006.229.04:02:49.65#ibcon#enter sib2, iclass 25, count 2 2006.229.04:02:49.65#ibcon#flushed, iclass 25, count 2 2006.229.04:02:49.65#ibcon#about to write, iclass 25, count 2 2006.229.04:02:49.65#ibcon#wrote, iclass 25, count 2 2006.229.04:02:49.65#ibcon#about to read 3, iclass 25, count 2 2006.229.04:02:49.67#ibcon#read 3, iclass 25, count 2 2006.229.04:02:49.67#ibcon#about to read 4, iclass 25, count 2 2006.229.04:02:49.67#ibcon#read 4, iclass 25, count 2 2006.229.04:02:49.67#ibcon#about to read 5, iclass 25, count 2 2006.229.04:02:49.67#ibcon#read 5, iclass 25, count 2 2006.229.04:02:49.67#ibcon#about to read 6, iclass 25, count 2 2006.229.04:02:49.67#ibcon#read 6, iclass 25, count 2 2006.229.04:02:49.67#ibcon#end of sib2, iclass 25, count 2 2006.229.04:02:49.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.04:02:49.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.04:02:49.67#ibcon#[27=AT03-04\r\n] 2006.229.04:02:49.67#ibcon#*before write, iclass 25, count 2 2006.229.04:02:49.67#ibcon#enter sib2, iclass 25, count 2 2006.229.04:02:49.67#ibcon#flushed, iclass 25, count 2 2006.229.04:02:49.67#ibcon#about to write, iclass 25, count 2 2006.229.04:02:49.67#ibcon#wrote, iclass 25, count 2 2006.229.04:02:49.67#ibcon#about to read 3, iclass 25, count 2 2006.229.04:02:49.70#ibcon#read 3, iclass 25, count 2 2006.229.04:02:49.70#ibcon#about to read 4, iclass 25, count 2 2006.229.04:02:49.70#ibcon#read 4, iclass 25, count 2 2006.229.04:02:49.70#ibcon#about to read 5, iclass 25, count 2 2006.229.04:02:49.70#ibcon#read 5, iclass 25, count 2 2006.229.04:02:49.70#ibcon#about to read 6, iclass 25, count 2 2006.229.04:02:49.70#ibcon#read 6, iclass 25, count 2 2006.229.04:02:49.70#ibcon#end of sib2, iclass 25, count 2 2006.229.04:02:49.70#ibcon#*after write, iclass 25, count 2 2006.229.04:02:49.70#ibcon#*before return 0, iclass 25, count 2 2006.229.04:02:49.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:49.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:02:49.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.04:02:49.70#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:49.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:49.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:49.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:49.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:02:49.82#ibcon#first serial, iclass 25, count 0 2006.229.04:02:49.82#ibcon#enter sib2, iclass 25, count 0 2006.229.04:02:49.82#ibcon#flushed, iclass 25, count 0 2006.229.04:02:49.82#ibcon#about to write, iclass 25, count 0 2006.229.04:02:49.82#ibcon#wrote, iclass 25, count 0 2006.229.04:02:49.82#ibcon#about to read 3, iclass 25, count 0 2006.229.04:02:49.84#ibcon#read 3, iclass 25, count 0 2006.229.04:02:49.84#ibcon#about to read 4, iclass 25, count 0 2006.229.04:02:49.84#ibcon#read 4, iclass 25, count 0 2006.229.04:02:49.84#ibcon#about to read 5, iclass 25, count 0 2006.229.04:02:49.84#ibcon#read 5, iclass 25, count 0 2006.229.04:02:49.84#ibcon#about to read 6, iclass 25, count 0 2006.229.04:02:49.84#ibcon#read 6, iclass 25, count 0 2006.229.04:02:49.84#ibcon#end of sib2, iclass 25, count 0 2006.229.04:02:49.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:02:49.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:02:49.84#ibcon#[27=USB\r\n] 2006.229.04:02:49.84#ibcon#*before write, iclass 25, count 0 2006.229.04:02:49.84#ibcon#enter sib2, iclass 25, count 0 2006.229.04:02:49.84#ibcon#flushed, iclass 25, count 0 2006.229.04:02:49.84#ibcon#about to write, iclass 25, count 0 2006.229.04:02:49.84#ibcon#wrote, iclass 25, count 0 2006.229.04:02:49.84#ibcon#about to read 3, iclass 25, count 0 2006.229.04:02:49.87#ibcon#read 3, iclass 25, count 0 2006.229.04:02:49.87#ibcon#about to read 4, iclass 25, count 0 2006.229.04:02:49.87#ibcon#read 4, iclass 25, count 0 2006.229.04:02:49.87#ibcon#about to read 5, iclass 25, count 0 2006.229.04:02:49.87#ibcon#read 5, iclass 25, count 0 2006.229.04:02:49.87#ibcon#about to read 6, iclass 25, count 0 2006.229.04:02:49.87#ibcon#read 6, iclass 25, count 0 2006.229.04:02:49.87#ibcon#end of sib2, iclass 25, count 0 2006.229.04:02:49.87#ibcon#*after write, iclass 25, count 0 2006.229.04:02:49.87#ibcon#*before return 0, iclass 25, count 0 2006.229.04:02:49.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:49.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:02:49.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:02:49.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:02:49.87$vck44/vblo=4,679.99 2006.229.04:02:49.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.04:02:49.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.04:02:49.87#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:49.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:49.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:49.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:49.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:02:49.87#ibcon#first serial, iclass 27, count 0 2006.229.04:02:49.87#ibcon#enter sib2, iclass 27, count 0 2006.229.04:02:49.87#ibcon#flushed, iclass 27, count 0 2006.229.04:02:49.87#ibcon#about to write, iclass 27, count 0 2006.229.04:02:49.87#ibcon#wrote, iclass 27, count 0 2006.229.04:02:49.87#ibcon#about to read 3, iclass 27, count 0 2006.229.04:02:49.89#ibcon#read 3, iclass 27, count 0 2006.229.04:02:49.89#ibcon#about to read 4, iclass 27, count 0 2006.229.04:02:49.89#ibcon#read 4, iclass 27, count 0 2006.229.04:02:49.89#ibcon#about to read 5, iclass 27, count 0 2006.229.04:02:49.89#ibcon#read 5, iclass 27, count 0 2006.229.04:02:49.89#ibcon#about to read 6, iclass 27, count 0 2006.229.04:02:49.89#ibcon#read 6, iclass 27, count 0 2006.229.04:02:49.89#ibcon#end of sib2, iclass 27, count 0 2006.229.04:02:49.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:02:49.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:02:49.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:02:49.89#ibcon#*before write, iclass 27, count 0 2006.229.04:02:49.89#ibcon#enter sib2, iclass 27, count 0 2006.229.04:02:49.89#ibcon#flushed, iclass 27, count 0 2006.229.04:02:49.89#ibcon#about to write, iclass 27, count 0 2006.229.04:02:49.89#ibcon#wrote, iclass 27, count 0 2006.229.04:02:49.89#ibcon#about to read 3, iclass 27, count 0 2006.229.04:02:49.93#ibcon#read 3, iclass 27, count 0 2006.229.04:02:49.93#ibcon#about to read 4, iclass 27, count 0 2006.229.04:02:49.93#ibcon#read 4, iclass 27, count 0 2006.229.04:02:49.93#ibcon#about to read 5, iclass 27, count 0 2006.229.04:02:49.93#ibcon#read 5, iclass 27, count 0 2006.229.04:02:49.93#ibcon#about to read 6, iclass 27, count 0 2006.229.04:02:49.93#ibcon#read 6, iclass 27, count 0 2006.229.04:02:49.93#ibcon#end of sib2, iclass 27, count 0 2006.229.04:02:49.93#ibcon#*after write, iclass 27, count 0 2006.229.04:02:49.93#ibcon#*before return 0, iclass 27, count 0 2006.229.04:02:49.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:49.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:02:49.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:02:49.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:02:49.93$vck44/vb=4,4 2006.229.04:02:49.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.04:02:49.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.04:02:49.93#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:49.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:49.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:49.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:49.99#ibcon#enter wrdev, iclass 29, count 2 2006.229.04:02:49.99#ibcon#first serial, iclass 29, count 2 2006.229.04:02:49.99#ibcon#enter sib2, iclass 29, count 2 2006.229.04:02:49.99#ibcon#flushed, iclass 29, count 2 2006.229.04:02:49.99#ibcon#about to write, iclass 29, count 2 2006.229.04:02:49.99#ibcon#wrote, iclass 29, count 2 2006.229.04:02:49.99#ibcon#about to read 3, iclass 29, count 2 2006.229.04:02:50.01#ibcon#read 3, iclass 29, count 2 2006.229.04:02:50.01#ibcon#about to read 4, iclass 29, count 2 2006.229.04:02:50.01#ibcon#read 4, iclass 29, count 2 2006.229.04:02:50.01#ibcon#about to read 5, iclass 29, count 2 2006.229.04:02:50.01#ibcon#read 5, iclass 29, count 2 2006.229.04:02:50.01#ibcon#about to read 6, iclass 29, count 2 2006.229.04:02:50.01#ibcon#read 6, iclass 29, count 2 2006.229.04:02:50.01#ibcon#end of sib2, iclass 29, count 2 2006.229.04:02:50.01#ibcon#*mode == 0, iclass 29, count 2 2006.229.04:02:50.01#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.04:02:50.01#ibcon#[27=AT04-04\r\n] 2006.229.04:02:50.01#ibcon#*before write, iclass 29, count 2 2006.229.04:02:50.01#ibcon#enter sib2, iclass 29, count 2 2006.229.04:02:50.01#ibcon#flushed, iclass 29, count 2 2006.229.04:02:50.01#ibcon#about to write, iclass 29, count 2 2006.229.04:02:50.01#ibcon#wrote, iclass 29, count 2 2006.229.04:02:50.01#ibcon#about to read 3, iclass 29, count 2 2006.229.04:02:50.04#ibcon#read 3, iclass 29, count 2 2006.229.04:02:50.04#ibcon#about to read 4, iclass 29, count 2 2006.229.04:02:50.04#ibcon#read 4, iclass 29, count 2 2006.229.04:02:50.04#ibcon#about to read 5, iclass 29, count 2 2006.229.04:02:50.04#ibcon#read 5, iclass 29, count 2 2006.229.04:02:50.04#ibcon#about to read 6, iclass 29, count 2 2006.229.04:02:50.04#ibcon#read 6, iclass 29, count 2 2006.229.04:02:50.04#ibcon#end of sib2, iclass 29, count 2 2006.229.04:02:50.04#ibcon#*after write, iclass 29, count 2 2006.229.04:02:50.04#ibcon#*before return 0, iclass 29, count 2 2006.229.04:02:50.04#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:50.04#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:02:50.04#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.04:02:50.04#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:50.04#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:50.16#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:50.16#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:50.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:02:50.16#ibcon#first serial, iclass 29, count 0 2006.229.04:02:50.16#ibcon#enter sib2, iclass 29, count 0 2006.229.04:02:50.16#ibcon#flushed, iclass 29, count 0 2006.229.04:02:50.16#ibcon#about to write, iclass 29, count 0 2006.229.04:02:50.16#ibcon#wrote, iclass 29, count 0 2006.229.04:02:50.16#ibcon#about to read 3, iclass 29, count 0 2006.229.04:02:50.18#ibcon#read 3, iclass 29, count 0 2006.229.04:02:50.18#ibcon#about to read 4, iclass 29, count 0 2006.229.04:02:50.18#ibcon#read 4, iclass 29, count 0 2006.229.04:02:50.18#ibcon#about to read 5, iclass 29, count 0 2006.229.04:02:50.18#ibcon#read 5, iclass 29, count 0 2006.229.04:02:50.18#ibcon#about to read 6, iclass 29, count 0 2006.229.04:02:50.18#ibcon#read 6, iclass 29, count 0 2006.229.04:02:50.18#ibcon#end of sib2, iclass 29, count 0 2006.229.04:02:50.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:02:50.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:02:50.18#ibcon#[27=USB\r\n] 2006.229.04:02:50.18#ibcon#*before write, iclass 29, count 0 2006.229.04:02:50.18#ibcon#enter sib2, iclass 29, count 0 2006.229.04:02:50.18#ibcon#flushed, iclass 29, count 0 2006.229.04:02:50.18#ibcon#about to write, iclass 29, count 0 2006.229.04:02:50.18#ibcon#wrote, iclass 29, count 0 2006.229.04:02:50.18#ibcon#about to read 3, iclass 29, count 0 2006.229.04:02:50.21#ibcon#read 3, iclass 29, count 0 2006.229.04:02:50.21#ibcon#about to read 4, iclass 29, count 0 2006.229.04:02:50.21#ibcon#read 4, iclass 29, count 0 2006.229.04:02:50.21#ibcon#about to read 5, iclass 29, count 0 2006.229.04:02:50.21#ibcon#read 5, iclass 29, count 0 2006.229.04:02:50.21#ibcon#about to read 6, iclass 29, count 0 2006.229.04:02:50.21#ibcon#read 6, iclass 29, count 0 2006.229.04:02:50.21#ibcon#end of sib2, iclass 29, count 0 2006.229.04:02:50.21#ibcon#*after write, iclass 29, count 0 2006.229.04:02:50.21#ibcon#*before return 0, iclass 29, count 0 2006.229.04:02:50.21#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:50.21#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:02:50.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:02:50.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:02:50.21$vck44/vblo=5,709.99 2006.229.04:02:50.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.04:02:50.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.04:02:50.21#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:50.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:50.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:50.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:50.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:02:50.21#ibcon#first serial, iclass 31, count 0 2006.229.04:02:50.21#ibcon#enter sib2, iclass 31, count 0 2006.229.04:02:50.21#ibcon#flushed, iclass 31, count 0 2006.229.04:02:50.21#ibcon#about to write, iclass 31, count 0 2006.229.04:02:50.21#ibcon#wrote, iclass 31, count 0 2006.229.04:02:50.21#ibcon#about to read 3, iclass 31, count 0 2006.229.04:02:50.23#ibcon#read 3, iclass 31, count 0 2006.229.04:02:50.23#ibcon#about to read 4, iclass 31, count 0 2006.229.04:02:50.23#ibcon#read 4, iclass 31, count 0 2006.229.04:02:50.23#ibcon#about to read 5, iclass 31, count 0 2006.229.04:02:50.23#ibcon#read 5, iclass 31, count 0 2006.229.04:02:50.23#ibcon#about to read 6, iclass 31, count 0 2006.229.04:02:50.23#ibcon#read 6, iclass 31, count 0 2006.229.04:02:50.23#ibcon#end of sib2, iclass 31, count 0 2006.229.04:02:50.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:02:50.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:02:50.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:02:50.23#ibcon#*before write, iclass 31, count 0 2006.229.04:02:50.23#ibcon#enter sib2, iclass 31, count 0 2006.229.04:02:50.23#ibcon#flushed, iclass 31, count 0 2006.229.04:02:50.23#ibcon#about to write, iclass 31, count 0 2006.229.04:02:50.23#ibcon#wrote, iclass 31, count 0 2006.229.04:02:50.23#ibcon#about to read 3, iclass 31, count 0 2006.229.04:02:50.27#ibcon#read 3, iclass 31, count 0 2006.229.04:02:50.27#ibcon#about to read 4, iclass 31, count 0 2006.229.04:02:50.27#ibcon#read 4, iclass 31, count 0 2006.229.04:02:50.27#ibcon#about to read 5, iclass 31, count 0 2006.229.04:02:50.27#ibcon#read 5, iclass 31, count 0 2006.229.04:02:50.27#ibcon#about to read 6, iclass 31, count 0 2006.229.04:02:50.27#ibcon#read 6, iclass 31, count 0 2006.229.04:02:50.27#ibcon#end of sib2, iclass 31, count 0 2006.229.04:02:50.27#ibcon#*after write, iclass 31, count 0 2006.229.04:02:50.27#ibcon#*before return 0, iclass 31, count 0 2006.229.04:02:50.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:50.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:02:50.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:02:50.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:02:50.27$vck44/vb=5,4 2006.229.04:02:50.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.04:02:50.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.04:02:50.27#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:50.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:50.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:50.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:50.33#ibcon#enter wrdev, iclass 33, count 2 2006.229.04:02:50.33#ibcon#first serial, iclass 33, count 2 2006.229.04:02:50.33#ibcon#enter sib2, iclass 33, count 2 2006.229.04:02:50.33#ibcon#flushed, iclass 33, count 2 2006.229.04:02:50.33#ibcon#about to write, iclass 33, count 2 2006.229.04:02:50.33#ibcon#wrote, iclass 33, count 2 2006.229.04:02:50.33#ibcon#about to read 3, iclass 33, count 2 2006.229.04:02:50.35#ibcon#read 3, iclass 33, count 2 2006.229.04:02:50.35#ibcon#about to read 4, iclass 33, count 2 2006.229.04:02:50.35#ibcon#read 4, iclass 33, count 2 2006.229.04:02:50.35#ibcon#about to read 5, iclass 33, count 2 2006.229.04:02:50.35#ibcon#read 5, iclass 33, count 2 2006.229.04:02:50.35#ibcon#about to read 6, iclass 33, count 2 2006.229.04:02:50.35#ibcon#read 6, iclass 33, count 2 2006.229.04:02:50.35#ibcon#end of sib2, iclass 33, count 2 2006.229.04:02:50.35#ibcon#*mode == 0, iclass 33, count 2 2006.229.04:02:50.35#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.04:02:50.35#ibcon#[27=AT05-04\r\n] 2006.229.04:02:50.35#ibcon#*before write, iclass 33, count 2 2006.229.04:02:50.35#ibcon#enter sib2, iclass 33, count 2 2006.229.04:02:50.35#ibcon#flushed, iclass 33, count 2 2006.229.04:02:50.35#ibcon#about to write, iclass 33, count 2 2006.229.04:02:50.35#ibcon#wrote, iclass 33, count 2 2006.229.04:02:50.35#ibcon#about to read 3, iclass 33, count 2 2006.229.04:02:50.38#ibcon#read 3, iclass 33, count 2 2006.229.04:02:50.38#ibcon#about to read 4, iclass 33, count 2 2006.229.04:02:50.38#ibcon#read 4, iclass 33, count 2 2006.229.04:02:50.38#ibcon#about to read 5, iclass 33, count 2 2006.229.04:02:50.38#ibcon#read 5, iclass 33, count 2 2006.229.04:02:50.38#ibcon#about to read 6, iclass 33, count 2 2006.229.04:02:50.38#ibcon#read 6, iclass 33, count 2 2006.229.04:02:50.38#ibcon#end of sib2, iclass 33, count 2 2006.229.04:02:50.38#ibcon#*after write, iclass 33, count 2 2006.229.04:02:50.38#ibcon#*before return 0, iclass 33, count 2 2006.229.04:02:50.38#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:50.38#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:02:50.38#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.04:02:50.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:50.38#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:50.50#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:50.50#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:50.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:02:50.50#ibcon#first serial, iclass 33, count 0 2006.229.04:02:50.50#ibcon#enter sib2, iclass 33, count 0 2006.229.04:02:50.50#ibcon#flushed, iclass 33, count 0 2006.229.04:02:50.50#ibcon#about to write, iclass 33, count 0 2006.229.04:02:50.50#ibcon#wrote, iclass 33, count 0 2006.229.04:02:50.50#ibcon#about to read 3, iclass 33, count 0 2006.229.04:02:50.52#ibcon#read 3, iclass 33, count 0 2006.229.04:02:50.52#ibcon#about to read 4, iclass 33, count 0 2006.229.04:02:50.52#ibcon#read 4, iclass 33, count 0 2006.229.04:02:50.52#ibcon#about to read 5, iclass 33, count 0 2006.229.04:02:50.52#ibcon#read 5, iclass 33, count 0 2006.229.04:02:50.52#ibcon#about to read 6, iclass 33, count 0 2006.229.04:02:50.52#ibcon#read 6, iclass 33, count 0 2006.229.04:02:50.52#ibcon#end of sib2, iclass 33, count 0 2006.229.04:02:50.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:02:50.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:02:50.52#ibcon#[27=USB\r\n] 2006.229.04:02:50.52#ibcon#*before write, iclass 33, count 0 2006.229.04:02:50.52#ibcon#enter sib2, iclass 33, count 0 2006.229.04:02:50.52#ibcon#flushed, iclass 33, count 0 2006.229.04:02:50.52#ibcon#about to write, iclass 33, count 0 2006.229.04:02:50.52#ibcon#wrote, iclass 33, count 0 2006.229.04:02:50.52#ibcon#about to read 3, iclass 33, count 0 2006.229.04:02:50.55#ibcon#read 3, iclass 33, count 0 2006.229.04:02:50.55#ibcon#about to read 4, iclass 33, count 0 2006.229.04:02:50.55#ibcon#read 4, iclass 33, count 0 2006.229.04:02:50.55#ibcon#about to read 5, iclass 33, count 0 2006.229.04:02:50.55#ibcon#read 5, iclass 33, count 0 2006.229.04:02:50.55#ibcon#about to read 6, iclass 33, count 0 2006.229.04:02:50.55#ibcon#read 6, iclass 33, count 0 2006.229.04:02:50.55#ibcon#end of sib2, iclass 33, count 0 2006.229.04:02:50.55#ibcon#*after write, iclass 33, count 0 2006.229.04:02:50.55#ibcon#*before return 0, iclass 33, count 0 2006.229.04:02:50.55#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:50.55#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:02:50.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:02:50.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:02:50.55$vck44/vblo=6,719.99 2006.229.04:02:50.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.04:02:50.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.04:02:50.55#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:50.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:50.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:50.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:50.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:02:50.55#ibcon#first serial, iclass 35, count 0 2006.229.04:02:50.55#ibcon#enter sib2, iclass 35, count 0 2006.229.04:02:50.55#ibcon#flushed, iclass 35, count 0 2006.229.04:02:50.55#ibcon#about to write, iclass 35, count 0 2006.229.04:02:50.55#ibcon#wrote, iclass 35, count 0 2006.229.04:02:50.55#ibcon#about to read 3, iclass 35, count 0 2006.229.04:02:50.57#ibcon#read 3, iclass 35, count 0 2006.229.04:02:50.57#ibcon#about to read 4, iclass 35, count 0 2006.229.04:02:50.57#ibcon#read 4, iclass 35, count 0 2006.229.04:02:50.57#ibcon#about to read 5, iclass 35, count 0 2006.229.04:02:50.57#ibcon#read 5, iclass 35, count 0 2006.229.04:02:50.57#ibcon#about to read 6, iclass 35, count 0 2006.229.04:02:50.57#ibcon#read 6, iclass 35, count 0 2006.229.04:02:50.57#ibcon#end of sib2, iclass 35, count 0 2006.229.04:02:50.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:02:50.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:02:50.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:02:50.57#ibcon#*before write, iclass 35, count 0 2006.229.04:02:50.57#ibcon#enter sib2, iclass 35, count 0 2006.229.04:02:50.57#ibcon#flushed, iclass 35, count 0 2006.229.04:02:50.57#ibcon#about to write, iclass 35, count 0 2006.229.04:02:50.57#ibcon#wrote, iclass 35, count 0 2006.229.04:02:50.57#ibcon#about to read 3, iclass 35, count 0 2006.229.04:02:50.61#ibcon#read 3, iclass 35, count 0 2006.229.04:02:50.61#ibcon#about to read 4, iclass 35, count 0 2006.229.04:02:50.61#ibcon#read 4, iclass 35, count 0 2006.229.04:02:50.61#ibcon#about to read 5, iclass 35, count 0 2006.229.04:02:50.61#ibcon#read 5, iclass 35, count 0 2006.229.04:02:50.61#ibcon#about to read 6, iclass 35, count 0 2006.229.04:02:50.61#ibcon#read 6, iclass 35, count 0 2006.229.04:02:50.61#ibcon#end of sib2, iclass 35, count 0 2006.229.04:02:50.61#ibcon#*after write, iclass 35, count 0 2006.229.04:02:50.61#ibcon#*before return 0, iclass 35, count 0 2006.229.04:02:50.61#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:50.61#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:02:50.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:02:50.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:02:50.61$vck44/vb=6,4 2006.229.04:02:50.61#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.04:02:50.61#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.04:02:50.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:50.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:50.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:50.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:50.67#ibcon#enter wrdev, iclass 37, count 2 2006.229.04:02:50.67#ibcon#first serial, iclass 37, count 2 2006.229.04:02:50.67#ibcon#enter sib2, iclass 37, count 2 2006.229.04:02:50.67#ibcon#flushed, iclass 37, count 2 2006.229.04:02:50.67#ibcon#about to write, iclass 37, count 2 2006.229.04:02:50.67#ibcon#wrote, iclass 37, count 2 2006.229.04:02:50.67#ibcon#about to read 3, iclass 37, count 2 2006.229.04:02:50.69#ibcon#read 3, iclass 37, count 2 2006.229.04:02:50.69#ibcon#about to read 4, iclass 37, count 2 2006.229.04:02:50.69#ibcon#read 4, iclass 37, count 2 2006.229.04:02:50.69#ibcon#about to read 5, iclass 37, count 2 2006.229.04:02:50.69#ibcon#read 5, iclass 37, count 2 2006.229.04:02:50.69#ibcon#about to read 6, iclass 37, count 2 2006.229.04:02:50.69#ibcon#read 6, iclass 37, count 2 2006.229.04:02:50.69#ibcon#end of sib2, iclass 37, count 2 2006.229.04:02:50.69#ibcon#*mode == 0, iclass 37, count 2 2006.229.04:02:50.69#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.04:02:50.69#ibcon#[27=AT06-04\r\n] 2006.229.04:02:50.69#ibcon#*before write, iclass 37, count 2 2006.229.04:02:50.69#ibcon#enter sib2, iclass 37, count 2 2006.229.04:02:50.69#ibcon#flushed, iclass 37, count 2 2006.229.04:02:50.69#ibcon#about to write, iclass 37, count 2 2006.229.04:02:50.69#ibcon#wrote, iclass 37, count 2 2006.229.04:02:50.69#ibcon#about to read 3, iclass 37, count 2 2006.229.04:02:50.72#ibcon#read 3, iclass 37, count 2 2006.229.04:02:50.72#ibcon#about to read 4, iclass 37, count 2 2006.229.04:02:50.72#ibcon#read 4, iclass 37, count 2 2006.229.04:02:50.72#ibcon#about to read 5, iclass 37, count 2 2006.229.04:02:50.72#ibcon#read 5, iclass 37, count 2 2006.229.04:02:50.72#ibcon#about to read 6, iclass 37, count 2 2006.229.04:02:50.72#ibcon#read 6, iclass 37, count 2 2006.229.04:02:50.72#ibcon#end of sib2, iclass 37, count 2 2006.229.04:02:50.72#ibcon#*after write, iclass 37, count 2 2006.229.04:02:50.72#ibcon#*before return 0, iclass 37, count 2 2006.229.04:02:50.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:50.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:02:50.72#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.04:02:50.72#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:50.72#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:50.84#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:50.84#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:50.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:02:50.84#ibcon#first serial, iclass 37, count 0 2006.229.04:02:50.84#ibcon#enter sib2, iclass 37, count 0 2006.229.04:02:50.84#ibcon#flushed, iclass 37, count 0 2006.229.04:02:50.84#ibcon#about to write, iclass 37, count 0 2006.229.04:02:50.84#ibcon#wrote, iclass 37, count 0 2006.229.04:02:50.84#ibcon#about to read 3, iclass 37, count 0 2006.229.04:02:50.86#ibcon#read 3, iclass 37, count 0 2006.229.04:02:50.86#ibcon#about to read 4, iclass 37, count 0 2006.229.04:02:50.86#ibcon#read 4, iclass 37, count 0 2006.229.04:02:50.86#ibcon#about to read 5, iclass 37, count 0 2006.229.04:02:50.86#ibcon#read 5, iclass 37, count 0 2006.229.04:02:50.86#ibcon#about to read 6, iclass 37, count 0 2006.229.04:02:50.86#ibcon#read 6, iclass 37, count 0 2006.229.04:02:50.86#ibcon#end of sib2, iclass 37, count 0 2006.229.04:02:50.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:02:50.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:02:50.86#ibcon#[27=USB\r\n] 2006.229.04:02:50.86#ibcon#*before write, iclass 37, count 0 2006.229.04:02:50.86#ibcon#enter sib2, iclass 37, count 0 2006.229.04:02:50.86#ibcon#flushed, iclass 37, count 0 2006.229.04:02:50.86#ibcon#about to write, iclass 37, count 0 2006.229.04:02:50.86#ibcon#wrote, iclass 37, count 0 2006.229.04:02:50.86#ibcon#about to read 3, iclass 37, count 0 2006.229.04:02:50.89#ibcon#read 3, iclass 37, count 0 2006.229.04:02:50.89#ibcon#about to read 4, iclass 37, count 0 2006.229.04:02:50.89#ibcon#read 4, iclass 37, count 0 2006.229.04:02:50.89#ibcon#about to read 5, iclass 37, count 0 2006.229.04:02:50.89#ibcon#read 5, iclass 37, count 0 2006.229.04:02:50.89#ibcon#about to read 6, iclass 37, count 0 2006.229.04:02:50.89#ibcon#read 6, iclass 37, count 0 2006.229.04:02:50.89#ibcon#end of sib2, iclass 37, count 0 2006.229.04:02:50.89#ibcon#*after write, iclass 37, count 0 2006.229.04:02:50.89#ibcon#*before return 0, iclass 37, count 0 2006.229.04:02:50.89#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:50.89#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:02:50.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:02:50.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:02:50.89$vck44/vblo=7,734.99 2006.229.04:02:50.89#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.04:02:50.89#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.04:02:50.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:50.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:50.89#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:50.89#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:50.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:02:50.89#ibcon#first serial, iclass 39, count 0 2006.229.04:02:50.89#ibcon#enter sib2, iclass 39, count 0 2006.229.04:02:50.89#ibcon#flushed, iclass 39, count 0 2006.229.04:02:50.89#ibcon#about to write, iclass 39, count 0 2006.229.04:02:50.89#ibcon#wrote, iclass 39, count 0 2006.229.04:02:50.89#ibcon#about to read 3, iclass 39, count 0 2006.229.04:02:50.91#ibcon#read 3, iclass 39, count 0 2006.229.04:02:50.91#ibcon#about to read 4, iclass 39, count 0 2006.229.04:02:50.91#ibcon#read 4, iclass 39, count 0 2006.229.04:02:50.91#ibcon#about to read 5, iclass 39, count 0 2006.229.04:02:50.91#ibcon#read 5, iclass 39, count 0 2006.229.04:02:50.91#ibcon#about to read 6, iclass 39, count 0 2006.229.04:02:50.91#ibcon#read 6, iclass 39, count 0 2006.229.04:02:50.91#ibcon#end of sib2, iclass 39, count 0 2006.229.04:02:50.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:02:50.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:02:50.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:02:50.91#ibcon#*before write, iclass 39, count 0 2006.229.04:02:50.91#ibcon#enter sib2, iclass 39, count 0 2006.229.04:02:50.91#ibcon#flushed, iclass 39, count 0 2006.229.04:02:50.91#ibcon#about to write, iclass 39, count 0 2006.229.04:02:50.91#ibcon#wrote, iclass 39, count 0 2006.229.04:02:50.91#ibcon#about to read 3, iclass 39, count 0 2006.229.04:02:50.95#ibcon#read 3, iclass 39, count 0 2006.229.04:02:50.95#ibcon#about to read 4, iclass 39, count 0 2006.229.04:02:50.95#ibcon#read 4, iclass 39, count 0 2006.229.04:02:50.95#ibcon#about to read 5, iclass 39, count 0 2006.229.04:02:50.95#ibcon#read 5, iclass 39, count 0 2006.229.04:02:50.95#ibcon#about to read 6, iclass 39, count 0 2006.229.04:02:50.95#ibcon#read 6, iclass 39, count 0 2006.229.04:02:50.95#ibcon#end of sib2, iclass 39, count 0 2006.229.04:02:50.95#ibcon#*after write, iclass 39, count 0 2006.229.04:02:50.95#ibcon#*before return 0, iclass 39, count 0 2006.229.04:02:50.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:50.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:02:50.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:02:50.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:02:50.95$vck44/vb=7,4 2006.229.04:02:50.95#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.04:02:50.95#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.04:02:50.95#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:50.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:51.01#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:51.01#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:51.01#ibcon#enter wrdev, iclass 3, count 2 2006.229.04:02:51.01#ibcon#first serial, iclass 3, count 2 2006.229.04:02:51.01#ibcon#enter sib2, iclass 3, count 2 2006.229.04:02:51.01#ibcon#flushed, iclass 3, count 2 2006.229.04:02:51.01#ibcon#about to write, iclass 3, count 2 2006.229.04:02:51.01#ibcon#wrote, iclass 3, count 2 2006.229.04:02:51.01#ibcon#about to read 3, iclass 3, count 2 2006.229.04:02:51.03#ibcon#read 3, iclass 3, count 2 2006.229.04:02:51.03#ibcon#about to read 4, iclass 3, count 2 2006.229.04:02:51.03#ibcon#read 4, iclass 3, count 2 2006.229.04:02:51.03#ibcon#about to read 5, iclass 3, count 2 2006.229.04:02:51.03#ibcon#read 5, iclass 3, count 2 2006.229.04:02:51.03#ibcon#about to read 6, iclass 3, count 2 2006.229.04:02:51.03#ibcon#read 6, iclass 3, count 2 2006.229.04:02:51.03#ibcon#end of sib2, iclass 3, count 2 2006.229.04:02:51.03#ibcon#*mode == 0, iclass 3, count 2 2006.229.04:02:51.03#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.04:02:51.03#ibcon#[27=AT07-04\r\n] 2006.229.04:02:51.03#ibcon#*before write, iclass 3, count 2 2006.229.04:02:51.03#ibcon#enter sib2, iclass 3, count 2 2006.229.04:02:51.03#ibcon#flushed, iclass 3, count 2 2006.229.04:02:51.03#ibcon#about to write, iclass 3, count 2 2006.229.04:02:51.03#ibcon#wrote, iclass 3, count 2 2006.229.04:02:51.03#ibcon#about to read 3, iclass 3, count 2 2006.229.04:02:51.06#ibcon#read 3, iclass 3, count 2 2006.229.04:02:51.06#ibcon#about to read 4, iclass 3, count 2 2006.229.04:02:51.06#ibcon#read 4, iclass 3, count 2 2006.229.04:02:51.06#ibcon#about to read 5, iclass 3, count 2 2006.229.04:02:51.06#ibcon#read 5, iclass 3, count 2 2006.229.04:02:51.06#ibcon#about to read 6, iclass 3, count 2 2006.229.04:02:51.06#ibcon#read 6, iclass 3, count 2 2006.229.04:02:51.06#ibcon#end of sib2, iclass 3, count 2 2006.229.04:02:51.06#ibcon#*after write, iclass 3, count 2 2006.229.04:02:51.06#ibcon#*before return 0, iclass 3, count 2 2006.229.04:02:51.06#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:51.06#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:02:51.06#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.04:02:51.06#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:51.06#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:51.18#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:51.18#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:51.18#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:02:51.18#ibcon#first serial, iclass 3, count 0 2006.229.04:02:51.18#ibcon#enter sib2, iclass 3, count 0 2006.229.04:02:51.18#ibcon#flushed, iclass 3, count 0 2006.229.04:02:51.18#ibcon#about to write, iclass 3, count 0 2006.229.04:02:51.18#ibcon#wrote, iclass 3, count 0 2006.229.04:02:51.18#ibcon#about to read 3, iclass 3, count 0 2006.229.04:02:51.20#ibcon#read 3, iclass 3, count 0 2006.229.04:02:51.20#ibcon#about to read 4, iclass 3, count 0 2006.229.04:02:51.20#ibcon#read 4, iclass 3, count 0 2006.229.04:02:51.20#ibcon#about to read 5, iclass 3, count 0 2006.229.04:02:51.20#ibcon#read 5, iclass 3, count 0 2006.229.04:02:51.20#ibcon#about to read 6, iclass 3, count 0 2006.229.04:02:51.20#ibcon#read 6, iclass 3, count 0 2006.229.04:02:51.20#ibcon#end of sib2, iclass 3, count 0 2006.229.04:02:51.20#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:02:51.20#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:02:51.20#ibcon#[27=USB\r\n] 2006.229.04:02:51.20#ibcon#*before write, iclass 3, count 0 2006.229.04:02:51.20#ibcon#enter sib2, iclass 3, count 0 2006.229.04:02:51.20#ibcon#flushed, iclass 3, count 0 2006.229.04:02:51.20#ibcon#about to write, iclass 3, count 0 2006.229.04:02:51.20#ibcon#wrote, iclass 3, count 0 2006.229.04:02:51.20#ibcon#about to read 3, iclass 3, count 0 2006.229.04:02:51.23#ibcon#read 3, iclass 3, count 0 2006.229.04:02:51.23#ibcon#about to read 4, iclass 3, count 0 2006.229.04:02:51.23#ibcon#read 4, iclass 3, count 0 2006.229.04:02:51.23#ibcon#about to read 5, iclass 3, count 0 2006.229.04:02:51.23#ibcon#read 5, iclass 3, count 0 2006.229.04:02:51.23#ibcon#about to read 6, iclass 3, count 0 2006.229.04:02:51.23#ibcon#read 6, iclass 3, count 0 2006.229.04:02:51.23#ibcon#end of sib2, iclass 3, count 0 2006.229.04:02:51.23#ibcon#*after write, iclass 3, count 0 2006.229.04:02:51.23#ibcon#*before return 0, iclass 3, count 0 2006.229.04:02:51.23#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:51.23#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:02:51.23#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:02:51.23#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:02:51.23$vck44/vblo=8,744.99 2006.229.04:02:51.23#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.04:02:51.23#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.04:02:51.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:02:51.23#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:02:51.23#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:02:51.23#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:02:51.23#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:02:51.23#ibcon#first serial, iclass 5, count 0 2006.229.04:02:51.23#ibcon#enter sib2, iclass 5, count 0 2006.229.04:02:51.23#ibcon#flushed, iclass 5, count 0 2006.229.04:02:51.23#ibcon#about to write, iclass 5, count 0 2006.229.04:02:51.23#ibcon#wrote, iclass 5, count 0 2006.229.04:02:51.23#ibcon#about to read 3, iclass 5, count 0 2006.229.04:02:51.25#ibcon#read 3, iclass 5, count 0 2006.229.04:02:51.25#ibcon#about to read 4, iclass 5, count 0 2006.229.04:02:51.25#ibcon#read 4, iclass 5, count 0 2006.229.04:02:51.25#ibcon#about to read 5, iclass 5, count 0 2006.229.04:02:51.25#ibcon#read 5, iclass 5, count 0 2006.229.04:02:51.25#ibcon#about to read 6, iclass 5, count 0 2006.229.04:02:51.25#ibcon#read 6, iclass 5, count 0 2006.229.04:02:51.25#ibcon#end of sib2, iclass 5, count 0 2006.229.04:02:51.25#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:02:51.25#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:02:51.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:02:51.25#ibcon#*before write, iclass 5, count 0 2006.229.04:02:51.25#ibcon#enter sib2, iclass 5, count 0 2006.229.04:02:51.25#ibcon#flushed, iclass 5, count 0 2006.229.04:02:51.25#ibcon#about to write, iclass 5, count 0 2006.229.04:02:51.25#ibcon#wrote, iclass 5, count 0 2006.229.04:02:51.25#ibcon#about to read 3, iclass 5, count 0 2006.229.04:02:51.29#ibcon#read 3, iclass 5, count 0 2006.229.04:02:51.29#ibcon#about to read 4, iclass 5, count 0 2006.229.04:02:51.29#ibcon#read 4, iclass 5, count 0 2006.229.04:02:51.29#ibcon#about to read 5, iclass 5, count 0 2006.229.04:02:51.29#ibcon#read 5, iclass 5, count 0 2006.229.04:02:51.29#ibcon#about to read 6, iclass 5, count 0 2006.229.04:02:51.29#ibcon#read 6, iclass 5, count 0 2006.229.04:02:51.29#ibcon#end of sib2, iclass 5, count 0 2006.229.04:02:51.29#ibcon#*after write, iclass 5, count 0 2006.229.04:02:51.29#ibcon#*before return 0, iclass 5, count 0 2006.229.04:02:51.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:02:51.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:02:51.29#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:02:51.29#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:02:51.29$vck44/vb=8,4 2006.229.04:02:51.29#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.04:02:51.29#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.04:02:51.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:02:51.29#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:02:51.35#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:02:51.35#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:02:51.35#ibcon#enter wrdev, iclass 7, count 2 2006.229.04:02:51.35#ibcon#first serial, iclass 7, count 2 2006.229.04:02:51.35#ibcon#enter sib2, iclass 7, count 2 2006.229.04:02:51.35#ibcon#flushed, iclass 7, count 2 2006.229.04:02:51.35#ibcon#about to write, iclass 7, count 2 2006.229.04:02:51.35#ibcon#wrote, iclass 7, count 2 2006.229.04:02:51.35#ibcon#about to read 3, iclass 7, count 2 2006.229.04:02:51.37#ibcon#read 3, iclass 7, count 2 2006.229.04:02:51.37#ibcon#about to read 4, iclass 7, count 2 2006.229.04:02:51.37#ibcon#read 4, iclass 7, count 2 2006.229.04:02:51.37#ibcon#about to read 5, iclass 7, count 2 2006.229.04:02:51.37#ibcon#read 5, iclass 7, count 2 2006.229.04:02:51.37#ibcon#about to read 6, iclass 7, count 2 2006.229.04:02:51.37#ibcon#read 6, iclass 7, count 2 2006.229.04:02:51.37#ibcon#end of sib2, iclass 7, count 2 2006.229.04:02:51.37#ibcon#*mode == 0, iclass 7, count 2 2006.229.04:02:51.37#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.04:02:51.37#ibcon#[27=AT08-04\r\n] 2006.229.04:02:51.37#ibcon#*before write, iclass 7, count 2 2006.229.04:02:51.37#ibcon#enter sib2, iclass 7, count 2 2006.229.04:02:51.37#ibcon#flushed, iclass 7, count 2 2006.229.04:02:51.37#ibcon#about to write, iclass 7, count 2 2006.229.04:02:51.37#ibcon#wrote, iclass 7, count 2 2006.229.04:02:51.37#ibcon#about to read 3, iclass 7, count 2 2006.229.04:02:51.40#ibcon#read 3, iclass 7, count 2 2006.229.04:02:51.40#ibcon#about to read 4, iclass 7, count 2 2006.229.04:02:51.40#ibcon#read 4, iclass 7, count 2 2006.229.04:02:51.40#ibcon#about to read 5, iclass 7, count 2 2006.229.04:02:51.40#ibcon#read 5, iclass 7, count 2 2006.229.04:02:51.40#ibcon#about to read 6, iclass 7, count 2 2006.229.04:02:51.40#ibcon#read 6, iclass 7, count 2 2006.229.04:02:51.40#ibcon#end of sib2, iclass 7, count 2 2006.229.04:02:51.40#ibcon#*after write, iclass 7, count 2 2006.229.04:02:51.40#ibcon#*before return 0, iclass 7, count 2 2006.229.04:02:51.40#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:02:51.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:02:51.40#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.04:02:51.40#ibcon#ireg 7 cls_cnt 0 2006.229.04:02:51.40#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:02:51.52#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:02:51.52#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:02:51.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:02:51.52#ibcon#first serial, iclass 7, count 0 2006.229.04:02:51.52#ibcon#enter sib2, iclass 7, count 0 2006.229.04:02:51.52#ibcon#flushed, iclass 7, count 0 2006.229.04:02:51.52#ibcon#about to write, iclass 7, count 0 2006.229.04:02:51.52#ibcon#wrote, iclass 7, count 0 2006.229.04:02:51.52#ibcon#about to read 3, iclass 7, count 0 2006.229.04:02:51.54#ibcon#read 3, iclass 7, count 0 2006.229.04:02:51.54#ibcon#about to read 4, iclass 7, count 0 2006.229.04:02:51.54#ibcon#read 4, iclass 7, count 0 2006.229.04:02:51.54#ibcon#about to read 5, iclass 7, count 0 2006.229.04:02:51.54#ibcon#read 5, iclass 7, count 0 2006.229.04:02:51.54#ibcon#about to read 6, iclass 7, count 0 2006.229.04:02:51.54#ibcon#read 6, iclass 7, count 0 2006.229.04:02:51.54#ibcon#end of sib2, iclass 7, count 0 2006.229.04:02:51.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:02:51.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:02:51.54#ibcon#[27=USB\r\n] 2006.229.04:02:51.54#ibcon#*before write, iclass 7, count 0 2006.229.04:02:51.54#ibcon#enter sib2, iclass 7, count 0 2006.229.04:02:51.54#ibcon#flushed, iclass 7, count 0 2006.229.04:02:51.54#ibcon#about to write, iclass 7, count 0 2006.229.04:02:51.54#ibcon#wrote, iclass 7, count 0 2006.229.04:02:51.54#ibcon#about to read 3, iclass 7, count 0 2006.229.04:02:51.57#ibcon#read 3, iclass 7, count 0 2006.229.04:02:51.57#ibcon#about to read 4, iclass 7, count 0 2006.229.04:02:51.57#ibcon#read 4, iclass 7, count 0 2006.229.04:02:51.57#ibcon#about to read 5, iclass 7, count 0 2006.229.04:02:51.57#ibcon#read 5, iclass 7, count 0 2006.229.04:02:51.57#ibcon#about to read 6, iclass 7, count 0 2006.229.04:02:51.57#ibcon#read 6, iclass 7, count 0 2006.229.04:02:51.57#ibcon#end of sib2, iclass 7, count 0 2006.229.04:02:51.57#ibcon#*after write, iclass 7, count 0 2006.229.04:02:51.57#ibcon#*before return 0, iclass 7, count 0 2006.229.04:02:51.57#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:02:51.57#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:02:51.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:02:51.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:02:51.57$vck44/vabw=wide 2006.229.04:02:51.57#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.04:02:51.57#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.04:02:51.57#ibcon#ireg 8 cls_cnt 0 2006.229.04:02:51.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:02:51.57#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:02:51.57#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:02:51.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:02:51.57#ibcon#first serial, iclass 11, count 0 2006.229.04:02:51.57#ibcon#enter sib2, iclass 11, count 0 2006.229.04:02:51.57#ibcon#flushed, iclass 11, count 0 2006.229.04:02:51.57#ibcon#about to write, iclass 11, count 0 2006.229.04:02:51.57#ibcon#wrote, iclass 11, count 0 2006.229.04:02:51.57#ibcon#about to read 3, iclass 11, count 0 2006.229.04:02:51.59#ibcon#read 3, iclass 11, count 0 2006.229.04:02:51.59#ibcon#about to read 4, iclass 11, count 0 2006.229.04:02:51.59#ibcon#read 4, iclass 11, count 0 2006.229.04:02:51.59#ibcon#about to read 5, iclass 11, count 0 2006.229.04:02:51.59#ibcon#read 5, iclass 11, count 0 2006.229.04:02:51.59#ibcon#about to read 6, iclass 11, count 0 2006.229.04:02:51.59#ibcon#read 6, iclass 11, count 0 2006.229.04:02:51.59#ibcon#end of sib2, iclass 11, count 0 2006.229.04:02:51.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:02:51.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:02:51.59#ibcon#[25=BW32\r\n] 2006.229.04:02:51.59#ibcon#*before write, iclass 11, count 0 2006.229.04:02:51.59#ibcon#enter sib2, iclass 11, count 0 2006.229.04:02:51.59#ibcon#flushed, iclass 11, count 0 2006.229.04:02:51.59#ibcon#about to write, iclass 11, count 0 2006.229.04:02:51.59#ibcon#wrote, iclass 11, count 0 2006.229.04:02:51.59#ibcon#about to read 3, iclass 11, count 0 2006.229.04:02:51.62#ibcon#read 3, iclass 11, count 0 2006.229.04:02:51.62#ibcon#about to read 4, iclass 11, count 0 2006.229.04:02:51.62#ibcon#read 4, iclass 11, count 0 2006.229.04:02:51.62#ibcon#about to read 5, iclass 11, count 0 2006.229.04:02:51.62#ibcon#read 5, iclass 11, count 0 2006.229.04:02:51.62#ibcon#about to read 6, iclass 11, count 0 2006.229.04:02:51.62#ibcon#read 6, iclass 11, count 0 2006.229.04:02:51.62#ibcon#end of sib2, iclass 11, count 0 2006.229.04:02:51.62#ibcon#*after write, iclass 11, count 0 2006.229.04:02:51.62#ibcon#*before return 0, iclass 11, count 0 2006.229.04:02:51.62#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:02:51.62#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:02:51.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:02:51.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:02:51.62$vck44/vbbw=wide 2006.229.04:02:51.62#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.04:02:51.62#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.04:02:51.62#ibcon#ireg 8 cls_cnt 0 2006.229.04:02:51.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:02:51.69#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:02:51.69#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:02:51.69#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:02:51.69#ibcon#first serial, iclass 13, count 0 2006.229.04:02:51.69#ibcon#enter sib2, iclass 13, count 0 2006.229.04:02:51.69#ibcon#flushed, iclass 13, count 0 2006.229.04:02:51.69#ibcon#about to write, iclass 13, count 0 2006.229.04:02:51.69#ibcon#wrote, iclass 13, count 0 2006.229.04:02:51.69#ibcon#about to read 3, iclass 13, count 0 2006.229.04:02:51.71#ibcon#read 3, iclass 13, count 0 2006.229.04:02:51.71#ibcon#about to read 4, iclass 13, count 0 2006.229.04:02:51.71#ibcon#read 4, iclass 13, count 0 2006.229.04:02:51.71#ibcon#about to read 5, iclass 13, count 0 2006.229.04:02:51.71#ibcon#read 5, iclass 13, count 0 2006.229.04:02:51.71#ibcon#about to read 6, iclass 13, count 0 2006.229.04:02:51.71#ibcon#read 6, iclass 13, count 0 2006.229.04:02:51.71#ibcon#end of sib2, iclass 13, count 0 2006.229.04:02:51.71#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:02:51.71#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:02:51.71#ibcon#[27=BW32\r\n] 2006.229.04:02:51.71#ibcon#*before write, iclass 13, count 0 2006.229.04:02:51.71#ibcon#enter sib2, iclass 13, count 0 2006.229.04:02:51.71#ibcon#flushed, iclass 13, count 0 2006.229.04:02:51.71#ibcon#about to write, iclass 13, count 0 2006.229.04:02:51.71#ibcon#wrote, iclass 13, count 0 2006.229.04:02:51.71#ibcon#about to read 3, iclass 13, count 0 2006.229.04:02:51.74#ibcon#read 3, iclass 13, count 0 2006.229.04:02:51.74#ibcon#about to read 4, iclass 13, count 0 2006.229.04:02:51.74#ibcon#read 4, iclass 13, count 0 2006.229.04:02:51.74#ibcon#about to read 5, iclass 13, count 0 2006.229.04:02:51.74#ibcon#read 5, iclass 13, count 0 2006.229.04:02:51.74#ibcon#about to read 6, iclass 13, count 0 2006.229.04:02:51.74#ibcon#read 6, iclass 13, count 0 2006.229.04:02:51.74#ibcon#end of sib2, iclass 13, count 0 2006.229.04:02:51.74#ibcon#*after write, iclass 13, count 0 2006.229.04:02:51.74#ibcon#*before return 0, iclass 13, count 0 2006.229.04:02:51.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:02:51.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:02:51.74#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:02:51.74#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:02:51.74$setupk4/ifdk4 2006.229.04:02:51.74$ifdk4/lo= 2006.229.04:02:51.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:02:51.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:02:51.74$ifdk4/patch= 2006.229.04:02:51.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:02:51.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:02:51.74$setupk4/!*+20s 2006.229.04:02:58.68#abcon#<5=/04 2.4 4.1 30.14 931000.3\r\n> 2006.229.04:02:58.70#abcon#{5=INTERFACE CLEAR} 2006.229.04:02:58.76#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:03:06.25$setupk4/"tpicd 2006.229.04:03:06.25$setupk4/echo=off 2006.229.04:03:06.25$setupk4/xlog=off 2006.229.04:03:06.25:!2006.229.04:03:42 2006.229.04:03:23.14#trakl#Source acquired 2006.229.04:03:23.14#flagr#flagr/antenna,acquired 2006.229.04:03:42.00:preob 2006.229.04:03:42.14/onsource/TRACKING 2006.229.04:03:42.14:!2006.229.04:03:52 2006.229.04:03:52.00:"tape 2006.229.04:03:52.00:"st=record 2006.229.04:03:52.00:data_valid=on 2006.229.04:03:52.00:midob 2006.229.04:03:53.14/onsource/TRACKING 2006.229.04:03:53.14/wx/30.16,1000.3,95 2006.229.04:03:53.22/cable/+6.4088E-03 2006.229.04:03:54.31/va/01,08,usb,yes,31,34 2006.229.04:03:54.31/va/02,07,usb,yes,34,35 2006.229.04:03:54.31/va/03,06,usb,yes,42,45 2006.229.04:03:54.31/va/04,07,usb,yes,35,37 2006.229.04:03:54.31/va/05,04,usb,yes,31,32 2006.229.04:03:54.31/va/06,04,usb,yes,35,35 2006.229.04:03:54.31/va/07,05,usb,yes,31,32 2006.229.04:03:54.31/va/08,06,usb,yes,23,28 2006.229.04:03:54.54/valo/01,524.99,yes,locked 2006.229.04:03:54.54/valo/02,534.99,yes,locked 2006.229.04:03:54.54/valo/03,564.99,yes,locked 2006.229.04:03:54.54/valo/04,624.99,yes,locked 2006.229.04:03:54.54/valo/05,734.99,yes,locked 2006.229.04:03:54.54/valo/06,814.99,yes,locked 2006.229.04:03:54.54/valo/07,864.99,yes,locked 2006.229.04:03:54.54/valo/08,884.99,yes,locked 2006.229.04:03:55.63/vb/01,04,usb,yes,32,30 2006.229.04:03:55.63/vb/02,04,usb,yes,34,34 2006.229.04:03:55.63/vb/03,04,usb,yes,31,34 2006.229.04:03:55.63/vb/04,04,usb,yes,36,35 2006.229.04:03:55.63/vb/05,04,usb,yes,28,30 2006.229.04:03:55.63/vb/06,04,usb,yes,33,28 2006.229.04:03:55.63/vb/07,04,usb,yes,32,32 2006.229.04:03:55.63/vb/08,04,usb,yes,30,33 2006.229.04:03:55.86/vblo/01,629.99,yes,locked 2006.229.04:03:55.86/vblo/02,634.99,yes,locked 2006.229.04:03:55.86/vblo/03,649.99,yes,locked 2006.229.04:03:55.86/vblo/04,679.99,yes,locked 2006.229.04:03:55.86/vblo/05,709.99,yes,locked 2006.229.04:03:55.86/vblo/06,719.99,yes,locked 2006.229.04:03:55.86/vblo/07,734.99,yes,locked 2006.229.04:03:55.86/vblo/08,744.99,yes,locked 2006.229.04:03:56.01/vabw/8 2006.229.04:03:56.16/vbbw/8 2006.229.04:03:56.25/xfe/off,on,12.0 2006.229.04:03:56.64/ifatt/23,28,28,28 2006.229.04:03:57.08/fmout-gps/S +4.45E-07 2006.229.04:03:57.12:!2006.229.04:05:12 2006.229.04:05:12.00:data_valid=off 2006.229.04:05:12.00:"et 2006.229.04:05:12.00:!+3s 2006.229.04:05:15.01:"tape 2006.229.04:05:15.01:postob 2006.229.04:05:15.21/cable/+6.4087E-03 2006.229.04:05:15.21/wx/30.20,1000.3,95 2006.229.04:05:16.07/fmout-gps/S +4.48E-07 2006.229.04:05:16.07:scan_name=229-0407,jd0608,190 2006.229.04:05:16.07:source=1334-127,133739.78,-125724.7,2000.0,ccw 2006.229.04:05:17.14#flagr#flagr/antenna,new-source 2006.229.04:05:17.14:checkk5 2006.229.04:05:17.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:05:17.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:05:18.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:05:18.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:05:19.11/chk_obsdata//k5ts1/T2290403??a.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.04:05:19.51/chk_obsdata//k5ts2/T2290403??b.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.04:05:19.93/chk_obsdata//k5ts3/T2290403??c.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.04:05:20.35/chk_obsdata//k5ts4/T2290403??d.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.04:05:21.09/k5log//k5ts1_log_newline 2006.229.04:05:21.80/k5log//k5ts2_log_newline 2006.229.04:05:22.52/k5log//k5ts3_log_newline 2006.229.04:05:23.22/k5log//k5ts4_log_newline 2006.229.04:05:23.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:05:23.24:setupk4=1 2006.229.04:05:23.24$setupk4/echo=on 2006.229.04:05:23.24$setupk4/pcalon 2006.229.04:05:23.24$pcalon/"no phase cal control is implemented here 2006.229.04:05:23.24$setupk4/"tpicd=stop 2006.229.04:05:23.24$setupk4/"rec=synch_on 2006.229.04:05:23.24$setupk4/"rec_mode=128 2006.229.04:05:23.24$setupk4/!* 2006.229.04:05:23.24$setupk4/recpk4 2006.229.04:05:23.24$recpk4/recpatch= 2006.229.04:05:23.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:05:23.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:05:23.24$setupk4/vck44 2006.229.04:05:23.24$vck44/valo=1,524.99 2006.229.04:05:23.24#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.04:05:23.24#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.04:05:23.24#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:23.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:23.24#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:23.24#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:23.24#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:05:23.24#ibcon#first serial, iclass 4, count 0 2006.229.04:05:23.24#ibcon#enter sib2, iclass 4, count 0 2006.229.04:05:23.24#ibcon#flushed, iclass 4, count 0 2006.229.04:05:23.24#ibcon#about to write, iclass 4, count 0 2006.229.04:05:23.24#ibcon#wrote, iclass 4, count 0 2006.229.04:05:23.24#ibcon#about to read 3, iclass 4, count 0 2006.229.04:05:23.26#ibcon#read 3, iclass 4, count 0 2006.229.04:05:23.26#ibcon#about to read 4, iclass 4, count 0 2006.229.04:05:23.26#ibcon#read 4, iclass 4, count 0 2006.229.04:05:23.26#ibcon#about to read 5, iclass 4, count 0 2006.229.04:05:23.26#ibcon#read 5, iclass 4, count 0 2006.229.04:05:23.26#ibcon#about to read 6, iclass 4, count 0 2006.229.04:05:23.26#ibcon#read 6, iclass 4, count 0 2006.229.04:05:23.26#ibcon#end of sib2, iclass 4, count 0 2006.229.04:05:23.26#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:05:23.26#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:05:23.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:05:23.26#ibcon#*before write, iclass 4, count 0 2006.229.04:05:23.26#ibcon#enter sib2, iclass 4, count 0 2006.229.04:05:23.26#ibcon#flushed, iclass 4, count 0 2006.229.04:05:23.26#ibcon#about to write, iclass 4, count 0 2006.229.04:05:23.26#ibcon#wrote, iclass 4, count 0 2006.229.04:05:23.26#ibcon#about to read 3, iclass 4, count 0 2006.229.04:05:23.31#ibcon#read 3, iclass 4, count 0 2006.229.04:05:23.31#ibcon#about to read 4, iclass 4, count 0 2006.229.04:05:23.31#ibcon#read 4, iclass 4, count 0 2006.229.04:05:23.31#ibcon#about to read 5, iclass 4, count 0 2006.229.04:05:23.31#ibcon#read 5, iclass 4, count 0 2006.229.04:05:23.31#ibcon#about to read 6, iclass 4, count 0 2006.229.04:05:23.31#ibcon#read 6, iclass 4, count 0 2006.229.04:05:23.31#ibcon#end of sib2, iclass 4, count 0 2006.229.04:05:23.31#ibcon#*after write, iclass 4, count 0 2006.229.04:05:23.31#ibcon#*before return 0, iclass 4, count 0 2006.229.04:05:23.31#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:23.31#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:23.31#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:05:23.31#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:05:23.31$vck44/va=1,8 2006.229.04:05:23.31#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.04:05:23.31#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.04:05:23.31#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:23.31#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:23.31#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:23.31#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:23.31#ibcon#enter wrdev, iclass 6, count 2 2006.229.04:05:23.31#ibcon#first serial, iclass 6, count 2 2006.229.04:05:23.31#ibcon#enter sib2, iclass 6, count 2 2006.229.04:05:23.31#ibcon#flushed, iclass 6, count 2 2006.229.04:05:23.31#ibcon#about to write, iclass 6, count 2 2006.229.04:05:23.31#ibcon#wrote, iclass 6, count 2 2006.229.04:05:23.31#ibcon#about to read 3, iclass 6, count 2 2006.229.04:05:23.33#ibcon#read 3, iclass 6, count 2 2006.229.04:05:23.33#ibcon#about to read 4, iclass 6, count 2 2006.229.04:05:23.33#ibcon#read 4, iclass 6, count 2 2006.229.04:05:23.33#ibcon#about to read 5, iclass 6, count 2 2006.229.04:05:23.33#ibcon#read 5, iclass 6, count 2 2006.229.04:05:23.33#ibcon#about to read 6, iclass 6, count 2 2006.229.04:05:23.33#ibcon#read 6, iclass 6, count 2 2006.229.04:05:23.33#ibcon#end of sib2, iclass 6, count 2 2006.229.04:05:23.33#ibcon#*mode == 0, iclass 6, count 2 2006.229.04:05:23.33#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.04:05:23.33#ibcon#[25=AT01-08\r\n] 2006.229.04:05:23.33#ibcon#*before write, iclass 6, count 2 2006.229.04:05:23.33#ibcon#enter sib2, iclass 6, count 2 2006.229.04:05:23.33#ibcon#flushed, iclass 6, count 2 2006.229.04:05:23.33#ibcon#about to write, iclass 6, count 2 2006.229.04:05:23.33#ibcon#wrote, iclass 6, count 2 2006.229.04:05:23.33#ibcon#about to read 3, iclass 6, count 2 2006.229.04:05:23.36#ibcon#read 3, iclass 6, count 2 2006.229.04:05:23.36#ibcon#about to read 4, iclass 6, count 2 2006.229.04:05:23.36#ibcon#read 4, iclass 6, count 2 2006.229.04:05:23.36#ibcon#about to read 5, iclass 6, count 2 2006.229.04:05:23.36#ibcon#read 5, iclass 6, count 2 2006.229.04:05:23.36#ibcon#about to read 6, iclass 6, count 2 2006.229.04:05:23.36#ibcon#read 6, iclass 6, count 2 2006.229.04:05:23.36#ibcon#end of sib2, iclass 6, count 2 2006.229.04:05:23.36#ibcon#*after write, iclass 6, count 2 2006.229.04:05:23.36#ibcon#*before return 0, iclass 6, count 2 2006.229.04:05:23.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:23.36#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:23.36#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.04:05:23.36#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:23.36#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:23.48#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:23.48#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:23.48#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:05:23.48#ibcon#first serial, iclass 6, count 0 2006.229.04:05:23.48#ibcon#enter sib2, iclass 6, count 0 2006.229.04:05:23.48#ibcon#flushed, iclass 6, count 0 2006.229.04:05:23.48#ibcon#about to write, iclass 6, count 0 2006.229.04:05:23.48#ibcon#wrote, iclass 6, count 0 2006.229.04:05:23.48#ibcon#about to read 3, iclass 6, count 0 2006.229.04:05:23.50#ibcon#read 3, iclass 6, count 0 2006.229.04:05:23.50#ibcon#about to read 4, iclass 6, count 0 2006.229.04:05:23.50#ibcon#read 4, iclass 6, count 0 2006.229.04:05:23.50#ibcon#about to read 5, iclass 6, count 0 2006.229.04:05:23.50#ibcon#read 5, iclass 6, count 0 2006.229.04:05:23.50#ibcon#about to read 6, iclass 6, count 0 2006.229.04:05:23.50#ibcon#read 6, iclass 6, count 0 2006.229.04:05:23.50#ibcon#end of sib2, iclass 6, count 0 2006.229.04:05:23.50#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:05:23.50#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:05:23.50#ibcon#[25=USB\r\n] 2006.229.04:05:23.50#ibcon#*before write, iclass 6, count 0 2006.229.04:05:23.50#ibcon#enter sib2, iclass 6, count 0 2006.229.04:05:23.50#ibcon#flushed, iclass 6, count 0 2006.229.04:05:23.50#ibcon#about to write, iclass 6, count 0 2006.229.04:05:23.50#ibcon#wrote, iclass 6, count 0 2006.229.04:05:23.50#ibcon#about to read 3, iclass 6, count 0 2006.229.04:05:23.53#ibcon#read 3, iclass 6, count 0 2006.229.04:05:23.53#ibcon#about to read 4, iclass 6, count 0 2006.229.04:05:23.53#ibcon#read 4, iclass 6, count 0 2006.229.04:05:23.53#ibcon#about to read 5, iclass 6, count 0 2006.229.04:05:23.53#ibcon#read 5, iclass 6, count 0 2006.229.04:05:23.53#ibcon#about to read 6, iclass 6, count 0 2006.229.04:05:23.53#ibcon#read 6, iclass 6, count 0 2006.229.04:05:23.53#ibcon#end of sib2, iclass 6, count 0 2006.229.04:05:23.53#ibcon#*after write, iclass 6, count 0 2006.229.04:05:23.53#ibcon#*before return 0, iclass 6, count 0 2006.229.04:05:23.53#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:23.53#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:23.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:05:23.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:05:23.53$vck44/valo=2,534.99 2006.229.04:05:23.53#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:05:23.53#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:05:23.53#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:23.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:23.53#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:23.53#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:23.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:05:23.53#ibcon#first serial, iclass 10, count 0 2006.229.04:05:23.53#ibcon#enter sib2, iclass 10, count 0 2006.229.04:05:23.53#ibcon#flushed, iclass 10, count 0 2006.229.04:05:23.53#ibcon#about to write, iclass 10, count 0 2006.229.04:05:23.53#ibcon#wrote, iclass 10, count 0 2006.229.04:05:23.53#ibcon#about to read 3, iclass 10, count 0 2006.229.04:05:23.55#ibcon#read 3, iclass 10, count 0 2006.229.04:05:23.55#ibcon#about to read 4, iclass 10, count 0 2006.229.04:05:23.55#ibcon#read 4, iclass 10, count 0 2006.229.04:05:23.55#ibcon#about to read 5, iclass 10, count 0 2006.229.04:05:23.55#ibcon#read 5, iclass 10, count 0 2006.229.04:05:23.55#ibcon#about to read 6, iclass 10, count 0 2006.229.04:05:23.55#ibcon#read 6, iclass 10, count 0 2006.229.04:05:23.55#ibcon#end of sib2, iclass 10, count 0 2006.229.04:05:23.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:05:23.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:05:23.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:05:23.55#ibcon#*before write, iclass 10, count 0 2006.229.04:05:23.55#ibcon#enter sib2, iclass 10, count 0 2006.229.04:05:23.55#ibcon#flushed, iclass 10, count 0 2006.229.04:05:23.55#ibcon#about to write, iclass 10, count 0 2006.229.04:05:23.55#ibcon#wrote, iclass 10, count 0 2006.229.04:05:23.55#ibcon#about to read 3, iclass 10, count 0 2006.229.04:05:23.59#ibcon#read 3, iclass 10, count 0 2006.229.04:05:23.59#ibcon#about to read 4, iclass 10, count 0 2006.229.04:05:23.59#ibcon#read 4, iclass 10, count 0 2006.229.04:05:23.59#ibcon#about to read 5, iclass 10, count 0 2006.229.04:05:23.59#ibcon#read 5, iclass 10, count 0 2006.229.04:05:23.59#ibcon#about to read 6, iclass 10, count 0 2006.229.04:05:23.59#ibcon#read 6, iclass 10, count 0 2006.229.04:05:23.59#ibcon#end of sib2, iclass 10, count 0 2006.229.04:05:23.59#ibcon#*after write, iclass 10, count 0 2006.229.04:05:23.59#ibcon#*before return 0, iclass 10, count 0 2006.229.04:05:23.59#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:23.59#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:23.59#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:05:23.59#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:05:23.59$vck44/va=2,7 2006.229.04:05:23.59#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.04:05:23.59#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.04:05:23.59#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:23.59#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:23.65#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:23.65#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:23.65#ibcon#enter wrdev, iclass 12, count 2 2006.229.04:05:23.65#ibcon#first serial, iclass 12, count 2 2006.229.04:05:23.65#ibcon#enter sib2, iclass 12, count 2 2006.229.04:05:23.65#ibcon#flushed, iclass 12, count 2 2006.229.04:05:23.65#ibcon#about to write, iclass 12, count 2 2006.229.04:05:23.65#ibcon#wrote, iclass 12, count 2 2006.229.04:05:23.65#ibcon#about to read 3, iclass 12, count 2 2006.229.04:05:23.67#ibcon#read 3, iclass 12, count 2 2006.229.04:05:23.67#ibcon#about to read 4, iclass 12, count 2 2006.229.04:05:23.67#ibcon#read 4, iclass 12, count 2 2006.229.04:05:23.67#ibcon#about to read 5, iclass 12, count 2 2006.229.04:05:23.67#ibcon#read 5, iclass 12, count 2 2006.229.04:05:23.67#ibcon#about to read 6, iclass 12, count 2 2006.229.04:05:23.67#ibcon#read 6, iclass 12, count 2 2006.229.04:05:23.67#ibcon#end of sib2, iclass 12, count 2 2006.229.04:05:23.67#ibcon#*mode == 0, iclass 12, count 2 2006.229.04:05:23.67#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.04:05:23.67#ibcon#[25=AT02-07\r\n] 2006.229.04:05:23.67#ibcon#*before write, iclass 12, count 2 2006.229.04:05:23.67#ibcon#enter sib2, iclass 12, count 2 2006.229.04:05:23.67#ibcon#flushed, iclass 12, count 2 2006.229.04:05:23.67#ibcon#about to write, iclass 12, count 2 2006.229.04:05:23.67#ibcon#wrote, iclass 12, count 2 2006.229.04:05:23.67#ibcon#about to read 3, iclass 12, count 2 2006.229.04:05:23.70#ibcon#read 3, iclass 12, count 2 2006.229.04:05:23.70#ibcon#about to read 4, iclass 12, count 2 2006.229.04:05:23.70#ibcon#read 4, iclass 12, count 2 2006.229.04:05:23.70#ibcon#about to read 5, iclass 12, count 2 2006.229.04:05:23.70#ibcon#read 5, iclass 12, count 2 2006.229.04:05:23.70#ibcon#about to read 6, iclass 12, count 2 2006.229.04:05:23.70#ibcon#read 6, iclass 12, count 2 2006.229.04:05:23.70#ibcon#end of sib2, iclass 12, count 2 2006.229.04:05:23.70#ibcon#*after write, iclass 12, count 2 2006.229.04:05:23.70#ibcon#*before return 0, iclass 12, count 2 2006.229.04:05:23.70#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:23.70#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:23.70#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.04:05:23.70#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:23.70#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:23.82#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:23.82#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:23.82#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:05:23.82#ibcon#first serial, iclass 12, count 0 2006.229.04:05:23.82#ibcon#enter sib2, iclass 12, count 0 2006.229.04:05:23.82#ibcon#flushed, iclass 12, count 0 2006.229.04:05:23.82#ibcon#about to write, iclass 12, count 0 2006.229.04:05:23.82#ibcon#wrote, iclass 12, count 0 2006.229.04:05:23.82#ibcon#about to read 3, iclass 12, count 0 2006.229.04:05:23.84#ibcon#read 3, iclass 12, count 0 2006.229.04:05:23.84#ibcon#about to read 4, iclass 12, count 0 2006.229.04:05:23.84#ibcon#read 4, iclass 12, count 0 2006.229.04:05:23.84#ibcon#about to read 5, iclass 12, count 0 2006.229.04:05:23.84#ibcon#read 5, iclass 12, count 0 2006.229.04:05:23.84#ibcon#about to read 6, iclass 12, count 0 2006.229.04:05:23.84#ibcon#read 6, iclass 12, count 0 2006.229.04:05:23.84#ibcon#end of sib2, iclass 12, count 0 2006.229.04:05:23.84#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:05:23.84#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:05:23.84#ibcon#[25=USB\r\n] 2006.229.04:05:23.84#ibcon#*before write, iclass 12, count 0 2006.229.04:05:23.84#ibcon#enter sib2, iclass 12, count 0 2006.229.04:05:23.84#ibcon#flushed, iclass 12, count 0 2006.229.04:05:23.84#ibcon#about to write, iclass 12, count 0 2006.229.04:05:23.84#ibcon#wrote, iclass 12, count 0 2006.229.04:05:23.84#ibcon#about to read 3, iclass 12, count 0 2006.229.04:05:23.87#ibcon#read 3, iclass 12, count 0 2006.229.04:05:23.87#ibcon#about to read 4, iclass 12, count 0 2006.229.04:05:23.87#ibcon#read 4, iclass 12, count 0 2006.229.04:05:23.87#ibcon#about to read 5, iclass 12, count 0 2006.229.04:05:23.87#ibcon#read 5, iclass 12, count 0 2006.229.04:05:23.87#ibcon#about to read 6, iclass 12, count 0 2006.229.04:05:23.87#ibcon#read 6, iclass 12, count 0 2006.229.04:05:23.87#ibcon#end of sib2, iclass 12, count 0 2006.229.04:05:23.87#ibcon#*after write, iclass 12, count 0 2006.229.04:05:23.87#ibcon#*before return 0, iclass 12, count 0 2006.229.04:05:23.87#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:23.87#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:23.87#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:05:23.87#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:05:23.87$vck44/valo=3,564.99 2006.229.04:05:23.87#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:05:23.87#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:05:23.87#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:23.87#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:23.87#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:23.87#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:23.87#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:05:23.87#ibcon#first serial, iclass 14, count 0 2006.229.04:05:23.87#ibcon#enter sib2, iclass 14, count 0 2006.229.04:05:23.87#ibcon#flushed, iclass 14, count 0 2006.229.04:05:23.87#ibcon#about to write, iclass 14, count 0 2006.229.04:05:23.87#ibcon#wrote, iclass 14, count 0 2006.229.04:05:23.87#ibcon#about to read 3, iclass 14, count 0 2006.229.04:05:23.89#ibcon#read 3, iclass 14, count 0 2006.229.04:05:23.89#ibcon#about to read 4, iclass 14, count 0 2006.229.04:05:23.89#ibcon#read 4, iclass 14, count 0 2006.229.04:05:23.89#ibcon#about to read 5, iclass 14, count 0 2006.229.04:05:23.89#ibcon#read 5, iclass 14, count 0 2006.229.04:05:23.89#ibcon#about to read 6, iclass 14, count 0 2006.229.04:05:23.89#ibcon#read 6, iclass 14, count 0 2006.229.04:05:23.89#ibcon#end of sib2, iclass 14, count 0 2006.229.04:05:23.89#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:05:23.89#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:05:23.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:05:23.89#ibcon#*before write, iclass 14, count 0 2006.229.04:05:23.89#ibcon#enter sib2, iclass 14, count 0 2006.229.04:05:23.89#ibcon#flushed, iclass 14, count 0 2006.229.04:05:23.89#ibcon#about to write, iclass 14, count 0 2006.229.04:05:23.89#ibcon#wrote, iclass 14, count 0 2006.229.04:05:23.89#ibcon#about to read 3, iclass 14, count 0 2006.229.04:05:23.93#ibcon#read 3, iclass 14, count 0 2006.229.04:05:23.93#ibcon#about to read 4, iclass 14, count 0 2006.229.04:05:23.93#ibcon#read 4, iclass 14, count 0 2006.229.04:05:23.93#ibcon#about to read 5, iclass 14, count 0 2006.229.04:05:23.93#ibcon#read 5, iclass 14, count 0 2006.229.04:05:23.93#ibcon#about to read 6, iclass 14, count 0 2006.229.04:05:23.93#ibcon#read 6, iclass 14, count 0 2006.229.04:05:23.93#ibcon#end of sib2, iclass 14, count 0 2006.229.04:05:23.93#ibcon#*after write, iclass 14, count 0 2006.229.04:05:23.93#ibcon#*before return 0, iclass 14, count 0 2006.229.04:05:23.93#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:23.93#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:23.93#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:05:23.93#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:05:23.93$vck44/va=3,6 2006.229.04:05:23.93#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.04:05:23.93#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.04:05:23.93#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:23.93#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:23.99#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:23.99#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:23.99#ibcon#enter wrdev, iclass 16, count 2 2006.229.04:05:23.99#ibcon#first serial, iclass 16, count 2 2006.229.04:05:23.99#ibcon#enter sib2, iclass 16, count 2 2006.229.04:05:23.99#ibcon#flushed, iclass 16, count 2 2006.229.04:05:23.99#ibcon#about to write, iclass 16, count 2 2006.229.04:05:23.99#ibcon#wrote, iclass 16, count 2 2006.229.04:05:23.99#ibcon#about to read 3, iclass 16, count 2 2006.229.04:05:24.01#ibcon#read 3, iclass 16, count 2 2006.229.04:05:24.01#ibcon#about to read 4, iclass 16, count 2 2006.229.04:05:24.01#ibcon#read 4, iclass 16, count 2 2006.229.04:05:24.01#ibcon#about to read 5, iclass 16, count 2 2006.229.04:05:24.01#ibcon#read 5, iclass 16, count 2 2006.229.04:05:24.01#ibcon#about to read 6, iclass 16, count 2 2006.229.04:05:24.01#ibcon#read 6, iclass 16, count 2 2006.229.04:05:24.01#ibcon#end of sib2, iclass 16, count 2 2006.229.04:05:24.01#ibcon#*mode == 0, iclass 16, count 2 2006.229.04:05:24.01#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.04:05:24.01#ibcon#[25=AT03-06\r\n] 2006.229.04:05:24.01#ibcon#*before write, iclass 16, count 2 2006.229.04:05:24.01#ibcon#enter sib2, iclass 16, count 2 2006.229.04:05:24.01#ibcon#flushed, iclass 16, count 2 2006.229.04:05:24.01#ibcon#about to write, iclass 16, count 2 2006.229.04:05:24.01#ibcon#wrote, iclass 16, count 2 2006.229.04:05:24.01#ibcon#about to read 3, iclass 16, count 2 2006.229.04:05:24.04#ibcon#read 3, iclass 16, count 2 2006.229.04:05:24.04#ibcon#about to read 4, iclass 16, count 2 2006.229.04:05:24.04#ibcon#read 4, iclass 16, count 2 2006.229.04:05:24.04#ibcon#about to read 5, iclass 16, count 2 2006.229.04:05:24.04#ibcon#read 5, iclass 16, count 2 2006.229.04:05:24.04#ibcon#about to read 6, iclass 16, count 2 2006.229.04:05:24.04#ibcon#read 6, iclass 16, count 2 2006.229.04:05:24.04#ibcon#end of sib2, iclass 16, count 2 2006.229.04:05:24.04#ibcon#*after write, iclass 16, count 2 2006.229.04:05:24.04#ibcon#*before return 0, iclass 16, count 2 2006.229.04:05:24.04#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:24.04#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:24.04#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.04:05:24.04#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:24.04#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:24.16#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:24.16#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:24.16#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:05:24.16#ibcon#first serial, iclass 16, count 0 2006.229.04:05:24.16#ibcon#enter sib2, iclass 16, count 0 2006.229.04:05:24.16#ibcon#flushed, iclass 16, count 0 2006.229.04:05:24.16#ibcon#about to write, iclass 16, count 0 2006.229.04:05:24.16#ibcon#wrote, iclass 16, count 0 2006.229.04:05:24.16#ibcon#about to read 3, iclass 16, count 0 2006.229.04:05:24.18#ibcon#read 3, iclass 16, count 0 2006.229.04:05:24.18#ibcon#about to read 4, iclass 16, count 0 2006.229.04:05:24.18#ibcon#read 4, iclass 16, count 0 2006.229.04:05:24.18#ibcon#about to read 5, iclass 16, count 0 2006.229.04:05:24.18#ibcon#read 5, iclass 16, count 0 2006.229.04:05:24.18#ibcon#about to read 6, iclass 16, count 0 2006.229.04:05:24.18#ibcon#read 6, iclass 16, count 0 2006.229.04:05:24.18#ibcon#end of sib2, iclass 16, count 0 2006.229.04:05:24.18#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:05:24.18#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:05:24.18#ibcon#[25=USB\r\n] 2006.229.04:05:24.18#ibcon#*before write, iclass 16, count 0 2006.229.04:05:24.18#ibcon#enter sib2, iclass 16, count 0 2006.229.04:05:24.18#ibcon#flushed, iclass 16, count 0 2006.229.04:05:24.18#ibcon#about to write, iclass 16, count 0 2006.229.04:05:24.18#ibcon#wrote, iclass 16, count 0 2006.229.04:05:24.18#ibcon#about to read 3, iclass 16, count 0 2006.229.04:05:24.21#ibcon#read 3, iclass 16, count 0 2006.229.04:05:24.21#ibcon#about to read 4, iclass 16, count 0 2006.229.04:05:24.21#ibcon#read 4, iclass 16, count 0 2006.229.04:05:24.21#ibcon#about to read 5, iclass 16, count 0 2006.229.04:05:24.21#ibcon#read 5, iclass 16, count 0 2006.229.04:05:24.21#ibcon#about to read 6, iclass 16, count 0 2006.229.04:05:24.21#ibcon#read 6, iclass 16, count 0 2006.229.04:05:24.21#ibcon#end of sib2, iclass 16, count 0 2006.229.04:05:24.21#ibcon#*after write, iclass 16, count 0 2006.229.04:05:24.21#ibcon#*before return 0, iclass 16, count 0 2006.229.04:05:24.21#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:24.21#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:24.21#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:05:24.21#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:05:24.21$vck44/valo=4,624.99 2006.229.04:05:24.21#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.04:05:24.21#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.04:05:24.21#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:24.21#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:24.21#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:24.21#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:24.21#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:05:24.21#ibcon#first serial, iclass 18, count 0 2006.229.04:05:24.21#ibcon#enter sib2, iclass 18, count 0 2006.229.04:05:24.21#ibcon#flushed, iclass 18, count 0 2006.229.04:05:24.21#ibcon#about to write, iclass 18, count 0 2006.229.04:05:24.21#ibcon#wrote, iclass 18, count 0 2006.229.04:05:24.21#ibcon#about to read 3, iclass 18, count 0 2006.229.04:05:24.23#ibcon#read 3, iclass 18, count 0 2006.229.04:05:24.23#ibcon#about to read 4, iclass 18, count 0 2006.229.04:05:24.23#ibcon#read 4, iclass 18, count 0 2006.229.04:05:24.23#ibcon#about to read 5, iclass 18, count 0 2006.229.04:05:24.23#ibcon#read 5, iclass 18, count 0 2006.229.04:05:24.23#ibcon#about to read 6, iclass 18, count 0 2006.229.04:05:24.23#ibcon#read 6, iclass 18, count 0 2006.229.04:05:24.23#ibcon#end of sib2, iclass 18, count 0 2006.229.04:05:24.23#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:05:24.23#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:05:24.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:05:24.23#ibcon#*before write, iclass 18, count 0 2006.229.04:05:24.23#ibcon#enter sib2, iclass 18, count 0 2006.229.04:05:24.23#ibcon#flushed, iclass 18, count 0 2006.229.04:05:24.23#ibcon#about to write, iclass 18, count 0 2006.229.04:05:24.23#ibcon#wrote, iclass 18, count 0 2006.229.04:05:24.23#ibcon#about to read 3, iclass 18, count 0 2006.229.04:05:24.27#ibcon#read 3, iclass 18, count 0 2006.229.04:05:24.27#ibcon#about to read 4, iclass 18, count 0 2006.229.04:05:24.27#ibcon#read 4, iclass 18, count 0 2006.229.04:05:24.27#ibcon#about to read 5, iclass 18, count 0 2006.229.04:05:24.27#ibcon#read 5, iclass 18, count 0 2006.229.04:05:24.27#ibcon#about to read 6, iclass 18, count 0 2006.229.04:05:24.27#ibcon#read 6, iclass 18, count 0 2006.229.04:05:24.27#ibcon#end of sib2, iclass 18, count 0 2006.229.04:05:24.27#ibcon#*after write, iclass 18, count 0 2006.229.04:05:24.27#ibcon#*before return 0, iclass 18, count 0 2006.229.04:05:24.27#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:24.27#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:24.27#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:05:24.27#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:05:24.27$vck44/va=4,7 2006.229.04:05:24.27#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.04:05:24.27#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.04:05:24.27#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:24.27#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:24.33#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:24.33#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:24.33#ibcon#enter wrdev, iclass 20, count 2 2006.229.04:05:24.33#ibcon#first serial, iclass 20, count 2 2006.229.04:05:24.33#ibcon#enter sib2, iclass 20, count 2 2006.229.04:05:24.33#ibcon#flushed, iclass 20, count 2 2006.229.04:05:24.33#ibcon#about to write, iclass 20, count 2 2006.229.04:05:24.33#ibcon#wrote, iclass 20, count 2 2006.229.04:05:24.33#ibcon#about to read 3, iclass 20, count 2 2006.229.04:05:24.35#ibcon#read 3, iclass 20, count 2 2006.229.04:05:24.35#ibcon#about to read 4, iclass 20, count 2 2006.229.04:05:24.35#ibcon#read 4, iclass 20, count 2 2006.229.04:05:24.35#ibcon#about to read 5, iclass 20, count 2 2006.229.04:05:24.35#ibcon#read 5, iclass 20, count 2 2006.229.04:05:24.35#ibcon#about to read 6, iclass 20, count 2 2006.229.04:05:24.35#ibcon#read 6, iclass 20, count 2 2006.229.04:05:24.35#ibcon#end of sib2, iclass 20, count 2 2006.229.04:05:24.35#ibcon#*mode == 0, iclass 20, count 2 2006.229.04:05:24.35#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.04:05:24.35#ibcon#[25=AT04-07\r\n] 2006.229.04:05:24.35#ibcon#*before write, iclass 20, count 2 2006.229.04:05:24.35#ibcon#enter sib2, iclass 20, count 2 2006.229.04:05:24.35#ibcon#flushed, iclass 20, count 2 2006.229.04:05:24.35#ibcon#about to write, iclass 20, count 2 2006.229.04:05:24.35#ibcon#wrote, iclass 20, count 2 2006.229.04:05:24.35#ibcon#about to read 3, iclass 20, count 2 2006.229.04:05:24.38#ibcon#read 3, iclass 20, count 2 2006.229.04:05:24.38#ibcon#about to read 4, iclass 20, count 2 2006.229.04:05:24.38#ibcon#read 4, iclass 20, count 2 2006.229.04:05:24.38#ibcon#about to read 5, iclass 20, count 2 2006.229.04:05:24.38#ibcon#read 5, iclass 20, count 2 2006.229.04:05:24.38#ibcon#about to read 6, iclass 20, count 2 2006.229.04:05:24.38#ibcon#read 6, iclass 20, count 2 2006.229.04:05:24.38#ibcon#end of sib2, iclass 20, count 2 2006.229.04:05:24.38#ibcon#*after write, iclass 20, count 2 2006.229.04:05:24.40#ibcon#*before return 0, iclass 20, count 2 2006.229.04:05:24.40#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:24.40#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:24.40#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.04:05:24.40#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:24.40#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:24.52#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:24.52#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:24.52#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:05:24.52#ibcon#first serial, iclass 20, count 0 2006.229.04:05:24.52#ibcon#enter sib2, iclass 20, count 0 2006.229.04:05:24.52#ibcon#flushed, iclass 20, count 0 2006.229.04:05:24.52#ibcon#about to write, iclass 20, count 0 2006.229.04:05:24.52#ibcon#wrote, iclass 20, count 0 2006.229.04:05:24.52#ibcon#about to read 3, iclass 20, count 0 2006.229.04:05:24.54#ibcon#read 3, iclass 20, count 0 2006.229.04:05:24.54#ibcon#about to read 4, iclass 20, count 0 2006.229.04:05:24.54#ibcon#read 4, iclass 20, count 0 2006.229.04:05:24.54#ibcon#about to read 5, iclass 20, count 0 2006.229.04:05:24.54#ibcon#read 5, iclass 20, count 0 2006.229.04:05:24.54#ibcon#about to read 6, iclass 20, count 0 2006.229.04:05:24.54#ibcon#read 6, iclass 20, count 0 2006.229.04:05:24.54#ibcon#end of sib2, iclass 20, count 0 2006.229.04:05:24.54#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:05:24.54#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:05:24.54#ibcon#[25=USB\r\n] 2006.229.04:05:24.54#ibcon#*before write, iclass 20, count 0 2006.229.04:05:24.54#ibcon#enter sib2, iclass 20, count 0 2006.229.04:05:24.54#ibcon#flushed, iclass 20, count 0 2006.229.04:05:24.54#ibcon#about to write, iclass 20, count 0 2006.229.04:05:24.54#ibcon#wrote, iclass 20, count 0 2006.229.04:05:24.54#ibcon#about to read 3, iclass 20, count 0 2006.229.04:05:24.57#ibcon#read 3, iclass 20, count 0 2006.229.04:05:24.57#ibcon#about to read 4, iclass 20, count 0 2006.229.04:05:24.57#ibcon#read 4, iclass 20, count 0 2006.229.04:05:24.57#ibcon#about to read 5, iclass 20, count 0 2006.229.04:05:24.57#ibcon#read 5, iclass 20, count 0 2006.229.04:05:24.57#ibcon#about to read 6, iclass 20, count 0 2006.229.04:05:24.57#ibcon#read 6, iclass 20, count 0 2006.229.04:05:24.57#ibcon#end of sib2, iclass 20, count 0 2006.229.04:05:24.57#ibcon#*after write, iclass 20, count 0 2006.229.04:05:24.57#ibcon#*before return 0, iclass 20, count 0 2006.229.04:05:24.57#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:24.57#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:24.57#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:05:24.57#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:05:24.57$vck44/valo=5,734.99 2006.229.04:05:24.57#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.04:05:24.57#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.04:05:24.57#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:24.57#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:24.57#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:24.57#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:24.57#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:05:24.57#ibcon#first serial, iclass 22, count 0 2006.229.04:05:24.57#ibcon#enter sib2, iclass 22, count 0 2006.229.04:05:24.57#ibcon#flushed, iclass 22, count 0 2006.229.04:05:24.57#ibcon#about to write, iclass 22, count 0 2006.229.04:05:24.57#ibcon#wrote, iclass 22, count 0 2006.229.04:05:24.57#ibcon#about to read 3, iclass 22, count 0 2006.229.04:05:24.59#ibcon#read 3, iclass 22, count 0 2006.229.04:05:24.59#ibcon#about to read 4, iclass 22, count 0 2006.229.04:05:24.59#ibcon#read 4, iclass 22, count 0 2006.229.04:05:24.59#ibcon#about to read 5, iclass 22, count 0 2006.229.04:05:24.59#ibcon#read 5, iclass 22, count 0 2006.229.04:05:24.59#ibcon#about to read 6, iclass 22, count 0 2006.229.04:05:24.59#ibcon#read 6, iclass 22, count 0 2006.229.04:05:24.59#ibcon#end of sib2, iclass 22, count 0 2006.229.04:05:24.59#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:05:24.59#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:05:24.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:05:24.59#ibcon#*before write, iclass 22, count 0 2006.229.04:05:24.59#ibcon#enter sib2, iclass 22, count 0 2006.229.04:05:24.59#ibcon#flushed, iclass 22, count 0 2006.229.04:05:24.59#ibcon#about to write, iclass 22, count 0 2006.229.04:05:24.59#ibcon#wrote, iclass 22, count 0 2006.229.04:05:24.59#ibcon#about to read 3, iclass 22, count 0 2006.229.04:05:24.63#ibcon#read 3, iclass 22, count 0 2006.229.04:05:24.63#ibcon#about to read 4, iclass 22, count 0 2006.229.04:05:24.63#ibcon#read 4, iclass 22, count 0 2006.229.04:05:24.63#ibcon#about to read 5, iclass 22, count 0 2006.229.04:05:24.63#ibcon#read 5, iclass 22, count 0 2006.229.04:05:24.63#ibcon#about to read 6, iclass 22, count 0 2006.229.04:05:24.63#ibcon#read 6, iclass 22, count 0 2006.229.04:05:24.63#ibcon#end of sib2, iclass 22, count 0 2006.229.04:05:24.63#ibcon#*after write, iclass 22, count 0 2006.229.04:05:24.63#ibcon#*before return 0, iclass 22, count 0 2006.229.04:05:24.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:24.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:24.63#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:05:24.63#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:05:24.63$vck44/va=5,4 2006.229.04:05:24.63#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:05:24.63#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:05:24.63#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:24.63#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:24.69#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:24.69#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:24.69#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:05:24.69#ibcon#first serial, iclass 24, count 2 2006.229.04:05:24.69#ibcon#enter sib2, iclass 24, count 2 2006.229.04:05:24.69#ibcon#flushed, iclass 24, count 2 2006.229.04:05:24.69#ibcon#about to write, iclass 24, count 2 2006.229.04:05:24.69#ibcon#wrote, iclass 24, count 2 2006.229.04:05:24.69#ibcon#about to read 3, iclass 24, count 2 2006.229.04:05:24.71#ibcon#read 3, iclass 24, count 2 2006.229.04:05:24.71#ibcon#about to read 4, iclass 24, count 2 2006.229.04:05:24.71#ibcon#read 4, iclass 24, count 2 2006.229.04:05:24.71#ibcon#about to read 5, iclass 24, count 2 2006.229.04:05:24.71#ibcon#read 5, iclass 24, count 2 2006.229.04:05:24.71#ibcon#about to read 6, iclass 24, count 2 2006.229.04:05:24.71#ibcon#read 6, iclass 24, count 2 2006.229.04:05:24.71#ibcon#end of sib2, iclass 24, count 2 2006.229.04:05:24.71#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:05:24.71#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:05:24.71#ibcon#[25=AT05-04\r\n] 2006.229.04:05:24.71#ibcon#*before write, iclass 24, count 2 2006.229.04:05:24.71#ibcon#enter sib2, iclass 24, count 2 2006.229.04:05:24.71#ibcon#flushed, iclass 24, count 2 2006.229.04:05:24.71#ibcon#about to write, iclass 24, count 2 2006.229.04:05:24.71#ibcon#wrote, iclass 24, count 2 2006.229.04:05:24.71#ibcon#about to read 3, iclass 24, count 2 2006.229.04:05:24.74#ibcon#read 3, iclass 24, count 2 2006.229.04:05:24.74#ibcon#about to read 4, iclass 24, count 2 2006.229.04:05:24.74#ibcon#read 4, iclass 24, count 2 2006.229.04:05:24.74#ibcon#about to read 5, iclass 24, count 2 2006.229.04:05:24.74#ibcon#read 5, iclass 24, count 2 2006.229.04:05:24.74#ibcon#about to read 6, iclass 24, count 2 2006.229.04:05:24.74#ibcon#read 6, iclass 24, count 2 2006.229.04:05:24.74#ibcon#end of sib2, iclass 24, count 2 2006.229.04:05:24.74#ibcon#*after write, iclass 24, count 2 2006.229.04:05:24.74#ibcon#*before return 0, iclass 24, count 2 2006.229.04:05:24.74#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:24.74#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:24.74#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:05:24.74#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:24.74#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:24.86#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:24.86#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:24.86#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:05:24.86#ibcon#first serial, iclass 24, count 0 2006.229.04:05:24.86#ibcon#enter sib2, iclass 24, count 0 2006.229.04:05:24.86#ibcon#flushed, iclass 24, count 0 2006.229.04:05:24.86#ibcon#about to write, iclass 24, count 0 2006.229.04:05:24.86#ibcon#wrote, iclass 24, count 0 2006.229.04:05:24.86#ibcon#about to read 3, iclass 24, count 0 2006.229.04:05:24.88#ibcon#read 3, iclass 24, count 0 2006.229.04:05:24.88#ibcon#about to read 4, iclass 24, count 0 2006.229.04:05:24.88#ibcon#read 4, iclass 24, count 0 2006.229.04:05:24.88#ibcon#about to read 5, iclass 24, count 0 2006.229.04:05:24.88#ibcon#read 5, iclass 24, count 0 2006.229.04:05:24.88#ibcon#about to read 6, iclass 24, count 0 2006.229.04:05:24.88#ibcon#read 6, iclass 24, count 0 2006.229.04:05:24.88#ibcon#end of sib2, iclass 24, count 0 2006.229.04:05:24.88#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:05:24.88#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:05:24.88#ibcon#[25=USB\r\n] 2006.229.04:05:24.88#ibcon#*before write, iclass 24, count 0 2006.229.04:05:24.88#ibcon#enter sib2, iclass 24, count 0 2006.229.04:05:24.88#ibcon#flushed, iclass 24, count 0 2006.229.04:05:24.88#ibcon#about to write, iclass 24, count 0 2006.229.04:05:24.88#ibcon#wrote, iclass 24, count 0 2006.229.04:05:24.88#ibcon#about to read 3, iclass 24, count 0 2006.229.04:05:24.91#ibcon#read 3, iclass 24, count 0 2006.229.04:05:24.91#ibcon#about to read 4, iclass 24, count 0 2006.229.04:05:24.91#ibcon#read 4, iclass 24, count 0 2006.229.04:05:24.91#ibcon#about to read 5, iclass 24, count 0 2006.229.04:05:24.91#ibcon#read 5, iclass 24, count 0 2006.229.04:05:24.91#ibcon#about to read 6, iclass 24, count 0 2006.229.04:05:24.91#ibcon#read 6, iclass 24, count 0 2006.229.04:05:24.91#ibcon#end of sib2, iclass 24, count 0 2006.229.04:05:24.91#ibcon#*after write, iclass 24, count 0 2006.229.04:05:24.91#ibcon#*before return 0, iclass 24, count 0 2006.229.04:05:24.91#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:24.91#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:24.91#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:05:24.91#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:05:24.91$vck44/valo=6,814.99 2006.229.04:05:24.91#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.04:05:24.91#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.04:05:24.91#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:24.91#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:24.91#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:24.91#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:24.91#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:05:24.91#ibcon#first serial, iclass 26, count 0 2006.229.04:05:24.91#ibcon#enter sib2, iclass 26, count 0 2006.229.04:05:24.91#ibcon#flushed, iclass 26, count 0 2006.229.04:05:24.91#ibcon#about to write, iclass 26, count 0 2006.229.04:05:24.91#ibcon#wrote, iclass 26, count 0 2006.229.04:05:24.91#ibcon#about to read 3, iclass 26, count 0 2006.229.04:05:24.93#ibcon#read 3, iclass 26, count 0 2006.229.04:05:24.93#ibcon#about to read 4, iclass 26, count 0 2006.229.04:05:24.93#ibcon#read 4, iclass 26, count 0 2006.229.04:05:24.93#ibcon#about to read 5, iclass 26, count 0 2006.229.04:05:24.93#ibcon#read 5, iclass 26, count 0 2006.229.04:05:24.93#ibcon#about to read 6, iclass 26, count 0 2006.229.04:05:24.93#ibcon#read 6, iclass 26, count 0 2006.229.04:05:24.93#ibcon#end of sib2, iclass 26, count 0 2006.229.04:05:24.93#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:05:24.93#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:05:24.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:05:24.93#ibcon#*before write, iclass 26, count 0 2006.229.04:05:24.93#ibcon#enter sib2, iclass 26, count 0 2006.229.04:05:24.93#ibcon#flushed, iclass 26, count 0 2006.229.04:05:24.93#ibcon#about to write, iclass 26, count 0 2006.229.04:05:24.93#ibcon#wrote, iclass 26, count 0 2006.229.04:05:24.93#ibcon#about to read 3, iclass 26, count 0 2006.229.04:05:24.97#ibcon#read 3, iclass 26, count 0 2006.229.04:05:24.97#ibcon#about to read 4, iclass 26, count 0 2006.229.04:05:24.97#ibcon#read 4, iclass 26, count 0 2006.229.04:05:24.97#ibcon#about to read 5, iclass 26, count 0 2006.229.04:05:24.97#ibcon#read 5, iclass 26, count 0 2006.229.04:05:24.97#ibcon#about to read 6, iclass 26, count 0 2006.229.04:05:24.97#ibcon#read 6, iclass 26, count 0 2006.229.04:05:24.97#ibcon#end of sib2, iclass 26, count 0 2006.229.04:05:24.97#ibcon#*after write, iclass 26, count 0 2006.229.04:05:24.97#ibcon#*before return 0, iclass 26, count 0 2006.229.04:05:24.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:24.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:24.97#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:05:24.97#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:05:24.97$vck44/va=6,4 2006.229.04:05:24.97#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.04:05:24.97#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.04:05:24.97#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:24.97#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:25.03#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:25.03#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:25.03#ibcon#enter wrdev, iclass 28, count 2 2006.229.04:05:25.03#ibcon#first serial, iclass 28, count 2 2006.229.04:05:25.03#ibcon#enter sib2, iclass 28, count 2 2006.229.04:05:25.03#ibcon#flushed, iclass 28, count 2 2006.229.04:05:25.03#ibcon#about to write, iclass 28, count 2 2006.229.04:05:25.03#ibcon#wrote, iclass 28, count 2 2006.229.04:05:25.03#ibcon#about to read 3, iclass 28, count 2 2006.229.04:05:25.05#ibcon#read 3, iclass 28, count 2 2006.229.04:05:25.05#ibcon#about to read 4, iclass 28, count 2 2006.229.04:05:25.05#ibcon#read 4, iclass 28, count 2 2006.229.04:05:25.05#ibcon#about to read 5, iclass 28, count 2 2006.229.04:05:25.05#ibcon#read 5, iclass 28, count 2 2006.229.04:05:25.05#ibcon#about to read 6, iclass 28, count 2 2006.229.04:05:25.05#ibcon#read 6, iclass 28, count 2 2006.229.04:05:25.05#ibcon#end of sib2, iclass 28, count 2 2006.229.04:05:25.05#ibcon#*mode == 0, iclass 28, count 2 2006.229.04:05:25.05#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.04:05:25.05#ibcon#[25=AT06-04\r\n] 2006.229.04:05:25.05#ibcon#*before write, iclass 28, count 2 2006.229.04:05:25.05#ibcon#enter sib2, iclass 28, count 2 2006.229.04:05:25.05#ibcon#flushed, iclass 28, count 2 2006.229.04:05:25.05#ibcon#about to write, iclass 28, count 2 2006.229.04:05:25.05#ibcon#wrote, iclass 28, count 2 2006.229.04:05:25.05#ibcon#about to read 3, iclass 28, count 2 2006.229.04:05:25.08#ibcon#read 3, iclass 28, count 2 2006.229.04:05:25.08#ibcon#about to read 4, iclass 28, count 2 2006.229.04:05:25.08#ibcon#read 4, iclass 28, count 2 2006.229.04:05:25.08#ibcon#about to read 5, iclass 28, count 2 2006.229.04:05:25.08#ibcon#read 5, iclass 28, count 2 2006.229.04:05:25.08#ibcon#about to read 6, iclass 28, count 2 2006.229.04:05:25.08#ibcon#read 6, iclass 28, count 2 2006.229.04:05:25.08#ibcon#end of sib2, iclass 28, count 2 2006.229.04:05:25.08#ibcon#*after write, iclass 28, count 2 2006.229.04:05:25.08#ibcon#*before return 0, iclass 28, count 2 2006.229.04:05:25.08#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:25.08#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:25.08#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.04:05:25.08#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:25.08#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:25.20#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:25.20#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:25.20#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:05:25.20#ibcon#first serial, iclass 28, count 0 2006.229.04:05:25.20#ibcon#enter sib2, iclass 28, count 0 2006.229.04:05:25.20#ibcon#flushed, iclass 28, count 0 2006.229.04:05:25.20#ibcon#about to write, iclass 28, count 0 2006.229.04:05:25.20#ibcon#wrote, iclass 28, count 0 2006.229.04:05:25.20#ibcon#about to read 3, iclass 28, count 0 2006.229.04:05:25.22#ibcon#read 3, iclass 28, count 0 2006.229.04:05:25.22#ibcon#about to read 4, iclass 28, count 0 2006.229.04:05:25.22#ibcon#read 4, iclass 28, count 0 2006.229.04:05:25.22#ibcon#about to read 5, iclass 28, count 0 2006.229.04:05:25.22#ibcon#read 5, iclass 28, count 0 2006.229.04:05:25.22#ibcon#about to read 6, iclass 28, count 0 2006.229.04:05:25.22#ibcon#read 6, iclass 28, count 0 2006.229.04:05:25.22#ibcon#end of sib2, iclass 28, count 0 2006.229.04:05:25.22#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:05:25.22#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:05:25.22#ibcon#[25=USB\r\n] 2006.229.04:05:25.22#ibcon#*before write, iclass 28, count 0 2006.229.04:05:25.22#ibcon#enter sib2, iclass 28, count 0 2006.229.04:05:25.22#ibcon#flushed, iclass 28, count 0 2006.229.04:05:25.22#ibcon#about to write, iclass 28, count 0 2006.229.04:05:25.22#ibcon#wrote, iclass 28, count 0 2006.229.04:05:25.22#ibcon#about to read 3, iclass 28, count 0 2006.229.04:05:25.25#ibcon#read 3, iclass 28, count 0 2006.229.04:05:25.25#ibcon#about to read 4, iclass 28, count 0 2006.229.04:05:25.25#ibcon#read 4, iclass 28, count 0 2006.229.04:05:25.25#ibcon#about to read 5, iclass 28, count 0 2006.229.04:05:25.25#ibcon#read 5, iclass 28, count 0 2006.229.04:05:25.25#ibcon#about to read 6, iclass 28, count 0 2006.229.04:05:25.25#ibcon#read 6, iclass 28, count 0 2006.229.04:05:25.25#ibcon#end of sib2, iclass 28, count 0 2006.229.04:05:25.25#ibcon#*after write, iclass 28, count 0 2006.229.04:05:25.25#ibcon#*before return 0, iclass 28, count 0 2006.229.04:05:25.25#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:25.25#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:25.25#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:05:25.25#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:05:25.25$vck44/valo=7,864.99 2006.229.04:05:25.25#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.04:05:25.25#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.04:05:25.25#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:25.25#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:25.25#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:25.25#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:25.25#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:05:25.25#ibcon#first serial, iclass 30, count 0 2006.229.04:05:25.25#ibcon#enter sib2, iclass 30, count 0 2006.229.04:05:25.25#ibcon#flushed, iclass 30, count 0 2006.229.04:05:25.25#ibcon#about to write, iclass 30, count 0 2006.229.04:05:25.25#ibcon#wrote, iclass 30, count 0 2006.229.04:05:25.25#ibcon#about to read 3, iclass 30, count 0 2006.229.04:05:25.27#ibcon#read 3, iclass 30, count 0 2006.229.04:05:25.27#ibcon#about to read 4, iclass 30, count 0 2006.229.04:05:25.27#ibcon#read 4, iclass 30, count 0 2006.229.04:05:25.27#ibcon#about to read 5, iclass 30, count 0 2006.229.04:05:25.27#ibcon#read 5, iclass 30, count 0 2006.229.04:05:25.27#ibcon#about to read 6, iclass 30, count 0 2006.229.04:05:25.27#ibcon#read 6, iclass 30, count 0 2006.229.04:05:25.27#ibcon#end of sib2, iclass 30, count 0 2006.229.04:05:25.27#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:05:25.27#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:05:25.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:05:25.27#ibcon#*before write, iclass 30, count 0 2006.229.04:05:25.27#ibcon#enter sib2, iclass 30, count 0 2006.229.04:05:25.27#ibcon#flushed, iclass 30, count 0 2006.229.04:05:25.27#ibcon#about to write, iclass 30, count 0 2006.229.04:05:25.27#ibcon#wrote, iclass 30, count 0 2006.229.04:05:25.27#ibcon#about to read 3, iclass 30, count 0 2006.229.04:05:25.31#ibcon#read 3, iclass 30, count 0 2006.229.04:05:25.31#ibcon#about to read 4, iclass 30, count 0 2006.229.04:05:25.31#ibcon#read 4, iclass 30, count 0 2006.229.04:05:25.31#ibcon#about to read 5, iclass 30, count 0 2006.229.04:05:25.31#ibcon#read 5, iclass 30, count 0 2006.229.04:05:25.31#ibcon#about to read 6, iclass 30, count 0 2006.229.04:05:25.31#ibcon#read 6, iclass 30, count 0 2006.229.04:05:25.31#ibcon#end of sib2, iclass 30, count 0 2006.229.04:05:25.31#ibcon#*after write, iclass 30, count 0 2006.229.04:05:25.31#ibcon#*before return 0, iclass 30, count 0 2006.229.04:05:25.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:25.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:25.31#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:05:25.31#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:05:25.31$vck44/va=7,5 2006.229.04:05:25.31#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:05:25.31#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:05:25.31#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:25.31#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:25.37#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:25.37#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:25.37#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:05:25.37#ibcon#first serial, iclass 32, count 2 2006.229.04:05:25.37#ibcon#enter sib2, iclass 32, count 2 2006.229.04:05:25.37#ibcon#flushed, iclass 32, count 2 2006.229.04:05:25.37#ibcon#about to write, iclass 32, count 2 2006.229.04:05:25.37#ibcon#wrote, iclass 32, count 2 2006.229.04:05:25.37#ibcon#about to read 3, iclass 32, count 2 2006.229.04:05:25.39#ibcon#read 3, iclass 32, count 2 2006.229.04:05:25.39#ibcon#about to read 4, iclass 32, count 2 2006.229.04:05:25.39#ibcon#read 4, iclass 32, count 2 2006.229.04:05:25.39#ibcon#about to read 5, iclass 32, count 2 2006.229.04:05:25.39#ibcon#read 5, iclass 32, count 2 2006.229.04:05:25.39#ibcon#about to read 6, iclass 32, count 2 2006.229.04:05:25.39#ibcon#read 6, iclass 32, count 2 2006.229.04:05:25.39#ibcon#end of sib2, iclass 32, count 2 2006.229.04:05:25.39#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:05:25.39#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:05:25.39#ibcon#[25=AT07-05\r\n] 2006.229.04:05:25.39#ibcon#*before write, iclass 32, count 2 2006.229.04:05:25.39#ibcon#enter sib2, iclass 32, count 2 2006.229.04:05:25.39#ibcon#flushed, iclass 32, count 2 2006.229.04:05:25.39#ibcon#about to write, iclass 32, count 2 2006.229.04:05:25.39#ibcon#wrote, iclass 32, count 2 2006.229.04:05:25.39#ibcon#about to read 3, iclass 32, count 2 2006.229.04:05:25.42#ibcon#read 3, iclass 32, count 2 2006.229.04:05:25.42#ibcon#about to read 4, iclass 32, count 2 2006.229.04:05:25.42#ibcon#read 4, iclass 32, count 2 2006.229.04:05:25.42#ibcon#about to read 5, iclass 32, count 2 2006.229.04:05:25.42#ibcon#read 5, iclass 32, count 2 2006.229.04:05:25.42#ibcon#about to read 6, iclass 32, count 2 2006.229.04:05:25.42#ibcon#read 6, iclass 32, count 2 2006.229.04:05:25.42#ibcon#end of sib2, iclass 32, count 2 2006.229.04:05:25.42#ibcon#*after write, iclass 32, count 2 2006.229.04:05:25.42#ibcon#*before return 0, iclass 32, count 2 2006.229.04:05:25.42#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:25.42#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:25.42#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:05:25.42#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:25.42#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:25.54#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:25.54#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:25.54#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:05:25.54#ibcon#first serial, iclass 32, count 0 2006.229.04:05:25.54#ibcon#enter sib2, iclass 32, count 0 2006.229.04:05:25.54#ibcon#flushed, iclass 32, count 0 2006.229.04:05:25.54#ibcon#about to write, iclass 32, count 0 2006.229.04:05:25.54#ibcon#wrote, iclass 32, count 0 2006.229.04:05:25.54#ibcon#about to read 3, iclass 32, count 0 2006.229.04:05:25.56#ibcon#read 3, iclass 32, count 0 2006.229.04:05:25.56#ibcon#about to read 4, iclass 32, count 0 2006.229.04:05:25.56#ibcon#read 4, iclass 32, count 0 2006.229.04:05:25.56#ibcon#about to read 5, iclass 32, count 0 2006.229.04:05:25.56#ibcon#read 5, iclass 32, count 0 2006.229.04:05:25.56#ibcon#about to read 6, iclass 32, count 0 2006.229.04:05:25.56#ibcon#read 6, iclass 32, count 0 2006.229.04:05:25.56#ibcon#end of sib2, iclass 32, count 0 2006.229.04:05:25.56#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:05:25.56#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:05:25.56#ibcon#[25=USB\r\n] 2006.229.04:05:25.56#ibcon#*before write, iclass 32, count 0 2006.229.04:05:25.56#ibcon#enter sib2, iclass 32, count 0 2006.229.04:05:25.56#ibcon#flushed, iclass 32, count 0 2006.229.04:05:25.56#ibcon#about to write, iclass 32, count 0 2006.229.04:05:25.56#ibcon#wrote, iclass 32, count 0 2006.229.04:05:25.56#ibcon#about to read 3, iclass 32, count 0 2006.229.04:05:25.59#ibcon#read 3, iclass 32, count 0 2006.229.04:05:25.59#ibcon#about to read 4, iclass 32, count 0 2006.229.04:05:25.59#ibcon#read 4, iclass 32, count 0 2006.229.04:05:25.59#ibcon#about to read 5, iclass 32, count 0 2006.229.04:05:25.59#ibcon#read 5, iclass 32, count 0 2006.229.04:05:25.59#ibcon#about to read 6, iclass 32, count 0 2006.229.04:05:25.59#ibcon#read 6, iclass 32, count 0 2006.229.04:05:25.59#ibcon#end of sib2, iclass 32, count 0 2006.229.04:05:25.59#ibcon#*after write, iclass 32, count 0 2006.229.04:05:25.59#ibcon#*before return 0, iclass 32, count 0 2006.229.04:05:25.59#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:25.59#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:25.59#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:05:25.59#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:05:25.59$vck44/valo=8,884.99 2006.229.04:05:25.59#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.04:05:25.59#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.04:05:25.59#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:25.59#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:25.59#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:25.59#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:25.59#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:05:25.59#ibcon#first serial, iclass 34, count 0 2006.229.04:05:25.59#ibcon#enter sib2, iclass 34, count 0 2006.229.04:05:25.59#ibcon#flushed, iclass 34, count 0 2006.229.04:05:25.59#ibcon#about to write, iclass 34, count 0 2006.229.04:05:25.59#ibcon#wrote, iclass 34, count 0 2006.229.04:05:25.59#ibcon#about to read 3, iclass 34, count 0 2006.229.04:05:25.61#ibcon#read 3, iclass 34, count 0 2006.229.04:05:25.61#ibcon#about to read 4, iclass 34, count 0 2006.229.04:05:25.61#ibcon#read 4, iclass 34, count 0 2006.229.04:05:25.61#ibcon#about to read 5, iclass 34, count 0 2006.229.04:05:25.61#ibcon#read 5, iclass 34, count 0 2006.229.04:05:25.61#ibcon#about to read 6, iclass 34, count 0 2006.229.04:05:25.61#ibcon#read 6, iclass 34, count 0 2006.229.04:05:25.61#ibcon#end of sib2, iclass 34, count 0 2006.229.04:05:25.61#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:05:25.61#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:05:25.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:05:25.61#ibcon#*before write, iclass 34, count 0 2006.229.04:05:25.61#ibcon#enter sib2, iclass 34, count 0 2006.229.04:05:25.61#ibcon#flushed, iclass 34, count 0 2006.229.04:05:25.61#ibcon#about to write, iclass 34, count 0 2006.229.04:05:25.61#ibcon#wrote, iclass 34, count 0 2006.229.04:05:25.61#ibcon#about to read 3, iclass 34, count 0 2006.229.04:05:25.65#ibcon#read 3, iclass 34, count 0 2006.229.04:05:25.65#ibcon#about to read 4, iclass 34, count 0 2006.229.04:05:25.65#ibcon#read 4, iclass 34, count 0 2006.229.04:05:25.65#ibcon#about to read 5, iclass 34, count 0 2006.229.04:05:25.65#ibcon#read 5, iclass 34, count 0 2006.229.04:05:25.65#ibcon#about to read 6, iclass 34, count 0 2006.229.04:05:25.65#ibcon#read 6, iclass 34, count 0 2006.229.04:05:25.65#ibcon#end of sib2, iclass 34, count 0 2006.229.04:05:25.65#ibcon#*after write, iclass 34, count 0 2006.229.04:05:25.65#ibcon#*before return 0, iclass 34, count 0 2006.229.04:05:25.65#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:25.65#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:25.65#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:05:25.65#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:05:25.65$vck44/va=8,6 2006.229.04:05:25.65#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.04:05:25.65#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.04:05:25.65#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:25.65#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:05:25.71#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:05:25.71#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:05:25.71#ibcon#enter wrdev, iclass 36, count 2 2006.229.04:05:25.71#ibcon#first serial, iclass 36, count 2 2006.229.04:05:25.71#ibcon#enter sib2, iclass 36, count 2 2006.229.04:05:25.71#ibcon#flushed, iclass 36, count 2 2006.229.04:05:25.71#ibcon#about to write, iclass 36, count 2 2006.229.04:05:25.71#ibcon#wrote, iclass 36, count 2 2006.229.04:05:25.71#ibcon#about to read 3, iclass 36, count 2 2006.229.04:05:25.73#ibcon#read 3, iclass 36, count 2 2006.229.04:05:25.73#ibcon#about to read 4, iclass 36, count 2 2006.229.04:05:25.73#ibcon#read 4, iclass 36, count 2 2006.229.04:05:25.73#ibcon#about to read 5, iclass 36, count 2 2006.229.04:05:25.73#ibcon#read 5, iclass 36, count 2 2006.229.04:05:25.73#ibcon#about to read 6, iclass 36, count 2 2006.229.04:05:25.73#ibcon#read 6, iclass 36, count 2 2006.229.04:05:25.73#ibcon#end of sib2, iclass 36, count 2 2006.229.04:05:25.73#ibcon#*mode == 0, iclass 36, count 2 2006.229.04:05:25.73#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.04:05:25.73#ibcon#[25=AT08-06\r\n] 2006.229.04:05:25.73#ibcon#*before write, iclass 36, count 2 2006.229.04:05:25.73#ibcon#enter sib2, iclass 36, count 2 2006.229.04:05:25.73#ibcon#flushed, iclass 36, count 2 2006.229.04:05:25.73#ibcon#about to write, iclass 36, count 2 2006.229.04:05:25.73#ibcon#wrote, iclass 36, count 2 2006.229.04:05:25.73#ibcon#about to read 3, iclass 36, count 2 2006.229.04:05:25.76#ibcon#read 3, iclass 36, count 2 2006.229.04:05:25.76#ibcon#about to read 4, iclass 36, count 2 2006.229.04:05:25.76#ibcon#read 4, iclass 36, count 2 2006.229.04:05:25.76#ibcon#about to read 5, iclass 36, count 2 2006.229.04:05:25.76#ibcon#read 5, iclass 36, count 2 2006.229.04:05:25.76#ibcon#about to read 6, iclass 36, count 2 2006.229.04:05:25.76#ibcon#read 6, iclass 36, count 2 2006.229.04:05:25.76#ibcon#end of sib2, iclass 36, count 2 2006.229.04:05:25.76#ibcon#*after write, iclass 36, count 2 2006.229.04:05:25.76#ibcon#*before return 0, iclass 36, count 2 2006.229.04:05:25.76#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:05:25.76#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:05:25.76#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.04:05:25.76#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:25.76#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:05:25.88#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:05:25.88#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:05:25.88#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:05:25.88#ibcon#first serial, iclass 36, count 0 2006.229.04:05:25.88#ibcon#enter sib2, iclass 36, count 0 2006.229.04:05:25.88#ibcon#flushed, iclass 36, count 0 2006.229.04:05:25.88#ibcon#about to write, iclass 36, count 0 2006.229.04:05:25.88#ibcon#wrote, iclass 36, count 0 2006.229.04:05:25.88#ibcon#about to read 3, iclass 36, count 0 2006.229.04:05:25.90#ibcon#read 3, iclass 36, count 0 2006.229.04:05:25.90#ibcon#about to read 4, iclass 36, count 0 2006.229.04:05:25.90#ibcon#read 4, iclass 36, count 0 2006.229.04:05:25.90#ibcon#about to read 5, iclass 36, count 0 2006.229.04:05:25.90#ibcon#read 5, iclass 36, count 0 2006.229.04:05:25.90#ibcon#about to read 6, iclass 36, count 0 2006.229.04:05:25.90#ibcon#read 6, iclass 36, count 0 2006.229.04:05:25.90#ibcon#end of sib2, iclass 36, count 0 2006.229.04:05:25.90#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:05:25.90#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:05:25.90#ibcon#[25=USB\r\n] 2006.229.04:05:25.90#ibcon#*before write, iclass 36, count 0 2006.229.04:05:25.90#ibcon#enter sib2, iclass 36, count 0 2006.229.04:05:25.90#ibcon#flushed, iclass 36, count 0 2006.229.04:05:25.90#ibcon#about to write, iclass 36, count 0 2006.229.04:05:25.90#ibcon#wrote, iclass 36, count 0 2006.229.04:05:25.90#ibcon#about to read 3, iclass 36, count 0 2006.229.04:05:25.93#ibcon#read 3, iclass 36, count 0 2006.229.04:05:25.93#ibcon#about to read 4, iclass 36, count 0 2006.229.04:05:25.93#ibcon#read 4, iclass 36, count 0 2006.229.04:05:25.93#ibcon#about to read 5, iclass 36, count 0 2006.229.04:05:25.93#ibcon#read 5, iclass 36, count 0 2006.229.04:05:25.93#ibcon#about to read 6, iclass 36, count 0 2006.229.04:05:25.93#ibcon#read 6, iclass 36, count 0 2006.229.04:05:25.93#ibcon#end of sib2, iclass 36, count 0 2006.229.04:05:25.93#ibcon#*after write, iclass 36, count 0 2006.229.04:05:25.93#ibcon#*before return 0, iclass 36, count 0 2006.229.04:05:25.93#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:05:25.93#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:05:25.93#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:05:25.93#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:05:25.93$vck44/vblo=1,629.99 2006.229.04:05:25.93#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.04:05:25.93#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.04:05:25.93#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:25.93#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:05:25.93#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:05:25.93#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:05:25.93#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:05:25.93#ibcon#first serial, iclass 38, count 0 2006.229.04:05:25.93#ibcon#enter sib2, iclass 38, count 0 2006.229.04:05:25.93#ibcon#flushed, iclass 38, count 0 2006.229.04:05:25.93#ibcon#about to write, iclass 38, count 0 2006.229.04:05:25.93#ibcon#wrote, iclass 38, count 0 2006.229.04:05:25.93#ibcon#about to read 3, iclass 38, count 0 2006.229.04:05:25.95#ibcon#read 3, iclass 38, count 0 2006.229.04:05:25.95#ibcon#about to read 4, iclass 38, count 0 2006.229.04:05:25.95#ibcon#read 4, iclass 38, count 0 2006.229.04:05:25.95#ibcon#about to read 5, iclass 38, count 0 2006.229.04:05:25.95#ibcon#read 5, iclass 38, count 0 2006.229.04:05:25.95#ibcon#about to read 6, iclass 38, count 0 2006.229.04:05:25.95#ibcon#read 6, iclass 38, count 0 2006.229.04:05:25.95#ibcon#end of sib2, iclass 38, count 0 2006.229.04:05:25.95#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:05:25.95#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:05:25.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:05:25.95#ibcon#*before write, iclass 38, count 0 2006.229.04:05:25.95#ibcon#enter sib2, iclass 38, count 0 2006.229.04:05:25.95#ibcon#flushed, iclass 38, count 0 2006.229.04:05:25.95#ibcon#about to write, iclass 38, count 0 2006.229.04:05:25.95#ibcon#wrote, iclass 38, count 0 2006.229.04:05:25.95#ibcon#about to read 3, iclass 38, count 0 2006.229.04:05:25.99#ibcon#read 3, iclass 38, count 0 2006.229.04:05:25.99#ibcon#about to read 4, iclass 38, count 0 2006.229.04:05:25.99#ibcon#read 4, iclass 38, count 0 2006.229.04:05:25.99#ibcon#about to read 5, iclass 38, count 0 2006.229.04:05:25.99#ibcon#read 5, iclass 38, count 0 2006.229.04:05:25.99#ibcon#about to read 6, iclass 38, count 0 2006.229.04:05:25.99#ibcon#read 6, iclass 38, count 0 2006.229.04:05:25.99#ibcon#end of sib2, iclass 38, count 0 2006.229.04:05:25.99#ibcon#*after write, iclass 38, count 0 2006.229.04:05:25.99#ibcon#*before return 0, iclass 38, count 0 2006.229.04:05:25.99#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:05:25.99#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:05:25.99#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:05:25.99#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:05:25.99$vck44/vb=1,4 2006.229.04:05:25.99#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.04:05:25.99#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.04:05:25.99#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:25.99#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:05:25.99#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:05:25.99#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:05:25.99#ibcon#enter wrdev, iclass 40, count 2 2006.229.04:05:25.99#ibcon#first serial, iclass 40, count 2 2006.229.04:05:25.99#ibcon#enter sib2, iclass 40, count 2 2006.229.04:05:25.99#ibcon#flushed, iclass 40, count 2 2006.229.04:05:25.99#ibcon#about to write, iclass 40, count 2 2006.229.04:05:25.99#ibcon#wrote, iclass 40, count 2 2006.229.04:05:25.99#ibcon#about to read 3, iclass 40, count 2 2006.229.04:05:26.01#ibcon#read 3, iclass 40, count 2 2006.229.04:05:26.01#ibcon#about to read 4, iclass 40, count 2 2006.229.04:05:26.01#ibcon#read 4, iclass 40, count 2 2006.229.04:05:26.01#ibcon#about to read 5, iclass 40, count 2 2006.229.04:05:26.01#ibcon#read 5, iclass 40, count 2 2006.229.04:05:26.01#ibcon#about to read 6, iclass 40, count 2 2006.229.04:05:26.01#ibcon#read 6, iclass 40, count 2 2006.229.04:05:26.01#ibcon#end of sib2, iclass 40, count 2 2006.229.04:05:26.01#ibcon#*mode == 0, iclass 40, count 2 2006.229.04:05:26.01#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.04:05:26.01#ibcon#[27=AT01-04\r\n] 2006.229.04:05:26.01#ibcon#*before write, iclass 40, count 2 2006.229.04:05:26.01#ibcon#enter sib2, iclass 40, count 2 2006.229.04:05:26.01#ibcon#flushed, iclass 40, count 2 2006.229.04:05:26.01#ibcon#about to write, iclass 40, count 2 2006.229.04:05:26.01#ibcon#wrote, iclass 40, count 2 2006.229.04:05:26.01#ibcon#about to read 3, iclass 40, count 2 2006.229.04:05:26.04#ibcon#read 3, iclass 40, count 2 2006.229.04:05:26.04#ibcon#about to read 4, iclass 40, count 2 2006.229.04:05:26.04#ibcon#read 4, iclass 40, count 2 2006.229.04:05:26.04#ibcon#about to read 5, iclass 40, count 2 2006.229.04:05:26.04#ibcon#read 5, iclass 40, count 2 2006.229.04:05:26.04#ibcon#about to read 6, iclass 40, count 2 2006.229.04:05:26.04#ibcon#read 6, iclass 40, count 2 2006.229.04:05:26.04#ibcon#end of sib2, iclass 40, count 2 2006.229.04:05:26.04#ibcon#*after write, iclass 40, count 2 2006.229.04:05:26.04#ibcon#*before return 0, iclass 40, count 2 2006.229.04:05:26.04#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:05:26.04#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:05:26.04#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.04:05:26.04#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:26.04#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:05:26.16#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:05:26.16#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:05:26.16#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:05:26.16#ibcon#first serial, iclass 40, count 0 2006.229.04:05:26.16#ibcon#enter sib2, iclass 40, count 0 2006.229.04:05:26.16#ibcon#flushed, iclass 40, count 0 2006.229.04:05:26.16#ibcon#about to write, iclass 40, count 0 2006.229.04:05:26.16#ibcon#wrote, iclass 40, count 0 2006.229.04:05:26.16#ibcon#about to read 3, iclass 40, count 0 2006.229.04:05:26.18#ibcon#read 3, iclass 40, count 0 2006.229.04:05:26.18#ibcon#about to read 4, iclass 40, count 0 2006.229.04:05:26.18#ibcon#read 4, iclass 40, count 0 2006.229.04:05:26.18#ibcon#about to read 5, iclass 40, count 0 2006.229.04:05:26.18#ibcon#read 5, iclass 40, count 0 2006.229.04:05:26.18#ibcon#about to read 6, iclass 40, count 0 2006.229.04:05:26.18#ibcon#read 6, iclass 40, count 0 2006.229.04:05:26.18#ibcon#end of sib2, iclass 40, count 0 2006.229.04:05:26.18#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:05:26.18#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:05:26.18#ibcon#[27=USB\r\n] 2006.229.04:05:26.18#ibcon#*before write, iclass 40, count 0 2006.229.04:05:26.18#ibcon#enter sib2, iclass 40, count 0 2006.229.04:05:26.18#ibcon#flushed, iclass 40, count 0 2006.229.04:05:26.18#ibcon#about to write, iclass 40, count 0 2006.229.04:05:26.18#ibcon#wrote, iclass 40, count 0 2006.229.04:05:26.18#ibcon#about to read 3, iclass 40, count 0 2006.229.04:05:26.21#ibcon#read 3, iclass 40, count 0 2006.229.04:05:26.21#ibcon#about to read 4, iclass 40, count 0 2006.229.04:05:26.21#ibcon#read 4, iclass 40, count 0 2006.229.04:05:26.21#ibcon#about to read 5, iclass 40, count 0 2006.229.04:05:26.21#ibcon#read 5, iclass 40, count 0 2006.229.04:05:26.21#ibcon#about to read 6, iclass 40, count 0 2006.229.04:05:26.21#ibcon#read 6, iclass 40, count 0 2006.229.04:05:26.21#ibcon#end of sib2, iclass 40, count 0 2006.229.04:05:26.21#ibcon#*after write, iclass 40, count 0 2006.229.04:05:26.21#ibcon#*before return 0, iclass 40, count 0 2006.229.04:05:26.21#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:05:26.21#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:05:26.21#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:05:26.21#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:05:26.21$vck44/vblo=2,634.99 2006.229.04:05:26.21#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.04:05:26.21#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.04:05:26.21#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:26.21#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:26.21#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:26.21#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:26.21#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:05:26.21#ibcon#first serial, iclass 4, count 0 2006.229.04:05:26.21#ibcon#enter sib2, iclass 4, count 0 2006.229.04:05:26.21#ibcon#flushed, iclass 4, count 0 2006.229.04:05:26.21#ibcon#about to write, iclass 4, count 0 2006.229.04:05:26.21#ibcon#wrote, iclass 4, count 0 2006.229.04:05:26.21#ibcon#about to read 3, iclass 4, count 0 2006.229.04:05:26.23#ibcon#read 3, iclass 4, count 0 2006.229.04:05:26.23#ibcon#about to read 4, iclass 4, count 0 2006.229.04:05:26.23#ibcon#read 4, iclass 4, count 0 2006.229.04:05:26.23#ibcon#about to read 5, iclass 4, count 0 2006.229.04:05:26.23#ibcon#read 5, iclass 4, count 0 2006.229.04:05:26.23#ibcon#about to read 6, iclass 4, count 0 2006.229.04:05:26.23#ibcon#read 6, iclass 4, count 0 2006.229.04:05:26.23#ibcon#end of sib2, iclass 4, count 0 2006.229.04:05:26.23#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:05:26.23#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:05:26.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:05:26.23#ibcon#*before write, iclass 4, count 0 2006.229.04:05:26.23#ibcon#enter sib2, iclass 4, count 0 2006.229.04:05:26.23#ibcon#flushed, iclass 4, count 0 2006.229.04:05:26.23#ibcon#about to write, iclass 4, count 0 2006.229.04:05:26.23#ibcon#wrote, iclass 4, count 0 2006.229.04:05:26.23#ibcon#about to read 3, iclass 4, count 0 2006.229.04:05:26.27#ibcon#read 3, iclass 4, count 0 2006.229.04:05:26.27#ibcon#about to read 4, iclass 4, count 0 2006.229.04:05:26.27#ibcon#read 4, iclass 4, count 0 2006.229.04:05:26.27#ibcon#about to read 5, iclass 4, count 0 2006.229.04:05:26.27#ibcon#read 5, iclass 4, count 0 2006.229.04:05:26.27#ibcon#about to read 6, iclass 4, count 0 2006.229.04:05:26.27#ibcon#read 6, iclass 4, count 0 2006.229.04:05:26.27#ibcon#end of sib2, iclass 4, count 0 2006.229.04:05:26.27#ibcon#*after write, iclass 4, count 0 2006.229.04:05:26.27#ibcon#*before return 0, iclass 4, count 0 2006.229.04:05:26.27#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:26.27#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:05:26.27#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:05:26.27#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:05:26.27$vck44/vb=2,4 2006.229.04:05:26.27#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.04:05:26.27#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.04:05:26.27#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:26.27#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:26.33#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:26.33#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:26.33#ibcon#enter wrdev, iclass 6, count 2 2006.229.04:05:26.33#ibcon#first serial, iclass 6, count 2 2006.229.04:05:26.33#ibcon#enter sib2, iclass 6, count 2 2006.229.04:05:26.33#ibcon#flushed, iclass 6, count 2 2006.229.04:05:26.33#ibcon#about to write, iclass 6, count 2 2006.229.04:05:26.33#ibcon#wrote, iclass 6, count 2 2006.229.04:05:26.33#ibcon#about to read 3, iclass 6, count 2 2006.229.04:05:26.35#ibcon#read 3, iclass 6, count 2 2006.229.04:05:26.35#ibcon#about to read 4, iclass 6, count 2 2006.229.04:05:26.35#ibcon#read 4, iclass 6, count 2 2006.229.04:05:26.35#ibcon#about to read 5, iclass 6, count 2 2006.229.04:05:26.35#ibcon#read 5, iclass 6, count 2 2006.229.04:05:26.35#ibcon#about to read 6, iclass 6, count 2 2006.229.04:05:26.35#ibcon#read 6, iclass 6, count 2 2006.229.04:05:26.35#ibcon#end of sib2, iclass 6, count 2 2006.229.04:05:26.35#ibcon#*mode == 0, iclass 6, count 2 2006.229.04:05:26.35#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.04:05:26.35#ibcon#[27=AT02-04\r\n] 2006.229.04:05:26.35#ibcon#*before write, iclass 6, count 2 2006.229.04:05:26.35#ibcon#enter sib2, iclass 6, count 2 2006.229.04:05:26.35#ibcon#flushed, iclass 6, count 2 2006.229.04:05:26.35#ibcon#about to write, iclass 6, count 2 2006.229.04:05:26.35#ibcon#wrote, iclass 6, count 2 2006.229.04:05:26.35#ibcon#about to read 3, iclass 6, count 2 2006.229.04:05:26.38#ibcon#read 3, iclass 6, count 2 2006.229.04:05:26.38#ibcon#about to read 4, iclass 6, count 2 2006.229.04:05:26.38#ibcon#read 4, iclass 6, count 2 2006.229.04:05:26.38#ibcon#about to read 5, iclass 6, count 2 2006.229.04:05:26.38#ibcon#read 5, iclass 6, count 2 2006.229.04:05:26.38#ibcon#about to read 6, iclass 6, count 2 2006.229.04:05:26.38#ibcon#read 6, iclass 6, count 2 2006.229.04:05:26.38#ibcon#end of sib2, iclass 6, count 2 2006.229.04:05:26.38#ibcon#*after write, iclass 6, count 2 2006.229.04:05:26.38#ibcon#*before return 0, iclass 6, count 2 2006.229.04:05:26.38#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:26.38#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:05:26.38#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.04:05:26.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:26.38#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:26.50#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:26.50#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:26.50#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:05:26.50#ibcon#first serial, iclass 6, count 0 2006.229.04:05:26.50#ibcon#enter sib2, iclass 6, count 0 2006.229.04:05:26.50#ibcon#flushed, iclass 6, count 0 2006.229.04:05:26.50#ibcon#about to write, iclass 6, count 0 2006.229.04:05:26.50#ibcon#wrote, iclass 6, count 0 2006.229.04:05:26.50#ibcon#about to read 3, iclass 6, count 0 2006.229.04:05:26.52#ibcon#read 3, iclass 6, count 0 2006.229.04:05:26.52#ibcon#about to read 4, iclass 6, count 0 2006.229.04:05:26.52#ibcon#read 4, iclass 6, count 0 2006.229.04:05:26.52#ibcon#about to read 5, iclass 6, count 0 2006.229.04:05:26.52#ibcon#read 5, iclass 6, count 0 2006.229.04:05:26.52#ibcon#about to read 6, iclass 6, count 0 2006.229.04:05:26.52#ibcon#read 6, iclass 6, count 0 2006.229.04:05:26.52#ibcon#end of sib2, iclass 6, count 0 2006.229.04:05:26.52#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:05:26.52#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:05:26.52#ibcon#[27=USB\r\n] 2006.229.04:05:26.52#ibcon#*before write, iclass 6, count 0 2006.229.04:05:26.52#ibcon#enter sib2, iclass 6, count 0 2006.229.04:05:26.52#ibcon#flushed, iclass 6, count 0 2006.229.04:05:26.52#ibcon#about to write, iclass 6, count 0 2006.229.04:05:26.52#ibcon#wrote, iclass 6, count 0 2006.229.04:05:26.52#ibcon#about to read 3, iclass 6, count 0 2006.229.04:05:26.55#ibcon#read 3, iclass 6, count 0 2006.229.04:05:26.55#ibcon#about to read 4, iclass 6, count 0 2006.229.04:05:26.55#ibcon#read 4, iclass 6, count 0 2006.229.04:05:26.55#ibcon#about to read 5, iclass 6, count 0 2006.229.04:05:26.55#ibcon#read 5, iclass 6, count 0 2006.229.04:05:26.55#ibcon#about to read 6, iclass 6, count 0 2006.229.04:05:26.55#ibcon#read 6, iclass 6, count 0 2006.229.04:05:26.55#ibcon#end of sib2, iclass 6, count 0 2006.229.04:05:26.55#ibcon#*after write, iclass 6, count 0 2006.229.04:05:26.55#ibcon#*before return 0, iclass 6, count 0 2006.229.04:05:26.55#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:26.55#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:05:26.55#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:05:26.55#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:05:26.55$vck44/vblo=3,649.99 2006.229.04:05:26.55#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:05:26.55#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:05:26.55#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:26.55#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:26.55#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:26.55#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:26.55#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:05:26.55#ibcon#first serial, iclass 10, count 0 2006.229.04:05:26.55#ibcon#enter sib2, iclass 10, count 0 2006.229.04:05:26.55#ibcon#flushed, iclass 10, count 0 2006.229.04:05:26.55#ibcon#about to write, iclass 10, count 0 2006.229.04:05:26.55#ibcon#wrote, iclass 10, count 0 2006.229.04:05:26.55#ibcon#about to read 3, iclass 10, count 0 2006.229.04:05:26.57#ibcon#read 3, iclass 10, count 0 2006.229.04:05:26.57#ibcon#about to read 4, iclass 10, count 0 2006.229.04:05:26.57#ibcon#read 4, iclass 10, count 0 2006.229.04:05:26.57#ibcon#about to read 5, iclass 10, count 0 2006.229.04:05:26.57#ibcon#read 5, iclass 10, count 0 2006.229.04:05:26.57#ibcon#about to read 6, iclass 10, count 0 2006.229.04:05:26.57#ibcon#read 6, iclass 10, count 0 2006.229.04:05:26.57#ibcon#end of sib2, iclass 10, count 0 2006.229.04:05:26.57#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:05:26.57#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:05:26.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:05:26.57#ibcon#*before write, iclass 10, count 0 2006.229.04:05:26.57#ibcon#enter sib2, iclass 10, count 0 2006.229.04:05:26.57#ibcon#flushed, iclass 10, count 0 2006.229.04:05:26.57#ibcon#about to write, iclass 10, count 0 2006.229.04:05:26.57#ibcon#wrote, iclass 10, count 0 2006.229.04:05:26.57#ibcon#about to read 3, iclass 10, count 0 2006.229.04:05:26.61#ibcon#read 3, iclass 10, count 0 2006.229.04:05:26.61#ibcon#about to read 4, iclass 10, count 0 2006.229.04:05:26.61#ibcon#read 4, iclass 10, count 0 2006.229.04:05:26.61#ibcon#about to read 5, iclass 10, count 0 2006.229.04:05:26.61#ibcon#read 5, iclass 10, count 0 2006.229.04:05:26.61#ibcon#about to read 6, iclass 10, count 0 2006.229.04:05:26.61#ibcon#read 6, iclass 10, count 0 2006.229.04:05:26.61#ibcon#end of sib2, iclass 10, count 0 2006.229.04:05:26.61#ibcon#*after write, iclass 10, count 0 2006.229.04:05:26.61#ibcon#*before return 0, iclass 10, count 0 2006.229.04:05:26.61#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:26.61#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:05:26.61#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:05:26.61#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:05:26.61$vck44/vb=3,4 2006.229.04:05:26.61#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.04:05:26.61#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.04:05:26.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:26.61#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:26.67#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:26.67#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:26.67#ibcon#enter wrdev, iclass 12, count 2 2006.229.04:05:26.67#ibcon#first serial, iclass 12, count 2 2006.229.04:05:26.67#ibcon#enter sib2, iclass 12, count 2 2006.229.04:05:26.67#ibcon#flushed, iclass 12, count 2 2006.229.04:05:26.67#ibcon#about to write, iclass 12, count 2 2006.229.04:05:26.67#ibcon#wrote, iclass 12, count 2 2006.229.04:05:26.67#ibcon#about to read 3, iclass 12, count 2 2006.229.04:05:26.69#ibcon#read 3, iclass 12, count 2 2006.229.04:05:26.69#ibcon#about to read 4, iclass 12, count 2 2006.229.04:05:26.69#ibcon#read 4, iclass 12, count 2 2006.229.04:05:26.69#ibcon#about to read 5, iclass 12, count 2 2006.229.04:05:26.69#ibcon#read 5, iclass 12, count 2 2006.229.04:05:26.69#ibcon#about to read 6, iclass 12, count 2 2006.229.04:05:26.69#ibcon#read 6, iclass 12, count 2 2006.229.04:05:26.69#ibcon#end of sib2, iclass 12, count 2 2006.229.04:05:26.69#ibcon#*mode == 0, iclass 12, count 2 2006.229.04:05:26.69#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.04:05:26.69#ibcon#[27=AT03-04\r\n] 2006.229.04:05:26.69#ibcon#*before write, iclass 12, count 2 2006.229.04:05:26.69#ibcon#enter sib2, iclass 12, count 2 2006.229.04:05:26.69#ibcon#flushed, iclass 12, count 2 2006.229.04:05:26.69#ibcon#about to write, iclass 12, count 2 2006.229.04:05:26.69#ibcon#wrote, iclass 12, count 2 2006.229.04:05:26.69#ibcon#about to read 3, iclass 12, count 2 2006.229.04:05:26.72#ibcon#read 3, iclass 12, count 2 2006.229.04:05:26.72#ibcon#about to read 4, iclass 12, count 2 2006.229.04:05:26.72#ibcon#read 4, iclass 12, count 2 2006.229.04:05:26.72#ibcon#about to read 5, iclass 12, count 2 2006.229.04:05:26.72#ibcon#read 5, iclass 12, count 2 2006.229.04:05:26.72#ibcon#about to read 6, iclass 12, count 2 2006.229.04:05:26.72#ibcon#read 6, iclass 12, count 2 2006.229.04:05:26.72#ibcon#end of sib2, iclass 12, count 2 2006.229.04:05:26.72#ibcon#*after write, iclass 12, count 2 2006.229.04:05:26.72#ibcon#*before return 0, iclass 12, count 2 2006.229.04:05:26.72#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:26.72#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:05:26.72#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.04:05:26.72#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:26.72#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:26.84#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:26.84#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:26.84#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:05:26.84#ibcon#first serial, iclass 12, count 0 2006.229.04:05:26.84#ibcon#enter sib2, iclass 12, count 0 2006.229.04:05:26.84#ibcon#flushed, iclass 12, count 0 2006.229.04:05:26.84#ibcon#about to write, iclass 12, count 0 2006.229.04:05:26.84#ibcon#wrote, iclass 12, count 0 2006.229.04:05:26.84#ibcon#about to read 3, iclass 12, count 0 2006.229.04:05:26.86#ibcon#read 3, iclass 12, count 0 2006.229.04:05:26.86#ibcon#about to read 4, iclass 12, count 0 2006.229.04:05:26.86#ibcon#read 4, iclass 12, count 0 2006.229.04:05:26.86#ibcon#about to read 5, iclass 12, count 0 2006.229.04:05:26.86#ibcon#read 5, iclass 12, count 0 2006.229.04:05:26.86#ibcon#about to read 6, iclass 12, count 0 2006.229.04:05:26.86#ibcon#read 6, iclass 12, count 0 2006.229.04:05:26.86#ibcon#end of sib2, iclass 12, count 0 2006.229.04:05:26.86#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:05:26.86#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:05:26.86#ibcon#[27=USB\r\n] 2006.229.04:05:26.86#ibcon#*before write, iclass 12, count 0 2006.229.04:05:26.86#ibcon#enter sib2, iclass 12, count 0 2006.229.04:05:26.86#ibcon#flushed, iclass 12, count 0 2006.229.04:05:26.86#ibcon#about to write, iclass 12, count 0 2006.229.04:05:26.86#ibcon#wrote, iclass 12, count 0 2006.229.04:05:26.86#ibcon#about to read 3, iclass 12, count 0 2006.229.04:05:26.89#ibcon#read 3, iclass 12, count 0 2006.229.04:05:26.89#ibcon#about to read 4, iclass 12, count 0 2006.229.04:05:26.89#ibcon#read 4, iclass 12, count 0 2006.229.04:05:26.89#ibcon#about to read 5, iclass 12, count 0 2006.229.04:05:26.89#ibcon#read 5, iclass 12, count 0 2006.229.04:05:26.89#ibcon#about to read 6, iclass 12, count 0 2006.229.04:05:26.89#ibcon#read 6, iclass 12, count 0 2006.229.04:05:26.89#ibcon#end of sib2, iclass 12, count 0 2006.229.04:05:26.89#ibcon#*after write, iclass 12, count 0 2006.229.04:05:26.89#ibcon#*before return 0, iclass 12, count 0 2006.229.04:05:26.89#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:26.89#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:05:26.89#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:05:26.89#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:05:26.89$vck44/vblo=4,679.99 2006.229.04:05:26.89#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:05:26.89#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:05:26.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:26.89#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:26.89#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:26.89#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:26.89#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:05:26.89#ibcon#first serial, iclass 14, count 0 2006.229.04:05:26.89#ibcon#enter sib2, iclass 14, count 0 2006.229.04:05:26.89#ibcon#flushed, iclass 14, count 0 2006.229.04:05:26.89#ibcon#about to write, iclass 14, count 0 2006.229.04:05:26.89#ibcon#wrote, iclass 14, count 0 2006.229.04:05:26.89#ibcon#about to read 3, iclass 14, count 0 2006.229.04:05:26.91#ibcon#read 3, iclass 14, count 0 2006.229.04:05:26.91#ibcon#about to read 4, iclass 14, count 0 2006.229.04:05:26.91#ibcon#read 4, iclass 14, count 0 2006.229.04:05:26.91#ibcon#about to read 5, iclass 14, count 0 2006.229.04:05:26.91#ibcon#read 5, iclass 14, count 0 2006.229.04:05:26.91#ibcon#about to read 6, iclass 14, count 0 2006.229.04:05:26.91#ibcon#read 6, iclass 14, count 0 2006.229.04:05:26.91#ibcon#end of sib2, iclass 14, count 0 2006.229.04:05:26.91#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:05:26.91#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:05:26.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:05:26.91#ibcon#*before write, iclass 14, count 0 2006.229.04:05:26.91#ibcon#enter sib2, iclass 14, count 0 2006.229.04:05:26.91#ibcon#flushed, iclass 14, count 0 2006.229.04:05:26.91#ibcon#about to write, iclass 14, count 0 2006.229.04:05:26.91#ibcon#wrote, iclass 14, count 0 2006.229.04:05:26.91#ibcon#about to read 3, iclass 14, count 0 2006.229.04:05:26.95#ibcon#read 3, iclass 14, count 0 2006.229.04:05:26.95#ibcon#about to read 4, iclass 14, count 0 2006.229.04:05:26.95#ibcon#read 4, iclass 14, count 0 2006.229.04:05:26.95#ibcon#about to read 5, iclass 14, count 0 2006.229.04:05:26.95#ibcon#read 5, iclass 14, count 0 2006.229.04:05:26.95#ibcon#about to read 6, iclass 14, count 0 2006.229.04:05:26.95#ibcon#read 6, iclass 14, count 0 2006.229.04:05:26.95#ibcon#end of sib2, iclass 14, count 0 2006.229.04:05:26.95#ibcon#*after write, iclass 14, count 0 2006.229.04:05:26.95#ibcon#*before return 0, iclass 14, count 0 2006.229.04:05:26.95#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:26.95#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:05:26.95#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:05:26.95#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:05:26.95$vck44/vb=4,4 2006.229.04:05:26.95#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.04:05:26.95#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.04:05:26.95#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:26.95#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:27.01#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:27.01#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:27.01#ibcon#enter wrdev, iclass 16, count 2 2006.229.04:05:27.01#ibcon#first serial, iclass 16, count 2 2006.229.04:05:27.01#ibcon#enter sib2, iclass 16, count 2 2006.229.04:05:27.01#ibcon#flushed, iclass 16, count 2 2006.229.04:05:27.01#ibcon#about to write, iclass 16, count 2 2006.229.04:05:27.01#ibcon#wrote, iclass 16, count 2 2006.229.04:05:27.01#ibcon#about to read 3, iclass 16, count 2 2006.229.04:05:27.03#ibcon#read 3, iclass 16, count 2 2006.229.04:05:27.03#ibcon#about to read 4, iclass 16, count 2 2006.229.04:05:27.03#ibcon#read 4, iclass 16, count 2 2006.229.04:05:27.03#ibcon#about to read 5, iclass 16, count 2 2006.229.04:05:27.03#ibcon#read 5, iclass 16, count 2 2006.229.04:05:27.03#ibcon#about to read 6, iclass 16, count 2 2006.229.04:05:27.03#ibcon#read 6, iclass 16, count 2 2006.229.04:05:27.03#ibcon#end of sib2, iclass 16, count 2 2006.229.04:05:27.03#ibcon#*mode == 0, iclass 16, count 2 2006.229.04:05:27.03#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.04:05:27.03#ibcon#[27=AT04-04\r\n] 2006.229.04:05:27.03#ibcon#*before write, iclass 16, count 2 2006.229.04:05:27.03#ibcon#enter sib2, iclass 16, count 2 2006.229.04:05:27.03#ibcon#flushed, iclass 16, count 2 2006.229.04:05:27.03#ibcon#about to write, iclass 16, count 2 2006.229.04:05:27.03#ibcon#wrote, iclass 16, count 2 2006.229.04:05:27.03#ibcon#about to read 3, iclass 16, count 2 2006.229.04:05:27.06#ibcon#read 3, iclass 16, count 2 2006.229.04:05:27.06#ibcon#about to read 4, iclass 16, count 2 2006.229.04:05:27.06#ibcon#read 4, iclass 16, count 2 2006.229.04:05:27.06#ibcon#about to read 5, iclass 16, count 2 2006.229.04:05:27.06#ibcon#read 5, iclass 16, count 2 2006.229.04:05:27.06#ibcon#about to read 6, iclass 16, count 2 2006.229.04:05:27.06#ibcon#read 6, iclass 16, count 2 2006.229.04:05:27.06#ibcon#end of sib2, iclass 16, count 2 2006.229.04:05:27.06#ibcon#*after write, iclass 16, count 2 2006.229.04:05:27.06#ibcon#*before return 0, iclass 16, count 2 2006.229.04:05:27.06#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:27.06#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:05:27.06#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.04:05:27.06#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:27.06#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:27.18#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:27.18#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:27.18#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:05:27.18#ibcon#first serial, iclass 16, count 0 2006.229.04:05:27.18#ibcon#enter sib2, iclass 16, count 0 2006.229.04:05:27.18#ibcon#flushed, iclass 16, count 0 2006.229.04:05:27.18#ibcon#about to write, iclass 16, count 0 2006.229.04:05:27.18#ibcon#wrote, iclass 16, count 0 2006.229.04:05:27.18#ibcon#about to read 3, iclass 16, count 0 2006.229.04:05:27.20#ibcon#read 3, iclass 16, count 0 2006.229.04:05:27.20#ibcon#about to read 4, iclass 16, count 0 2006.229.04:05:27.20#ibcon#read 4, iclass 16, count 0 2006.229.04:05:27.20#ibcon#about to read 5, iclass 16, count 0 2006.229.04:05:27.20#ibcon#read 5, iclass 16, count 0 2006.229.04:05:27.20#ibcon#about to read 6, iclass 16, count 0 2006.229.04:05:27.20#ibcon#read 6, iclass 16, count 0 2006.229.04:05:27.20#ibcon#end of sib2, iclass 16, count 0 2006.229.04:05:27.20#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:05:27.20#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:05:27.20#ibcon#[27=USB\r\n] 2006.229.04:05:27.20#ibcon#*before write, iclass 16, count 0 2006.229.04:05:27.20#ibcon#enter sib2, iclass 16, count 0 2006.229.04:05:27.20#ibcon#flushed, iclass 16, count 0 2006.229.04:05:27.20#ibcon#about to write, iclass 16, count 0 2006.229.04:05:27.20#ibcon#wrote, iclass 16, count 0 2006.229.04:05:27.20#ibcon#about to read 3, iclass 16, count 0 2006.229.04:05:27.23#ibcon#read 3, iclass 16, count 0 2006.229.04:05:27.23#ibcon#about to read 4, iclass 16, count 0 2006.229.04:05:27.23#ibcon#read 4, iclass 16, count 0 2006.229.04:05:27.23#ibcon#about to read 5, iclass 16, count 0 2006.229.04:05:27.23#ibcon#read 5, iclass 16, count 0 2006.229.04:05:27.23#ibcon#about to read 6, iclass 16, count 0 2006.229.04:05:27.23#ibcon#read 6, iclass 16, count 0 2006.229.04:05:27.23#ibcon#end of sib2, iclass 16, count 0 2006.229.04:05:27.23#ibcon#*after write, iclass 16, count 0 2006.229.04:05:27.23#ibcon#*before return 0, iclass 16, count 0 2006.229.04:05:27.23#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:27.23#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:05:27.23#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:05:27.23#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:05:27.23$vck44/vblo=5,709.99 2006.229.04:05:27.23#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.04:05:27.23#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.04:05:27.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:27.23#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:27.23#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:27.23#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:27.23#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:05:27.23#ibcon#first serial, iclass 18, count 0 2006.229.04:05:27.23#ibcon#enter sib2, iclass 18, count 0 2006.229.04:05:27.23#ibcon#flushed, iclass 18, count 0 2006.229.04:05:27.23#ibcon#about to write, iclass 18, count 0 2006.229.04:05:27.23#ibcon#wrote, iclass 18, count 0 2006.229.04:05:27.23#ibcon#about to read 3, iclass 18, count 0 2006.229.04:05:27.25#ibcon#read 3, iclass 18, count 0 2006.229.04:05:27.25#ibcon#about to read 4, iclass 18, count 0 2006.229.04:05:27.25#ibcon#read 4, iclass 18, count 0 2006.229.04:05:27.25#ibcon#about to read 5, iclass 18, count 0 2006.229.04:05:27.25#ibcon#read 5, iclass 18, count 0 2006.229.04:05:27.25#ibcon#about to read 6, iclass 18, count 0 2006.229.04:05:27.25#ibcon#read 6, iclass 18, count 0 2006.229.04:05:27.25#ibcon#end of sib2, iclass 18, count 0 2006.229.04:05:27.25#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:05:27.25#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:05:27.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:05:27.25#ibcon#*before write, iclass 18, count 0 2006.229.04:05:27.25#ibcon#enter sib2, iclass 18, count 0 2006.229.04:05:27.25#ibcon#flushed, iclass 18, count 0 2006.229.04:05:27.25#ibcon#about to write, iclass 18, count 0 2006.229.04:05:27.25#ibcon#wrote, iclass 18, count 0 2006.229.04:05:27.25#ibcon#about to read 3, iclass 18, count 0 2006.229.04:05:27.29#ibcon#read 3, iclass 18, count 0 2006.229.04:05:27.29#ibcon#about to read 4, iclass 18, count 0 2006.229.04:05:27.29#ibcon#read 4, iclass 18, count 0 2006.229.04:05:27.29#ibcon#about to read 5, iclass 18, count 0 2006.229.04:05:27.29#ibcon#read 5, iclass 18, count 0 2006.229.04:05:27.29#ibcon#about to read 6, iclass 18, count 0 2006.229.04:05:27.29#ibcon#read 6, iclass 18, count 0 2006.229.04:05:27.29#ibcon#end of sib2, iclass 18, count 0 2006.229.04:05:27.29#ibcon#*after write, iclass 18, count 0 2006.229.04:05:27.29#ibcon#*before return 0, iclass 18, count 0 2006.229.04:05:27.29#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:27.29#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:05:27.29#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:05:27.29#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:05:27.29$vck44/vb=5,4 2006.229.04:05:27.29#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.04:05:27.29#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.04:05:27.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:27.29#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:27.35#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:27.35#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:27.35#ibcon#enter wrdev, iclass 20, count 2 2006.229.04:05:27.35#ibcon#first serial, iclass 20, count 2 2006.229.04:05:27.35#ibcon#enter sib2, iclass 20, count 2 2006.229.04:05:27.35#ibcon#flushed, iclass 20, count 2 2006.229.04:05:27.35#ibcon#about to write, iclass 20, count 2 2006.229.04:05:27.35#ibcon#wrote, iclass 20, count 2 2006.229.04:05:27.35#ibcon#about to read 3, iclass 20, count 2 2006.229.04:05:27.37#ibcon#read 3, iclass 20, count 2 2006.229.04:05:27.37#ibcon#about to read 4, iclass 20, count 2 2006.229.04:05:27.37#ibcon#read 4, iclass 20, count 2 2006.229.04:05:27.37#ibcon#about to read 5, iclass 20, count 2 2006.229.04:05:27.37#ibcon#read 5, iclass 20, count 2 2006.229.04:05:27.37#ibcon#about to read 6, iclass 20, count 2 2006.229.04:05:27.37#ibcon#read 6, iclass 20, count 2 2006.229.04:05:27.37#ibcon#end of sib2, iclass 20, count 2 2006.229.04:05:27.37#ibcon#*mode == 0, iclass 20, count 2 2006.229.04:05:27.37#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.04:05:27.37#ibcon#[27=AT05-04\r\n] 2006.229.04:05:27.37#ibcon#*before write, iclass 20, count 2 2006.229.04:05:27.37#ibcon#enter sib2, iclass 20, count 2 2006.229.04:05:27.37#ibcon#flushed, iclass 20, count 2 2006.229.04:05:27.37#ibcon#about to write, iclass 20, count 2 2006.229.04:05:27.37#ibcon#wrote, iclass 20, count 2 2006.229.04:05:27.37#ibcon#about to read 3, iclass 20, count 2 2006.229.04:05:27.40#ibcon#read 3, iclass 20, count 2 2006.229.04:05:27.40#ibcon#about to read 4, iclass 20, count 2 2006.229.04:05:27.40#ibcon#read 4, iclass 20, count 2 2006.229.04:05:27.40#ibcon#about to read 5, iclass 20, count 2 2006.229.04:05:27.40#ibcon#read 5, iclass 20, count 2 2006.229.04:05:27.40#ibcon#about to read 6, iclass 20, count 2 2006.229.04:05:27.40#ibcon#read 6, iclass 20, count 2 2006.229.04:05:27.40#ibcon#end of sib2, iclass 20, count 2 2006.229.04:05:27.40#ibcon#*after write, iclass 20, count 2 2006.229.04:05:27.40#ibcon#*before return 0, iclass 20, count 2 2006.229.04:05:27.40#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:27.40#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:05:27.40#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.04:05:27.40#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:27.40#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:27.52#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:27.52#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:27.52#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:05:27.52#ibcon#first serial, iclass 20, count 0 2006.229.04:05:27.52#ibcon#enter sib2, iclass 20, count 0 2006.229.04:05:27.52#ibcon#flushed, iclass 20, count 0 2006.229.04:05:27.52#ibcon#about to write, iclass 20, count 0 2006.229.04:05:27.52#ibcon#wrote, iclass 20, count 0 2006.229.04:05:27.52#ibcon#about to read 3, iclass 20, count 0 2006.229.04:05:27.54#ibcon#read 3, iclass 20, count 0 2006.229.04:05:27.54#ibcon#about to read 4, iclass 20, count 0 2006.229.04:05:27.54#ibcon#read 4, iclass 20, count 0 2006.229.04:05:27.54#ibcon#about to read 5, iclass 20, count 0 2006.229.04:05:27.54#ibcon#read 5, iclass 20, count 0 2006.229.04:05:27.54#ibcon#about to read 6, iclass 20, count 0 2006.229.04:05:27.54#ibcon#read 6, iclass 20, count 0 2006.229.04:05:27.54#ibcon#end of sib2, iclass 20, count 0 2006.229.04:05:27.54#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:05:27.54#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:05:27.54#ibcon#[27=USB\r\n] 2006.229.04:05:27.54#ibcon#*before write, iclass 20, count 0 2006.229.04:05:27.54#ibcon#enter sib2, iclass 20, count 0 2006.229.04:05:27.54#ibcon#flushed, iclass 20, count 0 2006.229.04:05:27.54#ibcon#about to write, iclass 20, count 0 2006.229.04:05:27.54#ibcon#wrote, iclass 20, count 0 2006.229.04:05:27.54#ibcon#about to read 3, iclass 20, count 0 2006.229.04:05:27.57#ibcon#read 3, iclass 20, count 0 2006.229.04:05:27.57#ibcon#about to read 4, iclass 20, count 0 2006.229.04:05:27.57#ibcon#read 4, iclass 20, count 0 2006.229.04:05:27.57#ibcon#about to read 5, iclass 20, count 0 2006.229.04:05:27.57#ibcon#read 5, iclass 20, count 0 2006.229.04:05:27.57#ibcon#about to read 6, iclass 20, count 0 2006.229.04:05:27.57#ibcon#read 6, iclass 20, count 0 2006.229.04:05:27.57#ibcon#end of sib2, iclass 20, count 0 2006.229.04:05:27.57#ibcon#*after write, iclass 20, count 0 2006.229.04:05:27.57#ibcon#*before return 0, iclass 20, count 0 2006.229.04:05:27.57#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:27.57#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:05:27.57#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:05:27.57#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:05:27.57$vck44/vblo=6,719.99 2006.229.04:05:27.57#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.04:05:27.57#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.04:05:27.57#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:27.57#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:27.57#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:27.57#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:27.57#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:05:27.57#ibcon#first serial, iclass 22, count 0 2006.229.04:05:27.57#ibcon#enter sib2, iclass 22, count 0 2006.229.04:05:27.57#ibcon#flushed, iclass 22, count 0 2006.229.04:05:27.57#ibcon#about to write, iclass 22, count 0 2006.229.04:05:27.57#ibcon#wrote, iclass 22, count 0 2006.229.04:05:27.57#ibcon#about to read 3, iclass 22, count 0 2006.229.04:05:27.59#ibcon#read 3, iclass 22, count 0 2006.229.04:05:27.59#ibcon#about to read 4, iclass 22, count 0 2006.229.04:05:27.59#ibcon#read 4, iclass 22, count 0 2006.229.04:05:27.59#ibcon#about to read 5, iclass 22, count 0 2006.229.04:05:27.59#ibcon#read 5, iclass 22, count 0 2006.229.04:05:27.59#ibcon#about to read 6, iclass 22, count 0 2006.229.04:05:27.59#ibcon#read 6, iclass 22, count 0 2006.229.04:05:27.59#ibcon#end of sib2, iclass 22, count 0 2006.229.04:05:27.59#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:05:27.59#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:05:27.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:05:27.59#ibcon#*before write, iclass 22, count 0 2006.229.04:05:27.59#ibcon#enter sib2, iclass 22, count 0 2006.229.04:05:27.59#ibcon#flushed, iclass 22, count 0 2006.229.04:05:27.59#ibcon#about to write, iclass 22, count 0 2006.229.04:05:27.59#ibcon#wrote, iclass 22, count 0 2006.229.04:05:27.59#ibcon#about to read 3, iclass 22, count 0 2006.229.04:05:27.63#ibcon#read 3, iclass 22, count 0 2006.229.04:05:27.63#ibcon#about to read 4, iclass 22, count 0 2006.229.04:05:27.63#ibcon#read 4, iclass 22, count 0 2006.229.04:05:27.63#ibcon#about to read 5, iclass 22, count 0 2006.229.04:05:27.63#ibcon#read 5, iclass 22, count 0 2006.229.04:05:27.63#ibcon#about to read 6, iclass 22, count 0 2006.229.04:05:27.63#ibcon#read 6, iclass 22, count 0 2006.229.04:05:27.63#ibcon#end of sib2, iclass 22, count 0 2006.229.04:05:27.63#ibcon#*after write, iclass 22, count 0 2006.229.04:05:27.63#ibcon#*before return 0, iclass 22, count 0 2006.229.04:05:27.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:27.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:05:27.63#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:05:27.63#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:05:27.63$vck44/vb=6,4 2006.229.04:05:27.63#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:05:27.63#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:05:27.63#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:27.63#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:27.69#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:27.69#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:27.69#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:05:27.69#ibcon#first serial, iclass 24, count 2 2006.229.04:05:27.69#ibcon#enter sib2, iclass 24, count 2 2006.229.04:05:27.69#ibcon#flushed, iclass 24, count 2 2006.229.04:05:27.69#ibcon#about to write, iclass 24, count 2 2006.229.04:05:27.69#ibcon#wrote, iclass 24, count 2 2006.229.04:05:27.69#ibcon#about to read 3, iclass 24, count 2 2006.229.04:05:27.71#ibcon#read 3, iclass 24, count 2 2006.229.04:05:27.71#ibcon#about to read 4, iclass 24, count 2 2006.229.04:05:27.71#ibcon#read 4, iclass 24, count 2 2006.229.04:05:27.71#ibcon#about to read 5, iclass 24, count 2 2006.229.04:05:27.71#ibcon#read 5, iclass 24, count 2 2006.229.04:05:27.71#ibcon#about to read 6, iclass 24, count 2 2006.229.04:05:27.71#ibcon#read 6, iclass 24, count 2 2006.229.04:05:27.71#ibcon#end of sib2, iclass 24, count 2 2006.229.04:05:27.71#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:05:27.71#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:05:27.71#ibcon#[27=AT06-04\r\n] 2006.229.04:05:27.71#ibcon#*before write, iclass 24, count 2 2006.229.04:05:27.71#ibcon#enter sib2, iclass 24, count 2 2006.229.04:05:27.71#ibcon#flushed, iclass 24, count 2 2006.229.04:05:27.71#ibcon#about to write, iclass 24, count 2 2006.229.04:05:27.71#ibcon#wrote, iclass 24, count 2 2006.229.04:05:27.71#ibcon#about to read 3, iclass 24, count 2 2006.229.04:05:27.74#ibcon#read 3, iclass 24, count 2 2006.229.04:05:27.74#ibcon#about to read 4, iclass 24, count 2 2006.229.04:05:27.74#ibcon#read 4, iclass 24, count 2 2006.229.04:05:27.74#ibcon#about to read 5, iclass 24, count 2 2006.229.04:05:27.74#ibcon#read 5, iclass 24, count 2 2006.229.04:05:27.74#ibcon#about to read 6, iclass 24, count 2 2006.229.04:05:27.74#ibcon#read 6, iclass 24, count 2 2006.229.04:05:27.74#ibcon#end of sib2, iclass 24, count 2 2006.229.04:05:27.74#ibcon#*after write, iclass 24, count 2 2006.229.04:05:27.74#ibcon#*before return 0, iclass 24, count 2 2006.229.04:05:27.74#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:27.74#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:05:27.74#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:05:27.74#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:27.74#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:27.86#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:27.86#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:27.86#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:05:27.86#ibcon#first serial, iclass 24, count 0 2006.229.04:05:27.86#ibcon#enter sib2, iclass 24, count 0 2006.229.04:05:27.86#ibcon#flushed, iclass 24, count 0 2006.229.04:05:27.86#ibcon#about to write, iclass 24, count 0 2006.229.04:05:27.86#ibcon#wrote, iclass 24, count 0 2006.229.04:05:27.86#ibcon#about to read 3, iclass 24, count 0 2006.229.04:05:27.88#ibcon#read 3, iclass 24, count 0 2006.229.04:05:27.88#ibcon#about to read 4, iclass 24, count 0 2006.229.04:05:27.88#ibcon#read 4, iclass 24, count 0 2006.229.04:05:27.88#ibcon#about to read 5, iclass 24, count 0 2006.229.04:05:27.88#ibcon#read 5, iclass 24, count 0 2006.229.04:05:27.88#ibcon#about to read 6, iclass 24, count 0 2006.229.04:05:27.88#ibcon#read 6, iclass 24, count 0 2006.229.04:05:27.88#ibcon#end of sib2, iclass 24, count 0 2006.229.04:05:27.88#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:05:27.88#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:05:27.88#ibcon#[27=USB\r\n] 2006.229.04:05:27.88#ibcon#*before write, iclass 24, count 0 2006.229.04:05:27.88#ibcon#enter sib2, iclass 24, count 0 2006.229.04:05:27.88#ibcon#flushed, iclass 24, count 0 2006.229.04:05:27.88#ibcon#about to write, iclass 24, count 0 2006.229.04:05:27.88#ibcon#wrote, iclass 24, count 0 2006.229.04:05:27.88#ibcon#about to read 3, iclass 24, count 0 2006.229.04:05:27.91#ibcon#read 3, iclass 24, count 0 2006.229.04:05:27.91#ibcon#about to read 4, iclass 24, count 0 2006.229.04:05:27.91#ibcon#read 4, iclass 24, count 0 2006.229.04:05:27.91#ibcon#about to read 5, iclass 24, count 0 2006.229.04:05:27.91#ibcon#read 5, iclass 24, count 0 2006.229.04:05:27.91#ibcon#about to read 6, iclass 24, count 0 2006.229.04:05:27.91#ibcon#read 6, iclass 24, count 0 2006.229.04:05:27.91#ibcon#end of sib2, iclass 24, count 0 2006.229.04:05:27.91#ibcon#*after write, iclass 24, count 0 2006.229.04:05:27.91#ibcon#*before return 0, iclass 24, count 0 2006.229.04:05:27.91#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:27.91#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:05:27.91#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:05:27.91#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:05:27.91$vck44/vblo=7,734.99 2006.229.04:05:27.91#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.04:05:27.91#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.04:05:27.91#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:27.91#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:27.91#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:27.91#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:27.91#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:05:27.91#ibcon#first serial, iclass 26, count 0 2006.229.04:05:27.91#ibcon#enter sib2, iclass 26, count 0 2006.229.04:05:27.91#ibcon#flushed, iclass 26, count 0 2006.229.04:05:27.91#ibcon#about to write, iclass 26, count 0 2006.229.04:05:27.91#ibcon#wrote, iclass 26, count 0 2006.229.04:05:27.91#ibcon#about to read 3, iclass 26, count 0 2006.229.04:05:27.93#ibcon#read 3, iclass 26, count 0 2006.229.04:05:27.93#ibcon#about to read 4, iclass 26, count 0 2006.229.04:05:27.93#ibcon#read 4, iclass 26, count 0 2006.229.04:05:27.93#ibcon#about to read 5, iclass 26, count 0 2006.229.04:05:27.93#ibcon#read 5, iclass 26, count 0 2006.229.04:05:27.93#ibcon#about to read 6, iclass 26, count 0 2006.229.04:05:27.93#ibcon#read 6, iclass 26, count 0 2006.229.04:05:27.93#ibcon#end of sib2, iclass 26, count 0 2006.229.04:05:27.93#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:05:27.93#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:05:27.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:05:27.93#ibcon#*before write, iclass 26, count 0 2006.229.04:05:27.93#ibcon#enter sib2, iclass 26, count 0 2006.229.04:05:27.93#ibcon#flushed, iclass 26, count 0 2006.229.04:05:27.93#ibcon#about to write, iclass 26, count 0 2006.229.04:05:27.93#ibcon#wrote, iclass 26, count 0 2006.229.04:05:27.93#ibcon#about to read 3, iclass 26, count 0 2006.229.04:05:27.97#ibcon#read 3, iclass 26, count 0 2006.229.04:05:27.97#ibcon#about to read 4, iclass 26, count 0 2006.229.04:05:27.97#ibcon#read 4, iclass 26, count 0 2006.229.04:05:27.97#ibcon#about to read 5, iclass 26, count 0 2006.229.04:05:27.97#ibcon#read 5, iclass 26, count 0 2006.229.04:05:27.97#ibcon#about to read 6, iclass 26, count 0 2006.229.04:05:27.97#ibcon#read 6, iclass 26, count 0 2006.229.04:05:27.97#ibcon#end of sib2, iclass 26, count 0 2006.229.04:05:27.97#ibcon#*after write, iclass 26, count 0 2006.229.04:05:27.97#ibcon#*before return 0, iclass 26, count 0 2006.229.04:05:27.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:27.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:05:27.97#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:05:27.97#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:05:27.97$vck44/vb=7,4 2006.229.04:05:27.97#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.04:05:27.97#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.04:05:27.97#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:27.97#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:28.03#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:28.03#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:28.03#ibcon#enter wrdev, iclass 28, count 2 2006.229.04:05:28.03#ibcon#first serial, iclass 28, count 2 2006.229.04:05:28.03#ibcon#enter sib2, iclass 28, count 2 2006.229.04:05:28.03#ibcon#flushed, iclass 28, count 2 2006.229.04:05:28.03#ibcon#about to write, iclass 28, count 2 2006.229.04:05:28.03#ibcon#wrote, iclass 28, count 2 2006.229.04:05:28.03#ibcon#about to read 3, iclass 28, count 2 2006.229.04:05:28.05#ibcon#read 3, iclass 28, count 2 2006.229.04:05:28.05#ibcon#about to read 4, iclass 28, count 2 2006.229.04:05:28.05#ibcon#read 4, iclass 28, count 2 2006.229.04:05:28.05#ibcon#about to read 5, iclass 28, count 2 2006.229.04:05:28.05#ibcon#read 5, iclass 28, count 2 2006.229.04:05:28.05#ibcon#about to read 6, iclass 28, count 2 2006.229.04:05:28.05#ibcon#read 6, iclass 28, count 2 2006.229.04:05:28.05#ibcon#end of sib2, iclass 28, count 2 2006.229.04:05:28.05#ibcon#*mode == 0, iclass 28, count 2 2006.229.04:05:28.05#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.04:05:28.05#ibcon#[27=AT07-04\r\n] 2006.229.04:05:28.05#ibcon#*before write, iclass 28, count 2 2006.229.04:05:28.05#ibcon#enter sib2, iclass 28, count 2 2006.229.04:05:28.05#ibcon#flushed, iclass 28, count 2 2006.229.04:05:28.05#ibcon#about to write, iclass 28, count 2 2006.229.04:05:28.05#ibcon#wrote, iclass 28, count 2 2006.229.04:05:28.05#ibcon#about to read 3, iclass 28, count 2 2006.229.04:05:28.08#ibcon#read 3, iclass 28, count 2 2006.229.04:05:28.08#ibcon#about to read 4, iclass 28, count 2 2006.229.04:05:28.08#ibcon#read 4, iclass 28, count 2 2006.229.04:05:28.08#ibcon#about to read 5, iclass 28, count 2 2006.229.04:05:28.08#ibcon#read 5, iclass 28, count 2 2006.229.04:05:28.08#ibcon#about to read 6, iclass 28, count 2 2006.229.04:05:28.08#ibcon#read 6, iclass 28, count 2 2006.229.04:05:28.08#ibcon#end of sib2, iclass 28, count 2 2006.229.04:05:28.08#ibcon#*after write, iclass 28, count 2 2006.229.04:05:28.08#ibcon#*before return 0, iclass 28, count 2 2006.229.04:05:28.08#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:28.08#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:05:28.08#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.04:05:28.08#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:28.08#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:28.20#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:28.20#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:28.20#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:05:28.20#ibcon#first serial, iclass 28, count 0 2006.229.04:05:28.20#ibcon#enter sib2, iclass 28, count 0 2006.229.04:05:28.20#ibcon#flushed, iclass 28, count 0 2006.229.04:05:28.20#ibcon#about to write, iclass 28, count 0 2006.229.04:05:28.20#ibcon#wrote, iclass 28, count 0 2006.229.04:05:28.20#ibcon#about to read 3, iclass 28, count 0 2006.229.04:05:28.22#ibcon#read 3, iclass 28, count 0 2006.229.04:05:28.22#ibcon#about to read 4, iclass 28, count 0 2006.229.04:05:28.22#ibcon#read 4, iclass 28, count 0 2006.229.04:05:28.22#ibcon#about to read 5, iclass 28, count 0 2006.229.04:05:28.22#ibcon#read 5, iclass 28, count 0 2006.229.04:05:28.22#ibcon#about to read 6, iclass 28, count 0 2006.229.04:05:28.22#ibcon#read 6, iclass 28, count 0 2006.229.04:05:28.22#ibcon#end of sib2, iclass 28, count 0 2006.229.04:05:28.22#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:05:28.22#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:05:28.22#ibcon#[27=USB\r\n] 2006.229.04:05:28.22#ibcon#*before write, iclass 28, count 0 2006.229.04:05:28.22#ibcon#enter sib2, iclass 28, count 0 2006.229.04:05:28.22#ibcon#flushed, iclass 28, count 0 2006.229.04:05:28.22#ibcon#about to write, iclass 28, count 0 2006.229.04:05:28.22#ibcon#wrote, iclass 28, count 0 2006.229.04:05:28.22#ibcon#about to read 3, iclass 28, count 0 2006.229.04:05:28.25#ibcon#read 3, iclass 28, count 0 2006.229.04:05:28.25#ibcon#about to read 4, iclass 28, count 0 2006.229.04:05:28.25#ibcon#read 4, iclass 28, count 0 2006.229.04:05:28.25#ibcon#about to read 5, iclass 28, count 0 2006.229.04:05:28.25#ibcon#read 5, iclass 28, count 0 2006.229.04:05:28.25#ibcon#about to read 6, iclass 28, count 0 2006.229.04:05:28.25#ibcon#read 6, iclass 28, count 0 2006.229.04:05:28.25#ibcon#end of sib2, iclass 28, count 0 2006.229.04:05:28.25#ibcon#*after write, iclass 28, count 0 2006.229.04:05:28.25#ibcon#*before return 0, iclass 28, count 0 2006.229.04:05:28.25#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:28.25#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:05:28.25#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:05:28.25#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:05:28.25$vck44/vblo=8,744.99 2006.229.04:05:28.25#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.04:05:28.25#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.04:05:28.25#ibcon#ireg 17 cls_cnt 0 2006.229.04:05:28.25#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:28.25#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:28.25#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:28.25#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:05:28.25#ibcon#first serial, iclass 30, count 0 2006.229.04:05:28.25#ibcon#enter sib2, iclass 30, count 0 2006.229.04:05:28.25#ibcon#flushed, iclass 30, count 0 2006.229.04:05:28.25#ibcon#about to write, iclass 30, count 0 2006.229.04:05:28.25#ibcon#wrote, iclass 30, count 0 2006.229.04:05:28.25#ibcon#about to read 3, iclass 30, count 0 2006.229.04:05:28.27#ibcon#read 3, iclass 30, count 0 2006.229.04:05:28.27#ibcon#about to read 4, iclass 30, count 0 2006.229.04:05:28.27#ibcon#read 4, iclass 30, count 0 2006.229.04:05:28.27#ibcon#about to read 5, iclass 30, count 0 2006.229.04:05:28.27#ibcon#read 5, iclass 30, count 0 2006.229.04:05:28.27#ibcon#about to read 6, iclass 30, count 0 2006.229.04:05:28.27#ibcon#read 6, iclass 30, count 0 2006.229.04:05:28.27#ibcon#end of sib2, iclass 30, count 0 2006.229.04:05:28.27#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:05:28.27#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:05:28.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:05:28.27#ibcon#*before write, iclass 30, count 0 2006.229.04:05:28.27#ibcon#enter sib2, iclass 30, count 0 2006.229.04:05:28.27#ibcon#flushed, iclass 30, count 0 2006.229.04:05:28.27#ibcon#about to write, iclass 30, count 0 2006.229.04:05:28.27#ibcon#wrote, iclass 30, count 0 2006.229.04:05:28.27#ibcon#about to read 3, iclass 30, count 0 2006.229.04:05:28.31#ibcon#read 3, iclass 30, count 0 2006.229.04:05:28.31#ibcon#about to read 4, iclass 30, count 0 2006.229.04:05:28.31#ibcon#read 4, iclass 30, count 0 2006.229.04:05:28.31#ibcon#about to read 5, iclass 30, count 0 2006.229.04:05:28.31#ibcon#read 5, iclass 30, count 0 2006.229.04:05:28.31#ibcon#about to read 6, iclass 30, count 0 2006.229.04:05:28.31#ibcon#read 6, iclass 30, count 0 2006.229.04:05:28.31#ibcon#end of sib2, iclass 30, count 0 2006.229.04:05:28.31#ibcon#*after write, iclass 30, count 0 2006.229.04:05:28.31#ibcon#*before return 0, iclass 30, count 0 2006.229.04:05:28.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:28.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:05:28.31#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:05:28.31#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:05:28.31$vck44/vb=8,4 2006.229.04:05:28.31#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:05:28.31#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:05:28.31#ibcon#ireg 11 cls_cnt 2 2006.229.04:05:28.31#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:28.37#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:28.37#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:28.37#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:05:28.37#ibcon#first serial, iclass 32, count 2 2006.229.04:05:28.37#ibcon#enter sib2, iclass 32, count 2 2006.229.04:05:28.37#ibcon#flushed, iclass 32, count 2 2006.229.04:05:28.37#ibcon#about to write, iclass 32, count 2 2006.229.04:05:28.37#ibcon#wrote, iclass 32, count 2 2006.229.04:05:28.37#ibcon#about to read 3, iclass 32, count 2 2006.229.04:05:28.39#ibcon#read 3, iclass 32, count 2 2006.229.04:05:28.39#ibcon#about to read 4, iclass 32, count 2 2006.229.04:05:28.39#ibcon#read 4, iclass 32, count 2 2006.229.04:05:28.39#ibcon#about to read 5, iclass 32, count 2 2006.229.04:05:28.39#ibcon#read 5, iclass 32, count 2 2006.229.04:05:28.39#ibcon#about to read 6, iclass 32, count 2 2006.229.04:05:28.39#ibcon#read 6, iclass 32, count 2 2006.229.04:05:28.39#ibcon#end of sib2, iclass 32, count 2 2006.229.04:05:28.39#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:05:28.39#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:05:28.39#ibcon#[27=AT08-04\r\n] 2006.229.04:05:28.39#ibcon#*before write, iclass 32, count 2 2006.229.04:05:28.39#ibcon#enter sib2, iclass 32, count 2 2006.229.04:05:28.39#ibcon#flushed, iclass 32, count 2 2006.229.04:05:28.39#ibcon#about to write, iclass 32, count 2 2006.229.04:05:28.39#ibcon#wrote, iclass 32, count 2 2006.229.04:05:28.39#ibcon#about to read 3, iclass 32, count 2 2006.229.04:05:28.42#ibcon#read 3, iclass 32, count 2 2006.229.04:05:28.42#ibcon#about to read 4, iclass 32, count 2 2006.229.04:05:28.42#ibcon#read 4, iclass 32, count 2 2006.229.04:05:28.42#ibcon#about to read 5, iclass 32, count 2 2006.229.04:05:28.42#ibcon#read 5, iclass 32, count 2 2006.229.04:05:28.42#ibcon#about to read 6, iclass 32, count 2 2006.229.04:05:28.42#ibcon#read 6, iclass 32, count 2 2006.229.04:05:28.42#ibcon#end of sib2, iclass 32, count 2 2006.229.04:05:28.42#ibcon#*after write, iclass 32, count 2 2006.229.04:05:28.42#ibcon#*before return 0, iclass 32, count 2 2006.229.04:05:28.42#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:28.42#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:05:28.42#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:05:28.42#ibcon#ireg 7 cls_cnt 0 2006.229.04:05:28.42#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:28.54#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:28.54#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:28.54#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:05:28.54#ibcon#first serial, iclass 32, count 0 2006.229.04:05:28.54#ibcon#enter sib2, iclass 32, count 0 2006.229.04:05:28.54#ibcon#flushed, iclass 32, count 0 2006.229.04:05:28.54#ibcon#about to write, iclass 32, count 0 2006.229.04:05:28.54#ibcon#wrote, iclass 32, count 0 2006.229.04:05:28.54#ibcon#about to read 3, iclass 32, count 0 2006.229.04:05:28.56#ibcon#read 3, iclass 32, count 0 2006.229.04:05:28.56#ibcon#about to read 4, iclass 32, count 0 2006.229.04:05:28.56#ibcon#read 4, iclass 32, count 0 2006.229.04:05:28.56#ibcon#about to read 5, iclass 32, count 0 2006.229.04:05:28.56#ibcon#read 5, iclass 32, count 0 2006.229.04:05:28.56#ibcon#about to read 6, iclass 32, count 0 2006.229.04:05:28.56#ibcon#read 6, iclass 32, count 0 2006.229.04:05:28.56#ibcon#end of sib2, iclass 32, count 0 2006.229.04:05:28.56#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:05:28.56#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:05:28.56#ibcon#[27=USB\r\n] 2006.229.04:05:28.56#ibcon#*before write, iclass 32, count 0 2006.229.04:05:28.56#ibcon#enter sib2, iclass 32, count 0 2006.229.04:05:28.56#ibcon#flushed, iclass 32, count 0 2006.229.04:05:28.56#ibcon#about to write, iclass 32, count 0 2006.229.04:05:28.56#ibcon#wrote, iclass 32, count 0 2006.229.04:05:28.56#ibcon#about to read 3, iclass 32, count 0 2006.229.04:05:28.59#ibcon#read 3, iclass 32, count 0 2006.229.04:05:28.59#ibcon#about to read 4, iclass 32, count 0 2006.229.04:05:28.59#ibcon#read 4, iclass 32, count 0 2006.229.04:05:28.59#ibcon#about to read 5, iclass 32, count 0 2006.229.04:05:28.59#ibcon#read 5, iclass 32, count 0 2006.229.04:05:28.59#ibcon#about to read 6, iclass 32, count 0 2006.229.04:05:28.59#ibcon#read 6, iclass 32, count 0 2006.229.04:05:28.59#ibcon#end of sib2, iclass 32, count 0 2006.229.04:05:28.59#ibcon#*after write, iclass 32, count 0 2006.229.04:05:28.59#ibcon#*before return 0, iclass 32, count 0 2006.229.04:05:28.59#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:28.59#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:05:28.59#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:05:28.59#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:05:28.59$vck44/vabw=wide 2006.229.04:05:28.59#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.04:05:28.59#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.04:05:28.59#ibcon#ireg 8 cls_cnt 0 2006.229.04:05:28.59#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:28.59#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:28.59#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:28.59#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:05:28.59#ibcon#first serial, iclass 34, count 0 2006.229.04:05:28.59#ibcon#enter sib2, iclass 34, count 0 2006.229.04:05:28.59#ibcon#flushed, iclass 34, count 0 2006.229.04:05:28.59#ibcon#about to write, iclass 34, count 0 2006.229.04:05:28.59#ibcon#wrote, iclass 34, count 0 2006.229.04:05:28.59#ibcon#about to read 3, iclass 34, count 0 2006.229.04:05:28.61#ibcon#read 3, iclass 34, count 0 2006.229.04:05:28.61#ibcon#about to read 4, iclass 34, count 0 2006.229.04:05:28.61#ibcon#read 4, iclass 34, count 0 2006.229.04:05:28.61#ibcon#about to read 5, iclass 34, count 0 2006.229.04:05:28.61#ibcon#read 5, iclass 34, count 0 2006.229.04:05:28.61#ibcon#about to read 6, iclass 34, count 0 2006.229.04:05:28.61#ibcon#read 6, iclass 34, count 0 2006.229.04:05:28.61#ibcon#end of sib2, iclass 34, count 0 2006.229.04:05:28.61#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:05:28.61#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:05:28.61#ibcon#[25=BW32\r\n] 2006.229.04:05:28.61#ibcon#*before write, iclass 34, count 0 2006.229.04:05:28.61#ibcon#enter sib2, iclass 34, count 0 2006.229.04:05:28.61#ibcon#flushed, iclass 34, count 0 2006.229.04:05:28.61#ibcon#about to write, iclass 34, count 0 2006.229.04:05:28.61#ibcon#wrote, iclass 34, count 0 2006.229.04:05:28.61#ibcon#about to read 3, iclass 34, count 0 2006.229.04:05:28.64#ibcon#read 3, iclass 34, count 0 2006.229.04:05:28.64#ibcon#about to read 4, iclass 34, count 0 2006.229.04:05:28.64#ibcon#read 4, iclass 34, count 0 2006.229.04:05:28.64#ibcon#about to read 5, iclass 34, count 0 2006.229.04:05:28.64#ibcon#read 5, iclass 34, count 0 2006.229.04:05:28.64#ibcon#about to read 6, iclass 34, count 0 2006.229.04:05:28.64#ibcon#read 6, iclass 34, count 0 2006.229.04:05:28.64#ibcon#end of sib2, iclass 34, count 0 2006.229.04:05:28.64#ibcon#*after write, iclass 34, count 0 2006.229.04:05:28.64#ibcon#*before return 0, iclass 34, count 0 2006.229.04:05:28.64#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:28.64#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:05:28.64#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:05:28.64#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:05:28.64$vck44/vbbw=wide 2006.229.04:05:28.64#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:05:28.64#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:05:28.64#ibcon#ireg 8 cls_cnt 0 2006.229.04:05:28.64#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:05:28.71#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:05:28.71#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:05:28.71#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:05:28.71#ibcon#first serial, iclass 36, count 0 2006.229.04:05:28.71#ibcon#enter sib2, iclass 36, count 0 2006.229.04:05:28.71#ibcon#flushed, iclass 36, count 0 2006.229.04:05:28.71#ibcon#about to write, iclass 36, count 0 2006.229.04:05:28.71#ibcon#wrote, iclass 36, count 0 2006.229.04:05:28.71#ibcon#about to read 3, iclass 36, count 0 2006.229.04:05:28.73#ibcon#read 3, iclass 36, count 0 2006.229.04:05:28.73#ibcon#about to read 4, iclass 36, count 0 2006.229.04:05:28.73#ibcon#read 4, iclass 36, count 0 2006.229.04:05:28.73#ibcon#about to read 5, iclass 36, count 0 2006.229.04:05:28.73#ibcon#read 5, iclass 36, count 0 2006.229.04:05:28.73#ibcon#about to read 6, iclass 36, count 0 2006.229.04:05:28.73#ibcon#read 6, iclass 36, count 0 2006.229.04:05:28.73#ibcon#end of sib2, iclass 36, count 0 2006.229.04:05:28.73#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:05:28.73#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:05:28.73#ibcon#[27=BW32\r\n] 2006.229.04:05:28.73#ibcon#*before write, iclass 36, count 0 2006.229.04:05:28.73#ibcon#enter sib2, iclass 36, count 0 2006.229.04:05:28.73#ibcon#flushed, iclass 36, count 0 2006.229.04:05:28.73#ibcon#about to write, iclass 36, count 0 2006.229.04:05:28.73#ibcon#wrote, iclass 36, count 0 2006.229.04:05:28.73#ibcon#about to read 3, iclass 36, count 0 2006.229.04:05:28.76#ibcon#read 3, iclass 36, count 0 2006.229.04:05:28.76#ibcon#about to read 4, iclass 36, count 0 2006.229.04:05:28.76#ibcon#read 4, iclass 36, count 0 2006.229.04:05:28.76#ibcon#about to read 5, iclass 36, count 0 2006.229.04:05:28.76#ibcon#read 5, iclass 36, count 0 2006.229.04:05:28.76#ibcon#about to read 6, iclass 36, count 0 2006.229.04:05:28.76#ibcon#read 6, iclass 36, count 0 2006.229.04:05:28.76#ibcon#end of sib2, iclass 36, count 0 2006.229.04:05:28.76#ibcon#*after write, iclass 36, count 0 2006.229.04:05:28.76#ibcon#*before return 0, iclass 36, count 0 2006.229.04:05:28.76#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:05:28.76#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:05:28.76#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:05:28.76#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:05:28.76$setupk4/ifdk4 2006.229.04:05:28.76$ifdk4/lo= 2006.229.04:05:28.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:05:28.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:05:28.76$ifdk4/patch= 2006.229.04:05:28.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:05:28.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:05:28.76$setupk4/!*+20s 2006.229.04:05:31.33#abcon#<5=/04 2.4 4.1 30.21 951000.3\r\n> 2006.229.04:05:31.35#abcon#{5=INTERFACE CLEAR} 2006.229.04:05:31.41#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:05:41.50#abcon#<5=/04 2.4 4.0 30.21 951000.3\r\n> 2006.229.04:05:41.52#abcon#{5=INTERFACE CLEAR} 2006.229.04:05:41.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:05:43.25$setupk4/"tpicd 2006.229.04:05:43.25$setupk4/echo=off 2006.229.04:05:43.25$setupk4/xlog=off 2006.229.04:05:43.25:!2006.229.04:07:44 2006.229.04:05:58.14#trakl#Source acquired 2006.229.04:05:58.14#flagr#flagr/antenna,acquired 2006.229.04:07:44.00:preob 2006.229.04:07:44.14/onsource/TRACKING 2006.229.04:07:44.14:!2006.229.04:07:54 2006.229.04:07:54.00:"tape 2006.229.04:07:54.00:"st=record 2006.229.04:07:54.00:data_valid=on 2006.229.04:07:54.00:midob 2006.229.04:07:55.14/onsource/TRACKING 2006.229.04:07:55.14/wx/30.33,1000.2,93 2006.229.04:07:55.33/cable/+6.4083E-03 2006.229.04:07:56.42/va/01,08,usb,yes,30,33 2006.229.04:07:56.42/va/02,07,usb,yes,33,33 2006.229.04:07:56.42/va/03,06,usb,yes,41,43 2006.229.04:07:56.42/va/04,07,usb,yes,34,35 2006.229.04:07:56.42/va/05,04,usb,yes,30,31 2006.229.04:07:56.42/va/06,04,usb,yes,34,33 2006.229.04:07:56.42/va/07,05,usb,yes,30,31 2006.229.04:07:56.42/va/08,06,usb,yes,22,27 2006.229.04:07:56.65/valo/01,524.99,yes,locked 2006.229.04:07:56.65/valo/02,534.99,yes,locked 2006.229.04:07:56.65/valo/03,564.99,yes,locked 2006.229.04:07:56.65/valo/04,624.99,yes,locked 2006.229.04:07:56.65/valo/05,734.99,yes,locked 2006.229.04:07:56.65/valo/06,814.99,yes,locked 2006.229.04:07:56.65/valo/07,864.99,yes,locked 2006.229.04:07:56.65/valo/08,884.99,yes,locked 2006.229.04:07:57.74/vb/01,04,usb,yes,31,29 2006.229.04:07:57.74/vb/02,04,usb,yes,34,34 2006.229.04:07:57.74/vb/03,04,usb,yes,31,34 2006.229.04:07:57.74/vb/04,04,usb,yes,35,34 2006.229.04:07:57.74/vb/05,04,usb,yes,27,30 2006.229.04:07:57.74/vb/06,04,usb,yes,32,28 2006.229.04:07:57.74/vb/07,04,usb,yes,32,32 2006.229.04:07:57.74/vb/08,04,usb,yes,29,33 2006.229.04:07:57.97/vblo/01,629.99,yes,locked 2006.229.04:07:57.97/vblo/02,634.99,yes,locked 2006.229.04:07:57.97/vblo/03,649.99,yes,locked 2006.229.04:07:57.97/vblo/04,679.99,yes,locked 2006.229.04:07:57.97/vblo/05,709.99,yes,locked 2006.229.04:07:57.97/vblo/06,719.99,yes,locked 2006.229.04:07:57.97/vblo/07,734.99,yes,locked 2006.229.04:07:57.97/vblo/08,744.99,yes,locked 2006.229.04:07:58.12/vabw/8 2006.229.04:07:58.27/vbbw/8 2006.229.04:07:58.36/xfe/off,on,12.0 2006.229.04:07:58.74/ifatt/23,28,28,28 2006.229.04:07:59.08/fmout-gps/S +4.48E-07 2006.229.04:07:59.12:!2006.229.04:11:04 2006.229.04:11:04.00:data_valid=off 2006.229.04:11:04.00:"et 2006.229.04:11:04.00:!+3s 2006.229.04:11:07.01:"tape 2006.229.04:11:07.01:postob 2006.229.04:11:07.09/cable/+6.4082E-03 2006.229.04:11:07.09/wx/30.41,1000.2,95 2006.229.04:11:08.07/fmout-gps/S +4.49E-07 2006.229.04:11:08.07:scan_name=229-0413,jd0608,110 2006.229.04:11:08.07:source=3c274,123049.42,122328.0,2000.0,ccw 2006.229.04:11:09.14#flagr#flagr/antenna,new-source 2006.229.04:11:09.14:checkk5 2006.229.04:11:09.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:11:09.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:11:10.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:11:10.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:11:11.13/chk_obsdata//k5ts1/T2290407??a.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.04:11:11.54/chk_obsdata//k5ts2/T2290407??b.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.04:11:11.94/chk_obsdata//k5ts3/T2290407??c.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.04:11:12.32/chk_obsdata//k5ts4/T2290407??d.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.04:11:13.04/k5log//k5ts1_log_newline 2006.229.04:11:13.74/k5log//k5ts2_log_newline 2006.229.04:11:14.44/k5log//k5ts3_log_newline 2006.229.04:11:15.15/k5log//k5ts4_log_newline 2006.229.04:11:15.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:11:15.17:setupk4=1 2006.229.04:11:15.17$setupk4/echo=on 2006.229.04:11:15.17$setupk4/pcalon 2006.229.04:11:15.17$pcalon/"no phase cal control is implemented here 2006.229.04:11:15.17$setupk4/"tpicd=stop 2006.229.04:11:15.17$setupk4/"rec=synch_on 2006.229.04:11:15.17$setupk4/"rec_mode=128 2006.229.04:11:15.17$setupk4/!* 2006.229.04:11:15.17$setupk4/recpk4 2006.229.04:11:15.17$recpk4/recpatch= 2006.229.04:11:15.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:11:15.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:11:15.17$setupk4/vck44 2006.229.04:11:15.17$vck44/valo=1,524.99 2006.229.04:11:15.17#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.04:11:15.17#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.04:11:15.17#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:15.17#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:15.17#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:15.17#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:15.17#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:11:15.17#ibcon#first serial, iclass 33, count 0 2006.229.04:11:15.17#ibcon#enter sib2, iclass 33, count 0 2006.229.04:11:15.17#ibcon#flushed, iclass 33, count 0 2006.229.04:11:15.17#ibcon#about to write, iclass 33, count 0 2006.229.04:11:15.17#ibcon#wrote, iclass 33, count 0 2006.229.04:11:15.17#ibcon#about to read 3, iclass 33, count 0 2006.229.04:11:15.19#ibcon#read 3, iclass 33, count 0 2006.229.04:11:15.19#ibcon#about to read 4, iclass 33, count 0 2006.229.04:11:15.19#ibcon#read 4, iclass 33, count 0 2006.229.04:11:15.19#ibcon#about to read 5, iclass 33, count 0 2006.229.04:11:15.19#ibcon#read 5, iclass 33, count 0 2006.229.04:11:15.19#ibcon#about to read 6, iclass 33, count 0 2006.229.04:11:15.19#ibcon#read 6, iclass 33, count 0 2006.229.04:11:15.19#ibcon#end of sib2, iclass 33, count 0 2006.229.04:11:15.19#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:11:15.19#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:11:15.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:11:15.19#ibcon#*before write, iclass 33, count 0 2006.229.04:11:15.19#ibcon#enter sib2, iclass 33, count 0 2006.229.04:11:15.19#ibcon#flushed, iclass 33, count 0 2006.229.04:11:15.19#ibcon#about to write, iclass 33, count 0 2006.229.04:11:15.19#ibcon#wrote, iclass 33, count 0 2006.229.04:11:15.19#ibcon#about to read 3, iclass 33, count 0 2006.229.04:11:15.24#ibcon#read 3, iclass 33, count 0 2006.229.04:11:15.24#ibcon#about to read 4, iclass 33, count 0 2006.229.04:11:15.24#ibcon#read 4, iclass 33, count 0 2006.229.04:11:15.24#ibcon#about to read 5, iclass 33, count 0 2006.229.04:11:15.24#ibcon#read 5, iclass 33, count 0 2006.229.04:11:15.24#ibcon#about to read 6, iclass 33, count 0 2006.229.04:11:15.24#ibcon#read 6, iclass 33, count 0 2006.229.04:11:15.24#ibcon#end of sib2, iclass 33, count 0 2006.229.04:11:15.24#ibcon#*after write, iclass 33, count 0 2006.229.04:11:15.24#ibcon#*before return 0, iclass 33, count 0 2006.229.04:11:15.24#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:15.24#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:15.24#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:11:15.24#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:11:15.24$vck44/va=1,8 2006.229.04:11:15.24#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.04:11:15.24#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.04:11:15.24#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:15.24#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:15.24#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:15.24#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:15.24#ibcon#enter wrdev, iclass 35, count 2 2006.229.04:11:15.24#ibcon#first serial, iclass 35, count 2 2006.229.04:11:15.24#ibcon#enter sib2, iclass 35, count 2 2006.229.04:11:15.24#ibcon#flushed, iclass 35, count 2 2006.229.04:11:15.24#ibcon#about to write, iclass 35, count 2 2006.229.04:11:15.24#ibcon#wrote, iclass 35, count 2 2006.229.04:11:15.24#ibcon#about to read 3, iclass 35, count 2 2006.229.04:11:15.26#ibcon#read 3, iclass 35, count 2 2006.229.04:11:15.26#ibcon#about to read 4, iclass 35, count 2 2006.229.04:11:15.26#ibcon#read 4, iclass 35, count 2 2006.229.04:11:15.26#ibcon#about to read 5, iclass 35, count 2 2006.229.04:11:15.26#ibcon#read 5, iclass 35, count 2 2006.229.04:11:15.26#ibcon#about to read 6, iclass 35, count 2 2006.229.04:11:15.26#ibcon#read 6, iclass 35, count 2 2006.229.04:11:15.26#ibcon#end of sib2, iclass 35, count 2 2006.229.04:11:15.26#ibcon#*mode == 0, iclass 35, count 2 2006.229.04:11:15.26#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.04:11:15.26#ibcon#[25=AT01-08\r\n] 2006.229.04:11:15.26#ibcon#*before write, iclass 35, count 2 2006.229.04:11:15.26#ibcon#enter sib2, iclass 35, count 2 2006.229.04:11:15.26#ibcon#flushed, iclass 35, count 2 2006.229.04:11:15.26#ibcon#about to write, iclass 35, count 2 2006.229.04:11:15.26#ibcon#wrote, iclass 35, count 2 2006.229.04:11:15.26#ibcon#about to read 3, iclass 35, count 2 2006.229.04:11:15.29#ibcon#read 3, iclass 35, count 2 2006.229.04:11:15.29#ibcon#about to read 4, iclass 35, count 2 2006.229.04:11:15.29#ibcon#read 4, iclass 35, count 2 2006.229.04:11:15.29#ibcon#about to read 5, iclass 35, count 2 2006.229.04:11:15.29#ibcon#read 5, iclass 35, count 2 2006.229.04:11:15.29#ibcon#about to read 6, iclass 35, count 2 2006.229.04:11:15.29#ibcon#read 6, iclass 35, count 2 2006.229.04:11:15.29#ibcon#end of sib2, iclass 35, count 2 2006.229.04:11:15.29#ibcon#*after write, iclass 35, count 2 2006.229.04:11:15.29#ibcon#*before return 0, iclass 35, count 2 2006.229.04:11:15.29#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:15.29#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:15.29#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.04:11:15.29#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:15.29#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:15.41#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:15.41#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:15.41#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:11:15.41#ibcon#first serial, iclass 35, count 0 2006.229.04:11:15.41#ibcon#enter sib2, iclass 35, count 0 2006.229.04:11:15.41#ibcon#flushed, iclass 35, count 0 2006.229.04:11:15.41#ibcon#about to write, iclass 35, count 0 2006.229.04:11:15.41#ibcon#wrote, iclass 35, count 0 2006.229.04:11:15.41#ibcon#about to read 3, iclass 35, count 0 2006.229.04:11:15.43#ibcon#read 3, iclass 35, count 0 2006.229.04:11:15.43#ibcon#about to read 4, iclass 35, count 0 2006.229.04:11:15.43#ibcon#read 4, iclass 35, count 0 2006.229.04:11:15.43#ibcon#about to read 5, iclass 35, count 0 2006.229.04:11:15.43#ibcon#read 5, iclass 35, count 0 2006.229.04:11:15.43#ibcon#about to read 6, iclass 35, count 0 2006.229.04:11:15.43#ibcon#read 6, iclass 35, count 0 2006.229.04:11:15.43#ibcon#end of sib2, iclass 35, count 0 2006.229.04:11:15.43#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:11:15.43#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:11:15.43#ibcon#[25=USB\r\n] 2006.229.04:11:15.43#ibcon#*before write, iclass 35, count 0 2006.229.04:11:15.43#ibcon#enter sib2, iclass 35, count 0 2006.229.04:11:15.43#ibcon#flushed, iclass 35, count 0 2006.229.04:11:15.43#ibcon#about to write, iclass 35, count 0 2006.229.04:11:15.43#ibcon#wrote, iclass 35, count 0 2006.229.04:11:15.43#ibcon#about to read 3, iclass 35, count 0 2006.229.04:11:15.46#ibcon#read 3, iclass 35, count 0 2006.229.04:11:15.46#ibcon#about to read 4, iclass 35, count 0 2006.229.04:11:15.46#ibcon#read 4, iclass 35, count 0 2006.229.04:11:15.46#ibcon#about to read 5, iclass 35, count 0 2006.229.04:11:15.46#ibcon#read 5, iclass 35, count 0 2006.229.04:11:15.46#ibcon#about to read 6, iclass 35, count 0 2006.229.04:11:15.46#ibcon#read 6, iclass 35, count 0 2006.229.04:11:15.46#ibcon#end of sib2, iclass 35, count 0 2006.229.04:11:15.46#ibcon#*after write, iclass 35, count 0 2006.229.04:11:15.46#ibcon#*before return 0, iclass 35, count 0 2006.229.04:11:15.46#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:15.46#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:15.46#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:11:15.46#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:11:15.46$vck44/valo=2,534.99 2006.229.04:11:15.46#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.04:11:15.46#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.04:11:15.46#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:15.46#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:15.46#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:15.46#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:15.46#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:11:15.46#ibcon#first serial, iclass 37, count 0 2006.229.04:11:15.46#ibcon#enter sib2, iclass 37, count 0 2006.229.04:11:15.46#ibcon#flushed, iclass 37, count 0 2006.229.04:11:15.46#ibcon#about to write, iclass 37, count 0 2006.229.04:11:15.46#ibcon#wrote, iclass 37, count 0 2006.229.04:11:15.46#ibcon#about to read 3, iclass 37, count 0 2006.229.04:11:15.48#ibcon#read 3, iclass 37, count 0 2006.229.04:11:15.48#ibcon#about to read 4, iclass 37, count 0 2006.229.04:11:15.48#ibcon#read 4, iclass 37, count 0 2006.229.04:11:15.48#ibcon#about to read 5, iclass 37, count 0 2006.229.04:11:15.48#ibcon#read 5, iclass 37, count 0 2006.229.04:11:15.48#ibcon#about to read 6, iclass 37, count 0 2006.229.04:11:15.48#ibcon#read 6, iclass 37, count 0 2006.229.04:11:15.48#ibcon#end of sib2, iclass 37, count 0 2006.229.04:11:15.48#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:11:15.48#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:11:15.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:11:15.48#ibcon#*before write, iclass 37, count 0 2006.229.04:11:15.48#ibcon#enter sib2, iclass 37, count 0 2006.229.04:11:15.48#ibcon#flushed, iclass 37, count 0 2006.229.04:11:15.48#ibcon#about to write, iclass 37, count 0 2006.229.04:11:15.48#ibcon#wrote, iclass 37, count 0 2006.229.04:11:15.48#ibcon#about to read 3, iclass 37, count 0 2006.229.04:11:15.52#ibcon#read 3, iclass 37, count 0 2006.229.04:11:15.52#ibcon#about to read 4, iclass 37, count 0 2006.229.04:11:15.52#ibcon#read 4, iclass 37, count 0 2006.229.04:11:15.52#ibcon#about to read 5, iclass 37, count 0 2006.229.04:11:15.52#ibcon#read 5, iclass 37, count 0 2006.229.04:11:15.52#ibcon#about to read 6, iclass 37, count 0 2006.229.04:11:15.52#ibcon#read 6, iclass 37, count 0 2006.229.04:11:15.52#ibcon#end of sib2, iclass 37, count 0 2006.229.04:11:15.52#ibcon#*after write, iclass 37, count 0 2006.229.04:11:15.52#ibcon#*before return 0, iclass 37, count 0 2006.229.04:11:15.52#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:15.52#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:15.52#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:11:15.52#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:11:15.52$vck44/va=2,7 2006.229.04:11:15.52#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.04:11:15.52#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.04:11:15.52#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:15.52#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:15.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:15.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:15.58#ibcon#enter wrdev, iclass 39, count 2 2006.229.04:11:15.58#ibcon#first serial, iclass 39, count 2 2006.229.04:11:15.58#ibcon#enter sib2, iclass 39, count 2 2006.229.04:11:15.58#ibcon#flushed, iclass 39, count 2 2006.229.04:11:15.58#ibcon#about to write, iclass 39, count 2 2006.229.04:11:15.58#ibcon#wrote, iclass 39, count 2 2006.229.04:11:15.58#ibcon#about to read 3, iclass 39, count 2 2006.229.04:11:15.60#ibcon#read 3, iclass 39, count 2 2006.229.04:11:15.60#ibcon#about to read 4, iclass 39, count 2 2006.229.04:11:15.60#ibcon#read 4, iclass 39, count 2 2006.229.04:11:15.60#ibcon#about to read 5, iclass 39, count 2 2006.229.04:11:15.60#ibcon#read 5, iclass 39, count 2 2006.229.04:11:15.60#ibcon#about to read 6, iclass 39, count 2 2006.229.04:11:15.60#ibcon#read 6, iclass 39, count 2 2006.229.04:11:15.60#ibcon#end of sib2, iclass 39, count 2 2006.229.04:11:15.60#ibcon#*mode == 0, iclass 39, count 2 2006.229.04:11:15.60#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.04:11:15.60#ibcon#[25=AT02-07\r\n] 2006.229.04:11:15.60#ibcon#*before write, iclass 39, count 2 2006.229.04:11:15.60#ibcon#enter sib2, iclass 39, count 2 2006.229.04:11:15.60#ibcon#flushed, iclass 39, count 2 2006.229.04:11:15.60#ibcon#about to write, iclass 39, count 2 2006.229.04:11:15.60#ibcon#wrote, iclass 39, count 2 2006.229.04:11:15.60#ibcon#about to read 3, iclass 39, count 2 2006.229.04:11:15.63#ibcon#read 3, iclass 39, count 2 2006.229.04:11:15.63#ibcon#about to read 4, iclass 39, count 2 2006.229.04:11:15.63#ibcon#read 4, iclass 39, count 2 2006.229.04:11:15.63#ibcon#about to read 5, iclass 39, count 2 2006.229.04:11:15.63#ibcon#read 5, iclass 39, count 2 2006.229.04:11:15.63#ibcon#about to read 6, iclass 39, count 2 2006.229.04:11:15.63#ibcon#read 6, iclass 39, count 2 2006.229.04:11:15.63#ibcon#end of sib2, iclass 39, count 2 2006.229.04:11:15.63#ibcon#*after write, iclass 39, count 2 2006.229.04:11:15.63#ibcon#*before return 0, iclass 39, count 2 2006.229.04:11:15.63#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:15.63#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:15.63#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.04:11:15.63#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:15.63#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:15.75#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:15.75#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:15.75#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:11:15.75#ibcon#first serial, iclass 39, count 0 2006.229.04:11:15.75#ibcon#enter sib2, iclass 39, count 0 2006.229.04:11:15.75#ibcon#flushed, iclass 39, count 0 2006.229.04:11:15.75#ibcon#about to write, iclass 39, count 0 2006.229.04:11:15.75#ibcon#wrote, iclass 39, count 0 2006.229.04:11:15.75#ibcon#about to read 3, iclass 39, count 0 2006.229.04:11:15.77#ibcon#read 3, iclass 39, count 0 2006.229.04:11:15.77#ibcon#about to read 4, iclass 39, count 0 2006.229.04:11:15.77#ibcon#read 4, iclass 39, count 0 2006.229.04:11:15.77#ibcon#about to read 5, iclass 39, count 0 2006.229.04:11:15.77#ibcon#read 5, iclass 39, count 0 2006.229.04:11:15.77#ibcon#about to read 6, iclass 39, count 0 2006.229.04:11:15.77#ibcon#read 6, iclass 39, count 0 2006.229.04:11:15.77#ibcon#end of sib2, iclass 39, count 0 2006.229.04:11:15.77#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:11:15.77#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:11:15.77#ibcon#[25=USB\r\n] 2006.229.04:11:15.77#ibcon#*before write, iclass 39, count 0 2006.229.04:11:15.77#ibcon#enter sib2, iclass 39, count 0 2006.229.04:11:15.77#ibcon#flushed, iclass 39, count 0 2006.229.04:11:15.77#ibcon#about to write, iclass 39, count 0 2006.229.04:11:15.77#ibcon#wrote, iclass 39, count 0 2006.229.04:11:15.77#ibcon#about to read 3, iclass 39, count 0 2006.229.04:11:15.80#ibcon#read 3, iclass 39, count 0 2006.229.04:11:15.80#ibcon#about to read 4, iclass 39, count 0 2006.229.04:11:15.80#ibcon#read 4, iclass 39, count 0 2006.229.04:11:15.80#ibcon#about to read 5, iclass 39, count 0 2006.229.04:11:15.80#ibcon#read 5, iclass 39, count 0 2006.229.04:11:15.80#ibcon#about to read 6, iclass 39, count 0 2006.229.04:11:15.80#ibcon#read 6, iclass 39, count 0 2006.229.04:11:15.80#ibcon#end of sib2, iclass 39, count 0 2006.229.04:11:15.80#ibcon#*after write, iclass 39, count 0 2006.229.04:11:15.80#ibcon#*before return 0, iclass 39, count 0 2006.229.04:11:15.80#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:15.80#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:15.80#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:11:15.80#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:11:15.80$vck44/valo=3,564.99 2006.229.04:11:15.80#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.04:11:15.80#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.04:11:15.80#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:15.80#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:15.80#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:15.80#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:15.80#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:11:15.80#ibcon#first serial, iclass 3, count 0 2006.229.04:11:15.80#ibcon#enter sib2, iclass 3, count 0 2006.229.04:11:15.80#ibcon#flushed, iclass 3, count 0 2006.229.04:11:15.80#ibcon#about to write, iclass 3, count 0 2006.229.04:11:15.80#ibcon#wrote, iclass 3, count 0 2006.229.04:11:15.80#ibcon#about to read 3, iclass 3, count 0 2006.229.04:11:15.82#ibcon#read 3, iclass 3, count 0 2006.229.04:11:15.82#ibcon#about to read 4, iclass 3, count 0 2006.229.04:11:15.82#ibcon#read 4, iclass 3, count 0 2006.229.04:11:15.82#ibcon#about to read 5, iclass 3, count 0 2006.229.04:11:15.82#ibcon#read 5, iclass 3, count 0 2006.229.04:11:15.82#ibcon#about to read 6, iclass 3, count 0 2006.229.04:11:15.82#ibcon#read 6, iclass 3, count 0 2006.229.04:11:15.82#ibcon#end of sib2, iclass 3, count 0 2006.229.04:11:15.82#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:11:15.82#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:11:15.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:11:15.82#ibcon#*before write, iclass 3, count 0 2006.229.04:11:15.82#ibcon#enter sib2, iclass 3, count 0 2006.229.04:11:15.82#ibcon#flushed, iclass 3, count 0 2006.229.04:11:15.82#ibcon#about to write, iclass 3, count 0 2006.229.04:11:15.82#ibcon#wrote, iclass 3, count 0 2006.229.04:11:15.82#ibcon#about to read 3, iclass 3, count 0 2006.229.04:11:15.86#ibcon#read 3, iclass 3, count 0 2006.229.04:11:15.86#ibcon#about to read 4, iclass 3, count 0 2006.229.04:11:15.86#ibcon#read 4, iclass 3, count 0 2006.229.04:11:15.86#ibcon#about to read 5, iclass 3, count 0 2006.229.04:11:15.86#ibcon#read 5, iclass 3, count 0 2006.229.04:11:15.86#ibcon#about to read 6, iclass 3, count 0 2006.229.04:11:15.86#ibcon#read 6, iclass 3, count 0 2006.229.04:11:15.86#ibcon#end of sib2, iclass 3, count 0 2006.229.04:11:15.86#ibcon#*after write, iclass 3, count 0 2006.229.04:11:15.86#ibcon#*before return 0, iclass 3, count 0 2006.229.04:11:15.86#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:15.86#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:15.86#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:11:15.86#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:11:15.86$vck44/va=3,6 2006.229.04:11:15.86#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.04:11:15.86#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.04:11:15.86#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:15.86#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:15.92#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:15.92#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:15.92#ibcon#enter wrdev, iclass 5, count 2 2006.229.04:11:15.92#ibcon#first serial, iclass 5, count 2 2006.229.04:11:15.92#ibcon#enter sib2, iclass 5, count 2 2006.229.04:11:15.92#ibcon#flushed, iclass 5, count 2 2006.229.04:11:15.92#ibcon#about to write, iclass 5, count 2 2006.229.04:11:15.92#ibcon#wrote, iclass 5, count 2 2006.229.04:11:15.92#ibcon#about to read 3, iclass 5, count 2 2006.229.04:11:15.94#ibcon#read 3, iclass 5, count 2 2006.229.04:11:15.94#ibcon#about to read 4, iclass 5, count 2 2006.229.04:11:15.94#ibcon#read 4, iclass 5, count 2 2006.229.04:11:15.94#ibcon#about to read 5, iclass 5, count 2 2006.229.04:11:15.94#ibcon#read 5, iclass 5, count 2 2006.229.04:11:15.94#ibcon#about to read 6, iclass 5, count 2 2006.229.04:11:15.94#ibcon#read 6, iclass 5, count 2 2006.229.04:11:15.94#ibcon#end of sib2, iclass 5, count 2 2006.229.04:11:15.94#ibcon#*mode == 0, iclass 5, count 2 2006.229.04:11:15.94#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.04:11:15.94#ibcon#[25=AT03-06\r\n] 2006.229.04:11:15.94#ibcon#*before write, iclass 5, count 2 2006.229.04:11:15.94#ibcon#enter sib2, iclass 5, count 2 2006.229.04:11:15.94#ibcon#flushed, iclass 5, count 2 2006.229.04:11:15.94#ibcon#about to write, iclass 5, count 2 2006.229.04:11:15.94#ibcon#wrote, iclass 5, count 2 2006.229.04:11:15.94#ibcon#about to read 3, iclass 5, count 2 2006.229.04:11:15.97#ibcon#read 3, iclass 5, count 2 2006.229.04:11:15.97#ibcon#about to read 4, iclass 5, count 2 2006.229.04:11:15.97#ibcon#read 4, iclass 5, count 2 2006.229.04:11:15.97#ibcon#about to read 5, iclass 5, count 2 2006.229.04:11:15.97#ibcon#read 5, iclass 5, count 2 2006.229.04:11:15.97#ibcon#about to read 6, iclass 5, count 2 2006.229.04:11:15.97#ibcon#read 6, iclass 5, count 2 2006.229.04:11:15.97#ibcon#end of sib2, iclass 5, count 2 2006.229.04:11:15.97#ibcon#*after write, iclass 5, count 2 2006.229.04:11:15.97#ibcon#*before return 0, iclass 5, count 2 2006.229.04:11:15.97#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:15.97#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:15.97#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.04:11:15.97#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:15.97#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:16.09#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:16.09#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:16.09#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:11:16.09#ibcon#first serial, iclass 5, count 0 2006.229.04:11:16.09#ibcon#enter sib2, iclass 5, count 0 2006.229.04:11:16.09#ibcon#flushed, iclass 5, count 0 2006.229.04:11:16.09#ibcon#about to write, iclass 5, count 0 2006.229.04:11:16.09#ibcon#wrote, iclass 5, count 0 2006.229.04:11:16.09#ibcon#about to read 3, iclass 5, count 0 2006.229.04:11:16.11#ibcon#read 3, iclass 5, count 0 2006.229.04:11:16.11#ibcon#about to read 4, iclass 5, count 0 2006.229.04:11:16.11#ibcon#read 4, iclass 5, count 0 2006.229.04:11:16.11#ibcon#about to read 5, iclass 5, count 0 2006.229.04:11:16.11#ibcon#read 5, iclass 5, count 0 2006.229.04:11:16.11#ibcon#about to read 6, iclass 5, count 0 2006.229.04:11:16.11#ibcon#read 6, iclass 5, count 0 2006.229.04:11:16.11#ibcon#end of sib2, iclass 5, count 0 2006.229.04:11:16.11#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:11:16.11#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:11:16.11#ibcon#[25=USB\r\n] 2006.229.04:11:16.11#ibcon#*before write, iclass 5, count 0 2006.229.04:11:16.11#ibcon#enter sib2, iclass 5, count 0 2006.229.04:11:16.11#ibcon#flushed, iclass 5, count 0 2006.229.04:11:16.11#ibcon#about to write, iclass 5, count 0 2006.229.04:11:16.11#ibcon#wrote, iclass 5, count 0 2006.229.04:11:16.11#ibcon#about to read 3, iclass 5, count 0 2006.229.04:11:16.14#ibcon#read 3, iclass 5, count 0 2006.229.04:11:16.14#ibcon#about to read 4, iclass 5, count 0 2006.229.04:11:16.14#ibcon#read 4, iclass 5, count 0 2006.229.04:11:16.14#ibcon#about to read 5, iclass 5, count 0 2006.229.04:11:16.14#ibcon#read 5, iclass 5, count 0 2006.229.04:11:16.14#ibcon#about to read 6, iclass 5, count 0 2006.229.04:11:16.14#ibcon#read 6, iclass 5, count 0 2006.229.04:11:16.14#ibcon#end of sib2, iclass 5, count 0 2006.229.04:11:16.14#ibcon#*after write, iclass 5, count 0 2006.229.04:11:16.14#ibcon#*before return 0, iclass 5, count 0 2006.229.04:11:16.14#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:16.14#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:16.14#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:11:16.14#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:11:16.14$vck44/valo=4,624.99 2006.229.04:11:16.14#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.04:11:16.14#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.04:11:16.14#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:16.14#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:16.14#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:16.14#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:16.14#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:11:16.14#ibcon#first serial, iclass 7, count 0 2006.229.04:11:16.14#ibcon#enter sib2, iclass 7, count 0 2006.229.04:11:16.14#ibcon#flushed, iclass 7, count 0 2006.229.04:11:16.14#ibcon#about to write, iclass 7, count 0 2006.229.04:11:16.14#ibcon#wrote, iclass 7, count 0 2006.229.04:11:16.14#ibcon#about to read 3, iclass 7, count 0 2006.229.04:11:16.16#ibcon#read 3, iclass 7, count 0 2006.229.04:11:16.16#ibcon#about to read 4, iclass 7, count 0 2006.229.04:11:16.16#ibcon#read 4, iclass 7, count 0 2006.229.04:11:16.16#ibcon#about to read 5, iclass 7, count 0 2006.229.04:11:16.16#ibcon#read 5, iclass 7, count 0 2006.229.04:11:16.16#ibcon#about to read 6, iclass 7, count 0 2006.229.04:11:16.16#ibcon#read 6, iclass 7, count 0 2006.229.04:11:16.16#ibcon#end of sib2, iclass 7, count 0 2006.229.04:11:16.16#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:11:16.16#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:11:16.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:11:16.16#ibcon#*before write, iclass 7, count 0 2006.229.04:11:16.16#ibcon#enter sib2, iclass 7, count 0 2006.229.04:11:16.16#ibcon#flushed, iclass 7, count 0 2006.229.04:11:16.16#ibcon#about to write, iclass 7, count 0 2006.229.04:11:16.16#ibcon#wrote, iclass 7, count 0 2006.229.04:11:16.16#ibcon#about to read 3, iclass 7, count 0 2006.229.04:11:16.20#ibcon#read 3, iclass 7, count 0 2006.229.04:11:16.20#ibcon#about to read 4, iclass 7, count 0 2006.229.04:11:16.20#ibcon#read 4, iclass 7, count 0 2006.229.04:11:16.20#ibcon#about to read 5, iclass 7, count 0 2006.229.04:11:16.20#ibcon#read 5, iclass 7, count 0 2006.229.04:11:16.20#ibcon#about to read 6, iclass 7, count 0 2006.229.04:11:16.20#ibcon#read 6, iclass 7, count 0 2006.229.04:11:16.20#ibcon#end of sib2, iclass 7, count 0 2006.229.04:11:16.20#ibcon#*after write, iclass 7, count 0 2006.229.04:11:16.20#ibcon#*before return 0, iclass 7, count 0 2006.229.04:11:16.20#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:16.20#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:16.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:11:16.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:11:16.20$vck44/va=4,7 2006.229.04:11:16.20#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.04:11:16.20#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.04:11:16.20#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:16.20#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:16.26#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:16.26#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:16.26#ibcon#enter wrdev, iclass 11, count 2 2006.229.04:11:16.26#ibcon#first serial, iclass 11, count 2 2006.229.04:11:16.26#ibcon#enter sib2, iclass 11, count 2 2006.229.04:11:16.26#ibcon#flushed, iclass 11, count 2 2006.229.04:11:16.26#ibcon#about to write, iclass 11, count 2 2006.229.04:11:16.26#ibcon#wrote, iclass 11, count 2 2006.229.04:11:16.26#ibcon#about to read 3, iclass 11, count 2 2006.229.04:11:16.28#ibcon#read 3, iclass 11, count 2 2006.229.04:11:16.28#ibcon#about to read 4, iclass 11, count 2 2006.229.04:11:16.28#ibcon#read 4, iclass 11, count 2 2006.229.04:11:16.28#ibcon#about to read 5, iclass 11, count 2 2006.229.04:11:16.28#ibcon#read 5, iclass 11, count 2 2006.229.04:11:16.28#ibcon#about to read 6, iclass 11, count 2 2006.229.04:11:16.28#ibcon#read 6, iclass 11, count 2 2006.229.04:11:16.28#ibcon#end of sib2, iclass 11, count 2 2006.229.04:11:16.28#ibcon#*mode == 0, iclass 11, count 2 2006.229.04:11:16.28#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.04:11:16.28#ibcon#[25=AT04-07\r\n] 2006.229.04:11:16.28#ibcon#*before write, iclass 11, count 2 2006.229.04:11:16.28#ibcon#enter sib2, iclass 11, count 2 2006.229.04:11:16.28#ibcon#flushed, iclass 11, count 2 2006.229.04:11:16.28#ibcon#about to write, iclass 11, count 2 2006.229.04:11:16.28#ibcon#wrote, iclass 11, count 2 2006.229.04:11:16.28#ibcon#about to read 3, iclass 11, count 2 2006.229.04:11:16.31#ibcon#read 3, iclass 11, count 2 2006.229.04:11:16.31#ibcon#about to read 4, iclass 11, count 2 2006.229.04:11:16.31#ibcon#read 4, iclass 11, count 2 2006.229.04:11:16.31#ibcon#about to read 5, iclass 11, count 2 2006.229.04:11:16.31#ibcon#read 5, iclass 11, count 2 2006.229.04:11:16.31#ibcon#about to read 6, iclass 11, count 2 2006.229.04:11:16.31#ibcon#read 6, iclass 11, count 2 2006.229.04:11:16.31#ibcon#end of sib2, iclass 11, count 2 2006.229.04:11:16.31#ibcon#*after write, iclass 11, count 2 2006.229.04:11:16.31#ibcon#*before return 0, iclass 11, count 2 2006.229.04:11:16.31#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:16.31#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:16.31#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.04:11:16.31#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:16.31#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:16.43#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:16.43#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:16.43#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:11:16.43#ibcon#first serial, iclass 11, count 0 2006.229.04:11:16.43#ibcon#enter sib2, iclass 11, count 0 2006.229.04:11:16.43#ibcon#flushed, iclass 11, count 0 2006.229.04:11:16.43#ibcon#about to write, iclass 11, count 0 2006.229.04:11:16.43#ibcon#wrote, iclass 11, count 0 2006.229.04:11:16.43#ibcon#about to read 3, iclass 11, count 0 2006.229.04:11:16.45#ibcon#read 3, iclass 11, count 0 2006.229.04:11:16.45#ibcon#about to read 4, iclass 11, count 0 2006.229.04:11:16.45#ibcon#read 4, iclass 11, count 0 2006.229.04:11:16.45#ibcon#about to read 5, iclass 11, count 0 2006.229.04:11:16.45#ibcon#read 5, iclass 11, count 0 2006.229.04:11:16.45#ibcon#about to read 6, iclass 11, count 0 2006.229.04:11:16.45#ibcon#read 6, iclass 11, count 0 2006.229.04:11:16.45#ibcon#end of sib2, iclass 11, count 0 2006.229.04:11:16.45#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:11:16.45#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:11:16.45#ibcon#[25=USB\r\n] 2006.229.04:11:16.45#ibcon#*before write, iclass 11, count 0 2006.229.04:11:16.45#ibcon#enter sib2, iclass 11, count 0 2006.229.04:11:16.45#ibcon#flushed, iclass 11, count 0 2006.229.04:11:16.45#ibcon#about to write, iclass 11, count 0 2006.229.04:11:16.45#ibcon#wrote, iclass 11, count 0 2006.229.04:11:16.45#ibcon#about to read 3, iclass 11, count 0 2006.229.04:11:16.48#ibcon#read 3, iclass 11, count 0 2006.229.04:11:16.48#ibcon#about to read 4, iclass 11, count 0 2006.229.04:11:16.48#ibcon#read 4, iclass 11, count 0 2006.229.04:11:16.48#ibcon#about to read 5, iclass 11, count 0 2006.229.04:11:16.48#ibcon#read 5, iclass 11, count 0 2006.229.04:11:16.48#ibcon#about to read 6, iclass 11, count 0 2006.229.04:11:16.48#ibcon#read 6, iclass 11, count 0 2006.229.04:11:16.48#ibcon#end of sib2, iclass 11, count 0 2006.229.04:11:16.48#ibcon#*after write, iclass 11, count 0 2006.229.04:11:16.48#ibcon#*before return 0, iclass 11, count 0 2006.229.04:11:16.48#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:16.48#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:16.48#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:11:16.48#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:11:16.48$vck44/valo=5,734.99 2006.229.04:11:16.48#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.04:11:16.48#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.04:11:16.48#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:16.48#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:16.48#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:16.48#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:16.48#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:11:16.48#ibcon#first serial, iclass 13, count 0 2006.229.04:11:16.48#ibcon#enter sib2, iclass 13, count 0 2006.229.04:11:16.48#ibcon#flushed, iclass 13, count 0 2006.229.04:11:16.48#ibcon#about to write, iclass 13, count 0 2006.229.04:11:16.48#ibcon#wrote, iclass 13, count 0 2006.229.04:11:16.48#ibcon#about to read 3, iclass 13, count 0 2006.229.04:11:16.50#ibcon#read 3, iclass 13, count 0 2006.229.04:11:16.50#ibcon#about to read 4, iclass 13, count 0 2006.229.04:11:16.50#ibcon#read 4, iclass 13, count 0 2006.229.04:11:16.50#ibcon#about to read 5, iclass 13, count 0 2006.229.04:11:16.50#ibcon#read 5, iclass 13, count 0 2006.229.04:11:16.50#ibcon#about to read 6, iclass 13, count 0 2006.229.04:11:16.50#ibcon#read 6, iclass 13, count 0 2006.229.04:11:16.50#ibcon#end of sib2, iclass 13, count 0 2006.229.04:11:16.50#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:11:16.50#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:11:16.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:11:16.50#ibcon#*before write, iclass 13, count 0 2006.229.04:11:16.50#ibcon#enter sib2, iclass 13, count 0 2006.229.04:11:16.50#ibcon#flushed, iclass 13, count 0 2006.229.04:11:16.50#ibcon#about to write, iclass 13, count 0 2006.229.04:11:16.50#ibcon#wrote, iclass 13, count 0 2006.229.04:11:16.50#ibcon#about to read 3, iclass 13, count 0 2006.229.04:11:16.54#ibcon#read 3, iclass 13, count 0 2006.229.04:11:16.54#ibcon#about to read 4, iclass 13, count 0 2006.229.04:11:16.54#ibcon#read 4, iclass 13, count 0 2006.229.04:11:16.54#ibcon#about to read 5, iclass 13, count 0 2006.229.04:11:16.54#ibcon#read 5, iclass 13, count 0 2006.229.04:11:16.54#ibcon#about to read 6, iclass 13, count 0 2006.229.04:11:16.54#ibcon#read 6, iclass 13, count 0 2006.229.04:11:16.54#ibcon#end of sib2, iclass 13, count 0 2006.229.04:11:16.54#ibcon#*after write, iclass 13, count 0 2006.229.04:11:16.54#ibcon#*before return 0, iclass 13, count 0 2006.229.04:11:16.54#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:16.54#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:16.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:11:16.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:11:16.54$vck44/va=5,4 2006.229.04:11:16.54#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.04:11:16.54#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.04:11:16.54#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:16.54#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:16.60#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:16.60#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:16.60#ibcon#enter wrdev, iclass 15, count 2 2006.229.04:11:16.60#ibcon#first serial, iclass 15, count 2 2006.229.04:11:16.60#ibcon#enter sib2, iclass 15, count 2 2006.229.04:11:16.60#ibcon#flushed, iclass 15, count 2 2006.229.04:11:16.60#ibcon#about to write, iclass 15, count 2 2006.229.04:11:16.60#ibcon#wrote, iclass 15, count 2 2006.229.04:11:16.60#ibcon#about to read 3, iclass 15, count 2 2006.229.04:11:16.62#ibcon#read 3, iclass 15, count 2 2006.229.04:11:16.62#ibcon#about to read 4, iclass 15, count 2 2006.229.04:11:16.62#ibcon#read 4, iclass 15, count 2 2006.229.04:11:16.62#ibcon#about to read 5, iclass 15, count 2 2006.229.04:11:16.62#ibcon#read 5, iclass 15, count 2 2006.229.04:11:16.62#ibcon#about to read 6, iclass 15, count 2 2006.229.04:11:16.62#ibcon#read 6, iclass 15, count 2 2006.229.04:11:16.62#ibcon#end of sib2, iclass 15, count 2 2006.229.04:11:16.62#ibcon#*mode == 0, iclass 15, count 2 2006.229.04:11:16.62#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.04:11:16.62#ibcon#[25=AT05-04\r\n] 2006.229.04:11:16.62#ibcon#*before write, iclass 15, count 2 2006.229.04:11:16.62#ibcon#enter sib2, iclass 15, count 2 2006.229.04:11:16.62#ibcon#flushed, iclass 15, count 2 2006.229.04:11:16.62#ibcon#about to write, iclass 15, count 2 2006.229.04:11:16.62#ibcon#wrote, iclass 15, count 2 2006.229.04:11:16.62#ibcon#about to read 3, iclass 15, count 2 2006.229.04:11:16.65#ibcon#read 3, iclass 15, count 2 2006.229.04:11:16.65#ibcon#about to read 4, iclass 15, count 2 2006.229.04:11:16.65#ibcon#read 4, iclass 15, count 2 2006.229.04:11:16.65#ibcon#about to read 5, iclass 15, count 2 2006.229.04:11:16.65#ibcon#read 5, iclass 15, count 2 2006.229.04:11:16.65#ibcon#about to read 6, iclass 15, count 2 2006.229.04:11:16.65#ibcon#read 6, iclass 15, count 2 2006.229.04:11:16.65#ibcon#end of sib2, iclass 15, count 2 2006.229.04:11:16.65#ibcon#*after write, iclass 15, count 2 2006.229.04:11:16.65#ibcon#*before return 0, iclass 15, count 2 2006.229.04:11:16.65#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:16.65#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:16.65#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.04:11:16.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:16.65#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:16.77#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:16.77#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:16.77#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:11:16.77#ibcon#first serial, iclass 15, count 0 2006.229.04:11:16.77#ibcon#enter sib2, iclass 15, count 0 2006.229.04:11:16.77#ibcon#flushed, iclass 15, count 0 2006.229.04:11:16.77#ibcon#about to write, iclass 15, count 0 2006.229.04:11:16.77#ibcon#wrote, iclass 15, count 0 2006.229.04:11:16.77#ibcon#about to read 3, iclass 15, count 0 2006.229.04:11:16.79#ibcon#read 3, iclass 15, count 0 2006.229.04:11:16.79#ibcon#about to read 4, iclass 15, count 0 2006.229.04:11:16.79#ibcon#read 4, iclass 15, count 0 2006.229.04:11:16.79#ibcon#about to read 5, iclass 15, count 0 2006.229.04:11:16.79#ibcon#read 5, iclass 15, count 0 2006.229.04:11:16.79#ibcon#about to read 6, iclass 15, count 0 2006.229.04:11:16.79#ibcon#read 6, iclass 15, count 0 2006.229.04:11:16.79#ibcon#end of sib2, iclass 15, count 0 2006.229.04:11:16.79#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:11:16.79#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:11:16.79#ibcon#[25=USB\r\n] 2006.229.04:11:16.79#ibcon#*before write, iclass 15, count 0 2006.229.04:11:16.79#ibcon#enter sib2, iclass 15, count 0 2006.229.04:11:16.79#ibcon#flushed, iclass 15, count 0 2006.229.04:11:16.79#ibcon#about to write, iclass 15, count 0 2006.229.04:11:16.79#ibcon#wrote, iclass 15, count 0 2006.229.04:11:16.79#ibcon#about to read 3, iclass 15, count 0 2006.229.04:11:16.82#ibcon#read 3, iclass 15, count 0 2006.229.04:11:16.82#ibcon#about to read 4, iclass 15, count 0 2006.229.04:11:16.82#ibcon#read 4, iclass 15, count 0 2006.229.04:11:16.82#ibcon#about to read 5, iclass 15, count 0 2006.229.04:11:16.82#ibcon#read 5, iclass 15, count 0 2006.229.04:11:16.82#ibcon#about to read 6, iclass 15, count 0 2006.229.04:11:16.82#ibcon#read 6, iclass 15, count 0 2006.229.04:11:16.82#ibcon#end of sib2, iclass 15, count 0 2006.229.04:11:16.82#ibcon#*after write, iclass 15, count 0 2006.229.04:11:16.82#ibcon#*before return 0, iclass 15, count 0 2006.229.04:11:16.82#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:16.82#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:16.82#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:11:16.82#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:11:16.82$vck44/valo=6,814.99 2006.229.04:11:16.82#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.04:11:16.82#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.04:11:16.82#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:16.82#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:16.82#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:16.82#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:16.82#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:11:16.82#ibcon#first serial, iclass 17, count 0 2006.229.04:11:16.82#ibcon#enter sib2, iclass 17, count 0 2006.229.04:11:16.82#ibcon#flushed, iclass 17, count 0 2006.229.04:11:16.82#ibcon#about to write, iclass 17, count 0 2006.229.04:11:16.82#ibcon#wrote, iclass 17, count 0 2006.229.04:11:16.82#ibcon#about to read 3, iclass 17, count 0 2006.229.04:11:16.84#ibcon#read 3, iclass 17, count 0 2006.229.04:11:16.84#ibcon#about to read 4, iclass 17, count 0 2006.229.04:11:16.84#ibcon#read 4, iclass 17, count 0 2006.229.04:11:16.84#ibcon#about to read 5, iclass 17, count 0 2006.229.04:11:16.84#ibcon#read 5, iclass 17, count 0 2006.229.04:11:16.84#ibcon#about to read 6, iclass 17, count 0 2006.229.04:11:16.84#ibcon#read 6, iclass 17, count 0 2006.229.04:11:16.84#ibcon#end of sib2, iclass 17, count 0 2006.229.04:11:16.84#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:11:16.84#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:11:16.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:11:16.84#ibcon#*before write, iclass 17, count 0 2006.229.04:11:16.84#ibcon#enter sib2, iclass 17, count 0 2006.229.04:11:16.84#ibcon#flushed, iclass 17, count 0 2006.229.04:11:16.84#ibcon#about to write, iclass 17, count 0 2006.229.04:11:16.84#ibcon#wrote, iclass 17, count 0 2006.229.04:11:16.84#ibcon#about to read 3, iclass 17, count 0 2006.229.04:11:16.88#ibcon#read 3, iclass 17, count 0 2006.229.04:11:16.88#ibcon#about to read 4, iclass 17, count 0 2006.229.04:11:16.88#ibcon#read 4, iclass 17, count 0 2006.229.04:11:16.88#ibcon#about to read 5, iclass 17, count 0 2006.229.04:11:16.88#ibcon#read 5, iclass 17, count 0 2006.229.04:11:16.88#ibcon#about to read 6, iclass 17, count 0 2006.229.04:11:16.88#ibcon#read 6, iclass 17, count 0 2006.229.04:11:16.88#ibcon#end of sib2, iclass 17, count 0 2006.229.04:11:16.88#ibcon#*after write, iclass 17, count 0 2006.229.04:11:16.88#ibcon#*before return 0, iclass 17, count 0 2006.229.04:11:16.88#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:16.88#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:16.88#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:11:16.88#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:11:16.88$vck44/va=6,4 2006.229.04:11:16.88#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.04:11:16.88#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.04:11:16.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:16.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:16.94#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:16.94#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:16.94#ibcon#enter wrdev, iclass 19, count 2 2006.229.04:11:16.94#ibcon#first serial, iclass 19, count 2 2006.229.04:11:16.94#ibcon#enter sib2, iclass 19, count 2 2006.229.04:11:16.94#ibcon#flushed, iclass 19, count 2 2006.229.04:11:16.94#ibcon#about to write, iclass 19, count 2 2006.229.04:11:16.94#ibcon#wrote, iclass 19, count 2 2006.229.04:11:16.94#ibcon#about to read 3, iclass 19, count 2 2006.229.04:11:16.96#ibcon#read 3, iclass 19, count 2 2006.229.04:11:16.96#ibcon#about to read 4, iclass 19, count 2 2006.229.04:11:16.96#ibcon#read 4, iclass 19, count 2 2006.229.04:11:16.96#ibcon#about to read 5, iclass 19, count 2 2006.229.04:11:16.96#ibcon#read 5, iclass 19, count 2 2006.229.04:11:16.96#ibcon#about to read 6, iclass 19, count 2 2006.229.04:11:16.96#ibcon#read 6, iclass 19, count 2 2006.229.04:11:16.96#ibcon#end of sib2, iclass 19, count 2 2006.229.04:11:16.96#ibcon#*mode == 0, iclass 19, count 2 2006.229.04:11:16.96#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.04:11:16.96#ibcon#[25=AT06-04\r\n] 2006.229.04:11:16.96#ibcon#*before write, iclass 19, count 2 2006.229.04:11:16.96#ibcon#enter sib2, iclass 19, count 2 2006.229.04:11:16.96#ibcon#flushed, iclass 19, count 2 2006.229.04:11:16.96#ibcon#about to write, iclass 19, count 2 2006.229.04:11:16.96#ibcon#wrote, iclass 19, count 2 2006.229.04:11:16.96#ibcon#about to read 3, iclass 19, count 2 2006.229.04:11:16.99#ibcon#read 3, iclass 19, count 2 2006.229.04:11:16.99#ibcon#about to read 4, iclass 19, count 2 2006.229.04:11:16.99#ibcon#read 4, iclass 19, count 2 2006.229.04:11:16.99#ibcon#about to read 5, iclass 19, count 2 2006.229.04:11:16.99#ibcon#read 5, iclass 19, count 2 2006.229.04:11:16.99#ibcon#about to read 6, iclass 19, count 2 2006.229.04:11:16.99#ibcon#read 6, iclass 19, count 2 2006.229.04:11:16.99#ibcon#end of sib2, iclass 19, count 2 2006.229.04:11:16.99#ibcon#*after write, iclass 19, count 2 2006.229.04:11:16.99#ibcon#*before return 0, iclass 19, count 2 2006.229.04:11:16.99#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:16.99#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:16.99#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.04:11:16.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:16.99#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:17.11#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:17.11#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:17.11#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:11:17.11#ibcon#first serial, iclass 19, count 0 2006.229.04:11:17.11#ibcon#enter sib2, iclass 19, count 0 2006.229.04:11:17.11#ibcon#flushed, iclass 19, count 0 2006.229.04:11:17.11#ibcon#about to write, iclass 19, count 0 2006.229.04:11:17.11#ibcon#wrote, iclass 19, count 0 2006.229.04:11:17.11#ibcon#about to read 3, iclass 19, count 0 2006.229.04:11:17.13#ibcon#read 3, iclass 19, count 0 2006.229.04:11:17.13#ibcon#about to read 4, iclass 19, count 0 2006.229.04:11:17.13#ibcon#read 4, iclass 19, count 0 2006.229.04:11:17.13#ibcon#about to read 5, iclass 19, count 0 2006.229.04:11:17.13#ibcon#read 5, iclass 19, count 0 2006.229.04:11:17.13#ibcon#about to read 6, iclass 19, count 0 2006.229.04:11:17.13#ibcon#read 6, iclass 19, count 0 2006.229.04:11:17.13#ibcon#end of sib2, iclass 19, count 0 2006.229.04:11:17.13#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:11:17.13#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:11:17.13#ibcon#[25=USB\r\n] 2006.229.04:11:17.13#ibcon#*before write, iclass 19, count 0 2006.229.04:11:17.13#ibcon#enter sib2, iclass 19, count 0 2006.229.04:11:17.13#ibcon#flushed, iclass 19, count 0 2006.229.04:11:17.13#ibcon#about to write, iclass 19, count 0 2006.229.04:11:17.13#ibcon#wrote, iclass 19, count 0 2006.229.04:11:17.13#ibcon#about to read 3, iclass 19, count 0 2006.229.04:11:17.16#ibcon#read 3, iclass 19, count 0 2006.229.04:11:17.16#ibcon#about to read 4, iclass 19, count 0 2006.229.04:11:17.16#ibcon#read 4, iclass 19, count 0 2006.229.04:11:17.16#ibcon#about to read 5, iclass 19, count 0 2006.229.04:11:17.16#ibcon#read 5, iclass 19, count 0 2006.229.04:11:17.16#ibcon#about to read 6, iclass 19, count 0 2006.229.04:11:17.16#ibcon#read 6, iclass 19, count 0 2006.229.04:11:17.16#ibcon#end of sib2, iclass 19, count 0 2006.229.04:11:17.16#ibcon#*after write, iclass 19, count 0 2006.229.04:11:17.16#ibcon#*before return 0, iclass 19, count 0 2006.229.04:11:17.16#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:17.16#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:17.16#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:11:17.16#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:11:17.16$vck44/valo=7,864.99 2006.229.04:11:17.16#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.04:11:17.16#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.04:11:17.16#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:17.16#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:17.16#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:17.16#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:17.16#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:11:17.16#ibcon#first serial, iclass 21, count 0 2006.229.04:11:17.16#ibcon#enter sib2, iclass 21, count 0 2006.229.04:11:17.16#ibcon#flushed, iclass 21, count 0 2006.229.04:11:17.16#ibcon#about to write, iclass 21, count 0 2006.229.04:11:17.16#ibcon#wrote, iclass 21, count 0 2006.229.04:11:17.16#ibcon#about to read 3, iclass 21, count 0 2006.229.04:11:17.18#ibcon#read 3, iclass 21, count 0 2006.229.04:11:17.18#ibcon#about to read 4, iclass 21, count 0 2006.229.04:11:17.18#ibcon#read 4, iclass 21, count 0 2006.229.04:11:17.18#ibcon#about to read 5, iclass 21, count 0 2006.229.04:11:17.18#ibcon#read 5, iclass 21, count 0 2006.229.04:11:17.18#ibcon#about to read 6, iclass 21, count 0 2006.229.04:11:17.18#ibcon#read 6, iclass 21, count 0 2006.229.04:11:17.18#ibcon#end of sib2, iclass 21, count 0 2006.229.04:11:17.18#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:11:17.18#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:11:17.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:11:17.18#ibcon#*before write, iclass 21, count 0 2006.229.04:11:17.18#ibcon#enter sib2, iclass 21, count 0 2006.229.04:11:17.18#ibcon#flushed, iclass 21, count 0 2006.229.04:11:17.18#ibcon#about to write, iclass 21, count 0 2006.229.04:11:17.18#ibcon#wrote, iclass 21, count 0 2006.229.04:11:17.18#ibcon#about to read 3, iclass 21, count 0 2006.229.04:11:17.22#ibcon#read 3, iclass 21, count 0 2006.229.04:11:17.22#ibcon#about to read 4, iclass 21, count 0 2006.229.04:11:17.22#ibcon#read 4, iclass 21, count 0 2006.229.04:11:17.22#ibcon#about to read 5, iclass 21, count 0 2006.229.04:11:17.22#ibcon#read 5, iclass 21, count 0 2006.229.04:11:17.22#ibcon#about to read 6, iclass 21, count 0 2006.229.04:11:17.22#ibcon#read 6, iclass 21, count 0 2006.229.04:11:17.22#ibcon#end of sib2, iclass 21, count 0 2006.229.04:11:17.22#ibcon#*after write, iclass 21, count 0 2006.229.04:11:17.22#ibcon#*before return 0, iclass 21, count 0 2006.229.04:11:17.22#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:17.22#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:17.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:11:17.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:11:17.22$vck44/va=7,5 2006.229.04:11:17.22#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:11:17.22#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:11:17.22#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:17.22#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:11:17.24#abcon#<5=/05 2.8 4.9 30.41 951000.2\r\n> 2006.229.04:11:17.26#abcon#{5=INTERFACE CLEAR} 2006.229.04:11:17.28#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:11:17.28#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:11:17.28#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:11:17.28#ibcon#first serial, iclass 24, count 2 2006.229.04:11:17.28#ibcon#enter sib2, iclass 24, count 2 2006.229.04:11:17.28#ibcon#flushed, iclass 24, count 2 2006.229.04:11:17.28#ibcon#about to write, iclass 24, count 2 2006.229.04:11:17.28#ibcon#wrote, iclass 24, count 2 2006.229.04:11:17.28#ibcon#about to read 3, iclass 24, count 2 2006.229.04:11:17.30#ibcon#read 3, iclass 24, count 2 2006.229.04:11:17.30#ibcon#about to read 4, iclass 24, count 2 2006.229.04:11:17.30#ibcon#read 4, iclass 24, count 2 2006.229.04:11:17.30#ibcon#about to read 5, iclass 24, count 2 2006.229.04:11:17.30#ibcon#read 5, iclass 24, count 2 2006.229.04:11:17.30#ibcon#about to read 6, iclass 24, count 2 2006.229.04:11:17.30#ibcon#read 6, iclass 24, count 2 2006.229.04:11:17.30#ibcon#end of sib2, iclass 24, count 2 2006.229.04:11:17.30#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:11:17.30#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:11:17.30#ibcon#[25=AT07-05\r\n] 2006.229.04:11:17.30#ibcon#*before write, iclass 24, count 2 2006.229.04:11:17.30#ibcon#enter sib2, iclass 24, count 2 2006.229.04:11:17.30#ibcon#flushed, iclass 24, count 2 2006.229.04:11:17.30#ibcon#about to write, iclass 24, count 2 2006.229.04:11:17.30#ibcon#wrote, iclass 24, count 2 2006.229.04:11:17.30#ibcon#about to read 3, iclass 24, count 2 2006.229.04:11:17.32#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:11:17.33#ibcon#read 3, iclass 24, count 2 2006.229.04:11:17.33#ibcon#about to read 4, iclass 24, count 2 2006.229.04:11:17.33#ibcon#read 4, iclass 24, count 2 2006.229.04:11:17.33#ibcon#about to read 5, iclass 24, count 2 2006.229.04:11:17.33#ibcon#read 5, iclass 24, count 2 2006.229.04:11:17.33#ibcon#about to read 6, iclass 24, count 2 2006.229.04:11:17.33#ibcon#read 6, iclass 24, count 2 2006.229.04:11:17.33#ibcon#end of sib2, iclass 24, count 2 2006.229.04:11:17.33#ibcon#*after write, iclass 24, count 2 2006.229.04:11:17.33#ibcon#*before return 0, iclass 24, count 2 2006.229.04:11:17.33#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:11:17.33#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:11:17.33#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:11:17.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:17.33#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:11:17.45#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:11:17.45#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:11:17.45#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:11:17.45#ibcon#first serial, iclass 24, count 0 2006.229.04:11:17.45#ibcon#enter sib2, iclass 24, count 0 2006.229.04:11:17.45#ibcon#flushed, iclass 24, count 0 2006.229.04:11:17.45#ibcon#about to write, iclass 24, count 0 2006.229.04:11:17.45#ibcon#wrote, iclass 24, count 0 2006.229.04:11:17.45#ibcon#about to read 3, iclass 24, count 0 2006.229.04:11:17.47#ibcon#read 3, iclass 24, count 0 2006.229.04:11:17.47#ibcon#about to read 4, iclass 24, count 0 2006.229.04:11:17.47#ibcon#read 4, iclass 24, count 0 2006.229.04:11:17.47#ibcon#about to read 5, iclass 24, count 0 2006.229.04:11:17.47#ibcon#read 5, iclass 24, count 0 2006.229.04:11:17.47#ibcon#about to read 6, iclass 24, count 0 2006.229.04:11:17.47#ibcon#read 6, iclass 24, count 0 2006.229.04:11:17.47#ibcon#end of sib2, iclass 24, count 0 2006.229.04:11:17.47#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:11:17.47#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:11:17.47#ibcon#[25=USB\r\n] 2006.229.04:11:17.47#ibcon#*before write, iclass 24, count 0 2006.229.04:11:17.47#ibcon#enter sib2, iclass 24, count 0 2006.229.04:11:17.47#ibcon#flushed, iclass 24, count 0 2006.229.04:11:17.47#ibcon#about to write, iclass 24, count 0 2006.229.04:11:17.47#ibcon#wrote, iclass 24, count 0 2006.229.04:11:17.47#ibcon#about to read 3, iclass 24, count 0 2006.229.04:11:17.50#ibcon#read 3, iclass 24, count 0 2006.229.04:11:17.50#ibcon#about to read 4, iclass 24, count 0 2006.229.04:11:17.50#ibcon#read 4, iclass 24, count 0 2006.229.04:11:17.50#ibcon#about to read 5, iclass 24, count 0 2006.229.04:11:17.50#ibcon#read 5, iclass 24, count 0 2006.229.04:11:17.50#ibcon#about to read 6, iclass 24, count 0 2006.229.04:11:17.50#ibcon#read 6, iclass 24, count 0 2006.229.04:11:17.50#ibcon#end of sib2, iclass 24, count 0 2006.229.04:11:17.50#ibcon#*after write, iclass 24, count 0 2006.229.04:11:17.50#ibcon#*before return 0, iclass 24, count 0 2006.229.04:11:17.50#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:11:17.50#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:11:17.50#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:11:17.50#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:11:17.50$vck44/valo=8,884.99 2006.229.04:11:17.50#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.04:11:17.50#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.04:11:17.50#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:17.50#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:17.50#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:17.50#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:17.50#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:11:17.50#ibcon#first serial, iclass 29, count 0 2006.229.04:11:17.50#ibcon#enter sib2, iclass 29, count 0 2006.229.04:11:17.50#ibcon#flushed, iclass 29, count 0 2006.229.04:11:17.50#ibcon#about to write, iclass 29, count 0 2006.229.04:11:17.50#ibcon#wrote, iclass 29, count 0 2006.229.04:11:17.50#ibcon#about to read 3, iclass 29, count 0 2006.229.04:11:17.52#ibcon#read 3, iclass 29, count 0 2006.229.04:11:17.52#ibcon#about to read 4, iclass 29, count 0 2006.229.04:11:17.52#ibcon#read 4, iclass 29, count 0 2006.229.04:11:17.52#ibcon#about to read 5, iclass 29, count 0 2006.229.04:11:17.52#ibcon#read 5, iclass 29, count 0 2006.229.04:11:17.52#ibcon#about to read 6, iclass 29, count 0 2006.229.04:11:17.52#ibcon#read 6, iclass 29, count 0 2006.229.04:11:17.52#ibcon#end of sib2, iclass 29, count 0 2006.229.04:11:17.52#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:11:17.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:11:17.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:11:17.52#ibcon#*before write, iclass 29, count 0 2006.229.04:11:17.52#ibcon#enter sib2, iclass 29, count 0 2006.229.04:11:17.52#ibcon#flushed, iclass 29, count 0 2006.229.04:11:17.52#ibcon#about to write, iclass 29, count 0 2006.229.04:11:17.52#ibcon#wrote, iclass 29, count 0 2006.229.04:11:17.52#ibcon#about to read 3, iclass 29, count 0 2006.229.04:11:17.56#ibcon#read 3, iclass 29, count 0 2006.229.04:11:17.56#ibcon#about to read 4, iclass 29, count 0 2006.229.04:11:17.56#ibcon#read 4, iclass 29, count 0 2006.229.04:11:17.56#ibcon#about to read 5, iclass 29, count 0 2006.229.04:11:17.56#ibcon#read 5, iclass 29, count 0 2006.229.04:11:17.56#ibcon#about to read 6, iclass 29, count 0 2006.229.04:11:17.56#ibcon#read 6, iclass 29, count 0 2006.229.04:11:17.56#ibcon#end of sib2, iclass 29, count 0 2006.229.04:11:17.56#ibcon#*after write, iclass 29, count 0 2006.229.04:11:17.56#ibcon#*before return 0, iclass 29, count 0 2006.229.04:11:17.56#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:17.56#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:17.56#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:11:17.56#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:11:17.56$vck44/va=8,6 2006.229.04:11:17.56#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.04:11:17.56#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.04:11:17.56#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:17.56#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:11:17.62#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:11:17.62#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:11:17.62#ibcon#enter wrdev, iclass 31, count 2 2006.229.04:11:17.62#ibcon#first serial, iclass 31, count 2 2006.229.04:11:17.62#ibcon#enter sib2, iclass 31, count 2 2006.229.04:11:17.62#ibcon#flushed, iclass 31, count 2 2006.229.04:11:17.62#ibcon#about to write, iclass 31, count 2 2006.229.04:11:17.62#ibcon#wrote, iclass 31, count 2 2006.229.04:11:17.62#ibcon#about to read 3, iclass 31, count 2 2006.229.04:11:17.64#ibcon#read 3, iclass 31, count 2 2006.229.04:11:17.64#ibcon#about to read 4, iclass 31, count 2 2006.229.04:11:17.64#ibcon#read 4, iclass 31, count 2 2006.229.04:11:17.64#ibcon#about to read 5, iclass 31, count 2 2006.229.04:11:17.64#ibcon#read 5, iclass 31, count 2 2006.229.04:11:17.64#ibcon#about to read 6, iclass 31, count 2 2006.229.04:11:17.64#ibcon#read 6, iclass 31, count 2 2006.229.04:11:17.64#ibcon#end of sib2, iclass 31, count 2 2006.229.04:11:17.64#ibcon#*mode == 0, iclass 31, count 2 2006.229.04:11:17.64#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.04:11:17.64#ibcon#[25=AT08-06\r\n] 2006.229.04:11:17.64#ibcon#*before write, iclass 31, count 2 2006.229.04:11:17.64#ibcon#enter sib2, iclass 31, count 2 2006.229.04:11:17.64#ibcon#flushed, iclass 31, count 2 2006.229.04:11:17.64#ibcon#about to write, iclass 31, count 2 2006.229.04:11:17.64#ibcon#wrote, iclass 31, count 2 2006.229.04:11:17.64#ibcon#about to read 3, iclass 31, count 2 2006.229.04:11:17.67#ibcon#read 3, iclass 31, count 2 2006.229.04:11:17.67#ibcon#about to read 4, iclass 31, count 2 2006.229.04:11:17.67#ibcon#read 4, iclass 31, count 2 2006.229.04:11:17.67#ibcon#about to read 5, iclass 31, count 2 2006.229.04:11:17.67#ibcon#read 5, iclass 31, count 2 2006.229.04:11:17.67#ibcon#about to read 6, iclass 31, count 2 2006.229.04:11:17.67#ibcon#read 6, iclass 31, count 2 2006.229.04:11:17.67#ibcon#end of sib2, iclass 31, count 2 2006.229.04:11:17.67#ibcon#*after write, iclass 31, count 2 2006.229.04:11:17.67#ibcon#*before return 0, iclass 31, count 2 2006.229.04:11:17.67#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:11:17.67#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:11:17.67#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.04:11:17.67#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:17.67#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:11:17.79#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:11:17.79#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:11:17.79#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:11:17.79#ibcon#first serial, iclass 31, count 0 2006.229.04:11:17.79#ibcon#enter sib2, iclass 31, count 0 2006.229.04:11:17.79#ibcon#flushed, iclass 31, count 0 2006.229.04:11:17.79#ibcon#about to write, iclass 31, count 0 2006.229.04:11:17.79#ibcon#wrote, iclass 31, count 0 2006.229.04:11:17.79#ibcon#about to read 3, iclass 31, count 0 2006.229.04:11:17.81#ibcon#read 3, iclass 31, count 0 2006.229.04:11:17.81#ibcon#about to read 4, iclass 31, count 0 2006.229.04:11:17.81#ibcon#read 4, iclass 31, count 0 2006.229.04:11:17.81#ibcon#about to read 5, iclass 31, count 0 2006.229.04:11:17.81#ibcon#read 5, iclass 31, count 0 2006.229.04:11:17.81#ibcon#about to read 6, iclass 31, count 0 2006.229.04:11:17.81#ibcon#read 6, iclass 31, count 0 2006.229.04:11:17.81#ibcon#end of sib2, iclass 31, count 0 2006.229.04:11:17.81#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:11:17.81#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:11:17.81#ibcon#[25=USB\r\n] 2006.229.04:11:17.81#ibcon#*before write, iclass 31, count 0 2006.229.04:11:17.81#ibcon#enter sib2, iclass 31, count 0 2006.229.04:11:17.81#ibcon#flushed, iclass 31, count 0 2006.229.04:11:17.81#ibcon#about to write, iclass 31, count 0 2006.229.04:11:17.81#ibcon#wrote, iclass 31, count 0 2006.229.04:11:17.81#ibcon#about to read 3, iclass 31, count 0 2006.229.04:11:17.84#ibcon#read 3, iclass 31, count 0 2006.229.04:11:17.84#ibcon#about to read 4, iclass 31, count 0 2006.229.04:11:17.84#ibcon#read 4, iclass 31, count 0 2006.229.04:11:17.84#ibcon#about to read 5, iclass 31, count 0 2006.229.04:11:17.84#ibcon#read 5, iclass 31, count 0 2006.229.04:11:17.84#ibcon#about to read 6, iclass 31, count 0 2006.229.04:11:17.84#ibcon#read 6, iclass 31, count 0 2006.229.04:11:17.84#ibcon#end of sib2, iclass 31, count 0 2006.229.04:11:17.84#ibcon#*after write, iclass 31, count 0 2006.229.04:11:17.84#ibcon#*before return 0, iclass 31, count 0 2006.229.04:11:17.84#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:11:17.84#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:11:17.84#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:11:17.84#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:11:17.84$vck44/vblo=1,629.99 2006.229.04:11:17.84#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.04:11:17.84#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.04:11:17.84#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:17.84#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:17.84#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:17.84#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:17.84#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:11:17.84#ibcon#first serial, iclass 33, count 0 2006.229.04:11:17.84#ibcon#enter sib2, iclass 33, count 0 2006.229.04:11:17.84#ibcon#flushed, iclass 33, count 0 2006.229.04:11:17.84#ibcon#about to write, iclass 33, count 0 2006.229.04:11:17.84#ibcon#wrote, iclass 33, count 0 2006.229.04:11:17.84#ibcon#about to read 3, iclass 33, count 0 2006.229.04:11:17.86#ibcon#read 3, iclass 33, count 0 2006.229.04:11:17.86#ibcon#about to read 4, iclass 33, count 0 2006.229.04:11:17.86#ibcon#read 4, iclass 33, count 0 2006.229.04:11:17.86#ibcon#about to read 5, iclass 33, count 0 2006.229.04:11:17.86#ibcon#read 5, iclass 33, count 0 2006.229.04:11:17.86#ibcon#about to read 6, iclass 33, count 0 2006.229.04:11:17.86#ibcon#read 6, iclass 33, count 0 2006.229.04:11:17.86#ibcon#end of sib2, iclass 33, count 0 2006.229.04:11:17.86#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:11:17.86#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:11:17.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:11:17.86#ibcon#*before write, iclass 33, count 0 2006.229.04:11:17.86#ibcon#enter sib2, iclass 33, count 0 2006.229.04:11:17.86#ibcon#flushed, iclass 33, count 0 2006.229.04:11:17.86#ibcon#about to write, iclass 33, count 0 2006.229.04:11:17.86#ibcon#wrote, iclass 33, count 0 2006.229.04:11:17.86#ibcon#about to read 3, iclass 33, count 0 2006.229.04:11:17.90#ibcon#read 3, iclass 33, count 0 2006.229.04:11:17.90#ibcon#about to read 4, iclass 33, count 0 2006.229.04:11:17.90#ibcon#read 4, iclass 33, count 0 2006.229.04:11:17.90#ibcon#about to read 5, iclass 33, count 0 2006.229.04:11:17.90#ibcon#read 5, iclass 33, count 0 2006.229.04:11:17.90#ibcon#about to read 6, iclass 33, count 0 2006.229.04:11:17.90#ibcon#read 6, iclass 33, count 0 2006.229.04:11:17.90#ibcon#end of sib2, iclass 33, count 0 2006.229.04:11:17.90#ibcon#*after write, iclass 33, count 0 2006.229.04:11:17.90#ibcon#*before return 0, iclass 33, count 0 2006.229.04:11:17.90#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:17.90#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:11:17.90#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:11:17.90#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:11:17.90$vck44/vb=1,4 2006.229.04:11:17.90#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.04:11:17.90#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.04:11:17.90#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:17.90#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:17.90#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:17.90#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:17.90#ibcon#enter wrdev, iclass 35, count 2 2006.229.04:11:17.90#ibcon#first serial, iclass 35, count 2 2006.229.04:11:17.90#ibcon#enter sib2, iclass 35, count 2 2006.229.04:11:17.90#ibcon#flushed, iclass 35, count 2 2006.229.04:11:17.90#ibcon#about to write, iclass 35, count 2 2006.229.04:11:17.90#ibcon#wrote, iclass 35, count 2 2006.229.04:11:17.90#ibcon#about to read 3, iclass 35, count 2 2006.229.04:11:17.92#ibcon#read 3, iclass 35, count 2 2006.229.04:11:17.92#ibcon#about to read 4, iclass 35, count 2 2006.229.04:11:17.92#ibcon#read 4, iclass 35, count 2 2006.229.04:11:17.92#ibcon#about to read 5, iclass 35, count 2 2006.229.04:11:17.92#ibcon#read 5, iclass 35, count 2 2006.229.04:11:17.92#ibcon#about to read 6, iclass 35, count 2 2006.229.04:11:17.92#ibcon#read 6, iclass 35, count 2 2006.229.04:11:17.92#ibcon#end of sib2, iclass 35, count 2 2006.229.04:11:17.92#ibcon#*mode == 0, iclass 35, count 2 2006.229.04:11:17.92#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.04:11:17.92#ibcon#[27=AT01-04\r\n] 2006.229.04:11:17.92#ibcon#*before write, iclass 35, count 2 2006.229.04:11:17.92#ibcon#enter sib2, iclass 35, count 2 2006.229.04:11:17.92#ibcon#flushed, iclass 35, count 2 2006.229.04:11:17.92#ibcon#about to write, iclass 35, count 2 2006.229.04:11:17.92#ibcon#wrote, iclass 35, count 2 2006.229.04:11:17.92#ibcon#about to read 3, iclass 35, count 2 2006.229.04:11:17.95#ibcon#read 3, iclass 35, count 2 2006.229.04:11:17.95#ibcon#about to read 4, iclass 35, count 2 2006.229.04:11:17.95#ibcon#read 4, iclass 35, count 2 2006.229.04:11:17.95#ibcon#about to read 5, iclass 35, count 2 2006.229.04:11:17.95#ibcon#read 5, iclass 35, count 2 2006.229.04:11:17.95#ibcon#about to read 6, iclass 35, count 2 2006.229.04:11:17.95#ibcon#read 6, iclass 35, count 2 2006.229.04:11:17.95#ibcon#end of sib2, iclass 35, count 2 2006.229.04:11:17.95#ibcon#*after write, iclass 35, count 2 2006.229.04:11:17.95#ibcon#*before return 0, iclass 35, count 2 2006.229.04:11:17.95#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:17.95#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:11:17.95#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.04:11:17.95#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:17.95#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:18.07#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:18.07#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:18.07#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:11:18.07#ibcon#first serial, iclass 35, count 0 2006.229.04:11:18.07#ibcon#enter sib2, iclass 35, count 0 2006.229.04:11:18.07#ibcon#flushed, iclass 35, count 0 2006.229.04:11:18.07#ibcon#about to write, iclass 35, count 0 2006.229.04:11:18.07#ibcon#wrote, iclass 35, count 0 2006.229.04:11:18.07#ibcon#about to read 3, iclass 35, count 0 2006.229.04:11:18.09#ibcon#read 3, iclass 35, count 0 2006.229.04:11:18.09#ibcon#about to read 4, iclass 35, count 0 2006.229.04:11:18.09#ibcon#read 4, iclass 35, count 0 2006.229.04:11:18.09#ibcon#about to read 5, iclass 35, count 0 2006.229.04:11:18.09#ibcon#read 5, iclass 35, count 0 2006.229.04:11:18.09#ibcon#about to read 6, iclass 35, count 0 2006.229.04:11:18.09#ibcon#read 6, iclass 35, count 0 2006.229.04:11:18.09#ibcon#end of sib2, iclass 35, count 0 2006.229.04:11:18.09#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:11:18.09#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:11:18.09#ibcon#[27=USB\r\n] 2006.229.04:11:18.09#ibcon#*before write, iclass 35, count 0 2006.229.04:11:18.09#ibcon#enter sib2, iclass 35, count 0 2006.229.04:11:18.09#ibcon#flushed, iclass 35, count 0 2006.229.04:11:18.09#ibcon#about to write, iclass 35, count 0 2006.229.04:11:18.09#ibcon#wrote, iclass 35, count 0 2006.229.04:11:18.09#ibcon#about to read 3, iclass 35, count 0 2006.229.04:11:18.12#ibcon#read 3, iclass 35, count 0 2006.229.04:11:18.12#ibcon#about to read 4, iclass 35, count 0 2006.229.04:11:18.12#ibcon#read 4, iclass 35, count 0 2006.229.04:11:18.12#ibcon#about to read 5, iclass 35, count 0 2006.229.04:11:18.12#ibcon#read 5, iclass 35, count 0 2006.229.04:11:18.12#ibcon#about to read 6, iclass 35, count 0 2006.229.04:11:18.12#ibcon#read 6, iclass 35, count 0 2006.229.04:11:18.12#ibcon#end of sib2, iclass 35, count 0 2006.229.04:11:18.12#ibcon#*after write, iclass 35, count 0 2006.229.04:11:18.12#ibcon#*before return 0, iclass 35, count 0 2006.229.04:11:18.12#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:18.12#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:11:18.12#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:11:18.12#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:11:18.12$vck44/vblo=2,634.99 2006.229.04:11:18.12#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.04:11:18.12#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.04:11:18.12#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:18.12#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:18.12#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:18.12#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:18.12#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:11:18.12#ibcon#first serial, iclass 37, count 0 2006.229.04:11:18.12#ibcon#enter sib2, iclass 37, count 0 2006.229.04:11:18.12#ibcon#flushed, iclass 37, count 0 2006.229.04:11:18.12#ibcon#about to write, iclass 37, count 0 2006.229.04:11:18.12#ibcon#wrote, iclass 37, count 0 2006.229.04:11:18.12#ibcon#about to read 3, iclass 37, count 0 2006.229.04:11:18.14#ibcon#read 3, iclass 37, count 0 2006.229.04:11:18.14#ibcon#about to read 4, iclass 37, count 0 2006.229.04:11:18.14#ibcon#read 4, iclass 37, count 0 2006.229.04:11:18.14#ibcon#about to read 5, iclass 37, count 0 2006.229.04:11:18.14#ibcon#read 5, iclass 37, count 0 2006.229.04:11:18.14#ibcon#about to read 6, iclass 37, count 0 2006.229.04:11:18.14#ibcon#read 6, iclass 37, count 0 2006.229.04:11:18.14#ibcon#end of sib2, iclass 37, count 0 2006.229.04:11:18.14#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:11:18.14#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:11:18.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:11:18.14#ibcon#*before write, iclass 37, count 0 2006.229.04:11:18.14#ibcon#enter sib2, iclass 37, count 0 2006.229.04:11:18.14#ibcon#flushed, iclass 37, count 0 2006.229.04:11:18.14#ibcon#about to write, iclass 37, count 0 2006.229.04:11:18.14#ibcon#wrote, iclass 37, count 0 2006.229.04:11:18.14#ibcon#about to read 3, iclass 37, count 0 2006.229.04:11:18.18#ibcon#read 3, iclass 37, count 0 2006.229.04:11:18.18#ibcon#about to read 4, iclass 37, count 0 2006.229.04:11:18.18#ibcon#read 4, iclass 37, count 0 2006.229.04:11:18.18#ibcon#about to read 5, iclass 37, count 0 2006.229.04:11:18.18#ibcon#read 5, iclass 37, count 0 2006.229.04:11:18.18#ibcon#about to read 6, iclass 37, count 0 2006.229.04:11:18.18#ibcon#read 6, iclass 37, count 0 2006.229.04:11:18.18#ibcon#end of sib2, iclass 37, count 0 2006.229.04:11:18.18#ibcon#*after write, iclass 37, count 0 2006.229.04:11:18.18#ibcon#*before return 0, iclass 37, count 0 2006.229.04:11:18.18#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:18.18#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:11:18.18#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:11:18.18#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:11:18.18$vck44/vb=2,4 2006.229.04:11:18.18#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.04:11:18.18#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.04:11:18.18#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:18.18#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:18.24#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:18.24#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:18.24#ibcon#enter wrdev, iclass 39, count 2 2006.229.04:11:18.24#ibcon#first serial, iclass 39, count 2 2006.229.04:11:18.24#ibcon#enter sib2, iclass 39, count 2 2006.229.04:11:18.24#ibcon#flushed, iclass 39, count 2 2006.229.04:11:18.24#ibcon#about to write, iclass 39, count 2 2006.229.04:11:18.24#ibcon#wrote, iclass 39, count 2 2006.229.04:11:18.24#ibcon#about to read 3, iclass 39, count 2 2006.229.04:11:18.26#ibcon#read 3, iclass 39, count 2 2006.229.04:11:18.26#ibcon#about to read 4, iclass 39, count 2 2006.229.04:11:18.26#ibcon#read 4, iclass 39, count 2 2006.229.04:11:18.26#ibcon#about to read 5, iclass 39, count 2 2006.229.04:11:18.26#ibcon#read 5, iclass 39, count 2 2006.229.04:11:18.26#ibcon#about to read 6, iclass 39, count 2 2006.229.04:11:18.26#ibcon#read 6, iclass 39, count 2 2006.229.04:11:18.26#ibcon#end of sib2, iclass 39, count 2 2006.229.04:11:18.26#ibcon#*mode == 0, iclass 39, count 2 2006.229.04:11:18.26#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.04:11:18.26#ibcon#[27=AT02-04\r\n] 2006.229.04:11:18.26#ibcon#*before write, iclass 39, count 2 2006.229.04:11:18.26#ibcon#enter sib2, iclass 39, count 2 2006.229.04:11:18.26#ibcon#flushed, iclass 39, count 2 2006.229.04:11:18.26#ibcon#about to write, iclass 39, count 2 2006.229.04:11:18.26#ibcon#wrote, iclass 39, count 2 2006.229.04:11:18.26#ibcon#about to read 3, iclass 39, count 2 2006.229.04:11:18.29#ibcon#read 3, iclass 39, count 2 2006.229.04:11:18.29#ibcon#about to read 4, iclass 39, count 2 2006.229.04:11:18.29#ibcon#read 4, iclass 39, count 2 2006.229.04:11:18.29#ibcon#about to read 5, iclass 39, count 2 2006.229.04:11:18.29#ibcon#read 5, iclass 39, count 2 2006.229.04:11:18.29#ibcon#about to read 6, iclass 39, count 2 2006.229.04:11:18.29#ibcon#read 6, iclass 39, count 2 2006.229.04:11:18.29#ibcon#end of sib2, iclass 39, count 2 2006.229.04:11:18.29#ibcon#*after write, iclass 39, count 2 2006.229.04:11:18.29#ibcon#*before return 0, iclass 39, count 2 2006.229.04:11:18.29#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:18.29#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:11:18.29#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.04:11:18.29#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:18.29#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:18.41#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:18.41#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:18.41#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:11:18.41#ibcon#first serial, iclass 39, count 0 2006.229.04:11:18.41#ibcon#enter sib2, iclass 39, count 0 2006.229.04:11:18.41#ibcon#flushed, iclass 39, count 0 2006.229.04:11:18.41#ibcon#about to write, iclass 39, count 0 2006.229.04:11:18.41#ibcon#wrote, iclass 39, count 0 2006.229.04:11:18.41#ibcon#about to read 3, iclass 39, count 0 2006.229.04:11:18.43#ibcon#read 3, iclass 39, count 0 2006.229.04:11:18.43#ibcon#about to read 4, iclass 39, count 0 2006.229.04:11:18.43#ibcon#read 4, iclass 39, count 0 2006.229.04:11:18.43#ibcon#about to read 5, iclass 39, count 0 2006.229.04:11:18.43#ibcon#read 5, iclass 39, count 0 2006.229.04:11:18.43#ibcon#about to read 6, iclass 39, count 0 2006.229.04:11:18.43#ibcon#read 6, iclass 39, count 0 2006.229.04:11:18.43#ibcon#end of sib2, iclass 39, count 0 2006.229.04:11:18.43#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:11:18.43#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:11:18.43#ibcon#[27=USB\r\n] 2006.229.04:11:18.43#ibcon#*before write, iclass 39, count 0 2006.229.04:11:18.43#ibcon#enter sib2, iclass 39, count 0 2006.229.04:11:18.43#ibcon#flushed, iclass 39, count 0 2006.229.04:11:18.43#ibcon#about to write, iclass 39, count 0 2006.229.04:11:18.43#ibcon#wrote, iclass 39, count 0 2006.229.04:11:18.43#ibcon#about to read 3, iclass 39, count 0 2006.229.04:11:18.46#ibcon#read 3, iclass 39, count 0 2006.229.04:11:18.46#ibcon#about to read 4, iclass 39, count 0 2006.229.04:11:18.46#ibcon#read 4, iclass 39, count 0 2006.229.04:11:18.46#ibcon#about to read 5, iclass 39, count 0 2006.229.04:11:18.46#ibcon#read 5, iclass 39, count 0 2006.229.04:11:18.46#ibcon#about to read 6, iclass 39, count 0 2006.229.04:11:18.46#ibcon#read 6, iclass 39, count 0 2006.229.04:11:18.46#ibcon#end of sib2, iclass 39, count 0 2006.229.04:11:18.46#ibcon#*after write, iclass 39, count 0 2006.229.04:11:18.46#ibcon#*before return 0, iclass 39, count 0 2006.229.04:11:18.46#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:18.46#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:11:18.46#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:11:18.46#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:11:18.46$vck44/vblo=3,649.99 2006.229.04:11:18.46#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.04:11:18.46#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.04:11:18.46#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:18.46#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:18.46#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:18.46#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:18.46#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:11:18.46#ibcon#first serial, iclass 3, count 0 2006.229.04:11:18.46#ibcon#enter sib2, iclass 3, count 0 2006.229.04:11:18.46#ibcon#flushed, iclass 3, count 0 2006.229.04:11:18.46#ibcon#about to write, iclass 3, count 0 2006.229.04:11:18.46#ibcon#wrote, iclass 3, count 0 2006.229.04:11:18.46#ibcon#about to read 3, iclass 3, count 0 2006.229.04:11:18.48#ibcon#read 3, iclass 3, count 0 2006.229.04:11:18.48#ibcon#about to read 4, iclass 3, count 0 2006.229.04:11:18.48#ibcon#read 4, iclass 3, count 0 2006.229.04:11:18.48#ibcon#about to read 5, iclass 3, count 0 2006.229.04:11:18.48#ibcon#read 5, iclass 3, count 0 2006.229.04:11:18.48#ibcon#about to read 6, iclass 3, count 0 2006.229.04:11:18.48#ibcon#read 6, iclass 3, count 0 2006.229.04:11:18.48#ibcon#end of sib2, iclass 3, count 0 2006.229.04:11:18.48#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:11:18.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:11:18.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:11:18.48#ibcon#*before write, iclass 3, count 0 2006.229.04:11:18.48#ibcon#enter sib2, iclass 3, count 0 2006.229.04:11:18.48#ibcon#flushed, iclass 3, count 0 2006.229.04:11:18.48#ibcon#about to write, iclass 3, count 0 2006.229.04:11:18.48#ibcon#wrote, iclass 3, count 0 2006.229.04:11:18.48#ibcon#about to read 3, iclass 3, count 0 2006.229.04:11:18.52#ibcon#read 3, iclass 3, count 0 2006.229.04:11:18.52#ibcon#about to read 4, iclass 3, count 0 2006.229.04:11:18.52#ibcon#read 4, iclass 3, count 0 2006.229.04:11:18.52#ibcon#about to read 5, iclass 3, count 0 2006.229.04:11:18.52#ibcon#read 5, iclass 3, count 0 2006.229.04:11:18.52#ibcon#about to read 6, iclass 3, count 0 2006.229.04:11:18.52#ibcon#read 6, iclass 3, count 0 2006.229.04:11:18.52#ibcon#end of sib2, iclass 3, count 0 2006.229.04:11:18.52#ibcon#*after write, iclass 3, count 0 2006.229.04:11:18.52#ibcon#*before return 0, iclass 3, count 0 2006.229.04:11:18.52#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:18.52#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:11:18.52#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:11:18.52#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:11:18.52$vck44/vb=3,4 2006.229.04:11:18.52#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.04:11:18.52#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.04:11:18.52#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:18.52#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:18.58#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:18.58#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:18.58#ibcon#enter wrdev, iclass 5, count 2 2006.229.04:11:18.58#ibcon#first serial, iclass 5, count 2 2006.229.04:11:18.58#ibcon#enter sib2, iclass 5, count 2 2006.229.04:11:18.58#ibcon#flushed, iclass 5, count 2 2006.229.04:11:18.58#ibcon#about to write, iclass 5, count 2 2006.229.04:11:18.58#ibcon#wrote, iclass 5, count 2 2006.229.04:11:18.58#ibcon#about to read 3, iclass 5, count 2 2006.229.04:11:18.60#ibcon#read 3, iclass 5, count 2 2006.229.04:11:18.60#ibcon#about to read 4, iclass 5, count 2 2006.229.04:11:18.60#ibcon#read 4, iclass 5, count 2 2006.229.04:11:18.60#ibcon#about to read 5, iclass 5, count 2 2006.229.04:11:18.60#ibcon#read 5, iclass 5, count 2 2006.229.04:11:18.60#ibcon#about to read 6, iclass 5, count 2 2006.229.04:11:18.60#ibcon#read 6, iclass 5, count 2 2006.229.04:11:18.60#ibcon#end of sib2, iclass 5, count 2 2006.229.04:11:18.60#ibcon#*mode == 0, iclass 5, count 2 2006.229.04:11:18.60#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.04:11:18.60#ibcon#[27=AT03-04\r\n] 2006.229.04:11:18.60#ibcon#*before write, iclass 5, count 2 2006.229.04:11:18.60#ibcon#enter sib2, iclass 5, count 2 2006.229.04:11:18.60#ibcon#flushed, iclass 5, count 2 2006.229.04:11:18.60#ibcon#about to write, iclass 5, count 2 2006.229.04:11:18.60#ibcon#wrote, iclass 5, count 2 2006.229.04:11:18.60#ibcon#about to read 3, iclass 5, count 2 2006.229.04:11:18.63#ibcon#read 3, iclass 5, count 2 2006.229.04:11:18.63#ibcon#about to read 4, iclass 5, count 2 2006.229.04:11:18.63#ibcon#read 4, iclass 5, count 2 2006.229.04:11:18.63#ibcon#about to read 5, iclass 5, count 2 2006.229.04:11:18.63#ibcon#read 5, iclass 5, count 2 2006.229.04:11:18.63#ibcon#about to read 6, iclass 5, count 2 2006.229.04:11:18.63#ibcon#read 6, iclass 5, count 2 2006.229.04:11:18.63#ibcon#end of sib2, iclass 5, count 2 2006.229.04:11:18.63#ibcon#*after write, iclass 5, count 2 2006.229.04:11:18.63#ibcon#*before return 0, iclass 5, count 2 2006.229.04:11:18.63#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:18.63#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:11:18.63#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.04:11:18.63#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:18.63#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:18.75#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:18.75#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:18.75#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:11:18.75#ibcon#first serial, iclass 5, count 0 2006.229.04:11:18.75#ibcon#enter sib2, iclass 5, count 0 2006.229.04:11:18.75#ibcon#flushed, iclass 5, count 0 2006.229.04:11:18.75#ibcon#about to write, iclass 5, count 0 2006.229.04:11:18.75#ibcon#wrote, iclass 5, count 0 2006.229.04:11:18.75#ibcon#about to read 3, iclass 5, count 0 2006.229.04:11:18.77#ibcon#read 3, iclass 5, count 0 2006.229.04:11:18.77#ibcon#about to read 4, iclass 5, count 0 2006.229.04:11:18.77#ibcon#read 4, iclass 5, count 0 2006.229.04:11:18.77#ibcon#about to read 5, iclass 5, count 0 2006.229.04:11:18.77#ibcon#read 5, iclass 5, count 0 2006.229.04:11:18.77#ibcon#about to read 6, iclass 5, count 0 2006.229.04:11:18.77#ibcon#read 6, iclass 5, count 0 2006.229.04:11:18.77#ibcon#end of sib2, iclass 5, count 0 2006.229.04:11:18.77#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:11:18.77#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:11:18.77#ibcon#[27=USB\r\n] 2006.229.04:11:18.77#ibcon#*before write, iclass 5, count 0 2006.229.04:11:18.77#ibcon#enter sib2, iclass 5, count 0 2006.229.04:11:18.77#ibcon#flushed, iclass 5, count 0 2006.229.04:11:18.77#ibcon#about to write, iclass 5, count 0 2006.229.04:11:18.77#ibcon#wrote, iclass 5, count 0 2006.229.04:11:18.77#ibcon#about to read 3, iclass 5, count 0 2006.229.04:11:18.80#ibcon#read 3, iclass 5, count 0 2006.229.04:11:18.80#ibcon#about to read 4, iclass 5, count 0 2006.229.04:11:18.80#ibcon#read 4, iclass 5, count 0 2006.229.04:11:18.80#ibcon#about to read 5, iclass 5, count 0 2006.229.04:11:18.80#ibcon#read 5, iclass 5, count 0 2006.229.04:11:18.80#ibcon#about to read 6, iclass 5, count 0 2006.229.04:11:18.80#ibcon#read 6, iclass 5, count 0 2006.229.04:11:18.80#ibcon#end of sib2, iclass 5, count 0 2006.229.04:11:18.80#ibcon#*after write, iclass 5, count 0 2006.229.04:11:18.80#ibcon#*before return 0, iclass 5, count 0 2006.229.04:11:18.80#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:18.80#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:11:18.80#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:11:18.80#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:11:18.80$vck44/vblo=4,679.99 2006.229.04:11:18.80#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.04:11:18.80#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.04:11:18.80#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:18.80#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:18.80#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:18.80#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:18.80#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:11:18.80#ibcon#first serial, iclass 7, count 0 2006.229.04:11:18.80#ibcon#enter sib2, iclass 7, count 0 2006.229.04:11:18.80#ibcon#flushed, iclass 7, count 0 2006.229.04:11:18.80#ibcon#about to write, iclass 7, count 0 2006.229.04:11:18.80#ibcon#wrote, iclass 7, count 0 2006.229.04:11:18.80#ibcon#about to read 3, iclass 7, count 0 2006.229.04:11:18.82#ibcon#read 3, iclass 7, count 0 2006.229.04:11:18.82#ibcon#about to read 4, iclass 7, count 0 2006.229.04:11:18.82#ibcon#read 4, iclass 7, count 0 2006.229.04:11:18.82#ibcon#about to read 5, iclass 7, count 0 2006.229.04:11:18.82#ibcon#read 5, iclass 7, count 0 2006.229.04:11:18.82#ibcon#about to read 6, iclass 7, count 0 2006.229.04:11:18.82#ibcon#read 6, iclass 7, count 0 2006.229.04:11:18.82#ibcon#end of sib2, iclass 7, count 0 2006.229.04:11:18.82#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:11:18.82#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:11:18.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:11:18.82#ibcon#*before write, iclass 7, count 0 2006.229.04:11:18.82#ibcon#enter sib2, iclass 7, count 0 2006.229.04:11:18.82#ibcon#flushed, iclass 7, count 0 2006.229.04:11:18.82#ibcon#about to write, iclass 7, count 0 2006.229.04:11:18.82#ibcon#wrote, iclass 7, count 0 2006.229.04:11:18.82#ibcon#about to read 3, iclass 7, count 0 2006.229.04:11:18.86#ibcon#read 3, iclass 7, count 0 2006.229.04:11:18.86#ibcon#about to read 4, iclass 7, count 0 2006.229.04:11:18.86#ibcon#read 4, iclass 7, count 0 2006.229.04:11:18.86#ibcon#about to read 5, iclass 7, count 0 2006.229.04:11:18.86#ibcon#read 5, iclass 7, count 0 2006.229.04:11:18.86#ibcon#about to read 6, iclass 7, count 0 2006.229.04:11:18.86#ibcon#read 6, iclass 7, count 0 2006.229.04:11:18.86#ibcon#end of sib2, iclass 7, count 0 2006.229.04:11:18.86#ibcon#*after write, iclass 7, count 0 2006.229.04:11:18.86#ibcon#*before return 0, iclass 7, count 0 2006.229.04:11:18.86#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:18.86#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:11:18.86#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:11:18.86#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:11:18.86$vck44/vb=4,4 2006.229.04:11:18.86#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.04:11:18.86#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.04:11:18.86#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:18.86#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:18.92#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:18.92#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:18.92#ibcon#enter wrdev, iclass 11, count 2 2006.229.04:11:18.92#ibcon#first serial, iclass 11, count 2 2006.229.04:11:18.92#ibcon#enter sib2, iclass 11, count 2 2006.229.04:11:18.92#ibcon#flushed, iclass 11, count 2 2006.229.04:11:18.92#ibcon#about to write, iclass 11, count 2 2006.229.04:11:18.92#ibcon#wrote, iclass 11, count 2 2006.229.04:11:18.92#ibcon#about to read 3, iclass 11, count 2 2006.229.04:11:18.94#ibcon#read 3, iclass 11, count 2 2006.229.04:11:18.94#ibcon#about to read 4, iclass 11, count 2 2006.229.04:11:18.94#ibcon#read 4, iclass 11, count 2 2006.229.04:11:18.94#ibcon#about to read 5, iclass 11, count 2 2006.229.04:11:18.94#ibcon#read 5, iclass 11, count 2 2006.229.04:11:18.94#ibcon#about to read 6, iclass 11, count 2 2006.229.04:11:18.94#ibcon#read 6, iclass 11, count 2 2006.229.04:11:18.94#ibcon#end of sib2, iclass 11, count 2 2006.229.04:11:18.94#ibcon#*mode == 0, iclass 11, count 2 2006.229.04:11:18.94#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.04:11:18.94#ibcon#[27=AT04-04\r\n] 2006.229.04:11:18.94#ibcon#*before write, iclass 11, count 2 2006.229.04:11:18.94#ibcon#enter sib2, iclass 11, count 2 2006.229.04:11:18.94#ibcon#flushed, iclass 11, count 2 2006.229.04:11:18.94#ibcon#about to write, iclass 11, count 2 2006.229.04:11:18.94#ibcon#wrote, iclass 11, count 2 2006.229.04:11:18.94#ibcon#about to read 3, iclass 11, count 2 2006.229.04:11:18.97#ibcon#read 3, iclass 11, count 2 2006.229.04:11:18.97#ibcon#about to read 4, iclass 11, count 2 2006.229.04:11:18.97#ibcon#read 4, iclass 11, count 2 2006.229.04:11:18.97#ibcon#about to read 5, iclass 11, count 2 2006.229.04:11:18.97#ibcon#read 5, iclass 11, count 2 2006.229.04:11:18.97#ibcon#about to read 6, iclass 11, count 2 2006.229.04:11:18.97#ibcon#read 6, iclass 11, count 2 2006.229.04:11:18.97#ibcon#end of sib2, iclass 11, count 2 2006.229.04:11:18.97#ibcon#*after write, iclass 11, count 2 2006.229.04:11:18.97#ibcon#*before return 0, iclass 11, count 2 2006.229.04:11:18.97#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:18.97#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:11:18.97#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.04:11:18.97#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:18.97#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:19.09#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:19.09#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:19.09#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:11:19.09#ibcon#first serial, iclass 11, count 0 2006.229.04:11:19.09#ibcon#enter sib2, iclass 11, count 0 2006.229.04:11:19.09#ibcon#flushed, iclass 11, count 0 2006.229.04:11:19.09#ibcon#about to write, iclass 11, count 0 2006.229.04:11:19.09#ibcon#wrote, iclass 11, count 0 2006.229.04:11:19.09#ibcon#about to read 3, iclass 11, count 0 2006.229.04:11:19.11#ibcon#read 3, iclass 11, count 0 2006.229.04:11:19.11#ibcon#about to read 4, iclass 11, count 0 2006.229.04:11:19.11#ibcon#read 4, iclass 11, count 0 2006.229.04:11:19.11#ibcon#about to read 5, iclass 11, count 0 2006.229.04:11:19.11#ibcon#read 5, iclass 11, count 0 2006.229.04:11:19.11#ibcon#about to read 6, iclass 11, count 0 2006.229.04:11:19.11#ibcon#read 6, iclass 11, count 0 2006.229.04:11:19.11#ibcon#end of sib2, iclass 11, count 0 2006.229.04:11:19.11#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:11:19.11#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:11:19.11#ibcon#[27=USB\r\n] 2006.229.04:11:19.11#ibcon#*before write, iclass 11, count 0 2006.229.04:11:19.11#ibcon#enter sib2, iclass 11, count 0 2006.229.04:11:19.11#ibcon#flushed, iclass 11, count 0 2006.229.04:11:19.11#ibcon#about to write, iclass 11, count 0 2006.229.04:11:19.11#ibcon#wrote, iclass 11, count 0 2006.229.04:11:19.11#ibcon#about to read 3, iclass 11, count 0 2006.229.04:11:19.14#ibcon#read 3, iclass 11, count 0 2006.229.04:11:19.14#ibcon#about to read 4, iclass 11, count 0 2006.229.04:11:19.14#ibcon#read 4, iclass 11, count 0 2006.229.04:11:19.14#ibcon#about to read 5, iclass 11, count 0 2006.229.04:11:19.14#ibcon#read 5, iclass 11, count 0 2006.229.04:11:19.14#ibcon#about to read 6, iclass 11, count 0 2006.229.04:11:19.14#ibcon#read 6, iclass 11, count 0 2006.229.04:11:19.14#ibcon#end of sib2, iclass 11, count 0 2006.229.04:11:19.14#ibcon#*after write, iclass 11, count 0 2006.229.04:11:19.14#ibcon#*before return 0, iclass 11, count 0 2006.229.04:11:19.14#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:19.14#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:11:19.14#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:11:19.14#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:11:19.14$vck44/vblo=5,709.99 2006.229.04:11:19.14#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.04:11:19.14#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.04:11:19.14#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:19.14#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:19.14#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:19.14#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:19.14#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:11:19.14#ibcon#first serial, iclass 13, count 0 2006.229.04:11:19.14#ibcon#enter sib2, iclass 13, count 0 2006.229.04:11:19.14#ibcon#flushed, iclass 13, count 0 2006.229.04:11:19.14#ibcon#about to write, iclass 13, count 0 2006.229.04:11:19.14#ibcon#wrote, iclass 13, count 0 2006.229.04:11:19.14#ibcon#about to read 3, iclass 13, count 0 2006.229.04:11:19.16#ibcon#read 3, iclass 13, count 0 2006.229.04:11:19.16#ibcon#about to read 4, iclass 13, count 0 2006.229.04:11:19.16#ibcon#read 4, iclass 13, count 0 2006.229.04:11:19.16#ibcon#about to read 5, iclass 13, count 0 2006.229.04:11:19.16#ibcon#read 5, iclass 13, count 0 2006.229.04:11:19.16#ibcon#about to read 6, iclass 13, count 0 2006.229.04:11:19.16#ibcon#read 6, iclass 13, count 0 2006.229.04:11:19.16#ibcon#end of sib2, iclass 13, count 0 2006.229.04:11:19.16#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:11:19.16#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:11:19.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:11:19.16#ibcon#*before write, iclass 13, count 0 2006.229.04:11:19.16#ibcon#enter sib2, iclass 13, count 0 2006.229.04:11:19.16#ibcon#flushed, iclass 13, count 0 2006.229.04:11:19.16#ibcon#about to write, iclass 13, count 0 2006.229.04:11:19.16#ibcon#wrote, iclass 13, count 0 2006.229.04:11:19.16#ibcon#about to read 3, iclass 13, count 0 2006.229.04:11:19.20#ibcon#read 3, iclass 13, count 0 2006.229.04:11:19.20#ibcon#about to read 4, iclass 13, count 0 2006.229.04:11:19.20#ibcon#read 4, iclass 13, count 0 2006.229.04:11:19.20#ibcon#about to read 5, iclass 13, count 0 2006.229.04:11:19.20#ibcon#read 5, iclass 13, count 0 2006.229.04:11:19.20#ibcon#about to read 6, iclass 13, count 0 2006.229.04:11:19.20#ibcon#read 6, iclass 13, count 0 2006.229.04:11:19.20#ibcon#end of sib2, iclass 13, count 0 2006.229.04:11:19.20#ibcon#*after write, iclass 13, count 0 2006.229.04:11:19.20#ibcon#*before return 0, iclass 13, count 0 2006.229.04:11:19.20#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:19.20#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:11:19.20#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:11:19.20#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:11:19.20$vck44/vb=5,4 2006.229.04:11:19.20#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.04:11:19.20#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.04:11:19.20#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:19.20#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:19.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:19.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:19.26#ibcon#enter wrdev, iclass 15, count 2 2006.229.04:11:19.26#ibcon#first serial, iclass 15, count 2 2006.229.04:11:19.26#ibcon#enter sib2, iclass 15, count 2 2006.229.04:11:19.26#ibcon#flushed, iclass 15, count 2 2006.229.04:11:19.26#ibcon#about to write, iclass 15, count 2 2006.229.04:11:19.26#ibcon#wrote, iclass 15, count 2 2006.229.04:11:19.26#ibcon#about to read 3, iclass 15, count 2 2006.229.04:11:19.28#ibcon#read 3, iclass 15, count 2 2006.229.04:11:19.28#ibcon#about to read 4, iclass 15, count 2 2006.229.04:11:19.28#ibcon#read 4, iclass 15, count 2 2006.229.04:11:19.28#ibcon#about to read 5, iclass 15, count 2 2006.229.04:11:19.28#ibcon#read 5, iclass 15, count 2 2006.229.04:11:19.28#ibcon#about to read 6, iclass 15, count 2 2006.229.04:11:19.28#ibcon#read 6, iclass 15, count 2 2006.229.04:11:19.28#ibcon#end of sib2, iclass 15, count 2 2006.229.04:11:19.28#ibcon#*mode == 0, iclass 15, count 2 2006.229.04:11:19.28#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.04:11:19.28#ibcon#[27=AT05-04\r\n] 2006.229.04:11:19.28#ibcon#*before write, iclass 15, count 2 2006.229.04:11:19.28#ibcon#enter sib2, iclass 15, count 2 2006.229.04:11:19.28#ibcon#flushed, iclass 15, count 2 2006.229.04:11:19.28#ibcon#about to write, iclass 15, count 2 2006.229.04:11:19.28#ibcon#wrote, iclass 15, count 2 2006.229.04:11:19.28#ibcon#about to read 3, iclass 15, count 2 2006.229.04:11:19.31#ibcon#read 3, iclass 15, count 2 2006.229.04:11:19.31#ibcon#about to read 4, iclass 15, count 2 2006.229.04:11:19.31#ibcon#read 4, iclass 15, count 2 2006.229.04:11:19.31#ibcon#about to read 5, iclass 15, count 2 2006.229.04:11:19.31#ibcon#read 5, iclass 15, count 2 2006.229.04:11:19.31#ibcon#about to read 6, iclass 15, count 2 2006.229.04:11:19.31#ibcon#read 6, iclass 15, count 2 2006.229.04:11:19.31#ibcon#end of sib2, iclass 15, count 2 2006.229.04:11:19.31#ibcon#*after write, iclass 15, count 2 2006.229.04:11:19.31#ibcon#*before return 0, iclass 15, count 2 2006.229.04:11:19.31#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:19.31#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:11:19.31#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.04:11:19.31#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:19.31#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:19.43#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:19.43#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:19.43#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:11:19.43#ibcon#first serial, iclass 15, count 0 2006.229.04:11:19.43#ibcon#enter sib2, iclass 15, count 0 2006.229.04:11:19.43#ibcon#flushed, iclass 15, count 0 2006.229.04:11:19.43#ibcon#about to write, iclass 15, count 0 2006.229.04:11:19.43#ibcon#wrote, iclass 15, count 0 2006.229.04:11:19.43#ibcon#about to read 3, iclass 15, count 0 2006.229.04:11:19.45#ibcon#read 3, iclass 15, count 0 2006.229.04:11:19.45#ibcon#about to read 4, iclass 15, count 0 2006.229.04:11:19.45#ibcon#read 4, iclass 15, count 0 2006.229.04:11:19.45#ibcon#about to read 5, iclass 15, count 0 2006.229.04:11:19.45#ibcon#read 5, iclass 15, count 0 2006.229.04:11:19.45#ibcon#about to read 6, iclass 15, count 0 2006.229.04:11:19.45#ibcon#read 6, iclass 15, count 0 2006.229.04:11:19.45#ibcon#end of sib2, iclass 15, count 0 2006.229.04:11:19.45#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:11:19.45#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:11:19.45#ibcon#[27=USB\r\n] 2006.229.04:11:19.45#ibcon#*before write, iclass 15, count 0 2006.229.04:11:19.45#ibcon#enter sib2, iclass 15, count 0 2006.229.04:11:19.45#ibcon#flushed, iclass 15, count 0 2006.229.04:11:19.45#ibcon#about to write, iclass 15, count 0 2006.229.04:11:19.45#ibcon#wrote, iclass 15, count 0 2006.229.04:11:19.45#ibcon#about to read 3, iclass 15, count 0 2006.229.04:11:19.48#ibcon#read 3, iclass 15, count 0 2006.229.04:11:19.48#ibcon#about to read 4, iclass 15, count 0 2006.229.04:11:19.48#ibcon#read 4, iclass 15, count 0 2006.229.04:11:19.48#ibcon#about to read 5, iclass 15, count 0 2006.229.04:11:19.48#ibcon#read 5, iclass 15, count 0 2006.229.04:11:19.48#ibcon#about to read 6, iclass 15, count 0 2006.229.04:11:19.48#ibcon#read 6, iclass 15, count 0 2006.229.04:11:19.48#ibcon#end of sib2, iclass 15, count 0 2006.229.04:11:19.48#ibcon#*after write, iclass 15, count 0 2006.229.04:11:19.48#ibcon#*before return 0, iclass 15, count 0 2006.229.04:11:19.48#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:19.48#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:11:19.48#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:11:19.48#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:11:19.48$vck44/vblo=6,719.99 2006.229.04:11:19.48#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.04:11:19.48#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.04:11:19.48#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:19.48#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:19.48#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:19.48#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:19.48#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:11:19.48#ibcon#first serial, iclass 17, count 0 2006.229.04:11:19.48#ibcon#enter sib2, iclass 17, count 0 2006.229.04:11:19.48#ibcon#flushed, iclass 17, count 0 2006.229.04:11:19.48#ibcon#about to write, iclass 17, count 0 2006.229.04:11:19.48#ibcon#wrote, iclass 17, count 0 2006.229.04:11:19.48#ibcon#about to read 3, iclass 17, count 0 2006.229.04:11:19.50#ibcon#read 3, iclass 17, count 0 2006.229.04:11:19.50#ibcon#about to read 4, iclass 17, count 0 2006.229.04:11:19.50#ibcon#read 4, iclass 17, count 0 2006.229.04:11:19.50#ibcon#about to read 5, iclass 17, count 0 2006.229.04:11:19.50#ibcon#read 5, iclass 17, count 0 2006.229.04:11:19.50#ibcon#about to read 6, iclass 17, count 0 2006.229.04:11:19.50#ibcon#read 6, iclass 17, count 0 2006.229.04:11:19.50#ibcon#end of sib2, iclass 17, count 0 2006.229.04:11:19.50#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:11:19.50#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:11:19.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:11:19.50#ibcon#*before write, iclass 17, count 0 2006.229.04:11:19.50#ibcon#enter sib2, iclass 17, count 0 2006.229.04:11:19.50#ibcon#flushed, iclass 17, count 0 2006.229.04:11:19.50#ibcon#about to write, iclass 17, count 0 2006.229.04:11:19.50#ibcon#wrote, iclass 17, count 0 2006.229.04:11:19.50#ibcon#about to read 3, iclass 17, count 0 2006.229.04:11:19.54#ibcon#read 3, iclass 17, count 0 2006.229.04:11:19.54#ibcon#about to read 4, iclass 17, count 0 2006.229.04:11:19.54#ibcon#read 4, iclass 17, count 0 2006.229.04:11:19.54#ibcon#about to read 5, iclass 17, count 0 2006.229.04:11:19.54#ibcon#read 5, iclass 17, count 0 2006.229.04:11:19.54#ibcon#about to read 6, iclass 17, count 0 2006.229.04:11:19.54#ibcon#read 6, iclass 17, count 0 2006.229.04:11:19.54#ibcon#end of sib2, iclass 17, count 0 2006.229.04:11:19.54#ibcon#*after write, iclass 17, count 0 2006.229.04:11:19.54#ibcon#*before return 0, iclass 17, count 0 2006.229.04:11:19.54#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:19.54#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:11:19.54#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:11:19.54#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:11:19.54$vck44/vb=6,4 2006.229.04:11:19.54#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.04:11:19.54#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.04:11:19.54#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:19.54#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:19.60#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:19.60#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:19.60#ibcon#enter wrdev, iclass 19, count 2 2006.229.04:11:19.60#ibcon#first serial, iclass 19, count 2 2006.229.04:11:19.60#ibcon#enter sib2, iclass 19, count 2 2006.229.04:11:19.60#ibcon#flushed, iclass 19, count 2 2006.229.04:11:19.60#ibcon#about to write, iclass 19, count 2 2006.229.04:11:19.60#ibcon#wrote, iclass 19, count 2 2006.229.04:11:19.60#ibcon#about to read 3, iclass 19, count 2 2006.229.04:11:19.62#ibcon#read 3, iclass 19, count 2 2006.229.04:11:19.62#ibcon#about to read 4, iclass 19, count 2 2006.229.04:11:19.62#ibcon#read 4, iclass 19, count 2 2006.229.04:11:19.62#ibcon#about to read 5, iclass 19, count 2 2006.229.04:11:19.62#ibcon#read 5, iclass 19, count 2 2006.229.04:11:19.62#ibcon#about to read 6, iclass 19, count 2 2006.229.04:11:19.62#ibcon#read 6, iclass 19, count 2 2006.229.04:11:19.62#ibcon#end of sib2, iclass 19, count 2 2006.229.04:11:19.62#ibcon#*mode == 0, iclass 19, count 2 2006.229.04:11:19.62#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.04:11:19.62#ibcon#[27=AT06-04\r\n] 2006.229.04:11:19.62#ibcon#*before write, iclass 19, count 2 2006.229.04:11:19.62#ibcon#enter sib2, iclass 19, count 2 2006.229.04:11:19.62#ibcon#flushed, iclass 19, count 2 2006.229.04:11:19.62#ibcon#about to write, iclass 19, count 2 2006.229.04:11:19.62#ibcon#wrote, iclass 19, count 2 2006.229.04:11:19.62#ibcon#about to read 3, iclass 19, count 2 2006.229.04:11:19.65#ibcon#read 3, iclass 19, count 2 2006.229.04:11:19.65#ibcon#about to read 4, iclass 19, count 2 2006.229.04:11:19.65#ibcon#read 4, iclass 19, count 2 2006.229.04:11:19.65#ibcon#about to read 5, iclass 19, count 2 2006.229.04:11:19.65#ibcon#read 5, iclass 19, count 2 2006.229.04:11:19.65#ibcon#about to read 6, iclass 19, count 2 2006.229.04:11:19.65#ibcon#read 6, iclass 19, count 2 2006.229.04:11:19.65#ibcon#end of sib2, iclass 19, count 2 2006.229.04:11:19.65#ibcon#*after write, iclass 19, count 2 2006.229.04:11:19.65#ibcon#*before return 0, iclass 19, count 2 2006.229.04:11:19.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:19.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:11:19.65#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.04:11:19.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:19.65#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:19.77#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:19.77#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:19.77#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:11:19.77#ibcon#first serial, iclass 19, count 0 2006.229.04:11:19.77#ibcon#enter sib2, iclass 19, count 0 2006.229.04:11:19.77#ibcon#flushed, iclass 19, count 0 2006.229.04:11:19.77#ibcon#about to write, iclass 19, count 0 2006.229.04:11:19.77#ibcon#wrote, iclass 19, count 0 2006.229.04:11:19.77#ibcon#about to read 3, iclass 19, count 0 2006.229.04:11:19.79#ibcon#read 3, iclass 19, count 0 2006.229.04:11:19.79#ibcon#about to read 4, iclass 19, count 0 2006.229.04:11:19.79#ibcon#read 4, iclass 19, count 0 2006.229.04:11:19.79#ibcon#about to read 5, iclass 19, count 0 2006.229.04:11:19.79#ibcon#read 5, iclass 19, count 0 2006.229.04:11:19.79#ibcon#about to read 6, iclass 19, count 0 2006.229.04:11:19.79#ibcon#read 6, iclass 19, count 0 2006.229.04:11:19.79#ibcon#end of sib2, iclass 19, count 0 2006.229.04:11:19.79#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:11:19.79#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:11:19.79#ibcon#[27=USB\r\n] 2006.229.04:11:19.79#ibcon#*before write, iclass 19, count 0 2006.229.04:11:19.79#ibcon#enter sib2, iclass 19, count 0 2006.229.04:11:19.79#ibcon#flushed, iclass 19, count 0 2006.229.04:11:19.79#ibcon#about to write, iclass 19, count 0 2006.229.04:11:19.79#ibcon#wrote, iclass 19, count 0 2006.229.04:11:19.79#ibcon#about to read 3, iclass 19, count 0 2006.229.04:11:19.82#ibcon#read 3, iclass 19, count 0 2006.229.04:11:19.82#ibcon#about to read 4, iclass 19, count 0 2006.229.04:11:19.82#ibcon#read 4, iclass 19, count 0 2006.229.04:11:19.82#ibcon#about to read 5, iclass 19, count 0 2006.229.04:11:19.82#ibcon#read 5, iclass 19, count 0 2006.229.04:11:19.82#ibcon#about to read 6, iclass 19, count 0 2006.229.04:11:19.82#ibcon#read 6, iclass 19, count 0 2006.229.04:11:19.82#ibcon#end of sib2, iclass 19, count 0 2006.229.04:11:19.82#ibcon#*after write, iclass 19, count 0 2006.229.04:11:19.82#ibcon#*before return 0, iclass 19, count 0 2006.229.04:11:19.82#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:19.82#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:11:19.82#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:11:19.82#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:11:19.82$vck44/vblo=7,734.99 2006.229.04:11:19.82#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.04:11:19.82#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.04:11:19.82#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:19.82#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:19.82#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:19.82#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:19.82#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:11:19.82#ibcon#first serial, iclass 21, count 0 2006.229.04:11:19.82#ibcon#enter sib2, iclass 21, count 0 2006.229.04:11:19.82#ibcon#flushed, iclass 21, count 0 2006.229.04:11:19.82#ibcon#about to write, iclass 21, count 0 2006.229.04:11:19.82#ibcon#wrote, iclass 21, count 0 2006.229.04:11:19.82#ibcon#about to read 3, iclass 21, count 0 2006.229.04:11:19.84#ibcon#read 3, iclass 21, count 0 2006.229.04:11:19.84#ibcon#about to read 4, iclass 21, count 0 2006.229.04:11:19.84#ibcon#read 4, iclass 21, count 0 2006.229.04:11:19.84#ibcon#about to read 5, iclass 21, count 0 2006.229.04:11:19.84#ibcon#read 5, iclass 21, count 0 2006.229.04:11:19.84#ibcon#about to read 6, iclass 21, count 0 2006.229.04:11:19.84#ibcon#read 6, iclass 21, count 0 2006.229.04:11:19.84#ibcon#end of sib2, iclass 21, count 0 2006.229.04:11:19.84#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:11:19.84#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:11:19.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:11:19.84#ibcon#*before write, iclass 21, count 0 2006.229.04:11:19.84#ibcon#enter sib2, iclass 21, count 0 2006.229.04:11:19.84#ibcon#flushed, iclass 21, count 0 2006.229.04:11:19.84#ibcon#about to write, iclass 21, count 0 2006.229.04:11:19.84#ibcon#wrote, iclass 21, count 0 2006.229.04:11:19.84#ibcon#about to read 3, iclass 21, count 0 2006.229.04:11:19.88#ibcon#read 3, iclass 21, count 0 2006.229.04:11:19.88#ibcon#about to read 4, iclass 21, count 0 2006.229.04:11:19.88#ibcon#read 4, iclass 21, count 0 2006.229.04:11:19.88#ibcon#about to read 5, iclass 21, count 0 2006.229.04:11:19.88#ibcon#read 5, iclass 21, count 0 2006.229.04:11:19.88#ibcon#about to read 6, iclass 21, count 0 2006.229.04:11:19.88#ibcon#read 6, iclass 21, count 0 2006.229.04:11:19.88#ibcon#end of sib2, iclass 21, count 0 2006.229.04:11:19.88#ibcon#*after write, iclass 21, count 0 2006.229.04:11:19.88#ibcon#*before return 0, iclass 21, count 0 2006.229.04:11:19.88#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:19.88#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:11:19.88#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:11:19.88#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:11:19.88$vck44/vb=7,4 2006.229.04:11:19.88#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.04:11:19.88#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.04:11:19.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:19.88#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:11:19.94#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:11:19.94#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:11:19.94#ibcon#enter wrdev, iclass 23, count 2 2006.229.04:11:19.94#ibcon#first serial, iclass 23, count 2 2006.229.04:11:19.94#ibcon#enter sib2, iclass 23, count 2 2006.229.04:11:19.94#ibcon#flushed, iclass 23, count 2 2006.229.04:11:19.94#ibcon#about to write, iclass 23, count 2 2006.229.04:11:19.94#ibcon#wrote, iclass 23, count 2 2006.229.04:11:19.94#ibcon#about to read 3, iclass 23, count 2 2006.229.04:11:19.96#ibcon#read 3, iclass 23, count 2 2006.229.04:11:19.96#ibcon#about to read 4, iclass 23, count 2 2006.229.04:11:19.96#ibcon#read 4, iclass 23, count 2 2006.229.04:11:19.96#ibcon#about to read 5, iclass 23, count 2 2006.229.04:11:19.96#ibcon#read 5, iclass 23, count 2 2006.229.04:11:19.96#ibcon#about to read 6, iclass 23, count 2 2006.229.04:11:19.96#ibcon#read 6, iclass 23, count 2 2006.229.04:11:19.96#ibcon#end of sib2, iclass 23, count 2 2006.229.04:11:19.96#ibcon#*mode == 0, iclass 23, count 2 2006.229.04:11:19.96#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.04:11:19.96#ibcon#[27=AT07-04\r\n] 2006.229.04:11:19.96#ibcon#*before write, iclass 23, count 2 2006.229.04:11:19.96#ibcon#enter sib2, iclass 23, count 2 2006.229.04:11:19.96#ibcon#flushed, iclass 23, count 2 2006.229.04:11:19.96#ibcon#about to write, iclass 23, count 2 2006.229.04:11:19.96#ibcon#wrote, iclass 23, count 2 2006.229.04:11:19.96#ibcon#about to read 3, iclass 23, count 2 2006.229.04:11:19.99#ibcon#read 3, iclass 23, count 2 2006.229.04:11:19.99#ibcon#about to read 4, iclass 23, count 2 2006.229.04:11:19.99#ibcon#read 4, iclass 23, count 2 2006.229.04:11:19.99#ibcon#about to read 5, iclass 23, count 2 2006.229.04:11:19.99#ibcon#read 5, iclass 23, count 2 2006.229.04:11:19.99#ibcon#about to read 6, iclass 23, count 2 2006.229.04:11:19.99#ibcon#read 6, iclass 23, count 2 2006.229.04:11:19.99#ibcon#end of sib2, iclass 23, count 2 2006.229.04:11:19.99#ibcon#*after write, iclass 23, count 2 2006.229.04:11:19.99#ibcon#*before return 0, iclass 23, count 2 2006.229.04:11:19.99#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:11:19.99#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:11:19.99#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.04:11:19.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:19.99#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:11:20.11#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:11:20.11#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:11:20.11#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:11:20.11#ibcon#first serial, iclass 23, count 0 2006.229.04:11:20.11#ibcon#enter sib2, iclass 23, count 0 2006.229.04:11:20.11#ibcon#flushed, iclass 23, count 0 2006.229.04:11:20.11#ibcon#about to write, iclass 23, count 0 2006.229.04:11:20.11#ibcon#wrote, iclass 23, count 0 2006.229.04:11:20.11#ibcon#about to read 3, iclass 23, count 0 2006.229.04:11:20.13#ibcon#read 3, iclass 23, count 0 2006.229.04:11:20.13#ibcon#about to read 4, iclass 23, count 0 2006.229.04:11:20.13#ibcon#read 4, iclass 23, count 0 2006.229.04:11:20.13#ibcon#about to read 5, iclass 23, count 0 2006.229.04:11:20.13#ibcon#read 5, iclass 23, count 0 2006.229.04:11:20.13#ibcon#about to read 6, iclass 23, count 0 2006.229.04:11:20.13#ibcon#read 6, iclass 23, count 0 2006.229.04:11:20.13#ibcon#end of sib2, iclass 23, count 0 2006.229.04:11:20.13#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:11:20.13#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:11:20.13#ibcon#[27=USB\r\n] 2006.229.04:11:20.13#ibcon#*before write, iclass 23, count 0 2006.229.04:11:20.13#ibcon#enter sib2, iclass 23, count 0 2006.229.04:11:20.13#ibcon#flushed, iclass 23, count 0 2006.229.04:11:20.13#ibcon#about to write, iclass 23, count 0 2006.229.04:11:20.13#ibcon#wrote, iclass 23, count 0 2006.229.04:11:20.13#ibcon#about to read 3, iclass 23, count 0 2006.229.04:11:20.16#ibcon#read 3, iclass 23, count 0 2006.229.04:11:20.16#ibcon#about to read 4, iclass 23, count 0 2006.229.04:11:20.16#ibcon#read 4, iclass 23, count 0 2006.229.04:11:20.16#ibcon#about to read 5, iclass 23, count 0 2006.229.04:11:20.16#ibcon#read 5, iclass 23, count 0 2006.229.04:11:20.16#ibcon#about to read 6, iclass 23, count 0 2006.229.04:11:20.16#ibcon#read 6, iclass 23, count 0 2006.229.04:11:20.16#ibcon#end of sib2, iclass 23, count 0 2006.229.04:11:20.16#ibcon#*after write, iclass 23, count 0 2006.229.04:11:20.16#ibcon#*before return 0, iclass 23, count 0 2006.229.04:11:20.16#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:11:20.16#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:11:20.16#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:11:20.16#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:11:20.16$vck44/vblo=8,744.99 2006.229.04:11:20.16#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.04:11:20.16#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.04:11:20.16#ibcon#ireg 17 cls_cnt 0 2006.229.04:11:20.16#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:11:20.16#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:11:20.16#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:11:20.16#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:11:20.16#ibcon#first serial, iclass 25, count 0 2006.229.04:11:20.16#ibcon#enter sib2, iclass 25, count 0 2006.229.04:11:20.16#ibcon#flushed, iclass 25, count 0 2006.229.04:11:20.16#ibcon#about to write, iclass 25, count 0 2006.229.04:11:20.16#ibcon#wrote, iclass 25, count 0 2006.229.04:11:20.16#ibcon#about to read 3, iclass 25, count 0 2006.229.04:11:20.18#ibcon#read 3, iclass 25, count 0 2006.229.04:11:20.18#ibcon#about to read 4, iclass 25, count 0 2006.229.04:11:20.18#ibcon#read 4, iclass 25, count 0 2006.229.04:11:20.18#ibcon#about to read 5, iclass 25, count 0 2006.229.04:11:20.18#ibcon#read 5, iclass 25, count 0 2006.229.04:11:20.18#ibcon#about to read 6, iclass 25, count 0 2006.229.04:11:20.18#ibcon#read 6, iclass 25, count 0 2006.229.04:11:20.18#ibcon#end of sib2, iclass 25, count 0 2006.229.04:11:20.18#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:11:20.18#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:11:20.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:11:20.18#ibcon#*before write, iclass 25, count 0 2006.229.04:11:20.18#ibcon#enter sib2, iclass 25, count 0 2006.229.04:11:20.18#ibcon#flushed, iclass 25, count 0 2006.229.04:11:20.18#ibcon#about to write, iclass 25, count 0 2006.229.04:11:20.18#ibcon#wrote, iclass 25, count 0 2006.229.04:11:20.18#ibcon#about to read 3, iclass 25, count 0 2006.229.04:11:20.22#ibcon#read 3, iclass 25, count 0 2006.229.04:11:20.22#ibcon#about to read 4, iclass 25, count 0 2006.229.04:11:20.22#ibcon#read 4, iclass 25, count 0 2006.229.04:11:20.22#ibcon#about to read 5, iclass 25, count 0 2006.229.04:11:20.22#ibcon#read 5, iclass 25, count 0 2006.229.04:11:20.22#ibcon#about to read 6, iclass 25, count 0 2006.229.04:11:20.22#ibcon#read 6, iclass 25, count 0 2006.229.04:11:20.22#ibcon#end of sib2, iclass 25, count 0 2006.229.04:11:20.22#ibcon#*after write, iclass 25, count 0 2006.229.04:11:20.22#ibcon#*before return 0, iclass 25, count 0 2006.229.04:11:20.22#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:11:20.22#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:11:20.22#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:11:20.22#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:11:20.22$vck44/vb=8,4 2006.229.04:11:20.22#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.04:11:20.22#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.04:11:20.22#ibcon#ireg 11 cls_cnt 2 2006.229.04:11:20.22#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:11:20.28#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:11:20.28#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:11:20.28#ibcon#enter wrdev, iclass 27, count 2 2006.229.04:11:20.28#ibcon#first serial, iclass 27, count 2 2006.229.04:11:20.28#ibcon#enter sib2, iclass 27, count 2 2006.229.04:11:20.28#ibcon#flushed, iclass 27, count 2 2006.229.04:11:20.28#ibcon#about to write, iclass 27, count 2 2006.229.04:11:20.28#ibcon#wrote, iclass 27, count 2 2006.229.04:11:20.28#ibcon#about to read 3, iclass 27, count 2 2006.229.04:11:20.30#ibcon#read 3, iclass 27, count 2 2006.229.04:11:20.30#ibcon#about to read 4, iclass 27, count 2 2006.229.04:11:20.30#ibcon#read 4, iclass 27, count 2 2006.229.04:11:20.30#ibcon#about to read 5, iclass 27, count 2 2006.229.04:11:20.30#ibcon#read 5, iclass 27, count 2 2006.229.04:11:20.30#ibcon#about to read 6, iclass 27, count 2 2006.229.04:11:20.30#ibcon#read 6, iclass 27, count 2 2006.229.04:11:20.30#ibcon#end of sib2, iclass 27, count 2 2006.229.04:11:20.30#ibcon#*mode == 0, iclass 27, count 2 2006.229.04:11:20.30#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.04:11:20.30#ibcon#[27=AT08-04\r\n] 2006.229.04:11:20.30#ibcon#*before write, iclass 27, count 2 2006.229.04:11:20.30#ibcon#enter sib2, iclass 27, count 2 2006.229.04:11:20.30#ibcon#flushed, iclass 27, count 2 2006.229.04:11:20.30#ibcon#about to write, iclass 27, count 2 2006.229.04:11:20.30#ibcon#wrote, iclass 27, count 2 2006.229.04:11:20.30#ibcon#about to read 3, iclass 27, count 2 2006.229.04:11:20.33#ibcon#read 3, iclass 27, count 2 2006.229.04:11:20.33#ibcon#about to read 4, iclass 27, count 2 2006.229.04:11:20.33#ibcon#read 4, iclass 27, count 2 2006.229.04:11:20.33#ibcon#about to read 5, iclass 27, count 2 2006.229.04:11:20.33#ibcon#read 5, iclass 27, count 2 2006.229.04:11:20.33#ibcon#about to read 6, iclass 27, count 2 2006.229.04:11:20.33#ibcon#read 6, iclass 27, count 2 2006.229.04:11:20.33#ibcon#end of sib2, iclass 27, count 2 2006.229.04:11:20.33#ibcon#*after write, iclass 27, count 2 2006.229.04:11:20.33#ibcon#*before return 0, iclass 27, count 2 2006.229.04:11:20.33#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:11:20.33#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:11:20.33#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.04:11:20.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:11:20.33#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:11:20.45#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:11:20.45#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:11:20.45#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:11:20.45#ibcon#first serial, iclass 27, count 0 2006.229.04:11:20.45#ibcon#enter sib2, iclass 27, count 0 2006.229.04:11:20.45#ibcon#flushed, iclass 27, count 0 2006.229.04:11:20.45#ibcon#about to write, iclass 27, count 0 2006.229.04:11:20.45#ibcon#wrote, iclass 27, count 0 2006.229.04:11:20.45#ibcon#about to read 3, iclass 27, count 0 2006.229.04:11:20.47#ibcon#read 3, iclass 27, count 0 2006.229.04:11:20.47#ibcon#about to read 4, iclass 27, count 0 2006.229.04:11:20.47#ibcon#read 4, iclass 27, count 0 2006.229.04:11:20.47#ibcon#about to read 5, iclass 27, count 0 2006.229.04:11:20.47#ibcon#read 5, iclass 27, count 0 2006.229.04:11:20.47#ibcon#about to read 6, iclass 27, count 0 2006.229.04:11:20.47#ibcon#read 6, iclass 27, count 0 2006.229.04:11:20.47#ibcon#end of sib2, iclass 27, count 0 2006.229.04:11:20.47#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:11:20.47#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:11:20.47#ibcon#[27=USB\r\n] 2006.229.04:11:20.47#ibcon#*before write, iclass 27, count 0 2006.229.04:11:20.47#ibcon#enter sib2, iclass 27, count 0 2006.229.04:11:20.47#ibcon#flushed, iclass 27, count 0 2006.229.04:11:20.47#ibcon#about to write, iclass 27, count 0 2006.229.04:11:20.47#ibcon#wrote, iclass 27, count 0 2006.229.04:11:20.47#ibcon#about to read 3, iclass 27, count 0 2006.229.04:11:20.50#ibcon#read 3, iclass 27, count 0 2006.229.04:11:20.50#ibcon#about to read 4, iclass 27, count 0 2006.229.04:11:20.50#ibcon#read 4, iclass 27, count 0 2006.229.04:11:20.50#ibcon#about to read 5, iclass 27, count 0 2006.229.04:11:20.50#ibcon#read 5, iclass 27, count 0 2006.229.04:11:20.50#ibcon#about to read 6, iclass 27, count 0 2006.229.04:11:20.50#ibcon#read 6, iclass 27, count 0 2006.229.04:11:20.50#ibcon#end of sib2, iclass 27, count 0 2006.229.04:11:20.50#ibcon#*after write, iclass 27, count 0 2006.229.04:11:20.50#ibcon#*before return 0, iclass 27, count 0 2006.229.04:11:20.50#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:11:20.50#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:11:20.50#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:11:20.50#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:11:20.50$vck44/vabw=wide 2006.229.04:11:20.50#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.04:11:20.50#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.04:11:20.50#ibcon#ireg 8 cls_cnt 0 2006.229.04:11:20.50#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:20.50#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:20.50#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:20.50#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:11:20.50#ibcon#first serial, iclass 29, count 0 2006.229.04:11:20.50#ibcon#enter sib2, iclass 29, count 0 2006.229.04:11:20.50#ibcon#flushed, iclass 29, count 0 2006.229.04:11:20.50#ibcon#about to write, iclass 29, count 0 2006.229.04:11:20.50#ibcon#wrote, iclass 29, count 0 2006.229.04:11:20.50#ibcon#about to read 3, iclass 29, count 0 2006.229.04:11:20.52#ibcon#read 3, iclass 29, count 0 2006.229.04:11:20.52#ibcon#about to read 4, iclass 29, count 0 2006.229.04:11:20.52#ibcon#read 4, iclass 29, count 0 2006.229.04:11:20.52#ibcon#about to read 5, iclass 29, count 0 2006.229.04:11:20.52#ibcon#read 5, iclass 29, count 0 2006.229.04:11:20.52#ibcon#about to read 6, iclass 29, count 0 2006.229.04:11:20.52#ibcon#read 6, iclass 29, count 0 2006.229.04:11:20.52#ibcon#end of sib2, iclass 29, count 0 2006.229.04:11:20.52#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:11:20.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:11:20.52#ibcon#[25=BW32\r\n] 2006.229.04:11:20.52#ibcon#*before write, iclass 29, count 0 2006.229.04:11:20.52#ibcon#enter sib2, iclass 29, count 0 2006.229.04:11:20.52#ibcon#flushed, iclass 29, count 0 2006.229.04:11:20.52#ibcon#about to write, iclass 29, count 0 2006.229.04:11:20.52#ibcon#wrote, iclass 29, count 0 2006.229.04:11:20.52#ibcon#about to read 3, iclass 29, count 0 2006.229.04:11:20.55#ibcon#read 3, iclass 29, count 0 2006.229.04:11:20.55#ibcon#about to read 4, iclass 29, count 0 2006.229.04:11:20.55#ibcon#read 4, iclass 29, count 0 2006.229.04:11:20.55#ibcon#about to read 5, iclass 29, count 0 2006.229.04:11:20.55#ibcon#read 5, iclass 29, count 0 2006.229.04:11:20.55#ibcon#about to read 6, iclass 29, count 0 2006.229.04:11:20.55#ibcon#read 6, iclass 29, count 0 2006.229.04:11:20.55#ibcon#end of sib2, iclass 29, count 0 2006.229.04:11:20.55#ibcon#*after write, iclass 29, count 0 2006.229.04:11:20.55#ibcon#*before return 0, iclass 29, count 0 2006.229.04:11:20.55#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:20.55#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:11:20.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:11:20.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:11:20.55$vck44/vbbw=wide 2006.229.04:11:20.55#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.04:11:20.55#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.04:11:20.55#ibcon#ireg 8 cls_cnt 0 2006.229.04:11:20.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:11:20.62#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:11:20.62#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:11:20.62#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:11:20.62#ibcon#first serial, iclass 31, count 0 2006.229.04:11:20.62#ibcon#enter sib2, iclass 31, count 0 2006.229.04:11:20.62#ibcon#flushed, iclass 31, count 0 2006.229.04:11:20.62#ibcon#about to write, iclass 31, count 0 2006.229.04:11:20.62#ibcon#wrote, iclass 31, count 0 2006.229.04:11:20.62#ibcon#about to read 3, iclass 31, count 0 2006.229.04:11:20.64#ibcon#read 3, iclass 31, count 0 2006.229.04:11:20.64#ibcon#about to read 4, iclass 31, count 0 2006.229.04:11:20.64#ibcon#read 4, iclass 31, count 0 2006.229.04:11:20.64#ibcon#about to read 5, iclass 31, count 0 2006.229.04:11:20.64#ibcon#read 5, iclass 31, count 0 2006.229.04:11:20.64#ibcon#about to read 6, iclass 31, count 0 2006.229.04:11:20.64#ibcon#read 6, iclass 31, count 0 2006.229.04:11:20.64#ibcon#end of sib2, iclass 31, count 0 2006.229.04:11:20.64#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:11:20.64#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:11:20.64#ibcon#[27=BW32\r\n] 2006.229.04:11:20.64#ibcon#*before write, iclass 31, count 0 2006.229.04:11:20.64#ibcon#enter sib2, iclass 31, count 0 2006.229.04:11:20.64#ibcon#flushed, iclass 31, count 0 2006.229.04:11:20.64#ibcon#about to write, iclass 31, count 0 2006.229.04:11:20.64#ibcon#wrote, iclass 31, count 0 2006.229.04:11:20.64#ibcon#about to read 3, iclass 31, count 0 2006.229.04:11:20.67#ibcon#read 3, iclass 31, count 0 2006.229.04:11:20.67#ibcon#about to read 4, iclass 31, count 0 2006.229.04:11:20.67#ibcon#read 4, iclass 31, count 0 2006.229.04:11:20.67#ibcon#about to read 5, iclass 31, count 0 2006.229.04:11:20.67#ibcon#read 5, iclass 31, count 0 2006.229.04:11:20.67#ibcon#about to read 6, iclass 31, count 0 2006.229.04:11:20.67#ibcon#read 6, iclass 31, count 0 2006.229.04:11:20.67#ibcon#end of sib2, iclass 31, count 0 2006.229.04:11:20.67#ibcon#*after write, iclass 31, count 0 2006.229.04:11:20.67#ibcon#*before return 0, iclass 31, count 0 2006.229.04:11:20.67#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:11:20.67#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:11:20.67#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:11:20.67#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:11:20.67$setupk4/ifdk4 2006.229.04:11:20.67$ifdk4/lo= 2006.229.04:11:20.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:11:20.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:11:20.67$ifdk4/patch= 2006.229.04:11:20.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:11:20.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:11:20.67$setupk4/!*+20s 2006.229.04:11:27.41#abcon#<5=/05 2.8 4.9 30.42 951000.2\r\n> 2006.229.04:11:27.43#abcon#{5=INTERFACE CLEAR} 2006.229.04:11:27.49#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:11:29.14#trakl#Source acquired 2006.229.04:11:31.14#flagr#flagr/antenna,acquired 2006.229.04:11:35.18$setupk4/"tpicd 2006.229.04:11:35.18$setupk4/echo=off 2006.229.04:11:35.18$setupk4/xlog=off 2006.229.04:11:35.18:!2006.229.04:13:31 2006.229.04:13:31.00:preob 2006.229.04:13:32.14/onsource/TRACKING 2006.229.04:13:32.14:!2006.229.04:13:41 2006.229.04:13:41.00:"tape 2006.229.04:13:41.00:"st=record 2006.229.04:13:41.00:data_valid=on 2006.229.04:13:41.00:midob 2006.229.04:13:41.14/onsource/TRACKING 2006.229.04:13:41.14/wx/30.47,1000.1,94 2006.229.04:13:41.30/cable/+6.4071E-03 2006.229.04:13:42.39/va/01,08,usb,yes,37,40 2006.229.04:13:42.39/va/02,07,usb,yes,40,41 2006.229.04:13:42.39/va/03,06,usb,yes,49,52 2006.229.04:13:42.39/va/04,07,usb,yes,41,43 2006.229.04:13:42.39/va/05,04,usb,yes,37,38 2006.229.04:13:42.39/va/06,04,usb,yes,41,41 2006.229.04:13:42.39/va/07,05,usb,yes,37,37 2006.229.04:13:42.39/va/08,06,usb,yes,27,33 2006.229.04:13:42.62/valo/01,524.99,yes,locked 2006.229.04:13:42.62/valo/02,534.99,yes,locked 2006.229.04:13:42.62/valo/03,564.99,yes,locked 2006.229.04:13:42.62/valo/04,624.99,yes,locked 2006.229.04:13:42.62/valo/05,734.99,yes,locked 2006.229.04:13:42.62/valo/06,814.99,yes,locked 2006.229.04:13:42.62/valo/07,864.99,yes,locked 2006.229.04:13:42.62/valo/08,884.99,yes,locked 2006.229.04:13:43.71/vb/01,04,usb,yes,39,36 2006.229.04:13:43.71/vb/02,04,usb,yes,41,41 2006.229.04:13:43.71/vb/03,04,usb,yes,38,42 2006.229.04:13:43.71/vb/04,04,usb,yes,43,42 2006.229.04:13:43.71/vb/05,04,usb,yes,34,37 2006.229.04:13:43.71/vb/06,04,usb,yes,39,35 2006.229.04:13:43.71/vb/07,04,usb,yes,39,39 2006.229.04:13:43.71/vb/08,04,usb,yes,35,40 2006.229.04:13:43.94/vblo/01,629.99,yes,locked 2006.229.04:13:43.94/vblo/02,634.99,yes,locked 2006.229.04:13:43.94/vblo/03,649.99,yes,locked 2006.229.04:13:43.94/vblo/04,679.99,yes,locked 2006.229.04:13:43.94/vblo/05,709.99,yes,locked 2006.229.04:13:43.94/vblo/06,719.99,yes,locked 2006.229.04:13:43.94/vblo/07,734.99,yes,locked 2006.229.04:13:43.94/vblo/08,744.99,yes,locked 2006.229.04:13:44.09/vabw/8 2006.229.04:13:44.24/vbbw/8 2006.229.04:13:44.33/xfe/off,on,12.0 2006.229.04:13:44.72/ifatt/23,28,28,28 2006.229.04:13:45.08/fmout-gps/S +4.46E-07 2006.229.04:13:45.12:!2006.229.04:15:31 2006.229.04:15:31.00:data_valid=off 2006.229.04:15:31.00:"et 2006.229.04:15:31.00:!+3s 2006.229.04:15:34.01:"tape 2006.229.04:15:34.01:postob 2006.229.04:15:34.18/cable/+6.4048E-03 2006.229.04:15:34.18/wx/30.49,1000.1,93 2006.229.04:15:35.08/fmout-gps/S +4.47E-07 2006.229.04:15:35.08:scan_name=229-0421,jd0608,40 2006.229.04:15:35.08:source=4c39.25,092703.01,390220.9,2000.0,ccw 2006.229.04:15:36.14#flagr#flagr/antenna,new-source 2006.229.04:15:36.14:checkk5 2006.229.04:15:36.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:15:36.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:15:37.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:15:37.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:15:38.13/chk_obsdata//k5ts1/T2290413??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.04:15:38.53/chk_obsdata//k5ts2/T2290413??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.04:15:38.91/chk_obsdata//k5ts3/T2290413??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.04:15:39.34/chk_obsdata//k5ts4/T2290413??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.04:15:40.06/k5log//k5ts1_log_newline 2006.229.04:15:40.76/k5log//k5ts2_log_newline 2006.229.04:15:41.46/k5log//k5ts3_log_newline 2006.229.04:15:42.17/k5log//k5ts4_log_newline 2006.229.04:15:42.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:15:42.19:setupk4=1 2006.229.04:15:42.19$setupk4/echo=on 2006.229.04:15:42.19$setupk4/pcalon 2006.229.04:15:42.19$pcalon/"no phase cal control is implemented here 2006.229.04:15:42.19$setupk4/"tpicd=stop 2006.229.04:15:42.19$setupk4/"rec=synch_on 2006.229.04:15:42.19$setupk4/"rec_mode=128 2006.229.04:15:42.19$setupk4/!* 2006.229.04:15:42.19$setupk4/recpk4 2006.229.04:15:42.19$recpk4/recpatch= 2006.229.04:15:42.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:15:42.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:15:42.19$setupk4/vck44 2006.229.04:15:42.19$vck44/valo=1,524.99 2006.229.04:15:42.19#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.04:15:42.19#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.04:15:42.19#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:42.19#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:42.19#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:42.19#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:42.19#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:15:42.19#ibcon#first serial, iclass 32, count 0 2006.229.04:15:42.19#ibcon#enter sib2, iclass 32, count 0 2006.229.04:15:42.19#ibcon#flushed, iclass 32, count 0 2006.229.04:15:42.19#ibcon#about to write, iclass 32, count 0 2006.229.04:15:42.19#ibcon#wrote, iclass 32, count 0 2006.229.04:15:42.20#ibcon#about to read 3, iclass 32, count 0 2006.229.04:15:42.21#ibcon#read 3, iclass 32, count 0 2006.229.04:15:42.21#ibcon#about to read 4, iclass 32, count 0 2006.229.04:15:42.21#ibcon#read 4, iclass 32, count 0 2006.229.04:15:42.21#ibcon#about to read 5, iclass 32, count 0 2006.229.04:15:42.21#ibcon#read 5, iclass 32, count 0 2006.229.04:15:42.21#ibcon#about to read 6, iclass 32, count 0 2006.229.04:15:42.21#ibcon#read 6, iclass 32, count 0 2006.229.04:15:42.21#ibcon#end of sib2, iclass 32, count 0 2006.229.04:15:42.21#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:15:42.21#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:15:42.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:15:42.21#ibcon#*before write, iclass 32, count 0 2006.229.04:15:42.21#ibcon#enter sib2, iclass 32, count 0 2006.229.04:15:42.21#ibcon#flushed, iclass 32, count 0 2006.229.04:15:42.21#ibcon#about to write, iclass 32, count 0 2006.229.04:15:42.21#ibcon#wrote, iclass 32, count 0 2006.229.04:15:42.21#ibcon#about to read 3, iclass 32, count 0 2006.229.04:15:42.26#ibcon#read 3, iclass 32, count 0 2006.229.04:15:42.26#ibcon#about to read 4, iclass 32, count 0 2006.229.04:15:42.26#ibcon#read 4, iclass 32, count 0 2006.229.04:15:42.26#ibcon#about to read 5, iclass 32, count 0 2006.229.04:15:42.26#ibcon#read 5, iclass 32, count 0 2006.229.04:15:42.26#ibcon#about to read 6, iclass 32, count 0 2006.229.04:15:42.26#ibcon#read 6, iclass 32, count 0 2006.229.04:15:42.26#ibcon#end of sib2, iclass 32, count 0 2006.229.04:15:42.26#ibcon#*after write, iclass 32, count 0 2006.229.04:15:42.26#ibcon#*before return 0, iclass 32, count 0 2006.229.04:15:42.26#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:42.26#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:42.26#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:15:42.26#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:15:42.26$vck44/va=1,8 2006.229.04:15:42.26#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.04:15:42.26#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.04:15:42.26#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:42.26#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:42.26#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:42.26#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:42.26#ibcon#enter wrdev, iclass 34, count 2 2006.229.04:15:42.26#ibcon#first serial, iclass 34, count 2 2006.229.04:15:42.26#ibcon#enter sib2, iclass 34, count 2 2006.229.04:15:42.26#ibcon#flushed, iclass 34, count 2 2006.229.04:15:42.26#ibcon#about to write, iclass 34, count 2 2006.229.04:15:42.26#ibcon#wrote, iclass 34, count 2 2006.229.04:15:42.26#ibcon#about to read 3, iclass 34, count 2 2006.229.04:15:42.28#ibcon#read 3, iclass 34, count 2 2006.229.04:15:42.28#ibcon#about to read 4, iclass 34, count 2 2006.229.04:15:42.28#ibcon#read 4, iclass 34, count 2 2006.229.04:15:42.28#ibcon#about to read 5, iclass 34, count 2 2006.229.04:15:42.28#ibcon#read 5, iclass 34, count 2 2006.229.04:15:42.28#ibcon#about to read 6, iclass 34, count 2 2006.229.04:15:42.28#ibcon#read 6, iclass 34, count 2 2006.229.04:15:42.28#ibcon#end of sib2, iclass 34, count 2 2006.229.04:15:42.28#ibcon#*mode == 0, iclass 34, count 2 2006.229.04:15:42.28#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.04:15:42.28#ibcon#[25=AT01-08\r\n] 2006.229.04:15:42.28#ibcon#*before write, iclass 34, count 2 2006.229.04:15:42.28#ibcon#enter sib2, iclass 34, count 2 2006.229.04:15:42.28#ibcon#flushed, iclass 34, count 2 2006.229.04:15:42.28#ibcon#about to write, iclass 34, count 2 2006.229.04:15:42.28#ibcon#wrote, iclass 34, count 2 2006.229.04:15:42.28#ibcon#about to read 3, iclass 34, count 2 2006.229.04:15:42.31#ibcon#read 3, iclass 34, count 2 2006.229.04:15:42.31#ibcon#about to read 4, iclass 34, count 2 2006.229.04:15:42.31#ibcon#read 4, iclass 34, count 2 2006.229.04:15:42.31#ibcon#about to read 5, iclass 34, count 2 2006.229.04:15:42.31#ibcon#read 5, iclass 34, count 2 2006.229.04:15:42.31#ibcon#about to read 6, iclass 34, count 2 2006.229.04:15:42.31#ibcon#read 6, iclass 34, count 2 2006.229.04:15:42.31#ibcon#end of sib2, iclass 34, count 2 2006.229.04:15:42.31#ibcon#*after write, iclass 34, count 2 2006.229.04:15:42.31#ibcon#*before return 0, iclass 34, count 2 2006.229.04:15:42.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:42.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:42.31#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.04:15:42.31#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:42.31#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:42.43#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:42.43#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:42.43#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:15:42.43#ibcon#first serial, iclass 34, count 0 2006.229.04:15:42.43#ibcon#enter sib2, iclass 34, count 0 2006.229.04:15:42.43#ibcon#flushed, iclass 34, count 0 2006.229.04:15:42.43#ibcon#about to write, iclass 34, count 0 2006.229.04:15:42.43#ibcon#wrote, iclass 34, count 0 2006.229.04:15:42.43#ibcon#about to read 3, iclass 34, count 0 2006.229.04:15:42.45#ibcon#read 3, iclass 34, count 0 2006.229.04:15:42.45#ibcon#about to read 4, iclass 34, count 0 2006.229.04:15:42.45#ibcon#read 4, iclass 34, count 0 2006.229.04:15:42.45#ibcon#about to read 5, iclass 34, count 0 2006.229.04:15:42.45#ibcon#read 5, iclass 34, count 0 2006.229.04:15:42.45#ibcon#about to read 6, iclass 34, count 0 2006.229.04:15:42.45#ibcon#read 6, iclass 34, count 0 2006.229.04:15:42.45#ibcon#end of sib2, iclass 34, count 0 2006.229.04:15:42.45#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:15:42.45#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:15:42.45#ibcon#[25=USB\r\n] 2006.229.04:15:42.45#ibcon#*before write, iclass 34, count 0 2006.229.04:15:42.45#ibcon#enter sib2, iclass 34, count 0 2006.229.04:15:42.45#ibcon#flushed, iclass 34, count 0 2006.229.04:15:42.45#ibcon#about to write, iclass 34, count 0 2006.229.04:15:42.45#ibcon#wrote, iclass 34, count 0 2006.229.04:15:42.45#ibcon#about to read 3, iclass 34, count 0 2006.229.04:15:42.48#ibcon#read 3, iclass 34, count 0 2006.229.04:15:42.48#ibcon#about to read 4, iclass 34, count 0 2006.229.04:15:42.48#ibcon#read 4, iclass 34, count 0 2006.229.04:15:42.48#ibcon#about to read 5, iclass 34, count 0 2006.229.04:15:42.48#ibcon#read 5, iclass 34, count 0 2006.229.04:15:42.48#ibcon#about to read 6, iclass 34, count 0 2006.229.04:15:42.48#ibcon#read 6, iclass 34, count 0 2006.229.04:15:42.48#ibcon#end of sib2, iclass 34, count 0 2006.229.04:15:42.48#ibcon#*after write, iclass 34, count 0 2006.229.04:15:42.48#ibcon#*before return 0, iclass 34, count 0 2006.229.04:15:42.48#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:42.48#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:42.48#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:15:42.48#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:15:42.48$vck44/valo=2,534.99 2006.229.04:15:42.48#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:15:42.48#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:15:42.48#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:42.48#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:42.48#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:42.48#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:42.48#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:15:42.48#ibcon#first serial, iclass 36, count 0 2006.229.04:15:42.48#ibcon#enter sib2, iclass 36, count 0 2006.229.04:15:42.48#ibcon#flushed, iclass 36, count 0 2006.229.04:15:42.48#ibcon#about to write, iclass 36, count 0 2006.229.04:15:42.48#ibcon#wrote, iclass 36, count 0 2006.229.04:15:42.48#ibcon#about to read 3, iclass 36, count 0 2006.229.04:15:42.50#ibcon#read 3, iclass 36, count 0 2006.229.04:15:42.50#ibcon#about to read 4, iclass 36, count 0 2006.229.04:15:42.50#ibcon#read 4, iclass 36, count 0 2006.229.04:15:42.50#ibcon#about to read 5, iclass 36, count 0 2006.229.04:15:42.50#ibcon#read 5, iclass 36, count 0 2006.229.04:15:42.50#ibcon#about to read 6, iclass 36, count 0 2006.229.04:15:42.50#ibcon#read 6, iclass 36, count 0 2006.229.04:15:42.50#ibcon#end of sib2, iclass 36, count 0 2006.229.04:15:42.50#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:15:42.50#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:15:42.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:15:42.50#ibcon#*before write, iclass 36, count 0 2006.229.04:15:42.50#ibcon#enter sib2, iclass 36, count 0 2006.229.04:15:42.50#ibcon#flushed, iclass 36, count 0 2006.229.04:15:42.50#ibcon#about to write, iclass 36, count 0 2006.229.04:15:42.50#ibcon#wrote, iclass 36, count 0 2006.229.04:15:42.50#ibcon#about to read 3, iclass 36, count 0 2006.229.04:15:42.54#ibcon#read 3, iclass 36, count 0 2006.229.04:15:42.54#ibcon#about to read 4, iclass 36, count 0 2006.229.04:15:42.54#ibcon#read 4, iclass 36, count 0 2006.229.04:15:42.54#ibcon#about to read 5, iclass 36, count 0 2006.229.04:15:42.54#ibcon#read 5, iclass 36, count 0 2006.229.04:15:42.54#ibcon#about to read 6, iclass 36, count 0 2006.229.04:15:42.54#ibcon#read 6, iclass 36, count 0 2006.229.04:15:42.54#ibcon#end of sib2, iclass 36, count 0 2006.229.04:15:42.54#ibcon#*after write, iclass 36, count 0 2006.229.04:15:42.54#ibcon#*before return 0, iclass 36, count 0 2006.229.04:15:42.54#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:42.54#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:42.54#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:15:42.54#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:15:42.54$vck44/va=2,7 2006.229.04:15:42.54#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.04:15:42.54#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.04:15:42.54#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:42.54#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:42.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:42.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:42.60#ibcon#enter wrdev, iclass 38, count 2 2006.229.04:15:42.60#ibcon#first serial, iclass 38, count 2 2006.229.04:15:42.60#ibcon#enter sib2, iclass 38, count 2 2006.229.04:15:42.60#ibcon#flushed, iclass 38, count 2 2006.229.04:15:42.60#ibcon#about to write, iclass 38, count 2 2006.229.04:15:42.60#ibcon#wrote, iclass 38, count 2 2006.229.04:15:42.60#ibcon#about to read 3, iclass 38, count 2 2006.229.04:15:42.62#ibcon#read 3, iclass 38, count 2 2006.229.04:15:42.62#ibcon#about to read 4, iclass 38, count 2 2006.229.04:15:42.62#ibcon#read 4, iclass 38, count 2 2006.229.04:15:42.62#ibcon#about to read 5, iclass 38, count 2 2006.229.04:15:42.62#ibcon#read 5, iclass 38, count 2 2006.229.04:15:42.62#ibcon#about to read 6, iclass 38, count 2 2006.229.04:15:42.62#ibcon#read 6, iclass 38, count 2 2006.229.04:15:42.62#ibcon#end of sib2, iclass 38, count 2 2006.229.04:15:42.62#ibcon#*mode == 0, iclass 38, count 2 2006.229.04:15:42.62#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.04:15:42.62#ibcon#[25=AT02-07\r\n] 2006.229.04:15:42.62#ibcon#*before write, iclass 38, count 2 2006.229.04:15:42.62#ibcon#enter sib2, iclass 38, count 2 2006.229.04:15:42.62#ibcon#flushed, iclass 38, count 2 2006.229.04:15:42.62#ibcon#about to write, iclass 38, count 2 2006.229.04:15:42.62#ibcon#wrote, iclass 38, count 2 2006.229.04:15:42.62#ibcon#about to read 3, iclass 38, count 2 2006.229.04:15:42.65#ibcon#read 3, iclass 38, count 2 2006.229.04:15:42.65#ibcon#about to read 4, iclass 38, count 2 2006.229.04:15:42.65#ibcon#read 4, iclass 38, count 2 2006.229.04:15:42.65#ibcon#about to read 5, iclass 38, count 2 2006.229.04:15:42.65#ibcon#read 5, iclass 38, count 2 2006.229.04:15:42.65#ibcon#about to read 6, iclass 38, count 2 2006.229.04:15:42.65#ibcon#read 6, iclass 38, count 2 2006.229.04:15:42.65#ibcon#end of sib2, iclass 38, count 2 2006.229.04:15:42.65#ibcon#*after write, iclass 38, count 2 2006.229.04:15:42.65#ibcon#*before return 0, iclass 38, count 2 2006.229.04:15:42.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:42.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:42.65#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.04:15:42.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:42.65#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:42.77#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:42.77#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:42.77#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:15:42.77#ibcon#first serial, iclass 38, count 0 2006.229.04:15:42.77#ibcon#enter sib2, iclass 38, count 0 2006.229.04:15:42.77#ibcon#flushed, iclass 38, count 0 2006.229.04:15:42.77#ibcon#about to write, iclass 38, count 0 2006.229.04:15:42.77#ibcon#wrote, iclass 38, count 0 2006.229.04:15:42.77#ibcon#about to read 3, iclass 38, count 0 2006.229.04:15:42.79#ibcon#read 3, iclass 38, count 0 2006.229.04:15:42.79#ibcon#about to read 4, iclass 38, count 0 2006.229.04:15:42.79#ibcon#read 4, iclass 38, count 0 2006.229.04:15:42.79#ibcon#about to read 5, iclass 38, count 0 2006.229.04:15:42.79#ibcon#read 5, iclass 38, count 0 2006.229.04:15:42.79#ibcon#about to read 6, iclass 38, count 0 2006.229.04:15:42.79#ibcon#read 6, iclass 38, count 0 2006.229.04:15:42.79#ibcon#end of sib2, iclass 38, count 0 2006.229.04:15:42.79#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:15:42.79#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:15:42.79#ibcon#[25=USB\r\n] 2006.229.04:15:42.79#ibcon#*before write, iclass 38, count 0 2006.229.04:15:42.79#ibcon#enter sib2, iclass 38, count 0 2006.229.04:15:42.79#ibcon#flushed, iclass 38, count 0 2006.229.04:15:42.79#ibcon#about to write, iclass 38, count 0 2006.229.04:15:42.79#ibcon#wrote, iclass 38, count 0 2006.229.04:15:42.79#ibcon#about to read 3, iclass 38, count 0 2006.229.04:15:42.82#ibcon#read 3, iclass 38, count 0 2006.229.04:15:42.82#ibcon#about to read 4, iclass 38, count 0 2006.229.04:15:42.82#ibcon#read 4, iclass 38, count 0 2006.229.04:15:42.82#ibcon#about to read 5, iclass 38, count 0 2006.229.04:15:42.82#ibcon#read 5, iclass 38, count 0 2006.229.04:15:42.82#ibcon#about to read 6, iclass 38, count 0 2006.229.04:15:42.82#ibcon#read 6, iclass 38, count 0 2006.229.04:15:42.82#ibcon#end of sib2, iclass 38, count 0 2006.229.04:15:42.82#ibcon#*after write, iclass 38, count 0 2006.229.04:15:42.82#ibcon#*before return 0, iclass 38, count 0 2006.229.04:15:42.82#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:42.82#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:42.82#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:15:42.82#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:15:42.82$vck44/valo=3,564.99 2006.229.04:15:42.82#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.04:15:42.82#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.04:15:42.82#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:42.82#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:42.82#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:42.82#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:42.82#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:15:42.82#ibcon#first serial, iclass 40, count 0 2006.229.04:15:42.82#ibcon#enter sib2, iclass 40, count 0 2006.229.04:15:42.82#ibcon#flushed, iclass 40, count 0 2006.229.04:15:42.82#ibcon#about to write, iclass 40, count 0 2006.229.04:15:42.82#ibcon#wrote, iclass 40, count 0 2006.229.04:15:42.82#ibcon#about to read 3, iclass 40, count 0 2006.229.04:15:42.84#ibcon#read 3, iclass 40, count 0 2006.229.04:15:42.84#ibcon#about to read 4, iclass 40, count 0 2006.229.04:15:42.84#ibcon#read 4, iclass 40, count 0 2006.229.04:15:42.84#ibcon#about to read 5, iclass 40, count 0 2006.229.04:15:42.84#ibcon#read 5, iclass 40, count 0 2006.229.04:15:42.84#ibcon#about to read 6, iclass 40, count 0 2006.229.04:15:42.84#ibcon#read 6, iclass 40, count 0 2006.229.04:15:42.84#ibcon#end of sib2, iclass 40, count 0 2006.229.04:15:42.84#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:15:42.84#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:15:42.84#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:15:42.84#ibcon#*before write, iclass 40, count 0 2006.229.04:15:42.84#ibcon#enter sib2, iclass 40, count 0 2006.229.04:15:42.84#ibcon#flushed, iclass 40, count 0 2006.229.04:15:42.84#ibcon#about to write, iclass 40, count 0 2006.229.04:15:42.84#ibcon#wrote, iclass 40, count 0 2006.229.04:15:42.84#ibcon#about to read 3, iclass 40, count 0 2006.229.04:15:42.88#ibcon#read 3, iclass 40, count 0 2006.229.04:15:42.88#ibcon#about to read 4, iclass 40, count 0 2006.229.04:15:42.88#ibcon#read 4, iclass 40, count 0 2006.229.04:15:42.88#ibcon#about to read 5, iclass 40, count 0 2006.229.04:15:42.88#ibcon#read 5, iclass 40, count 0 2006.229.04:15:42.88#ibcon#about to read 6, iclass 40, count 0 2006.229.04:15:42.88#ibcon#read 6, iclass 40, count 0 2006.229.04:15:42.88#ibcon#end of sib2, iclass 40, count 0 2006.229.04:15:42.88#ibcon#*after write, iclass 40, count 0 2006.229.04:15:42.88#ibcon#*before return 0, iclass 40, count 0 2006.229.04:15:42.88#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:42.88#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:42.88#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:15:42.88#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:15:42.88$vck44/va=3,6 2006.229.04:15:42.88#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.04:15:42.88#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.04:15:42.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:42.88#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:42.94#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:42.94#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:42.94#ibcon#enter wrdev, iclass 4, count 2 2006.229.04:15:42.94#ibcon#first serial, iclass 4, count 2 2006.229.04:15:42.94#ibcon#enter sib2, iclass 4, count 2 2006.229.04:15:42.94#ibcon#flushed, iclass 4, count 2 2006.229.04:15:42.94#ibcon#about to write, iclass 4, count 2 2006.229.04:15:42.94#ibcon#wrote, iclass 4, count 2 2006.229.04:15:42.94#ibcon#about to read 3, iclass 4, count 2 2006.229.04:15:42.96#ibcon#read 3, iclass 4, count 2 2006.229.04:15:42.96#ibcon#about to read 4, iclass 4, count 2 2006.229.04:15:42.96#ibcon#read 4, iclass 4, count 2 2006.229.04:15:42.96#ibcon#about to read 5, iclass 4, count 2 2006.229.04:15:42.96#ibcon#read 5, iclass 4, count 2 2006.229.04:15:42.96#ibcon#about to read 6, iclass 4, count 2 2006.229.04:15:42.96#ibcon#read 6, iclass 4, count 2 2006.229.04:15:42.96#ibcon#end of sib2, iclass 4, count 2 2006.229.04:15:42.96#ibcon#*mode == 0, iclass 4, count 2 2006.229.04:15:42.96#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.04:15:42.96#ibcon#[25=AT03-06\r\n] 2006.229.04:15:42.96#ibcon#*before write, iclass 4, count 2 2006.229.04:15:42.96#ibcon#enter sib2, iclass 4, count 2 2006.229.04:15:42.96#ibcon#flushed, iclass 4, count 2 2006.229.04:15:42.96#ibcon#about to write, iclass 4, count 2 2006.229.04:15:42.96#ibcon#wrote, iclass 4, count 2 2006.229.04:15:42.96#ibcon#about to read 3, iclass 4, count 2 2006.229.04:15:42.99#ibcon#read 3, iclass 4, count 2 2006.229.04:15:42.99#ibcon#about to read 4, iclass 4, count 2 2006.229.04:15:42.99#ibcon#read 4, iclass 4, count 2 2006.229.04:15:42.99#ibcon#about to read 5, iclass 4, count 2 2006.229.04:15:42.99#ibcon#read 5, iclass 4, count 2 2006.229.04:15:42.99#ibcon#about to read 6, iclass 4, count 2 2006.229.04:15:42.99#ibcon#read 6, iclass 4, count 2 2006.229.04:15:42.99#ibcon#end of sib2, iclass 4, count 2 2006.229.04:15:42.99#ibcon#*after write, iclass 4, count 2 2006.229.04:15:42.99#ibcon#*before return 0, iclass 4, count 2 2006.229.04:15:42.99#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:42.99#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:42.99#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.04:15:42.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:42.99#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:43.11#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:43.11#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:43.11#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:15:43.11#ibcon#first serial, iclass 4, count 0 2006.229.04:15:43.11#ibcon#enter sib2, iclass 4, count 0 2006.229.04:15:43.11#ibcon#flushed, iclass 4, count 0 2006.229.04:15:43.11#ibcon#about to write, iclass 4, count 0 2006.229.04:15:43.11#ibcon#wrote, iclass 4, count 0 2006.229.04:15:43.11#ibcon#about to read 3, iclass 4, count 0 2006.229.04:15:43.13#ibcon#read 3, iclass 4, count 0 2006.229.04:15:43.13#ibcon#about to read 4, iclass 4, count 0 2006.229.04:15:43.13#ibcon#read 4, iclass 4, count 0 2006.229.04:15:43.13#ibcon#about to read 5, iclass 4, count 0 2006.229.04:15:43.13#ibcon#read 5, iclass 4, count 0 2006.229.04:15:43.13#ibcon#about to read 6, iclass 4, count 0 2006.229.04:15:43.13#ibcon#read 6, iclass 4, count 0 2006.229.04:15:43.13#ibcon#end of sib2, iclass 4, count 0 2006.229.04:15:43.13#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:15:43.13#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:15:43.13#ibcon#[25=USB\r\n] 2006.229.04:15:43.13#ibcon#*before write, iclass 4, count 0 2006.229.04:15:43.13#ibcon#enter sib2, iclass 4, count 0 2006.229.04:15:43.13#ibcon#flushed, iclass 4, count 0 2006.229.04:15:43.13#ibcon#about to write, iclass 4, count 0 2006.229.04:15:43.13#ibcon#wrote, iclass 4, count 0 2006.229.04:15:43.13#ibcon#about to read 3, iclass 4, count 0 2006.229.04:15:43.16#ibcon#read 3, iclass 4, count 0 2006.229.04:15:43.16#ibcon#about to read 4, iclass 4, count 0 2006.229.04:15:43.16#ibcon#read 4, iclass 4, count 0 2006.229.04:15:43.16#ibcon#about to read 5, iclass 4, count 0 2006.229.04:15:43.16#ibcon#read 5, iclass 4, count 0 2006.229.04:15:43.16#ibcon#about to read 6, iclass 4, count 0 2006.229.04:15:43.16#ibcon#read 6, iclass 4, count 0 2006.229.04:15:43.16#ibcon#end of sib2, iclass 4, count 0 2006.229.04:15:43.16#ibcon#*after write, iclass 4, count 0 2006.229.04:15:43.16#ibcon#*before return 0, iclass 4, count 0 2006.229.04:15:43.16#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:43.16#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:43.16#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:15:43.16#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:15:43.16$vck44/valo=4,624.99 2006.229.04:15:43.16#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.04:15:43.16#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.04:15:43.16#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:43.16#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:43.16#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:43.16#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:43.16#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:15:43.16#ibcon#first serial, iclass 6, count 0 2006.229.04:15:43.16#ibcon#enter sib2, iclass 6, count 0 2006.229.04:15:43.16#ibcon#flushed, iclass 6, count 0 2006.229.04:15:43.16#ibcon#about to write, iclass 6, count 0 2006.229.04:15:43.16#ibcon#wrote, iclass 6, count 0 2006.229.04:15:43.16#ibcon#about to read 3, iclass 6, count 0 2006.229.04:15:43.18#ibcon#read 3, iclass 6, count 0 2006.229.04:15:43.18#ibcon#about to read 4, iclass 6, count 0 2006.229.04:15:43.18#ibcon#read 4, iclass 6, count 0 2006.229.04:15:43.18#ibcon#about to read 5, iclass 6, count 0 2006.229.04:15:43.18#ibcon#read 5, iclass 6, count 0 2006.229.04:15:43.18#ibcon#about to read 6, iclass 6, count 0 2006.229.04:15:43.18#ibcon#read 6, iclass 6, count 0 2006.229.04:15:43.18#ibcon#end of sib2, iclass 6, count 0 2006.229.04:15:43.18#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:15:43.18#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:15:43.18#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:15:43.18#ibcon#*before write, iclass 6, count 0 2006.229.04:15:43.18#ibcon#enter sib2, iclass 6, count 0 2006.229.04:15:43.18#ibcon#flushed, iclass 6, count 0 2006.229.04:15:43.18#ibcon#about to write, iclass 6, count 0 2006.229.04:15:43.18#ibcon#wrote, iclass 6, count 0 2006.229.04:15:43.18#ibcon#about to read 3, iclass 6, count 0 2006.229.04:15:43.22#ibcon#read 3, iclass 6, count 0 2006.229.04:15:43.22#ibcon#about to read 4, iclass 6, count 0 2006.229.04:15:43.22#ibcon#read 4, iclass 6, count 0 2006.229.04:15:43.22#ibcon#about to read 5, iclass 6, count 0 2006.229.04:15:43.22#ibcon#read 5, iclass 6, count 0 2006.229.04:15:43.22#ibcon#about to read 6, iclass 6, count 0 2006.229.04:15:43.22#ibcon#read 6, iclass 6, count 0 2006.229.04:15:43.22#ibcon#end of sib2, iclass 6, count 0 2006.229.04:15:43.22#ibcon#*after write, iclass 6, count 0 2006.229.04:15:43.22#ibcon#*before return 0, iclass 6, count 0 2006.229.04:15:43.22#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:43.22#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:43.22#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:15:43.22#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:15:43.22$vck44/va=4,7 2006.229.04:15:43.22#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.04:15:43.22#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.04:15:43.22#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:43.22#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:43.28#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:43.28#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:43.28#ibcon#enter wrdev, iclass 10, count 2 2006.229.04:15:43.28#ibcon#first serial, iclass 10, count 2 2006.229.04:15:43.28#ibcon#enter sib2, iclass 10, count 2 2006.229.04:15:43.28#ibcon#flushed, iclass 10, count 2 2006.229.04:15:43.28#ibcon#about to write, iclass 10, count 2 2006.229.04:15:43.28#ibcon#wrote, iclass 10, count 2 2006.229.04:15:43.28#ibcon#about to read 3, iclass 10, count 2 2006.229.04:15:43.30#ibcon#read 3, iclass 10, count 2 2006.229.04:15:43.30#ibcon#about to read 4, iclass 10, count 2 2006.229.04:15:43.30#ibcon#read 4, iclass 10, count 2 2006.229.04:15:43.30#ibcon#about to read 5, iclass 10, count 2 2006.229.04:15:43.30#ibcon#read 5, iclass 10, count 2 2006.229.04:15:43.30#ibcon#about to read 6, iclass 10, count 2 2006.229.04:15:43.30#ibcon#read 6, iclass 10, count 2 2006.229.04:15:43.30#ibcon#end of sib2, iclass 10, count 2 2006.229.04:15:43.30#ibcon#*mode == 0, iclass 10, count 2 2006.229.04:15:43.30#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.04:15:43.30#ibcon#[25=AT04-07\r\n] 2006.229.04:15:43.30#ibcon#*before write, iclass 10, count 2 2006.229.04:15:43.30#ibcon#enter sib2, iclass 10, count 2 2006.229.04:15:43.30#ibcon#flushed, iclass 10, count 2 2006.229.04:15:43.30#ibcon#about to write, iclass 10, count 2 2006.229.04:15:43.30#ibcon#wrote, iclass 10, count 2 2006.229.04:15:43.30#ibcon#about to read 3, iclass 10, count 2 2006.229.04:15:43.33#ibcon#read 3, iclass 10, count 2 2006.229.04:15:43.33#ibcon#about to read 4, iclass 10, count 2 2006.229.04:15:43.33#ibcon#read 4, iclass 10, count 2 2006.229.04:15:43.33#ibcon#about to read 5, iclass 10, count 2 2006.229.04:15:43.33#ibcon#read 5, iclass 10, count 2 2006.229.04:15:43.33#ibcon#about to read 6, iclass 10, count 2 2006.229.04:15:43.33#ibcon#read 6, iclass 10, count 2 2006.229.04:15:43.33#ibcon#end of sib2, iclass 10, count 2 2006.229.04:15:43.33#ibcon#*after write, iclass 10, count 2 2006.229.04:15:43.33#ibcon#*before return 0, iclass 10, count 2 2006.229.04:15:43.33#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:43.33#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:43.33#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.04:15:43.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:43.33#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:43.45#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:43.45#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:43.45#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:15:43.45#ibcon#first serial, iclass 10, count 0 2006.229.04:15:43.45#ibcon#enter sib2, iclass 10, count 0 2006.229.04:15:43.45#ibcon#flushed, iclass 10, count 0 2006.229.04:15:43.45#ibcon#about to write, iclass 10, count 0 2006.229.04:15:43.45#ibcon#wrote, iclass 10, count 0 2006.229.04:15:43.45#ibcon#about to read 3, iclass 10, count 0 2006.229.04:15:43.47#ibcon#read 3, iclass 10, count 0 2006.229.04:15:43.47#ibcon#about to read 4, iclass 10, count 0 2006.229.04:15:43.47#ibcon#read 4, iclass 10, count 0 2006.229.04:15:43.47#ibcon#about to read 5, iclass 10, count 0 2006.229.04:15:43.47#ibcon#read 5, iclass 10, count 0 2006.229.04:15:43.47#ibcon#about to read 6, iclass 10, count 0 2006.229.04:15:43.47#ibcon#read 6, iclass 10, count 0 2006.229.04:15:43.47#ibcon#end of sib2, iclass 10, count 0 2006.229.04:15:43.47#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:15:43.47#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:15:43.47#ibcon#[25=USB\r\n] 2006.229.04:15:43.47#ibcon#*before write, iclass 10, count 0 2006.229.04:15:43.47#ibcon#enter sib2, iclass 10, count 0 2006.229.04:15:43.47#ibcon#flushed, iclass 10, count 0 2006.229.04:15:43.47#ibcon#about to write, iclass 10, count 0 2006.229.04:15:43.47#ibcon#wrote, iclass 10, count 0 2006.229.04:15:43.47#ibcon#about to read 3, iclass 10, count 0 2006.229.04:15:43.50#ibcon#read 3, iclass 10, count 0 2006.229.04:15:43.50#ibcon#about to read 4, iclass 10, count 0 2006.229.04:15:43.50#ibcon#read 4, iclass 10, count 0 2006.229.04:15:43.50#ibcon#about to read 5, iclass 10, count 0 2006.229.04:15:43.50#ibcon#read 5, iclass 10, count 0 2006.229.04:15:43.50#ibcon#about to read 6, iclass 10, count 0 2006.229.04:15:43.50#ibcon#read 6, iclass 10, count 0 2006.229.04:15:43.50#ibcon#end of sib2, iclass 10, count 0 2006.229.04:15:43.50#ibcon#*after write, iclass 10, count 0 2006.229.04:15:43.50#ibcon#*before return 0, iclass 10, count 0 2006.229.04:15:43.50#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:43.50#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:43.50#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:15:43.50#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:15:43.50$vck44/valo=5,734.99 2006.229.04:15:43.50#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:15:43.50#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:15:43.50#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:43.50#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:43.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:43.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:43.50#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:15:43.50#ibcon#first serial, iclass 12, count 0 2006.229.04:15:43.50#ibcon#enter sib2, iclass 12, count 0 2006.229.04:15:43.50#ibcon#flushed, iclass 12, count 0 2006.229.04:15:43.50#ibcon#about to write, iclass 12, count 0 2006.229.04:15:43.50#ibcon#wrote, iclass 12, count 0 2006.229.04:15:43.50#ibcon#about to read 3, iclass 12, count 0 2006.229.04:15:43.52#ibcon#read 3, iclass 12, count 0 2006.229.04:15:43.52#ibcon#about to read 4, iclass 12, count 0 2006.229.04:15:43.52#ibcon#read 4, iclass 12, count 0 2006.229.04:15:43.52#ibcon#about to read 5, iclass 12, count 0 2006.229.04:15:43.52#ibcon#read 5, iclass 12, count 0 2006.229.04:15:43.52#ibcon#about to read 6, iclass 12, count 0 2006.229.04:15:43.52#ibcon#read 6, iclass 12, count 0 2006.229.04:15:43.52#ibcon#end of sib2, iclass 12, count 0 2006.229.04:15:43.52#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:15:43.52#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:15:43.52#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:15:43.52#ibcon#*before write, iclass 12, count 0 2006.229.04:15:43.52#ibcon#enter sib2, iclass 12, count 0 2006.229.04:15:43.52#ibcon#flushed, iclass 12, count 0 2006.229.04:15:43.52#ibcon#about to write, iclass 12, count 0 2006.229.04:15:43.52#ibcon#wrote, iclass 12, count 0 2006.229.04:15:43.52#ibcon#about to read 3, iclass 12, count 0 2006.229.04:15:43.56#ibcon#read 3, iclass 12, count 0 2006.229.04:15:43.56#ibcon#about to read 4, iclass 12, count 0 2006.229.04:15:43.56#ibcon#read 4, iclass 12, count 0 2006.229.04:15:43.56#ibcon#about to read 5, iclass 12, count 0 2006.229.04:15:43.56#ibcon#read 5, iclass 12, count 0 2006.229.04:15:43.56#ibcon#about to read 6, iclass 12, count 0 2006.229.04:15:43.56#ibcon#read 6, iclass 12, count 0 2006.229.04:15:43.56#ibcon#end of sib2, iclass 12, count 0 2006.229.04:15:43.56#ibcon#*after write, iclass 12, count 0 2006.229.04:15:43.56#ibcon#*before return 0, iclass 12, count 0 2006.229.04:15:43.56#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:43.56#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:43.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:15:43.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:15:43.56$vck44/va=5,4 2006.229.04:15:43.56#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.04:15:43.56#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.04:15:43.56#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:43.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:43.62#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:43.62#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:43.62#ibcon#enter wrdev, iclass 14, count 2 2006.229.04:15:43.62#ibcon#first serial, iclass 14, count 2 2006.229.04:15:43.62#ibcon#enter sib2, iclass 14, count 2 2006.229.04:15:43.62#ibcon#flushed, iclass 14, count 2 2006.229.04:15:43.62#ibcon#about to write, iclass 14, count 2 2006.229.04:15:43.62#ibcon#wrote, iclass 14, count 2 2006.229.04:15:43.62#ibcon#about to read 3, iclass 14, count 2 2006.229.04:15:43.64#ibcon#read 3, iclass 14, count 2 2006.229.04:15:43.64#ibcon#about to read 4, iclass 14, count 2 2006.229.04:15:43.64#ibcon#read 4, iclass 14, count 2 2006.229.04:15:43.64#ibcon#about to read 5, iclass 14, count 2 2006.229.04:15:43.64#ibcon#read 5, iclass 14, count 2 2006.229.04:15:43.64#ibcon#about to read 6, iclass 14, count 2 2006.229.04:15:43.64#ibcon#read 6, iclass 14, count 2 2006.229.04:15:43.64#ibcon#end of sib2, iclass 14, count 2 2006.229.04:15:43.64#ibcon#*mode == 0, iclass 14, count 2 2006.229.04:15:43.64#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.04:15:43.64#ibcon#[25=AT05-04\r\n] 2006.229.04:15:43.64#ibcon#*before write, iclass 14, count 2 2006.229.04:15:43.64#ibcon#enter sib2, iclass 14, count 2 2006.229.04:15:43.64#ibcon#flushed, iclass 14, count 2 2006.229.04:15:43.64#ibcon#about to write, iclass 14, count 2 2006.229.04:15:43.64#ibcon#wrote, iclass 14, count 2 2006.229.04:15:43.64#ibcon#about to read 3, iclass 14, count 2 2006.229.04:15:43.67#ibcon#read 3, iclass 14, count 2 2006.229.04:15:43.67#ibcon#about to read 4, iclass 14, count 2 2006.229.04:15:43.67#ibcon#read 4, iclass 14, count 2 2006.229.04:15:43.67#ibcon#about to read 5, iclass 14, count 2 2006.229.04:15:43.67#ibcon#read 5, iclass 14, count 2 2006.229.04:15:43.67#ibcon#about to read 6, iclass 14, count 2 2006.229.04:15:43.67#ibcon#read 6, iclass 14, count 2 2006.229.04:15:43.67#ibcon#end of sib2, iclass 14, count 2 2006.229.04:15:43.67#ibcon#*after write, iclass 14, count 2 2006.229.04:15:43.67#ibcon#*before return 0, iclass 14, count 2 2006.229.04:15:43.67#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:43.67#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:43.67#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.04:15:43.67#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:43.67#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:43.79#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:43.79#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:43.79#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:15:43.79#ibcon#first serial, iclass 14, count 0 2006.229.04:15:43.79#ibcon#enter sib2, iclass 14, count 0 2006.229.04:15:43.79#ibcon#flushed, iclass 14, count 0 2006.229.04:15:43.79#ibcon#about to write, iclass 14, count 0 2006.229.04:15:43.79#ibcon#wrote, iclass 14, count 0 2006.229.04:15:43.79#ibcon#about to read 3, iclass 14, count 0 2006.229.04:15:43.81#ibcon#read 3, iclass 14, count 0 2006.229.04:15:43.81#ibcon#about to read 4, iclass 14, count 0 2006.229.04:15:43.81#ibcon#read 4, iclass 14, count 0 2006.229.04:15:43.81#ibcon#about to read 5, iclass 14, count 0 2006.229.04:15:43.81#ibcon#read 5, iclass 14, count 0 2006.229.04:15:43.81#ibcon#about to read 6, iclass 14, count 0 2006.229.04:15:43.81#ibcon#read 6, iclass 14, count 0 2006.229.04:15:43.81#ibcon#end of sib2, iclass 14, count 0 2006.229.04:15:43.81#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:15:43.81#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:15:43.81#ibcon#[25=USB\r\n] 2006.229.04:15:43.81#ibcon#*before write, iclass 14, count 0 2006.229.04:15:43.81#ibcon#enter sib2, iclass 14, count 0 2006.229.04:15:43.81#ibcon#flushed, iclass 14, count 0 2006.229.04:15:43.81#ibcon#about to write, iclass 14, count 0 2006.229.04:15:43.81#ibcon#wrote, iclass 14, count 0 2006.229.04:15:43.81#ibcon#about to read 3, iclass 14, count 0 2006.229.04:15:43.84#ibcon#read 3, iclass 14, count 0 2006.229.04:15:43.84#ibcon#about to read 4, iclass 14, count 0 2006.229.04:15:43.84#ibcon#read 4, iclass 14, count 0 2006.229.04:15:43.84#ibcon#about to read 5, iclass 14, count 0 2006.229.04:15:43.84#ibcon#read 5, iclass 14, count 0 2006.229.04:15:43.84#ibcon#about to read 6, iclass 14, count 0 2006.229.04:15:43.84#ibcon#read 6, iclass 14, count 0 2006.229.04:15:43.84#ibcon#end of sib2, iclass 14, count 0 2006.229.04:15:43.84#ibcon#*after write, iclass 14, count 0 2006.229.04:15:43.84#ibcon#*before return 0, iclass 14, count 0 2006.229.04:15:43.84#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:43.84#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:43.84#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:15:43.84#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:15:43.84$vck44/valo=6,814.99 2006.229.04:15:43.84#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.04:15:43.84#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.04:15:43.84#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:43.84#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:43.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:43.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:43.84#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:15:43.84#ibcon#first serial, iclass 16, count 0 2006.229.04:15:43.84#ibcon#enter sib2, iclass 16, count 0 2006.229.04:15:43.84#ibcon#flushed, iclass 16, count 0 2006.229.04:15:43.84#ibcon#about to write, iclass 16, count 0 2006.229.04:15:43.84#ibcon#wrote, iclass 16, count 0 2006.229.04:15:43.84#ibcon#about to read 3, iclass 16, count 0 2006.229.04:15:43.86#ibcon#read 3, iclass 16, count 0 2006.229.04:15:43.86#ibcon#about to read 4, iclass 16, count 0 2006.229.04:15:43.86#ibcon#read 4, iclass 16, count 0 2006.229.04:15:43.86#ibcon#about to read 5, iclass 16, count 0 2006.229.04:15:43.86#ibcon#read 5, iclass 16, count 0 2006.229.04:15:43.86#ibcon#about to read 6, iclass 16, count 0 2006.229.04:15:43.86#ibcon#read 6, iclass 16, count 0 2006.229.04:15:43.86#ibcon#end of sib2, iclass 16, count 0 2006.229.04:15:43.86#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:15:43.86#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:15:43.86#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:15:43.86#ibcon#*before write, iclass 16, count 0 2006.229.04:15:43.86#ibcon#enter sib2, iclass 16, count 0 2006.229.04:15:43.86#ibcon#flushed, iclass 16, count 0 2006.229.04:15:43.86#ibcon#about to write, iclass 16, count 0 2006.229.04:15:43.86#ibcon#wrote, iclass 16, count 0 2006.229.04:15:43.86#ibcon#about to read 3, iclass 16, count 0 2006.229.04:15:43.90#ibcon#read 3, iclass 16, count 0 2006.229.04:15:43.90#ibcon#about to read 4, iclass 16, count 0 2006.229.04:15:43.90#ibcon#read 4, iclass 16, count 0 2006.229.04:15:43.90#ibcon#about to read 5, iclass 16, count 0 2006.229.04:15:43.90#ibcon#read 5, iclass 16, count 0 2006.229.04:15:43.90#ibcon#about to read 6, iclass 16, count 0 2006.229.04:15:43.90#ibcon#read 6, iclass 16, count 0 2006.229.04:15:43.90#ibcon#end of sib2, iclass 16, count 0 2006.229.04:15:43.90#ibcon#*after write, iclass 16, count 0 2006.229.04:15:43.90#ibcon#*before return 0, iclass 16, count 0 2006.229.04:15:43.90#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:43.90#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:43.90#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:15:43.90#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:15:43.90$vck44/va=6,4 2006.229.04:15:43.90#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.04:15:43.90#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.04:15:43.90#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:43.90#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:43.96#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:43.96#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:43.96#ibcon#enter wrdev, iclass 18, count 2 2006.229.04:15:43.96#ibcon#first serial, iclass 18, count 2 2006.229.04:15:43.96#ibcon#enter sib2, iclass 18, count 2 2006.229.04:15:43.96#ibcon#flushed, iclass 18, count 2 2006.229.04:15:43.96#ibcon#about to write, iclass 18, count 2 2006.229.04:15:43.96#ibcon#wrote, iclass 18, count 2 2006.229.04:15:43.96#ibcon#about to read 3, iclass 18, count 2 2006.229.04:15:43.98#ibcon#read 3, iclass 18, count 2 2006.229.04:15:43.98#ibcon#about to read 4, iclass 18, count 2 2006.229.04:15:43.98#ibcon#read 4, iclass 18, count 2 2006.229.04:15:43.98#ibcon#about to read 5, iclass 18, count 2 2006.229.04:15:43.98#ibcon#read 5, iclass 18, count 2 2006.229.04:15:43.98#ibcon#about to read 6, iclass 18, count 2 2006.229.04:15:43.98#ibcon#read 6, iclass 18, count 2 2006.229.04:15:43.98#ibcon#end of sib2, iclass 18, count 2 2006.229.04:15:43.98#ibcon#*mode == 0, iclass 18, count 2 2006.229.04:15:43.98#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.04:15:43.98#ibcon#[25=AT06-04\r\n] 2006.229.04:15:43.98#ibcon#*before write, iclass 18, count 2 2006.229.04:15:43.98#ibcon#enter sib2, iclass 18, count 2 2006.229.04:15:43.98#ibcon#flushed, iclass 18, count 2 2006.229.04:15:43.98#ibcon#about to write, iclass 18, count 2 2006.229.04:15:43.98#ibcon#wrote, iclass 18, count 2 2006.229.04:15:43.98#ibcon#about to read 3, iclass 18, count 2 2006.229.04:15:44.01#ibcon#read 3, iclass 18, count 2 2006.229.04:15:44.01#ibcon#about to read 4, iclass 18, count 2 2006.229.04:15:44.01#ibcon#read 4, iclass 18, count 2 2006.229.04:15:44.01#ibcon#about to read 5, iclass 18, count 2 2006.229.04:15:44.01#ibcon#read 5, iclass 18, count 2 2006.229.04:15:44.01#ibcon#about to read 6, iclass 18, count 2 2006.229.04:15:44.01#ibcon#read 6, iclass 18, count 2 2006.229.04:15:44.01#ibcon#end of sib2, iclass 18, count 2 2006.229.04:15:44.01#ibcon#*after write, iclass 18, count 2 2006.229.04:15:44.01#ibcon#*before return 0, iclass 18, count 2 2006.229.04:15:44.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:44.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:44.01#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.04:15:44.01#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:44.01#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:44.13#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:44.13#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:44.13#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:15:44.13#ibcon#first serial, iclass 18, count 0 2006.229.04:15:44.13#ibcon#enter sib2, iclass 18, count 0 2006.229.04:15:44.13#ibcon#flushed, iclass 18, count 0 2006.229.04:15:44.13#ibcon#about to write, iclass 18, count 0 2006.229.04:15:44.13#ibcon#wrote, iclass 18, count 0 2006.229.04:15:44.13#ibcon#about to read 3, iclass 18, count 0 2006.229.04:15:44.15#ibcon#read 3, iclass 18, count 0 2006.229.04:15:44.15#ibcon#about to read 4, iclass 18, count 0 2006.229.04:15:44.15#ibcon#read 4, iclass 18, count 0 2006.229.04:15:44.15#ibcon#about to read 5, iclass 18, count 0 2006.229.04:15:44.15#ibcon#read 5, iclass 18, count 0 2006.229.04:15:44.15#ibcon#about to read 6, iclass 18, count 0 2006.229.04:15:44.15#ibcon#read 6, iclass 18, count 0 2006.229.04:15:44.15#ibcon#end of sib2, iclass 18, count 0 2006.229.04:15:44.15#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:15:44.15#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:15:44.15#ibcon#[25=USB\r\n] 2006.229.04:15:44.15#ibcon#*before write, iclass 18, count 0 2006.229.04:15:44.15#ibcon#enter sib2, iclass 18, count 0 2006.229.04:15:44.15#ibcon#flushed, iclass 18, count 0 2006.229.04:15:44.15#ibcon#about to write, iclass 18, count 0 2006.229.04:15:44.15#ibcon#wrote, iclass 18, count 0 2006.229.04:15:44.15#ibcon#about to read 3, iclass 18, count 0 2006.229.04:15:44.18#ibcon#read 3, iclass 18, count 0 2006.229.04:15:44.18#ibcon#about to read 4, iclass 18, count 0 2006.229.04:15:44.18#ibcon#read 4, iclass 18, count 0 2006.229.04:15:44.18#ibcon#about to read 5, iclass 18, count 0 2006.229.04:15:44.18#ibcon#read 5, iclass 18, count 0 2006.229.04:15:44.18#ibcon#about to read 6, iclass 18, count 0 2006.229.04:15:44.18#ibcon#read 6, iclass 18, count 0 2006.229.04:15:44.18#ibcon#end of sib2, iclass 18, count 0 2006.229.04:15:44.18#ibcon#*after write, iclass 18, count 0 2006.229.04:15:44.18#ibcon#*before return 0, iclass 18, count 0 2006.229.04:15:44.18#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:44.18#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:44.18#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:15:44.18#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:15:44.18$vck44/valo=7,864.99 2006.229.04:15:44.18#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.04:15:44.18#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.04:15:44.18#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:44.18#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:44.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:44.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:44.18#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:15:44.18#ibcon#first serial, iclass 20, count 0 2006.229.04:15:44.18#ibcon#enter sib2, iclass 20, count 0 2006.229.04:15:44.18#ibcon#flushed, iclass 20, count 0 2006.229.04:15:44.18#ibcon#about to write, iclass 20, count 0 2006.229.04:15:44.18#ibcon#wrote, iclass 20, count 0 2006.229.04:15:44.18#ibcon#about to read 3, iclass 20, count 0 2006.229.04:15:44.20#ibcon#read 3, iclass 20, count 0 2006.229.04:15:44.20#ibcon#about to read 4, iclass 20, count 0 2006.229.04:15:44.20#ibcon#read 4, iclass 20, count 0 2006.229.04:15:44.20#ibcon#about to read 5, iclass 20, count 0 2006.229.04:15:44.20#ibcon#read 5, iclass 20, count 0 2006.229.04:15:44.20#ibcon#about to read 6, iclass 20, count 0 2006.229.04:15:44.20#ibcon#read 6, iclass 20, count 0 2006.229.04:15:44.20#ibcon#end of sib2, iclass 20, count 0 2006.229.04:15:44.20#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:15:44.20#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:15:44.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:15:44.20#ibcon#*before write, iclass 20, count 0 2006.229.04:15:44.20#ibcon#enter sib2, iclass 20, count 0 2006.229.04:15:44.20#ibcon#flushed, iclass 20, count 0 2006.229.04:15:44.20#ibcon#about to write, iclass 20, count 0 2006.229.04:15:44.20#ibcon#wrote, iclass 20, count 0 2006.229.04:15:44.20#ibcon#about to read 3, iclass 20, count 0 2006.229.04:15:44.24#ibcon#read 3, iclass 20, count 0 2006.229.04:15:44.24#ibcon#about to read 4, iclass 20, count 0 2006.229.04:15:44.24#ibcon#read 4, iclass 20, count 0 2006.229.04:15:44.24#ibcon#about to read 5, iclass 20, count 0 2006.229.04:15:44.24#ibcon#read 5, iclass 20, count 0 2006.229.04:15:44.24#ibcon#about to read 6, iclass 20, count 0 2006.229.04:15:44.24#ibcon#read 6, iclass 20, count 0 2006.229.04:15:44.24#ibcon#end of sib2, iclass 20, count 0 2006.229.04:15:44.24#ibcon#*after write, iclass 20, count 0 2006.229.04:15:44.24#ibcon#*before return 0, iclass 20, count 0 2006.229.04:15:44.24#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:44.24#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:44.24#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:15:44.24#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:15:44.24$vck44/va=7,5 2006.229.04:15:44.24#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.04:15:44.24#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.04:15:44.24#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:44.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:44.30#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:44.30#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:44.30#ibcon#enter wrdev, iclass 22, count 2 2006.229.04:15:44.30#ibcon#first serial, iclass 22, count 2 2006.229.04:15:44.30#ibcon#enter sib2, iclass 22, count 2 2006.229.04:15:44.30#ibcon#flushed, iclass 22, count 2 2006.229.04:15:44.30#ibcon#about to write, iclass 22, count 2 2006.229.04:15:44.30#ibcon#wrote, iclass 22, count 2 2006.229.04:15:44.30#ibcon#about to read 3, iclass 22, count 2 2006.229.04:15:44.32#ibcon#read 3, iclass 22, count 2 2006.229.04:15:44.32#ibcon#about to read 4, iclass 22, count 2 2006.229.04:15:44.32#ibcon#read 4, iclass 22, count 2 2006.229.04:15:44.32#ibcon#about to read 5, iclass 22, count 2 2006.229.04:15:44.32#ibcon#read 5, iclass 22, count 2 2006.229.04:15:44.32#ibcon#about to read 6, iclass 22, count 2 2006.229.04:15:44.32#ibcon#read 6, iclass 22, count 2 2006.229.04:15:44.32#ibcon#end of sib2, iclass 22, count 2 2006.229.04:15:44.32#ibcon#*mode == 0, iclass 22, count 2 2006.229.04:15:44.32#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.04:15:44.32#ibcon#[25=AT07-05\r\n] 2006.229.04:15:44.32#ibcon#*before write, iclass 22, count 2 2006.229.04:15:44.32#ibcon#enter sib2, iclass 22, count 2 2006.229.04:15:44.32#ibcon#flushed, iclass 22, count 2 2006.229.04:15:44.32#ibcon#about to write, iclass 22, count 2 2006.229.04:15:44.32#ibcon#wrote, iclass 22, count 2 2006.229.04:15:44.32#ibcon#about to read 3, iclass 22, count 2 2006.229.04:15:44.35#ibcon#read 3, iclass 22, count 2 2006.229.04:15:44.35#ibcon#about to read 4, iclass 22, count 2 2006.229.04:15:44.35#ibcon#read 4, iclass 22, count 2 2006.229.04:15:44.35#ibcon#about to read 5, iclass 22, count 2 2006.229.04:15:44.35#ibcon#read 5, iclass 22, count 2 2006.229.04:15:44.35#ibcon#about to read 6, iclass 22, count 2 2006.229.04:15:44.35#ibcon#read 6, iclass 22, count 2 2006.229.04:15:44.35#ibcon#end of sib2, iclass 22, count 2 2006.229.04:15:44.35#ibcon#*after write, iclass 22, count 2 2006.229.04:15:44.35#ibcon#*before return 0, iclass 22, count 2 2006.229.04:15:44.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:44.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:44.35#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.04:15:44.35#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:44.35#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:44.47#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:44.47#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:44.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:15:44.47#ibcon#first serial, iclass 22, count 0 2006.229.04:15:44.47#ibcon#enter sib2, iclass 22, count 0 2006.229.04:15:44.47#ibcon#flushed, iclass 22, count 0 2006.229.04:15:44.47#ibcon#about to write, iclass 22, count 0 2006.229.04:15:44.47#ibcon#wrote, iclass 22, count 0 2006.229.04:15:44.47#ibcon#about to read 3, iclass 22, count 0 2006.229.04:15:44.49#ibcon#read 3, iclass 22, count 0 2006.229.04:15:44.49#ibcon#about to read 4, iclass 22, count 0 2006.229.04:15:44.49#ibcon#read 4, iclass 22, count 0 2006.229.04:15:44.49#ibcon#about to read 5, iclass 22, count 0 2006.229.04:15:44.49#ibcon#read 5, iclass 22, count 0 2006.229.04:15:44.49#ibcon#about to read 6, iclass 22, count 0 2006.229.04:15:44.49#ibcon#read 6, iclass 22, count 0 2006.229.04:15:44.49#ibcon#end of sib2, iclass 22, count 0 2006.229.04:15:44.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:15:44.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:15:44.49#ibcon#[25=USB\r\n] 2006.229.04:15:44.49#ibcon#*before write, iclass 22, count 0 2006.229.04:15:44.49#ibcon#enter sib2, iclass 22, count 0 2006.229.04:15:44.49#ibcon#flushed, iclass 22, count 0 2006.229.04:15:44.49#ibcon#about to write, iclass 22, count 0 2006.229.04:15:44.49#ibcon#wrote, iclass 22, count 0 2006.229.04:15:44.49#ibcon#about to read 3, iclass 22, count 0 2006.229.04:15:44.52#ibcon#read 3, iclass 22, count 0 2006.229.04:15:44.52#ibcon#about to read 4, iclass 22, count 0 2006.229.04:15:44.52#ibcon#read 4, iclass 22, count 0 2006.229.04:15:44.52#ibcon#about to read 5, iclass 22, count 0 2006.229.04:15:44.52#ibcon#read 5, iclass 22, count 0 2006.229.04:15:44.52#ibcon#about to read 6, iclass 22, count 0 2006.229.04:15:44.52#ibcon#read 6, iclass 22, count 0 2006.229.04:15:44.52#ibcon#end of sib2, iclass 22, count 0 2006.229.04:15:44.52#ibcon#*after write, iclass 22, count 0 2006.229.04:15:44.52#ibcon#*before return 0, iclass 22, count 0 2006.229.04:15:44.52#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:44.52#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:44.52#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:15:44.52#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:15:44.52$vck44/valo=8,884.99 2006.229.04:15:44.52#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.04:15:44.52#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.04:15:44.52#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:44.52#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:44.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:44.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:44.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:15:44.52#ibcon#first serial, iclass 24, count 0 2006.229.04:15:44.52#ibcon#enter sib2, iclass 24, count 0 2006.229.04:15:44.52#ibcon#flushed, iclass 24, count 0 2006.229.04:15:44.52#ibcon#about to write, iclass 24, count 0 2006.229.04:15:44.52#ibcon#wrote, iclass 24, count 0 2006.229.04:15:44.52#ibcon#about to read 3, iclass 24, count 0 2006.229.04:15:44.54#ibcon#read 3, iclass 24, count 0 2006.229.04:15:44.54#ibcon#about to read 4, iclass 24, count 0 2006.229.04:15:44.54#ibcon#read 4, iclass 24, count 0 2006.229.04:15:44.54#ibcon#about to read 5, iclass 24, count 0 2006.229.04:15:44.54#ibcon#read 5, iclass 24, count 0 2006.229.04:15:44.54#ibcon#about to read 6, iclass 24, count 0 2006.229.04:15:44.54#ibcon#read 6, iclass 24, count 0 2006.229.04:15:44.54#ibcon#end of sib2, iclass 24, count 0 2006.229.04:15:44.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:15:44.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:15:44.54#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:15:44.54#ibcon#*before write, iclass 24, count 0 2006.229.04:15:44.54#ibcon#enter sib2, iclass 24, count 0 2006.229.04:15:44.54#ibcon#flushed, iclass 24, count 0 2006.229.04:15:44.54#ibcon#about to write, iclass 24, count 0 2006.229.04:15:44.54#ibcon#wrote, iclass 24, count 0 2006.229.04:15:44.54#ibcon#about to read 3, iclass 24, count 0 2006.229.04:15:44.58#ibcon#read 3, iclass 24, count 0 2006.229.04:15:44.58#ibcon#about to read 4, iclass 24, count 0 2006.229.04:15:44.58#ibcon#read 4, iclass 24, count 0 2006.229.04:15:44.58#ibcon#about to read 5, iclass 24, count 0 2006.229.04:15:44.58#ibcon#read 5, iclass 24, count 0 2006.229.04:15:44.58#ibcon#about to read 6, iclass 24, count 0 2006.229.04:15:44.58#ibcon#read 6, iclass 24, count 0 2006.229.04:15:44.58#ibcon#end of sib2, iclass 24, count 0 2006.229.04:15:44.58#ibcon#*after write, iclass 24, count 0 2006.229.04:15:44.58#ibcon#*before return 0, iclass 24, count 0 2006.229.04:15:44.58#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:44.58#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:44.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:15:44.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:15:44.58$vck44/va=8,6 2006.229.04:15:44.58#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.04:15:44.58#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.04:15:44.58#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:44.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:15:44.64#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:15:44.64#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:15:44.64#ibcon#enter wrdev, iclass 26, count 2 2006.229.04:15:44.64#ibcon#first serial, iclass 26, count 2 2006.229.04:15:44.64#ibcon#enter sib2, iclass 26, count 2 2006.229.04:15:44.64#ibcon#flushed, iclass 26, count 2 2006.229.04:15:44.64#ibcon#about to write, iclass 26, count 2 2006.229.04:15:44.64#ibcon#wrote, iclass 26, count 2 2006.229.04:15:44.64#ibcon#about to read 3, iclass 26, count 2 2006.229.04:15:44.66#ibcon#read 3, iclass 26, count 2 2006.229.04:15:44.66#ibcon#about to read 4, iclass 26, count 2 2006.229.04:15:44.66#ibcon#read 4, iclass 26, count 2 2006.229.04:15:44.66#ibcon#about to read 5, iclass 26, count 2 2006.229.04:15:44.66#ibcon#read 5, iclass 26, count 2 2006.229.04:15:44.66#ibcon#about to read 6, iclass 26, count 2 2006.229.04:15:44.66#ibcon#read 6, iclass 26, count 2 2006.229.04:15:44.66#ibcon#end of sib2, iclass 26, count 2 2006.229.04:15:44.66#ibcon#*mode == 0, iclass 26, count 2 2006.229.04:15:44.66#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.04:15:44.66#ibcon#[25=AT08-06\r\n] 2006.229.04:15:44.66#ibcon#*before write, iclass 26, count 2 2006.229.04:15:44.66#ibcon#enter sib2, iclass 26, count 2 2006.229.04:15:44.66#ibcon#flushed, iclass 26, count 2 2006.229.04:15:44.66#ibcon#about to write, iclass 26, count 2 2006.229.04:15:44.66#ibcon#wrote, iclass 26, count 2 2006.229.04:15:44.66#ibcon#about to read 3, iclass 26, count 2 2006.229.04:15:44.69#ibcon#read 3, iclass 26, count 2 2006.229.04:15:44.69#ibcon#about to read 4, iclass 26, count 2 2006.229.04:15:44.69#ibcon#read 4, iclass 26, count 2 2006.229.04:15:44.69#ibcon#about to read 5, iclass 26, count 2 2006.229.04:15:44.69#ibcon#read 5, iclass 26, count 2 2006.229.04:15:44.69#ibcon#about to read 6, iclass 26, count 2 2006.229.04:15:44.69#ibcon#read 6, iclass 26, count 2 2006.229.04:15:44.69#ibcon#end of sib2, iclass 26, count 2 2006.229.04:15:44.69#ibcon#*after write, iclass 26, count 2 2006.229.04:15:44.69#ibcon#*before return 0, iclass 26, count 2 2006.229.04:15:44.69#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:15:44.69#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:15:44.69#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.04:15:44.69#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:44.69#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:15:44.81#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:15:44.81#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:15:44.81#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:15:44.81#ibcon#first serial, iclass 26, count 0 2006.229.04:15:44.81#ibcon#enter sib2, iclass 26, count 0 2006.229.04:15:44.81#ibcon#flushed, iclass 26, count 0 2006.229.04:15:44.81#ibcon#about to write, iclass 26, count 0 2006.229.04:15:44.81#ibcon#wrote, iclass 26, count 0 2006.229.04:15:44.81#ibcon#about to read 3, iclass 26, count 0 2006.229.04:15:44.83#ibcon#read 3, iclass 26, count 0 2006.229.04:15:44.83#ibcon#about to read 4, iclass 26, count 0 2006.229.04:15:44.83#ibcon#read 4, iclass 26, count 0 2006.229.04:15:44.83#ibcon#about to read 5, iclass 26, count 0 2006.229.04:15:44.83#ibcon#read 5, iclass 26, count 0 2006.229.04:15:44.83#ibcon#about to read 6, iclass 26, count 0 2006.229.04:15:44.83#ibcon#read 6, iclass 26, count 0 2006.229.04:15:44.83#ibcon#end of sib2, iclass 26, count 0 2006.229.04:15:44.83#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:15:44.83#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:15:44.83#ibcon#[25=USB\r\n] 2006.229.04:15:44.83#ibcon#*before write, iclass 26, count 0 2006.229.04:15:44.83#ibcon#enter sib2, iclass 26, count 0 2006.229.04:15:44.83#ibcon#flushed, iclass 26, count 0 2006.229.04:15:44.83#ibcon#about to write, iclass 26, count 0 2006.229.04:15:44.83#ibcon#wrote, iclass 26, count 0 2006.229.04:15:44.83#ibcon#about to read 3, iclass 26, count 0 2006.229.04:15:44.86#ibcon#read 3, iclass 26, count 0 2006.229.04:15:44.86#ibcon#about to read 4, iclass 26, count 0 2006.229.04:15:44.86#ibcon#read 4, iclass 26, count 0 2006.229.04:15:44.86#ibcon#about to read 5, iclass 26, count 0 2006.229.04:15:44.86#ibcon#read 5, iclass 26, count 0 2006.229.04:15:44.86#ibcon#about to read 6, iclass 26, count 0 2006.229.04:15:44.86#ibcon#read 6, iclass 26, count 0 2006.229.04:15:44.86#ibcon#end of sib2, iclass 26, count 0 2006.229.04:15:44.86#ibcon#*after write, iclass 26, count 0 2006.229.04:15:44.86#ibcon#*before return 0, iclass 26, count 0 2006.229.04:15:44.86#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:15:44.86#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:15:44.86#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:15:44.86#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:15:44.86$vck44/vblo=1,629.99 2006.229.04:15:44.86#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.04:15:44.86#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.04:15:44.86#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:44.86#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:15:44.86#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:15:44.86#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:15:44.86#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:15:44.86#ibcon#first serial, iclass 28, count 0 2006.229.04:15:44.86#ibcon#enter sib2, iclass 28, count 0 2006.229.04:15:44.86#ibcon#flushed, iclass 28, count 0 2006.229.04:15:44.86#ibcon#about to write, iclass 28, count 0 2006.229.04:15:44.86#ibcon#wrote, iclass 28, count 0 2006.229.04:15:44.86#ibcon#about to read 3, iclass 28, count 0 2006.229.04:15:44.88#ibcon#read 3, iclass 28, count 0 2006.229.04:15:44.88#ibcon#about to read 4, iclass 28, count 0 2006.229.04:15:44.88#ibcon#read 4, iclass 28, count 0 2006.229.04:15:44.88#ibcon#about to read 5, iclass 28, count 0 2006.229.04:15:44.88#ibcon#read 5, iclass 28, count 0 2006.229.04:15:44.88#ibcon#about to read 6, iclass 28, count 0 2006.229.04:15:44.88#ibcon#read 6, iclass 28, count 0 2006.229.04:15:44.88#ibcon#end of sib2, iclass 28, count 0 2006.229.04:15:44.88#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:15:44.88#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:15:44.88#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:15:44.88#ibcon#*before write, iclass 28, count 0 2006.229.04:15:44.88#ibcon#enter sib2, iclass 28, count 0 2006.229.04:15:44.88#ibcon#flushed, iclass 28, count 0 2006.229.04:15:44.88#ibcon#about to write, iclass 28, count 0 2006.229.04:15:44.88#ibcon#wrote, iclass 28, count 0 2006.229.04:15:44.88#ibcon#about to read 3, iclass 28, count 0 2006.229.04:15:44.92#ibcon#read 3, iclass 28, count 0 2006.229.04:15:44.92#ibcon#about to read 4, iclass 28, count 0 2006.229.04:15:44.92#ibcon#read 4, iclass 28, count 0 2006.229.04:15:44.92#ibcon#about to read 5, iclass 28, count 0 2006.229.04:15:44.92#ibcon#read 5, iclass 28, count 0 2006.229.04:15:44.92#ibcon#about to read 6, iclass 28, count 0 2006.229.04:15:44.92#ibcon#read 6, iclass 28, count 0 2006.229.04:15:44.92#ibcon#end of sib2, iclass 28, count 0 2006.229.04:15:44.92#ibcon#*after write, iclass 28, count 0 2006.229.04:15:44.92#ibcon#*before return 0, iclass 28, count 0 2006.229.04:15:44.92#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:15:44.92#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:15:44.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:15:44.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:15:44.92$vck44/vb=1,4 2006.229.04:15:44.92#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.04:15:44.92#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.04:15:44.92#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:44.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:15:44.92#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:15:44.92#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:15:44.92#ibcon#enter wrdev, iclass 30, count 2 2006.229.04:15:44.92#ibcon#first serial, iclass 30, count 2 2006.229.04:15:44.92#ibcon#enter sib2, iclass 30, count 2 2006.229.04:15:44.92#ibcon#flushed, iclass 30, count 2 2006.229.04:15:44.92#ibcon#about to write, iclass 30, count 2 2006.229.04:15:44.92#ibcon#wrote, iclass 30, count 2 2006.229.04:15:44.92#ibcon#about to read 3, iclass 30, count 2 2006.229.04:15:44.94#ibcon#read 3, iclass 30, count 2 2006.229.04:15:44.94#ibcon#about to read 4, iclass 30, count 2 2006.229.04:15:44.94#ibcon#read 4, iclass 30, count 2 2006.229.04:15:44.94#ibcon#about to read 5, iclass 30, count 2 2006.229.04:15:44.94#ibcon#read 5, iclass 30, count 2 2006.229.04:15:44.94#ibcon#about to read 6, iclass 30, count 2 2006.229.04:15:44.94#ibcon#read 6, iclass 30, count 2 2006.229.04:15:44.94#ibcon#end of sib2, iclass 30, count 2 2006.229.04:15:44.94#ibcon#*mode == 0, iclass 30, count 2 2006.229.04:15:44.94#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.04:15:44.94#ibcon#[27=AT01-04\r\n] 2006.229.04:15:44.94#ibcon#*before write, iclass 30, count 2 2006.229.04:15:44.94#ibcon#enter sib2, iclass 30, count 2 2006.229.04:15:44.94#ibcon#flushed, iclass 30, count 2 2006.229.04:15:44.94#ibcon#about to write, iclass 30, count 2 2006.229.04:15:44.94#ibcon#wrote, iclass 30, count 2 2006.229.04:15:44.94#ibcon#about to read 3, iclass 30, count 2 2006.229.04:15:44.97#ibcon#read 3, iclass 30, count 2 2006.229.04:15:44.97#ibcon#about to read 4, iclass 30, count 2 2006.229.04:15:44.97#ibcon#read 4, iclass 30, count 2 2006.229.04:15:44.97#ibcon#about to read 5, iclass 30, count 2 2006.229.04:15:44.97#ibcon#read 5, iclass 30, count 2 2006.229.04:15:44.97#ibcon#about to read 6, iclass 30, count 2 2006.229.04:15:44.97#ibcon#read 6, iclass 30, count 2 2006.229.04:15:44.97#ibcon#end of sib2, iclass 30, count 2 2006.229.04:15:44.97#ibcon#*after write, iclass 30, count 2 2006.229.04:15:44.97#ibcon#*before return 0, iclass 30, count 2 2006.229.04:15:44.97#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:15:44.97#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:15:44.97#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.04:15:44.97#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:44.97#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:15:45.09#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:15:45.09#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:15:45.09#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:15:45.09#ibcon#first serial, iclass 30, count 0 2006.229.04:15:45.09#ibcon#enter sib2, iclass 30, count 0 2006.229.04:15:45.09#ibcon#flushed, iclass 30, count 0 2006.229.04:15:45.09#ibcon#about to write, iclass 30, count 0 2006.229.04:15:45.09#ibcon#wrote, iclass 30, count 0 2006.229.04:15:45.09#ibcon#about to read 3, iclass 30, count 0 2006.229.04:15:45.11#ibcon#read 3, iclass 30, count 0 2006.229.04:15:45.11#ibcon#about to read 4, iclass 30, count 0 2006.229.04:15:45.11#ibcon#read 4, iclass 30, count 0 2006.229.04:15:45.11#ibcon#about to read 5, iclass 30, count 0 2006.229.04:15:45.11#ibcon#read 5, iclass 30, count 0 2006.229.04:15:45.11#ibcon#about to read 6, iclass 30, count 0 2006.229.04:15:45.11#ibcon#read 6, iclass 30, count 0 2006.229.04:15:45.11#ibcon#end of sib2, iclass 30, count 0 2006.229.04:15:45.11#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:15:45.11#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:15:45.11#ibcon#[27=USB\r\n] 2006.229.04:15:45.11#ibcon#*before write, iclass 30, count 0 2006.229.04:15:45.11#ibcon#enter sib2, iclass 30, count 0 2006.229.04:15:45.11#ibcon#flushed, iclass 30, count 0 2006.229.04:15:45.11#ibcon#about to write, iclass 30, count 0 2006.229.04:15:45.11#ibcon#wrote, iclass 30, count 0 2006.229.04:15:45.11#ibcon#about to read 3, iclass 30, count 0 2006.229.04:15:45.14#ibcon#read 3, iclass 30, count 0 2006.229.04:15:45.14#ibcon#about to read 4, iclass 30, count 0 2006.229.04:15:45.14#ibcon#read 4, iclass 30, count 0 2006.229.04:15:45.14#ibcon#about to read 5, iclass 30, count 0 2006.229.04:15:45.14#ibcon#read 5, iclass 30, count 0 2006.229.04:15:45.14#ibcon#about to read 6, iclass 30, count 0 2006.229.04:15:45.14#ibcon#read 6, iclass 30, count 0 2006.229.04:15:45.14#ibcon#end of sib2, iclass 30, count 0 2006.229.04:15:45.14#ibcon#*after write, iclass 30, count 0 2006.229.04:15:45.14#ibcon#*before return 0, iclass 30, count 0 2006.229.04:15:45.14#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:15:45.14#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:15:45.14#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:15:45.14#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:15:45.14$vck44/vblo=2,634.99 2006.229.04:15:45.14#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.04:15:45.14#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.04:15:45.14#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:45.14#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:45.14#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:45.14#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:45.14#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:15:45.14#ibcon#first serial, iclass 32, count 0 2006.229.04:15:45.14#ibcon#enter sib2, iclass 32, count 0 2006.229.04:15:45.14#ibcon#flushed, iclass 32, count 0 2006.229.04:15:45.14#ibcon#about to write, iclass 32, count 0 2006.229.04:15:45.14#ibcon#wrote, iclass 32, count 0 2006.229.04:15:45.14#ibcon#about to read 3, iclass 32, count 0 2006.229.04:15:45.16#ibcon#read 3, iclass 32, count 0 2006.229.04:15:45.16#ibcon#about to read 4, iclass 32, count 0 2006.229.04:15:45.16#ibcon#read 4, iclass 32, count 0 2006.229.04:15:45.16#ibcon#about to read 5, iclass 32, count 0 2006.229.04:15:45.16#ibcon#read 5, iclass 32, count 0 2006.229.04:15:45.16#ibcon#about to read 6, iclass 32, count 0 2006.229.04:15:45.16#ibcon#read 6, iclass 32, count 0 2006.229.04:15:45.16#ibcon#end of sib2, iclass 32, count 0 2006.229.04:15:45.16#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:15:45.16#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:15:45.16#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:15:45.16#ibcon#*before write, iclass 32, count 0 2006.229.04:15:45.16#ibcon#enter sib2, iclass 32, count 0 2006.229.04:15:45.16#ibcon#flushed, iclass 32, count 0 2006.229.04:15:45.16#ibcon#about to write, iclass 32, count 0 2006.229.04:15:45.16#ibcon#wrote, iclass 32, count 0 2006.229.04:15:45.16#ibcon#about to read 3, iclass 32, count 0 2006.229.04:15:45.20#ibcon#read 3, iclass 32, count 0 2006.229.04:15:45.20#ibcon#about to read 4, iclass 32, count 0 2006.229.04:15:45.20#ibcon#read 4, iclass 32, count 0 2006.229.04:15:45.20#ibcon#about to read 5, iclass 32, count 0 2006.229.04:15:45.20#ibcon#read 5, iclass 32, count 0 2006.229.04:15:45.20#ibcon#about to read 6, iclass 32, count 0 2006.229.04:15:45.20#ibcon#read 6, iclass 32, count 0 2006.229.04:15:45.20#ibcon#end of sib2, iclass 32, count 0 2006.229.04:15:45.20#ibcon#*after write, iclass 32, count 0 2006.229.04:15:45.20#ibcon#*before return 0, iclass 32, count 0 2006.229.04:15:45.20#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:45.20#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:15:45.20#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:15:45.20#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:15:45.20$vck44/vb=2,4 2006.229.04:15:45.20#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.04:15:45.20#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.04:15:45.20#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:45.20#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:45.26#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:45.26#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:45.26#ibcon#enter wrdev, iclass 34, count 2 2006.229.04:15:45.26#ibcon#first serial, iclass 34, count 2 2006.229.04:15:45.26#ibcon#enter sib2, iclass 34, count 2 2006.229.04:15:45.26#ibcon#flushed, iclass 34, count 2 2006.229.04:15:45.26#ibcon#about to write, iclass 34, count 2 2006.229.04:15:45.26#ibcon#wrote, iclass 34, count 2 2006.229.04:15:45.26#ibcon#about to read 3, iclass 34, count 2 2006.229.04:15:45.28#ibcon#read 3, iclass 34, count 2 2006.229.04:15:45.28#ibcon#about to read 4, iclass 34, count 2 2006.229.04:15:45.28#ibcon#read 4, iclass 34, count 2 2006.229.04:15:45.28#ibcon#about to read 5, iclass 34, count 2 2006.229.04:15:45.28#ibcon#read 5, iclass 34, count 2 2006.229.04:15:45.28#ibcon#about to read 6, iclass 34, count 2 2006.229.04:15:45.28#ibcon#read 6, iclass 34, count 2 2006.229.04:15:45.28#ibcon#end of sib2, iclass 34, count 2 2006.229.04:15:45.28#ibcon#*mode == 0, iclass 34, count 2 2006.229.04:15:45.28#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.04:15:45.28#ibcon#[27=AT02-04\r\n] 2006.229.04:15:45.28#ibcon#*before write, iclass 34, count 2 2006.229.04:15:45.28#ibcon#enter sib2, iclass 34, count 2 2006.229.04:15:45.28#ibcon#flushed, iclass 34, count 2 2006.229.04:15:45.28#ibcon#about to write, iclass 34, count 2 2006.229.04:15:45.28#ibcon#wrote, iclass 34, count 2 2006.229.04:15:45.28#ibcon#about to read 3, iclass 34, count 2 2006.229.04:15:45.31#ibcon#read 3, iclass 34, count 2 2006.229.04:15:45.31#ibcon#about to read 4, iclass 34, count 2 2006.229.04:15:45.31#ibcon#read 4, iclass 34, count 2 2006.229.04:15:45.31#ibcon#about to read 5, iclass 34, count 2 2006.229.04:15:45.31#ibcon#read 5, iclass 34, count 2 2006.229.04:15:45.31#ibcon#about to read 6, iclass 34, count 2 2006.229.04:15:45.31#ibcon#read 6, iclass 34, count 2 2006.229.04:15:45.31#ibcon#end of sib2, iclass 34, count 2 2006.229.04:15:45.31#ibcon#*after write, iclass 34, count 2 2006.229.04:15:45.31#ibcon#*before return 0, iclass 34, count 2 2006.229.04:15:45.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:45.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:15:45.31#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.04:15:45.31#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:45.31#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:45.43#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:45.43#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:45.43#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:15:45.43#ibcon#first serial, iclass 34, count 0 2006.229.04:15:45.43#ibcon#enter sib2, iclass 34, count 0 2006.229.04:15:45.43#ibcon#flushed, iclass 34, count 0 2006.229.04:15:45.43#ibcon#about to write, iclass 34, count 0 2006.229.04:15:45.43#ibcon#wrote, iclass 34, count 0 2006.229.04:15:45.43#ibcon#about to read 3, iclass 34, count 0 2006.229.04:15:45.45#ibcon#read 3, iclass 34, count 0 2006.229.04:15:45.45#ibcon#about to read 4, iclass 34, count 0 2006.229.04:15:45.45#ibcon#read 4, iclass 34, count 0 2006.229.04:15:45.45#ibcon#about to read 5, iclass 34, count 0 2006.229.04:15:45.45#ibcon#read 5, iclass 34, count 0 2006.229.04:15:45.45#ibcon#about to read 6, iclass 34, count 0 2006.229.04:15:45.45#ibcon#read 6, iclass 34, count 0 2006.229.04:15:45.45#ibcon#end of sib2, iclass 34, count 0 2006.229.04:15:45.45#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:15:45.45#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:15:45.45#ibcon#[27=USB\r\n] 2006.229.04:15:45.45#ibcon#*before write, iclass 34, count 0 2006.229.04:15:45.45#ibcon#enter sib2, iclass 34, count 0 2006.229.04:15:45.45#ibcon#flushed, iclass 34, count 0 2006.229.04:15:45.45#ibcon#about to write, iclass 34, count 0 2006.229.04:15:45.45#ibcon#wrote, iclass 34, count 0 2006.229.04:15:45.45#ibcon#about to read 3, iclass 34, count 0 2006.229.04:15:45.48#ibcon#read 3, iclass 34, count 0 2006.229.04:15:45.48#ibcon#about to read 4, iclass 34, count 0 2006.229.04:15:45.48#ibcon#read 4, iclass 34, count 0 2006.229.04:15:45.48#ibcon#about to read 5, iclass 34, count 0 2006.229.04:15:45.48#ibcon#read 5, iclass 34, count 0 2006.229.04:15:45.48#ibcon#about to read 6, iclass 34, count 0 2006.229.04:15:45.48#ibcon#read 6, iclass 34, count 0 2006.229.04:15:45.48#ibcon#end of sib2, iclass 34, count 0 2006.229.04:15:45.48#ibcon#*after write, iclass 34, count 0 2006.229.04:15:45.48#ibcon#*before return 0, iclass 34, count 0 2006.229.04:15:45.48#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:45.48#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:15:45.48#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:15:45.48#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:15:45.48$vck44/vblo=3,649.99 2006.229.04:15:45.48#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:15:45.48#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:15:45.48#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:45.48#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:45.48#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:45.48#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:45.48#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:15:45.48#ibcon#first serial, iclass 36, count 0 2006.229.04:15:45.48#ibcon#enter sib2, iclass 36, count 0 2006.229.04:15:45.48#ibcon#flushed, iclass 36, count 0 2006.229.04:15:45.48#ibcon#about to write, iclass 36, count 0 2006.229.04:15:45.48#ibcon#wrote, iclass 36, count 0 2006.229.04:15:45.48#ibcon#about to read 3, iclass 36, count 0 2006.229.04:15:45.50#ibcon#read 3, iclass 36, count 0 2006.229.04:15:45.50#ibcon#about to read 4, iclass 36, count 0 2006.229.04:15:45.50#ibcon#read 4, iclass 36, count 0 2006.229.04:15:45.50#ibcon#about to read 5, iclass 36, count 0 2006.229.04:15:45.50#ibcon#read 5, iclass 36, count 0 2006.229.04:15:45.50#ibcon#about to read 6, iclass 36, count 0 2006.229.04:15:45.50#ibcon#read 6, iclass 36, count 0 2006.229.04:15:45.50#ibcon#end of sib2, iclass 36, count 0 2006.229.04:15:45.50#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:15:45.50#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:15:45.50#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:15:45.50#ibcon#*before write, iclass 36, count 0 2006.229.04:15:45.50#ibcon#enter sib2, iclass 36, count 0 2006.229.04:15:45.50#ibcon#flushed, iclass 36, count 0 2006.229.04:15:45.50#ibcon#about to write, iclass 36, count 0 2006.229.04:15:45.50#ibcon#wrote, iclass 36, count 0 2006.229.04:15:45.50#ibcon#about to read 3, iclass 36, count 0 2006.229.04:15:45.54#ibcon#read 3, iclass 36, count 0 2006.229.04:15:45.54#ibcon#about to read 4, iclass 36, count 0 2006.229.04:15:45.54#ibcon#read 4, iclass 36, count 0 2006.229.04:15:45.54#ibcon#about to read 5, iclass 36, count 0 2006.229.04:15:45.54#ibcon#read 5, iclass 36, count 0 2006.229.04:15:45.54#ibcon#about to read 6, iclass 36, count 0 2006.229.04:15:45.54#ibcon#read 6, iclass 36, count 0 2006.229.04:15:45.54#ibcon#end of sib2, iclass 36, count 0 2006.229.04:15:45.54#ibcon#*after write, iclass 36, count 0 2006.229.04:15:45.54#ibcon#*before return 0, iclass 36, count 0 2006.229.04:15:45.54#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:45.54#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:15:45.54#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:15:45.54#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:15:45.54$vck44/vb=3,4 2006.229.04:15:45.54#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.04:15:45.54#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.04:15:45.54#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:45.54#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:45.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:45.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:45.60#ibcon#enter wrdev, iclass 38, count 2 2006.229.04:15:45.60#ibcon#first serial, iclass 38, count 2 2006.229.04:15:45.60#ibcon#enter sib2, iclass 38, count 2 2006.229.04:15:45.60#ibcon#flushed, iclass 38, count 2 2006.229.04:15:45.60#ibcon#about to write, iclass 38, count 2 2006.229.04:15:45.60#ibcon#wrote, iclass 38, count 2 2006.229.04:15:45.60#ibcon#about to read 3, iclass 38, count 2 2006.229.04:15:45.62#ibcon#read 3, iclass 38, count 2 2006.229.04:15:45.62#ibcon#about to read 4, iclass 38, count 2 2006.229.04:15:45.62#ibcon#read 4, iclass 38, count 2 2006.229.04:15:45.62#ibcon#about to read 5, iclass 38, count 2 2006.229.04:15:45.62#ibcon#read 5, iclass 38, count 2 2006.229.04:15:45.62#ibcon#about to read 6, iclass 38, count 2 2006.229.04:15:45.62#ibcon#read 6, iclass 38, count 2 2006.229.04:15:45.62#ibcon#end of sib2, iclass 38, count 2 2006.229.04:15:45.62#ibcon#*mode == 0, iclass 38, count 2 2006.229.04:15:45.62#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.04:15:45.62#ibcon#[27=AT03-04\r\n] 2006.229.04:15:45.62#ibcon#*before write, iclass 38, count 2 2006.229.04:15:45.62#ibcon#enter sib2, iclass 38, count 2 2006.229.04:15:45.62#ibcon#flushed, iclass 38, count 2 2006.229.04:15:45.62#ibcon#about to write, iclass 38, count 2 2006.229.04:15:45.62#ibcon#wrote, iclass 38, count 2 2006.229.04:15:45.62#ibcon#about to read 3, iclass 38, count 2 2006.229.04:15:45.65#ibcon#read 3, iclass 38, count 2 2006.229.04:15:45.65#ibcon#about to read 4, iclass 38, count 2 2006.229.04:15:45.65#ibcon#read 4, iclass 38, count 2 2006.229.04:15:45.65#ibcon#about to read 5, iclass 38, count 2 2006.229.04:15:45.65#ibcon#read 5, iclass 38, count 2 2006.229.04:15:45.65#ibcon#about to read 6, iclass 38, count 2 2006.229.04:15:45.65#ibcon#read 6, iclass 38, count 2 2006.229.04:15:45.65#ibcon#end of sib2, iclass 38, count 2 2006.229.04:15:45.65#ibcon#*after write, iclass 38, count 2 2006.229.04:15:45.65#ibcon#*before return 0, iclass 38, count 2 2006.229.04:15:45.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:45.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:15:45.65#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.04:15:45.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:45.65#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:45.77#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:45.77#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:45.77#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:15:45.77#ibcon#first serial, iclass 38, count 0 2006.229.04:15:45.77#ibcon#enter sib2, iclass 38, count 0 2006.229.04:15:45.77#ibcon#flushed, iclass 38, count 0 2006.229.04:15:45.77#ibcon#about to write, iclass 38, count 0 2006.229.04:15:45.77#ibcon#wrote, iclass 38, count 0 2006.229.04:15:45.77#ibcon#about to read 3, iclass 38, count 0 2006.229.04:15:45.79#ibcon#read 3, iclass 38, count 0 2006.229.04:15:45.79#ibcon#about to read 4, iclass 38, count 0 2006.229.04:15:45.79#ibcon#read 4, iclass 38, count 0 2006.229.04:15:45.79#ibcon#about to read 5, iclass 38, count 0 2006.229.04:15:45.79#ibcon#read 5, iclass 38, count 0 2006.229.04:15:45.79#ibcon#about to read 6, iclass 38, count 0 2006.229.04:15:45.79#ibcon#read 6, iclass 38, count 0 2006.229.04:15:45.79#ibcon#end of sib2, iclass 38, count 0 2006.229.04:15:45.79#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:15:45.79#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:15:45.79#ibcon#[27=USB\r\n] 2006.229.04:15:45.79#ibcon#*before write, iclass 38, count 0 2006.229.04:15:45.79#ibcon#enter sib2, iclass 38, count 0 2006.229.04:15:45.79#ibcon#flushed, iclass 38, count 0 2006.229.04:15:45.79#ibcon#about to write, iclass 38, count 0 2006.229.04:15:45.79#ibcon#wrote, iclass 38, count 0 2006.229.04:15:45.79#ibcon#about to read 3, iclass 38, count 0 2006.229.04:15:45.82#ibcon#read 3, iclass 38, count 0 2006.229.04:15:45.82#ibcon#about to read 4, iclass 38, count 0 2006.229.04:15:45.82#ibcon#read 4, iclass 38, count 0 2006.229.04:15:45.82#ibcon#about to read 5, iclass 38, count 0 2006.229.04:15:45.82#ibcon#read 5, iclass 38, count 0 2006.229.04:15:45.82#ibcon#about to read 6, iclass 38, count 0 2006.229.04:15:45.82#ibcon#read 6, iclass 38, count 0 2006.229.04:15:45.82#ibcon#end of sib2, iclass 38, count 0 2006.229.04:15:45.82#ibcon#*after write, iclass 38, count 0 2006.229.04:15:45.82#ibcon#*before return 0, iclass 38, count 0 2006.229.04:15:45.82#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:45.82#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:15:45.82#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:15:45.82#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:15:45.82$vck44/vblo=4,679.99 2006.229.04:15:45.82#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.04:15:45.82#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.04:15:45.82#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:45.82#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:45.82#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:45.82#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:45.82#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:15:45.82#ibcon#first serial, iclass 40, count 0 2006.229.04:15:45.82#ibcon#enter sib2, iclass 40, count 0 2006.229.04:15:45.82#ibcon#flushed, iclass 40, count 0 2006.229.04:15:45.82#ibcon#about to write, iclass 40, count 0 2006.229.04:15:45.82#ibcon#wrote, iclass 40, count 0 2006.229.04:15:45.82#ibcon#about to read 3, iclass 40, count 0 2006.229.04:15:45.84#ibcon#read 3, iclass 40, count 0 2006.229.04:15:45.84#ibcon#about to read 4, iclass 40, count 0 2006.229.04:15:45.84#ibcon#read 4, iclass 40, count 0 2006.229.04:15:45.84#ibcon#about to read 5, iclass 40, count 0 2006.229.04:15:45.84#ibcon#read 5, iclass 40, count 0 2006.229.04:15:45.84#ibcon#about to read 6, iclass 40, count 0 2006.229.04:15:45.84#ibcon#read 6, iclass 40, count 0 2006.229.04:15:45.84#ibcon#end of sib2, iclass 40, count 0 2006.229.04:15:45.84#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:15:45.84#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:15:45.84#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:15:45.84#ibcon#*before write, iclass 40, count 0 2006.229.04:15:45.84#ibcon#enter sib2, iclass 40, count 0 2006.229.04:15:45.84#ibcon#flushed, iclass 40, count 0 2006.229.04:15:45.84#ibcon#about to write, iclass 40, count 0 2006.229.04:15:45.84#ibcon#wrote, iclass 40, count 0 2006.229.04:15:45.84#ibcon#about to read 3, iclass 40, count 0 2006.229.04:15:45.88#ibcon#read 3, iclass 40, count 0 2006.229.04:15:45.88#ibcon#about to read 4, iclass 40, count 0 2006.229.04:15:45.88#ibcon#read 4, iclass 40, count 0 2006.229.04:15:45.88#ibcon#about to read 5, iclass 40, count 0 2006.229.04:15:45.88#ibcon#read 5, iclass 40, count 0 2006.229.04:15:45.88#ibcon#about to read 6, iclass 40, count 0 2006.229.04:15:45.88#ibcon#read 6, iclass 40, count 0 2006.229.04:15:45.88#ibcon#end of sib2, iclass 40, count 0 2006.229.04:15:45.88#ibcon#*after write, iclass 40, count 0 2006.229.04:15:45.88#ibcon#*before return 0, iclass 40, count 0 2006.229.04:15:45.88#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:45.88#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:15:45.88#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:15:45.88#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:15:45.88$vck44/vb=4,4 2006.229.04:15:45.88#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.04:15:45.88#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.04:15:45.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:45.88#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:45.94#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:45.94#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:45.94#ibcon#enter wrdev, iclass 4, count 2 2006.229.04:15:45.94#ibcon#first serial, iclass 4, count 2 2006.229.04:15:45.94#ibcon#enter sib2, iclass 4, count 2 2006.229.04:15:45.94#ibcon#flushed, iclass 4, count 2 2006.229.04:15:45.94#ibcon#about to write, iclass 4, count 2 2006.229.04:15:45.94#ibcon#wrote, iclass 4, count 2 2006.229.04:15:45.94#ibcon#about to read 3, iclass 4, count 2 2006.229.04:15:45.96#ibcon#read 3, iclass 4, count 2 2006.229.04:15:45.96#ibcon#about to read 4, iclass 4, count 2 2006.229.04:15:45.96#ibcon#read 4, iclass 4, count 2 2006.229.04:15:45.96#ibcon#about to read 5, iclass 4, count 2 2006.229.04:15:45.96#ibcon#read 5, iclass 4, count 2 2006.229.04:15:45.96#ibcon#about to read 6, iclass 4, count 2 2006.229.04:15:45.96#ibcon#read 6, iclass 4, count 2 2006.229.04:15:45.96#ibcon#end of sib2, iclass 4, count 2 2006.229.04:15:45.96#ibcon#*mode == 0, iclass 4, count 2 2006.229.04:15:45.96#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.04:15:45.96#ibcon#[27=AT04-04\r\n] 2006.229.04:15:45.96#ibcon#*before write, iclass 4, count 2 2006.229.04:15:45.96#ibcon#enter sib2, iclass 4, count 2 2006.229.04:15:45.96#ibcon#flushed, iclass 4, count 2 2006.229.04:15:45.96#ibcon#about to write, iclass 4, count 2 2006.229.04:15:45.96#ibcon#wrote, iclass 4, count 2 2006.229.04:15:45.96#ibcon#about to read 3, iclass 4, count 2 2006.229.04:15:45.99#ibcon#read 3, iclass 4, count 2 2006.229.04:15:45.99#ibcon#about to read 4, iclass 4, count 2 2006.229.04:15:45.99#ibcon#read 4, iclass 4, count 2 2006.229.04:15:45.99#ibcon#about to read 5, iclass 4, count 2 2006.229.04:15:45.99#ibcon#read 5, iclass 4, count 2 2006.229.04:15:45.99#ibcon#about to read 6, iclass 4, count 2 2006.229.04:15:45.99#ibcon#read 6, iclass 4, count 2 2006.229.04:15:45.99#ibcon#end of sib2, iclass 4, count 2 2006.229.04:15:45.99#ibcon#*after write, iclass 4, count 2 2006.229.04:15:45.99#ibcon#*before return 0, iclass 4, count 2 2006.229.04:15:45.99#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:45.99#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:15:45.99#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.04:15:45.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:45.99#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:46.11#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:46.11#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:46.11#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:15:46.11#ibcon#first serial, iclass 4, count 0 2006.229.04:15:46.11#ibcon#enter sib2, iclass 4, count 0 2006.229.04:15:46.11#ibcon#flushed, iclass 4, count 0 2006.229.04:15:46.11#ibcon#about to write, iclass 4, count 0 2006.229.04:15:46.11#ibcon#wrote, iclass 4, count 0 2006.229.04:15:46.11#ibcon#about to read 3, iclass 4, count 0 2006.229.04:15:46.13#ibcon#read 3, iclass 4, count 0 2006.229.04:15:46.13#ibcon#about to read 4, iclass 4, count 0 2006.229.04:15:46.13#ibcon#read 4, iclass 4, count 0 2006.229.04:15:46.13#ibcon#about to read 5, iclass 4, count 0 2006.229.04:15:46.13#ibcon#read 5, iclass 4, count 0 2006.229.04:15:46.13#ibcon#about to read 6, iclass 4, count 0 2006.229.04:15:46.13#ibcon#read 6, iclass 4, count 0 2006.229.04:15:46.13#ibcon#end of sib2, iclass 4, count 0 2006.229.04:15:46.13#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:15:46.13#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:15:46.13#ibcon#[27=USB\r\n] 2006.229.04:15:46.13#ibcon#*before write, iclass 4, count 0 2006.229.04:15:46.13#ibcon#enter sib2, iclass 4, count 0 2006.229.04:15:46.13#ibcon#flushed, iclass 4, count 0 2006.229.04:15:46.13#ibcon#about to write, iclass 4, count 0 2006.229.04:15:46.13#ibcon#wrote, iclass 4, count 0 2006.229.04:15:46.13#ibcon#about to read 3, iclass 4, count 0 2006.229.04:15:46.16#ibcon#read 3, iclass 4, count 0 2006.229.04:15:46.16#ibcon#about to read 4, iclass 4, count 0 2006.229.04:15:46.16#ibcon#read 4, iclass 4, count 0 2006.229.04:15:46.16#ibcon#about to read 5, iclass 4, count 0 2006.229.04:15:46.16#ibcon#read 5, iclass 4, count 0 2006.229.04:15:46.16#ibcon#about to read 6, iclass 4, count 0 2006.229.04:15:46.16#ibcon#read 6, iclass 4, count 0 2006.229.04:15:46.16#ibcon#end of sib2, iclass 4, count 0 2006.229.04:15:46.16#ibcon#*after write, iclass 4, count 0 2006.229.04:15:46.16#ibcon#*before return 0, iclass 4, count 0 2006.229.04:15:46.16#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:46.16#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:15:46.16#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:15:46.16#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:15:46.16$vck44/vblo=5,709.99 2006.229.04:15:46.16#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.04:15:46.16#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.04:15:46.16#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:46.16#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:46.16#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:46.16#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:46.16#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:15:46.16#ibcon#first serial, iclass 6, count 0 2006.229.04:15:46.16#ibcon#enter sib2, iclass 6, count 0 2006.229.04:15:46.16#ibcon#flushed, iclass 6, count 0 2006.229.04:15:46.16#ibcon#about to write, iclass 6, count 0 2006.229.04:15:46.16#ibcon#wrote, iclass 6, count 0 2006.229.04:15:46.16#ibcon#about to read 3, iclass 6, count 0 2006.229.04:15:46.18#ibcon#read 3, iclass 6, count 0 2006.229.04:15:46.18#ibcon#about to read 4, iclass 6, count 0 2006.229.04:15:46.18#ibcon#read 4, iclass 6, count 0 2006.229.04:15:46.18#ibcon#about to read 5, iclass 6, count 0 2006.229.04:15:46.18#ibcon#read 5, iclass 6, count 0 2006.229.04:15:46.18#ibcon#about to read 6, iclass 6, count 0 2006.229.04:15:46.18#ibcon#read 6, iclass 6, count 0 2006.229.04:15:46.18#ibcon#end of sib2, iclass 6, count 0 2006.229.04:15:46.18#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:15:46.18#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:15:46.18#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:15:46.18#ibcon#*before write, iclass 6, count 0 2006.229.04:15:46.18#ibcon#enter sib2, iclass 6, count 0 2006.229.04:15:46.18#ibcon#flushed, iclass 6, count 0 2006.229.04:15:46.18#ibcon#about to write, iclass 6, count 0 2006.229.04:15:46.18#ibcon#wrote, iclass 6, count 0 2006.229.04:15:46.18#ibcon#about to read 3, iclass 6, count 0 2006.229.04:15:46.22#ibcon#read 3, iclass 6, count 0 2006.229.04:15:46.22#ibcon#about to read 4, iclass 6, count 0 2006.229.04:15:46.22#ibcon#read 4, iclass 6, count 0 2006.229.04:15:46.22#ibcon#about to read 5, iclass 6, count 0 2006.229.04:15:46.22#ibcon#read 5, iclass 6, count 0 2006.229.04:15:46.22#ibcon#about to read 6, iclass 6, count 0 2006.229.04:15:46.22#ibcon#read 6, iclass 6, count 0 2006.229.04:15:46.22#ibcon#end of sib2, iclass 6, count 0 2006.229.04:15:46.22#ibcon#*after write, iclass 6, count 0 2006.229.04:15:46.22#ibcon#*before return 0, iclass 6, count 0 2006.229.04:15:46.22#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:46.22#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:15:46.22#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:15:46.22#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:15:46.22$vck44/vb=5,4 2006.229.04:15:46.22#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.04:15:46.22#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.04:15:46.22#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:46.22#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:46.28#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:46.28#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:46.28#ibcon#enter wrdev, iclass 10, count 2 2006.229.04:15:46.28#ibcon#first serial, iclass 10, count 2 2006.229.04:15:46.28#ibcon#enter sib2, iclass 10, count 2 2006.229.04:15:46.28#ibcon#flushed, iclass 10, count 2 2006.229.04:15:46.28#ibcon#about to write, iclass 10, count 2 2006.229.04:15:46.28#ibcon#wrote, iclass 10, count 2 2006.229.04:15:46.28#ibcon#about to read 3, iclass 10, count 2 2006.229.04:15:46.30#ibcon#read 3, iclass 10, count 2 2006.229.04:15:46.30#ibcon#about to read 4, iclass 10, count 2 2006.229.04:15:46.30#ibcon#read 4, iclass 10, count 2 2006.229.04:15:46.30#ibcon#about to read 5, iclass 10, count 2 2006.229.04:15:46.30#ibcon#read 5, iclass 10, count 2 2006.229.04:15:46.30#ibcon#about to read 6, iclass 10, count 2 2006.229.04:15:46.30#ibcon#read 6, iclass 10, count 2 2006.229.04:15:46.30#ibcon#end of sib2, iclass 10, count 2 2006.229.04:15:46.30#ibcon#*mode == 0, iclass 10, count 2 2006.229.04:15:46.30#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.04:15:46.30#ibcon#[27=AT05-04\r\n] 2006.229.04:15:46.30#ibcon#*before write, iclass 10, count 2 2006.229.04:15:46.30#ibcon#enter sib2, iclass 10, count 2 2006.229.04:15:46.30#ibcon#flushed, iclass 10, count 2 2006.229.04:15:46.30#ibcon#about to write, iclass 10, count 2 2006.229.04:15:46.30#ibcon#wrote, iclass 10, count 2 2006.229.04:15:46.30#ibcon#about to read 3, iclass 10, count 2 2006.229.04:15:46.33#ibcon#read 3, iclass 10, count 2 2006.229.04:15:46.33#ibcon#about to read 4, iclass 10, count 2 2006.229.04:15:46.33#ibcon#read 4, iclass 10, count 2 2006.229.04:15:46.33#ibcon#about to read 5, iclass 10, count 2 2006.229.04:15:46.33#ibcon#read 5, iclass 10, count 2 2006.229.04:15:46.33#ibcon#about to read 6, iclass 10, count 2 2006.229.04:15:46.33#ibcon#read 6, iclass 10, count 2 2006.229.04:15:46.33#ibcon#end of sib2, iclass 10, count 2 2006.229.04:15:46.33#ibcon#*after write, iclass 10, count 2 2006.229.04:15:46.33#ibcon#*before return 0, iclass 10, count 2 2006.229.04:15:46.33#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:46.33#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:15:46.33#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.04:15:46.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:46.33#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:46.45#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:46.45#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:46.45#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:15:46.45#ibcon#first serial, iclass 10, count 0 2006.229.04:15:46.45#ibcon#enter sib2, iclass 10, count 0 2006.229.04:15:46.45#ibcon#flushed, iclass 10, count 0 2006.229.04:15:46.45#ibcon#about to write, iclass 10, count 0 2006.229.04:15:46.45#ibcon#wrote, iclass 10, count 0 2006.229.04:15:46.45#ibcon#about to read 3, iclass 10, count 0 2006.229.04:15:46.47#ibcon#read 3, iclass 10, count 0 2006.229.04:15:46.47#ibcon#about to read 4, iclass 10, count 0 2006.229.04:15:46.47#ibcon#read 4, iclass 10, count 0 2006.229.04:15:46.47#ibcon#about to read 5, iclass 10, count 0 2006.229.04:15:46.47#ibcon#read 5, iclass 10, count 0 2006.229.04:15:46.47#ibcon#about to read 6, iclass 10, count 0 2006.229.04:15:46.47#ibcon#read 6, iclass 10, count 0 2006.229.04:15:46.47#ibcon#end of sib2, iclass 10, count 0 2006.229.04:15:46.47#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:15:46.47#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:15:46.47#ibcon#[27=USB\r\n] 2006.229.04:15:46.47#ibcon#*before write, iclass 10, count 0 2006.229.04:15:46.47#ibcon#enter sib2, iclass 10, count 0 2006.229.04:15:46.47#ibcon#flushed, iclass 10, count 0 2006.229.04:15:46.47#ibcon#about to write, iclass 10, count 0 2006.229.04:15:46.47#ibcon#wrote, iclass 10, count 0 2006.229.04:15:46.47#ibcon#about to read 3, iclass 10, count 0 2006.229.04:15:46.50#ibcon#read 3, iclass 10, count 0 2006.229.04:15:46.50#ibcon#about to read 4, iclass 10, count 0 2006.229.04:15:46.50#ibcon#read 4, iclass 10, count 0 2006.229.04:15:46.50#ibcon#about to read 5, iclass 10, count 0 2006.229.04:15:46.50#ibcon#read 5, iclass 10, count 0 2006.229.04:15:46.50#ibcon#about to read 6, iclass 10, count 0 2006.229.04:15:46.50#ibcon#read 6, iclass 10, count 0 2006.229.04:15:46.50#ibcon#end of sib2, iclass 10, count 0 2006.229.04:15:46.50#ibcon#*after write, iclass 10, count 0 2006.229.04:15:46.50#ibcon#*before return 0, iclass 10, count 0 2006.229.04:15:46.50#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:46.50#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:15:46.50#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:15:46.50#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:15:46.50$vck44/vblo=6,719.99 2006.229.04:15:46.50#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:15:46.50#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:15:46.50#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:46.50#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:46.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:46.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:46.50#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:15:46.50#ibcon#first serial, iclass 12, count 0 2006.229.04:15:46.50#ibcon#enter sib2, iclass 12, count 0 2006.229.04:15:46.50#ibcon#flushed, iclass 12, count 0 2006.229.04:15:46.50#ibcon#about to write, iclass 12, count 0 2006.229.04:15:46.50#ibcon#wrote, iclass 12, count 0 2006.229.04:15:46.50#ibcon#about to read 3, iclass 12, count 0 2006.229.04:15:46.52#ibcon#read 3, iclass 12, count 0 2006.229.04:15:46.52#ibcon#about to read 4, iclass 12, count 0 2006.229.04:15:46.52#ibcon#read 4, iclass 12, count 0 2006.229.04:15:46.52#ibcon#about to read 5, iclass 12, count 0 2006.229.04:15:46.52#ibcon#read 5, iclass 12, count 0 2006.229.04:15:46.52#ibcon#about to read 6, iclass 12, count 0 2006.229.04:15:46.52#ibcon#read 6, iclass 12, count 0 2006.229.04:15:46.52#ibcon#end of sib2, iclass 12, count 0 2006.229.04:15:46.52#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:15:46.52#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:15:46.52#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:15:46.52#ibcon#*before write, iclass 12, count 0 2006.229.04:15:46.52#ibcon#enter sib2, iclass 12, count 0 2006.229.04:15:46.52#ibcon#flushed, iclass 12, count 0 2006.229.04:15:46.52#ibcon#about to write, iclass 12, count 0 2006.229.04:15:46.52#ibcon#wrote, iclass 12, count 0 2006.229.04:15:46.52#ibcon#about to read 3, iclass 12, count 0 2006.229.04:15:46.56#ibcon#read 3, iclass 12, count 0 2006.229.04:15:46.56#ibcon#about to read 4, iclass 12, count 0 2006.229.04:15:46.56#ibcon#read 4, iclass 12, count 0 2006.229.04:15:46.56#ibcon#about to read 5, iclass 12, count 0 2006.229.04:15:46.56#ibcon#read 5, iclass 12, count 0 2006.229.04:15:46.56#ibcon#about to read 6, iclass 12, count 0 2006.229.04:15:46.56#ibcon#read 6, iclass 12, count 0 2006.229.04:15:46.56#ibcon#end of sib2, iclass 12, count 0 2006.229.04:15:46.56#ibcon#*after write, iclass 12, count 0 2006.229.04:15:46.56#ibcon#*before return 0, iclass 12, count 0 2006.229.04:15:46.56#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:46.56#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:15:46.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:15:46.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:15:46.56$vck44/vb=6,4 2006.229.04:15:46.56#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.04:15:46.56#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.04:15:46.56#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:46.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:46.62#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:46.62#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:46.62#ibcon#enter wrdev, iclass 14, count 2 2006.229.04:15:46.62#ibcon#first serial, iclass 14, count 2 2006.229.04:15:46.62#ibcon#enter sib2, iclass 14, count 2 2006.229.04:15:46.62#ibcon#flushed, iclass 14, count 2 2006.229.04:15:46.62#ibcon#about to write, iclass 14, count 2 2006.229.04:15:46.62#ibcon#wrote, iclass 14, count 2 2006.229.04:15:46.62#ibcon#about to read 3, iclass 14, count 2 2006.229.04:15:46.64#ibcon#read 3, iclass 14, count 2 2006.229.04:15:46.64#ibcon#about to read 4, iclass 14, count 2 2006.229.04:15:46.64#ibcon#read 4, iclass 14, count 2 2006.229.04:15:46.64#ibcon#about to read 5, iclass 14, count 2 2006.229.04:15:46.64#ibcon#read 5, iclass 14, count 2 2006.229.04:15:46.64#ibcon#about to read 6, iclass 14, count 2 2006.229.04:15:46.64#ibcon#read 6, iclass 14, count 2 2006.229.04:15:46.64#ibcon#end of sib2, iclass 14, count 2 2006.229.04:15:46.64#ibcon#*mode == 0, iclass 14, count 2 2006.229.04:15:46.64#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.04:15:46.64#ibcon#[27=AT06-04\r\n] 2006.229.04:15:46.64#ibcon#*before write, iclass 14, count 2 2006.229.04:15:46.64#ibcon#enter sib2, iclass 14, count 2 2006.229.04:15:46.64#ibcon#flushed, iclass 14, count 2 2006.229.04:15:46.64#ibcon#about to write, iclass 14, count 2 2006.229.04:15:46.64#ibcon#wrote, iclass 14, count 2 2006.229.04:15:46.64#ibcon#about to read 3, iclass 14, count 2 2006.229.04:15:46.67#ibcon#read 3, iclass 14, count 2 2006.229.04:15:46.67#ibcon#about to read 4, iclass 14, count 2 2006.229.04:15:46.67#ibcon#read 4, iclass 14, count 2 2006.229.04:15:46.67#ibcon#about to read 5, iclass 14, count 2 2006.229.04:15:46.67#ibcon#read 5, iclass 14, count 2 2006.229.04:15:46.67#ibcon#about to read 6, iclass 14, count 2 2006.229.04:15:46.67#ibcon#read 6, iclass 14, count 2 2006.229.04:15:46.67#ibcon#end of sib2, iclass 14, count 2 2006.229.04:15:46.67#ibcon#*after write, iclass 14, count 2 2006.229.04:15:46.67#ibcon#*before return 0, iclass 14, count 2 2006.229.04:15:46.67#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:46.67#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:15:46.67#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.04:15:46.67#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:46.67#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:46.79#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:46.79#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:46.79#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:15:46.79#ibcon#first serial, iclass 14, count 0 2006.229.04:15:46.79#ibcon#enter sib2, iclass 14, count 0 2006.229.04:15:46.79#ibcon#flushed, iclass 14, count 0 2006.229.04:15:46.79#ibcon#about to write, iclass 14, count 0 2006.229.04:15:46.79#ibcon#wrote, iclass 14, count 0 2006.229.04:15:46.79#ibcon#about to read 3, iclass 14, count 0 2006.229.04:15:46.81#ibcon#read 3, iclass 14, count 0 2006.229.04:15:46.81#ibcon#about to read 4, iclass 14, count 0 2006.229.04:15:46.81#ibcon#read 4, iclass 14, count 0 2006.229.04:15:46.81#ibcon#about to read 5, iclass 14, count 0 2006.229.04:15:46.81#ibcon#read 5, iclass 14, count 0 2006.229.04:15:46.81#ibcon#about to read 6, iclass 14, count 0 2006.229.04:15:46.81#ibcon#read 6, iclass 14, count 0 2006.229.04:15:46.81#ibcon#end of sib2, iclass 14, count 0 2006.229.04:15:46.81#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:15:46.81#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:15:46.81#ibcon#[27=USB\r\n] 2006.229.04:15:46.81#ibcon#*before write, iclass 14, count 0 2006.229.04:15:46.81#ibcon#enter sib2, iclass 14, count 0 2006.229.04:15:46.81#ibcon#flushed, iclass 14, count 0 2006.229.04:15:46.81#ibcon#about to write, iclass 14, count 0 2006.229.04:15:46.81#ibcon#wrote, iclass 14, count 0 2006.229.04:15:46.81#ibcon#about to read 3, iclass 14, count 0 2006.229.04:15:46.84#ibcon#read 3, iclass 14, count 0 2006.229.04:15:46.84#ibcon#about to read 4, iclass 14, count 0 2006.229.04:15:46.84#ibcon#read 4, iclass 14, count 0 2006.229.04:15:46.84#ibcon#about to read 5, iclass 14, count 0 2006.229.04:15:46.84#ibcon#read 5, iclass 14, count 0 2006.229.04:15:46.84#ibcon#about to read 6, iclass 14, count 0 2006.229.04:15:46.84#ibcon#read 6, iclass 14, count 0 2006.229.04:15:46.84#ibcon#end of sib2, iclass 14, count 0 2006.229.04:15:46.84#ibcon#*after write, iclass 14, count 0 2006.229.04:15:46.84#ibcon#*before return 0, iclass 14, count 0 2006.229.04:15:46.84#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:46.84#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:15:46.84#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:15:46.84#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:15:46.84$vck44/vblo=7,734.99 2006.229.04:15:46.84#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.04:15:46.84#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.04:15:46.84#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:46.84#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:46.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:46.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:46.84#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:15:46.84#ibcon#first serial, iclass 16, count 0 2006.229.04:15:46.84#ibcon#enter sib2, iclass 16, count 0 2006.229.04:15:46.84#ibcon#flushed, iclass 16, count 0 2006.229.04:15:46.84#ibcon#about to write, iclass 16, count 0 2006.229.04:15:46.84#ibcon#wrote, iclass 16, count 0 2006.229.04:15:46.84#ibcon#about to read 3, iclass 16, count 0 2006.229.04:15:46.86#ibcon#read 3, iclass 16, count 0 2006.229.04:15:46.86#ibcon#about to read 4, iclass 16, count 0 2006.229.04:15:46.86#ibcon#read 4, iclass 16, count 0 2006.229.04:15:46.86#ibcon#about to read 5, iclass 16, count 0 2006.229.04:15:46.86#ibcon#read 5, iclass 16, count 0 2006.229.04:15:46.86#ibcon#about to read 6, iclass 16, count 0 2006.229.04:15:46.86#ibcon#read 6, iclass 16, count 0 2006.229.04:15:46.86#ibcon#end of sib2, iclass 16, count 0 2006.229.04:15:46.86#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:15:46.86#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:15:46.86#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:15:46.86#ibcon#*before write, iclass 16, count 0 2006.229.04:15:46.86#ibcon#enter sib2, iclass 16, count 0 2006.229.04:15:46.86#ibcon#flushed, iclass 16, count 0 2006.229.04:15:46.86#ibcon#about to write, iclass 16, count 0 2006.229.04:15:46.86#ibcon#wrote, iclass 16, count 0 2006.229.04:15:46.86#ibcon#about to read 3, iclass 16, count 0 2006.229.04:15:46.90#ibcon#read 3, iclass 16, count 0 2006.229.04:15:46.90#ibcon#about to read 4, iclass 16, count 0 2006.229.04:15:46.90#ibcon#read 4, iclass 16, count 0 2006.229.04:15:46.90#ibcon#about to read 5, iclass 16, count 0 2006.229.04:15:46.90#ibcon#read 5, iclass 16, count 0 2006.229.04:15:46.90#ibcon#about to read 6, iclass 16, count 0 2006.229.04:15:46.90#ibcon#read 6, iclass 16, count 0 2006.229.04:15:46.90#ibcon#end of sib2, iclass 16, count 0 2006.229.04:15:46.90#ibcon#*after write, iclass 16, count 0 2006.229.04:15:46.90#ibcon#*before return 0, iclass 16, count 0 2006.229.04:15:46.90#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:46.90#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:15:46.90#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:15:46.90#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:15:46.90$vck44/vb=7,4 2006.229.04:15:46.90#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.04:15:46.90#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.04:15:46.90#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:46.90#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:46.96#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:46.96#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:46.96#ibcon#enter wrdev, iclass 18, count 2 2006.229.04:15:46.96#ibcon#first serial, iclass 18, count 2 2006.229.04:15:46.96#ibcon#enter sib2, iclass 18, count 2 2006.229.04:15:46.96#ibcon#flushed, iclass 18, count 2 2006.229.04:15:46.96#ibcon#about to write, iclass 18, count 2 2006.229.04:15:46.96#ibcon#wrote, iclass 18, count 2 2006.229.04:15:46.96#ibcon#about to read 3, iclass 18, count 2 2006.229.04:15:46.98#ibcon#read 3, iclass 18, count 2 2006.229.04:15:46.98#ibcon#about to read 4, iclass 18, count 2 2006.229.04:15:46.98#ibcon#read 4, iclass 18, count 2 2006.229.04:15:46.98#ibcon#about to read 5, iclass 18, count 2 2006.229.04:15:46.98#ibcon#read 5, iclass 18, count 2 2006.229.04:15:46.98#ibcon#about to read 6, iclass 18, count 2 2006.229.04:15:46.98#ibcon#read 6, iclass 18, count 2 2006.229.04:15:46.98#ibcon#end of sib2, iclass 18, count 2 2006.229.04:15:46.98#ibcon#*mode == 0, iclass 18, count 2 2006.229.04:15:46.98#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.04:15:46.98#ibcon#[27=AT07-04\r\n] 2006.229.04:15:46.98#ibcon#*before write, iclass 18, count 2 2006.229.04:15:46.98#ibcon#enter sib2, iclass 18, count 2 2006.229.04:15:46.98#ibcon#flushed, iclass 18, count 2 2006.229.04:15:46.98#ibcon#about to write, iclass 18, count 2 2006.229.04:15:46.98#ibcon#wrote, iclass 18, count 2 2006.229.04:15:46.98#ibcon#about to read 3, iclass 18, count 2 2006.229.04:15:47.01#ibcon#read 3, iclass 18, count 2 2006.229.04:15:47.01#ibcon#about to read 4, iclass 18, count 2 2006.229.04:15:47.01#ibcon#read 4, iclass 18, count 2 2006.229.04:15:47.01#ibcon#about to read 5, iclass 18, count 2 2006.229.04:15:47.01#ibcon#read 5, iclass 18, count 2 2006.229.04:15:47.01#ibcon#about to read 6, iclass 18, count 2 2006.229.04:15:47.01#ibcon#read 6, iclass 18, count 2 2006.229.04:15:47.01#ibcon#end of sib2, iclass 18, count 2 2006.229.04:15:47.01#ibcon#*after write, iclass 18, count 2 2006.229.04:15:47.01#ibcon#*before return 0, iclass 18, count 2 2006.229.04:15:47.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:47.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:15:47.01#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.04:15:47.01#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:47.01#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:47.13#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:47.13#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:47.13#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:15:47.13#ibcon#first serial, iclass 18, count 0 2006.229.04:15:47.13#ibcon#enter sib2, iclass 18, count 0 2006.229.04:15:47.13#ibcon#flushed, iclass 18, count 0 2006.229.04:15:47.13#ibcon#about to write, iclass 18, count 0 2006.229.04:15:47.13#ibcon#wrote, iclass 18, count 0 2006.229.04:15:47.13#ibcon#about to read 3, iclass 18, count 0 2006.229.04:15:47.15#ibcon#read 3, iclass 18, count 0 2006.229.04:15:47.15#ibcon#about to read 4, iclass 18, count 0 2006.229.04:15:47.15#ibcon#read 4, iclass 18, count 0 2006.229.04:15:47.15#ibcon#about to read 5, iclass 18, count 0 2006.229.04:15:47.15#ibcon#read 5, iclass 18, count 0 2006.229.04:15:47.15#ibcon#about to read 6, iclass 18, count 0 2006.229.04:15:47.15#ibcon#read 6, iclass 18, count 0 2006.229.04:15:47.15#ibcon#end of sib2, iclass 18, count 0 2006.229.04:15:47.15#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:15:47.15#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:15:47.15#ibcon#[27=USB\r\n] 2006.229.04:15:47.15#ibcon#*before write, iclass 18, count 0 2006.229.04:15:47.15#ibcon#enter sib2, iclass 18, count 0 2006.229.04:15:47.15#ibcon#flushed, iclass 18, count 0 2006.229.04:15:47.15#ibcon#about to write, iclass 18, count 0 2006.229.04:15:47.15#ibcon#wrote, iclass 18, count 0 2006.229.04:15:47.15#ibcon#about to read 3, iclass 18, count 0 2006.229.04:15:47.18#ibcon#read 3, iclass 18, count 0 2006.229.04:15:47.18#ibcon#about to read 4, iclass 18, count 0 2006.229.04:15:47.18#ibcon#read 4, iclass 18, count 0 2006.229.04:15:47.18#ibcon#about to read 5, iclass 18, count 0 2006.229.04:15:47.18#ibcon#read 5, iclass 18, count 0 2006.229.04:15:47.18#ibcon#about to read 6, iclass 18, count 0 2006.229.04:15:47.18#ibcon#read 6, iclass 18, count 0 2006.229.04:15:47.18#ibcon#end of sib2, iclass 18, count 0 2006.229.04:15:47.18#ibcon#*after write, iclass 18, count 0 2006.229.04:15:47.18#ibcon#*before return 0, iclass 18, count 0 2006.229.04:15:47.18#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:47.18#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:15:47.18#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:15:47.18#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:15:47.18$vck44/vblo=8,744.99 2006.229.04:15:47.18#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.04:15:47.18#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.04:15:47.18#ibcon#ireg 17 cls_cnt 0 2006.229.04:15:47.18#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:47.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:47.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:47.18#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:15:47.18#ibcon#first serial, iclass 20, count 0 2006.229.04:15:47.18#ibcon#enter sib2, iclass 20, count 0 2006.229.04:15:47.18#ibcon#flushed, iclass 20, count 0 2006.229.04:15:47.18#ibcon#about to write, iclass 20, count 0 2006.229.04:15:47.18#ibcon#wrote, iclass 20, count 0 2006.229.04:15:47.18#ibcon#about to read 3, iclass 20, count 0 2006.229.04:15:47.20#ibcon#read 3, iclass 20, count 0 2006.229.04:15:47.20#ibcon#about to read 4, iclass 20, count 0 2006.229.04:15:47.20#ibcon#read 4, iclass 20, count 0 2006.229.04:15:47.20#ibcon#about to read 5, iclass 20, count 0 2006.229.04:15:47.20#ibcon#read 5, iclass 20, count 0 2006.229.04:15:47.20#ibcon#about to read 6, iclass 20, count 0 2006.229.04:15:47.20#ibcon#read 6, iclass 20, count 0 2006.229.04:15:47.20#ibcon#end of sib2, iclass 20, count 0 2006.229.04:15:47.20#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:15:47.20#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:15:47.20#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:15:47.20#ibcon#*before write, iclass 20, count 0 2006.229.04:15:47.20#ibcon#enter sib2, iclass 20, count 0 2006.229.04:15:47.20#ibcon#flushed, iclass 20, count 0 2006.229.04:15:47.20#ibcon#about to write, iclass 20, count 0 2006.229.04:15:47.20#ibcon#wrote, iclass 20, count 0 2006.229.04:15:47.20#ibcon#about to read 3, iclass 20, count 0 2006.229.04:15:47.24#ibcon#read 3, iclass 20, count 0 2006.229.04:15:47.24#ibcon#about to read 4, iclass 20, count 0 2006.229.04:15:47.24#ibcon#read 4, iclass 20, count 0 2006.229.04:15:47.24#ibcon#about to read 5, iclass 20, count 0 2006.229.04:15:47.24#ibcon#read 5, iclass 20, count 0 2006.229.04:15:47.24#ibcon#about to read 6, iclass 20, count 0 2006.229.04:15:47.24#ibcon#read 6, iclass 20, count 0 2006.229.04:15:47.24#ibcon#end of sib2, iclass 20, count 0 2006.229.04:15:47.24#ibcon#*after write, iclass 20, count 0 2006.229.04:15:47.24#ibcon#*before return 0, iclass 20, count 0 2006.229.04:15:47.24#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:47.24#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:15:47.24#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:15:47.24#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:15:47.24$vck44/vb=8,4 2006.229.04:15:47.24#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.04:15:47.24#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.04:15:47.24#ibcon#ireg 11 cls_cnt 2 2006.229.04:15:47.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:47.30#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:47.30#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:47.30#ibcon#enter wrdev, iclass 22, count 2 2006.229.04:15:47.30#ibcon#first serial, iclass 22, count 2 2006.229.04:15:47.30#ibcon#enter sib2, iclass 22, count 2 2006.229.04:15:47.30#ibcon#flushed, iclass 22, count 2 2006.229.04:15:47.30#ibcon#about to write, iclass 22, count 2 2006.229.04:15:47.30#ibcon#wrote, iclass 22, count 2 2006.229.04:15:47.30#ibcon#about to read 3, iclass 22, count 2 2006.229.04:15:47.32#ibcon#read 3, iclass 22, count 2 2006.229.04:15:47.32#ibcon#about to read 4, iclass 22, count 2 2006.229.04:15:47.32#ibcon#read 4, iclass 22, count 2 2006.229.04:15:47.32#ibcon#about to read 5, iclass 22, count 2 2006.229.04:15:47.32#ibcon#read 5, iclass 22, count 2 2006.229.04:15:47.32#ibcon#about to read 6, iclass 22, count 2 2006.229.04:15:47.32#ibcon#read 6, iclass 22, count 2 2006.229.04:15:47.32#ibcon#end of sib2, iclass 22, count 2 2006.229.04:15:47.32#ibcon#*mode == 0, iclass 22, count 2 2006.229.04:15:47.32#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.04:15:47.32#ibcon#[27=AT08-04\r\n] 2006.229.04:15:47.32#ibcon#*before write, iclass 22, count 2 2006.229.04:15:47.32#ibcon#enter sib2, iclass 22, count 2 2006.229.04:15:47.32#ibcon#flushed, iclass 22, count 2 2006.229.04:15:47.32#ibcon#about to write, iclass 22, count 2 2006.229.04:15:47.32#ibcon#wrote, iclass 22, count 2 2006.229.04:15:47.32#ibcon#about to read 3, iclass 22, count 2 2006.229.04:15:47.35#ibcon#read 3, iclass 22, count 2 2006.229.04:15:47.35#ibcon#about to read 4, iclass 22, count 2 2006.229.04:15:47.35#ibcon#read 4, iclass 22, count 2 2006.229.04:15:47.35#ibcon#about to read 5, iclass 22, count 2 2006.229.04:15:47.35#ibcon#read 5, iclass 22, count 2 2006.229.04:15:47.35#ibcon#about to read 6, iclass 22, count 2 2006.229.04:15:47.35#ibcon#read 6, iclass 22, count 2 2006.229.04:15:47.35#ibcon#end of sib2, iclass 22, count 2 2006.229.04:15:47.35#ibcon#*after write, iclass 22, count 2 2006.229.04:15:47.35#ibcon#*before return 0, iclass 22, count 2 2006.229.04:15:47.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:47.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:15:47.35#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.04:15:47.35#ibcon#ireg 7 cls_cnt 0 2006.229.04:15:47.35#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:47.47#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:47.47#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:47.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:15:47.47#ibcon#first serial, iclass 22, count 0 2006.229.04:15:47.47#ibcon#enter sib2, iclass 22, count 0 2006.229.04:15:47.47#ibcon#flushed, iclass 22, count 0 2006.229.04:15:47.47#ibcon#about to write, iclass 22, count 0 2006.229.04:15:47.47#ibcon#wrote, iclass 22, count 0 2006.229.04:15:47.47#ibcon#about to read 3, iclass 22, count 0 2006.229.04:15:47.49#ibcon#read 3, iclass 22, count 0 2006.229.04:15:47.49#ibcon#about to read 4, iclass 22, count 0 2006.229.04:15:47.49#ibcon#read 4, iclass 22, count 0 2006.229.04:15:47.49#ibcon#about to read 5, iclass 22, count 0 2006.229.04:15:47.49#ibcon#read 5, iclass 22, count 0 2006.229.04:15:47.49#ibcon#about to read 6, iclass 22, count 0 2006.229.04:15:47.49#ibcon#read 6, iclass 22, count 0 2006.229.04:15:47.49#ibcon#end of sib2, iclass 22, count 0 2006.229.04:15:47.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:15:47.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:15:47.49#ibcon#[27=USB\r\n] 2006.229.04:15:47.49#ibcon#*before write, iclass 22, count 0 2006.229.04:15:47.49#ibcon#enter sib2, iclass 22, count 0 2006.229.04:15:47.49#ibcon#flushed, iclass 22, count 0 2006.229.04:15:47.49#ibcon#about to write, iclass 22, count 0 2006.229.04:15:47.49#ibcon#wrote, iclass 22, count 0 2006.229.04:15:47.49#ibcon#about to read 3, iclass 22, count 0 2006.229.04:15:47.52#ibcon#read 3, iclass 22, count 0 2006.229.04:15:47.52#ibcon#about to read 4, iclass 22, count 0 2006.229.04:15:47.52#ibcon#read 4, iclass 22, count 0 2006.229.04:15:47.52#ibcon#about to read 5, iclass 22, count 0 2006.229.04:15:47.52#ibcon#read 5, iclass 22, count 0 2006.229.04:15:47.52#ibcon#about to read 6, iclass 22, count 0 2006.229.04:15:47.52#ibcon#read 6, iclass 22, count 0 2006.229.04:15:47.52#ibcon#end of sib2, iclass 22, count 0 2006.229.04:15:47.52#ibcon#*after write, iclass 22, count 0 2006.229.04:15:47.52#ibcon#*before return 0, iclass 22, count 0 2006.229.04:15:47.52#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:47.52#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:15:47.52#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:15:47.52#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:15:47.52$vck44/vabw=wide 2006.229.04:15:47.52#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.04:15:47.52#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.04:15:47.52#ibcon#ireg 8 cls_cnt 0 2006.229.04:15:47.52#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:47.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:47.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:47.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:15:47.52#ibcon#first serial, iclass 24, count 0 2006.229.04:15:47.52#ibcon#enter sib2, iclass 24, count 0 2006.229.04:15:47.52#ibcon#flushed, iclass 24, count 0 2006.229.04:15:47.52#ibcon#about to write, iclass 24, count 0 2006.229.04:15:47.52#ibcon#wrote, iclass 24, count 0 2006.229.04:15:47.52#ibcon#about to read 3, iclass 24, count 0 2006.229.04:15:47.54#ibcon#read 3, iclass 24, count 0 2006.229.04:15:47.54#ibcon#about to read 4, iclass 24, count 0 2006.229.04:15:47.54#ibcon#read 4, iclass 24, count 0 2006.229.04:15:47.54#ibcon#about to read 5, iclass 24, count 0 2006.229.04:15:47.54#ibcon#read 5, iclass 24, count 0 2006.229.04:15:47.54#ibcon#about to read 6, iclass 24, count 0 2006.229.04:15:47.54#ibcon#read 6, iclass 24, count 0 2006.229.04:15:47.54#ibcon#end of sib2, iclass 24, count 0 2006.229.04:15:47.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:15:47.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:15:47.54#ibcon#[25=BW32\r\n] 2006.229.04:15:47.54#ibcon#*before write, iclass 24, count 0 2006.229.04:15:47.54#ibcon#enter sib2, iclass 24, count 0 2006.229.04:15:47.54#ibcon#flushed, iclass 24, count 0 2006.229.04:15:47.54#ibcon#about to write, iclass 24, count 0 2006.229.04:15:47.54#ibcon#wrote, iclass 24, count 0 2006.229.04:15:47.54#ibcon#about to read 3, iclass 24, count 0 2006.229.04:15:47.57#ibcon#read 3, iclass 24, count 0 2006.229.04:15:47.57#ibcon#about to read 4, iclass 24, count 0 2006.229.04:15:47.57#ibcon#read 4, iclass 24, count 0 2006.229.04:15:47.57#ibcon#about to read 5, iclass 24, count 0 2006.229.04:15:47.57#ibcon#read 5, iclass 24, count 0 2006.229.04:15:47.57#ibcon#about to read 6, iclass 24, count 0 2006.229.04:15:47.57#ibcon#read 6, iclass 24, count 0 2006.229.04:15:47.57#ibcon#end of sib2, iclass 24, count 0 2006.229.04:15:47.57#ibcon#*after write, iclass 24, count 0 2006.229.04:15:47.57#ibcon#*before return 0, iclass 24, count 0 2006.229.04:15:47.57#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:47.57#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:15:47.57#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:15:47.57#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:15:47.57$vck44/vbbw=wide 2006.229.04:15:47.57#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.04:15:47.57#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.04:15:47.57#ibcon#ireg 8 cls_cnt 0 2006.229.04:15:47.57#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:15:47.64#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:15:47.64#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:15:47.64#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:15:47.64#ibcon#first serial, iclass 26, count 0 2006.229.04:15:47.64#ibcon#enter sib2, iclass 26, count 0 2006.229.04:15:47.64#ibcon#flushed, iclass 26, count 0 2006.229.04:15:47.64#ibcon#about to write, iclass 26, count 0 2006.229.04:15:47.64#ibcon#wrote, iclass 26, count 0 2006.229.04:15:47.64#ibcon#about to read 3, iclass 26, count 0 2006.229.04:15:47.66#ibcon#read 3, iclass 26, count 0 2006.229.04:15:47.66#ibcon#about to read 4, iclass 26, count 0 2006.229.04:15:47.66#ibcon#read 4, iclass 26, count 0 2006.229.04:15:47.66#ibcon#about to read 5, iclass 26, count 0 2006.229.04:15:47.66#ibcon#read 5, iclass 26, count 0 2006.229.04:15:47.66#ibcon#about to read 6, iclass 26, count 0 2006.229.04:15:47.66#ibcon#read 6, iclass 26, count 0 2006.229.04:15:47.66#ibcon#end of sib2, iclass 26, count 0 2006.229.04:15:47.66#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:15:47.66#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:15:47.66#ibcon#[27=BW32\r\n] 2006.229.04:15:47.66#ibcon#*before write, iclass 26, count 0 2006.229.04:15:47.66#ibcon#enter sib2, iclass 26, count 0 2006.229.04:15:47.66#ibcon#flushed, iclass 26, count 0 2006.229.04:15:47.66#ibcon#about to write, iclass 26, count 0 2006.229.04:15:47.66#ibcon#wrote, iclass 26, count 0 2006.229.04:15:47.66#ibcon#about to read 3, iclass 26, count 0 2006.229.04:15:47.69#ibcon#read 3, iclass 26, count 0 2006.229.04:15:47.69#ibcon#about to read 4, iclass 26, count 0 2006.229.04:15:47.69#ibcon#read 4, iclass 26, count 0 2006.229.04:15:47.69#ibcon#about to read 5, iclass 26, count 0 2006.229.04:15:47.69#ibcon#read 5, iclass 26, count 0 2006.229.04:15:47.69#ibcon#about to read 6, iclass 26, count 0 2006.229.04:15:47.69#ibcon#read 6, iclass 26, count 0 2006.229.04:15:47.69#ibcon#end of sib2, iclass 26, count 0 2006.229.04:15:47.69#ibcon#*after write, iclass 26, count 0 2006.229.04:15:47.69#ibcon#*before return 0, iclass 26, count 0 2006.229.04:15:47.69#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:15:47.69#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:15:47.69#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:15:47.69#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:15:47.69$setupk4/ifdk4 2006.229.04:15:47.69$ifdk4/lo= 2006.229.04:15:47.69$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:15:47.69$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:15:47.69$ifdk4/patch= 2006.229.04:15:47.69$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:15:47.69$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:15:47.69$setupk4/!*+20s 2006.229.04:15:51.83#abcon#<5=/05 2.9 4.9 30.49 941000.1\r\n> 2006.229.04:15:51.85#abcon#{5=INTERFACE CLEAR} 2006.229.04:15:51.91#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:16:02.00#abcon#<5=/05 2.9 4.9 30.49 931000.2\r\n> 2006.229.04:16:02.02#abcon#{5=INTERFACE CLEAR} 2006.229.04:16:02.08#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:16:02.20$setupk4/"tpicd 2006.229.04:16:02.20$setupk4/echo=off 2006.229.04:16:02.20$setupk4/xlog=off 2006.229.04:16:02.20:!2006.229.04:21:07 2006.229.04:16:30.14#trakl#Source acquired 2006.229.04:16:32.14#flagr#flagr/antenna,acquired 2006.229.04:21:07.00:preob 2006.229.04:21:07.14/onsource/TRACKING 2006.229.04:21:07.14:!2006.229.04:21:17 2006.229.04:21:17.00:"tape 2006.229.04:21:17.00:"st=record 2006.229.04:21:17.00:data_valid=on 2006.229.04:21:17.00:midob 2006.229.04:21:17.14/onsource/TRACKING 2006.229.04:21:17.14/wx/30.43,1000.1,95 2006.229.04:21:17.30/cable/+6.4090E-03 2006.229.04:21:18.39/va/01,08,usb,yes,30,33 2006.229.04:21:18.39/va/02,07,usb,yes,33,33 2006.229.04:21:18.39/va/03,06,usb,yes,41,43 2006.229.04:21:18.39/va/04,07,usb,yes,34,36 2006.229.04:21:18.39/va/05,04,usb,yes,30,31 2006.229.04:21:18.39/va/06,04,usb,yes,34,34 2006.229.04:21:18.39/va/07,05,usb,yes,30,31 2006.229.04:21:18.39/va/08,06,usb,yes,22,27 2006.229.04:21:18.62/valo/01,524.99,yes,locked 2006.229.04:21:18.62/valo/02,534.99,yes,locked 2006.229.04:21:18.62/valo/03,564.99,yes,locked 2006.229.04:21:18.62/valo/04,624.99,yes,locked 2006.229.04:21:18.62/valo/05,734.99,yes,locked 2006.229.04:21:18.62/valo/06,814.99,yes,locked 2006.229.04:21:18.62/valo/07,864.99,yes,locked 2006.229.04:21:18.62/valo/08,884.99,yes,locked 2006.229.04:21:19.71/vb/01,04,usb,yes,31,29 2006.229.04:21:19.71/vb/02,04,usb,yes,33,33 2006.229.04:21:19.71/vb/03,04,usb,yes,30,33 2006.229.04:21:19.71/vb/04,04,usb,yes,35,33 2006.229.04:21:19.71/vb/05,04,usb,yes,27,29 2006.229.04:21:19.71/vb/06,04,usb,yes,31,28 2006.229.04:21:19.71/vb/07,04,usb,yes,31,31 2006.229.04:21:19.71/vb/08,04,usb,yes,29,32 2006.229.04:21:19.94/vblo/01,629.99,yes,locked 2006.229.04:21:19.94/vblo/02,634.99,yes,locked 2006.229.04:21:19.94/vblo/03,649.99,yes,locked 2006.229.04:21:19.94/vblo/04,679.99,yes,locked 2006.229.04:21:19.94/vblo/05,709.99,yes,locked 2006.229.04:21:19.94/vblo/06,719.99,yes,locked 2006.229.04:21:19.94/vblo/07,734.99,yes,locked 2006.229.04:21:19.94/vblo/08,744.99,yes,locked 2006.229.04:21:20.09/vabw/8 2006.229.04:21:20.24/vbbw/8 2006.229.04:21:20.40/xfe/off,on,12.0 2006.229.04:21:20.79/ifatt/23,28,28,28 2006.229.04:21:21.08/fmout-gps/S +4.50E-07 2006.229.04:21:21.12:!2006.229.04:21:57 2006.229.04:21:57.00:data_valid=off 2006.229.04:21:57.00:"et 2006.229.04:21:57.00:!+3s 2006.229.04:22:00.02:"tape 2006.229.04:22:00.02:postob 2006.229.04:22:00.26/cable/+6.4073E-03 2006.229.04:22:00.26/wx/30.43,1000.1,95 2006.229.04:22:01.08/fmout-gps/S +4.49E-07 2006.229.04:22:01.08:scan_name=229-0423,jd0608,50 2006.229.04:22:01.08:source=0552+398,055530.81,394849.2,2000.0,ccw 2006.229.04:22:02.14#flagr#flagr/antenna,new-source 2006.229.04:22:02.14:checkk5 2006.229.04:22:02.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:22:02.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:22:03.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:22:03.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:22:04.16/chk_obsdata//k5ts1/T2290421??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:22:04.57/chk_obsdata//k5ts2/T2290421??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:22:04.96/chk_obsdata//k5ts3/T2290421??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:22:05.35/chk_obsdata//k5ts4/T2290421??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:22:06.09/k5log//k5ts1_log_newline 2006.229.04:22:06.81/k5log//k5ts2_log_newline 2006.229.04:22:07.51/k5log//k5ts3_log_newline 2006.229.04:22:08.22/k5log//k5ts4_log_newline 2006.229.04:22:08.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:22:08.24:setupk4=1 2006.229.04:22:08.24$setupk4/echo=on 2006.229.04:22:08.24$setupk4/pcalon 2006.229.04:22:08.24$pcalon/"no phase cal control is implemented here 2006.229.04:22:08.24$setupk4/"tpicd=stop 2006.229.04:22:08.24$setupk4/"rec=synch_on 2006.229.04:22:08.24$setupk4/"rec_mode=128 2006.229.04:22:08.24$setupk4/!* 2006.229.04:22:08.24$setupk4/recpk4 2006.229.04:22:08.24$recpk4/recpatch= 2006.229.04:22:08.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:22:08.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:22:08.25$setupk4/vck44 2006.229.04:22:08.25$vck44/valo=1,524.99 2006.229.04:22:08.25#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:22:08.25#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:22:08.25#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:08.25#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:22:08.25#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:22:08.25#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:22:08.25#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:22:08.25#ibcon#first serial, iclass 36, count 0 2006.229.04:22:08.25#ibcon#enter sib2, iclass 36, count 0 2006.229.04:22:08.25#ibcon#flushed, iclass 36, count 0 2006.229.04:22:08.25#ibcon#about to write, iclass 36, count 0 2006.229.04:22:08.25#ibcon#wrote, iclass 36, count 0 2006.229.04:22:08.25#ibcon#about to read 3, iclass 36, count 0 2006.229.04:22:08.27#ibcon#read 3, iclass 36, count 0 2006.229.04:22:08.27#ibcon#about to read 4, iclass 36, count 0 2006.229.04:22:08.27#ibcon#read 4, iclass 36, count 0 2006.229.04:22:08.27#ibcon#about to read 5, iclass 36, count 0 2006.229.04:22:08.27#ibcon#read 5, iclass 36, count 0 2006.229.04:22:08.27#ibcon#about to read 6, iclass 36, count 0 2006.229.04:22:08.27#ibcon#read 6, iclass 36, count 0 2006.229.04:22:08.27#ibcon#end of sib2, iclass 36, count 0 2006.229.04:22:08.27#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:22:08.27#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:22:08.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:22:08.27#ibcon#*before write, iclass 36, count 0 2006.229.04:22:08.27#ibcon#enter sib2, iclass 36, count 0 2006.229.04:22:08.27#ibcon#flushed, iclass 36, count 0 2006.229.04:22:08.27#ibcon#about to write, iclass 36, count 0 2006.229.04:22:08.27#ibcon#wrote, iclass 36, count 0 2006.229.04:22:08.27#ibcon#about to read 3, iclass 36, count 0 2006.229.04:22:08.29#abcon#{5=INTERFACE CLEAR} 2006.229.04:22:08.32#ibcon#read 3, iclass 36, count 0 2006.229.04:22:08.32#ibcon#about to read 4, iclass 36, count 0 2006.229.04:22:08.32#ibcon#read 4, iclass 36, count 0 2006.229.04:22:08.32#ibcon#about to read 5, iclass 36, count 0 2006.229.04:22:08.32#ibcon#read 5, iclass 36, count 0 2006.229.04:22:08.32#ibcon#about to read 6, iclass 36, count 0 2006.229.04:22:08.32#ibcon#read 6, iclass 36, count 0 2006.229.04:22:08.32#ibcon#end of sib2, iclass 36, count 0 2006.229.04:22:08.32#ibcon#*after write, iclass 36, count 0 2006.229.04:22:08.32#ibcon#*before return 0, iclass 36, count 0 2006.229.04:22:08.32#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:22:08.32#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:22:08.32#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:22:08.32#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:22:08.32$vck44/va=1,8 2006.229.04:22:08.32#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.04:22:08.32#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.04:22:08.32#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:08.32#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:22:08.32#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:22:08.32#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:22:08.32#ibcon#enter wrdev, iclass 40, count 2 2006.229.04:22:08.32#ibcon#first serial, iclass 40, count 2 2006.229.04:22:08.32#ibcon#enter sib2, iclass 40, count 2 2006.229.04:22:08.32#ibcon#flushed, iclass 40, count 2 2006.229.04:22:08.32#ibcon#about to write, iclass 40, count 2 2006.229.04:22:08.32#ibcon#wrote, iclass 40, count 2 2006.229.04:22:08.32#ibcon#about to read 3, iclass 40, count 2 2006.229.04:22:08.34#ibcon#read 3, iclass 40, count 2 2006.229.04:22:08.34#ibcon#about to read 4, iclass 40, count 2 2006.229.04:22:08.34#ibcon#read 4, iclass 40, count 2 2006.229.04:22:08.34#ibcon#about to read 5, iclass 40, count 2 2006.229.04:22:08.34#ibcon#read 5, iclass 40, count 2 2006.229.04:22:08.34#ibcon#about to read 6, iclass 40, count 2 2006.229.04:22:08.34#ibcon#read 6, iclass 40, count 2 2006.229.04:22:08.34#ibcon#end of sib2, iclass 40, count 2 2006.229.04:22:08.34#ibcon#*mode == 0, iclass 40, count 2 2006.229.04:22:08.34#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.04:22:08.34#ibcon#[25=AT01-08\r\n] 2006.229.04:22:08.34#ibcon#*before write, iclass 40, count 2 2006.229.04:22:08.34#ibcon#enter sib2, iclass 40, count 2 2006.229.04:22:08.34#ibcon#flushed, iclass 40, count 2 2006.229.04:22:08.34#ibcon#about to write, iclass 40, count 2 2006.229.04:22:08.34#ibcon#wrote, iclass 40, count 2 2006.229.04:22:08.34#ibcon#about to read 3, iclass 40, count 2 2006.229.04:22:08.35#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:22:08.37#ibcon#read 3, iclass 40, count 2 2006.229.04:22:08.37#ibcon#about to read 4, iclass 40, count 2 2006.229.04:22:08.37#ibcon#read 4, iclass 40, count 2 2006.229.04:22:08.37#ibcon#about to read 5, iclass 40, count 2 2006.229.04:22:08.37#ibcon#read 5, iclass 40, count 2 2006.229.04:22:08.37#ibcon#about to read 6, iclass 40, count 2 2006.229.04:22:08.37#ibcon#read 6, iclass 40, count 2 2006.229.04:22:08.37#ibcon#end of sib2, iclass 40, count 2 2006.229.04:22:08.37#ibcon#*after write, iclass 40, count 2 2006.229.04:22:08.37#ibcon#*before return 0, iclass 40, count 2 2006.229.04:22:08.37#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:22:08.37#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:22:08.37#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.04:22:08.37#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:08.37#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:22:08.49#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:22:08.49#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:22:08.49#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:22:08.49#ibcon#first serial, iclass 40, count 0 2006.229.04:22:08.49#ibcon#enter sib2, iclass 40, count 0 2006.229.04:22:08.49#ibcon#flushed, iclass 40, count 0 2006.229.04:22:08.49#ibcon#about to write, iclass 40, count 0 2006.229.04:22:08.49#ibcon#wrote, iclass 40, count 0 2006.229.04:22:08.49#ibcon#about to read 3, iclass 40, count 0 2006.229.04:22:08.51#ibcon#read 3, iclass 40, count 0 2006.229.04:22:08.51#ibcon#about to read 4, iclass 40, count 0 2006.229.04:22:08.51#ibcon#read 4, iclass 40, count 0 2006.229.04:22:08.51#ibcon#about to read 5, iclass 40, count 0 2006.229.04:22:08.51#ibcon#read 5, iclass 40, count 0 2006.229.04:22:08.51#ibcon#about to read 6, iclass 40, count 0 2006.229.04:22:08.51#ibcon#read 6, iclass 40, count 0 2006.229.04:22:08.51#ibcon#end of sib2, iclass 40, count 0 2006.229.04:22:08.51#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:22:08.51#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:22:08.51#ibcon#[25=USB\r\n] 2006.229.04:22:08.51#ibcon#*before write, iclass 40, count 0 2006.229.04:22:08.51#ibcon#enter sib2, iclass 40, count 0 2006.229.04:22:08.51#ibcon#flushed, iclass 40, count 0 2006.229.04:22:08.51#ibcon#about to write, iclass 40, count 0 2006.229.04:22:08.51#ibcon#wrote, iclass 40, count 0 2006.229.04:22:08.51#ibcon#about to read 3, iclass 40, count 0 2006.229.04:22:08.54#ibcon#read 3, iclass 40, count 0 2006.229.04:22:08.54#ibcon#about to read 4, iclass 40, count 0 2006.229.04:22:08.54#ibcon#read 4, iclass 40, count 0 2006.229.04:22:08.54#ibcon#about to read 5, iclass 40, count 0 2006.229.04:22:08.54#ibcon#read 5, iclass 40, count 0 2006.229.04:22:08.54#ibcon#about to read 6, iclass 40, count 0 2006.229.04:22:08.54#ibcon#read 6, iclass 40, count 0 2006.229.04:22:08.54#ibcon#end of sib2, iclass 40, count 0 2006.229.04:22:08.54#ibcon#*after write, iclass 40, count 0 2006.229.04:22:08.54#ibcon#*before return 0, iclass 40, count 0 2006.229.04:22:08.54#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:22:08.54#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:22:08.54#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:22:08.54#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:22:08.54$vck44/valo=2,534.99 2006.229.04:22:08.54#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.04:22:08.54#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.04:22:08.54#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:08.54#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:08.54#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:08.54#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:08.54#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:22:08.54#ibcon#first serial, iclass 5, count 0 2006.229.04:22:08.54#ibcon#enter sib2, iclass 5, count 0 2006.229.04:22:08.54#ibcon#flushed, iclass 5, count 0 2006.229.04:22:08.54#ibcon#about to write, iclass 5, count 0 2006.229.04:22:08.54#ibcon#wrote, iclass 5, count 0 2006.229.04:22:08.54#ibcon#about to read 3, iclass 5, count 0 2006.229.04:22:08.56#ibcon#read 3, iclass 5, count 0 2006.229.04:22:08.56#ibcon#about to read 4, iclass 5, count 0 2006.229.04:22:08.56#ibcon#read 4, iclass 5, count 0 2006.229.04:22:08.56#ibcon#about to read 5, iclass 5, count 0 2006.229.04:22:08.56#ibcon#read 5, iclass 5, count 0 2006.229.04:22:08.56#ibcon#about to read 6, iclass 5, count 0 2006.229.04:22:08.56#ibcon#read 6, iclass 5, count 0 2006.229.04:22:08.56#ibcon#end of sib2, iclass 5, count 0 2006.229.04:22:08.56#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:22:08.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:22:08.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:22:08.56#ibcon#*before write, iclass 5, count 0 2006.229.04:22:08.56#ibcon#enter sib2, iclass 5, count 0 2006.229.04:22:08.56#ibcon#flushed, iclass 5, count 0 2006.229.04:22:08.56#ibcon#about to write, iclass 5, count 0 2006.229.04:22:08.56#ibcon#wrote, iclass 5, count 0 2006.229.04:22:08.56#ibcon#about to read 3, iclass 5, count 0 2006.229.04:22:08.60#ibcon#read 3, iclass 5, count 0 2006.229.04:22:08.60#ibcon#about to read 4, iclass 5, count 0 2006.229.04:22:08.60#ibcon#read 4, iclass 5, count 0 2006.229.04:22:08.60#ibcon#about to read 5, iclass 5, count 0 2006.229.04:22:08.60#ibcon#read 5, iclass 5, count 0 2006.229.04:22:08.60#ibcon#about to read 6, iclass 5, count 0 2006.229.04:22:08.60#ibcon#read 6, iclass 5, count 0 2006.229.04:22:08.60#ibcon#end of sib2, iclass 5, count 0 2006.229.04:22:08.60#ibcon#*after write, iclass 5, count 0 2006.229.04:22:08.60#ibcon#*before return 0, iclass 5, count 0 2006.229.04:22:08.60#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:08.60#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:08.60#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:22:08.60#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:22:08.60$vck44/va=2,7 2006.229.04:22:08.60#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.04:22:08.60#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.04:22:08.60#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:08.60#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:08.66#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:08.66#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:08.66#ibcon#enter wrdev, iclass 7, count 2 2006.229.04:22:08.66#ibcon#first serial, iclass 7, count 2 2006.229.04:22:08.66#ibcon#enter sib2, iclass 7, count 2 2006.229.04:22:08.66#ibcon#flushed, iclass 7, count 2 2006.229.04:22:08.66#ibcon#about to write, iclass 7, count 2 2006.229.04:22:08.66#ibcon#wrote, iclass 7, count 2 2006.229.04:22:08.66#ibcon#about to read 3, iclass 7, count 2 2006.229.04:22:08.68#ibcon#read 3, iclass 7, count 2 2006.229.04:22:08.68#ibcon#about to read 4, iclass 7, count 2 2006.229.04:22:08.68#ibcon#read 4, iclass 7, count 2 2006.229.04:22:08.68#ibcon#about to read 5, iclass 7, count 2 2006.229.04:22:08.68#ibcon#read 5, iclass 7, count 2 2006.229.04:22:08.68#ibcon#about to read 6, iclass 7, count 2 2006.229.04:22:08.68#ibcon#read 6, iclass 7, count 2 2006.229.04:22:08.68#ibcon#end of sib2, iclass 7, count 2 2006.229.04:22:08.68#ibcon#*mode == 0, iclass 7, count 2 2006.229.04:22:08.68#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.04:22:08.68#ibcon#[25=AT02-07\r\n] 2006.229.04:22:08.68#ibcon#*before write, iclass 7, count 2 2006.229.04:22:08.68#ibcon#enter sib2, iclass 7, count 2 2006.229.04:22:08.68#ibcon#flushed, iclass 7, count 2 2006.229.04:22:08.68#ibcon#about to write, iclass 7, count 2 2006.229.04:22:08.68#ibcon#wrote, iclass 7, count 2 2006.229.04:22:08.68#ibcon#about to read 3, iclass 7, count 2 2006.229.04:22:08.71#ibcon#read 3, iclass 7, count 2 2006.229.04:22:08.71#ibcon#about to read 4, iclass 7, count 2 2006.229.04:22:08.71#ibcon#read 4, iclass 7, count 2 2006.229.04:22:08.71#ibcon#about to read 5, iclass 7, count 2 2006.229.04:22:08.71#ibcon#read 5, iclass 7, count 2 2006.229.04:22:08.71#ibcon#about to read 6, iclass 7, count 2 2006.229.04:22:08.71#ibcon#read 6, iclass 7, count 2 2006.229.04:22:08.71#ibcon#end of sib2, iclass 7, count 2 2006.229.04:22:08.71#ibcon#*after write, iclass 7, count 2 2006.229.04:22:08.71#ibcon#*before return 0, iclass 7, count 2 2006.229.04:22:08.71#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:08.71#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:08.71#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.04:22:08.71#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:08.71#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:08.83#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:08.83#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:08.83#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:22:08.83#ibcon#first serial, iclass 7, count 0 2006.229.04:22:08.83#ibcon#enter sib2, iclass 7, count 0 2006.229.04:22:08.83#ibcon#flushed, iclass 7, count 0 2006.229.04:22:08.83#ibcon#about to write, iclass 7, count 0 2006.229.04:22:08.83#ibcon#wrote, iclass 7, count 0 2006.229.04:22:08.83#ibcon#about to read 3, iclass 7, count 0 2006.229.04:22:08.85#ibcon#read 3, iclass 7, count 0 2006.229.04:22:08.85#ibcon#about to read 4, iclass 7, count 0 2006.229.04:22:08.85#ibcon#read 4, iclass 7, count 0 2006.229.04:22:08.85#ibcon#about to read 5, iclass 7, count 0 2006.229.04:22:08.85#ibcon#read 5, iclass 7, count 0 2006.229.04:22:08.85#ibcon#about to read 6, iclass 7, count 0 2006.229.04:22:08.85#ibcon#read 6, iclass 7, count 0 2006.229.04:22:08.85#ibcon#end of sib2, iclass 7, count 0 2006.229.04:22:08.85#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:22:08.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:22:08.85#ibcon#[25=USB\r\n] 2006.229.04:22:08.85#ibcon#*before write, iclass 7, count 0 2006.229.04:22:08.85#ibcon#enter sib2, iclass 7, count 0 2006.229.04:22:08.85#ibcon#flushed, iclass 7, count 0 2006.229.04:22:08.85#ibcon#about to write, iclass 7, count 0 2006.229.04:22:08.85#ibcon#wrote, iclass 7, count 0 2006.229.04:22:08.85#ibcon#about to read 3, iclass 7, count 0 2006.229.04:22:08.88#ibcon#read 3, iclass 7, count 0 2006.229.04:22:08.88#ibcon#about to read 4, iclass 7, count 0 2006.229.04:22:08.88#ibcon#read 4, iclass 7, count 0 2006.229.04:22:08.88#ibcon#about to read 5, iclass 7, count 0 2006.229.04:22:08.88#ibcon#read 5, iclass 7, count 0 2006.229.04:22:08.88#ibcon#about to read 6, iclass 7, count 0 2006.229.04:22:08.88#ibcon#read 6, iclass 7, count 0 2006.229.04:22:08.88#ibcon#end of sib2, iclass 7, count 0 2006.229.04:22:08.88#ibcon#*after write, iclass 7, count 0 2006.229.04:22:08.88#ibcon#*before return 0, iclass 7, count 0 2006.229.04:22:08.88#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:08.88#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:08.88#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:22:08.88#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:22:08.88$vck44/valo=3,564.99 2006.229.04:22:08.88#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.04:22:08.88#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.04:22:08.88#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:08.88#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:08.88#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:08.88#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:08.88#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:22:08.88#ibcon#first serial, iclass 11, count 0 2006.229.04:22:08.88#ibcon#enter sib2, iclass 11, count 0 2006.229.04:22:08.88#ibcon#flushed, iclass 11, count 0 2006.229.04:22:08.88#ibcon#about to write, iclass 11, count 0 2006.229.04:22:08.88#ibcon#wrote, iclass 11, count 0 2006.229.04:22:08.88#ibcon#about to read 3, iclass 11, count 0 2006.229.04:22:08.90#ibcon#read 3, iclass 11, count 0 2006.229.04:22:08.90#ibcon#about to read 4, iclass 11, count 0 2006.229.04:22:08.90#ibcon#read 4, iclass 11, count 0 2006.229.04:22:08.90#ibcon#about to read 5, iclass 11, count 0 2006.229.04:22:08.90#ibcon#read 5, iclass 11, count 0 2006.229.04:22:08.90#ibcon#about to read 6, iclass 11, count 0 2006.229.04:22:08.90#ibcon#read 6, iclass 11, count 0 2006.229.04:22:08.90#ibcon#end of sib2, iclass 11, count 0 2006.229.04:22:08.90#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:22:08.90#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:22:08.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:22:08.90#ibcon#*before write, iclass 11, count 0 2006.229.04:22:08.90#ibcon#enter sib2, iclass 11, count 0 2006.229.04:22:08.90#ibcon#flushed, iclass 11, count 0 2006.229.04:22:08.90#ibcon#about to write, iclass 11, count 0 2006.229.04:22:08.90#ibcon#wrote, iclass 11, count 0 2006.229.04:22:08.90#ibcon#about to read 3, iclass 11, count 0 2006.229.04:22:08.94#ibcon#read 3, iclass 11, count 0 2006.229.04:22:08.94#ibcon#about to read 4, iclass 11, count 0 2006.229.04:22:08.94#ibcon#read 4, iclass 11, count 0 2006.229.04:22:08.94#ibcon#about to read 5, iclass 11, count 0 2006.229.04:22:08.94#ibcon#read 5, iclass 11, count 0 2006.229.04:22:08.94#ibcon#about to read 6, iclass 11, count 0 2006.229.04:22:08.94#ibcon#read 6, iclass 11, count 0 2006.229.04:22:08.94#ibcon#end of sib2, iclass 11, count 0 2006.229.04:22:08.94#ibcon#*after write, iclass 11, count 0 2006.229.04:22:08.94#ibcon#*before return 0, iclass 11, count 0 2006.229.04:22:08.94#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:08.94#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:08.94#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:22:08.94#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:22:08.94$vck44/va=3,6 2006.229.04:22:08.94#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.04:22:08.94#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.04:22:08.94#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:08.94#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:09.00#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:09.00#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:09.00#ibcon#enter wrdev, iclass 13, count 2 2006.229.04:22:09.00#ibcon#first serial, iclass 13, count 2 2006.229.04:22:09.00#ibcon#enter sib2, iclass 13, count 2 2006.229.04:22:09.00#ibcon#flushed, iclass 13, count 2 2006.229.04:22:09.00#ibcon#about to write, iclass 13, count 2 2006.229.04:22:09.00#ibcon#wrote, iclass 13, count 2 2006.229.04:22:09.00#ibcon#about to read 3, iclass 13, count 2 2006.229.04:22:09.02#ibcon#read 3, iclass 13, count 2 2006.229.04:22:09.02#ibcon#about to read 4, iclass 13, count 2 2006.229.04:22:09.02#ibcon#read 4, iclass 13, count 2 2006.229.04:22:09.02#ibcon#about to read 5, iclass 13, count 2 2006.229.04:22:09.02#ibcon#read 5, iclass 13, count 2 2006.229.04:22:09.02#ibcon#about to read 6, iclass 13, count 2 2006.229.04:22:09.02#ibcon#read 6, iclass 13, count 2 2006.229.04:22:09.02#ibcon#end of sib2, iclass 13, count 2 2006.229.04:22:09.02#ibcon#*mode == 0, iclass 13, count 2 2006.229.04:22:09.02#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.04:22:09.02#ibcon#[25=AT03-06\r\n] 2006.229.04:22:09.02#ibcon#*before write, iclass 13, count 2 2006.229.04:22:09.02#ibcon#enter sib2, iclass 13, count 2 2006.229.04:22:09.02#ibcon#flushed, iclass 13, count 2 2006.229.04:22:09.02#ibcon#about to write, iclass 13, count 2 2006.229.04:22:09.02#ibcon#wrote, iclass 13, count 2 2006.229.04:22:09.02#ibcon#about to read 3, iclass 13, count 2 2006.229.04:22:09.05#ibcon#read 3, iclass 13, count 2 2006.229.04:22:09.05#ibcon#about to read 4, iclass 13, count 2 2006.229.04:22:09.05#ibcon#read 4, iclass 13, count 2 2006.229.04:22:09.05#ibcon#about to read 5, iclass 13, count 2 2006.229.04:22:09.05#ibcon#read 5, iclass 13, count 2 2006.229.04:22:09.05#ibcon#about to read 6, iclass 13, count 2 2006.229.04:22:09.05#ibcon#read 6, iclass 13, count 2 2006.229.04:22:09.05#ibcon#end of sib2, iclass 13, count 2 2006.229.04:22:09.05#ibcon#*after write, iclass 13, count 2 2006.229.04:22:09.05#ibcon#*before return 0, iclass 13, count 2 2006.229.04:22:09.05#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:09.05#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:09.05#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.04:22:09.05#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:09.05#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:09.17#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:09.17#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:09.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:22:09.17#ibcon#first serial, iclass 13, count 0 2006.229.04:22:09.17#ibcon#enter sib2, iclass 13, count 0 2006.229.04:22:09.17#ibcon#flushed, iclass 13, count 0 2006.229.04:22:09.17#ibcon#about to write, iclass 13, count 0 2006.229.04:22:09.17#ibcon#wrote, iclass 13, count 0 2006.229.04:22:09.17#ibcon#about to read 3, iclass 13, count 0 2006.229.04:22:09.19#ibcon#read 3, iclass 13, count 0 2006.229.04:22:09.19#ibcon#about to read 4, iclass 13, count 0 2006.229.04:22:09.19#ibcon#read 4, iclass 13, count 0 2006.229.04:22:09.19#ibcon#about to read 5, iclass 13, count 0 2006.229.04:22:09.19#ibcon#read 5, iclass 13, count 0 2006.229.04:22:09.19#ibcon#about to read 6, iclass 13, count 0 2006.229.04:22:09.19#ibcon#read 6, iclass 13, count 0 2006.229.04:22:09.19#ibcon#end of sib2, iclass 13, count 0 2006.229.04:22:09.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:22:09.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:22:09.19#ibcon#[25=USB\r\n] 2006.229.04:22:09.19#ibcon#*before write, iclass 13, count 0 2006.229.04:22:09.19#ibcon#enter sib2, iclass 13, count 0 2006.229.04:22:09.19#ibcon#flushed, iclass 13, count 0 2006.229.04:22:09.19#ibcon#about to write, iclass 13, count 0 2006.229.04:22:09.19#ibcon#wrote, iclass 13, count 0 2006.229.04:22:09.19#ibcon#about to read 3, iclass 13, count 0 2006.229.04:22:09.22#ibcon#read 3, iclass 13, count 0 2006.229.04:22:09.22#ibcon#about to read 4, iclass 13, count 0 2006.229.04:22:09.22#ibcon#read 4, iclass 13, count 0 2006.229.04:22:09.22#ibcon#about to read 5, iclass 13, count 0 2006.229.04:22:09.22#ibcon#read 5, iclass 13, count 0 2006.229.04:22:09.22#ibcon#about to read 6, iclass 13, count 0 2006.229.04:22:09.22#ibcon#read 6, iclass 13, count 0 2006.229.04:22:09.22#ibcon#end of sib2, iclass 13, count 0 2006.229.04:22:09.22#ibcon#*after write, iclass 13, count 0 2006.229.04:22:09.22#ibcon#*before return 0, iclass 13, count 0 2006.229.04:22:09.22#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:09.22#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:09.22#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:22:09.22#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:22:09.22$vck44/valo=4,624.99 2006.229.04:22:09.22#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.04:22:09.22#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.04:22:09.22#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:09.22#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:09.22#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:09.22#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:09.22#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:22:09.22#ibcon#first serial, iclass 15, count 0 2006.229.04:22:09.22#ibcon#enter sib2, iclass 15, count 0 2006.229.04:22:09.22#ibcon#flushed, iclass 15, count 0 2006.229.04:22:09.22#ibcon#about to write, iclass 15, count 0 2006.229.04:22:09.22#ibcon#wrote, iclass 15, count 0 2006.229.04:22:09.22#ibcon#about to read 3, iclass 15, count 0 2006.229.04:22:09.24#ibcon#read 3, iclass 15, count 0 2006.229.04:22:09.24#ibcon#about to read 4, iclass 15, count 0 2006.229.04:22:09.24#ibcon#read 4, iclass 15, count 0 2006.229.04:22:09.24#ibcon#about to read 5, iclass 15, count 0 2006.229.04:22:09.24#ibcon#read 5, iclass 15, count 0 2006.229.04:22:09.24#ibcon#about to read 6, iclass 15, count 0 2006.229.04:22:09.24#ibcon#read 6, iclass 15, count 0 2006.229.04:22:09.24#ibcon#end of sib2, iclass 15, count 0 2006.229.04:22:09.24#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:22:09.24#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:22:09.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:22:09.24#ibcon#*before write, iclass 15, count 0 2006.229.04:22:09.24#ibcon#enter sib2, iclass 15, count 0 2006.229.04:22:09.24#ibcon#flushed, iclass 15, count 0 2006.229.04:22:09.24#ibcon#about to write, iclass 15, count 0 2006.229.04:22:09.24#ibcon#wrote, iclass 15, count 0 2006.229.04:22:09.24#ibcon#about to read 3, iclass 15, count 0 2006.229.04:22:09.28#ibcon#read 3, iclass 15, count 0 2006.229.04:22:09.28#ibcon#about to read 4, iclass 15, count 0 2006.229.04:22:09.28#ibcon#read 4, iclass 15, count 0 2006.229.04:22:09.28#ibcon#about to read 5, iclass 15, count 0 2006.229.04:22:09.28#ibcon#read 5, iclass 15, count 0 2006.229.04:22:09.28#ibcon#about to read 6, iclass 15, count 0 2006.229.04:22:09.28#ibcon#read 6, iclass 15, count 0 2006.229.04:22:09.28#ibcon#end of sib2, iclass 15, count 0 2006.229.04:22:09.28#ibcon#*after write, iclass 15, count 0 2006.229.04:22:09.28#ibcon#*before return 0, iclass 15, count 0 2006.229.04:22:09.28#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:09.28#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:09.28#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:22:09.28#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:22:09.28$vck44/va=4,7 2006.229.04:22:09.28#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.04:22:09.28#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.04:22:09.28#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:09.28#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:09.34#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:09.34#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:09.34#ibcon#enter wrdev, iclass 17, count 2 2006.229.04:22:09.34#ibcon#first serial, iclass 17, count 2 2006.229.04:22:09.34#ibcon#enter sib2, iclass 17, count 2 2006.229.04:22:09.34#ibcon#flushed, iclass 17, count 2 2006.229.04:22:09.34#ibcon#about to write, iclass 17, count 2 2006.229.04:22:09.34#ibcon#wrote, iclass 17, count 2 2006.229.04:22:09.34#ibcon#about to read 3, iclass 17, count 2 2006.229.04:22:09.36#ibcon#read 3, iclass 17, count 2 2006.229.04:22:09.36#ibcon#about to read 4, iclass 17, count 2 2006.229.04:22:09.36#ibcon#read 4, iclass 17, count 2 2006.229.04:22:09.36#ibcon#about to read 5, iclass 17, count 2 2006.229.04:22:09.36#ibcon#read 5, iclass 17, count 2 2006.229.04:22:09.36#ibcon#about to read 6, iclass 17, count 2 2006.229.04:22:09.36#ibcon#read 6, iclass 17, count 2 2006.229.04:22:09.36#ibcon#end of sib2, iclass 17, count 2 2006.229.04:22:09.36#ibcon#*mode == 0, iclass 17, count 2 2006.229.04:22:09.36#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.04:22:09.36#ibcon#[25=AT04-07\r\n] 2006.229.04:22:09.36#ibcon#*before write, iclass 17, count 2 2006.229.04:22:09.36#ibcon#enter sib2, iclass 17, count 2 2006.229.04:22:09.36#ibcon#flushed, iclass 17, count 2 2006.229.04:22:09.36#ibcon#about to write, iclass 17, count 2 2006.229.04:22:09.36#ibcon#wrote, iclass 17, count 2 2006.229.04:22:09.36#ibcon#about to read 3, iclass 17, count 2 2006.229.04:22:09.39#ibcon#read 3, iclass 17, count 2 2006.229.04:22:09.39#ibcon#about to read 4, iclass 17, count 2 2006.229.04:22:09.39#ibcon#read 4, iclass 17, count 2 2006.229.04:22:09.39#ibcon#about to read 5, iclass 17, count 2 2006.229.04:22:09.39#ibcon#read 5, iclass 17, count 2 2006.229.04:22:09.39#ibcon#about to read 6, iclass 17, count 2 2006.229.04:22:09.39#ibcon#read 6, iclass 17, count 2 2006.229.04:22:09.39#ibcon#end of sib2, iclass 17, count 2 2006.229.04:22:09.39#ibcon#*after write, iclass 17, count 2 2006.229.04:22:09.39#ibcon#*before return 0, iclass 17, count 2 2006.229.04:22:09.42#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:09.42#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:09.42#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.04:22:09.42#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:09.42#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:09.54#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:09.54#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:09.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:22:09.54#ibcon#first serial, iclass 17, count 0 2006.229.04:22:09.54#ibcon#enter sib2, iclass 17, count 0 2006.229.04:22:09.54#ibcon#flushed, iclass 17, count 0 2006.229.04:22:09.54#ibcon#about to write, iclass 17, count 0 2006.229.04:22:09.54#ibcon#wrote, iclass 17, count 0 2006.229.04:22:09.54#ibcon#about to read 3, iclass 17, count 0 2006.229.04:22:09.56#ibcon#read 3, iclass 17, count 0 2006.229.04:22:09.56#ibcon#about to read 4, iclass 17, count 0 2006.229.04:22:09.56#ibcon#read 4, iclass 17, count 0 2006.229.04:22:09.56#ibcon#about to read 5, iclass 17, count 0 2006.229.04:22:09.56#ibcon#read 5, iclass 17, count 0 2006.229.04:22:09.56#ibcon#about to read 6, iclass 17, count 0 2006.229.04:22:09.56#ibcon#read 6, iclass 17, count 0 2006.229.04:22:09.56#ibcon#end of sib2, iclass 17, count 0 2006.229.04:22:09.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:22:09.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:22:09.56#ibcon#[25=USB\r\n] 2006.229.04:22:09.56#ibcon#*before write, iclass 17, count 0 2006.229.04:22:09.56#ibcon#enter sib2, iclass 17, count 0 2006.229.04:22:09.56#ibcon#flushed, iclass 17, count 0 2006.229.04:22:09.56#ibcon#about to write, iclass 17, count 0 2006.229.04:22:09.56#ibcon#wrote, iclass 17, count 0 2006.229.04:22:09.56#ibcon#about to read 3, iclass 17, count 0 2006.229.04:22:09.59#ibcon#read 3, iclass 17, count 0 2006.229.04:22:09.59#ibcon#about to read 4, iclass 17, count 0 2006.229.04:22:09.59#ibcon#read 4, iclass 17, count 0 2006.229.04:22:09.59#ibcon#about to read 5, iclass 17, count 0 2006.229.04:22:09.59#ibcon#read 5, iclass 17, count 0 2006.229.04:22:09.59#ibcon#about to read 6, iclass 17, count 0 2006.229.04:22:09.59#ibcon#read 6, iclass 17, count 0 2006.229.04:22:09.59#ibcon#end of sib2, iclass 17, count 0 2006.229.04:22:09.59#ibcon#*after write, iclass 17, count 0 2006.229.04:22:09.59#ibcon#*before return 0, iclass 17, count 0 2006.229.04:22:09.59#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:09.59#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:09.59#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:22:09.59#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:22:09.59$vck44/valo=5,734.99 2006.229.04:22:09.59#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.04:22:09.59#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.04:22:09.59#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:09.59#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:09.59#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:09.59#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:09.59#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:22:09.59#ibcon#first serial, iclass 19, count 0 2006.229.04:22:09.59#ibcon#enter sib2, iclass 19, count 0 2006.229.04:22:09.59#ibcon#flushed, iclass 19, count 0 2006.229.04:22:09.59#ibcon#about to write, iclass 19, count 0 2006.229.04:22:09.59#ibcon#wrote, iclass 19, count 0 2006.229.04:22:09.59#ibcon#about to read 3, iclass 19, count 0 2006.229.04:22:09.61#ibcon#read 3, iclass 19, count 0 2006.229.04:22:09.61#ibcon#about to read 4, iclass 19, count 0 2006.229.04:22:09.61#ibcon#read 4, iclass 19, count 0 2006.229.04:22:09.61#ibcon#about to read 5, iclass 19, count 0 2006.229.04:22:09.61#ibcon#read 5, iclass 19, count 0 2006.229.04:22:09.61#ibcon#about to read 6, iclass 19, count 0 2006.229.04:22:09.61#ibcon#read 6, iclass 19, count 0 2006.229.04:22:09.61#ibcon#end of sib2, iclass 19, count 0 2006.229.04:22:09.61#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:22:09.61#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:22:09.61#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:22:09.61#ibcon#*before write, iclass 19, count 0 2006.229.04:22:09.61#ibcon#enter sib2, iclass 19, count 0 2006.229.04:22:09.61#ibcon#flushed, iclass 19, count 0 2006.229.04:22:09.61#ibcon#about to write, iclass 19, count 0 2006.229.04:22:09.61#ibcon#wrote, iclass 19, count 0 2006.229.04:22:09.61#ibcon#about to read 3, iclass 19, count 0 2006.229.04:22:09.65#ibcon#read 3, iclass 19, count 0 2006.229.04:22:09.65#ibcon#about to read 4, iclass 19, count 0 2006.229.04:22:09.65#ibcon#read 4, iclass 19, count 0 2006.229.04:22:09.65#ibcon#about to read 5, iclass 19, count 0 2006.229.04:22:09.65#ibcon#read 5, iclass 19, count 0 2006.229.04:22:09.65#ibcon#about to read 6, iclass 19, count 0 2006.229.04:22:09.65#ibcon#read 6, iclass 19, count 0 2006.229.04:22:09.65#ibcon#end of sib2, iclass 19, count 0 2006.229.04:22:09.65#ibcon#*after write, iclass 19, count 0 2006.229.04:22:09.65#ibcon#*before return 0, iclass 19, count 0 2006.229.04:22:09.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:09.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:09.65#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:22:09.65#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:22:09.65$vck44/va=5,4 2006.229.04:22:09.65#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.04:22:09.65#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.04:22:09.65#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:09.65#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:09.71#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:09.71#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:09.71#ibcon#enter wrdev, iclass 21, count 2 2006.229.04:22:09.71#ibcon#first serial, iclass 21, count 2 2006.229.04:22:09.71#ibcon#enter sib2, iclass 21, count 2 2006.229.04:22:09.71#ibcon#flushed, iclass 21, count 2 2006.229.04:22:09.71#ibcon#about to write, iclass 21, count 2 2006.229.04:22:09.71#ibcon#wrote, iclass 21, count 2 2006.229.04:22:09.71#ibcon#about to read 3, iclass 21, count 2 2006.229.04:22:09.73#ibcon#read 3, iclass 21, count 2 2006.229.04:22:09.73#ibcon#about to read 4, iclass 21, count 2 2006.229.04:22:09.73#ibcon#read 4, iclass 21, count 2 2006.229.04:22:09.73#ibcon#about to read 5, iclass 21, count 2 2006.229.04:22:09.73#ibcon#read 5, iclass 21, count 2 2006.229.04:22:09.73#ibcon#about to read 6, iclass 21, count 2 2006.229.04:22:09.73#ibcon#read 6, iclass 21, count 2 2006.229.04:22:09.73#ibcon#end of sib2, iclass 21, count 2 2006.229.04:22:09.73#ibcon#*mode == 0, iclass 21, count 2 2006.229.04:22:09.73#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.04:22:09.73#ibcon#[25=AT05-04\r\n] 2006.229.04:22:09.73#ibcon#*before write, iclass 21, count 2 2006.229.04:22:09.73#ibcon#enter sib2, iclass 21, count 2 2006.229.04:22:09.73#ibcon#flushed, iclass 21, count 2 2006.229.04:22:09.73#ibcon#about to write, iclass 21, count 2 2006.229.04:22:09.73#ibcon#wrote, iclass 21, count 2 2006.229.04:22:09.73#ibcon#about to read 3, iclass 21, count 2 2006.229.04:22:09.76#ibcon#read 3, iclass 21, count 2 2006.229.04:22:09.76#ibcon#about to read 4, iclass 21, count 2 2006.229.04:22:09.76#ibcon#read 4, iclass 21, count 2 2006.229.04:22:09.76#ibcon#about to read 5, iclass 21, count 2 2006.229.04:22:09.76#ibcon#read 5, iclass 21, count 2 2006.229.04:22:09.76#ibcon#about to read 6, iclass 21, count 2 2006.229.04:22:09.76#ibcon#read 6, iclass 21, count 2 2006.229.04:22:09.76#ibcon#end of sib2, iclass 21, count 2 2006.229.04:22:09.76#ibcon#*after write, iclass 21, count 2 2006.229.04:22:09.76#ibcon#*before return 0, iclass 21, count 2 2006.229.04:22:09.76#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:09.76#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:09.76#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.04:22:09.76#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:09.76#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:09.88#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:09.88#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:09.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:22:09.88#ibcon#first serial, iclass 21, count 0 2006.229.04:22:09.88#ibcon#enter sib2, iclass 21, count 0 2006.229.04:22:09.88#ibcon#flushed, iclass 21, count 0 2006.229.04:22:09.88#ibcon#about to write, iclass 21, count 0 2006.229.04:22:09.88#ibcon#wrote, iclass 21, count 0 2006.229.04:22:09.88#ibcon#about to read 3, iclass 21, count 0 2006.229.04:22:09.90#ibcon#read 3, iclass 21, count 0 2006.229.04:22:09.90#ibcon#about to read 4, iclass 21, count 0 2006.229.04:22:09.90#ibcon#read 4, iclass 21, count 0 2006.229.04:22:09.90#ibcon#about to read 5, iclass 21, count 0 2006.229.04:22:09.90#ibcon#read 5, iclass 21, count 0 2006.229.04:22:09.90#ibcon#about to read 6, iclass 21, count 0 2006.229.04:22:09.90#ibcon#read 6, iclass 21, count 0 2006.229.04:22:09.90#ibcon#end of sib2, iclass 21, count 0 2006.229.04:22:09.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:22:09.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:22:09.90#ibcon#[25=USB\r\n] 2006.229.04:22:09.90#ibcon#*before write, iclass 21, count 0 2006.229.04:22:09.90#ibcon#enter sib2, iclass 21, count 0 2006.229.04:22:09.90#ibcon#flushed, iclass 21, count 0 2006.229.04:22:09.90#ibcon#about to write, iclass 21, count 0 2006.229.04:22:09.90#ibcon#wrote, iclass 21, count 0 2006.229.04:22:09.90#ibcon#about to read 3, iclass 21, count 0 2006.229.04:22:09.93#ibcon#read 3, iclass 21, count 0 2006.229.04:22:09.93#ibcon#about to read 4, iclass 21, count 0 2006.229.04:22:09.93#ibcon#read 4, iclass 21, count 0 2006.229.04:22:09.93#ibcon#about to read 5, iclass 21, count 0 2006.229.04:22:09.93#ibcon#read 5, iclass 21, count 0 2006.229.04:22:09.93#ibcon#about to read 6, iclass 21, count 0 2006.229.04:22:09.93#ibcon#read 6, iclass 21, count 0 2006.229.04:22:09.93#ibcon#end of sib2, iclass 21, count 0 2006.229.04:22:09.93#ibcon#*after write, iclass 21, count 0 2006.229.04:22:09.93#ibcon#*before return 0, iclass 21, count 0 2006.229.04:22:09.93#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:09.93#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:09.93#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:22:09.93#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:22:09.93$vck44/valo=6,814.99 2006.229.04:22:09.93#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.04:22:09.93#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.04:22:09.93#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:09.93#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:09.93#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:09.93#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:09.93#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:22:09.93#ibcon#first serial, iclass 23, count 0 2006.229.04:22:09.93#ibcon#enter sib2, iclass 23, count 0 2006.229.04:22:09.93#ibcon#flushed, iclass 23, count 0 2006.229.04:22:09.93#ibcon#about to write, iclass 23, count 0 2006.229.04:22:09.93#ibcon#wrote, iclass 23, count 0 2006.229.04:22:09.93#ibcon#about to read 3, iclass 23, count 0 2006.229.04:22:09.95#ibcon#read 3, iclass 23, count 0 2006.229.04:22:09.95#ibcon#about to read 4, iclass 23, count 0 2006.229.04:22:09.95#ibcon#read 4, iclass 23, count 0 2006.229.04:22:09.95#ibcon#about to read 5, iclass 23, count 0 2006.229.04:22:09.95#ibcon#read 5, iclass 23, count 0 2006.229.04:22:09.95#ibcon#about to read 6, iclass 23, count 0 2006.229.04:22:09.95#ibcon#read 6, iclass 23, count 0 2006.229.04:22:09.95#ibcon#end of sib2, iclass 23, count 0 2006.229.04:22:09.95#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:22:09.95#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:22:09.95#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:22:09.95#ibcon#*before write, iclass 23, count 0 2006.229.04:22:09.95#ibcon#enter sib2, iclass 23, count 0 2006.229.04:22:09.95#ibcon#flushed, iclass 23, count 0 2006.229.04:22:09.95#ibcon#about to write, iclass 23, count 0 2006.229.04:22:09.95#ibcon#wrote, iclass 23, count 0 2006.229.04:22:09.95#ibcon#about to read 3, iclass 23, count 0 2006.229.04:22:09.99#ibcon#read 3, iclass 23, count 0 2006.229.04:22:09.99#ibcon#about to read 4, iclass 23, count 0 2006.229.04:22:09.99#ibcon#read 4, iclass 23, count 0 2006.229.04:22:09.99#ibcon#about to read 5, iclass 23, count 0 2006.229.04:22:09.99#ibcon#read 5, iclass 23, count 0 2006.229.04:22:09.99#ibcon#about to read 6, iclass 23, count 0 2006.229.04:22:09.99#ibcon#read 6, iclass 23, count 0 2006.229.04:22:09.99#ibcon#end of sib2, iclass 23, count 0 2006.229.04:22:09.99#ibcon#*after write, iclass 23, count 0 2006.229.04:22:09.99#ibcon#*before return 0, iclass 23, count 0 2006.229.04:22:09.99#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:09.99#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:09.99#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:22:09.99#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:22:09.99$vck44/va=6,4 2006.229.04:22:09.99#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.04:22:09.99#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.04:22:09.99#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:09.99#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:10.05#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:10.05#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:10.05#ibcon#enter wrdev, iclass 25, count 2 2006.229.04:22:10.05#ibcon#first serial, iclass 25, count 2 2006.229.04:22:10.05#ibcon#enter sib2, iclass 25, count 2 2006.229.04:22:10.05#ibcon#flushed, iclass 25, count 2 2006.229.04:22:10.05#ibcon#about to write, iclass 25, count 2 2006.229.04:22:10.05#ibcon#wrote, iclass 25, count 2 2006.229.04:22:10.05#ibcon#about to read 3, iclass 25, count 2 2006.229.04:22:10.07#ibcon#read 3, iclass 25, count 2 2006.229.04:22:10.07#ibcon#about to read 4, iclass 25, count 2 2006.229.04:22:10.07#ibcon#read 4, iclass 25, count 2 2006.229.04:22:10.07#ibcon#about to read 5, iclass 25, count 2 2006.229.04:22:10.07#ibcon#read 5, iclass 25, count 2 2006.229.04:22:10.07#ibcon#about to read 6, iclass 25, count 2 2006.229.04:22:10.07#ibcon#read 6, iclass 25, count 2 2006.229.04:22:10.07#ibcon#end of sib2, iclass 25, count 2 2006.229.04:22:10.07#ibcon#*mode == 0, iclass 25, count 2 2006.229.04:22:10.07#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.04:22:10.07#ibcon#[25=AT06-04\r\n] 2006.229.04:22:10.07#ibcon#*before write, iclass 25, count 2 2006.229.04:22:10.07#ibcon#enter sib2, iclass 25, count 2 2006.229.04:22:10.07#ibcon#flushed, iclass 25, count 2 2006.229.04:22:10.07#ibcon#about to write, iclass 25, count 2 2006.229.04:22:10.07#ibcon#wrote, iclass 25, count 2 2006.229.04:22:10.07#ibcon#about to read 3, iclass 25, count 2 2006.229.04:22:10.10#ibcon#read 3, iclass 25, count 2 2006.229.04:22:10.10#ibcon#about to read 4, iclass 25, count 2 2006.229.04:22:10.10#ibcon#read 4, iclass 25, count 2 2006.229.04:22:10.10#ibcon#about to read 5, iclass 25, count 2 2006.229.04:22:10.10#ibcon#read 5, iclass 25, count 2 2006.229.04:22:10.10#ibcon#about to read 6, iclass 25, count 2 2006.229.04:22:10.10#ibcon#read 6, iclass 25, count 2 2006.229.04:22:10.10#ibcon#end of sib2, iclass 25, count 2 2006.229.04:22:10.10#ibcon#*after write, iclass 25, count 2 2006.229.04:22:10.10#ibcon#*before return 0, iclass 25, count 2 2006.229.04:22:10.10#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:10.10#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:10.10#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.04:22:10.10#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:10.10#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:10.22#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:10.22#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:10.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:22:10.22#ibcon#first serial, iclass 25, count 0 2006.229.04:22:10.22#ibcon#enter sib2, iclass 25, count 0 2006.229.04:22:10.22#ibcon#flushed, iclass 25, count 0 2006.229.04:22:10.22#ibcon#about to write, iclass 25, count 0 2006.229.04:22:10.22#ibcon#wrote, iclass 25, count 0 2006.229.04:22:10.22#ibcon#about to read 3, iclass 25, count 0 2006.229.04:22:10.24#ibcon#read 3, iclass 25, count 0 2006.229.04:22:10.24#ibcon#about to read 4, iclass 25, count 0 2006.229.04:22:10.24#ibcon#read 4, iclass 25, count 0 2006.229.04:22:10.24#ibcon#about to read 5, iclass 25, count 0 2006.229.04:22:10.24#ibcon#read 5, iclass 25, count 0 2006.229.04:22:10.24#ibcon#about to read 6, iclass 25, count 0 2006.229.04:22:10.24#ibcon#read 6, iclass 25, count 0 2006.229.04:22:10.24#ibcon#end of sib2, iclass 25, count 0 2006.229.04:22:10.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:22:10.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:22:10.24#ibcon#[25=USB\r\n] 2006.229.04:22:10.24#ibcon#*before write, iclass 25, count 0 2006.229.04:22:10.24#ibcon#enter sib2, iclass 25, count 0 2006.229.04:22:10.24#ibcon#flushed, iclass 25, count 0 2006.229.04:22:10.24#ibcon#about to write, iclass 25, count 0 2006.229.04:22:10.24#ibcon#wrote, iclass 25, count 0 2006.229.04:22:10.24#ibcon#about to read 3, iclass 25, count 0 2006.229.04:22:10.27#ibcon#read 3, iclass 25, count 0 2006.229.04:22:10.27#ibcon#about to read 4, iclass 25, count 0 2006.229.04:22:10.27#ibcon#read 4, iclass 25, count 0 2006.229.04:22:10.27#ibcon#about to read 5, iclass 25, count 0 2006.229.04:22:10.27#ibcon#read 5, iclass 25, count 0 2006.229.04:22:10.27#ibcon#about to read 6, iclass 25, count 0 2006.229.04:22:10.27#ibcon#read 6, iclass 25, count 0 2006.229.04:22:10.27#ibcon#end of sib2, iclass 25, count 0 2006.229.04:22:10.27#ibcon#*after write, iclass 25, count 0 2006.229.04:22:10.27#ibcon#*before return 0, iclass 25, count 0 2006.229.04:22:10.27#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:10.27#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:10.27#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:22:10.27#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:22:10.27$vck44/valo=7,864.99 2006.229.04:22:10.27#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.04:22:10.27#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.04:22:10.27#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:10.27#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:10.27#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:10.27#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:10.27#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:22:10.27#ibcon#first serial, iclass 27, count 0 2006.229.04:22:10.27#ibcon#enter sib2, iclass 27, count 0 2006.229.04:22:10.27#ibcon#flushed, iclass 27, count 0 2006.229.04:22:10.27#ibcon#about to write, iclass 27, count 0 2006.229.04:22:10.27#ibcon#wrote, iclass 27, count 0 2006.229.04:22:10.27#ibcon#about to read 3, iclass 27, count 0 2006.229.04:22:10.29#ibcon#read 3, iclass 27, count 0 2006.229.04:22:10.29#ibcon#about to read 4, iclass 27, count 0 2006.229.04:22:10.29#ibcon#read 4, iclass 27, count 0 2006.229.04:22:10.29#ibcon#about to read 5, iclass 27, count 0 2006.229.04:22:10.29#ibcon#read 5, iclass 27, count 0 2006.229.04:22:10.29#ibcon#about to read 6, iclass 27, count 0 2006.229.04:22:10.29#ibcon#read 6, iclass 27, count 0 2006.229.04:22:10.29#ibcon#end of sib2, iclass 27, count 0 2006.229.04:22:10.29#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:22:10.29#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:22:10.29#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:22:10.29#ibcon#*before write, iclass 27, count 0 2006.229.04:22:10.29#ibcon#enter sib2, iclass 27, count 0 2006.229.04:22:10.29#ibcon#flushed, iclass 27, count 0 2006.229.04:22:10.29#ibcon#about to write, iclass 27, count 0 2006.229.04:22:10.29#ibcon#wrote, iclass 27, count 0 2006.229.04:22:10.29#ibcon#about to read 3, iclass 27, count 0 2006.229.04:22:10.33#ibcon#read 3, iclass 27, count 0 2006.229.04:22:10.33#ibcon#about to read 4, iclass 27, count 0 2006.229.04:22:10.33#ibcon#read 4, iclass 27, count 0 2006.229.04:22:10.33#ibcon#about to read 5, iclass 27, count 0 2006.229.04:22:10.33#ibcon#read 5, iclass 27, count 0 2006.229.04:22:10.33#ibcon#about to read 6, iclass 27, count 0 2006.229.04:22:10.33#ibcon#read 6, iclass 27, count 0 2006.229.04:22:10.33#ibcon#end of sib2, iclass 27, count 0 2006.229.04:22:10.33#ibcon#*after write, iclass 27, count 0 2006.229.04:22:10.33#ibcon#*before return 0, iclass 27, count 0 2006.229.04:22:10.33#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:10.33#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:10.33#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:22:10.33#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:22:10.33$vck44/va=7,5 2006.229.04:22:10.33#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.04:22:10.33#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.04:22:10.33#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:10.33#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:10.39#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:10.39#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:10.39#ibcon#enter wrdev, iclass 29, count 2 2006.229.04:22:10.39#ibcon#first serial, iclass 29, count 2 2006.229.04:22:10.39#ibcon#enter sib2, iclass 29, count 2 2006.229.04:22:10.39#ibcon#flushed, iclass 29, count 2 2006.229.04:22:10.39#ibcon#about to write, iclass 29, count 2 2006.229.04:22:10.39#ibcon#wrote, iclass 29, count 2 2006.229.04:22:10.39#ibcon#about to read 3, iclass 29, count 2 2006.229.04:22:10.41#ibcon#read 3, iclass 29, count 2 2006.229.04:22:10.41#ibcon#about to read 4, iclass 29, count 2 2006.229.04:22:10.41#ibcon#read 4, iclass 29, count 2 2006.229.04:22:10.41#ibcon#about to read 5, iclass 29, count 2 2006.229.04:22:10.41#ibcon#read 5, iclass 29, count 2 2006.229.04:22:10.41#ibcon#about to read 6, iclass 29, count 2 2006.229.04:22:10.41#ibcon#read 6, iclass 29, count 2 2006.229.04:22:10.41#ibcon#end of sib2, iclass 29, count 2 2006.229.04:22:10.41#ibcon#*mode == 0, iclass 29, count 2 2006.229.04:22:10.41#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.04:22:10.41#ibcon#[25=AT07-05\r\n] 2006.229.04:22:10.41#ibcon#*before write, iclass 29, count 2 2006.229.04:22:10.41#ibcon#enter sib2, iclass 29, count 2 2006.229.04:22:10.41#ibcon#flushed, iclass 29, count 2 2006.229.04:22:10.41#ibcon#about to write, iclass 29, count 2 2006.229.04:22:10.41#ibcon#wrote, iclass 29, count 2 2006.229.04:22:10.41#ibcon#about to read 3, iclass 29, count 2 2006.229.04:22:10.44#ibcon#read 3, iclass 29, count 2 2006.229.04:22:10.44#ibcon#about to read 4, iclass 29, count 2 2006.229.04:22:10.44#ibcon#read 4, iclass 29, count 2 2006.229.04:22:10.44#ibcon#about to read 5, iclass 29, count 2 2006.229.04:22:10.44#ibcon#read 5, iclass 29, count 2 2006.229.04:22:10.44#ibcon#about to read 6, iclass 29, count 2 2006.229.04:22:10.44#ibcon#read 6, iclass 29, count 2 2006.229.04:22:10.44#ibcon#end of sib2, iclass 29, count 2 2006.229.04:22:10.44#ibcon#*after write, iclass 29, count 2 2006.229.04:22:10.44#ibcon#*before return 0, iclass 29, count 2 2006.229.04:22:10.44#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:10.44#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:10.44#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.04:22:10.44#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:10.44#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:10.56#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:10.56#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:10.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:22:10.56#ibcon#first serial, iclass 29, count 0 2006.229.04:22:10.56#ibcon#enter sib2, iclass 29, count 0 2006.229.04:22:10.56#ibcon#flushed, iclass 29, count 0 2006.229.04:22:10.56#ibcon#about to write, iclass 29, count 0 2006.229.04:22:10.56#ibcon#wrote, iclass 29, count 0 2006.229.04:22:10.56#ibcon#about to read 3, iclass 29, count 0 2006.229.04:22:10.58#ibcon#read 3, iclass 29, count 0 2006.229.04:22:10.58#ibcon#about to read 4, iclass 29, count 0 2006.229.04:22:10.58#ibcon#read 4, iclass 29, count 0 2006.229.04:22:10.58#ibcon#about to read 5, iclass 29, count 0 2006.229.04:22:10.58#ibcon#read 5, iclass 29, count 0 2006.229.04:22:10.58#ibcon#about to read 6, iclass 29, count 0 2006.229.04:22:10.58#ibcon#read 6, iclass 29, count 0 2006.229.04:22:10.58#ibcon#end of sib2, iclass 29, count 0 2006.229.04:22:10.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:22:10.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:22:10.58#ibcon#[25=USB\r\n] 2006.229.04:22:10.58#ibcon#*before write, iclass 29, count 0 2006.229.04:22:10.58#ibcon#enter sib2, iclass 29, count 0 2006.229.04:22:10.58#ibcon#flushed, iclass 29, count 0 2006.229.04:22:10.58#ibcon#about to write, iclass 29, count 0 2006.229.04:22:10.58#ibcon#wrote, iclass 29, count 0 2006.229.04:22:10.58#ibcon#about to read 3, iclass 29, count 0 2006.229.04:22:10.61#ibcon#read 3, iclass 29, count 0 2006.229.04:22:10.61#ibcon#about to read 4, iclass 29, count 0 2006.229.04:22:10.61#ibcon#read 4, iclass 29, count 0 2006.229.04:22:10.61#ibcon#about to read 5, iclass 29, count 0 2006.229.04:22:10.61#ibcon#read 5, iclass 29, count 0 2006.229.04:22:10.61#ibcon#about to read 6, iclass 29, count 0 2006.229.04:22:10.61#ibcon#read 6, iclass 29, count 0 2006.229.04:22:10.61#ibcon#end of sib2, iclass 29, count 0 2006.229.04:22:10.61#ibcon#*after write, iclass 29, count 0 2006.229.04:22:10.61#ibcon#*before return 0, iclass 29, count 0 2006.229.04:22:10.61#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:10.61#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:10.61#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:22:10.61#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:22:10.61$vck44/valo=8,884.99 2006.229.04:22:10.61#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.04:22:10.61#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.04:22:10.61#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:10.61#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:10.61#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:10.61#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:10.61#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:22:10.61#ibcon#first serial, iclass 31, count 0 2006.229.04:22:10.61#ibcon#enter sib2, iclass 31, count 0 2006.229.04:22:10.61#ibcon#flushed, iclass 31, count 0 2006.229.04:22:10.61#ibcon#about to write, iclass 31, count 0 2006.229.04:22:10.61#ibcon#wrote, iclass 31, count 0 2006.229.04:22:10.61#ibcon#about to read 3, iclass 31, count 0 2006.229.04:22:10.63#ibcon#read 3, iclass 31, count 0 2006.229.04:22:10.63#ibcon#about to read 4, iclass 31, count 0 2006.229.04:22:10.63#ibcon#read 4, iclass 31, count 0 2006.229.04:22:10.63#ibcon#about to read 5, iclass 31, count 0 2006.229.04:22:10.63#ibcon#read 5, iclass 31, count 0 2006.229.04:22:10.63#ibcon#about to read 6, iclass 31, count 0 2006.229.04:22:10.63#ibcon#read 6, iclass 31, count 0 2006.229.04:22:10.63#ibcon#end of sib2, iclass 31, count 0 2006.229.04:22:10.63#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:22:10.63#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:22:10.63#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:22:10.63#ibcon#*before write, iclass 31, count 0 2006.229.04:22:10.63#ibcon#enter sib2, iclass 31, count 0 2006.229.04:22:10.63#ibcon#flushed, iclass 31, count 0 2006.229.04:22:10.63#ibcon#about to write, iclass 31, count 0 2006.229.04:22:10.63#ibcon#wrote, iclass 31, count 0 2006.229.04:22:10.63#ibcon#about to read 3, iclass 31, count 0 2006.229.04:22:10.67#ibcon#read 3, iclass 31, count 0 2006.229.04:22:10.67#ibcon#about to read 4, iclass 31, count 0 2006.229.04:22:10.67#ibcon#read 4, iclass 31, count 0 2006.229.04:22:10.67#ibcon#about to read 5, iclass 31, count 0 2006.229.04:22:10.67#ibcon#read 5, iclass 31, count 0 2006.229.04:22:10.67#ibcon#about to read 6, iclass 31, count 0 2006.229.04:22:10.67#ibcon#read 6, iclass 31, count 0 2006.229.04:22:10.67#ibcon#end of sib2, iclass 31, count 0 2006.229.04:22:10.67#ibcon#*after write, iclass 31, count 0 2006.229.04:22:10.67#ibcon#*before return 0, iclass 31, count 0 2006.229.04:22:10.67#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:10.67#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:10.67#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:22:10.67#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:22:10.67$vck44/va=8,6 2006.229.04:22:10.67#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.04:22:10.67#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.04:22:10.67#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:10.67#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:22:10.73#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:22:10.73#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:22:10.73#ibcon#enter wrdev, iclass 33, count 2 2006.229.04:22:10.73#ibcon#first serial, iclass 33, count 2 2006.229.04:22:10.73#ibcon#enter sib2, iclass 33, count 2 2006.229.04:22:10.73#ibcon#flushed, iclass 33, count 2 2006.229.04:22:10.73#ibcon#about to write, iclass 33, count 2 2006.229.04:22:10.73#ibcon#wrote, iclass 33, count 2 2006.229.04:22:10.73#ibcon#about to read 3, iclass 33, count 2 2006.229.04:22:10.75#ibcon#read 3, iclass 33, count 2 2006.229.04:22:10.75#ibcon#about to read 4, iclass 33, count 2 2006.229.04:22:10.75#ibcon#read 4, iclass 33, count 2 2006.229.04:22:10.75#ibcon#about to read 5, iclass 33, count 2 2006.229.04:22:10.75#ibcon#read 5, iclass 33, count 2 2006.229.04:22:10.75#ibcon#about to read 6, iclass 33, count 2 2006.229.04:22:10.75#ibcon#read 6, iclass 33, count 2 2006.229.04:22:10.75#ibcon#end of sib2, iclass 33, count 2 2006.229.04:22:10.75#ibcon#*mode == 0, iclass 33, count 2 2006.229.04:22:10.75#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.04:22:10.75#ibcon#[25=AT08-06\r\n] 2006.229.04:22:10.75#ibcon#*before write, iclass 33, count 2 2006.229.04:22:10.75#ibcon#enter sib2, iclass 33, count 2 2006.229.04:22:10.75#ibcon#flushed, iclass 33, count 2 2006.229.04:22:10.75#ibcon#about to write, iclass 33, count 2 2006.229.04:22:10.75#ibcon#wrote, iclass 33, count 2 2006.229.04:22:10.75#ibcon#about to read 3, iclass 33, count 2 2006.229.04:22:10.78#ibcon#read 3, iclass 33, count 2 2006.229.04:22:10.78#ibcon#about to read 4, iclass 33, count 2 2006.229.04:22:10.78#ibcon#read 4, iclass 33, count 2 2006.229.04:22:10.78#ibcon#about to read 5, iclass 33, count 2 2006.229.04:22:10.78#ibcon#read 5, iclass 33, count 2 2006.229.04:22:10.78#ibcon#about to read 6, iclass 33, count 2 2006.229.04:22:10.78#ibcon#read 6, iclass 33, count 2 2006.229.04:22:10.78#ibcon#end of sib2, iclass 33, count 2 2006.229.04:22:10.78#ibcon#*after write, iclass 33, count 2 2006.229.04:22:10.78#ibcon#*before return 0, iclass 33, count 2 2006.229.04:22:10.78#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:22:10.78#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:22:10.78#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.04:22:10.78#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:10.78#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:22:10.90#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:22:10.90#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:22:10.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:22:10.90#ibcon#first serial, iclass 33, count 0 2006.229.04:22:10.90#ibcon#enter sib2, iclass 33, count 0 2006.229.04:22:10.90#ibcon#flushed, iclass 33, count 0 2006.229.04:22:10.90#ibcon#about to write, iclass 33, count 0 2006.229.04:22:10.90#ibcon#wrote, iclass 33, count 0 2006.229.04:22:10.90#ibcon#about to read 3, iclass 33, count 0 2006.229.04:22:10.92#ibcon#read 3, iclass 33, count 0 2006.229.04:22:10.92#ibcon#about to read 4, iclass 33, count 0 2006.229.04:22:10.92#ibcon#read 4, iclass 33, count 0 2006.229.04:22:10.92#ibcon#about to read 5, iclass 33, count 0 2006.229.04:22:10.92#ibcon#read 5, iclass 33, count 0 2006.229.04:22:10.92#ibcon#about to read 6, iclass 33, count 0 2006.229.04:22:10.92#ibcon#read 6, iclass 33, count 0 2006.229.04:22:10.92#ibcon#end of sib2, iclass 33, count 0 2006.229.04:22:10.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:22:10.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:22:10.92#ibcon#[25=USB\r\n] 2006.229.04:22:10.92#ibcon#*before write, iclass 33, count 0 2006.229.04:22:10.92#ibcon#enter sib2, iclass 33, count 0 2006.229.04:22:10.92#ibcon#flushed, iclass 33, count 0 2006.229.04:22:10.92#ibcon#about to write, iclass 33, count 0 2006.229.04:22:10.92#ibcon#wrote, iclass 33, count 0 2006.229.04:22:10.92#ibcon#about to read 3, iclass 33, count 0 2006.229.04:22:10.95#ibcon#read 3, iclass 33, count 0 2006.229.04:22:10.95#ibcon#about to read 4, iclass 33, count 0 2006.229.04:22:10.95#ibcon#read 4, iclass 33, count 0 2006.229.04:22:10.95#ibcon#about to read 5, iclass 33, count 0 2006.229.04:22:10.95#ibcon#read 5, iclass 33, count 0 2006.229.04:22:10.95#ibcon#about to read 6, iclass 33, count 0 2006.229.04:22:10.95#ibcon#read 6, iclass 33, count 0 2006.229.04:22:10.95#ibcon#end of sib2, iclass 33, count 0 2006.229.04:22:10.95#ibcon#*after write, iclass 33, count 0 2006.229.04:22:10.95#ibcon#*before return 0, iclass 33, count 0 2006.229.04:22:10.95#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:22:10.95#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:22:10.95#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:22:10.95#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:22:10.95$vck44/vblo=1,629.99 2006.229.04:22:10.95#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.04:22:10.95#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.04:22:10.95#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:10.95#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:22:10.95#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:22:10.95#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:22:10.95#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:22:10.95#ibcon#first serial, iclass 35, count 0 2006.229.04:22:10.95#ibcon#enter sib2, iclass 35, count 0 2006.229.04:22:10.95#ibcon#flushed, iclass 35, count 0 2006.229.04:22:10.95#ibcon#about to write, iclass 35, count 0 2006.229.04:22:10.95#ibcon#wrote, iclass 35, count 0 2006.229.04:22:10.95#ibcon#about to read 3, iclass 35, count 0 2006.229.04:22:10.97#ibcon#read 3, iclass 35, count 0 2006.229.04:22:10.97#ibcon#about to read 4, iclass 35, count 0 2006.229.04:22:10.97#ibcon#read 4, iclass 35, count 0 2006.229.04:22:10.97#ibcon#about to read 5, iclass 35, count 0 2006.229.04:22:10.97#ibcon#read 5, iclass 35, count 0 2006.229.04:22:10.97#ibcon#about to read 6, iclass 35, count 0 2006.229.04:22:10.97#ibcon#read 6, iclass 35, count 0 2006.229.04:22:10.97#ibcon#end of sib2, iclass 35, count 0 2006.229.04:22:10.97#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:22:10.97#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:22:10.97#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:22:10.97#ibcon#*before write, iclass 35, count 0 2006.229.04:22:10.97#ibcon#enter sib2, iclass 35, count 0 2006.229.04:22:10.97#ibcon#flushed, iclass 35, count 0 2006.229.04:22:10.97#ibcon#about to write, iclass 35, count 0 2006.229.04:22:10.97#ibcon#wrote, iclass 35, count 0 2006.229.04:22:10.97#ibcon#about to read 3, iclass 35, count 0 2006.229.04:22:11.01#ibcon#read 3, iclass 35, count 0 2006.229.04:22:11.01#ibcon#about to read 4, iclass 35, count 0 2006.229.04:22:11.01#ibcon#read 4, iclass 35, count 0 2006.229.04:22:11.01#ibcon#about to read 5, iclass 35, count 0 2006.229.04:22:11.01#ibcon#read 5, iclass 35, count 0 2006.229.04:22:11.01#ibcon#about to read 6, iclass 35, count 0 2006.229.04:22:11.01#ibcon#read 6, iclass 35, count 0 2006.229.04:22:11.01#ibcon#end of sib2, iclass 35, count 0 2006.229.04:22:11.01#ibcon#*after write, iclass 35, count 0 2006.229.04:22:11.01#ibcon#*before return 0, iclass 35, count 0 2006.229.04:22:11.01#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:22:11.01#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:22:11.01#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:22:11.01#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:22:11.01$vck44/vb=1,4 2006.229.04:22:11.01#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.04:22:11.01#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.04:22:11.01#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:11.01#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:22:11.01#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:22:11.01#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:22:11.01#ibcon#enter wrdev, iclass 37, count 2 2006.229.04:22:11.01#ibcon#first serial, iclass 37, count 2 2006.229.04:22:11.01#ibcon#enter sib2, iclass 37, count 2 2006.229.04:22:11.01#ibcon#flushed, iclass 37, count 2 2006.229.04:22:11.01#ibcon#about to write, iclass 37, count 2 2006.229.04:22:11.01#ibcon#wrote, iclass 37, count 2 2006.229.04:22:11.01#ibcon#about to read 3, iclass 37, count 2 2006.229.04:22:11.03#ibcon#read 3, iclass 37, count 2 2006.229.04:22:11.03#ibcon#about to read 4, iclass 37, count 2 2006.229.04:22:11.03#ibcon#read 4, iclass 37, count 2 2006.229.04:22:11.03#ibcon#about to read 5, iclass 37, count 2 2006.229.04:22:11.03#ibcon#read 5, iclass 37, count 2 2006.229.04:22:11.03#ibcon#about to read 6, iclass 37, count 2 2006.229.04:22:11.03#ibcon#read 6, iclass 37, count 2 2006.229.04:22:11.03#ibcon#end of sib2, iclass 37, count 2 2006.229.04:22:11.03#ibcon#*mode == 0, iclass 37, count 2 2006.229.04:22:11.03#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.04:22:11.03#ibcon#[27=AT01-04\r\n] 2006.229.04:22:11.03#ibcon#*before write, iclass 37, count 2 2006.229.04:22:11.03#ibcon#enter sib2, iclass 37, count 2 2006.229.04:22:11.03#ibcon#flushed, iclass 37, count 2 2006.229.04:22:11.03#ibcon#about to write, iclass 37, count 2 2006.229.04:22:11.03#ibcon#wrote, iclass 37, count 2 2006.229.04:22:11.03#ibcon#about to read 3, iclass 37, count 2 2006.229.04:22:11.06#ibcon#read 3, iclass 37, count 2 2006.229.04:22:11.06#ibcon#about to read 4, iclass 37, count 2 2006.229.04:22:11.06#ibcon#read 4, iclass 37, count 2 2006.229.04:22:11.06#ibcon#about to read 5, iclass 37, count 2 2006.229.04:22:11.06#ibcon#read 5, iclass 37, count 2 2006.229.04:22:11.06#ibcon#about to read 6, iclass 37, count 2 2006.229.04:22:11.06#ibcon#read 6, iclass 37, count 2 2006.229.04:22:11.06#ibcon#end of sib2, iclass 37, count 2 2006.229.04:22:11.06#ibcon#*after write, iclass 37, count 2 2006.229.04:22:11.06#ibcon#*before return 0, iclass 37, count 2 2006.229.04:22:11.06#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:22:11.06#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:22:11.06#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.04:22:11.06#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:11.06#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:22:11.18#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:22:11.18#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:22:11.18#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:22:11.18#ibcon#first serial, iclass 37, count 0 2006.229.04:22:11.18#ibcon#enter sib2, iclass 37, count 0 2006.229.04:22:11.18#ibcon#flushed, iclass 37, count 0 2006.229.04:22:11.18#ibcon#about to write, iclass 37, count 0 2006.229.04:22:11.18#ibcon#wrote, iclass 37, count 0 2006.229.04:22:11.18#ibcon#about to read 3, iclass 37, count 0 2006.229.04:22:11.20#ibcon#read 3, iclass 37, count 0 2006.229.04:22:11.20#ibcon#about to read 4, iclass 37, count 0 2006.229.04:22:11.20#ibcon#read 4, iclass 37, count 0 2006.229.04:22:11.20#ibcon#about to read 5, iclass 37, count 0 2006.229.04:22:11.20#ibcon#read 5, iclass 37, count 0 2006.229.04:22:11.20#ibcon#about to read 6, iclass 37, count 0 2006.229.04:22:11.20#ibcon#read 6, iclass 37, count 0 2006.229.04:22:11.20#ibcon#end of sib2, iclass 37, count 0 2006.229.04:22:11.20#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:22:11.20#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:22:11.20#ibcon#[27=USB\r\n] 2006.229.04:22:11.20#ibcon#*before write, iclass 37, count 0 2006.229.04:22:11.20#ibcon#enter sib2, iclass 37, count 0 2006.229.04:22:11.20#ibcon#flushed, iclass 37, count 0 2006.229.04:22:11.20#ibcon#about to write, iclass 37, count 0 2006.229.04:22:11.20#ibcon#wrote, iclass 37, count 0 2006.229.04:22:11.20#ibcon#about to read 3, iclass 37, count 0 2006.229.04:22:11.23#ibcon#read 3, iclass 37, count 0 2006.229.04:22:11.23#ibcon#about to read 4, iclass 37, count 0 2006.229.04:22:11.23#ibcon#read 4, iclass 37, count 0 2006.229.04:22:11.23#ibcon#about to read 5, iclass 37, count 0 2006.229.04:22:11.23#ibcon#read 5, iclass 37, count 0 2006.229.04:22:11.23#ibcon#about to read 6, iclass 37, count 0 2006.229.04:22:11.23#ibcon#read 6, iclass 37, count 0 2006.229.04:22:11.23#ibcon#end of sib2, iclass 37, count 0 2006.229.04:22:11.23#ibcon#*after write, iclass 37, count 0 2006.229.04:22:11.23#ibcon#*before return 0, iclass 37, count 0 2006.229.04:22:11.23#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:22:11.23#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:22:11.23#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:22:11.23#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:22:11.23$vck44/vblo=2,634.99 2006.229.04:22:11.23#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.04:22:11.23#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.04:22:11.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:11.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:22:11.23#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:22:11.23#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:22:11.23#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:22:11.23#ibcon#first serial, iclass 39, count 0 2006.229.04:22:11.23#ibcon#enter sib2, iclass 39, count 0 2006.229.04:22:11.23#ibcon#flushed, iclass 39, count 0 2006.229.04:22:11.23#ibcon#about to write, iclass 39, count 0 2006.229.04:22:11.23#ibcon#wrote, iclass 39, count 0 2006.229.04:22:11.23#ibcon#about to read 3, iclass 39, count 0 2006.229.04:22:11.25#ibcon#read 3, iclass 39, count 0 2006.229.04:22:11.25#ibcon#about to read 4, iclass 39, count 0 2006.229.04:22:11.25#ibcon#read 4, iclass 39, count 0 2006.229.04:22:11.25#ibcon#about to read 5, iclass 39, count 0 2006.229.04:22:11.25#ibcon#read 5, iclass 39, count 0 2006.229.04:22:11.25#ibcon#about to read 6, iclass 39, count 0 2006.229.04:22:11.25#ibcon#read 6, iclass 39, count 0 2006.229.04:22:11.25#ibcon#end of sib2, iclass 39, count 0 2006.229.04:22:11.25#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:22:11.25#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:22:11.25#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:22:11.25#ibcon#*before write, iclass 39, count 0 2006.229.04:22:11.25#ibcon#enter sib2, iclass 39, count 0 2006.229.04:22:11.25#ibcon#flushed, iclass 39, count 0 2006.229.04:22:11.25#ibcon#about to write, iclass 39, count 0 2006.229.04:22:11.25#ibcon#wrote, iclass 39, count 0 2006.229.04:22:11.25#ibcon#about to read 3, iclass 39, count 0 2006.229.04:22:11.29#ibcon#read 3, iclass 39, count 0 2006.229.04:22:11.29#ibcon#about to read 4, iclass 39, count 0 2006.229.04:22:11.29#ibcon#read 4, iclass 39, count 0 2006.229.04:22:11.29#ibcon#about to read 5, iclass 39, count 0 2006.229.04:22:11.29#ibcon#read 5, iclass 39, count 0 2006.229.04:22:11.29#ibcon#about to read 6, iclass 39, count 0 2006.229.04:22:11.29#ibcon#read 6, iclass 39, count 0 2006.229.04:22:11.29#ibcon#end of sib2, iclass 39, count 0 2006.229.04:22:11.29#ibcon#*after write, iclass 39, count 0 2006.229.04:22:11.29#ibcon#*before return 0, iclass 39, count 0 2006.229.04:22:11.29#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:22:11.29#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:22:11.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:22:11.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:22:11.29$vck44/vb=2,4 2006.229.04:22:11.29#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.04:22:11.29#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.04:22:11.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:11.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:22:11.35#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:22:11.35#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:22:11.35#ibcon#enter wrdev, iclass 3, count 2 2006.229.04:22:11.35#ibcon#first serial, iclass 3, count 2 2006.229.04:22:11.35#ibcon#enter sib2, iclass 3, count 2 2006.229.04:22:11.35#ibcon#flushed, iclass 3, count 2 2006.229.04:22:11.35#ibcon#about to write, iclass 3, count 2 2006.229.04:22:11.35#ibcon#wrote, iclass 3, count 2 2006.229.04:22:11.35#ibcon#about to read 3, iclass 3, count 2 2006.229.04:22:11.37#ibcon#read 3, iclass 3, count 2 2006.229.04:22:11.37#ibcon#about to read 4, iclass 3, count 2 2006.229.04:22:11.37#ibcon#read 4, iclass 3, count 2 2006.229.04:22:11.37#ibcon#about to read 5, iclass 3, count 2 2006.229.04:22:11.37#ibcon#read 5, iclass 3, count 2 2006.229.04:22:11.37#ibcon#about to read 6, iclass 3, count 2 2006.229.04:22:11.37#ibcon#read 6, iclass 3, count 2 2006.229.04:22:11.37#ibcon#end of sib2, iclass 3, count 2 2006.229.04:22:11.37#ibcon#*mode == 0, iclass 3, count 2 2006.229.04:22:11.37#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.04:22:11.37#ibcon#[27=AT02-04\r\n] 2006.229.04:22:11.37#ibcon#*before write, iclass 3, count 2 2006.229.04:22:11.37#ibcon#enter sib2, iclass 3, count 2 2006.229.04:22:11.37#ibcon#flushed, iclass 3, count 2 2006.229.04:22:11.37#ibcon#about to write, iclass 3, count 2 2006.229.04:22:11.37#ibcon#wrote, iclass 3, count 2 2006.229.04:22:11.37#ibcon#about to read 3, iclass 3, count 2 2006.229.04:22:11.40#ibcon#read 3, iclass 3, count 2 2006.229.04:22:11.40#ibcon#about to read 4, iclass 3, count 2 2006.229.04:22:11.40#ibcon#read 4, iclass 3, count 2 2006.229.04:22:11.40#ibcon#about to read 5, iclass 3, count 2 2006.229.04:22:11.40#ibcon#read 5, iclass 3, count 2 2006.229.04:22:11.40#ibcon#about to read 6, iclass 3, count 2 2006.229.04:22:11.40#ibcon#read 6, iclass 3, count 2 2006.229.04:22:11.40#ibcon#end of sib2, iclass 3, count 2 2006.229.04:22:11.40#ibcon#*after write, iclass 3, count 2 2006.229.04:22:11.40#ibcon#*before return 0, iclass 3, count 2 2006.229.04:22:11.40#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:22:11.40#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:22:11.40#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.04:22:11.40#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:11.40#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:22:11.52#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:22:11.52#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:22:11.52#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:22:11.52#ibcon#first serial, iclass 3, count 0 2006.229.04:22:11.52#ibcon#enter sib2, iclass 3, count 0 2006.229.04:22:11.52#ibcon#flushed, iclass 3, count 0 2006.229.04:22:11.52#ibcon#about to write, iclass 3, count 0 2006.229.04:22:11.52#ibcon#wrote, iclass 3, count 0 2006.229.04:22:11.52#ibcon#about to read 3, iclass 3, count 0 2006.229.04:22:11.54#ibcon#read 3, iclass 3, count 0 2006.229.04:22:11.54#ibcon#about to read 4, iclass 3, count 0 2006.229.04:22:11.54#ibcon#read 4, iclass 3, count 0 2006.229.04:22:11.54#ibcon#about to read 5, iclass 3, count 0 2006.229.04:22:11.54#ibcon#read 5, iclass 3, count 0 2006.229.04:22:11.54#ibcon#about to read 6, iclass 3, count 0 2006.229.04:22:11.54#ibcon#read 6, iclass 3, count 0 2006.229.04:22:11.54#ibcon#end of sib2, iclass 3, count 0 2006.229.04:22:11.54#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:22:11.54#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:22:11.54#ibcon#[27=USB\r\n] 2006.229.04:22:11.54#ibcon#*before write, iclass 3, count 0 2006.229.04:22:11.54#ibcon#enter sib2, iclass 3, count 0 2006.229.04:22:11.54#ibcon#flushed, iclass 3, count 0 2006.229.04:22:11.54#ibcon#about to write, iclass 3, count 0 2006.229.04:22:11.54#ibcon#wrote, iclass 3, count 0 2006.229.04:22:11.54#ibcon#about to read 3, iclass 3, count 0 2006.229.04:22:11.57#ibcon#read 3, iclass 3, count 0 2006.229.04:22:11.57#ibcon#about to read 4, iclass 3, count 0 2006.229.04:22:11.57#ibcon#read 4, iclass 3, count 0 2006.229.04:22:11.57#ibcon#about to read 5, iclass 3, count 0 2006.229.04:22:11.57#ibcon#read 5, iclass 3, count 0 2006.229.04:22:11.57#ibcon#about to read 6, iclass 3, count 0 2006.229.04:22:11.57#ibcon#read 6, iclass 3, count 0 2006.229.04:22:11.57#ibcon#end of sib2, iclass 3, count 0 2006.229.04:22:11.57#ibcon#*after write, iclass 3, count 0 2006.229.04:22:11.57#ibcon#*before return 0, iclass 3, count 0 2006.229.04:22:11.57#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:22:11.57#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:22:11.57#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:22:11.57#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:22:11.57$vck44/vblo=3,649.99 2006.229.04:22:11.57#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.04:22:11.57#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.04:22:11.57#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:11.57#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:11.57#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:11.57#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:11.57#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:22:11.57#ibcon#first serial, iclass 5, count 0 2006.229.04:22:11.57#ibcon#enter sib2, iclass 5, count 0 2006.229.04:22:11.57#ibcon#flushed, iclass 5, count 0 2006.229.04:22:11.57#ibcon#about to write, iclass 5, count 0 2006.229.04:22:11.57#ibcon#wrote, iclass 5, count 0 2006.229.04:22:11.57#ibcon#about to read 3, iclass 5, count 0 2006.229.04:22:11.59#ibcon#read 3, iclass 5, count 0 2006.229.04:22:11.59#ibcon#about to read 4, iclass 5, count 0 2006.229.04:22:11.59#ibcon#read 4, iclass 5, count 0 2006.229.04:22:11.59#ibcon#about to read 5, iclass 5, count 0 2006.229.04:22:11.59#ibcon#read 5, iclass 5, count 0 2006.229.04:22:11.59#ibcon#about to read 6, iclass 5, count 0 2006.229.04:22:11.59#ibcon#read 6, iclass 5, count 0 2006.229.04:22:11.59#ibcon#end of sib2, iclass 5, count 0 2006.229.04:22:11.59#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:22:11.59#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:22:11.59#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:22:11.59#ibcon#*before write, iclass 5, count 0 2006.229.04:22:11.59#ibcon#enter sib2, iclass 5, count 0 2006.229.04:22:11.59#ibcon#flushed, iclass 5, count 0 2006.229.04:22:11.59#ibcon#about to write, iclass 5, count 0 2006.229.04:22:11.59#ibcon#wrote, iclass 5, count 0 2006.229.04:22:11.59#ibcon#about to read 3, iclass 5, count 0 2006.229.04:22:11.63#ibcon#read 3, iclass 5, count 0 2006.229.04:22:11.63#ibcon#about to read 4, iclass 5, count 0 2006.229.04:22:11.63#ibcon#read 4, iclass 5, count 0 2006.229.04:22:11.63#ibcon#about to read 5, iclass 5, count 0 2006.229.04:22:11.63#ibcon#read 5, iclass 5, count 0 2006.229.04:22:11.63#ibcon#about to read 6, iclass 5, count 0 2006.229.04:22:11.63#ibcon#read 6, iclass 5, count 0 2006.229.04:22:11.63#ibcon#end of sib2, iclass 5, count 0 2006.229.04:22:11.63#ibcon#*after write, iclass 5, count 0 2006.229.04:22:11.63#ibcon#*before return 0, iclass 5, count 0 2006.229.04:22:11.63#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:11.63#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:22:11.63#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:22:11.63#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:22:11.63$vck44/vb=3,4 2006.229.04:22:11.63#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.04:22:11.63#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.04:22:11.63#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:11.63#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:11.69#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:11.69#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:11.69#ibcon#enter wrdev, iclass 7, count 2 2006.229.04:22:11.69#ibcon#first serial, iclass 7, count 2 2006.229.04:22:11.69#ibcon#enter sib2, iclass 7, count 2 2006.229.04:22:11.69#ibcon#flushed, iclass 7, count 2 2006.229.04:22:11.69#ibcon#about to write, iclass 7, count 2 2006.229.04:22:11.69#ibcon#wrote, iclass 7, count 2 2006.229.04:22:11.69#ibcon#about to read 3, iclass 7, count 2 2006.229.04:22:11.71#ibcon#read 3, iclass 7, count 2 2006.229.04:22:11.71#ibcon#about to read 4, iclass 7, count 2 2006.229.04:22:11.71#ibcon#read 4, iclass 7, count 2 2006.229.04:22:11.71#ibcon#about to read 5, iclass 7, count 2 2006.229.04:22:11.71#ibcon#read 5, iclass 7, count 2 2006.229.04:22:11.71#ibcon#about to read 6, iclass 7, count 2 2006.229.04:22:11.71#ibcon#read 6, iclass 7, count 2 2006.229.04:22:11.71#ibcon#end of sib2, iclass 7, count 2 2006.229.04:22:11.71#ibcon#*mode == 0, iclass 7, count 2 2006.229.04:22:11.71#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.04:22:11.71#ibcon#[27=AT03-04\r\n] 2006.229.04:22:11.71#ibcon#*before write, iclass 7, count 2 2006.229.04:22:11.71#ibcon#enter sib2, iclass 7, count 2 2006.229.04:22:11.71#ibcon#flushed, iclass 7, count 2 2006.229.04:22:11.71#ibcon#about to write, iclass 7, count 2 2006.229.04:22:11.71#ibcon#wrote, iclass 7, count 2 2006.229.04:22:11.71#ibcon#about to read 3, iclass 7, count 2 2006.229.04:22:11.74#ibcon#read 3, iclass 7, count 2 2006.229.04:22:11.74#ibcon#about to read 4, iclass 7, count 2 2006.229.04:22:11.74#ibcon#read 4, iclass 7, count 2 2006.229.04:22:11.74#ibcon#about to read 5, iclass 7, count 2 2006.229.04:22:11.74#ibcon#read 5, iclass 7, count 2 2006.229.04:22:11.74#ibcon#about to read 6, iclass 7, count 2 2006.229.04:22:11.74#ibcon#read 6, iclass 7, count 2 2006.229.04:22:11.74#ibcon#end of sib2, iclass 7, count 2 2006.229.04:22:11.74#ibcon#*after write, iclass 7, count 2 2006.229.04:22:11.74#ibcon#*before return 0, iclass 7, count 2 2006.229.04:22:11.74#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:11.74#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:22:11.74#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.04:22:11.74#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:11.74#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:11.86#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:11.86#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:11.86#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:22:11.86#ibcon#first serial, iclass 7, count 0 2006.229.04:22:11.86#ibcon#enter sib2, iclass 7, count 0 2006.229.04:22:11.86#ibcon#flushed, iclass 7, count 0 2006.229.04:22:11.86#ibcon#about to write, iclass 7, count 0 2006.229.04:22:11.86#ibcon#wrote, iclass 7, count 0 2006.229.04:22:11.86#ibcon#about to read 3, iclass 7, count 0 2006.229.04:22:11.88#ibcon#read 3, iclass 7, count 0 2006.229.04:22:11.88#ibcon#about to read 4, iclass 7, count 0 2006.229.04:22:11.88#ibcon#read 4, iclass 7, count 0 2006.229.04:22:11.88#ibcon#about to read 5, iclass 7, count 0 2006.229.04:22:11.88#ibcon#read 5, iclass 7, count 0 2006.229.04:22:11.88#ibcon#about to read 6, iclass 7, count 0 2006.229.04:22:11.88#ibcon#read 6, iclass 7, count 0 2006.229.04:22:11.88#ibcon#end of sib2, iclass 7, count 0 2006.229.04:22:11.88#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:22:11.88#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:22:11.88#ibcon#[27=USB\r\n] 2006.229.04:22:11.88#ibcon#*before write, iclass 7, count 0 2006.229.04:22:11.88#ibcon#enter sib2, iclass 7, count 0 2006.229.04:22:11.88#ibcon#flushed, iclass 7, count 0 2006.229.04:22:11.88#ibcon#about to write, iclass 7, count 0 2006.229.04:22:11.88#ibcon#wrote, iclass 7, count 0 2006.229.04:22:11.88#ibcon#about to read 3, iclass 7, count 0 2006.229.04:22:11.91#ibcon#read 3, iclass 7, count 0 2006.229.04:22:11.91#ibcon#about to read 4, iclass 7, count 0 2006.229.04:22:11.91#ibcon#read 4, iclass 7, count 0 2006.229.04:22:11.91#ibcon#about to read 5, iclass 7, count 0 2006.229.04:22:11.91#ibcon#read 5, iclass 7, count 0 2006.229.04:22:11.91#ibcon#about to read 6, iclass 7, count 0 2006.229.04:22:11.91#ibcon#read 6, iclass 7, count 0 2006.229.04:22:11.91#ibcon#end of sib2, iclass 7, count 0 2006.229.04:22:11.91#ibcon#*after write, iclass 7, count 0 2006.229.04:22:11.91#ibcon#*before return 0, iclass 7, count 0 2006.229.04:22:11.91#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:11.91#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:22:11.91#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:22:11.91#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:22:11.91$vck44/vblo=4,679.99 2006.229.04:22:11.91#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.04:22:11.91#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.04:22:11.91#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:11.91#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:11.91#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:11.91#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:11.91#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:22:11.91#ibcon#first serial, iclass 11, count 0 2006.229.04:22:11.91#ibcon#enter sib2, iclass 11, count 0 2006.229.04:22:11.91#ibcon#flushed, iclass 11, count 0 2006.229.04:22:11.91#ibcon#about to write, iclass 11, count 0 2006.229.04:22:11.91#ibcon#wrote, iclass 11, count 0 2006.229.04:22:11.91#ibcon#about to read 3, iclass 11, count 0 2006.229.04:22:11.93#ibcon#read 3, iclass 11, count 0 2006.229.04:22:11.93#ibcon#about to read 4, iclass 11, count 0 2006.229.04:22:11.93#ibcon#read 4, iclass 11, count 0 2006.229.04:22:11.93#ibcon#about to read 5, iclass 11, count 0 2006.229.04:22:11.93#ibcon#read 5, iclass 11, count 0 2006.229.04:22:11.93#ibcon#about to read 6, iclass 11, count 0 2006.229.04:22:11.93#ibcon#read 6, iclass 11, count 0 2006.229.04:22:11.93#ibcon#end of sib2, iclass 11, count 0 2006.229.04:22:11.93#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:22:11.93#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:22:11.93#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:22:11.93#ibcon#*before write, iclass 11, count 0 2006.229.04:22:11.93#ibcon#enter sib2, iclass 11, count 0 2006.229.04:22:11.93#ibcon#flushed, iclass 11, count 0 2006.229.04:22:11.93#ibcon#about to write, iclass 11, count 0 2006.229.04:22:11.93#ibcon#wrote, iclass 11, count 0 2006.229.04:22:11.93#ibcon#about to read 3, iclass 11, count 0 2006.229.04:22:11.97#ibcon#read 3, iclass 11, count 0 2006.229.04:22:11.97#ibcon#about to read 4, iclass 11, count 0 2006.229.04:22:11.97#ibcon#read 4, iclass 11, count 0 2006.229.04:22:11.97#ibcon#about to read 5, iclass 11, count 0 2006.229.04:22:11.97#ibcon#read 5, iclass 11, count 0 2006.229.04:22:11.97#ibcon#about to read 6, iclass 11, count 0 2006.229.04:22:11.97#ibcon#read 6, iclass 11, count 0 2006.229.04:22:11.97#ibcon#end of sib2, iclass 11, count 0 2006.229.04:22:11.97#ibcon#*after write, iclass 11, count 0 2006.229.04:22:11.97#ibcon#*before return 0, iclass 11, count 0 2006.229.04:22:11.97#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:11.97#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:22:11.97#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:22:11.97#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:22:11.97$vck44/vb=4,4 2006.229.04:22:11.97#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.04:22:11.97#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.04:22:11.97#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:11.97#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:12.03#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:12.03#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:12.03#ibcon#enter wrdev, iclass 13, count 2 2006.229.04:22:12.03#ibcon#first serial, iclass 13, count 2 2006.229.04:22:12.03#ibcon#enter sib2, iclass 13, count 2 2006.229.04:22:12.03#ibcon#flushed, iclass 13, count 2 2006.229.04:22:12.03#ibcon#about to write, iclass 13, count 2 2006.229.04:22:12.03#ibcon#wrote, iclass 13, count 2 2006.229.04:22:12.03#ibcon#about to read 3, iclass 13, count 2 2006.229.04:22:12.05#ibcon#read 3, iclass 13, count 2 2006.229.04:22:12.05#ibcon#about to read 4, iclass 13, count 2 2006.229.04:22:12.05#ibcon#read 4, iclass 13, count 2 2006.229.04:22:12.05#ibcon#about to read 5, iclass 13, count 2 2006.229.04:22:12.05#ibcon#read 5, iclass 13, count 2 2006.229.04:22:12.05#ibcon#about to read 6, iclass 13, count 2 2006.229.04:22:12.05#ibcon#read 6, iclass 13, count 2 2006.229.04:22:12.05#ibcon#end of sib2, iclass 13, count 2 2006.229.04:22:12.05#ibcon#*mode == 0, iclass 13, count 2 2006.229.04:22:12.05#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.04:22:12.05#ibcon#[27=AT04-04\r\n] 2006.229.04:22:12.05#ibcon#*before write, iclass 13, count 2 2006.229.04:22:12.05#ibcon#enter sib2, iclass 13, count 2 2006.229.04:22:12.05#ibcon#flushed, iclass 13, count 2 2006.229.04:22:12.05#ibcon#about to write, iclass 13, count 2 2006.229.04:22:12.05#ibcon#wrote, iclass 13, count 2 2006.229.04:22:12.05#ibcon#about to read 3, iclass 13, count 2 2006.229.04:22:12.08#ibcon#read 3, iclass 13, count 2 2006.229.04:22:12.08#ibcon#about to read 4, iclass 13, count 2 2006.229.04:22:12.08#ibcon#read 4, iclass 13, count 2 2006.229.04:22:12.08#ibcon#about to read 5, iclass 13, count 2 2006.229.04:22:12.08#ibcon#read 5, iclass 13, count 2 2006.229.04:22:12.08#ibcon#about to read 6, iclass 13, count 2 2006.229.04:22:12.08#ibcon#read 6, iclass 13, count 2 2006.229.04:22:12.08#ibcon#end of sib2, iclass 13, count 2 2006.229.04:22:12.08#ibcon#*after write, iclass 13, count 2 2006.229.04:22:12.08#ibcon#*before return 0, iclass 13, count 2 2006.229.04:22:12.08#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:12.08#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:22:12.08#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.04:22:12.08#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:12.08#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:12.20#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:12.20#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:12.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:22:12.20#ibcon#first serial, iclass 13, count 0 2006.229.04:22:12.20#ibcon#enter sib2, iclass 13, count 0 2006.229.04:22:12.20#ibcon#flushed, iclass 13, count 0 2006.229.04:22:12.20#ibcon#about to write, iclass 13, count 0 2006.229.04:22:12.20#ibcon#wrote, iclass 13, count 0 2006.229.04:22:12.20#ibcon#about to read 3, iclass 13, count 0 2006.229.04:22:12.22#ibcon#read 3, iclass 13, count 0 2006.229.04:22:12.22#ibcon#about to read 4, iclass 13, count 0 2006.229.04:22:12.22#ibcon#read 4, iclass 13, count 0 2006.229.04:22:12.22#ibcon#about to read 5, iclass 13, count 0 2006.229.04:22:12.22#ibcon#read 5, iclass 13, count 0 2006.229.04:22:12.22#ibcon#about to read 6, iclass 13, count 0 2006.229.04:22:12.22#ibcon#read 6, iclass 13, count 0 2006.229.04:22:12.22#ibcon#end of sib2, iclass 13, count 0 2006.229.04:22:12.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:22:12.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:22:12.22#ibcon#[27=USB\r\n] 2006.229.04:22:12.22#ibcon#*before write, iclass 13, count 0 2006.229.04:22:12.22#ibcon#enter sib2, iclass 13, count 0 2006.229.04:22:12.22#ibcon#flushed, iclass 13, count 0 2006.229.04:22:12.22#ibcon#about to write, iclass 13, count 0 2006.229.04:22:12.22#ibcon#wrote, iclass 13, count 0 2006.229.04:22:12.22#ibcon#about to read 3, iclass 13, count 0 2006.229.04:22:12.25#ibcon#read 3, iclass 13, count 0 2006.229.04:22:12.25#ibcon#about to read 4, iclass 13, count 0 2006.229.04:22:12.25#ibcon#read 4, iclass 13, count 0 2006.229.04:22:12.25#ibcon#about to read 5, iclass 13, count 0 2006.229.04:22:12.25#ibcon#read 5, iclass 13, count 0 2006.229.04:22:12.25#ibcon#about to read 6, iclass 13, count 0 2006.229.04:22:12.25#ibcon#read 6, iclass 13, count 0 2006.229.04:22:12.25#ibcon#end of sib2, iclass 13, count 0 2006.229.04:22:12.25#ibcon#*after write, iclass 13, count 0 2006.229.04:22:12.25#ibcon#*before return 0, iclass 13, count 0 2006.229.04:22:12.25#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:12.25#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:22:12.25#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:22:12.25#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:22:12.25$vck44/vblo=5,709.99 2006.229.04:22:12.25#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.04:22:12.25#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.04:22:12.25#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:12.25#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:12.25#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:12.25#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:12.25#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:22:12.25#ibcon#first serial, iclass 15, count 0 2006.229.04:22:12.25#ibcon#enter sib2, iclass 15, count 0 2006.229.04:22:12.25#ibcon#flushed, iclass 15, count 0 2006.229.04:22:12.25#ibcon#about to write, iclass 15, count 0 2006.229.04:22:12.25#ibcon#wrote, iclass 15, count 0 2006.229.04:22:12.25#ibcon#about to read 3, iclass 15, count 0 2006.229.04:22:12.27#ibcon#read 3, iclass 15, count 0 2006.229.04:22:12.27#ibcon#about to read 4, iclass 15, count 0 2006.229.04:22:12.27#ibcon#read 4, iclass 15, count 0 2006.229.04:22:12.27#ibcon#about to read 5, iclass 15, count 0 2006.229.04:22:12.27#ibcon#read 5, iclass 15, count 0 2006.229.04:22:12.27#ibcon#about to read 6, iclass 15, count 0 2006.229.04:22:12.27#ibcon#read 6, iclass 15, count 0 2006.229.04:22:12.27#ibcon#end of sib2, iclass 15, count 0 2006.229.04:22:12.27#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:22:12.27#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:22:12.27#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:22:12.27#ibcon#*before write, iclass 15, count 0 2006.229.04:22:12.27#ibcon#enter sib2, iclass 15, count 0 2006.229.04:22:12.27#ibcon#flushed, iclass 15, count 0 2006.229.04:22:12.27#ibcon#about to write, iclass 15, count 0 2006.229.04:22:12.27#ibcon#wrote, iclass 15, count 0 2006.229.04:22:12.27#ibcon#about to read 3, iclass 15, count 0 2006.229.04:22:12.31#ibcon#read 3, iclass 15, count 0 2006.229.04:22:12.31#ibcon#about to read 4, iclass 15, count 0 2006.229.04:22:12.31#ibcon#read 4, iclass 15, count 0 2006.229.04:22:12.31#ibcon#about to read 5, iclass 15, count 0 2006.229.04:22:12.31#ibcon#read 5, iclass 15, count 0 2006.229.04:22:12.31#ibcon#about to read 6, iclass 15, count 0 2006.229.04:22:12.31#ibcon#read 6, iclass 15, count 0 2006.229.04:22:12.31#ibcon#end of sib2, iclass 15, count 0 2006.229.04:22:12.31#ibcon#*after write, iclass 15, count 0 2006.229.04:22:12.31#ibcon#*before return 0, iclass 15, count 0 2006.229.04:22:12.31#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:12.31#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:22:12.31#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:22:12.31#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:22:12.31$vck44/vb=5,4 2006.229.04:22:12.31#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.04:22:12.31#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.04:22:12.31#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:12.31#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:12.37#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:12.37#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:12.37#ibcon#enter wrdev, iclass 17, count 2 2006.229.04:22:12.37#ibcon#first serial, iclass 17, count 2 2006.229.04:22:12.37#ibcon#enter sib2, iclass 17, count 2 2006.229.04:22:12.37#ibcon#flushed, iclass 17, count 2 2006.229.04:22:12.37#ibcon#about to write, iclass 17, count 2 2006.229.04:22:12.37#ibcon#wrote, iclass 17, count 2 2006.229.04:22:12.37#ibcon#about to read 3, iclass 17, count 2 2006.229.04:22:12.39#ibcon#read 3, iclass 17, count 2 2006.229.04:22:12.39#ibcon#about to read 4, iclass 17, count 2 2006.229.04:22:12.39#ibcon#read 4, iclass 17, count 2 2006.229.04:22:12.39#ibcon#about to read 5, iclass 17, count 2 2006.229.04:22:12.39#ibcon#read 5, iclass 17, count 2 2006.229.04:22:12.39#ibcon#about to read 6, iclass 17, count 2 2006.229.04:22:12.39#ibcon#read 6, iclass 17, count 2 2006.229.04:22:12.39#ibcon#end of sib2, iclass 17, count 2 2006.229.04:22:12.39#ibcon#*mode == 0, iclass 17, count 2 2006.229.04:22:12.39#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.04:22:12.39#ibcon#[27=AT05-04\r\n] 2006.229.04:22:12.39#ibcon#*before write, iclass 17, count 2 2006.229.04:22:12.39#ibcon#enter sib2, iclass 17, count 2 2006.229.04:22:12.39#ibcon#flushed, iclass 17, count 2 2006.229.04:22:12.39#ibcon#about to write, iclass 17, count 2 2006.229.04:22:12.39#ibcon#wrote, iclass 17, count 2 2006.229.04:22:12.39#ibcon#about to read 3, iclass 17, count 2 2006.229.04:22:12.42#ibcon#read 3, iclass 17, count 2 2006.229.04:22:12.42#ibcon#about to read 4, iclass 17, count 2 2006.229.04:22:12.42#ibcon#read 4, iclass 17, count 2 2006.229.04:22:12.42#ibcon#about to read 5, iclass 17, count 2 2006.229.04:22:12.42#ibcon#read 5, iclass 17, count 2 2006.229.04:22:12.42#ibcon#about to read 6, iclass 17, count 2 2006.229.04:22:12.42#ibcon#read 6, iclass 17, count 2 2006.229.04:22:12.42#ibcon#end of sib2, iclass 17, count 2 2006.229.04:22:12.42#ibcon#*after write, iclass 17, count 2 2006.229.04:22:12.42#ibcon#*before return 0, iclass 17, count 2 2006.229.04:22:12.42#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:12.42#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:22:12.42#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.04:22:12.42#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:12.42#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:12.54#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:12.54#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:12.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:22:12.54#ibcon#first serial, iclass 17, count 0 2006.229.04:22:12.54#ibcon#enter sib2, iclass 17, count 0 2006.229.04:22:12.54#ibcon#flushed, iclass 17, count 0 2006.229.04:22:12.54#ibcon#about to write, iclass 17, count 0 2006.229.04:22:12.54#ibcon#wrote, iclass 17, count 0 2006.229.04:22:12.54#ibcon#about to read 3, iclass 17, count 0 2006.229.04:22:12.56#ibcon#read 3, iclass 17, count 0 2006.229.04:22:12.56#ibcon#about to read 4, iclass 17, count 0 2006.229.04:22:12.56#ibcon#read 4, iclass 17, count 0 2006.229.04:22:12.56#ibcon#about to read 5, iclass 17, count 0 2006.229.04:22:12.56#ibcon#read 5, iclass 17, count 0 2006.229.04:22:12.56#ibcon#about to read 6, iclass 17, count 0 2006.229.04:22:12.56#ibcon#read 6, iclass 17, count 0 2006.229.04:22:12.56#ibcon#end of sib2, iclass 17, count 0 2006.229.04:22:12.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:22:12.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:22:12.56#ibcon#[27=USB\r\n] 2006.229.04:22:12.56#ibcon#*before write, iclass 17, count 0 2006.229.04:22:12.56#ibcon#enter sib2, iclass 17, count 0 2006.229.04:22:12.56#ibcon#flushed, iclass 17, count 0 2006.229.04:22:12.56#ibcon#about to write, iclass 17, count 0 2006.229.04:22:12.56#ibcon#wrote, iclass 17, count 0 2006.229.04:22:12.56#ibcon#about to read 3, iclass 17, count 0 2006.229.04:22:12.59#ibcon#read 3, iclass 17, count 0 2006.229.04:22:12.59#ibcon#about to read 4, iclass 17, count 0 2006.229.04:22:12.59#ibcon#read 4, iclass 17, count 0 2006.229.04:22:12.59#ibcon#about to read 5, iclass 17, count 0 2006.229.04:22:12.59#ibcon#read 5, iclass 17, count 0 2006.229.04:22:12.59#ibcon#about to read 6, iclass 17, count 0 2006.229.04:22:12.59#ibcon#read 6, iclass 17, count 0 2006.229.04:22:12.59#ibcon#end of sib2, iclass 17, count 0 2006.229.04:22:12.59#ibcon#*after write, iclass 17, count 0 2006.229.04:22:12.59#ibcon#*before return 0, iclass 17, count 0 2006.229.04:22:12.59#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:12.59#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:22:12.59#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:22:12.59#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:22:12.59$vck44/vblo=6,719.99 2006.229.04:22:12.59#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.04:22:12.59#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.04:22:12.59#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:12.59#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:12.59#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:12.59#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:12.59#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:22:12.59#ibcon#first serial, iclass 19, count 0 2006.229.04:22:12.59#ibcon#enter sib2, iclass 19, count 0 2006.229.04:22:12.59#ibcon#flushed, iclass 19, count 0 2006.229.04:22:12.59#ibcon#about to write, iclass 19, count 0 2006.229.04:22:12.59#ibcon#wrote, iclass 19, count 0 2006.229.04:22:12.59#ibcon#about to read 3, iclass 19, count 0 2006.229.04:22:12.61#ibcon#read 3, iclass 19, count 0 2006.229.04:22:12.61#ibcon#about to read 4, iclass 19, count 0 2006.229.04:22:12.61#ibcon#read 4, iclass 19, count 0 2006.229.04:22:12.61#ibcon#about to read 5, iclass 19, count 0 2006.229.04:22:12.61#ibcon#read 5, iclass 19, count 0 2006.229.04:22:12.61#ibcon#about to read 6, iclass 19, count 0 2006.229.04:22:12.61#ibcon#read 6, iclass 19, count 0 2006.229.04:22:12.61#ibcon#end of sib2, iclass 19, count 0 2006.229.04:22:12.61#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:22:12.61#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:22:12.61#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:22:12.61#ibcon#*before write, iclass 19, count 0 2006.229.04:22:12.61#ibcon#enter sib2, iclass 19, count 0 2006.229.04:22:12.61#ibcon#flushed, iclass 19, count 0 2006.229.04:22:12.61#ibcon#about to write, iclass 19, count 0 2006.229.04:22:12.61#ibcon#wrote, iclass 19, count 0 2006.229.04:22:12.61#ibcon#about to read 3, iclass 19, count 0 2006.229.04:22:12.65#ibcon#read 3, iclass 19, count 0 2006.229.04:22:12.65#ibcon#about to read 4, iclass 19, count 0 2006.229.04:22:12.65#ibcon#read 4, iclass 19, count 0 2006.229.04:22:12.65#ibcon#about to read 5, iclass 19, count 0 2006.229.04:22:12.65#ibcon#read 5, iclass 19, count 0 2006.229.04:22:12.65#ibcon#about to read 6, iclass 19, count 0 2006.229.04:22:12.65#ibcon#read 6, iclass 19, count 0 2006.229.04:22:12.65#ibcon#end of sib2, iclass 19, count 0 2006.229.04:22:12.65#ibcon#*after write, iclass 19, count 0 2006.229.04:22:12.65#ibcon#*before return 0, iclass 19, count 0 2006.229.04:22:12.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:12.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:22:12.65#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:22:12.65#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:22:12.65$vck44/vb=6,4 2006.229.04:22:12.65#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.04:22:12.65#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.04:22:12.65#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:12.65#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:12.71#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:12.71#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:12.71#ibcon#enter wrdev, iclass 21, count 2 2006.229.04:22:12.71#ibcon#first serial, iclass 21, count 2 2006.229.04:22:12.71#ibcon#enter sib2, iclass 21, count 2 2006.229.04:22:12.71#ibcon#flushed, iclass 21, count 2 2006.229.04:22:12.71#ibcon#about to write, iclass 21, count 2 2006.229.04:22:12.71#ibcon#wrote, iclass 21, count 2 2006.229.04:22:12.71#ibcon#about to read 3, iclass 21, count 2 2006.229.04:22:12.73#ibcon#read 3, iclass 21, count 2 2006.229.04:22:12.73#ibcon#about to read 4, iclass 21, count 2 2006.229.04:22:12.73#ibcon#read 4, iclass 21, count 2 2006.229.04:22:12.73#ibcon#about to read 5, iclass 21, count 2 2006.229.04:22:12.73#ibcon#read 5, iclass 21, count 2 2006.229.04:22:12.73#ibcon#about to read 6, iclass 21, count 2 2006.229.04:22:12.73#ibcon#read 6, iclass 21, count 2 2006.229.04:22:12.73#ibcon#end of sib2, iclass 21, count 2 2006.229.04:22:12.73#ibcon#*mode == 0, iclass 21, count 2 2006.229.04:22:12.73#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.04:22:12.73#ibcon#[27=AT06-04\r\n] 2006.229.04:22:12.73#ibcon#*before write, iclass 21, count 2 2006.229.04:22:12.73#ibcon#enter sib2, iclass 21, count 2 2006.229.04:22:12.73#ibcon#flushed, iclass 21, count 2 2006.229.04:22:12.73#ibcon#about to write, iclass 21, count 2 2006.229.04:22:12.73#ibcon#wrote, iclass 21, count 2 2006.229.04:22:12.73#ibcon#about to read 3, iclass 21, count 2 2006.229.04:22:12.76#ibcon#read 3, iclass 21, count 2 2006.229.04:22:12.76#ibcon#about to read 4, iclass 21, count 2 2006.229.04:22:12.76#ibcon#read 4, iclass 21, count 2 2006.229.04:22:12.76#ibcon#about to read 5, iclass 21, count 2 2006.229.04:22:12.76#ibcon#read 5, iclass 21, count 2 2006.229.04:22:12.76#ibcon#about to read 6, iclass 21, count 2 2006.229.04:22:12.76#ibcon#read 6, iclass 21, count 2 2006.229.04:22:12.76#ibcon#end of sib2, iclass 21, count 2 2006.229.04:22:12.76#ibcon#*after write, iclass 21, count 2 2006.229.04:22:12.76#ibcon#*before return 0, iclass 21, count 2 2006.229.04:22:12.76#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:12.76#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:22:12.76#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.04:22:12.76#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:12.76#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:12.88#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:12.88#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:12.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:22:12.88#ibcon#first serial, iclass 21, count 0 2006.229.04:22:12.88#ibcon#enter sib2, iclass 21, count 0 2006.229.04:22:12.88#ibcon#flushed, iclass 21, count 0 2006.229.04:22:12.88#ibcon#about to write, iclass 21, count 0 2006.229.04:22:12.88#ibcon#wrote, iclass 21, count 0 2006.229.04:22:12.88#ibcon#about to read 3, iclass 21, count 0 2006.229.04:22:12.90#ibcon#read 3, iclass 21, count 0 2006.229.04:22:12.90#ibcon#about to read 4, iclass 21, count 0 2006.229.04:22:12.90#ibcon#read 4, iclass 21, count 0 2006.229.04:22:12.90#ibcon#about to read 5, iclass 21, count 0 2006.229.04:22:12.90#ibcon#read 5, iclass 21, count 0 2006.229.04:22:12.90#ibcon#about to read 6, iclass 21, count 0 2006.229.04:22:12.90#ibcon#read 6, iclass 21, count 0 2006.229.04:22:12.90#ibcon#end of sib2, iclass 21, count 0 2006.229.04:22:12.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:22:12.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:22:12.90#ibcon#[27=USB\r\n] 2006.229.04:22:12.90#ibcon#*before write, iclass 21, count 0 2006.229.04:22:12.90#ibcon#enter sib2, iclass 21, count 0 2006.229.04:22:12.90#ibcon#flushed, iclass 21, count 0 2006.229.04:22:12.90#ibcon#about to write, iclass 21, count 0 2006.229.04:22:12.90#ibcon#wrote, iclass 21, count 0 2006.229.04:22:12.90#ibcon#about to read 3, iclass 21, count 0 2006.229.04:22:12.93#ibcon#read 3, iclass 21, count 0 2006.229.04:22:12.93#ibcon#about to read 4, iclass 21, count 0 2006.229.04:22:12.93#ibcon#read 4, iclass 21, count 0 2006.229.04:22:12.93#ibcon#about to read 5, iclass 21, count 0 2006.229.04:22:12.93#ibcon#read 5, iclass 21, count 0 2006.229.04:22:12.93#ibcon#about to read 6, iclass 21, count 0 2006.229.04:22:12.93#ibcon#read 6, iclass 21, count 0 2006.229.04:22:12.93#ibcon#end of sib2, iclass 21, count 0 2006.229.04:22:12.93#ibcon#*after write, iclass 21, count 0 2006.229.04:22:12.93#ibcon#*before return 0, iclass 21, count 0 2006.229.04:22:12.93#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:12.93#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:22:12.93#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:22:12.93#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:22:12.93$vck44/vblo=7,734.99 2006.229.04:22:12.93#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.04:22:12.93#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.04:22:12.93#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:12.93#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:12.93#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:12.93#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:12.93#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:22:12.93#ibcon#first serial, iclass 23, count 0 2006.229.04:22:12.93#ibcon#enter sib2, iclass 23, count 0 2006.229.04:22:12.93#ibcon#flushed, iclass 23, count 0 2006.229.04:22:12.93#ibcon#about to write, iclass 23, count 0 2006.229.04:22:12.93#ibcon#wrote, iclass 23, count 0 2006.229.04:22:12.93#ibcon#about to read 3, iclass 23, count 0 2006.229.04:22:12.95#ibcon#read 3, iclass 23, count 0 2006.229.04:22:12.95#ibcon#about to read 4, iclass 23, count 0 2006.229.04:22:12.95#ibcon#read 4, iclass 23, count 0 2006.229.04:22:12.95#ibcon#about to read 5, iclass 23, count 0 2006.229.04:22:12.95#ibcon#read 5, iclass 23, count 0 2006.229.04:22:12.95#ibcon#about to read 6, iclass 23, count 0 2006.229.04:22:12.95#ibcon#read 6, iclass 23, count 0 2006.229.04:22:12.95#ibcon#end of sib2, iclass 23, count 0 2006.229.04:22:12.95#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:22:12.95#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:22:12.95#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:22:12.95#ibcon#*before write, iclass 23, count 0 2006.229.04:22:12.95#ibcon#enter sib2, iclass 23, count 0 2006.229.04:22:12.95#ibcon#flushed, iclass 23, count 0 2006.229.04:22:12.95#ibcon#about to write, iclass 23, count 0 2006.229.04:22:12.95#ibcon#wrote, iclass 23, count 0 2006.229.04:22:12.95#ibcon#about to read 3, iclass 23, count 0 2006.229.04:22:12.99#ibcon#read 3, iclass 23, count 0 2006.229.04:22:12.99#ibcon#about to read 4, iclass 23, count 0 2006.229.04:22:12.99#ibcon#read 4, iclass 23, count 0 2006.229.04:22:12.99#ibcon#about to read 5, iclass 23, count 0 2006.229.04:22:12.99#ibcon#read 5, iclass 23, count 0 2006.229.04:22:12.99#ibcon#about to read 6, iclass 23, count 0 2006.229.04:22:12.99#ibcon#read 6, iclass 23, count 0 2006.229.04:22:12.99#ibcon#end of sib2, iclass 23, count 0 2006.229.04:22:12.99#ibcon#*after write, iclass 23, count 0 2006.229.04:22:12.99#ibcon#*before return 0, iclass 23, count 0 2006.229.04:22:12.99#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:12.99#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:22:12.99#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:22:12.99#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:22:12.99$vck44/vb=7,4 2006.229.04:22:12.99#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.04:22:12.99#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.04:22:12.99#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:12.99#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:13.05#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:13.05#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:13.05#ibcon#enter wrdev, iclass 25, count 2 2006.229.04:22:13.05#ibcon#first serial, iclass 25, count 2 2006.229.04:22:13.05#ibcon#enter sib2, iclass 25, count 2 2006.229.04:22:13.05#ibcon#flushed, iclass 25, count 2 2006.229.04:22:13.05#ibcon#about to write, iclass 25, count 2 2006.229.04:22:13.05#ibcon#wrote, iclass 25, count 2 2006.229.04:22:13.05#ibcon#about to read 3, iclass 25, count 2 2006.229.04:22:13.07#ibcon#read 3, iclass 25, count 2 2006.229.04:22:13.07#ibcon#about to read 4, iclass 25, count 2 2006.229.04:22:13.07#ibcon#read 4, iclass 25, count 2 2006.229.04:22:13.07#ibcon#about to read 5, iclass 25, count 2 2006.229.04:22:13.07#ibcon#read 5, iclass 25, count 2 2006.229.04:22:13.07#ibcon#about to read 6, iclass 25, count 2 2006.229.04:22:13.07#ibcon#read 6, iclass 25, count 2 2006.229.04:22:13.07#ibcon#end of sib2, iclass 25, count 2 2006.229.04:22:13.07#ibcon#*mode == 0, iclass 25, count 2 2006.229.04:22:13.07#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.04:22:13.07#ibcon#[27=AT07-04\r\n] 2006.229.04:22:13.07#ibcon#*before write, iclass 25, count 2 2006.229.04:22:13.07#ibcon#enter sib2, iclass 25, count 2 2006.229.04:22:13.07#ibcon#flushed, iclass 25, count 2 2006.229.04:22:13.07#ibcon#about to write, iclass 25, count 2 2006.229.04:22:13.07#ibcon#wrote, iclass 25, count 2 2006.229.04:22:13.07#ibcon#about to read 3, iclass 25, count 2 2006.229.04:22:13.10#ibcon#read 3, iclass 25, count 2 2006.229.04:22:13.10#ibcon#about to read 4, iclass 25, count 2 2006.229.04:22:13.10#ibcon#read 4, iclass 25, count 2 2006.229.04:22:13.10#ibcon#about to read 5, iclass 25, count 2 2006.229.04:22:13.10#ibcon#read 5, iclass 25, count 2 2006.229.04:22:13.10#ibcon#about to read 6, iclass 25, count 2 2006.229.04:22:13.10#ibcon#read 6, iclass 25, count 2 2006.229.04:22:13.10#ibcon#end of sib2, iclass 25, count 2 2006.229.04:22:13.10#ibcon#*after write, iclass 25, count 2 2006.229.04:22:13.10#ibcon#*before return 0, iclass 25, count 2 2006.229.04:22:13.10#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:13.10#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:22:13.10#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.04:22:13.10#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:13.10#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:13.22#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:13.22#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:13.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:22:13.22#ibcon#first serial, iclass 25, count 0 2006.229.04:22:13.22#ibcon#enter sib2, iclass 25, count 0 2006.229.04:22:13.22#ibcon#flushed, iclass 25, count 0 2006.229.04:22:13.22#ibcon#about to write, iclass 25, count 0 2006.229.04:22:13.22#ibcon#wrote, iclass 25, count 0 2006.229.04:22:13.22#ibcon#about to read 3, iclass 25, count 0 2006.229.04:22:13.24#ibcon#read 3, iclass 25, count 0 2006.229.04:22:13.24#ibcon#about to read 4, iclass 25, count 0 2006.229.04:22:13.24#ibcon#read 4, iclass 25, count 0 2006.229.04:22:13.24#ibcon#about to read 5, iclass 25, count 0 2006.229.04:22:13.24#ibcon#read 5, iclass 25, count 0 2006.229.04:22:13.24#ibcon#about to read 6, iclass 25, count 0 2006.229.04:22:13.24#ibcon#read 6, iclass 25, count 0 2006.229.04:22:13.24#ibcon#end of sib2, iclass 25, count 0 2006.229.04:22:13.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:22:13.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:22:13.24#ibcon#[27=USB\r\n] 2006.229.04:22:13.24#ibcon#*before write, iclass 25, count 0 2006.229.04:22:13.24#ibcon#enter sib2, iclass 25, count 0 2006.229.04:22:13.24#ibcon#flushed, iclass 25, count 0 2006.229.04:22:13.24#ibcon#about to write, iclass 25, count 0 2006.229.04:22:13.24#ibcon#wrote, iclass 25, count 0 2006.229.04:22:13.24#ibcon#about to read 3, iclass 25, count 0 2006.229.04:22:13.27#ibcon#read 3, iclass 25, count 0 2006.229.04:22:13.27#ibcon#about to read 4, iclass 25, count 0 2006.229.04:22:13.27#ibcon#read 4, iclass 25, count 0 2006.229.04:22:13.27#ibcon#about to read 5, iclass 25, count 0 2006.229.04:22:13.27#ibcon#read 5, iclass 25, count 0 2006.229.04:22:13.27#ibcon#about to read 6, iclass 25, count 0 2006.229.04:22:13.27#ibcon#read 6, iclass 25, count 0 2006.229.04:22:13.27#ibcon#end of sib2, iclass 25, count 0 2006.229.04:22:13.27#ibcon#*after write, iclass 25, count 0 2006.229.04:22:13.27#ibcon#*before return 0, iclass 25, count 0 2006.229.04:22:13.27#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:13.27#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:22:13.27#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:22:13.27#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:22:13.27$vck44/vblo=8,744.99 2006.229.04:22:13.27#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.04:22:13.27#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.04:22:13.27#ibcon#ireg 17 cls_cnt 0 2006.229.04:22:13.27#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:13.27#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:13.27#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:13.27#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:22:13.27#ibcon#first serial, iclass 27, count 0 2006.229.04:22:13.27#ibcon#enter sib2, iclass 27, count 0 2006.229.04:22:13.27#ibcon#flushed, iclass 27, count 0 2006.229.04:22:13.27#ibcon#about to write, iclass 27, count 0 2006.229.04:22:13.27#ibcon#wrote, iclass 27, count 0 2006.229.04:22:13.27#ibcon#about to read 3, iclass 27, count 0 2006.229.04:22:13.29#ibcon#read 3, iclass 27, count 0 2006.229.04:22:13.29#ibcon#about to read 4, iclass 27, count 0 2006.229.04:22:13.29#ibcon#read 4, iclass 27, count 0 2006.229.04:22:13.29#ibcon#about to read 5, iclass 27, count 0 2006.229.04:22:13.29#ibcon#read 5, iclass 27, count 0 2006.229.04:22:13.29#ibcon#about to read 6, iclass 27, count 0 2006.229.04:22:13.29#ibcon#read 6, iclass 27, count 0 2006.229.04:22:13.29#ibcon#end of sib2, iclass 27, count 0 2006.229.04:22:13.29#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:22:13.29#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:22:13.29#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:22:13.29#ibcon#*before write, iclass 27, count 0 2006.229.04:22:13.29#ibcon#enter sib2, iclass 27, count 0 2006.229.04:22:13.29#ibcon#flushed, iclass 27, count 0 2006.229.04:22:13.29#ibcon#about to write, iclass 27, count 0 2006.229.04:22:13.29#ibcon#wrote, iclass 27, count 0 2006.229.04:22:13.29#ibcon#about to read 3, iclass 27, count 0 2006.229.04:22:13.33#ibcon#read 3, iclass 27, count 0 2006.229.04:22:13.33#ibcon#about to read 4, iclass 27, count 0 2006.229.04:22:13.33#ibcon#read 4, iclass 27, count 0 2006.229.04:22:13.33#ibcon#about to read 5, iclass 27, count 0 2006.229.04:22:13.33#ibcon#read 5, iclass 27, count 0 2006.229.04:22:13.33#ibcon#about to read 6, iclass 27, count 0 2006.229.04:22:13.33#ibcon#read 6, iclass 27, count 0 2006.229.04:22:13.33#ibcon#end of sib2, iclass 27, count 0 2006.229.04:22:13.33#ibcon#*after write, iclass 27, count 0 2006.229.04:22:13.33#ibcon#*before return 0, iclass 27, count 0 2006.229.04:22:13.33#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:13.33#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:22:13.33#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:22:13.33#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:22:13.33$vck44/vb=8,4 2006.229.04:22:13.33#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.04:22:13.33#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.04:22:13.33#ibcon#ireg 11 cls_cnt 2 2006.229.04:22:13.33#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:13.39#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:13.39#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:13.39#ibcon#enter wrdev, iclass 29, count 2 2006.229.04:22:13.39#ibcon#first serial, iclass 29, count 2 2006.229.04:22:13.39#ibcon#enter sib2, iclass 29, count 2 2006.229.04:22:13.39#ibcon#flushed, iclass 29, count 2 2006.229.04:22:13.39#ibcon#about to write, iclass 29, count 2 2006.229.04:22:13.39#ibcon#wrote, iclass 29, count 2 2006.229.04:22:13.39#ibcon#about to read 3, iclass 29, count 2 2006.229.04:22:13.41#ibcon#read 3, iclass 29, count 2 2006.229.04:22:13.41#ibcon#about to read 4, iclass 29, count 2 2006.229.04:22:13.41#ibcon#read 4, iclass 29, count 2 2006.229.04:22:13.41#ibcon#about to read 5, iclass 29, count 2 2006.229.04:22:13.41#ibcon#read 5, iclass 29, count 2 2006.229.04:22:13.41#ibcon#about to read 6, iclass 29, count 2 2006.229.04:22:13.41#ibcon#read 6, iclass 29, count 2 2006.229.04:22:13.41#ibcon#end of sib2, iclass 29, count 2 2006.229.04:22:13.41#ibcon#*mode == 0, iclass 29, count 2 2006.229.04:22:13.41#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.04:22:13.41#ibcon#[27=AT08-04\r\n] 2006.229.04:22:13.41#ibcon#*before write, iclass 29, count 2 2006.229.04:22:13.41#ibcon#enter sib2, iclass 29, count 2 2006.229.04:22:13.41#ibcon#flushed, iclass 29, count 2 2006.229.04:22:13.41#ibcon#about to write, iclass 29, count 2 2006.229.04:22:13.41#ibcon#wrote, iclass 29, count 2 2006.229.04:22:13.41#ibcon#about to read 3, iclass 29, count 2 2006.229.04:22:13.44#ibcon#read 3, iclass 29, count 2 2006.229.04:22:13.44#ibcon#about to read 4, iclass 29, count 2 2006.229.04:22:13.44#ibcon#read 4, iclass 29, count 2 2006.229.04:22:13.44#ibcon#about to read 5, iclass 29, count 2 2006.229.04:22:13.44#ibcon#read 5, iclass 29, count 2 2006.229.04:22:13.44#ibcon#about to read 6, iclass 29, count 2 2006.229.04:22:13.44#ibcon#read 6, iclass 29, count 2 2006.229.04:22:13.44#ibcon#end of sib2, iclass 29, count 2 2006.229.04:22:13.44#ibcon#*after write, iclass 29, count 2 2006.229.04:22:13.44#ibcon#*before return 0, iclass 29, count 2 2006.229.04:22:13.44#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:13.44#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:22:13.44#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.04:22:13.44#ibcon#ireg 7 cls_cnt 0 2006.229.04:22:13.44#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:13.56#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:13.56#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:13.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:22:13.56#ibcon#first serial, iclass 29, count 0 2006.229.04:22:13.56#ibcon#enter sib2, iclass 29, count 0 2006.229.04:22:13.56#ibcon#flushed, iclass 29, count 0 2006.229.04:22:13.56#ibcon#about to write, iclass 29, count 0 2006.229.04:22:13.56#ibcon#wrote, iclass 29, count 0 2006.229.04:22:13.56#ibcon#about to read 3, iclass 29, count 0 2006.229.04:22:13.58#ibcon#read 3, iclass 29, count 0 2006.229.04:22:13.58#ibcon#about to read 4, iclass 29, count 0 2006.229.04:22:13.58#ibcon#read 4, iclass 29, count 0 2006.229.04:22:13.58#ibcon#about to read 5, iclass 29, count 0 2006.229.04:22:13.58#ibcon#read 5, iclass 29, count 0 2006.229.04:22:13.58#ibcon#about to read 6, iclass 29, count 0 2006.229.04:22:13.58#ibcon#read 6, iclass 29, count 0 2006.229.04:22:13.58#ibcon#end of sib2, iclass 29, count 0 2006.229.04:22:13.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:22:13.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:22:13.58#ibcon#[27=USB\r\n] 2006.229.04:22:13.58#ibcon#*before write, iclass 29, count 0 2006.229.04:22:13.58#ibcon#enter sib2, iclass 29, count 0 2006.229.04:22:13.58#ibcon#flushed, iclass 29, count 0 2006.229.04:22:13.58#ibcon#about to write, iclass 29, count 0 2006.229.04:22:13.58#ibcon#wrote, iclass 29, count 0 2006.229.04:22:13.58#ibcon#about to read 3, iclass 29, count 0 2006.229.04:22:13.61#ibcon#read 3, iclass 29, count 0 2006.229.04:22:13.61#ibcon#about to read 4, iclass 29, count 0 2006.229.04:22:13.61#ibcon#read 4, iclass 29, count 0 2006.229.04:22:13.61#ibcon#about to read 5, iclass 29, count 0 2006.229.04:22:13.61#ibcon#read 5, iclass 29, count 0 2006.229.04:22:13.61#ibcon#about to read 6, iclass 29, count 0 2006.229.04:22:13.61#ibcon#read 6, iclass 29, count 0 2006.229.04:22:13.61#ibcon#end of sib2, iclass 29, count 0 2006.229.04:22:13.61#ibcon#*after write, iclass 29, count 0 2006.229.04:22:13.61#ibcon#*before return 0, iclass 29, count 0 2006.229.04:22:13.61#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:13.61#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:22:13.61#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:22:13.61#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:22:13.61$vck44/vabw=wide 2006.229.04:22:13.61#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.04:22:13.61#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.04:22:13.61#ibcon#ireg 8 cls_cnt 0 2006.229.04:22:13.61#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:13.61#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:13.61#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:13.61#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:22:13.61#ibcon#first serial, iclass 31, count 0 2006.229.04:22:13.61#ibcon#enter sib2, iclass 31, count 0 2006.229.04:22:13.61#ibcon#flushed, iclass 31, count 0 2006.229.04:22:13.61#ibcon#about to write, iclass 31, count 0 2006.229.04:22:13.61#ibcon#wrote, iclass 31, count 0 2006.229.04:22:13.61#ibcon#about to read 3, iclass 31, count 0 2006.229.04:22:13.63#ibcon#read 3, iclass 31, count 0 2006.229.04:22:13.63#ibcon#about to read 4, iclass 31, count 0 2006.229.04:22:13.63#ibcon#read 4, iclass 31, count 0 2006.229.04:22:13.63#ibcon#about to read 5, iclass 31, count 0 2006.229.04:22:13.63#ibcon#read 5, iclass 31, count 0 2006.229.04:22:13.63#ibcon#about to read 6, iclass 31, count 0 2006.229.04:22:13.63#ibcon#read 6, iclass 31, count 0 2006.229.04:22:13.63#ibcon#end of sib2, iclass 31, count 0 2006.229.04:22:13.63#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:22:13.63#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:22:13.63#ibcon#[25=BW32\r\n] 2006.229.04:22:13.63#ibcon#*before write, iclass 31, count 0 2006.229.04:22:13.63#ibcon#enter sib2, iclass 31, count 0 2006.229.04:22:13.63#ibcon#flushed, iclass 31, count 0 2006.229.04:22:13.63#ibcon#about to write, iclass 31, count 0 2006.229.04:22:13.63#ibcon#wrote, iclass 31, count 0 2006.229.04:22:13.63#ibcon#about to read 3, iclass 31, count 0 2006.229.04:22:13.66#ibcon#read 3, iclass 31, count 0 2006.229.04:22:13.66#ibcon#about to read 4, iclass 31, count 0 2006.229.04:22:13.66#ibcon#read 4, iclass 31, count 0 2006.229.04:22:13.66#ibcon#about to read 5, iclass 31, count 0 2006.229.04:22:13.66#ibcon#read 5, iclass 31, count 0 2006.229.04:22:13.66#ibcon#about to read 6, iclass 31, count 0 2006.229.04:22:13.66#ibcon#read 6, iclass 31, count 0 2006.229.04:22:13.66#ibcon#end of sib2, iclass 31, count 0 2006.229.04:22:13.66#ibcon#*after write, iclass 31, count 0 2006.229.04:22:13.66#ibcon#*before return 0, iclass 31, count 0 2006.229.04:22:13.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:13.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:22:13.66#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:22:13.66#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:22:13.66$vck44/vbbw=wide 2006.229.04:22:13.66#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.04:22:13.66#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.04:22:13.66#ibcon#ireg 8 cls_cnt 0 2006.229.04:22:13.66#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:22:13.73#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:22:13.73#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:22:13.73#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:22:13.73#ibcon#first serial, iclass 33, count 0 2006.229.04:22:13.73#ibcon#enter sib2, iclass 33, count 0 2006.229.04:22:13.73#ibcon#flushed, iclass 33, count 0 2006.229.04:22:13.73#ibcon#about to write, iclass 33, count 0 2006.229.04:22:13.73#ibcon#wrote, iclass 33, count 0 2006.229.04:22:13.73#ibcon#about to read 3, iclass 33, count 0 2006.229.04:22:13.75#ibcon#read 3, iclass 33, count 0 2006.229.04:22:13.75#ibcon#about to read 4, iclass 33, count 0 2006.229.04:22:13.75#ibcon#read 4, iclass 33, count 0 2006.229.04:22:13.75#ibcon#about to read 5, iclass 33, count 0 2006.229.04:22:13.75#ibcon#read 5, iclass 33, count 0 2006.229.04:22:13.75#ibcon#about to read 6, iclass 33, count 0 2006.229.04:22:13.75#ibcon#read 6, iclass 33, count 0 2006.229.04:22:13.75#ibcon#end of sib2, iclass 33, count 0 2006.229.04:22:13.75#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:22:13.75#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:22:13.75#ibcon#[27=BW32\r\n] 2006.229.04:22:13.75#ibcon#*before write, iclass 33, count 0 2006.229.04:22:13.75#ibcon#enter sib2, iclass 33, count 0 2006.229.04:22:13.75#ibcon#flushed, iclass 33, count 0 2006.229.04:22:13.75#ibcon#about to write, iclass 33, count 0 2006.229.04:22:13.75#ibcon#wrote, iclass 33, count 0 2006.229.04:22:13.75#ibcon#about to read 3, iclass 33, count 0 2006.229.04:22:13.78#ibcon#read 3, iclass 33, count 0 2006.229.04:22:13.78#ibcon#about to read 4, iclass 33, count 0 2006.229.04:22:13.78#ibcon#read 4, iclass 33, count 0 2006.229.04:22:13.78#ibcon#about to read 5, iclass 33, count 0 2006.229.04:22:13.78#ibcon#read 5, iclass 33, count 0 2006.229.04:22:13.78#ibcon#about to read 6, iclass 33, count 0 2006.229.04:22:13.78#ibcon#read 6, iclass 33, count 0 2006.229.04:22:13.78#ibcon#end of sib2, iclass 33, count 0 2006.229.04:22:13.78#ibcon#*after write, iclass 33, count 0 2006.229.04:22:13.78#ibcon#*before return 0, iclass 33, count 0 2006.229.04:22:13.78#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:22:13.78#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:22:13.78#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:22:13.78#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:22:13.78$setupk4/ifdk4 2006.229.04:22:13.78$ifdk4/lo= 2006.229.04:22:13.78$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:22:13.78$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:22:13.78$ifdk4/patch= 2006.229.04:22:13.78$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:22:13.78$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:22:13.78$setupk4/!*+20s 2006.229.04:22:18.44#abcon#<5=/05 2.5 4.3 30.43 951000.1\r\n> 2006.229.04:22:18.46#abcon#{5=INTERFACE CLEAR} 2006.229.04:22:18.52#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:22:26.14#trakl#Source acquired 2006.229.04:22:27.14#flagr#flagr/antenna,acquired 2006.229.04:22:28.25$setupk4/"tpicd 2006.229.04:22:28.25$setupk4/echo=off 2006.229.04:22:28.25$setupk4/xlog=off 2006.229.04:22:28.25:!2006.229.04:22:50 2006.229.04:22:50.00:preob 2006.229.04:22:50.14/onsource/TRACKING 2006.229.04:22:50.14:!2006.229.04:23:00 2006.229.04:23:00.00:"tape 2006.229.04:23:00.00:"st=record 2006.229.04:23:00.00:data_valid=on 2006.229.04:23:00.00:midob 2006.229.04:23:00.14/onsource/TRACKING 2006.229.04:23:00.14/wx/30.43,1000.1,95 2006.229.04:23:00.22/cable/+6.4060E-03 2006.229.04:23:01.31/va/01,08,usb,yes,31,33 2006.229.04:23:01.31/va/02,07,usb,yes,34,34 2006.229.04:23:01.31/va/03,06,usb,yes,42,44 2006.229.04:23:01.31/va/04,07,usb,yes,35,36 2006.229.04:23:01.31/va/05,04,usb,yes,31,32 2006.229.04:23:01.31/va/06,04,usb,yes,35,34 2006.229.04:23:01.31/va/07,05,usb,yes,31,31 2006.229.04:23:01.31/va/08,06,usb,yes,22,28 2006.229.04:23:01.54/valo/01,524.99,yes,locked 2006.229.04:23:01.54/valo/02,534.99,yes,locked 2006.229.04:23:01.54/valo/03,564.99,yes,locked 2006.229.04:23:01.54/valo/04,624.99,yes,locked 2006.229.04:23:01.54/valo/05,734.99,yes,locked 2006.229.04:23:01.54/valo/06,814.99,yes,locked 2006.229.04:23:01.54/valo/07,864.99,yes,locked 2006.229.04:23:01.54/valo/08,884.99,yes,locked 2006.229.04:23:02.63/vb/01,04,usb,yes,32,29 2006.229.04:23:02.63/vb/02,04,usb,yes,34,34 2006.229.04:23:02.63/vb/03,04,usb,yes,31,34 2006.229.04:23:02.63/vb/04,04,usb,yes,36,35 2006.229.04:23:02.63/vb/05,04,usb,yes,28,30 2006.229.04:23:02.63/vb/06,04,usb,yes,32,29 2006.229.04:23:02.63/vb/07,04,usb,yes,32,32 2006.229.04:23:02.63/vb/08,04,usb,yes,30,33 2006.229.04:23:02.86/vblo/01,629.99,yes,locked 2006.229.04:23:02.86/vblo/02,634.99,yes,locked 2006.229.04:23:02.86/vblo/03,649.99,yes,locked 2006.229.04:23:02.86/vblo/04,679.99,yes,locked 2006.229.04:23:02.86/vblo/05,709.99,yes,locked 2006.229.04:23:02.86/vblo/06,719.99,yes,locked 2006.229.04:23:02.86/vblo/07,734.99,yes,locked 2006.229.04:23:02.86/vblo/08,744.99,yes,locked 2006.229.04:23:03.01/vabw/8 2006.229.04:23:03.16/vbbw/8 2006.229.04:23:03.25/xfe/off,on,12.0 2006.229.04:23:03.64/ifatt/23,28,28,28 2006.229.04:23:04.08/fmout-gps/S +4.49E-07 2006.229.04:23:04.12:!2006.229.04:23:50 2006.229.04:23:50.00:data_valid=off 2006.229.04:23:50.00:"et 2006.229.04:23:50.00:!+3s 2006.229.04:23:53.02:"tape 2006.229.04:23:53.02:postob 2006.229.04:23:53.11/cable/+6.4061E-03 2006.229.04:23:53.11/wx/30.42,1000.1,95 2006.229.04:23:54.08/fmout-gps/S +4.49E-07 2006.229.04:23:54.08:scan_name=229-0426,jd0608,40 2006.229.04:23:54.08:source=0528+134,053056.42,133155.1,2000.0,ccw 2006.229.04:23:55.14#flagr#flagr/antenna,new-source 2006.229.04:23:55.14:checkk5 2006.229.04:23:55.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:23:55.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:23:56.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:23:56.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:23:57.15/chk_obsdata//k5ts1/T2290423??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:23:57.55/chk_obsdata//k5ts2/T2290423??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:23:57.94/chk_obsdata//k5ts3/T2290423??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:23:58.34/chk_obsdata//k5ts4/T2290423??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.04:23:59.07/k5log//k5ts1_log_newline 2006.229.04:23:59.77/k5log//k5ts2_log_newline 2006.229.04:24:00.52/k5log//k5ts3_log_newline 2006.229.04:24:01.22/k5log//k5ts4_log_newline 2006.229.04:24:01.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:24:01.24:setupk4=1 2006.229.04:24:01.24$setupk4/echo=on 2006.229.04:24:01.24$setupk4/pcalon 2006.229.04:24:01.24$pcalon/"no phase cal control is implemented here 2006.229.04:24:01.24$setupk4/"tpicd=stop 2006.229.04:24:01.24$setupk4/"rec=synch_on 2006.229.04:24:01.24$setupk4/"rec_mode=128 2006.229.04:24:01.24$setupk4/!* 2006.229.04:24:01.24$setupk4/recpk4 2006.229.04:24:01.24$recpk4/recpatch= 2006.229.04:24:01.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:24:01.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:24:01.25$setupk4/vck44 2006.229.04:24:01.25$vck44/valo=1,524.99 2006.229.04:24:01.25#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:24:01.25#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:24:01.25#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:01.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:01.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:01.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:01.25#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:24:01.25#ibcon#first serial, iclass 10, count 0 2006.229.04:24:01.25#ibcon#enter sib2, iclass 10, count 0 2006.229.04:24:01.25#ibcon#flushed, iclass 10, count 0 2006.229.04:24:01.25#ibcon#about to write, iclass 10, count 0 2006.229.04:24:01.25#ibcon#wrote, iclass 10, count 0 2006.229.04:24:01.25#ibcon#about to read 3, iclass 10, count 0 2006.229.04:24:01.27#ibcon#read 3, iclass 10, count 0 2006.229.04:24:01.27#ibcon#about to read 4, iclass 10, count 0 2006.229.04:24:01.27#ibcon#read 4, iclass 10, count 0 2006.229.04:24:01.27#ibcon#about to read 5, iclass 10, count 0 2006.229.04:24:01.27#ibcon#read 5, iclass 10, count 0 2006.229.04:24:01.27#ibcon#about to read 6, iclass 10, count 0 2006.229.04:24:01.27#ibcon#read 6, iclass 10, count 0 2006.229.04:24:01.27#ibcon#end of sib2, iclass 10, count 0 2006.229.04:24:01.27#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:24:01.27#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:24:01.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:24:01.27#ibcon#*before write, iclass 10, count 0 2006.229.04:24:01.27#ibcon#enter sib2, iclass 10, count 0 2006.229.04:24:01.27#ibcon#flushed, iclass 10, count 0 2006.229.04:24:01.27#ibcon#about to write, iclass 10, count 0 2006.229.04:24:01.27#ibcon#wrote, iclass 10, count 0 2006.229.04:24:01.27#ibcon#about to read 3, iclass 10, count 0 2006.229.04:24:01.32#ibcon#read 3, iclass 10, count 0 2006.229.04:24:01.32#ibcon#about to read 4, iclass 10, count 0 2006.229.04:24:01.32#ibcon#read 4, iclass 10, count 0 2006.229.04:24:01.32#ibcon#about to read 5, iclass 10, count 0 2006.229.04:24:01.32#ibcon#read 5, iclass 10, count 0 2006.229.04:24:01.32#ibcon#about to read 6, iclass 10, count 0 2006.229.04:24:01.32#ibcon#read 6, iclass 10, count 0 2006.229.04:24:01.32#ibcon#end of sib2, iclass 10, count 0 2006.229.04:24:01.32#ibcon#*after write, iclass 10, count 0 2006.229.04:24:01.32#ibcon#*before return 0, iclass 10, count 0 2006.229.04:24:01.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:01.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:01.32#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:24:01.32#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:24:01.32$vck44/va=1,8 2006.229.04:24:01.32#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.04:24:01.32#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.04:24:01.32#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:01.32#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:01.32#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:01.32#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:01.32#ibcon#enter wrdev, iclass 12, count 2 2006.229.04:24:01.32#ibcon#first serial, iclass 12, count 2 2006.229.04:24:01.32#ibcon#enter sib2, iclass 12, count 2 2006.229.04:24:01.32#ibcon#flushed, iclass 12, count 2 2006.229.04:24:01.32#ibcon#about to write, iclass 12, count 2 2006.229.04:24:01.32#ibcon#wrote, iclass 12, count 2 2006.229.04:24:01.32#ibcon#about to read 3, iclass 12, count 2 2006.229.04:24:01.34#ibcon#read 3, iclass 12, count 2 2006.229.04:24:01.34#ibcon#about to read 4, iclass 12, count 2 2006.229.04:24:01.34#ibcon#read 4, iclass 12, count 2 2006.229.04:24:01.34#ibcon#about to read 5, iclass 12, count 2 2006.229.04:24:01.34#ibcon#read 5, iclass 12, count 2 2006.229.04:24:01.34#ibcon#about to read 6, iclass 12, count 2 2006.229.04:24:01.34#ibcon#read 6, iclass 12, count 2 2006.229.04:24:01.34#ibcon#end of sib2, iclass 12, count 2 2006.229.04:24:01.34#ibcon#*mode == 0, iclass 12, count 2 2006.229.04:24:01.34#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.04:24:01.34#ibcon#[25=AT01-08\r\n] 2006.229.04:24:01.34#ibcon#*before write, iclass 12, count 2 2006.229.04:24:01.34#ibcon#enter sib2, iclass 12, count 2 2006.229.04:24:01.34#ibcon#flushed, iclass 12, count 2 2006.229.04:24:01.34#ibcon#about to write, iclass 12, count 2 2006.229.04:24:01.34#ibcon#wrote, iclass 12, count 2 2006.229.04:24:01.34#ibcon#about to read 3, iclass 12, count 2 2006.229.04:24:01.37#ibcon#read 3, iclass 12, count 2 2006.229.04:24:01.37#ibcon#about to read 4, iclass 12, count 2 2006.229.04:24:01.37#ibcon#read 4, iclass 12, count 2 2006.229.04:24:01.37#ibcon#about to read 5, iclass 12, count 2 2006.229.04:24:01.37#ibcon#read 5, iclass 12, count 2 2006.229.04:24:01.37#ibcon#about to read 6, iclass 12, count 2 2006.229.04:24:01.37#ibcon#read 6, iclass 12, count 2 2006.229.04:24:01.37#ibcon#end of sib2, iclass 12, count 2 2006.229.04:24:01.37#ibcon#*after write, iclass 12, count 2 2006.229.04:24:01.37#ibcon#*before return 0, iclass 12, count 2 2006.229.04:24:01.37#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:01.37#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:01.37#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.04:24:01.37#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:01.37#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:01.49#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:01.49#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:01.49#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:24:01.49#ibcon#first serial, iclass 12, count 0 2006.229.04:24:01.49#ibcon#enter sib2, iclass 12, count 0 2006.229.04:24:01.49#ibcon#flushed, iclass 12, count 0 2006.229.04:24:01.49#ibcon#about to write, iclass 12, count 0 2006.229.04:24:01.49#ibcon#wrote, iclass 12, count 0 2006.229.04:24:01.49#ibcon#about to read 3, iclass 12, count 0 2006.229.04:24:01.51#ibcon#read 3, iclass 12, count 0 2006.229.04:24:01.51#ibcon#about to read 4, iclass 12, count 0 2006.229.04:24:01.51#ibcon#read 4, iclass 12, count 0 2006.229.04:24:01.51#ibcon#about to read 5, iclass 12, count 0 2006.229.04:24:01.51#ibcon#read 5, iclass 12, count 0 2006.229.04:24:01.51#ibcon#about to read 6, iclass 12, count 0 2006.229.04:24:01.51#ibcon#read 6, iclass 12, count 0 2006.229.04:24:01.51#ibcon#end of sib2, iclass 12, count 0 2006.229.04:24:01.51#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:24:01.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:24:01.51#ibcon#[25=USB\r\n] 2006.229.04:24:01.51#ibcon#*before write, iclass 12, count 0 2006.229.04:24:01.51#ibcon#enter sib2, iclass 12, count 0 2006.229.04:24:01.51#ibcon#flushed, iclass 12, count 0 2006.229.04:24:01.51#ibcon#about to write, iclass 12, count 0 2006.229.04:24:01.51#ibcon#wrote, iclass 12, count 0 2006.229.04:24:01.51#ibcon#about to read 3, iclass 12, count 0 2006.229.04:24:01.54#ibcon#read 3, iclass 12, count 0 2006.229.04:24:01.54#ibcon#about to read 4, iclass 12, count 0 2006.229.04:24:01.54#ibcon#read 4, iclass 12, count 0 2006.229.04:24:01.54#ibcon#about to read 5, iclass 12, count 0 2006.229.04:24:01.54#ibcon#read 5, iclass 12, count 0 2006.229.04:24:01.54#ibcon#about to read 6, iclass 12, count 0 2006.229.04:24:01.54#ibcon#read 6, iclass 12, count 0 2006.229.04:24:01.54#ibcon#end of sib2, iclass 12, count 0 2006.229.04:24:01.54#ibcon#*after write, iclass 12, count 0 2006.229.04:24:01.54#ibcon#*before return 0, iclass 12, count 0 2006.229.04:24:01.54#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:01.54#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:01.54#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:24:01.54#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:24:01.54$vck44/valo=2,534.99 2006.229.04:24:01.54#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:24:01.54#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:24:01.54#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:01.54#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:01.54#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:01.54#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:01.54#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:24:01.54#ibcon#first serial, iclass 14, count 0 2006.229.04:24:01.54#ibcon#enter sib2, iclass 14, count 0 2006.229.04:24:01.54#ibcon#flushed, iclass 14, count 0 2006.229.04:24:01.54#ibcon#about to write, iclass 14, count 0 2006.229.04:24:01.54#ibcon#wrote, iclass 14, count 0 2006.229.04:24:01.54#ibcon#about to read 3, iclass 14, count 0 2006.229.04:24:01.56#ibcon#read 3, iclass 14, count 0 2006.229.04:24:01.56#ibcon#about to read 4, iclass 14, count 0 2006.229.04:24:01.56#ibcon#read 4, iclass 14, count 0 2006.229.04:24:01.56#ibcon#about to read 5, iclass 14, count 0 2006.229.04:24:01.56#ibcon#read 5, iclass 14, count 0 2006.229.04:24:01.56#ibcon#about to read 6, iclass 14, count 0 2006.229.04:24:01.56#ibcon#read 6, iclass 14, count 0 2006.229.04:24:01.56#ibcon#end of sib2, iclass 14, count 0 2006.229.04:24:01.56#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:24:01.56#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:24:01.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:24:01.56#ibcon#*before write, iclass 14, count 0 2006.229.04:24:01.56#ibcon#enter sib2, iclass 14, count 0 2006.229.04:24:01.56#ibcon#flushed, iclass 14, count 0 2006.229.04:24:01.56#ibcon#about to write, iclass 14, count 0 2006.229.04:24:01.56#ibcon#wrote, iclass 14, count 0 2006.229.04:24:01.56#ibcon#about to read 3, iclass 14, count 0 2006.229.04:24:01.60#ibcon#read 3, iclass 14, count 0 2006.229.04:24:01.60#ibcon#about to read 4, iclass 14, count 0 2006.229.04:24:01.60#ibcon#read 4, iclass 14, count 0 2006.229.04:24:01.60#ibcon#about to read 5, iclass 14, count 0 2006.229.04:24:01.60#ibcon#read 5, iclass 14, count 0 2006.229.04:24:01.60#ibcon#about to read 6, iclass 14, count 0 2006.229.04:24:01.60#ibcon#read 6, iclass 14, count 0 2006.229.04:24:01.60#ibcon#end of sib2, iclass 14, count 0 2006.229.04:24:01.60#ibcon#*after write, iclass 14, count 0 2006.229.04:24:01.60#ibcon#*before return 0, iclass 14, count 0 2006.229.04:24:01.60#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:01.60#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:01.60#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:24:01.60#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:24:01.60$vck44/va=2,7 2006.229.04:24:01.60#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.04:24:01.60#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.04:24:01.60#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:01.60#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:01.66#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:01.66#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:01.66#ibcon#enter wrdev, iclass 16, count 2 2006.229.04:24:01.66#ibcon#first serial, iclass 16, count 2 2006.229.04:24:01.66#ibcon#enter sib2, iclass 16, count 2 2006.229.04:24:01.66#ibcon#flushed, iclass 16, count 2 2006.229.04:24:01.66#ibcon#about to write, iclass 16, count 2 2006.229.04:24:01.66#ibcon#wrote, iclass 16, count 2 2006.229.04:24:01.66#ibcon#about to read 3, iclass 16, count 2 2006.229.04:24:01.68#ibcon#read 3, iclass 16, count 2 2006.229.04:24:01.68#ibcon#about to read 4, iclass 16, count 2 2006.229.04:24:01.68#ibcon#read 4, iclass 16, count 2 2006.229.04:24:01.68#ibcon#about to read 5, iclass 16, count 2 2006.229.04:24:01.68#ibcon#read 5, iclass 16, count 2 2006.229.04:24:01.68#ibcon#about to read 6, iclass 16, count 2 2006.229.04:24:01.68#ibcon#read 6, iclass 16, count 2 2006.229.04:24:01.68#ibcon#end of sib2, iclass 16, count 2 2006.229.04:24:01.68#ibcon#*mode == 0, iclass 16, count 2 2006.229.04:24:01.68#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.04:24:01.68#ibcon#[25=AT02-07\r\n] 2006.229.04:24:01.68#ibcon#*before write, iclass 16, count 2 2006.229.04:24:01.68#ibcon#enter sib2, iclass 16, count 2 2006.229.04:24:01.68#ibcon#flushed, iclass 16, count 2 2006.229.04:24:01.68#ibcon#about to write, iclass 16, count 2 2006.229.04:24:01.68#ibcon#wrote, iclass 16, count 2 2006.229.04:24:01.68#ibcon#about to read 3, iclass 16, count 2 2006.229.04:24:01.71#ibcon#read 3, iclass 16, count 2 2006.229.04:24:01.71#ibcon#about to read 4, iclass 16, count 2 2006.229.04:24:01.71#ibcon#read 4, iclass 16, count 2 2006.229.04:24:01.71#ibcon#about to read 5, iclass 16, count 2 2006.229.04:24:01.71#ibcon#read 5, iclass 16, count 2 2006.229.04:24:01.71#ibcon#about to read 6, iclass 16, count 2 2006.229.04:24:01.71#ibcon#read 6, iclass 16, count 2 2006.229.04:24:01.71#ibcon#end of sib2, iclass 16, count 2 2006.229.04:24:01.71#ibcon#*after write, iclass 16, count 2 2006.229.04:24:01.71#ibcon#*before return 0, iclass 16, count 2 2006.229.04:24:01.71#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:01.71#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:01.71#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.04:24:01.71#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:01.71#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:01.83#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:01.83#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:01.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:24:01.83#ibcon#first serial, iclass 16, count 0 2006.229.04:24:01.83#ibcon#enter sib2, iclass 16, count 0 2006.229.04:24:01.83#ibcon#flushed, iclass 16, count 0 2006.229.04:24:01.83#ibcon#about to write, iclass 16, count 0 2006.229.04:24:01.83#ibcon#wrote, iclass 16, count 0 2006.229.04:24:01.83#ibcon#about to read 3, iclass 16, count 0 2006.229.04:24:01.85#ibcon#read 3, iclass 16, count 0 2006.229.04:24:01.85#ibcon#about to read 4, iclass 16, count 0 2006.229.04:24:01.85#ibcon#read 4, iclass 16, count 0 2006.229.04:24:01.85#ibcon#about to read 5, iclass 16, count 0 2006.229.04:24:01.85#ibcon#read 5, iclass 16, count 0 2006.229.04:24:01.85#ibcon#about to read 6, iclass 16, count 0 2006.229.04:24:01.85#ibcon#read 6, iclass 16, count 0 2006.229.04:24:01.85#ibcon#end of sib2, iclass 16, count 0 2006.229.04:24:01.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:24:01.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:24:01.85#ibcon#[25=USB\r\n] 2006.229.04:24:01.85#ibcon#*before write, iclass 16, count 0 2006.229.04:24:01.85#ibcon#enter sib2, iclass 16, count 0 2006.229.04:24:01.85#ibcon#flushed, iclass 16, count 0 2006.229.04:24:01.85#ibcon#about to write, iclass 16, count 0 2006.229.04:24:01.85#ibcon#wrote, iclass 16, count 0 2006.229.04:24:01.85#ibcon#about to read 3, iclass 16, count 0 2006.229.04:24:01.88#ibcon#read 3, iclass 16, count 0 2006.229.04:24:01.88#ibcon#about to read 4, iclass 16, count 0 2006.229.04:24:01.88#ibcon#read 4, iclass 16, count 0 2006.229.04:24:01.88#ibcon#about to read 5, iclass 16, count 0 2006.229.04:24:01.88#ibcon#read 5, iclass 16, count 0 2006.229.04:24:01.88#ibcon#about to read 6, iclass 16, count 0 2006.229.04:24:01.88#ibcon#read 6, iclass 16, count 0 2006.229.04:24:01.88#ibcon#end of sib2, iclass 16, count 0 2006.229.04:24:01.88#ibcon#*after write, iclass 16, count 0 2006.229.04:24:01.88#ibcon#*before return 0, iclass 16, count 0 2006.229.04:24:01.88#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:01.88#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:01.88#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:24:01.88#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:24:01.88$vck44/valo=3,564.99 2006.229.04:24:01.88#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.04:24:01.88#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.04:24:01.88#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:01.88#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:01.88#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:01.88#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:01.88#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:24:01.88#ibcon#first serial, iclass 18, count 0 2006.229.04:24:01.88#ibcon#enter sib2, iclass 18, count 0 2006.229.04:24:01.88#ibcon#flushed, iclass 18, count 0 2006.229.04:24:01.88#ibcon#about to write, iclass 18, count 0 2006.229.04:24:01.88#ibcon#wrote, iclass 18, count 0 2006.229.04:24:01.88#ibcon#about to read 3, iclass 18, count 0 2006.229.04:24:01.90#ibcon#read 3, iclass 18, count 0 2006.229.04:24:01.90#ibcon#about to read 4, iclass 18, count 0 2006.229.04:24:01.90#ibcon#read 4, iclass 18, count 0 2006.229.04:24:01.90#ibcon#about to read 5, iclass 18, count 0 2006.229.04:24:01.90#ibcon#read 5, iclass 18, count 0 2006.229.04:24:01.90#ibcon#about to read 6, iclass 18, count 0 2006.229.04:24:01.90#ibcon#read 6, iclass 18, count 0 2006.229.04:24:01.90#ibcon#end of sib2, iclass 18, count 0 2006.229.04:24:01.90#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:24:01.90#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:24:01.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:24:01.90#ibcon#*before write, iclass 18, count 0 2006.229.04:24:01.90#ibcon#enter sib2, iclass 18, count 0 2006.229.04:24:01.90#ibcon#flushed, iclass 18, count 0 2006.229.04:24:01.90#ibcon#about to write, iclass 18, count 0 2006.229.04:24:01.90#ibcon#wrote, iclass 18, count 0 2006.229.04:24:01.90#ibcon#about to read 3, iclass 18, count 0 2006.229.04:24:01.94#ibcon#read 3, iclass 18, count 0 2006.229.04:24:01.94#ibcon#about to read 4, iclass 18, count 0 2006.229.04:24:01.94#ibcon#read 4, iclass 18, count 0 2006.229.04:24:01.94#ibcon#about to read 5, iclass 18, count 0 2006.229.04:24:01.94#ibcon#read 5, iclass 18, count 0 2006.229.04:24:01.94#ibcon#about to read 6, iclass 18, count 0 2006.229.04:24:01.94#ibcon#read 6, iclass 18, count 0 2006.229.04:24:01.94#ibcon#end of sib2, iclass 18, count 0 2006.229.04:24:01.94#ibcon#*after write, iclass 18, count 0 2006.229.04:24:01.94#ibcon#*before return 0, iclass 18, count 0 2006.229.04:24:01.94#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:01.94#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:01.94#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:24:01.94#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:24:01.94$vck44/va=3,6 2006.229.04:24:01.94#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.04:24:01.94#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.04:24:01.94#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:01.94#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:02.00#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:02.00#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:02.00#ibcon#enter wrdev, iclass 20, count 2 2006.229.04:24:02.00#ibcon#first serial, iclass 20, count 2 2006.229.04:24:02.00#ibcon#enter sib2, iclass 20, count 2 2006.229.04:24:02.00#ibcon#flushed, iclass 20, count 2 2006.229.04:24:02.00#ibcon#about to write, iclass 20, count 2 2006.229.04:24:02.00#ibcon#wrote, iclass 20, count 2 2006.229.04:24:02.00#ibcon#about to read 3, iclass 20, count 2 2006.229.04:24:02.02#ibcon#read 3, iclass 20, count 2 2006.229.04:24:02.02#ibcon#about to read 4, iclass 20, count 2 2006.229.04:24:02.02#ibcon#read 4, iclass 20, count 2 2006.229.04:24:02.02#ibcon#about to read 5, iclass 20, count 2 2006.229.04:24:02.02#ibcon#read 5, iclass 20, count 2 2006.229.04:24:02.02#ibcon#about to read 6, iclass 20, count 2 2006.229.04:24:02.02#ibcon#read 6, iclass 20, count 2 2006.229.04:24:02.02#ibcon#end of sib2, iclass 20, count 2 2006.229.04:24:02.02#ibcon#*mode == 0, iclass 20, count 2 2006.229.04:24:02.02#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.04:24:02.02#ibcon#[25=AT03-06\r\n] 2006.229.04:24:02.02#ibcon#*before write, iclass 20, count 2 2006.229.04:24:02.02#ibcon#enter sib2, iclass 20, count 2 2006.229.04:24:02.02#ibcon#flushed, iclass 20, count 2 2006.229.04:24:02.02#ibcon#about to write, iclass 20, count 2 2006.229.04:24:02.02#ibcon#wrote, iclass 20, count 2 2006.229.04:24:02.02#ibcon#about to read 3, iclass 20, count 2 2006.229.04:24:02.05#ibcon#read 3, iclass 20, count 2 2006.229.04:24:02.05#ibcon#about to read 4, iclass 20, count 2 2006.229.04:24:02.05#ibcon#read 4, iclass 20, count 2 2006.229.04:24:02.05#ibcon#about to read 5, iclass 20, count 2 2006.229.04:24:02.05#ibcon#read 5, iclass 20, count 2 2006.229.04:24:02.05#ibcon#about to read 6, iclass 20, count 2 2006.229.04:24:02.05#ibcon#read 6, iclass 20, count 2 2006.229.04:24:02.05#ibcon#end of sib2, iclass 20, count 2 2006.229.04:24:02.05#ibcon#*after write, iclass 20, count 2 2006.229.04:24:02.05#ibcon#*before return 0, iclass 20, count 2 2006.229.04:24:02.05#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:02.05#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:02.05#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.04:24:02.05#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:02.05#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:02.17#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:02.17#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:02.17#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:24:02.17#ibcon#first serial, iclass 20, count 0 2006.229.04:24:02.17#ibcon#enter sib2, iclass 20, count 0 2006.229.04:24:02.17#ibcon#flushed, iclass 20, count 0 2006.229.04:24:02.17#ibcon#about to write, iclass 20, count 0 2006.229.04:24:02.17#ibcon#wrote, iclass 20, count 0 2006.229.04:24:02.17#ibcon#about to read 3, iclass 20, count 0 2006.229.04:24:02.19#ibcon#read 3, iclass 20, count 0 2006.229.04:24:02.19#ibcon#about to read 4, iclass 20, count 0 2006.229.04:24:02.19#ibcon#read 4, iclass 20, count 0 2006.229.04:24:02.19#ibcon#about to read 5, iclass 20, count 0 2006.229.04:24:02.19#ibcon#read 5, iclass 20, count 0 2006.229.04:24:02.19#ibcon#about to read 6, iclass 20, count 0 2006.229.04:24:02.19#ibcon#read 6, iclass 20, count 0 2006.229.04:24:02.19#ibcon#end of sib2, iclass 20, count 0 2006.229.04:24:02.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:24:02.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:24:02.19#ibcon#[25=USB\r\n] 2006.229.04:24:02.19#ibcon#*before write, iclass 20, count 0 2006.229.04:24:02.19#ibcon#enter sib2, iclass 20, count 0 2006.229.04:24:02.19#ibcon#flushed, iclass 20, count 0 2006.229.04:24:02.19#ibcon#about to write, iclass 20, count 0 2006.229.04:24:02.19#ibcon#wrote, iclass 20, count 0 2006.229.04:24:02.19#ibcon#about to read 3, iclass 20, count 0 2006.229.04:24:02.22#ibcon#read 3, iclass 20, count 0 2006.229.04:24:02.22#ibcon#about to read 4, iclass 20, count 0 2006.229.04:24:02.22#ibcon#read 4, iclass 20, count 0 2006.229.04:24:02.22#ibcon#about to read 5, iclass 20, count 0 2006.229.04:24:02.22#ibcon#read 5, iclass 20, count 0 2006.229.04:24:02.22#ibcon#about to read 6, iclass 20, count 0 2006.229.04:24:02.22#ibcon#read 6, iclass 20, count 0 2006.229.04:24:02.22#ibcon#end of sib2, iclass 20, count 0 2006.229.04:24:02.22#ibcon#*after write, iclass 20, count 0 2006.229.04:24:02.22#ibcon#*before return 0, iclass 20, count 0 2006.229.04:24:02.22#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:02.22#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:02.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:24:02.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:24:02.22$vck44/valo=4,624.99 2006.229.04:24:02.22#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.04:24:02.22#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.04:24:02.22#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:02.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:02.22#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:02.22#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:02.22#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:24:02.22#ibcon#first serial, iclass 22, count 0 2006.229.04:24:02.22#ibcon#enter sib2, iclass 22, count 0 2006.229.04:24:02.22#ibcon#flushed, iclass 22, count 0 2006.229.04:24:02.22#ibcon#about to write, iclass 22, count 0 2006.229.04:24:02.22#ibcon#wrote, iclass 22, count 0 2006.229.04:24:02.22#ibcon#about to read 3, iclass 22, count 0 2006.229.04:24:02.24#ibcon#read 3, iclass 22, count 0 2006.229.04:24:02.24#ibcon#about to read 4, iclass 22, count 0 2006.229.04:24:02.24#ibcon#read 4, iclass 22, count 0 2006.229.04:24:02.24#ibcon#about to read 5, iclass 22, count 0 2006.229.04:24:02.24#ibcon#read 5, iclass 22, count 0 2006.229.04:24:02.24#ibcon#about to read 6, iclass 22, count 0 2006.229.04:24:02.24#ibcon#read 6, iclass 22, count 0 2006.229.04:24:02.24#ibcon#end of sib2, iclass 22, count 0 2006.229.04:24:02.24#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:24:02.24#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:24:02.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:24:02.24#ibcon#*before write, iclass 22, count 0 2006.229.04:24:02.24#ibcon#enter sib2, iclass 22, count 0 2006.229.04:24:02.24#ibcon#flushed, iclass 22, count 0 2006.229.04:24:02.24#ibcon#about to write, iclass 22, count 0 2006.229.04:24:02.24#ibcon#wrote, iclass 22, count 0 2006.229.04:24:02.24#ibcon#about to read 3, iclass 22, count 0 2006.229.04:24:02.28#ibcon#read 3, iclass 22, count 0 2006.229.04:24:02.28#ibcon#about to read 4, iclass 22, count 0 2006.229.04:24:02.28#ibcon#read 4, iclass 22, count 0 2006.229.04:24:02.28#ibcon#about to read 5, iclass 22, count 0 2006.229.04:24:02.28#ibcon#read 5, iclass 22, count 0 2006.229.04:24:02.28#ibcon#about to read 6, iclass 22, count 0 2006.229.04:24:02.28#ibcon#read 6, iclass 22, count 0 2006.229.04:24:02.28#ibcon#end of sib2, iclass 22, count 0 2006.229.04:24:02.28#ibcon#*after write, iclass 22, count 0 2006.229.04:24:02.28#ibcon#*before return 0, iclass 22, count 0 2006.229.04:24:02.28#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:02.28#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:02.28#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:24:02.28#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:24:02.28$vck44/va=4,7 2006.229.04:24:02.28#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:24:02.28#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:24:02.28#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:02.28#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:02.34#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:02.34#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:02.34#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:24:02.34#ibcon#first serial, iclass 24, count 2 2006.229.04:24:02.34#ibcon#enter sib2, iclass 24, count 2 2006.229.04:24:02.34#ibcon#flushed, iclass 24, count 2 2006.229.04:24:02.34#ibcon#about to write, iclass 24, count 2 2006.229.04:24:02.34#ibcon#wrote, iclass 24, count 2 2006.229.04:24:02.34#ibcon#about to read 3, iclass 24, count 2 2006.229.04:24:02.36#ibcon#read 3, iclass 24, count 2 2006.229.04:24:02.36#ibcon#about to read 4, iclass 24, count 2 2006.229.04:24:02.36#ibcon#read 4, iclass 24, count 2 2006.229.04:24:02.36#ibcon#about to read 5, iclass 24, count 2 2006.229.04:24:02.36#ibcon#read 5, iclass 24, count 2 2006.229.04:24:02.36#ibcon#about to read 6, iclass 24, count 2 2006.229.04:24:02.36#ibcon#read 6, iclass 24, count 2 2006.229.04:24:02.36#ibcon#end of sib2, iclass 24, count 2 2006.229.04:24:02.36#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:24:02.36#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:24:02.36#ibcon#[25=AT04-07\r\n] 2006.229.04:24:02.36#ibcon#*before write, iclass 24, count 2 2006.229.04:24:02.36#ibcon#enter sib2, iclass 24, count 2 2006.229.04:24:02.36#ibcon#flushed, iclass 24, count 2 2006.229.04:24:02.36#ibcon#about to write, iclass 24, count 2 2006.229.04:24:02.36#ibcon#wrote, iclass 24, count 2 2006.229.04:24:02.36#ibcon#about to read 3, iclass 24, count 2 2006.229.04:24:02.39#ibcon#read 3, iclass 24, count 2 2006.229.04:24:02.39#ibcon#about to read 4, iclass 24, count 2 2006.229.04:24:02.39#ibcon#read 4, iclass 24, count 2 2006.229.04:24:02.39#ibcon#about to read 5, iclass 24, count 2 2006.229.04:24:02.39#ibcon#read 5, iclass 24, count 2 2006.229.04:24:02.39#ibcon#about to read 6, iclass 24, count 2 2006.229.04:24:02.39#ibcon#read 6, iclass 24, count 2 2006.229.04:24:02.39#ibcon#end of sib2, iclass 24, count 2 2006.229.04:24:02.39#ibcon#*after write, iclass 24, count 2 2006.229.04:24:02.39#ibcon#*before return 0, iclass 24, count 2 2006.229.04:24:02.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:02.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:02.39#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:24:02.39#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:02.39#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:02.51#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:02.51#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:02.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:24:02.51#ibcon#first serial, iclass 24, count 0 2006.229.04:24:02.51#ibcon#enter sib2, iclass 24, count 0 2006.229.04:24:02.51#ibcon#flushed, iclass 24, count 0 2006.229.04:24:02.51#ibcon#about to write, iclass 24, count 0 2006.229.04:24:02.51#ibcon#wrote, iclass 24, count 0 2006.229.04:24:02.51#ibcon#about to read 3, iclass 24, count 0 2006.229.04:24:02.53#ibcon#read 3, iclass 24, count 0 2006.229.04:24:02.53#ibcon#about to read 4, iclass 24, count 0 2006.229.04:24:02.53#ibcon#read 4, iclass 24, count 0 2006.229.04:24:02.53#ibcon#about to read 5, iclass 24, count 0 2006.229.04:24:02.53#ibcon#read 5, iclass 24, count 0 2006.229.04:24:02.53#ibcon#about to read 6, iclass 24, count 0 2006.229.04:24:02.53#ibcon#read 6, iclass 24, count 0 2006.229.04:24:02.53#ibcon#end of sib2, iclass 24, count 0 2006.229.04:24:02.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:24:02.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:24:02.53#ibcon#[25=USB\r\n] 2006.229.04:24:02.53#ibcon#*before write, iclass 24, count 0 2006.229.04:24:02.53#ibcon#enter sib2, iclass 24, count 0 2006.229.04:24:02.53#ibcon#flushed, iclass 24, count 0 2006.229.04:24:02.53#ibcon#about to write, iclass 24, count 0 2006.229.04:24:02.53#ibcon#wrote, iclass 24, count 0 2006.229.04:24:02.53#ibcon#about to read 3, iclass 24, count 0 2006.229.04:24:02.56#ibcon#read 3, iclass 24, count 0 2006.229.04:24:02.56#ibcon#about to read 4, iclass 24, count 0 2006.229.04:24:02.56#ibcon#read 4, iclass 24, count 0 2006.229.04:24:02.56#ibcon#about to read 5, iclass 24, count 0 2006.229.04:24:02.56#ibcon#read 5, iclass 24, count 0 2006.229.04:24:02.56#ibcon#about to read 6, iclass 24, count 0 2006.229.04:24:02.56#ibcon#read 6, iclass 24, count 0 2006.229.04:24:02.56#ibcon#end of sib2, iclass 24, count 0 2006.229.04:24:02.56#ibcon#*after write, iclass 24, count 0 2006.229.04:24:02.56#ibcon#*before return 0, iclass 24, count 0 2006.229.04:24:02.56#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:02.56#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:02.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:24:02.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:24:02.56$vck44/valo=5,734.99 2006.229.04:24:02.56#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.04:24:02.56#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.04:24:02.56#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:02.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:02.56#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:02.56#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:02.56#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:24:02.56#ibcon#first serial, iclass 26, count 0 2006.229.04:24:02.56#ibcon#enter sib2, iclass 26, count 0 2006.229.04:24:02.56#ibcon#flushed, iclass 26, count 0 2006.229.04:24:02.56#ibcon#about to write, iclass 26, count 0 2006.229.04:24:02.56#ibcon#wrote, iclass 26, count 0 2006.229.04:24:02.56#ibcon#about to read 3, iclass 26, count 0 2006.229.04:24:02.58#ibcon#read 3, iclass 26, count 0 2006.229.04:24:02.58#ibcon#about to read 4, iclass 26, count 0 2006.229.04:24:02.58#ibcon#read 4, iclass 26, count 0 2006.229.04:24:02.58#ibcon#about to read 5, iclass 26, count 0 2006.229.04:24:02.58#ibcon#read 5, iclass 26, count 0 2006.229.04:24:02.58#ibcon#about to read 6, iclass 26, count 0 2006.229.04:24:02.58#ibcon#read 6, iclass 26, count 0 2006.229.04:24:02.58#ibcon#end of sib2, iclass 26, count 0 2006.229.04:24:02.58#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:24:02.58#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:24:02.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:24:02.58#ibcon#*before write, iclass 26, count 0 2006.229.04:24:02.58#ibcon#enter sib2, iclass 26, count 0 2006.229.04:24:02.58#ibcon#flushed, iclass 26, count 0 2006.229.04:24:02.58#ibcon#about to write, iclass 26, count 0 2006.229.04:24:02.58#ibcon#wrote, iclass 26, count 0 2006.229.04:24:02.58#ibcon#about to read 3, iclass 26, count 0 2006.229.04:24:02.62#ibcon#read 3, iclass 26, count 0 2006.229.04:24:02.62#ibcon#about to read 4, iclass 26, count 0 2006.229.04:24:02.62#ibcon#read 4, iclass 26, count 0 2006.229.04:24:02.62#ibcon#about to read 5, iclass 26, count 0 2006.229.04:24:02.62#ibcon#read 5, iclass 26, count 0 2006.229.04:24:02.62#ibcon#about to read 6, iclass 26, count 0 2006.229.04:24:02.62#ibcon#read 6, iclass 26, count 0 2006.229.04:24:02.62#ibcon#end of sib2, iclass 26, count 0 2006.229.04:24:02.62#ibcon#*after write, iclass 26, count 0 2006.229.04:24:02.62#ibcon#*before return 0, iclass 26, count 0 2006.229.04:24:02.62#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:02.62#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:02.62#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:24:02.62#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:24:02.62$vck44/va=5,4 2006.229.04:24:02.62#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.04:24:02.62#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.04:24:02.62#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:02.62#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:02.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:02.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:02.68#ibcon#enter wrdev, iclass 28, count 2 2006.229.04:24:02.68#ibcon#first serial, iclass 28, count 2 2006.229.04:24:02.68#ibcon#enter sib2, iclass 28, count 2 2006.229.04:24:02.68#ibcon#flushed, iclass 28, count 2 2006.229.04:24:02.68#ibcon#about to write, iclass 28, count 2 2006.229.04:24:02.68#ibcon#wrote, iclass 28, count 2 2006.229.04:24:02.68#ibcon#about to read 3, iclass 28, count 2 2006.229.04:24:02.70#ibcon#read 3, iclass 28, count 2 2006.229.04:24:02.70#ibcon#about to read 4, iclass 28, count 2 2006.229.04:24:02.70#ibcon#read 4, iclass 28, count 2 2006.229.04:24:02.70#ibcon#about to read 5, iclass 28, count 2 2006.229.04:24:02.70#ibcon#read 5, iclass 28, count 2 2006.229.04:24:02.70#ibcon#about to read 6, iclass 28, count 2 2006.229.04:24:02.70#ibcon#read 6, iclass 28, count 2 2006.229.04:24:02.70#ibcon#end of sib2, iclass 28, count 2 2006.229.04:24:02.70#ibcon#*mode == 0, iclass 28, count 2 2006.229.04:24:02.70#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.04:24:02.70#ibcon#[25=AT05-04\r\n] 2006.229.04:24:02.70#ibcon#*before write, iclass 28, count 2 2006.229.04:24:02.70#ibcon#enter sib2, iclass 28, count 2 2006.229.04:24:02.70#ibcon#flushed, iclass 28, count 2 2006.229.04:24:02.70#ibcon#about to write, iclass 28, count 2 2006.229.04:24:02.70#ibcon#wrote, iclass 28, count 2 2006.229.04:24:02.70#ibcon#about to read 3, iclass 28, count 2 2006.229.04:24:02.73#ibcon#read 3, iclass 28, count 2 2006.229.04:24:02.73#ibcon#about to read 4, iclass 28, count 2 2006.229.04:24:02.73#ibcon#read 4, iclass 28, count 2 2006.229.04:24:02.73#ibcon#about to read 5, iclass 28, count 2 2006.229.04:24:02.73#ibcon#read 5, iclass 28, count 2 2006.229.04:24:02.73#ibcon#about to read 6, iclass 28, count 2 2006.229.04:24:02.73#ibcon#read 6, iclass 28, count 2 2006.229.04:24:02.73#ibcon#end of sib2, iclass 28, count 2 2006.229.04:24:02.73#ibcon#*after write, iclass 28, count 2 2006.229.04:24:02.73#ibcon#*before return 0, iclass 28, count 2 2006.229.04:24:02.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:02.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:02.73#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.04:24:02.73#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:02.73#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:02.85#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:02.85#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:02.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:24:02.85#ibcon#first serial, iclass 28, count 0 2006.229.04:24:02.85#ibcon#enter sib2, iclass 28, count 0 2006.229.04:24:02.85#ibcon#flushed, iclass 28, count 0 2006.229.04:24:02.85#ibcon#about to write, iclass 28, count 0 2006.229.04:24:02.85#ibcon#wrote, iclass 28, count 0 2006.229.04:24:02.85#ibcon#about to read 3, iclass 28, count 0 2006.229.04:24:02.87#ibcon#read 3, iclass 28, count 0 2006.229.04:24:02.87#ibcon#about to read 4, iclass 28, count 0 2006.229.04:24:02.87#ibcon#read 4, iclass 28, count 0 2006.229.04:24:02.87#ibcon#about to read 5, iclass 28, count 0 2006.229.04:24:02.87#ibcon#read 5, iclass 28, count 0 2006.229.04:24:02.87#ibcon#about to read 6, iclass 28, count 0 2006.229.04:24:02.87#ibcon#read 6, iclass 28, count 0 2006.229.04:24:02.87#ibcon#end of sib2, iclass 28, count 0 2006.229.04:24:02.87#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:24:02.87#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:24:02.87#ibcon#[25=USB\r\n] 2006.229.04:24:02.87#ibcon#*before write, iclass 28, count 0 2006.229.04:24:02.87#ibcon#enter sib2, iclass 28, count 0 2006.229.04:24:02.87#ibcon#flushed, iclass 28, count 0 2006.229.04:24:02.87#ibcon#about to write, iclass 28, count 0 2006.229.04:24:02.87#ibcon#wrote, iclass 28, count 0 2006.229.04:24:02.87#ibcon#about to read 3, iclass 28, count 0 2006.229.04:24:02.90#ibcon#read 3, iclass 28, count 0 2006.229.04:24:02.90#ibcon#about to read 4, iclass 28, count 0 2006.229.04:24:02.90#ibcon#read 4, iclass 28, count 0 2006.229.04:24:02.90#ibcon#about to read 5, iclass 28, count 0 2006.229.04:24:02.90#ibcon#read 5, iclass 28, count 0 2006.229.04:24:02.90#ibcon#about to read 6, iclass 28, count 0 2006.229.04:24:02.90#ibcon#read 6, iclass 28, count 0 2006.229.04:24:02.90#ibcon#end of sib2, iclass 28, count 0 2006.229.04:24:02.90#ibcon#*after write, iclass 28, count 0 2006.229.04:24:02.90#ibcon#*before return 0, iclass 28, count 0 2006.229.04:24:02.90#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:02.90#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:02.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:24:02.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:24:02.90$vck44/valo=6,814.99 2006.229.04:24:02.90#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.04:24:02.90#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.04:24:02.90#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:02.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:02.90#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:02.90#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:02.90#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:24:02.90#ibcon#first serial, iclass 30, count 0 2006.229.04:24:02.90#ibcon#enter sib2, iclass 30, count 0 2006.229.04:24:02.90#ibcon#flushed, iclass 30, count 0 2006.229.04:24:02.90#ibcon#about to write, iclass 30, count 0 2006.229.04:24:02.90#ibcon#wrote, iclass 30, count 0 2006.229.04:24:02.90#ibcon#about to read 3, iclass 30, count 0 2006.229.04:24:02.92#ibcon#read 3, iclass 30, count 0 2006.229.04:24:02.92#ibcon#about to read 4, iclass 30, count 0 2006.229.04:24:02.92#ibcon#read 4, iclass 30, count 0 2006.229.04:24:02.92#ibcon#about to read 5, iclass 30, count 0 2006.229.04:24:02.92#ibcon#read 5, iclass 30, count 0 2006.229.04:24:02.92#ibcon#about to read 6, iclass 30, count 0 2006.229.04:24:02.92#ibcon#read 6, iclass 30, count 0 2006.229.04:24:02.92#ibcon#end of sib2, iclass 30, count 0 2006.229.04:24:02.92#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:24:02.92#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:24:02.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:24:02.92#ibcon#*before write, iclass 30, count 0 2006.229.04:24:02.92#ibcon#enter sib2, iclass 30, count 0 2006.229.04:24:02.92#ibcon#flushed, iclass 30, count 0 2006.229.04:24:02.92#ibcon#about to write, iclass 30, count 0 2006.229.04:24:02.92#ibcon#wrote, iclass 30, count 0 2006.229.04:24:02.92#ibcon#about to read 3, iclass 30, count 0 2006.229.04:24:02.96#ibcon#read 3, iclass 30, count 0 2006.229.04:24:02.96#ibcon#about to read 4, iclass 30, count 0 2006.229.04:24:02.96#ibcon#read 4, iclass 30, count 0 2006.229.04:24:02.96#ibcon#about to read 5, iclass 30, count 0 2006.229.04:24:02.96#ibcon#read 5, iclass 30, count 0 2006.229.04:24:02.96#ibcon#about to read 6, iclass 30, count 0 2006.229.04:24:02.96#ibcon#read 6, iclass 30, count 0 2006.229.04:24:02.96#ibcon#end of sib2, iclass 30, count 0 2006.229.04:24:02.96#ibcon#*after write, iclass 30, count 0 2006.229.04:24:02.96#ibcon#*before return 0, iclass 30, count 0 2006.229.04:24:02.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:02.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:02.96#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:24:02.96#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:24:02.96$vck44/va=6,4 2006.229.04:24:02.96#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:24:02.96#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:24:02.96#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:02.96#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:03.02#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:03.02#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:03.02#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:24:03.02#ibcon#first serial, iclass 32, count 2 2006.229.04:24:03.02#ibcon#enter sib2, iclass 32, count 2 2006.229.04:24:03.02#ibcon#flushed, iclass 32, count 2 2006.229.04:24:03.02#ibcon#about to write, iclass 32, count 2 2006.229.04:24:03.02#ibcon#wrote, iclass 32, count 2 2006.229.04:24:03.02#ibcon#about to read 3, iclass 32, count 2 2006.229.04:24:03.04#ibcon#read 3, iclass 32, count 2 2006.229.04:24:03.04#ibcon#about to read 4, iclass 32, count 2 2006.229.04:24:03.04#ibcon#read 4, iclass 32, count 2 2006.229.04:24:03.04#ibcon#about to read 5, iclass 32, count 2 2006.229.04:24:03.04#ibcon#read 5, iclass 32, count 2 2006.229.04:24:03.04#ibcon#about to read 6, iclass 32, count 2 2006.229.04:24:03.04#ibcon#read 6, iclass 32, count 2 2006.229.04:24:03.04#ibcon#end of sib2, iclass 32, count 2 2006.229.04:24:03.04#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:24:03.04#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:24:03.04#ibcon#[25=AT06-04\r\n] 2006.229.04:24:03.04#ibcon#*before write, iclass 32, count 2 2006.229.04:24:03.04#ibcon#enter sib2, iclass 32, count 2 2006.229.04:24:03.04#ibcon#flushed, iclass 32, count 2 2006.229.04:24:03.04#ibcon#about to write, iclass 32, count 2 2006.229.04:24:03.04#ibcon#wrote, iclass 32, count 2 2006.229.04:24:03.04#ibcon#about to read 3, iclass 32, count 2 2006.229.04:24:03.07#ibcon#read 3, iclass 32, count 2 2006.229.04:24:03.07#ibcon#about to read 4, iclass 32, count 2 2006.229.04:24:03.07#ibcon#read 4, iclass 32, count 2 2006.229.04:24:03.07#ibcon#about to read 5, iclass 32, count 2 2006.229.04:24:03.07#ibcon#read 5, iclass 32, count 2 2006.229.04:24:03.07#ibcon#about to read 6, iclass 32, count 2 2006.229.04:24:03.07#ibcon#read 6, iclass 32, count 2 2006.229.04:24:03.07#ibcon#end of sib2, iclass 32, count 2 2006.229.04:24:03.07#ibcon#*after write, iclass 32, count 2 2006.229.04:24:03.07#ibcon#*before return 0, iclass 32, count 2 2006.229.04:24:03.07#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:03.07#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:03.07#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:24:03.07#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:03.07#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:03.19#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:03.19#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:03.19#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:24:03.19#ibcon#first serial, iclass 32, count 0 2006.229.04:24:03.19#ibcon#enter sib2, iclass 32, count 0 2006.229.04:24:03.19#ibcon#flushed, iclass 32, count 0 2006.229.04:24:03.19#ibcon#about to write, iclass 32, count 0 2006.229.04:24:03.19#ibcon#wrote, iclass 32, count 0 2006.229.04:24:03.19#ibcon#about to read 3, iclass 32, count 0 2006.229.04:24:03.21#ibcon#read 3, iclass 32, count 0 2006.229.04:24:03.21#ibcon#about to read 4, iclass 32, count 0 2006.229.04:24:03.21#ibcon#read 4, iclass 32, count 0 2006.229.04:24:03.21#ibcon#about to read 5, iclass 32, count 0 2006.229.04:24:03.21#ibcon#read 5, iclass 32, count 0 2006.229.04:24:03.21#ibcon#about to read 6, iclass 32, count 0 2006.229.04:24:03.21#ibcon#read 6, iclass 32, count 0 2006.229.04:24:03.21#ibcon#end of sib2, iclass 32, count 0 2006.229.04:24:03.21#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:24:03.21#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:24:03.21#ibcon#[25=USB\r\n] 2006.229.04:24:03.21#ibcon#*before write, iclass 32, count 0 2006.229.04:24:03.21#ibcon#enter sib2, iclass 32, count 0 2006.229.04:24:03.21#ibcon#flushed, iclass 32, count 0 2006.229.04:24:03.21#ibcon#about to write, iclass 32, count 0 2006.229.04:24:03.21#ibcon#wrote, iclass 32, count 0 2006.229.04:24:03.21#ibcon#about to read 3, iclass 32, count 0 2006.229.04:24:03.24#ibcon#read 3, iclass 32, count 0 2006.229.04:24:03.24#ibcon#about to read 4, iclass 32, count 0 2006.229.04:24:03.24#ibcon#read 4, iclass 32, count 0 2006.229.04:24:03.24#ibcon#about to read 5, iclass 32, count 0 2006.229.04:24:03.24#ibcon#read 5, iclass 32, count 0 2006.229.04:24:03.24#ibcon#about to read 6, iclass 32, count 0 2006.229.04:24:03.24#ibcon#read 6, iclass 32, count 0 2006.229.04:24:03.24#ibcon#end of sib2, iclass 32, count 0 2006.229.04:24:03.24#ibcon#*after write, iclass 32, count 0 2006.229.04:24:03.24#ibcon#*before return 0, iclass 32, count 0 2006.229.04:24:03.24#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:03.24#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:03.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:24:03.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:24:03.24$vck44/valo=7,864.99 2006.229.04:24:03.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.04:24:03.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.04:24:03.24#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:03.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:03.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:03.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:03.24#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:24:03.24#ibcon#first serial, iclass 34, count 0 2006.229.04:24:03.24#ibcon#enter sib2, iclass 34, count 0 2006.229.04:24:03.24#ibcon#flushed, iclass 34, count 0 2006.229.04:24:03.24#ibcon#about to write, iclass 34, count 0 2006.229.04:24:03.24#ibcon#wrote, iclass 34, count 0 2006.229.04:24:03.24#ibcon#about to read 3, iclass 34, count 0 2006.229.04:24:03.26#ibcon#read 3, iclass 34, count 0 2006.229.04:24:03.26#ibcon#about to read 4, iclass 34, count 0 2006.229.04:24:03.26#ibcon#read 4, iclass 34, count 0 2006.229.04:24:03.26#ibcon#about to read 5, iclass 34, count 0 2006.229.04:24:03.26#ibcon#read 5, iclass 34, count 0 2006.229.04:24:03.26#ibcon#about to read 6, iclass 34, count 0 2006.229.04:24:03.26#ibcon#read 6, iclass 34, count 0 2006.229.04:24:03.26#ibcon#end of sib2, iclass 34, count 0 2006.229.04:24:03.26#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:24:03.26#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:24:03.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:24:03.26#ibcon#*before write, iclass 34, count 0 2006.229.04:24:03.26#ibcon#enter sib2, iclass 34, count 0 2006.229.04:24:03.26#ibcon#flushed, iclass 34, count 0 2006.229.04:24:03.26#ibcon#about to write, iclass 34, count 0 2006.229.04:24:03.26#ibcon#wrote, iclass 34, count 0 2006.229.04:24:03.26#ibcon#about to read 3, iclass 34, count 0 2006.229.04:24:03.30#ibcon#read 3, iclass 34, count 0 2006.229.04:24:03.30#ibcon#about to read 4, iclass 34, count 0 2006.229.04:24:03.30#ibcon#read 4, iclass 34, count 0 2006.229.04:24:03.30#ibcon#about to read 5, iclass 34, count 0 2006.229.04:24:03.30#ibcon#read 5, iclass 34, count 0 2006.229.04:24:03.30#ibcon#about to read 6, iclass 34, count 0 2006.229.04:24:03.30#ibcon#read 6, iclass 34, count 0 2006.229.04:24:03.30#ibcon#end of sib2, iclass 34, count 0 2006.229.04:24:03.30#ibcon#*after write, iclass 34, count 0 2006.229.04:24:03.30#ibcon#*before return 0, iclass 34, count 0 2006.229.04:24:03.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:03.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:03.30#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:24:03.30#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:24:03.30$vck44/va=7,5 2006.229.04:24:03.30#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.04:24:03.30#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.04:24:03.30#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:03.30#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:03.36#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:03.36#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:03.36#ibcon#enter wrdev, iclass 36, count 2 2006.229.04:24:03.36#ibcon#first serial, iclass 36, count 2 2006.229.04:24:03.36#ibcon#enter sib2, iclass 36, count 2 2006.229.04:24:03.36#ibcon#flushed, iclass 36, count 2 2006.229.04:24:03.36#ibcon#about to write, iclass 36, count 2 2006.229.04:24:03.36#ibcon#wrote, iclass 36, count 2 2006.229.04:24:03.36#ibcon#about to read 3, iclass 36, count 2 2006.229.04:24:03.38#ibcon#read 3, iclass 36, count 2 2006.229.04:24:03.38#ibcon#about to read 4, iclass 36, count 2 2006.229.04:24:03.38#ibcon#read 4, iclass 36, count 2 2006.229.04:24:03.38#ibcon#about to read 5, iclass 36, count 2 2006.229.04:24:03.38#ibcon#read 5, iclass 36, count 2 2006.229.04:24:03.38#ibcon#about to read 6, iclass 36, count 2 2006.229.04:24:03.38#ibcon#read 6, iclass 36, count 2 2006.229.04:24:03.38#ibcon#end of sib2, iclass 36, count 2 2006.229.04:24:03.38#ibcon#*mode == 0, iclass 36, count 2 2006.229.04:24:03.38#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.04:24:03.38#ibcon#[25=AT07-05\r\n] 2006.229.04:24:03.38#ibcon#*before write, iclass 36, count 2 2006.229.04:24:03.38#ibcon#enter sib2, iclass 36, count 2 2006.229.04:24:03.38#ibcon#flushed, iclass 36, count 2 2006.229.04:24:03.38#ibcon#about to write, iclass 36, count 2 2006.229.04:24:03.38#ibcon#wrote, iclass 36, count 2 2006.229.04:24:03.38#ibcon#about to read 3, iclass 36, count 2 2006.229.04:24:03.41#ibcon#read 3, iclass 36, count 2 2006.229.04:24:03.41#ibcon#about to read 4, iclass 36, count 2 2006.229.04:24:03.41#ibcon#read 4, iclass 36, count 2 2006.229.04:24:03.41#ibcon#about to read 5, iclass 36, count 2 2006.229.04:24:03.41#ibcon#read 5, iclass 36, count 2 2006.229.04:24:03.41#ibcon#about to read 6, iclass 36, count 2 2006.229.04:24:03.41#ibcon#read 6, iclass 36, count 2 2006.229.04:24:03.41#ibcon#end of sib2, iclass 36, count 2 2006.229.04:24:03.41#ibcon#*after write, iclass 36, count 2 2006.229.04:24:03.41#ibcon#*before return 0, iclass 36, count 2 2006.229.04:24:03.41#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:03.41#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:03.41#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.04:24:03.41#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:03.41#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:03.53#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:03.53#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:03.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:24:03.53#ibcon#first serial, iclass 36, count 0 2006.229.04:24:03.53#ibcon#enter sib2, iclass 36, count 0 2006.229.04:24:03.53#ibcon#flushed, iclass 36, count 0 2006.229.04:24:03.53#ibcon#about to write, iclass 36, count 0 2006.229.04:24:03.53#ibcon#wrote, iclass 36, count 0 2006.229.04:24:03.53#ibcon#about to read 3, iclass 36, count 0 2006.229.04:24:03.55#ibcon#read 3, iclass 36, count 0 2006.229.04:24:03.55#ibcon#about to read 4, iclass 36, count 0 2006.229.04:24:03.55#ibcon#read 4, iclass 36, count 0 2006.229.04:24:03.55#ibcon#about to read 5, iclass 36, count 0 2006.229.04:24:03.55#ibcon#read 5, iclass 36, count 0 2006.229.04:24:03.55#ibcon#about to read 6, iclass 36, count 0 2006.229.04:24:03.55#ibcon#read 6, iclass 36, count 0 2006.229.04:24:03.55#ibcon#end of sib2, iclass 36, count 0 2006.229.04:24:03.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:24:03.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:24:03.55#ibcon#[25=USB\r\n] 2006.229.04:24:03.55#ibcon#*before write, iclass 36, count 0 2006.229.04:24:03.55#ibcon#enter sib2, iclass 36, count 0 2006.229.04:24:03.55#ibcon#flushed, iclass 36, count 0 2006.229.04:24:03.55#ibcon#about to write, iclass 36, count 0 2006.229.04:24:03.55#ibcon#wrote, iclass 36, count 0 2006.229.04:24:03.55#ibcon#about to read 3, iclass 36, count 0 2006.229.04:24:03.58#ibcon#read 3, iclass 36, count 0 2006.229.04:24:03.58#ibcon#about to read 4, iclass 36, count 0 2006.229.04:24:03.58#ibcon#read 4, iclass 36, count 0 2006.229.04:24:03.58#ibcon#about to read 5, iclass 36, count 0 2006.229.04:24:03.58#ibcon#read 5, iclass 36, count 0 2006.229.04:24:03.58#ibcon#about to read 6, iclass 36, count 0 2006.229.04:24:03.58#ibcon#read 6, iclass 36, count 0 2006.229.04:24:03.58#ibcon#end of sib2, iclass 36, count 0 2006.229.04:24:03.58#ibcon#*after write, iclass 36, count 0 2006.229.04:24:03.58#ibcon#*before return 0, iclass 36, count 0 2006.229.04:24:03.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:03.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:03.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:24:03.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:24:03.58$vck44/valo=8,884.99 2006.229.04:24:03.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.04:24:03.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.04:24:03.58#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:03.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:03.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:03.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:03.58#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:24:03.58#ibcon#first serial, iclass 38, count 0 2006.229.04:24:03.58#ibcon#enter sib2, iclass 38, count 0 2006.229.04:24:03.58#ibcon#flushed, iclass 38, count 0 2006.229.04:24:03.58#ibcon#about to write, iclass 38, count 0 2006.229.04:24:03.58#ibcon#wrote, iclass 38, count 0 2006.229.04:24:03.58#ibcon#about to read 3, iclass 38, count 0 2006.229.04:24:03.60#ibcon#read 3, iclass 38, count 0 2006.229.04:24:03.60#ibcon#about to read 4, iclass 38, count 0 2006.229.04:24:03.60#ibcon#read 4, iclass 38, count 0 2006.229.04:24:03.60#ibcon#about to read 5, iclass 38, count 0 2006.229.04:24:03.60#ibcon#read 5, iclass 38, count 0 2006.229.04:24:03.60#ibcon#about to read 6, iclass 38, count 0 2006.229.04:24:03.60#ibcon#read 6, iclass 38, count 0 2006.229.04:24:03.60#ibcon#end of sib2, iclass 38, count 0 2006.229.04:24:03.60#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:24:03.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:24:03.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:24:03.60#ibcon#*before write, iclass 38, count 0 2006.229.04:24:03.60#ibcon#enter sib2, iclass 38, count 0 2006.229.04:24:03.60#ibcon#flushed, iclass 38, count 0 2006.229.04:24:03.60#ibcon#about to write, iclass 38, count 0 2006.229.04:24:03.60#ibcon#wrote, iclass 38, count 0 2006.229.04:24:03.60#ibcon#about to read 3, iclass 38, count 0 2006.229.04:24:03.64#ibcon#read 3, iclass 38, count 0 2006.229.04:24:03.64#ibcon#about to read 4, iclass 38, count 0 2006.229.04:24:03.64#ibcon#read 4, iclass 38, count 0 2006.229.04:24:03.64#ibcon#about to read 5, iclass 38, count 0 2006.229.04:24:03.64#ibcon#read 5, iclass 38, count 0 2006.229.04:24:03.64#ibcon#about to read 6, iclass 38, count 0 2006.229.04:24:03.64#ibcon#read 6, iclass 38, count 0 2006.229.04:24:03.64#ibcon#end of sib2, iclass 38, count 0 2006.229.04:24:03.64#ibcon#*after write, iclass 38, count 0 2006.229.04:24:03.64#ibcon#*before return 0, iclass 38, count 0 2006.229.04:24:03.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:03.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:03.64#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:24:03.64#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:24:03.64$vck44/va=8,6 2006.229.04:24:03.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.04:24:03.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.04:24:03.64#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:03.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:24:03.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:24:03.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:24:03.70#ibcon#enter wrdev, iclass 40, count 2 2006.229.04:24:03.70#ibcon#first serial, iclass 40, count 2 2006.229.04:24:03.70#ibcon#enter sib2, iclass 40, count 2 2006.229.04:24:03.70#ibcon#flushed, iclass 40, count 2 2006.229.04:24:03.70#ibcon#about to write, iclass 40, count 2 2006.229.04:24:03.70#ibcon#wrote, iclass 40, count 2 2006.229.04:24:03.70#ibcon#about to read 3, iclass 40, count 2 2006.229.04:24:03.72#ibcon#read 3, iclass 40, count 2 2006.229.04:24:03.72#ibcon#about to read 4, iclass 40, count 2 2006.229.04:24:03.72#ibcon#read 4, iclass 40, count 2 2006.229.04:24:03.72#ibcon#about to read 5, iclass 40, count 2 2006.229.04:24:03.72#ibcon#read 5, iclass 40, count 2 2006.229.04:24:03.72#ibcon#about to read 6, iclass 40, count 2 2006.229.04:24:03.72#ibcon#read 6, iclass 40, count 2 2006.229.04:24:03.72#ibcon#end of sib2, iclass 40, count 2 2006.229.04:24:03.72#ibcon#*mode == 0, iclass 40, count 2 2006.229.04:24:03.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.04:24:03.72#ibcon#[25=AT08-06\r\n] 2006.229.04:24:03.72#ibcon#*before write, iclass 40, count 2 2006.229.04:24:03.72#ibcon#enter sib2, iclass 40, count 2 2006.229.04:24:03.72#ibcon#flushed, iclass 40, count 2 2006.229.04:24:03.72#ibcon#about to write, iclass 40, count 2 2006.229.04:24:03.72#ibcon#wrote, iclass 40, count 2 2006.229.04:24:03.72#ibcon#about to read 3, iclass 40, count 2 2006.229.04:24:03.75#ibcon#read 3, iclass 40, count 2 2006.229.04:24:03.75#ibcon#about to read 4, iclass 40, count 2 2006.229.04:24:03.75#ibcon#read 4, iclass 40, count 2 2006.229.04:24:03.75#ibcon#about to read 5, iclass 40, count 2 2006.229.04:24:03.75#ibcon#read 5, iclass 40, count 2 2006.229.04:24:03.75#ibcon#about to read 6, iclass 40, count 2 2006.229.04:24:03.75#ibcon#read 6, iclass 40, count 2 2006.229.04:24:03.75#ibcon#end of sib2, iclass 40, count 2 2006.229.04:24:03.75#ibcon#*after write, iclass 40, count 2 2006.229.04:24:03.75#ibcon#*before return 0, iclass 40, count 2 2006.229.04:24:03.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:24:03.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:24:03.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.04:24:03.75#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:03.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:24:03.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:24:03.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:24:03.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:24:03.87#ibcon#first serial, iclass 40, count 0 2006.229.04:24:03.87#ibcon#enter sib2, iclass 40, count 0 2006.229.04:24:03.87#ibcon#flushed, iclass 40, count 0 2006.229.04:24:03.87#ibcon#about to write, iclass 40, count 0 2006.229.04:24:03.87#ibcon#wrote, iclass 40, count 0 2006.229.04:24:03.87#ibcon#about to read 3, iclass 40, count 0 2006.229.04:24:03.89#ibcon#read 3, iclass 40, count 0 2006.229.04:24:03.89#ibcon#about to read 4, iclass 40, count 0 2006.229.04:24:03.89#ibcon#read 4, iclass 40, count 0 2006.229.04:24:03.89#ibcon#about to read 5, iclass 40, count 0 2006.229.04:24:03.89#ibcon#read 5, iclass 40, count 0 2006.229.04:24:03.89#ibcon#about to read 6, iclass 40, count 0 2006.229.04:24:03.89#ibcon#read 6, iclass 40, count 0 2006.229.04:24:03.89#ibcon#end of sib2, iclass 40, count 0 2006.229.04:24:03.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:24:03.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:24:03.89#ibcon#[25=USB\r\n] 2006.229.04:24:03.89#ibcon#*before write, iclass 40, count 0 2006.229.04:24:03.89#ibcon#enter sib2, iclass 40, count 0 2006.229.04:24:03.89#ibcon#flushed, iclass 40, count 0 2006.229.04:24:03.89#ibcon#about to write, iclass 40, count 0 2006.229.04:24:03.89#ibcon#wrote, iclass 40, count 0 2006.229.04:24:03.89#ibcon#about to read 3, iclass 40, count 0 2006.229.04:24:03.92#ibcon#read 3, iclass 40, count 0 2006.229.04:24:03.92#ibcon#about to read 4, iclass 40, count 0 2006.229.04:24:03.92#ibcon#read 4, iclass 40, count 0 2006.229.04:24:03.92#ibcon#about to read 5, iclass 40, count 0 2006.229.04:24:03.92#ibcon#read 5, iclass 40, count 0 2006.229.04:24:03.92#ibcon#about to read 6, iclass 40, count 0 2006.229.04:24:03.92#ibcon#read 6, iclass 40, count 0 2006.229.04:24:03.92#ibcon#end of sib2, iclass 40, count 0 2006.229.04:24:03.92#ibcon#*after write, iclass 40, count 0 2006.229.04:24:03.92#ibcon#*before return 0, iclass 40, count 0 2006.229.04:24:03.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:24:03.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:24:03.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:24:03.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:24:03.92$vck44/vblo=1,629.99 2006.229.04:24:03.92#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.04:24:03.92#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.04:24:03.92#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:03.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:24:03.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:24:03.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:24:03.92#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:24:03.92#ibcon#first serial, iclass 4, count 0 2006.229.04:24:03.92#ibcon#enter sib2, iclass 4, count 0 2006.229.04:24:03.92#ibcon#flushed, iclass 4, count 0 2006.229.04:24:03.92#ibcon#about to write, iclass 4, count 0 2006.229.04:24:03.92#ibcon#wrote, iclass 4, count 0 2006.229.04:24:03.92#ibcon#about to read 3, iclass 4, count 0 2006.229.04:24:03.94#ibcon#read 3, iclass 4, count 0 2006.229.04:24:03.94#ibcon#about to read 4, iclass 4, count 0 2006.229.04:24:03.94#ibcon#read 4, iclass 4, count 0 2006.229.04:24:03.94#ibcon#about to read 5, iclass 4, count 0 2006.229.04:24:03.94#ibcon#read 5, iclass 4, count 0 2006.229.04:24:03.94#ibcon#about to read 6, iclass 4, count 0 2006.229.04:24:03.94#ibcon#read 6, iclass 4, count 0 2006.229.04:24:03.94#ibcon#end of sib2, iclass 4, count 0 2006.229.04:24:03.94#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:24:03.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:24:03.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:24:03.94#ibcon#*before write, iclass 4, count 0 2006.229.04:24:03.94#ibcon#enter sib2, iclass 4, count 0 2006.229.04:24:03.94#ibcon#flushed, iclass 4, count 0 2006.229.04:24:03.94#ibcon#about to write, iclass 4, count 0 2006.229.04:24:03.94#ibcon#wrote, iclass 4, count 0 2006.229.04:24:03.94#ibcon#about to read 3, iclass 4, count 0 2006.229.04:24:03.98#ibcon#read 3, iclass 4, count 0 2006.229.04:24:03.98#ibcon#about to read 4, iclass 4, count 0 2006.229.04:24:03.98#ibcon#read 4, iclass 4, count 0 2006.229.04:24:03.98#ibcon#about to read 5, iclass 4, count 0 2006.229.04:24:03.98#ibcon#read 5, iclass 4, count 0 2006.229.04:24:03.98#ibcon#about to read 6, iclass 4, count 0 2006.229.04:24:03.98#ibcon#read 6, iclass 4, count 0 2006.229.04:24:03.98#ibcon#end of sib2, iclass 4, count 0 2006.229.04:24:03.98#ibcon#*after write, iclass 4, count 0 2006.229.04:24:03.98#ibcon#*before return 0, iclass 4, count 0 2006.229.04:24:03.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:24:03.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:24:03.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:24:03.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:24:03.98$vck44/vb=1,4 2006.229.04:24:03.98#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.04:24:03.98#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.04:24:03.98#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:03.98#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:24:03.98#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:24:03.98#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:24:03.98#ibcon#enter wrdev, iclass 6, count 2 2006.229.04:24:03.98#ibcon#first serial, iclass 6, count 2 2006.229.04:24:03.98#ibcon#enter sib2, iclass 6, count 2 2006.229.04:24:03.98#ibcon#flushed, iclass 6, count 2 2006.229.04:24:03.98#ibcon#about to write, iclass 6, count 2 2006.229.04:24:03.98#ibcon#wrote, iclass 6, count 2 2006.229.04:24:03.98#ibcon#about to read 3, iclass 6, count 2 2006.229.04:24:04.00#ibcon#read 3, iclass 6, count 2 2006.229.04:24:04.00#ibcon#about to read 4, iclass 6, count 2 2006.229.04:24:04.00#ibcon#read 4, iclass 6, count 2 2006.229.04:24:04.00#ibcon#about to read 5, iclass 6, count 2 2006.229.04:24:04.00#ibcon#read 5, iclass 6, count 2 2006.229.04:24:04.00#ibcon#about to read 6, iclass 6, count 2 2006.229.04:24:04.00#ibcon#read 6, iclass 6, count 2 2006.229.04:24:04.00#ibcon#end of sib2, iclass 6, count 2 2006.229.04:24:04.00#ibcon#*mode == 0, iclass 6, count 2 2006.229.04:24:04.00#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.04:24:04.00#ibcon#[27=AT01-04\r\n] 2006.229.04:24:04.00#ibcon#*before write, iclass 6, count 2 2006.229.04:24:04.00#ibcon#enter sib2, iclass 6, count 2 2006.229.04:24:04.00#ibcon#flushed, iclass 6, count 2 2006.229.04:24:04.00#ibcon#about to write, iclass 6, count 2 2006.229.04:24:04.00#ibcon#wrote, iclass 6, count 2 2006.229.04:24:04.00#ibcon#about to read 3, iclass 6, count 2 2006.229.04:24:04.03#ibcon#read 3, iclass 6, count 2 2006.229.04:24:04.03#ibcon#about to read 4, iclass 6, count 2 2006.229.04:24:04.03#ibcon#read 4, iclass 6, count 2 2006.229.04:24:04.03#ibcon#about to read 5, iclass 6, count 2 2006.229.04:24:04.03#ibcon#read 5, iclass 6, count 2 2006.229.04:24:04.03#ibcon#about to read 6, iclass 6, count 2 2006.229.04:24:04.03#ibcon#read 6, iclass 6, count 2 2006.229.04:24:04.03#ibcon#end of sib2, iclass 6, count 2 2006.229.04:24:04.03#ibcon#*after write, iclass 6, count 2 2006.229.04:24:04.03#ibcon#*before return 0, iclass 6, count 2 2006.229.04:24:04.03#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:24:04.03#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:24:04.03#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.04:24:04.03#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:04.03#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:24:04.15#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:24:04.15#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:24:04.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:24:04.15#ibcon#first serial, iclass 6, count 0 2006.229.04:24:04.15#ibcon#enter sib2, iclass 6, count 0 2006.229.04:24:04.15#ibcon#flushed, iclass 6, count 0 2006.229.04:24:04.15#ibcon#about to write, iclass 6, count 0 2006.229.04:24:04.15#ibcon#wrote, iclass 6, count 0 2006.229.04:24:04.15#ibcon#about to read 3, iclass 6, count 0 2006.229.04:24:04.17#ibcon#read 3, iclass 6, count 0 2006.229.04:24:04.17#ibcon#about to read 4, iclass 6, count 0 2006.229.04:24:04.17#ibcon#read 4, iclass 6, count 0 2006.229.04:24:04.17#ibcon#about to read 5, iclass 6, count 0 2006.229.04:24:04.17#ibcon#read 5, iclass 6, count 0 2006.229.04:24:04.17#ibcon#about to read 6, iclass 6, count 0 2006.229.04:24:04.17#ibcon#read 6, iclass 6, count 0 2006.229.04:24:04.17#ibcon#end of sib2, iclass 6, count 0 2006.229.04:24:04.17#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:24:04.17#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:24:04.17#ibcon#[27=USB\r\n] 2006.229.04:24:04.17#ibcon#*before write, iclass 6, count 0 2006.229.04:24:04.17#ibcon#enter sib2, iclass 6, count 0 2006.229.04:24:04.17#ibcon#flushed, iclass 6, count 0 2006.229.04:24:04.17#ibcon#about to write, iclass 6, count 0 2006.229.04:24:04.17#ibcon#wrote, iclass 6, count 0 2006.229.04:24:04.17#ibcon#about to read 3, iclass 6, count 0 2006.229.04:24:04.20#ibcon#read 3, iclass 6, count 0 2006.229.04:24:04.20#ibcon#about to read 4, iclass 6, count 0 2006.229.04:24:04.20#ibcon#read 4, iclass 6, count 0 2006.229.04:24:04.20#ibcon#about to read 5, iclass 6, count 0 2006.229.04:24:04.20#ibcon#read 5, iclass 6, count 0 2006.229.04:24:04.20#ibcon#about to read 6, iclass 6, count 0 2006.229.04:24:04.20#ibcon#read 6, iclass 6, count 0 2006.229.04:24:04.20#ibcon#end of sib2, iclass 6, count 0 2006.229.04:24:04.20#ibcon#*after write, iclass 6, count 0 2006.229.04:24:04.20#ibcon#*before return 0, iclass 6, count 0 2006.229.04:24:04.20#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:24:04.20#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:24:04.20#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:24:04.20#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:24:04.20$vck44/vblo=2,634.99 2006.229.04:24:04.20#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:24:04.20#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:24:04.20#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:04.20#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:04.20#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:04.20#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:04.20#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:24:04.20#ibcon#first serial, iclass 10, count 0 2006.229.04:24:04.20#ibcon#enter sib2, iclass 10, count 0 2006.229.04:24:04.20#ibcon#flushed, iclass 10, count 0 2006.229.04:24:04.20#ibcon#about to write, iclass 10, count 0 2006.229.04:24:04.20#ibcon#wrote, iclass 10, count 0 2006.229.04:24:04.20#ibcon#about to read 3, iclass 10, count 0 2006.229.04:24:04.22#ibcon#read 3, iclass 10, count 0 2006.229.04:24:04.22#ibcon#about to read 4, iclass 10, count 0 2006.229.04:24:04.22#ibcon#read 4, iclass 10, count 0 2006.229.04:24:04.22#ibcon#about to read 5, iclass 10, count 0 2006.229.04:24:04.22#ibcon#read 5, iclass 10, count 0 2006.229.04:24:04.22#ibcon#about to read 6, iclass 10, count 0 2006.229.04:24:04.22#ibcon#read 6, iclass 10, count 0 2006.229.04:24:04.22#ibcon#end of sib2, iclass 10, count 0 2006.229.04:24:04.22#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:24:04.22#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:24:04.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:24:04.22#ibcon#*before write, iclass 10, count 0 2006.229.04:24:04.22#ibcon#enter sib2, iclass 10, count 0 2006.229.04:24:04.22#ibcon#flushed, iclass 10, count 0 2006.229.04:24:04.22#ibcon#about to write, iclass 10, count 0 2006.229.04:24:04.22#ibcon#wrote, iclass 10, count 0 2006.229.04:24:04.22#ibcon#about to read 3, iclass 10, count 0 2006.229.04:24:04.26#ibcon#read 3, iclass 10, count 0 2006.229.04:24:04.26#ibcon#about to read 4, iclass 10, count 0 2006.229.04:24:04.26#ibcon#read 4, iclass 10, count 0 2006.229.04:24:04.26#ibcon#about to read 5, iclass 10, count 0 2006.229.04:24:04.26#ibcon#read 5, iclass 10, count 0 2006.229.04:24:04.26#ibcon#about to read 6, iclass 10, count 0 2006.229.04:24:04.26#ibcon#read 6, iclass 10, count 0 2006.229.04:24:04.26#ibcon#end of sib2, iclass 10, count 0 2006.229.04:24:04.26#ibcon#*after write, iclass 10, count 0 2006.229.04:24:04.26#ibcon#*before return 0, iclass 10, count 0 2006.229.04:24:04.26#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:04.26#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:24:04.26#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:24:04.26#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:24:04.26$vck44/vb=2,4 2006.229.04:24:04.26#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.04:24:04.26#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.04:24:04.26#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:04.26#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:04.32#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:04.32#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:04.32#ibcon#enter wrdev, iclass 12, count 2 2006.229.04:24:04.32#ibcon#first serial, iclass 12, count 2 2006.229.04:24:04.32#ibcon#enter sib2, iclass 12, count 2 2006.229.04:24:04.32#ibcon#flushed, iclass 12, count 2 2006.229.04:24:04.32#ibcon#about to write, iclass 12, count 2 2006.229.04:24:04.32#ibcon#wrote, iclass 12, count 2 2006.229.04:24:04.32#ibcon#about to read 3, iclass 12, count 2 2006.229.04:24:04.34#ibcon#read 3, iclass 12, count 2 2006.229.04:24:04.34#ibcon#about to read 4, iclass 12, count 2 2006.229.04:24:04.34#ibcon#read 4, iclass 12, count 2 2006.229.04:24:04.34#ibcon#about to read 5, iclass 12, count 2 2006.229.04:24:04.34#ibcon#read 5, iclass 12, count 2 2006.229.04:24:04.34#ibcon#about to read 6, iclass 12, count 2 2006.229.04:24:04.34#ibcon#read 6, iclass 12, count 2 2006.229.04:24:04.34#ibcon#end of sib2, iclass 12, count 2 2006.229.04:24:04.34#ibcon#*mode == 0, iclass 12, count 2 2006.229.04:24:04.34#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.04:24:04.34#ibcon#[27=AT02-04\r\n] 2006.229.04:24:04.34#ibcon#*before write, iclass 12, count 2 2006.229.04:24:04.34#ibcon#enter sib2, iclass 12, count 2 2006.229.04:24:04.34#ibcon#flushed, iclass 12, count 2 2006.229.04:24:04.34#ibcon#about to write, iclass 12, count 2 2006.229.04:24:04.34#ibcon#wrote, iclass 12, count 2 2006.229.04:24:04.34#ibcon#about to read 3, iclass 12, count 2 2006.229.04:24:04.37#ibcon#read 3, iclass 12, count 2 2006.229.04:24:04.37#ibcon#about to read 4, iclass 12, count 2 2006.229.04:24:04.37#ibcon#read 4, iclass 12, count 2 2006.229.04:24:04.37#ibcon#about to read 5, iclass 12, count 2 2006.229.04:24:04.37#ibcon#read 5, iclass 12, count 2 2006.229.04:24:04.37#ibcon#about to read 6, iclass 12, count 2 2006.229.04:24:04.37#ibcon#read 6, iclass 12, count 2 2006.229.04:24:04.37#ibcon#end of sib2, iclass 12, count 2 2006.229.04:24:04.37#ibcon#*after write, iclass 12, count 2 2006.229.04:24:04.37#ibcon#*before return 0, iclass 12, count 2 2006.229.04:24:04.37#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:04.37#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:24:04.37#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.04:24:04.37#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:04.37#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:04.49#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:04.49#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:04.49#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:24:04.49#ibcon#first serial, iclass 12, count 0 2006.229.04:24:04.49#ibcon#enter sib2, iclass 12, count 0 2006.229.04:24:04.49#ibcon#flushed, iclass 12, count 0 2006.229.04:24:04.49#ibcon#about to write, iclass 12, count 0 2006.229.04:24:04.49#ibcon#wrote, iclass 12, count 0 2006.229.04:24:04.49#ibcon#about to read 3, iclass 12, count 0 2006.229.04:24:04.51#ibcon#read 3, iclass 12, count 0 2006.229.04:24:04.51#ibcon#about to read 4, iclass 12, count 0 2006.229.04:24:04.51#ibcon#read 4, iclass 12, count 0 2006.229.04:24:04.51#ibcon#about to read 5, iclass 12, count 0 2006.229.04:24:04.51#ibcon#read 5, iclass 12, count 0 2006.229.04:24:04.51#ibcon#about to read 6, iclass 12, count 0 2006.229.04:24:04.51#ibcon#read 6, iclass 12, count 0 2006.229.04:24:04.51#ibcon#end of sib2, iclass 12, count 0 2006.229.04:24:04.51#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:24:04.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:24:04.51#ibcon#[27=USB\r\n] 2006.229.04:24:04.51#ibcon#*before write, iclass 12, count 0 2006.229.04:24:04.51#ibcon#enter sib2, iclass 12, count 0 2006.229.04:24:04.51#ibcon#flushed, iclass 12, count 0 2006.229.04:24:04.51#ibcon#about to write, iclass 12, count 0 2006.229.04:24:04.51#ibcon#wrote, iclass 12, count 0 2006.229.04:24:04.51#ibcon#about to read 3, iclass 12, count 0 2006.229.04:24:04.54#ibcon#read 3, iclass 12, count 0 2006.229.04:24:04.54#ibcon#about to read 4, iclass 12, count 0 2006.229.04:24:04.54#ibcon#read 4, iclass 12, count 0 2006.229.04:24:04.54#ibcon#about to read 5, iclass 12, count 0 2006.229.04:24:04.54#ibcon#read 5, iclass 12, count 0 2006.229.04:24:04.54#ibcon#about to read 6, iclass 12, count 0 2006.229.04:24:04.54#ibcon#read 6, iclass 12, count 0 2006.229.04:24:04.54#ibcon#end of sib2, iclass 12, count 0 2006.229.04:24:04.54#ibcon#*after write, iclass 12, count 0 2006.229.04:24:04.54#ibcon#*before return 0, iclass 12, count 0 2006.229.04:24:04.54#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:04.54#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:24:04.54#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:24:04.54#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:24:04.54$vck44/vblo=3,649.99 2006.229.04:24:04.54#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:24:04.54#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:24:04.54#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:04.54#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:04.54#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:04.54#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:04.54#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:24:04.54#ibcon#first serial, iclass 14, count 0 2006.229.04:24:04.54#ibcon#enter sib2, iclass 14, count 0 2006.229.04:24:04.54#ibcon#flushed, iclass 14, count 0 2006.229.04:24:04.54#ibcon#about to write, iclass 14, count 0 2006.229.04:24:04.54#ibcon#wrote, iclass 14, count 0 2006.229.04:24:04.54#ibcon#about to read 3, iclass 14, count 0 2006.229.04:24:04.56#ibcon#read 3, iclass 14, count 0 2006.229.04:24:04.56#ibcon#about to read 4, iclass 14, count 0 2006.229.04:24:04.56#ibcon#read 4, iclass 14, count 0 2006.229.04:24:04.56#ibcon#about to read 5, iclass 14, count 0 2006.229.04:24:04.56#ibcon#read 5, iclass 14, count 0 2006.229.04:24:04.56#ibcon#about to read 6, iclass 14, count 0 2006.229.04:24:04.56#ibcon#read 6, iclass 14, count 0 2006.229.04:24:04.56#ibcon#end of sib2, iclass 14, count 0 2006.229.04:24:04.56#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:24:04.56#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:24:04.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:24:04.56#ibcon#*before write, iclass 14, count 0 2006.229.04:24:04.56#ibcon#enter sib2, iclass 14, count 0 2006.229.04:24:04.56#ibcon#flushed, iclass 14, count 0 2006.229.04:24:04.56#ibcon#about to write, iclass 14, count 0 2006.229.04:24:04.56#ibcon#wrote, iclass 14, count 0 2006.229.04:24:04.56#ibcon#about to read 3, iclass 14, count 0 2006.229.04:24:04.60#ibcon#read 3, iclass 14, count 0 2006.229.04:24:04.60#ibcon#about to read 4, iclass 14, count 0 2006.229.04:24:04.60#ibcon#read 4, iclass 14, count 0 2006.229.04:24:04.60#ibcon#about to read 5, iclass 14, count 0 2006.229.04:24:04.60#ibcon#read 5, iclass 14, count 0 2006.229.04:24:04.60#ibcon#about to read 6, iclass 14, count 0 2006.229.04:24:04.60#ibcon#read 6, iclass 14, count 0 2006.229.04:24:04.60#ibcon#end of sib2, iclass 14, count 0 2006.229.04:24:04.60#ibcon#*after write, iclass 14, count 0 2006.229.04:24:04.60#ibcon#*before return 0, iclass 14, count 0 2006.229.04:24:04.60#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:04.60#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:24:04.60#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:24:04.60#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:24:04.60$vck44/vb=3,4 2006.229.04:24:04.60#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.04:24:04.60#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.04:24:04.60#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:04.60#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:04.66#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:04.66#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:04.66#ibcon#enter wrdev, iclass 16, count 2 2006.229.04:24:04.66#ibcon#first serial, iclass 16, count 2 2006.229.04:24:04.66#ibcon#enter sib2, iclass 16, count 2 2006.229.04:24:04.66#ibcon#flushed, iclass 16, count 2 2006.229.04:24:04.66#ibcon#about to write, iclass 16, count 2 2006.229.04:24:04.66#ibcon#wrote, iclass 16, count 2 2006.229.04:24:04.66#ibcon#about to read 3, iclass 16, count 2 2006.229.04:24:04.68#ibcon#read 3, iclass 16, count 2 2006.229.04:24:04.68#ibcon#about to read 4, iclass 16, count 2 2006.229.04:24:04.68#ibcon#read 4, iclass 16, count 2 2006.229.04:24:04.68#ibcon#about to read 5, iclass 16, count 2 2006.229.04:24:04.68#ibcon#read 5, iclass 16, count 2 2006.229.04:24:04.68#ibcon#about to read 6, iclass 16, count 2 2006.229.04:24:04.68#ibcon#read 6, iclass 16, count 2 2006.229.04:24:04.68#ibcon#end of sib2, iclass 16, count 2 2006.229.04:24:04.68#ibcon#*mode == 0, iclass 16, count 2 2006.229.04:24:04.68#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.04:24:04.68#ibcon#[27=AT03-04\r\n] 2006.229.04:24:04.68#ibcon#*before write, iclass 16, count 2 2006.229.04:24:04.68#ibcon#enter sib2, iclass 16, count 2 2006.229.04:24:04.68#ibcon#flushed, iclass 16, count 2 2006.229.04:24:04.68#ibcon#about to write, iclass 16, count 2 2006.229.04:24:04.68#ibcon#wrote, iclass 16, count 2 2006.229.04:24:04.68#ibcon#about to read 3, iclass 16, count 2 2006.229.04:24:04.71#ibcon#read 3, iclass 16, count 2 2006.229.04:24:04.71#ibcon#about to read 4, iclass 16, count 2 2006.229.04:24:04.71#ibcon#read 4, iclass 16, count 2 2006.229.04:24:04.71#ibcon#about to read 5, iclass 16, count 2 2006.229.04:24:04.71#ibcon#read 5, iclass 16, count 2 2006.229.04:24:04.71#ibcon#about to read 6, iclass 16, count 2 2006.229.04:24:04.71#ibcon#read 6, iclass 16, count 2 2006.229.04:24:04.71#ibcon#end of sib2, iclass 16, count 2 2006.229.04:24:04.71#ibcon#*after write, iclass 16, count 2 2006.229.04:24:04.71#ibcon#*before return 0, iclass 16, count 2 2006.229.04:24:04.71#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:04.71#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:24:04.71#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.04:24:04.71#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:04.71#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:04.83#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:04.83#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:04.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:24:04.83#ibcon#first serial, iclass 16, count 0 2006.229.04:24:04.83#ibcon#enter sib2, iclass 16, count 0 2006.229.04:24:04.83#ibcon#flushed, iclass 16, count 0 2006.229.04:24:04.83#ibcon#about to write, iclass 16, count 0 2006.229.04:24:04.83#ibcon#wrote, iclass 16, count 0 2006.229.04:24:04.83#ibcon#about to read 3, iclass 16, count 0 2006.229.04:24:04.85#ibcon#read 3, iclass 16, count 0 2006.229.04:24:04.85#ibcon#about to read 4, iclass 16, count 0 2006.229.04:24:04.85#ibcon#read 4, iclass 16, count 0 2006.229.04:24:04.85#ibcon#about to read 5, iclass 16, count 0 2006.229.04:24:04.85#ibcon#read 5, iclass 16, count 0 2006.229.04:24:04.85#ibcon#about to read 6, iclass 16, count 0 2006.229.04:24:04.85#ibcon#read 6, iclass 16, count 0 2006.229.04:24:04.85#ibcon#end of sib2, iclass 16, count 0 2006.229.04:24:04.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:24:04.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:24:04.85#ibcon#[27=USB\r\n] 2006.229.04:24:04.85#ibcon#*before write, iclass 16, count 0 2006.229.04:24:04.85#ibcon#enter sib2, iclass 16, count 0 2006.229.04:24:04.85#ibcon#flushed, iclass 16, count 0 2006.229.04:24:04.85#ibcon#about to write, iclass 16, count 0 2006.229.04:24:04.85#ibcon#wrote, iclass 16, count 0 2006.229.04:24:04.85#ibcon#about to read 3, iclass 16, count 0 2006.229.04:24:04.88#ibcon#read 3, iclass 16, count 0 2006.229.04:24:04.88#ibcon#about to read 4, iclass 16, count 0 2006.229.04:24:04.88#ibcon#read 4, iclass 16, count 0 2006.229.04:24:04.88#ibcon#about to read 5, iclass 16, count 0 2006.229.04:24:04.88#ibcon#read 5, iclass 16, count 0 2006.229.04:24:04.88#ibcon#about to read 6, iclass 16, count 0 2006.229.04:24:04.88#ibcon#read 6, iclass 16, count 0 2006.229.04:24:04.88#ibcon#end of sib2, iclass 16, count 0 2006.229.04:24:04.88#ibcon#*after write, iclass 16, count 0 2006.229.04:24:04.88#ibcon#*before return 0, iclass 16, count 0 2006.229.04:24:04.88#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:04.88#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:24:04.88#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:24:04.88#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:24:04.88$vck44/vblo=4,679.99 2006.229.04:24:04.88#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.04:24:04.88#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.04:24:04.88#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:04.88#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:04.88#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:04.88#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:04.88#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:24:04.88#ibcon#first serial, iclass 18, count 0 2006.229.04:24:04.88#ibcon#enter sib2, iclass 18, count 0 2006.229.04:24:04.88#ibcon#flushed, iclass 18, count 0 2006.229.04:24:04.88#ibcon#about to write, iclass 18, count 0 2006.229.04:24:04.88#ibcon#wrote, iclass 18, count 0 2006.229.04:24:04.88#ibcon#about to read 3, iclass 18, count 0 2006.229.04:24:04.90#ibcon#read 3, iclass 18, count 0 2006.229.04:24:04.90#ibcon#about to read 4, iclass 18, count 0 2006.229.04:24:04.90#ibcon#read 4, iclass 18, count 0 2006.229.04:24:04.90#ibcon#about to read 5, iclass 18, count 0 2006.229.04:24:04.90#ibcon#read 5, iclass 18, count 0 2006.229.04:24:04.90#ibcon#about to read 6, iclass 18, count 0 2006.229.04:24:04.90#ibcon#read 6, iclass 18, count 0 2006.229.04:24:04.90#ibcon#end of sib2, iclass 18, count 0 2006.229.04:24:04.90#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:24:04.90#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:24:04.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:24:04.90#ibcon#*before write, iclass 18, count 0 2006.229.04:24:04.90#ibcon#enter sib2, iclass 18, count 0 2006.229.04:24:04.90#ibcon#flushed, iclass 18, count 0 2006.229.04:24:04.90#ibcon#about to write, iclass 18, count 0 2006.229.04:24:04.90#ibcon#wrote, iclass 18, count 0 2006.229.04:24:04.90#ibcon#about to read 3, iclass 18, count 0 2006.229.04:24:04.94#ibcon#read 3, iclass 18, count 0 2006.229.04:24:04.94#ibcon#about to read 4, iclass 18, count 0 2006.229.04:24:04.94#ibcon#read 4, iclass 18, count 0 2006.229.04:24:04.94#ibcon#about to read 5, iclass 18, count 0 2006.229.04:24:04.94#ibcon#read 5, iclass 18, count 0 2006.229.04:24:04.94#ibcon#about to read 6, iclass 18, count 0 2006.229.04:24:04.94#ibcon#read 6, iclass 18, count 0 2006.229.04:24:04.94#ibcon#end of sib2, iclass 18, count 0 2006.229.04:24:04.94#ibcon#*after write, iclass 18, count 0 2006.229.04:24:04.94#ibcon#*before return 0, iclass 18, count 0 2006.229.04:24:04.94#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:04.94#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:24:04.94#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:24:04.94#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:24:04.94$vck44/vb=4,4 2006.229.04:24:04.94#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.04:24:04.94#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.04:24:04.94#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:04.94#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:05.00#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:05.00#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:05.00#ibcon#enter wrdev, iclass 20, count 2 2006.229.04:24:05.00#ibcon#first serial, iclass 20, count 2 2006.229.04:24:05.00#ibcon#enter sib2, iclass 20, count 2 2006.229.04:24:05.00#ibcon#flushed, iclass 20, count 2 2006.229.04:24:05.00#ibcon#about to write, iclass 20, count 2 2006.229.04:24:05.00#ibcon#wrote, iclass 20, count 2 2006.229.04:24:05.00#ibcon#about to read 3, iclass 20, count 2 2006.229.04:24:05.02#ibcon#read 3, iclass 20, count 2 2006.229.04:24:05.02#ibcon#about to read 4, iclass 20, count 2 2006.229.04:24:05.02#ibcon#read 4, iclass 20, count 2 2006.229.04:24:05.02#ibcon#about to read 5, iclass 20, count 2 2006.229.04:24:05.02#ibcon#read 5, iclass 20, count 2 2006.229.04:24:05.02#ibcon#about to read 6, iclass 20, count 2 2006.229.04:24:05.02#ibcon#read 6, iclass 20, count 2 2006.229.04:24:05.02#ibcon#end of sib2, iclass 20, count 2 2006.229.04:24:05.02#ibcon#*mode == 0, iclass 20, count 2 2006.229.04:24:05.02#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.04:24:05.02#ibcon#[27=AT04-04\r\n] 2006.229.04:24:05.02#ibcon#*before write, iclass 20, count 2 2006.229.04:24:05.02#ibcon#enter sib2, iclass 20, count 2 2006.229.04:24:05.02#ibcon#flushed, iclass 20, count 2 2006.229.04:24:05.02#ibcon#about to write, iclass 20, count 2 2006.229.04:24:05.02#ibcon#wrote, iclass 20, count 2 2006.229.04:24:05.02#ibcon#about to read 3, iclass 20, count 2 2006.229.04:24:05.05#ibcon#read 3, iclass 20, count 2 2006.229.04:24:05.05#ibcon#about to read 4, iclass 20, count 2 2006.229.04:24:05.05#ibcon#read 4, iclass 20, count 2 2006.229.04:24:05.05#ibcon#about to read 5, iclass 20, count 2 2006.229.04:24:05.05#ibcon#read 5, iclass 20, count 2 2006.229.04:24:05.05#ibcon#about to read 6, iclass 20, count 2 2006.229.04:24:05.05#ibcon#read 6, iclass 20, count 2 2006.229.04:24:05.05#ibcon#end of sib2, iclass 20, count 2 2006.229.04:24:05.05#ibcon#*after write, iclass 20, count 2 2006.229.04:24:05.05#ibcon#*before return 0, iclass 20, count 2 2006.229.04:24:05.05#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:05.05#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:24:05.05#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.04:24:05.05#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:05.05#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:05.17#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:05.17#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:05.17#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:24:05.17#ibcon#first serial, iclass 20, count 0 2006.229.04:24:05.17#ibcon#enter sib2, iclass 20, count 0 2006.229.04:24:05.17#ibcon#flushed, iclass 20, count 0 2006.229.04:24:05.17#ibcon#about to write, iclass 20, count 0 2006.229.04:24:05.17#ibcon#wrote, iclass 20, count 0 2006.229.04:24:05.17#ibcon#about to read 3, iclass 20, count 0 2006.229.04:24:05.19#ibcon#read 3, iclass 20, count 0 2006.229.04:24:05.19#ibcon#about to read 4, iclass 20, count 0 2006.229.04:24:05.19#ibcon#read 4, iclass 20, count 0 2006.229.04:24:05.19#ibcon#about to read 5, iclass 20, count 0 2006.229.04:24:05.19#ibcon#read 5, iclass 20, count 0 2006.229.04:24:05.19#ibcon#about to read 6, iclass 20, count 0 2006.229.04:24:05.19#ibcon#read 6, iclass 20, count 0 2006.229.04:24:05.19#ibcon#end of sib2, iclass 20, count 0 2006.229.04:24:05.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:24:05.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:24:05.19#ibcon#[27=USB\r\n] 2006.229.04:24:05.19#ibcon#*before write, iclass 20, count 0 2006.229.04:24:05.19#ibcon#enter sib2, iclass 20, count 0 2006.229.04:24:05.19#ibcon#flushed, iclass 20, count 0 2006.229.04:24:05.19#ibcon#about to write, iclass 20, count 0 2006.229.04:24:05.19#ibcon#wrote, iclass 20, count 0 2006.229.04:24:05.19#ibcon#about to read 3, iclass 20, count 0 2006.229.04:24:05.22#ibcon#read 3, iclass 20, count 0 2006.229.04:24:05.22#ibcon#about to read 4, iclass 20, count 0 2006.229.04:24:05.22#ibcon#read 4, iclass 20, count 0 2006.229.04:24:05.22#ibcon#about to read 5, iclass 20, count 0 2006.229.04:24:05.22#ibcon#read 5, iclass 20, count 0 2006.229.04:24:05.22#ibcon#about to read 6, iclass 20, count 0 2006.229.04:24:05.22#ibcon#read 6, iclass 20, count 0 2006.229.04:24:05.22#ibcon#end of sib2, iclass 20, count 0 2006.229.04:24:05.22#ibcon#*after write, iclass 20, count 0 2006.229.04:24:05.22#ibcon#*before return 0, iclass 20, count 0 2006.229.04:24:05.22#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:05.22#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:24:05.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:24:05.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:24:05.22$vck44/vblo=5,709.99 2006.229.04:24:05.22#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.04:24:05.22#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.04:24:05.22#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:05.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:05.22#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:05.22#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:05.22#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:24:05.22#ibcon#first serial, iclass 22, count 0 2006.229.04:24:05.22#ibcon#enter sib2, iclass 22, count 0 2006.229.04:24:05.22#ibcon#flushed, iclass 22, count 0 2006.229.04:24:05.22#ibcon#about to write, iclass 22, count 0 2006.229.04:24:05.22#ibcon#wrote, iclass 22, count 0 2006.229.04:24:05.22#ibcon#about to read 3, iclass 22, count 0 2006.229.04:24:05.24#ibcon#read 3, iclass 22, count 0 2006.229.04:24:05.24#ibcon#about to read 4, iclass 22, count 0 2006.229.04:24:05.24#ibcon#read 4, iclass 22, count 0 2006.229.04:24:05.24#ibcon#about to read 5, iclass 22, count 0 2006.229.04:24:05.24#ibcon#read 5, iclass 22, count 0 2006.229.04:24:05.24#ibcon#about to read 6, iclass 22, count 0 2006.229.04:24:05.24#ibcon#read 6, iclass 22, count 0 2006.229.04:24:05.24#ibcon#end of sib2, iclass 22, count 0 2006.229.04:24:05.24#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:24:05.24#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:24:05.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:24:05.24#ibcon#*before write, iclass 22, count 0 2006.229.04:24:05.24#ibcon#enter sib2, iclass 22, count 0 2006.229.04:24:05.24#ibcon#flushed, iclass 22, count 0 2006.229.04:24:05.24#ibcon#about to write, iclass 22, count 0 2006.229.04:24:05.24#ibcon#wrote, iclass 22, count 0 2006.229.04:24:05.24#ibcon#about to read 3, iclass 22, count 0 2006.229.04:24:05.28#ibcon#read 3, iclass 22, count 0 2006.229.04:24:05.28#ibcon#about to read 4, iclass 22, count 0 2006.229.04:24:05.28#ibcon#read 4, iclass 22, count 0 2006.229.04:24:05.28#ibcon#about to read 5, iclass 22, count 0 2006.229.04:24:05.28#ibcon#read 5, iclass 22, count 0 2006.229.04:24:05.28#ibcon#about to read 6, iclass 22, count 0 2006.229.04:24:05.28#ibcon#read 6, iclass 22, count 0 2006.229.04:24:05.28#ibcon#end of sib2, iclass 22, count 0 2006.229.04:24:05.28#ibcon#*after write, iclass 22, count 0 2006.229.04:24:05.28#ibcon#*before return 0, iclass 22, count 0 2006.229.04:24:05.28#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:05.28#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:24:05.28#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:24:05.28#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:24:05.28$vck44/vb=5,4 2006.229.04:24:05.28#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:24:05.28#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:24:05.28#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:05.28#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:05.34#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:05.34#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:05.34#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:24:05.34#ibcon#first serial, iclass 24, count 2 2006.229.04:24:05.34#ibcon#enter sib2, iclass 24, count 2 2006.229.04:24:05.34#ibcon#flushed, iclass 24, count 2 2006.229.04:24:05.34#ibcon#about to write, iclass 24, count 2 2006.229.04:24:05.34#ibcon#wrote, iclass 24, count 2 2006.229.04:24:05.34#ibcon#about to read 3, iclass 24, count 2 2006.229.04:24:05.36#ibcon#read 3, iclass 24, count 2 2006.229.04:24:05.36#ibcon#about to read 4, iclass 24, count 2 2006.229.04:24:05.36#ibcon#read 4, iclass 24, count 2 2006.229.04:24:05.36#ibcon#about to read 5, iclass 24, count 2 2006.229.04:24:05.36#ibcon#read 5, iclass 24, count 2 2006.229.04:24:05.36#ibcon#about to read 6, iclass 24, count 2 2006.229.04:24:05.36#ibcon#read 6, iclass 24, count 2 2006.229.04:24:05.36#ibcon#end of sib2, iclass 24, count 2 2006.229.04:24:05.36#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:24:05.36#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:24:05.36#ibcon#[27=AT05-04\r\n] 2006.229.04:24:05.36#ibcon#*before write, iclass 24, count 2 2006.229.04:24:05.36#ibcon#enter sib2, iclass 24, count 2 2006.229.04:24:05.36#ibcon#flushed, iclass 24, count 2 2006.229.04:24:05.36#ibcon#about to write, iclass 24, count 2 2006.229.04:24:05.36#ibcon#wrote, iclass 24, count 2 2006.229.04:24:05.36#ibcon#about to read 3, iclass 24, count 2 2006.229.04:24:05.39#ibcon#read 3, iclass 24, count 2 2006.229.04:24:05.39#ibcon#about to read 4, iclass 24, count 2 2006.229.04:24:05.39#ibcon#read 4, iclass 24, count 2 2006.229.04:24:05.39#ibcon#about to read 5, iclass 24, count 2 2006.229.04:24:05.39#ibcon#read 5, iclass 24, count 2 2006.229.04:24:05.39#ibcon#about to read 6, iclass 24, count 2 2006.229.04:24:05.39#ibcon#read 6, iclass 24, count 2 2006.229.04:24:05.39#ibcon#end of sib2, iclass 24, count 2 2006.229.04:24:05.39#ibcon#*after write, iclass 24, count 2 2006.229.04:24:05.39#ibcon#*before return 0, iclass 24, count 2 2006.229.04:24:05.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:05.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:24:05.39#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:24:05.39#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:05.39#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:05.51#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:05.51#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:05.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:24:05.51#ibcon#first serial, iclass 24, count 0 2006.229.04:24:05.51#ibcon#enter sib2, iclass 24, count 0 2006.229.04:24:05.51#ibcon#flushed, iclass 24, count 0 2006.229.04:24:05.51#ibcon#about to write, iclass 24, count 0 2006.229.04:24:05.51#ibcon#wrote, iclass 24, count 0 2006.229.04:24:05.51#ibcon#about to read 3, iclass 24, count 0 2006.229.04:24:05.53#ibcon#read 3, iclass 24, count 0 2006.229.04:24:05.53#ibcon#about to read 4, iclass 24, count 0 2006.229.04:24:05.53#ibcon#read 4, iclass 24, count 0 2006.229.04:24:05.53#ibcon#about to read 5, iclass 24, count 0 2006.229.04:24:05.53#ibcon#read 5, iclass 24, count 0 2006.229.04:24:05.53#ibcon#about to read 6, iclass 24, count 0 2006.229.04:24:05.53#ibcon#read 6, iclass 24, count 0 2006.229.04:24:05.53#ibcon#end of sib2, iclass 24, count 0 2006.229.04:24:05.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:24:05.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:24:05.53#ibcon#[27=USB\r\n] 2006.229.04:24:05.53#ibcon#*before write, iclass 24, count 0 2006.229.04:24:05.53#ibcon#enter sib2, iclass 24, count 0 2006.229.04:24:05.53#ibcon#flushed, iclass 24, count 0 2006.229.04:24:05.53#ibcon#about to write, iclass 24, count 0 2006.229.04:24:05.53#ibcon#wrote, iclass 24, count 0 2006.229.04:24:05.53#ibcon#about to read 3, iclass 24, count 0 2006.229.04:24:05.56#ibcon#read 3, iclass 24, count 0 2006.229.04:24:05.56#ibcon#about to read 4, iclass 24, count 0 2006.229.04:24:05.56#ibcon#read 4, iclass 24, count 0 2006.229.04:24:05.56#ibcon#about to read 5, iclass 24, count 0 2006.229.04:24:05.56#ibcon#read 5, iclass 24, count 0 2006.229.04:24:05.56#ibcon#about to read 6, iclass 24, count 0 2006.229.04:24:05.56#ibcon#read 6, iclass 24, count 0 2006.229.04:24:05.56#ibcon#end of sib2, iclass 24, count 0 2006.229.04:24:05.56#ibcon#*after write, iclass 24, count 0 2006.229.04:24:05.56#ibcon#*before return 0, iclass 24, count 0 2006.229.04:24:05.56#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:05.56#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:24:05.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:24:05.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:24:05.56$vck44/vblo=6,719.99 2006.229.04:24:05.56#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.04:24:05.56#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.04:24:05.56#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:05.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:05.56#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:05.56#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:05.56#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:24:05.56#ibcon#first serial, iclass 26, count 0 2006.229.04:24:05.56#ibcon#enter sib2, iclass 26, count 0 2006.229.04:24:05.56#ibcon#flushed, iclass 26, count 0 2006.229.04:24:05.56#ibcon#about to write, iclass 26, count 0 2006.229.04:24:05.56#ibcon#wrote, iclass 26, count 0 2006.229.04:24:05.56#ibcon#about to read 3, iclass 26, count 0 2006.229.04:24:05.58#ibcon#read 3, iclass 26, count 0 2006.229.04:24:05.58#ibcon#about to read 4, iclass 26, count 0 2006.229.04:24:05.58#ibcon#read 4, iclass 26, count 0 2006.229.04:24:05.58#ibcon#about to read 5, iclass 26, count 0 2006.229.04:24:05.58#ibcon#read 5, iclass 26, count 0 2006.229.04:24:05.58#ibcon#about to read 6, iclass 26, count 0 2006.229.04:24:05.58#ibcon#read 6, iclass 26, count 0 2006.229.04:24:05.58#ibcon#end of sib2, iclass 26, count 0 2006.229.04:24:05.58#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:24:05.58#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:24:05.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:24:05.58#ibcon#*before write, iclass 26, count 0 2006.229.04:24:05.58#ibcon#enter sib2, iclass 26, count 0 2006.229.04:24:05.58#ibcon#flushed, iclass 26, count 0 2006.229.04:24:05.58#ibcon#about to write, iclass 26, count 0 2006.229.04:24:05.58#ibcon#wrote, iclass 26, count 0 2006.229.04:24:05.58#ibcon#about to read 3, iclass 26, count 0 2006.229.04:24:05.62#ibcon#read 3, iclass 26, count 0 2006.229.04:24:05.62#ibcon#about to read 4, iclass 26, count 0 2006.229.04:24:05.62#ibcon#read 4, iclass 26, count 0 2006.229.04:24:05.62#ibcon#about to read 5, iclass 26, count 0 2006.229.04:24:05.62#ibcon#read 5, iclass 26, count 0 2006.229.04:24:05.62#ibcon#about to read 6, iclass 26, count 0 2006.229.04:24:05.62#ibcon#read 6, iclass 26, count 0 2006.229.04:24:05.62#ibcon#end of sib2, iclass 26, count 0 2006.229.04:24:05.62#ibcon#*after write, iclass 26, count 0 2006.229.04:24:05.62#ibcon#*before return 0, iclass 26, count 0 2006.229.04:24:05.62#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:05.62#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:24:05.62#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:24:05.62#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:24:05.62$vck44/vb=6,4 2006.229.04:24:05.62#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.04:24:05.62#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.04:24:05.62#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:05.62#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:05.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:05.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:05.68#ibcon#enter wrdev, iclass 28, count 2 2006.229.04:24:05.68#ibcon#first serial, iclass 28, count 2 2006.229.04:24:05.68#ibcon#enter sib2, iclass 28, count 2 2006.229.04:24:05.68#ibcon#flushed, iclass 28, count 2 2006.229.04:24:05.68#ibcon#about to write, iclass 28, count 2 2006.229.04:24:05.68#ibcon#wrote, iclass 28, count 2 2006.229.04:24:05.68#ibcon#about to read 3, iclass 28, count 2 2006.229.04:24:05.70#ibcon#read 3, iclass 28, count 2 2006.229.04:24:05.70#ibcon#about to read 4, iclass 28, count 2 2006.229.04:24:05.70#ibcon#read 4, iclass 28, count 2 2006.229.04:24:05.70#ibcon#about to read 5, iclass 28, count 2 2006.229.04:24:05.70#ibcon#read 5, iclass 28, count 2 2006.229.04:24:05.70#ibcon#about to read 6, iclass 28, count 2 2006.229.04:24:05.70#ibcon#read 6, iclass 28, count 2 2006.229.04:24:05.70#ibcon#end of sib2, iclass 28, count 2 2006.229.04:24:05.70#ibcon#*mode == 0, iclass 28, count 2 2006.229.04:24:05.70#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.04:24:05.70#ibcon#[27=AT06-04\r\n] 2006.229.04:24:05.70#ibcon#*before write, iclass 28, count 2 2006.229.04:24:05.70#ibcon#enter sib2, iclass 28, count 2 2006.229.04:24:05.70#ibcon#flushed, iclass 28, count 2 2006.229.04:24:05.70#ibcon#about to write, iclass 28, count 2 2006.229.04:24:05.70#ibcon#wrote, iclass 28, count 2 2006.229.04:24:05.70#ibcon#about to read 3, iclass 28, count 2 2006.229.04:24:05.73#ibcon#read 3, iclass 28, count 2 2006.229.04:24:05.73#ibcon#about to read 4, iclass 28, count 2 2006.229.04:24:05.73#ibcon#read 4, iclass 28, count 2 2006.229.04:24:05.73#ibcon#about to read 5, iclass 28, count 2 2006.229.04:24:05.73#ibcon#read 5, iclass 28, count 2 2006.229.04:24:05.73#ibcon#about to read 6, iclass 28, count 2 2006.229.04:24:05.73#ibcon#read 6, iclass 28, count 2 2006.229.04:24:05.73#ibcon#end of sib2, iclass 28, count 2 2006.229.04:24:05.73#ibcon#*after write, iclass 28, count 2 2006.229.04:24:05.73#ibcon#*before return 0, iclass 28, count 2 2006.229.04:24:05.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:05.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:24:05.73#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.04:24:05.73#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:05.73#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:05.85#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:05.85#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:05.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:24:05.85#ibcon#first serial, iclass 28, count 0 2006.229.04:24:05.85#ibcon#enter sib2, iclass 28, count 0 2006.229.04:24:05.85#ibcon#flushed, iclass 28, count 0 2006.229.04:24:05.85#ibcon#about to write, iclass 28, count 0 2006.229.04:24:05.85#ibcon#wrote, iclass 28, count 0 2006.229.04:24:05.85#ibcon#about to read 3, iclass 28, count 0 2006.229.04:24:05.87#ibcon#read 3, iclass 28, count 0 2006.229.04:24:05.87#ibcon#about to read 4, iclass 28, count 0 2006.229.04:24:05.87#ibcon#read 4, iclass 28, count 0 2006.229.04:24:05.87#ibcon#about to read 5, iclass 28, count 0 2006.229.04:24:05.87#ibcon#read 5, iclass 28, count 0 2006.229.04:24:05.87#ibcon#about to read 6, iclass 28, count 0 2006.229.04:24:05.87#ibcon#read 6, iclass 28, count 0 2006.229.04:24:05.87#ibcon#end of sib2, iclass 28, count 0 2006.229.04:24:05.87#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:24:05.87#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:24:05.87#ibcon#[27=USB\r\n] 2006.229.04:24:05.87#ibcon#*before write, iclass 28, count 0 2006.229.04:24:05.87#ibcon#enter sib2, iclass 28, count 0 2006.229.04:24:05.87#ibcon#flushed, iclass 28, count 0 2006.229.04:24:05.87#ibcon#about to write, iclass 28, count 0 2006.229.04:24:05.87#ibcon#wrote, iclass 28, count 0 2006.229.04:24:05.87#ibcon#about to read 3, iclass 28, count 0 2006.229.04:24:05.90#ibcon#read 3, iclass 28, count 0 2006.229.04:24:05.90#ibcon#about to read 4, iclass 28, count 0 2006.229.04:24:05.90#ibcon#read 4, iclass 28, count 0 2006.229.04:24:05.90#ibcon#about to read 5, iclass 28, count 0 2006.229.04:24:05.90#ibcon#read 5, iclass 28, count 0 2006.229.04:24:05.90#ibcon#about to read 6, iclass 28, count 0 2006.229.04:24:05.90#ibcon#read 6, iclass 28, count 0 2006.229.04:24:05.90#ibcon#end of sib2, iclass 28, count 0 2006.229.04:24:05.90#ibcon#*after write, iclass 28, count 0 2006.229.04:24:05.90#ibcon#*before return 0, iclass 28, count 0 2006.229.04:24:05.90#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:05.90#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:24:05.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:24:05.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:24:05.90$vck44/vblo=7,734.99 2006.229.04:24:05.90#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.04:24:05.90#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.04:24:05.90#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:05.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:05.90#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:05.90#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:05.90#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:24:05.90#ibcon#first serial, iclass 30, count 0 2006.229.04:24:05.90#ibcon#enter sib2, iclass 30, count 0 2006.229.04:24:05.90#ibcon#flushed, iclass 30, count 0 2006.229.04:24:05.90#ibcon#about to write, iclass 30, count 0 2006.229.04:24:05.90#ibcon#wrote, iclass 30, count 0 2006.229.04:24:05.90#ibcon#about to read 3, iclass 30, count 0 2006.229.04:24:05.92#ibcon#read 3, iclass 30, count 0 2006.229.04:24:05.92#ibcon#about to read 4, iclass 30, count 0 2006.229.04:24:05.92#ibcon#read 4, iclass 30, count 0 2006.229.04:24:05.92#ibcon#about to read 5, iclass 30, count 0 2006.229.04:24:05.92#ibcon#read 5, iclass 30, count 0 2006.229.04:24:05.92#ibcon#about to read 6, iclass 30, count 0 2006.229.04:24:05.92#ibcon#read 6, iclass 30, count 0 2006.229.04:24:05.92#ibcon#end of sib2, iclass 30, count 0 2006.229.04:24:05.92#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:24:05.92#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:24:05.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:24:05.92#ibcon#*before write, iclass 30, count 0 2006.229.04:24:05.92#ibcon#enter sib2, iclass 30, count 0 2006.229.04:24:05.92#ibcon#flushed, iclass 30, count 0 2006.229.04:24:05.92#ibcon#about to write, iclass 30, count 0 2006.229.04:24:05.92#ibcon#wrote, iclass 30, count 0 2006.229.04:24:05.92#ibcon#about to read 3, iclass 30, count 0 2006.229.04:24:05.96#ibcon#read 3, iclass 30, count 0 2006.229.04:24:05.96#ibcon#about to read 4, iclass 30, count 0 2006.229.04:24:05.96#ibcon#read 4, iclass 30, count 0 2006.229.04:24:05.96#ibcon#about to read 5, iclass 30, count 0 2006.229.04:24:05.96#ibcon#read 5, iclass 30, count 0 2006.229.04:24:05.96#ibcon#about to read 6, iclass 30, count 0 2006.229.04:24:05.96#ibcon#read 6, iclass 30, count 0 2006.229.04:24:05.96#ibcon#end of sib2, iclass 30, count 0 2006.229.04:24:05.96#ibcon#*after write, iclass 30, count 0 2006.229.04:24:05.96#ibcon#*before return 0, iclass 30, count 0 2006.229.04:24:05.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:05.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:24:05.96#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:24:05.96#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:24:05.96$vck44/vb=7,4 2006.229.04:24:05.96#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:24:05.96#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:24:05.96#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:05.96#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:06.02#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:06.02#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:06.02#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:24:06.02#ibcon#first serial, iclass 32, count 2 2006.229.04:24:06.02#ibcon#enter sib2, iclass 32, count 2 2006.229.04:24:06.02#ibcon#flushed, iclass 32, count 2 2006.229.04:24:06.02#ibcon#about to write, iclass 32, count 2 2006.229.04:24:06.02#ibcon#wrote, iclass 32, count 2 2006.229.04:24:06.02#ibcon#about to read 3, iclass 32, count 2 2006.229.04:24:06.04#ibcon#read 3, iclass 32, count 2 2006.229.04:24:06.04#ibcon#about to read 4, iclass 32, count 2 2006.229.04:24:06.04#ibcon#read 4, iclass 32, count 2 2006.229.04:24:06.04#ibcon#about to read 5, iclass 32, count 2 2006.229.04:24:06.04#ibcon#read 5, iclass 32, count 2 2006.229.04:24:06.04#ibcon#about to read 6, iclass 32, count 2 2006.229.04:24:06.04#ibcon#read 6, iclass 32, count 2 2006.229.04:24:06.04#ibcon#end of sib2, iclass 32, count 2 2006.229.04:24:06.04#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:24:06.04#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:24:06.04#ibcon#[27=AT07-04\r\n] 2006.229.04:24:06.04#ibcon#*before write, iclass 32, count 2 2006.229.04:24:06.04#ibcon#enter sib2, iclass 32, count 2 2006.229.04:24:06.04#ibcon#flushed, iclass 32, count 2 2006.229.04:24:06.04#ibcon#about to write, iclass 32, count 2 2006.229.04:24:06.04#ibcon#wrote, iclass 32, count 2 2006.229.04:24:06.04#ibcon#about to read 3, iclass 32, count 2 2006.229.04:24:06.07#ibcon#read 3, iclass 32, count 2 2006.229.04:24:06.07#ibcon#about to read 4, iclass 32, count 2 2006.229.04:24:06.07#ibcon#read 4, iclass 32, count 2 2006.229.04:24:06.07#ibcon#about to read 5, iclass 32, count 2 2006.229.04:24:06.07#ibcon#read 5, iclass 32, count 2 2006.229.04:24:06.07#ibcon#about to read 6, iclass 32, count 2 2006.229.04:24:06.07#ibcon#read 6, iclass 32, count 2 2006.229.04:24:06.07#ibcon#end of sib2, iclass 32, count 2 2006.229.04:24:06.07#ibcon#*after write, iclass 32, count 2 2006.229.04:24:06.07#ibcon#*before return 0, iclass 32, count 2 2006.229.04:24:06.07#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:06.07#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:24:06.07#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:24:06.07#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:06.07#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:06.19#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:06.19#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:06.19#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:24:06.19#ibcon#first serial, iclass 32, count 0 2006.229.04:24:06.19#ibcon#enter sib2, iclass 32, count 0 2006.229.04:24:06.19#ibcon#flushed, iclass 32, count 0 2006.229.04:24:06.19#ibcon#about to write, iclass 32, count 0 2006.229.04:24:06.19#ibcon#wrote, iclass 32, count 0 2006.229.04:24:06.19#ibcon#about to read 3, iclass 32, count 0 2006.229.04:24:06.21#ibcon#read 3, iclass 32, count 0 2006.229.04:24:06.21#ibcon#about to read 4, iclass 32, count 0 2006.229.04:24:06.21#ibcon#read 4, iclass 32, count 0 2006.229.04:24:06.21#ibcon#about to read 5, iclass 32, count 0 2006.229.04:24:06.21#ibcon#read 5, iclass 32, count 0 2006.229.04:24:06.21#ibcon#about to read 6, iclass 32, count 0 2006.229.04:24:06.21#ibcon#read 6, iclass 32, count 0 2006.229.04:24:06.21#ibcon#end of sib2, iclass 32, count 0 2006.229.04:24:06.21#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:24:06.21#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:24:06.21#ibcon#[27=USB\r\n] 2006.229.04:24:06.21#ibcon#*before write, iclass 32, count 0 2006.229.04:24:06.21#ibcon#enter sib2, iclass 32, count 0 2006.229.04:24:06.21#ibcon#flushed, iclass 32, count 0 2006.229.04:24:06.21#ibcon#about to write, iclass 32, count 0 2006.229.04:24:06.21#ibcon#wrote, iclass 32, count 0 2006.229.04:24:06.21#ibcon#about to read 3, iclass 32, count 0 2006.229.04:24:06.24#ibcon#read 3, iclass 32, count 0 2006.229.04:24:06.24#ibcon#about to read 4, iclass 32, count 0 2006.229.04:24:06.24#ibcon#read 4, iclass 32, count 0 2006.229.04:24:06.24#ibcon#about to read 5, iclass 32, count 0 2006.229.04:24:06.24#ibcon#read 5, iclass 32, count 0 2006.229.04:24:06.24#ibcon#about to read 6, iclass 32, count 0 2006.229.04:24:06.24#ibcon#read 6, iclass 32, count 0 2006.229.04:24:06.24#ibcon#end of sib2, iclass 32, count 0 2006.229.04:24:06.24#ibcon#*after write, iclass 32, count 0 2006.229.04:24:06.24#ibcon#*before return 0, iclass 32, count 0 2006.229.04:24:06.24#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:06.24#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:24:06.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:24:06.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:24:06.24$vck44/vblo=8,744.99 2006.229.04:24:06.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.04:24:06.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.04:24:06.24#ibcon#ireg 17 cls_cnt 0 2006.229.04:24:06.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:06.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:06.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:06.24#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:24:06.24#ibcon#first serial, iclass 34, count 0 2006.229.04:24:06.24#ibcon#enter sib2, iclass 34, count 0 2006.229.04:24:06.24#ibcon#flushed, iclass 34, count 0 2006.229.04:24:06.24#ibcon#about to write, iclass 34, count 0 2006.229.04:24:06.24#ibcon#wrote, iclass 34, count 0 2006.229.04:24:06.24#ibcon#about to read 3, iclass 34, count 0 2006.229.04:24:06.26#ibcon#read 3, iclass 34, count 0 2006.229.04:24:06.26#ibcon#about to read 4, iclass 34, count 0 2006.229.04:24:06.26#ibcon#read 4, iclass 34, count 0 2006.229.04:24:06.26#ibcon#about to read 5, iclass 34, count 0 2006.229.04:24:06.26#ibcon#read 5, iclass 34, count 0 2006.229.04:24:06.26#ibcon#about to read 6, iclass 34, count 0 2006.229.04:24:06.26#ibcon#read 6, iclass 34, count 0 2006.229.04:24:06.26#ibcon#end of sib2, iclass 34, count 0 2006.229.04:24:06.26#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:24:06.26#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:24:06.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:24:06.26#ibcon#*before write, iclass 34, count 0 2006.229.04:24:06.26#ibcon#enter sib2, iclass 34, count 0 2006.229.04:24:06.26#ibcon#flushed, iclass 34, count 0 2006.229.04:24:06.26#ibcon#about to write, iclass 34, count 0 2006.229.04:24:06.26#ibcon#wrote, iclass 34, count 0 2006.229.04:24:06.26#ibcon#about to read 3, iclass 34, count 0 2006.229.04:24:06.30#ibcon#read 3, iclass 34, count 0 2006.229.04:24:06.30#ibcon#about to read 4, iclass 34, count 0 2006.229.04:24:06.30#ibcon#read 4, iclass 34, count 0 2006.229.04:24:06.30#ibcon#about to read 5, iclass 34, count 0 2006.229.04:24:06.30#ibcon#read 5, iclass 34, count 0 2006.229.04:24:06.30#ibcon#about to read 6, iclass 34, count 0 2006.229.04:24:06.30#ibcon#read 6, iclass 34, count 0 2006.229.04:24:06.30#ibcon#end of sib2, iclass 34, count 0 2006.229.04:24:06.30#ibcon#*after write, iclass 34, count 0 2006.229.04:24:06.30#ibcon#*before return 0, iclass 34, count 0 2006.229.04:24:06.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:06.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:24:06.30#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:24:06.30#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:24:06.30$vck44/vb=8,4 2006.229.04:24:06.30#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.04:24:06.30#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.04:24:06.30#ibcon#ireg 11 cls_cnt 2 2006.229.04:24:06.30#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:06.36#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:06.36#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:06.36#ibcon#enter wrdev, iclass 36, count 2 2006.229.04:24:06.36#ibcon#first serial, iclass 36, count 2 2006.229.04:24:06.36#ibcon#enter sib2, iclass 36, count 2 2006.229.04:24:06.36#ibcon#flushed, iclass 36, count 2 2006.229.04:24:06.36#ibcon#about to write, iclass 36, count 2 2006.229.04:24:06.36#ibcon#wrote, iclass 36, count 2 2006.229.04:24:06.36#ibcon#about to read 3, iclass 36, count 2 2006.229.04:24:06.38#ibcon#read 3, iclass 36, count 2 2006.229.04:24:06.38#ibcon#about to read 4, iclass 36, count 2 2006.229.04:24:06.38#ibcon#read 4, iclass 36, count 2 2006.229.04:24:06.38#ibcon#about to read 5, iclass 36, count 2 2006.229.04:24:06.38#ibcon#read 5, iclass 36, count 2 2006.229.04:24:06.38#ibcon#about to read 6, iclass 36, count 2 2006.229.04:24:06.38#ibcon#read 6, iclass 36, count 2 2006.229.04:24:06.38#ibcon#end of sib2, iclass 36, count 2 2006.229.04:24:06.38#ibcon#*mode == 0, iclass 36, count 2 2006.229.04:24:06.38#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.04:24:06.38#ibcon#[27=AT08-04\r\n] 2006.229.04:24:06.38#ibcon#*before write, iclass 36, count 2 2006.229.04:24:06.38#ibcon#enter sib2, iclass 36, count 2 2006.229.04:24:06.38#ibcon#flushed, iclass 36, count 2 2006.229.04:24:06.38#ibcon#about to write, iclass 36, count 2 2006.229.04:24:06.38#ibcon#wrote, iclass 36, count 2 2006.229.04:24:06.38#ibcon#about to read 3, iclass 36, count 2 2006.229.04:24:06.41#ibcon#read 3, iclass 36, count 2 2006.229.04:24:06.41#ibcon#about to read 4, iclass 36, count 2 2006.229.04:24:06.41#ibcon#read 4, iclass 36, count 2 2006.229.04:24:06.41#ibcon#about to read 5, iclass 36, count 2 2006.229.04:24:06.41#ibcon#read 5, iclass 36, count 2 2006.229.04:24:06.41#ibcon#about to read 6, iclass 36, count 2 2006.229.04:24:06.41#ibcon#read 6, iclass 36, count 2 2006.229.04:24:06.41#ibcon#end of sib2, iclass 36, count 2 2006.229.04:24:06.41#ibcon#*after write, iclass 36, count 2 2006.229.04:24:06.41#ibcon#*before return 0, iclass 36, count 2 2006.229.04:24:06.41#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:06.41#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:24:06.41#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.04:24:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.04:24:06.41#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:06.53#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:06.53#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:06.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:24:06.53#ibcon#first serial, iclass 36, count 0 2006.229.04:24:06.53#ibcon#enter sib2, iclass 36, count 0 2006.229.04:24:06.53#ibcon#flushed, iclass 36, count 0 2006.229.04:24:06.53#ibcon#about to write, iclass 36, count 0 2006.229.04:24:06.53#ibcon#wrote, iclass 36, count 0 2006.229.04:24:06.53#ibcon#about to read 3, iclass 36, count 0 2006.229.04:24:06.55#ibcon#read 3, iclass 36, count 0 2006.229.04:24:06.55#ibcon#about to read 4, iclass 36, count 0 2006.229.04:24:06.55#ibcon#read 4, iclass 36, count 0 2006.229.04:24:06.55#ibcon#about to read 5, iclass 36, count 0 2006.229.04:24:06.55#ibcon#read 5, iclass 36, count 0 2006.229.04:24:06.55#ibcon#about to read 6, iclass 36, count 0 2006.229.04:24:06.55#ibcon#read 6, iclass 36, count 0 2006.229.04:24:06.55#ibcon#end of sib2, iclass 36, count 0 2006.229.04:24:06.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:24:06.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:24:06.55#ibcon#[27=USB\r\n] 2006.229.04:24:06.55#ibcon#*before write, iclass 36, count 0 2006.229.04:24:06.55#ibcon#enter sib2, iclass 36, count 0 2006.229.04:24:06.55#ibcon#flushed, iclass 36, count 0 2006.229.04:24:06.55#ibcon#about to write, iclass 36, count 0 2006.229.04:24:06.55#ibcon#wrote, iclass 36, count 0 2006.229.04:24:06.55#ibcon#about to read 3, iclass 36, count 0 2006.229.04:24:06.58#ibcon#read 3, iclass 36, count 0 2006.229.04:24:06.58#ibcon#about to read 4, iclass 36, count 0 2006.229.04:24:06.58#ibcon#read 4, iclass 36, count 0 2006.229.04:24:06.58#ibcon#about to read 5, iclass 36, count 0 2006.229.04:24:06.58#ibcon#read 5, iclass 36, count 0 2006.229.04:24:06.58#ibcon#about to read 6, iclass 36, count 0 2006.229.04:24:06.58#ibcon#read 6, iclass 36, count 0 2006.229.04:24:06.58#ibcon#end of sib2, iclass 36, count 0 2006.229.04:24:06.58#ibcon#*after write, iclass 36, count 0 2006.229.04:24:06.58#ibcon#*before return 0, iclass 36, count 0 2006.229.04:24:06.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:06.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:24:06.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:24:06.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:24:06.58$vck44/vabw=wide 2006.229.04:24:06.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.04:24:06.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.04:24:06.58#ibcon#ireg 8 cls_cnt 0 2006.229.04:24:06.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:06.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:06.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:06.58#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:24:06.58#ibcon#first serial, iclass 38, count 0 2006.229.04:24:06.58#ibcon#enter sib2, iclass 38, count 0 2006.229.04:24:06.58#ibcon#flushed, iclass 38, count 0 2006.229.04:24:06.58#ibcon#about to write, iclass 38, count 0 2006.229.04:24:06.58#ibcon#wrote, iclass 38, count 0 2006.229.04:24:06.58#ibcon#about to read 3, iclass 38, count 0 2006.229.04:24:06.60#ibcon#read 3, iclass 38, count 0 2006.229.04:24:06.60#ibcon#about to read 4, iclass 38, count 0 2006.229.04:24:06.60#ibcon#read 4, iclass 38, count 0 2006.229.04:24:06.60#ibcon#about to read 5, iclass 38, count 0 2006.229.04:24:06.60#ibcon#read 5, iclass 38, count 0 2006.229.04:24:06.60#ibcon#about to read 6, iclass 38, count 0 2006.229.04:24:06.60#ibcon#read 6, iclass 38, count 0 2006.229.04:24:06.60#ibcon#end of sib2, iclass 38, count 0 2006.229.04:24:06.60#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:24:06.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:24:06.60#ibcon#[25=BW32\r\n] 2006.229.04:24:06.60#ibcon#*before write, iclass 38, count 0 2006.229.04:24:06.60#ibcon#enter sib2, iclass 38, count 0 2006.229.04:24:06.60#ibcon#flushed, iclass 38, count 0 2006.229.04:24:06.60#ibcon#about to write, iclass 38, count 0 2006.229.04:24:06.60#ibcon#wrote, iclass 38, count 0 2006.229.04:24:06.60#ibcon#about to read 3, iclass 38, count 0 2006.229.04:24:06.63#ibcon#read 3, iclass 38, count 0 2006.229.04:24:06.63#ibcon#about to read 4, iclass 38, count 0 2006.229.04:24:06.63#ibcon#read 4, iclass 38, count 0 2006.229.04:24:06.63#ibcon#about to read 5, iclass 38, count 0 2006.229.04:24:06.63#ibcon#read 5, iclass 38, count 0 2006.229.04:24:06.63#ibcon#about to read 6, iclass 38, count 0 2006.229.04:24:06.63#ibcon#read 6, iclass 38, count 0 2006.229.04:24:06.63#ibcon#end of sib2, iclass 38, count 0 2006.229.04:24:06.63#ibcon#*after write, iclass 38, count 0 2006.229.04:24:06.63#ibcon#*before return 0, iclass 38, count 0 2006.229.04:24:06.63#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:06.63#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:24:06.63#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:24:06.63#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:24:06.63$vck44/vbbw=wide 2006.229.04:24:06.63#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.04:24:06.63#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.04:24:06.63#ibcon#ireg 8 cls_cnt 0 2006.229.04:24:06.63#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:24:06.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:24:06.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:24:06.70#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:24:06.70#ibcon#first serial, iclass 40, count 0 2006.229.04:24:06.70#ibcon#enter sib2, iclass 40, count 0 2006.229.04:24:06.70#ibcon#flushed, iclass 40, count 0 2006.229.04:24:06.70#ibcon#about to write, iclass 40, count 0 2006.229.04:24:06.70#ibcon#wrote, iclass 40, count 0 2006.229.04:24:06.70#ibcon#about to read 3, iclass 40, count 0 2006.229.04:24:06.72#ibcon#read 3, iclass 40, count 0 2006.229.04:24:06.72#ibcon#about to read 4, iclass 40, count 0 2006.229.04:24:06.72#ibcon#read 4, iclass 40, count 0 2006.229.04:24:06.72#ibcon#about to read 5, iclass 40, count 0 2006.229.04:24:06.72#ibcon#read 5, iclass 40, count 0 2006.229.04:24:06.72#ibcon#about to read 6, iclass 40, count 0 2006.229.04:24:06.72#ibcon#read 6, iclass 40, count 0 2006.229.04:24:06.72#ibcon#end of sib2, iclass 40, count 0 2006.229.04:24:06.72#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:24:06.72#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:24:06.72#ibcon#[27=BW32\r\n] 2006.229.04:24:06.72#ibcon#*before write, iclass 40, count 0 2006.229.04:24:06.72#ibcon#enter sib2, iclass 40, count 0 2006.229.04:24:06.72#ibcon#flushed, iclass 40, count 0 2006.229.04:24:06.72#ibcon#about to write, iclass 40, count 0 2006.229.04:24:06.72#ibcon#wrote, iclass 40, count 0 2006.229.04:24:06.72#ibcon#about to read 3, iclass 40, count 0 2006.229.04:24:06.75#ibcon#read 3, iclass 40, count 0 2006.229.04:24:06.75#ibcon#about to read 4, iclass 40, count 0 2006.229.04:24:06.75#ibcon#read 4, iclass 40, count 0 2006.229.04:24:06.75#ibcon#about to read 5, iclass 40, count 0 2006.229.04:24:06.75#ibcon#read 5, iclass 40, count 0 2006.229.04:24:06.75#ibcon#about to read 6, iclass 40, count 0 2006.229.04:24:06.75#ibcon#read 6, iclass 40, count 0 2006.229.04:24:06.75#ibcon#end of sib2, iclass 40, count 0 2006.229.04:24:06.75#ibcon#*after write, iclass 40, count 0 2006.229.04:24:06.75#ibcon#*before return 0, iclass 40, count 0 2006.229.04:24:06.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:24:06.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:24:06.75#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:24:06.75#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:24:06.75$setupk4/ifdk4 2006.229.04:24:06.75$ifdk4/lo= 2006.229.04:24:06.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:24:06.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:24:06.75$ifdk4/patch= 2006.229.04:24:06.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:24:06.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:24:06.75$setupk4/!*+20s 2006.229.04:24:10.31#abcon#<5=/05 2.4 3.6 30.42 951000.1\r\n> 2006.229.04:24:10.33#abcon#{5=INTERFACE CLEAR} 2006.229.04:24:10.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:24:13.14#trakl#Source acquired 2006.229.04:24:15.14#flagr#flagr/antenna,acquired 2006.229.04:24:20.48#abcon#<5=/05 2.4 3.6 30.42 951000.1\r\n> 2006.229.04:24:20.50#abcon#{5=INTERFACE CLEAR} 2006.229.04:24:20.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:24:21.25$setupk4/"tpicd 2006.229.04:24:21.25$setupk4/echo=off 2006.229.04:24:21.25$setupk4/xlog=off 2006.229.04:24:21.25:!2006.229.04:26:47 2006.229.04:26:47.01:preob 2006.229.04:26:48.14/onsource/TRACKING 2006.229.04:26:48.14:!2006.229.04:26:57 2006.229.04:26:57.02:"tape 2006.229.04:26:57.02:"st=record 2006.229.04:26:57.02:data_valid=on 2006.229.04:26:57.02:midob 2006.229.04:26:58.14/onsource/TRACKING 2006.229.04:26:58.14/wx/30.42,1000.0,95 2006.229.04:26:58.26/cable/+6.4056E-03 2006.229.04:26:59.35/va/01,08,usb,yes,36,39 2006.229.04:26:59.35/va/02,07,usb,yes,39,40 2006.229.04:26:59.35/va/03,06,usb,yes,48,51 2006.229.04:26:59.35/va/04,07,usb,yes,40,42 2006.229.04:26:59.35/va/05,04,usb,yes,36,37 2006.229.04:26:59.35/va/06,04,usb,yes,41,40 2006.229.04:26:59.35/va/07,05,usb,yes,36,37 2006.229.04:26:59.35/va/08,06,usb,yes,26,32 2006.229.04:26:59.58/valo/01,524.99,yes,locked 2006.229.04:26:59.58/valo/02,534.99,yes,locked 2006.229.04:26:59.58/valo/03,564.99,yes,locked 2006.229.04:26:59.58/valo/04,624.99,yes,locked 2006.229.04:26:59.58/valo/05,734.99,yes,locked 2006.229.04:26:59.58/valo/06,814.99,yes,locked 2006.229.04:26:59.58/valo/07,864.99,yes,locked 2006.229.04:26:59.58/valo/08,884.99,yes,locked 2006.229.04:27:00.67/vb/01,04,usb,yes,35,32 2006.229.04:27:00.67/vb/02,04,usb,yes,37,37 2006.229.04:27:00.67/vb/03,04,usb,yes,34,37 2006.229.04:27:00.67/vb/04,04,usb,yes,39,38 2006.229.04:27:00.67/vb/05,04,usb,yes,31,33 2006.229.04:27:00.67/vb/06,04,usb,yes,36,31 2006.229.04:27:00.67/vb/07,04,usb,yes,35,35 2006.229.04:27:00.67/vb/08,04,usb,yes,32,36 2006.229.04:27:00.91/vblo/01,629.99,yes,locked 2006.229.04:27:00.91/vblo/02,634.99,yes,locked 2006.229.04:27:00.91/vblo/03,649.99,yes,locked 2006.229.04:27:00.91/vblo/04,679.99,yes,locked 2006.229.04:27:00.91/vblo/05,709.99,yes,locked 2006.229.04:27:00.91/vblo/06,719.99,yes,locked 2006.229.04:27:00.91/vblo/07,734.99,yes,locked 2006.229.04:27:00.91/vblo/08,744.99,yes,locked 2006.229.04:27:01.06/vabw/8 2006.229.04:27:01.21/vbbw/8 2006.229.04:27:01.30/xfe/off,on,12.0 2006.229.04:27:01.68/ifatt/23,28,28,28 2006.229.04:27:02.07/fmout-gps/S +4.51E-07 2006.229.04:27:02.12:!2006.229.04:27:37 2006.229.04:27:37.02:data_valid=off 2006.229.04:27:37.02:"et 2006.229.04:27:37.02:!+3s 2006.229.04:27:40.04:"tape 2006.229.04:27:40.04:postob 2006.229.04:27:40.10/cable/+6.4077E-03 2006.229.04:27:40.11/wx/30.43,1000.0,95 2006.229.04:27:40.16/fmout-gps/S +4.52E-07 2006.229.04:27:40.17:scan_name=229-0429,jd0608,60 2006.229.04:27:40.17:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.04:27:41.15#flagr#flagr/antenna,new-source 2006.229.04:27:41.15:checkk5 2006.229.04:27:41.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:27:41.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:27:42.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:27:42.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:27:43.14/chk_obsdata//k5ts1/T2290426??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:27:43.55/chk_obsdata//k5ts2/T2290426??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:27:43.95/chk_obsdata//k5ts3/T2290426??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:27:44.36/chk_obsdata//k5ts4/T2290426??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:27:45.08/k5log//k5ts1_log_newline 2006.229.04:27:45.81/k5log//k5ts2_log_newline 2006.229.04:27:46.51/k5log//k5ts3_log_newline 2006.229.04:27:47.24/k5log//k5ts4_log_newline 2006.229.04:27:47.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:27:47.26:setupk4=1 2006.229.04:27:47.26$setupk4/echo=on 2006.229.04:27:47.26$setupk4/pcalon 2006.229.04:27:47.26$pcalon/"no phase cal control is implemented here 2006.229.04:27:47.26$setupk4/"tpicd=stop 2006.229.04:27:47.26$setupk4/"rec=synch_on 2006.229.04:27:47.26$setupk4/"rec_mode=128 2006.229.04:27:47.26$setupk4/!* 2006.229.04:27:47.26$setupk4/recpk4 2006.229.04:27:47.26$recpk4/recpatch= 2006.229.04:27:47.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:27:47.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:27:47.27$setupk4/vck44 2006.229.04:27:47.27$vck44/valo=1,524.99 2006.229.04:27:47.27#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.04:27:47.27#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.04:27:47.27#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:47.27#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:47.27#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:47.27#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:47.27#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:27:47.27#ibcon#first serial, iclass 20, count 0 2006.229.04:27:47.27#ibcon#enter sib2, iclass 20, count 0 2006.229.04:27:47.27#ibcon#flushed, iclass 20, count 0 2006.229.04:27:47.27#ibcon#about to write, iclass 20, count 0 2006.229.04:27:47.27#ibcon#wrote, iclass 20, count 0 2006.229.04:27:47.27#ibcon#about to read 3, iclass 20, count 0 2006.229.04:27:47.28#ibcon#read 3, iclass 20, count 0 2006.229.04:27:47.28#ibcon#about to read 4, iclass 20, count 0 2006.229.04:27:47.28#ibcon#read 4, iclass 20, count 0 2006.229.04:27:47.28#ibcon#about to read 5, iclass 20, count 0 2006.229.04:27:47.28#ibcon#read 5, iclass 20, count 0 2006.229.04:27:47.28#ibcon#about to read 6, iclass 20, count 0 2006.229.04:27:47.28#ibcon#read 6, iclass 20, count 0 2006.229.04:27:47.28#ibcon#end of sib2, iclass 20, count 0 2006.229.04:27:47.28#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:27:47.28#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:27:47.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:27:47.28#ibcon#*before write, iclass 20, count 0 2006.229.04:27:47.28#ibcon#enter sib2, iclass 20, count 0 2006.229.04:27:47.28#ibcon#flushed, iclass 20, count 0 2006.229.04:27:47.28#ibcon#about to write, iclass 20, count 0 2006.229.04:27:47.28#ibcon#wrote, iclass 20, count 0 2006.229.04:27:47.28#ibcon#about to read 3, iclass 20, count 0 2006.229.04:27:47.33#ibcon#read 3, iclass 20, count 0 2006.229.04:27:47.33#ibcon#about to read 4, iclass 20, count 0 2006.229.04:27:47.33#ibcon#read 4, iclass 20, count 0 2006.229.04:27:47.33#ibcon#about to read 5, iclass 20, count 0 2006.229.04:27:47.33#ibcon#read 5, iclass 20, count 0 2006.229.04:27:47.33#ibcon#about to read 6, iclass 20, count 0 2006.229.04:27:47.33#ibcon#read 6, iclass 20, count 0 2006.229.04:27:47.33#ibcon#end of sib2, iclass 20, count 0 2006.229.04:27:47.33#ibcon#*after write, iclass 20, count 0 2006.229.04:27:47.33#ibcon#*before return 0, iclass 20, count 0 2006.229.04:27:47.33#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:47.33#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:47.33#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:27:47.33#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:27:47.33$vck44/va=1,8 2006.229.04:27:47.34#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.04:27:47.34#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.04:27:47.34#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:47.34#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:47.34#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:47.34#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:47.34#ibcon#enter wrdev, iclass 22, count 2 2006.229.04:27:47.34#ibcon#first serial, iclass 22, count 2 2006.229.04:27:47.34#ibcon#enter sib2, iclass 22, count 2 2006.229.04:27:47.34#ibcon#flushed, iclass 22, count 2 2006.229.04:27:47.34#ibcon#about to write, iclass 22, count 2 2006.229.04:27:47.34#ibcon#wrote, iclass 22, count 2 2006.229.04:27:47.34#ibcon#about to read 3, iclass 22, count 2 2006.229.04:27:47.35#ibcon#read 3, iclass 22, count 2 2006.229.04:27:47.35#ibcon#about to read 4, iclass 22, count 2 2006.229.04:27:47.35#ibcon#read 4, iclass 22, count 2 2006.229.04:27:47.35#ibcon#about to read 5, iclass 22, count 2 2006.229.04:27:47.35#ibcon#read 5, iclass 22, count 2 2006.229.04:27:47.35#ibcon#about to read 6, iclass 22, count 2 2006.229.04:27:47.35#ibcon#read 6, iclass 22, count 2 2006.229.04:27:47.35#ibcon#end of sib2, iclass 22, count 2 2006.229.04:27:47.35#ibcon#*mode == 0, iclass 22, count 2 2006.229.04:27:47.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.04:27:47.35#ibcon#[25=AT01-08\r\n] 2006.229.04:27:47.35#ibcon#*before write, iclass 22, count 2 2006.229.04:27:47.35#ibcon#enter sib2, iclass 22, count 2 2006.229.04:27:47.35#ibcon#flushed, iclass 22, count 2 2006.229.04:27:47.35#ibcon#about to write, iclass 22, count 2 2006.229.04:27:47.35#ibcon#wrote, iclass 22, count 2 2006.229.04:27:47.35#ibcon#about to read 3, iclass 22, count 2 2006.229.04:27:47.38#ibcon#read 3, iclass 22, count 2 2006.229.04:27:47.38#ibcon#about to read 4, iclass 22, count 2 2006.229.04:27:47.38#ibcon#read 4, iclass 22, count 2 2006.229.04:27:47.38#ibcon#about to read 5, iclass 22, count 2 2006.229.04:27:47.38#ibcon#read 5, iclass 22, count 2 2006.229.04:27:47.38#ibcon#about to read 6, iclass 22, count 2 2006.229.04:27:47.38#ibcon#read 6, iclass 22, count 2 2006.229.04:27:47.38#ibcon#end of sib2, iclass 22, count 2 2006.229.04:27:47.38#ibcon#*after write, iclass 22, count 2 2006.229.04:27:47.38#ibcon#*before return 0, iclass 22, count 2 2006.229.04:27:47.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:47.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:47.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.04:27:47.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:47.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:47.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:47.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:47.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:27:47.50#ibcon#first serial, iclass 22, count 0 2006.229.04:27:47.50#ibcon#enter sib2, iclass 22, count 0 2006.229.04:27:47.50#ibcon#flushed, iclass 22, count 0 2006.229.04:27:47.50#ibcon#about to write, iclass 22, count 0 2006.229.04:27:47.50#ibcon#wrote, iclass 22, count 0 2006.229.04:27:47.50#ibcon#about to read 3, iclass 22, count 0 2006.229.04:27:47.52#ibcon#read 3, iclass 22, count 0 2006.229.04:27:47.52#ibcon#about to read 4, iclass 22, count 0 2006.229.04:27:47.52#ibcon#read 4, iclass 22, count 0 2006.229.04:27:47.52#ibcon#about to read 5, iclass 22, count 0 2006.229.04:27:47.52#ibcon#read 5, iclass 22, count 0 2006.229.04:27:47.52#ibcon#about to read 6, iclass 22, count 0 2006.229.04:27:47.52#ibcon#read 6, iclass 22, count 0 2006.229.04:27:47.52#ibcon#end of sib2, iclass 22, count 0 2006.229.04:27:47.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:27:47.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:27:47.52#ibcon#[25=USB\r\n] 2006.229.04:27:47.52#ibcon#*before write, iclass 22, count 0 2006.229.04:27:47.52#ibcon#enter sib2, iclass 22, count 0 2006.229.04:27:47.52#ibcon#flushed, iclass 22, count 0 2006.229.04:27:47.52#ibcon#about to write, iclass 22, count 0 2006.229.04:27:47.52#ibcon#wrote, iclass 22, count 0 2006.229.04:27:47.52#ibcon#about to read 3, iclass 22, count 0 2006.229.04:27:47.55#ibcon#read 3, iclass 22, count 0 2006.229.04:27:47.55#ibcon#about to read 4, iclass 22, count 0 2006.229.04:27:47.55#ibcon#read 4, iclass 22, count 0 2006.229.04:27:47.55#ibcon#about to read 5, iclass 22, count 0 2006.229.04:27:47.55#ibcon#read 5, iclass 22, count 0 2006.229.04:27:47.55#ibcon#about to read 6, iclass 22, count 0 2006.229.04:27:47.55#ibcon#read 6, iclass 22, count 0 2006.229.04:27:47.55#ibcon#end of sib2, iclass 22, count 0 2006.229.04:27:47.55#ibcon#*after write, iclass 22, count 0 2006.229.04:27:47.55#ibcon#*before return 0, iclass 22, count 0 2006.229.04:27:47.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:47.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:47.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:27:47.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:27:47.55$vck44/valo=2,534.99 2006.229.04:27:47.56#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.04:27:47.56#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.04:27:47.56#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:47.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:47.56#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:47.56#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:47.56#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:27:47.56#ibcon#first serial, iclass 24, count 0 2006.229.04:27:47.56#ibcon#enter sib2, iclass 24, count 0 2006.229.04:27:47.56#ibcon#flushed, iclass 24, count 0 2006.229.04:27:47.56#ibcon#about to write, iclass 24, count 0 2006.229.04:27:47.56#ibcon#wrote, iclass 24, count 0 2006.229.04:27:47.56#ibcon#about to read 3, iclass 24, count 0 2006.229.04:27:47.57#ibcon#read 3, iclass 24, count 0 2006.229.04:27:47.57#ibcon#about to read 4, iclass 24, count 0 2006.229.04:27:47.57#ibcon#read 4, iclass 24, count 0 2006.229.04:27:47.57#ibcon#about to read 5, iclass 24, count 0 2006.229.04:27:47.57#ibcon#read 5, iclass 24, count 0 2006.229.04:27:47.57#ibcon#about to read 6, iclass 24, count 0 2006.229.04:27:47.57#ibcon#read 6, iclass 24, count 0 2006.229.04:27:47.57#ibcon#end of sib2, iclass 24, count 0 2006.229.04:27:47.57#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:27:47.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:27:47.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:27:47.57#ibcon#*before write, iclass 24, count 0 2006.229.04:27:47.57#ibcon#enter sib2, iclass 24, count 0 2006.229.04:27:47.57#ibcon#flushed, iclass 24, count 0 2006.229.04:27:47.57#ibcon#about to write, iclass 24, count 0 2006.229.04:27:47.57#ibcon#wrote, iclass 24, count 0 2006.229.04:27:47.57#ibcon#about to read 3, iclass 24, count 0 2006.229.04:27:47.61#ibcon#read 3, iclass 24, count 0 2006.229.04:27:47.61#ibcon#about to read 4, iclass 24, count 0 2006.229.04:27:47.61#ibcon#read 4, iclass 24, count 0 2006.229.04:27:47.61#ibcon#about to read 5, iclass 24, count 0 2006.229.04:27:47.61#ibcon#read 5, iclass 24, count 0 2006.229.04:27:47.61#ibcon#about to read 6, iclass 24, count 0 2006.229.04:27:47.61#ibcon#read 6, iclass 24, count 0 2006.229.04:27:47.61#ibcon#end of sib2, iclass 24, count 0 2006.229.04:27:47.61#ibcon#*after write, iclass 24, count 0 2006.229.04:27:47.61#ibcon#*before return 0, iclass 24, count 0 2006.229.04:27:47.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:47.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:47.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:27:47.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:27:47.61$vck44/va=2,7 2006.229.04:27:47.61#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.04:27:47.61#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.04:27:47.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:47.62#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:47.66#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:47.66#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:47.66#ibcon#enter wrdev, iclass 26, count 2 2006.229.04:27:47.66#ibcon#first serial, iclass 26, count 2 2006.229.04:27:47.66#ibcon#enter sib2, iclass 26, count 2 2006.229.04:27:47.66#ibcon#flushed, iclass 26, count 2 2006.229.04:27:47.66#ibcon#about to write, iclass 26, count 2 2006.229.04:27:47.66#ibcon#wrote, iclass 26, count 2 2006.229.04:27:47.66#ibcon#about to read 3, iclass 26, count 2 2006.229.04:27:47.68#ibcon#read 3, iclass 26, count 2 2006.229.04:27:47.68#ibcon#about to read 4, iclass 26, count 2 2006.229.04:27:47.68#ibcon#read 4, iclass 26, count 2 2006.229.04:27:47.68#ibcon#about to read 5, iclass 26, count 2 2006.229.04:27:47.68#ibcon#read 5, iclass 26, count 2 2006.229.04:27:47.68#ibcon#about to read 6, iclass 26, count 2 2006.229.04:27:47.68#ibcon#read 6, iclass 26, count 2 2006.229.04:27:47.68#ibcon#end of sib2, iclass 26, count 2 2006.229.04:27:47.68#ibcon#*mode == 0, iclass 26, count 2 2006.229.04:27:47.68#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.04:27:47.68#ibcon#[25=AT02-07\r\n] 2006.229.04:27:47.68#ibcon#*before write, iclass 26, count 2 2006.229.04:27:47.68#ibcon#enter sib2, iclass 26, count 2 2006.229.04:27:47.68#ibcon#flushed, iclass 26, count 2 2006.229.04:27:47.68#ibcon#about to write, iclass 26, count 2 2006.229.04:27:47.68#ibcon#wrote, iclass 26, count 2 2006.229.04:27:47.68#ibcon#about to read 3, iclass 26, count 2 2006.229.04:27:47.71#ibcon#read 3, iclass 26, count 2 2006.229.04:27:47.71#ibcon#about to read 4, iclass 26, count 2 2006.229.04:27:47.71#ibcon#read 4, iclass 26, count 2 2006.229.04:27:47.71#ibcon#about to read 5, iclass 26, count 2 2006.229.04:27:47.71#ibcon#read 5, iclass 26, count 2 2006.229.04:27:47.71#ibcon#about to read 6, iclass 26, count 2 2006.229.04:27:47.71#ibcon#read 6, iclass 26, count 2 2006.229.04:27:47.71#ibcon#end of sib2, iclass 26, count 2 2006.229.04:27:47.71#ibcon#*after write, iclass 26, count 2 2006.229.04:27:47.71#ibcon#*before return 0, iclass 26, count 2 2006.229.04:27:47.71#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:47.71#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:47.71#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.04:27:47.71#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:47.71#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:47.83#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:47.83#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:47.83#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:27:47.83#ibcon#first serial, iclass 26, count 0 2006.229.04:27:47.83#ibcon#enter sib2, iclass 26, count 0 2006.229.04:27:47.83#ibcon#flushed, iclass 26, count 0 2006.229.04:27:47.83#ibcon#about to write, iclass 26, count 0 2006.229.04:27:47.83#ibcon#wrote, iclass 26, count 0 2006.229.04:27:47.83#ibcon#about to read 3, iclass 26, count 0 2006.229.04:27:47.85#ibcon#read 3, iclass 26, count 0 2006.229.04:27:47.85#ibcon#about to read 4, iclass 26, count 0 2006.229.04:27:47.85#ibcon#read 4, iclass 26, count 0 2006.229.04:27:47.85#ibcon#about to read 5, iclass 26, count 0 2006.229.04:27:47.85#ibcon#read 5, iclass 26, count 0 2006.229.04:27:47.85#ibcon#about to read 6, iclass 26, count 0 2006.229.04:27:47.85#ibcon#read 6, iclass 26, count 0 2006.229.04:27:47.85#ibcon#end of sib2, iclass 26, count 0 2006.229.04:27:47.85#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:27:47.85#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:27:47.85#ibcon#[25=USB\r\n] 2006.229.04:27:47.85#ibcon#*before write, iclass 26, count 0 2006.229.04:27:47.85#ibcon#enter sib2, iclass 26, count 0 2006.229.04:27:47.85#ibcon#flushed, iclass 26, count 0 2006.229.04:27:47.85#ibcon#about to write, iclass 26, count 0 2006.229.04:27:47.85#ibcon#wrote, iclass 26, count 0 2006.229.04:27:47.85#ibcon#about to read 3, iclass 26, count 0 2006.229.04:27:47.88#ibcon#read 3, iclass 26, count 0 2006.229.04:27:47.88#ibcon#about to read 4, iclass 26, count 0 2006.229.04:27:47.88#ibcon#read 4, iclass 26, count 0 2006.229.04:27:47.88#ibcon#about to read 5, iclass 26, count 0 2006.229.04:27:47.88#ibcon#read 5, iclass 26, count 0 2006.229.04:27:47.88#ibcon#about to read 6, iclass 26, count 0 2006.229.04:27:47.88#ibcon#read 6, iclass 26, count 0 2006.229.04:27:47.88#ibcon#end of sib2, iclass 26, count 0 2006.229.04:27:47.88#ibcon#*after write, iclass 26, count 0 2006.229.04:27:47.88#ibcon#*before return 0, iclass 26, count 0 2006.229.04:27:47.88#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:47.88#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:47.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:27:47.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:27:47.88$vck44/valo=3,564.99 2006.229.04:27:47.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.04:27:47.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.04:27:47.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:47.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:47.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:47.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:47.89#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:27:47.89#ibcon#first serial, iclass 28, count 0 2006.229.04:27:47.89#ibcon#enter sib2, iclass 28, count 0 2006.229.04:27:47.89#ibcon#flushed, iclass 28, count 0 2006.229.04:27:47.89#ibcon#about to write, iclass 28, count 0 2006.229.04:27:47.89#ibcon#wrote, iclass 28, count 0 2006.229.04:27:47.89#ibcon#about to read 3, iclass 28, count 0 2006.229.04:27:47.90#ibcon#read 3, iclass 28, count 0 2006.229.04:27:47.90#ibcon#about to read 4, iclass 28, count 0 2006.229.04:27:47.90#ibcon#read 4, iclass 28, count 0 2006.229.04:27:47.90#ibcon#about to read 5, iclass 28, count 0 2006.229.04:27:47.90#ibcon#read 5, iclass 28, count 0 2006.229.04:27:47.90#ibcon#about to read 6, iclass 28, count 0 2006.229.04:27:47.90#ibcon#read 6, iclass 28, count 0 2006.229.04:27:47.90#ibcon#end of sib2, iclass 28, count 0 2006.229.04:27:47.90#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:27:47.90#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:27:47.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:27:47.90#ibcon#*before write, iclass 28, count 0 2006.229.04:27:47.90#ibcon#enter sib2, iclass 28, count 0 2006.229.04:27:47.90#ibcon#flushed, iclass 28, count 0 2006.229.04:27:47.90#ibcon#about to write, iclass 28, count 0 2006.229.04:27:47.90#ibcon#wrote, iclass 28, count 0 2006.229.04:27:47.90#ibcon#about to read 3, iclass 28, count 0 2006.229.04:27:47.94#ibcon#read 3, iclass 28, count 0 2006.229.04:27:47.94#ibcon#about to read 4, iclass 28, count 0 2006.229.04:27:47.94#ibcon#read 4, iclass 28, count 0 2006.229.04:27:47.94#ibcon#about to read 5, iclass 28, count 0 2006.229.04:27:47.94#ibcon#read 5, iclass 28, count 0 2006.229.04:27:47.94#ibcon#about to read 6, iclass 28, count 0 2006.229.04:27:47.94#ibcon#read 6, iclass 28, count 0 2006.229.04:27:47.94#ibcon#end of sib2, iclass 28, count 0 2006.229.04:27:47.94#ibcon#*after write, iclass 28, count 0 2006.229.04:27:47.94#ibcon#*before return 0, iclass 28, count 0 2006.229.04:27:47.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:47.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:47.94#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:27:47.94#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:27:47.94$vck44/va=3,6 2006.229.04:27:47.94#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.04:27:47.94#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.04:27:47.94#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:47.94#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:48.00#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:48.00#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:48.00#ibcon#enter wrdev, iclass 30, count 2 2006.229.04:27:48.00#ibcon#first serial, iclass 30, count 2 2006.229.04:27:48.00#ibcon#enter sib2, iclass 30, count 2 2006.229.04:27:48.00#ibcon#flushed, iclass 30, count 2 2006.229.04:27:48.00#ibcon#about to write, iclass 30, count 2 2006.229.04:27:48.00#ibcon#wrote, iclass 30, count 2 2006.229.04:27:48.00#ibcon#about to read 3, iclass 30, count 2 2006.229.04:27:48.02#ibcon#read 3, iclass 30, count 2 2006.229.04:27:48.02#ibcon#about to read 4, iclass 30, count 2 2006.229.04:27:48.02#ibcon#read 4, iclass 30, count 2 2006.229.04:27:48.02#ibcon#about to read 5, iclass 30, count 2 2006.229.04:27:48.02#ibcon#read 5, iclass 30, count 2 2006.229.04:27:48.02#ibcon#about to read 6, iclass 30, count 2 2006.229.04:27:48.02#ibcon#read 6, iclass 30, count 2 2006.229.04:27:48.02#ibcon#end of sib2, iclass 30, count 2 2006.229.04:27:48.02#ibcon#*mode == 0, iclass 30, count 2 2006.229.04:27:48.02#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.04:27:48.02#ibcon#[25=AT03-06\r\n] 2006.229.04:27:48.02#ibcon#*before write, iclass 30, count 2 2006.229.04:27:48.02#ibcon#enter sib2, iclass 30, count 2 2006.229.04:27:48.02#ibcon#flushed, iclass 30, count 2 2006.229.04:27:48.02#ibcon#about to write, iclass 30, count 2 2006.229.04:27:48.02#ibcon#wrote, iclass 30, count 2 2006.229.04:27:48.02#ibcon#about to read 3, iclass 30, count 2 2006.229.04:27:48.05#ibcon#read 3, iclass 30, count 2 2006.229.04:27:48.05#ibcon#about to read 4, iclass 30, count 2 2006.229.04:27:48.05#ibcon#read 4, iclass 30, count 2 2006.229.04:27:48.05#ibcon#about to read 5, iclass 30, count 2 2006.229.04:27:48.05#ibcon#read 5, iclass 30, count 2 2006.229.04:27:48.05#ibcon#about to read 6, iclass 30, count 2 2006.229.04:27:48.05#ibcon#read 6, iclass 30, count 2 2006.229.04:27:48.05#ibcon#end of sib2, iclass 30, count 2 2006.229.04:27:48.05#ibcon#*after write, iclass 30, count 2 2006.229.04:27:48.05#ibcon#*before return 0, iclass 30, count 2 2006.229.04:27:48.05#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:48.05#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:48.05#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.04:27:48.05#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:48.05#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:48.17#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:48.17#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:48.17#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:27:48.17#ibcon#first serial, iclass 30, count 0 2006.229.04:27:48.17#ibcon#enter sib2, iclass 30, count 0 2006.229.04:27:48.17#ibcon#flushed, iclass 30, count 0 2006.229.04:27:48.17#ibcon#about to write, iclass 30, count 0 2006.229.04:27:48.17#ibcon#wrote, iclass 30, count 0 2006.229.04:27:48.17#ibcon#about to read 3, iclass 30, count 0 2006.229.04:27:48.19#ibcon#read 3, iclass 30, count 0 2006.229.04:27:48.19#ibcon#about to read 4, iclass 30, count 0 2006.229.04:27:48.19#ibcon#read 4, iclass 30, count 0 2006.229.04:27:48.19#ibcon#about to read 5, iclass 30, count 0 2006.229.04:27:48.19#ibcon#read 5, iclass 30, count 0 2006.229.04:27:48.19#ibcon#about to read 6, iclass 30, count 0 2006.229.04:27:48.19#ibcon#read 6, iclass 30, count 0 2006.229.04:27:48.19#ibcon#end of sib2, iclass 30, count 0 2006.229.04:27:48.19#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:27:48.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:27:48.19#ibcon#[25=USB\r\n] 2006.229.04:27:48.19#ibcon#*before write, iclass 30, count 0 2006.229.04:27:48.19#ibcon#enter sib2, iclass 30, count 0 2006.229.04:27:48.19#ibcon#flushed, iclass 30, count 0 2006.229.04:27:48.19#ibcon#about to write, iclass 30, count 0 2006.229.04:27:48.19#ibcon#wrote, iclass 30, count 0 2006.229.04:27:48.19#ibcon#about to read 3, iclass 30, count 0 2006.229.04:27:48.22#ibcon#read 3, iclass 30, count 0 2006.229.04:27:48.22#ibcon#about to read 4, iclass 30, count 0 2006.229.04:27:48.22#ibcon#read 4, iclass 30, count 0 2006.229.04:27:48.22#ibcon#about to read 5, iclass 30, count 0 2006.229.04:27:48.22#ibcon#read 5, iclass 30, count 0 2006.229.04:27:48.22#ibcon#about to read 6, iclass 30, count 0 2006.229.04:27:48.22#ibcon#read 6, iclass 30, count 0 2006.229.04:27:48.22#ibcon#end of sib2, iclass 30, count 0 2006.229.04:27:48.22#ibcon#*after write, iclass 30, count 0 2006.229.04:27:48.22#ibcon#*before return 0, iclass 30, count 0 2006.229.04:27:48.22#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:48.22#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:48.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:27:48.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:27:48.22$vck44/valo=4,624.99 2006.229.04:27:48.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.04:27:48.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.04:27:48.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:48.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:48.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:48.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:48.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:27:48.23#ibcon#first serial, iclass 32, count 0 2006.229.04:27:48.23#ibcon#enter sib2, iclass 32, count 0 2006.229.04:27:48.23#ibcon#flushed, iclass 32, count 0 2006.229.04:27:48.23#ibcon#about to write, iclass 32, count 0 2006.229.04:27:48.23#ibcon#wrote, iclass 32, count 0 2006.229.04:27:48.23#ibcon#about to read 3, iclass 32, count 0 2006.229.04:27:48.24#ibcon#read 3, iclass 32, count 0 2006.229.04:27:48.24#ibcon#about to read 4, iclass 32, count 0 2006.229.04:27:48.24#ibcon#read 4, iclass 32, count 0 2006.229.04:27:48.24#ibcon#about to read 5, iclass 32, count 0 2006.229.04:27:48.24#ibcon#read 5, iclass 32, count 0 2006.229.04:27:48.24#ibcon#about to read 6, iclass 32, count 0 2006.229.04:27:48.24#ibcon#read 6, iclass 32, count 0 2006.229.04:27:48.24#ibcon#end of sib2, iclass 32, count 0 2006.229.04:27:48.24#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:27:48.24#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:27:48.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:27:48.24#ibcon#*before write, iclass 32, count 0 2006.229.04:27:48.24#ibcon#enter sib2, iclass 32, count 0 2006.229.04:27:48.24#ibcon#flushed, iclass 32, count 0 2006.229.04:27:48.24#ibcon#about to write, iclass 32, count 0 2006.229.04:27:48.24#ibcon#wrote, iclass 32, count 0 2006.229.04:27:48.24#ibcon#about to read 3, iclass 32, count 0 2006.229.04:27:48.28#ibcon#read 3, iclass 32, count 0 2006.229.04:27:48.28#ibcon#about to read 4, iclass 32, count 0 2006.229.04:27:48.28#ibcon#read 4, iclass 32, count 0 2006.229.04:27:48.28#ibcon#about to read 5, iclass 32, count 0 2006.229.04:27:48.28#ibcon#read 5, iclass 32, count 0 2006.229.04:27:48.28#ibcon#about to read 6, iclass 32, count 0 2006.229.04:27:48.28#ibcon#read 6, iclass 32, count 0 2006.229.04:27:48.28#ibcon#end of sib2, iclass 32, count 0 2006.229.04:27:48.28#ibcon#*after write, iclass 32, count 0 2006.229.04:27:48.28#ibcon#*before return 0, iclass 32, count 0 2006.229.04:27:48.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:48.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:48.28#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:27:48.28#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:27:48.28$vck44/va=4,7 2006.229.04:27:48.28#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.04:27:48.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.04:27:48.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:48.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:48.33#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:48.33#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:48.33#ibcon#enter wrdev, iclass 34, count 2 2006.229.04:27:48.33#ibcon#first serial, iclass 34, count 2 2006.229.04:27:48.33#ibcon#enter sib2, iclass 34, count 2 2006.229.04:27:48.33#ibcon#flushed, iclass 34, count 2 2006.229.04:27:48.33#ibcon#about to write, iclass 34, count 2 2006.229.04:27:48.33#ibcon#wrote, iclass 34, count 2 2006.229.04:27:48.33#ibcon#about to read 3, iclass 34, count 2 2006.229.04:27:48.35#ibcon#read 3, iclass 34, count 2 2006.229.04:27:48.35#ibcon#about to read 4, iclass 34, count 2 2006.229.04:27:48.35#ibcon#read 4, iclass 34, count 2 2006.229.04:27:48.35#ibcon#about to read 5, iclass 34, count 2 2006.229.04:27:48.35#ibcon#read 5, iclass 34, count 2 2006.229.04:27:48.35#ibcon#about to read 6, iclass 34, count 2 2006.229.04:27:48.35#ibcon#read 6, iclass 34, count 2 2006.229.04:27:48.35#ibcon#end of sib2, iclass 34, count 2 2006.229.04:27:48.35#ibcon#*mode == 0, iclass 34, count 2 2006.229.04:27:48.35#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.04:27:48.35#ibcon#[25=AT04-07\r\n] 2006.229.04:27:48.35#ibcon#*before write, iclass 34, count 2 2006.229.04:27:48.35#ibcon#enter sib2, iclass 34, count 2 2006.229.04:27:48.35#ibcon#flushed, iclass 34, count 2 2006.229.04:27:48.35#ibcon#about to write, iclass 34, count 2 2006.229.04:27:48.35#ibcon#wrote, iclass 34, count 2 2006.229.04:27:48.35#ibcon#about to read 3, iclass 34, count 2 2006.229.04:27:48.38#ibcon#read 3, iclass 34, count 2 2006.229.04:27:48.38#ibcon#about to read 4, iclass 34, count 2 2006.229.04:27:48.38#ibcon#read 4, iclass 34, count 2 2006.229.04:27:48.38#ibcon#about to read 5, iclass 34, count 2 2006.229.04:27:48.38#ibcon#read 5, iclass 34, count 2 2006.229.04:27:48.38#ibcon#about to read 6, iclass 34, count 2 2006.229.04:27:48.38#ibcon#read 6, iclass 34, count 2 2006.229.04:27:48.38#ibcon#end of sib2, iclass 34, count 2 2006.229.04:27:48.38#ibcon#*after write, iclass 34, count 2 2006.229.04:27:48.38#ibcon#*before return 0, iclass 34, count 2 2006.229.04:27:48.38#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:48.38#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:48.38#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.04:27:48.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:48.38#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:48.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:48.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:48.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:27:48.50#ibcon#first serial, iclass 34, count 0 2006.229.04:27:48.50#ibcon#enter sib2, iclass 34, count 0 2006.229.04:27:48.50#ibcon#flushed, iclass 34, count 0 2006.229.04:27:48.50#ibcon#about to write, iclass 34, count 0 2006.229.04:27:48.50#ibcon#wrote, iclass 34, count 0 2006.229.04:27:48.50#ibcon#about to read 3, iclass 34, count 0 2006.229.04:27:48.52#ibcon#read 3, iclass 34, count 0 2006.229.04:27:48.52#ibcon#about to read 4, iclass 34, count 0 2006.229.04:27:48.52#ibcon#read 4, iclass 34, count 0 2006.229.04:27:48.52#ibcon#about to read 5, iclass 34, count 0 2006.229.04:27:48.52#ibcon#read 5, iclass 34, count 0 2006.229.04:27:48.52#ibcon#about to read 6, iclass 34, count 0 2006.229.04:27:48.52#ibcon#read 6, iclass 34, count 0 2006.229.04:27:48.52#ibcon#end of sib2, iclass 34, count 0 2006.229.04:27:48.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:27:48.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:27:48.52#ibcon#[25=USB\r\n] 2006.229.04:27:48.52#ibcon#*before write, iclass 34, count 0 2006.229.04:27:48.52#ibcon#enter sib2, iclass 34, count 0 2006.229.04:27:48.52#ibcon#flushed, iclass 34, count 0 2006.229.04:27:48.52#ibcon#about to write, iclass 34, count 0 2006.229.04:27:48.52#ibcon#wrote, iclass 34, count 0 2006.229.04:27:48.52#ibcon#about to read 3, iclass 34, count 0 2006.229.04:27:48.55#ibcon#read 3, iclass 34, count 0 2006.229.04:27:48.55#ibcon#about to read 4, iclass 34, count 0 2006.229.04:27:48.55#ibcon#read 4, iclass 34, count 0 2006.229.04:27:48.55#ibcon#about to read 5, iclass 34, count 0 2006.229.04:27:48.55#ibcon#read 5, iclass 34, count 0 2006.229.04:27:48.55#ibcon#about to read 6, iclass 34, count 0 2006.229.04:27:48.55#ibcon#read 6, iclass 34, count 0 2006.229.04:27:48.55#ibcon#end of sib2, iclass 34, count 0 2006.229.04:27:48.55#ibcon#*after write, iclass 34, count 0 2006.229.04:27:48.55#ibcon#*before return 0, iclass 34, count 0 2006.229.04:27:48.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:48.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:48.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:27:48.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:27:48.55$vck44/valo=5,734.99 2006.229.04:27:48.55#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:27:48.56#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:27:48.56#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:48.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:48.56#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:48.56#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:48.56#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:27:48.56#ibcon#first serial, iclass 36, count 0 2006.229.04:27:48.56#ibcon#enter sib2, iclass 36, count 0 2006.229.04:27:48.56#ibcon#flushed, iclass 36, count 0 2006.229.04:27:48.56#ibcon#about to write, iclass 36, count 0 2006.229.04:27:48.56#ibcon#wrote, iclass 36, count 0 2006.229.04:27:48.56#ibcon#about to read 3, iclass 36, count 0 2006.229.04:27:48.57#ibcon#read 3, iclass 36, count 0 2006.229.04:27:48.57#ibcon#about to read 4, iclass 36, count 0 2006.229.04:27:48.57#ibcon#read 4, iclass 36, count 0 2006.229.04:27:48.57#ibcon#about to read 5, iclass 36, count 0 2006.229.04:27:48.57#ibcon#read 5, iclass 36, count 0 2006.229.04:27:48.57#ibcon#about to read 6, iclass 36, count 0 2006.229.04:27:48.57#ibcon#read 6, iclass 36, count 0 2006.229.04:27:48.57#ibcon#end of sib2, iclass 36, count 0 2006.229.04:27:48.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:27:48.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:27:48.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:27:48.57#ibcon#*before write, iclass 36, count 0 2006.229.04:27:48.57#ibcon#enter sib2, iclass 36, count 0 2006.229.04:27:48.57#ibcon#flushed, iclass 36, count 0 2006.229.04:27:48.57#ibcon#about to write, iclass 36, count 0 2006.229.04:27:48.57#ibcon#wrote, iclass 36, count 0 2006.229.04:27:48.57#ibcon#about to read 3, iclass 36, count 0 2006.229.04:27:48.61#ibcon#read 3, iclass 36, count 0 2006.229.04:27:48.61#ibcon#about to read 4, iclass 36, count 0 2006.229.04:27:48.61#ibcon#read 4, iclass 36, count 0 2006.229.04:27:48.61#ibcon#about to read 5, iclass 36, count 0 2006.229.04:27:48.61#ibcon#read 5, iclass 36, count 0 2006.229.04:27:48.61#ibcon#about to read 6, iclass 36, count 0 2006.229.04:27:48.61#ibcon#read 6, iclass 36, count 0 2006.229.04:27:48.61#ibcon#end of sib2, iclass 36, count 0 2006.229.04:27:48.61#ibcon#*after write, iclass 36, count 0 2006.229.04:27:48.61#ibcon#*before return 0, iclass 36, count 0 2006.229.04:27:48.61#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:48.61#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:48.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:27:48.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:27:48.61$vck44/va=5,4 2006.229.04:27:48.61#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.04:27:48.61#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.04:27:48.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:48.62#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:48.66#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:48.66#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:48.66#ibcon#enter wrdev, iclass 38, count 2 2006.229.04:27:48.66#ibcon#first serial, iclass 38, count 2 2006.229.04:27:48.66#ibcon#enter sib2, iclass 38, count 2 2006.229.04:27:48.66#ibcon#flushed, iclass 38, count 2 2006.229.04:27:48.66#ibcon#about to write, iclass 38, count 2 2006.229.04:27:48.66#ibcon#wrote, iclass 38, count 2 2006.229.04:27:48.66#ibcon#about to read 3, iclass 38, count 2 2006.229.04:27:48.68#ibcon#read 3, iclass 38, count 2 2006.229.04:27:48.68#ibcon#about to read 4, iclass 38, count 2 2006.229.04:27:48.68#ibcon#read 4, iclass 38, count 2 2006.229.04:27:48.68#ibcon#about to read 5, iclass 38, count 2 2006.229.04:27:48.68#ibcon#read 5, iclass 38, count 2 2006.229.04:27:48.68#ibcon#about to read 6, iclass 38, count 2 2006.229.04:27:48.68#ibcon#read 6, iclass 38, count 2 2006.229.04:27:48.68#ibcon#end of sib2, iclass 38, count 2 2006.229.04:27:48.68#ibcon#*mode == 0, iclass 38, count 2 2006.229.04:27:48.68#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.04:27:48.68#ibcon#[25=AT05-04\r\n] 2006.229.04:27:48.68#ibcon#*before write, iclass 38, count 2 2006.229.04:27:48.68#ibcon#enter sib2, iclass 38, count 2 2006.229.04:27:48.68#ibcon#flushed, iclass 38, count 2 2006.229.04:27:48.68#ibcon#about to write, iclass 38, count 2 2006.229.04:27:48.68#ibcon#wrote, iclass 38, count 2 2006.229.04:27:48.68#ibcon#about to read 3, iclass 38, count 2 2006.229.04:27:48.71#ibcon#read 3, iclass 38, count 2 2006.229.04:27:48.71#ibcon#about to read 4, iclass 38, count 2 2006.229.04:27:48.71#ibcon#read 4, iclass 38, count 2 2006.229.04:27:48.71#ibcon#about to read 5, iclass 38, count 2 2006.229.04:27:48.71#ibcon#read 5, iclass 38, count 2 2006.229.04:27:48.71#ibcon#about to read 6, iclass 38, count 2 2006.229.04:27:48.71#ibcon#read 6, iclass 38, count 2 2006.229.04:27:48.71#ibcon#end of sib2, iclass 38, count 2 2006.229.04:27:48.71#ibcon#*after write, iclass 38, count 2 2006.229.04:27:48.71#ibcon#*before return 0, iclass 38, count 2 2006.229.04:27:48.71#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:48.71#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:48.71#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.04:27:48.71#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:48.71#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:48.83#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:48.83#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:48.83#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:27:48.83#ibcon#first serial, iclass 38, count 0 2006.229.04:27:48.83#ibcon#enter sib2, iclass 38, count 0 2006.229.04:27:48.83#ibcon#flushed, iclass 38, count 0 2006.229.04:27:48.83#ibcon#about to write, iclass 38, count 0 2006.229.04:27:48.83#ibcon#wrote, iclass 38, count 0 2006.229.04:27:48.83#ibcon#about to read 3, iclass 38, count 0 2006.229.04:27:48.85#ibcon#read 3, iclass 38, count 0 2006.229.04:27:48.85#ibcon#about to read 4, iclass 38, count 0 2006.229.04:27:48.85#ibcon#read 4, iclass 38, count 0 2006.229.04:27:48.85#ibcon#about to read 5, iclass 38, count 0 2006.229.04:27:48.85#ibcon#read 5, iclass 38, count 0 2006.229.04:27:48.85#ibcon#about to read 6, iclass 38, count 0 2006.229.04:27:48.85#ibcon#read 6, iclass 38, count 0 2006.229.04:27:48.85#ibcon#end of sib2, iclass 38, count 0 2006.229.04:27:48.85#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:27:48.85#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:27:48.85#ibcon#[25=USB\r\n] 2006.229.04:27:48.85#ibcon#*before write, iclass 38, count 0 2006.229.04:27:48.85#ibcon#enter sib2, iclass 38, count 0 2006.229.04:27:48.85#ibcon#flushed, iclass 38, count 0 2006.229.04:27:48.85#ibcon#about to write, iclass 38, count 0 2006.229.04:27:48.85#ibcon#wrote, iclass 38, count 0 2006.229.04:27:48.85#ibcon#about to read 3, iclass 38, count 0 2006.229.04:27:48.88#ibcon#read 3, iclass 38, count 0 2006.229.04:27:48.88#ibcon#about to read 4, iclass 38, count 0 2006.229.04:27:48.88#ibcon#read 4, iclass 38, count 0 2006.229.04:27:48.88#ibcon#about to read 5, iclass 38, count 0 2006.229.04:27:48.88#ibcon#read 5, iclass 38, count 0 2006.229.04:27:48.88#ibcon#about to read 6, iclass 38, count 0 2006.229.04:27:48.88#ibcon#read 6, iclass 38, count 0 2006.229.04:27:48.88#ibcon#end of sib2, iclass 38, count 0 2006.229.04:27:48.88#ibcon#*after write, iclass 38, count 0 2006.229.04:27:48.88#ibcon#*before return 0, iclass 38, count 0 2006.229.04:27:48.88#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:48.88#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:48.88#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:27:48.88#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:27:48.88$vck44/valo=6,814.99 2006.229.04:27:48.88#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.04:27:48.88#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.04:27:48.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:48.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:48.89#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:48.89#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:48.89#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:27:48.89#ibcon#first serial, iclass 40, count 0 2006.229.04:27:48.89#ibcon#enter sib2, iclass 40, count 0 2006.229.04:27:48.89#ibcon#flushed, iclass 40, count 0 2006.229.04:27:48.89#ibcon#about to write, iclass 40, count 0 2006.229.04:27:48.89#ibcon#wrote, iclass 40, count 0 2006.229.04:27:48.89#ibcon#about to read 3, iclass 40, count 0 2006.229.04:27:48.90#ibcon#read 3, iclass 40, count 0 2006.229.04:27:48.90#ibcon#about to read 4, iclass 40, count 0 2006.229.04:27:48.90#ibcon#read 4, iclass 40, count 0 2006.229.04:27:48.90#ibcon#about to read 5, iclass 40, count 0 2006.229.04:27:48.90#ibcon#read 5, iclass 40, count 0 2006.229.04:27:48.90#ibcon#about to read 6, iclass 40, count 0 2006.229.04:27:48.90#ibcon#read 6, iclass 40, count 0 2006.229.04:27:48.90#ibcon#end of sib2, iclass 40, count 0 2006.229.04:27:48.90#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:27:48.90#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:27:48.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:27:48.90#ibcon#*before write, iclass 40, count 0 2006.229.04:27:48.90#ibcon#enter sib2, iclass 40, count 0 2006.229.04:27:48.90#ibcon#flushed, iclass 40, count 0 2006.229.04:27:48.90#ibcon#about to write, iclass 40, count 0 2006.229.04:27:48.90#ibcon#wrote, iclass 40, count 0 2006.229.04:27:48.90#ibcon#about to read 3, iclass 40, count 0 2006.229.04:27:48.94#ibcon#read 3, iclass 40, count 0 2006.229.04:27:48.94#ibcon#about to read 4, iclass 40, count 0 2006.229.04:27:48.94#ibcon#read 4, iclass 40, count 0 2006.229.04:27:48.94#ibcon#about to read 5, iclass 40, count 0 2006.229.04:27:48.94#ibcon#read 5, iclass 40, count 0 2006.229.04:27:48.94#ibcon#about to read 6, iclass 40, count 0 2006.229.04:27:48.94#ibcon#read 6, iclass 40, count 0 2006.229.04:27:48.94#ibcon#end of sib2, iclass 40, count 0 2006.229.04:27:48.94#ibcon#*after write, iclass 40, count 0 2006.229.04:27:48.94#ibcon#*before return 0, iclass 40, count 0 2006.229.04:27:48.94#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:48.94#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:48.94#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:27:48.94#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:27:48.94$vck44/va=6,4 2006.229.04:27:48.94#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.04:27:48.94#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.04:27:48.94#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:48.94#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:49.00#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:49.00#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:49.00#ibcon#enter wrdev, iclass 4, count 2 2006.229.04:27:49.00#ibcon#first serial, iclass 4, count 2 2006.229.04:27:49.00#ibcon#enter sib2, iclass 4, count 2 2006.229.04:27:49.00#ibcon#flushed, iclass 4, count 2 2006.229.04:27:49.00#ibcon#about to write, iclass 4, count 2 2006.229.04:27:49.00#ibcon#wrote, iclass 4, count 2 2006.229.04:27:49.00#ibcon#about to read 3, iclass 4, count 2 2006.229.04:27:49.02#ibcon#read 3, iclass 4, count 2 2006.229.04:27:49.02#ibcon#about to read 4, iclass 4, count 2 2006.229.04:27:49.02#ibcon#read 4, iclass 4, count 2 2006.229.04:27:49.02#ibcon#about to read 5, iclass 4, count 2 2006.229.04:27:49.02#ibcon#read 5, iclass 4, count 2 2006.229.04:27:49.02#ibcon#about to read 6, iclass 4, count 2 2006.229.04:27:49.02#ibcon#read 6, iclass 4, count 2 2006.229.04:27:49.02#ibcon#end of sib2, iclass 4, count 2 2006.229.04:27:49.02#ibcon#*mode == 0, iclass 4, count 2 2006.229.04:27:49.02#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.04:27:49.02#ibcon#[25=AT06-04\r\n] 2006.229.04:27:49.02#ibcon#*before write, iclass 4, count 2 2006.229.04:27:49.02#ibcon#enter sib2, iclass 4, count 2 2006.229.04:27:49.02#ibcon#flushed, iclass 4, count 2 2006.229.04:27:49.02#ibcon#about to write, iclass 4, count 2 2006.229.04:27:49.02#ibcon#wrote, iclass 4, count 2 2006.229.04:27:49.02#ibcon#about to read 3, iclass 4, count 2 2006.229.04:27:49.05#ibcon#read 3, iclass 4, count 2 2006.229.04:27:49.05#ibcon#about to read 4, iclass 4, count 2 2006.229.04:27:49.05#ibcon#read 4, iclass 4, count 2 2006.229.04:27:49.05#ibcon#about to read 5, iclass 4, count 2 2006.229.04:27:49.05#ibcon#read 5, iclass 4, count 2 2006.229.04:27:49.05#ibcon#about to read 6, iclass 4, count 2 2006.229.04:27:49.05#ibcon#read 6, iclass 4, count 2 2006.229.04:27:49.05#ibcon#end of sib2, iclass 4, count 2 2006.229.04:27:49.05#ibcon#*after write, iclass 4, count 2 2006.229.04:27:49.05#ibcon#*before return 0, iclass 4, count 2 2006.229.04:27:49.05#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:49.05#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:49.05#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.04:27:49.05#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:49.05#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:49.17#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:49.17#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:49.17#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:27:49.17#ibcon#first serial, iclass 4, count 0 2006.229.04:27:49.17#ibcon#enter sib2, iclass 4, count 0 2006.229.04:27:49.17#ibcon#flushed, iclass 4, count 0 2006.229.04:27:49.17#ibcon#about to write, iclass 4, count 0 2006.229.04:27:49.17#ibcon#wrote, iclass 4, count 0 2006.229.04:27:49.17#ibcon#about to read 3, iclass 4, count 0 2006.229.04:27:49.19#ibcon#read 3, iclass 4, count 0 2006.229.04:27:49.19#ibcon#about to read 4, iclass 4, count 0 2006.229.04:27:49.19#ibcon#read 4, iclass 4, count 0 2006.229.04:27:49.19#ibcon#about to read 5, iclass 4, count 0 2006.229.04:27:49.19#ibcon#read 5, iclass 4, count 0 2006.229.04:27:49.19#ibcon#about to read 6, iclass 4, count 0 2006.229.04:27:49.19#ibcon#read 6, iclass 4, count 0 2006.229.04:27:49.19#ibcon#end of sib2, iclass 4, count 0 2006.229.04:27:49.19#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:27:49.19#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:27:49.19#ibcon#[25=USB\r\n] 2006.229.04:27:49.19#ibcon#*before write, iclass 4, count 0 2006.229.04:27:49.19#ibcon#enter sib2, iclass 4, count 0 2006.229.04:27:49.19#ibcon#flushed, iclass 4, count 0 2006.229.04:27:49.19#ibcon#about to write, iclass 4, count 0 2006.229.04:27:49.19#ibcon#wrote, iclass 4, count 0 2006.229.04:27:49.19#ibcon#about to read 3, iclass 4, count 0 2006.229.04:27:49.22#ibcon#read 3, iclass 4, count 0 2006.229.04:27:49.22#ibcon#about to read 4, iclass 4, count 0 2006.229.04:27:49.22#ibcon#read 4, iclass 4, count 0 2006.229.04:27:49.22#ibcon#about to read 5, iclass 4, count 0 2006.229.04:27:49.22#ibcon#read 5, iclass 4, count 0 2006.229.04:27:49.22#ibcon#about to read 6, iclass 4, count 0 2006.229.04:27:49.22#ibcon#read 6, iclass 4, count 0 2006.229.04:27:49.22#ibcon#end of sib2, iclass 4, count 0 2006.229.04:27:49.22#ibcon#*after write, iclass 4, count 0 2006.229.04:27:49.22#ibcon#*before return 0, iclass 4, count 0 2006.229.04:27:49.22#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:49.22#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:49.22#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:27:49.22#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:27:49.22$vck44/valo=7,864.99 2006.229.04:27:49.22#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.04:27:49.23#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.04:27:49.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:49.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:49.23#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:49.23#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:49.23#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:27:49.23#ibcon#first serial, iclass 6, count 0 2006.229.04:27:49.23#ibcon#enter sib2, iclass 6, count 0 2006.229.04:27:49.23#ibcon#flushed, iclass 6, count 0 2006.229.04:27:49.23#ibcon#about to write, iclass 6, count 0 2006.229.04:27:49.23#ibcon#wrote, iclass 6, count 0 2006.229.04:27:49.23#ibcon#about to read 3, iclass 6, count 0 2006.229.04:27:49.24#ibcon#read 3, iclass 6, count 0 2006.229.04:27:49.24#ibcon#about to read 4, iclass 6, count 0 2006.229.04:27:49.24#ibcon#read 4, iclass 6, count 0 2006.229.04:27:49.24#ibcon#about to read 5, iclass 6, count 0 2006.229.04:27:49.24#ibcon#read 5, iclass 6, count 0 2006.229.04:27:49.24#ibcon#about to read 6, iclass 6, count 0 2006.229.04:27:49.24#ibcon#read 6, iclass 6, count 0 2006.229.04:27:49.24#ibcon#end of sib2, iclass 6, count 0 2006.229.04:27:49.24#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:27:49.24#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:27:49.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:27:49.24#ibcon#*before write, iclass 6, count 0 2006.229.04:27:49.24#ibcon#enter sib2, iclass 6, count 0 2006.229.04:27:49.24#ibcon#flushed, iclass 6, count 0 2006.229.04:27:49.24#ibcon#about to write, iclass 6, count 0 2006.229.04:27:49.24#ibcon#wrote, iclass 6, count 0 2006.229.04:27:49.24#ibcon#about to read 3, iclass 6, count 0 2006.229.04:27:49.28#ibcon#read 3, iclass 6, count 0 2006.229.04:27:49.28#ibcon#about to read 4, iclass 6, count 0 2006.229.04:27:49.28#ibcon#read 4, iclass 6, count 0 2006.229.04:27:49.28#ibcon#about to read 5, iclass 6, count 0 2006.229.04:27:49.28#ibcon#read 5, iclass 6, count 0 2006.229.04:27:49.28#ibcon#about to read 6, iclass 6, count 0 2006.229.04:27:49.28#ibcon#read 6, iclass 6, count 0 2006.229.04:27:49.28#ibcon#end of sib2, iclass 6, count 0 2006.229.04:27:49.28#ibcon#*after write, iclass 6, count 0 2006.229.04:27:49.28#ibcon#*before return 0, iclass 6, count 0 2006.229.04:27:49.28#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:49.28#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:49.28#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:27:49.28#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:27:49.28$vck44/va=7,5 2006.229.04:27:49.29#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.04:27:49.29#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.04:27:49.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:49.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:49.33#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:49.33#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:49.33#ibcon#enter wrdev, iclass 10, count 2 2006.229.04:27:49.33#ibcon#first serial, iclass 10, count 2 2006.229.04:27:49.33#ibcon#enter sib2, iclass 10, count 2 2006.229.04:27:49.33#ibcon#flushed, iclass 10, count 2 2006.229.04:27:49.33#ibcon#about to write, iclass 10, count 2 2006.229.04:27:49.33#ibcon#wrote, iclass 10, count 2 2006.229.04:27:49.33#ibcon#about to read 3, iclass 10, count 2 2006.229.04:27:49.35#ibcon#read 3, iclass 10, count 2 2006.229.04:27:49.35#ibcon#about to read 4, iclass 10, count 2 2006.229.04:27:49.35#ibcon#read 4, iclass 10, count 2 2006.229.04:27:49.35#ibcon#about to read 5, iclass 10, count 2 2006.229.04:27:49.35#ibcon#read 5, iclass 10, count 2 2006.229.04:27:49.35#ibcon#about to read 6, iclass 10, count 2 2006.229.04:27:49.35#ibcon#read 6, iclass 10, count 2 2006.229.04:27:49.35#ibcon#end of sib2, iclass 10, count 2 2006.229.04:27:49.35#ibcon#*mode == 0, iclass 10, count 2 2006.229.04:27:49.35#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.04:27:49.35#ibcon#[25=AT07-05\r\n] 2006.229.04:27:49.35#ibcon#*before write, iclass 10, count 2 2006.229.04:27:49.35#ibcon#enter sib2, iclass 10, count 2 2006.229.04:27:49.35#ibcon#flushed, iclass 10, count 2 2006.229.04:27:49.35#ibcon#about to write, iclass 10, count 2 2006.229.04:27:49.35#ibcon#wrote, iclass 10, count 2 2006.229.04:27:49.35#ibcon#about to read 3, iclass 10, count 2 2006.229.04:27:49.38#ibcon#read 3, iclass 10, count 2 2006.229.04:27:49.38#ibcon#about to read 4, iclass 10, count 2 2006.229.04:27:49.38#ibcon#read 4, iclass 10, count 2 2006.229.04:27:49.38#ibcon#about to read 5, iclass 10, count 2 2006.229.04:27:49.38#ibcon#read 5, iclass 10, count 2 2006.229.04:27:49.38#ibcon#about to read 6, iclass 10, count 2 2006.229.04:27:49.38#ibcon#read 6, iclass 10, count 2 2006.229.04:27:49.38#ibcon#end of sib2, iclass 10, count 2 2006.229.04:27:49.38#ibcon#*after write, iclass 10, count 2 2006.229.04:27:49.38#ibcon#*before return 0, iclass 10, count 2 2006.229.04:27:49.38#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:49.38#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:49.38#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.04:27:49.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:49.38#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:49.50#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:49.50#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:49.50#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:27:49.50#ibcon#first serial, iclass 10, count 0 2006.229.04:27:49.50#ibcon#enter sib2, iclass 10, count 0 2006.229.04:27:49.50#ibcon#flushed, iclass 10, count 0 2006.229.04:27:49.50#ibcon#about to write, iclass 10, count 0 2006.229.04:27:49.50#ibcon#wrote, iclass 10, count 0 2006.229.04:27:49.50#ibcon#about to read 3, iclass 10, count 0 2006.229.04:27:49.52#ibcon#read 3, iclass 10, count 0 2006.229.04:27:49.52#ibcon#about to read 4, iclass 10, count 0 2006.229.04:27:49.52#ibcon#read 4, iclass 10, count 0 2006.229.04:27:49.52#ibcon#about to read 5, iclass 10, count 0 2006.229.04:27:49.52#ibcon#read 5, iclass 10, count 0 2006.229.04:27:49.52#ibcon#about to read 6, iclass 10, count 0 2006.229.04:27:49.52#ibcon#read 6, iclass 10, count 0 2006.229.04:27:49.52#ibcon#end of sib2, iclass 10, count 0 2006.229.04:27:49.52#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:27:49.52#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:27:49.52#ibcon#[25=USB\r\n] 2006.229.04:27:49.52#ibcon#*before write, iclass 10, count 0 2006.229.04:27:49.52#ibcon#enter sib2, iclass 10, count 0 2006.229.04:27:49.52#ibcon#flushed, iclass 10, count 0 2006.229.04:27:49.52#ibcon#about to write, iclass 10, count 0 2006.229.04:27:49.52#ibcon#wrote, iclass 10, count 0 2006.229.04:27:49.52#ibcon#about to read 3, iclass 10, count 0 2006.229.04:27:49.55#ibcon#read 3, iclass 10, count 0 2006.229.04:27:49.55#ibcon#about to read 4, iclass 10, count 0 2006.229.04:27:49.55#ibcon#read 4, iclass 10, count 0 2006.229.04:27:49.55#ibcon#about to read 5, iclass 10, count 0 2006.229.04:27:49.55#ibcon#read 5, iclass 10, count 0 2006.229.04:27:49.55#ibcon#about to read 6, iclass 10, count 0 2006.229.04:27:49.55#ibcon#read 6, iclass 10, count 0 2006.229.04:27:49.55#ibcon#end of sib2, iclass 10, count 0 2006.229.04:27:49.55#ibcon#*after write, iclass 10, count 0 2006.229.04:27:49.55#ibcon#*before return 0, iclass 10, count 0 2006.229.04:27:49.55#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:49.55#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:49.55#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:27:49.55#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:27:49.55$vck44/valo=8,884.99 2006.229.04:27:49.55#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:27:49.56#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:27:49.56#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:49.56#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:49.56#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:49.56#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:49.56#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:27:49.56#ibcon#first serial, iclass 12, count 0 2006.229.04:27:49.56#ibcon#enter sib2, iclass 12, count 0 2006.229.04:27:49.56#ibcon#flushed, iclass 12, count 0 2006.229.04:27:49.56#ibcon#about to write, iclass 12, count 0 2006.229.04:27:49.56#ibcon#wrote, iclass 12, count 0 2006.229.04:27:49.56#ibcon#about to read 3, iclass 12, count 0 2006.229.04:27:49.57#ibcon#read 3, iclass 12, count 0 2006.229.04:27:49.57#ibcon#about to read 4, iclass 12, count 0 2006.229.04:27:49.57#ibcon#read 4, iclass 12, count 0 2006.229.04:27:49.57#ibcon#about to read 5, iclass 12, count 0 2006.229.04:27:49.57#ibcon#read 5, iclass 12, count 0 2006.229.04:27:49.57#ibcon#about to read 6, iclass 12, count 0 2006.229.04:27:49.57#ibcon#read 6, iclass 12, count 0 2006.229.04:27:49.57#ibcon#end of sib2, iclass 12, count 0 2006.229.04:27:49.57#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:27:49.57#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:27:49.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:27:49.57#ibcon#*before write, iclass 12, count 0 2006.229.04:27:49.57#ibcon#enter sib2, iclass 12, count 0 2006.229.04:27:49.57#ibcon#flushed, iclass 12, count 0 2006.229.04:27:49.57#ibcon#about to write, iclass 12, count 0 2006.229.04:27:49.57#ibcon#wrote, iclass 12, count 0 2006.229.04:27:49.57#ibcon#about to read 3, iclass 12, count 0 2006.229.04:27:49.61#ibcon#read 3, iclass 12, count 0 2006.229.04:27:49.61#ibcon#about to read 4, iclass 12, count 0 2006.229.04:27:49.61#ibcon#read 4, iclass 12, count 0 2006.229.04:27:49.61#ibcon#about to read 5, iclass 12, count 0 2006.229.04:27:49.61#ibcon#read 5, iclass 12, count 0 2006.229.04:27:49.61#ibcon#about to read 6, iclass 12, count 0 2006.229.04:27:49.61#ibcon#read 6, iclass 12, count 0 2006.229.04:27:49.61#ibcon#end of sib2, iclass 12, count 0 2006.229.04:27:49.61#ibcon#*after write, iclass 12, count 0 2006.229.04:27:49.61#ibcon#*before return 0, iclass 12, count 0 2006.229.04:27:49.61#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:49.61#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:49.61#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:27:49.61#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:27:49.61$vck44/va=8,6 2006.229.04:27:49.61#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.04:27:49.61#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.04:27:49.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:49.62#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:27:49.67#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:27:49.67#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:27:49.67#ibcon#enter wrdev, iclass 14, count 2 2006.229.04:27:49.67#ibcon#first serial, iclass 14, count 2 2006.229.04:27:49.67#ibcon#enter sib2, iclass 14, count 2 2006.229.04:27:49.67#ibcon#flushed, iclass 14, count 2 2006.229.04:27:49.67#ibcon#about to write, iclass 14, count 2 2006.229.04:27:49.67#ibcon#wrote, iclass 14, count 2 2006.229.04:27:49.67#ibcon#about to read 3, iclass 14, count 2 2006.229.04:27:49.69#ibcon#read 3, iclass 14, count 2 2006.229.04:27:49.69#ibcon#about to read 4, iclass 14, count 2 2006.229.04:27:49.69#ibcon#read 4, iclass 14, count 2 2006.229.04:27:49.69#ibcon#about to read 5, iclass 14, count 2 2006.229.04:27:49.69#ibcon#read 5, iclass 14, count 2 2006.229.04:27:49.69#ibcon#about to read 6, iclass 14, count 2 2006.229.04:27:49.69#ibcon#read 6, iclass 14, count 2 2006.229.04:27:49.69#ibcon#end of sib2, iclass 14, count 2 2006.229.04:27:49.69#ibcon#*mode == 0, iclass 14, count 2 2006.229.04:27:49.69#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.04:27:49.69#ibcon#[25=AT08-06\r\n] 2006.229.04:27:49.69#ibcon#*before write, iclass 14, count 2 2006.229.04:27:49.69#ibcon#enter sib2, iclass 14, count 2 2006.229.04:27:49.69#ibcon#flushed, iclass 14, count 2 2006.229.04:27:49.69#ibcon#about to write, iclass 14, count 2 2006.229.04:27:49.69#ibcon#wrote, iclass 14, count 2 2006.229.04:27:49.69#ibcon#about to read 3, iclass 14, count 2 2006.229.04:27:49.72#ibcon#read 3, iclass 14, count 2 2006.229.04:27:49.72#ibcon#about to read 4, iclass 14, count 2 2006.229.04:27:49.72#ibcon#read 4, iclass 14, count 2 2006.229.04:27:49.72#ibcon#about to read 5, iclass 14, count 2 2006.229.04:27:49.72#ibcon#read 5, iclass 14, count 2 2006.229.04:27:49.72#ibcon#about to read 6, iclass 14, count 2 2006.229.04:27:49.72#ibcon#read 6, iclass 14, count 2 2006.229.04:27:49.72#ibcon#end of sib2, iclass 14, count 2 2006.229.04:27:49.72#ibcon#*after write, iclass 14, count 2 2006.229.04:27:49.72#ibcon#*before return 0, iclass 14, count 2 2006.229.04:27:49.72#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:27:49.72#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:27:49.72#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.04:27:49.72#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:49.72#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:27:49.84#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:27:49.84#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:27:49.84#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:27:49.84#ibcon#first serial, iclass 14, count 0 2006.229.04:27:49.84#ibcon#enter sib2, iclass 14, count 0 2006.229.04:27:49.84#ibcon#flushed, iclass 14, count 0 2006.229.04:27:49.84#ibcon#about to write, iclass 14, count 0 2006.229.04:27:49.84#ibcon#wrote, iclass 14, count 0 2006.229.04:27:49.84#ibcon#about to read 3, iclass 14, count 0 2006.229.04:27:49.86#ibcon#read 3, iclass 14, count 0 2006.229.04:27:49.86#ibcon#about to read 4, iclass 14, count 0 2006.229.04:27:49.86#ibcon#read 4, iclass 14, count 0 2006.229.04:27:49.86#ibcon#about to read 5, iclass 14, count 0 2006.229.04:27:49.86#ibcon#read 5, iclass 14, count 0 2006.229.04:27:49.86#ibcon#about to read 6, iclass 14, count 0 2006.229.04:27:49.86#ibcon#read 6, iclass 14, count 0 2006.229.04:27:49.86#ibcon#end of sib2, iclass 14, count 0 2006.229.04:27:49.86#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:27:49.86#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:27:49.86#ibcon#[25=USB\r\n] 2006.229.04:27:49.86#ibcon#*before write, iclass 14, count 0 2006.229.04:27:49.86#ibcon#enter sib2, iclass 14, count 0 2006.229.04:27:49.86#ibcon#flushed, iclass 14, count 0 2006.229.04:27:49.86#ibcon#about to write, iclass 14, count 0 2006.229.04:27:49.86#ibcon#wrote, iclass 14, count 0 2006.229.04:27:49.86#ibcon#about to read 3, iclass 14, count 0 2006.229.04:27:49.89#ibcon#read 3, iclass 14, count 0 2006.229.04:27:49.89#ibcon#about to read 4, iclass 14, count 0 2006.229.04:27:49.89#ibcon#read 4, iclass 14, count 0 2006.229.04:27:49.89#ibcon#about to read 5, iclass 14, count 0 2006.229.04:27:49.89#ibcon#read 5, iclass 14, count 0 2006.229.04:27:49.89#ibcon#about to read 6, iclass 14, count 0 2006.229.04:27:49.89#ibcon#read 6, iclass 14, count 0 2006.229.04:27:49.89#ibcon#end of sib2, iclass 14, count 0 2006.229.04:27:49.89#ibcon#*after write, iclass 14, count 0 2006.229.04:27:49.89#ibcon#*before return 0, iclass 14, count 0 2006.229.04:27:49.89#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:27:49.89#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:27:49.89#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:27:49.89#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:27:49.89$vck44/vblo=1,629.99 2006.229.04:27:49.89#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.04:27:49.89#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.04:27:49.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:49.90#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:27:49.90#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:27:49.90#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:27:49.90#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:27:49.90#ibcon#first serial, iclass 16, count 0 2006.229.04:27:49.90#ibcon#enter sib2, iclass 16, count 0 2006.229.04:27:49.90#ibcon#flushed, iclass 16, count 0 2006.229.04:27:49.90#ibcon#about to write, iclass 16, count 0 2006.229.04:27:49.90#ibcon#wrote, iclass 16, count 0 2006.229.04:27:49.90#ibcon#about to read 3, iclass 16, count 0 2006.229.04:27:49.91#ibcon#read 3, iclass 16, count 0 2006.229.04:27:49.91#ibcon#about to read 4, iclass 16, count 0 2006.229.04:27:49.91#ibcon#read 4, iclass 16, count 0 2006.229.04:27:49.91#ibcon#about to read 5, iclass 16, count 0 2006.229.04:27:49.91#ibcon#read 5, iclass 16, count 0 2006.229.04:27:49.91#ibcon#about to read 6, iclass 16, count 0 2006.229.04:27:49.91#ibcon#read 6, iclass 16, count 0 2006.229.04:27:49.91#ibcon#end of sib2, iclass 16, count 0 2006.229.04:27:49.91#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:27:49.91#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:27:49.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:27:49.91#ibcon#*before write, iclass 16, count 0 2006.229.04:27:49.91#ibcon#enter sib2, iclass 16, count 0 2006.229.04:27:49.91#ibcon#flushed, iclass 16, count 0 2006.229.04:27:49.91#ibcon#about to write, iclass 16, count 0 2006.229.04:27:49.91#ibcon#wrote, iclass 16, count 0 2006.229.04:27:49.91#ibcon#about to read 3, iclass 16, count 0 2006.229.04:27:49.95#ibcon#read 3, iclass 16, count 0 2006.229.04:27:49.95#ibcon#about to read 4, iclass 16, count 0 2006.229.04:27:49.95#ibcon#read 4, iclass 16, count 0 2006.229.04:27:49.95#ibcon#about to read 5, iclass 16, count 0 2006.229.04:27:49.95#ibcon#read 5, iclass 16, count 0 2006.229.04:27:49.95#ibcon#about to read 6, iclass 16, count 0 2006.229.04:27:49.95#ibcon#read 6, iclass 16, count 0 2006.229.04:27:49.95#ibcon#end of sib2, iclass 16, count 0 2006.229.04:27:49.95#ibcon#*after write, iclass 16, count 0 2006.229.04:27:49.95#ibcon#*before return 0, iclass 16, count 0 2006.229.04:27:49.95#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:27:49.95#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:27:49.95#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:27:49.95#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:27:49.95$vck44/vb=1,4 2006.229.04:27:49.95#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.04:27:49.95#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.04:27:49.95#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:49.95#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:27:49.95#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:27:49.95#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:27:49.96#ibcon#enter wrdev, iclass 18, count 2 2006.229.04:27:49.96#ibcon#first serial, iclass 18, count 2 2006.229.04:27:49.96#ibcon#enter sib2, iclass 18, count 2 2006.229.04:27:49.96#ibcon#flushed, iclass 18, count 2 2006.229.04:27:49.96#ibcon#about to write, iclass 18, count 2 2006.229.04:27:49.96#ibcon#wrote, iclass 18, count 2 2006.229.04:27:49.96#ibcon#about to read 3, iclass 18, count 2 2006.229.04:27:49.97#ibcon#read 3, iclass 18, count 2 2006.229.04:27:49.97#ibcon#about to read 4, iclass 18, count 2 2006.229.04:27:49.97#ibcon#read 4, iclass 18, count 2 2006.229.04:27:49.97#ibcon#about to read 5, iclass 18, count 2 2006.229.04:27:49.97#ibcon#read 5, iclass 18, count 2 2006.229.04:27:49.97#ibcon#about to read 6, iclass 18, count 2 2006.229.04:27:49.97#ibcon#read 6, iclass 18, count 2 2006.229.04:27:49.97#ibcon#end of sib2, iclass 18, count 2 2006.229.04:27:49.97#ibcon#*mode == 0, iclass 18, count 2 2006.229.04:27:49.97#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.04:27:49.97#ibcon#[27=AT01-04\r\n] 2006.229.04:27:49.97#ibcon#*before write, iclass 18, count 2 2006.229.04:27:49.97#ibcon#enter sib2, iclass 18, count 2 2006.229.04:27:49.97#ibcon#flushed, iclass 18, count 2 2006.229.04:27:49.97#ibcon#about to write, iclass 18, count 2 2006.229.04:27:49.97#ibcon#wrote, iclass 18, count 2 2006.229.04:27:49.97#ibcon#about to read 3, iclass 18, count 2 2006.229.04:27:50.00#ibcon#read 3, iclass 18, count 2 2006.229.04:27:50.00#ibcon#about to read 4, iclass 18, count 2 2006.229.04:27:50.00#ibcon#read 4, iclass 18, count 2 2006.229.04:27:50.00#ibcon#about to read 5, iclass 18, count 2 2006.229.04:27:50.00#ibcon#read 5, iclass 18, count 2 2006.229.04:27:50.00#ibcon#about to read 6, iclass 18, count 2 2006.229.04:27:50.00#ibcon#read 6, iclass 18, count 2 2006.229.04:27:50.00#ibcon#end of sib2, iclass 18, count 2 2006.229.04:27:50.00#ibcon#*after write, iclass 18, count 2 2006.229.04:27:50.00#ibcon#*before return 0, iclass 18, count 2 2006.229.04:27:50.00#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:27:50.00#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:27:50.00#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.04:27:50.00#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:50.00#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:27:50.12#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:27:50.12#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:27:50.12#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:27:50.12#ibcon#first serial, iclass 18, count 0 2006.229.04:27:50.12#ibcon#enter sib2, iclass 18, count 0 2006.229.04:27:50.12#ibcon#flushed, iclass 18, count 0 2006.229.04:27:50.12#ibcon#about to write, iclass 18, count 0 2006.229.04:27:50.12#ibcon#wrote, iclass 18, count 0 2006.229.04:27:50.12#ibcon#about to read 3, iclass 18, count 0 2006.229.04:27:50.14#ibcon#read 3, iclass 18, count 0 2006.229.04:27:50.14#ibcon#about to read 4, iclass 18, count 0 2006.229.04:27:50.14#ibcon#read 4, iclass 18, count 0 2006.229.04:27:50.14#ibcon#about to read 5, iclass 18, count 0 2006.229.04:27:50.14#ibcon#read 5, iclass 18, count 0 2006.229.04:27:50.14#ibcon#about to read 6, iclass 18, count 0 2006.229.04:27:50.14#ibcon#read 6, iclass 18, count 0 2006.229.04:27:50.14#ibcon#end of sib2, iclass 18, count 0 2006.229.04:27:50.14#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:27:50.14#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:27:50.14#ibcon#[27=USB\r\n] 2006.229.04:27:50.14#ibcon#*before write, iclass 18, count 0 2006.229.04:27:50.14#ibcon#enter sib2, iclass 18, count 0 2006.229.04:27:50.14#ibcon#flushed, iclass 18, count 0 2006.229.04:27:50.14#ibcon#about to write, iclass 18, count 0 2006.229.04:27:50.14#ibcon#wrote, iclass 18, count 0 2006.229.04:27:50.14#ibcon#about to read 3, iclass 18, count 0 2006.229.04:27:50.17#ibcon#read 3, iclass 18, count 0 2006.229.04:27:50.17#ibcon#about to read 4, iclass 18, count 0 2006.229.04:27:50.17#ibcon#read 4, iclass 18, count 0 2006.229.04:27:50.17#ibcon#about to read 5, iclass 18, count 0 2006.229.04:27:50.17#ibcon#read 5, iclass 18, count 0 2006.229.04:27:50.17#ibcon#about to read 6, iclass 18, count 0 2006.229.04:27:50.17#ibcon#read 6, iclass 18, count 0 2006.229.04:27:50.17#ibcon#end of sib2, iclass 18, count 0 2006.229.04:27:50.17#ibcon#*after write, iclass 18, count 0 2006.229.04:27:50.17#ibcon#*before return 0, iclass 18, count 0 2006.229.04:27:50.17#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:27:50.17#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:27:50.17#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:27:50.17#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:27:50.17$vck44/vblo=2,634.99 2006.229.04:27:50.18#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.04:27:50.18#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.04:27:50.18#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:50.18#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:50.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:50.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:50.18#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:27:50.18#ibcon#first serial, iclass 20, count 0 2006.229.04:27:50.18#ibcon#enter sib2, iclass 20, count 0 2006.229.04:27:50.18#ibcon#flushed, iclass 20, count 0 2006.229.04:27:50.18#ibcon#about to write, iclass 20, count 0 2006.229.04:27:50.18#ibcon#wrote, iclass 20, count 0 2006.229.04:27:50.18#ibcon#about to read 3, iclass 20, count 0 2006.229.04:27:50.19#ibcon#read 3, iclass 20, count 0 2006.229.04:27:50.19#ibcon#about to read 4, iclass 20, count 0 2006.229.04:27:50.19#ibcon#read 4, iclass 20, count 0 2006.229.04:27:50.19#ibcon#about to read 5, iclass 20, count 0 2006.229.04:27:50.19#ibcon#read 5, iclass 20, count 0 2006.229.04:27:50.19#ibcon#about to read 6, iclass 20, count 0 2006.229.04:27:50.19#ibcon#read 6, iclass 20, count 0 2006.229.04:27:50.19#ibcon#end of sib2, iclass 20, count 0 2006.229.04:27:50.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:27:50.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:27:50.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:27:50.19#ibcon#*before write, iclass 20, count 0 2006.229.04:27:50.19#ibcon#enter sib2, iclass 20, count 0 2006.229.04:27:50.19#ibcon#flushed, iclass 20, count 0 2006.229.04:27:50.19#ibcon#about to write, iclass 20, count 0 2006.229.04:27:50.19#ibcon#wrote, iclass 20, count 0 2006.229.04:27:50.19#ibcon#about to read 3, iclass 20, count 0 2006.229.04:27:50.23#ibcon#read 3, iclass 20, count 0 2006.229.04:27:50.23#ibcon#about to read 4, iclass 20, count 0 2006.229.04:27:50.23#ibcon#read 4, iclass 20, count 0 2006.229.04:27:50.23#ibcon#about to read 5, iclass 20, count 0 2006.229.04:27:50.23#ibcon#read 5, iclass 20, count 0 2006.229.04:27:50.23#ibcon#about to read 6, iclass 20, count 0 2006.229.04:27:50.23#ibcon#read 6, iclass 20, count 0 2006.229.04:27:50.23#ibcon#end of sib2, iclass 20, count 0 2006.229.04:27:50.23#ibcon#*after write, iclass 20, count 0 2006.229.04:27:50.23#ibcon#*before return 0, iclass 20, count 0 2006.229.04:27:50.23#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:50.23#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:27:50.23#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:27:50.23#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:27:50.23$vck44/vb=2,4 2006.229.04:27:50.23#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.04:27:50.23#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.04:27:50.23#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:50.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:50.28#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:50.28#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:50.28#ibcon#enter wrdev, iclass 22, count 2 2006.229.04:27:50.28#ibcon#first serial, iclass 22, count 2 2006.229.04:27:50.28#ibcon#enter sib2, iclass 22, count 2 2006.229.04:27:50.28#ibcon#flushed, iclass 22, count 2 2006.229.04:27:50.28#ibcon#about to write, iclass 22, count 2 2006.229.04:27:50.28#ibcon#wrote, iclass 22, count 2 2006.229.04:27:50.28#ibcon#about to read 3, iclass 22, count 2 2006.229.04:27:50.30#ibcon#read 3, iclass 22, count 2 2006.229.04:27:50.30#ibcon#about to read 4, iclass 22, count 2 2006.229.04:27:50.30#ibcon#read 4, iclass 22, count 2 2006.229.04:27:50.30#ibcon#about to read 5, iclass 22, count 2 2006.229.04:27:50.30#ibcon#read 5, iclass 22, count 2 2006.229.04:27:50.30#ibcon#about to read 6, iclass 22, count 2 2006.229.04:27:50.30#ibcon#read 6, iclass 22, count 2 2006.229.04:27:50.30#ibcon#end of sib2, iclass 22, count 2 2006.229.04:27:50.30#ibcon#*mode == 0, iclass 22, count 2 2006.229.04:27:50.30#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.04:27:50.30#ibcon#[27=AT02-04\r\n] 2006.229.04:27:50.30#ibcon#*before write, iclass 22, count 2 2006.229.04:27:50.30#ibcon#enter sib2, iclass 22, count 2 2006.229.04:27:50.30#ibcon#flushed, iclass 22, count 2 2006.229.04:27:50.30#ibcon#about to write, iclass 22, count 2 2006.229.04:27:50.30#ibcon#wrote, iclass 22, count 2 2006.229.04:27:50.30#ibcon#about to read 3, iclass 22, count 2 2006.229.04:27:50.33#ibcon#read 3, iclass 22, count 2 2006.229.04:27:50.33#ibcon#about to read 4, iclass 22, count 2 2006.229.04:27:50.33#ibcon#read 4, iclass 22, count 2 2006.229.04:27:50.33#ibcon#about to read 5, iclass 22, count 2 2006.229.04:27:50.33#ibcon#read 5, iclass 22, count 2 2006.229.04:27:50.33#ibcon#about to read 6, iclass 22, count 2 2006.229.04:27:50.33#ibcon#read 6, iclass 22, count 2 2006.229.04:27:50.33#ibcon#end of sib2, iclass 22, count 2 2006.229.04:27:50.33#ibcon#*after write, iclass 22, count 2 2006.229.04:27:50.33#ibcon#*before return 0, iclass 22, count 2 2006.229.04:27:50.33#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:50.33#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:27:50.33#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.04:27:50.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:50.33#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:50.45#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:50.45#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:50.45#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:27:50.45#ibcon#first serial, iclass 22, count 0 2006.229.04:27:50.45#ibcon#enter sib2, iclass 22, count 0 2006.229.04:27:50.45#ibcon#flushed, iclass 22, count 0 2006.229.04:27:50.45#ibcon#about to write, iclass 22, count 0 2006.229.04:27:50.45#ibcon#wrote, iclass 22, count 0 2006.229.04:27:50.45#ibcon#about to read 3, iclass 22, count 0 2006.229.04:27:50.47#ibcon#read 3, iclass 22, count 0 2006.229.04:27:50.47#ibcon#about to read 4, iclass 22, count 0 2006.229.04:27:50.47#ibcon#read 4, iclass 22, count 0 2006.229.04:27:50.47#ibcon#about to read 5, iclass 22, count 0 2006.229.04:27:50.47#ibcon#read 5, iclass 22, count 0 2006.229.04:27:50.47#ibcon#about to read 6, iclass 22, count 0 2006.229.04:27:50.47#ibcon#read 6, iclass 22, count 0 2006.229.04:27:50.47#ibcon#end of sib2, iclass 22, count 0 2006.229.04:27:50.47#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:27:50.47#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:27:50.47#ibcon#[27=USB\r\n] 2006.229.04:27:50.47#ibcon#*before write, iclass 22, count 0 2006.229.04:27:50.47#ibcon#enter sib2, iclass 22, count 0 2006.229.04:27:50.47#ibcon#flushed, iclass 22, count 0 2006.229.04:27:50.47#ibcon#about to write, iclass 22, count 0 2006.229.04:27:50.47#ibcon#wrote, iclass 22, count 0 2006.229.04:27:50.47#ibcon#about to read 3, iclass 22, count 0 2006.229.04:27:50.50#ibcon#read 3, iclass 22, count 0 2006.229.04:27:50.50#ibcon#about to read 4, iclass 22, count 0 2006.229.04:27:50.50#ibcon#read 4, iclass 22, count 0 2006.229.04:27:50.50#ibcon#about to read 5, iclass 22, count 0 2006.229.04:27:50.50#ibcon#read 5, iclass 22, count 0 2006.229.04:27:50.50#ibcon#about to read 6, iclass 22, count 0 2006.229.04:27:50.50#ibcon#read 6, iclass 22, count 0 2006.229.04:27:50.50#ibcon#end of sib2, iclass 22, count 0 2006.229.04:27:50.50#ibcon#*after write, iclass 22, count 0 2006.229.04:27:50.50#ibcon#*before return 0, iclass 22, count 0 2006.229.04:27:50.50#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:50.50#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:27:50.50#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:27:50.50#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:27:50.50$vck44/vblo=3,649.99 2006.229.04:27:50.51#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.04:27:50.51#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.04:27:50.51#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:50.51#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:50.51#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:50.51#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:50.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:27:50.51#ibcon#first serial, iclass 24, count 0 2006.229.04:27:50.51#ibcon#enter sib2, iclass 24, count 0 2006.229.04:27:50.51#ibcon#flushed, iclass 24, count 0 2006.229.04:27:50.51#ibcon#about to write, iclass 24, count 0 2006.229.04:27:50.51#ibcon#wrote, iclass 24, count 0 2006.229.04:27:50.51#ibcon#about to read 3, iclass 24, count 0 2006.229.04:27:50.52#ibcon#read 3, iclass 24, count 0 2006.229.04:27:50.52#ibcon#about to read 4, iclass 24, count 0 2006.229.04:27:50.52#ibcon#read 4, iclass 24, count 0 2006.229.04:27:50.52#ibcon#about to read 5, iclass 24, count 0 2006.229.04:27:50.52#ibcon#read 5, iclass 24, count 0 2006.229.04:27:50.52#ibcon#about to read 6, iclass 24, count 0 2006.229.04:27:50.52#ibcon#read 6, iclass 24, count 0 2006.229.04:27:50.52#ibcon#end of sib2, iclass 24, count 0 2006.229.04:27:50.52#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:27:50.52#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:27:50.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:27:50.52#ibcon#*before write, iclass 24, count 0 2006.229.04:27:50.52#ibcon#enter sib2, iclass 24, count 0 2006.229.04:27:50.52#ibcon#flushed, iclass 24, count 0 2006.229.04:27:50.52#ibcon#about to write, iclass 24, count 0 2006.229.04:27:50.52#ibcon#wrote, iclass 24, count 0 2006.229.04:27:50.52#ibcon#about to read 3, iclass 24, count 0 2006.229.04:27:50.56#ibcon#read 3, iclass 24, count 0 2006.229.04:27:50.56#ibcon#about to read 4, iclass 24, count 0 2006.229.04:27:50.56#ibcon#read 4, iclass 24, count 0 2006.229.04:27:50.56#ibcon#about to read 5, iclass 24, count 0 2006.229.04:27:50.56#ibcon#read 5, iclass 24, count 0 2006.229.04:27:50.56#ibcon#about to read 6, iclass 24, count 0 2006.229.04:27:50.56#ibcon#read 6, iclass 24, count 0 2006.229.04:27:50.56#ibcon#end of sib2, iclass 24, count 0 2006.229.04:27:50.56#ibcon#*after write, iclass 24, count 0 2006.229.04:27:50.56#ibcon#*before return 0, iclass 24, count 0 2006.229.04:27:50.56#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:50.56#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:27:50.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:27:50.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:27:50.57$vck44/vb=3,4 2006.229.04:27:50.57#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.04:27:50.57#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.04:27:50.57#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:50.57#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:50.61#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:50.61#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:50.61#ibcon#enter wrdev, iclass 26, count 2 2006.229.04:27:50.61#ibcon#first serial, iclass 26, count 2 2006.229.04:27:50.61#ibcon#enter sib2, iclass 26, count 2 2006.229.04:27:50.61#ibcon#flushed, iclass 26, count 2 2006.229.04:27:50.61#ibcon#about to write, iclass 26, count 2 2006.229.04:27:50.61#ibcon#wrote, iclass 26, count 2 2006.229.04:27:50.61#ibcon#about to read 3, iclass 26, count 2 2006.229.04:27:50.63#ibcon#read 3, iclass 26, count 2 2006.229.04:27:50.63#ibcon#about to read 4, iclass 26, count 2 2006.229.04:27:50.63#ibcon#read 4, iclass 26, count 2 2006.229.04:27:50.63#ibcon#about to read 5, iclass 26, count 2 2006.229.04:27:50.63#ibcon#read 5, iclass 26, count 2 2006.229.04:27:50.63#ibcon#about to read 6, iclass 26, count 2 2006.229.04:27:50.63#ibcon#read 6, iclass 26, count 2 2006.229.04:27:50.63#ibcon#end of sib2, iclass 26, count 2 2006.229.04:27:50.63#ibcon#*mode == 0, iclass 26, count 2 2006.229.04:27:50.63#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.04:27:50.63#ibcon#[27=AT03-04\r\n] 2006.229.04:27:50.63#ibcon#*before write, iclass 26, count 2 2006.229.04:27:50.63#ibcon#enter sib2, iclass 26, count 2 2006.229.04:27:50.63#ibcon#flushed, iclass 26, count 2 2006.229.04:27:50.63#ibcon#about to write, iclass 26, count 2 2006.229.04:27:50.63#ibcon#wrote, iclass 26, count 2 2006.229.04:27:50.63#ibcon#about to read 3, iclass 26, count 2 2006.229.04:27:50.66#ibcon#read 3, iclass 26, count 2 2006.229.04:27:50.66#ibcon#about to read 4, iclass 26, count 2 2006.229.04:27:50.66#ibcon#read 4, iclass 26, count 2 2006.229.04:27:50.66#ibcon#about to read 5, iclass 26, count 2 2006.229.04:27:50.66#ibcon#read 5, iclass 26, count 2 2006.229.04:27:50.66#ibcon#about to read 6, iclass 26, count 2 2006.229.04:27:50.66#ibcon#read 6, iclass 26, count 2 2006.229.04:27:50.66#ibcon#end of sib2, iclass 26, count 2 2006.229.04:27:50.66#ibcon#*after write, iclass 26, count 2 2006.229.04:27:50.66#ibcon#*before return 0, iclass 26, count 2 2006.229.04:27:50.66#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:50.66#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:27:50.66#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.04:27:50.66#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:50.66#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:50.78#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:50.78#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:50.78#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:27:50.78#ibcon#first serial, iclass 26, count 0 2006.229.04:27:50.78#ibcon#enter sib2, iclass 26, count 0 2006.229.04:27:50.78#ibcon#flushed, iclass 26, count 0 2006.229.04:27:50.78#ibcon#about to write, iclass 26, count 0 2006.229.04:27:50.78#ibcon#wrote, iclass 26, count 0 2006.229.04:27:50.78#ibcon#about to read 3, iclass 26, count 0 2006.229.04:27:50.80#ibcon#read 3, iclass 26, count 0 2006.229.04:27:50.80#ibcon#about to read 4, iclass 26, count 0 2006.229.04:27:50.80#ibcon#read 4, iclass 26, count 0 2006.229.04:27:50.80#ibcon#about to read 5, iclass 26, count 0 2006.229.04:27:50.80#ibcon#read 5, iclass 26, count 0 2006.229.04:27:50.80#ibcon#about to read 6, iclass 26, count 0 2006.229.04:27:50.80#ibcon#read 6, iclass 26, count 0 2006.229.04:27:50.80#ibcon#end of sib2, iclass 26, count 0 2006.229.04:27:50.80#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:27:50.80#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:27:50.80#ibcon#[27=USB\r\n] 2006.229.04:27:50.80#ibcon#*before write, iclass 26, count 0 2006.229.04:27:50.80#ibcon#enter sib2, iclass 26, count 0 2006.229.04:27:50.80#ibcon#flushed, iclass 26, count 0 2006.229.04:27:50.80#ibcon#about to write, iclass 26, count 0 2006.229.04:27:50.80#ibcon#wrote, iclass 26, count 0 2006.229.04:27:50.80#ibcon#about to read 3, iclass 26, count 0 2006.229.04:27:50.83#ibcon#read 3, iclass 26, count 0 2006.229.04:27:50.83#ibcon#about to read 4, iclass 26, count 0 2006.229.04:27:50.83#ibcon#read 4, iclass 26, count 0 2006.229.04:27:50.83#ibcon#about to read 5, iclass 26, count 0 2006.229.04:27:50.83#ibcon#read 5, iclass 26, count 0 2006.229.04:27:50.83#ibcon#about to read 6, iclass 26, count 0 2006.229.04:27:50.83#ibcon#read 6, iclass 26, count 0 2006.229.04:27:50.83#ibcon#end of sib2, iclass 26, count 0 2006.229.04:27:50.83#ibcon#*after write, iclass 26, count 0 2006.229.04:27:50.83#ibcon#*before return 0, iclass 26, count 0 2006.229.04:27:50.83#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:50.83#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:27:50.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:27:50.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:27:50.83$vck44/vblo=4,679.99 2006.229.04:27:50.83#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.04:27:50.83#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.04:27:50.83#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:50.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:50.83#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:50.83#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:50.84#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:27:50.84#ibcon#first serial, iclass 28, count 0 2006.229.04:27:50.84#ibcon#enter sib2, iclass 28, count 0 2006.229.04:27:50.84#ibcon#flushed, iclass 28, count 0 2006.229.04:27:50.84#ibcon#about to write, iclass 28, count 0 2006.229.04:27:50.84#ibcon#wrote, iclass 28, count 0 2006.229.04:27:50.84#ibcon#about to read 3, iclass 28, count 0 2006.229.04:27:50.85#ibcon#read 3, iclass 28, count 0 2006.229.04:27:50.85#ibcon#about to read 4, iclass 28, count 0 2006.229.04:27:50.85#ibcon#read 4, iclass 28, count 0 2006.229.04:27:50.85#ibcon#about to read 5, iclass 28, count 0 2006.229.04:27:50.85#ibcon#read 5, iclass 28, count 0 2006.229.04:27:50.85#ibcon#about to read 6, iclass 28, count 0 2006.229.04:27:50.85#ibcon#read 6, iclass 28, count 0 2006.229.04:27:50.85#ibcon#end of sib2, iclass 28, count 0 2006.229.04:27:50.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:27:50.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:27:50.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:27:50.85#ibcon#*before write, iclass 28, count 0 2006.229.04:27:50.85#ibcon#enter sib2, iclass 28, count 0 2006.229.04:27:50.85#ibcon#flushed, iclass 28, count 0 2006.229.04:27:50.85#ibcon#about to write, iclass 28, count 0 2006.229.04:27:50.85#ibcon#wrote, iclass 28, count 0 2006.229.04:27:50.85#ibcon#about to read 3, iclass 28, count 0 2006.229.04:27:50.89#ibcon#read 3, iclass 28, count 0 2006.229.04:27:50.89#ibcon#about to read 4, iclass 28, count 0 2006.229.04:27:50.89#ibcon#read 4, iclass 28, count 0 2006.229.04:27:50.89#ibcon#about to read 5, iclass 28, count 0 2006.229.04:27:50.89#ibcon#read 5, iclass 28, count 0 2006.229.04:27:50.89#ibcon#about to read 6, iclass 28, count 0 2006.229.04:27:50.89#ibcon#read 6, iclass 28, count 0 2006.229.04:27:50.89#ibcon#end of sib2, iclass 28, count 0 2006.229.04:27:50.89#ibcon#*after write, iclass 28, count 0 2006.229.04:27:50.89#ibcon#*before return 0, iclass 28, count 0 2006.229.04:27:50.89#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:50.89#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:27:50.89#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:27:50.89#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:27:50.89$vck44/vb=4,4 2006.229.04:27:50.89#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.04:27:50.89#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.04:27:50.89#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:50.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:50.94#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:50.94#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:50.94#ibcon#enter wrdev, iclass 30, count 2 2006.229.04:27:50.94#ibcon#first serial, iclass 30, count 2 2006.229.04:27:50.94#ibcon#enter sib2, iclass 30, count 2 2006.229.04:27:50.94#ibcon#flushed, iclass 30, count 2 2006.229.04:27:50.94#ibcon#about to write, iclass 30, count 2 2006.229.04:27:50.94#ibcon#wrote, iclass 30, count 2 2006.229.04:27:50.94#ibcon#about to read 3, iclass 30, count 2 2006.229.04:27:50.96#ibcon#read 3, iclass 30, count 2 2006.229.04:27:50.96#ibcon#about to read 4, iclass 30, count 2 2006.229.04:27:50.96#ibcon#read 4, iclass 30, count 2 2006.229.04:27:50.96#ibcon#about to read 5, iclass 30, count 2 2006.229.04:27:50.96#ibcon#read 5, iclass 30, count 2 2006.229.04:27:50.96#ibcon#about to read 6, iclass 30, count 2 2006.229.04:27:50.96#ibcon#read 6, iclass 30, count 2 2006.229.04:27:50.96#ibcon#end of sib2, iclass 30, count 2 2006.229.04:27:50.96#ibcon#*mode == 0, iclass 30, count 2 2006.229.04:27:50.96#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.04:27:50.96#ibcon#[27=AT04-04\r\n] 2006.229.04:27:50.96#ibcon#*before write, iclass 30, count 2 2006.229.04:27:50.96#ibcon#enter sib2, iclass 30, count 2 2006.229.04:27:50.96#ibcon#flushed, iclass 30, count 2 2006.229.04:27:50.96#ibcon#about to write, iclass 30, count 2 2006.229.04:27:50.96#ibcon#wrote, iclass 30, count 2 2006.229.04:27:50.96#ibcon#about to read 3, iclass 30, count 2 2006.229.04:27:50.99#ibcon#read 3, iclass 30, count 2 2006.229.04:27:50.99#ibcon#about to read 4, iclass 30, count 2 2006.229.04:27:50.99#ibcon#read 4, iclass 30, count 2 2006.229.04:27:50.99#ibcon#about to read 5, iclass 30, count 2 2006.229.04:27:50.99#ibcon#read 5, iclass 30, count 2 2006.229.04:27:50.99#ibcon#about to read 6, iclass 30, count 2 2006.229.04:27:50.99#ibcon#read 6, iclass 30, count 2 2006.229.04:27:50.99#ibcon#end of sib2, iclass 30, count 2 2006.229.04:27:50.99#ibcon#*after write, iclass 30, count 2 2006.229.04:27:50.99#ibcon#*before return 0, iclass 30, count 2 2006.229.04:27:50.99#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:50.99#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:27:50.99#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.04:27:50.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:50.99#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:51.11#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:51.11#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:51.11#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:27:51.11#ibcon#first serial, iclass 30, count 0 2006.229.04:27:51.11#ibcon#enter sib2, iclass 30, count 0 2006.229.04:27:51.11#ibcon#flushed, iclass 30, count 0 2006.229.04:27:51.11#ibcon#about to write, iclass 30, count 0 2006.229.04:27:51.11#ibcon#wrote, iclass 30, count 0 2006.229.04:27:51.11#ibcon#about to read 3, iclass 30, count 0 2006.229.04:27:51.13#ibcon#read 3, iclass 30, count 0 2006.229.04:27:51.13#ibcon#about to read 4, iclass 30, count 0 2006.229.04:27:51.13#ibcon#read 4, iclass 30, count 0 2006.229.04:27:51.13#ibcon#about to read 5, iclass 30, count 0 2006.229.04:27:51.13#ibcon#read 5, iclass 30, count 0 2006.229.04:27:51.13#ibcon#about to read 6, iclass 30, count 0 2006.229.04:27:51.13#ibcon#read 6, iclass 30, count 0 2006.229.04:27:51.13#ibcon#end of sib2, iclass 30, count 0 2006.229.04:27:51.13#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:27:51.13#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:27:51.13#ibcon#[27=USB\r\n] 2006.229.04:27:51.13#ibcon#*before write, iclass 30, count 0 2006.229.04:27:51.13#ibcon#enter sib2, iclass 30, count 0 2006.229.04:27:51.13#ibcon#flushed, iclass 30, count 0 2006.229.04:27:51.13#ibcon#about to write, iclass 30, count 0 2006.229.04:27:51.13#ibcon#wrote, iclass 30, count 0 2006.229.04:27:51.13#ibcon#about to read 3, iclass 30, count 0 2006.229.04:27:51.16#ibcon#read 3, iclass 30, count 0 2006.229.04:27:51.16#ibcon#about to read 4, iclass 30, count 0 2006.229.04:27:51.16#ibcon#read 4, iclass 30, count 0 2006.229.04:27:51.16#ibcon#about to read 5, iclass 30, count 0 2006.229.04:27:51.16#ibcon#read 5, iclass 30, count 0 2006.229.04:27:51.16#ibcon#about to read 6, iclass 30, count 0 2006.229.04:27:51.16#ibcon#read 6, iclass 30, count 0 2006.229.04:27:51.16#ibcon#end of sib2, iclass 30, count 0 2006.229.04:27:51.16#ibcon#*after write, iclass 30, count 0 2006.229.04:27:51.16#ibcon#*before return 0, iclass 30, count 0 2006.229.04:27:51.16#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:51.16#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:27:51.16#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:27:51.16#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:27:51.16$vck44/vblo=5,709.99 2006.229.04:27:51.16#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.04:27:51.16#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.04:27:51.17#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:51.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:51.17#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:51.17#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:51.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:27:51.17#ibcon#first serial, iclass 32, count 0 2006.229.04:27:51.17#ibcon#enter sib2, iclass 32, count 0 2006.229.04:27:51.17#ibcon#flushed, iclass 32, count 0 2006.229.04:27:51.17#ibcon#about to write, iclass 32, count 0 2006.229.04:27:51.17#ibcon#wrote, iclass 32, count 0 2006.229.04:27:51.17#ibcon#about to read 3, iclass 32, count 0 2006.229.04:27:51.18#ibcon#read 3, iclass 32, count 0 2006.229.04:27:51.18#ibcon#about to read 4, iclass 32, count 0 2006.229.04:27:51.18#ibcon#read 4, iclass 32, count 0 2006.229.04:27:51.18#ibcon#about to read 5, iclass 32, count 0 2006.229.04:27:51.18#ibcon#read 5, iclass 32, count 0 2006.229.04:27:51.18#ibcon#about to read 6, iclass 32, count 0 2006.229.04:27:51.18#ibcon#read 6, iclass 32, count 0 2006.229.04:27:51.18#ibcon#end of sib2, iclass 32, count 0 2006.229.04:27:51.18#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:27:51.18#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:27:51.18#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:27:51.18#ibcon#*before write, iclass 32, count 0 2006.229.04:27:51.18#ibcon#enter sib2, iclass 32, count 0 2006.229.04:27:51.18#ibcon#flushed, iclass 32, count 0 2006.229.04:27:51.18#ibcon#about to write, iclass 32, count 0 2006.229.04:27:51.18#ibcon#wrote, iclass 32, count 0 2006.229.04:27:51.18#ibcon#about to read 3, iclass 32, count 0 2006.229.04:27:51.22#ibcon#read 3, iclass 32, count 0 2006.229.04:27:51.22#ibcon#about to read 4, iclass 32, count 0 2006.229.04:27:51.22#ibcon#read 4, iclass 32, count 0 2006.229.04:27:51.22#ibcon#about to read 5, iclass 32, count 0 2006.229.04:27:51.22#ibcon#read 5, iclass 32, count 0 2006.229.04:27:51.22#ibcon#about to read 6, iclass 32, count 0 2006.229.04:27:51.22#ibcon#read 6, iclass 32, count 0 2006.229.04:27:51.22#ibcon#end of sib2, iclass 32, count 0 2006.229.04:27:51.22#ibcon#*after write, iclass 32, count 0 2006.229.04:27:51.22#ibcon#*before return 0, iclass 32, count 0 2006.229.04:27:51.22#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:51.22#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:27:51.22#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:27:51.22#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:27:51.22$vck44/vb=5,4 2006.229.04:27:51.23#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.04:27:51.23#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.04:27:51.23#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:51.23#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:51.27#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:51.27#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:51.27#ibcon#enter wrdev, iclass 34, count 2 2006.229.04:27:51.27#ibcon#first serial, iclass 34, count 2 2006.229.04:27:51.27#ibcon#enter sib2, iclass 34, count 2 2006.229.04:27:51.27#ibcon#flushed, iclass 34, count 2 2006.229.04:27:51.27#ibcon#about to write, iclass 34, count 2 2006.229.04:27:51.27#ibcon#wrote, iclass 34, count 2 2006.229.04:27:51.27#ibcon#about to read 3, iclass 34, count 2 2006.229.04:27:51.29#ibcon#read 3, iclass 34, count 2 2006.229.04:27:51.29#ibcon#about to read 4, iclass 34, count 2 2006.229.04:27:51.29#ibcon#read 4, iclass 34, count 2 2006.229.04:27:51.29#ibcon#about to read 5, iclass 34, count 2 2006.229.04:27:51.29#ibcon#read 5, iclass 34, count 2 2006.229.04:27:51.29#ibcon#about to read 6, iclass 34, count 2 2006.229.04:27:51.29#ibcon#read 6, iclass 34, count 2 2006.229.04:27:51.29#ibcon#end of sib2, iclass 34, count 2 2006.229.04:27:51.29#ibcon#*mode == 0, iclass 34, count 2 2006.229.04:27:51.29#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.04:27:51.29#ibcon#[27=AT05-04\r\n] 2006.229.04:27:51.29#ibcon#*before write, iclass 34, count 2 2006.229.04:27:51.29#ibcon#enter sib2, iclass 34, count 2 2006.229.04:27:51.29#ibcon#flushed, iclass 34, count 2 2006.229.04:27:51.29#ibcon#about to write, iclass 34, count 2 2006.229.04:27:51.29#ibcon#wrote, iclass 34, count 2 2006.229.04:27:51.29#ibcon#about to read 3, iclass 34, count 2 2006.229.04:27:51.32#ibcon#read 3, iclass 34, count 2 2006.229.04:27:51.32#ibcon#about to read 4, iclass 34, count 2 2006.229.04:27:51.32#ibcon#read 4, iclass 34, count 2 2006.229.04:27:51.32#ibcon#about to read 5, iclass 34, count 2 2006.229.04:27:51.32#ibcon#read 5, iclass 34, count 2 2006.229.04:27:51.32#ibcon#about to read 6, iclass 34, count 2 2006.229.04:27:51.32#ibcon#read 6, iclass 34, count 2 2006.229.04:27:51.32#ibcon#end of sib2, iclass 34, count 2 2006.229.04:27:51.32#ibcon#*after write, iclass 34, count 2 2006.229.04:27:51.32#ibcon#*before return 0, iclass 34, count 2 2006.229.04:27:51.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:51.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:27:51.32#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.04:27:51.32#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:51.32#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:51.44#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:51.44#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:51.44#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:27:51.44#ibcon#first serial, iclass 34, count 0 2006.229.04:27:51.44#ibcon#enter sib2, iclass 34, count 0 2006.229.04:27:51.44#ibcon#flushed, iclass 34, count 0 2006.229.04:27:51.44#ibcon#about to write, iclass 34, count 0 2006.229.04:27:51.44#ibcon#wrote, iclass 34, count 0 2006.229.04:27:51.44#ibcon#about to read 3, iclass 34, count 0 2006.229.04:27:51.46#ibcon#read 3, iclass 34, count 0 2006.229.04:27:51.46#ibcon#about to read 4, iclass 34, count 0 2006.229.04:27:51.46#ibcon#read 4, iclass 34, count 0 2006.229.04:27:51.46#ibcon#about to read 5, iclass 34, count 0 2006.229.04:27:51.46#ibcon#read 5, iclass 34, count 0 2006.229.04:27:51.46#ibcon#about to read 6, iclass 34, count 0 2006.229.04:27:51.46#ibcon#read 6, iclass 34, count 0 2006.229.04:27:51.46#ibcon#end of sib2, iclass 34, count 0 2006.229.04:27:51.46#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:27:51.46#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:27:51.46#ibcon#[27=USB\r\n] 2006.229.04:27:51.46#ibcon#*before write, iclass 34, count 0 2006.229.04:27:51.46#ibcon#enter sib2, iclass 34, count 0 2006.229.04:27:51.46#ibcon#flushed, iclass 34, count 0 2006.229.04:27:51.46#ibcon#about to write, iclass 34, count 0 2006.229.04:27:51.46#ibcon#wrote, iclass 34, count 0 2006.229.04:27:51.46#ibcon#about to read 3, iclass 34, count 0 2006.229.04:27:51.49#ibcon#read 3, iclass 34, count 0 2006.229.04:27:51.49#ibcon#about to read 4, iclass 34, count 0 2006.229.04:27:51.49#ibcon#read 4, iclass 34, count 0 2006.229.04:27:51.49#ibcon#about to read 5, iclass 34, count 0 2006.229.04:27:51.49#ibcon#read 5, iclass 34, count 0 2006.229.04:27:51.49#ibcon#about to read 6, iclass 34, count 0 2006.229.04:27:51.49#ibcon#read 6, iclass 34, count 0 2006.229.04:27:51.49#ibcon#end of sib2, iclass 34, count 0 2006.229.04:27:51.49#ibcon#*after write, iclass 34, count 0 2006.229.04:27:51.49#ibcon#*before return 0, iclass 34, count 0 2006.229.04:27:51.49#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:51.49#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:27:51.49#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:27:51.49#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:27:51.49$vck44/vblo=6,719.99 2006.229.04:27:51.50#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:27:51.50#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:27:51.50#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:51.50#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:51.50#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:51.50#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:51.50#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:27:51.50#ibcon#first serial, iclass 36, count 0 2006.229.04:27:51.50#ibcon#enter sib2, iclass 36, count 0 2006.229.04:27:51.50#ibcon#flushed, iclass 36, count 0 2006.229.04:27:51.50#ibcon#about to write, iclass 36, count 0 2006.229.04:27:51.50#ibcon#wrote, iclass 36, count 0 2006.229.04:27:51.50#ibcon#about to read 3, iclass 36, count 0 2006.229.04:27:51.51#ibcon#read 3, iclass 36, count 0 2006.229.04:27:51.51#ibcon#about to read 4, iclass 36, count 0 2006.229.04:27:51.51#ibcon#read 4, iclass 36, count 0 2006.229.04:27:51.51#ibcon#about to read 5, iclass 36, count 0 2006.229.04:27:51.51#ibcon#read 5, iclass 36, count 0 2006.229.04:27:51.51#ibcon#about to read 6, iclass 36, count 0 2006.229.04:27:51.51#ibcon#read 6, iclass 36, count 0 2006.229.04:27:51.51#ibcon#end of sib2, iclass 36, count 0 2006.229.04:27:51.51#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:27:51.51#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:27:51.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:27:51.51#ibcon#*before write, iclass 36, count 0 2006.229.04:27:51.51#ibcon#enter sib2, iclass 36, count 0 2006.229.04:27:51.51#ibcon#flushed, iclass 36, count 0 2006.229.04:27:51.51#ibcon#about to write, iclass 36, count 0 2006.229.04:27:51.51#ibcon#wrote, iclass 36, count 0 2006.229.04:27:51.51#ibcon#about to read 3, iclass 36, count 0 2006.229.04:27:51.55#ibcon#read 3, iclass 36, count 0 2006.229.04:27:51.55#ibcon#about to read 4, iclass 36, count 0 2006.229.04:27:51.55#ibcon#read 4, iclass 36, count 0 2006.229.04:27:51.55#ibcon#about to read 5, iclass 36, count 0 2006.229.04:27:51.55#ibcon#read 5, iclass 36, count 0 2006.229.04:27:51.55#ibcon#about to read 6, iclass 36, count 0 2006.229.04:27:51.55#ibcon#read 6, iclass 36, count 0 2006.229.04:27:51.55#ibcon#end of sib2, iclass 36, count 0 2006.229.04:27:51.55#ibcon#*after write, iclass 36, count 0 2006.229.04:27:51.55#ibcon#*before return 0, iclass 36, count 0 2006.229.04:27:51.55#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:51.55#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:27:51.55#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:27:51.55#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:27:51.55$vck44/vb=6,4 2006.229.04:27:51.56#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.04:27:51.56#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.04:27:51.56#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:51.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:51.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:51.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:51.60#ibcon#enter wrdev, iclass 38, count 2 2006.229.04:27:51.60#ibcon#first serial, iclass 38, count 2 2006.229.04:27:51.60#ibcon#enter sib2, iclass 38, count 2 2006.229.04:27:51.60#ibcon#flushed, iclass 38, count 2 2006.229.04:27:51.60#ibcon#about to write, iclass 38, count 2 2006.229.04:27:51.60#ibcon#wrote, iclass 38, count 2 2006.229.04:27:51.60#ibcon#about to read 3, iclass 38, count 2 2006.229.04:27:51.62#ibcon#read 3, iclass 38, count 2 2006.229.04:27:51.62#ibcon#about to read 4, iclass 38, count 2 2006.229.04:27:51.62#ibcon#read 4, iclass 38, count 2 2006.229.04:27:51.62#ibcon#about to read 5, iclass 38, count 2 2006.229.04:27:51.62#ibcon#read 5, iclass 38, count 2 2006.229.04:27:51.62#ibcon#about to read 6, iclass 38, count 2 2006.229.04:27:51.62#ibcon#read 6, iclass 38, count 2 2006.229.04:27:51.62#ibcon#end of sib2, iclass 38, count 2 2006.229.04:27:51.62#ibcon#*mode == 0, iclass 38, count 2 2006.229.04:27:51.62#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.04:27:51.62#ibcon#[27=AT06-04\r\n] 2006.229.04:27:51.62#ibcon#*before write, iclass 38, count 2 2006.229.04:27:51.62#ibcon#enter sib2, iclass 38, count 2 2006.229.04:27:51.62#ibcon#flushed, iclass 38, count 2 2006.229.04:27:51.62#ibcon#about to write, iclass 38, count 2 2006.229.04:27:51.62#ibcon#wrote, iclass 38, count 2 2006.229.04:27:51.62#ibcon#about to read 3, iclass 38, count 2 2006.229.04:27:51.65#ibcon#read 3, iclass 38, count 2 2006.229.04:27:51.65#ibcon#about to read 4, iclass 38, count 2 2006.229.04:27:51.65#ibcon#read 4, iclass 38, count 2 2006.229.04:27:51.65#ibcon#about to read 5, iclass 38, count 2 2006.229.04:27:51.65#ibcon#read 5, iclass 38, count 2 2006.229.04:27:51.65#ibcon#about to read 6, iclass 38, count 2 2006.229.04:27:51.65#ibcon#read 6, iclass 38, count 2 2006.229.04:27:51.65#ibcon#end of sib2, iclass 38, count 2 2006.229.04:27:51.65#ibcon#*after write, iclass 38, count 2 2006.229.04:27:51.65#ibcon#*before return 0, iclass 38, count 2 2006.229.04:27:51.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:51.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:27:51.65#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.04:27:51.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:51.65#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:51.77#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:51.77#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:51.77#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:27:51.77#ibcon#first serial, iclass 38, count 0 2006.229.04:27:51.77#ibcon#enter sib2, iclass 38, count 0 2006.229.04:27:51.77#ibcon#flushed, iclass 38, count 0 2006.229.04:27:51.77#ibcon#about to write, iclass 38, count 0 2006.229.04:27:51.77#ibcon#wrote, iclass 38, count 0 2006.229.04:27:51.77#ibcon#about to read 3, iclass 38, count 0 2006.229.04:27:51.79#ibcon#read 3, iclass 38, count 0 2006.229.04:27:51.79#ibcon#about to read 4, iclass 38, count 0 2006.229.04:27:51.79#ibcon#read 4, iclass 38, count 0 2006.229.04:27:51.79#ibcon#about to read 5, iclass 38, count 0 2006.229.04:27:51.79#ibcon#read 5, iclass 38, count 0 2006.229.04:27:51.79#ibcon#about to read 6, iclass 38, count 0 2006.229.04:27:51.79#ibcon#read 6, iclass 38, count 0 2006.229.04:27:51.79#ibcon#end of sib2, iclass 38, count 0 2006.229.04:27:51.79#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:27:51.79#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:27:51.79#ibcon#[27=USB\r\n] 2006.229.04:27:51.79#ibcon#*before write, iclass 38, count 0 2006.229.04:27:51.79#ibcon#enter sib2, iclass 38, count 0 2006.229.04:27:51.79#ibcon#flushed, iclass 38, count 0 2006.229.04:27:51.79#ibcon#about to write, iclass 38, count 0 2006.229.04:27:51.79#ibcon#wrote, iclass 38, count 0 2006.229.04:27:51.79#ibcon#about to read 3, iclass 38, count 0 2006.229.04:27:51.82#ibcon#read 3, iclass 38, count 0 2006.229.04:27:51.82#ibcon#about to read 4, iclass 38, count 0 2006.229.04:27:51.82#ibcon#read 4, iclass 38, count 0 2006.229.04:27:51.82#ibcon#about to read 5, iclass 38, count 0 2006.229.04:27:51.82#ibcon#read 5, iclass 38, count 0 2006.229.04:27:51.82#ibcon#about to read 6, iclass 38, count 0 2006.229.04:27:51.82#ibcon#read 6, iclass 38, count 0 2006.229.04:27:51.82#ibcon#end of sib2, iclass 38, count 0 2006.229.04:27:51.82#ibcon#*after write, iclass 38, count 0 2006.229.04:27:51.82#ibcon#*before return 0, iclass 38, count 0 2006.229.04:27:51.82#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:51.82#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:27:51.82#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:27:51.82#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:27:51.82$vck44/vblo=7,734.99 2006.229.04:27:51.83#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.04:27:51.83#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.04:27:51.83#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:51.83#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:51.83#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:51.83#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:51.83#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:27:51.83#ibcon#first serial, iclass 40, count 0 2006.229.04:27:51.83#ibcon#enter sib2, iclass 40, count 0 2006.229.04:27:51.83#ibcon#flushed, iclass 40, count 0 2006.229.04:27:51.83#ibcon#about to write, iclass 40, count 0 2006.229.04:27:51.83#ibcon#wrote, iclass 40, count 0 2006.229.04:27:51.83#ibcon#about to read 3, iclass 40, count 0 2006.229.04:27:51.84#ibcon#read 3, iclass 40, count 0 2006.229.04:27:51.84#ibcon#about to read 4, iclass 40, count 0 2006.229.04:27:51.84#ibcon#read 4, iclass 40, count 0 2006.229.04:27:51.84#ibcon#about to read 5, iclass 40, count 0 2006.229.04:27:51.84#ibcon#read 5, iclass 40, count 0 2006.229.04:27:51.84#ibcon#about to read 6, iclass 40, count 0 2006.229.04:27:51.84#ibcon#read 6, iclass 40, count 0 2006.229.04:27:51.84#ibcon#end of sib2, iclass 40, count 0 2006.229.04:27:51.84#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:27:51.84#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:27:51.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:27:51.84#ibcon#*before write, iclass 40, count 0 2006.229.04:27:51.84#ibcon#enter sib2, iclass 40, count 0 2006.229.04:27:51.84#ibcon#flushed, iclass 40, count 0 2006.229.04:27:51.84#ibcon#about to write, iclass 40, count 0 2006.229.04:27:51.84#ibcon#wrote, iclass 40, count 0 2006.229.04:27:51.84#ibcon#about to read 3, iclass 40, count 0 2006.229.04:27:51.88#ibcon#read 3, iclass 40, count 0 2006.229.04:27:51.88#ibcon#about to read 4, iclass 40, count 0 2006.229.04:27:51.88#ibcon#read 4, iclass 40, count 0 2006.229.04:27:51.88#ibcon#about to read 5, iclass 40, count 0 2006.229.04:27:51.88#ibcon#read 5, iclass 40, count 0 2006.229.04:27:51.88#ibcon#about to read 6, iclass 40, count 0 2006.229.04:27:51.88#ibcon#read 6, iclass 40, count 0 2006.229.04:27:51.88#ibcon#end of sib2, iclass 40, count 0 2006.229.04:27:51.88#ibcon#*after write, iclass 40, count 0 2006.229.04:27:51.88#ibcon#*before return 0, iclass 40, count 0 2006.229.04:27:51.88#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:51.88#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:27:51.88#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:27:51.88#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:27:51.88$vck44/vb=7,4 2006.229.04:27:51.88#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.04:27:51.88#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.04:27:51.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:51.88#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:51.94#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:51.94#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:51.94#ibcon#enter wrdev, iclass 4, count 2 2006.229.04:27:51.94#ibcon#first serial, iclass 4, count 2 2006.229.04:27:51.94#ibcon#enter sib2, iclass 4, count 2 2006.229.04:27:51.94#ibcon#flushed, iclass 4, count 2 2006.229.04:27:51.94#ibcon#about to write, iclass 4, count 2 2006.229.04:27:51.94#ibcon#wrote, iclass 4, count 2 2006.229.04:27:51.94#ibcon#about to read 3, iclass 4, count 2 2006.229.04:27:51.96#ibcon#read 3, iclass 4, count 2 2006.229.04:27:51.96#ibcon#about to read 4, iclass 4, count 2 2006.229.04:27:51.96#ibcon#read 4, iclass 4, count 2 2006.229.04:27:51.96#ibcon#about to read 5, iclass 4, count 2 2006.229.04:27:51.96#ibcon#read 5, iclass 4, count 2 2006.229.04:27:51.96#ibcon#about to read 6, iclass 4, count 2 2006.229.04:27:51.96#ibcon#read 6, iclass 4, count 2 2006.229.04:27:51.96#ibcon#end of sib2, iclass 4, count 2 2006.229.04:27:51.96#ibcon#*mode == 0, iclass 4, count 2 2006.229.04:27:51.96#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.04:27:51.96#ibcon#[27=AT07-04\r\n] 2006.229.04:27:51.96#ibcon#*before write, iclass 4, count 2 2006.229.04:27:51.96#ibcon#enter sib2, iclass 4, count 2 2006.229.04:27:51.96#ibcon#flushed, iclass 4, count 2 2006.229.04:27:51.96#ibcon#about to write, iclass 4, count 2 2006.229.04:27:51.96#ibcon#wrote, iclass 4, count 2 2006.229.04:27:51.96#ibcon#about to read 3, iclass 4, count 2 2006.229.04:27:51.99#ibcon#read 3, iclass 4, count 2 2006.229.04:27:51.99#ibcon#about to read 4, iclass 4, count 2 2006.229.04:27:51.99#ibcon#read 4, iclass 4, count 2 2006.229.04:27:51.99#ibcon#about to read 5, iclass 4, count 2 2006.229.04:27:51.99#ibcon#read 5, iclass 4, count 2 2006.229.04:27:51.99#ibcon#about to read 6, iclass 4, count 2 2006.229.04:27:51.99#ibcon#read 6, iclass 4, count 2 2006.229.04:27:51.99#ibcon#end of sib2, iclass 4, count 2 2006.229.04:27:51.99#ibcon#*after write, iclass 4, count 2 2006.229.04:27:51.99#ibcon#*before return 0, iclass 4, count 2 2006.229.04:27:51.99#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:51.99#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:27:51.99#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.04:27:51.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:51.99#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:52.11#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:52.11#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:52.11#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:27:52.11#ibcon#first serial, iclass 4, count 0 2006.229.04:27:52.11#ibcon#enter sib2, iclass 4, count 0 2006.229.04:27:52.11#ibcon#flushed, iclass 4, count 0 2006.229.04:27:52.11#ibcon#about to write, iclass 4, count 0 2006.229.04:27:52.11#ibcon#wrote, iclass 4, count 0 2006.229.04:27:52.11#ibcon#about to read 3, iclass 4, count 0 2006.229.04:27:52.13#ibcon#read 3, iclass 4, count 0 2006.229.04:27:52.13#ibcon#about to read 4, iclass 4, count 0 2006.229.04:27:52.13#ibcon#read 4, iclass 4, count 0 2006.229.04:27:52.13#ibcon#about to read 5, iclass 4, count 0 2006.229.04:27:52.13#ibcon#read 5, iclass 4, count 0 2006.229.04:27:52.13#ibcon#about to read 6, iclass 4, count 0 2006.229.04:27:52.13#ibcon#read 6, iclass 4, count 0 2006.229.04:27:52.13#ibcon#end of sib2, iclass 4, count 0 2006.229.04:27:52.13#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:27:52.13#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:27:52.13#ibcon#[27=USB\r\n] 2006.229.04:27:52.13#ibcon#*before write, iclass 4, count 0 2006.229.04:27:52.13#ibcon#enter sib2, iclass 4, count 0 2006.229.04:27:52.13#ibcon#flushed, iclass 4, count 0 2006.229.04:27:52.13#ibcon#about to write, iclass 4, count 0 2006.229.04:27:52.13#ibcon#wrote, iclass 4, count 0 2006.229.04:27:52.13#ibcon#about to read 3, iclass 4, count 0 2006.229.04:27:52.16#ibcon#read 3, iclass 4, count 0 2006.229.04:27:52.16#ibcon#about to read 4, iclass 4, count 0 2006.229.04:27:52.16#ibcon#read 4, iclass 4, count 0 2006.229.04:27:52.16#ibcon#about to read 5, iclass 4, count 0 2006.229.04:27:52.16#ibcon#read 5, iclass 4, count 0 2006.229.04:27:52.16#ibcon#about to read 6, iclass 4, count 0 2006.229.04:27:52.16#ibcon#read 6, iclass 4, count 0 2006.229.04:27:52.16#ibcon#end of sib2, iclass 4, count 0 2006.229.04:27:52.16#ibcon#*after write, iclass 4, count 0 2006.229.04:27:52.16#ibcon#*before return 0, iclass 4, count 0 2006.229.04:27:52.16#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:52.16#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:27:52.16#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:27:52.16#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:27:52.16$vck44/vblo=8,744.99 2006.229.04:27:52.16#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.04:27:52.16#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.04:27:52.17#ibcon#ireg 17 cls_cnt 0 2006.229.04:27:52.17#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:52.17#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:52.17#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:52.17#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:27:52.17#ibcon#first serial, iclass 6, count 0 2006.229.04:27:52.17#ibcon#enter sib2, iclass 6, count 0 2006.229.04:27:52.17#ibcon#flushed, iclass 6, count 0 2006.229.04:27:52.17#ibcon#about to write, iclass 6, count 0 2006.229.04:27:52.17#ibcon#wrote, iclass 6, count 0 2006.229.04:27:52.17#ibcon#about to read 3, iclass 6, count 0 2006.229.04:27:52.18#ibcon#read 3, iclass 6, count 0 2006.229.04:27:52.18#ibcon#about to read 4, iclass 6, count 0 2006.229.04:27:52.18#ibcon#read 4, iclass 6, count 0 2006.229.04:27:52.18#ibcon#about to read 5, iclass 6, count 0 2006.229.04:27:52.18#ibcon#read 5, iclass 6, count 0 2006.229.04:27:52.18#ibcon#about to read 6, iclass 6, count 0 2006.229.04:27:52.18#ibcon#read 6, iclass 6, count 0 2006.229.04:27:52.18#ibcon#end of sib2, iclass 6, count 0 2006.229.04:27:52.18#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:27:52.18#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:27:52.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:27:52.18#ibcon#*before write, iclass 6, count 0 2006.229.04:27:52.18#ibcon#enter sib2, iclass 6, count 0 2006.229.04:27:52.18#ibcon#flushed, iclass 6, count 0 2006.229.04:27:52.18#ibcon#about to write, iclass 6, count 0 2006.229.04:27:52.18#ibcon#wrote, iclass 6, count 0 2006.229.04:27:52.18#ibcon#about to read 3, iclass 6, count 0 2006.229.04:27:52.22#ibcon#read 3, iclass 6, count 0 2006.229.04:27:52.22#ibcon#about to read 4, iclass 6, count 0 2006.229.04:27:52.22#ibcon#read 4, iclass 6, count 0 2006.229.04:27:52.22#ibcon#about to read 5, iclass 6, count 0 2006.229.04:27:52.22#ibcon#read 5, iclass 6, count 0 2006.229.04:27:52.22#ibcon#about to read 6, iclass 6, count 0 2006.229.04:27:52.22#ibcon#read 6, iclass 6, count 0 2006.229.04:27:52.22#ibcon#end of sib2, iclass 6, count 0 2006.229.04:27:52.22#ibcon#*after write, iclass 6, count 0 2006.229.04:27:52.22#ibcon#*before return 0, iclass 6, count 0 2006.229.04:27:52.22#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:52.22#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:27:52.22#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:27:52.22#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:27:52.22$vck44/vb=8,4 2006.229.04:27:52.22#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.04:27:52.22#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.04:27:52.23#ibcon#ireg 11 cls_cnt 2 2006.229.04:27:52.23#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:52.27#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:52.27#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:52.27#ibcon#enter wrdev, iclass 10, count 2 2006.229.04:27:52.27#ibcon#first serial, iclass 10, count 2 2006.229.04:27:52.27#ibcon#enter sib2, iclass 10, count 2 2006.229.04:27:52.27#ibcon#flushed, iclass 10, count 2 2006.229.04:27:52.27#ibcon#about to write, iclass 10, count 2 2006.229.04:27:52.27#ibcon#wrote, iclass 10, count 2 2006.229.04:27:52.27#ibcon#about to read 3, iclass 10, count 2 2006.229.04:27:52.29#ibcon#read 3, iclass 10, count 2 2006.229.04:27:52.29#ibcon#about to read 4, iclass 10, count 2 2006.229.04:27:52.29#ibcon#read 4, iclass 10, count 2 2006.229.04:27:52.29#ibcon#about to read 5, iclass 10, count 2 2006.229.04:27:52.29#ibcon#read 5, iclass 10, count 2 2006.229.04:27:52.29#ibcon#about to read 6, iclass 10, count 2 2006.229.04:27:52.29#ibcon#read 6, iclass 10, count 2 2006.229.04:27:52.29#ibcon#end of sib2, iclass 10, count 2 2006.229.04:27:52.29#ibcon#*mode == 0, iclass 10, count 2 2006.229.04:27:52.29#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.04:27:52.29#ibcon#[27=AT08-04\r\n] 2006.229.04:27:52.29#ibcon#*before write, iclass 10, count 2 2006.229.04:27:52.29#ibcon#enter sib2, iclass 10, count 2 2006.229.04:27:52.29#ibcon#flushed, iclass 10, count 2 2006.229.04:27:52.29#ibcon#about to write, iclass 10, count 2 2006.229.04:27:52.29#ibcon#wrote, iclass 10, count 2 2006.229.04:27:52.29#ibcon#about to read 3, iclass 10, count 2 2006.229.04:27:52.32#ibcon#read 3, iclass 10, count 2 2006.229.04:27:52.32#ibcon#about to read 4, iclass 10, count 2 2006.229.04:27:52.32#ibcon#read 4, iclass 10, count 2 2006.229.04:27:52.32#ibcon#about to read 5, iclass 10, count 2 2006.229.04:27:52.32#ibcon#read 5, iclass 10, count 2 2006.229.04:27:52.32#ibcon#about to read 6, iclass 10, count 2 2006.229.04:27:52.32#ibcon#read 6, iclass 10, count 2 2006.229.04:27:52.32#ibcon#end of sib2, iclass 10, count 2 2006.229.04:27:52.32#ibcon#*after write, iclass 10, count 2 2006.229.04:27:52.32#ibcon#*before return 0, iclass 10, count 2 2006.229.04:27:52.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:52.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:27:52.32#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.04:27:52.32#ibcon#ireg 7 cls_cnt 0 2006.229.04:27:52.32#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:52.44#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:52.44#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:52.44#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:27:52.44#ibcon#first serial, iclass 10, count 0 2006.229.04:27:52.44#ibcon#enter sib2, iclass 10, count 0 2006.229.04:27:52.44#ibcon#flushed, iclass 10, count 0 2006.229.04:27:52.44#ibcon#about to write, iclass 10, count 0 2006.229.04:27:52.44#ibcon#wrote, iclass 10, count 0 2006.229.04:27:52.44#ibcon#about to read 3, iclass 10, count 0 2006.229.04:27:52.46#ibcon#read 3, iclass 10, count 0 2006.229.04:27:52.46#ibcon#about to read 4, iclass 10, count 0 2006.229.04:27:52.46#ibcon#read 4, iclass 10, count 0 2006.229.04:27:52.46#ibcon#about to read 5, iclass 10, count 0 2006.229.04:27:52.46#ibcon#read 5, iclass 10, count 0 2006.229.04:27:52.46#ibcon#about to read 6, iclass 10, count 0 2006.229.04:27:52.46#ibcon#read 6, iclass 10, count 0 2006.229.04:27:52.46#ibcon#end of sib2, iclass 10, count 0 2006.229.04:27:52.46#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:27:52.46#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:27:52.46#ibcon#[27=USB\r\n] 2006.229.04:27:52.46#ibcon#*before write, iclass 10, count 0 2006.229.04:27:52.46#ibcon#enter sib2, iclass 10, count 0 2006.229.04:27:52.46#ibcon#flushed, iclass 10, count 0 2006.229.04:27:52.46#ibcon#about to write, iclass 10, count 0 2006.229.04:27:52.46#ibcon#wrote, iclass 10, count 0 2006.229.04:27:52.46#ibcon#about to read 3, iclass 10, count 0 2006.229.04:27:52.49#ibcon#read 3, iclass 10, count 0 2006.229.04:27:52.49#ibcon#about to read 4, iclass 10, count 0 2006.229.04:27:52.49#ibcon#read 4, iclass 10, count 0 2006.229.04:27:52.49#ibcon#about to read 5, iclass 10, count 0 2006.229.04:27:52.49#ibcon#read 5, iclass 10, count 0 2006.229.04:27:52.49#ibcon#about to read 6, iclass 10, count 0 2006.229.04:27:52.49#ibcon#read 6, iclass 10, count 0 2006.229.04:27:52.49#ibcon#end of sib2, iclass 10, count 0 2006.229.04:27:52.49#ibcon#*after write, iclass 10, count 0 2006.229.04:27:52.49#ibcon#*before return 0, iclass 10, count 0 2006.229.04:27:52.49#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:52.49#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:27:52.49#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:27:52.49#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:27:52.49$vck44/vabw=wide 2006.229.04:27:52.49#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:27:52.49#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:27:52.50#ibcon#ireg 8 cls_cnt 0 2006.229.04:27:52.50#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:52.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:52.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:52.50#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:27:52.50#ibcon#first serial, iclass 12, count 0 2006.229.04:27:52.50#ibcon#enter sib2, iclass 12, count 0 2006.229.04:27:52.50#ibcon#flushed, iclass 12, count 0 2006.229.04:27:52.50#ibcon#about to write, iclass 12, count 0 2006.229.04:27:52.50#ibcon#wrote, iclass 12, count 0 2006.229.04:27:52.50#ibcon#about to read 3, iclass 12, count 0 2006.229.04:27:52.51#ibcon#read 3, iclass 12, count 0 2006.229.04:27:52.51#ibcon#about to read 4, iclass 12, count 0 2006.229.04:27:52.51#ibcon#read 4, iclass 12, count 0 2006.229.04:27:52.51#ibcon#about to read 5, iclass 12, count 0 2006.229.04:27:52.51#ibcon#read 5, iclass 12, count 0 2006.229.04:27:52.51#ibcon#about to read 6, iclass 12, count 0 2006.229.04:27:52.51#ibcon#read 6, iclass 12, count 0 2006.229.04:27:52.51#ibcon#end of sib2, iclass 12, count 0 2006.229.04:27:52.51#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:27:52.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:27:52.51#ibcon#[25=BW32\r\n] 2006.229.04:27:52.51#ibcon#*before write, iclass 12, count 0 2006.229.04:27:52.51#ibcon#enter sib2, iclass 12, count 0 2006.229.04:27:52.51#ibcon#flushed, iclass 12, count 0 2006.229.04:27:52.51#ibcon#about to write, iclass 12, count 0 2006.229.04:27:52.51#ibcon#wrote, iclass 12, count 0 2006.229.04:27:52.51#ibcon#about to read 3, iclass 12, count 0 2006.229.04:27:52.54#ibcon#read 3, iclass 12, count 0 2006.229.04:27:52.54#ibcon#about to read 4, iclass 12, count 0 2006.229.04:27:52.54#ibcon#read 4, iclass 12, count 0 2006.229.04:27:52.54#ibcon#about to read 5, iclass 12, count 0 2006.229.04:27:52.54#ibcon#read 5, iclass 12, count 0 2006.229.04:27:52.54#ibcon#about to read 6, iclass 12, count 0 2006.229.04:27:52.54#ibcon#read 6, iclass 12, count 0 2006.229.04:27:52.54#ibcon#end of sib2, iclass 12, count 0 2006.229.04:27:52.54#ibcon#*after write, iclass 12, count 0 2006.229.04:27:52.54#ibcon#*before return 0, iclass 12, count 0 2006.229.04:27:52.54#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:52.54#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:27:52.54#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:27:52.54#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:27:52.54$vck44/vbbw=wide 2006.229.04:27:52.54#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:27:52.54#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:27:52.54#ibcon#ireg 8 cls_cnt 0 2006.229.04:27:52.54#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:27:52.61#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:27:52.61#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:27:52.61#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:27:52.61#ibcon#first serial, iclass 14, count 0 2006.229.04:27:52.61#ibcon#enter sib2, iclass 14, count 0 2006.229.04:27:52.61#ibcon#flushed, iclass 14, count 0 2006.229.04:27:52.61#ibcon#about to write, iclass 14, count 0 2006.229.04:27:52.61#ibcon#wrote, iclass 14, count 0 2006.229.04:27:52.61#ibcon#about to read 3, iclass 14, count 0 2006.229.04:27:52.63#ibcon#read 3, iclass 14, count 0 2006.229.04:27:52.63#ibcon#about to read 4, iclass 14, count 0 2006.229.04:27:52.63#ibcon#read 4, iclass 14, count 0 2006.229.04:27:52.63#ibcon#about to read 5, iclass 14, count 0 2006.229.04:27:52.63#ibcon#read 5, iclass 14, count 0 2006.229.04:27:52.63#ibcon#about to read 6, iclass 14, count 0 2006.229.04:27:52.63#ibcon#read 6, iclass 14, count 0 2006.229.04:27:52.63#ibcon#end of sib2, iclass 14, count 0 2006.229.04:27:52.63#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:27:52.63#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:27:52.63#ibcon#[27=BW32\r\n] 2006.229.04:27:52.63#ibcon#*before write, iclass 14, count 0 2006.229.04:27:52.63#ibcon#enter sib2, iclass 14, count 0 2006.229.04:27:52.63#ibcon#flushed, iclass 14, count 0 2006.229.04:27:52.63#ibcon#about to write, iclass 14, count 0 2006.229.04:27:52.63#ibcon#wrote, iclass 14, count 0 2006.229.04:27:52.63#ibcon#about to read 3, iclass 14, count 0 2006.229.04:27:52.66#ibcon#read 3, iclass 14, count 0 2006.229.04:27:52.66#ibcon#about to read 4, iclass 14, count 0 2006.229.04:27:52.66#ibcon#read 4, iclass 14, count 0 2006.229.04:27:52.66#ibcon#about to read 5, iclass 14, count 0 2006.229.04:27:52.66#ibcon#read 5, iclass 14, count 0 2006.229.04:27:52.66#ibcon#about to read 6, iclass 14, count 0 2006.229.04:27:52.66#ibcon#read 6, iclass 14, count 0 2006.229.04:27:52.66#ibcon#end of sib2, iclass 14, count 0 2006.229.04:27:52.66#ibcon#*after write, iclass 14, count 0 2006.229.04:27:52.66#ibcon#*before return 0, iclass 14, count 0 2006.229.04:27:52.66#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:27:52.66#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:27:52.66#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:27:52.66#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:27:52.66$setupk4/ifdk4 2006.229.04:27:52.67$ifdk4/lo= 2006.229.04:27:52.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:27:52.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:27:52.67$ifdk4/patch= 2006.229.04:27:52.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:27:52.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:27:52.67$setupk4/!*+20s 2006.229.04:27:56.87#abcon#<5=/04 2.2 3.9 30.44 951000.0\r\n> 2006.229.04:27:56.89#abcon#{5=INTERFACE CLEAR} 2006.229.04:27:56.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:28:07.04#abcon#<5=/04 2.2 3.9 30.44 941000.0\r\n> 2006.229.04:28:07.06#abcon#{5=INTERFACE CLEAR} 2006.229.04:28:07.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:28:07.28$setupk4/"tpicd 2006.229.04:28:07.28$setupk4/echo=off 2006.229.04:28:07.28$setupk4/xlog=off 2006.229.04:28:07.28:!2006.229.04:28:57 2006.229.04:28:36.14#trakl#Source acquired 2006.229.04:28:37.14#flagr#flagr/antenna,acquired 2006.229.04:28:57.00:preob 2006.229.04:28:57.14/onsource/TRACKING 2006.229.04:28:57.14:!2006.229.04:29:07 2006.229.04:29:07.01:"tape 2006.229.04:29:07.01:"st=record 2006.229.04:29:07.01:data_valid=on 2006.229.04:29:07.02:midob 2006.229.04:29:08.14/onsource/TRACKING 2006.229.04:29:08.15/wx/30.47,1000.0,95 2006.229.04:29:08.26/cable/+6.4036E-03 2006.229.04:29:09.35/va/01,08,usb,yes,30,32 2006.229.04:29:09.35/va/02,07,usb,yes,32,33 2006.229.04:29:09.35/va/03,06,usb,yes,40,43 2006.229.04:29:09.35/va/04,07,usb,yes,33,35 2006.229.04:29:09.35/va/05,04,usb,yes,30,30 2006.229.04:29:09.35/va/06,04,usb,yes,34,33 2006.229.04:29:09.35/va/07,05,usb,yes,30,30 2006.229.04:29:09.35/va/08,06,usb,yes,21,27 2006.229.04:29:09.58/valo/01,524.99,yes,locked 2006.229.04:29:09.58/valo/02,534.99,yes,locked 2006.229.04:29:09.58/valo/03,564.99,yes,locked 2006.229.04:29:09.58/valo/04,624.99,yes,locked 2006.229.04:29:09.58/valo/05,734.99,yes,locked 2006.229.04:29:09.58/valo/06,814.99,yes,locked 2006.229.04:29:09.58/valo/07,864.99,yes,locked 2006.229.04:29:09.58/valo/08,884.99,yes,locked 2006.229.04:29:10.67/vb/01,04,usb,yes,31,29 2006.229.04:29:10.67/vb/02,04,usb,yes,34,34 2006.229.04:29:10.67/vb/03,04,usb,yes,31,34 2006.229.04:29:10.67/vb/04,04,usb,yes,35,34 2006.229.04:29:10.67/vb/05,04,usb,yes,27,30 2006.229.04:29:10.67/vb/06,04,usb,yes,32,28 2006.229.04:29:10.67/vb/07,04,usb,yes,32,32 2006.229.04:29:10.67/vb/08,04,usb,yes,29,33 2006.229.04:29:10.91/vblo/01,629.99,yes,locked 2006.229.04:29:10.91/vblo/02,634.99,yes,locked 2006.229.04:29:10.91/vblo/03,649.99,yes,locked 2006.229.04:29:10.91/vblo/04,679.99,yes,locked 2006.229.04:29:10.91/vblo/05,709.99,yes,locked 2006.229.04:29:10.91/vblo/06,719.99,yes,locked 2006.229.04:29:10.91/vblo/07,734.99,yes,locked 2006.229.04:29:10.91/vblo/08,744.99,yes,locked 2006.229.04:29:11.06/vabw/8 2006.229.04:29:11.21/vbbw/8 2006.229.04:29:11.30/xfe/off,on,12.0 2006.229.04:29:11.69/ifatt/23,28,28,28 2006.229.04:29:12.08/fmout-gps/S +4.50E-07 2006.229.04:29:12.13:!2006.229.04:30:07 2006.229.04:30:07.01:data_valid=off 2006.229.04:30:07.02:"et 2006.229.04:30:07.02:!+3s 2006.229.04:30:10.03:"tape 2006.229.04:30:10.04:postob 2006.229.04:30:10.09/cable/+6.4051E-03 2006.229.04:30:10.10/wx/30.50,999.9,95 2006.229.04:30:10.15/fmout-gps/S +4.51E-07 2006.229.04:30:10.16:scan_name=229-0436,jd0608,220 2006.229.04:30:10.16:source=1044+719,104827.62,714335.9,2000.0,neutral 2006.229.04:30:11.14#flagr#flagr/antenna,new-source 2006.229.04:30:11.15:checkk5 2006.229.04:30:11.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:30:11.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:30:12.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:30:12.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:30:13.18/chk_obsdata//k5ts1/T2290429??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.04:30:13.57/chk_obsdata//k5ts2/T2290429??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.04:30:13.97/chk_obsdata//k5ts3/T2290429??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.04:30:14.37/chk_obsdata//k5ts4/T2290429??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.04:30:15.08/k5log//k5ts1_log_newline 2006.229.04:30:15.77/k5log//k5ts2_log_newline 2006.229.04:30:16.50/k5log//k5ts3_log_newline 2006.229.04:30:17.20/k5log//k5ts4_log_newline 2006.229.04:30:17.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:30:17.22:setupk4=1 2006.229.04:30:17.23$setupk4/echo=on 2006.229.04:30:17.23$setupk4/pcalon 2006.229.04:30:17.23$pcalon/"no phase cal control is implemented here 2006.229.04:30:17.23$setupk4/"tpicd=stop 2006.229.04:30:17.23$setupk4/"rec=synch_on 2006.229.04:30:17.23$setupk4/"rec_mode=128 2006.229.04:30:17.23$setupk4/!* 2006.229.04:30:17.23$setupk4/recpk4 2006.229.04:30:17.23$recpk4/recpatch= 2006.229.04:30:17.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:30:17.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:30:17.23$setupk4/vck44 2006.229.04:30:17.23$vck44/valo=1,524.99 2006.229.04:30:17.23#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.04:30:17.23#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.04:30:17.23#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:17.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:17.23#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:17.23#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:17.23#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:30:17.23#ibcon#first serial, iclass 39, count 0 2006.229.04:30:17.23#ibcon#enter sib2, iclass 39, count 0 2006.229.04:30:17.23#ibcon#flushed, iclass 39, count 0 2006.229.04:30:17.23#ibcon#about to write, iclass 39, count 0 2006.229.04:30:17.23#ibcon#wrote, iclass 39, count 0 2006.229.04:30:17.23#ibcon#about to read 3, iclass 39, count 0 2006.229.04:30:17.24#ibcon#read 3, iclass 39, count 0 2006.229.04:30:17.24#ibcon#about to read 4, iclass 39, count 0 2006.229.04:30:17.24#ibcon#read 4, iclass 39, count 0 2006.229.04:30:17.24#ibcon#about to read 5, iclass 39, count 0 2006.229.04:30:17.24#ibcon#read 5, iclass 39, count 0 2006.229.04:30:17.24#ibcon#about to read 6, iclass 39, count 0 2006.229.04:30:17.24#ibcon#read 6, iclass 39, count 0 2006.229.04:30:17.24#ibcon#end of sib2, iclass 39, count 0 2006.229.04:30:17.24#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:30:17.24#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:30:17.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:30:17.24#ibcon#*before write, iclass 39, count 0 2006.229.04:30:17.24#ibcon#enter sib2, iclass 39, count 0 2006.229.04:30:17.24#ibcon#flushed, iclass 39, count 0 2006.229.04:30:17.24#ibcon#about to write, iclass 39, count 0 2006.229.04:30:17.24#ibcon#wrote, iclass 39, count 0 2006.229.04:30:17.24#ibcon#about to read 3, iclass 39, count 0 2006.229.04:30:17.29#ibcon#read 3, iclass 39, count 0 2006.229.04:30:17.29#ibcon#about to read 4, iclass 39, count 0 2006.229.04:30:17.29#ibcon#read 4, iclass 39, count 0 2006.229.04:30:17.29#ibcon#about to read 5, iclass 39, count 0 2006.229.04:30:17.29#ibcon#read 5, iclass 39, count 0 2006.229.04:30:17.29#ibcon#about to read 6, iclass 39, count 0 2006.229.04:30:17.29#ibcon#read 6, iclass 39, count 0 2006.229.04:30:17.29#ibcon#end of sib2, iclass 39, count 0 2006.229.04:30:17.29#ibcon#*after write, iclass 39, count 0 2006.229.04:30:17.29#ibcon#*before return 0, iclass 39, count 0 2006.229.04:30:17.29#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:17.29#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:17.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:30:17.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:30:17.29$vck44/va=1,8 2006.229.04:30:17.29#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.04:30:17.29#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.04:30:17.29#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:17.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:17.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:17.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:17.30#ibcon#enter wrdev, iclass 3, count 2 2006.229.04:30:17.30#ibcon#first serial, iclass 3, count 2 2006.229.04:30:17.30#ibcon#enter sib2, iclass 3, count 2 2006.229.04:30:17.30#ibcon#flushed, iclass 3, count 2 2006.229.04:30:17.30#ibcon#about to write, iclass 3, count 2 2006.229.04:30:17.30#ibcon#wrote, iclass 3, count 2 2006.229.04:30:17.30#ibcon#about to read 3, iclass 3, count 2 2006.229.04:30:17.31#ibcon#read 3, iclass 3, count 2 2006.229.04:30:17.31#ibcon#about to read 4, iclass 3, count 2 2006.229.04:30:17.31#ibcon#read 4, iclass 3, count 2 2006.229.04:30:17.31#ibcon#about to read 5, iclass 3, count 2 2006.229.04:30:17.31#ibcon#read 5, iclass 3, count 2 2006.229.04:30:17.31#ibcon#about to read 6, iclass 3, count 2 2006.229.04:30:17.31#ibcon#read 6, iclass 3, count 2 2006.229.04:30:17.31#ibcon#end of sib2, iclass 3, count 2 2006.229.04:30:17.31#ibcon#*mode == 0, iclass 3, count 2 2006.229.04:30:17.31#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.04:30:17.31#ibcon#[25=AT01-08\r\n] 2006.229.04:30:17.31#ibcon#*before write, iclass 3, count 2 2006.229.04:30:17.31#ibcon#enter sib2, iclass 3, count 2 2006.229.04:30:17.31#ibcon#flushed, iclass 3, count 2 2006.229.04:30:17.31#ibcon#about to write, iclass 3, count 2 2006.229.04:30:17.31#ibcon#wrote, iclass 3, count 2 2006.229.04:30:17.31#ibcon#about to read 3, iclass 3, count 2 2006.229.04:30:17.34#ibcon#read 3, iclass 3, count 2 2006.229.04:30:17.34#ibcon#about to read 4, iclass 3, count 2 2006.229.04:30:17.34#ibcon#read 4, iclass 3, count 2 2006.229.04:30:17.34#ibcon#about to read 5, iclass 3, count 2 2006.229.04:30:17.34#ibcon#read 5, iclass 3, count 2 2006.229.04:30:17.34#ibcon#about to read 6, iclass 3, count 2 2006.229.04:30:17.34#ibcon#read 6, iclass 3, count 2 2006.229.04:30:17.34#ibcon#end of sib2, iclass 3, count 2 2006.229.04:30:17.34#ibcon#*after write, iclass 3, count 2 2006.229.04:30:17.34#ibcon#*before return 0, iclass 3, count 2 2006.229.04:30:17.34#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:17.34#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:17.34#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.04:30:17.34#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:17.34#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:17.46#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:17.46#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:17.46#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:30:17.46#ibcon#first serial, iclass 3, count 0 2006.229.04:30:17.46#ibcon#enter sib2, iclass 3, count 0 2006.229.04:30:17.46#ibcon#flushed, iclass 3, count 0 2006.229.04:30:17.46#ibcon#about to write, iclass 3, count 0 2006.229.04:30:17.46#ibcon#wrote, iclass 3, count 0 2006.229.04:30:17.46#ibcon#about to read 3, iclass 3, count 0 2006.229.04:30:17.48#ibcon#read 3, iclass 3, count 0 2006.229.04:30:17.48#ibcon#about to read 4, iclass 3, count 0 2006.229.04:30:17.48#ibcon#read 4, iclass 3, count 0 2006.229.04:30:17.48#ibcon#about to read 5, iclass 3, count 0 2006.229.04:30:17.48#ibcon#read 5, iclass 3, count 0 2006.229.04:30:17.48#ibcon#about to read 6, iclass 3, count 0 2006.229.04:30:17.48#ibcon#read 6, iclass 3, count 0 2006.229.04:30:17.48#ibcon#end of sib2, iclass 3, count 0 2006.229.04:30:17.48#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:30:17.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:30:17.48#ibcon#[25=USB\r\n] 2006.229.04:30:17.48#ibcon#*before write, iclass 3, count 0 2006.229.04:30:17.48#ibcon#enter sib2, iclass 3, count 0 2006.229.04:30:17.48#ibcon#flushed, iclass 3, count 0 2006.229.04:30:17.48#ibcon#about to write, iclass 3, count 0 2006.229.04:30:17.48#ibcon#wrote, iclass 3, count 0 2006.229.04:30:17.48#ibcon#about to read 3, iclass 3, count 0 2006.229.04:30:17.51#ibcon#read 3, iclass 3, count 0 2006.229.04:30:17.51#ibcon#about to read 4, iclass 3, count 0 2006.229.04:30:17.51#ibcon#read 4, iclass 3, count 0 2006.229.04:30:17.51#ibcon#about to read 5, iclass 3, count 0 2006.229.04:30:17.51#ibcon#read 5, iclass 3, count 0 2006.229.04:30:17.51#ibcon#about to read 6, iclass 3, count 0 2006.229.04:30:17.51#ibcon#read 6, iclass 3, count 0 2006.229.04:30:17.51#ibcon#end of sib2, iclass 3, count 0 2006.229.04:30:17.51#ibcon#*after write, iclass 3, count 0 2006.229.04:30:17.51#ibcon#*before return 0, iclass 3, count 0 2006.229.04:30:17.51#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:17.51#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:17.51#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:30:17.51#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:30:17.51$vck44/valo=2,534.99 2006.229.04:30:17.51#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.04:30:17.51#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.04:30:17.51#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:17.51#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:17.51#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:17.51#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:17.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:30:17.51#ibcon#first serial, iclass 5, count 0 2006.229.04:30:17.51#ibcon#enter sib2, iclass 5, count 0 2006.229.04:30:17.51#ibcon#flushed, iclass 5, count 0 2006.229.04:30:17.51#ibcon#about to write, iclass 5, count 0 2006.229.04:30:17.51#ibcon#wrote, iclass 5, count 0 2006.229.04:30:17.51#ibcon#about to read 3, iclass 5, count 0 2006.229.04:30:17.53#ibcon#read 3, iclass 5, count 0 2006.229.04:30:17.53#ibcon#about to read 4, iclass 5, count 0 2006.229.04:30:17.53#ibcon#read 4, iclass 5, count 0 2006.229.04:30:17.53#ibcon#about to read 5, iclass 5, count 0 2006.229.04:30:17.53#ibcon#read 5, iclass 5, count 0 2006.229.04:30:17.53#ibcon#about to read 6, iclass 5, count 0 2006.229.04:30:17.53#ibcon#read 6, iclass 5, count 0 2006.229.04:30:17.53#ibcon#end of sib2, iclass 5, count 0 2006.229.04:30:17.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:30:17.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:30:17.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:30:17.53#ibcon#*before write, iclass 5, count 0 2006.229.04:30:17.53#ibcon#enter sib2, iclass 5, count 0 2006.229.04:30:17.53#ibcon#flushed, iclass 5, count 0 2006.229.04:30:17.53#ibcon#about to write, iclass 5, count 0 2006.229.04:30:17.53#ibcon#wrote, iclass 5, count 0 2006.229.04:30:17.53#ibcon#about to read 3, iclass 5, count 0 2006.229.04:30:17.57#ibcon#read 3, iclass 5, count 0 2006.229.04:30:17.57#ibcon#about to read 4, iclass 5, count 0 2006.229.04:30:17.57#ibcon#read 4, iclass 5, count 0 2006.229.04:30:17.57#ibcon#about to read 5, iclass 5, count 0 2006.229.04:30:17.57#ibcon#read 5, iclass 5, count 0 2006.229.04:30:17.57#ibcon#about to read 6, iclass 5, count 0 2006.229.04:30:17.57#ibcon#read 6, iclass 5, count 0 2006.229.04:30:17.57#ibcon#end of sib2, iclass 5, count 0 2006.229.04:30:17.57#ibcon#*after write, iclass 5, count 0 2006.229.04:30:17.57#ibcon#*before return 0, iclass 5, count 0 2006.229.04:30:17.57#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:17.57#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:17.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:30:17.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:30:17.57$vck44/va=2,7 2006.229.04:30:17.57#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.04:30:17.57#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.04:30:17.57#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:17.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:17.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:17.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:17.63#ibcon#enter wrdev, iclass 7, count 2 2006.229.04:30:17.63#ibcon#first serial, iclass 7, count 2 2006.229.04:30:17.63#ibcon#enter sib2, iclass 7, count 2 2006.229.04:30:17.63#ibcon#flushed, iclass 7, count 2 2006.229.04:30:17.63#ibcon#about to write, iclass 7, count 2 2006.229.04:30:17.63#ibcon#wrote, iclass 7, count 2 2006.229.04:30:17.63#ibcon#about to read 3, iclass 7, count 2 2006.229.04:30:17.65#ibcon#read 3, iclass 7, count 2 2006.229.04:30:17.65#ibcon#about to read 4, iclass 7, count 2 2006.229.04:30:17.65#ibcon#read 4, iclass 7, count 2 2006.229.04:30:17.65#ibcon#about to read 5, iclass 7, count 2 2006.229.04:30:17.65#ibcon#read 5, iclass 7, count 2 2006.229.04:30:17.65#ibcon#about to read 6, iclass 7, count 2 2006.229.04:30:17.65#ibcon#read 6, iclass 7, count 2 2006.229.04:30:17.65#ibcon#end of sib2, iclass 7, count 2 2006.229.04:30:17.65#ibcon#*mode == 0, iclass 7, count 2 2006.229.04:30:17.65#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.04:30:17.65#ibcon#[25=AT02-07\r\n] 2006.229.04:30:17.65#ibcon#*before write, iclass 7, count 2 2006.229.04:30:17.65#ibcon#enter sib2, iclass 7, count 2 2006.229.04:30:17.65#ibcon#flushed, iclass 7, count 2 2006.229.04:30:17.65#ibcon#about to write, iclass 7, count 2 2006.229.04:30:17.65#ibcon#wrote, iclass 7, count 2 2006.229.04:30:17.65#ibcon#about to read 3, iclass 7, count 2 2006.229.04:30:17.68#ibcon#read 3, iclass 7, count 2 2006.229.04:30:17.68#ibcon#about to read 4, iclass 7, count 2 2006.229.04:30:17.68#ibcon#read 4, iclass 7, count 2 2006.229.04:30:17.68#ibcon#about to read 5, iclass 7, count 2 2006.229.04:30:17.68#ibcon#read 5, iclass 7, count 2 2006.229.04:30:17.68#ibcon#about to read 6, iclass 7, count 2 2006.229.04:30:17.68#ibcon#read 6, iclass 7, count 2 2006.229.04:30:17.68#ibcon#end of sib2, iclass 7, count 2 2006.229.04:30:17.68#ibcon#*after write, iclass 7, count 2 2006.229.04:30:17.68#ibcon#*before return 0, iclass 7, count 2 2006.229.04:30:17.68#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:17.68#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:17.68#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.04:30:17.68#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:17.68#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:17.80#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:17.80#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:17.80#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:30:17.80#ibcon#first serial, iclass 7, count 0 2006.229.04:30:17.80#ibcon#enter sib2, iclass 7, count 0 2006.229.04:30:17.80#ibcon#flushed, iclass 7, count 0 2006.229.04:30:17.80#ibcon#about to write, iclass 7, count 0 2006.229.04:30:17.80#ibcon#wrote, iclass 7, count 0 2006.229.04:30:17.80#ibcon#about to read 3, iclass 7, count 0 2006.229.04:30:17.82#ibcon#read 3, iclass 7, count 0 2006.229.04:30:17.82#ibcon#about to read 4, iclass 7, count 0 2006.229.04:30:17.82#ibcon#read 4, iclass 7, count 0 2006.229.04:30:17.82#ibcon#about to read 5, iclass 7, count 0 2006.229.04:30:17.82#ibcon#read 5, iclass 7, count 0 2006.229.04:30:17.82#ibcon#about to read 6, iclass 7, count 0 2006.229.04:30:17.82#ibcon#read 6, iclass 7, count 0 2006.229.04:30:17.82#ibcon#end of sib2, iclass 7, count 0 2006.229.04:30:17.82#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:30:17.82#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:30:17.82#ibcon#[25=USB\r\n] 2006.229.04:30:17.82#ibcon#*before write, iclass 7, count 0 2006.229.04:30:17.82#ibcon#enter sib2, iclass 7, count 0 2006.229.04:30:17.82#ibcon#flushed, iclass 7, count 0 2006.229.04:30:17.82#ibcon#about to write, iclass 7, count 0 2006.229.04:30:17.82#ibcon#wrote, iclass 7, count 0 2006.229.04:30:17.82#ibcon#about to read 3, iclass 7, count 0 2006.229.04:30:17.85#ibcon#read 3, iclass 7, count 0 2006.229.04:30:17.85#ibcon#about to read 4, iclass 7, count 0 2006.229.04:30:17.85#ibcon#read 4, iclass 7, count 0 2006.229.04:30:17.85#ibcon#about to read 5, iclass 7, count 0 2006.229.04:30:17.85#ibcon#read 5, iclass 7, count 0 2006.229.04:30:17.85#ibcon#about to read 6, iclass 7, count 0 2006.229.04:30:17.85#ibcon#read 6, iclass 7, count 0 2006.229.04:30:17.85#ibcon#end of sib2, iclass 7, count 0 2006.229.04:30:17.85#ibcon#*after write, iclass 7, count 0 2006.229.04:30:17.85#ibcon#*before return 0, iclass 7, count 0 2006.229.04:30:17.85#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:17.85#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:17.85#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:30:17.85#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:30:17.85$vck44/valo=3,564.99 2006.229.04:30:17.85#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.04:30:17.85#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.04:30:17.85#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:17.85#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:17.85#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:17.85#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:17.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:30:17.85#ibcon#first serial, iclass 11, count 0 2006.229.04:30:17.85#ibcon#enter sib2, iclass 11, count 0 2006.229.04:30:17.85#ibcon#flushed, iclass 11, count 0 2006.229.04:30:17.85#ibcon#about to write, iclass 11, count 0 2006.229.04:30:17.85#ibcon#wrote, iclass 11, count 0 2006.229.04:30:17.85#ibcon#about to read 3, iclass 11, count 0 2006.229.04:30:17.87#ibcon#read 3, iclass 11, count 0 2006.229.04:30:17.87#ibcon#about to read 4, iclass 11, count 0 2006.229.04:30:17.87#ibcon#read 4, iclass 11, count 0 2006.229.04:30:17.87#ibcon#about to read 5, iclass 11, count 0 2006.229.04:30:17.87#ibcon#read 5, iclass 11, count 0 2006.229.04:30:17.87#ibcon#about to read 6, iclass 11, count 0 2006.229.04:30:17.87#ibcon#read 6, iclass 11, count 0 2006.229.04:30:17.87#ibcon#end of sib2, iclass 11, count 0 2006.229.04:30:17.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:30:17.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:30:17.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:30:17.87#ibcon#*before write, iclass 11, count 0 2006.229.04:30:17.87#ibcon#enter sib2, iclass 11, count 0 2006.229.04:30:17.87#ibcon#flushed, iclass 11, count 0 2006.229.04:30:17.87#ibcon#about to write, iclass 11, count 0 2006.229.04:30:17.87#ibcon#wrote, iclass 11, count 0 2006.229.04:30:17.87#ibcon#about to read 3, iclass 11, count 0 2006.229.04:30:17.91#ibcon#read 3, iclass 11, count 0 2006.229.04:30:17.91#ibcon#about to read 4, iclass 11, count 0 2006.229.04:30:17.91#ibcon#read 4, iclass 11, count 0 2006.229.04:30:17.91#ibcon#about to read 5, iclass 11, count 0 2006.229.04:30:17.91#ibcon#read 5, iclass 11, count 0 2006.229.04:30:17.91#ibcon#about to read 6, iclass 11, count 0 2006.229.04:30:17.91#ibcon#read 6, iclass 11, count 0 2006.229.04:30:17.91#ibcon#end of sib2, iclass 11, count 0 2006.229.04:30:17.91#ibcon#*after write, iclass 11, count 0 2006.229.04:30:17.91#ibcon#*before return 0, iclass 11, count 0 2006.229.04:30:17.91#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:17.91#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:17.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:30:17.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:30:17.91$vck44/va=3,6 2006.229.04:30:17.91#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.04:30:17.91#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.04:30:17.91#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:17.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:17.97#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:17.97#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:17.97#ibcon#enter wrdev, iclass 13, count 2 2006.229.04:30:17.97#ibcon#first serial, iclass 13, count 2 2006.229.04:30:17.97#ibcon#enter sib2, iclass 13, count 2 2006.229.04:30:17.97#ibcon#flushed, iclass 13, count 2 2006.229.04:30:17.97#ibcon#about to write, iclass 13, count 2 2006.229.04:30:17.97#ibcon#wrote, iclass 13, count 2 2006.229.04:30:17.97#ibcon#about to read 3, iclass 13, count 2 2006.229.04:30:17.99#ibcon#read 3, iclass 13, count 2 2006.229.04:30:17.99#ibcon#about to read 4, iclass 13, count 2 2006.229.04:30:17.99#ibcon#read 4, iclass 13, count 2 2006.229.04:30:17.99#ibcon#about to read 5, iclass 13, count 2 2006.229.04:30:17.99#ibcon#read 5, iclass 13, count 2 2006.229.04:30:17.99#ibcon#about to read 6, iclass 13, count 2 2006.229.04:30:17.99#ibcon#read 6, iclass 13, count 2 2006.229.04:30:17.99#ibcon#end of sib2, iclass 13, count 2 2006.229.04:30:17.99#ibcon#*mode == 0, iclass 13, count 2 2006.229.04:30:17.99#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.04:30:17.99#ibcon#[25=AT03-06\r\n] 2006.229.04:30:17.99#ibcon#*before write, iclass 13, count 2 2006.229.04:30:17.99#ibcon#enter sib2, iclass 13, count 2 2006.229.04:30:17.99#ibcon#flushed, iclass 13, count 2 2006.229.04:30:17.99#ibcon#about to write, iclass 13, count 2 2006.229.04:30:17.99#ibcon#wrote, iclass 13, count 2 2006.229.04:30:17.99#ibcon#about to read 3, iclass 13, count 2 2006.229.04:30:18.02#ibcon#read 3, iclass 13, count 2 2006.229.04:30:18.02#ibcon#about to read 4, iclass 13, count 2 2006.229.04:30:18.02#ibcon#read 4, iclass 13, count 2 2006.229.04:30:18.02#ibcon#about to read 5, iclass 13, count 2 2006.229.04:30:18.02#ibcon#read 5, iclass 13, count 2 2006.229.04:30:18.02#ibcon#about to read 6, iclass 13, count 2 2006.229.04:30:18.02#ibcon#read 6, iclass 13, count 2 2006.229.04:30:18.02#ibcon#end of sib2, iclass 13, count 2 2006.229.04:30:18.02#ibcon#*after write, iclass 13, count 2 2006.229.04:30:18.02#ibcon#*before return 0, iclass 13, count 2 2006.229.04:30:18.02#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:18.02#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:18.02#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.04:30:18.02#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:18.02#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:18.14#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:18.14#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:18.14#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:30:18.14#ibcon#first serial, iclass 13, count 0 2006.229.04:30:18.14#ibcon#enter sib2, iclass 13, count 0 2006.229.04:30:18.14#ibcon#flushed, iclass 13, count 0 2006.229.04:30:18.14#ibcon#about to write, iclass 13, count 0 2006.229.04:30:18.14#ibcon#wrote, iclass 13, count 0 2006.229.04:30:18.14#ibcon#about to read 3, iclass 13, count 0 2006.229.04:30:18.16#ibcon#read 3, iclass 13, count 0 2006.229.04:30:18.16#ibcon#about to read 4, iclass 13, count 0 2006.229.04:30:18.16#ibcon#read 4, iclass 13, count 0 2006.229.04:30:18.16#ibcon#about to read 5, iclass 13, count 0 2006.229.04:30:18.16#ibcon#read 5, iclass 13, count 0 2006.229.04:30:18.16#ibcon#about to read 6, iclass 13, count 0 2006.229.04:30:18.16#ibcon#read 6, iclass 13, count 0 2006.229.04:30:18.16#ibcon#end of sib2, iclass 13, count 0 2006.229.04:30:18.16#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:30:18.16#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:30:18.16#ibcon#[25=USB\r\n] 2006.229.04:30:18.16#ibcon#*before write, iclass 13, count 0 2006.229.04:30:18.16#ibcon#enter sib2, iclass 13, count 0 2006.229.04:30:18.16#ibcon#flushed, iclass 13, count 0 2006.229.04:30:18.16#ibcon#about to write, iclass 13, count 0 2006.229.04:30:18.16#ibcon#wrote, iclass 13, count 0 2006.229.04:30:18.16#ibcon#about to read 3, iclass 13, count 0 2006.229.04:30:18.19#ibcon#read 3, iclass 13, count 0 2006.229.04:30:18.19#ibcon#about to read 4, iclass 13, count 0 2006.229.04:30:18.19#ibcon#read 4, iclass 13, count 0 2006.229.04:30:18.19#ibcon#about to read 5, iclass 13, count 0 2006.229.04:30:18.19#ibcon#read 5, iclass 13, count 0 2006.229.04:30:18.19#ibcon#about to read 6, iclass 13, count 0 2006.229.04:30:18.19#ibcon#read 6, iclass 13, count 0 2006.229.04:30:18.19#ibcon#end of sib2, iclass 13, count 0 2006.229.04:30:18.19#ibcon#*after write, iclass 13, count 0 2006.229.04:30:18.19#ibcon#*before return 0, iclass 13, count 0 2006.229.04:30:18.19#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:18.19#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:18.19#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:30:18.19#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:30:18.19$vck44/valo=4,624.99 2006.229.04:30:18.19#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.04:30:18.19#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.04:30:18.19#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:18.19#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:18.19#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:18.19#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:18.19#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:30:18.19#ibcon#first serial, iclass 15, count 0 2006.229.04:30:18.19#ibcon#enter sib2, iclass 15, count 0 2006.229.04:30:18.19#ibcon#flushed, iclass 15, count 0 2006.229.04:30:18.19#ibcon#about to write, iclass 15, count 0 2006.229.04:30:18.19#ibcon#wrote, iclass 15, count 0 2006.229.04:30:18.19#ibcon#about to read 3, iclass 15, count 0 2006.229.04:30:18.21#ibcon#read 3, iclass 15, count 0 2006.229.04:30:18.21#ibcon#about to read 4, iclass 15, count 0 2006.229.04:30:18.21#ibcon#read 4, iclass 15, count 0 2006.229.04:30:18.21#ibcon#about to read 5, iclass 15, count 0 2006.229.04:30:18.21#ibcon#read 5, iclass 15, count 0 2006.229.04:30:18.21#ibcon#about to read 6, iclass 15, count 0 2006.229.04:30:18.21#ibcon#read 6, iclass 15, count 0 2006.229.04:30:18.21#ibcon#end of sib2, iclass 15, count 0 2006.229.04:30:18.21#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:30:18.21#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:30:18.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:30:18.21#ibcon#*before write, iclass 15, count 0 2006.229.04:30:18.21#ibcon#enter sib2, iclass 15, count 0 2006.229.04:30:18.21#ibcon#flushed, iclass 15, count 0 2006.229.04:30:18.21#ibcon#about to write, iclass 15, count 0 2006.229.04:30:18.21#ibcon#wrote, iclass 15, count 0 2006.229.04:30:18.21#ibcon#about to read 3, iclass 15, count 0 2006.229.04:30:18.25#ibcon#read 3, iclass 15, count 0 2006.229.04:30:18.25#ibcon#about to read 4, iclass 15, count 0 2006.229.04:30:18.25#ibcon#read 4, iclass 15, count 0 2006.229.04:30:18.25#ibcon#about to read 5, iclass 15, count 0 2006.229.04:30:18.25#ibcon#read 5, iclass 15, count 0 2006.229.04:30:18.25#ibcon#about to read 6, iclass 15, count 0 2006.229.04:30:18.25#ibcon#read 6, iclass 15, count 0 2006.229.04:30:18.25#ibcon#end of sib2, iclass 15, count 0 2006.229.04:30:18.25#ibcon#*after write, iclass 15, count 0 2006.229.04:30:18.25#ibcon#*before return 0, iclass 15, count 0 2006.229.04:30:18.25#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:18.25#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:18.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:30:18.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:30:18.25$vck44/va=4,7 2006.229.04:30:18.25#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.04:30:18.25#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.04:30:18.25#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:18.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:18.31#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:18.31#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:18.31#ibcon#enter wrdev, iclass 17, count 2 2006.229.04:30:18.31#ibcon#first serial, iclass 17, count 2 2006.229.04:30:18.31#ibcon#enter sib2, iclass 17, count 2 2006.229.04:30:18.31#ibcon#flushed, iclass 17, count 2 2006.229.04:30:18.31#ibcon#about to write, iclass 17, count 2 2006.229.04:30:18.31#ibcon#wrote, iclass 17, count 2 2006.229.04:30:18.31#ibcon#about to read 3, iclass 17, count 2 2006.229.04:30:18.33#ibcon#read 3, iclass 17, count 2 2006.229.04:30:18.33#ibcon#about to read 4, iclass 17, count 2 2006.229.04:30:18.33#ibcon#read 4, iclass 17, count 2 2006.229.04:30:18.33#ibcon#about to read 5, iclass 17, count 2 2006.229.04:30:18.33#ibcon#read 5, iclass 17, count 2 2006.229.04:30:18.33#ibcon#about to read 6, iclass 17, count 2 2006.229.04:30:18.33#ibcon#read 6, iclass 17, count 2 2006.229.04:30:18.33#ibcon#end of sib2, iclass 17, count 2 2006.229.04:30:18.33#ibcon#*mode == 0, iclass 17, count 2 2006.229.04:30:18.33#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.04:30:18.33#ibcon#[25=AT04-07\r\n] 2006.229.04:30:18.33#ibcon#*before write, iclass 17, count 2 2006.229.04:30:18.33#ibcon#enter sib2, iclass 17, count 2 2006.229.04:30:18.33#ibcon#flushed, iclass 17, count 2 2006.229.04:30:18.33#ibcon#about to write, iclass 17, count 2 2006.229.04:30:18.33#ibcon#wrote, iclass 17, count 2 2006.229.04:30:18.33#ibcon#about to read 3, iclass 17, count 2 2006.229.04:30:18.36#ibcon#read 3, iclass 17, count 2 2006.229.04:30:18.36#ibcon#about to read 4, iclass 17, count 2 2006.229.04:30:18.36#ibcon#read 4, iclass 17, count 2 2006.229.04:30:18.36#ibcon#about to read 5, iclass 17, count 2 2006.229.04:30:18.36#ibcon#read 5, iclass 17, count 2 2006.229.04:30:18.36#ibcon#about to read 6, iclass 17, count 2 2006.229.04:30:18.36#ibcon#read 6, iclass 17, count 2 2006.229.04:30:18.36#ibcon#end of sib2, iclass 17, count 2 2006.229.04:30:18.36#ibcon#*after write, iclass 17, count 2 2006.229.04:30:18.36#ibcon#*before return 0, iclass 17, count 2 2006.229.04:30:18.36#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:18.36#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:18.36#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.04:30:18.36#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:18.36#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:18.48#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:18.48#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:18.48#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:30:18.48#ibcon#first serial, iclass 17, count 0 2006.229.04:30:18.48#ibcon#enter sib2, iclass 17, count 0 2006.229.04:30:18.48#ibcon#flushed, iclass 17, count 0 2006.229.04:30:18.48#ibcon#about to write, iclass 17, count 0 2006.229.04:30:18.48#ibcon#wrote, iclass 17, count 0 2006.229.04:30:18.48#ibcon#about to read 3, iclass 17, count 0 2006.229.04:30:18.50#ibcon#read 3, iclass 17, count 0 2006.229.04:30:18.50#ibcon#about to read 4, iclass 17, count 0 2006.229.04:30:18.50#ibcon#read 4, iclass 17, count 0 2006.229.04:30:18.50#ibcon#about to read 5, iclass 17, count 0 2006.229.04:30:18.50#ibcon#read 5, iclass 17, count 0 2006.229.04:30:18.50#ibcon#about to read 6, iclass 17, count 0 2006.229.04:30:18.50#ibcon#read 6, iclass 17, count 0 2006.229.04:30:18.50#ibcon#end of sib2, iclass 17, count 0 2006.229.04:30:18.50#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:30:18.50#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:30:18.50#ibcon#[25=USB\r\n] 2006.229.04:30:18.50#ibcon#*before write, iclass 17, count 0 2006.229.04:30:18.50#ibcon#enter sib2, iclass 17, count 0 2006.229.04:30:18.50#ibcon#flushed, iclass 17, count 0 2006.229.04:30:18.50#ibcon#about to write, iclass 17, count 0 2006.229.04:30:18.50#ibcon#wrote, iclass 17, count 0 2006.229.04:30:18.50#ibcon#about to read 3, iclass 17, count 0 2006.229.04:30:18.53#ibcon#read 3, iclass 17, count 0 2006.229.04:30:18.53#ibcon#about to read 4, iclass 17, count 0 2006.229.04:30:18.53#ibcon#read 4, iclass 17, count 0 2006.229.04:30:18.53#ibcon#about to read 5, iclass 17, count 0 2006.229.04:30:18.53#ibcon#read 5, iclass 17, count 0 2006.229.04:30:18.53#ibcon#about to read 6, iclass 17, count 0 2006.229.04:30:18.53#ibcon#read 6, iclass 17, count 0 2006.229.04:30:18.53#ibcon#end of sib2, iclass 17, count 0 2006.229.04:30:18.53#ibcon#*after write, iclass 17, count 0 2006.229.04:30:18.53#ibcon#*before return 0, iclass 17, count 0 2006.229.04:30:18.53#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:18.53#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:18.53#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:30:18.53#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:30:18.53$vck44/valo=5,734.99 2006.229.04:30:18.53#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.04:30:18.53#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.04:30:18.53#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:18.53#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:18.53#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:18.53#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:18.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:30:18.53#ibcon#first serial, iclass 19, count 0 2006.229.04:30:18.53#ibcon#enter sib2, iclass 19, count 0 2006.229.04:30:18.53#ibcon#flushed, iclass 19, count 0 2006.229.04:30:18.53#ibcon#about to write, iclass 19, count 0 2006.229.04:30:18.53#ibcon#wrote, iclass 19, count 0 2006.229.04:30:18.53#ibcon#about to read 3, iclass 19, count 0 2006.229.04:30:18.55#ibcon#read 3, iclass 19, count 0 2006.229.04:30:18.55#ibcon#about to read 4, iclass 19, count 0 2006.229.04:30:18.55#ibcon#read 4, iclass 19, count 0 2006.229.04:30:18.55#ibcon#about to read 5, iclass 19, count 0 2006.229.04:30:18.55#ibcon#read 5, iclass 19, count 0 2006.229.04:30:18.55#ibcon#about to read 6, iclass 19, count 0 2006.229.04:30:18.55#ibcon#read 6, iclass 19, count 0 2006.229.04:30:18.55#ibcon#end of sib2, iclass 19, count 0 2006.229.04:30:18.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:30:18.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:30:18.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:30:18.55#ibcon#*before write, iclass 19, count 0 2006.229.04:30:18.55#ibcon#enter sib2, iclass 19, count 0 2006.229.04:30:18.55#ibcon#flushed, iclass 19, count 0 2006.229.04:30:18.55#ibcon#about to write, iclass 19, count 0 2006.229.04:30:18.55#ibcon#wrote, iclass 19, count 0 2006.229.04:30:18.55#ibcon#about to read 3, iclass 19, count 0 2006.229.04:30:18.59#ibcon#read 3, iclass 19, count 0 2006.229.04:30:18.59#ibcon#about to read 4, iclass 19, count 0 2006.229.04:30:18.59#ibcon#read 4, iclass 19, count 0 2006.229.04:30:18.59#ibcon#about to read 5, iclass 19, count 0 2006.229.04:30:18.59#ibcon#read 5, iclass 19, count 0 2006.229.04:30:18.59#ibcon#about to read 6, iclass 19, count 0 2006.229.04:30:18.59#ibcon#read 6, iclass 19, count 0 2006.229.04:30:18.59#ibcon#end of sib2, iclass 19, count 0 2006.229.04:30:18.59#ibcon#*after write, iclass 19, count 0 2006.229.04:30:18.59#ibcon#*before return 0, iclass 19, count 0 2006.229.04:30:18.59#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:18.59#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:18.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:30:18.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:30:18.59$vck44/va=5,4 2006.229.04:30:18.59#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.04:30:18.59#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.04:30:18.59#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:18.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:18.65#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:18.65#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:18.65#ibcon#enter wrdev, iclass 21, count 2 2006.229.04:30:18.65#ibcon#first serial, iclass 21, count 2 2006.229.04:30:18.65#ibcon#enter sib2, iclass 21, count 2 2006.229.04:30:18.65#ibcon#flushed, iclass 21, count 2 2006.229.04:30:18.65#ibcon#about to write, iclass 21, count 2 2006.229.04:30:18.65#ibcon#wrote, iclass 21, count 2 2006.229.04:30:18.65#ibcon#about to read 3, iclass 21, count 2 2006.229.04:30:18.67#ibcon#read 3, iclass 21, count 2 2006.229.04:30:18.67#ibcon#about to read 4, iclass 21, count 2 2006.229.04:30:18.67#ibcon#read 4, iclass 21, count 2 2006.229.04:30:18.67#ibcon#about to read 5, iclass 21, count 2 2006.229.04:30:18.67#ibcon#read 5, iclass 21, count 2 2006.229.04:30:18.67#ibcon#about to read 6, iclass 21, count 2 2006.229.04:30:18.67#ibcon#read 6, iclass 21, count 2 2006.229.04:30:18.67#ibcon#end of sib2, iclass 21, count 2 2006.229.04:30:18.67#ibcon#*mode == 0, iclass 21, count 2 2006.229.04:30:18.67#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.04:30:18.67#ibcon#[25=AT05-04\r\n] 2006.229.04:30:18.67#ibcon#*before write, iclass 21, count 2 2006.229.04:30:18.67#ibcon#enter sib2, iclass 21, count 2 2006.229.04:30:18.67#ibcon#flushed, iclass 21, count 2 2006.229.04:30:18.67#ibcon#about to write, iclass 21, count 2 2006.229.04:30:18.67#ibcon#wrote, iclass 21, count 2 2006.229.04:30:18.67#ibcon#about to read 3, iclass 21, count 2 2006.229.04:30:18.70#ibcon#read 3, iclass 21, count 2 2006.229.04:30:18.70#ibcon#about to read 4, iclass 21, count 2 2006.229.04:30:18.70#ibcon#read 4, iclass 21, count 2 2006.229.04:30:18.70#ibcon#about to read 5, iclass 21, count 2 2006.229.04:30:18.70#ibcon#read 5, iclass 21, count 2 2006.229.04:30:18.70#ibcon#about to read 6, iclass 21, count 2 2006.229.04:30:18.70#ibcon#read 6, iclass 21, count 2 2006.229.04:30:18.70#ibcon#end of sib2, iclass 21, count 2 2006.229.04:30:18.70#ibcon#*after write, iclass 21, count 2 2006.229.04:30:18.70#ibcon#*before return 0, iclass 21, count 2 2006.229.04:30:18.70#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:18.70#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:18.70#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.04:30:18.70#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:18.70#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:18.82#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:18.82#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:18.82#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:30:18.82#ibcon#first serial, iclass 21, count 0 2006.229.04:30:18.82#ibcon#enter sib2, iclass 21, count 0 2006.229.04:30:18.82#ibcon#flushed, iclass 21, count 0 2006.229.04:30:18.82#ibcon#about to write, iclass 21, count 0 2006.229.04:30:18.82#ibcon#wrote, iclass 21, count 0 2006.229.04:30:18.82#ibcon#about to read 3, iclass 21, count 0 2006.229.04:30:18.84#ibcon#read 3, iclass 21, count 0 2006.229.04:30:18.84#ibcon#about to read 4, iclass 21, count 0 2006.229.04:30:18.84#ibcon#read 4, iclass 21, count 0 2006.229.04:30:18.84#ibcon#about to read 5, iclass 21, count 0 2006.229.04:30:18.84#ibcon#read 5, iclass 21, count 0 2006.229.04:30:18.84#ibcon#about to read 6, iclass 21, count 0 2006.229.04:30:18.84#ibcon#read 6, iclass 21, count 0 2006.229.04:30:18.84#ibcon#end of sib2, iclass 21, count 0 2006.229.04:30:18.84#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:30:18.84#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:30:18.84#ibcon#[25=USB\r\n] 2006.229.04:30:18.84#ibcon#*before write, iclass 21, count 0 2006.229.04:30:18.84#ibcon#enter sib2, iclass 21, count 0 2006.229.04:30:18.84#ibcon#flushed, iclass 21, count 0 2006.229.04:30:18.84#ibcon#about to write, iclass 21, count 0 2006.229.04:30:18.84#ibcon#wrote, iclass 21, count 0 2006.229.04:30:18.84#ibcon#about to read 3, iclass 21, count 0 2006.229.04:30:18.87#ibcon#read 3, iclass 21, count 0 2006.229.04:30:18.87#ibcon#about to read 4, iclass 21, count 0 2006.229.04:30:18.87#ibcon#read 4, iclass 21, count 0 2006.229.04:30:18.87#ibcon#about to read 5, iclass 21, count 0 2006.229.04:30:18.87#ibcon#read 5, iclass 21, count 0 2006.229.04:30:18.87#ibcon#about to read 6, iclass 21, count 0 2006.229.04:30:18.87#ibcon#read 6, iclass 21, count 0 2006.229.04:30:18.87#ibcon#end of sib2, iclass 21, count 0 2006.229.04:30:18.87#ibcon#*after write, iclass 21, count 0 2006.229.04:30:18.87#ibcon#*before return 0, iclass 21, count 0 2006.229.04:30:18.87#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:18.87#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:18.87#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:30:18.87#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:30:18.87$vck44/valo=6,814.99 2006.229.04:30:18.87#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.04:30:18.87#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.04:30:18.87#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:18.87#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:18.87#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:18.87#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:18.87#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:30:18.87#ibcon#first serial, iclass 23, count 0 2006.229.04:30:18.87#ibcon#enter sib2, iclass 23, count 0 2006.229.04:30:18.87#ibcon#flushed, iclass 23, count 0 2006.229.04:30:18.87#ibcon#about to write, iclass 23, count 0 2006.229.04:30:18.87#ibcon#wrote, iclass 23, count 0 2006.229.04:30:18.87#ibcon#about to read 3, iclass 23, count 0 2006.229.04:30:18.89#ibcon#read 3, iclass 23, count 0 2006.229.04:30:18.89#ibcon#about to read 4, iclass 23, count 0 2006.229.04:30:18.89#ibcon#read 4, iclass 23, count 0 2006.229.04:30:18.89#ibcon#about to read 5, iclass 23, count 0 2006.229.04:30:18.89#ibcon#read 5, iclass 23, count 0 2006.229.04:30:18.89#ibcon#about to read 6, iclass 23, count 0 2006.229.04:30:18.89#ibcon#read 6, iclass 23, count 0 2006.229.04:30:18.89#ibcon#end of sib2, iclass 23, count 0 2006.229.04:30:18.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:30:18.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:30:18.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:30:18.89#ibcon#*before write, iclass 23, count 0 2006.229.04:30:18.89#ibcon#enter sib2, iclass 23, count 0 2006.229.04:30:18.89#ibcon#flushed, iclass 23, count 0 2006.229.04:30:18.89#ibcon#about to write, iclass 23, count 0 2006.229.04:30:18.89#ibcon#wrote, iclass 23, count 0 2006.229.04:30:18.89#ibcon#about to read 3, iclass 23, count 0 2006.229.04:30:18.93#ibcon#read 3, iclass 23, count 0 2006.229.04:30:18.93#ibcon#about to read 4, iclass 23, count 0 2006.229.04:30:18.93#ibcon#read 4, iclass 23, count 0 2006.229.04:30:18.93#ibcon#about to read 5, iclass 23, count 0 2006.229.04:30:18.93#ibcon#read 5, iclass 23, count 0 2006.229.04:30:18.93#ibcon#about to read 6, iclass 23, count 0 2006.229.04:30:18.93#ibcon#read 6, iclass 23, count 0 2006.229.04:30:18.93#ibcon#end of sib2, iclass 23, count 0 2006.229.04:30:18.93#ibcon#*after write, iclass 23, count 0 2006.229.04:30:18.93#ibcon#*before return 0, iclass 23, count 0 2006.229.04:30:18.93#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:18.93#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:18.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:30:18.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:30:18.93$vck44/va=6,4 2006.229.04:30:18.93#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.04:30:18.93#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.04:30:18.93#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:18.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:18.99#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:18.99#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:18.99#ibcon#enter wrdev, iclass 25, count 2 2006.229.04:30:18.99#ibcon#first serial, iclass 25, count 2 2006.229.04:30:18.99#ibcon#enter sib2, iclass 25, count 2 2006.229.04:30:18.99#ibcon#flushed, iclass 25, count 2 2006.229.04:30:18.99#ibcon#about to write, iclass 25, count 2 2006.229.04:30:18.99#ibcon#wrote, iclass 25, count 2 2006.229.04:30:18.99#ibcon#about to read 3, iclass 25, count 2 2006.229.04:30:19.01#ibcon#read 3, iclass 25, count 2 2006.229.04:30:19.01#ibcon#about to read 4, iclass 25, count 2 2006.229.04:30:19.01#ibcon#read 4, iclass 25, count 2 2006.229.04:30:19.01#ibcon#about to read 5, iclass 25, count 2 2006.229.04:30:19.01#ibcon#read 5, iclass 25, count 2 2006.229.04:30:19.01#ibcon#about to read 6, iclass 25, count 2 2006.229.04:30:19.01#ibcon#read 6, iclass 25, count 2 2006.229.04:30:19.01#ibcon#end of sib2, iclass 25, count 2 2006.229.04:30:19.01#ibcon#*mode == 0, iclass 25, count 2 2006.229.04:30:19.01#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.04:30:19.01#ibcon#[25=AT06-04\r\n] 2006.229.04:30:19.01#ibcon#*before write, iclass 25, count 2 2006.229.04:30:19.01#ibcon#enter sib2, iclass 25, count 2 2006.229.04:30:19.01#ibcon#flushed, iclass 25, count 2 2006.229.04:30:19.01#ibcon#about to write, iclass 25, count 2 2006.229.04:30:19.01#ibcon#wrote, iclass 25, count 2 2006.229.04:30:19.01#ibcon#about to read 3, iclass 25, count 2 2006.229.04:30:19.04#ibcon#read 3, iclass 25, count 2 2006.229.04:30:19.04#ibcon#about to read 4, iclass 25, count 2 2006.229.04:30:19.04#ibcon#read 4, iclass 25, count 2 2006.229.04:30:19.04#ibcon#about to read 5, iclass 25, count 2 2006.229.04:30:19.04#ibcon#read 5, iclass 25, count 2 2006.229.04:30:19.04#ibcon#about to read 6, iclass 25, count 2 2006.229.04:30:19.04#ibcon#read 6, iclass 25, count 2 2006.229.04:30:19.04#ibcon#end of sib2, iclass 25, count 2 2006.229.04:30:19.04#ibcon#*after write, iclass 25, count 2 2006.229.04:30:19.04#ibcon#*before return 0, iclass 25, count 2 2006.229.04:30:19.04#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:19.04#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:19.04#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.04:30:19.04#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:19.04#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:19.16#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:19.16#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:19.16#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:30:19.16#ibcon#first serial, iclass 25, count 0 2006.229.04:30:19.16#ibcon#enter sib2, iclass 25, count 0 2006.229.04:30:19.16#ibcon#flushed, iclass 25, count 0 2006.229.04:30:19.16#ibcon#about to write, iclass 25, count 0 2006.229.04:30:19.16#ibcon#wrote, iclass 25, count 0 2006.229.04:30:19.16#ibcon#about to read 3, iclass 25, count 0 2006.229.04:30:19.18#ibcon#read 3, iclass 25, count 0 2006.229.04:30:19.18#ibcon#about to read 4, iclass 25, count 0 2006.229.04:30:19.18#ibcon#read 4, iclass 25, count 0 2006.229.04:30:19.18#ibcon#about to read 5, iclass 25, count 0 2006.229.04:30:19.18#ibcon#read 5, iclass 25, count 0 2006.229.04:30:19.18#ibcon#about to read 6, iclass 25, count 0 2006.229.04:30:19.18#ibcon#read 6, iclass 25, count 0 2006.229.04:30:19.18#ibcon#end of sib2, iclass 25, count 0 2006.229.04:30:19.18#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:30:19.18#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:30:19.18#ibcon#[25=USB\r\n] 2006.229.04:30:19.18#ibcon#*before write, iclass 25, count 0 2006.229.04:30:19.18#ibcon#enter sib2, iclass 25, count 0 2006.229.04:30:19.18#ibcon#flushed, iclass 25, count 0 2006.229.04:30:19.18#ibcon#about to write, iclass 25, count 0 2006.229.04:30:19.18#ibcon#wrote, iclass 25, count 0 2006.229.04:30:19.18#ibcon#about to read 3, iclass 25, count 0 2006.229.04:30:19.21#ibcon#read 3, iclass 25, count 0 2006.229.04:30:19.21#ibcon#about to read 4, iclass 25, count 0 2006.229.04:30:19.21#ibcon#read 4, iclass 25, count 0 2006.229.04:30:19.21#ibcon#about to read 5, iclass 25, count 0 2006.229.04:30:19.21#ibcon#read 5, iclass 25, count 0 2006.229.04:30:19.21#ibcon#about to read 6, iclass 25, count 0 2006.229.04:30:19.21#ibcon#read 6, iclass 25, count 0 2006.229.04:30:19.21#ibcon#end of sib2, iclass 25, count 0 2006.229.04:30:19.21#ibcon#*after write, iclass 25, count 0 2006.229.04:30:19.21#ibcon#*before return 0, iclass 25, count 0 2006.229.04:30:19.21#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:19.21#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:19.21#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:30:19.21#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:30:19.21$vck44/valo=7,864.99 2006.229.04:30:19.21#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.04:30:19.21#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.04:30:19.21#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:19.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:30:19.21#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:30:19.21#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:30:19.21#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:30:19.21#ibcon#first serial, iclass 28, count 0 2006.229.04:30:19.21#ibcon#enter sib2, iclass 28, count 0 2006.229.04:30:19.21#ibcon#flushed, iclass 28, count 0 2006.229.04:30:19.21#ibcon#about to write, iclass 28, count 0 2006.229.04:30:19.21#ibcon#wrote, iclass 28, count 0 2006.229.04:30:19.21#ibcon#about to read 3, iclass 28, count 0 2006.229.04:30:19.23#ibcon#read 3, iclass 28, count 0 2006.229.04:30:19.23#ibcon#about to read 4, iclass 28, count 0 2006.229.04:30:19.23#ibcon#read 4, iclass 28, count 0 2006.229.04:30:19.23#ibcon#about to read 5, iclass 28, count 0 2006.229.04:30:19.23#ibcon#read 5, iclass 28, count 0 2006.229.04:30:19.23#ibcon#about to read 6, iclass 28, count 0 2006.229.04:30:19.23#ibcon#read 6, iclass 28, count 0 2006.229.04:30:19.23#ibcon#end of sib2, iclass 28, count 0 2006.229.04:30:19.23#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:30:19.23#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:30:19.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:30:19.23#ibcon#*before write, iclass 28, count 0 2006.229.04:30:19.23#ibcon#enter sib2, iclass 28, count 0 2006.229.04:30:19.23#ibcon#flushed, iclass 28, count 0 2006.229.04:30:19.23#ibcon#about to write, iclass 28, count 0 2006.229.04:30:19.23#ibcon#wrote, iclass 28, count 0 2006.229.04:30:19.23#ibcon#about to read 3, iclass 28, count 0 2006.229.04:30:19.25#abcon#<5=/04 2.2 4.1 30.51 93 999.9\r\n> 2006.229.04:30:19.27#abcon#{5=INTERFACE CLEAR} 2006.229.04:30:19.27#ibcon#read 3, iclass 28, count 0 2006.229.04:30:19.27#ibcon#about to read 4, iclass 28, count 0 2006.229.04:30:19.27#ibcon#read 4, iclass 28, count 0 2006.229.04:30:19.27#ibcon#about to read 5, iclass 28, count 0 2006.229.04:30:19.27#ibcon#read 5, iclass 28, count 0 2006.229.04:30:19.27#ibcon#about to read 6, iclass 28, count 0 2006.229.04:30:19.27#ibcon#read 6, iclass 28, count 0 2006.229.04:30:19.27#ibcon#end of sib2, iclass 28, count 0 2006.229.04:30:19.27#ibcon#*after write, iclass 28, count 0 2006.229.04:30:19.27#ibcon#*before return 0, iclass 28, count 0 2006.229.04:30:19.27#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:30:19.27#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:30:19.27#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:30:19.27#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:30:19.27$vck44/va=7,5 2006.229.04:30:19.27#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:30:19.27#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:30:19.27#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:19.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:30:19.33#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:30:19.33#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:30:19.33#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:30:19.33#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:30:19.33#ibcon#first serial, iclass 32, count 2 2006.229.04:30:19.33#ibcon#enter sib2, iclass 32, count 2 2006.229.04:30:19.33#ibcon#flushed, iclass 32, count 2 2006.229.04:30:19.33#ibcon#about to write, iclass 32, count 2 2006.229.04:30:19.33#ibcon#wrote, iclass 32, count 2 2006.229.04:30:19.33#ibcon#about to read 3, iclass 32, count 2 2006.229.04:30:19.35#ibcon#read 3, iclass 32, count 2 2006.229.04:30:19.35#ibcon#about to read 4, iclass 32, count 2 2006.229.04:30:19.35#ibcon#read 4, iclass 32, count 2 2006.229.04:30:19.35#ibcon#about to read 5, iclass 32, count 2 2006.229.04:30:19.35#ibcon#read 5, iclass 32, count 2 2006.229.04:30:19.35#ibcon#about to read 6, iclass 32, count 2 2006.229.04:30:19.35#ibcon#read 6, iclass 32, count 2 2006.229.04:30:19.35#ibcon#end of sib2, iclass 32, count 2 2006.229.04:30:19.35#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:30:19.35#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:30:19.35#ibcon#[25=AT07-05\r\n] 2006.229.04:30:19.35#ibcon#*before write, iclass 32, count 2 2006.229.04:30:19.35#ibcon#enter sib2, iclass 32, count 2 2006.229.04:30:19.35#ibcon#flushed, iclass 32, count 2 2006.229.04:30:19.35#ibcon#about to write, iclass 32, count 2 2006.229.04:30:19.35#ibcon#wrote, iclass 32, count 2 2006.229.04:30:19.35#ibcon#about to read 3, iclass 32, count 2 2006.229.04:30:19.38#ibcon#read 3, iclass 32, count 2 2006.229.04:30:19.38#ibcon#about to read 4, iclass 32, count 2 2006.229.04:30:19.38#ibcon#read 4, iclass 32, count 2 2006.229.04:30:19.38#ibcon#about to read 5, iclass 32, count 2 2006.229.04:30:19.38#ibcon#read 5, iclass 32, count 2 2006.229.04:30:19.38#ibcon#about to read 6, iclass 32, count 2 2006.229.04:30:19.38#ibcon#read 6, iclass 32, count 2 2006.229.04:30:19.38#ibcon#end of sib2, iclass 32, count 2 2006.229.04:30:19.38#ibcon#*after write, iclass 32, count 2 2006.229.04:30:19.38#ibcon#*before return 0, iclass 32, count 2 2006.229.04:30:19.38#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:30:19.38#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:30:19.38#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:30:19.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:19.38#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:30:19.50#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:30:19.50#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:30:19.50#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:30:19.50#ibcon#first serial, iclass 32, count 0 2006.229.04:30:19.50#ibcon#enter sib2, iclass 32, count 0 2006.229.04:30:19.50#ibcon#flushed, iclass 32, count 0 2006.229.04:30:19.50#ibcon#about to write, iclass 32, count 0 2006.229.04:30:19.50#ibcon#wrote, iclass 32, count 0 2006.229.04:30:19.50#ibcon#about to read 3, iclass 32, count 0 2006.229.04:30:19.52#ibcon#read 3, iclass 32, count 0 2006.229.04:30:19.52#ibcon#about to read 4, iclass 32, count 0 2006.229.04:30:19.52#ibcon#read 4, iclass 32, count 0 2006.229.04:30:19.52#ibcon#about to read 5, iclass 32, count 0 2006.229.04:30:19.52#ibcon#read 5, iclass 32, count 0 2006.229.04:30:19.52#ibcon#about to read 6, iclass 32, count 0 2006.229.04:30:19.52#ibcon#read 6, iclass 32, count 0 2006.229.04:30:19.52#ibcon#end of sib2, iclass 32, count 0 2006.229.04:30:19.52#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:30:19.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:30:19.52#ibcon#[25=USB\r\n] 2006.229.04:30:19.52#ibcon#*before write, iclass 32, count 0 2006.229.04:30:19.52#ibcon#enter sib2, iclass 32, count 0 2006.229.04:30:19.52#ibcon#flushed, iclass 32, count 0 2006.229.04:30:19.52#ibcon#about to write, iclass 32, count 0 2006.229.04:30:19.52#ibcon#wrote, iclass 32, count 0 2006.229.04:30:19.52#ibcon#about to read 3, iclass 32, count 0 2006.229.04:30:19.55#ibcon#read 3, iclass 32, count 0 2006.229.04:30:19.55#ibcon#about to read 4, iclass 32, count 0 2006.229.04:30:19.55#ibcon#read 4, iclass 32, count 0 2006.229.04:30:19.55#ibcon#about to read 5, iclass 32, count 0 2006.229.04:30:19.55#ibcon#read 5, iclass 32, count 0 2006.229.04:30:19.55#ibcon#about to read 6, iclass 32, count 0 2006.229.04:30:19.55#ibcon#read 6, iclass 32, count 0 2006.229.04:30:19.55#ibcon#end of sib2, iclass 32, count 0 2006.229.04:30:19.55#ibcon#*after write, iclass 32, count 0 2006.229.04:30:19.55#ibcon#*before return 0, iclass 32, count 0 2006.229.04:30:19.55#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:30:19.55#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:30:19.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:30:19.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:30:19.55$vck44/valo=8,884.99 2006.229.04:30:19.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.04:30:19.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.04:30:19.55#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:19.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:19.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:19.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:19.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:30:19.55#ibcon#first serial, iclass 35, count 0 2006.229.04:30:19.55#ibcon#enter sib2, iclass 35, count 0 2006.229.04:30:19.55#ibcon#flushed, iclass 35, count 0 2006.229.04:30:19.55#ibcon#about to write, iclass 35, count 0 2006.229.04:30:19.55#ibcon#wrote, iclass 35, count 0 2006.229.04:30:19.55#ibcon#about to read 3, iclass 35, count 0 2006.229.04:30:19.57#ibcon#read 3, iclass 35, count 0 2006.229.04:30:19.57#ibcon#about to read 4, iclass 35, count 0 2006.229.04:30:19.57#ibcon#read 4, iclass 35, count 0 2006.229.04:30:19.57#ibcon#about to read 5, iclass 35, count 0 2006.229.04:30:19.57#ibcon#read 5, iclass 35, count 0 2006.229.04:30:19.57#ibcon#about to read 6, iclass 35, count 0 2006.229.04:30:19.57#ibcon#read 6, iclass 35, count 0 2006.229.04:30:19.57#ibcon#end of sib2, iclass 35, count 0 2006.229.04:30:19.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:30:19.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:30:19.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:30:19.57#ibcon#*before write, iclass 35, count 0 2006.229.04:30:19.57#ibcon#enter sib2, iclass 35, count 0 2006.229.04:30:19.57#ibcon#flushed, iclass 35, count 0 2006.229.04:30:19.57#ibcon#about to write, iclass 35, count 0 2006.229.04:30:19.57#ibcon#wrote, iclass 35, count 0 2006.229.04:30:19.57#ibcon#about to read 3, iclass 35, count 0 2006.229.04:30:19.61#ibcon#read 3, iclass 35, count 0 2006.229.04:30:19.61#ibcon#about to read 4, iclass 35, count 0 2006.229.04:30:19.61#ibcon#read 4, iclass 35, count 0 2006.229.04:30:19.61#ibcon#about to read 5, iclass 35, count 0 2006.229.04:30:19.61#ibcon#read 5, iclass 35, count 0 2006.229.04:30:19.61#ibcon#about to read 6, iclass 35, count 0 2006.229.04:30:19.61#ibcon#read 6, iclass 35, count 0 2006.229.04:30:19.61#ibcon#end of sib2, iclass 35, count 0 2006.229.04:30:19.61#ibcon#*after write, iclass 35, count 0 2006.229.04:30:19.61#ibcon#*before return 0, iclass 35, count 0 2006.229.04:30:19.61#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:19.61#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:19.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:30:19.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:30:19.61$vck44/va=8,6 2006.229.04:30:19.61#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.04:30:19.61#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.04:30:19.61#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:19.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:30:19.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:30:19.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:30:19.67#ibcon#enter wrdev, iclass 37, count 2 2006.229.04:30:19.67#ibcon#first serial, iclass 37, count 2 2006.229.04:30:19.67#ibcon#enter sib2, iclass 37, count 2 2006.229.04:30:19.67#ibcon#flushed, iclass 37, count 2 2006.229.04:30:19.67#ibcon#about to write, iclass 37, count 2 2006.229.04:30:19.67#ibcon#wrote, iclass 37, count 2 2006.229.04:30:19.67#ibcon#about to read 3, iclass 37, count 2 2006.229.04:30:19.69#ibcon#read 3, iclass 37, count 2 2006.229.04:30:19.69#ibcon#about to read 4, iclass 37, count 2 2006.229.04:30:19.69#ibcon#read 4, iclass 37, count 2 2006.229.04:30:19.69#ibcon#about to read 5, iclass 37, count 2 2006.229.04:30:19.69#ibcon#read 5, iclass 37, count 2 2006.229.04:30:19.69#ibcon#about to read 6, iclass 37, count 2 2006.229.04:30:19.69#ibcon#read 6, iclass 37, count 2 2006.229.04:30:19.69#ibcon#end of sib2, iclass 37, count 2 2006.229.04:30:19.69#ibcon#*mode == 0, iclass 37, count 2 2006.229.04:30:19.69#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.04:30:19.69#ibcon#[25=AT08-06\r\n] 2006.229.04:30:19.69#ibcon#*before write, iclass 37, count 2 2006.229.04:30:19.69#ibcon#enter sib2, iclass 37, count 2 2006.229.04:30:19.69#ibcon#flushed, iclass 37, count 2 2006.229.04:30:19.69#ibcon#about to write, iclass 37, count 2 2006.229.04:30:19.69#ibcon#wrote, iclass 37, count 2 2006.229.04:30:19.69#ibcon#about to read 3, iclass 37, count 2 2006.229.04:30:19.72#ibcon#read 3, iclass 37, count 2 2006.229.04:30:19.72#ibcon#about to read 4, iclass 37, count 2 2006.229.04:30:19.72#ibcon#read 4, iclass 37, count 2 2006.229.04:30:19.72#ibcon#about to read 5, iclass 37, count 2 2006.229.04:30:19.72#ibcon#read 5, iclass 37, count 2 2006.229.04:30:19.72#ibcon#about to read 6, iclass 37, count 2 2006.229.04:30:19.72#ibcon#read 6, iclass 37, count 2 2006.229.04:30:19.72#ibcon#end of sib2, iclass 37, count 2 2006.229.04:30:19.72#ibcon#*after write, iclass 37, count 2 2006.229.04:30:19.72#ibcon#*before return 0, iclass 37, count 2 2006.229.04:30:19.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:30:19.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.04:30:19.72#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.04:30:19.72#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:19.72#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:30:19.84#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:30:19.84#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:30:19.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:30:19.84#ibcon#first serial, iclass 37, count 0 2006.229.04:30:19.84#ibcon#enter sib2, iclass 37, count 0 2006.229.04:30:19.84#ibcon#flushed, iclass 37, count 0 2006.229.04:30:19.84#ibcon#about to write, iclass 37, count 0 2006.229.04:30:19.84#ibcon#wrote, iclass 37, count 0 2006.229.04:30:19.84#ibcon#about to read 3, iclass 37, count 0 2006.229.04:30:19.86#ibcon#read 3, iclass 37, count 0 2006.229.04:30:19.86#ibcon#about to read 4, iclass 37, count 0 2006.229.04:30:19.86#ibcon#read 4, iclass 37, count 0 2006.229.04:30:19.86#ibcon#about to read 5, iclass 37, count 0 2006.229.04:30:19.86#ibcon#read 5, iclass 37, count 0 2006.229.04:30:19.86#ibcon#about to read 6, iclass 37, count 0 2006.229.04:30:19.86#ibcon#read 6, iclass 37, count 0 2006.229.04:30:19.86#ibcon#end of sib2, iclass 37, count 0 2006.229.04:30:19.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:30:19.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:30:19.86#ibcon#[25=USB\r\n] 2006.229.04:30:19.86#ibcon#*before write, iclass 37, count 0 2006.229.04:30:19.86#ibcon#enter sib2, iclass 37, count 0 2006.229.04:30:19.86#ibcon#flushed, iclass 37, count 0 2006.229.04:30:19.86#ibcon#about to write, iclass 37, count 0 2006.229.04:30:19.86#ibcon#wrote, iclass 37, count 0 2006.229.04:30:19.86#ibcon#about to read 3, iclass 37, count 0 2006.229.04:30:19.89#ibcon#read 3, iclass 37, count 0 2006.229.04:30:19.89#ibcon#about to read 4, iclass 37, count 0 2006.229.04:30:19.89#ibcon#read 4, iclass 37, count 0 2006.229.04:30:19.89#ibcon#about to read 5, iclass 37, count 0 2006.229.04:30:19.89#ibcon#read 5, iclass 37, count 0 2006.229.04:30:19.89#ibcon#about to read 6, iclass 37, count 0 2006.229.04:30:19.89#ibcon#read 6, iclass 37, count 0 2006.229.04:30:19.89#ibcon#end of sib2, iclass 37, count 0 2006.229.04:30:19.89#ibcon#*after write, iclass 37, count 0 2006.229.04:30:19.89#ibcon#*before return 0, iclass 37, count 0 2006.229.04:30:19.89#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:30:19.89#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.04:30:19.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:30:19.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:30:19.89$vck44/vblo=1,629.99 2006.229.04:30:19.89#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.04:30:19.89#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.04:30:19.89#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:19.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:19.89#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:19.89#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:19.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:30:19.89#ibcon#first serial, iclass 39, count 0 2006.229.04:30:19.89#ibcon#enter sib2, iclass 39, count 0 2006.229.04:30:19.89#ibcon#flushed, iclass 39, count 0 2006.229.04:30:19.89#ibcon#about to write, iclass 39, count 0 2006.229.04:30:19.89#ibcon#wrote, iclass 39, count 0 2006.229.04:30:19.89#ibcon#about to read 3, iclass 39, count 0 2006.229.04:30:19.91#ibcon#read 3, iclass 39, count 0 2006.229.04:30:19.91#ibcon#about to read 4, iclass 39, count 0 2006.229.04:30:19.91#ibcon#read 4, iclass 39, count 0 2006.229.04:30:19.91#ibcon#about to read 5, iclass 39, count 0 2006.229.04:30:19.91#ibcon#read 5, iclass 39, count 0 2006.229.04:30:19.91#ibcon#about to read 6, iclass 39, count 0 2006.229.04:30:19.91#ibcon#read 6, iclass 39, count 0 2006.229.04:30:19.91#ibcon#end of sib2, iclass 39, count 0 2006.229.04:30:19.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:30:19.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:30:19.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:30:19.91#ibcon#*before write, iclass 39, count 0 2006.229.04:30:19.91#ibcon#enter sib2, iclass 39, count 0 2006.229.04:30:19.91#ibcon#flushed, iclass 39, count 0 2006.229.04:30:19.91#ibcon#about to write, iclass 39, count 0 2006.229.04:30:19.91#ibcon#wrote, iclass 39, count 0 2006.229.04:30:19.91#ibcon#about to read 3, iclass 39, count 0 2006.229.04:30:19.95#ibcon#read 3, iclass 39, count 0 2006.229.04:30:19.95#ibcon#about to read 4, iclass 39, count 0 2006.229.04:30:19.95#ibcon#read 4, iclass 39, count 0 2006.229.04:30:19.95#ibcon#about to read 5, iclass 39, count 0 2006.229.04:30:19.95#ibcon#read 5, iclass 39, count 0 2006.229.04:30:19.95#ibcon#about to read 6, iclass 39, count 0 2006.229.04:30:19.95#ibcon#read 6, iclass 39, count 0 2006.229.04:30:19.95#ibcon#end of sib2, iclass 39, count 0 2006.229.04:30:19.95#ibcon#*after write, iclass 39, count 0 2006.229.04:30:19.95#ibcon#*before return 0, iclass 39, count 0 2006.229.04:30:19.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:19.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.04:30:19.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:30:19.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:30:19.95$vck44/vb=1,4 2006.229.04:30:19.95#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.04:30:19.95#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.04:30:19.95#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:19.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:19.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:19.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:19.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.04:30:19.95#ibcon#first serial, iclass 3, count 2 2006.229.04:30:19.95#ibcon#enter sib2, iclass 3, count 2 2006.229.04:30:19.95#ibcon#flushed, iclass 3, count 2 2006.229.04:30:19.95#ibcon#about to write, iclass 3, count 2 2006.229.04:30:19.95#ibcon#wrote, iclass 3, count 2 2006.229.04:30:19.95#ibcon#about to read 3, iclass 3, count 2 2006.229.04:30:19.97#ibcon#read 3, iclass 3, count 2 2006.229.04:30:19.97#ibcon#about to read 4, iclass 3, count 2 2006.229.04:30:19.97#ibcon#read 4, iclass 3, count 2 2006.229.04:30:19.97#ibcon#about to read 5, iclass 3, count 2 2006.229.04:30:19.97#ibcon#read 5, iclass 3, count 2 2006.229.04:30:19.97#ibcon#about to read 6, iclass 3, count 2 2006.229.04:30:19.97#ibcon#read 6, iclass 3, count 2 2006.229.04:30:19.97#ibcon#end of sib2, iclass 3, count 2 2006.229.04:30:19.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.04:30:19.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.04:30:19.97#ibcon#[27=AT01-04\r\n] 2006.229.04:30:19.97#ibcon#*before write, iclass 3, count 2 2006.229.04:30:19.97#ibcon#enter sib2, iclass 3, count 2 2006.229.04:30:19.97#ibcon#flushed, iclass 3, count 2 2006.229.04:30:19.97#ibcon#about to write, iclass 3, count 2 2006.229.04:30:19.97#ibcon#wrote, iclass 3, count 2 2006.229.04:30:19.97#ibcon#about to read 3, iclass 3, count 2 2006.229.04:30:20.00#ibcon#read 3, iclass 3, count 2 2006.229.04:30:20.00#ibcon#about to read 4, iclass 3, count 2 2006.229.04:30:20.00#ibcon#read 4, iclass 3, count 2 2006.229.04:30:20.00#ibcon#about to read 5, iclass 3, count 2 2006.229.04:30:20.00#ibcon#read 5, iclass 3, count 2 2006.229.04:30:20.00#ibcon#about to read 6, iclass 3, count 2 2006.229.04:30:20.00#ibcon#read 6, iclass 3, count 2 2006.229.04:30:20.00#ibcon#end of sib2, iclass 3, count 2 2006.229.04:30:20.00#ibcon#*after write, iclass 3, count 2 2006.229.04:30:20.00#ibcon#*before return 0, iclass 3, count 2 2006.229.04:30:20.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:20.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.04:30:20.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.04:30:20.00#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:20.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:20.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:20.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:20.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:30:20.12#ibcon#first serial, iclass 3, count 0 2006.229.04:30:20.12#ibcon#enter sib2, iclass 3, count 0 2006.229.04:30:20.12#ibcon#flushed, iclass 3, count 0 2006.229.04:30:20.12#ibcon#about to write, iclass 3, count 0 2006.229.04:30:20.12#ibcon#wrote, iclass 3, count 0 2006.229.04:30:20.12#ibcon#about to read 3, iclass 3, count 0 2006.229.04:30:20.14#ibcon#read 3, iclass 3, count 0 2006.229.04:30:20.14#ibcon#about to read 4, iclass 3, count 0 2006.229.04:30:20.14#ibcon#read 4, iclass 3, count 0 2006.229.04:30:20.14#ibcon#about to read 5, iclass 3, count 0 2006.229.04:30:20.14#ibcon#read 5, iclass 3, count 0 2006.229.04:30:20.14#ibcon#about to read 6, iclass 3, count 0 2006.229.04:30:20.14#ibcon#read 6, iclass 3, count 0 2006.229.04:30:20.14#ibcon#end of sib2, iclass 3, count 0 2006.229.04:30:20.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:30:20.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:30:20.14#ibcon#[27=USB\r\n] 2006.229.04:30:20.14#ibcon#*before write, iclass 3, count 0 2006.229.04:30:20.14#ibcon#enter sib2, iclass 3, count 0 2006.229.04:30:20.14#ibcon#flushed, iclass 3, count 0 2006.229.04:30:20.14#ibcon#about to write, iclass 3, count 0 2006.229.04:30:20.14#ibcon#wrote, iclass 3, count 0 2006.229.04:30:20.14#ibcon#about to read 3, iclass 3, count 0 2006.229.04:30:20.17#ibcon#read 3, iclass 3, count 0 2006.229.04:30:20.17#ibcon#about to read 4, iclass 3, count 0 2006.229.04:30:20.17#ibcon#read 4, iclass 3, count 0 2006.229.04:30:20.17#ibcon#about to read 5, iclass 3, count 0 2006.229.04:30:20.17#ibcon#read 5, iclass 3, count 0 2006.229.04:30:20.17#ibcon#about to read 6, iclass 3, count 0 2006.229.04:30:20.17#ibcon#read 6, iclass 3, count 0 2006.229.04:30:20.17#ibcon#end of sib2, iclass 3, count 0 2006.229.04:30:20.17#ibcon#*after write, iclass 3, count 0 2006.229.04:30:20.17#ibcon#*before return 0, iclass 3, count 0 2006.229.04:30:20.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:20.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.04:30:20.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:30:20.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:30:20.17$vck44/vblo=2,634.99 2006.229.04:30:20.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.04:30:20.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.04:30:20.17#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:20.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:20.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:20.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:20.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:30:20.17#ibcon#first serial, iclass 5, count 0 2006.229.04:30:20.17#ibcon#enter sib2, iclass 5, count 0 2006.229.04:30:20.17#ibcon#flushed, iclass 5, count 0 2006.229.04:30:20.17#ibcon#about to write, iclass 5, count 0 2006.229.04:30:20.17#ibcon#wrote, iclass 5, count 0 2006.229.04:30:20.17#ibcon#about to read 3, iclass 5, count 0 2006.229.04:30:20.19#ibcon#read 3, iclass 5, count 0 2006.229.04:30:20.19#ibcon#about to read 4, iclass 5, count 0 2006.229.04:30:20.19#ibcon#read 4, iclass 5, count 0 2006.229.04:30:20.19#ibcon#about to read 5, iclass 5, count 0 2006.229.04:30:20.19#ibcon#read 5, iclass 5, count 0 2006.229.04:30:20.19#ibcon#about to read 6, iclass 5, count 0 2006.229.04:30:20.19#ibcon#read 6, iclass 5, count 0 2006.229.04:30:20.19#ibcon#end of sib2, iclass 5, count 0 2006.229.04:30:20.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:30:20.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:30:20.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:30:20.19#ibcon#*before write, iclass 5, count 0 2006.229.04:30:20.19#ibcon#enter sib2, iclass 5, count 0 2006.229.04:30:20.19#ibcon#flushed, iclass 5, count 0 2006.229.04:30:20.19#ibcon#about to write, iclass 5, count 0 2006.229.04:30:20.19#ibcon#wrote, iclass 5, count 0 2006.229.04:30:20.19#ibcon#about to read 3, iclass 5, count 0 2006.229.04:30:20.23#ibcon#read 3, iclass 5, count 0 2006.229.04:30:20.23#ibcon#about to read 4, iclass 5, count 0 2006.229.04:30:20.23#ibcon#read 4, iclass 5, count 0 2006.229.04:30:20.23#ibcon#about to read 5, iclass 5, count 0 2006.229.04:30:20.23#ibcon#read 5, iclass 5, count 0 2006.229.04:30:20.23#ibcon#about to read 6, iclass 5, count 0 2006.229.04:30:20.23#ibcon#read 6, iclass 5, count 0 2006.229.04:30:20.23#ibcon#end of sib2, iclass 5, count 0 2006.229.04:30:20.23#ibcon#*after write, iclass 5, count 0 2006.229.04:30:20.23#ibcon#*before return 0, iclass 5, count 0 2006.229.04:30:20.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:20.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.04:30:20.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:30:20.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:30:20.23$vck44/vb=2,4 2006.229.04:30:20.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.04:30:20.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.04:30:20.23#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:20.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:20.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:20.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:20.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.04:30:20.29#ibcon#first serial, iclass 7, count 2 2006.229.04:30:20.29#ibcon#enter sib2, iclass 7, count 2 2006.229.04:30:20.29#ibcon#flushed, iclass 7, count 2 2006.229.04:30:20.29#ibcon#about to write, iclass 7, count 2 2006.229.04:30:20.29#ibcon#wrote, iclass 7, count 2 2006.229.04:30:20.29#ibcon#about to read 3, iclass 7, count 2 2006.229.04:30:20.31#ibcon#read 3, iclass 7, count 2 2006.229.04:30:20.31#ibcon#about to read 4, iclass 7, count 2 2006.229.04:30:20.31#ibcon#read 4, iclass 7, count 2 2006.229.04:30:20.31#ibcon#about to read 5, iclass 7, count 2 2006.229.04:30:20.31#ibcon#read 5, iclass 7, count 2 2006.229.04:30:20.31#ibcon#about to read 6, iclass 7, count 2 2006.229.04:30:20.31#ibcon#read 6, iclass 7, count 2 2006.229.04:30:20.31#ibcon#end of sib2, iclass 7, count 2 2006.229.04:30:20.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.04:30:20.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.04:30:20.31#ibcon#[27=AT02-04\r\n] 2006.229.04:30:20.31#ibcon#*before write, iclass 7, count 2 2006.229.04:30:20.31#ibcon#enter sib2, iclass 7, count 2 2006.229.04:30:20.31#ibcon#flushed, iclass 7, count 2 2006.229.04:30:20.31#ibcon#about to write, iclass 7, count 2 2006.229.04:30:20.31#ibcon#wrote, iclass 7, count 2 2006.229.04:30:20.31#ibcon#about to read 3, iclass 7, count 2 2006.229.04:30:20.34#ibcon#read 3, iclass 7, count 2 2006.229.04:30:20.34#ibcon#about to read 4, iclass 7, count 2 2006.229.04:30:20.34#ibcon#read 4, iclass 7, count 2 2006.229.04:30:20.34#ibcon#about to read 5, iclass 7, count 2 2006.229.04:30:20.34#ibcon#read 5, iclass 7, count 2 2006.229.04:30:20.34#ibcon#about to read 6, iclass 7, count 2 2006.229.04:30:20.34#ibcon#read 6, iclass 7, count 2 2006.229.04:30:20.34#ibcon#end of sib2, iclass 7, count 2 2006.229.04:30:20.34#ibcon#*after write, iclass 7, count 2 2006.229.04:30:20.34#ibcon#*before return 0, iclass 7, count 2 2006.229.04:30:20.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:20.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.04:30:20.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.04:30:20.34#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:20.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:20.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:20.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:20.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:30:20.46#ibcon#first serial, iclass 7, count 0 2006.229.04:30:20.46#ibcon#enter sib2, iclass 7, count 0 2006.229.04:30:20.46#ibcon#flushed, iclass 7, count 0 2006.229.04:30:20.46#ibcon#about to write, iclass 7, count 0 2006.229.04:30:20.46#ibcon#wrote, iclass 7, count 0 2006.229.04:30:20.46#ibcon#about to read 3, iclass 7, count 0 2006.229.04:30:20.48#ibcon#read 3, iclass 7, count 0 2006.229.04:30:20.48#ibcon#about to read 4, iclass 7, count 0 2006.229.04:30:20.48#ibcon#read 4, iclass 7, count 0 2006.229.04:30:20.48#ibcon#about to read 5, iclass 7, count 0 2006.229.04:30:20.48#ibcon#read 5, iclass 7, count 0 2006.229.04:30:20.48#ibcon#about to read 6, iclass 7, count 0 2006.229.04:30:20.48#ibcon#read 6, iclass 7, count 0 2006.229.04:30:20.48#ibcon#end of sib2, iclass 7, count 0 2006.229.04:30:20.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:30:20.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:30:20.48#ibcon#[27=USB\r\n] 2006.229.04:30:20.48#ibcon#*before write, iclass 7, count 0 2006.229.04:30:20.48#ibcon#enter sib2, iclass 7, count 0 2006.229.04:30:20.48#ibcon#flushed, iclass 7, count 0 2006.229.04:30:20.48#ibcon#about to write, iclass 7, count 0 2006.229.04:30:20.48#ibcon#wrote, iclass 7, count 0 2006.229.04:30:20.48#ibcon#about to read 3, iclass 7, count 0 2006.229.04:30:20.51#ibcon#read 3, iclass 7, count 0 2006.229.04:30:20.51#ibcon#about to read 4, iclass 7, count 0 2006.229.04:30:20.51#ibcon#read 4, iclass 7, count 0 2006.229.04:30:20.51#ibcon#about to read 5, iclass 7, count 0 2006.229.04:30:20.51#ibcon#read 5, iclass 7, count 0 2006.229.04:30:20.51#ibcon#about to read 6, iclass 7, count 0 2006.229.04:30:20.51#ibcon#read 6, iclass 7, count 0 2006.229.04:30:20.51#ibcon#end of sib2, iclass 7, count 0 2006.229.04:30:20.51#ibcon#*after write, iclass 7, count 0 2006.229.04:30:20.51#ibcon#*before return 0, iclass 7, count 0 2006.229.04:30:20.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:20.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.04:30:20.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:30:20.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:30:20.51$vck44/vblo=3,649.99 2006.229.04:30:20.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.04:30:20.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.04:30:20.51#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:20.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:20.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:20.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:20.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:30:20.51#ibcon#first serial, iclass 11, count 0 2006.229.04:30:20.51#ibcon#enter sib2, iclass 11, count 0 2006.229.04:30:20.51#ibcon#flushed, iclass 11, count 0 2006.229.04:30:20.51#ibcon#about to write, iclass 11, count 0 2006.229.04:30:20.51#ibcon#wrote, iclass 11, count 0 2006.229.04:30:20.51#ibcon#about to read 3, iclass 11, count 0 2006.229.04:30:20.53#ibcon#read 3, iclass 11, count 0 2006.229.04:30:20.53#ibcon#about to read 4, iclass 11, count 0 2006.229.04:30:20.53#ibcon#read 4, iclass 11, count 0 2006.229.04:30:20.53#ibcon#about to read 5, iclass 11, count 0 2006.229.04:30:20.53#ibcon#read 5, iclass 11, count 0 2006.229.04:30:20.53#ibcon#about to read 6, iclass 11, count 0 2006.229.04:30:20.53#ibcon#read 6, iclass 11, count 0 2006.229.04:30:20.53#ibcon#end of sib2, iclass 11, count 0 2006.229.04:30:20.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:30:20.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:30:20.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:30:20.53#ibcon#*before write, iclass 11, count 0 2006.229.04:30:20.53#ibcon#enter sib2, iclass 11, count 0 2006.229.04:30:20.53#ibcon#flushed, iclass 11, count 0 2006.229.04:30:20.53#ibcon#about to write, iclass 11, count 0 2006.229.04:30:20.53#ibcon#wrote, iclass 11, count 0 2006.229.04:30:20.53#ibcon#about to read 3, iclass 11, count 0 2006.229.04:30:20.57#ibcon#read 3, iclass 11, count 0 2006.229.04:30:20.57#ibcon#about to read 4, iclass 11, count 0 2006.229.04:30:20.57#ibcon#read 4, iclass 11, count 0 2006.229.04:30:20.57#ibcon#about to read 5, iclass 11, count 0 2006.229.04:30:20.57#ibcon#read 5, iclass 11, count 0 2006.229.04:30:20.57#ibcon#about to read 6, iclass 11, count 0 2006.229.04:30:20.57#ibcon#read 6, iclass 11, count 0 2006.229.04:30:20.57#ibcon#end of sib2, iclass 11, count 0 2006.229.04:30:20.57#ibcon#*after write, iclass 11, count 0 2006.229.04:30:20.57#ibcon#*before return 0, iclass 11, count 0 2006.229.04:30:20.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:20.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:30:20.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:30:20.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:30:20.57$vck44/vb=3,4 2006.229.04:30:20.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.04:30:20.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.04:30:20.57#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:20.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:20.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:20.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:20.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.04:30:20.63#ibcon#first serial, iclass 13, count 2 2006.229.04:30:20.63#ibcon#enter sib2, iclass 13, count 2 2006.229.04:30:20.63#ibcon#flushed, iclass 13, count 2 2006.229.04:30:20.63#ibcon#about to write, iclass 13, count 2 2006.229.04:30:20.63#ibcon#wrote, iclass 13, count 2 2006.229.04:30:20.63#ibcon#about to read 3, iclass 13, count 2 2006.229.04:30:20.65#ibcon#read 3, iclass 13, count 2 2006.229.04:30:20.65#ibcon#about to read 4, iclass 13, count 2 2006.229.04:30:20.65#ibcon#read 4, iclass 13, count 2 2006.229.04:30:20.65#ibcon#about to read 5, iclass 13, count 2 2006.229.04:30:20.65#ibcon#read 5, iclass 13, count 2 2006.229.04:30:20.65#ibcon#about to read 6, iclass 13, count 2 2006.229.04:30:20.65#ibcon#read 6, iclass 13, count 2 2006.229.04:30:20.65#ibcon#end of sib2, iclass 13, count 2 2006.229.04:30:20.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.04:30:20.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.04:30:20.65#ibcon#[27=AT03-04\r\n] 2006.229.04:30:20.65#ibcon#*before write, iclass 13, count 2 2006.229.04:30:20.65#ibcon#enter sib2, iclass 13, count 2 2006.229.04:30:20.65#ibcon#flushed, iclass 13, count 2 2006.229.04:30:20.65#ibcon#about to write, iclass 13, count 2 2006.229.04:30:20.65#ibcon#wrote, iclass 13, count 2 2006.229.04:30:20.65#ibcon#about to read 3, iclass 13, count 2 2006.229.04:30:20.68#ibcon#read 3, iclass 13, count 2 2006.229.04:30:20.68#ibcon#about to read 4, iclass 13, count 2 2006.229.04:30:20.68#ibcon#read 4, iclass 13, count 2 2006.229.04:30:20.68#ibcon#about to read 5, iclass 13, count 2 2006.229.04:30:20.68#ibcon#read 5, iclass 13, count 2 2006.229.04:30:20.68#ibcon#about to read 6, iclass 13, count 2 2006.229.04:30:20.68#ibcon#read 6, iclass 13, count 2 2006.229.04:30:20.68#ibcon#end of sib2, iclass 13, count 2 2006.229.04:30:20.68#ibcon#*after write, iclass 13, count 2 2006.229.04:30:20.68#ibcon#*before return 0, iclass 13, count 2 2006.229.04:30:20.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:20.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.04:30:20.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.04:30:20.68#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:20.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:20.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:20.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:20.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:30:20.80#ibcon#first serial, iclass 13, count 0 2006.229.04:30:20.80#ibcon#enter sib2, iclass 13, count 0 2006.229.04:30:20.80#ibcon#flushed, iclass 13, count 0 2006.229.04:30:20.80#ibcon#about to write, iclass 13, count 0 2006.229.04:30:20.80#ibcon#wrote, iclass 13, count 0 2006.229.04:30:20.80#ibcon#about to read 3, iclass 13, count 0 2006.229.04:30:20.82#ibcon#read 3, iclass 13, count 0 2006.229.04:30:20.82#ibcon#about to read 4, iclass 13, count 0 2006.229.04:30:20.82#ibcon#read 4, iclass 13, count 0 2006.229.04:30:20.82#ibcon#about to read 5, iclass 13, count 0 2006.229.04:30:20.82#ibcon#read 5, iclass 13, count 0 2006.229.04:30:20.82#ibcon#about to read 6, iclass 13, count 0 2006.229.04:30:20.82#ibcon#read 6, iclass 13, count 0 2006.229.04:30:20.82#ibcon#end of sib2, iclass 13, count 0 2006.229.04:30:20.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:30:20.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:30:20.82#ibcon#[27=USB\r\n] 2006.229.04:30:20.82#ibcon#*before write, iclass 13, count 0 2006.229.04:30:20.82#ibcon#enter sib2, iclass 13, count 0 2006.229.04:30:20.82#ibcon#flushed, iclass 13, count 0 2006.229.04:30:20.82#ibcon#about to write, iclass 13, count 0 2006.229.04:30:20.82#ibcon#wrote, iclass 13, count 0 2006.229.04:30:20.82#ibcon#about to read 3, iclass 13, count 0 2006.229.04:30:20.85#ibcon#read 3, iclass 13, count 0 2006.229.04:30:20.85#ibcon#about to read 4, iclass 13, count 0 2006.229.04:30:20.85#ibcon#read 4, iclass 13, count 0 2006.229.04:30:20.85#ibcon#about to read 5, iclass 13, count 0 2006.229.04:30:20.85#ibcon#read 5, iclass 13, count 0 2006.229.04:30:20.85#ibcon#about to read 6, iclass 13, count 0 2006.229.04:30:20.85#ibcon#read 6, iclass 13, count 0 2006.229.04:30:20.85#ibcon#end of sib2, iclass 13, count 0 2006.229.04:30:20.85#ibcon#*after write, iclass 13, count 0 2006.229.04:30:20.85#ibcon#*before return 0, iclass 13, count 0 2006.229.04:30:20.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:20.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.04:30:20.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:30:20.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:30:20.85$vck44/vblo=4,679.99 2006.229.04:30:20.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.04:30:20.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.04:30:20.85#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:20.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:20.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:20.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:20.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:30:20.85#ibcon#first serial, iclass 15, count 0 2006.229.04:30:20.85#ibcon#enter sib2, iclass 15, count 0 2006.229.04:30:20.85#ibcon#flushed, iclass 15, count 0 2006.229.04:30:20.85#ibcon#about to write, iclass 15, count 0 2006.229.04:30:20.85#ibcon#wrote, iclass 15, count 0 2006.229.04:30:20.85#ibcon#about to read 3, iclass 15, count 0 2006.229.04:30:20.87#ibcon#read 3, iclass 15, count 0 2006.229.04:30:20.87#ibcon#about to read 4, iclass 15, count 0 2006.229.04:30:20.87#ibcon#read 4, iclass 15, count 0 2006.229.04:30:20.87#ibcon#about to read 5, iclass 15, count 0 2006.229.04:30:20.87#ibcon#read 5, iclass 15, count 0 2006.229.04:30:20.87#ibcon#about to read 6, iclass 15, count 0 2006.229.04:30:20.87#ibcon#read 6, iclass 15, count 0 2006.229.04:30:20.87#ibcon#end of sib2, iclass 15, count 0 2006.229.04:30:20.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:30:20.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:30:20.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:30:20.87#ibcon#*before write, iclass 15, count 0 2006.229.04:30:20.87#ibcon#enter sib2, iclass 15, count 0 2006.229.04:30:20.87#ibcon#flushed, iclass 15, count 0 2006.229.04:30:20.87#ibcon#about to write, iclass 15, count 0 2006.229.04:30:20.87#ibcon#wrote, iclass 15, count 0 2006.229.04:30:20.87#ibcon#about to read 3, iclass 15, count 0 2006.229.04:30:20.91#ibcon#read 3, iclass 15, count 0 2006.229.04:30:20.91#ibcon#about to read 4, iclass 15, count 0 2006.229.04:30:20.91#ibcon#read 4, iclass 15, count 0 2006.229.04:30:20.91#ibcon#about to read 5, iclass 15, count 0 2006.229.04:30:20.91#ibcon#read 5, iclass 15, count 0 2006.229.04:30:20.91#ibcon#about to read 6, iclass 15, count 0 2006.229.04:30:20.91#ibcon#read 6, iclass 15, count 0 2006.229.04:30:20.91#ibcon#end of sib2, iclass 15, count 0 2006.229.04:30:20.91#ibcon#*after write, iclass 15, count 0 2006.229.04:30:20.91#ibcon#*before return 0, iclass 15, count 0 2006.229.04:30:20.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:20.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.04:30:20.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:30:20.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:30:20.91$vck44/vb=4,4 2006.229.04:30:20.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.04:30:20.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.04:30:20.91#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:20.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:20.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:20.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:20.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.04:30:20.97#ibcon#first serial, iclass 17, count 2 2006.229.04:30:20.97#ibcon#enter sib2, iclass 17, count 2 2006.229.04:30:20.97#ibcon#flushed, iclass 17, count 2 2006.229.04:30:20.97#ibcon#about to write, iclass 17, count 2 2006.229.04:30:20.97#ibcon#wrote, iclass 17, count 2 2006.229.04:30:20.97#ibcon#about to read 3, iclass 17, count 2 2006.229.04:30:20.99#ibcon#read 3, iclass 17, count 2 2006.229.04:30:20.99#ibcon#about to read 4, iclass 17, count 2 2006.229.04:30:20.99#ibcon#read 4, iclass 17, count 2 2006.229.04:30:20.99#ibcon#about to read 5, iclass 17, count 2 2006.229.04:30:20.99#ibcon#read 5, iclass 17, count 2 2006.229.04:30:20.99#ibcon#about to read 6, iclass 17, count 2 2006.229.04:30:20.99#ibcon#read 6, iclass 17, count 2 2006.229.04:30:20.99#ibcon#end of sib2, iclass 17, count 2 2006.229.04:30:20.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.04:30:20.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.04:30:20.99#ibcon#[27=AT04-04\r\n] 2006.229.04:30:20.99#ibcon#*before write, iclass 17, count 2 2006.229.04:30:20.99#ibcon#enter sib2, iclass 17, count 2 2006.229.04:30:20.99#ibcon#flushed, iclass 17, count 2 2006.229.04:30:20.99#ibcon#about to write, iclass 17, count 2 2006.229.04:30:20.99#ibcon#wrote, iclass 17, count 2 2006.229.04:30:20.99#ibcon#about to read 3, iclass 17, count 2 2006.229.04:30:21.02#ibcon#read 3, iclass 17, count 2 2006.229.04:30:21.02#ibcon#about to read 4, iclass 17, count 2 2006.229.04:30:21.02#ibcon#read 4, iclass 17, count 2 2006.229.04:30:21.02#ibcon#about to read 5, iclass 17, count 2 2006.229.04:30:21.02#ibcon#read 5, iclass 17, count 2 2006.229.04:30:21.02#ibcon#about to read 6, iclass 17, count 2 2006.229.04:30:21.02#ibcon#read 6, iclass 17, count 2 2006.229.04:30:21.02#ibcon#end of sib2, iclass 17, count 2 2006.229.04:30:21.02#ibcon#*after write, iclass 17, count 2 2006.229.04:30:21.02#ibcon#*before return 0, iclass 17, count 2 2006.229.04:30:21.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:21.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.04:30:21.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.04:30:21.02#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:21.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:21.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:21.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:21.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:30:21.14#ibcon#first serial, iclass 17, count 0 2006.229.04:30:21.14#ibcon#enter sib2, iclass 17, count 0 2006.229.04:30:21.14#ibcon#flushed, iclass 17, count 0 2006.229.04:30:21.14#ibcon#about to write, iclass 17, count 0 2006.229.04:30:21.14#ibcon#wrote, iclass 17, count 0 2006.229.04:30:21.14#ibcon#about to read 3, iclass 17, count 0 2006.229.04:30:21.16#ibcon#read 3, iclass 17, count 0 2006.229.04:30:21.16#ibcon#about to read 4, iclass 17, count 0 2006.229.04:30:21.16#ibcon#read 4, iclass 17, count 0 2006.229.04:30:21.16#ibcon#about to read 5, iclass 17, count 0 2006.229.04:30:21.16#ibcon#read 5, iclass 17, count 0 2006.229.04:30:21.16#ibcon#about to read 6, iclass 17, count 0 2006.229.04:30:21.16#ibcon#read 6, iclass 17, count 0 2006.229.04:30:21.16#ibcon#end of sib2, iclass 17, count 0 2006.229.04:30:21.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:30:21.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:30:21.16#ibcon#[27=USB\r\n] 2006.229.04:30:21.16#ibcon#*before write, iclass 17, count 0 2006.229.04:30:21.16#ibcon#enter sib2, iclass 17, count 0 2006.229.04:30:21.16#ibcon#flushed, iclass 17, count 0 2006.229.04:30:21.16#ibcon#about to write, iclass 17, count 0 2006.229.04:30:21.16#ibcon#wrote, iclass 17, count 0 2006.229.04:30:21.16#ibcon#about to read 3, iclass 17, count 0 2006.229.04:30:21.19#ibcon#read 3, iclass 17, count 0 2006.229.04:30:21.19#ibcon#about to read 4, iclass 17, count 0 2006.229.04:30:21.19#ibcon#read 4, iclass 17, count 0 2006.229.04:30:21.19#ibcon#about to read 5, iclass 17, count 0 2006.229.04:30:21.19#ibcon#read 5, iclass 17, count 0 2006.229.04:30:21.19#ibcon#about to read 6, iclass 17, count 0 2006.229.04:30:21.19#ibcon#read 6, iclass 17, count 0 2006.229.04:30:21.19#ibcon#end of sib2, iclass 17, count 0 2006.229.04:30:21.19#ibcon#*after write, iclass 17, count 0 2006.229.04:30:21.19#ibcon#*before return 0, iclass 17, count 0 2006.229.04:30:21.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:21.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.04:30:21.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:30:21.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:30:21.19$vck44/vblo=5,709.99 2006.229.04:30:21.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.04:30:21.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.04:30:21.19#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:21.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:21.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:21.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:21.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:30:21.19#ibcon#first serial, iclass 19, count 0 2006.229.04:30:21.19#ibcon#enter sib2, iclass 19, count 0 2006.229.04:30:21.19#ibcon#flushed, iclass 19, count 0 2006.229.04:30:21.19#ibcon#about to write, iclass 19, count 0 2006.229.04:30:21.19#ibcon#wrote, iclass 19, count 0 2006.229.04:30:21.19#ibcon#about to read 3, iclass 19, count 0 2006.229.04:30:21.21#ibcon#read 3, iclass 19, count 0 2006.229.04:30:21.21#ibcon#about to read 4, iclass 19, count 0 2006.229.04:30:21.21#ibcon#read 4, iclass 19, count 0 2006.229.04:30:21.21#ibcon#about to read 5, iclass 19, count 0 2006.229.04:30:21.21#ibcon#read 5, iclass 19, count 0 2006.229.04:30:21.21#ibcon#about to read 6, iclass 19, count 0 2006.229.04:30:21.21#ibcon#read 6, iclass 19, count 0 2006.229.04:30:21.21#ibcon#end of sib2, iclass 19, count 0 2006.229.04:30:21.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:30:21.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:30:21.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:30:21.21#ibcon#*before write, iclass 19, count 0 2006.229.04:30:21.21#ibcon#enter sib2, iclass 19, count 0 2006.229.04:30:21.21#ibcon#flushed, iclass 19, count 0 2006.229.04:30:21.21#ibcon#about to write, iclass 19, count 0 2006.229.04:30:21.21#ibcon#wrote, iclass 19, count 0 2006.229.04:30:21.21#ibcon#about to read 3, iclass 19, count 0 2006.229.04:30:21.25#ibcon#read 3, iclass 19, count 0 2006.229.04:30:21.25#ibcon#about to read 4, iclass 19, count 0 2006.229.04:30:21.25#ibcon#read 4, iclass 19, count 0 2006.229.04:30:21.25#ibcon#about to read 5, iclass 19, count 0 2006.229.04:30:21.25#ibcon#read 5, iclass 19, count 0 2006.229.04:30:21.25#ibcon#about to read 6, iclass 19, count 0 2006.229.04:30:21.25#ibcon#read 6, iclass 19, count 0 2006.229.04:30:21.25#ibcon#end of sib2, iclass 19, count 0 2006.229.04:30:21.25#ibcon#*after write, iclass 19, count 0 2006.229.04:30:21.25#ibcon#*before return 0, iclass 19, count 0 2006.229.04:30:21.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:21.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.04:30:21.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:30:21.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:30:21.25$vck44/vb=5,4 2006.229.04:30:21.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.04:30:21.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.04:30:21.25#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:21.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:21.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:21.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:21.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.04:30:21.31#ibcon#first serial, iclass 21, count 2 2006.229.04:30:21.31#ibcon#enter sib2, iclass 21, count 2 2006.229.04:30:21.31#ibcon#flushed, iclass 21, count 2 2006.229.04:30:21.31#ibcon#about to write, iclass 21, count 2 2006.229.04:30:21.31#ibcon#wrote, iclass 21, count 2 2006.229.04:30:21.31#ibcon#about to read 3, iclass 21, count 2 2006.229.04:30:21.33#ibcon#read 3, iclass 21, count 2 2006.229.04:30:21.33#ibcon#about to read 4, iclass 21, count 2 2006.229.04:30:21.33#ibcon#read 4, iclass 21, count 2 2006.229.04:30:21.33#ibcon#about to read 5, iclass 21, count 2 2006.229.04:30:21.33#ibcon#read 5, iclass 21, count 2 2006.229.04:30:21.33#ibcon#about to read 6, iclass 21, count 2 2006.229.04:30:21.33#ibcon#read 6, iclass 21, count 2 2006.229.04:30:21.33#ibcon#end of sib2, iclass 21, count 2 2006.229.04:30:21.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.04:30:21.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.04:30:21.33#ibcon#[27=AT05-04\r\n] 2006.229.04:30:21.33#ibcon#*before write, iclass 21, count 2 2006.229.04:30:21.33#ibcon#enter sib2, iclass 21, count 2 2006.229.04:30:21.33#ibcon#flushed, iclass 21, count 2 2006.229.04:30:21.33#ibcon#about to write, iclass 21, count 2 2006.229.04:30:21.33#ibcon#wrote, iclass 21, count 2 2006.229.04:30:21.33#ibcon#about to read 3, iclass 21, count 2 2006.229.04:30:21.36#ibcon#read 3, iclass 21, count 2 2006.229.04:30:21.36#ibcon#about to read 4, iclass 21, count 2 2006.229.04:30:21.36#ibcon#read 4, iclass 21, count 2 2006.229.04:30:21.36#ibcon#about to read 5, iclass 21, count 2 2006.229.04:30:21.36#ibcon#read 5, iclass 21, count 2 2006.229.04:30:21.36#ibcon#about to read 6, iclass 21, count 2 2006.229.04:30:21.36#ibcon#read 6, iclass 21, count 2 2006.229.04:30:21.36#ibcon#end of sib2, iclass 21, count 2 2006.229.04:30:21.36#ibcon#*after write, iclass 21, count 2 2006.229.04:30:21.36#ibcon#*before return 0, iclass 21, count 2 2006.229.04:30:21.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:21.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.04:30:21.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.04:30:21.36#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:21.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:21.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:21.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:21.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:30:21.48#ibcon#first serial, iclass 21, count 0 2006.229.04:30:21.48#ibcon#enter sib2, iclass 21, count 0 2006.229.04:30:21.48#ibcon#flushed, iclass 21, count 0 2006.229.04:30:21.48#ibcon#about to write, iclass 21, count 0 2006.229.04:30:21.48#ibcon#wrote, iclass 21, count 0 2006.229.04:30:21.48#ibcon#about to read 3, iclass 21, count 0 2006.229.04:30:21.50#ibcon#read 3, iclass 21, count 0 2006.229.04:30:21.50#ibcon#about to read 4, iclass 21, count 0 2006.229.04:30:21.50#ibcon#read 4, iclass 21, count 0 2006.229.04:30:21.50#ibcon#about to read 5, iclass 21, count 0 2006.229.04:30:21.50#ibcon#read 5, iclass 21, count 0 2006.229.04:30:21.50#ibcon#about to read 6, iclass 21, count 0 2006.229.04:30:21.50#ibcon#read 6, iclass 21, count 0 2006.229.04:30:21.50#ibcon#end of sib2, iclass 21, count 0 2006.229.04:30:21.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:30:21.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:30:21.50#ibcon#[27=USB\r\n] 2006.229.04:30:21.50#ibcon#*before write, iclass 21, count 0 2006.229.04:30:21.50#ibcon#enter sib2, iclass 21, count 0 2006.229.04:30:21.50#ibcon#flushed, iclass 21, count 0 2006.229.04:30:21.50#ibcon#about to write, iclass 21, count 0 2006.229.04:30:21.50#ibcon#wrote, iclass 21, count 0 2006.229.04:30:21.50#ibcon#about to read 3, iclass 21, count 0 2006.229.04:30:21.53#ibcon#read 3, iclass 21, count 0 2006.229.04:30:21.53#ibcon#about to read 4, iclass 21, count 0 2006.229.04:30:21.53#ibcon#read 4, iclass 21, count 0 2006.229.04:30:21.53#ibcon#about to read 5, iclass 21, count 0 2006.229.04:30:21.53#ibcon#read 5, iclass 21, count 0 2006.229.04:30:21.53#ibcon#about to read 6, iclass 21, count 0 2006.229.04:30:21.53#ibcon#read 6, iclass 21, count 0 2006.229.04:30:21.53#ibcon#end of sib2, iclass 21, count 0 2006.229.04:30:21.53#ibcon#*after write, iclass 21, count 0 2006.229.04:30:21.53#ibcon#*before return 0, iclass 21, count 0 2006.229.04:30:21.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:21.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.04:30:21.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:30:21.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:30:21.53$vck44/vblo=6,719.99 2006.229.04:30:21.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.04:30:21.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.04:30:21.53#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:21.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:21.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:21.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:21.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:30:21.53#ibcon#first serial, iclass 23, count 0 2006.229.04:30:21.53#ibcon#enter sib2, iclass 23, count 0 2006.229.04:30:21.53#ibcon#flushed, iclass 23, count 0 2006.229.04:30:21.53#ibcon#about to write, iclass 23, count 0 2006.229.04:30:21.53#ibcon#wrote, iclass 23, count 0 2006.229.04:30:21.53#ibcon#about to read 3, iclass 23, count 0 2006.229.04:30:21.55#ibcon#read 3, iclass 23, count 0 2006.229.04:30:21.55#ibcon#about to read 4, iclass 23, count 0 2006.229.04:30:21.55#ibcon#read 4, iclass 23, count 0 2006.229.04:30:21.55#ibcon#about to read 5, iclass 23, count 0 2006.229.04:30:21.55#ibcon#read 5, iclass 23, count 0 2006.229.04:30:21.55#ibcon#about to read 6, iclass 23, count 0 2006.229.04:30:21.55#ibcon#read 6, iclass 23, count 0 2006.229.04:30:21.55#ibcon#end of sib2, iclass 23, count 0 2006.229.04:30:21.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:30:21.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:30:21.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:30:21.55#ibcon#*before write, iclass 23, count 0 2006.229.04:30:21.55#ibcon#enter sib2, iclass 23, count 0 2006.229.04:30:21.55#ibcon#flushed, iclass 23, count 0 2006.229.04:30:21.55#ibcon#about to write, iclass 23, count 0 2006.229.04:30:21.55#ibcon#wrote, iclass 23, count 0 2006.229.04:30:21.55#ibcon#about to read 3, iclass 23, count 0 2006.229.04:30:21.59#ibcon#read 3, iclass 23, count 0 2006.229.04:30:21.59#ibcon#about to read 4, iclass 23, count 0 2006.229.04:30:21.59#ibcon#read 4, iclass 23, count 0 2006.229.04:30:21.59#ibcon#about to read 5, iclass 23, count 0 2006.229.04:30:21.59#ibcon#read 5, iclass 23, count 0 2006.229.04:30:21.59#ibcon#about to read 6, iclass 23, count 0 2006.229.04:30:21.59#ibcon#read 6, iclass 23, count 0 2006.229.04:30:21.59#ibcon#end of sib2, iclass 23, count 0 2006.229.04:30:21.59#ibcon#*after write, iclass 23, count 0 2006.229.04:30:21.59#ibcon#*before return 0, iclass 23, count 0 2006.229.04:30:21.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:21.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.04:30:21.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:30:21.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:30:21.59$vck44/vb=6,4 2006.229.04:30:21.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.04:30:21.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.04:30:21.59#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:21.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:21.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:21.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:21.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.04:30:21.65#ibcon#first serial, iclass 25, count 2 2006.229.04:30:21.65#ibcon#enter sib2, iclass 25, count 2 2006.229.04:30:21.65#ibcon#flushed, iclass 25, count 2 2006.229.04:30:21.65#ibcon#about to write, iclass 25, count 2 2006.229.04:30:21.65#ibcon#wrote, iclass 25, count 2 2006.229.04:30:21.65#ibcon#about to read 3, iclass 25, count 2 2006.229.04:30:21.67#ibcon#read 3, iclass 25, count 2 2006.229.04:30:21.67#ibcon#about to read 4, iclass 25, count 2 2006.229.04:30:21.67#ibcon#read 4, iclass 25, count 2 2006.229.04:30:21.67#ibcon#about to read 5, iclass 25, count 2 2006.229.04:30:21.67#ibcon#read 5, iclass 25, count 2 2006.229.04:30:21.67#ibcon#about to read 6, iclass 25, count 2 2006.229.04:30:21.67#ibcon#read 6, iclass 25, count 2 2006.229.04:30:21.67#ibcon#end of sib2, iclass 25, count 2 2006.229.04:30:21.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.04:30:21.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.04:30:21.67#ibcon#[27=AT06-04\r\n] 2006.229.04:30:21.67#ibcon#*before write, iclass 25, count 2 2006.229.04:30:21.67#ibcon#enter sib2, iclass 25, count 2 2006.229.04:30:21.67#ibcon#flushed, iclass 25, count 2 2006.229.04:30:21.67#ibcon#about to write, iclass 25, count 2 2006.229.04:30:21.67#ibcon#wrote, iclass 25, count 2 2006.229.04:30:21.67#ibcon#about to read 3, iclass 25, count 2 2006.229.04:30:21.70#ibcon#read 3, iclass 25, count 2 2006.229.04:30:21.70#ibcon#about to read 4, iclass 25, count 2 2006.229.04:30:21.70#ibcon#read 4, iclass 25, count 2 2006.229.04:30:21.70#ibcon#about to read 5, iclass 25, count 2 2006.229.04:30:21.70#ibcon#read 5, iclass 25, count 2 2006.229.04:30:21.70#ibcon#about to read 6, iclass 25, count 2 2006.229.04:30:21.70#ibcon#read 6, iclass 25, count 2 2006.229.04:30:21.70#ibcon#end of sib2, iclass 25, count 2 2006.229.04:30:21.70#ibcon#*after write, iclass 25, count 2 2006.229.04:30:21.70#ibcon#*before return 0, iclass 25, count 2 2006.229.04:30:21.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:21.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.04:30:21.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.04:30:21.70#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:21.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:21.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:21.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:21.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:30:21.82#ibcon#first serial, iclass 25, count 0 2006.229.04:30:21.82#ibcon#enter sib2, iclass 25, count 0 2006.229.04:30:21.82#ibcon#flushed, iclass 25, count 0 2006.229.04:30:21.82#ibcon#about to write, iclass 25, count 0 2006.229.04:30:21.82#ibcon#wrote, iclass 25, count 0 2006.229.04:30:21.82#ibcon#about to read 3, iclass 25, count 0 2006.229.04:30:21.84#ibcon#read 3, iclass 25, count 0 2006.229.04:30:21.84#ibcon#about to read 4, iclass 25, count 0 2006.229.04:30:21.84#ibcon#read 4, iclass 25, count 0 2006.229.04:30:21.84#ibcon#about to read 5, iclass 25, count 0 2006.229.04:30:21.84#ibcon#read 5, iclass 25, count 0 2006.229.04:30:21.84#ibcon#about to read 6, iclass 25, count 0 2006.229.04:30:21.84#ibcon#read 6, iclass 25, count 0 2006.229.04:30:21.84#ibcon#end of sib2, iclass 25, count 0 2006.229.04:30:21.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:30:21.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:30:21.84#ibcon#[27=USB\r\n] 2006.229.04:30:21.84#ibcon#*before write, iclass 25, count 0 2006.229.04:30:21.84#ibcon#enter sib2, iclass 25, count 0 2006.229.04:30:21.84#ibcon#flushed, iclass 25, count 0 2006.229.04:30:21.84#ibcon#about to write, iclass 25, count 0 2006.229.04:30:21.84#ibcon#wrote, iclass 25, count 0 2006.229.04:30:21.84#ibcon#about to read 3, iclass 25, count 0 2006.229.04:30:21.87#ibcon#read 3, iclass 25, count 0 2006.229.04:30:21.87#ibcon#about to read 4, iclass 25, count 0 2006.229.04:30:21.87#ibcon#read 4, iclass 25, count 0 2006.229.04:30:21.87#ibcon#about to read 5, iclass 25, count 0 2006.229.04:30:21.87#ibcon#read 5, iclass 25, count 0 2006.229.04:30:21.87#ibcon#about to read 6, iclass 25, count 0 2006.229.04:30:21.87#ibcon#read 6, iclass 25, count 0 2006.229.04:30:21.87#ibcon#end of sib2, iclass 25, count 0 2006.229.04:30:21.87#ibcon#*after write, iclass 25, count 0 2006.229.04:30:21.87#ibcon#*before return 0, iclass 25, count 0 2006.229.04:30:21.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:21.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.04:30:21.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:30:21.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:30:21.87$vck44/vblo=7,734.99 2006.229.04:30:21.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.04:30:21.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.04:30:21.87#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:21.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:30:21.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:30:21.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:30:21.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:30:21.87#ibcon#first serial, iclass 27, count 0 2006.229.04:30:21.87#ibcon#enter sib2, iclass 27, count 0 2006.229.04:30:21.87#ibcon#flushed, iclass 27, count 0 2006.229.04:30:21.87#ibcon#about to write, iclass 27, count 0 2006.229.04:30:21.87#ibcon#wrote, iclass 27, count 0 2006.229.04:30:21.87#ibcon#about to read 3, iclass 27, count 0 2006.229.04:30:21.89#ibcon#read 3, iclass 27, count 0 2006.229.04:30:21.89#ibcon#about to read 4, iclass 27, count 0 2006.229.04:30:21.89#ibcon#read 4, iclass 27, count 0 2006.229.04:30:21.89#ibcon#about to read 5, iclass 27, count 0 2006.229.04:30:21.89#ibcon#read 5, iclass 27, count 0 2006.229.04:30:21.89#ibcon#about to read 6, iclass 27, count 0 2006.229.04:30:21.89#ibcon#read 6, iclass 27, count 0 2006.229.04:30:21.89#ibcon#end of sib2, iclass 27, count 0 2006.229.04:30:21.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:30:21.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:30:21.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:30:21.89#ibcon#*before write, iclass 27, count 0 2006.229.04:30:21.89#ibcon#enter sib2, iclass 27, count 0 2006.229.04:30:21.89#ibcon#flushed, iclass 27, count 0 2006.229.04:30:21.89#ibcon#about to write, iclass 27, count 0 2006.229.04:30:21.89#ibcon#wrote, iclass 27, count 0 2006.229.04:30:21.89#ibcon#about to read 3, iclass 27, count 0 2006.229.04:30:21.93#ibcon#read 3, iclass 27, count 0 2006.229.04:30:21.93#ibcon#about to read 4, iclass 27, count 0 2006.229.04:30:21.93#ibcon#read 4, iclass 27, count 0 2006.229.04:30:21.93#ibcon#about to read 5, iclass 27, count 0 2006.229.04:30:21.93#ibcon#read 5, iclass 27, count 0 2006.229.04:30:21.93#ibcon#about to read 6, iclass 27, count 0 2006.229.04:30:21.93#ibcon#read 6, iclass 27, count 0 2006.229.04:30:21.93#ibcon#end of sib2, iclass 27, count 0 2006.229.04:30:21.93#ibcon#*after write, iclass 27, count 0 2006.229.04:30:21.93#ibcon#*before return 0, iclass 27, count 0 2006.229.04:30:21.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:30:21.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.04:30:21.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:30:21.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:30:21.93$vck44/vb=7,4 2006.229.04:30:21.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.04:30:21.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.04:30:21.93#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:21.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:30:21.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:30:21.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:30:21.99#ibcon#enter wrdev, iclass 29, count 2 2006.229.04:30:21.99#ibcon#first serial, iclass 29, count 2 2006.229.04:30:21.99#ibcon#enter sib2, iclass 29, count 2 2006.229.04:30:21.99#ibcon#flushed, iclass 29, count 2 2006.229.04:30:21.99#ibcon#about to write, iclass 29, count 2 2006.229.04:30:21.99#ibcon#wrote, iclass 29, count 2 2006.229.04:30:21.99#ibcon#about to read 3, iclass 29, count 2 2006.229.04:30:22.01#ibcon#read 3, iclass 29, count 2 2006.229.04:30:22.01#ibcon#about to read 4, iclass 29, count 2 2006.229.04:30:22.01#ibcon#read 4, iclass 29, count 2 2006.229.04:30:22.01#ibcon#about to read 5, iclass 29, count 2 2006.229.04:30:22.01#ibcon#read 5, iclass 29, count 2 2006.229.04:30:22.01#ibcon#about to read 6, iclass 29, count 2 2006.229.04:30:22.01#ibcon#read 6, iclass 29, count 2 2006.229.04:30:22.01#ibcon#end of sib2, iclass 29, count 2 2006.229.04:30:22.01#ibcon#*mode == 0, iclass 29, count 2 2006.229.04:30:22.01#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.04:30:22.01#ibcon#[27=AT07-04\r\n] 2006.229.04:30:22.01#ibcon#*before write, iclass 29, count 2 2006.229.04:30:22.01#ibcon#enter sib2, iclass 29, count 2 2006.229.04:30:22.01#ibcon#flushed, iclass 29, count 2 2006.229.04:30:22.01#ibcon#about to write, iclass 29, count 2 2006.229.04:30:22.01#ibcon#wrote, iclass 29, count 2 2006.229.04:30:22.01#ibcon#about to read 3, iclass 29, count 2 2006.229.04:30:22.04#ibcon#read 3, iclass 29, count 2 2006.229.04:30:22.04#ibcon#about to read 4, iclass 29, count 2 2006.229.04:30:22.04#ibcon#read 4, iclass 29, count 2 2006.229.04:30:22.04#ibcon#about to read 5, iclass 29, count 2 2006.229.04:30:22.04#ibcon#read 5, iclass 29, count 2 2006.229.04:30:22.04#ibcon#about to read 6, iclass 29, count 2 2006.229.04:30:22.04#ibcon#read 6, iclass 29, count 2 2006.229.04:30:22.04#ibcon#end of sib2, iclass 29, count 2 2006.229.04:30:22.04#ibcon#*after write, iclass 29, count 2 2006.229.04:30:22.04#ibcon#*before return 0, iclass 29, count 2 2006.229.04:30:22.04#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:30:22.04#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.04:30:22.04#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.04:30:22.04#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:22.04#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:30:22.16#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:30:22.16#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:30:22.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:30:22.16#ibcon#first serial, iclass 29, count 0 2006.229.04:30:22.16#ibcon#enter sib2, iclass 29, count 0 2006.229.04:30:22.16#ibcon#flushed, iclass 29, count 0 2006.229.04:30:22.16#ibcon#about to write, iclass 29, count 0 2006.229.04:30:22.16#ibcon#wrote, iclass 29, count 0 2006.229.04:30:22.16#ibcon#about to read 3, iclass 29, count 0 2006.229.04:30:22.18#ibcon#read 3, iclass 29, count 0 2006.229.04:30:22.18#ibcon#about to read 4, iclass 29, count 0 2006.229.04:30:22.18#ibcon#read 4, iclass 29, count 0 2006.229.04:30:22.18#ibcon#about to read 5, iclass 29, count 0 2006.229.04:30:22.18#ibcon#read 5, iclass 29, count 0 2006.229.04:30:22.18#ibcon#about to read 6, iclass 29, count 0 2006.229.04:30:22.18#ibcon#read 6, iclass 29, count 0 2006.229.04:30:22.18#ibcon#end of sib2, iclass 29, count 0 2006.229.04:30:22.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:30:22.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:30:22.18#ibcon#[27=USB\r\n] 2006.229.04:30:22.18#ibcon#*before write, iclass 29, count 0 2006.229.04:30:22.18#ibcon#enter sib2, iclass 29, count 0 2006.229.04:30:22.18#ibcon#flushed, iclass 29, count 0 2006.229.04:30:22.18#ibcon#about to write, iclass 29, count 0 2006.229.04:30:22.18#ibcon#wrote, iclass 29, count 0 2006.229.04:30:22.18#ibcon#about to read 3, iclass 29, count 0 2006.229.04:30:22.21#ibcon#read 3, iclass 29, count 0 2006.229.04:30:22.21#ibcon#about to read 4, iclass 29, count 0 2006.229.04:30:22.21#ibcon#read 4, iclass 29, count 0 2006.229.04:30:22.21#ibcon#about to read 5, iclass 29, count 0 2006.229.04:30:22.21#ibcon#read 5, iclass 29, count 0 2006.229.04:30:22.21#ibcon#about to read 6, iclass 29, count 0 2006.229.04:30:22.21#ibcon#read 6, iclass 29, count 0 2006.229.04:30:22.21#ibcon#end of sib2, iclass 29, count 0 2006.229.04:30:22.21#ibcon#*after write, iclass 29, count 0 2006.229.04:30:22.21#ibcon#*before return 0, iclass 29, count 0 2006.229.04:30:22.21#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:30:22.21#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.04:30:22.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:30:22.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:30:22.21$vck44/vblo=8,744.99 2006.229.04:30:22.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.04:30:22.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.04:30:22.21#ibcon#ireg 17 cls_cnt 0 2006.229.04:30:22.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:30:22.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:30:22.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:30:22.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:30:22.21#ibcon#first serial, iclass 31, count 0 2006.229.04:30:22.21#ibcon#enter sib2, iclass 31, count 0 2006.229.04:30:22.21#ibcon#flushed, iclass 31, count 0 2006.229.04:30:22.21#ibcon#about to write, iclass 31, count 0 2006.229.04:30:22.21#ibcon#wrote, iclass 31, count 0 2006.229.04:30:22.21#ibcon#about to read 3, iclass 31, count 0 2006.229.04:30:22.23#ibcon#read 3, iclass 31, count 0 2006.229.04:30:22.23#ibcon#about to read 4, iclass 31, count 0 2006.229.04:30:22.23#ibcon#read 4, iclass 31, count 0 2006.229.04:30:22.23#ibcon#about to read 5, iclass 31, count 0 2006.229.04:30:22.23#ibcon#read 5, iclass 31, count 0 2006.229.04:30:22.23#ibcon#about to read 6, iclass 31, count 0 2006.229.04:30:22.23#ibcon#read 6, iclass 31, count 0 2006.229.04:30:22.23#ibcon#end of sib2, iclass 31, count 0 2006.229.04:30:22.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:30:22.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:30:22.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:30:22.23#ibcon#*before write, iclass 31, count 0 2006.229.04:30:22.23#ibcon#enter sib2, iclass 31, count 0 2006.229.04:30:22.23#ibcon#flushed, iclass 31, count 0 2006.229.04:30:22.23#ibcon#about to write, iclass 31, count 0 2006.229.04:30:22.23#ibcon#wrote, iclass 31, count 0 2006.229.04:30:22.23#ibcon#about to read 3, iclass 31, count 0 2006.229.04:30:22.27#ibcon#read 3, iclass 31, count 0 2006.229.04:30:22.27#ibcon#about to read 4, iclass 31, count 0 2006.229.04:30:22.27#ibcon#read 4, iclass 31, count 0 2006.229.04:30:22.27#ibcon#about to read 5, iclass 31, count 0 2006.229.04:30:22.27#ibcon#read 5, iclass 31, count 0 2006.229.04:30:22.27#ibcon#about to read 6, iclass 31, count 0 2006.229.04:30:22.27#ibcon#read 6, iclass 31, count 0 2006.229.04:30:22.27#ibcon#end of sib2, iclass 31, count 0 2006.229.04:30:22.27#ibcon#*after write, iclass 31, count 0 2006.229.04:30:22.27#ibcon#*before return 0, iclass 31, count 0 2006.229.04:30:22.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:30:22.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.04:30:22.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:30:22.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:30:22.27$vck44/vb=8,4 2006.229.04:30:22.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.04:30:22.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.04:30:22.27#ibcon#ireg 11 cls_cnt 2 2006.229.04:30:22.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:30:22.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:30:22.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:30:22.33#ibcon#enter wrdev, iclass 33, count 2 2006.229.04:30:22.33#ibcon#first serial, iclass 33, count 2 2006.229.04:30:22.33#ibcon#enter sib2, iclass 33, count 2 2006.229.04:30:22.33#ibcon#flushed, iclass 33, count 2 2006.229.04:30:22.33#ibcon#about to write, iclass 33, count 2 2006.229.04:30:22.33#ibcon#wrote, iclass 33, count 2 2006.229.04:30:22.33#ibcon#about to read 3, iclass 33, count 2 2006.229.04:30:22.35#ibcon#read 3, iclass 33, count 2 2006.229.04:30:22.35#ibcon#about to read 4, iclass 33, count 2 2006.229.04:30:22.35#ibcon#read 4, iclass 33, count 2 2006.229.04:30:22.35#ibcon#about to read 5, iclass 33, count 2 2006.229.04:30:22.35#ibcon#read 5, iclass 33, count 2 2006.229.04:30:22.35#ibcon#about to read 6, iclass 33, count 2 2006.229.04:30:22.35#ibcon#read 6, iclass 33, count 2 2006.229.04:30:22.35#ibcon#end of sib2, iclass 33, count 2 2006.229.04:30:22.35#ibcon#*mode == 0, iclass 33, count 2 2006.229.04:30:22.35#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.04:30:22.35#ibcon#[27=AT08-04\r\n] 2006.229.04:30:22.35#ibcon#*before write, iclass 33, count 2 2006.229.04:30:22.35#ibcon#enter sib2, iclass 33, count 2 2006.229.04:30:22.35#ibcon#flushed, iclass 33, count 2 2006.229.04:30:22.35#ibcon#about to write, iclass 33, count 2 2006.229.04:30:22.35#ibcon#wrote, iclass 33, count 2 2006.229.04:30:22.35#ibcon#about to read 3, iclass 33, count 2 2006.229.04:30:22.38#ibcon#read 3, iclass 33, count 2 2006.229.04:30:22.38#ibcon#about to read 4, iclass 33, count 2 2006.229.04:30:22.38#ibcon#read 4, iclass 33, count 2 2006.229.04:30:22.38#ibcon#about to read 5, iclass 33, count 2 2006.229.04:30:22.38#ibcon#read 5, iclass 33, count 2 2006.229.04:30:22.38#ibcon#about to read 6, iclass 33, count 2 2006.229.04:30:22.38#ibcon#read 6, iclass 33, count 2 2006.229.04:30:22.38#ibcon#end of sib2, iclass 33, count 2 2006.229.04:30:22.38#ibcon#*after write, iclass 33, count 2 2006.229.04:30:22.38#ibcon#*before return 0, iclass 33, count 2 2006.229.04:30:22.38#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:30:22.38#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.04:30:22.38#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.04:30:22.38#ibcon#ireg 7 cls_cnt 0 2006.229.04:30:22.38#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:30:22.50#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:30:22.50#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:30:22.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:30:22.50#ibcon#first serial, iclass 33, count 0 2006.229.04:30:22.50#ibcon#enter sib2, iclass 33, count 0 2006.229.04:30:22.50#ibcon#flushed, iclass 33, count 0 2006.229.04:30:22.50#ibcon#about to write, iclass 33, count 0 2006.229.04:30:22.50#ibcon#wrote, iclass 33, count 0 2006.229.04:30:22.50#ibcon#about to read 3, iclass 33, count 0 2006.229.04:30:22.52#ibcon#read 3, iclass 33, count 0 2006.229.04:30:22.52#ibcon#about to read 4, iclass 33, count 0 2006.229.04:30:22.52#ibcon#read 4, iclass 33, count 0 2006.229.04:30:22.52#ibcon#about to read 5, iclass 33, count 0 2006.229.04:30:22.52#ibcon#read 5, iclass 33, count 0 2006.229.04:30:22.52#ibcon#about to read 6, iclass 33, count 0 2006.229.04:30:22.52#ibcon#read 6, iclass 33, count 0 2006.229.04:30:22.52#ibcon#end of sib2, iclass 33, count 0 2006.229.04:30:22.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:30:22.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:30:22.52#ibcon#[27=USB\r\n] 2006.229.04:30:22.52#ibcon#*before write, iclass 33, count 0 2006.229.04:30:22.52#ibcon#enter sib2, iclass 33, count 0 2006.229.04:30:22.52#ibcon#flushed, iclass 33, count 0 2006.229.04:30:22.52#ibcon#about to write, iclass 33, count 0 2006.229.04:30:22.52#ibcon#wrote, iclass 33, count 0 2006.229.04:30:22.52#ibcon#about to read 3, iclass 33, count 0 2006.229.04:30:22.55#ibcon#read 3, iclass 33, count 0 2006.229.04:30:22.55#ibcon#about to read 4, iclass 33, count 0 2006.229.04:30:22.55#ibcon#read 4, iclass 33, count 0 2006.229.04:30:22.55#ibcon#about to read 5, iclass 33, count 0 2006.229.04:30:22.55#ibcon#read 5, iclass 33, count 0 2006.229.04:30:22.55#ibcon#about to read 6, iclass 33, count 0 2006.229.04:30:22.55#ibcon#read 6, iclass 33, count 0 2006.229.04:30:22.55#ibcon#end of sib2, iclass 33, count 0 2006.229.04:30:22.55#ibcon#*after write, iclass 33, count 0 2006.229.04:30:22.55#ibcon#*before return 0, iclass 33, count 0 2006.229.04:30:22.55#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:30:22.55#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.04:30:22.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:30:22.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:30:22.55$vck44/vabw=wide 2006.229.04:30:22.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.04:30:22.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.04:30:22.55#ibcon#ireg 8 cls_cnt 0 2006.229.04:30:22.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:22.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:22.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:22.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:30:22.55#ibcon#first serial, iclass 35, count 0 2006.229.04:30:22.55#ibcon#enter sib2, iclass 35, count 0 2006.229.04:30:22.55#ibcon#flushed, iclass 35, count 0 2006.229.04:30:22.55#ibcon#about to write, iclass 35, count 0 2006.229.04:30:22.55#ibcon#wrote, iclass 35, count 0 2006.229.04:30:22.55#ibcon#about to read 3, iclass 35, count 0 2006.229.04:30:22.57#ibcon#read 3, iclass 35, count 0 2006.229.04:30:22.57#ibcon#about to read 4, iclass 35, count 0 2006.229.04:30:22.57#ibcon#read 4, iclass 35, count 0 2006.229.04:30:22.57#ibcon#about to read 5, iclass 35, count 0 2006.229.04:30:22.57#ibcon#read 5, iclass 35, count 0 2006.229.04:30:22.57#ibcon#about to read 6, iclass 35, count 0 2006.229.04:30:22.57#ibcon#read 6, iclass 35, count 0 2006.229.04:30:22.57#ibcon#end of sib2, iclass 35, count 0 2006.229.04:30:22.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:30:22.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:30:22.57#ibcon#[25=BW32\r\n] 2006.229.04:30:22.57#ibcon#*before write, iclass 35, count 0 2006.229.04:30:22.57#ibcon#enter sib2, iclass 35, count 0 2006.229.04:30:22.57#ibcon#flushed, iclass 35, count 0 2006.229.04:30:22.57#ibcon#about to write, iclass 35, count 0 2006.229.04:30:22.57#ibcon#wrote, iclass 35, count 0 2006.229.04:30:22.57#ibcon#about to read 3, iclass 35, count 0 2006.229.04:30:22.60#ibcon#read 3, iclass 35, count 0 2006.229.04:30:22.60#ibcon#about to read 4, iclass 35, count 0 2006.229.04:30:22.60#ibcon#read 4, iclass 35, count 0 2006.229.04:30:22.60#ibcon#about to read 5, iclass 35, count 0 2006.229.04:30:22.60#ibcon#read 5, iclass 35, count 0 2006.229.04:30:22.60#ibcon#about to read 6, iclass 35, count 0 2006.229.04:30:22.60#ibcon#read 6, iclass 35, count 0 2006.229.04:30:22.60#ibcon#end of sib2, iclass 35, count 0 2006.229.04:30:22.60#ibcon#*after write, iclass 35, count 0 2006.229.04:30:22.60#ibcon#*before return 0, iclass 35, count 0 2006.229.04:30:22.60#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:22.60#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.04:30:22.60#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:30:22.60#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:30:22.60$vck44/vbbw=wide 2006.229.04:30:22.60#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.04:30:22.60#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.04:30:22.60#ibcon#ireg 8 cls_cnt 0 2006.229.04:30:22.60#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:30:22.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:30:22.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:30:22.67#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:30:22.67#ibcon#first serial, iclass 37, count 0 2006.229.04:30:22.67#ibcon#enter sib2, iclass 37, count 0 2006.229.04:30:22.67#ibcon#flushed, iclass 37, count 0 2006.229.04:30:22.67#ibcon#about to write, iclass 37, count 0 2006.229.04:30:22.67#ibcon#wrote, iclass 37, count 0 2006.229.04:30:22.67#ibcon#about to read 3, iclass 37, count 0 2006.229.04:30:22.69#ibcon#read 3, iclass 37, count 0 2006.229.04:30:22.69#ibcon#about to read 4, iclass 37, count 0 2006.229.04:30:22.69#ibcon#read 4, iclass 37, count 0 2006.229.04:30:22.69#ibcon#about to read 5, iclass 37, count 0 2006.229.04:30:22.69#ibcon#read 5, iclass 37, count 0 2006.229.04:30:22.69#ibcon#about to read 6, iclass 37, count 0 2006.229.04:30:22.69#ibcon#read 6, iclass 37, count 0 2006.229.04:30:22.69#ibcon#end of sib2, iclass 37, count 0 2006.229.04:30:22.69#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:30:22.69#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:30:22.69#ibcon#[27=BW32\r\n] 2006.229.04:30:22.69#ibcon#*before write, iclass 37, count 0 2006.229.04:30:22.69#ibcon#enter sib2, iclass 37, count 0 2006.229.04:30:22.69#ibcon#flushed, iclass 37, count 0 2006.229.04:30:22.69#ibcon#about to write, iclass 37, count 0 2006.229.04:30:22.69#ibcon#wrote, iclass 37, count 0 2006.229.04:30:22.69#ibcon#about to read 3, iclass 37, count 0 2006.229.04:30:22.72#ibcon#read 3, iclass 37, count 0 2006.229.04:30:22.72#ibcon#about to read 4, iclass 37, count 0 2006.229.04:30:22.72#ibcon#read 4, iclass 37, count 0 2006.229.04:30:22.72#ibcon#about to read 5, iclass 37, count 0 2006.229.04:30:22.72#ibcon#read 5, iclass 37, count 0 2006.229.04:30:22.72#ibcon#about to read 6, iclass 37, count 0 2006.229.04:30:22.72#ibcon#read 6, iclass 37, count 0 2006.229.04:30:22.72#ibcon#end of sib2, iclass 37, count 0 2006.229.04:30:22.72#ibcon#*after write, iclass 37, count 0 2006.229.04:30:22.72#ibcon#*before return 0, iclass 37, count 0 2006.229.04:30:22.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:30:22.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:30:22.72#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:30:22.72#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:30:22.72$setupk4/ifdk4 2006.229.04:30:22.72$ifdk4/lo= 2006.229.04:30:22.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:30:22.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:30:22.72$ifdk4/patch= 2006.229.04:30:22.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:30:22.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:30:22.73$setupk4/!*+20s 2006.229.04:30:29.42#abcon#<5=/04 2.2 4.1 30.52 93 999.9\r\n> 2006.229.04:30:29.44#abcon#{5=INTERFACE CLEAR} 2006.229.04:30:29.50#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:30:37.25$setupk4/"tpicd 2006.229.04:30:37.25$setupk4/echo=off 2006.229.04:30:37.25$setupk4/xlog=off 2006.229.04:30:37.25:!2006.229.04:35:57 2006.229.04:30:44.14#trakl#Source acquired 2006.229.04:30:45.14#flagr#flagr/antenna,acquired 2006.229.04:35:57.00:preob 2006.229.04:35:58.14/onsource/TRACKING 2006.229.04:35:58.14:!2006.229.04:36:07 2006.229.04:36:07.00:"tape 2006.229.04:36:07.00:"st=record 2006.229.04:36:07.00:data_valid=on 2006.229.04:36:07.00:midob 2006.229.04:36:07.14/onsource/TRACKING 2006.229.04:36:07.14/wx/30.78,999.9,92 2006.229.04:36:07.34/cable/+6.4048E-03 2006.229.04:36:08.43/va/01,08,usb,yes,29,31 2006.229.04:36:08.43/va/02,07,usb,yes,31,32 2006.229.04:36:08.43/va/03,06,usb,yes,39,41 2006.229.04:36:08.43/va/04,07,usb,yes,32,34 2006.229.04:36:08.43/va/05,04,usb,yes,29,29 2006.229.04:36:08.43/va/06,04,usb,yes,32,32 2006.229.04:36:08.43/va/07,05,usb,yes,29,29 2006.229.04:36:08.43/va/08,06,usb,yes,21,26 2006.229.04:36:08.66/valo/01,524.99,yes,locked 2006.229.04:36:08.66/valo/02,534.99,yes,locked 2006.229.04:36:08.66/valo/03,564.99,yes,locked 2006.229.04:36:08.66/valo/04,624.99,yes,locked 2006.229.04:36:08.66/valo/05,734.99,yes,locked 2006.229.04:36:08.66/valo/06,814.99,yes,locked 2006.229.04:36:08.66/valo/07,864.99,yes,locked 2006.229.04:36:08.66/valo/08,884.99,yes,locked 2006.229.04:36:09.75/vb/01,04,usb,yes,30,28 2006.229.04:36:09.75/vb/02,04,usb,yes,33,33 2006.229.04:36:09.75/vb/03,04,usb,yes,30,33 2006.229.04:36:09.75/vb/04,04,usb,yes,34,33 2006.229.04:36:09.75/vb/05,04,usb,yes,27,29 2006.229.04:36:09.75/vb/06,04,usb,yes,31,27 2006.229.04:36:09.75/vb/07,04,usb,yes,31,31 2006.229.04:36:09.75/vb/08,04,usb,yes,28,32 2006.229.04:36:09.99/vblo/01,629.99,yes,locked 2006.229.04:36:09.99/vblo/02,634.99,yes,locked 2006.229.04:36:09.99/vblo/03,649.99,yes,locked 2006.229.04:36:09.99/vblo/04,679.99,yes,locked 2006.229.04:36:09.99/vblo/05,709.99,yes,locked 2006.229.04:36:09.99/vblo/06,719.99,yes,locked 2006.229.04:36:09.99/vblo/07,734.99,yes,locked 2006.229.04:36:09.99/vblo/08,744.99,yes,locked 2006.229.04:36:10.14/vabw/8 2006.229.04:36:10.29/vbbw/8 2006.229.04:36:10.38/xfe/off,on,12.0 2006.229.04:36:10.75/ifatt/23,28,28,28 2006.229.04:36:11.07/fmout-gps/S +4.52E-07 2006.229.04:36:11.12:!2006.229.04:39:47 2006.229.04:39:47.01:data_valid=off 2006.229.04:39:47.02:"et 2006.229.04:39:47.02:!+3s 2006.229.04:39:50.03:"tape 2006.229.04:39:50.03:postob 2006.229.04:39:50.10/cable/+6.4035E-03 2006.229.04:39:50.11/wx/30.85,999.8,92 2006.229.04:39:50.16/fmout-gps/S +4.56E-07 2006.229.04:39:50.16:scan_name=229-0443,jd0608,430 2006.229.04:39:50.16:source=0804+499,080839.67,495036.5,2000.0,ccw 2006.229.04:39:52.14#flagr#flagr/antenna,new-source 2006.229.04:39:52.14:checkk5 2006.229.04:39:52.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:39:52.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:39:53.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:39:53.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:39:54.15/chk_obsdata//k5ts1/T2290436??a.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.04:39:54.55/chk_obsdata//k5ts2/T2290436??b.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.04:39:54.97/chk_obsdata//k5ts3/T2290436??c.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.04:39:55.36/chk_obsdata//k5ts4/T2290436??d.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.04:39:56.10/k5log//k5ts1_log_newline 2006.229.04:39:56.81/k5log//k5ts2_log_newline 2006.229.04:39:57.52/k5log//k5ts3_log_newline 2006.229.04:39:58.23/k5log//k5ts4_log_newline 2006.229.04:39:58.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:39:58.25:setupk4=1 2006.229.04:39:58.25$setupk4/echo=on 2006.229.04:39:58.25$setupk4/pcalon 2006.229.04:39:58.25$pcalon/"no phase cal control is implemented here 2006.229.04:39:58.26$setupk4/"tpicd=stop 2006.229.04:39:58.26$setupk4/"rec=synch_on 2006.229.04:39:58.26$setupk4/"rec_mode=128 2006.229.04:39:58.26$setupk4/!* 2006.229.04:39:58.26$setupk4/recpk4 2006.229.04:39:58.26$recpk4/recpatch= 2006.229.04:39:58.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:39:58.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:39:58.26$setupk4/vck44 2006.229.04:39:58.26$vck44/valo=1,524.99 2006.229.04:39:58.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:39:58.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:39:58.26#ibcon#ireg 17 cls_cnt 0 2006.229.04:39:58.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:39:58.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:39:58.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:39:58.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:39:58.26#ibcon#first serial, iclass 14, count 0 2006.229.04:39:58.26#ibcon#enter sib2, iclass 14, count 0 2006.229.04:39:58.26#ibcon#flushed, iclass 14, count 0 2006.229.04:39:58.26#ibcon#about to write, iclass 14, count 0 2006.229.04:39:58.26#ibcon#wrote, iclass 14, count 0 2006.229.04:39:58.26#ibcon#about to read 3, iclass 14, count 0 2006.229.04:39:58.27#ibcon#read 3, iclass 14, count 0 2006.229.04:39:58.27#ibcon#about to read 4, iclass 14, count 0 2006.229.04:39:58.27#ibcon#read 4, iclass 14, count 0 2006.229.04:39:58.27#ibcon#about to read 5, iclass 14, count 0 2006.229.04:39:58.27#ibcon#read 5, iclass 14, count 0 2006.229.04:39:58.27#ibcon#about to read 6, iclass 14, count 0 2006.229.04:39:58.27#ibcon#read 6, iclass 14, count 0 2006.229.04:39:58.27#ibcon#end of sib2, iclass 14, count 0 2006.229.04:39:58.27#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:39:58.27#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:39:58.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:39:58.27#ibcon#*before write, iclass 14, count 0 2006.229.04:39:58.27#ibcon#enter sib2, iclass 14, count 0 2006.229.04:39:58.27#ibcon#flushed, iclass 14, count 0 2006.229.04:39:58.27#ibcon#about to write, iclass 14, count 0 2006.229.04:39:58.27#ibcon#wrote, iclass 14, count 0 2006.229.04:39:58.27#ibcon#about to read 3, iclass 14, count 0 2006.229.04:39:58.32#ibcon#read 3, iclass 14, count 0 2006.229.04:39:58.32#ibcon#about to read 4, iclass 14, count 0 2006.229.04:39:58.32#ibcon#read 4, iclass 14, count 0 2006.229.04:39:58.32#ibcon#about to read 5, iclass 14, count 0 2006.229.04:39:58.32#ibcon#read 5, iclass 14, count 0 2006.229.04:39:58.32#ibcon#about to read 6, iclass 14, count 0 2006.229.04:39:58.32#ibcon#read 6, iclass 14, count 0 2006.229.04:39:58.32#ibcon#end of sib2, iclass 14, count 0 2006.229.04:39:58.32#ibcon#*after write, iclass 14, count 0 2006.229.04:39:58.32#ibcon#*before return 0, iclass 14, count 0 2006.229.04:39:58.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:39:58.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:39:58.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:39:58.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:39:58.32$vck44/va=1,8 2006.229.04:39:58.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.04:39:58.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.04:39:58.32#ibcon#ireg 11 cls_cnt 2 2006.229.04:39:58.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:39:58.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:39:58.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:39:58.32#ibcon#enter wrdev, iclass 16, count 2 2006.229.04:39:58.32#ibcon#first serial, iclass 16, count 2 2006.229.04:39:58.32#ibcon#enter sib2, iclass 16, count 2 2006.229.04:39:58.32#ibcon#flushed, iclass 16, count 2 2006.229.04:39:58.32#ibcon#about to write, iclass 16, count 2 2006.229.04:39:58.32#ibcon#wrote, iclass 16, count 2 2006.229.04:39:58.32#ibcon#about to read 3, iclass 16, count 2 2006.229.04:39:58.34#ibcon#read 3, iclass 16, count 2 2006.229.04:39:58.34#ibcon#about to read 4, iclass 16, count 2 2006.229.04:39:58.34#ibcon#read 4, iclass 16, count 2 2006.229.04:39:58.34#ibcon#about to read 5, iclass 16, count 2 2006.229.04:39:58.34#ibcon#read 5, iclass 16, count 2 2006.229.04:39:58.34#ibcon#about to read 6, iclass 16, count 2 2006.229.04:39:58.34#ibcon#read 6, iclass 16, count 2 2006.229.04:39:58.34#ibcon#end of sib2, iclass 16, count 2 2006.229.04:39:58.34#ibcon#*mode == 0, iclass 16, count 2 2006.229.04:39:58.34#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.04:39:58.34#ibcon#[25=AT01-08\r\n] 2006.229.04:39:58.34#ibcon#*before write, iclass 16, count 2 2006.229.04:39:58.34#ibcon#enter sib2, iclass 16, count 2 2006.229.04:39:58.34#ibcon#flushed, iclass 16, count 2 2006.229.04:39:58.34#ibcon#about to write, iclass 16, count 2 2006.229.04:39:58.34#ibcon#wrote, iclass 16, count 2 2006.229.04:39:58.34#ibcon#about to read 3, iclass 16, count 2 2006.229.04:39:58.37#ibcon#read 3, iclass 16, count 2 2006.229.04:39:58.37#ibcon#about to read 4, iclass 16, count 2 2006.229.04:39:58.37#ibcon#read 4, iclass 16, count 2 2006.229.04:39:58.37#ibcon#about to read 5, iclass 16, count 2 2006.229.04:39:58.37#ibcon#read 5, iclass 16, count 2 2006.229.04:39:58.37#ibcon#about to read 6, iclass 16, count 2 2006.229.04:39:58.37#ibcon#read 6, iclass 16, count 2 2006.229.04:39:58.37#ibcon#end of sib2, iclass 16, count 2 2006.229.04:39:58.37#ibcon#*after write, iclass 16, count 2 2006.229.04:39:58.37#ibcon#*before return 0, iclass 16, count 2 2006.229.04:39:58.37#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:39:58.37#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:39:58.37#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.04:39:58.37#ibcon#ireg 7 cls_cnt 0 2006.229.04:39:58.37#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:39:58.49#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:39:58.49#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:39:58.49#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:39:58.49#ibcon#first serial, iclass 16, count 0 2006.229.04:39:58.49#ibcon#enter sib2, iclass 16, count 0 2006.229.04:39:58.49#ibcon#flushed, iclass 16, count 0 2006.229.04:39:58.49#ibcon#about to write, iclass 16, count 0 2006.229.04:39:58.49#ibcon#wrote, iclass 16, count 0 2006.229.04:39:58.49#ibcon#about to read 3, iclass 16, count 0 2006.229.04:39:58.51#ibcon#read 3, iclass 16, count 0 2006.229.04:39:58.51#ibcon#about to read 4, iclass 16, count 0 2006.229.04:39:58.51#ibcon#read 4, iclass 16, count 0 2006.229.04:39:58.51#ibcon#about to read 5, iclass 16, count 0 2006.229.04:39:58.51#ibcon#read 5, iclass 16, count 0 2006.229.04:39:58.51#ibcon#about to read 6, iclass 16, count 0 2006.229.04:39:58.51#ibcon#read 6, iclass 16, count 0 2006.229.04:39:58.51#ibcon#end of sib2, iclass 16, count 0 2006.229.04:39:58.51#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:39:58.51#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:39:58.51#ibcon#[25=USB\r\n] 2006.229.04:39:58.51#ibcon#*before write, iclass 16, count 0 2006.229.04:39:58.51#ibcon#enter sib2, iclass 16, count 0 2006.229.04:39:58.51#ibcon#flushed, iclass 16, count 0 2006.229.04:39:58.51#ibcon#about to write, iclass 16, count 0 2006.229.04:39:58.51#ibcon#wrote, iclass 16, count 0 2006.229.04:39:58.51#ibcon#about to read 3, iclass 16, count 0 2006.229.04:39:58.54#ibcon#read 3, iclass 16, count 0 2006.229.04:39:58.54#ibcon#about to read 4, iclass 16, count 0 2006.229.04:39:58.54#ibcon#read 4, iclass 16, count 0 2006.229.04:39:58.54#ibcon#about to read 5, iclass 16, count 0 2006.229.04:39:58.54#ibcon#read 5, iclass 16, count 0 2006.229.04:39:58.54#ibcon#about to read 6, iclass 16, count 0 2006.229.04:39:58.54#ibcon#read 6, iclass 16, count 0 2006.229.04:39:58.54#ibcon#end of sib2, iclass 16, count 0 2006.229.04:39:58.54#ibcon#*after write, iclass 16, count 0 2006.229.04:39:58.54#ibcon#*before return 0, iclass 16, count 0 2006.229.04:39:58.54#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:39:58.54#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:39:58.54#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:39:58.54#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:39:58.54$vck44/valo=2,534.99 2006.229.04:39:58.54#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.04:39:58.54#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.04:39:58.54#ibcon#ireg 17 cls_cnt 0 2006.229.04:39:58.54#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:39:58.54#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:39:58.54#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:39:58.54#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:39:58.54#ibcon#first serial, iclass 18, count 0 2006.229.04:39:58.54#ibcon#enter sib2, iclass 18, count 0 2006.229.04:39:58.54#ibcon#flushed, iclass 18, count 0 2006.229.04:39:58.54#ibcon#about to write, iclass 18, count 0 2006.229.04:39:58.54#ibcon#wrote, iclass 18, count 0 2006.229.04:39:58.54#ibcon#about to read 3, iclass 18, count 0 2006.229.04:39:58.56#ibcon#read 3, iclass 18, count 0 2006.229.04:39:58.56#ibcon#about to read 4, iclass 18, count 0 2006.229.04:39:58.56#ibcon#read 4, iclass 18, count 0 2006.229.04:39:58.56#ibcon#about to read 5, iclass 18, count 0 2006.229.04:39:58.56#ibcon#read 5, iclass 18, count 0 2006.229.04:39:58.56#ibcon#about to read 6, iclass 18, count 0 2006.229.04:39:58.56#ibcon#read 6, iclass 18, count 0 2006.229.04:39:58.56#ibcon#end of sib2, iclass 18, count 0 2006.229.04:39:58.56#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:39:58.56#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:39:58.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:39:58.56#ibcon#*before write, iclass 18, count 0 2006.229.04:39:58.56#ibcon#enter sib2, iclass 18, count 0 2006.229.04:39:58.56#ibcon#flushed, iclass 18, count 0 2006.229.04:39:58.56#ibcon#about to write, iclass 18, count 0 2006.229.04:39:58.56#ibcon#wrote, iclass 18, count 0 2006.229.04:39:58.56#ibcon#about to read 3, iclass 18, count 0 2006.229.04:39:58.60#ibcon#read 3, iclass 18, count 0 2006.229.04:39:58.60#ibcon#about to read 4, iclass 18, count 0 2006.229.04:39:58.60#ibcon#read 4, iclass 18, count 0 2006.229.04:39:58.60#ibcon#about to read 5, iclass 18, count 0 2006.229.04:39:58.60#ibcon#read 5, iclass 18, count 0 2006.229.04:39:58.60#ibcon#about to read 6, iclass 18, count 0 2006.229.04:39:58.60#ibcon#read 6, iclass 18, count 0 2006.229.04:39:58.60#ibcon#end of sib2, iclass 18, count 0 2006.229.04:39:58.60#ibcon#*after write, iclass 18, count 0 2006.229.04:39:58.60#ibcon#*before return 0, iclass 18, count 0 2006.229.04:39:58.60#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:39:58.60#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:39:58.60#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:39:58.60#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:39:58.60$vck44/va=2,7 2006.229.04:39:58.60#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.04:39:58.60#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.04:39:58.60#ibcon#ireg 11 cls_cnt 2 2006.229.04:39:58.60#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:39:58.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:39:58.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:39:58.66#ibcon#enter wrdev, iclass 20, count 2 2006.229.04:39:58.66#ibcon#first serial, iclass 20, count 2 2006.229.04:39:58.66#ibcon#enter sib2, iclass 20, count 2 2006.229.04:39:58.66#ibcon#flushed, iclass 20, count 2 2006.229.04:39:58.66#ibcon#about to write, iclass 20, count 2 2006.229.04:39:58.66#ibcon#wrote, iclass 20, count 2 2006.229.04:39:58.66#ibcon#about to read 3, iclass 20, count 2 2006.229.04:39:58.68#ibcon#read 3, iclass 20, count 2 2006.229.04:39:58.68#ibcon#about to read 4, iclass 20, count 2 2006.229.04:39:58.68#ibcon#read 4, iclass 20, count 2 2006.229.04:39:58.68#ibcon#about to read 5, iclass 20, count 2 2006.229.04:39:58.68#ibcon#read 5, iclass 20, count 2 2006.229.04:39:58.68#ibcon#about to read 6, iclass 20, count 2 2006.229.04:39:58.68#ibcon#read 6, iclass 20, count 2 2006.229.04:39:58.68#ibcon#end of sib2, iclass 20, count 2 2006.229.04:39:58.68#ibcon#*mode == 0, iclass 20, count 2 2006.229.04:39:58.68#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.04:39:58.68#ibcon#[25=AT02-07\r\n] 2006.229.04:39:58.68#ibcon#*before write, iclass 20, count 2 2006.229.04:39:58.68#ibcon#enter sib2, iclass 20, count 2 2006.229.04:39:58.68#ibcon#flushed, iclass 20, count 2 2006.229.04:39:58.68#ibcon#about to write, iclass 20, count 2 2006.229.04:39:58.68#ibcon#wrote, iclass 20, count 2 2006.229.04:39:58.68#ibcon#about to read 3, iclass 20, count 2 2006.229.04:39:58.71#ibcon#read 3, iclass 20, count 2 2006.229.04:39:58.71#ibcon#about to read 4, iclass 20, count 2 2006.229.04:39:58.71#ibcon#read 4, iclass 20, count 2 2006.229.04:39:58.71#ibcon#about to read 5, iclass 20, count 2 2006.229.04:39:58.71#ibcon#read 5, iclass 20, count 2 2006.229.04:39:58.71#ibcon#about to read 6, iclass 20, count 2 2006.229.04:39:58.71#ibcon#read 6, iclass 20, count 2 2006.229.04:39:58.71#ibcon#end of sib2, iclass 20, count 2 2006.229.04:39:58.71#ibcon#*after write, iclass 20, count 2 2006.229.04:39:58.71#ibcon#*before return 0, iclass 20, count 2 2006.229.04:39:58.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:39:58.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:39:58.71#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.04:39:58.71#ibcon#ireg 7 cls_cnt 0 2006.229.04:39:58.71#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:39:58.83#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:39:58.83#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:39:58.83#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:39:58.83#ibcon#first serial, iclass 20, count 0 2006.229.04:39:58.83#ibcon#enter sib2, iclass 20, count 0 2006.229.04:39:58.83#ibcon#flushed, iclass 20, count 0 2006.229.04:39:58.83#ibcon#about to write, iclass 20, count 0 2006.229.04:39:58.83#ibcon#wrote, iclass 20, count 0 2006.229.04:39:58.83#ibcon#about to read 3, iclass 20, count 0 2006.229.04:39:58.85#ibcon#read 3, iclass 20, count 0 2006.229.04:39:58.85#ibcon#about to read 4, iclass 20, count 0 2006.229.04:39:58.85#ibcon#read 4, iclass 20, count 0 2006.229.04:39:58.85#ibcon#about to read 5, iclass 20, count 0 2006.229.04:39:58.85#ibcon#read 5, iclass 20, count 0 2006.229.04:39:58.85#ibcon#about to read 6, iclass 20, count 0 2006.229.04:39:58.85#ibcon#read 6, iclass 20, count 0 2006.229.04:39:58.85#ibcon#end of sib2, iclass 20, count 0 2006.229.04:39:58.85#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:39:58.85#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:39:58.85#ibcon#[25=USB\r\n] 2006.229.04:39:58.85#ibcon#*before write, iclass 20, count 0 2006.229.04:39:58.85#ibcon#enter sib2, iclass 20, count 0 2006.229.04:39:58.85#ibcon#flushed, iclass 20, count 0 2006.229.04:39:58.85#ibcon#about to write, iclass 20, count 0 2006.229.04:39:58.85#ibcon#wrote, iclass 20, count 0 2006.229.04:39:58.85#ibcon#about to read 3, iclass 20, count 0 2006.229.04:39:58.88#ibcon#read 3, iclass 20, count 0 2006.229.04:39:58.88#ibcon#about to read 4, iclass 20, count 0 2006.229.04:39:58.88#ibcon#read 4, iclass 20, count 0 2006.229.04:39:58.88#ibcon#about to read 5, iclass 20, count 0 2006.229.04:39:58.88#ibcon#read 5, iclass 20, count 0 2006.229.04:39:58.88#ibcon#about to read 6, iclass 20, count 0 2006.229.04:39:58.88#ibcon#read 6, iclass 20, count 0 2006.229.04:39:58.88#ibcon#end of sib2, iclass 20, count 0 2006.229.04:39:58.88#ibcon#*after write, iclass 20, count 0 2006.229.04:39:58.88#ibcon#*before return 0, iclass 20, count 0 2006.229.04:39:58.88#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:39:58.88#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:39:58.88#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:39:58.88#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:39:58.88$vck44/valo=3,564.99 2006.229.04:39:58.88#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.04:39:58.88#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.04:39:58.88#ibcon#ireg 17 cls_cnt 0 2006.229.04:39:58.88#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:39:58.88#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:39:58.88#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:39:58.88#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:39:58.88#ibcon#first serial, iclass 22, count 0 2006.229.04:39:58.88#ibcon#enter sib2, iclass 22, count 0 2006.229.04:39:58.88#ibcon#flushed, iclass 22, count 0 2006.229.04:39:58.88#ibcon#about to write, iclass 22, count 0 2006.229.04:39:58.88#ibcon#wrote, iclass 22, count 0 2006.229.04:39:58.88#ibcon#about to read 3, iclass 22, count 0 2006.229.04:39:58.90#ibcon#read 3, iclass 22, count 0 2006.229.04:39:58.90#ibcon#about to read 4, iclass 22, count 0 2006.229.04:39:58.90#ibcon#read 4, iclass 22, count 0 2006.229.04:39:58.90#ibcon#about to read 5, iclass 22, count 0 2006.229.04:39:58.90#ibcon#read 5, iclass 22, count 0 2006.229.04:39:58.90#ibcon#about to read 6, iclass 22, count 0 2006.229.04:39:58.90#ibcon#read 6, iclass 22, count 0 2006.229.04:39:58.90#ibcon#end of sib2, iclass 22, count 0 2006.229.04:39:58.90#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:39:58.90#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:39:58.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:39:58.90#ibcon#*before write, iclass 22, count 0 2006.229.04:39:58.90#ibcon#enter sib2, iclass 22, count 0 2006.229.04:39:58.90#ibcon#flushed, iclass 22, count 0 2006.229.04:39:58.90#ibcon#about to write, iclass 22, count 0 2006.229.04:39:58.90#ibcon#wrote, iclass 22, count 0 2006.229.04:39:58.90#ibcon#about to read 3, iclass 22, count 0 2006.229.04:39:58.94#ibcon#read 3, iclass 22, count 0 2006.229.04:39:58.94#ibcon#about to read 4, iclass 22, count 0 2006.229.04:39:58.94#ibcon#read 4, iclass 22, count 0 2006.229.04:39:58.94#ibcon#about to read 5, iclass 22, count 0 2006.229.04:39:58.94#ibcon#read 5, iclass 22, count 0 2006.229.04:39:58.94#ibcon#about to read 6, iclass 22, count 0 2006.229.04:39:58.94#ibcon#read 6, iclass 22, count 0 2006.229.04:39:58.94#ibcon#end of sib2, iclass 22, count 0 2006.229.04:39:58.94#ibcon#*after write, iclass 22, count 0 2006.229.04:39:58.94#ibcon#*before return 0, iclass 22, count 0 2006.229.04:39:58.94#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:39:58.94#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:39:58.94#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:39:58.94#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:39:58.94$vck44/va=3,6 2006.229.04:39:58.94#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:39:58.94#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:39:58.94#ibcon#ireg 11 cls_cnt 2 2006.229.04:39:58.94#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:39:59.00#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:39:59.00#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:39:59.00#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:39:59.00#ibcon#first serial, iclass 24, count 2 2006.229.04:39:59.00#ibcon#enter sib2, iclass 24, count 2 2006.229.04:39:59.00#ibcon#flushed, iclass 24, count 2 2006.229.04:39:59.00#ibcon#about to write, iclass 24, count 2 2006.229.04:39:59.00#ibcon#wrote, iclass 24, count 2 2006.229.04:39:59.00#ibcon#about to read 3, iclass 24, count 2 2006.229.04:39:59.02#ibcon#read 3, iclass 24, count 2 2006.229.04:39:59.02#ibcon#about to read 4, iclass 24, count 2 2006.229.04:39:59.02#ibcon#read 4, iclass 24, count 2 2006.229.04:39:59.02#ibcon#about to read 5, iclass 24, count 2 2006.229.04:39:59.02#ibcon#read 5, iclass 24, count 2 2006.229.04:39:59.02#ibcon#about to read 6, iclass 24, count 2 2006.229.04:39:59.02#ibcon#read 6, iclass 24, count 2 2006.229.04:39:59.02#ibcon#end of sib2, iclass 24, count 2 2006.229.04:39:59.02#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:39:59.02#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:39:59.02#ibcon#[25=AT03-06\r\n] 2006.229.04:39:59.02#ibcon#*before write, iclass 24, count 2 2006.229.04:39:59.02#ibcon#enter sib2, iclass 24, count 2 2006.229.04:39:59.02#ibcon#flushed, iclass 24, count 2 2006.229.04:39:59.02#ibcon#about to write, iclass 24, count 2 2006.229.04:39:59.02#ibcon#wrote, iclass 24, count 2 2006.229.04:39:59.02#ibcon#about to read 3, iclass 24, count 2 2006.229.04:39:59.05#ibcon#read 3, iclass 24, count 2 2006.229.04:39:59.05#ibcon#about to read 4, iclass 24, count 2 2006.229.04:39:59.05#ibcon#read 4, iclass 24, count 2 2006.229.04:39:59.05#ibcon#about to read 5, iclass 24, count 2 2006.229.04:39:59.05#ibcon#read 5, iclass 24, count 2 2006.229.04:39:59.05#ibcon#about to read 6, iclass 24, count 2 2006.229.04:39:59.05#ibcon#read 6, iclass 24, count 2 2006.229.04:39:59.05#ibcon#end of sib2, iclass 24, count 2 2006.229.04:39:59.05#ibcon#*after write, iclass 24, count 2 2006.229.04:39:59.05#ibcon#*before return 0, iclass 24, count 2 2006.229.04:39:59.05#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:39:59.05#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:39:59.05#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:39:59.05#ibcon#ireg 7 cls_cnt 0 2006.229.04:39:59.05#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:39:59.17#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:39:59.17#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:39:59.17#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:39:59.17#ibcon#first serial, iclass 24, count 0 2006.229.04:39:59.17#ibcon#enter sib2, iclass 24, count 0 2006.229.04:39:59.17#ibcon#flushed, iclass 24, count 0 2006.229.04:39:59.17#ibcon#about to write, iclass 24, count 0 2006.229.04:39:59.17#ibcon#wrote, iclass 24, count 0 2006.229.04:39:59.17#ibcon#about to read 3, iclass 24, count 0 2006.229.04:39:59.19#ibcon#read 3, iclass 24, count 0 2006.229.04:39:59.19#ibcon#about to read 4, iclass 24, count 0 2006.229.04:39:59.19#ibcon#read 4, iclass 24, count 0 2006.229.04:39:59.19#ibcon#about to read 5, iclass 24, count 0 2006.229.04:39:59.19#ibcon#read 5, iclass 24, count 0 2006.229.04:39:59.19#ibcon#about to read 6, iclass 24, count 0 2006.229.04:39:59.19#ibcon#read 6, iclass 24, count 0 2006.229.04:39:59.19#ibcon#end of sib2, iclass 24, count 0 2006.229.04:39:59.19#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:39:59.19#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:39:59.19#ibcon#[25=USB\r\n] 2006.229.04:39:59.19#ibcon#*before write, iclass 24, count 0 2006.229.04:39:59.19#ibcon#enter sib2, iclass 24, count 0 2006.229.04:39:59.19#ibcon#flushed, iclass 24, count 0 2006.229.04:39:59.19#ibcon#about to write, iclass 24, count 0 2006.229.04:39:59.19#ibcon#wrote, iclass 24, count 0 2006.229.04:39:59.19#ibcon#about to read 3, iclass 24, count 0 2006.229.04:39:59.20#abcon#<5=/04 3.5 6.0 30.85 92 999.8\r\n> 2006.229.04:39:59.22#abcon#{5=INTERFACE CLEAR} 2006.229.04:39:59.22#ibcon#read 3, iclass 24, count 0 2006.229.04:39:59.22#ibcon#about to read 4, iclass 24, count 0 2006.229.04:39:59.22#ibcon#read 4, iclass 24, count 0 2006.229.04:39:59.22#ibcon#about to read 5, iclass 24, count 0 2006.229.04:39:59.22#ibcon#read 5, iclass 24, count 0 2006.229.04:39:59.22#ibcon#about to read 6, iclass 24, count 0 2006.229.04:39:59.22#ibcon#read 6, iclass 24, count 0 2006.229.04:39:59.22#ibcon#end of sib2, iclass 24, count 0 2006.229.04:39:59.22#ibcon#*after write, iclass 24, count 0 2006.229.04:39:59.22#ibcon#*before return 0, iclass 24, count 0 2006.229.04:39:59.22#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:39:59.22#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:39:59.22#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:39:59.22#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:39:59.22$vck44/valo=4,624.99 2006.229.04:39:59.22#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.04:39:59.22#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.04:39:59.22#ibcon#ireg 17 cls_cnt 0 2006.229.04:39:59.22#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:39:59.22#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:39:59.22#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:39:59.22#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:39:59.22#ibcon#first serial, iclass 29, count 0 2006.229.04:39:59.22#ibcon#enter sib2, iclass 29, count 0 2006.229.04:39:59.22#ibcon#flushed, iclass 29, count 0 2006.229.04:39:59.22#ibcon#about to write, iclass 29, count 0 2006.229.04:39:59.22#ibcon#wrote, iclass 29, count 0 2006.229.04:39:59.22#ibcon#about to read 3, iclass 29, count 0 2006.229.04:39:59.24#ibcon#read 3, iclass 29, count 0 2006.229.04:39:59.24#ibcon#about to read 4, iclass 29, count 0 2006.229.04:39:59.24#ibcon#read 4, iclass 29, count 0 2006.229.04:39:59.24#ibcon#about to read 5, iclass 29, count 0 2006.229.04:39:59.24#ibcon#read 5, iclass 29, count 0 2006.229.04:39:59.24#ibcon#about to read 6, iclass 29, count 0 2006.229.04:39:59.24#ibcon#read 6, iclass 29, count 0 2006.229.04:39:59.24#ibcon#end of sib2, iclass 29, count 0 2006.229.04:39:59.24#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:39:59.24#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:39:59.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:39:59.24#ibcon#*before write, iclass 29, count 0 2006.229.04:39:59.24#ibcon#enter sib2, iclass 29, count 0 2006.229.04:39:59.24#ibcon#flushed, iclass 29, count 0 2006.229.04:39:59.24#ibcon#about to write, iclass 29, count 0 2006.229.04:39:59.24#ibcon#wrote, iclass 29, count 0 2006.229.04:39:59.24#ibcon#about to read 3, iclass 29, count 0 2006.229.04:39:59.28#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:39:59.28#ibcon#read 3, iclass 29, count 0 2006.229.04:39:59.28#ibcon#about to read 4, iclass 29, count 0 2006.229.04:39:59.28#ibcon#read 4, iclass 29, count 0 2006.229.04:39:59.28#ibcon#about to read 5, iclass 29, count 0 2006.229.04:39:59.28#ibcon#read 5, iclass 29, count 0 2006.229.04:39:59.28#ibcon#about to read 6, iclass 29, count 0 2006.229.04:39:59.28#ibcon#read 6, iclass 29, count 0 2006.229.04:39:59.28#ibcon#end of sib2, iclass 29, count 0 2006.229.04:39:59.28#ibcon#*after write, iclass 29, count 0 2006.229.04:39:59.28#ibcon#*before return 0, iclass 29, count 0 2006.229.04:39:59.28#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:39:59.28#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:39:59.28#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:39:59.28#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:39:59.28$vck44/va=4,7 2006.229.04:39:59.28#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:39:59.28#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:39:59.28#ibcon#ireg 11 cls_cnt 2 2006.229.04:39:59.28#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:39:59.34#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:39:59.34#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:39:59.34#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:39:59.34#ibcon#first serial, iclass 32, count 2 2006.229.04:39:59.34#ibcon#enter sib2, iclass 32, count 2 2006.229.04:39:59.34#ibcon#flushed, iclass 32, count 2 2006.229.04:39:59.34#ibcon#about to write, iclass 32, count 2 2006.229.04:39:59.34#ibcon#wrote, iclass 32, count 2 2006.229.04:39:59.34#ibcon#about to read 3, iclass 32, count 2 2006.229.04:39:59.36#ibcon#read 3, iclass 32, count 2 2006.229.04:39:59.36#ibcon#about to read 4, iclass 32, count 2 2006.229.04:39:59.36#ibcon#read 4, iclass 32, count 2 2006.229.04:39:59.36#ibcon#about to read 5, iclass 32, count 2 2006.229.04:39:59.36#ibcon#read 5, iclass 32, count 2 2006.229.04:39:59.36#ibcon#about to read 6, iclass 32, count 2 2006.229.04:39:59.36#ibcon#read 6, iclass 32, count 2 2006.229.04:39:59.36#ibcon#end of sib2, iclass 32, count 2 2006.229.04:39:59.36#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:39:59.36#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:39:59.36#ibcon#[25=AT04-07\r\n] 2006.229.04:39:59.36#ibcon#*before write, iclass 32, count 2 2006.229.04:39:59.36#ibcon#enter sib2, iclass 32, count 2 2006.229.04:39:59.36#ibcon#flushed, iclass 32, count 2 2006.229.04:39:59.36#ibcon#about to write, iclass 32, count 2 2006.229.04:39:59.36#ibcon#wrote, iclass 32, count 2 2006.229.04:39:59.36#ibcon#about to read 3, iclass 32, count 2 2006.229.04:39:59.39#ibcon#read 3, iclass 32, count 2 2006.229.04:39:59.39#ibcon#about to read 4, iclass 32, count 2 2006.229.04:39:59.39#ibcon#read 4, iclass 32, count 2 2006.229.04:39:59.39#ibcon#about to read 5, iclass 32, count 2 2006.229.04:39:59.39#ibcon#read 5, iclass 32, count 2 2006.229.04:39:59.39#ibcon#about to read 6, iclass 32, count 2 2006.229.04:39:59.46#ibcon#read 6, iclass 32, count 2 2006.229.04:39:59.46#ibcon#end of sib2, iclass 32, count 2 2006.229.04:39:59.46#ibcon#*after write, iclass 32, count 2 2006.229.04:39:59.46#ibcon#*before return 0, iclass 32, count 2 2006.229.04:39:59.46#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:39:59.46#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:39:59.46#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:39:59.46#ibcon#ireg 7 cls_cnt 0 2006.229.04:39:59.46#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:39:59.57#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:39:59.57#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:39:59.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:39:59.57#ibcon#first serial, iclass 32, count 0 2006.229.04:39:59.57#ibcon#enter sib2, iclass 32, count 0 2006.229.04:39:59.57#ibcon#flushed, iclass 32, count 0 2006.229.04:39:59.57#ibcon#about to write, iclass 32, count 0 2006.229.04:39:59.57#ibcon#wrote, iclass 32, count 0 2006.229.04:39:59.57#ibcon#about to read 3, iclass 32, count 0 2006.229.04:39:59.59#ibcon#read 3, iclass 32, count 0 2006.229.04:39:59.59#ibcon#about to read 4, iclass 32, count 0 2006.229.04:39:59.59#ibcon#read 4, iclass 32, count 0 2006.229.04:39:59.59#ibcon#about to read 5, iclass 32, count 0 2006.229.04:39:59.59#ibcon#read 5, iclass 32, count 0 2006.229.04:39:59.59#ibcon#about to read 6, iclass 32, count 0 2006.229.04:39:59.59#ibcon#read 6, iclass 32, count 0 2006.229.04:39:59.59#ibcon#end of sib2, iclass 32, count 0 2006.229.04:39:59.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:39:59.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:39:59.59#ibcon#[25=USB\r\n] 2006.229.04:39:59.59#ibcon#*before write, iclass 32, count 0 2006.229.04:39:59.59#ibcon#enter sib2, iclass 32, count 0 2006.229.04:39:59.59#ibcon#flushed, iclass 32, count 0 2006.229.04:39:59.59#ibcon#about to write, iclass 32, count 0 2006.229.04:39:59.59#ibcon#wrote, iclass 32, count 0 2006.229.04:39:59.59#ibcon#about to read 3, iclass 32, count 0 2006.229.04:39:59.62#ibcon#read 3, iclass 32, count 0 2006.229.04:39:59.62#ibcon#about to read 4, iclass 32, count 0 2006.229.04:39:59.62#ibcon#read 4, iclass 32, count 0 2006.229.04:39:59.62#ibcon#about to read 5, iclass 32, count 0 2006.229.04:39:59.62#ibcon#read 5, iclass 32, count 0 2006.229.04:39:59.62#ibcon#about to read 6, iclass 32, count 0 2006.229.04:39:59.62#ibcon#read 6, iclass 32, count 0 2006.229.04:39:59.62#ibcon#end of sib2, iclass 32, count 0 2006.229.04:39:59.62#ibcon#*after write, iclass 32, count 0 2006.229.04:39:59.62#ibcon#*before return 0, iclass 32, count 0 2006.229.04:39:59.62#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:39:59.62#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:39:59.62#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:39:59.62#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:39:59.62$vck44/valo=5,734.99 2006.229.04:39:59.62#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.04:39:59.62#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.04:39:59.62#ibcon#ireg 17 cls_cnt 0 2006.229.04:39:59.62#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:39:59.62#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:39:59.62#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:39:59.62#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:39:59.62#ibcon#first serial, iclass 34, count 0 2006.229.04:39:59.62#ibcon#enter sib2, iclass 34, count 0 2006.229.04:39:59.62#ibcon#flushed, iclass 34, count 0 2006.229.04:39:59.62#ibcon#about to write, iclass 34, count 0 2006.229.04:39:59.62#ibcon#wrote, iclass 34, count 0 2006.229.04:39:59.62#ibcon#about to read 3, iclass 34, count 0 2006.229.04:39:59.64#ibcon#read 3, iclass 34, count 0 2006.229.04:39:59.64#ibcon#about to read 4, iclass 34, count 0 2006.229.04:39:59.64#ibcon#read 4, iclass 34, count 0 2006.229.04:39:59.64#ibcon#about to read 5, iclass 34, count 0 2006.229.04:39:59.64#ibcon#read 5, iclass 34, count 0 2006.229.04:39:59.64#ibcon#about to read 6, iclass 34, count 0 2006.229.04:39:59.64#ibcon#read 6, iclass 34, count 0 2006.229.04:39:59.64#ibcon#end of sib2, iclass 34, count 0 2006.229.04:39:59.64#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:39:59.64#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:39:59.64#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:39:59.64#ibcon#*before write, iclass 34, count 0 2006.229.04:39:59.64#ibcon#enter sib2, iclass 34, count 0 2006.229.04:39:59.64#ibcon#flushed, iclass 34, count 0 2006.229.04:39:59.64#ibcon#about to write, iclass 34, count 0 2006.229.04:39:59.64#ibcon#wrote, iclass 34, count 0 2006.229.04:39:59.64#ibcon#about to read 3, iclass 34, count 0 2006.229.04:39:59.68#ibcon#read 3, iclass 34, count 0 2006.229.04:39:59.68#ibcon#about to read 4, iclass 34, count 0 2006.229.04:39:59.68#ibcon#read 4, iclass 34, count 0 2006.229.04:39:59.68#ibcon#about to read 5, iclass 34, count 0 2006.229.04:39:59.68#ibcon#read 5, iclass 34, count 0 2006.229.04:39:59.68#ibcon#about to read 6, iclass 34, count 0 2006.229.04:39:59.68#ibcon#read 6, iclass 34, count 0 2006.229.04:39:59.68#ibcon#end of sib2, iclass 34, count 0 2006.229.04:39:59.68#ibcon#*after write, iclass 34, count 0 2006.229.04:39:59.68#ibcon#*before return 0, iclass 34, count 0 2006.229.04:39:59.68#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:39:59.68#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:39:59.68#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:39:59.68#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:39:59.68$vck44/va=5,4 2006.229.04:39:59.68#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.04:39:59.68#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.04:39:59.68#ibcon#ireg 11 cls_cnt 2 2006.229.04:39:59.68#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:39:59.74#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:39:59.74#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:39:59.74#ibcon#enter wrdev, iclass 36, count 2 2006.229.04:39:59.74#ibcon#first serial, iclass 36, count 2 2006.229.04:39:59.74#ibcon#enter sib2, iclass 36, count 2 2006.229.04:39:59.74#ibcon#flushed, iclass 36, count 2 2006.229.04:39:59.74#ibcon#about to write, iclass 36, count 2 2006.229.04:39:59.74#ibcon#wrote, iclass 36, count 2 2006.229.04:39:59.74#ibcon#about to read 3, iclass 36, count 2 2006.229.04:39:59.76#ibcon#read 3, iclass 36, count 2 2006.229.04:39:59.76#ibcon#about to read 4, iclass 36, count 2 2006.229.04:39:59.76#ibcon#read 4, iclass 36, count 2 2006.229.04:39:59.76#ibcon#about to read 5, iclass 36, count 2 2006.229.04:39:59.76#ibcon#read 5, iclass 36, count 2 2006.229.04:39:59.76#ibcon#about to read 6, iclass 36, count 2 2006.229.04:39:59.76#ibcon#read 6, iclass 36, count 2 2006.229.04:39:59.76#ibcon#end of sib2, iclass 36, count 2 2006.229.04:39:59.76#ibcon#*mode == 0, iclass 36, count 2 2006.229.04:39:59.76#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.04:39:59.76#ibcon#[25=AT05-04\r\n] 2006.229.04:39:59.76#ibcon#*before write, iclass 36, count 2 2006.229.04:39:59.76#ibcon#enter sib2, iclass 36, count 2 2006.229.04:39:59.76#ibcon#flushed, iclass 36, count 2 2006.229.04:39:59.76#ibcon#about to write, iclass 36, count 2 2006.229.04:39:59.76#ibcon#wrote, iclass 36, count 2 2006.229.04:39:59.76#ibcon#about to read 3, iclass 36, count 2 2006.229.04:39:59.79#ibcon#read 3, iclass 36, count 2 2006.229.04:39:59.79#ibcon#about to read 4, iclass 36, count 2 2006.229.04:39:59.79#ibcon#read 4, iclass 36, count 2 2006.229.04:39:59.79#ibcon#about to read 5, iclass 36, count 2 2006.229.04:39:59.79#ibcon#read 5, iclass 36, count 2 2006.229.04:39:59.79#ibcon#about to read 6, iclass 36, count 2 2006.229.04:39:59.79#ibcon#read 6, iclass 36, count 2 2006.229.04:39:59.79#ibcon#end of sib2, iclass 36, count 2 2006.229.04:39:59.79#ibcon#*after write, iclass 36, count 2 2006.229.04:39:59.79#ibcon#*before return 0, iclass 36, count 2 2006.229.04:39:59.79#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:39:59.79#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:39:59.79#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.04:39:59.79#ibcon#ireg 7 cls_cnt 0 2006.229.04:39:59.79#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:39:59.91#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:39:59.91#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:39:59.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:39:59.91#ibcon#first serial, iclass 36, count 0 2006.229.04:39:59.91#ibcon#enter sib2, iclass 36, count 0 2006.229.04:39:59.91#ibcon#flushed, iclass 36, count 0 2006.229.04:39:59.91#ibcon#about to write, iclass 36, count 0 2006.229.04:39:59.91#ibcon#wrote, iclass 36, count 0 2006.229.04:39:59.91#ibcon#about to read 3, iclass 36, count 0 2006.229.04:39:59.93#ibcon#read 3, iclass 36, count 0 2006.229.04:39:59.93#ibcon#about to read 4, iclass 36, count 0 2006.229.04:39:59.93#ibcon#read 4, iclass 36, count 0 2006.229.04:39:59.93#ibcon#about to read 5, iclass 36, count 0 2006.229.04:39:59.93#ibcon#read 5, iclass 36, count 0 2006.229.04:39:59.93#ibcon#about to read 6, iclass 36, count 0 2006.229.04:39:59.93#ibcon#read 6, iclass 36, count 0 2006.229.04:39:59.93#ibcon#end of sib2, iclass 36, count 0 2006.229.04:39:59.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:39:59.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:39:59.93#ibcon#[25=USB\r\n] 2006.229.04:39:59.93#ibcon#*before write, iclass 36, count 0 2006.229.04:39:59.93#ibcon#enter sib2, iclass 36, count 0 2006.229.04:39:59.93#ibcon#flushed, iclass 36, count 0 2006.229.04:39:59.93#ibcon#about to write, iclass 36, count 0 2006.229.04:39:59.93#ibcon#wrote, iclass 36, count 0 2006.229.04:39:59.93#ibcon#about to read 3, iclass 36, count 0 2006.229.04:39:59.96#ibcon#read 3, iclass 36, count 0 2006.229.04:39:59.96#ibcon#about to read 4, iclass 36, count 0 2006.229.04:39:59.96#ibcon#read 4, iclass 36, count 0 2006.229.04:39:59.96#ibcon#about to read 5, iclass 36, count 0 2006.229.04:39:59.96#ibcon#read 5, iclass 36, count 0 2006.229.04:39:59.96#ibcon#about to read 6, iclass 36, count 0 2006.229.04:39:59.96#ibcon#read 6, iclass 36, count 0 2006.229.04:39:59.96#ibcon#end of sib2, iclass 36, count 0 2006.229.04:39:59.96#ibcon#*after write, iclass 36, count 0 2006.229.04:39:59.96#ibcon#*before return 0, iclass 36, count 0 2006.229.04:39:59.96#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:39:59.96#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:39:59.96#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:39:59.96#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:39:59.96$vck44/valo=6,814.99 2006.229.04:39:59.96#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.04:39:59.96#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.04:39:59.96#ibcon#ireg 17 cls_cnt 0 2006.229.04:39:59.96#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:39:59.96#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:39:59.96#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:39:59.96#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:39:59.96#ibcon#first serial, iclass 38, count 0 2006.229.04:39:59.96#ibcon#enter sib2, iclass 38, count 0 2006.229.04:39:59.96#ibcon#flushed, iclass 38, count 0 2006.229.04:39:59.96#ibcon#about to write, iclass 38, count 0 2006.229.04:39:59.96#ibcon#wrote, iclass 38, count 0 2006.229.04:39:59.96#ibcon#about to read 3, iclass 38, count 0 2006.229.04:39:59.98#ibcon#read 3, iclass 38, count 0 2006.229.04:39:59.98#ibcon#about to read 4, iclass 38, count 0 2006.229.04:39:59.98#ibcon#read 4, iclass 38, count 0 2006.229.04:39:59.98#ibcon#about to read 5, iclass 38, count 0 2006.229.04:39:59.98#ibcon#read 5, iclass 38, count 0 2006.229.04:39:59.98#ibcon#about to read 6, iclass 38, count 0 2006.229.04:39:59.98#ibcon#read 6, iclass 38, count 0 2006.229.04:39:59.98#ibcon#end of sib2, iclass 38, count 0 2006.229.04:39:59.98#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:39:59.98#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:39:59.98#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:39:59.98#ibcon#*before write, iclass 38, count 0 2006.229.04:39:59.98#ibcon#enter sib2, iclass 38, count 0 2006.229.04:39:59.98#ibcon#flushed, iclass 38, count 0 2006.229.04:39:59.98#ibcon#about to write, iclass 38, count 0 2006.229.04:39:59.98#ibcon#wrote, iclass 38, count 0 2006.229.04:39:59.98#ibcon#about to read 3, iclass 38, count 0 2006.229.04:40:00.02#ibcon#read 3, iclass 38, count 0 2006.229.04:40:00.02#ibcon#about to read 4, iclass 38, count 0 2006.229.04:40:00.02#ibcon#read 4, iclass 38, count 0 2006.229.04:40:00.02#ibcon#about to read 5, iclass 38, count 0 2006.229.04:40:00.02#ibcon#read 5, iclass 38, count 0 2006.229.04:40:00.02#ibcon#about to read 6, iclass 38, count 0 2006.229.04:40:00.02#ibcon#read 6, iclass 38, count 0 2006.229.04:40:00.02#ibcon#end of sib2, iclass 38, count 0 2006.229.04:40:00.02#ibcon#*after write, iclass 38, count 0 2006.229.04:40:00.02#ibcon#*before return 0, iclass 38, count 0 2006.229.04:40:00.02#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:00.02#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:00.02#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:40:00.02#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:40:00.02$vck44/va=6,4 2006.229.04:40:00.02#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.04:40:00.02#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.04:40:00.02#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:00.02#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:00.08#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:00.08#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:00.08#ibcon#enter wrdev, iclass 40, count 2 2006.229.04:40:00.08#ibcon#first serial, iclass 40, count 2 2006.229.04:40:00.08#ibcon#enter sib2, iclass 40, count 2 2006.229.04:40:00.08#ibcon#flushed, iclass 40, count 2 2006.229.04:40:00.08#ibcon#about to write, iclass 40, count 2 2006.229.04:40:00.08#ibcon#wrote, iclass 40, count 2 2006.229.04:40:00.08#ibcon#about to read 3, iclass 40, count 2 2006.229.04:40:00.10#ibcon#read 3, iclass 40, count 2 2006.229.04:40:00.10#ibcon#about to read 4, iclass 40, count 2 2006.229.04:40:00.10#ibcon#read 4, iclass 40, count 2 2006.229.04:40:00.10#ibcon#about to read 5, iclass 40, count 2 2006.229.04:40:00.10#ibcon#read 5, iclass 40, count 2 2006.229.04:40:00.10#ibcon#about to read 6, iclass 40, count 2 2006.229.04:40:00.10#ibcon#read 6, iclass 40, count 2 2006.229.04:40:00.10#ibcon#end of sib2, iclass 40, count 2 2006.229.04:40:00.10#ibcon#*mode == 0, iclass 40, count 2 2006.229.04:40:00.10#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.04:40:00.10#ibcon#[25=AT06-04\r\n] 2006.229.04:40:00.10#ibcon#*before write, iclass 40, count 2 2006.229.04:40:00.10#ibcon#enter sib2, iclass 40, count 2 2006.229.04:40:00.10#ibcon#flushed, iclass 40, count 2 2006.229.04:40:00.10#ibcon#about to write, iclass 40, count 2 2006.229.04:40:00.10#ibcon#wrote, iclass 40, count 2 2006.229.04:40:00.10#ibcon#about to read 3, iclass 40, count 2 2006.229.04:40:00.13#ibcon#read 3, iclass 40, count 2 2006.229.04:40:00.13#ibcon#about to read 4, iclass 40, count 2 2006.229.04:40:00.13#ibcon#read 4, iclass 40, count 2 2006.229.04:40:00.13#ibcon#about to read 5, iclass 40, count 2 2006.229.04:40:00.13#ibcon#read 5, iclass 40, count 2 2006.229.04:40:00.13#ibcon#about to read 6, iclass 40, count 2 2006.229.04:40:00.13#ibcon#read 6, iclass 40, count 2 2006.229.04:40:00.13#ibcon#end of sib2, iclass 40, count 2 2006.229.04:40:00.13#ibcon#*after write, iclass 40, count 2 2006.229.04:40:00.13#ibcon#*before return 0, iclass 40, count 2 2006.229.04:40:00.13#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:00.13#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:00.13#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.04:40:00.13#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:00.13#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:00.25#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:00.25#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:00.25#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:40:00.25#ibcon#first serial, iclass 40, count 0 2006.229.04:40:00.25#ibcon#enter sib2, iclass 40, count 0 2006.229.04:40:00.25#ibcon#flushed, iclass 40, count 0 2006.229.04:40:00.25#ibcon#about to write, iclass 40, count 0 2006.229.04:40:00.25#ibcon#wrote, iclass 40, count 0 2006.229.04:40:00.25#ibcon#about to read 3, iclass 40, count 0 2006.229.04:40:00.27#ibcon#read 3, iclass 40, count 0 2006.229.04:40:00.27#ibcon#about to read 4, iclass 40, count 0 2006.229.04:40:00.27#ibcon#read 4, iclass 40, count 0 2006.229.04:40:00.27#ibcon#about to read 5, iclass 40, count 0 2006.229.04:40:00.27#ibcon#read 5, iclass 40, count 0 2006.229.04:40:00.27#ibcon#about to read 6, iclass 40, count 0 2006.229.04:40:00.27#ibcon#read 6, iclass 40, count 0 2006.229.04:40:00.27#ibcon#end of sib2, iclass 40, count 0 2006.229.04:40:00.27#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:40:00.27#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:40:00.27#ibcon#[25=USB\r\n] 2006.229.04:40:00.27#ibcon#*before write, iclass 40, count 0 2006.229.04:40:00.27#ibcon#enter sib2, iclass 40, count 0 2006.229.04:40:00.27#ibcon#flushed, iclass 40, count 0 2006.229.04:40:00.27#ibcon#about to write, iclass 40, count 0 2006.229.04:40:00.27#ibcon#wrote, iclass 40, count 0 2006.229.04:40:00.27#ibcon#about to read 3, iclass 40, count 0 2006.229.04:40:00.30#ibcon#read 3, iclass 40, count 0 2006.229.04:40:00.30#ibcon#about to read 4, iclass 40, count 0 2006.229.04:40:00.30#ibcon#read 4, iclass 40, count 0 2006.229.04:40:00.30#ibcon#about to read 5, iclass 40, count 0 2006.229.04:40:00.30#ibcon#read 5, iclass 40, count 0 2006.229.04:40:00.30#ibcon#about to read 6, iclass 40, count 0 2006.229.04:40:00.30#ibcon#read 6, iclass 40, count 0 2006.229.04:40:00.30#ibcon#end of sib2, iclass 40, count 0 2006.229.04:40:00.30#ibcon#*after write, iclass 40, count 0 2006.229.04:40:00.30#ibcon#*before return 0, iclass 40, count 0 2006.229.04:40:00.30#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:00.30#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:00.30#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:40:00.30#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:40:00.30$vck44/valo=7,864.99 2006.229.04:40:00.30#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.04:40:00.30#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.04:40:00.30#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:00.30#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:00.30#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:00.30#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:00.30#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:40:00.30#ibcon#first serial, iclass 4, count 0 2006.229.04:40:00.30#ibcon#enter sib2, iclass 4, count 0 2006.229.04:40:00.30#ibcon#flushed, iclass 4, count 0 2006.229.04:40:00.30#ibcon#about to write, iclass 4, count 0 2006.229.04:40:00.30#ibcon#wrote, iclass 4, count 0 2006.229.04:40:00.30#ibcon#about to read 3, iclass 4, count 0 2006.229.04:40:00.32#ibcon#read 3, iclass 4, count 0 2006.229.04:40:00.32#ibcon#about to read 4, iclass 4, count 0 2006.229.04:40:00.32#ibcon#read 4, iclass 4, count 0 2006.229.04:40:00.32#ibcon#about to read 5, iclass 4, count 0 2006.229.04:40:00.32#ibcon#read 5, iclass 4, count 0 2006.229.04:40:00.32#ibcon#about to read 6, iclass 4, count 0 2006.229.04:40:00.32#ibcon#read 6, iclass 4, count 0 2006.229.04:40:00.32#ibcon#end of sib2, iclass 4, count 0 2006.229.04:40:00.32#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:40:00.32#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:40:00.32#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:40:00.32#ibcon#*before write, iclass 4, count 0 2006.229.04:40:00.32#ibcon#enter sib2, iclass 4, count 0 2006.229.04:40:00.32#ibcon#flushed, iclass 4, count 0 2006.229.04:40:00.32#ibcon#about to write, iclass 4, count 0 2006.229.04:40:00.32#ibcon#wrote, iclass 4, count 0 2006.229.04:40:00.32#ibcon#about to read 3, iclass 4, count 0 2006.229.04:40:00.36#ibcon#read 3, iclass 4, count 0 2006.229.04:40:00.36#ibcon#about to read 4, iclass 4, count 0 2006.229.04:40:00.36#ibcon#read 4, iclass 4, count 0 2006.229.04:40:00.36#ibcon#about to read 5, iclass 4, count 0 2006.229.04:40:00.36#ibcon#read 5, iclass 4, count 0 2006.229.04:40:00.36#ibcon#about to read 6, iclass 4, count 0 2006.229.04:40:00.36#ibcon#read 6, iclass 4, count 0 2006.229.04:40:00.36#ibcon#end of sib2, iclass 4, count 0 2006.229.04:40:00.36#ibcon#*after write, iclass 4, count 0 2006.229.04:40:00.36#ibcon#*before return 0, iclass 4, count 0 2006.229.04:40:00.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:00.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:00.36#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:40:00.36#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:40:00.36$vck44/va=7,5 2006.229.04:40:00.36#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.04:40:00.36#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.04:40:00.36#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:00.36#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:00.42#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:00.42#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:00.42#ibcon#enter wrdev, iclass 6, count 2 2006.229.04:40:00.42#ibcon#first serial, iclass 6, count 2 2006.229.04:40:00.42#ibcon#enter sib2, iclass 6, count 2 2006.229.04:40:00.42#ibcon#flushed, iclass 6, count 2 2006.229.04:40:00.42#ibcon#about to write, iclass 6, count 2 2006.229.04:40:00.42#ibcon#wrote, iclass 6, count 2 2006.229.04:40:00.42#ibcon#about to read 3, iclass 6, count 2 2006.229.04:40:00.44#ibcon#read 3, iclass 6, count 2 2006.229.04:40:00.44#ibcon#about to read 4, iclass 6, count 2 2006.229.04:40:00.44#ibcon#read 4, iclass 6, count 2 2006.229.04:40:00.44#ibcon#about to read 5, iclass 6, count 2 2006.229.04:40:00.44#ibcon#read 5, iclass 6, count 2 2006.229.04:40:00.44#ibcon#about to read 6, iclass 6, count 2 2006.229.04:40:00.44#ibcon#read 6, iclass 6, count 2 2006.229.04:40:00.44#ibcon#end of sib2, iclass 6, count 2 2006.229.04:40:00.44#ibcon#*mode == 0, iclass 6, count 2 2006.229.04:40:00.44#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.04:40:00.44#ibcon#[25=AT07-05\r\n] 2006.229.04:40:00.44#ibcon#*before write, iclass 6, count 2 2006.229.04:40:00.44#ibcon#enter sib2, iclass 6, count 2 2006.229.04:40:00.44#ibcon#flushed, iclass 6, count 2 2006.229.04:40:00.44#ibcon#about to write, iclass 6, count 2 2006.229.04:40:00.44#ibcon#wrote, iclass 6, count 2 2006.229.04:40:00.44#ibcon#about to read 3, iclass 6, count 2 2006.229.04:40:00.47#ibcon#read 3, iclass 6, count 2 2006.229.04:40:00.47#ibcon#about to read 4, iclass 6, count 2 2006.229.04:40:00.47#ibcon#read 4, iclass 6, count 2 2006.229.04:40:00.47#ibcon#about to read 5, iclass 6, count 2 2006.229.04:40:00.47#ibcon#read 5, iclass 6, count 2 2006.229.04:40:00.47#ibcon#about to read 6, iclass 6, count 2 2006.229.04:40:00.47#ibcon#read 6, iclass 6, count 2 2006.229.04:40:00.47#ibcon#end of sib2, iclass 6, count 2 2006.229.04:40:00.47#ibcon#*after write, iclass 6, count 2 2006.229.04:40:00.47#ibcon#*before return 0, iclass 6, count 2 2006.229.04:40:00.47#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:00.47#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:00.47#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.04:40:00.47#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:00.47#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:00.59#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:00.59#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:00.59#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:40:00.59#ibcon#first serial, iclass 6, count 0 2006.229.04:40:00.59#ibcon#enter sib2, iclass 6, count 0 2006.229.04:40:00.59#ibcon#flushed, iclass 6, count 0 2006.229.04:40:00.59#ibcon#about to write, iclass 6, count 0 2006.229.04:40:00.59#ibcon#wrote, iclass 6, count 0 2006.229.04:40:00.59#ibcon#about to read 3, iclass 6, count 0 2006.229.04:40:00.61#ibcon#read 3, iclass 6, count 0 2006.229.04:40:00.61#ibcon#about to read 4, iclass 6, count 0 2006.229.04:40:00.61#ibcon#read 4, iclass 6, count 0 2006.229.04:40:00.61#ibcon#about to read 5, iclass 6, count 0 2006.229.04:40:00.61#ibcon#read 5, iclass 6, count 0 2006.229.04:40:00.61#ibcon#about to read 6, iclass 6, count 0 2006.229.04:40:00.61#ibcon#read 6, iclass 6, count 0 2006.229.04:40:00.61#ibcon#end of sib2, iclass 6, count 0 2006.229.04:40:00.61#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:40:00.61#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:40:00.61#ibcon#[25=USB\r\n] 2006.229.04:40:00.61#ibcon#*before write, iclass 6, count 0 2006.229.04:40:00.61#ibcon#enter sib2, iclass 6, count 0 2006.229.04:40:00.61#ibcon#flushed, iclass 6, count 0 2006.229.04:40:00.61#ibcon#about to write, iclass 6, count 0 2006.229.04:40:00.61#ibcon#wrote, iclass 6, count 0 2006.229.04:40:00.61#ibcon#about to read 3, iclass 6, count 0 2006.229.04:40:00.64#ibcon#read 3, iclass 6, count 0 2006.229.04:40:00.64#ibcon#about to read 4, iclass 6, count 0 2006.229.04:40:00.64#ibcon#read 4, iclass 6, count 0 2006.229.04:40:00.64#ibcon#about to read 5, iclass 6, count 0 2006.229.04:40:00.64#ibcon#read 5, iclass 6, count 0 2006.229.04:40:00.64#ibcon#about to read 6, iclass 6, count 0 2006.229.04:40:00.64#ibcon#read 6, iclass 6, count 0 2006.229.04:40:00.64#ibcon#end of sib2, iclass 6, count 0 2006.229.04:40:00.64#ibcon#*after write, iclass 6, count 0 2006.229.04:40:00.64#ibcon#*before return 0, iclass 6, count 0 2006.229.04:40:00.64#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:00.64#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:00.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:40:00.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:40:00.64$vck44/valo=8,884.99 2006.229.04:40:00.64#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:40:00.64#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:40:00.64#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:00.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:00.64#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:00.64#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:00.64#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:40:00.64#ibcon#first serial, iclass 10, count 0 2006.229.04:40:00.64#ibcon#enter sib2, iclass 10, count 0 2006.229.04:40:00.64#ibcon#flushed, iclass 10, count 0 2006.229.04:40:00.64#ibcon#about to write, iclass 10, count 0 2006.229.04:40:00.64#ibcon#wrote, iclass 10, count 0 2006.229.04:40:00.64#ibcon#about to read 3, iclass 10, count 0 2006.229.04:40:00.66#ibcon#read 3, iclass 10, count 0 2006.229.04:40:00.66#ibcon#about to read 4, iclass 10, count 0 2006.229.04:40:00.66#ibcon#read 4, iclass 10, count 0 2006.229.04:40:00.66#ibcon#about to read 5, iclass 10, count 0 2006.229.04:40:00.66#ibcon#read 5, iclass 10, count 0 2006.229.04:40:00.66#ibcon#about to read 6, iclass 10, count 0 2006.229.04:40:00.66#ibcon#read 6, iclass 10, count 0 2006.229.04:40:00.66#ibcon#end of sib2, iclass 10, count 0 2006.229.04:40:00.66#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:40:00.66#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:40:00.66#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:40:00.66#ibcon#*before write, iclass 10, count 0 2006.229.04:40:00.66#ibcon#enter sib2, iclass 10, count 0 2006.229.04:40:00.66#ibcon#flushed, iclass 10, count 0 2006.229.04:40:00.66#ibcon#about to write, iclass 10, count 0 2006.229.04:40:00.66#ibcon#wrote, iclass 10, count 0 2006.229.04:40:00.66#ibcon#about to read 3, iclass 10, count 0 2006.229.04:40:00.70#ibcon#read 3, iclass 10, count 0 2006.229.04:40:00.70#ibcon#about to read 4, iclass 10, count 0 2006.229.04:40:00.70#ibcon#read 4, iclass 10, count 0 2006.229.04:40:00.70#ibcon#about to read 5, iclass 10, count 0 2006.229.04:40:00.70#ibcon#read 5, iclass 10, count 0 2006.229.04:40:00.70#ibcon#about to read 6, iclass 10, count 0 2006.229.04:40:00.70#ibcon#read 6, iclass 10, count 0 2006.229.04:40:00.70#ibcon#end of sib2, iclass 10, count 0 2006.229.04:40:00.70#ibcon#*after write, iclass 10, count 0 2006.229.04:40:00.70#ibcon#*before return 0, iclass 10, count 0 2006.229.04:40:00.70#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:00.70#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:00.70#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:40:00.70#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:40:00.70$vck44/va=8,6 2006.229.04:40:00.70#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.04:40:00.70#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.04:40:00.70#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:00.70#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:40:00.76#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:40:00.76#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:40:00.76#ibcon#enter wrdev, iclass 12, count 2 2006.229.04:40:00.76#ibcon#first serial, iclass 12, count 2 2006.229.04:40:00.76#ibcon#enter sib2, iclass 12, count 2 2006.229.04:40:00.76#ibcon#flushed, iclass 12, count 2 2006.229.04:40:00.76#ibcon#about to write, iclass 12, count 2 2006.229.04:40:00.76#ibcon#wrote, iclass 12, count 2 2006.229.04:40:00.76#ibcon#about to read 3, iclass 12, count 2 2006.229.04:40:00.78#ibcon#read 3, iclass 12, count 2 2006.229.04:40:00.78#ibcon#about to read 4, iclass 12, count 2 2006.229.04:40:00.78#ibcon#read 4, iclass 12, count 2 2006.229.04:40:00.78#ibcon#about to read 5, iclass 12, count 2 2006.229.04:40:00.78#ibcon#read 5, iclass 12, count 2 2006.229.04:40:00.78#ibcon#about to read 6, iclass 12, count 2 2006.229.04:40:00.78#ibcon#read 6, iclass 12, count 2 2006.229.04:40:00.78#ibcon#end of sib2, iclass 12, count 2 2006.229.04:40:00.78#ibcon#*mode == 0, iclass 12, count 2 2006.229.04:40:00.78#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.04:40:00.78#ibcon#[25=AT08-06\r\n] 2006.229.04:40:00.78#ibcon#*before write, iclass 12, count 2 2006.229.04:40:00.78#ibcon#enter sib2, iclass 12, count 2 2006.229.04:40:00.78#ibcon#flushed, iclass 12, count 2 2006.229.04:40:00.78#ibcon#about to write, iclass 12, count 2 2006.229.04:40:00.78#ibcon#wrote, iclass 12, count 2 2006.229.04:40:00.78#ibcon#about to read 3, iclass 12, count 2 2006.229.04:40:00.81#ibcon#read 3, iclass 12, count 2 2006.229.04:40:00.81#ibcon#about to read 4, iclass 12, count 2 2006.229.04:40:00.81#ibcon#read 4, iclass 12, count 2 2006.229.04:40:00.81#ibcon#about to read 5, iclass 12, count 2 2006.229.04:40:00.81#ibcon#read 5, iclass 12, count 2 2006.229.04:40:00.81#ibcon#about to read 6, iclass 12, count 2 2006.229.04:40:00.81#ibcon#read 6, iclass 12, count 2 2006.229.04:40:00.81#ibcon#end of sib2, iclass 12, count 2 2006.229.04:40:00.81#ibcon#*after write, iclass 12, count 2 2006.229.04:40:00.81#ibcon#*before return 0, iclass 12, count 2 2006.229.04:40:00.81#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:40:00.81#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.04:40:00.81#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.04:40:00.81#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:00.81#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:40:00.93#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:40:00.93#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:40:00.93#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:40:00.93#ibcon#first serial, iclass 12, count 0 2006.229.04:40:00.93#ibcon#enter sib2, iclass 12, count 0 2006.229.04:40:00.93#ibcon#flushed, iclass 12, count 0 2006.229.04:40:00.93#ibcon#about to write, iclass 12, count 0 2006.229.04:40:00.93#ibcon#wrote, iclass 12, count 0 2006.229.04:40:00.93#ibcon#about to read 3, iclass 12, count 0 2006.229.04:40:00.95#ibcon#read 3, iclass 12, count 0 2006.229.04:40:00.95#ibcon#about to read 4, iclass 12, count 0 2006.229.04:40:00.95#ibcon#read 4, iclass 12, count 0 2006.229.04:40:00.95#ibcon#about to read 5, iclass 12, count 0 2006.229.04:40:00.95#ibcon#read 5, iclass 12, count 0 2006.229.04:40:00.95#ibcon#about to read 6, iclass 12, count 0 2006.229.04:40:00.95#ibcon#read 6, iclass 12, count 0 2006.229.04:40:00.95#ibcon#end of sib2, iclass 12, count 0 2006.229.04:40:00.95#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:40:00.95#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:40:00.95#ibcon#[25=USB\r\n] 2006.229.04:40:00.95#ibcon#*before write, iclass 12, count 0 2006.229.04:40:00.95#ibcon#enter sib2, iclass 12, count 0 2006.229.04:40:00.95#ibcon#flushed, iclass 12, count 0 2006.229.04:40:00.95#ibcon#about to write, iclass 12, count 0 2006.229.04:40:00.95#ibcon#wrote, iclass 12, count 0 2006.229.04:40:00.95#ibcon#about to read 3, iclass 12, count 0 2006.229.04:40:00.98#ibcon#read 3, iclass 12, count 0 2006.229.04:40:00.98#ibcon#about to read 4, iclass 12, count 0 2006.229.04:40:00.98#ibcon#read 4, iclass 12, count 0 2006.229.04:40:00.98#ibcon#about to read 5, iclass 12, count 0 2006.229.04:40:00.98#ibcon#read 5, iclass 12, count 0 2006.229.04:40:00.98#ibcon#about to read 6, iclass 12, count 0 2006.229.04:40:00.98#ibcon#read 6, iclass 12, count 0 2006.229.04:40:00.98#ibcon#end of sib2, iclass 12, count 0 2006.229.04:40:00.98#ibcon#*after write, iclass 12, count 0 2006.229.04:40:00.98#ibcon#*before return 0, iclass 12, count 0 2006.229.04:40:00.98#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:40:00.98#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.04:40:00.98#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:40:00.98#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:40:00.98$vck44/vblo=1,629.99 2006.229.04:40:00.98#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.04:40:00.98#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.04:40:00.98#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:00.98#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:40:00.98#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:40:00.98#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:40:00.98#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:40:00.98#ibcon#first serial, iclass 14, count 0 2006.229.04:40:00.98#ibcon#enter sib2, iclass 14, count 0 2006.229.04:40:00.98#ibcon#flushed, iclass 14, count 0 2006.229.04:40:00.98#ibcon#about to write, iclass 14, count 0 2006.229.04:40:00.98#ibcon#wrote, iclass 14, count 0 2006.229.04:40:00.98#ibcon#about to read 3, iclass 14, count 0 2006.229.04:40:01.00#ibcon#read 3, iclass 14, count 0 2006.229.04:40:01.00#ibcon#about to read 4, iclass 14, count 0 2006.229.04:40:01.00#ibcon#read 4, iclass 14, count 0 2006.229.04:40:01.00#ibcon#about to read 5, iclass 14, count 0 2006.229.04:40:01.00#ibcon#read 5, iclass 14, count 0 2006.229.04:40:01.00#ibcon#about to read 6, iclass 14, count 0 2006.229.04:40:01.00#ibcon#read 6, iclass 14, count 0 2006.229.04:40:01.00#ibcon#end of sib2, iclass 14, count 0 2006.229.04:40:01.00#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:40:01.00#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:40:01.00#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:40:01.00#ibcon#*before write, iclass 14, count 0 2006.229.04:40:01.00#ibcon#enter sib2, iclass 14, count 0 2006.229.04:40:01.00#ibcon#flushed, iclass 14, count 0 2006.229.04:40:01.00#ibcon#about to write, iclass 14, count 0 2006.229.04:40:01.00#ibcon#wrote, iclass 14, count 0 2006.229.04:40:01.00#ibcon#about to read 3, iclass 14, count 0 2006.229.04:40:01.04#ibcon#read 3, iclass 14, count 0 2006.229.04:40:01.04#ibcon#about to read 4, iclass 14, count 0 2006.229.04:40:01.04#ibcon#read 4, iclass 14, count 0 2006.229.04:40:01.04#ibcon#about to read 5, iclass 14, count 0 2006.229.04:40:01.04#ibcon#read 5, iclass 14, count 0 2006.229.04:40:01.04#ibcon#about to read 6, iclass 14, count 0 2006.229.04:40:01.04#ibcon#read 6, iclass 14, count 0 2006.229.04:40:01.04#ibcon#end of sib2, iclass 14, count 0 2006.229.04:40:01.04#ibcon#*after write, iclass 14, count 0 2006.229.04:40:01.04#ibcon#*before return 0, iclass 14, count 0 2006.229.04:40:01.04#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:40:01.04#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.04:40:01.04#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:40:01.04#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:40:01.04$vck44/vb=1,4 2006.229.04:40:01.04#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.04:40:01.04#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.04:40:01.04#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:01.04#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:40:01.04#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:40:01.04#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:40:01.04#ibcon#enter wrdev, iclass 16, count 2 2006.229.04:40:01.04#ibcon#first serial, iclass 16, count 2 2006.229.04:40:01.04#ibcon#enter sib2, iclass 16, count 2 2006.229.04:40:01.04#ibcon#flushed, iclass 16, count 2 2006.229.04:40:01.04#ibcon#about to write, iclass 16, count 2 2006.229.04:40:01.04#ibcon#wrote, iclass 16, count 2 2006.229.04:40:01.04#ibcon#about to read 3, iclass 16, count 2 2006.229.04:40:01.06#ibcon#read 3, iclass 16, count 2 2006.229.04:40:01.06#ibcon#about to read 4, iclass 16, count 2 2006.229.04:40:01.06#ibcon#read 4, iclass 16, count 2 2006.229.04:40:01.06#ibcon#about to read 5, iclass 16, count 2 2006.229.04:40:01.06#ibcon#read 5, iclass 16, count 2 2006.229.04:40:01.06#ibcon#about to read 6, iclass 16, count 2 2006.229.04:40:01.06#ibcon#read 6, iclass 16, count 2 2006.229.04:40:01.06#ibcon#end of sib2, iclass 16, count 2 2006.229.04:40:01.06#ibcon#*mode == 0, iclass 16, count 2 2006.229.04:40:01.06#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.04:40:01.06#ibcon#[27=AT01-04\r\n] 2006.229.04:40:01.06#ibcon#*before write, iclass 16, count 2 2006.229.04:40:01.06#ibcon#enter sib2, iclass 16, count 2 2006.229.04:40:01.06#ibcon#flushed, iclass 16, count 2 2006.229.04:40:01.06#ibcon#about to write, iclass 16, count 2 2006.229.04:40:01.06#ibcon#wrote, iclass 16, count 2 2006.229.04:40:01.06#ibcon#about to read 3, iclass 16, count 2 2006.229.04:40:01.09#ibcon#read 3, iclass 16, count 2 2006.229.04:40:01.09#ibcon#about to read 4, iclass 16, count 2 2006.229.04:40:01.09#ibcon#read 4, iclass 16, count 2 2006.229.04:40:01.09#ibcon#about to read 5, iclass 16, count 2 2006.229.04:40:01.09#ibcon#read 5, iclass 16, count 2 2006.229.04:40:01.09#ibcon#about to read 6, iclass 16, count 2 2006.229.04:40:01.09#ibcon#read 6, iclass 16, count 2 2006.229.04:40:01.09#ibcon#end of sib2, iclass 16, count 2 2006.229.04:40:01.09#ibcon#*after write, iclass 16, count 2 2006.229.04:40:01.09#ibcon#*before return 0, iclass 16, count 2 2006.229.04:40:01.09#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:40:01.09#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.04:40:01.09#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.04:40:01.09#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:01.09#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:40:01.21#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:40:01.21#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:40:01.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:40:01.21#ibcon#first serial, iclass 16, count 0 2006.229.04:40:01.21#ibcon#enter sib2, iclass 16, count 0 2006.229.04:40:01.21#ibcon#flushed, iclass 16, count 0 2006.229.04:40:01.21#ibcon#about to write, iclass 16, count 0 2006.229.04:40:01.21#ibcon#wrote, iclass 16, count 0 2006.229.04:40:01.21#ibcon#about to read 3, iclass 16, count 0 2006.229.04:40:01.23#ibcon#read 3, iclass 16, count 0 2006.229.04:40:01.23#ibcon#about to read 4, iclass 16, count 0 2006.229.04:40:01.23#ibcon#read 4, iclass 16, count 0 2006.229.04:40:01.23#ibcon#about to read 5, iclass 16, count 0 2006.229.04:40:01.23#ibcon#read 5, iclass 16, count 0 2006.229.04:40:01.23#ibcon#about to read 6, iclass 16, count 0 2006.229.04:40:01.23#ibcon#read 6, iclass 16, count 0 2006.229.04:40:01.23#ibcon#end of sib2, iclass 16, count 0 2006.229.04:40:01.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:40:01.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:40:01.23#ibcon#[27=USB\r\n] 2006.229.04:40:01.23#ibcon#*before write, iclass 16, count 0 2006.229.04:40:01.23#ibcon#enter sib2, iclass 16, count 0 2006.229.04:40:01.23#ibcon#flushed, iclass 16, count 0 2006.229.04:40:01.23#ibcon#about to write, iclass 16, count 0 2006.229.04:40:01.23#ibcon#wrote, iclass 16, count 0 2006.229.04:40:01.23#ibcon#about to read 3, iclass 16, count 0 2006.229.04:40:01.26#ibcon#read 3, iclass 16, count 0 2006.229.04:40:01.26#ibcon#about to read 4, iclass 16, count 0 2006.229.04:40:01.26#ibcon#read 4, iclass 16, count 0 2006.229.04:40:01.26#ibcon#about to read 5, iclass 16, count 0 2006.229.04:40:01.26#ibcon#read 5, iclass 16, count 0 2006.229.04:40:01.26#ibcon#about to read 6, iclass 16, count 0 2006.229.04:40:01.26#ibcon#read 6, iclass 16, count 0 2006.229.04:40:01.26#ibcon#end of sib2, iclass 16, count 0 2006.229.04:40:01.26#ibcon#*after write, iclass 16, count 0 2006.229.04:40:01.26#ibcon#*before return 0, iclass 16, count 0 2006.229.04:40:01.26#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:40:01.26#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.04:40:01.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:40:01.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:40:01.26$vck44/vblo=2,634.99 2006.229.04:40:01.26#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.04:40:01.26#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.04:40:01.26#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:01.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:40:01.26#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:40:01.26#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:40:01.26#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:40:01.26#ibcon#first serial, iclass 18, count 0 2006.229.04:40:01.26#ibcon#enter sib2, iclass 18, count 0 2006.229.04:40:01.26#ibcon#flushed, iclass 18, count 0 2006.229.04:40:01.26#ibcon#about to write, iclass 18, count 0 2006.229.04:40:01.26#ibcon#wrote, iclass 18, count 0 2006.229.04:40:01.26#ibcon#about to read 3, iclass 18, count 0 2006.229.04:40:01.28#ibcon#read 3, iclass 18, count 0 2006.229.04:40:01.28#ibcon#about to read 4, iclass 18, count 0 2006.229.04:40:01.28#ibcon#read 4, iclass 18, count 0 2006.229.04:40:01.28#ibcon#about to read 5, iclass 18, count 0 2006.229.04:40:01.28#ibcon#read 5, iclass 18, count 0 2006.229.04:40:01.28#ibcon#about to read 6, iclass 18, count 0 2006.229.04:40:01.28#ibcon#read 6, iclass 18, count 0 2006.229.04:40:01.28#ibcon#end of sib2, iclass 18, count 0 2006.229.04:40:01.28#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:40:01.28#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:40:01.28#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:40:01.28#ibcon#*before write, iclass 18, count 0 2006.229.04:40:01.28#ibcon#enter sib2, iclass 18, count 0 2006.229.04:40:01.28#ibcon#flushed, iclass 18, count 0 2006.229.04:40:01.28#ibcon#about to write, iclass 18, count 0 2006.229.04:40:01.28#ibcon#wrote, iclass 18, count 0 2006.229.04:40:01.28#ibcon#about to read 3, iclass 18, count 0 2006.229.04:40:01.32#ibcon#read 3, iclass 18, count 0 2006.229.04:40:01.32#ibcon#about to read 4, iclass 18, count 0 2006.229.04:40:01.32#ibcon#read 4, iclass 18, count 0 2006.229.04:40:01.32#ibcon#about to read 5, iclass 18, count 0 2006.229.04:40:01.32#ibcon#read 5, iclass 18, count 0 2006.229.04:40:01.32#ibcon#about to read 6, iclass 18, count 0 2006.229.04:40:01.32#ibcon#read 6, iclass 18, count 0 2006.229.04:40:01.32#ibcon#end of sib2, iclass 18, count 0 2006.229.04:40:01.32#ibcon#*after write, iclass 18, count 0 2006.229.04:40:01.32#ibcon#*before return 0, iclass 18, count 0 2006.229.04:40:01.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:40:01.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.04:40:01.32#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:40:01.32#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:40:01.32$vck44/vb=2,4 2006.229.04:40:01.32#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.04:40:01.32#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.04:40:01.32#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:01.32#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:40:01.38#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:40:01.38#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:40:01.38#ibcon#enter wrdev, iclass 20, count 2 2006.229.04:40:01.38#ibcon#first serial, iclass 20, count 2 2006.229.04:40:01.38#ibcon#enter sib2, iclass 20, count 2 2006.229.04:40:01.38#ibcon#flushed, iclass 20, count 2 2006.229.04:40:01.38#ibcon#about to write, iclass 20, count 2 2006.229.04:40:01.38#ibcon#wrote, iclass 20, count 2 2006.229.04:40:01.38#ibcon#about to read 3, iclass 20, count 2 2006.229.04:40:01.40#ibcon#read 3, iclass 20, count 2 2006.229.04:40:01.40#ibcon#about to read 4, iclass 20, count 2 2006.229.04:40:01.40#ibcon#read 4, iclass 20, count 2 2006.229.04:40:01.40#ibcon#about to read 5, iclass 20, count 2 2006.229.04:40:01.40#ibcon#read 5, iclass 20, count 2 2006.229.04:40:01.40#ibcon#about to read 6, iclass 20, count 2 2006.229.04:40:01.40#ibcon#read 6, iclass 20, count 2 2006.229.04:40:01.40#ibcon#end of sib2, iclass 20, count 2 2006.229.04:40:01.40#ibcon#*mode == 0, iclass 20, count 2 2006.229.04:40:01.40#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.04:40:01.40#ibcon#[27=AT02-04\r\n] 2006.229.04:40:01.40#ibcon#*before write, iclass 20, count 2 2006.229.04:40:01.40#ibcon#enter sib2, iclass 20, count 2 2006.229.04:40:01.40#ibcon#flushed, iclass 20, count 2 2006.229.04:40:01.40#ibcon#about to write, iclass 20, count 2 2006.229.04:40:01.40#ibcon#wrote, iclass 20, count 2 2006.229.04:40:01.40#ibcon#about to read 3, iclass 20, count 2 2006.229.04:40:01.43#ibcon#read 3, iclass 20, count 2 2006.229.04:40:01.43#ibcon#about to read 4, iclass 20, count 2 2006.229.04:40:01.43#ibcon#read 4, iclass 20, count 2 2006.229.04:40:01.43#ibcon#about to read 5, iclass 20, count 2 2006.229.04:40:01.43#ibcon#read 5, iclass 20, count 2 2006.229.04:40:01.43#ibcon#about to read 6, iclass 20, count 2 2006.229.04:40:01.43#ibcon#read 6, iclass 20, count 2 2006.229.04:40:01.43#ibcon#end of sib2, iclass 20, count 2 2006.229.04:40:01.43#ibcon#*after write, iclass 20, count 2 2006.229.04:40:01.43#ibcon#*before return 0, iclass 20, count 2 2006.229.04:40:01.43#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:40:01.43#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.04:40:01.43#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.04:40:01.43#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:01.43#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:40:01.55#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:40:01.55#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:40:01.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:40:01.55#ibcon#first serial, iclass 20, count 0 2006.229.04:40:01.55#ibcon#enter sib2, iclass 20, count 0 2006.229.04:40:01.55#ibcon#flushed, iclass 20, count 0 2006.229.04:40:01.55#ibcon#about to write, iclass 20, count 0 2006.229.04:40:01.55#ibcon#wrote, iclass 20, count 0 2006.229.04:40:01.55#ibcon#about to read 3, iclass 20, count 0 2006.229.04:40:01.57#ibcon#read 3, iclass 20, count 0 2006.229.04:40:01.57#ibcon#about to read 4, iclass 20, count 0 2006.229.04:40:01.57#ibcon#read 4, iclass 20, count 0 2006.229.04:40:01.57#ibcon#about to read 5, iclass 20, count 0 2006.229.04:40:01.57#ibcon#read 5, iclass 20, count 0 2006.229.04:40:01.57#ibcon#about to read 6, iclass 20, count 0 2006.229.04:40:01.57#ibcon#read 6, iclass 20, count 0 2006.229.04:40:01.57#ibcon#end of sib2, iclass 20, count 0 2006.229.04:40:01.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:40:01.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:40:01.57#ibcon#[27=USB\r\n] 2006.229.04:40:01.57#ibcon#*before write, iclass 20, count 0 2006.229.04:40:01.57#ibcon#enter sib2, iclass 20, count 0 2006.229.04:40:01.57#ibcon#flushed, iclass 20, count 0 2006.229.04:40:01.57#ibcon#about to write, iclass 20, count 0 2006.229.04:40:01.57#ibcon#wrote, iclass 20, count 0 2006.229.04:40:01.57#ibcon#about to read 3, iclass 20, count 0 2006.229.04:40:01.60#ibcon#read 3, iclass 20, count 0 2006.229.04:40:01.60#ibcon#about to read 4, iclass 20, count 0 2006.229.04:40:01.60#ibcon#read 4, iclass 20, count 0 2006.229.04:40:01.60#ibcon#about to read 5, iclass 20, count 0 2006.229.04:40:01.60#ibcon#read 5, iclass 20, count 0 2006.229.04:40:01.60#ibcon#about to read 6, iclass 20, count 0 2006.229.04:40:01.60#ibcon#read 6, iclass 20, count 0 2006.229.04:40:01.60#ibcon#end of sib2, iclass 20, count 0 2006.229.04:40:01.60#ibcon#*after write, iclass 20, count 0 2006.229.04:40:01.60#ibcon#*before return 0, iclass 20, count 0 2006.229.04:40:01.60#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:40:01.60#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.04:40:01.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:40:01.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:40:01.60$vck44/vblo=3,649.99 2006.229.04:40:01.60#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.04:40:01.60#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.04:40:01.60#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:01.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:40:01.60#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:40:01.60#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:40:01.60#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:40:01.60#ibcon#first serial, iclass 22, count 0 2006.229.04:40:01.60#ibcon#enter sib2, iclass 22, count 0 2006.229.04:40:01.60#ibcon#flushed, iclass 22, count 0 2006.229.04:40:01.60#ibcon#about to write, iclass 22, count 0 2006.229.04:40:01.60#ibcon#wrote, iclass 22, count 0 2006.229.04:40:01.60#ibcon#about to read 3, iclass 22, count 0 2006.229.04:40:01.62#ibcon#read 3, iclass 22, count 0 2006.229.04:40:01.62#ibcon#about to read 4, iclass 22, count 0 2006.229.04:40:01.62#ibcon#read 4, iclass 22, count 0 2006.229.04:40:01.62#ibcon#about to read 5, iclass 22, count 0 2006.229.04:40:01.62#ibcon#read 5, iclass 22, count 0 2006.229.04:40:01.62#ibcon#about to read 6, iclass 22, count 0 2006.229.04:40:01.62#ibcon#read 6, iclass 22, count 0 2006.229.04:40:01.62#ibcon#end of sib2, iclass 22, count 0 2006.229.04:40:01.62#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:40:01.62#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:40:01.62#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:40:01.62#ibcon#*before write, iclass 22, count 0 2006.229.04:40:01.62#ibcon#enter sib2, iclass 22, count 0 2006.229.04:40:01.62#ibcon#flushed, iclass 22, count 0 2006.229.04:40:01.62#ibcon#about to write, iclass 22, count 0 2006.229.04:40:01.62#ibcon#wrote, iclass 22, count 0 2006.229.04:40:01.62#ibcon#about to read 3, iclass 22, count 0 2006.229.04:40:01.66#ibcon#read 3, iclass 22, count 0 2006.229.04:40:01.66#ibcon#about to read 4, iclass 22, count 0 2006.229.04:40:01.66#ibcon#read 4, iclass 22, count 0 2006.229.04:40:01.66#ibcon#about to read 5, iclass 22, count 0 2006.229.04:40:01.66#ibcon#read 5, iclass 22, count 0 2006.229.04:40:01.66#ibcon#about to read 6, iclass 22, count 0 2006.229.04:40:01.66#ibcon#read 6, iclass 22, count 0 2006.229.04:40:01.66#ibcon#end of sib2, iclass 22, count 0 2006.229.04:40:01.66#ibcon#*after write, iclass 22, count 0 2006.229.04:40:01.66#ibcon#*before return 0, iclass 22, count 0 2006.229.04:40:01.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:40:01.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.04:40:01.66#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:40:01.66#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:40:01.66$vck44/vb=3,4 2006.229.04:40:01.66#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.04:40:01.66#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.04:40:01.66#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:01.66#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:40:01.72#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:40:01.72#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:40:01.72#ibcon#enter wrdev, iclass 24, count 2 2006.229.04:40:01.72#ibcon#first serial, iclass 24, count 2 2006.229.04:40:01.72#ibcon#enter sib2, iclass 24, count 2 2006.229.04:40:01.72#ibcon#flushed, iclass 24, count 2 2006.229.04:40:01.72#ibcon#about to write, iclass 24, count 2 2006.229.04:40:01.72#ibcon#wrote, iclass 24, count 2 2006.229.04:40:01.72#ibcon#about to read 3, iclass 24, count 2 2006.229.04:40:01.74#ibcon#read 3, iclass 24, count 2 2006.229.04:40:01.74#ibcon#about to read 4, iclass 24, count 2 2006.229.04:40:01.74#ibcon#read 4, iclass 24, count 2 2006.229.04:40:01.74#ibcon#about to read 5, iclass 24, count 2 2006.229.04:40:01.74#ibcon#read 5, iclass 24, count 2 2006.229.04:40:01.74#ibcon#about to read 6, iclass 24, count 2 2006.229.04:40:01.74#ibcon#read 6, iclass 24, count 2 2006.229.04:40:01.74#ibcon#end of sib2, iclass 24, count 2 2006.229.04:40:01.74#ibcon#*mode == 0, iclass 24, count 2 2006.229.04:40:01.74#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.04:40:01.74#ibcon#[27=AT03-04\r\n] 2006.229.04:40:01.74#ibcon#*before write, iclass 24, count 2 2006.229.04:40:01.74#ibcon#enter sib2, iclass 24, count 2 2006.229.04:40:01.74#ibcon#flushed, iclass 24, count 2 2006.229.04:40:01.74#ibcon#about to write, iclass 24, count 2 2006.229.04:40:01.74#ibcon#wrote, iclass 24, count 2 2006.229.04:40:01.74#ibcon#about to read 3, iclass 24, count 2 2006.229.04:40:01.77#ibcon#read 3, iclass 24, count 2 2006.229.04:40:01.77#ibcon#about to read 4, iclass 24, count 2 2006.229.04:40:01.77#ibcon#read 4, iclass 24, count 2 2006.229.04:40:01.77#ibcon#about to read 5, iclass 24, count 2 2006.229.04:40:01.77#ibcon#read 5, iclass 24, count 2 2006.229.04:40:01.77#ibcon#about to read 6, iclass 24, count 2 2006.229.04:40:01.77#ibcon#read 6, iclass 24, count 2 2006.229.04:40:01.77#ibcon#end of sib2, iclass 24, count 2 2006.229.04:40:01.77#ibcon#*after write, iclass 24, count 2 2006.229.04:40:01.77#ibcon#*before return 0, iclass 24, count 2 2006.229.04:40:01.77#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:40:01.77#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.04:40:01.77#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.04:40:01.77#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:01.77#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:40:01.89#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:40:01.89#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:40:01.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:40:01.89#ibcon#first serial, iclass 24, count 0 2006.229.04:40:01.89#ibcon#enter sib2, iclass 24, count 0 2006.229.04:40:01.89#ibcon#flushed, iclass 24, count 0 2006.229.04:40:01.89#ibcon#about to write, iclass 24, count 0 2006.229.04:40:01.89#ibcon#wrote, iclass 24, count 0 2006.229.04:40:01.89#ibcon#about to read 3, iclass 24, count 0 2006.229.04:40:01.91#ibcon#read 3, iclass 24, count 0 2006.229.04:40:01.91#ibcon#about to read 4, iclass 24, count 0 2006.229.04:40:01.91#ibcon#read 4, iclass 24, count 0 2006.229.04:40:01.91#ibcon#about to read 5, iclass 24, count 0 2006.229.04:40:01.91#ibcon#read 5, iclass 24, count 0 2006.229.04:40:01.91#ibcon#about to read 6, iclass 24, count 0 2006.229.04:40:01.91#ibcon#read 6, iclass 24, count 0 2006.229.04:40:01.91#ibcon#end of sib2, iclass 24, count 0 2006.229.04:40:01.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:40:01.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:40:01.91#ibcon#[27=USB\r\n] 2006.229.04:40:01.91#ibcon#*before write, iclass 24, count 0 2006.229.04:40:01.91#ibcon#enter sib2, iclass 24, count 0 2006.229.04:40:01.91#ibcon#flushed, iclass 24, count 0 2006.229.04:40:01.91#ibcon#about to write, iclass 24, count 0 2006.229.04:40:01.91#ibcon#wrote, iclass 24, count 0 2006.229.04:40:01.91#ibcon#about to read 3, iclass 24, count 0 2006.229.04:40:01.94#ibcon#read 3, iclass 24, count 0 2006.229.04:40:01.94#ibcon#about to read 4, iclass 24, count 0 2006.229.04:40:01.94#ibcon#read 4, iclass 24, count 0 2006.229.04:40:01.94#ibcon#about to read 5, iclass 24, count 0 2006.229.04:40:01.94#ibcon#read 5, iclass 24, count 0 2006.229.04:40:01.94#ibcon#about to read 6, iclass 24, count 0 2006.229.04:40:01.94#ibcon#read 6, iclass 24, count 0 2006.229.04:40:01.94#ibcon#end of sib2, iclass 24, count 0 2006.229.04:40:01.94#ibcon#*after write, iclass 24, count 0 2006.229.04:40:01.94#ibcon#*before return 0, iclass 24, count 0 2006.229.04:40:01.94#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:40:01.94#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.04:40:01.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:40:01.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:40:01.94$vck44/vblo=4,679.99 2006.229.04:40:01.94#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.04:40:01.94#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.04:40:01.94#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:01.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:40:01.94#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:40:01.94#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:40:01.94#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:40:01.94#ibcon#first serial, iclass 26, count 0 2006.229.04:40:01.94#ibcon#enter sib2, iclass 26, count 0 2006.229.04:40:01.94#ibcon#flushed, iclass 26, count 0 2006.229.04:40:01.94#ibcon#about to write, iclass 26, count 0 2006.229.04:40:01.94#ibcon#wrote, iclass 26, count 0 2006.229.04:40:01.94#ibcon#about to read 3, iclass 26, count 0 2006.229.04:40:01.96#ibcon#read 3, iclass 26, count 0 2006.229.04:40:01.96#ibcon#about to read 4, iclass 26, count 0 2006.229.04:40:01.96#ibcon#read 4, iclass 26, count 0 2006.229.04:40:01.96#ibcon#about to read 5, iclass 26, count 0 2006.229.04:40:01.96#ibcon#read 5, iclass 26, count 0 2006.229.04:40:01.96#ibcon#about to read 6, iclass 26, count 0 2006.229.04:40:01.96#ibcon#read 6, iclass 26, count 0 2006.229.04:40:01.96#ibcon#end of sib2, iclass 26, count 0 2006.229.04:40:01.96#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:40:01.96#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:40:01.96#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:40:01.96#ibcon#*before write, iclass 26, count 0 2006.229.04:40:01.96#ibcon#enter sib2, iclass 26, count 0 2006.229.04:40:01.96#ibcon#flushed, iclass 26, count 0 2006.229.04:40:01.96#ibcon#about to write, iclass 26, count 0 2006.229.04:40:01.96#ibcon#wrote, iclass 26, count 0 2006.229.04:40:01.96#ibcon#about to read 3, iclass 26, count 0 2006.229.04:40:02.00#ibcon#read 3, iclass 26, count 0 2006.229.04:40:02.00#ibcon#about to read 4, iclass 26, count 0 2006.229.04:40:02.00#ibcon#read 4, iclass 26, count 0 2006.229.04:40:02.00#ibcon#about to read 5, iclass 26, count 0 2006.229.04:40:02.00#ibcon#read 5, iclass 26, count 0 2006.229.04:40:02.00#ibcon#about to read 6, iclass 26, count 0 2006.229.04:40:02.00#ibcon#read 6, iclass 26, count 0 2006.229.04:40:02.00#ibcon#end of sib2, iclass 26, count 0 2006.229.04:40:02.00#ibcon#*after write, iclass 26, count 0 2006.229.04:40:02.00#ibcon#*before return 0, iclass 26, count 0 2006.229.04:40:02.00#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:40:02.00#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.04:40:02.00#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:40:02.00#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:40:02.00$vck44/vb=4,4 2006.229.04:40:02.00#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.04:40:02.00#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.04:40:02.00#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:02.00#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:40:02.06#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:40:02.06#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:40:02.06#ibcon#enter wrdev, iclass 28, count 2 2006.229.04:40:02.06#ibcon#first serial, iclass 28, count 2 2006.229.04:40:02.06#ibcon#enter sib2, iclass 28, count 2 2006.229.04:40:02.06#ibcon#flushed, iclass 28, count 2 2006.229.04:40:02.06#ibcon#about to write, iclass 28, count 2 2006.229.04:40:02.06#ibcon#wrote, iclass 28, count 2 2006.229.04:40:02.06#ibcon#about to read 3, iclass 28, count 2 2006.229.04:40:02.08#ibcon#read 3, iclass 28, count 2 2006.229.04:40:02.08#ibcon#about to read 4, iclass 28, count 2 2006.229.04:40:02.08#ibcon#read 4, iclass 28, count 2 2006.229.04:40:02.08#ibcon#about to read 5, iclass 28, count 2 2006.229.04:40:02.08#ibcon#read 5, iclass 28, count 2 2006.229.04:40:02.08#ibcon#about to read 6, iclass 28, count 2 2006.229.04:40:02.08#ibcon#read 6, iclass 28, count 2 2006.229.04:40:02.08#ibcon#end of sib2, iclass 28, count 2 2006.229.04:40:02.08#ibcon#*mode == 0, iclass 28, count 2 2006.229.04:40:02.08#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.04:40:02.08#ibcon#[27=AT04-04\r\n] 2006.229.04:40:02.08#ibcon#*before write, iclass 28, count 2 2006.229.04:40:02.08#ibcon#enter sib2, iclass 28, count 2 2006.229.04:40:02.08#ibcon#flushed, iclass 28, count 2 2006.229.04:40:02.08#ibcon#about to write, iclass 28, count 2 2006.229.04:40:02.08#ibcon#wrote, iclass 28, count 2 2006.229.04:40:02.08#ibcon#about to read 3, iclass 28, count 2 2006.229.04:40:02.11#ibcon#read 3, iclass 28, count 2 2006.229.04:40:02.11#ibcon#about to read 4, iclass 28, count 2 2006.229.04:40:02.11#ibcon#read 4, iclass 28, count 2 2006.229.04:40:02.11#ibcon#about to read 5, iclass 28, count 2 2006.229.04:40:02.11#ibcon#read 5, iclass 28, count 2 2006.229.04:40:02.11#ibcon#about to read 6, iclass 28, count 2 2006.229.04:40:02.11#ibcon#read 6, iclass 28, count 2 2006.229.04:40:02.11#ibcon#end of sib2, iclass 28, count 2 2006.229.04:40:02.11#ibcon#*after write, iclass 28, count 2 2006.229.04:40:02.11#ibcon#*before return 0, iclass 28, count 2 2006.229.04:40:02.11#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:40:02.11#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.04:40:02.11#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.04:40:02.11#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:02.11#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:40:02.23#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:40:02.23#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:40:02.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:40:02.23#ibcon#first serial, iclass 28, count 0 2006.229.04:40:02.23#ibcon#enter sib2, iclass 28, count 0 2006.229.04:40:02.23#ibcon#flushed, iclass 28, count 0 2006.229.04:40:02.23#ibcon#about to write, iclass 28, count 0 2006.229.04:40:02.23#ibcon#wrote, iclass 28, count 0 2006.229.04:40:02.23#ibcon#about to read 3, iclass 28, count 0 2006.229.04:40:02.25#ibcon#read 3, iclass 28, count 0 2006.229.04:40:02.25#ibcon#about to read 4, iclass 28, count 0 2006.229.04:40:02.25#ibcon#read 4, iclass 28, count 0 2006.229.04:40:02.25#ibcon#about to read 5, iclass 28, count 0 2006.229.04:40:02.25#ibcon#read 5, iclass 28, count 0 2006.229.04:40:02.25#ibcon#about to read 6, iclass 28, count 0 2006.229.04:40:02.25#ibcon#read 6, iclass 28, count 0 2006.229.04:40:02.25#ibcon#end of sib2, iclass 28, count 0 2006.229.04:40:02.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:40:02.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:40:02.25#ibcon#[27=USB\r\n] 2006.229.04:40:02.25#ibcon#*before write, iclass 28, count 0 2006.229.04:40:02.25#ibcon#enter sib2, iclass 28, count 0 2006.229.04:40:02.25#ibcon#flushed, iclass 28, count 0 2006.229.04:40:02.25#ibcon#about to write, iclass 28, count 0 2006.229.04:40:02.25#ibcon#wrote, iclass 28, count 0 2006.229.04:40:02.25#ibcon#about to read 3, iclass 28, count 0 2006.229.04:40:02.28#ibcon#read 3, iclass 28, count 0 2006.229.04:40:02.28#ibcon#about to read 4, iclass 28, count 0 2006.229.04:40:02.28#ibcon#read 4, iclass 28, count 0 2006.229.04:40:02.28#ibcon#about to read 5, iclass 28, count 0 2006.229.04:40:02.28#ibcon#read 5, iclass 28, count 0 2006.229.04:40:02.28#ibcon#about to read 6, iclass 28, count 0 2006.229.04:40:02.28#ibcon#read 6, iclass 28, count 0 2006.229.04:40:02.28#ibcon#end of sib2, iclass 28, count 0 2006.229.04:40:02.28#ibcon#*after write, iclass 28, count 0 2006.229.04:40:02.28#ibcon#*before return 0, iclass 28, count 0 2006.229.04:40:02.28#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:40:02.28#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.04:40:02.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:40:02.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:40:02.28$vck44/vblo=5,709.99 2006.229.04:40:02.28#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.04:40:02.28#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.04:40:02.28#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:02.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:40:02.28#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:40:02.28#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:40:02.28#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:40:02.28#ibcon#first serial, iclass 30, count 0 2006.229.04:40:02.28#ibcon#enter sib2, iclass 30, count 0 2006.229.04:40:02.28#ibcon#flushed, iclass 30, count 0 2006.229.04:40:02.28#ibcon#about to write, iclass 30, count 0 2006.229.04:40:02.28#ibcon#wrote, iclass 30, count 0 2006.229.04:40:02.28#ibcon#about to read 3, iclass 30, count 0 2006.229.04:40:02.30#ibcon#read 3, iclass 30, count 0 2006.229.04:40:02.30#ibcon#about to read 4, iclass 30, count 0 2006.229.04:40:02.30#ibcon#read 4, iclass 30, count 0 2006.229.04:40:02.30#ibcon#about to read 5, iclass 30, count 0 2006.229.04:40:02.30#ibcon#read 5, iclass 30, count 0 2006.229.04:40:02.30#ibcon#about to read 6, iclass 30, count 0 2006.229.04:40:02.30#ibcon#read 6, iclass 30, count 0 2006.229.04:40:02.30#ibcon#end of sib2, iclass 30, count 0 2006.229.04:40:02.30#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:40:02.30#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:40:02.30#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:40:02.30#ibcon#*before write, iclass 30, count 0 2006.229.04:40:02.30#ibcon#enter sib2, iclass 30, count 0 2006.229.04:40:02.30#ibcon#flushed, iclass 30, count 0 2006.229.04:40:02.30#ibcon#about to write, iclass 30, count 0 2006.229.04:40:02.30#ibcon#wrote, iclass 30, count 0 2006.229.04:40:02.30#ibcon#about to read 3, iclass 30, count 0 2006.229.04:40:02.34#ibcon#read 3, iclass 30, count 0 2006.229.04:40:02.34#ibcon#about to read 4, iclass 30, count 0 2006.229.04:40:02.34#ibcon#read 4, iclass 30, count 0 2006.229.04:40:02.34#ibcon#about to read 5, iclass 30, count 0 2006.229.04:40:02.34#ibcon#read 5, iclass 30, count 0 2006.229.04:40:02.34#ibcon#about to read 6, iclass 30, count 0 2006.229.04:40:02.34#ibcon#read 6, iclass 30, count 0 2006.229.04:40:02.34#ibcon#end of sib2, iclass 30, count 0 2006.229.04:40:02.34#ibcon#*after write, iclass 30, count 0 2006.229.04:40:02.34#ibcon#*before return 0, iclass 30, count 0 2006.229.04:40:02.34#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:40:02.34#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.04:40:02.34#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:40:02.34#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:40:02.34$vck44/vb=5,4 2006.229.04:40:02.34#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.04:40:02.34#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.04:40:02.34#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:02.34#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:40:02.40#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:40:02.40#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:40:02.40#ibcon#enter wrdev, iclass 32, count 2 2006.229.04:40:02.40#ibcon#first serial, iclass 32, count 2 2006.229.04:40:02.40#ibcon#enter sib2, iclass 32, count 2 2006.229.04:40:02.40#ibcon#flushed, iclass 32, count 2 2006.229.04:40:02.40#ibcon#about to write, iclass 32, count 2 2006.229.04:40:02.40#ibcon#wrote, iclass 32, count 2 2006.229.04:40:02.40#ibcon#about to read 3, iclass 32, count 2 2006.229.04:40:02.42#ibcon#read 3, iclass 32, count 2 2006.229.04:40:02.42#ibcon#about to read 4, iclass 32, count 2 2006.229.04:40:02.42#ibcon#read 4, iclass 32, count 2 2006.229.04:40:02.42#ibcon#about to read 5, iclass 32, count 2 2006.229.04:40:02.42#ibcon#read 5, iclass 32, count 2 2006.229.04:40:02.42#ibcon#about to read 6, iclass 32, count 2 2006.229.04:40:02.42#ibcon#read 6, iclass 32, count 2 2006.229.04:40:02.42#ibcon#end of sib2, iclass 32, count 2 2006.229.04:40:02.42#ibcon#*mode == 0, iclass 32, count 2 2006.229.04:40:02.42#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.04:40:02.42#ibcon#[27=AT05-04\r\n] 2006.229.04:40:02.42#ibcon#*before write, iclass 32, count 2 2006.229.04:40:02.42#ibcon#enter sib2, iclass 32, count 2 2006.229.04:40:02.42#ibcon#flushed, iclass 32, count 2 2006.229.04:40:02.42#ibcon#about to write, iclass 32, count 2 2006.229.04:40:02.42#ibcon#wrote, iclass 32, count 2 2006.229.04:40:02.42#ibcon#about to read 3, iclass 32, count 2 2006.229.04:40:02.45#ibcon#read 3, iclass 32, count 2 2006.229.04:40:02.45#ibcon#about to read 4, iclass 32, count 2 2006.229.04:40:02.45#ibcon#read 4, iclass 32, count 2 2006.229.04:40:02.45#ibcon#about to read 5, iclass 32, count 2 2006.229.04:40:02.45#ibcon#read 5, iclass 32, count 2 2006.229.04:40:02.45#ibcon#about to read 6, iclass 32, count 2 2006.229.04:40:02.45#ibcon#read 6, iclass 32, count 2 2006.229.04:40:02.45#ibcon#end of sib2, iclass 32, count 2 2006.229.04:40:02.45#ibcon#*after write, iclass 32, count 2 2006.229.04:40:02.45#ibcon#*before return 0, iclass 32, count 2 2006.229.04:40:02.45#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:40:02.45#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.04:40:02.45#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.04:40:02.45#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:02.45#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:40:02.57#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:40:02.57#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:40:02.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:40:02.57#ibcon#first serial, iclass 32, count 0 2006.229.04:40:02.57#ibcon#enter sib2, iclass 32, count 0 2006.229.04:40:02.57#ibcon#flushed, iclass 32, count 0 2006.229.04:40:02.57#ibcon#about to write, iclass 32, count 0 2006.229.04:40:02.57#ibcon#wrote, iclass 32, count 0 2006.229.04:40:02.57#ibcon#about to read 3, iclass 32, count 0 2006.229.04:40:02.59#ibcon#read 3, iclass 32, count 0 2006.229.04:40:02.59#ibcon#about to read 4, iclass 32, count 0 2006.229.04:40:02.59#ibcon#read 4, iclass 32, count 0 2006.229.04:40:02.59#ibcon#about to read 5, iclass 32, count 0 2006.229.04:40:02.59#ibcon#read 5, iclass 32, count 0 2006.229.04:40:02.59#ibcon#about to read 6, iclass 32, count 0 2006.229.04:40:02.59#ibcon#read 6, iclass 32, count 0 2006.229.04:40:02.59#ibcon#end of sib2, iclass 32, count 0 2006.229.04:40:02.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:40:02.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:40:02.59#ibcon#[27=USB\r\n] 2006.229.04:40:02.59#ibcon#*before write, iclass 32, count 0 2006.229.04:40:02.59#ibcon#enter sib2, iclass 32, count 0 2006.229.04:40:02.59#ibcon#flushed, iclass 32, count 0 2006.229.04:40:02.59#ibcon#about to write, iclass 32, count 0 2006.229.04:40:02.59#ibcon#wrote, iclass 32, count 0 2006.229.04:40:02.59#ibcon#about to read 3, iclass 32, count 0 2006.229.04:40:02.62#ibcon#read 3, iclass 32, count 0 2006.229.04:40:02.62#ibcon#about to read 4, iclass 32, count 0 2006.229.04:40:02.62#ibcon#read 4, iclass 32, count 0 2006.229.04:40:02.62#ibcon#about to read 5, iclass 32, count 0 2006.229.04:40:02.62#ibcon#read 5, iclass 32, count 0 2006.229.04:40:02.62#ibcon#about to read 6, iclass 32, count 0 2006.229.04:40:02.62#ibcon#read 6, iclass 32, count 0 2006.229.04:40:02.62#ibcon#end of sib2, iclass 32, count 0 2006.229.04:40:02.62#ibcon#*after write, iclass 32, count 0 2006.229.04:40:02.62#ibcon#*before return 0, iclass 32, count 0 2006.229.04:40:02.62#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:40:02.62#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.04:40:02.62#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:40:02.62#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:40:02.62$vck44/vblo=6,719.99 2006.229.04:40:02.62#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.04:40:02.62#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.04:40:02.62#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:02.62#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:40:02.62#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:40:02.62#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:40:02.62#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:40:02.62#ibcon#first serial, iclass 34, count 0 2006.229.04:40:02.62#ibcon#enter sib2, iclass 34, count 0 2006.229.04:40:02.62#ibcon#flushed, iclass 34, count 0 2006.229.04:40:02.62#ibcon#about to write, iclass 34, count 0 2006.229.04:40:02.62#ibcon#wrote, iclass 34, count 0 2006.229.04:40:02.62#ibcon#about to read 3, iclass 34, count 0 2006.229.04:40:02.64#ibcon#read 3, iclass 34, count 0 2006.229.04:40:02.64#ibcon#about to read 4, iclass 34, count 0 2006.229.04:40:02.64#ibcon#read 4, iclass 34, count 0 2006.229.04:40:02.64#ibcon#about to read 5, iclass 34, count 0 2006.229.04:40:02.64#ibcon#read 5, iclass 34, count 0 2006.229.04:40:02.64#ibcon#about to read 6, iclass 34, count 0 2006.229.04:40:02.64#ibcon#read 6, iclass 34, count 0 2006.229.04:40:02.64#ibcon#end of sib2, iclass 34, count 0 2006.229.04:40:02.64#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:40:02.64#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:40:02.64#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:40:02.64#ibcon#*before write, iclass 34, count 0 2006.229.04:40:02.64#ibcon#enter sib2, iclass 34, count 0 2006.229.04:40:02.64#ibcon#flushed, iclass 34, count 0 2006.229.04:40:02.64#ibcon#about to write, iclass 34, count 0 2006.229.04:40:02.64#ibcon#wrote, iclass 34, count 0 2006.229.04:40:02.64#ibcon#about to read 3, iclass 34, count 0 2006.229.04:40:02.68#ibcon#read 3, iclass 34, count 0 2006.229.04:40:02.68#ibcon#about to read 4, iclass 34, count 0 2006.229.04:40:02.68#ibcon#read 4, iclass 34, count 0 2006.229.04:40:02.68#ibcon#about to read 5, iclass 34, count 0 2006.229.04:40:02.68#ibcon#read 5, iclass 34, count 0 2006.229.04:40:02.68#ibcon#about to read 6, iclass 34, count 0 2006.229.04:40:02.68#ibcon#read 6, iclass 34, count 0 2006.229.04:40:02.68#ibcon#end of sib2, iclass 34, count 0 2006.229.04:40:02.68#ibcon#*after write, iclass 34, count 0 2006.229.04:40:02.68#ibcon#*before return 0, iclass 34, count 0 2006.229.04:40:02.68#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:40:02.68#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.04:40:02.68#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:40:02.68#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:40:02.68$vck44/vb=6,4 2006.229.04:40:02.68#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.04:40:02.68#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.04:40:02.68#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:02.68#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:40:02.74#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:40:02.74#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:40:02.74#ibcon#enter wrdev, iclass 36, count 2 2006.229.04:40:02.74#ibcon#first serial, iclass 36, count 2 2006.229.04:40:02.74#ibcon#enter sib2, iclass 36, count 2 2006.229.04:40:02.74#ibcon#flushed, iclass 36, count 2 2006.229.04:40:02.74#ibcon#about to write, iclass 36, count 2 2006.229.04:40:02.74#ibcon#wrote, iclass 36, count 2 2006.229.04:40:02.74#ibcon#about to read 3, iclass 36, count 2 2006.229.04:40:02.76#ibcon#read 3, iclass 36, count 2 2006.229.04:40:02.76#ibcon#about to read 4, iclass 36, count 2 2006.229.04:40:02.76#ibcon#read 4, iclass 36, count 2 2006.229.04:40:02.76#ibcon#about to read 5, iclass 36, count 2 2006.229.04:40:02.76#ibcon#read 5, iclass 36, count 2 2006.229.04:40:02.76#ibcon#about to read 6, iclass 36, count 2 2006.229.04:40:02.76#ibcon#read 6, iclass 36, count 2 2006.229.04:40:02.76#ibcon#end of sib2, iclass 36, count 2 2006.229.04:40:02.76#ibcon#*mode == 0, iclass 36, count 2 2006.229.04:40:02.76#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.04:40:02.76#ibcon#[27=AT06-04\r\n] 2006.229.04:40:02.76#ibcon#*before write, iclass 36, count 2 2006.229.04:40:02.76#ibcon#enter sib2, iclass 36, count 2 2006.229.04:40:02.76#ibcon#flushed, iclass 36, count 2 2006.229.04:40:02.76#ibcon#about to write, iclass 36, count 2 2006.229.04:40:02.76#ibcon#wrote, iclass 36, count 2 2006.229.04:40:02.76#ibcon#about to read 3, iclass 36, count 2 2006.229.04:40:02.79#ibcon#read 3, iclass 36, count 2 2006.229.04:40:02.79#ibcon#about to read 4, iclass 36, count 2 2006.229.04:40:02.79#ibcon#read 4, iclass 36, count 2 2006.229.04:40:02.79#ibcon#about to read 5, iclass 36, count 2 2006.229.04:40:02.79#ibcon#read 5, iclass 36, count 2 2006.229.04:40:02.79#ibcon#about to read 6, iclass 36, count 2 2006.229.04:40:02.79#ibcon#read 6, iclass 36, count 2 2006.229.04:40:02.79#ibcon#end of sib2, iclass 36, count 2 2006.229.04:40:02.79#ibcon#*after write, iclass 36, count 2 2006.229.04:40:02.79#ibcon#*before return 0, iclass 36, count 2 2006.229.04:40:02.79#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:40:02.79#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.04:40:02.79#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.04:40:02.79#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:02.79#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:40:02.91#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:40:02.91#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:40:02.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:40:02.91#ibcon#first serial, iclass 36, count 0 2006.229.04:40:02.91#ibcon#enter sib2, iclass 36, count 0 2006.229.04:40:02.91#ibcon#flushed, iclass 36, count 0 2006.229.04:40:02.91#ibcon#about to write, iclass 36, count 0 2006.229.04:40:02.91#ibcon#wrote, iclass 36, count 0 2006.229.04:40:02.91#ibcon#about to read 3, iclass 36, count 0 2006.229.04:40:02.93#ibcon#read 3, iclass 36, count 0 2006.229.04:40:02.93#ibcon#about to read 4, iclass 36, count 0 2006.229.04:40:02.93#ibcon#read 4, iclass 36, count 0 2006.229.04:40:02.93#ibcon#about to read 5, iclass 36, count 0 2006.229.04:40:02.93#ibcon#read 5, iclass 36, count 0 2006.229.04:40:02.93#ibcon#about to read 6, iclass 36, count 0 2006.229.04:40:02.93#ibcon#read 6, iclass 36, count 0 2006.229.04:40:02.93#ibcon#end of sib2, iclass 36, count 0 2006.229.04:40:02.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:40:02.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:40:02.93#ibcon#[27=USB\r\n] 2006.229.04:40:02.93#ibcon#*before write, iclass 36, count 0 2006.229.04:40:02.93#ibcon#enter sib2, iclass 36, count 0 2006.229.04:40:02.93#ibcon#flushed, iclass 36, count 0 2006.229.04:40:02.93#ibcon#about to write, iclass 36, count 0 2006.229.04:40:02.93#ibcon#wrote, iclass 36, count 0 2006.229.04:40:02.93#ibcon#about to read 3, iclass 36, count 0 2006.229.04:40:02.96#ibcon#read 3, iclass 36, count 0 2006.229.04:40:02.96#ibcon#about to read 4, iclass 36, count 0 2006.229.04:40:02.96#ibcon#read 4, iclass 36, count 0 2006.229.04:40:02.96#ibcon#about to read 5, iclass 36, count 0 2006.229.04:40:02.96#ibcon#read 5, iclass 36, count 0 2006.229.04:40:02.96#ibcon#about to read 6, iclass 36, count 0 2006.229.04:40:02.96#ibcon#read 6, iclass 36, count 0 2006.229.04:40:02.96#ibcon#end of sib2, iclass 36, count 0 2006.229.04:40:02.96#ibcon#*after write, iclass 36, count 0 2006.229.04:40:02.96#ibcon#*before return 0, iclass 36, count 0 2006.229.04:40:02.96#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:40:02.96#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.04:40:02.96#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:40:02.96#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:40:02.96$vck44/vblo=7,734.99 2006.229.04:40:02.96#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.04:40:02.96#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.04:40:02.96#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:02.96#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:02.96#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:02.96#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:02.96#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:40:02.96#ibcon#first serial, iclass 38, count 0 2006.229.04:40:02.96#ibcon#enter sib2, iclass 38, count 0 2006.229.04:40:02.96#ibcon#flushed, iclass 38, count 0 2006.229.04:40:02.96#ibcon#about to write, iclass 38, count 0 2006.229.04:40:02.96#ibcon#wrote, iclass 38, count 0 2006.229.04:40:02.96#ibcon#about to read 3, iclass 38, count 0 2006.229.04:40:02.98#ibcon#read 3, iclass 38, count 0 2006.229.04:40:02.98#ibcon#about to read 4, iclass 38, count 0 2006.229.04:40:02.98#ibcon#read 4, iclass 38, count 0 2006.229.04:40:02.98#ibcon#about to read 5, iclass 38, count 0 2006.229.04:40:02.98#ibcon#read 5, iclass 38, count 0 2006.229.04:40:02.98#ibcon#about to read 6, iclass 38, count 0 2006.229.04:40:02.98#ibcon#read 6, iclass 38, count 0 2006.229.04:40:02.98#ibcon#end of sib2, iclass 38, count 0 2006.229.04:40:02.98#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:40:02.98#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:40:02.98#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:40:02.98#ibcon#*before write, iclass 38, count 0 2006.229.04:40:02.98#ibcon#enter sib2, iclass 38, count 0 2006.229.04:40:02.98#ibcon#flushed, iclass 38, count 0 2006.229.04:40:02.98#ibcon#about to write, iclass 38, count 0 2006.229.04:40:02.98#ibcon#wrote, iclass 38, count 0 2006.229.04:40:02.98#ibcon#about to read 3, iclass 38, count 0 2006.229.04:40:03.02#ibcon#read 3, iclass 38, count 0 2006.229.04:40:03.02#ibcon#about to read 4, iclass 38, count 0 2006.229.04:40:03.02#ibcon#read 4, iclass 38, count 0 2006.229.04:40:03.02#ibcon#about to read 5, iclass 38, count 0 2006.229.04:40:03.02#ibcon#read 5, iclass 38, count 0 2006.229.04:40:03.02#ibcon#about to read 6, iclass 38, count 0 2006.229.04:40:03.02#ibcon#read 6, iclass 38, count 0 2006.229.04:40:03.02#ibcon#end of sib2, iclass 38, count 0 2006.229.04:40:03.02#ibcon#*after write, iclass 38, count 0 2006.229.04:40:03.02#ibcon#*before return 0, iclass 38, count 0 2006.229.04:40:03.02#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:03.02#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:40:03.02#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:40:03.02#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:40:03.02$vck44/vb=7,4 2006.229.04:40:03.02#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.04:40:03.02#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.04:40:03.02#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:03.02#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:03.08#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:03.08#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:03.08#ibcon#enter wrdev, iclass 40, count 2 2006.229.04:40:03.08#ibcon#first serial, iclass 40, count 2 2006.229.04:40:03.08#ibcon#enter sib2, iclass 40, count 2 2006.229.04:40:03.08#ibcon#flushed, iclass 40, count 2 2006.229.04:40:03.08#ibcon#about to write, iclass 40, count 2 2006.229.04:40:03.08#ibcon#wrote, iclass 40, count 2 2006.229.04:40:03.08#ibcon#about to read 3, iclass 40, count 2 2006.229.04:40:03.10#ibcon#read 3, iclass 40, count 2 2006.229.04:40:03.10#ibcon#about to read 4, iclass 40, count 2 2006.229.04:40:03.10#ibcon#read 4, iclass 40, count 2 2006.229.04:40:03.10#ibcon#about to read 5, iclass 40, count 2 2006.229.04:40:03.10#ibcon#read 5, iclass 40, count 2 2006.229.04:40:03.10#ibcon#about to read 6, iclass 40, count 2 2006.229.04:40:03.10#ibcon#read 6, iclass 40, count 2 2006.229.04:40:03.10#ibcon#end of sib2, iclass 40, count 2 2006.229.04:40:03.10#ibcon#*mode == 0, iclass 40, count 2 2006.229.04:40:03.10#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.04:40:03.10#ibcon#[27=AT07-04\r\n] 2006.229.04:40:03.10#ibcon#*before write, iclass 40, count 2 2006.229.04:40:03.10#ibcon#enter sib2, iclass 40, count 2 2006.229.04:40:03.10#ibcon#flushed, iclass 40, count 2 2006.229.04:40:03.10#ibcon#about to write, iclass 40, count 2 2006.229.04:40:03.10#ibcon#wrote, iclass 40, count 2 2006.229.04:40:03.10#ibcon#about to read 3, iclass 40, count 2 2006.229.04:40:03.13#ibcon#read 3, iclass 40, count 2 2006.229.04:40:03.13#ibcon#about to read 4, iclass 40, count 2 2006.229.04:40:03.13#ibcon#read 4, iclass 40, count 2 2006.229.04:40:03.13#ibcon#about to read 5, iclass 40, count 2 2006.229.04:40:03.13#ibcon#read 5, iclass 40, count 2 2006.229.04:40:03.13#ibcon#about to read 6, iclass 40, count 2 2006.229.04:40:03.13#ibcon#read 6, iclass 40, count 2 2006.229.04:40:03.13#ibcon#end of sib2, iclass 40, count 2 2006.229.04:40:03.13#ibcon#*after write, iclass 40, count 2 2006.229.04:40:03.13#ibcon#*before return 0, iclass 40, count 2 2006.229.04:40:03.13#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:03.13#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.04:40:03.13#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.04:40:03.13#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:03.13#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:03.25#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:03.25#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:03.25#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:40:03.25#ibcon#first serial, iclass 40, count 0 2006.229.04:40:03.25#ibcon#enter sib2, iclass 40, count 0 2006.229.04:40:03.25#ibcon#flushed, iclass 40, count 0 2006.229.04:40:03.25#ibcon#about to write, iclass 40, count 0 2006.229.04:40:03.25#ibcon#wrote, iclass 40, count 0 2006.229.04:40:03.25#ibcon#about to read 3, iclass 40, count 0 2006.229.04:40:03.27#ibcon#read 3, iclass 40, count 0 2006.229.04:40:03.27#ibcon#about to read 4, iclass 40, count 0 2006.229.04:40:03.27#ibcon#read 4, iclass 40, count 0 2006.229.04:40:03.27#ibcon#about to read 5, iclass 40, count 0 2006.229.04:40:03.27#ibcon#read 5, iclass 40, count 0 2006.229.04:40:03.27#ibcon#about to read 6, iclass 40, count 0 2006.229.04:40:03.27#ibcon#read 6, iclass 40, count 0 2006.229.04:40:03.27#ibcon#end of sib2, iclass 40, count 0 2006.229.04:40:03.27#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:40:03.27#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:40:03.27#ibcon#[27=USB\r\n] 2006.229.04:40:03.27#ibcon#*before write, iclass 40, count 0 2006.229.04:40:03.27#ibcon#enter sib2, iclass 40, count 0 2006.229.04:40:03.27#ibcon#flushed, iclass 40, count 0 2006.229.04:40:03.27#ibcon#about to write, iclass 40, count 0 2006.229.04:40:03.27#ibcon#wrote, iclass 40, count 0 2006.229.04:40:03.27#ibcon#about to read 3, iclass 40, count 0 2006.229.04:40:03.30#ibcon#read 3, iclass 40, count 0 2006.229.04:40:03.30#ibcon#about to read 4, iclass 40, count 0 2006.229.04:40:03.30#ibcon#read 4, iclass 40, count 0 2006.229.04:40:03.30#ibcon#about to read 5, iclass 40, count 0 2006.229.04:40:03.30#ibcon#read 5, iclass 40, count 0 2006.229.04:40:03.30#ibcon#about to read 6, iclass 40, count 0 2006.229.04:40:03.30#ibcon#read 6, iclass 40, count 0 2006.229.04:40:03.30#ibcon#end of sib2, iclass 40, count 0 2006.229.04:40:03.30#ibcon#*after write, iclass 40, count 0 2006.229.04:40:03.30#ibcon#*before return 0, iclass 40, count 0 2006.229.04:40:03.30#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:03.30#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.04:40:03.30#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:40:03.30#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:40:03.30$vck44/vblo=8,744.99 2006.229.04:40:03.30#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.04:40:03.30#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.04:40:03.30#ibcon#ireg 17 cls_cnt 0 2006.229.04:40:03.30#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:03.30#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:03.30#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:03.30#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:40:03.30#ibcon#first serial, iclass 4, count 0 2006.229.04:40:03.30#ibcon#enter sib2, iclass 4, count 0 2006.229.04:40:03.30#ibcon#flushed, iclass 4, count 0 2006.229.04:40:03.30#ibcon#about to write, iclass 4, count 0 2006.229.04:40:03.30#ibcon#wrote, iclass 4, count 0 2006.229.04:40:03.30#ibcon#about to read 3, iclass 4, count 0 2006.229.04:40:03.32#ibcon#read 3, iclass 4, count 0 2006.229.04:40:03.32#ibcon#about to read 4, iclass 4, count 0 2006.229.04:40:03.32#ibcon#read 4, iclass 4, count 0 2006.229.04:40:03.32#ibcon#about to read 5, iclass 4, count 0 2006.229.04:40:03.32#ibcon#read 5, iclass 4, count 0 2006.229.04:40:03.32#ibcon#about to read 6, iclass 4, count 0 2006.229.04:40:03.32#ibcon#read 6, iclass 4, count 0 2006.229.04:40:03.32#ibcon#end of sib2, iclass 4, count 0 2006.229.04:40:03.32#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:40:03.32#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:40:03.32#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:40:03.32#ibcon#*before write, iclass 4, count 0 2006.229.04:40:03.32#ibcon#enter sib2, iclass 4, count 0 2006.229.04:40:03.32#ibcon#flushed, iclass 4, count 0 2006.229.04:40:03.32#ibcon#about to write, iclass 4, count 0 2006.229.04:40:03.32#ibcon#wrote, iclass 4, count 0 2006.229.04:40:03.32#ibcon#about to read 3, iclass 4, count 0 2006.229.04:40:03.36#ibcon#read 3, iclass 4, count 0 2006.229.04:40:03.36#ibcon#about to read 4, iclass 4, count 0 2006.229.04:40:03.36#ibcon#read 4, iclass 4, count 0 2006.229.04:40:03.36#ibcon#about to read 5, iclass 4, count 0 2006.229.04:40:03.36#ibcon#read 5, iclass 4, count 0 2006.229.04:40:03.36#ibcon#about to read 6, iclass 4, count 0 2006.229.04:40:03.36#ibcon#read 6, iclass 4, count 0 2006.229.04:40:03.36#ibcon#end of sib2, iclass 4, count 0 2006.229.04:40:03.36#ibcon#*after write, iclass 4, count 0 2006.229.04:40:03.36#ibcon#*before return 0, iclass 4, count 0 2006.229.04:40:03.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:03.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.04:40:03.36#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:40:03.36#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:40:03.36$vck44/vb=8,4 2006.229.04:40:03.36#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.04:40:03.36#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.04:40:03.36#ibcon#ireg 11 cls_cnt 2 2006.229.04:40:03.36#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:03.42#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:03.42#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:03.42#ibcon#enter wrdev, iclass 6, count 2 2006.229.04:40:03.42#ibcon#first serial, iclass 6, count 2 2006.229.04:40:03.42#ibcon#enter sib2, iclass 6, count 2 2006.229.04:40:03.42#ibcon#flushed, iclass 6, count 2 2006.229.04:40:03.42#ibcon#about to write, iclass 6, count 2 2006.229.04:40:03.42#ibcon#wrote, iclass 6, count 2 2006.229.04:40:03.42#ibcon#about to read 3, iclass 6, count 2 2006.229.04:40:03.44#ibcon#read 3, iclass 6, count 2 2006.229.04:40:03.44#ibcon#about to read 4, iclass 6, count 2 2006.229.04:40:03.44#ibcon#read 4, iclass 6, count 2 2006.229.04:40:03.44#ibcon#about to read 5, iclass 6, count 2 2006.229.04:40:03.44#ibcon#read 5, iclass 6, count 2 2006.229.04:40:03.44#ibcon#about to read 6, iclass 6, count 2 2006.229.04:40:03.44#ibcon#read 6, iclass 6, count 2 2006.229.04:40:03.44#ibcon#end of sib2, iclass 6, count 2 2006.229.04:40:03.44#ibcon#*mode == 0, iclass 6, count 2 2006.229.04:40:03.44#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.04:40:03.44#ibcon#[27=AT08-04\r\n] 2006.229.04:40:03.44#ibcon#*before write, iclass 6, count 2 2006.229.04:40:03.44#ibcon#enter sib2, iclass 6, count 2 2006.229.04:40:03.44#ibcon#flushed, iclass 6, count 2 2006.229.04:40:03.44#ibcon#about to write, iclass 6, count 2 2006.229.04:40:03.44#ibcon#wrote, iclass 6, count 2 2006.229.04:40:03.44#ibcon#about to read 3, iclass 6, count 2 2006.229.04:40:03.47#ibcon#read 3, iclass 6, count 2 2006.229.04:40:03.47#ibcon#about to read 4, iclass 6, count 2 2006.229.04:40:03.47#ibcon#read 4, iclass 6, count 2 2006.229.04:40:03.47#ibcon#about to read 5, iclass 6, count 2 2006.229.04:40:03.47#ibcon#read 5, iclass 6, count 2 2006.229.04:40:03.47#ibcon#about to read 6, iclass 6, count 2 2006.229.04:40:03.47#ibcon#read 6, iclass 6, count 2 2006.229.04:40:03.47#ibcon#end of sib2, iclass 6, count 2 2006.229.04:40:03.47#ibcon#*after write, iclass 6, count 2 2006.229.04:40:03.47#ibcon#*before return 0, iclass 6, count 2 2006.229.04:40:03.47#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:03.47#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.04:40:03.47#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.04:40:03.47#ibcon#ireg 7 cls_cnt 0 2006.229.04:40:03.47#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:03.59#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:03.59#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:03.59#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:40:03.59#ibcon#first serial, iclass 6, count 0 2006.229.04:40:03.59#ibcon#enter sib2, iclass 6, count 0 2006.229.04:40:03.59#ibcon#flushed, iclass 6, count 0 2006.229.04:40:03.59#ibcon#about to write, iclass 6, count 0 2006.229.04:40:03.59#ibcon#wrote, iclass 6, count 0 2006.229.04:40:03.59#ibcon#about to read 3, iclass 6, count 0 2006.229.04:40:03.61#ibcon#read 3, iclass 6, count 0 2006.229.04:40:03.61#ibcon#about to read 4, iclass 6, count 0 2006.229.04:40:03.61#ibcon#read 4, iclass 6, count 0 2006.229.04:40:03.61#ibcon#about to read 5, iclass 6, count 0 2006.229.04:40:03.61#ibcon#read 5, iclass 6, count 0 2006.229.04:40:03.61#ibcon#about to read 6, iclass 6, count 0 2006.229.04:40:03.61#ibcon#read 6, iclass 6, count 0 2006.229.04:40:03.61#ibcon#end of sib2, iclass 6, count 0 2006.229.04:40:03.61#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:40:03.61#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:40:03.61#ibcon#[27=USB\r\n] 2006.229.04:40:03.61#ibcon#*before write, iclass 6, count 0 2006.229.04:40:03.61#ibcon#enter sib2, iclass 6, count 0 2006.229.04:40:03.61#ibcon#flushed, iclass 6, count 0 2006.229.04:40:03.61#ibcon#about to write, iclass 6, count 0 2006.229.04:40:03.61#ibcon#wrote, iclass 6, count 0 2006.229.04:40:03.61#ibcon#about to read 3, iclass 6, count 0 2006.229.04:40:03.64#ibcon#read 3, iclass 6, count 0 2006.229.04:40:03.64#ibcon#about to read 4, iclass 6, count 0 2006.229.04:40:03.64#ibcon#read 4, iclass 6, count 0 2006.229.04:40:03.64#ibcon#about to read 5, iclass 6, count 0 2006.229.04:40:03.64#ibcon#read 5, iclass 6, count 0 2006.229.04:40:03.64#ibcon#about to read 6, iclass 6, count 0 2006.229.04:40:03.64#ibcon#read 6, iclass 6, count 0 2006.229.04:40:03.64#ibcon#end of sib2, iclass 6, count 0 2006.229.04:40:03.64#ibcon#*after write, iclass 6, count 0 2006.229.04:40:03.64#ibcon#*before return 0, iclass 6, count 0 2006.229.04:40:03.64#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:03.64#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.04:40:03.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:40:03.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:40:03.64$vck44/vabw=wide 2006.229.04:40:03.64#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.04:40:03.64#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.04:40:03.64#ibcon#ireg 8 cls_cnt 0 2006.229.04:40:03.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:03.64#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:03.64#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:03.64#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:40:03.64#ibcon#first serial, iclass 10, count 0 2006.229.04:40:03.64#ibcon#enter sib2, iclass 10, count 0 2006.229.04:40:03.64#ibcon#flushed, iclass 10, count 0 2006.229.04:40:03.64#ibcon#about to write, iclass 10, count 0 2006.229.04:40:03.64#ibcon#wrote, iclass 10, count 0 2006.229.04:40:03.64#ibcon#about to read 3, iclass 10, count 0 2006.229.04:40:03.66#ibcon#read 3, iclass 10, count 0 2006.229.04:40:03.66#ibcon#about to read 4, iclass 10, count 0 2006.229.04:40:03.66#ibcon#read 4, iclass 10, count 0 2006.229.04:40:03.66#ibcon#about to read 5, iclass 10, count 0 2006.229.04:40:03.66#ibcon#read 5, iclass 10, count 0 2006.229.04:40:03.66#ibcon#about to read 6, iclass 10, count 0 2006.229.04:40:03.66#ibcon#read 6, iclass 10, count 0 2006.229.04:40:03.66#ibcon#end of sib2, iclass 10, count 0 2006.229.04:40:03.66#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:40:03.66#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:40:03.66#ibcon#[25=BW32\r\n] 2006.229.04:40:03.66#ibcon#*before write, iclass 10, count 0 2006.229.04:40:03.66#ibcon#enter sib2, iclass 10, count 0 2006.229.04:40:03.66#ibcon#flushed, iclass 10, count 0 2006.229.04:40:03.66#ibcon#about to write, iclass 10, count 0 2006.229.04:40:03.66#ibcon#wrote, iclass 10, count 0 2006.229.04:40:03.66#ibcon#about to read 3, iclass 10, count 0 2006.229.04:40:03.69#ibcon#read 3, iclass 10, count 0 2006.229.04:40:03.69#ibcon#about to read 4, iclass 10, count 0 2006.229.04:40:03.69#ibcon#read 4, iclass 10, count 0 2006.229.04:40:03.69#ibcon#about to read 5, iclass 10, count 0 2006.229.04:40:03.69#ibcon#read 5, iclass 10, count 0 2006.229.04:40:03.69#ibcon#about to read 6, iclass 10, count 0 2006.229.04:40:03.69#ibcon#read 6, iclass 10, count 0 2006.229.04:40:03.69#ibcon#end of sib2, iclass 10, count 0 2006.229.04:40:03.69#ibcon#*after write, iclass 10, count 0 2006.229.04:40:03.69#ibcon#*before return 0, iclass 10, count 0 2006.229.04:40:03.69#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:03.69#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.04:40:03.69#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:40:03.69#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:40:03.69$vck44/vbbw=wide 2006.229.04:40:03.69#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:40:03.69#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:40:03.69#ibcon#ireg 8 cls_cnt 0 2006.229.04:40:03.69#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:40:03.76#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:40:03.76#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:40:03.76#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:40:03.76#ibcon#first serial, iclass 12, count 0 2006.229.04:40:03.76#ibcon#enter sib2, iclass 12, count 0 2006.229.04:40:03.76#ibcon#flushed, iclass 12, count 0 2006.229.04:40:03.76#ibcon#about to write, iclass 12, count 0 2006.229.04:40:03.76#ibcon#wrote, iclass 12, count 0 2006.229.04:40:03.76#ibcon#about to read 3, iclass 12, count 0 2006.229.04:40:03.78#ibcon#read 3, iclass 12, count 0 2006.229.04:40:03.78#ibcon#about to read 4, iclass 12, count 0 2006.229.04:40:03.78#ibcon#read 4, iclass 12, count 0 2006.229.04:40:03.78#ibcon#about to read 5, iclass 12, count 0 2006.229.04:40:03.78#ibcon#read 5, iclass 12, count 0 2006.229.04:40:03.78#ibcon#about to read 6, iclass 12, count 0 2006.229.04:40:03.78#ibcon#read 6, iclass 12, count 0 2006.229.04:40:03.78#ibcon#end of sib2, iclass 12, count 0 2006.229.04:40:03.78#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:40:03.78#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:40:03.78#ibcon#[27=BW32\r\n] 2006.229.04:40:03.78#ibcon#*before write, iclass 12, count 0 2006.229.04:40:03.78#ibcon#enter sib2, iclass 12, count 0 2006.229.04:40:03.78#ibcon#flushed, iclass 12, count 0 2006.229.04:40:03.78#ibcon#about to write, iclass 12, count 0 2006.229.04:40:03.78#ibcon#wrote, iclass 12, count 0 2006.229.04:40:03.78#ibcon#about to read 3, iclass 12, count 0 2006.229.04:40:03.81#ibcon#read 3, iclass 12, count 0 2006.229.04:40:03.81#ibcon#about to read 4, iclass 12, count 0 2006.229.04:40:03.81#ibcon#read 4, iclass 12, count 0 2006.229.04:40:03.81#ibcon#about to read 5, iclass 12, count 0 2006.229.04:40:03.81#ibcon#read 5, iclass 12, count 0 2006.229.04:40:03.81#ibcon#about to read 6, iclass 12, count 0 2006.229.04:40:03.81#ibcon#read 6, iclass 12, count 0 2006.229.04:40:03.81#ibcon#end of sib2, iclass 12, count 0 2006.229.04:40:03.81#ibcon#*after write, iclass 12, count 0 2006.229.04:40:03.81#ibcon#*before return 0, iclass 12, count 0 2006.229.04:40:03.81#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:40:03.81#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:40:03.81#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:40:03.81#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:40:03.81$setupk4/ifdk4 2006.229.04:40:03.81$ifdk4/lo= 2006.229.04:40:03.81$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:40:03.81$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:40:03.81$ifdk4/patch= 2006.229.04:40:03.81$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:40:03.81$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:40:03.81$setupk4/!*+20s 2006.229.04:40:09.37#abcon#<5=/04 3.5 6.0 30.85 92 999.8\r\n> 2006.229.04:40:09.39#abcon#{5=INTERFACE CLEAR} 2006.229.04:40:09.45#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:40:16.14#trakl#Source acquired 2006.229.04:40:17.14#flagr#flagr/antenna,acquired 2006.229.04:40:18.27$setupk4/"tpicd 2006.229.04:40:18.27$setupk4/echo=off 2006.229.04:40:18.27$setupk4/xlog=off 2006.229.04:40:18.27:!2006.229.04:43:04 2006.229.04:43:04.00:preob 2006.229.04:43:04.13/onsource/TRACKING 2006.229.04:43:04.13:!2006.229.04:43:14 2006.229.04:43:14.00:"tape 2006.229.04:43:14.00:"st=record 2006.229.04:43:14.00:data_valid=on 2006.229.04:43:14.00:midob 2006.229.04:43:14.13/onsource/TRACKING 2006.229.04:43:14.13/wx/30.93,999.7,91 2006.229.04:43:14.22/cable/+6.4035E-03 2006.229.04:43:15.31/va/01,08,usb,yes,29,31 2006.229.04:43:15.31/va/02,07,usb,yes,31,32 2006.229.04:43:15.31/va/03,06,usb,yes,39,41 2006.229.04:43:15.31/va/04,07,usb,yes,32,34 2006.229.04:43:15.31/va/05,04,usb,yes,29,29 2006.229.04:43:15.31/va/06,04,usb,yes,32,32 2006.229.04:43:15.31/va/07,05,usb,yes,28,29 2006.229.04:43:15.31/va/08,06,usb,yes,20,26 2006.229.04:43:15.54/valo/01,524.99,yes,locked 2006.229.04:43:15.54/valo/02,534.99,yes,locked 2006.229.04:43:15.54/valo/03,564.99,yes,locked 2006.229.04:43:15.54/valo/04,624.99,yes,locked 2006.229.04:43:15.54/valo/05,734.99,yes,locked 2006.229.04:43:15.54/valo/06,814.99,yes,locked 2006.229.04:43:15.54/valo/07,864.99,yes,locked 2006.229.04:43:15.54/valo/08,884.99,yes,locked 2006.229.04:43:16.63/vb/01,04,usb,yes,31,28 2006.229.04:43:16.63/vb/02,04,usb,yes,33,33 2006.229.04:43:16.63/vb/03,04,usb,yes,30,33 2006.229.04:43:16.63/vb/04,04,usb,yes,34,33 2006.229.04:43:16.63/vb/05,04,usb,yes,27,29 2006.229.04:43:16.63/vb/06,04,usb,yes,31,28 2006.229.04:43:16.63/vb/07,04,usb,yes,31,31 2006.229.04:43:16.63/vb/08,04,usb,yes,28,32 2006.229.04:43:16.87/vblo/01,629.99,yes,locked 2006.229.04:43:16.87/vblo/02,634.99,yes,locked 2006.229.04:43:16.87/vblo/03,649.99,yes,locked 2006.229.04:43:16.87/vblo/04,679.99,yes,locked 2006.229.04:43:16.87/vblo/05,709.99,yes,locked 2006.229.04:43:16.87/vblo/06,719.99,yes,locked 2006.229.04:43:16.87/vblo/07,734.99,yes,locked 2006.229.04:43:16.87/vblo/08,744.99,yes,locked 2006.229.04:43:17.02/vabw/8 2006.229.04:43:17.17/vbbw/8 2006.229.04:43:17.26/xfe/off,on,12.0 2006.229.04:43:17.63/ifatt/23,28,28,28 2006.229.04:43:18.07/fmout-gps/S +4.54E-07 2006.229.04:43:18.11:!2006.229.04:50:24 2006.229.04:50:24.00:data_valid=off 2006.229.04:50:24.00:"et 2006.229.04:50:24.00:!+3s 2006.229.04:50:27.01:"tape 2006.229.04:50:27.01:postob 2006.229.04:50:27.22/cable/+6.4026E-03 2006.229.04:50:27.22/wx/31.13,999.6,92 2006.229.04:50:28.07/fmout-gps/S +4.52E-07 2006.229.04:50:28.07:scan_name=229-0457,jd0608,40 2006.229.04:50:28.07:source=0727-115,073019.11,-114112.6,2000.0,ccw 2006.229.04:50:29.14#flagr#flagr/antenna,new-source 2006.229.04:50:29.14:checkk5 2006.229.04:50:29.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:50:29.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:50:30.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:50:30.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:50:31.11/chk_obsdata//k5ts1/T2290443??a.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.04:50:31.51/chk_obsdata//k5ts2/T2290443??b.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.04:50:31.92/chk_obsdata//k5ts3/T2290443??c.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.04:50:32.32/chk_obsdata//k5ts4/T2290443??d.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.04:50:33.03/k5log//k5ts1_log_newline 2006.229.04:50:33.74/k5log//k5ts2_log_newline 2006.229.04:50:34.44/k5log//k5ts3_log_newline 2006.229.04:50:35.15/k5log//k5ts4_log_newline 2006.229.04:50:35.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:50:35.17:setupk4=1 2006.229.04:50:35.17$setupk4/echo=on 2006.229.04:50:35.17$setupk4/pcalon 2006.229.04:50:35.17$pcalon/"no phase cal control is implemented here 2006.229.04:50:35.17$setupk4/"tpicd=stop 2006.229.04:50:35.17$setupk4/"rec=synch_on 2006.229.04:50:35.17$setupk4/"rec_mode=128 2006.229.04:50:35.17$setupk4/!* 2006.229.04:50:35.17$setupk4/recpk4 2006.229.04:50:35.17$recpk4/recpatch= 2006.229.04:50:35.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:50:35.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:50:35.17$setupk4/vck44 2006.229.04:50:35.17$vck44/valo=1,524.99 2006.229.04:50:35.17#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.04:50:35.17#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.04:50:35.17#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:35.17#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:35.17#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:35.17#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:35.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:50:35.17#ibcon#first serial, iclass 13, count 0 2006.229.04:50:35.17#ibcon#enter sib2, iclass 13, count 0 2006.229.04:50:35.17#ibcon#flushed, iclass 13, count 0 2006.229.04:50:35.17#ibcon#about to write, iclass 13, count 0 2006.229.04:50:35.17#ibcon#wrote, iclass 13, count 0 2006.229.04:50:35.17#ibcon#about to read 3, iclass 13, count 0 2006.229.04:50:35.19#ibcon#read 3, iclass 13, count 0 2006.229.04:50:35.19#ibcon#about to read 4, iclass 13, count 0 2006.229.04:50:35.19#ibcon#read 4, iclass 13, count 0 2006.229.04:50:35.19#ibcon#about to read 5, iclass 13, count 0 2006.229.04:50:35.19#ibcon#read 5, iclass 13, count 0 2006.229.04:50:35.19#ibcon#about to read 6, iclass 13, count 0 2006.229.04:50:35.19#ibcon#read 6, iclass 13, count 0 2006.229.04:50:35.19#ibcon#end of sib2, iclass 13, count 0 2006.229.04:50:35.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:50:35.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:50:35.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:50:35.19#ibcon#*before write, iclass 13, count 0 2006.229.04:50:35.19#ibcon#enter sib2, iclass 13, count 0 2006.229.04:50:35.19#ibcon#flushed, iclass 13, count 0 2006.229.04:50:35.19#ibcon#about to write, iclass 13, count 0 2006.229.04:50:35.19#ibcon#wrote, iclass 13, count 0 2006.229.04:50:35.19#ibcon#about to read 3, iclass 13, count 0 2006.229.04:50:35.24#ibcon#read 3, iclass 13, count 0 2006.229.04:50:35.24#ibcon#about to read 4, iclass 13, count 0 2006.229.04:50:35.24#ibcon#read 4, iclass 13, count 0 2006.229.04:50:35.24#ibcon#about to read 5, iclass 13, count 0 2006.229.04:50:35.24#ibcon#read 5, iclass 13, count 0 2006.229.04:50:35.24#ibcon#about to read 6, iclass 13, count 0 2006.229.04:50:35.24#ibcon#read 6, iclass 13, count 0 2006.229.04:50:35.24#ibcon#end of sib2, iclass 13, count 0 2006.229.04:50:35.24#ibcon#*after write, iclass 13, count 0 2006.229.04:50:35.24#ibcon#*before return 0, iclass 13, count 0 2006.229.04:50:35.24#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:35.24#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:35.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:50:35.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:50:35.24$vck44/va=1,8 2006.229.04:50:35.24#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.04:50:35.24#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.04:50:35.24#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:35.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:35.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:35.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:35.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.04:50:35.24#ibcon#first serial, iclass 15, count 2 2006.229.04:50:35.24#ibcon#enter sib2, iclass 15, count 2 2006.229.04:50:35.24#ibcon#flushed, iclass 15, count 2 2006.229.04:50:35.24#ibcon#about to write, iclass 15, count 2 2006.229.04:50:35.24#ibcon#wrote, iclass 15, count 2 2006.229.04:50:35.24#ibcon#about to read 3, iclass 15, count 2 2006.229.04:50:35.26#ibcon#read 3, iclass 15, count 2 2006.229.04:50:35.26#ibcon#about to read 4, iclass 15, count 2 2006.229.04:50:35.26#ibcon#read 4, iclass 15, count 2 2006.229.04:50:35.26#ibcon#about to read 5, iclass 15, count 2 2006.229.04:50:35.26#ibcon#read 5, iclass 15, count 2 2006.229.04:50:35.26#ibcon#about to read 6, iclass 15, count 2 2006.229.04:50:35.26#ibcon#read 6, iclass 15, count 2 2006.229.04:50:35.26#ibcon#end of sib2, iclass 15, count 2 2006.229.04:50:35.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.04:50:35.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.04:50:35.26#ibcon#[25=AT01-08\r\n] 2006.229.04:50:35.26#ibcon#*before write, iclass 15, count 2 2006.229.04:50:35.26#ibcon#enter sib2, iclass 15, count 2 2006.229.04:50:35.26#ibcon#flushed, iclass 15, count 2 2006.229.04:50:35.26#ibcon#about to write, iclass 15, count 2 2006.229.04:50:35.26#ibcon#wrote, iclass 15, count 2 2006.229.04:50:35.26#ibcon#about to read 3, iclass 15, count 2 2006.229.04:50:35.29#ibcon#read 3, iclass 15, count 2 2006.229.04:50:35.29#ibcon#about to read 4, iclass 15, count 2 2006.229.04:50:35.29#ibcon#read 4, iclass 15, count 2 2006.229.04:50:35.29#ibcon#about to read 5, iclass 15, count 2 2006.229.04:50:35.29#ibcon#read 5, iclass 15, count 2 2006.229.04:50:35.29#ibcon#about to read 6, iclass 15, count 2 2006.229.04:50:35.29#ibcon#read 6, iclass 15, count 2 2006.229.04:50:35.29#ibcon#end of sib2, iclass 15, count 2 2006.229.04:50:35.29#ibcon#*after write, iclass 15, count 2 2006.229.04:50:35.29#ibcon#*before return 0, iclass 15, count 2 2006.229.04:50:35.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:35.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:35.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.04:50:35.29#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:35.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:35.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:35.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:35.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:50:35.41#ibcon#first serial, iclass 15, count 0 2006.229.04:50:35.41#ibcon#enter sib2, iclass 15, count 0 2006.229.04:50:35.41#ibcon#flushed, iclass 15, count 0 2006.229.04:50:35.41#ibcon#about to write, iclass 15, count 0 2006.229.04:50:35.41#ibcon#wrote, iclass 15, count 0 2006.229.04:50:35.41#ibcon#about to read 3, iclass 15, count 0 2006.229.04:50:35.43#ibcon#read 3, iclass 15, count 0 2006.229.04:50:35.43#ibcon#about to read 4, iclass 15, count 0 2006.229.04:50:35.43#ibcon#read 4, iclass 15, count 0 2006.229.04:50:35.43#ibcon#about to read 5, iclass 15, count 0 2006.229.04:50:35.43#ibcon#read 5, iclass 15, count 0 2006.229.04:50:35.43#ibcon#about to read 6, iclass 15, count 0 2006.229.04:50:35.43#ibcon#read 6, iclass 15, count 0 2006.229.04:50:35.43#ibcon#end of sib2, iclass 15, count 0 2006.229.04:50:35.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:50:35.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:50:35.43#ibcon#[25=USB\r\n] 2006.229.04:50:35.43#ibcon#*before write, iclass 15, count 0 2006.229.04:50:35.43#ibcon#enter sib2, iclass 15, count 0 2006.229.04:50:35.43#ibcon#flushed, iclass 15, count 0 2006.229.04:50:35.43#ibcon#about to write, iclass 15, count 0 2006.229.04:50:35.43#ibcon#wrote, iclass 15, count 0 2006.229.04:50:35.43#ibcon#about to read 3, iclass 15, count 0 2006.229.04:50:35.46#ibcon#read 3, iclass 15, count 0 2006.229.04:50:35.46#ibcon#about to read 4, iclass 15, count 0 2006.229.04:50:35.46#ibcon#read 4, iclass 15, count 0 2006.229.04:50:35.46#ibcon#about to read 5, iclass 15, count 0 2006.229.04:50:35.46#ibcon#read 5, iclass 15, count 0 2006.229.04:50:35.46#ibcon#about to read 6, iclass 15, count 0 2006.229.04:50:35.46#ibcon#read 6, iclass 15, count 0 2006.229.04:50:35.46#ibcon#end of sib2, iclass 15, count 0 2006.229.04:50:35.46#ibcon#*after write, iclass 15, count 0 2006.229.04:50:35.46#ibcon#*before return 0, iclass 15, count 0 2006.229.04:50:35.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:35.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:35.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:50:35.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:50:35.46$vck44/valo=2,534.99 2006.229.04:50:35.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.04:50:35.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.04:50:35.46#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:35.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:35.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:35.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:35.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:50:35.46#ibcon#first serial, iclass 17, count 0 2006.229.04:50:35.46#ibcon#enter sib2, iclass 17, count 0 2006.229.04:50:35.46#ibcon#flushed, iclass 17, count 0 2006.229.04:50:35.46#ibcon#about to write, iclass 17, count 0 2006.229.04:50:35.46#ibcon#wrote, iclass 17, count 0 2006.229.04:50:35.46#ibcon#about to read 3, iclass 17, count 0 2006.229.04:50:35.48#ibcon#read 3, iclass 17, count 0 2006.229.04:50:35.48#ibcon#about to read 4, iclass 17, count 0 2006.229.04:50:35.48#ibcon#read 4, iclass 17, count 0 2006.229.04:50:35.48#ibcon#about to read 5, iclass 17, count 0 2006.229.04:50:35.48#ibcon#read 5, iclass 17, count 0 2006.229.04:50:35.48#ibcon#about to read 6, iclass 17, count 0 2006.229.04:50:35.48#ibcon#read 6, iclass 17, count 0 2006.229.04:50:35.48#ibcon#end of sib2, iclass 17, count 0 2006.229.04:50:35.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:50:35.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:50:35.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:50:35.48#ibcon#*before write, iclass 17, count 0 2006.229.04:50:35.48#ibcon#enter sib2, iclass 17, count 0 2006.229.04:50:35.48#ibcon#flushed, iclass 17, count 0 2006.229.04:50:35.48#ibcon#about to write, iclass 17, count 0 2006.229.04:50:35.48#ibcon#wrote, iclass 17, count 0 2006.229.04:50:35.48#ibcon#about to read 3, iclass 17, count 0 2006.229.04:50:35.52#ibcon#read 3, iclass 17, count 0 2006.229.04:50:35.52#ibcon#about to read 4, iclass 17, count 0 2006.229.04:50:35.52#ibcon#read 4, iclass 17, count 0 2006.229.04:50:35.52#ibcon#about to read 5, iclass 17, count 0 2006.229.04:50:35.52#ibcon#read 5, iclass 17, count 0 2006.229.04:50:35.52#ibcon#about to read 6, iclass 17, count 0 2006.229.04:50:35.52#ibcon#read 6, iclass 17, count 0 2006.229.04:50:35.52#ibcon#end of sib2, iclass 17, count 0 2006.229.04:50:35.52#ibcon#*after write, iclass 17, count 0 2006.229.04:50:35.52#ibcon#*before return 0, iclass 17, count 0 2006.229.04:50:35.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:35.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:35.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:50:35.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:50:35.52$vck44/va=2,7 2006.229.04:50:35.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.04:50:35.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.04:50:35.52#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:35.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:35.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:35.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:35.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.04:50:35.58#ibcon#first serial, iclass 19, count 2 2006.229.04:50:35.58#ibcon#enter sib2, iclass 19, count 2 2006.229.04:50:35.58#ibcon#flushed, iclass 19, count 2 2006.229.04:50:35.58#ibcon#about to write, iclass 19, count 2 2006.229.04:50:35.58#ibcon#wrote, iclass 19, count 2 2006.229.04:50:35.58#ibcon#about to read 3, iclass 19, count 2 2006.229.04:50:35.60#ibcon#read 3, iclass 19, count 2 2006.229.04:50:35.60#ibcon#about to read 4, iclass 19, count 2 2006.229.04:50:35.60#ibcon#read 4, iclass 19, count 2 2006.229.04:50:35.60#ibcon#about to read 5, iclass 19, count 2 2006.229.04:50:35.60#ibcon#read 5, iclass 19, count 2 2006.229.04:50:35.60#ibcon#about to read 6, iclass 19, count 2 2006.229.04:50:35.60#ibcon#read 6, iclass 19, count 2 2006.229.04:50:35.60#ibcon#end of sib2, iclass 19, count 2 2006.229.04:50:35.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.04:50:35.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.04:50:35.60#ibcon#[25=AT02-07\r\n] 2006.229.04:50:35.60#ibcon#*before write, iclass 19, count 2 2006.229.04:50:35.60#ibcon#enter sib2, iclass 19, count 2 2006.229.04:50:35.60#ibcon#flushed, iclass 19, count 2 2006.229.04:50:35.60#ibcon#about to write, iclass 19, count 2 2006.229.04:50:35.60#ibcon#wrote, iclass 19, count 2 2006.229.04:50:35.60#ibcon#about to read 3, iclass 19, count 2 2006.229.04:50:35.63#ibcon#read 3, iclass 19, count 2 2006.229.04:50:35.63#ibcon#about to read 4, iclass 19, count 2 2006.229.04:50:35.63#ibcon#read 4, iclass 19, count 2 2006.229.04:50:35.63#ibcon#about to read 5, iclass 19, count 2 2006.229.04:50:35.63#ibcon#read 5, iclass 19, count 2 2006.229.04:50:35.63#ibcon#about to read 6, iclass 19, count 2 2006.229.04:50:35.63#ibcon#read 6, iclass 19, count 2 2006.229.04:50:35.63#ibcon#end of sib2, iclass 19, count 2 2006.229.04:50:35.63#ibcon#*after write, iclass 19, count 2 2006.229.04:50:35.63#ibcon#*before return 0, iclass 19, count 2 2006.229.04:50:35.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:35.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:35.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.04:50:35.63#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:35.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:35.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:35.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:35.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:50:35.75#ibcon#first serial, iclass 19, count 0 2006.229.04:50:35.75#ibcon#enter sib2, iclass 19, count 0 2006.229.04:50:35.75#ibcon#flushed, iclass 19, count 0 2006.229.04:50:35.75#ibcon#about to write, iclass 19, count 0 2006.229.04:50:35.75#ibcon#wrote, iclass 19, count 0 2006.229.04:50:35.75#ibcon#about to read 3, iclass 19, count 0 2006.229.04:50:35.77#ibcon#read 3, iclass 19, count 0 2006.229.04:50:35.77#ibcon#about to read 4, iclass 19, count 0 2006.229.04:50:35.77#ibcon#read 4, iclass 19, count 0 2006.229.04:50:35.77#ibcon#about to read 5, iclass 19, count 0 2006.229.04:50:35.77#ibcon#read 5, iclass 19, count 0 2006.229.04:50:35.77#ibcon#about to read 6, iclass 19, count 0 2006.229.04:50:35.77#ibcon#read 6, iclass 19, count 0 2006.229.04:50:35.77#ibcon#end of sib2, iclass 19, count 0 2006.229.04:50:35.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:50:35.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:50:35.77#ibcon#[25=USB\r\n] 2006.229.04:50:35.77#ibcon#*before write, iclass 19, count 0 2006.229.04:50:35.77#ibcon#enter sib2, iclass 19, count 0 2006.229.04:50:35.77#ibcon#flushed, iclass 19, count 0 2006.229.04:50:35.77#ibcon#about to write, iclass 19, count 0 2006.229.04:50:35.77#ibcon#wrote, iclass 19, count 0 2006.229.04:50:35.77#ibcon#about to read 3, iclass 19, count 0 2006.229.04:50:35.80#ibcon#read 3, iclass 19, count 0 2006.229.04:50:35.80#ibcon#about to read 4, iclass 19, count 0 2006.229.04:50:35.80#ibcon#read 4, iclass 19, count 0 2006.229.04:50:35.80#ibcon#about to read 5, iclass 19, count 0 2006.229.04:50:35.80#ibcon#read 5, iclass 19, count 0 2006.229.04:50:35.80#ibcon#about to read 6, iclass 19, count 0 2006.229.04:50:35.80#ibcon#read 6, iclass 19, count 0 2006.229.04:50:35.80#ibcon#end of sib2, iclass 19, count 0 2006.229.04:50:35.80#ibcon#*after write, iclass 19, count 0 2006.229.04:50:35.80#ibcon#*before return 0, iclass 19, count 0 2006.229.04:50:35.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:35.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:35.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:50:35.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:50:35.80$vck44/valo=3,564.99 2006.229.04:50:35.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.04:50:35.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.04:50:35.80#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:35.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:35.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:35.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:35.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:50:35.80#ibcon#first serial, iclass 21, count 0 2006.229.04:50:35.80#ibcon#enter sib2, iclass 21, count 0 2006.229.04:50:35.80#ibcon#flushed, iclass 21, count 0 2006.229.04:50:35.80#ibcon#about to write, iclass 21, count 0 2006.229.04:50:35.80#ibcon#wrote, iclass 21, count 0 2006.229.04:50:35.80#ibcon#about to read 3, iclass 21, count 0 2006.229.04:50:35.82#ibcon#read 3, iclass 21, count 0 2006.229.04:50:35.82#ibcon#about to read 4, iclass 21, count 0 2006.229.04:50:35.82#ibcon#read 4, iclass 21, count 0 2006.229.04:50:35.82#ibcon#about to read 5, iclass 21, count 0 2006.229.04:50:35.82#ibcon#read 5, iclass 21, count 0 2006.229.04:50:35.82#ibcon#about to read 6, iclass 21, count 0 2006.229.04:50:35.82#ibcon#read 6, iclass 21, count 0 2006.229.04:50:35.82#ibcon#end of sib2, iclass 21, count 0 2006.229.04:50:35.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:50:35.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:50:35.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:50:35.82#ibcon#*before write, iclass 21, count 0 2006.229.04:50:35.82#ibcon#enter sib2, iclass 21, count 0 2006.229.04:50:35.82#ibcon#flushed, iclass 21, count 0 2006.229.04:50:35.82#ibcon#about to write, iclass 21, count 0 2006.229.04:50:35.82#ibcon#wrote, iclass 21, count 0 2006.229.04:50:35.82#ibcon#about to read 3, iclass 21, count 0 2006.229.04:50:35.86#ibcon#read 3, iclass 21, count 0 2006.229.04:50:35.86#ibcon#about to read 4, iclass 21, count 0 2006.229.04:50:35.86#ibcon#read 4, iclass 21, count 0 2006.229.04:50:35.86#ibcon#about to read 5, iclass 21, count 0 2006.229.04:50:35.86#ibcon#read 5, iclass 21, count 0 2006.229.04:50:35.86#ibcon#about to read 6, iclass 21, count 0 2006.229.04:50:35.86#ibcon#read 6, iclass 21, count 0 2006.229.04:50:35.86#ibcon#end of sib2, iclass 21, count 0 2006.229.04:50:35.86#ibcon#*after write, iclass 21, count 0 2006.229.04:50:35.86#ibcon#*before return 0, iclass 21, count 0 2006.229.04:50:35.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:35.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:35.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:50:35.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:50:35.86$vck44/va=3,6 2006.229.04:50:35.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.04:50:35.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.04:50:35.86#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:35.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:35.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:35.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:35.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.04:50:35.92#ibcon#first serial, iclass 23, count 2 2006.229.04:50:35.92#ibcon#enter sib2, iclass 23, count 2 2006.229.04:50:35.92#ibcon#flushed, iclass 23, count 2 2006.229.04:50:35.92#ibcon#about to write, iclass 23, count 2 2006.229.04:50:35.92#ibcon#wrote, iclass 23, count 2 2006.229.04:50:35.92#ibcon#about to read 3, iclass 23, count 2 2006.229.04:50:35.94#ibcon#read 3, iclass 23, count 2 2006.229.04:50:35.94#ibcon#about to read 4, iclass 23, count 2 2006.229.04:50:35.94#ibcon#read 4, iclass 23, count 2 2006.229.04:50:35.94#ibcon#about to read 5, iclass 23, count 2 2006.229.04:50:35.94#ibcon#read 5, iclass 23, count 2 2006.229.04:50:35.94#ibcon#about to read 6, iclass 23, count 2 2006.229.04:50:35.94#ibcon#read 6, iclass 23, count 2 2006.229.04:50:35.94#ibcon#end of sib2, iclass 23, count 2 2006.229.04:50:35.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.04:50:35.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.04:50:35.94#ibcon#[25=AT03-06\r\n] 2006.229.04:50:35.94#ibcon#*before write, iclass 23, count 2 2006.229.04:50:35.94#ibcon#enter sib2, iclass 23, count 2 2006.229.04:50:35.94#ibcon#flushed, iclass 23, count 2 2006.229.04:50:35.94#ibcon#about to write, iclass 23, count 2 2006.229.04:50:35.94#ibcon#wrote, iclass 23, count 2 2006.229.04:50:35.94#ibcon#about to read 3, iclass 23, count 2 2006.229.04:50:35.97#ibcon#read 3, iclass 23, count 2 2006.229.04:50:35.97#ibcon#about to read 4, iclass 23, count 2 2006.229.04:50:35.97#ibcon#read 4, iclass 23, count 2 2006.229.04:50:35.97#ibcon#about to read 5, iclass 23, count 2 2006.229.04:50:35.97#ibcon#read 5, iclass 23, count 2 2006.229.04:50:35.97#ibcon#about to read 6, iclass 23, count 2 2006.229.04:50:35.97#ibcon#read 6, iclass 23, count 2 2006.229.04:50:35.97#ibcon#end of sib2, iclass 23, count 2 2006.229.04:50:35.97#ibcon#*after write, iclass 23, count 2 2006.229.04:50:35.97#ibcon#*before return 0, iclass 23, count 2 2006.229.04:50:35.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:35.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:35.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.04:50:35.97#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:35.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:36.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:36.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:36.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:50:36.09#ibcon#first serial, iclass 23, count 0 2006.229.04:50:36.09#ibcon#enter sib2, iclass 23, count 0 2006.229.04:50:36.09#ibcon#flushed, iclass 23, count 0 2006.229.04:50:36.09#ibcon#about to write, iclass 23, count 0 2006.229.04:50:36.09#ibcon#wrote, iclass 23, count 0 2006.229.04:50:36.09#ibcon#about to read 3, iclass 23, count 0 2006.229.04:50:36.11#ibcon#read 3, iclass 23, count 0 2006.229.04:50:36.11#ibcon#about to read 4, iclass 23, count 0 2006.229.04:50:36.11#ibcon#read 4, iclass 23, count 0 2006.229.04:50:36.11#ibcon#about to read 5, iclass 23, count 0 2006.229.04:50:36.11#ibcon#read 5, iclass 23, count 0 2006.229.04:50:36.11#ibcon#about to read 6, iclass 23, count 0 2006.229.04:50:36.11#ibcon#read 6, iclass 23, count 0 2006.229.04:50:36.11#ibcon#end of sib2, iclass 23, count 0 2006.229.04:50:36.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:50:36.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:50:36.11#ibcon#[25=USB\r\n] 2006.229.04:50:36.11#ibcon#*before write, iclass 23, count 0 2006.229.04:50:36.11#ibcon#enter sib2, iclass 23, count 0 2006.229.04:50:36.11#ibcon#flushed, iclass 23, count 0 2006.229.04:50:36.11#ibcon#about to write, iclass 23, count 0 2006.229.04:50:36.11#ibcon#wrote, iclass 23, count 0 2006.229.04:50:36.11#ibcon#about to read 3, iclass 23, count 0 2006.229.04:50:36.14#ibcon#read 3, iclass 23, count 0 2006.229.04:50:36.14#ibcon#about to read 4, iclass 23, count 0 2006.229.04:50:36.14#ibcon#read 4, iclass 23, count 0 2006.229.04:50:36.14#ibcon#about to read 5, iclass 23, count 0 2006.229.04:50:36.14#ibcon#read 5, iclass 23, count 0 2006.229.04:50:36.14#ibcon#about to read 6, iclass 23, count 0 2006.229.04:50:36.14#ibcon#read 6, iclass 23, count 0 2006.229.04:50:36.14#ibcon#end of sib2, iclass 23, count 0 2006.229.04:50:36.14#ibcon#*after write, iclass 23, count 0 2006.229.04:50:36.14#ibcon#*before return 0, iclass 23, count 0 2006.229.04:50:36.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:36.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:36.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:50:36.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:50:36.14$vck44/valo=4,624.99 2006.229.04:50:36.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.04:50:36.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.04:50:36.14#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:36.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:36.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:36.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:36.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:50:36.14#ibcon#first serial, iclass 25, count 0 2006.229.04:50:36.14#ibcon#enter sib2, iclass 25, count 0 2006.229.04:50:36.14#ibcon#flushed, iclass 25, count 0 2006.229.04:50:36.14#ibcon#about to write, iclass 25, count 0 2006.229.04:50:36.14#ibcon#wrote, iclass 25, count 0 2006.229.04:50:36.14#ibcon#about to read 3, iclass 25, count 0 2006.229.04:50:36.16#ibcon#read 3, iclass 25, count 0 2006.229.04:50:36.16#ibcon#about to read 4, iclass 25, count 0 2006.229.04:50:36.16#ibcon#read 4, iclass 25, count 0 2006.229.04:50:36.16#ibcon#about to read 5, iclass 25, count 0 2006.229.04:50:36.16#ibcon#read 5, iclass 25, count 0 2006.229.04:50:36.16#ibcon#about to read 6, iclass 25, count 0 2006.229.04:50:36.16#ibcon#read 6, iclass 25, count 0 2006.229.04:50:36.16#ibcon#end of sib2, iclass 25, count 0 2006.229.04:50:36.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:50:36.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:50:36.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:50:36.16#ibcon#*before write, iclass 25, count 0 2006.229.04:50:36.16#ibcon#enter sib2, iclass 25, count 0 2006.229.04:50:36.16#ibcon#flushed, iclass 25, count 0 2006.229.04:50:36.16#ibcon#about to write, iclass 25, count 0 2006.229.04:50:36.16#ibcon#wrote, iclass 25, count 0 2006.229.04:50:36.16#ibcon#about to read 3, iclass 25, count 0 2006.229.04:50:36.20#ibcon#read 3, iclass 25, count 0 2006.229.04:50:36.20#ibcon#about to read 4, iclass 25, count 0 2006.229.04:50:36.20#ibcon#read 4, iclass 25, count 0 2006.229.04:50:36.20#ibcon#about to read 5, iclass 25, count 0 2006.229.04:50:36.20#ibcon#read 5, iclass 25, count 0 2006.229.04:50:36.20#ibcon#about to read 6, iclass 25, count 0 2006.229.04:50:36.20#ibcon#read 6, iclass 25, count 0 2006.229.04:50:36.20#ibcon#end of sib2, iclass 25, count 0 2006.229.04:50:36.20#ibcon#*after write, iclass 25, count 0 2006.229.04:50:36.20#ibcon#*before return 0, iclass 25, count 0 2006.229.04:50:36.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:36.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:36.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:50:36.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:50:36.20$vck44/va=4,7 2006.229.04:50:36.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.04:50:36.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.04:50:36.20#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:36.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:36.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:36.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:36.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.04:50:36.26#ibcon#first serial, iclass 27, count 2 2006.229.04:50:36.26#ibcon#enter sib2, iclass 27, count 2 2006.229.04:50:36.26#ibcon#flushed, iclass 27, count 2 2006.229.04:50:36.26#ibcon#about to write, iclass 27, count 2 2006.229.04:50:36.26#ibcon#wrote, iclass 27, count 2 2006.229.04:50:36.26#ibcon#about to read 3, iclass 27, count 2 2006.229.04:50:36.28#ibcon#read 3, iclass 27, count 2 2006.229.04:50:36.28#ibcon#about to read 4, iclass 27, count 2 2006.229.04:50:36.28#ibcon#read 4, iclass 27, count 2 2006.229.04:50:36.28#ibcon#about to read 5, iclass 27, count 2 2006.229.04:50:36.28#ibcon#read 5, iclass 27, count 2 2006.229.04:50:36.28#ibcon#about to read 6, iclass 27, count 2 2006.229.04:50:36.28#ibcon#read 6, iclass 27, count 2 2006.229.04:50:36.28#ibcon#end of sib2, iclass 27, count 2 2006.229.04:50:36.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.04:50:36.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.04:50:36.28#ibcon#[25=AT04-07\r\n] 2006.229.04:50:36.28#ibcon#*before write, iclass 27, count 2 2006.229.04:50:36.28#ibcon#enter sib2, iclass 27, count 2 2006.229.04:50:36.28#ibcon#flushed, iclass 27, count 2 2006.229.04:50:36.28#ibcon#about to write, iclass 27, count 2 2006.229.04:50:36.28#ibcon#wrote, iclass 27, count 2 2006.229.04:50:36.28#ibcon#about to read 3, iclass 27, count 2 2006.229.04:50:36.31#ibcon#read 3, iclass 27, count 2 2006.229.04:50:36.31#ibcon#about to read 4, iclass 27, count 2 2006.229.04:50:36.31#ibcon#read 4, iclass 27, count 2 2006.229.04:50:36.31#ibcon#about to read 5, iclass 27, count 2 2006.229.04:50:36.31#ibcon#read 5, iclass 27, count 2 2006.229.04:50:36.31#ibcon#about to read 6, iclass 27, count 2 2006.229.04:50:36.31#ibcon#read 6, iclass 27, count 2 2006.229.04:50:36.31#ibcon#end of sib2, iclass 27, count 2 2006.229.04:50:36.31#ibcon#*after write, iclass 27, count 2 2006.229.04:50:36.31#ibcon#*before return 0, iclass 27, count 2 2006.229.04:50:36.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:36.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:36.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.04:50:36.31#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:36.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:36.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:36.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:36.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:50:36.43#ibcon#first serial, iclass 27, count 0 2006.229.04:50:36.43#ibcon#enter sib2, iclass 27, count 0 2006.229.04:50:36.43#ibcon#flushed, iclass 27, count 0 2006.229.04:50:36.43#ibcon#about to write, iclass 27, count 0 2006.229.04:50:36.43#ibcon#wrote, iclass 27, count 0 2006.229.04:50:36.43#ibcon#about to read 3, iclass 27, count 0 2006.229.04:50:36.45#ibcon#read 3, iclass 27, count 0 2006.229.04:50:36.45#ibcon#about to read 4, iclass 27, count 0 2006.229.04:50:36.45#ibcon#read 4, iclass 27, count 0 2006.229.04:50:36.45#ibcon#about to read 5, iclass 27, count 0 2006.229.04:50:36.45#ibcon#read 5, iclass 27, count 0 2006.229.04:50:36.45#ibcon#about to read 6, iclass 27, count 0 2006.229.04:50:36.45#ibcon#read 6, iclass 27, count 0 2006.229.04:50:36.45#ibcon#end of sib2, iclass 27, count 0 2006.229.04:50:36.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:50:36.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:50:36.45#ibcon#[25=USB\r\n] 2006.229.04:50:36.45#ibcon#*before write, iclass 27, count 0 2006.229.04:50:36.45#ibcon#enter sib2, iclass 27, count 0 2006.229.04:50:36.45#ibcon#flushed, iclass 27, count 0 2006.229.04:50:36.45#ibcon#about to write, iclass 27, count 0 2006.229.04:50:36.45#ibcon#wrote, iclass 27, count 0 2006.229.04:50:36.45#ibcon#about to read 3, iclass 27, count 0 2006.229.04:50:36.48#ibcon#read 3, iclass 27, count 0 2006.229.04:50:36.48#ibcon#about to read 4, iclass 27, count 0 2006.229.04:50:36.48#ibcon#read 4, iclass 27, count 0 2006.229.04:50:36.48#ibcon#about to read 5, iclass 27, count 0 2006.229.04:50:36.48#ibcon#read 5, iclass 27, count 0 2006.229.04:50:36.48#ibcon#about to read 6, iclass 27, count 0 2006.229.04:50:36.48#ibcon#read 6, iclass 27, count 0 2006.229.04:50:36.48#ibcon#end of sib2, iclass 27, count 0 2006.229.04:50:36.48#ibcon#*after write, iclass 27, count 0 2006.229.04:50:36.48#ibcon#*before return 0, iclass 27, count 0 2006.229.04:50:36.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:36.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:36.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:50:36.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:50:36.48$vck44/valo=5,734.99 2006.229.04:50:36.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.04:50:36.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.04:50:36.48#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:36.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:36.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:36.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:36.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:50:36.48#ibcon#first serial, iclass 29, count 0 2006.229.04:50:36.48#ibcon#enter sib2, iclass 29, count 0 2006.229.04:50:36.48#ibcon#flushed, iclass 29, count 0 2006.229.04:50:36.48#ibcon#about to write, iclass 29, count 0 2006.229.04:50:36.48#ibcon#wrote, iclass 29, count 0 2006.229.04:50:36.48#ibcon#about to read 3, iclass 29, count 0 2006.229.04:50:36.50#ibcon#read 3, iclass 29, count 0 2006.229.04:50:36.50#ibcon#about to read 4, iclass 29, count 0 2006.229.04:50:36.50#ibcon#read 4, iclass 29, count 0 2006.229.04:50:36.50#ibcon#about to read 5, iclass 29, count 0 2006.229.04:50:36.50#ibcon#read 5, iclass 29, count 0 2006.229.04:50:36.50#ibcon#about to read 6, iclass 29, count 0 2006.229.04:50:36.50#ibcon#read 6, iclass 29, count 0 2006.229.04:50:36.50#ibcon#end of sib2, iclass 29, count 0 2006.229.04:50:36.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:50:36.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:50:36.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:50:36.50#ibcon#*before write, iclass 29, count 0 2006.229.04:50:36.50#ibcon#enter sib2, iclass 29, count 0 2006.229.04:50:36.50#ibcon#flushed, iclass 29, count 0 2006.229.04:50:36.50#ibcon#about to write, iclass 29, count 0 2006.229.04:50:36.50#ibcon#wrote, iclass 29, count 0 2006.229.04:50:36.50#ibcon#about to read 3, iclass 29, count 0 2006.229.04:50:36.54#ibcon#read 3, iclass 29, count 0 2006.229.04:50:36.54#ibcon#about to read 4, iclass 29, count 0 2006.229.04:50:36.54#ibcon#read 4, iclass 29, count 0 2006.229.04:50:36.54#ibcon#about to read 5, iclass 29, count 0 2006.229.04:50:36.54#ibcon#read 5, iclass 29, count 0 2006.229.04:50:36.54#ibcon#about to read 6, iclass 29, count 0 2006.229.04:50:36.54#ibcon#read 6, iclass 29, count 0 2006.229.04:50:36.54#ibcon#end of sib2, iclass 29, count 0 2006.229.04:50:36.54#ibcon#*after write, iclass 29, count 0 2006.229.04:50:36.54#ibcon#*before return 0, iclass 29, count 0 2006.229.04:50:36.54#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:36.54#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:36.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:50:36.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:50:36.54$vck44/va=5,4 2006.229.04:50:36.54#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.04:50:36.54#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.04:50:36.54#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:36.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:36.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:36.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:36.60#ibcon#enter wrdev, iclass 31, count 2 2006.229.04:50:36.60#ibcon#first serial, iclass 31, count 2 2006.229.04:50:36.60#ibcon#enter sib2, iclass 31, count 2 2006.229.04:50:36.60#ibcon#flushed, iclass 31, count 2 2006.229.04:50:36.60#ibcon#about to write, iclass 31, count 2 2006.229.04:50:36.60#ibcon#wrote, iclass 31, count 2 2006.229.04:50:36.60#ibcon#about to read 3, iclass 31, count 2 2006.229.04:50:36.62#ibcon#read 3, iclass 31, count 2 2006.229.04:50:36.62#ibcon#about to read 4, iclass 31, count 2 2006.229.04:50:36.62#ibcon#read 4, iclass 31, count 2 2006.229.04:50:36.62#ibcon#about to read 5, iclass 31, count 2 2006.229.04:50:36.62#ibcon#read 5, iclass 31, count 2 2006.229.04:50:36.62#ibcon#about to read 6, iclass 31, count 2 2006.229.04:50:36.62#ibcon#read 6, iclass 31, count 2 2006.229.04:50:36.62#ibcon#end of sib2, iclass 31, count 2 2006.229.04:50:36.62#ibcon#*mode == 0, iclass 31, count 2 2006.229.04:50:36.62#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.04:50:36.62#ibcon#[25=AT05-04\r\n] 2006.229.04:50:36.62#ibcon#*before write, iclass 31, count 2 2006.229.04:50:36.62#ibcon#enter sib2, iclass 31, count 2 2006.229.04:50:36.62#ibcon#flushed, iclass 31, count 2 2006.229.04:50:36.62#ibcon#about to write, iclass 31, count 2 2006.229.04:50:36.62#ibcon#wrote, iclass 31, count 2 2006.229.04:50:36.62#ibcon#about to read 3, iclass 31, count 2 2006.229.04:50:36.65#ibcon#read 3, iclass 31, count 2 2006.229.04:50:36.65#ibcon#about to read 4, iclass 31, count 2 2006.229.04:50:36.65#ibcon#read 4, iclass 31, count 2 2006.229.04:50:36.65#ibcon#about to read 5, iclass 31, count 2 2006.229.04:50:36.65#ibcon#read 5, iclass 31, count 2 2006.229.04:50:36.65#ibcon#about to read 6, iclass 31, count 2 2006.229.04:50:36.65#ibcon#read 6, iclass 31, count 2 2006.229.04:50:36.65#ibcon#end of sib2, iclass 31, count 2 2006.229.04:50:36.65#ibcon#*after write, iclass 31, count 2 2006.229.04:50:36.65#ibcon#*before return 0, iclass 31, count 2 2006.229.04:50:36.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:36.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:36.65#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.04:50:36.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:36.65#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:36.77#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:36.77#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:36.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:50:36.77#ibcon#first serial, iclass 31, count 0 2006.229.04:50:36.77#ibcon#enter sib2, iclass 31, count 0 2006.229.04:50:36.77#ibcon#flushed, iclass 31, count 0 2006.229.04:50:36.77#ibcon#about to write, iclass 31, count 0 2006.229.04:50:36.77#ibcon#wrote, iclass 31, count 0 2006.229.04:50:36.77#ibcon#about to read 3, iclass 31, count 0 2006.229.04:50:36.79#ibcon#read 3, iclass 31, count 0 2006.229.04:50:36.79#ibcon#about to read 4, iclass 31, count 0 2006.229.04:50:36.79#ibcon#read 4, iclass 31, count 0 2006.229.04:50:36.79#ibcon#about to read 5, iclass 31, count 0 2006.229.04:50:36.79#ibcon#read 5, iclass 31, count 0 2006.229.04:50:36.79#ibcon#about to read 6, iclass 31, count 0 2006.229.04:50:36.79#ibcon#read 6, iclass 31, count 0 2006.229.04:50:36.79#ibcon#end of sib2, iclass 31, count 0 2006.229.04:50:36.79#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:50:36.79#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:50:36.79#ibcon#[25=USB\r\n] 2006.229.04:50:36.79#ibcon#*before write, iclass 31, count 0 2006.229.04:50:36.79#ibcon#enter sib2, iclass 31, count 0 2006.229.04:50:36.79#ibcon#flushed, iclass 31, count 0 2006.229.04:50:36.79#ibcon#about to write, iclass 31, count 0 2006.229.04:50:36.79#ibcon#wrote, iclass 31, count 0 2006.229.04:50:36.79#ibcon#about to read 3, iclass 31, count 0 2006.229.04:50:36.82#ibcon#read 3, iclass 31, count 0 2006.229.04:50:36.82#ibcon#about to read 4, iclass 31, count 0 2006.229.04:50:36.82#ibcon#read 4, iclass 31, count 0 2006.229.04:50:36.82#ibcon#about to read 5, iclass 31, count 0 2006.229.04:50:36.82#ibcon#read 5, iclass 31, count 0 2006.229.04:50:36.82#ibcon#about to read 6, iclass 31, count 0 2006.229.04:50:36.82#ibcon#read 6, iclass 31, count 0 2006.229.04:50:36.82#ibcon#end of sib2, iclass 31, count 0 2006.229.04:50:36.82#ibcon#*after write, iclass 31, count 0 2006.229.04:50:36.82#ibcon#*before return 0, iclass 31, count 0 2006.229.04:50:36.82#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:36.82#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:36.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:50:36.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:50:36.82$vck44/valo=6,814.99 2006.229.04:50:36.82#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.04:50:36.82#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.04:50:36.82#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:36.82#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:36.82#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:36.82#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:36.82#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:50:36.82#ibcon#first serial, iclass 33, count 0 2006.229.04:50:36.82#ibcon#enter sib2, iclass 33, count 0 2006.229.04:50:36.82#ibcon#flushed, iclass 33, count 0 2006.229.04:50:36.82#ibcon#about to write, iclass 33, count 0 2006.229.04:50:36.82#ibcon#wrote, iclass 33, count 0 2006.229.04:50:36.82#ibcon#about to read 3, iclass 33, count 0 2006.229.04:50:36.84#ibcon#read 3, iclass 33, count 0 2006.229.04:50:36.84#ibcon#about to read 4, iclass 33, count 0 2006.229.04:50:36.84#ibcon#read 4, iclass 33, count 0 2006.229.04:50:36.84#ibcon#about to read 5, iclass 33, count 0 2006.229.04:50:36.84#ibcon#read 5, iclass 33, count 0 2006.229.04:50:36.84#ibcon#about to read 6, iclass 33, count 0 2006.229.04:50:36.84#ibcon#read 6, iclass 33, count 0 2006.229.04:50:36.84#ibcon#end of sib2, iclass 33, count 0 2006.229.04:50:36.84#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:50:36.84#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:50:36.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:50:36.84#ibcon#*before write, iclass 33, count 0 2006.229.04:50:36.84#ibcon#enter sib2, iclass 33, count 0 2006.229.04:50:36.84#ibcon#flushed, iclass 33, count 0 2006.229.04:50:36.84#ibcon#about to write, iclass 33, count 0 2006.229.04:50:36.84#ibcon#wrote, iclass 33, count 0 2006.229.04:50:36.84#ibcon#about to read 3, iclass 33, count 0 2006.229.04:50:36.88#ibcon#read 3, iclass 33, count 0 2006.229.04:50:36.88#ibcon#about to read 4, iclass 33, count 0 2006.229.04:50:36.88#ibcon#read 4, iclass 33, count 0 2006.229.04:50:36.88#ibcon#about to read 5, iclass 33, count 0 2006.229.04:50:36.88#ibcon#read 5, iclass 33, count 0 2006.229.04:50:36.88#ibcon#about to read 6, iclass 33, count 0 2006.229.04:50:36.88#ibcon#read 6, iclass 33, count 0 2006.229.04:50:36.88#ibcon#end of sib2, iclass 33, count 0 2006.229.04:50:36.88#ibcon#*after write, iclass 33, count 0 2006.229.04:50:36.88#ibcon#*before return 0, iclass 33, count 0 2006.229.04:50:36.88#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:36.88#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:36.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:50:36.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:50:36.88$vck44/va=6,4 2006.229.04:50:36.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.04:50:36.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.04:50:36.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:36.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:36.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:36.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:36.94#ibcon#enter wrdev, iclass 35, count 2 2006.229.04:50:36.94#ibcon#first serial, iclass 35, count 2 2006.229.04:50:36.94#ibcon#enter sib2, iclass 35, count 2 2006.229.04:50:36.94#ibcon#flushed, iclass 35, count 2 2006.229.04:50:36.94#ibcon#about to write, iclass 35, count 2 2006.229.04:50:36.94#ibcon#wrote, iclass 35, count 2 2006.229.04:50:36.94#ibcon#about to read 3, iclass 35, count 2 2006.229.04:50:36.96#ibcon#read 3, iclass 35, count 2 2006.229.04:50:36.96#ibcon#about to read 4, iclass 35, count 2 2006.229.04:50:36.96#ibcon#read 4, iclass 35, count 2 2006.229.04:50:36.96#ibcon#about to read 5, iclass 35, count 2 2006.229.04:50:36.96#ibcon#read 5, iclass 35, count 2 2006.229.04:50:36.96#ibcon#about to read 6, iclass 35, count 2 2006.229.04:50:36.96#ibcon#read 6, iclass 35, count 2 2006.229.04:50:36.96#ibcon#end of sib2, iclass 35, count 2 2006.229.04:50:36.96#ibcon#*mode == 0, iclass 35, count 2 2006.229.04:50:36.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.04:50:36.96#ibcon#[25=AT06-04\r\n] 2006.229.04:50:36.96#ibcon#*before write, iclass 35, count 2 2006.229.04:50:36.96#ibcon#enter sib2, iclass 35, count 2 2006.229.04:50:36.96#ibcon#flushed, iclass 35, count 2 2006.229.04:50:36.96#ibcon#about to write, iclass 35, count 2 2006.229.04:50:36.96#ibcon#wrote, iclass 35, count 2 2006.229.04:50:36.96#ibcon#about to read 3, iclass 35, count 2 2006.229.04:50:36.99#ibcon#read 3, iclass 35, count 2 2006.229.04:50:36.99#ibcon#about to read 4, iclass 35, count 2 2006.229.04:50:36.99#ibcon#read 4, iclass 35, count 2 2006.229.04:50:36.99#ibcon#about to read 5, iclass 35, count 2 2006.229.04:50:36.99#ibcon#read 5, iclass 35, count 2 2006.229.04:50:36.99#ibcon#about to read 6, iclass 35, count 2 2006.229.04:50:36.99#ibcon#read 6, iclass 35, count 2 2006.229.04:50:36.99#ibcon#end of sib2, iclass 35, count 2 2006.229.04:50:36.99#ibcon#*after write, iclass 35, count 2 2006.229.04:50:36.99#ibcon#*before return 0, iclass 35, count 2 2006.229.04:50:36.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:36.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:36.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.04:50:36.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:36.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:37.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:37.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:37.11#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:50:37.11#ibcon#first serial, iclass 35, count 0 2006.229.04:50:37.11#ibcon#enter sib2, iclass 35, count 0 2006.229.04:50:37.11#ibcon#flushed, iclass 35, count 0 2006.229.04:50:37.11#ibcon#about to write, iclass 35, count 0 2006.229.04:50:37.11#ibcon#wrote, iclass 35, count 0 2006.229.04:50:37.11#ibcon#about to read 3, iclass 35, count 0 2006.229.04:50:37.13#ibcon#read 3, iclass 35, count 0 2006.229.04:50:37.13#ibcon#about to read 4, iclass 35, count 0 2006.229.04:50:37.13#ibcon#read 4, iclass 35, count 0 2006.229.04:50:37.13#ibcon#about to read 5, iclass 35, count 0 2006.229.04:50:37.13#ibcon#read 5, iclass 35, count 0 2006.229.04:50:37.13#ibcon#about to read 6, iclass 35, count 0 2006.229.04:50:37.13#ibcon#read 6, iclass 35, count 0 2006.229.04:50:37.13#ibcon#end of sib2, iclass 35, count 0 2006.229.04:50:37.13#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:50:37.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:50:37.13#ibcon#[25=USB\r\n] 2006.229.04:50:37.13#ibcon#*before write, iclass 35, count 0 2006.229.04:50:37.13#ibcon#enter sib2, iclass 35, count 0 2006.229.04:50:37.13#ibcon#flushed, iclass 35, count 0 2006.229.04:50:37.13#ibcon#about to write, iclass 35, count 0 2006.229.04:50:37.13#ibcon#wrote, iclass 35, count 0 2006.229.04:50:37.13#ibcon#about to read 3, iclass 35, count 0 2006.229.04:50:37.16#ibcon#read 3, iclass 35, count 0 2006.229.04:50:37.16#ibcon#about to read 4, iclass 35, count 0 2006.229.04:50:37.16#ibcon#read 4, iclass 35, count 0 2006.229.04:50:37.16#ibcon#about to read 5, iclass 35, count 0 2006.229.04:50:37.16#ibcon#read 5, iclass 35, count 0 2006.229.04:50:37.16#ibcon#about to read 6, iclass 35, count 0 2006.229.04:50:37.16#ibcon#read 6, iclass 35, count 0 2006.229.04:50:37.16#ibcon#end of sib2, iclass 35, count 0 2006.229.04:50:37.16#ibcon#*after write, iclass 35, count 0 2006.229.04:50:37.16#ibcon#*before return 0, iclass 35, count 0 2006.229.04:50:37.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:37.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:37.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:50:37.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:50:37.16$vck44/valo=7,864.99 2006.229.04:50:37.16#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.04:50:37.16#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.04:50:37.16#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:37.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:50:37.16#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:50:37.16#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:50:37.16#ibcon#enter wrdev, iclass 37, count 0 2006.229.04:50:37.16#ibcon#first serial, iclass 37, count 0 2006.229.04:50:37.16#ibcon#enter sib2, iclass 37, count 0 2006.229.04:50:37.16#ibcon#flushed, iclass 37, count 0 2006.229.04:50:37.16#ibcon#about to write, iclass 37, count 0 2006.229.04:50:37.16#ibcon#wrote, iclass 37, count 0 2006.229.04:50:37.16#ibcon#about to read 3, iclass 37, count 0 2006.229.04:50:37.18#ibcon#read 3, iclass 37, count 0 2006.229.04:50:37.18#ibcon#about to read 4, iclass 37, count 0 2006.229.04:50:37.18#ibcon#read 4, iclass 37, count 0 2006.229.04:50:37.18#ibcon#about to read 5, iclass 37, count 0 2006.229.04:50:37.18#ibcon#read 5, iclass 37, count 0 2006.229.04:50:37.18#ibcon#about to read 6, iclass 37, count 0 2006.229.04:50:37.18#ibcon#read 6, iclass 37, count 0 2006.229.04:50:37.18#ibcon#end of sib2, iclass 37, count 0 2006.229.04:50:37.18#ibcon#*mode == 0, iclass 37, count 0 2006.229.04:50:37.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.04:50:37.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:50:37.18#ibcon#*before write, iclass 37, count 0 2006.229.04:50:37.18#ibcon#enter sib2, iclass 37, count 0 2006.229.04:50:37.18#ibcon#flushed, iclass 37, count 0 2006.229.04:50:37.18#ibcon#about to write, iclass 37, count 0 2006.229.04:50:37.18#ibcon#wrote, iclass 37, count 0 2006.229.04:50:37.18#ibcon#about to read 3, iclass 37, count 0 2006.229.04:50:37.22#ibcon#read 3, iclass 37, count 0 2006.229.04:50:37.22#ibcon#about to read 4, iclass 37, count 0 2006.229.04:50:37.22#ibcon#read 4, iclass 37, count 0 2006.229.04:50:37.22#ibcon#about to read 5, iclass 37, count 0 2006.229.04:50:37.22#ibcon#read 5, iclass 37, count 0 2006.229.04:50:37.22#ibcon#about to read 6, iclass 37, count 0 2006.229.04:50:37.22#ibcon#read 6, iclass 37, count 0 2006.229.04:50:37.22#ibcon#end of sib2, iclass 37, count 0 2006.229.04:50:37.22#ibcon#*after write, iclass 37, count 0 2006.229.04:50:37.22#ibcon#*before return 0, iclass 37, count 0 2006.229.04:50:37.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:50:37.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.04:50:37.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.04:50:37.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.04:50:37.22$vck44/va=7,5 2006.229.04:50:37.22#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.04:50:37.22#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.04:50:37.22#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:37.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:50:37.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:50:37.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:50:37.28#ibcon#enter wrdev, iclass 39, count 2 2006.229.04:50:37.28#ibcon#first serial, iclass 39, count 2 2006.229.04:50:37.28#ibcon#enter sib2, iclass 39, count 2 2006.229.04:50:37.28#ibcon#flushed, iclass 39, count 2 2006.229.04:50:37.28#ibcon#about to write, iclass 39, count 2 2006.229.04:50:37.28#ibcon#wrote, iclass 39, count 2 2006.229.04:50:37.28#ibcon#about to read 3, iclass 39, count 2 2006.229.04:50:37.30#ibcon#read 3, iclass 39, count 2 2006.229.04:50:37.30#ibcon#about to read 4, iclass 39, count 2 2006.229.04:50:37.30#ibcon#read 4, iclass 39, count 2 2006.229.04:50:37.30#ibcon#about to read 5, iclass 39, count 2 2006.229.04:50:37.30#ibcon#read 5, iclass 39, count 2 2006.229.04:50:37.30#ibcon#about to read 6, iclass 39, count 2 2006.229.04:50:37.30#ibcon#read 6, iclass 39, count 2 2006.229.04:50:37.30#ibcon#end of sib2, iclass 39, count 2 2006.229.04:50:37.30#ibcon#*mode == 0, iclass 39, count 2 2006.229.04:50:37.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.04:50:37.30#ibcon#[25=AT07-05\r\n] 2006.229.04:50:37.30#ibcon#*before write, iclass 39, count 2 2006.229.04:50:37.30#ibcon#enter sib2, iclass 39, count 2 2006.229.04:50:37.30#ibcon#flushed, iclass 39, count 2 2006.229.04:50:37.30#ibcon#about to write, iclass 39, count 2 2006.229.04:50:37.30#ibcon#wrote, iclass 39, count 2 2006.229.04:50:37.30#ibcon#about to read 3, iclass 39, count 2 2006.229.04:50:37.33#ibcon#read 3, iclass 39, count 2 2006.229.04:50:37.33#ibcon#about to read 4, iclass 39, count 2 2006.229.04:50:37.33#ibcon#read 4, iclass 39, count 2 2006.229.04:50:37.33#ibcon#about to read 5, iclass 39, count 2 2006.229.04:50:37.33#ibcon#read 5, iclass 39, count 2 2006.229.04:50:37.33#ibcon#about to read 6, iclass 39, count 2 2006.229.04:50:37.33#ibcon#read 6, iclass 39, count 2 2006.229.04:50:37.33#ibcon#end of sib2, iclass 39, count 2 2006.229.04:50:37.33#ibcon#*after write, iclass 39, count 2 2006.229.04:50:37.33#ibcon#*before return 0, iclass 39, count 2 2006.229.04:50:37.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:50:37.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.04:50:37.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.04:50:37.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:37.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:50:37.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:50:37.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:50:37.45#ibcon#enter wrdev, iclass 39, count 0 2006.229.04:50:37.45#ibcon#first serial, iclass 39, count 0 2006.229.04:50:37.45#ibcon#enter sib2, iclass 39, count 0 2006.229.04:50:37.45#ibcon#flushed, iclass 39, count 0 2006.229.04:50:37.45#ibcon#about to write, iclass 39, count 0 2006.229.04:50:37.45#ibcon#wrote, iclass 39, count 0 2006.229.04:50:37.45#ibcon#about to read 3, iclass 39, count 0 2006.229.04:50:37.47#ibcon#read 3, iclass 39, count 0 2006.229.04:50:37.47#ibcon#about to read 4, iclass 39, count 0 2006.229.04:50:37.47#ibcon#read 4, iclass 39, count 0 2006.229.04:50:37.47#ibcon#about to read 5, iclass 39, count 0 2006.229.04:50:37.47#ibcon#read 5, iclass 39, count 0 2006.229.04:50:37.47#ibcon#about to read 6, iclass 39, count 0 2006.229.04:50:37.47#ibcon#read 6, iclass 39, count 0 2006.229.04:50:37.47#ibcon#end of sib2, iclass 39, count 0 2006.229.04:50:37.47#ibcon#*mode == 0, iclass 39, count 0 2006.229.04:50:37.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.04:50:37.47#ibcon#[25=USB\r\n] 2006.229.04:50:37.47#ibcon#*before write, iclass 39, count 0 2006.229.04:50:37.47#ibcon#enter sib2, iclass 39, count 0 2006.229.04:50:37.47#ibcon#flushed, iclass 39, count 0 2006.229.04:50:37.47#ibcon#about to write, iclass 39, count 0 2006.229.04:50:37.47#ibcon#wrote, iclass 39, count 0 2006.229.04:50:37.47#ibcon#about to read 3, iclass 39, count 0 2006.229.04:50:37.50#ibcon#read 3, iclass 39, count 0 2006.229.04:50:37.50#ibcon#about to read 4, iclass 39, count 0 2006.229.04:50:37.50#ibcon#read 4, iclass 39, count 0 2006.229.04:50:37.50#ibcon#about to read 5, iclass 39, count 0 2006.229.04:50:37.50#ibcon#read 5, iclass 39, count 0 2006.229.04:50:37.50#ibcon#about to read 6, iclass 39, count 0 2006.229.04:50:37.50#ibcon#read 6, iclass 39, count 0 2006.229.04:50:37.50#ibcon#end of sib2, iclass 39, count 0 2006.229.04:50:37.50#ibcon#*after write, iclass 39, count 0 2006.229.04:50:37.50#ibcon#*before return 0, iclass 39, count 0 2006.229.04:50:37.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:50:37.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.04:50:37.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.04:50:37.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.04:50:37.50$vck44/valo=8,884.99 2006.229.04:50:37.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.04:50:37.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.04:50:37.50#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:37.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:37.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:37.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:37.50#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:50:37.50#ibcon#first serial, iclass 3, count 0 2006.229.04:50:37.50#ibcon#enter sib2, iclass 3, count 0 2006.229.04:50:37.50#ibcon#flushed, iclass 3, count 0 2006.229.04:50:37.50#ibcon#about to write, iclass 3, count 0 2006.229.04:50:37.50#ibcon#wrote, iclass 3, count 0 2006.229.04:50:37.50#ibcon#about to read 3, iclass 3, count 0 2006.229.04:50:37.52#ibcon#read 3, iclass 3, count 0 2006.229.04:50:37.52#ibcon#about to read 4, iclass 3, count 0 2006.229.04:50:37.52#ibcon#read 4, iclass 3, count 0 2006.229.04:50:37.52#ibcon#about to read 5, iclass 3, count 0 2006.229.04:50:37.52#ibcon#read 5, iclass 3, count 0 2006.229.04:50:37.52#ibcon#about to read 6, iclass 3, count 0 2006.229.04:50:37.52#ibcon#read 6, iclass 3, count 0 2006.229.04:50:37.52#ibcon#end of sib2, iclass 3, count 0 2006.229.04:50:37.52#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:50:37.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:50:37.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:50:37.52#ibcon#*before write, iclass 3, count 0 2006.229.04:50:37.52#ibcon#enter sib2, iclass 3, count 0 2006.229.04:50:37.52#ibcon#flushed, iclass 3, count 0 2006.229.04:50:37.52#ibcon#about to write, iclass 3, count 0 2006.229.04:50:37.52#ibcon#wrote, iclass 3, count 0 2006.229.04:50:37.52#ibcon#about to read 3, iclass 3, count 0 2006.229.04:50:37.56#ibcon#read 3, iclass 3, count 0 2006.229.04:50:37.56#ibcon#about to read 4, iclass 3, count 0 2006.229.04:50:37.56#ibcon#read 4, iclass 3, count 0 2006.229.04:50:37.56#ibcon#about to read 5, iclass 3, count 0 2006.229.04:50:37.56#ibcon#read 5, iclass 3, count 0 2006.229.04:50:37.56#ibcon#about to read 6, iclass 3, count 0 2006.229.04:50:37.56#ibcon#read 6, iclass 3, count 0 2006.229.04:50:37.56#ibcon#end of sib2, iclass 3, count 0 2006.229.04:50:37.56#ibcon#*after write, iclass 3, count 0 2006.229.04:50:37.56#ibcon#*before return 0, iclass 3, count 0 2006.229.04:50:37.56#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:37.56#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:37.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:50:37.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:50:37.56$vck44/va=8,6 2006.229.04:50:37.56#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.04:50:37.56#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.04:50:37.56#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:37.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:37.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:37.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:37.62#ibcon#enter wrdev, iclass 5, count 2 2006.229.04:50:37.62#ibcon#first serial, iclass 5, count 2 2006.229.04:50:37.62#ibcon#enter sib2, iclass 5, count 2 2006.229.04:50:37.62#ibcon#flushed, iclass 5, count 2 2006.229.04:50:37.62#ibcon#about to write, iclass 5, count 2 2006.229.04:50:37.62#ibcon#wrote, iclass 5, count 2 2006.229.04:50:37.62#ibcon#about to read 3, iclass 5, count 2 2006.229.04:50:37.64#ibcon#read 3, iclass 5, count 2 2006.229.04:50:37.64#ibcon#about to read 4, iclass 5, count 2 2006.229.04:50:37.64#ibcon#read 4, iclass 5, count 2 2006.229.04:50:37.64#ibcon#about to read 5, iclass 5, count 2 2006.229.04:50:37.64#ibcon#read 5, iclass 5, count 2 2006.229.04:50:37.64#ibcon#about to read 6, iclass 5, count 2 2006.229.04:50:37.64#ibcon#read 6, iclass 5, count 2 2006.229.04:50:37.64#ibcon#end of sib2, iclass 5, count 2 2006.229.04:50:37.64#ibcon#*mode == 0, iclass 5, count 2 2006.229.04:50:37.64#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.04:50:37.64#ibcon#[25=AT08-06\r\n] 2006.229.04:50:37.64#ibcon#*before write, iclass 5, count 2 2006.229.04:50:37.64#ibcon#enter sib2, iclass 5, count 2 2006.229.04:50:37.64#ibcon#flushed, iclass 5, count 2 2006.229.04:50:37.64#ibcon#about to write, iclass 5, count 2 2006.229.04:50:37.64#ibcon#wrote, iclass 5, count 2 2006.229.04:50:37.64#ibcon#about to read 3, iclass 5, count 2 2006.229.04:50:37.67#ibcon#read 3, iclass 5, count 2 2006.229.04:50:37.67#ibcon#about to read 4, iclass 5, count 2 2006.229.04:50:37.67#ibcon#read 4, iclass 5, count 2 2006.229.04:50:37.67#ibcon#about to read 5, iclass 5, count 2 2006.229.04:50:37.67#ibcon#read 5, iclass 5, count 2 2006.229.04:50:37.67#ibcon#about to read 6, iclass 5, count 2 2006.229.04:50:37.67#ibcon#read 6, iclass 5, count 2 2006.229.04:50:37.67#ibcon#end of sib2, iclass 5, count 2 2006.229.04:50:37.67#ibcon#*after write, iclass 5, count 2 2006.229.04:50:37.67#ibcon#*before return 0, iclass 5, count 2 2006.229.04:50:37.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:37.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:37.67#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.04:50:37.67#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:37.67#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:37.79#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:37.79#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:37.79#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:50:37.79#ibcon#first serial, iclass 5, count 0 2006.229.04:50:37.79#ibcon#enter sib2, iclass 5, count 0 2006.229.04:50:37.79#ibcon#flushed, iclass 5, count 0 2006.229.04:50:37.79#ibcon#about to write, iclass 5, count 0 2006.229.04:50:37.79#ibcon#wrote, iclass 5, count 0 2006.229.04:50:37.79#ibcon#about to read 3, iclass 5, count 0 2006.229.04:50:37.81#ibcon#read 3, iclass 5, count 0 2006.229.04:50:37.81#ibcon#about to read 4, iclass 5, count 0 2006.229.04:50:37.81#ibcon#read 4, iclass 5, count 0 2006.229.04:50:37.81#ibcon#about to read 5, iclass 5, count 0 2006.229.04:50:37.81#ibcon#read 5, iclass 5, count 0 2006.229.04:50:37.81#ibcon#about to read 6, iclass 5, count 0 2006.229.04:50:37.81#ibcon#read 6, iclass 5, count 0 2006.229.04:50:37.81#ibcon#end of sib2, iclass 5, count 0 2006.229.04:50:37.81#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:50:37.81#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:50:37.81#ibcon#[25=USB\r\n] 2006.229.04:50:37.81#ibcon#*before write, iclass 5, count 0 2006.229.04:50:37.81#ibcon#enter sib2, iclass 5, count 0 2006.229.04:50:37.81#ibcon#flushed, iclass 5, count 0 2006.229.04:50:37.81#ibcon#about to write, iclass 5, count 0 2006.229.04:50:37.81#ibcon#wrote, iclass 5, count 0 2006.229.04:50:37.81#ibcon#about to read 3, iclass 5, count 0 2006.229.04:50:37.84#ibcon#read 3, iclass 5, count 0 2006.229.04:50:37.84#ibcon#about to read 4, iclass 5, count 0 2006.229.04:50:37.84#ibcon#read 4, iclass 5, count 0 2006.229.04:50:37.84#ibcon#about to read 5, iclass 5, count 0 2006.229.04:50:37.84#ibcon#read 5, iclass 5, count 0 2006.229.04:50:37.84#ibcon#about to read 6, iclass 5, count 0 2006.229.04:50:37.84#ibcon#read 6, iclass 5, count 0 2006.229.04:50:37.84#ibcon#end of sib2, iclass 5, count 0 2006.229.04:50:37.84#ibcon#*after write, iclass 5, count 0 2006.229.04:50:37.84#ibcon#*before return 0, iclass 5, count 0 2006.229.04:50:37.84#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:37.84#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:37.84#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:50:37.84#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:50:37.84$vck44/vblo=1,629.99 2006.229.04:50:37.84#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.04:50:37.84#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.04:50:37.84#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:37.84#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:37.84#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:37.84#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:37.84#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:50:37.84#ibcon#first serial, iclass 7, count 0 2006.229.04:50:37.84#ibcon#enter sib2, iclass 7, count 0 2006.229.04:50:37.84#ibcon#flushed, iclass 7, count 0 2006.229.04:50:37.84#ibcon#about to write, iclass 7, count 0 2006.229.04:50:37.84#ibcon#wrote, iclass 7, count 0 2006.229.04:50:37.84#ibcon#about to read 3, iclass 7, count 0 2006.229.04:50:37.86#ibcon#read 3, iclass 7, count 0 2006.229.04:50:37.86#ibcon#about to read 4, iclass 7, count 0 2006.229.04:50:37.86#ibcon#read 4, iclass 7, count 0 2006.229.04:50:37.86#ibcon#about to read 5, iclass 7, count 0 2006.229.04:50:37.86#ibcon#read 5, iclass 7, count 0 2006.229.04:50:37.86#ibcon#about to read 6, iclass 7, count 0 2006.229.04:50:37.86#ibcon#read 6, iclass 7, count 0 2006.229.04:50:37.86#ibcon#end of sib2, iclass 7, count 0 2006.229.04:50:37.86#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:50:37.86#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:50:37.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:50:37.86#ibcon#*before write, iclass 7, count 0 2006.229.04:50:37.86#ibcon#enter sib2, iclass 7, count 0 2006.229.04:50:37.86#ibcon#flushed, iclass 7, count 0 2006.229.04:50:37.86#ibcon#about to write, iclass 7, count 0 2006.229.04:50:37.86#ibcon#wrote, iclass 7, count 0 2006.229.04:50:37.86#ibcon#about to read 3, iclass 7, count 0 2006.229.04:50:37.90#ibcon#read 3, iclass 7, count 0 2006.229.04:50:37.90#ibcon#about to read 4, iclass 7, count 0 2006.229.04:50:37.90#ibcon#read 4, iclass 7, count 0 2006.229.04:50:37.90#ibcon#about to read 5, iclass 7, count 0 2006.229.04:50:37.90#ibcon#read 5, iclass 7, count 0 2006.229.04:50:37.90#ibcon#about to read 6, iclass 7, count 0 2006.229.04:50:37.90#ibcon#read 6, iclass 7, count 0 2006.229.04:50:37.90#ibcon#end of sib2, iclass 7, count 0 2006.229.04:50:37.90#ibcon#*after write, iclass 7, count 0 2006.229.04:50:37.90#ibcon#*before return 0, iclass 7, count 0 2006.229.04:50:37.90#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:37.90#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:37.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:50:37.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:50:37.90$vck44/vb=1,4 2006.229.04:50:37.90#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.04:50:37.90#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.04:50:37.90#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:37.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:50:37.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:50:37.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:50:37.90#ibcon#enter wrdev, iclass 11, count 2 2006.229.04:50:37.90#ibcon#first serial, iclass 11, count 2 2006.229.04:50:37.90#ibcon#enter sib2, iclass 11, count 2 2006.229.04:50:37.90#ibcon#flushed, iclass 11, count 2 2006.229.04:50:37.90#ibcon#about to write, iclass 11, count 2 2006.229.04:50:37.90#ibcon#wrote, iclass 11, count 2 2006.229.04:50:37.90#ibcon#about to read 3, iclass 11, count 2 2006.229.04:50:37.92#ibcon#read 3, iclass 11, count 2 2006.229.04:50:37.92#ibcon#about to read 4, iclass 11, count 2 2006.229.04:50:37.92#ibcon#read 4, iclass 11, count 2 2006.229.04:50:37.92#ibcon#about to read 5, iclass 11, count 2 2006.229.04:50:37.92#ibcon#read 5, iclass 11, count 2 2006.229.04:50:37.92#ibcon#about to read 6, iclass 11, count 2 2006.229.04:50:37.92#ibcon#read 6, iclass 11, count 2 2006.229.04:50:37.92#ibcon#end of sib2, iclass 11, count 2 2006.229.04:50:37.92#ibcon#*mode == 0, iclass 11, count 2 2006.229.04:50:37.92#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.04:50:37.92#ibcon#[27=AT01-04\r\n] 2006.229.04:50:37.92#ibcon#*before write, iclass 11, count 2 2006.229.04:50:37.92#ibcon#enter sib2, iclass 11, count 2 2006.229.04:50:37.92#ibcon#flushed, iclass 11, count 2 2006.229.04:50:37.92#ibcon#about to write, iclass 11, count 2 2006.229.04:50:37.92#ibcon#wrote, iclass 11, count 2 2006.229.04:50:37.92#ibcon#about to read 3, iclass 11, count 2 2006.229.04:50:37.95#ibcon#read 3, iclass 11, count 2 2006.229.04:50:37.95#ibcon#about to read 4, iclass 11, count 2 2006.229.04:50:37.95#ibcon#read 4, iclass 11, count 2 2006.229.04:50:37.95#ibcon#about to read 5, iclass 11, count 2 2006.229.04:50:37.95#ibcon#read 5, iclass 11, count 2 2006.229.04:50:37.95#ibcon#about to read 6, iclass 11, count 2 2006.229.04:50:37.95#ibcon#read 6, iclass 11, count 2 2006.229.04:50:37.95#ibcon#end of sib2, iclass 11, count 2 2006.229.04:50:37.95#ibcon#*after write, iclass 11, count 2 2006.229.04:50:37.95#ibcon#*before return 0, iclass 11, count 2 2006.229.04:50:37.95#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:50:37.95#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.04:50:37.95#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.04:50:37.95#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:37.95#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:50:38.07#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:50:38.07#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:50:38.07#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:50:38.07#ibcon#first serial, iclass 11, count 0 2006.229.04:50:38.07#ibcon#enter sib2, iclass 11, count 0 2006.229.04:50:38.07#ibcon#flushed, iclass 11, count 0 2006.229.04:50:38.07#ibcon#about to write, iclass 11, count 0 2006.229.04:50:38.07#ibcon#wrote, iclass 11, count 0 2006.229.04:50:38.07#ibcon#about to read 3, iclass 11, count 0 2006.229.04:50:38.09#ibcon#read 3, iclass 11, count 0 2006.229.04:50:38.09#ibcon#about to read 4, iclass 11, count 0 2006.229.04:50:38.09#ibcon#read 4, iclass 11, count 0 2006.229.04:50:38.09#ibcon#about to read 5, iclass 11, count 0 2006.229.04:50:38.09#ibcon#read 5, iclass 11, count 0 2006.229.04:50:38.09#ibcon#about to read 6, iclass 11, count 0 2006.229.04:50:38.09#ibcon#read 6, iclass 11, count 0 2006.229.04:50:38.09#ibcon#end of sib2, iclass 11, count 0 2006.229.04:50:38.09#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:50:38.09#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:50:38.09#ibcon#[27=USB\r\n] 2006.229.04:50:38.09#ibcon#*before write, iclass 11, count 0 2006.229.04:50:38.09#ibcon#enter sib2, iclass 11, count 0 2006.229.04:50:38.09#ibcon#flushed, iclass 11, count 0 2006.229.04:50:38.09#ibcon#about to write, iclass 11, count 0 2006.229.04:50:38.09#ibcon#wrote, iclass 11, count 0 2006.229.04:50:38.09#ibcon#about to read 3, iclass 11, count 0 2006.229.04:50:38.12#ibcon#read 3, iclass 11, count 0 2006.229.04:50:38.12#ibcon#about to read 4, iclass 11, count 0 2006.229.04:50:38.12#ibcon#read 4, iclass 11, count 0 2006.229.04:50:38.12#ibcon#about to read 5, iclass 11, count 0 2006.229.04:50:38.12#ibcon#read 5, iclass 11, count 0 2006.229.04:50:38.12#ibcon#about to read 6, iclass 11, count 0 2006.229.04:50:38.12#ibcon#read 6, iclass 11, count 0 2006.229.04:50:38.12#ibcon#end of sib2, iclass 11, count 0 2006.229.04:50:38.12#ibcon#*after write, iclass 11, count 0 2006.229.04:50:38.12#ibcon#*before return 0, iclass 11, count 0 2006.229.04:50:38.12#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:50:38.12#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.04:50:38.12#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:50:38.12#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:50:38.12$vck44/vblo=2,634.99 2006.229.04:50:38.12#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.04:50:38.12#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.04:50:38.12#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:38.12#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:38.12#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:38.12#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:38.12#ibcon#enter wrdev, iclass 13, count 0 2006.229.04:50:38.12#ibcon#first serial, iclass 13, count 0 2006.229.04:50:38.12#ibcon#enter sib2, iclass 13, count 0 2006.229.04:50:38.12#ibcon#flushed, iclass 13, count 0 2006.229.04:50:38.12#ibcon#about to write, iclass 13, count 0 2006.229.04:50:38.12#ibcon#wrote, iclass 13, count 0 2006.229.04:50:38.12#ibcon#about to read 3, iclass 13, count 0 2006.229.04:50:38.14#ibcon#read 3, iclass 13, count 0 2006.229.04:50:38.14#ibcon#about to read 4, iclass 13, count 0 2006.229.04:50:38.14#ibcon#read 4, iclass 13, count 0 2006.229.04:50:38.14#ibcon#about to read 5, iclass 13, count 0 2006.229.04:50:38.14#ibcon#read 5, iclass 13, count 0 2006.229.04:50:38.14#ibcon#about to read 6, iclass 13, count 0 2006.229.04:50:38.14#ibcon#read 6, iclass 13, count 0 2006.229.04:50:38.14#ibcon#end of sib2, iclass 13, count 0 2006.229.04:50:38.14#ibcon#*mode == 0, iclass 13, count 0 2006.229.04:50:38.14#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.04:50:38.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:50:38.14#ibcon#*before write, iclass 13, count 0 2006.229.04:50:38.14#ibcon#enter sib2, iclass 13, count 0 2006.229.04:50:38.14#ibcon#flushed, iclass 13, count 0 2006.229.04:50:38.14#ibcon#about to write, iclass 13, count 0 2006.229.04:50:38.14#ibcon#wrote, iclass 13, count 0 2006.229.04:50:38.14#ibcon#about to read 3, iclass 13, count 0 2006.229.04:50:38.18#ibcon#read 3, iclass 13, count 0 2006.229.04:50:38.18#ibcon#about to read 4, iclass 13, count 0 2006.229.04:50:38.18#ibcon#read 4, iclass 13, count 0 2006.229.04:50:38.18#ibcon#about to read 5, iclass 13, count 0 2006.229.04:50:38.18#ibcon#read 5, iclass 13, count 0 2006.229.04:50:38.18#ibcon#about to read 6, iclass 13, count 0 2006.229.04:50:38.18#ibcon#read 6, iclass 13, count 0 2006.229.04:50:38.18#ibcon#end of sib2, iclass 13, count 0 2006.229.04:50:38.18#ibcon#*after write, iclass 13, count 0 2006.229.04:50:38.18#ibcon#*before return 0, iclass 13, count 0 2006.229.04:50:38.18#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:38.18#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.04:50:38.18#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.04:50:38.18#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.04:50:38.18$vck44/vb=2,4 2006.229.04:50:38.18#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.04:50:38.18#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.04:50:38.18#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:38.18#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:38.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:38.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:38.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.04:50:38.24#ibcon#first serial, iclass 15, count 2 2006.229.04:50:38.24#ibcon#enter sib2, iclass 15, count 2 2006.229.04:50:38.24#ibcon#flushed, iclass 15, count 2 2006.229.04:50:38.24#ibcon#about to write, iclass 15, count 2 2006.229.04:50:38.24#ibcon#wrote, iclass 15, count 2 2006.229.04:50:38.24#ibcon#about to read 3, iclass 15, count 2 2006.229.04:50:38.26#ibcon#read 3, iclass 15, count 2 2006.229.04:50:38.26#ibcon#about to read 4, iclass 15, count 2 2006.229.04:50:38.26#ibcon#read 4, iclass 15, count 2 2006.229.04:50:38.26#ibcon#about to read 5, iclass 15, count 2 2006.229.04:50:38.26#ibcon#read 5, iclass 15, count 2 2006.229.04:50:38.26#ibcon#about to read 6, iclass 15, count 2 2006.229.04:50:38.26#ibcon#read 6, iclass 15, count 2 2006.229.04:50:38.26#ibcon#end of sib2, iclass 15, count 2 2006.229.04:50:38.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.04:50:38.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.04:50:38.26#ibcon#[27=AT02-04\r\n] 2006.229.04:50:38.26#ibcon#*before write, iclass 15, count 2 2006.229.04:50:38.26#ibcon#enter sib2, iclass 15, count 2 2006.229.04:50:38.26#ibcon#flushed, iclass 15, count 2 2006.229.04:50:38.26#ibcon#about to write, iclass 15, count 2 2006.229.04:50:38.26#ibcon#wrote, iclass 15, count 2 2006.229.04:50:38.26#ibcon#about to read 3, iclass 15, count 2 2006.229.04:50:38.29#ibcon#read 3, iclass 15, count 2 2006.229.04:50:38.29#ibcon#about to read 4, iclass 15, count 2 2006.229.04:50:38.29#ibcon#read 4, iclass 15, count 2 2006.229.04:50:38.29#ibcon#about to read 5, iclass 15, count 2 2006.229.04:50:38.29#ibcon#read 5, iclass 15, count 2 2006.229.04:50:38.29#ibcon#about to read 6, iclass 15, count 2 2006.229.04:50:38.29#ibcon#read 6, iclass 15, count 2 2006.229.04:50:38.29#ibcon#end of sib2, iclass 15, count 2 2006.229.04:50:38.29#ibcon#*after write, iclass 15, count 2 2006.229.04:50:38.29#ibcon#*before return 0, iclass 15, count 2 2006.229.04:50:38.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:38.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.04:50:38.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.04:50:38.29#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:38.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:38.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:38.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:38.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.04:50:38.41#ibcon#first serial, iclass 15, count 0 2006.229.04:50:38.41#ibcon#enter sib2, iclass 15, count 0 2006.229.04:50:38.41#ibcon#flushed, iclass 15, count 0 2006.229.04:50:38.41#ibcon#about to write, iclass 15, count 0 2006.229.04:50:38.41#ibcon#wrote, iclass 15, count 0 2006.229.04:50:38.41#ibcon#about to read 3, iclass 15, count 0 2006.229.04:50:38.43#ibcon#read 3, iclass 15, count 0 2006.229.04:50:38.43#ibcon#about to read 4, iclass 15, count 0 2006.229.04:50:38.43#ibcon#read 4, iclass 15, count 0 2006.229.04:50:38.43#ibcon#about to read 5, iclass 15, count 0 2006.229.04:50:38.43#ibcon#read 5, iclass 15, count 0 2006.229.04:50:38.43#ibcon#about to read 6, iclass 15, count 0 2006.229.04:50:38.43#ibcon#read 6, iclass 15, count 0 2006.229.04:50:38.43#ibcon#end of sib2, iclass 15, count 0 2006.229.04:50:38.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.04:50:38.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.04:50:38.43#ibcon#[27=USB\r\n] 2006.229.04:50:38.43#ibcon#*before write, iclass 15, count 0 2006.229.04:50:38.43#ibcon#enter sib2, iclass 15, count 0 2006.229.04:50:38.43#ibcon#flushed, iclass 15, count 0 2006.229.04:50:38.43#ibcon#about to write, iclass 15, count 0 2006.229.04:50:38.43#ibcon#wrote, iclass 15, count 0 2006.229.04:50:38.43#ibcon#about to read 3, iclass 15, count 0 2006.229.04:50:38.46#ibcon#read 3, iclass 15, count 0 2006.229.04:50:38.46#ibcon#about to read 4, iclass 15, count 0 2006.229.04:50:38.46#ibcon#read 4, iclass 15, count 0 2006.229.04:50:38.46#ibcon#about to read 5, iclass 15, count 0 2006.229.04:50:38.46#ibcon#read 5, iclass 15, count 0 2006.229.04:50:38.46#ibcon#about to read 6, iclass 15, count 0 2006.229.04:50:38.46#ibcon#read 6, iclass 15, count 0 2006.229.04:50:38.46#ibcon#end of sib2, iclass 15, count 0 2006.229.04:50:38.46#ibcon#*after write, iclass 15, count 0 2006.229.04:50:38.46#ibcon#*before return 0, iclass 15, count 0 2006.229.04:50:38.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:38.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.04:50:38.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.04:50:38.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.04:50:38.46$vck44/vblo=3,649.99 2006.229.04:50:38.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.04:50:38.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.04:50:38.46#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:38.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:38.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:38.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:38.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.04:50:38.46#ibcon#first serial, iclass 17, count 0 2006.229.04:50:38.46#ibcon#enter sib2, iclass 17, count 0 2006.229.04:50:38.46#ibcon#flushed, iclass 17, count 0 2006.229.04:50:38.46#ibcon#about to write, iclass 17, count 0 2006.229.04:50:38.46#ibcon#wrote, iclass 17, count 0 2006.229.04:50:38.46#ibcon#about to read 3, iclass 17, count 0 2006.229.04:50:38.48#ibcon#read 3, iclass 17, count 0 2006.229.04:50:38.48#ibcon#about to read 4, iclass 17, count 0 2006.229.04:50:38.48#ibcon#read 4, iclass 17, count 0 2006.229.04:50:38.48#ibcon#about to read 5, iclass 17, count 0 2006.229.04:50:38.48#ibcon#read 5, iclass 17, count 0 2006.229.04:50:38.48#ibcon#about to read 6, iclass 17, count 0 2006.229.04:50:38.48#ibcon#read 6, iclass 17, count 0 2006.229.04:50:38.48#ibcon#end of sib2, iclass 17, count 0 2006.229.04:50:38.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.04:50:38.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.04:50:38.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:50:38.48#ibcon#*before write, iclass 17, count 0 2006.229.04:50:38.48#ibcon#enter sib2, iclass 17, count 0 2006.229.04:50:38.48#ibcon#flushed, iclass 17, count 0 2006.229.04:50:38.48#ibcon#about to write, iclass 17, count 0 2006.229.04:50:38.48#ibcon#wrote, iclass 17, count 0 2006.229.04:50:38.48#ibcon#about to read 3, iclass 17, count 0 2006.229.04:50:38.52#ibcon#read 3, iclass 17, count 0 2006.229.04:50:38.52#ibcon#about to read 4, iclass 17, count 0 2006.229.04:50:38.52#ibcon#read 4, iclass 17, count 0 2006.229.04:50:38.52#ibcon#about to read 5, iclass 17, count 0 2006.229.04:50:38.52#ibcon#read 5, iclass 17, count 0 2006.229.04:50:38.52#ibcon#about to read 6, iclass 17, count 0 2006.229.04:50:38.52#ibcon#read 6, iclass 17, count 0 2006.229.04:50:38.52#ibcon#end of sib2, iclass 17, count 0 2006.229.04:50:38.52#ibcon#*after write, iclass 17, count 0 2006.229.04:50:38.52#ibcon#*before return 0, iclass 17, count 0 2006.229.04:50:38.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:38.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.04:50:38.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.04:50:38.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.04:50:38.52$vck44/vb=3,4 2006.229.04:50:38.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.04:50:38.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.04:50:38.52#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:38.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:38.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:38.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:38.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.04:50:38.58#ibcon#first serial, iclass 19, count 2 2006.229.04:50:38.58#ibcon#enter sib2, iclass 19, count 2 2006.229.04:50:38.58#ibcon#flushed, iclass 19, count 2 2006.229.04:50:38.58#ibcon#about to write, iclass 19, count 2 2006.229.04:50:38.58#ibcon#wrote, iclass 19, count 2 2006.229.04:50:38.58#ibcon#about to read 3, iclass 19, count 2 2006.229.04:50:38.60#ibcon#read 3, iclass 19, count 2 2006.229.04:50:38.60#ibcon#about to read 4, iclass 19, count 2 2006.229.04:50:38.60#ibcon#read 4, iclass 19, count 2 2006.229.04:50:38.60#ibcon#about to read 5, iclass 19, count 2 2006.229.04:50:38.60#ibcon#read 5, iclass 19, count 2 2006.229.04:50:38.60#ibcon#about to read 6, iclass 19, count 2 2006.229.04:50:38.60#ibcon#read 6, iclass 19, count 2 2006.229.04:50:38.60#ibcon#end of sib2, iclass 19, count 2 2006.229.04:50:38.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.04:50:38.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.04:50:38.60#ibcon#[27=AT03-04\r\n] 2006.229.04:50:38.60#ibcon#*before write, iclass 19, count 2 2006.229.04:50:38.60#ibcon#enter sib2, iclass 19, count 2 2006.229.04:50:38.60#ibcon#flushed, iclass 19, count 2 2006.229.04:50:38.60#ibcon#about to write, iclass 19, count 2 2006.229.04:50:38.60#ibcon#wrote, iclass 19, count 2 2006.229.04:50:38.60#ibcon#about to read 3, iclass 19, count 2 2006.229.04:50:38.63#ibcon#read 3, iclass 19, count 2 2006.229.04:50:38.63#ibcon#about to read 4, iclass 19, count 2 2006.229.04:50:38.63#ibcon#read 4, iclass 19, count 2 2006.229.04:50:38.63#ibcon#about to read 5, iclass 19, count 2 2006.229.04:50:38.63#ibcon#read 5, iclass 19, count 2 2006.229.04:50:38.63#ibcon#about to read 6, iclass 19, count 2 2006.229.04:50:38.63#ibcon#read 6, iclass 19, count 2 2006.229.04:50:38.63#ibcon#end of sib2, iclass 19, count 2 2006.229.04:50:38.63#ibcon#*after write, iclass 19, count 2 2006.229.04:50:38.63#ibcon#*before return 0, iclass 19, count 2 2006.229.04:50:38.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:38.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.04:50:38.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.04:50:38.63#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:38.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:38.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:38.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:38.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.04:50:38.75#ibcon#first serial, iclass 19, count 0 2006.229.04:50:38.75#ibcon#enter sib2, iclass 19, count 0 2006.229.04:50:38.75#ibcon#flushed, iclass 19, count 0 2006.229.04:50:38.75#ibcon#about to write, iclass 19, count 0 2006.229.04:50:38.75#ibcon#wrote, iclass 19, count 0 2006.229.04:50:38.75#ibcon#about to read 3, iclass 19, count 0 2006.229.04:50:38.77#ibcon#read 3, iclass 19, count 0 2006.229.04:50:38.77#ibcon#about to read 4, iclass 19, count 0 2006.229.04:50:38.77#ibcon#read 4, iclass 19, count 0 2006.229.04:50:38.77#ibcon#about to read 5, iclass 19, count 0 2006.229.04:50:38.77#ibcon#read 5, iclass 19, count 0 2006.229.04:50:38.77#ibcon#about to read 6, iclass 19, count 0 2006.229.04:50:38.77#ibcon#read 6, iclass 19, count 0 2006.229.04:50:38.77#ibcon#end of sib2, iclass 19, count 0 2006.229.04:50:38.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.04:50:38.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.04:50:38.77#ibcon#[27=USB\r\n] 2006.229.04:50:38.77#ibcon#*before write, iclass 19, count 0 2006.229.04:50:38.77#ibcon#enter sib2, iclass 19, count 0 2006.229.04:50:38.77#ibcon#flushed, iclass 19, count 0 2006.229.04:50:38.77#ibcon#about to write, iclass 19, count 0 2006.229.04:50:38.77#ibcon#wrote, iclass 19, count 0 2006.229.04:50:38.77#ibcon#about to read 3, iclass 19, count 0 2006.229.04:50:38.80#ibcon#read 3, iclass 19, count 0 2006.229.04:50:38.80#ibcon#about to read 4, iclass 19, count 0 2006.229.04:50:38.80#ibcon#read 4, iclass 19, count 0 2006.229.04:50:38.80#ibcon#about to read 5, iclass 19, count 0 2006.229.04:50:38.80#ibcon#read 5, iclass 19, count 0 2006.229.04:50:38.80#ibcon#about to read 6, iclass 19, count 0 2006.229.04:50:38.80#ibcon#read 6, iclass 19, count 0 2006.229.04:50:38.80#ibcon#end of sib2, iclass 19, count 0 2006.229.04:50:38.80#ibcon#*after write, iclass 19, count 0 2006.229.04:50:38.80#ibcon#*before return 0, iclass 19, count 0 2006.229.04:50:38.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:38.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.04:50:38.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.04:50:38.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.04:50:38.80$vck44/vblo=4,679.99 2006.229.04:50:38.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.04:50:38.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.04:50:38.80#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:38.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:38.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:38.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:38.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.04:50:38.80#ibcon#first serial, iclass 21, count 0 2006.229.04:50:38.80#ibcon#enter sib2, iclass 21, count 0 2006.229.04:50:38.80#ibcon#flushed, iclass 21, count 0 2006.229.04:50:38.80#ibcon#about to write, iclass 21, count 0 2006.229.04:50:38.80#ibcon#wrote, iclass 21, count 0 2006.229.04:50:38.80#ibcon#about to read 3, iclass 21, count 0 2006.229.04:50:38.82#ibcon#read 3, iclass 21, count 0 2006.229.04:50:38.82#ibcon#about to read 4, iclass 21, count 0 2006.229.04:50:38.82#ibcon#read 4, iclass 21, count 0 2006.229.04:50:38.82#ibcon#about to read 5, iclass 21, count 0 2006.229.04:50:38.82#ibcon#read 5, iclass 21, count 0 2006.229.04:50:38.82#ibcon#about to read 6, iclass 21, count 0 2006.229.04:50:38.82#ibcon#read 6, iclass 21, count 0 2006.229.04:50:38.82#ibcon#end of sib2, iclass 21, count 0 2006.229.04:50:38.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.04:50:38.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.04:50:38.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:50:38.82#ibcon#*before write, iclass 21, count 0 2006.229.04:50:38.82#ibcon#enter sib2, iclass 21, count 0 2006.229.04:50:38.82#ibcon#flushed, iclass 21, count 0 2006.229.04:50:38.82#ibcon#about to write, iclass 21, count 0 2006.229.04:50:38.82#ibcon#wrote, iclass 21, count 0 2006.229.04:50:38.82#ibcon#about to read 3, iclass 21, count 0 2006.229.04:50:38.86#ibcon#read 3, iclass 21, count 0 2006.229.04:50:38.86#ibcon#about to read 4, iclass 21, count 0 2006.229.04:50:38.86#ibcon#read 4, iclass 21, count 0 2006.229.04:50:38.86#ibcon#about to read 5, iclass 21, count 0 2006.229.04:50:38.86#ibcon#read 5, iclass 21, count 0 2006.229.04:50:38.86#ibcon#about to read 6, iclass 21, count 0 2006.229.04:50:38.86#ibcon#read 6, iclass 21, count 0 2006.229.04:50:38.86#ibcon#end of sib2, iclass 21, count 0 2006.229.04:50:38.86#ibcon#*after write, iclass 21, count 0 2006.229.04:50:38.86#ibcon#*before return 0, iclass 21, count 0 2006.229.04:50:38.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:38.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.04:50:38.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.04:50:38.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.04:50:38.86$vck44/vb=4,4 2006.229.04:50:38.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.04:50:38.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.04:50:38.86#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:38.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:38.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:38.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:38.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.04:50:38.92#ibcon#first serial, iclass 23, count 2 2006.229.04:50:38.92#ibcon#enter sib2, iclass 23, count 2 2006.229.04:50:38.92#ibcon#flushed, iclass 23, count 2 2006.229.04:50:38.92#ibcon#about to write, iclass 23, count 2 2006.229.04:50:38.92#ibcon#wrote, iclass 23, count 2 2006.229.04:50:38.92#ibcon#about to read 3, iclass 23, count 2 2006.229.04:50:38.94#ibcon#read 3, iclass 23, count 2 2006.229.04:50:38.94#ibcon#about to read 4, iclass 23, count 2 2006.229.04:50:38.94#ibcon#read 4, iclass 23, count 2 2006.229.04:50:38.94#ibcon#about to read 5, iclass 23, count 2 2006.229.04:50:38.94#ibcon#read 5, iclass 23, count 2 2006.229.04:50:38.94#ibcon#about to read 6, iclass 23, count 2 2006.229.04:50:38.94#ibcon#read 6, iclass 23, count 2 2006.229.04:50:38.94#ibcon#end of sib2, iclass 23, count 2 2006.229.04:50:38.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.04:50:38.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.04:50:38.94#ibcon#[27=AT04-04\r\n] 2006.229.04:50:38.94#ibcon#*before write, iclass 23, count 2 2006.229.04:50:38.94#ibcon#enter sib2, iclass 23, count 2 2006.229.04:50:38.94#ibcon#flushed, iclass 23, count 2 2006.229.04:50:38.94#ibcon#about to write, iclass 23, count 2 2006.229.04:50:38.94#ibcon#wrote, iclass 23, count 2 2006.229.04:50:38.94#ibcon#about to read 3, iclass 23, count 2 2006.229.04:50:38.97#ibcon#read 3, iclass 23, count 2 2006.229.04:50:38.97#ibcon#about to read 4, iclass 23, count 2 2006.229.04:50:38.97#ibcon#read 4, iclass 23, count 2 2006.229.04:50:38.97#ibcon#about to read 5, iclass 23, count 2 2006.229.04:50:38.97#ibcon#read 5, iclass 23, count 2 2006.229.04:50:38.97#ibcon#about to read 6, iclass 23, count 2 2006.229.04:50:38.97#ibcon#read 6, iclass 23, count 2 2006.229.04:50:38.97#ibcon#end of sib2, iclass 23, count 2 2006.229.04:50:38.97#ibcon#*after write, iclass 23, count 2 2006.229.04:50:38.97#ibcon#*before return 0, iclass 23, count 2 2006.229.04:50:38.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:38.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.04:50:38.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.04:50:38.97#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:38.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:39.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:39.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:39.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.04:50:39.09#ibcon#first serial, iclass 23, count 0 2006.229.04:50:39.09#ibcon#enter sib2, iclass 23, count 0 2006.229.04:50:39.09#ibcon#flushed, iclass 23, count 0 2006.229.04:50:39.09#ibcon#about to write, iclass 23, count 0 2006.229.04:50:39.09#ibcon#wrote, iclass 23, count 0 2006.229.04:50:39.09#ibcon#about to read 3, iclass 23, count 0 2006.229.04:50:39.11#ibcon#read 3, iclass 23, count 0 2006.229.04:50:39.11#ibcon#about to read 4, iclass 23, count 0 2006.229.04:50:39.11#ibcon#read 4, iclass 23, count 0 2006.229.04:50:39.11#ibcon#about to read 5, iclass 23, count 0 2006.229.04:50:39.11#ibcon#read 5, iclass 23, count 0 2006.229.04:50:39.11#ibcon#about to read 6, iclass 23, count 0 2006.229.04:50:39.11#ibcon#read 6, iclass 23, count 0 2006.229.04:50:39.11#ibcon#end of sib2, iclass 23, count 0 2006.229.04:50:39.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.04:50:39.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.04:50:39.11#ibcon#[27=USB\r\n] 2006.229.04:50:39.11#ibcon#*before write, iclass 23, count 0 2006.229.04:50:39.11#ibcon#enter sib2, iclass 23, count 0 2006.229.04:50:39.11#ibcon#flushed, iclass 23, count 0 2006.229.04:50:39.11#ibcon#about to write, iclass 23, count 0 2006.229.04:50:39.11#ibcon#wrote, iclass 23, count 0 2006.229.04:50:39.11#ibcon#about to read 3, iclass 23, count 0 2006.229.04:50:39.14#ibcon#read 3, iclass 23, count 0 2006.229.04:50:39.14#ibcon#about to read 4, iclass 23, count 0 2006.229.04:50:39.14#ibcon#read 4, iclass 23, count 0 2006.229.04:50:39.14#ibcon#about to read 5, iclass 23, count 0 2006.229.04:50:39.14#ibcon#read 5, iclass 23, count 0 2006.229.04:50:39.14#ibcon#about to read 6, iclass 23, count 0 2006.229.04:50:39.14#ibcon#read 6, iclass 23, count 0 2006.229.04:50:39.14#ibcon#end of sib2, iclass 23, count 0 2006.229.04:50:39.14#ibcon#*after write, iclass 23, count 0 2006.229.04:50:39.14#ibcon#*before return 0, iclass 23, count 0 2006.229.04:50:39.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:39.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.04:50:39.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.04:50:39.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.04:50:39.14$vck44/vblo=5,709.99 2006.229.04:50:39.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.04:50:39.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.04:50:39.14#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:39.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:39.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:39.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:39.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.04:50:39.14#ibcon#first serial, iclass 25, count 0 2006.229.04:50:39.14#ibcon#enter sib2, iclass 25, count 0 2006.229.04:50:39.14#ibcon#flushed, iclass 25, count 0 2006.229.04:50:39.14#ibcon#about to write, iclass 25, count 0 2006.229.04:50:39.14#ibcon#wrote, iclass 25, count 0 2006.229.04:50:39.14#ibcon#about to read 3, iclass 25, count 0 2006.229.04:50:39.16#ibcon#read 3, iclass 25, count 0 2006.229.04:50:39.16#ibcon#about to read 4, iclass 25, count 0 2006.229.04:50:39.16#ibcon#read 4, iclass 25, count 0 2006.229.04:50:39.16#ibcon#about to read 5, iclass 25, count 0 2006.229.04:50:39.16#ibcon#read 5, iclass 25, count 0 2006.229.04:50:39.16#ibcon#about to read 6, iclass 25, count 0 2006.229.04:50:39.16#ibcon#read 6, iclass 25, count 0 2006.229.04:50:39.16#ibcon#end of sib2, iclass 25, count 0 2006.229.04:50:39.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.04:50:39.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.04:50:39.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:50:39.16#ibcon#*before write, iclass 25, count 0 2006.229.04:50:39.16#ibcon#enter sib2, iclass 25, count 0 2006.229.04:50:39.16#ibcon#flushed, iclass 25, count 0 2006.229.04:50:39.16#ibcon#about to write, iclass 25, count 0 2006.229.04:50:39.16#ibcon#wrote, iclass 25, count 0 2006.229.04:50:39.16#ibcon#about to read 3, iclass 25, count 0 2006.229.04:50:39.20#ibcon#read 3, iclass 25, count 0 2006.229.04:50:39.20#ibcon#about to read 4, iclass 25, count 0 2006.229.04:50:39.20#ibcon#read 4, iclass 25, count 0 2006.229.04:50:39.20#ibcon#about to read 5, iclass 25, count 0 2006.229.04:50:39.20#ibcon#read 5, iclass 25, count 0 2006.229.04:50:39.20#ibcon#about to read 6, iclass 25, count 0 2006.229.04:50:39.20#ibcon#read 6, iclass 25, count 0 2006.229.04:50:39.20#ibcon#end of sib2, iclass 25, count 0 2006.229.04:50:39.20#ibcon#*after write, iclass 25, count 0 2006.229.04:50:39.20#ibcon#*before return 0, iclass 25, count 0 2006.229.04:50:39.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:39.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.04:50:39.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.04:50:39.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.04:50:39.20$vck44/vb=5,4 2006.229.04:50:39.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.04:50:39.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.04:50:39.20#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:39.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:39.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:39.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:39.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.04:50:39.26#ibcon#first serial, iclass 27, count 2 2006.229.04:50:39.26#ibcon#enter sib2, iclass 27, count 2 2006.229.04:50:39.26#ibcon#flushed, iclass 27, count 2 2006.229.04:50:39.26#ibcon#about to write, iclass 27, count 2 2006.229.04:50:39.26#ibcon#wrote, iclass 27, count 2 2006.229.04:50:39.26#ibcon#about to read 3, iclass 27, count 2 2006.229.04:50:39.28#ibcon#read 3, iclass 27, count 2 2006.229.04:50:39.28#ibcon#about to read 4, iclass 27, count 2 2006.229.04:50:39.28#ibcon#read 4, iclass 27, count 2 2006.229.04:50:39.28#ibcon#about to read 5, iclass 27, count 2 2006.229.04:50:39.28#ibcon#read 5, iclass 27, count 2 2006.229.04:50:39.28#ibcon#about to read 6, iclass 27, count 2 2006.229.04:50:39.28#ibcon#read 6, iclass 27, count 2 2006.229.04:50:39.28#ibcon#end of sib2, iclass 27, count 2 2006.229.04:50:39.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.04:50:39.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.04:50:39.28#ibcon#[27=AT05-04\r\n] 2006.229.04:50:39.28#ibcon#*before write, iclass 27, count 2 2006.229.04:50:39.28#ibcon#enter sib2, iclass 27, count 2 2006.229.04:50:39.28#ibcon#flushed, iclass 27, count 2 2006.229.04:50:39.28#ibcon#about to write, iclass 27, count 2 2006.229.04:50:39.28#ibcon#wrote, iclass 27, count 2 2006.229.04:50:39.28#ibcon#about to read 3, iclass 27, count 2 2006.229.04:50:39.31#ibcon#read 3, iclass 27, count 2 2006.229.04:50:39.31#ibcon#about to read 4, iclass 27, count 2 2006.229.04:50:39.31#ibcon#read 4, iclass 27, count 2 2006.229.04:50:39.31#ibcon#about to read 5, iclass 27, count 2 2006.229.04:50:39.31#ibcon#read 5, iclass 27, count 2 2006.229.04:50:39.31#ibcon#about to read 6, iclass 27, count 2 2006.229.04:50:39.31#ibcon#read 6, iclass 27, count 2 2006.229.04:50:39.31#ibcon#end of sib2, iclass 27, count 2 2006.229.04:50:39.31#ibcon#*after write, iclass 27, count 2 2006.229.04:50:39.31#ibcon#*before return 0, iclass 27, count 2 2006.229.04:50:39.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:39.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.04:50:39.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.04:50:39.31#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:39.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:39.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:39.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:39.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.04:50:39.43#ibcon#first serial, iclass 27, count 0 2006.229.04:50:39.43#ibcon#enter sib2, iclass 27, count 0 2006.229.04:50:39.43#ibcon#flushed, iclass 27, count 0 2006.229.04:50:39.43#ibcon#about to write, iclass 27, count 0 2006.229.04:50:39.43#ibcon#wrote, iclass 27, count 0 2006.229.04:50:39.43#ibcon#about to read 3, iclass 27, count 0 2006.229.04:50:39.45#ibcon#read 3, iclass 27, count 0 2006.229.04:50:39.45#ibcon#about to read 4, iclass 27, count 0 2006.229.04:50:39.45#ibcon#read 4, iclass 27, count 0 2006.229.04:50:39.45#ibcon#about to read 5, iclass 27, count 0 2006.229.04:50:39.45#ibcon#read 5, iclass 27, count 0 2006.229.04:50:39.45#ibcon#about to read 6, iclass 27, count 0 2006.229.04:50:39.45#ibcon#read 6, iclass 27, count 0 2006.229.04:50:39.45#ibcon#end of sib2, iclass 27, count 0 2006.229.04:50:39.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.04:50:39.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.04:50:39.45#ibcon#[27=USB\r\n] 2006.229.04:50:39.45#ibcon#*before write, iclass 27, count 0 2006.229.04:50:39.45#ibcon#enter sib2, iclass 27, count 0 2006.229.04:50:39.45#ibcon#flushed, iclass 27, count 0 2006.229.04:50:39.45#ibcon#about to write, iclass 27, count 0 2006.229.04:50:39.45#ibcon#wrote, iclass 27, count 0 2006.229.04:50:39.45#ibcon#about to read 3, iclass 27, count 0 2006.229.04:50:39.48#ibcon#read 3, iclass 27, count 0 2006.229.04:50:39.48#ibcon#about to read 4, iclass 27, count 0 2006.229.04:50:39.48#ibcon#read 4, iclass 27, count 0 2006.229.04:50:39.48#ibcon#about to read 5, iclass 27, count 0 2006.229.04:50:39.48#ibcon#read 5, iclass 27, count 0 2006.229.04:50:39.48#ibcon#about to read 6, iclass 27, count 0 2006.229.04:50:39.48#ibcon#read 6, iclass 27, count 0 2006.229.04:50:39.48#ibcon#end of sib2, iclass 27, count 0 2006.229.04:50:39.48#ibcon#*after write, iclass 27, count 0 2006.229.04:50:39.48#ibcon#*before return 0, iclass 27, count 0 2006.229.04:50:39.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:39.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.04:50:39.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.04:50:39.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.04:50:39.48$vck44/vblo=6,719.99 2006.229.04:50:39.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.04:50:39.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.04:50:39.48#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:39.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:39.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:39.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:39.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.04:50:39.48#ibcon#first serial, iclass 29, count 0 2006.229.04:50:39.48#ibcon#enter sib2, iclass 29, count 0 2006.229.04:50:39.48#ibcon#flushed, iclass 29, count 0 2006.229.04:50:39.48#ibcon#about to write, iclass 29, count 0 2006.229.04:50:39.48#ibcon#wrote, iclass 29, count 0 2006.229.04:50:39.48#ibcon#about to read 3, iclass 29, count 0 2006.229.04:50:39.50#ibcon#read 3, iclass 29, count 0 2006.229.04:50:39.50#ibcon#about to read 4, iclass 29, count 0 2006.229.04:50:39.50#ibcon#read 4, iclass 29, count 0 2006.229.04:50:39.50#ibcon#about to read 5, iclass 29, count 0 2006.229.04:50:39.50#ibcon#read 5, iclass 29, count 0 2006.229.04:50:39.50#ibcon#about to read 6, iclass 29, count 0 2006.229.04:50:39.50#ibcon#read 6, iclass 29, count 0 2006.229.04:50:39.50#ibcon#end of sib2, iclass 29, count 0 2006.229.04:50:39.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.04:50:39.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.04:50:39.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:50:39.50#ibcon#*before write, iclass 29, count 0 2006.229.04:50:39.50#ibcon#enter sib2, iclass 29, count 0 2006.229.04:50:39.50#ibcon#flushed, iclass 29, count 0 2006.229.04:50:39.50#ibcon#about to write, iclass 29, count 0 2006.229.04:50:39.50#ibcon#wrote, iclass 29, count 0 2006.229.04:50:39.50#ibcon#about to read 3, iclass 29, count 0 2006.229.04:50:39.54#ibcon#read 3, iclass 29, count 0 2006.229.04:50:39.54#ibcon#about to read 4, iclass 29, count 0 2006.229.04:50:39.54#ibcon#read 4, iclass 29, count 0 2006.229.04:50:39.54#ibcon#about to read 5, iclass 29, count 0 2006.229.04:50:39.54#ibcon#read 5, iclass 29, count 0 2006.229.04:50:39.54#ibcon#about to read 6, iclass 29, count 0 2006.229.04:50:39.54#ibcon#read 6, iclass 29, count 0 2006.229.04:50:39.54#ibcon#end of sib2, iclass 29, count 0 2006.229.04:50:39.54#ibcon#*after write, iclass 29, count 0 2006.229.04:50:39.54#ibcon#*before return 0, iclass 29, count 0 2006.229.04:50:39.54#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:39.54#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.04:50:39.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.04:50:39.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.04:50:39.54$vck44/vb=6,4 2006.229.04:50:39.54#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.04:50:39.54#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.04:50:39.54#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:39.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:39.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:39.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:39.60#ibcon#enter wrdev, iclass 31, count 2 2006.229.04:50:39.60#ibcon#first serial, iclass 31, count 2 2006.229.04:50:39.60#ibcon#enter sib2, iclass 31, count 2 2006.229.04:50:39.60#ibcon#flushed, iclass 31, count 2 2006.229.04:50:39.60#ibcon#about to write, iclass 31, count 2 2006.229.04:50:39.60#ibcon#wrote, iclass 31, count 2 2006.229.04:50:39.60#ibcon#about to read 3, iclass 31, count 2 2006.229.04:50:39.62#ibcon#read 3, iclass 31, count 2 2006.229.04:50:39.62#ibcon#about to read 4, iclass 31, count 2 2006.229.04:50:39.62#ibcon#read 4, iclass 31, count 2 2006.229.04:50:39.62#ibcon#about to read 5, iclass 31, count 2 2006.229.04:50:39.62#ibcon#read 5, iclass 31, count 2 2006.229.04:50:39.62#ibcon#about to read 6, iclass 31, count 2 2006.229.04:50:39.62#ibcon#read 6, iclass 31, count 2 2006.229.04:50:39.62#ibcon#end of sib2, iclass 31, count 2 2006.229.04:50:39.62#ibcon#*mode == 0, iclass 31, count 2 2006.229.04:50:39.62#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.04:50:39.62#ibcon#[27=AT06-04\r\n] 2006.229.04:50:39.62#ibcon#*before write, iclass 31, count 2 2006.229.04:50:39.62#ibcon#enter sib2, iclass 31, count 2 2006.229.04:50:39.62#ibcon#flushed, iclass 31, count 2 2006.229.04:50:39.62#ibcon#about to write, iclass 31, count 2 2006.229.04:50:39.62#ibcon#wrote, iclass 31, count 2 2006.229.04:50:39.62#ibcon#about to read 3, iclass 31, count 2 2006.229.04:50:39.65#ibcon#read 3, iclass 31, count 2 2006.229.04:50:39.65#ibcon#about to read 4, iclass 31, count 2 2006.229.04:50:39.65#ibcon#read 4, iclass 31, count 2 2006.229.04:50:39.65#ibcon#about to read 5, iclass 31, count 2 2006.229.04:50:39.65#ibcon#read 5, iclass 31, count 2 2006.229.04:50:39.65#ibcon#about to read 6, iclass 31, count 2 2006.229.04:50:39.65#ibcon#read 6, iclass 31, count 2 2006.229.04:50:39.65#ibcon#end of sib2, iclass 31, count 2 2006.229.04:50:39.65#ibcon#*after write, iclass 31, count 2 2006.229.04:50:39.65#ibcon#*before return 0, iclass 31, count 2 2006.229.04:50:39.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:39.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.04:50:39.65#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.04:50:39.65#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:39.65#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:39.77#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:39.77#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:39.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.04:50:39.77#ibcon#first serial, iclass 31, count 0 2006.229.04:50:39.77#ibcon#enter sib2, iclass 31, count 0 2006.229.04:50:39.77#ibcon#flushed, iclass 31, count 0 2006.229.04:50:39.77#ibcon#about to write, iclass 31, count 0 2006.229.04:50:39.77#ibcon#wrote, iclass 31, count 0 2006.229.04:50:39.77#ibcon#about to read 3, iclass 31, count 0 2006.229.04:50:39.79#ibcon#read 3, iclass 31, count 0 2006.229.04:50:39.79#ibcon#about to read 4, iclass 31, count 0 2006.229.04:50:39.79#ibcon#read 4, iclass 31, count 0 2006.229.04:50:39.79#ibcon#about to read 5, iclass 31, count 0 2006.229.04:50:39.79#ibcon#read 5, iclass 31, count 0 2006.229.04:50:39.79#ibcon#about to read 6, iclass 31, count 0 2006.229.04:50:39.79#ibcon#read 6, iclass 31, count 0 2006.229.04:50:39.79#ibcon#end of sib2, iclass 31, count 0 2006.229.04:50:39.79#ibcon#*mode == 0, iclass 31, count 0 2006.229.04:50:39.79#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.04:50:39.79#ibcon#[27=USB\r\n] 2006.229.04:50:39.79#ibcon#*before write, iclass 31, count 0 2006.229.04:50:39.79#ibcon#enter sib2, iclass 31, count 0 2006.229.04:50:39.79#ibcon#flushed, iclass 31, count 0 2006.229.04:50:39.79#ibcon#about to write, iclass 31, count 0 2006.229.04:50:39.79#ibcon#wrote, iclass 31, count 0 2006.229.04:50:39.79#ibcon#about to read 3, iclass 31, count 0 2006.229.04:50:39.82#ibcon#read 3, iclass 31, count 0 2006.229.04:50:39.82#ibcon#about to read 4, iclass 31, count 0 2006.229.04:50:39.82#ibcon#read 4, iclass 31, count 0 2006.229.04:50:39.82#ibcon#about to read 5, iclass 31, count 0 2006.229.04:50:39.82#ibcon#read 5, iclass 31, count 0 2006.229.04:50:39.82#ibcon#about to read 6, iclass 31, count 0 2006.229.04:50:39.82#ibcon#read 6, iclass 31, count 0 2006.229.04:50:39.82#ibcon#end of sib2, iclass 31, count 0 2006.229.04:50:39.82#ibcon#*after write, iclass 31, count 0 2006.229.04:50:39.82#ibcon#*before return 0, iclass 31, count 0 2006.229.04:50:39.82#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:39.82#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.04:50:39.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.04:50:39.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.04:50:39.82$vck44/vblo=7,734.99 2006.229.04:50:39.82#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.04:50:39.82#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.04:50:39.82#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:39.82#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:39.82#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:39.82#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:39.82#ibcon#enter wrdev, iclass 33, count 0 2006.229.04:50:39.82#ibcon#first serial, iclass 33, count 0 2006.229.04:50:39.82#ibcon#enter sib2, iclass 33, count 0 2006.229.04:50:39.82#ibcon#flushed, iclass 33, count 0 2006.229.04:50:39.82#ibcon#about to write, iclass 33, count 0 2006.229.04:50:39.82#ibcon#wrote, iclass 33, count 0 2006.229.04:50:39.82#ibcon#about to read 3, iclass 33, count 0 2006.229.04:50:39.84#ibcon#read 3, iclass 33, count 0 2006.229.04:50:39.84#ibcon#about to read 4, iclass 33, count 0 2006.229.04:50:39.84#ibcon#read 4, iclass 33, count 0 2006.229.04:50:39.84#ibcon#about to read 5, iclass 33, count 0 2006.229.04:50:39.84#ibcon#read 5, iclass 33, count 0 2006.229.04:50:39.84#ibcon#about to read 6, iclass 33, count 0 2006.229.04:50:39.84#ibcon#read 6, iclass 33, count 0 2006.229.04:50:39.84#ibcon#end of sib2, iclass 33, count 0 2006.229.04:50:39.84#ibcon#*mode == 0, iclass 33, count 0 2006.229.04:50:39.84#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.04:50:39.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:50:39.84#ibcon#*before write, iclass 33, count 0 2006.229.04:50:39.84#ibcon#enter sib2, iclass 33, count 0 2006.229.04:50:39.84#ibcon#flushed, iclass 33, count 0 2006.229.04:50:39.84#ibcon#about to write, iclass 33, count 0 2006.229.04:50:39.84#ibcon#wrote, iclass 33, count 0 2006.229.04:50:39.84#ibcon#about to read 3, iclass 33, count 0 2006.229.04:50:39.88#ibcon#read 3, iclass 33, count 0 2006.229.04:50:39.88#ibcon#about to read 4, iclass 33, count 0 2006.229.04:50:39.88#ibcon#read 4, iclass 33, count 0 2006.229.04:50:39.88#ibcon#about to read 5, iclass 33, count 0 2006.229.04:50:39.88#ibcon#read 5, iclass 33, count 0 2006.229.04:50:39.88#ibcon#about to read 6, iclass 33, count 0 2006.229.04:50:39.88#ibcon#read 6, iclass 33, count 0 2006.229.04:50:39.88#ibcon#end of sib2, iclass 33, count 0 2006.229.04:50:39.88#ibcon#*after write, iclass 33, count 0 2006.229.04:50:39.88#ibcon#*before return 0, iclass 33, count 0 2006.229.04:50:39.88#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:39.88#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.04:50:39.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.04:50:39.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.04:50:39.88$vck44/vb=7,4 2006.229.04:50:39.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.04:50:39.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.04:50:39.88#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:39.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:39.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:39.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:39.94#ibcon#enter wrdev, iclass 35, count 2 2006.229.04:50:39.94#ibcon#first serial, iclass 35, count 2 2006.229.04:50:39.94#ibcon#enter sib2, iclass 35, count 2 2006.229.04:50:39.94#ibcon#flushed, iclass 35, count 2 2006.229.04:50:39.94#ibcon#about to write, iclass 35, count 2 2006.229.04:50:39.94#ibcon#wrote, iclass 35, count 2 2006.229.04:50:39.94#ibcon#about to read 3, iclass 35, count 2 2006.229.04:50:39.96#ibcon#read 3, iclass 35, count 2 2006.229.04:50:39.96#ibcon#about to read 4, iclass 35, count 2 2006.229.04:50:39.96#ibcon#read 4, iclass 35, count 2 2006.229.04:50:39.96#ibcon#about to read 5, iclass 35, count 2 2006.229.04:50:39.96#ibcon#read 5, iclass 35, count 2 2006.229.04:50:39.96#ibcon#about to read 6, iclass 35, count 2 2006.229.04:50:39.96#ibcon#read 6, iclass 35, count 2 2006.229.04:50:39.96#ibcon#end of sib2, iclass 35, count 2 2006.229.04:50:39.96#ibcon#*mode == 0, iclass 35, count 2 2006.229.04:50:39.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.04:50:39.96#ibcon#[27=AT07-04\r\n] 2006.229.04:50:39.96#ibcon#*before write, iclass 35, count 2 2006.229.04:50:39.96#ibcon#enter sib2, iclass 35, count 2 2006.229.04:50:39.96#ibcon#flushed, iclass 35, count 2 2006.229.04:50:39.96#ibcon#about to write, iclass 35, count 2 2006.229.04:50:39.96#ibcon#wrote, iclass 35, count 2 2006.229.04:50:39.96#ibcon#about to read 3, iclass 35, count 2 2006.229.04:50:39.96#abcon#<5=/04 3.5 6.6 31.14 92 999.6\r\n> 2006.229.04:50:39.98#abcon#{5=INTERFACE CLEAR} 2006.229.04:50:39.99#ibcon#read 3, iclass 35, count 2 2006.229.04:50:39.99#ibcon#about to read 4, iclass 35, count 2 2006.229.04:50:39.99#ibcon#read 4, iclass 35, count 2 2006.229.04:50:39.99#ibcon#about to read 5, iclass 35, count 2 2006.229.04:50:39.99#ibcon#read 5, iclass 35, count 2 2006.229.04:50:39.99#ibcon#about to read 6, iclass 35, count 2 2006.229.04:50:39.99#ibcon#read 6, iclass 35, count 2 2006.229.04:50:39.99#ibcon#end of sib2, iclass 35, count 2 2006.229.04:50:39.99#ibcon#*after write, iclass 35, count 2 2006.229.04:50:39.99#ibcon#*before return 0, iclass 35, count 2 2006.229.04:50:39.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:39.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.04:50:39.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.04:50:39.99#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:39.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:40.04#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:50:40.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:40.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:40.11#ibcon#enter wrdev, iclass 35, count 0 2006.229.04:50:40.11#ibcon#first serial, iclass 35, count 0 2006.229.04:50:40.11#ibcon#enter sib2, iclass 35, count 0 2006.229.04:50:40.11#ibcon#flushed, iclass 35, count 0 2006.229.04:50:40.11#ibcon#about to write, iclass 35, count 0 2006.229.04:50:40.11#ibcon#wrote, iclass 35, count 0 2006.229.04:50:40.11#ibcon#about to read 3, iclass 35, count 0 2006.229.04:50:40.13#ibcon#read 3, iclass 35, count 0 2006.229.04:50:40.13#ibcon#about to read 4, iclass 35, count 0 2006.229.04:50:40.13#ibcon#read 4, iclass 35, count 0 2006.229.04:50:40.13#ibcon#about to read 5, iclass 35, count 0 2006.229.04:50:40.13#ibcon#read 5, iclass 35, count 0 2006.229.04:50:40.13#ibcon#about to read 6, iclass 35, count 0 2006.229.04:50:40.13#ibcon#read 6, iclass 35, count 0 2006.229.04:50:40.13#ibcon#end of sib2, iclass 35, count 0 2006.229.04:50:40.13#ibcon#*mode == 0, iclass 35, count 0 2006.229.04:50:40.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.04:50:40.13#ibcon#[27=USB\r\n] 2006.229.04:50:40.13#ibcon#*before write, iclass 35, count 0 2006.229.04:50:40.13#ibcon#enter sib2, iclass 35, count 0 2006.229.04:50:40.13#ibcon#flushed, iclass 35, count 0 2006.229.04:50:40.13#ibcon#about to write, iclass 35, count 0 2006.229.04:50:40.13#ibcon#wrote, iclass 35, count 0 2006.229.04:50:40.13#ibcon#about to read 3, iclass 35, count 0 2006.229.04:50:40.16#ibcon#read 3, iclass 35, count 0 2006.229.04:50:40.16#ibcon#about to read 4, iclass 35, count 0 2006.229.04:50:40.16#ibcon#read 4, iclass 35, count 0 2006.229.04:50:40.16#ibcon#about to read 5, iclass 35, count 0 2006.229.04:50:40.16#ibcon#read 5, iclass 35, count 0 2006.229.04:50:40.16#ibcon#about to read 6, iclass 35, count 0 2006.229.04:50:40.16#ibcon#read 6, iclass 35, count 0 2006.229.04:50:40.16#ibcon#end of sib2, iclass 35, count 0 2006.229.04:50:40.16#ibcon#*after write, iclass 35, count 0 2006.229.04:50:40.16#ibcon#*before return 0, iclass 35, count 0 2006.229.04:50:40.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:40.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.04:50:40.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.04:50:40.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.04:50:40.16$vck44/vblo=8,744.99 2006.229.04:50:40.16#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.04:50:40.16#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.04:50:40.16#ibcon#ireg 17 cls_cnt 0 2006.229.04:50:40.16#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:40.16#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:40.16#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:40.16#ibcon#enter wrdev, iclass 3, count 0 2006.229.04:50:40.16#ibcon#first serial, iclass 3, count 0 2006.229.04:50:40.16#ibcon#enter sib2, iclass 3, count 0 2006.229.04:50:40.16#ibcon#flushed, iclass 3, count 0 2006.229.04:50:40.16#ibcon#about to write, iclass 3, count 0 2006.229.04:50:40.16#ibcon#wrote, iclass 3, count 0 2006.229.04:50:40.16#ibcon#about to read 3, iclass 3, count 0 2006.229.04:50:40.18#ibcon#read 3, iclass 3, count 0 2006.229.04:50:40.18#ibcon#about to read 4, iclass 3, count 0 2006.229.04:50:40.18#ibcon#read 4, iclass 3, count 0 2006.229.04:50:40.18#ibcon#about to read 5, iclass 3, count 0 2006.229.04:50:40.18#ibcon#read 5, iclass 3, count 0 2006.229.04:50:40.18#ibcon#about to read 6, iclass 3, count 0 2006.229.04:50:40.18#ibcon#read 6, iclass 3, count 0 2006.229.04:50:40.18#ibcon#end of sib2, iclass 3, count 0 2006.229.04:50:40.18#ibcon#*mode == 0, iclass 3, count 0 2006.229.04:50:40.18#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.04:50:40.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:50:40.18#ibcon#*before write, iclass 3, count 0 2006.229.04:50:40.18#ibcon#enter sib2, iclass 3, count 0 2006.229.04:50:40.18#ibcon#flushed, iclass 3, count 0 2006.229.04:50:40.18#ibcon#about to write, iclass 3, count 0 2006.229.04:50:40.18#ibcon#wrote, iclass 3, count 0 2006.229.04:50:40.18#ibcon#about to read 3, iclass 3, count 0 2006.229.04:50:40.22#ibcon#read 3, iclass 3, count 0 2006.229.04:50:40.22#ibcon#about to read 4, iclass 3, count 0 2006.229.04:50:40.22#ibcon#read 4, iclass 3, count 0 2006.229.04:50:40.22#ibcon#about to read 5, iclass 3, count 0 2006.229.04:50:40.22#ibcon#read 5, iclass 3, count 0 2006.229.04:50:40.22#ibcon#about to read 6, iclass 3, count 0 2006.229.04:50:40.22#ibcon#read 6, iclass 3, count 0 2006.229.04:50:40.22#ibcon#end of sib2, iclass 3, count 0 2006.229.04:50:40.22#ibcon#*after write, iclass 3, count 0 2006.229.04:50:40.22#ibcon#*before return 0, iclass 3, count 0 2006.229.04:50:40.22#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:40.22#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.04:50:40.22#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.04:50:40.22#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.04:50:40.22$vck44/vb=8,4 2006.229.04:50:40.22#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.04:50:40.22#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.04:50:40.22#ibcon#ireg 11 cls_cnt 2 2006.229.04:50:40.22#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:40.28#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:40.28#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:40.28#ibcon#enter wrdev, iclass 5, count 2 2006.229.04:50:40.28#ibcon#first serial, iclass 5, count 2 2006.229.04:50:40.28#ibcon#enter sib2, iclass 5, count 2 2006.229.04:50:40.28#ibcon#flushed, iclass 5, count 2 2006.229.04:50:40.28#ibcon#about to write, iclass 5, count 2 2006.229.04:50:40.28#ibcon#wrote, iclass 5, count 2 2006.229.04:50:40.28#ibcon#about to read 3, iclass 5, count 2 2006.229.04:50:40.30#ibcon#read 3, iclass 5, count 2 2006.229.04:50:40.30#ibcon#about to read 4, iclass 5, count 2 2006.229.04:50:40.30#ibcon#read 4, iclass 5, count 2 2006.229.04:50:40.30#ibcon#about to read 5, iclass 5, count 2 2006.229.04:50:40.30#ibcon#read 5, iclass 5, count 2 2006.229.04:50:40.30#ibcon#about to read 6, iclass 5, count 2 2006.229.04:50:40.30#ibcon#read 6, iclass 5, count 2 2006.229.04:50:40.30#ibcon#end of sib2, iclass 5, count 2 2006.229.04:50:40.30#ibcon#*mode == 0, iclass 5, count 2 2006.229.04:50:40.30#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.04:50:40.30#ibcon#[27=AT08-04\r\n] 2006.229.04:50:40.30#ibcon#*before write, iclass 5, count 2 2006.229.04:50:40.30#ibcon#enter sib2, iclass 5, count 2 2006.229.04:50:40.30#ibcon#flushed, iclass 5, count 2 2006.229.04:50:40.30#ibcon#about to write, iclass 5, count 2 2006.229.04:50:40.30#ibcon#wrote, iclass 5, count 2 2006.229.04:50:40.30#ibcon#about to read 3, iclass 5, count 2 2006.229.04:50:40.33#ibcon#read 3, iclass 5, count 2 2006.229.04:50:40.33#ibcon#about to read 4, iclass 5, count 2 2006.229.04:50:40.33#ibcon#read 4, iclass 5, count 2 2006.229.04:50:40.33#ibcon#about to read 5, iclass 5, count 2 2006.229.04:50:40.33#ibcon#read 5, iclass 5, count 2 2006.229.04:50:40.33#ibcon#about to read 6, iclass 5, count 2 2006.229.04:50:40.33#ibcon#read 6, iclass 5, count 2 2006.229.04:50:40.33#ibcon#end of sib2, iclass 5, count 2 2006.229.04:50:40.33#ibcon#*after write, iclass 5, count 2 2006.229.04:50:40.33#ibcon#*before return 0, iclass 5, count 2 2006.229.04:50:40.33#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:40.33#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.04:50:40.33#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.04:50:40.33#ibcon#ireg 7 cls_cnt 0 2006.229.04:50:40.33#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:40.45#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:40.45#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:40.45#ibcon#enter wrdev, iclass 5, count 0 2006.229.04:50:40.45#ibcon#first serial, iclass 5, count 0 2006.229.04:50:40.45#ibcon#enter sib2, iclass 5, count 0 2006.229.04:50:40.45#ibcon#flushed, iclass 5, count 0 2006.229.04:50:40.45#ibcon#about to write, iclass 5, count 0 2006.229.04:50:40.45#ibcon#wrote, iclass 5, count 0 2006.229.04:50:40.45#ibcon#about to read 3, iclass 5, count 0 2006.229.04:50:40.47#ibcon#read 3, iclass 5, count 0 2006.229.04:50:40.47#ibcon#about to read 4, iclass 5, count 0 2006.229.04:50:40.47#ibcon#read 4, iclass 5, count 0 2006.229.04:50:40.47#ibcon#about to read 5, iclass 5, count 0 2006.229.04:50:40.47#ibcon#read 5, iclass 5, count 0 2006.229.04:50:40.47#ibcon#about to read 6, iclass 5, count 0 2006.229.04:50:40.47#ibcon#read 6, iclass 5, count 0 2006.229.04:50:40.47#ibcon#end of sib2, iclass 5, count 0 2006.229.04:50:40.47#ibcon#*mode == 0, iclass 5, count 0 2006.229.04:50:40.47#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.04:50:40.47#ibcon#[27=USB\r\n] 2006.229.04:50:40.47#ibcon#*before write, iclass 5, count 0 2006.229.04:50:40.47#ibcon#enter sib2, iclass 5, count 0 2006.229.04:50:40.47#ibcon#flushed, iclass 5, count 0 2006.229.04:50:40.47#ibcon#about to write, iclass 5, count 0 2006.229.04:50:40.47#ibcon#wrote, iclass 5, count 0 2006.229.04:50:40.47#ibcon#about to read 3, iclass 5, count 0 2006.229.04:50:40.50#ibcon#read 3, iclass 5, count 0 2006.229.04:50:40.50#ibcon#about to read 4, iclass 5, count 0 2006.229.04:50:40.50#ibcon#read 4, iclass 5, count 0 2006.229.04:50:40.50#ibcon#about to read 5, iclass 5, count 0 2006.229.04:50:40.50#ibcon#read 5, iclass 5, count 0 2006.229.04:50:40.50#ibcon#about to read 6, iclass 5, count 0 2006.229.04:50:40.50#ibcon#read 6, iclass 5, count 0 2006.229.04:50:40.50#ibcon#end of sib2, iclass 5, count 0 2006.229.04:50:40.50#ibcon#*after write, iclass 5, count 0 2006.229.04:50:40.50#ibcon#*before return 0, iclass 5, count 0 2006.229.04:50:40.50#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:40.50#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.04:50:40.50#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.04:50:40.50#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.04:50:40.50$vck44/vabw=wide 2006.229.04:50:40.50#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.04:50:40.50#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.04:50:40.50#ibcon#ireg 8 cls_cnt 0 2006.229.04:50:40.50#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:40.50#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:40.50#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:40.50#ibcon#enter wrdev, iclass 7, count 0 2006.229.04:50:40.50#ibcon#first serial, iclass 7, count 0 2006.229.04:50:40.50#ibcon#enter sib2, iclass 7, count 0 2006.229.04:50:40.50#ibcon#flushed, iclass 7, count 0 2006.229.04:50:40.50#ibcon#about to write, iclass 7, count 0 2006.229.04:50:40.50#ibcon#wrote, iclass 7, count 0 2006.229.04:50:40.50#ibcon#about to read 3, iclass 7, count 0 2006.229.04:50:40.52#ibcon#read 3, iclass 7, count 0 2006.229.04:50:40.52#ibcon#about to read 4, iclass 7, count 0 2006.229.04:50:40.52#ibcon#read 4, iclass 7, count 0 2006.229.04:50:40.52#ibcon#about to read 5, iclass 7, count 0 2006.229.04:50:40.52#ibcon#read 5, iclass 7, count 0 2006.229.04:50:40.52#ibcon#about to read 6, iclass 7, count 0 2006.229.04:50:40.52#ibcon#read 6, iclass 7, count 0 2006.229.04:50:40.52#ibcon#end of sib2, iclass 7, count 0 2006.229.04:50:40.52#ibcon#*mode == 0, iclass 7, count 0 2006.229.04:50:40.52#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.04:50:40.52#ibcon#[25=BW32\r\n] 2006.229.04:50:40.52#ibcon#*before write, iclass 7, count 0 2006.229.04:50:40.52#ibcon#enter sib2, iclass 7, count 0 2006.229.04:50:40.52#ibcon#flushed, iclass 7, count 0 2006.229.04:50:40.52#ibcon#about to write, iclass 7, count 0 2006.229.04:50:40.52#ibcon#wrote, iclass 7, count 0 2006.229.04:50:40.52#ibcon#about to read 3, iclass 7, count 0 2006.229.04:50:40.55#ibcon#read 3, iclass 7, count 0 2006.229.04:50:40.55#ibcon#about to read 4, iclass 7, count 0 2006.229.04:50:40.55#ibcon#read 4, iclass 7, count 0 2006.229.04:50:40.55#ibcon#about to read 5, iclass 7, count 0 2006.229.04:50:40.55#ibcon#read 5, iclass 7, count 0 2006.229.04:50:40.55#ibcon#about to read 6, iclass 7, count 0 2006.229.04:50:40.55#ibcon#read 6, iclass 7, count 0 2006.229.04:50:40.55#ibcon#end of sib2, iclass 7, count 0 2006.229.04:50:40.55#ibcon#*after write, iclass 7, count 0 2006.229.04:50:40.55#ibcon#*before return 0, iclass 7, count 0 2006.229.04:50:40.55#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:40.55#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.04:50:40.55#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.04:50:40.55#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.04:50:40.55$vck44/vbbw=wide 2006.229.04:50:40.55#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.04:50:40.55#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.04:50:40.55#ibcon#ireg 8 cls_cnt 0 2006.229.04:50:40.55#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:50:40.62#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:50:40.62#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:50:40.62#ibcon#enter wrdev, iclass 11, count 0 2006.229.04:50:40.62#ibcon#first serial, iclass 11, count 0 2006.229.04:50:40.62#ibcon#enter sib2, iclass 11, count 0 2006.229.04:50:40.62#ibcon#flushed, iclass 11, count 0 2006.229.04:50:40.62#ibcon#about to write, iclass 11, count 0 2006.229.04:50:40.62#ibcon#wrote, iclass 11, count 0 2006.229.04:50:40.62#ibcon#about to read 3, iclass 11, count 0 2006.229.04:50:40.64#ibcon#read 3, iclass 11, count 0 2006.229.04:50:40.64#ibcon#about to read 4, iclass 11, count 0 2006.229.04:50:40.64#ibcon#read 4, iclass 11, count 0 2006.229.04:50:40.64#ibcon#about to read 5, iclass 11, count 0 2006.229.04:50:40.64#ibcon#read 5, iclass 11, count 0 2006.229.04:50:40.64#ibcon#about to read 6, iclass 11, count 0 2006.229.04:50:40.64#ibcon#read 6, iclass 11, count 0 2006.229.04:50:40.64#ibcon#end of sib2, iclass 11, count 0 2006.229.04:50:40.64#ibcon#*mode == 0, iclass 11, count 0 2006.229.04:50:40.64#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.04:50:40.64#ibcon#[27=BW32\r\n] 2006.229.04:50:40.64#ibcon#*before write, iclass 11, count 0 2006.229.04:50:40.64#ibcon#enter sib2, iclass 11, count 0 2006.229.04:50:40.64#ibcon#flushed, iclass 11, count 0 2006.229.04:50:40.64#ibcon#about to write, iclass 11, count 0 2006.229.04:50:40.64#ibcon#wrote, iclass 11, count 0 2006.229.04:50:40.64#ibcon#about to read 3, iclass 11, count 0 2006.229.04:50:40.67#ibcon#read 3, iclass 11, count 0 2006.229.04:50:40.67#ibcon#about to read 4, iclass 11, count 0 2006.229.04:50:40.67#ibcon#read 4, iclass 11, count 0 2006.229.04:50:40.67#ibcon#about to read 5, iclass 11, count 0 2006.229.04:50:40.67#ibcon#read 5, iclass 11, count 0 2006.229.04:50:40.67#ibcon#about to read 6, iclass 11, count 0 2006.229.04:50:40.67#ibcon#read 6, iclass 11, count 0 2006.229.04:50:40.67#ibcon#end of sib2, iclass 11, count 0 2006.229.04:50:40.67#ibcon#*after write, iclass 11, count 0 2006.229.04:50:40.67#ibcon#*before return 0, iclass 11, count 0 2006.229.04:50:40.67#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:50:40.67#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.04:50:40.67#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.04:50:40.67#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.04:50:40.67$setupk4/ifdk4 2006.229.04:50:40.67$ifdk4/lo= 2006.229.04:50:40.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:50:40.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:50:40.67$ifdk4/patch= 2006.229.04:50:40.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:50:40.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:50:40.67$setupk4/!*+20s 2006.229.04:50:50.13#abcon#<5=/04 3.5 6.6 31.15 91 999.6\r\n> 2006.229.04:50:50.15#abcon#{5=INTERFACE CLEAR} 2006.229.04:50:50.21#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:50:55.18$setupk4/"tpicd 2006.229.04:50:55.18$setupk4/echo=off 2006.229.04:50:55.18$setupk4/xlog=off 2006.229.04:50:55.18:!2006.229.04:56:58 2006.229.04:50:58.13#trakl#Source acquired 2006.229.04:51:00.13#flagr#flagr/antenna,acquired 2006.229.04:56:58.00:preob 2006.229.04:56:58.14/onsource/TRACKING 2006.229.04:56:58.14:!2006.229.04:57:08 2006.229.04:57:08.00:"tape 2006.229.04:57:08.00:"st=record 2006.229.04:57:08.00:data_valid=on 2006.229.04:57:08.00:midob 2006.229.04:57:09.14/onsource/TRACKING 2006.229.04:57:09.14/wx/31.16,999.6,91 2006.229.04:57:09.22/cable/+6.4034E-03 2006.229.04:57:10.31/va/01,08,usb,yes,37,40 2006.229.04:57:10.31/va/02,07,usb,yes,40,41 2006.229.04:57:10.31/va/03,06,usb,yes,50,53 2006.229.04:57:10.31/va/04,07,usb,yes,42,44 2006.229.04:57:10.31/va/05,04,usb,yes,37,38 2006.229.04:57:10.31/va/06,04,usb,yes,42,41 2006.229.04:57:10.31/va/07,05,usb,yes,37,38 2006.229.04:57:10.31/va/08,06,usb,yes,27,33 2006.229.04:57:10.54/valo/01,524.99,yes,locked 2006.229.04:57:10.54/valo/02,534.99,yes,locked 2006.229.04:57:10.54/valo/03,564.99,yes,locked 2006.229.04:57:10.54/valo/04,624.99,yes,locked 2006.229.04:57:10.54/valo/05,734.99,yes,locked 2006.229.04:57:10.54/valo/06,814.99,yes,locked 2006.229.04:57:10.54/valo/07,864.99,yes,locked 2006.229.04:57:10.54/valo/08,884.99,yes,locked 2006.229.04:57:11.63/vb/01,04,usb,yes,34,31 2006.229.04:57:11.63/vb/02,04,usb,yes,36,36 2006.229.04:57:11.63/vb/03,04,usb,yes,33,36 2006.229.04:57:11.63/vb/04,04,usb,yes,38,37 2006.229.04:57:11.63/vb/05,04,usb,yes,30,32 2006.229.04:57:11.63/vb/06,04,usb,yes,35,30 2006.229.04:57:11.63/vb/07,04,usb,yes,34,34 2006.229.04:57:11.63/vb/08,04,usb,yes,32,35 2006.229.04:57:11.86/vblo/01,629.99,yes,locked 2006.229.04:57:11.86/vblo/02,634.99,yes,locked 2006.229.04:57:11.86/vblo/03,649.99,yes,locked 2006.229.04:57:11.86/vblo/04,679.99,yes,locked 2006.229.04:57:11.86/vblo/05,709.99,yes,locked 2006.229.04:57:11.86/vblo/06,719.99,yes,locked 2006.229.04:57:11.86/vblo/07,734.99,yes,locked 2006.229.04:57:11.86/vblo/08,744.99,yes,locked 2006.229.04:57:12.01/vabw/8 2006.229.04:57:12.16/vbbw/8 2006.229.04:57:12.25/xfe/off,on,12.0 2006.229.04:57:12.63/ifatt/23,28,28,28 2006.229.04:57:13.08/fmout-gps/S +4.54E-07 2006.229.04:57:13.12:!2006.229.04:57:48 2006.229.04:57:48.00:data_valid=off 2006.229.04:57:48.00:"et 2006.229.04:57:48.00:!+3s 2006.229.04:57:51.02:"tape 2006.229.04:57:51.02:postob 2006.229.04:57:51.19/cable/+6.4022E-03 2006.229.04:57:51.19/wx/31.15,999.6,91 2006.229.04:57:52.08/fmout-gps/S +4.53E-07 2006.229.04:57:52.08:scan_name=229-0501,jd0608,40 2006.229.04:57:52.08:source=4c39.25,092703.01,390220.9,2000.0,ccw 2006.229.04:57:53.14#flagr#flagr/antenna,new-source 2006.229.04:57:53.14:checkk5 2006.229.04:57:53.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.04:57:53.98/chk_autoobs//k5ts2/ autoobs is running! 2006.229.04:57:54.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.04:57:54.80/chk_autoobs//k5ts4/ autoobs is running! 2006.229.04:57:55.19/chk_obsdata//k5ts1/T2290457??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:57:55.58/chk_obsdata//k5ts2/T2290457??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:57:56.01/chk_obsdata//k5ts3/T2290457??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:57:56.41/chk_obsdata//k5ts4/T2290457??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.04:57:57.13/k5log//k5ts1_log_newline 2006.229.04:57:57.84/k5log//k5ts2_log_newline 2006.229.04:57:58.55/k5log//k5ts3_log_newline 2006.229.04:57:59.26/k5log//k5ts4_log_newline 2006.229.04:57:59.28/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.04:57:59.28:setupk4=1 2006.229.04:57:59.28$setupk4/echo=on 2006.229.04:57:59.28$setupk4/pcalon 2006.229.04:57:59.28$pcalon/"no phase cal control is implemented here 2006.229.04:57:59.28$setupk4/"tpicd=stop 2006.229.04:57:59.28$setupk4/"rec=synch_on 2006.229.04:57:59.28$setupk4/"rec_mode=128 2006.229.04:57:59.28$setupk4/!* 2006.229.04:57:59.28$setupk4/recpk4 2006.229.04:57:59.28$recpk4/recpatch= 2006.229.04:57:59.29$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.04:57:59.29$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.04:57:59.29$setupk4/vck44 2006.229.04:57:59.29$vck44/valo=1,524.99 2006.229.04:57:59.29#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.04:57:59.29#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.04:57:59.29#ibcon#ireg 17 cls_cnt 0 2006.229.04:57:59.29#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:57:59.29#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:57:59.29#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:57:59.29#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:57:59.29#ibcon#first serial, iclass 6, count 0 2006.229.04:57:59.29#ibcon#enter sib2, iclass 6, count 0 2006.229.04:57:59.29#ibcon#flushed, iclass 6, count 0 2006.229.04:57:59.29#ibcon#about to write, iclass 6, count 0 2006.229.04:57:59.29#ibcon#wrote, iclass 6, count 0 2006.229.04:57:59.29#ibcon#about to read 3, iclass 6, count 0 2006.229.04:57:59.31#ibcon#read 3, iclass 6, count 0 2006.229.04:57:59.31#ibcon#about to read 4, iclass 6, count 0 2006.229.04:57:59.31#ibcon#read 4, iclass 6, count 0 2006.229.04:57:59.31#ibcon#about to read 5, iclass 6, count 0 2006.229.04:57:59.31#ibcon#read 5, iclass 6, count 0 2006.229.04:57:59.31#ibcon#about to read 6, iclass 6, count 0 2006.229.04:57:59.31#ibcon#read 6, iclass 6, count 0 2006.229.04:57:59.31#ibcon#end of sib2, iclass 6, count 0 2006.229.04:57:59.31#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:57:59.31#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:57:59.31#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.04:57:59.31#ibcon#*before write, iclass 6, count 0 2006.229.04:57:59.31#ibcon#enter sib2, iclass 6, count 0 2006.229.04:57:59.31#ibcon#flushed, iclass 6, count 0 2006.229.04:57:59.31#ibcon#about to write, iclass 6, count 0 2006.229.04:57:59.31#ibcon#wrote, iclass 6, count 0 2006.229.04:57:59.31#ibcon#about to read 3, iclass 6, count 0 2006.229.04:57:59.36#ibcon#read 3, iclass 6, count 0 2006.229.04:57:59.36#ibcon#about to read 4, iclass 6, count 0 2006.229.04:57:59.36#ibcon#read 4, iclass 6, count 0 2006.229.04:57:59.36#ibcon#about to read 5, iclass 6, count 0 2006.229.04:57:59.36#ibcon#read 5, iclass 6, count 0 2006.229.04:57:59.36#ibcon#about to read 6, iclass 6, count 0 2006.229.04:57:59.36#ibcon#read 6, iclass 6, count 0 2006.229.04:57:59.36#ibcon#end of sib2, iclass 6, count 0 2006.229.04:57:59.36#ibcon#*after write, iclass 6, count 0 2006.229.04:57:59.36#ibcon#*before return 0, iclass 6, count 0 2006.229.04:57:59.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:57:59.36#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:57:59.36#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:57:59.36#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:57:59.36$vck44/va=1,8 2006.229.04:57:59.36#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.04:57:59.36#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.04:57:59.36#ibcon#ireg 11 cls_cnt 2 2006.229.04:57:59.36#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:57:59.36#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:57:59.36#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:57:59.36#ibcon#enter wrdev, iclass 10, count 2 2006.229.04:57:59.36#ibcon#first serial, iclass 10, count 2 2006.229.04:57:59.36#ibcon#enter sib2, iclass 10, count 2 2006.229.04:57:59.36#ibcon#flushed, iclass 10, count 2 2006.229.04:57:59.36#ibcon#about to write, iclass 10, count 2 2006.229.04:57:59.36#ibcon#wrote, iclass 10, count 2 2006.229.04:57:59.36#ibcon#about to read 3, iclass 10, count 2 2006.229.04:57:59.38#ibcon#read 3, iclass 10, count 2 2006.229.04:57:59.38#ibcon#about to read 4, iclass 10, count 2 2006.229.04:57:59.38#ibcon#read 4, iclass 10, count 2 2006.229.04:57:59.38#ibcon#about to read 5, iclass 10, count 2 2006.229.04:57:59.38#ibcon#read 5, iclass 10, count 2 2006.229.04:57:59.38#ibcon#about to read 6, iclass 10, count 2 2006.229.04:57:59.38#ibcon#read 6, iclass 10, count 2 2006.229.04:57:59.38#ibcon#end of sib2, iclass 10, count 2 2006.229.04:57:59.38#ibcon#*mode == 0, iclass 10, count 2 2006.229.04:57:59.38#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.04:57:59.38#ibcon#[25=AT01-08\r\n] 2006.229.04:57:59.38#ibcon#*before write, iclass 10, count 2 2006.229.04:57:59.38#ibcon#enter sib2, iclass 10, count 2 2006.229.04:57:59.38#ibcon#flushed, iclass 10, count 2 2006.229.04:57:59.38#ibcon#about to write, iclass 10, count 2 2006.229.04:57:59.38#ibcon#wrote, iclass 10, count 2 2006.229.04:57:59.38#ibcon#about to read 3, iclass 10, count 2 2006.229.04:57:59.41#ibcon#read 3, iclass 10, count 2 2006.229.04:57:59.41#ibcon#about to read 4, iclass 10, count 2 2006.229.04:57:59.41#ibcon#read 4, iclass 10, count 2 2006.229.04:57:59.41#ibcon#about to read 5, iclass 10, count 2 2006.229.04:57:59.41#ibcon#read 5, iclass 10, count 2 2006.229.04:57:59.41#ibcon#about to read 6, iclass 10, count 2 2006.229.04:57:59.41#ibcon#read 6, iclass 10, count 2 2006.229.04:57:59.41#ibcon#end of sib2, iclass 10, count 2 2006.229.04:57:59.41#ibcon#*after write, iclass 10, count 2 2006.229.04:57:59.41#ibcon#*before return 0, iclass 10, count 2 2006.229.04:57:59.41#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:57:59.41#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:57:59.41#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.04:57:59.41#ibcon#ireg 7 cls_cnt 0 2006.229.04:57:59.41#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:57:59.53#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:57:59.53#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:57:59.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:57:59.53#ibcon#first serial, iclass 10, count 0 2006.229.04:57:59.53#ibcon#enter sib2, iclass 10, count 0 2006.229.04:57:59.53#ibcon#flushed, iclass 10, count 0 2006.229.04:57:59.53#ibcon#about to write, iclass 10, count 0 2006.229.04:57:59.53#ibcon#wrote, iclass 10, count 0 2006.229.04:57:59.53#ibcon#about to read 3, iclass 10, count 0 2006.229.04:57:59.55#ibcon#read 3, iclass 10, count 0 2006.229.04:57:59.55#ibcon#about to read 4, iclass 10, count 0 2006.229.04:57:59.55#ibcon#read 4, iclass 10, count 0 2006.229.04:57:59.55#ibcon#about to read 5, iclass 10, count 0 2006.229.04:57:59.55#ibcon#read 5, iclass 10, count 0 2006.229.04:57:59.55#ibcon#about to read 6, iclass 10, count 0 2006.229.04:57:59.55#ibcon#read 6, iclass 10, count 0 2006.229.04:57:59.55#ibcon#end of sib2, iclass 10, count 0 2006.229.04:57:59.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:57:59.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:57:59.55#ibcon#[25=USB\r\n] 2006.229.04:57:59.55#ibcon#*before write, iclass 10, count 0 2006.229.04:57:59.55#ibcon#enter sib2, iclass 10, count 0 2006.229.04:57:59.55#ibcon#flushed, iclass 10, count 0 2006.229.04:57:59.55#ibcon#about to write, iclass 10, count 0 2006.229.04:57:59.55#ibcon#wrote, iclass 10, count 0 2006.229.04:57:59.55#ibcon#about to read 3, iclass 10, count 0 2006.229.04:57:59.58#ibcon#read 3, iclass 10, count 0 2006.229.04:57:59.58#ibcon#about to read 4, iclass 10, count 0 2006.229.04:57:59.58#ibcon#read 4, iclass 10, count 0 2006.229.04:57:59.58#ibcon#about to read 5, iclass 10, count 0 2006.229.04:57:59.58#ibcon#read 5, iclass 10, count 0 2006.229.04:57:59.58#ibcon#about to read 6, iclass 10, count 0 2006.229.04:57:59.58#ibcon#read 6, iclass 10, count 0 2006.229.04:57:59.58#ibcon#end of sib2, iclass 10, count 0 2006.229.04:57:59.58#ibcon#*after write, iclass 10, count 0 2006.229.04:57:59.58#ibcon#*before return 0, iclass 10, count 0 2006.229.04:57:59.58#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:57:59.58#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:57:59.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:57:59.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:57:59.58$vck44/valo=2,534.99 2006.229.04:57:59.58#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:57:59.58#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:57:59.58#ibcon#ireg 17 cls_cnt 0 2006.229.04:57:59.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:57:59.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:57:59.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:57:59.58#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:57:59.58#ibcon#first serial, iclass 12, count 0 2006.229.04:57:59.58#ibcon#enter sib2, iclass 12, count 0 2006.229.04:57:59.58#ibcon#flushed, iclass 12, count 0 2006.229.04:57:59.58#ibcon#about to write, iclass 12, count 0 2006.229.04:57:59.58#ibcon#wrote, iclass 12, count 0 2006.229.04:57:59.58#ibcon#about to read 3, iclass 12, count 0 2006.229.04:57:59.60#ibcon#read 3, iclass 12, count 0 2006.229.04:57:59.60#ibcon#about to read 4, iclass 12, count 0 2006.229.04:57:59.60#ibcon#read 4, iclass 12, count 0 2006.229.04:57:59.60#ibcon#about to read 5, iclass 12, count 0 2006.229.04:57:59.60#ibcon#read 5, iclass 12, count 0 2006.229.04:57:59.60#ibcon#about to read 6, iclass 12, count 0 2006.229.04:57:59.60#ibcon#read 6, iclass 12, count 0 2006.229.04:57:59.60#ibcon#end of sib2, iclass 12, count 0 2006.229.04:57:59.60#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:57:59.60#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:57:59.60#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.04:57:59.60#ibcon#*before write, iclass 12, count 0 2006.229.04:57:59.60#ibcon#enter sib2, iclass 12, count 0 2006.229.04:57:59.60#ibcon#flushed, iclass 12, count 0 2006.229.04:57:59.60#ibcon#about to write, iclass 12, count 0 2006.229.04:57:59.60#ibcon#wrote, iclass 12, count 0 2006.229.04:57:59.60#ibcon#about to read 3, iclass 12, count 0 2006.229.04:57:59.64#ibcon#read 3, iclass 12, count 0 2006.229.04:57:59.64#ibcon#about to read 4, iclass 12, count 0 2006.229.04:57:59.64#ibcon#read 4, iclass 12, count 0 2006.229.04:57:59.64#ibcon#about to read 5, iclass 12, count 0 2006.229.04:57:59.64#ibcon#read 5, iclass 12, count 0 2006.229.04:57:59.64#ibcon#about to read 6, iclass 12, count 0 2006.229.04:57:59.64#ibcon#read 6, iclass 12, count 0 2006.229.04:57:59.64#ibcon#end of sib2, iclass 12, count 0 2006.229.04:57:59.64#ibcon#*after write, iclass 12, count 0 2006.229.04:57:59.64#ibcon#*before return 0, iclass 12, count 0 2006.229.04:57:59.64#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:57:59.64#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:57:59.64#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:57:59.64#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:57:59.64$vck44/va=2,7 2006.229.04:57:59.64#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.04:57:59.64#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.04:57:59.64#ibcon#ireg 11 cls_cnt 2 2006.229.04:57:59.64#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:57:59.70#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:57:59.70#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:57:59.70#ibcon#enter wrdev, iclass 14, count 2 2006.229.04:57:59.70#ibcon#first serial, iclass 14, count 2 2006.229.04:57:59.70#ibcon#enter sib2, iclass 14, count 2 2006.229.04:57:59.70#ibcon#flushed, iclass 14, count 2 2006.229.04:57:59.70#ibcon#about to write, iclass 14, count 2 2006.229.04:57:59.70#ibcon#wrote, iclass 14, count 2 2006.229.04:57:59.70#ibcon#about to read 3, iclass 14, count 2 2006.229.04:57:59.72#ibcon#read 3, iclass 14, count 2 2006.229.04:57:59.72#ibcon#about to read 4, iclass 14, count 2 2006.229.04:57:59.72#ibcon#read 4, iclass 14, count 2 2006.229.04:57:59.72#ibcon#about to read 5, iclass 14, count 2 2006.229.04:57:59.72#ibcon#read 5, iclass 14, count 2 2006.229.04:57:59.72#ibcon#about to read 6, iclass 14, count 2 2006.229.04:57:59.72#ibcon#read 6, iclass 14, count 2 2006.229.04:57:59.72#ibcon#end of sib2, iclass 14, count 2 2006.229.04:57:59.72#ibcon#*mode == 0, iclass 14, count 2 2006.229.04:57:59.72#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.04:57:59.72#ibcon#[25=AT02-07\r\n] 2006.229.04:57:59.72#ibcon#*before write, iclass 14, count 2 2006.229.04:57:59.72#ibcon#enter sib2, iclass 14, count 2 2006.229.04:57:59.72#ibcon#flushed, iclass 14, count 2 2006.229.04:57:59.72#ibcon#about to write, iclass 14, count 2 2006.229.04:57:59.72#ibcon#wrote, iclass 14, count 2 2006.229.04:57:59.72#ibcon#about to read 3, iclass 14, count 2 2006.229.04:57:59.75#ibcon#read 3, iclass 14, count 2 2006.229.04:57:59.75#ibcon#about to read 4, iclass 14, count 2 2006.229.04:57:59.75#ibcon#read 4, iclass 14, count 2 2006.229.04:57:59.75#ibcon#about to read 5, iclass 14, count 2 2006.229.04:57:59.75#ibcon#read 5, iclass 14, count 2 2006.229.04:57:59.75#ibcon#about to read 6, iclass 14, count 2 2006.229.04:57:59.75#ibcon#read 6, iclass 14, count 2 2006.229.04:57:59.75#ibcon#end of sib2, iclass 14, count 2 2006.229.04:57:59.75#ibcon#*after write, iclass 14, count 2 2006.229.04:57:59.75#ibcon#*before return 0, iclass 14, count 2 2006.229.04:57:59.75#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:57:59.75#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:57:59.75#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.04:57:59.75#ibcon#ireg 7 cls_cnt 0 2006.229.04:57:59.75#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:57:59.87#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:57:59.87#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:57:59.87#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:57:59.87#ibcon#first serial, iclass 14, count 0 2006.229.04:57:59.87#ibcon#enter sib2, iclass 14, count 0 2006.229.04:57:59.87#ibcon#flushed, iclass 14, count 0 2006.229.04:57:59.87#ibcon#about to write, iclass 14, count 0 2006.229.04:57:59.87#ibcon#wrote, iclass 14, count 0 2006.229.04:57:59.87#ibcon#about to read 3, iclass 14, count 0 2006.229.04:57:59.89#ibcon#read 3, iclass 14, count 0 2006.229.04:57:59.89#ibcon#about to read 4, iclass 14, count 0 2006.229.04:57:59.89#ibcon#read 4, iclass 14, count 0 2006.229.04:57:59.89#ibcon#about to read 5, iclass 14, count 0 2006.229.04:57:59.89#ibcon#read 5, iclass 14, count 0 2006.229.04:57:59.89#ibcon#about to read 6, iclass 14, count 0 2006.229.04:57:59.89#ibcon#read 6, iclass 14, count 0 2006.229.04:57:59.89#ibcon#end of sib2, iclass 14, count 0 2006.229.04:57:59.89#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:57:59.89#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:57:59.89#ibcon#[25=USB\r\n] 2006.229.04:57:59.89#ibcon#*before write, iclass 14, count 0 2006.229.04:57:59.89#ibcon#enter sib2, iclass 14, count 0 2006.229.04:57:59.89#ibcon#flushed, iclass 14, count 0 2006.229.04:57:59.89#ibcon#about to write, iclass 14, count 0 2006.229.04:57:59.89#ibcon#wrote, iclass 14, count 0 2006.229.04:57:59.89#ibcon#about to read 3, iclass 14, count 0 2006.229.04:57:59.92#ibcon#read 3, iclass 14, count 0 2006.229.04:57:59.92#ibcon#about to read 4, iclass 14, count 0 2006.229.04:57:59.92#ibcon#read 4, iclass 14, count 0 2006.229.04:57:59.92#ibcon#about to read 5, iclass 14, count 0 2006.229.04:57:59.92#ibcon#read 5, iclass 14, count 0 2006.229.04:57:59.92#ibcon#about to read 6, iclass 14, count 0 2006.229.04:57:59.92#ibcon#read 6, iclass 14, count 0 2006.229.04:57:59.92#ibcon#end of sib2, iclass 14, count 0 2006.229.04:57:59.92#ibcon#*after write, iclass 14, count 0 2006.229.04:57:59.92#ibcon#*before return 0, iclass 14, count 0 2006.229.04:57:59.92#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:57:59.92#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:57:59.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:57:59.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:57:59.92$vck44/valo=3,564.99 2006.229.04:57:59.92#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.04:57:59.92#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.04:57:59.92#ibcon#ireg 17 cls_cnt 0 2006.229.04:57:59.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:57:59.92#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:57:59.92#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:57:59.92#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:57:59.92#ibcon#first serial, iclass 16, count 0 2006.229.04:57:59.92#ibcon#enter sib2, iclass 16, count 0 2006.229.04:57:59.92#ibcon#flushed, iclass 16, count 0 2006.229.04:57:59.92#ibcon#about to write, iclass 16, count 0 2006.229.04:57:59.92#ibcon#wrote, iclass 16, count 0 2006.229.04:57:59.92#ibcon#about to read 3, iclass 16, count 0 2006.229.04:57:59.94#ibcon#read 3, iclass 16, count 0 2006.229.04:57:59.94#ibcon#about to read 4, iclass 16, count 0 2006.229.04:57:59.94#ibcon#read 4, iclass 16, count 0 2006.229.04:57:59.94#ibcon#about to read 5, iclass 16, count 0 2006.229.04:57:59.94#ibcon#read 5, iclass 16, count 0 2006.229.04:57:59.94#ibcon#about to read 6, iclass 16, count 0 2006.229.04:57:59.94#ibcon#read 6, iclass 16, count 0 2006.229.04:57:59.94#ibcon#end of sib2, iclass 16, count 0 2006.229.04:57:59.94#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:57:59.94#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:57:59.94#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.04:57:59.94#ibcon#*before write, iclass 16, count 0 2006.229.04:57:59.94#ibcon#enter sib2, iclass 16, count 0 2006.229.04:57:59.94#ibcon#flushed, iclass 16, count 0 2006.229.04:57:59.94#ibcon#about to write, iclass 16, count 0 2006.229.04:57:59.94#ibcon#wrote, iclass 16, count 0 2006.229.04:57:59.94#ibcon#about to read 3, iclass 16, count 0 2006.229.04:57:59.98#ibcon#read 3, iclass 16, count 0 2006.229.04:57:59.98#ibcon#about to read 4, iclass 16, count 0 2006.229.04:57:59.98#ibcon#read 4, iclass 16, count 0 2006.229.04:57:59.98#ibcon#about to read 5, iclass 16, count 0 2006.229.04:57:59.98#ibcon#read 5, iclass 16, count 0 2006.229.04:57:59.98#ibcon#about to read 6, iclass 16, count 0 2006.229.04:57:59.98#ibcon#read 6, iclass 16, count 0 2006.229.04:57:59.98#ibcon#end of sib2, iclass 16, count 0 2006.229.04:57:59.98#ibcon#*after write, iclass 16, count 0 2006.229.04:57:59.98#ibcon#*before return 0, iclass 16, count 0 2006.229.04:57:59.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:57:59.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:57:59.98#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:57:59.98#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:57:59.98$vck44/va=3,6 2006.229.04:57:59.98#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.04:57:59.98#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.04:57:59.98#ibcon#ireg 11 cls_cnt 2 2006.229.04:57:59.98#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:00.04#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:00.04#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:00.04#ibcon#enter wrdev, iclass 18, count 2 2006.229.04:58:00.04#ibcon#first serial, iclass 18, count 2 2006.229.04:58:00.04#ibcon#enter sib2, iclass 18, count 2 2006.229.04:58:00.04#ibcon#flushed, iclass 18, count 2 2006.229.04:58:00.04#ibcon#about to write, iclass 18, count 2 2006.229.04:58:00.04#ibcon#wrote, iclass 18, count 2 2006.229.04:58:00.04#ibcon#about to read 3, iclass 18, count 2 2006.229.04:58:00.06#ibcon#read 3, iclass 18, count 2 2006.229.04:58:00.06#ibcon#about to read 4, iclass 18, count 2 2006.229.04:58:00.06#ibcon#read 4, iclass 18, count 2 2006.229.04:58:00.06#ibcon#about to read 5, iclass 18, count 2 2006.229.04:58:00.06#ibcon#read 5, iclass 18, count 2 2006.229.04:58:00.06#ibcon#about to read 6, iclass 18, count 2 2006.229.04:58:00.06#ibcon#read 6, iclass 18, count 2 2006.229.04:58:00.06#ibcon#end of sib2, iclass 18, count 2 2006.229.04:58:00.06#ibcon#*mode == 0, iclass 18, count 2 2006.229.04:58:00.06#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.04:58:00.06#ibcon#[25=AT03-06\r\n] 2006.229.04:58:00.06#ibcon#*before write, iclass 18, count 2 2006.229.04:58:00.06#ibcon#enter sib2, iclass 18, count 2 2006.229.04:58:00.06#ibcon#flushed, iclass 18, count 2 2006.229.04:58:00.06#ibcon#about to write, iclass 18, count 2 2006.229.04:58:00.06#ibcon#wrote, iclass 18, count 2 2006.229.04:58:00.06#ibcon#about to read 3, iclass 18, count 2 2006.229.04:58:00.09#ibcon#read 3, iclass 18, count 2 2006.229.04:58:00.09#ibcon#about to read 4, iclass 18, count 2 2006.229.04:58:00.09#ibcon#read 4, iclass 18, count 2 2006.229.04:58:00.09#ibcon#about to read 5, iclass 18, count 2 2006.229.04:58:00.09#ibcon#read 5, iclass 18, count 2 2006.229.04:58:00.09#ibcon#about to read 6, iclass 18, count 2 2006.229.04:58:00.09#ibcon#read 6, iclass 18, count 2 2006.229.04:58:00.09#ibcon#end of sib2, iclass 18, count 2 2006.229.04:58:00.09#ibcon#*after write, iclass 18, count 2 2006.229.04:58:00.09#ibcon#*before return 0, iclass 18, count 2 2006.229.04:58:00.09#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:00.09#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:00.09#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.04:58:00.09#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:00.09#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:00.21#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:00.21#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:00.21#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:58:00.21#ibcon#first serial, iclass 18, count 0 2006.229.04:58:00.21#ibcon#enter sib2, iclass 18, count 0 2006.229.04:58:00.21#ibcon#flushed, iclass 18, count 0 2006.229.04:58:00.21#ibcon#about to write, iclass 18, count 0 2006.229.04:58:00.21#ibcon#wrote, iclass 18, count 0 2006.229.04:58:00.21#ibcon#about to read 3, iclass 18, count 0 2006.229.04:58:00.23#ibcon#read 3, iclass 18, count 0 2006.229.04:58:00.23#ibcon#about to read 4, iclass 18, count 0 2006.229.04:58:00.23#ibcon#read 4, iclass 18, count 0 2006.229.04:58:00.23#ibcon#about to read 5, iclass 18, count 0 2006.229.04:58:00.23#ibcon#read 5, iclass 18, count 0 2006.229.04:58:00.23#ibcon#about to read 6, iclass 18, count 0 2006.229.04:58:00.23#ibcon#read 6, iclass 18, count 0 2006.229.04:58:00.23#ibcon#end of sib2, iclass 18, count 0 2006.229.04:58:00.23#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:58:00.23#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:58:00.23#ibcon#[25=USB\r\n] 2006.229.04:58:00.23#ibcon#*before write, iclass 18, count 0 2006.229.04:58:00.23#ibcon#enter sib2, iclass 18, count 0 2006.229.04:58:00.23#ibcon#flushed, iclass 18, count 0 2006.229.04:58:00.23#ibcon#about to write, iclass 18, count 0 2006.229.04:58:00.23#ibcon#wrote, iclass 18, count 0 2006.229.04:58:00.23#ibcon#about to read 3, iclass 18, count 0 2006.229.04:58:00.26#ibcon#read 3, iclass 18, count 0 2006.229.04:58:00.26#ibcon#about to read 4, iclass 18, count 0 2006.229.04:58:00.26#ibcon#read 4, iclass 18, count 0 2006.229.04:58:00.26#ibcon#about to read 5, iclass 18, count 0 2006.229.04:58:00.26#ibcon#read 5, iclass 18, count 0 2006.229.04:58:00.26#ibcon#about to read 6, iclass 18, count 0 2006.229.04:58:00.26#ibcon#read 6, iclass 18, count 0 2006.229.04:58:00.26#ibcon#end of sib2, iclass 18, count 0 2006.229.04:58:00.26#ibcon#*after write, iclass 18, count 0 2006.229.04:58:00.26#ibcon#*before return 0, iclass 18, count 0 2006.229.04:58:00.26#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:00.26#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:00.26#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:58:00.26#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:58:00.26$vck44/valo=4,624.99 2006.229.04:58:00.26#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.04:58:00.26#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.04:58:00.26#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:00.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:00.26#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:00.26#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:00.26#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:58:00.26#ibcon#first serial, iclass 20, count 0 2006.229.04:58:00.26#ibcon#enter sib2, iclass 20, count 0 2006.229.04:58:00.26#ibcon#flushed, iclass 20, count 0 2006.229.04:58:00.26#ibcon#about to write, iclass 20, count 0 2006.229.04:58:00.26#ibcon#wrote, iclass 20, count 0 2006.229.04:58:00.26#ibcon#about to read 3, iclass 20, count 0 2006.229.04:58:00.28#ibcon#read 3, iclass 20, count 0 2006.229.04:58:00.28#ibcon#about to read 4, iclass 20, count 0 2006.229.04:58:00.28#ibcon#read 4, iclass 20, count 0 2006.229.04:58:00.28#ibcon#about to read 5, iclass 20, count 0 2006.229.04:58:00.28#ibcon#read 5, iclass 20, count 0 2006.229.04:58:00.28#ibcon#about to read 6, iclass 20, count 0 2006.229.04:58:00.28#ibcon#read 6, iclass 20, count 0 2006.229.04:58:00.28#ibcon#end of sib2, iclass 20, count 0 2006.229.04:58:00.28#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:58:00.28#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:58:00.28#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.04:58:00.28#ibcon#*before write, iclass 20, count 0 2006.229.04:58:00.28#ibcon#enter sib2, iclass 20, count 0 2006.229.04:58:00.28#ibcon#flushed, iclass 20, count 0 2006.229.04:58:00.28#ibcon#about to write, iclass 20, count 0 2006.229.04:58:00.28#ibcon#wrote, iclass 20, count 0 2006.229.04:58:00.28#ibcon#about to read 3, iclass 20, count 0 2006.229.04:58:00.32#ibcon#read 3, iclass 20, count 0 2006.229.04:58:00.32#ibcon#about to read 4, iclass 20, count 0 2006.229.04:58:00.32#ibcon#read 4, iclass 20, count 0 2006.229.04:58:00.32#ibcon#about to read 5, iclass 20, count 0 2006.229.04:58:00.32#ibcon#read 5, iclass 20, count 0 2006.229.04:58:00.32#ibcon#about to read 6, iclass 20, count 0 2006.229.04:58:00.32#ibcon#read 6, iclass 20, count 0 2006.229.04:58:00.32#ibcon#end of sib2, iclass 20, count 0 2006.229.04:58:00.32#ibcon#*after write, iclass 20, count 0 2006.229.04:58:00.32#ibcon#*before return 0, iclass 20, count 0 2006.229.04:58:00.32#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:00.32#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:00.32#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:58:00.32#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:58:00.32$vck44/va=4,7 2006.229.04:58:00.32#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.04:58:00.32#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.04:58:00.32#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:00.32#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:00.38#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:00.38#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:00.38#ibcon#enter wrdev, iclass 22, count 2 2006.229.04:58:00.38#ibcon#first serial, iclass 22, count 2 2006.229.04:58:00.38#ibcon#enter sib2, iclass 22, count 2 2006.229.04:58:00.38#ibcon#flushed, iclass 22, count 2 2006.229.04:58:00.38#ibcon#about to write, iclass 22, count 2 2006.229.04:58:00.38#ibcon#wrote, iclass 22, count 2 2006.229.04:58:00.38#ibcon#about to read 3, iclass 22, count 2 2006.229.04:58:00.40#ibcon#read 3, iclass 22, count 2 2006.229.04:58:00.40#ibcon#about to read 4, iclass 22, count 2 2006.229.04:58:00.40#ibcon#read 4, iclass 22, count 2 2006.229.04:58:00.40#ibcon#about to read 5, iclass 22, count 2 2006.229.04:58:00.40#ibcon#read 5, iclass 22, count 2 2006.229.04:58:00.40#ibcon#about to read 6, iclass 22, count 2 2006.229.04:58:00.40#ibcon#read 6, iclass 22, count 2 2006.229.04:58:00.40#ibcon#end of sib2, iclass 22, count 2 2006.229.04:58:00.40#ibcon#*mode == 0, iclass 22, count 2 2006.229.04:58:00.40#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.04:58:00.40#ibcon#[25=AT04-07\r\n] 2006.229.04:58:00.40#ibcon#*before write, iclass 22, count 2 2006.229.04:58:00.40#ibcon#enter sib2, iclass 22, count 2 2006.229.04:58:00.40#ibcon#flushed, iclass 22, count 2 2006.229.04:58:00.40#ibcon#about to write, iclass 22, count 2 2006.229.04:58:00.40#ibcon#wrote, iclass 22, count 2 2006.229.04:58:00.40#ibcon#about to read 3, iclass 22, count 2 2006.229.04:58:00.43#ibcon#read 3, iclass 22, count 2 2006.229.04:58:00.43#ibcon#about to read 4, iclass 22, count 2 2006.229.04:58:00.43#ibcon#read 4, iclass 22, count 2 2006.229.04:58:00.43#ibcon#about to read 5, iclass 22, count 2 2006.229.04:58:00.43#ibcon#read 5, iclass 22, count 2 2006.229.04:58:00.43#ibcon#about to read 6, iclass 22, count 2 2006.229.04:58:00.43#ibcon#read 6, iclass 22, count 2 2006.229.04:58:00.43#ibcon#end of sib2, iclass 22, count 2 2006.229.04:58:00.43#ibcon#*after write, iclass 22, count 2 2006.229.04:58:00.49#ibcon#*before return 0, iclass 22, count 2 2006.229.04:58:00.49#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:00.49#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:00.49#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.04:58:00.49#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:00.49#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:00.61#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:00.61#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:00.61#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:58:00.61#ibcon#first serial, iclass 22, count 0 2006.229.04:58:00.61#ibcon#enter sib2, iclass 22, count 0 2006.229.04:58:00.61#ibcon#flushed, iclass 22, count 0 2006.229.04:58:00.61#ibcon#about to write, iclass 22, count 0 2006.229.04:58:00.61#ibcon#wrote, iclass 22, count 0 2006.229.04:58:00.61#ibcon#about to read 3, iclass 22, count 0 2006.229.04:58:00.63#ibcon#read 3, iclass 22, count 0 2006.229.04:58:00.63#ibcon#about to read 4, iclass 22, count 0 2006.229.04:58:00.63#ibcon#read 4, iclass 22, count 0 2006.229.04:58:00.63#ibcon#about to read 5, iclass 22, count 0 2006.229.04:58:00.63#ibcon#read 5, iclass 22, count 0 2006.229.04:58:00.63#ibcon#about to read 6, iclass 22, count 0 2006.229.04:58:00.63#ibcon#read 6, iclass 22, count 0 2006.229.04:58:00.63#ibcon#end of sib2, iclass 22, count 0 2006.229.04:58:00.63#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:58:00.63#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:58:00.63#ibcon#[25=USB\r\n] 2006.229.04:58:00.63#ibcon#*before write, iclass 22, count 0 2006.229.04:58:00.63#ibcon#enter sib2, iclass 22, count 0 2006.229.04:58:00.63#ibcon#flushed, iclass 22, count 0 2006.229.04:58:00.63#ibcon#about to write, iclass 22, count 0 2006.229.04:58:00.63#ibcon#wrote, iclass 22, count 0 2006.229.04:58:00.63#ibcon#about to read 3, iclass 22, count 0 2006.229.04:58:00.66#ibcon#read 3, iclass 22, count 0 2006.229.04:58:00.66#ibcon#about to read 4, iclass 22, count 0 2006.229.04:58:00.66#ibcon#read 4, iclass 22, count 0 2006.229.04:58:00.66#ibcon#about to read 5, iclass 22, count 0 2006.229.04:58:00.66#ibcon#read 5, iclass 22, count 0 2006.229.04:58:00.66#ibcon#about to read 6, iclass 22, count 0 2006.229.04:58:00.66#ibcon#read 6, iclass 22, count 0 2006.229.04:58:00.66#ibcon#end of sib2, iclass 22, count 0 2006.229.04:58:00.66#ibcon#*after write, iclass 22, count 0 2006.229.04:58:00.66#ibcon#*before return 0, iclass 22, count 0 2006.229.04:58:00.66#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:00.66#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:00.66#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:58:00.66#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:58:00.66$vck44/valo=5,734.99 2006.229.04:58:00.66#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.04:58:00.66#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.04:58:00.66#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:00.66#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:00.66#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:00.66#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:00.66#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:58:00.66#ibcon#first serial, iclass 24, count 0 2006.229.04:58:00.66#ibcon#enter sib2, iclass 24, count 0 2006.229.04:58:00.66#ibcon#flushed, iclass 24, count 0 2006.229.04:58:00.66#ibcon#about to write, iclass 24, count 0 2006.229.04:58:00.66#ibcon#wrote, iclass 24, count 0 2006.229.04:58:00.66#ibcon#about to read 3, iclass 24, count 0 2006.229.04:58:00.68#ibcon#read 3, iclass 24, count 0 2006.229.04:58:00.68#ibcon#about to read 4, iclass 24, count 0 2006.229.04:58:00.68#ibcon#read 4, iclass 24, count 0 2006.229.04:58:00.68#ibcon#about to read 5, iclass 24, count 0 2006.229.04:58:00.68#ibcon#read 5, iclass 24, count 0 2006.229.04:58:00.68#ibcon#about to read 6, iclass 24, count 0 2006.229.04:58:00.68#ibcon#read 6, iclass 24, count 0 2006.229.04:58:00.68#ibcon#end of sib2, iclass 24, count 0 2006.229.04:58:00.68#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:58:00.68#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:58:00.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.04:58:00.68#ibcon#*before write, iclass 24, count 0 2006.229.04:58:00.68#ibcon#enter sib2, iclass 24, count 0 2006.229.04:58:00.68#ibcon#flushed, iclass 24, count 0 2006.229.04:58:00.68#ibcon#about to write, iclass 24, count 0 2006.229.04:58:00.68#ibcon#wrote, iclass 24, count 0 2006.229.04:58:00.68#ibcon#about to read 3, iclass 24, count 0 2006.229.04:58:00.72#ibcon#read 3, iclass 24, count 0 2006.229.04:58:00.72#ibcon#about to read 4, iclass 24, count 0 2006.229.04:58:00.72#ibcon#read 4, iclass 24, count 0 2006.229.04:58:00.72#ibcon#about to read 5, iclass 24, count 0 2006.229.04:58:00.72#ibcon#read 5, iclass 24, count 0 2006.229.04:58:00.72#ibcon#about to read 6, iclass 24, count 0 2006.229.04:58:00.72#ibcon#read 6, iclass 24, count 0 2006.229.04:58:00.72#ibcon#end of sib2, iclass 24, count 0 2006.229.04:58:00.72#ibcon#*after write, iclass 24, count 0 2006.229.04:58:00.72#ibcon#*before return 0, iclass 24, count 0 2006.229.04:58:00.72#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:00.72#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:00.72#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:58:00.72#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:58:00.72$vck44/va=5,4 2006.229.04:58:00.72#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.04:58:00.72#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.04:58:00.72#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:00.72#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:00.78#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:00.78#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:00.78#ibcon#enter wrdev, iclass 26, count 2 2006.229.04:58:00.78#ibcon#first serial, iclass 26, count 2 2006.229.04:58:00.78#ibcon#enter sib2, iclass 26, count 2 2006.229.04:58:00.78#ibcon#flushed, iclass 26, count 2 2006.229.04:58:00.78#ibcon#about to write, iclass 26, count 2 2006.229.04:58:00.78#ibcon#wrote, iclass 26, count 2 2006.229.04:58:00.78#ibcon#about to read 3, iclass 26, count 2 2006.229.04:58:00.80#ibcon#read 3, iclass 26, count 2 2006.229.04:58:00.80#ibcon#about to read 4, iclass 26, count 2 2006.229.04:58:00.80#ibcon#read 4, iclass 26, count 2 2006.229.04:58:00.80#ibcon#about to read 5, iclass 26, count 2 2006.229.04:58:00.80#ibcon#read 5, iclass 26, count 2 2006.229.04:58:00.80#ibcon#about to read 6, iclass 26, count 2 2006.229.04:58:00.80#ibcon#read 6, iclass 26, count 2 2006.229.04:58:00.80#ibcon#end of sib2, iclass 26, count 2 2006.229.04:58:00.80#ibcon#*mode == 0, iclass 26, count 2 2006.229.04:58:00.80#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.04:58:00.80#ibcon#[25=AT05-04\r\n] 2006.229.04:58:00.80#ibcon#*before write, iclass 26, count 2 2006.229.04:58:00.80#ibcon#enter sib2, iclass 26, count 2 2006.229.04:58:00.80#ibcon#flushed, iclass 26, count 2 2006.229.04:58:00.80#ibcon#about to write, iclass 26, count 2 2006.229.04:58:00.80#ibcon#wrote, iclass 26, count 2 2006.229.04:58:00.80#ibcon#about to read 3, iclass 26, count 2 2006.229.04:58:00.83#ibcon#read 3, iclass 26, count 2 2006.229.04:58:00.83#ibcon#about to read 4, iclass 26, count 2 2006.229.04:58:00.83#ibcon#read 4, iclass 26, count 2 2006.229.04:58:00.83#ibcon#about to read 5, iclass 26, count 2 2006.229.04:58:00.83#ibcon#read 5, iclass 26, count 2 2006.229.04:58:00.83#ibcon#about to read 6, iclass 26, count 2 2006.229.04:58:00.83#ibcon#read 6, iclass 26, count 2 2006.229.04:58:00.83#ibcon#end of sib2, iclass 26, count 2 2006.229.04:58:00.83#ibcon#*after write, iclass 26, count 2 2006.229.04:58:00.83#ibcon#*before return 0, iclass 26, count 2 2006.229.04:58:00.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:00.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:00.83#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.04:58:00.83#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:00.83#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:00.95#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:00.95#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:00.95#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:58:00.95#ibcon#first serial, iclass 26, count 0 2006.229.04:58:00.95#ibcon#enter sib2, iclass 26, count 0 2006.229.04:58:00.95#ibcon#flushed, iclass 26, count 0 2006.229.04:58:00.95#ibcon#about to write, iclass 26, count 0 2006.229.04:58:00.95#ibcon#wrote, iclass 26, count 0 2006.229.04:58:00.95#ibcon#about to read 3, iclass 26, count 0 2006.229.04:58:00.97#ibcon#read 3, iclass 26, count 0 2006.229.04:58:00.97#ibcon#about to read 4, iclass 26, count 0 2006.229.04:58:00.97#ibcon#read 4, iclass 26, count 0 2006.229.04:58:00.97#ibcon#about to read 5, iclass 26, count 0 2006.229.04:58:00.97#ibcon#read 5, iclass 26, count 0 2006.229.04:58:00.97#ibcon#about to read 6, iclass 26, count 0 2006.229.04:58:00.97#ibcon#read 6, iclass 26, count 0 2006.229.04:58:00.97#ibcon#end of sib2, iclass 26, count 0 2006.229.04:58:00.97#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:58:00.97#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:58:00.97#ibcon#[25=USB\r\n] 2006.229.04:58:00.97#ibcon#*before write, iclass 26, count 0 2006.229.04:58:00.97#ibcon#enter sib2, iclass 26, count 0 2006.229.04:58:00.97#ibcon#flushed, iclass 26, count 0 2006.229.04:58:00.97#ibcon#about to write, iclass 26, count 0 2006.229.04:58:00.97#ibcon#wrote, iclass 26, count 0 2006.229.04:58:00.97#ibcon#about to read 3, iclass 26, count 0 2006.229.04:58:01.00#ibcon#read 3, iclass 26, count 0 2006.229.04:58:01.00#ibcon#about to read 4, iclass 26, count 0 2006.229.04:58:01.00#ibcon#read 4, iclass 26, count 0 2006.229.04:58:01.00#ibcon#about to read 5, iclass 26, count 0 2006.229.04:58:01.00#ibcon#read 5, iclass 26, count 0 2006.229.04:58:01.00#ibcon#about to read 6, iclass 26, count 0 2006.229.04:58:01.00#ibcon#read 6, iclass 26, count 0 2006.229.04:58:01.00#ibcon#end of sib2, iclass 26, count 0 2006.229.04:58:01.00#ibcon#*after write, iclass 26, count 0 2006.229.04:58:01.00#ibcon#*before return 0, iclass 26, count 0 2006.229.04:58:01.00#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:01.00#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:01.00#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:58:01.00#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:58:01.00$vck44/valo=6,814.99 2006.229.04:58:01.00#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.04:58:01.00#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.04:58:01.00#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:01.00#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:01.00#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:01.00#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:01.00#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:58:01.00#ibcon#first serial, iclass 28, count 0 2006.229.04:58:01.00#ibcon#enter sib2, iclass 28, count 0 2006.229.04:58:01.00#ibcon#flushed, iclass 28, count 0 2006.229.04:58:01.00#ibcon#about to write, iclass 28, count 0 2006.229.04:58:01.00#ibcon#wrote, iclass 28, count 0 2006.229.04:58:01.00#ibcon#about to read 3, iclass 28, count 0 2006.229.04:58:01.02#ibcon#read 3, iclass 28, count 0 2006.229.04:58:01.02#ibcon#about to read 4, iclass 28, count 0 2006.229.04:58:01.02#ibcon#read 4, iclass 28, count 0 2006.229.04:58:01.02#ibcon#about to read 5, iclass 28, count 0 2006.229.04:58:01.02#ibcon#read 5, iclass 28, count 0 2006.229.04:58:01.02#ibcon#about to read 6, iclass 28, count 0 2006.229.04:58:01.02#ibcon#read 6, iclass 28, count 0 2006.229.04:58:01.02#ibcon#end of sib2, iclass 28, count 0 2006.229.04:58:01.02#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:58:01.02#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:58:01.02#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.04:58:01.02#ibcon#*before write, iclass 28, count 0 2006.229.04:58:01.02#ibcon#enter sib2, iclass 28, count 0 2006.229.04:58:01.02#ibcon#flushed, iclass 28, count 0 2006.229.04:58:01.02#ibcon#about to write, iclass 28, count 0 2006.229.04:58:01.02#ibcon#wrote, iclass 28, count 0 2006.229.04:58:01.02#ibcon#about to read 3, iclass 28, count 0 2006.229.04:58:01.06#ibcon#read 3, iclass 28, count 0 2006.229.04:58:01.06#ibcon#about to read 4, iclass 28, count 0 2006.229.04:58:01.06#ibcon#read 4, iclass 28, count 0 2006.229.04:58:01.06#ibcon#about to read 5, iclass 28, count 0 2006.229.04:58:01.06#ibcon#read 5, iclass 28, count 0 2006.229.04:58:01.06#ibcon#about to read 6, iclass 28, count 0 2006.229.04:58:01.06#ibcon#read 6, iclass 28, count 0 2006.229.04:58:01.06#ibcon#end of sib2, iclass 28, count 0 2006.229.04:58:01.06#ibcon#*after write, iclass 28, count 0 2006.229.04:58:01.06#ibcon#*before return 0, iclass 28, count 0 2006.229.04:58:01.06#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:01.06#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:01.06#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:58:01.06#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:58:01.06$vck44/va=6,4 2006.229.04:58:01.06#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.04:58:01.06#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.04:58:01.06#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:01.06#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:01.12#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:01.12#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:01.12#ibcon#enter wrdev, iclass 30, count 2 2006.229.04:58:01.12#ibcon#first serial, iclass 30, count 2 2006.229.04:58:01.12#ibcon#enter sib2, iclass 30, count 2 2006.229.04:58:01.12#ibcon#flushed, iclass 30, count 2 2006.229.04:58:01.12#ibcon#about to write, iclass 30, count 2 2006.229.04:58:01.12#ibcon#wrote, iclass 30, count 2 2006.229.04:58:01.12#ibcon#about to read 3, iclass 30, count 2 2006.229.04:58:01.14#ibcon#read 3, iclass 30, count 2 2006.229.04:58:01.14#ibcon#about to read 4, iclass 30, count 2 2006.229.04:58:01.14#ibcon#read 4, iclass 30, count 2 2006.229.04:58:01.14#ibcon#about to read 5, iclass 30, count 2 2006.229.04:58:01.14#ibcon#read 5, iclass 30, count 2 2006.229.04:58:01.14#ibcon#about to read 6, iclass 30, count 2 2006.229.04:58:01.14#ibcon#read 6, iclass 30, count 2 2006.229.04:58:01.14#ibcon#end of sib2, iclass 30, count 2 2006.229.04:58:01.14#ibcon#*mode == 0, iclass 30, count 2 2006.229.04:58:01.14#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.04:58:01.14#ibcon#[25=AT06-04\r\n] 2006.229.04:58:01.14#ibcon#*before write, iclass 30, count 2 2006.229.04:58:01.14#ibcon#enter sib2, iclass 30, count 2 2006.229.04:58:01.14#ibcon#flushed, iclass 30, count 2 2006.229.04:58:01.14#ibcon#about to write, iclass 30, count 2 2006.229.04:58:01.14#ibcon#wrote, iclass 30, count 2 2006.229.04:58:01.14#ibcon#about to read 3, iclass 30, count 2 2006.229.04:58:01.17#ibcon#read 3, iclass 30, count 2 2006.229.04:58:01.17#ibcon#about to read 4, iclass 30, count 2 2006.229.04:58:01.17#ibcon#read 4, iclass 30, count 2 2006.229.04:58:01.17#ibcon#about to read 5, iclass 30, count 2 2006.229.04:58:01.17#ibcon#read 5, iclass 30, count 2 2006.229.04:58:01.17#ibcon#about to read 6, iclass 30, count 2 2006.229.04:58:01.17#ibcon#read 6, iclass 30, count 2 2006.229.04:58:01.17#ibcon#end of sib2, iclass 30, count 2 2006.229.04:58:01.17#ibcon#*after write, iclass 30, count 2 2006.229.04:58:01.17#ibcon#*before return 0, iclass 30, count 2 2006.229.04:58:01.17#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:01.17#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:01.17#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.04:58:01.17#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:01.17#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:01.29#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:01.29#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:01.29#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:58:01.29#ibcon#first serial, iclass 30, count 0 2006.229.04:58:01.29#ibcon#enter sib2, iclass 30, count 0 2006.229.04:58:01.29#ibcon#flushed, iclass 30, count 0 2006.229.04:58:01.29#ibcon#about to write, iclass 30, count 0 2006.229.04:58:01.29#ibcon#wrote, iclass 30, count 0 2006.229.04:58:01.29#ibcon#about to read 3, iclass 30, count 0 2006.229.04:58:01.31#ibcon#read 3, iclass 30, count 0 2006.229.04:58:01.31#ibcon#about to read 4, iclass 30, count 0 2006.229.04:58:01.31#ibcon#read 4, iclass 30, count 0 2006.229.04:58:01.31#ibcon#about to read 5, iclass 30, count 0 2006.229.04:58:01.31#ibcon#read 5, iclass 30, count 0 2006.229.04:58:01.31#ibcon#about to read 6, iclass 30, count 0 2006.229.04:58:01.31#ibcon#read 6, iclass 30, count 0 2006.229.04:58:01.31#ibcon#end of sib2, iclass 30, count 0 2006.229.04:58:01.31#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:58:01.31#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:58:01.31#ibcon#[25=USB\r\n] 2006.229.04:58:01.31#ibcon#*before write, iclass 30, count 0 2006.229.04:58:01.31#ibcon#enter sib2, iclass 30, count 0 2006.229.04:58:01.31#ibcon#flushed, iclass 30, count 0 2006.229.04:58:01.31#ibcon#about to write, iclass 30, count 0 2006.229.04:58:01.31#ibcon#wrote, iclass 30, count 0 2006.229.04:58:01.31#ibcon#about to read 3, iclass 30, count 0 2006.229.04:58:01.34#ibcon#read 3, iclass 30, count 0 2006.229.04:58:01.34#ibcon#about to read 4, iclass 30, count 0 2006.229.04:58:01.34#ibcon#read 4, iclass 30, count 0 2006.229.04:58:01.34#ibcon#about to read 5, iclass 30, count 0 2006.229.04:58:01.34#ibcon#read 5, iclass 30, count 0 2006.229.04:58:01.34#ibcon#about to read 6, iclass 30, count 0 2006.229.04:58:01.34#ibcon#read 6, iclass 30, count 0 2006.229.04:58:01.34#ibcon#end of sib2, iclass 30, count 0 2006.229.04:58:01.34#ibcon#*after write, iclass 30, count 0 2006.229.04:58:01.34#ibcon#*before return 0, iclass 30, count 0 2006.229.04:58:01.34#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:01.34#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:01.34#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:58:01.34#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:58:01.34$vck44/valo=7,864.99 2006.229.04:58:01.34#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.04:58:01.34#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.04:58:01.34#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:01.34#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:01.34#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:01.34#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:01.34#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:58:01.34#ibcon#first serial, iclass 32, count 0 2006.229.04:58:01.34#ibcon#enter sib2, iclass 32, count 0 2006.229.04:58:01.34#ibcon#flushed, iclass 32, count 0 2006.229.04:58:01.34#ibcon#about to write, iclass 32, count 0 2006.229.04:58:01.34#ibcon#wrote, iclass 32, count 0 2006.229.04:58:01.34#ibcon#about to read 3, iclass 32, count 0 2006.229.04:58:01.36#ibcon#read 3, iclass 32, count 0 2006.229.04:58:01.36#ibcon#about to read 4, iclass 32, count 0 2006.229.04:58:01.36#ibcon#read 4, iclass 32, count 0 2006.229.04:58:01.36#ibcon#about to read 5, iclass 32, count 0 2006.229.04:58:01.36#ibcon#read 5, iclass 32, count 0 2006.229.04:58:01.36#ibcon#about to read 6, iclass 32, count 0 2006.229.04:58:01.36#ibcon#read 6, iclass 32, count 0 2006.229.04:58:01.36#ibcon#end of sib2, iclass 32, count 0 2006.229.04:58:01.36#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:58:01.36#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:58:01.36#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.04:58:01.36#ibcon#*before write, iclass 32, count 0 2006.229.04:58:01.36#ibcon#enter sib2, iclass 32, count 0 2006.229.04:58:01.36#ibcon#flushed, iclass 32, count 0 2006.229.04:58:01.36#ibcon#about to write, iclass 32, count 0 2006.229.04:58:01.36#ibcon#wrote, iclass 32, count 0 2006.229.04:58:01.36#ibcon#about to read 3, iclass 32, count 0 2006.229.04:58:01.40#ibcon#read 3, iclass 32, count 0 2006.229.04:58:01.40#ibcon#about to read 4, iclass 32, count 0 2006.229.04:58:01.40#ibcon#read 4, iclass 32, count 0 2006.229.04:58:01.40#ibcon#about to read 5, iclass 32, count 0 2006.229.04:58:01.40#ibcon#read 5, iclass 32, count 0 2006.229.04:58:01.40#ibcon#about to read 6, iclass 32, count 0 2006.229.04:58:01.40#ibcon#read 6, iclass 32, count 0 2006.229.04:58:01.40#ibcon#end of sib2, iclass 32, count 0 2006.229.04:58:01.40#ibcon#*after write, iclass 32, count 0 2006.229.04:58:01.40#ibcon#*before return 0, iclass 32, count 0 2006.229.04:58:01.40#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:01.40#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:01.40#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:58:01.40#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:58:01.40$vck44/va=7,5 2006.229.04:58:01.40#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.04:58:01.40#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.04:58:01.40#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:01.40#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:01.46#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:01.46#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:01.46#ibcon#enter wrdev, iclass 34, count 2 2006.229.04:58:01.46#ibcon#first serial, iclass 34, count 2 2006.229.04:58:01.46#ibcon#enter sib2, iclass 34, count 2 2006.229.04:58:01.46#ibcon#flushed, iclass 34, count 2 2006.229.04:58:01.46#ibcon#about to write, iclass 34, count 2 2006.229.04:58:01.46#ibcon#wrote, iclass 34, count 2 2006.229.04:58:01.46#ibcon#about to read 3, iclass 34, count 2 2006.229.04:58:01.48#ibcon#read 3, iclass 34, count 2 2006.229.04:58:01.48#ibcon#about to read 4, iclass 34, count 2 2006.229.04:58:01.48#ibcon#read 4, iclass 34, count 2 2006.229.04:58:01.48#ibcon#about to read 5, iclass 34, count 2 2006.229.04:58:01.48#ibcon#read 5, iclass 34, count 2 2006.229.04:58:01.48#ibcon#about to read 6, iclass 34, count 2 2006.229.04:58:01.48#ibcon#read 6, iclass 34, count 2 2006.229.04:58:01.48#ibcon#end of sib2, iclass 34, count 2 2006.229.04:58:01.48#ibcon#*mode == 0, iclass 34, count 2 2006.229.04:58:01.48#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.04:58:01.48#ibcon#[25=AT07-05\r\n] 2006.229.04:58:01.48#ibcon#*before write, iclass 34, count 2 2006.229.04:58:01.48#ibcon#enter sib2, iclass 34, count 2 2006.229.04:58:01.48#ibcon#flushed, iclass 34, count 2 2006.229.04:58:01.48#ibcon#about to write, iclass 34, count 2 2006.229.04:58:01.48#ibcon#wrote, iclass 34, count 2 2006.229.04:58:01.48#ibcon#about to read 3, iclass 34, count 2 2006.229.04:58:01.51#ibcon#read 3, iclass 34, count 2 2006.229.04:58:01.51#ibcon#about to read 4, iclass 34, count 2 2006.229.04:58:01.51#ibcon#read 4, iclass 34, count 2 2006.229.04:58:01.51#ibcon#about to read 5, iclass 34, count 2 2006.229.04:58:01.51#ibcon#read 5, iclass 34, count 2 2006.229.04:58:01.51#ibcon#about to read 6, iclass 34, count 2 2006.229.04:58:01.51#ibcon#read 6, iclass 34, count 2 2006.229.04:58:01.51#ibcon#end of sib2, iclass 34, count 2 2006.229.04:58:01.51#ibcon#*after write, iclass 34, count 2 2006.229.04:58:01.51#ibcon#*before return 0, iclass 34, count 2 2006.229.04:58:01.51#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:01.51#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:01.51#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.04:58:01.51#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:01.51#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:01.63#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:01.63#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:01.63#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:58:01.63#ibcon#first serial, iclass 34, count 0 2006.229.04:58:01.63#ibcon#enter sib2, iclass 34, count 0 2006.229.04:58:01.63#ibcon#flushed, iclass 34, count 0 2006.229.04:58:01.63#ibcon#about to write, iclass 34, count 0 2006.229.04:58:01.63#ibcon#wrote, iclass 34, count 0 2006.229.04:58:01.63#ibcon#about to read 3, iclass 34, count 0 2006.229.04:58:01.65#ibcon#read 3, iclass 34, count 0 2006.229.04:58:01.65#ibcon#about to read 4, iclass 34, count 0 2006.229.04:58:01.65#ibcon#read 4, iclass 34, count 0 2006.229.04:58:01.65#ibcon#about to read 5, iclass 34, count 0 2006.229.04:58:01.65#ibcon#read 5, iclass 34, count 0 2006.229.04:58:01.65#ibcon#about to read 6, iclass 34, count 0 2006.229.04:58:01.65#ibcon#read 6, iclass 34, count 0 2006.229.04:58:01.65#ibcon#end of sib2, iclass 34, count 0 2006.229.04:58:01.65#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:58:01.65#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:58:01.65#ibcon#[25=USB\r\n] 2006.229.04:58:01.65#ibcon#*before write, iclass 34, count 0 2006.229.04:58:01.65#ibcon#enter sib2, iclass 34, count 0 2006.229.04:58:01.65#ibcon#flushed, iclass 34, count 0 2006.229.04:58:01.65#ibcon#about to write, iclass 34, count 0 2006.229.04:58:01.65#ibcon#wrote, iclass 34, count 0 2006.229.04:58:01.65#ibcon#about to read 3, iclass 34, count 0 2006.229.04:58:01.68#ibcon#read 3, iclass 34, count 0 2006.229.04:58:01.68#ibcon#about to read 4, iclass 34, count 0 2006.229.04:58:01.68#ibcon#read 4, iclass 34, count 0 2006.229.04:58:01.68#ibcon#about to read 5, iclass 34, count 0 2006.229.04:58:01.68#ibcon#read 5, iclass 34, count 0 2006.229.04:58:01.68#ibcon#about to read 6, iclass 34, count 0 2006.229.04:58:01.68#ibcon#read 6, iclass 34, count 0 2006.229.04:58:01.68#ibcon#end of sib2, iclass 34, count 0 2006.229.04:58:01.68#ibcon#*after write, iclass 34, count 0 2006.229.04:58:01.68#ibcon#*before return 0, iclass 34, count 0 2006.229.04:58:01.68#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:01.68#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:01.68#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:58:01.68#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:58:01.68$vck44/valo=8,884.99 2006.229.04:58:01.68#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:58:01.68#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:58:01.68#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:01.68#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:01.68#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:01.68#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:01.68#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:58:01.68#ibcon#first serial, iclass 36, count 0 2006.229.04:58:01.68#ibcon#enter sib2, iclass 36, count 0 2006.229.04:58:01.68#ibcon#flushed, iclass 36, count 0 2006.229.04:58:01.68#ibcon#about to write, iclass 36, count 0 2006.229.04:58:01.68#ibcon#wrote, iclass 36, count 0 2006.229.04:58:01.68#ibcon#about to read 3, iclass 36, count 0 2006.229.04:58:01.70#ibcon#read 3, iclass 36, count 0 2006.229.04:58:01.70#ibcon#about to read 4, iclass 36, count 0 2006.229.04:58:01.70#ibcon#read 4, iclass 36, count 0 2006.229.04:58:01.70#ibcon#about to read 5, iclass 36, count 0 2006.229.04:58:01.70#ibcon#read 5, iclass 36, count 0 2006.229.04:58:01.70#ibcon#about to read 6, iclass 36, count 0 2006.229.04:58:01.70#ibcon#read 6, iclass 36, count 0 2006.229.04:58:01.70#ibcon#end of sib2, iclass 36, count 0 2006.229.04:58:01.70#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:58:01.70#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:58:01.70#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.04:58:01.70#ibcon#*before write, iclass 36, count 0 2006.229.04:58:01.70#ibcon#enter sib2, iclass 36, count 0 2006.229.04:58:01.70#ibcon#flushed, iclass 36, count 0 2006.229.04:58:01.70#ibcon#about to write, iclass 36, count 0 2006.229.04:58:01.70#ibcon#wrote, iclass 36, count 0 2006.229.04:58:01.70#ibcon#about to read 3, iclass 36, count 0 2006.229.04:58:01.74#ibcon#read 3, iclass 36, count 0 2006.229.04:58:01.74#ibcon#about to read 4, iclass 36, count 0 2006.229.04:58:01.74#ibcon#read 4, iclass 36, count 0 2006.229.04:58:01.74#ibcon#about to read 5, iclass 36, count 0 2006.229.04:58:01.74#ibcon#read 5, iclass 36, count 0 2006.229.04:58:01.74#ibcon#about to read 6, iclass 36, count 0 2006.229.04:58:01.74#ibcon#read 6, iclass 36, count 0 2006.229.04:58:01.74#ibcon#end of sib2, iclass 36, count 0 2006.229.04:58:01.74#ibcon#*after write, iclass 36, count 0 2006.229.04:58:01.74#ibcon#*before return 0, iclass 36, count 0 2006.229.04:58:01.74#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:01.74#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:01.74#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:58:01.74#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:58:01.74$vck44/va=8,6 2006.229.04:58:01.74#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.04:58:01.74#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.04:58:01.74#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:01.74#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:58:01.80#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:58:01.80#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:58:01.80#ibcon#enter wrdev, iclass 38, count 2 2006.229.04:58:01.80#ibcon#first serial, iclass 38, count 2 2006.229.04:58:01.80#ibcon#enter sib2, iclass 38, count 2 2006.229.04:58:01.80#ibcon#flushed, iclass 38, count 2 2006.229.04:58:01.80#ibcon#about to write, iclass 38, count 2 2006.229.04:58:01.80#ibcon#wrote, iclass 38, count 2 2006.229.04:58:01.80#ibcon#about to read 3, iclass 38, count 2 2006.229.04:58:01.82#ibcon#read 3, iclass 38, count 2 2006.229.04:58:01.82#ibcon#about to read 4, iclass 38, count 2 2006.229.04:58:01.82#ibcon#read 4, iclass 38, count 2 2006.229.04:58:01.82#ibcon#about to read 5, iclass 38, count 2 2006.229.04:58:01.82#ibcon#read 5, iclass 38, count 2 2006.229.04:58:01.82#ibcon#about to read 6, iclass 38, count 2 2006.229.04:58:01.82#ibcon#read 6, iclass 38, count 2 2006.229.04:58:01.82#ibcon#end of sib2, iclass 38, count 2 2006.229.04:58:01.82#ibcon#*mode == 0, iclass 38, count 2 2006.229.04:58:01.82#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.04:58:01.82#ibcon#[25=AT08-06\r\n] 2006.229.04:58:01.82#ibcon#*before write, iclass 38, count 2 2006.229.04:58:01.82#ibcon#enter sib2, iclass 38, count 2 2006.229.04:58:01.82#ibcon#flushed, iclass 38, count 2 2006.229.04:58:01.82#ibcon#about to write, iclass 38, count 2 2006.229.04:58:01.82#ibcon#wrote, iclass 38, count 2 2006.229.04:58:01.82#ibcon#about to read 3, iclass 38, count 2 2006.229.04:58:01.85#ibcon#read 3, iclass 38, count 2 2006.229.04:58:01.85#ibcon#about to read 4, iclass 38, count 2 2006.229.04:58:01.85#ibcon#read 4, iclass 38, count 2 2006.229.04:58:01.85#ibcon#about to read 5, iclass 38, count 2 2006.229.04:58:01.85#ibcon#read 5, iclass 38, count 2 2006.229.04:58:01.85#ibcon#about to read 6, iclass 38, count 2 2006.229.04:58:01.85#ibcon#read 6, iclass 38, count 2 2006.229.04:58:01.85#ibcon#end of sib2, iclass 38, count 2 2006.229.04:58:01.85#ibcon#*after write, iclass 38, count 2 2006.229.04:58:01.85#ibcon#*before return 0, iclass 38, count 2 2006.229.04:58:01.85#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:58:01.85#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.04:58:01.85#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.04:58:01.85#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:01.85#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:58:01.97#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:58:01.97#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:58:01.97#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:58:01.97#ibcon#first serial, iclass 38, count 0 2006.229.04:58:01.97#ibcon#enter sib2, iclass 38, count 0 2006.229.04:58:01.97#ibcon#flushed, iclass 38, count 0 2006.229.04:58:01.97#ibcon#about to write, iclass 38, count 0 2006.229.04:58:01.97#ibcon#wrote, iclass 38, count 0 2006.229.04:58:01.97#ibcon#about to read 3, iclass 38, count 0 2006.229.04:58:01.99#ibcon#read 3, iclass 38, count 0 2006.229.04:58:01.99#ibcon#about to read 4, iclass 38, count 0 2006.229.04:58:01.99#ibcon#read 4, iclass 38, count 0 2006.229.04:58:01.99#ibcon#about to read 5, iclass 38, count 0 2006.229.04:58:01.99#ibcon#read 5, iclass 38, count 0 2006.229.04:58:01.99#ibcon#about to read 6, iclass 38, count 0 2006.229.04:58:01.99#ibcon#read 6, iclass 38, count 0 2006.229.04:58:01.99#ibcon#end of sib2, iclass 38, count 0 2006.229.04:58:01.99#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:58:01.99#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:58:01.99#ibcon#[25=USB\r\n] 2006.229.04:58:01.99#ibcon#*before write, iclass 38, count 0 2006.229.04:58:01.99#ibcon#enter sib2, iclass 38, count 0 2006.229.04:58:01.99#ibcon#flushed, iclass 38, count 0 2006.229.04:58:01.99#ibcon#about to write, iclass 38, count 0 2006.229.04:58:01.99#ibcon#wrote, iclass 38, count 0 2006.229.04:58:01.99#ibcon#about to read 3, iclass 38, count 0 2006.229.04:58:02.02#ibcon#read 3, iclass 38, count 0 2006.229.04:58:02.02#ibcon#about to read 4, iclass 38, count 0 2006.229.04:58:02.02#ibcon#read 4, iclass 38, count 0 2006.229.04:58:02.02#ibcon#about to read 5, iclass 38, count 0 2006.229.04:58:02.02#ibcon#read 5, iclass 38, count 0 2006.229.04:58:02.02#ibcon#about to read 6, iclass 38, count 0 2006.229.04:58:02.02#ibcon#read 6, iclass 38, count 0 2006.229.04:58:02.02#ibcon#end of sib2, iclass 38, count 0 2006.229.04:58:02.02#ibcon#*after write, iclass 38, count 0 2006.229.04:58:02.02#ibcon#*before return 0, iclass 38, count 0 2006.229.04:58:02.02#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:58:02.02#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.04:58:02.02#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:58:02.02#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:58:02.02$vck44/vblo=1,629.99 2006.229.04:58:02.02#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.04:58:02.02#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.04:58:02.02#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:02.02#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:58:02.02#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:58:02.02#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:58:02.02#ibcon#enter wrdev, iclass 40, count 0 2006.229.04:58:02.02#ibcon#first serial, iclass 40, count 0 2006.229.04:58:02.02#ibcon#enter sib2, iclass 40, count 0 2006.229.04:58:02.02#ibcon#flushed, iclass 40, count 0 2006.229.04:58:02.02#ibcon#about to write, iclass 40, count 0 2006.229.04:58:02.02#ibcon#wrote, iclass 40, count 0 2006.229.04:58:02.02#ibcon#about to read 3, iclass 40, count 0 2006.229.04:58:02.04#ibcon#read 3, iclass 40, count 0 2006.229.04:58:02.04#ibcon#about to read 4, iclass 40, count 0 2006.229.04:58:02.04#ibcon#read 4, iclass 40, count 0 2006.229.04:58:02.04#ibcon#about to read 5, iclass 40, count 0 2006.229.04:58:02.04#ibcon#read 5, iclass 40, count 0 2006.229.04:58:02.04#ibcon#about to read 6, iclass 40, count 0 2006.229.04:58:02.04#ibcon#read 6, iclass 40, count 0 2006.229.04:58:02.04#ibcon#end of sib2, iclass 40, count 0 2006.229.04:58:02.04#ibcon#*mode == 0, iclass 40, count 0 2006.229.04:58:02.04#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.04:58:02.04#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.04:58:02.04#ibcon#*before write, iclass 40, count 0 2006.229.04:58:02.04#ibcon#enter sib2, iclass 40, count 0 2006.229.04:58:02.04#ibcon#flushed, iclass 40, count 0 2006.229.04:58:02.04#ibcon#about to write, iclass 40, count 0 2006.229.04:58:02.04#ibcon#wrote, iclass 40, count 0 2006.229.04:58:02.04#ibcon#about to read 3, iclass 40, count 0 2006.229.04:58:02.08#ibcon#read 3, iclass 40, count 0 2006.229.04:58:02.08#ibcon#about to read 4, iclass 40, count 0 2006.229.04:58:02.08#ibcon#read 4, iclass 40, count 0 2006.229.04:58:02.08#ibcon#about to read 5, iclass 40, count 0 2006.229.04:58:02.08#ibcon#read 5, iclass 40, count 0 2006.229.04:58:02.08#ibcon#about to read 6, iclass 40, count 0 2006.229.04:58:02.08#ibcon#read 6, iclass 40, count 0 2006.229.04:58:02.08#ibcon#end of sib2, iclass 40, count 0 2006.229.04:58:02.08#ibcon#*after write, iclass 40, count 0 2006.229.04:58:02.08#ibcon#*before return 0, iclass 40, count 0 2006.229.04:58:02.08#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:58:02.08#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.04:58:02.08#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.04:58:02.08#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.04:58:02.08$vck44/vb=1,4 2006.229.04:58:02.08#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.04:58:02.08#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.04:58:02.08#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:02.08#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:58:02.08#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:58:02.08#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:58:02.08#ibcon#enter wrdev, iclass 4, count 2 2006.229.04:58:02.08#ibcon#first serial, iclass 4, count 2 2006.229.04:58:02.08#ibcon#enter sib2, iclass 4, count 2 2006.229.04:58:02.08#ibcon#flushed, iclass 4, count 2 2006.229.04:58:02.08#ibcon#about to write, iclass 4, count 2 2006.229.04:58:02.08#ibcon#wrote, iclass 4, count 2 2006.229.04:58:02.08#ibcon#about to read 3, iclass 4, count 2 2006.229.04:58:02.10#ibcon#read 3, iclass 4, count 2 2006.229.04:58:02.10#ibcon#about to read 4, iclass 4, count 2 2006.229.04:58:02.10#ibcon#read 4, iclass 4, count 2 2006.229.04:58:02.10#ibcon#about to read 5, iclass 4, count 2 2006.229.04:58:02.10#ibcon#read 5, iclass 4, count 2 2006.229.04:58:02.10#ibcon#about to read 6, iclass 4, count 2 2006.229.04:58:02.10#ibcon#read 6, iclass 4, count 2 2006.229.04:58:02.10#ibcon#end of sib2, iclass 4, count 2 2006.229.04:58:02.10#ibcon#*mode == 0, iclass 4, count 2 2006.229.04:58:02.10#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.04:58:02.10#ibcon#[27=AT01-04\r\n] 2006.229.04:58:02.10#ibcon#*before write, iclass 4, count 2 2006.229.04:58:02.10#ibcon#enter sib2, iclass 4, count 2 2006.229.04:58:02.10#ibcon#flushed, iclass 4, count 2 2006.229.04:58:02.10#ibcon#about to write, iclass 4, count 2 2006.229.04:58:02.10#ibcon#wrote, iclass 4, count 2 2006.229.04:58:02.10#ibcon#about to read 3, iclass 4, count 2 2006.229.04:58:02.13#ibcon#read 3, iclass 4, count 2 2006.229.04:58:02.13#ibcon#about to read 4, iclass 4, count 2 2006.229.04:58:02.13#ibcon#read 4, iclass 4, count 2 2006.229.04:58:02.13#ibcon#about to read 5, iclass 4, count 2 2006.229.04:58:02.13#ibcon#read 5, iclass 4, count 2 2006.229.04:58:02.13#ibcon#about to read 6, iclass 4, count 2 2006.229.04:58:02.13#ibcon#read 6, iclass 4, count 2 2006.229.04:58:02.13#ibcon#end of sib2, iclass 4, count 2 2006.229.04:58:02.13#ibcon#*after write, iclass 4, count 2 2006.229.04:58:02.13#ibcon#*before return 0, iclass 4, count 2 2006.229.04:58:02.13#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:58:02.13#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.04:58:02.13#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.04:58:02.13#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:02.13#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:58:02.25#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:58:02.25#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:58:02.25#ibcon#enter wrdev, iclass 4, count 0 2006.229.04:58:02.25#ibcon#first serial, iclass 4, count 0 2006.229.04:58:02.25#ibcon#enter sib2, iclass 4, count 0 2006.229.04:58:02.25#ibcon#flushed, iclass 4, count 0 2006.229.04:58:02.25#ibcon#about to write, iclass 4, count 0 2006.229.04:58:02.25#ibcon#wrote, iclass 4, count 0 2006.229.04:58:02.25#ibcon#about to read 3, iclass 4, count 0 2006.229.04:58:02.27#ibcon#read 3, iclass 4, count 0 2006.229.04:58:02.27#ibcon#about to read 4, iclass 4, count 0 2006.229.04:58:02.27#ibcon#read 4, iclass 4, count 0 2006.229.04:58:02.27#ibcon#about to read 5, iclass 4, count 0 2006.229.04:58:02.27#ibcon#read 5, iclass 4, count 0 2006.229.04:58:02.27#ibcon#about to read 6, iclass 4, count 0 2006.229.04:58:02.27#ibcon#read 6, iclass 4, count 0 2006.229.04:58:02.27#ibcon#end of sib2, iclass 4, count 0 2006.229.04:58:02.27#ibcon#*mode == 0, iclass 4, count 0 2006.229.04:58:02.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.04:58:02.27#ibcon#[27=USB\r\n] 2006.229.04:58:02.27#ibcon#*before write, iclass 4, count 0 2006.229.04:58:02.27#ibcon#enter sib2, iclass 4, count 0 2006.229.04:58:02.27#ibcon#flushed, iclass 4, count 0 2006.229.04:58:02.27#ibcon#about to write, iclass 4, count 0 2006.229.04:58:02.27#ibcon#wrote, iclass 4, count 0 2006.229.04:58:02.27#ibcon#about to read 3, iclass 4, count 0 2006.229.04:58:02.30#ibcon#read 3, iclass 4, count 0 2006.229.04:58:02.30#ibcon#about to read 4, iclass 4, count 0 2006.229.04:58:02.30#ibcon#read 4, iclass 4, count 0 2006.229.04:58:02.30#ibcon#about to read 5, iclass 4, count 0 2006.229.04:58:02.30#ibcon#read 5, iclass 4, count 0 2006.229.04:58:02.30#ibcon#about to read 6, iclass 4, count 0 2006.229.04:58:02.30#ibcon#read 6, iclass 4, count 0 2006.229.04:58:02.30#ibcon#end of sib2, iclass 4, count 0 2006.229.04:58:02.30#ibcon#*after write, iclass 4, count 0 2006.229.04:58:02.30#ibcon#*before return 0, iclass 4, count 0 2006.229.04:58:02.30#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:58:02.30#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.04:58:02.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.04:58:02.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.04:58:02.30$vck44/vblo=2,634.99 2006.229.04:58:02.30#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.04:58:02.30#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.04:58:02.30#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:02.30#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:58:02.30#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:58:02.30#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:58:02.30#ibcon#enter wrdev, iclass 6, count 0 2006.229.04:58:02.30#ibcon#first serial, iclass 6, count 0 2006.229.04:58:02.30#ibcon#enter sib2, iclass 6, count 0 2006.229.04:58:02.30#ibcon#flushed, iclass 6, count 0 2006.229.04:58:02.30#ibcon#about to write, iclass 6, count 0 2006.229.04:58:02.30#ibcon#wrote, iclass 6, count 0 2006.229.04:58:02.30#ibcon#about to read 3, iclass 6, count 0 2006.229.04:58:02.32#ibcon#read 3, iclass 6, count 0 2006.229.04:58:02.32#ibcon#about to read 4, iclass 6, count 0 2006.229.04:58:02.32#ibcon#read 4, iclass 6, count 0 2006.229.04:58:02.32#ibcon#about to read 5, iclass 6, count 0 2006.229.04:58:02.32#ibcon#read 5, iclass 6, count 0 2006.229.04:58:02.32#ibcon#about to read 6, iclass 6, count 0 2006.229.04:58:02.32#ibcon#read 6, iclass 6, count 0 2006.229.04:58:02.32#ibcon#end of sib2, iclass 6, count 0 2006.229.04:58:02.32#ibcon#*mode == 0, iclass 6, count 0 2006.229.04:58:02.32#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.04:58:02.32#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.04:58:02.32#ibcon#*before write, iclass 6, count 0 2006.229.04:58:02.32#ibcon#enter sib2, iclass 6, count 0 2006.229.04:58:02.32#ibcon#flushed, iclass 6, count 0 2006.229.04:58:02.32#ibcon#about to write, iclass 6, count 0 2006.229.04:58:02.32#ibcon#wrote, iclass 6, count 0 2006.229.04:58:02.32#ibcon#about to read 3, iclass 6, count 0 2006.229.04:58:02.36#ibcon#read 3, iclass 6, count 0 2006.229.04:58:02.36#ibcon#about to read 4, iclass 6, count 0 2006.229.04:58:02.36#ibcon#read 4, iclass 6, count 0 2006.229.04:58:02.36#ibcon#about to read 5, iclass 6, count 0 2006.229.04:58:02.36#ibcon#read 5, iclass 6, count 0 2006.229.04:58:02.36#ibcon#about to read 6, iclass 6, count 0 2006.229.04:58:02.36#ibcon#read 6, iclass 6, count 0 2006.229.04:58:02.36#ibcon#end of sib2, iclass 6, count 0 2006.229.04:58:02.36#ibcon#*after write, iclass 6, count 0 2006.229.04:58:02.36#ibcon#*before return 0, iclass 6, count 0 2006.229.04:58:02.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:58:02.36#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.04:58:02.36#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.04:58:02.36#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.04:58:02.36$vck44/vb=2,4 2006.229.04:58:02.36#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.04:58:02.36#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.04:58:02.36#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:02.36#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:58:02.42#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:58:02.42#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:58:02.42#ibcon#enter wrdev, iclass 10, count 2 2006.229.04:58:02.42#ibcon#first serial, iclass 10, count 2 2006.229.04:58:02.42#ibcon#enter sib2, iclass 10, count 2 2006.229.04:58:02.42#ibcon#flushed, iclass 10, count 2 2006.229.04:58:02.42#ibcon#about to write, iclass 10, count 2 2006.229.04:58:02.42#ibcon#wrote, iclass 10, count 2 2006.229.04:58:02.42#ibcon#about to read 3, iclass 10, count 2 2006.229.04:58:02.44#ibcon#read 3, iclass 10, count 2 2006.229.04:58:02.44#ibcon#about to read 4, iclass 10, count 2 2006.229.04:58:02.44#ibcon#read 4, iclass 10, count 2 2006.229.04:58:02.44#ibcon#about to read 5, iclass 10, count 2 2006.229.04:58:02.44#ibcon#read 5, iclass 10, count 2 2006.229.04:58:02.44#ibcon#about to read 6, iclass 10, count 2 2006.229.04:58:02.44#ibcon#read 6, iclass 10, count 2 2006.229.04:58:02.44#ibcon#end of sib2, iclass 10, count 2 2006.229.04:58:02.44#ibcon#*mode == 0, iclass 10, count 2 2006.229.04:58:02.44#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.04:58:02.44#ibcon#[27=AT02-04\r\n] 2006.229.04:58:02.44#ibcon#*before write, iclass 10, count 2 2006.229.04:58:02.44#ibcon#enter sib2, iclass 10, count 2 2006.229.04:58:02.44#ibcon#flushed, iclass 10, count 2 2006.229.04:58:02.44#ibcon#about to write, iclass 10, count 2 2006.229.04:58:02.44#ibcon#wrote, iclass 10, count 2 2006.229.04:58:02.44#ibcon#about to read 3, iclass 10, count 2 2006.229.04:58:02.47#ibcon#read 3, iclass 10, count 2 2006.229.04:58:02.47#ibcon#about to read 4, iclass 10, count 2 2006.229.04:58:02.47#ibcon#read 4, iclass 10, count 2 2006.229.04:58:02.47#ibcon#about to read 5, iclass 10, count 2 2006.229.04:58:02.47#ibcon#read 5, iclass 10, count 2 2006.229.04:58:02.47#ibcon#about to read 6, iclass 10, count 2 2006.229.04:58:02.47#ibcon#read 6, iclass 10, count 2 2006.229.04:58:02.47#ibcon#end of sib2, iclass 10, count 2 2006.229.04:58:02.47#ibcon#*after write, iclass 10, count 2 2006.229.04:58:02.47#ibcon#*before return 0, iclass 10, count 2 2006.229.04:58:02.47#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:58:02.47#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.04:58:02.47#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.04:58:02.47#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:02.47#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:58:02.59#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:58:02.59#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:58:02.59#ibcon#enter wrdev, iclass 10, count 0 2006.229.04:58:02.59#ibcon#first serial, iclass 10, count 0 2006.229.04:58:02.59#ibcon#enter sib2, iclass 10, count 0 2006.229.04:58:02.59#ibcon#flushed, iclass 10, count 0 2006.229.04:58:02.59#ibcon#about to write, iclass 10, count 0 2006.229.04:58:02.59#ibcon#wrote, iclass 10, count 0 2006.229.04:58:02.59#ibcon#about to read 3, iclass 10, count 0 2006.229.04:58:02.61#ibcon#read 3, iclass 10, count 0 2006.229.04:58:02.61#ibcon#about to read 4, iclass 10, count 0 2006.229.04:58:02.61#ibcon#read 4, iclass 10, count 0 2006.229.04:58:02.61#ibcon#about to read 5, iclass 10, count 0 2006.229.04:58:02.61#ibcon#read 5, iclass 10, count 0 2006.229.04:58:02.61#ibcon#about to read 6, iclass 10, count 0 2006.229.04:58:02.61#ibcon#read 6, iclass 10, count 0 2006.229.04:58:02.61#ibcon#end of sib2, iclass 10, count 0 2006.229.04:58:02.61#ibcon#*mode == 0, iclass 10, count 0 2006.229.04:58:02.61#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.04:58:02.61#ibcon#[27=USB\r\n] 2006.229.04:58:02.61#ibcon#*before write, iclass 10, count 0 2006.229.04:58:02.61#ibcon#enter sib2, iclass 10, count 0 2006.229.04:58:02.61#ibcon#flushed, iclass 10, count 0 2006.229.04:58:02.61#ibcon#about to write, iclass 10, count 0 2006.229.04:58:02.61#ibcon#wrote, iclass 10, count 0 2006.229.04:58:02.61#ibcon#about to read 3, iclass 10, count 0 2006.229.04:58:02.64#ibcon#read 3, iclass 10, count 0 2006.229.04:58:02.64#ibcon#about to read 4, iclass 10, count 0 2006.229.04:58:02.64#ibcon#read 4, iclass 10, count 0 2006.229.04:58:02.64#ibcon#about to read 5, iclass 10, count 0 2006.229.04:58:02.64#ibcon#read 5, iclass 10, count 0 2006.229.04:58:02.64#ibcon#about to read 6, iclass 10, count 0 2006.229.04:58:02.64#ibcon#read 6, iclass 10, count 0 2006.229.04:58:02.64#ibcon#end of sib2, iclass 10, count 0 2006.229.04:58:02.64#ibcon#*after write, iclass 10, count 0 2006.229.04:58:02.64#ibcon#*before return 0, iclass 10, count 0 2006.229.04:58:02.64#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:58:02.64#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.04:58:02.64#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.04:58:02.64#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.04:58:02.64$vck44/vblo=3,649.99 2006.229.04:58:02.64#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.04:58:02.64#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.04:58:02.64#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:02.64#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:58:02.64#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:58:02.64#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:58:02.64#ibcon#enter wrdev, iclass 12, count 0 2006.229.04:58:02.64#ibcon#first serial, iclass 12, count 0 2006.229.04:58:02.64#ibcon#enter sib2, iclass 12, count 0 2006.229.04:58:02.64#ibcon#flushed, iclass 12, count 0 2006.229.04:58:02.64#ibcon#about to write, iclass 12, count 0 2006.229.04:58:02.64#ibcon#wrote, iclass 12, count 0 2006.229.04:58:02.64#ibcon#about to read 3, iclass 12, count 0 2006.229.04:58:02.66#ibcon#read 3, iclass 12, count 0 2006.229.04:58:02.66#ibcon#about to read 4, iclass 12, count 0 2006.229.04:58:02.66#ibcon#read 4, iclass 12, count 0 2006.229.04:58:02.66#ibcon#about to read 5, iclass 12, count 0 2006.229.04:58:02.66#ibcon#read 5, iclass 12, count 0 2006.229.04:58:02.66#ibcon#about to read 6, iclass 12, count 0 2006.229.04:58:02.66#ibcon#read 6, iclass 12, count 0 2006.229.04:58:02.66#ibcon#end of sib2, iclass 12, count 0 2006.229.04:58:02.66#ibcon#*mode == 0, iclass 12, count 0 2006.229.04:58:02.66#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.04:58:02.66#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.04:58:02.66#ibcon#*before write, iclass 12, count 0 2006.229.04:58:02.66#ibcon#enter sib2, iclass 12, count 0 2006.229.04:58:02.66#ibcon#flushed, iclass 12, count 0 2006.229.04:58:02.66#ibcon#about to write, iclass 12, count 0 2006.229.04:58:02.66#ibcon#wrote, iclass 12, count 0 2006.229.04:58:02.66#ibcon#about to read 3, iclass 12, count 0 2006.229.04:58:02.70#ibcon#read 3, iclass 12, count 0 2006.229.04:58:02.70#ibcon#about to read 4, iclass 12, count 0 2006.229.04:58:02.70#ibcon#read 4, iclass 12, count 0 2006.229.04:58:02.70#ibcon#about to read 5, iclass 12, count 0 2006.229.04:58:02.70#ibcon#read 5, iclass 12, count 0 2006.229.04:58:02.70#ibcon#about to read 6, iclass 12, count 0 2006.229.04:58:02.70#ibcon#read 6, iclass 12, count 0 2006.229.04:58:02.70#ibcon#end of sib2, iclass 12, count 0 2006.229.04:58:02.70#ibcon#*after write, iclass 12, count 0 2006.229.04:58:02.70#ibcon#*before return 0, iclass 12, count 0 2006.229.04:58:02.70#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:58:02.70#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.04:58:02.70#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.04:58:02.70#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.04:58:02.70$vck44/vb=3,4 2006.229.04:58:02.70#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.04:58:02.70#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.04:58:02.70#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:02.70#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:58:02.76#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:58:02.76#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:58:02.76#ibcon#enter wrdev, iclass 14, count 2 2006.229.04:58:02.76#ibcon#first serial, iclass 14, count 2 2006.229.04:58:02.76#ibcon#enter sib2, iclass 14, count 2 2006.229.04:58:02.76#ibcon#flushed, iclass 14, count 2 2006.229.04:58:02.76#ibcon#about to write, iclass 14, count 2 2006.229.04:58:02.76#ibcon#wrote, iclass 14, count 2 2006.229.04:58:02.76#ibcon#about to read 3, iclass 14, count 2 2006.229.04:58:02.78#ibcon#read 3, iclass 14, count 2 2006.229.04:58:02.78#ibcon#about to read 4, iclass 14, count 2 2006.229.04:58:02.78#ibcon#read 4, iclass 14, count 2 2006.229.04:58:02.78#ibcon#about to read 5, iclass 14, count 2 2006.229.04:58:02.78#ibcon#read 5, iclass 14, count 2 2006.229.04:58:02.78#ibcon#about to read 6, iclass 14, count 2 2006.229.04:58:02.78#ibcon#read 6, iclass 14, count 2 2006.229.04:58:02.78#ibcon#end of sib2, iclass 14, count 2 2006.229.04:58:02.78#ibcon#*mode == 0, iclass 14, count 2 2006.229.04:58:02.78#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.04:58:02.78#ibcon#[27=AT03-04\r\n] 2006.229.04:58:02.78#ibcon#*before write, iclass 14, count 2 2006.229.04:58:02.78#ibcon#enter sib2, iclass 14, count 2 2006.229.04:58:02.78#ibcon#flushed, iclass 14, count 2 2006.229.04:58:02.78#ibcon#about to write, iclass 14, count 2 2006.229.04:58:02.78#ibcon#wrote, iclass 14, count 2 2006.229.04:58:02.78#ibcon#about to read 3, iclass 14, count 2 2006.229.04:58:02.81#ibcon#read 3, iclass 14, count 2 2006.229.04:58:02.81#ibcon#about to read 4, iclass 14, count 2 2006.229.04:58:02.81#ibcon#read 4, iclass 14, count 2 2006.229.04:58:02.81#ibcon#about to read 5, iclass 14, count 2 2006.229.04:58:02.81#ibcon#read 5, iclass 14, count 2 2006.229.04:58:02.81#ibcon#about to read 6, iclass 14, count 2 2006.229.04:58:02.81#ibcon#read 6, iclass 14, count 2 2006.229.04:58:02.81#ibcon#end of sib2, iclass 14, count 2 2006.229.04:58:02.81#ibcon#*after write, iclass 14, count 2 2006.229.04:58:02.81#ibcon#*before return 0, iclass 14, count 2 2006.229.04:58:02.81#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:58:02.81#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.04:58:02.81#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.04:58:02.81#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:02.81#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:58:02.93#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:58:02.93#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:58:02.93#ibcon#enter wrdev, iclass 14, count 0 2006.229.04:58:02.93#ibcon#first serial, iclass 14, count 0 2006.229.04:58:02.93#ibcon#enter sib2, iclass 14, count 0 2006.229.04:58:02.93#ibcon#flushed, iclass 14, count 0 2006.229.04:58:02.93#ibcon#about to write, iclass 14, count 0 2006.229.04:58:02.93#ibcon#wrote, iclass 14, count 0 2006.229.04:58:02.93#ibcon#about to read 3, iclass 14, count 0 2006.229.04:58:02.95#ibcon#read 3, iclass 14, count 0 2006.229.04:58:02.95#ibcon#about to read 4, iclass 14, count 0 2006.229.04:58:02.95#ibcon#read 4, iclass 14, count 0 2006.229.04:58:02.95#ibcon#about to read 5, iclass 14, count 0 2006.229.04:58:02.95#ibcon#read 5, iclass 14, count 0 2006.229.04:58:02.95#ibcon#about to read 6, iclass 14, count 0 2006.229.04:58:02.95#ibcon#read 6, iclass 14, count 0 2006.229.04:58:02.95#ibcon#end of sib2, iclass 14, count 0 2006.229.04:58:02.95#ibcon#*mode == 0, iclass 14, count 0 2006.229.04:58:02.95#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.04:58:02.95#ibcon#[27=USB\r\n] 2006.229.04:58:02.95#ibcon#*before write, iclass 14, count 0 2006.229.04:58:02.95#ibcon#enter sib2, iclass 14, count 0 2006.229.04:58:02.95#ibcon#flushed, iclass 14, count 0 2006.229.04:58:02.95#ibcon#about to write, iclass 14, count 0 2006.229.04:58:02.95#ibcon#wrote, iclass 14, count 0 2006.229.04:58:02.95#ibcon#about to read 3, iclass 14, count 0 2006.229.04:58:02.98#ibcon#read 3, iclass 14, count 0 2006.229.04:58:02.98#ibcon#about to read 4, iclass 14, count 0 2006.229.04:58:02.98#ibcon#read 4, iclass 14, count 0 2006.229.04:58:02.98#ibcon#about to read 5, iclass 14, count 0 2006.229.04:58:02.98#ibcon#read 5, iclass 14, count 0 2006.229.04:58:02.98#ibcon#about to read 6, iclass 14, count 0 2006.229.04:58:02.98#ibcon#read 6, iclass 14, count 0 2006.229.04:58:02.98#ibcon#end of sib2, iclass 14, count 0 2006.229.04:58:02.98#ibcon#*after write, iclass 14, count 0 2006.229.04:58:02.98#ibcon#*before return 0, iclass 14, count 0 2006.229.04:58:02.98#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:58:02.98#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.04:58:02.98#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.04:58:02.98#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.04:58:02.98$vck44/vblo=4,679.99 2006.229.04:58:02.98#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.04:58:02.98#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.04:58:02.98#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:02.98#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:58:02.98#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:58:02.98#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:58:02.98#ibcon#enter wrdev, iclass 16, count 0 2006.229.04:58:02.98#ibcon#first serial, iclass 16, count 0 2006.229.04:58:02.98#ibcon#enter sib2, iclass 16, count 0 2006.229.04:58:02.98#ibcon#flushed, iclass 16, count 0 2006.229.04:58:02.98#ibcon#about to write, iclass 16, count 0 2006.229.04:58:02.98#ibcon#wrote, iclass 16, count 0 2006.229.04:58:02.98#ibcon#about to read 3, iclass 16, count 0 2006.229.04:58:03.00#ibcon#read 3, iclass 16, count 0 2006.229.04:58:03.00#ibcon#about to read 4, iclass 16, count 0 2006.229.04:58:03.00#ibcon#read 4, iclass 16, count 0 2006.229.04:58:03.00#ibcon#about to read 5, iclass 16, count 0 2006.229.04:58:03.00#ibcon#read 5, iclass 16, count 0 2006.229.04:58:03.00#ibcon#about to read 6, iclass 16, count 0 2006.229.04:58:03.00#ibcon#read 6, iclass 16, count 0 2006.229.04:58:03.00#ibcon#end of sib2, iclass 16, count 0 2006.229.04:58:03.00#ibcon#*mode == 0, iclass 16, count 0 2006.229.04:58:03.00#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.04:58:03.00#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.04:58:03.00#ibcon#*before write, iclass 16, count 0 2006.229.04:58:03.00#ibcon#enter sib2, iclass 16, count 0 2006.229.04:58:03.00#ibcon#flushed, iclass 16, count 0 2006.229.04:58:03.00#ibcon#about to write, iclass 16, count 0 2006.229.04:58:03.00#ibcon#wrote, iclass 16, count 0 2006.229.04:58:03.00#ibcon#about to read 3, iclass 16, count 0 2006.229.04:58:03.04#ibcon#read 3, iclass 16, count 0 2006.229.04:58:03.04#ibcon#about to read 4, iclass 16, count 0 2006.229.04:58:03.04#ibcon#read 4, iclass 16, count 0 2006.229.04:58:03.04#ibcon#about to read 5, iclass 16, count 0 2006.229.04:58:03.04#ibcon#read 5, iclass 16, count 0 2006.229.04:58:03.04#ibcon#about to read 6, iclass 16, count 0 2006.229.04:58:03.04#ibcon#read 6, iclass 16, count 0 2006.229.04:58:03.04#ibcon#end of sib2, iclass 16, count 0 2006.229.04:58:03.04#ibcon#*after write, iclass 16, count 0 2006.229.04:58:03.04#ibcon#*before return 0, iclass 16, count 0 2006.229.04:58:03.04#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:58:03.04#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.04:58:03.04#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.04:58:03.04#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.04:58:03.04$vck44/vb=4,4 2006.229.04:58:03.04#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.04:58:03.04#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.04:58:03.04#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:03.04#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:03.10#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:03.10#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:03.10#ibcon#enter wrdev, iclass 18, count 2 2006.229.04:58:03.10#ibcon#first serial, iclass 18, count 2 2006.229.04:58:03.10#ibcon#enter sib2, iclass 18, count 2 2006.229.04:58:03.10#ibcon#flushed, iclass 18, count 2 2006.229.04:58:03.10#ibcon#about to write, iclass 18, count 2 2006.229.04:58:03.10#ibcon#wrote, iclass 18, count 2 2006.229.04:58:03.10#ibcon#about to read 3, iclass 18, count 2 2006.229.04:58:03.12#ibcon#read 3, iclass 18, count 2 2006.229.04:58:03.12#ibcon#about to read 4, iclass 18, count 2 2006.229.04:58:03.12#ibcon#read 4, iclass 18, count 2 2006.229.04:58:03.12#ibcon#about to read 5, iclass 18, count 2 2006.229.04:58:03.12#ibcon#read 5, iclass 18, count 2 2006.229.04:58:03.12#ibcon#about to read 6, iclass 18, count 2 2006.229.04:58:03.12#ibcon#read 6, iclass 18, count 2 2006.229.04:58:03.12#ibcon#end of sib2, iclass 18, count 2 2006.229.04:58:03.12#ibcon#*mode == 0, iclass 18, count 2 2006.229.04:58:03.12#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.04:58:03.12#ibcon#[27=AT04-04\r\n] 2006.229.04:58:03.12#ibcon#*before write, iclass 18, count 2 2006.229.04:58:03.12#ibcon#enter sib2, iclass 18, count 2 2006.229.04:58:03.12#ibcon#flushed, iclass 18, count 2 2006.229.04:58:03.12#ibcon#about to write, iclass 18, count 2 2006.229.04:58:03.12#ibcon#wrote, iclass 18, count 2 2006.229.04:58:03.12#ibcon#about to read 3, iclass 18, count 2 2006.229.04:58:03.15#ibcon#read 3, iclass 18, count 2 2006.229.04:58:03.15#ibcon#about to read 4, iclass 18, count 2 2006.229.04:58:03.15#ibcon#read 4, iclass 18, count 2 2006.229.04:58:03.15#ibcon#about to read 5, iclass 18, count 2 2006.229.04:58:03.15#ibcon#read 5, iclass 18, count 2 2006.229.04:58:03.15#ibcon#about to read 6, iclass 18, count 2 2006.229.04:58:03.15#ibcon#read 6, iclass 18, count 2 2006.229.04:58:03.15#ibcon#end of sib2, iclass 18, count 2 2006.229.04:58:03.15#ibcon#*after write, iclass 18, count 2 2006.229.04:58:03.15#ibcon#*before return 0, iclass 18, count 2 2006.229.04:58:03.15#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:03.15#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.04:58:03.15#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.04:58:03.15#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:03.15#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:03.27#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:03.27#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:03.27#ibcon#enter wrdev, iclass 18, count 0 2006.229.04:58:03.27#ibcon#first serial, iclass 18, count 0 2006.229.04:58:03.27#ibcon#enter sib2, iclass 18, count 0 2006.229.04:58:03.27#ibcon#flushed, iclass 18, count 0 2006.229.04:58:03.27#ibcon#about to write, iclass 18, count 0 2006.229.04:58:03.27#ibcon#wrote, iclass 18, count 0 2006.229.04:58:03.27#ibcon#about to read 3, iclass 18, count 0 2006.229.04:58:03.29#ibcon#read 3, iclass 18, count 0 2006.229.04:58:03.29#ibcon#about to read 4, iclass 18, count 0 2006.229.04:58:03.29#ibcon#read 4, iclass 18, count 0 2006.229.04:58:03.29#ibcon#about to read 5, iclass 18, count 0 2006.229.04:58:03.29#ibcon#read 5, iclass 18, count 0 2006.229.04:58:03.29#ibcon#about to read 6, iclass 18, count 0 2006.229.04:58:03.29#ibcon#read 6, iclass 18, count 0 2006.229.04:58:03.29#ibcon#end of sib2, iclass 18, count 0 2006.229.04:58:03.29#ibcon#*mode == 0, iclass 18, count 0 2006.229.04:58:03.29#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.04:58:03.29#ibcon#[27=USB\r\n] 2006.229.04:58:03.29#ibcon#*before write, iclass 18, count 0 2006.229.04:58:03.29#ibcon#enter sib2, iclass 18, count 0 2006.229.04:58:03.29#ibcon#flushed, iclass 18, count 0 2006.229.04:58:03.29#ibcon#about to write, iclass 18, count 0 2006.229.04:58:03.29#ibcon#wrote, iclass 18, count 0 2006.229.04:58:03.29#ibcon#about to read 3, iclass 18, count 0 2006.229.04:58:03.32#ibcon#read 3, iclass 18, count 0 2006.229.04:58:03.32#ibcon#about to read 4, iclass 18, count 0 2006.229.04:58:03.32#ibcon#read 4, iclass 18, count 0 2006.229.04:58:03.32#ibcon#about to read 5, iclass 18, count 0 2006.229.04:58:03.32#ibcon#read 5, iclass 18, count 0 2006.229.04:58:03.32#ibcon#about to read 6, iclass 18, count 0 2006.229.04:58:03.32#ibcon#read 6, iclass 18, count 0 2006.229.04:58:03.32#ibcon#end of sib2, iclass 18, count 0 2006.229.04:58:03.32#ibcon#*after write, iclass 18, count 0 2006.229.04:58:03.32#ibcon#*before return 0, iclass 18, count 0 2006.229.04:58:03.32#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:03.32#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.04:58:03.32#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.04:58:03.32#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.04:58:03.32$vck44/vblo=5,709.99 2006.229.04:58:03.32#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.04:58:03.32#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.04:58:03.32#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:03.32#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:03.32#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:03.32#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:03.32#ibcon#enter wrdev, iclass 20, count 0 2006.229.04:58:03.32#ibcon#first serial, iclass 20, count 0 2006.229.04:58:03.32#ibcon#enter sib2, iclass 20, count 0 2006.229.04:58:03.32#ibcon#flushed, iclass 20, count 0 2006.229.04:58:03.32#ibcon#about to write, iclass 20, count 0 2006.229.04:58:03.32#ibcon#wrote, iclass 20, count 0 2006.229.04:58:03.32#ibcon#about to read 3, iclass 20, count 0 2006.229.04:58:03.34#ibcon#read 3, iclass 20, count 0 2006.229.04:58:03.34#ibcon#about to read 4, iclass 20, count 0 2006.229.04:58:03.34#ibcon#read 4, iclass 20, count 0 2006.229.04:58:03.34#ibcon#about to read 5, iclass 20, count 0 2006.229.04:58:03.34#ibcon#read 5, iclass 20, count 0 2006.229.04:58:03.34#ibcon#about to read 6, iclass 20, count 0 2006.229.04:58:03.34#ibcon#read 6, iclass 20, count 0 2006.229.04:58:03.34#ibcon#end of sib2, iclass 20, count 0 2006.229.04:58:03.34#ibcon#*mode == 0, iclass 20, count 0 2006.229.04:58:03.34#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.04:58:03.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.04:58:03.34#ibcon#*before write, iclass 20, count 0 2006.229.04:58:03.34#ibcon#enter sib2, iclass 20, count 0 2006.229.04:58:03.34#ibcon#flushed, iclass 20, count 0 2006.229.04:58:03.34#ibcon#about to write, iclass 20, count 0 2006.229.04:58:03.34#ibcon#wrote, iclass 20, count 0 2006.229.04:58:03.34#ibcon#about to read 3, iclass 20, count 0 2006.229.04:58:03.38#ibcon#read 3, iclass 20, count 0 2006.229.04:58:03.38#ibcon#about to read 4, iclass 20, count 0 2006.229.04:58:03.38#ibcon#read 4, iclass 20, count 0 2006.229.04:58:03.38#ibcon#about to read 5, iclass 20, count 0 2006.229.04:58:03.38#ibcon#read 5, iclass 20, count 0 2006.229.04:58:03.38#ibcon#about to read 6, iclass 20, count 0 2006.229.04:58:03.38#ibcon#read 6, iclass 20, count 0 2006.229.04:58:03.38#ibcon#end of sib2, iclass 20, count 0 2006.229.04:58:03.38#ibcon#*after write, iclass 20, count 0 2006.229.04:58:03.38#ibcon#*before return 0, iclass 20, count 0 2006.229.04:58:03.38#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:03.38#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.04:58:03.38#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.04:58:03.38#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.04:58:03.38$vck44/vb=5,4 2006.229.04:58:03.38#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.04:58:03.38#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.04:58:03.38#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:03.38#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:03.44#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:03.44#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:03.44#ibcon#enter wrdev, iclass 22, count 2 2006.229.04:58:03.44#ibcon#first serial, iclass 22, count 2 2006.229.04:58:03.44#ibcon#enter sib2, iclass 22, count 2 2006.229.04:58:03.44#ibcon#flushed, iclass 22, count 2 2006.229.04:58:03.44#ibcon#about to write, iclass 22, count 2 2006.229.04:58:03.44#ibcon#wrote, iclass 22, count 2 2006.229.04:58:03.44#ibcon#about to read 3, iclass 22, count 2 2006.229.04:58:03.46#ibcon#read 3, iclass 22, count 2 2006.229.04:58:03.46#ibcon#about to read 4, iclass 22, count 2 2006.229.04:58:03.46#ibcon#read 4, iclass 22, count 2 2006.229.04:58:03.46#ibcon#about to read 5, iclass 22, count 2 2006.229.04:58:03.46#ibcon#read 5, iclass 22, count 2 2006.229.04:58:03.46#ibcon#about to read 6, iclass 22, count 2 2006.229.04:58:03.46#ibcon#read 6, iclass 22, count 2 2006.229.04:58:03.46#ibcon#end of sib2, iclass 22, count 2 2006.229.04:58:03.46#ibcon#*mode == 0, iclass 22, count 2 2006.229.04:58:03.46#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.04:58:03.46#ibcon#[27=AT05-04\r\n] 2006.229.04:58:03.46#ibcon#*before write, iclass 22, count 2 2006.229.04:58:03.46#ibcon#enter sib2, iclass 22, count 2 2006.229.04:58:03.46#ibcon#flushed, iclass 22, count 2 2006.229.04:58:03.46#ibcon#about to write, iclass 22, count 2 2006.229.04:58:03.46#ibcon#wrote, iclass 22, count 2 2006.229.04:58:03.46#ibcon#about to read 3, iclass 22, count 2 2006.229.04:58:03.49#ibcon#read 3, iclass 22, count 2 2006.229.04:58:03.49#ibcon#about to read 4, iclass 22, count 2 2006.229.04:58:03.49#ibcon#read 4, iclass 22, count 2 2006.229.04:58:03.49#ibcon#about to read 5, iclass 22, count 2 2006.229.04:58:03.49#ibcon#read 5, iclass 22, count 2 2006.229.04:58:03.49#ibcon#about to read 6, iclass 22, count 2 2006.229.04:58:03.49#ibcon#read 6, iclass 22, count 2 2006.229.04:58:03.49#ibcon#end of sib2, iclass 22, count 2 2006.229.04:58:03.49#ibcon#*after write, iclass 22, count 2 2006.229.04:58:03.49#ibcon#*before return 0, iclass 22, count 2 2006.229.04:58:03.49#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:03.49#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.04:58:03.49#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.04:58:03.49#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:03.49#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:03.61#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:03.61#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:03.61#ibcon#enter wrdev, iclass 22, count 0 2006.229.04:58:03.61#ibcon#first serial, iclass 22, count 0 2006.229.04:58:03.61#ibcon#enter sib2, iclass 22, count 0 2006.229.04:58:03.61#ibcon#flushed, iclass 22, count 0 2006.229.04:58:03.61#ibcon#about to write, iclass 22, count 0 2006.229.04:58:03.61#ibcon#wrote, iclass 22, count 0 2006.229.04:58:03.61#ibcon#about to read 3, iclass 22, count 0 2006.229.04:58:03.63#ibcon#read 3, iclass 22, count 0 2006.229.04:58:03.63#ibcon#about to read 4, iclass 22, count 0 2006.229.04:58:03.63#ibcon#read 4, iclass 22, count 0 2006.229.04:58:03.63#ibcon#about to read 5, iclass 22, count 0 2006.229.04:58:03.63#ibcon#read 5, iclass 22, count 0 2006.229.04:58:03.63#ibcon#about to read 6, iclass 22, count 0 2006.229.04:58:03.63#ibcon#read 6, iclass 22, count 0 2006.229.04:58:03.63#ibcon#end of sib2, iclass 22, count 0 2006.229.04:58:03.63#ibcon#*mode == 0, iclass 22, count 0 2006.229.04:58:03.63#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.04:58:03.63#ibcon#[27=USB\r\n] 2006.229.04:58:03.63#ibcon#*before write, iclass 22, count 0 2006.229.04:58:03.63#ibcon#enter sib2, iclass 22, count 0 2006.229.04:58:03.63#ibcon#flushed, iclass 22, count 0 2006.229.04:58:03.63#ibcon#about to write, iclass 22, count 0 2006.229.04:58:03.63#ibcon#wrote, iclass 22, count 0 2006.229.04:58:03.63#ibcon#about to read 3, iclass 22, count 0 2006.229.04:58:03.66#ibcon#read 3, iclass 22, count 0 2006.229.04:58:03.66#ibcon#about to read 4, iclass 22, count 0 2006.229.04:58:03.66#ibcon#read 4, iclass 22, count 0 2006.229.04:58:03.66#ibcon#about to read 5, iclass 22, count 0 2006.229.04:58:03.66#ibcon#read 5, iclass 22, count 0 2006.229.04:58:03.66#ibcon#about to read 6, iclass 22, count 0 2006.229.04:58:03.66#ibcon#read 6, iclass 22, count 0 2006.229.04:58:03.66#ibcon#end of sib2, iclass 22, count 0 2006.229.04:58:03.66#ibcon#*after write, iclass 22, count 0 2006.229.04:58:03.66#ibcon#*before return 0, iclass 22, count 0 2006.229.04:58:03.66#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:03.66#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.04:58:03.66#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.04:58:03.66#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.04:58:03.66$vck44/vblo=6,719.99 2006.229.04:58:03.66#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.04:58:03.66#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.04:58:03.66#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:03.66#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:03.66#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:03.66#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:03.66#ibcon#enter wrdev, iclass 24, count 0 2006.229.04:58:03.66#ibcon#first serial, iclass 24, count 0 2006.229.04:58:03.66#ibcon#enter sib2, iclass 24, count 0 2006.229.04:58:03.66#ibcon#flushed, iclass 24, count 0 2006.229.04:58:03.66#ibcon#about to write, iclass 24, count 0 2006.229.04:58:03.66#ibcon#wrote, iclass 24, count 0 2006.229.04:58:03.66#ibcon#about to read 3, iclass 24, count 0 2006.229.04:58:03.68#ibcon#read 3, iclass 24, count 0 2006.229.04:58:03.68#ibcon#about to read 4, iclass 24, count 0 2006.229.04:58:03.68#ibcon#read 4, iclass 24, count 0 2006.229.04:58:03.68#ibcon#about to read 5, iclass 24, count 0 2006.229.04:58:03.68#ibcon#read 5, iclass 24, count 0 2006.229.04:58:03.68#ibcon#about to read 6, iclass 24, count 0 2006.229.04:58:03.68#ibcon#read 6, iclass 24, count 0 2006.229.04:58:03.68#ibcon#end of sib2, iclass 24, count 0 2006.229.04:58:03.68#ibcon#*mode == 0, iclass 24, count 0 2006.229.04:58:03.68#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.04:58:03.68#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.04:58:03.68#ibcon#*before write, iclass 24, count 0 2006.229.04:58:03.68#ibcon#enter sib2, iclass 24, count 0 2006.229.04:58:03.68#ibcon#flushed, iclass 24, count 0 2006.229.04:58:03.68#ibcon#about to write, iclass 24, count 0 2006.229.04:58:03.68#ibcon#wrote, iclass 24, count 0 2006.229.04:58:03.68#ibcon#about to read 3, iclass 24, count 0 2006.229.04:58:03.72#ibcon#read 3, iclass 24, count 0 2006.229.04:58:03.72#ibcon#about to read 4, iclass 24, count 0 2006.229.04:58:03.72#ibcon#read 4, iclass 24, count 0 2006.229.04:58:03.72#ibcon#about to read 5, iclass 24, count 0 2006.229.04:58:03.72#ibcon#read 5, iclass 24, count 0 2006.229.04:58:03.72#ibcon#about to read 6, iclass 24, count 0 2006.229.04:58:03.72#ibcon#read 6, iclass 24, count 0 2006.229.04:58:03.72#ibcon#end of sib2, iclass 24, count 0 2006.229.04:58:03.72#ibcon#*after write, iclass 24, count 0 2006.229.04:58:03.72#ibcon#*before return 0, iclass 24, count 0 2006.229.04:58:03.72#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:03.72#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.04:58:03.72#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.04:58:03.72#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.04:58:03.72$vck44/vb=6,4 2006.229.04:58:03.72#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.04:58:03.72#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.04:58:03.72#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:03.72#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:03.78#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:03.78#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:03.78#ibcon#enter wrdev, iclass 26, count 2 2006.229.04:58:03.78#ibcon#first serial, iclass 26, count 2 2006.229.04:58:03.78#ibcon#enter sib2, iclass 26, count 2 2006.229.04:58:03.78#ibcon#flushed, iclass 26, count 2 2006.229.04:58:03.78#ibcon#about to write, iclass 26, count 2 2006.229.04:58:03.78#ibcon#wrote, iclass 26, count 2 2006.229.04:58:03.78#ibcon#about to read 3, iclass 26, count 2 2006.229.04:58:03.80#ibcon#read 3, iclass 26, count 2 2006.229.04:58:03.80#ibcon#about to read 4, iclass 26, count 2 2006.229.04:58:03.80#ibcon#read 4, iclass 26, count 2 2006.229.04:58:03.80#ibcon#about to read 5, iclass 26, count 2 2006.229.04:58:03.80#ibcon#read 5, iclass 26, count 2 2006.229.04:58:03.80#ibcon#about to read 6, iclass 26, count 2 2006.229.04:58:03.80#ibcon#read 6, iclass 26, count 2 2006.229.04:58:03.80#ibcon#end of sib2, iclass 26, count 2 2006.229.04:58:03.80#ibcon#*mode == 0, iclass 26, count 2 2006.229.04:58:03.80#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.04:58:03.80#ibcon#[27=AT06-04\r\n] 2006.229.04:58:03.80#ibcon#*before write, iclass 26, count 2 2006.229.04:58:03.80#ibcon#enter sib2, iclass 26, count 2 2006.229.04:58:03.80#ibcon#flushed, iclass 26, count 2 2006.229.04:58:03.80#ibcon#about to write, iclass 26, count 2 2006.229.04:58:03.80#ibcon#wrote, iclass 26, count 2 2006.229.04:58:03.80#ibcon#about to read 3, iclass 26, count 2 2006.229.04:58:03.83#ibcon#read 3, iclass 26, count 2 2006.229.04:58:03.83#ibcon#about to read 4, iclass 26, count 2 2006.229.04:58:03.83#ibcon#read 4, iclass 26, count 2 2006.229.04:58:03.83#ibcon#about to read 5, iclass 26, count 2 2006.229.04:58:03.83#ibcon#read 5, iclass 26, count 2 2006.229.04:58:03.83#ibcon#about to read 6, iclass 26, count 2 2006.229.04:58:03.83#ibcon#read 6, iclass 26, count 2 2006.229.04:58:03.83#ibcon#end of sib2, iclass 26, count 2 2006.229.04:58:03.83#ibcon#*after write, iclass 26, count 2 2006.229.04:58:03.83#ibcon#*before return 0, iclass 26, count 2 2006.229.04:58:03.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:03.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.04:58:03.83#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.04:58:03.83#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:03.83#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:03.95#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:03.95#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:03.95#ibcon#enter wrdev, iclass 26, count 0 2006.229.04:58:03.95#ibcon#first serial, iclass 26, count 0 2006.229.04:58:03.95#ibcon#enter sib2, iclass 26, count 0 2006.229.04:58:03.95#ibcon#flushed, iclass 26, count 0 2006.229.04:58:03.95#ibcon#about to write, iclass 26, count 0 2006.229.04:58:03.95#ibcon#wrote, iclass 26, count 0 2006.229.04:58:03.95#ibcon#about to read 3, iclass 26, count 0 2006.229.04:58:03.97#ibcon#read 3, iclass 26, count 0 2006.229.04:58:03.97#ibcon#about to read 4, iclass 26, count 0 2006.229.04:58:03.97#ibcon#read 4, iclass 26, count 0 2006.229.04:58:03.97#ibcon#about to read 5, iclass 26, count 0 2006.229.04:58:03.97#ibcon#read 5, iclass 26, count 0 2006.229.04:58:03.97#ibcon#about to read 6, iclass 26, count 0 2006.229.04:58:03.97#ibcon#read 6, iclass 26, count 0 2006.229.04:58:03.97#ibcon#end of sib2, iclass 26, count 0 2006.229.04:58:03.97#ibcon#*mode == 0, iclass 26, count 0 2006.229.04:58:03.97#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.04:58:03.97#ibcon#[27=USB\r\n] 2006.229.04:58:03.97#ibcon#*before write, iclass 26, count 0 2006.229.04:58:03.97#ibcon#enter sib2, iclass 26, count 0 2006.229.04:58:03.97#ibcon#flushed, iclass 26, count 0 2006.229.04:58:03.97#ibcon#about to write, iclass 26, count 0 2006.229.04:58:03.97#ibcon#wrote, iclass 26, count 0 2006.229.04:58:03.97#ibcon#about to read 3, iclass 26, count 0 2006.229.04:58:04.00#ibcon#read 3, iclass 26, count 0 2006.229.04:58:04.00#ibcon#about to read 4, iclass 26, count 0 2006.229.04:58:04.00#ibcon#read 4, iclass 26, count 0 2006.229.04:58:04.00#ibcon#about to read 5, iclass 26, count 0 2006.229.04:58:04.00#ibcon#read 5, iclass 26, count 0 2006.229.04:58:04.00#ibcon#about to read 6, iclass 26, count 0 2006.229.04:58:04.00#ibcon#read 6, iclass 26, count 0 2006.229.04:58:04.00#ibcon#end of sib2, iclass 26, count 0 2006.229.04:58:04.00#ibcon#*after write, iclass 26, count 0 2006.229.04:58:04.00#ibcon#*before return 0, iclass 26, count 0 2006.229.04:58:04.00#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:04.00#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.04:58:04.00#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.04:58:04.00#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.04:58:04.00$vck44/vblo=7,734.99 2006.229.04:58:04.00#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.04:58:04.00#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.04:58:04.00#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:04.00#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:04.00#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:04.00#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:04.00#ibcon#enter wrdev, iclass 28, count 0 2006.229.04:58:04.00#ibcon#first serial, iclass 28, count 0 2006.229.04:58:04.00#ibcon#enter sib2, iclass 28, count 0 2006.229.04:58:04.00#ibcon#flushed, iclass 28, count 0 2006.229.04:58:04.00#ibcon#about to write, iclass 28, count 0 2006.229.04:58:04.00#ibcon#wrote, iclass 28, count 0 2006.229.04:58:04.00#ibcon#about to read 3, iclass 28, count 0 2006.229.04:58:04.02#ibcon#read 3, iclass 28, count 0 2006.229.04:58:04.02#ibcon#about to read 4, iclass 28, count 0 2006.229.04:58:04.02#ibcon#read 4, iclass 28, count 0 2006.229.04:58:04.02#ibcon#about to read 5, iclass 28, count 0 2006.229.04:58:04.02#ibcon#read 5, iclass 28, count 0 2006.229.04:58:04.02#ibcon#about to read 6, iclass 28, count 0 2006.229.04:58:04.02#ibcon#read 6, iclass 28, count 0 2006.229.04:58:04.02#ibcon#end of sib2, iclass 28, count 0 2006.229.04:58:04.02#ibcon#*mode == 0, iclass 28, count 0 2006.229.04:58:04.02#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.04:58:04.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.04:58:04.02#ibcon#*before write, iclass 28, count 0 2006.229.04:58:04.02#ibcon#enter sib2, iclass 28, count 0 2006.229.04:58:04.02#ibcon#flushed, iclass 28, count 0 2006.229.04:58:04.02#ibcon#about to write, iclass 28, count 0 2006.229.04:58:04.02#ibcon#wrote, iclass 28, count 0 2006.229.04:58:04.02#ibcon#about to read 3, iclass 28, count 0 2006.229.04:58:04.06#ibcon#read 3, iclass 28, count 0 2006.229.04:58:04.06#ibcon#about to read 4, iclass 28, count 0 2006.229.04:58:04.06#ibcon#read 4, iclass 28, count 0 2006.229.04:58:04.06#ibcon#about to read 5, iclass 28, count 0 2006.229.04:58:04.06#ibcon#read 5, iclass 28, count 0 2006.229.04:58:04.06#ibcon#about to read 6, iclass 28, count 0 2006.229.04:58:04.06#ibcon#read 6, iclass 28, count 0 2006.229.04:58:04.06#ibcon#end of sib2, iclass 28, count 0 2006.229.04:58:04.06#ibcon#*after write, iclass 28, count 0 2006.229.04:58:04.06#ibcon#*before return 0, iclass 28, count 0 2006.229.04:58:04.06#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:04.06#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.04:58:04.06#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.04:58:04.06#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.04:58:04.06$vck44/vb=7,4 2006.229.04:58:04.06#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.04:58:04.06#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.04:58:04.06#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:04.06#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:04.12#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:04.12#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:04.12#ibcon#enter wrdev, iclass 30, count 2 2006.229.04:58:04.12#ibcon#first serial, iclass 30, count 2 2006.229.04:58:04.12#ibcon#enter sib2, iclass 30, count 2 2006.229.04:58:04.12#ibcon#flushed, iclass 30, count 2 2006.229.04:58:04.12#ibcon#about to write, iclass 30, count 2 2006.229.04:58:04.12#ibcon#wrote, iclass 30, count 2 2006.229.04:58:04.12#ibcon#about to read 3, iclass 30, count 2 2006.229.04:58:04.14#ibcon#read 3, iclass 30, count 2 2006.229.04:58:04.14#ibcon#about to read 4, iclass 30, count 2 2006.229.04:58:04.14#ibcon#read 4, iclass 30, count 2 2006.229.04:58:04.14#ibcon#about to read 5, iclass 30, count 2 2006.229.04:58:04.14#ibcon#read 5, iclass 30, count 2 2006.229.04:58:04.14#ibcon#about to read 6, iclass 30, count 2 2006.229.04:58:04.14#ibcon#read 6, iclass 30, count 2 2006.229.04:58:04.14#ibcon#end of sib2, iclass 30, count 2 2006.229.04:58:04.14#ibcon#*mode == 0, iclass 30, count 2 2006.229.04:58:04.14#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.04:58:04.14#ibcon#[27=AT07-04\r\n] 2006.229.04:58:04.14#ibcon#*before write, iclass 30, count 2 2006.229.04:58:04.14#ibcon#enter sib2, iclass 30, count 2 2006.229.04:58:04.14#ibcon#flushed, iclass 30, count 2 2006.229.04:58:04.14#ibcon#about to write, iclass 30, count 2 2006.229.04:58:04.14#ibcon#wrote, iclass 30, count 2 2006.229.04:58:04.14#ibcon#about to read 3, iclass 30, count 2 2006.229.04:58:04.17#ibcon#read 3, iclass 30, count 2 2006.229.04:58:04.17#ibcon#about to read 4, iclass 30, count 2 2006.229.04:58:04.17#ibcon#read 4, iclass 30, count 2 2006.229.04:58:04.17#ibcon#about to read 5, iclass 30, count 2 2006.229.04:58:04.17#ibcon#read 5, iclass 30, count 2 2006.229.04:58:04.17#ibcon#about to read 6, iclass 30, count 2 2006.229.04:58:04.17#ibcon#read 6, iclass 30, count 2 2006.229.04:58:04.17#ibcon#end of sib2, iclass 30, count 2 2006.229.04:58:04.17#ibcon#*after write, iclass 30, count 2 2006.229.04:58:04.17#ibcon#*before return 0, iclass 30, count 2 2006.229.04:58:04.17#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:04.17#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.04:58:04.17#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.04:58:04.17#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:04.17#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:04.29#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:04.29#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:04.29#ibcon#enter wrdev, iclass 30, count 0 2006.229.04:58:04.29#ibcon#first serial, iclass 30, count 0 2006.229.04:58:04.29#ibcon#enter sib2, iclass 30, count 0 2006.229.04:58:04.29#ibcon#flushed, iclass 30, count 0 2006.229.04:58:04.29#ibcon#about to write, iclass 30, count 0 2006.229.04:58:04.29#ibcon#wrote, iclass 30, count 0 2006.229.04:58:04.29#ibcon#about to read 3, iclass 30, count 0 2006.229.04:58:04.31#ibcon#read 3, iclass 30, count 0 2006.229.04:58:04.31#ibcon#about to read 4, iclass 30, count 0 2006.229.04:58:04.31#ibcon#read 4, iclass 30, count 0 2006.229.04:58:04.31#ibcon#about to read 5, iclass 30, count 0 2006.229.04:58:04.31#ibcon#read 5, iclass 30, count 0 2006.229.04:58:04.31#ibcon#about to read 6, iclass 30, count 0 2006.229.04:58:04.31#ibcon#read 6, iclass 30, count 0 2006.229.04:58:04.31#ibcon#end of sib2, iclass 30, count 0 2006.229.04:58:04.31#ibcon#*mode == 0, iclass 30, count 0 2006.229.04:58:04.31#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.04:58:04.31#ibcon#[27=USB\r\n] 2006.229.04:58:04.31#ibcon#*before write, iclass 30, count 0 2006.229.04:58:04.31#ibcon#enter sib2, iclass 30, count 0 2006.229.04:58:04.31#ibcon#flushed, iclass 30, count 0 2006.229.04:58:04.31#ibcon#about to write, iclass 30, count 0 2006.229.04:58:04.31#ibcon#wrote, iclass 30, count 0 2006.229.04:58:04.31#ibcon#about to read 3, iclass 30, count 0 2006.229.04:58:04.34#ibcon#read 3, iclass 30, count 0 2006.229.04:58:04.34#ibcon#about to read 4, iclass 30, count 0 2006.229.04:58:04.34#ibcon#read 4, iclass 30, count 0 2006.229.04:58:04.34#ibcon#about to read 5, iclass 30, count 0 2006.229.04:58:04.34#ibcon#read 5, iclass 30, count 0 2006.229.04:58:04.34#ibcon#about to read 6, iclass 30, count 0 2006.229.04:58:04.34#ibcon#read 6, iclass 30, count 0 2006.229.04:58:04.34#ibcon#end of sib2, iclass 30, count 0 2006.229.04:58:04.34#ibcon#*after write, iclass 30, count 0 2006.229.04:58:04.34#ibcon#*before return 0, iclass 30, count 0 2006.229.04:58:04.34#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:04.34#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.04:58:04.34#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.04:58:04.34#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.04:58:04.34$vck44/vblo=8,744.99 2006.229.04:58:04.34#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.04:58:04.34#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.04:58:04.34#ibcon#ireg 17 cls_cnt 0 2006.229.04:58:04.34#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:04.34#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:04.34#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:04.34#ibcon#enter wrdev, iclass 32, count 0 2006.229.04:58:04.34#ibcon#first serial, iclass 32, count 0 2006.229.04:58:04.34#ibcon#enter sib2, iclass 32, count 0 2006.229.04:58:04.34#ibcon#flushed, iclass 32, count 0 2006.229.04:58:04.34#ibcon#about to write, iclass 32, count 0 2006.229.04:58:04.34#ibcon#wrote, iclass 32, count 0 2006.229.04:58:04.34#ibcon#about to read 3, iclass 32, count 0 2006.229.04:58:04.36#ibcon#read 3, iclass 32, count 0 2006.229.04:58:04.36#ibcon#about to read 4, iclass 32, count 0 2006.229.04:58:04.36#ibcon#read 4, iclass 32, count 0 2006.229.04:58:04.36#ibcon#about to read 5, iclass 32, count 0 2006.229.04:58:04.36#ibcon#read 5, iclass 32, count 0 2006.229.04:58:04.36#ibcon#about to read 6, iclass 32, count 0 2006.229.04:58:04.36#ibcon#read 6, iclass 32, count 0 2006.229.04:58:04.36#ibcon#end of sib2, iclass 32, count 0 2006.229.04:58:04.36#ibcon#*mode == 0, iclass 32, count 0 2006.229.04:58:04.36#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.04:58:04.36#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.04:58:04.36#ibcon#*before write, iclass 32, count 0 2006.229.04:58:04.36#ibcon#enter sib2, iclass 32, count 0 2006.229.04:58:04.36#ibcon#flushed, iclass 32, count 0 2006.229.04:58:04.36#ibcon#about to write, iclass 32, count 0 2006.229.04:58:04.36#ibcon#wrote, iclass 32, count 0 2006.229.04:58:04.36#ibcon#about to read 3, iclass 32, count 0 2006.229.04:58:04.40#ibcon#read 3, iclass 32, count 0 2006.229.04:58:04.40#ibcon#about to read 4, iclass 32, count 0 2006.229.04:58:04.40#ibcon#read 4, iclass 32, count 0 2006.229.04:58:04.40#ibcon#about to read 5, iclass 32, count 0 2006.229.04:58:04.40#ibcon#read 5, iclass 32, count 0 2006.229.04:58:04.40#ibcon#about to read 6, iclass 32, count 0 2006.229.04:58:04.40#ibcon#read 6, iclass 32, count 0 2006.229.04:58:04.40#ibcon#end of sib2, iclass 32, count 0 2006.229.04:58:04.40#ibcon#*after write, iclass 32, count 0 2006.229.04:58:04.40#ibcon#*before return 0, iclass 32, count 0 2006.229.04:58:04.40#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:04.40#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.04:58:04.40#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.04:58:04.40#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.04:58:04.40$vck44/vb=8,4 2006.229.04:58:04.40#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.04:58:04.40#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.04:58:04.40#ibcon#ireg 11 cls_cnt 2 2006.229.04:58:04.40#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:04.46#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:04.46#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:04.46#ibcon#enter wrdev, iclass 34, count 2 2006.229.04:58:04.46#ibcon#first serial, iclass 34, count 2 2006.229.04:58:04.46#ibcon#enter sib2, iclass 34, count 2 2006.229.04:58:04.46#ibcon#flushed, iclass 34, count 2 2006.229.04:58:04.46#ibcon#about to write, iclass 34, count 2 2006.229.04:58:04.46#ibcon#wrote, iclass 34, count 2 2006.229.04:58:04.46#ibcon#about to read 3, iclass 34, count 2 2006.229.04:58:04.48#ibcon#read 3, iclass 34, count 2 2006.229.04:58:04.48#ibcon#about to read 4, iclass 34, count 2 2006.229.04:58:04.48#ibcon#read 4, iclass 34, count 2 2006.229.04:58:04.48#ibcon#about to read 5, iclass 34, count 2 2006.229.04:58:04.48#ibcon#read 5, iclass 34, count 2 2006.229.04:58:04.48#ibcon#about to read 6, iclass 34, count 2 2006.229.04:58:04.48#ibcon#read 6, iclass 34, count 2 2006.229.04:58:04.48#ibcon#end of sib2, iclass 34, count 2 2006.229.04:58:04.48#ibcon#*mode == 0, iclass 34, count 2 2006.229.04:58:04.48#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.04:58:04.48#ibcon#[27=AT08-04\r\n] 2006.229.04:58:04.48#ibcon#*before write, iclass 34, count 2 2006.229.04:58:04.48#ibcon#enter sib2, iclass 34, count 2 2006.229.04:58:04.48#ibcon#flushed, iclass 34, count 2 2006.229.04:58:04.48#ibcon#about to write, iclass 34, count 2 2006.229.04:58:04.48#ibcon#wrote, iclass 34, count 2 2006.229.04:58:04.48#ibcon#about to read 3, iclass 34, count 2 2006.229.04:58:04.51#ibcon#read 3, iclass 34, count 2 2006.229.04:58:04.51#ibcon#about to read 4, iclass 34, count 2 2006.229.04:58:04.51#ibcon#read 4, iclass 34, count 2 2006.229.04:58:04.51#ibcon#about to read 5, iclass 34, count 2 2006.229.04:58:04.51#ibcon#read 5, iclass 34, count 2 2006.229.04:58:04.51#ibcon#about to read 6, iclass 34, count 2 2006.229.04:58:04.51#ibcon#read 6, iclass 34, count 2 2006.229.04:58:04.51#ibcon#end of sib2, iclass 34, count 2 2006.229.04:58:04.51#ibcon#*after write, iclass 34, count 2 2006.229.04:58:04.51#ibcon#*before return 0, iclass 34, count 2 2006.229.04:58:04.51#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:04.51#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.04:58:04.51#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.04:58:04.51#ibcon#ireg 7 cls_cnt 0 2006.229.04:58:04.51#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:04.63#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:04.63#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:04.63#ibcon#enter wrdev, iclass 34, count 0 2006.229.04:58:04.63#ibcon#first serial, iclass 34, count 0 2006.229.04:58:04.63#ibcon#enter sib2, iclass 34, count 0 2006.229.04:58:04.63#ibcon#flushed, iclass 34, count 0 2006.229.04:58:04.63#ibcon#about to write, iclass 34, count 0 2006.229.04:58:04.63#ibcon#wrote, iclass 34, count 0 2006.229.04:58:04.63#ibcon#about to read 3, iclass 34, count 0 2006.229.04:58:04.65#ibcon#read 3, iclass 34, count 0 2006.229.04:58:04.65#ibcon#about to read 4, iclass 34, count 0 2006.229.04:58:04.65#ibcon#read 4, iclass 34, count 0 2006.229.04:58:04.65#ibcon#about to read 5, iclass 34, count 0 2006.229.04:58:04.65#ibcon#read 5, iclass 34, count 0 2006.229.04:58:04.65#ibcon#about to read 6, iclass 34, count 0 2006.229.04:58:04.65#ibcon#read 6, iclass 34, count 0 2006.229.04:58:04.65#ibcon#end of sib2, iclass 34, count 0 2006.229.04:58:04.65#ibcon#*mode == 0, iclass 34, count 0 2006.229.04:58:04.65#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.04:58:04.65#ibcon#[27=USB\r\n] 2006.229.04:58:04.65#ibcon#*before write, iclass 34, count 0 2006.229.04:58:04.65#ibcon#enter sib2, iclass 34, count 0 2006.229.04:58:04.65#ibcon#flushed, iclass 34, count 0 2006.229.04:58:04.65#ibcon#about to write, iclass 34, count 0 2006.229.04:58:04.65#ibcon#wrote, iclass 34, count 0 2006.229.04:58:04.65#ibcon#about to read 3, iclass 34, count 0 2006.229.04:58:04.68#ibcon#read 3, iclass 34, count 0 2006.229.04:58:04.68#ibcon#about to read 4, iclass 34, count 0 2006.229.04:58:04.68#ibcon#read 4, iclass 34, count 0 2006.229.04:58:04.68#ibcon#about to read 5, iclass 34, count 0 2006.229.04:58:04.68#ibcon#read 5, iclass 34, count 0 2006.229.04:58:04.68#ibcon#about to read 6, iclass 34, count 0 2006.229.04:58:04.68#ibcon#read 6, iclass 34, count 0 2006.229.04:58:04.68#ibcon#end of sib2, iclass 34, count 0 2006.229.04:58:04.68#ibcon#*after write, iclass 34, count 0 2006.229.04:58:04.68#ibcon#*before return 0, iclass 34, count 0 2006.229.04:58:04.68#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:04.68#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.04:58:04.68#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.04:58:04.68#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.04:58:04.68$vck44/vabw=wide 2006.229.04:58:04.68#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.04:58:04.68#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.04:58:04.68#ibcon#ireg 8 cls_cnt 0 2006.229.04:58:04.68#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:04.68#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:04.68#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:04.68#ibcon#enter wrdev, iclass 36, count 0 2006.229.04:58:04.68#ibcon#first serial, iclass 36, count 0 2006.229.04:58:04.68#ibcon#enter sib2, iclass 36, count 0 2006.229.04:58:04.68#ibcon#flushed, iclass 36, count 0 2006.229.04:58:04.68#ibcon#about to write, iclass 36, count 0 2006.229.04:58:04.68#ibcon#wrote, iclass 36, count 0 2006.229.04:58:04.68#ibcon#about to read 3, iclass 36, count 0 2006.229.04:58:04.70#ibcon#read 3, iclass 36, count 0 2006.229.04:58:04.70#ibcon#about to read 4, iclass 36, count 0 2006.229.04:58:04.70#ibcon#read 4, iclass 36, count 0 2006.229.04:58:04.70#ibcon#about to read 5, iclass 36, count 0 2006.229.04:58:04.70#ibcon#read 5, iclass 36, count 0 2006.229.04:58:04.70#ibcon#about to read 6, iclass 36, count 0 2006.229.04:58:04.70#ibcon#read 6, iclass 36, count 0 2006.229.04:58:04.70#ibcon#end of sib2, iclass 36, count 0 2006.229.04:58:04.70#ibcon#*mode == 0, iclass 36, count 0 2006.229.04:58:04.70#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.04:58:04.70#ibcon#[25=BW32\r\n] 2006.229.04:58:04.70#ibcon#*before write, iclass 36, count 0 2006.229.04:58:04.70#ibcon#enter sib2, iclass 36, count 0 2006.229.04:58:04.70#ibcon#flushed, iclass 36, count 0 2006.229.04:58:04.70#ibcon#about to write, iclass 36, count 0 2006.229.04:58:04.70#ibcon#wrote, iclass 36, count 0 2006.229.04:58:04.70#ibcon#about to read 3, iclass 36, count 0 2006.229.04:58:04.73#ibcon#read 3, iclass 36, count 0 2006.229.04:58:04.73#ibcon#about to read 4, iclass 36, count 0 2006.229.04:58:04.73#ibcon#read 4, iclass 36, count 0 2006.229.04:58:04.73#ibcon#about to read 5, iclass 36, count 0 2006.229.04:58:04.73#ibcon#read 5, iclass 36, count 0 2006.229.04:58:04.73#ibcon#about to read 6, iclass 36, count 0 2006.229.04:58:04.73#ibcon#read 6, iclass 36, count 0 2006.229.04:58:04.73#ibcon#end of sib2, iclass 36, count 0 2006.229.04:58:04.73#ibcon#*after write, iclass 36, count 0 2006.229.04:58:04.73#ibcon#*before return 0, iclass 36, count 0 2006.229.04:58:04.73#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:04.73#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.04:58:04.73#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.04:58:04.73#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.04:58:04.73$vck44/vbbw=wide 2006.229.04:58:04.73#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.04:58:04.73#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.04:58:04.73#ibcon#ireg 8 cls_cnt 0 2006.229.04:58:04.73#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:58:04.80#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:58:04.80#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:58:04.80#ibcon#enter wrdev, iclass 38, count 0 2006.229.04:58:04.80#ibcon#first serial, iclass 38, count 0 2006.229.04:58:04.80#ibcon#enter sib2, iclass 38, count 0 2006.229.04:58:04.80#ibcon#flushed, iclass 38, count 0 2006.229.04:58:04.80#ibcon#about to write, iclass 38, count 0 2006.229.04:58:04.80#ibcon#wrote, iclass 38, count 0 2006.229.04:58:04.80#ibcon#about to read 3, iclass 38, count 0 2006.229.04:58:04.82#ibcon#read 3, iclass 38, count 0 2006.229.04:58:04.82#ibcon#about to read 4, iclass 38, count 0 2006.229.04:58:04.82#ibcon#read 4, iclass 38, count 0 2006.229.04:58:04.82#ibcon#about to read 5, iclass 38, count 0 2006.229.04:58:04.82#ibcon#read 5, iclass 38, count 0 2006.229.04:58:04.82#ibcon#about to read 6, iclass 38, count 0 2006.229.04:58:04.82#ibcon#read 6, iclass 38, count 0 2006.229.04:58:04.82#ibcon#end of sib2, iclass 38, count 0 2006.229.04:58:04.82#ibcon#*mode == 0, iclass 38, count 0 2006.229.04:58:04.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.04:58:04.82#ibcon#[27=BW32\r\n] 2006.229.04:58:04.82#ibcon#*before write, iclass 38, count 0 2006.229.04:58:04.82#ibcon#enter sib2, iclass 38, count 0 2006.229.04:58:04.82#ibcon#flushed, iclass 38, count 0 2006.229.04:58:04.82#ibcon#about to write, iclass 38, count 0 2006.229.04:58:04.82#ibcon#wrote, iclass 38, count 0 2006.229.04:58:04.82#ibcon#about to read 3, iclass 38, count 0 2006.229.04:58:04.85#ibcon#read 3, iclass 38, count 0 2006.229.04:58:04.85#ibcon#about to read 4, iclass 38, count 0 2006.229.04:58:04.85#ibcon#read 4, iclass 38, count 0 2006.229.04:58:04.85#ibcon#about to read 5, iclass 38, count 0 2006.229.04:58:04.85#ibcon#read 5, iclass 38, count 0 2006.229.04:58:04.85#ibcon#about to read 6, iclass 38, count 0 2006.229.04:58:04.85#ibcon#read 6, iclass 38, count 0 2006.229.04:58:04.85#ibcon#end of sib2, iclass 38, count 0 2006.229.04:58:04.85#ibcon#*after write, iclass 38, count 0 2006.229.04:58:04.85#ibcon#*before return 0, iclass 38, count 0 2006.229.04:58:04.85#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:58:04.85#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.04:58:04.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.04:58:04.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.04:58:04.85$setupk4/ifdk4 2006.229.04:58:04.85$ifdk4/lo= 2006.229.04:58:04.85$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.04:58:04.85$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.04:58:04.85$ifdk4/patch= 2006.229.04:58:04.85$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.04:58:04.85$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.04:58:04.85$setupk4/!*+20s 2006.229.04:58:07.67#abcon#<5=/05 3.6 7.5 31.14 90 999.6\r\n> 2006.229.04:58:07.69#abcon#{5=INTERFACE CLEAR} 2006.229.04:58:07.75#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:58:17.84#abcon#<5=/05 3.6 7.6 31.13 91 999.6\r\n> 2006.229.04:58:17.86#abcon#{5=INTERFACE CLEAR} 2006.229.04:58:17.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.04:58:19.14#trakl#Source acquired 2006.229.04:58:19.29$setupk4/"tpicd 2006.229.04:58:19.29$setupk4/echo=off 2006.229.04:58:19.29$setupk4/xlog=off 2006.229.04:58:19.29:!2006.229.05:01:35 2006.229.04:58:21.14#flagr#flagr/antenna,acquired 2006.229.05:01:35.00:preob 2006.229.05:01:35.14/onsource/TRACKING 2006.229.05:01:35.14:!2006.229.05:01:45 2006.229.05:01:45.02:"tape 2006.229.05:01:45.02:"st=record 2006.229.05:01:45.02:data_valid=on 2006.229.05:01:45.02:midob 2006.229.05:01:46.14/onsource/TRACKING 2006.229.05:01:46.14/wx/31.07,999.7,90 2006.229.05:01:46.30/cable/+6.4023E-03 2006.229.05:01:47.39/va/01,08,usb,yes,29,31 2006.229.05:01:47.39/va/02,07,usb,yes,32,32 2006.229.05:01:47.39/va/03,06,usb,yes,39,42 2006.229.05:01:47.39/va/04,07,usb,yes,32,34 2006.229.05:01:47.39/va/05,04,usb,yes,29,29 2006.229.05:01:47.39/va/06,04,usb,yes,33,32 2006.229.05:01:47.39/va/07,05,usb,yes,29,29 2006.229.05:01:47.39/va/08,06,usb,yes,21,26 2006.229.05:01:47.62/valo/01,524.99,yes,locked 2006.229.05:01:47.62/valo/02,534.99,yes,locked 2006.229.05:01:47.62/valo/03,564.99,yes,locked 2006.229.05:01:47.62/valo/04,624.99,yes,locked 2006.229.05:01:47.62/valo/05,734.99,yes,locked 2006.229.05:01:47.62/valo/06,814.99,yes,locked 2006.229.05:01:47.62/valo/07,864.99,yes,locked 2006.229.05:01:47.62/valo/08,884.99,yes,locked 2006.229.05:01:48.71/vb/01,04,usb,yes,31,29 2006.229.05:01:48.71/vb/02,04,usb,yes,33,33 2006.229.05:01:48.71/vb/03,04,usb,yes,30,33 2006.229.05:01:48.71/vb/04,04,usb,yes,35,33 2006.229.05:01:48.71/vb/05,04,usb,yes,27,29 2006.229.05:01:48.71/vb/06,04,usb,yes,31,27 2006.229.05:01:48.71/vb/07,04,usb,yes,31,31 2006.229.05:01:48.71/vb/08,04,usb,yes,29,32 2006.229.05:01:48.95/vblo/01,629.99,yes,locked 2006.229.05:01:48.95/vblo/02,634.99,yes,locked 2006.229.05:01:48.95/vblo/03,649.99,yes,locked 2006.229.05:01:48.95/vblo/04,679.99,yes,locked 2006.229.05:01:48.95/vblo/05,709.99,yes,locked 2006.229.05:01:48.95/vblo/06,719.99,yes,locked 2006.229.05:01:48.95/vblo/07,734.99,yes,locked 2006.229.05:01:48.95/vblo/08,744.99,yes,locked 2006.229.05:01:49.10/vabw/8 2006.229.05:01:49.25/vbbw/8 2006.229.05:01:49.34/xfe/off,on,12.0 2006.229.05:01:49.72/ifatt/23,28,28,28 2006.229.05:01:50.08/fmout-gps/S +4.55E-07 2006.229.05:01:50.12:!2006.229.05:02:25 2006.229.05:02:25.02:data_valid=off 2006.229.05:02:25.02:"et 2006.229.05:02:25.02:!+3s 2006.229.05:02:28.04:"tape 2006.229.05:02:28.05:postob 2006.229.05:02:28.15/cable/+6.4027E-03 2006.229.05:02:28.15/wx/31.06,999.7,91 2006.229.05:02:28.21/fmout-gps/S +4.56E-07 2006.229.05:02:28.21:scan_name=229-0504,jd0608,180 2006.229.05:02:28.21:source=1334-127,133739.78,-125724.7,2000.0,ccw 2006.229.05:02:29.14#flagr#flagr/antenna,new-source 2006.229.05:02:29.14:checkk5 2006.229.05:02:29.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:02:29.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:02:30.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:02:30.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:02:31.13/chk_obsdata//k5ts1/T2290501??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:02:31.52/chk_obsdata//k5ts2/T2290501??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:02:31.93/chk_obsdata//k5ts3/T2290501??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:02:32.34/chk_obsdata//k5ts4/T2290501??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:02:33.05/k5log//k5ts1_log_newline 2006.229.05:02:33.78/k5log//k5ts2_log_newline 2006.229.05:02:34.52/k5log//k5ts3_log_newline 2006.229.05:02:35.22/k5log//k5ts4_log_newline 2006.229.05:02:35.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:02:35.25:setupk4=1 2006.229.05:02:35.25$setupk4/echo=on 2006.229.05:02:35.25$setupk4/pcalon 2006.229.05:02:35.25$pcalon/"no phase cal control is implemented here 2006.229.05:02:35.25$setupk4/"tpicd=stop 2006.229.05:02:35.25$setupk4/"rec=synch_on 2006.229.05:02:35.25$setupk4/"rec_mode=128 2006.229.05:02:35.25$setupk4/!* 2006.229.05:02:35.25$setupk4/recpk4 2006.229.05:02:35.25$recpk4/recpatch= 2006.229.05:02:35.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:02:35.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:02:35.25$setupk4/vck44 2006.229.05:02:35.25$vck44/valo=1,524.99 2006.229.05:02:35.25#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:02:35.25#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:02:35.25#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:35.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:35.25#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:35.25#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:35.25#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:02:35.25#ibcon#first serial, iclass 5, count 0 2006.229.05:02:35.25#ibcon#enter sib2, iclass 5, count 0 2006.229.05:02:35.25#ibcon#flushed, iclass 5, count 0 2006.229.05:02:35.25#ibcon#about to write, iclass 5, count 0 2006.229.05:02:35.25#ibcon#wrote, iclass 5, count 0 2006.229.05:02:35.25#ibcon#about to read 3, iclass 5, count 0 2006.229.05:02:35.26#ibcon#read 3, iclass 5, count 0 2006.229.05:02:35.26#ibcon#about to read 4, iclass 5, count 0 2006.229.05:02:35.26#ibcon#read 4, iclass 5, count 0 2006.229.05:02:35.26#ibcon#about to read 5, iclass 5, count 0 2006.229.05:02:35.26#ibcon#read 5, iclass 5, count 0 2006.229.05:02:35.26#ibcon#about to read 6, iclass 5, count 0 2006.229.05:02:35.26#ibcon#read 6, iclass 5, count 0 2006.229.05:02:35.26#ibcon#end of sib2, iclass 5, count 0 2006.229.05:02:35.26#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:02:35.26#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:02:35.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:02:35.26#ibcon#*before write, iclass 5, count 0 2006.229.05:02:35.27#ibcon#enter sib2, iclass 5, count 0 2006.229.05:02:35.27#ibcon#flushed, iclass 5, count 0 2006.229.05:02:35.27#ibcon#about to write, iclass 5, count 0 2006.229.05:02:35.27#ibcon#wrote, iclass 5, count 0 2006.229.05:02:35.27#ibcon#about to read 3, iclass 5, count 0 2006.229.05:02:35.31#ibcon#read 3, iclass 5, count 0 2006.229.05:02:35.31#ibcon#about to read 4, iclass 5, count 0 2006.229.05:02:35.31#ibcon#read 4, iclass 5, count 0 2006.229.05:02:35.31#ibcon#about to read 5, iclass 5, count 0 2006.229.05:02:35.31#ibcon#read 5, iclass 5, count 0 2006.229.05:02:35.31#ibcon#about to read 6, iclass 5, count 0 2006.229.05:02:35.31#ibcon#read 6, iclass 5, count 0 2006.229.05:02:35.31#ibcon#end of sib2, iclass 5, count 0 2006.229.05:02:35.31#ibcon#*after write, iclass 5, count 0 2006.229.05:02:35.31#ibcon#*before return 0, iclass 5, count 0 2006.229.05:02:35.31#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:35.32#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:35.32#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:02:35.32#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:02:35.32$vck44/va=1,8 2006.229.05:02:35.32#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:02:35.32#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:02:35.32#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:35.32#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:35.32#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:35.32#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:35.32#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:02:35.32#ibcon#first serial, iclass 7, count 2 2006.229.05:02:35.32#ibcon#enter sib2, iclass 7, count 2 2006.229.05:02:35.32#ibcon#flushed, iclass 7, count 2 2006.229.05:02:35.32#ibcon#about to write, iclass 7, count 2 2006.229.05:02:35.32#ibcon#wrote, iclass 7, count 2 2006.229.05:02:35.32#ibcon#about to read 3, iclass 7, count 2 2006.229.05:02:35.33#ibcon#read 3, iclass 7, count 2 2006.229.05:02:35.33#ibcon#about to read 4, iclass 7, count 2 2006.229.05:02:35.33#ibcon#read 4, iclass 7, count 2 2006.229.05:02:35.33#ibcon#about to read 5, iclass 7, count 2 2006.229.05:02:35.33#ibcon#read 5, iclass 7, count 2 2006.229.05:02:35.33#ibcon#about to read 6, iclass 7, count 2 2006.229.05:02:35.33#ibcon#read 6, iclass 7, count 2 2006.229.05:02:35.33#ibcon#end of sib2, iclass 7, count 2 2006.229.05:02:35.33#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:02:35.33#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:02:35.33#ibcon#[25=AT01-08\r\n] 2006.229.05:02:35.33#ibcon#*before write, iclass 7, count 2 2006.229.05:02:35.33#ibcon#enter sib2, iclass 7, count 2 2006.229.05:02:35.33#ibcon#flushed, iclass 7, count 2 2006.229.05:02:35.34#ibcon#about to write, iclass 7, count 2 2006.229.05:02:35.34#ibcon#wrote, iclass 7, count 2 2006.229.05:02:35.34#ibcon#about to read 3, iclass 7, count 2 2006.229.05:02:35.36#ibcon#read 3, iclass 7, count 2 2006.229.05:02:35.36#ibcon#about to read 4, iclass 7, count 2 2006.229.05:02:35.36#ibcon#read 4, iclass 7, count 2 2006.229.05:02:35.36#ibcon#about to read 5, iclass 7, count 2 2006.229.05:02:35.36#ibcon#read 5, iclass 7, count 2 2006.229.05:02:35.36#ibcon#about to read 6, iclass 7, count 2 2006.229.05:02:35.36#ibcon#read 6, iclass 7, count 2 2006.229.05:02:35.36#ibcon#end of sib2, iclass 7, count 2 2006.229.05:02:35.36#ibcon#*after write, iclass 7, count 2 2006.229.05:02:35.36#ibcon#*before return 0, iclass 7, count 2 2006.229.05:02:35.36#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:35.36#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:35.36#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:02:35.36#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:35.36#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:35.48#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:35.48#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:35.48#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:02:35.48#ibcon#first serial, iclass 7, count 0 2006.229.05:02:35.48#ibcon#enter sib2, iclass 7, count 0 2006.229.05:02:35.48#ibcon#flushed, iclass 7, count 0 2006.229.05:02:35.48#ibcon#about to write, iclass 7, count 0 2006.229.05:02:35.48#ibcon#wrote, iclass 7, count 0 2006.229.05:02:35.48#ibcon#about to read 3, iclass 7, count 0 2006.229.05:02:35.50#ibcon#read 3, iclass 7, count 0 2006.229.05:02:35.50#ibcon#about to read 4, iclass 7, count 0 2006.229.05:02:35.50#ibcon#read 4, iclass 7, count 0 2006.229.05:02:35.50#ibcon#about to read 5, iclass 7, count 0 2006.229.05:02:35.50#ibcon#read 5, iclass 7, count 0 2006.229.05:02:35.50#ibcon#about to read 6, iclass 7, count 0 2006.229.05:02:35.50#ibcon#read 6, iclass 7, count 0 2006.229.05:02:35.50#ibcon#end of sib2, iclass 7, count 0 2006.229.05:02:35.50#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:02:35.50#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:02:35.50#ibcon#[25=USB\r\n] 2006.229.05:02:35.50#ibcon#*before write, iclass 7, count 0 2006.229.05:02:35.50#ibcon#enter sib2, iclass 7, count 0 2006.229.05:02:35.50#ibcon#flushed, iclass 7, count 0 2006.229.05:02:35.50#ibcon#about to write, iclass 7, count 0 2006.229.05:02:35.51#ibcon#wrote, iclass 7, count 0 2006.229.05:02:35.51#ibcon#about to read 3, iclass 7, count 0 2006.229.05:02:35.53#ibcon#read 3, iclass 7, count 0 2006.229.05:02:35.53#ibcon#about to read 4, iclass 7, count 0 2006.229.05:02:35.53#ibcon#read 4, iclass 7, count 0 2006.229.05:02:35.53#ibcon#about to read 5, iclass 7, count 0 2006.229.05:02:35.53#ibcon#read 5, iclass 7, count 0 2006.229.05:02:35.53#ibcon#about to read 6, iclass 7, count 0 2006.229.05:02:35.53#ibcon#read 6, iclass 7, count 0 2006.229.05:02:35.53#ibcon#end of sib2, iclass 7, count 0 2006.229.05:02:35.53#ibcon#*after write, iclass 7, count 0 2006.229.05:02:35.53#ibcon#*before return 0, iclass 7, count 0 2006.229.05:02:35.53#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:35.53#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:35.53#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:02:35.53#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:02:35.54$vck44/valo=2,534.99 2006.229.05:02:35.54#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:02:35.54#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:02:35.54#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:35.54#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:35.54#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:35.54#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:35.54#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:02:35.54#ibcon#first serial, iclass 11, count 0 2006.229.05:02:35.54#ibcon#enter sib2, iclass 11, count 0 2006.229.05:02:35.54#ibcon#flushed, iclass 11, count 0 2006.229.05:02:35.54#ibcon#about to write, iclass 11, count 0 2006.229.05:02:35.54#ibcon#wrote, iclass 11, count 0 2006.229.05:02:35.54#ibcon#about to read 3, iclass 11, count 0 2006.229.05:02:35.55#ibcon#read 3, iclass 11, count 0 2006.229.05:02:35.55#ibcon#about to read 4, iclass 11, count 0 2006.229.05:02:35.55#ibcon#read 4, iclass 11, count 0 2006.229.05:02:35.55#ibcon#about to read 5, iclass 11, count 0 2006.229.05:02:35.55#ibcon#read 5, iclass 11, count 0 2006.229.05:02:35.55#ibcon#about to read 6, iclass 11, count 0 2006.229.05:02:35.55#ibcon#read 6, iclass 11, count 0 2006.229.05:02:35.55#ibcon#end of sib2, iclass 11, count 0 2006.229.05:02:35.55#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:02:35.55#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:02:35.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:02:35.55#ibcon#*before write, iclass 11, count 0 2006.229.05:02:35.55#ibcon#enter sib2, iclass 11, count 0 2006.229.05:02:35.55#ibcon#flushed, iclass 11, count 0 2006.229.05:02:35.56#ibcon#about to write, iclass 11, count 0 2006.229.05:02:35.56#ibcon#wrote, iclass 11, count 0 2006.229.05:02:35.56#ibcon#about to read 3, iclass 11, count 0 2006.229.05:02:35.59#ibcon#read 3, iclass 11, count 0 2006.229.05:02:35.59#ibcon#about to read 4, iclass 11, count 0 2006.229.05:02:35.59#ibcon#read 4, iclass 11, count 0 2006.229.05:02:35.59#ibcon#about to read 5, iclass 11, count 0 2006.229.05:02:35.59#ibcon#read 5, iclass 11, count 0 2006.229.05:02:35.59#ibcon#about to read 6, iclass 11, count 0 2006.229.05:02:35.59#ibcon#read 6, iclass 11, count 0 2006.229.05:02:35.59#ibcon#end of sib2, iclass 11, count 0 2006.229.05:02:35.59#ibcon#*after write, iclass 11, count 0 2006.229.05:02:35.59#ibcon#*before return 0, iclass 11, count 0 2006.229.05:02:35.59#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:35.59#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:35.59#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:02:35.59#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:02:35.60$vck44/va=2,7 2006.229.05:02:35.60#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:02:35.60#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:02:35.60#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:35.60#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:35.64#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:35.64#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:35.64#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:02:35.64#ibcon#first serial, iclass 13, count 2 2006.229.05:02:35.64#ibcon#enter sib2, iclass 13, count 2 2006.229.05:02:35.64#ibcon#flushed, iclass 13, count 2 2006.229.05:02:35.64#ibcon#about to write, iclass 13, count 2 2006.229.05:02:35.64#ibcon#wrote, iclass 13, count 2 2006.229.05:02:35.64#ibcon#about to read 3, iclass 13, count 2 2006.229.05:02:35.66#ibcon#read 3, iclass 13, count 2 2006.229.05:02:35.66#ibcon#about to read 4, iclass 13, count 2 2006.229.05:02:35.66#ibcon#read 4, iclass 13, count 2 2006.229.05:02:35.66#ibcon#about to read 5, iclass 13, count 2 2006.229.05:02:35.66#ibcon#read 5, iclass 13, count 2 2006.229.05:02:35.66#ibcon#about to read 6, iclass 13, count 2 2006.229.05:02:35.66#ibcon#read 6, iclass 13, count 2 2006.229.05:02:35.66#ibcon#end of sib2, iclass 13, count 2 2006.229.05:02:35.66#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:02:35.66#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:02:35.66#ibcon#[25=AT02-07\r\n] 2006.229.05:02:35.66#ibcon#*before write, iclass 13, count 2 2006.229.05:02:35.66#ibcon#enter sib2, iclass 13, count 2 2006.229.05:02:35.66#ibcon#flushed, iclass 13, count 2 2006.229.05:02:35.66#ibcon#about to write, iclass 13, count 2 2006.229.05:02:35.66#ibcon#wrote, iclass 13, count 2 2006.229.05:02:35.67#ibcon#about to read 3, iclass 13, count 2 2006.229.05:02:35.69#ibcon#read 3, iclass 13, count 2 2006.229.05:02:35.69#ibcon#about to read 4, iclass 13, count 2 2006.229.05:02:35.69#ibcon#read 4, iclass 13, count 2 2006.229.05:02:35.69#ibcon#about to read 5, iclass 13, count 2 2006.229.05:02:35.69#ibcon#read 5, iclass 13, count 2 2006.229.05:02:35.69#ibcon#about to read 6, iclass 13, count 2 2006.229.05:02:35.69#ibcon#read 6, iclass 13, count 2 2006.229.05:02:35.69#ibcon#end of sib2, iclass 13, count 2 2006.229.05:02:35.69#ibcon#*after write, iclass 13, count 2 2006.229.05:02:35.69#ibcon#*before return 0, iclass 13, count 2 2006.229.05:02:35.69#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:35.69#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:35.69#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:02:35.69#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:35.69#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:35.81#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:35.81#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:35.81#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:02:35.81#ibcon#first serial, iclass 13, count 0 2006.229.05:02:35.81#ibcon#enter sib2, iclass 13, count 0 2006.229.05:02:35.81#ibcon#flushed, iclass 13, count 0 2006.229.05:02:35.81#ibcon#about to write, iclass 13, count 0 2006.229.05:02:35.81#ibcon#wrote, iclass 13, count 0 2006.229.05:02:35.81#ibcon#about to read 3, iclass 13, count 0 2006.229.05:02:35.83#ibcon#read 3, iclass 13, count 0 2006.229.05:02:35.83#ibcon#about to read 4, iclass 13, count 0 2006.229.05:02:35.83#ibcon#read 4, iclass 13, count 0 2006.229.05:02:35.83#ibcon#about to read 5, iclass 13, count 0 2006.229.05:02:35.83#ibcon#read 5, iclass 13, count 0 2006.229.05:02:35.83#ibcon#about to read 6, iclass 13, count 0 2006.229.05:02:35.83#ibcon#read 6, iclass 13, count 0 2006.229.05:02:35.83#ibcon#end of sib2, iclass 13, count 0 2006.229.05:02:35.83#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:02:35.83#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:02:35.83#ibcon#[25=USB\r\n] 2006.229.05:02:35.83#ibcon#*before write, iclass 13, count 0 2006.229.05:02:35.83#ibcon#enter sib2, iclass 13, count 0 2006.229.05:02:35.83#ibcon#flushed, iclass 13, count 0 2006.229.05:02:35.83#ibcon#about to write, iclass 13, count 0 2006.229.05:02:35.84#ibcon#wrote, iclass 13, count 0 2006.229.05:02:35.84#ibcon#about to read 3, iclass 13, count 0 2006.229.05:02:35.86#ibcon#read 3, iclass 13, count 0 2006.229.05:02:35.86#ibcon#about to read 4, iclass 13, count 0 2006.229.05:02:35.86#ibcon#read 4, iclass 13, count 0 2006.229.05:02:35.86#ibcon#about to read 5, iclass 13, count 0 2006.229.05:02:35.86#ibcon#read 5, iclass 13, count 0 2006.229.05:02:35.86#ibcon#about to read 6, iclass 13, count 0 2006.229.05:02:35.86#ibcon#read 6, iclass 13, count 0 2006.229.05:02:35.86#ibcon#end of sib2, iclass 13, count 0 2006.229.05:02:35.86#ibcon#*after write, iclass 13, count 0 2006.229.05:02:35.86#ibcon#*before return 0, iclass 13, count 0 2006.229.05:02:35.86#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:35.86#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:35.86#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:02:35.86#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:02:35.87$vck44/valo=3,564.99 2006.229.05:02:35.87#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:02:35.87#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:02:35.87#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:35.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:35.87#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:35.87#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:35.87#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:02:35.87#ibcon#first serial, iclass 15, count 0 2006.229.05:02:35.87#ibcon#enter sib2, iclass 15, count 0 2006.229.05:02:35.87#ibcon#flushed, iclass 15, count 0 2006.229.05:02:35.87#ibcon#about to write, iclass 15, count 0 2006.229.05:02:35.87#ibcon#wrote, iclass 15, count 0 2006.229.05:02:35.87#ibcon#about to read 3, iclass 15, count 0 2006.229.05:02:35.88#ibcon#read 3, iclass 15, count 0 2006.229.05:02:35.88#ibcon#about to read 4, iclass 15, count 0 2006.229.05:02:35.88#ibcon#read 4, iclass 15, count 0 2006.229.05:02:35.88#ibcon#about to read 5, iclass 15, count 0 2006.229.05:02:35.88#ibcon#read 5, iclass 15, count 0 2006.229.05:02:35.88#ibcon#about to read 6, iclass 15, count 0 2006.229.05:02:35.88#ibcon#read 6, iclass 15, count 0 2006.229.05:02:35.88#ibcon#end of sib2, iclass 15, count 0 2006.229.05:02:35.88#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:02:35.88#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:02:35.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:02:35.88#ibcon#*before write, iclass 15, count 0 2006.229.05:02:35.88#ibcon#enter sib2, iclass 15, count 0 2006.229.05:02:35.88#ibcon#flushed, iclass 15, count 0 2006.229.05:02:35.88#ibcon#about to write, iclass 15, count 0 2006.229.05:02:35.88#ibcon#wrote, iclass 15, count 0 2006.229.05:02:35.88#ibcon#about to read 3, iclass 15, count 0 2006.229.05:02:35.92#ibcon#read 3, iclass 15, count 0 2006.229.05:02:35.92#ibcon#about to read 4, iclass 15, count 0 2006.229.05:02:35.92#ibcon#read 4, iclass 15, count 0 2006.229.05:02:35.92#ibcon#about to read 5, iclass 15, count 0 2006.229.05:02:35.92#ibcon#read 5, iclass 15, count 0 2006.229.05:02:35.92#ibcon#about to read 6, iclass 15, count 0 2006.229.05:02:35.92#ibcon#read 6, iclass 15, count 0 2006.229.05:02:35.92#ibcon#end of sib2, iclass 15, count 0 2006.229.05:02:35.92#ibcon#*after write, iclass 15, count 0 2006.229.05:02:35.92#ibcon#*before return 0, iclass 15, count 0 2006.229.05:02:35.92#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:35.92#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:35.93#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:02:35.93#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:02:35.93$vck44/va=3,6 2006.229.05:02:35.93#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.05:02:35.93#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.05:02:35.93#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:35.93#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:35.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:35.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:35.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.05:02:35.97#ibcon#first serial, iclass 17, count 2 2006.229.05:02:35.97#ibcon#enter sib2, iclass 17, count 2 2006.229.05:02:35.97#ibcon#flushed, iclass 17, count 2 2006.229.05:02:35.97#ibcon#about to write, iclass 17, count 2 2006.229.05:02:35.97#ibcon#wrote, iclass 17, count 2 2006.229.05:02:35.97#ibcon#about to read 3, iclass 17, count 2 2006.229.05:02:35.99#ibcon#read 3, iclass 17, count 2 2006.229.05:02:35.99#ibcon#about to read 4, iclass 17, count 2 2006.229.05:02:35.99#ibcon#read 4, iclass 17, count 2 2006.229.05:02:35.99#ibcon#about to read 5, iclass 17, count 2 2006.229.05:02:35.99#ibcon#read 5, iclass 17, count 2 2006.229.05:02:35.99#ibcon#about to read 6, iclass 17, count 2 2006.229.05:02:35.99#ibcon#read 6, iclass 17, count 2 2006.229.05:02:35.99#ibcon#end of sib2, iclass 17, count 2 2006.229.05:02:35.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.05:02:35.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.05:02:35.99#ibcon#[25=AT03-06\r\n] 2006.229.05:02:35.99#ibcon#*before write, iclass 17, count 2 2006.229.05:02:35.99#ibcon#enter sib2, iclass 17, count 2 2006.229.05:02:35.99#ibcon#flushed, iclass 17, count 2 2006.229.05:02:35.99#ibcon#about to write, iclass 17, count 2 2006.229.05:02:35.99#ibcon#wrote, iclass 17, count 2 2006.229.05:02:36.00#ibcon#about to read 3, iclass 17, count 2 2006.229.05:02:36.02#ibcon#read 3, iclass 17, count 2 2006.229.05:02:36.02#ibcon#about to read 4, iclass 17, count 2 2006.229.05:02:36.02#ibcon#read 4, iclass 17, count 2 2006.229.05:02:36.02#ibcon#about to read 5, iclass 17, count 2 2006.229.05:02:36.02#ibcon#read 5, iclass 17, count 2 2006.229.05:02:36.02#ibcon#about to read 6, iclass 17, count 2 2006.229.05:02:36.02#ibcon#read 6, iclass 17, count 2 2006.229.05:02:36.02#ibcon#end of sib2, iclass 17, count 2 2006.229.05:02:36.02#ibcon#*after write, iclass 17, count 2 2006.229.05:02:36.02#ibcon#*before return 0, iclass 17, count 2 2006.229.05:02:36.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:36.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:36.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.05:02:36.03#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:36.03#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:36.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:36.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:36.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:02:36.14#ibcon#first serial, iclass 17, count 0 2006.229.05:02:36.14#ibcon#enter sib2, iclass 17, count 0 2006.229.05:02:36.14#ibcon#flushed, iclass 17, count 0 2006.229.05:02:36.14#ibcon#about to write, iclass 17, count 0 2006.229.05:02:36.14#ibcon#wrote, iclass 17, count 0 2006.229.05:02:36.14#ibcon#about to read 3, iclass 17, count 0 2006.229.05:02:36.15#ibcon#read 3, iclass 17, count 0 2006.229.05:02:36.15#ibcon#about to read 4, iclass 17, count 0 2006.229.05:02:36.15#ibcon#read 4, iclass 17, count 0 2006.229.05:02:36.15#ibcon#about to read 5, iclass 17, count 0 2006.229.05:02:36.15#ibcon#read 5, iclass 17, count 0 2006.229.05:02:36.15#ibcon#about to read 6, iclass 17, count 0 2006.229.05:02:36.15#ibcon#read 6, iclass 17, count 0 2006.229.05:02:36.15#ibcon#end of sib2, iclass 17, count 0 2006.229.05:02:36.15#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:02:36.15#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:02:36.15#ibcon#[25=USB\r\n] 2006.229.05:02:36.15#ibcon#*before write, iclass 17, count 0 2006.229.05:02:36.15#ibcon#enter sib2, iclass 17, count 0 2006.229.05:02:36.15#ibcon#flushed, iclass 17, count 0 2006.229.05:02:36.15#ibcon#about to write, iclass 17, count 0 2006.229.05:02:36.15#ibcon#wrote, iclass 17, count 0 2006.229.05:02:36.16#ibcon#about to read 3, iclass 17, count 0 2006.229.05:02:36.18#ibcon#read 3, iclass 17, count 0 2006.229.05:02:36.18#ibcon#about to read 4, iclass 17, count 0 2006.229.05:02:36.18#ibcon#read 4, iclass 17, count 0 2006.229.05:02:36.18#ibcon#about to read 5, iclass 17, count 0 2006.229.05:02:36.18#ibcon#read 5, iclass 17, count 0 2006.229.05:02:36.18#ibcon#about to read 6, iclass 17, count 0 2006.229.05:02:36.18#ibcon#read 6, iclass 17, count 0 2006.229.05:02:36.18#ibcon#end of sib2, iclass 17, count 0 2006.229.05:02:36.18#ibcon#*after write, iclass 17, count 0 2006.229.05:02:36.18#ibcon#*before return 0, iclass 17, count 0 2006.229.05:02:36.18#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:36.18#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:36.18#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:02:36.18#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:02:36.19$vck44/valo=4,624.99 2006.229.05:02:36.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.05:02:36.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.05:02:36.19#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:36.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:36.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:36.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:36.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:02:36.19#ibcon#first serial, iclass 19, count 0 2006.229.05:02:36.19#ibcon#enter sib2, iclass 19, count 0 2006.229.05:02:36.19#ibcon#flushed, iclass 19, count 0 2006.229.05:02:36.19#ibcon#about to write, iclass 19, count 0 2006.229.05:02:36.19#ibcon#wrote, iclass 19, count 0 2006.229.05:02:36.19#ibcon#about to read 3, iclass 19, count 0 2006.229.05:02:36.20#ibcon#read 3, iclass 19, count 0 2006.229.05:02:36.20#ibcon#about to read 4, iclass 19, count 0 2006.229.05:02:36.20#ibcon#read 4, iclass 19, count 0 2006.229.05:02:36.20#ibcon#about to read 5, iclass 19, count 0 2006.229.05:02:36.20#ibcon#read 5, iclass 19, count 0 2006.229.05:02:36.20#ibcon#about to read 6, iclass 19, count 0 2006.229.05:02:36.20#ibcon#read 6, iclass 19, count 0 2006.229.05:02:36.20#ibcon#end of sib2, iclass 19, count 0 2006.229.05:02:36.20#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:02:36.20#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:02:36.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:02:36.20#ibcon#*before write, iclass 19, count 0 2006.229.05:02:36.20#ibcon#enter sib2, iclass 19, count 0 2006.229.05:02:36.20#ibcon#flushed, iclass 19, count 0 2006.229.05:02:36.20#ibcon#about to write, iclass 19, count 0 2006.229.05:02:36.20#ibcon#wrote, iclass 19, count 0 2006.229.05:02:36.20#ibcon#about to read 3, iclass 19, count 0 2006.229.05:02:36.24#ibcon#read 3, iclass 19, count 0 2006.229.05:02:36.24#ibcon#about to read 4, iclass 19, count 0 2006.229.05:02:36.24#ibcon#read 4, iclass 19, count 0 2006.229.05:02:36.24#ibcon#about to read 5, iclass 19, count 0 2006.229.05:02:36.24#ibcon#read 5, iclass 19, count 0 2006.229.05:02:36.24#ibcon#about to read 6, iclass 19, count 0 2006.229.05:02:36.24#ibcon#read 6, iclass 19, count 0 2006.229.05:02:36.24#ibcon#end of sib2, iclass 19, count 0 2006.229.05:02:36.24#ibcon#*after write, iclass 19, count 0 2006.229.05:02:36.24#ibcon#*before return 0, iclass 19, count 0 2006.229.05:02:36.24#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:36.24#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:36.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:02:36.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:02:36.25$vck44/va=4,7 2006.229.05:02:36.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.05:02:36.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.05:02:36.25#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:36.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:36.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:36.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:36.29#ibcon#enter wrdev, iclass 21, count 2 2006.229.05:02:36.29#ibcon#first serial, iclass 21, count 2 2006.229.05:02:36.29#ibcon#enter sib2, iclass 21, count 2 2006.229.05:02:36.29#ibcon#flushed, iclass 21, count 2 2006.229.05:02:36.29#ibcon#about to write, iclass 21, count 2 2006.229.05:02:36.29#ibcon#wrote, iclass 21, count 2 2006.229.05:02:36.29#ibcon#about to read 3, iclass 21, count 2 2006.229.05:02:36.31#ibcon#read 3, iclass 21, count 2 2006.229.05:02:36.31#ibcon#about to read 4, iclass 21, count 2 2006.229.05:02:36.31#ibcon#read 4, iclass 21, count 2 2006.229.05:02:36.31#ibcon#about to read 5, iclass 21, count 2 2006.229.05:02:36.31#ibcon#read 5, iclass 21, count 2 2006.229.05:02:36.31#ibcon#about to read 6, iclass 21, count 2 2006.229.05:02:36.31#ibcon#read 6, iclass 21, count 2 2006.229.05:02:36.31#ibcon#end of sib2, iclass 21, count 2 2006.229.05:02:36.31#ibcon#*mode == 0, iclass 21, count 2 2006.229.05:02:36.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.05:02:36.31#ibcon#[25=AT04-07\r\n] 2006.229.05:02:36.31#ibcon#*before write, iclass 21, count 2 2006.229.05:02:36.31#ibcon#enter sib2, iclass 21, count 2 2006.229.05:02:36.31#ibcon#flushed, iclass 21, count 2 2006.229.05:02:36.31#ibcon#about to write, iclass 21, count 2 2006.229.05:02:36.31#ibcon#wrote, iclass 21, count 2 2006.229.05:02:36.31#ibcon#about to read 3, iclass 21, count 2 2006.229.05:02:36.34#ibcon#read 3, iclass 21, count 2 2006.229.05:02:36.34#ibcon#about to read 4, iclass 21, count 2 2006.229.05:02:36.34#ibcon#read 4, iclass 21, count 2 2006.229.05:02:36.34#ibcon#about to read 5, iclass 21, count 2 2006.229.05:02:36.34#ibcon#read 5, iclass 21, count 2 2006.229.05:02:36.34#ibcon#about to read 6, iclass 21, count 2 2006.229.05:02:36.34#ibcon#read 6, iclass 21, count 2 2006.229.05:02:36.34#ibcon#end of sib2, iclass 21, count 2 2006.229.05:02:36.34#ibcon#*after write, iclass 21, count 2 2006.229.05:02:36.34#ibcon#*before return 0, iclass 21, count 2 2006.229.05:02:36.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:36.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:36.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.05:02:36.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:36.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:36.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:36.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:36.46#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:02:36.46#ibcon#first serial, iclass 21, count 0 2006.229.05:02:36.46#ibcon#enter sib2, iclass 21, count 0 2006.229.05:02:36.46#ibcon#flushed, iclass 21, count 0 2006.229.05:02:36.46#ibcon#about to write, iclass 21, count 0 2006.229.05:02:36.46#ibcon#wrote, iclass 21, count 0 2006.229.05:02:36.46#ibcon#about to read 3, iclass 21, count 0 2006.229.05:02:36.48#ibcon#read 3, iclass 21, count 0 2006.229.05:02:36.48#ibcon#about to read 4, iclass 21, count 0 2006.229.05:02:36.48#ibcon#read 4, iclass 21, count 0 2006.229.05:02:36.48#ibcon#about to read 5, iclass 21, count 0 2006.229.05:02:36.48#ibcon#read 5, iclass 21, count 0 2006.229.05:02:36.48#ibcon#about to read 6, iclass 21, count 0 2006.229.05:02:36.48#ibcon#read 6, iclass 21, count 0 2006.229.05:02:36.48#ibcon#end of sib2, iclass 21, count 0 2006.229.05:02:36.48#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:02:36.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:02:36.48#ibcon#[25=USB\r\n] 2006.229.05:02:36.48#ibcon#*before write, iclass 21, count 0 2006.229.05:02:36.48#ibcon#enter sib2, iclass 21, count 0 2006.229.05:02:36.49#ibcon#flushed, iclass 21, count 0 2006.229.05:02:36.49#ibcon#about to write, iclass 21, count 0 2006.229.05:02:36.49#ibcon#wrote, iclass 21, count 0 2006.229.05:02:36.49#ibcon#about to read 3, iclass 21, count 0 2006.229.05:02:36.51#ibcon#read 3, iclass 21, count 0 2006.229.05:02:36.51#ibcon#about to read 4, iclass 21, count 0 2006.229.05:02:36.51#ibcon#read 4, iclass 21, count 0 2006.229.05:02:36.51#ibcon#about to read 5, iclass 21, count 0 2006.229.05:02:36.51#ibcon#read 5, iclass 21, count 0 2006.229.05:02:36.51#ibcon#about to read 6, iclass 21, count 0 2006.229.05:02:36.51#ibcon#read 6, iclass 21, count 0 2006.229.05:02:36.51#ibcon#end of sib2, iclass 21, count 0 2006.229.05:02:36.51#ibcon#*after write, iclass 21, count 0 2006.229.05:02:36.52#ibcon#*before return 0, iclass 21, count 0 2006.229.05:02:36.52#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:36.52#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:36.52#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:02:36.52#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:02:36.52$vck44/valo=5,734.99 2006.229.05:02:36.52#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:02:36.52#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:02:36.52#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:36.52#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:36.52#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:36.52#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:36.52#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:02:36.52#ibcon#first serial, iclass 23, count 0 2006.229.05:02:36.52#ibcon#enter sib2, iclass 23, count 0 2006.229.05:02:36.52#ibcon#flushed, iclass 23, count 0 2006.229.05:02:36.52#ibcon#about to write, iclass 23, count 0 2006.229.05:02:36.52#ibcon#wrote, iclass 23, count 0 2006.229.05:02:36.52#ibcon#about to read 3, iclass 23, count 0 2006.229.05:02:36.53#ibcon#read 3, iclass 23, count 0 2006.229.05:02:36.53#ibcon#about to read 4, iclass 23, count 0 2006.229.05:02:36.53#ibcon#read 4, iclass 23, count 0 2006.229.05:02:36.53#ibcon#about to read 5, iclass 23, count 0 2006.229.05:02:36.53#ibcon#read 5, iclass 23, count 0 2006.229.05:02:36.53#ibcon#about to read 6, iclass 23, count 0 2006.229.05:02:36.53#ibcon#read 6, iclass 23, count 0 2006.229.05:02:36.53#ibcon#end of sib2, iclass 23, count 0 2006.229.05:02:36.53#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:02:36.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:02:36.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:02:36.54#ibcon#*before write, iclass 23, count 0 2006.229.05:02:36.54#ibcon#enter sib2, iclass 23, count 0 2006.229.05:02:36.54#ibcon#flushed, iclass 23, count 0 2006.229.05:02:36.54#ibcon#about to write, iclass 23, count 0 2006.229.05:02:36.54#ibcon#wrote, iclass 23, count 0 2006.229.05:02:36.54#ibcon#about to read 3, iclass 23, count 0 2006.229.05:02:36.57#ibcon#read 3, iclass 23, count 0 2006.229.05:02:36.57#ibcon#about to read 4, iclass 23, count 0 2006.229.05:02:36.57#ibcon#read 4, iclass 23, count 0 2006.229.05:02:36.57#ibcon#about to read 5, iclass 23, count 0 2006.229.05:02:36.57#ibcon#read 5, iclass 23, count 0 2006.229.05:02:36.57#ibcon#about to read 6, iclass 23, count 0 2006.229.05:02:36.57#ibcon#read 6, iclass 23, count 0 2006.229.05:02:36.57#ibcon#end of sib2, iclass 23, count 0 2006.229.05:02:36.57#ibcon#*after write, iclass 23, count 0 2006.229.05:02:36.57#ibcon#*before return 0, iclass 23, count 0 2006.229.05:02:36.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:36.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:36.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:02:36.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:02:36.58$vck44/va=5,4 2006.229.05:02:36.58#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:02:36.58#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:02:36.58#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:36.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:36.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:36.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:36.63#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:02:36.63#ibcon#first serial, iclass 25, count 2 2006.229.05:02:36.63#ibcon#enter sib2, iclass 25, count 2 2006.229.05:02:36.63#ibcon#flushed, iclass 25, count 2 2006.229.05:02:36.63#ibcon#about to write, iclass 25, count 2 2006.229.05:02:36.63#ibcon#wrote, iclass 25, count 2 2006.229.05:02:36.63#ibcon#about to read 3, iclass 25, count 2 2006.229.05:02:36.65#ibcon#read 3, iclass 25, count 2 2006.229.05:02:36.65#ibcon#about to read 4, iclass 25, count 2 2006.229.05:02:36.65#ibcon#read 4, iclass 25, count 2 2006.229.05:02:36.65#ibcon#about to read 5, iclass 25, count 2 2006.229.05:02:36.65#ibcon#read 5, iclass 25, count 2 2006.229.05:02:36.65#ibcon#about to read 6, iclass 25, count 2 2006.229.05:02:36.65#ibcon#read 6, iclass 25, count 2 2006.229.05:02:36.65#ibcon#end of sib2, iclass 25, count 2 2006.229.05:02:36.65#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:02:36.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:02:36.65#ibcon#[25=AT05-04\r\n] 2006.229.05:02:36.65#ibcon#*before write, iclass 25, count 2 2006.229.05:02:36.65#ibcon#enter sib2, iclass 25, count 2 2006.229.05:02:36.65#ibcon#flushed, iclass 25, count 2 2006.229.05:02:36.65#ibcon#about to write, iclass 25, count 2 2006.229.05:02:36.65#ibcon#wrote, iclass 25, count 2 2006.229.05:02:36.65#ibcon#about to read 3, iclass 25, count 2 2006.229.05:02:36.68#ibcon#read 3, iclass 25, count 2 2006.229.05:02:36.68#ibcon#about to read 4, iclass 25, count 2 2006.229.05:02:36.68#ibcon#read 4, iclass 25, count 2 2006.229.05:02:36.68#ibcon#about to read 5, iclass 25, count 2 2006.229.05:02:36.68#ibcon#read 5, iclass 25, count 2 2006.229.05:02:36.68#ibcon#about to read 6, iclass 25, count 2 2006.229.05:02:36.68#ibcon#read 6, iclass 25, count 2 2006.229.05:02:36.68#ibcon#end of sib2, iclass 25, count 2 2006.229.05:02:36.68#ibcon#*after write, iclass 25, count 2 2006.229.05:02:36.68#ibcon#*before return 0, iclass 25, count 2 2006.229.05:02:36.69#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:36.69#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:36.69#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:02:36.69#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:36.69#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:36.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:36.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:36.80#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:02:36.80#ibcon#first serial, iclass 25, count 0 2006.229.05:02:36.80#ibcon#enter sib2, iclass 25, count 0 2006.229.05:02:36.80#ibcon#flushed, iclass 25, count 0 2006.229.05:02:36.80#ibcon#about to write, iclass 25, count 0 2006.229.05:02:36.80#ibcon#wrote, iclass 25, count 0 2006.229.05:02:36.80#ibcon#about to read 3, iclass 25, count 0 2006.229.05:02:36.82#ibcon#read 3, iclass 25, count 0 2006.229.05:02:36.82#ibcon#about to read 4, iclass 25, count 0 2006.229.05:02:36.82#ibcon#read 4, iclass 25, count 0 2006.229.05:02:36.82#ibcon#about to read 5, iclass 25, count 0 2006.229.05:02:36.82#ibcon#read 5, iclass 25, count 0 2006.229.05:02:36.82#ibcon#about to read 6, iclass 25, count 0 2006.229.05:02:36.82#ibcon#read 6, iclass 25, count 0 2006.229.05:02:36.82#ibcon#end of sib2, iclass 25, count 0 2006.229.05:02:36.82#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:02:36.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:02:36.82#ibcon#[25=USB\r\n] 2006.229.05:02:36.82#ibcon#*before write, iclass 25, count 0 2006.229.05:02:36.82#ibcon#enter sib2, iclass 25, count 0 2006.229.05:02:36.82#ibcon#flushed, iclass 25, count 0 2006.229.05:02:36.82#ibcon#about to write, iclass 25, count 0 2006.229.05:02:36.82#ibcon#wrote, iclass 25, count 0 2006.229.05:02:36.82#ibcon#about to read 3, iclass 25, count 0 2006.229.05:02:36.85#ibcon#read 3, iclass 25, count 0 2006.229.05:02:36.85#ibcon#about to read 4, iclass 25, count 0 2006.229.05:02:36.85#ibcon#read 4, iclass 25, count 0 2006.229.05:02:36.85#ibcon#about to read 5, iclass 25, count 0 2006.229.05:02:36.85#ibcon#read 5, iclass 25, count 0 2006.229.05:02:36.85#ibcon#about to read 6, iclass 25, count 0 2006.229.05:02:36.85#ibcon#read 6, iclass 25, count 0 2006.229.05:02:36.85#ibcon#end of sib2, iclass 25, count 0 2006.229.05:02:36.85#ibcon#*after write, iclass 25, count 0 2006.229.05:02:36.85#ibcon#*before return 0, iclass 25, count 0 2006.229.05:02:36.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:36.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:36.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:02:36.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:02:36.86$vck44/valo=6,814.99 2006.229.05:02:36.86#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:02:36.86#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:02:36.86#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:36.86#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:36.86#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:36.86#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:36.86#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:02:36.86#ibcon#first serial, iclass 27, count 0 2006.229.05:02:36.86#ibcon#enter sib2, iclass 27, count 0 2006.229.05:02:36.86#ibcon#flushed, iclass 27, count 0 2006.229.05:02:36.86#ibcon#about to write, iclass 27, count 0 2006.229.05:02:36.86#ibcon#wrote, iclass 27, count 0 2006.229.05:02:36.86#ibcon#about to read 3, iclass 27, count 0 2006.229.05:02:36.87#ibcon#read 3, iclass 27, count 0 2006.229.05:02:36.87#ibcon#about to read 4, iclass 27, count 0 2006.229.05:02:36.87#ibcon#read 4, iclass 27, count 0 2006.229.05:02:36.87#ibcon#about to read 5, iclass 27, count 0 2006.229.05:02:36.87#ibcon#read 5, iclass 27, count 0 2006.229.05:02:36.87#ibcon#about to read 6, iclass 27, count 0 2006.229.05:02:36.87#ibcon#read 6, iclass 27, count 0 2006.229.05:02:36.87#ibcon#end of sib2, iclass 27, count 0 2006.229.05:02:36.87#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:02:36.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:02:36.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:02:36.87#ibcon#*before write, iclass 27, count 0 2006.229.05:02:36.87#ibcon#enter sib2, iclass 27, count 0 2006.229.05:02:36.87#ibcon#flushed, iclass 27, count 0 2006.229.05:02:36.87#ibcon#about to write, iclass 27, count 0 2006.229.05:02:36.87#ibcon#wrote, iclass 27, count 0 2006.229.05:02:36.87#ibcon#about to read 3, iclass 27, count 0 2006.229.05:02:36.91#ibcon#read 3, iclass 27, count 0 2006.229.05:02:36.91#ibcon#about to read 4, iclass 27, count 0 2006.229.05:02:36.91#ibcon#read 4, iclass 27, count 0 2006.229.05:02:36.91#ibcon#about to read 5, iclass 27, count 0 2006.229.05:02:36.91#ibcon#read 5, iclass 27, count 0 2006.229.05:02:36.91#ibcon#about to read 6, iclass 27, count 0 2006.229.05:02:36.91#ibcon#read 6, iclass 27, count 0 2006.229.05:02:36.91#ibcon#end of sib2, iclass 27, count 0 2006.229.05:02:36.91#ibcon#*after write, iclass 27, count 0 2006.229.05:02:36.91#ibcon#*before return 0, iclass 27, count 0 2006.229.05:02:36.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:36.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:36.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:02:36.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:02:36.92$vck44/va=6,4 2006.229.05:02:36.92#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.05:02:36.92#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.05:02:36.92#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:36.92#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:36.96#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:36.96#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:36.96#ibcon#enter wrdev, iclass 29, count 2 2006.229.05:02:36.96#ibcon#first serial, iclass 29, count 2 2006.229.05:02:36.96#ibcon#enter sib2, iclass 29, count 2 2006.229.05:02:36.96#ibcon#flushed, iclass 29, count 2 2006.229.05:02:36.96#ibcon#about to write, iclass 29, count 2 2006.229.05:02:36.96#ibcon#wrote, iclass 29, count 2 2006.229.05:02:36.96#ibcon#about to read 3, iclass 29, count 2 2006.229.05:02:36.98#ibcon#read 3, iclass 29, count 2 2006.229.05:02:36.98#ibcon#about to read 4, iclass 29, count 2 2006.229.05:02:36.98#ibcon#read 4, iclass 29, count 2 2006.229.05:02:36.98#ibcon#about to read 5, iclass 29, count 2 2006.229.05:02:36.98#ibcon#read 5, iclass 29, count 2 2006.229.05:02:36.98#ibcon#about to read 6, iclass 29, count 2 2006.229.05:02:36.98#ibcon#read 6, iclass 29, count 2 2006.229.05:02:36.98#ibcon#end of sib2, iclass 29, count 2 2006.229.05:02:36.98#ibcon#*mode == 0, iclass 29, count 2 2006.229.05:02:36.98#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.05:02:36.98#ibcon#[25=AT06-04\r\n] 2006.229.05:02:36.98#ibcon#*before write, iclass 29, count 2 2006.229.05:02:36.98#ibcon#enter sib2, iclass 29, count 2 2006.229.05:02:36.98#ibcon#flushed, iclass 29, count 2 2006.229.05:02:36.98#ibcon#about to write, iclass 29, count 2 2006.229.05:02:36.98#ibcon#wrote, iclass 29, count 2 2006.229.05:02:36.98#ibcon#about to read 3, iclass 29, count 2 2006.229.05:02:37.01#ibcon#read 3, iclass 29, count 2 2006.229.05:02:37.01#ibcon#about to read 4, iclass 29, count 2 2006.229.05:02:37.01#ibcon#read 4, iclass 29, count 2 2006.229.05:02:37.01#ibcon#about to read 5, iclass 29, count 2 2006.229.05:02:37.01#ibcon#read 5, iclass 29, count 2 2006.229.05:02:37.01#ibcon#about to read 6, iclass 29, count 2 2006.229.05:02:37.01#ibcon#read 6, iclass 29, count 2 2006.229.05:02:37.01#ibcon#end of sib2, iclass 29, count 2 2006.229.05:02:37.01#ibcon#*after write, iclass 29, count 2 2006.229.05:02:37.01#ibcon#*before return 0, iclass 29, count 2 2006.229.05:02:37.01#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:37.01#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:37.01#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.05:02:37.01#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:37.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:37.12#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:37.12#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:37.12#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:02:37.12#ibcon#first serial, iclass 29, count 0 2006.229.05:02:37.12#ibcon#enter sib2, iclass 29, count 0 2006.229.05:02:37.12#ibcon#flushed, iclass 29, count 0 2006.229.05:02:37.12#ibcon#about to write, iclass 29, count 0 2006.229.05:02:37.12#ibcon#wrote, iclass 29, count 0 2006.229.05:02:37.12#ibcon#about to read 3, iclass 29, count 0 2006.229.05:02:37.14#ibcon#read 3, iclass 29, count 0 2006.229.05:02:37.14#ibcon#about to read 4, iclass 29, count 0 2006.229.05:02:37.14#ibcon#read 4, iclass 29, count 0 2006.229.05:02:37.14#ibcon#about to read 5, iclass 29, count 0 2006.229.05:02:37.14#ibcon#read 5, iclass 29, count 0 2006.229.05:02:37.14#ibcon#about to read 6, iclass 29, count 0 2006.229.05:02:37.14#ibcon#read 6, iclass 29, count 0 2006.229.05:02:37.14#ibcon#end of sib2, iclass 29, count 0 2006.229.05:02:37.14#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:02:37.14#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:02:37.14#ibcon#[25=USB\r\n] 2006.229.05:02:37.14#ibcon#*before write, iclass 29, count 0 2006.229.05:02:37.14#ibcon#enter sib2, iclass 29, count 0 2006.229.05:02:37.14#ibcon#flushed, iclass 29, count 0 2006.229.05:02:37.14#ibcon#about to write, iclass 29, count 0 2006.229.05:02:37.14#ibcon#wrote, iclass 29, count 0 2006.229.05:02:37.15#ibcon#about to read 3, iclass 29, count 0 2006.229.05:02:37.17#ibcon#read 3, iclass 29, count 0 2006.229.05:02:37.17#ibcon#about to read 4, iclass 29, count 0 2006.229.05:02:37.17#ibcon#read 4, iclass 29, count 0 2006.229.05:02:37.17#ibcon#about to read 5, iclass 29, count 0 2006.229.05:02:37.17#ibcon#read 5, iclass 29, count 0 2006.229.05:02:37.17#ibcon#about to read 6, iclass 29, count 0 2006.229.05:02:37.17#ibcon#read 6, iclass 29, count 0 2006.229.05:02:37.17#ibcon#end of sib2, iclass 29, count 0 2006.229.05:02:37.17#ibcon#*after write, iclass 29, count 0 2006.229.05:02:37.17#ibcon#*before return 0, iclass 29, count 0 2006.229.05:02:37.17#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:37.17#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:37.17#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:02:37.18#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:02:37.18$vck44/valo=7,864.99 2006.229.05:02:37.18#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:02:37.18#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:02:37.18#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:37.18#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:37.18#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:37.18#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:37.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:02:37.18#ibcon#first serial, iclass 31, count 0 2006.229.05:02:37.18#ibcon#enter sib2, iclass 31, count 0 2006.229.05:02:37.18#ibcon#flushed, iclass 31, count 0 2006.229.05:02:37.18#ibcon#about to write, iclass 31, count 0 2006.229.05:02:37.18#ibcon#wrote, iclass 31, count 0 2006.229.05:02:37.18#ibcon#about to read 3, iclass 31, count 0 2006.229.05:02:37.19#ibcon#read 3, iclass 31, count 0 2006.229.05:02:37.19#ibcon#about to read 4, iclass 31, count 0 2006.229.05:02:37.19#ibcon#read 4, iclass 31, count 0 2006.229.05:02:37.19#ibcon#about to read 5, iclass 31, count 0 2006.229.05:02:37.19#ibcon#read 5, iclass 31, count 0 2006.229.05:02:37.19#ibcon#about to read 6, iclass 31, count 0 2006.229.05:02:37.19#ibcon#read 6, iclass 31, count 0 2006.229.05:02:37.19#ibcon#end of sib2, iclass 31, count 0 2006.229.05:02:37.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:02:37.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:02:37.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:02:37.19#ibcon#*before write, iclass 31, count 0 2006.229.05:02:37.19#ibcon#enter sib2, iclass 31, count 0 2006.229.05:02:37.19#ibcon#flushed, iclass 31, count 0 2006.229.05:02:37.19#ibcon#about to write, iclass 31, count 0 2006.229.05:02:37.19#ibcon#wrote, iclass 31, count 0 2006.229.05:02:37.19#ibcon#about to read 3, iclass 31, count 0 2006.229.05:02:37.23#ibcon#read 3, iclass 31, count 0 2006.229.05:02:37.23#ibcon#about to read 4, iclass 31, count 0 2006.229.05:02:37.23#ibcon#read 4, iclass 31, count 0 2006.229.05:02:37.23#ibcon#about to read 5, iclass 31, count 0 2006.229.05:02:37.23#ibcon#read 5, iclass 31, count 0 2006.229.05:02:37.23#ibcon#about to read 6, iclass 31, count 0 2006.229.05:02:37.23#ibcon#read 6, iclass 31, count 0 2006.229.05:02:37.23#ibcon#end of sib2, iclass 31, count 0 2006.229.05:02:37.23#ibcon#*after write, iclass 31, count 0 2006.229.05:02:37.23#ibcon#*before return 0, iclass 31, count 0 2006.229.05:02:37.23#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:37.23#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:37.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:02:37.24#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:02:37.24$vck44/va=7,5 2006.229.05:02:37.24#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:02:37.24#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:02:37.24#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:37.24#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:37.28#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:37.28#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:37.28#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:02:37.28#ibcon#first serial, iclass 33, count 2 2006.229.05:02:37.28#ibcon#enter sib2, iclass 33, count 2 2006.229.05:02:37.28#ibcon#flushed, iclass 33, count 2 2006.229.05:02:37.28#ibcon#about to write, iclass 33, count 2 2006.229.05:02:37.28#ibcon#wrote, iclass 33, count 2 2006.229.05:02:37.28#ibcon#about to read 3, iclass 33, count 2 2006.229.05:02:37.30#ibcon#read 3, iclass 33, count 2 2006.229.05:02:37.30#ibcon#about to read 4, iclass 33, count 2 2006.229.05:02:37.30#ibcon#read 4, iclass 33, count 2 2006.229.05:02:37.30#ibcon#about to read 5, iclass 33, count 2 2006.229.05:02:37.30#ibcon#read 5, iclass 33, count 2 2006.229.05:02:37.30#ibcon#about to read 6, iclass 33, count 2 2006.229.05:02:37.30#ibcon#read 6, iclass 33, count 2 2006.229.05:02:37.30#ibcon#end of sib2, iclass 33, count 2 2006.229.05:02:37.30#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:02:37.30#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:02:37.30#ibcon#[25=AT07-05\r\n] 2006.229.05:02:37.30#ibcon#*before write, iclass 33, count 2 2006.229.05:02:37.30#ibcon#enter sib2, iclass 33, count 2 2006.229.05:02:37.30#ibcon#flushed, iclass 33, count 2 2006.229.05:02:37.30#ibcon#about to write, iclass 33, count 2 2006.229.05:02:37.30#ibcon#wrote, iclass 33, count 2 2006.229.05:02:37.30#ibcon#about to read 3, iclass 33, count 2 2006.229.05:02:37.33#ibcon#read 3, iclass 33, count 2 2006.229.05:02:37.33#ibcon#about to read 4, iclass 33, count 2 2006.229.05:02:37.33#ibcon#read 4, iclass 33, count 2 2006.229.05:02:37.33#ibcon#about to read 5, iclass 33, count 2 2006.229.05:02:37.33#ibcon#read 5, iclass 33, count 2 2006.229.05:02:37.33#ibcon#about to read 6, iclass 33, count 2 2006.229.05:02:37.33#ibcon#read 6, iclass 33, count 2 2006.229.05:02:37.33#ibcon#end of sib2, iclass 33, count 2 2006.229.05:02:37.33#ibcon#*after write, iclass 33, count 2 2006.229.05:02:37.33#ibcon#*before return 0, iclass 33, count 2 2006.229.05:02:37.33#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:37.33#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:37.33#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:02:37.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:37.34#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:37.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:37.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:37.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:02:37.44#ibcon#first serial, iclass 33, count 0 2006.229.05:02:37.44#ibcon#enter sib2, iclass 33, count 0 2006.229.05:02:37.44#ibcon#flushed, iclass 33, count 0 2006.229.05:02:37.44#ibcon#about to write, iclass 33, count 0 2006.229.05:02:37.44#ibcon#wrote, iclass 33, count 0 2006.229.05:02:37.44#ibcon#about to read 3, iclass 33, count 0 2006.229.05:02:37.46#ibcon#read 3, iclass 33, count 0 2006.229.05:02:37.46#ibcon#about to read 4, iclass 33, count 0 2006.229.05:02:37.46#ibcon#read 4, iclass 33, count 0 2006.229.05:02:37.46#ibcon#about to read 5, iclass 33, count 0 2006.229.05:02:37.46#ibcon#read 5, iclass 33, count 0 2006.229.05:02:37.46#ibcon#about to read 6, iclass 33, count 0 2006.229.05:02:37.46#ibcon#read 6, iclass 33, count 0 2006.229.05:02:37.46#ibcon#end of sib2, iclass 33, count 0 2006.229.05:02:37.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:02:37.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:02:37.46#ibcon#[25=USB\r\n] 2006.229.05:02:37.46#ibcon#*before write, iclass 33, count 0 2006.229.05:02:37.46#ibcon#enter sib2, iclass 33, count 0 2006.229.05:02:37.47#ibcon#flushed, iclass 33, count 0 2006.229.05:02:37.47#ibcon#about to write, iclass 33, count 0 2006.229.05:02:37.47#ibcon#wrote, iclass 33, count 0 2006.229.05:02:37.47#ibcon#about to read 3, iclass 33, count 0 2006.229.05:02:37.49#ibcon#read 3, iclass 33, count 0 2006.229.05:02:37.49#ibcon#about to read 4, iclass 33, count 0 2006.229.05:02:37.49#ibcon#read 4, iclass 33, count 0 2006.229.05:02:37.49#ibcon#about to read 5, iclass 33, count 0 2006.229.05:02:37.49#ibcon#read 5, iclass 33, count 0 2006.229.05:02:37.49#ibcon#about to read 6, iclass 33, count 0 2006.229.05:02:37.49#ibcon#read 6, iclass 33, count 0 2006.229.05:02:37.49#ibcon#end of sib2, iclass 33, count 0 2006.229.05:02:37.49#ibcon#*after write, iclass 33, count 0 2006.229.05:02:37.49#ibcon#*before return 0, iclass 33, count 0 2006.229.05:02:37.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:37.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:37.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:02:37.50#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:02:37.50$vck44/valo=8,884.99 2006.229.05:02:37.50#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:02:37.50#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:02:37.50#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:37.50#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:37.50#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:37.50#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:37.50#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:02:37.50#ibcon#first serial, iclass 35, count 0 2006.229.05:02:37.50#ibcon#enter sib2, iclass 35, count 0 2006.229.05:02:37.50#ibcon#flushed, iclass 35, count 0 2006.229.05:02:37.50#ibcon#about to write, iclass 35, count 0 2006.229.05:02:37.50#ibcon#wrote, iclass 35, count 0 2006.229.05:02:37.50#ibcon#about to read 3, iclass 35, count 0 2006.229.05:02:37.51#ibcon#read 3, iclass 35, count 0 2006.229.05:02:37.51#ibcon#about to read 4, iclass 35, count 0 2006.229.05:02:37.51#ibcon#read 4, iclass 35, count 0 2006.229.05:02:37.51#ibcon#about to read 5, iclass 35, count 0 2006.229.05:02:37.51#ibcon#read 5, iclass 35, count 0 2006.229.05:02:37.51#ibcon#about to read 6, iclass 35, count 0 2006.229.05:02:37.51#ibcon#read 6, iclass 35, count 0 2006.229.05:02:37.51#ibcon#end of sib2, iclass 35, count 0 2006.229.05:02:37.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:02:37.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:02:37.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:02:37.51#ibcon#*before write, iclass 35, count 0 2006.229.05:02:37.52#ibcon#enter sib2, iclass 35, count 0 2006.229.05:02:37.52#ibcon#flushed, iclass 35, count 0 2006.229.05:02:37.52#ibcon#about to write, iclass 35, count 0 2006.229.05:02:37.52#ibcon#wrote, iclass 35, count 0 2006.229.05:02:37.52#ibcon#about to read 3, iclass 35, count 0 2006.229.05:02:37.55#ibcon#read 3, iclass 35, count 0 2006.229.05:02:37.55#ibcon#about to read 4, iclass 35, count 0 2006.229.05:02:37.55#ibcon#read 4, iclass 35, count 0 2006.229.05:02:37.55#ibcon#about to read 5, iclass 35, count 0 2006.229.05:02:37.55#ibcon#read 5, iclass 35, count 0 2006.229.05:02:37.55#ibcon#about to read 6, iclass 35, count 0 2006.229.05:02:37.55#ibcon#read 6, iclass 35, count 0 2006.229.05:02:37.55#ibcon#end of sib2, iclass 35, count 0 2006.229.05:02:37.55#ibcon#*after write, iclass 35, count 0 2006.229.05:02:37.55#ibcon#*before return 0, iclass 35, count 0 2006.229.05:02:37.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:37.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:37.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:02:37.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:02:37.56$vck44/va=8,6 2006.229.05:02:37.56#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:02:37.56#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:02:37.56#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:37.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:02:37.60#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:02:37.60#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:02:37.60#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:02:37.60#ibcon#first serial, iclass 37, count 2 2006.229.05:02:37.60#ibcon#enter sib2, iclass 37, count 2 2006.229.05:02:37.60#ibcon#flushed, iclass 37, count 2 2006.229.05:02:37.60#ibcon#about to write, iclass 37, count 2 2006.229.05:02:37.60#ibcon#wrote, iclass 37, count 2 2006.229.05:02:37.60#ibcon#about to read 3, iclass 37, count 2 2006.229.05:02:37.62#ibcon#read 3, iclass 37, count 2 2006.229.05:02:37.62#ibcon#about to read 4, iclass 37, count 2 2006.229.05:02:37.62#ibcon#read 4, iclass 37, count 2 2006.229.05:02:37.62#ibcon#about to read 5, iclass 37, count 2 2006.229.05:02:37.62#ibcon#read 5, iclass 37, count 2 2006.229.05:02:37.62#ibcon#about to read 6, iclass 37, count 2 2006.229.05:02:37.62#ibcon#read 6, iclass 37, count 2 2006.229.05:02:37.62#ibcon#end of sib2, iclass 37, count 2 2006.229.05:02:37.62#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:02:37.62#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:02:37.62#ibcon#[25=AT08-06\r\n] 2006.229.05:02:37.62#ibcon#*before write, iclass 37, count 2 2006.229.05:02:37.62#ibcon#enter sib2, iclass 37, count 2 2006.229.05:02:37.62#ibcon#flushed, iclass 37, count 2 2006.229.05:02:37.62#ibcon#about to write, iclass 37, count 2 2006.229.05:02:37.62#ibcon#wrote, iclass 37, count 2 2006.229.05:02:37.63#ibcon#about to read 3, iclass 37, count 2 2006.229.05:02:37.65#ibcon#read 3, iclass 37, count 2 2006.229.05:02:37.65#ibcon#about to read 4, iclass 37, count 2 2006.229.05:02:37.65#ibcon#read 4, iclass 37, count 2 2006.229.05:02:37.65#ibcon#about to read 5, iclass 37, count 2 2006.229.05:02:37.65#ibcon#read 5, iclass 37, count 2 2006.229.05:02:37.65#ibcon#about to read 6, iclass 37, count 2 2006.229.05:02:37.65#ibcon#read 6, iclass 37, count 2 2006.229.05:02:37.65#ibcon#end of sib2, iclass 37, count 2 2006.229.05:02:37.65#ibcon#*after write, iclass 37, count 2 2006.229.05:02:37.65#ibcon#*before return 0, iclass 37, count 2 2006.229.05:02:37.65#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:02:37.65#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:02:37.65#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:02:37.65#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:37.65#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:02:37.77#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:02:37.77#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:02:37.77#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:02:37.77#ibcon#first serial, iclass 37, count 0 2006.229.05:02:37.77#ibcon#enter sib2, iclass 37, count 0 2006.229.05:02:37.77#ibcon#flushed, iclass 37, count 0 2006.229.05:02:37.77#ibcon#about to write, iclass 37, count 0 2006.229.05:02:37.77#ibcon#wrote, iclass 37, count 0 2006.229.05:02:37.77#ibcon#about to read 3, iclass 37, count 0 2006.229.05:02:37.79#ibcon#read 3, iclass 37, count 0 2006.229.05:02:37.79#ibcon#about to read 4, iclass 37, count 0 2006.229.05:02:37.79#ibcon#read 4, iclass 37, count 0 2006.229.05:02:37.79#ibcon#about to read 5, iclass 37, count 0 2006.229.05:02:37.79#ibcon#read 5, iclass 37, count 0 2006.229.05:02:37.79#ibcon#about to read 6, iclass 37, count 0 2006.229.05:02:37.79#ibcon#read 6, iclass 37, count 0 2006.229.05:02:37.79#ibcon#end of sib2, iclass 37, count 0 2006.229.05:02:37.79#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:02:37.79#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:02:37.79#ibcon#[25=USB\r\n] 2006.229.05:02:37.79#ibcon#*before write, iclass 37, count 0 2006.229.05:02:37.79#ibcon#enter sib2, iclass 37, count 0 2006.229.05:02:37.79#ibcon#flushed, iclass 37, count 0 2006.229.05:02:37.79#ibcon#about to write, iclass 37, count 0 2006.229.05:02:37.80#ibcon#wrote, iclass 37, count 0 2006.229.05:02:37.80#ibcon#about to read 3, iclass 37, count 0 2006.229.05:02:37.82#ibcon#read 3, iclass 37, count 0 2006.229.05:02:37.82#ibcon#about to read 4, iclass 37, count 0 2006.229.05:02:37.82#ibcon#read 4, iclass 37, count 0 2006.229.05:02:37.82#ibcon#about to read 5, iclass 37, count 0 2006.229.05:02:37.82#ibcon#read 5, iclass 37, count 0 2006.229.05:02:37.82#ibcon#about to read 6, iclass 37, count 0 2006.229.05:02:37.82#ibcon#read 6, iclass 37, count 0 2006.229.05:02:37.82#ibcon#end of sib2, iclass 37, count 0 2006.229.05:02:37.82#ibcon#*after write, iclass 37, count 0 2006.229.05:02:37.82#ibcon#*before return 0, iclass 37, count 0 2006.229.05:02:37.82#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:02:37.82#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:02:37.82#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:02:37.82#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:02:37.83$vck44/vblo=1,629.99 2006.229.05:02:37.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:02:37.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:02:37.83#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:37.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:02:37.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:02:37.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:02:37.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:02:37.83#ibcon#first serial, iclass 39, count 0 2006.229.05:02:37.83#ibcon#enter sib2, iclass 39, count 0 2006.229.05:02:37.83#ibcon#flushed, iclass 39, count 0 2006.229.05:02:37.83#ibcon#about to write, iclass 39, count 0 2006.229.05:02:37.83#ibcon#wrote, iclass 39, count 0 2006.229.05:02:37.83#ibcon#about to read 3, iclass 39, count 0 2006.229.05:02:37.84#ibcon#read 3, iclass 39, count 0 2006.229.05:02:37.84#ibcon#about to read 4, iclass 39, count 0 2006.229.05:02:37.84#ibcon#read 4, iclass 39, count 0 2006.229.05:02:37.84#ibcon#about to read 5, iclass 39, count 0 2006.229.05:02:37.84#ibcon#read 5, iclass 39, count 0 2006.229.05:02:37.84#ibcon#about to read 6, iclass 39, count 0 2006.229.05:02:37.84#ibcon#read 6, iclass 39, count 0 2006.229.05:02:37.84#ibcon#end of sib2, iclass 39, count 0 2006.229.05:02:37.84#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:02:37.84#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:02:37.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:02:37.84#ibcon#*before write, iclass 39, count 0 2006.229.05:02:37.84#ibcon#enter sib2, iclass 39, count 0 2006.229.05:02:37.84#ibcon#flushed, iclass 39, count 0 2006.229.05:02:37.84#ibcon#about to write, iclass 39, count 0 2006.229.05:02:37.85#ibcon#wrote, iclass 39, count 0 2006.229.05:02:37.85#ibcon#about to read 3, iclass 39, count 0 2006.229.05:02:37.88#ibcon#read 3, iclass 39, count 0 2006.229.05:02:37.88#ibcon#about to read 4, iclass 39, count 0 2006.229.05:02:37.88#ibcon#read 4, iclass 39, count 0 2006.229.05:02:37.88#ibcon#about to read 5, iclass 39, count 0 2006.229.05:02:37.88#ibcon#read 5, iclass 39, count 0 2006.229.05:02:37.88#ibcon#about to read 6, iclass 39, count 0 2006.229.05:02:37.88#ibcon#read 6, iclass 39, count 0 2006.229.05:02:37.88#ibcon#end of sib2, iclass 39, count 0 2006.229.05:02:37.88#ibcon#*after write, iclass 39, count 0 2006.229.05:02:37.88#ibcon#*before return 0, iclass 39, count 0 2006.229.05:02:37.88#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:02:37.88#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:02:37.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:02:37.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:02:37.89$vck44/vb=1,4 2006.229.05:02:37.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:02:37.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:02:37.89#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:37.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:02:37.89#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:02:37.89#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:02:37.89#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:02:37.89#ibcon#first serial, iclass 3, count 2 2006.229.05:02:37.89#ibcon#enter sib2, iclass 3, count 2 2006.229.05:02:37.89#ibcon#flushed, iclass 3, count 2 2006.229.05:02:37.89#ibcon#about to write, iclass 3, count 2 2006.229.05:02:37.89#ibcon#wrote, iclass 3, count 2 2006.229.05:02:37.89#ibcon#about to read 3, iclass 3, count 2 2006.229.05:02:37.90#ibcon#read 3, iclass 3, count 2 2006.229.05:02:37.90#ibcon#about to read 4, iclass 3, count 2 2006.229.05:02:37.90#ibcon#read 4, iclass 3, count 2 2006.229.05:02:37.90#ibcon#about to read 5, iclass 3, count 2 2006.229.05:02:37.90#ibcon#read 5, iclass 3, count 2 2006.229.05:02:37.90#ibcon#about to read 6, iclass 3, count 2 2006.229.05:02:37.90#ibcon#read 6, iclass 3, count 2 2006.229.05:02:37.90#ibcon#end of sib2, iclass 3, count 2 2006.229.05:02:37.90#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:02:37.90#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:02:37.90#ibcon#[27=AT01-04\r\n] 2006.229.05:02:37.90#ibcon#*before write, iclass 3, count 2 2006.229.05:02:37.90#ibcon#enter sib2, iclass 3, count 2 2006.229.05:02:37.90#ibcon#flushed, iclass 3, count 2 2006.229.05:02:37.90#ibcon#about to write, iclass 3, count 2 2006.229.05:02:37.90#ibcon#wrote, iclass 3, count 2 2006.229.05:02:37.91#ibcon#about to read 3, iclass 3, count 2 2006.229.05:02:37.93#ibcon#read 3, iclass 3, count 2 2006.229.05:02:37.93#ibcon#about to read 4, iclass 3, count 2 2006.229.05:02:37.93#ibcon#read 4, iclass 3, count 2 2006.229.05:02:37.93#ibcon#about to read 5, iclass 3, count 2 2006.229.05:02:37.93#ibcon#read 5, iclass 3, count 2 2006.229.05:02:37.93#ibcon#about to read 6, iclass 3, count 2 2006.229.05:02:37.93#ibcon#read 6, iclass 3, count 2 2006.229.05:02:37.93#ibcon#end of sib2, iclass 3, count 2 2006.229.05:02:37.93#ibcon#*after write, iclass 3, count 2 2006.229.05:02:37.93#ibcon#*before return 0, iclass 3, count 2 2006.229.05:02:37.93#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:02:37.93#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:02:37.93#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:02:37.93#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:37.93#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:02:38.05#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:02:38.05#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:02:38.05#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:02:38.05#ibcon#first serial, iclass 3, count 0 2006.229.05:02:38.05#ibcon#enter sib2, iclass 3, count 0 2006.229.05:02:38.05#ibcon#flushed, iclass 3, count 0 2006.229.05:02:38.05#ibcon#about to write, iclass 3, count 0 2006.229.05:02:38.05#ibcon#wrote, iclass 3, count 0 2006.229.05:02:38.05#ibcon#about to read 3, iclass 3, count 0 2006.229.05:02:38.07#ibcon#read 3, iclass 3, count 0 2006.229.05:02:38.07#ibcon#about to read 4, iclass 3, count 0 2006.229.05:02:38.07#ibcon#read 4, iclass 3, count 0 2006.229.05:02:38.07#ibcon#about to read 5, iclass 3, count 0 2006.229.05:02:38.07#ibcon#read 5, iclass 3, count 0 2006.229.05:02:38.07#ibcon#about to read 6, iclass 3, count 0 2006.229.05:02:38.07#ibcon#read 6, iclass 3, count 0 2006.229.05:02:38.07#ibcon#end of sib2, iclass 3, count 0 2006.229.05:02:38.07#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:02:38.07#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:02:38.07#ibcon#[27=USB\r\n] 2006.229.05:02:38.07#ibcon#*before write, iclass 3, count 0 2006.229.05:02:38.07#ibcon#enter sib2, iclass 3, count 0 2006.229.05:02:38.07#ibcon#flushed, iclass 3, count 0 2006.229.05:02:38.07#ibcon#about to write, iclass 3, count 0 2006.229.05:02:38.07#ibcon#wrote, iclass 3, count 0 2006.229.05:02:38.07#ibcon#about to read 3, iclass 3, count 0 2006.229.05:02:38.10#ibcon#read 3, iclass 3, count 0 2006.229.05:02:38.10#ibcon#about to read 4, iclass 3, count 0 2006.229.05:02:38.10#ibcon#read 4, iclass 3, count 0 2006.229.05:02:38.10#ibcon#about to read 5, iclass 3, count 0 2006.229.05:02:38.10#ibcon#read 5, iclass 3, count 0 2006.229.05:02:38.10#ibcon#about to read 6, iclass 3, count 0 2006.229.05:02:38.10#ibcon#read 6, iclass 3, count 0 2006.229.05:02:38.10#ibcon#end of sib2, iclass 3, count 0 2006.229.05:02:38.10#ibcon#*after write, iclass 3, count 0 2006.229.05:02:38.10#ibcon#*before return 0, iclass 3, count 0 2006.229.05:02:38.10#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:02:38.10#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:02:38.10#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:02:38.11#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:02:38.11$vck44/vblo=2,634.99 2006.229.05:02:38.11#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:02:38.11#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:02:38.11#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:38.11#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:38.11#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:38.11#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:38.11#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:02:38.11#ibcon#first serial, iclass 5, count 0 2006.229.05:02:38.11#ibcon#enter sib2, iclass 5, count 0 2006.229.05:02:38.11#ibcon#flushed, iclass 5, count 0 2006.229.05:02:38.11#ibcon#about to write, iclass 5, count 0 2006.229.05:02:38.11#ibcon#wrote, iclass 5, count 0 2006.229.05:02:38.11#ibcon#about to read 3, iclass 5, count 0 2006.229.05:02:38.12#ibcon#read 3, iclass 5, count 0 2006.229.05:02:38.12#ibcon#about to read 4, iclass 5, count 0 2006.229.05:02:38.12#ibcon#read 4, iclass 5, count 0 2006.229.05:02:38.12#ibcon#about to read 5, iclass 5, count 0 2006.229.05:02:38.12#ibcon#read 5, iclass 5, count 0 2006.229.05:02:38.12#ibcon#about to read 6, iclass 5, count 0 2006.229.05:02:38.12#ibcon#read 6, iclass 5, count 0 2006.229.05:02:38.12#ibcon#end of sib2, iclass 5, count 0 2006.229.05:02:38.12#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:02:38.12#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:02:38.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:02:38.12#ibcon#*before write, iclass 5, count 0 2006.229.05:02:38.12#ibcon#enter sib2, iclass 5, count 0 2006.229.05:02:38.12#ibcon#flushed, iclass 5, count 0 2006.229.05:02:38.12#ibcon#about to write, iclass 5, count 0 2006.229.05:02:38.13#ibcon#wrote, iclass 5, count 0 2006.229.05:02:38.13#ibcon#about to read 3, iclass 5, count 0 2006.229.05:02:38.16#ibcon#read 3, iclass 5, count 0 2006.229.05:02:38.16#ibcon#about to read 4, iclass 5, count 0 2006.229.05:02:38.16#ibcon#read 4, iclass 5, count 0 2006.229.05:02:38.16#ibcon#about to read 5, iclass 5, count 0 2006.229.05:02:38.16#ibcon#read 5, iclass 5, count 0 2006.229.05:02:38.16#ibcon#about to read 6, iclass 5, count 0 2006.229.05:02:38.16#ibcon#read 6, iclass 5, count 0 2006.229.05:02:38.16#ibcon#end of sib2, iclass 5, count 0 2006.229.05:02:38.16#ibcon#*after write, iclass 5, count 0 2006.229.05:02:38.16#ibcon#*before return 0, iclass 5, count 0 2006.229.05:02:38.16#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:38.16#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:02:38.16#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:02:38.16#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:02:38.17$vck44/vb=2,4 2006.229.05:02:38.17#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:02:38.17#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:02:38.17#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:38.17#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:38.21#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:38.21#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:38.21#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:02:38.21#ibcon#first serial, iclass 7, count 2 2006.229.05:02:38.21#ibcon#enter sib2, iclass 7, count 2 2006.229.05:02:38.21#ibcon#flushed, iclass 7, count 2 2006.229.05:02:38.21#ibcon#about to write, iclass 7, count 2 2006.229.05:02:38.21#ibcon#wrote, iclass 7, count 2 2006.229.05:02:38.21#ibcon#about to read 3, iclass 7, count 2 2006.229.05:02:38.23#ibcon#read 3, iclass 7, count 2 2006.229.05:02:38.23#ibcon#about to read 4, iclass 7, count 2 2006.229.05:02:38.23#ibcon#read 4, iclass 7, count 2 2006.229.05:02:38.23#ibcon#about to read 5, iclass 7, count 2 2006.229.05:02:38.23#ibcon#read 5, iclass 7, count 2 2006.229.05:02:38.23#ibcon#about to read 6, iclass 7, count 2 2006.229.05:02:38.23#ibcon#read 6, iclass 7, count 2 2006.229.05:02:38.23#ibcon#end of sib2, iclass 7, count 2 2006.229.05:02:38.23#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:02:38.23#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:02:38.23#ibcon#[27=AT02-04\r\n] 2006.229.05:02:38.23#ibcon#*before write, iclass 7, count 2 2006.229.05:02:38.23#ibcon#enter sib2, iclass 7, count 2 2006.229.05:02:38.23#ibcon#flushed, iclass 7, count 2 2006.229.05:02:38.23#ibcon#about to write, iclass 7, count 2 2006.229.05:02:38.23#ibcon#wrote, iclass 7, count 2 2006.229.05:02:38.24#ibcon#about to read 3, iclass 7, count 2 2006.229.05:02:38.26#ibcon#read 3, iclass 7, count 2 2006.229.05:02:38.26#ibcon#about to read 4, iclass 7, count 2 2006.229.05:02:38.26#ibcon#read 4, iclass 7, count 2 2006.229.05:02:38.26#ibcon#about to read 5, iclass 7, count 2 2006.229.05:02:38.26#ibcon#read 5, iclass 7, count 2 2006.229.05:02:38.26#ibcon#about to read 6, iclass 7, count 2 2006.229.05:02:38.26#ibcon#read 6, iclass 7, count 2 2006.229.05:02:38.26#ibcon#end of sib2, iclass 7, count 2 2006.229.05:02:38.26#ibcon#*after write, iclass 7, count 2 2006.229.05:02:38.26#ibcon#*before return 0, iclass 7, count 2 2006.229.05:02:38.26#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:38.26#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:02:38.26#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:02:38.26#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:38.26#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:38.38#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:38.38#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:38.38#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:02:38.38#ibcon#first serial, iclass 7, count 0 2006.229.05:02:38.38#ibcon#enter sib2, iclass 7, count 0 2006.229.05:02:38.38#ibcon#flushed, iclass 7, count 0 2006.229.05:02:38.38#ibcon#about to write, iclass 7, count 0 2006.229.05:02:38.38#ibcon#wrote, iclass 7, count 0 2006.229.05:02:38.38#ibcon#about to read 3, iclass 7, count 0 2006.229.05:02:38.40#ibcon#read 3, iclass 7, count 0 2006.229.05:02:38.40#ibcon#about to read 4, iclass 7, count 0 2006.229.05:02:38.40#ibcon#read 4, iclass 7, count 0 2006.229.05:02:38.40#ibcon#about to read 5, iclass 7, count 0 2006.229.05:02:38.40#ibcon#read 5, iclass 7, count 0 2006.229.05:02:38.40#ibcon#about to read 6, iclass 7, count 0 2006.229.05:02:38.40#ibcon#read 6, iclass 7, count 0 2006.229.05:02:38.40#ibcon#end of sib2, iclass 7, count 0 2006.229.05:02:38.40#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:02:38.40#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:02:38.40#ibcon#[27=USB\r\n] 2006.229.05:02:38.40#ibcon#*before write, iclass 7, count 0 2006.229.05:02:38.40#ibcon#enter sib2, iclass 7, count 0 2006.229.05:02:38.40#ibcon#flushed, iclass 7, count 0 2006.229.05:02:38.40#ibcon#about to write, iclass 7, count 0 2006.229.05:02:38.40#ibcon#wrote, iclass 7, count 0 2006.229.05:02:38.40#ibcon#about to read 3, iclass 7, count 0 2006.229.05:02:38.43#ibcon#read 3, iclass 7, count 0 2006.229.05:02:38.43#ibcon#about to read 4, iclass 7, count 0 2006.229.05:02:38.43#ibcon#read 4, iclass 7, count 0 2006.229.05:02:38.43#ibcon#about to read 5, iclass 7, count 0 2006.229.05:02:38.43#ibcon#read 5, iclass 7, count 0 2006.229.05:02:38.43#ibcon#about to read 6, iclass 7, count 0 2006.229.05:02:38.43#ibcon#read 6, iclass 7, count 0 2006.229.05:02:38.43#ibcon#end of sib2, iclass 7, count 0 2006.229.05:02:38.43#ibcon#*after write, iclass 7, count 0 2006.229.05:02:38.43#ibcon#*before return 0, iclass 7, count 0 2006.229.05:02:38.43#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:38.43#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:02:38.43#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:02:38.44#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:02:38.44$vck44/vblo=3,649.99 2006.229.05:02:38.44#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:02:38.44#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:02:38.44#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:38.44#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:38.44#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:38.44#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:38.44#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:02:38.44#ibcon#first serial, iclass 11, count 0 2006.229.05:02:38.44#ibcon#enter sib2, iclass 11, count 0 2006.229.05:02:38.44#ibcon#flushed, iclass 11, count 0 2006.229.05:02:38.44#ibcon#about to write, iclass 11, count 0 2006.229.05:02:38.44#ibcon#wrote, iclass 11, count 0 2006.229.05:02:38.44#ibcon#about to read 3, iclass 11, count 0 2006.229.05:02:38.45#ibcon#read 3, iclass 11, count 0 2006.229.05:02:38.45#ibcon#about to read 4, iclass 11, count 0 2006.229.05:02:38.45#ibcon#read 4, iclass 11, count 0 2006.229.05:02:38.45#ibcon#about to read 5, iclass 11, count 0 2006.229.05:02:38.45#ibcon#read 5, iclass 11, count 0 2006.229.05:02:38.45#ibcon#about to read 6, iclass 11, count 0 2006.229.05:02:38.45#ibcon#read 6, iclass 11, count 0 2006.229.05:02:38.45#ibcon#end of sib2, iclass 11, count 0 2006.229.05:02:38.45#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:02:38.45#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:02:38.45#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:02:38.46#ibcon#*before write, iclass 11, count 0 2006.229.05:02:38.46#ibcon#enter sib2, iclass 11, count 0 2006.229.05:02:38.46#ibcon#flushed, iclass 11, count 0 2006.229.05:02:38.46#ibcon#about to write, iclass 11, count 0 2006.229.05:02:38.46#ibcon#wrote, iclass 11, count 0 2006.229.05:02:38.46#ibcon#about to read 3, iclass 11, count 0 2006.229.05:02:38.49#ibcon#read 3, iclass 11, count 0 2006.229.05:02:38.49#ibcon#about to read 4, iclass 11, count 0 2006.229.05:02:38.49#ibcon#read 4, iclass 11, count 0 2006.229.05:02:38.49#ibcon#about to read 5, iclass 11, count 0 2006.229.05:02:38.49#ibcon#read 5, iclass 11, count 0 2006.229.05:02:38.49#ibcon#about to read 6, iclass 11, count 0 2006.229.05:02:38.49#ibcon#read 6, iclass 11, count 0 2006.229.05:02:38.49#ibcon#end of sib2, iclass 11, count 0 2006.229.05:02:38.49#ibcon#*after write, iclass 11, count 0 2006.229.05:02:38.49#ibcon#*before return 0, iclass 11, count 0 2006.229.05:02:38.50#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:38.50#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:02:38.50#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:02:38.50#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:02:38.50$vck44/vb=3,4 2006.229.05:02:38.50#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:02:38.50#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:02:38.50#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:38.50#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:38.54#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:38.54#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:38.54#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:02:38.54#ibcon#first serial, iclass 13, count 2 2006.229.05:02:38.54#ibcon#enter sib2, iclass 13, count 2 2006.229.05:02:38.54#ibcon#flushed, iclass 13, count 2 2006.229.05:02:38.54#ibcon#about to write, iclass 13, count 2 2006.229.05:02:38.54#ibcon#wrote, iclass 13, count 2 2006.229.05:02:38.54#ibcon#about to read 3, iclass 13, count 2 2006.229.05:02:38.56#ibcon#read 3, iclass 13, count 2 2006.229.05:02:38.56#ibcon#about to read 4, iclass 13, count 2 2006.229.05:02:38.56#ibcon#read 4, iclass 13, count 2 2006.229.05:02:38.56#ibcon#about to read 5, iclass 13, count 2 2006.229.05:02:38.56#ibcon#read 5, iclass 13, count 2 2006.229.05:02:38.56#ibcon#about to read 6, iclass 13, count 2 2006.229.05:02:38.56#ibcon#read 6, iclass 13, count 2 2006.229.05:02:38.56#ibcon#end of sib2, iclass 13, count 2 2006.229.05:02:38.56#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:02:38.56#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:02:38.56#ibcon#[27=AT03-04\r\n] 2006.229.05:02:38.56#ibcon#*before write, iclass 13, count 2 2006.229.05:02:38.56#ibcon#enter sib2, iclass 13, count 2 2006.229.05:02:38.56#ibcon#flushed, iclass 13, count 2 2006.229.05:02:38.57#ibcon#about to write, iclass 13, count 2 2006.229.05:02:38.57#ibcon#wrote, iclass 13, count 2 2006.229.05:02:38.57#ibcon#about to read 3, iclass 13, count 2 2006.229.05:02:38.59#ibcon#read 3, iclass 13, count 2 2006.229.05:02:38.59#ibcon#about to read 4, iclass 13, count 2 2006.229.05:02:38.59#ibcon#read 4, iclass 13, count 2 2006.229.05:02:38.59#ibcon#about to read 5, iclass 13, count 2 2006.229.05:02:38.59#ibcon#read 5, iclass 13, count 2 2006.229.05:02:38.59#ibcon#about to read 6, iclass 13, count 2 2006.229.05:02:38.59#ibcon#read 6, iclass 13, count 2 2006.229.05:02:38.59#ibcon#end of sib2, iclass 13, count 2 2006.229.05:02:38.59#ibcon#*after write, iclass 13, count 2 2006.229.05:02:38.59#ibcon#*before return 0, iclass 13, count 2 2006.229.05:02:38.59#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:38.59#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:02:38.59#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:02:38.59#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:38.60#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:38.71#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:38.71#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:38.71#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:02:38.71#ibcon#first serial, iclass 13, count 0 2006.229.05:02:38.71#ibcon#enter sib2, iclass 13, count 0 2006.229.05:02:38.71#ibcon#flushed, iclass 13, count 0 2006.229.05:02:38.71#ibcon#about to write, iclass 13, count 0 2006.229.05:02:38.71#ibcon#wrote, iclass 13, count 0 2006.229.05:02:38.71#ibcon#about to read 3, iclass 13, count 0 2006.229.05:02:38.73#ibcon#read 3, iclass 13, count 0 2006.229.05:02:38.73#ibcon#about to read 4, iclass 13, count 0 2006.229.05:02:38.73#ibcon#read 4, iclass 13, count 0 2006.229.05:02:38.73#ibcon#about to read 5, iclass 13, count 0 2006.229.05:02:38.73#ibcon#read 5, iclass 13, count 0 2006.229.05:02:38.73#ibcon#about to read 6, iclass 13, count 0 2006.229.05:02:38.73#ibcon#read 6, iclass 13, count 0 2006.229.05:02:38.73#ibcon#end of sib2, iclass 13, count 0 2006.229.05:02:38.73#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:02:38.73#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:02:38.73#ibcon#[27=USB\r\n] 2006.229.05:02:38.73#ibcon#*before write, iclass 13, count 0 2006.229.05:02:38.73#ibcon#enter sib2, iclass 13, count 0 2006.229.05:02:38.73#ibcon#flushed, iclass 13, count 0 2006.229.05:02:38.73#ibcon#about to write, iclass 13, count 0 2006.229.05:02:38.74#ibcon#wrote, iclass 13, count 0 2006.229.05:02:38.74#ibcon#about to read 3, iclass 13, count 0 2006.229.05:02:38.76#ibcon#read 3, iclass 13, count 0 2006.229.05:02:38.76#ibcon#about to read 4, iclass 13, count 0 2006.229.05:02:38.76#ibcon#read 4, iclass 13, count 0 2006.229.05:02:38.76#ibcon#about to read 5, iclass 13, count 0 2006.229.05:02:38.76#ibcon#read 5, iclass 13, count 0 2006.229.05:02:38.76#ibcon#about to read 6, iclass 13, count 0 2006.229.05:02:38.76#ibcon#read 6, iclass 13, count 0 2006.229.05:02:38.76#ibcon#end of sib2, iclass 13, count 0 2006.229.05:02:38.76#ibcon#*after write, iclass 13, count 0 2006.229.05:02:38.76#ibcon#*before return 0, iclass 13, count 0 2006.229.05:02:38.76#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:38.76#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:02:38.76#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:02:38.76#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:02:38.77$vck44/vblo=4,679.99 2006.229.05:02:38.77#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:02:38.77#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:02:38.77#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:38.77#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:38.77#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:38.77#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:38.77#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:02:38.77#ibcon#first serial, iclass 15, count 0 2006.229.05:02:38.77#ibcon#enter sib2, iclass 15, count 0 2006.229.05:02:38.77#ibcon#flushed, iclass 15, count 0 2006.229.05:02:38.77#ibcon#about to write, iclass 15, count 0 2006.229.05:02:38.77#ibcon#wrote, iclass 15, count 0 2006.229.05:02:38.77#ibcon#about to read 3, iclass 15, count 0 2006.229.05:02:38.78#ibcon#read 3, iclass 15, count 0 2006.229.05:02:38.78#ibcon#about to read 4, iclass 15, count 0 2006.229.05:02:38.78#ibcon#read 4, iclass 15, count 0 2006.229.05:02:38.78#ibcon#about to read 5, iclass 15, count 0 2006.229.05:02:38.78#ibcon#read 5, iclass 15, count 0 2006.229.05:02:38.78#ibcon#about to read 6, iclass 15, count 0 2006.229.05:02:38.78#ibcon#read 6, iclass 15, count 0 2006.229.05:02:38.78#ibcon#end of sib2, iclass 15, count 0 2006.229.05:02:38.78#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:02:38.78#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:02:38.78#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:02:38.78#ibcon#*before write, iclass 15, count 0 2006.229.05:02:38.78#ibcon#enter sib2, iclass 15, count 0 2006.229.05:02:38.78#ibcon#flushed, iclass 15, count 0 2006.229.05:02:38.78#ibcon#about to write, iclass 15, count 0 2006.229.05:02:38.79#ibcon#wrote, iclass 15, count 0 2006.229.05:02:38.79#ibcon#about to read 3, iclass 15, count 0 2006.229.05:02:38.82#ibcon#read 3, iclass 15, count 0 2006.229.05:02:38.82#ibcon#about to read 4, iclass 15, count 0 2006.229.05:02:38.82#ibcon#read 4, iclass 15, count 0 2006.229.05:02:38.82#ibcon#about to read 5, iclass 15, count 0 2006.229.05:02:38.82#ibcon#read 5, iclass 15, count 0 2006.229.05:02:38.82#ibcon#about to read 6, iclass 15, count 0 2006.229.05:02:38.82#ibcon#read 6, iclass 15, count 0 2006.229.05:02:38.82#ibcon#end of sib2, iclass 15, count 0 2006.229.05:02:38.82#ibcon#*after write, iclass 15, count 0 2006.229.05:02:38.82#ibcon#*before return 0, iclass 15, count 0 2006.229.05:02:38.82#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:38.82#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:02:38.82#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:02:38.82#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:02:38.83$vck44/vb=4,4 2006.229.05:02:38.83#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.05:02:38.83#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.05:02:38.83#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:38.83#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:38.87#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:38.87#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:38.87#ibcon#enter wrdev, iclass 17, count 2 2006.229.05:02:38.87#ibcon#first serial, iclass 17, count 2 2006.229.05:02:38.87#ibcon#enter sib2, iclass 17, count 2 2006.229.05:02:38.87#ibcon#flushed, iclass 17, count 2 2006.229.05:02:38.87#ibcon#about to write, iclass 17, count 2 2006.229.05:02:38.87#ibcon#wrote, iclass 17, count 2 2006.229.05:02:38.87#ibcon#about to read 3, iclass 17, count 2 2006.229.05:02:38.89#ibcon#read 3, iclass 17, count 2 2006.229.05:02:38.89#ibcon#about to read 4, iclass 17, count 2 2006.229.05:02:38.89#ibcon#read 4, iclass 17, count 2 2006.229.05:02:38.89#ibcon#about to read 5, iclass 17, count 2 2006.229.05:02:38.89#ibcon#read 5, iclass 17, count 2 2006.229.05:02:38.89#ibcon#about to read 6, iclass 17, count 2 2006.229.05:02:38.89#ibcon#read 6, iclass 17, count 2 2006.229.05:02:38.89#ibcon#end of sib2, iclass 17, count 2 2006.229.05:02:38.89#ibcon#*mode == 0, iclass 17, count 2 2006.229.05:02:38.89#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.05:02:38.89#ibcon#[27=AT04-04\r\n] 2006.229.05:02:38.89#ibcon#*before write, iclass 17, count 2 2006.229.05:02:38.89#ibcon#enter sib2, iclass 17, count 2 2006.229.05:02:38.89#ibcon#flushed, iclass 17, count 2 2006.229.05:02:38.89#ibcon#about to write, iclass 17, count 2 2006.229.05:02:38.89#ibcon#wrote, iclass 17, count 2 2006.229.05:02:38.89#ibcon#about to read 3, iclass 17, count 2 2006.229.05:02:38.92#ibcon#read 3, iclass 17, count 2 2006.229.05:02:38.92#ibcon#about to read 4, iclass 17, count 2 2006.229.05:02:38.92#ibcon#read 4, iclass 17, count 2 2006.229.05:02:38.92#ibcon#about to read 5, iclass 17, count 2 2006.229.05:02:38.92#ibcon#read 5, iclass 17, count 2 2006.229.05:02:38.92#ibcon#about to read 6, iclass 17, count 2 2006.229.05:02:38.92#ibcon#read 6, iclass 17, count 2 2006.229.05:02:38.92#ibcon#end of sib2, iclass 17, count 2 2006.229.05:02:38.92#ibcon#*after write, iclass 17, count 2 2006.229.05:02:38.92#ibcon#*before return 0, iclass 17, count 2 2006.229.05:02:38.92#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:38.92#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:02:38.92#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.05:02:38.92#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:38.93#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:39.04#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:39.04#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:39.04#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:02:39.04#ibcon#first serial, iclass 17, count 0 2006.229.05:02:39.04#ibcon#enter sib2, iclass 17, count 0 2006.229.05:02:39.04#ibcon#flushed, iclass 17, count 0 2006.229.05:02:39.04#ibcon#about to write, iclass 17, count 0 2006.229.05:02:39.04#ibcon#wrote, iclass 17, count 0 2006.229.05:02:39.04#ibcon#about to read 3, iclass 17, count 0 2006.229.05:02:39.06#ibcon#read 3, iclass 17, count 0 2006.229.05:02:39.06#ibcon#about to read 4, iclass 17, count 0 2006.229.05:02:39.06#ibcon#read 4, iclass 17, count 0 2006.229.05:02:39.06#ibcon#about to read 5, iclass 17, count 0 2006.229.05:02:39.06#ibcon#read 5, iclass 17, count 0 2006.229.05:02:39.06#ibcon#about to read 6, iclass 17, count 0 2006.229.05:02:39.06#ibcon#read 6, iclass 17, count 0 2006.229.05:02:39.06#ibcon#end of sib2, iclass 17, count 0 2006.229.05:02:39.06#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:02:39.06#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:02:39.06#ibcon#[27=USB\r\n] 2006.229.05:02:39.06#ibcon#*before write, iclass 17, count 0 2006.229.05:02:39.06#ibcon#enter sib2, iclass 17, count 0 2006.229.05:02:39.06#ibcon#flushed, iclass 17, count 0 2006.229.05:02:39.06#ibcon#about to write, iclass 17, count 0 2006.229.05:02:39.06#ibcon#wrote, iclass 17, count 0 2006.229.05:02:39.06#ibcon#about to read 3, iclass 17, count 0 2006.229.05:02:39.09#ibcon#read 3, iclass 17, count 0 2006.229.05:02:39.09#ibcon#about to read 4, iclass 17, count 0 2006.229.05:02:39.09#ibcon#read 4, iclass 17, count 0 2006.229.05:02:39.09#ibcon#about to read 5, iclass 17, count 0 2006.229.05:02:39.09#ibcon#read 5, iclass 17, count 0 2006.229.05:02:39.09#ibcon#about to read 6, iclass 17, count 0 2006.229.05:02:39.09#ibcon#read 6, iclass 17, count 0 2006.229.05:02:39.09#ibcon#end of sib2, iclass 17, count 0 2006.229.05:02:39.09#ibcon#*after write, iclass 17, count 0 2006.229.05:02:39.09#ibcon#*before return 0, iclass 17, count 0 2006.229.05:02:39.09#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:39.09#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:02:39.09#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:02:39.09#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:02:39.10$vck44/vblo=5,709.99 2006.229.05:02:39.10#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.05:02:39.10#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.05:02:39.10#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:39.10#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:39.10#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:39.10#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:39.10#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:02:39.10#ibcon#first serial, iclass 19, count 0 2006.229.05:02:39.10#ibcon#enter sib2, iclass 19, count 0 2006.229.05:02:39.10#ibcon#flushed, iclass 19, count 0 2006.229.05:02:39.10#ibcon#about to write, iclass 19, count 0 2006.229.05:02:39.10#ibcon#wrote, iclass 19, count 0 2006.229.05:02:39.10#ibcon#about to read 3, iclass 19, count 0 2006.229.05:02:39.11#ibcon#read 3, iclass 19, count 0 2006.229.05:02:39.11#ibcon#about to read 4, iclass 19, count 0 2006.229.05:02:39.11#ibcon#read 4, iclass 19, count 0 2006.229.05:02:39.11#ibcon#about to read 5, iclass 19, count 0 2006.229.05:02:39.11#ibcon#read 5, iclass 19, count 0 2006.229.05:02:39.11#ibcon#about to read 6, iclass 19, count 0 2006.229.05:02:39.11#ibcon#read 6, iclass 19, count 0 2006.229.05:02:39.11#ibcon#end of sib2, iclass 19, count 0 2006.229.05:02:39.11#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:02:39.11#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:02:39.11#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:02:39.11#ibcon#*before write, iclass 19, count 0 2006.229.05:02:39.11#ibcon#enter sib2, iclass 19, count 0 2006.229.05:02:39.11#ibcon#flushed, iclass 19, count 0 2006.229.05:02:39.11#ibcon#about to write, iclass 19, count 0 2006.229.05:02:39.11#ibcon#wrote, iclass 19, count 0 2006.229.05:02:39.11#ibcon#about to read 3, iclass 19, count 0 2006.229.05:02:39.15#ibcon#read 3, iclass 19, count 0 2006.229.05:02:39.15#ibcon#about to read 4, iclass 19, count 0 2006.229.05:02:39.15#ibcon#read 4, iclass 19, count 0 2006.229.05:02:39.15#ibcon#about to read 5, iclass 19, count 0 2006.229.05:02:39.15#ibcon#read 5, iclass 19, count 0 2006.229.05:02:39.15#ibcon#about to read 6, iclass 19, count 0 2006.229.05:02:39.15#ibcon#read 6, iclass 19, count 0 2006.229.05:02:39.15#ibcon#end of sib2, iclass 19, count 0 2006.229.05:02:39.15#ibcon#*after write, iclass 19, count 0 2006.229.05:02:39.15#ibcon#*before return 0, iclass 19, count 0 2006.229.05:02:39.15#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:39.15#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:02:39.15#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:02:39.15#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:02:39.16$vck44/vb=5,4 2006.229.05:02:39.16#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.05:02:39.16#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.05:02:39.16#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:39.16#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:39.20#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:39.20#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:39.20#ibcon#enter wrdev, iclass 21, count 2 2006.229.05:02:39.20#ibcon#first serial, iclass 21, count 2 2006.229.05:02:39.20#ibcon#enter sib2, iclass 21, count 2 2006.229.05:02:39.20#ibcon#flushed, iclass 21, count 2 2006.229.05:02:39.20#ibcon#about to write, iclass 21, count 2 2006.229.05:02:39.20#ibcon#wrote, iclass 21, count 2 2006.229.05:02:39.20#ibcon#about to read 3, iclass 21, count 2 2006.229.05:02:39.22#ibcon#read 3, iclass 21, count 2 2006.229.05:02:39.22#ibcon#about to read 4, iclass 21, count 2 2006.229.05:02:39.22#ibcon#read 4, iclass 21, count 2 2006.229.05:02:39.22#ibcon#about to read 5, iclass 21, count 2 2006.229.05:02:39.22#ibcon#read 5, iclass 21, count 2 2006.229.05:02:39.22#ibcon#about to read 6, iclass 21, count 2 2006.229.05:02:39.22#ibcon#read 6, iclass 21, count 2 2006.229.05:02:39.22#ibcon#end of sib2, iclass 21, count 2 2006.229.05:02:39.22#ibcon#*mode == 0, iclass 21, count 2 2006.229.05:02:39.22#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.05:02:39.22#ibcon#[27=AT05-04\r\n] 2006.229.05:02:39.22#ibcon#*before write, iclass 21, count 2 2006.229.05:02:39.22#ibcon#enter sib2, iclass 21, count 2 2006.229.05:02:39.22#ibcon#flushed, iclass 21, count 2 2006.229.05:02:39.22#ibcon#about to write, iclass 21, count 2 2006.229.05:02:39.22#ibcon#wrote, iclass 21, count 2 2006.229.05:02:39.23#ibcon#about to read 3, iclass 21, count 2 2006.229.05:02:39.25#ibcon#read 3, iclass 21, count 2 2006.229.05:02:39.25#ibcon#about to read 4, iclass 21, count 2 2006.229.05:02:39.25#ibcon#read 4, iclass 21, count 2 2006.229.05:02:39.25#ibcon#about to read 5, iclass 21, count 2 2006.229.05:02:39.25#ibcon#read 5, iclass 21, count 2 2006.229.05:02:39.25#ibcon#about to read 6, iclass 21, count 2 2006.229.05:02:39.25#ibcon#read 6, iclass 21, count 2 2006.229.05:02:39.25#ibcon#end of sib2, iclass 21, count 2 2006.229.05:02:39.25#ibcon#*after write, iclass 21, count 2 2006.229.05:02:39.25#ibcon#*before return 0, iclass 21, count 2 2006.229.05:02:39.25#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:39.25#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:02:39.25#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.05:02:39.26#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:39.26#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:39.36#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:39.36#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:39.36#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:02:39.36#ibcon#first serial, iclass 21, count 0 2006.229.05:02:39.36#ibcon#enter sib2, iclass 21, count 0 2006.229.05:02:39.36#ibcon#flushed, iclass 21, count 0 2006.229.05:02:39.36#ibcon#about to write, iclass 21, count 0 2006.229.05:02:39.36#ibcon#wrote, iclass 21, count 0 2006.229.05:02:39.36#ibcon#about to read 3, iclass 21, count 0 2006.229.05:02:39.38#ibcon#read 3, iclass 21, count 0 2006.229.05:02:39.38#ibcon#about to read 4, iclass 21, count 0 2006.229.05:02:39.38#ibcon#read 4, iclass 21, count 0 2006.229.05:02:39.38#ibcon#about to read 5, iclass 21, count 0 2006.229.05:02:39.38#ibcon#read 5, iclass 21, count 0 2006.229.05:02:39.38#ibcon#about to read 6, iclass 21, count 0 2006.229.05:02:39.38#ibcon#read 6, iclass 21, count 0 2006.229.05:02:39.38#ibcon#end of sib2, iclass 21, count 0 2006.229.05:02:39.38#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:02:39.38#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:02:39.38#ibcon#[27=USB\r\n] 2006.229.05:02:39.38#ibcon#*before write, iclass 21, count 0 2006.229.05:02:39.38#ibcon#enter sib2, iclass 21, count 0 2006.229.05:02:39.38#ibcon#flushed, iclass 21, count 0 2006.229.05:02:39.38#ibcon#about to write, iclass 21, count 0 2006.229.05:02:39.39#ibcon#wrote, iclass 21, count 0 2006.229.05:02:39.39#ibcon#about to read 3, iclass 21, count 0 2006.229.05:02:39.41#ibcon#read 3, iclass 21, count 0 2006.229.05:02:39.41#ibcon#about to read 4, iclass 21, count 0 2006.229.05:02:39.41#ibcon#read 4, iclass 21, count 0 2006.229.05:02:39.41#ibcon#about to read 5, iclass 21, count 0 2006.229.05:02:39.41#ibcon#read 5, iclass 21, count 0 2006.229.05:02:39.41#ibcon#about to read 6, iclass 21, count 0 2006.229.05:02:39.41#ibcon#read 6, iclass 21, count 0 2006.229.05:02:39.41#ibcon#end of sib2, iclass 21, count 0 2006.229.05:02:39.41#ibcon#*after write, iclass 21, count 0 2006.229.05:02:39.41#ibcon#*before return 0, iclass 21, count 0 2006.229.05:02:39.41#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:39.41#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:02:39.41#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:02:39.42#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:02:39.42$vck44/vblo=6,719.99 2006.229.05:02:39.42#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:02:39.42#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:02:39.42#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:39.42#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:39.42#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:39.42#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:39.42#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:02:39.42#ibcon#first serial, iclass 23, count 0 2006.229.05:02:39.42#ibcon#enter sib2, iclass 23, count 0 2006.229.05:02:39.42#ibcon#flushed, iclass 23, count 0 2006.229.05:02:39.42#ibcon#about to write, iclass 23, count 0 2006.229.05:02:39.42#ibcon#wrote, iclass 23, count 0 2006.229.05:02:39.42#ibcon#about to read 3, iclass 23, count 0 2006.229.05:02:39.43#ibcon#read 3, iclass 23, count 0 2006.229.05:02:39.43#ibcon#about to read 4, iclass 23, count 0 2006.229.05:02:39.43#ibcon#read 4, iclass 23, count 0 2006.229.05:02:39.43#ibcon#about to read 5, iclass 23, count 0 2006.229.05:02:39.43#ibcon#read 5, iclass 23, count 0 2006.229.05:02:39.43#ibcon#about to read 6, iclass 23, count 0 2006.229.05:02:39.43#ibcon#read 6, iclass 23, count 0 2006.229.05:02:39.43#ibcon#end of sib2, iclass 23, count 0 2006.229.05:02:39.43#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:02:39.43#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:02:39.43#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:02:39.43#ibcon#*before write, iclass 23, count 0 2006.229.05:02:39.43#ibcon#enter sib2, iclass 23, count 0 2006.229.05:02:39.43#ibcon#flushed, iclass 23, count 0 2006.229.05:02:39.43#ibcon#about to write, iclass 23, count 0 2006.229.05:02:39.43#ibcon#wrote, iclass 23, count 0 2006.229.05:02:39.43#ibcon#about to read 3, iclass 23, count 0 2006.229.05:02:39.47#ibcon#read 3, iclass 23, count 0 2006.229.05:02:39.47#ibcon#about to read 4, iclass 23, count 0 2006.229.05:02:39.47#ibcon#read 4, iclass 23, count 0 2006.229.05:02:39.47#ibcon#about to read 5, iclass 23, count 0 2006.229.05:02:39.47#ibcon#read 5, iclass 23, count 0 2006.229.05:02:39.47#ibcon#about to read 6, iclass 23, count 0 2006.229.05:02:39.47#ibcon#read 6, iclass 23, count 0 2006.229.05:02:39.47#ibcon#end of sib2, iclass 23, count 0 2006.229.05:02:39.47#ibcon#*after write, iclass 23, count 0 2006.229.05:02:39.47#ibcon#*before return 0, iclass 23, count 0 2006.229.05:02:39.47#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:39.47#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:02:39.47#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:02:39.47#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:02:39.48$vck44/vb=6,4 2006.229.05:02:39.48#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:02:39.48#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:02:39.48#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:39.48#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:39.52#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:39.52#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:39.52#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:02:39.52#ibcon#first serial, iclass 25, count 2 2006.229.05:02:39.52#ibcon#enter sib2, iclass 25, count 2 2006.229.05:02:39.52#ibcon#flushed, iclass 25, count 2 2006.229.05:02:39.52#ibcon#about to write, iclass 25, count 2 2006.229.05:02:39.52#ibcon#wrote, iclass 25, count 2 2006.229.05:02:39.52#ibcon#about to read 3, iclass 25, count 2 2006.229.05:02:39.54#ibcon#read 3, iclass 25, count 2 2006.229.05:02:39.54#ibcon#about to read 4, iclass 25, count 2 2006.229.05:02:39.54#ibcon#read 4, iclass 25, count 2 2006.229.05:02:39.54#ibcon#about to read 5, iclass 25, count 2 2006.229.05:02:39.54#ibcon#read 5, iclass 25, count 2 2006.229.05:02:39.54#ibcon#about to read 6, iclass 25, count 2 2006.229.05:02:39.54#ibcon#read 6, iclass 25, count 2 2006.229.05:02:39.54#ibcon#end of sib2, iclass 25, count 2 2006.229.05:02:39.54#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:02:39.54#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:02:39.55#ibcon#[27=AT06-04\r\n] 2006.229.05:02:39.55#ibcon#*before write, iclass 25, count 2 2006.229.05:02:39.55#ibcon#enter sib2, iclass 25, count 2 2006.229.05:02:39.55#ibcon#flushed, iclass 25, count 2 2006.229.05:02:39.55#ibcon#about to write, iclass 25, count 2 2006.229.05:02:39.55#ibcon#wrote, iclass 25, count 2 2006.229.05:02:39.55#ibcon#about to read 3, iclass 25, count 2 2006.229.05:02:39.57#ibcon#read 3, iclass 25, count 2 2006.229.05:02:39.57#ibcon#about to read 4, iclass 25, count 2 2006.229.05:02:39.57#ibcon#read 4, iclass 25, count 2 2006.229.05:02:39.57#ibcon#about to read 5, iclass 25, count 2 2006.229.05:02:39.57#ibcon#read 5, iclass 25, count 2 2006.229.05:02:39.57#ibcon#about to read 6, iclass 25, count 2 2006.229.05:02:39.57#ibcon#read 6, iclass 25, count 2 2006.229.05:02:39.57#ibcon#end of sib2, iclass 25, count 2 2006.229.05:02:39.57#ibcon#*after write, iclass 25, count 2 2006.229.05:02:39.57#ibcon#*before return 0, iclass 25, count 2 2006.229.05:02:39.57#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:39.57#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:02:39.57#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:02:39.57#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:39.58#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:39.68#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:39.68#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:39.68#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:02:39.68#ibcon#first serial, iclass 25, count 0 2006.229.05:02:39.68#ibcon#enter sib2, iclass 25, count 0 2006.229.05:02:39.68#ibcon#flushed, iclass 25, count 0 2006.229.05:02:39.68#ibcon#about to write, iclass 25, count 0 2006.229.05:02:39.68#ibcon#wrote, iclass 25, count 0 2006.229.05:02:39.68#ibcon#about to read 3, iclass 25, count 0 2006.229.05:02:39.70#ibcon#read 3, iclass 25, count 0 2006.229.05:02:39.70#ibcon#about to read 4, iclass 25, count 0 2006.229.05:02:39.70#ibcon#read 4, iclass 25, count 0 2006.229.05:02:39.70#ibcon#about to read 5, iclass 25, count 0 2006.229.05:02:39.70#ibcon#read 5, iclass 25, count 0 2006.229.05:02:39.70#ibcon#about to read 6, iclass 25, count 0 2006.229.05:02:39.70#ibcon#read 6, iclass 25, count 0 2006.229.05:02:39.70#ibcon#end of sib2, iclass 25, count 0 2006.229.05:02:39.70#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:02:39.70#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:02:39.70#ibcon#[27=USB\r\n] 2006.229.05:02:39.70#ibcon#*before write, iclass 25, count 0 2006.229.05:02:39.70#ibcon#enter sib2, iclass 25, count 0 2006.229.05:02:39.70#ibcon#flushed, iclass 25, count 0 2006.229.05:02:39.71#ibcon#about to write, iclass 25, count 0 2006.229.05:02:39.71#ibcon#wrote, iclass 25, count 0 2006.229.05:02:39.71#ibcon#about to read 3, iclass 25, count 0 2006.229.05:02:39.73#ibcon#read 3, iclass 25, count 0 2006.229.05:02:39.73#ibcon#about to read 4, iclass 25, count 0 2006.229.05:02:39.73#ibcon#read 4, iclass 25, count 0 2006.229.05:02:39.73#ibcon#about to read 5, iclass 25, count 0 2006.229.05:02:39.73#ibcon#read 5, iclass 25, count 0 2006.229.05:02:39.73#ibcon#about to read 6, iclass 25, count 0 2006.229.05:02:39.73#ibcon#read 6, iclass 25, count 0 2006.229.05:02:39.73#ibcon#end of sib2, iclass 25, count 0 2006.229.05:02:39.73#ibcon#*after write, iclass 25, count 0 2006.229.05:02:39.73#ibcon#*before return 0, iclass 25, count 0 2006.229.05:02:39.73#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:39.73#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:02:39.73#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:02:39.74#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:02:39.74$vck44/vblo=7,734.99 2006.229.05:02:39.74#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:02:39.74#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:02:39.74#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:39.74#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:39.74#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:39.74#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:39.74#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:02:39.74#ibcon#first serial, iclass 27, count 0 2006.229.05:02:39.74#ibcon#enter sib2, iclass 27, count 0 2006.229.05:02:39.74#ibcon#flushed, iclass 27, count 0 2006.229.05:02:39.74#ibcon#about to write, iclass 27, count 0 2006.229.05:02:39.74#ibcon#wrote, iclass 27, count 0 2006.229.05:02:39.74#ibcon#about to read 3, iclass 27, count 0 2006.229.05:02:39.75#ibcon#read 3, iclass 27, count 0 2006.229.05:02:39.75#ibcon#about to read 4, iclass 27, count 0 2006.229.05:02:39.75#ibcon#read 4, iclass 27, count 0 2006.229.05:02:39.75#ibcon#about to read 5, iclass 27, count 0 2006.229.05:02:39.75#ibcon#read 5, iclass 27, count 0 2006.229.05:02:39.75#ibcon#about to read 6, iclass 27, count 0 2006.229.05:02:39.75#ibcon#read 6, iclass 27, count 0 2006.229.05:02:39.75#ibcon#end of sib2, iclass 27, count 0 2006.229.05:02:39.75#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:02:39.75#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:02:39.75#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:02:39.75#ibcon#*before write, iclass 27, count 0 2006.229.05:02:39.75#ibcon#enter sib2, iclass 27, count 0 2006.229.05:02:39.75#ibcon#flushed, iclass 27, count 0 2006.229.05:02:39.75#ibcon#about to write, iclass 27, count 0 2006.229.05:02:39.76#ibcon#wrote, iclass 27, count 0 2006.229.05:02:39.76#ibcon#about to read 3, iclass 27, count 0 2006.229.05:02:39.79#ibcon#read 3, iclass 27, count 0 2006.229.05:02:39.79#ibcon#about to read 4, iclass 27, count 0 2006.229.05:02:39.79#ibcon#read 4, iclass 27, count 0 2006.229.05:02:39.79#ibcon#about to read 5, iclass 27, count 0 2006.229.05:02:39.79#ibcon#read 5, iclass 27, count 0 2006.229.05:02:39.79#ibcon#about to read 6, iclass 27, count 0 2006.229.05:02:39.79#ibcon#read 6, iclass 27, count 0 2006.229.05:02:39.79#ibcon#end of sib2, iclass 27, count 0 2006.229.05:02:39.79#ibcon#*after write, iclass 27, count 0 2006.229.05:02:39.79#ibcon#*before return 0, iclass 27, count 0 2006.229.05:02:39.79#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:39.79#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:02:39.79#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:02:39.79#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:02:39.80$vck44/vb=7,4 2006.229.05:02:39.80#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.05:02:39.80#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.05:02:39.80#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:39.80#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:39.84#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:39.84#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:39.84#ibcon#enter wrdev, iclass 29, count 2 2006.229.05:02:39.84#ibcon#first serial, iclass 29, count 2 2006.229.05:02:39.84#ibcon#enter sib2, iclass 29, count 2 2006.229.05:02:39.84#ibcon#flushed, iclass 29, count 2 2006.229.05:02:39.84#ibcon#about to write, iclass 29, count 2 2006.229.05:02:39.84#ibcon#wrote, iclass 29, count 2 2006.229.05:02:39.84#ibcon#about to read 3, iclass 29, count 2 2006.229.05:02:39.86#ibcon#read 3, iclass 29, count 2 2006.229.05:02:39.86#ibcon#about to read 4, iclass 29, count 2 2006.229.05:02:39.86#ibcon#read 4, iclass 29, count 2 2006.229.05:02:39.86#ibcon#about to read 5, iclass 29, count 2 2006.229.05:02:39.86#ibcon#read 5, iclass 29, count 2 2006.229.05:02:39.86#ibcon#about to read 6, iclass 29, count 2 2006.229.05:02:39.86#ibcon#read 6, iclass 29, count 2 2006.229.05:02:39.86#ibcon#end of sib2, iclass 29, count 2 2006.229.05:02:39.86#ibcon#*mode == 0, iclass 29, count 2 2006.229.05:02:39.86#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.05:02:39.86#ibcon#[27=AT07-04\r\n] 2006.229.05:02:39.86#ibcon#*before write, iclass 29, count 2 2006.229.05:02:39.86#ibcon#enter sib2, iclass 29, count 2 2006.229.05:02:39.86#ibcon#flushed, iclass 29, count 2 2006.229.05:02:39.86#ibcon#about to write, iclass 29, count 2 2006.229.05:02:39.87#ibcon#wrote, iclass 29, count 2 2006.229.05:02:39.87#ibcon#about to read 3, iclass 29, count 2 2006.229.05:02:39.89#ibcon#read 3, iclass 29, count 2 2006.229.05:02:39.89#ibcon#about to read 4, iclass 29, count 2 2006.229.05:02:39.89#ibcon#read 4, iclass 29, count 2 2006.229.05:02:39.89#ibcon#about to read 5, iclass 29, count 2 2006.229.05:02:39.89#ibcon#read 5, iclass 29, count 2 2006.229.05:02:39.89#ibcon#about to read 6, iclass 29, count 2 2006.229.05:02:39.89#ibcon#read 6, iclass 29, count 2 2006.229.05:02:39.89#ibcon#end of sib2, iclass 29, count 2 2006.229.05:02:39.89#ibcon#*after write, iclass 29, count 2 2006.229.05:02:39.89#ibcon#*before return 0, iclass 29, count 2 2006.229.05:02:39.89#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:39.89#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:02:39.89#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.05:02:39.89#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:39.89#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:40.02#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:40.02#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:40.02#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:02:40.02#ibcon#first serial, iclass 29, count 0 2006.229.05:02:40.02#ibcon#enter sib2, iclass 29, count 0 2006.229.05:02:40.02#ibcon#flushed, iclass 29, count 0 2006.229.05:02:40.02#ibcon#about to write, iclass 29, count 0 2006.229.05:02:40.02#ibcon#wrote, iclass 29, count 0 2006.229.05:02:40.02#ibcon#about to read 3, iclass 29, count 0 2006.229.05:02:40.03#ibcon#read 3, iclass 29, count 0 2006.229.05:02:40.03#ibcon#about to read 4, iclass 29, count 0 2006.229.05:02:40.03#ibcon#read 4, iclass 29, count 0 2006.229.05:02:40.03#ibcon#about to read 5, iclass 29, count 0 2006.229.05:02:40.03#ibcon#read 5, iclass 29, count 0 2006.229.05:02:40.03#ibcon#about to read 6, iclass 29, count 0 2006.229.05:02:40.03#ibcon#read 6, iclass 29, count 0 2006.229.05:02:40.03#ibcon#end of sib2, iclass 29, count 0 2006.229.05:02:40.03#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:02:40.03#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:02:40.03#ibcon#[27=USB\r\n] 2006.229.05:02:40.03#ibcon#*before write, iclass 29, count 0 2006.229.05:02:40.03#ibcon#enter sib2, iclass 29, count 0 2006.229.05:02:40.03#ibcon#flushed, iclass 29, count 0 2006.229.05:02:40.03#ibcon#about to write, iclass 29, count 0 2006.229.05:02:40.03#ibcon#wrote, iclass 29, count 0 2006.229.05:02:40.03#ibcon#about to read 3, iclass 29, count 0 2006.229.05:02:40.06#ibcon#read 3, iclass 29, count 0 2006.229.05:02:40.06#ibcon#about to read 4, iclass 29, count 0 2006.229.05:02:40.06#ibcon#read 4, iclass 29, count 0 2006.229.05:02:40.06#ibcon#about to read 5, iclass 29, count 0 2006.229.05:02:40.06#ibcon#read 5, iclass 29, count 0 2006.229.05:02:40.06#ibcon#about to read 6, iclass 29, count 0 2006.229.05:02:40.06#ibcon#read 6, iclass 29, count 0 2006.229.05:02:40.06#ibcon#end of sib2, iclass 29, count 0 2006.229.05:02:40.06#ibcon#*after write, iclass 29, count 0 2006.229.05:02:40.06#ibcon#*before return 0, iclass 29, count 0 2006.229.05:02:40.06#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:40.06#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:02:40.06#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:02:40.06#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:02:40.07$vck44/vblo=8,744.99 2006.229.05:02:40.07#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:02:40.07#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:02:40.07#ibcon#ireg 17 cls_cnt 0 2006.229.05:02:40.07#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:40.07#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:40.07#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:40.07#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:02:40.07#ibcon#first serial, iclass 31, count 0 2006.229.05:02:40.07#ibcon#enter sib2, iclass 31, count 0 2006.229.05:02:40.07#ibcon#flushed, iclass 31, count 0 2006.229.05:02:40.07#ibcon#about to write, iclass 31, count 0 2006.229.05:02:40.07#ibcon#wrote, iclass 31, count 0 2006.229.05:02:40.07#ibcon#about to read 3, iclass 31, count 0 2006.229.05:02:40.08#ibcon#read 3, iclass 31, count 0 2006.229.05:02:40.08#ibcon#about to read 4, iclass 31, count 0 2006.229.05:02:40.08#ibcon#read 4, iclass 31, count 0 2006.229.05:02:40.08#ibcon#about to read 5, iclass 31, count 0 2006.229.05:02:40.08#ibcon#read 5, iclass 31, count 0 2006.229.05:02:40.08#ibcon#about to read 6, iclass 31, count 0 2006.229.05:02:40.08#ibcon#read 6, iclass 31, count 0 2006.229.05:02:40.08#ibcon#end of sib2, iclass 31, count 0 2006.229.05:02:40.08#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:02:40.08#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:02:40.08#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:02:40.08#ibcon#*before write, iclass 31, count 0 2006.229.05:02:40.08#ibcon#enter sib2, iclass 31, count 0 2006.229.05:02:40.08#ibcon#flushed, iclass 31, count 0 2006.229.05:02:40.08#ibcon#about to write, iclass 31, count 0 2006.229.05:02:40.09#ibcon#wrote, iclass 31, count 0 2006.229.05:02:40.09#ibcon#about to read 3, iclass 31, count 0 2006.229.05:02:40.12#ibcon#read 3, iclass 31, count 0 2006.229.05:02:40.12#ibcon#about to read 4, iclass 31, count 0 2006.229.05:02:40.12#ibcon#read 4, iclass 31, count 0 2006.229.05:02:40.12#ibcon#about to read 5, iclass 31, count 0 2006.229.05:02:40.12#ibcon#read 5, iclass 31, count 0 2006.229.05:02:40.12#ibcon#about to read 6, iclass 31, count 0 2006.229.05:02:40.12#ibcon#read 6, iclass 31, count 0 2006.229.05:02:40.12#ibcon#end of sib2, iclass 31, count 0 2006.229.05:02:40.12#ibcon#*after write, iclass 31, count 0 2006.229.05:02:40.12#ibcon#*before return 0, iclass 31, count 0 2006.229.05:02:40.12#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:40.12#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:02:40.12#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:02:40.12#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:02:40.13$vck44/vb=8,4 2006.229.05:02:40.13#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:02:40.13#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:02:40.13#ibcon#ireg 11 cls_cnt 2 2006.229.05:02:40.13#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:40.17#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:40.17#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:40.17#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:02:40.17#ibcon#first serial, iclass 33, count 2 2006.229.05:02:40.17#ibcon#enter sib2, iclass 33, count 2 2006.229.05:02:40.17#ibcon#flushed, iclass 33, count 2 2006.229.05:02:40.17#ibcon#about to write, iclass 33, count 2 2006.229.05:02:40.17#ibcon#wrote, iclass 33, count 2 2006.229.05:02:40.17#ibcon#about to read 3, iclass 33, count 2 2006.229.05:02:40.19#ibcon#read 3, iclass 33, count 2 2006.229.05:02:40.19#ibcon#about to read 4, iclass 33, count 2 2006.229.05:02:40.19#ibcon#read 4, iclass 33, count 2 2006.229.05:02:40.19#ibcon#about to read 5, iclass 33, count 2 2006.229.05:02:40.19#ibcon#read 5, iclass 33, count 2 2006.229.05:02:40.19#ibcon#about to read 6, iclass 33, count 2 2006.229.05:02:40.19#ibcon#read 6, iclass 33, count 2 2006.229.05:02:40.19#ibcon#end of sib2, iclass 33, count 2 2006.229.05:02:40.19#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:02:40.19#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:02:40.19#ibcon#[27=AT08-04\r\n] 2006.229.05:02:40.19#ibcon#*before write, iclass 33, count 2 2006.229.05:02:40.19#ibcon#enter sib2, iclass 33, count 2 2006.229.05:02:40.19#ibcon#flushed, iclass 33, count 2 2006.229.05:02:40.19#ibcon#about to write, iclass 33, count 2 2006.229.05:02:40.19#ibcon#wrote, iclass 33, count 2 2006.229.05:02:40.19#ibcon#about to read 3, iclass 33, count 2 2006.229.05:02:40.22#ibcon#read 3, iclass 33, count 2 2006.229.05:02:40.22#ibcon#about to read 4, iclass 33, count 2 2006.229.05:02:40.22#ibcon#read 4, iclass 33, count 2 2006.229.05:02:40.22#ibcon#about to read 5, iclass 33, count 2 2006.229.05:02:40.22#ibcon#read 5, iclass 33, count 2 2006.229.05:02:40.22#ibcon#about to read 6, iclass 33, count 2 2006.229.05:02:40.22#ibcon#read 6, iclass 33, count 2 2006.229.05:02:40.22#ibcon#end of sib2, iclass 33, count 2 2006.229.05:02:40.22#ibcon#*after write, iclass 33, count 2 2006.229.05:02:40.22#ibcon#*before return 0, iclass 33, count 2 2006.229.05:02:40.22#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:40.22#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:02:40.22#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:02:40.22#ibcon#ireg 7 cls_cnt 0 2006.229.05:02:40.22#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:40.34#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:40.34#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:40.34#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:02:40.34#ibcon#first serial, iclass 33, count 0 2006.229.05:02:40.34#ibcon#enter sib2, iclass 33, count 0 2006.229.05:02:40.34#ibcon#flushed, iclass 33, count 0 2006.229.05:02:40.34#ibcon#about to write, iclass 33, count 0 2006.229.05:02:40.34#ibcon#wrote, iclass 33, count 0 2006.229.05:02:40.34#ibcon#about to read 3, iclass 33, count 0 2006.229.05:02:40.36#ibcon#read 3, iclass 33, count 0 2006.229.05:02:40.36#ibcon#about to read 4, iclass 33, count 0 2006.229.05:02:40.36#ibcon#read 4, iclass 33, count 0 2006.229.05:02:40.36#ibcon#about to read 5, iclass 33, count 0 2006.229.05:02:40.36#ibcon#read 5, iclass 33, count 0 2006.229.05:02:40.36#ibcon#about to read 6, iclass 33, count 0 2006.229.05:02:40.36#ibcon#read 6, iclass 33, count 0 2006.229.05:02:40.36#ibcon#end of sib2, iclass 33, count 0 2006.229.05:02:40.36#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:02:40.36#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:02:40.36#ibcon#[27=USB\r\n] 2006.229.05:02:40.36#ibcon#*before write, iclass 33, count 0 2006.229.05:02:40.36#ibcon#enter sib2, iclass 33, count 0 2006.229.05:02:40.36#ibcon#flushed, iclass 33, count 0 2006.229.05:02:40.36#ibcon#about to write, iclass 33, count 0 2006.229.05:02:40.36#ibcon#wrote, iclass 33, count 0 2006.229.05:02:40.36#ibcon#about to read 3, iclass 33, count 0 2006.229.05:02:40.39#ibcon#read 3, iclass 33, count 0 2006.229.05:02:40.39#ibcon#about to read 4, iclass 33, count 0 2006.229.05:02:40.39#ibcon#read 4, iclass 33, count 0 2006.229.05:02:40.39#ibcon#about to read 5, iclass 33, count 0 2006.229.05:02:40.39#ibcon#read 5, iclass 33, count 0 2006.229.05:02:40.39#ibcon#about to read 6, iclass 33, count 0 2006.229.05:02:40.39#ibcon#read 6, iclass 33, count 0 2006.229.05:02:40.39#ibcon#end of sib2, iclass 33, count 0 2006.229.05:02:40.39#ibcon#*after write, iclass 33, count 0 2006.229.05:02:40.39#ibcon#*before return 0, iclass 33, count 0 2006.229.05:02:40.39#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:40.39#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:02:40.39#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:02:40.39#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:02:40.40$vck44/vabw=wide 2006.229.05:02:40.40#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:02:40.40#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:02:40.40#ibcon#ireg 8 cls_cnt 0 2006.229.05:02:40.40#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:40.40#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:40.40#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:40.40#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:02:40.40#ibcon#first serial, iclass 35, count 0 2006.229.05:02:40.40#ibcon#enter sib2, iclass 35, count 0 2006.229.05:02:40.40#ibcon#flushed, iclass 35, count 0 2006.229.05:02:40.40#ibcon#about to write, iclass 35, count 0 2006.229.05:02:40.40#ibcon#wrote, iclass 35, count 0 2006.229.05:02:40.40#ibcon#about to read 3, iclass 35, count 0 2006.229.05:02:40.41#ibcon#read 3, iclass 35, count 0 2006.229.05:02:40.41#ibcon#about to read 4, iclass 35, count 0 2006.229.05:02:40.41#ibcon#read 4, iclass 35, count 0 2006.229.05:02:40.41#ibcon#about to read 5, iclass 35, count 0 2006.229.05:02:40.41#ibcon#read 5, iclass 35, count 0 2006.229.05:02:40.41#ibcon#about to read 6, iclass 35, count 0 2006.229.05:02:40.41#ibcon#read 6, iclass 35, count 0 2006.229.05:02:40.41#ibcon#end of sib2, iclass 35, count 0 2006.229.05:02:40.41#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:02:40.41#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:02:40.41#ibcon#[25=BW32\r\n] 2006.229.05:02:40.41#ibcon#*before write, iclass 35, count 0 2006.229.05:02:40.41#ibcon#enter sib2, iclass 35, count 0 2006.229.05:02:40.41#ibcon#flushed, iclass 35, count 0 2006.229.05:02:40.41#ibcon#about to write, iclass 35, count 0 2006.229.05:02:40.41#ibcon#wrote, iclass 35, count 0 2006.229.05:02:40.41#ibcon#about to read 3, iclass 35, count 0 2006.229.05:02:40.44#ibcon#read 3, iclass 35, count 0 2006.229.05:02:40.44#ibcon#about to read 4, iclass 35, count 0 2006.229.05:02:40.44#ibcon#read 4, iclass 35, count 0 2006.229.05:02:40.44#ibcon#about to read 5, iclass 35, count 0 2006.229.05:02:40.44#ibcon#read 5, iclass 35, count 0 2006.229.05:02:40.44#ibcon#about to read 6, iclass 35, count 0 2006.229.05:02:40.44#ibcon#read 6, iclass 35, count 0 2006.229.05:02:40.44#ibcon#end of sib2, iclass 35, count 0 2006.229.05:02:40.44#ibcon#*after write, iclass 35, count 0 2006.229.05:02:40.44#ibcon#*before return 0, iclass 35, count 0 2006.229.05:02:40.44#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:40.44#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:02:40.44#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:02:40.45#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:02:40.45$vck44/vbbw=wide 2006.229.05:02:40.45#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:02:40.45#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:02:40.45#ibcon#ireg 8 cls_cnt 0 2006.229.05:02:40.45#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:02:40.50#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:02:40.50#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:02:40.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:02:40.50#ibcon#first serial, iclass 37, count 0 2006.229.05:02:40.50#ibcon#enter sib2, iclass 37, count 0 2006.229.05:02:40.50#ibcon#flushed, iclass 37, count 0 2006.229.05:02:40.50#ibcon#about to write, iclass 37, count 0 2006.229.05:02:40.50#ibcon#wrote, iclass 37, count 0 2006.229.05:02:40.50#ibcon#about to read 3, iclass 37, count 0 2006.229.05:02:40.52#ibcon#read 3, iclass 37, count 0 2006.229.05:02:40.52#ibcon#about to read 4, iclass 37, count 0 2006.229.05:02:40.52#ibcon#read 4, iclass 37, count 0 2006.229.05:02:40.52#ibcon#about to read 5, iclass 37, count 0 2006.229.05:02:40.52#ibcon#read 5, iclass 37, count 0 2006.229.05:02:40.52#ibcon#about to read 6, iclass 37, count 0 2006.229.05:02:40.52#ibcon#read 6, iclass 37, count 0 2006.229.05:02:40.52#ibcon#end of sib2, iclass 37, count 0 2006.229.05:02:40.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:02:40.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:02:40.52#ibcon#[27=BW32\r\n] 2006.229.05:02:40.52#ibcon#*before write, iclass 37, count 0 2006.229.05:02:40.52#ibcon#enter sib2, iclass 37, count 0 2006.229.05:02:40.52#ibcon#flushed, iclass 37, count 0 2006.229.05:02:40.52#ibcon#about to write, iclass 37, count 0 2006.229.05:02:40.53#ibcon#wrote, iclass 37, count 0 2006.229.05:02:40.53#ibcon#about to read 3, iclass 37, count 0 2006.229.05:02:40.55#ibcon#read 3, iclass 37, count 0 2006.229.05:02:40.55#ibcon#about to read 4, iclass 37, count 0 2006.229.05:02:40.55#ibcon#read 4, iclass 37, count 0 2006.229.05:02:40.55#ibcon#about to read 5, iclass 37, count 0 2006.229.05:02:40.55#ibcon#read 5, iclass 37, count 0 2006.229.05:02:40.55#ibcon#about to read 6, iclass 37, count 0 2006.229.05:02:40.55#ibcon#read 6, iclass 37, count 0 2006.229.05:02:40.55#ibcon#end of sib2, iclass 37, count 0 2006.229.05:02:40.55#ibcon#*after write, iclass 37, count 0 2006.229.05:02:40.55#ibcon#*before return 0, iclass 37, count 0 2006.229.05:02:40.55#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:02:40.55#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:02:40.56#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:02:40.56#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:02:40.56$setupk4/ifdk4 2006.229.05:02:40.56$ifdk4/lo= 2006.229.05:02:40.56$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:02:40.56$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:02:40.56$ifdk4/patch= 2006.229.05:02:40.56$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:02:40.56$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:02:40.56$setupk4/!*+20s 2006.229.05:02:42.25#abcon#<5=/04 3.9 7.5 31.06 88 999.7\r\n> 2006.229.05:02:42.27#abcon#{5=INTERFACE CLEAR} 2006.229.05:02:42.33#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:02:52.42#abcon#<5=/04 3.9 7.5 31.06 89 999.7\r\n> 2006.229.05:02:52.44#abcon#{5=INTERFACE CLEAR} 2006.229.05:02:52.50#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:02:55.27$setupk4/"tpicd 2006.229.05:02:55.27$setupk4/echo=off 2006.229.05:02:55.27$setupk4/xlog=off 2006.229.05:02:55.28:!2006.229.05:04:41 2006.229.05:03:21.14#trakl#Source acquired 2006.229.05:03:21.15#flagr#flagr/antenna,acquired 2006.229.05:03:27.14#trakl#Off source 2006.229.05:03:27.14?ERROR st -7 Antenna off-source! 2006.229.05:03:27.14#trakl#az 151.660 el 36.251 azerr*cos(el) -0.0011 elerr 0.0167 2006.229.05:03:27.15#flagr#flagr/antenna,off-source 2006.229.05:03:33.14#trakl#Source re-acquired 2006.229.05:03:33.15#flagr#flagr/antenna,re-acquired 2006.229.05:04:41.01:preob 2006.229.05:04:42.14/onsource/TRACKING 2006.229.05:04:42.15:!2006.229.05:04:51 2006.229.05:04:51.01:"tape 2006.229.05:04:51.01:"st=record 2006.229.05:04:51.02:data_valid=on 2006.229.05:04:51.02:midob 2006.229.05:04:52.14/onsource/TRACKING 2006.229.05:04:52.15/wx/31.07,999.7,89 2006.229.05:04:52.24/cable/+6.4011E-03 2006.229.05:04:53.33/va/01,08,usb,yes,30,32 2006.229.05:04:53.33/va/02,07,usb,yes,32,33 2006.229.05:04:53.33/va/03,06,usb,yes,40,42 2006.229.05:04:53.33/va/04,07,usb,yes,33,35 2006.229.05:04:53.33/va/05,04,usb,yes,30,30 2006.229.05:04:53.33/va/06,04,usb,yes,33,33 2006.229.05:04:53.33/va/07,05,usb,yes,29,30 2006.229.05:04:53.33/va/08,06,usb,yes,21,27 2006.229.05:04:53.56/valo/01,524.99,yes,locked 2006.229.05:04:53.56/valo/02,534.99,yes,locked 2006.229.05:04:53.56/valo/03,564.99,yes,locked 2006.229.05:04:53.56/valo/04,624.99,yes,locked 2006.229.05:04:53.56/valo/05,734.99,yes,locked 2006.229.05:04:53.56/valo/06,814.99,yes,locked 2006.229.05:04:53.56/valo/07,864.99,yes,locked 2006.229.05:04:53.56/valo/08,884.99,yes,locked 2006.229.05:04:54.65/vb/01,04,usb,yes,31,29 2006.229.05:04:54.65/vb/02,04,usb,yes,34,33 2006.229.05:04:54.65/vb/03,04,usb,yes,31,34 2006.229.05:04:54.65/vb/04,04,usb,yes,35,34 2006.229.05:04:54.65/vb/05,04,usb,yes,27,30 2006.229.05:04:54.65/vb/06,04,usb,yes,32,28 2006.229.05:04:54.65/vb/07,04,usb,yes,32,31 2006.229.05:04:54.65/vb/08,04,usb,yes,29,33 2006.229.05:04:54.88/vblo/01,629.99,yes,locked 2006.229.05:04:54.88/vblo/02,634.99,yes,locked 2006.229.05:04:54.88/vblo/03,649.99,yes,locked 2006.229.05:04:54.88/vblo/04,679.99,yes,locked 2006.229.05:04:54.88/vblo/05,709.99,yes,locked 2006.229.05:04:54.88/vblo/06,719.99,yes,locked 2006.229.05:04:54.88/vblo/07,734.99,yes,locked 2006.229.05:04:54.88/vblo/08,744.99,yes,locked 2006.229.05:04:55.03/vabw/8 2006.229.05:04:55.18/vbbw/8 2006.229.05:04:55.27/xfe/off,on,12.0 2006.229.05:04:55.65/ifatt/23,28,28,28 2006.229.05:04:56.07/fmout-gps/S +4.56E-07 2006.229.05:04:56.11:!2006.229.05:07:51 2006.229.05:07:51.01:data_valid=off 2006.229.05:07:51.01:"et 2006.229.05:07:51.01:!+3s 2006.229.05:07:54.02:"tape 2006.229.05:07:54.02:postob 2006.229.05:07:54.18/cable/+6.3998E-03 2006.229.05:07:54.18/wx/31.08,999.7,89 2006.229.05:07:54.24/fmout-gps/S +4.55E-07 2006.229.05:07:54.24:scan_name=229-0510,jd0608,110 2006.229.05:07:54.24:source=3c274,123049.42,122328.0,2000.0,ccw 2006.229.05:07:55.13#flagr#flagr/antenna,new-source 2006.229.05:07:55.13:checkk5 2006.229.05:07:55.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:07:55.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:07:56.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:07:56.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:07:57.15/chk_obsdata//k5ts1/T2290504??a.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:07:57.55/chk_obsdata//k5ts2/T2290504??b.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:07:57.94/chk_obsdata//k5ts3/T2290504??c.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:07:58.34/chk_obsdata//k5ts4/T2290504??d.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:07:59.04/k5log//k5ts1_log_newline 2006.229.05:07:59.74/k5log//k5ts2_log_newline 2006.229.05:08:00.47/k5log//k5ts3_log_newline 2006.229.05:08:01.19/k5log//k5ts4_log_newline 2006.229.05:08:01.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:08:01.22:setupk4=1 2006.229.05:08:01.22$setupk4/echo=on 2006.229.05:08:01.22$setupk4/pcalon 2006.229.05:08:01.22$pcalon/"no phase cal control is implemented here 2006.229.05:08:01.22$setupk4/"tpicd=stop 2006.229.05:08:01.22$setupk4/"rec=synch_on 2006.229.05:08:01.22$setupk4/"rec_mode=128 2006.229.05:08:01.22$setupk4/!* 2006.229.05:08:01.22$setupk4/recpk4 2006.229.05:08:01.22$recpk4/recpatch= 2006.229.05:08:01.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:08:01.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:08:01.23$setupk4/vck44 2006.229.05:08:01.23$vck44/valo=1,524.99 2006.229.05:08:01.23#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:08:01.23#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:08:01.23#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:01.23#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:01.23#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:01.23#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:01.23#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:08:01.23#ibcon#first serial, iclass 23, count 0 2006.229.05:08:01.23#ibcon#enter sib2, iclass 23, count 0 2006.229.05:08:01.23#ibcon#flushed, iclass 23, count 0 2006.229.05:08:01.23#ibcon#about to write, iclass 23, count 0 2006.229.05:08:01.23#ibcon#wrote, iclass 23, count 0 2006.229.05:08:01.23#ibcon#about to read 3, iclass 23, count 0 2006.229.05:08:01.24#ibcon#read 3, iclass 23, count 0 2006.229.05:08:01.24#ibcon#about to read 4, iclass 23, count 0 2006.229.05:08:01.24#ibcon#read 4, iclass 23, count 0 2006.229.05:08:01.24#ibcon#about to read 5, iclass 23, count 0 2006.229.05:08:01.24#ibcon#read 5, iclass 23, count 0 2006.229.05:08:01.24#ibcon#about to read 6, iclass 23, count 0 2006.229.05:08:01.24#ibcon#read 6, iclass 23, count 0 2006.229.05:08:01.24#ibcon#end of sib2, iclass 23, count 0 2006.229.05:08:01.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:08:01.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:08:01.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:08:01.24#ibcon#*before write, iclass 23, count 0 2006.229.05:08:01.24#ibcon#enter sib2, iclass 23, count 0 2006.229.05:08:01.24#ibcon#flushed, iclass 23, count 0 2006.229.05:08:01.24#ibcon#about to write, iclass 23, count 0 2006.229.05:08:01.24#ibcon#wrote, iclass 23, count 0 2006.229.05:08:01.24#ibcon#about to read 3, iclass 23, count 0 2006.229.05:08:01.29#ibcon#read 3, iclass 23, count 0 2006.229.05:08:01.29#ibcon#about to read 4, iclass 23, count 0 2006.229.05:08:01.29#ibcon#read 4, iclass 23, count 0 2006.229.05:08:01.29#ibcon#about to read 5, iclass 23, count 0 2006.229.05:08:01.29#ibcon#read 5, iclass 23, count 0 2006.229.05:08:01.29#ibcon#about to read 6, iclass 23, count 0 2006.229.05:08:01.29#ibcon#read 6, iclass 23, count 0 2006.229.05:08:01.29#ibcon#end of sib2, iclass 23, count 0 2006.229.05:08:01.29#ibcon#*after write, iclass 23, count 0 2006.229.05:08:01.29#ibcon#*before return 0, iclass 23, count 0 2006.229.05:08:01.29#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:01.29#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:01.29#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:08:01.29#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:08:01.29$vck44/va=1,8 2006.229.05:08:01.29#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:08:01.29#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:08:01.29#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:01.29#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:01.29#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:01.29#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:01.29#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:08:01.29#ibcon#first serial, iclass 25, count 2 2006.229.05:08:01.29#ibcon#enter sib2, iclass 25, count 2 2006.229.05:08:01.29#ibcon#flushed, iclass 25, count 2 2006.229.05:08:01.29#ibcon#about to write, iclass 25, count 2 2006.229.05:08:01.29#ibcon#wrote, iclass 25, count 2 2006.229.05:08:01.29#ibcon#about to read 3, iclass 25, count 2 2006.229.05:08:01.31#ibcon#read 3, iclass 25, count 2 2006.229.05:08:01.31#ibcon#about to read 4, iclass 25, count 2 2006.229.05:08:01.31#ibcon#read 4, iclass 25, count 2 2006.229.05:08:01.31#ibcon#about to read 5, iclass 25, count 2 2006.229.05:08:01.31#ibcon#read 5, iclass 25, count 2 2006.229.05:08:01.31#ibcon#about to read 6, iclass 25, count 2 2006.229.05:08:01.31#ibcon#read 6, iclass 25, count 2 2006.229.05:08:01.31#ibcon#end of sib2, iclass 25, count 2 2006.229.05:08:01.31#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:08:01.31#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:08:01.31#ibcon#[25=AT01-08\r\n] 2006.229.05:08:01.31#ibcon#*before write, iclass 25, count 2 2006.229.05:08:01.31#ibcon#enter sib2, iclass 25, count 2 2006.229.05:08:01.31#ibcon#flushed, iclass 25, count 2 2006.229.05:08:01.31#ibcon#about to write, iclass 25, count 2 2006.229.05:08:01.31#ibcon#wrote, iclass 25, count 2 2006.229.05:08:01.31#ibcon#about to read 3, iclass 25, count 2 2006.229.05:08:01.34#ibcon#read 3, iclass 25, count 2 2006.229.05:08:01.34#ibcon#about to read 4, iclass 25, count 2 2006.229.05:08:01.34#ibcon#read 4, iclass 25, count 2 2006.229.05:08:01.34#ibcon#about to read 5, iclass 25, count 2 2006.229.05:08:01.34#ibcon#read 5, iclass 25, count 2 2006.229.05:08:01.34#ibcon#about to read 6, iclass 25, count 2 2006.229.05:08:01.34#ibcon#read 6, iclass 25, count 2 2006.229.05:08:01.34#ibcon#end of sib2, iclass 25, count 2 2006.229.05:08:01.34#ibcon#*after write, iclass 25, count 2 2006.229.05:08:01.34#ibcon#*before return 0, iclass 25, count 2 2006.229.05:08:01.34#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:01.34#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:01.34#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:08:01.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:01.34#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:01.46#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:01.46#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:01.46#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:08:01.46#ibcon#first serial, iclass 25, count 0 2006.229.05:08:01.46#ibcon#enter sib2, iclass 25, count 0 2006.229.05:08:01.46#ibcon#flushed, iclass 25, count 0 2006.229.05:08:01.46#ibcon#about to write, iclass 25, count 0 2006.229.05:08:01.46#ibcon#wrote, iclass 25, count 0 2006.229.05:08:01.46#ibcon#about to read 3, iclass 25, count 0 2006.229.05:08:01.48#ibcon#read 3, iclass 25, count 0 2006.229.05:08:01.48#ibcon#about to read 4, iclass 25, count 0 2006.229.05:08:01.48#ibcon#read 4, iclass 25, count 0 2006.229.05:08:01.48#ibcon#about to read 5, iclass 25, count 0 2006.229.05:08:01.48#ibcon#read 5, iclass 25, count 0 2006.229.05:08:01.48#ibcon#about to read 6, iclass 25, count 0 2006.229.05:08:01.48#ibcon#read 6, iclass 25, count 0 2006.229.05:08:01.48#ibcon#end of sib2, iclass 25, count 0 2006.229.05:08:01.48#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:08:01.48#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:08:01.48#ibcon#[25=USB\r\n] 2006.229.05:08:01.48#ibcon#*before write, iclass 25, count 0 2006.229.05:08:01.48#ibcon#enter sib2, iclass 25, count 0 2006.229.05:08:01.48#ibcon#flushed, iclass 25, count 0 2006.229.05:08:01.48#ibcon#about to write, iclass 25, count 0 2006.229.05:08:01.48#ibcon#wrote, iclass 25, count 0 2006.229.05:08:01.48#ibcon#about to read 3, iclass 25, count 0 2006.229.05:08:01.51#ibcon#read 3, iclass 25, count 0 2006.229.05:08:01.51#ibcon#about to read 4, iclass 25, count 0 2006.229.05:08:01.51#ibcon#read 4, iclass 25, count 0 2006.229.05:08:01.51#ibcon#about to read 5, iclass 25, count 0 2006.229.05:08:01.51#ibcon#read 5, iclass 25, count 0 2006.229.05:08:01.51#ibcon#about to read 6, iclass 25, count 0 2006.229.05:08:01.51#ibcon#read 6, iclass 25, count 0 2006.229.05:08:01.51#ibcon#end of sib2, iclass 25, count 0 2006.229.05:08:01.51#ibcon#*after write, iclass 25, count 0 2006.229.05:08:01.51#ibcon#*before return 0, iclass 25, count 0 2006.229.05:08:01.51#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:01.51#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:01.51#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:08:01.51#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:08:01.51$vck44/valo=2,534.99 2006.229.05:08:01.51#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:08:01.51#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:08:01.51#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:01.51#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:01.51#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:01.51#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:01.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:08:01.51#ibcon#first serial, iclass 27, count 0 2006.229.05:08:01.51#ibcon#enter sib2, iclass 27, count 0 2006.229.05:08:01.51#ibcon#flushed, iclass 27, count 0 2006.229.05:08:01.51#ibcon#about to write, iclass 27, count 0 2006.229.05:08:01.51#ibcon#wrote, iclass 27, count 0 2006.229.05:08:01.51#ibcon#about to read 3, iclass 27, count 0 2006.229.05:08:01.53#ibcon#read 3, iclass 27, count 0 2006.229.05:08:01.53#ibcon#about to read 4, iclass 27, count 0 2006.229.05:08:01.53#ibcon#read 4, iclass 27, count 0 2006.229.05:08:01.53#ibcon#about to read 5, iclass 27, count 0 2006.229.05:08:01.53#ibcon#read 5, iclass 27, count 0 2006.229.05:08:01.53#ibcon#about to read 6, iclass 27, count 0 2006.229.05:08:01.53#ibcon#read 6, iclass 27, count 0 2006.229.05:08:01.53#ibcon#end of sib2, iclass 27, count 0 2006.229.05:08:01.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:08:01.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:08:01.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:08:01.53#ibcon#*before write, iclass 27, count 0 2006.229.05:08:01.53#ibcon#enter sib2, iclass 27, count 0 2006.229.05:08:01.53#ibcon#flushed, iclass 27, count 0 2006.229.05:08:01.53#ibcon#about to write, iclass 27, count 0 2006.229.05:08:01.53#ibcon#wrote, iclass 27, count 0 2006.229.05:08:01.53#ibcon#about to read 3, iclass 27, count 0 2006.229.05:08:01.57#ibcon#read 3, iclass 27, count 0 2006.229.05:08:01.57#ibcon#about to read 4, iclass 27, count 0 2006.229.05:08:01.57#ibcon#read 4, iclass 27, count 0 2006.229.05:08:01.57#ibcon#about to read 5, iclass 27, count 0 2006.229.05:08:01.57#ibcon#read 5, iclass 27, count 0 2006.229.05:08:01.57#ibcon#about to read 6, iclass 27, count 0 2006.229.05:08:01.57#ibcon#read 6, iclass 27, count 0 2006.229.05:08:01.57#ibcon#end of sib2, iclass 27, count 0 2006.229.05:08:01.57#ibcon#*after write, iclass 27, count 0 2006.229.05:08:01.57#ibcon#*before return 0, iclass 27, count 0 2006.229.05:08:01.57#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:01.57#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:01.57#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:08:01.57#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:08:01.57$vck44/va=2,7 2006.229.05:08:01.57#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.05:08:01.57#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.05:08:01.57#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:01.57#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:01.63#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:01.63#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:01.63#ibcon#enter wrdev, iclass 29, count 2 2006.229.05:08:01.63#ibcon#first serial, iclass 29, count 2 2006.229.05:08:01.63#ibcon#enter sib2, iclass 29, count 2 2006.229.05:08:01.63#ibcon#flushed, iclass 29, count 2 2006.229.05:08:01.63#ibcon#about to write, iclass 29, count 2 2006.229.05:08:01.63#ibcon#wrote, iclass 29, count 2 2006.229.05:08:01.63#ibcon#about to read 3, iclass 29, count 2 2006.229.05:08:01.65#ibcon#read 3, iclass 29, count 2 2006.229.05:08:01.65#ibcon#about to read 4, iclass 29, count 2 2006.229.05:08:01.65#ibcon#read 4, iclass 29, count 2 2006.229.05:08:01.65#ibcon#about to read 5, iclass 29, count 2 2006.229.05:08:01.65#ibcon#read 5, iclass 29, count 2 2006.229.05:08:01.65#ibcon#about to read 6, iclass 29, count 2 2006.229.05:08:01.65#ibcon#read 6, iclass 29, count 2 2006.229.05:08:01.65#ibcon#end of sib2, iclass 29, count 2 2006.229.05:08:01.65#ibcon#*mode == 0, iclass 29, count 2 2006.229.05:08:01.65#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.05:08:01.65#ibcon#[25=AT02-07\r\n] 2006.229.05:08:01.65#ibcon#*before write, iclass 29, count 2 2006.229.05:08:01.65#ibcon#enter sib2, iclass 29, count 2 2006.229.05:08:01.65#ibcon#flushed, iclass 29, count 2 2006.229.05:08:01.65#ibcon#about to write, iclass 29, count 2 2006.229.05:08:01.65#ibcon#wrote, iclass 29, count 2 2006.229.05:08:01.65#ibcon#about to read 3, iclass 29, count 2 2006.229.05:08:01.68#ibcon#read 3, iclass 29, count 2 2006.229.05:08:01.68#ibcon#about to read 4, iclass 29, count 2 2006.229.05:08:01.68#ibcon#read 4, iclass 29, count 2 2006.229.05:08:01.68#ibcon#about to read 5, iclass 29, count 2 2006.229.05:08:01.68#ibcon#read 5, iclass 29, count 2 2006.229.05:08:01.68#ibcon#about to read 6, iclass 29, count 2 2006.229.05:08:01.68#ibcon#read 6, iclass 29, count 2 2006.229.05:08:01.68#ibcon#end of sib2, iclass 29, count 2 2006.229.05:08:01.68#ibcon#*after write, iclass 29, count 2 2006.229.05:08:01.68#ibcon#*before return 0, iclass 29, count 2 2006.229.05:08:01.68#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:01.68#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:01.68#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.05:08:01.68#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:01.68#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:01.80#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:01.80#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:01.80#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:08:01.80#ibcon#first serial, iclass 29, count 0 2006.229.05:08:01.80#ibcon#enter sib2, iclass 29, count 0 2006.229.05:08:01.80#ibcon#flushed, iclass 29, count 0 2006.229.05:08:01.80#ibcon#about to write, iclass 29, count 0 2006.229.05:08:01.80#ibcon#wrote, iclass 29, count 0 2006.229.05:08:01.80#ibcon#about to read 3, iclass 29, count 0 2006.229.05:08:01.82#ibcon#read 3, iclass 29, count 0 2006.229.05:08:01.82#ibcon#about to read 4, iclass 29, count 0 2006.229.05:08:01.82#ibcon#read 4, iclass 29, count 0 2006.229.05:08:01.82#ibcon#about to read 5, iclass 29, count 0 2006.229.05:08:01.82#ibcon#read 5, iclass 29, count 0 2006.229.05:08:01.82#ibcon#about to read 6, iclass 29, count 0 2006.229.05:08:01.82#ibcon#read 6, iclass 29, count 0 2006.229.05:08:01.82#ibcon#end of sib2, iclass 29, count 0 2006.229.05:08:01.82#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:08:01.82#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:08:01.82#ibcon#[25=USB\r\n] 2006.229.05:08:01.82#ibcon#*before write, iclass 29, count 0 2006.229.05:08:01.82#ibcon#enter sib2, iclass 29, count 0 2006.229.05:08:01.82#ibcon#flushed, iclass 29, count 0 2006.229.05:08:01.82#ibcon#about to write, iclass 29, count 0 2006.229.05:08:01.82#ibcon#wrote, iclass 29, count 0 2006.229.05:08:01.82#ibcon#about to read 3, iclass 29, count 0 2006.229.05:08:01.85#ibcon#read 3, iclass 29, count 0 2006.229.05:08:01.85#ibcon#about to read 4, iclass 29, count 0 2006.229.05:08:01.85#ibcon#read 4, iclass 29, count 0 2006.229.05:08:01.85#ibcon#about to read 5, iclass 29, count 0 2006.229.05:08:01.85#ibcon#read 5, iclass 29, count 0 2006.229.05:08:01.85#ibcon#about to read 6, iclass 29, count 0 2006.229.05:08:01.85#ibcon#read 6, iclass 29, count 0 2006.229.05:08:01.85#ibcon#end of sib2, iclass 29, count 0 2006.229.05:08:01.85#ibcon#*after write, iclass 29, count 0 2006.229.05:08:01.85#ibcon#*before return 0, iclass 29, count 0 2006.229.05:08:01.85#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:01.85#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:01.85#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:08:01.85#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:08:01.85$vck44/valo=3,564.99 2006.229.05:08:01.85#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:08:01.85#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:08:01.85#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:01.85#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:01.85#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:01.85#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:01.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:08:01.85#ibcon#first serial, iclass 31, count 0 2006.229.05:08:01.85#ibcon#enter sib2, iclass 31, count 0 2006.229.05:08:01.85#ibcon#flushed, iclass 31, count 0 2006.229.05:08:01.85#ibcon#about to write, iclass 31, count 0 2006.229.05:08:01.85#ibcon#wrote, iclass 31, count 0 2006.229.05:08:01.85#ibcon#about to read 3, iclass 31, count 0 2006.229.05:08:01.87#ibcon#read 3, iclass 31, count 0 2006.229.05:08:01.87#ibcon#about to read 4, iclass 31, count 0 2006.229.05:08:01.87#ibcon#read 4, iclass 31, count 0 2006.229.05:08:01.87#ibcon#about to read 5, iclass 31, count 0 2006.229.05:08:01.87#ibcon#read 5, iclass 31, count 0 2006.229.05:08:01.87#ibcon#about to read 6, iclass 31, count 0 2006.229.05:08:01.87#ibcon#read 6, iclass 31, count 0 2006.229.05:08:01.87#ibcon#end of sib2, iclass 31, count 0 2006.229.05:08:01.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:08:01.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:08:01.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:08:01.87#ibcon#*before write, iclass 31, count 0 2006.229.05:08:01.87#ibcon#enter sib2, iclass 31, count 0 2006.229.05:08:01.87#ibcon#flushed, iclass 31, count 0 2006.229.05:08:01.87#ibcon#about to write, iclass 31, count 0 2006.229.05:08:01.87#ibcon#wrote, iclass 31, count 0 2006.229.05:08:01.87#ibcon#about to read 3, iclass 31, count 0 2006.229.05:08:01.91#ibcon#read 3, iclass 31, count 0 2006.229.05:08:01.91#ibcon#about to read 4, iclass 31, count 0 2006.229.05:08:01.91#ibcon#read 4, iclass 31, count 0 2006.229.05:08:01.91#ibcon#about to read 5, iclass 31, count 0 2006.229.05:08:01.91#ibcon#read 5, iclass 31, count 0 2006.229.05:08:01.91#ibcon#about to read 6, iclass 31, count 0 2006.229.05:08:01.91#ibcon#read 6, iclass 31, count 0 2006.229.05:08:01.91#ibcon#end of sib2, iclass 31, count 0 2006.229.05:08:01.91#ibcon#*after write, iclass 31, count 0 2006.229.05:08:01.91#ibcon#*before return 0, iclass 31, count 0 2006.229.05:08:01.91#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:01.91#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:01.91#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:08:01.91#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:08:01.91$vck44/va=3,6 2006.229.05:08:01.91#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:08:01.91#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:08:01.91#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:01.91#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:01.98#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:01.98#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:01.98#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:08:01.98#ibcon#first serial, iclass 33, count 2 2006.229.05:08:01.98#ibcon#enter sib2, iclass 33, count 2 2006.229.05:08:01.98#ibcon#flushed, iclass 33, count 2 2006.229.05:08:01.98#ibcon#about to write, iclass 33, count 2 2006.229.05:08:01.98#ibcon#wrote, iclass 33, count 2 2006.229.05:08:01.98#ibcon#about to read 3, iclass 33, count 2 2006.229.05:08:02.00#ibcon#read 3, iclass 33, count 2 2006.229.05:08:02.00#ibcon#about to read 4, iclass 33, count 2 2006.229.05:08:02.00#ibcon#read 4, iclass 33, count 2 2006.229.05:08:02.00#ibcon#about to read 5, iclass 33, count 2 2006.229.05:08:02.00#ibcon#read 5, iclass 33, count 2 2006.229.05:08:02.00#ibcon#about to read 6, iclass 33, count 2 2006.229.05:08:02.00#ibcon#read 6, iclass 33, count 2 2006.229.05:08:02.00#ibcon#end of sib2, iclass 33, count 2 2006.229.05:08:02.00#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:08:02.00#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:08:02.00#ibcon#[25=AT03-06\r\n] 2006.229.05:08:02.00#ibcon#*before write, iclass 33, count 2 2006.229.05:08:02.00#ibcon#enter sib2, iclass 33, count 2 2006.229.05:08:02.00#ibcon#flushed, iclass 33, count 2 2006.229.05:08:02.00#ibcon#about to write, iclass 33, count 2 2006.229.05:08:02.00#ibcon#wrote, iclass 33, count 2 2006.229.05:08:02.00#ibcon#about to read 3, iclass 33, count 2 2006.229.05:08:02.03#ibcon#read 3, iclass 33, count 2 2006.229.05:08:02.03#ibcon#about to read 4, iclass 33, count 2 2006.229.05:08:02.03#ibcon#read 4, iclass 33, count 2 2006.229.05:08:02.03#ibcon#about to read 5, iclass 33, count 2 2006.229.05:08:02.03#ibcon#read 5, iclass 33, count 2 2006.229.05:08:02.03#ibcon#about to read 6, iclass 33, count 2 2006.229.05:08:02.03#ibcon#read 6, iclass 33, count 2 2006.229.05:08:02.03#ibcon#end of sib2, iclass 33, count 2 2006.229.05:08:02.03#ibcon#*after write, iclass 33, count 2 2006.229.05:08:02.03#ibcon#*before return 0, iclass 33, count 2 2006.229.05:08:02.03#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:02.03#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:02.03#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:08:02.03#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:02.03#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:02.15#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:02.15#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:02.15#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:08:02.15#ibcon#first serial, iclass 33, count 0 2006.229.05:08:02.15#ibcon#enter sib2, iclass 33, count 0 2006.229.05:08:02.15#ibcon#flushed, iclass 33, count 0 2006.229.05:08:02.15#ibcon#about to write, iclass 33, count 0 2006.229.05:08:02.15#ibcon#wrote, iclass 33, count 0 2006.229.05:08:02.15#ibcon#about to read 3, iclass 33, count 0 2006.229.05:08:02.17#ibcon#read 3, iclass 33, count 0 2006.229.05:08:02.17#ibcon#about to read 4, iclass 33, count 0 2006.229.05:08:02.17#ibcon#read 4, iclass 33, count 0 2006.229.05:08:02.17#ibcon#about to read 5, iclass 33, count 0 2006.229.05:08:02.17#ibcon#read 5, iclass 33, count 0 2006.229.05:08:02.17#ibcon#about to read 6, iclass 33, count 0 2006.229.05:08:02.17#ibcon#read 6, iclass 33, count 0 2006.229.05:08:02.17#ibcon#end of sib2, iclass 33, count 0 2006.229.05:08:02.17#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:08:02.17#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:08:02.17#ibcon#[25=USB\r\n] 2006.229.05:08:02.17#ibcon#*before write, iclass 33, count 0 2006.229.05:08:02.17#ibcon#enter sib2, iclass 33, count 0 2006.229.05:08:02.17#ibcon#flushed, iclass 33, count 0 2006.229.05:08:02.17#ibcon#about to write, iclass 33, count 0 2006.229.05:08:02.17#ibcon#wrote, iclass 33, count 0 2006.229.05:08:02.17#ibcon#about to read 3, iclass 33, count 0 2006.229.05:08:02.20#ibcon#read 3, iclass 33, count 0 2006.229.05:08:02.20#ibcon#about to read 4, iclass 33, count 0 2006.229.05:08:02.20#ibcon#read 4, iclass 33, count 0 2006.229.05:08:02.20#ibcon#about to read 5, iclass 33, count 0 2006.229.05:08:02.20#ibcon#read 5, iclass 33, count 0 2006.229.05:08:02.20#ibcon#about to read 6, iclass 33, count 0 2006.229.05:08:02.20#ibcon#read 6, iclass 33, count 0 2006.229.05:08:02.20#ibcon#end of sib2, iclass 33, count 0 2006.229.05:08:02.20#ibcon#*after write, iclass 33, count 0 2006.229.05:08:02.20#ibcon#*before return 0, iclass 33, count 0 2006.229.05:08:02.20#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:02.20#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:02.20#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:08:02.20#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:08:02.20$vck44/valo=4,624.99 2006.229.05:08:02.20#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:08:02.20#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:08:02.20#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:02.20#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:02.20#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:02.20#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:02.20#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:08:02.20#ibcon#first serial, iclass 35, count 0 2006.229.05:08:02.20#ibcon#enter sib2, iclass 35, count 0 2006.229.05:08:02.20#ibcon#flushed, iclass 35, count 0 2006.229.05:08:02.20#ibcon#about to write, iclass 35, count 0 2006.229.05:08:02.20#ibcon#wrote, iclass 35, count 0 2006.229.05:08:02.20#ibcon#about to read 3, iclass 35, count 0 2006.229.05:08:02.22#ibcon#read 3, iclass 35, count 0 2006.229.05:08:02.22#ibcon#about to read 4, iclass 35, count 0 2006.229.05:08:02.22#ibcon#read 4, iclass 35, count 0 2006.229.05:08:02.22#ibcon#about to read 5, iclass 35, count 0 2006.229.05:08:02.22#ibcon#read 5, iclass 35, count 0 2006.229.05:08:02.22#ibcon#about to read 6, iclass 35, count 0 2006.229.05:08:02.22#ibcon#read 6, iclass 35, count 0 2006.229.05:08:02.22#ibcon#end of sib2, iclass 35, count 0 2006.229.05:08:02.22#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:08:02.22#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:08:02.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:08:02.22#ibcon#*before write, iclass 35, count 0 2006.229.05:08:02.22#ibcon#enter sib2, iclass 35, count 0 2006.229.05:08:02.22#ibcon#flushed, iclass 35, count 0 2006.229.05:08:02.22#ibcon#about to write, iclass 35, count 0 2006.229.05:08:02.22#ibcon#wrote, iclass 35, count 0 2006.229.05:08:02.22#ibcon#about to read 3, iclass 35, count 0 2006.229.05:08:02.26#ibcon#read 3, iclass 35, count 0 2006.229.05:08:02.26#ibcon#about to read 4, iclass 35, count 0 2006.229.05:08:02.26#ibcon#read 4, iclass 35, count 0 2006.229.05:08:02.26#ibcon#about to read 5, iclass 35, count 0 2006.229.05:08:02.26#ibcon#read 5, iclass 35, count 0 2006.229.05:08:02.26#ibcon#about to read 6, iclass 35, count 0 2006.229.05:08:02.26#ibcon#read 6, iclass 35, count 0 2006.229.05:08:02.26#ibcon#end of sib2, iclass 35, count 0 2006.229.05:08:02.26#ibcon#*after write, iclass 35, count 0 2006.229.05:08:02.26#ibcon#*before return 0, iclass 35, count 0 2006.229.05:08:02.26#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:02.26#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:02.26#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:08:02.26#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:08:02.26$vck44/va=4,7 2006.229.05:08:02.26#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:08:02.26#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:08:02.26#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:02.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:02.32#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:02.32#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:02.32#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:08:02.32#ibcon#first serial, iclass 37, count 2 2006.229.05:08:02.32#ibcon#enter sib2, iclass 37, count 2 2006.229.05:08:02.32#ibcon#flushed, iclass 37, count 2 2006.229.05:08:02.32#ibcon#about to write, iclass 37, count 2 2006.229.05:08:02.32#ibcon#wrote, iclass 37, count 2 2006.229.05:08:02.32#ibcon#about to read 3, iclass 37, count 2 2006.229.05:08:02.34#ibcon#read 3, iclass 37, count 2 2006.229.05:08:02.34#ibcon#about to read 4, iclass 37, count 2 2006.229.05:08:02.34#ibcon#read 4, iclass 37, count 2 2006.229.05:08:02.34#ibcon#about to read 5, iclass 37, count 2 2006.229.05:08:02.34#ibcon#read 5, iclass 37, count 2 2006.229.05:08:02.34#ibcon#about to read 6, iclass 37, count 2 2006.229.05:08:02.34#ibcon#read 6, iclass 37, count 2 2006.229.05:08:02.34#ibcon#end of sib2, iclass 37, count 2 2006.229.05:08:02.34#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:08:02.34#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:08:02.34#ibcon#[25=AT04-07\r\n] 2006.229.05:08:02.34#ibcon#*before write, iclass 37, count 2 2006.229.05:08:02.34#ibcon#enter sib2, iclass 37, count 2 2006.229.05:08:02.34#ibcon#flushed, iclass 37, count 2 2006.229.05:08:02.34#ibcon#about to write, iclass 37, count 2 2006.229.05:08:02.34#ibcon#wrote, iclass 37, count 2 2006.229.05:08:02.34#ibcon#about to read 3, iclass 37, count 2 2006.229.05:08:02.37#ibcon#read 3, iclass 37, count 2 2006.229.05:08:02.37#ibcon#about to read 4, iclass 37, count 2 2006.229.05:08:02.37#ibcon#read 4, iclass 37, count 2 2006.229.05:08:02.37#ibcon#about to read 5, iclass 37, count 2 2006.229.05:08:02.37#ibcon#read 5, iclass 37, count 2 2006.229.05:08:02.37#ibcon#about to read 6, iclass 37, count 2 2006.229.05:08:02.37#ibcon#read 6, iclass 37, count 2 2006.229.05:08:02.37#ibcon#end of sib2, iclass 37, count 2 2006.229.05:08:02.37#ibcon#*after write, iclass 37, count 2 2006.229.05:08:02.37#ibcon#*before return 0, iclass 37, count 2 2006.229.05:08:02.41#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:02.41#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:02.41#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:08:02.41#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:02.41#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:02.53#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:02.53#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:02.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:08:02.53#ibcon#first serial, iclass 37, count 0 2006.229.05:08:02.53#ibcon#enter sib2, iclass 37, count 0 2006.229.05:08:02.53#ibcon#flushed, iclass 37, count 0 2006.229.05:08:02.53#ibcon#about to write, iclass 37, count 0 2006.229.05:08:02.53#ibcon#wrote, iclass 37, count 0 2006.229.05:08:02.53#ibcon#about to read 3, iclass 37, count 0 2006.229.05:08:02.55#ibcon#read 3, iclass 37, count 0 2006.229.05:08:02.55#ibcon#about to read 4, iclass 37, count 0 2006.229.05:08:02.55#ibcon#read 4, iclass 37, count 0 2006.229.05:08:02.55#ibcon#about to read 5, iclass 37, count 0 2006.229.05:08:02.55#ibcon#read 5, iclass 37, count 0 2006.229.05:08:02.55#ibcon#about to read 6, iclass 37, count 0 2006.229.05:08:02.55#ibcon#read 6, iclass 37, count 0 2006.229.05:08:02.55#ibcon#end of sib2, iclass 37, count 0 2006.229.05:08:02.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:08:02.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:08:02.55#ibcon#[25=USB\r\n] 2006.229.05:08:02.55#ibcon#*before write, iclass 37, count 0 2006.229.05:08:02.55#ibcon#enter sib2, iclass 37, count 0 2006.229.05:08:02.55#ibcon#flushed, iclass 37, count 0 2006.229.05:08:02.55#ibcon#about to write, iclass 37, count 0 2006.229.05:08:02.55#ibcon#wrote, iclass 37, count 0 2006.229.05:08:02.55#ibcon#about to read 3, iclass 37, count 0 2006.229.05:08:02.58#ibcon#read 3, iclass 37, count 0 2006.229.05:08:02.58#ibcon#about to read 4, iclass 37, count 0 2006.229.05:08:02.58#ibcon#read 4, iclass 37, count 0 2006.229.05:08:02.58#ibcon#about to read 5, iclass 37, count 0 2006.229.05:08:02.58#ibcon#read 5, iclass 37, count 0 2006.229.05:08:02.58#ibcon#about to read 6, iclass 37, count 0 2006.229.05:08:02.58#ibcon#read 6, iclass 37, count 0 2006.229.05:08:02.58#ibcon#end of sib2, iclass 37, count 0 2006.229.05:08:02.58#ibcon#*after write, iclass 37, count 0 2006.229.05:08:02.58#ibcon#*before return 0, iclass 37, count 0 2006.229.05:08:02.58#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:02.58#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:02.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:08:02.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:08:02.58$vck44/valo=5,734.99 2006.229.05:08:02.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:08:02.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:08:02.58#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:02.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:02.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:02.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:02.58#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:08:02.58#ibcon#first serial, iclass 39, count 0 2006.229.05:08:02.58#ibcon#enter sib2, iclass 39, count 0 2006.229.05:08:02.58#ibcon#flushed, iclass 39, count 0 2006.229.05:08:02.58#ibcon#about to write, iclass 39, count 0 2006.229.05:08:02.58#ibcon#wrote, iclass 39, count 0 2006.229.05:08:02.58#ibcon#about to read 3, iclass 39, count 0 2006.229.05:08:02.60#ibcon#read 3, iclass 39, count 0 2006.229.05:08:02.60#ibcon#about to read 4, iclass 39, count 0 2006.229.05:08:02.60#ibcon#read 4, iclass 39, count 0 2006.229.05:08:02.60#ibcon#about to read 5, iclass 39, count 0 2006.229.05:08:02.60#ibcon#read 5, iclass 39, count 0 2006.229.05:08:02.60#ibcon#about to read 6, iclass 39, count 0 2006.229.05:08:02.60#ibcon#read 6, iclass 39, count 0 2006.229.05:08:02.60#ibcon#end of sib2, iclass 39, count 0 2006.229.05:08:02.60#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:08:02.60#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:08:02.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:08:02.60#ibcon#*before write, iclass 39, count 0 2006.229.05:08:02.60#ibcon#enter sib2, iclass 39, count 0 2006.229.05:08:02.60#ibcon#flushed, iclass 39, count 0 2006.229.05:08:02.60#ibcon#about to write, iclass 39, count 0 2006.229.05:08:02.60#ibcon#wrote, iclass 39, count 0 2006.229.05:08:02.60#ibcon#about to read 3, iclass 39, count 0 2006.229.05:08:02.64#ibcon#read 3, iclass 39, count 0 2006.229.05:08:02.64#ibcon#about to read 4, iclass 39, count 0 2006.229.05:08:02.64#ibcon#read 4, iclass 39, count 0 2006.229.05:08:02.64#ibcon#about to read 5, iclass 39, count 0 2006.229.05:08:02.64#ibcon#read 5, iclass 39, count 0 2006.229.05:08:02.64#ibcon#about to read 6, iclass 39, count 0 2006.229.05:08:02.64#ibcon#read 6, iclass 39, count 0 2006.229.05:08:02.64#ibcon#end of sib2, iclass 39, count 0 2006.229.05:08:02.64#ibcon#*after write, iclass 39, count 0 2006.229.05:08:02.64#ibcon#*before return 0, iclass 39, count 0 2006.229.05:08:02.64#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:02.64#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:02.64#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:08:02.64#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:08:02.64$vck44/va=5,4 2006.229.05:08:02.64#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:08:02.64#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:08:02.64#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:02.64#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:02.70#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:02.70#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:02.70#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:08:02.70#ibcon#first serial, iclass 3, count 2 2006.229.05:08:02.70#ibcon#enter sib2, iclass 3, count 2 2006.229.05:08:02.70#ibcon#flushed, iclass 3, count 2 2006.229.05:08:02.70#ibcon#about to write, iclass 3, count 2 2006.229.05:08:02.70#ibcon#wrote, iclass 3, count 2 2006.229.05:08:02.70#ibcon#about to read 3, iclass 3, count 2 2006.229.05:08:02.72#ibcon#read 3, iclass 3, count 2 2006.229.05:08:02.72#ibcon#about to read 4, iclass 3, count 2 2006.229.05:08:02.72#ibcon#read 4, iclass 3, count 2 2006.229.05:08:02.72#ibcon#about to read 5, iclass 3, count 2 2006.229.05:08:02.72#ibcon#read 5, iclass 3, count 2 2006.229.05:08:02.72#ibcon#about to read 6, iclass 3, count 2 2006.229.05:08:02.72#ibcon#read 6, iclass 3, count 2 2006.229.05:08:02.72#ibcon#end of sib2, iclass 3, count 2 2006.229.05:08:02.72#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:08:02.72#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:08:02.72#ibcon#[25=AT05-04\r\n] 2006.229.05:08:02.72#ibcon#*before write, iclass 3, count 2 2006.229.05:08:02.72#ibcon#enter sib2, iclass 3, count 2 2006.229.05:08:02.72#ibcon#flushed, iclass 3, count 2 2006.229.05:08:02.72#ibcon#about to write, iclass 3, count 2 2006.229.05:08:02.72#ibcon#wrote, iclass 3, count 2 2006.229.05:08:02.72#ibcon#about to read 3, iclass 3, count 2 2006.229.05:08:02.75#ibcon#read 3, iclass 3, count 2 2006.229.05:08:02.75#ibcon#about to read 4, iclass 3, count 2 2006.229.05:08:02.75#ibcon#read 4, iclass 3, count 2 2006.229.05:08:02.75#ibcon#about to read 5, iclass 3, count 2 2006.229.05:08:02.75#ibcon#read 5, iclass 3, count 2 2006.229.05:08:02.75#ibcon#about to read 6, iclass 3, count 2 2006.229.05:08:02.75#ibcon#read 6, iclass 3, count 2 2006.229.05:08:02.75#ibcon#end of sib2, iclass 3, count 2 2006.229.05:08:02.75#ibcon#*after write, iclass 3, count 2 2006.229.05:08:02.75#ibcon#*before return 0, iclass 3, count 2 2006.229.05:08:02.75#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:02.75#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:02.75#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:08:02.75#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:02.75#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:02.87#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:02.87#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:02.87#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:08:02.87#ibcon#first serial, iclass 3, count 0 2006.229.05:08:02.87#ibcon#enter sib2, iclass 3, count 0 2006.229.05:08:02.87#ibcon#flushed, iclass 3, count 0 2006.229.05:08:02.87#ibcon#about to write, iclass 3, count 0 2006.229.05:08:02.87#ibcon#wrote, iclass 3, count 0 2006.229.05:08:02.87#ibcon#about to read 3, iclass 3, count 0 2006.229.05:08:02.89#ibcon#read 3, iclass 3, count 0 2006.229.05:08:02.89#ibcon#about to read 4, iclass 3, count 0 2006.229.05:08:02.89#ibcon#read 4, iclass 3, count 0 2006.229.05:08:02.89#ibcon#about to read 5, iclass 3, count 0 2006.229.05:08:02.89#ibcon#read 5, iclass 3, count 0 2006.229.05:08:02.89#ibcon#about to read 6, iclass 3, count 0 2006.229.05:08:02.89#ibcon#read 6, iclass 3, count 0 2006.229.05:08:02.89#ibcon#end of sib2, iclass 3, count 0 2006.229.05:08:02.89#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:08:02.89#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:08:02.89#ibcon#[25=USB\r\n] 2006.229.05:08:02.89#ibcon#*before write, iclass 3, count 0 2006.229.05:08:02.89#ibcon#enter sib2, iclass 3, count 0 2006.229.05:08:02.89#ibcon#flushed, iclass 3, count 0 2006.229.05:08:02.89#ibcon#about to write, iclass 3, count 0 2006.229.05:08:02.89#ibcon#wrote, iclass 3, count 0 2006.229.05:08:02.89#ibcon#about to read 3, iclass 3, count 0 2006.229.05:08:02.92#ibcon#read 3, iclass 3, count 0 2006.229.05:08:02.92#ibcon#about to read 4, iclass 3, count 0 2006.229.05:08:02.92#ibcon#read 4, iclass 3, count 0 2006.229.05:08:02.92#ibcon#about to read 5, iclass 3, count 0 2006.229.05:08:02.92#ibcon#read 5, iclass 3, count 0 2006.229.05:08:02.92#ibcon#about to read 6, iclass 3, count 0 2006.229.05:08:02.92#ibcon#read 6, iclass 3, count 0 2006.229.05:08:02.92#ibcon#end of sib2, iclass 3, count 0 2006.229.05:08:02.92#ibcon#*after write, iclass 3, count 0 2006.229.05:08:02.92#ibcon#*before return 0, iclass 3, count 0 2006.229.05:08:02.92#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:02.92#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:02.92#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:08:02.92#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:08:02.92$vck44/valo=6,814.99 2006.229.05:08:02.92#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:08:02.92#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:08:02.92#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:02.92#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:02.92#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:02.92#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:02.92#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:08:02.92#ibcon#first serial, iclass 5, count 0 2006.229.05:08:02.92#ibcon#enter sib2, iclass 5, count 0 2006.229.05:08:02.92#ibcon#flushed, iclass 5, count 0 2006.229.05:08:02.92#ibcon#about to write, iclass 5, count 0 2006.229.05:08:02.92#ibcon#wrote, iclass 5, count 0 2006.229.05:08:02.92#ibcon#about to read 3, iclass 5, count 0 2006.229.05:08:02.94#ibcon#read 3, iclass 5, count 0 2006.229.05:08:02.94#ibcon#about to read 4, iclass 5, count 0 2006.229.05:08:02.94#ibcon#read 4, iclass 5, count 0 2006.229.05:08:02.94#ibcon#about to read 5, iclass 5, count 0 2006.229.05:08:02.94#ibcon#read 5, iclass 5, count 0 2006.229.05:08:02.94#ibcon#about to read 6, iclass 5, count 0 2006.229.05:08:02.94#ibcon#read 6, iclass 5, count 0 2006.229.05:08:02.94#ibcon#end of sib2, iclass 5, count 0 2006.229.05:08:02.94#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:08:02.94#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:08:02.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:08:02.94#ibcon#*before write, iclass 5, count 0 2006.229.05:08:02.94#ibcon#enter sib2, iclass 5, count 0 2006.229.05:08:02.94#ibcon#flushed, iclass 5, count 0 2006.229.05:08:02.94#ibcon#about to write, iclass 5, count 0 2006.229.05:08:02.94#ibcon#wrote, iclass 5, count 0 2006.229.05:08:02.94#ibcon#about to read 3, iclass 5, count 0 2006.229.05:08:02.98#ibcon#read 3, iclass 5, count 0 2006.229.05:08:02.98#ibcon#about to read 4, iclass 5, count 0 2006.229.05:08:02.98#ibcon#read 4, iclass 5, count 0 2006.229.05:08:02.98#ibcon#about to read 5, iclass 5, count 0 2006.229.05:08:02.98#ibcon#read 5, iclass 5, count 0 2006.229.05:08:02.98#ibcon#about to read 6, iclass 5, count 0 2006.229.05:08:02.98#ibcon#read 6, iclass 5, count 0 2006.229.05:08:02.98#ibcon#end of sib2, iclass 5, count 0 2006.229.05:08:02.98#ibcon#*after write, iclass 5, count 0 2006.229.05:08:02.98#ibcon#*before return 0, iclass 5, count 0 2006.229.05:08:02.98#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:02.98#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:02.98#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:08:02.98#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:08:02.98$vck44/va=6,4 2006.229.05:08:02.98#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:08:02.98#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:08:02.98#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:02.98#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:03.04#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:03.04#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:03.04#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:08:03.04#ibcon#first serial, iclass 7, count 2 2006.229.05:08:03.04#ibcon#enter sib2, iclass 7, count 2 2006.229.05:08:03.04#ibcon#flushed, iclass 7, count 2 2006.229.05:08:03.04#ibcon#about to write, iclass 7, count 2 2006.229.05:08:03.04#ibcon#wrote, iclass 7, count 2 2006.229.05:08:03.04#ibcon#about to read 3, iclass 7, count 2 2006.229.05:08:03.06#ibcon#read 3, iclass 7, count 2 2006.229.05:08:03.06#ibcon#about to read 4, iclass 7, count 2 2006.229.05:08:03.06#ibcon#read 4, iclass 7, count 2 2006.229.05:08:03.06#ibcon#about to read 5, iclass 7, count 2 2006.229.05:08:03.06#ibcon#read 5, iclass 7, count 2 2006.229.05:08:03.06#ibcon#about to read 6, iclass 7, count 2 2006.229.05:08:03.06#ibcon#read 6, iclass 7, count 2 2006.229.05:08:03.06#ibcon#end of sib2, iclass 7, count 2 2006.229.05:08:03.06#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:08:03.06#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:08:03.06#ibcon#[25=AT06-04\r\n] 2006.229.05:08:03.06#ibcon#*before write, iclass 7, count 2 2006.229.05:08:03.06#ibcon#enter sib2, iclass 7, count 2 2006.229.05:08:03.06#ibcon#flushed, iclass 7, count 2 2006.229.05:08:03.06#ibcon#about to write, iclass 7, count 2 2006.229.05:08:03.06#ibcon#wrote, iclass 7, count 2 2006.229.05:08:03.06#ibcon#about to read 3, iclass 7, count 2 2006.229.05:08:03.09#ibcon#read 3, iclass 7, count 2 2006.229.05:08:03.09#ibcon#about to read 4, iclass 7, count 2 2006.229.05:08:03.09#ibcon#read 4, iclass 7, count 2 2006.229.05:08:03.09#ibcon#about to read 5, iclass 7, count 2 2006.229.05:08:03.09#ibcon#read 5, iclass 7, count 2 2006.229.05:08:03.09#ibcon#about to read 6, iclass 7, count 2 2006.229.05:08:03.09#ibcon#read 6, iclass 7, count 2 2006.229.05:08:03.09#ibcon#end of sib2, iclass 7, count 2 2006.229.05:08:03.09#ibcon#*after write, iclass 7, count 2 2006.229.05:08:03.09#ibcon#*before return 0, iclass 7, count 2 2006.229.05:08:03.09#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:03.09#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:03.09#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:08:03.09#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:03.09#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:03.21#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:03.21#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:03.21#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:08:03.21#ibcon#first serial, iclass 7, count 0 2006.229.05:08:03.21#ibcon#enter sib2, iclass 7, count 0 2006.229.05:08:03.21#ibcon#flushed, iclass 7, count 0 2006.229.05:08:03.21#ibcon#about to write, iclass 7, count 0 2006.229.05:08:03.21#ibcon#wrote, iclass 7, count 0 2006.229.05:08:03.21#ibcon#about to read 3, iclass 7, count 0 2006.229.05:08:03.23#ibcon#read 3, iclass 7, count 0 2006.229.05:08:03.23#ibcon#about to read 4, iclass 7, count 0 2006.229.05:08:03.23#ibcon#read 4, iclass 7, count 0 2006.229.05:08:03.23#ibcon#about to read 5, iclass 7, count 0 2006.229.05:08:03.23#ibcon#read 5, iclass 7, count 0 2006.229.05:08:03.23#ibcon#about to read 6, iclass 7, count 0 2006.229.05:08:03.23#ibcon#read 6, iclass 7, count 0 2006.229.05:08:03.23#ibcon#end of sib2, iclass 7, count 0 2006.229.05:08:03.23#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:08:03.23#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:08:03.23#ibcon#[25=USB\r\n] 2006.229.05:08:03.23#ibcon#*before write, iclass 7, count 0 2006.229.05:08:03.23#ibcon#enter sib2, iclass 7, count 0 2006.229.05:08:03.23#ibcon#flushed, iclass 7, count 0 2006.229.05:08:03.23#ibcon#about to write, iclass 7, count 0 2006.229.05:08:03.23#ibcon#wrote, iclass 7, count 0 2006.229.05:08:03.23#ibcon#about to read 3, iclass 7, count 0 2006.229.05:08:03.26#ibcon#read 3, iclass 7, count 0 2006.229.05:08:03.26#ibcon#about to read 4, iclass 7, count 0 2006.229.05:08:03.26#ibcon#read 4, iclass 7, count 0 2006.229.05:08:03.26#ibcon#about to read 5, iclass 7, count 0 2006.229.05:08:03.26#ibcon#read 5, iclass 7, count 0 2006.229.05:08:03.26#ibcon#about to read 6, iclass 7, count 0 2006.229.05:08:03.26#ibcon#read 6, iclass 7, count 0 2006.229.05:08:03.26#ibcon#end of sib2, iclass 7, count 0 2006.229.05:08:03.26#ibcon#*after write, iclass 7, count 0 2006.229.05:08:03.26#ibcon#*before return 0, iclass 7, count 0 2006.229.05:08:03.26#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:03.26#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:03.26#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:08:03.26#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:08:03.26$vck44/valo=7,864.99 2006.229.05:08:03.26#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:08:03.26#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:08:03.26#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:03.26#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:03.26#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:03.26#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:03.26#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:08:03.26#ibcon#first serial, iclass 11, count 0 2006.229.05:08:03.26#ibcon#enter sib2, iclass 11, count 0 2006.229.05:08:03.26#ibcon#flushed, iclass 11, count 0 2006.229.05:08:03.26#ibcon#about to write, iclass 11, count 0 2006.229.05:08:03.26#ibcon#wrote, iclass 11, count 0 2006.229.05:08:03.26#ibcon#about to read 3, iclass 11, count 0 2006.229.05:08:03.28#ibcon#read 3, iclass 11, count 0 2006.229.05:08:03.28#ibcon#about to read 4, iclass 11, count 0 2006.229.05:08:03.28#ibcon#read 4, iclass 11, count 0 2006.229.05:08:03.28#ibcon#about to read 5, iclass 11, count 0 2006.229.05:08:03.28#ibcon#read 5, iclass 11, count 0 2006.229.05:08:03.28#ibcon#about to read 6, iclass 11, count 0 2006.229.05:08:03.28#ibcon#read 6, iclass 11, count 0 2006.229.05:08:03.28#ibcon#end of sib2, iclass 11, count 0 2006.229.05:08:03.28#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:08:03.28#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:08:03.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:08:03.28#ibcon#*before write, iclass 11, count 0 2006.229.05:08:03.28#ibcon#enter sib2, iclass 11, count 0 2006.229.05:08:03.28#ibcon#flushed, iclass 11, count 0 2006.229.05:08:03.28#ibcon#about to write, iclass 11, count 0 2006.229.05:08:03.28#ibcon#wrote, iclass 11, count 0 2006.229.05:08:03.28#ibcon#about to read 3, iclass 11, count 0 2006.229.05:08:03.32#ibcon#read 3, iclass 11, count 0 2006.229.05:08:03.32#ibcon#about to read 4, iclass 11, count 0 2006.229.05:08:03.32#ibcon#read 4, iclass 11, count 0 2006.229.05:08:03.32#ibcon#about to read 5, iclass 11, count 0 2006.229.05:08:03.32#ibcon#read 5, iclass 11, count 0 2006.229.05:08:03.32#ibcon#about to read 6, iclass 11, count 0 2006.229.05:08:03.32#ibcon#read 6, iclass 11, count 0 2006.229.05:08:03.32#ibcon#end of sib2, iclass 11, count 0 2006.229.05:08:03.32#ibcon#*after write, iclass 11, count 0 2006.229.05:08:03.32#ibcon#*before return 0, iclass 11, count 0 2006.229.05:08:03.32#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:03.32#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:03.32#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:08:03.32#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:08:03.32$vck44/va=7,5 2006.229.05:08:03.32#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:08:03.32#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:08:03.32#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:03.32#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:03.38#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:03.38#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:03.38#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:08:03.38#ibcon#first serial, iclass 13, count 2 2006.229.05:08:03.38#ibcon#enter sib2, iclass 13, count 2 2006.229.05:08:03.38#ibcon#flushed, iclass 13, count 2 2006.229.05:08:03.38#ibcon#about to write, iclass 13, count 2 2006.229.05:08:03.38#ibcon#wrote, iclass 13, count 2 2006.229.05:08:03.38#ibcon#about to read 3, iclass 13, count 2 2006.229.05:08:03.40#ibcon#read 3, iclass 13, count 2 2006.229.05:08:03.40#ibcon#about to read 4, iclass 13, count 2 2006.229.05:08:03.40#ibcon#read 4, iclass 13, count 2 2006.229.05:08:03.40#ibcon#about to read 5, iclass 13, count 2 2006.229.05:08:03.40#ibcon#read 5, iclass 13, count 2 2006.229.05:08:03.40#ibcon#about to read 6, iclass 13, count 2 2006.229.05:08:03.40#ibcon#read 6, iclass 13, count 2 2006.229.05:08:03.40#ibcon#end of sib2, iclass 13, count 2 2006.229.05:08:03.40#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:08:03.40#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:08:03.40#ibcon#[25=AT07-05\r\n] 2006.229.05:08:03.40#ibcon#*before write, iclass 13, count 2 2006.229.05:08:03.40#ibcon#enter sib2, iclass 13, count 2 2006.229.05:08:03.40#ibcon#flushed, iclass 13, count 2 2006.229.05:08:03.40#ibcon#about to write, iclass 13, count 2 2006.229.05:08:03.40#ibcon#wrote, iclass 13, count 2 2006.229.05:08:03.40#ibcon#about to read 3, iclass 13, count 2 2006.229.05:08:03.43#ibcon#read 3, iclass 13, count 2 2006.229.05:08:03.43#ibcon#about to read 4, iclass 13, count 2 2006.229.05:08:03.43#ibcon#read 4, iclass 13, count 2 2006.229.05:08:03.43#ibcon#about to read 5, iclass 13, count 2 2006.229.05:08:03.43#ibcon#read 5, iclass 13, count 2 2006.229.05:08:03.43#ibcon#about to read 6, iclass 13, count 2 2006.229.05:08:03.43#ibcon#read 6, iclass 13, count 2 2006.229.05:08:03.43#ibcon#end of sib2, iclass 13, count 2 2006.229.05:08:03.43#ibcon#*after write, iclass 13, count 2 2006.229.05:08:03.43#ibcon#*before return 0, iclass 13, count 2 2006.229.05:08:03.43#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:03.43#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:03.43#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:08:03.43#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:03.43#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:03.55#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:03.55#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:03.55#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:08:03.55#ibcon#first serial, iclass 13, count 0 2006.229.05:08:03.55#ibcon#enter sib2, iclass 13, count 0 2006.229.05:08:03.55#ibcon#flushed, iclass 13, count 0 2006.229.05:08:03.55#ibcon#about to write, iclass 13, count 0 2006.229.05:08:03.55#ibcon#wrote, iclass 13, count 0 2006.229.05:08:03.55#ibcon#about to read 3, iclass 13, count 0 2006.229.05:08:03.57#ibcon#read 3, iclass 13, count 0 2006.229.05:08:03.57#ibcon#about to read 4, iclass 13, count 0 2006.229.05:08:03.57#ibcon#read 4, iclass 13, count 0 2006.229.05:08:03.57#ibcon#about to read 5, iclass 13, count 0 2006.229.05:08:03.57#ibcon#read 5, iclass 13, count 0 2006.229.05:08:03.57#ibcon#about to read 6, iclass 13, count 0 2006.229.05:08:03.57#ibcon#read 6, iclass 13, count 0 2006.229.05:08:03.57#ibcon#end of sib2, iclass 13, count 0 2006.229.05:08:03.57#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:08:03.57#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:08:03.57#ibcon#[25=USB\r\n] 2006.229.05:08:03.57#ibcon#*before write, iclass 13, count 0 2006.229.05:08:03.57#ibcon#enter sib2, iclass 13, count 0 2006.229.05:08:03.57#ibcon#flushed, iclass 13, count 0 2006.229.05:08:03.57#ibcon#about to write, iclass 13, count 0 2006.229.05:08:03.57#ibcon#wrote, iclass 13, count 0 2006.229.05:08:03.57#ibcon#about to read 3, iclass 13, count 0 2006.229.05:08:03.60#ibcon#read 3, iclass 13, count 0 2006.229.05:08:03.60#ibcon#about to read 4, iclass 13, count 0 2006.229.05:08:03.60#ibcon#read 4, iclass 13, count 0 2006.229.05:08:03.60#ibcon#about to read 5, iclass 13, count 0 2006.229.05:08:03.60#ibcon#read 5, iclass 13, count 0 2006.229.05:08:03.60#ibcon#about to read 6, iclass 13, count 0 2006.229.05:08:03.60#ibcon#read 6, iclass 13, count 0 2006.229.05:08:03.60#ibcon#end of sib2, iclass 13, count 0 2006.229.05:08:03.60#ibcon#*after write, iclass 13, count 0 2006.229.05:08:03.60#ibcon#*before return 0, iclass 13, count 0 2006.229.05:08:03.60#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:03.60#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:03.60#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:08:03.60#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:08:03.60$vck44/valo=8,884.99 2006.229.05:08:03.60#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:08:03.60#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:08:03.60#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:03.60#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:03.60#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:03.60#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:03.60#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:08:03.60#ibcon#first serial, iclass 15, count 0 2006.229.05:08:03.60#ibcon#enter sib2, iclass 15, count 0 2006.229.05:08:03.60#ibcon#flushed, iclass 15, count 0 2006.229.05:08:03.60#ibcon#about to write, iclass 15, count 0 2006.229.05:08:03.60#ibcon#wrote, iclass 15, count 0 2006.229.05:08:03.60#ibcon#about to read 3, iclass 15, count 0 2006.229.05:08:03.62#ibcon#read 3, iclass 15, count 0 2006.229.05:08:03.62#ibcon#about to read 4, iclass 15, count 0 2006.229.05:08:03.62#ibcon#read 4, iclass 15, count 0 2006.229.05:08:03.62#ibcon#about to read 5, iclass 15, count 0 2006.229.05:08:03.62#ibcon#read 5, iclass 15, count 0 2006.229.05:08:03.62#ibcon#about to read 6, iclass 15, count 0 2006.229.05:08:03.62#ibcon#read 6, iclass 15, count 0 2006.229.05:08:03.62#ibcon#end of sib2, iclass 15, count 0 2006.229.05:08:03.62#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:08:03.62#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:08:03.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:08:03.62#ibcon#*before write, iclass 15, count 0 2006.229.05:08:03.62#ibcon#enter sib2, iclass 15, count 0 2006.229.05:08:03.62#ibcon#flushed, iclass 15, count 0 2006.229.05:08:03.62#ibcon#about to write, iclass 15, count 0 2006.229.05:08:03.62#ibcon#wrote, iclass 15, count 0 2006.229.05:08:03.62#ibcon#about to read 3, iclass 15, count 0 2006.229.05:08:03.66#ibcon#read 3, iclass 15, count 0 2006.229.05:08:03.66#ibcon#about to read 4, iclass 15, count 0 2006.229.05:08:03.66#ibcon#read 4, iclass 15, count 0 2006.229.05:08:03.66#ibcon#about to read 5, iclass 15, count 0 2006.229.05:08:03.66#ibcon#read 5, iclass 15, count 0 2006.229.05:08:03.66#ibcon#about to read 6, iclass 15, count 0 2006.229.05:08:03.66#ibcon#read 6, iclass 15, count 0 2006.229.05:08:03.66#ibcon#end of sib2, iclass 15, count 0 2006.229.05:08:03.66#ibcon#*after write, iclass 15, count 0 2006.229.05:08:03.66#ibcon#*before return 0, iclass 15, count 0 2006.229.05:08:03.66#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:03.66#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:03.66#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:08:03.66#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:08:03.66$vck44/va=8,6 2006.229.05:08:03.66#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.05:08:03.66#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.05:08:03.66#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:03.66#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:08:03.72#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:08:03.72#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:08:03.72#ibcon#enter wrdev, iclass 17, count 2 2006.229.05:08:03.72#ibcon#first serial, iclass 17, count 2 2006.229.05:08:03.72#ibcon#enter sib2, iclass 17, count 2 2006.229.05:08:03.72#ibcon#flushed, iclass 17, count 2 2006.229.05:08:03.72#ibcon#about to write, iclass 17, count 2 2006.229.05:08:03.72#ibcon#wrote, iclass 17, count 2 2006.229.05:08:03.72#ibcon#about to read 3, iclass 17, count 2 2006.229.05:08:03.74#ibcon#read 3, iclass 17, count 2 2006.229.05:08:03.74#ibcon#about to read 4, iclass 17, count 2 2006.229.05:08:03.74#ibcon#read 4, iclass 17, count 2 2006.229.05:08:03.74#ibcon#about to read 5, iclass 17, count 2 2006.229.05:08:03.74#ibcon#read 5, iclass 17, count 2 2006.229.05:08:03.74#ibcon#about to read 6, iclass 17, count 2 2006.229.05:08:03.74#ibcon#read 6, iclass 17, count 2 2006.229.05:08:03.74#ibcon#end of sib2, iclass 17, count 2 2006.229.05:08:03.74#ibcon#*mode == 0, iclass 17, count 2 2006.229.05:08:03.74#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.05:08:03.74#ibcon#[25=AT08-06\r\n] 2006.229.05:08:03.74#ibcon#*before write, iclass 17, count 2 2006.229.05:08:03.74#ibcon#enter sib2, iclass 17, count 2 2006.229.05:08:03.74#ibcon#flushed, iclass 17, count 2 2006.229.05:08:03.74#ibcon#about to write, iclass 17, count 2 2006.229.05:08:03.74#ibcon#wrote, iclass 17, count 2 2006.229.05:08:03.74#ibcon#about to read 3, iclass 17, count 2 2006.229.05:08:03.77#ibcon#read 3, iclass 17, count 2 2006.229.05:08:03.77#ibcon#about to read 4, iclass 17, count 2 2006.229.05:08:03.77#ibcon#read 4, iclass 17, count 2 2006.229.05:08:03.77#ibcon#about to read 5, iclass 17, count 2 2006.229.05:08:03.77#ibcon#read 5, iclass 17, count 2 2006.229.05:08:03.77#ibcon#about to read 6, iclass 17, count 2 2006.229.05:08:03.77#ibcon#read 6, iclass 17, count 2 2006.229.05:08:03.77#ibcon#end of sib2, iclass 17, count 2 2006.229.05:08:03.77#ibcon#*after write, iclass 17, count 2 2006.229.05:08:03.77#ibcon#*before return 0, iclass 17, count 2 2006.229.05:08:03.77#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:08:03.77#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:08:03.77#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.05:08:03.77#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:03.77#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:08:03.89#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:08:03.89#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:08:03.89#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:08:03.89#ibcon#first serial, iclass 17, count 0 2006.229.05:08:03.89#ibcon#enter sib2, iclass 17, count 0 2006.229.05:08:03.89#ibcon#flushed, iclass 17, count 0 2006.229.05:08:03.89#ibcon#about to write, iclass 17, count 0 2006.229.05:08:03.89#ibcon#wrote, iclass 17, count 0 2006.229.05:08:03.89#ibcon#about to read 3, iclass 17, count 0 2006.229.05:08:03.91#ibcon#read 3, iclass 17, count 0 2006.229.05:08:03.91#ibcon#about to read 4, iclass 17, count 0 2006.229.05:08:03.91#ibcon#read 4, iclass 17, count 0 2006.229.05:08:03.91#ibcon#about to read 5, iclass 17, count 0 2006.229.05:08:03.91#ibcon#read 5, iclass 17, count 0 2006.229.05:08:03.91#ibcon#about to read 6, iclass 17, count 0 2006.229.05:08:03.91#ibcon#read 6, iclass 17, count 0 2006.229.05:08:03.91#ibcon#end of sib2, iclass 17, count 0 2006.229.05:08:03.91#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:08:03.91#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:08:03.91#ibcon#[25=USB\r\n] 2006.229.05:08:03.91#ibcon#*before write, iclass 17, count 0 2006.229.05:08:03.91#ibcon#enter sib2, iclass 17, count 0 2006.229.05:08:03.91#ibcon#flushed, iclass 17, count 0 2006.229.05:08:03.91#ibcon#about to write, iclass 17, count 0 2006.229.05:08:03.91#ibcon#wrote, iclass 17, count 0 2006.229.05:08:03.91#ibcon#about to read 3, iclass 17, count 0 2006.229.05:08:03.94#ibcon#read 3, iclass 17, count 0 2006.229.05:08:03.94#ibcon#about to read 4, iclass 17, count 0 2006.229.05:08:03.94#ibcon#read 4, iclass 17, count 0 2006.229.05:08:03.94#ibcon#about to read 5, iclass 17, count 0 2006.229.05:08:03.94#ibcon#read 5, iclass 17, count 0 2006.229.05:08:03.94#ibcon#about to read 6, iclass 17, count 0 2006.229.05:08:03.94#ibcon#read 6, iclass 17, count 0 2006.229.05:08:03.94#ibcon#end of sib2, iclass 17, count 0 2006.229.05:08:03.94#ibcon#*after write, iclass 17, count 0 2006.229.05:08:03.94#ibcon#*before return 0, iclass 17, count 0 2006.229.05:08:03.94#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:08:03.94#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:08:03.94#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:08:03.94#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:08:03.94$vck44/vblo=1,629.99 2006.229.05:08:03.94#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.05:08:03.94#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.05:08:03.94#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:03.94#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:08:03.94#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:08:03.94#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:08:03.94#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:08:03.94#ibcon#first serial, iclass 19, count 0 2006.229.05:08:03.94#ibcon#enter sib2, iclass 19, count 0 2006.229.05:08:03.94#ibcon#flushed, iclass 19, count 0 2006.229.05:08:03.94#ibcon#about to write, iclass 19, count 0 2006.229.05:08:03.94#ibcon#wrote, iclass 19, count 0 2006.229.05:08:03.94#ibcon#about to read 3, iclass 19, count 0 2006.229.05:08:03.96#ibcon#read 3, iclass 19, count 0 2006.229.05:08:03.96#ibcon#about to read 4, iclass 19, count 0 2006.229.05:08:03.96#ibcon#read 4, iclass 19, count 0 2006.229.05:08:03.96#ibcon#about to read 5, iclass 19, count 0 2006.229.05:08:03.96#ibcon#read 5, iclass 19, count 0 2006.229.05:08:03.96#ibcon#about to read 6, iclass 19, count 0 2006.229.05:08:03.96#ibcon#read 6, iclass 19, count 0 2006.229.05:08:03.96#ibcon#end of sib2, iclass 19, count 0 2006.229.05:08:03.96#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:08:03.96#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:08:03.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:08:03.96#ibcon#*before write, iclass 19, count 0 2006.229.05:08:03.96#ibcon#enter sib2, iclass 19, count 0 2006.229.05:08:03.96#ibcon#flushed, iclass 19, count 0 2006.229.05:08:03.96#ibcon#about to write, iclass 19, count 0 2006.229.05:08:03.96#ibcon#wrote, iclass 19, count 0 2006.229.05:08:03.96#ibcon#about to read 3, iclass 19, count 0 2006.229.05:08:04.00#ibcon#read 3, iclass 19, count 0 2006.229.05:08:04.00#ibcon#about to read 4, iclass 19, count 0 2006.229.05:08:04.00#ibcon#read 4, iclass 19, count 0 2006.229.05:08:04.00#ibcon#about to read 5, iclass 19, count 0 2006.229.05:08:04.00#ibcon#read 5, iclass 19, count 0 2006.229.05:08:04.00#ibcon#about to read 6, iclass 19, count 0 2006.229.05:08:04.00#ibcon#read 6, iclass 19, count 0 2006.229.05:08:04.00#ibcon#end of sib2, iclass 19, count 0 2006.229.05:08:04.00#ibcon#*after write, iclass 19, count 0 2006.229.05:08:04.00#ibcon#*before return 0, iclass 19, count 0 2006.229.05:08:04.00#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:08:04.00#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:08:04.00#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:08:04.00#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:08:04.00$vck44/vb=1,4 2006.229.05:08:04.00#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.05:08:04.00#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.05:08:04.00#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:04.00#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:08:04.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:08:04.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:08:04.00#ibcon#enter wrdev, iclass 21, count 2 2006.229.05:08:04.00#ibcon#first serial, iclass 21, count 2 2006.229.05:08:04.00#ibcon#enter sib2, iclass 21, count 2 2006.229.05:08:04.00#ibcon#flushed, iclass 21, count 2 2006.229.05:08:04.00#ibcon#about to write, iclass 21, count 2 2006.229.05:08:04.00#ibcon#wrote, iclass 21, count 2 2006.229.05:08:04.00#ibcon#about to read 3, iclass 21, count 2 2006.229.05:08:04.02#ibcon#read 3, iclass 21, count 2 2006.229.05:08:04.02#ibcon#about to read 4, iclass 21, count 2 2006.229.05:08:04.02#ibcon#read 4, iclass 21, count 2 2006.229.05:08:04.02#ibcon#about to read 5, iclass 21, count 2 2006.229.05:08:04.02#ibcon#read 5, iclass 21, count 2 2006.229.05:08:04.02#ibcon#about to read 6, iclass 21, count 2 2006.229.05:08:04.02#ibcon#read 6, iclass 21, count 2 2006.229.05:08:04.02#ibcon#end of sib2, iclass 21, count 2 2006.229.05:08:04.02#ibcon#*mode == 0, iclass 21, count 2 2006.229.05:08:04.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.05:08:04.02#ibcon#[27=AT01-04\r\n] 2006.229.05:08:04.02#ibcon#*before write, iclass 21, count 2 2006.229.05:08:04.02#ibcon#enter sib2, iclass 21, count 2 2006.229.05:08:04.02#ibcon#flushed, iclass 21, count 2 2006.229.05:08:04.02#ibcon#about to write, iclass 21, count 2 2006.229.05:08:04.02#ibcon#wrote, iclass 21, count 2 2006.229.05:08:04.02#ibcon#about to read 3, iclass 21, count 2 2006.229.05:08:04.05#ibcon#read 3, iclass 21, count 2 2006.229.05:08:04.05#ibcon#about to read 4, iclass 21, count 2 2006.229.05:08:04.05#ibcon#read 4, iclass 21, count 2 2006.229.05:08:04.05#ibcon#about to read 5, iclass 21, count 2 2006.229.05:08:04.05#ibcon#read 5, iclass 21, count 2 2006.229.05:08:04.05#ibcon#about to read 6, iclass 21, count 2 2006.229.05:08:04.05#ibcon#read 6, iclass 21, count 2 2006.229.05:08:04.05#ibcon#end of sib2, iclass 21, count 2 2006.229.05:08:04.05#ibcon#*after write, iclass 21, count 2 2006.229.05:08:04.05#ibcon#*before return 0, iclass 21, count 2 2006.229.05:08:04.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:08:04.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:08:04.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.05:08:04.05#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:04.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:08:04.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:08:04.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:08:04.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:08:04.17#ibcon#first serial, iclass 21, count 0 2006.229.05:08:04.17#ibcon#enter sib2, iclass 21, count 0 2006.229.05:08:04.17#ibcon#flushed, iclass 21, count 0 2006.229.05:08:04.17#ibcon#about to write, iclass 21, count 0 2006.229.05:08:04.17#ibcon#wrote, iclass 21, count 0 2006.229.05:08:04.17#ibcon#about to read 3, iclass 21, count 0 2006.229.05:08:04.19#ibcon#read 3, iclass 21, count 0 2006.229.05:08:04.19#ibcon#about to read 4, iclass 21, count 0 2006.229.05:08:04.19#ibcon#read 4, iclass 21, count 0 2006.229.05:08:04.19#ibcon#about to read 5, iclass 21, count 0 2006.229.05:08:04.19#ibcon#read 5, iclass 21, count 0 2006.229.05:08:04.19#ibcon#about to read 6, iclass 21, count 0 2006.229.05:08:04.19#ibcon#read 6, iclass 21, count 0 2006.229.05:08:04.19#ibcon#end of sib2, iclass 21, count 0 2006.229.05:08:04.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:08:04.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:08:04.19#ibcon#[27=USB\r\n] 2006.229.05:08:04.19#ibcon#*before write, iclass 21, count 0 2006.229.05:08:04.19#ibcon#enter sib2, iclass 21, count 0 2006.229.05:08:04.19#ibcon#flushed, iclass 21, count 0 2006.229.05:08:04.19#ibcon#about to write, iclass 21, count 0 2006.229.05:08:04.19#ibcon#wrote, iclass 21, count 0 2006.229.05:08:04.19#ibcon#about to read 3, iclass 21, count 0 2006.229.05:08:04.22#ibcon#read 3, iclass 21, count 0 2006.229.05:08:04.22#ibcon#about to read 4, iclass 21, count 0 2006.229.05:08:04.22#ibcon#read 4, iclass 21, count 0 2006.229.05:08:04.22#ibcon#about to read 5, iclass 21, count 0 2006.229.05:08:04.22#ibcon#read 5, iclass 21, count 0 2006.229.05:08:04.22#ibcon#about to read 6, iclass 21, count 0 2006.229.05:08:04.22#ibcon#read 6, iclass 21, count 0 2006.229.05:08:04.22#ibcon#end of sib2, iclass 21, count 0 2006.229.05:08:04.22#ibcon#*after write, iclass 21, count 0 2006.229.05:08:04.22#ibcon#*before return 0, iclass 21, count 0 2006.229.05:08:04.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:08:04.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:08:04.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:08:04.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:08:04.22$vck44/vblo=2,634.99 2006.229.05:08:04.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:08:04.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:08:04.22#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:04.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:04.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:04.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:04.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:08:04.22#ibcon#first serial, iclass 23, count 0 2006.229.05:08:04.22#ibcon#enter sib2, iclass 23, count 0 2006.229.05:08:04.22#ibcon#flushed, iclass 23, count 0 2006.229.05:08:04.22#ibcon#about to write, iclass 23, count 0 2006.229.05:08:04.22#ibcon#wrote, iclass 23, count 0 2006.229.05:08:04.22#ibcon#about to read 3, iclass 23, count 0 2006.229.05:08:04.24#ibcon#read 3, iclass 23, count 0 2006.229.05:08:04.24#ibcon#about to read 4, iclass 23, count 0 2006.229.05:08:04.24#ibcon#read 4, iclass 23, count 0 2006.229.05:08:04.24#ibcon#about to read 5, iclass 23, count 0 2006.229.05:08:04.24#ibcon#read 5, iclass 23, count 0 2006.229.05:08:04.24#ibcon#about to read 6, iclass 23, count 0 2006.229.05:08:04.24#ibcon#read 6, iclass 23, count 0 2006.229.05:08:04.24#ibcon#end of sib2, iclass 23, count 0 2006.229.05:08:04.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:08:04.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:08:04.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:08:04.24#ibcon#*before write, iclass 23, count 0 2006.229.05:08:04.24#ibcon#enter sib2, iclass 23, count 0 2006.229.05:08:04.24#ibcon#flushed, iclass 23, count 0 2006.229.05:08:04.24#ibcon#about to write, iclass 23, count 0 2006.229.05:08:04.24#ibcon#wrote, iclass 23, count 0 2006.229.05:08:04.24#ibcon#about to read 3, iclass 23, count 0 2006.229.05:08:04.28#ibcon#read 3, iclass 23, count 0 2006.229.05:08:04.28#ibcon#about to read 4, iclass 23, count 0 2006.229.05:08:04.28#ibcon#read 4, iclass 23, count 0 2006.229.05:08:04.28#ibcon#about to read 5, iclass 23, count 0 2006.229.05:08:04.28#ibcon#read 5, iclass 23, count 0 2006.229.05:08:04.28#ibcon#about to read 6, iclass 23, count 0 2006.229.05:08:04.28#ibcon#read 6, iclass 23, count 0 2006.229.05:08:04.28#ibcon#end of sib2, iclass 23, count 0 2006.229.05:08:04.28#ibcon#*after write, iclass 23, count 0 2006.229.05:08:04.28#ibcon#*before return 0, iclass 23, count 0 2006.229.05:08:04.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:04.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:08:04.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:08:04.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:08:04.28$vck44/vb=2,4 2006.229.05:08:04.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:08:04.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:08:04.28#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:04.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:04.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:04.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:04.34#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:08:04.34#ibcon#first serial, iclass 25, count 2 2006.229.05:08:04.34#ibcon#enter sib2, iclass 25, count 2 2006.229.05:08:04.34#ibcon#flushed, iclass 25, count 2 2006.229.05:08:04.34#ibcon#about to write, iclass 25, count 2 2006.229.05:08:04.34#ibcon#wrote, iclass 25, count 2 2006.229.05:08:04.34#ibcon#about to read 3, iclass 25, count 2 2006.229.05:08:04.36#ibcon#read 3, iclass 25, count 2 2006.229.05:08:04.36#ibcon#about to read 4, iclass 25, count 2 2006.229.05:08:04.36#ibcon#read 4, iclass 25, count 2 2006.229.05:08:04.36#ibcon#about to read 5, iclass 25, count 2 2006.229.05:08:04.36#ibcon#read 5, iclass 25, count 2 2006.229.05:08:04.36#ibcon#about to read 6, iclass 25, count 2 2006.229.05:08:04.36#ibcon#read 6, iclass 25, count 2 2006.229.05:08:04.36#ibcon#end of sib2, iclass 25, count 2 2006.229.05:08:04.36#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:08:04.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:08:04.36#ibcon#[27=AT02-04\r\n] 2006.229.05:08:04.36#ibcon#*before write, iclass 25, count 2 2006.229.05:08:04.36#ibcon#enter sib2, iclass 25, count 2 2006.229.05:08:04.36#ibcon#flushed, iclass 25, count 2 2006.229.05:08:04.36#ibcon#about to write, iclass 25, count 2 2006.229.05:08:04.36#ibcon#wrote, iclass 25, count 2 2006.229.05:08:04.36#ibcon#about to read 3, iclass 25, count 2 2006.229.05:08:04.39#ibcon#read 3, iclass 25, count 2 2006.229.05:08:04.39#ibcon#about to read 4, iclass 25, count 2 2006.229.05:08:04.39#ibcon#read 4, iclass 25, count 2 2006.229.05:08:04.39#ibcon#about to read 5, iclass 25, count 2 2006.229.05:08:04.39#ibcon#read 5, iclass 25, count 2 2006.229.05:08:04.39#ibcon#about to read 6, iclass 25, count 2 2006.229.05:08:04.39#ibcon#read 6, iclass 25, count 2 2006.229.05:08:04.39#ibcon#end of sib2, iclass 25, count 2 2006.229.05:08:04.39#ibcon#*after write, iclass 25, count 2 2006.229.05:08:04.39#ibcon#*before return 0, iclass 25, count 2 2006.229.05:08:04.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:04.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:08:04.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:08:04.39#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:04.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:04.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:04.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:04.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:08:04.51#ibcon#first serial, iclass 25, count 0 2006.229.05:08:04.51#ibcon#enter sib2, iclass 25, count 0 2006.229.05:08:04.51#ibcon#flushed, iclass 25, count 0 2006.229.05:08:04.51#ibcon#about to write, iclass 25, count 0 2006.229.05:08:04.51#ibcon#wrote, iclass 25, count 0 2006.229.05:08:04.51#ibcon#about to read 3, iclass 25, count 0 2006.229.05:08:04.53#ibcon#read 3, iclass 25, count 0 2006.229.05:08:04.53#ibcon#about to read 4, iclass 25, count 0 2006.229.05:08:04.53#ibcon#read 4, iclass 25, count 0 2006.229.05:08:04.53#ibcon#about to read 5, iclass 25, count 0 2006.229.05:08:04.53#ibcon#read 5, iclass 25, count 0 2006.229.05:08:04.53#ibcon#about to read 6, iclass 25, count 0 2006.229.05:08:04.53#ibcon#read 6, iclass 25, count 0 2006.229.05:08:04.53#ibcon#end of sib2, iclass 25, count 0 2006.229.05:08:04.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:08:04.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:08:04.53#ibcon#[27=USB\r\n] 2006.229.05:08:04.53#ibcon#*before write, iclass 25, count 0 2006.229.05:08:04.53#ibcon#enter sib2, iclass 25, count 0 2006.229.05:08:04.53#ibcon#flushed, iclass 25, count 0 2006.229.05:08:04.53#ibcon#about to write, iclass 25, count 0 2006.229.05:08:04.53#ibcon#wrote, iclass 25, count 0 2006.229.05:08:04.53#ibcon#about to read 3, iclass 25, count 0 2006.229.05:08:04.56#ibcon#read 3, iclass 25, count 0 2006.229.05:08:04.56#ibcon#about to read 4, iclass 25, count 0 2006.229.05:08:04.56#ibcon#read 4, iclass 25, count 0 2006.229.05:08:04.56#ibcon#about to read 5, iclass 25, count 0 2006.229.05:08:04.56#ibcon#read 5, iclass 25, count 0 2006.229.05:08:04.56#ibcon#about to read 6, iclass 25, count 0 2006.229.05:08:04.56#ibcon#read 6, iclass 25, count 0 2006.229.05:08:04.56#ibcon#end of sib2, iclass 25, count 0 2006.229.05:08:04.56#ibcon#*after write, iclass 25, count 0 2006.229.05:08:04.56#ibcon#*before return 0, iclass 25, count 0 2006.229.05:08:04.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:04.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:08:04.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:08:04.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:08:04.56$vck44/vblo=3,649.99 2006.229.05:08:04.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:08:04.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:08:04.56#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:04.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:04.56#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:04.56#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:04.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:08:04.56#ibcon#first serial, iclass 27, count 0 2006.229.05:08:04.56#ibcon#enter sib2, iclass 27, count 0 2006.229.05:08:04.56#ibcon#flushed, iclass 27, count 0 2006.229.05:08:04.56#ibcon#about to write, iclass 27, count 0 2006.229.05:08:04.56#ibcon#wrote, iclass 27, count 0 2006.229.05:08:04.56#ibcon#about to read 3, iclass 27, count 0 2006.229.05:08:04.58#ibcon#read 3, iclass 27, count 0 2006.229.05:08:04.58#ibcon#about to read 4, iclass 27, count 0 2006.229.05:08:04.58#ibcon#read 4, iclass 27, count 0 2006.229.05:08:04.58#ibcon#about to read 5, iclass 27, count 0 2006.229.05:08:04.58#ibcon#read 5, iclass 27, count 0 2006.229.05:08:04.58#ibcon#about to read 6, iclass 27, count 0 2006.229.05:08:04.58#ibcon#read 6, iclass 27, count 0 2006.229.05:08:04.58#ibcon#end of sib2, iclass 27, count 0 2006.229.05:08:04.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:08:04.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:08:04.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:08:04.58#ibcon#*before write, iclass 27, count 0 2006.229.05:08:04.58#ibcon#enter sib2, iclass 27, count 0 2006.229.05:08:04.58#ibcon#flushed, iclass 27, count 0 2006.229.05:08:04.58#ibcon#about to write, iclass 27, count 0 2006.229.05:08:04.58#ibcon#wrote, iclass 27, count 0 2006.229.05:08:04.58#ibcon#about to read 3, iclass 27, count 0 2006.229.05:08:04.62#ibcon#read 3, iclass 27, count 0 2006.229.05:08:04.62#ibcon#about to read 4, iclass 27, count 0 2006.229.05:08:04.62#ibcon#read 4, iclass 27, count 0 2006.229.05:08:04.62#ibcon#about to read 5, iclass 27, count 0 2006.229.05:08:04.62#ibcon#read 5, iclass 27, count 0 2006.229.05:08:04.62#ibcon#about to read 6, iclass 27, count 0 2006.229.05:08:04.62#ibcon#read 6, iclass 27, count 0 2006.229.05:08:04.62#ibcon#end of sib2, iclass 27, count 0 2006.229.05:08:04.62#ibcon#*after write, iclass 27, count 0 2006.229.05:08:04.62#ibcon#*before return 0, iclass 27, count 0 2006.229.05:08:04.62#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:04.62#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:08:04.62#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:08:04.62#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:08:04.62$vck44/vb=3,4 2006.229.05:08:04.62#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.05:08:04.62#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.05:08:04.62#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:04.62#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:04.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:04.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:04.68#ibcon#enter wrdev, iclass 29, count 2 2006.229.05:08:04.68#ibcon#first serial, iclass 29, count 2 2006.229.05:08:04.68#ibcon#enter sib2, iclass 29, count 2 2006.229.05:08:04.68#ibcon#flushed, iclass 29, count 2 2006.229.05:08:04.68#ibcon#about to write, iclass 29, count 2 2006.229.05:08:04.68#ibcon#wrote, iclass 29, count 2 2006.229.05:08:04.68#ibcon#about to read 3, iclass 29, count 2 2006.229.05:08:04.70#ibcon#read 3, iclass 29, count 2 2006.229.05:08:04.70#ibcon#about to read 4, iclass 29, count 2 2006.229.05:08:04.70#ibcon#read 4, iclass 29, count 2 2006.229.05:08:04.70#ibcon#about to read 5, iclass 29, count 2 2006.229.05:08:04.70#ibcon#read 5, iclass 29, count 2 2006.229.05:08:04.70#ibcon#about to read 6, iclass 29, count 2 2006.229.05:08:04.70#ibcon#read 6, iclass 29, count 2 2006.229.05:08:04.70#ibcon#end of sib2, iclass 29, count 2 2006.229.05:08:04.70#ibcon#*mode == 0, iclass 29, count 2 2006.229.05:08:04.70#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.05:08:04.70#ibcon#[27=AT03-04\r\n] 2006.229.05:08:04.70#ibcon#*before write, iclass 29, count 2 2006.229.05:08:04.70#ibcon#enter sib2, iclass 29, count 2 2006.229.05:08:04.70#ibcon#flushed, iclass 29, count 2 2006.229.05:08:04.70#ibcon#about to write, iclass 29, count 2 2006.229.05:08:04.70#ibcon#wrote, iclass 29, count 2 2006.229.05:08:04.70#ibcon#about to read 3, iclass 29, count 2 2006.229.05:08:04.73#ibcon#read 3, iclass 29, count 2 2006.229.05:08:04.73#ibcon#about to read 4, iclass 29, count 2 2006.229.05:08:04.73#ibcon#read 4, iclass 29, count 2 2006.229.05:08:04.73#ibcon#about to read 5, iclass 29, count 2 2006.229.05:08:04.73#ibcon#read 5, iclass 29, count 2 2006.229.05:08:04.73#ibcon#about to read 6, iclass 29, count 2 2006.229.05:08:04.73#ibcon#read 6, iclass 29, count 2 2006.229.05:08:04.73#ibcon#end of sib2, iclass 29, count 2 2006.229.05:08:04.73#ibcon#*after write, iclass 29, count 2 2006.229.05:08:04.73#ibcon#*before return 0, iclass 29, count 2 2006.229.05:08:04.73#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:04.73#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:08:04.73#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.05:08:04.73#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:04.73#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:04.85#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:04.85#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:04.85#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:08:04.85#ibcon#first serial, iclass 29, count 0 2006.229.05:08:04.85#ibcon#enter sib2, iclass 29, count 0 2006.229.05:08:04.85#ibcon#flushed, iclass 29, count 0 2006.229.05:08:04.85#ibcon#about to write, iclass 29, count 0 2006.229.05:08:04.85#ibcon#wrote, iclass 29, count 0 2006.229.05:08:04.85#ibcon#about to read 3, iclass 29, count 0 2006.229.05:08:04.87#ibcon#read 3, iclass 29, count 0 2006.229.05:08:04.87#ibcon#about to read 4, iclass 29, count 0 2006.229.05:08:04.87#ibcon#read 4, iclass 29, count 0 2006.229.05:08:04.87#ibcon#about to read 5, iclass 29, count 0 2006.229.05:08:04.87#ibcon#read 5, iclass 29, count 0 2006.229.05:08:04.87#ibcon#about to read 6, iclass 29, count 0 2006.229.05:08:04.87#ibcon#read 6, iclass 29, count 0 2006.229.05:08:04.87#ibcon#end of sib2, iclass 29, count 0 2006.229.05:08:04.87#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:08:04.87#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:08:04.87#ibcon#[27=USB\r\n] 2006.229.05:08:04.87#ibcon#*before write, iclass 29, count 0 2006.229.05:08:04.87#ibcon#enter sib2, iclass 29, count 0 2006.229.05:08:04.87#ibcon#flushed, iclass 29, count 0 2006.229.05:08:04.87#ibcon#about to write, iclass 29, count 0 2006.229.05:08:04.87#ibcon#wrote, iclass 29, count 0 2006.229.05:08:04.87#ibcon#about to read 3, iclass 29, count 0 2006.229.05:08:04.90#ibcon#read 3, iclass 29, count 0 2006.229.05:08:04.90#ibcon#about to read 4, iclass 29, count 0 2006.229.05:08:04.90#ibcon#read 4, iclass 29, count 0 2006.229.05:08:04.90#ibcon#about to read 5, iclass 29, count 0 2006.229.05:08:04.90#ibcon#read 5, iclass 29, count 0 2006.229.05:08:04.90#ibcon#about to read 6, iclass 29, count 0 2006.229.05:08:04.90#ibcon#read 6, iclass 29, count 0 2006.229.05:08:04.90#ibcon#end of sib2, iclass 29, count 0 2006.229.05:08:04.90#ibcon#*after write, iclass 29, count 0 2006.229.05:08:04.90#ibcon#*before return 0, iclass 29, count 0 2006.229.05:08:04.90#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:04.90#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:08:04.90#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:08:04.90#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:08:04.90$vck44/vblo=4,679.99 2006.229.05:08:04.90#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:08:04.90#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:08:04.90#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:04.90#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:04.90#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:04.90#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:04.90#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:08:04.90#ibcon#first serial, iclass 31, count 0 2006.229.05:08:04.90#ibcon#enter sib2, iclass 31, count 0 2006.229.05:08:04.90#ibcon#flushed, iclass 31, count 0 2006.229.05:08:04.90#ibcon#about to write, iclass 31, count 0 2006.229.05:08:04.90#ibcon#wrote, iclass 31, count 0 2006.229.05:08:04.90#ibcon#about to read 3, iclass 31, count 0 2006.229.05:08:04.92#ibcon#read 3, iclass 31, count 0 2006.229.05:08:04.92#ibcon#about to read 4, iclass 31, count 0 2006.229.05:08:04.92#ibcon#read 4, iclass 31, count 0 2006.229.05:08:04.92#ibcon#about to read 5, iclass 31, count 0 2006.229.05:08:04.92#ibcon#read 5, iclass 31, count 0 2006.229.05:08:04.92#ibcon#about to read 6, iclass 31, count 0 2006.229.05:08:04.92#ibcon#read 6, iclass 31, count 0 2006.229.05:08:04.92#ibcon#end of sib2, iclass 31, count 0 2006.229.05:08:04.92#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:08:04.92#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:08:04.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:08:04.92#ibcon#*before write, iclass 31, count 0 2006.229.05:08:04.92#ibcon#enter sib2, iclass 31, count 0 2006.229.05:08:04.92#ibcon#flushed, iclass 31, count 0 2006.229.05:08:04.92#ibcon#about to write, iclass 31, count 0 2006.229.05:08:04.92#ibcon#wrote, iclass 31, count 0 2006.229.05:08:04.92#ibcon#about to read 3, iclass 31, count 0 2006.229.05:08:04.96#ibcon#read 3, iclass 31, count 0 2006.229.05:08:04.96#ibcon#about to read 4, iclass 31, count 0 2006.229.05:08:04.96#ibcon#read 4, iclass 31, count 0 2006.229.05:08:04.96#ibcon#about to read 5, iclass 31, count 0 2006.229.05:08:04.96#ibcon#read 5, iclass 31, count 0 2006.229.05:08:04.96#ibcon#about to read 6, iclass 31, count 0 2006.229.05:08:04.96#ibcon#read 6, iclass 31, count 0 2006.229.05:08:04.96#ibcon#end of sib2, iclass 31, count 0 2006.229.05:08:04.96#ibcon#*after write, iclass 31, count 0 2006.229.05:08:04.96#ibcon#*before return 0, iclass 31, count 0 2006.229.05:08:04.96#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:04.96#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:08:04.96#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:08:04.96#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:08:04.96$vck44/vb=4,4 2006.229.05:08:04.96#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:08:04.96#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:08:04.96#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:04.96#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:05.02#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:05.02#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:05.02#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:08:05.02#ibcon#first serial, iclass 33, count 2 2006.229.05:08:05.02#ibcon#enter sib2, iclass 33, count 2 2006.229.05:08:05.02#ibcon#flushed, iclass 33, count 2 2006.229.05:08:05.02#ibcon#about to write, iclass 33, count 2 2006.229.05:08:05.02#ibcon#wrote, iclass 33, count 2 2006.229.05:08:05.02#ibcon#about to read 3, iclass 33, count 2 2006.229.05:08:05.04#ibcon#read 3, iclass 33, count 2 2006.229.05:08:05.04#ibcon#about to read 4, iclass 33, count 2 2006.229.05:08:05.04#ibcon#read 4, iclass 33, count 2 2006.229.05:08:05.04#ibcon#about to read 5, iclass 33, count 2 2006.229.05:08:05.04#ibcon#read 5, iclass 33, count 2 2006.229.05:08:05.04#ibcon#about to read 6, iclass 33, count 2 2006.229.05:08:05.04#ibcon#read 6, iclass 33, count 2 2006.229.05:08:05.04#ibcon#end of sib2, iclass 33, count 2 2006.229.05:08:05.04#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:08:05.04#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:08:05.04#ibcon#[27=AT04-04\r\n] 2006.229.05:08:05.04#ibcon#*before write, iclass 33, count 2 2006.229.05:08:05.04#ibcon#enter sib2, iclass 33, count 2 2006.229.05:08:05.04#ibcon#flushed, iclass 33, count 2 2006.229.05:08:05.04#ibcon#about to write, iclass 33, count 2 2006.229.05:08:05.04#ibcon#wrote, iclass 33, count 2 2006.229.05:08:05.04#ibcon#about to read 3, iclass 33, count 2 2006.229.05:08:05.07#ibcon#read 3, iclass 33, count 2 2006.229.05:08:05.07#ibcon#about to read 4, iclass 33, count 2 2006.229.05:08:05.07#ibcon#read 4, iclass 33, count 2 2006.229.05:08:05.07#ibcon#about to read 5, iclass 33, count 2 2006.229.05:08:05.07#ibcon#read 5, iclass 33, count 2 2006.229.05:08:05.07#ibcon#about to read 6, iclass 33, count 2 2006.229.05:08:05.07#ibcon#read 6, iclass 33, count 2 2006.229.05:08:05.07#ibcon#end of sib2, iclass 33, count 2 2006.229.05:08:05.07#ibcon#*after write, iclass 33, count 2 2006.229.05:08:05.07#ibcon#*before return 0, iclass 33, count 2 2006.229.05:08:05.07#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:05.07#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:08:05.07#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:08:05.07#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:05.07#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:05.19#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:05.19#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:05.19#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:08:05.19#ibcon#first serial, iclass 33, count 0 2006.229.05:08:05.19#ibcon#enter sib2, iclass 33, count 0 2006.229.05:08:05.19#ibcon#flushed, iclass 33, count 0 2006.229.05:08:05.19#ibcon#about to write, iclass 33, count 0 2006.229.05:08:05.19#ibcon#wrote, iclass 33, count 0 2006.229.05:08:05.19#ibcon#about to read 3, iclass 33, count 0 2006.229.05:08:05.21#ibcon#read 3, iclass 33, count 0 2006.229.05:08:05.21#ibcon#about to read 4, iclass 33, count 0 2006.229.05:08:05.21#ibcon#read 4, iclass 33, count 0 2006.229.05:08:05.21#ibcon#about to read 5, iclass 33, count 0 2006.229.05:08:05.21#ibcon#read 5, iclass 33, count 0 2006.229.05:08:05.21#ibcon#about to read 6, iclass 33, count 0 2006.229.05:08:05.21#ibcon#read 6, iclass 33, count 0 2006.229.05:08:05.21#ibcon#end of sib2, iclass 33, count 0 2006.229.05:08:05.21#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:08:05.21#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:08:05.21#ibcon#[27=USB\r\n] 2006.229.05:08:05.21#ibcon#*before write, iclass 33, count 0 2006.229.05:08:05.21#ibcon#enter sib2, iclass 33, count 0 2006.229.05:08:05.21#ibcon#flushed, iclass 33, count 0 2006.229.05:08:05.21#ibcon#about to write, iclass 33, count 0 2006.229.05:08:05.21#ibcon#wrote, iclass 33, count 0 2006.229.05:08:05.21#ibcon#about to read 3, iclass 33, count 0 2006.229.05:08:05.24#ibcon#read 3, iclass 33, count 0 2006.229.05:08:05.24#ibcon#about to read 4, iclass 33, count 0 2006.229.05:08:05.24#ibcon#read 4, iclass 33, count 0 2006.229.05:08:05.24#ibcon#about to read 5, iclass 33, count 0 2006.229.05:08:05.24#ibcon#read 5, iclass 33, count 0 2006.229.05:08:05.24#ibcon#about to read 6, iclass 33, count 0 2006.229.05:08:05.24#ibcon#read 6, iclass 33, count 0 2006.229.05:08:05.24#ibcon#end of sib2, iclass 33, count 0 2006.229.05:08:05.24#ibcon#*after write, iclass 33, count 0 2006.229.05:08:05.24#ibcon#*before return 0, iclass 33, count 0 2006.229.05:08:05.24#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:05.24#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:08:05.24#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:08:05.24#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:08:05.24$vck44/vblo=5,709.99 2006.229.05:08:05.24#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:08:05.24#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:08:05.24#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:05.24#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:05.24#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:05.24#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:05.24#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:08:05.24#ibcon#first serial, iclass 35, count 0 2006.229.05:08:05.24#ibcon#enter sib2, iclass 35, count 0 2006.229.05:08:05.24#ibcon#flushed, iclass 35, count 0 2006.229.05:08:05.24#ibcon#about to write, iclass 35, count 0 2006.229.05:08:05.24#ibcon#wrote, iclass 35, count 0 2006.229.05:08:05.24#ibcon#about to read 3, iclass 35, count 0 2006.229.05:08:05.26#ibcon#read 3, iclass 35, count 0 2006.229.05:08:05.26#ibcon#about to read 4, iclass 35, count 0 2006.229.05:08:05.26#ibcon#read 4, iclass 35, count 0 2006.229.05:08:05.26#ibcon#about to read 5, iclass 35, count 0 2006.229.05:08:05.26#ibcon#read 5, iclass 35, count 0 2006.229.05:08:05.26#ibcon#about to read 6, iclass 35, count 0 2006.229.05:08:05.26#ibcon#read 6, iclass 35, count 0 2006.229.05:08:05.26#ibcon#end of sib2, iclass 35, count 0 2006.229.05:08:05.26#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:08:05.26#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:08:05.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:08:05.26#ibcon#*before write, iclass 35, count 0 2006.229.05:08:05.26#ibcon#enter sib2, iclass 35, count 0 2006.229.05:08:05.26#ibcon#flushed, iclass 35, count 0 2006.229.05:08:05.26#ibcon#about to write, iclass 35, count 0 2006.229.05:08:05.26#ibcon#wrote, iclass 35, count 0 2006.229.05:08:05.26#ibcon#about to read 3, iclass 35, count 0 2006.229.05:08:05.30#ibcon#read 3, iclass 35, count 0 2006.229.05:08:05.30#ibcon#about to read 4, iclass 35, count 0 2006.229.05:08:05.30#ibcon#read 4, iclass 35, count 0 2006.229.05:08:05.30#ibcon#about to read 5, iclass 35, count 0 2006.229.05:08:05.30#ibcon#read 5, iclass 35, count 0 2006.229.05:08:05.30#ibcon#about to read 6, iclass 35, count 0 2006.229.05:08:05.30#ibcon#read 6, iclass 35, count 0 2006.229.05:08:05.30#ibcon#end of sib2, iclass 35, count 0 2006.229.05:08:05.30#ibcon#*after write, iclass 35, count 0 2006.229.05:08:05.30#ibcon#*before return 0, iclass 35, count 0 2006.229.05:08:05.30#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:05.30#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:08:05.30#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:08:05.30#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:08:05.30$vck44/vb=5,4 2006.229.05:08:05.30#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:08:05.30#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:08:05.30#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:05.30#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:05.36#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:05.36#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:05.36#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:08:05.36#ibcon#first serial, iclass 37, count 2 2006.229.05:08:05.36#ibcon#enter sib2, iclass 37, count 2 2006.229.05:08:05.36#ibcon#flushed, iclass 37, count 2 2006.229.05:08:05.36#ibcon#about to write, iclass 37, count 2 2006.229.05:08:05.36#ibcon#wrote, iclass 37, count 2 2006.229.05:08:05.36#ibcon#about to read 3, iclass 37, count 2 2006.229.05:08:05.38#ibcon#read 3, iclass 37, count 2 2006.229.05:08:05.38#ibcon#about to read 4, iclass 37, count 2 2006.229.05:08:05.38#ibcon#read 4, iclass 37, count 2 2006.229.05:08:05.38#ibcon#about to read 5, iclass 37, count 2 2006.229.05:08:05.38#ibcon#read 5, iclass 37, count 2 2006.229.05:08:05.38#ibcon#about to read 6, iclass 37, count 2 2006.229.05:08:05.38#ibcon#read 6, iclass 37, count 2 2006.229.05:08:05.38#ibcon#end of sib2, iclass 37, count 2 2006.229.05:08:05.38#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:08:05.38#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:08:05.38#ibcon#[27=AT05-04\r\n] 2006.229.05:08:05.38#ibcon#*before write, iclass 37, count 2 2006.229.05:08:05.38#ibcon#enter sib2, iclass 37, count 2 2006.229.05:08:05.38#ibcon#flushed, iclass 37, count 2 2006.229.05:08:05.38#ibcon#about to write, iclass 37, count 2 2006.229.05:08:05.38#ibcon#wrote, iclass 37, count 2 2006.229.05:08:05.38#ibcon#about to read 3, iclass 37, count 2 2006.229.05:08:05.41#ibcon#read 3, iclass 37, count 2 2006.229.05:08:05.41#ibcon#about to read 4, iclass 37, count 2 2006.229.05:08:05.41#ibcon#read 4, iclass 37, count 2 2006.229.05:08:05.41#ibcon#about to read 5, iclass 37, count 2 2006.229.05:08:05.41#ibcon#read 5, iclass 37, count 2 2006.229.05:08:05.41#ibcon#about to read 6, iclass 37, count 2 2006.229.05:08:05.41#ibcon#read 6, iclass 37, count 2 2006.229.05:08:05.41#ibcon#end of sib2, iclass 37, count 2 2006.229.05:08:05.41#ibcon#*after write, iclass 37, count 2 2006.229.05:08:05.41#ibcon#*before return 0, iclass 37, count 2 2006.229.05:08:05.41#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:05.41#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:08:05.41#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:08:05.41#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:05.41#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:05.53#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:05.53#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:05.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:08:05.53#ibcon#first serial, iclass 37, count 0 2006.229.05:08:05.53#ibcon#enter sib2, iclass 37, count 0 2006.229.05:08:05.53#ibcon#flushed, iclass 37, count 0 2006.229.05:08:05.53#ibcon#about to write, iclass 37, count 0 2006.229.05:08:05.53#ibcon#wrote, iclass 37, count 0 2006.229.05:08:05.53#ibcon#about to read 3, iclass 37, count 0 2006.229.05:08:05.55#ibcon#read 3, iclass 37, count 0 2006.229.05:08:05.55#ibcon#about to read 4, iclass 37, count 0 2006.229.05:08:05.55#ibcon#read 4, iclass 37, count 0 2006.229.05:08:05.55#ibcon#about to read 5, iclass 37, count 0 2006.229.05:08:05.55#ibcon#read 5, iclass 37, count 0 2006.229.05:08:05.55#ibcon#about to read 6, iclass 37, count 0 2006.229.05:08:05.55#ibcon#read 6, iclass 37, count 0 2006.229.05:08:05.55#ibcon#end of sib2, iclass 37, count 0 2006.229.05:08:05.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:08:05.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:08:05.55#ibcon#[27=USB\r\n] 2006.229.05:08:05.55#ibcon#*before write, iclass 37, count 0 2006.229.05:08:05.55#ibcon#enter sib2, iclass 37, count 0 2006.229.05:08:05.55#ibcon#flushed, iclass 37, count 0 2006.229.05:08:05.55#ibcon#about to write, iclass 37, count 0 2006.229.05:08:05.55#ibcon#wrote, iclass 37, count 0 2006.229.05:08:05.55#ibcon#about to read 3, iclass 37, count 0 2006.229.05:08:05.58#ibcon#read 3, iclass 37, count 0 2006.229.05:08:05.58#ibcon#about to read 4, iclass 37, count 0 2006.229.05:08:05.58#ibcon#read 4, iclass 37, count 0 2006.229.05:08:05.58#ibcon#about to read 5, iclass 37, count 0 2006.229.05:08:05.58#ibcon#read 5, iclass 37, count 0 2006.229.05:08:05.58#ibcon#about to read 6, iclass 37, count 0 2006.229.05:08:05.58#ibcon#read 6, iclass 37, count 0 2006.229.05:08:05.58#ibcon#end of sib2, iclass 37, count 0 2006.229.05:08:05.58#ibcon#*after write, iclass 37, count 0 2006.229.05:08:05.58#ibcon#*before return 0, iclass 37, count 0 2006.229.05:08:05.58#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:05.58#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:08:05.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:08:05.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:08:05.58$vck44/vblo=6,719.99 2006.229.05:08:05.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:08:05.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:08:05.58#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:05.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:05.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:05.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:05.58#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:08:05.58#ibcon#first serial, iclass 39, count 0 2006.229.05:08:05.58#ibcon#enter sib2, iclass 39, count 0 2006.229.05:08:05.58#ibcon#flushed, iclass 39, count 0 2006.229.05:08:05.58#ibcon#about to write, iclass 39, count 0 2006.229.05:08:05.58#ibcon#wrote, iclass 39, count 0 2006.229.05:08:05.58#ibcon#about to read 3, iclass 39, count 0 2006.229.05:08:05.60#ibcon#read 3, iclass 39, count 0 2006.229.05:08:05.60#ibcon#about to read 4, iclass 39, count 0 2006.229.05:08:05.60#ibcon#read 4, iclass 39, count 0 2006.229.05:08:05.60#ibcon#about to read 5, iclass 39, count 0 2006.229.05:08:05.60#ibcon#read 5, iclass 39, count 0 2006.229.05:08:05.60#ibcon#about to read 6, iclass 39, count 0 2006.229.05:08:05.60#ibcon#read 6, iclass 39, count 0 2006.229.05:08:05.60#ibcon#end of sib2, iclass 39, count 0 2006.229.05:08:05.60#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:08:05.60#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:08:05.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:08:05.60#ibcon#*before write, iclass 39, count 0 2006.229.05:08:05.60#ibcon#enter sib2, iclass 39, count 0 2006.229.05:08:05.60#ibcon#flushed, iclass 39, count 0 2006.229.05:08:05.60#ibcon#about to write, iclass 39, count 0 2006.229.05:08:05.60#ibcon#wrote, iclass 39, count 0 2006.229.05:08:05.60#ibcon#about to read 3, iclass 39, count 0 2006.229.05:08:05.64#ibcon#read 3, iclass 39, count 0 2006.229.05:08:05.64#ibcon#about to read 4, iclass 39, count 0 2006.229.05:08:05.64#ibcon#read 4, iclass 39, count 0 2006.229.05:08:05.64#ibcon#about to read 5, iclass 39, count 0 2006.229.05:08:05.64#ibcon#read 5, iclass 39, count 0 2006.229.05:08:05.64#ibcon#about to read 6, iclass 39, count 0 2006.229.05:08:05.64#ibcon#read 6, iclass 39, count 0 2006.229.05:08:05.64#ibcon#end of sib2, iclass 39, count 0 2006.229.05:08:05.64#ibcon#*after write, iclass 39, count 0 2006.229.05:08:05.64#ibcon#*before return 0, iclass 39, count 0 2006.229.05:08:05.64#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:05.64#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:08:05.64#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:08:05.64#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:08:05.64$vck44/vb=6,4 2006.229.05:08:05.64#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:08:05.64#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:08:05.64#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:05.64#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:05.70#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:05.70#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:05.70#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:08:05.70#ibcon#first serial, iclass 3, count 2 2006.229.05:08:05.70#ibcon#enter sib2, iclass 3, count 2 2006.229.05:08:05.70#ibcon#flushed, iclass 3, count 2 2006.229.05:08:05.70#ibcon#about to write, iclass 3, count 2 2006.229.05:08:05.70#ibcon#wrote, iclass 3, count 2 2006.229.05:08:05.70#ibcon#about to read 3, iclass 3, count 2 2006.229.05:08:05.72#ibcon#read 3, iclass 3, count 2 2006.229.05:08:05.72#ibcon#about to read 4, iclass 3, count 2 2006.229.05:08:05.72#ibcon#read 4, iclass 3, count 2 2006.229.05:08:05.72#ibcon#about to read 5, iclass 3, count 2 2006.229.05:08:05.72#ibcon#read 5, iclass 3, count 2 2006.229.05:08:05.72#ibcon#about to read 6, iclass 3, count 2 2006.229.05:08:05.72#ibcon#read 6, iclass 3, count 2 2006.229.05:08:05.72#ibcon#end of sib2, iclass 3, count 2 2006.229.05:08:05.72#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:08:05.72#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:08:05.72#ibcon#[27=AT06-04\r\n] 2006.229.05:08:05.72#ibcon#*before write, iclass 3, count 2 2006.229.05:08:05.72#ibcon#enter sib2, iclass 3, count 2 2006.229.05:08:05.72#ibcon#flushed, iclass 3, count 2 2006.229.05:08:05.72#ibcon#about to write, iclass 3, count 2 2006.229.05:08:05.72#ibcon#wrote, iclass 3, count 2 2006.229.05:08:05.72#ibcon#about to read 3, iclass 3, count 2 2006.229.05:08:05.75#ibcon#read 3, iclass 3, count 2 2006.229.05:08:05.75#ibcon#about to read 4, iclass 3, count 2 2006.229.05:08:05.75#ibcon#read 4, iclass 3, count 2 2006.229.05:08:05.75#ibcon#about to read 5, iclass 3, count 2 2006.229.05:08:05.75#ibcon#read 5, iclass 3, count 2 2006.229.05:08:05.75#ibcon#about to read 6, iclass 3, count 2 2006.229.05:08:05.75#ibcon#read 6, iclass 3, count 2 2006.229.05:08:05.75#ibcon#end of sib2, iclass 3, count 2 2006.229.05:08:05.75#ibcon#*after write, iclass 3, count 2 2006.229.05:08:05.75#ibcon#*before return 0, iclass 3, count 2 2006.229.05:08:05.75#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:05.75#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:08:05.75#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:08:05.75#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:05.75#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:05.87#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:05.87#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:05.87#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:08:05.87#ibcon#first serial, iclass 3, count 0 2006.229.05:08:05.87#ibcon#enter sib2, iclass 3, count 0 2006.229.05:08:05.87#ibcon#flushed, iclass 3, count 0 2006.229.05:08:05.87#ibcon#about to write, iclass 3, count 0 2006.229.05:08:05.87#ibcon#wrote, iclass 3, count 0 2006.229.05:08:05.87#ibcon#about to read 3, iclass 3, count 0 2006.229.05:08:05.89#ibcon#read 3, iclass 3, count 0 2006.229.05:08:05.89#ibcon#about to read 4, iclass 3, count 0 2006.229.05:08:05.89#ibcon#read 4, iclass 3, count 0 2006.229.05:08:05.89#ibcon#about to read 5, iclass 3, count 0 2006.229.05:08:05.89#ibcon#read 5, iclass 3, count 0 2006.229.05:08:05.89#ibcon#about to read 6, iclass 3, count 0 2006.229.05:08:05.89#ibcon#read 6, iclass 3, count 0 2006.229.05:08:05.89#ibcon#end of sib2, iclass 3, count 0 2006.229.05:08:05.89#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:08:05.89#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:08:05.89#ibcon#[27=USB\r\n] 2006.229.05:08:05.89#ibcon#*before write, iclass 3, count 0 2006.229.05:08:05.89#ibcon#enter sib2, iclass 3, count 0 2006.229.05:08:05.89#ibcon#flushed, iclass 3, count 0 2006.229.05:08:05.89#ibcon#about to write, iclass 3, count 0 2006.229.05:08:05.89#ibcon#wrote, iclass 3, count 0 2006.229.05:08:05.89#ibcon#about to read 3, iclass 3, count 0 2006.229.05:08:05.92#ibcon#read 3, iclass 3, count 0 2006.229.05:08:05.92#ibcon#about to read 4, iclass 3, count 0 2006.229.05:08:05.92#ibcon#read 4, iclass 3, count 0 2006.229.05:08:05.92#ibcon#about to read 5, iclass 3, count 0 2006.229.05:08:05.92#ibcon#read 5, iclass 3, count 0 2006.229.05:08:05.92#ibcon#about to read 6, iclass 3, count 0 2006.229.05:08:05.92#ibcon#read 6, iclass 3, count 0 2006.229.05:08:05.92#ibcon#end of sib2, iclass 3, count 0 2006.229.05:08:05.92#ibcon#*after write, iclass 3, count 0 2006.229.05:08:05.92#ibcon#*before return 0, iclass 3, count 0 2006.229.05:08:05.92#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:05.92#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:08:05.92#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:08:05.92#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:08:05.92$vck44/vblo=7,734.99 2006.229.05:08:05.92#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:08:05.92#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:08:05.92#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:05.92#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:05.92#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:05.92#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:05.92#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:08:05.92#ibcon#first serial, iclass 5, count 0 2006.229.05:08:05.92#ibcon#enter sib2, iclass 5, count 0 2006.229.05:08:05.92#ibcon#flushed, iclass 5, count 0 2006.229.05:08:05.92#ibcon#about to write, iclass 5, count 0 2006.229.05:08:05.92#ibcon#wrote, iclass 5, count 0 2006.229.05:08:05.92#ibcon#about to read 3, iclass 5, count 0 2006.229.05:08:05.94#ibcon#read 3, iclass 5, count 0 2006.229.05:08:05.94#ibcon#about to read 4, iclass 5, count 0 2006.229.05:08:05.94#ibcon#read 4, iclass 5, count 0 2006.229.05:08:05.94#ibcon#about to read 5, iclass 5, count 0 2006.229.05:08:05.94#ibcon#read 5, iclass 5, count 0 2006.229.05:08:05.94#ibcon#about to read 6, iclass 5, count 0 2006.229.05:08:05.94#ibcon#read 6, iclass 5, count 0 2006.229.05:08:05.94#ibcon#end of sib2, iclass 5, count 0 2006.229.05:08:05.94#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:08:05.94#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:08:05.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:08:05.94#ibcon#*before write, iclass 5, count 0 2006.229.05:08:05.94#ibcon#enter sib2, iclass 5, count 0 2006.229.05:08:05.94#ibcon#flushed, iclass 5, count 0 2006.229.05:08:05.94#ibcon#about to write, iclass 5, count 0 2006.229.05:08:05.94#ibcon#wrote, iclass 5, count 0 2006.229.05:08:05.94#ibcon#about to read 3, iclass 5, count 0 2006.229.05:08:05.98#ibcon#read 3, iclass 5, count 0 2006.229.05:08:05.98#ibcon#about to read 4, iclass 5, count 0 2006.229.05:08:05.98#ibcon#read 4, iclass 5, count 0 2006.229.05:08:05.98#ibcon#about to read 5, iclass 5, count 0 2006.229.05:08:05.98#ibcon#read 5, iclass 5, count 0 2006.229.05:08:05.98#ibcon#about to read 6, iclass 5, count 0 2006.229.05:08:05.98#ibcon#read 6, iclass 5, count 0 2006.229.05:08:05.98#ibcon#end of sib2, iclass 5, count 0 2006.229.05:08:05.98#ibcon#*after write, iclass 5, count 0 2006.229.05:08:05.98#ibcon#*before return 0, iclass 5, count 0 2006.229.05:08:05.98#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:05.98#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:08:05.98#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:08:05.98#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:08:05.98$vck44/vb=7,4 2006.229.05:08:05.98#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:08:05.98#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:08:05.98#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:05.98#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:06.04#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:06.04#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:06.04#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:08:06.04#ibcon#first serial, iclass 7, count 2 2006.229.05:08:06.04#ibcon#enter sib2, iclass 7, count 2 2006.229.05:08:06.04#ibcon#flushed, iclass 7, count 2 2006.229.05:08:06.04#ibcon#about to write, iclass 7, count 2 2006.229.05:08:06.04#ibcon#wrote, iclass 7, count 2 2006.229.05:08:06.04#ibcon#about to read 3, iclass 7, count 2 2006.229.05:08:06.06#ibcon#read 3, iclass 7, count 2 2006.229.05:08:06.06#ibcon#about to read 4, iclass 7, count 2 2006.229.05:08:06.06#ibcon#read 4, iclass 7, count 2 2006.229.05:08:06.06#ibcon#about to read 5, iclass 7, count 2 2006.229.05:08:06.06#ibcon#read 5, iclass 7, count 2 2006.229.05:08:06.06#ibcon#about to read 6, iclass 7, count 2 2006.229.05:08:06.06#ibcon#read 6, iclass 7, count 2 2006.229.05:08:06.06#ibcon#end of sib2, iclass 7, count 2 2006.229.05:08:06.06#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:08:06.06#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:08:06.06#ibcon#[27=AT07-04\r\n] 2006.229.05:08:06.06#ibcon#*before write, iclass 7, count 2 2006.229.05:08:06.06#ibcon#enter sib2, iclass 7, count 2 2006.229.05:08:06.06#ibcon#flushed, iclass 7, count 2 2006.229.05:08:06.06#ibcon#about to write, iclass 7, count 2 2006.229.05:08:06.06#ibcon#wrote, iclass 7, count 2 2006.229.05:08:06.06#ibcon#about to read 3, iclass 7, count 2 2006.229.05:08:06.09#ibcon#read 3, iclass 7, count 2 2006.229.05:08:06.09#ibcon#about to read 4, iclass 7, count 2 2006.229.05:08:06.09#ibcon#read 4, iclass 7, count 2 2006.229.05:08:06.09#ibcon#about to read 5, iclass 7, count 2 2006.229.05:08:06.09#ibcon#read 5, iclass 7, count 2 2006.229.05:08:06.09#ibcon#about to read 6, iclass 7, count 2 2006.229.05:08:06.09#ibcon#read 6, iclass 7, count 2 2006.229.05:08:06.09#ibcon#end of sib2, iclass 7, count 2 2006.229.05:08:06.09#ibcon#*after write, iclass 7, count 2 2006.229.05:08:06.09#ibcon#*before return 0, iclass 7, count 2 2006.229.05:08:06.09#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:06.09#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:08:06.09#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:08:06.09#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:06.09#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:06.21#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:06.21#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:06.21#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:08:06.21#ibcon#first serial, iclass 7, count 0 2006.229.05:08:06.21#ibcon#enter sib2, iclass 7, count 0 2006.229.05:08:06.21#ibcon#flushed, iclass 7, count 0 2006.229.05:08:06.21#ibcon#about to write, iclass 7, count 0 2006.229.05:08:06.21#ibcon#wrote, iclass 7, count 0 2006.229.05:08:06.21#ibcon#about to read 3, iclass 7, count 0 2006.229.05:08:06.23#ibcon#read 3, iclass 7, count 0 2006.229.05:08:06.23#ibcon#about to read 4, iclass 7, count 0 2006.229.05:08:06.23#ibcon#read 4, iclass 7, count 0 2006.229.05:08:06.23#ibcon#about to read 5, iclass 7, count 0 2006.229.05:08:06.23#ibcon#read 5, iclass 7, count 0 2006.229.05:08:06.23#ibcon#about to read 6, iclass 7, count 0 2006.229.05:08:06.23#ibcon#read 6, iclass 7, count 0 2006.229.05:08:06.23#ibcon#end of sib2, iclass 7, count 0 2006.229.05:08:06.23#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:08:06.23#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:08:06.23#ibcon#[27=USB\r\n] 2006.229.05:08:06.23#ibcon#*before write, iclass 7, count 0 2006.229.05:08:06.23#ibcon#enter sib2, iclass 7, count 0 2006.229.05:08:06.23#ibcon#flushed, iclass 7, count 0 2006.229.05:08:06.23#ibcon#about to write, iclass 7, count 0 2006.229.05:08:06.23#ibcon#wrote, iclass 7, count 0 2006.229.05:08:06.23#ibcon#about to read 3, iclass 7, count 0 2006.229.05:08:06.26#ibcon#read 3, iclass 7, count 0 2006.229.05:08:06.26#ibcon#about to read 4, iclass 7, count 0 2006.229.05:08:06.26#ibcon#read 4, iclass 7, count 0 2006.229.05:08:06.26#ibcon#about to read 5, iclass 7, count 0 2006.229.05:08:06.26#ibcon#read 5, iclass 7, count 0 2006.229.05:08:06.26#ibcon#about to read 6, iclass 7, count 0 2006.229.05:08:06.26#ibcon#read 6, iclass 7, count 0 2006.229.05:08:06.26#ibcon#end of sib2, iclass 7, count 0 2006.229.05:08:06.26#ibcon#*after write, iclass 7, count 0 2006.229.05:08:06.26#ibcon#*before return 0, iclass 7, count 0 2006.229.05:08:06.26#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:06.26#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:08:06.26#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:08:06.26#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:08:06.26$vck44/vblo=8,744.99 2006.229.05:08:06.26#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:08:06.26#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:08:06.26#ibcon#ireg 17 cls_cnt 0 2006.229.05:08:06.26#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:06.26#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:06.26#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:06.26#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:08:06.26#ibcon#first serial, iclass 11, count 0 2006.229.05:08:06.26#ibcon#enter sib2, iclass 11, count 0 2006.229.05:08:06.26#ibcon#flushed, iclass 11, count 0 2006.229.05:08:06.26#ibcon#about to write, iclass 11, count 0 2006.229.05:08:06.26#ibcon#wrote, iclass 11, count 0 2006.229.05:08:06.26#ibcon#about to read 3, iclass 11, count 0 2006.229.05:08:06.28#ibcon#read 3, iclass 11, count 0 2006.229.05:08:06.28#ibcon#about to read 4, iclass 11, count 0 2006.229.05:08:06.28#ibcon#read 4, iclass 11, count 0 2006.229.05:08:06.28#ibcon#about to read 5, iclass 11, count 0 2006.229.05:08:06.28#ibcon#read 5, iclass 11, count 0 2006.229.05:08:06.28#ibcon#about to read 6, iclass 11, count 0 2006.229.05:08:06.28#ibcon#read 6, iclass 11, count 0 2006.229.05:08:06.28#ibcon#end of sib2, iclass 11, count 0 2006.229.05:08:06.28#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:08:06.28#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:08:06.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:08:06.28#ibcon#*before write, iclass 11, count 0 2006.229.05:08:06.28#ibcon#enter sib2, iclass 11, count 0 2006.229.05:08:06.28#ibcon#flushed, iclass 11, count 0 2006.229.05:08:06.28#ibcon#about to write, iclass 11, count 0 2006.229.05:08:06.28#ibcon#wrote, iclass 11, count 0 2006.229.05:08:06.28#ibcon#about to read 3, iclass 11, count 0 2006.229.05:08:06.32#ibcon#read 3, iclass 11, count 0 2006.229.05:08:06.32#ibcon#about to read 4, iclass 11, count 0 2006.229.05:08:06.32#ibcon#read 4, iclass 11, count 0 2006.229.05:08:06.32#ibcon#about to read 5, iclass 11, count 0 2006.229.05:08:06.32#ibcon#read 5, iclass 11, count 0 2006.229.05:08:06.32#ibcon#about to read 6, iclass 11, count 0 2006.229.05:08:06.32#ibcon#read 6, iclass 11, count 0 2006.229.05:08:06.32#ibcon#end of sib2, iclass 11, count 0 2006.229.05:08:06.32#ibcon#*after write, iclass 11, count 0 2006.229.05:08:06.32#ibcon#*before return 0, iclass 11, count 0 2006.229.05:08:06.32#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:06.32#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:08:06.32#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:08:06.32#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:08:06.32$vck44/vb=8,4 2006.229.05:08:06.32#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:08:06.32#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:08:06.32#ibcon#ireg 11 cls_cnt 2 2006.229.05:08:06.32#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:06.38#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:06.38#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:06.38#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:08:06.38#ibcon#first serial, iclass 13, count 2 2006.229.05:08:06.38#ibcon#enter sib2, iclass 13, count 2 2006.229.05:08:06.38#ibcon#flushed, iclass 13, count 2 2006.229.05:08:06.38#ibcon#about to write, iclass 13, count 2 2006.229.05:08:06.38#ibcon#wrote, iclass 13, count 2 2006.229.05:08:06.38#ibcon#about to read 3, iclass 13, count 2 2006.229.05:08:06.40#ibcon#read 3, iclass 13, count 2 2006.229.05:08:06.40#ibcon#about to read 4, iclass 13, count 2 2006.229.05:08:06.40#ibcon#read 4, iclass 13, count 2 2006.229.05:08:06.40#ibcon#about to read 5, iclass 13, count 2 2006.229.05:08:06.40#ibcon#read 5, iclass 13, count 2 2006.229.05:08:06.40#ibcon#about to read 6, iclass 13, count 2 2006.229.05:08:06.40#ibcon#read 6, iclass 13, count 2 2006.229.05:08:06.40#ibcon#end of sib2, iclass 13, count 2 2006.229.05:08:06.40#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:08:06.40#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:08:06.40#ibcon#[27=AT08-04\r\n] 2006.229.05:08:06.40#ibcon#*before write, iclass 13, count 2 2006.229.05:08:06.40#ibcon#enter sib2, iclass 13, count 2 2006.229.05:08:06.40#ibcon#flushed, iclass 13, count 2 2006.229.05:08:06.40#ibcon#about to write, iclass 13, count 2 2006.229.05:08:06.40#ibcon#wrote, iclass 13, count 2 2006.229.05:08:06.40#ibcon#about to read 3, iclass 13, count 2 2006.229.05:08:06.43#ibcon#read 3, iclass 13, count 2 2006.229.05:08:06.43#ibcon#about to read 4, iclass 13, count 2 2006.229.05:08:06.43#ibcon#read 4, iclass 13, count 2 2006.229.05:08:06.43#ibcon#about to read 5, iclass 13, count 2 2006.229.05:08:06.43#ibcon#read 5, iclass 13, count 2 2006.229.05:08:06.43#ibcon#about to read 6, iclass 13, count 2 2006.229.05:08:06.43#ibcon#read 6, iclass 13, count 2 2006.229.05:08:06.43#ibcon#end of sib2, iclass 13, count 2 2006.229.05:08:06.43#ibcon#*after write, iclass 13, count 2 2006.229.05:08:06.43#ibcon#*before return 0, iclass 13, count 2 2006.229.05:08:06.43#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:06.43#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:08:06.43#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:08:06.43#ibcon#ireg 7 cls_cnt 0 2006.229.05:08:06.43#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:06.55#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:06.55#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:06.55#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:08:06.55#ibcon#first serial, iclass 13, count 0 2006.229.05:08:06.55#ibcon#enter sib2, iclass 13, count 0 2006.229.05:08:06.55#ibcon#flushed, iclass 13, count 0 2006.229.05:08:06.55#ibcon#about to write, iclass 13, count 0 2006.229.05:08:06.55#ibcon#wrote, iclass 13, count 0 2006.229.05:08:06.55#ibcon#about to read 3, iclass 13, count 0 2006.229.05:08:06.57#ibcon#read 3, iclass 13, count 0 2006.229.05:08:06.57#ibcon#about to read 4, iclass 13, count 0 2006.229.05:08:06.57#ibcon#read 4, iclass 13, count 0 2006.229.05:08:06.57#ibcon#about to read 5, iclass 13, count 0 2006.229.05:08:06.57#ibcon#read 5, iclass 13, count 0 2006.229.05:08:06.57#ibcon#about to read 6, iclass 13, count 0 2006.229.05:08:06.57#ibcon#read 6, iclass 13, count 0 2006.229.05:08:06.57#ibcon#end of sib2, iclass 13, count 0 2006.229.05:08:06.57#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:08:06.57#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:08:06.57#ibcon#[27=USB\r\n] 2006.229.05:08:06.57#ibcon#*before write, iclass 13, count 0 2006.229.05:08:06.57#ibcon#enter sib2, iclass 13, count 0 2006.229.05:08:06.57#ibcon#flushed, iclass 13, count 0 2006.229.05:08:06.57#ibcon#about to write, iclass 13, count 0 2006.229.05:08:06.57#ibcon#wrote, iclass 13, count 0 2006.229.05:08:06.57#ibcon#about to read 3, iclass 13, count 0 2006.229.05:08:06.60#ibcon#read 3, iclass 13, count 0 2006.229.05:08:06.60#ibcon#about to read 4, iclass 13, count 0 2006.229.05:08:06.60#ibcon#read 4, iclass 13, count 0 2006.229.05:08:06.60#ibcon#about to read 5, iclass 13, count 0 2006.229.05:08:06.60#ibcon#read 5, iclass 13, count 0 2006.229.05:08:06.60#ibcon#about to read 6, iclass 13, count 0 2006.229.05:08:06.60#ibcon#read 6, iclass 13, count 0 2006.229.05:08:06.60#ibcon#end of sib2, iclass 13, count 0 2006.229.05:08:06.60#ibcon#*after write, iclass 13, count 0 2006.229.05:08:06.60#ibcon#*before return 0, iclass 13, count 0 2006.229.05:08:06.60#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:06.60#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:08:06.60#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:08:06.60#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:08:06.60$vck44/vabw=wide 2006.229.05:08:06.60#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:08:06.60#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:08:06.60#ibcon#ireg 8 cls_cnt 0 2006.229.05:08:06.60#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:06.60#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:06.60#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:06.60#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:08:06.60#ibcon#first serial, iclass 15, count 0 2006.229.05:08:06.60#ibcon#enter sib2, iclass 15, count 0 2006.229.05:08:06.60#ibcon#flushed, iclass 15, count 0 2006.229.05:08:06.60#ibcon#about to write, iclass 15, count 0 2006.229.05:08:06.60#ibcon#wrote, iclass 15, count 0 2006.229.05:08:06.60#ibcon#about to read 3, iclass 15, count 0 2006.229.05:08:06.62#ibcon#read 3, iclass 15, count 0 2006.229.05:08:06.62#ibcon#about to read 4, iclass 15, count 0 2006.229.05:08:06.62#ibcon#read 4, iclass 15, count 0 2006.229.05:08:06.62#ibcon#about to read 5, iclass 15, count 0 2006.229.05:08:06.62#ibcon#read 5, iclass 15, count 0 2006.229.05:08:06.62#ibcon#about to read 6, iclass 15, count 0 2006.229.05:08:06.62#ibcon#read 6, iclass 15, count 0 2006.229.05:08:06.62#ibcon#end of sib2, iclass 15, count 0 2006.229.05:08:06.62#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:08:06.62#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:08:06.62#ibcon#[25=BW32\r\n] 2006.229.05:08:06.62#ibcon#*before write, iclass 15, count 0 2006.229.05:08:06.62#ibcon#enter sib2, iclass 15, count 0 2006.229.05:08:06.62#ibcon#flushed, iclass 15, count 0 2006.229.05:08:06.62#ibcon#about to write, iclass 15, count 0 2006.229.05:08:06.62#ibcon#wrote, iclass 15, count 0 2006.229.05:08:06.62#ibcon#about to read 3, iclass 15, count 0 2006.229.05:08:06.65#ibcon#read 3, iclass 15, count 0 2006.229.05:08:06.65#ibcon#about to read 4, iclass 15, count 0 2006.229.05:08:06.65#ibcon#read 4, iclass 15, count 0 2006.229.05:08:06.65#ibcon#about to read 5, iclass 15, count 0 2006.229.05:08:06.65#ibcon#read 5, iclass 15, count 0 2006.229.05:08:06.65#ibcon#about to read 6, iclass 15, count 0 2006.229.05:08:06.65#ibcon#read 6, iclass 15, count 0 2006.229.05:08:06.65#ibcon#end of sib2, iclass 15, count 0 2006.229.05:08:06.65#ibcon#*after write, iclass 15, count 0 2006.229.05:08:06.65#ibcon#*before return 0, iclass 15, count 0 2006.229.05:08:06.65#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:06.65#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:08:06.65#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:08:06.65#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:08:06.65$vck44/vbbw=wide 2006.229.05:08:06.65#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:08:06.65#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:08:06.65#ibcon#ireg 8 cls_cnt 0 2006.229.05:08:06.65#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:08:06.72#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:08:06.72#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:08:06.72#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:08:06.72#ibcon#first serial, iclass 17, count 0 2006.229.05:08:06.72#ibcon#enter sib2, iclass 17, count 0 2006.229.05:08:06.72#ibcon#flushed, iclass 17, count 0 2006.229.05:08:06.72#ibcon#about to write, iclass 17, count 0 2006.229.05:08:06.72#ibcon#wrote, iclass 17, count 0 2006.229.05:08:06.72#ibcon#about to read 3, iclass 17, count 0 2006.229.05:08:06.74#ibcon#read 3, iclass 17, count 0 2006.229.05:08:06.74#ibcon#about to read 4, iclass 17, count 0 2006.229.05:08:06.74#ibcon#read 4, iclass 17, count 0 2006.229.05:08:06.74#ibcon#about to read 5, iclass 17, count 0 2006.229.05:08:06.74#ibcon#read 5, iclass 17, count 0 2006.229.05:08:06.74#ibcon#about to read 6, iclass 17, count 0 2006.229.05:08:06.74#ibcon#read 6, iclass 17, count 0 2006.229.05:08:06.74#ibcon#end of sib2, iclass 17, count 0 2006.229.05:08:06.74#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:08:06.74#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:08:06.74#ibcon#[27=BW32\r\n] 2006.229.05:08:06.74#ibcon#*before write, iclass 17, count 0 2006.229.05:08:06.74#ibcon#enter sib2, iclass 17, count 0 2006.229.05:08:06.74#ibcon#flushed, iclass 17, count 0 2006.229.05:08:06.74#ibcon#about to write, iclass 17, count 0 2006.229.05:08:06.74#ibcon#wrote, iclass 17, count 0 2006.229.05:08:06.74#ibcon#about to read 3, iclass 17, count 0 2006.229.05:08:06.77#ibcon#read 3, iclass 17, count 0 2006.229.05:08:06.77#ibcon#about to read 4, iclass 17, count 0 2006.229.05:08:06.77#ibcon#read 4, iclass 17, count 0 2006.229.05:08:06.77#ibcon#about to read 5, iclass 17, count 0 2006.229.05:08:06.77#ibcon#read 5, iclass 17, count 0 2006.229.05:08:06.77#ibcon#about to read 6, iclass 17, count 0 2006.229.05:08:06.77#ibcon#read 6, iclass 17, count 0 2006.229.05:08:06.77#ibcon#end of sib2, iclass 17, count 0 2006.229.05:08:06.77#ibcon#*after write, iclass 17, count 0 2006.229.05:08:06.77#ibcon#*before return 0, iclass 17, count 0 2006.229.05:08:06.77#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:08:06.77#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:08:06.77#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:08:06.77#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:08:06.77$setupk4/ifdk4 2006.229.05:08:06.77$ifdk4/lo= 2006.229.05:08:06.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:08:06.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:08:06.77$ifdk4/patch= 2006.229.05:08:06.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:08:06.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:08:06.78$setupk4/!*+20s 2006.229.05:08:10.52#abcon#<5=/04 4.0 7.9 31.07 90 999.7\r\n> 2006.229.05:08:10.54#abcon#{5=INTERFACE CLEAR} 2006.229.05:08:10.60#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:08:16.13#trakl#Source acquired 2006.229.05:08:17.13#flagr#flagr/antenna,acquired 2006.229.05:08:20.69#abcon#<5=/04 4.0 7.9 31.07 90 999.6\r\n> 2006.229.05:08:20.71#abcon#{5=INTERFACE CLEAR} 2006.229.05:08:20.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:08:21.24$setupk4/"tpicd 2006.229.05:08:21.24$setupk4/echo=off 2006.229.05:08:21.24$setupk4/xlog=off 2006.229.05:08:21.24:!2006.229.05:10:18 2006.229.05:10:18.00:preob 2006.229.05:10:18.14/onsource/TRACKING 2006.229.05:10:18.14:!2006.229.05:10:28 2006.229.05:10:28.00:"tape 2006.229.05:10:28.00:"st=record 2006.229.05:10:28.00:data_valid=on 2006.229.05:10:28.00:midob 2006.229.05:10:29.14/onsource/TRACKING 2006.229.05:10:29.14/wx/31.05,999.6,91 2006.229.05:10:29.29/cable/+6.4017E-03 2006.229.05:10:30.38/va/01,08,usb,yes,31,33 2006.229.05:10:30.38/va/02,07,usb,yes,34,34 2006.229.05:10:30.38/va/03,06,usb,yes,42,44 2006.229.05:10:30.38/va/04,07,usb,yes,35,36 2006.229.05:10:30.38/va/05,04,usb,yes,31,31 2006.229.05:10:30.38/va/06,04,usb,yes,35,34 2006.229.05:10:30.38/va/07,05,usb,yes,30,31 2006.229.05:10:30.38/va/08,06,usb,yes,22,27 2006.229.05:10:30.61/valo/01,524.99,yes,locked 2006.229.05:10:30.61/valo/02,534.99,yes,locked 2006.229.05:10:30.61/valo/03,564.99,yes,locked 2006.229.05:10:30.61/valo/04,624.99,yes,locked 2006.229.05:10:30.61/valo/05,734.99,yes,locked 2006.229.05:10:30.61/valo/06,814.99,yes,locked 2006.229.05:10:30.61/valo/07,864.99,yes,locked 2006.229.05:10:30.61/valo/08,884.99,yes,locked 2006.229.05:10:31.70/vb/01,04,usb,yes,39,36 2006.229.05:10:31.70/vb/02,04,usb,yes,41,41 2006.229.05:10:31.70/vb/03,04,usb,yes,38,42 2006.229.05:10:31.70/vb/04,04,usb,yes,43,42 2006.229.05:10:31.70/vb/05,04,usb,yes,34,37 2006.229.05:10:31.70/vb/06,04,usb,yes,39,34 2006.229.05:10:31.70/vb/07,04,usb,yes,38,39 2006.229.05:10:31.70/vb/08,04,usb,yes,35,39 2006.229.05:10:31.93/vblo/01,629.99,yes,locked 2006.229.05:10:31.93/vblo/02,634.99,yes,locked 2006.229.05:10:31.93/vblo/03,649.99,yes,locked 2006.229.05:10:31.93/vblo/04,679.99,yes,locked 2006.229.05:10:31.93/vblo/05,709.99,yes,locked 2006.229.05:10:31.93/vblo/06,719.99,yes,locked 2006.229.05:10:31.93/vblo/07,734.99,yes,locked 2006.229.05:10:31.93/vblo/08,744.99,yes,locked 2006.229.05:10:32.08/vabw/8 2006.229.05:10:32.23/vbbw/8 2006.229.05:10:32.39/xfe/off,on,12.0 2006.229.05:10:32.77/ifatt/23,28,28,28 2006.229.05:10:33.07/fmout-gps/S +4.54E-07 2006.229.05:10:33.11:!2006.229.05:12:18 2006.229.05:12:18.01:data_valid=off 2006.229.05:12:18.01:"et 2006.229.05:12:18.01:!+3s 2006.229.05:12:21.02:"tape 2006.229.05:12:21.02:postob 2006.229.05:12:21.09/cable/+6.4014E-03 2006.229.05:12:21.09/wx/31.03,999.6,91 2006.229.05:12:21.15/fmout-gps/S +4.53E-07 2006.229.05:12:21.15:scan_name=229-0517,jd0608,60 2006.229.05:12:21.15:source=0552+398,055530.81,394849.2,2000.0,ccw 2006.229.05:12:22.14#flagr#flagr/antenna,new-source 2006.229.05:12:22.14:checkk5 2006.229.05:12:22.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:12:22.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:12:23.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:12:23.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:12:24.13/chk_obsdata//k5ts1/T2290510??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.05:12:24.54/chk_obsdata//k5ts2/T2290510??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.05:12:24.93/chk_obsdata//k5ts3/T2290510??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.05:12:25.34/chk_obsdata//k5ts4/T2290510??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.05:12:26.07/k5log//k5ts1_log_newline 2006.229.05:12:26.78/k5log//k5ts2_log_newline 2006.229.05:12:27.49/k5log//k5ts3_log_newline 2006.229.05:12:28.20/k5log//k5ts4_log_newline 2006.229.05:12:28.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:12:28.22:setupk4=1 2006.229.05:12:28.22$setupk4/echo=on 2006.229.05:12:28.22$setupk4/pcalon 2006.229.05:12:28.22$pcalon/"no phase cal control is implemented here 2006.229.05:12:28.22$setupk4/"tpicd=stop 2006.229.05:12:28.22$setupk4/"rec=synch_on 2006.229.05:12:28.22$setupk4/"rec_mode=128 2006.229.05:12:28.22$setupk4/!* 2006.229.05:12:28.22$setupk4/recpk4 2006.229.05:12:28.22$recpk4/recpatch= 2006.229.05:12:28.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:12:28.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:12:28.23$setupk4/vck44 2006.229.05:12:28.23$vck44/valo=1,524.99 2006.229.05:12:28.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.05:12:28.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.05:12:28.23#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:28.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:28.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:28.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:28.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:12:28.23#ibcon#first serial, iclass 13, count 0 2006.229.05:12:28.23#ibcon#enter sib2, iclass 13, count 0 2006.229.05:12:28.23#ibcon#flushed, iclass 13, count 0 2006.229.05:12:28.23#ibcon#about to write, iclass 13, count 0 2006.229.05:12:28.23#ibcon#wrote, iclass 13, count 0 2006.229.05:12:28.23#ibcon#about to read 3, iclass 13, count 0 2006.229.05:12:28.24#ibcon#read 3, iclass 13, count 0 2006.229.05:12:28.24#ibcon#about to read 4, iclass 13, count 0 2006.229.05:12:28.24#ibcon#read 4, iclass 13, count 0 2006.229.05:12:28.24#ibcon#about to read 5, iclass 13, count 0 2006.229.05:12:28.24#ibcon#read 5, iclass 13, count 0 2006.229.05:12:28.24#ibcon#about to read 6, iclass 13, count 0 2006.229.05:12:28.24#ibcon#read 6, iclass 13, count 0 2006.229.05:12:28.24#ibcon#end of sib2, iclass 13, count 0 2006.229.05:12:28.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:12:28.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:12:28.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:12:28.24#ibcon#*before write, iclass 13, count 0 2006.229.05:12:28.24#ibcon#enter sib2, iclass 13, count 0 2006.229.05:12:28.24#ibcon#flushed, iclass 13, count 0 2006.229.05:12:28.24#ibcon#about to write, iclass 13, count 0 2006.229.05:12:28.24#ibcon#wrote, iclass 13, count 0 2006.229.05:12:28.24#ibcon#about to read 3, iclass 13, count 0 2006.229.05:12:28.29#ibcon#read 3, iclass 13, count 0 2006.229.05:12:28.29#ibcon#about to read 4, iclass 13, count 0 2006.229.05:12:28.29#ibcon#read 4, iclass 13, count 0 2006.229.05:12:28.29#ibcon#about to read 5, iclass 13, count 0 2006.229.05:12:28.29#ibcon#read 5, iclass 13, count 0 2006.229.05:12:28.29#ibcon#about to read 6, iclass 13, count 0 2006.229.05:12:28.29#ibcon#read 6, iclass 13, count 0 2006.229.05:12:28.29#ibcon#end of sib2, iclass 13, count 0 2006.229.05:12:28.29#ibcon#*after write, iclass 13, count 0 2006.229.05:12:28.29#ibcon#*before return 0, iclass 13, count 0 2006.229.05:12:28.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:28.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:28.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:12:28.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:12:28.29$vck44/va=1,8 2006.229.05:12:28.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.05:12:28.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.05:12:28.29#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:28.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:28.29#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:28.29#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:28.29#ibcon#enter wrdev, iclass 15, count 2 2006.229.05:12:28.29#ibcon#first serial, iclass 15, count 2 2006.229.05:12:28.29#ibcon#enter sib2, iclass 15, count 2 2006.229.05:12:28.29#ibcon#flushed, iclass 15, count 2 2006.229.05:12:28.29#ibcon#about to write, iclass 15, count 2 2006.229.05:12:28.29#ibcon#wrote, iclass 15, count 2 2006.229.05:12:28.29#ibcon#about to read 3, iclass 15, count 2 2006.229.05:12:28.31#ibcon#read 3, iclass 15, count 2 2006.229.05:12:28.31#ibcon#about to read 4, iclass 15, count 2 2006.229.05:12:28.31#ibcon#read 4, iclass 15, count 2 2006.229.05:12:28.31#ibcon#about to read 5, iclass 15, count 2 2006.229.05:12:28.31#ibcon#read 5, iclass 15, count 2 2006.229.05:12:28.31#ibcon#about to read 6, iclass 15, count 2 2006.229.05:12:28.31#ibcon#read 6, iclass 15, count 2 2006.229.05:12:28.31#ibcon#end of sib2, iclass 15, count 2 2006.229.05:12:28.31#ibcon#*mode == 0, iclass 15, count 2 2006.229.05:12:28.31#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.05:12:28.31#ibcon#[25=AT01-08\r\n] 2006.229.05:12:28.31#ibcon#*before write, iclass 15, count 2 2006.229.05:12:28.31#ibcon#enter sib2, iclass 15, count 2 2006.229.05:12:28.31#ibcon#flushed, iclass 15, count 2 2006.229.05:12:28.31#ibcon#about to write, iclass 15, count 2 2006.229.05:12:28.31#ibcon#wrote, iclass 15, count 2 2006.229.05:12:28.31#ibcon#about to read 3, iclass 15, count 2 2006.229.05:12:28.34#ibcon#read 3, iclass 15, count 2 2006.229.05:12:28.34#ibcon#about to read 4, iclass 15, count 2 2006.229.05:12:28.34#ibcon#read 4, iclass 15, count 2 2006.229.05:12:28.34#ibcon#about to read 5, iclass 15, count 2 2006.229.05:12:28.34#ibcon#read 5, iclass 15, count 2 2006.229.05:12:28.34#ibcon#about to read 6, iclass 15, count 2 2006.229.05:12:28.34#ibcon#read 6, iclass 15, count 2 2006.229.05:12:28.34#ibcon#end of sib2, iclass 15, count 2 2006.229.05:12:28.34#ibcon#*after write, iclass 15, count 2 2006.229.05:12:28.34#ibcon#*before return 0, iclass 15, count 2 2006.229.05:12:28.34#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:28.34#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:28.34#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.05:12:28.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:28.34#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:28.46#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:28.46#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:28.46#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:12:28.46#ibcon#first serial, iclass 15, count 0 2006.229.05:12:28.46#ibcon#enter sib2, iclass 15, count 0 2006.229.05:12:28.46#ibcon#flushed, iclass 15, count 0 2006.229.05:12:28.46#ibcon#about to write, iclass 15, count 0 2006.229.05:12:28.46#ibcon#wrote, iclass 15, count 0 2006.229.05:12:28.46#ibcon#about to read 3, iclass 15, count 0 2006.229.05:12:28.48#ibcon#read 3, iclass 15, count 0 2006.229.05:12:28.48#ibcon#about to read 4, iclass 15, count 0 2006.229.05:12:28.48#ibcon#read 4, iclass 15, count 0 2006.229.05:12:28.48#ibcon#about to read 5, iclass 15, count 0 2006.229.05:12:28.48#ibcon#read 5, iclass 15, count 0 2006.229.05:12:28.48#ibcon#about to read 6, iclass 15, count 0 2006.229.05:12:28.48#ibcon#read 6, iclass 15, count 0 2006.229.05:12:28.48#ibcon#end of sib2, iclass 15, count 0 2006.229.05:12:28.48#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:12:28.48#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:12:28.48#ibcon#[25=USB\r\n] 2006.229.05:12:28.48#ibcon#*before write, iclass 15, count 0 2006.229.05:12:28.48#ibcon#enter sib2, iclass 15, count 0 2006.229.05:12:28.48#ibcon#flushed, iclass 15, count 0 2006.229.05:12:28.48#ibcon#about to write, iclass 15, count 0 2006.229.05:12:28.48#ibcon#wrote, iclass 15, count 0 2006.229.05:12:28.48#ibcon#about to read 3, iclass 15, count 0 2006.229.05:12:28.51#ibcon#read 3, iclass 15, count 0 2006.229.05:12:28.51#ibcon#about to read 4, iclass 15, count 0 2006.229.05:12:28.51#ibcon#read 4, iclass 15, count 0 2006.229.05:12:28.51#ibcon#about to read 5, iclass 15, count 0 2006.229.05:12:28.51#ibcon#read 5, iclass 15, count 0 2006.229.05:12:28.51#ibcon#about to read 6, iclass 15, count 0 2006.229.05:12:28.51#ibcon#read 6, iclass 15, count 0 2006.229.05:12:28.51#ibcon#end of sib2, iclass 15, count 0 2006.229.05:12:28.51#ibcon#*after write, iclass 15, count 0 2006.229.05:12:28.51#ibcon#*before return 0, iclass 15, count 0 2006.229.05:12:28.51#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:28.51#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:28.51#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:12:28.51#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:12:28.51$vck44/valo=2,534.99 2006.229.05:12:28.51#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:12:28.51#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:12:28.51#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:28.51#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:28.51#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:28.51#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:28.51#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:12:28.51#ibcon#first serial, iclass 17, count 0 2006.229.05:12:28.51#ibcon#enter sib2, iclass 17, count 0 2006.229.05:12:28.51#ibcon#flushed, iclass 17, count 0 2006.229.05:12:28.51#ibcon#about to write, iclass 17, count 0 2006.229.05:12:28.51#ibcon#wrote, iclass 17, count 0 2006.229.05:12:28.51#ibcon#about to read 3, iclass 17, count 0 2006.229.05:12:28.53#ibcon#read 3, iclass 17, count 0 2006.229.05:12:28.53#ibcon#about to read 4, iclass 17, count 0 2006.229.05:12:28.53#ibcon#read 4, iclass 17, count 0 2006.229.05:12:28.53#ibcon#about to read 5, iclass 17, count 0 2006.229.05:12:28.53#ibcon#read 5, iclass 17, count 0 2006.229.05:12:28.53#ibcon#about to read 6, iclass 17, count 0 2006.229.05:12:28.53#ibcon#read 6, iclass 17, count 0 2006.229.05:12:28.53#ibcon#end of sib2, iclass 17, count 0 2006.229.05:12:28.53#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:12:28.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:12:28.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:12:28.53#ibcon#*before write, iclass 17, count 0 2006.229.05:12:28.53#ibcon#enter sib2, iclass 17, count 0 2006.229.05:12:28.53#ibcon#flushed, iclass 17, count 0 2006.229.05:12:28.53#ibcon#about to write, iclass 17, count 0 2006.229.05:12:28.53#ibcon#wrote, iclass 17, count 0 2006.229.05:12:28.53#ibcon#about to read 3, iclass 17, count 0 2006.229.05:12:28.57#ibcon#read 3, iclass 17, count 0 2006.229.05:12:28.57#ibcon#about to read 4, iclass 17, count 0 2006.229.05:12:28.57#ibcon#read 4, iclass 17, count 0 2006.229.05:12:28.57#ibcon#about to read 5, iclass 17, count 0 2006.229.05:12:28.57#ibcon#read 5, iclass 17, count 0 2006.229.05:12:28.57#ibcon#about to read 6, iclass 17, count 0 2006.229.05:12:28.57#ibcon#read 6, iclass 17, count 0 2006.229.05:12:28.57#ibcon#end of sib2, iclass 17, count 0 2006.229.05:12:28.57#ibcon#*after write, iclass 17, count 0 2006.229.05:12:28.57#ibcon#*before return 0, iclass 17, count 0 2006.229.05:12:28.57#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:28.57#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:28.57#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:12:28.57#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:12:28.57$vck44/va=2,7 2006.229.05:12:28.57#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.05:12:28.57#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.05:12:28.57#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:28.57#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:28.63#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:28.63#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:28.63#ibcon#enter wrdev, iclass 19, count 2 2006.229.05:12:28.63#ibcon#first serial, iclass 19, count 2 2006.229.05:12:28.63#ibcon#enter sib2, iclass 19, count 2 2006.229.05:12:28.63#ibcon#flushed, iclass 19, count 2 2006.229.05:12:28.63#ibcon#about to write, iclass 19, count 2 2006.229.05:12:28.63#ibcon#wrote, iclass 19, count 2 2006.229.05:12:28.63#ibcon#about to read 3, iclass 19, count 2 2006.229.05:12:28.65#ibcon#read 3, iclass 19, count 2 2006.229.05:12:28.65#ibcon#about to read 4, iclass 19, count 2 2006.229.05:12:28.65#ibcon#read 4, iclass 19, count 2 2006.229.05:12:28.65#ibcon#about to read 5, iclass 19, count 2 2006.229.05:12:28.65#ibcon#read 5, iclass 19, count 2 2006.229.05:12:28.65#ibcon#about to read 6, iclass 19, count 2 2006.229.05:12:28.65#ibcon#read 6, iclass 19, count 2 2006.229.05:12:28.65#ibcon#end of sib2, iclass 19, count 2 2006.229.05:12:28.65#ibcon#*mode == 0, iclass 19, count 2 2006.229.05:12:28.65#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.05:12:28.65#ibcon#[25=AT02-07\r\n] 2006.229.05:12:28.65#ibcon#*before write, iclass 19, count 2 2006.229.05:12:28.65#ibcon#enter sib2, iclass 19, count 2 2006.229.05:12:28.65#ibcon#flushed, iclass 19, count 2 2006.229.05:12:28.65#ibcon#about to write, iclass 19, count 2 2006.229.05:12:28.65#ibcon#wrote, iclass 19, count 2 2006.229.05:12:28.65#ibcon#about to read 3, iclass 19, count 2 2006.229.05:12:28.68#ibcon#read 3, iclass 19, count 2 2006.229.05:12:28.68#ibcon#about to read 4, iclass 19, count 2 2006.229.05:12:28.68#ibcon#read 4, iclass 19, count 2 2006.229.05:12:28.68#ibcon#about to read 5, iclass 19, count 2 2006.229.05:12:28.68#ibcon#read 5, iclass 19, count 2 2006.229.05:12:28.68#ibcon#about to read 6, iclass 19, count 2 2006.229.05:12:28.68#ibcon#read 6, iclass 19, count 2 2006.229.05:12:28.68#ibcon#end of sib2, iclass 19, count 2 2006.229.05:12:28.68#ibcon#*after write, iclass 19, count 2 2006.229.05:12:28.68#ibcon#*before return 0, iclass 19, count 2 2006.229.05:12:28.68#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:28.68#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:28.68#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.05:12:28.68#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:28.68#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:28.80#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:28.80#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:28.80#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:12:28.80#ibcon#first serial, iclass 19, count 0 2006.229.05:12:28.80#ibcon#enter sib2, iclass 19, count 0 2006.229.05:12:28.80#ibcon#flushed, iclass 19, count 0 2006.229.05:12:28.80#ibcon#about to write, iclass 19, count 0 2006.229.05:12:28.80#ibcon#wrote, iclass 19, count 0 2006.229.05:12:28.80#ibcon#about to read 3, iclass 19, count 0 2006.229.05:12:28.82#ibcon#read 3, iclass 19, count 0 2006.229.05:12:28.82#ibcon#about to read 4, iclass 19, count 0 2006.229.05:12:28.82#ibcon#read 4, iclass 19, count 0 2006.229.05:12:28.82#ibcon#about to read 5, iclass 19, count 0 2006.229.05:12:28.82#ibcon#read 5, iclass 19, count 0 2006.229.05:12:28.82#ibcon#about to read 6, iclass 19, count 0 2006.229.05:12:28.82#ibcon#read 6, iclass 19, count 0 2006.229.05:12:28.82#ibcon#end of sib2, iclass 19, count 0 2006.229.05:12:28.82#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:12:28.82#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:12:28.82#ibcon#[25=USB\r\n] 2006.229.05:12:28.82#ibcon#*before write, iclass 19, count 0 2006.229.05:12:28.82#ibcon#enter sib2, iclass 19, count 0 2006.229.05:12:28.82#ibcon#flushed, iclass 19, count 0 2006.229.05:12:28.82#ibcon#about to write, iclass 19, count 0 2006.229.05:12:28.82#ibcon#wrote, iclass 19, count 0 2006.229.05:12:28.82#ibcon#about to read 3, iclass 19, count 0 2006.229.05:12:28.85#ibcon#read 3, iclass 19, count 0 2006.229.05:12:28.85#ibcon#about to read 4, iclass 19, count 0 2006.229.05:12:28.85#ibcon#read 4, iclass 19, count 0 2006.229.05:12:28.85#ibcon#about to read 5, iclass 19, count 0 2006.229.05:12:28.85#ibcon#read 5, iclass 19, count 0 2006.229.05:12:28.85#ibcon#about to read 6, iclass 19, count 0 2006.229.05:12:28.85#ibcon#read 6, iclass 19, count 0 2006.229.05:12:28.85#ibcon#end of sib2, iclass 19, count 0 2006.229.05:12:28.85#ibcon#*after write, iclass 19, count 0 2006.229.05:12:28.85#ibcon#*before return 0, iclass 19, count 0 2006.229.05:12:28.85#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:28.85#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:28.85#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:12:28.85#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:12:28.85$vck44/valo=3,564.99 2006.229.05:12:28.85#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.05:12:28.85#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.05:12:28.85#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:28.85#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:28.85#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:28.85#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:28.85#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:12:28.85#ibcon#first serial, iclass 21, count 0 2006.229.05:12:28.85#ibcon#enter sib2, iclass 21, count 0 2006.229.05:12:28.85#ibcon#flushed, iclass 21, count 0 2006.229.05:12:28.85#ibcon#about to write, iclass 21, count 0 2006.229.05:12:28.85#ibcon#wrote, iclass 21, count 0 2006.229.05:12:28.85#ibcon#about to read 3, iclass 21, count 0 2006.229.05:12:28.87#ibcon#read 3, iclass 21, count 0 2006.229.05:12:28.87#ibcon#about to read 4, iclass 21, count 0 2006.229.05:12:28.87#ibcon#read 4, iclass 21, count 0 2006.229.05:12:28.87#ibcon#about to read 5, iclass 21, count 0 2006.229.05:12:28.87#ibcon#read 5, iclass 21, count 0 2006.229.05:12:28.87#ibcon#about to read 6, iclass 21, count 0 2006.229.05:12:28.87#ibcon#read 6, iclass 21, count 0 2006.229.05:12:28.87#ibcon#end of sib2, iclass 21, count 0 2006.229.05:12:28.87#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:12:28.87#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:12:28.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:12:28.87#ibcon#*before write, iclass 21, count 0 2006.229.05:12:28.87#ibcon#enter sib2, iclass 21, count 0 2006.229.05:12:28.87#ibcon#flushed, iclass 21, count 0 2006.229.05:12:28.87#ibcon#about to write, iclass 21, count 0 2006.229.05:12:28.87#ibcon#wrote, iclass 21, count 0 2006.229.05:12:28.87#ibcon#about to read 3, iclass 21, count 0 2006.229.05:12:28.91#ibcon#read 3, iclass 21, count 0 2006.229.05:12:28.91#ibcon#about to read 4, iclass 21, count 0 2006.229.05:12:28.91#ibcon#read 4, iclass 21, count 0 2006.229.05:12:28.91#ibcon#about to read 5, iclass 21, count 0 2006.229.05:12:28.91#ibcon#read 5, iclass 21, count 0 2006.229.05:12:28.91#ibcon#about to read 6, iclass 21, count 0 2006.229.05:12:28.91#ibcon#read 6, iclass 21, count 0 2006.229.05:12:28.91#ibcon#end of sib2, iclass 21, count 0 2006.229.05:12:28.91#ibcon#*after write, iclass 21, count 0 2006.229.05:12:28.91#ibcon#*before return 0, iclass 21, count 0 2006.229.05:12:28.91#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:28.91#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:28.91#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:12:28.91#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:12:28.91$vck44/va=3,6 2006.229.05:12:28.91#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.05:12:28.91#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.05:12:28.91#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:28.91#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:28.97#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:28.97#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:28.97#ibcon#enter wrdev, iclass 23, count 2 2006.229.05:12:28.97#ibcon#first serial, iclass 23, count 2 2006.229.05:12:28.97#ibcon#enter sib2, iclass 23, count 2 2006.229.05:12:28.97#ibcon#flushed, iclass 23, count 2 2006.229.05:12:28.97#ibcon#about to write, iclass 23, count 2 2006.229.05:12:28.97#ibcon#wrote, iclass 23, count 2 2006.229.05:12:28.97#ibcon#about to read 3, iclass 23, count 2 2006.229.05:12:28.99#ibcon#read 3, iclass 23, count 2 2006.229.05:12:28.99#ibcon#about to read 4, iclass 23, count 2 2006.229.05:12:28.99#ibcon#read 4, iclass 23, count 2 2006.229.05:12:28.99#ibcon#about to read 5, iclass 23, count 2 2006.229.05:12:28.99#ibcon#read 5, iclass 23, count 2 2006.229.05:12:28.99#ibcon#about to read 6, iclass 23, count 2 2006.229.05:12:28.99#ibcon#read 6, iclass 23, count 2 2006.229.05:12:28.99#ibcon#end of sib2, iclass 23, count 2 2006.229.05:12:28.99#ibcon#*mode == 0, iclass 23, count 2 2006.229.05:12:28.99#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.05:12:28.99#ibcon#[25=AT03-06\r\n] 2006.229.05:12:28.99#ibcon#*before write, iclass 23, count 2 2006.229.05:12:28.99#ibcon#enter sib2, iclass 23, count 2 2006.229.05:12:28.99#ibcon#flushed, iclass 23, count 2 2006.229.05:12:28.99#ibcon#about to write, iclass 23, count 2 2006.229.05:12:28.99#ibcon#wrote, iclass 23, count 2 2006.229.05:12:28.99#ibcon#about to read 3, iclass 23, count 2 2006.229.05:12:29.02#ibcon#read 3, iclass 23, count 2 2006.229.05:12:29.02#ibcon#about to read 4, iclass 23, count 2 2006.229.05:12:29.02#ibcon#read 4, iclass 23, count 2 2006.229.05:12:29.02#ibcon#about to read 5, iclass 23, count 2 2006.229.05:12:29.02#ibcon#read 5, iclass 23, count 2 2006.229.05:12:29.02#ibcon#about to read 6, iclass 23, count 2 2006.229.05:12:29.02#ibcon#read 6, iclass 23, count 2 2006.229.05:12:29.02#ibcon#end of sib2, iclass 23, count 2 2006.229.05:12:29.02#ibcon#*after write, iclass 23, count 2 2006.229.05:12:29.02#ibcon#*before return 0, iclass 23, count 2 2006.229.05:12:29.02#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:29.02#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:29.02#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.05:12:29.02#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:29.02#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:29.14#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:29.14#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:29.14#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:12:29.14#ibcon#first serial, iclass 23, count 0 2006.229.05:12:29.14#ibcon#enter sib2, iclass 23, count 0 2006.229.05:12:29.14#ibcon#flushed, iclass 23, count 0 2006.229.05:12:29.14#ibcon#about to write, iclass 23, count 0 2006.229.05:12:29.14#ibcon#wrote, iclass 23, count 0 2006.229.05:12:29.14#ibcon#about to read 3, iclass 23, count 0 2006.229.05:12:29.16#ibcon#read 3, iclass 23, count 0 2006.229.05:12:29.16#ibcon#about to read 4, iclass 23, count 0 2006.229.05:12:29.16#ibcon#read 4, iclass 23, count 0 2006.229.05:12:29.16#ibcon#about to read 5, iclass 23, count 0 2006.229.05:12:29.16#ibcon#read 5, iclass 23, count 0 2006.229.05:12:29.16#ibcon#about to read 6, iclass 23, count 0 2006.229.05:12:29.16#ibcon#read 6, iclass 23, count 0 2006.229.05:12:29.16#ibcon#end of sib2, iclass 23, count 0 2006.229.05:12:29.16#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:12:29.16#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:12:29.16#ibcon#[25=USB\r\n] 2006.229.05:12:29.16#ibcon#*before write, iclass 23, count 0 2006.229.05:12:29.16#ibcon#enter sib2, iclass 23, count 0 2006.229.05:12:29.16#ibcon#flushed, iclass 23, count 0 2006.229.05:12:29.16#ibcon#about to write, iclass 23, count 0 2006.229.05:12:29.16#ibcon#wrote, iclass 23, count 0 2006.229.05:12:29.16#ibcon#about to read 3, iclass 23, count 0 2006.229.05:12:29.19#ibcon#read 3, iclass 23, count 0 2006.229.05:12:29.19#ibcon#about to read 4, iclass 23, count 0 2006.229.05:12:29.19#ibcon#read 4, iclass 23, count 0 2006.229.05:12:29.19#ibcon#about to read 5, iclass 23, count 0 2006.229.05:12:29.19#ibcon#read 5, iclass 23, count 0 2006.229.05:12:29.19#ibcon#about to read 6, iclass 23, count 0 2006.229.05:12:29.19#ibcon#read 6, iclass 23, count 0 2006.229.05:12:29.19#ibcon#end of sib2, iclass 23, count 0 2006.229.05:12:29.19#ibcon#*after write, iclass 23, count 0 2006.229.05:12:29.19#ibcon#*before return 0, iclass 23, count 0 2006.229.05:12:29.19#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:29.19#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:29.19#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:12:29.19#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:12:29.19$vck44/valo=4,624.99 2006.229.05:12:29.19#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.05:12:29.19#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.05:12:29.19#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:29.19#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:29.19#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:29.19#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:29.19#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:12:29.19#ibcon#first serial, iclass 25, count 0 2006.229.05:12:29.19#ibcon#enter sib2, iclass 25, count 0 2006.229.05:12:29.19#ibcon#flushed, iclass 25, count 0 2006.229.05:12:29.19#ibcon#about to write, iclass 25, count 0 2006.229.05:12:29.19#ibcon#wrote, iclass 25, count 0 2006.229.05:12:29.19#ibcon#about to read 3, iclass 25, count 0 2006.229.05:12:29.21#ibcon#read 3, iclass 25, count 0 2006.229.05:12:29.21#ibcon#about to read 4, iclass 25, count 0 2006.229.05:12:29.21#ibcon#read 4, iclass 25, count 0 2006.229.05:12:29.21#ibcon#about to read 5, iclass 25, count 0 2006.229.05:12:29.21#ibcon#read 5, iclass 25, count 0 2006.229.05:12:29.21#ibcon#about to read 6, iclass 25, count 0 2006.229.05:12:29.21#ibcon#read 6, iclass 25, count 0 2006.229.05:12:29.21#ibcon#end of sib2, iclass 25, count 0 2006.229.05:12:29.21#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:12:29.21#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:12:29.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:12:29.21#ibcon#*before write, iclass 25, count 0 2006.229.05:12:29.21#ibcon#enter sib2, iclass 25, count 0 2006.229.05:12:29.21#ibcon#flushed, iclass 25, count 0 2006.229.05:12:29.21#ibcon#about to write, iclass 25, count 0 2006.229.05:12:29.21#ibcon#wrote, iclass 25, count 0 2006.229.05:12:29.21#ibcon#about to read 3, iclass 25, count 0 2006.229.05:12:29.25#ibcon#read 3, iclass 25, count 0 2006.229.05:12:29.25#ibcon#about to read 4, iclass 25, count 0 2006.229.05:12:29.25#ibcon#read 4, iclass 25, count 0 2006.229.05:12:29.25#ibcon#about to read 5, iclass 25, count 0 2006.229.05:12:29.25#ibcon#read 5, iclass 25, count 0 2006.229.05:12:29.25#ibcon#about to read 6, iclass 25, count 0 2006.229.05:12:29.25#ibcon#read 6, iclass 25, count 0 2006.229.05:12:29.25#ibcon#end of sib2, iclass 25, count 0 2006.229.05:12:29.25#ibcon#*after write, iclass 25, count 0 2006.229.05:12:29.25#ibcon#*before return 0, iclass 25, count 0 2006.229.05:12:29.25#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:29.25#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:29.25#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:12:29.25#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:12:29.25$vck44/va=4,7 2006.229.05:12:29.25#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.05:12:29.25#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.05:12:29.25#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:29.25#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:29.31#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:29.31#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:29.31#ibcon#enter wrdev, iclass 27, count 2 2006.229.05:12:29.31#ibcon#first serial, iclass 27, count 2 2006.229.05:12:29.31#ibcon#enter sib2, iclass 27, count 2 2006.229.05:12:29.31#ibcon#flushed, iclass 27, count 2 2006.229.05:12:29.31#ibcon#about to write, iclass 27, count 2 2006.229.05:12:29.31#ibcon#wrote, iclass 27, count 2 2006.229.05:12:29.31#ibcon#about to read 3, iclass 27, count 2 2006.229.05:12:29.33#ibcon#read 3, iclass 27, count 2 2006.229.05:12:29.33#ibcon#about to read 4, iclass 27, count 2 2006.229.05:12:29.33#ibcon#read 4, iclass 27, count 2 2006.229.05:12:29.33#ibcon#about to read 5, iclass 27, count 2 2006.229.05:12:29.33#ibcon#read 5, iclass 27, count 2 2006.229.05:12:29.33#ibcon#about to read 6, iclass 27, count 2 2006.229.05:12:29.33#ibcon#read 6, iclass 27, count 2 2006.229.05:12:29.33#ibcon#end of sib2, iclass 27, count 2 2006.229.05:12:29.33#ibcon#*mode == 0, iclass 27, count 2 2006.229.05:12:29.33#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.05:12:29.33#ibcon#[25=AT04-07\r\n] 2006.229.05:12:29.33#ibcon#*before write, iclass 27, count 2 2006.229.05:12:29.33#ibcon#enter sib2, iclass 27, count 2 2006.229.05:12:29.33#ibcon#flushed, iclass 27, count 2 2006.229.05:12:29.33#ibcon#about to write, iclass 27, count 2 2006.229.05:12:29.33#ibcon#wrote, iclass 27, count 2 2006.229.05:12:29.33#ibcon#about to read 3, iclass 27, count 2 2006.229.05:12:29.36#ibcon#read 3, iclass 27, count 2 2006.229.05:12:29.36#ibcon#about to read 4, iclass 27, count 2 2006.229.05:12:29.36#ibcon#read 4, iclass 27, count 2 2006.229.05:12:29.36#ibcon#about to read 5, iclass 27, count 2 2006.229.05:12:29.36#ibcon#read 5, iclass 27, count 2 2006.229.05:12:29.36#ibcon#about to read 6, iclass 27, count 2 2006.229.05:12:29.36#ibcon#read 6, iclass 27, count 2 2006.229.05:12:29.36#ibcon#end of sib2, iclass 27, count 2 2006.229.05:12:29.36#ibcon#*after write, iclass 27, count 2 2006.229.05:12:29.36#ibcon#*before return 0, iclass 27, count 2 2006.229.05:12:29.36#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:29.36#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:29.36#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.05:12:29.36#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:29.36#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:29.48#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:29.48#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:29.48#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:12:29.48#ibcon#first serial, iclass 27, count 0 2006.229.05:12:29.48#ibcon#enter sib2, iclass 27, count 0 2006.229.05:12:29.48#ibcon#flushed, iclass 27, count 0 2006.229.05:12:29.48#ibcon#about to write, iclass 27, count 0 2006.229.05:12:29.48#ibcon#wrote, iclass 27, count 0 2006.229.05:12:29.48#ibcon#about to read 3, iclass 27, count 0 2006.229.05:12:29.50#ibcon#read 3, iclass 27, count 0 2006.229.05:12:29.50#ibcon#about to read 4, iclass 27, count 0 2006.229.05:12:29.50#ibcon#read 4, iclass 27, count 0 2006.229.05:12:29.50#ibcon#about to read 5, iclass 27, count 0 2006.229.05:12:29.50#ibcon#read 5, iclass 27, count 0 2006.229.05:12:29.50#ibcon#about to read 6, iclass 27, count 0 2006.229.05:12:29.50#ibcon#read 6, iclass 27, count 0 2006.229.05:12:29.50#ibcon#end of sib2, iclass 27, count 0 2006.229.05:12:29.50#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:12:29.50#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:12:29.50#ibcon#[25=USB\r\n] 2006.229.05:12:29.50#ibcon#*before write, iclass 27, count 0 2006.229.05:12:29.50#ibcon#enter sib2, iclass 27, count 0 2006.229.05:12:29.50#ibcon#flushed, iclass 27, count 0 2006.229.05:12:29.50#ibcon#about to write, iclass 27, count 0 2006.229.05:12:29.50#ibcon#wrote, iclass 27, count 0 2006.229.05:12:29.50#ibcon#about to read 3, iclass 27, count 0 2006.229.05:12:29.53#ibcon#read 3, iclass 27, count 0 2006.229.05:12:29.53#ibcon#about to read 4, iclass 27, count 0 2006.229.05:12:29.53#ibcon#read 4, iclass 27, count 0 2006.229.05:12:29.53#ibcon#about to read 5, iclass 27, count 0 2006.229.05:12:29.53#ibcon#read 5, iclass 27, count 0 2006.229.05:12:29.53#ibcon#about to read 6, iclass 27, count 0 2006.229.05:12:29.53#ibcon#read 6, iclass 27, count 0 2006.229.05:12:29.53#ibcon#end of sib2, iclass 27, count 0 2006.229.05:12:29.53#ibcon#*after write, iclass 27, count 0 2006.229.05:12:29.53#ibcon#*before return 0, iclass 27, count 0 2006.229.05:12:29.53#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:29.53#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:29.53#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:12:29.53#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:12:29.53$vck44/valo=5,734.99 2006.229.05:12:29.53#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:12:29.53#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:12:29.53#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:29.53#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:29.53#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:29.53#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:29.53#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:12:29.53#ibcon#first serial, iclass 29, count 0 2006.229.05:12:29.53#ibcon#enter sib2, iclass 29, count 0 2006.229.05:12:29.53#ibcon#flushed, iclass 29, count 0 2006.229.05:12:29.53#ibcon#about to write, iclass 29, count 0 2006.229.05:12:29.53#ibcon#wrote, iclass 29, count 0 2006.229.05:12:29.53#ibcon#about to read 3, iclass 29, count 0 2006.229.05:12:29.55#ibcon#read 3, iclass 29, count 0 2006.229.05:12:29.55#ibcon#about to read 4, iclass 29, count 0 2006.229.05:12:29.55#ibcon#read 4, iclass 29, count 0 2006.229.05:12:29.55#ibcon#about to read 5, iclass 29, count 0 2006.229.05:12:29.55#ibcon#read 5, iclass 29, count 0 2006.229.05:12:29.55#ibcon#about to read 6, iclass 29, count 0 2006.229.05:12:29.55#ibcon#read 6, iclass 29, count 0 2006.229.05:12:29.55#ibcon#end of sib2, iclass 29, count 0 2006.229.05:12:29.55#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:12:29.55#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:12:29.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:12:29.55#ibcon#*before write, iclass 29, count 0 2006.229.05:12:29.55#ibcon#enter sib2, iclass 29, count 0 2006.229.05:12:29.55#ibcon#flushed, iclass 29, count 0 2006.229.05:12:29.55#ibcon#about to write, iclass 29, count 0 2006.229.05:12:29.55#ibcon#wrote, iclass 29, count 0 2006.229.05:12:29.55#ibcon#about to read 3, iclass 29, count 0 2006.229.05:12:29.59#ibcon#read 3, iclass 29, count 0 2006.229.05:12:29.59#ibcon#about to read 4, iclass 29, count 0 2006.229.05:12:29.59#ibcon#read 4, iclass 29, count 0 2006.229.05:12:29.59#ibcon#about to read 5, iclass 29, count 0 2006.229.05:12:29.59#ibcon#read 5, iclass 29, count 0 2006.229.05:12:29.59#ibcon#about to read 6, iclass 29, count 0 2006.229.05:12:29.59#ibcon#read 6, iclass 29, count 0 2006.229.05:12:29.59#ibcon#end of sib2, iclass 29, count 0 2006.229.05:12:29.59#ibcon#*after write, iclass 29, count 0 2006.229.05:12:29.59#ibcon#*before return 0, iclass 29, count 0 2006.229.05:12:29.59#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:29.59#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:29.59#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:12:29.59#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:12:29.59$vck44/va=5,4 2006.229.05:12:29.59#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.05:12:29.59#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.05:12:29.59#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:29.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:29.65#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:29.65#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:29.65#ibcon#enter wrdev, iclass 31, count 2 2006.229.05:12:29.65#ibcon#first serial, iclass 31, count 2 2006.229.05:12:29.65#ibcon#enter sib2, iclass 31, count 2 2006.229.05:12:29.65#ibcon#flushed, iclass 31, count 2 2006.229.05:12:29.65#ibcon#about to write, iclass 31, count 2 2006.229.05:12:29.65#ibcon#wrote, iclass 31, count 2 2006.229.05:12:29.65#ibcon#about to read 3, iclass 31, count 2 2006.229.05:12:29.67#ibcon#read 3, iclass 31, count 2 2006.229.05:12:29.67#ibcon#about to read 4, iclass 31, count 2 2006.229.05:12:29.67#ibcon#read 4, iclass 31, count 2 2006.229.05:12:29.67#ibcon#about to read 5, iclass 31, count 2 2006.229.05:12:29.67#ibcon#read 5, iclass 31, count 2 2006.229.05:12:29.67#ibcon#about to read 6, iclass 31, count 2 2006.229.05:12:29.67#ibcon#read 6, iclass 31, count 2 2006.229.05:12:29.67#ibcon#end of sib2, iclass 31, count 2 2006.229.05:12:29.67#ibcon#*mode == 0, iclass 31, count 2 2006.229.05:12:29.67#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.05:12:29.67#ibcon#[25=AT05-04\r\n] 2006.229.05:12:29.67#ibcon#*before write, iclass 31, count 2 2006.229.05:12:29.67#ibcon#enter sib2, iclass 31, count 2 2006.229.05:12:29.67#ibcon#flushed, iclass 31, count 2 2006.229.05:12:29.67#ibcon#about to write, iclass 31, count 2 2006.229.05:12:29.67#ibcon#wrote, iclass 31, count 2 2006.229.05:12:29.67#ibcon#about to read 3, iclass 31, count 2 2006.229.05:12:29.70#ibcon#read 3, iclass 31, count 2 2006.229.05:12:29.70#ibcon#about to read 4, iclass 31, count 2 2006.229.05:12:29.70#ibcon#read 4, iclass 31, count 2 2006.229.05:12:29.70#ibcon#about to read 5, iclass 31, count 2 2006.229.05:12:29.70#ibcon#read 5, iclass 31, count 2 2006.229.05:12:29.70#ibcon#about to read 6, iclass 31, count 2 2006.229.05:12:29.70#ibcon#read 6, iclass 31, count 2 2006.229.05:12:29.70#ibcon#end of sib2, iclass 31, count 2 2006.229.05:12:29.70#ibcon#*after write, iclass 31, count 2 2006.229.05:12:29.70#ibcon#*before return 0, iclass 31, count 2 2006.229.05:12:29.70#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:29.70#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:29.70#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.05:12:29.70#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:29.70#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:29.82#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:29.82#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:29.82#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:12:29.82#ibcon#first serial, iclass 31, count 0 2006.229.05:12:29.82#ibcon#enter sib2, iclass 31, count 0 2006.229.05:12:29.82#ibcon#flushed, iclass 31, count 0 2006.229.05:12:29.82#ibcon#about to write, iclass 31, count 0 2006.229.05:12:29.82#ibcon#wrote, iclass 31, count 0 2006.229.05:12:29.82#ibcon#about to read 3, iclass 31, count 0 2006.229.05:12:29.84#ibcon#read 3, iclass 31, count 0 2006.229.05:12:29.84#ibcon#about to read 4, iclass 31, count 0 2006.229.05:12:29.84#ibcon#read 4, iclass 31, count 0 2006.229.05:12:29.84#ibcon#about to read 5, iclass 31, count 0 2006.229.05:12:29.84#ibcon#read 5, iclass 31, count 0 2006.229.05:12:29.84#ibcon#about to read 6, iclass 31, count 0 2006.229.05:12:29.84#ibcon#read 6, iclass 31, count 0 2006.229.05:12:29.84#ibcon#end of sib2, iclass 31, count 0 2006.229.05:12:29.84#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:12:29.84#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:12:29.84#ibcon#[25=USB\r\n] 2006.229.05:12:29.84#ibcon#*before write, iclass 31, count 0 2006.229.05:12:29.84#ibcon#enter sib2, iclass 31, count 0 2006.229.05:12:29.84#ibcon#flushed, iclass 31, count 0 2006.229.05:12:29.84#ibcon#about to write, iclass 31, count 0 2006.229.05:12:29.84#ibcon#wrote, iclass 31, count 0 2006.229.05:12:29.84#ibcon#about to read 3, iclass 31, count 0 2006.229.05:12:29.87#ibcon#read 3, iclass 31, count 0 2006.229.05:12:29.87#ibcon#about to read 4, iclass 31, count 0 2006.229.05:12:29.87#ibcon#read 4, iclass 31, count 0 2006.229.05:12:29.87#ibcon#about to read 5, iclass 31, count 0 2006.229.05:12:29.87#ibcon#read 5, iclass 31, count 0 2006.229.05:12:29.87#ibcon#about to read 6, iclass 31, count 0 2006.229.05:12:29.87#ibcon#read 6, iclass 31, count 0 2006.229.05:12:29.87#ibcon#end of sib2, iclass 31, count 0 2006.229.05:12:29.87#ibcon#*after write, iclass 31, count 0 2006.229.05:12:29.87#ibcon#*before return 0, iclass 31, count 0 2006.229.05:12:29.87#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:29.87#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:29.87#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:12:29.87#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:12:29.87$vck44/valo=6,814.99 2006.229.05:12:29.87#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.05:12:29.87#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.05:12:29.87#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:29.87#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:29.87#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:29.87#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:29.87#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:12:29.87#ibcon#first serial, iclass 33, count 0 2006.229.05:12:29.87#ibcon#enter sib2, iclass 33, count 0 2006.229.05:12:29.87#ibcon#flushed, iclass 33, count 0 2006.229.05:12:29.87#ibcon#about to write, iclass 33, count 0 2006.229.05:12:29.87#ibcon#wrote, iclass 33, count 0 2006.229.05:12:29.87#ibcon#about to read 3, iclass 33, count 0 2006.229.05:12:29.89#ibcon#read 3, iclass 33, count 0 2006.229.05:12:29.89#ibcon#about to read 4, iclass 33, count 0 2006.229.05:12:29.89#ibcon#read 4, iclass 33, count 0 2006.229.05:12:29.89#ibcon#about to read 5, iclass 33, count 0 2006.229.05:12:29.89#ibcon#read 5, iclass 33, count 0 2006.229.05:12:29.89#ibcon#about to read 6, iclass 33, count 0 2006.229.05:12:29.89#ibcon#read 6, iclass 33, count 0 2006.229.05:12:29.89#ibcon#end of sib2, iclass 33, count 0 2006.229.05:12:29.89#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:12:29.89#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:12:29.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:12:29.89#ibcon#*before write, iclass 33, count 0 2006.229.05:12:29.89#ibcon#enter sib2, iclass 33, count 0 2006.229.05:12:29.89#ibcon#flushed, iclass 33, count 0 2006.229.05:12:29.89#ibcon#about to write, iclass 33, count 0 2006.229.05:12:29.89#ibcon#wrote, iclass 33, count 0 2006.229.05:12:29.89#ibcon#about to read 3, iclass 33, count 0 2006.229.05:12:29.93#ibcon#read 3, iclass 33, count 0 2006.229.05:12:29.93#ibcon#about to read 4, iclass 33, count 0 2006.229.05:12:29.93#ibcon#read 4, iclass 33, count 0 2006.229.05:12:29.93#ibcon#about to read 5, iclass 33, count 0 2006.229.05:12:29.93#ibcon#read 5, iclass 33, count 0 2006.229.05:12:29.93#ibcon#about to read 6, iclass 33, count 0 2006.229.05:12:29.93#ibcon#read 6, iclass 33, count 0 2006.229.05:12:29.93#ibcon#end of sib2, iclass 33, count 0 2006.229.05:12:29.93#ibcon#*after write, iclass 33, count 0 2006.229.05:12:29.93#ibcon#*before return 0, iclass 33, count 0 2006.229.05:12:29.93#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:29.93#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:29.93#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:12:29.93#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:12:29.93$vck44/va=6,4 2006.229.05:12:29.93#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.05:12:29.93#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.05:12:29.93#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:29.93#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:29.99#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:29.99#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:29.99#ibcon#enter wrdev, iclass 35, count 2 2006.229.05:12:29.99#ibcon#first serial, iclass 35, count 2 2006.229.05:12:29.99#ibcon#enter sib2, iclass 35, count 2 2006.229.05:12:29.99#ibcon#flushed, iclass 35, count 2 2006.229.05:12:29.99#ibcon#about to write, iclass 35, count 2 2006.229.05:12:29.99#ibcon#wrote, iclass 35, count 2 2006.229.05:12:29.99#ibcon#about to read 3, iclass 35, count 2 2006.229.05:12:30.01#ibcon#read 3, iclass 35, count 2 2006.229.05:12:30.01#ibcon#about to read 4, iclass 35, count 2 2006.229.05:12:30.01#ibcon#read 4, iclass 35, count 2 2006.229.05:12:30.01#ibcon#about to read 5, iclass 35, count 2 2006.229.05:12:30.01#ibcon#read 5, iclass 35, count 2 2006.229.05:12:30.01#ibcon#about to read 6, iclass 35, count 2 2006.229.05:12:30.01#ibcon#read 6, iclass 35, count 2 2006.229.05:12:30.01#ibcon#end of sib2, iclass 35, count 2 2006.229.05:12:30.01#ibcon#*mode == 0, iclass 35, count 2 2006.229.05:12:30.01#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.05:12:30.01#ibcon#[25=AT06-04\r\n] 2006.229.05:12:30.01#ibcon#*before write, iclass 35, count 2 2006.229.05:12:30.01#ibcon#enter sib2, iclass 35, count 2 2006.229.05:12:30.01#ibcon#flushed, iclass 35, count 2 2006.229.05:12:30.01#ibcon#about to write, iclass 35, count 2 2006.229.05:12:30.01#ibcon#wrote, iclass 35, count 2 2006.229.05:12:30.01#ibcon#about to read 3, iclass 35, count 2 2006.229.05:12:30.04#ibcon#read 3, iclass 35, count 2 2006.229.05:12:30.04#ibcon#about to read 4, iclass 35, count 2 2006.229.05:12:30.04#ibcon#read 4, iclass 35, count 2 2006.229.05:12:30.04#ibcon#about to read 5, iclass 35, count 2 2006.229.05:12:30.04#ibcon#read 5, iclass 35, count 2 2006.229.05:12:30.04#ibcon#about to read 6, iclass 35, count 2 2006.229.05:12:30.04#ibcon#read 6, iclass 35, count 2 2006.229.05:12:30.04#ibcon#end of sib2, iclass 35, count 2 2006.229.05:12:30.04#ibcon#*after write, iclass 35, count 2 2006.229.05:12:30.04#ibcon#*before return 0, iclass 35, count 2 2006.229.05:12:30.04#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:30.04#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:30.04#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.05:12:30.04#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:30.04#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:30.16#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:30.16#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:30.16#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:12:30.16#ibcon#first serial, iclass 35, count 0 2006.229.05:12:30.16#ibcon#enter sib2, iclass 35, count 0 2006.229.05:12:30.16#ibcon#flushed, iclass 35, count 0 2006.229.05:12:30.16#ibcon#about to write, iclass 35, count 0 2006.229.05:12:30.16#ibcon#wrote, iclass 35, count 0 2006.229.05:12:30.16#ibcon#about to read 3, iclass 35, count 0 2006.229.05:12:30.18#ibcon#read 3, iclass 35, count 0 2006.229.05:12:30.18#ibcon#about to read 4, iclass 35, count 0 2006.229.05:12:30.18#ibcon#read 4, iclass 35, count 0 2006.229.05:12:30.18#ibcon#about to read 5, iclass 35, count 0 2006.229.05:12:30.18#ibcon#read 5, iclass 35, count 0 2006.229.05:12:30.18#ibcon#about to read 6, iclass 35, count 0 2006.229.05:12:30.18#ibcon#read 6, iclass 35, count 0 2006.229.05:12:30.18#ibcon#end of sib2, iclass 35, count 0 2006.229.05:12:30.18#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:12:30.18#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:12:30.18#ibcon#[25=USB\r\n] 2006.229.05:12:30.18#ibcon#*before write, iclass 35, count 0 2006.229.05:12:30.18#ibcon#enter sib2, iclass 35, count 0 2006.229.05:12:30.18#ibcon#flushed, iclass 35, count 0 2006.229.05:12:30.18#ibcon#about to write, iclass 35, count 0 2006.229.05:12:30.18#ibcon#wrote, iclass 35, count 0 2006.229.05:12:30.18#ibcon#about to read 3, iclass 35, count 0 2006.229.05:12:30.21#ibcon#read 3, iclass 35, count 0 2006.229.05:12:30.21#ibcon#about to read 4, iclass 35, count 0 2006.229.05:12:30.21#ibcon#read 4, iclass 35, count 0 2006.229.05:12:30.21#ibcon#about to read 5, iclass 35, count 0 2006.229.05:12:30.21#ibcon#read 5, iclass 35, count 0 2006.229.05:12:30.21#ibcon#about to read 6, iclass 35, count 0 2006.229.05:12:30.21#ibcon#read 6, iclass 35, count 0 2006.229.05:12:30.21#ibcon#end of sib2, iclass 35, count 0 2006.229.05:12:30.21#ibcon#*after write, iclass 35, count 0 2006.229.05:12:30.21#ibcon#*before return 0, iclass 35, count 0 2006.229.05:12:30.21#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:30.21#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:30.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:12:30.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:12:30.21$vck44/valo=7,864.99 2006.229.05:12:30.21#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:12:30.21#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:12:30.21#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:30.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:30.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:30.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:30.21#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:12:30.21#ibcon#first serial, iclass 37, count 0 2006.229.05:12:30.21#ibcon#enter sib2, iclass 37, count 0 2006.229.05:12:30.21#ibcon#flushed, iclass 37, count 0 2006.229.05:12:30.21#ibcon#about to write, iclass 37, count 0 2006.229.05:12:30.21#ibcon#wrote, iclass 37, count 0 2006.229.05:12:30.21#ibcon#about to read 3, iclass 37, count 0 2006.229.05:12:30.23#ibcon#read 3, iclass 37, count 0 2006.229.05:12:30.23#ibcon#about to read 4, iclass 37, count 0 2006.229.05:12:30.23#ibcon#read 4, iclass 37, count 0 2006.229.05:12:30.23#ibcon#about to read 5, iclass 37, count 0 2006.229.05:12:30.23#ibcon#read 5, iclass 37, count 0 2006.229.05:12:30.23#ibcon#about to read 6, iclass 37, count 0 2006.229.05:12:30.23#ibcon#read 6, iclass 37, count 0 2006.229.05:12:30.23#ibcon#end of sib2, iclass 37, count 0 2006.229.05:12:30.23#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:12:30.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:12:30.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:12:30.23#ibcon#*before write, iclass 37, count 0 2006.229.05:12:30.23#ibcon#enter sib2, iclass 37, count 0 2006.229.05:12:30.23#ibcon#flushed, iclass 37, count 0 2006.229.05:12:30.23#ibcon#about to write, iclass 37, count 0 2006.229.05:12:30.23#ibcon#wrote, iclass 37, count 0 2006.229.05:12:30.23#ibcon#about to read 3, iclass 37, count 0 2006.229.05:12:30.27#ibcon#read 3, iclass 37, count 0 2006.229.05:12:30.27#ibcon#about to read 4, iclass 37, count 0 2006.229.05:12:30.27#ibcon#read 4, iclass 37, count 0 2006.229.05:12:30.27#ibcon#about to read 5, iclass 37, count 0 2006.229.05:12:30.27#ibcon#read 5, iclass 37, count 0 2006.229.05:12:30.27#ibcon#about to read 6, iclass 37, count 0 2006.229.05:12:30.27#ibcon#read 6, iclass 37, count 0 2006.229.05:12:30.27#ibcon#end of sib2, iclass 37, count 0 2006.229.05:12:30.27#ibcon#*after write, iclass 37, count 0 2006.229.05:12:30.27#ibcon#*before return 0, iclass 37, count 0 2006.229.05:12:30.27#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:30.27#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:30.27#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:12:30.27#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:12:30.27$vck44/va=7,5 2006.229.05:12:30.27#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.05:12:30.27#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.05:12:30.27#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:30.27#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:30.33#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:30.33#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:30.33#ibcon#enter wrdev, iclass 39, count 2 2006.229.05:12:30.33#ibcon#first serial, iclass 39, count 2 2006.229.05:12:30.33#ibcon#enter sib2, iclass 39, count 2 2006.229.05:12:30.33#ibcon#flushed, iclass 39, count 2 2006.229.05:12:30.33#ibcon#about to write, iclass 39, count 2 2006.229.05:12:30.33#ibcon#wrote, iclass 39, count 2 2006.229.05:12:30.33#ibcon#about to read 3, iclass 39, count 2 2006.229.05:12:30.35#ibcon#read 3, iclass 39, count 2 2006.229.05:12:30.35#ibcon#about to read 4, iclass 39, count 2 2006.229.05:12:30.35#ibcon#read 4, iclass 39, count 2 2006.229.05:12:30.35#ibcon#about to read 5, iclass 39, count 2 2006.229.05:12:30.35#ibcon#read 5, iclass 39, count 2 2006.229.05:12:30.35#ibcon#about to read 6, iclass 39, count 2 2006.229.05:12:30.35#ibcon#read 6, iclass 39, count 2 2006.229.05:12:30.35#ibcon#end of sib2, iclass 39, count 2 2006.229.05:12:30.35#ibcon#*mode == 0, iclass 39, count 2 2006.229.05:12:30.35#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.05:12:30.35#ibcon#[25=AT07-05\r\n] 2006.229.05:12:30.35#ibcon#*before write, iclass 39, count 2 2006.229.05:12:30.35#ibcon#enter sib2, iclass 39, count 2 2006.229.05:12:30.35#ibcon#flushed, iclass 39, count 2 2006.229.05:12:30.35#ibcon#about to write, iclass 39, count 2 2006.229.05:12:30.35#ibcon#wrote, iclass 39, count 2 2006.229.05:12:30.35#ibcon#about to read 3, iclass 39, count 2 2006.229.05:12:30.38#ibcon#read 3, iclass 39, count 2 2006.229.05:12:30.38#ibcon#about to read 4, iclass 39, count 2 2006.229.05:12:30.38#ibcon#read 4, iclass 39, count 2 2006.229.05:12:30.38#ibcon#about to read 5, iclass 39, count 2 2006.229.05:12:30.38#ibcon#read 5, iclass 39, count 2 2006.229.05:12:30.38#ibcon#about to read 6, iclass 39, count 2 2006.229.05:12:30.38#ibcon#read 6, iclass 39, count 2 2006.229.05:12:30.38#ibcon#end of sib2, iclass 39, count 2 2006.229.05:12:30.38#ibcon#*after write, iclass 39, count 2 2006.229.05:12:30.38#ibcon#*before return 0, iclass 39, count 2 2006.229.05:12:30.38#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:30.38#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:30.38#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.05:12:30.38#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:30.38#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:30.50#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:30.50#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:30.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:12:30.50#ibcon#first serial, iclass 39, count 0 2006.229.05:12:30.50#ibcon#enter sib2, iclass 39, count 0 2006.229.05:12:30.50#ibcon#flushed, iclass 39, count 0 2006.229.05:12:30.50#ibcon#about to write, iclass 39, count 0 2006.229.05:12:30.50#ibcon#wrote, iclass 39, count 0 2006.229.05:12:30.50#ibcon#about to read 3, iclass 39, count 0 2006.229.05:12:30.52#ibcon#read 3, iclass 39, count 0 2006.229.05:12:30.52#ibcon#about to read 4, iclass 39, count 0 2006.229.05:12:30.52#ibcon#read 4, iclass 39, count 0 2006.229.05:12:30.52#ibcon#about to read 5, iclass 39, count 0 2006.229.05:12:30.52#ibcon#read 5, iclass 39, count 0 2006.229.05:12:30.52#ibcon#about to read 6, iclass 39, count 0 2006.229.05:12:30.52#ibcon#read 6, iclass 39, count 0 2006.229.05:12:30.52#ibcon#end of sib2, iclass 39, count 0 2006.229.05:12:30.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:12:30.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:12:30.52#ibcon#[25=USB\r\n] 2006.229.05:12:30.52#ibcon#*before write, iclass 39, count 0 2006.229.05:12:30.52#ibcon#enter sib2, iclass 39, count 0 2006.229.05:12:30.52#ibcon#flushed, iclass 39, count 0 2006.229.05:12:30.52#ibcon#about to write, iclass 39, count 0 2006.229.05:12:30.52#ibcon#wrote, iclass 39, count 0 2006.229.05:12:30.52#ibcon#about to read 3, iclass 39, count 0 2006.229.05:12:30.55#ibcon#read 3, iclass 39, count 0 2006.229.05:12:30.55#ibcon#about to read 4, iclass 39, count 0 2006.229.05:12:30.55#ibcon#read 4, iclass 39, count 0 2006.229.05:12:30.55#ibcon#about to read 5, iclass 39, count 0 2006.229.05:12:30.55#ibcon#read 5, iclass 39, count 0 2006.229.05:12:30.55#ibcon#about to read 6, iclass 39, count 0 2006.229.05:12:30.55#ibcon#read 6, iclass 39, count 0 2006.229.05:12:30.55#ibcon#end of sib2, iclass 39, count 0 2006.229.05:12:30.55#ibcon#*after write, iclass 39, count 0 2006.229.05:12:30.55#ibcon#*before return 0, iclass 39, count 0 2006.229.05:12:30.55#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:30.55#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:30.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:12:30.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:12:30.55$vck44/valo=8,884.99 2006.229.05:12:30.55#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.05:12:30.55#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.05:12:30.55#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:30.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:30.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:30.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:30.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:12:30.55#ibcon#first serial, iclass 3, count 0 2006.229.05:12:30.55#ibcon#enter sib2, iclass 3, count 0 2006.229.05:12:30.55#ibcon#flushed, iclass 3, count 0 2006.229.05:12:30.55#ibcon#about to write, iclass 3, count 0 2006.229.05:12:30.55#ibcon#wrote, iclass 3, count 0 2006.229.05:12:30.55#ibcon#about to read 3, iclass 3, count 0 2006.229.05:12:30.57#ibcon#read 3, iclass 3, count 0 2006.229.05:12:30.57#ibcon#about to read 4, iclass 3, count 0 2006.229.05:12:30.57#ibcon#read 4, iclass 3, count 0 2006.229.05:12:30.57#ibcon#about to read 5, iclass 3, count 0 2006.229.05:12:30.57#ibcon#read 5, iclass 3, count 0 2006.229.05:12:30.57#ibcon#about to read 6, iclass 3, count 0 2006.229.05:12:30.57#ibcon#read 6, iclass 3, count 0 2006.229.05:12:30.57#ibcon#end of sib2, iclass 3, count 0 2006.229.05:12:30.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:12:30.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:12:30.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:12:30.57#ibcon#*before write, iclass 3, count 0 2006.229.05:12:30.57#ibcon#enter sib2, iclass 3, count 0 2006.229.05:12:30.57#ibcon#flushed, iclass 3, count 0 2006.229.05:12:30.57#ibcon#about to write, iclass 3, count 0 2006.229.05:12:30.57#ibcon#wrote, iclass 3, count 0 2006.229.05:12:30.57#ibcon#about to read 3, iclass 3, count 0 2006.229.05:12:30.61#ibcon#read 3, iclass 3, count 0 2006.229.05:12:30.61#ibcon#about to read 4, iclass 3, count 0 2006.229.05:12:30.61#ibcon#read 4, iclass 3, count 0 2006.229.05:12:30.61#ibcon#about to read 5, iclass 3, count 0 2006.229.05:12:30.61#ibcon#read 5, iclass 3, count 0 2006.229.05:12:30.61#ibcon#about to read 6, iclass 3, count 0 2006.229.05:12:30.61#ibcon#read 6, iclass 3, count 0 2006.229.05:12:30.61#ibcon#end of sib2, iclass 3, count 0 2006.229.05:12:30.61#ibcon#*after write, iclass 3, count 0 2006.229.05:12:30.61#ibcon#*before return 0, iclass 3, count 0 2006.229.05:12:30.61#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:30.61#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:30.61#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:12:30.61#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:12:30.61$vck44/va=8,6 2006.229.05:12:30.61#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.05:12:30.61#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.05:12:30.61#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:30.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:12:30.67#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:12:30.67#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:12:30.67#ibcon#enter wrdev, iclass 5, count 2 2006.229.05:12:30.67#ibcon#first serial, iclass 5, count 2 2006.229.05:12:30.67#ibcon#enter sib2, iclass 5, count 2 2006.229.05:12:30.67#ibcon#flushed, iclass 5, count 2 2006.229.05:12:30.67#ibcon#about to write, iclass 5, count 2 2006.229.05:12:30.67#ibcon#wrote, iclass 5, count 2 2006.229.05:12:30.67#ibcon#about to read 3, iclass 5, count 2 2006.229.05:12:30.69#ibcon#read 3, iclass 5, count 2 2006.229.05:12:30.69#ibcon#about to read 4, iclass 5, count 2 2006.229.05:12:30.69#ibcon#read 4, iclass 5, count 2 2006.229.05:12:30.69#ibcon#about to read 5, iclass 5, count 2 2006.229.05:12:30.69#ibcon#read 5, iclass 5, count 2 2006.229.05:12:30.69#ibcon#about to read 6, iclass 5, count 2 2006.229.05:12:30.69#ibcon#read 6, iclass 5, count 2 2006.229.05:12:30.69#ibcon#end of sib2, iclass 5, count 2 2006.229.05:12:30.69#ibcon#*mode == 0, iclass 5, count 2 2006.229.05:12:30.69#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.05:12:30.69#ibcon#[25=AT08-06\r\n] 2006.229.05:12:30.69#ibcon#*before write, iclass 5, count 2 2006.229.05:12:30.69#ibcon#enter sib2, iclass 5, count 2 2006.229.05:12:30.69#ibcon#flushed, iclass 5, count 2 2006.229.05:12:30.69#ibcon#about to write, iclass 5, count 2 2006.229.05:12:30.69#ibcon#wrote, iclass 5, count 2 2006.229.05:12:30.69#ibcon#about to read 3, iclass 5, count 2 2006.229.05:12:30.72#ibcon#read 3, iclass 5, count 2 2006.229.05:12:30.72#ibcon#about to read 4, iclass 5, count 2 2006.229.05:12:30.72#ibcon#read 4, iclass 5, count 2 2006.229.05:12:30.72#ibcon#about to read 5, iclass 5, count 2 2006.229.05:12:30.72#ibcon#read 5, iclass 5, count 2 2006.229.05:12:30.72#ibcon#about to read 6, iclass 5, count 2 2006.229.05:12:30.72#ibcon#read 6, iclass 5, count 2 2006.229.05:12:30.72#ibcon#end of sib2, iclass 5, count 2 2006.229.05:12:30.72#ibcon#*after write, iclass 5, count 2 2006.229.05:12:30.72#ibcon#*before return 0, iclass 5, count 2 2006.229.05:12:30.72#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:12:30.72#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:12:30.72#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.05:12:30.72#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:30.72#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:12:30.84#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:12:30.84#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:12:30.84#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:12:30.84#ibcon#first serial, iclass 5, count 0 2006.229.05:12:30.84#ibcon#enter sib2, iclass 5, count 0 2006.229.05:12:30.84#ibcon#flushed, iclass 5, count 0 2006.229.05:12:30.84#ibcon#about to write, iclass 5, count 0 2006.229.05:12:30.84#ibcon#wrote, iclass 5, count 0 2006.229.05:12:30.84#ibcon#about to read 3, iclass 5, count 0 2006.229.05:12:30.86#ibcon#read 3, iclass 5, count 0 2006.229.05:12:30.86#ibcon#about to read 4, iclass 5, count 0 2006.229.05:12:30.86#ibcon#read 4, iclass 5, count 0 2006.229.05:12:30.86#ibcon#about to read 5, iclass 5, count 0 2006.229.05:12:30.86#ibcon#read 5, iclass 5, count 0 2006.229.05:12:30.86#ibcon#about to read 6, iclass 5, count 0 2006.229.05:12:30.86#ibcon#read 6, iclass 5, count 0 2006.229.05:12:30.86#ibcon#end of sib2, iclass 5, count 0 2006.229.05:12:30.86#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:12:30.86#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:12:30.86#ibcon#[25=USB\r\n] 2006.229.05:12:30.86#ibcon#*before write, iclass 5, count 0 2006.229.05:12:30.86#ibcon#enter sib2, iclass 5, count 0 2006.229.05:12:30.86#ibcon#flushed, iclass 5, count 0 2006.229.05:12:30.86#ibcon#about to write, iclass 5, count 0 2006.229.05:12:30.86#ibcon#wrote, iclass 5, count 0 2006.229.05:12:30.86#ibcon#about to read 3, iclass 5, count 0 2006.229.05:12:30.89#ibcon#read 3, iclass 5, count 0 2006.229.05:12:30.89#ibcon#about to read 4, iclass 5, count 0 2006.229.05:12:30.89#ibcon#read 4, iclass 5, count 0 2006.229.05:12:30.89#ibcon#about to read 5, iclass 5, count 0 2006.229.05:12:30.89#ibcon#read 5, iclass 5, count 0 2006.229.05:12:30.89#ibcon#about to read 6, iclass 5, count 0 2006.229.05:12:30.89#ibcon#read 6, iclass 5, count 0 2006.229.05:12:30.89#ibcon#end of sib2, iclass 5, count 0 2006.229.05:12:30.89#ibcon#*after write, iclass 5, count 0 2006.229.05:12:30.89#ibcon#*before return 0, iclass 5, count 0 2006.229.05:12:30.89#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:12:30.89#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:12:30.89#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:12:30.89#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:12:30.89$vck44/vblo=1,629.99 2006.229.05:12:30.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.05:12:30.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.05:12:30.89#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:30.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:12:30.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:12:30.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:12:30.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:12:30.89#ibcon#first serial, iclass 7, count 0 2006.229.05:12:30.89#ibcon#enter sib2, iclass 7, count 0 2006.229.05:12:30.89#ibcon#flushed, iclass 7, count 0 2006.229.05:12:30.89#ibcon#about to write, iclass 7, count 0 2006.229.05:12:30.89#ibcon#wrote, iclass 7, count 0 2006.229.05:12:30.89#ibcon#about to read 3, iclass 7, count 0 2006.229.05:12:30.91#ibcon#read 3, iclass 7, count 0 2006.229.05:12:30.91#ibcon#about to read 4, iclass 7, count 0 2006.229.05:12:30.91#ibcon#read 4, iclass 7, count 0 2006.229.05:12:30.91#ibcon#about to read 5, iclass 7, count 0 2006.229.05:12:30.91#ibcon#read 5, iclass 7, count 0 2006.229.05:12:30.91#ibcon#about to read 6, iclass 7, count 0 2006.229.05:12:30.91#ibcon#read 6, iclass 7, count 0 2006.229.05:12:30.91#ibcon#end of sib2, iclass 7, count 0 2006.229.05:12:30.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:12:30.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:12:30.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:12:30.91#ibcon#*before write, iclass 7, count 0 2006.229.05:12:30.91#ibcon#enter sib2, iclass 7, count 0 2006.229.05:12:30.91#ibcon#flushed, iclass 7, count 0 2006.229.05:12:30.91#ibcon#about to write, iclass 7, count 0 2006.229.05:12:30.91#ibcon#wrote, iclass 7, count 0 2006.229.05:12:30.91#ibcon#about to read 3, iclass 7, count 0 2006.229.05:12:30.95#ibcon#read 3, iclass 7, count 0 2006.229.05:12:30.95#ibcon#about to read 4, iclass 7, count 0 2006.229.05:12:30.95#ibcon#read 4, iclass 7, count 0 2006.229.05:12:30.95#ibcon#about to read 5, iclass 7, count 0 2006.229.05:12:30.95#ibcon#read 5, iclass 7, count 0 2006.229.05:12:30.95#ibcon#about to read 6, iclass 7, count 0 2006.229.05:12:30.95#ibcon#read 6, iclass 7, count 0 2006.229.05:12:30.95#ibcon#end of sib2, iclass 7, count 0 2006.229.05:12:30.95#ibcon#*after write, iclass 7, count 0 2006.229.05:12:30.95#ibcon#*before return 0, iclass 7, count 0 2006.229.05:12:30.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:12:30.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:12:30.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:12:30.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:12:30.95$vck44/vb=1,4 2006.229.05:12:30.95#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.05:12:30.95#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.05:12:30.95#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:30.95#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:12:30.95#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:12:30.95#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:12:30.95#ibcon#enter wrdev, iclass 11, count 2 2006.229.05:12:30.95#ibcon#first serial, iclass 11, count 2 2006.229.05:12:30.95#ibcon#enter sib2, iclass 11, count 2 2006.229.05:12:30.95#ibcon#flushed, iclass 11, count 2 2006.229.05:12:30.95#ibcon#about to write, iclass 11, count 2 2006.229.05:12:30.95#ibcon#wrote, iclass 11, count 2 2006.229.05:12:30.95#ibcon#about to read 3, iclass 11, count 2 2006.229.05:12:30.97#ibcon#read 3, iclass 11, count 2 2006.229.05:12:30.97#ibcon#about to read 4, iclass 11, count 2 2006.229.05:12:30.97#ibcon#read 4, iclass 11, count 2 2006.229.05:12:30.97#ibcon#about to read 5, iclass 11, count 2 2006.229.05:12:30.97#ibcon#read 5, iclass 11, count 2 2006.229.05:12:30.97#ibcon#about to read 6, iclass 11, count 2 2006.229.05:12:30.97#ibcon#read 6, iclass 11, count 2 2006.229.05:12:30.97#ibcon#end of sib2, iclass 11, count 2 2006.229.05:12:30.97#ibcon#*mode == 0, iclass 11, count 2 2006.229.05:12:30.97#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.05:12:30.97#ibcon#[27=AT01-04\r\n] 2006.229.05:12:30.97#ibcon#*before write, iclass 11, count 2 2006.229.05:12:30.97#ibcon#enter sib2, iclass 11, count 2 2006.229.05:12:30.97#ibcon#flushed, iclass 11, count 2 2006.229.05:12:30.97#ibcon#about to write, iclass 11, count 2 2006.229.05:12:30.97#ibcon#wrote, iclass 11, count 2 2006.229.05:12:30.97#ibcon#about to read 3, iclass 11, count 2 2006.229.05:12:31.00#ibcon#read 3, iclass 11, count 2 2006.229.05:12:31.00#ibcon#about to read 4, iclass 11, count 2 2006.229.05:12:31.00#ibcon#read 4, iclass 11, count 2 2006.229.05:12:31.00#ibcon#about to read 5, iclass 11, count 2 2006.229.05:12:31.00#ibcon#read 5, iclass 11, count 2 2006.229.05:12:31.00#ibcon#about to read 6, iclass 11, count 2 2006.229.05:12:31.00#ibcon#read 6, iclass 11, count 2 2006.229.05:12:31.00#ibcon#end of sib2, iclass 11, count 2 2006.229.05:12:31.00#ibcon#*after write, iclass 11, count 2 2006.229.05:12:31.00#ibcon#*before return 0, iclass 11, count 2 2006.229.05:12:31.00#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:12:31.00#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:12:31.00#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.05:12:31.00#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:31.00#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:12:31.12#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:12:31.12#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:12:31.12#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:12:31.12#ibcon#first serial, iclass 11, count 0 2006.229.05:12:31.12#ibcon#enter sib2, iclass 11, count 0 2006.229.05:12:31.12#ibcon#flushed, iclass 11, count 0 2006.229.05:12:31.12#ibcon#about to write, iclass 11, count 0 2006.229.05:12:31.12#ibcon#wrote, iclass 11, count 0 2006.229.05:12:31.12#ibcon#about to read 3, iclass 11, count 0 2006.229.05:12:31.14#ibcon#read 3, iclass 11, count 0 2006.229.05:12:31.14#ibcon#about to read 4, iclass 11, count 0 2006.229.05:12:31.14#ibcon#read 4, iclass 11, count 0 2006.229.05:12:31.14#ibcon#about to read 5, iclass 11, count 0 2006.229.05:12:31.14#ibcon#read 5, iclass 11, count 0 2006.229.05:12:31.14#ibcon#about to read 6, iclass 11, count 0 2006.229.05:12:31.14#ibcon#read 6, iclass 11, count 0 2006.229.05:12:31.14#ibcon#end of sib2, iclass 11, count 0 2006.229.05:12:31.14#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:12:31.14#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:12:31.14#ibcon#[27=USB\r\n] 2006.229.05:12:31.14#ibcon#*before write, iclass 11, count 0 2006.229.05:12:31.14#ibcon#enter sib2, iclass 11, count 0 2006.229.05:12:31.14#ibcon#flushed, iclass 11, count 0 2006.229.05:12:31.14#ibcon#about to write, iclass 11, count 0 2006.229.05:12:31.14#ibcon#wrote, iclass 11, count 0 2006.229.05:12:31.14#ibcon#about to read 3, iclass 11, count 0 2006.229.05:12:31.17#ibcon#read 3, iclass 11, count 0 2006.229.05:12:31.17#ibcon#about to read 4, iclass 11, count 0 2006.229.05:12:31.17#ibcon#read 4, iclass 11, count 0 2006.229.05:12:31.17#ibcon#about to read 5, iclass 11, count 0 2006.229.05:12:31.17#ibcon#read 5, iclass 11, count 0 2006.229.05:12:31.17#ibcon#about to read 6, iclass 11, count 0 2006.229.05:12:31.17#ibcon#read 6, iclass 11, count 0 2006.229.05:12:31.17#ibcon#end of sib2, iclass 11, count 0 2006.229.05:12:31.17#ibcon#*after write, iclass 11, count 0 2006.229.05:12:31.17#ibcon#*before return 0, iclass 11, count 0 2006.229.05:12:31.17#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:12:31.17#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:12:31.17#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:12:31.17#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:12:31.17$vck44/vblo=2,634.99 2006.229.05:12:31.17#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.05:12:31.17#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.05:12:31.17#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:31.17#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:31.17#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:31.17#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:31.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:12:31.17#ibcon#first serial, iclass 13, count 0 2006.229.05:12:31.17#ibcon#enter sib2, iclass 13, count 0 2006.229.05:12:31.17#ibcon#flushed, iclass 13, count 0 2006.229.05:12:31.17#ibcon#about to write, iclass 13, count 0 2006.229.05:12:31.17#ibcon#wrote, iclass 13, count 0 2006.229.05:12:31.17#ibcon#about to read 3, iclass 13, count 0 2006.229.05:12:31.19#ibcon#read 3, iclass 13, count 0 2006.229.05:12:31.19#ibcon#about to read 4, iclass 13, count 0 2006.229.05:12:31.19#ibcon#read 4, iclass 13, count 0 2006.229.05:12:31.19#ibcon#about to read 5, iclass 13, count 0 2006.229.05:12:31.19#ibcon#read 5, iclass 13, count 0 2006.229.05:12:31.19#ibcon#about to read 6, iclass 13, count 0 2006.229.05:12:31.19#ibcon#read 6, iclass 13, count 0 2006.229.05:12:31.19#ibcon#end of sib2, iclass 13, count 0 2006.229.05:12:31.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:12:31.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:12:31.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:12:31.19#ibcon#*before write, iclass 13, count 0 2006.229.05:12:31.19#ibcon#enter sib2, iclass 13, count 0 2006.229.05:12:31.19#ibcon#flushed, iclass 13, count 0 2006.229.05:12:31.19#ibcon#about to write, iclass 13, count 0 2006.229.05:12:31.19#ibcon#wrote, iclass 13, count 0 2006.229.05:12:31.19#ibcon#about to read 3, iclass 13, count 0 2006.229.05:12:31.23#ibcon#read 3, iclass 13, count 0 2006.229.05:12:31.23#ibcon#about to read 4, iclass 13, count 0 2006.229.05:12:31.23#ibcon#read 4, iclass 13, count 0 2006.229.05:12:31.23#ibcon#about to read 5, iclass 13, count 0 2006.229.05:12:31.23#ibcon#read 5, iclass 13, count 0 2006.229.05:12:31.23#ibcon#about to read 6, iclass 13, count 0 2006.229.05:12:31.23#ibcon#read 6, iclass 13, count 0 2006.229.05:12:31.23#ibcon#end of sib2, iclass 13, count 0 2006.229.05:12:31.23#ibcon#*after write, iclass 13, count 0 2006.229.05:12:31.23#ibcon#*before return 0, iclass 13, count 0 2006.229.05:12:31.23#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:31.23#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:12:31.23#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:12:31.23#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:12:31.23$vck44/vb=2,4 2006.229.05:12:31.23#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.05:12:31.23#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.05:12:31.23#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:31.23#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:31.29#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:31.29#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:31.29#ibcon#enter wrdev, iclass 15, count 2 2006.229.05:12:31.29#ibcon#first serial, iclass 15, count 2 2006.229.05:12:31.29#ibcon#enter sib2, iclass 15, count 2 2006.229.05:12:31.29#ibcon#flushed, iclass 15, count 2 2006.229.05:12:31.29#ibcon#about to write, iclass 15, count 2 2006.229.05:12:31.29#ibcon#wrote, iclass 15, count 2 2006.229.05:12:31.29#ibcon#about to read 3, iclass 15, count 2 2006.229.05:12:31.31#ibcon#read 3, iclass 15, count 2 2006.229.05:12:31.31#ibcon#about to read 4, iclass 15, count 2 2006.229.05:12:31.31#ibcon#read 4, iclass 15, count 2 2006.229.05:12:31.31#ibcon#about to read 5, iclass 15, count 2 2006.229.05:12:31.31#ibcon#read 5, iclass 15, count 2 2006.229.05:12:31.31#ibcon#about to read 6, iclass 15, count 2 2006.229.05:12:31.31#ibcon#read 6, iclass 15, count 2 2006.229.05:12:31.31#ibcon#end of sib2, iclass 15, count 2 2006.229.05:12:31.31#ibcon#*mode == 0, iclass 15, count 2 2006.229.05:12:31.31#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.05:12:31.31#ibcon#[27=AT02-04\r\n] 2006.229.05:12:31.31#ibcon#*before write, iclass 15, count 2 2006.229.05:12:31.31#ibcon#enter sib2, iclass 15, count 2 2006.229.05:12:31.31#ibcon#flushed, iclass 15, count 2 2006.229.05:12:31.31#ibcon#about to write, iclass 15, count 2 2006.229.05:12:31.31#ibcon#wrote, iclass 15, count 2 2006.229.05:12:31.31#ibcon#about to read 3, iclass 15, count 2 2006.229.05:12:31.34#ibcon#read 3, iclass 15, count 2 2006.229.05:12:31.34#ibcon#about to read 4, iclass 15, count 2 2006.229.05:12:31.34#ibcon#read 4, iclass 15, count 2 2006.229.05:12:31.34#ibcon#about to read 5, iclass 15, count 2 2006.229.05:12:31.34#ibcon#read 5, iclass 15, count 2 2006.229.05:12:31.34#ibcon#about to read 6, iclass 15, count 2 2006.229.05:12:31.34#ibcon#read 6, iclass 15, count 2 2006.229.05:12:31.34#ibcon#end of sib2, iclass 15, count 2 2006.229.05:12:31.34#ibcon#*after write, iclass 15, count 2 2006.229.05:12:31.34#ibcon#*before return 0, iclass 15, count 2 2006.229.05:12:31.34#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:31.34#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:12:31.34#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.05:12:31.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:31.34#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:31.46#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:31.46#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:31.46#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:12:31.46#ibcon#first serial, iclass 15, count 0 2006.229.05:12:31.46#ibcon#enter sib2, iclass 15, count 0 2006.229.05:12:31.46#ibcon#flushed, iclass 15, count 0 2006.229.05:12:31.46#ibcon#about to write, iclass 15, count 0 2006.229.05:12:31.46#ibcon#wrote, iclass 15, count 0 2006.229.05:12:31.46#ibcon#about to read 3, iclass 15, count 0 2006.229.05:12:31.48#ibcon#read 3, iclass 15, count 0 2006.229.05:12:31.48#ibcon#about to read 4, iclass 15, count 0 2006.229.05:12:31.48#ibcon#read 4, iclass 15, count 0 2006.229.05:12:31.48#ibcon#about to read 5, iclass 15, count 0 2006.229.05:12:31.48#ibcon#read 5, iclass 15, count 0 2006.229.05:12:31.48#ibcon#about to read 6, iclass 15, count 0 2006.229.05:12:31.48#ibcon#read 6, iclass 15, count 0 2006.229.05:12:31.48#ibcon#end of sib2, iclass 15, count 0 2006.229.05:12:31.48#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:12:31.48#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:12:31.48#ibcon#[27=USB\r\n] 2006.229.05:12:31.48#ibcon#*before write, iclass 15, count 0 2006.229.05:12:31.48#ibcon#enter sib2, iclass 15, count 0 2006.229.05:12:31.48#ibcon#flushed, iclass 15, count 0 2006.229.05:12:31.48#ibcon#about to write, iclass 15, count 0 2006.229.05:12:31.48#ibcon#wrote, iclass 15, count 0 2006.229.05:12:31.48#ibcon#about to read 3, iclass 15, count 0 2006.229.05:12:31.51#ibcon#read 3, iclass 15, count 0 2006.229.05:12:31.51#ibcon#about to read 4, iclass 15, count 0 2006.229.05:12:31.51#ibcon#read 4, iclass 15, count 0 2006.229.05:12:31.51#ibcon#about to read 5, iclass 15, count 0 2006.229.05:12:31.51#ibcon#read 5, iclass 15, count 0 2006.229.05:12:31.51#ibcon#about to read 6, iclass 15, count 0 2006.229.05:12:31.51#ibcon#read 6, iclass 15, count 0 2006.229.05:12:31.51#ibcon#end of sib2, iclass 15, count 0 2006.229.05:12:31.51#ibcon#*after write, iclass 15, count 0 2006.229.05:12:31.51#ibcon#*before return 0, iclass 15, count 0 2006.229.05:12:31.51#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:31.51#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:12:31.51#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:12:31.51#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:12:31.51$vck44/vblo=3,649.99 2006.229.05:12:31.51#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:12:31.51#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:12:31.51#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:31.51#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:31.51#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:31.51#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:31.51#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:12:31.51#ibcon#first serial, iclass 17, count 0 2006.229.05:12:31.51#ibcon#enter sib2, iclass 17, count 0 2006.229.05:12:31.51#ibcon#flushed, iclass 17, count 0 2006.229.05:12:31.51#ibcon#about to write, iclass 17, count 0 2006.229.05:12:31.51#ibcon#wrote, iclass 17, count 0 2006.229.05:12:31.51#ibcon#about to read 3, iclass 17, count 0 2006.229.05:12:31.53#ibcon#read 3, iclass 17, count 0 2006.229.05:12:31.53#ibcon#about to read 4, iclass 17, count 0 2006.229.05:12:31.53#ibcon#read 4, iclass 17, count 0 2006.229.05:12:31.53#ibcon#about to read 5, iclass 17, count 0 2006.229.05:12:31.53#ibcon#read 5, iclass 17, count 0 2006.229.05:12:31.53#ibcon#about to read 6, iclass 17, count 0 2006.229.05:12:31.53#ibcon#read 6, iclass 17, count 0 2006.229.05:12:31.53#ibcon#end of sib2, iclass 17, count 0 2006.229.05:12:31.53#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:12:31.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:12:31.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:12:31.53#ibcon#*before write, iclass 17, count 0 2006.229.05:12:31.53#ibcon#enter sib2, iclass 17, count 0 2006.229.05:12:31.53#ibcon#flushed, iclass 17, count 0 2006.229.05:12:31.53#ibcon#about to write, iclass 17, count 0 2006.229.05:12:31.53#ibcon#wrote, iclass 17, count 0 2006.229.05:12:31.53#ibcon#about to read 3, iclass 17, count 0 2006.229.05:12:31.57#ibcon#read 3, iclass 17, count 0 2006.229.05:12:31.57#ibcon#about to read 4, iclass 17, count 0 2006.229.05:12:31.57#ibcon#read 4, iclass 17, count 0 2006.229.05:12:31.57#ibcon#about to read 5, iclass 17, count 0 2006.229.05:12:31.57#ibcon#read 5, iclass 17, count 0 2006.229.05:12:31.57#ibcon#about to read 6, iclass 17, count 0 2006.229.05:12:31.57#ibcon#read 6, iclass 17, count 0 2006.229.05:12:31.57#ibcon#end of sib2, iclass 17, count 0 2006.229.05:12:32.37#ibcon#*after write, iclass 17, count 0 2006.229.05:12:32.37#ibcon#*before return 0, iclass 17, count 0 2006.229.05:12:32.37#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:32.37#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:12:32.37#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:12:32.37#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:12:32.37$vck44/vb=3,4 2006.229.05:12:32.37#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.05:12:32.37#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.05:12:32.37#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:32.37#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:32.37#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:32.37#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:32.37#ibcon#enter wrdev, iclass 19, count 2 2006.229.05:12:32.37#ibcon#first serial, iclass 19, count 2 2006.229.05:12:32.37#ibcon#enter sib2, iclass 19, count 2 2006.229.05:12:32.37#ibcon#flushed, iclass 19, count 2 2006.229.05:12:32.37#ibcon#about to write, iclass 19, count 2 2006.229.05:12:32.37#ibcon#wrote, iclass 19, count 2 2006.229.05:12:32.37#ibcon#about to read 3, iclass 19, count 2 2006.229.05:12:32.39#ibcon#read 3, iclass 19, count 2 2006.229.05:12:32.39#ibcon#about to read 4, iclass 19, count 2 2006.229.05:12:32.39#ibcon#read 4, iclass 19, count 2 2006.229.05:12:32.39#ibcon#about to read 5, iclass 19, count 2 2006.229.05:12:32.39#ibcon#read 5, iclass 19, count 2 2006.229.05:12:32.39#ibcon#about to read 6, iclass 19, count 2 2006.229.05:12:32.39#ibcon#read 6, iclass 19, count 2 2006.229.05:12:32.39#ibcon#end of sib2, iclass 19, count 2 2006.229.05:12:32.39#ibcon#*mode == 0, iclass 19, count 2 2006.229.05:12:32.39#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.05:12:32.39#ibcon#[27=AT03-04\r\n] 2006.229.05:12:32.39#ibcon#*before write, iclass 19, count 2 2006.229.05:12:32.39#ibcon#enter sib2, iclass 19, count 2 2006.229.05:12:32.39#ibcon#flushed, iclass 19, count 2 2006.229.05:12:32.39#ibcon#about to write, iclass 19, count 2 2006.229.05:12:32.39#ibcon#wrote, iclass 19, count 2 2006.229.05:12:32.39#ibcon#about to read 3, iclass 19, count 2 2006.229.05:12:32.42#ibcon#read 3, iclass 19, count 2 2006.229.05:12:32.42#ibcon#about to read 4, iclass 19, count 2 2006.229.05:12:32.42#ibcon#read 4, iclass 19, count 2 2006.229.05:12:32.42#ibcon#about to read 5, iclass 19, count 2 2006.229.05:12:32.42#ibcon#read 5, iclass 19, count 2 2006.229.05:12:32.42#ibcon#about to read 6, iclass 19, count 2 2006.229.05:12:32.42#ibcon#read 6, iclass 19, count 2 2006.229.05:12:32.42#ibcon#end of sib2, iclass 19, count 2 2006.229.05:12:32.42#ibcon#*after write, iclass 19, count 2 2006.229.05:12:32.42#ibcon#*before return 0, iclass 19, count 2 2006.229.05:12:32.42#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:32.42#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:12:32.42#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.05:12:32.42#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:32.42#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:32.54#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:32.54#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:32.54#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:12:32.54#ibcon#first serial, iclass 19, count 0 2006.229.05:12:32.54#ibcon#enter sib2, iclass 19, count 0 2006.229.05:12:32.54#ibcon#flushed, iclass 19, count 0 2006.229.05:12:32.54#ibcon#about to write, iclass 19, count 0 2006.229.05:12:32.54#ibcon#wrote, iclass 19, count 0 2006.229.05:12:32.54#ibcon#about to read 3, iclass 19, count 0 2006.229.05:12:32.56#ibcon#read 3, iclass 19, count 0 2006.229.05:12:32.56#ibcon#about to read 4, iclass 19, count 0 2006.229.05:12:32.56#ibcon#read 4, iclass 19, count 0 2006.229.05:12:32.56#ibcon#about to read 5, iclass 19, count 0 2006.229.05:12:32.56#ibcon#read 5, iclass 19, count 0 2006.229.05:12:32.56#ibcon#about to read 6, iclass 19, count 0 2006.229.05:12:32.56#ibcon#read 6, iclass 19, count 0 2006.229.05:12:32.56#ibcon#end of sib2, iclass 19, count 0 2006.229.05:12:32.56#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:12:32.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:12:32.56#ibcon#[27=USB\r\n] 2006.229.05:12:32.56#ibcon#*before write, iclass 19, count 0 2006.229.05:12:32.56#ibcon#enter sib2, iclass 19, count 0 2006.229.05:12:32.56#ibcon#flushed, iclass 19, count 0 2006.229.05:12:32.56#ibcon#about to write, iclass 19, count 0 2006.229.05:12:32.56#ibcon#wrote, iclass 19, count 0 2006.229.05:12:32.56#ibcon#about to read 3, iclass 19, count 0 2006.229.05:12:32.59#ibcon#read 3, iclass 19, count 0 2006.229.05:12:32.59#ibcon#about to read 4, iclass 19, count 0 2006.229.05:12:32.59#ibcon#read 4, iclass 19, count 0 2006.229.05:12:32.59#ibcon#about to read 5, iclass 19, count 0 2006.229.05:12:32.59#ibcon#read 5, iclass 19, count 0 2006.229.05:12:32.59#ibcon#about to read 6, iclass 19, count 0 2006.229.05:12:32.59#ibcon#read 6, iclass 19, count 0 2006.229.05:12:32.59#ibcon#end of sib2, iclass 19, count 0 2006.229.05:12:32.59#ibcon#*after write, iclass 19, count 0 2006.229.05:12:32.59#ibcon#*before return 0, iclass 19, count 0 2006.229.05:12:32.59#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:32.59#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:12:32.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:12:32.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:12:32.59$vck44/vblo=4,679.99 2006.229.05:12:32.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.05:12:32.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.05:12:32.59#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:32.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:32.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:32.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:32.59#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:12:32.59#ibcon#first serial, iclass 21, count 0 2006.229.05:12:32.59#ibcon#enter sib2, iclass 21, count 0 2006.229.05:12:32.59#ibcon#flushed, iclass 21, count 0 2006.229.05:12:32.59#ibcon#about to write, iclass 21, count 0 2006.229.05:12:32.59#ibcon#wrote, iclass 21, count 0 2006.229.05:12:32.59#ibcon#about to read 3, iclass 21, count 0 2006.229.05:12:32.61#ibcon#read 3, iclass 21, count 0 2006.229.05:12:32.61#ibcon#about to read 4, iclass 21, count 0 2006.229.05:12:32.61#ibcon#read 4, iclass 21, count 0 2006.229.05:12:32.61#ibcon#about to read 5, iclass 21, count 0 2006.229.05:12:32.61#ibcon#read 5, iclass 21, count 0 2006.229.05:12:32.61#ibcon#about to read 6, iclass 21, count 0 2006.229.05:12:32.61#ibcon#read 6, iclass 21, count 0 2006.229.05:12:32.61#ibcon#end of sib2, iclass 21, count 0 2006.229.05:12:32.61#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:12:32.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:12:32.61#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:12:32.61#ibcon#*before write, iclass 21, count 0 2006.229.05:12:32.61#ibcon#enter sib2, iclass 21, count 0 2006.229.05:12:32.61#ibcon#flushed, iclass 21, count 0 2006.229.05:12:32.61#ibcon#about to write, iclass 21, count 0 2006.229.05:12:32.61#ibcon#wrote, iclass 21, count 0 2006.229.05:12:32.61#ibcon#about to read 3, iclass 21, count 0 2006.229.05:12:32.65#ibcon#read 3, iclass 21, count 0 2006.229.05:12:32.65#ibcon#about to read 4, iclass 21, count 0 2006.229.05:12:32.65#ibcon#read 4, iclass 21, count 0 2006.229.05:12:32.65#ibcon#about to read 5, iclass 21, count 0 2006.229.05:12:32.65#ibcon#read 5, iclass 21, count 0 2006.229.05:12:32.65#ibcon#about to read 6, iclass 21, count 0 2006.229.05:12:32.65#ibcon#read 6, iclass 21, count 0 2006.229.05:12:32.65#ibcon#end of sib2, iclass 21, count 0 2006.229.05:12:32.65#ibcon#*after write, iclass 21, count 0 2006.229.05:12:32.65#ibcon#*before return 0, iclass 21, count 0 2006.229.05:12:32.65#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:32.65#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:12:32.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:12:32.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:12:32.65$vck44/vb=4,4 2006.229.05:12:32.65#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.05:12:32.65#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.05:12:32.65#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:32.65#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:32.71#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:32.71#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:32.71#ibcon#enter wrdev, iclass 23, count 2 2006.229.05:12:32.71#ibcon#first serial, iclass 23, count 2 2006.229.05:12:32.71#ibcon#enter sib2, iclass 23, count 2 2006.229.05:12:32.71#ibcon#flushed, iclass 23, count 2 2006.229.05:12:32.71#ibcon#about to write, iclass 23, count 2 2006.229.05:12:32.71#ibcon#wrote, iclass 23, count 2 2006.229.05:12:32.71#ibcon#about to read 3, iclass 23, count 2 2006.229.05:12:32.73#ibcon#read 3, iclass 23, count 2 2006.229.05:12:32.73#ibcon#about to read 4, iclass 23, count 2 2006.229.05:12:32.73#ibcon#read 4, iclass 23, count 2 2006.229.05:12:32.73#ibcon#about to read 5, iclass 23, count 2 2006.229.05:12:32.73#ibcon#read 5, iclass 23, count 2 2006.229.05:12:32.73#ibcon#about to read 6, iclass 23, count 2 2006.229.05:12:32.73#ibcon#read 6, iclass 23, count 2 2006.229.05:12:32.73#ibcon#end of sib2, iclass 23, count 2 2006.229.05:12:32.73#ibcon#*mode == 0, iclass 23, count 2 2006.229.05:12:32.73#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.05:12:32.73#ibcon#[27=AT04-04\r\n] 2006.229.05:12:32.73#ibcon#*before write, iclass 23, count 2 2006.229.05:12:32.73#ibcon#enter sib2, iclass 23, count 2 2006.229.05:12:32.73#ibcon#flushed, iclass 23, count 2 2006.229.05:12:32.73#ibcon#about to write, iclass 23, count 2 2006.229.05:12:32.73#ibcon#wrote, iclass 23, count 2 2006.229.05:12:32.73#ibcon#about to read 3, iclass 23, count 2 2006.229.05:12:32.76#ibcon#read 3, iclass 23, count 2 2006.229.05:12:32.76#ibcon#about to read 4, iclass 23, count 2 2006.229.05:12:32.76#ibcon#read 4, iclass 23, count 2 2006.229.05:12:32.76#ibcon#about to read 5, iclass 23, count 2 2006.229.05:12:32.76#ibcon#read 5, iclass 23, count 2 2006.229.05:12:32.76#ibcon#about to read 6, iclass 23, count 2 2006.229.05:12:32.76#ibcon#read 6, iclass 23, count 2 2006.229.05:12:32.76#ibcon#end of sib2, iclass 23, count 2 2006.229.05:12:32.76#ibcon#*after write, iclass 23, count 2 2006.229.05:12:32.76#ibcon#*before return 0, iclass 23, count 2 2006.229.05:12:32.76#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:32.76#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:12:32.76#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.05:12:32.76#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:32.76#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:32.88#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:32.88#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:32.88#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:12:32.88#ibcon#first serial, iclass 23, count 0 2006.229.05:12:32.88#ibcon#enter sib2, iclass 23, count 0 2006.229.05:12:32.88#ibcon#flushed, iclass 23, count 0 2006.229.05:12:32.88#ibcon#about to write, iclass 23, count 0 2006.229.05:12:32.88#ibcon#wrote, iclass 23, count 0 2006.229.05:12:32.88#ibcon#about to read 3, iclass 23, count 0 2006.229.05:12:32.90#ibcon#read 3, iclass 23, count 0 2006.229.05:12:32.90#ibcon#about to read 4, iclass 23, count 0 2006.229.05:12:32.90#ibcon#read 4, iclass 23, count 0 2006.229.05:12:32.90#ibcon#about to read 5, iclass 23, count 0 2006.229.05:12:32.90#ibcon#read 5, iclass 23, count 0 2006.229.05:12:32.90#ibcon#about to read 6, iclass 23, count 0 2006.229.05:12:32.90#ibcon#read 6, iclass 23, count 0 2006.229.05:12:32.90#ibcon#end of sib2, iclass 23, count 0 2006.229.05:12:32.90#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:12:32.90#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:12:32.90#ibcon#[27=USB\r\n] 2006.229.05:12:32.90#ibcon#*before write, iclass 23, count 0 2006.229.05:12:32.90#ibcon#enter sib2, iclass 23, count 0 2006.229.05:12:32.90#ibcon#flushed, iclass 23, count 0 2006.229.05:12:32.90#ibcon#about to write, iclass 23, count 0 2006.229.05:12:32.90#ibcon#wrote, iclass 23, count 0 2006.229.05:12:32.90#ibcon#about to read 3, iclass 23, count 0 2006.229.05:12:32.93#ibcon#read 3, iclass 23, count 0 2006.229.05:12:32.93#ibcon#about to read 4, iclass 23, count 0 2006.229.05:12:32.93#ibcon#read 4, iclass 23, count 0 2006.229.05:12:32.93#ibcon#about to read 5, iclass 23, count 0 2006.229.05:12:32.93#ibcon#read 5, iclass 23, count 0 2006.229.05:12:32.93#ibcon#about to read 6, iclass 23, count 0 2006.229.05:12:32.93#ibcon#read 6, iclass 23, count 0 2006.229.05:12:32.93#ibcon#end of sib2, iclass 23, count 0 2006.229.05:12:32.93#ibcon#*after write, iclass 23, count 0 2006.229.05:12:32.93#ibcon#*before return 0, iclass 23, count 0 2006.229.05:12:32.93#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:32.93#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:12:32.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:12:32.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:12:32.93$vck44/vblo=5,709.99 2006.229.05:12:32.93#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.05:12:32.93#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.05:12:32.93#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:32.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:32.93#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:32.93#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:32.93#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:12:32.93#ibcon#first serial, iclass 25, count 0 2006.229.05:12:32.93#ibcon#enter sib2, iclass 25, count 0 2006.229.05:12:32.93#ibcon#flushed, iclass 25, count 0 2006.229.05:12:32.93#ibcon#about to write, iclass 25, count 0 2006.229.05:12:32.93#ibcon#wrote, iclass 25, count 0 2006.229.05:12:32.93#ibcon#about to read 3, iclass 25, count 0 2006.229.05:12:32.95#ibcon#read 3, iclass 25, count 0 2006.229.05:12:32.95#ibcon#about to read 4, iclass 25, count 0 2006.229.05:12:32.95#ibcon#read 4, iclass 25, count 0 2006.229.05:12:32.95#ibcon#about to read 5, iclass 25, count 0 2006.229.05:12:32.95#ibcon#read 5, iclass 25, count 0 2006.229.05:12:32.95#ibcon#about to read 6, iclass 25, count 0 2006.229.05:12:32.95#ibcon#read 6, iclass 25, count 0 2006.229.05:12:32.95#ibcon#end of sib2, iclass 25, count 0 2006.229.05:12:32.95#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:12:32.95#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:12:32.95#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:12:32.95#ibcon#*before write, iclass 25, count 0 2006.229.05:12:32.95#ibcon#enter sib2, iclass 25, count 0 2006.229.05:12:32.95#ibcon#flushed, iclass 25, count 0 2006.229.05:12:32.95#ibcon#about to write, iclass 25, count 0 2006.229.05:12:32.95#ibcon#wrote, iclass 25, count 0 2006.229.05:12:32.95#ibcon#about to read 3, iclass 25, count 0 2006.229.05:12:32.99#ibcon#read 3, iclass 25, count 0 2006.229.05:12:32.99#ibcon#about to read 4, iclass 25, count 0 2006.229.05:12:32.99#ibcon#read 4, iclass 25, count 0 2006.229.05:12:32.99#ibcon#about to read 5, iclass 25, count 0 2006.229.05:12:32.99#ibcon#read 5, iclass 25, count 0 2006.229.05:12:32.99#ibcon#about to read 6, iclass 25, count 0 2006.229.05:12:32.99#ibcon#read 6, iclass 25, count 0 2006.229.05:12:32.99#ibcon#end of sib2, iclass 25, count 0 2006.229.05:12:32.99#ibcon#*after write, iclass 25, count 0 2006.229.05:12:32.99#ibcon#*before return 0, iclass 25, count 0 2006.229.05:12:32.99#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:32.99#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:12:32.99#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:12:32.99#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:12:32.99$vck44/vb=5,4 2006.229.05:12:32.99#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.05:12:32.99#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.05:12:32.99#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:32.99#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:33.05#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:33.05#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:33.05#ibcon#enter wrdev, iclass 27, count 2 2006.229.05:12:33.05#ibcon#first serial, iclass 27, count 2 2006.229.05:12:33.05#ibcon#enter sib2, iclass 27, count 2 2006.229.05:12:33.05#ibcon#flushed, iclass 27, count 2 2006.229.05:12:33.05#ibcon#about to write, iclass 27, count 2 2006.229.05:12:33.05#ibcon#wrote, iclass 27, count 2 2006.229.05:12:33.05#ibcon#about to read 3, iclass 27, count 2 2006.229.05:12:33.07#ibcon#read 3, iclass 27, count 2 2006.229.05:12:33.07#ibcon#about to read 4, iclass 27, count 2 2006.229.05:12:33.07#ibcon#read 4, iclass 27, count 2 2006.229.05:12:33.07#ibcon#about to read 5, iclass 27, count 2 2006.229.05:12:33.07#ibcon#read 5, iclass 27, count 2 2006.229.05:12:33.07#ibcon#about to read 6, iclass 27, count 2 2006.229.05:12:33.07#ibcon#read 6, iclass 27, count 2 2006.229.05:12:33.07#ibcon#end of sib2, iclass 27, count 2 2006.229.05:12:33.07#ibcon#*mode == 0, iclass 27, count 2 2006.229.05:12:33.07#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.05:12:33.07#ibcon#[27=AT05-04\r\n] 2006.229.05:12:33.07#ibcon#*before write, iclass 27, count 2 2006.229.05:12:33.07#ibcon#enter sib2, iclass 27, count 2 2006.229.05:12:33.07#ibcon#flushed, iclass 27, count 2 2006.229.05:12:33.07#ibcon#about to write, iclass 27, count 2 2006.229.05:12:33.07#ibcon#wrote, iclass 27, count 2 2006.229.05:12:33.07#ibcon#about to read 3, iclass 27, count 2 2006.229.05:12:33.10#ibcon#read 3, iclass 27, count 2 2006.229.05:12:33.10#ibcon#about to read 4, iclass 27, count 2 2006.229.05:12:33.10#ibcon#read 4, iclass 27, count 2 2006.229.05:12:33.10#ibcon#about to read 5, iclass 27, count 2 2006.229.05:12:33.10#ibcon#read 5, iclass 27, count 2 2006.229.05:12:33.10#ibcon#about to read 6, iclass 27, count 2 2006.229.05:12:33.10#ibcon#read 6, iclass 27, count 2 2006.229.05:12:33.10#ibcon#end of sib2, iclass 27, count 2 2006.229.05:12:33.10#ibcon#*after write, iclass 27, count 2 2006.229.05:12:33.10#ibcon#*before return 0, iclass 27, count 2 2006.229.05:12:33.10#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:33.10#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:12:33.10#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.05:12:33.10#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:33.10#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:33.22#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:33.22#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:33.22#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:12:33.22#ibcon#first serial, iclass 27, count 0 2006.229.05:12:33.22#ibcon#enter sib2, iclass 27, count 0 2006.229.05:12:33.22#ibcon#flushed, iclass 27, count 0 2006.229.05:12:33.22#ibcon#about to write, iclass 27, count 0 2006.229.05:12:33.22#ibcon#wrote, iclass 27, count 0 2006.229.05:12:33.22#ibcon#about to read 3, iclass 27, count 0 2006.229.05:12:33.24#ibcon#read 3, iclass 27, count 0 2006.229.05:12:33.24#ibcon#about to read 4, iclass 27, count 0 2006.229.05:12:33.24#ibcon#read 4, iclass 27, count 0 2006.229.05:12:33.24#ibcon#about to read 5, iclass 27, count 0 2006.229.05:12:33.24#ibcon#read 5, iclass 27, count 0 2006.229.05:12:33.24#ibcon#about to read 6, iclass 27, count 0 2006.229.05:12:33.24#ibcon#read 6, iclass 27, count 0 2006.229.05:12:33.24#ibcon#end of sib2, iclass 27, count 0 2006.229.05:12:33.24#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:12:33.24#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:12:33.24#ibcon#[27=USB\r\n] 2006.229.05:12:33.24#ibcon#*before write, iclass 27, count 0 2006.229.05:12:33.24#ibcon#enter sib2, iclass 27, count 0 2006.229.05:12:33.24#ibcon#flushed, iclass 27, count 0 2006.229.05:12:33.24#ibcon#about to write, iclass 27, count 0 2006.229.05:12:33.24#ibcon#wrote, iclass 27, count 0 2006.229.05:12:33.24#ibcon#about to read 3, iclass 27, count 0 2006.229.05:12:33.27#ibcon#read 3, iclass 27, count 0 2006.229.05:12:33.27#ibcon#about to read 4, iclass 27, count 0 2006.229.05:12:33.27#ibcon#read 4, iclass 27, count 0 2006.229.05:12:33.27#ibcon#about to read 5, iclass 27, count 0 2006.229.05:12:33.27#ibcon#read 5, iclass 27, count 0 2006.229.05:12:33.27#ibcon#about to read 6, iclass 27, count 0 2006.229.05:12:33.27#ibcon#read 6, iclass 27, count 0 2006.229.05:12:33.27#ibcon#end of sib2, iclass 27, count 0 2006.229.05:12:33.27#ibcon#*after write, iclass 27, count 0 2006.229.05:12:33.27#ibcon#*before return 0, iclass 27, count 0 2006.229.05:12:33.27#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:33.27#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:12:33.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:12:33.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:12:33.27$vck44/vblo=6,719.99 2006.229.05:12:33.27#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:12:33.27#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:12:33.27#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:33.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:33.27#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:33.27#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:33.27#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:12:33.27#ibcon#first serial, iclass 29, count 0 2006.229.05:12:33.27#ibcon#enter sib2, iclass 29, count 0 2006.229.05:12:33.27#ibcon#flushed, iclass 29, count 0 2006.229.05:12:33.27#ibcon#about to write, iclass 29, count 0 2006.229.05:12:33.27#ibcon#wrote, iclass 29, count 0 2006.229.05:12:33.27#ibcon#about to read 3, iclass 29, count 0 2006.229.05:12:33.29#ibcon#read 3, iclass 29, count 0 2006.229.05:12:33.29#ibcon#about to read 4, iclass 29, count 0 2006.229.05:12:33.29#ibcon#read 4, iclass 29, count 0 2006.229.05:12:33.29#ibcon#about to read 5, iclass 29, count 0 2006.229.05:12:33.29#ibcon#read 5, iclass 29, count 0 2006.229.05:12:33.29#ibcon#about to read 6, iclass 29, count 0 2006.229.05:12:33.29#ibcon#read 6, iclass 29, count 0 2006.229.05:12:33.29#ibcon#end of sib2, iclass 29, count 0 2006.229.05:12:33.29#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:12:33.29#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:12:33.29#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:12:33.29#ibcon#*before write, iclass 29, count 0 2006.229.05:12:33.29#ibcon#enter sib2, iclass 29, count 0 2006.229.05:12:33.29#ibcon#flushed, iclass 29, count 0 2006.229.05:12:33.29#ibcon#about to write, iclass 29, count 0 2006.229.05:12:33.29#ibcon#wrote, iclass 29, count 0 2006.229.05:12:33.29#ibcon#about to read 3, iclass 29, count 0 2006.229.05:12:33.33#ibcon#read 3, iclass 29, count 0 2006.229.05:12:33.33#ibcon#about to read 4, iclass 29, count 0 2006.229.05:12:33.33#ibcon#read 4, iclass 29, count 0 2006.229.05:12:33.33#ibcon#about to read 5, iclass 29, count 0 2006.229.05:12:33.33#ibcon#read 5, iclass 29, count 0 2006.229.05:12:33.33#ibcon#about to read 6, iclass 29, count 0 2006.229.05:12:33.33#ibcon#read 6, iclass 29, count 0 2006.229.05:12:33.33#ibcon#end of sib2, iclass 29, count 0 2006.229.05:12:33.33#ibcon#*after write, iclass 29, count 0 2006.229.05:12:33.33#ibcon#*before return 0, iclass 29, count 0 2006.229.05:12:33.33#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:33.33#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:12:33.33#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:12:33.33#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:12:33.33$vck44/vb=6,4 2006.229.05:12:33.33#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.05:12:33.33#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.05:12:33.33#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:33.33#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:33.39#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:33.39#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:33.39#ibcon#enter wrdev, iclass 31, count 2 2006.229.05:12:33.39#ibcon#first serial, iclass 31, count 2 2006.229.05:12:33.39#ibcon#enter sib2, iclass 31, count 2 2006.229.05:12:33.39#ibcon#flushed, iclass 31, count 2 2006.229.05:12:33.39#ibcon#about to write, iclass 31, count 2 2006.229.05:12:33.39#ibcon#wrote, iclass 31, count 2 2006.229.05:12:33.39#ibcon#about to read 3, iclass 31, count 2 2006.229.05:12:33.41#ibcon#read 3, iclass 31, count 2 2006.229.05:12:33.41#ibcon#about to read 4, iclass 31, count 2 2006.229.05:12:33.41#ibcon#read 4, iclass 31, count 2 2006.229.05:12:33.41#ibcon#about to read 5, iclass 31, count 2 2006.229.05:12:33.41#ibcon#read 5, iclass 31, count 2 2006.229.05:12:33.41#ibcon#about to read 6, iclass 31, count 2 2006.229.05:12:33.41#ibcon#read 6, iclass 31, count 2 2006.229.05:12:33.41#ibcon#end of sib2, iclass 31, count 2 2006.229.05:12:33.41#ibcon#*mode == 0, iclass 31, count 2 2006.229.05:12:33.41#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.05:12:33.41#ibcon#[27=AT06-04\r\n] 2006.229.05:12:33.41#ibcon#*before write, iclass 31, count 2 2006.229.05:12:33.41#ibcon#enter sib2, iclass 31, count 2 2006.229.05:12:33.41#ibcon#flushed, iclass 31, count 2 2006.229.05:12:33.41#ibcon#about to write, iclass 31, count 2 2006.229.05:12:33.41#ibcon#wrote, iclass 31, count 2 2006.229.05:12:33.41#ibcon#about to read 3, iclass 31, count 2 2006.229.05:12:33.44#ibcon#read 3, iclass 31, count 2 2006.229.05:12:33.44#ibcon#about to read 4, iclass 31, count 2 2006.229.05:12:33.44#ibcon#read 4, iclass 31, count 2 2006.229.05:12:33.44#ibcon#about to read 5, iclass 31, count 2 2006.229.05:12:33.44#ibcon#read 5, iclass 31, count 2 2006.229.05:12:33.44#ibcon#about to read 6, iclass 31, count 2 2006.229.05:12:33.44#ibcon#read 6, iclass 31, count 2 2006.229.05:12:33.44#ibcon#end of sib2, iclass 31, count 2 2006.229.05:12:33.44#ibcon#*after write, iclass 31, count 2 2006.229.05:12:33.44#ibcon#*before return 0, iclass 31, count 2 2006.229.05:12:33.44#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:33.44#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:12:33.44#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.05:12:33.44#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:33.44#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:33.56#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:33.56#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:33.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:12:33.56#ibcon#first serial, iclass 31, count 0 2006.229.05:12:33.56#ibcon#enter sib2, iclass 31, count 0 2006.229.05:12:33.56#ibcon#flushed, iclass 31, count 0 2006.229.05:12:33.56#ibcon#about to write, iclass 31, count 0 2006.229.05:12:33.56#ibcon#wrote, iclass 31, count 0 2006.229.05:12:33.56#ibcon#about to read 3, iclass 31, count 0 2006.229.05:12:33.58#ibcon#read 3, iclass 31, count 0 2006.229.05:12:33.58#ibcon#about to read 4, iclass 31, count 0 2006.229.05:12:33.58#ibcon#read 4, iclass 31, count 0 2006.229.05:12:33.58#ibcon#about to read 5, iclass 31, count 0 2006.229.05:12:33.58#ibcon#read 5, iclass 31, count 0 2006.229.05:12:33.58#ibcon#about to read 6, iclass 31, count 0 2006.229.05:12:33.58#ibcon#read 6, iclass 31, count 0 2006.229.05:12:33.58#ibcon#end of sib2, iclass 31, count 0 2006.229.05:12:33.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:12:33.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:12:33.58#ibcon#[27=USB\r\n] 2006.229.05:12:33.58#ibcon#*before write, iclass 31, count 0 2006.229.05:12:33.58#ibcon#enter sib2, iclass 31, count 0 2006.229.05:12:33.58#ibcon#flushed, iclass 31, count 0 2006.229.05:12:33.58#ibcon#about to write, iclass 31, count 0 2006.229.05:12:33.58#ibcon#wrote, iclass 31, count 0 2006.229.05:12:33.58#ibcon#about to read 3, iclass 31, count 0 2006.229.05:12:33.61#ibcon#read 3, iclass 31, count 0 2006.229.05:12:33.61#ibcon#about to read 4, iclass 31, count 0 2006.229.05:12:33.61#ibcon#read 4, iclass 31, count 0 2006.229.05:12:33.61#ibcon#about to read 5, iclass 31, count 0 2006.229.05:12:33.61#ibcon#read 5, iclass 31, count 0 2006.229.05:12:33.61#ibcon#about to read 6, iclass 31, count 0 2006.229.05:12:33.61#ibcon#read 6, iclass 31, count 0 2006.229.05:12:33.61#ibcon#end of sib2, iclass 31, count 0 2006.229.05:12:33.61#ibcon#*after write, iclass 31, count 0 2006.229.05:12:33.61#ibcon#*before return 0, iclass 31, count 0 2006.229.05:12:33.61#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:33.61#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:12:33.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:12:33.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:12:33.61$vck44/vblo=7,734.99 2006.229.05:12:33.61#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.05:12:33.61#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.05:12:33.61#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:33.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:33.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:33.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:33.61#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:12:33.61#ibcon#first serial, iclass 33, count 0 2006.229.05:12:33.61#ibcon#enter sib2, iclass 33, count 0 2006.229.05:12:33.61#ibcon#flushed, iclass 33, count 0 2006.229.05:12:33.61#ibcon#about to write, iclass 33, count 0 2006.229.05:12:33.61#ibcon#wrote, iclass 33, count 0 2006.229.05:12:33.61#ibcon#about to read 3, iclass 33, count 0 2006.229.05:12:33.63#ibcon#read 3, iclass 33, count 0 2006.229.05:12:33.63#ibcon#about to read 4, iclass 33, count 0 2006.229.05:12:33.63#ibcon#read 4, iclass 33, count 0 2006.229.05:12:33.63#ibcon#about to read 5, iclass 33, count 0 2006.229.05:12:33.63#ibcon#read 5, iclass 33, count 0 2006.229.05:12:33.63#ibcon#about to read 6, iclass 33, count 0 2006.229.05:12:33.63#ibcon#read 6, iclass 33, count 0 2006.229.05:12:33.63#ibcon#end of sib2, iclass 33, count 0 2006.229.05:12:33.63#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:12:33.63#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:12:33.63#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:12:33.63#ibcon#*before write, iclass 33, count 0 2006.229.05:12:33.63#ibcon#enter sib2, iclass 33, count 0 2006.229.05:12:33.63#ibcon#flushed, iclass 33, count 0 2006.229.05:12:33.63#ibcon#about to write, iclass 33, count 0 2006.229.05:12:33.63#ibcon#wrote, iclass 33, count 0 2006.229.05:12:33.63#ibcon#about to read 3, iclass 33, count 0 2006.229.05:12:33.67#ibcon#read 3, iclass 33, count 0 2006.229.05:12:33.67#ibcon#about to read 4, iclass 33, count 0 2006.229.05:12:33.67#ibcon#read 4, iclass 33, count 0 2006.229.05:12:33.67#ibcon#about to read 5, iclass 33, count 0 2006.229.05:12:33.67#ibcon#read 5, iclass 33, count 0 2006.229.05:12:33.67#ibcon#about to read 6, iclass 33, count 0 2006.229.05:12:33.67#ibcon#read 6, iclass 33, count 0 2006.229.05:12:33.67#ibcon#end of sib2, iclass 33, count 0 2006.229.05:12:33.67#ibcon#*after write, iclass 33, count 0 2006.229.05:12:33.67#ibcon#*before return 0, iclass 33, count 0 2006.229.05:12:33.67#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:33.67#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:12:33.67#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:12:33.67#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:12:33.67$vck44/vb=7,4 2006.229.05:12:33.67#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.05:12:33.67#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.05:12:33.67#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:33.67#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:33.73#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:33.73#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:33.73#ibcon#enter wrdev, iclass 35, count 2 2006.229.05:12:33.73#ibcon#first serial, iclass 35, count 2 2006.229.05:12:33.73#ibcon#enter sib2, iclass 35, count 2 2006.229.05:12:33.73#ibcon#flushed, iclass 35, count 2 2006.229.05:12:33.73#ibcon#about to write, iclass 35, count 2 2006.229.05:12:33.73#ibcon#wrote, iclass 35, count 2 2006.229.05:12:33.73#ibcon#about to read 3, iclass 35, count 2 2006.229.05:12:33.75#ibcon#read 3, iclass 35, count 2 2006.229.05:12:33.75#ibcon#about to read 4, iclass 35, count 2 2006.229.05:12:33.75#ibcon#read 4, iclass 35, count 2 2006.229.05:12:33.75#ibcon#about to read 5, iclass 35, count 2 2006.229.05:12:33.75#ibcon#read 5, iclass 35, count 2 2006.229.05:12:33.75#ibcon#about to read 6, iclass 35, count 2 2006.229.05:12:33.75#ibcon#read 6, iclass 35, count 2 2006.229.05:12:33.75#ibcon#end of sib2, iclass 35, count 2 2006.229.05:12:33.75#ibcon#*mode == 0, iclass 35, count 2 2006.229.05:12:33.75#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.05:12:33.75#ibcon#[27=AT07-04\r\n] 2006.229.05:12:33.75#ibcon#*before write, iclass 35, count 2 2006.229.05:12:33.75#ibcon#enter sib2, iclass 35, count 2 2006.229.05:12:33.75#ibcon#flushed, iclass 35, count 2 2006.229.05:12:33.75#ibcon#about to write, iclass 35, count 2 2006.229.05:12:33.75#ibcon#wrote, iclass 35, count 2 2006.229.05:12:33.75#ibcon#about to read 3, iclass 35, count 2 2006.229.05:12:33.78#ibcon#read 3, iclass 35, count 2 2006.229.05:12:33.78#ibcon#about to read 4, iclass 35, count 2 2006.229.05:12:33.78#ibcon#read 4, iclass 35, count 2 2006.229.05:12:33.78#ibcon#about to read 5, iclass 35, count 2 2006.229.05:12:33.78#ibcon#read 5, iclass 35, count 2 2006.229.05:12:33.78#ibcon#about to read 6, iclass 35, count 2 2006.229.05:12:33.78#ibcon#read 6, iclass 35, count 2 2006.229.05:12:33.78#ibcon#end of sib2, iclass 35, count 2 2006.229.05:12:33.78#ibcon#*after write, iclass 35, count 2 2006.229.05:12:33.78#ibcon#*before return 0, iclass 35, count 2 2006.229.05:12:33.78#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:33.78#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:12:33.78#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.05:12:33.78#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:33.78#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:33.90#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:33.90#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:33.90#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:12:33.90#ibcon#first serial, iclass 35, count 0 2006.229.05:12:33.90#ibcon#enter sib2, iclass 35, count 0 2006.229.05:12:33.90#ibcon#flushed, iclass 35, count 0 2006.229.05:12:33.90#ibcon#about to write, iclass 35, count 0 2006.229.05:12:33.90#ibcon#wrote, iclass 35, count 0 2006.229.05:12:33.90#ibcon#about to read 3, iclass 35, count 0 2006.229.05:12:33.92#ibcon#read 3, iclass 35, count 0 2006.229.05:12:33.92#ibcon#about to read 4, iclass 35, count 0 2006.229.05:12:33.92#ibcon#read 4, iclass 35, count 0 2006.229.05:12:33.92#ibcon#about to read 5, iclass 35, count 0 2006.229.05:12:33.92#ibcon#read 5, iclass 35, count 0 2006.229.05:12:33.92#ibcon#about to read 6, iclass 35, count 0 2006.229.05:12:33.92#ibcon#read 6, iclass 35, count 0 2006.229.05:12:33.92#ibcon#end of sib2, iclass 35, count 0 2006.229.05:12:33.92#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:12:33.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:12:33.92#ibcon#[27=USB\r\n] 2006.229.05:12:33.92#ibcon#*before write, iclass 35, count 0 2006.229.05:12:33.92#ibcon#enter sib2, iclass 35, count 0 2006.229.05:12:33.92#ibcon#flushed, iclass 35, count 0 2006.229.05:12:33.92#ibcon#about to write, iclass 35, count 0 2006.229.05:12:33.92#ibcon#wrote, iclass 35, count 0 2006.229.05:12:33.92#ibcon#about to read 3, iclass 35, count 0 2006.229.05:12:33.95#ibcon#read 3, iclass 35, count 0 2006.229.05:12:33.95#ibcon#about to read 4, iclass 35, count 0 2006.229.05:12:33.95#ibcon#read 4, iclass 35, count 0 2006.229.05:12:33.95#ibcon#about to read 5, iclass 35, count 0 2006.229.05:12:33.95#ibcon#read 5, iclass 35, count 0 2006.229.05:12:33.95#ibcon#about to read 6, iclass 35, count 0 2006.229.05:12:33.95#ibcon#read 6, iclass 35, count 0 2006.229.05:12:33.95#ibcon#end of sib2, iclass 35, count 0 2006.229.05:12:33.95#ibcon#*after write, iclass 35, count 0 2006.229.05:12:33.95#ibcon#*before return 0, iclass 35, count 0 2006.229.05:12:33.95#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:33.95#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:12:33.95#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:12:33.95#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:12:33.95$vck44/vblo=8,744.99 2006.229.05:12:33.95#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:12:33.95#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:12:33.95#ibcon#ireg 17 cls_cnt 0 2006.229.05:12:33.95#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:33.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:33.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:33.95#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:12:33.95#ibcon#first serial, iclass 37, count 0 2006.229.05:12:33.95#ibcon#enter sib2, iclass 37, count 0 2006.229.05:12:33.95#ibcon#flushed, iclass 37, count 0 2006.229.05:12:33.95#ibcon#about to write, iclass 37, count 0 2006.229.05:12:33.95#ibcon#wrote, iclass 37, count 0 2006.229.05:12:33.95#ibcon#about to read 3, iclass 37, count 0 2006.229.05:12:33.97#ibcon#read 3, iclass 37, count 0 2006.229.05:12:33.97#ibcon#about to read 4, iclass 37, count 0 2006.229.05:12:33.97#ibcon#read 4, iclass 37, count 0 2006.229.05:12:33.97#ibcon#about to read 5, iclass 37, count 0 2006.229.05:12:33.97#ibcon#read 5, iclass 37, count 0 2006.229.05:12:33.97#ibcon#about to read 6, iclass 37, count 0 2006.229.05:12:33.97#ibcon#read 6, iclass 37, count 0 2006.229.05:12:33.97#ibcon#end of sib2, iclass 37, count 0 2006.229.05:12:33.97#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:12:33.97#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:12:33.97#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:12:33.97#ibcon#*before write, iclass 37, count 0 2006.229.05:12:33.97#ibcon#enter sib2, iclass 37, count 0 2006.229.05:12:33.97#ibcon#flushed, iclass 37, count 0 2006.229.05:12:33.97#ibcon#about to write, iclass 37, count 0 2006.229.05:12:33.97#ibcon#wrote, iclass 37, count 0 2006.229.05:12:33.97#ibcon#about to read 3, iclass 37, count 0 2006.229.05:12:34.01#ibcon#read 3, iclass 37, count 0 2006.229.05:12:34.01#ibcon#about to read 4, iclass 37, count 0 2006.229.05:12:34.01#ibcon#read 4, iclass 37, count 0 2006.229.05:12:34.01#ibcon#about to read 5, iclass 37, count 0 2006.229.05:12:34.01#ibcon#read 5, iclass 37, count 0 2006.229.05:12:34.01#ibcon#about to read 6, iclass 37, count 0 2006.229.05:12:34.01#ibcon#read 6, iclass 37, count 0 2006.229.05:12:34.01#ibcon#end of sib2, iclass 37, count 0 2006.229.05:12:34.01#ibcon#*after write, iclass 37, count 0 2006.229.05:12:34.01#ibcon#*before return 0, iclass 37, count 0 2006.229.05:12:34.01#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:34.01#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:12:34.01#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:12:34.01#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:12:34.01$vck44/vb=8,4 2006.229.05:12:34.01#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.05:12:34.01#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.05:12:34.01#ibcon#ireg 11 cls_cnt 2 2006.229.05:12:34.01#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:34.07#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:34.07#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:34.07#ibcon#enter wrdev, iclass 39, count 2 2006.229.05:12:34.07#ibcon#first serial, iclass 39, count 2 2006.229.05:12:34.07#ibcon#enter sib2, iclass 39, count 2 2006.229.05:12:34.07#ibcon#flushed, iclass 39, count 2 2006.229.05:12:34.07#ibcon#about to write, iclass 39, count 2 2006.229.05:12:34.07#ibcon#wrote, iclass 39, count 2 2006.229.05:12:34.07#ibcon#about to read 3, iclass 39, count 2 2006.229.05:12:34.09#ibcon#read 3, iclass 39, count 2 2006.229.05:12:34.09#ibcon#about to read 4, iclass 39, count 2 2006.229.05:12:34.09#ibcon#read 4, iclass 39, count 2 2006.229.05:12:34.09#ibcon#about to read 5, iclass 39, count 2 2006.229.05:12:34.09#ibcon#read 5, iclass 39, count 2 2006.229.05:12:34.09#ibcon#about to read 6, iclass 39, count 2 2006.229.05:12:34.09#ibcon#read 6, iclass 39, count 2 2006.229.05:12:34.09#ibcon#end of sib2, iclass 39, count 2 2006.229.05:12:34.09#ibcon#*mode == 0, iclass 39, count 2 2006.229.05:12:34.09#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.05:12:34.09#ibcon#[27=AT08-04\r\n] 2006.229.05:12:34.09#ibcon#*before write, iclass 39, count 2 2006.229.05:12:34.09#ibcon#enter sib2, iclass 39, count 2 2006.229.05:12:34.09#ibcon#flushed, iclass 39, count 2 2006.229.05:12:34.09#ibcon#about to write, iclass 39, count 2 2006.229.05:12:34.09#ibcon#wrote, iclass 39, count 2 2006.229.05:12:34.09#ibcon#about to read 3, iclass 39, count 2 2006.229.05:12:34.12#ibcon#read 3, iclass 39, count 2 2006.229.05:12:34.12#ibcon#about to read 4, iclass 39, count 2 2006.229.05:12:34.12#ibcon#read 4, iclass 39, count 2 2006.229.05:12:34.12#ibcon#about to read 5, iclass 39, count 2 2006.229.05:12:34.12#ibcon#read 5, iclass 39, count 2 2006.229.05:12:34.12#ibcon#about to read 6, iclass 39, count 2 2006.229.05:12:34.12#ibcon#read 6, iclass 39, count 2 2006.229.05:12:34.12#ibcon#end of sib2, iclass 39, count 2 2006.229.05:12:34.12#ibcon#*after write, iclass 39, count 2 2006.229.05:12:34.12#ibcon#*before return 0, iclass 39, count 2 2006.229.05:12:34.12#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:34.12#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:12:34.12#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.05:12:34.12#ibcon#ireg 7 cls_cnt 0 2006.229.05:12:34.12#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:34.24#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:34.24#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:34.24#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:12:34.24#ibcon#first serial, iclass 39, count 0 2006.229.05:12:34.24#ibcon#enter sib2, iclass 39, count 0 2006.229.05:12:34.24#ibcon#flushed, iclass 39, count 0 2006.229.05:12:34.24#ibcon#about to write, iclass 39, count 0 2006.229.05:12:34.24#ibcon#wrote, iclass 39, count 0 2006.229.05:12:34.24#ibcon#about to read 3, iclass 39, count 0 2006.229.05:12:34.26#ibcon#read 3, iclass 39, count 0 2006.229.05:12:34.26#ibcon#about to read 4, iclass 39, count 0 2006.229.05:12:34.26#ibcon#read 4, iclass 39, count 0 2006.229.05:12:34.26#ibcon#about to read 5, iclass 39, count 0 2006.229.05:12:34.26#ibcon#read 5, iclass 39, count 0 2006.229.05:12:34.26#ibcon#about to read 6, iclass 39, count 0 2006.229.05:12:34.26#ibcon#read 6, iclass 39, count 0 2006.229.05:12:34.26#ibcon#end of sib2, iclass 39, count 0 2006.229.05:12:34.26#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:12:34.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:12:34.26#ibcon#[27=USB\r\n] 2006.229.05:12:34.26#ibcon#*before write, iclass 39, count 0 2006.229.05:12:34.26#ibcon#enter sib2, iclass 39, count 0 2006.229.05:12:34.26#ibcon#flushed, iclass 39, count 0 2006.229.05:12:34.26#ibcon#about to write, iclass 39, count 0 2006.229.05:12:34.26#ibcon#wrote, iclass 39, count 0 2006.229.05:12:34.26#ibcon#about to read 3, iclass 39, count 0 2006.229.05:12:34.29#ibcon#read 3, iclass 39, count 0 2006.229.05:12:34.29#ibcon#about to read 4, iclass 39, count 0 2006.229.05:12:34.29#ibcon#read 4, iclass 39, count 0 2006.229.05:12:34.29#ibcon#about to read 5, iclass 39, count 0 2006.229.05:12:34.29#ibcon#read 5, iclass 39, count 0 2006.229.05:12:34.29#ibcon#about to read 6, iclass 39, count 0 2006.229.05:12:34.29#ibcon#read 6, iclass 39, count 0 2006.229.05:12:34.29#ibcon#end of sib2, iclass 39, count 0 2006.229.05:12:34.29#ibcon#*after write, iclass 39, count 0 2006.229.05:12:34.29#ibcon#*before return 0, iclass 39, count 0 2006.229.05:12:34.29#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:34.29#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:12:34.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:12:34.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:12:34.29$vck44/vabw=wide 2006.229.05:12:34.29#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.05:12:34.29#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.05:12:34.29#ibcon#ireg 8 cls_cnt 0 2006.229.05:12:34.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:34.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:34.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:34.29#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:12:34.29#ibcon#first serial, iclass 3, count 0 2006.229.05:12:34.29#ibcon#enter sib2, iclass 3, count 0 2006.229.05:12:34.29#ibcon#flushed, iclass 3, count 0 2006.229.05:12:34.29#ibcon#about to write, iclass 3, count 0 2006.229.05:12:34.29#ibcon#wrote, iclass 3, count 0 2006.229.05:12:34.29#ibcon#about to read 3, iclass 3, count 0 2006.229.05:12:34.31#ibcon#read 3, iclass 3, count 0 2006.229.05:12:34.31#ibcon#about to read 4, iclass 3, count 0 2006.229.05:12:34.31#ibcon#read 4, iclass 3, count 0 2006.229.05:12:34.31#ibcon#about to read 5, iclass 3, count 0 2006.229.05:12:34.31#ibcon#read 5, iclass 3, count 0 2006.229.05:12:34.31#ibcon#about to read 6, iclass 3, count 0 2006.229.05:12:34.31#ibcon#read 6, iclass 3, count 0 2006.229.05:12:34.31#ibcon#end of sib2, iclass 3, count 0 2006.229.05:12:34.31#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:12:34.31#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:12:34.31#ibcon#[25=BW32\r\n] 2006.229.05:12:34.31#ibcon#*before write, iclass 3, count 0 2006.229.05:12:34.31#ibcon#enter sib2, iclass 3, count 0 2006.229.05:12:34.31#ibcon#flushed, iclass 3, count 0 2006.229.05:12:34.31#ibcon#about to write, iclass 3, count 0 2006.229.05:12:34.31#ibcon#wrote, iclass 3, count 0 2006.229.05:12:34.31#ibcon#about to read 3, iclass 3, count 0 2006.229.05:12:34.34#ibcon#read 3, iclass 3, count 0 2006.229.05:12:34.34#ibcon#about to read 4, iclass 3, count 0 2006.229.05:12:34.34#ibcon#read 4, iclass 3, count 0 2006.229.05:12:34.34#ibcon#about to read 5, iclass 3, count 0 2006.229.05:12:34.34#ibcon#read 5, iclass 3, count 0 2006.229.05:12:34.34#ibcon#about to read 6, iclass 3, count 0 2006.229.05:12:34.34#ibcon#read 6, iclass 3, count 0 2006.229.05:12:34.34#ibcon#end of sib2, iclass 3, count 0 2006.229.05:12:34.34#ibcon#*after write, iclass 3, count 0 2006.229.05:12:34.34#ibcon#*before return 0, iclass 3, count 0 2006.229.05:12:34.34#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:34.34#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:12:34.34#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:12:34.34#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:12:34.34$vck44/vbbw=wide 2006.229.05:12:34.34#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:12:34.34#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:12:34.34#ibcon#ireg 8 cls_cnt 0 2006.229.05:12:34.34#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:12:34.41#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:12:34.41#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:12:34.41#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:12:34.41#ibcon#first serial, iclass 5, count 0 2006.229.05:12:34.41#ibcon#enter sib2, iclass 5, count 0 2006.229.05:12:34.41#ibcon#flushed, iclass 5, count 0 2006.229.05:12:34.41#ibcon#about to write, iclass 5, count 0 2006.229.05:12:34.41#ibcon#wrote, iclass 5, count 0 2006.229.05:12:34.41#ibcon#about to read 3, iclass 5, count 0 2006.229.05:12:34.43#ibcon#read 3, iclass 5, count 0 2006.229.05:12:34.43#ibcon#about to read 4, iclass 5, count 0 2006.229.05:12:34.43#ibcon#read 4, iclass 5, count 0 2006.229.05:12:34.43#ibcon#about to read 5, iclass 5, count 0 2006.229.05:12:34.43#ibcon#read 5, iclass 5, count 0 2006.229.05:12:34.43#ibcon#about to read 6, iclass 5, count 0 2006.229.05:12:34.43#ibcon#read 6, iclass 5, count 0 2006.229.05:12:34.43#ibcon#end of sib2, iclass 5, count 0 2006.229.05:12:34.43#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:12:34.43#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:12:34.43#ibcon#[27=BW32\r\n] 2006.229.05:12:34.43#ibcon#*before write, iclass 5, count 0 2006.229.05:12:34.43#ibcon#enter sib2, iclass 5, count 0 2006.229.05:12:34.43#ibcon#flushed, iclass 5, count 0 2006.229.05:12:34.43#ibcon#about to write, iclass 5, count 0 2006.229.05:12:34.43#ibcon#wrote, iclass 5, count 0 2006.229.05:12:34.43#ibcon#about to read 3, iclass 5, count 0 2006.229.05:12:34.46#ibcon#read 3, iclass 5, count 0 2006.229.05:12:34.46#ibcon#about to read 4, iclass 5, count 0 2006.229.05:12:34.46#ibcon#read 4, iclass 5, count 0 2006.229.05:12:34.46#ibcon#about to read 5, iclass 5, count 0 2006.229.05:12:34.46#ibcon#read 5, iclass 5, count 0 2006.229.05:12:34.46#ibcon#about to read 6, iclass 5, count 0 2006.229.05:12:34.46#ibcon#read 6, iclass 5, count 0 2006.229.05:12:34.46#ibcon#end of sib2, iclass 5, count 0 2006.229.05:12:34.46#ibcon#*after write, iclass 5, count 0 2006.229.05:12:34.46#ibcon#*before return 0, iclass 5, count 0 2006.229.05:12:34.46#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:12:34.46#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:12:34.46#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:12:34.46#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:12:34.46$setupk4/ifdk4 2006.229.05:12:34.46$ifdk4/lo= 2006.229.05:12:34.46$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:12:34.46$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:12:34.46$ifdk4/patch= 2006.229.05:12:34.46$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:12:34.46$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:12:34.46$setupk4/!*+20s 2006.229.05:12:37.77#abcon#<5=/04 3.8 7.9 31.03 92 999.6\r\n> 2006.229.05:12:37.79#abcon#{5=INTERFACE CLEAR} 2006.229.05:12:37.85#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:12:47.94#abcon#<5=/04 3.8 7.9 31.02 91 999.6\r\n> 2006.229.05:12:47.96#abcon#{5=INTERFACE CLEAR} 2006.229.05:12:48.02#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:12:48.23$setupk4/"tpicd 2006.229.05:12:48.23$setupk4/echo=off 2006.229.05:12:48.23$setupk4/xlog=off 2006.229.05:12:48.23:!2006.229.05:17:37 2006.229.05:13:13.14#trakl#Source acquired 2006.229.05:13:14.14#flagr#flagr/antenna,acquired 2006.229.05:17:37.00:preob 2006.229.05:17:37.13/onsource/TRACKING 2006.229.05:17:37.13:!2006.229.05:17:47 2006.229.05:17:47.00:"tape 2006.229.05:17:47.00:"st=record 2006.229.05:17:47.00:data_valid=on 2006.229.05:17:47.00:midob 2006.229.05:17:47.13/onsource/TRACKING 2006.229.05:17:47.13/wx/30.98,999.5,91 2006.229.05:17:47.34/cable/+6.3995E-03 2006.229.05:17:48.43/va/01,08,usb,yes,32,35 2006.229.05:17:48.43/va/02,07,usb,yes,35,36 2006.229.05:17:48.43/va/03,06,usb,yes,43,46 2006.229.05:17:48.43/va/04,07,usb,yes,36,38 2006.229.05:17:48.43/va/05,04,usb,yes,32,33 2006.229.05:17:48.43/va/06,04,usb,yes,36,36 2006.229.05:17:48.43/va/07,05,usb,yes,32,33 2006.229.05:17:48.43/va/08,06,usb,yes,23,29 2006.229.05:17:48.66/valo/01,524.99,yes,locked 2006.229.05:17:48.66/valo/02,534.99,yes,locked 2006.229.05:17:48.66/valo/03,564.99,yes,locked 2006.229.05:17:48.66/valo/04,624.99,yes,locked 2006.229.05:17:48.66/valo/05,734.99,yes,locked 2006.229.05:17:48.66/valo/06,814.99,yes,locked 2006.229.05:17:48.66/valo/07,864.99,yes,locked 2006.229.05:17:48.66/valo/08,884.99,yes,locked 2006.229.05:17:49.75/vb/01,04,usb,yes,33,30 2006.229.05:17:49.75/vb/02,04,usb,yes,35,35 2006.229.05:17:49.75/vb/03,04,usb,yes,32,35 2006.229.05:17:49.75/vb/04,04,usb,yes,37,36 2006.229.05:17:49.75/vb/05,04,usb,yes,29,31 2006.229.05:17:49.75/vb/06,04,usb,yes,33,29 2006.229.05:17:49.75/vb/07,04,usb,yes,33,33 2006.229.05:17:49.75/vb/08,04,usb,yes,30,34 2006.229.05:17:49.99/vblo/01,629.99,yes,locked 2006.229.05:17:49.99/vblo/02,634.99,yes,locked 2006.229.05:17:49.99/vblo/03,649.99,yes,locked 2006.229.05:17:49.99/vblo/04,679.99,yes,locked 2006.229.05:17:49.99/vblo/05,709.99,yes,locked 2006.229.05:17:49.99/vblo/06,719.99,yes,locked 2006.229.05:17:49.99/vblo/07,734.99,yes,locked 2006.229.05:17:49.99/vblo/08,744.99,yes,locked 2006.229.05:17:50.14/vabw/8 2006.229.05:17:50.29/vbbw/8 2006.229.05:17:50.38/xfe/off,on,12.0 2006.229.05:17:50.77/ifatt/23,28,28,28 2006.229.05:17:51.07/fmout-gps/S +4.52E-07 2006.229.05:17:51.11:!2006.229.05:18:47 2006.229.05:18:47.01:data_valid=off 2006.229.05:18:47.01:"et 2006.229.05:18:47.02:!+3s 2006.229.05:18:50.03:"tape 2006.229.05:18:50.03:postob 2006.229.05:18:50.09/cable/+6.4010E-03 2006.229.05:18:50.09/wx/30.97,999.5,90 2006.229.05:18:50.15/fmout-gps/S +4.53E-07 2006.229.05:18:50.15:scan_name=229-0523,jd0608,40 2006.229.05:18:50.15:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.05:18:51.14#flagr#flagr/antenna,new-source 2006.229.05:18:51.14:checkk5 2006.229.05:18:51.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:18:51.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:18:52.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:18:52.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:18:53.13/chk_obsdata//k5ts1/T2290517??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:18:53.53/chk_obsdata//k5ts2/T2290517??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:18:53.92/chk_obsdata//k5ts3/T2290517??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:18:54.33/chk_obsdata//k5ts4/T2290517??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:18:55.07/k5log//k5ts1_log_newline 2006.229.05:18:55.78/k5log//k5ts2_log_newline 2006.229.05:18:56.50/k5log//k5ts3_log_newline 2006.229.05:18:57.22/k5log//k5ts4_log_newline 2006.229.05:18:57.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:18:57.24:setupk4=1 2006.229.05:18:57.24$setupk4/echo=on 2006.229.05:18:57.24$setupk4/pcalon 2006.229.05:18:57.24$pcalon/"no phase cal control is implemented here 2006.229.05:18:57.24$setupk4/"tpicd=stop 2006.229.05:18:57.24$setupk4/"rec=synch_on 2006.229.05:18:57.24$setupk4/"rec_mode=128 2006.229.05:18:57.24$setupk4/!* 2006.229.05:18:57.24$setupk4/recpk4 2006.229.05:18:57.24$recpk4/recpatch= 2006.229.05:18:57.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:18:57.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:18:57.24$setupk4/vck44 2006.229.05:18:57.24$vck44/valo=1,524.99 2006.229.05:18:57.24#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.05:18:57.24#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.05:18:57.24#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:57.24#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:18:57.24#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:18:57.24#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:18:57.24#ibcon#enter wrdev, iclass 20, count 0 2006.229.05:18:57.24#ibcon#first serial, iclass 20, count 0 2006.229.05:18:57.24#ibcon#enter sib2, iclass 20, count 0 2006.229.05:18:57.24#ibcon#flushed, iclass 20, count 0 2006.229.05:18:57.24#ibcon#about to write, iclass 20, count 0 2006.229.05:18:57.24#ibcon#wrote, iclass 20, count 0 2006.229.05:18:57.24#ibcon#about to read 3, iclass 20, count 0 2006.229.05:18:57.26#ibcon#read 3, iclass 20, count 0 2006.229.05:18:57.26#ibcon#about to read 4, iclass 20, count 0 2006.229.05:18:57.26#ibcon#read 4, iclass 20, count 0 2006.229.05:18:57.26#ibcon#about to read 5, iclass 20, count 0 2006.229.05:18:57.26#ibcon#read 5, iclass 20, count 0 2006.229.05:18:57.26#ibcon#about to read 6, iclass 20, count 0 2006.229.05:18:57.26#ibcon#read 6, iclass 20, count 0 2006.229.05:18:57.26#ibcon#end of sib2, iclass 20, count 0 2006.229.05:18:57.26#ibcon#*mode == 0, iclass 20, count 0 2006.229.05:18:57.26#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.05:18:57.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:18:57.26#ibcon#*before write, iclass 20, count 0 2006.229.05:18:57.26#ibcon#enter sib2, iclass 20, count 0 2006.229.05:18:57.26#ibcon#flushed, iclass 20, count 0 2006.229.05:18:57.26#ibcon#about to write, iclass 20, count 0 2006.229.05:18:57.26#ibcon#wrote, iclass 20, count 0 2006.229.05:18:57.26#ibcon#about to read 3, iclass 20, count 0 2006.229.05:18:57.31#ibcon#read 3, iclass 20, count 0 2006.229.05:18:57.31#ibcon#about to read 4, iclass 20, count 0 2006.229.05:18:57.31#ibcon#read 4, iclass 20, count 0 2006.229.05:18:57.31#ibcon#about to read 5, iclass 20, count 0 2006.229.05:18:57.31#ibcon#read 5, iclass 20, count 0 2006.229.05:18:57.31#ibcon#about to read 6, iclass 20, count 0 2006.229.05:18:57.31#ibcon#read 6, iclass 20, count 0 2006.229.05:18:57.31#ibcon#end of sib2, iclass 20, count 0 2006.229.05:18:57.31#ibcon#*after write, iclass 20, count 0 2006.229.05:18:57.31#ibcon#*before return 0, iclass 20, count 0 2006.229.05:18:57.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:18:57.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:18:57.31#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.05:18:57.31#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.05:18:57.31$vck44/va=1,8 2006.229.05:18:57.31#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.05:18:57.31#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.05:18:57.31#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:57.31#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:18:57.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:18:57.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:18:57.31#ibcon#enter wrdev, iclass 22, count 2 2006.229.05:18:57.31#ibcon#first serial, iclass 22, count 2 2006.229.05:18:57.31#ibcon#enter sib2, iclass 22, count 2 2006.229.05:18:57.31#ibcon#flushed, iclass 22, count 2 2006.229.05:18:57.31#ibcon#about to write, iclass 22, count 2 2006.229.05:18:57.31#ibcon#wrote, iclass 22, count 2 2006.229.05:18:57.31#ibcon#about to read 3, iclass 22, count 2 2006.229.05:18:57.33#ibcon#read 3, iclass 22, count 2 2006.229.05:18:57.33#ibcon#about to read 4, iclass 22, count 2 2006.229.05:18:57.33#ibcon#read 4, iclass 22, count 2 2006.229.05:18:57.33#ibcon#about to read 5, iclass 22, count 2 2006.229.05:18:57.33#ibcon#read 5, iclass 22, count 2 2006.229.05:18:57.33#ibcon#about to read 6, iclass 22, count 2 2006.229.05:18:57.33#ibcon#read 6, iclass 22, count 2 2006.229.05:18:57.33#ibcon#end of sib2, iclass 22, count 2 2006.229.05:18:57.33#ibcon#*mode == 0, iclass 22, count 2 2006.229.05:18:57.33#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.05:18:57.33#ibcon#[25=AT01-08\r\n] 2006.229.05:18:57.33#ibcon#*before write, iclass 22, count 2 2006.229.05:18:57.33#ibcon#enter sib2, iclass 22, count 2 2006.229.05:18:57.33#ibcon#flushed, iclass 22, count 2 2006.229.05:18:57.33#ibcon#about to write, iclass 22, count 2 2006.229.05:18:57.33#ibcon#wrote, iclass 22, count 2 2006.229.05:18:57.33#ibcon#about to read 3, iclass 22, count 2 2006.229.05:18:57.36#ibcon#read 3, iclass 22, count 2 2006.229.05:18:57.36#ibcon#about to read 4, iclass 22, count 2 2006.229.05:18:57.36#ibcon#read 4, iclass 22, count 2 2006.229.05:18:57.36#ibcon#about to read 5, iclass 22, count 2 2006.229.05:18:57.36#ibcon#read 5, iclass 22, count 2 2006.229.05:18:57.36#ibcon#about to read 6, iclass 22, count 2 2006.229.05:18:57.36#ibcon#read 6, iclass 22, count 2 2006.229.05:18:57.36#ibcon#end of sib2, iclass 22, count 2 2006.229.05:18:57.36#ibcon#*after write, iclass 22, count 2 2006.229.05:18:57.36#ibcon#*before return 0, iclass 22, count 2 2006.229.05:18:57.36#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:18:57.36#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:18:57.36#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.05:18:57.36#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:57.36#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:18:57.48#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:18:57.48#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:18:57.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.05:18:57.48#ibcon#first serial, iclass 22, count 0 2006.229.05:18:57.48#ibcon#enter sib2, iclass 22, count 0 2006.229.05:18:57.48#ibcon#flushed, iclass 22, count 0 2006.229.05:18:57.48#ibcon#about to write, iclass 22, count 0 2006.229.05:18:57.48#ibcon#wrote, iclass 22, count 0 2006.229.05:18:57.48#ibcon#about to read 3, iclass 22, count 0 2006.229.05:18:57.50#ibcon#read 3, iclass 22, count 0 2006.229.05:18:57.50#ibcon#about to read 4, iclass 22, count 0 2006.229.05:18:57.50#ibcon#read 4, iclass 22, count 0 2006.229.05:18:57.50#ibcon#about to read 5, iclass 22, count 0 2006.229.05:18:57.50#ibcon#read 5, iclass 22, count 0 2006.229.05:18:57.50#ibcon#about to read 6, iclass 22, count 0 2006.229.05:18:57.50#ibcon#read 6, iclass 22, count 0 2006.229.05:18:57.50#ibcon#end of sib2, iclass 22, count 0 2006.229.05:18:57.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.05:18:57.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.05:18:57.50#ibcon#[25=USB\r\n] 2006.229.05:18:57.50#ibcon#*before write, iclass 22, count 0 2006.229.05:18:57.50#ibcon#enter sib2, iclass 22, count 0 2006.229.05:18:57.50#ibcon#flushed, iclass 22, count 0 2006.229.05:18:57.50#ibcon#about to write, iclass 22, count 0 2006.229.05:18:57.50#ibcon#wrote, iclass 22, count 0 2006.229.05:18:57.50#ibcon#about to read 3, iclass 22, count 0 2006.229.05:18:57.53#ibcon#read 3, iclass 22, count 0 2006.229.05:18:57.53#ibcon#about to read 4, iclass 22, count 0 2006.229.05:18:57.53#ibcon#read 4, iclass 22, count 0 2006.229.05:18:57.53#ibcon#about to read 5, iclass 22, count 0 2006.229.05:18:57.53#ibcon#read 5, iclass 22, count 0 2006.229.05:18:57.53#ibcon#about to read 6, iclass 22, count 0 2006.229.05:18:57.53#ibcon#read 6, iclass 22, count 0 2006.229.05:18:57.53#ibcon#end of sib2, iclass 22, count 0 2006.229.05:18:57.53#ibcon#*after write, iclass 22, count 0 2006.229.05:18:57.53#ibcon#*before return 0, iclass 22, count 0 2006.229.05:18:57.53#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:18:57.53#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:18:57.53#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.05:18:57.53#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.05:18:57.53$vck44/valo=2,534.99 2006.229.05:18:57.53#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.05:18:57.53#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.05:18:57.53#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:57.53#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:18:57.53#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:18:57.53#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:18:57.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.05:18:57.53#ibcon#first serial, iclass 24, count 0 2006.229.05:18:57.53#ibcon#enter sib2, iclass 24, count 0 2006.229.05:18:57.53#ibcon#flushed, iclass 24, count 0 2006.229.05:18:57.53#ibcon#about to write, iclass 24, count 0 2006.229.05:18:57.53#ibcon#wrote, iclass 24, count 0 2006.229.05:18:57.53#ibcon#about to read 3, iclass 24, count 0 2006.229.05:18:57.55#ibcon#read 3, iclass 24, count 0 2006.229.05:18:57.55#ibcon#about to read 4, iclass 24, count 0 2006.229.05:18:57.55#ibcon#read 4, iclass 24, count 0 2006.229.05:18:57.55#ibcon#about to read 5, iclass 24, count 0 2006.229.05:18:57.55#ibcon#read 5, iclass 24, count 0 2006.229.05:18:57.55#ibcon#about to read 6, iclass 24, count 0 2006.229.05:18:57.55#ibcon#read 6, iclass 24, count 0 2006.229.05:18:57.55#ibcon#end of sib2, iclass 24, count 0 2006.229.05:18:57.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.05:18:57.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.05:18:57.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:18:57.55#ibcon#*before write, iclass 24, count 0 2006.229.05:18:57.55#ibcon#enter sib2, iclass 24, count 0 2006.229.05:18:57.55#ibcon#flushed, iclass 24, count 0 2006.229.05:18:57.55#ibcon#about to write, iclass 24, count 0 2006.229.05:18:57.55#ibcon#wrote, iclass 24, count 0 2006.229.05:18:57.55#ibcon#about to read 3, iclass 24, count 0 2006.229.05:18:57.59#ibcon#read 3, iclass 24, count 0 2006.229.05:18:57.59#ibcon#about to read 4, iclass 24, count 0 2006.229.05:18:57.59#ibcon#read 4, iclass 24, count 0 2006.229.05:18:57.59#ibcon#about to read 5, iclass 24, count 0 2006.229.05:18:57.59#ibcon#read 5, iclass 24, count 0 2006.229.05:18:57.59#ibcon#about to read 6, iclass 24, count 0 2006.229.05:18:57.59#ibcon#read 6, iclass 24, count 0 2006.229.05:18:57.59#ibcon#end of sib2, iclass 24, count 0 2006.229.05:18:57.59#ibcon#*after write, iclass 24, count 0 2006.229.05:18:57.59#ibcon#*before return 0, iclass 24, count 0 2006.229.05:18:57.59#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:18:57.59#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:18:57.59#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.05:18:57.59#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.05:18:57.59$vck44/va=2,7 2006.229.05:18:57.59#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.05:18:57.59#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.05:18:57.59#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:57.59#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:18:57.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:18:57.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:18:57.65#ibcon#enter wrdev, iclass 26, count 2 2006.229.05:18:57.65#ibcon#first serial, iclass 26, count 2 2006.229.05:18:57.65#ibcon#enter sib2, iclass 26, count 2 2006.229.05:18:57.65#ibcon#flushed, iclass 26, count 2 2006.229.05:18:57.65#ibcon#about to write, iclass 26, count 2 2006.229.05:18:57.65#ibcon#wrote, iclass 26, count 2 2006.229.05:18:57.65#ibcon#about to read 3, iclass 26, count 2 2006.229.05:18:57.67#ibcon#read 3, iclass 26, count 2 2006.229.05:18:57.67#ibcon#about to read 4, iclass 26, count 2 2006.229.05:18:57.67#ibcon#read 4, iclass 26, count 2 2006.229.05:18:57.67#ibcon#about to read 5, iclass 26, count 2 2006.229.05:18:57.67#ibcon#read 5, iclass 26, count 2 2006.229.05:18:57.67#ibcon#about to read 6, iclass 26, count 2 2006.229.05:18:57.67#ibcon#read 6, iclass 26, count 2 2006.229.05:18:57.67#ibcon#end of sib2, iclass 26, count 2 2006.229.05:18:57.67#ibcon#*mode == 0, iclass 26, count 2 2006.229.05:18:57.67#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.05:18:57.67#ibcon#[25=AT02-07\r\n] 2006.229.05:18:57.67#ibcon#*before write, iclass 26, count 2 2006.229.05:18:57.67#ibcon#enter sib2, iclass 26, count 2 2006.229.05:18:57.67#ibcon#flushed, iclass 26, count 2 2006.229.05:18:57.67#ibcon#about to write, iclass 26, count 2 2006.229.05:18:57.67#ibcon#wrote, iclass 26, count 2 2006.229.05:18:57.67#ibcon#about to read 3, iclass 26, count 2 2006.229.05:18:57.70#ibcon#read 3, iclass 26, count 2 2006.229.05:18:57.70#ibcon#about to read 4, iclass 26, count 2 2006.229.05:18:57.70#ibcon#read 4, iclass 26, count 2 2006.229.05:18:57.70#ibcon#about to read 5, iclass 26, count 2 2006.229.05:18:57.70#ibcon#read 5, iclass 26, count 2 2006.229.05:18:57.70#ibcon#about to read 6, iclass 26, count 2 2006.229.05:18:57.70#ibcon#read 6, iclass 26, count 2 2006.229.05:18:57.70#ibcon#end of sib2, iclass 26, count 2 2006.229.05:18:57.70#ibcon#*after write, iclass 26, count 2 2006.229.05:18:57.70#ibcon#*before return 0, iclass 26, count 2 2006.229.05:18:57.70#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:18:57.70#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:18:57.70#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.05:18:57.70#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:57.70#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:18:57.82#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:18:57.82#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:18:57.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.05:18:57.82#ibcon#first serial, iclass 26, count 0 2006.229.05:18:57.82#ibcon#enter sib2, iclass 26, count 0 2006.229.05:18:57.82#ibcon#flushed, iclass 26, count 0 2006.229.05:18:57.82#ibcon#about to write, iclass 26, count 0 2006.229.05:18:57.82#ibcon#wrote, iclass 26, count 0 2006.229.05:18:57.82#ibcon#about to read 3, iclass 26, count 0 2006.229.05:18:57.84#ibcon#read 3, iclass 26, count 0 2006.229.05:18:57.84#ibcon#about to read 4, iclass 26, count 0 2006.229.05:18:57.84#ibcon#read 4, iclass 26, count 0 2006.229.05:18:57.84#ibcon#about to read 5, iclass 26, count 0 2006.229.05:18:57.84#ibcon#read 5, iclass 26, count 0 2006.229.05:18:57.84#ibcon#about to read 6, iclass 26, count 0 2006.229.05:18:57.84#ibcon#read 6, iclass 26, count 0 2006.229.05:18:57.84#ibcon#end of sib2, iclass 26, count 0 2006.229.05:18:57.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.05:18:57.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.05:18:57.84#ibcon#[25=USB\r\n] 2006.229.05:18:57.84#ibcon#*before write, iclass 26, count 0 2006.229.05:18:57.84#ibcon#enter sib2, iclass 26, count 0 2006.229.05:18:57.84#ibcon#flushed, iclass 26, count 0 2006.229.05:18:57.84#ibcon#about to write, iclass 26, count 0 2006.229.05:18:57.84#ibcon#wrote, iclass 26, count 0 2006.229.05:18:57.84#ibcon#about to read 3, iclass 26, count 0 2006.229.05:18:57.87#ibcon#read 3, iclass 26, count 0 2006.229.05:18:57.87#ibcon#about to read 4, iclass 26, count 0 2006.229.05:18:57.87#ibcon#read 4, iclass 26, count 0 2006.229.05:18:57.87#ibcon#about to read 5, iclass 26, count 0 2006.229.05:18:57.87#ibcon#read 5, iclass 26, count 0 2006.229.05:18:57.87#ibcon#about to read 6, iclass 26, count 0 2006.229.05:18:57.87#ibcon#read 6, iclass 26, count 0 2006.229.05:18:57.87#ibcon#end of sib2, iclass 26, count 0 2006.229.05:18:57.87#ibcon#*after write, iclass 26, count 0 2006.229.05:18:57.87#ibcon#*before return 0, iclass 26, count 0 2006.229.05:18:57.87#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:18:57.87#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:18:57.87#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.05:18:57.87#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.05:18:57.87$vck44/valo=3,564.99 2006.229.05:18:57.87#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.05:18:57.87#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.05:18:57.87#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:57.87#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:18:57.87#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:18:57.87#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:18:57.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.05:18:57.87#ibcon#first serial, iclass 28, count 0 2006.229.05:18:57.87#ibcon#enter sib2, iclass 28, count 0 2006.229.05:18:57.87#ibcon#flushed, iclass 28, count 0 2006.229.05:18:57.87#ibcon#about to write, iclass 28, count 0 2006.229.05:18:57.87#ibcon#wrote, iclass 28, count 0 2006.229.05:18:57.87#ibcon#about to read 3, iclass 28, count 0 2006.229.05:18:57.89#ibcon#read 3, iclass 28, count 0 2006.229.05:18:57.89#ibcon#about to read 4, iclass 28, count 0 2006.229.05:18:57.89#ibcon#read 4, iclass 28, count 0 2006.229.05:18:57.89#ibcon#about to read 5, iclass 28, count 0 2006.229.05:18:57.89#ibcon#read 5, iclass 28, count 0 2006.229.05:18:57.89#ibcon#about to read 6, iclass 28, count 0 2006.229.05:18:57.89#ibcon#read 6, iclass 28, count 0 2006.229.05:18:57.89#ibcon#end of sib2, iclass 28, count 0 2006.229.05:18:57.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.05:18:57.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.05:18:57.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:18:57.89#ibcon#*before write, iclass 28, count 0 2006.229.05:18:57.89#ibcon#enter sib2, iclass 28, count 0 2006.229.05:18:57.89#ibcon#flushed, iclass 28, count 0 2006.229.05:18:57.89#ibcon#about to write, iclass 28, count 0 2006.229.05:18:57.89#ibcon#wrote, iclass 28, count 0 2006.229.05:18:57.89#ibcon#about to read 3, iclass 28, count 0 2006.229.05:18:57.93#ibcon#read 3, iclass 28, count 0 2006.229.05:18:57.93#ibcon#about to read 4, iclass 28, count 0 2006.229.05:18:57.93#ibcon#read 4, iclass 28, count 0 2006.229.05:18:57.93#ibcon#about to read 5, iclass 28, count 0 2006.229.05:18:57.93#ibcon#read 5, iclass 28, count 0 2006.229.05:18:57.93#ibcon#about to read 6, iclass 28, count 0 2006.229.05:18:57.93#ibcon#read 6, iclass 28, count 0 2006.229.05:18:57.93#ibcon#end of sib2, iclass 28, count 0 2006.229.05:18:57.93#ibcon#*after write, iclass 28, count 0 2006.229.05:18:57.93#ibcon#*before return 0, iclass 28, count 0 2006.229.05:18:57.93#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:18:57.93#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:18:57.93#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.05:18:57.93#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.05:18:57.93$vck44/va=3,6 2006.229.05:18:57.93#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.05:18:57.93#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.05:18:57.93#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:57.93#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:18:57.99#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:18:57.99#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:18:57.99#ibcon#enter wrdev, iclass 30, count 2 2006.229.05:18:57.99#ibcon#first serial, iclass 30, count 2 2006.229.05:18:57.99#ibcon#enter sib2, iclass 30, count 2 2006.229.05:18:57.99#ibcon#flushed, iclass 30, count 2 2006.229.05:18:57.99#ibcon#about to write, iclass 30, count 2 2006.229.05:18:57.99#ibcon#wrote, iclass 30, count 2 2006.229.05:18:57.99#ibcon#about to read 3, iclass 30, count 2 2006.229.05:18:58.01#ibcon#read 3, iclass 30, count 2 2006.229.05:18:58.01#ibcon#about to read 4, iclass 30, count 2 2006.229.05:18:58.01#ibcon#read 4, iclass 30, count 2 2006.229.05:18:58.01#ibcon#about to read 5, iclass 30, count 2 2006.229.05:18:58.01#ibcon#read 5, iclass 30, count 2 2006.229.05:18:58.01#ibcon#about to read 6, iclass 30, count 2 2006.229.05:18:58.01#ibcon#read 6, iclass 30, count 2 2006.229.05:18:58.01#ibcon#end of sib2, iclass 30, count 2 2006.229.05:18:58.01#ibcon#*mode == 0, iclass 30, count 2 2006.229.05:18:58.01#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.05:18:58.01#ibcon#[25=AT03-06\r\n] 2006.229.05:18:58.01#ibcon#*before write, iclass 30, count 2 2006.229.05:18:58.01#ibcon#enter sib2, iclass 30, count 2 2006.229.05:18:58.01#ibcon#flushed, iclass 30, count 2 2006.229.05:18:58.01#ibcon#about to write, iclass 30, count 2 2006.229.05:18:58.01#ibcon#wrote, iclass 30, count 2 2006.229.05:18:58.01#ibcon#about to read 3, iclass 30, count 2 2006.229.05:18:58.04#ibcon#read 3, iclass 30, count 2 2006.229.05:18:58.04#ibcon#about to read 4, iclass 30, count 2 2006.229.05:18:58.04#ibcon#read 4, iclass 30, count 2 2006.229.05:18:58.04#ibcon#about to read 5, iclass 30, count 2 2006.229.05:18:58.04#ibcon#read 5, iclass 30, count 2 2006.229.05:18:58.04#ibcon#about to read 6, iclass 30, count 2 2006.229.05:18:58.04#ibcon#read 6, iclass 30, count 2 2006.229.05:18:58.04#ibcon#end of sib2, iclass 30, count 2 2006.229.05:18:58.04#ibcon#*after write, iclass 30, count 2 2006.229.05:18:58.04#ibcon#*before return 0, iclass 30, count 2 2006.229.05:18:58.04#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:18:58.04#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:18:58.04#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.05:18:58.04#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:58.04#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:18:58.16#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:18:58.16#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:18:58.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.05:18:58.16#ibcon#first serial, iclass 30, count 0 2006.229.05:18:58.16#ibcon#enter sib2, iclass 30, count 0 2006.229.05:18:58.16#ibcon#flushed, iclass 30, count 0 2006.229.05:18:58.16#ibcon#about to write, iclass 30, count 0 2006.229.05:18:58.16#ibcon#wrote, iclass 30, count 0 2006.229.05:18:58.16#ibcon#about to read 3, iclass 30, count 0 2006.229.05:18:58.18#ibcon#read 3, iclass 30, count 0 2006.229.05:18:58.18#ibcon#about to read 4, iclass 30, count 0 2006.229.05:18:58.18#ibcon#read 4, iclass 30, count 0 2006.229.05:18:58.18#ibcon#about to read 5, iclass 30, count 0 2006.229.05:18:58.18#ibcon#read 5, iclass 30, count 0 2006.229.05:18:58.18#ibcon#about to read 6, iclass 30, count 0 2006.229.05:18:58.18#ibcon#read 6, iclass 30, count 0 2006.229.05:18:58.18#ibcon#end of sib2, iclass 30, count 0 2006.229.05:18:58.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.05:18:58.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.05:18:58.18#ibcon#[25=USB\r\n] 2006.229.05:18:58.18#ibcon#*before write, iclass 30, count 0 2006.229.05:18:58.18#ibcon#enter sib2, iclass 30, count 0 2006.229.05:18:58.18#ibcon#flushed, iclass 30, count 0 2006.229.05:18:58.18#ibcon#about to write, iclass 30, count 0 2006.229.05:18:58.18#ibcon#wrote, iclass 30, count 0 2006.229.05:18:58.18#ibcon#about to read 3, iclass 30, count 0 2006.229.05:18:58.21#ibcon#read 3, iclass 30, count 0 2006.229.05:18:58.21#ibcon#about to read 4, iclass 30, count 0 2006.229.05:18:58.21#ibcon#read 4, iclass 30, count 0 2006.229.05:18:58.21#ibcon#about to read 5, iclass 30, count 0 2006.229.05:18:58.21#ibcon#read 5, iclass 30, count 0 2006.229.05:18:58.21#ibcon#about to read 6, iclass 30, count 0 2006.229.05:18:58.21#ibcon#read 6, iclass 30, count 0 2006.229.05:18:58.21#ibcon#end of sib2, iclass 30, count 0 2006.229.05:18:58.21#ibcon#*after write, iclass 30, count 0 2006.229.05:18:58.21#ibcon#*before return 0, iclass 30, count 0 2006.229.05:18:58.21#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:18:58.21#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:18:58.21#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.05:18:58.21#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.05:18:58.21$vck44/valo=4,624.99 2006.229.05:18:58.21#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.05:18:58.21#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.05:18:58.21#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:58.21#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:18:58.21#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:18:58.21#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:18:58.21#ibcon#enter wrdev, iclass 32, count 0 2006.229.05:18:58.21#ibcon#first serial, iclass 32, count 0 2006.229.05:18:58.21#ibcon#enter sib2, iclass 32, count 0 2006.229.05:18:58.21#ibcon#flushed, iclass 32, count 0 2006.229.05:18:58.21#ibcon#about to write, iclass 32, count 0 2006.229.05:18:58.21#ibcon#wrote, iclass 32, count 0 2006.229.05:18:58.21#ibcon#about to read 3, iclass 32, count 0 2006.229.05:18:58.23#ibcon#read 3, iclass 32, count 0 2006.229.05:18:58.23#ibcon#about to read 4, iclass 32, count 0 2006.229.05:18:58.23#ibcon#read 4, iclass 32, count 0 2006.229.05:18:58.23#ibcon#about to read 5, iclass 32, count 0 2006.229.05:18:58.23#ibcon#read 5, iclass 32, count 0 2006.229.05:18:58.23#ibcon#about to read 6, iclass 32, count 0 2006.229.05:18:58.23#ibcon#read 6, iclass 32, count 0 2006.229.05:18:58.23#ibcon#end of sib2, iclass 32, count 0 2006.229.05:18:58.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.05:18:58.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.05:18:58.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:18:58.23#ibcon#*before write, iclass 32, count 0 2006.229.05:18:58.23#ibcon#enter sib2, iclass 32, count 0 2006.229.05:18:58.23#ibcon#flushed, iclass 32, count 0 2006.229.05:18:58.23#ibcon#about to write, iclass 32, count 0 2006.229.05:18:58.23#ibcon#wrote, iclass 32, count 0 2006.229.05:18:58.23#ibcon#about to read 3, iclass 32, count 0 2006.229.05:18:58.27#ibcon#read 3, iclass 32, count 0 2006.229.05:18:58.27#ibcon#about to read 4, iclass 32, count 0 2006.229.05:18:58.27#ibcon#read 4, iclass 32, count 0 2006.229.05:18:58.27#ibcon#about to read 5, iclass 32, count 0 2006.229.05:18:58.27#ibcon#read 5, iclass 32, count 0 2006.229.05:18:58.27#ibcon#about to read 6, iclass 32, count 0 2006.229.05:18:58.27#ibcon#read 6, iclass 32, count 0 2006.229.05:18:58.27#ibcon#end of sib2, iclass 32, count 0 2006.229.05:18:58.27#ibcon#*after write, iclass 32, count 0 2006.229.05:18:58.27#ibcon#*before return 0, iclass 32, count 0 2006.229.05:18:58.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:18:58.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:18:58.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.05:18:58.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.05:18:58.27$vck44/va=4,7 2006.229.05:18:58.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.05:18:58.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.05:18:58.27#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:58.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:18:58.33#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:18:58.33#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:18:58.33#ibcon#enter wrdev, iclass 34, count 2 2006.229.05:18:58.33#ibcon#first serial, iclass 34, count 2 2006.229.05:18:58.33#ibcon#enter sib2, iclass 34, count 2 2006.229.05:18:58.33#ibcon#flushed, iclass 34, count 2 2006.229.05:18:58.33#ibcon#about to write, iclass 34, count 2 2006.229.05:18:58.33#ibcon#wrote, iclass 34, count 2 2006.229.05:18:58.33#ibcon#about to read 3, iclass 34, count 2 2006.229.05:18:58.35#ibcon#read 3, iclass 34, count 2 2006.229.05:18:58.35#ibcon#about to read 4, iclass 34, count 2 2006.229.05:18:58.35#ibcon#read 4, iclass 34, count 2 2006.229.05:18:58.35#ibcon#about to read 5, iclass 34, count 2 2006.229.05:18:58.35#ibcon#read 5, iclass 34, count 2 2006.229.05:18:58.35#ibcon#about to read 6, iclass 34, count 2 2006.229.05:18:58.35#ibcon#read 6, iclass 34, count 2 2006.229.05:18:58.35#ibcon#end of sib2, iclass 34, count 2 2006.229.05:18:58.35#ibcon#*mode == 0, iclass 34, count 2 2006.229.05:18:58.35#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.05:18:58.35#ibcon#[25=AT04-07\r\n] 2006.229.05:18:58.35#ibcon#*before write, iclass 34, count 2 2006.229.05:18:58.35#ibcon#enter sib2, iclass 34, count 2 2006.229.05:18:58.35#ibcon#flushed, iclass 34, count 2 2006.229.05:18:58.35#ibcon#about to write, iclass 34, count 2 2006.229.05:18:58.35#ibcon#wrote, iclass 34, count 2 2006.229.05:18:58.35#ibcon#about to read 3, iclass 34, count 2 2006.229.05:18:58.38#ibcon#read 3, iclass 34, count 2 2006.229.05:18:58.38#ibcon#about to read 4, iclass 34, count 2 2006.229.05:18:58.38#ibcon#read 4, iclass 34, count 2 2006.229.05:18:58.38#ibcon#about to read 5, iclass 34, count 2 2006.229.05:18:58.38#ibcon#read 5, iclass 34, count 2 2006.229.05:18:58.38#ibcon#about to read 6, iclass 34, count 2 2006.229.05:18:58.38#ibcon#read 6, iclass 34, count 2 2006.229.05:18:58.38#ibcon#end of sib2, iclass 34, count 2 2006.229.05:18:58.38#ibcon#*after write, iclass 34, count 2 2006.229.05:18:58.38#ibcon#*before return 0, iclass 34, count 2 2006.229.05:18:58.38#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:18:58.38#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:18:58.38#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.05:18:58.38#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:58.38#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:18:58.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:18:58.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:18:58.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.05:18:58.50#ibcon#first serial, iclass 34, count 0 2006.229.05:18:58.50#ibcon#enter sib2, iclass 34, count 0 2006.229.05:18:58.50#ibcon#flushed, iclass 34, count 0 2006.229.05:18:58.50#ibcon#about to write, iclass 34, count 0 2006.229.05:18:58.50#ibcon#wrote, iclass 34, count 0 2006.229.05:18:58.50#ibcon#about to read 3, iclass 34, count 0 2006.229.05:18:58.52#ibcon#read 3, iclass 34, count 0 2006.229.05:18:58.52#ibcon#about to read 4, iclass 34, count 0 2006.229.05:18:58.52#ibcon#read 4, iclass 34, count 0 2006.229.05:18:58.52#ibcon#about to read 5, iclass 34, count 0 2006.229.05:18:58.52#ibcon#read 5, iclass 34, count 0 2006.229.05:18:58.52#ibcon#about to read 6, iclass 34, count 0 2006.229.05:18:58.52#ibcon#read 6, iclass 34, count 0 2006.229.05:18:58.52#ibcon#end of sib2, iclass 34, count 0 2006.229.05:18:58.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.05:18:58.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.05:18:58.52#ibcon#[25=USB\r\n] 2006.229.05:18:58.52#ibcon#*before write, iclass 34, count 0 2006.229.05:18:58.52#ibcon#enter sib2, iclass 34, count 0 2006.229.05:18:58.52#ibcon#flushed, iclass 34, count 0 2006.229.05:18:58.52#ibcon#about to write, iclass 34, count 0 2006.229.05:18:58.52#ibcon#wrote, iclass 34, count 0 2006.229.05:18:58.52#ibcon#about to read 3, iclass 34, count 0 2006.229.05:18:58.55#ibcon#read 3, iclass 34, count 0 2006.229.05:18:58.55#ibcon#about to read 4, iclass 34, count 0 2006.229.05:18:58.55#ibcon#read 4, iclass 34, count 0 2006.229.05:18:58.55#ibcon#about to read 5, iclass 34, count 0 2006.229.05:18:58.55#ibcon#read 5, iclass 34, count 0 2006.229.05:18:58.55#ibcon#about to read 6, iclass 34, count 0 2006.229.05:18:58.55#ibcon#read 6, iclass 34, count 0 2006.229.05:18:58.55#ibcon#end of sib2, iclass 34, count 0 2006.229.05:18:58.55#ibcon#*after write, iclass 34, count 0 2006.229.05:18:58.55#ibcon#*before return 0, iclass 34, count 0 2006.229.05:18:58.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:18:58.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:18:58.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.05:18:58.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.05:18:58.55$vck44/valo=5,734.99 2006.229.05:18:58.55#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.05:18:58.55#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.05:18:58.55#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:58.55#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:18:58.55#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:18:58.55#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:18:58.55#ibcon#enter wrdev, iclass 36, count 0 2006.229.05:18:58.55#ibcon#first serial, iclass 36, count 0 2006.229.05:18:58.55#ibcon#enter sib2, iclass 36, count 0 2006.229.05:18:58.55#ibcon#flushed, iclass 36, count 0 2006.229.05:18:58.55#ibcon#about to write, iclass 36, count 0 2006.229.05:18:58.55#ibcon#wrote, iclass 36, count 0 2006.229.05:18:58.55#ibcon#about to read 3, iclass 36, count 0 2006.229.05:18:58.57#ibcon#read 3, iclass 36, count 0 2006.229.05:18:58.57#ibcon#about to read 4, iclass 36, count 0 2006.229.05:18:58.57#ibcon#read 4, iclass 36, count 0 2006.229.05:18:58.57#ibcon#about to read 5, iclass 36, count 0 2006.229.05:18:58.57#ibcon#read 5, iclass 36, count 0 2006.229.05:18:58.57#ibcon#about to read 6, iclass 36, count 0 2006.229.05:18:58.57#ibcon#read 6, iclass 36, count 0 2006.229.05:18:58.57#ibcon#end of sib2, iclass 36, count 0 2006.229.05:18:58.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.05:18:58.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.05:18:58.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:18:58.57#ibcon#*before write, iclass 36, count 0 2006.229.05:18:58.57#ibcon#enter sib2, iclass 36, count 0 2006.229.05:18:58.57#ibcon#flushed, iclass 36, count 0 2006.229.05:18:58.57#ibcon#about to write, iclass 36, count 0 2006.229.05:18:58.57#ibcon#wrote, iclass 36, count 0 2006.229.05:18:58.57#ibcon#about to read 3, iclass 36, count 0 2006.229.05:18:58.61#ibcon#read 3, iclass 36, count 0 2006.229.05:18:58.61#ibcon#about to read 4, iclass 36, count 0 2006.229.05:18:58.61#ibcon#read 4, iclass 36, count 0 2006.229.05:18:58.61#ibcon#about to read 5, iclass 36, count 0 2006.229.05:18:58.61#ibcon#read 5, iclass 36, count 0 2006.229.05:18:58.61#ibcon#about to read 6, iclass 36, count 0 2006.229.05:18:58.61#ibcon#read 6, iclass 36, count 0 2006.229.05:18:58.61#ibcon#end of sib2, iclass 36, count 0 2006.229.05:18:58.61#ibcon#*after write, iclass 36, count 0 2006.229.05:18:58.61#ibcon#*before return 0, iclass 36, count 0 2006.229.05:18:58.61#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:18:58.61#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:18:58.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.05:18:58.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.05:18:58.61$vck44/va=5,4 2006.229.05:18:58.61#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.05:18:58.61#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.05:18:58.61#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:58.61#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:18:58.67#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:18:58.67#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:18:58.67#ibcon#enter wrdev, iclass 38, count 2 2006.229.05:18:58.67#ibcon#first serial, iclass 38, count 2 2006.229.05:18:58.67#ibcon#enter sib2, iclass 38, count 2 2006.229.05:18:58.67#ibcon#flushed, iclass 38, count 2 2006.229.05:18:58.67#ibcon#about to write, iclass 38, count 2 2006.229.05:18:58.67#ibcon#wrote, iclass 38, count 2 2006.229.05:18:58.67#ibcon#about to read 3, iclass 38, count 2 2006.229.05:18:58.69#ibcon#read 3, iclass 38, count 2 2006.229.05:18:58.69#ibcon#about to read 4, iclass 38, count 2 2006.229.05:18:58.69#ibcon#read 4, iclass 38, count 2 2006.229.05:18:58.69#ibcon#about to read 5, iclass 38, count 2 2006.229.05:18:58.69#ibcon#read 5, iclass 38, count 2 2006.229.05:18:58.69#ibcon#about to read 6, iclass 38, count 2 2006.229.05:18:58.69#ibcon#read 6, iclass 38, count 2 2006.229.05:18:58.69#ibcon#end of sib2, iclass 38, count 2 2006.229.05:18:58.69#ibcon#*mode == 0, iclass 38, count 2 2006.229.05:18:58.69#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.05:18:58.69#ibcon#[25=AT05-04\r\n] 2006.229.05:18:58.69#ibcon#*before write, iclass 38, count 2 2006.229.05:18:58.69#ibcon#enter sib2, iclass 38, count 2 2006.229.05:18:58.69#ibcon#flushed, iclass 38, count 2 2006.229.05:18:58.69#ibcon#about to write, iclass 38, count 2 2006.229.05:18:58.69#ibcon#wrote, iclass 38, count 2 2006.229.05:18:58.69#ibcon#about to read 3, iclass 38, count 2 2006.229.05:18:58.72#ibcon#read 3, iclass 38, count 2 2006.229.05:18:58.72#ibcon#about to read 4, iclass 38, count 2 2006.229.05:18:58.72#ibcon#read 4, iclass 38, count 2 2006.229.05:18:58.72#ibcon#about to read 5, iclass 38, count 2 2006.229.05:18:58.72#ibcon#read 5, iclass 38, count 2 2006.229.05:18:58.72#ibcon#about to read 6, iclass 38, count 2 2006.229.05:18:58.72#ibcon#read 6, iclass 38, count 2 2006.229.05:18:58.72#ibcon#end of sib2, iclass 38, count 2 2006.229.05:18:58.72#ibcon#*after write, iclass 38, count 2 2006.229.05:18:58.72#ibcon#*before return 0, iclass 38, count 2 2006.229.05:18:58.72#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:18:58.72#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:18:58.72#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.05:18:58.72#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:58.72#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:18:58.84#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:18:58.84#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:18:58.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.05:18:58.84#ibcon#first serial, iclass 38, count 0 2006.229.05:18:58.84#ibcon#enter sib2, iclass 38, count 0 2006.229.05:18:58.84#ibcon#flushed, iclass 38, count 0 2006.229.05:18:58.84#ibcon#about to write, iclass 38, count 0 2006.229.05:18:58.84#ibcon#wrote, iclass 38, count 0 2006.229.05:18:58.84#ibcon#about to read 3, iclass 38, count 0 2006.229.05:18:58.86#ibcon#read 3, iclass 38, count 0 2006.229.05:18:58.86#ibcon#about to read 4, iclass 38, count 0 2006.229.05:18:58.86#ibcon#read 4, iclass 38, count 0 2006.229.05:18:58.86#ibcon#about to read 5, iclass 38, count 0 2006.229.05:18:58.86#ibcon#read 5, iclass 38, count 0 2006.229.05:18:58.86#ibcon#about to read 6, iclass 38, count 0 2006.229.05:18:58.86#ibcon#read 6, iclass 38, count 0 2006.229.05:18:58.86#ibcon#end of sib2, iclass 38, count 0 2006.229.05:18:58.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.05:18:58.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.05:18:58.86#ibcon#[25=USB\r\n] 2006.229.05:18:58.86#ibcon#*before write, iclass 38, count 0 2006.229.05:18:58.86#ibcon#enter sib2, iclass 38, count 0 2006.229.05:18:58.86#ibcon#flushed, iclass 38, count 0 2006.229.05:18:58.86#ibcon#about to write, iclass 38, count 0 2006.229.05:18:58.86#ibcon#wrote, iclass 38, count 0 2006.229.05:18:58.86#ibcon#about to read 3, iclass 38, count 0 2006.229.05:18:58.89#ibcon#read 3, iclass 38, count 0 2006.229.05:18:58.89#ibcon#about to read 4, iclass 38, count 0 2006.229.05:18:58.89#ibcon#read 4, iclass 38, count 0 2006.229.05:18:58.89#ibcon#about to read 5, iclass 38, count 0 2006.229.05:18:58.89#ibcon#read 5, iclass 38, count 0 2006.229.05:18:58.89#ibcon#about to read 6, iclass 38, count 0 2006.229.05:18:58.89#ibcon#read 6, iclass 38, count 0 2006.229.05:18:58.89#ibcon#end of sib2, iclass 38, count 0 2006.229.05:18:58.89#ibcon#*after write, iclass 38, count 0 2006.229.05:18:58.89#ibcon#*before return 0, iclass 38, count 0 2006.229.05:18:58.89#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:18:58.89#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:18:58.89#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.05:18:58.89#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.05:18:58.89$vck44/valo=6,814.99 2006.229.05:18:58.89#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.05:18:58.89#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.05:18:58.89#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:58.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:18:58.89#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:18:58.89#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:18:58.89#ibcon#enter wrdev, iclass 40, count 0 2006.229.05:18:58.89#ibcon#first serial, iclass 40, count 0 2006.229.05:18:58.89#ibcon#enter sib2, iclass 40, count 0 2006.229.05:18:58.89#ibcon#flushed, iclass 40, count 0 2006.229.05:18:58.89#ibcon#about to write, iclass 40, count 0 2006.229.05:18:58.89#ibcon#wrote, iclass 40, count 0 2006.229.05:18:58.89#ibcon#about to read 3, iclass 40, count 0 2006.229.05:18:58.91#ibcon#read 3, iclass 40, count 0 2006.229.05:18:58.91#ibcon#about to read 4, iclass 40, count 0 2006.229.05:18:58.91#ibcon#read 4, iclass 40, count 0 2006.229.05:18:58.91#ibcon#about to read 5, iclass 40, count 0 2006.229.05:18:58.91#ibcon#read 5, iclass 40, count 0 2006.229.05:18:58.91#ibcon#about to read 6, iclass 40, count 0 2006.229.05:18:58.91#ibcon#read 6, iclass 40, count 0 2006.229.05:18:58.91#ibcon#end of sib2, iclass 40, count 0 2006.229.05:18:58.91#ibcon#*mode == 0, iclass 40, count 0 2006.229.05:18:58.91#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.05:18:58.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:18:58.91#ibcon#*before write, iclass 40, count 0 2006.229.05:18:58.91#ibcon#enter sib2, iclass 40, count 0 2006.229.05:18:58.91#ibcon#flushed, iclass 40, count 0 2006.229.05:18:58.91#ibcon#about to write, iclass 40, count 0 2006.229.05:18:58.91#ibcon#wrote, iclass 40, count 0 2006.229.05:18:58.91#ibcon#about to read 3, iclass 40, count 0 2006.229.05:18:58.95#ibcon#read 3, iclass 40, count 0 2006.229.05:18:58.95#ibcon#about to read 4, iclass 40, count 0 2006.229.05:18:58.95#ibcon#read 4, iclass 40, count 0 2006.229.05:18:58.95#ibcon#about to read 5, iclass 40, count 0 2006.229.05:18:58.95#ibcon#read 5, iclass 40, count 0 2006.229.05:18:58.95#ibcon#about to read 6, iclass 40, count 0 2006.229.05:18:58.95#ibcon#read 6, iclass 40, count 0 2006.229.05:18:58.95#ibcon#end of sib2, iclass 40, count 0 2006.229.05:18:58.95#ibcon#*after write, iclass 40, count 0 2006.229.05:18:58.95#ibcon#*before return 0, iclass 40, count 0 2006.229.05:18:58.95#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:18:58.95#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:18:58.95#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.05:18:58.95#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.05:18:58.95$vck44/va=6,4 2006.229.05:18:58.95#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.05:18:58.95#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.05:18:58.95#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:58.95#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:18:59.01#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:18:59.01#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:18:59.01#ibcon#enter wrdev, iclass 4, count 2 2006.229.05:18:59.01#ibcon#first serial, iclass 4, count 2 2006.229.05:18:59.01#ibcon#enter sib2, iclass 4, count 2 2006.229.05:18:59.01#ibcon#flushed, iclass 4, count 2 2006.229.05:18:59.01#ibcon#about to write, iclass 4, count 2 2006.229.05:18:59.01#ibcon#wrote, iclass 4, count 2 2006.229.05:18:59.01#ibcon#about to read 3, iclass 4, count 2 2006.229.05:18:59.03#ibcon#read 3, iclass 4, count 2 2006.229.05:18:59.03#ibcon#about to read 4, iclass 4, count 2 2006.229.05:18:59.03#ibcon#read 4, iclass 4, count 2 2006.229.05:18:59.03#ibcon#about to read 5, iclass 4, count 2 2006.229.05:18:59.03#ibcon#read 5, iclass 4, count 2 2006.229.05:18:59.03#ibcon#about to read 6, iclass 4, count 2 2006.229.05:18:59.03#ibcon#read 6, iclass 4, count 2 2006.229.05:18:59.03#ibcon#end of sib2, iclass 4, count 2 2006.229.05:18:59.03#ibcon#*mode == 0, iclass 4, count 2 2006.229.05:18:59.03#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.05:18:59.03#ibcon#[25=AT06-04\r\n] 2006.229.05:18:59.03#ibcon#*before write, iclass 4, count 2 2006.229.05:18:59.03#ibcon#enter sib2, iclass 4, count 2 2006.229.05:18:59.03#ibcon#flushed, iclass 4, count 2 2006.229.05:18:59.03#ibcon#about to write, iclass 4, count 2 2006.229.05:18:59.03#ibcon#wrote, iclass 4, count 2 2006.229.05:18:59.03#ibcon#about to read 3, iclass 4, count 2 2006.229.05:18:59.06#ibcon#read 3, iclass 4, count 2 2006.229.05:18:59.06#ibcon#about to read 4, iclass 4, count 2 2006.229.05:18:59.06#ibcon#read 4, iclass 4, count 2 2006.229.05:18:59.06#ibcon#about to read 5, iclass 4, count 2 2006.229.05:18:59.06#ibcon#read 5, iclass 4, count 2 2006.229.05:18:59.06#ibcon#about to read 6, iclass 4, count 2 2006.229.05:18:59.06#ibcon#read 6, iclass 4, count 2 2006.229.05:18:59.06#ibcon#end of sib2, iclass 4, count 2 2006.229.05:18:59.06#ibcon#*after write, iclass 4, count 2 2006.229.05:18:59.06#ibcon#*before return 0, iclass 4, count 2 2006.229.05:18:59.06#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:18:59.06#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:18:59.06#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.05:18:59.06#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:59.06#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:18:59.18#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:18:59.18#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:18:59.18#ibcon#enter wrdev, iclass 4, count 0 2006.229.05:18:59.18#ibcon#first serial, iclass 4, count 0 2006.229.05:18:59.18#ibcon#enter sib2, iclass 4, count 0 2006.229.05:18:59.18#ibcon#flushed, iclass 4, count 0 2006.229.05:18:59.18#ibcon#about to write, iclass 4, count 0 2006.229.05:18:59.18#ibcon#wrote, iclass 4, count 0 2006.229.05:18:59.18#ibcon#about to read 3, iclass 4, count 0 2006.229.05:18:59.20#ibcon#read 3, iclass 4, count 0 2006.229.05:18:59.20#ibcon#about to read 4, iclass 4, count 0 2006.229.05:18:59.20#ibcon#read 4, iclass 4, count 0 2006.229.05:18:59.20#ibcon#about to read 5, iclass 4, count 0 2006.229.05:18:59.20#ibcon#read 5, iclass 4, count 0 2006.229.05:18:59.20#ibcon#about to read 6, iclass 4, count 0 2006.229.05:18:59.20#ibcon#read 6, iclass 4, count 0 2006.229.05:18:59.20#ibcon#end of sib2, iclass 4, count 0 2006.229.05:18:59.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.05:18:59.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.05:18:59.20#ibcon#[25=USB\r\n] 2006.229.05:18:59.20#ibcon#*before write, iclass 4, count 0 2006.229.05:18:59.20#ibcon#enter sib2, iclass 4, count 0 2006.229.05:18:59.20#ibcon#flushed, iclass 4, count 0 2006.229.05:18:59.20#ibcon#about to write, iclass 4, count 0 2006.229.05:18:59.20#ibcon#wrote, iclass 4, count 0 2006.229.05:18:59.20#ibcon#about to read 3, iclass 4, count 0 2006.229.05:18:59.23#ibcon#read 3, iclass 4, count 0 2006.229.05:18:59.23#ibcon#about to read 4, iclass 4, count 0 2006.229.05:18:59.23#ibcon#read 4, iclass 4, count 0 2006.229.05:18:59.23#ibcon#about to read 5, iclass 4, count 0 2006.229.05:18:59.23#ibcon#read 5, iclass 4, count 0 2006.229.05:18:59.23#ibcon#about to read 6, iclass 4, count 0 2006.229.05:18:59.23#ibcon#read 6, iclass 4, count 0 2006.229.05:18:59.23#ibcon#end of sib2, iclass 4, count 0 2006.229.05:18:59.23#ibcon#*after write, iclass 4, count 0 2006.229.05:18:59.23#ibcon#*before return 0, iclass 4, count 0 2006.229.05:18:59.23#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:18:59.23#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:18:59.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.05:18:59.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.05:18:59.23$vck44/valo=7,864.99 2006.229.05:18:59.23#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.05:18:59.23#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.05:18:59.23#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:59.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:18:59.23#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:18:59.23#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:18:59.23#ibcon#enter wrdev, iclass 6, count 0 2006.229.05:18:59.23#ibcon#first serial, iclass 6, count 0 2006.229.05:18:59.23#ibcon#enter sib2, iclass 6, count 0 2006.229.05:18:59.23#ibcon#flushed, iclass 6, count 0 2006.229.05:18:59.23#ibcon#about to write, iclass 6, count 0 2006.229.05:18:59.23#ibcon#wrote, iclass 6, count 0 2006.229.05:18:59.23#ibcon#about to read 3, iclass 6, count 0 2006.229.05:18:59.25#ibcon#read 3, iclass 6, count 0 2006.229.05:18:59.25#ibcon#about to read 4, iclass 6, count 0 2006.229.05:18:59.25#ibcon#read 4, iclass 6, count 0 2006.229.05:18:59.25#ibcon#about to read 5, iclass 6, count 0 2006.229.05:18:59.25#ibcon#read 5, iclass 6, count 0 2006.229.05:18:59.25#ibcon#about to read 6, iclass 6, count 0 2006.229.05:18:59.25#ibcon#read 6, iclass 6, count 0 2006.229.05:18:59.25#ibcon#end of sib2, iclass 6, count 0 2006.229.05:18:59.25#ibcon#*mode == 0, iclass 6, count 0 2006.229.05:18:59.25#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.05:18:59.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:18:59.25#ibcon#*before write, iclass 6, count 0 2006.229.05:18:59.25#ibcon#enter sib2, iclass 6, count 0 2006.229.05:18:59.25#ibcon#flushed, iclass 6, count 0 2006.229.05:18:59.25#ibcon#about to write, iclass 6, count 0 2006.229.05:18:59.25#ibcon#wrote, iclass 6, count 0 2006.229.05:18:59.25#ibcon#about to read 3, iclass 6, count 0 2006.229.05:18:59.29#ibcon#read 3, iclass 6, count 0 2006.229.05:18:59.29#ibcon#about to read 4, iclass 6, count 0 2006.229.05:18:59.29#ibcon#read 4, iclass 6, count 0 2006.229.05:18:59.29#ibcon#about to read 5, iclass 6, count 0 2006.229.05:18:59.29#ibcon#read 5, iclass 6, count 0 2006.229.05:18:59.29#ibcon#about to read 6, iclass 6, count 0 2006.229.05:18:59.29#ibcon#read 6, iclass 6, count 0 2006.229.05:18:59.29#ibcon#end of sib2, iclass 6, count 0 2006.229.05:18:59.29#ibcon#*after write, iclass 6, count 0 2006.229.05:18:59.29#ibcon#*before return 0, iclass 6, count 0 2006.229.05:18:59.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:18:59.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:18:59.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.05:18:59.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.05:18:59.29$vck44/va=7,5 2006.229.05:18:59.29#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.05:18:59.29#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.05:18:59.29#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:59.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:18:59.35#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:18:59.35#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:18:59.35#ibcon#enter wrdev, iclass 10, count 2 2006.229.05:18:59.35#ibcon#first serial, iclass 10, count 2 2006.229.05:18:59.35#ibcon#enter sib2, iclass 10, count 2 2006.229.05:18:59.35#ibcon#flushed, iclass 10, count 2 2006.229.05:18:59.35#ibcon#about to write, iclass 10, count 2 2006.229.05:18:59.35#ibcon#wrote, iclass 10, count 2 2006.229.05:18:59.35#ibcon#about to read 3, iclass 10, count 2 2006.229.05:18:59.37#ibcon#read 3, iclass 10, count 2 2006.229.05:18:59.37#ibcon#about to read 4, iclass 10, count 2 2006.229.05:18:59.37#ibcon#read 4, iclass 10, count 2 2006.229.05:18:59.37#ibcon#about to read 5, iclass 10, count 2 2006.229.05:18:59.37#ibcon#read 5, iclass 10, count 2 2006.229.05:18:59.37#ibcon#about to read 6, iclass 10, count 2 2006.229.05:18:59.37#ibcon#read 6, iclass 10, count 2 2006.229.05:18:59.37#ibcon#end of sib2, iclass 10, count 2 2006.229.05:18:59.37#ibcon#*mode == 0, iclass 10, count 2 2006.229.05:18:59.38#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.05:18:59.38#ibcon#[25=AT07-05\r\n] 2006.229.05:18:59.38#ibcon#*before write, iclass 10, count 2 2006.229.05:18:59.38#ibcon#enter sib2, iclass 10, count 2 2006.229.05:18:59.38#ibcon#flushed, iclass 10, count 2 2006.229.05:18:59.38#ibcon#about to write, iclass 10, count 2 2006.229.05:18:59.38#ibcon#wrote, iclass 10, count 2 2006.229.05:18:59.38#ibcon#about to read 3, iclass 10, count 2 2006.229.05:18:59.41#ibcon#read 3, iclass 10, count 2 2006.229.05:18:59.41#ibcon#about to read 4, iclass 10, count 2 2006.229.05:18:59.41#ibcon#read 4, iclass 10, count 2 2006.229.05:18:59.41#ibcon#about to read 5, iclass 10, count 2 2006.229.05:18:59.41#ibcon#read 5, iclass 10, count 2 2006.229.05:18:59.41#ibcon#about to read 6, iclass 10, count 2 2006.229.05:18:59.41#ibcon#read 6, iclass 10, count 2 2006.229.05:18:59.41#ibcon#end of sib2, iclass 10, count 2 2006.229.05:18:59.41#ibcon#*after write, iclass 10, count 2 2006.229.05:18:59.41#ibcon#*before return 0, iclass 10, count 2 2006.229.05:18:59.41#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:18:59.41#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:18:59.41#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.05:18:59.41#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:59.41#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:18:59.53#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:18:59.53#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:18:59.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.05:18:59.53#ibcon#first serial, iclass 10, count 0 2006.229.05:18:59.53#ibcon#enter sib2, iclass 10, count 0 2006.229.05:18:59.53#ibcon#flushed, iclass 10, count 0 2006.229.05:18:59.53#ibcon#about to write, iclass 10, count 0 2006.229.05:18:59.53#ibcon#wrote, iclass 10, count 0 2006.229.05:18:59.53#ibcon#about to read 3, iclass 10, count 0 2006.229.05:18:59.55#ibcon#read 3, iclass 10, count 0 2006.229.05:18:59.55#ibcon#about to read 4, iclass 10, count 0 2006.229.05:18:59.55#ibcon#read 4, iclass 10, count 0 2006.229.05:18:59.55#ibcon#about to read 5, iclass 10, count 0 2006.229.05:18:59.55#ibcon#read 5, iclass 10, count 0 2006.229.05:18:59.55#ibcon#about to read 6, iclass 10, count 0 2006.229.05:18:59.55#ibcon#read 6, iclass 10, count 0 2006.229.05:18:59.55#ibcon#end of sib2, iclass 10, count 0 2006.229.05:18:59.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.05:18:59.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.05:18:59.55#ibcon#[25=USB\r\n] 2006.229.05:18:59.55#ibcon#*before write, iclass 10, count 0 2006.229.05:18:59.55#ibcon#enter sib2, iclass 10, count 0 2006.229.05:18:59.55#ibcon#flushed, iclass 10, count 0 2006.229.05:18:59.55#ibcon#about to write, iclass 10, count 0 2006.229.05:18:59.55#ibcon#wrote, iclass 10, count 0 2006.229.05:18:59.55#ibcon#about to read 3, iclass 10, count 0 2006.229.05:18:59.58#ibcon#read 3, iclass 10, count 0 2006.229.05:18:59.58#ibcon#about to read 4, iclass 10, count 0 2006.229.05:18:59.58#ibcon#read 4, iclass 10, count 0 2006.229.05:18:59.58#ibcon#about to read 5, iclass 10, count 0 2006.229.05:18:59.58#ibcon#read 5, iclass 10, count 0 2006.229.05:18:59.58#ibcon#about to read 6, iclass 10, count 0 2006.229.05:18:59.58#ibcon#read 6, iclass 10, count 0 2006.229.05:18:59.58#ibcon#end of sib2, iclass 10, count 0 2006.229.05:18:59.58#ibcon#*after write, iclass 10, count 0 2006.229.05:18:59.58#ibcon#*before return 0, iclass 10, count 0 2006.229.05:18:59.58#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:18:59.58#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:18:59.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.05:18:59.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.05:18:59.58$vck44/valo=8,884.99 2006.229.05:18:59.58#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.05:18:59.58#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.05:18:59.58#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:59.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:18:59.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:18:59.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:18:59.58#ibcon#enter wrdev, iclass 12, count 0 2006.229.05:18:59.58#ibcon#first serial, iclass 12, count 0 2006.229.05:18:59.58#ibcon#enter sib2, iclass 12, count 0 2006.229.05:18:59.58#ibcon#flushed, iclass 12, count 0 2006.229.05:18:59.58#ibcon#about to write, iclass 12, count 0 2006.229.05:18:59.58#ibcon#wrote, iclass 12, count 0 2006.229.05:18:59.58#ibcon#about to read 3, iclass 12, count 0 2006.229.05:18:59.60#ibcon#read 3, iclass 12, count 0 2006.229.05:18:59.60#ibcon#about to read 4, iclass 12, count 0 2006.229.05:18:59.60#ibcon#read 4, iclass 12, count 0 2006.229.05:18:59.60#ibcon#about to read 5, iclass 12, count 0 2006.229.05:18:59.60#ibcon#read 5, iclass 12, count 0 2006.229.05:18:59.60#ibcon#about to read 6, iclass 12, count 0 2006.229.05:18:59.60#ibcon#read 6, iclass 12, count 0 2006.229.05:18:59.60#ibcon#end of sib2, iclass 12, count 0 2006.229.05:18:59.60#ibcon#*mode == 0, iclass 12, count 0 2006.229.05:18:59.60#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.05:18:59.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:18:59.60#ibcon#*before write, iclass 12, count 0 2006.229.05:18:59.60#ibcon#enter sib2, iclass 12, count 0 2006.229.05:18:59.60#ibcon#flushed, iclass 12, count 0 2006.229.05:18:59.60#ibcon#about to write, iclass 12, count 0 2006.229.05:18:59.60#ibcon#wrote, iclass 12, count 0 2006.229.05:18:59.60#ibcon#about to read 3, iclass 12, count 0 2006.229.05:18:59.64#ibcon#read 3, iclass 12, count 0 2006.229.05:18:59.64#ibcon#about to read 4, iclass 12, count 0 2006.229.05:18:59.64#ibcon#read 4, iclass 12, count 0 2006.229.05:18:59.64#ibcon#about to read 5, iclass 12, count 0 2006.229.05:18:59.64#ibcon#read 5, iclass 12, count 0 2006.229.05:18:59.64#ibcon#about to read 6, iclass 12, count 0 2006.229.05:18:59.64#ibcon#read 6, iclass 12, count 0 2006.229.05:18:59.64#ibcon#end of sib2, iclass 12, count 0 2006.229.05:18:59.64#ibcon#*after write, iclass 12, count 0 2006.229.05:18:59.64#ibcon#*before return 0, iclass 12, count 0 2006.229.05:18:59.64#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:18:59.64#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:18:59.64#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.05:18:59.64#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.05:18:59.64$vck44/va=8,6 2006.229.05:18:59.64#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.05:18:59.64#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.05:18:59.64#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:59.64#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:18:59.70#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:18:59.70#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:18:59.70#ibcon#enter wrdev, iclass 14, count 2 2006.229.05:18:59.70#ibcon#first serial, iclass 14, count 2 2006.229.05:18:59.70#ibcon#enter sib2, iclass 14, count 2 2006.229.05:18:59.70#ibcon#flushed, iclass 14, count 2 2006.229.05:18:59.70#ibcon#about to write, iclass 14, count 2 2006.229.05:18:59.70#ibcon#wrote, iclass 14, count 2 2006.229.05:18:59.70#ibcon#about to read 3, iclass 14, count 2 2006.229.05:18:59.72#ibcon#read 3, iclass 14, count 2 2006.229.05:18:59.72#ibcon#about to read 4, iclass 14, count 2 2006.229.05:18:59.72#ibcon#read 4, iclass 14, count 2 2006.229.05:18:59.72#ibcon#about to read 5, iclass 14, count 2 2006.229.05:18:59.72#ibcon#read 5, iclass 14, count 2 2006.229.05:18:59.72#ibcon#about to read 6, iclass 14, count 2 2006.229.05:18:59.72#ibcon#read 6, iclass 14, count 2 2006.229.05:18:59.72#ibcon#end of sib2, iclass 14, count 2 2006.229.05:18:59.72#ibcon#*mode == 0, iclass 14, count 2 2006.229.05:18:59.72#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.05:18:59.72#ibcon#[25=AT08-06\r\n] 2006.229.05:18:59.72#ibcon#*before write, iclass 14, count 2 2006.229.05:18:59.72#ibcon#enter sib2, iclass 14, count 2 2006.229.05:18:59.72#ibcon#flushed, iclass 14, count 2 2006.229.05:18:59.72#ibcon#about to write, iclass 14, count 2 2006.229.05:18:59.72#ibcon#wrote, iclass 14, count 2 2006.229.05:18:59.72#ibcon#about to read 3, iclass 14, count 2 2006.229.05:18:59.75#ibcon#read 3, iclass 14, count 2 2006.229.05:18:59.75#ibcon#about to read 4, iclass 14, count 2 2006.229.05:18:59.75#ibcon#read 4, iclass 14, count 2 2006.229.05:18:59.75#ibcon#about to read 5, iclass 14, count 2 2006.229.05:18:59.75#ibcon#read 5, iclass 14, count 2 2006.229.05:18:59.75#ibcon#about to read 6, iclass 14, count 2 2006.229.05:18:59.75#ibcon#read 6, iclass 14, count 2 2006.229.05:18:59.75#ibcon#end of sib2, iclass 14, count 2 2006.229.05:18:59.75#ibcon#*after write, iclass 14, count 2 2006.229.05:18:59.75#ibcon#*before return 0, iclass 14, count 2 2006.229.05:18:59.75#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:18:59.75#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:18:59.75#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.05:18:59.75#ibcon#ireg 7 cls_cnt 0 2006.229.05:18:59.75#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:18:59.87#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:18:59.87#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:18:59.87#ibcon#enter wrdev, iclass 14, count 0 2006.229.05:18:59.87#ibcon#first serial, iclass 14, count 0 2006.229.05:18:59.87#ibcon#enter sib2, iclass 14, count 0 2006.229.05:18:59.87#ibcon#flushed, iclass 14, count 0 2006.229.05:18:59.87#ibcon#about to write, iclass 14, count 0 2006.229.05:18:59.87#ibcon#wrote, iclass 14, count 0 2006.229.05:18:59.87#ibcon#about to read 3, iclass 14, count 0 2006.229.05:18:59.89#ibcon#read 3, iclass 14, count 0 2006.229.05:18:59.89#ibcon#about to read 4, iclass 14, count 0 2006.229.05:18:59.89#ibcon#read 4, iclass 14, count 0 2006.229.05:18:59.89#ibcon#about to read 5, iclass 14, count 0 2006.229.05:18:59.89#ibcon#read 5, iclass 14, count 0 2006.229.05:18:59.89#ibcon#about to read 6, iclass 14, count 0 2006.229.05:18:59.89#ibcon#read 6, iclass 14, count 0 2006.229.05:18:59.89#ibcon#end of sib2, iclass 14, count 0 2006.229.05:18:59.89#ibcon#*mode == 0, iclass 14, count 0 2006.229.05:18:59.89#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.05:18:59.89#ibcon#[25=USB\r\n] 2006.229.05:18:59.89#ibcon#*before write, iclass 14, count 0 2006.229.05:18:59.89#ibcon#enter sib2, iclass 14, count 0 2006.229.05:18:59.89#ibcon#flushed, iclass 14, count 0 2006.229.05:18:59.89#ibcon#about to write, iclass 14, count 0 2006.229.05:18:59.89#ibcon#wrote, iclass 14, count 0 2006.229.05:18:59.89#ibcon#about to read 3, iclass 14, count 0 2006.229.05:18:59.92#ibcon#read 3, iclass 14, count 0 2006.229.05:18:59.92#ibcon#about to read 4, iclass 14, count 0 2006.229.05:18:59.92#ibcon#read 4, iclass 14, count 0 2006.229.05:18:59.92#ibcon#about to read 5, iclass 14, count 0 2006.229.05:18:59.92#ibcon#read 5, iclass 14, count 0 2006.229.05:18:59.92#ibcon#about to read 6, iclass 14, count 0 2006.229.05:18:59.92#ibcon#read 6, iclass 14, count 0 2006.229.05:18:59.92#ibcon#end of sib2, iclass 14, count 0 2006.229.05:18:59.92#ibcon#*after write, iclass 14, count 0 2006.229.05:18:59.92#ibcon#*before return 0, iclass 14, count 0 2006.229.05:18:59.92#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:18:59.92#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:18:59.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.05:18:59.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.05:18:59.92$vck44/vblo=1,629.99 2006.229.05:18:59.92#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.05:18:59.92#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.05:18:59.92#ibcon#ireg 17 cls_cnt 0 2006.229.05:18:59.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:18:59.92#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:18:59.92#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:18:59.92#ibcon#enter wrdev, iclass 16, count 0 2006.229.05:18:59.92#ibcon#first serial, iclass 16, count 0 2006.229.05:18:59.92#ibcon#enter sib2, iclass 16, count 0 2006.229.05:18:59.92#ibcon#flushed, iclass 16, count 0 2006.229.05:18:59.92#ibcon#about to write, iclass 16, count 0 2006.229.05:18:59.92#ibcon#wrote, iclass 16, count 0 2006.229.05:18:59.92#ibcon#about to read 3, iclass 16, count 0 2006.229.05:18:59.94#ibcon#read 3, iclass 16, count 0 2006.229.05:18:59.94#ibcon#about to read 4, iclass 16, count 0 2006.229.05:18:59.94#ibcon#read 4, iclass 16, count 0 2006.229.05:18:59.94#ibcon#about to read 5, iclass 16, count 0 2006.229.05:18:59.94#ibcon#read 5, iclass 16, count 0 2006.229.05:18:59.94#ibcon#about to read 6, iclass 16, count 0 2006.229.05:18:59.94#ibcon#read 6, iclass 16, count 0 2006.229.05:18:59.94#ibcon#end of sib2, iclass 16, count 0 2006.229.05:18:59.94#ibcon#*mode == 0, iclass 16, count 0 2006.229.05:18:59.94#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.05:18:59.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:18:59.94#ibcon#*before write, iclass 16, count 0 2006.229.05:18:59.94#ibcon#enter sib2, iclass 16, count 0 2006.229.05:18:59.94#ibcon#flushed, iclass 16, count 0 2006.229.05:18:59.94#ibcon#about to write, iclass 16, count 0 2006.229.05:18:59.94#ibcon#wrote, iclass 16, count 0 2006.229.05:18:59.94#ibcon#about to read 3, iclass 16, count 0 2006.229.05:18:59.98#ibcon#read 3, iclass 16, count 0 2006.229.05:18:59.98#ibcon#about to read 4, iclass 16, count 0 2006.229.05:18:59.98#ibcon#read 4, iclass 16, count 0 2006.229.05:18:59.98#ibcon#about to read 5, iclass 16, count 0 2006.229.05:18:59.98#ibcon#read 5, iclass 16, count 0 2006.229.05:18:59.98#ibcon#about to read 6, iclass 16, count 0 2006.229.05:18:59.98#ibcon#read 6, iclass 16, count 0 2006.229.05:18:59.98#ibcon#end of sib2, iclass 16, count 0 2006.229.05:18:59.98#ibcon#*after write, iclass 16, count 0 2006.229.05:18:59.98#ibcon#*before return 0, iclass 16, count 0 2006.229.05:18:59.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:18:59.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:18:59.98#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.05:18:59.98#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.05:18:59.98$vck44/vb=1,4 2006.229.05:18:59.98#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.05:18:59.98#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.05:18:59.98#ibcon#ireg 11 cls_cnt 2 2006.229.05:18:59.98#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:18:59.98#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:18:59.98#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:18:59.98#ibcon#enter wrdev, iclass 18, count 2 2006.229.05:18:59.98#ibcon#first serial, iclass 18, count 2 2006.229.05:18:59.98#ibcon#enter sib2, iclass 18, count 2 2006.229.05:18:59.98#ibcon#flushed, iclass 18, count 2 2006.229.05:18:59.98#ibcon#about to write, iclass 18, count 2 2006.229.05:18:59.98#ibcon#wrote, iclass 18, count 2 2006.229.05:18:59.98#ibcon#about to read 3, iclass 18, count 2 2006.229.05:19:00.00#ibcon#read 3, iclass 18, count 2 2006.229.05:19:00.00#ibcon#about to read 4, iclass 18, count 2 2006.229.05:19:00.00#ibcon#read 4, iclass 18, count 2 2006.229.05:19:00.00#ibcon#about to read 5, iclass 18, count 2 2006.229.05:19:00.00#ibcon#read 5, iclass 18, count 2 2006.229.05:19:00.00#ibcon#about to read 6, iclass 18, count 2 2006.229.05:19:00.00#ibcon#read 6, iclass 18, count 2 2006.229.05:19:00.00#ibcon#end of sib2, iclass 18, count 2 2006.229.05:19:00.00#ibcon#*mode == 0, iclass 18, count 2 2006.229.05:19:00.00#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.05:19:00.00#ibcon#[27=AT01-04\r\n] 2006.229.05:19:00.00#ibcon#*before write, iclass 18, count 2 2006.229.05:19:00.00#ibcon#enter sib2, iclass 18, count 2 2006.229.05:19:00.00#ibcon#flushed, iclass 18, count 2 2006.229.05:19:00.00#ibcon#about to write, iclass 18, count 2 2006.229.05:19:00.00#ibcon#wrote, iclass 18, count 2 2006.229.05:19:00.00#ibcon#about to read 3, iclass 18, count 2 2006.229.05:19:00.03#ibcon#read 3, iclass 18, count 2 2006.229.05:19:00.03#ibcon#about to read 4, iclass 18, count 2 2006.229.05:19:00.03#ibcon#read 4, iclass 18, count 2 2006.229.05:19:00.03#ibcon#about to read 5, iclass 18, count 2 2006.229.05:19:00.03#ibcon#read 5, iclass 18, count 2 2006.229.05:19:00.03#ibcon#about to read 6, iclass 18, count 2 2006.229.05:19:00.03#ibcon#read 6, iclass 18, count 2 2006.229.05:19:00.03#ibcon#end of sib2, iclass 18, count 2 2006.229.05:19:00.03#ibcon#*after write, iclass 18, count 2 2006.229.05:19:00.03#ibcon#*before return 0, iclass 18, count 2 2006.229.05:19:00.03#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:19:00.03#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:19:00.03#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.05:19:00.03#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:00.03#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:19:00.15#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:19:00.15#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:19:00.15#ibcon#enter wrdev, iclass 18, count 0 2006.229.05:19:00.15#ibcon#first serial, iclass 18, count 0 2006.229.05:19:00.15#ibcon#enter sib2, iclass 18, count 0 2006.229.05:19:00.15#ibcon#flushed, iclass 18, count 0 2006.229.05:19:00.15#ibcon#about to write, iclass 18, count 0 2006.229.05:19:00.15#ibcon#wrote, iclass 18, count 0 2006.229.05:19:00.15#ibcon#about to read 3, iclass 18, count 0 2006.229.05:19:00.17#ibcon#read 3, iclass 18, count 0 2006.229.05:19:00.17#ibcon#about to read 4, iclass 18, count 0 2006.229.05:19:00.17#ibcon#read 4, iclass 18, count 0 2006.229.05:19:00.17#ibcon#about to read 5, iclass 18, count 0 2006.229.05:19:00.17#ibcon#read 5, iclass 18, count 0 2006.229.05:19:00.17#ibcon#about to read 6, iclass 18, count 0 2006.229.05:19:00.17#ibcon#read 6, iclass 18, count 0 2006.229.05:19:00.17#ibcon#end of sib2, iclass 18, count 0 2006.229.05:19:00.17#ibcon#*mode == 0, iclass 18, count 0 2006.229.05:19:00.17#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.05:19:00.17#ibcon#[27=USB\r\n] 2006.229.05:19:00.17#ibcon#*before write, iclass 18, count 0 2006.229.05:19:00.17#ibcon#enter sib2, iclass 18, count 0 2006.229.05:19:00.17#ibcon#flushed, iclass 18, count 0 2006.229.05:19:00.17#ibcon#about to write, iclass 18, count 0 2006.229.05:19:00.17#ibcon#wrote, iclass 18, count 0 2006.229.05:19:00.17#ibcon#about to read 3, iclass 18, count 0 2006.229.05:19:00.20#ibcon#read 3, iclass 18, count 0 2006.229.05:19:00.20#ibcon#about to read 4, iclass 18, count 0 2006.229.05:19:00.20#ibcon#read 4, iclass 18, count 0 2006.229.05:19:00.20#ibcon#about to read 5, iclass 18, count 0 2006.229.05:19:00.20#ibcon#read 5, iclass 18, count 0 2006.229.05:19:00.20#ibcon#about to read 6, iclass 18, count 0 2006.229.05:19:00.20#ibcon#read 6, iclass 18, count 0 2006.229.05:19:00.20#ibcon#end of sib2, iclass 18, count 0 2006.229.05:19:00.20#ibcon#*after write, iclass 18, count 0 2006.229.05:19:00.20#ibcon#*before return 0, iclass 18, count 0 2006.229.05:19:00.20#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:19:00.20#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:19:00.20#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.05:19:00.20#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.05:19:00.20$vck44/vblo=2,634.99 2006.229.05:19:00.20#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.05:19:00.20#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.05:19:00.20#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:00.20#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:19:00.20#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:19:00.20#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:19:00.20#ibcon#enter wrdev, iclass 20, count 0 2006.229.05:19:00.20#ibcon#first serial, iclass 20, count 0 2006.229.05:19:00.20#ibcon#enter sib2, iclass 20, count 0 2006.229.05:19:00.20#ibcon#flushed, iclass 20, count 0 2006.229.05:19:00.20#ibcon#about to write, iclass 20, count 0 2006.229.05:19:00.20#ibcon#wrote, iclass 20, count 0 2006.229.05:19:00.20#ibcon#about to read 3, iclass 20, count 0 2006.229.05:19:00.22#ibcon#read 3, iclass 20, count 0 2006.229.05:19:00.22#ibcon#about to read 4, iclass 20, count 0 2006.229.05:19:00.22#ibcon#read 4, iclass 20, count 0 2006.229.05:19:00.22#ibcon#about to read 5, iclass 20, count 0 2006.229.05:19:00.22#ibcon#read 5, iclass 20, count 0 2006.229.05:19:00.22#ibcon#about to read 6, iclass 20, count 0 2006.229.05:19:00.22#ibcon#read 6, iclass 20, count 0 2006.229.05:19:00.22#ibcon#end of sib2, iclass 20, count 0 2006.229.05:19:00.22#ibcon#*mode == 0, iclass 20, count 0 2006.229.05:19:00.22#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.05:19:00.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:19:00.22#ibcon#*before write, iclass 20, count 0 2006.229.05:19:00.22#ibcon#enter sib2, iclass 20, count 0 2006.229.05:19:00.22#ibcon#flushed, iclass 20, count 0 2006.229.05:19:00.22#ibcon#about to write, iclass 20, count 0 2006.229.05:19:00.22#ibcon#wrote, iclass 20, count 0 2006.229.05:19:00.22#ibcon#about to read 3, iclass 20, count 0 2006.229.05:19:00.26#ibcon#read 3, iclass 20, count 0 2006.229.05:19:00.26#ibcon#about to read 4, iclass 20, count 0 2006.229.05:19:00.26#ibcon#read 4, iclass 20, count 0 2006.229.05:19:00.26#ibcon#about to read 5, iclass 20, count 0 2006.229.05:19:00.26#ibcon#read 5, iclass 20, count 0 2006.229.05:19:00.26#ibcon#about to read 6, iclass 20, count 0 2006.229.05:19:00.26#ibcon#read 6, iclass 20, count 0 2006.229.05:19:00.26#ibcon#end of sib2, iclass 20, count 0 2006.229.05:19:00.26#ibcon#*after write, iclass 20, count 0 2006.229.05:19:00.26#ibcon#*before return 0, iclass 20, count 0 2006.229.05:19:00.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:19:00.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:19:00.26#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.05:19:00.26#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.05:19:00.26$vck44/vb=2,4 2006.229.05:19:00.26#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.05:19:00.26#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.05:19:00.26#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:00.26#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:19:00.32#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:19:00.32#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:19:00.32#ibcon#enter wrdev, iclass 22, count 2 2006.229.05:19:00.32#ibcon#first serial, iclass 22, count 2 2006.229.05:19:00.32#ibcon#enter sib2, iclass 22, count 2 2006.229.05:19:00.32#ibcon#flushed, iclass 22, count 2 2006.229.05:19:00.32#ibcon#about to write, iclass 22, count 2 2006.229.05:19:00.32#ibcon#wrote, iclass 22, count 2 2006.229.05:19:00.32#ibcon#about to read 3, iclass 22, count 2 2006.229.05:19:00.34#ibcon#read 3, iclass 22, count 2 2006.229.05:19:00.34#ibcon#about to read 4, iclass 22, count 2 2006.229.05:19:00.34#ibcon#read 4, iclass 22, count 2 2006.229.05:19:00.34#ibcon#about to read 5, iclass 22, count 2 2006.229.05:19:00.34#ibcon#read 5, iclass 22, count 2 2006.229.05:19:00.34#ibcon#about to read 6, iclass 22, count 2 2006.229.05:19:00.34#ibcon#read 6, iclass 22, count 2 2006.229.05:19:00.34#ibcon#end of sib2, iclass 22, count 2 2006.229.05:19:00.34#ibcon#*mode == 0, iclass 22, count 2 2006.229.05:19:00.34#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.05:19:00.34#ibcon#[27=AT02-04\r\n] 2006.229.05:19:00.34#ibcon#*before write, iclass 22, count 2 2006.229.05:19:00.34#ibcon#enter sib2, iclass 22, count 2 2006.229.05:19:00.34#ibcon#flushed, iclass 22, count 2 2006.229.05:19:00.34#ibcon#about to write, iclass 22, count 2 2006.229.05:19:00.34#ibcon#wrote, iclass 22, count 2 2006.229.05:19:00.34#ibcon#about to read 3, iclass 22, count 2 2006.229.05:19:00.37#ibcon#read 3, iclass 22, count 2 2006.229.05:19:00.37#ibcon#about to read 4, iclass 22, count 2 2006.229.05:19:00.37#ibcon#read 4, iclass 22, count 2 2006.229.05:19:00.37#ibcon#about to read 5, iclass 22, count 2 2006.229.05:19:00.37#ibcon#read 5, iclass 22, count 2 2006.229.05:19:00.37#ibcon#about to read 6, iclass 22, count 2 2006.229.05:19:00.37#ibcon#read 6, iclass 22, count 2 2006.229.05:19:00.37#ibcon#end of sib2, iclass 22, count 2 2006.229.05:19:00.37#ibcon#*after write, iclass 22, count 2 2006.229.05:19:00.37#ibcon#*before return 0, iclass 22, count 2 2006.229.05:19:00.37#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:19:00.37#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:19:00.37#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.05:19:00.37#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:00.37#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:19:00.49#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:19:00.49#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:19:00.49#ibcon#enter wrdev, iclass 22, count 0 2006.229.05:19:00.49#ibcon#first serial, iclass 22, count 0 2006.229.05:19:00.49#ibcon#enter sib2, iclass 22, count 0 2006.229.05:19:00.49#ibcon#flushed, iclass 22, count 0 2006.229.05:19:00.49#ibcon#about to write, iclass 22, count 0 2006.229.05:19:00.49#ibcon#wrote, iclass 22, count 0 2006.229.05:19:00.49#ibcon#about to read 3, iclass 22, count 0 2006.229.05:19:00.51#ibcon#read 3, iclass 22, count 0 2006.229.05:19:00.51#ibcon#about to read 4, iclass 22, count 0 2006.229.05:19:00.51#ibcon#read 4, iclass 22, count 0 2006.229.05:19:00.51#ibcon#about to read 5, iclass 22, count 0 2006.229.05:19:00.51#ibcon#read 5, iclass 22, count 0 2006.229.05:19:00.51#ibcon#about to read 6, iclass 22, count 0 2006.229.05:19:00.51#ibcon#read 6, iclass 22, count 0 2006.229.05:19:00.51#ibcon#end of sib2, iclass 22, count 0 2006.229.05:19:00.51#ibcon#*mode == 0, iclass 22, count 0 2006.229.05:19:00.51#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.05:19:00.51#ibcon#[27=USB\r\n] 2006.229.05:19:00.51#ibcon#*before write, iclass 22, count 0 2006.229.05:19:00.51#ibcon#enter sib2, iclass 22, count 0 2006.229.05:19:00.51#ibcon#flushed, iclass 22, count 0 2006.229.05:19:00.51#ibcon#about to write, iclass 22, count 0 2006.229.05:19:00.51#ibcon#wrote, iclass 22, count 0 2006.229.05:19:00.51#ibcon#about to read 3, iclass 22, count 0 2006.229.05:19:00.54#ibcon#read 3, iclass 22, count 0 2006.229.05:19:00.54#ibcon#about to read 4, iclass 22, count 0 2006.229.05:19:00.54#ibcon#read 4, iclass 22, count 0 2006.229.05:19:00.54#ibcon#about to read 5, iclass 22, count 0 2006.229.05:19:00.54#ibcon#read 5, iclass 22, count 0 2006.229.05:19:00.54#ibcon#about to read 6, iclass 22, count 0 2006.229.05:19:00.54#ibcon#read 6, iclass 22, count 0 2006.229.05:19:00.54#ibcon#end of sib2, iclass 22, count 0 2006.229.05:19:00.54#ibcon#*after write, iclass 22, count 0 2006.229.05:19:00.54#ibcon#*before return 0, iclass 22, count 0 2006.229.05:19:00.54#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:19:00.54#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:19:00.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.05:19:00.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.05:19:00.54$vck44/vblo=3,649.99 2006.229.05:19:00.54#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.05:19:00.54#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.05:19:00.54#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:00.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:19:00.54#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:19:00.54#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:19:00.54#ibcon#enter wrdev, iclass 24, count 0 2006.229.05:19:00.54#ibcon#first serial, iclass 24, count 0 2006.229.05:19:00.54#ibcon#enter sib2, iclass 24, count 0 2006.229.05:19:00.54#ibcon#flushed, iclass 24, count 0 2006.229.05:19:00.54#ibcon#about to write, iclass 24, count 0 2006.229.05:19:00.54#ibcon#wrote, iclass 24, count 0 2006.229.05:19:00.54#ibcon#about to read 3, iclass 24, count 0 2006.229.05:19:00.56#ibcon#read 3, iclass 24, count 0 2006.229.05:19:00.56#ibcon#about to read 4, iclass 24, count 0 2006.229.05:19:00.56#ibcon#read 4, iclass 24, count 0 2006.229.05:19:00.56#ibcon#about to read 5, iclass 24, count 0 2006.229.05:19:00.56#ibcon#read 5, iclass 24, count 0 2006.229.05:19:00.56#ibcon#about to read 6, iclass 24, count 0 2006.229.05:19:00.56#ibcon#read 6, iclass 24, count 0 2006.229.05:19:00.56#ibcon#end of sib2, iclass 24, count 0 2006.229.05:19:00.56#ibcon#*mode == 0, iclass 24, count 0 2006.229.05:19:00.56#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.05:19:00.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:19:00.56#ibcon#*before write, iclass 24, count 0 2006.229.05:19:00.56#ibcon#enter sib2, iclass 24, count 0 2006.229.05:19:00.56#ibcon#flushed, iclass 24, count 0 2006.229.05:19:00.56#ibcon#about to write, iclass 24, count 0 2006.229.05:19:00.56#ibcon#wrote, iclass 24, count 0 2006.229.05:19:00.56#ibcon#about to read 3, iclass 24, count 0 2006.229.05:19:00.60#ibcon#read 3, iclass 24, count 0 2006.229.05:19:00.60#ibcon#about to read 4, iclass 24, count 0 2006.229.05:19:00.60#ibcon#read 4, iclass 24, count 0 2006.229.05:19:00.60#ibcon#about to read 5, iclass 24, count 0 2006.229.05:19:00.60#ibcon#read 5, iclass 24, count 0 2006.229.05:19:00.60#ibcon#about to read 6, iclass 24, count 0 2006.229.05:19:00.60#ibcon#read 6, iclass 24, count 0 2006.229.05:19:00.60#ibcon#end of sib2, iclass 24, count 0 2006.229.05:19:00.60#ibcon#*after write, iclass 24, count 0 2006.229.05:19:00.60#ibcon#*before return 0, iclass 24, count 0 2006.229.05:19:00.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:19:00.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:19:00.60#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.05:19:00.60#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.05:19:00.60$vck44/vb=3,4 2006.229.05:19:00.60#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.05:19:00.60#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.05:19:00.60#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:00.60#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:19:00.66#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:19:00.66#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:19:00.66#ibcon#enter wrdev, iclass 26, count 2 2006.229.05:19:00.66#ibcon#first serial, iclass 26, count 2 2006.229.05:19:00.66#ibcon#enter sib2, iclass 26, count 2 2006.229.05:19:00.66#ibcon#flushed, iclass 26, count 2 2006.229.05:19:00.66#ibcon#about to write, iclass 26, count 2 2006.229.05:19:00.66#ibcon#wrote, iclass 26, count 2 2006.229.05:19:00.66#ibcon#about to read 3, iclass 26, count 2 2006.229.05:19:00.68#ibcon#read 3, iclass 26, count 2 2006.229.05:19:00.68#ibcon#about to read 4, iclass 26, count 2 2006.229.05:19:00.68#ibcon#read 4, iclass 26, count 2 2006.229.05:19:00.68#ibcon#about to read 5, iclass 26, count 2 2006.229.05:19:00.68#ibcon#read 5, iclass 26, count 2 2006.229.05:19:00.68#ibcon#about to read 6, iclass 26, count 2 2006.229.05:19:00.68#ibcon#read 6, iclass 26, count 2 2006.229.05:19:00.68#ibcon#end of sib2, iclass 26, count 2 2006.229.05:19:00.68#ibcon#*mode == 0, iclass 26, count 2 2006.229.05:19:00.68#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.05:19:00.68#ibcon#[27=AT03-04\r\n] 2006.229.05:19:00.68#ibcon#*before write, iclass 26, count 2 2006.229.05:19:00.68#ibcon#enter sib2, iclass 26, count 2 2006.229.05:19:00.68#ibcon#flushed, iclass 26, count 2 2006.229.05:19:00.68#ibcon#about to write, iclass 26, count 2 2006.229.05:19:00.68#ibcon#wrote, iclass 26, count 2 2006.229.05:19:00.68#ibcon#about to read 3, iclass 26, count 2 2006.229.05:19:00.71#ibcon#read 3, iclass 26, count 2 2006.229.05:19:00.71#ibcon#about to read 4, iclass 26, count 2 2006.229.05:19:00.71#ibcon#read 4, iclass 26, count 2 2006.229.05:19:00.71#ibcon#about to read 5, iclass 26, count 2 2006.229.05:19:00.71#ibcon#read 5, iclass 26, count 2 2006.229.05:19:00.71#ibcon#about to read 6, iclass 26, count 2 2006.229.05:19:00.71#ibcon#read 6, iclass 26, count 2 2006.229.05:19:00.71#ibcon#end of sib2, iclass 26, count 2 2006.229.05:19:00.71#ibcon#*after write, iclass 26, count 2 2006.229.05:19:00.71#ibcon#*before return 0, iclass 26, count 2 2006.229.05:19:00.71#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:19:00.71#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:19:00.71#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.05:19:00.71#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:00.71#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:19:00.83#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:19:00.83#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:19:00.83#ibcon#enter wrdev, iclass 26, count 0 2006.229.05:19:00.83#ibcon#first serial, iclass 26, count 0 2006.229.05:19:00.83#ibcon#enter sib2, iclass 26, count 0 2006.229.05:19:00.83#ibcon#flushed, iclass 26, count 0 2006.229.05:19:00.83#ibcon#about to write, iclass 26, count 0 2006.229.05:19:00.83#ibcon#wrote, iclass 26, count 0 2006.229.05:19:00.83#ibcon#about to read 3, iclass 26, count 0 2006.229.05:19:00.85#ibcon#read 3, iclass 26, count 0 2006.229.05:19:00.85#ibcon#about to read 4, iclass 26, count 0 2006.229.05:19:00.85#ibcon#read 4, iclass 26, count 0 2006.229.05:19:00.85#ibcon#about to read 5, iclass 26, count 0 2006.229.05:19:00.85#ibcon#read 5, iclass 26, count 0 2006.229.05:19:00.85#ibcon#about to read 6, iclass 26, count 0 2006.229.05:19:00.85#ibcon#read 6, iclass 26, count 0 2006.229.05:19:00.85#ibcon#end of sib2, iclass 26, count 0 2006.229.05:19:00.85#ibcon#*mode == 0, iclass 26, count 0 2006.229.05:19:00.85#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.05:19:00.85#ibcon#[27=USB\r\n] 2006.229.05:19:00.85#ibcon#*before write, iclass 26, count 0 2006.229.05:19:00.85#ibcon#enter sib2, iclass 26, count 0 2006.229.05:19:00.85#ibcon#flushed, iclass 26, count 0 2006.229.05:19:00.85#ibcon#about to write, iclass 26, count 0 2006.229.05:19:00.85#ibcon#wrote, iclass 26, count 0 2006.229.05:19:00.85#ibcon#about to read 3, iclass 26, count 0 2006.229.05:19:00.88#ibcon#read 3, iclass 26, count 0 2006.229.05:19:00.88#ibcon#about to read 4, iclass 26, count 0 2006.229.05:19:00.88#ibcon#read 4, iclass 26, count 0 2006.229.05:19:00.88#ibcon#about to read 5, iclass 26, count 0 2006.229.05:19:00.88#ibcon#read 5, iclass 26, count 0 2006.229.05:19:00.88#ibcon#about to read 6, iclass 26, count 0 2006.229.05:19:00.88#ibcon#read 6, iclass 26, count 0 2006.229.05:19:00.88#ibcon#end of sib2, iclass 26, count 0 2006.229.05:19:00.88#ibcon#*after write, iclass 26, count 0 2006.229.05:19:00.88#ibcon#*before return 0, iclass 26, count 0 2006.229.05:19:00.88#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:19:00.88#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:19:00.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.05:19:00.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.05:19:00.88$vck44/vblo=4,679.99 2006.229.05:19:00.88#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.05:19:00.88#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.05:19:00.88#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:00.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:19:00.88#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:19:00.88#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:19:00.88#ibcon#enter wrdev, iclass 28, count 0 2006.229.05:19:00.88#ibcon#first serial, iclass 28, count 0 2006.229.05:19:00.88#ibcon#enter sib2, iclass 28, count 0 2006.229.05:19:00.88#ibcon#flushed, iclass 28, count 0 2006.229.05:19:00.88#ibcon#about to write, iclass 28, count 0 2006.229.05:19:00.88#ibcon#wrote, iclass 28, count 0 2006.229.05:19:00.88#ibcon#about to read 3, iclass 28, count 0 2006.229.05:19:00.90#ibcon#read 3, iclass 28, count 0 2006.229.05:19:00.90#ibcon#about to read 4, iclass 28, count 0 2006.229.05:19:00.90#ibcon#read 4, iclass 28, count 0 2006.229.05:19:00.90#ibcon#about to read 5, iclass 28, count 0 2006.229.05:19:00.90#ibcon#read 5, iclass 28, count 0 2006.229.05:19:00.90#ibcon#about to read 6, iclass 28, count 0 2006.229.05:19:00.90#ibcon#read 6, iclass 28, count 0 2006.229.05:19:00.90#ibcon#end of sib2, iclass 28, count 0 2006.229.05:19:00.90#ibcon#*mode == 0, iclass 28, count 0 2006.229.05:19:00.90#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.05:19:00.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:19:00.90#ibcon#*before write, iclass 28, count 0 2006.229.05:19:00.90#ibcon#enter sib2, iclass 28, count 0 2006.229.05:19:00.90#ibcon#flushed, iclass 28, count 0 2006.229.05:19:00.90#ibcon#about to write, iclass 28, count 0 2006.229.05:19:00.90#ibcon#wrote, iclass 28, count 0 2006.229.05:19:00.90#ibcon#about to read 3, iclass 28, count 0 2006.229.05:19:00.94#ibcon#read 3, iclass 28, count 0 2006.229.05:19:00.94#ibcon#about to read 4, iclass 28, count 0 2006.229.05:19:00.94#ibcon#read 4, iclass 28, count 0 2006.229.05:19:00.94#ibcon#about to read 5, iclass 28, count 0 2006.229.05:19:00.94#ibcon#read 5, iclass 28, count 0 2006.229.05:19:00.94#ibcon#about to read 6, iclass 28, count 0 2006.229.05:19:00.94#ibcon#read 6, iclass 28, count 0 2006.229.05:19:00.94#ibcon#end of sib2, iclass 28, count 0 2006.229.05:19:00.94#ibcon#*after write, iclass 28, count 0 2006.229.05:19:00.94#ibcon#*before return 0, iclass 28, count 0 2006.229.05:19:00.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:19:00.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:19:00.94#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.05:19:00.94#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.05:19:00.94$vck44/vb=4,4 2006.229.05:19:00.94#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.05:19:00.94#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.05:19:00.94#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:00.94#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:19:01.00#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:19:01.00#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:19:01.00#ibcon#enter wrdev, iclass 30, count 2 2006.229.05:19:01.00#ibcon#first serial, iclass 30, count 2 2006.229.05:19:01.00#ibcon#enter sib2, iclass 30, count 2 2006.229.05:19:01.00#ibcon#flushed, iclass 30, count 2 2006.229.05:19:01.00#ibcon#about to write, iclass 30, count 2 2006.229.05:19:01.00#ibcon#wrote, iclass 30, count 2 2006.229.05:19:01.00#ibcon#about to read 3, iclass 30, count 2 2006.229.05:19:01.02#ibcon#read 3, iclass 30, count 2 2006.229.05:19:01.02#ibcon#about to read 4, iclass 30, count 2 2006.229.05:19:01.02#ibcon#read 4, iclass 30, count 2 2006.229.05:19:01.02#ibcon#about to read 5, iclass 30, count 2 2006.229.05:19:01.02#ibcon#read 5, iclass 30, count 2 2006.229.05:19:01.02#ibcon#about to read 6, iclass 30, count 2 2006.229.05:19:01.02#ibcon#read 6, iclass 30, count 2 2006.229.05:19:01.02#ibcon#end of sib2, iclass 30, count 2 2006.229.05:19:01.02#ibcon#*mode == 0, iclass 30, count 2 2006.229.05:19:01.02#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.05:19:01.02#ibcon#[27=AT04-04\r\n] 2006.229.05:19:01.02#ibcon#*before write, iclass 30, count 2 2006.229.05:19:01.02#ibcon#enter sib2, iclass 30, count 2 2006.229.05:19:01.02#ibcon#flushed, iclass 30, count 2 2006.229.05:19:01.02#ibcon#about to write, iclass 30, count 2 2006.229.05:19:01.02#ibcon#wrote, iclass 30, count 2 2006.229.05:19:01.02#ibcon#about to read 3, iclass 30, count 2 2006.229.05:19:01.05#ibcon#read 3, iclass 30, count 2 2006.229.05:19:01.05#ibcon#about to read 4, iclass 30, count 2 2006.229.05:19:01.05#ibcon#read 4, iclass 30, count 2 2006.229.05:19:01.05#ibcon#about to read 5, iclass 30, count 2 2006.229.05:19:01.05#ibcon#read 5, iclass 30, count 2 2006.229.05:19:01.05#ibcon#about to read 6, iclass 30, count 2 2006.229.05:19:01.05#ibcon#read 6, iclass 30, count 2 2006.229.05:19:01.05#ibcon#end of sib2, iclass 30, count 2 2006.229.05:19:01.05#ibcon#*after write, iclass 30, count 2 2006.229.05:19:01.05#ibcon#*before return 0, iclass 30, count 2 2006.229.05:19:01.05#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:19:01.05#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:19:01.05#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.05:19:01.05#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:01.05#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:19:01.17#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:19:01.17#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:19:01.17#ibcon#enter wrdev, iclass 30, count 0 2006.229.05:19:01.17#ibcon#first serial, iclass 30, count 0 2006.229.05:19:01.17#ibcon#enter sib2, iclass 30, count 0 2006.229.05:19:01.17#ibcon#flushed, iclass 30, count 0 2006.229.05:19:01.17#ibcon#about to write, iclass 30, count 0 2006.229.05:19:01.17#ibcon#wrote, iclass 30, count 0 2006.229.05:19:01.17#ibcon#about to read 3, iclass 30, count 0 2006.229.05:19:01.19#ibcon#read 3, iclass 30, count 0 2006.229.05:19:01.19#ibcon#about to read 4, iclass 30, count 0 2006.229.05:19:01.19#ibcon#read 4, iclass 30, count 0 2006.229.05:19:01.19#ibcon#about to read 5, iclass 30, count 0 2006.229.05:19:01.19#ibcon#read 5, iclass 30, count 0 2006.229.05:19:01.19#ibcon#about to read 6, iclass 30, count 0 2006.229.05:19:01.19#ibcon#read 6, iclass 30, count 0 2006.229.05:19:01.19#ibcon#end of sib2, iclass 30, count 0 2006.229.05:19:01.19#ibcon#*mode == 0, iclass 30, count 0 2006.229.05:19:01.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.05:19:01.19#ibcon#[27=USB\r\n] 2006.229.05:19:01.19#ibcon#*before write, iclass 30, count 0 2006.229.05:19:01.19#ibcon#enter sib2, iclass 30, count 0 2006.229.05:19:01.19#ibcon#flushed, iclass 30, count 0 2006.229.05:19:01.19#ibcon#about to write, iclass 30, count 0 2006.229.05:19:01.19#ibcon#wrote, iclass 30, count 0 2006.229.05:19:01.19#ibcon#about to read 3, iclass 30, count 0 2006.229.05:19:01.22#ibcon#read 3, iclass 30, count 0 2006.229.05:19:01.22#ibcon#about to read 4, iclass 30, count 0 2006.229.05:19:01.22#ibcon#read 4, iclass 30, count 0 2006.229.05:19:01.22#ibcon#about to read 5, iclass 30, count 0 2006.229.05:19:01.22#ibcon#read 5, iclass 30, count 0 2006.229.05:19:01.22#ibcon#about to read 6, iclass 30, count 0 2006.229.05:19:01.22#ibcon#read 6, iclass 30, count 0 2006.229.05:19:01.22#ibcon#end of sib2, iclass 30, count 0 2006.229.05:19:01.22#ibcon#*after write, iclass 30, count 0 2006.229.05:19:01.22#ibcon#*before return 0, iclass 30, count 0 2006.229.05:19:01.22#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:19:01.22#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:19:01.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.05:19:01.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.05:19:01.22$vck44/vblo=5,709.99 2006.229.05:19:01.22#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.05:19:01.22#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.05:19:01.22#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:01.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:19:01.22#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:19:01.22#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:19:01.22#ibcon#enter wrdev, iclass 32, count 0 2006.229.05:19:01.22#ibcon#first serial, iclass 32, count 0 2006.229.05:19:01.22#ibcon#enter sib2, iclass 32, count 0 2006.229.05:19:01.22#ibcon#flushed, iclass 32, count 0 2006.229.05:19:01.22#ibcon#about to write, iclass 32, count 0 2006.229.05:19:01.22#ibcon#wrote, iclass 32, count 0 2006.229.05:19:01.22#ibcon#about to read 3, iclass 32, count 0 2006.229.05:19:01.24#ibcon#read 3, iclass 32, count 0 2006.229.05:19:01.24#ibcon#about to read 4, iclass 32, count 0 2006.229.05:19:01.24#ibcon#read 4, iclass 32, count 0 2006.229.05:19:01.24#ibcon#about to read 5, iclass 32, count 0 2006.229.05:19:01.24#ibcon#read 5, iclass 32, count 0 2006.229.05:19:01.24#ibcon#about to read 6, iclass 32, count 0 2006.229.05:19:01.24#ibcon#read 6, iclass 32, count 0 2006.229.05:19:01.24#ibcon#end of sib2, iclass 32, count 0 2006.229.05:19:01.24#ibcon#*mode == 0, iclass 32, count 0 2006.229.05:19:01.24#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.05:19:01.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:19:01.24#ibcon#*before write, iclass 32, count 0 2006.229.05:19:01.24#ibcon#enter sib2, iclass 32, count 0 2006.229.05:19:01.24#ibcon#flushed, iclass 32, count 0 2006.229.05:19:01.24#ibcon#about to write, iclass 32, count 0 2006.229.05:19:01.24#ibcon#wrote, iclass 32, count 0 2006.229.05:19:01.24#ibcon#about to read 3, iclass 32, count 0 2006.229.05:19:01.28#ibcon#read 3, iclass 32, count 0 2006.229.05:19:01.28#ibcon#about to read 4, iclass 32, count 0 2006.229.05:19:01.28#ibcon#read 4, iclass 32, count 0 2006.229.05:19:01.28#ibcon#about to read 5, iclass 32, count 0 2006.229.05:19:01.28#ibcon#read 5, iclass 32, count 0 2006.229.05:19:01.28#ibcon#about to read 6, iclass 32, count 0 2006.229.05:19:01.28#ibcon#read 6, iclass 32, count 0 2006.229.05:19:01.28#ibcon#end of sib2, iclass 32, count 0 2006.229.05:19:01.28#ibcon#*after write, iclass 32, count 0 2006.229.05:19:01.28#ibcon#*before return 0, iclass 32, count 0 2006.229.05:19:01.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:19:01.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:19:01.28#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.05:19:01.28#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.05:19:01.28$vck44/vb=5,4 2006.229.05:19:01.28#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.05:19:01.28#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.05:19:01.28#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:01.28#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:19:01.34#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:19:01.34#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:19:01.34#ibcon#enter wrdev, iclass 34, count 2 2006.229.05:19:01.34#ibcon#first serial, iclass 34, count 2 2006.229.05:19:01.34#ibcon#enter sib2, iclass 34, count 2 2006.229.05:19:01.34#ibcon#flushed, iclass 34, count 2 2006.229.05:19:01.34#ibcon#about to write, iclass 34, count 2 2006.229.05:19:01.34#ibcon#wrote, iclass 34, count 2 2006.229.05:19:01.34#ibcon#about to read 3, iclass 34, count 2 2006.229.05:19:01.36#ibcon#read 3, iclass 34, count 2 2006.229.05:19:01.36#ibcon#about to read 4, iclass 34, count 2 2006.229.05:19:01.36#ibcon#read 4, iclass 34, count 2 2006.229.05:19:01.36#ibcon#about to read 5, iclass 34, count 2 2006.229.05:19:01.36#ibcon#read 5, iclass 34, count 2 2006.229.05:19:01.36#ibcon#about to read 6, iclass 34, count 2 2006.229.05:19:01.36#ibcon#read 6, iclass 34, count 2 2006.229.05:19:01.36#ibcon#end of sib2, iclass 34, count 2 2006.229.05:19:01.36#ibcon#*mode == 0, iclass 34, count 2 2006.229.05:19:01.36#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.05:19:01.36#ibcon#[27=AT05-04\r\n] 2006.229.05:19:01.36#ibcon#*before write, iclass 34, count 2 2006.229.05:19:01.36#ibcon#enter sib2, iclass 34, count 2 2006.229.05:19:01.36#ibcon#flushed, iclass 34, count 2 2006.229.05:19:01.36#ibcon#about to write, iclass 34, count 2 2006.229.05:19:01.36#ibcon#wrote, iclass 34, count 2 2006.229.05:19:01.36#ibcon#about to read 3, iclass 34, count 2 2006.229.05:19:01.39#ibcon#read 3, iclass 34, count 2 2006.229.05:19:01.39#ibcon#about to read 4, iclass 34, count 2 2006.229.05:19:01.39#ibcon#read 4, iclass 34, count 2 2006.229.05:19:01.39#ibcon#about to read 5, iclass 34, count 2 2006.229.05:19:01.39#ibcon#read 5, iclass 34, count 2 2006.229.05:19:01.39#ibcon#about to read 6, iclass 34, count 2 2006.229.05:19:01.39#ibcon#read 6, iclass 34, count 2 2006.229.05:19:01.39#ibcon#end of sib2, iclass 34, count 2 2006.229.05:19:01.39#ibcon#*after write, iclass 34, count 2 2006.229.05:19:01.39#ibcon#*before return 0, iclass 34, count 2 2006.229.05:19:01.39#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:19:01.39#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:19:01.39#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.05:19:01.39#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:01.39#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:19:01.51#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:19:01.51#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:19:01.51#ibcon#enter wrdev, iclass 34, count 0 2006.229.05:19:01.51#ibcon#first serial, iclass 34, count 0 2006.229.05:19:01.51#ibcon#enter sib2, iclass 34, count 0 2006.229.05:19:01.51#ibcon#flushed, iclass 34, count 0 2006.229.05:19:01.51#ibcon#about to write, iclass 34, count 0 2006.229.05:19:01.51#ibcon#wrote, iclass 34, count 0 2006.229.05:19:01.51#ibcon#about to read 3, iclass 34, count 0 2006.229.05:19:01.53#ibcon#read 3, iclass 34, count 0 2006.229.05:19:01.53#ibcon#about to read 4, iclass 34, count 0 2006.229.05:19:01.53#ibcon#read 4, iclass 34, count 0 2006.229.05:19:01.53#ibcon#about to read 5, iclass 34, count 0 2006.229.05:19:01.53#ibcon#read 5, iclass 34, count 0 2006.229.05:19:01.53#ibcon#about to read 6, iclass 34, count 0 2006.229.05:19:01.53#ibcon#read 6, iclass 34, count 0 2006.229.05:19:01.53#ibcon#end of sib2, iclass 34, count 0 2006.229.05:19:01.53#ibcon#*mode == 0, iclass 34, count 0 2006.229.05:19:01.53#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.05:19:01.53#ibcon#[27=USB\r\n] 2006.229.05:19:01.53#ibcon#*before write, iclass 34, count 0 2006.229.05:19:01.53#ibcon#enter sib2, iclass 34, count 0 2006.229.05:19:01.53#ibcon#flushed, iclass 34, count 0 2006.229.05:19:01.53#ibcon#about to write, iclass 34, count 0 2006.229.05:19:01.53#ibcon#wrote, iclass 34, count 0 2006.229.05:19:01.53#ibcon#about to read 3, iclass 34, count 0 2006.229.05:19:01.56#ibcon#read 3, iclass 34, count 0 2006.229.05:19:01.56#ibcon#about to read 4, iclass 34, count 0 2006.229.05:19:01.56#ibcon#read 4, iclass 34, count 0 2006.229.05:19:01.56#ibcon#about to read 5, iclass 34, count 0 2006.229.05:19:01.56#ibcon#read 5, iclass 34, count 0 2006.229.05:19:01.56#ibcon#about to read 6, iclass 34, count 0 2006.229.05:19:01.56#ibcon#read 6, iclass 34, count 0 2006.229.05:19:01.56#ibcon#end of sib2, iclass 34, count 0 2006.229.05:19:01.56#ibcon#*after write, iclass 34, count 0 2006.229.05:19:01.56#ibcon#*before return 0, iclass 34, count 0 2006.229.05:19:01.56#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:19:01.56#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:19:01.56#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.05:19:01.56#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.05:19:01.56$vck44/vblo=6,719.99 2006.229.05:19:01.56#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.05:19:01.56#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.05:19:01.56#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:01.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:19:01.56#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:19:01.56#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:19:01.56#ibcon#enter wrdev, iclass 36, count 0 2006.229.05:19:01.56#ibcon#first serial, iclass 36, count 0 2006.229.05:19:01.56#ibcon#enter sib2, iclass 36, count 0 2006.229.05:19:01.56#ibcon#flushed, iclass 36, count 0 2006.229.05:19:01.56#ibcon#about to write, iclass 36, count 0 2006.229.05:19:01.56#ibcon#wrote, iclass 36, count 0 2006.229.05:19:01.56#ibcon#about to read 3, iclass 36, count 0 2006.229.05:19:01.58#ibcon#read 3, iclass 36, count 0 2006.229.05:19:01.58#ibcon#about to read 4, iclass 36, count 0 2006.229.05:19:01.58#ibcon#read 4, iclass 36, count 0 2006.229.05:19:01.58#ibcon#about to read 5, iclass 36, count 0 2006.229.05:19:01.58#ibcon#read 5, iclass 36, count 0 2006.229.05:19:01.58#ibcon#about to read 6, iclass 36, count 0 2006.229.05:19:01.58#ibcon#read 6, iclass 36, count 0 2006.229.05:19:01.58#ibcon#end of sib2, iclass 36, count 0 2006.229.05:19:01.58#ibcon#*mode == 0, iclass 36, count 0 2006.229.05:19:01.58#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.05:19:01.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:19:01.58#ibcon#*before write, iclass 36, count 0 2006.229.05:19:01.58#ibcon#enter sib2, iclass 36, count 0 2006.229.05:19:01.58#ibcon#flushed, iclass 36, count 0 2006.229.05:19:01.58#ibcon#about to write, iclass 36, count 0 2006.229.05:19:01.58#ibcon#wrote, iclass 36, count 0 2006.229.05:19:01.58#ibcon#about to read 3, iclass 36, count 0 2006.229.05:19:01.62#ibcon#read 3, iclass 36, count 0 2006.229.05:19:01.62#ibcon#about to read 4, iclass 36, count 0 2006.229.05:19:01.62#ibcon#read 4, iclass 36, count 0 2006.229.05:19:01.62#ibcon#about to read 5, iclass 36, count 0 2006.229.05:19:01.62#ibcon#read 5, iclass 36, count 0 2006.229.05:19:01.62#ibcon#about to read 6, iclass 36, count 0 2006.229.05:19:01.62#ibcon#read 6, iclass 36, count 0 2006.229.05:19:01.62#ibcon#end of sib2, iclass 36, count 0 2006.229.05:19:01.62#ibcon#*after write, iclass 36, count 0 2006.229.05:19:01.62#ibcon#*before return 0, iclass 36, count 0 2006.229.05:19:01.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:19:01.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:19:01.62#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.05:19:01.62#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.05:19:01.62$vck44/vb=6,4 2006.229.05:19:01.62#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.05:19:01.62#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.05:19:01.62#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:01.62#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:19:01.68#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:19:01.68#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:19:01.68#ibcon#enter wrdev, iclass 38, count 2 2006.229.05:19:01.68#ibcon#first serial, iclass 38, count 2 2006.229.05:19:01.68#ibcon#enter sib2, iclass 38, count 2 2006.229.05:19:01.68#ibcon#flushed, iclass 38, count 2 2006.229.05:19:01.68#ibcon#about to write, iclass 38, count 2 2006.229.05:19:01.68#ibcon#wrote, iclass 38, count 2 2006.229.05:19:01.68#ibcon#about to read 3, iclass 38, count 2 2006.229.05:19:01.70#ibcon#read 3, iclass 38, count 2 2006.229.05:19:01.70#ibcon#about to read 4, iclass 38, count 2 2006.229.05:19:01.70#ibcon#read 4, iclass 38, count 2 2006.229.05:19:01.70#ibcon#about to read 5, iclass 38, count 2 2006.229.05:19:01.70#ibcon#read 5, iclass 38, count 2 2006.229.05:19:01.70#ibcon#about to read 6, iclass 38, count 2 2006.229.05:19:01.70#ibcon#read 6, iclass 38, count 2 2006.229.05:19:01.70#ibcon#end of sib2, iclass 38, count 2 2006.229.05:19:01.70#ibcon#*mode == 0, iclass 38, count 2 2006.229.05:19:01.70#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.05:19:01.70#ibcon#[27=AT06-04\r\n] 2006.229.05:19:01.70#ibcon#*before write, iclass 38, count 2 2006.229.05:19:01.70#ibcon#enter sib2, iclass 38, count 2 2006.229.05:19:01.70#ibcon#flushed, iclass 38, count 2 2006.229.05:19:01.70#ibcon#about to write, iclass 38, count 2 2006.229.05:19:01.70#ibcon#wrote, iclass 38, count 2 2006.229.05:19:01.70#ibcon#about to read 3, iclass 38, count 2 2006.229.05:19:01.73#ibcon#read 3, iclass 38, count 2 2006.229.05:19:01.73#ibcon#about to read 4, iclass 38, count 2 2006.229.05:19:01.73#ibcon#read 4, iclass 38, count 2 2006.229.05:19:01.73#ibcon#about to read 5, iclass 38, count 2 2006.229.05:19:01.73#ibcon#read 5, iclass 38, count 2 2006.229.05:19:01.73#ibcon#about to read 6, iclass 38, count 2 2006.229.05:19:01.73#ibcon#read 6, iclass 38, count 2 2006.229.05:19:01.73#ibcon#end of sib2, iclass 38, count 2 2006.229.05:19:01.73#ibcon#*after write, iclass 38, count 2 2006.229.05:19:01.73#ibcon#*before return 0, iclass 38, count 2 2006.229.05:19:01.73#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:19:01.73#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:19:01.73#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.05:19:01.73#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:01.73#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:19:01.85#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:19:01.85#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:19:01.85#ibcon#enter wrdev, iclass 38, count 0 2006.229.05:19:01.85#ibcon#first serial, iclass 38, count 0 2006.229.05:19:01.85#ibcon#enter sib2, iclass 38, count 0 2006.229.05:19:01.85#ibcon#flushed, iclass 38, count 0 2006.229.05:19:01.85#ibcon#about to write, iclass 38, count 0 2006.229.05:19:01.85#ibcon#wrote, iclass 38, count 0 2006.229.05:19:01.85#ibcon#about to read 3, iclass 38, count 0 2006.229.05:19:01.87#ibcon#read 3, iclass 38, count 0 2006.229.05:19:01.87#ibcon#about to read 4, iclass 38, count 0 2006.229.05:19:01.87#ibcon#read 4, iclass 38, count 0 2006.229.05:19:01.87#ibcon#about to read 5, iclass 38, count 0 2006.229.05:19:01.87#ibcon#read 5, iclass 38, count 0 2006.229.05:19:01.87#ibcon#about to read 6, iclass 38, count 0 2006.229.05:19:01.87#ibcon#read 6, iclass 38, count 0 2006.229.05:19:01.87#ibcon#end of sib2, iclass 38, count 0 2006.229.05:19:01.87#ibcon#*mode == 0, iclass 38, count 0 2006.229.05:19:01.87#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.05:19:01.87#ibcon#[27=USB\r\n] 2006.229.05:19:01.87#ibcon#*before write, iclass 38, count 0 2006.229.05:19:01.87#ibcon#enter sib2, iclass 38, count 0 2006.229.05:19:01.87#ibcon#flushed, iclass 38, count 0 2006.229.05:19:01.87#ibcon#about to write, iclass 38, count 0 2006.229.05:19:01.87#ibcon#wrote, iclass 38, count 0 2006.229.05:19:01.87#ibcon#about to read 3, iclass 38, count 0 2006.229.05:19:01.90#ibcon#read 3, iclass 38, count 0 2006.229.05:19:01.90#ibcon#about to read 4, iclass 38, count 0 2006.229.05:19:01.90#ibcon#read 4, iclass 38, count 0 2006.229.05:19:01.90#ibcon#about to read 5, iclass 38, count 0 2006.229.05:19:01.90#ibcon#read 5, iclass 38, count 0 2006.229.05:19:01.90#ibcon#about to read 6, iclass 38, count 0 2006.229.05:19:01.90#ibcon#read 6, iclass 38, count 0 2006.229.05:19:01.90#ibcon#end of sib2, iclass 38, count 0 2006.229.05:19:01.90#ibcon#*after write, iclass 38, count 0 2006.229.05:19:01.90#ibcon#*before return 0, iclass 38, count 0 2006.229.05:19:01.90#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:19:01.90#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:19:01.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.05:19:01.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.05:19:01.90$vck44/vblo=7,734.99 2006.229.05:19:01.90#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.05:19:01.90#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.05:19:01.90#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:01.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:19:01.90#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:19:01.90#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:19:01.90#ibcon#enter wrdev, iclass 40, count 0 2006.229.05:19:01.90#ibcon#first serial, iclass 40, count 0 2006.229.05:19:01.90#ibcon#enter sib2, iclass 40, count 0 2006.229.05:19:01.90#ibcon#flushed, iclass 40, count 0 2006.229.05:19:01.90#ibcon#about to write, iclass 40, count 0 2006.229.05:19:01.90#ibcon#wrote, iclass 40, count 0 2006.229.05:19:01.90#ibcon#about to read 3, iclass 40, count 0 2006.229.05:19:01.92#ibcon#read 3, iclass 40, count 0 2006.229.05:19:01.92#ibcon#about to read 4, iclass 40, count 0 2006.229.05:19:01.92#ibcon#read 4, iclass 40, count 0 2006.229.05:19:01.92#ibcon#about to read 5, iclass 40, count 0 2006.229.05:19:01.92#ibcon#read 5, iclass 40, count 0 2006.229.05:19:01.92#ibcon#about to read 6, iclass 40, count 0 2006.229.05:19:01.92#ibcon#read 6, iclass 40, count 0 2006.229.05:19:01.92#ibcon#end of sib2, iclass 40, count 0 2006.229.05:19:01.92#ibcon#*mode == 0, iclass 40, count 0 2006.229.05:19:01.92#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.05:19:01.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:19:01.92#ibcon#*before write, iclass 40, count 0 2006.229.05:19:01.92#ibcon#enter sib2, iclass 40, count 0 2006.229.05:19:01.92#ibcon#flushed, iclass 40, count 0 2006.229.05:19:01.92#ibcon#about to write, iclass 40, count 0 2006.229.05:19:01.92#ibcon#wrote, iclass 40, count 0 2006.229.05:19:01.92#ibcon#about to read 3, iclass 40, count 0 2006.229.05:19:01.96#ibcon#read 3, iclass 40, count 0 2006.229.05:19:01.96#ibcon#about to read 4, iclass 40, count 0 2006.229.05:19:01.96#ibcon#read 4, iclass 40, count 0 2006.229.05:19:01.96#ibcon#about to read 5, iclass 40, count 0 2006.229.05:19:01.96#ibcon#read 5, iclass 40, count 0 2006.229.05:19:01.96#ibcon#about to read 6, iclass 40, count 0 2006.229.05:19:01.96#ibcon#read 6, iclass 40, count 0 2006.229.05:19:01.96#ibcon#end of sib2, iclass 40, count 0 2006.229.05:19:01.96#ibcon#*after write, iclass 40, count 0 2006.229.05:19:01.96#ibcon#*before return 0, iclass 40, count 0 2006.229.05:19:01.96#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:19:01.96#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:19:01.96#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.05:19:01.96#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.05:19:01.96$vck44/vb=7,4 2006.229.05:19:01.96#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.05:19:01.96#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.05:19:01.96#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:01.96#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:19:02.02#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:19:02.02#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:19:02.02#ibcon#enter wrdev, iclass 4, count 2 2006.229.05:19:02.02#ibcon#first serial, iclass 4, count 2 2006.229.05:19:02.02#ibcon#enter sib2, iclass 4, count 2 2006.229.05:19:02.02#ibcon#flushed, iclass 4, count 2 2006.229.05:19:02.02#ibcon#about to write, iclass 4, count 2 2006.229.05:19:02.02#ibcon#wrote, iclass 4, count 2 2006.229.05:19:02.02#ibcon#about to read 3, iclass 4, count 2 2006.229.05:19:02.04#ibcon#read 3, iclass 4, count 2 2006.229.05:19:02.04#ibcon#about to read 4, iclass 4, count 2 2006.229.05:19:02.04#ibcon#read 4, iclass 4, count 2 2006.229.05:19:02.04#ibcon#about to read 5, iclass 4, count 2 2006.229.05:19:02.04#ibcon#read 5, iclass 4, count 2 2006.229.05:19:02.04#ibcon#about to read 6, iclass 4, count 2 2006.229.05:19:02.04#ibcon#read 6, iclass 4, count 2 2006.229.05:19:02.04#ibcon#end of sib2, iclass 4, count 2 2006.229.05:19:02.04#ibcon#*mode == 0, iclass 4, count 2 2006.229.05:19:02.04#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.05:19:02.04#ibcon#[27=AT07-04\r\n] 2006.229.05:19:02.04#ibcon#*before write, iclass 4, count 2 2006.229.05:19:02.04#ibcon#enter sib2, iclass 4, count 2 2006.229.05:19:02.04#ibcon#flushed, iclass 4, count 2 2006.229.05:19:02.04#ibcon#about to write, iclass 4, count 2 2006.229.05:19:02.04#ibcon#wrote, iclass 4, count 2 2006.229.05:19:02.04#ibcon#about to read 3, iclass 4, count 2 2006.229.05:19:02.07#ibcon#read 3, iclass 4, count 2 2006.229.05:19:02.07#ibcon#about to read 4, iclass 4, count 2 2006.229.05:19:02.07#ibcon#read 4, iclass 4, count 2 2006.229.05:19:02.07#ibcon#about to read 5, iclass 4, count 2 2006.229.05:19:02.07#ibcon#read 5, iclass 4, count 2 2006.229.05:19:02.07#ibcon#about to read 6, iclass 4, count 2 2006.229.05:19:02.07#ibcon#read 6, iclass 4, count 2 2006.229.05:19:02.07#ibcon#end of sib2, iclass 4, count 2 2006.229.05:19:02.07#ibcon#*after write, iclass 4, count 2 2006.229.05:19:02.07#ibcon#*before return 0, iclass 4, count 2 2006.229.05:19:02.07#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:19:02.07#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:19:02.07#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.05:19:02.07#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:02.07#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:19:02.19#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:19:02.19#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:19:02.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.05:19:02.19#ibcon#first serial, iclass 4, count 0 2006.229.05:19:02.19#ibcon#enter sib2, iclass 4, count 0 2006.229.05:19:02.19#ibcon#flushed, iclass 4, count 0 2006.229.05:19:02.19#ibcon#about to write, iclass 4, count 0 2006.229.05:19:02.19#ibcon#wrote, iclass 4, count 0 2006.229.05:19:02.19#ibcon#about to read 3, iclass 4, count 0 2006.229.05:19:02.21#ibcon#read 3, iclass 4, count 0 2006.229.05:19:02.21#ibcon#about to read 4, iclass 4, count 0 2006.229.05:19:02.21#ibcon#read 4, iclass 4, count 0 2006.229.05:19:02.21#ibcon#about to read 5, iclass 4, count 0 2006.229.05:19:02.21#ibcon#read 5, iclass 4, count 0 2006.229.05:19:02.21#ibcon#about to read 6, iclass 4, count 0 2006.229.05:19:02.21#ibcon#read 6, iclass 4, count 0 2006.229.05:19:02.21#ibcon#end of sib2, iclass 4, count 0 2006.229.05:19:02.21#ibcon#*mode == 0, iclass 4, count 0 2006.229.05:19:02.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.05:19:02.21#ibcon#[27=USB\r\n] 2006.229.05:19:02.21#ibcon#*before write, iclass 4, count 0 2006.229.05:19:02.21#ibcon#enter sib2, iclass 4, count 0 2006.229.05:19:02.21#ibcon#flushed, iclass 4, count 0 2006.229.05:19:02.21#ibcon#about to write, iclass 4, count 0 2006.229.05:19:02.21#ibcon#wrote, iclass 4, count 0 2006.229.05:19:02.21#ibcon#about to read 3, iclass 4, count 0 2006.229.05:19:02.24#ibcon#read 3, iclass 4, count 0 2006.229.05:19:02.24#ibcon#about to read 4, iclass 4, count 0 2006.229.05:19:02.24#ibcon#read 4, iclass 4, count 0 2006.229.05:19:02.24#ibcon#about to read 5, iclass 4, count 0 2006.229.05:19:02.24#ibcon#read 5, iclass 4, count 0 2006.229.05:19:02.24#ibcon#about to read 6, iclass 4, count 0 2006.229.05:19:02.24#ibcon#read 6, iclass 4, count 0 2006.229.05:19:02.24#ibcon#end of sib2, iclass 4, count 0 2006.229.05:19:02.24#ibcon#*after write, iclass 4, count 0 2006.229.05:19:02.24#ibcon#*before return 0, iclass 4, count 0 2006.229.05:19:02.24#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:19:02.24#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:19:02.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.05:19:02.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.05:19:02.24$vck44/vblo=8,744.99 2006.229.05:19:02.24#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.05:19:02.24#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.05:19:02.24#ibcon#ireg 17 cls_cnt 0 2006.229.05:19:02.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:19:02.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:19:02.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:19:02.24#ibcon#enter wrdev, iclass 6, count 0 2006.229.05:19:02.24#ibcon#first serial, iclass 6, count 0 2006.229.05:19:02.24#ibcon#enter sib2, iclass 6, count 0 2006.229.05:19:02.24#ibcon#flushed, iclass 6, count 0 2006.229.05:19:02.24#ibcon#about to write, iclass 6, count 0 2006.229.05:19:02.24#ibcon#wrote, iclass 6, count 0 2006.229.05:19:02.24#ibcon#about to read 3, iclass 6, count 0 2006.229.05:19:02.26#ibcon#read 3, iclass 6, count 0 2006.229.05:19:02.26#ibcon#about to read 4, iclass 6, count 0 2006.229.05:19:02.26#ibcon#read 4, iclass 6, count 0 2006.229.05:19:02.26#ibcon#about to read 5, iclass 6, count 0 2006.229.05:19:02.26#ibcon#read 5, iclass 6, count 0 2006.229.05:19:02.26#ibcon#about to read 6, iclass 6, count 0 2006.229.05:19:02.26#ibcon#read 6, iclass 6, count 0 2006.229.05:19:02.26#ibcon#end of sib2, iclass 6, count 0 2006.229.05:19:02.26#ibcon#*mode == 0, iclass 6, count 0 2006.229.05:19:02.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.05:19:02.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:19:02.26#ibcon#*before write, iclass 6, count 0 2006.229.05:19:02.26#ibcon#enter sib2, iclass 6, count 0 2006.229.05:19:02.26#ibcon#flushed, iclass 6, count 0 2006.229.05:19:02.26#ibcon#about to write, iclass 6, count 0 2006.229.05:19:02.26#ibcon#wrote, iclass 6, count 0 2006.229.05:19:02.26#ibcon#about to read 3, iclass 6, count 0 2006.229.05:19:02.30#ibcon#read 3, iclass 6, count 0 2006.229.05:19:02.30#ibcon#about to read 4, iclass 6, count 0 2006.229.05:19:02.30#ibcon#read 4, iclass 6, count 0 2006.229.05:19:02.30#ibcon#about to read 5, iclass 6, count 0 2006.229.05:19:02.30#ibcon#read 5, iclass 6, count 0 2006.229.05:19:02.30#ibcon#about to read 6, iclass 6, count 0 2006.229.05:19:02.30#ibcon#read 6, iclass 6, count 0 2006.229.05:19:02.30#ibcon#end of sib2, iclass 6, count 0 2006.229.05:19:02.30#ibcon#*after write, iclass 6, count 0 2006.229.05:19:02.30#ibcon#*before return 0, iclass 6, count 0 2006.229.05:19:02.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:19:02.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:19:02.30#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.05:19:02.30#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.05:19:02.30$vck44/vb=8,4 2006.229.05:19:02.30#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.05:19:02.30#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.05:19:02.30#ibcon#ireg 11 cls_cnt 2 2006.229.05:19:02.30#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:19:02.36#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:19:02.36#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:19:02.36#ibcon#enter wrdev, iclass 10, count 2 2006.229.05:19:02.36#ibcon#first serial, iclass 10, count 2 2006.229.05:19:02.36#ibcon#enter sib2, iclass 10, count 2 2006.229.05:19:02.36#ibcon#flushed, iclass 10, count 2 2006.229.05:19:02.36#ibcon#about to write, iclass 10, count 2 2006.229.05:19:02.36#ibcon#wrote, iclass 10, count 2 2006.229.05:19:02.36#ibcon#about to read 3, iclass 10, count 2 2006.229.05:19:02.38#ibcon#read 3, iclass 10, count 2 2006.229.05:19:02.38#ibcon#about to read 4, iclass 10, count 2 2006.229.05:19:02.38#ibcon#read 4, iclass 10, count 2 2006.229.05:19:02.38#ibcon#about to read 5, iclass 10, count 2 2006.229.05:19:02.38#ibcon#read 5, iclass 10, count 2 2006.229.05:19:02.38#ibcon#about to read 6, iclass 10, count 2 2006.229.05:19:02.38#ibcon#read 6, iclass 10, count 2 2006.229.05:19:02.38#ibcon#end of sib2, iclass 10, count 2 2006.229.05:19:02.38#ibcon#*mode == 0, iclass 10, count 2 2006.229.05:19:02.38#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.05:19:02.38#ibcon#[27=AT08-04\r\n] 2006.229.05:19:02.38#ibcon#*before write, iclass 10, count 2 2006.229.05:19:02.38#ibcon#enter sib2, iclass 10, count 2 2006.229.05:19:02.38#ibcon#flushed, iclass 10, count 2 2006.229.05:19:02.38#ibcon#about to write, iclass 10, count 2 2006.229.05:19:02.38#ibcon#wrote, iclass 10, count 2 2006.229.05:19:02.38#ibcon#about to read 3, iclass 10, count 2 2006.229.05:19:02.41#ibcon#read 3, iclass 10, count 2 2006.229.05:19:02.41#ibcon#about to read 4, iclass 10, count 2 2006.229.05:19:02.41#ibcon#read 4, iclass 10, count 2 2006.229.05:19:02.41#ibcon#about to read 5, iclass 10, count 2 2006.229.05:19:02.41#ibcon#read 5, iclass 10, count 2 2006.229.05:19:02.41#ibcon#about to read 6, iclass 10, count 2 2006.229.05:19:02.41#ibcon#read 6, iclass 10, count 2 2006.229.05:19:02.41#ibcon#end of sib2, iclass 10, count 2 2006.229.05:19:02.41#ibcon#*after write, iclass 10, count 2 2006.229.05:19:02.41#ibcon#*before return 0, iclass 10, count 2 2006.229.05:19:02.41#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:19:02.41#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:19:02.41#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.05:19:02.41#ibcon#ireg 7 cls_cnt 0 2006.229.05:19:02.41#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:19:02.53#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:19:02.53#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:19:02.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.05:19:02.53#ibcon#first serial, iclass 10, count 0 2006.229.05:19:02.53#ibcon#enter sib2, iclass 10, count 0 2006.229.05:19:02.53#ibcon#flushed, iclass 10, count 0 2006.229.05:19:02.53#ibcon#about to write, iclass 10, count 0 2006.229.05:19:02.53#ibcon#wrote, iclass 10, count 0 2006.229.05:19:02.53#ibcon#about to read 3, iclass 10, count 0 2006.229.05:19:02.55#ibcon#read 3, iclass 10, count 0 2006.229.05:19:02.55#ibcon#about to read 4, iclass 10, count 0 2006.229.05:19:02.55#ibcon#read 4, iclass 10, count 0 2006.229.05:19:02.55#ibcon#about to read 5, iclass 10, count 0 2006.229.05:19:02.55#ibcon#read 5, iclass 10, count 0 2006.229.05:19:02.55#ibcon#about to read 6, iclass 10, count 0 2006.229.05:19:02.55#ibcon#read 6, iclass 10, count 0 2006.229.05:19:02.55#ibcon#end of sib2, iclass 10, count 0 2006.229.05:19:02.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.05:19:02.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.05:19:02.55#ibcon#[27=USB\r\n] 2006.229.05:19:02.55#ibcon#*before write, iclass 10, count 0 2006.229.05:19:02.55#ibcon#enter sib2, iclass 10, count 0 2006.229.05:19:02.55#ibcon#flushed, iclass 10, count 0 2006.229.05:19:02.55#ibcon#about to write, iclass 10, count 0 2006.229.05:19:02.55#ibcon#wrote, iclass 10, count 0 2006.229.05:19:02.55#ibcon#about to read 3, iclass 10, count 0 2006.229.05:19:02.58#ibcon#read 3, iclass 10, count 0 2006.229.05:19:02.58#ibcon#about to read 4, iclass 10, count 0 2006.229.05:19:02.58#ibcon#read 4, iclass 10, count 0 2006.229.05:19:02.58#ibcon#about to read 5, iclass 10, count 0 2006.229.05:19:02.58#ibcon#read 5, iclass 10, count 0 2006.229.05:19:02.58#ibcon#about to read 6, iclass 10, count 0 2006.229.05:19:02.58#ibcon#read 6, iclass 10, count 0 2006.229.05:19:02.58#ibcon#end of sib2, iclass 10, count 0 2006.229.05:19:02.58#ibcon#*after write, iclass 10, count 0 2006.229.05:19:02.58#ibcon#*before return 0, iclass 10, count 0 2006.229.05:19:02.58#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:19:02.58#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:19:02.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.05:19:02.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.05:19:02.58$vck44/vabw=wide 2006.229.05:19:02.58#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.05:19:02.58#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.05:19:02.58#ibcon#ireg 8 cls_cnt 0 2006.229.05:19:02.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:19:02.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:19:02.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:19:02.58#ibcon#enter wrdev, iclass 12, count 0 2006.229.05:19:02.58#ibcon#first serial, iclass 12, count 0 2006.229.05:19:02.58#ibcon#enter sib2, iclass 12, count 0 2006.229.05:19:02.58#ibcon#flushed, iclass 12, count 0 2006.229.05:19:02.58#ibcon#about to write, iclass 12, count 0 2006.229.05:19:02.58#ibcon#wrote, iclass 12, count 0 2006.229.05:19:02.58#ibcon#about to read 3, iclass 12, count 0 2006.229.05:19:02.60#ibcon#read 3, iclass 12, count 0 2006.229.05:19:02.60#ibcon#about to read 4, iclass 12, count 0 2006.229.05:19:02.60#ibcon#read 4, iclass 12, count 0 2006.229.05:19:02.60#ibcon#about to read 5, iclass 12, count 0 2006.229.05:19:02.60#ibcon#read 5, iclass 12, count 0 2006.229.05:19:02.60#ibcon#about to read 6, iclass 12, count 0 2006.229.05:19:02.60#ibcon#read 6, iclass 12, count 0 2006.229.05:19:02.60#ibcon#end of sib2, iclass 12, count 0 2006.229.05:19:02.60#ibcon#*mode == 0, iclass 12, count 0 2006.229.05:19:02.60#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.05:19:02.60#ibcon#[25=BW32\r\n] 2006.229.05:19:02.60#ibcon#*before write, iclass 12, count 0 2006.229.05:19:02.60#ibcon#enter sib2, iclass 12, count 0 2006.229.05:19:02.60#ibcon#flushed, iclass 12, count 0 2006.229.05:19:02.60#ibcon#about to write, iclass 12, count 0 2006.229.05:19:02.60#ibcon#wrote, iclass 12, count 0 2006.229.05:19:02.60#ibcon#about to read 3, iclass 12, count 0 2006.229.05:19:02.63#ibcon#read 3, iclass 12, count 0 2006.229.05:19:02.63#ibcon#about to read 4, iclass 12, count 0 2006.229.05:19:02.63#ibcon#read 4, iclass 12, count 0 2006.229.05:19:02.63#ibcon#about to read 5, iclass 12, count 0 2006.229.05:19:02.63#ibcon#read 5, iclass 12, count 0 2006.229.05:19:02.63#ibcon#about to read 6, iclass 12, count 0 2006.229.05:19:02.63#ibcon#read 6, iclass 12, count 0 2006.229.05:19:02.63#ibcon#end of sib2, iclass 12, count 0 2006.229.05:19:02.63#ibcon#*after write, iclass 12, count 0 2006.229.05:19:02.63#ibcon#*before return 0, iclass 12, count 0 2006.229.05:19:02.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:19:02.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:19:02.63#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.05:19:02.63#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.05:19:02.63$vck44/vbbw=wide 2006.229.05:19:02.63#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.05:19:02.63#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.05:19:02.63#ibcon#ireg 8 cls_cnt 0 2006.229.05:19:02.63#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:19:02.70#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:19:02.70#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:19:02.70#ibcon#enter wrdev, iclass 14, count 0 2006.229.05:19:02.70#ibcon#first serial, iclass 14, count 0 2006.229.05:19:02.70#ibcon#enter sib2, iclass 14, count 0 2006.229.05:19:02.70#ibcon#flushed, iclass 14, count 0 2006.229.05:19:02.70#ibcon#about to write, iclass 14, count 0 2006.229.05:19:02.70#ibcon#wrote, iclass 14, count 0 2006.229.05:19:02.70#ibcon#about to read 3, iclass 14, count 0 2006.229.05:19:02.72#ibcon#read 3, iclass 14, count 0 2006.229.05:19:02.72#ibcon#about to read 4, iclass 14, count 0 2006.229.05:19:02.72#ibcon#read 4, iclass 14, count 0 2006.229.05:19:02.72#ibcon#about to read 5, iclass 14, count 0 2006.229.05:19:02.72#ibcon#read 5, iclass 14, count 0 2006.229.05:19:02.72#ibcon#about to read 6, iclass 14, count 0 2006.229.05:19:02.72#ibcon#read 6, iclass 14, count 0 2006.229.05:19:02.72#ibcon#end of sib2, iclass 14, count 0 2006.229.05:19:02.72#ibcon#*mode == 0, iclass 14, count 0 2006.229.05:19:02.72#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.05:19:02.72#ibcon#[27=BW32\r\n] 2006.229.05:19:02.72#ibcon#*before write, iclass 14, count 0 2006.229.05:19:02.72#ibcon#enter sib2, iclass 14, count 0 2006.229.05:19:02.72#ibcon#flushed, iclass 14, count 0 2006.229.05:19:02.72#ibcon#about to write, iclass 14, count 0 2006.229.05:19:02.72#ibcon#wrote, iclass 14, count 0 2006.229.05:19:02.72#ibcon#about to read 3, iclass 14, count 0 2006.229.05:19:02.75#ibcon#read 3, iclass 14, count 0 2006.229.05:19:02.75#ibcon#about to read 4, iclass 14, count 0 2006.229.05:19:02.75#ibcon#read 4, iclass 14, count 0 2006.229.05:19:02.75#ibcon#about to read 5, iclass 14, count 0 2006.229.05:19:02.75#ibcon#read 5, iclass 14, count 0 2006.229.05:19:02.75#ibcon#about to read 6, iclass 14, count 0 2006.229.05:19:02.75#ibcon#read 6, iclass 14, count 0 2006.229.05:19:02.75#ibcon#end of sib2, iclass 14, count 0 2006.229.05:19:02.75#ibcon#*after write, iclass 14, count 0 2006.229.05:19:02.75#ibcon#*before return 0, iclass 14, count 0 2006.229.05:19:02.75#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:19:02.75#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:19:02.75#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.05:19:02.75#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.05:19:02.75$setupk4/ifdk4 2006.229.05:19:02.75$ifdk4/lo= 2006.229.05:19:02.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:19:02.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:19:02.75$ifdk4/patch= 2006.229.05:19:02.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:19:02.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:19:02.75$setupk4/!*+20s 2006.229.05:19:04.52#abcon#<5=/04 3.5 6.9 30.97 90 999.5\r\n> 2006.229.05:19:04.54#abcon#{5=INTERFACE CLEAR} 2006.229.05:19:04.60#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:19:14.69#abcon#<5=/04 3.4 6.9 30.97 90 999.5\r\n> 2006.229.05:19:14.71#abcon#{5=INTERFACE CLEAR} 2006.229.05:19:14.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:19:17.25$setupk4/"tpicd 2006.229.05:19:17.25$setupk4/echo=off 2006.229.05:19:17.25$setupk4/xlog=off 2006.229.05:19:17.25:!2006.229.05:23:13 2006.229.05:19:48.14#trakl#Source acquired 2006.229.05:19:50.14#flagr#flagr/antenna,acquired 2006.229.05:23:13.00:preob 2006.229.05:23:13.14/onsource/TRACKING 2006.229.05:23:13.14:!2006.229.05:23:23 2006.229.05:23:23.00:"tape 2006.229.05:23:23.00:"st=record 2006.229.05:23:23.00:data_valid=on 2006.229.05:23:23.00:midob 2006.229.05:23:23.14/onsource/TRACKING 2006.229.05:23:23.14/wx/30.92,999.5,89 2006.229.05:23:23.37/cable/+6.4004E-03 2006.229.05:23:24.46/va/01,08,usb,yes,39,42 2006.229.05:23:24.46/va/02,07,usb,yes,42,43 2006.229.05:23:24.46/va/03,06,usb,yes,52,55 2006.229.05:23:24.46/va/04,07,usb,yes,43,45 2006.229.05:23:24.46/va/05,04,usb,yes,39,39 2006.229.05:23:24.46/va/06,04,usb,yes,43,43 2006.229.05:23:24.46/va/07,05,usb,yes,39,39 2006.229.05:23:24.46/va/08,06,usb,yes,28,35 2006.229.05:23:24.69/valo/01,524.99,yes,locked 2006.229.05:23:24.69/valo/02,534.99,yes,locked 2006.229.05:23:24.69/valo/03,564.99,yes,locked 2006.229.05:23:24.69/valo/04,624.99,yes,locked 2006.229.05:23:24.69/valo/05,734.99,yes,locked 2006.229.05:23:24.69/valo/06,814.99,yes,locked 2006.229.05:23:24.69/valo/07,864.99,yes,locked 2006.229.05:23:24.69/valo/08,884.99,yes,locked 2006.229.05:23:25.78/vb/01,04,usb,yes,38,34 2006.229.05:23:25.78/vb/02,04,usb,yes,40,39 2006.229.05:23:25.78/vb/03,04,usb,yes,36,40 2006.229.05:23:25.78/vb/04,04,usb,yes,41,40 2006.229.05:23:25.78/vb/05,04,usb,yes,32,35 2006.229.05:23:25.78/vb/06,04,usb,yes,38,33 2006.229.05:23:25.78/vb/07,04,usb,yes,37,37 2006.229.05:23:25.78/vb/08,04,usb,yes,34,38 2006.229.05:23:26.02/vblo/01,629.99,yes,locked 2006.229.05:23:26.02/vblo/02,634.99,yes,locked 2006.229.05:23:26.02/vblo/03,649.99,yes,locked 2006.229.05:23:26.02/vblo/04,679.99,yes,locked 2006.229.05:23:26.02/vblo/05,709.99,yes,locked 2006.229.05:23:26.02/vblo/06,719.99,yes,locked 2006.229.05:23:26.02/vblo/07,734.99,yes,locked 2006.229.05:23:26.02/vblo/08,744.99,yes,locked 2006.229.05:23:26.17/vabw/8 2006.229.05:23:26.32/vbbw/8 2006.229.05:23:26.41/xfe/off,on,12.0 2006.229.05:23:26.80/ifatt/23,28,28,28 2006.229.05:23:27.08/fmout-gps/S +4.52E-07 2006.229.05:23:27.12:!2006.229.05:24:03 2006.229.05:24:03.01:data_valid=off 2006.229.05:24:03.01:"et 2006.229.05:24:03.02:!+3s 2006.229.05:24:06.03:"tape 2006.229.05:24:06.03:postob 2006.229.05:24:06.18/cable/+6.3991E-03 2006.229.05:24:06.18/wx/30.91,999.6,89 2006.229.05:24:06.24/fmout-gps/S +4.51E-07 2006.229.05:24:06.24:scan_name=229-0524,jd0608,60 2006.229.05:24:06.25:source=1622-253,162546.89,-252738.3,2000.0,cw 2006.229.05:24:08.14#flagr#flagr/antenna,new-source 2006.229.05:24:08.14:checkk5 2006.229.05:24:08.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:24:08.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:24:09.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:24:09.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:24:10.11/chk_obsdata//k5ts1/T2290523??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.05:24:10.51/chk_obsdata//k5ts2/T2290523??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.05:24:10.92/chk_obsdata//k5ts3/T2290523??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.05:24:11.34/chk_obsdata//k5ts4/T2290523??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.05:24:12.05/k5log//k5ts1_log_newline 2006.229.05:24:12.76/k5log//k5ts2_log_newline 2006.229.05:24:13.49/k5log//k5ts3_log_newline 2006.229.05:24:14.20/k5log//k5ts4_log_newline 2006.229.05:24:14.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:24:14.23:setupk4=1 2006.229.05:24:14.23$setupk4/echo=on 2006.229.05:24:14.23$setupk4/pcalon 2006.229.05:24:14.23$pcalon/"no phase cal control is implemented here 2006.229.05:24:14.23$setupk4/"tpicd=stop 2006.229.05:24:14.23$setupk4/"rec=synch_on 2006.229.05:24:14.23$setupk4/"rec_mode=128 2006.229.05:24:14.23$setupk4/!* 2006.229.05:24:14.23$setupk4/recpk4 2006.229.05:24:14.23$recpk4/recpatch= 2006.229.05:24:14.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:24:14.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:24:14.23$setupk4/vck44 2006.229.05:24:14.23$vck44/valo=1,524.99 2006.229.05:24:14.23#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:24:14.23#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:24:14.23#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:14.23#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:14.23#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:14.23#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:14.23#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:24:14.23#ibcon#first serial, iclass 35, count 0 2006.229.05:24:14.23#ibcon#enter sib2, iclass 35, count 0 2006.229.05:24:14.23#ibcon#flushed, iclass 35, count 0 2006.229.05:24:14.23#ibcon#about to write, iclass 35, count 0 2006.229.05:24:14.23#ibcon#wrote, iclass 35, count 0 2006.229.05:24:14.23#ibcon#about to read 3, iclass 35, count 0 2006.229.05:24:14.25#ibcon#read 3, iclass 35, count 0 2006.229.05:24:14.25#ibcon#about to read 4, iclass 35, count 0 2006.229.05:24:14.25#ibcon#read 4, iclass 35, count 0 2006.229.05:24:14.25#ibcon#about to read 5, iclass 35, count 0 2006.229.05:24:14.25#ibcon#read 5, iclass 35, count 0 2006.229.05:24:14.25#ibcon#about to read 6, iclass 35, count 0 2006.229.05:24:14.25#ibcon#read 6, iclass 35, count 0 2006.229.05:24:14.25#ibcon#end of sib2, iclass 35, count 0 2006.229.05:24:14.25#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:24:14.25#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:24:14.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:24:14.25#ibcon#*before write, iclass 35, count 0 2006.229.05:24:14.25#ibcon#enter sib2, iclass 35, count 0 2006.229.05:24:14.25#ibcon#flushed, iclass 35, count 0 2006.229.05:24:14.25#ibcon#about to write, iclass 35, count 0 2006.229.05:24:14.25#ibcon#wrote, iclass 35, count 0 2006.229.05:24:14.25#ibcon#about to read 3, iclass 35, count 0 2006.229.05:24:14.30#ibcon#read 3, iclass 35, count 0 2006.229.05:24:14.30#ibcon#about to read 4, iclass 35, count 0 2006.229.05:24:14.30#ibcon#read 4, iclass 35, count 0 2006.229.05:24:14.30#ibcon#about to read 5, iclass 35, count 0 2006.229.05:24:14.30#ibcon#read 5, iclass 35, count 0 2006.229.05:24:14.30#ibcon#about to read 6, iclass 35, count 0 2006.229.05:24:14.30#ibcon#read 6, iclass 35, count 0 2006.229.05:24:14.30#ibcon#end of sib2, iclass 35, count 0 2006.229.05:24:14.30#ibcon#*after write, iclass 35, count 0 2006.229.05:24:14.30#ibcon#*before return 0, iclass 35, count 0 2006.229.05:24:14.30#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:14.30#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:14.30#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:24:14.30#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:24:14.30$vck44/va=1,8 2006.229.05:24:14.30#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:24:14.30#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:24:14.30#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:14.30#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:14.30#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:14.30#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:14.30#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:24:14.30#ibcon#first serial, iclass 37, count 2 2006.229.05:24:14.30#ibcon#enter sib2, iclass 37, count 2 2006.229.05:24:14.30#ibcon#flushed, iclass 37, count 2 2006.229.05:24:14.30#ibcon#about to write, iclass 37, count 2 2006.229.05:24:14.30#ibcon#wrote, iclass 37, count 2 2006.229.05:24:14.30#ibcon#about to read 3, iclass 37, count 2 2006.229.05:24:14.32#ibcon#read 3, iclass 37, count 2 2006.229.05:24:14.32#ibcon#about to read 4, iclass 37, count 2 2006.229.05:24:14.32#ibcon#read 4, iclass 37, count 2 2006.229.05:24:14.32#ibcon#about to read 5, iclass 37, count 2 2006.229.05:24:14.32#ibcon#read 5, iclass 37, count 2 2006.229.05:24:14.32#ibcon#about to read 6, iclass 37, count 2 2006.229.05:24:14.32#ibcon#read 6, iclass 37, count 2 2006.229.05:24:14.32#ibcon#end of sib2, iclass 37, count 2 2006.229.05:24:14.32#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:24:14.32#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:24:14.32#ibcon#[25=AT01-08\r\n] 2006.229.05:24:14.32#ibcon#*before write, iclass 37, count 2 2006.229.05:24:14.32#ibcon#enter sib2, iclass 37, count 2 2006.229.05:24:14.32#ibcon#flushed, iclass 37, count 2 2006.229.05:24:14.32#ibcon#about to write, iclass 37, count 2 2006.229.05:24:14.32#ibcon#wrote, iclass 37, count 2 2006.229.05:24:14.32#ibcon#about to read 3, iclass 37, count 2 2006.229.05:24:14.35#ibcon#read 3, iclass 37, count 2 2006.229.05:24:14.35#ibcon#about to read 4, iclass 37, count 2 2006.229.05:24:14.35#ibcon#read 4, iclass 37, count 2 2006.229.05:24:14.35#ibcon#about to read 5, iclass 37, count 2 2006.229.05:24:14.35#ibcon#read 5, iclass 37, count 2 2006.229.05:24:14.35#ibcon#about to read 6, iclass 37, count 2 2006.229.05:24:14.35#ibcon#read 6, iclass 37, count 2 2006.229.05:24:14.35#ibcon#end of sib2, iclass 37, count 2 2006.229.05:24:14.35#ibcon#*after write, iclass 37, count 2 2006.229.05:24:14.35#ibcon#*before return 0, iclass 37, count 2 2006.229.05:24:14.35#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:14.35#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:14.35#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:24:14.35#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:14.35#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:14.47#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:14.47#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:14.47#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:24:14.47#ibcon#first serial, iclass 37, count 0 2006.229.05:24:14.47#ibcon#enter sib2, iclass 37, count 0 2006.229.05:24:14.47#ibcon#flushed, iclass 37, count 0 2006.229.05:24:14.47#ibcon#about to write, iclass 37, count 0 2006.229.05:24:14.47#ibcon#wrote, iclass 37, count 0 2006.229.05:24:14.47#ibcon#about to read 3, iclass 37, count 0 2006.229.05:24:14.49#ibcon#read 3, iclass 37, count 0 2006.229.05:24:14.49#ibcon#about to read 4, iclass 37, count 0 2006.229.05:24:14.49#ibcon#read 4, iclass 37, count 0 2006.229.05:24:14.49#ibcon#about to read 5, iclass 37, count 0 2006.229.05:24:14.49#ibcon#read 5, iclass 37, count 0 2006.229.05:24:14.49#ibcon#about to read 6, iclass 37, count 0 2006.229.05:24:14.49#ibcon#read 6, iclass 37, count 0 2006.229.05:24:14.49#ibcon#end of sib2, iclass 37, count 0 2006.229.05:24:14.49#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:24:14.49#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:24:14.49#ibcon#[25=USB\r\n] 2006.229.05:24:14.49#ibcon#*before write, iclass 37, count 0 2006.229.05:24:14.49#ibcon#enter sib2, iclass 37, count 0 2006.229.05:24:14.49#ibcon#flushed, iclass 37, count 0 2006.229.05:24:14.49#ibcon#about to write, iclass 37, count 0 2006.229.05:24:14.49#ibcon#wrote, iclass 37, count 0 2006.229.05:24:14.49#ibcon#about to read 3, iclass 37, count 0 2006.229.05:24:14.52#ibcon#read 3, iclass 37, count 0 2006.229.05:24:14.52#ibcon#about to read 4, iclass 37, count 0 2006.229.05:24:14.52#ibcon#read 4, iclass 37, count 0 2006.229.05:24:14.52#ibcon#about to read 5, iclass 37, count 0 2006.229.05:24:14.52#ibcon#read 5, iclass 37, count 0 2006.229.05:24:14.52#ibcon#about to read 6, iclass 37, count 0 2006.229.05:24:14.52#ibcon#read 6, iclass 37, count 0 2006.229.05:24:14.52#ibcon#end of sib2, iclass 37, count 0 2006.229.05:24:14.52#ibcon#*after write, iclass 37, count 0 2006.229.05:24:14.52#ibcon#*before return 0, iclass 37, count 0 2006.229.05:24:14.52#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:14.52#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:14.52#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:24:14.52#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:24:14.52$vck44/valo=2,534.99 2006.229.05:24:14.52#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:24:14.52#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:24:14.52#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:14.52#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:14.52#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:14.52#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:14.52#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:24:14.52#ibcon#first serial, iclass 39, count 0 2006.229.05:24:14.52#ibcon#enter sib2, iclass 39, count 0 2006.229.05:24:14.52#ibcon#flushed, iclass 39, count 0 2006.229.05:24:14.52#ibcon#about to write, iclass 39, count 0 2006.229.05:24:14.52#ibcon#wrote, iclass 39, count 0 2006.229.05:24:14.52#ibcon#about to read 3, iclass 39, count 0 2006.229.05:24:14.54#ibcon#read 3, iclass 39, count 0 2006.229.05:24:14.54#ibcon#about to read 4, iclass 39, count 0 2006.229.05:24:14.54#ibcon#read 4, iclass 39, count 0 2006.229.05:24:14.54#ibcon#about to read 5, iclass 39, count 0 2006.229.05:24:14.54#ibcon#read 5, iclass 39, count 0 2006.229.05:24:14.54#ibcon#about to read 6, iclass 39, count 0 2006.229.05:24:14.54#ibcon#read 6, iclass 39, count 0 2006.229.05:24:14.54#ibcon#end of sib2, iclass 39, count 0 2006.229.05:24:14.54#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:24:14.54#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:24:14.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:24:14.54#ibcon#*before write, iclass 39, count 0 2006.229.05:24:14.54#ibcon#enter sib2, iclass 39, count 0 2006.229.05:24:14.54#ibcon#flushed, iclass 39, count 0 2006.229.05:24:14.54#ibcon#about to write, iclass 39, count 0 2006.229.05:24:14.54#ibcon#wrote, iclass 39, count 0 2006.229.05:24:14.54#ibcon#about to read 3, iclass 39, count 0 2006.229.05:24:14.58#ibcon#read 3, iclass 39, count 0 2006.229.05:24:14.58#ibcon#about to read 4, iclass 39, count 0 2006.229.05:24:14.58#ibcon#read 4, iclass 39, count 0 2006.229.05:24:14.58#ibcon#about to read 5, iclass 39, count 0 2006.229.05:24:14.58#ibcon#read 5, iclass 39, count 0 2006.229.05:24:14.58#ibcon#about to read 6, iclass 39, count 0 2006.229.05:24:14.58#ibcon#read 6, iclass 39, count 0 2006.229.05:24:14.58#ibcon#end of sib2, iclass 39, count 0 2006.229.05:24:14.58#ibcon#*after write, iclass 39, count 0 2006.229.05:24:14.58#ibcon#*before return 0, iclass 39, count 0 2006.229.05:24:14.58#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:14.58#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:14.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:24:14.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:24:14.58$vck44/va=2,7 2006.229.05:24:14.58#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:24:14.58#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:24:14.58#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:14.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:14.64#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:14.64#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:14.64#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:24:14.64#ibcon#first serial, iclass 3, count 2 2006.229.05:24:14.64#ibcon#enter sib2, iclass 3, count 2 2006.229.05:24:14.64#ibcon#flushed, iclass 3, count 2 2006.229.05:24:14.64#ibcon#about to write, iclass 3, count 2 2006.229.05:24:14.64#ibcon#wrote, iclass 3, count 2 2006.229.05:24:14.64#ibcon#about to read 3, iclass 3, count 2 2006.229.05:24:14.66#ibcon#read 3, iclass 3, count 2 2006.229.05:24:14.66#ibcon#about to read 4, iclass 3, count 2 2006.229.05:24:14.66#ibcon#read 4, iclass 3, count 2 2006.229.05:24:14.66#ibcon#about to read 5, iclass 3, count 2 2006.229.05:24:14.66#ibcon#read 5, iclass 3, count 2 2006.229.05:24:14.66#ibcon#about to read 6, iclass 3, count 2 2006.229.05:24:14.66#ibcon#read 6, iclass 3, count 2 2006.229.05:24:14.66#ibcon#end of sib2, iclass 3, count 2 2006.229.05:24:14.66#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:24:14.66#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:24:14.66#ibcon#[25=AT02-07\r\n] 2006.229.05:24:14.66#ibcon#*before write, iclass 3, count 2 2006.229.05:24:14.66#ibcon#enter sib2, iclass 3, count 2 2006.229.05:24:14.66#ibcon#flushed, iclass 3, count 2 2006.229.05:24:14.66#ibcon#about to write, iclass 3, count 2 2006.229.05:24:14.66#ibcon#wrote, iclass 3, count 2 2006.229.05:24:14.66#ibcon#about to read 3, iclass 3, count 2 2006.229.05:24:14.69#ibcon#read 3, iclass 3, count 2 2006.229.05:24:14.69#ibcon#about to read 4, iclass 3, count 2 2006.229.05:24:14.69#ibcon#read 4, iclass 3, count 2 2006.229.05:24:14.69#ibcon#about to read 5, iclass 3, count 2 2006.229.05:24:14.69#ibcon#read 5, iclass 3, count 2 2006.229.05:24:14.69#ibcon#about to read 6, iclass 3, count 2 2006.229.05:24:14.69#ibcon#read 6, iclass 3, count 2 2006.229.05:24:14.69#ibcon#end of sib2, iclass 3, count 2 2006.229.05:24:14.69#ibcon#*after write, iclass 3, count 2 2006.229.05:24:14.69#ibcon#*before return 0, iclass 3, count 2 2006.229.05:24:14.69#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:14.69#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:14.69#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:24:14.69#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:14.69#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:14.81#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:14.81#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:14.81#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:24:14.81#ibcon#first serial, iclass 3, count 0 2006.229.05:24:14.81#ibcon#enter sib2, iclass 3, count 0 2006.229.05:24:14.81#ibcon#flushed, iclass 3, count 0 2006.229.05:24:14.81#ibcon#about to write, iclass 3, count 0 2006.229.05:24:14.81#ibcon#wrote, iclass 3, count 0 2006.229.05:24:14.81#ibcon#about to read 3, iclass 3, count 0 2006.229.05:24:14.83#ibcon#read 3, iclass 3, count 0 2006.229.05:24:14.83#ibcon#about to read 4, iclass 3, count 0 2006.229.05:24:14.83#ibcon#read 4, iclass 3, count 0 2006.229.05:24:14.83#ibcon#about to read 5, iclass 3, count 0 2006.229.05:24:14.83#ibcon#read 5, iclass 3, count 0 2006.229.05:24:14.83#ibcon#about to read 6, iclass 3, count 0 2006.229.05:24:14.83#ibcon#read 6, iclass 3, count 0 2006.229.05:24:14.83#ibcon#end of sib2, iclass 3, count 0 2006.229.05:24:14.83#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:24:14.83#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:24:14.83#ibcon#[25=USB\r\n] 2006.229.05:24:14.83#ibcon#*before write, iclass 3, count 0 2006.229.05:24:14.83#ibcon#enter sib2, iclass 3, count 0 2006.229.05:24:14.83#ibcon#flushed, iclass 3, count 0 2006.229.05:24:14.83#ibcon#about to write, iclass 3, count 0 2006.229.05:24:14.83#ibcon#wrote, iclass 3, count 0 2006.229.05:24:14.83#ibcon#about to read 3, iclass 3, count 0 2006.229.05:24:14.86#ibcon#read 3, iclass 3, count 0 2006.229.05:24:14.86#ibcon#about to read 4, iclass 3, count 0 2006.229.05:24:14.86#ibcon#read 4, iclass 3, count 0 2006.229.05:24:14.86#ibcon#about to read 5, iclass 3, count 0 2006.229.05:24:14.86#ibcon#read 5, iclass 3, count 0 2006.229.05:24:14.86#ibcon#about to read 6, iclass 3, count 0 2006.229.05:24:14.86#ibcon#read 6, iclass 3, count 0 2006.229.05:24:14.86#ibcon#end of sib2, iclass 3, count 0 2006.229.05:24:14.86#ibcon#*after write, iclass 3, count 0 2006.229.05:24:14.86#ibcon#*before return 0, iclass 3, count 0 2006.229.05:24:14.86#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:14.86#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:14.86#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:24:14.86#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:24:14.86$vck44/valo=3,564.99 2006.229.05:24:14.86#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:24:14.86#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:24:14.86#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:14.86#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:14.86#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:14.86#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:14.86#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:24:14.86#ibcon#first serial, iclass 5, count 0 2006.229.05:24:14.86#ibcon#enter sib2, iclass 5, count 0 2006.229.05:24:14.86#ibcon#flushed, iclass 5, count 0 2006.229.05:24:14.86#ibcon#about to write, iclass 5, count 0 2006.229.05:24:14.86#ibcon#wrote, iclass 5, count 0 2006.229.05:24:14.86#ibcon#about to read 3, iclass 5, count 0 2006.229.05:24:14.88#ibcon#read 3, iclass 5, count 0 2006.229.05:24:14.88#ibcon#about to read 4, iclass 5, count 0 2006.229.05:24:14.88#ibcon#read 4, iclass 5, count 0 2006.229.05:24:14.88#ibcon#about to read 5, iclass 5, count 0 2006.229.05:24:14.88#ibcon#read 5, iclass 5, count 0 2006.229.05:24:14.88#ibcon#about to read 6, iclass 5, count 0 2006.229.05:24:14.88#ibcon#read 6, iclass 5, count 0 2006.229.05:24:14.88#ibcon#end of sib2, iclass 5, count 0 2006.229.05:24:14.88#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:24:14.88#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:24:14.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:24:14.88#ibcon#*before write, iclass 5, count 0 2006.229.05:24:14.88#ibcon#enter sib2, iclass 5, count 0 2006.229.05:24:14.88#ibcon#flushed, iclass 5, count 0 2006.229.05:24:14.88#ibcon#about to write, iclass 5, count 0 2006.229.05:24:14.88#ibcon#wrote, iclass 5, count 0 2006.229.05:24:14.88#ibcon#about to read 3, iclass 5, count 0 2006.229.05:24:14.92#ibcon#read 3, iclass 5, count 0 2006.229.05:24:14.92#ibcon#about to read 4, iclass 5, count 0 2006.229.05:24:14.92#ibcon#read 4, iclass 5, count 0 2006.229.05:24:14.92#ibcon#about to read 5, iclass 5, count 0 2006.229.05:24:14.92#ibcon#read 5, iclass 5, count 0 2006.229.05:24:14.92#ibcon#about to read 6, iclass 5, count 0 2006.229.05:24:14.92#ibcon#read 6, iclass 5, count 0 2006.229.05:24:14.92#ibcon#end of sib2, iclass 5, count 0 2006.229.05:24:14.92#ibcon#*after write, iclass 5, count 0 2006.229.05:24:14.92#ibcon#*before return 0, iclass 5, count 0 2006.229.05:24:14.92#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:14.92#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:14.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:24:14.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:24:14.92$vck44/va=3,6 2006.229.05:24:14.92#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:24:14.92#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:24:14.92#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:14.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:14.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:14.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:14.98#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:24:14.98#ibcon#first serial, iclass 7, count 2 2006.229.05:24:14.98#ibcon#enter sib2, iclass 7, count 2 2006.229.05:24:14.98#ibcon#flushed, iclass 7, count 2 2006.229.05:24:14.98#ibcon#about to write, iclass 7, count 2 2006.229.05:24:14.98#ibcon#wrote, iclass 7, count 2 2006.229.05:24:14.98#ibcon#about to read 3, iclass 7, count 2 2006.229.05:24:15.00#ibcon#read 3, iclass 7, count 2 2006.229.05:24:15.00#ibcon#about to read 4, iclass 7, count 2 2006.229.05:24:15.00#ibcon#read 4, iclass 7, count 2 2006.229.05:24:15.00#ibcon#about to read 5, iclass 7, count 2 2006.229.05:24:15.00#ibcon#read 5, iclass 7, count 2 2006.229.05:24:15.00#ibcon#about to read 6, iclass 7, count 2 2006.229.05:24:15.00#ibcon#read 6, iclass 7, count 2 2006.229.05:24:15.00#ibcon#end of sib2, iclass 7, count 2 2006.229.05:24:15.00#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:24:15.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:24:15.00#ibcon#[25=AT03-06\r\n] 2006.229.05:24:15.00#ibcon#*before write, iclass 7, count 2 2006.229.05:24:15.00#ibcon#enter sib2, iclass 7, count 2 2006.229.05:24:15.00#ibcon#flushed, iclass 7, count 2 2006.229.05:24:15.00#ibcon#about to write, iclass 7, count 2 2006.229.05:24:15.00#ibcon#wrote, iclass 7, count 2 2006.229.05:24:15.00#ibcon#about to read 3, iclass 7, count 2 2006.229.05:24:15.03#ibcon#read 3, iclass 7, count 2 2006.229.05:24:15.03#ibcon#about to read 4, iclass 7, count 2 2006.229.05:24:15.03#ibcon#read 4, iclass 7, count 2 2006.229.05:24:15.03#ibcon#about to read 5, iclass 7, count 2 2006.229.05:24:15.03#ibcon#read 5, iclass 7, count 2 2006.229.05:24:15.03#ibcon#about to read 6, iclass 7, count 2 2006.229.05:24:15.03#ibcon#read 6, iclass 7, count 2 2006.229.05:24:15.03#ibcon#end of sib2, iclass 7, count 2 2006.229.05:24:15.03#ibcon#*after write, iclass 7, count 2 2006.229.05:24:15.03#ibcon#*before return 0, iclass 7, count 2 2006.229.05:24:15.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:15.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:15.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:24:15.03#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:15.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:15.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:15.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:15.15#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:24:15.15#ibcon#first serial, iclass 7, count 0 2006.229.05:24:15.15#ibcon#enter sib2, iclass 7, count 0 2006.229.05:24:15.15#ibcon#flushed, iclass 7, count 0 2006.229.05:24:15.15#ibcon#about to write, iclass 7, count 0 2006.229.05:24:15.15#ibcon#wrote, iclass 7, count 0 2006.229.05:24:15.15#ibcon#about to read 3, iclass 7, count 0 2006.229.05:24:15.17#ibcon#read 3, iclass 7, count 0 2006.229.05:24:15.17#ibcon#about to read 4, iclass 7, count 0 2006.229.05:24:15.17#ibcon#read 4, iclass 7, count 0 2006.229.05:24:15.17#ibcon#about to read 5, iclass 7, count 0 2006.229.05:24:15.17#ibcon#read 5, iclass 7, count 0 2006.229.05:24:15.17#ibcon#about to read 6, iclass 7, count 0 2006.229.05:24:15.17#ibcon#read 6, iclass 7, count 0 2006.229.05:24:15.17#ibcon#end of sib2, iclass 7, count 0 2006.229.05:24:15.17#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:24:15.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:24:15.17#ibcon#[25=USB\r\n] 2006.229.05:24:15.17#ibcon#*before write, iclass 7, count 0 2006.229.05:24:15.17#ibcon#enter sib2, iclass 7, count 0 2006.229.05:24:15.17#ibcon#flushed, iclass 7, count 0 2006.229.05:24:15.17#ibcon#about to write, iclass 7, count 0 2006.229.05:24:15.17#ibcon#wrote, iclass 7, count 0 2006.229.05:24:15.17#ibcon#about to read 3, iclass 7, count 0 2006.229.05:24:15.20#ibcon#read 3, iclass 7, count 0 2006.229.05:24:15.20#ibcon#about to read 4, iclass 7, count 0 2006.229.05:24:15.20#ibcon#read 4, iclass 7, count 0 2006.229.05:24:15.20#ibcon#about to read 5, iclass 7, count 0 2006.229.05:24:15.20#ibcon#read 5, iclass 7, count 0 2006.229.05:24:15.20#ibcon#about to read 6, iclass 7, count 0 2006.229.05:24:15.20#ibcon#read 6, iclass 7, count 0 2006.229.05:24:15.20#ibcon#end of sib2, iclass 7, count 0 2006.229.05:24:15.20#ibcon#*after write, iclass 7, count 0 2006.229.05:24:15.20#ibcon#*before return 0, iclass 7, count 0 2006.229.05:24:15.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:15.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:15.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:24:15.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:24:15.20$vck44/valo=4,624.99 2006.229.05:24:15.20#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:24:15.20#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:24:15.20#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:15.20#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:15.20#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:15.20#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:15.20#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:24:15.20#ibcon#first serial, iclass 11, count 0 2006.229.05:24:15.20#ibcon#enter sib2, iclass 11, count 0 2006.229.05:24:15.20#ibcon#flushed, iclass 11, count 0 2006.229.05:24:15.20#ibcon#about to write, iclass 11, count 0 2006.229.05:24:15.20#ibcon#wrote, iclass 11, count 0 2006.229.05:24:15.20#ibcon#about to read 3, iclass 11, count 0 2006.229.05:24:15.22#ibcon#read 3, iclass 11, count 0 2006.229.05:24:15.22#ibcon#about to read 4, iclass 11, count 0 2006.229.05:24:15.22#ibcon#read 4, iclass 11, count 0 2006.229.05:24:15.22#ibcon#about to read 5, iclass 11, count 0 2006.229.05:24:15.22#ibcon#read 5, iclass 11, count 0 2006.229.05:24:15.22#ibcon#about to read 6, iclass 11, count 0 2006.229.05:24:15.22#ibcon#read 6, iclass 11, count 0 2006.229.05:24:15.22#ibcon#end of sib2, iclass 11, count 0 2006.229.05:24:15.22#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:24:15.22#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:24:15.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:24:15.22#ibcon#*before write, iclass 11, count 0 2006.229.05:24:15.22#ibcon#enter sib2, iclass 11, count 0 2006.229.05:24:15.22#ibcon#flushed, iclass 11, count 0 2006.229.05:24:15.22#ibcon#about to write, iclass 11, count 0 2006.229.05:24:15.22#ibcon#wrote, iclass 11, count 0 2006.229.05:24:15.22#ibcon#about to read 3, iclass 11, count 0 2006.229.05:24:15.26#ibcon#read 3, iclass 11, count 0 2006.229.05:24:15.26#ibcon#about to read 4, iclass 11, count 0 2006.229.05:24:15.26#ibcon#read 4, iclass 11, count 0 2006.229.05:24:15.26#ibcon#about to read 5, iclass 11, count 0 2006.229.05:24:15.26#ibcon#read 5, iclass 11, count 0 2006.229.05:24:15.26#ibcon#about to read 6, iclass 11, count 0 2006.229.05:24:15.26#ibcon#read 6, iclass 11, count 0 2006.229.05:24:15.26#ibcon#end of sib2, iclass 11, count 0 2006.229.05:24:15.26#ibcon#*after write, iclass 11, count 0 2006.229.05:24:15.26#ibcon#*before return 0, iclass 11, count 0 2006.229.05:24:15.26#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:15.26#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:15.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:24:15.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:24:15.26$vck44/va=4,7 2006.229.05:24:15.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:24:15.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:24:15.26#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:15.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:15.32#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:15.32#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:15.32#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:24:15.32#ibcon#first serial, iclass 13, count 2 2006.229.05:24:15.32#ibcon#enter sib2, iclass 13, count 2 2006.229.05:24:15.32#ibcon#flushed, iclass 13, count 2 2006.229.05:24:15.32#ibcon#about to write, iclass 13, count 2 2006.229.05:24:15.32#ibcon#wrote, iclass 13, count 2 2006.229.05:24:15.32#ibcon#about to read 3, iclass 13, count 2 2006.229.05:24:15.34#ibcon#read 3, iclass 13, count 2 2006.229.05:24:15.34#ibcon#about to read 4, iclass 13, count 2 2006.229.05:24:15.34#ibcon#read 4, iclass 13, count 2 2006.229.05:24:15.34#ibcon#about to read 5, iclass 13, count 2 2006.229.05:24:15.34#ibcon#read 5, iclass 13, count 2 2006.229.05:24:15.34#ibcon#about to read 6, iclass 13, count 2 2006.229.05:24:15.34#ibcon#read 6, iclass 13, count 2 2006.229.05:24:15.34#ibcon#end of sib2, iclass 13, count 2 2006.229.05:24:15.34#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:24:15.34#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:24:15.34#ibcon#[25=AT04-07\r\n] 2006.229.05:24:15.34#ibcon#*before write, iclass 13, count 2 2006.229.05:24:15.34#ibcon#enter sib2, iclass 13, count 2 2006.229.05:24:15.34#ibcon#flushed, iclass 13, count 2 2006.229.05:24:15.34#ibcon#about to write, iclass 13, count 2 2006.229.05:24:15.34#ibcon#wrote, iclass 13, count 2 2006.229.05:24:15.34#ibcon#about to read 3, iclass 13, count 2 2006.229.05:24:15.37#ibcon#read 3, iclass 13, count 2 2006.229.05:24:15.37#ibcon#about to read 4, iclass 13, count 2 2006.229.05:24:15.37#ibcon#read 4, iclass 13, count 2 2006.229.05:24:15.37#ibcon#about to read 5, iclass 13, count 2 2006.229.05:24:15.37#ibcon#read 5, iclass 13, count 2 2006.229.05:24:15.37#ibcon#about to read 6, iclass 13, count 2 2006.229.05:24:15.37#ibcon#read 6, iclass 13, count 2 2006.229.05:24:15.37#ibcon#end of sib2, iclass 13, count 2 2006.229.05:24:15.37#ibcon#*after write, iclass 13, count 2 2006.229.05:24:15.37#ibcon#*before return 0, iclass 13, count 2 2006.229.05:24:15.37#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:15.37#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:15.37#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:24:15.37#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:15.37#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:15.49#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:15.49#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:15.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:24:15.49#ibcon#first serial, iclass 13, count 0 2006.229.05:24:15.49#ibcon#enter sib2, iclass 13, count 0 2006.229.05:24:15.49#ibcon#flushed, iclass 13, count 0 2006.229.05:24:15.49#ibcon#about to write, iclass 13, count 0 2006.229.05:24:15.49#ibcon#wrote, iclass 13, count 0 2006.229.05:24:15.49#ibcon#about to read 3, iclass 13, count 0 2006.229.05:24:15.51#ibcon#read 3, iclass 13, count 0 2006.229.05:24:15.51#ibcon#about to read 4, iclass 13, count 0 2006.229.05:24:15.51#ibcon#read 4, iclass 13, count 0 2006.229.05:24:15.51#ibcon#about to read 5, iclass 13, count 0 2006.229.05:24:15.51#ibcon#read 5, iclass 13, count 0 2006.229.05:24:15.51#ibcon#about to read 6, iclass 13, count 0 2006.229.05:24:15.51#ibcon#read 6, iclass 13, count 0 2006.229.05:24:15.51#ibcon#end of sib2, iclass 13, count 0 2006.229.05:24:15.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:24:15.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:24:15.51#ibcon#[25=USB\r\n] 2006.229.05:24:15.51#ibcon#*before write, iclass 13, count 0 2006.229.05:24:15.51#ibcon#enter sib2, iclass 13, count 0 2006.229.05:24:15.51#ibcon#flushed, iclass 13, count 0 2006.229.05:24:15.51#ibcon#about to write, iclass 13, count 0 2006.229.05:24:15.51#ibcon#wrote, iclass 13, count 0 2006.229.05:24:15.51#ibcon#about to read 3, iclass 13, count 0 2006.229.05:24:15.54#ibcon#read 3, iclass 13, count 0 2006.229.05:24:15.54#ibcon#about to read 4, iclass 13, count 0 2006.229.05:24:15.54#ibcon#read 4, iclass 13, count 0 2006.229.05:24:15.54#ibcon#about to read 5, iclass 13, count 0 2006.229.05:24:15.54#ibcon#read 5, iclass 13, count 0 2006.229.05:24:15.54#ibcon#about to read 6, iclass 13, count 0 2006.229.05:24:15.54#ibcon#read 6, iclass 13, count 0 2006.229.05:24:15.54#ibcon#end of sib2, iclass 13, count 0 2006.229.05:24:15.54#ibcon#*after write, iclass 13, count 0 2006.229.05:24:15.54#ibcon#*before return 0, iclass 13, count 0 2006.229.05:24:15.54#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:15.54#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:15.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:24:15.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:24:15.54$vck44/valo=5,734.99 2006.229.05:24:15.54#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:24:15.54#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:24:15.54#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:15.54#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:15.54#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:15.54#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:15.54#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:24:15.54#ibcon#first serial, iclass 15, count 0 2006.229.05:24:15.54#ibcon#enter sib2, iclass 15, count 0 2006.229.05:24:15.54#ibcon#flushed, iclass 15, count 0 2006.229.05:24:15.54#ibcon#about to write, iclass 15, count 0 2006.229.05:24:15.54#ibcon#wrote, iclass 15, count 0 2006.229.05:24:15.54#ibcon#about to read 3, iclass 15, count 0 2006.229.05:24:15.56#ibcon#read 3, iclass 15, count 0 2006.229.05:24:15.56#ibcon#about to read 4, iclass 15, count 0 2006.229.05:24:15.56#ibcon#read 4, iclass 15, count 0 2006.229.05:24:15.56#ibcon#about to read 5, iclass 15, count 0 2006.229.05:24:15.56#ibcon#read 5, iclass 15, count 0 2006.229.05:24:15.56#ibcon#about to read 6, iclass 15, count 0 2006.229.05:24:15.56#ibcon#read 6, iclass 15, count 0 2006.229.05:24:15.56#ibcon#end of sib2, iclass 15, count 0 2006.229.05:24:15.56#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:24:15.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:24:15.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:24:15.56#ibcon#*before write, iclass 15, count 0 2006.229.05:24:15.56#ibcon#enter sib2, iclass 15, count 0 2006.229.05:24:15.56#ibcon#flushed, iclass 15, count 0 2006.229.05:24:15.56#ibcon#about to write, iclass 15, count 0 2006.229.05:24:15.56#ibcon#wrote, iclass 15, count 0 2006.229.05:24:15.56#ibcon#about to read 3, iclass 15, count 0 2006.229.05:24:15.60#ibcon#read 3, iclass 15, count 0 2006.229.05:24:15.60#ibcon#about to read 4, iclass 15, count 0 2006.229.05:24:15.60#ibcon#read 4, iclass 15, count 0 2006.229.05:24:15.60#ibcon#about to read 5, iclass 15, count 0 2006.229.05:24:15.60#ibcon#read 5, iclass 15, count 0 2006.229.05:24:15.60#ibcon#about to read 6, iclass 15, count 0 2006.229.05:24:15.60#ibcon#read 6, iclass 15, count 0 2006.229.05:24:15.60#ibcon#end of sib2, iclass 15, count 0 2006.229.05:24:15.60#ibcon#*after write, iclass 15, count 0 2006.229.05:24:15.60#ibcon#*before return 0, iclass 15, count 0 2006.229.05:24:15.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:15.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:15.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:24:15.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:24:15.60$vck44/va=5,4 2006.229.05:24:15.60#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.05:24:15.60#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.05:24:15.60#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:15.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:15.66#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:15.66#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:15.66#ibcon#enter wrdev, iclass 17, count 2 2006.229.05:24:15.66#ibcon#first serial, iclass 17, count 2 2006.229.05:24:15.66#ibcon#enter sib2, iclass 17, count 2 2006.229.05:24:15.66#ibcon#flushed, iclass 17, count 2 2006.229.05:24:15.66#ibcon#about to write, iclass 17, count 2 2006.229.05:24:15.66#ibcon#wrote, iclass 17, count 2 2006.229.05:24:15.66#ibcon#about to read 3, iclass 17, count 2 2006.229.05:24:15.68#ibcon#read 3, iclass 17, count 2 2006.229.05:24:15.68#ibcon#about to read 4, iclass 17, count 2 2006.229.05:24:15.68#ibcon#read 4, iclass 17, count 2 2006.229.05:24:15.68#ibcon#about to read 5, iclass 17, count 2 2006.229.05:24:15.68#ibcon#read 5, iclass 17, count 2 2006.229.05:24:15.68#ibcon#about to read 6, iclass 17, count 2 2006.229.05:24:15.68#ibcon#read 6, iclass 17, count 2 2006.229.05:24:15.68#ibcon#end of sib2, iclass 17, count 2 2006.229.05:24:15.68#ibcon#*mode == 0, iclass 17, count 2 2006.229.05:24:15.68#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.05:24:15.68#ibcon#[25=AT05-04\r\n] 2006.229.05:24:15.68#ibcon#*before write, iclass 17, count 2 2006.229.05:24:15.68#ibcon#enter sib2, iclass 17, count 2 2006.229.05:24:15.68#ibcon#flushed, iclass 17, count 2 2006.229.05:24:15.68#ibcon#about to write, iclass 17, count 2 2006.229.05:24:15.68#ibcon#wrote, iclass 17, count 2 2006.229.05:24:15.68#ibcon#about to read 3, iclass 17, count 2 2006.229.05:24:15.71#ibcon#read 3, iclass 17, count 2 2006.229.05:24:15.71#ibcon#about to read 4, iclass 17, count 2 2006.229.05:24:15.71#ibcon#read 4, iclass 17, count 2 2006.229.05:24:15.71#ibcon#about to read 5, iclass 17, count 2 2006.229.05:24:15.71#ibcon#read 5, iclass 17, count 2 2006.229.05:24:15.71#ibcon#about to read 6, iclass 17, count 2 2006.229.05:24:15.71#ibcon#read 6, iclass 17, count 2 2006.229.05:24:15.71#ibcon#end of sib2, iclass 17, count 2 2006.229.05:24:15.71#ibcon#*after write, iclass 17, count 2 2006.229.05:24:15.71#ibcon#*before return 0, iclass 17, count 2 2006.229.05:24:15.71#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:15.71#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:15.71#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.05:24:15.71#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:15.71#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:15.83#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:15.83#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:15.83#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:24:15.83#ibcon#first serial, iclass 17, count 0 2006.229.05:24:15.83#ibcon#enter sib2, iclass 17, count 0 2006.229.05:24:15.83#ibcon#flushed, iclass 17, count 0 2006.229.05:24:15.83#ibcon#about to write, iclass 17, count 0 2006.229.05:24:15.83#ibcon#wrote, iclass 17, count 0 2006.229.05:24:15.83#ibcon#about to read 3, iclass 17, count 0 2006.229.05:24:15.85#ibcon#read 3, iclass 17, count 0 2006.229.05:24:15.85#ibcon#about to read 4, iclass 17, count 0 2006.229.05:24:15.85#ibcon#read 4, iclass 17, count 0 2006.229.05:24:15.85#ibcon#about to read 5, iclass 17, count 0 2006.229.05:24:15.85#ibcon#read 5, iclass 17, count 0 2006.229.05:24:15.85#ibcon#about to read 6, iclass 17, count 0 2006.229.05:24:15.85#ibcon#read 6, iclass 17, count 0 2006.229.05:24:15.85#ibcon#end of sib2, iclass 17, count 0 2006.229.05:24:15.85#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:24:15.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:24:15.85#ibcon#[25=USB\r\n] 2006.229.05:24:15.85#ibcon#*before write, iclass 17, count 0 2006.229.05:24:15.85#ibcon#enter sib2, iclass 17, count 0 2006.229.05:24:15.85#ibcon#flushed, iclass 17, count 0 2006.229.05:24:15.85#ibcon#about to write, iclass 17, count 0 2006.229.05:24:15.85#ibcon#wrote, iclass 17, count 0 2006.229.05:24:15.85#ibcon#about to read 3, iclass 17, count 0 2006.229.05:24:15.88#ibcon#read 3, iclass 17, count 0 2006.229.05:24:15.88#ibcon#about to read 4, iclass 17, count 0 2006.229.05:24:15.88#ibcon#read 4, iclass 17, count 0 2006.229.05:24:15.88#ibcon#about to read 5, iclass 17, count 0 2006.229.05:24:15.88#ibcon#read 5, iclass 17, count 0 2006.229.05:24:15.88#ibcon#about to read 6, iclass 17, count 0 2006.229.05:24:15.88#ibcon#read 6, iclass 17, count 0 2006.229.05:24:15.88#ibcon#end of sib2, iclass 17, count 0 2006.229.05:24:15.88#ibcon#*after write, iclass 17, count 0 2006.229.05:24:15.88#ibcon#*before return 0, iclass 17, count 0 2006.229.05:24:15.88#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:15.88#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:15.88#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:24:15.88#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:24:15.88$vck44/valo=6,814.99 2006.229.05:24:15.88#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.05:24:15.88#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.05:24:15.88#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:15.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:15.88#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:15.88#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:15.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:24:15.88#ibcon#first serial, iclass 19, count 0 2006.229.05:24:15.88#ibcon#enter sib2, iclass 19, count 0 2006.229.05:24:15.88#ibcon#flushed, iclass 19, count 0 2006.229.05:24:15.88#ibcon#about to write, iclass 19, count 0 2006.229.05:24:15.88#ibcon#wrote, iclass 19, count 0 2006.229.05:24:15.88#ibcon#about to read 3, iclass 19, count 0 2006.229.05:24:15.90#ibcon#read 3, iclass 19, count 0 2006.229.05:24:15.90#ibcon#about to read 4, iclass 19, count 0 2006.229.05:24:15.90#ibcon#read 4, iclass 19, count 0 2006.229.05:24:15.90#ibcon#about to read 5, iclass 19, count 0 2006.229.05:24:15.90#ibcon#read 5, iclass 19, count 0 2006.229.05:24:15.90#ibcon#about to read 6, iclass 19, count 0 2006.229.05:24:15.90#ibcon#read 6, iclass 19, count 0 2006.229.05:24:15.90#ibcon#end of sib2, iclass 19, count 0 2006.229.05:24:15.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:24:15.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:24:15.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:24:15.90#ibcon#*before write, iclass 19, count 0 2006.229.05:24:15.90#ibcon#enter sib2, iclass 19, count 0 2006.229.05:24:15.90#ibcon#flushed, iclass 19, count 0 2006.229.05:24:15.90#ibcon#about to write, iclass 19, count 0 2006.229.05:24:15.90#ibcon#wrote, iclass 19, count 0 2006.229.05:24:15.90#ibcon#about to read 3, iclass 19, count 0 2006.229.05:24:15.94#ibcon#read 3, iclass 19, count 0 2006.229.05:24:15.94#ibcon#about to read 4, iclass 19, count 0 2006.229.05:24:15.94#ibcon#read 4, iclass 19, count 0 2006.229.05:24:15.94#ibcon#about to read 5, iclass 19, count 0 2006.229.05:24:15.94#ibcon#read 5, iclass 19, count 0 2006.229.05:24:15.94#ibcon#about to read 6, iclass 19, count 0 2006.229.05:24:15.94#ibcon#read 6, iclass 19, count 0 2006.229.05:24:15.94#ibcon#end of sib2, iclass 19, count 0 2006.229.05:24:15.94#ibcon#*after write, iclass 19, count 0 2006.229.05:24:15.94#ibcon#*before return 0, iclass 19, count 0 2006.229.05:24:15.94#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:15.94#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:15.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:24:15.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:24:15.94$vck44/va=6,4 2006.229.05:24:15.94#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.05:24:15.94#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.05:24:15.94#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:15.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:16.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:16.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:16.00#ibcon#enter wrdev, iclass 21, count 2 2006.229.05:24:16.00#ibcon#first serial, iclass 21, count 2 2006.229.05:24:16.00#ibcon#enter sib2, iclass 21, count 2 2006.229.05:24:16.00#ibcon#flushed, iclass 21, count 2 2006.229.05:24:16.00#ibcon#about to write, iclass 21, count 2 2006.229.05:24:16.00#ibcon#wrote, iclass 21, count 2 2006.229.05:24:16.00#ibcon#about to read 3, iclass 21, count 2 2006.229.05:24:16.02#ibcon#read 3, iclass 21, count 2 2006.229.05:24:16.02#ibcon#about to read 4, iclass 21, count 2 2006.229.05:24:16.02#ibcon#read 4, iclass 21, count 2 2006.229.05:24:16.02#ibcon#about to read 5, iclass 21, count 2 2006.229.05:24:16.02#ibcon#read 5, iclass 21, count 2 2006.229.05:24:16.02#ibcon#about to read 6, iclass 21, count 2 2006.229.05:24:16.02#ibcon#read 6, iclass 21, count 2 2006.229.05:24:16.02#ibcon#end of sib2, iclass 21, count 2 2006.229.05:24:16.02#ibcon#*mode == 0, iclass 21, count 2 2006.229.05:24:16.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.05:24:16.02#ibcon#[25=AT06-04\r\n] 2006.229.05:24:16.02#ibcon#*before write, iclass 21, count 2 2006.229.05:24:16.02#ibcon#enter sib2, iclass 21, count 2 2006.229.05:24:16.02#ibcon#flushed, iclass 21, count 2 2006.229.05:24:16.02#ibcon#about to write, iclass 21, count 2 2006.229.05:24:16.02#ibcon#wrote, iclass 21, count 2 2006.229.05:24:16.02#ibcon#about to read 3, iclass 21, count 2 2006.229.05:24:16.05#ibcon#read 3, iclass 21, count 2 2006.229.05:24:16.05#ibcon#about to read 4, iclass 21, count 2 2006.229.05:24:16.05#ibcon#read 4, iclass 21, count 2 2006.229.05:24:16.05#ibcon#about to read 5, iclass 21, count 2 2006.229.05:24:16.05#ibcon#read 5, iclass 21, count 2 2006.229.05:24:16.05#ibcon#about to read 6, iclass 21, count 2 2006.229.05:24:16.05#ibcon#read 6, iclass 21, count 2 2006.229.05:24:16.05#ibcon#end of sib2, iclass 21, count 2 2006.229.05:24:16.05#ibcon#*after write, iclass 21, count 2 2006.229.05:24:16.05#ibcon#*before return 0, iclass 21, count 2 2006.229.05:24:16.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:16.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:16.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.05:24:16.05#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:16.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:16.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:16.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:16.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:24:16.17#ibcon#first serial, iclass 21, count 0 2006.229.05:24:16.17#ibcon#enter sib2, iclass 21, count 0 2006.229.05:24:16.17#ibcon#flushed, iclass 21, count 0 2006.229.05:24:16.17#ibcon#about to write, iclass 21, count 0 2006.229.05:24:16.17#ibcon#wrote, iclass 21, count 0 2006.229.05:24:16.17#ibcon#about to read 3, iclass 21, count 0 2006.229.05:24:16.19#ibcon#read 3, iclass 21, count 0 2006.229.05:24:16.19#ibcon#about to read 4, iclass 21, count 0 2006.229.05:24:16.19#ibcon#read 4, iclass 21, count 0 2006.229.05:24:16.19#ibcon#about to read 5, iclass 21, count 0 2006.229.05:24:16.19#ibcon#read 5, iclass 21, count 0 2006.229.05:24:16.19#ibcon#about to read 6, iclass 21, count 0 2006.229.05:24:16.19#ibcon#read 6, iclass 21, count 0 2006.229.05:24:16.19#ibcon#end of sib2, iclass 21, count 0 2006.229.05:24:16.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:24:16.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:24:16.19#ibcon#[25=USB\r\n] 2006.229.05:24:16.19#ibcon#*before write, iclass 21, count 0 2006.229.05:24:16.19#ibcon#enter sib2, iclass 21, count 0 2006.229.05:24:16.19#ibcon#flushed, iclass 21, count 0 2006.229.05:24:16.19#ibcon#about to write, iclass 21, count 0 2006.229.05:24:16.19#ibcon#wrote, iclass 21, count 0 2006.229.05:24:16.19#ibcon#about to read 3, iclass 21, count 0 2006.229.05:24:16.22#ibcon#read 3, iclass 21, count 0 2006.229.05:24:16.22#ibcon#about to read 4, iclass 21, count 0 2006.229.05:24:16.22#ibcon#read 4, iclass 21, count 0 2006.229.05:24:16.22#ibcon#about to read 5, iclass 21, count 0 2006.229.05:24:16.22#ibcon#read 5, iclass 21, count 0 2006.229.05:24:16.22#ibcon#about to read 6, iclass 21, count 0 2006.229.05:24:16.22#ibcon#read 6, iclass 21, count 0 2006.229.05:24:16.22#ibcon#end of sib2, iclass 21, count 0 2006.229.05:24:16.22#ibcon#*after write, iclass 21, count 0 2006.229.05:24:16.22#ibcon#*before return 0, iclass 21, count 0 2006.229.05:24:16.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:16.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:16.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:24:16.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:24:16.22$vck44/valo=7,864.99 2006.229.05:24:16.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:24:16.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:24:16.22#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:16.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:16.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:16.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:16.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:24:16.22#ibcon#first serial, iclass 23, count 0 2006.229.05:24:16.22#ibcon#enter sib2, iclass 23, count 0 2006.229.05:24:16.22#ibcon#flushed, iclass 23, count 0 2006.229.05:24:16.22#ibcon#about to write, iclass 23, count 0 2006.229.05:24:16.22#ibcon#wrote, iclass 23, count 0 2006.229.05:24:16.22#ibcon#about to read 3, iclass 23, count 0 2006.229.05:24:16.24#ibcon#read 3, iclass 23, count 0 2006.229.05:24:16.24#ibcon#about to read 4, iclass 23, count 0 2006.229.05:24:16.24#ibcon#read 4, iclass 23, count 0 2006.229.05:24:16.24#ibcon#about to read 5, iclass 23, count 0 2006.229.05:24:16.24#ibcon#read 5, iclass 23, count 0 2006.229.05:24:16.24#ibcon#about to read 6, iclass 23, count 0 2006.229.05:24:16.24#ibcon#read 6, iclass 23, count 0 2006.229.05:24:16.24#ibcon#end of sib2, iclass 23, count 0 2006.229.05:24:16.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:24:16.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:24:16.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:24:16.24#ibcon#*before write, iclass 23, count 0 2006.229.05:24:16.24#ibcon#enter sib2, iclass 23, count 0 2006.229.05:24:16.24#ibcon#flushed, iclass 23, count 0 2006.229.05:24:16.24#ibcon#about to write, iclass 23, count 0 2006.229.05:24:16.24#ibcon#wrote, iclass 23, count 0 2006.229.05:24:16.24#ibcon#about to read 3, iclass 23, count 0 2006.229.05:24:16.28#ibcon#read 3, iclass 23, count 0 2006.229.05:24:16.28#ibcon#about to read 4, iclass 23, count 0 2006.229.05:24:16.28#ibcon#read 4, iclass 23, count 0 2006.229.05:24:16.28#ibcon#about to read 5, iclass 23, count 0 2006.229.05:24:16.28#ibcon#read 5, iclass 23, count 0 2006.229.05:24:16.28#ibcon#about to read 6, iclass 23, count 0 2006.229.05:24:16.28#ibcon#read 6, iclass 23, count 0 2006.229.05:24:16.28#ibcon#end of sib2, iclass 23, count 0 2006.229.05:24:16.28#ibcon#*after write, iclass 23, count 0 2006.229.05:24:16.28#ibcon#*before return 0, iclass 23, count 0 2006.229.05:24:16.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:16.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:16.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:24:16.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:24:16.28$vck44/va=7,5 2006.229.05:24:16.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:24:16.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:24:16.28#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:16.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:16.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:16.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:16.34#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:24:16.34#ibcon#first serial, iclass 25, count 2 2006.229.05:24:16.34#ibcon#enter sib2, iclass 25, count 2 2006.229.05:24:16.34#ibcon#flushed, iclass 25, count 2 2006.229.05:24:16.34#ibcon#about to write, iclass 25, count 2 2006.229.05:24:16.34#ibcon#wrote, iclass 25, count 2 2006.229.05:24:16.34#ibcon#about to read 3, iclass 25, count 2 2006.229.05:24:16.36#ibcon#read 3, iclass 25, count 2 2006.229.05:24:16.36#ibcon#about to read 4, iclass 25, count 2 2006.229.05:24:16.36#ibcon#read 4, iclass 25, count 2 2006.229.05:24:16.36#ibcon#about to read 5, iclass 25, count 2 2006.229.05:24:16.36#ibcon#read 5, iclass 25, count 2 2006.229.05:24:16.36#ibcon#about to read 6, iclass 25, count 2 2006.229.05:24:16.36#ibcon#read 6, iclass 25, count 2 2006.229.05:24:16.36#ibcon#end of sib2, iclass 25, count 2 2006.229.05:24:16.36#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:24:16.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:24:16.36#ibcon#[25=AT07-05\r\n] 2006.229.05:24:16.36#ibcon#*before write, iclass 25, count 2 2006.229.05:24:16.36#ibcon#enter sib2, iclass 25, count 2 2006.229.05:24:16.36#ibcon#flushed, iclass 25, count 2 2006.229.05:24:16.36#ibcon#about to write, iclass 25, count 2 2006.229.05:24:16.36#ibcon#wrote, iclass 25, count 2 2006.229.05:24:16.36#ibcon#about to read 3, iclass 25, count 2 2006.229.05:24:16.39#ibcon#read 3, iclass 25, count 2 2006.229.05:24:16.39#ibcon#about to read 4, iclass 25, count 2 2006.229.05:24:16.39#ibcon#read 4, iclass 25, count 2 2006.229.05:24:16.39#ibcon#about to read 5, iclass 25, count 2 2006.229.05:24:16.39#ibcon#read 5, iclass 25, count 2 2006.229.05:24:16.39#ibcon#about to read 6, iclass 25, count 2 2006.229.05:24:16.39#ibcon#read 6, iclass 25, count 2 2006.229.05:24:16.39#ibcon#end of sib2, iclass 25, count 2 2006.229.05:24:16.39#ibcon#*after write, iclass 25, count 2 2006.229.05:24:16.39#ibcon#*before return 0, iclass 25, count 2 2006.229.05:24:16.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:16.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:16.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:24:16.39#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:16.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:16.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:16.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:16.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:24:16.51#ibcon#first serial, iclass 25, count 0 2006.229.05:24:16.51#ibcon#enter sib2, iclass 25, count 0 2006.229.05:24:16.51#ibcon#flushed, iclass 25, count 0 2006.229.05:24:16.51#ibcon#about to write, iclass 25, count 0 2006.229.05:24:16.51#ibcon#wrote, iclass 25, count 0 2006.229.05:24:16.51#ibcon#about to read 3, iclass 25, count 0 2006.229.05:24:16.53#ibcon#read 3, iclass 25, count 0 2006.229.05:24:16.53#ibcon#about to read 4, iclass 25, count 0 2006.229.05:24:16.53#ibcon#read 4, iclass 25, count 0 2006.229.05:24:16.53#ibcon#about to read 5, iclass 25, count 0 2006.229.05:24:16.53#ibcon#read 5, iclass 25, count 0 2006.229.05:24:16.53#ibcon#about to read 6, iclass 25, count 0 2006.229.05:24:16.53#ibcon#read 6, iclass 25, count 0 2006.229.05:24:16.53#ibcon#end of sib2, iclass 25, count 0 2006.229.05:24:16.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:24:16.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:24:16.53#ibcon#[25=USB\r\n] 2006.229.05:24:16.53#ibcon#*before write, iclass 25, count 0 2006.229.05:24:16.53#ibcon#enter sib2, iclass 25, count 0 2006.229.05:24:16.53#ibcon#flushed, iclass 25, count 0 2006.229.05:24:16.53#ibcon#about to write, iclass 25, count 0 2006.229.05:24:16.53#ibcon#wrote, iclass 25, count 0 2006.229.05:24:16.53#ibcon#about to read 3, iclass 25, count 0 2006.229.05:24:16.56#ibcon#read 3, iclass 25, count 0 2006.229.05:24:16.56#ibcon#about to read 4, iclass 25, count 0 2006.229.05:24:16.56#ibcon#read 4, iclass 25, count 0 2006.229.05:24:16.56#ibcon#about to read 5, iclass 25, count 0 2006.229.05:24:16.56#ibcon#read 5, iclass 25, count 0 2006.229.05:24:16.56#ibcon#about to read 6, iclass 25, count 0 2006.229.05:24:16.56#ibcon#read 6, iclass 25, count 0 2006.229.05:24:16.56#ibcon#end of sib2, iclass 25, count 0 2006.229.05:24:16.56#ibcon#*after write, iclass 25, count 0 2006.229.05:24:16.56#ibcon#*before return 0, iclass 25, count 0 2006.229.05:24:16.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:16.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:16.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:24:16.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:24:16.56$vck44/valo=8,884.99 2006.229.05:24:16.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:24:16.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:24:16.56#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:16.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:16.56#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:16.56#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:16.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:24:16.56#ibcon#first serial, iclass 27, count 0 2006.229.05:24:16.56#ibcon#enter sib2, iclass 27, count 0 2006.229.05:24:16.56#ibcon#flushed, iclass 27, count 0 2006.229.05:24:16.56#ibcon#about to write, iclass 27, count 0 2006.229.05:24:16.56#ibcon#wrote, iclass 27, count 0 2006.229.05:24:16.56#ibcon#about to read 3, iclass 27, count 0 2006.229.05:24:16.58#ibcon#read 3, iclass 27, count 0 2006.229.05:24:16.58#ibcon#about to read 4, iclass 27, count 0 2006.229.05:24:16.58#ibcon#read 4, iclass 27, count 0 2006.229.05:24:16.58#ibcon#about to read 5, iclass 27, count 0 2006.229.05:24:16.58#ibcon#read 5, iclass 27, count 0 2006.229.05:24:16.58#ibcon#about to read 6, iclass 27, count 0 2006.229.05:24:16.58#ibcon#read 6, iclass 27, count 0 2006.229.05:24:16.58#ibcon#end of sib2, iclass 27, count 0 2006.229.05:24:16.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:24:16.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:24:16.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:24:16.58#ibcon#*before write, iclass 27, count 0 2006.229.05:24:16.58#ibcon#enter sib2, iclass 27, count 0 2006.229.05:24:16.58#ibcon#flushed, iclass 27, count 0 2006.229.05:24:16.58#ibcon#about to write, iclass 27, count 0 2006.229.05:24:16.58#ibcon#wrote, iclass 27, count 0 2006.229.05:24:16.58#ibcon#about to read 3, iclass 27, count 0 2006.229.05:24:16.62#ibcon#read 3, iclass 27, count 0 2006.229.05:24:16.62#ibcon#about to read 4, iclass 27, count 0 2006.229.05:24:16.62#ibcon#read 4, iclass 27, count 0 2006.229.05:24:16.62#ibcon#about to read 5, iclass 27, count 0 2006.229.05:24:16.62#ibcon#read 5, iclass 27, count 0 2006.229.05:24:16.62#ibcon#about to read 6, iclass 27, count 0 2006.229.05:24:16.62#ibcon#read 6, iclass 27, count 0 2006.229.05:24:16.62#ibcon#end of sib2, iclass 27, count 0 2006.229.05:24:16.62#ibcon#*after write, iclass 27, count 0 2006.229.05:24:16.62#ibcon#*before return 0, iclass 27, count 0 2006.229.05:24:16.62#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:16.62#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:16.62#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:24:16.62#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:24:16.62$vck44/va=8,6 2006.229.05:24:16.62#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.05:24:16.62#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.05:24:16.62#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:16.62#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:24:16.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:24:16.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:24:16.68#ibcon#enter wrdev, iclass 29, count 2 2006.229.05:24:16.68#ibcon#first serial, iclass 29, count 2 2006.229.05:24:16.68#ibcon#enter sib2, iclass 29, count 2 2006.229.05:24:16.68#ibcon#flushed, iclass 29, count 2 2006.229.05:24:16.68#ibcon#about to write, iclass 29, count 2 2006.229.05:24:16.68#ibcon#wrote, iclass 29, count 2 2006.229.05:24:16.68#ibcon#about to read 3, iclass 29, count 2 2006.229.05:24:16.70#ibcon#read 3, iclass 29, count 2 2006.229.05:24:16.70#ibcon#about to read 4, iclass 29, count 2 2006.229.05:24:16.70#ibcon#read 4, iclass 29, count 2 2006.229.05:24:16.70#ibcon#about to read 5, iclass 29, count 2 2006.229.05:24:16.70#ibcon#read 5, iclass 29, count 2 2006.229.05:24:16.70#ibcon#about to read 6, iclass 29, count 2 2006.229.05:24:16.70#ibcon#read 6, iclass 29, count 2 2006.229.05:24:16.70#ibcon#end of sib2, iclass 29, count 2 2006.229.05:24:16.70#ibcon#*mode == 0, iclass 29, count 2 2006.229.05:24:16.70#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.05:24:16.70#ibcon#[25=AT08-06\r\n] 2006.229.05:24:16.70#ibcon#*before write, iclass 29, count 2 2006.229.05:24:16.70#ibcon#enter sib2, iclass 29, count 2 2006.229.05:24:16.70#ibcon#flushed, iclass 29, count 2 2006.229.05:24:16.70#ibcon#about to write, iclass 29, count 2 2006.229.05:24:16.70#ibcon#wrote, iclass 29, count 2 2006.229.05:24:16.70#ibcon#about to read 3, iclass 29, count 2 2006.229.05:24:16.73#ibcon#read 3, iclass 29, count 2 2006.229.05:24:16.73#ibcon#about to read 4, iclass 29, count 2 2006.229.05:24:16.73#ibcon#read 4, iclass 29, count 2 2006.229.05:24:16.73#ibcon#about to read 5, iclass 29, count 2 2006.229.05:24:16.73#ibcon#read 5, iclass 29, count 2 2006.229.05:24:16.73#ibcon#about to read 6, iclass 29, count 2 2006.229.05:24:16.73#ibcon#read 6, iclass 29, count 2 2006.229.05:24:16.73#ibcon#end of sib2, iclass 29, count 2 2006.229.05:24:16.73#ibcon#*after write, iclass 29, count 2 2006.229.05:24:16.73#ibcon#*before return 0, iclass 29, count 2 2006.229.05:24:16.73#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:24:16.73#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:24:16.73#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.05:24:16.73#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:16.73#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:24:16.85#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:24:16.85#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:24:16.85#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:24:16.85#ibcon#first serial, iclass 29, count 0 2006.229.05:24:16.85#ibcon#enter sib2, iclass 29, count 0 2006.229.05:24:16.85#ibcon#flushed, iclass 29, count 0 2006.229.05:24:16.85#ibcon#about to write, iclass 29, count 0 2006.229.05:24:16.85#ibcon#wrote, iclass 29, count 0 2006.229.05:24:16.85#ibcon#about to read 3, iclass 29, count 0 2006.229.05:24:16.87#ibcon#read 3, iclass 29, count 0 2006.229.05:24:16.87#ibcon#about to read 4, iclass 29, count 0 2006.229.05:24:16.87#ibcon#read 4, iclass 29, count 0 2006.229.05:24:16.87#ibcon#about to read 5, iclass 29, count 0 2006.229.05:24:16.87#ibcon#read 5, iclass 29, count 0 2006.229.05:24:16.87#ibcon#about to read 6, iclass 29, count 0 2006.229.05:24:16.87#ibcon#read 6, iclass 29, count 0 2006.229.05:24:16.87#ibcon#end of sib2, iclass 29, count 0 2006.229.05:24:16.87#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:24:16.87#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:24:16.87#ibcon#[25=USB\r\n] 2006.229.05:24:16.87#ibcon#*before write, iclass 29, count 0 2006.229.05:24:16.87#ibcon#enter sib2, iclass 29, count 0 2006.229.05:24:16.87#ibcon#flushed, iclass 29, count 0 2006.229.05:24:16.87#ibcon#about to write, iclass 29, count 0 2006.229.05:24:16.87#ibcon#wrote, iclass 29, count 0 2006.229.05:24:16.87#ibcon#about to read 3, iclass 29, count 0 2006.229.05:24:16.90#ibcon#read 3, iclass 29, count 0 2006.229.05:24:16.90#ibcon#about to read 4, iclass 29, count 0 2006.229.05:24:16.90#ibcon#read 4, iclass 29, count 0 2006.229.05:24:16.90#ibcon#about to read 5, iclass 29, count 0 2006.229.05:24:16.90#ibcon#read 5, iclass 29, count 0 2006.229.05:24:16.90#ibcon#about to read 6, iclass 29, count 0 2006.229.05:24:16.90#ibcon#read 6, iclass 29, count 0 2006.229.05:24:16.90#ibcon#end of sib2, iclass 29, count 0 2006.229.05:24:16.90#ibcon#*after write, iclass 29, count 0 2006.229.05:24:16.90#ibcon#*before return 0, iclass 29, count 0 2006.229.05:24:16.90#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:24:16.90#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:24:16.90#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:24:16.90#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:24:16.90$vck44/vblo=1,629.99 2006.229.05:24:16.90#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:24:16.90#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:24:16.90#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:16.90#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:24:16.90#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:24:16.90#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:24:16.90#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:24:16.90#ibcon#first serial, iclass 31, count 0 2006.229.05:24:16.90#ibcon#enter sib2, iclass 31, count 0 2006.229.05:24:16.90#ibcon#flushed, iclass 31, count 0 2006.229.05:24:16.90#ibcon#about to write, iclass 31, count 0 2006.229.05:24:16.90#ibcon#wrote, iclass 31, count 0 2006.229.05:24:16.90#ibcon#about to read 3, iclass 31, count 0 2006.229.05:24:16.92#ibcon#read 3, iclass 31, count 0 2006.229.05:24:16.92#ibcon#about to read 4, iclass 31, count 0 2006.229.05:24:16.92#ibcon#read 4, iclass 31, count 0 2006.229.05:24:16.92#ibcon#about to read 5, iclass 31, count 0 2006.229.05:24:16.92#ibcon#read 5, iclass 31, count 0 2006.229.05:24:16.92#ibcon#about to read 6, iclass 31, count 0 2006.229.05:24:16.92#ibcon#read 6, iclass 31, count 0 2006.229.05:24:16.92#ibcon#end of sib2, iclass 31, count 0 2006.229.05:24:16.92#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:24:16.92#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:24:16.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:24:16.92#ibcon#*before write, iclass 31, count 0 2006.229.05:24:16.92#ibcon#enter sib2, iclass 31, count 0 2006.229.05:24:16.92#ibcon#flushed, iclass 31, count 0 2006.229.05:24:16.92#ibcon#about to write, iclass 31, count 0 2006.229.05:24:16.92#ibcon#wrote, iclass 31, count 0 2006.229.05:24:16.92#ibcon#about to read 3, iclass 31, count 0 2006.229.05:24:16.96#ibcon#read 3, iclass 31, count 0 2006.229.05:24:16.96#ibcon#about to read 4, iclass 31, count 0 2006.229.05:24:16.96#ibcon#read 4, iclass 31, count 0 2006.229.05:24:16.96#ibcon#about to read 5, iclass 31, count 0 2006.229.05:24:16.96#ibcon#read 5, iclass 31, count 0 2006.229.05:24:16.96#ibcon#about to read 6, iclass 31, count 0 2006.229.05:24:16.96#ibcon#read 6, iclass 31, count 0 2006.229.05:24:16.96#ibcon#end of sib2, iclass 31, count 0 2006.229.05:24:16.96#ibcon#*after write, iclass 31, count 0 2006.229.05:24:16.96#ibcon#*before return 0, iclass 31, count 0 2006.229.05:24:16.96#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:24:16.96#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:24:16.96#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:24:16.96#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:24:16.96$vck44/vb=1,4 2006.229.05:24:16.96#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:24:16.96#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:24:16.96#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:16.96#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:24:16.96#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:24:16.96#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:24:16.96#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:24:16.96#ibcon#first serial, iclass 33, count 2 2006.229.05:24:16.96#ibcon#enter sib2, iclass 33, count 2 2006.229.05:24:16.96#ibcon#flushed, iclass 33, count 2 2006.229.05:24:16.96#ibcon#about to write, iclass 33, count 2 2006.229.05:24:16.96#ibcon#wrote, iclass 33, count 2 2006.229.05:24:16.96#ibcon#about to read 3, iclass 33, count 2 2006.229.05:24:16.98#ibcon#read 3, iclass 33, count 2 2006.229.05:24:16.98#ibcon#about to read 4, iclass 33, count 2 2006.229.05:24:16.98#ibcon#read 4, iclass 33, count 2 2006.229.05:24:16.98#ibcon#about to read 5, iclass 33, count 2 2006.229.05:24:16.98#ibcon#read 5, iclass 33, count 2 2006.229.05:24:16.98#ibcon#about to read 6, iclass 33, count 2 2006.229.05:24:16.98#ibcon#read 6, iclass 33, count 2 2006.229.05:24:16.98#ibcon#end of sib2, iclass 33, count 2 2006.229.05:24:16.98#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:24:16.98#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:24:16.98#ibcon#[27=AT01-04\r\n] 2006.229.05:24:16.98#ibcon#*before write, iclass 33, count 2 2006.229.05:24:16.98#ibcon#enter sib2, iclass 33, count 2 2006.229.05:24:16.98#ibcon#flushed, iclass 33, count 2 2006.229.05:24:16.98#ibcon#about to write, iclass 33, count 2 2006.229.05:24:16.98#ibcon#wrote, iclass 33, count 2 2006.229.05:24:16.98#ibcon#about to read 3, iclass 33, count 2 2006.229.05:24:17.01#ibcon#read 3, iclass 33, count 2 2006.229.05:24:17.01#ibcon#about to read 4, iclass 33, count 2 2006.229.05:24:17.01#ibcon#read 4, iclass 33, count 2 2006.229.05:24:17.01#ibcon#about to read 5, iclass 33, count 2 2006.229.05:24:17.01#ibcon#read 5, iclass 33, count 2 2006.229.05:24:17.01#ibcon#about to read 6, iclass 33, count 2 2006.229.05:24:17.01#ibcon#read 6, iclass 33, count 2 2006.229.05:24:17.01#ibcon#end of sib2, iclass 33, count 2 2006.229.05:24:17.01#ibcon#*after write, iclass 33, count 2 2006.229.05:24:17.01#ibcon#*before return 0, iclass 33, count 2 2006.229.05:24:17.01#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:24:17.01#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:24:17.01#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:24:17.01#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:17.01#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:24:17.13#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:24:17.13#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:24:17.13#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:24:17.13#ibcon#first serial, iclass 33, count 0 2006.229.05:24:17.13#ibcon#enter sib2, iclass 33, count 0 2006.229.05:24:17.13#ibcon#flushed, iclass 33, count 0 2006.229.05:24:17.13#ibcon#about to write, iclass 33, count 0 2006.229.05:24:17.13#ibcon#wrote, iclass 33, count 0 2006.229.05:24:17.13#ibcon#about to read 3, iclass 33, count 0 2006.229.05:24:17.15#ibcon#read 3, iclass 33, count 0 2006.229.05:24:17.15#ibcon#about to read 4, iclass 33, count 0 2006.229.05:24:17.15#ibcon#read 4, iclass 33, count 0 2006.229.05:24:17.15#ibcon#about to read 5, iclass 33, count 0 2006.229.05:24:17.15#ibcon#read 5, iclass 33, count 0 2006.229.05:24:17.15#ibcon#about to read 6, iclass 33, count 0 2006.229.05:24:17.15#ibcon#read 6, iclass 33, count 0 2006.229.05:24:17.15#ibcon#end of sib2, iclass 33, count 0 2006.229.05:24:17.15#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:24:17.15#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:24:17.15#ibcon#[27=USB\r\n] 2006.229.05:24:17.15#ibcon#*before write, iclass 33, count 0 2006.229.05:24:17.15#ibcon#enter sib2, iclass 33, count 0 2006.229.05:24:17.15#ibcon#flushed, iclass 33, count 0 2006.229.05:24:17.15#ibcon#about to write, iclass 33, count 0 2006.229.05:24:17.15#ibcon#wrote, iclass 33, count 0 2006.229.05:24:17.15#ibcon#about to read 3, iclass 33, count 0 2006.229.05:24:17.18#ibcon#read 3, iclass 33, count 0 2006.229.05:24:17.18#ibcon#about to read 4, iclass 33, count 0 2006.229.05:24:17.18#ibcon#read 4, iclass 33, count 0 2006.229.05:24:17.18#ibcon#about to read 5, iclass 33, count 0 2006.229.05:24:17.18#ibcon#read 5, iclass 33, count 0 2006.229.05:24:17.18#ibcon#about to read 6, iclass 33, count 0 2006.229.05:24:17.18#ibcon#read 6, iclass 33, count 0 2006.229.05:24:17.18#ibcon#end of sib2, iclass 33, count 0 2006.229.05:24:17.18#ibcon#*after write, iclass 33, count 0 2006.229.05:24:17.18#ibcon#*before return 0, iclass 33, count 0 2006.229.05:24:17.18#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:24:17.18#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:24:17.18#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:24:17.18#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:24:17.18$vck44/vblo=2,634.99 2006.229.05:24:17.18#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:24:17.18#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:24:17.18#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:17.18#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:17.18#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:17.18#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:17.18#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:24:17.18#ibcon#first serial, iclass 35, count 0 2006.229.05:24:17.18#ibcon#enter sib2, iclass 35, count 0 2006.229.05:24:17.18#ibcon#flushed, iclass 35, count 0 2006.229.05:24:17.18#ibcon#about to write, iclass 35, count 0 2006.229.05:24:17.18#ibcon#wrote, iclass 35, count 0 2006.229.05:24:17.18#ibcon#about to read 3, iclass 35, count 0 2006.229.05:24:17.20#ibcon#read 3, iclass 35, count 0 2006.229.05:24:17.20#ibcon#about to read 4, iclass 35, count 0 2006.229.05:24:17.20#ibcon#read 4, iclass 35, count 0 2006.229.05:24:17.20#ibcon#about to read 5, iclass 35, count 0 2006.229.05:24:17.20#ibcon#read 5, iclass 35, count 0 2006.229.05:24:17.20#ibcon#about to read 6, iclass 35, count 0 2006.229.05:24:17.20#ibcon#read 6, iclass 35, count 0 2006.229.05:24:17.20#ibcon#end of sib2, iclass 35, count 0 2006.229.05:24:17.20#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:24:17.20#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:24:17.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:24:17.20#ibcon#*before write, iclass 35, count 0 2006.229.05:24:17.20#ibcon#enter sib2, iclass 35, count 0 2006.229.05:24:17.20#ibcon#flushed, iclass 35, count 0 2006.229.05:24:17.20#ibcon#about to write, iclass 35, count 0 2006.229.05:24:17.20#ibcon#wrote, iclass 35, count 0 2006.229.05:24:17.20#ibcon#about to read 3, iclass 35, count 0 2006.229.05:24:17.24#ibcon#read 3, iclass 35, count 0 2006.229.05:24:17.24#ibcon#about to read 4, iclass 35, count 0 2006.229.05:24:17.24#ibcon#read 4, iclass 35, count 0 2006.229.05:24:17.24#ibcon#about to read 5, iclass 35, count 0 2006.229.05:24:17.24#ibcon#read 5, iclass 35, count 0 2006.229.05:24:17.24#ibcon#about to read 6, iclass 35, count 0 2006.229.05:24:17.24#ibcon#read 6, iclass 35, count 0 2006.229.05:24:17.24#ibcon#end of sib2, iclass 35, count 0 2006.229.05:24:17.24#ibcon#*after write, iclass 35, count 0 2006.229.05:24:17.24#ibcon#*before return 0, iclass 35, count 0 2006.229.05:24:17.24#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:17.24#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:24:17.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:24:17.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:24:17.24$vck44/vb=2,4 2006.229.05:24:17.24#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:24:17.24#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:24:17.24#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:17.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:17.30#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:17.30#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:17.30#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:24:17.30#ibcon#first serial, iclass 37, count 2 2006.229.05:24:17.30#ibcon#enter sib2, iclass 37, count 2 2006.229.05:24:17.30#ibcon#flushed, iclass 37, count 2 2006.229.05:24:17.30#ibcon#about to write, iclass 37, count 2 2006.229.05:24:17.30#ibcon#wrote, iclass 37, count 2 2006.229.05:24:17.30#ibcon#about to read 3, iclass 37, count 2 2006.229.05:24:17.32#ibcon#read 3, iclass 37, count 2 2006.229.05:24:17.32#ibcon#about to read 4, iclass 37, count 2 2006.229.05:24:17.32#ibcon#read 4, iclass 37, count 2 2006.229.05:24:17.32#ibcon#about to read 5, iclass 37, count 2 2006.229.05:24:17.32#ibcon#read 5, iclass 37, count 2 2006.229.05:24:17.32#ibcon#about to read 6, iclass 37, count 2 2006.229.05:24:17.32#ibcon#read 6, iclass 37, count 2 2006.229.05:24:17.32#ibcon#end of sib2, iclass 37, count 2 2006.229.05:24:17.32#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:24:17.32#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:24:17.32#ibcon#[27=AT02-04\r\n] 2006.229.05:24:17.32#ibcon#*before write, iclass 37, count 2 2006.229.05:24:17.32#ibcon#enter sib2, iclass 37, count 2 2006.229.05:24:17.32#ibcon#flushed, iclass 37, count 2 2006.229.05:24:17.32#ibcon#about to write, iclass 37, count 2 2006.229.05:24:17.32#ibcon#wrote, iclass 37, count 2 2006.229.05:24:17.32#ibcon#about to read 3, iclass 37, count 2 2006.229.05:24:17.35#ibcon#read 3, iclass 37, count 2 2006.229.05:24:17.35#ibcon#about to read 4, iclass 37, count 2 2006.229.05:24:17.35#ibcon#read 4, iclass 37, count 2 2006.229.05:24:17.35#ibcon#about to read 5, iclass 37, count 2 2006.229.05:24:17.35#ibcon#read 5, iclass 37, count 2 2006.229.05:24:17.35#ibcon#about to read 6, iclass 37, count 2 2006.229.05:24:17.35#ibcon#read 6, iclass 37, count 2 2006.229.05:24:17.35#ibcon#end of sib2, iclass 37, count 2 2006.229.05:24:17.35#ibcon#*after write, iclass 37, count 2 2006.229.05:24:17.35#ibcon#*before return 0, iclass 37, count 2 2006.229.05:24:17.35#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:17.35#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:24:17.35#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:24:17.35#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:17.35#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:17.47#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:17.47#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:17.47#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:24:17.47#ibcon#first serial, iclass 37, count 0 2006.229.05:24:17.47#ibcon#enter sib2, iclass 37, count 0 2006.229.05:24:17.47#ibcon#flushed, iclass 37, count 0 2006.229.05:24:17.47#ibcon#about to write, iclass 37, count 0 2006.229.05:24:17.47#ibcon#wrote, iclass 37, count 0 2006.229.05:24:17.47#ibcon#about to read 3, iclass 37, count 0 2006.229.05:24:17.49#ibcon#read 3, iclass 37, count 0 2006.229.05:24:17.49#ibcon#about to read 4, iclass 37, count 0 2006.229.05:24:17.49#ibcon#read 4, iclass 37, count 0 2006.229.05:24:17.49#ibcon#about to read 5, iclass 37, count 0 2006.229.05:24:17.49#ibcon#read 5, iclass 37, count 0 2006.229.05:24:17.49#ibcon#about to read 6, iclass 37, count 0 2006.229.05:24:17.49#ibcon#read 6, iclass 37, count 0 2006.229.05:24:17.49#ibcon#end of sib2, iclass 37, count 0 2006.229.05:24:17.49#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:24:17.49#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:24:17.49#ibcon#[27=USB\r\n] 2006.229.05:24:17.49#ibcon#*before write, iclass 37, count 0 2006.229.05:24:17.49#ibcon#enter sib2, iclass 37, count 0 2006.229.05:24:17.49#ibcon#flushed, iclass 37, count 0 2006.229.05:24:17.49#ibcon#about to write, iclass 37, count 0 2006.229.05:24:17.49#ibcon#wrote, iclass 37, count 0 2006.229.05:24:17.49#ibcon#about to read 3, iclass 37, count 0 2006.229.05:24:17.52#ibcon#read 3, iclass 37, count 0 2006.229.05:24:17.52#ibcon#about to read 4, iclass 37, count 0 2006.229.05:24:17.52#ibcon#read 4, iclass 37, count 0 2006.229.05:24:17.52#ibcon#about to read 5, iclass 37, count 0 2006.229.05:24:17.52#ibcon#read 5, iclass 37, count 0 2006.229.05:24:17.52#ibcon#about to read 6, iclass 37, count 0 2006.229.05:24:17.52#ibcon#read 6, iclass 37, count 0 2006.229.05:24:17.52#ibcon#end of sib2, iclass 37, count 0 2006.229.05:24:17.52#ibcon#*after write, iclass 37, count 0 2006.229.05:24:17.52#ibcon#*before return 0, iclass 37, count 0 2006.229.05:24:17.52#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:17.52#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:24:17.52#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:24:17.52#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:24:17.52$vck44/vblo=3,649.99 2006.229.05:24:17.52#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:24:17.52#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:24:17.52#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:17.52#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:17.52#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:17.52#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:17.52#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:24:17.52#ibcon#first serial, iclass 39, count 0 2006.229.05:24:17.52#ibcon#enter sib2, iclass 39, count 0 2006.229.05:24:17.52#ibcon#flushed, iclass 39, count 0 2006.229.05:24:17.52#ibcon#about to write, iclass 39, count 0 2006.229.05:24:17.52#ibcon#wrote, iclass 39, count 0 2006.229.05:24:17.52#ibcon#about to read 3, iclass 39, count 0 2006.229.05:24:17.54#ibcon#read 3, iclass 39, count 0 2006.229.05:24:17.54#ibcon#about to read 4, iclass 39, count 0 2006.229.05:24:17.54#ibcon#read 4, iclass 39, count 0 2006.229.05:24:17.54#ibcon#about to read 5, iclass 39, count 0 2006.229.05:24:17.54#ibcon#read 5, iclass 39, count 0 2006.229.05:24:17.54#ibcon#about to read 6, iclass 39, count 0 2006.229.05:24:17.54#ibcon#read 6, iclass 39, count 0 2006.229.05:24:17.54#ibcon#end of sib2, iclass 39, count 0 2006.229.05:24:17.54#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:24:17.54#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:24:17.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:24:17.54#ibcon#*before write, iclass 39, count 0 2006.229.05:24:17.54#ibcon#enter sib2, iclass 39, count 0 2006.229.05:24:17.54#ibcon#flushed, iclass 39, count 0 2006.229.05:24:17.54#ibcon#about to write, iclass 39, count 0 2006.229.05:24:17.54#ibcon#wrote, iclass 39, count 0 2006.229.05:24:17.54#ibcon#about to read 3, iclass 39, count 0 2006.229.05:24:17.58#ibcon#read 3, iclass 39, count 0 2006.229.05:24:17.58#ibcon#about to read 4, iclass 39, count 0 2006.229.05:24:17.58#ibcon#read 4, iclass 39, count 0 2006.229.05:24:17.58#ibcon#about to read 5, iclass 39, count 0 2006.229.05:24:17.58#ibcon#read 5, iclass 39, count 0 2006.229.05:24:17.58#ibcon#about to read 6, iclass 39, count 0 2006.229.05:24:17.58#ibcon#read 6, iclass 39, count 0 2006.229.05:24:17.58#ibcon#end of sib2, iclass 39, count 0 2006.229.05:24:17.58#ibcon#*after write, iclass 39, count 0 2006.229.05:24:17.58#ibcon#*before return 0, iclass 39, count 0 2006.229.05:24:17.58#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:17.58#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:24:17.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:24:17.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:24:17.58$vck44/vb=3,4 2006.229.05:24:17.58#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:24:17.58#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:24:17.58#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:17.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:17.64#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:17.64#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:17.64#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:24:17.64#ibcon#first serial, iclass 3, count 2 2006.229.05:24:17.64#ibcon#enter sib2, iclass 3, count 2 2006.229.05:24:17.64#ibcon#flushed, iclass 3, count 2 2006.229.05:24:17.64#ibcon#about to write, iclass 3, count 2 2006.229.05:24:17.64#ibcon#wrote, iclass 3, count 2 2006.229.05:24:17.64#ibcon#about to read 3, iclass 3, count 2 2006.229.05:24:17.66#ibcon#read 3, iclass 3, count 2 2006.229.05:24:17.66#ibcon#about to read 4, iclass 3, count 2 2006.229.05:24:17.66#ibcon#read 4, iclass 3, count 2 2006.229.05:24:17.66#ibcon#about to read 5, iclass 3, count 2 2006.229.05:24:17.66#ibcon#read 5, iclass 3, count 2 2006.229.05:24:17.66#ibcon#about to read 6, iclass 3, count 2 2006.229.05:24:17.66#ibcon#read 6, iclass 3, count 2 2006.229.05:24:17.66#ibcon#end of sib2, iclass 3, count 2 2006.229.05:24:17.66#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:24:17.66#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:24:17.66#ibcon#[27=AT03-04\r\n] 2006.229.05:24:17.66#ibcon#*before write, iclass 3, count 2 2006.229.05:24:17.66#ibcon#enter sib2, iclass 3, count 2 2006.229.05:24:17.66#ibcon#flushed, iclass 3, count 2 2006.229.05:24:17.66#ibcon#about to write, iclass 3, count 2 2006.229.05:24:17.66#ibcon#wrote, iclass 3, count 2 2006.229.05:24:17.66#ibcon#about to read 3, iclass 3, count 2 2006.229.05:24:17.69#ibcon#read 3, iclass 3, count 2 2006.229.05:24:17.69#ibcon#about to read 4, iclass 3, count 2 2006.229.05:24:17.69#ibcon#read 4, iclass 3, count 2 2006.229.05:24:17.69#ibcon#about to read 5, iclass 3, count 2 2006.229.05:24:17.69#ibcon#read 5, iclass 3, count 2 2006.229.05:24:17.69#ibcon#about to read 6, iclass 3, count 2 2006.229.05:24:17.69#ibcon#read 6, iclass 3, count 2 2006.229.05:24:17.69#ibcon#end of sib2, iclass 3, count 2 2006.229.05:24:17.69#ibcon#*after write, iclass 3, count 2 2006.229.05:24:17.69#ibcon#*before return 0, iclass 3, count 2 2006.229.05:24:17.69#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:17.69#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:24:17.69#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:24:17.69#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:17.69#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:17.81#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:17.81#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:17.81#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:24:17.81#ibcon#first serial, iclass 3, count 0 2006.229.05:24:17.81#ibcon#enter sib2, iclass 3, count 0 2006.229.05:24:17.81#ibcon#flushed, iclass 3, count 0 2006.229.05:24:17.81#ibcon#about to write, iclass 3, count 0 2006.229.05:24:17.81#ibcon#wrote, iclass 3, count 0 2006.229.05:24:17.81#ibcon#about to read 3, iclass 3, count 0 2006.229.05:24:17.83#ibcon#read 3, iclass 3, count 0 2006.229.05:24:17.83#ibcon#about to read 4, iclass 3, count 0 2006.229.05:24:17.83#ibcon#read 4, iclass 3, count 0 2006.229.05:24:17.83#ibcon#about to read 5, iclass 3, count 0 2006.229.05:24:17.83#ibcon#read 5, iclass 3, count 0 2006.229.05:24:17.83#ibcon#about to read 6, iclass 3, count 0 2006.229.05:24:17.83#ibcon#read 6, iclass 3, count 0 2006.229.05:24:17.83#ibcon#end of sib2, iclass 3, count 0 2006.229.05:24:17.83#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:24:17.83#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:24:17.83#ibcon#[27=USB\r\n] 2006.229.05:24:17.83#ibcon#*before write, iclass 3, count 0 2006.229.05:24:17.83#ibcon#enter sib2, iclass 3, count 0 2006.229.05:24:17.83#ibcon#flushed, iclass 3, count 0 2006.229.05:24:17.83#ibcon#about to write, iclass 3, count 0 2006.229.05:24:17.83#ibcon#wrote, iclass 3, count 0 2006.229.05:24:17.83#ibcon#about to read 3, iclass 3, count 0 2006.229.05:24:17.86#ibcon#read 3, iclass 3, count 0 2006.229.05:24:17.86#ibcon#about to read 4, iclass 3, count 0 2006.229.05:24:17.86#ibcon#read 4, iclass 3, count 0 2006.229.05:24:17.86#ibcon#about to read 5, iclass 3, count 0 2006.229.05:24:17.86#ibcon#read 5, iclass 3, count 0 2006.229.05:24:17.86#ibcon#about to read 6, iclass 3, count 0 2006.229.05:24:17.86#ibcon#read 6, iclass 3, count 0 2006.229.05:24:17.86#ibcon#end of sib2, iclass 3, count 0 2006.229.05:24:17.86#ibcon#*after write, iclass 3, count 0 2006.229.05:24:17.86#ibcon#*before return 0, iclass 3, count 0 2006.229.05:24:17.86#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:17.86#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:24:17.86#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:24:17.86#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:24:17.86$vck44/vblo=4,679.99 2006.229.05:24:17.86#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:24:17.86#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:24:17.86#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:17.86#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:17.86#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:17.86#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:17.86#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:24:17.86#ibcon#first serial, iclass 5, count 0 2006.229.05:24:17.86#ibcon#enter sib2, iclass 5, count 0 2006.229.05:24:17.86#ibcon#flushed, iclass 5, count 0 2006.229.05:24:17.86#ibcon#about to write, iclass 5, count 0 2006.229.05:24:17.86#ibcon#wrote, iclass 5, count 0 2006.229.05:24:17.86#ibcon#about to read 3, iclass 5, count 0 2006.229.05:24:17.88#ibcon#read 3, iclass 5, count 0 2006.229.05:24:17.88#ibcon#about to read 4, iclass 5, count 0 2006.229.05:24:17.88#ibcon#read 4, iclass 5, count 0 2006.229.05:24:17.88#ibcon#about to read 5, iclass 5, count 0 2006.229.05:24:17.88#ibcon#read 5, iclass 5, count 0 2006.229.05:24:17.88#ibcon#about to read 6, iclass 5, count 0 2006.229.05:24:17.88#ibcon#read 6, iclass 5, count 0 2006.229.05:24:17.88#ibcon#end of sib2, iclass 5, count 0 2006.229.05:24:17.88#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:24:17.88#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:24:17.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:24:17.88#ibcon#*before write, iclass 5, count 0 2006.229.05:24:17.88#ibcon#enter sib2, iclass 5, count 0 2006.229.05:24:17.88#ibcon#flushed, iclass 5, count 0 2006.229.05:24:17.88#ibcon#about to write, iclass 5, count 0 2006.229.05:24:17.88#ibcon#wrote, iclass 5, count 0 2006.229.05:24:17.88#ibcon#about to read 3, iclass 5, count 0 2006.229.05:24:17.92#ibcon#read 3, iclass 5, count 0 2006.229.05:24:17.92#ibcon#about to read 4, iclass 5, count 0 2006.229.05:24:17.92#ibcon#read 4, iclass 5, count 0 2006.229.05:24:17.92#ibcon#about to read 5, iclass 5, count 0 2006.229.05:24:17.92#ibcon#read 5, iclass 5, count 0 2006.229.05:24:17.92#ibcon#about to read 6, iclass 5, count 0 2006.229.05:24:17.92#ibcon#read 6, iclass 5, count 0 2006.229.05:24:17.92#ibcon#end of sib2, iclass 5, count 0 2006.229.05:24:17.92#ibcon#*after write, iclass 5, count 0 2006.229.05:24:17.92#ibcon#*before return 0, iclass 5, count 0 2006.229.05:24:17.92#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:17.92#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:24:17.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:24:17.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:24:17.92$vck44/vb=4,4 2006.229.05:24:17.92#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:24:17.92#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:24:17.92#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:17.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:17.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:17.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:17.98#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:24:17.98#ibcon#first serial, iclass 7, count 2 2006.229.05:24:17.98#ibcon#enter sib2, iclass 7, count 2 2006.229.05:24:17.98#ibcon#flushed, iclass 7, count 2 2006.229.05:24:17.98#ibcon#about to write, iclass 7, count 2 2006.229.05:24:17.98#ibcon#wrote, iclass 7, count 2 2006.229.05:24:17.98#ibcon#about to read 3, iclass 7, count 2 2006.229.05:24:18.00#ibcon#read 3, iclass 7, count 2 2006.229.05:24:18.00#ibcon#about to read 4, iclass 7, count 2 2006.229.05:24:18.00#ibcon#read 4, iclass 7, count 2 2006.229.05:24:18.00#ibcon#about to read 5, iclass 7, count 2 2006.229.05:24:18.00#ibcon#read 5, iclass 7, count 2 2006.229.05:24:18.00#ibcon#about to read 6, iclass 7, count 2 2006.229.05:24:18.00#ibcon#read 6, iclass 7, count 2 2006.229.05:24:18.00#ibcon#end of sib2, iclass 7, count 2 2006.229.05:24:18.00#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:24:18.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:24:18.00#ibcon#[27=AT04-04\r\n] 2006.229.05:24:18.00#ibcon#*before write, iclass 7, count 2 2006.229.05:24:18.00#ibcon#enter sib2, iclass 7, count 2 2006.229.05:24:18.00#ibcon#flushed, iclass 7, count 2 2006.229.05:24:18.00#ibcon#about to write, iclass 7, count 2 2006.229.05:24:18.00#ibcon#wrote, iclass 7, count 2 2006.229.05:24:18.00#ibcon#about to read 3, iclass 7, count 2 2006.229.05:24:18.03#ibcon#read 3, iclass 7, count 2 2006.229.05:24:18.03#ibcon#about to read 4, iclass 7, count 2 2006.229.05:24:18.03#ibcon#read 4, iclass 7, count 2 2006.229.05:24:18.03#ibcon#about to read 5, iclass 7, count 2 2006.229.05:24:18.03#ibcon#read 5, iclass 7, count 2 2006.229.05:24:18.03#ibcon#about to read 6, iclass 7, count 2 2006.229.05:24:18.03#ibcon#read 6, iclass 7, count 2 2006.229.05:24:18.03#ibcon#end of sib2, iclass 7, count 2 2006.229.05:24:18.03#ibcon#*after write, iclass 7, count 2 2006.229.05:24:18.03#ibcon#*before return 0, iclass 7, count 2 2006.229.05:24:18.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:18.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:24:18.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:24:18.03#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:18.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:18.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:18.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:18.15#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:24:18.15#ibcon#first serial, iclass 7, count 0 2006.229.05:24:18.15#ibcon#enter sib2, iclass 7, count 0 2006.229.05:24:18.15#ibcon#flushed, iclass 7, count 0 2006.229.05:24:18.15#ibcon#about to write, iclass 7, count 0 2006.229.05:24:18.15#ibcon#wrote, iclass 7, count 0 2006.229.05:24:18.15#ibcon#about to read 3, iclass 7, count 0 2006.229.05:24:18.17#ibcon#read 3, iclass 7, count 0 2006.229.05:24:18.17#ibcon#about to read 4, iclass 7, count 0 2006.229.05:24:18.17#ibcon#read 4, iclass 7, count 0 2006.229.05:24:18.17#ibcon#about to read 5, iclass 7, count 0 2006.229.05:24:18.17#ibcon#read 5, iclass 7, count 0 2006.229.05:24:18.17#ibcon#about to read 6, iclass 7, count 0 2006.229.05:24:18.17#ibcon#read 6, iclass 7, count 0 2006.229.05:24:18.17#ibcon#end of sib2, iclass 7, count 0 2006.229.05:24:18.17#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:24:18.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:24:18.17#ibcon#[27=USB\r\n] 2006.229.05:24:18.17#ibcon#*before write, iclass 7, count 0 2006.229.05:24:18.17#ibcon#enter sib2, iclass 7, count 0 2006.229.05:24:18.17#ibcon#flushed, iclass 7, count 0 2006.229.05:24:18.17#ibcon#about to write, iclass 7, count 0 2006.229.05:24:18.17#ibcon#wrote, iclass 7, count 0 2006.229.05:24:18.17#ibcon#about to read 3, iclass 7, count 0 2006.229.05:24:18.20#ibcon#read 3, iclass 7, count 0 2006.229.05:24:18.20#ibcon#about to read 4, iclass 7, count 0 2006.229.05:24:18.20#ibcon#read 4, iclass 7, count 0 2006.229.05:24:18.20#ibcon#about to read 5, iclass 7, count 0 2006.229.05:24:18.20#ibcon#read 5, iclass 7, count 0 2006.229.05:24:18.20#ibcon#about to read 6, iclass 7, count 0 2006.229.05:24:18.20#ibcon#read 6, iclass 7, count 0 2006.229.05:24:18.20#ibcon#end of sib2, iclass 7, count 0 2006.229.05:24:18.20#ibcon#*after write, iclass 7, count 0 2006.229.05:24:18.20#ibcon#*before return 0, iclass 7, count 0 2006.229.05:24:18.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:18.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:24:18.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:24:18.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:24:18.20$vck44/vblo=5,709.99 2006.229.05:24:18.20#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:24:18.20#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:24:18.20#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:18.20#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:18.20#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:18.20#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:18.20#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:24:18.20#ibcon#first serial, iclass 11, count 0 2006.229.05:24:18.20#ibcon#enter sib2, iclass 11, count 0 2006.229.05:24:18.20#ibcon#flushed, iclass 11, count 0 2006.229.05:24:18.20#ibcon#about to write, iclass 11, count 0 2006.229.05:24:18.20#ibcon#wrote, iclass 11, count 0 2006.229.05:24:18.20#ibcon#about to read 3, iclass 11, count 0 2006.229.05:24:18.22#ibcon#read 3, iclass 11, count 0 2006.229.05:24:18.22#ibcon#about to read 4, iclass 11, count 0 2006.229.05:24:18.22#ibcon#read 4, iclass 11, count 0 2006.229.05:24:18.22#ibcon#about to read 5, iclass 11, count 0 2006.229.05:24:18.22#ibcon#read 5, iclass 11, count 0 2006.229.05:24:18.22#ibcon#about to read 6, iclass 11, count 0 2006.229.05:24:18.22#ibcon#read 6, iclass 11, count 0 2006.229.05:24:18.22#ibcon#end of sib2, iclass 11, count 0 2006.229.05:24:18.22#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:24:18.22#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:24:18.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:24:18.22#ibcon#*before write, iclass 11, count 0 2006.229.05:24:18.22#ibcon#enter sib2, iclass 11, count 0 2006.229.05:24:18.22#ibcon#flushed, iclass 11, count 0 2006.229.05:24:18.22#ibcon#about to write, iclass 11, count 0 2006.229.05:24:18.22#ibcon#wrote, iclass 11, count 0 2006.229.05:24:18.22#ibcon#about to read 3, iclass 11, count 0 2006.229.05:24:18.26#ibcon#read 3, iclass 11, count 0 2006.229.05:24:18.26#ibcon#about to read 4, iclass 11, count 0 2006.229.05:24:18.26#ibcon#read 4, iclass 11, count 0 2006.229.05:24:18.26#ibcon#about to read 5, iclass 11, count 0 2006.229.05:24:18.26#ibcon#read 5, iclass 11, count 0 2006.229.05:24:18.26#ibcon#about to read 6, iclass 11, count 0 2006.229.05:24:18.26#ibcon#read 6, iclass 11, count 0 2006.229.05:24:18.26#ibcon#end of sib2, iclass 11, count 0 2006.229.05:24:18.26#ibcon#*after write, iclass 11, count 0 2006.229.05:24:18.26#ibcon#*before return 0, iclass 11, count 0 2006.229.05:24:18.26#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:18.26#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:24:18.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:24:18.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:24:18.26$vck44/vb=5,4 2006.229.05:24:18.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:24:18.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:24:18.26#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:18.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:18.32#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:18.32#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:18.32#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:24:18.32#ibcon#first serial, iclass 13, count 2 2006.229.05:24:18.32#ibcon#enter sib2, iclass 13, count 2 2006.229.05:24:18.32#ibcon#flushed, iclass 13, count 2 2006.229.05:24:18.32#ibcon#about to write, iclass 13, count 2 2006.229.05:24:18.32#ibcon#wrote, iclass 13, count 2 2006.229.05:24:18.32#ibcon#about to read 3, iclass 13, count 2 2006.229.05:24:18.34#ibcon#read 3, iclass 13, count 2 2006.229.05:24:18.34#ibcon#about to read 4, iclass 13, count 2 2006.229.05:24:18.34#ibcon#read 4, iclass 13, count 2 2006.229.05:24:18.34#ibcon#about to read 5, iclass 13, count 2 2006.229.05:24:18.34#ibcon#read 5, iclass 13, count 2 2006.229.05:24:18.34#ibcon#about to read 6, iclass 13, count 2 2006.229.05:24:18.34#ibcon#read 6, iclass 13, count 2 2006.229.05:24:18.34#ibcon#end of sib2, iclass 13, count 2 2006.229.05:24:18.34#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:24:18.34#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:24:18.34#ibcon#[27=AT05-04\r\n] 2006.229.05:24:18.34#ibcon#*before write, iclass 13, count 2 2006.229.05:24:18.34#ibcon#enter sib2, iclass 13, count 2 2006.229.05:24:18.34#ibcon#flushed, iclass 13, count 2 2006.229.05:24:18.34#ibcon#about to write, iclass 13, count 2 2006.229.05:24:18.34#ibcon#wrote, iclass 13, count 2 2006.229.05:24:18.34#ibcon#about to read 3, iclass 13, count 2 2006.229.05:24:18.37#ibcon#read 3, iclass 13, count 2 2006.229.05:24:18.37#ibcon#about to read 4, iclass 13, count 2 2006.229.05:24:18.37#ibcon#read 4, iclass 13, count 2 2006.229.05:24:18.37#ibcon#about to read 5, iclass 13, count 2 2006.229.05:24:18.37#ibcon#read 5, iclass 13, count 2 2006.229.05:24:18.37#ibcon#about to read 6, iclass 13, count 2 2006.229.05:24:18.37#ibcon#read 6, iclass 13, count 2 2006.229.05:24:18.37#ibcon#end of sib2, iclass 13, count 2 2006.229.05:24:18.37#ibcon#*after write, iclass 13, count 2 2006.229.05:24:18.37#ibcon#*before return 0, iclass 13, count 2 2006.229.05:24:18.37#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:18.37#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:24:18.37#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:24:18.37#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:18.37#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:18.49#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:18.49#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:18.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:24:18.49#ibcon#first serial, iclass 13, count 0 2006.229.05:24:18.49#ibcon#enter sib2, iclass 13, count 0 2006.229.05:24:18.49#ibcon#flushed, iclass 13, count 0 2006.229.05:24:18.49#ibcon#about to write, iclass 13, count 0 2006.229.05:24:18.49#ibcon#wrote, iclass 13, count 0 2006.229.05:24:18.49#ibcon#about to read 3, iclass 13, count 0 2006.229.05:24:18.51#ibcon#read 3, iclass 13, count 0 2006.229.05:24:18.51#ibcon#about to read 4, iclass 13, count 0 2006.229.05:24:18.51#ibcon#read 4, iclass 13, count 0 2006.229.05:24:18.51#ibcon#about to read 5, iclass 13, count 0 2006.229.05:24:18.51#ibcon#read 5, iclass 13, count 0 2006.229.05:24:18.51#ibcon#about to read 6, iclass 13, count 0 2006.229.05:24:18.51#ibcon#read 6, iclass 13, count 0 2006.229.05:24:18.51#ibcon#end of sib2, iclass 13, count 0 2006.229.05:24:18.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:24:18.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:24:18.51#ibcon#[27=USB\r\n] 2006.229.05:24:18.51#ibcon#*before write, iclass 13, count 0 2006.229.05:24:18.51#ibcon#enter sib2, iclass 13, count 0 2006.229.05:24:18.51#ibcon#flushed, iclass 13, count 0 2006.229.05:24:18.51#ibcon#about to write, iclass 13, count 0 2006.229.05:24:18.51#ibcon#wrote, iclass 13, count 0 2006.229.05:24:18.51#ibcon#about to read 3, iclass 13, count 0 2006.229.05:24:18.54#ibcon#read 3, iclass 13, count 0 2006.229.05:24:18.54#ibcon#about to read 4, iclass 13, count 0 2006.229.05:24:18.54#ibcon#read 4, iclass 13, count 0 2006.229.05:24:18.54#ibcon#about to read 5, iclass 13, count 0 2006.229.05:24:18.54#ibcon#read 5, iclass 13, count 0 2006.229.05:24:18.54#ibcon#about to read 6, iclass 13, count 0 2006.229.05:24:18.54#ibcon#read 6, iclass 13, count 0 2006.229.05:24:18.54#ibcon#end of sib2, iclass 13, count 0 2006.229.05:24:18.54#ibcon#*after write, iclass 13, count 0 2006.229.05:24:18.54#ibcon#*before return 0, iclass 13, count 0 2006.229.05:24:18.54#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:18.54#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:24:18.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:24:18.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:24:18.54$vck44/vblo=6,719.99 2006.229.05:24:18.54#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:24:18.54#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:24:18.54#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:18.54#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:18.54#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:18.54#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:18.54#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:24:18.54#ibcon#first serial, iclass 15, count 0 2006.229.05:24:18.54#ibcon#enter sib2, iclass 15, count 0 2006.229.05:24:18.54#ibcon#flushed, iclass 15, count 0 2006.229.05:24:18.54#ibcon#about to write, iclass 15, count 0 2006.229.05:24:18.54#ibcon#wrote, iclass 15, count 0 2006.229.05:24:18.54#ibcon#about to read 3, iclass 15, count 0 2006.229.05:24:18.56#ibcon#read 3, iclass 15, count 0 2006.229.05:24:18.56#ibcon#about to read 4, iclass 15, count 0 2006.229.05:24:18.56#ibcon#read 4, iclass 15, count 0 2006.229.05:24:18.56#ibcon#about to read 5, iclass 15, count 0 2006.229.05:24:18.56#ibcon#read 5, iclass 15, count 0 2006.229.05:24:18.56#ibcon#about to read 6, iclass 15, count 0 2006.229.05:24:18.56#ibcon#read 6, iclass 15, count 0 2006.229.05:24:18.56#ibcon#end of sib2, iclass 15, count 0 2006.229.05:24:18.56#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:24:18.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:24:18.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:24:18.56#ibcon#*before write, iclass 15, count 0 2006.229.05:24:18.56#ibcon#enter sib2, iclass 15, count 0 2006.229.05:24:18.56#ibcon#flushed, iclass 15, count 0 2006.229.05:24:18.56#ibcon#about to write, iclass 15, count 0 2006.229.05:24:18.56#ibcon#wrote, iclass 15, count 0 2006.229.05:24:18.56#ibcon#about to read 3, iclass 15, count 0 2006.229.05:24:18.60#ibcon#read 3, iclass 15, count 0 2006.229.05:24:18.60#ibcon#about to read 4, iclass 15, count 0 2006.229.05:24:18.60#ibcon#read 4, iclass 15, count 0 2006.229.05:24:18.60#ibcon#about to read 5, iclass 15, count 0 2006.229.05:24:18.60#ibcon#read 5, iclass 15, count 0 2006.229.05:24:18.60#ibcon#about to read 6, iclass 15, count 0 2006.229.05:24:18.60#ibcon#read 6, iclass 15, count 0 2006.229.05:24:18.60#ibcon#end of sib2, iclass 15, count 0 2006.229.05:24:18.60#ibcon#*after write, iclass 15, count 0 2006.229.05:24:18.60#ibcon#*before return 0, iclass 15, count 0 2006.229.05:24:18.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:18.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:24:18.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:24:18.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:24:18.60$vck44/vb=6,4 2006.229.05:24:18.60#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.05:24:18.60#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.05:24:18.60#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:18.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:18.66#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:18.66#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:18.66#ibcon#enter wrdev, iclass 17, count 2 2006.229.05:24:18.66#ibcon#first serial, iclass 17, count 2 2006.229.05:24:18.66#ibcon#enter sib2, iclass 17, count 2 2006.229.05:24:18.66#ibcon#flushed, iclass 17, count 2 2006.229.05:24:18.66#ibcon#about to write, iclass 17, count 2 2006.229.05:24:18.66#ibcon#wrote, iclass 17, count 2 2006.229.05:24:18.66#ibcon#about to read 3, iclass 17, count 2 2006.229.05:24:18.68#ibcon#read 3, iclass 17, count 2 2006.229.05:24:18.68#ibcon#about to read 4, iclass 17, count 2 2006.229.05:24:18.68#ibcon#read 4, iclass 17, count 2 2006.229.05:24:18.68#ibcon#about to read 5, iclass 17, count 2 2006.229.05:24:18.68#ibcon#read 5, iclass 17, count 2 2006.229.05:24:18.68#ibcon#about to read 6, iclass 17, count 2 2006.229.05:24:18.68#ibcon#read 6, iclass 17, count 2 2006.229.05:24:18.68#ibcon#end of sib2, iclass 17, count 2 2006.229.05:24:18.68#ibcon#*mode == 0, iclass 17, count 2 2006.229.05:24:18.68#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.05:24:18.68#ibcon#[27=AT06-04\r\n] 2006.229.05:24:18.68#ibcon#*before write, iclass 17, count 2 2006.229.05:24:18.68#ibcon#enter sib2, iclass 17, count 2 2006.229.05:24:18.68#ibcon#flushed, iclass 17, count 2 2006.229.05:24:18.68#ibcon#about to write, iclass 17, count 2 2006.229.05:24:18.68#ibcon#wrote, iclass 17, count 2 2006.229.05:24:18.68#ibcon#about to read 3, iclass 17, count 2 2006.229.05:24:18.71#ibcon#read 3, iclass 17, count 2 2006.229.05:24:18.71#ibcon#about to read 4, iclass 17, count 2 2006.229.05:24:18.71#ibcon#read 4, iclass 17, count 2 2006.229.05:24:18.71#ibcon#about to read 5, iclass 17, count 2 2006.229.05:24:18.71#ibcon#read 5, iclass 17, count 2 2006.229.05:24:18.71#ibcon#about to read 6, iclass 17, count 2 2006.229.05:24:18.71#ibcon#read 6, iclass 17, count 2 2006.229.05:24:18.71#ibcon#end of sib2, iclass 17, count 2 2006.229.05:24:18.71#ibcon#*after write, iclass 17, count 2 2006.229.05:24:18.71#ibcon#*before return 0, iclass 17, count 2 2006.229.05:24:18.71#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:18.71#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:24:18.71#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.05:24:18.71#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:18.71#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:18.83#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:18.83#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:18.83#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:24:18.83#ibcon#first serial, iclass 17, count 0 2006.229.05:24:18.83#ibcon#enter sib2, iclass 17, count 0 2006.229.05:24:18.83#ibcon#flushed, iclass 17, count 0 2006.229.05:24:18.83#ibcon#about to write, iclass 17, count 0 2006.229.05:24:18.83#ibcon#wrote, iclass 17, count 0 2006.229.05:24:18.83#ibcon#about to read 3, iclass 17, count 0 2006.229.05:24:18.85#ibcon#read 3, iclass 17, count 0 2006.229.05:24:18.85#ibcon#about to read 4, iclass 17, count 0 2006.229.05:24:18.85#ibcon#read 4, iclass 17, count 0 2006.229.05:24:18.85#ibcon#about to read 5, iclass 17, count 0 2006.229.05:24:18.85#ibcon#read 5, iclass 17, count 0 2006.229.05:24:18.85#ibcon#about to read 6, iclass 17, count 0 2006.229.05:24:18.85#ibcon#read 6, iclass 17, count 0 2006.229.05:24:18.85#ibcon#end of sib2, iclass 17, count 0 2006.229.05:24:18.85#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:24:18.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:24:18.85#ibcon#[27=USB\r\n] 2006.229.05:24:18.85#ibcon#*before write, iclass 17, count 0 2006.229.05:24:18.85#ibcon#enter sib2, iclass 17, count 0 2006.229.05:24:18.85#ibcon#flushed, iclass 17, count 0 2006.229.05:24:18.85#ibcon#about to write, iclass 17, count 0 2006.229.05:24:18.85#ibcon#wrote, iclass 17, count 0 2006.229.05:24:18.85#ibcon#about to read 3, iclass 17, count 0 2006.229.05:24:18.88#ibcon#read 3, iclass 17, count 0 2006.229.05:24:18.88#ibcon#about to read 4, iclass 17, count 0 2006.229.05:24:18.88#ibcon#read 4, iclass 17, count 0 2006.229.05:24:18.88#ibcon#about to read 5, iclass 17, count 0 2006.229.05:24:18.88#ibcon#read 5, iclass 17, count 0 2006.229.05:24:18.88#ibcon#about to read 6, iclass 17, count 0 2006.229.05:24:18.88#ibcon#read 6, iclass 17, count 0 2006.229.05:24:18.88#ibcon#end of sib2, iclass 17, count 0 2006.229.05:24:18.88#ibcon#*after write, iclass 17, count 0 2006.229.05:24:18.88#ibcon#*before return 0, iclass 17, count 0 2006.229.05:24:18.88#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:18.88#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:24:18.88#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:24:18.88#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:24:18.88$vck44/vblo=7,734.99 2006.229.05:24:18.88#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.05:24:18.88#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.05:24:18.88#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:18.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:18.88#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:18.88#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:18.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:24:18.88#ibcon#first serial, iclass 19, count 0 2006.229.05:24:18.88#ibcon#enter sib2, iclass 19, count 0 2006.229.05:24:18.88#ibcon#flushed, iclass 19, count 0 2006.229.05:24:18.88#ibcon#about to write, iclass 19, count 0 2006.229.05:24:18.88#ibcon#wrote, iclass 19, count 0 2006.229.05:24:18.88#ibcon#about to read 3, iclass 19, count 0 2006.229.05:24:18.90#ibcon#read 3, iclass 19, count 0 2006.229.05:24:18.90#ibcon#about to read 4, iclass 19, count 0 2006.229.05:24:18.90#ibcon#read 4, iclass 19, count 0 2006.229.05:24:18.90#ibcon#about to read 5, iclass 19, count 0 2006.229.05:24:18.90#ibcon#read 5, iclass 19, count 0 2006.229.05:24:18.90#ibcon#about to read 6, iclass 19, count 0 2006.229.05:24:18.90#ibcon#read 6, iclass 19, count 0 2006.229.05:24:18.90#ibcon#end of sib2, iclass 19, count 0 2006.229.05:24:18.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:24:18.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:24:18.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:24:18.90#ibcon#*before write, iclass 19, count 0 2006.229.05:24:18.90#ibcon#enter sib2, iclass 19, count 0 2006.229.05:24:18.90#ibcon#flushed, iclass 19, count 0 2006.229.05:24:18.90#ibcon#about to write, iclass 19, count 0 2006.229.05:24:18.90#ibcon#wrote, iclass 19, count 0 2006.229.05:24:18.90#ibcon#about to read 3, iclass 19, count 0 2006.229.05:24:18.94#ibcon#read 3, iclass 19, count 0 2006.229.05:24:18.94#ibcon#about to read 4, iclass 19, count 0 2006.229.05:24:18.94#ibcon#read 4, iclass 19, count 0 2006.229.05:24:18.94#ibcon#about to read 5, iclass 19, count 0 2006.229.05:24:18.94#ibcon#read 5, iclass 19, count 0 2006.229.05:24:18.94#ibcon#about to read 6, iclass 19, count 0 2006.229.05:24:18.94#ibcon#read 6, iclass 19, count 0 2006.229.05:24:18.94#ibcon#end of sib2, iclass 19, count 0 2006.229.05:24:18.94#ibcon#*after write, iclass 19, count 0 2006.229.05:24:18.94#ibcon#*before return 0, iclass 19, count 0 2006.229.05:24:18.94#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:18.94#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:24:18.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:24:18.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:24:18.94$vck44/vb=7,4 2006.229.05:24:18.94#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.05:24:18.94#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.05:24:18.94#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:18.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:19.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:19.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:19.00#ibcon#enter wrdev, iclass 21, count 2 2006.229.05:24:19.00#ibcon#first serial, iclass 21, count 2 2006.229.05:24:19.00#ibcon#enter sib2, iclass 21, count 2 2006.229.05:24:19.00#ibcon#flushed, iclass 21, count 2 2006.229.05:24:19.00#ibcon#about to write, iclass 21, count 2 2006.229.05:24:19.00#ibcon#wrote, iclass 21, count 2 2006.229.05:24:19.00#ibcon#about to read 3, iclass 21, count 2 2006.229.05:24:19.02#ibcon#read 3, iclass 21, count 2 2006.229.05:24:19.02#ibcon#about to read 4, iclass 21, count 2 2006.229.05:24:19.02#ibcon#read 4, iclass 21, count 2 2006.229.05:24:19.02#ibcon#about to read 5, iclass 21, count 2 2006.229.05:24:19.02#ibcon#read 5, iclass 21, count 2 2006.229.05:24:19.02#ibcon#about to read 6, iclass 21, count 2 2006.229.05:24:19.02#ibcon#read 6, iclass 21, count 2 2006.229.05:24:19.02#ibcon#end of sib2, iclass 21, count 2 2006.229.05:24:19.02#ibcon#*mode == 0, iclass 21, count 2 2006.229.05:24:19.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.05:24:19.02#ibcon#[27=AT07-04\r\n] 2006.229.05:24:19.02#ibcon#*before write, iclass 21, count 2 2006.229.05:24:19.02#ibcon#enter sib2, iclass 21, count 2 2006.229.05:24:19.02#ibcon#flushed, iclass 21, count 2 2006.229.05:24:19.02#ibcon#about to write, iclass 21, count 2 2006.229.05:24:19.02#ibcon#wrote, iclass 21, count 2 2006.229.05:24:19.02#ibcon#about to read 3, iclass 21, count 2 2006.229.05:24:19.05#ibcon#read 3, iclass 21, count 2 2006.229.05:24:19.05#ibcon#about to read 4, iclass 21, count 2 2006.229.05:24:19.05#ibcon#read 4, iclass 21, count 2 2006.229.05:24:19.05#ibcon#about to read 5, iclass 21, count 2 2006.229.05:24:19.05#ibcon#read 5, iclass 21, count 2 2006.229.05:24:19.05#ibcon#about to read 6, iclass 21, count 2 2006.229.05:24:19.05#ibcon#read 6, iclass 21, count 2 2006.229.05:24:19.05#ibcon#end of sib2, iclass 21, count 2 2006.229.05:24:19.05#ibcon#*after write, iclass 21, count 2 2006.229.05:24:19.05#ibcon#*before return 0, iclass 21, count 2 2006.229.05:24:19.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:19.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:24:19.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.05:24:19.05#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:19.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:19.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:19.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:19.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:24:19.17#ibcon#first serial, iclass 21, count 0 2006.229.05:24:19.17#ibcon#enter sib2, iclass 21, count 0 2006.229.05:24:19.17#ibcon#flushed, iclass 21, count 0 2006.229.05:24:19.17#ibcon#about to write, iclass 21, count 0 2006.229.05:24:19.17#ibcon#wrote, iclass 21, count 0 2006.229.05:24:19.17#ibcon#about to read 3, iclass 21, count 0 2006.229.05:24:19.19#ibcon#read 3, iclass 21, count 0 2006.229.05:24:19.19#ibcon#about to read 4, iclass 21, count 0 2006.229.05:24:19.19#ibcon#read 4, iclass 21, count 0 2006.229.05:24:19.19#ibcon#about to read 5, iclass 21, count 0 2006.229.05:24:19.19#ibcon#read 5, iclass 21, count 0 2006.229.05:24:19.19#ibcon#about to read 6, iclass 21, count 0 2006.229.05:24:19.19#ibcon#read 6, iclass 21, count 0 2006.229.05:24:19.19#ibcon#end of sib2, iclass 21, count 0 2006.229.05:24:19.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:24:19.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:24:19.19#ibcon#[27=USB\r\n] 2006.229.05:24:19.19#ibcon#*before write, iclass 21, count 0 2006.229.05:24:19.19#ibcon#enter sib2, iclass 21, count 0 2006.229.05:24:19.19#ibcon#flushed, iclass 21, count 0 2006.229.05:24:19.19#ibcon#about to write, iclass 21, count 0 2006.229.05:24:19.19#ibcon#wrote, iclass 21, count 0 2006.229.05:24:19.19#ibcon#about to read 3, iclass 21, count 0 2006.229.05:24:19.22#ibcon#read 3, iclass 21, count 0 2006.229.05:24:19.22#ibcon#about to read 4, iclass 21, count 0 2006.229.05:24:19.22#ibcon#read 4, iclass 21, count 0 2006.229.05:24:19.22#ibcon#about to read 5, iclass 21, count 0 2006.229.05:24:19.22#ibcon#read 5, iclass 21, count 0 2006.229.05:24:19.22#ibcon#about to read 6, iclass 21, count 0 2006.229.05:24:19.22#ibcon#read 6, iclass 21, count 0 2006.229.05:24:19.22#ibcon#end of sib2, iclass 21, count 0 2006.229.05:24:19.22#ibcon#*after write, iclass 21, count 0 2006.229.05:24:19.22#ibcon#*before return 0, iclass 21, count 0 2006.229.05:24:19.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:19.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:24:19.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:24:19.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:24:19.22$vck44/vblo=8,744.99 2006.229.05:24:19.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:24:19.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:24:19.22#ibcon#ireg 17 cls_cnt 0 2006.229.05:24:19.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:19.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:19.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:19.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:24:19.22#ibcon#first serial, iclass 23, count 0 2006.229.05:24:19.22#ibcon#enter sib2, iclass 23, count 0 2006.229.05:24:19.22#ibcon#flushed, iclass 23, count 0 2006.229.05:24:19.22#ibcon#about to write, iclass 23, count 0 2006.229.05:24:19.22#ibcon#wrote, iclass 23, count 0 2006.229.05:24:19.22#ibcon#about to read 3, iclass 23, count 0 2006.229.05:24:19.24#ibcon#read 3, iclass 23, count 0 2006.229.05:24:19.24#ibcon#about to read 4, iclass 23, count 0 2006.229.05:24:19.24#ibcon#read 4, iclass 23, count 0 2006.229.05:24:19.24#ibcon#about to read 5, iclass 23, count 0 2006.229.05:24:19.24#ibcon#read 5, iclass 23, count 0 2006.229.05:24:19.24#ibcon#about to read 6, iclass 23, count 0 2006.229.05:24:19.24#ibcon#read 6, iclass 23, count 0 2006.229.05:24:19.24#ibcon#end of sib2, iclass 23, count 0 2006.229.05:24:19.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:24:19.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:24:19.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:24:19.24#ibcon#*before write, iclass 23, count 0 2006.229.05:24:19.24#ibcon#enter sib2, iclass 23, count 0 2006.229.05:24:19.24#ibcon#flushed, iclass 23, count 0 2006.229.05:24:19.24#ibcon#about to write, iclass 23, count 0 2006.229.05:24:19.24#ibcon#wrote, iclass 23, count 0 2006.229.05:24:19.24#ibcon#about to read 3, iclass 23, count 0 2006.229.05:24:19.28#ibcon#read 3, iclass 23, count 0 2006.229.05:24:19.28#ibcon#about to read 4, iclass 23, count 0 2006.229.05:24:19.28#ibcon#read 4, iclass 23, count 0 2006.229.05:24:19.28#ibcon#about to read 5, iclass 23, count 0 2006.229.05:24:19.28#ibcon#read 5, iclass 23, count 0 2006.229.05:24:19.28#ibcon#about to read 6, iclass 23, count 0 2006.229.05:24:19.28#ibcon#read 6, iclass 23, count 0 2006.229.05:24:19.28#ibcon#end of sib2, iclass 23, count 0 2006.229.05:24:19.28#ibcon#*after write, iclass 23, count 0 2006.229.05:24:19.28#ibcon#*before return 0, iclass 23, count 0 2006.229.05:24:19.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:19.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:24:19.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:24:19.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:24:19.28$vck44/vb=8,4 2006.229.05:24:19.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:24:19.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:24:19.28#ibcon#ireg 11 cls_cnt 2 2006.229.05:24:19.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:19.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:19.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:19.34#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:24:19.34#ibcon#first serial, iclass 25, count 2 2006.229.05:24:19.34#ibcon#enter sib2, iclass 25, count 2 2006.229.05:24:19.34#ibcon#flushed, iclass 25, count 2 2006.229.05:24:19.34#ibcon#about to write, iclass 25, count 2 2006.229.05:24:19.34#ibcon#wrote, iclass 25, count 2 2006.229.05:24:19.34#ibcon#about to read 3, iclass 25, count 2 2006.229.05:24:19.36#ibcon#read 3, iclass 25, count 2 2006.229.05:24:19.36#ibcon#about to read 4, iclass 25, count 2 2006.229.05:24:19.36#ibcon#read 4, iclass 25, count 2 2006.229.05:24:19.36#ibcon#about to read 5, iclass 25, count 2 2006.229.05:24:19.36#ibcon#read 5, iclass 25, count 2 2006.229.05:24:19.36#ibcon#about to read 6, iclass 25, count 2 2006.229.05:24:19.36#ibcon#read 6, iclass 25, count 2 2006.229.05:24:19.36#ibcon#end of sib2, iclass 25, count 2 2006.229.05:24:19.36#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:24:19.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:24:19.36#ibcon#[27=AT08-04\r\n] 2006.229.05:24:19.36#ibcon#*before write, iclass 25, count 2 2006.229.05:24:19.36#ibcon#enter sib2, iclass 25, count 2 2006.229.05:24:19.36#ibcon#flushed, iclass 25, count 2 2006.229.05:24:19.36#ibcon#about to write, iclass 25, count 2 2006.229.05:24:19.36#ibcon#wrote, iclass 25, count 2 2006.229.05:24:19.36#ibcon#about to read 3, iclass 25, count 2 2006.229.05:24:19.39#ibcon#read 3, iclass 25, count 2 2006.229.05:24:19.39#ibcon#about to read 4, iclass 25, count 2 2006.229.05:24:19.39#ibcon#read 4, iclass 25, count 2 2006.229.05:24:19.39#ibcon#about to read 5, iclass 25, count 2 2006.229.05:24:19.39#ibcon#read 5, iclass 25, count 2 2006.229.05:24:19.39#ibcon#about to read 6, iclass 25, count 2 2006.229.05:24:19.39#ibcon#read 6, iclass 25, count 2 2006.229.05:24:19.39#ibcon#end of sib2, iclass 25, count 2 2006.229.05:24:19.39#ibcon#*after write, iclass 25, count 2 2006.229.05:24:19.39#ibcon#*before return 0, iclass 25, count 2 2006.229.05:24:19.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:19.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:24:19.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:24:19.39#ibcon#ireg 7 cls_cnt 0 2006.229.05:24:19.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:19.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:19.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:19.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:24:19.51#ibcon#first serial, iclass 25, count 0 2006.229.05:24:19.51#ibcon#enter sib2, iclass 25, count 0 2006.229.05:24:19.51#ibcon#flushed, iclass 25, count 0 2006.229.05:24:19.51#ibcon#about to write, iclass 25, count 0 2006.229.05:24:19.51#ibcon#wrote, iclass 25, count 0 2006.229.05:24:19.51#ibcon#about to read 3, iclass 25, count 0 2006.229.05:24:19.53#ibcon#read 3, iclass 25, count 0 2006.229.05:24:19.53#ibcon#about to read 4, iclass 25, count 0 2006.229.05:24:19.53#ibcon#read 4, iclass 25, count 0 2006.229.05:24:19.53#ibcon#about to read 5, iclass 25, count 0 2006.229.05:24:19.53#ibcon#read 5, iclass 25, count 0 2006.229.05:24:19.53#ibcon#about to read 6, iclass 25, count 0 2006.229.05:24:19.53#ibcon#read 6, iclass 25, count 0 2006.229.05:24:19.53#ibcon#end of sib2, iclass 25, count 0 2006.229.05:24:19.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:24:19.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:24:19.53#ibcon#[27=USB\r\n] 2006.229.05:24:19.53#ibcon#*before write, iclass 25, count 0 2006.229.05:24:19.53#ibcon#enter sib2, iclass 25, count 0 2006.229.05:24:19.53#ibcon#flushed, iclass 25, count 0 2006.229.05:24:19.53#ibcon#about to write, iclass 25, count 0 2006.229.05:24:19.53#ibcon#wrote, iclass 25, count 0 2006.229.05:24:19.53#ibcon#about to read 3, iclass 25, count 0 2006.229.05:24:19.56#ibcon#read 3, iclass 25, count 0 2006.229.05:24:19.56#ibcon#about to read 4, iclass 25, count 0 2006.229.05:24:19.56#ibcon#read 4, iclass 25, count 0 2006.229.05:24:19.56#ibcon#about to read 5, iclass 25, count 0 2006.229.05:24:19.56#ibcon#read 5, iclass 25, count 0 2006.229.05:24:19.56#ibcon#about to read 6, iclass 25, count 0 2006.229.05:24:19.56#ibcon#read 6, iclass 25, count 0 2006.229.05:24:19.56#ibcon#end of sib2, iclass 25, count 0 2006.229.05:24:19.56#ibcon#*after write, iclass 25, count 0 2006.229.05:24:19.56#ibcon#*before return 0, iclass 25, count 0 2006.229.05:24:19.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:19.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:24:19.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:24:19.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:24:19.56$vck44/vabw=wide 2006.229.05:24:19.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:24:19.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:24:19.56#ibcon#ireg 8 cls_cnt 0 2006.229.05:24:19.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:19.56#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:19.56#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:19.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:24:19.56#ibcon#first serial, iclass 27, count 0 2006.229.05:24:19.56#ibcon#enter sib2, iclass 27, count 0 2006.229.05:24:19.56#ibcon#flushed, iclass 27, count 0 2006.229.05:24:19.56#ibcon#about to write, iclass 27, count 0 2006.229.05:24:19.56#ibcon#wrote, iclass 27, count 0 2006.229.05:24:19.56#ibcon#about to read 3, iclass 27, count 0 2006.229.05:24:19.58#ibcon#read 3, iclass 27, count 0 2006.229.05:24:19.58#ibcon#about to read 4, iclass 27, count 0 2006.229.05:24:19.58#ibcon#read 4, iclass 27, count 0 2006.229.05:24:19.58#ibcon#about to read 5, iclass 27, count 0 2006.229.05:24:19.58#ibcon#read 5, iclass 27, count 0 2006.229.05:24:19.58#ibcon#about to read 6, iclass 27, count 0 2006.229.05:24:19.58#ibcon#read 6, iclass 27, count 0 2006.229.05:24:19.58#ibcon#end of sib2, iclass 27, count 0 2006.229.05:24:19.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:24:19.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:24:19.58#ibcon#[25=BW32\r\n] 2006.229.05:24:19.58#ibcon#*before write, iclass 27, count 0 2006.229.05:24:19.58#ibcon#enter sib2, iclass 27, count 0 2006.229.05:24:19.58#ibcon#flushed, iclass 27, count 0 2006.229.05:24:19.58#ibcon#about to write, iclass 27, count 0 2006.229.05:24:19.58#ibcon#wrote, iclass 27, count 0 2006.229.05:24:19.58#ibcon#about to read 3, iclass 27, count 0 2006.229.05:24:19.61#ibcon#read 3, iclass 27, count 0 2006.229.05:24:19.61#ibcon#about to read 4, iclass 27, count 0 2006.229.05:24:19.61#ibcon#read 4, iclass 27, count 0 2006.229.05:24:19.61#ibcon#about to read 5, iclass 27, count 0 2006.229.05:24:19.61#ibcon#read 5, iclass 27, count 0 2006.229.05:24:19.61#ibcon#about to read 6, iclass 27, count 0 2006.229.05:24:19.61#ibcon#read 6, iclass 27, count 0 2006.229.05:24:19.61#ibcon#end of sib2, iclass 27, count 0 2006.229.05:24:19.61#ibcon#*after write, iclass 27, count 0 2006.229.05:24:19.61#ibcon#*before return 0, iclass 27, count 0 2006.229.05:24:19.61#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:19.61#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:24:19.61#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:24:19.61#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:24:19.61$vck44/vbbw=wide 2006.229.05:24:19.61#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:24:19.61#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:24:19.61#ibcon#ireg 8 cls_cnt 0 2006.229.05:24:19.61#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:24:19.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:24:19.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:24:19.68#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:24:19.68#ibcon#first serial, iclass 29, count 0 2006.229.05:24:19.68#ibcon#enter sib2, iclass 29, count 0 2006.229.05:24:19.68#ibcon#flushed, iclass 29, count 0 2006.229.05:24:19.68#ibcon#about to write, iclass 29, count 0 2006.229.05:24:19.68#ibcon#wrote, iclass 29, count 0 2006.229.05:24:19.68#ibcon#about to read 3, iclass 29, count 0 2006.229.05:24:19.70#ibcon#read 3, iclass 29, count 0 2006.229.05:24:19.70#ibcon#about to read 4, iclass 29, count 0 2006.229.05:24:19.70#ibcon#read 4, iclass 29, count 0 2006.229.05:24:19.70#ibcon#about to read 5, iclass 29, count 0 2006.229.05:24:19.70#ibcon#read 5, iclass 29, count 0 2006.229.05:24:19.70#ibcon#about to read 6, iclass 29, count 0 2006.229.05:24:19.70#ibcon#read 6, iclass 29, count 0 2006.229.05:24:19.70#ibcon#end of sib2, iclass 29, count 0 2006.229.05:24:19.70#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:24:19.70#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:24:19.70#ibcon#[27=BW32\r\n] 2006.229.05:24:19.70#ibcon#*before write, iclass 29, count 0 2006.229.05:24:19.70#ibcon#enter sib2, iclass 29, count 0 2006.229.05:24:19.70#ibcon#flushed, iclass 29, count 0 2006.229.05:24:19.70#ibcon#about to write, iclass 29, count 0 2006.229.05:24:19.70#ibcon#wrote, iclass 29, count 0 2006.229.05:24:19.70#ibcon#about to read 3, iclass 29, count 0 2006.229.05:24:19.73#ibcon#read 3, iclass 29, count 0 2006.229.05:24:19.73#ibcon#about to read 4, iclass 29, count 0 2006.229.05:24:19.73#ibcon#read 4, iclass 29, count 0 2006.229.05:24:19.73#ibcon#about to read 5, iclass 29, count 0 2006.229.05:24:19.73#ibcon#read 5, iclass 29, count 0 2006.229.05:24:19.73#ibcon#about to read 6, iclass 29, count 0 2006.229.05:24:19.73#ibcon#read 6, iclass 29, count 0 2006.229.05:24:19.73#ibcon#end of sib2, iclass 29, count 0 2006.229.05:24:19.73#ibcon#*after write, iclass 29, count 0 2006.229.05:24:19.73#ibcon#*before return 0, iclass 29, count 0 2006.229.05:24:19.73#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:24:19.73#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:24:19.73#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:24:19.73#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:24:19.73$setupk4/ifdk4 2006.229.05:24:19.73$ifdk4/lo= 2006.229.05:24:19.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:24:19.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:24:19.73$ifdk4/patch= 2006.229.05:24:19.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:24:19.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:24:19.73$setupk4/!*+20s 2006.229.05:24:19.79#abcon#<5=/04 3.8 8.1 30.90 89 999.6\r\n> 2006.229.05:24:19.81#abcon#{5=INTERFACE CLEAR} 2006.229.05:24:19.87#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:24:27.14#trakl#Source acquired 2006.229.05:24:27.14#flagr#flagr/antenna,acquired 2006.229.05:24:29.96#abcon#<5=/04 3.7 8.1 30.90 89 999.6\r\n> 2006.229.05:24:29.98#abcon#{5=INTERFACE CLEAR} 2006.229.05:24:30.04#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:24:34.24$setupk4/"tpicd 2006.229.05:24:34.24$setupk4/echo=off 2006.229.05:24:34.24$setupk4/xlog=off 2006.229.05:24:34.24:!2006.229.05:24:43 2006.229.05:24:43.00:preob 2006.229.05:24:43.13/onsource/TRACKING 2006.229.05:24:43.13:!2006.229.05:24:53 2006.229.05:24:53.00:"tape 2006.229.05:24:53.00:"st=record 2006.229.05:24:53.00:data_valid=on 2006.229.05:24:53.00:midob 2006.229.05:24:54.13/onsource/TRACKING 2006.229.05:24:54.13/wx/30.89,999.6,89 2006.229.05:24:54.25/cable/+6.4010E-03 2006.229.05:24:55.34/va/01,08,usb,yes,38,41 2006.229.05:24:55.34/va/02,07,usb,yes,41,42 2006.229.05:24:55.34/va/03,06,usb,yes,51,54 2006.229.05:24:55.34/va/04,07,usb,yes,43,45 2006.229.05:24:55.34/va/05,04,usb,yes,38,39 2006.229.05:24:55.34/va/06,04,usb,yes,43,42 2006.229.05:24:55.34/va/07,05,usb,yes,38,39 2006.229.05:24:55.34/va/08,06,usb,yes,28,34 2006.229.05:24:55.57/valo/01,524.99,yes,locked 2006.229.05:24:55.57/valo/02,534.99,yes,locked 2006.229.05:24:55.57/valo/03,564.99,yes,locked 2006.229.05:24:55.57/valo/04,624.99,yes,locked 2006.229.05:24:55.57/valo/05,734.99,yes,locked 2006.229.05:24:55.57/valo/06,814.99,yes,locked 2006.229.05:24:55.57/valo/07,864.99,yes,locked 2006.229.05:24:55.57/valo/08,884.99,yes,locked 2006.229.05:24:56.66/vb/01,04,usb,yes,34,50 2006.229.05:24:56.66/vb/02,04,usb,yes,36,60 2006.229.05:24:56.66/vb/03,04,usb,yes,33,40 2006.229.05:24:56.66/vb/04,04,usb,yes,38,37 2006.229.05:24:56.66/vb/05,04,usb,yes,30,33 2006.229.05:24:56.66/vb/06,04,usb,yes,35,31 2006.229.05:24:56.66/vb/07,04,usb,yes,35,35 2006.229.05:24:56.66/vb/08,04,usb,yes,32,36 2006.229.05:24:56.90/vblo/01,629.99,yes,locked 2006.229.05:24:56.90/vblo/02,634.99,yes,locked 2006.229.05:24:56.90/vblo/03,649.99,yes,locked 2006.229.05:24:56.90/vblo/04,679.99,yes,locked 2006.229.05:24:56.90/vblo/05,709.99,yes,locked 2006.229.05:24:56.90/vblo/06,719.99,yes,locked 2006.229.05:24:56.90/vblo/07,734.99,yes,locked 2006.229.05:24:56.90/vblo/08,744.99,yes,locked 2006.229.05:24:57.05/vabw/8 2006.229.05:24:57.20/vbbw/8 2006.229.05:24:57.29/xfe/off,on,12.0 2006.229.05:24:57.68/ifatt/23,28,28,28 2006.229.05:24:58.08/fmout-gps/S +4.51E-07 2006.229.05:24:58.12:!2006.229.05:25:53 2006.229.05:25:53.00:data_valid=off 2006.229.05:25:53.00:"et 2006.229.05:25:53.00:!+3s 2006.229.05:25:56.01:"tape 2006.229.05:25:56.01:postob 2006.229.05:25:56.15/cable/+6.3994E-03 2006.229.05:25:56.15/wx/30.87,999.6,89 2006.229.05:25:57.08/fmout-gps/S +4.52E-07 2006.229.05:25:57.08:scan_name=229-0526,jd0608,50 2006.229.05:25:57.08:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.05:25:57.13#flagr#flagr/antenna,new-source 2006.229.05:25:58.13:checkk5 2006.229.05:25:58.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:25:58.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:25:59.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:25:59.68/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:26:00.07/chk_obsdata//k5ts1/T2290524??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:26:00.46/chk_obsdata//k5ts2/T2290524??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:26:00.87/chk_obsdata//k5ts3/T2290524??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:26:01.28/chk_obsdata//k5ts4/T2290524??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.05:26:01.99/k5log//k5ts1_log_newline 2006.229.05:26:02.69/k5log//k5ts2_log_newline 2006.229.05:26:03.40/k5log//k5ts3_log_newline 2006.229.05:26:04.10/k5log//k5ts4_log_newline 2006.229.05:26:04.12/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:26:04.12:setupk4=1 2006.229.05:26:04.12$setupk4/echo=on 2006.229.05:26:04.12$setupk4/pcalon 2006.229.05:26:04.12$pcalon/"no phase cal control is implemented here 2006.229.05:26:04.12$setupk4/"tpicd=stop 2006.229.05:26:04.12$setupk4/"rec=synch_on 2006.229.05:26:04.12$setupk4/"rec_mode=128 2006.229.05:26:04.12$setupk4/!* 2006.229.05:26:04.12$setupk4/recpk4 2006.229.05:26:04.12$recpk4/recpatch= 2006.229.05:26:04.12$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:26:04.12$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:26:04.12$setupk4/vck44 2006.229.05:26:04.12$vck44/valo=1,524.99 2006.229.05:26:04.12#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.05:26:04.12#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.05:26:04.12#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:04.12#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:04.12#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:04.12#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:04.12#ibcon#enter wrdev, iclass 4, count 0 2006.229.05:26:04.12#ibcon#first serial, iclass 4, count 0 2006.229.05:26:04.12#ibcon#enter sib2, iclass 4, count 0 2006.229.05:26:04.12#ibcon#flushed, iclass 4, count 0 2006.229.05:26:04.12#ibcon#about to write, iclass 4, count 0 2006.229.05:26:04.12#ibcon#wrote, iclass 4, count 0 2006.229.05:26:04.12#ibcon#about to read 3, iclass 4, count 0 2006.229.05:26:04.14#ibcon#read 3, iclass 4, count 0 2006.229.05:26:04.14#ibcon#about to read 4, iclass 4, count 0 2006.229.05:26:04.14#ibcon#read 4, iclass 4, count 0 2006.229.05:26:04.14#ibcon#about to read 5, iclass 4, count 0 2006.229.05:26:04.14#ibcon#read 5, iclass 4, count 0 2006.229.05:26:04.14#ibcon#about to read 6, iclass 4, count 0 2006.229.05:26:04.14#ibcon#read 6, iclass 4, count 0 2006.229.05:26:04.14#ibcon#end of sib2, iclass 4, count 0 2006.229.05:26:04.14#ibcon#*mode == 0, iclass 4, count 0 2006.229.05:26:04.14#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.05:26:04.14#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:26:04.14#ibcon#*before write, iclass 4, count 0 2006.229.05:26:04.14#ibcon#enter sib2, iclass 4, count 0 2006.229.05:26:04.14#ibcon#flushed, iclass 4, count 0 2006.229.05:26:04.14#ibcon#about to write, iclass 4, count 0 2006.229.05:26:04.14#ibcon#wrote, iclass 4, count 0 2006.229.05:26:04.14#ibcon#about to read 3, iclass 4, count 0 2006.229.05:26:04.19#ibcon#read 3, iclass 4, count 0 2006.229.05:26:04.19#ibcon#about to read 4, iclass 4, count 0 2006.229.05:26:04.19#ibcon#read 4, iclass 4, count 0 2006.229.05:26:04.19#ibcon#about to read 5, iclass 4, count 0 2006.229.05:26:04.19#ibcon#read 5, iclass 4, count 0 2006.229.05:26:04.19#ibcon#about to read 6, iclass 4, count 0 2006.229.05:26:04.19#ibcon#read 6, iclass 4, count 0 2006.229.05:26:04.19#ibcon#end of sib2, iclass 4, count 0 2006.229.05:26:04.19#ibcon#*after write, iclass 4, count 0 2006.229.05:26:04.19#ibcon#*before return 0, iclass 4, count 0 2006.229.05:26:04.19#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:04.19#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:04.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.05:26:04.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.05:26:04.19$vck44/va=1,8 2006.229.05:26:04.19#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.05:26:04.19#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.05:26:04.19#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:04.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:04.19#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:04.19#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:04.19#ibcon#enter wrdev, iclass 6, count 2 2006.229.05:26:04.19#ibcon#first serial, iclass 6, count 2 2006.229.05:26:04.19#ibcon#enter sib2, iclass 6, count 2 2006.229.05:26:04.19#ibcon#flushed, iclass 6, count 2 2006.229.05:26:04.19#ibcon#about to write, iclass 6, count 2 2006.229.05:26:04.19#ibcon#wrote, iclass 6, count 2 2006.229.05:26:04.19#ibcon#about to read 3, iclass 6, count 2 2006.229.05:26:04.21#ibcon#read 3, iclass 6, count 2 2006.229.05:26:04.21#ibcon#about to read 4, iclass 6, count 2 2006.229.05:26:04.21#ibcon#read 4, iclass 6, count 2 2006.229.05:26:04.21#ibcon#about to read 5, iclass 6, count 2 2006.229.05:26:04.21#ibcon#read 5, iclass 6, count 2 2006.229.05:26:04.21#ibcon#about to read 6, iclass 6, count 2 2006.229.05:26:04.21#ibcon#read 6, iclass 6, count 2 2006.229.05:26:04.21#ibcon#end of sib2, iclass 6, count 2 2006.229.05:26:04.21#ibcon#*mode == 0, iclass 6, count 2 2006.229.05:26:04.21#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.05:26:04.21#ibcon#[25=AT01-08\r\n] 2006.229.05:26:04.21#ibcon#*before write, iclass 6, count 2 2006.229.05:26:04.21#ibcon#enter sib2, iclass 6, count 2 2006.229.05:26:04.21#ibcon#flushed, iclass 6, count 2 2006.229.05:26:04.21#ibcon#about to write, iclass 6, count 2 2006.229.05:26:04.21#ibcon#wrote, iclass 6, count 2 2006.229.05:26:04.21#ibcon#about to read 3, iclass 6, count 2 2006.229.05:26:04.24#ibcon#read 3, iclass 6, count 2 2006.229.05:26:04.24#ibcon#about to read 4, iclass 6, count 2 2006.229.05:26:04.24#ibcon#read 4, iclass 6, count 2 2006.229.05:26:04.24#ibcon#about to read 5, iclass 6, count 2 2006.229.05:26:04.24#ibcon#read 5, iclass 6, count 2 2006.229.05:26:04.24#ibcon#about to read 6, iclass 6, count 2 2006.229.05:26:04.24#ibcon#read 6, iclass 6, count 2 2006.229.05:26:04.24#ibcon#end of sib2, iclass 6, count 2 2006.229.05:26:04.24#ibcon#*after write, iclass 6, count 2 2006.229.05:26:04.24#ibcon#*before return 0, iclass 6, count 2 2006.229.05:26:04.24#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:04.24#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:04.24#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.05:26:04.24#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:04.24#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:04.36#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:04.36#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:04.36#ibcon#enter wrdev, iclass 6, count 0 2006.229.05:26:04.36#ibcon#first serial, iclass 6, count 0 2006.229.05:26:04.36#ibcon#enter sib2, iclass 6, count 0 2006.229.05:26:04.36#ibcon#flushed, iclass 6, count 0 2006.229.05:26:04.36#ibcon#about to write, iclass 6, count 0 2006.229.05:26:04.36#ibcon#wrote, iclass 6, count 0 2006.229.05:26:04.36#ibcon#about to read 3, iclass 6, count 0 2006.229.05:26:04.38#ibcon#read 3, iclass 6, count 0 2006.229.05:26:04.38#ibcon#about to read 4, iclass 6, count 0 2006.229.05:26:04.38#ibcon#read 4, iclass 6, count 0 2006.229.05:26:04.38#ibcon#about to read 5, iclass 6, count 0 2006.229.05:26:04.38#ibcon#read 5, iclass 6, count 0 2006.229.05:26:04.38#ibcon#about to read 6, iclass 6, count 0 2006.229.05:26:04.38#ibcon#read 6, iclass 6, count 0 2006.229.05:26:04.38#ibcon#end of sib2, iclass 6, count 0 2006.229.05:26:04.38#ibcon#*mode == 0, iclass 6, count 0 2006.229.05:26:04.38#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.05:26:04.38#ibcon#[25=USB\r\n] 2006.229.05:26:04.38#ibcon#*before write, iclass 6, count 0 2006.229.05:26:04.38#ibcon#enter sib2, iclass 6, count 0 2006.229.05:26:04.38#ibcon#flushed, iclass 6, count 0 2006.229.05:26:04.38#ibcon#about to write, iclass 6, count 0 2006.229.05:26:04.38#ibcon#wrote, iclass 6, count 0 2006.229.05:26:04.38#ibcon#about to read 3, iclass 6, count 0 2006.229.05:26:04.41#ibcon#read 3, iclass 6, count 0 2006.229.05:26:04.41#ibcon#about to read 4, iclass 6, count 0 2006.229.05:26:04.41#ibcon#read 4, iclass 6, count 0 2006.229.05:26:04.41#ibcon#about to read 5, iclass 6, count 0 2006.229.05:26:04.41#ibcon#read 5, iclass 6, count 0 2006.229.05:26:04.41#ibcon#about to read 6, iclass 6, count 0 2006.229.05:26:04.41#ibcon#read 6, iclass 6, count 0 2006.229.05:26:04.41#ibcon#end of sib2, iclass 6, count 0 2006.229.05:26:04.41#ibcon#*after write, iclass 6, count 0 2006.229.05:26:04.41#ibcon#*before return 0, iclass 6, count 0 2006.229.05:26:04.41#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:04.41#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:04.41#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.05:26:04.41#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.05:26:04.41$vck44/valo=2,534.99 2006.229.05:26:04.41#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.05:26:04.41#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.05:26:04.41#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:04.41#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:04.41#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:04.41#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:04.41#ibcon#enter wrdev, iclass 10, count 0 2006.229.05:26:04.41#ibcon#first serial, iclass 10, count 0 2006.229.05:26:04.41#ibcon#enter sib2, iclass 10, count 0 2006.229.05:26:04.41#ibcon#flushed, iclass 10, count 0 2006.229.05:26:04.41#ibcon#about to write, iclass 10, count 0 2006.229.05:26:04.41#ibcon#wrote, iclass 10, count 0 2006.229.05:26:04.41#ibcon#about to read 3, iclass 10, count 0 2006.229.05:26:04.43#ibcon#read 3, iclass 10, count 0 2006.229.05:26:04.43#ibcon#about to read 4, iclass 10, count 0 2006.229.05:26:04.43#ibcon#read 4, iclass 10, count 0 2006.229.05:26:04.43#ibcon#about to read 5, iclass 10, count 0 2006.229.05:26:04.43#ibcon#read 5, iclass 10, count 0 2006.229.05:26:04.43#ibcon#about to read 6, iclass 10, count 0 2006.229.05:26:04.43#ibcon#read 6, iclass 10, count 0 2006.229.05:26:04.43#ibcon#end of sib2, iclass 10, count 0 2006.229.05:26:04.43#ibcon#*mode == 0, iclass 10, count 0 2006.229.05:26:04.43#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.05:26:04.43#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:26:04.43#ibcon#*before write, iclass 10, count 0 2006.229.05:26:04.43#ibcon#enter sib2, iclass 10, count 0 2006.229.05:26:04.43#ibcon#flushed, iclass 10, count 0 2006.229.05:26:04.43#ibcon#about to write, iclass 10, count 0 2006.229.05:26:04.43#ibcon#wrote, iclass 10, count 0 2006.229.05:26:04.43#ibcon#about to read 3, iclass 10, count 0 2006.229.05:26:04.47#ibcon#read 3, iclass 10, count 0 2006.229.05:26:04.47#ibcon#about to read 4, iclass 10, count 0 2006.229.05:26:04.47#ibcon#read 4, iclass 10, count 0 2006.229.05:26:04.47#ibcon#about to read 5, iclass 10, count 0 2006.229.05:26:04.47#ibcon#read 5, iclass 10, count 0 2006.229.05:26:04.47#ibcon#about to read 6, iclass 10, count 0 2006.229.05:26:04.47#ibcon#read 6, iclass 10, count 0 2006.229.05:26:04.47#ibcon#end of sib2, iclass 10, count 0 2006.229.05:26:04.47#ibcon#*after write, iclass 10, count 0 2006.229.05:26:04.47#ibcon#*before return 0, iclass 10, count 0 2006.229.05:26:04.47#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:04.47#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:04.47#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.05:26:04.47#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.05:26:04.47$vck44/va=2,7 2006.229.05:26:04.47#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.05:26:04.47#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.05:26:04.47#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:04.47#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:04.53#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:04.53#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:04.53#ibcon#enter wrdev, iclass 12, count 2 2006.229.05:26:04.53#ibcon#first serial, iclass 12, count 2 2006.229.05:26:04.53#ibcon#enter sib2, iclass 12, count 2 2006.229.05:26:04.53#ibcon#flushed, iclass 12, count 2 2006.229.05:26:04.53#ibcon#about to write, iclass 12, count 2 2006.229.05:26:04.53#ibcon#wrote, iclass 12, count 2 2006.229.05:26:04.53#ibcon#about to read 3, iclass 12, count 2 2006.229.05:26:04.55#ibcon#read 3, iclass 12, count 2 2006.229.05:26:04.55#ibcon#about to read 4, iclass 12, count 2 2006.229.05:26:04.55#ibcon#read 4, iclass 12, count 2 2006.229.05:26:04.55#ibcon#about to read 5, iclass 12, count 2 2006.229.05:26:04.55#ibcon#read 5, iclass 12, count 2 2006.229.05:26:04.55#ibcon#about to read 6, iclass 12, count 2 2006.229.05:26:04.55#ibcon#read 6, iclass 12, count 2 2006.229.05:26:04.55#ibcon#end of sib2, iclass 12, count 2 2006.229.05:26:04.55#ibcon#*mode == 0, iclass 12, count 2 2006.229.05:26:04.55#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.05:26:04.55#ibcon#[25=AT02-07\r\n] 2006.229.05:26:04.55#ibcon#*before write, iclass 12, count 2 2006.229.05:26:04.55#ibcon#enter sib2, iclass 12, count 2 2006.229.05:26:04.55#ibcon#flushed, iclass 12, count 2 2006.229.05:26:04.55#ibcon#about to write, iclass 12, count 2 2006.229.05:26:04.55#ibcon#wrote, iclass 12, count 2 2006.229.05:26:04.55#ibcon#about to read 3, iclass 12, count 2 2006.229.05:26:04.58#ibcon#read 3, iclass 12, count 2 2006.229.05:26:04.58#ibcon#about to read 4, iclass 12, count 2 2006.229.05:26:04.58#ibcon#read 4, iclass 12, count 2 2006.229.05:26:04.58#ibcon#about to read 5, iclass 12, count 2 2006.229.05:26:04.58#ibcon#read 5, iclass 12, count 2 2006.229.05:26:04.58#ibcon#about to read 6, iclass 12, count 2 2006.229.05:26:04.58#ibcon#read 6, iclass 12, count 2 2006.229.05:26:04.58#ibcon#end of sib2, iclass 12, count 2 2006.229.05:26:04.58#ibcon#*after write, iclass 12, count 2 2006.229.05:26:04.58#ibcon#*before return 0, iclass 12, count 2 2006.229.05:26:04.58#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:04.58#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:04.58#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.05:26:04.58#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:04.58#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:04.70#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:04.70#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:04.70#ibcon#enter wrdev, iclass 12, count 0 2006.229.05:26:04.70#ibcon#first serial, iclass 12, count 0 2006.229.05:26:04.70#ibcon#enter sib2, iclass 12, count 0 2006.229.05:26:04.70#ibcon#flushed, iclass 12, count 0 2006.229.05:26:04.70#ibcon#about to write, iclass 12, count 0 2006.229.05:26:04.70#ibcon#wrote, iclass 12, count 0 2006.229.05:26:04.70#ibcon#about to read 3, iclass 12, count 0 2006.229.05:26:04.72#ibcon#read 3, iclass 12, count 0 2006.229.05:26:04.72#ibcon#about to read 4, iclass 12, count 0 2006.229.05:26:04.72#ibcon#read 4, iclass 12, count 0 2006.229.05:26:04.72#ibcon#about to read 5, iclass 12, count 0 2006.229.05:26:04.72#ibcon#read 5, iclass 12, count 0 2006.229.05:26:04.72#ibcon#about to read 6, iclass 12, count 0 2006.229.05:26:04.72#ibcon#read 6, iclass 12, count 0 2006.229.05:26:04.72#ibcon#end of sib2, iclass 12, count 0 2006.229.05:26:04.72#ibcon#*mode == 0, iclass 12, count 0 2006.229.05:26:04.72#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.05:26:04.72#ibcon#[25=USB\r\n] 2006.229.05:26:04.72#ibcon#*before write, iclass 12, count 0 2006.229.05:26:04.72#ibcon#enter sib2, iclass 12, count 0 2006.229.05:26:04.72#ibcon#flushed, iclass 12, count 0 2006.229.05:26:04.72#ibcon#about to write, iclass 12, count 0 2006.229.05:26:04.72#ibcon#wrote, iclass 12, count 0 2006.229.05:26:04.72#ibcon#about to read 3, iclass 12, count 0 2006.229.05:26:04.75#ibcon#read 3, iclass 12, count 0 2006.229.05:26:04.75#ibcon#about to read 4, iclass 12, count 0 2006.229.05:26:04.75#ibcon#read 4, iclass 12, count 0 2006.229.05:26:04.75#ibcon#about to read 5, iclass 12, count 0 2006.229.05:26:04.75#ibcon#read 5, iclass 12, count 0 2006.229.05:26:04.75#ibcon#about to read 6, iclass 12, count 0 2006.229.05:26:04.75#ibcon#read 6, iclass 12, count 0 2006.229.05:26:04.75#ibcon#end of sib2, iclass 12, count 0 2006.229.05:26:04.75#ibcon#*after write, iclass 12, count 0 2006.229.05:26:04.75#ibcon#*before return 0, iclass 12, count 0 2006.229.05:26:04.75#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:04.75#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:04.75#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.05:26:04.75#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.05:26:04.75$vck44/valo=3,564.99 2006.229.05:26:04.75#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.05:26:04.75#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.05:26:04.75#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:04.75#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:04.75#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:04.75#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:04.75#ibcon#enter wrdev, iclass 14, count 0 2006.229.05:26:04.75#ibcon#first serial, iclass 14, count 0 2006.229.05:26:04.75#ibcon#enter sib2, iclass 14, count 0 2006.229.05:26:04.75#ibcon#flushed, iclass 14, count 0 2006.229.05:26:04.75#ibcon#about to write, iclass 14, count 0 2006.229.05:26:04.75#ibcon#wrote, iclass 14, count 0 2006.229.05:26:04.75#ibcon#about to read 3, iclass 14, count 0 2006.229.05:26:04.77#ibcon#read 3, iclass 14, count 0 2006.229.05:26:04.77#ibcon#about to read 4, iclass 14, count 0 2006.229.05:26:04.77#ibcon#read 4, iclass 14, count 0 2006.229.05:26:04.77#ibcon#about to read 5, iclass 14, count 0 2006.229.05:26:04.77#ibcon#read 5, iclass 14, count 0 2006.229.05:26:04.77#ibcon#about to read 6, iclass 14, count 0 2006.229.05:26:04.77#ibcon#read 6, iclass 14, count 0 2006.229.05:26:04.77#ibcon#end of sib2, iclass 14, count 0 2006.229.05:26:04.77#ibcon#*mode == 0, iclass 14, count 0 2006.229.05:26:04.77#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.05:26:04.77#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:26:04.77#ibcon#*before write, iclass 14, count 0 2006.229.05:26:04.77#ibcon#enter sib2, iclass 14, count 0 2006.229.05:26:04.77#ibcon#flushed, iclass 14, count 0 2006.229.05:26:04.77#ibcon#about to write, iclass 14, count 0 2006.229.05:26:04.77#ibcon#wrote, iclass 14, count 0 2006.229.05:26:04.77#ibcon#about to read 3, iclass 14, count 0 2006.229.05:26:04.81#ibcon#read 3, iclass 14, count 0 2006.229.05:26:04.81#ibcon#about to read 4, iclass 14, count 0 2006.229.05:26:04.81#ibcon#read 4, iclass 14, count 0 2006.229.05:26:04.81#ibcon#about to read 5, iclass 14, count 0 2006.229.05:26:04.81#ibcon#read 5, iclass 14, count 0 2006.229.05:26:04.81#ibcon#about to read 6, iclass 14, count 0 2006.229.05:26:04.81#ibcon#read 6, iclass 14, count 0 2006.229.05:26:04.81#ibcon#end of sib2, iclass 14, count 0 2006.229.05:26:04.81#ibcon#*after write, iclass 14, count 0 2006.229.05:26:04.81#ibcon#*before return 0, iclass 14, count 0 2006.229.05:26:04.81#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:04.81#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:04.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.05:26:04.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.05:26:04.81$vck44/va=3,6 2006.229.05:26:04.81#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.05:26:04.81#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.05:26:04.81#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:04.81#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:04.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:04.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:04.87#ibcon#enter wrdev, iclass 16, count 2 2006.229.05:26:04.87#ibcon#first serial, iclass 16, count 2 2006.229.05:26:04.87#ibcon#enter sib2, iclass 16, count 2 2006.229.05:26:04.87#ibcon#flushed, iclass 16, count 2 2006.229.05:26:04.87#ibcon#about to write, iclass 16, count 2 2006.229.05:26:04.87#ibcon#wrote, iclass 16, count 2 2006.229.05:26:04.87#ibcon#about to read 3, iclass 16, count 2 2006.229.05:26:04.89#ibcon#read 3, iclass 16, count 2 2006.229.05:26:04.89#ibcon#about to read 4, iclass 16, count 2 2006.229.05:26:04.89#ibcon#read 4, iclass 16, count 2 2006.229.05:26:04.89#ibcon#about to read 5, iclass 16, count 2 2006.229.05:26:04.89#ibcon#read 5, iclass 16, count 2 2006.229.05:26:04.89#ibcon#about to read 6, iclass 16, count 2 2006.229.05:26:04.89#ibcon#read 6, iclass 16, count 2 2006.229.05:26:04.89#ibcon#end of sib2, iclass 16, count 2 2006.229.05:26:04.89#ibcon#*mode == 0, iclass 16, count 2 2006.229.05:26:04.89#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.05:26:04.89#ibcon#[25=AT03-06\r\n] 2006.229.05:26:04.89#ibcon#*before write, iclass 16, count 2 2006.229.05:26:04.89#ibcon#enter sib2, iclass 16, count 2 2006.229.05:26:04.89#ibcon#flushed, iclass 16, count 2 2006.229.05:26:04.89#ibcon#about to write, iclass 16, count 2 2006.229.05:26:04.89#ibcon#wrote, iclass 16, count 2 2006.229.05:26:04.89#ibcon#about to read 3, iclass 16, count 2 2006.229.05:26:04.92#ibcon#read 3, iclass 16, count 2 2006.229.05:26:04.92#ibcon#about to read 4, iclass 16, count 2 2006.229.05:26:04.92#ibcon#read 4, iclass 16, count 2 2006.229.05:26:04.92#ibcon#about to read 5, iclass 16, count 2 2006.229.05:26:04.92#ibcon#read 5, iclass 16, count 2 2006.229.05:26:04.92#ibcon#about to read 6, iclass 16, count 2 2006.229.05:26:04.92#ibcon#read 6, iclass 16, count 2 2006.229.05:26:04.92#ibcon#end of sib2, iclass 16, count 2 2006.229.05:26:04.92#ibcon#*after write, iclass 16, count 2 2006.229.05:26:04.92#ibcon#*before return 0, iclass 16, count 2 2006.229.05:26:04.92#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:04.92#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:04.92#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.05:26:04.92#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:04.92#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:05.04#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:05.04#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:05.04#ibcon#enter wrdev, iclass 16, count 0 2006.229.05:26:05.04#ibcon#first serial, iclass 16, count 0 2006.229.05:26:05.04#ibcon#enter sib2, iclass 16, count 0 2006.229.05:26:05.04#ibcon#flushed, iclass 16, count 0 2006.229.05:26:05.04#ibcon#about to write, iclass 16, count 0 2006.229.05:26:05.04#ibcon#wrote, iclass 16, count 0 2006.229.05:26:05.04#ibcon#about to read 3, iclass 16, count 0 2006.229.05:26:05.06#ibcon#read 3, iclass 16, count 0 2006.229.05:26:05.06#ibcon#about to read 4, iclass 16, count 0 2006.229.05:26:05.06#ibcon#read 4, iclass 16, count 0 2006.229.05:26:05.06#ibcon#about to read 5, iclass 16, count 0 2006.229.05:26:05.06#ibcon#read 5, iclass 16, count 0 2006.229.05:26:05.06#ibcon#about to read 6, iclass 16, count 0 2006.229.05:26:05.06#ibcon#read 6, iclass 16, count 0 2006.229.05:26:05.06#ibcon#end of sib2, iclass 16, count 0 2006.229.05:26:05.06#ibcon#*mode == 0, iclass 16, count 0 2006.229.05:26:05.06#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.05:26:05.06#ibcon#[25=USB\r\n] 2006.229.05:26:05.06#ibcon#*before write, iclass 16, count 0 2006.229.05:26:05.06#ibcon#enter sib2, iclass 16, count 0 2006.229.05:26:05.06#ibcon#flushed, iclass 16, count 0 2006.229.05:26:05.06#ibcon#about to write, iclass 16, count 0 2006.229.05:26:05.06#ibcon#wrote, iclass 16, count 0 2006.229.05:26:05.06#ibcon#about to read 3, iclass 16, count 0 2006.229.05:26:05.09#ibcon#read 3, iclass 16, count 0 2006.229.05:26:05.09#ibcon#about to read 4, iclass 16, count 0 2006.229.05:26:05.09#ibcon#read 4, iclass 16, count 0 2006.229.05:26:05.09#ibcon#about to read 5, iclass 16, count 0 2006.229.05:26:05.09#ibcon#read 5, iclass 16, count 0 2006.229.05:26:05.09#ibcon#about to read 6, iclass 16, count 0 2006.229.05:26:05.09#ibcon#read 6, iclass 16, count 0 2006.229.05:26:05.09#ibcon#end of sib2, iclass 16, count 0 2006.229.05:26:05.09#ibcon#*after write, iclass 16, count 0 2006.229.05:26:05.09#ibcon#*before return 0, iclass 16, count 0 2006.229.05:26:05.09#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:05.09#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:05.09#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.05:26:05.09#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.05:26:05.09$vck44/valo=4,624.99 2006.229.05:26:05.09#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.05:26:05.09#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.05:26:05.09#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:05.09#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:05.09#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:05.09#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:05.09#ibcon#enter wrdev, iclass 18, count 0 2006.229.05:26:05.09#ibcon#first serial, iclass 18, count 0 2006.229.05:26:05.09#ibcon#enter sib2, iclass 18, count 0 2006.229.05:26:05.09#ibcon#flushed, iclass 18, count 0 2006.229.05:26:05.09#ibcon#about to write, iclass 18, count 0 2006.229.05:26:05.09#ibcon#wrote, iclass 18, count 0 2006.229.05:26:05.09#ibcon#about to read 3, iclass 18, count 0 2006.229.05:26:05.11#ibcon#read 3, iclass 18, count 0 2006.229.05:26:05.11#ibcon#about to read 4, iclass 18, count 0 2006.229.05:26:05.11#ibcon#read 4, iclass 18, count 0 2006.229.05:26:05.11#ibcon#about to read 5, iclass 18, count 0 2006.229.05:26:05.11#ibcon#read 5, iclass 18, count 0 2006.229.05:26:05.11#ibcon#about to read 6, iclass 18, count 0 2006.229.05:26:05.11#ibcon#read 6, iclass 18, count 0 2006.229.05:26:05.11#ibcon#end of sib2, iclass 18, count 0 2006.229.05:26:05.11#ibcon#*mode == 0, iclass 18, count 0 2006.229.05:26:05.11#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.05:26:05.11#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:26:05.11#ibcon#*before write, iclass 18, count 0 2006.229.05:26:05.11#ibcon#enter sib2, iclass 18, count 0 2006.229.05:26:05.11#ibcon#flushed, iclass 18, count 0 2006.229.05:26:05.11#ibcon#about to write, iclass 18, count 0 2006.229.05:26:05.11#ibcon#wrote, iclass 18, count 0 2006.229.05:26:05.11#ibcon#about to read 3, iclass 18, count 0 2006.229.05:26:05.15#ibcon#read 3, iclass 18, count 0 2006.229.05:26:05.15#ibcon#about to read 4, iclass 18, count 0 2006.229.05:26:05.15#ibcon#read 4, iclass 18, count 0 2006.229.05:26:05.15#ibcon#about to read 5, iclass 18, count 0 2006.229.05:26:05.15#ibcon#read 5, iclass 18, count 0 2006.229.05:26:05.15#ibcon#about to read 6, iclass 18, count 0 2006.229.05:26:05.15#ibcon#read 6, iclass 18, count 0 2006.229.05:26:05.15#ibcon#end of sib2, iclass 18, count 0 2006.229.05:26:05.15#ibcon#*after write, iclass 18, count 0 2006.229.05:26:05.15#ibcon#*before return 0, iclass 18, count 0 2006.229.05:26:05.15#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:05.15#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:05.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.05:26:05.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.05:26:05.15$vck44/va=4,7 2006.229.05:26:05.15#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.05:26:05.15#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.05:26:05.15#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:05.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:05.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:05.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:05.21#ibcon#enter wrdev, iclass 20, count 2 2006.229.05:26:05.21#ibcon#first serial, iclass 20, count 2 2006.229.05:26:05.21#ibcon#enter sib2, iclass 20, count 2 2006.229.05:26:05.21#ibcon#flushed, iclass 20, count 2 2006.229.05:26:05.21#ibcon#about to write, iclass 20, count 2 2006.229.05:26:05.21#ibcon#wrote, iclass 20, count 2 2006.229.05:26:05.21#ibcon#about to read 3, iclass 20, count 2 2006.229.05:26:05.23#ibcon#read 3, iclass 20, count 2 2006.229.05:26:05.23#ibcon#about to read 4, iclass 20, count 2 2006.229.05:26:05.23#ibcon#read 4, iclass 20, count 2 2006.229.05:26:05.23#ibcon#about to read 5, iclass 20, count 2 2006.229.05:26:05.23#ibcon#read 5, iclass 20, count 2 2006.229.05:26:05.23#ibcon#about to read 6, iclass 20, count 2 2006.229.05:26:05.23#ibcon#read 6, iclass 20, count 2 2006.229.05:26:05.23#ibcon#end of sib2, iclass 20, count 2 2006.229.05:26:05.23#ibcon#*mode == 0, iclass 20, count 2 2006.229.05:26:05.23#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.05:26:05.23#ibcon#[25=AT04-07\r\n] 2006.229.05:26:05.23#ibcon#*before write, iclass 20, count 2 2006.229.05:26:05.23#ibcon#enter sib2, iclass 20, count 2 2006.229.05:26:05.23#ibcon#flushed, iclass 20, count 2 2006.229.05:26:05.23#ibcon#about to write, iclass 20, count 2 2006.229.05:26:05.23#ibcon#wrote, iclass 20, count 2 2006.229.05:26:05.23#ibcon#about to read 3, iclass 20, count 2 2006.229.05:26:05.26#ibcon#read 3, iclass 20, count 2 2006.229.05:26:05.26#ibcon#about to read 4, iclass 20, count 2 2006.229.05:26:05.26#ibcon#read 4, iclass 20, count 2 2006.229.05:26:05.26#ibcon#about to read 5, iclass 20, count 2 2006.229.05:26:05.26#ibcon#read 5, iclass 20, count 2 2006.229.05:26:05.26#ibcon#about to read 6, iclass 20, count 2 2006.229.05:26:05.26#ibcon#read 6, iclass 20, count 2 2006.229.05:26:05.26#ibcon#end of sib2, iclass 20, count 2 2006.229.05:26:05.26#ibcon#*after write, iclass 20, count 2 2006.229.05:26:05.26#ibcon#*before return 0, iclass 20, count 2 2006.229.05:26:05.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:05.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:05.26#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.05:26:05.26#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:05.26#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:05.38#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:05.38#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:05.38#ibcon#enter wrdev, iclass 20, count 0 2006.229.05:26:05.38#ibcon#first serial, iclass 20, count 0 2006.229.05:26:05.38#ibcon#enter sib2, iclass 20, count 0 2006.229.05:26:05.38#ibcon#flushed, iclass 20, count 0 2006.229.05:26:05.38#ibcon#about to write, iclass 20, count 0 2006.229.05:26:05.38#ibcon#wrote, iclass 20, count 0 2006.229.05:26:05.38#ibcon#about to read 3, iclass 20, count 0 2006.229.05:26:05.40#ibcon#read 3, iclass 20, count 0 2006.229.05:26:05.40#ibcon#about to read 4, iclass 20, count 0 2006.229.05:26:05.40#ibcon#read 4, iclass 20, count 0 2006.229.05:26:05.40#ibcon#about to read 5, iclass 20, count 0 2006.229.05:26:05.40#ibcon#read 5, iclass 20, count 0 2006.229.05:26:05.40#ibcon#about to read 6, iclass 20, count 0 2006.229.05:26:05.40#ibcon#read 6, iclass 20, count 0 2006.229.05:26:05.40#ibcon#end of sib2, iclass 20, count 0 2006.229.05:26:05.40#ibcon#*mode == 0, iclass 20, count 0 2006.229.05:26:05.40#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.05:26:05.40#ibcon#[25=USB\r\n] 2006.229.05:26:05.40#ibcon#*before write, iclass 20, count 0 2006.229.05:26:05.40#ibcon#enter sib2, iclass 20, count 0 2006.229.05:26:05.40#ibcon#flushed, iclass 20, count 0 2006.229.05:26:05.40#ibcon#about to write, iclass 20, count 0 2006.229.05:26:05.40#ibcon#wrote, iclass 20, count 0 2006.229.05:26:05.40#ibcon#about to read 3, iclass 20, count 0 2006.229.05:26:05.43#ibcon#read 3, iclass 20, count 0 2006.229.05:26:05.43#ibcon#about to read 4, iclass 20, count 0 2006.229.05:26:05.43#ibcon#read 4, iclass 20, count 0 2006.229.05:26:05.43#ibcon#about to read 5, iclass 20, count 0 2006.229.05:26:05.43#ibcon#read 5, iclass 20, count 0 2006.229.05:26:05.43#ibcon#about to read 6, iclass 20, count 0 2006.229.05:26:05.43#ibcon#read 6, iclass 20, count 0 2006.229.05:26:05.43#ibcon#end of sib2, iclass 20, count 0 2006.229.05:26:05.43#ibcon#*after write, iclass 20, count 0 2006.229.05:26:05.43#ibcon#*before return 0, iclass 20, count 0 2006.229.05:26:05.43#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:05.43#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:05.43#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.05:26:05.43#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.05:26:05.43$vck44/valo=5,734.99 2006.229.05:26:05.43#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.05:26:05.43#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.05:26:05.43#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:05.43#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:05.43#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:05.43#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:05.43#ibcon#enter wrdev, iclass 22, count 0 2006.229.05:26:05.43#ibcon#first serial, iclass 22, count 0 2006.229.05:26:05.43#ibcon#enter sib2, iclass 22, count 0 2006.229.05:26:05.43#ibcon#flushed, iclass 22, count 0 2006.229.05:26:05.43#ibcon#about to write, iclass 22, count 0 2006.229.05:26:05.43#ibcon#wrote, iclass 22, count 0 2006.229.05:26:05.43#ibcon#about to read 3, iclass 22, count 0 2006.229.05:26:05.45#ibcon#read 3, iclass 22, count 0 2006.229.05:26:05.45#ibcon#about to read 4, iclass 22, count 0 2006.229.05:26:05.45#ibcon#read 4, iclass 22, count 0 2006.229.05:26:05.45#ibcon#about to read 5, iclass 22, count 0 2006.229.05:26:05.45#ibcon#read 5, iclass 22, count 0 2006.229.05:26:05.45#ibcon#about to read 6, iclass 22, count 0 2006.229.05:26:05.45#ibcon#read 6, iclass 22, count 0 2006.229.05:26:05.45#ibcon#end of sib2, iclass 22, count 0 2006.229.05:26:05.45#ibcon#*mode == 0, iclass 22, count 0 2006.229.05:26:05.45#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.05:26:05.45#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:26:05.45#ibcon#*before write, iclass 22, count 0 2006.229.05:26:05.45#ibcon#enter sib2, iclass 22, count 0 2006.229.05:26:05.45#ibcon#flushed, iclass 22, count 0 2006.229.05:26:05.45#ibcon#about to write, iclass 22, count 0 2006.229.05:26:05.45#ibcon#wrote, iclass 22, count 0 2006.229.05:26:05.45#ibcon#about to read 3, iclass 22, count 0 2006.229.05:26:05.49#ibcon#read 3, iclass 22, count 0 2006.229.05:26:05.49#ibcon#about to read 4, iclass 22, count 0 2006.229.05:26:05.49#ibcon#read 4, iclass 22, count 0 2006.229.05:26:05.49#ibcon#about to read 5, iclass 22, count 0 2006.229.05:26:05.49#ibcon#read 5, iclass 22, count 0 2006.229.05:26:05.49#ibcon#about to read 6, iclass 22, count 0 2006.229.05:26:05.49#ibcon#read 6, iclass 22, count 0 2006.229.05:26:05.49#ibcon#end of sib2, iclass 22, count 0 2006.229.05:26:05.49#ibcon#*after write, iclass 22, count 0 2006.229.05:26:05.49#ibcon#*before return 0, iclass 22, count 0 2006.229.05:26:05.49#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:05.49#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:05.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.05:26:05.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.05:26:05.49$vck44/va=5,4 2006.229.05:26:05.49#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.05:26:05.49#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.05:26:05.49#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:05.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:05.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:05.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:05.55#ibcon#enter wrdev, iclass 24, count 2 2006.229.05:26:05.55#ibcon#first serial, iclass 24, count 2 2006.229.05:26:05.55#ibcon#enter sib2, iclass 24, count 2 2006.229.05:26:05.55#ibcon#flushed, iclass 24, count 2 2006.229.05:26:05.55#ibcon#about to write, iclass 24, count 2 2006.229.05:26:05.55#ibcon#wrote, iclass 24, count 2 2006.229.05:26:05.55#ibcon#about to read 3, iclass 24, count 2 2006.229.05:26:05.57#ibcon#read 3, iclass 24, count 2 2006.229.05:26:05.57#ibcon#about to read 4, iclass 24, count 2 2006.229.05:26:05.57#ibcon#read 4, iclass 24, count 2 2006.229.05:26:05.57#ibcon#about to read 5, iclass 24, count 2 2006.229.05:26:05.57#ibcon#read 5, iclass 24, count 2 2006.229.05:26:05.57#ibcon#about to read 6, iclass 24, count 2 2006.229.05:26:05.57#ibcon#read 6, iclass 24, count 2 2006.229.05:26:05.57#ibcon#end of sib2, iclass 24, count 2 2006.229.05:26:05.57#ibcon#*mode == 0, iclass 24, count 2 2006.229.05:26:05.57#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.05:26:05.57#ibcon#[25=AT05-04\r\n] 2006.229.05:26:05.57#ibcon#*before write, iclass 24, count 2 2006.229.05:26:05.57#ibcon#enter sib2, iclass 24, count 2 2006.229.05:26:05.57#ibcon#flushed, iclass 24, count 2 2006.229.05:26:05.57#ibcon#about to write, iclass 24, count 2 2006.229.05:26:05.57#ibcon#wrote, iclass 24, count 2 2006.229.05:26:05.57#ibcon#about to read 3, iclass 24, count 2 2006.229.05:26:05.60#ibcon#read 3, iclass 24, count 2 2006.229.05:26:05.60#ibcon#about to read 4, iclass 24, count 2 2006.229.05:26:05.60#ibcon#read 4, iclass 24, count 2 2006.229.05:26:05.60#ibcon#about to read 5, iclass 24, count 2 2006.229.05:26:05.60#ibcon#read 5, iclass 24, count 2 2006.229.05:26:05.60#ibcon#about to read 6, iclass 24, count 2 2006.229.05:26:05.60#ibcon#read 6, iclass 24, count 2 2006.229.05:26:05.60#ibcon#end of sib2, iclass 24, count 2 2006.229.05:26:05.60#ibcon#*after write, iclass 24, count 2 2006.229.05:26:05.60#ibcon#*before return 0, iclass 24, count 2 2006.229.05:26:05.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:05.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:05.60#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.05:26:05.60#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:05.60#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:05.72#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:05.72#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:05.72#ibcon#enter wrdev, iclass 24, count 0 2006.229.05:26:05.72#ibcon#first serial, iclass 24, count 0 2006.229.05:26:05.72#ibcon#enter sib2, iclass 24, count 0 2006.229.05:26:05.72#ibcon#flushed, iclass 24, count 0 2006.229.05:26:05.72#ibcon#about to write, iclass 24, count 0 2006.229.05:26:05.72#ibcon#wrote, iclass 24, count 0 2006.229.05:26:05.72#ibcon#about to read 3, iclass 24, count 0 2006.229.05:26:05.74#ibcon#read 3, iclass 24, count 0 2006.229.05:26:05.74#ibcon#about to read 4, iclass 24, count 0 2006.229.05:26:05.74#ibcon#read 4, iclass 24, count 0 2006.229.05:26:05.74#ibcon#about to read 5, iclass 24, count 0 2006.229.05:26:05.74#ibcon#read 5, iclass 24, count 0 2006.229.05:26:05.74#ibcon#about to read 6, iclass 24, count 0 2006.229.05:26:05.74#ibcon#read 6, iclass 24, count 0 2006.229.05:26:05.74#ibcon#end of sib2, iclass 24, count 0 2006.229.05:26:05.74#ibcon#*mode == 0, iclass 24, count 0 2006.229.05:26:05.74#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.05:26:05.74#ibcon#[25=USB\r\n] 2006.229.05:26:05.74#ibcon#*before write, iclass 24, count 0 2006.229.05:26:05.74#ibcon#enter sib2, iclass 24, count 0 2006.229.05:26:05.74#ibcon#flushed, iclass 24, count 0 2006.229.05:26:05.74#ibcon#about to write, iclass 24, count 0 2006.229.05:26:05.74#ibcon#wrote, iclass 24, count 0 2006.229.05:26:05.74#ibcon#about to read 3, iclass 24, count 0 2006.229.05:26:05.77#ibcon#read 3, iclass 24, count 0 2006.229.05:26:05.77#ibcon#about to read 4, iclass 24, count 0 2006.229.05:26:05.77#ibcon#read 4, iclass 24, count 0 2006.229.05:26:05.77#ibcon#about to read 5, iclass 24, count 0 2006.229.05:26:05.77#ibcon#read 5, iclass 24, count 0 2006.229.05:26:05.77#ibcon#about to read 6, iclass 24, count 0 2006.229.05:26:05.77#ibcon#read 6, iclass 24, count 0 2006.229.05:26:05.77#ibcon#end of sib2, iclass 24, count 0 2006.229.05:26:05.77#ibcon#*after write, iclass 24, count 0 2006.229.05:26:05.77#ibcon#*before return 0, iclass 24, count 0 2006.229.05:26:05.77#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:05.77#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:05.77#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.05:26:05.77#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.05:26:05.77$vck44/valo=6,814.99 2006.229.05:26:05.77#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.05:26:05.77#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.05:26:05.77#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:05.77#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:05.77#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:05.77#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:05.77#ibcon#enter wrdev, iclass 26, count 0 2006.229.05:26:05.77#ibcon#first serial, iclass 26, count 0 2006.229.05:26:05.77#ibcon#enter sib2, iclass 26, count 0 2006.229.05:26:05.77#ibcon#flushed, iclass 26, count 0 2006.229.05:26:05.77#ibcon#about to write, iclass 26, count 0 2006.229.05:26:05.77#ibcon#wrote, iclass 26, count 0 2006.229.05:26:05.77#ibcon#about to read 3, iclass 26, count 0 2006.229.05:26:05.79#ibcon#read 3, iclass 26, count 0 2006.229.05:26:05.79#ibcon#about to read 4, iclass 26, count 0 2006.229.05:26:05.79#ibcon#read 4, iclass 26, count 0 2006.229.05:26:05.79#ibcon#about to read 5, iclass 26, count 0 2006.229.05:26:05.79#ibcon#read 5, iclass 26, count 0 2006.229.05:26:05.79#ibcon#about to read 6, iclass 26, count 0 2006.229.05:26:05.79#ibcon#read 6, iclass 26, count 0 2006.229.05:26:05.79#ibcon#end of sib2, iclass 26, count 0 2006.229.05:26:05.79#ibcon#*mode == 0, iclass 26, count 0 2006.229.05:26:05.79#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.05:26:05.79#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:26:05.79#ibcon#*before write, iclass 26, count 0 2006.229.05:26:05.79#ibcon#enter sib2, iclass 26, count 0 2006.229.05:26:05.79#ibcon#flushed, iclass 26, count 0 2006.229.05:26:05.79#ibcon#about to write, iclass 26, count 0 2006.229.05:26:05.79#ibcon#wrote, iclass 26, count 0 2006.229.05:26:05.79#ibcon#about to read 3, iclass 26, count 0 2006.229.05:26:05.83#ibcon#read 3, iclass 26, count 0 2006.229.05:26:05.83#ibcon#about to read 4, iclass 26, count 0 2006.229.05:26:05.83#ibcon#read 4, iclass 26, count 0 2006.229.05:26:05.83#ibcon#about to read 5, iclass 26, count 0 2006.229.05:26:05.83#ibcon#read 5, iclass 26, count 0 2006.229.05:26:05.83#ibcon#about to read 6, iclass 26, count 0 2006.229.05:26:05.83#ibcon#read 6, iclass 26, count 0 2006.229.05:26:05.83#ibcon#end of sib2, iclass 26, count 0 2006.229.05:26:05.83#ibcon#*after write, iclass 26, count 0 2006.229.05:26:05.83#ibcon#*before return 0, iclass 26, count 0 2006.229.05:26:05.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:05.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:05.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.05:26:05.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.05:26:05.83$vck44/va=6,4 2006.229.05:26:05.83#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.05:26:05.83#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.05:26:05.83#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:05.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:05.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:05.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:05.89#ibcon#enter wrdev, iclass 28, count 2 2006.229.05:26:05.89#ibcon#first serial, iclass 28, count 2 2006.229.05:26:05.89#ibcon#enter sib2, iclass 28, count 2 2006.229.05:26:05.89#ibcon#flushed, iclass 28, count 2 2006.229.05:26:05.89#ibcon#about to write, iclass 28, count 2 2006.229.05:26:05.89#ibcon#wrote, iclass 28, count 2 2006.229.05:26:05.89#ibcon#about to read 3, iclass 28, count 2 2006.229.05:26:05.91#ibcon#read 3, iclass 28, count 2 2006.229.05:26:05.91#ibcon#about to read 4, iclass 28, count 2 2006.229.05:26:05.91#ibcon#read 4, iclass 28, count 2 2006.229.05:26:05.91#ibcon#about to read 5, iclass 28, count 2 2006.229.05:26:05.91#ibcon#read 5, iclass 28, count 2 2006.229.05:26:05.91#ibcon#about to read 6, iclass 28, count 2 2006.229.05:26:05.91#ibcon#read 6, iclass 28, count 2 2006.229.05:26:05.91#ibcon#end of sib2, iclass 28, count 2 2006.229.05:26:05.91#ibcon#*mode == 0, iclass 28, count 2 2006.229.05:26:05.91#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.05:26:05.91#ibcon#[25=AT06-04\r\n] 2006.229.05:26:05.91#ibcon#*before write, iclass 28, count 2 2006.229.05:26:05.91#ibcon#enter sib2, iclass 28, count 2 2006.229.05:26:05.91#ibcon#flushed, iclass 28, count 2 2006.229.05:26:05.91#ibcon#about to write, iclass 28, count 2 2006.229.05:26:05.91#ibcon#wrote, iclass 28, count 2 2006.229.05:26:05.91#ibcon#about to read 3, iclass 28, count 2 2006.229.05:26:05.94#ibcon#read 3, iclass 28, count 2 2006.229.05:26:05.94#ibcon#about to read 4, iclass 28, count 2 2006.229.05:26:05.94#ibcon#read 4, iclass 28, count 2 2006.229.05:26:05.94#ibcon#about to read 5, iclass 28, count 2 2006.229.05:26:05.94#ibcon#read 5, iclass 28, count 2 2006.229.05:26:05.94#ibcon#about to read 6, iclass 28, count 2 2006.229.05:26:05.94#ibcon#read 6, iclass 28, count 2 2006.229.05:26:05.94#ibcon#end of sib2, iclass 28, count 2 2006.229.05:26:05.94#ibcon#*after write, iclass 28, count 2 2006.229.05:26:05.94#ibcon#*before return 0, iclass 28, count 2 2006.229.05:26:05.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:05.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:05.94#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.05:26:05.94#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:05.94#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:06.06#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:06.06#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:06.06#ibcon#enter wrdev, iclass 28, count 0 2006.229.05:26:06.06#ibcon#first serial, iclass 28, count 0 2006.229.05:26:06.06#ibcon#enter sib2, iclass 28, count 0 2006.229.05:26:06.06#ibcon#flushed, iclass 28, count 0 2006.229.05:26:06.06#ibcon#about to write, iclass 28, count 0 2006.229.05:26:06.06#ibcon#wrote, iclass 28, count 0 2006.229.05:26:06.06#ibcon#about to read 3, iclass 28, count 0 2006.229.05:26:06.08#ibcon#read 3, iclass 28, count 0 2006.229.05:26:06.08#ibcon#about to read 4, iclass 28, count 0 2006.229.05:26:06.08#ibcon#read 4, iclass 28, count 0 2006.229.05:26:06.08#ibcon#about to read 5, iclass 28, count 0 2006.229.05:26:06.08#ibcon#read 5, iclass 28, count 0 2006.229.05:26:06.08#ibcon#about to read 6, iclass 28, count 0 2006.229.05:26:06.08#ibcon#read 6, iclass 28, count 0 2006.229.05:26:06.08#ibcon#end of sib2, iclass 28, count 0 2006.229.05:26:06.08#ibcon#*mode == 0, iclass 28, count 0 2006.229.05:26:06.08#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.05:26:06.08#ibcon#[25=USB\r\n] 2006.229.05:26:06.08#ibcon#*before write, iclass 28, count 0 2006.229.05:26:06.08#ibcon#enter sib2, iclass 28, count 0 2006.229.05:26:06.08#ibcon#flushed, iclass 28, count 0 2006.229.05:26:06.08#ibcon#about to write, iclass 28, count 0 2006.229.05:26:06.08#ibcon#wrote, iclass 28, count 0 2006.229.05:26:06.08#ibcon#about to read 3, iclass 28, count 0 2006.229.05:26:06.11#ibcon#read 3, iclass 28, count 0 2006.229.05:26:06.11#ibcon#about to read 4, iclass 28, count 0 2006.229.05:26:06.11#ibcon#read 4, iclass 28, count 0 2006.229.05:26:06.11#ibcon#about to read 5, iclass 28, count 0 2006.229.05:26:06.11#ibcon#read 5, iclass 28, count 0 2006.229.05:26:06.11#ibcon#about to read 6, iclass 28, count 0 2006.229.05:26:06.11#ibcon#read 6, iclass 28, count 0 2006.229.05:26:06.11#ibcon#end of sib2, iclass 28, count 0 2006.229.05:26:06.11#ibcon#*after write, iclass 28, count 0 2006.229.05:26:06.11#ibcon#*before return 0, iclass 28, count 0 2006.229.05:26:06.11#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:06.11#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:06.11#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.05:26:06.11#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.05:26:06.11$vck44/valo=7,864.99 2006.229.05:26:06.11#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.05:26:06.11#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.05:26:06.11#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:06.11#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:06.11#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:06.11#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:06.11#ibcon#enter wrdev, iclass 30, count 0 2006.229.05:26:06.11#ibcon#first serial, iclass 30, count 0 2006.229.05:26:06.11#ibcon#enter sib2, iclass 30, count 0 2006.229.05:26:06.11#ibcon#flushed, iclass 30, count 0 2006.229.05:26:06.11#ibcon#about to write, iclass 30, count 0 2006.229.05:26:06.11#ibcon#wrote, iclass 30, count 0 2006.229.05:26:06.11#ibcon#about to read 3, iclass 30, count 0 2006.229.05:26:06.13#ibcon#read 3, iclass 30, count 0 2006.229.05:26:06.13#ibcon#about to read 4, iclass 30, count 0 2006.229.05:26:06.13#ibcon#read 4, iclass 30, count 0 2006.229.05:26:06.13#ibcon#about to read 5, iclass 30, count 0 2006.229.05:26:06.13#ibcon#read 5, iclass 30, count 0 2006.229.05:26:06.13#ibcon#about to read 6, iclass 30, count 0 2006.229.05:26:06.13#ibcon#read 6, iclass 30, count 0 2006.229.05:26:06.13#ibcon#end of sib2, iclass 30, count 0 2006.229.05:26:06.13#ibcon#*mode == 0, iclass 30, count 0 2006.229.05:26:06.13#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.05:26:06.13#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:26:06.13#ibcon#*before write, iclass 30, count 0 2006.229.05:26:06.13#ibcon#enter sib2, iclass 30, count 0 2006.229.05:26:06.13#ibcon#flushed, iclass 30, count 0 2006.229.05:26:06.13#ibcon#about to write, iclass 30, count 0 2006.229.05:26:06.13#ibcon#wrote, iclass 30, count 0 2006.229.05:26:06.13#ibcon#about to read 3, iclass 30, count 0 2006.229.05:26:06.17#ibcon#read 3, iclass 30, count 0 2006.229.05:26:06.17#ibcon#about to read 4, iclass 30, count 0 2006.229.05:26:06.17#ibcon#read 4, iclass 30, count 0 2006.229.05:26:06.17#ibcon#about to read 5, iclass 30, count 0 2006.229.05:26:06.17#ibcon#read 5, iclass 30, count 0 2006.229.05:26:06.17#ibcon#about to read 6, iclass 30, count 0 2006.229.05:26:06.17#ibcon#read 6, iclass 30, count 0 2006.229.05:26:06.17#ibcon#end of sib2, iclass 30, count 0 2006.229.05:26:06.17#ibcon#*after write, iclass 30, count 0 2006.229.05:26:06.17#ibcon#*before return 0, iclass 30, count 0 2006.229.05:26:06.17#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:06.17#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:06.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.05:26:06.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.05:26:06.17$vck44/va=7,5 2006.229.05:26:06.17#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.05:26:06.17#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.05:26:06.17#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:06.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:06.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:06.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:06.23#ibcon#enter wrdev, iclass 32, count 2 2006.229.05:26:06.23#ibcon#first serial, iclass 32, count 2 2006.229.05:26:06.23#ibcon#enter sib2, iclass 32, count 2 2006.229.05:26:06.23#ibcon#flushed, iclass 32, count 2 2006.229.05:26:06.23#ibcon#about to write, iclass 32, count 2 2006.229.05:26:06.23#ibcon#wrote, iclass 32, count 2 2006.229.05:26:06.23#ibcon#about to read 3, iclass 32, count 2 2006.229.05:26:06.25#ibcon#read 3, iclass 32, count 2 2006.229.05:26:06.25#ibcon#about to read 4, iclass 32, count 2 2006.229.05:26:06.25#ibcon#read 4, iclass 32, count 2 2006.229.05:26:06.25#ibcon#about to read 5, iclass 32, count 2 2006.229.05:26:06.25#ibcon#read 5, iclass 32, count 2 2006.229.05:26:06.25#ibcon#about to read 6, iclass 32, count 2 2006.229.05:26:06.25#ibcon#read 6, iclass 32, count 2 2006.229.05:26:06.25#ibcon#end of sib2, iclass 32, count 2 2006.229.05:26:06.25#ibcon#*mode == 0, iclass 32, count 2 2006.229.05:26:06.25#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.05:26:06.25#ibcon#[25=AT07-05\r\n] 2006.229.05:26:06.25#ibcon#*before write, iclass 32, count 2 2006.229.05:26:06.25#ibcon#enter sib2, iclass 32, count 2 2006.229.05:26:06.25#ibcon#flushed, iclass 32, count 2 2006.229.05:26:06.25#ibcon#about to write, iclass 32, count 2 2006.229.05:26:06.25#ibcon#wrote, iclass 32, count 2 2006.229.05:26:06.25#ibcon#about to read 3, iclass 32, count 2 2006.229.05:26:06.28#ibcon#read 3, iclass 32, count 2 2006.229.05:26:06.28#ibcon#about to read 4, iclass 32, count 2 2006.229.05:26:06.28#ibcon#read 4, iclass 32, count 2 2006.229.05:26:06.28#ibcon#about to read 5, iclass 32, count 2 2006.229.05:26:06.28#ibcon#read 5, iclass 32, count 2 2006.229.05:26:06.28#ibcon#about to read 6, iclass 32, count 2 2006.229.05:26:06.28#ibcon#read 6, iclass 32, count 2 2006.229.05:26:06.28#ibcon#end of sib2, iclass 32, count 2 2006.229.05:26:06.28#ibcon#*after write, iclass 32, count 2 2006.229.05:26:06.28#ibcon#*before return 0, iclass 32, count 2 2006.229.05:26:06.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:06.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:06.28#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.05:26:06.28#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:06.28#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:06.40#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:06.40#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:06.40#ibcon#enter wrdev, iclass 32, count 0 2006.229.05:26:06.40#ibcon#first serial, iclass 32, count 0 2006.229.05:26:06.40#ibcon#enter sib2, iclass 32, count 0 2006.229.05:26:06.40#ibcon#flushed, iclass 32, count 0 2006.229.05:26:06.40#ibcon#about to write, iclass 32, count 0 2006.229.05:26:06.40#ibcon#wrote, iclass 32, count 0 2006.229.05:26:06.40#ibcon#about to read 3, iclass 32, count 0 2006.229.05:26:06.42#ibcon#read 3, iclass 32, count 0 2006.229.05:26:06.42#ibcon#about to read 4, iclass 32, count 0 2006.229.05:26:06.42#ibcon#read 4, iclass 32, count 0 2006.229.05:26:06.42#ibcon#about to read 5, iclass 32, count 0 2006.229.05:26:06.42#ibcon#read 5, iclass 32, count 0 2006.229.05:26:06.42#ibcon#about to read 6, iclass 32, count 0 2006.229.05:26:06.42#ibcon#read 6, iclass 32, count 0 2006.229.05:26:06.42#ibcon#end of sib2, iclass 32, count 0 2006.229.05:26:06.42#ibcon#*mode == 0, iclass 32, count 0 2006.229.05:26:06.42#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.05:26:06.42#ibcon#[25=USB\r\n] 2006.229.05:26:06.42#ibcon#*before write, iclass 32, count 0 2006.229.05:26:06.42#ibcon#enter sib2, iclass 32, count 0 2006.229.05:26:06.42#ibcon#flushed, iclass 32, count 0 2006.229.05:26:06.42#ibcon#about to write, iclass 32, count 0 2006.229.05:26:06.42#ibcon#wrote, iclass 32, count 0 2006.229.05:26:06.42#ibcon#about to read 3, iclass 32, count 0 2006.229.05:26:06.45#ibcon#read 3, iclass 32, count 0 2006.229.05:26:06.45#ibcon#about to read 4, iclass 32, count 0 2006.229.05:26:06.45#ibcon#read 4, iclass 32, count 0 2006.229.05:26:06.45#ibcon#about to read 5, iclass 32, count 0 2006.229.05:26:06.45#ibcon#read 5, iclass 32, count 0 2006.229.05:26:06.45#ibcon#about to read 6, iclass 32, count 0 2006.229.05:26:06.45#ibcon#read 6, iclass 32, count 0 2006.229.05:26:06.45#ibcon#end of sib2, iclass 32, count 0 2006.229.05:26:06.45#ibcon#*after write, iclass 32, count 0 2006.229.05:26:06.45#ibcon#*before return 0, iclass 32, count 0 2006.229.05:26:06.45#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:06.45#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:06.45#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.05:26:06.45#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.05:26:06.45$vck44/valo=8,884.99 2006.229.05:26:06.45#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.05:26:06.45#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.05:26:06.45#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:06.45#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:06.45#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:06.45#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:06.45#ibcon#enter wrdev, iclass 34, count 0 2006.229.05:26:06.45#ibcon#first serial, iclass 34, count 0 2006.229.05:26:06.45#ibcon#enter sib2, iclass 34, count 0 2006.229.05:26:06.45#ibcon#flushed, iclass 34, count 0 2006.229.05:26:06.45#ibcon#about to write, iclass 34, count 0 2006.229.05:26:06.45#ibcon#wrote, iclass 34, count 0 2006.229.05:26:06.45#ibcon#about to read 3, iclass 34, count 0 2006.229.05:26:06.47#ibcon#read 3, iclass 34, count 0 2006.229.05:26:06.47#ibcon#about to read 4, iclass 34, count 0 2006.229.05:26:06.47#ibcon#read 4, iclass 34, count 0 2006.229.05:26:06.47#ibcon#about to read 5, iclass 34, count 0 2006.229.05:26:06.47#ibcon#read 5, iclass 34, count 0 2006.229.05:26:06.47#ibcon#about to read 6, iclass 34, count 0 2006.229.05:26:06.47#ibcon#read 6, iclass 34, count 0 2006.229.05:26:06.47#ibcon#end of sib2, iclass 34, count 0 2006.229.05:26:06.47#ibcon#*mode == 0, iclass 34, count 0 2006.229.05:26:06.47#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.05:26:06.47#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:26:06.47#ibcon#*before write, iclass 34, count 0 2006.229.05:26:06.47#ibcon#enter sib2, iclass 34, count 0 2006.229.05:26:06.47#ibcon#flushed, iclass 34, count 0 2006.229.05:26:06.47#ibcon#about to write, iclass 34, count 0 2006.229.05:26:06.47#ibcon#wrote, iclass 34, count 0 2006.229.05:26:06.47#ibcon#about to read 3, iclass 34, count 0 2006.229.05:26:06.51#ibcon#read 3, iclass 34, count 0 2006.229.05:26:06.51#ibcon#about to read 4, iclass 34, count 0 2006.229.05:26:06.51#ibcon#read 4, iclass 34, count 0 2006.229.05:26:06.51#ibcon#about to read 5, iclass 34, count 0 2006.229.05:26:06.51#ibcon#read 5, iclass 34, count 0 2006.229.05:26:06.51#ibcon#about to read 6, iclass 34, count 0 2006.229.05:26:06.51#ibcon#read 6, iclass 34, count 0 2006.229.05:26:06.51#ibcon#end of sib2, iclass 34, count 0 2006.229.05:26:06.51#ibcon#*after write, iclass 34, count 0 2006.229.05:26:06.51#ibcon#*before return 0, iclass 34, count 0 2006.229.05:26:06.51#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:06.51#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:06.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.05:26:06.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.05:26:06.51$vck44/va=8,6 2006.229.05:26:06.51#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.05:26:06.51#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.05:26:06.51#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:06.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.05:26:06.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.05:26:06.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.05:26:06.57#ibcon#enter wrdev, iclass 36, count 2 2006.229.05:26:06.57#ibcon#first serial, iclass 36, count 2 2006.229.05:26:06.57#ibcon#enter sib2, iclass 36, count 2 2006.229.05:26:06.57#ibcon#flushed, iclass 36, count 2 2006.229.05:26:06.57#ibcon#about to write, iclass 36, count 2 2006.229.05:26:06.57#ibcon#wrote, iclass 36, count 2 2006.229.05:26:06.57#ibcon#about to read 3, iclass 36, count 2 2006.229.05:26:06.59#ibcon#read 3, iclass 36, count 2 2006.229.05:26:06.59#ibcon#about to read 4, iclass 36, count 2 2006.229.05:26:06.59#ibcon#read 4, iclass 36, count 2 2006.229.05:26:06.59#ibcon#about to read 5, iclass 36, count 2 2006.229.05:26:06.59#ibcon#read 5, iclass 36, count 2 2006.229.05:26:06.59#ibcon#about to read 6, iclass 36, count 2 2006.229.05:26:06.59#ibcon#read 6, iclass 36, count 2 2006.229.05:26:06.59#ibcon#end of sib2, iclass 36, count 2 2006.229.05:26:06.59#ibcon#*mode == 0, iclass 36, count 2 2006.229.05:26:06.59#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.05:26:06.59#ibcon#[25=AT08-06\r\n] 2006.229.05:26:06.59#ibcon#*before write, iclass 36, count 2 2006.229.05:26:06.59#ibcon#enter sib2, iclass 36, count 2 2006.229.05:26:06.59#ibcon#flushed, iclass 36, count 2 2006.229.05:26:06.59#ibcon#about to write, iclass 36, count 2 2006.229.05:26:06.59#ibcon#wrote, iclass 36, count 2 2006.229.05:26:06.59#ibcon#about to read 3, iclass 36, count 2 2006.229.05:26:06.62#ibcon#read 3, iclass 36, count 2 2006.229.05:26:06.62#ibcon#about to read 4, iclass 36, count 2 2006.229.05:26:06.62#ibcon#read 4, iclass 36, count 2 2006.229.05:26:06.62#ibcon#about to read 5, iclass 36, count 2 2006.229.05:26:06.62#ibcon#read 5, iclass 36, count 2 2006.229.05:26:06.62#ibcon#about to read 6, iclass 36, count 2 2006.229.05:26:06.62#ibcon#read 6, iclass 36, count 2 2006.229.05:26:06.62#ibcon#end of sib2, iclass 36, count 2 2006.229.05:26:06.62#ibcon#*after write, iclass 36, count 2 2006.229.05:26:06.62#ibcon#*before return 0, iclass 36, count 2 2006.229.05:26:06.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.05:26:06.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.05:26:06.62#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.05:26:06.62#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:06.62#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.05:26:06.74#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.05:26:06.74#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.05:26:06.74#ibcon#enter wrdev, iclass 36, count 0 2006.229.05:26:06.74#ibcon#first serial, iclass 36, count 0 2006.229.05:26:06.74#ibcon#enter sib2, iclass 36, count 0 2006.229.05:26:06.74#ibcon#flushed, iclass 36, count 0 2006.229.05:26:06.74#ibcon#about to write, iclass 36, count 0 2006.229.05:26:06.74#ibcon#wrote, iclass 36, count 0 2006.229.05:26:06.74#ibcon#about to read 3, iclass 36, count 0 2006.229.05:26:06.76#ibcon#read 3, iclass 36, count 0 2006.229.05:26:06.76#ibcon#about to read 4, iclass 36, count 0 2006.229.05:26:06.76#ibcon#read 4, iclass 36, count 0 2006.229.05:26:06.76#ibcon#about to read 5, iclass 36, count 0 2006.229.05:26:06.76#ibcon#read 5, iclass 36, count 0 2006.229.05:26:06.76#ibcon#about to read 6, iclass 36, count 0 2006.229.05:26:06.76#ibcon#read 6, iclass 36, count 0 2006.229.05:26:06.76#ibcon#end of sib2, iclass 36, count 0 2006.229.05:26:06.76#ibcon#*mode == 0, iclass 36, count 0 2006.229.05:26:06.76#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.05:26:06.76#ibcon#[25=USB\r\n] 2006.229.05:26:06.76#ibcon#*before write, iclass 36, count 0 2006.229.05:26:06.76#ibcon#enter sib2, iclass 36, count 0 2006.229.05:26:06.76#ibcon#flushed, iclass 36, count 0 2006.229.05:26:06.76#ibcon#about to write, iclass 36, count 0 2006.229.05:26:06.76#ibcon#wrote, iclass 36, count 0 2006.229.05:26:06.76#ibcon#about to read 3, iclass 36, count 0 2006.229.05:26:06.79#ibcon#read 3, iclass 36, count 0 2006.229.05:26:06.79#ibcon#about to read 4, iclass 36, count 0 2006.229.05:26:06.79#ibcon#read 4, iclass 36, count 0 2006.229.05:26:06.79#ibcon#about to read 5, iclass 36, count 0 2006.229.05:26:06.79#ibcon#read 5, iclass 36, count 0 2006.229.05:26:06.79#ibcon#about to read 6, iclass 36, count 0 2006.229.05:26:06.79#ibcon#read 6, iclass 36, count 0 2006.229.05:26:06.79#ibcon#end of sib2, iclass 36, count 0 2006.229.05:26:06.79#ibcon#*after write, iclass 36, count 0 2006.229.05:26:06.79#ibcon#*before return 0, iclass 36, count 0 2006.229.05:26:06.79#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.05:26:06.79#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.05:26:06.79#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.05:26:06.79#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.05:26:06.79$vck44/vblo=1,629.99 2006.229.05:26:06.79#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.05:26:06.79#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.05:26:06.79#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:06.79#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.05:26:06.79#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.05:26:06.79#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.05:26:06.79#ibcon#enter wrdev, iclass 38, count 0 2006.229.05:26:06.79#ibcon#first serial, iclass 38, count 0 2006.229.05:26:06.79#ibcon#enter sib2, iclass 38, count 0 2006.229.05:26:06.79#ibcon#flushed, iclass 38, count 0 2006.229.05:26:06.79#ibcon#about to write, iclass 38, count 0 2006.229.05:26:06.79#ibcon#wrote, iclass 38, count 0 2006.229.05:26:06.79#ibcon#about to read 3, iclass 38, count 0 2006.229.05:26:06.81#ibcon#read 3, iclass 38, count 0 2006.229.05:26:06.81#ibcon#about to read 4, iclass 38, count 0 2006.229.05:26:06.81#ibcon#read 4, iclass 38, count 0 2006.229.05:26:06.81#ibcon#about to read 5, iclass 38, count 0 2006.229.05:26:06.81#ibcon#read 5, iclass 38, count 0 2006.229.05:26:06.81#ibcon#about to read 6, iclass 38, count 0 2006.229.05:26:06.81#ibcon#read 6, iclass 38, count 0 2006.229.05:26:06.81#ibcon#end of sib2, iclass 38, count 0 2006.229.05:26:06.81#ibcon#*mode == 0, iclass 38, count 0 2006.229.05:26:06.81#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.05:26:06.81#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:26:06.81#ibcon#*before write, iclass 38, count 0 2006.229.05:26:06.81#ibcon#enter sib2, iclass 38, count 0 2006.229.05:26:06.81#ibcon#flushed, iclass 38, count 0 2006.229.05:26:06.81#ibcon#about to write, iclass 38, count 0 2006.229.05:26:06.81#ibcon#wrote, iclass 38, count 0 2006.229.05:26:06.81#ibcon#about to read 3, iclass 38, count 0 2006.229.05:26:06.85#ibcon#read 3, iclass 38, count 0 2006.229.05:26:06.85#ibcon#about to read 4, iclass 38, count 0 2006.229.05:26:06.85#ibcon#read 4, iclass 38, count 0 2006.229.05:26:06.85#ibcon#about to read 5, iclass 38, count 0 2006.229.05:26:06.85#ibcon#read 5, iclass 38, count 0 2006.229.05:26:06.85#ibcon#about to read 6, iclass 38, count 0 2006.229.05:26:06.85#ibcon#read 6, iclass 38, count 0 2006.229.05:26:06.85#ibcon#end of sib2, iclass 38, count 0 2006.229.05:26:06.85#ibcon#*after write, iclass 38, count 0 2006.229.05:26:06.85#ibcon#*before return 0, iclass 38, count 0 2006.229.05:26:06.85#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.05:26:06.85#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.05:26:06.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.05:26:06.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.05:26:06.85$vck44/vb=1,4 2006.229.05:26:06.85#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.05:26:06.85#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.05:26:06.85#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:06.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.05:26:06.85#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.05:26:06.85#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.05:26:06.85#ibcon#enter wrdev, iclass 40, count 2 2006.229.05:26:06.85#ibcon#first serial, iclass 40, count 2 2006.229.05:26:06.85#ibcon#enter sib2, iclass 40, count 2 2006.229.05:26:06.85#ibcon#flushed, iclass 40, count 2 2006.229.05:26:06.85#ibcon#about to write, iclass 40, count 2 2006.229.05:26:06.85#ibcon#wrote, iclass 40, count 2 2006.229.05:26:06.85#ibcon#about to read 3, iclass 40, count 2 2006.229.05:26:06.87#ibcon#read 3, iclass 40, count 2 2006.229.05:26:06.87#ibcon#about to read 4, iclass 40, count 2 2006.229.05:26:06.87#ibcon#read 4, iclass 40, count 2 2006.229.05:26:06.87#ibcon#about to read 5, iclass 40, count 2 2006.229.05:26:06.87#ibcon#read 5, iclass 40, count 2 2006.229.05:26:06.87#ibcon#about to read 6, iclass 40, count 2 2006.229.05:26:06.87#ibcon#read 6, iclass 40, count 2 2006.229.05:26:06.87#ibcon#end of sib2, iclass 40, count 2 2006.229.05:26:06.87#ibcon#*mode == 0, iclass 40, count 2 2006.229.05:26:06.87#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.05:26:06.87#ibcon#[27=AT01-04\r\n] 2006.229.05:26:06.87#ibcon#*before write, iclass 40, count 2 2006.229.05:26:06.87#ibcon#enter sib2, iclass 40, count 2 2006.229.05:26:06.87#ibcon#flushed, iclass 40, count 2 2006.229.05:26:06.87#ibcon#about to write, iclass 40, count 2 2006.229.05:26:06.87#ibcon#wrote, iclass 40, count 2 2006.229.05:26:06.87#ibcon#about to read 3, iclass 40, count 2 2006.229.05:26:06.90#ibcon#read 3, iclass 40, count 2 2006.229.05:26:06.90#ibcon#about to read 4, iclass 40, count 2 2006.229.05:26:06.90#ibcon#read 4, iclass 40, count 2 2006.229.05:26:06.90#ibcon#about to read 5, iclass 40, count 2 2006.229.05:26:06.90#ibcon#read 5, iclass 40, count 2 2006.229.05:26:06.90#ibcon#about to read 6, iclass 40, count 2 2006.229.05:26:06.90#ibcon#read 6, iclass 40, count 2 2006.229.05:26:06.90#ibcon#end of sib2, iclass 40, count 2 2006.229.05:26:06.90#ibcon#*after write, iclass 40, count 2 2006.229.05:26:06.90#ibcon#*before return 0, iclass 40, count 2 2006.229.05:26:06.90#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.05:26:06.90#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.05:26:06.90#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.05:26:06.90#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:06.90#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.05:26:07.02#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.05:26:07.02#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.05:26:07.02#ibcon#enter wrdev, iclass 40, count 0 2006.229.05:26:07.02#ibcon#first serial, iclass 40, count 0 2006.229.05:26:07.02#ibcon#enter sib2, iclass 40, count 0 2006.229.05:26:07.02#ibcon#flushed, iclass 40, count 0 2006.229.05:26:07.02#ibcon#about to write, iclass 40, count 0 2006.229.05:26:07.02#ibcon#wrote, iclass 40, count 0 2006.229.05:26:07.02#ibcon#about to read 3, iclass 40, count 0 2006.229.05:26:07.04#ibcon#read 3, iclass 40, count 0 2006.229.05:26:07.04#ibcon#about to read 4, iclass 40, count 0 2006.229.05:26:07.04#ibcon#read 4, iclass 40, count 0 2006.229.05:26:07.04#ibcon#about to read 5, iclass 40, count 0 2006.229.05:26:07.04#ibcon#read 5, iclass 40, count 0 2006.229.05:26:07.04#ibcon#about to read 6, iclass 40, count 0 2006.229.05:26:07.04#ibcon#read 6, iclass 40, count 0 2006.229.05:26:07.04#ibcon#end of sib2, iclass 40, count 0 2006.229.05:26:07.04#ibcon#*mode == 0, iclass 40, count 0 2006.229.05:26:07.04#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.05:26:07.04#ibcon#[27=USB\r\n] 2006.229.05:26:07.04#ibcon#*before write, iclass 40, count 0 2006.229.05:26:07.04#ibcon#enter sib2, iclass 40, count 0 2006.229.05:26:07.04#ibcon#flushed, iclass 40, count 0 2006.229.05:26:07.04#ibcon#about to write, iclass 40, count 0 2006.229.05:26:07.04#ibcon#wrote, iclass 40, count 0 2006.229.05:26:07.04#ibcon#about to read 3, iclass 40, count 0 2006.229.05:26:07.07#ibcon#read 3, iclass 40, count 0 2006.229.05:26:07.07#ibcon#about to read 4, iclass 40, count 0 2006.229.05:26:07.07#ibcon#read 4, iclass 40, count 0 2006.229.05:26:07.07#ibcon#about to read 5, iclass 40, count 0 2006.229.05:26:07.07#ibcon#read 5, iclass 40, count 0 2006.229.05:26:07.07#ibcon#about to read 6, iclass 40, count 0 2006.229.05:26:07.07#ibcon#read 6, iclass 40, count 0 2006.229.05:26:07.07#ibcon#end of sib2, iclass 40, count 0 2006.229.05:26:07.07#ibcon#*after write, iclass 40, count 0 2006.229.05:26:07.07#ibcon#*before return 0, iclass 40, count 0 2006.229.05:26:07.07#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.05:26:07.07#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.05:26:07.07#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.05:26:07.07#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.05:26:07.07$vck44/vblo=2,634.99 2006.229.05:26:07.07#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.05:26:07.07#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.05:26:07.07#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:07.07#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:07.07#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:07.07#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:07.07#ibcon#enter wrdev, iclass 4, count 0 2006.229.05:26:07.07#ibcon#first serial, iclass 4, count 0 2006.229.05:26:07.07#ibcon#enter sib2, iclass 4, count 0 2006.229.05:26:07.07#ibcon#flushed, iclass 4, count 0 2006.229.05:26:07.07#ibcon#about to write, iclass 4, count 0 2006.229.05:26:07.07#ibcon#wrote, iclass 4, count 0 2006.229.05:26:07.07#ibcon#about to read 3, iclass 4, count 0 2006.229.05:26:07.09#ibcon#read 3, iclass 4, count 0 2006.229.05:26:07.09#ibcon#about to read 4, iclass 4, count 0 2006.229.05:26:07.09#ibcon#read 4, iclass 4, count 0 2006.229.05:26:07.09#ibcon#about to read 5, iclass 4, count 0 2006.229.05:26:07.09#ibcon#read 5, iclass 4, count 0 2006.229.05:26:07.09#ibcon#about to read 6, iclass 4, count 0 2006.229.05:26:07.09#ibcon#read 6, iclass 4, count 0 2006.229.05:26:07.09#ibcon#end of sib2, iclass 4, count 0 2006.229.05:26:07.09#ibcon#*mode == 0, iclass 4, count 0 2006.229.05:26:07.09#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.05:26:07.09#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:26:07.09#ibcon#*before write, iclass 4, count 0 2006.229.05:26:07.09#ibcon#enter sib2, iclass 4, count 0 2006.229.05:26:07.09#ibcon#flushed, iclass 4, count 0 2006.229.05:26:07.09#ibcon#about to write, iclass 4, count 0 2006.229.05:26:07.09#ibcon#wrote, iclass 4, count 0 2006.229.05:26:07.09#ibcon#about to read 3, iclass 4, count 0 2006.229.05:26:07.13#ibcon#read 3, iclass 4, count 0 2006.229.05:26:07.13#ibcon#about to read 4, iclass 4, count 0 2006.229.05:26:07.13#ibcon#read 4, iclass 4, count 0 2006.229.05:26:07.13#ibcon#about to read 5, iclass 4, count 0 2006.229.05:26:07.13#ibcon#read 5, iclass 4, count 0 2006.229.05:26:07.13#ibcon#about to read 6, iclass 4, count 0 2006.229.05:26:07.13#ibcon#read 6, iclass 4, count 0 2006.229.05:26:07.13#ibcon#end of sib2, iclass 4, count 0 2006.229.05:26:07.13#ibcon#*after write, iclass 4, count 0 2006.229.05:26:07.13#ibcon#*before return 0, iclass 4, count 0 2006.229.05:26:07.13#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:07.13#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.05:26:07.13#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.05:26:07.13#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.05:26:07.13$vck44/vb=2,4 2006.229.05:26:07.13#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.05:26:07.13#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.05:26:07.13#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:07.13#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:07.19#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:07.19#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:07.19#ibcon#enter wrdev, iclass 6, count 2 2006.229.05:26:07.19#ibcon#first serial, iclass 6, count 2 2006.229.05:26:07.19#ibcon#enter sib2, iclass 6, count 2 2006.229.05:26:07.19#ibcon#flushed, iclass 6, count 2 2006.229.05:26:07.19#ibcon#about to write, iclass 6, count 2 2006.229.05:26:07.19#ibcon#wrote, iclass 6, count 2 2006.229.05:26:07.19#ibcon#about to read 3, iclass 6, count 2 2006.229.05:26:07.21#ibcon#read 3, iclass 6, count 2 2006.229.05:26:07.21#ibcon#about to read 4, iclass 6, count 2 2006.229.05:26:07.21#ibcon#read 4, iclass 6, count 2 2006.229.05:26:07.21#ibcon#about to read 5, iclass 6, count 2 2006.229.05:26:07.21#ibcon#read 5, iclass 6, count 2 2006.229.05:26:07.21#ibcon#about to read 6, iclass 6, count 2 2006.229.05:26:07.21#ibcon#read 6, iclass 6, count 2 2006.229.05:26:07.21#ibcon#end of sib2, iclass 6, count 2 2006.229.05:26:07.21#ibcon#*mode == 0, iclass 6, count 2 2006.229.05:26:07.21#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.05:26:07.21#ibcon#[27=AT02-04\r\n] 2006.229.05:26:07.21#ibcon#*before write, iclass 6, count 2 2006.229.05:26:07.21#ibcon#enter sib2, iclass 6, count 2 2006.229.05:26:07.21#ibcon#flushed, iclass 6, count 2 2006.229.05:26:07.21#ibcon#about to write, iclass 6, count 2 2006.229.05:26:07.21#ibcon#wrote, iclass 6, count 2 2006.229.05:26:07.21#ibcon#about to read 3, iclass 6, count 2 2006.229.05:26:07.24#ibcon#read 3, iclass 6, count 2 2006.229.05:26:07.24#ibcon#about to read 4, iclass 6, count 2 2006.229.05:26:07.24#ibcon#read 4, iclass 6, count 2 2006.229.05:26:07.24#ibcon#about to read 5, iclass 6, count 2 2006.229.05:26:07.24#ibcon#read 5, iclass 6, count 2 2006.229.05:26:07.24#ibcon#about to read 6, iclass 6, count 2 2006.229.05:26:07.24#ibcon#read 6, iclass 6, count 2 2006.229.05:26:07.24#ibcon#end of sib2, iclass 6, count 2 2006.229.05:26:07.24#ibcon#*after write, iclass 6, count 2 2006.229.05:26:07.24#ibcon#*before return 0, iclass 6, count 2 2006.229.05:26:07.24#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:07.24#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.05:26:07.24#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.05:26:07.24#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:07.24#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:07.36#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:07.36#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:07.36#ibcon#enter wrdev, iclass 6, count 0 2006.229.05:26:07.36#ibcon#first serial, iclass 6, count 0 2006.229.05:26:07.36#ibcon#enter sib2, iclass 6, count 0 2006.229.05:26:07.36#ibcon#flushed, iclass 6, count 0 2006.229.05:26:07.36#ibcon#about to write, iclass 6, count 0 2006.229.05:26:07.36#ibcon#wrote, iclass 6, count 0 2006.229.05:26:07.36#ibcon#about to read 3, iclass 6, count 0 2006.229.05:26:07.38#ibcon#read 3, iclass 6, count 0 2006.229.05:26:07.38#ibcon#about to read 4, iclass 6, count 0 2006.229.05:26:07.38#ibcon#read 4, iclass 6, count 0 2006.229.05:26:07.38#ibcon#about to read 5, iclass 6, count 0 2006.229.05:26:07.38#ibcon#read 5, iclass 6, count 0 2006.229.05:26:07.38#ibcon#about to read 6, iclass 6, count 0 2006.229.05:26:07.38#ibcon#read 6, iclass 6, count 0 2006.229.05:26:07.38#ibcon#end of sib2, iclass 6, count 0 2006.229.05:26:07.38#ibcon#*mode == 0, iclass 6, count 0 2006.229.05:26:07.38#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.05:26:07.38#ibcon#[27=USB\r\n] 2006.229.05:26:07.38#ibcon#*before write, iclass 6, count 0 2006.229.05:26:07.38#ibcon#enter sib2, iclass 6, count 0 2006.229.05:26:07.38#ibcon#flushed, iclass 6, count 0 2006.229.05:26:07.38#ibcon#about to write, iclass 6, count 0 2006.229.05:26:07.38#ibcon#wrote, iclass 6, count 0 2006.229.05:26:07.38#ibcon#about to read 3, iclass 6, count 0 2006.229.05:26:07.41#ibcon#read 3, iclass 6, count 0 2006.229.05:26:07.41#ibcon#about to read 4, iclass 6, count 0 2006.229.05:26:07.41#ibcon#read 4, iclass 6, count 0 2006.229.05:26:07.41#ibcon#about to read 5, iclass 6, count 0 2006.229.05:26:07.41#ibcon#read 5, iclass 6, count 0 2006.229.05:26:07.41#ibcon#about to read 6, iclass 6, count 0 2006.229.05:26:07.41#ibcon#read 6, iclass 6, count 0 2006.229.05:26:07.41#ibcon#end of sib2, iclass 6, count 0 2006.229.05:26:07.41#ibcon#*after write, iclass 6, count 0 2006.229.05:26:07.41#ibcon#*before return 0, iclass 6, count 0 2006.229.05:26:07.41#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:07.41#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.05:26:07.41#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.05:26:07.41#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.05:26:07.41$vck44/vblo=3,649.99 2006.229.05:26:07.41#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.05:26:07.41#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.05:26:07.41#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:07.41#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:07.41#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:07.41#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:07.41#ibcon#enter wrdev, iclass 10, count 0 2006.229.05:26:07.41#ibcon#first serial, iclass 10, count 0 2006.229.05:26:07.41#ibcon#enter sib2, iclass 10, count 0 2006.229.05:26:07.41#ibcon#flushed, iclass 10, count 0 2006.229.05:26:07.41#ibcon#about to write, iclass 10, count 0 2006.229.05:26:07.41#ibcon#wrote, iclass 10, count 0 2006.229.05:26:07.41#ibcon#about to read 3, iclass 10, count 0 2006.229.05:26:07.43#ibcon#read 3, iclass 10, count 0 2006.229.05:26:07.43#ibcon#about to read 4, iclass 10, count 0 2006.229.05:26:07.43#ibcon#read 4, iclass 10, count 0 2006.229.05:26:07.43#ibcon#about to read 5, iclass 10, count 0 2006.229.05:26:07.43#ibcon#read 5, iclass 10, count 0 2006.229.05:26:07.43#ibcon#about to read 6, iclass 10, count 0 2006.229.05:26:07.43#ibcon#read 6, iclass 10, count 0 2006.229.05:26:07.43#ibcon#end of sib2, iclass 10, count 0 2006.229.05:26:07.43#ibcon#*mode == 0, iclass 10, count 0 2006.229.05:26:07.43#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.05:26:07.43#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:26:07.43#ibcon#*before write, iclass 10, count 0 2006.229.05:26:07.43#ibcon#enter sib2, iclass 10, count 0 2006.229.05:26:07.43#ibcon#flushed, iclass 10, count 0 2006.229.05:26:07.43#ibcon#about to write, iclass 10, count 0 2006.229.05:26:07.43#ibcon#wrote, iclass 10, count 0 2006.229.05:26:07.43#ibcon#about to read 3, iclass 10, count 0 2006.229.05:26:07.47#ibcon#read 3, iclass 10, count 0 2006.229.05:26:07.47#ibcon#about to read 4, iclass 10, count 0 2006.229.05:26:07.47#ibcon#read 4, iclass 10, count 0 2006.229.05:26:07.47#ibcon#about to read 5, iclass 10, count 0 2006.229.05:26:07.47#ibcon#read 5, iclass 10, count 0 2006.229.05:26:07.47#ibcon#about to read 6, iclass 10, count 0 2006.229.05:26:07.47#ibcon#read 6, iclass 10, count 0 2006.229.05:26:07.47#ibcon#end of sib2, iclass 10, count 0 2006.229.05:26:07.47#ibcon#*after write, iclass 10, count 0 2006.229.05:26:07.47#ibcon#*before return 0, iclass 10, count 0 2006.229.05:26:07.47#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:07.47#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:26:07.47#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.05:26:07.47#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.05:26:07.47$vck44/vb=3,4 2006.229.05:26:07.47#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.05:26:07.47#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.05:26:07.47#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:07.47#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:07.53#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:07.53#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:07.53#ibcon#enter wrdev, iclass 12, count 2 2006.229.05:26:07.53#ibcon#first serial, iclass 12, count 2 2006.229.05:26:07.53#ibcon#enter sib2, iclass 12, count 2 2006.229.05:26:07.53#ibcon#flushed, iclass 12, count 2 2006.229.05:26:07.53#ibcon#about to write, iclass 12, count 2 2006.229.05:26:07.53#ibcon#wrote, iclass 12, count 2 2006.229.05:26:07.53#ibcon#about to read 3, iclass 12, count 2 2006.229.05:26:07.55#ibcon#read 3, iclass 12, count 2 2006.229.05:26:07.55#ibcon#about to read 4, iclass 12, count 2 2006.229.05:26:07.55#ibcon#read 4, iclass 12, count 2 2006.229.05:26:07.55#ibcon#about to read 5, iclass 12, count 2 2006.229.05:26:07.55#ibcon#read 5, iclass 12, count 2 2006.229.05:26:07.55#ibcon#about to read 6, iclass 12, count 2 2006.229.05:26:07.55#ibcon#read 6, iclass 12, count 2 2006.229.05:26:07.55#ibcon#end of sib2, iclass 12, count 2 2006.229.05:26:07.55#ibcon#*mode == 0, iclass 12, count 2 2006.229.05:26:07.55#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.05:26:07.55#ibcon#[27=AT03-04\r\n] 2006.229.05:26:07.55#ibcon#*before write, iclass 12, count 2 2006.229.05:26:07.55#ibcon#enter sib2, iclass 12, count 2 2006.229.05:26:07.55#ibcon#flushed, iclass 12, count 2 2006.229.05:26:07.55#ibcon#about to write, iclass 12, count 2 2006.229.05:26:07.55#ibcon#wrote, iclass 12, count 2 2006.229.05:26:07.55#ibcon#about to read 3, iclass 12, count 2 2006.229.05:26:07.58#ibcon#read 3, iclass 12, count 2 2006.229.05:26:07.58#ibcon#about to read 4, iclass 12, count 2 2006.229.05:26:07.58#ibcon#read 4, iclass 12, count 2 2006.229.05:26:07.58#ibcon#about to read 5, iclass 12, count 2 2006.229.05:26:07.58#ibcon#read 5, iclass 12, count 2 2006.229.05:26:07.58#ibcon#about to read 6, iclass 12, count 2 2006.229.05:26:07.58#ibcon#read 6, iclass 12, count 2 2006.229.05:26:07.58#ibcon#end of sib2, iclass 12, count 2 2006.229.05:26:07.58#ibcon#*after write, iclass 12, count 2 2006.229.05:26:07.58#ibcon#*before return 0, iclass 12, count 2 2006.229.05:26:07.58#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:07.58#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.05:26:07.58#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.05:26:07.58#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:07.58#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:07.70#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:07.70#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:07.70#ibcon#enter wrdev, iclass 12, count 0 2006.229.05:26:07.70#ibcon#first serial, iclass 12, count 0 2006.229.05:26:07.70#ibcon#enter sib2, iclass 12, count 0 2006.229.05:26:07.70#ibcon#flushed, iclass 12, count 0 2006.229.05:26:07.70#ibcon#about to write, iclass 12, count 0 2006.229.05:26:07.70#ibcon#wrote, iclass 12, count 0 2006.229.05:26:07.70#ibcon#about to read 3, iclass 12, count 0 2006.229.05:26:07.72#ibcon#read 3, iclass 12, count 0 2006.229.05:26:07.72#ibcon#about to read 4, iclass 12, count 0 2006.229.05:26:07.72#ibcon#read 4, iclass 12, count 0 2006.229.05:26:07.72#ibcon#about to read 5, iclass 12, count 0 2006.229.05:26:07.72#ibcon#read 5, iclass 12, count 0 2006.229.05:26:07.72#ibcon#about to read 6, iclass 12, count 0 2006.229.05:26:07.72#ibcon#read 6, iclass 12, count 0 2006.229.05:26:07.72#ibcon#end of sib2, iclass 12, count 0 2006.229.05:26:07.72#ibcon#*mode == 0, iclass 12, count 0 2006.229.05:26:07.72#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.05:26:07.72#ibcon#[27=USB\r\n] 2006.229.05:26:07.72#ibcon#*before write, iclass 12, count 0 2006.229.05:26:07.72#ibcon#enter sib2, iclass 12, count 0 2006.229.05:26:07.72#ibcon#flushed, iclass 12, count 0 2006.229.05:26:07.72#ibcon#about to write, iclass 12, count 0 2006.229.05:26:07.72#ibcon#wrote, iclass 12, count 0 2006.229.05:26:07.72#ibcon#about to read 3, iclass 12, count 0 2006.229.05:26:07.75#ibcon#read 3, iclass 12, count 0 2006.229.05:26:07.75#ibcon#about to read 4, iclass 12, count 0 2006.229.05:26:07.75#ibcon#read 4, iclass 12, count 0 2006.229.05:26:07.75#ibcon#about to read 5, iclass 12, count 0 2006.229.05:26:07.75#ibcon#read 5, iclass 12, count 0 2006.229.05:26:07.75#ibcon#about to read 6, iclass 12, count 0 2006.229.05:26:07.75#ibcon#read 6, iclass 12, count 0 2006.229.05:26:07.75#ibcon#end of sib2, iclass 12, count 0 2006.229.05:26:07.75#ibcon#*after write, iclass 12, count 0 2006.229.05:26:07.75#ibcon#*before return 0, iclass 12, count 0 2006.229.05:26:07.75#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:07.75#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.05:26:07.75#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.05:26:07.75#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.05:26:07.75$vck44/vblo=4,679.99 2006.229.05:26:07.75#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.05:26:07.75#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.05:26:07.75#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:07.75#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:07.75#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:07.75#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:07.75#ibcon#enter wrdev, iclass 14, count 0 2006.229.05:26:07.75#ibcon#first serial, iclass 14, count 0 2006.229.05:26:07.75#ibcon#enter sib2, iclass 14, count 0 2006.229.05:26:07.75#ibcon#flushed, iclass 14, count 0 2006.229.05:26:07.75#ibcon#about to write, iclass 14, count 0 2006.229.05:26:07.75#ibcon#wrote, iclass 14, count 0 2006.229.05:26:07.75#ibcon#about to read 3, iclass 14, count 0 2006.229.05:26:07.77#ibcon#read 3, iclass 14, count 0 2006.229.05:26:07.77#ibcon#about to read 4, iclass 14, count 0 2006.229.05:26:07.77#ibcon#read 4, iclass 14, count 0 2006.229.05:26:07.77#ibcon#about to read 5, iclass 14, count 0 2006.229.05:26:07.77#ibcon#read 5, iclass 14, count 0 2006.229.05:26:07.77#ibcon#about to read 6, iclass 14, count 0 2006.229.05:26:07.77#ibcon#read 6, iclass 14, count 0 2006.229.05:26:07.77#ibcon#end of sib2, iclass 14, count 0 2006.229.05:26:07.77#ibcon#*mode == 0, iclass 14, count 0 2006.229.05:26:07.77#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.05:26:07.77#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:26:07.77#ibcon#*before write, iclass 14, count 0 2006.229.05:26:07.77#ibcon#enter sib2, iclass 14, count 0 2006.229.05:26:07.77#ibcon#flushed, iclass 14, count 0 2006.229.05:26:07.77#ibcon#about to write, iclass 14, count 0 2006.229.05:26:07.77#ibcon#wrote, iclass 14, count 0 2006.229.05:26:07.77#ibcon#about to read 3, iclass 14, count 0 2006.229.05:26:07.81#ibcon#read 3, iclass 14, count 0 2006.229.05:26:07.81#ibcon#about to read 4, iclass 14, count 0 2006.229.05:26:07.81#ibcon#read 4, iclass 14, count 0 2006.229.05:26:07.81#ibcon#about to read 5, iclass 14, count 0 2006.229.05:26:07.81#ibcon#read 5, iclass 14, count 0 2006.229.05:26:07.81#ibcon#about to read 6, iclass 14, count 0 2006.229.05:26:07.81#ibcon#read 6, iclass 14, count 0 2006.229.05:26:07.81#ibcon#end of sib2, iclass 14, count 0 2006.229.05:26:07.81#ibcon#*after write, iclass 14, count 0 2006.229.05:26:07.81#ibcon#*before return 0, iclass 14, count 0 2006.229.05:26:07.81#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:07.81#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.05:26:07.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.05:26:07.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.05:26:07.81$vck44/vb=4,4 2006.229.05:26:07.81#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.05:26:07.81#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.05:26:07.81#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:07.81#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:07.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:07.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:07.87#ibcon#enter wrdev, iclass 16, count 2 2006.229.05:26:07.87#ibcon#first serial, iclass 16, count 2 2006.229.05:26:07.87#ibcon#enter sib2, iclass 16, count 2 2006.229.05:26:07.87#ibcon#flushed, iclass 16, count 2 2006.229.05:26:07.87#ibcon#about to write, iclass 16, count 2 2006.229.05:26:07.87#ibcon#wrote, iclass 16, count 2 2006.229.05:26:07.87#ibcon#about to read 3, iclass 16, count 2 2006.229.05:26:07.89#ibcon#read 3, iclass 16, count 2 2006.229.05:26:07.89#ibcon#about to read 4, iclass 16, count 2 2006.229.05:26:07.89#ibcon#read 4, iclass 16, count 2 2006.229.05:26:07.89#ibcon#about to read 5, iclass 16, count 2 2006.229.05:26:07.89#ibcon#read 5, iclass 16, count 2 2006.229.05:26:07.89#ibcon#about to read 6, iclass 16, count 2 2006.229.05:26:07.89#ibcon#read 6, iclass 16, count 2 2006.229.05:26:07.89#ibcon#end of sib2, iclass 16, count 2 2006.229.05:26:07.89#ibcon#*mode == 0, iclass 16, count 2 2006.229.05:26:07.89#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.05:26:07.89#ibcon#[27=AT04-04\r\n] 2006.229.05:26:07.89#ibcon#*before write, iclass 16, count 2 2006.229.05:26:07.89#ibcon#enter sib2, iclass 16, count 2 2006.229.05:26:07.89#ibcon#flushed, iclass 16, count 2 2006.229.05:26:07.89#ibcon#about to write, iclass 16, count 2 2006.229.05:26:07.89#ibcon#wrote, iclass 16, count 2 2006.229.05:26:07.89#ibcon#about to read 3, iclass 16, count 2 2006.229.05:26:07.92#ibcon#read 3, iclass 16, count 2 2006.229.05:26:07.92#ibcon#about to read 4, iclass 16, count 2 2006.229.05:26:07.92#ibcon#read 4, iclass 16, count 2 2006.229.05:26:07.92#ibcon#about to read 5, iclass 16, count 2 2006.229.05:26:07.92#ibcon#read 5, iclass 16, count 2 2006.229.05:26:07.92#ibcon#about to read 6, iclass 16, count 2 2006.229.05:26:07.92#ibcon#read 6, iclass 16, count 2 2006.229.05:26:07.92#ibcon#end of sib2, iclass 16, count 2 2006.229.05:26:07.92#ibcon#*after write, iclass 16, count 2 2006.229.05:26:07.92#ibcon#*before return 0, iclass 16, count 2 2006.229.05:26:07.92#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:07.92#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.05:26:07.92#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.05:26:07.92#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:07.92#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:08.04#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:08.04#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:08.04#ibcon#enter wrdev, iclass 16, count 0 2006.229.05:26:08.04#ibcon#first serial, iclass 16, count 0 2006.229.05:26:08.04#ibcon#enter sib2, iclass 16, count 0 2006.229.05:26:08.04#ibcon#flushed, iclass 16, count 0 2006.229.05:26:08.04#ibcon#about to write, iclass 16, count 0 2006.229.05:26:08.04#ibcon#wrote, iclass 16, count 0 2006.229.05:26:08.04#ibcon#about to read 3, iclass 16, count 0 2006.229.05:26:08.06#ibcon#read 3, iclass 16, count 0 2006.229.05:26:08.06#ibcon#about to read 4, iclass 16, count 0 2006.229.05:26:08.06#ibcon#read 4, iclass 16, count 0 2006.229.05:26:08.06#ibcon#about to read 5, iclass 16, count 0 2006.229.05:26:08.06#ibcon#read 5, iclass 16, count 0 2006.229.05:26:08.06#ibcon#about to read 6, iclass 16, count 0 2006.229.05:26:08.06#ibcon#read 6, iclass 16, count 0 2006.229.05:26:08.06#ibcon#end of sib2, iclass 16, count 0 2006.229.05:26:08.06#ibcon#*mode == 0, iclass 16, count 0 2006.229.05:26:08.06#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.05:26:08.06#ibcon#[27=USB\r\n] 2006.229.05:26:08.06#ibcon#*before write, iclass 16, count 0 2006.229.05:26:08.06#ibcon#enter sib2, iclass 16, count 0 2006.229.05:26:08.06#ibcon#flushed, iclass 16, count 0 2006.229.05:26:08.06#ibcon#about to write, iclass 16, count 0 2006.229.05:26:08.06#ibcon#wrote, iclass 16, count 0 2006.229.05:26:08.06#ibcon#about to read 3, iclass 16, count 0 2006.229.05:26:08.09#ibcon#read 3, iclass 16, count 0 2006.229.05:26:08.09#ibcon#about to read 4, iclass 16, count 0 2006.229.05:26:08.09#ibcon#read 4, iclass 16, count 0 2006.229.05:26:08.09#ibcon#about to read 5, iclass 16, count 0 2006.229.05:26:08.09#ibcon#read 5, iclass 16, count 0 2006.229.05:26:08.09#ibcon#about to read 6, iclass 16, count 0 2006.229.05:26:08.09#ibcon#read 6, iclass 16, count 0 2006.229.05:26:08.09#ibcon#end of sib2, iclass 16, count 0 2006.229.05:26:08.09#ibcon#*after write, iclass 16, count 0 2006.229.05:26:08.09#ibcon#*before return 0, iclass 16, count 0 2006.229.05:26:08.09#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:08.09#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.05:26:08.09#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.05:26:08.09#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.05:26:08.09$vck44/vblo=5,709.99 2006.229.05:26:08.09#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.05:26:08.09#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.05:26:08.09#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:08.09#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:08.09#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:08.09#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:08.09#ibcon#enter wrdev, iclass 18, count 0 2006.229.05:26:08.09#ibcon#first serial, iclass 18, count 0 2006.229.05:26:08.09#ibcon#enter sib2, iclass 18, count 0 2006.229.05:26:08.09#ibcon#flushed, iclass 18, count 0 2006.229.05:26:08.09#ibcon#about to write, iclass 18, count 0 2006.229.05:26:08.09#ibcon#wrote, iclass 18, count 0 2006.229.05:26:08.09#ibcon#about to read 3, iclass 18, count 0 2006.229.05:26:08.11#ibcon#read 3, iclass 18, count 0 2006.229.05:26:08.11#ibcon#about to read 4, iclass 18, count 0 2006.229.05:26:08.11#ibcon#read 4, iclass 18, count 0 2006.229.05:26:08.11#ibcon#about to read 5, iclass 18, count 0 2006.229.05:26:08.11#ibcon#read 5, iclass 18, count 0 2006.229.05:26:08.11#ibcon#about to read 6, iclass 18, count 0 2006.229.05:26:08.11#ibcon#read 6, iclass 18, count 0 2006.229.05:26:08.11#ibcon#end of sib2, iclass 18, count 0 2006.229.05:26:08.11#ibcon#*mode == 0, iclass 18, count 0 2006.229.05:26:08.11#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.05:26:08.11#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:26:08.11#ibcon#*before write, iclass 18, count 0 2006.229.05:26:08.11#ibcon#enter sib2, iclass 18, count 0 2006.229.05:26:08.11#ibcon#flushed, iclass 18, count 0 2006.229.05:26:08.11#ibcon#about to write, iclass 18, count 0 2006.229.05:26:08.11#ibcon#wrote, iclass 18, count 0 2006.229.05:26:08.11#ibcon#about to read 3, iclass 18, count 0 2006.229.05:26:08.15#ibcon#read 3, iclass 18, count 0 2006.229.05:26:08.15#ibcon#about to read 4, iclass 18, count 0 2006.229.05:26:08.15#ibcon#read 4, iclass 18, count 0 2006.229.05:26:08.15#ibcon#about to read 5, iclass 18, count 0 2006.229.05:26:08.15#ibcon#read 5, iclass 18, count 0 2006.229.05:26:08.15#ibcon#about to read 6, iclass 18, count 0 2006.229.05:26:08.15#ibcon#read 6, iclass 18, count 0 2006.229.05:26:08.15#ibcon#end of sib2, iclass 18, count 0 2006.229.05:26:08.15#ibcon#*after write, iclass 18, count 0 2006.229.05:26:08.15#ibcon#*before return 0, iclass 18, count 0 2006.229.05:26:08.15#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:08.15#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.05:26:08.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.05:26:08.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.05:26:08.15$vck44/vb=5,4 2006.229.05:26:08.15#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.05:26:08.15#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.05:26:08.15#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:08.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:08.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:08.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:08.21#ibcon#enter wrdev, iclass 20, count 2 2006.229.05:26:08.21#ibcon#first serial, iclass 20, count 2 2006.229.05:26:08.21#ibcon#enter sib2, iclass 20, count 2 2006.229.05:26:08.21#ibcon#flushed, iclass 20, count 2 2006.229.05:26:08.21#ibcon#about to write, iclass 20, count 2 2006.229.05:26:08.21#ibcon#wrote, iclass 20, count 2 2006.229.05:26:08.21#ibcon#about to read 3, iclass 20, count 2 2006.229.05:26:08.23#ibcon#read 3, iclass 20, count 2 2006.229.05:26:08.23#ibcon#about to read 4, iclass 20, count 2 2006.229.05:26:08.23#ibcon#read 4, iclass 20, count 2 2006.229.05:26:08.23#ibcon#about to read 5, iclass 20, count 2 2006.229.05:26:08.23#ibcon#read 5, iclass 20, count 2 2006.229.05:26:08.23#ibcon#about to read 6, iclass 20, count 2 2006.229.05:26:08.23#ibcon#read 6, iclass 20, count 2 2006.229.05:26:08.23#ibcon#end of sib2, iclass 20, count 2 2006.229.05:26:08.23#ibcon#*mode == 0, iclass 20, count 2 2006.229.05:26:08.23#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.05:26:08.23#ibcon#[27=AT05-04\r\n] 2006.229.05:26:08.23#ibcon#*before write, iclass 20, count 2 2006.229.05:26:08.23#ibcon#enter sib2, iclass 20, count 2 2006.229.05:26:08.23#ibcon#flushed, iclass 20, count 2 2006.229.05:26:08.23#ibcon#about to write, iclass 20, count 2 2006.229.05:26:08.23#ibcon#wrote, iclass 20, count 2 2006.229.05:26:08.23#ibcon#about to read 3, iclass 20, count 2 2006.229.05:26:08.26#ibcon#read 3, iclass 20, count 2 2006.229.05:26:08.26#ibcon#about to read 4, iclass 20, count 2 2006.229.05:26:08.26#ibcon#read 4, iclass 20, count 2 2006.229.05:26:08.26#ibcon#about to read 5, iclass 20, count 2 2006.229.05:26:08.26#ibcon#read 5, iclass 20, count 2 2006.229.05:26:08.26#ibcon#about to read 6, iclass 20, count 2 2006.229.05:26:08.26#ibcon#read 6, iclass 20, count 2 2006.229.05:26:08.26#ibcon#end of sib2, iclass 20, count 2 2006.229.05:26:08.26#ibcon#*after write, iclass 20, count 2 2006.229.05:26:08.26#ibcon#*before return 0, iclass 20, count 2 2006.229.05:26:08.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:08.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:26:08.26#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.05:26:08.26#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:08.26#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:08.38#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:08.38#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:08.38#ibcon#enter wrdev, iclass 20, count 0 2006.229.05:26:08.38#ibcon#first serial, iclass 20, count 0 2006.229.05:26:08.38#ibcon#enter sib2, iclass 20, count 0 2006.229.05:26:08.38#ibcon#flushed, iclass 20, count 0 2006.229.05:26:08.38#ibcon#about to write, iclass 20, count 0 2006.229.05:26:08.38#ibcon#wrote, iclass 20, count 0 2006.229.05:26:08.38#ibcon#about to read 3, iclass 20, count 0 2006.229.05:26:08.40#ibcon#read 3, iclass 20, count 0 2006.229.05:26:08.40#ibcon#about to read 4, iclass 20, count 0 2006.229.05:26:08.40#ibcon#read 4, iclass 20, count 0 2006.229.05:26:08.40#ibcon#about to read 5, iclass 20, count 0 2006.229.05:26:08.40#ibcon#read 5, iclass 20, count 0 2006.229.05:26:08.40#ibcon#about to read 6, iclass 20, count 0 2006.229.05:26:08.40#ibcon#read 6, iclass 20, count 0 2006.229.05:26:08.40#ibcon#end of sib2, iclass 20, count 0 2006.229.05:26:08.40#ibcon#*mode == 0, iclass 20, count 0 2006.229.05:26:08.40#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.05:26:08.40#ibcon#[27=USB\r\n] 2006.229.05:26:08.40#ibcon#*before write, iclass 20, count 0 2006.229.05:26:08.40#ibcon#enter sib2, iclass 20, count 0 2006.229.05:26:08.40#ibcon#flushed, iclass 20, count 0 2006.229.05:26:08.40#ibcon#about to write, iclass 20, count 0 2006.229.05:26:08.40#ibcon#wrote, iclass 20, count 0 2006.229.05:26:08.40#ibcon#about to read 3, iclass 20, count 0 2006.229.05:26:08.43#ibcon#read 3, iclass 20, count 0 2006.229.05:26:08.43#ibcon#about to read 4, iclass 20, count 0 2006.229.05:26:08.43#ibcon#read 4, iclass 20, count 0 2006.229.05:26:08.43#ibcon#about to read 5, iclass 20, count 0 2006.229.05:26:08.43#ibcon#read 5, iclass 20, count 0 2006.229.05:26:08.43#ibcon#about to read 6, iclass 20, count 0 2006.229.05:26:08.43#ibcon#read 6, iclass 20, count 0 2006.229.05:26:08.43#ibcon#end of sib2, iclass 20, count 0 2006.229.05:26:08.43#ibcon#*after write, iclass 20, count 0 2006.229.05:26:08.43#ibcon#*before return 0, iclass 20, count 0 2006.229.05:26:08.43#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:08.43#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:26:08.43#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.05:26:08.43#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.05:26:08.43$vck44/vblo=6,719.99 2006.229.05:26:08.43#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.05:26:08.43#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.05:26:08.43#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:08.43#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:08.43#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:08.43#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:08.43#ibcon#enter wrdev, iclass 22, count 0 2006.229.05:26:08.43#ibcon#first serial, iclass 22, count 0 2006.229.05:26:08.43#ibcon#enter sib2, iclass 22, count 0 2006.229.05:26:08.43#ibcon#flushed, iclass 22, count 0 2006.229.05:26:08.43#ibcon#about to write, iclass 22, count 0 2006.229.05:26:08.43#ibcon#wrote, iclass 22, count 0 2006.229.05:26:08.43#ibcon#about to read 3, iclass 22, count 0 2006.229.05:26:08.45#ibcon#read 3, iclass 22, count 0 2006.229.05:26:08.45#ibcon#about to read 4, iclass 22, count 0 2006.229.05:26:08.45#ibcon#read 4, iclass 22, count 0 2006.229.05:26:08.45#ibcon#about to read 5, iclass 22, count 0 2006.229.05:26:08.45#ibcon#read 5, iclass 22, count 0 2006.229.05:26:08.45#ibcon#about to read 6, iclass 22, count 0 2006.229.05:26:08.45#ibcon#read 6, iclass 22, count 0 2006.229.05:26:08.45#ibcon#end of sib2, iclass 22, count 0 2006.229.05:26:08.45#ibcon#*mode == 0, iclass 22, count 0 2006.229.05:26:08.45#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.05:26:08.45#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:26:08.45#ibcon#*before write, iclass 22, count 0 2006.229.05:26:08.45#ibcon#enter sib2, iclass 22, count 0 2006.229.05:26:08.45#ibcon#flushed, iclass 22, count 0 2006.229.05:26:08.45#ibcon#about to write, iclass 22, count 0 2006.229.05:26:08.45#ibcon#wrote, iclass 22, count 0 2006.229.05:26:08.45#ibcon#about to read 3, iclass 22, count 0 2006.229.05:26:08.49#ibcon#read 3, iclass 22, count 0 2006.229.05:26:08.49#ibcon#about to read 4, iclass 22, count 0 2006.229.05:26:08.49#ibcon#read 4, iclass 22, count 0 2006.229.05:26:08.49#ibcon#about to read 5, iclass 22, count 0 2006.229.05:26:08.49#ibcon#read 5, iclass 22, count 0 2006.229.05:26:08.49#ibcon#about to read 6, iclass 22, count 0 2006.229.05:26:08.49#ibcon#read 6, iclass 22, count 0 2006.229.05:26:08.49#ibcon#end of sib2, iclass 22, count 0 2006.229.05:26:08.49#ibcon#*after write, iclass 22, count 0 2006.229.05:26:08.49#ibcon#*before return 0, iclass 22, count 0 2006.229.05:26:08.49#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:08.49#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.05:26:08.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.05:26:08.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.05:26:08.49$vck44/vb=6,4 2006.229.05:26:08.49#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.05:26:08.49#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.05:26:08.49#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:08.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:08.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:08.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:08.55#ibcon#enter wrdev, iclass 24, count 2 2006.229.05:26:08.55#ibcon#first serial, iclass 24, count 2 2006.229.05:26:08.55#ibcon#enter sib2, iclass 24, count 2 2006.229.05:26:08.55#ibcon#flushed, iclass 24, count 2 2006.229.05:26:08.55#ibcon#about to write, iclass 24, count 2 2006.229.05:26:08.55#ibcon#wrote, iclass 24, count 2 2006.229.05:26:08.55#ibcon#about to read 3, iclass 24, count 2 2006.229.05:26:08.57#ibcon#read 3, iclass 24, count 2 2006.229.05:26:08.57#ibcon#about to read 4, iclass 24, count 2 2006.229.05:26:08.57#ibcon#read 4, iclass 24, count 2 2006.229.05:26:08.57#ibcon#about to read 5, iclass 24, count 2 2006.229.05:26:08.57#ibcon#read 5, iclass 24, count 2 2006.229.05:26:08.57#ibcon#about to read 6, iclass 24, count 2 2006.229.05:26:08.57#ibcon#read 6, iclass 24, count 2 2006.229.05:26:08.57#ibcon#end of sib2, iclass 24, count 2 2006.229.05:26:08.57#ibcon#*mode == 0, iclass 24, count 2 2006.229.05:26:08.57#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.05:26:08.57#ibcon#[27=AT06-04\r\n] 2006.229.05:26:08.57#ibcon#*before write, iclass 24, count 2 2006.229.05:26:08.57#ibcon#enter sib2, iclass 24, count 2 2006.229.05:26:08.57#ibcon#flushed, iclass 24, count 2 2006.229.05:26:08.57#ibcon#about to write, iclass 24, count 2 2006.229.05:26:08.57#ibcon#wrote, iclass 24, count 2 2006.229.05:26:08.57#ibcon#about to read 3, iclass 24, count 2 2006.229.05:26:08.60#ibcon#read 3, iclass 24, count 2 2006.229.05:26:08.60#ibcon#about to read 4, iclass 24, count 2 2006.229.05:26:08.60#ibcon#read 4, iclass 24, count 2 2006.229.05:26:08.60#ibcon#about to read 5, iclass 24, count 2 2006.229.05:26:08.60#ibcon#read 5, iclass 24, count 2 2006.229.05:26:08.60#ibcon#about to read 6, iclass 24, count 2 2006.229.05:26:08.60#ibcon#read 6, iclass 24, count 2 2006.229.05:26:08.60#ibcon#end of sib2, iclass 24, count 2 2006.229.05:26:08.60#ibcon#*after write, iclass 24, count 2 2006.229.05:26:08.60#ibcon#*before return 0, iclass 24, count 2 2006.229.05:26:08.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:08.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.05:26:08.60#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.05:26:08.60#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:08.60#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:08.72#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:08.72#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:08.72#ibcon#enter wrdev, iclass 24, count 0 2006.229.05:26:08.72#ibcon#first serial, iclass 24, count 0 2006.229.05:26:08.72#ibcon#enter sib2, iclass 24, count 0 2006.229.05:26:08.72#ibcon#flushed, iclass 24, count 0 2006.229.05:26:08.72#ibcon#about to write, iclass 24, count 0 2006.229.05:26:08.72#ibcon#wrote, iclass 24, count 0 2006.229.05:26:08.72#ibcon#about to read 3, iclass 24, count 0 2006.229.05:26:08.74#ibcon#read 3, iclass 24, count 0 2006.229.05:26:08.74#ibcon#about to read 4, iclass 24, count 0 2006.229.05:26:08.74#ibcon#read 4, iclass 24, count 0 2006.229.05:26:08.74#ibcon#about to read 5, iclass 24, count 0 2006.229.05:26:08.74#ibcon#read 5, iclass 24, count 0 2006.229.05:26:08.74#ibcon#about to read 6, iclass 24, count 0 2006.229.05:26:08.74#ibcon#read 6, iclass 24, count 0 2006.229.05:26:08.74#ibcon#end of sib2, iclass 24, count 0 2006.229.05:26:08.74#ibcon#*mode == 0, iclass 24, count 0 2006.229.05:26:08.74#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.05:26:08.74#ibcon#[27=USB\r\n] 2006.229.05:26:08.74#ibcon#*before write, iclass 24, count 0 2006.229.05:26:08.74#ibcon#enter sib2, iclass 24, count 0 2006.229.05:26:08.74#ibcon#flushed, iclass 24, count 0 2006.229.05:26:08.74#ibcon#about to write, iclass 24, count 0 2006.229.05:26:08.74#ibcon#wrote, iclass 24, count 0 2006.229.05:26:08.74#ibcon#about to read 3, iclass 24, count 0 2006.229.05:26:08.77#ibcon#read 3, iclass 24, count 0 2006.229.05:26:08.77#ibcon#about to read 4, iclass 24, count 0 2006.229.05:26:08.77#ibcon#read 4, iclass 24, count 0 2006.229.05:26:08.77#ibcon#about to read 5, iclass 24, count 0 2006.229.05:26:08.77#ibcon#read 5, iclass 24, count 0 2006.229.05:26:08.77#ibcon#about to read 6, iclass 24, count 0 2006.229.05:26:08.77#ibcon#read 6, iclass 24, count 0 2006.229.05:26:08.77#ibcon#end of sib2, iclass 24, count 0 2006.229.05:26:08.77#ibcon#*after write, iclass 24, count 0 2006.229.05:26:08.77#ibcon#*before return 0, iclass 24, count 0 2006.229.05:26:08.77#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:08.77#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.05:26:08.77#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.05:26:08.77#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.05:26:08.77$vck44/vblo=7,734.99 2006.229.05:26:08.77#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.05:26:08.77#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.05:26:08.77#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:08.77#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:08.77#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:08.77#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:08.77#ibcon#enter wrdev, iclass 26, count 0 2006.229.05:26:08.77#ibcon#first serial, iclass 26, count 0 2006.229.05:26:08.77#ibcon#enter sib2, iclass 26, count 0 2006.229.05:26:08.77#ibcon#flushed, iclass 26, count 0 2006.229.05:26:08.77#ibcon#about to write, iclass 26, count 0 2006.229.05:26:08.77#ibcon#wrote, iclass 26, count 0 2006.229.05:26:08.77#ibcon#about to read 3, iclass 26, count 0 2006.229.05:26:08.79#ibcon#read 3, iclass 26, count 0 2006.229.05:26:08.79#ibcon#about to read 4, iclass 26, count 0 2006.229.05:26:08.79#ibcon#read 4, iclass 26, count 0 2006.229.05:26:08.79#ibcon#about to read 5, iclass 26, count 0 2006.229.05:26:08.79#ibcon#read 5, iclass 26, count 0 2006.229.05:26:08.79#ibcon#about to read 6, iclass 26, count 0 2006.229.05:26:08.79#ibcon#read 6, iclass 26, count 0 2006.229.05:26:08.79#ibcon#end of sib2, iclass 26, count 0 2006.229.05:26:08.79#ibcon#*mode == 0, iclass 26, count 0 2006.229.05:26:08.79#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.05:26:08.79#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:26:08.79#ibcon#*before write, iclass 26, count 0 2006.229.05:26:08.79#ibcon#enter sib2, iclass 26, count 0 2006.229.05:26:08.79#ibcon#flushed, iclass 26, count 0 2006.229.05:26:08.79#ibcon#about to write, iclass 26, count 0 2006.229.05:26:08.79#ibcon#wrote, iclass 26, count 0 2006.229.05:26:08.79#ibcon#about to read 3, iclass 26, count 0 2006.229.05:26:08.83#ibcon#read 3, iclass 26, count 0 2006.229.05:26:08.83#ibcon#about to read 4, iclass 26, count 0 2006.229.05:26:08.83#ibcon#read 4, iclass 26, count 0 2006.229.05:26:08.83#ibcon#about to read 5, iclass 26, count 0 2006.229.05:26:08.83#ibcon#read 5, iclass 26, count 0 2006.229.05:26:08.83#ibcon#about to read 6, iclass 26, count 0 2006.229.05:26:08.83#ibcon#read 6, iclass 26, count 0 2006.229.05:26:08.83#ibcon#end of sib2, iclass 26, count 0 2006.229.05:26:08.83#ibcon#*after write, iclass 26, count 0 2006.229.05:26:08.83#ibcon#*before return 0, iclass 26, count 0 2006.229.05:26:08.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:08.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.05:26:08.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.05:26:08.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.05:26:08.83$vck44/vb=7,4 2006.229.05:26:08.83#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.05:26:08.83#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.05:26:08.83#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:08.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:08.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:08.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:08.89#ibcon#enter wrdev, iclass 28, count 2 2006.229.05:26:08.89#ibcon#first serial, iclass 28, count 2 2006.229.05:26:08.89#ibcon#enter sib2, iclass 28, count 2 2006.229.05:26:08.89#ibcon#flushed, iclass 28, count 2 2006.229.05:26:08.89#ibcon#about to write, iclass 28, count 2 2006.229.05:26:08.89#ibcon#wrote, iclass 28, count 2 2006.229.05:26:08.89#ibcon#about to read 3, iclass 28, count 2 2006.229.05:26:08.91#ibcon#read 3, iclass 28, count 2 2006.229.05:26:08.91#ibcon#about to read 4, iclass 28, count 2 2006.229.05:26:08.91#ibcon#read 4, iclass 28, count 2 2006.229.05:26:08.91#ibcon#about to read 5, iclass 28, count 2 2006.229.05:26:08.91#ibcon#read 5, iclass 28, count 2 2006.229.05:26:08.91#ibcon#about to read 6, iclass 28, count 2 2006.229.05:26:08.91#ibcon#read 6, iclass 28, count 2 2006.229.05:26:08.91#ibcon#end of sib2, iclass 28, count 2 2006.229.05:26:08.91#ibcon#*mode == 0, iclass 28, count 2 2006.229.05:26:08.91#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.05:26:08.91#ibcon#[27=AT07-04\r\n] 2006.229.05:26:08.91#ibcon#*before write, iclass 28, count 2 2006.229.05:26:08.91#ibcon#enter sib2, iclass 28, count 2 2006.229.05:26:08.91#ibcon#flushed, iclass 28, count 2 2006.229.05:26:08.91#ibcon#about to write, iclass 28, count 2 2006.229.05:26:08.91#ibcon#wrote, iclass 28, count 2 2006.229.05:26:08.91#ibcon#about to read 3, iclass 28, count 2 2006.229.05:26:08.94#ibcon#read 3, iclass 28, count 2 2006.229.05:26:08.94#ibcon#about to read 4, iclass 28, count 2 2006.229.05:26:08.94#ibcon#read 4, iclass 28, count 2 2006.229.05:26:08.94#ibcon#about to read 5, iclass 28, count 2 2006.229.05:26:08.94#ibcon#read 5, iclass 28, count 2 2006.229.05:26:08.94#ibcon#about to read 6, iclass 28, count 2 2006.229.05:26:08.94#ibcon#read 6, iclass 28, count 2 2006.229.05:26:08.94#ibcon#end of sib2, iclass 28, count 2 2006.229.05:26:08.94#ibcon#*after write, iclass 28, count 2 2006.229.05:26:08.94#ibcon#*before return 0, iclass 28, count 2 2006.229.05:26:08.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:08.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.05:26:08.94#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.05:26:08.94#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:08.94#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:09.06#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:09.06#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:09.06#ibcon#enter wrdev, iclass 28, count 0 2006.229.05:26:09.06#ibcon#first serial, iclass 28, count 0 2006.229.05:26:09.06#ibcon#enter sib2, iclass 28, count 0 2006.229.05:26:09.06#ibcon#flushed, iclass 28, count 0 2006.229.05:26:09.06#ibcon#about to write, iclass 28, count 0 2006.229.05:26:09.06#ibcon#wrote, iclass 28, count 0 2006.229.05:26:09.06#ibcon#about to read 3, iclass 28, count 0 2006.229.05:26:09.08#ibcon#read 3, iclass 28, count 0 2006.229.05:26:09.08#ibcon#about to read 4, iclass 28, count 0 2006.229.05:26:09.08#ibcon#read 4, iclass 28, count 0 2006.229.05:26:09.08#ibcon#about to read 5, iclass 28, count 0 2006.229.05:26:09.08#ibcon#read 5, iclass 28, count 0 2006.229.05:26:09.08#ibcon#about to read 6, iclass 28, count 0 2006.229.05:26:09.08#ibcon#read 6, iclass 28, count 0 2006.229.05:26:09.08#ibcon#end of sib2, iclass 28, count 0 2006.229.05:26:09.08#ibcon#*mode == 0, iclass 28, count 0 2006.229.05:26:09.08#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.05:26:09.08#ibcon#[27=USB\r\n] 2006.229.05:26:09.08#ibcon#*before write, iclass 28, count 0 2006.229.05:26:09.08#ibcon#enter sib2, iclass 28, count 0 2006.229.05:26:09.08#ibcon#flushed, iclass 28, count 0 2006.229.05:26:09.08#ibcon#about to write, iclass 28, count 0 2006.229.05:26:09.08#ibcon#wrote, iclass 28, count 0 2006.229.05:26:09.08#ibcon#about to read 3, iclass 28, count 0 2006.229.05:26:09.11#ibcon#read 3, iclass 28, count 0 2006.229.05:26:09.11#ibcon#about to read 4, iclass 28, count 0 2006.229.05:26:09.11#ibcon#read 4, iclass 28, count 0 2006.229.05:26:09.11#ibcon#about to read 5, iclass 28, count 0 2006.229.05:26:09.11#ibcon#read 5, iclass 28, count 0 2006.229.05:26:09.11#ibcon#about to read 6, iclass 28, count 0 2006.229.05:26:09.11#ibcon#read 6, iclass 28, count 0 2006.229.05:26:09.11#ibcon#end of sib2, iclass 28, count 0 2006.229.05:26:09.11#ibcon#*after write, iclass 28, count 0 2006.229.05:26:09.11#ibcon#*before return 0, iclass 28, count 0 2006.229.05:26:09.11#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:09.11#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.05:26:09.11#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.05:26:09.11#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.05:26:09.11$vck44/vblo=8,744.99 2006.229.05:26:09.11#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.05:26:09.11#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.05:26:09.11#ibcon#ireg 17 cls_cnt 0 2006.229.05:26:09.11#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:09.11#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:09.11#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:09.11#ibcon#enter wrdev, iclass 30, count 0 2006.229.05:26:09.11#ibcon#first serial, iclass 30, count 0 2006.229.05:26:09.11#ibcon#enter sib2, iclass 30, count 0 2006.229.05:26:09.11#ibcon#flushed, iclass 30, count 0 2006.229.05:26:09.11#ibcon#about to write, iclass 30, count 0 2006.229.05:26:09.11#ibcon#wrote, iclass 30, count 0 2006.229.05:26:09.11#ibcon#about to read 3, iclass 30, count 0 2006.229.05:26:09.13#ibcon#read 3, iclass 30, count 0 2006.229.05:26:09.13#ibcon#about to read 4, iclass 30, count 0 2006.229.05:26:09.13#ibcon#read 4, iclass 30, count 0 2006.229.05:26:09.13#ibcon#about to read 5, iclass 30, count 0 2006.229.05:26:09.13#ibcon#read 5, iclass 30, count 0 2006.229.05:26:09.13#ibcon#about to read 6, iclass 30, count 0 2006.229.05:26:09.13#ibcon#read 6, iclass 30, count 0 2006.229.05:26:09.13#ibcon#end of sib2, iclass 30, count 0 2006.229.05:26:09.13#ibcon#*mode == 0, iclass 30, count 0 2006.229.05:26:09.13#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.05:26:09.13#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:26:09.13#ibcon#*before write, iclass 30, count 0 2006.229.05:26:09.13#ibcon#enter sib2, iclass 30, count 0 2006.229.05:26:09.13#ibcon#flushed, iclass 30, count 0 2006.229.05:26:09.13#ibcon#about to write, iclass 30, count 0 2006.229.05:26:09.13#ibcon#wrote, iclass 30, count 0 2006.229.05:26:09.13#ibcon#about to read 3, iclass 30, count 0 2006.229.05:26:09.17#ibcon#read 3, iclass 30, count 0 2006.229.05:26:09.17#ibcon#about to read 4, iclass 30, count 0 2006.229.05:26:09.17#ibcon#read 4, iclass 30, count 0 2006.229.05:26:09.17#ibcon#about to read 5, iclass 30, count 0 2006.229.05:26:09.17#ibcon#read 5, iclass 30, count 0 2006.229.05:26:09.17#ibcon#about to read 6, iclass 30, count 0 2006.229.05:26:09.17#ibcon#read 6, iclass 30, count 0 2006.229.05:26:09.17#ibcon#end of sib2, iclass 30, count 0 2006.229.05:26:09.17#ibcon#*after write, iclass 30, count 0 2006.229.05:26:09.17#ibcon#*before return 0, iclass 30, count 0 2006.229.05:26:09.17#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:09.17#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.05:26:09.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.05:26:09.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.05:26:09.17$vck44/vb=8,4 2006.229.05:26:09.17#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.05:26:09.17#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.05:26:09.17#ibcon#ireg 11 cls_cnt 2 2006.229.05:26:09.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:09.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:09.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:09.23#ibcon#enter wrdev, iclass 32, count 2 2006.229.05:26:09.23#ibcon#first serial, iclass 32, count 2 2006.229.05:26:09.23#ibcon#enter sib2, iclass 32, count 2 2006.229.05:26:09.23#ibcon#flushed, iclass 32, count 2 2006.229.05:26:09.23#ibcon#about to write, iclass 32, count 2 2006.229.05:26:09.23#ibcon#wrote, iclass 32, count 2 2006.229.05:26:09.23#ibcon#about to read 3, iclass 32, count 2 2006.229.05:26:09.25#ibcon#read 3, iclass 32, count 2 2006.229.05:26:09.25#ibcon#about to read 4, iclass 32, count 2 2006.229.05:26:09.25#ibcon#read 4, iclass 32, count 2 2006.229.05:26:09.25#ibcon#about to read 5, iclass 32, count 2 2006.229.05:26:09.25#ibcon#read 5, iclass 32, count 2 2006.229.05:26:09.25#ibcon#about to read 6, iclass 32, count 2 2006.229.05:26:09.25#ibcon#read 6, iclass 32, count 2 2006.229.05:26:09.25#ibcon#end of sib2, iclass 32, count 2 2006.229.05:26:09.25#ibcon#*mode == 0, iclass 32, count 2 2006.229.05:26:09.25#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.05:26:09.25#ibcon#[27=AT08-04\r\n] 2006.229.05:26:09.25#ibcon#*before write, iclass 32, count 2 2006.229.05:26:09.25#ibcon#enter sib2, iclass 32, count 2 2006.229.05:26:09.25#ibcon#flushed, iclass 32, count 2 2006.229.05:26:09.25#ibcon#about to write, iclass 32, count 2 2006.229.05:26:09.25#ibcon#wrote, iclass 32, count 2 2006.229.05:26:09.25#ibcon#about to read 3, iclass 32, count 2 2006.229.05:26:09.28#ibcon#read 3, iclass 32, count 2 2006.229.05:26:09.28#ibcon#about to read 4, iclass 32, count 2 2006.229.05:26:09.28#ibcon#read 4, iclass 32, count 2 2006.229.05:26:09.28#ibcon#about to read 5, iclass 32, count 2 2006.229.05:26:09.28#ibcon#read 5, iclass 32, count 2 2006.229.05:26:09.28#ibcon#about to read 6, iclass 32, count 2 2006.229.05:26:09.28#ibcon#read 6, iclass 32, count 2 2006.229.05:26:09.28#ibcon#end of sib2, iclass 32, count 2 2006.229.05:26:09.28#ibcon#*after write, iclass 32, count 2 2006.229.05:26:09.28#ibcon#*before return 0, iclass 32, count 2 2006.229.05:26:09.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:09.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.05:26:09.28#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.05:26:09.28#ibcon#ireg 7 cls_cnt 0 2006.229.05:26:09.28#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:09.40#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:09.40#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:09.40#ibcon#enter wrdev, iclass 32, count 0 2006.229.05:26:09.40#ibcon#first serial, iclass 32, count 0 2006.229.05:26:09.40#ibcon#enter sib2, iclass 32, count 0 2006.229.05:26:09.40#ibcon#flushed, iclass 32, count 0 2006.229.05:26:09.40#ibcon#about to write, iclass 32, count 0 2006.229.05:26:09.40#ibcon#wrote, iclass 32, count 0 2006.229.05:26:09.40#ibcon#about to read 3, iclass 32, count 0 2006.229.05:26:09.42#ibcon#read 3, iclass 32, count 0 2006.229.05:26:09.42#ibcon#about to read 4, iclass 32, count 0 2006.229.05:26:09.42#ibcon#read 4, iclass 32, count 0 2006.229.05:26:09.42#ibcon#about to read 5, iclass 32, count 0 2006.229.05:26:09.42#ibcon#read 5, iclass 32, count 0 2006.229.05:26:09.42#ibcon#about to read 6, iclass 32, count 0 2006.229.05:26:09.42#ibcon#read 6, iclass 32, count 0 2006.229.05:26:09.42#ibcon#end of sib2, iclass 32, count 0 2006.229.05:26:09.42#ibcon#*mode == 0, iclass 32, count 0 2006.229.05:26:09.42#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.05:26:09.42#ibcon#[27=USB\r\n] 2006.229.05:26:09.42#ibcon#*before write, iclass 32, count 0 2006.229.05:26:09.42#ibcon#enter sib2, iclass 32, count 0 2006.229.05:26:09.42#ibcon#flushed, iclass 32, count 0 2006.229.05:26:09.42#ibcon#about to write, iclass 32, count 0 2006.229.05:26:09.42#ibcon#wrote, iclass 32, count 0 2006.229.05:26:09.42#ibcon#about to read 3, iclass 32, count 0 2006.229.05:26:09.45#ibcon#read 3, iclass 32, count 0 2006.229.05:26:09.45#ibcon#about to read 4, iclass 32, count 0 2006.229.05:26:09.45#ibcon#read 4, iclass 32, count 0 2006.229.05:26:09.45#ibcon#about to read 5, iclass 32, count 0 2006.229.05:26:09.45#ibcon#read 5, iclass 32, count 0 2006.229.05:26:09.45#ibcon#about to read 6, iclass 32, count 0 2006.229.05:26:09.45#ibcon#read 6, iclass 32, count 0 2006.229.05:26:09.45#ibcon#end of sib2, iclass 32, count 0 2006.229.05:26:09.45#ibcon#*after write, iclass 32, count 0 2006.229.05:26:09.45#ibcon#*before return 0, iclass 32, count 0 2006.229.05:26:09.45#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:09.45#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.05:26:09.45#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.05:26:09.45#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.05:26:09.45$vck44/vabw=wide 2006.229.05:26:09.45#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.05:26:09.45#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.05:26:09.45#ibcon#ireg 8 cls_cnt 0 2006.229.05:26:09.45#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:09.45#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:09.45#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:09.45#ibcon#enter wrdev, iclass 34, count 0 2006.229.05:26:09.45#ibcon#first serial, iclass 34, count 0 2006.229.05:26:09.45#ibcon#enter sib2, iclass 34, count 0 2006.229.05:26:09.45#ibcon#flushed, iclass 34, count 0 2006.229.05:26:09.45#ibcon#about to write, iclass 34, count 0 2006.229.05:26:09.45#ibcon#wrote, iclass 34, count 0 2006.229.05:26:09.45#ibcon#about to read 3, iclass 34, count 0 2006.229.05:26:09.47#ibcon#read 3, iclass 34, count 0 2006.229.05:26:09.47#ibcon#about to read 4, iclass 34, count 0 2006.229.05:26:09.47#ibcon#read 4, iclass 34, count 0 2006.229.05:26:09.47#ibcon#about to read 5, iclass 34, count 0 2006.229.05:26:09.47#ibcon#read 5, iclass 34, count 0 2006.229.05:26:09.47#ibcon#about to read 6, iclass 34, count 0 2006.229.05:26:09.47#ibcon#read 6, iclass 34, count 0 2006.229.05:26:09.47#ibcon#end of sib2, iclass 34, count 0 2006.229.05:26:09.47#ibcon#*mode == 0, iclass 34, count 0 2006.229.05:26:09.47#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.05:26:09.47#ibcon#[25=BW32\r\n] 2006.229.05:26:09.47#ibcon#*before write, iclass 34, count 0 2006.229.05:26:09.47#ibcon#enter sib2, iclass 34, count 0 2006.229.05:26:09.47#ibcon#flushed, iclass 34, count 0 2006.229.05:26:09.47#ibcon#about to write, iclass 34, count 0 2006.229.05:26:09.47#ibcon#wrote, iclass 34, count 0 2006.229.05:26:09.47#ibcon#about to read 3, iclass 34, count 0 2006.229.05:26:09.50#ibcon#read 3, iclass 34, count 0 2006.229.05:26:09.50#ibcon#about to read 4, iclass 34, count 0 2006.229.05:26:09.50#ibcon#read 4, iclass 34, count 0 2006.229.05:26:09.50#ibcon#about to read 5, iclass 34, count 0 2006.229.05:26:09.50#ibcon#read 5, iclass 34, count 0 2006.229.05:26:09.50#ibcon#about to read 6, iclass 34, count 0 2006.229.05:26:09.50#ibcon#read 6, iclass 34, count 0 2006.229.05:26:09.50#ibcon#end of sib2, iclass 34, count 0 2006.229.05:26:09.50#ibcon#*after write, iclass 34, count 0 2006.229.05:26:09.50#ibcon#*before return 0, iclass 34, count 0 2006.229.05:26:09.50#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:09.50#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.05:26:09.50#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.05:26:09.50#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.05:26:09.50$vck44/vbbw=wide 2006.229.05:26:09.50#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.05:26:09.50#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.05:26:09.50#ibcon#ireg 8 cls_cnt 0 2006.229.05:26:09.50#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:26:09.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:26:09.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:26:09.57#ibcon#enter wrdev, iclass 36, count 0 2006.229.05:26:09.57#ibcon#first serial, iclass 36, count 0 2006.229.05:26:09.57#ibcon#enter sib2, iclass 36, count 0 2006.229.05:26:09.57#ibcon#flushed, iclass 36, count 0 2006.229.05:26:09.57#ibcon#about to write, iclass 36, count 0 2006.229.05:26:09.57#ibcon#wrote, iclass 36, count 0 2006.229.05:26:09.57#ibcon#about to read 3, iclass 36, count 0 2006.229.05:26:09.59#ibcon#read 3, iclass 36, count 0 2006.229.05:26:09.59#ibcon#about to read 4, iclass 36, count 0 2006.229.05:26:09.59#ibcon#read 4, iclass 36, count 0 2006.229.05:26:09.59#ibcon#about to read 5, iclass 36, count 0 2006.229.05:26:09.59#ibcon#read 5, iclass 36, count 0 2006.229.05:26:09.59#ibcon#about to read 6, iclass 36, count 0 2006.229.05:26:09.59#ibcon#read 6, iclass 36, count 0 2006.229.05:26:09.59#ibcon#end of sib2, iclass 36, count 0 2006.229.05:26:09.59#ibcon#*mode == 0, iclass 36, count 0 2006.229.05:26:09.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.05:26:09.59#ibcon#[27=BW32\r\n] 2006.229.05:26:09.59#ibcon#*before write, iclass 36, count 0 2006.229.05:26:09.59#ibcon#enter sib2, iclass 36, count 0 2006.229.05:26:09.59#ibcon#flushed, iclass 36, count 0 2006.229.05:26:09.59#ibcon#about to write, iclass 36, count 0 2006.229.05:26:09.59#ibcon#wrote, iclass 36, count 0 2006.229.05:26:09.59#ibcon#about to read 3, iclass 36, count 0 2006.229.05:26:09.62#ibcon#read 3, iclass 36, count 0 2006.229.05:26:09.62#ibcon#about to read 4, iclass 36, count 0 2006.229.05:26:09.62#ibcon#read 4, iclass 36, count 0 2006.229.05:26:09.62#ibcon#about to read 5, iclass 36, count 0 2006.229.05:26:09.62#ibcon#read 5, iclass 36, count 0 2006.229.05:26:09.62#ibcon#about to read 6, iclass 36, count 0 2006.229.05:26:09.62#ibcon#read 6, iclass 36, count 0 2006.229.05:26:09.62#ibcon#end of sib2, iclass 36, count 0 2006.229.05:26:09.62#ibcon#*after write, iclass 36, count 0 2006.229.05:26:09.62#ibcon#*before return 0, iclass 36, count 0 2006.229.05:26:09.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:26:09.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:26:09.62#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.05:26:09.62#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.05:26:09.62$setupk4/ifdk4 2006.229.05:26:09.62$ifdk4/lo= 2006.229.05:26:09.62$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:26:09.62$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:26:09.62$ifdk4/patch= 2006.229.05:26:09.62$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:26:09.62$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:26:09.62$setupk4/!*+20s 2006.229.05:26:11.66#abcon#<5=/04 3.9 8.1 30.87 89 999.7\r\n> 2006.229.05:26:11.68#abcon#{5=INTERFACE CLEAR} 2006.229.05:26:11.74#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:26:21.83#abcon#<5=/04 3.9 8.1 30.86 90 999.7\r\n> 2006.229.05:26:21.85#abcon#{5=INTERFACE CLEAR} 2006.229.05:26:21.91#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:26:24.13#trakl#Source acquired 2006.229.05:26:24.13#flagr#flagr/antenna,acquired 2006.229.05:26:24.13$setupk4/"tpicd 2006.229.05:26:24.13$setupk4/echo=off 2006.229.05:26:24.13$setupk4/xlog=off 2006.229.05:26:24.13:!2006.229.05:26:41 2006.229.05:26:41.00:preob 2006.229.05:26:41.14/onsource/TRACKING 2006.229.05:26:41.14:!2006.229.05:26:51 2006.229.05:26:51.00:"tape 2006.229.05:26:51.00:"st=record 2006.229.05:26:51.00:data_valid=on 2006.229.05:26:51.00:midob 2006.229.05:26:51.14/onsource/TRACKING 2006.229.05:26:51.14/wx/30.86,999.6,89 2006.229.05:26:51.23/cable/+6.3999E-03 2006.229.05:26:52.32/va/01,08,usb,yes,29,32 2006.229.05:26:52.32/va/02,07,usb,yes,32,32 2006.229.05:26:52.32/va/03,06,usb,yes,39,42 2006.229.05:26:52.32/va/04,07,usb,yes,32,34 2006.229.05:26:52.32/va/05,04,usb,yes,29,29 2006.229.05:26:52.32/va/06,04,usb,yes,33,32 2006.229.05:26:52.32/va/07,05,usb,yes,29,29 2006.229.05:26:52.32/va/08,06,usb,yes,21,26 2006.229.05:26:52.55/valo/01,524.99,yes,locked 2006.229.05:26:52.55/valo/02,534.99,yes,locked 2006.229.05:26:52.55/valo/03,564.99,yes,locked 2006.229.05:26:52.55/valo/04,624.99,yes,locked 2006.229.05:26:52.55/valo/05,734.99,yes,locked 2006.229.05:26:52.55/valo/06,814.99,yes,locked 2006.229.05:26:52.55/valo/07,864.99,yes,locked 2006.229.05:26:52.55/valo/08,884.99,yes,locked 2006.229.05:26:53.64/vb/01,04,usb,yes,31,29 2006.229.05:26:53.64/vb/02,04,usb,yes,33,33 2006.229.05:26:53.64/vb/03,04,usb,yes,30,33 2006.229.05:26:53.64/vb/04,04,usb,yes,35,34 2006.229.05:26:53.64/vb/05,04,usb,yes,27,29 2006.229.05:26:53.64/vb/06,04,usb,yes,32,28 2006.229.05:26:53.64/vb/07,04,usb,yes,31,31 2006.229.05:26:53.64/vb/08,04,usb,yes,29,32 2006.229.05:26:53.88/vblo/01,629.99,yes,locked 2006.229.05:26:53.88/vblo/02,634.99,yes,locked 2006.229.05:26:53.88/vblo/03,649.99,yes,locked 2006.229.05:26:53.88/vblo/04,679.99,yes,locked 2006.229.05:26:53.88/vblo/05,709.99,yes,locked 2006.229.05:26:53.88/vblo/06,719.99,yes,locked 2006.229.05:26:53.88/vblo/07,734.99,yes,locked 2006.229.05:26:53.88/vblo/08,744.99,yes,locked 2006.229.05:26:54.03/vabw/8 2006.229.05:26:54.18/vbbw/8 2006.229.05:26:54.27/xfe/off,on,12.0 2006.229.05:26:54.66/ifatt/23,28,28,28 2006.229.05:26:55.07/fmout-gps/S +4.52E-07 2006.229.05:26:55.11:!2006.229.05:27:41 2006.229.05:27:41.01:data_valid=off 2006.229.05:27:41.01:"et 2006.229.05:27:41.01:!+3s 2006.229.05:27:44.02:"tape 2006.229.05:27:44.02:postob 2006.229.05:27:44.10/cable/+6.3991E-03 2006.229.05:27:44.10/wx/30.84,999.7,89 2006.229.05:27:45.08/fmout-gps/S +4.52E-07 2006.229.05:27:45.08:scan_name=229-0533,jd0608,40 2006.229.05:27:45.08:source=1424-418,142756.30,-420619.4,2000.0,cw 2006.229.05:27:46.14#flagr#flagr/antenna,new-source 2006.229.05:27:46.14:checkk5 2006.229.05:27:46.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:27:46.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:27:47.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:27:47.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:27:48.10/chk_obsdata//k5ts1/T2290526??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.05:27:48.50/chk_obsdata//k5ts2/T2290526??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.05:27:48.90/chk_obsdata//k5ts3/T2290526??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.05:27:49.29/chk_obsdata//k5ts4/T2290526??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.05:27:50.03/k5log//k5ts1_log_newline 2006.229.05:27:50.74/k5log//k5ts2_log_newline 2006.229.05:27:51.44/k5log//k5ts3_log_newline 2006.229.05:27:52.16/k5log//k5ts4_log_newline 2006.229.05:27:52.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:27:52.18:setupk4=1 2006.229.05:27:52.18$setupk4/echo=on 2006.229.05:27:52.18$setupk4/pcalon 2006.229.05:27:52.18$pcalon/"no phase cal control is implemented here 2006.229.05:27:52.18$setupk4/"tpicd=stop 2006.229.05:27:52.18$setupk4/"rec=synch_on 2006.229.05:27:52.18$setupk4/"rec_mode=128 2006.229.05:27:52.18$setupk4/!* 2006.229.05:27:52.18$setupk4/recpk4 2006.229.05:27:52.18$recpk4/recpatch= 2006.229.05:27:52.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:27:52.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:27:52.19$setupk4/vck44 2006.229.05:27:52.19$vck44/valo=1,524.99 2006.229.05:27:52.19#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.05:27:52.19#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.05:27:52.19#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:52.19#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:52.19#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:52.19#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:52.19#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:27:52.19#ibcon#first serial, iclass 7, count 0 2006.229.05:27:52.19#ibcon#enter sib2, iclass 7, count 0 2006.229.05:27:52.19#ibcon#flushed, iclass 7, count 0 2006.229.05:27:52.19#ibcon#about to write, iclass 7, count 0 2006.229.05:27:52.19#ibcon#wrote, iclass 7, count 0 2006.229.05:27:52.19#ibcon#about to read 3, iclass 7, count 0 2006.229.05:27:52.20#ibcon#read 3, iclass 7, count 0 2006.229.05:27:52.20#ibcon#about to read 4, iclass 7, count 0 2006.229.05:27:52.20#ibcon#read 4, iclass 7, count 0 2006.229.05:27:52.20#ibcon#about to read 5, iclass 7, count 0 2006.229.05:27:52.20#ibcon#read 5, iclass 7, count 0 2006.229.05:27:52.20#ibcon#about to read 6, iclass 7, count 0 2006.229.05:27:52.20#ibcon#read 6, iclass 7, count 0 2006.229.05:27:52.20#ibcon#end of sib2, iclass 7, count 0 2006.229.05:27:52.20#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:27:52.20#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:27:52.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:27:52.20#ibcon#*before write, iclass 7, count 0 2006.229.05:27:52.20#ibcon#enter sib2, iclass 7, count 0 2006.229.05:27:52.20#ibcon#flushed, iclass 7, count 0 2006.229.05:27:52.20#ibcon#about to write, iclass 7, count 0 2006.229.05:27:52.20#ibcon#wrote, iclass 7, count 0 2006.229.05:27:52.20#ibcon#about to read 3, iclass 7, count 0 2006.229.05:27:52.25#ibcon#read 3, iclass 7, count 0 2006.229.05:27:52.25#ibcon#about to read 4, iclass 7, count 0 2006.229.05:27:52.25#ibcon#read 4, iclass 7, count 0 2006.229.05:27:52.25#ibcon#about to read 5, iclass 7, count 0 2006.229.05:27:52.25#ibcon#read 5, iclass 7, count 0 2006.229.05:27:52.25#ibcon#about to read 6, iclass 7, count 0 2006.229.05:27:52.25#ibcon#read 6, iclass 7, count 0 2006.229.05:27:52.25#ibcon#end of sib2, iclass 7, count 0 2006.229.05:27:52.25#ibcon#*after write, iclass 7, count 0 2006.229.05:27:52.25#ibcon#*before return 0, iclass 7, count 0 2006.229.05:27:52.25#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:52.25#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:52.25#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:27:52.25#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:27:52.25$vck44/va=1,8 2006.229.05:27:52.25#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.05:27:52.25#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.05:27:52.25#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:52.25#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:52.25#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:52.25#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:52.25#ibcon#enter wrdev, iclass 11, count 2 2006.229.05:27:52.25#ibcon#first serial, iclass 11, count 2 2006.229.05:27:52.25#ibcon#enter sib2, iclass 11, count 2 2006.229.05:27:52.25#ibcon#flushed, iclass 11, count 2 2006.229.05:27:52.25#ibcon#about to write, iclass 11, count 2 2006.229.05:27:52.25#ibcon#wrote, iclass 11, count 2 2006.229.05:27:52.25#ibcon#about to read 3, iclass 11, count 2 2006.229.05:27:52.27#ibcon#read 3, iclass 11, count 2 2006.229.05:27:52.27#ibcon#about to read 4, iclass 11, count 2 2006.229.05:27:52.27#ibcon#read 4, iclass 11, count 2 2006.229.05:27:52.27#ibcon#about to read 5, iclass 11, count 2 2006.229.05:27:52.27#ibcon#read 5, iclass 11, count 2 2006.229.05:27:52.27#ibcon#about to read 6, iclass 11, count 2 2006.229.05:27:52.27#ibcon#read 6, iclass 11, count 2 2006.229.05:27:52.27#ibcon#end of sib2, iclass 11, count 2 2006.229.05:27:52.27#ibcon#*mode == 0, iclass 11, count 2 2006.229.05:27:52.27#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.05:27:52.27#ibcon#[25=AT01-08\r\n] 2006.229.05:27:52.27#ibcon#*before write, iclass 11, count 2 2006.229.05:27:52.27#ibcon#enter sib2, iclass 11, count 2 2006.229.05:27:52.27#ibcon#flushed, iclass 11, count 2 2006.229.05:27:52.27#ibcon#about to write, iclass 11, count 2 2006.229.05:27:52.27#ibcon#wrote, iclass 11, count 2 2006.229.05:27:52.27#ibcon#about to read 3, iclass 11, count 2 2006.229.05:27:52.30#ibcon#read 3, iclass 11, count 2 2006.229.05:27:52.30#ibcon#about to read 4, iclass 11, count 2 2006.229.05:27:52.30#ibcon#read 4, iclass 11, count 2 2006.229.05:27:52.30#ibcon#about to read 5, iclass 11, count 2 2006.229.05:27:52.30#ibcon#read 5, iclass 11, count 2 2006.229.05:27:52.30#ibcon#about to read 6, iclass 11, count 2 2006.229.05:27:52.30#ibcon#read 6, iclass 11, count 2 2006.229.05:27:52.30#ibcon#end of sib2, iclass 11, count 2 2006.229.05:27:52.30#ibcon#*after write, iclass 11, count 2 2006.229.05:27:52.30#ibcon#*before return 0, iclass 11, count 2 2006.229.05:27:52.30#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:52.30#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:52.30#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.05:27:52.30#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:52.30#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:52.42#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:52.42#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:52.42#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:27:52.42#ibcon#first serial, iclass 11, count 0 2006.229.05:27:52.42#ibcon#enter sib2, iclass 11, count 0 2006.229.05:27:52.42#ibcon#flushed, iclass 11, count 0 2006.229.05:27:52.42#ibcon#about to write, iclass 11, count 0 2006.229.05:27:52.42#ibcon#wrote, iclass 11, count 0 2006.229.05:27:52.42#ibcon#about to read 3, iclass 11, count 0 2006.229.05:27:52.44#ibcon#read 3, iclass 11, count 0 2006.229.05:27:52.44#ibcon#about to read 4, iclass 11, count 0 2006.229.05:27:52.44#ibcon#read 4, iclass 11, count 0 2006.229.05:27:52.44#ibcon#about to read 5, iclass 11, count 0 2006.229.05:27:52.44#ibcon#read 5, iclass 11, count 0 2006.229.05:27:52.44#ibcon#about to read 6, iclass 11, count 0 2006.229.05:27:52.44#ibcon#read 6, iclass 11, count 0 2006.229.05:27:52.44#ibcon#end of sib2, iclass 11, count 0 2006.229.05:27:52.44#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:27:52.44#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:27:52.44#ibcon#[25=USB\r\n] 2006.229.05:27:52.44#ibcon#*before write, iclass 11, count 0 2006.229.05:27:52.44#ibcon#enter sib2, iclass 11, count 0 2006.229.05:27:52.44#ibcon#flushed, iclass 11, count 0 2006.229.05:27:52.44#ibcon#about to write, iclass 11, count 0 2006.229.05:27:52.44#ibcon#wrote, iclass 11, count 0 2006.229.05:27:52.44#ibcon#about to read 3, iclass 11, count 0 2006.229.05:27:52.47#ibcon#read 3, iclass 11, count 0 2006.229.05:27:52.47#ibcon#about to read 4, iclass 11, count 0 2006.229.05:27:52.47#ibcon#read 4, iclass 11, count 0 2006.229.05:27:52.47#ibcon#about to read 5, iclass 11, count 0 2006.229.05:27:52.47#ibcon#read 5, iclass 11, count 0 2006.229.05:27:52.47#ibcon#about to read 6, iclass 11, count 0 2006.229.05:27:52.47#ibcon#read 6, iclass 11, count 0 2006.229.05:27:52.47#ibcon#end of sib2, iclass 11, count 0 2006.229.05:27:52.47#ibcon#*after write, iclass 11, count 0 2006.229.05:27:52.47#ibcon#*before return 0, iclass 11, count 0 2006.229.05:27:52.47#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:52.47#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:52.47#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:27:52.47#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:27:52.47$vck44/valo=2,534.99 2006.229.05:27:52.47#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.05:27:52.47#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.05:27:52.47#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:52.47#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:52.47#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:52.47#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:52.47#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:27:52.47#ibcon#first serial, iclass 13, count 0 2006.229.05:27:52.47#ibcon#enter sib2, iclass 13, count 0 2006.229.05:27:52.47#ibcon#flushed, iclass 13, count 0 2006.229.05:27:52.47#ibcon#about to write, iclass 13, count 0 2006.229.05:27:52.47#ibcon#wrote, iclass 13, count 0 2006.229.05:27:52.47#ibcon#about to read 3, iclass 13, count 0 2006.229.05:27:52.49#ibcon#read 3, iclass 13, count 0 2006.229.05:27:52.49#ibcon#about to read 4, iclass 13, count 0 2006.229.05:27:52.49#ibcon#read 4, iclass 13, count 0 2006.229.05:27:52.49#ibcon#about to read 5, iclass 13, count 0 2006.229.05:27:52.49#ibcon#read 5, iclass 13, count 0 2006.229.05:27:52.49#ibcon#about to read 6, iclass 13, count 0 2006.229.05:27:52.49#ibcon#read 6, iclass 13, count 0 2006.229.05:27:52.49#ibcon#end of sib2, iclass 13, count 0 2006.229.05:27:52.49#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:27:52.49#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:27:52.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:27:52.49#ibcon#*before write, iclass 13, count 0 2006.229.05:27:52.49#ibcon#enter sib2, iclass 13, count 0 2006.229.05:27:52.49#ibcon#flushed, iclass 13, count 0 2006.229.05:27:52.49#ibcon#about to write, iclass 13, count 0 2006.229.05:27:52.49#ibcon#wrote, iclass 13, count 0 2006.229.05:27:52.49#ibcon#about to read 3, iclass 13, count 0 2006.229.05:27:52.53#ibcon#read 3, iclass 13, count 0 2006.229.05:27:52.53#ibcon#about to read 4, iclass 13, count 0 2006.229.05:27:52.53#ibcon#read 4, iclass 13, count 0 2006.229.05:27:52.53#ibcon#about to read 5, iclass 13, count 0 2006.229.05:27:52.53#ibcon#read 5, iclass 13, count 0 2006.229.05:27:52.53#ibcon#about to read 6, iclass 13, count 0 2006.229.05:27:52.53#ibcon#read 6, iclass 13, count 0 2006.229.05:27:52.53#ibcon#end of sib2, iclass 13, count 0 2006.229.05:27:52.53#ibcon#*after write, iclass 13, count 0 2006.229.05:27:52.53#ibcon#*before return 0, iclass 13, count 0 2006.229.05:27:52.53#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:52.53#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:52.53#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:27:52.53#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:27:52.53$vck44/va=2,7 2006.229.05:27:52.53#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.05:27:52.53#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.05:27:52.53#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:52.53#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:52.59#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:52.59#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:52.59#ibcon#enter wrdev, iclass 15, count 2 2006.229.05:27:52.59#ibcon#first serial, iclass 15, count 2 2006.229.05:27:52.59#ibcon#enter sib2, iclass 15, count 2 2006.229.05:27:52.59#ibcon#flushed, iclass 15, count 2 2006.229.05:27:52.59#ibcon#about to write, iclass 15, count 2 2006.229.05:27:52.59#ibcon#wrote, iclass 15, count 2 2006.229.05:27:52.59#ibcon#about to read 3, iclass 15, count 2 2006.229.05:27:52.61#ibcon#read 3, iclass 15, count 2 2006.229.05:27:52.61#ibcon#about to read 4, iclass 15, count 2 2006.229.05:27:52.61#ibcon#read 4, iclass 15, count 2 2006.229.05:27:52.61#ibcon#about to read 5, iclass 15, count 2 2006.229.05:27:52.61#ibcon#read 5, iclass 15, count 2 2006.229.05:27:52.61#ibcon#about to read 6, iclass 15, count 2 2006.229.05:27:52.61#ibcon#read 6, iclass 15, count 2 2006.229.05:27:52.61#ibcon#end of sib2, iclass 15, count 2 2006.229.05:27:52.61#ibcon#*mode == 0, iclass 15, count 2 2006.229.05:27:52.61#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.05:27:52.61#ibcon#[25=AT02-07\r\n] 2006.229.05:27:52.61#ibcon#*before write, iclass 15, count 2 2006.229.05:27:52.61#ibcon#enter sib2, iclass 15, count 2 2006.229.05:27:52.61#ibcon#flushed, iclass 15, count 2 2006.229.05:27:52.61#ibcon#about to write, iclass 15, count 2 2006.229.05:27:52.61#ibcon#wrote, iclass 15, count 2 2006.229.05:27:52.61#ibcon#about to read 3, iclass 15, count 2 2006.229.05:27:52.64#ibcon#read 3, iclass 15, count 2 2006.229.05:27:52.64#ibcon#about to read 4, iclass 15, count 2 2006.229.05:27:52.64#ibcon#read 4, iclass 15, count 2 2006.229.05:27:52.64#ibcon#about to read 5, iclass 15, count 2 2006.229.05:27:52.64#ibcon#read 5, iclass 15, count 2 2006.229.05:27:52.64#ibcon#about to read 6, iclass 15, count 2 2006.229.05:27:52.64#ibcon#read 6, iclass 15, count 2 2006.229.05:27:52.64#ibcon#end of sib2, iclass 15, count 2 2006.229.05:27:52.64#ibcon#*after write, iclass 15, count 2 2006.229.05:27:52.64#ibcon#*before return 0, iclass 15, count 2 2006.229.05:27:52.64#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:52.64#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:52.64#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.05:27:52.64#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:52.64#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:52.76#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:52.76#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:52.76#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:27:52.76#ibcon#first serial, iclass 15, count 0 2006.229.05:27:52.76#ibcon#enter sib2, iclass 15, count 0 2006.229.05:27:52.76#ibcon#flushed, iclass 15, count 0 2006.229.05:27:52.76#ibcon#about to write, iclass 15, count 0 2006.229.05:27:52.76#ibcon#wrote, iclass 15, count 0 2006.229.05:27:52.76#ibcon#about to read 3, iclass 15, count 0 2006.229.05:27:52.78#ibcon#read 3, iclass 15, count 0 2006.229.05:27:52.78#ibcon#about to read 4, iclass 15, count 0 2006.229.05:27:52.78#ibcon#read 4, iclass 15, count 0 2006.229.05:27:52.78#ibcon#about to read 5, iclass 15, count 0 2006.229.05:27:52.78#ibcon#read 5, iclass 15, count 0 2006.229.05:27:52.78#ibcon#about to read 6, iclass 15, count 0 2006.229.05:27:52.78#ibcon#read 6, iclass 15, count 0 2006.229.05:27:52.78#ibcon#end of sib2, iclass 15, count 0 2006.229.05:27:52.78#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:27:52.78#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:27:52.78#ibcon#[25=USB\r\n] 2006.229.05:27:52.78#ibcon#*before write, iclass 15, count 0 2006.229.05:27:52.78#ibcon#enter sib2, iclass 15, count 0 2006.229.05:27:52.78#ibcon#flushed, iclass 15, count 0 2006.229.05:27:52.78#ibcon#about to write, iclass 15, count 0 2006.229.05:27:52.78#ibcon#wrote, iclass 15, count 0 2006.229.05:27:52.78#ibcon#about to read 3, iclass 15, count 0 2006.229.05:27:52.81#ibcon#read 3, iclass 15, count 0 2006.229.05:27:52.81#ibcon#about to read 4, iclass 15, count 0 2006.229.05:27:52.81#ibcon#read 4, iclass 15, count 0 2006.229.05:27:52.81#ibcon#about to read 5, iclass 15, count 0 2006.229.05:27:52.81#ibcon#read 5, iclass 15, count 0 2006.229.05:27:52.81#ibcon#about to read 6, iclass 15, count 0 2006.229.05:27:52.81#ibcon#read 6, iclass 15, count 0 2006.229.05:27:52.81#ibcon#end of sib2, iclass 15, count 0 2006.229.05:27:52.81#ibcon#*after write, iclass 15, count 0 2006.229.05:27:52.81#ibcon#*before return 0, iclass 15, count 0 2006.229.05:27:52.81#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:52.81#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:52.81#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:27:52.81#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:27:52.81$vck44/valo=3,564.99 2006.229.05:27:52.81#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:27:52.81#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:27:52.81#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:52.81#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:52.81#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:52.81#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:52.81#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:27:52.81#ibcon#first serial, iclass 17, count 0 2006.229.05:27:52.81#ibcon#enter sib2, iclass 17, count 0 2006.229.05:27:52.81#ibcon#flushed, iclass 17, count 0 2006.229.05:27:52.81#ibcon#about to write, iclass 17, count 0 2006.229.05:27:52.81#ibcon#wrote, iclass 17, count 0 2006.229.05:27:52.81#ibcon#about to read 3, iclass 17, count 0 2006.229.05:27:52.83#ibcon#read 3, iclass 17, count 0 2006.229.05:27:52.83#ibcon#about to read 4, iclass 17, count 0 2006.229.05:27:52.83#ibcon#read 4, iclass 17, count 0 2006.229.05:27:52.83#ibcon#about to read 5, iclass 17, count 0 2006.229.05:27:52.83#ibcon#read 5, iclass 17, count 0 2006.229.05:27:52.83#ibcon#about to read 6, iclass 17, count 0 2006.229.05:27:52.83#ibcon#read 6, iclass 17, count 0 2006.229.05:27:52.83#ibcon#end of sib2, iclass 17, count 0 2006.229.05:27:52.83#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:27:52.83#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:27:52.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:27:52.83#ibcon#*before write, iclass 17, count 0 2006.229.05:27:52.83#ibcon#enter sib2, iclass 17, count 0 2006.229.05:27:52.83#ibcon#flushed, iclass 17, count 0 2006.229.05:27:52.83#ibcon#about to write, iclass 17, count 0 2006.229.05:27:52.83#ibcon#wrote, iclass 17, count 0 2006.229.05:27:52.83#ibcon#about to read 3, iclass 17, count 0 2006.229.05:27:52.87#ibcon#read 3, iclass 17, count 0 2006.229.05:27:52.87#ibcon#about to read 4, iclass 17, count 0 2006.229.05:27:52.87#ibcon#read 4, iclass 17, count 0 2006.229.05:27:52.87#ibcon#about to read 5, iclass 17, count 0 2006.229.05:27:52.87#ibcon#read 5, iclass 17, count 0 2006.229.05:27:52.87#ibcon#about to read 6, iclass 17, count 0 2006.229.05:27:52.87#ibcon#read 6, iclass 17, count 0 2006.229.05:27:52.87#ibcon#end of sib2, iclass 17, count 0 2006.229.05:27:52.87#ibcon#*after write, iclass 17, count 0 2006.229.05:27:52.87#ibcon#*before return 0, iclass 17, count 0 2006.229.05:27:52.87#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:52.87#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:52.87#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:27:52.87#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:27:52.87$vck44/va=3,6 2006.229.05:27:52.87#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.05:27:52.87#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.05:27:52.87#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:52.87#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:52.93#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:52.93#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:52.93#ibcon#enter wrdev, iclass 19, count 2 2006.229.05:27:52.93#ibcon#first serial, iclass 19, count 2 2006.229.05:27:52.93#ibcon#enter sib2, iclass 19, count 2 2006.229.05:27:52.93#ibcon#flushed, iclass 19, count 2 2006.229.05:27:52.93#ibcon#about to write, iclass 19, count 2 2006.229.05:27:52.93#ibcon#wrote, iclass 19, count 2 2006.229.05:27:52.93#ibcon#about to read 3, iclass 19, count 2 2006.229.05:27:52.95#ibcon#read 3, iclass 19, count 2 2006.229.05:27:52.95#ibcon#about to read 4, iclass 19, count 2 2006.229.05:27:52.95#ibcon#read 4, iclass 19, count 2 2006.229.05:27:52.95#ibcon#about to read 5, iclass 19, count 2 2006.229.05:27:52.95#ibcon#read 5, iclass 19, count 2 2006.229.05:27:52.95#ibcon#about to read 6, iclass 19, count 2 2006.229.05:27:52.95#ibcon#read 6, iclass 19, count 2 2006.229.05:27:52.95#ibcon#end of sib2, iclass 19, count 2 2006.229.05:27:52.95#ibcon#*mode == 0, iclass 19, count 2 2006.229.05:27:52.95#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.05:27:52.95#ibcon#[25=AT03-06\r\n] 2006.229.05:27:52.95#ibcon#*before write, iclass 19, count 2 2006.229.05:27:52.95#ibcon#enter sib2, iclass 19, count 2 2006.229.05:27:52.95#ibcon#flushed, iclass 19, count 2 2006.229.05:27:52.95#ibcon#about to write, iclass 19, count 2 2006.229.05:27:52.95#ibcon#wrote, iclass 19, count 2 2006.229.05:27:52.95#ibcon#about to read 3, iclass 19, count 2 2006.229.05:27:52.98#ibcon#read 3, iclass 19, count 2 2006.229.05:27:52.98#ibcon#about to read 4, iclass 19, count 2 2006.229.05:27:52.98#ibcon#read 4, iclass 19, count 2 2006.229.05:27:52.98#ibcon#about to read 5, iclass 19, count 2 2006.229.05:27:52.98#ibcon#read 5, iclass 19, count 2 2006.229.05:27:52.98#ibcon#about to read 6, iclass 19, count 2 2006.229.05:27:52.98#ibcon#read 6, iclass 19, count 2 2006.229.05:27:52.98#ibcon#end of sib2, iclass 19, count 2 2006.229.05:27:52.98#ibcon#*after write, iclass 19, count 2 2006.229.05:27:52.98#ibcon#*before return 0, iclass 19, count 2 2006.229.05:27:52.98#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:52.98#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:52.98#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.05:27:52.98#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:52.98#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:53.10#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:53.10#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:53.10#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:27:53.10#ibcon#first serial, iclass 19, count 0 2006.229.05:27:53.10#ibcon#enter sib2, iclass 19, count 0 2006.229.05:27:53.10#ibcon#flushed, iclass 19, count 0 2006.229.05:27:53.10#ibcon#about to write, iclass 19, count 0 2006.229.05:27:53.10#ibcon#wrote, iclass 19, count 0 2006.229.05:27:53.10#ibcon#about to read 3, iclass 19, count 0 2006.229.05:27:53.12#ibcon#read 3, iclass 19, count 0 2006.229.05:27:53.12#ibcon#about to read 4, iclass 19, count 0 2006.229.05:27:53.12#ibcon#read 4, iclass 19, count 0 2006.229.05:27:53.12#ibcon#about to read 5, iclass 19, count 0 2006.229.05:27:53.12#ibcon#read 5, iclass 19, count 0 2006.229.05:27:53.12#ibcon#about to read 6, iclass 19, count 0 2006.229.05:27:53.12#ibcon#read 6, iclass 19, count 0 2006.229.05:27:53.12#ibcon#end of sib2, iclass 19, count 0 2006.229.05:27:53.12#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:27:53.12#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:27:53.12#ibcon#[25=USB\r\n] 2006.229.05:27:53.12#ibcon#*before write, iclass 19, count 0 2006.229.05:27:53.12#ibcon#enter sib2, iclass 19, count 0 2006.229.05:27:53.12#ibcon#flushed, iclass 19, count 0 2006.229.05:27:53.12#ibcon#about to write, iclass 19, count 0 2006.229.05:27:53.12#ibcon#wrote, iclass 19, count 0 2006.229.05:27:53.12#ibcon#about to read 3, iclass 19, count 0 2006.229.05:27:53.15#ibcon#read 3, iclass 19, count 0 2006.229.05:27:53.15#ibcon#about to read 4, iclass 19, count 0 2006.229.05:27:53.15#ibcon#read 4, iclass 19, count 0 2006.229.05:27:53.15#ibcon#about to read 5, iclass 19, count 0 2006.229.05:27:53.15#ibcon#read 5, iclass 19, count 0 2006.229.05:27:53.15#ibcon#about to read 6, iclass 19, count 0 2006.229.05:27:53.15#ibcon#read 6, iclass 19, count 0 2006.229.05:27:53.15#ibcon#end of sib2, iclass 19, count 0 2006.229.05:27:53.15#ibcon#*after write, iclass 19, count 0 2006.229.05:27:53.15#ibcon#*before return 0, iclass 19, count 0 2006.229.05:27:53.15#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:53.15#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:53.15#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:27:53.15#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:27:53.15$vck44/valo=4,624.99 2006.229.05:27:53.15#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.05:27:53.15#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.05:27:53.15#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:53.15#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:53.15#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:53.15#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:53.15#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:27:53.15#ibcon#first serial, iclass 21, count 0 2006.229.05:27:53.15#ibcon#enter sib2, iclass 21, count 0 2006.229.05:27:53.15#ibcon#flushed, iclass 21, count 0 2006.229.05:27:53.15#ibcon#about to write, iclass 21, count 0 2006.229.05:27:53.15#ibcon#wrote, iclass 21, count 0 2006.229.05:27:53.15#ibcon#about to read 3, iclass 21, count 0 2006.229.05:27:53.17#ibcon#read 3, iclass 21, count 0 2006.229.05:27:53.17#ibcon#about to read 4, iclass 21, count 0 2006.229.05:27:53.17#ibcon#read 4, iclass 21, count 0 2006.229.05:27:53.17#ibcon#about to read 5, iclass 21, count 0 2006.229.05:27:53.17#ibcon#read 5, iclass 21, count 0 2006.229.05:27:53.17#ibcon#about to read 6, iclass 21, count 0 2006.229.05:27:53.17#ibcon#read 6, iclass 21, count 0 2006.229.05:27:53.17#ibcon#end of sib2, iclass 21, count 0 2006.229.05:27:53.17#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:27:53.17#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:27:53.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:27:53.17#ibcon#*before write, iclass 21, count 0 2006.229.05:27:53.17#ibcon#enter sib2, iclass 21, count 0 2006.229.05:27:53.17#ibcon#flushed, iclass 21, count 0 2006.229.05:27:53.17#ibcon#about to write, iclass 21, count 0 2006.229.05:27:53.17#ibcon#wrote, iclass 21, count 0 2006.229.05:27:53.17#ibcon#about to read 3, iclass 21, count 0 2006.229.05:27:53.21#ibcon#read 3, iclass 21, count 0 2006.229.05:27:53.21#ibcon#about to read 4, iclass 21, count 0 2006.229.05:27:53.21#ibcon#read 4, iclass 21, count 0 2006.229.05:27:53.21#ibcon#about to read 5, iclass 21, count 0 2006.229.05:27:53.21#ibcon#read 5, iclass 21, count 0 2006.229.05:27:53.21#ibcon#about to read 6, iclass 21, count 0 2006.229.05:27:53.21#ibcon#read 6, iclass 21, count 0 2006.229.05:27:53.21#ibcon#end of sib2, iclass 21, count 0 2006.229.05:27:53.21#ibcon#*after write, iclass 21, count 0 2006.229.05:27:53.21#ibcon#*before return 0, iclass 21, count 0 2006.229.05:27:53.21#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:53.21#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:53.21#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:27:53.21#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:27:53.21$vck44/va=4,7 2006.229.05:27:53.21#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.05:27:53.21#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.05:27:53.21#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:53.21#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:53.27#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:53.27#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:53.27#ibcon#enter wrdev, iclass 23, count 2 2006.229.05:27:53.27#ibcon#first serial, iclass 23, count 2 2006.229.05:27:53.27#ibcon#enter sib2, iclass 23, count 2 2006.229.05:27:53.27#ibcon#flushed, iclass 23, count 2 2006.229.05:27:53.27#ibcon#about to write, iclass 23, count 2 2006.229.05:27:53.27#ibcon#wrote, iclass 23, count 2 2006.229.05:27:53.27#ibcon#about to read 3, iclass 23, count 2 2006.229.05:27:53.29#ibcon#read 3, iclass 23, count 2 2006.229.05:27:53.29#ibcon#about to read 4, iclass 23, count 2 2006.229.05:27:53.29#ibcon#read 4, iclass 23, count 2 2006.229.05:27:53.29#ibcon#about to read 5, iclass 23, count 2 2006.229.05:27:53.29#ibcon#read 5, iclass 23, count 2 2006.229.05:27:53.29#ibcon#about to read 6, iclass 23, count 2 2006.229.05:27:53.29#ibcon#read 6, iclass 23, count 2 2006.229.05:27:53.29#ibcon#end of sib2, iclass 23, count 2 2006.229.05:27:53.29#ibcon#*mode == 0, iclass 23, count 2 2006.229.05:27:53.29#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.05:27:53.29#ibcon#[25=AT04-07\r\n] 2006.229.05:27:53.29#ibcon#*before write, iclass 23, count 2 2006.229.05:27:53.29#ibcon#enter sib2, iclass 23, count 2 2006.229.05:27:53.29#ibcon#flushed, iclass 23, count 2 2006.229.05:27:53.29#ibcon#about to write, iclass 23, count 2 2006.229.05:27:53.29#ibcon#wrote, iclass 23, count 2 2006.229.05:27:53.29#ibcon#about to read 3, iclass 23, count 2 2006.229.05:27:53.32#ibcon#read 3, iclass 23, count 2 2006.229.05:27:53.32#ibcon#about to read 4, iclass 23, count 2 2006.229.05:27:53.32#ibcon#read 4, iclass 23, count 2 2006.229.05:27:53.32#ibcon#about to read 5, iclass 23, count 2 2006.229.05:27:53.32#ibcon#read 5, iclass 23, count 2 2006.229.05:27:53.32#ibcon#about to read 6, iclass 23, count 2 2006.229.05:27:53.32#ibcon#read 6, iclass 23, count 2 2006.229.05:27:53.32#ibcon#end of sib2, iclass 23, count 2 2006.229.05:27:53.32#ibcon#*after write, iclass 23, count 2 2006.229.05:27:53.32#ibcon#*before return 0, iclass 23, count 2 2006.229.05:27:53.32#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:53.32#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:53.32#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.05:27:53.32#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:53.32#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:53.36#abcon#<5=/05 4.1 8.1 30.84 89 999.6\r\n> 2006.229.05:27:53.38#abcon#{5=INTERFACE CLEAR} 2006.229.05:27:53.44#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:27:53.44#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:53.44#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:53.44#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:27:53.44#ibcon#first serial, iclass 23, count 0 2006.229.05:27:53.44#ibcon#enter sib2, iclass 23, count 0 2006.229.05:27:53.44#ibcon#flushed, iclass 23, count 0 2006.229.05:27:53.44#ibcon#about to write, iclass 23, count 0 2006.229.05:27:53.44#ibcon#wrote, iclass 23, count 0 2006.229.05:27:53.44#ibcon#about to read 3, iclass 23, count 0 2006.229.05:27:53.46#ibcon#read 3, iclass 23, count 0 2006.229.05:27:53.46#ibcon#about to read 4, iclass 23, count 0 2006.229.05:27:53.46#ibcon#read 4, iclass 23, count 0 2006.229.05:27:53.46#ibcon#about to read 5, iclass 23, count 0 2006.229.05:27:53.46#ibcon#read 5, iclass 23, count 0 2006.229.05:27:53.46#ibcon#about to read 6, iclass 23, count 0 2006.229.05:27:53.46#ibcon#read 6, iclass 23, count 0 2006.229.05:27:53.46#ibcon#end of sib2, iclass 23, count 0 2006.229.05:27:53.46#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:27:53.46#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:27:53.46#ibcon#[25=USB\r\n] 2006.229.05:27:53.46#ibcon#*before write, iclass 23, count 0 2006.229.05:27:53.46#ibcon#enter sib2, iclass 23, count 0 2006.229.05:27:53.46#ibcon#flushed, iclass 23, count 0 2006.229.05:27:53.46#ibcon#about to write, iclass 23, count 0 2006.229.05:27:53.46#ibcon#wrote, iclass 23, count 0 2006.229.05:27:53.46#ibcon#about to read 3, iclass 23, count 0 2006.229.05:27:53.49#ibcon#read 3, iclass 23, count 0 2006.229.05:27:53.49#ibcon#about to read 4, iclass 23, count 0 2006.229.05:27:53.49#ibcon#read 4, iclass 23, count 0 2006.229.05:27:53.49#ibcon#about to read 5, iclass 23, count 0 2006.229.05:27:53.49#ibcon#read 5, iclass 23, count 0 2006.229.05:27:53.49#ibcon#about to read 6, iclass 23, count 0 2006.229.05:27:53.49#ibcon#read 6, iclass 23, count 0 2006.229.05:27:53.49#ibcon#end of sib2, iclass 23, count 0 2006.229.05:27:53.49#ibcon#*after write, iclass 23, count 0 2006.229.05:27:53.49#ibcon#*before return 0, iclass 23, count 0 2006.229.05:27:53.49#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:53.49#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:53.49#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:27:53.49#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:27:53.49$vck44/valo=5,734.99 2006.229.05:27:53.49#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:27:53.49#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:27:53.49#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:53.49#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:53.49#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:53.49#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:53.49#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:27:53.49#ibcon#first serial, iclass 29, count 0 2006.229.05:27:53.49#ibcon#enter sib2, iclass 29, count 0 2006.229.05:27:53.49#ibcon#flushed, iclass 29, count 0 2006.229.05:27:53.49#ibcon#about to write, iclass 29, count 0 2006.229.05:27:53.49#ibcon#wrote, iclass 29, count 0 2006.229.05:27:53.49#ibcon#about to read 3, iclass 29, count 0 2006.229.05:27:53.51#ibcon#read 3, iclass 29, count 0 2006.229.05:27:53.51#ibcon#about to read 4, iclass 29, count 0 2006.229.05:27:53.51#ibcon#read 4, iclass 29, count 0 2006.229.05:27:53.51#ibcon#about to read 5, iclass 29, count 0 2006.229.05:27:53.51#ibcon#read 5, iclass 29, count 0 2006.229.05:27:53.51#ibcon#about to read 6, iclass 29, count 0 2006.229.05:27:53.51#ibcon#read 6, iclass 29, count 0 2006.229.05:27:53.51#ibcon#end of sib2, iclass 29, count 0 2006.229.05:27:53.51#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:27:53.51#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:27:53.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:27:53.51#ibcon#*before write, iclass 29, count 0 2006.229.05:27:53.51#ibcon#enter sib2, iclass 29, count 0 2006.229.05:27:53.51#ibcon#flushed, iclass 29, count 0 2006.229.05:27:53.51#ibcon#about to write, iclass 29, count 0 2006.229.05:27:53.51#ibcon#wrote, iclass 29, count 0 2006.229.05:27:53.51#ibcon#about to read 3, iclass 29, count 0 2006.229.05:27:53.55#ibcon#read 3, iclass 29, count 0 2006.229.05:27:53.55#ibcon#about to read 4, iclass 29, count 0 2006.229.05:27:53.55#ibcon#read 4, iclass 29, count 0 2006.229.05:27:53.55#ibcon#about to read 5, iclass 29, count 0 2006.229.05:27:53.55#ibcon#read 5, iclass 29, count 0 2006.229.05:27:53.55#ibcon#about to read 6, iclass 29, count 0 2006.229.05:27:53.55#ibcon#read 6, iclass 29, count 0 2006.229.05:27:53.55#ibcon#end of sib2, iclass 29, count 0 2006.229.05:27:53.55#ibcon#*after write, iclass 29, count 0 2006.229.05:27:53.55#ibcon#*before return 0, iclass 29, count 0 2006.229.05:27:53.55#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:53.55#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:53.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:27:53.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:27:53.55$vck44/va=5,4 2006.229.05:27:53.55#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.05:27:53.55#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.05:27:53.55#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:53.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:53.61#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:53.61#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:53.61#ibcon#enter wrdev, iclass 31, count 2 2006.229.05:27:53.61#ibcon#first serial, iclass 31, count 2 2006.229.05:27:53.61#ibcon#enter sib2, iclass 31, count 2 2006.229.05:27:53.61#ibcon#flushed, iclass 31, count 2 2006.229.05:27:53.61#ibcon#about to write, iclass 31, count 2 2006.229.05:27:53.61#ibcon#wrote, iclass 31, count 2 2006.229.05:27:53.61#ibcon#about to read 3, iclass 31, count 2 2006.229.05:27:53.63#ibcon#read 3, iclass 31, count 2 2006.229.05:27:53.63#ibcon#about to read 4, iclass 31, count 2 2006.229.05:27:53.63#ibcon#read 4, iclass 31, count 2 2006.229.05:27:53.63#ibcon#about to read 5, iclass 31, count 2 2006.229.05:27:53.63#ibcon#read 5, iclass 31, count 2 2006.229.05:27:53.63#ibcon#about to read 6, iclass 31, count 2 2006.229.05:27:53.63#ibcon#read 6, iclass 31, count 2 2006.229.05:27:53.63#ibcon#end of sib2, iclass 31, count 2 2006.229.05:27:53.63#ibcon#*mode == 0, iclass 31, count 2 2006.229.05:27:53.63#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.05:27:53.63#ibcon#[25=AT05-04\r\n] 2006.229.05:27:53.63#ibcon#*before write, iclass 31, count 2 2006.229.05:27:53.63#ibcon#enter sib2, iclass 31, count 2 2006.229.05:27:53.63#ibcon#flushed, iclass 31, count 2 2006.229.05:27:53.63#ibcon#about to write, iclass 31, count 2 2006.229.05:27:53.63#ibcon#wrote, iclass 31, count 2 2006.229.05:27:53.63#ibcon#about to read 3, iclass 31, count 2 2006.229.05:27:53.66#ibcon#read 3, iclass 31, count 2 2006.229.05:27:53.66#ibcon#about to read 4, iclass 31, count 2 2006.229.05:27:53.66#ibcon#read 4, iclass 31, count 2 2006.229.05:27:53.66#ibcon#about to read 5, iclass 31, count 2 2006.229.05:27:53.66#ibcon#read 5, iclass 31, count 2 2006.229.05:27:53.66#ibcon#about to read 6, iclass 31, count 2 2006.229.05:27:53.66#ibcon#read 6, iclass 31, count 2 2006.229.05:27:53.66#ibcon#end of sib2, iclass 31, count 2 2006.229.05:27:53.66#ibcon#*after write, iclass 31, count 2 2006.229.05:27:53.66#ibcon#*before return 0, iclass 31, count 2 2006.229.05:27:53.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:53.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:53.66#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.05:27:53.66#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:53.66#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:53.78#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:53.78#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:53.78#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:27:53.78#ibcon#first serial, iclass 31, count 0 2006.229.05:27:53.78#ibcon#enter sib2, iclass 31, count 0 2006.229.05:27:53.78#ibcon#flushed, iclass 31, count 0 2006.229.05:27:53.78#ibcon#about to write, iclass 31, count 0 2006.229.05:27:53.78#ibcon#wrote, iclass 31, count 0 2006.229.05:27:53.78#ibcon#about to read 3, iclass 31, count 0 2006.229.05:27:53.80#ibcon#read 3, iclass 31, count 0 2006.229.05:27:53.80#ibcon#about to read 4, iclass 31, count 0 2006.229.05:27:53.80#ibcon#read 4, iclass 31, count 0 2006.229.05:27:53.80#ibcon#about to read 5, iclass 31, count 0 2006.229.05:27:53.80#ibcon#read 5, iclass 31, count 0 2006.229.05:27:53.80#ibcon#about to read 6, iclass 31, count 0 2006.229.05:27:53.80#ibcon#read 6, iclass 31, count 0 2006.229.05:27:53.80#ibcon#end of sib2, iclass 31, count 0 2006.229.05:27:53.80#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:27:53.80#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:27:53.80#ibcon#[25=USB\r\n] 2006.229.05:27:53.80#ibcon#*before write, iclass 31, count 0 2006.229.05:27:53.80#ibcon#enter sib2, iclass 31, count 0 2006.229.05:27:53.80#ibcon#flushed, iclass 31, count 0 2006.229.05:27:53.80#ibcon#about to write, iclass 31, count 0 2006.229.05:27:53.80#ibcon#wrote, iclass 31, count 0 2006.229.05:27:53.80#ibcon#about to read 3, iclass 31, count 0 2006.229.05:27:53.83#ibcon#read 3, iclass 31, count 0 2006.229.05:27:53.83#ibcon#about to read 4, iclass 31, count 0 2006.229.05:27:53.83#ibcon#read 4, iclass 31, count 0 2006.229.05:27:53.83#ibcon#about to read 5, iclass 31, count 0 2006.229.05:27:53.83#ibcon#read 5, iclass 31, count 0 2006.229.05:27:53.83#ibcon#about to read 6, iclass 31, count 0 2006.229.05:27:53.83#ibcon#read 6, iclass 31, count 0 2006.229.05:27:53.83#ibcon#end of sib2, iclass 31, count 0 2006.229.05:27:53.83#ibcon#*after write, iclass 31, count 0 2006.229.05:27:53.83#ibcon#*before return 0, iclass 31, count 0 2006.229.05:27:53.83#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:53.83#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:53.83#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:27:53.83#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:27:53.83$vck44/valo=6,814.99 2006.229.05:27:53.83#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.05:27:53.83#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.05:27:53.83#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:53.83#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:53.83#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:53.83#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:53.83#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:27:53.83#ibcon#first serial, iclass 33, count 0 2006.229.05:27:53.83#ibcon#enter sib2, iclass 33, count 0 2006.229.05:27:53.83#ibcon#flushed, iclass 33, count 0 2006.229.05:27:53.83#ibcon#about to write, iclass 33, count 0 2006.229.05:27:53.83#ibcon#wrote, iclass 33, count 0 2006.229.05:27:53.83#ibcon#about to read 3, iclass 33, count 0 2006.229.05:27:53.85#ibcon#read 3, iclass 33, count 0 2006.229.05:27:53.85#ibcon#about to read 4, iclass 33, count 0 2006.229.05:27:53.85#ibcon#read 4, iclass 33, count 0 2006.229.05:27:53.85#ibcon#about to read 5, iclass 33, count 0 2006.229.05:27:53.85#ibcon#read 5, iclass 33, count 0 2006.229.05:27:53.85#ibcon#about to read 6, iclass 33, count 0 2006.229.05:27:53.85#ibcon#read 6, iclass 33, count 0 2006.229.05:27:53.85#ibcon#end of sib2, iclass 33, count 0 2006.229.05:27:53.85#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:27:53.85#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:27:53.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:27:53.85#ibcon#*before write, iclass 33, count 0 2006.229.05:27:53.85#ibcon#enter sib2, iclass 33, count 0 2006.229.05:27:53.85#ibcon#flushed, iclass 33, count 0 2006.229.05:27:53.85#ibcon#about to write, iclass 33, count 0 2006.229.05:27:53.85#ibcon#wrote, iclass 33, count 0 2006.229.05:27:53.85#ibcon#about to read 3, iclass 33, count 0 2006.229.05:27:53.89#ibcon#read 3, iclass 33, count 0 2006.229.05:27:53.89#ibcon#about to read 4, iclass 33, count 0 2006.229.05:27:53.89#ibcon#read 4, iclass 33, count 0 2006.229.05:27:53.89#ibcon#about to read 5, iclass 33, count 0 2006.229.05:27:53.89#ibcon#read 5, iclass 33, count 0 2006.229.05:27:53.89#ibcon#about to read 6, iclass 33, count 0 2006.229.05:27:53.89#ibcon#read 6, iclass 33, count 0 2006.229.05:27:53.89#ibcon#end of sib2, iclass 33, count 0 2006.229.05:27:53.89#ibcon#*after write, iclass 33, count 0 2006.229.05:27:53.89#ibcon#*before return 0, iclass 33, count 0 2006.229.05:27:53.89#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:53.89#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:53.89#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:27:53.89#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:27:53.89$vck44/va=6,4 2006.229.05:27:53.89#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.05:27:53.89#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.05:27:53.89#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:53.89#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:53.95#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:53.95#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:53.95#ibcon#enter wrdev, iclass 35, count 2 2006.229.05:27:53.95#ibcon#first serial, iclass 35, count 2 2006.229.05:27:53.95#ibcon#enter sib2, iclass 35, count 2 2006.229.05:27:53.95#ibcon#flushed, iclass 35, count 2 2006.229.05:27:53.95#ibcon#about to write, iclass 35, count 2 2006.229.05:27:53.95#ibcon#wrote, iclass 35, count 2 2006.229.05:27:53.95#ibcon#about to read 3, iclass 35, count 2 2006.229.05:27:53.97#ibcon#read 3, iclass 35, count 2 2006.229.05:27:53.97#ibcon#about to read 4, iclass 35, count 2 2006.229.05:27:53.97#ibcon#read 4, iclass 35, count 2 2006.229.05:27:53.97#ibcon#about to read 5, iclass 35, count 2 2006.229.05:27:53.97#ibcon#read 5, iclass 35, count 2 2006.229.05:27:53.97#ibcon#about to read 6, iclass 35, count 2 2006.229.05:27:53.97#ibcon#read 6, iclass 35, count 2 2006.229.05:27:53.97#ibcon#end of sib2, iclass 35, count 2 2006.229.05:27:53.97#ibcon#*mode == 0, iclass 35, count 2 2006.229.05:27:53.97#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.05:27:53.97#ibcon#[25=AT06-04\r\n] 2006.229.05:27:53.97#ibcon#*before write, iclass 35, count 2 2006.229.05:27:53.97#ibcon#enter sib2, iclass 35, count 2 2006.229.05:27:53.97#ibcon#flushed, iclass 35, count 2 2006.229.05:27:53.97#ibcon#about to write, iclass 35, count 2 2006.229.05:27:53.97#ibcon#wrote, iclass 35, count 2 2006.229.05:27:53.97#ibcon#about to read 3, iclass 35, count 2 2006.229.05:27:54.00#ibcon#read 3, iclass 35, count 2 2006.229.05:27:54.00#ibcon#about to read 4, iclass 35, count 2 2006.229.05:27:54.00#ibcon#read 4, iclass 35, count 2 2006.229.05:27:54.00#ibcon#about to read 5, iclass 35, count 2 2006.229.05:27:54.00#ibcon#read 5, iclass 35, count 2 2006.229.05:27:54.00#ibcon#about to read 6, iclass 35, count 2 2006.229.05:27:54.00#ibcon#read 6, iclass 35, count 2 2006.229.05:27:54.00#ibcon#end of sib2, iclass 35, count 2 2006.229.05:27:54.00#ibcon#*after write, iclass 35, count 2 2006.229.05:27:54.00#ibcon#*before return 0, iclass 35, count 2 2006.229.05:27:54.00#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:54.00#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:54.00#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.05:27:54.00#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:54.00#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:54.12#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:54.12#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:54.12#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:27:54.12#ibcon#first serial, iclass 35, count 0 2006.229.05:27:54.12#ibcon#enter sib2, iclass 35, count 0 2006.229.05:27:54.12#ibcon#flushed, iclass 35, count 0 2006.229.05:27:54.12#ibcon#about to write, iclass 35, count 0 2006.229.05:27:54.12#ibcon#wrote, iclass 35, count 0 2006.229.05:27:54.12#ibcon#about to read 3, iclass 35, count 0 2006.229.05:27:54.14#ibcon#read 3, iclass 35, count 0 2006.229.05:27:54.14#ibcon#about to read 4, iclass 35, count 0 2006.229.05:27:54.14#ibcon#read 4, iclass 35, count 0 2006.229.05:27:54.14#ibcon#about to read 5, iclass 35, count 0 2006.229.05:27:54.14#ibcon#read 5, iclass 35, count 0 2006.229.05:27:54.14#ibcon#about to read 6, iclass 35, count 0 2006.229.05:27:54.14#ibcon#read 6, iclass 35, count 0 2006.229.05:27:54.14#ibcon#end of sib2, iclass 35, count 0 2006.229.05:27:54.14#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:27:54.14#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:27:54.14#ibcon#[25=USB\r\n] 2006.229.05:27:54.14#ibcon#*before write, iclass 35, count 0 2006.229.05:27:54.14#ibcon#enter sib2, iclass 35, count 0 2006.229.05:27:54.14#ibcon#flushed, iclass 35, count 0 2006.229.05:27:54.14#ibcon#about to write, iclass 35, count 0 2006.229.05:27:54.14#ibcon#wrote, iclass 35, count 0 2006.229.05:27:54.14#ibcon#about to read 3, iclass 35, count 0 2006.229.05:27:54.17#ibcon#read 3, iclass 35, count 0 2006.229.05:27:54.17#ibcon#about to read 4, iclass 35, count 0 2006.229.05:27:54.17#ibcon#read 4, iclass 35, count 0 2006.229.05:27:54.17#ibcon#about to read 5, iclass 35, count 0 2006.229.05:27:54.17#ibcon#read 5, iclass 35, count 0 2006.229.05:27:54.17#ibcon#about to read 6, iclass 35, count 0 2006.229.05:27:54.17#ibcon#read 6, iclass 35, count 0 2006.229.05:27:54.17#ibcon#end of sib2, iclass 35, count 0 2006.229.05:27:54.17#ibcon#*after write, iclass 35, count 0 2006.229.05:27:54.17#ibcon#*before return 0, iclass 35, count 0 2006.229.05:27:54.17#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:54.17#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:54.17#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:27:54.17#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:27:54.17$vck44/valo=7,864.99 2006.229.05:27:54.17#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:27:54.17#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:27:54.17#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:54.17#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:54.17#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:54.17#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:54.17#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:27:54.17#ibcon#first serial, iclass 37, count 0 2006.229.05:27:54.17#ibcon#enter sib2, iclass 37, count 0 2006.229.05:27:54.17#ibcon#flushed, iclass 37, count 0 2006.229.05:27:54.17#ibcon#about to write, iclass 37, count 0 2006.229.05:27:54.17#ibcon#wrote, iclass 37, count 0 2006.229.05:27:54.17#ibcon#about to read 3, iclass 37, count 0 2006.229.05:27:54.19#ibcon#read 3, iclass 37, count 0 2006.229.05:27:54.19#ibcon#about to read 4, iclass 37, count 0 2006.229.05:27:54.19#ibcon#read 4, iclass 37, count 0 2006.229.05:27:54.19#ibcon#about to read 5, iclass 37, count 0 2006.229.05:27:54.19#ibcon#read 5, iclass 37, count 0 2006.229.05:27:54.19#ibcon#about to read 6, iclass 37, count 0 2006.229.05:27:54.19#ibcon#read 6, iclass 37, count 0 2006.229.05:27:54.19#ibcon#end of sib2, iclass 37, count 0 2006.229.05:27:54.19#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:27:54.19#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:27:54.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:27:54.19#ibcon#*before write, iclass 37, count 0 2006.229.05:27:54.19#ibcon#enter sib2, iclass 37, count 0 2006.229.05:27:54.19#ibcon#flushed, iclass 37, count 0 2006.229.05:27:54.19#ibcon#about to write, iclass 37, count 0 2006.229.05:27:54.19#ibcon#wrote, iclass 37, count 0 2006.229.05:27:54.19#ibcon#about to read 3, iclass 37, count 0 2006.229.05:27:54.23#ibcon#read 3, iclass 37, count 0 2006.229.05:27:54.23#ibcon#about to read 4, iclass 37, count 0 2006.229.05:27:54.23#ibcon#read 4, iclass 37, count 0 2006.229.05:27:54.23#ibcon#about to read 5, iclass 37, count 0 2006.229.05:27:54.23#ibcon#read 5, iclass 37, count 0 2006.229.05:27:54.23#ibcon#about to read 6, iclass 37, count 0 2006.229.05:27:54.23#ibcon#read 6, iclass 37, count 0 2006.229.05:27:54.23#ibcon#end of sib2, iclass 37, count 0 2006.229.05:27:54.23#ibcon#*after write, iclass 37, count 0 2006.229.05:27:54.23#ibcon#*before return 0, iclass 37, count 0 2006.229.05:27:54.23#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:54.23#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:54.23#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:27:54.23#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:27:54.23$vck44/va=7,5 2006.229.05:27:54.23#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.05:27:54.23#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.05:27:54.23#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:54.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:54.29#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:54.29#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:54.29#ibcon#enter wrdev, iclass 39, count 2 2006.229.05:27:54.29#ibcon#first serial, iclass 39, count 2 2006.229.05:27:54.29#ibcon#enter sib2, iclass 39, count 2 2006.229.05:27:54.29#ibcon#flushed, iclass 39, count 2 2006.229.05:27:54.29#ibcon#about to write, iclass 39, count 2 2006.229.05:27:54.29#ibcon#wrote, iclass 39, count 2 2006.229.05:27:54.29#ibcon#about to read 3, iclass 39, count 2 2006.229.05:27:54.31#ibcon#read 3, iclass 39, count 2 2006.229.05:27:54.31#ibcon#about to read 4, iclass 39, count 2 2006.229.05:27:54.31#ibcon#read 4, iclass 39, count 2 2006.229.05:27:54.31#ibcon#about to read 5, iclass 39, count 2 2006.229.05:27:54.31#ibcon#read 5, iclass 39, count 2 2006.229.05:27:54.31#ibcon#about to read 6, iclass 39, count 2 2006.229.05:27:54.31#ibcon#read 6, iclass 39, count 2 2006.229.05:27:54.31#ibcon#end of sib2, iclass 39, count 2 2006.229.05:27:54.31#ibcon#*mode == 0, iclass 39, count 2 2006.229.05:27:54.31#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.05:27:54.31#ibcon#[25=AT07-05\r\n] 2006.229.05:27:54.31#ibcon#*before write, iclass 39, count 2 2006.229.05:27:54.31#ibcon#enter sib2, iclass 39, count 2 2006.229.05:27:54.31#ibcon#flushed, iclass 39, count 2 2006.229.05:27:54.31#ibcon#about to write, iclass 39, count 2 2006.229.05:27:54.31#ibcon#wrote, iclass 39, count 2 2006.229.05:27:54.31#ibcon#about to read 3, iclass 39, count 2 2006.229.05:27:54.34#ibcon#read 3, iclass 39, count 2 2006.229.05:27:54.34#ibcon#about to read 4, iclass 39, count 2 2006.229.05:27:54.34#ibcon#read 4, iclass 39, count 2 2006.229.05:27:54.34#ibcon#about to read 5, iclass 39, count 2 2006.229.05:27:54.34#ibcon#read 5, iclass 39, count 2 2006.229.05:27:54.34#ibcon#about to read 6, iclass 39, count 2 2006.229.05:27:54.34#ibcon#read 6, iclass 39, count 2 2006.229.05:27:54.34#ibcon#end of sib2, iclass 39, count 2 2006.229.05:27:54.34#ibcon#*after write, iclass 39, count 2 2006.229.05:27:54.34#ibcon#*before return 0, iclass 39, count 2 2006.229.05:27:54.34#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:54.34#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:54.34#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.05:27:54.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:54.34#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:54.46#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:54.46#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:54.46#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:27:54.46#ibcon#first serial, iclass 39, count 0 2006.229.05:27:54.46#ibcon#enter sib2, iclass 39, count 0 2006.229.05:27:54.46#ibcon#flushed, iclass 39, count 0 2006.229.05:27:54.46#ibcon#about to write, iclass 39, count 0 2006.229.05:27:54.46#ibcon#wrote, iclass 39, count 0 2006.229.05:27:54.46#ibcon#about to read 3, iclass 39, count 0 2006.229.05:27:54.48#ibcon#read 3, iclass 39, count 0 2006.229.05:27:54.48#ibcon#about to read 4, iclass 39, count 0 2006.229.05:27:54.48#ibcon#read 4, iclass 39, count 0 2006.229.05:27:54.48#ibcon#about to read 5, iclass 39, count 0 2006.229.05:27:54.48#ibcon#read 5, iclass 39, count 0 2006.229.05:27:54.48#ibcon#about to read 6, iclass 39, count 0 2006.229.05:27:54.48#ibcon#read 6, iclass 39, count 0 2006.229.05:27:54.48#ibcon#end of sib2, iclass 39, count 0 2006.229.05:27:54.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:27:54.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:27:54.48#ibcon#[25=USB\r\n] 2006.229.05:27:54.48#ibcon#*before write, iclass 39, count 0 2006.229.05:27:54.48#ibcon#enter sib2, iclass 39, count 0 2006.229.05:27:54.48#ibcon#flushed, iclass 39, count 0 2006.229.05:27:54.48#ibcon#about to write, iclass 39, count 0 2006.229.05:27:54.48#ibcon#wrote, iclass 39, count 0 2006.229.05:27:54.48#ibcon#about to read 3, iclass 39, count 0 2006.229.05:27:54.51#ibcon#read 3, iclass 39, count 0 2006.229.05:27:54.51#ibcon#about to read 4, iclass 39, count 0 2006.229.05:27:54.51#ibcon#read 4, iclass 39, count 0 2006.229.05:27:54.51#ibcon#about to read 5, iclass 39, count 0 2006.229.05:27:54.51#ibcon#read 5, iclass 39, count 0 2006.229.05:27:54.51#ibcon#about to read 6, iclass 39, count 0 2006.229.05:27:54.51#ibcon#read 6, iclass 39, count 0 2006.229.05:27:54.51#ibcon#end of sib2, iclass 39, count 0 2006.229.05:27:54.51#ibcon#*after write, iclass 39, count 0 2006.229.05:27:54.51#ibcon#*before return 0, iclass 39, count 0 2006.229.05:27:54.51#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:54.51#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:54.51#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:27:54.51#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:27:54.51$vck44/valo=8,884.99 2006.229.05:27:54.51#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.05:27:54.51#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.05:27:54.51#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:54.51#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:54.51#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:54.51#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:54.51#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:27:54.51#ibcon#first serial, iclass 3, count 0 2006.229.05:27:54.51#ibcon#enter sib2, iclass 3, count 0 2006.229.05:27:54.51#ibcon#flushed, iclass 3, count 0 2006.229.05:27:54.51#ibcon#about to write, iclass 3, count 0 2006.229.05:27:54.51#ibcon#wrote, iclass 3, count 0 2006.229.05:27:54.51#ibcon#about to read 3, iclass 3, count 0 2006.229.05:27:54.53#ibcon#read 3, iclass 3, count 0 2006.229.05:27:54.53#ibcon#about to read 4, iclass 3, count 0 2006.229.05:27:54.53#ibcon#read 4, iclass 3, count 0 2006.229.05:27:54.53#ibcon#about to read 5, iclass 3, count 0 2006.229.05:27:54.53#ibcon#read 5, iclass 3, count 0 2006.229.05:27:54.53#ibcon#about to read 6, iclass 3, count 0 2006.229.05:27:54.53#ibcon#read 6, iclass 3, count 0 2006.229.05:27:54.53#ibcon#end of sib2, iclass 3, count 0 2006.229.05:27:54.53#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:27:54.53#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:27:54.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:27:54.53#ibcon#*before write, iclass 3, count 0 2006.229.05:27:54.53#ibcon#enter sib2, iclass 3, count 0 2006.229.05:27:54.53#ibcon#flushed, iclass 3, count 0 2006.229.05:27:54.53#ibcon#about to write, iclass 3, count 0 2006.229.05:27:54.53#ibcon#wrote, iclass 3, count 0 2006.229.05:27:54.53#ibcon#about to read 3, iclass 3, count 0 2006.229.05:27:54.57#ibcon#read 3, iclass 3, count 0 2006.229.05:27:54.57#ibcon#about to read 4, iclass 3, count 0 2006.229.05:27:54.57#ibcon#read 4, iclass 3, count 0 2006.229.05:27:54.57#ibcon#about to read 5, iclass 3, count 0 2006.229.05:27:54.57#ibcon#read 5, iclass 3, count 0 2006.229.05:27:54.57#ibcon#about to read 6, iclass 3, count 0 2006.229.05:27:54.57#ibcon#read 6, iclass 3, count 0 2006.229.05:27:54.57#ibcon#end of sib2, iclass 3, count 0 2006.229.05:27:54.57#ibcon#*after write, iclass 3, count 0 2006.229.05:27:54.57#ibcon#*before return 0, iclass 3, count 0 2006.229.05:27:54.57#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:54.57#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:54.57#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:27:54.57#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:27:54.57$vck44/va=8,6 2006.229.05:27:54.57#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.05:27:54.57#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.05:27:54.57#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:54.57#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:27:54.63#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:27:54.63#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:27:54.63#ibcon#enter wrdev, iclass 5, count 2 2006.229.05:27:54.63#ibcon#first serial, iclass 5, count 2 2006.229.05:27:54.63#ibcon#enter sib2, iclass 5, count 2 2006.229.05:27:54.63#ibcon#flushed, iclass 5, count 2 2006.229.05:27:54.63#ibcon#about to write, iclass 5, count 2 2006.229.05:27:54.63#ibcon#wrote, iclass 5, count 2 2006.229.05:27:54.63#ibcon#about to read 3, iclass 5, count 2 2006.229.05:27:54.65#ibcon#read 3, iclass 5, count 2 2006.229.05:27:54.65#ibcon#about to read 4, iclass 5, count 2 2006.229.05:27:54.65#ibcon#read 4, iclass 5, count 2 2006.229.05:27:54.65#ibcon#about to read 5, iclass 5, count 2 2006.229.05:27:54.65#ibcon#read 5, iclass 5, count 2 2006.229.05:27:54.65#ibcon#about to read 6, iclass 5, count 2 2006.229.05:27:54.65#ibcon#read 6, iclass 5, count 2 2006.229.05:27:54.65#ibcon#end of sib2, iclass 5, count 2 2006.229.05:27:54.65#ibcon#*mode == 0, iclass 5, count 2 2006.229.05:27:54.65#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.05:27:54.65#ibcon#[25=AT08-06\r\n] 2006.229.05:27:54.65#ibcon#*before write, iclass 5, count 2 2006.229.05:27:54.65#ibcon#enter sib2, iclass 5, count 2 2006.229.05:27:54.65#ibcon#flushed, iclass 5, count 2 2006.229.05:27:54.65#ibcon#about to write, iclass 5, count 2 2006.229.05:27:54.65#ibcon#wrote, iclass 5, count 2 2006.229.05:27:54.65#ibcon#about to read 3, iclass 5, count 2 2006.229.05:27:54.68#ibcon#read 3, iclass 5, count 2 2006.229.05:27:54.68#ibcon#about to read 4, iclass 5, count 2 2006.229.05:27:54.68#ibcon#read 4, iclass 5, count 2 2006.229.05:27:54.68#ibcon#about to read 5, iclass 5, count 2 2006.229.05:27:54.68#ibcon#read 5, iclass 5, count 2 2006.229.05:27:54.68#ibcon#about to read 6, iclass 5, count 2 2006.229.05:27:54.68#ibcon#read 6, iclass 5, count 2 2006.229.05:27:54.68#ibcon#end of sib2, iclass 5, count 2 2006.229.05:27:54.68#ibcon#*after write, iclass 5, count 2 2006.229.05:27:54.68#ibcon#*before return 0, iclass 5, count 2 2006.229.05:27:54.68#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:27:54.68#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:27:54.68#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.05:27:54.68#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:54.68#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:27:54.80#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:27:54.80#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:27:54.80#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:27:54.80#ibcon#first serial, iclass 5, count 0 2006.229.05:27:54.80#ibcon#enter sib2, iclass 5, count 0 2006.229.05:27:54.80#ibcon#flushed, iclass 5, count 0 2006.229.05:27:54.80#ibcon#about to write, iclass 5, count 0 2006.229.05:27:54.80#ibcon#wrote, iclass 5, count 0 2006.229.05:27:54.80#ibcon#about to read 3, iclass 5, count 0 2006.229.05:27:54.82#ibcon#read 3, iclass 5, count 0 2006.229.05:27:54.82#ibcon#about to read 4, iclass 5, count 0 2006.229.05:27:54.82#ibcon#read 4, iclass 5, count 0 2006.229.05:27:54.82#ibcon#about to read 5, iclass 5, count 0 2006.229.05:27:54.82#ibcon#read 5, iclass 5, count 0 2006.229.05:27:54.82#ibcon#about to read 6, iclass 5, count 0 2006.229.05:27:54.82#ibcon#read 6, iclass 5, count 0 2006.229.05:27:54.82#ibcon#end of sib2, iclass 5, count 0 2006.229.05:27:54.82#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:27:54.82#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:27:54.82#ibcon#[25=USB\r\n] 2006.229.05:27:54.82#ibcon#*before write, iclass 5, count 0 2006.229.05:27:54.82#ibcon#enter sib2, iclass 5, count 0 2006.229.05:27:54.82#ibcon#flushed, iclass 5, count 0 2006.229.05:27:54.82#ibcon#about to write, iclass 5, count 0 2006.229.05:27:54.82#ibcon#wrote, iclass 5, count 0 2006.229.05:27:54.82#ibcon#about to read 3, iclass 5, count 0 2006.229.05:27:54.85#ibcon#read 3, iclass 5, count 0 2006.229.05:27:54.85#ibcon#about to read 4, iclass 5, count 0 2006.229.05:27:54.85#ibcon#read 4, iclass 5, count 0 2006.229.05:27:54.85#ibcon#about to read 5, iclass 5, count 0 2006.229.05:27:54.85#ibcon#read 5, iclass 5, count 0 2006.229.05:27:54.85#ibcon#about to read 6, iclass 5, count 0 2006.229.05:27:54.85#ibcon#read 6, iclass 5, count 0 2006.229.05:27:54.85#ibcon#end of sib2, iclass 5, count 0 2006.229.05:27:54.85#ibcon#*after write, iclass 5, count 0 2006.229.05:27:54.85#ibcon#*before return 0, iclass 5, count 0 2006.229.05:27:54.85#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:27:54.85#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:27:54.85#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:27:54.85#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:27:54.85$vck44/vblo=1,629.99 2006.229.05:27:54.85#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.05:27:54.85#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.05:27:54.85#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:54.85#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:54.85#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:54.85#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:54.85#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:27:54.85#ibcon#first serial, iclass 7, count 0 2006.229.05:27:54.85#ibcon#enter sib2, iclass 7, count 0 2006.229.05:27:54.85#ibcon#flushed, iclass 7, count 0 2006.229.05:27:54.85#ibcon#about to write, iclass 7, count 0 2006.229.05:27:54.85#ibcon#wrote, iclass 7, count 0 2006.229.05:27:54.85#ibcon#about to read 3, iclass 7, count 0 2006.229.05:27:54.87#ibcon#read 3, iclass 7, count 0 2006.229.05:27:54.87#ibcon#about to read 4, iclass 7, count 0 2006.229.05:27:54.87#ibcon#read 4, iclass 7, count 0 2006.229.05:27:54.87#ibcon#about to read 5, iclass 7, count 0 2006.229.05:27:54.87#ibcon#read 5, iclass 7, count 0 2006.229.05:27:54.87#ibcon#about to read 6, iclass 7, count 0 2006.229.05:27:54.87#ibcon#read 6, iclass 7, count 0 2006.229.05:27:54.87#ibcon#end of sib2, iclass 7, count 0 2006.229.05:27:54.87#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:27:54.87#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:27:54.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:27:54.87#ibcon#*before write, iclass 7, count 0 2006.229.05:27:54.87#ibcon#enter sib2, iclass 7, count 0 2006.229.05:27:54.87#ibcon#flushed, iclass 7, count 0 2006.229.05:27:54.87#ibcon#about to write, iclass 7, count 0 2006.229.05:27:54.87#ibcon#wrote, iclass 7, count 0 2006.229.05:27:54.87#ibcon#about to read 3, iclass 7, count 0 2006.229.05:27:54.91#ibcon#read 3, iclass 7, count 0 2006.229.05:27:54.91#ibcon#about to read 4, iclass 7, count 0 2006.229.05:27:54.91#ibcon#read 4, iclass 7, count 0 2006.229.05:27:54.91#ibcon#about to read 5, iclass 7, count 0 2006.229.05:27:54.91#ibcon#read 5, iclass 7, count 0 2006.229.05:27:54.91#ibcon#about to read 6, iclass 7, count 0 2006.229.05:27:54.91#ibcon#read 6, iclass 7, count 0 2006.229.05:27:54.91#ibcon#end of sib2, iclass 7, count 0 2006.229.05:27:54.91#ibcon#*after write, iclass 7, count 0 2006.229.05:27:54.91#ibcon#*before return 0, iclass 7, count 0 2006.229.05:27:54.91#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:54.91#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:27:54.91#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:27:54.91#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:27:54.91$vck44/vb=1,4 2006.229.05:27:54.91#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.05:27:54.91#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.05:27:54.91#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:54.91#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:54.91#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:54.91#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:54.91#ibcon#enter wrdev, iclass 11, count 2 2006.229.05:27:54.91#ibcon#first serial, iclass 11, count 2 2006.229.05:27:54.91#ibcon#enter sib2, iclass 11, count 2 2006.229.05:27:54.91#ibcon#flushed, iclass 11, count 2 2006.229.05:27:54.91#ibcon#about to write, iclass 11, count 2 2006.229.05:27:54.91#ibcon#wrote, iclass 11, count 2 2006.229.05:27:54.91#ibcon#about to read 3, iclass 11, count 2 2006.229.05:27:54.93#ibcon#read 3, iclass 11, count 2 2006.229.05:27:54.93#ibcon#about to read 4, iclass 11, count 2 2006.229.05:27:54.93#ibcon#read 4, iclass 11, count 2 2006.229.05:27:54.93#ibcon#about to read 5, iclass 11, count 2 2006.229.05:27:54.93#ibcon#read 5, iclass 11, count 2 2006.229.05:27:54.93#ibcon#about to read 6, iclass 11, count 2 2006.229.05:27:54.93#ibcon#read 6, iclass 11, count 2 2006.229.05:27:54.93#ibcon#end of sib2, iclass 11, count 2 2006.229.05:27:54.93#ibcon#*mode == 0, iclass 11, count 2 2006.229.05:27:54.93#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.05:27:54.93#ibcon#[27=AT01-04\r\n] 2006.229.05:27:54.93#ibcon#*before write, iclass 11, count 2 2006.229.05:27:54.93#ibcon#enter sib2, iclass 11, count 2 2006.229.05:27:54.93#ibcon#flushed, iclass 11, count 2 2006.229.05:27:54.93#ibcon#about to write, iclass 11, count 2 2006.229.05:27:54.93#ibcon#wrote, iclass 11, count 2 2006.229.05:27:54.93#ibcon#about to read 3, iclass 11, count 2 2006.229.05:27:54.96#ibcon#read 3, iclass 11, count 2 2006.229.05:27:54.96#ibcon#about to read 4, iclass 11, count 2 2006.229.05:27:54.96#ibcon#read 4, iclass 11, count 2 2006.229.05:27:54.96#ibcon#about to read 5, iclass 11, count 2 2006.229.05:27:54.96#ibcon#read 5, iclass 11, count 2 2006.229.05:27:54.96#ibcon#about to read 6, iclass 11, count 2 2006.229.05:27:54.96#ibcon#read 6, iclass 11, count 2 2006.229.05:27:54.96#ibcon#end of sib2, iclass 11, count 2 2006.229.05:27:54.96#ibcon#*after write, iclass 11, count 2 2006.229.05:27:54.96#ibcon#*before return 0, iclass 11, count 2 2006.229.05:27:54.96#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:54.96#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:27:54.96#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.05:27:54.96#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:54.96#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:55.08#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:55.08#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:55.08#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:27:55.08#ibcon#first serial, iclass 11, count 0 2006.229.05:27:55.08#ibcon#enter sib2, iclass 11, count 0 2006.229.05:27:55.08#ibcon#flushed, iclass 11, count 0 2006.229.05:27:55.08#ibcon#about to write, iclass 11, count 0 2006.229.05:27:55.08#ibcon#wrote, iclass 11, count 0 2006.229.05:27:55.08#ibcon#about to read 3, iclass 11, count 0 2006.229.05:27:55.10#ibcon#read 3, iclass 11, count 0 2006.229.05:27:55.10#ibcon#about to read 4, iclass 11, count 0 2006.229.05:27:55.10#ibcon#read 4, iclass 11, count 0 2006.229.05:27:55.10#ibcon#about to read 5, iclass 11, count 0 2006.229.05:27:55.10#ibcon#read 5, iclass 11, count 0 2006.229.05:27:55.10#ibcon#about to read 6, iclass 11, count 0 2006.229.05:27:55.10#ibcon#read 6, iclass 11, count 0 2006.229.05:27:55.10#ibcon#end of sib2, iclass 11, count 0 2006.229.05:27:55.10#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:27:55.10#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:27:55.10#ibcon#[27=USB\r\n] 2006.229.05:27:55.10#ibcon#*before write, iclass 11, count 0 2006.229.05:27:55.10#ibcon#enter sib2, iclass 11, count 0 2006.229.05:27:55.10#ibcon#flushed, iclass 11, count 0 2006.229.05:27:55.10#ibcon#about to write, iclass 11, count 0 2006.229.05:27:55.10#ibcon#wrote, iclass 11, count 0 2006.229.05:27:55.10#ibcon#about to read 3, iclass 11, count 0 2006.229.05:27:55.13#ibcon#read 3, iclass 11, count 0 2006.229.05:27:55.13#ibcon#about to read 4, iclass 11, count 0 2006.229.05:27:55.13#ibcon#read 4, iclass 11, count 0 2006.229.05:27:55.13#ibcon#about to read 5, iclass 11, count 0 2006.229.05:27:55.13#ibcon#read 5, iclass 11, count 0 2006.229.05:27:55.13#ibcon#about to read 6, iclass 11, count 0 2006.229.05:27:55.13#ibcon#read 6, iclass 11, count 0 2006.229.05:27:55.13#ibcon#end of sib2, iclass 11, count 0 2006.229.05:27:55.13#ibcon#*after write, iclass 11, count 0 2006.229.05:27:55.13#ibcon#*before return 0, iclass 11, count 0 2006.229.05:27:55.13#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:55.13#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:27:55.13#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:27:55.13#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:27:55.13$vck44/vblo=2,634.99 2006.229.05:27:55.13#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.05:27:55.13#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.05:27:55.13#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:55.13#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:55.13#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:55.13#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:55.13#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:27:55.13#ibcon#first serial, iclass 13, count 0 2006.229.05:27:55.13#ibcon#enter sib2, iclass 13, count 0 2006.229.05:27:55.13#ibcon#flushed, iclass 13, count 0 2006.229.05:27:55.13#ibcon#about to write, iclass 13, count 0 2006.229.05:27:55.13#ibcon#wrote, iclass 13, count 0 2006.229.05:27:55.13#ibcon#about to read 3, iclass 13, count 0 2006.229.05:27:55.15#ibcon#read 3, iclass 13, count 0 2006.229.05:27:55.15#ibcon#about to read 4, iclass 13, count 0 2006.229.05:27:55.15#ibcon#read 4, iclass 13, count 0 2006.229.05:27:55.15#ibcon#about to read 5, iclass 13, count 0 2006.229.05:27:55.15#ibcon#read 5, iclass 13, count 0 2006.229.05:27:55.15#ibcon#about to read 6, iclass 13, count 0 2006.229.05:27:55.15#ibcon#read 6, iclass 13, count 0 2006.229.05:27:55.15#ibcon#end of sib2, iclass 13, count 0 2006.229.05:27:55.15#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:27:55.15#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:27:55.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:27:55.15#ibcon#*before write, iclass 13, count 0 2006.229.05:27:55.15#ibcon#enter sib2, iclass 13, count 0 2006.229.05:27:55.15#ibcon#flushed, iclass 13, count 0 2006.229.05:27:55.15#ibcon#about to write, iclass 13, count 0 2006.229.05:27:55.15#ibcon#wrote, iclass 13, count 0 2006.229.05:27:55.15#ibcon#about to read 3, iclass 13, count 0 2006.229.05:27:55.19#ibcon#read 3, iclass 13, count 0 2006.229.05:27:55.19#ibcon#about to read 4, iclass 13, count 0 2006.229.05:27:55.19#ibcon#read 4, iclass 13, count 0 2006.229.05:27:55.19#ibcon#about to read 5, iclass 13, count 0 2006.229.05:27:55.19#ibcon#read 5, iclass 13, count 0 2006.229.05:27:55.19#ibcon#about to read 6, iclass 13, count 0 2006.229.05:27:55.19#ibcon#read 6, iclass 13, count 0 2006.229.05:27:55.19#ibcon#end of sib2, iclass 13, count 0 2006.229.05:27:55.19#ibcon#*after write, iclass 13, count 0 2006.229.05:27:55.19#ibcon#*before return 0, iclass 13, count 0 2006.229.05:27:55.19#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:55.19#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:27:55.19#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:27:55.19#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:27:55.19$vck44/vb=2,4 2006.229.05:27:55.19#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.05:27:55.19#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.05:27:55.19#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:55.19#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:55.25#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:55.25#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:55.25#ibcon#enter wrdev, iclass 15, count 2 2006.229.05:27:55.25#ibcon#first serial, iclass 15, count 2 2006.229.05:27:55.25#ibcon#enter sib2, iclass 15, count 2 2006.229.05:27:55.25#ibcon#flushed, iclass 15, count 2 2006.229.05:27:55.25#ibcon#about to write, iclass 15, count 2 2006.229.05:27:55.25#ibcon#wrote, iclass 15, count 2 2006.229.05:27:55.25#ibcon#about to read 3, iclass 15, count 2 2006.229.05:27:55.27#ibcon#read 3, iclass 15, count 2 2006.229.05:27:55.27#ibcon#about to read 4, iclass 15, count 2 2006.229.05:27:55.27#ibcon#read 4, iclass 15, count 2 2006.229.05:27:55.27#ibcon#about to read 5, iclass 15, count 2 2006.229.05:27:55.27#ibcon#read 5, iclass 15, count 2 2006.229.05:27:55.27#ibcon#about to read 6, iclass 15, count 2 2006.229.05:27:55.27#ibcon#read 6, iclass 15, count 2 2006.229.05:27:55.27#ibcon#end of sib2, iclass 15, count 2 2006.229.05:27:55.27#ibcon#*mode == 0, iclass 15, count 2 2006.229.05:27:55.27#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.05:27:55.27#ibcon#[27=AT02-04\r\n] 2006.229.05:27:55.27#ibcon#*before write, iclass 15, count 2 2006.229.05:27:55.27#ibcon#enter sib2, iclass 15, count 2 2006.229.05:27:55.27#ibcon#flushed, iclass 15, count 2 2006.229.05:27:55.27#ibcon#about to write, iclass 15, count 2 2006.229.05:27:55.27#ibcon#wrote, iclass 15, count 2 2006.229.05:27:55.27#ibcon#about to read 3, iclass 15, count 2 2006.229.05:27:55.30#ibcon#read 3, iclass 15, count 2 2006.229.05:27:55.30#ibcon#about to read 4, iclass 15, count 2 2006.229.05:27:55.30#ibcon#read 4, iclass 15, count 2 2006.229.05:27:55.30#ibcon#about to read 5, iclass 15, count 2 2006.229.05:27:55.30#ibcon#read 5, iclass 15, count 2 2006.229.05:27:55.30#ibcon#about to read 6, iclass 15, count 2 2006.229.05:27:55.30#ibcon#read 6, iclass 15, count 2 2006.229.05:27:55.30#ibcon#end of sib2, iclass 15, count 2 2006.229.05:27:55.30#ibcon#*after write, iclass 15, count 2 2006.229.05:27:55.30#ibcon#*before return 0, iclass 15, count 2 2006.229.05:27:55.30#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:55.30#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:27:55.30#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.05:27:55.30#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:55.30#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:55.42#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:55.42#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:55.42#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:27:55.42#ibcon#first serial, iclass 15, count 0 2006.229.05:27:55.42#ibcon#enter sib2, iclass 15, count 0 2006.229.05:27:55.42#ibcon#flushed, iclass 15, count 0 2006.229.05:27:55.42#ibcon#about to write, iclass 15, count 0 2006.229.05:27:55.42#ibcon#wrote, iclass 15, count 0 2006.229.05:27:55.42#ibcon#about to read 3, iclass 15, count 0 2006.229.05:27:55.44#ibcon#read 3, iclass 15, count 0 2006.229.05:27:55.44#ibcon#about to read 4, iclass 15, count 0 2006.229.05:27:55.44#ibcon#read 4, iclass 15, count 0 2006.229.05:27:55.44#ibcon#about to read 5, iclass 15, count 0 2006.229.05:27:55.44#ibcon#read 5, iclass 15, count 0 2006.229.05:27:55.44#ibcon#about to read 6, iclass 15, count 0 2006.229.05:27:55.44#ibcon#read 6, iclass 15, count 0 2006.229.05:27:55.44#ibcon#end of sib2, iclass 15, count 0 2006.229.05:27:55.44#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:27:55.44#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:27:55.44#ibcon#[27=USB\r\n] 2006.229.05:27:55.44#ibcon#*before write, iclass 15, count 0 2006.229.05:27:55.44#ibcon#enter sib2, iclass 15, count 0 2006.229.05:27:55.44#ibcon#flushed, iclass 15, count 0 2006.229.05:27:55.44#ibcon#about to write, iclass 15, count 0 2006.229.05:27:55.44#ibcon#wrote, iclass 15, count 0 2006.229.05:27:55.44#ibcon#about to read 3, iclass 15, count 0 2006.229.05:27:55.47#ibcon#read 3, iclass 15, count 0 2006.229.05:27:55.47#ibcon#about to read 4, iclass 15, count 0 2006.229.05:27:55.47#ibcon#read 4, iclass 15, count 0 2006.229.05:27:55.47#ibcon#about to read 5, iclass 15, count 0 2006.229.05:27:55.47#ibcon#read 5, iclass 15, count 0 2006.229.05:27:55.47#ibcon#about to read 6, iclass 15, count 0 2006.229.05:27:55.47#ibcon#read 6, iclass 15, count 0 2006.229.05:27:55.47#ibcon#end of sib2, iclass 15, count 0 2006.229.05:27:55.47#ibcon#*after write, iclass 15, count 0 2006.229.05:27:55.47#ibcon#*before return 0, iclass 15, count 0 2006.229.05:27:55.47#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:55.47#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:27:55.47#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:27:55.47#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:27:55.47$vck44/vblo=3,649.99 2006.229.05:27:55.47#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:27:55.47#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:27:55.47#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:55.47#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:55.47#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:55.47#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:55.47#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:27:55.47#ibcon#first serial, iclass 17, count 0 2006.229.05:27:55.47#ibcon#enter sib2, iclass 17, count 0 2006.229.05:27:55.47#ibcon#flushed, iclass 17, count 0 2006.229.05:27:55.47#ibcon#about to write, iclass 17, count 0 2006.229.05:27:55.47#ibcon#wrote, iclass 17, count 0 2006.229.05:27:55.47#ibcon#about to read 3, iclass 17, count 0 2006.229.05:27:55.49#ibcon#read 3, iclass 17, count 0 2006.229.05:27:55.49#ibcon#about to read 4, iclass 17, count 0 2006.229.05:27:55.49#ibcon#read 4, iclass 17, count 0 2006.229.05:27:55.49#ibcon#about to read 5, iclass 17, count 0 2006.229.05:27:55.49#ibcon#read 5, iclass 17, count 0 2006.229.05:27:55.49#ibcon#about to read 6, iclass 17, count 0 2006.229.05:27:55.49#ibcon#read 6, iclass 17, count 0 2006.229.05:27:55.49#ibcon#end of sib2, iclass 17, count 0 2006.229.05:27:55.49#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:27:55.49#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:27:55.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:27:55.49#ibcon#*before write, iclass 17, count 0 2006.229.05:27:55.49#ibcon#enter sib2, iclass 17, count 0 2006.229.05:27:55.49#ibcon#flushed, iclass 17, count 0 2006.229.05:27:55.49#ibcon#about to write, iclass 17, count 0 2006.229.05:27:55.49#ibcon#wrote, iclass 17, count 0 2006.229.05:27:55.49#ibcon#about to read 3, iclass 17, count 0 2006.229.05:27:55.53#ibcon#read 3, iclass 17, count 0 2006.229.05:27:55.53#ibcon#about to read 4, iclass 17, count 0 2006.229.05:27:55.53#ibcon#read 4, iclass 17, count 0 2006.229.05:27:55.53#ibcon#about to read 5, iclass 17, count 0 2006.229.05:27:55.53#ibcon#read 5, iclass 17, count 0 2006.229.05:27:55.53#ibcon#about to read 6, iclass 17, count 0 2006.229.05:27:55.53#ibcon#read 6, iclass 17, count 0 2006.229.05:27:55.53#ibcon#end of sib2, iclass 17, count 0 2006.229.05:27:55.53#ibcon#*after write, iclass 17, count 0 2006.229.05:27:55.53#ibcon#*before return 0, iclass 17, count 0 2006.229.05:27:55.53#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:55.53#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:27:55.53#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:27:55.53#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:27:55.53$vck44/vb=3,4 2006.229.05:27:55.53#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.05:27:55.53#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.05:27:55.53#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:55.53#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:55.59#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:55.59#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:55.59#ibcon#enter wrdev, iclass 19, count 2 2006.229.05:27:55.59#ibcon#first serial, iclass 19, count 2 2006.229.05:27:55.59#ibcon#enter sib2, iclass 19, count 2 2006.229.05:27:55.59#ibcon#flushed, iclass 19, count 2 2006.229.05:27:55.59#ibcon#about to write, iclass 19, count 2 2006.229.05:27:55.59#ibcon#wrote, iclass 19, count 2 2006.229.05:27:55.59#ibcon#about to read 3, iclass 19, count 2 2006.229.05:27:55.61#ibcon#read 3, iclass 19, count 2 2006.229.05:27:55.61#ibcon#about to read 4, iclass 19, count 2 2006.229.05:27:55.61#ibcon#read 4, iclass 19, count 2 2006.229.05:27:55.61#ibcon#about to read 5, iclass 19, count 2 2006.229.05:27:55.61#ibcon#read 5, iclass 19, count 2 2006.229.05:27:55.61#ibcon#about to read 6, iclass 19, count 2 2006.229.05:27:55.61#ibcon#read 6, iclass 19, count 2 2006.229.05:27:55.61#ibcon#end of sib2, iclass 19, count 2 2006.229.05:27:55.61#ibcon#*mode == 0, iclass 19, count 2 2006.229.05:27:55.61#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.05:27:55.61#ibcon#[27=AT03-04\r\n] 2006.229.05:27:55.61#ibcon#*before write, iclass 19, count 2 2006.229.05:27:55.61#ibcon#enter sib2, iclass 19, count 2 2006.229.05:27:55.61#ibcon#flushed, iclass 19, count 2 2006.229.05:27:55.61#ibcon#about to write, iclass 19, count 2 2006.229.05:27:55.61#ibcon#wrote, iclass 19, count 2 2006.229.05:27:55.61#ibcon#about to read 3, iclass 19, count 2 2006.229.05:27:55.64#ibcon#read 3, iclass 19, count 2 2006.229.05:27:55.64#ibcon#about to read 4, iclass 19, count 2 2006.229.05:27:55.64#ibcon#read 4, iclass 19, count 2 2006.229.05:27:55.64#ibcon#about to read 5, iclass 19, count 2 2006.229.05:27:55.64#ibcon#read 5, iclass 19, count 2 2006.229.05:27:55.64#ibcon#about to read 6, iclass 19, count 2 2006.229.05:27:55.64#ibcon#read 6, iclass 19, count 2 2006.229.05:27:55.64#ibcon#end of sib2, iclass 19, count 2 2006.229.05:27:55.64#ibcon#*after write, iclass 19, count 2 2006.229.05:27:55.64#ibcon#*before return 0, iclass 19, count 2 2006.229.05:27:55.64#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:55.64#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:27:55.64#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.05:27:55.64#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:55.64#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:55.76#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:55.76#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:55.76#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:27:55.76#ibcon#first serial, iclass 19, count 0 2006.229.05:27:55.76#ibcon#enter sib2, iclass 19, count 0 2006.229.05:27:55.76#ibcon#flushed, iclass 19, count 0 2006.229.05:27:55.76#ibcon#about to write, iclass 19, count 0 2006.229.05:27:55.76#ibcon#wrote, iclass 19, count 0 2006.229.05:27:55.76#ibcon#about to read 3, iclass 19, count 0 2006.229.05:27:55.78#ibcon#read 3, iclass 19, count 0 2006.229.05:27:55.78#ibcon#about to read 4, iclass 19, count 0 2006.229.05:27:55.78#ibcon#read 4, iclass 19, count 0 2006.229.05:27:55.78#ibcon#about to read 5, iclass 19, count 0 2006.229.05:27:55.78#ibcon#read 5, iclass 19, count 0 2006.229.05:27:55.78#ibcon#about to read 6, iclass 19, count 0 2006.229.05:27:55.78#ibcon#read 6, iclass 19, count 0 2006.229.05:27:55.78#ibcon#end of sib2, iclass 19, count 0 2006.229.05:27:55.78#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:27:55.78#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:27:55.78#ibcon#[27=USB\r\n] 2006.229.05:27:55.78#ibcon#*before write, iclass 19, count 0 2006.229.05:27:55.78#ibcon#enter sib2, iclass 19, count 0 2006.229.05:27:55.78#ibcon#flushed, iclass 19, count 0 2006.229.05:27:55.78#ibcon#about to write, iclass 19, count 0 2006.229.05:27:55.78#ibcon#wrote, iclass 19, count 0 2006.229.05:27:55.78#ibcon#about to read 3, iclass 19, count 0 2006.229.05:27:55.81#ibcon#read 3, iclass 19, count 0 2006.229.05:27:55.81#ibcon#about to read 4, iclass 19, count 0 2006.229.05:27:55.81#ibcon#read 4, iclass 19, count 0 2006.229.05:27:55.81#ibcon#about to read 5, iclass 19, count 0 2006.229.05:27:55.81#ibcon#read 5, iclass 19, count 0 2006.229.05:27:55.81#ibcon#about to read 6, iclass 19, count 0 2006.229.05:27:55.81#ibcon#read 6, iclass 19, count 0 2006.229.05:27:55.81#ibcon#end of sib2, iclass 19, count 0 2006.229.05:27:55.81#ibcon#*after write, iclass 19, count 0 2006.229.05:27:55.81#ibcon#*before return 0, iclass 19, count 0 2006.229.05:27:55.81#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:55.81#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:27:55.81#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:27:55.81#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:27:55.81$vck44/vblo=4,679.99 2006.229.05:27:55.81#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.05:27:55.81#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.05:27:55.81#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:55.81#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:55.81#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:55.81#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:55.81#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:27:55.81#ibcon#first serial, iclass 21, count 0 2006.229.05:27:55.81#ibcon#enter sib2, iclass 21, count 0 2006.229.05:27:55.81#ibcon#flushed, iclass 21, count 0 2006.229.05:27:55.81#ibcon#about to write, iclass 21, count 0 2006.229.05:27:55.81#ibcon#wrote, iclass 21, count 0 2006.229.05:27:55.81#ibcon#about to read 3, iclass 21, count 0 2006.229.05:27:55.83#ibcon#read 3, iclass 21, count 0 2006.229.05:27:55.83#ibcon#about to read 4, iclass 21, count 0 2006.229.05:27:55.83#ibcon#read 4, iclass 21, count 0 2006.229.05:27:55.83#ibcon#about to read 5, iclass 21, count 0 2006.229.05:27:55.83#ibcon#read 5, iclass 21, count 0 2006.229.05:27:55.83#ibcon#about to read 6, iclass 21, count 0 2006.229.05:27:55.83#ibcon#read 6, iclass 21, count 0 2006.229.05:27:55.83#ibcon#end of sib2, iclass 21, count 0 2006.229.05:27:55.83#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:27:55.83#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:27:55.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:27:55.83#ibcon#*before write, iclass 21, count 0 2006.229.05:27:55.83#ibcon#enter sib2, iclass 21, count 0 2006.229.05:27:55.83#ibcon#flushed, iclass 21, count 0 2006.229.05:27:55.83#ibcon#about to write, iclass 21, count 0 2006.229.05:27:55.83#ibcon#wrote, iclass 21, count 0 2006.229.05:27:55.83#ibcon#about to read 3, iclass 21, count 0 2006.229.05:27:55.87#ibcon#read 3, iclass 21, count 0 2006.229.05:27:55.87#ibcon#about to read 4, iclass 21, count 0 2006.229.05:27:55.87#ibcon#read 4, iclass 21, count 0 2006.229.05:27:55.87#ibcon#about to read 5, iclass 21, count 0 2006.229.05:27:55.87#ibcon#read 5, iclass 21, count 0 2006.229.05:27:55.87#ibcon#about to read 6, iclass 21, count 0 2006.229.05:27:55.87#ibcon#read 6, iclass 21, count 0 2006.229.05:27:55.87#ibcon#end of sib2, iclass 21, count 0 2006.229.05:27:55.87#ibcon#*after write, iclass 21, count 0 2006.229.05:27:55.87#ibcon#*before return 0, iclass 21, count 0 2006.229.05:27:55.87#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:55.87#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:27:55.87#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:27:55.87#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:27:55.87$vck44/vb=4,4 2006.229.05:27:55.87#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.05:27:55.87#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.05:27:55.87#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:55.87#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:55.93#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:55.93#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:55.93#ibcon#enter wrdev, iclass 23, count 2 2006.229.05:27:55.93#ibcon#first serial, iclass 23, count 2 2006.229.05:27:55.93#ibcon#enter sib2, iclass 23, count 2 2006.229.05:27:55.93#ibcon#flushed, iclass 23, count 2 2006.229.05:27:55.93#ibcon#about to write, iclass 23, count 2 2006.229.05:27:55.93#ibcon#wrote, iclass 23, count 2 2006.229.05:27:55.93#ibcon#about to read 3, iclass 23, count 2 2006.229.05:27:55.95#ibcon#read 3, iclass 23, count 2 2006.229.05:27:55.95#ibcon#about to read 4, iclass 23, count 2 2006.229.05:27:55.95#ibcon#read 4, iclass 23, count 2 2006.229.05:27:55.95#ibcon#about to read 5, iclass 23, count 2 2006.229.05:27:55.95#ibcon#read 5, iclass 23, count 2 2006.229.05:27:55.95#ibcon#about to read 6, iclass 23, count 2 2006.229.05:27:55.95#ibcon#read 6, iclass 23, count 2 2006.229.05:27:55.95#ibcon#end of sib2, iclass 23, count 2 2006.229.05:27:55.95#ibcon#*mode == 0, iclass 23, count 2 2006.229.05:27:55.95#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.05:27:55.95#ibcon#[27=AT04-04\r\n] 2006.229.05:27:55.95#ibcon#*before write, iclass 23, count 2 2006.229.05:27:55.95#ibcon#enter sib2, iclass 23, count 2 2006.229.05:27:55.95#ibcon#flushed, iclass 23, count 2 2006.229.05:27:55.95#ibcon#about to write, iclass 23, count 2 2006.229.05:27:55.95#ibcon#wrote, iclass 23, count 2 2006.229.05:27:55.95#ibcon#about to read 3, iclass 23, count 2 2006.229.05:27:55.98#ibcon#read 3, iclass 23, count 2 2006.229.05:27:55.98#ibcon#about to read 4, iclass 23, count 2 2006.229.05:27:55.98#ibcon#read 4, iclass 23, count 2 2006.229.05:27:55.98#ibcon#about to read 5, iclass 23, count 2 2006.229.05:27:55.98#ibcon#read 5, iclass 23, count 2 2006.229.05:27:55.98#ibcon#about to read 6, iclass 23, count 2 2006.229.05:27:55.98#ibcon#read 6, iclass 23, count 2 2006.229.05:27:55.98#ibcon#end of sib2, iclass 23, count 2 2006.229.05:27:55.98#ibcon#*after write, iclass 23, count 2 2006.229.05:27:55.98#ibcon#*before return 0, iclass 23, count 2 2006.229.05:27:55.98#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:55.98#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:27:55.98#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.05:27:55.98#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:55.98#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:56.10#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:56.10#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:56.10#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:27:56.10#ibcon#first serial, iclass 23, count 0 2006.229.05:27:56.10#ibcon#enter sib2, iclass 23, count 0 2006.229.05:27:56.10#ibcon#flushed, iclass 23, count 0 2006.229.05:27:56.10#ibcon#about to write, iclass 23, count 0 2006.229.05:27:56.10#ibcon#wrote, iclass 23, count 0 2006.229.05:27:56.10#ibcon#about to read 3, iclass 23, count 0 2006.229.05:27:56.12#ibcon#read 3, iclass 23, count 0 2006.229.05:27:56.12#ibcon#about to read 4, iclass 23, count 0 2006.229.05:27:56.12#ibcon#read 4, iclass 23, count 0 2006.229.05:27:56.12#ibcon#about to read 5, iclass 23, count 0 2006.229.05:27:56.12#ibcon#read 5, iclass 23, count 0 2006.229.05:27:56.12#ibcon#about to read 6, iclass 23, count 0 2006.229.05:27:56.12#ibcon#read 6, iclass 23, count 0 2006.229.05:27:56.12#ibcon#end of sib2, iclass 23, count 0 2006.229.05:27:56.12#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:27:56.12#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:27:56.12#ibcon#[27=USB\r\n] 2006.229.05:27:56.12#ibcon#*before write, iclass 23, count 0 2006.229.05:27:56.12#ibcon#enter sib2, iclass 23, count 0 2006.229.05:27:56.12#ibcon#flushed, iclass 23, count 0 2006.229.05:27:56.12#ibcon#about to write, iclass 23, count 0 2006.229.05:27:56.12#ibcon#wrote, iclass 23, count 0 2006.229.05:27:56.12#ibcon#about to read 3, iclass 23, count 0 2006.229.05:27:56.15#ibcon#read 3, iclass 23, count 0 2006.229.05:27:56.15#ibcon#about to read 4, iclass 23, count 0 2006.229.05:27:56.15#ibcon#read 4, iclass 23, count 0 2006.229.05:27:56.15#ibcon#about to read 5, iclass 23, count 0 2006.229.05:27:56.15#ibcon#read 5, iclass 23, count 0 2006.229.05:27:56.15#ibcon#about to read 6, iclass 23, count 0 2006.229.05:27:56.15#ibcon#read 6, iclass 23, count 0 2006.229.05:27:56.15#ibcon#end of sib2, iclass 23, count 0 2006.229.05:27:56.15#ibcon#*after write, iclass 23, count 0 2006.229.05:27:56.15#ibcon#*before return 0, iclass 23, count 0 2006.229.05:27:56.15#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:56.15#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:27:56.15#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:27:56.15#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:27:56.15$vck44/vblo=5,709.99 2006.229.05:27:56.15#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.05:27:56.15#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.05:27:56.15#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:56.15#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:27:56.15#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:27:56.15#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:27:56.15#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:27:56.15#ibcon#first serial, iclass 25, count 0 2006.229.05:27:56.15#ibcon#enter sib2, iclass 25, count 0 2006.229.05:27:56.15#ibcon#flushed, iclass 25, count 0 2006.229.05:27:56.15#ibcon#about to write, iclass 25, count 0 2006.229.05:27:56.15#ibcon#wrote, iclass 25, count 0 2006.229.05:27:56.15#ibcon#about to read 3, iclass 25, count 0 2006.229.05:27:56.17#ibcon#read 3, iclass 25, count 0 2006.229.05:27:56.17#ibcon#about to read 4, iclass 25, count 0 2006.229.05:27:56.17#ibcon#read 4, iclass 25, count 0 2006.229.05:27:56.17#ibcon#about to read 5, iclass 25, count 0 2006.229.05:27:56.17#ibcon#read 5, iclass 25, count 0 2006.229.05:27:56.17#ibcon#about to read 6, iclass 25, count 0 2006.229.05:27:56.17#ibcon#read 6, iclass 25, count 0 2006.229.05:27:56.17#ibcon#end of sib2, iclass 25, count 0 2006.229.05:27:56.17#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:27:56.17#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:27:56.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:27:56.17#ibcon#*before write, iclass 25, count 0 2006.229.05:27:56.17#ibcon#enter sib2, iclass 25, count 0 2006.229.05:27:56.17#ibcon#flushed, iclass 25, count 0 2006.229.05:27:56.17#ibcon#about to write, iclass 25, count 0 2006.229.05:27:56.17#ibcon#wrote, iclass 25, count 0 2006.229.05:27:56.17#ibcon#about to read 3, iclass 25, count 0 2006.229.05:27:56.21#ibcon#read 3, iclass 25, count 0 2006.229.05:27:56.21#ibcon#about to read 4, iclass 25, count 0 2006.229.05:27:56.21#ibcon#read 4, iclass 25, count 0 2006.229.05:27:56.21#ibcon#about to read 5, iclass 25, count 0 2006.229.05:27:56.21#ibcon#read 5, iclass 25, count 0 2006.229.05:27:56.21#ibcon#about to read 6, iclass 25, count 0 2006.229.05:27:56.21#ibcon#read 6, iclass 25, count 0 2006.229.05:27:56.21#ibcon#end of sib2, iclass 25, count 0 2006.229.05:27:56.21#ibcon#*after write, iclass 25, count 0 2006.229.05:27:56.21#ibcon#*before return 0, iclass 25, count 0 2006.229.05:27:56.21#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:27:56.21#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:27:56.21#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:27:56.21#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:27:56.21$vck44/vb=5,4 2006.229.05:27:56.21#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.05:27:56.21#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.05:27:56.21#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:56.21#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:27:56.27#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:27:56.27#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:27:56.27#ibcon#enter wrdev, iclass 27, count 2 2006.229.05:27:56.27#ibcon#first serial, iclass 27, count 2 2006.229.05:27:56.27#ibcon#enter sib2, iclass 27, count 2 2006.229.05:27:56.27#ibcon#flushed, iclass 27, count 2 2006.229.05:27:56.27#ibcon#about to write, iclass 27, count 2 2006.229.05:27:56.27#ibcon#wrote, iclass 27, count 2 2006.229.05:27:56.27#ibcon#about to read 3, iclass 27, count 2 2006.229.05:27:56.29#ibcon#read 3, iclass 27, count 2 2006.229.05:27:56.29#ibcon#about to read 4, iclass 27, count 2 2006.229.05:27:56.29#ibcon#read 4, iclass 27, count 2 2006.229.05:27:56.29#ibcon#about to read 5, iclass 27, count 2 2006.229.05:27:56.29#ibcon#read 5, iclass 27, count 2 2006.229.05:27:56.29#ibcon#about to read 6, iclass 27, count 2 2006.229.05:27:56.29#ibcon#read 6, iclass 27, count 2 2006.229.05:27:56.29#ibcon#end of sib2, iclass 27, count 2 2006.229.05:27:56.29#ibcon#*mode == 0, iclass 27, count 2 2006.229.05:27:56.29#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.05:27:56.29#ibcon#[27=AT05-04\r\n] 2006.229.05:27:56.29#ibcon#*before write, iclass 27, count 2 2006.229.05:27:56.29#ibcon#enter sib2, iclass 27, count 2 2006.229.05:27:56.29#ibcon#flushed, iclass 27, count 2 2006.229.05:27:56.29#ibcon#about to write, iclass 27, count 2 2006.229.05:27:56.29#ibcon#wrote, iclass 27, count 2 2006.229.05:27:56.29#ibcon#about to read 3, iclass 27, count 2 2006.229.05:27:56.32#ibcon#read 3, iclass 27, count 2 2006.229.05:27:56.32#ibcon#about to read 4, iclass 27, count 2 2006.229.05:27:56.32#ibcon#read 4, iclass 27, count 2 2006.229.05:27:56.32#ibcon#about to read 5, iclass 27, count 2 2006.229.05:27:56.32#ibcon#read 5, iclass 27, count 2 2006.229.05:27:56.32#ibcon#about to read 6, iclass 27, count 2 2006.229.05:27:56.32#ibcon#read 6, iclass 27, count 2 2006.229.05:27:56.32#ibcon#end of sib2, iclass 27, count 2 2006.229.05:27:56.32#ibcon#*after write, iclass 27, count 2 2006.229.05:27:56.32#ibcon#*before return 0, iclass 27, count 2 2006.229.05:27:56.32#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:27:56.32#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:27:56.32#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.05:27:56.32#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:56.32#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:27:56.44#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:27:56.44#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:27:56.44#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:27:56.44#ibcon#first serial, iclass 27, count 0 2006.229.05:27:56.44#ibcon#enter sib2, iclass 27, count 0 2006.229.05:27:56.44#ibcon#flushed, iclass 27, count 0 2006.229.05:27:56.44#ibcon#about to write, iclass 27, count 0 2006.229.05:27:56.44#ibcon#wrote, iclass 27, count 0 2006.229.05:27:56.44#ibcon#about to read 3, iclass 27, count 0 2006.229.05:27:56.46#ibcon#read 3, iclass 27, count 0 2006.229.05:27:56.46#ibcon#about to read 4, iclass 27, count 0 2006.229.05:27:56.46#ibcon#read 4, iclass 27, count 0 2006.229.05:27:56.46#ibcon#about to read 5, iclass 27, count 0 2006.229.05:27:56.46#ibcon#read 5, iclass 27, count 0 2006.229.05:27:56.46#ibcon#about to read 6, iclass 27, count 0 2006.229.05:27:56.46#ibcon#read 6, iclass 27, count 0 2006.229.05:27:56.46#ibcon#end of sib2, iclass 27, count 0 2006.229.05:27:56.46#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:27:56.46#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:27:56.46#ibcon#[27=USB\r\n] 2006.229.05:27:56.46#ibcon#*before write, iclass 27, count 0 2006.229.05:27:56.46#ibcon#enter sib2, iclass 27, count 0 2006.229.05:27:56.46#ibcon#flushed, iclass 27, count 0 2006.229.05:27:56.46#ibcon#about to write, iclass 27, count 0 2006.229.05:27:56.46#ibcon#wrote, iclass 27, count 0 2006.229.05:27:56.46#ibcon#about to read 3, iclass 27, count 0 2006.229.05:27:56.49#ibcon#read 3, iclass 27, count 0 2006.229.05:27:56.49#ibcon#about to read 4, iclass 27, count 0 2006.229.05:27:56.49#ibcon#read 4, iclass 27, count 0 2006.229.05:27:56.49#ibcon#about to read 5, iclass 27, count 0 2006.229.05:27:56.49#ibcon#read 5, iclass 27, count 0 2006.229.05:27:56.49#ibcon#about to read 6, iclass 27, count 0 2006.229.05:27:56.49#ibcon#read 6, iclass 27, count 0 2006.229.05:27:56.49#ibcon#end of sib2, iclass 27, count 0 2006.229.05:27:56.49#ibcon#*after write, iclass 27, count 0 2006.229.05:27:56.49#ibcon#*before return 0, iclass 27, count 0 2006.229.05:27:56.49#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:27:56.49#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:27:56.49#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:27:56.49#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:27:56.49$vck44/vblo=6,719.99 2006.229.05:27:56.49#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:27:56.49#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:27:56.49#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:56.49#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:56.49#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:56.49#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:56.49#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:27:56.49#ibcon#first serial, iclass 29, count 0 2006.229.05:27:56.49#ibcon#enter sib2, iclass 29, count 0 2006.229.05:27:56.49#ibcon#flushed, iclass 29, count 0 2006.229.05:27:56.49#ibcon#about to write, iclass 29, count 0 2006.229.05:27:56.49#ibcon#wrote, iclass 29, count 0 2006.229.05:27:56.49#ibcon#about to read 3, iclass 29, count 0 2006.229.05:27:56.51#ibcon#read 3, iclass 29, count 0 2006.229.05:27:56.51#ibcon#about to read 4, iclass 29, count 0 2006.229.05:27:56.51#ibcon#read 4, iclass 29, count 0 2006.229.05:27:56.51#ibcon#about to read 5, iclass 29, count 0 2006.229.05:27:56.51#ibcon#read 5, iclass 29, count 0 2006.229.05:27:56.51#ibcon#about to read 6, iclass 29, count 0 2006.229.05:27:56.51#ibcon#read 6, iclass 29, count 0 2006.229.05:27:56.51#ibcon#end of sib2, iclass 29, count 0 2006.229.05:27:56.51#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:27:56.51#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:27:56.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:27:56.51#ibcon#*before write, iclass 29, count 0 2006.229.05:27:56.51#ibcon#enter sib2, iclass 29, count 0 2006.229.05:27:56.51#ibcon#flushed, iclass 29, count 0 2006.229.05:27:56.51#ibcon#about to write, iclass 29, count 0 2006.229.05:27:56.51#ibcon#wrote, iclass 29, count 0 2006.229.05:27:56.51#ibcon#about to read 3, iclass 29, count 0 2006.229.05:27:56.55#ibcon#read 3, iclass 29, count 0 2006.229.05:27:56.55#ibcon#about to read 4, iclass 29, count 0 2006.229.05:27:56.55#ibcon#read 4, iclass 29, count 0 2006.229.05:27:56.55#ibcon#about to read 5, iclass 29, count 0 2006.229.05:27:56.55#ibcon#read 5, iclass 29, count 0 2006.229.05:27:56.55#ibcon#about to read 6, iclass 29, count 0 2006.229.05:27:56.55#ibcon#read 6, iclass 29, count 0 2006.229.05:27:56.55#ibcon#end of sib2, iclass 29, count 0 2006.229.05:27:56.55#ibcon#*after write, iclass 29, count 0 2006.229.05:27:56.55#ibcon#*before return 0, iclass 29, count 0 2006.229.05:27:56.55#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:56.55#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:27:56.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:27:56.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:27:56.55$vck44/vb=6,4 2006.229.05:27:56.55#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.05:27:56.55#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.05:27:56.55#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:56.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:56.61#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:56.61#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:56.61#ibcon#enter wrdev, iclass 31, count 2 2006.229.05:27:56.61#ibcon#first serial, iclass 31, count 2 2006.229.05:27:56.61#ibcon#enter sib2, iclass 31, count 2 2006.229.05:27:56.61#ibcon#flushed, iclass 31, count 2 2006.229.05:27:56.61#ibcon#about to write, iclass 31, count 2 2006.229.05:27:56.61#ibcon#wrote, iclass 31, count 2 2006.229.05:27:56.61#ibcon#about to read 3, iclass 31, count 2 2006.229.05:27:56.63#ibcon#read 3, iclass 31, count 2 2006.229.05:27:56.63#ibcon#about to read 4, iclass 31, count 2 2006.229.05:27:56.63#ibcon#read 4, iclass 31, count 2 2006.229.05:27:56.63#ibcon#about to read 5, iclass 31, count 2 2006.229.05:27:56.63#ibcon#read 5, iclass 31, count 2 2006.229.05:27:56.63#ibcon#about to read 6, iclass 31, count 2 2006.229.05:27:56.63#ibcon#read 6, iclass 31, count 2 2006.229.05:27:56.63#ibcon#end of sib2, iclass 31, count 2 2006.229.05:27:56.63#ibcon#*mode == 0, iclass 31, count 2 2006.229.05:27:56.63#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.05:27:56.63#ibcon#[27=AT06-04\r\n] 2006.229.05:27:56.63#ibcon#*before write, iclass 31, count 2 2006.229.05:27:56.63#ibcon#enter sib2, iclass 31, count 2 2006.229.05:27:56.63#ibcon#flushed, iclass 31, count 2 2006.229.05:27:56.63#ibcon#about to write, iclass 31, count 2 2006.229.05:27:56.63#ibcon#wrote, iclass 31, count 2 2006.229.05:27:56.63#ibcon#about to read 3, iclass 31, count 2 2006.229.05:27:56.66#ibcon#read 3, iclass 31, count 2 2006.229.05:27:56.66#ibcon#about to read 4, iclass 31, count 2 2006.229.05:27:56.66#ibcon#read 4, iclass 31, count 2 2006.229.05:27:56.66#ibcon#about to read 5, iclass 31, count 2 2006.229.05:27:56.66#ibcon#read 5, iclass 31, count 2 2006.229.05:27:56.66#ibcon#about to read 6, iclass 31, count 2 2006.229.05:27:56.66#ibcon#read 6, iclass 31, count 2 2006.229.05:27:56.66#ibcon#end of sib2, iclass 31, count 2 2006.229.05:27:56.66#ibcon#*after write, iclass 31, count 2 2006.229.05:27:56.66#ibcon#*before return 0, iclass 31, count 2 2006.229.05:27:56.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:56.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:27:56.66#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.05:27:56.66#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:56.66#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:56.78#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:56.78#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:56.78#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:27:56.78#ibcon#first serial, iclass 31, count 0 2006.229.05:27:56.78#ibcon#enter sib2, iclass 31, count 0 2006.229.05:27:56.78#ibcon#flushed, iclass 31, count 0 2006.229.05:27:56.78#ibcon#about to write, iclass 31, count 0 2006.229.05:27:56.78#ibcon#wrote, iclass 31, count 0 2006.229.05:27:56.78#ibcon#about to read 3, iclass 31, count 0 2006.229.05:27:56.80#ibcon#read 3, iclass 31, count 0 2006.229.05:27:56.80#ibcon#about to read 4, iclass 31, count 0 2006.229.05:27:56.80#ibcon#read 4, iclass 31, count 0 2006.229.05:27:56.80#ibcon#about to read 5, iclass 31, count 0 2006.229.05:27:56.80#ibcon#read 5, iclass 31, count 0 2006.229.05:27:56.80#ibcon#about to read 6, iclass 31, count 0 2006.229.05:27:56.80#ibcon#read 6, iclass 31, count 0 2006.229.05:27:56.80#ibcon#end of sib2, iclass 31, count 0 2006.229.05:27:56.80#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:27:56.80#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:27:56.80#ibcon#[27=USB\r\n] 2006.229.05:27:56.80#ibcon#*before write, iclass 31, count 0 2006.229.05:27:56.80#ibcon#enter sib2, iclass 31, count 0 2006.229.05:27:56.80#ibcon#flushed, iclass 31, count 0 2006.229.05:27:56.80#ibcon#about to write, iclass 31, count 0 2006.229.05:27:56.80#ibcon#wrote, iclass 31, count 0 2006.229.05:27:56.80#ibcon#about to read 3, iclass 31, count 0 2006.229.05:27:56.83#ibcon#read 3, iclass 31, count 0 2006.229.05:27:56.83#ibcon#about to read 4, iclass 31, count 0 2006.229.05:27:56.83#ibcon#read 4, iclass 31, count 0 2006.229.05:27:56.83#ibcon#about to read 5, iclass 31, count 0 2006.229.05:27:56.83#ibcon#read 5, iclass 31, count 0 2006.229.05:27:56.83#ibcon#about to read 6, iclass 31, count 0 2006.229.05:27:56.83#ibcon#read 6, iclass 31, count 0 2006.229.05:27:56.83#ibcon#end of sib2, iclass 31, count 0 2006.229.05:27:56.83#ibcon#*after write, iclass 31, count 0 2006.229.05:27:56.83#ibcon#*before return 0, iclass 31, count 0 2006.229.05:27:56.83#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:56.83#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:27:56.83#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:27:56.83#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:27:56.83$vck44/vblo=7,734.99 2006.229.05:27:56.83#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.05:27:56.83#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.05:27:56.83#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:56.83#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:56.83#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:56.83#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:56.83#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:27:56.83#ibcon#first serial, iclass 33, count 0 2006.229.05:27:56.83#ibcon#enter sib2, iclass 33, count 0 2006.229.05:27:56.83#ibcon#flushed, iclass 33, count 0 2006.229.05:27:56.83#ibcon#about to write, iclass 33, count 0 2006.229.05:27:56.83#ibcon#wrote, iclass 33, count 0 2006.229.05:27:56.83#ibcon#about to read 3, iclass 33, count 0 2006.229.05:27:56.85#ibcon#read 3, iclass 33, count 0 2006.229.05:27:56.85#ibcon#about to read 4, iclass 33, count 0 2006.229.05:27:56.85#ibcon#read 4, iclass 33, count 0 2006.229.05:27:56.85#ibcon#about to read 5, iclass 33, count 0 2006.229.05:27:56.85#ibcon#read 5, iclass 33, count 0 2006.229.05:27:56.85#ibcon#about to read 6, iclass 33, count 0 2006.229.05:27:56.85#ibcon#read 6, iclass 33, count 0 2006.229.05:27:56.85#ibcon#end of sib2, iclass 33, count 0 2006.229.05:27:56.85#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:27:56.85#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:27:56.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:27:56.85#ibcon#*before write, iclass 33, count 0 2006.229.05:27:56.85#ibcon#enter sib2, iclass 33, count 0 2006.229.05:27:56.85#ibcon#flushed, iclass 33, count 0 2006.229.05:27:56.85#ibcon#about to write, iclass 33, count 0 2006.229.05:27:56.85#ibcon#wrote, iclass 33, count 0 2006.229.05:27:56.85#ibcon#about to read 3, iclass 33, count 0 2006.229.05:27:56.89#ibcon#read 3, iclass 33, count 0 2006.229.05:27:56.89#ibcon#about to read 4, iclass 33, count 0 2006.229.05:27:56.89#ibcon#read 4, iclass 33, count 0 2006.229.05:27:56.89#ibcon#about to read 5, iclass 33, count 0 2006.229.05:27:56.89#ibcon#read 5, iclass 33, count 0 2006.229.05:27:56.89#ibcon#about to read 6, iclass 33, count 0 2006.229.05:27:56.89#ibcon#read 6, iclass 33, count 0 2006.229.05:27:56.89#ibcon#end of sib2, iclass 33, count 0 2006.229.05:27:56.89#ibcon#*after write, iclass 33, count 0 2006.229.05:27:56.89#ibcon#*before return 0, iclass 33, count 0 2006.229.05:27:56.89#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:56.89#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:27:56.89#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:27:56.89#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:27:56.89$vck44/vb=7,4 2006.229.05:27:56.89#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.05:27:56.89#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.05:27:56.89#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:56.89#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:56.95#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:56.95#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:56.95#ibcon#enter wrdev, iclass 35, count 2 2006.229.05:27:56.95#ibcon#first serial, iclass 35, count 2 2006.229.05:27:56.95#ibcon#enter sib2, iclass 35, count 2 2006.229.05:27:56.95#ibcon#flushed, iclass 35, count 2 2006.229.05:27:56.95#ibcon#about to write, iclass 35, count 2 2006.229.05:27:56.95#ibcon#wrote, iclass 35, count 2 2006.229.05:27:56.95#ibcon#about to read 3, iclass 35, count 2 2006.229.05:27:56.97#ibcon#read 3, iclass 35, count 2 2006.229.05:27:56.97#ibcon#about to read 4, iclass 35, count 2 2006.229.05:27:56.97#ibcon#read 4, iclass 35, count 2 2006.229.05:27:56.97#ibcon#about to read 5, iclass 35, count 2 2006.229.05:27:56.97#ibcon#read 5, iclass 35, count 2 2006.229.05:27:56.97#ibcon#about to read 6, iclass 35, count 2 2006.229.05:27:56.97#ibcon#read 6, iclass 35, count 2 2006.229.05:27:56.97#ibcon#end of sib2, iclass 35, count 2 2006.229.05:27:56.97#ibcon#*mode == 0, iclass 35, count 2 2006.229.05:27:56.97#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.05:27:56.97#ibcon#[27=AT07-04\r\n] 2006.229.05:27:56.97#ibcon#*before write, iclass 35, count 2 2006.229.05:27:56.97#ibcon#enter sib2, iclass 35, count 2 2006.229.05:27:56.97#ibcon#flushed, iclass 35, count 2 2006.229.05:27:56.97#ibcon#about to write, iclass 35, count 2 2006.229.05:27:56.97#ibcon#wrote, iclass 35, count 2 2006.229.05:27:56.97#ibcon#about to read 3, iclass 35, count 2 2006.229.05:27:57.00#ibcon#read 3, iclass 35, count 2 2006.229.05:27:57.00#ibcon#about to read 4, iclass 35, count 2 2006.229.05:27:57.00#ibcon#read 4, iclass 35, count 2 2006.229.05:27:57.00#ibcon#about to read 5, iclass 35, count 2 2006.229.05:27:57.00#ibcon#read 5, iclass 35, count 2 2006.229.05:27:57.00#ibcon#about to read 6, iclass 35, count 2 2006.229.05:27:57.00#ibcon#read 6, iclass 35, count 2 2006.229.05:27:57.00#ibcon#end of sib2, iclass 35, count 2 2006.229.05:27:57.00#ibcon#*after write, iclass 35, count 2 2006.229.05:27:57.00#ibcon#*before return 0, iclass 35, count 2 2006.229.05:27:57.00#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:57.00#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:27:57.00#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.05:27:57.00#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:57.00#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:57.12#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:57.12#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:57.12#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:27:57.12#ibcon#first serial, iclass 35, count 0 2006.229.05:27:57.12#ibcon#enter sib2, iclass 35, count 0 2006.229.05:27:57.12#ibcon#flushed, iclass 35, count 0 2006.229.05:27:57.12#ibcon#about to write, iclass 35, count 0 2006.229.05:27:57.12#ibcon#wrote, iclass 35, count 0 2006.229.05:27:57.12#ibcon#about to read 3, iclass 35, count 0 2006.229.05:27:57.14#ibcon#read 3, iclass 35, count 0 2006.229.05:27:57.14#ibcon#about to read 4, iclass 35, count 0 2006.229.05:27:57.14#ibcon#read 4, iclass 35, count 0 2006.229.05:27:57.14#ibcon#about to read 5, iclass 35, count 0 2006.229.05:27:57.14#ibcon#read 5, iclass 35, count 0 2006.229.05:27:57.14#ibcon#about to read 6, iclass 35, count 0 2006.229.05:27:57.14#ibcon#read 6, iclass 35, count 0 2006.229.05:27:57.14#ibcon#end of sib2, iclass 35, count 0 2006.229.05:27:57.14#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:27:57.14#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:27:57.14#ibcon#[27=USB\r\n] 2006.229.05:27:57.14#ibcon#*before write, iclass 35, count 0 2006.229.05:27:57.14#ibcon#enter sib2, iclass 35, count 0 2006.229.05:27:57.14#ibcon#flushed, iclass 35, count 0 2006.229.05:27:57.14#ibcon#about to write, iclass 35, count 0 2006.229.05:27:57.14#ibcon#wrote, iclass 35, count 0 2006.229.05:27:57.14#ibcon#about to read 3, iclass 35, count 0 2006.229.05:27:57.17#ibcon#read 3, iclass 35, count 0 2006.229.05:27:57.17#ibcon#about to read 4, iclass 35, count 0 2006.229.05:27:57.17#ibcon#read 4, iclass 35, count 0 2006.229.05:27:57.17#ibcon#about to read 5, iclass 35, count 0 2006.229.05:27:57.17#ibcon#read 5, iclass 35, count 0 2006.229.05:27:57.17#ibcon#about to read 6, iclass 35, count 0 2006.229.05:27:57.17#ibcon#read 6, iclass 35, count 0 2006.229.05:27:57.17#ibcon#end of sib2, iclass 35, count 0 2006.229.05:27:57.17#ibcon#*after write, iclass 35, count 0 2006.229.05:27:57.17#ibcon#*before return 0, iclass 35, count 0 2006.229.05:27:57.17#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:57.17#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:27:57.17#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:27:57.17#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:27:57.17$vck44/vblo=8,744.99 2006.229.05:27:57.17#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:27:57.17#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:27:57.17#ibcon#ireg 17 cls_cnt 0 2006.229.05:27:57.17#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:57.17#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:57.17#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:57.17#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:27:57.17#ibcon#first serial, iclass 37, count 0 2006.229.05:27:57.17#ibcon#enter sib2, iclass 37, count 0 2006.229.05:27:57.17#ibcon#flushed, iclass 37, count 0 2006.229.05:27:57.17#ibcon#about to write, iclass 37, count 0 2006.229.05:27:57.17#ibcon#wrote, iclass 37, count 0 2006.229.05:27:57.17#ibcon#about to read 3, iclass 37, count 0 2006.229.05:27:57.19#ibcon#read 3, iclass 37, count 0 2006.229.05:27:57.19#ibcon#about to read 4, iclass 37, count 0 2006.229.05:27:57.19#ibcon#read 4, iclass 37, count 0 2006.229.05:27:57.19#ibcon#about to read 5, iclass 37, count 0 2006.229.05:27:57.19#ibcon#read 5, iclass 37, count 0 2006.229.05:27:57.19#ibcon#about to read 6, iclass 37, count 0 2006.229.05:27:57.19#ibcon#read 6, iclass 37, count 0 2006.229.05:27:57.19#ibcon#end of sib2, iclass 37, count 0 2006.229.05:27:57.19#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:27:57.19#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:27:57.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:27:57.19#ibcon#*before write, iclass 37, count 0 2006.229.05:27:57.19#ibcon#enter sib2, iclass 37, count 0 2006.229.05:27:57.19#ibcon#flushed, iclass 37, count 0 2006.229.05:27:57.19#ibcon#about to write, iclass 37, count 0 2006.229.05:27:57.19#ibcon#wrote, iclass 37, count 0 2006.229.05:27:57.19#ibcon#about to read 3, iclass 37, count 0 2006.229.05:27:57.23#ibcon#read 3, iclass 37, count 0 2006.229.05:27:57.23#ibcon#about to read 4, iclass 37, count 0 2006.229.05:27:57.23#ibcon#read 4, iclass 37, count 0 2006.229.05:27:57.23#ibcon#about to read 5, iclass 37, count 0 2006.229.05:27:57.23#ibcon#read 5, iclass 37, count 0 2006.229.05:27:57.23#ibcon#about to read 6, iclass 37, count 0 2006.229.05:27:57.23#ibcon#read 6, iclass 37, count 0 2006.229.05:27:57.23#ibcon#end of sib2, iclass 37, count 0 2006.229.05:27:57.23#ibcon#*after write, iclass 37, count 0 2006.229.05:27:57.23#ibcon#*before return 0, iclass 37, count 0 2006.229.05:27:57.23#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:57.23#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:27:57.23#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:27:57.23#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:27:57.23$vck44/vb=8,4 2006.229.05:27:57.23#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.05:27:57.23#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.05:27:57.23#ibcon#ireg 11 cls_cnt 2 2006.229.05:27:57.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:57.29#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:57.29#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:57.29#ibcon#enter wrdev, iclass 39, count 2 2006.229.05:27:57.29#ibcon#first serial, iclass 39, count 2 2006.229.05:27:57.29#ibcon#enter sib2, iclass 39, count 2 2006.229.05:27:57.29#ibcon#flushed, iclass 39, count 2 2006.229.05:27:57.29#ibcon#about to write, iclass 39, count 2 2006.229.05:27:57.29#ibcon#wrote, iclass 39, count 2 2006.229.05:27:57.29#ibcon#about to read 3, iclass 39, count 2 2006.229.05:27:57.31#ibcon#read 3, iclass 39, count 2 2006.229.05:27:57.31#ibcon#about to read 4, iclass 39, count 2 2006.229.05:27:57.31#ibcon#read 4, iclass 39, count 2 2006.229.05:27:57.31#ibcon#about to read 5, iclass 39, count 2 2006.229.05:27:57.31#ibcon#read 5, iclass 39, count 2 2006.229.05:27:57.31#ibcon#about to read 6, iclass 39, count 2 2006.229.05:27:57.31#ibcon#read 6, iclass 39, count 2 2006.229.05:27:57.31#ibcon#end of sib2, iclass 39, count 2 2006.229.05:27:57.31#ibcon#*mode == 0, iclass 39, count 2 2006.229.05:27:57.31#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.05:27:57.31#ibcon#[27=AT08-04\r\n] 2006.229.05:27:57.31#ibcon#*before write, iclass 39, count 2 2006.229.05:27:57.31#ibcon#enter sib2, iclass 39, count 2 2006.229.05:27:57.31#ibcon#flushed, iclass 39, count 2 2006.229.05:27:57.31#ibcon#about to write, iclass 39, count 2 2006.229.05:27:57.31#ibcon#wrote, iclass 39, count 2 2006.229.05:27:57.31#ibcon#about to read 3, iclass 39, count 2 2006.229.05:27:57.34#ibcon#read 3, iclass 39, count 2 2006.229.05:27:57.34#ibcon#about to read 4, iclass 39, count 2 2006.229.05:27:57.34#ibcon#read 4, iclass 39, count 2 2006.229.05:27:57.34#ibcon#about to read 5, iclass 39, count 2 2006.229.05:27:57.34#ibcon#read 5, iclass 39, count 2 2006.229.05:27:57.34#ibcon#about to read 6, iclass 39, count 2 2006.229.05:27:57.34#ibcon#read 6, iclass 39, count 2 2006.229.05:27:57.34#ibcon#end of sib2, iclass 39, count 2 2006.229.05:27:57.34#ibcon#*after write, iclass 39, count 2 2006.229.05:27:57.34#ibcon#*before return 0, iclass 39, count 2 2006.229.05:27:57.34#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:57.34#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:27:57.34#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.05:27:57.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:27:57.34#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:57.46#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:57.46#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:57.46#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:27:57.46#ibcon#first serial, iclass 39, count 0 2006.229.05:27:57.46#ibcon#enter sib2, iclass 39, count 0 2006.229.05:27:57.46#ibcon#flushed, iclass 39, count 0 2006.229.05:27:57.46#ibcon#about to write, iclass 39, count 0 2006.229.05:27:57.46#ibcon#wrote, iclass 39, count 0 2006.229.05:27:57.46#ibcon#about to read 3, iclass 39, count 0 2006.229.05:27:57.48#ibcon#read 3, iclass 39, count 0 2006.229.05:27:57.48#ibcon#about to read 4, iclass 39, count 0 2006.229.05:27:57.48#ibcon#read 4, iclass 39, count 0 2006.229.05:27:57.48#ibcon#about to read 5, iclass 39, count 0 2006.229.05:27:57.48#ibcon#read 5, iclass 39, count 0 2006.229.05:27:57.48#ibcon#about to read 6, iclass 39, count 0 2006.229.05:27:57.48#ibcon#read 6, iclass 39, count 0 2006.229.05:27:57.48#ibcon#end of sib2, iclass 39, count 0 2006.229.05:27:57.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:27:57.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:27:57.48#ibcon#[27=USB\r\n] 2006.229.05:27:57.48#ibcon#*before write, iclass 39, count 0 2006.229.05:27:57.48#ibcon#enter sib2, iclass 39, count 0 2006.229.05:27:57.48#ibcon#flushed, iclass 39, count 0 2006.229.05:27:57.48#ibcon#about to write, iclass 39, count 0 2006.229.05:27:57.48#ibcon#wrote, iclass 39, count 0 2006.229.05:27:57.48#ibcon#about to read 3, iclass 39, count 0 2006.229.05:27:57.51#ibcon#read 3, iclass 39, count 0 2006.229.05:27:57.51#ibcon#about to read 4, iclass 39, count 0 2006.229.05:27:57.51#ibcon#read 4, iclass 39, count 0 2006.229.05:27:57.51#ibcon#about to read 5, iclass 39, count 0 2006.229.05:27:57.51#ibcon#read 5, iclass 39, count 0 2006.229.05:27:57.51#ibcon#about to read 6, iclass 39, count 0 2006.229.05:27:57.51#ibcon#read 6, iclass 39, count 0 2006.229.05:27:57.51#ibcon#end of sib2, iclass 39, count 0 2006.229.05:27:57.51#ibcon#*after write, iclass 39, count 0 2006.229.05:27:57.51#ibcon#*before return 0, iclass 39, count 0 2006.229.05:27:57.51#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:57.51#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:27:57.51#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:27:57.51#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:27:57.51$vck44/vabw=wide 2006.229.05:27:57.51#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.05:27:57.51#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.05:27:57.51#ibcon#ireg 8 cls_cnt 0 2006.229.05:27:57.51#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:57.51#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:57.51#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:57.51#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:27:57.51#ibcon#first serial, iclass 3, count 0 2006.229.05:27:57.51#ibcon#enter sib2, iclass 3, count 0 2006.229.05:27:57.51#ibcon#flushed, iclass 3, count 0 2006.229.05:27:57.51#ibcon#about to write, iclass 3, count 0 2006.229.05:27:57.51#ibcon#wrote, iclass 3, count 0 2006.229.05:27:57.51#ibcon#about to read 3, iclass 3, count 0 2006.229.05:27:57.53#ibcon#read 3, iclass 3, count 0 2006.229.05:27:57.53#ibcon#about to read 4, iclass 3, count 0 2006.229.05:27:57.53#ibcon#read 4, iclass 3, count 0 2006.229.05:27:57.53#ibcon#about to read 5, iclass 3, count 0 2006.229.05:27:57.53#ibcon#read 5, iclass 3, count 0 2006.229.05:27:57.53#ibcon#about to read 6, iclass 3, count 0 2006.229.05:27:57.53#ibcon#read 6, iclass 3, count 0 2006.229.05:27:57.53#ibcon#end of sib2, iclass 3, count 0 2006.229.05:27:57.53#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:27:57.53#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:27:57.53#ibcon#[25=BW32\r\n] 2006.229.05:27:57.53#ibcon#*before write, iclass 3, count 0 2006.229.05:27:57.53#ibcon#enter sib2, iclass 3, count 0 2006.229.05:27:57.53#ibcon#flushed, iclass 3, count 0 2006.229.05:27:57.53#ibcon#about to write, iclass 3, count 0 2006.229.05:27:57.53#ibcon#wrote, iclass 3, count 0 2006.229.05:27:57.53#ibcon#about to read 3, iclass 3, count 0 2006.229.05:27:57.56#ibcon#read 3, iclass 3, count 0 2006.229.05:27:57.56#ibcon#about to read 4, iclass 3, count 0 2006.229.05:27:57.56#ibcon#read 4, iclass 3, count 0 2006.229.05:27:57.56#ibcon#about to read 5, iclass 3, count 0 2006.229.05:27:57.56#ibcon#read 5, iclass 3, count 0 2006.229.05:27:57.56#ibcon#about to read 6, iclass 3, count 0 2006.229.05:27:57.56#ibcon#read 6, iclass 3, count 0 2006.229.05:27:57.56#ibcon#end of sib2, iclass 3, count 0 2006.229.05:27:57.56#ibcon#*after write, iclass 3, count 0 2006.229.05:27:57.56#ibcon#*before return 0, iclass 3, count 0 2006.229.05:27:57.56#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:57.56#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:27:57.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:27:57.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:27:57.56$vck44/vbbw=wide 2006.229.05:27:57.56#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:27:57.56#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:27:57.56#ibcon#ireg 8 cls_cnt 0 2006.229.05:27:57.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:27:57.63#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:27:57.63#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:27:57.63#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:27:57.63#ibcon#first serial, iclass 5, count 0 2006.229.05:27:57.63#ibcon#enter sib2, iclass 5, count 0 2006.229.05:27:57.63#ibcon#flushed, iclass 5, count 0 2006.229.05:27:57.63#ibcon#about to write, iclass 5, count 0 2006.229.05:27:57.63#ibcon#wrote, iclass 5, count 0 2006.229.05:27:57.63#ibcon#about to read 3, iclass 5, count 0 2006.229.05:27:57.65#ibcon#read 3, iclass 5, count 0 2006.229.05:27:57.65#ibcon#about to read 4, iclass 5, count 0 2006.229.05:27:57.65#ibcon#read 4, iclass 5, count 0 2006.229.05:27:57.65#ibcon#about to read 5, iclass 5, count 0 2006.229.05:27:57.65#ibcon#read 5, iclass 5, count 0 2006.229.05:27:57.65#ibcon#about to read 6, iclass 5, count 0 2006.229.05:27:57.65#ibcon#read 6, iclass 5, count 0 2006.229.05:27:57.65#ibcon#end of sib2, iclass 5, count 0 2006.229.05:27:57.65#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:27:57.65#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:27:57.65#ibcon#[27=BW32\r\n] 2006.229.05:27:57.65#ibcon#*before write, iclass 5, count 0 2006.229.05:27:57.65#ibcon#enter sib2, iclass 5, count 0 2006.229.05:27:57.65#ibcon#flushed, iclass 5, count 0 2006.229.05:27:57.65#ibcon#about to write, iclass 5, count 0 2006.229.05:27:57.65#ibcon#wrote, iclass 5, count 0 2006.229.05:27:57.65#ibcon#about to read 3, iclass 5, count 0 2006.229.05:27:57.68#ibcon#read 3, iclass 5, count 0 2006.229.05:27:57.68#ibcon#about to read 4, iclass 5, count 0 2006.229.05:27:57.68#ibcon#read 4, iclass 5, count 0 2006.229.05:27:57.68#ibcon#about to read 5, iclass 5, count 0 2006.229.05:27:57.68#ibcon#read 5, iclass 5, count 0 2006.229.05:27:57.68#ibcon#about to read 6, iclass 5, count 0 2006.229.05:27:57.68#ibcon#read 6, iclass 5, count 0 2006.229.05:27:57.68#ibcon#end of sib2, iclass 5, count 0 2006.229.05:27:57.68#ibcon#*after write, iclass 5, count 0 2006.229.05:27:57.68#ibcon#*before return 0, iclass 5, count 0 2006.229.05:27:57.68#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:27:57.68#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:27:57.68#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:27:57.68#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:27:57.68$setupk4/ifdk4 2006.229.05:27:57.68$ifdk4/lo= 2006.229.05:27:57.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:27:57.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:27:57.68$ifdk4/patch= 2006.229.05:27:57.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:27:57.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:27:57.68$setupk4/!*+20s 2006.229.05:28:03.53#abcon#<5=/05 4.0 8.1 30.83 89 999.7\r\n> 2006.229.05:28:03.55#abcon#{5=INTERFACE CLEAR} 2006.229.05:28:03.61#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:28:12.19$setupk4/"tpicd 2006.229.05:28:12.19$setupk4/echo=off 2006.229.05:28:12.19$setupk4/xlog=off 2006.229.05:28:12.19:!2006.229.05:33:08 2006.229.05:28:21.14#trakl#Source acquired 2006.229.05:28:21.14#flagr#flagr/antenna,acquired 2006.229.05:33:08.00:preob 2006.229.05:33:08.13/onsource/TRACKING 2006.229.05:33:08.13:!2006.229.05:33:18 2006.229.05:33:18.00:"tape 2006.229.05:33:18.00:"st=record 2006.229.05:33:18.00:data_valid=on 2006.229.05:33:18.00:midob 2006.229.05:33:18.13/onsource/TRACKING 2006.229.05:33:18.13/wx/30.80,999.7,90 2006.229.05:33:18.22/cable/+6.3990E-03 2006.229.05:33:19.31/va/01,08,usb,yes,37,40 2006.229.05:33:19.31/va/02,07,usb,yes,40,41 2006.229.05:33:19.31/va/03,06,usb,yes,49,52 2006.229.05:33:19.31/va/04,07,usb,yes,41,43 2006.229.05:33:19.31/va/05,04,usb,yes,37,38 2006.229.05:33:19.31/va/06,04,usb,yes,41,41 2006.229.05:33:19.31/va/07,05,usb,yes,37,38 2006.229.05:33:19.31/va/08,06,usb,yes,27,33 2006.229.05:33:19.54/valo/01,524.99,yes,locked 2006.229.05:33:19.54/valo/02,534.99,yes,locked 2006.229.05:33:19.54/valo/03,564.99,yes,locked 2006.229.05:33:19.54/valo/04,624.99,yes,locked 2006.229.05:33:19.54/valo/05,734.99,yes,locked 2006.229.05:33:19.54/valo/06,814.99,yes,locked 2006.229.05:33:19.54/valo/07,864.99,yes,locked 2006.229.05:33:19.54/valo/08,884.99,yes,locked 2006.229.05:33:20.63/vb/01,04,usb,yes,33,47 2006.229.05:33:20.63/vb/02,04,usb,yes,36,58 2006.229.05:33:20.63/vb/03,04,usb,yes,33,39 2006.229.05:33:20.63/vb/04,04,usb,yes,37,36 2006.229.05:33:20.63/vb/05,04,usb,yes,30,32 2006.229.05:33:20.63/vb/06,04,usb,yes,35,30 2006.229.05:33:20.63/vb/07,04,usb,yes,34,34 2006.229.05:33:20.63/vb/08,04,usb,yes,31,35 2006.229.05:33:20.86/vblo/01,629.99,yes,locked 2006.229.05:33:20.86/vblo/02,634.99,yes,locked 2006.229.05:33:20.86/vblo/03,649.99,yes,locked 2006.229.05:33:20.86/vblo/04,679.99,yes,locked 2006.229.05:33:20.86/vblo/05,709.99,yes,locked 2006.229.05:33:20.86/vblo/06,719.99,yes,locked 2006.229.05:33:20.86/vblo/07,734.99,yes,locked 2006.229.05:33:20.86/vblo/08,744.99,yes,locked 2006.229.05:33:21.01/vabw/8 2006.229.05:33:21.16/vbbw/8 2006.229.05:33:21.25/xfe/off,on,12.0 2006.229.05:33:21.62/ifatt/23,28,28,28 2006.229.05:33:22.08/fmout-gps/S +4.49E-07 2006.229.05:33:22.12:!2006.229.05:33:58 2006.229.05:33:58.00:data_valid=off 2006.229.05:33:58.00:"et 2006.229.05:33:58.00:!+3s 2006.229.05:34:01.01:"tape 2006.229.05:34:01.01:postob 2006.229.05:34:01.07/cable/+6.4008E-03 2006.229.05:34:01.07/wx/30.80,999.6,90 2006.229.05:34:02.08/fmout-gps/S +4.48E-07 2006.229.05:34:02.08:scan_name=229-0539,jd0608,440 2006.229.05:34:02.08:source=0804+499,080839.67,495036.5,2000.0,cw 2006.229.05:34:03.13#flagr#flagr/antenna,new-source 2006.229.05:34:03.13:checkk5 2006.229.05:34:03.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:34:03.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:34:04.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:34:04.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:34:05.13/chk_obsdata//k5ts1/T2290533??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:34:05.51/chk_obsdata//k5ts2/T2290533??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:34:05.92/chk_obsdata//k5ts3/T2290533??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:34:06.32/chk_obsdata//k5ts4/T2290533??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.05:34:07.04/k5log//k5ts1_log_newline 2006.229.05:34:07.75/k5log//k5ts2_log_newline 2006.229.05:34:08.44/k5log//k5ts3_log_newline 2006.229.05:34:09.15/k5log//k5ts4_log_newline 2006.229.05:34:09.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:34:09.17:setupk4=1 2006.229.05:34:09.17$setupk4/echo=on 2006.229.05:34:09.18$setupk4/pcalon 2006.229.05:34:09.18$pcalon/"no phase cal control is implemented here 2006.229.05:34:09.18$setupk4/"tpicd=stop 2006.229.05:34:09.18$setupk4/"rec=synch_on 2006.229.05:34:09.18$setupk4/"rec_mode=128 2006.229.05:34:09.18$setupk4/!* 2006.229.05:34:09.18$setupk4/recpk4 2006.229.05:34:09.18$recpk4/recpatch= 2006.229.05:34:09.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:34:09.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:34:09.18$setupk4/vck44 2006.229.05:34:09.18$vck44/valo=1,524.99 2006.229.05:34:09.18#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.05:34:09.18#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.05:34:09.18#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:09.18#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:09.18#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:09.18#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:09.18#ibcon#enter wrdev, iclass 12, count 0 2006.229.05:34:09.18#ibcon#first serial, iclass 12, count 0 2006.229.05:34:09.18#ibcon#enter sib2, iclass 12, count 0 2006.229.05:34:09.18#ibcon#flushed, iclass 12, count 0 2006.229.05:34:09.18#ibcon#about to write, iclass 12, count 0 2006.229.05:34:09.18#ibcon#wrote, iclass 12, count 0 2006.229.05:34:09.18#ibcon#about to read 3, iclass 12, count 0 2006.229.05:34:09.20#ibcon#read 3, iclass 12, count 0 2006.229.05:34:09.20#ibcon#about to read 4, iclass 12, count 0 2006.229.05:34:09.20#ibcon#read 4, iclass 12, count 0 2006.229.05:34:09.20#ibcon#about to read 5, iclass 12, count 0 2006.229.05:34:09.20#ibcon#read 5, iclass 12, count 0 2006.229.05:34:09.20#ibcon#about to read 6, iclass 12, count 0 2006.229.05:34:09.20#ibcon#read 6, iclass 12, count 0 2006.229.05:34:09.20#ibcon#end of sib2, iclass 12, count 0 2006.229.05:34:09.20#ibcon#*mode == 0, iclass 12, count 0 2006.229.05:34:09.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.05:34:09.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:34:09.20#ibcon#*before write, iclass 12, count 0 2006.229.05:34:09.20#ibcon#enter sib2, iclass 12, count 0 2006.229.05:34:09.20#ibcon#flushed, iclass 12, count 0 2006.229.05:34:09.20#ibcon#about to write, iclass 12, count 0 2006.229.05:34:09.20#ibcon#wrote, iclass 12, count 0 2006.229.05:34:09.20#ibcon#about to read 3, iclass 12, count 0 2006.229.05:34:09.25#ibcon#read 3, iclass 12, count 0 2006.229.05:34:09.25#ibcon#about to read 4, iclass 12, count 0 2006.229.05:34:09.25#ibcon#read 4, iclass 12, count 0 2006.229.05:34:09.25#ibcon#about to read 5, iclass 12, count 0 2006.229.05:34:09.25#ibcon#read 5, iclass 12, count 0 2006.229.05:34:09.25#ibcon#about to read 6, iclass 12, count 0 2006.229.05:34:09.25#ibcon#read 6, iclass 12, count 0 2006.229.05:34:09.25#ibcon#end of sib2, iclass 12, count 0 2006.229.05:34:09.25#ibcon#*after write, iclass 12, count 0 2006.229.05:34:09.25#ibcon#*before return 0, iclass 12, count 0 2006.229.05:34:09.25#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:09.25#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:09.25#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.05:34:09.25#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.05:34:09.25$vck44/va=1,8 2006.229.05:34:09.25#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.05:34:09.25#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.05:34:09.25#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:09.25#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:09.25#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:09.25#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:09.25#ibcon#enter wrdev, iclass 14, count 2 2006.229.05:34:09.25#ibcon#first serial, iclass 14, count 2 2006.229.05:34:09.25#ibcon#enter sib2, iclass 14, count 2 2006.229.05:34:09.25#ibcon#flushed, iclass 14, count 2 2006.229.05:34:09.25#ibcon#about to write, iclass 14, count 2 2006.229.05:34:09.25#ibcon#wrote, iclass 14, count 2 2006.229.05:34:09.25#ibcon#about to read 3, iclass 14, count 2 2006.229.05:34:09.27#ibcon#read 3, iclass 14, count 2 2006.229.05:34:09.27#ibcon#about to read 4, iclass 14, count 2 2006.229.05:34:09.27#ibcon#read 4, iclass 14, count 2 2006.229.05:34:09.27#ibcon#about to read 5, iclass 14, count 2 2006.229.05:34:09.27#ibcon#read 5, iclass 14, count 2 2006.229.05:34:09.27#ibcon#about to read 6, iclass 14, count 2 2006.229.05:34:09.27#ibcon#read 6, iclass 14, count 2 2006.229.05:34:09.27#ibcon#end of sib2, iclass 14, count 2 2006.229.05:34:09.27#ibcon#*mode == 0, iclass 14, count 2 2006.229.05:34:09.27#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.05:34:09.27#ibcon#[25=AT01-08\r\n] 2006.229.05:34:09.27#ibcon#*before write, iclass 14, count 2 2006.229.05:34:09.27#ibcon#enter sib2, iclass 14, count 2 2006.229.05:34:09.27#ibcon#flushed, iclass 14, count 2 2006.229.05:34:09.27#ibcon#about to write, iclass 14, count 2 2006.229.05:34:09.27#ibcon#wrote, iclass 14, count 2 2006.229.05:34:09.27#ibcon#about to read 3, iclass 14, count 2 2006.229.05:34:09.30#ibcon#read 3, iclass 14, count 2 2006.229.05:34:09.30#ibcon#about to read 4, iclass 14, count 2 2006.229.05:34:09.30#ibcon#read 4, iclass 14, count 2 2006.229.05:34:09.30#ibcon#about to read 5, iclass 14, count 2 2006.229.05:34:09.30#ibcon#read 5, iclass 14, count 2 2006.229.05:34:09.30#ibcon#about to read 6, iclass 14, count 2 2006.229.05:34:09.30#ibcon#read 6, iclass 14, count 2 2006.229.05:34:09.30#ibcon#end of sib2, iclass 14, count 2 2006.229.05:34:09.30#ibcon#*after write, iclass 14, count 2 2006.229.05:34:09.30#ibcon#*before return 0, iclass 14, count 2 2006.229.05:34:09.30#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:09.30#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:09.30#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.05:34:09.30#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:09.30#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:09.42#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:09.42#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:09.42#ibcon#enter wrdev, iclass 14, count 0 2006.229.05:34:09.42#ibcon#first serial, iclass 14, count 0 2006.229.05:34:09.42#ibcon#enter sib2, iclass 14, count 0 2006.229.05:34:09.42#ibcon#flushed, iclass 14, count 0 2006.229.05:34:09.42#ibcon#about to write, iclass 14, count 0 2006.229.05:34:09.42#ibcon#wrote, iclass 14, count 0 2006.229.05:34:09.42#ibcon#about to read 3, iclass 14, count 0 2006.229.05:34:09.44#ibcon#read 3, iclass 14, count 0 2006.229.05:34:09.44#ibcon#about to read 4, iclass 14, count 0 2006.229.05:34:09.44#ibcon#read 4, iclass 14, count 0 2006.229.05:34:09.44#ibcon#about to read 5, iclass 14, count 0 2006.229.05:34:09.44#ibcon#read 5, iclass 14, count 0 2006.229.05:34:09.44#ibcon#about to read 6, iclass 14, count 0 2006.229.05:34:09.44#ibcon#read 6, iclass 14, count 0 2006.229.05:34:09.44#ibcon#end of sib2, iclass 14, count 0 2006.229.05:34:09.44#ibcon#*mode == 0, iclass 14, count 0 2006.229.05:34:09.44#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.05:34:09.44#ibcon#[25=USB\r\n] 2006.229.05:34:09.44#ibcon#*before write, iclass 14, count 0 2006.229.05:34:09.44#ibcon#enter sib2, iclass 14, count 0 2006.229.05:34:09.44#ibcon#flushed, iclass 14, count 0 2006.229.05:34:09.44#ibcon#about to write, iclass 14, count 0 2006.229.05:34:09.44#ibcon#wrote, iclass 14, count 0 2006.229.05:34:09.44#ibcon#about to read 3, iclass 14, count 0 2006.229.05:34:09.47#ibcon#read 3, iclass 14, count 0 2006.229.05:34:09.47#ibcon#about to read 4, iclass 14, count 0 2006.229.05:34:09.47#ibcon#read 4, iclass 14, count 0 2006.229.05:34:09.47#ibcon#about to read 5, iclass 14, count 0 2006.229.05:34:09.47#ibcon#read 5, iclass 14, count 0 2006.229.05:34:09.47#ibcon#about to read 6, iclass 14, count 0 2006.229.05:34:09.47#ibcon#read 6, iclass 14, count 0 2006.229.05:34:09.47#ibcon#end of sib2, iclass 14, count 0 2006.229.05:34:09.47#ibcon#*after write, iclass 14, count 0 2006.229.05:34:09.47#ibcon#*before return 0, iclass 14, count 0 2006.229.05:34:09.47#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:09.47#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:09.47#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.05:34:09.47#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.05:34:09.47$vck44/valo=2,534.99 2006.229.05:34:09.47#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.05:34:09.47#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.05:34:09.47#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:09.47#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:09.47#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:09.47#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:09.47#ibcon#enter wrdev, iclass 16, count 0 2006.229.05:34:09.47#ibcon#first serial, iclass 16, count 0 2006.229.05:34:09.47#ibcon#enter sib2, iclass 16, count 0 2006.229.05:34:09.47#ibcon#flushed, iclass 16, count 0 2006.229.05:34:09.47#ibcon#about to write, iclass 16, count 0 2006.229.05:34:09.47#ibcon#wrote, iclass 16, count 0 2006.229.05:34:09.47#ibcon#about to read 3, iclass 16, count 0 2006.229.05:34:09.49#ibcon#read 3, iclass 16, count 0 2006.229.05:34:09.49#ibcon#about to read 4, iclass 16, count 0 2006.229.05:34:09.49#ibcon#read 4, iclass 16, count 0 2006.229.05:34:09.49#ibcon#about to read 5, iclass 16, count 0 2006.229.05:34:09.49#ibcon#read 5, iclass 16, count 0 2006.229.05:34:09.49#ibcon#about to read 6, iclass 16, count 0 2006.229.05:34:09.49#ibcon#read 6, iclass 16, count 0 2006.229.05:34:09.49#ibcon#end of sib2, iclass 16, count 0 2006.229.05:34:09.49#ibcon#*mode == 0, iclass 16, count 0 2006.229.05:34:09.49#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.05:34:09.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:34:09.49#ibcon#*before write, iclass 16, count 0 2006.229.05:34:09.49#ibcon#enter sib2, iclass 16, count 0 2006.229.05:34:09.49#ibcon#flushed, iclass 16, count 0 2006.229.05:34:09.49#ibcon#about to write, iclass 16, count 0 2006.229.05:34:09.49#ibcon#wrote, iclass 16, count 0 2006.229.05:34:09.49#ibcon#about to read 3, iclass 16, count 0 2006.229.05:34:09.53#ibcon#read 3, iclass 16, count 0 2006.229.05:34:09.53#ibcon#about to read 4, iclass 16, count 0 2006.229.05:34:09.53#ibcon#read 4, iclass 16, count 0 2006.229.05:34:09.53#ibcon#about to read 5, iclass 16, count 0 2006.229.05:34:09.53#ibcon#read 5, iclass 16, count 0 2006.229.05:34:09.53#ibcon#about to read 6, iclass 16, count 0 2006.229.05:34:09.53#ibcon#read 6, iclass 16, count 0 2006.229.05:34:09.53#ibcon#end of sib2, iclass 16, count 0 2006.229.05:34:09.53#ibcon#*after write, iclass 16, count 0 2006.229.05:34:09.53#ibcon#*before return 0, iclass 16, count 0 2006.229.05:34:09.53#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:09.53#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:09.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.05:34:09.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.05:34:09.53$vck44/va=2,7 2006.229.05:34:09.53#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.05:34:09.53#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.05:34:09.53#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:09.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:09.59#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:09.59#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:09.59#ibcon#enter wrdev, iclass 18, count 2 2006.229.05:34:09.59#ibcon#first serial, iclass 18, count 2 2006.229.05:34:09.59#ibcon#enter sib2, iclass 18, count 2 2006.229.05:34:09.59#ibcon#flushed, iclass 18, count 2 2006.229.05:34:09.59#ibcon#about to write, iclass 18, count 2 2006.229.05:34:09.59#ibcon#wrote, iclass 18, count 2 2006.229.05:34:09.59#ibcon#about to read 3, iclass 18, count 2 2006.229.05:34:09.61#ibcon#read 3, iclass 18, count 2 2006.229.05:34:09.61#ibcon#about to read 4, iclass 18, count 2 2006.229.05:34:09.61#ibcon#read 4, iclass 18, count 2 2006.229.05:34:09.61#ibcon#about to read 5, iclass 18, count 2 2006.229.05:34:09.61#ibcon#read 5, iclass 18, count 2 2006.229.05:34:09.61#ibcon#about to read 6, iclass 18, count 2 2006.229.05:34:09.61#ibcon#read 6, iclass 18, count 2 2006.229.05:34:09.61#ibcon#end of sib2, iclass 18, count 2 2006.229.05:34:09.61#ibcon#*mode == 0, iclass 18, count 2 2006.229.05:34:09.61#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.05:34:09.61#ibcon#[25=AT02-07\r\n] 2006.229.05:34:09.61#ibcon#*before write, iclass 18, count 2 2006.229.05:34:09.61#ibcon#enter sib2, iclass 18, count 2 2006.229.05:34:09.61#ibcon#flushed, iclass 18, count 2 2006.229.05:34:09.61#ibcon#about to write, iclass 18, count 2 2006.229.05:34:09.61#ibcon#wrote, iclass 18, count 2 2006.229.05:34:09.61#ibcon#about to read 3, iclass 18, count 2 2006.229.05:34:09.64#ibcon#read 3, iclass 18, count 2 2006.229.05:34:09.64#ibcon#about to read 4, iclass 18, count 2 2006.229.05:34:09.64#ibcon#read 4, iclass 18, count 2 2006.229.05:34:09.64#ibcon#about to read 5, iclass 18, count 2 2006.229.05:34:09.64#ibcon#read 5, iclass 18, count 2 2006.229.05:34:09.64#ibcon#about to read 6, iclass 18, count 2 2006.229.05:34:09.64#ibcon#read 6, iclass 18, count 2 2006.229.05:34:09.64#ibcon#end of sib2, iclass 18, count 2 2006.229.05:34:09.64#ibcon#*after write, iclass 18, count 2 2006.229.05:34:09.64#ibcon#*before return 0, iclass 18, count 2 2006.229.05:34:09.64#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:09.64#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:09.64#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.05:34:09.64#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:09.64#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:09.76#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:09.76#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:09.76#ibcon#enter wrdev, iclass 18, count 0 2006.229.05:34:09.76#ibcon#first serial, iclass 18, count 0 2006.229.05:34:09.76#ibcon#enter sib2, iclass 18, count 0 2006.229.05:34:09.76#ibcon#flushed, iclass 18, count 0 2006.229.05:34:09.76#ibcon#about to write, iclass 18, count 0 2006.229.05:34:09.76#ibcon#wrote, iclass 18, count 0 2006.229.05:34:09.76#ibcon#about to read 3, iclass 18, count 0 2006.229.05:34:09.78#ibcon#read 3, iclass 18, count 0 2006.229.05:34:09.78#ibcon#about to read 4, iclass 18, count 0 2006.229.05:34:09.78#ibcon#read 4, iclass 18, count 0 2006.229.05:34:09.78#ibcon#about to read 5, iclass 18, count 0 2006.229.05:34:09.78#ibcon#read 5, iclass 18, count 0 2006.229.05:34:09.78#ibcon#about to read 6, iclass 18, count 0 2006.229.05:34:09.78#ibcon#read 6, iclass 18, count 0 2006.229.05:34:09.78#ibcon#end of sib2, iclass 18, count 0 2006.229.05:34:09.78#ibcon#*mode == 0, iclass 18, count 0 2006.229.05:34:09.78#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.05:34:09.78#ibcon#[25=USB\r\n] 2006.229.05:34:09.78#ibcon#*before write, iclass 18, count 0 2006.229.05:34:09.78#ibcon#enter sib2, iclass 18, count 0 2006.229.05:34:09.78#ibcon#flushed, iclass 18, count 0 2006.229.05:34:09.78#ibcon#about to write, iclass 18, count 0 2006.229.05:34:09.78#ibcon#wrote, iclass 18, count 0 2006.229.05:34:09.78#ibcon#about to read 3, iclass 18, count 0 2006.229.05:34:09.78#abcon#<5=/05 4.1 7.8 30.80 90 999.7\r\n> 2006.229.05:34:09.80#abcon#{5=INTERFACE CLEAR} 2006.229.05:34:09.81#ibcon#read 3, iclass 18, count 0 2006.229.05:34:09.81#ibcon#about to read 4, iclass 18, count 0 2006.229.05:34:09.81#ibcon#read 4, iclass 18, count 0 2006.229.05:34:09.81#ibcon#about to read 5, iclass 18, count 0 2006.229.05:34:09.81#ibcon#read 5, iclass 18, count 0 2006.229.05:34:09.81#ibcon#about to read 6, iclass 18, count 0 2006.229.05:34:09.81#ibcon#read 6, iclass 18, count 0 2006.229.05:34:09.81#ibcon#end of sib2, iclass 18, count 0 2006.229.05:34:09.81#ibcon#*after write, iclass 18, count 0 2006.229.05:34:09.81#ibcon#*before return 0, iclass 18, count 0 2006.229.05:34:09.81#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:09.81#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:09.81#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.05:34:09.81#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.05:34:09.81$vck44/valo=3,564.99 2006.229.05:34:09.81#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:34:09.81#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:34:09.81#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:09.81#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:34:09.81#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:34:09.81#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:34:09.81#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:34:09.81#ibcon#first serial, iclass 23, count 0 2006.229.05:34:09.81#ibcon#enter sib2, iclass 23, count 0 2006.229.05:34:09.81#ibcon#flushed, iclass 23, count 0 2006.229.05:34:09.81#ibcon#about to write, iclass 23, count 0 2006.229.05:34:09.81#ibcon#wrote, iclass 23, count 0 2006.229.05:34:09.81#ibcon#about to read 3, iclass 23, count 0 2006.229.05:34:09.83#ibcon#read 3, iclass 23, count 0 2006.229.05:34:09.83#ibcon#about to read 4, iclass 23, count 0 2006.229.05:34:09.83#ibcon#read 4, iclass 23, count 0 2006.229.05:34:09.83#ibcon#about to read 5, iclass 23, count 0 2006.229.05:34:09.83#ibcon#read 5, iclass 23, count 0 2006.229.05:34:09.83#ibcon#about to read 6, iclass 23, count 0 2006.229.05:34:09.83#ibcon#read 6, iclass 23, count 0 2006.229.05:34:09.83#ibcon#end of sib2, iclass 23, count 0 2006.229.05:34:09.83#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:34:09.83#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:34:09.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:34:09.83#ibcon#*before write, iclass 23, count 0 2006.229.05:34:09.83#ibcon#enter sib2, iclass 23, count 0 2006.229.05:34:09.83#ibcon#flushed, iclass 23, count 0 2006.229.05:34:09.83#ibcon#about to write, iclass 23, count 0 2006.229.05:34:09.83#ibcon#wrote, iclass 23, count 0 2006.229.05:34:09.83#ibcon#about to read 3, iclass 23, count 0 2006.229.05:34:09.86#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:34:09.87#ibcon#read 3, iclass 23, count 0 2006.229.05:34:09.87#ibcon#about to read 4, iclass 23, count 0 2006.229.05:34:09.87#ibcon#read 4, iclass 23, count 0 2006.229.05:34:09.87#ibcon#about to read 5, iclass 23, count 0 2006.229.05:34:09.87#ibcon#read 5, iclass 23, count 0 2006.229.05:34:09.87#ibcon#about to read 6, iclass 23, count 0 2006.229.05:34:09.87#ibcon#read 6, iclass 23, count 0 2006.229.05:34:09.87#ibcon#end of sib2, iclass 23, count 0 2006.229.05:34:09.87#ibcon#*after write, iclass 23, count 0 2006.229.05:34:09.87#ibcon#*before return 0, iclass 23, count 0 2006.229.05:34:09.87#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:34:09.87#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:34:09.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:34:09.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:34:09.87$vck44/va=3,6 2006.229.05:34:09.87#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.05:34:09.87#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.05:34:09.87#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:09.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:09.93#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:09.93#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:09.93#ibcon#enter wrdev, iclass 26, count 2 2006.229.05:34:09.93#ibcon#first serial, iclass 26, count 2 2006.229.05:34:09.93#ibcon#enter sib2, iclass 26, count 2 2006.229.05:34:09.93#ibcon#flushed, iclass 26, count 2 2006.229.05:34:09.93#ibcon#about to write, iclass 26, count 2 2006.229.05:34:09.93#ibcon#wrote, iclass 26, count 2 2006.229.05:34:09.93#ibcon#about to read 3, iclass 26, count 2 2006.229.05:34:09.95#ibcon#read 3, iclass 26, count 2 2006.229.05:34:09.95#ibcon#about to read 4, iclass 26, count 2 2006.229.05:34:09.95#ibcon#read 4, iclass 26, count 2 2006.229.05:34:09.95#ibcon#about to read 5, iclass 26, count 2 2006.229.05:34:09.95#ibcon#read 5, iclass 26, count 2 2006.229.05:34:09.95#ibcon#about to read 6, iclass 26, count 2 2006.229.05:34:09.95#ibcon#read 6, iclass 26, count 2 2006.229.05:34:09.95#ibcon#end of sib2, iclass 26, count 2 2006.229.05:34:09.95#ibcon#*mode == 0, iclass 26, count 2 2006.229.05:34:09.95#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.05:34:09.95#ibcon#[25=AT03-06\r\n] 2006.229.05:34:09.95#ibcon#*before write, iclass 26, count 2 2006.229.05:34:09.95#ibcon#enter sib2, iclass 26, count 2 2006.229.05:34:09.95#ibcon#flushed, iclass 26, count 2 2006.229.05:34:09.95#ibcon#about to write, iclass 26, count 2 2006.229.05:34:09.95#ibcon#wrote, iclass 26, count 2 2006.229.05:34:09.95#ibcon#about to read 3, iclass 26, count 2 2006.229.05:34:09.98#ibcon#read 3, iclass 26, count 2 2006.229.05:34:09.98#ibcon#about to read 4, iclass 26, count 2 2006.229.05:34:09.98#ibcon#read 4, iclass 26, count 2 2006.229.05:34:09.98#ibcon#about to read 5, iclass 26, count 2 2006.229.05:34:09.98#ibcon#read 5, iclass 26, count 2 2006.229.05:34:09.98#ibcon#about to read 6, iclass 26, count 2 2006.229.05:34:09.98#ibcon#read 6, iclass 26, count 2 2006.229.05:34:09.98#ibcon#end of sib2, iclass 26, count 2 2006.229.05:34:09.98#ibcon#*after write, iclass 26, count 2 2006.229.05:34:09.98#ibcon#*before return 0, iclass 26, count 2 2006.229.05:34:09.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:09.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:09.98#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.05:34:09.98#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:09.98#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:10.10#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:10.10#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:10.10#ibcon#enter wrdev, iclass 26, count 0 2006.229.05:34:10.10#ibcon#first serial, iclass 26, count 0 2006.229.05:34:10.10#ibcon#enter sib2, iclass 26, count 0 2006.229.05:34:10.10#ibcon#flushed, iclass 26, count 0 2006.229.05:34:10.10#ibcon#about to write, iclass 26, count 0 2006.229.05:34:10.10#ibcon#wrote, iclass 26, count 0 2006.229.05:34:10.10#ibcon#about to read 3, iclass 26, count 0 2006.229.05:34:10.12#ibcon#read 3, iclass 26, count 0 2006.229.05:34:10.12#ibcon#about to read 4, iclass 26, count 0 2006.229.05:34:10.12#ibcon#read 4, iclass 26, count 0 2006.229.05:34:10.12#ibcon#about to read 5, iclass 26, count 0 2006.229.05:34:10.12#ibcon#read 5, iclass 26, count 0 2006.229.05:34:10.12#ibcon#about to read 6, iclass 26, count 0 2006.229.05:34:10.12#ibcon#read 6, iclass 26, count 0 2006.229.05:34:10.12#ibcon#end of sib2, iclass 26, count 0 2006.229.05:34:10.12#ibcon#*mode == 0, iclass 26, count 0 2006.229.05:34:10.12#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.05:34:10.12#ibcon#[25=USB\r\n] 2006.229.05:34:10.12#ibcon#*before write, iclass 26, count 0 2006.229.05:34:10.12#ibcon#enter sib2, iclass 26, count 0 2006.229.05:34:10.12#ibcon#flushed, iclass 26, count 0 2006.229.05:34:10.12#ibcon#about to write, iclass 26, count 0 2006.229.05:34:10.12#ibcon#wrote, iclass 26, count 0 2006.229.05:34:10.12#ibcon#about to read 3, iclass 26, count 0 2006.229.05:34:10.15#ibcon#read 3, iclass 26, count 0 2006.229.05:34:10.15#ibcon#about to read 4, iclass 26, count 0 2006.229.05:34:10.15#ibcon#read 4, iclass 26, count 0 2006.229.05:34:10.15#ibcon#about to read 5, iclass 26, count 0 2006.229.05:34:10.15#ibcon#read 5, iclass 26, count 0 2006.229.05:34:10.15#ibcon#about to read 6, iclass 26, count 0 2006.229.05:34:10.15#ibcon#read 6, iclass 26, count 0 2006.229.05:34:10.15#ibcon#end of sib2, iclass 26, count 0 2006.229.05:34:10.15#ibcon#*after write, iclass 26, count 0 2006.229.05:34:10.15#ibcon#*before return 0, iclass 26, count 0 2006.229.05:34:10.15#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:10.15#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:10.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.05:34:10.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.05:34:10.15$vck44/valo=4,624.99 2006.229.05:34:10.15#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.05:34:10.15#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.05:34:10.15#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:10.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:10.15#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:10.15#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:10.15#ibcon#enter wrdev, iclass 28, count 0 2006.229.05:34:10.15#ibcon#first serial, iclass 28, count 0 2006.229.05:34:10.15#ibcon#enter sib2, iclass 28, count 0 2006.229.05:34:10.15#ibcon#flushed, iclass 28, count 0 2006.229.05:34:10.15#ibcon#about to write, iclass 28, count 0 2006.229.05:34:10.15#ibcon#wrote, iclass 28, count 0 2006.229.05:34:10.15#ibcon#about to read 3, iclass 28, count 0 2006.229.05:34:10.17#ibcon#read 3, iclass 28, count 0 2006.229.05:34:10.17#ibcon#about to read 4, iclass 28, count 0 2006.229.05:34:10.17#ibcon#read 4, iclass 28, count 0 2006.229.05:34:10.17#ibcon#about to read 5, iclass 28, count 0 2006.229.05:34:10.17#ibcon#read 5, iclass 28, count 0 2006.229.05:34:10.17#ibcon#about to read 6, iclass 28, count 0 2006.229.05:34:10.17#ibcon#read 6, iclass 28, count 0 2006.229.05:34:10.17#ibcon#end of sib2, iclass 28, count 0 2006.229.05:34:10.17#ibcon#*mode == 0, iclass 28, count 0 2006.229.05:34:10.17#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.05:34:10.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:34:10.17#ibcon#*before write, iclass 28, count 0 2006.229.05:34:10.17#ibcon#enter sib2, iclass 28, count 0 2006.229.05:34:10.17#ibcon#flushed, iclass 28, count 0 2006.229.05:34:10.17#ibcon#about to write, iclass 28, count 0 2006.229.05:34:10.17#ibcon#wrote, iclass 28, count 0 2006.229.05:34:10.17#ibcon#about to read 3, iclass 28, count 0 2006.229.05:34:10.21#ibcon#read 3, iclass 28, count 0 2006.229.05:34:10.21#ibcon#about to read 4, iclass 28, count 0 2006.229.05:34:10.21#ibcon#read 4, iclass 28, count 0 2006.229.05:34:10.21#ibcon#about to read 5, iclass 28, count 0 2006.229.05:34:10.21#ibcon#read 5, iclass 28, count 0 2006.229.05:34:10.21#ibcon#about to read 6, iclass 28, count 0 2006.229.05:34:10.21#ibcon#read 6, iclass 28, count 0 2006.229.05:34:10.21#ibcon#end of sib2, iclass 28, count 0 2006.229.05:34:10.21#ibcon#*after write, iclass 28, count 0 2006.229.05:34:10.21#ibcon#*before return 0, iclass 28, count 0 2006.229.05:34:10.21#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:10.21#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:10.21#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.05:34:10.21#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.05:34:10.21$vck44/va=4,7 2006.229.05:34:10.21#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.05:34:10.21#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.05:34:10.21#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:10.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:10.27#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:10.27#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:10.27#ibcon#enter wrdev, iclass 30, count 2 2006.229.05:34:10.27#ibcon#first serial, iclass 30, count 2 2006.229.05:34:10.27#ibcon#enter sib2, iclass 30, count 2 2006.229.05:34:10.27#ibcon#flushed, iclass 30, count 2 2006.229.05:34:10.27#ibcon#about to write, iclass 30, count 2 2006.229.05:34:10.27#ibcon#wrote, iclass 30, count 2 2006.229.05:34:10.27#ibcon#about to read 3, iclass 30, count 2 2006.229.05:34:10.29#ibcon#read 3, iclass 30, count 2 2006.229.05:34:10.29#ibcon#about to read 4, iclass 30, count 2 2006.229.05:34:10.29#ibcon#read 4, iclass 30, count 2 2006.229.05:34:10.29#ibcon#about to read 5, iclass 30, count 2 2006.229.05:34:10.29#ibcon#read 5, iclass 30, count 2 2006.229.05:34:10.29#ibcon#about to read 6, iclass 30, count 2 2006.229.05:34:10.29#ibcon#read 6, iclass 30, count 2 2006.229.05:34:10.29#ibcon#end of sib2, iclass 30, count 2 2006.229.05:34:10.29#ibcon#*mode == 0, iclass 30, count 2 2006.229.05:34:10.29#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.05:34:10.29#ibcon#[25=AT04-07\r\n] 2006.229.05:34:10.29#ibcon#*before write, iclass 30, count 2 2006.229.05:34:10.29#ibcon#enter sib2, iclass 30, count 2 2006.229.05:34:10.29#ibcon#flushed, iclass 30, count 2 2006.229.05:34:10.29#ibcon#about to write, iclass 30, count 2 2006.229.05:34:10.29#ibcon#wrote, iclass 30, count 2 2006.229.05:34:10.29#ibcon#about to read 3, iclass 30, count 2 2006.229.05:34:10.32#ibcon#read 3, iclass 30, count 2 2006.229.05:34:10.32#ibcon#about to read 4, iclass 30, count 2 2006.229.05:34:10.32#ibcon#read 4, iclass 30, count 2 2006.229.05:34:10.32#ibcon#about to read 5, iclass 30, count 2 2006.229.05:34:10.32#ibcon#read 5, iclass 30, count 2 2006.229.05:34:10.32#ibcon#about to read 6, iclass 30, count 2 2006.229.05:34:10.32#ibcon#read 6, iclass 30, count 2 2006.229.05:34:10.32#ibcon#end of sib2, iclass 30, count 2 2006.229.05:34:10.32#ibcon#*after write, iclass 30, count 2 2006.229.05:34:10.32#ibcon#*before return 0, iclass 30, count 2 2006.229.05:34:10.32#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:10.32#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:10.32#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.05:34:10.32#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:10.32#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:10.44#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:10.44#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:10.44#ibcon#enter wrdev, iclass 30, count 0 2006.229.05:34:10.44#ibcon#first serial, iclass 30, count 0 2006.229.05:34:10.44#ibcon#enter sib2, iclass 30, count 0 2006.229.05:34:10.44#ibcon#flushed, iclass 30, count 0 2006.229.05:34:10.44#ibcon#about to write, iclass 30, count 0 2006.229.05:34:10.44#ibcon#wrote, iclass 30, count 0 2006.229.05:34:10.44#ibcon#about to read 3, iclass 30, count 0 2006.229.05:34:10.46#ibcon#read 3, iclass 30, count 0 2006.229.05:34:10.46#ibcon#about to read 4, iclass 30, count 0 2006.229.05:34:10.46#ibcon#read 4, iclass 30, count 0 2006.229.05:34:10.46#ibcon#about to read 5, iclass 30, count 0 2006.229.05:34:10.46#ibcon#read 5, iclass 30, count 0 2006.229.05:34:10.46#ibcon#about to read 6, iclass 30, count 0 2006.229.05:34:10.46#ibcon#read 6, iclass 30, count 0 2006.229.05:34:10.46#ibcon#end of sib2, iclass 30, count 0 2006.229.05:34:10.46#ibcon#*mode == 0, iclass 30, count 0 2006.229.05:34:10.46#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.05:34:10.46#ibcon#[25=USB\r\n] 2006.229.05:34:10.46#ibcon#*before write, iclass 30, count 0 2006.229.05:34:10.46#ibcon#enter sib2, iclass 30, count 0 2006.229.05:34:10.46#ibcon#flushed, iclass 30, count 0 2006.229.05:34:10.46#ibcon#about to write, iclass 30, count 0 2006.229.05:34:10.46#ibcon#wrote, iclass 30, count 0 2006.229.05:34:10.46#ibcon#about to read 3, iclass 30, count 0 2006.229.05:34:10.49#ibcon#read 3, iclass 30, count 0 2006.229.05:34:10.49#ibcon#about to read 4, iclass 30, count 0 2006.229.05:34:10.49#ibcon#read 4, iclass 30, count 0 2006.229.05:34:10.49#ibcon#about to read 5, iclass 30, count 0 2006.229.05:34:10.49#ibcon#read 5, iclass 30, count 0 2006.229.05:34:10.49#ibcon#about to read 6, iclass 30, count 0 2006.229.05:34:10.49#ibcon#read 6, iclass 30, count 0 2006.229.05:34:10.49#ibcon#end of sib2, iclass 30, count 0 2006.229.05:34:10.49#ibcon#*after write, iclass 30, count 0 2006.229.05:34:10.49#ibcon#*before return 0, iclass 30, count 0 2006.229.05:34:10.49#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:10.49#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:10.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.05:34:10.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.05:34:10.49$vck44/valo=5,734.99 2006.229.05:34:10.49#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.05:34:10.49#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.05:34:10.49#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:10.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:10.49#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:10.49#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:10.49#ibcon#enter wrdev, iclass 32, count 0 2006.229.05:34:10.49#ibcon#first serial, iclass 32, count 0 2006.229.05:34:10.49#ibcon#enter sib2, iclass 32, count 0 2006.229.05:34:10.49#ibcon#flushed, iclass 32, count 0 2006.229.05:34:10.49#ibcon#about to write, iclass 32, count 0 2006.229.05:34:10.49#ibcon#wrote, iclass 32, count 0 2006.229.05:34:10.49#ibcon#about to read 3, iclass 32, count 0 2006.229.05:34:10.51#ibcon#read 3, iclass 32, count 0 2006.229.05:34:10.51#ibcon#about to read 4, iclass 32, count 0 2006.229.05:34:10.51#ibcon#read 4, iclass 32, count 0 2006.229.05:34:10.51#ibcon#about to read 5, iclass 32, count 0 2006.229.05:34:10.51#ibcon#read 5, iclass 32, count 0 2006.229.05:34:10.51#ibcon#about to read 6, iclass 32, count 0 2006.229.05:34:10.51#ibcon#read 6, iclass 32, count 0 2006.229.05:34:10.51#ibcon#end of sib2, iclass 32, count 0 2006.229.05:34:10.51#ibcon#*mode == 0, iclass 32, count 0 2006.229.05:34:10.51#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.05:34:10.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:34:10.51#ibcon#*before write, iclass 32, count 0 2006.229.05:34:10.51#ibcon#enter sib2, iclass 32, count 0 2006.229.05:34:10.51#ibcon#flushed, iclass 32, count 0 2006.229.05:34:10.51#ibcon#about to write, iclass 32, count 0 2006.229.05:34:10.51#ibcon#wrote, iclass 32, count 0 2006.229.05:34:10.51#ibcon#about to read 3, iclass 32, count 0 2006.229.05:34:10.55#ibcon#read 3, iclass 32, count 0 2006.229.05:34:10.55#ibcon#about to read 4, iclass 32, count 0 2006.229.05:34:10.55#ibcon#read 4, iclass 32, count 0 2006.229.05:34:10.55#ibcon#about to read 5, iclass 32, count 0 2006.229.05:34:10.55#ibcon#read 5, iclass 32, count 0 2006.229.05:34:10.55#ibcon#about to read 6, iclass 32, count 0 2006.229.05:34:10.55#ibcon#read 6, iclass 32, count 0 2006.229.05:34:10.55#ibcon#end of sib2, iclass 32, count 0 2006.229.05:34:10.55#ibcon#*after write, iclass 32, count 0 2006.229.05:34:10.55#ibcon#*before return 0, iclass 32, count 0 2006.229.05:34:10.55#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:10.55#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:10.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.05:34:10.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.05:34:10.55$vck44/va=5,4 2006.229.05:34:10.55#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.05:34:10.55#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.05:34:10.55#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:10.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:10.61#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:10.61#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:10.61#ibcon#enter wrdev, iclass 34, count 2 2006.229.05:34:10.61#ibcon#first serial, iclass 34, count 2 2006.229.05:34:10.61#ibcon#enter sib2, iclass 34, count 2 2006.229.05:34:10.61#ibcon#flushed, iclass 34, count 2 2006.229.05:34:10.61#ibcon#about to write, iclass 34, count 2 2006.229.05:34:10.61#ibcon#wrote, iclass 34, count 2 2006.229.05:34:10.61#ibcon#about to read 3, iclass 34, count 2 2006.229.05:34:10.63#ibcon#read 3, iclass 34, count 2 2006.229.05:34:10.63#ibcon#about to read 4, iclass 34, count 2 2006.229.05:34:10.63#ibcon#read 4, iclass 34, count 2 2006.229.05:34:10.63#ibcon#about to read 5, iclass 34, count 2 2006.229.05:34:10.63#ibcon#read 5, iclass 34, count 2 2006.229.05:34:10.63#ibcon#about to read 6, iclass 34, count 2 2006.229.05:34:10.63#ibcon#read 6, iclass 34, count 2 2006.229.05:34:10.63#ibcon#end of sib2, iclass 34, count 2 2006.229.05:34:10.63#ibcon#*mode == 0, iclass 34, count 2 2006.229.05:34:10.63#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.05:34:10.63#ibcon#[25=AT05-04\r\n] 2006.229.05:34:10.63#ibcon#*before write, iclass 34, count 2 2006.229.05:34:10.63#ibcon#enter sib2, iclass 34, count 2 2006.229.05:34:10.63#ibcon#flushed, iclass 34, count 2 2006.229.05:34:10.63#ibcon#about to write, iclass 34, count 2 2006.229.05:34:10.63#ibcon#wrote, iclass 34, count 2 2006.229.05:34:10.63#ibcon#about to read 3, iclass 34, count 2 2006.229.05:34:10.66#ibcon#read 3, iclass 34, count 2 2006.229.05:34:10.66#ibcon#about to read 4, iclass 34, count 2 2006.229.05:34:10.66#ibcon#read 4, iclass 34, count 2 2006.229.05:34:10.66#ibcon#about to read 5, iclass 34, count 2 2006.229.05:34:10.66#ibcon#read 5, iclass 34, count 2 2006.229.05:34:10.66#ibcon#about to read 6, iclass 34, count 2 2006.229.05:34:10.66#ibcon#read 6, iclass 34, count 2 2006.229.05:34:10.66#ibcon#end of sib2, iclass 34, count 2 2006.229.05:34:10.66#ibcon#*after write, iclass 34, count 2 2006.229.05:34:10.66#ibcon#*before return 0, iclass 34, count 2 2006.229.05:34:10.66#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:10.66#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:10.66#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.05:34:10.66#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:10.66#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:10.78#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:10.78#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:10.78#ibcon#enter wrdev, iclass 34, count 0 2006.229.05:34:10.78#ibcon#first serial, iclass 34, count 0 2006.229.05:34:10.78#ibcon#enter sib2, iclass 34, count 0 2006.229.05:34:10.78#ibcon#flushed, iclass 34, count 0 2006.229.05:34:10.78#ibcon#about to write, iclass 34, count 0 2006.229.05:34:10.78#ibcon#wrote, iclass 34, count 0 2006.229.05:34:10.78#ibcon#about to read 3, iclass 34, count 0 2006.229.05:34:10.80#ibcon#read 3, iclass 34, count 0 2006.229.05:34:10.80#ibcon#about to read 4, iclass 34, count 0 2006.229.05:34:10.80#ibcon#read 4, iclass 34, count 0 2006.229.05:34:10.80#ibcon#about to read 5, iclass 34, count 0 2006.229.05:34:10.80#ibcon#read 5, iclass 34, count 0 2006.229.05:34:10.80#ibcon#about to read 6, iclass 34, count 0 2006.229.05:34:10.80#ibcon#read 6, iclass 34, count 0 2006.229.05:34:10.80#ibcon#end of sib2, iclass 34, count 0 2006.229.05:34:10.80#ibcon#*mode == 0, iclass 34, count 0 2006.229.05:34:10.80#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.05:34:10.80#ibcon#[25=USB\r\n] 2006.229.05:34:10.80#ibcon#*before write, iclass 34, count 0 2006.229.05:34:10.80#ibcon#enter sib2, iclass 34, count 0 2006.229.05:34:10.80#ibcon#flushed, iclass 34, count 0 2006.229.05:34:10.80#ibcon#about to write, iclass 34, count 0 2006.229.05:34:10.80#ibcon#wrote, iclass 34, count 0 2006.229.05:34:10.80#ibcon#about to read 3, iclass 34, count 0 2006.229.05:34:10.83#ibcon#read 3, iclass 34, count 0 2006.229.05:34:10.83#ibcon#about to read 4, iclass 34, count 0 2006.229.05:34:10.83#ibcon#read 4, iclass 34, count 0 2006.229.05:34:10.83#ibcon#about to read 5, iclass 34, count 0 2006.229.05:34:10.83#ibcon#read 5, iclass 34, count 0 2006.229.05:34:10.83#ibcon#about to read 6, iclass 34, count 0 2006.229.05:34:10.83#ibcon#read 6, iclass 34, count 0 2006.229.05:34:10.83#ibcon#end of sib2, iclass 34, count 0 2006.229.05:34:10.83#ibcon#*after write, iclass 34, count 0 2006.229.05:34:10.83#ibcon#*before return 0, iclass 34, count 0 2006.229.05:34:10.83#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:10.83#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:10.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.05:34:10.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.05:34:10.83$vck44/valo=6,814.99 2006.229.05:34:10.83#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.05:34:10.83#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.05:34:10.83#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:10.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:10.83#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:10.83#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:10.83#ibcon#enter wrdev, iclass 36, count 0 2006.229.05:34:10.83#ibcon#first serial, iclass 36, count 0 2006.229.05:34:10.83#ibcon#enter sib2, iclass 36, count 0 2006.229.05:34:10.83#ibcon#flushed, iclass 36, count 0 2006.229.05:34:10.83#ibcon#about to write, iclass 36, count 0 2006.229.05:34:10.83#ibcon#wrote, iclass 36, count 0 2006.229.05:34:10.83#ibcon#about to read 3, iclass 36, count 0 2006.229.05:34:10.85#ibcon#read 3, iclass 36, count 0 2006.229.05:34:10.85#ibcon#about to read 4, iclass 36, count 0 2006.229.05:34:10.85#ibcon#read 4, iclass 36, count 0 2006.229.05:34:10.85#ibcon#about to read 5, iclass 36, count 0 2006.229.05:34:10.85#ibcon#read 5, iclass 36, count 0 2006.229.05:34:10.85#ibcon#about to read 6, iclass 36, count 0 2006.229.05:34:10.85#ibcon#read 6, iclass 36, count 0 2006.229.05:34:10.85#ibcon#end of sib2, iclass 36, count 0 2006.229.05:34:10.85#ibcon#*mode == 0, iclass 36, count 0 2006.229.05:34:10.85#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.05:34:10.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:34:10.85#ibcon#*before write, iclass 36, count 0 2006.229.05:34:10.85#ibcon#enter sib2, iclass 36, count 0 2006.229.05:34:10.85#ibcon#flushed, iclass 36, count 0 2006.229.05:34:10.85#ibcon#about to write, iclass 36, count 0 2006.229.05:34:10.85#ibcon#wrote, iclass 36, count 0 2006.229.05:34:10.85#ibcon#about to read 3, iclass 36, count 0 2006.229.05:34:10.89#ibcon#read 3, iclass 36, count 0 2006.229.05:34:10.89#ibcon#about to read 4, iclass 36, count 0 2006.229.05:34:10.89#ibcon#read 4, iclass 36, count 0 2006.229.05:34:10.89#ibcon#about to read 5, iclass 36, count 0 2006.229.05:34:10.89#ibcon#read 5, iclass 36, count 0 2006.229.05:34:10.89#ibcon#about to read 6, iclass 36, count 0 2006.229.05:34:10.89#ibcon#read 6, iclass 36, count 0 2006.229.05:34:10.89#ibcon#end of sib2, iclass 36, count 0 2006.229.05:34:10.89#ibcon#*after write, iclass 36, count 0 2006.229.05:34:10.89#ibcon#*before return 0, iclass 36, count 0 2006.229.05:34:10.89#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:10.89#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:10.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.05:34:10.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.05:34:10.89$vck44/va=6,4 2006.229.05:34:10.89#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.05:34:10.89#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.05:34:10.89#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:10.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:10.95#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:10.95#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:10.95#ibcon#enter wrdev, iclass 38, count 2 2006.229.05:34:10.95#ibcon#first serial, iclass 38, count 2 2006.229.05:34:10.95#ibcon#enter sib2, iclass 38, count 2 2006.229.05:34:10.95#ibcon#flushed, iclass 38, count 2 2006.229.05:34:10.95#ibcon#about to write, iclass 38, count 2 2006.229.05:34:10.95#ibcon#wrote, iclass 38, count 2 2006.229.05:34:10.95#ibcon#about to read 3, iclass 38, count 2 2006.229.05:34:10.97#ibcon#read 3, iclass 38, count 2 2006.229.05:34:10.97#ibcon#about to read 4, iclass 38, count 2 2006.229.05:34:10.97#ibcon#read 4, iclass 38, count 2 2006.229.05:34:10.97#ibcon#about to read 5, iclass 38, count 2 2006.229.05:34:10.97#ibcon#read 5, iclass 38, count 2 2006.229.05:34:10.97#ibcon#about to read 6, iclass 38, count 2 2006.229.05:34:10.97#ibcon#read 6, iclass 38, count 2 2006.229.05:34:10.97#ibcon#end of sib2, iclass 38, count 2 2006.229.05:34:10.97#ibcon#*mode == 0, iclass 38, count 2 2006.229.05:34:10.97#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.05:34:10.97#ibcon#[25=AT06-04\r\n] 2006.229.05:34:10.97#ibcon#*before write, iclass 38, count 2 2006.229.05:34:10.97#ibcon#enter sib2, iclass 38, count 2 2006.229.05:34:10.97#ibcon#flushed, iclass 38, count 2 2006.229.05:34:10.97#ibcon#about to write, iclass 38, count 2 2006.229.05:34:10.97#ibcon#wrote, iclass 38, count 2 2006.229.05:34:10.97#ibcon#about to read 3, iclass 38, count 2 2006.229.05:34:11.00#ibcon#read 3, iclass 38, count 2 2006.229.05:34:11.00#ibcon#about to read 4, iclass 38, count 2 2006.229.05:34:11.00#ibcon#read 4, iclass 38, count 2 2006.229.05:34:11.00#ibcon#about to read 5, iclass 38, count 2 2006.229.05:34:11.00#ibcon#read 5, iclass 38, count 2 2006.229.05:34:11.00#ibcon#about to read 6, iclass 38, count 2 2006.229.05:34:11.00#ibcon#read 6, iclass 38, count 2 2006.229.05:34:11.00#ibcon#end of sib2, iclass 38, count 2 2006.229.05:34:11.00#ibcon#*after write, iclass 38, count 2 2006.229.05:34:11.00#ibcon#*before return 0, iclass 38, count 2 2006.229.05:34:11.00#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:11.00#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:11.00#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.05:34:11.00#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:11.00#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:11.12#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:11.12#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:11.12#ibcon#enter wrdev, iclass 38, count 0 2006.229.05:34:11.12#ibcon#first serial, iclass 38, count 0 2006.229.05:34:11.12#ibcon#enter sib2, iclass 38, count 0 2006.229.05:34:11.12#ibcon#flushed, iclass 38, count 0 2006.229.05:34:11.12#ibcon#about to write, iclass 38, count 0 2006.229.05:34:11.12#ibcon#wrote, iclass 38, count 0 2006.229.05:34:11.12#ibcon#about to read 3, iclass 38, count 0 2006.229.05:34:11.14#ibcon#read 3, iclass 38, count 0 2006.229.05:34:11.14#ibcon#about to read 4, iclass 38, count 0 2006.229.05:34:11.14#ibcon#read 4, iclass 38, count 0 2006.229.05:34:11.14#ibcon#about to read 5, iclass 38, count 0 2006.229.05:34:11.14#ibcon#read 5, iclass 38, count 0 2006.229.05:34:11.14#ibcon#about to read 6, iclass 38, count 0 2006.229.05:34:11.14#ibcon#read 6, iclass 38, count 0 2006.229.05:34:11.14#ibcon#end of sib2, iclass 38, count 0 2006.229.05:34:11.14#ibcon#*mode == 0, iclass 38, count 0 2006.229.05:34:11.14#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.05:34:11.14#ibcon#[25=USB\r\n] 2006.229.05:34:11.14#ibcon#*before write, iclass 38, count 0 2006.229.05:34:11.14#ibcon#enter sib2, iclass 38, count 0 2006.229.05:34:11.14#ibcon#flushed, iclass 38, count 0 2006.229.05:34:11.14#ibcon#about to write, iclass 38, count 0 2006.229.05:34:11.14#ibcon#wrote, iclass 38, count 0 2006.229.05:34:11.14#ibcon#about to read 3, iclass 38, count 0 2006.229.05:34:11.17#ibcon#read 3, iclass 38, count 0 2006.229.05:34:11.17#ibcon#about to read 4, iclass 38, count 0 2006.229.05:34:11.17#ibcon#read 4, iclass 38, count 0 2006.229.05:34:11.17#ibcon#about to read 5, iclass 38, count 0 2006.229.05:34:11.17#ibcon#read 5, iclass 38, count 0 2006.229.05:34:11.17#ibcon#about to read 6, iclass 38, count 0 2006.229.05:34:11.17#ibcon#read 6, iclass 38, count 0 2006.229.05:34:11.17#ibcon#end of sib2, iclass 38, count 0 2006.229.05:34:11.17#ibcon#*after write, iclass 38, count 0 2006.229.05:34:11.17#ibcon#*before return 0, iclass 38, count 0 2006.229.05:34:11.17#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:11.17#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:11.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.05:34:11.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.05:34:11.17$vck44/valo=7,864.99 2006.229.05:34:11.17#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.05:34:11.17#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.05:34:11.17#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:11.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:11.17#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:11.17#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:11.17#ibcon#enter wrdev, iclass 40, count 0 2006.229.05:34:11.17#ibcon#first serial, iclass 40, count 0 2006.229.05:34:11.17#ibcon#enter sib2, iclass 40, count 0 2006.229.05:34:11.17#ibcon#flushed, iclass 40, count 0 2006.229.05:34:11.17#ibcon#about to write, iclass 40, count 0 2006.229.05:34:11.17#ibcon#wrote, iclass 40, count 0 2006.229.05:34:11.17#ibcon#about to read 3, iclass 40, count 0 2006.229.05:34:11.19#ibcon#read 3, iclass 40, count 0 2006.229.05:34:11.19#ibcon#about to read 4, iclass 40, count 0 2006.229.05:34:11.19#ibcon#read 4, iclass 40, count 0 2006.229.05:34:11.19#ibcon#about to read 5, iclass 40, count 0 2006.229.05:34:11.19#ibcon#read 5, iclass 40, count 0 2006.229.05:34:11.19#ibcon#about to read 6, iclass 40, count 0 2006.229.05:34:11.19#ibcon#read 6, iclass 40, count 0 2006.229.05:34:11.19#ibcon#end of sib2, iclass 40, count 0 2006.229.05:34:11.19#ibcon#*mode == 0, iclass 40, count 0 2006.229.05:34:11.19#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.05:34:11.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:34:11.19#ibcon#*before write, iclass 40, count 0 2006.229.05:34:11.19#ibcon#enter sib2, iclass 40, count 0 2006.229.05:34:11.19#ibcon#flushed, iclass 40, count 0 2006.229.05:34:11.19#ibcon#about to write, iclass 40, count 0 2006.229.05:34:11.19#ibcon#wrote, iclass 40, count 0 2006.229.05:34:11.19#ibcon#about to read 3, iclass 40, count 0 2006.229.05:34:11.23#ibcon#read 3, iclass 40, count 0 2006.229.05:34:11.23#ibcon#about to read 4, iclass 40, count 0 2006.229.05:34:11.23#ibcon#read 4, iclass 40, count 0 2006.229.05:34:11.23#ibcon#about to read 5, iclass 40, count 0 2006.229.05:34:11.23#ibcon#read 5, iclass 40, count 0 2006.229.05:34:11.23#ibcon#about to read 6, iclass 40, count 0 2006.229.05:34:11.23#ibcon#read 6, iclass 40, count 0 2006.229.05:34:11.23#ibcon#end of sib2, iclass 40, count 0 2006.229.05:34:11.23#ibcon#*after write, iclass 40, count 0 2006.229.05:34:11.23#ibcon#*before return 0, iclass 40, count 0 2006.229.05:34:11.23#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:11.23#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:11.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.05:34:11.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.05:34:11.23$vck44/va=7,5 2006.229.05:34:11.23#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.05:34:11.23#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.05:34:11.23#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:11.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:11.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:11.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:11.29#ibcon#enter wrdev, iclass 4, count 2 2006.229.05:34:11.29#ibcon#first serial, iclass 4, count 2 2006.229.05:34:11.29#ibcon#enter sib2, iclass 4, count 2 2006.229.05:34:11.29#ibcon#flushed, iclass 4, count 2 2006.229.05:34:11.29#ibcon#about to write, iclass 4, count 2 2006.229.05:34:11.29#ibcon#wrote, iclass 4, count 2 2006.229.05:34:11.29#ibcon#about to read 3, iclass 4, count 2 2006.229.05:34:11.31#ibcon#read 3, iclass 4, count 2 2006.229.05:34:11.31#ibcon#about to read 4, iclass 4, count 2 2006.229.05:34:11.31#ibcon#read 4, iclass 4, count 2 2006.229.05:34:11.31#ibcon#about to read 5, iclass 4, count 2 2006.229.05:34:11.31#ibcon#read 5, iclass 4, count 2 2006.229.05:34:11.31#ibcon#about to read 6, iclass 4, count 2 2006.229.05:34:11.31#ibcon#read 6, iclass 4, count 2 2006.229.05:34:11.31#ibcon#end of sib2, iclass 4, count 2 2006.229.05:34:11.31#ibcon#*mode == 0, iclass 4, count 2 2006.229.05:34:11.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.05:34:11.31#ibcon#[25=AT07-05\r\n] 2006.229.05:34:11.31#ibcon#*before write, iclass 4, count 2 2006.229.05:34:11.31#ibcon#enter sib2, iclass 4, count 2 2006.229.05:34:11.31#ibcon#flushed, iclass 4, count 2 2006.229.05:34:11.31#ibcon#about to write, iclass 4, count 2 2006.229.05:34:11.31#ibcon#wrote, iclass 4, count 2 2006.229.05:34:11.31#ibcon#about to read 3, iclass 4, count 2 2006.229.05:34:11.34#ibcon#read 3, iclass 4, count 2 2006.229.05:34:11.34#ibcon#about to read 4, iclass 4, count 2 2006.229.05:34:11.34#ibcon#read 4, iclass 4, count 2 2006.229.05:34:11.34#ibcon#about to read 5, iclass 4, count 2 2006.229.05:34:11.34#ibcon#read 5, iclass 4, count 2 2006.229.05:34:11.34#ibcon#about to read 6, iclass 4, count 2 2006.229.05:34:11.34#ibcon#read 6, iclass 4, count 2 2006.229.05:34:11.34#ibcon#end of sib2, iclass 4, count 2 2006.229.05:34:11.34#ibcon#*after write, iclass 4, count 2 2006.229.05:34:11.34#ibcon#*before return 0, iclass 4, count 2 2006.229.05:34:11.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:11.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:11.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.05:34:11.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:11.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:11.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:11.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:11.46#ibcon#enter wrdev, iclass 4, count 0 2006.229.05:34:11.46#ibcon#first serial, iclass 4, count 0 2006.229.05:34:11.46#ibcon#enter sib2, iclass 4, count 0 2006.229.05:34:11.46#ibcon#flushed, iclass 4, count 0 2006.229.05:34:11.46#ibcon#about to write, iclass 4, count 0 2006.229.05:34:11.46#ibcon#wrote, iclass 4, count 0 2006.229.05:34:11.46#ibcon#about to read 3, iclass 4, count 0 2006.229.05:34:11.48#ibcon#read 3, iclass 4, count 0 2006.229.05:34:11.48#ibcon#about to read 4, iclass 4, count 0 2006.229.05:34:11.48#ibcon#read 4, iclass 4, count 0 2006.229.05:34:11.48#ibcon#about to read 5, iclass 4, count 0 2006.229.05:34:11.48#ibcon#read 5, iclass 4, count 0 2006.229.05:34:11.48#ibcon#about to read 6, iclass 4, count 0 2006.229.05:34:11.48#ibcon#read 6, iclass 4, count 0 2006.229.05:34:11.48#ibcon#end of sib2, iclass 4, count 0 2006.229.05:34:11.48#ibcon#*mode == 0, iclass 4, count 0 2006.229.05:34:11.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.05:34:11.48#ibcon#[25=USB\r\n] 2006.229.05:34:11.48#ibcon#*before write, iclass 4, count 0 2006.229.05:34:11.48#ibcon#enter sib2, iclass 4, count 0 2006.229.05:34:11.48#ibcon#flushed, iclass 4, count 0 2006.229.05:34:11.48#ibcon#about to write, iclass 4, count 0 2006.229.05:34:11.48#ibcon#wrote, iclass 4, count 0 2006.229.05:34:11.48#ibcon#about to read 3, iclass 4, count 0 2006.229.05:34:11.51#ibcon#read 3, iclass 4, count 0 2006.229.05:34:11.51#ibcon#about to read 4, iclass 4, count 0 2006.229.05:34:11.51#ibcon#read 4, iclass 4, count 0 2006.229.05:34:11.51#ibcon#about to read 5, iclass 4, count 0 2006.229.05:34:11.51#ibcon#read 5, iclass 4, count 0 2006.229.05:34:11.51#ibcon#about to read 6, iclass 4, count 0 2006.229.05:34:11.51#ibcon#read 6, iclass 4, count 0 2006.229.05:34:11.51#ibcon#end of sib2, iclass 4, count 0 2006.229.05:34:11.51#ibcon#*after write, iclass 4, count 0 2006.229.05:34:11.51#ibcon#*before return 0, iclass 4, count 0 2006.229.05:34:11.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:11.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:11.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.05:34:11.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.05:34:11.51$vck44/valo=8,884.99 2006.229.05:34:11.51#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.05:34:11.51#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.05:34:11.51#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:11.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:11.51#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:11.51#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:11.51#ibcon#enter wrdev, iclass 6, count 0 2006.229.05:34:11.51#ibcon#first serial, iclass 6, count 0 2006.229.05:34:11.51#ibcon#enter sib2, iclass 6, count 0 2006.229.05:34:11.51#ibcon#flushed, iclass 6, count 0 2006.229.05:34:11.51#ibcon#about to write, iclass 6, count 0 2006.229.05:34:11.51#ibcon#wrote, iclass 6, count 0 2006.229.05:34:11.51#ibcon#about to read 3, iclass 6, count 0 2006.229.05:34:11.53#ibcon#read 3, iclass 6, count 0 2006.229.05:34:11.53#ibcon#about to read 4, iclass 6, count 0 2006.229.05:34:11.53#ibcon#read 4, iclass 6, count 0 2006.229.05:34:11.53#ibcon#about to read 5, iclass 6, count 0 2006.229.05:34:11.53#ibcon#read 5, iclass 6, count 0 2006.229.05:34:11.53#ibcon#about to read 6, iclass 6, count 0 2006.229.05:34:11.53#ibcon#read 6, iclass 6, count 0 2006.229.05:34:11.53#ibcon#end of sib2, iclass 6, count 0 2006.229.05:34:11.53#ibcon#*mode == 0, iclass 6, count 0 2006.229.05:34:11.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.05:34:11.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:34:11.53#ibcon#*before write, iclass 6, count 0 2006.229.05:34:11.53#ibcon#enter sib2, iclass 6, count 0 2006.229.05:34:11.53#ibcon#flushed, iclass 6, count 0 2006.229.05:34:11.53#ibcon#about to write, iclass 6, count 0 2006.229.05:34:11.53#ibcon#wrote, iclass 6, count 0 2006.229.05:34:11.53#ibcon#about to read 3, iclass 6, count 0 2006.229.05:34:11.57#ibcon#read 3, iclass 6, count 0 2006.229.05:34:11.57#ibcon#about to read 4, iclass 6, count 0 2006.229.05:34:11.57#ibcon#read 4, iclass 6, count 0 2006.229.05:34:11.57#ibcon#about to read 5, iclass 6, count 0 2006.229.05:34:11.57#ibcon#read 5, iclass 6, count 0 2006.229.05:34:11.57#ibcon#about to read 6, iclass 6, count 0 2006.229.05:34:11.57#ibcon#read 6, iclass 6, count 0 2006.229.05:34:11.57#ibcon#end of sib2, iclass 6, count 0 2006.229.05:34:11.57#ibcon#*after write, iclass 6, count 0 2006.229.05:34:11.57#ibcon#*before return 0, iclass 6, count 0 2006.229.05:34:11.57#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:11.57#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:11.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.05:34:11.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.05:34:11.57$vck44/va=8,6 2006.229.05:34:11.57#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.05:34:11.57#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.05:34:11.57#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:11.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:34:11.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:34:11.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:34:11.63#ibcon#enter wrdev, iclass 10, count 2 2006.229.05:34:11.63#ibcon#first serial, iclass 10, count 2 2006.229.05:34:11.63#ibcon#enter sib2, iclass 10, count 2 2006.229.05:34:11.63#ibcon#flushed, iclass 10, count 2 2006.229.05:34:11.63#ibcon#about to write, iclass 10, count 2 2006.229.05:34:11.63#ibcon#wrote, iclass 10, count 2 2006.229.05:34:11.63#ibcon#about to read 3, iclass 10, count 2 2006.229.05:34:11.65#ibcon#read 3, iclass 10, count 2 2006.229.05:34:11.65#ibcon#about to read 4, iclass 10, count 2 2006.229.05:34:11.65#ibcon#read 4, iclass 10, count 2 2006.229.05:34:11.65#ibcon#about to read 5, iclass 10, count 2 2006.229.05:34:11.65#ibcon#read 5, iclass 10, count 2 2006.229.05:34:11.65#ibcon#about to read 6, iclass 10, count 2 2006.229.05:34:11.65#ibcon#read 6, iclass 10, count 2 2006.229.05:34:11.65#ibcon#end of sib2, iclass 10, count 2 2006.229.05:34:11.65#ibcon#*mode == 0, iclass 10, count 2 2006.229.05:34:11.65#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.05:34:11.65#ibcon#[25=AT08-06\r\n] 2006.229.05:34:11.65#ibcon#*before write, iclass 10, count 2 2006.229.05:34:11.65#ibcon#enter sib2, iclass 10, count 2 2006.229.05:34:11.65#ibcon#flushed, iclass 10, count 2 2006.229.05:34:11.65#ibcon#about to write, iclass 10, count 2 2006.229.05:34:11.65#ibcon#wrote, iclass 10, count 2 2006.229.05:34:11.65#ibcon#about to read 3, iclass 10, count 2 2006.229.05:34:11.68#ibcon#read 3, iclass 10, count 2 2006.229.05:34:11.68#ibcon#about to read 4, iclass 10, count 2 2006.229.05:34:11.68#ibcon#read 4, iclass 10, count 2 2006.229.05:34:11.68#ibcon#about to read 5, iclass 10, count 2 2006.229.05:34:11.68#ibcon#read 5, iclass 10, count 2 2006.229.05:34:11.68#ibcon#about to read 6, iclass 10, count 2 2006.229.05:34:11.68#ibcon#read 6, iclass 10, count 2 2006.229.05:34:11.68#ibcon#end of sib2, iclass 10, count 2 2006.229.05:34:11.68#ibcon#*after write, iclass 10, count 2 2006.229.05:34:11.68#ibcon#*before return 0, iclass 10, count 2 2006.229.05:34:11.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:34:11.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.05:34:11.68#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.05:34:11.68#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:11.68#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:34:11.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:34:11.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:34:11.80#ibcon#enter wrdev, iclass 10, count 0 2006.229.05:34:11.80#ibcon#first serial, iclass 10, count 0 2006.229.05:34:11.80#ibcon#enter sib2, iclass 10, count 0 2006.229.05:34:11.80#ibcon#flushed, iclass 10, count 0 2006.229.05:34:11.80#ibcon#about to write, iclass 10, count 0 2006.229.05:34:11.80#ibcon#wrote, iclass 10, count 0 2006.229.05:34:11.80#ibcon#about to read 3, iclass 10, count 0 2006.229.05:34:11.82#ibcon#read 3, iclass 10, count 0 2006.229.05:34:11.82#ibcon#about to read 4, iclass 10, count 0 2006.229.05:34:11.82#ibcon#read 4, iclass 10, count 0 2006.229.05:34:11.82#ibcon#about to read 5, iclass 10, count 0 2006.229.05:34:11.82#ibcon#read 5, iclass 10, count 0 2006.229.05:34:11.82#ibcon#about to read 6, iclass 10, count 0 2006.229.05:34:11.82#ibcon#read 6, iclass 10, count 0 2006.229.05:34:11.82#ibcon#end of sib2, iclass 10, count 0 2006.229.05:34:11.82#ibcon#*mode == 0, iclass 10, count 0 2006.229.05:34:11.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.05:34:11.82#ibcon#[25=USB\r\n] 2006.229.05:34:11.82#ibcon#*before write, iclass 10, count 0 2006.229.05:34:11.82#ibcon#enter sib2, iclass 10, count 0 2006.229.05:34:11.82#ibcon#flushed, iclass 10, count 0 2006.229.05:34:11.82#ibcon#about to write, iclass 10, count 0 2006.229.05:34:11.82#ibcon#wrote, iclass 10, count 0 2006.229.05:34:11.82#ibcon#about to read 3, iclass 10, count 0 2006.229.05:34:11.85#ibcon#read 3, iclass 10, count 0 2006.229.05:34:11.85#ibcon#about to read 4, iclass 10, count 0 2006.229.05:34:11.85#ibcon#read 4, iclass 10, count 0 2006.229.05:34:11.85#ibcon#about to read 5, iclass 10, count 0 2006.229.05:34:11.85#ibcon#read 5, iclass 10, count 0 2006.229.05:34:11.85#ibcon#about to read 6, iclass 10, count 0 2006.229.05:34:11.85#ibcon#read 6, iclass 10, count 0 2006.229.05:34:11.85#ibcon#end of sib2, iclass 10, count 0 2006.229.05:34:11.85#ibcon#*after write, iclass 10, count 0 2006.229.05:34:11.85#ibcon#*before return 0, iclass 10, count 0 2006.229.05:34:11.85#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:34:11.85#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.05:34:11.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.05:34:11.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.05:34:11.85$vck44/vblo=1,629.99 2006.229.05:34:11.85#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.05:34:11.85#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.05:34:11.85#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:11.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:11.85#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:11.85#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:11.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.05:34:11.85#ibcon#first serial, iclass 12, count 0 2006.229.05:34:11.85#ibcon#enter sib2, iclass 12, count 0 2006.229.05:34:11.85#ibcon#flushed, iclass 12, count 0 2006.229.05:34:11.85#ibcon#about to write, iclass 12, count 0 2006.229.05:34:11.85#ibcon#wrote, iclass 12, count 0 2006.229.05:34:11.85#ibcon#about to read 3, iclass 12, count 0 2006.229.05:34:11.87#ibcon#read 3, iclass 12, count 0 2006.229.05:34:11.87#ibcon#about to read 4, iclass 12, count 0 2006.229.05:34:11.87#ibcon#read 4, iclass 12, count 0 2006.229.05:34:11.87#ibcon#about to read 5, iclass 12, count 0 2006.229.05:34:11.87#ibcon#read 5, iclass 12, count 0 2006.229.05:34:11.87#ibcon#about to read 6, iclass 12, count 0 2006.229.05:34:11.87#ibcon#read 6, iclass 12, count 0 2006.229.05:34:11.87#ibcon#end of sib2, iclass 12, count 0 2006.229.05:34:11.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.05:34:11.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.05:34:11.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:34:11.87#ibcon#*before write, iclass 12, count 0 2006.229.05:34:11.87#ibcon#enter sib2, iclass 12, count 0 2006.229.05:34:11.87#ibcon#flushed, iclass 12, count 0 2006.229.05:34:11.87#ibcon#about to write, iclass 12, count 0 2006.229.05:34:11.87#ibcon#wrote, iclass 12, count 0 2006.229.05:34:11.87#ibcon#about to read 3, iclass 12, count 0 2006.229.05:34:11.91#ibcon#read 3, iclass 12, count 0 2006.229.05:34:11.91#ibcon#about to read 4, iclass 12, count 0 2006.229.05:34:11.91#ibcon#read 4, iclass 12, count 0 2006.229.05:34:11.91#ibcon#about to read 5, iclass 12, count 0 2006.229.05:34:11.91#ibcon#read 5, iclass 12, count 0 2006.229.05:34:11.91#ibcon#about to read 6, iclass 12, count 0 2006.229.05:34:11.91#ibcon#read 6, iclass 12, count 0 2006.229.05:34:11.91#ibcon#end of sib2, iclass 12, count 0 2006.229.05:34:11.91#ibcon#*after write, iclass 12, count 0 2006.229.05:34:11.91#ibcon#*before return 0, iclass 12, count 0 2006.229.05:34:11.91#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:11.91#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.05:34:11.91#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.05:34:11.91#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.05:34:11.91$vck44/vb=1,4 2006.229.05:34:11.91#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.05:34:11.91#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.05:34:11.91#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:11.91#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:11.91#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:11.91#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:11.91#ibcon#enter wrdev, iclass 14, count 2 2006.229.05:34:11.91#ibcon#first serial, iclass 14, count 2 2006.229.05:34:11.91#ibcon#enter sib2, iclass 14, count 2 2006.229.05:34:11.91#ibcon#flushed, iclass 14, count 2 2006.229.05:34:11.91#ibcon#about to write, iclass 14, count 2 2006.229.05:34:11.91#ibcon#wrote, iclass 14, count 2 2006.229.05:34:11.91#ibcon#about to read 3, iclass 14, count 2 2006.229.05:34:11.93#ibcon#read 3, iclass 14, count 2 2006.229.05:34:11.93#ibcon#about to read 4, iclass 14, count 2 2006.229.05:34:11.93#ibcon#read 4, iclass 14, count 2 2006.229.05:34:11.93#ibcon#about to read 5, iclass 14, count 2 2006.229.05:34:11.93#ibcon#read 5, iclass 14, count 2 2006.229.05:34:11.93#ibcon#about to read 6, iclass 14, count 2 2006.229.05:34:11.93#ibcon#read 6, iclass 14, count 2 2006.229.05:34:11.93#ibcon#end of sib2, iclass 14, count 2 2006.229.05:34:11.93#ibcon#*mode == 0, iclass 14, count 2 2006.229.05:34:11.93#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.05:34:11.93#ibcon#[27=AT01-04\r\n] 2006.229.05:34:11.93#ibcon#*before write, iclass 14, count 2 2006.229.05:34:11.93#ibcon#enter sib2, iclass 14, count 2 2006.229.05:34:11.93#ibcon#flushed, iclass 14, count 2 2006.229.05:34:11.93#ibcon#about to write, iclass 14, count 2 2006.229.05:34:11.93#ibcon#wrote, iclass 14, count 2 2006.229.05:34:11.93#ibcon#about to read 3, iclass 14, count 2 2006.229.05:34:11.96#ibcon#read 3, iclass 14, count 2 2006.229.05:34:11.96#ibcon#about to read 4, iclass 14, count 2 2006.229.05:34:11.96#ibcon#read 4, iclass 14, count 2 2006.229.05:34:11.96#ibcon#about to read 5, iclass 14, count 2 2006.229.05:34:11.96#ibcon#read 5, iclass 14, count 2 2006.229.05:34:11.96#ibcon#about to read 6, iclass 14, count 2 2006.229.05:34:11.96#ibcon#read 6, iclass 14, count 2 2006.229.05:34:11.96#ibcon#end of sib2, iclass 14, count 2 2006.229.05:34:11.96#ibcon#*after write, iclass 14, count 2 2006.229.05:34:11.96#ibcon#*before return 0, iclass 14, count 2 2006.229.05:34:11.96#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:11.96#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.05:34:11.96#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.05:34:11.96#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:11.96#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:12.08#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:12.08#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:12.08#ibcon#enter wrdev, iclass 14, count 0 2006.229.05:34:12.08#ibcon#first serial, iclass 14, count 0 2006.229.05:34:12.08#ibcon#enter sib2, iclass 14, count 0 2006.229.05:34:12.08#ibcon#flushed, iclass 14, count 0 2006.229.05:34:12.08#ibcon#about to write, iclass 14, count 0 2006.229.05:34:12.08#ibcon#wrote, iclass 14, count 0 2006.229.05:34:12.08#ibcon#about to read 3, iclass 14, count 0 2006.229.05:34:12.10#ibcon#read 3, iclass 14, count 0 2006.229.05:34:12.10#ibcon#about to read 4, iclass 14, count 0 2006.229.05:34:12.10#ibcon#read 4, iclass 14, count 0 2006.229.05:34:12.10#ibcon#about to read 5, iclass 14, count 0 2006.229.05:34:12.10#ibcon#read 5, iclass 14, count 0 2006.229.05:34:12.10#ibcon#about to read 6, iclass 14, count 0 2006.229.05:34:12.10#ibcon#read 6, iclass 14, count 0 2006.229.05:34:12.10#ibcon#end of sib2, iclass 14, count 0 2006.229.05:34:12.10#ibcon#*mode == 0, iclass 14, count 0 2006.229.05:34:12.10#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.05:34:12.10#ibcon#[27=USB\r\n] 2006.229.05:34:12.10#ibcon#*before write, iclass 14, count 0 2006.229.05:34:12.10#ibcon#enter sib2, iclass 14, count 0 2006.229.05:34:12.10#ibcon#flushed, iclass 14, count 0 2006.229.05:34:12.10#ibcon#about to write, iclass 14, count 0 2006.229.05:34:12.10#ibcon#wrote, iclass 14, count 0 2006.229.05:34:12.10#ibcon#about to read 3, iclass 14, count 0 2006.229.05:34:12.13#ibcon#read 3, iclass 14, count 0 2006.229.05:34:12.13#ibcon#about to read 4, iclass 14, count 0 2006.229.05:34:12.13#ibcon#read 4, iclass 14, count 0 2006.229.05:34:12.13#ibcon#about to read 5, iclass 14, count 0 2006.229.05:34:12.13#ibcon#read 5, iclass 14, count 0 2006.229.05:34:12.13#ibcon#about to read 6, iclass 14, count 0 2006.229.05:34:12.13#ibcon#read 6, iclass 14, count 0 2006.229.05:34:12.13#ibcon#end of sib2, iclass 14, count 0 2006.229.05:34:12.13#ibcon#*after write, iclass 14, count 0 2006.229.05:34:12.13#ibcon#*before return 0, iclass 14, count 0 2006.229.05:34:12.13#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:12.13#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.05:34:12.13#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.05:34:12.13#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.05:34:12.13$vck44/vblo=2,634.99 2006.229.05:34:12.13#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.05:34:12.13#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.05:34:12.13#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:12.13#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:12.13#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:12.13#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:12.13#ibcon#enter wrdev, iclass 16, count 0 2006.229.05:34:12.13#ibcon#first serial, iclass 16, count 0 2006.229.05:34:12.13#ibcon#enter sib2, iclass 16, count 0 2006.229.05:34:12.13#ibcon#flushed, iclass 16, count 0 2006.229.05:34:12.13#ibcon#about to write, iclass 16, count 0 2006.229.05:34:12.13#ibcon#wrote, iclass 16, count 0 2006.229.05:34:12.13#ibcon#about to read 3, iclass 16, count 0 2006.229.05:34:12.15#ibcon#read 3, iclass 16, count 0 2006.229.05:34:12.15#ibcon#about to read 4, iclass 16, count 0 2006.229.05:34:12.15#ibcon#read 4, iclass 16, count 0 2006.229.05:34:12.15#ibcon#about to read 5, iclass 16, count 0 2006.229.05:34:12.15#ibcon#read 5, iclass 16, count 0 2006.229.05:34:12.15#ibcon#about to read 6, iclass 16, count 0 2006.229.05:34:12.15#ibcon#read 6, iclass 16, count 0 2006.229.05:34:12.15#ibcon#end of sib2, iclass 16, count 0 2006.229.05:34:12.15#ibcon#*mode == 0, iclass 16, count 0 2006.229.05:34:12.15#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.05:34:12.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:34:12.15#ibcon#*before write, iclass 16, count 0 2006.229.05:34:12.15#ibcon#enter sib2, iclass 16, count 0 2006.229.05:34:12.15#ibcon#flushed, iclass 16, count 0 2006.229.05:34:12.15#ibcon#about to write, iclass 16, count 0 2006.229.05:34:12.15#ibcon#wrote, iclass 16, count 0 2006.229.05:34:12.15#ibcon#about to read 3, iclass 16, count 0 2006.229.05:34:12.19#ibcon#read 3, iclass 16, count 0 2006.229.05:34:12.19#ibcon#about to read 4, iclass 16, count 0 2006.229.05:34:12.19#ibcon#read 4, iclass 16, count 0 2006.229.05:34:12.19#ibcon#about to read 5, iclass 16, count 0 2006.229.05:34:12.19#ibcon#read 5, iclass 16, count 0 2006.229.05:34:12.19#ibcon#about to read 6, iclass 16, count 0 2006.229.05:34:12.19#ibcon#read 6, iclass 16, count 0 2006.229.05:34:12.19#ibcon#end of sib2, iclass 16, count 0 2006.229.05:34:12.19#ibcon#*after write, iclass 16, count 0 2006.229.05:34:12.19#ibcon#*before return 0, iclass 16, count 0 2006.229.05:34:12.19#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:12.19#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:34:12.19#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.05:34:12.19#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.05:34:12.19$vck44/vb=2,4 2006.229.05:34:12.19#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.05:34:12.19#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.05:34:12.19#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:12.19#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:12.25#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:12.25#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:12.25#ibcon#enter wrdev, iclass 18, count 2 2006.229.05:34:12.25#ibcon#first serial, iclass 18, count 2 2006.229.05:34:12.25#ibcon#enter sib2, iclass 18, count 2 2006.229.05:34:12.25#ibcon#flushed, iclass 18, count 2 2006.229.05:34:12.25#ibcon#about to write, iclass 18, count 2 2006.229.05:34:12.25#ibcon#wrote, iclass 18, count 2 2006.229.05:34:12.25#ibcon#about to read 3, iclass 18, count 2 2006.229.05:34:12.27#ibcon#read 3, iclass 18, count 2 2006.229.05:34:12.27#ibcon#about to read 4, iclass 18, count 2 2006.229.05:34:12.27#ibcon#read 4, iclass 18, count 2 2006.229.05:34:12.27#ibcon#about to read 5, iclass 18, count 2 2006.229.05:34:12.27#ibcon#read 5, iclass 18, count 2 2006.229.05:34:12.27#ibcon#about to read 6, iclass 18, count 2 2006.229.05:34:12.27#ibcon#read 6, iclass 18, count 2 2006.229.05:34:12.27#ibcon#end of sib2, iclass 18, count 2 2006.229.05:34:12.27#ibcon#*mode == 0, iclass 18, count 2 2006.229.05:34:12.27#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.05:34:12.27#ibcon#[27=AT02-04\r\n] 2006.229.05:34:12.27#ibcon#*before write, iclass 18, count 2 2006.229.05:34:12.27#ibcon#enter sib2, iclass 18, count 2 2006.229.05:34:12.27#ibcon#flushed, iclass 18, count 2 2006.229.05:34:12.27#ibcon#about to write, iclass 18, count 2 2006.229.05:34:12.27#ibcon#wrote, iclass 18, count 2 2006.229.05:34:12.27#ibcon#about to read 3, iclass 18, count 2 2006.229.05:34:12.30#ibcon#read 3, iclass 18, count 2 2006.229.05:34:12.30#ibcon#about to read 4, iclass 18, count 2 2006.229.05:34:12.30#ibcon#read 4, iclass 18, count 2 2006.229.05:34:12.30#ibcon#about to read 5, iclass 18, count 2 2006.229.05:34:12.30#ibcon#read 5, iclass 18, count 2 2006.229.05:34:12.30#ibcon#about to read 6, iclass 18, count 2 2006.229.05:34:12.30#ibcon#read 6, iclass 18, count 2 2006.229.05:34:12.30#ibcon#end of sib2, iclass 18, count 2 2006.229.05:34:12.30#ibcon#*after write, iclass 18, count 2 2006.229.05:34:12.30#ibcon#*before return 0, iclass 18, count 2 2006.229.05:34:12.30#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:12.30#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.05:34:12.30#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.05:34:12.30#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:12.30#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:12.42#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:12.42#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:12.42#ibcon#enter wrdev, iclass 18, count 0 2006.229.05:34:12.42#ibcon#first serial, iclass 18, count 0 2006.229.05:34:12.42#ibcon#enter sib2, iclass 18, count 0 2006.229.05:34:12.42#ibcon#flushed, iclass 18, count 0 2006.229.05:34:12.42#ibcon#about to write, iclass 18, count 0 2006.229.05:34:12.42#ibcon#wrote, iclass 18, count 0 2006.229.05:34:12.42#ibcon#about to read 3, iclass 18, count 0 2006.229.05:34:12.44#ibcon#read 3, iclass 18, count 0 2006.229.05:34:12.44#ibcon#about to read 4, iclass 18, count 0 2006.229.05:34:12.44#ibcon#read 4, iclass 18, count 0 2006.229.05:34:12.44#ibcon#about to read 5, iclass 18, count 0 2006.229.05:34:12.44#ibcon#read 5, iclass 18, count 0 2006.229.05:34:12.44#ibcon#about to read 6, iclass 18, count 0 2006.229.05:34:12.44#ibcon#read 6, iclass 18, count 0 2006.229.05:34:12.44#ibcon#end of sib2, iclass 18, count 0 2006.229.05:34:12.44#ibcon#*mode == 0, iclass 18, count 0 2006.229.05:34:12.44#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.05:34:12.44#ibcon#[27=USB\r\n] 2006.229.05:34:12.44#ibcon#*before write, iclass 18, count 0 2006.229.05:34:12.44#ibcon#enter sib2, iclass 18, count 0 2006.229.05:34:12.44#ibcon#flushed, iclass 18, count 0 2006.229.05:34:12.44#ibcon#about to write, iclass 18, count 0 2006.229.05:34:12.44#ibcon#wrote, iclass 18, count 0 2006.229.05:34:12.44#ibcon#about to read 3, iclass 18, count 0 2006.229.05:34:12.47#ibcon#read 3, iclass 18, count 0 2006.229.05:34:12.47#ibcon#about to read 4, iclass 18, count 0 2006.229.05:34:12.47#ibcon#read 4, iclass 18, count 0 2006.229.05:34:12.47#ibcon#about to read 5, iclass 18, count 0 2006.229.05:34:12.47#ibcon#read 5, iclass 18, count 0 2006.229.05:34:12.47#ibcon#about to read 6, iclass 18, count 0 2006.229.05:34:12.47#ibcon#read 6, iclass 18, count 0 2006.229.05:34:12.47#ibcon#end of sib2, iclass 18, count 0 2006.229.05:34:12.47#ibcon#*after write, iclass 18, count 0 2006.229.05:34:12.47#ibcon#*before return 0, iclass 18, count 0 2006.229.05:34:12.47#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:12.47#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.05:34:12.47#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.05:34:12.47#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.05:34:12.47$vck44/vblo=3,649.99 2006.229.05:34:12.47#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.05:34:12.47#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.05:34:12.47#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:12.47#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:34:12.47#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:34:12.47#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:34:12.47#ibcon#enter wrdev, iclass 20, count 0 2006.229.05:34:12.47#ibcon#first serial, iclass 20, count 0 2006.229.05:34:12.47#ibcon#enter sib2, iclass 20, count 0 2006.229.05:34:12.47#ibcon#flushed, iclass 20, count 0 2006.229.05:34:12.47#ibcon#about to write, iclass 20, count 0 2006.229.05:34:12.47#ibcon#wrote, iclass 20, count 0 2006.229.05:34:12.47#ibcon#about to read 3, iclass 20, count 0 2006.229.05:34:12.49#ibcon#read 3, iclass 20, count 0 2006.229.05:34:12.49#ibcon#about to read 4, iclass 20, count 0 2006.229.05:34:12.49#ibcon#read 4, iclass 20, count 0 2006.229.05:34:12.49#ibcon#about to read 5, iclass 20, count 0 2006.229.05:34:12.49#ibcon#read 5, iclass 20, count 0 2006.229.05:34:12.49#ibcon#about to read 6, iclass 20, count 0 2006.229.05:34:12.49#ibcon#read 6, iclass 20, count 0 2006.229.05:34:12.49#ibcon#end of sib2, iclass 20, count 0 2006.229.05:34:12.49#ibcon#*mode == 0, iclass 20, count 0 2006.229.05:34:12.49#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.05:34:12.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:34:12.49#ibcon#*before write, iclass 20, count 0 2006.229.05:34:12.49#ibcon#enter sib2, iclass 20, count 0 2006.229.05:34:12.49#ibcon#flushed, iclass 20, count 0 2006.229.05:34:12.49#ibcon#about to write, iclass 20, count 0 2006.229.05:34:12.49#ibcon#wrote, iclass 20, count 0 2006.229.05:34:12.49#ibcon#about to read 3, iclass 20, count 0 2006.229.05:34:12.53#ibcon#read 3, iclass 20, count 0 2006.229.05:34:12.53#ibcon#about to read 4, iclass 20, count 0 2006.229.05:34:12.53#ibcon#read 4, iclass 20, count 0 2006.229.05:34:12.53#ibcon#about to read 5, iclass 20, count 0 2006.229.05:34:12.53#ibcon#read 5, iclass 20, count 0 2006.229.05:34:12.53#ibcon#about to read 6, iclass 20, count 0 2006.229.05:34:12.53#ibcon#read 6, iclass 20, count 0 2006.229.05:34:12.53#ibcon#end of sib2, iclass 20, count 0 2006.229.05:34:12.53#ibcon#*after write, iclass 20, count 0 2006.229.05:34:12.53#ibcon#*before return 0, iclass 20, count 0 2006.229.05:34:12.53#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:34:12.53#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.05:34:12.53#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.05:34:12.53#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.05:34:12.53$vck44/vb=3,4 2006.229.05:34:12.53#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.05:34:12.53#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.05:34:12.53#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:12.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:34:12.59#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:34:12.59#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:34:12.59#ibcon#enter wrdev, iclass 22, count 2 2006.229.05:34:12.59#ibcon#first serial, iclass 22, count 2 2006.229.05:34:12.59#ibcon#enter sib2, iclass 22, count 2 2006.229.05:34:12.59#ibcon#flushed, iclass 22, count 2 2006.229.05:34:12.59#ibcon#about to write, iclass 22, count 2 2006.229.05:34:12.59#ibcon#wrote, iclass 22, count 2 2006.229.05:34:12.59#ibcon#about to read 3, iclass 22, count 2 2006.229.05:34:12.61#ibcon#read 3, iclass 22, count 2 2006.229.05:34:12.61#ibcon#about to read 4, iclass 22, count 2 2006.229.05:34:12.61#ibcon#read 4, iclass 22, count 2 2006.229.05:34:12.61#ibcon#about to read 5, iclass 22, count 2 2006.229.05:34:12.61#ibcon#read 5, iclass 22, count 2 2006.229.05:34:12.61#ibcon#about to read 6, iclass 22, count 2 2006.229.05:34:12.61#ibcon#read 6, iclass 22, count 2 2006.229.05:34:12.61#ibcon#end of sib2, iclass 22, count 2 2006.229.05:34:12.61#ibcon#*mode == 0, iclass 22, count 2 2006.229.05:34:12.61#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.05:34:12.61#ibcon#[27=AT03-04\r\n] 2006.229.05:34:12.61#ibcon#*before write, iclass 22, count 2 2006.229.05:34:12.61#ibcon#enter sib2, iclass 22, count 2 2006.229.05:34:12.61#ibcon#flushed, iclass 22, count 2 2006.229.05:34:12.61#ibcon#about to write, iclass 22, count 2 2006.229.05:34:12.61#ibcon#wrote, iclass 22, count 2 2006.229.05:34:12.61#ibcon#about to read 3, iclass 22, count 2 2006.229.05:34:12.64#ibcon#read 3, iclass 22, count 2 2006.229.05:34:12.64#ibcon#about to read 4, iclass 22, count 2 2006.229.05:34:12.64#ibcon#read 4, iclass 22, count 2 2006.229.05:34:12.64#ibcon#about to read 5, iclass 22, count 2 2006.229.05:34:12.64#ibcon#read 5, iclass 22, count 2 2006.229.05:34:12.64#ibcon#about to read 6, iclass 22, count 2 2006.229.05:34:12.64#ibcon#read 6, iclass 22, count 2 2006.229.05:34:12.64#ibcon#end of sib2, iclass 22, count 2 2006.229.05:34:12.64#ibcon#*after write, iclass 22, count 2 2006.229.05:34:12.64#ibcon#*before return 0, iclass 22, count 2 2006.229.05:34:12.64#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:34:12.64#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.05:34:12.64#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.05:34:12.64#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:12.64#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:34:12.76#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:34:12.76#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:34:12.76#ibcon#enter wrdev, iclass 22, count 0 2006.229.05:34:12.76#ibcon#first serial, iclass 22, count 0 2006.229.05:34:12.76#ibcon#enter sib2, iclass 22, count 0 2006.229.05:34:12.76#ibcon#flushed, iclass 22, count 0 2006.229.05:34:12.76#ibcon#about to write, iclass 22, count 0 2006.229.05:34:12.76#ibcon#wrote, iclass 22, count 0 2006.229.05:34:12.76#ibcon#about to read 3, iclass 22, count 0 2006.229.05:34:12.78#ibcon#read 3, iclass 22, count 0 2006.229.05:34:12.78#ibcon#about to read 4, iclass 22, count 0 2006.229.05:34:12.78#ibcon#read 4, iclass 22, count 0 2006.229.05:34:12.78#ibcon#about to read 5, iclass 22, count 0 2006.229.05:34:12.78#ibcon#read 5, iclass 22, count 0 2006.229.05:34:12.78#ibcon#about to read 6, iclass 22, count 0 2006.229.05:34:12.78#ibcon#read 6, iclass 22, count 0 2006.229.05:34:12.78#ibcon#end of sib2, iclass 22, count 0 2006.229.05:34:12.78#ibcon#*mode == 0, iclass 22, count 0 2006.229.05:34:12.78#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.05:34:12.78#ibcon#[27=USB\r\n] 2006.229.05:34:12.78#ibcon#*before write, iclass 22, count 0 2006.229.05:34:12.78#ibcon#enter sib2, iclass 22, count 0 2006.229.05:34:12.78#ibcon#flushed, iclass 22, count 0 2006.229.05:34:12.78#ibcon#about to write, iclass 22, count 0 2006.229.05:34:12.78#ibcon#wrote, iclass 22, count 0 2006.229.05:34:12.78#ibcon#about to read 3, iclass 22, count 0 2006.229.05:34:12.81#ibcon#read 3, iclass 22, count 0 2006.229.05:34:12.81#ibcon#about to read 4, iclass 22, count 0 2006.229.05:34:12.81#ibcon#read 4, iclass 22, count 0 2006.229.05:34:12.81#ibcon#about to read 5, iclass 22, count 0 2006.229.05:34:12.81#ibcon#read 5, iclass 22, count 0 2006.229.05:34:12.81#ibcon#about to read 6, iclass 22, count 0 2006.229.05:34:12.81#ibcon#read 6, iclass 22, count 0 2006.229.05:34:12.81#ibcon#end of sib2, iclass 22, count 0 2006.229.05:34:12.81#ibcon#*after write, iclass 22, count 0 2006.229.05:34:12.81#ibcon#*before return 0, iclass 22, count 0 2006.229.05:34:12.81#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:34:12.81#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.05:34:12.81#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.05:34:12.81#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.05:34:12.81$vck44/vblo=4,679.99 2006.229.05:34:12.81#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.05:34:12.81#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.05:34:12.81#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:12.81#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:34:12.81#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:34:12.81#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:34:12.81#ibcon#enter wrdev, iclass 24, count 0 2006.229.05:34:12.81#ibcon#first serial, iclass 24, count 0 2006.229.05:34:12.81#ibcon#enter sib2, iclass 24, count 0 2006.229.05:34:12.81#ibcon#flushed, iclass 24, count 0 2006.229.05:34:12.81#ibcon#about to write, iclass 24, count 0 2006.229.05:34:12.81#ibcon#wrote, iclass 24, count 0 2006.229.05:34:12.81#ibcon#about to read 3, iclass 24, count 0 2006.229.05:34:12.83#ibcon#read 3, iclass 24, count 0 2006.229.05:34:12.83#ibcon#about to read 4, iclass 24, count 0 2006.229.05:34:12.83#ibcon#read 4, iclass 24, count 0 2006.229.05:34:12.83#ibcon#about to read 5, iclass 24, count 0 2006.229.05:34:12.83#ibcon#read 5, iclass 24, count 0 2006.229.05:34:12.83#ibcon#about to read 6, iclass 24, count 0 2006.229.05:34:12.83#ibcon#read 6, iclass 24, count 0 2006.229.05:34:12.83#ibcon#end of sib2, iclass 24, count 0 2006.229.05:34:12.83#ibcon#*mode == 0, iclass 24, count 0 2006.229.05:34:12.83#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.05:34:12.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:34:12.83#ibcon#*before write, iclass 24, count 0 2006.229.05:34:12.83#ibcon#enter sib2, iclass 24, count 0 2006.229.05:34:12.83#ibcon#flushed, iclass 24, count 0 2006.229.05:34:12.83#ibcon#about to write, iclass 24, count 0 2006.229.05:34:12.83#ibcon#wrote, iclass 24, count 0 2006.229.05:34:12.83#ibcon#about to read 3, iclass 24, count 0 2006.229.05:34:12.87#ibcon#read 3, iclass 24, count 0 2006.229.05:34:12.87#ibcon#about to read 4, iclass 24, count 0 2006.229.05:34:12.87#ibcon#read 4, iclass 24, count 0 2006.229.05:34:12.87#ibcon#about to read 5, iclass 24, count 0 2006.229.05:34:12.87#ibcon#read 5, iclass 24, count 0 2006.229.05:34:12.87#ibcon#about to read 6, iclass 24, count 0 2006.229.05:34:12.87#ibcon#read 6, iclass 24, count 0 2006.229.05:34:12.87#ibcon#end of sib2, iclass 24, count 0 2006.229.05:34:12.87#ibcon#*after write, iclass 24, count 0 2006.229.05:34:12.87#ibcon#*before return 0, iclass 24, count 0 2006.229.05:34:12.87#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:34:12.87#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.05:34:12.87#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.05:34:12.87#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.05:34:12.87$vck44/vb=4,4 2006.229.05:34:12.87#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.05:34:12.87#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.05:34:12.87#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:12.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:12.93#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:12.93#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:12.93#ibcon#enter wrdev, iclass 26, count 2 2006.229.05:34:12.93#ibcon#first serial, iclass 26, count 2 2006.229.05:34:12.93#ibcon#enter sib2, iclass 26, count 2 2006.229.05:34:12.93#ibcon#flushed, iclass 26, count 2 2006.229.05:34:12.93#ibcon#about to write, iclass 26, count 2 2006.229.05:34:12.93#ibcon#wrote, iclass 26, count 2 2006.229.05:34:12.93#ibcon#about to read 3, iclass 26, count 2 2006.229.05:34:12.95#ibcon#read 3, iclass 26, count 2 2006.229.05:34:12.95#ibcon#about to read 4, iclass 26, count 2 2006.229.05:34:12.95#ibcon#read 4, iclass 26, count 2 2006.229.05:34:12.95#ibcon#about to read 5, iclass 26, count 2 2006.229.05:34:12.95#ibcon#read 5, iclass 26, count 2 2006.229.05:34:12.95#ibcon#about to read 6, iclass 26, count 2 2006.229.05:34:12.95#ibcon#read 6, iclass 26, count 2 2006.229.05:34:12.95#ibcon#end of sib2, iclass 26, count 2 2006.229.05:34:12.95#ibcon#*mode == 0, iclass 26, count 2 2006.229.05:34:12.95#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.05:34:12.95#ibcon#[27=AT04-04\r\n] 2006.229.05:34:12.95#ibcon#*before write, iclass 26, count 2 2006.229.05:34:12.95#ibcon#enter sib2, iclass 26, count 2 2006.229.05:34:12.95#ibcon#flushed, iclass 26, count 2 2006.229.05:34:12.95#ibcon#about to write, iclass 26, count 2 2006.229.05:34:12.95#ibcon#wrote, iclass 26, count 2 2006.229.05:34:12.95#ibcon#about to read 3, iclass 26, count 2 2006.229.05:34:12.98#ibcon#read 3, iclass 26, count 2 2006.229.05:34:12.98#ibcon#about to read 4, iclass 26, count 2 2006.229.05:34:12.98#ibcon#read 4, iclass 26, count 2 2006.229.05:34:12.98#ibcon#about to read 5, iclass 26, count 2 2006.229.05:34:12.98#ibcon#read 5, iclass 26, count 2 2006.229.05:34:12.98#ibcon#about to read 6, iclass 26, count 2 2006.229.05:34:12.98#ibcon#read 6, iclass 26, count 2 2006.229.05:34:12.98#ibcon#end of sib2, iclass 26, count 2 2006.229.05:34:12.98#ibcon#*after write, iclass 26, count 2 2006.229.05:34:12.98#ibcon#*before return 0, iclass 26, count 2 2006.229.05:34:12.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:12.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.05:34:12.98#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.05:34:12.98#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:12.98#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:13.10#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:13.10#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:13.10#ibcon#enter wrdev, iclass 26, count 0 2006.229.05:34:13.10#ibcon#first serial, iclass 26, count 0 2006.229.05:34:13.10#ibcon#enter sib2, iclass 26, count 0 2006.229.05:34:13.10#ibcon#flushed, iclass 26, count 0 2006.229.05:34:13.10#ibcon#about to write, iclass 26, count 0 2006.229.05:34:13.10#ibcon#wrote, iclass 26, count 0 2006.229.05:34:13.10#ibcon#about to read 3, iclass 26, count 0 2006.229.05:34:13.12#ibcon#read 3, iclass 26, count 0 2006.229.05:34:13.12#ibcon#about to read 4, iclass 26, count 0 2006.229.05:34:13.12#ibcon#read 4, iclass 26, count 0 2006.229.05:34:13.12#ibcon#about to read 5, iclass 26, count 0 2006.229.05:34:13.12#ibcon#read 5, iclass 26, count 0 2006.229.05:34:13.12#ibcon#about to read 6, iclass 26, count 0 2006.229.05:34:13.12#ibcon#read 6, iclass 26, count 0 2006.229.05:34:13.12#ibcon#end of sib2, iclass 26, count 0 2006.229.05:34:13.12#ibcon#*mode == 0, iclass 26, count 0 2006.229.05:34:13.12#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.05:34:13.12#ibcon#[27=USB\r\n] 2006.229.05:34:13.12#ibcon#*before write, iclass 26, count 0 2006.229.05:34:13.12#ibcon#enter sib2, iclass 26, count 0 2006.229.05:34:13.12#ibcon#flushed, iclass 26, count 0 2006.229.05:34:13.12#ibcon#about to write, iclass 26, count 0 2006.229.05:34:13.12#ibcon#wrote, iclass 26, count 0 2006.229.05:34:13.12#ibcon#about to read 3, iclass 26, count 0 2006.229.05:34:13.15#ibcon#read 3, iclass 26, count 0 2006.229.05:34:13.15#ibcon#about to read 4, iclass 26, count 0 2006.229.05:34:13.15#ibcon#read 4, iclass 26, count 0 2006.229.05:34:13.15#ibcon#about to read 5, iclass 26, count 0 2006.229.05:34:13.15#ibcon#read 5, iclass 26, count 0 2006.229.05:34:13.15#ibcon#about to read 6, iclass 26, count 0 2006.229.05:34:13.15#ibcon#read 6, iclass 26, count 0 2006.229.05:34:13.15#ibcon#end of sib2, iclass 26, count 0 2006.229.05:34:13.15#ibcon#*after write, iclass 26, count 0 2006.229.05:34:13.15#ibcon#*before return 0, iclass 26, count 0 2006.229.05:34:13.15#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:13.15#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.05:34:13.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.05:34:13.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.05:34:13.15$vck44/vblo=5,709.99 2006.229.05:34:13.15#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.05:34:13.15#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.05:34:13.15#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:13.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:13.15#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:13.15#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:13.15#ibcon#enter wrdev, iclass 28, count 0 2006.229.05:34:13.15#ibcon#first serial, iclass 28, count 0 2006.229.05:34:13.15#ibcon#enter sib2, iclass 28, count 0 2006.229.05:34:13.15#ibcon#flushed, iclass 28, count 0 2006.229.05:34:13.15#ibcon#about to write, iclass 28, count 0 2006.229.05:34:13.15#ibcon#wrote, iclass 28, count 0 2006.229.05:34:13.15#ibcon#about to read 3, iclass 28, count 0 2006.229.05:34:13.17#ibcon#read 3, iclass 28, count 0 2006.229.05:34:13.17#ibcon#about to read 4, iclass 28, count 0 2006.229.05:34:13.17#ibcon#read 4, iclass 28, count 0 2006.229.05:34:13.17#ibcon#about to read 5, iclass 28, count 0 2006.229.05:34:13.17#ibcon#read 5, iclass 28, count 0 2006.229.05:34:13.17#ibcon#about to read 6, iclass 28, count 0 2006.229.05:34:13.17#ibcon#read 6, iclass 28, count 0 2006.229.05:34:13.17#ibcon#end of sib2, iclass 28, count 0 2006.229.05:34:13.17#ibcon#*mode == 0, iclass 28, count 0 2006.229.05:34:13.17#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.05:34:13.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:34:13.17#ibcon#*before write, iclass 28, count 0 2006.229.05:34:13.17#ibcon#enter sib2, iclass 28, count 0 2006.229.05:34:13.17#ibcon#flushed, iclass 28, count 0 2006.229.05:34:13.17#ibcon#about to write, iclass 28, count 0 2006.229.05:34:13.17#ibcon#wrote, iclass 28, count 0 2006.229.05:34:13.17#ibcon#about to read 3, iclass 28, count 0 2006.229.05:34:13.21#ibcon#read 3, iclass 28, count 0 2006.229.05:34:13.21#ibcon#about to read 4, iclass 28, count 0 2006.229.05:34:13.21#ibcon#read 4, iclass 28, count 0 2006.229.05:34:13.21#ibcon#about to read 5, iclass 28, count 0 2006.229.05:34:13.21#ibcon#read 5, iclass 28, count 0 2006.229.05:34:13.21#ibcon#about to read 6, iclass 28, count 0 2006.229.05:34:13.21#ibcon#read 6, iclass 28, count 0 2006.229.05:34:13.21#ibcon#end of sib2, iclass 28, count 0 2006.229.05:34:13.21#ibcon#*after write, iclass 28, count 0 2006.229.05:34:13.21#ibcon#*before return 0, iclass 28, count 0 2006.229.05:34:13.21#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:13.21#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.05:34:13.21#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.05:34:13.21#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.05:34:13.21$vck44/vb=5,4 2006.229.05:34:13.21#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.05:34:13.21#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.05:34:13.21#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:13.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:13.27#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:13.27#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:13.27#ibcon#enter wrdev, iclass 30, count 2 2006.229.05:34:13.27#ibcon#first serial, iclass 30, count 2 2006.229.05:34:13.27#ibcon#enter sib2, iclass 30, count 2 2006.229.05:34:13.27#ibcon#flushed, iclass 30, count 2 2006.229.05:34:13.27#ibcon#about to write, iclass 30, count 2 2006.229.05:34:13.27#ibcon#wrote, iclass 30, count 2 2006.229.05:34:13.27#ibcon#about to read 3, iclass 30, count 2 2006.229.05:34:13.29#ibcon#read 3, iclass 30, count 2 2006.229.05:34:13.29#ibcon#about to read 4, iclass 30, count 2 2006.229.05:34:13.29#ibcon#read 4, iclass 30, count 2 2006.229.05:34:13.29#ibcon#about to read 5, iclass 30, count 2 2006.229.05:34:13.29#ibcon#read 5, iclass 30, count 2 2006.229.05:34:13.29#ibcon#about to read 6, iclass 30, count 2 2006.229.05:34:13.29#ibcon#read 6, iclass 30, count 2 2006.229.05:34:13.29#ibcon#end of sib2, iclass 30, count 2 2006.229.05:34:13.29#ibcon#*mode == 0, iclass 30, count 2 2006.229.05:34:13.29#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.05:34:13.29#ibcon#[27=AT05-04\r\n] 2006.229.05:34:13.29#ibcon#*before write, iclass 30, count 2 2006.229.05:34:13.29#ibcon#enter sib2, iclass 30, count 2 2006.229.05:34:13.29#ibcon#flushed, iclass 30, count 2 2006.229.05:34:13.29#ibcon#about to write, iclass 30, count 2 2006.229.05:34:13.29#ibcon#wrote, iclass 30, count 2 2006.229.05:34:13.29#ibcon#about to read 3, iclass 30, count 2 2006.229.05:34:13.32#ibcon#read 3, iclass 30, count 2 2006.229.05:34:13.32#ibcon#about to read 4, iclass 30, count 2 2006.229.05:34:13.32#ibcon#read 4, iclass 30, count 2 2006.229.05:34:13.32#ibcon#about to read 5, iclass 30, count 2 2006.229.05:34:13.32#ibcon#read 5, iclass 30, count 2 2006.229.05:34:13.32#ibcon#about to read 6, iclass 30, count 2 2006.229.05:34:13.32#ibcon#read 6, iclass 30, count 2 2006.229.05:34:13.32#ibcon#end of sib2, iclass 30, count 2 2006.229.05:34:13.32#ibcon#*after write, iclass 30, count 2 2006.229.05:34:13.32#ibcon#*before return 0, iclass 30, count 2 2006.229.05:34:13.32#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:13.32#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.05:34:13.32#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.05:34:13.32#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:13.32#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:13.44#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:13.44#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:13.44#ibcon#enter wrdev, iclass 30, count 0 2006.229.05:34:13.44#ibcon#first serial, iclass 30, count 0 2006.229.05:34:13.44#ibcon#enter sib2, iclass 30, count 0 2006.229.05:34:13.44#ibcon#flushed, iclass 30, count 0 2006.229.05:34:13.44#ibcon#about to write, iclass 30, count 0 2006.229.05:34:13.44#ibcon#wrote, iclass 30, count 0 2006.229.05:34:13.44#ibcon#about to read 3, iclass 30, count 0 2006.229.05:34:13.46#ibcon#read 3, iclass 30, count 0 2006.229.05:34:13.46#ibcon#about to read 4, iclass 30, count 0 2006.229.05:34:13.46#ibcon#read 4, iclass 30, count 0 2006.229.05:34:13.46#ibcon#about to read 5, iclass 30, count 0 2006.229.05:34:13.46#ibcon#read 5, iclass 30, count 0 2006.229.05:34:13.46#ibcon#about to read 6, iclass 30, count 0 2006.229.05:34:13.46#ibcon#read 6, iclass 30, count 0 2006.229.05:34:13.46#ibcon#end of sib2, iclass 30, count 0 2006.229.05:34:13.46#ibcon#*mode == 0, iclass 30, count 0 2006.229.05:34:13.46#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.05:34:13.46#ibcon#[27=USB\r\n] 2006.229.05:34:13.46#ibcon#*before write, iclass 30, count 0 2006.229.05:34:13.46#ibcon#enter sib2, iclass 30, count 0 2006.229.05:34:13.46#ibcon#flushed, iclass 30, count 0 2006.229.05:34:13.46#ibcon#about to write, iclass 30, count 0 2006.229.05:34:13.46#ibcon#wrote, iclass 30, count 0 2006.229.05:34:13.46#ibcon#about to read 3, iclass 30, count 0 2006.229.05:34:13.49#ibcon#read 3, iclass 30, count 0 2006.229.05:34:13.49#ibcon#about to read 4, iclass 30, count 0 2006.229.05:34:13.49#ibcon#read 4, iclass 30, count 0 2006.229.05:34:13.49#ibcon#about to read 5, iclass 30, count 0 2006.229.05:34:13.49#ibcon#read 5, iclass 30, count 0 2006.229.05:34:13.49#ibcon#about to read 6, iclass 30, count 0 2006.229.05:34:13.49#ibcon#read 6, iclass 30, count 0 2006.229.05:34:13.49#ibcon#end of sib2, iclass 30, count 0 2006.229.05:34:13.49#ibcon#*after write, iclass 30, count 0 2006.229.05:34:13.49#ibcon#*before return 0, iclass 30, count 0 2006.229.05:34:13.49#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:13.49#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.05:34:13.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.05:34:13.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.05:34:13.49$vck44/vblo=6,719.99 2006.229.05:34:13.49#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.05:34:13.49#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.05:34:13.49#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:13.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:13.49#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:13.49#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:13.49#ibcon#enter wrdev, iclass 32, count 0 2006.229.05:34:13.49#ibcon#first serial, iclass 32, count 0 2006.229.05:34:13.49#ibcon#enter sib2, iclass 32, count 0 2006.229.05:34:13.49#ibcon#flushed, iclass 32, count 0 2006.229.05:34:13.49#ibcon#about to write, iclass 32, count 0 2006.229.05:34:13.49#ibcon#wrote, iclass 32, count 0 2006.229.05:34:13.49#ibcon#about to read 3, iclass 32, count 0 2006.229.05:34:13.51#ibcon#read 3, iclass 32, count 0 2006.229.05:34:13.51#ibcon#about to read 4, iclass 32, count 0 2006.229.05:34:13.51#ibcon#read 4, iclass 32, count 0 2006.229.05:34:13.51#ibcon#about to read 5, iclass 32, count 0 2006.229.05:34:13.51#ibcon#read 5, iclass 32, count 0 2006.229.05:34:13.51#ibcon#about to read 6, iclass 32, count 0 2006.229.05:34:13.51#ibcon#read 6, iclass 32, count 0 2006.229.05:34:13.51#ibcon#end of sib2, iclass 32, count 0 2006.229.05:34:13.51#ibcon#*mode == 0, iclass 32, count 0 2006.229.05:34:13.51#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.05:34:13.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:34:13.51#ibcon#*before write, iclass 32, count 0 2006.229.05:34:13.51#ibcon#enter sib2, iclass 32, count 0 2006.229.05:34:13.51#ibcon#flushed, iclass 32, count 0 2006.229.05:34:13.51#ibcon#about to write, iclass 32, count 0 2006.229.05:34:13.51#ibcon#wrote, iclass 32, count 0 2006.229.05:34:13.51#ibcon#about to read 3, iclass 32, count 0 2006.229.05:34:13.55#ibcon#read 3, iclass 32, count 0 2006.229.05:34:13.55#ibcon#about to read 4, iclass 32, count 0 2006.229.05:34:13.55#ibcon#read 4, iclass 32, count 0 2006.229.05:34:13.55#ibcon#about to read 5, iclass 32, count 0 2006.229.05:34:13.55#ibcon#read 5, iclass 32, count 0 2006.229.05:34:13.55#ibcon#about to read 6, iclass 32, count 0 2006.229.05:34:13.55#ibcon#read 6, iclass 32, count 0 2006.229.05:34:13.55#ibcon#end of sib2, iclass 32, count 0 2006.229.05:34:13.55#ibcon#*after write, iclass 32, count 0 2006.229.05:34:13.55#ibcon#*before return 0, iclass 32, count 0 2006.229.05:34:13.55#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:13.55#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.05:34:13.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.05:34:13.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.05:34:13.55$vck44/vb=6,4 2006.229.05:34:13.55#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.05:34:13.55#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.05:34:13.55#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:13.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:13.61#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:13.61#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:13.61#ibcon#enter wrdev, iclass 34, count 2 2006.229.05:34:13.61#ibcon#first serial, iclass 34, count 2 2006.229.05:34:13.61#ibcon#enter sib2, iclass 34, count 2 2006.229.05:34:13.61#ibcon#flushed, iclass 34, count 2 2006.229.05:34:13.61#ibcon#about to write, iclass 34, count 2 2006.229.05:34:13.61#ibcon#wrote, iclass 34, count 2 2006.229.05:34:13.61#ibcon#about to read 3, iclass 34, count 2 2006.229.05:34:13.63#ibcon#read 3, iclass 34, count 2 2006.229.05:34:13.63#ibcon#about to read 4, iclass 34, count 2 2006.229.05:34:13.63#ibcon#read 4, iclass 34, count 2 2006.229.05:34:13.63#ibcon#about to read 5, iclass 34, count 2 2006.229.05:34:13.63#ibcon#read 5, iclass 34, count 2 2006.229.05:34:13.63#ibcon#about to read 6, iclass 34, count 2 2006.229.05:34:13.63#ibcon#read 6, iclass 34, count 2 2006.229.05:34:13.63#ibcon#end of sib2, iclass 34, count 2 2006.229.05:34:13.63#ibcon#*mode == 0, iclass 34, count 2 2006.229.05:34:13.63#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.05:34:13.63#ibcon#[27=AT06-04\r\n] 2006.229.05:34:13.63#ibcon#*before write, iclass 34, count 2 2006.229.05:34:13.63#ibcon#enter sib2, iclass 34, count 2 2006.229.05:34:13.63#ibcon#flushed, iclass 34, count 2 2006.229.05:34:13.63#ibcon#about to write, iclass 34, count 2 2006.229.05:34:13.63#ibcon#wrote, iclass 34, count 2 2006.229.05:34:13.63#ibcon#about to read 3, iclass 34, count 2 2006.229.05:34:13.66#ibcon#read 3, iclass 34, count 2 2006.229.05:34:13.66#ibcon#about to read 4, iclass 34, count 2 2006.229.05:34:13.66#ibcon#read 4, iclass 34, count 2 2006.229.05:34:13.66#ibcon#about to read 5, iclass 34, count 2 2006.229.05:34:13.66#ibcon#read 5, iclass 34, count 2 2006.229.05:34:13.66#ibcon#about to read 6, iclass 34, count 2 2006.229.05:34:13.66#ibcon#read 6, iclass 34, count 2 2006.229.05:34:13.66#ibcon#end of sib2, iclass 34, count 2 2006.229.05:34:13.66#ibcon#*after write, iclass 34, count 2 2006.229.05:34:13.66#ibcon#*before return 0, iclass 34, count 2 2006.229.05:34:13.66#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:13.66#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.05:34:13.66#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.05:34:13.66#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:13.66#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:13.78#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:13.78#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:13.78#ibcon#enter wrdev, iclass 34, count 0 2006.229.05:34:13.78#ibcon#first serial, iclass 34, count 0 2006.229.05:34:13.78#ibcon#enter sib2, iclass 34, count 0 2006.229.05:34:13.78#ibcon#flushed, iclass 34, count 0 2006.229.05:34:13.78#ibcon#about to write, iclass 34, count 0 2006.229.05:34:13.78#ibcon#wrote, iclass 34, count 0 2006.229.05:34:13.78#ibcon#about to read 3, iclass 34, count 0 2006.229.05:34:13.80#ibcon#read 3, iclass 34, count 0 2006.229.05:34:13.80#ibcon#about to read 4, iclass 34, count 0 2006.229.05:34:13.80#ibcon#read 4, iclass 34, count 0 2006.229.05:34:13.80#ibcon#about to read 5, iclass 34, count 0 2006.229.05:34:13.80#ibcon#read 5, iclass 34, count 0 2006.229.05:34:13.80#ibcon#about to read 6, iclass 34, count 0 2006.229.05:34:13.80#ibcon#read 6, iclass 34, count 0 2006.229.05:34:13.80#ibcon#end of sib2, iclass 34, count 0 2006.229.05:34:13.80#ibcon#*mode == 0, iclass 34, count 0 2006.229.05:34:13.80#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.05:34:13.80#ibcon#[27=USB\r\n] 2006.229.05:34:13.80#ibcon#*before write, iclass 34, count 0 2006.229.05:34:13.80#ibcon#enter sib2, iclass 34, count 0 2006.229.05:34:13.80#ibcon#flushed, iclass 34, count 0 2006.229.05:34:13.80#ibcon#about to write, iclass 34, count 0 2006.229.05:34:13.80#ibcon#wrote, iclass 34, count 0 2006.229.05:34:13.80#ibcon#about to read 3, iclass 34, count 0 2006.229.05:34:13.83#ibcon#read 3, iclass 34, count 0 2006.229.05:34:13.83#ibcon#about to read 4, iclass 34, count 0 2006.229.05:34:13.83#ibcon#read 4, iclass 34, count 0 2006.229.05:34:13.83#ibcon#about to read 5, iclass 34, count 0 2006.229.05:34:13.83#ibcon#read 5, iclass 34, count 0 2006.229.05:34:13.83#ibcon#about to read 6, iclass 34, count 0 2006.229.05:34:13.83#ibcon#read 6, iclass 34, count 0 2006.229.05:34:13.83#ibcon#end of sib2, iclass 34, count 0 2006.229.05:34:13.83#ibcon#*after write, iclass 34, count 0 2006.229.05:34:13.83#ibcon#*before return 0, iclass 34, count 0 2006.229.05:34:13.83#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:13.83#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.05:34:13.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.05:34:13.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.05:34:13.83$vck44/vblo=7,734.99 2006.229.05:34:13.83#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.05:34:13.83#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.05:34:13.83#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:13.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:13.83#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:13.83#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:13.83#ibcon#enter wrdev, iclass 36, count 0 2006.229.05:34:13.83#ibcon#first serial, iclass 36, count 0 2006.229.05:34:13.83#ibcon#enter sib2, iclass 36, count 0 2006.229.05:34:13.83#ibcon#flushed, iclass 36, count 0 2006.229.05:34:13.83#ibcon#about to write, iclass 36, count 0 2006.229.05:34:13.83#ibcon#wrote, iclass 36, count 0 2006.229.05:34:13.83#ibcon#about to read 3, iclass 36, count 0 2006.229.05:34:13.85#ibcon#read 3, iclass 36, count 0 2006.229.05:34:13.85#ibcon#about to read 4, iclass 36, count 0 2006.229.05:34:13.85#ibcon#read 4, iclass 36, count 0 2006.229.05:34:13.85#ibcon#about to read 5, iclass 36, count 0 2006.229.05:34:13.85#ibcon#read 5, iclass 36, count 0 2006.229.05:34:13.85#ibcon#about to read 6, iclass 36, count 0 2006.229.05:34:13.85#ibcon#read 6, iclass 36, count 0 2006.229.05:34:13.85#ibcon#end of sib2, iclass 36, count 0 2006.229.05:34:13.85#ibcon#*mode == 0, iclass 36, count 0 2006.229.05:34:13.85#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.05:34:13.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:34:13.85#ibcon#*before write, iclass 36, count 0 2006.229.05:34:13.85#ibcon#enter sib2, iclass 36, count 0 2006.229.05:34:13.85#ibcon#flushed, iclass 36, count 0 2006.229.05:34:13.85#ibcon#about to write, iclass 36, count 0 2006.229.05:34:13.85#ibcon#wrote, iclass 36, count 0 2006.229.05:34:13.85#ibcon#about to read 3, iclass 36, count 0 2006.229.05:34:13.89#ibcon#read 3, iclass 36, count 0 2006.229.05:34:13.89#ibcon#about to read 4, iclass 36, count 0 2006.229.05:34:13.89#ibcon#read 4, iclass 36, count 0 2006.229.05:34:13.89#ibcon#about to read 5, iclass 36, count 0 2006.229.05:34:13.89#ibcon#read 5, iclass 36, count 0 2006.229.05:34:13.89#ibcon#about to read 6, iclass 36, count 0 2006.229.05:34:13.89#ibcon#read 6, iclass 36, count 0 2006.229.05:34:13.89#ibcon#end of sib2, iclass 36, count 0 2006.229.05:34:13.89#ibcon#*after write, iclass 36, count 0 2006.229.05:34:13.89#ibcon#*before return 0, iclass 36, count 0 2006.229.05:34:13.89#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:13.89#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.05:34:13.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.05:34:13.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.05:34:13.89$vck44/vb=7,4 2006.229.05:34:13.89#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.05:34:13.89#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.05:34:13.89#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:13.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:13.95#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:13.95#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:13.95#ibcon#enter wrdev, iclass 38, count 2 2006.229.05:34:13.95#ibcon#first serial, iclass 38, count 2 2006.229.05:34:13.95#ibcon#enter sib2, iclass 38, count 2 2006.229.05:34:13.95#ibcon#flushed, iclass 38, count 2 2006.229.05:34:13.95#ibcon#about to write, iclass 38, count 2 2006.229.05:34:13.95#ibcon#wrote, iclass 38, count 2 2006.229.05:34:13.95#ibcon#about to read 3, iclass 38, count 2 2006.229.05:34:13.97#ibcon#read 3, iclass 38, count 2 2006.229.05:34:13.97#ibcon#about to read 4, iclass 38, count 2 2006.229.05:34:13.97#ibcon#read 4, iclass 38, count 2 2006.229.05:34:13.97#ibcon#about to read 5, iclass 38, count 2 2006.229.05:34:13.97#ibcon#read 5, iclass 38, count 2 2006.229.05:34:13.97#ibcon#about to read 6, iclass 38, count 2 2006.229.05:34:13.97#ibcon#read 6, iclass 38, count 2 2006.229.05:34:13.97#ibcon#end of sib2, iclass 38, count 2 2006.229.05:34:13.97#ibcon#*mode == 0, iclass 38, count 2 2006.229.05:34:13.97#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.05:34:13.97#ibcon#[27=AT07-04\r\n] 2006.229.05:34:13.97#ibcon#*before write, iclass 38, count 2 2006.229.05:34:13.97#ibcon#enter sib2, iclass 38, count 2 2006.229.05:34:13.97#ibcon#flushed, iclass 38, count 2 2006.229.05:34:13.97#ibcon#about to write, iclass 38, count 2 2006.229.05:34:13.97#ibcon#wrote, iclass 38, count 2 2006.229.05:34:13.97#ibcon#about to read 3, iclass 38, count 2 2006.229.05:34:14.00#ibcon#read 3, iclass 38, count 2 2006.229.05:34:14.00#ibcon#about to read 4, iclass 38, count 2 2006.229.05:34:14.00#ibcon#read 4, iclass 38, count 2 2006.229.05:34:14.00#ibcon#about to read 5, iclass 38, count 2 2006.229.05:34:14.00#ibcon#read 5, iclass 38, count 2 2006.229.05:34:14.00#ibcon#about to read 6, iclass 38, count 2 2006.229.05:34:14.00#ibcon#read 6, iclass 38, count 2 2006.229.05:34:14.00#ibcon#end of sib2, iclass 38, count 2 2006.229.05:34:14.00#ibcon#*after write, iclass 38, count 2 2006.229.05:34:14.00#ibcon#*before return 0, iclass 38, count 2 2006.229.05:34:14.00#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:14.00#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.05:34:14.00#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.05:34:14.00#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:14.00#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:14.12#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:14.12#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:14.12#ibcon#enter wrdev, iclass 38, count 0 2006.229.05:34:14.12#ibcon#first serial, iclass 38, count 0 2006.229.05:34:14.12#ibcon#enter sib2, iclass 38, count 0 2006.229.05:34:14.12#ibcon#flushed, iclass 38, count 0 2006.229.05:34:14.12#ibcon#about to write, iclass 38, count 0 2006.229.05:34:14.12#ibcon#wrote, iclass 38, count 0 2006.229.05:34:14.12#ibcon#about to read 3, iclass 38, count 0 2006.229.05:34:14.14#ibcon#read 3, iclass 38, count 0 2006.229.05:34:14.14#ibcon#about to read 4, iclass 38, count 0 2006.229.05:34:14.14#ibcon#read 4, iclass 38, count 0 2006.229.05:34:14.14#ibcon#about to read 5, iclass 38, count 0 2006.229.05:34:14.14#ibcon#read 5, iclass 38, count 0 2006.229.05:34:14.14#ibcon#about to read 6, iclass 38, count 0 2006.229.05:34:14.14#ibcon#read 6, iclass 38, count 0 2006.229.05:34:14.14#ibcon#end of sib2, iclass 38, count 0 2006.229.05:34:14.14#ibcon#*mode == 0, iclass 38, count 0 2006.229.05:34:14.14#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.05:34:14.14#ibcon#[27=USB\r\n] 2006.229.05:34:14.14#ibcon#*before write, iclass 38, count 0 2006.229.05:34:14.14#ibcon#enter sib2, iclass 38, count 0 2006.229.05:34:14.14#ibcon#flushed, iclass 38, count 0 2006.229.05:34:14.14#ibcon#about to write, iclass 38, count 0 2006.229.05:34:14.14#ibcon#wrote, iclass 38, count 0 2006.229.05:34:14.14#ibcon#about to read 3, iclass 38, count 0 2006.229.05:34:14.17#ibcon#read 3, iclass 38, count 0 2006.229.05:34:14.17#ibcon#about to read 4, iclass 38, count 0 2006.229.05:34:14.17#ibcon#read 4, iclass 38, count 0 2006.229.05:34:14.17#ibcon#about to read 5, iclass 38, count 0 2006.229.05:34:14.17#ibcon#read 5, iclass 38, count 0 2006.229.05:34:14.17#ibcon#about to read 6, iclass 38, count 0 2006.229.05:34:14.17#ibcon#read 6, iclass 38, count 0 2006.229.05:34:14.17#ibcon#end of sib2, iclass 38, count 0 2006.229.05:34:14.17#ibcon#*after write, iclass 38, count 0 2006.229.05:34:14.17#ibcon#*before return 0, iclass 38, count 0 2006.229.05:34:14.17#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:14.17#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.05:34:14.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.05:34:14.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.05:34:14.17$vck44/vblo=8,744.99 2006.229.05:34:14.17#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.05:34:14.17#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.05:34:14.17#ibcon#ireg 17 cls_cnt 0 2006.229.05:34:14.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:14.17#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:14.17#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:14.17#ibcon#enter wrdev, iclass 40, count 0 2006.229.05:34:14.17#ibcon#first serial, iclass 40, count 0 2006.229.05:34:14.17#ibcon#enter sib2, iclass 40, count 0 2006.229.05:34:14.17#ibcon#flushed, iclass 40, count 0 2006.229.05:34:14.17#ibcon#about to write, iclass 40, count 0 2006.229.05:34:14.17#ibcon#wrote, iclass 40, count 0 2006.229.05:34:14.17#ibcon#about to read 3, iclass 40, count 0 2006.229.05:34:14.19#ibcon#read 3, iclass 40, count 0 2006.229.05:34:14.19#ibcon#about to read 4, iclass 40, count 0 2006.229.05:34:14.19#ibcon#read 4, iclass 40, count 0 2006.229.05:34:14.19#ibcon#about to read 5, iclass 40, count 0 2006.229.05:34:14.19#ibcon#read 5, iclass 40, count 0 2006.229.05:34:14.19#ibcon#about to read 6, iclass 40, count 0 2006.229.05:34:14.19#ibcon#read 6, iclass 40, count 0 2006.229.05:34:14.19#ibcon#end of sib2, iclass 40, count 0 2006.229.05:34:14.19#ibcon#*mode == 0, iclass 40, count 0 2006.229.05:34:14.19#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.05:34:14.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:34:14.19#ibcon#*before write, iclass 40, count 0 2006.229.05:34:14.19#ibcon#enter sib2, iclass 40, count 0 2006.229.05:34:14.19#ibcon#flushed, iclass 40, count 0 2006.229.05:34:14.19#ibcon#about to write, iclass 40, count 0 2006.229.05:34:14.19#ibcon#wrote, iclass 40, count 0 2006.229.05:34:14.19#ibcon#about to read 3, iclass 40, count 0 2006.229.05:34:14.23#ibcon#read 3, iclass 40, count 0 2006.229.05:34:14.23#ibcon#about to read 4, iclass 40, count 0 2006.229.05:34:14.23#ibcon#read 4, iclass 40, count 0 2006.229.05:34:14.23#ibcon#about to read 5, iclass 40, count 0 2006.229.05:34:14.23#ibcon#read 5, iclass 40, count 0 2006.229.05:34:14.23#ibcon#about to read 6, iclass 40, count 0 2006.229.05:34:14.23#ibcon#read 6, iclass 40, count 0 2006.229.05:34:14.23#ibcon#end of sib2, iclass 40, count 0 2006.229.05:34:14.23#ibcon#*after write, iclass 40, count 0 2006.229.05:34:14.23#ibcon#*before return 0, iclass 40, count 0 2006.229.05:34:14.23#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:14.23#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.05:34:14.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.05:34:14.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.05:34:14.23$vck44/vb=8,4 2006.229.05:34:14.23#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.05:34:14.23#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.05:34:14.23#ibcon#ireg 11 cls_cnt 2 2006.229.05:34:14.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:14.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:14.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:14.29#ibcon#enter wrdev, iclass 4, count 2 2006.229.05:34:14.29#ibcon#first serial, iclass 4, count 2 2006.229.05:34:14.29#ibcon#enter sib2, iclass 4, count 2 2006.229.05:34:14.29#ibcon#flushed, iclass 4, count 2 2006.229.05:34:14.29#ibcon#about to write, iclass 4, count 2 2006.229.05:34:14.29#ibcon#wrote, iclass 4, count 2 2006.229.05:34:14.29#ibcon#about to read 3, iclass 4, count 2 2006.229.05:34:14.31#ibcon#read 3, iclass 4, count 2 2006.229.05:34:14.31#ibcon#about to read 4, iclass 4, count 2 2006.229.05:34:14.31#ibcon#read 4, iclass 4, count 2 2006.229.05:34:14.31#ibcon#about to read 5, iclass 4, count 2 2006.229.05:34:14.31#ibcon#read 5, iclass 4, count 2 2006.229.05:34:14.31#ibcon#about to read 6, iclass 4, count 2 2006.229.05:34:14.31#ibcon#read 6, iclass 4, count 2 2006.229.05:34:14.31#ibcon#end of sib2, iclass 4, count 2 2006.229.05:34:14.31#ibcon#*mode == 0, iclass 4, count 2 2006.229.05:34:14.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.05:34:14.31#ibcon#[27=AT08-04\r\n] 2006.229.05:34:14.31#ibcon#*before write, iclass 4, count 2 2006.229.05:34:14.31#ibcon#enter sib2, iclass 4, count 2 2006.229.05:34:14.31#ibcon#flushed, iclass 4, count 2 2006.229.05:34:14.31#ibcon#about to write, iclass 4, count 2 2006.229.05:34:14.31#ibcon#wrote, iclass 4, count 2 2006.229.05:34:14.31#ibcon#about to read 3, iclass 4, count 2 2006.229.05:34:14.34#ibcon#read 3, iclass 4, count 2 2006.229.05:34:14.34#ibcon#about to read 4, iclass 4, count 2 2006.229.05:34:14.34#ibcon#read 4, iclass 4, count 2 2006.229.05:34:14.34#ibcon#about to read 5, iclass 4, count 2 2006.229.05:34:14.34#ibcon#read 5, iclass 4, count 2 2006.229.05:34:14.34#ibcon#about to read 6, iclass 4, count 2 2006.229.05:34:14.34#ibcon#read 6, iclass 4, count 2 2006.229.05:34:14.34#ibcon#end of sib2, iclass 4, count 2 2006.229.05:34:14.34#ibcon#*after write, iclass 4, count 2 2006.229.05:34:14.34#ibcon#*before return 0, iclass 4, count 2 2006.229.05:34:14.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:14.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.05:34:14.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.05:34:14.34#ibcon#ireg 7 cls_cnt 0 2006.229.05:34:14.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:14.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:14.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:14.46#ibcon#enter wrdev, iclass 4, count 0 2006.229.05:34:14.46#ibcon#first serial, iclass 4, count 0 2006.229.05:34:14.46#ibcon#enter sib2, iclass 4, count 0 2006.229.05:34:14.46#ibcon#flushed, iclass 4, count 0 2006.229.05:34:14.46#ibcon#about to write, iclass 4, count 0 2006.229.05:34:14.46#ibcon#wrote, iclass 4, count 0 2006.229.05:34:14.46#ibcon#about to read 3, iclass 4, count 0 2006.229.05:34:14.48#ibcon#read 3, iclass 4, count 0 2006.229.05:34:14.48#ibcon#about to read 4, iclass 4, count 0 2006.229.05:34:14.48#ibcon#read 4, iclass 4, count 0 2006.229.05:34:14.48#ibcon#about to read 5, iclass 4, count 0 2006.229.05:34:14.48#ibcon#read 5, iclass 4, count 0 2006.229.05:34:14.48#ibcon#about to read 6, iclass 4, count 0 2006.229.05:34:14.48#ibcon#read 6, iclass 4, count 0 2006.229.05:34:14.48#ibcon#end of sib2, iclass 4, count 0 2006.229.05:34:14.48#ibcon#*mode == 0, iclass 4, count 0 2006.229.05:34:14.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.05:34:14.48#ibcon#[27=USB\r\n] 2006.229.05:34:14.48#ibcon#*before write, iclass 4, count 0 2006.229.05:34:14.48#ibcon#enter sib2, iclass 4, count 0 2006.229.05:34:14.48#ibcon#flushed, iclass 4, count 0 2006.229.05:34:14.48#ibcon#about to write, iclass 4, count 0 2006.229.05:34:14.48#ibcon#wrote, iclass 4, count 0 2006.229.05:34:14.48#ibcon#about to read 3, iclass 4, count 0 2006.229.05:34:14.51#ibcon#read 3, iclass 4, count 0 2006.229.05:34:14.51#ibcon#about to read 4, iclass 4, count 0 2006.229.05:34:14.51#ibcon#read 4, iclass 4, count 0 2006.229.05:34:14.51#ibcon#about to read 5, iclass 4, count 0 2006.229.05:34:14.51#ibcon#read 5, iclass 4, count 0 2006.229.05:34:14.51#ibcon#about to read 6, iclass 4, count 0 2006.229.05:34:14.51#ibcon#read 6, iclass 4, count 0 2006.229.05:34:14.51#ibcon#end of sib2, iclass 4, count 0 2006.229.05:34:14.51#ibcon#*after write, iclass 4, count 0 2006.229.05:34:14.51#ibcon#*before return 0, iclass 4, count 0 2006.229.05:34:14.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:14.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.05:34:14.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.05:34:14.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.05:34:14.51$vck44/vabw=wide 2006.229.05:34:14.51#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.05:34:14.51#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.05:34:14.51#ibcon#ireg 8 cls_cnt 0 2006.229.05:34:14.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:14.51#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:14.51#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:14.51#ibcon#enter wrdev, iclass 6, count 0 2006.229.05:34:14.51#ibcon#first serial, iclass 6, count 0 2006.229.05:34:14.51#ibcon#enter sib2, iclass 6, count 0 2006.229.05:34:14.51#ibcon#flushed, iclass 6, count 0 2006.229.05:34:14.51#ibcon#about to write, iclass 6, count 0 2006.229.05:34:14.51#ibcon#wrote, iclass 6, count 0 2006.229.05:34:14.51#ibcon#about to read 3, iclass 6, count 0 2006.229.05:34:14.53#ibcon#read 3, iclass 6, count 0 2006.229.05:34:14.53#ibcon#about to read 4, iclass 6, count 0 2006.229.05:34:14.53#ibcon#read 4, iclass 6, count 0 2006.229.05:34:14.53#ibcon#about to read 5, iclass 6, count 0 2006.229.05:34:14.53#ibcon#read 5, iclass 6, count 0 2006.229.05:34:14.53#ibcon#about to read 6, iclass 6, count 0 2006.229.05:34:14.53#ibcon#read 6, iclass 6, count 0 2006.229.05:34:14.53#ibcon#end of sib2, iclass 6, count 0 2006.229.05:34:14.53#ibcon#*mode == 0, iclass 6, count 0 2006.229.05:34:14.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.05:34:14.53#ibcon#[25=BW32\r\n] 2006.229.05:34:14.53#ibcon#*before write, iclass 6, count 0 2006.229.05:34:14.53#ibcon#enter sib2, iclass 6, count 0 2006.229.05:34:14.53#ibcon#flushed, iclass 6, count 0 2006.229.05:34:14.53#ibcon#about to write, iclass 6, count 0 2006.229.05:34:14.53#ibcon#wrote, iclass 6, count 0 2006.229.05:34:14.53#ibcon#about to read 3, iclass 6, count 0 2006.229.05:34:14.56#ibcon#read 3, iclass 6, count 0 2006.229.05:34:14.56#ibcon#about to read 4, iclass 6, count 0 2006.229.05:34:14.56#ibcon#read 4, iclass 6, count 0 2006.229.05:34:14.56#ibcon#about to read 5, iclass 6, count 0 2006.229.05:34:14.56#ibcon#read 5, iclass 6, count 0 2006.229.05:34:14.56#ibcon#about to read 6, iclass 6, count 0 2006.229.05:34:14.56#ibcon#read 6, iclass 6, count 0 2006.229.05:34:14.56#ibcon#end of sib2, iclass 6, count 0 2006.229.05:34:14.56#ibcon#*after write, iclass 6, count 0 2006.229.05:34:14.56#ibcon#*before return 0, iclass 6, count 0 2006.229.05:34:14.56#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:14.56#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.05:34:14.56#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.05:34:14.56#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.05:34:14.56$vck44/vbbw=wide 2006.229.05:34:14.56#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.05:34:14.56#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.05:34:14.56#ibcon#ireg 8 cls_cnt 0 2006.229.05:34:14.56#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:34:14.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:34:14.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:34:14.63#ibcon#enter wrdev, iclass 10, count 0 2006.229.05:34:14.63#ibcon#first serial, iclass 10, count 0 2006.229.05:34:14.63#ibcon#enter sib2, iclass 10, count 0 2006.229.05:34:14.63#ibcon#flushed, iclass 10, count 0 2006.229.05:34:14.63#ibcon#about to write, iclass 10, count 0 2006.229.05:34:14.63#ibcon#wrote, iclass 10, count 0 2006.229.05:34:14.63#ibcon#about to read 3, iclass 10, count 0 2006.229.05:34:14.65#ibcon#read 3, iclass 10, count 0 2006.229.05:34:14.65#ibcon#about to read 4, iclass 10, count 0 2006.229.05:34:14.65#ibcon#read 4, iclass 10, count 0 2006.229.05:34:14.65#ibcon#about to read 5, iclass 10, count 0 2006.229.05:34:14.65#ibcon#read 5, iclass 10, count 0 2006.229.05:34:14.65#ibcon#about to read 6, iclass 10, count 0 2006.229.05:34:14.65#ibcon#read 6, iclass 10, count 0 2006.229.05:34:14.65#ibcon#end of sib2, iclass 10, count 0 2006.229.05:34:14.65#ibcon#*mode == 0, iclass 10, count 0 2006.229.05:34:14.65#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.05:34:14.65#ibcon#[27=BW32\r\n] 2006.229.05:34:14.65#ibcon#*before write, iclass 10, count 0 2006.229.05:34:14.65#ibcon#enter sib2, iclass 10, count 0 2006.229.05:34:14.65#ibcon#flushed, iclass 10, count 0 2006.229.05:34:14.65#ibcon#about to write, iclass 10, count 0 2006.229.05:34:14.65#ibcon#wrote, iclass 10, count 0 2006.229.05:34:14.65#ibcon#about to read 3, iclass 10, count 0 2006.229.05:34:14.68#ibcon#read 3, iclass 10, count 0 2006.229.05:34:14.68#ibcon#about to read 4, iclass 10, count 0 2006.229.05:34:14.68#ibcon#read 4, iclass 10, count 0 2006.229.05:34:14.68#ibcon#about to read 5, iclass 10, count 0 2006.229.05:34:14.68#ibcon#read 5, iclass 10, count 0 2006.229.05:34:14.68#ibcon#about to read 6, iclass 10, count 0 2006.229.05:34:14.68#ibcon#read 6, iclass 10, count 0 2006.229.05:34:14.68#ibcon#end of sib2, iclass 10, count 0 2006.229.05:34:14.68#ibcon#*after write, iclass 10, count 0 2006.229.05:34:14.68#ibcon#*before return 0, iclass 10, count 0 2006.229.05:34:14.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:34:14.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.05:34:14.68#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.05:34:14.68#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.05:34:14.68$setupk4/ifdk4 2006.229.05:34:14.68$ifdk4/lo= 2006.229.05:34:14.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:34:14.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:34:14.68$ifdk4/patch= 2006.229.05:34:14.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:34:14.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:34:14.68$setupk4/!*+20s 2006.229.05:34:19.95#abcon#<5=/05 4.1 7.8 30.80 90 999.6\r\n> 2006.229.05:34:19.97#abcon#{5=INTERFACE CLEAR} 2006.229.05:34:20.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:34:29.19$setupk4/"tpicd 2006.229.05:34:29.19$setupk4/echo=off 2006.229.05:34:29.19$setupk4/xlog=off 2006.229.05:34:29.19:!2006.229.05:39:27 2006.229.05:34:58.13#trakl#Source acquired 2006.229.05:34:58.13#flagr#flagr/antenna,acquired 2006.229.05:39:27.02:preob 2006.229.05:39:28.15/onsource/TRACKING 2006.229.05:39:28.15:!2006.229.05:39:37 2006.229.05:39:37.02:"tape 2006.229.05:39:37.02:"st=record 2006.229.05:39:37.02:data_valid=on 2006.229.05:39:37.02:midob 2006.229.05:39:38.15/onsource/TRACKING 2006.229.05:39:38.15/wx/30.78,999.6,90 2006.229.05:39:38.21/cable/+6.3994E-03 2006.229.05:39:39.30/va/01,08,usb,yes,30,32 2006.229.05:39:39.30/va/02,07,usb,yes,33,33 2006.229.05:39:39.30/va/03,06,usb,yes,40,43 2006.229.05:39:39.30/va/04,07,usb,yes,33,35 2006.229.05:39:39.30/va/05,04,usb,yes,30,30 2006.229.05:39:39.30/va/06,04,usb,yes,34,33 2006.229.05:39:39.30/va/07,05,usb,yes,30,30 2006.229.05:39:39.30/va/08,06,usb,yes,21,27 2006.229.05:39:39.53/valo/01,524.99,yes,locked 2006.229.05:39:39.53/valo/02,534.99,yes,locked 2006.229.05:39:39.53/valo/03,564.99,yes,locked 2006.229.05:39:39.53/valo/04,624.99,yes,locked 2006.229.05:39:39.53/valo/05,734.99,yes,locked 2006.229.05:39:39.53/valo/06,814.99,yes,locked 2006.229.05:39:39.53/valo/07,864.99,yes,locked 2006.229.05:39:39.53/valo/08,884.99,yes,locked 2006.229.05:39:40.62/vb/01,04,usb,yes,31,29 2006.229.05:39:40.62/vb/02,04,usb,yes,33,33 2006.229.05:39:40.62/vb/03,04,usb,yes,30,33 2006.229.05:39:40.62/vb/04,04,usb,yes,35,33 2006.229.05:39:40.62/vb/05,04,usb,yes,27,29 2006.229.05:39:40.62/vb/06,04,usb,yes,31,28 2006.229.05:39:40.62/vb/07,04,usb,yes,31,31 2006.229.05:39:40.62/vb/08,04,usb,yes,29,32 2006.229.05:39:40.86/vblo/01,629.99,yes,locked 2006.229.05:39:40.86/vblo/02,634.99,yes,locked 2006.229.05:39:40.86/vblo/03,649.99,yes,locked 2006.229.05:39:40.86/vblo/04,679.99,yes,locked 2006.229.05:39:40.86/vblo/05,709.99,yes,locked 2006.229.05:39:40.86/vblo/06,719.99,yes,locked 2006.229.05:39:40.86/vblo/07,734.99,yes,locked 2006.229.05:39:40.86/vblo/08,744.99,yes,locked 2006.229.05:39:41.01/vabw/8 2006.229.05:39:41.16/vbbw/8 2006.229.05:39:41.25/xfe/off,on,12.0 2006.229.05:39:41.62/ifatt/23,28,28,28 2006.229.05:39:42.07/fmout-gps/S +4.46E-07 2006.229.05:39:42.12:!2006.229.05:46:57 2006.229.05:46:57.00:data_valid=off 2006.229.05:46:57.01:"et 2006.229.05:46:57.01:!+3s 2006.229.05:47:00.02:"tape 2006.229.05:47:00.03:postob 2006.229.05:47:00.17/cable/+6.4015E-03 2006.229.05:47:00.18/wx/30.68,999.7,90 2006.229.05:47:00.23/fmout-gps/S +4.45E-07 2006.229.05:47:00.24:scan_name=229-0554,jd0608,180 2006.229.05:47:00.24:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.05:47:02.14#flagr#flagr/antenna,new-source 2006.229.05:47:02.15:checkk5 2006.229.05:47:02.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:47:02.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:47:03.39/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:47:03.87/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:47:04.24/chk_obsdata//k5ts1/T2290539??a.dat file size is correct (nominal:1760MB, actual:1760MB). 2006.229.05:47:04.63/chk_obsdata//k5ts2/T2290539??b.dat file size is correct (nominal:1760MB, actual:1760MB). 2006.229.05:47:05.04/chk_obsdata//k5ts3/T2290539??c.dat file size is correct (nominal:1760MB, actual:1760MB). 2006.229.05:47:05.43/chk_obsdata//k5ts4/T2290539??d.dat file size is correct (nominal:1760MB, actual:1760MB). 2006.229.05:47:06.15/k5log//k5ts1_log_newline 2006.229.05:47:06.86/k5log//k5ts2_log_newline 2006.229.05:47:07.57/k5log//k5ts3_log_newline 2006.229.05:47:08.28/k5log//k5ts4_log_newline 2006.229.05:47:08.31/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:47:08.31:setupk4=1 2006.229.05:47:08.31$setupk4/echo=on 2006.229.05:47:08.31$setupk4/pcalon 2006.229.05:47:08.31$pcalon/"no phase cal control is implemented here 2006.229.05:47:08.31$setupk4/"tpicd=stop 2006.229.05:47:08.31$setupk4/"rec=synch_on 2006.229.05:47:08.31$setupk4/"rec_mode=128 2006.229.05:47:08.31$setupk4/!* 2006.229.05:47:08.31$setupk4/recpk4 2006.229.05:47:08.31$recpk4/recpatch= 2006.229.05:47:08.31$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:47:08.32$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:47:08.32$setupk4/vck44 2006.229.05:47:08.32$vck44/valo=1,524.99 2006.229.05:47:08.32#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:47:08.32#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:47:08.32#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:08.32#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:08.32#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:08.32#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:08.32#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:47:08.32#ibcon#first serial, iclass 31, count 0 2006.229.05:47:08.32#ibcon#enter sib2, iclass 31, count 0 2006.229.05:47:08.32#ibcon#flushed, iclass 31, count 0 2006.229.05:47:08.32#ibcon#about to write, iclass 31, count 0 2006.229.05:47:08.32#ibcon#wrote, iclass 31, count 0 2006.229.05:47:08.32#ibcon#about to read 3, iclass 31, count 0 2006.229.05:47:08.33#ibcon#read 3, iclass 31, count 0 2006.229.05:47:08.33#ibcon#about to read 4, iclass 31, count 0 2006.229.05:47:08.33#ibcon#read 4, iclass 31, count 0 2006.229.05:47:08.33#ibcon#about to read 5, iclass 31, count 0 2006.229.05:47:08.33#ibcon#read 5, iclass 31, count 0 2006.229.05:47:08.33#ibcon#about to read 6, iclass 31, count 0 2006.229.05:47:08.33#ibcon#read 6, iclass 31, count 0 2006.229.05:47:08.33#ibcon#end of sib2, iclass 31, count 0 2006.229.05:47:08.33#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:47:08.33#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:47:08.33#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:47:08.33#ibcon#*before write, iclass 31, count 0 2006.229.05:47:08.33#ibcon#enter sib2, iclass 31, count 0 2006.229.05:47:08.33#ibcon#flushed, iclass 31, count 0 2006.229.05:47:08.33#ibcon#about to write, iclass 31, count 0 2006.229.05:47:08.33#ibcon#wrote, iclass 31, count 0 2006.229.05:47:08.33#ibcon#about to read 3, iclass 31, count 0 2006.229.05:47:08.38#ibcon#read 3, iclass 31, count 0 2006.229.05:47:08.38#ibcon#about to read 4, iclass 31, count 0 2006.229.05:47:08.38#ibcon#read 4, iclass 31, count 0 2006.229.05:47:08.38#ibcon#about to read 5, iclass 31, count 0 2006.229.05:47:08.38#ibcon#read 5, iclass 31, count 0 2006.229.05:47:08.38#ibcon#about to read 6, iclass 31, count 0 2006.229.05:47:08.38#ibcon#read 6, iclass 31, count 0 2006.229.05:47:08.38#ibcon#end of sib2, iclass 31, count 0 2006.229.05:47:08.38#ibcon#*after write, iclass 31, count 0 2006.229.05:47:08.38#ibcon#*before return 0, iclass 31, count 0 2006.229.05:47:08.38#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:08.38#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:08.38#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:47:08.38#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:47:08.38$vck44/va=1,8 2006.229.05:47:08.38#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:47:08.38#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:47:08.38#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:08.38#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:08.38#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:08.38#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:08.38#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:47:08.38#ibcon#first serial, iclass 33, count 2 2006.229.05:47:08.38#ibcon#enter sib2, iclass 33, count 2 2006.229.05:47:08.38#ibcon#flushed, iclass 33, count 2 2006.229.05:47:08.38#ibcon#about to write, iclass 33, count 2 2006.229.05:47:08.38#ibcon#wrote, iclass 33, count 2 2006.229.05:47:08.38#ibcon#about to read 3, iclass 33, count 2 2006.229.05:47:08.40#ibcon#read 3, iclass 33, count 2 2006.229.05:47:08.40#ibcon#about to read 4, iclass 33, count 2 2006.229.05:47:08.40#ibcon#read 4, iclass 33, count 2 2006.229.05:47:08.40#ibcon#about to read 5, iclass 33, count 2 2006.229.05:47:08.40#ibcon#read 5, iclass 33, count 2 2006.229.05:47:08.40#ibcon#about to read 6, iclass 33, count 2 2006.229.05:47:08.40#ibcon#read 6, iclass 33, count 2 2006.229.05:47:08.40#ibcon#end of sib2, iclass 33, count 2 2006.229.05:47:08.40#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:47:08.40#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:47:08.40#ibcon#[25=AT01-08\r\n] 2006.229.05:47:08.40#ibcon#*before write, iclass 33, count 2 2006.229.05:47:08.40#ibcon#enter sib2, iclass 33, count 2 2006.229.05:47:08.40#ibcon#flushed, iclass 33, count 2 2006.229.05:47:08.40#ibcon#about to write, iclass 33, count 2 2006.229.05:47:08.40#ibcon#wrote, iclass 33, count 2 2006.229.05:47:08.40#ibcon#about to read 3, iclass 33, count 2 2006.229.05:47:08.43#ibcon#read 3, iclass 33, count 2 2006.229.05:47:08.43#ibcon#about to read 4, iclass 33, count 2 2006.229.05:47:08.43#ibcon#read 4, iclass 33, count 2 2006.229.05:47:08.43#ibcon#about to read 5, iclass 33, count 2 2006.229.05:47:08.43#ibcon#read 5, iclass 33, count 2 2006.229.05:47:08.43#ibcon#about to read 6, iclass 33, count 2 2006.229.05:47:08.43#ibcon#read 6, iclass 33, count 2 2006.229.05:47:08.43#ibcon#end of sib2, iclass 33, count 2 2006.229.05:47:08.43#ibcon#*after write, iclass 33, count 2 2006.229.05:47:08.43#ibcon#*before return 0, iclass 33, count 2 2006.229.05:47:08.43#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:08.43#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:08.43#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:47:08.43#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:08.43#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:08.55#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:08.55#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:08.55#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:47:08.55#ibcon#first serial, iclass 33, count 0 2006.229.05:47:08.55#ibcon#enter sib2, iclass 33, count 0 2006.229.05:47:08.55#ibcon#flushed, iclass 33, count 0 2006.229.05:47:08.55#ibcon#about to write, iclass 33, count 0 2006.229.05:47:08.55#ibcon#wrote, iclass 33, count 0 2006.229.05:47:08.55#ibcon#about to read 3, iclass 33, count 0 2006.229.05:47:08.57#ibcon#read 3, iclass 33, count 0 2006.229.05:47:08.57#ibcon#about to read 4, iclass 33, count 0 2006.229.05:47:08.57#ibcon#read 4, iclass 33, count 0 2006.229.05:47:08.57#ibcon#about to read 5, iclass 33, count 0 2006.229.05:47:08.57#ibcon#read 5, iclass 33, count 0 2006.229.05:47:08.57#ibcon#about to read 6, iclass 33, count 0 2006.229.05:47:08.57#ibcon#read 6, iclass 33, count 0 2006.229.05:47:08.57#ibcon#end of sib2, iclass 33, count 0 2006.229.05:47:08.57#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:47:08.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:47:08.57#ibcon#[25=USB\r\n] 2006.229.05:47:08.57#ibcon#*before write, iclass 33, count 0 2006.229.05:47:08.57#ibcon#enter sib2, iclass 33, count 0 2006.229.05:47:08.57#ibcon#flushed, iclass 33, count 0 2006.229.05:47:08.57#ibcon#about to write, iclass 33, count 0 2006.229.05:47:08.57#ibcon#wrote, iclass 33, count 0 2006.229.05:47:08.57#ibcon#about to read 3, iclass 33, count 0 2006.229.05:47:08.60#ibcon#read 3, iclass 33, count 0 2006.229.05:47:08.60#ibcon#about to read 4, iclass 33, count 0 2006.229.05:47:08.60#ibcon#read 4, iclass 33, count 0 2006.229.05:47:08.60#ibcon#about to read 5, iclass 33, count 0 2006.229.05:47:08.60#ibcon#read 5, iclass 33, count 0 2006.229.05:47:08.60#ibcon#about to read 6, iclass 33, count 0 2006.229.05:47:08.60#ibcon#read 6, iclass 33, count 0 2006.229.05:47:08.60#ibcon#end of sib2, iclass 33, count 0 2006.229.05:47:08.60#ibcon#*after write, iclass 33, count 0 2006.229.05:47:08.60#ibcon#*before return 0, iclass 33, count 0 2006.229.05:47:08.60#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:08.60#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:08.60#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:47:08.60#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:47:08.60$vck44/valo=2,534.99 2006.229.05:47:08.60#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:47:08.60#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:47:08.60#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:08.60#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:08.60#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:08.60#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:08.60#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:47:08.60#ibcon#first serial, iclass 35, count 0 2006.229.05:47:08.60#ibcon#enter sib2, iclass 35, count 0 2006.229.05:47:08.60#ibcon#flushed, iclass 35, count 0 2006.229.05:47:08.60#ibcon#about to write, iclass 35, count 0 2006.229.05:47:08.60#ibcon#wrote, iclass 35, count 0 2006.229.05:47:08.60#ibcon#about to read 3, iclass 35, count 0 2006.229.05:47:08.62#ibcon#read 3, iclass 35, count 0 2006.229.05:47:08.62#ibcon#about to read 4, iclass 35, count 0 2006.229.05:47:08.62#ibcon#read 4, iclass 35, count 0 2006.229.05:47:08.62#ibcon#about to read 5, iclass 35, count 0 2006.229.05:47:08.62#ibcon#read 5, iclass 35, count 0 2006.229.05:47:08.62#ibcon#about to read 6, iclass 35, count 0 2006.229.05:47:08.62#ibcon#read 6, iclass 35, count 0 2006.229.05:47:08.62#ibcon#end of sib2, iclass 35, count 0 2006.229.05:47:08.62#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:47:08.62#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:47:08.62#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:47:08.62#ibcon#*before write, iclass 35, count 0 2006.229.05:47:08.62#ibcon#enter sib2, iclass 35, count 0 2006.229.05:47:08.62#ibcon#flushed, iclass 35, count 0 2006.229.05:47:08.62#ibcon#about to write, iclass 35, count 0 2006.229.05:47:08.62#ibcon#wrote, iclass 35, count 0 2006.229.05:47:08.62#ibcon#about to read 3, iclass 35, count 0 2006.229.05:47:08.66#ibcon#read 3, iclass 35, count 0 2006.229.05:47:08.66#ibcon#about to read 4, iclass 35, count 0 2006.229.05:47:08.66#ibcon#read 4, iclass 35, count 0 2006.229.05:47:08.66#ibcon#about to read 5, iclass 35, count 0 2006.229.05:47:08.66#ibcon#read 5, iclass 35, count 0 2006.229.05:47:08.66#ibcon#about to read 6, iclass 35, count 0 2006.229.05:47:08.66#ibcon#read 6, iclass 35, count 0 2006.229.05:47:08.66#ibcon#end of sib2, iclass 35, count 0 2006.229.05:47:08.66#ibcon#*after write, iclass 35, count 0 2006.229.05:47:08.66#ibcon#*before return 0, iclass 35, count 0 2006.229.05:47:08.66#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:08.66#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:08.66#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:47:08.66#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:47:08.66$vck44/va=2,7 2006.229.05:47:08.66#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:47:08.66#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:47:08.66#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:08.66#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:08.72#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:08.72#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:08.72#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:47:08.72#ibcon#first serial, iclass 37, count 2 2006.229.05:47:08.72#ibcon#enter sib2, iclass 37, count 2 2006.229.05:47:08.72#ibcon#flushed, iclass 37, count 2 2006.229.05:47:08.72#ibcon#about to write, iclass 37, count 2 2006.229.05:47:08.72#ibcon#wrote, iclass 37, count 2 2006.229.05:47:08.72#ibcon#about to read 3, iclass 37, count 2 2006.229.05:47:08.74#ibcon#read 3, iclass 37, count 2 2006.229.05:47:08.74#ibcon#about to read 4, iclass 37, count 2 2006.229.05:47:08.74#ibcon#read 4, iclass 37, count 2 2006.229.05:47:08.74#ibcon#about to read 5, iclass 37, count 2 2006.229.05:47:08.74#ibcon#read 5, iclass 37, count 2 2006.229.05:47:08.74#ibcon#about to read 6, iclass 37, count 2 2006.229.05:47:08.74#ibcon#read 6, iclass 37, count 2 2006.229.05:47:08.74#ibcon#end of sib2, iclass 37, count 2 2006.229.05:47:08.74#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:47:08.74#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:47:08.74#ibcon#[25=AT02-07\r\n] 2006.229.05:47:08.74#ibcon#*before write, iclass 37, count 2 2006.229.05:47:08.74#ibcon#enter sib2, iclass 37, count 2 2006.229.05:47:08.74#ibcon#flushed, iclass 37, count 2 2006.229.05:47:08.74#ibcon#about to write, iclass 37, count 2 2006.229.05:47:08.74#ibcon#wrote, iclass 37, count 2 2006.229.05:47:08.74#ibcon#about to read 3, iclass 37, count 2 2006.229.05:47:08.77#ibcon#read 3, iclass 37, count 2 2006.229.05:47:08.77#ibcon#about to read 4, iclass 37, count 2 2006.229.05:47:08.77#ibcon#read 4, iclass 37, count 2 2006.229.05:47:08.77#ibcon#about to read 5, iclass 37, count 2 2006.229.05:47:08.77#ibcon#read 5, iclass 37, count 2 2006.229.05:47:08.77#ibcon#about to read 6, iclass 37, count 2 2006.229.05:47:08.77#ibcon#read 6, iclass 37, count 2 2006.229.05:47:08.77#ibcon#end of sib2, iclass 37, count 2 2006.229.05:47:08.77#ibcon#*after write, iclass 37, count 2 2006.229.05:47:08.77#ibcon#*before return 0, iclass 37, count 2 2006.229.05:47:08.77#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:08.77#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:08.77#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:47:08.77#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:08.77#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:08.89#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:08.89#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:08.89#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:47:08.89#ibcon#first serial, iclass 37, count 0 2006.229.05:47:08.89#ibcon#enter sib2, iclass 37, count 0 2006.229.05:47:08.89#ibcon#flushed, iclass 37, count 0 2006.229.05:47:08.89#ibcon#about to write, iclass 37, count 0 2006.229.05:47:08.89#ibcon#wrote, iclass 37, count 0 2006.229.05:47:08.89#ibcon#about to read 3, iclass 37, count 0 2006.229.05:47:08.91#ibcon#read 3, iclass 37, count 0 2006.229.05:47:08.91#ibcon#about to read 4, iclass 37, count 0 2006.229.05:47:08.91#ibcon#read 4, iclass 37, count 0 2006.229.05:47:08.91#ibcon#about to read 5, iclass 37, count 0 2006.229.05:47:08.91#ibcon#read 5, iclass 37, count 0 2006.229.05:47:08.91#ibcon#about to read 6, iclass 37, count 0 2006.229.05:47:08.91#ibcon#read 6, iclass 37, count 0 2006.229.05:47:08.91#ibcon#end of sib2, iclass 37, count 0 2006.229.05:47:08.91#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:47:08.91#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:47:08.91#ibcon#[25=USB\r\n] 2006.229.05:47:08.91#ibcon#*before write, iclass 37, count 0 2006.229.05:47:08.91#ibcon#enter sib2, iclass 37, count 0 2006.229.05:47:08.91#ibcon#flushed, iclass 37, count 0 2006.229.05:47:08.91#ibcon#about to write, iclass 37, count 0 2006.229.05:47:08.91#ibcon#wrote, iclass 37, count 0 2006.229.05:47:08.91#ibcon#about to read 3, iclass 37, count 0 2006.229.05:47:08.94#ibcon#read 3, iclass 37, count 0 2006.229.05:47:08.94#ibcon#about to read 4, iclass 37, count 0 2006.229.05:47:08.94#ibcon#read 4, iclass 37, count 0 2006.229.05:47:08.94#ibcon#about to read 5, iclass 37, count 0 2006.229.05:47:08.94#ibcon#read 5, iclass 37, count 0 2006.229.05:47:08.94#ibcon#about to read 6, iclass 37, count 0 2006.229.05:47:08.94#ibcon#read 6, iclass 37, count 0 2006.229.05:47:08.94#ibcon#end of sib2, iclass 37, count 0 2006.229.05:47:08.94#ibcon#*after write, iclass 37, count 0 2006.229.05:47:08.94#ibcon#*before return 0, iclass 37, count 0 2006.229.05:47:08.94#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:08.94#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:08.94#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:47:08.94#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:47:08.94$vck44/valo=3,564.99 2006.229.05:47:08.94#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:47:08.94#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:47:08.94#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:08.94#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:08.94#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:08.94#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:08.94#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:47:08.94#ibcon#first serial, iclass 39, count 0 2006.229.05:47:08.94#ibcon#enter sib2, iclass 39, count 0 2006.229.05:47:08.94#ibcon#flushed, iclass 39, count 0 2006.229.05:47:08.94#ibcon#about to write, iclass 39, count 0 2006.229.05:47:08.94#ibcon#wrote, iclass 39, count 0 2006.229.05:47:08.94#ibcon#about to read 3, iclass 39, count 0 2006.229.05:47:08.96#ibcon#read 3, iclass 39, count 0 2006.229.05:47:08.96#ibcon#about to read 4, iclass 39, count 0 2006.229.05:47:08.96#ibcon#read 4, iclass 39, count 0 2006.229.05:47:08.96#ibcon#about to read 5, iclass 39, count 0 2006.229.05:47:08.96#ibcon#read 5, iclass 39, count 0 2006.229.05:47:08.96#ibcon#about to read 6, iclass 39, count 0 2006.229.05:47:08.96#ibcon#read 6, iclass 39, count 0 2006.229.05:47:08.96#ibcon#end of sib2, iclass 39, count 0 2006.229.05:47:08.96#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:47:08.96#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:47:08.96#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:47:08.96#ibcon#*before write, iclass 39, count 0 2006.229.05:47:08.96#ibcon#enter sib2, iclass 39, count 0 2006.229.05:47:08.96#ibcon#flushed, iclass 39, count 0 2006.229.05:47:08.96#ibcon#about to write, iclass 39, count 0 2006.229.05:47:08.96#ibcon#wrote, iclass 39, count 0 2006.229.05:47:08.96#ibcon#about to read 3, iclass 39, count 0 2006.229.05:47:09.00#ibcon#read 3, iclass 39, count 0 2006.229.05:47:09.00#ibcon#about to read 4, iclass 39, count 0 2006.229.05:47:09.00#ibcon#read 4, iclass 39, count 0 2006.229.05:47:09.00#ibcon#about to read 5, iclass 39, count 0 2006.229.05:47:09.00#ibcon#read 5, iclass 39, count 0 2006.229.05:47:09.00#ibcon#about to read 6, iclass 39, count 0 2006.229.05:47:09.00#ibcon#read 6, iclass 39, count 0 2006.229.05:47:09.00#ibcon#end of sib2, iclass 39, count 0 2006.229.05:47:09.00#ibcon#*after write, iclass 39, count 0 2006.229.05:47:09.00#ibcon#*before return 0, iclass 39, count 0 2006.229.05:47:09.00#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:09.00#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:09.00#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:47:09.00#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:47:09.00$vck44/va=3,6 2006.229.05:47:09.00#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:47:09.00#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:47:09.00#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:09.00#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:09.06#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:09.06#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:09.06#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:47:09.06#ibcon#first serial, iclass 3, count 2 2006.229.05:47:09.06#ibcon#enter sib2, iclass 3, count 2 2006.229.05:47:09.06#ibcon#flushed, iclass 3, count 2 2006.229.05:47:09.06#ibcon#about to write, iclass 3, count 2 2006.229.05:47:09.06#ibcon#wrote, iclass 3, count 2 2006.229.05:47:09.06#ibcon#about to read 3, iclass 3, count 2 2006.229.05:47:09.08#ibcon#read 3, iclass 3, count 2 2006.229.05:47:09.08#ibcon#about to read 4, iclass 3, count 2 2006.229.05:47:09.08#ibcon#read 4, iclass 3, count 2 2006.229.05:47:09.08#ibcon#about to read 5, iclass 3, count 2 2006.229.05:47:09.08#ibcon#read 5, iclass 3, count 2 2006.229.05:47:09.08#ibcon#about to read 6, iclass 3, count 2 2006.229.05:47:09.08#ibcon#read 6, iclass 3, count 2 2006.229.05:47:09.08#ibcon#end of sib2, iclass 3, count 2 2006.229.05:47:09.08#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:47:09.08#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:47:09.08#ibcon#[25=AT03-06\r\n] 2006.229.05:47:09.08#ibcon#*before write, iclass 3, count 2 2006.229.05:47:09.08#ibcon#enter sib2, iclass 3, count 2 2006.229.05:47:09.08#ibcon#flushed, iclass 3, count 2 2006.229.05:47:09.08#ibcon#about to write, iclass 3, count 2 2006.229.05:47:09.08#ibcon#wrote, iclass 3, count 2 2006.229.05:47:09.08#ibcon#about to read 3, iclass 3, count 2 2006.229.05:47:09.11#ibcon#read 3, iclass 3, count 2 2006.229.05:47:09.11#ibcon#about to read 4, iclass 3, count 2 2006.229.05:47:09.11#ibcon#read 4, iclass 3, count 2 2006.229.05:47:09.11#ibcon#about to read 5, iclass 3, count 2 2006.229.05:47:09.11#ibcon#read 5, iclass 3, count 2 2006.229.05:47:09.11#ibcon#about to read 6, iclass 3, count 2 2006.229.05:47:09.11#ibcon#read 6, iclass 3, count 2 2006.229.05:47:09.11#ibcon#end of sib2, iclass 3, count 2 2006.229.05:47:09.11#ibcon#*after write, iclass 3, count 2 2006.229.05:47:09.11#ibcon#*before return 0, iclass 3, count 2 2006.229.05:47:09.11#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:09.11#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:09.11#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:47:09.11#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:09.11#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:09.23#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:09.23#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:09.23#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:47:09.23#ibcon#first serial, iclass 3, count 0 2006.229.05:47:09.23#ibcon#enter sib2, iclass 3, count 0 2006.229.05:47:09.23#ibcon#flushed, iclass 3, count 0 2006.229.05:47:09.23#ibcon#about to write, iclass 3, count 0 2006.229.05:47:09.23#ibcon#wrote, iclass 3, count 0 2006.229.05:47:09.23#ibcon#about to read 3, iclass 3, count 0 2006.229.05:47:09.25#ibcon#read 3, iclass 3, count 0 2006.229.05:47:09.25#ibcon#about to read 4, iclass 3, count 0 2006.229.05:47:09.25#ibcon#read 4, iclass 3, count 0 2006.229.05:47:09.25#ibcon#about to read 5, iclass 3, count 0 2006.229.05:47:09.25#ibcon#read 5, iclass 3, count 0 2006.229.05:47:09.25#ibcon#about to read 6, iclass 3, count 0 2006.229.05:47:09.25#ibcon#read 6, iclass 3, count 0 2006.229.05:47:09.25#ibcon#end of sib2, iclass 3, count 0 2006.229.05:47:09.25#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:47:09.25#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:47:09.25#ibcon#[25=USB\r\n] 2006.229.05:47:09.25#ibcon#*before write, iclass 3, count 0 2006.229.05:47:09.25#ibcon#enter sib2, iclass 3, count 0 2006.229.05:47:09.25#ibcon#flushed, iclass 3, count 0 2006.229.05:47:09.25#ibcon#about to write, iclass 3, count 0 2006.229.05:47:09.25#ibcon#wrote, iclass 3, count 0 2006.229.05:47:09.25#ibcon#about to read 3, iclass 3, count 0 2006.229.05:47:09.28#ibcon#read 3, iclass 3, count 0 2006.229.05:47:09.28#ibcon#about to read 4, iclass 3, count 0 2006.229.05:47:09.28#ibcon#read 4, iclass 3, count 0 2006.229.05:47:09.28#ibcon#about to read 5, iclass 3, count 0 2006.229.05:47:09.28#ibcon#read 5, iclass 3, count 0 2006.229.05:47:09.28#ibcon#about to read 6, iclass 3, count 0 2006.229.05:47:09.28#ibcon#read 6, iclass 3, count 0 2006.229.05:47:09.28#ibcon#end of sib2, iclass 3, count 0 2006.229.05:47:09.28#ibcon#*after write, iclass 3, count 0 2006.229.05:47:09.28#ibcon#*before return 0, iclass 3, count 0 2006.229.05:47:09.28#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:09.28#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:09.28#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:47:09.28#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:47:09.28$vck44/valo=4,624.99 2006.229.05:47:09.28#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:47:09.28#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:47:09.28#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:09.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:09.28#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:09.28#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:09.28#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:47:09.28#ibcon#first serial, iclass 5, count 0 2006.229.05:47:09.28#ibcon#enter sib2, iclass 5, count 0 2006.229.05:47:09.28#ibcon#flushed, iclass 5, count 0 2006.229.05:47:09.28#ibcon#about to write, iclass 5, count 0 2006.229.05:47:09.28#ibcon#wrote, iclass 5, count 0 2006.229.05:47:09.28#ibcon#about to read 3, iclass 5, count 0 2006.229.05:47:09.30#ibcon#read 3, iclass 5, count 0 2006.229.05:47:09.30#ibcon#about to read 4, iclass 5, count 0 2006.229.05:47:09.30#ibcon#read 4, iclass 5, count 0 2006.229.05:47:09.30#ibcon#about to read 5, iclass 5, count 0 2006.229.05:47:09.30#ibcon#read 5, iclass 5, count 0 2006.229.05:47:09.30#ibcon#about to read 6, iclass 5, count 0 2006.229.05:47:09.30#ibcon#read 6, iclass 5, count 0 2006.229.05:47:09.30#ibcon#end of sib2, iclass 5, count 0 2006.229.05:47:09.30#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:47:09.30#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:47:09.30#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:47:09.30#ibcon#*before write, iclass 5, count 0 2006.229.05:47:09.30#ibcon#enter sib2, iclass 5, count 0 2006.229.05:47:09.30#ibcon#flushed, iclass 5, count 0 2006.229.05:47:09.30#ibcon#about to write, iclass 5, count 0 2006.229.05:47:09.30#ibcon#wrote, iclass 5, count 0 2006.229.05:47:09.30#ibcon#about to read 3, iclass 5, count 0 2006.229.05:47:09.34#ibcon#read 3, iclass 5, count 0 2006.229.05:47:09.34#ibcon#about to read 4, iclass 5, count 0 2006.229.05:47:09.34#ibcon#read 4, iclass 5, count 0 2006.229.05:47:09.34#ibcon#about to read 5, iclass 5, count 0 2006.229.05:47:09.34#ibcon#read 5, iclass 5, count 0 2006.229.05:47:09.34#ibcon#about to read 6, iclass 5, count 0 2006.229.05:47:09.34#ibcon#read 6, iclass 5, count 0 2006.229.05:47:09.34#ibcon#end of sib2, iclass 5, count 0 2006.229.05:47:09.34#ibcon#*after write, iclass 5, count 0 2006.229.05:47:09.34#ibcon#*before return 0, iclass 5, count 0 2006.229.05:47:09.34#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:09.34#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:09.34#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:47:09.34#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:47:09.34$vck44/va=4,7 2006.229.05:47:09.34#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:47:09.34#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:47:09.34#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:09.34#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:09.40#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:09.40#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:09.40#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:47:09.40#ibcon#first serial, iclass 7, count 2 2006.229.05:47:09.40#ibcon#enter sib2, iclass 7, count 2 2006.229.05:47:09.40#ibcon#flushed, iclass 7, count 2 2006.229.05:47:09.40#ibcon#about to write, iclass 7, count 2 2006.229.05:47:09.40#ibcon#wrote, iclass 7, count 2 2006.229.05:47:09.40#ibcon#about to read 3, iclass 7, count 2 2006.229.05:47:09.42#ibcon#read 3, iclass 7, count 2 2006.229.05:47:09.42#ibcon#about to read 4, iclass 7, count 2 2006.229.05:47:09.42#ibcon#read 4, iclass 7, count 2 2006.229.05:47:09.42#ibcon#about to read 5, iclass 7, count 2 2006.229.05:47:09.42#ibcon#read 5, iclass 7, count 2 2006.229.05:47:09.42#ibcon#about to read 6, iclass 7, count 2 2006.229.05:47:09.42#ibcon#read 6, iclass 7, count 2 2006.229.05:47:09.42#ibcon#end of sib2, iclass 7, count 2 2006.229.05:47:09.42#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:47:09.42#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:47:09.42#ibcon#[25=AT04-07\r\n] 2006.229.05:47:09.42#ibcon#*before write, iclass 7, count 2 2006.229.05:47:09.42#ibcon#enter sib2, iclass 7, count 2 2006.229.05:47:09.42#ibcon#flushed, iclass 7, count 2 2006.229.05:47:09.42#ibcon#about to write, iclass 7, count 2 2006.229.05:47:09.42#ibcon#wrote, iclass 7, count 2 2006.229.05:47:09.42#ibcon#about to read 3, iclass 7, count 2 2006.229.05:47:09.45#ibcon#read 3, iclass 7, count 2 2006.229.05:47:09.45#ibcon#about to read 4, iclass 7, count 2 2006.229.05:47:09.45#ibcon#read 4, iclass 7, count 2 2006.229.05:47:09.45#ibcon#about to read 5, iclass 7, count 2 2006.229.05:47:09.45#ibcon#read 5, iclass 7, count 2 2006.229.05:47:09.45#ibcon#about to read 6, iclass 7, count 2 2006.229.05:47:09.45#ibcon#read 6, iclass 7, count 2 2006.229.05:47:09.45#ibcon#end of sib2, iclass 7, count 2 2006.229.05:47:09.45#ibcon#*after write, iclass 7, count 2 2006.229.05:47:09.45#ibcon#*before return 0, iclass 7, count 2 2006.229.05:47:09.45#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:09.48#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:09.48#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:47:09.48#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:09.48#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:09.60#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:09.60#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:09.60#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:47:09.60#ibcon#first serial, iclass 7, count 0 2006.229.05:47:09.60#ibcon#enter sib2, iclass 7, count 0 2006.229.05:47:09.60#ibcon#flushed, iclass 7, count 0 2006.229.05:47:09.60#ibcon#about to write, iclass 7, count 0 2006.229.05:47:09.60#ibcon#wrote, iclass 7, count 0 2006.229.05:47:09.60#ibcon#about to read 3, iclass 7, count 0 2006.229.05:47:09.62#ibcon#read 3, iclass 7, count 0 2006.229.05:47:09.62#ibcon#about to read 4, iclass 7, count 0 2006.229.05:47:09.62#ibcon#read 4, iclass 7, count 0 2006.229.05:47:09.62#ibcon#about to read 5, iclass 7, count 0 2006.229.05:47:09.62#ibcon#read 5, iclass 7, count 0 2006.229.05:47:09.62#ibcon#about to read 6, iclass 7, count 0 2006.229.05:47:09.62#ibcon#read 6, iclass 7, count 0 2006.229.05:47:09.62#ibcon#end of sib2, iclass 7, count 0 2006.229.05:47:09.62#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:47:09.62#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:47:09.62#ibcon#[25=USB\r\n] 2006.229.05:47:09.62#ibcon#*before write, iclass 7, count 0 2006.229.05:47:09.62#ibcon#enter sib2, iclass 7, count 0 2006.229.05:47:09.62#ibcon#flushed, iclass 7, count 0 2006.229.05:47:09.62#ibcon#about to write, iclass 7, count 0 2006.229.05:47:09.62#ibcon#wrote, iclass 7, count 0 2006.229.05:47:09.62#ibcon#about to read 3, iclass 7, count 0 2006.229.05:47:09.65#ibcon#read 3, iclass 7, count 0 2006.229.05:47:09.65#ibcon#about to read 4, iclass 7, count 0 2006.229.05:47:09.65#ibcon#read 4, iclass 7, count 0 2006.229.05:47:09.65#ibcon#about to read 5, iclass 7, count 0 2006.229.05:47:09.65#ibcon#read 5, iclass 7, count 0 2006.229.05:47:09.65#ibcon#about to read 6, iclass 7, count 0 2006.229.05:47:09.65#ibcon#read 6, iclass 7, count 0 2006.229.05:47:09.65#ibcon#end of sib2, iclass 7, count 0 2006.229.05:47:09.65#ibcon#*after write, iclass 7, count 0 2006.229.05:47:09.65#ibcon#*before return 0, iclass 7, count 0 2006.229.05:47:09.65#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:09.65#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:09.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:47:09.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:47:09.65$vck44/valo=5,734.99 2006.229.05:47:09.65#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:47:09.65#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:47:09.65#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:09.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:09.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:09.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:09.65#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:47:09.65#ibcon#first serial, iclass 11, count 0 2006.229.05:47:09.65#ibcon#enter sib2, iclass 11, count 0 2006.229.05:47:09.65#ibcon#flushed, iclass 11, count 0 2006.229.05:47:09.65#ibcon#about to write, iclass 11, count 0 2006.229.05:47:09.65#ibcon#wrote, iclass 11, count 0 2006.229.05:47:09.65#ibcon#about to read 3, iclass 11, count 0 2006.229.05:47:09.67#ibcon#read 3, iclass 11, count 0 2006.229.05:47:09.67#ibcon#about to read 4, iclass 11, count 0 2006.229.05:47:09.67#ibcon#read 4, iclass 11, count 0 2006.229.05:47:09.67#ibcon#about to read 5, iclass 11, count 0 2006.229.05:47:09.67#ibcon#read 5, iclass 11, count 0 2006.229.05:47:09.67#ibcon#about to read 6, iclass 11, count 0 2006.229.05:47:09.67#ibcon#read 6, iclass 11, count 0 2006.229.05:47:09.67#ibcon#end of sib2, iclass 11, count 0 2006.229.05:47:09.67#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:47:09.67#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:47:09.67#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:47:09.67#ibcon#*before write, iclass 11, count 0 2006.229.05:47:09.67#ibcon#enter sib2, iclass 11, count 0 2006.229.05:47:09.67#ibcon#flushed, iclass 11, count 0 2006.229.05:47:09.67#ibcon#about to write, iclass 11, count 0 2006.229.05:47:09.67#ibcon#wrote, iclass 11, count 0 2006.229.05:47:09.67#ibcon#about to read 3, iclass 11, count 0 2006.229.05:47:09.71#ibcon#read 3, iclass 11, count 0 2006.229.05:47:09.71#ibcon#about to read 4, iclass 11, count 0 2006.229.05:47:09.71#ibcon#read 4, iclass 11, count 0 2006.229.05:47:09.71#ibcon#about to read 5, iclass 11, count 0 2006.229.05:47:09.71#ibcon#read 5, iclass 11, count 0 2006.229.05:47:09.71#ibcon#about to read 6, iclass 11, count 0 2006.229.05:47:09.71#ibcon#read 6, iclass 11, count 0 2006.229.05:47:09.71#ibcon#end of sib2, iclass 11, count 0 2006.229.05:47:09.71#ibcon#*after write, iclass 11, count 0 2006.229.05:47:09.71#ibcon#*before return 0, iclass 11, count 0 2006.229.05:47:09.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:09.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:09.71#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:47:09.71#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:47:09.71$vck44/va=5,4 2006.229.05:47:09.71#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:47:09.71#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:47:09.71#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:09.71#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:09.77#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:09.77#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:09.77#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:47:09.77#ibcon#first serial, iclass 13, count 2 2006.229.05:47:09.77#ibcon#enter sib2, iclass 13, count 2 2006.229.05:47:09.77#ibcon#flushed, iclass 13, count 2 2006.229.05:47:09.77#ibcon#about to write, iclass 13, count 2 2006.229.05:47:09.77#ibcon#wrote, iclass 13, count 2 2006.229.05:47:09.77#ibcon#about to read 3, iclass 13, count 2 2006.229.05:47:09.79#ibcon#read 3, iclass 13, count 2 2006.229.05:47:09.79#ibcon#about to read 4, iclass 13, count 2 2006.229.05:47:09.79#ibcon#read 4, iclass 13, count 2 2006.229.05:47:09.79#ibcon#about to read 5, iclass 13, count 2 2006.229.05:47:09.79#ibcon#read 5, iclass 13, count 2 2006.229.05:47:09.79#ibcon#about to read 6, iclass 13, count 2 2006.229.05:47:09.79#ibcon#read 6, iclass 13, count 2 2006.229.05:47:09.79#ibcon#end of sib2, iclass 13, count 2 2006.229.05:47:09.79#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:47:09.79#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:47:09.79#ibcon#[25=AT05-04\r\n] 2006.229.05:47:09.79#ibcon#*before write, iclass 13, count 2 2006.229.05:47:09.79#ibcon#enter sib2, iclass 13, count 2 2006.229.05:47:09.79#ibcon#flushed, iclass 13, count 2 2006.229.05:47:09.79#ibcon#about to write, iclass 13, count 2 2006.229.05:47:09.79#ibcon#wrote, iclass 13, count 2 2006.229.05:47:09.79#ibcon#about to read 3, iclass 13, count 2 2006.229.05:47:09.82#ibcon#read 3, iclass 13, count 2 2006.229.05:47:09.82#ibcon#about to read 4, iclass 13, count 2 2006.229.05:47:09.82#ibcon#read 4, iclass 13, count 2 2006.229.05:47:09.82#ibcon#about to read 5, iclass 13, count 2 2006.229.05:47:09.82#ibcon#read 5, iclass 13, count 2 2006.229.05:47:09.82#ibcon#about to read 6, iclass 13, count 2 2006.229.05:47:09.82#ibcon#read 6, iclass 13, count 2 2006.229.05:47:09.82#ibcon#end of sib2, iclass 13, count 2 2006.229.05:47:09.82#ibcon#*after write, iclass 13, count 2 2006.229.05:47:09.82#ibcon#*before return 0, iclass 13, count 2 2006.229.05:47:09.82#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:09.82#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:09.82#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:47:09.82#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:09.82#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:09.94#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:09.94#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:09.94#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:47:09.94#ibcon#first serial, iclass 13, count 0 2006.229.05:47:09.94#ibcon#enter sib2, iclass 13, count 0 2006.229.05:47:09.94#ibcon#flushed, iclass 13, count 0 2006.229.05:47:09.94#ibcon#about to write, iclass 13, count 0 2006.229.05:47:09.94#ibcon#wrote, iclass 13, count 0 2006.229.05:47:09.94#ibcon#about to read 3, iclass 13, count 0 2006.229.05:47:09.96#ibcon#read 3, iclass 13, count 0 2006.229.05:47:09.96#ibcon#about to read 4, iclass 13, count 0 2006.229.05:47:09.96#ibcon#read 4, iclass 13, count 0 2006.229.05:47:09.96#ibcon#about to read 5, iclass 13, count 0 2006.229.05:47:09.96#ibcon#read 5, iclass 13, count 0 2006.229.05:47:09.96#ibcon#about to read 6, iclass 13, count 0 2006.229.05:47:09.96#ibcon#read 6, iclass 13, count 0 2006.229.05:47:09.96#ibcon#end of sib2, iclass 13, count 0 2006.229.05:47:09.96#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:47:09.96#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:47:09.96#ibcon#[25=USB\r\n] 2006.229.05:47:09.96#ibcon#*before write, iclass 13, count 0 2006.229.05:47:09.96#ibcon#enter sib2, iclass 13, count 0 2006.229.05:47:09.96#ibcon#flushed, iclass 13, count 0 2006.229.05:47:09.96#ibcon#about to write, iclass 13, count 0 2006.229.05:47:09.96#ibcon#wrote, iclass 13, count 0 2006.229.05:47:09.96#ibcon#about to read 3, iclass 13, count 0 2006.229.05:47:09.99#ibcon#read 3, iclass 13, count 0 2006.229.05:47:09.99#ibcon#about to read 4, iclass 13, count 0 2006.229.05:47:09.99#ibcon#read 4, iclass 13, count 0 2006.229.05:47:09.99#ibcon#about to read 5, iclass 13, count 0 2006.229.05:47:09.99#ibcon#read 5, iclass 13, count 0 2006.229.05:47:09.99#ibcon#about to read 6, iclass 13, count 0 2006.229.05:47:09.99#ibcon#read 6, iclass 13, count 0 2006.229.05:47:09.99#ibcon#end of sib2, iclass 13, count 0 2006.229.05:47:09.99#ibcon#*after write, iclass 13, count 0 2006.229.05:47:09.99#ibcon#*before return 0, iclass 13, count 0 2006.229.05:47:09.99#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:09.99#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:09.99#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:47:09.99#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:47:09.99$vck44/valo=6,814.99 2006.229.05:47:09.99#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.05:47:09.99#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.05:47:09.99#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:09.99#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:47:09.99#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:47:09.99#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:47:09.99#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:47:09.99#ibcon#first serial, iclass 15, count 0 2006.229.05:47:09.99#ibcon#enter sib2, iclass 15, count 0 2006.229.05:47:09.99#ibcon#flushed, iclass 15, count 0 2006.229.05:47:09.99#ibcon#about to write, iclass 15, count 0 2006.229.05:47:09.99#ibcon#wrote, iclass 15, count 0 2006.229.05:47:09.99#ibcon#about to read 3, iclass 15, count 0 2006.229.05:47:10.01#ibcon#read 3, iclass 15, count 0 2006.229.05:47:10.01#ibcon#about to read 4, iclass 15, count 0 2006.229.05:47:10.01#ibcon#read 4, iclass 15, count 0 2006.229.05:47:10.01#ibcon#about to read 5, iclass 15, count 0 2006.229.05:47:10.01#ibcon#read 5, iclass 15, count 0 2006.229.05:47:10.01#ibcon#about to read 6, iclass 15, count 0 2006.229.05:47:10.01#ibcon#read 6, iclass 15, count 0 2006.229.05:47:10.01#ibcon#end of sib2, iclass 15, count 0 2006.229.05:47:10.01#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:47:10.01#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:47:10.01#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:47:10.01#ibcon#*before write, iclass 15, count 0 2006.229.05:47:10.01#ibcon#enter sib2, iclass 15, count 0 2006.229.05:47:10.01#ibcon#flushed, iclass 15, count 0 2006.229.05:47:10.01#ibcon#about to write, iclass 15, count 0 2006.229.05:47:10.01#ibcon#wrote, iclass 15, count 0 2006.229.05:47:10.01#ibcon#about to read 3, iclass 15, count 0 2006.229.05:47:10.05#ibcon#read 3, iclass 15, count 0 2006.229.05:47:10.05#ibcon#about to read 4, iclass 15, count 0 2006.229.05:47:10.05#ibcon#read 4, iclass 15, count 0 2006.229.05:47:10.05#ibcon#about to read 5, iclass 15, count 0 2006.229.05:47:10.05#ibcon#read 5, iclass 15, count 0 2006.229.05:47:10.05#ibcon#about to read 6, iclass 15, count 0 2006.229.05:47:10.05#ibcon#read 6, iclass 15, count 0 2006.229.05:47:10.05#ibcon#end of sib2, iclass 15, count 0 2006.229.05:47:10.05#ibcon#*after write, iclass 15, count 0 2006.229.05:47:10.05#ibcon#*before return 0, iclass 15, count 0 2006.229.05:47:10.05#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:47:10.05#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.05:47:10.05#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:47:10.05#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:47:10.05$vck44/va=6,4 2006.229.05:47:10.05#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.05:47:10.05#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.05:47:10.05#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:10.05#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:47:10.11#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:47:10.11#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:47:10.11#ibcon#enter wrdev, iclass 17, count 2 2006.229.05:47:10.11#ibcon#first serial, iclass 17, count 2 2006.229.05:47:10.11#ibcon#enter sib2, iclass 17, count 2 2006.229.05:47:10.11#ibcon#flushed, iclass 17, count 2 2006.229.05:47:10.11#ibcon#about to write, iclass 17, count 2 2006.229.05:47:10.11#ibcon#wrote, iclass 17, count 2 2006.229.05:47:10.11#ibcon#about to read 3, iclass 17, count 2 2006.229.05:47:10.13#ibcon#read 3, iclass 17, count 2 2006.229.05:47:10.13#ibcon#about to read 4, iclass 17, count 2 2006.229.05:47:10.13#ibcon#read 4, iclass 17, count 2 2006.229.05:47:10.13#ibcon#about to read 5, iclass 17, count 2 2006.229.05:47:10.13#ibcon#read 5, iclass 17, count 2 2006.229.05:47:10.13#ibcon#about to read 6, iclass 17, count 2 2006.229.05:47:10.13#ibcon#read 6, iclass 17, count 2 2006.229.05:47:10.13#ibcon#end of sib2, iclass 17, count 2 2006.229.05:47:10.13#ibcon#*mode == 0, iclass 17, count 2 2006.229.05:47:10.13#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.05:47:10.13#ibcon#[25=AT06-04\r\n] 2006.229.05:47:10.13#ibcon#*before write, iclass 17, count 2 2006.229.05:47:10.13#ibcon#enter sib2, iclass 17, count 2 2006.229.05:47:10.13#ibcon#flushed, iclass 17, count 2 2006.229.05:47:10.13#ibcon#about to write, iclass 17, count 2 2006.229.05:47:10.13#ibcon#wrote, iclass 17, count 2 2006.229.05:47:10.13#ibcon#about to read 3, iclass 17, count 2 2006.229.05:47:10.16#ibcon#read 3, iclass 17, count 2 2006.229.05:47:10.16#ibcon#about to read 4, iclass 17, count 2 2006.229.05:47:10.16#ibcon#read 4, iclass 17, count 2 2006.229.05:47:10.16#ibcon#about to read 5, iclass 17, count 2 2006.229.05:47:10.16#ibcon#read 5, iclass 17, count 2 2006.229.05:47:10.16#ibcon#about to read 6, iclass 17, count 2 2006.229.05:47:10.16#ibcon#read 6, iclass 17, count 2 2006.229.05:47:10.16#ibcon#end of sib2, iclass 17, count 2 2006.229.05:47:10.16#ibcon#*after write, iclass 17, count 2 2006.229.05:47:10.16#ibcon#*before return 0, iclass 17, count 2 2006.229.05:47:10.16#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:47:10.16#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.05:47:10.16#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.05:47:10.16#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:10.16#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:47:10.28#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:47:10.28#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:47:10.28#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:47:10.28#ibcon#first serial, iclass 17, count 0 2006.229.05:47:10.28#ibcon#enter sib2, iclass 17, count 0 2006.229.05:47:10.28#ibcon#flushed, iclass 17, count 0 2006.229.05:47:10.28#ibcon#about to write, iclass 17, count 0 2006.229.05:47:10.28#ibcon#wrote, iclass 17, count 0 2006.229.05:47:10.28#ibcon#about to read 3, iclass 17, count 0 2006.229.05:47:10.30#ibcon#read 3, iclass 17, count 0 2006.229.05:47:10.30#ibcon#about to read 4, iclass 17, count 0 2006.229.05:47:10.30#ibcon#read 4, iclass 17, count 0 2006.229.05:47:10.30#ibcon#about to read 5, iclass 17, count 0 2006.229.05:47:10.30#ibcon#read 5, iclass 17, count 0 2006.229.05:47:10.30#ibcon#about to read 6, iclass 17, count 0 2006.229.05:47:10.30#ibcon#read 6, iclass 17, count 0 2006.229.05:47:10.30#ibcon#end of sib2, iclass 17, count 0 2006.229.05:47:10.30#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:47:10.30#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:47:10.30#ibcon#[25=USB\r\n] 2006.229.05:47:10.30#ibcon#*before write, iclass 17, count 0 2006.229.05:47:10.30#ibcon#enter sib2, iclass 17, count 0 2006.229.05:47:10.30#ibcon#flushed, iclass 17, count 0 2006.229.05:47:10.30#ibcon#about to write, iclass 17, count 0 2006.229.05:47:10.30#ibcon#wrote, iclass 17, count 0 2006.229.05:47:10.30#ibcon#about to read 3, iclass 17, count 0 2006.229.05:47:10.33#ibcon#read 3, iclass 17, count 0 2006.229.05:47:10.33#ibcon#about to read 4, iclass 17, count 0 2006.229.05:47:10.33#ibcon#read 4, iclass 17, count 0 2006.229.05:47:10.33#ibcon#about to read 5, iclass 17, count 0 2006.229.05:47:10.33#ibcon#read 5, iclass 17, count 0 2006.229.05:47:10.33#ibcon#about to read 6, iclass 17, count 0 2006.229.05:47:10.33#ibcon#read 6, iclass 17, count 0 2006.229.05:47:10.33#ibcon#end of sib2, iclass 17, count 0 2006.229.05:47:10.33#ibcon#*after write, iclass 17, count 0 2006.229.05:47:10.33#ibcon#*before return 0, iclass 17, count 0 2006.229.05:47:10.33#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:47:10.33#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.05:47:10.33#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:47:10.33#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:47:10.33$vck44/valo=7,864.99 2006.229.05:47:10.33#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.05:47:10.33#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.05:47:10.33#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:10.33#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:47:10.33#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:47:10.33#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:47:10.33#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:47:10.33#ibcon#first serial, iclass 19, count 0 2006.229.05:47:10.33#ibcon#enter sib2, iclass 19, count 0 2006.229.05:47:10.33#ibcon#flushed, iclass 19, count 0 2006.229.05:47:10.33#ibcon#about to write, iclass 19, count 0 2006.229.05:47:10.33#ibcon#wrote, iclass 19, count 0 2006.229.05:47:10.33#ibcon#about to read 3, iclass 19, count 0 2006.229.05:47:10.35#ibcon#read 3, iclass 19, count 0 2006.229.05:47:10.35#ibcon#about to read 4, iclass 19, count 0 2006.229.05:47:10.35#ibcon#read 4, iclass 19, count 0 2006.229.05:47:10.35#ibcon#about to read 5, iclass 19, count 0 2006.229.05:47:10.35#ibcon#read 5, iclass 19, count 0 2006.229.05:47:10.35#ibcon#about to read 6, iclass 19, count 0 2006.229.05:47:10.35#ibcon#read 6, iclass 19, count 0 2006.229.05:47:10.35#ibcon#end of sib2, iclass 19, count 0 2006.229.05:47:10.35#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:47:10.35#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:47:10.35#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:47:10.35#ibcon#*before write, iclass 19, count 0 2006.229.05:47:10.35#ibcon#enter sib2, iclass 19, count 0 2006.229.05:47:10.35#ibcon#flushed, iclass 19, count 0 2006.229.05:47:10.35#ibcon#about to write, iclass 19, count 0 2006.229.05:47:10.35#ibcon#wrote, iclass 19, count 0 2006.229.05:47:10.35#ibcon#about to read 3, iclass 19, count 0 2006.229.05:47:10.39#ibcon#read 3, iclass 19, count 0 2006.229.05:47:10.39#ibcon#about to read 4, iclass 19, count 0 2006.229.05:47:10.39#ibcon#read 4, iclass 19, count 0 2006.229.05:47:10.39#ibcon#about to read 5, iclass 19, count 0 2006.229.05:47:10.39#ibcon#read 5, iclass 19, count 0 2006.229.05:47:10.39#ibcon#about to read 6, iclass 19, count 0 2006.229.05:47:10.39#ibcon#read 6, iclass 19, count 0 2006.229.05:47:10.39#ibcon#end of sib2, iclass 19, count 0 2006.229.05:47:10.39#ibcon#*after write, iclass 19, count 0 2006.229.05:47:10.39#ibcon#*before return 0, iclass 19, count 0 2006.229.05:47:10.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:47:10.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.05:47:10.39#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:47:10.39#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:47:10.39$vck44/va=7,5 2006.229.05:47:10.39#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.05:47:10.39#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.05:47:10.39#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:10.39#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:47:10.45#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:47:10.45#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:47:10.45#ibcon#enter wrdev, iclass 21, count 2 2006.229.05:47:10.45#ibcon#first serial, iclass 21, count 2 2006.229.05:47:10.45#ibcon#enter sib2, iclass 21, count 2 2006.229.05:47:10.45#ibcon#flushed, iclass 21, count 2 2006.229.05:47:10.45#ibcon#about to write, iclass 21, count 2 2006.229.05:47:10.45#ibcon#wrote, iclass 21, count 2 2006.229.05:47:10.45#ibcon#about to read 3, iclass 21, count 2 2006.229.05:47:10.47#ibcon#read 3, iclass 21, count 2 2006.229.05:47:10.47#ibcon#about to read 4, iclass 21, count 2 2006.229.05:47:10.47#ibcon#read 4, iclass 21, count 2 2006.229.05:47:10.47#ibcon#about to read 5, iclass 21, count 2 2006.229.05:47:10.47#ibcon#read 5, iclass 21, count 2 2006.229.05:47:10.47#ibcon#about to read 6, iclass 21, count 2 2006.229.05:47:10.47#ibcon#read 6, iclass 21, count 2 2006.229.05:47:10.47#ibcon#end of sib2, iclass 21, count 2 2006.229.05:47:10.47#ibcon#*mode == 0, iclass 21, count 2 2006.229.05:47:10.47#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.05:47:10.47#ibcon#[25=AT07-05\r\n] 2006.229.05:47:10.47#ibcon#*before write, iclass 21, count 2 2006.229.05:47:10.47#ibcon#enter sib2, iclass 21, count 2 2006.229.05:47:10.47#ibcon#flushed, iclass 21, count 2 2006.229.05:47:10.47#ibcon#about to write, iclass 21, count 2 2006.229.05:47:10.47#ibcon#wrote, iclass 21, count 2 2006.229.05:47:10.47#ibcon#about to read 3, iclass 21, count 2 2006.229.05:47:10.50#ibcon#read 3, iclass 21, count 2 2006.229.05:47:10.50#ibcon#about to read 4, iclass 21, count 2 2006.229.05:47:10.50#ibcon#read 4, iclass 21, count 2 2006.229.05:47:10.50#ibcon#about to read 5, iclass 21, count 2 2006.229.05:47:10.50#ibcon#read 5, iclass 21, count 2 2006.229.05:47:10.50#ibcon#about to read 6, iclass 21, count 2 2006.229.05:47:10.50#ibcon#read 6, iclass 21, count 2 2006.229.05:47:10.50#ibcon#end of sib2, iclass 21, count 2 2006.229.05:47:10.50#ibcon#*after write, iclass 21, count 2 2006.229.05:47:10.50#ibcon#*before return 0, iclass 21, count 2 2006.229.05:47:10.50#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:47:10.50#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.05:47:10.50#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.05:47:10.50#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:10.50#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:47:10.62#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:47:10.62#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:47:10.62#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:47:10.62#ibcon#first serial, iclass 21, count 0 2006.229.05:47:10.62#ibcon#enter sib2, iclass 21, count 0 2006.229.05:47:10.62#ibcon#flushed, iclass 21, count 0 2006.229.05:47:10.62#ibcon#about to write, iclass 21, count 0 2006.229.05:47:10.62#ibcon#wrote, iclass 21, count 0 2006.229.05:47:10.62#ibcon#about to read 3, iclass 21, count 0 2006.229.05:47:10.64#ibcon#read 3, iclass 21, count 0 2006.229.05:47:10.64#ibcon#about to read 4, iclass 21, count 0 2006.229.05:47:10.64#ibcon#read 4, iclass 21, count 0 2006.229.05:47:10.64#ibcon#about to read 5, iclass 21, count 0 2006.229.05:47:10.64#ibcon#read 5, iclass 21, count 0 2006.229.05:47:10.64#ibcon#about to read 6, iclass 21, count 0 2006.229.05:47:10.64#ibcon#read 6, iclass 21, count 0 2006.229.05:47:10.64#ibcon#end of sib2, iclass 21, count 0 2006.229.05:47:10.64#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:47:10.64#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:47:10.64#ibcon#[25=USB\r\n] 2006.229.05:47:10.64#ibcon#*before write, iclass 21, count 0 2006.229.05:47:10.64#ibcon#enter sib2, iclass 21, count 0 2006.229.05:47:10.64#ibcon#flushed, iclass 21, count 0 2006.229.05:47:10.64#ibcon#about to write, iclass 21, count 0 2006.229.05:47:10.64#ibcon#wrote, iclass 21, count 0 2006.229.05:47:10.64#ibcon#about to read 3, iclass 21, count 0 2006.229.05:47:10.67#ibcon#read 3, iclass 21, count 0 2006.229.05:47:10.67#ibcon#about to read 4, iclass 21, count 0 2006.229.05:47:10.67#ibcon#read 4, iclass 21, count 0 2006.229.05:47:10.67#ibcon#about to read 5, iclass 21, count 0 2006.229.05:47:10.67#ibcon#read 5, iclass 21, count 0 2006.229.05:47:10.67#ibcon#about to read 6, iclass 21, count 0 2006.229.05:47:10.67#ibcon#read 6, iclass 21, count 0 2006.229.05:47:10.67#ibcon#end of sib2, iclass 21, count 0 2006.229.05:47:10.67#ibcon#*after write, iclass 21, count 0 2006.229.05:47:10.67#ibcon#*before return 0, iclass 21, count 0 2006.229.05:47:10.67#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:47:10.67#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.05:47:10.67#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:47:10.67#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:47:10.67$vck44/valo=8,884.99 2006.229.05:47:10.67#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:47:10.67#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:47:10.67#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:10.67#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:10.67#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:10.67#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:10.67#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:47:10.67#ibcon#first serial, iclass 23, count 0 2006.229.05:47:10.67#ibcon#enter sib2, iclass 23, count 0 2006.229.05:47:10.67#ibcon#flushed, iclass 23, count 0 2006.229.05:47:10.67#ibcon#about to write, iclass 23, count 0 2006.229.05:47:10.67#ibcon#wrote, iclass 23, count 0 2006.229.05:47:10.67#ibcon#about to read 3, iclass 23, count 0 2006.229.05:47:10.69#ibcon#read 3, iclass 23, count 0 2006.229.05:47:10.69#ibcon#about to read 4, iclass 23, count 0 2006.229.05:47:10.69#ibcon#read 4, iclass 23, count 0 2006.229.05:47:10.69#ibcon#about to read 5, iclass 23, count 0 2006.229.05:47:10.69#ibcon#read 5, iclass 23, count 0 2006.229.05:47:10.69#ibcon#about to read 6, iclass 23, count 0 2006.229.05:47:10.69#ibcon#read 6, iclass 23, count 0 2006.229.05:47:10.69#ibcon#end of sib2, iclass 23, count 0 2006.229.05:47:10.69#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:47:10.69#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:47:10.69#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:47:10.69#ibcon#*before write, iclass 23, count 0 2006.229.05:47:10.69#ibcon#enter sib2, iclass 23, count 0 2006.229.05:47:10.69#ibcon#flushed, iclass 23, count 0 2006.229.05:47:10.69#ibcon#about to write, iclass 23, count 0 2006.229.05:47:10.69#ibcon#wrote, iclass 23, count 0 2006.229.05:47:10.69#ibcon#about to read 3, iclass 23, count 0 2006.229.05:47:10.73#ibcon#read 3, iclass 23, count 0 2006.229.05:47:10.73#ibcon#about to read 4, iclass 23, count 0 2006.229.05:47:10.73#ibcon#read 4, iclass 23, count 0 2006.229.05:47:10.73#ibcon#about to read 5, iclass 23, count 0 2006.229.05:47:10.73#ibcon#read 5, iclass 23, count 0 2006.229.05:47:10.73#ibcon#about to read 6, iclass 23, count 0 2006.229.05:47:10.73#ibcon#read 6, iclass 23, count 0 2006.229.05:47:10.73#ibcon#end of sib2, iclass 23, count 0 2006.229.05:47:10.73#ibcon#*after write, iclass 23, count 0 2006.229.05:47:10.73#ibcon#*before return 0, iclass 23, count 0 2006.229.05:47:10.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:10.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:10.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:47:10.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:47:10.73$vck44/va=8,6 2006.229.05:47:10.73#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:47:10.73#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:47:10.73#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:10.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:10.79#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:10.79#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:10.79#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:47:10.79#ibcon#first serial, iclass 25, count 2 2006.229.05:47:10.79#ibcon#enter sib2, iclass 25, count 2 2006.229.05:47:10.79#ibcon#flushed, iclass 25, count 2 2006.229.05:47:10.79#ibcon#about to write, iclass 25, count 2 2006.229.05:47:10.79#ibcon#wrote, iclass 25, count 2 2006.229.05:47:10.79#ibcon#about to read 3, iclass 25, count 2 2006.229.05:47:10.81#ibcon#read 3, iclass 25, count 2 2006.229.05:47:10.81#ibcon#about to read 4, iclass 25, count 2 2006.229.05:47:10.81#ibcon#read 4, iclass 25, count 2 2006.229.05:47:10.81#ibcon#about to read 5, iclass 25, count 2 2006.229.05:47:10.81#ibcon#read 5, iclass 25, count 2 2006.229.05:47:10.81#ibcon#about to read 6, iclass 25, count 2 2006.229.05:47:10.81#ibcon#read 6, iclass 25, count 2 2006.229.05:47:10.81#ibcon#end of sib2, iclass 25, count 2 2006.229.05:47:10.81#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:47:10.81#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:47:10.81#ibcon#[25=AT08-06\r\n] 2006.229.05:47:10.81#ibcon#*before write, iclass 25, count 2 2006.229.05:47:10.81#ibcon#enter sib2, iclass 25, count 2 2006.229.05:47:10.81#ibcon#flushed, iclass 25, count 2 2006.229.05:47:10.81#ibcon#about to write, iclass 25, count 2 2006.229.05:47:10.81#ibcon#wrote, iclass 25, count 2 2006.229.05:47:10.81#ibcon#about to read 3, iclass 25, count 2 2006.229.05:47:10.84#ibcon#read 3, iclass 25, count 2 2006.229.05:47:10.84#ibcon#about to read 4, iclass 25, count 2 2006.229.05:47:10.84#ibcon#read 4, iclass 25, count 2 2006.229.05:47:10.84#ibcon#about to read 5, iclass 25, count 2 2006.229.05:47:10.84#ibcon#read 5, iclass 25, count 2 2006.229.05:47:10.84#ibcon#about to read 6, iclass 25, count 2 2006.229.05:47:10.84#ibcon#read 6, iclass 25, count 2 2006.229.05:47:10.84#ibcon#end of sib2, iclass 25, count 2 2006.229.05:47:10.84#ibcon#*after write, iclass 25, count 2 2006.229.05:47:10.84#ibcon#*before return 0, iclass 25, count 2 2006.229.05:47:10.84#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:10.84#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:10.84#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:47:10.84#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:10.84#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:10.96#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:10.96#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:10.96#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:47:10.96#ibcon#first serial, iclass 25, count 0 2006.229.05:47:10.96#ibcon#enter sib2, iclass 25, count 0 2006.229.05:47:10.96#ibcon#flushed, iclass 25, count 0 2006.229.05:47:10.96#ibcon#about to write, iclass 25, count 0 2006.229.05:47:10.96#ibcon#wrote, iclass 25, count 0 2006.229.05:47:10.96#ibcon#about to read 3, iclass 25, count 0 2006.229.05:47:10.98#ibcon#read 3, iclass 25, count 0 2006.229.05:47:10.98#ibcon#about to read 4, iclass 25, count 0 2006.229.05:47:10.98#ibcon#read 4, iclass 25, count 0 2006.229.05:47:10.98#ibcon#about to read 5, iclass 25, count 0 2006.229.05:47:10.98#ibcon#read 5, iclass 25, count 0 2006.229.05:47:10.98#ibcon#about to read 6, iclass 25, count 0 2006.229.05:47:10.98#ibcon#read 6, iclass 25, count 0 2006.229.05:47:10.98#ibcon#end of sib2, iclass 25, count 0 2006.229.05:47:10.98#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:47:10.98#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:47:10.98#ibcon#[25=USB\r\n] 2006.229.05:47:10.98#ibcon#*before write, iclass 25, count 0 2006.229.05:47:10.98#ibcon#enter sib2, iclass 25, count 0 2006.229.05:47:10.98#ibcon#flushed, iclass 25, count 0 2006.229.05:47:10.98#ibcon#about to write, iclass 25, count 0 2006.229.05:47:10.98#ibcon#wrote, iclass 25, count 0 2006.229.05:47:10.98#ibcon#about to read 3, iclass 25, count 0 2006.229.05:47:11.01#ibcon#read 3, iclass 25, count 0 2006.229.05:47:11.01#ibcon#about to read 4, iclass 25, count 0 2006.229.05:47:11.01#ibcon#read 4, iclass 25, count 0 2006.229.05:47:11.01#ibcon#about to read 5, iclass 25, count 0 2006.229.05:47:11.01#ibcon#read 5, iclass 25, count 0 2006.229.05:47:11.01#ibcon#about to read 6, iclass 25, count 0 2006.229.05:47:11.01#ibcon#read 6, iclass 25, count 0 2006.229.05:47:11.01#ibcon#end of sib2, iclass 25, count 0 2006.229.05:47:11.01#ibcon#*after write, iclass 25, count 0 2006.229.05:47:11.01#ibcon#*before return 0, iclass 25, count 0 2006.229.05:47:11.01#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:11.01#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:11.01#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:47:11.01#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:47:11.01$vck44/vblo=1,629.99 2006.229.05:47:11.01#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:47:11.01#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:47:11.01#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:11.01#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:11.01#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:11.01#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:11.01#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:47:11.01#ibcon#first serial, iclass 27, count 0 2006.229.05:47:11.01#ibcon#enter sib2, iclass 27, count 0 2006.229.05:47:11.01#ibcon#flushed, iclass 27, count 0 2006.229.05:47:11.01#ibcon#about to write, iclass 27, count 0 2006.229.05:47:11.01#ibcon#wrote, iclass 27, count 0 2006.229.05:47:11.01#ibcon#about to read 3, iclass 27, count 0 2006.229.05:47:11.03#ibcon#read 3, iclass 27, count 0 2006.229.05:47:11.03#ibcon#about to read 4, iclass 27, count 0 2006.229.05:47:11.03#ibcon#read 4, iclass 27, count 0 2006.229.05:47:11.03#ibcon#about to read 5, iclass 27, count 0 2006.229.05:47:11.03#ibcon#read 5, iclass 27, count 0 2006.229.05:47:11.03#ibcon#about to read 6, iclass 27, count 0 2006.229.05:47:11.03#ibcon#read 6, iclass 27, count 0 2006.229.05:47:11.03#ibcon#end of sib2, iclass 27, count 0 2006.229.05:47:11.03#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:47:11.03#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:47:11.03#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:47:11.03#ibcon#*before write, iclass 27, count 0 2006.229.05:47:11.03#ibcon#enter sib2, iclass 27, count 0 2006.229.05:47:11.03#ibcon#flushed, iclass 27, count 0 2006.229.05:47:11.03#ibcon#about to write, iclass 27, count 0 2006.229.05:47:11.03#ibcon#wrote, iclass 27, count 0 2006.229.05:47:11.03#ibcon#about to read 3, iclass 27, count 0 2006.229.05:47:11.07#ibcon#read 3, iclass 27, count 0 2006.229.05:47:11.07#ibcon#about to read 4, iclass 27, count 0 2006.229.05:47:11.07#ibcon#read 4, iclass 27, count 0 2006.229.05:47:11.07#ibcon#about to read 5, iclass 27, count 0 2006.229.05:47:11.07#ibcon#read 5, iclass 27, count 0 2006.229.05:47:11.07#ibcon#about to read 6, iclass 27, count 0 2006.229.05:47:11.07#ibcon#read 6, iclass 27, count 0 2006.229.05:47:11.07#ibcon#end of sib2, iclass 27, count 0 2006.229.05:47:11.07#ibcon#*after write, iclass 27, count 0 2006.229.05:47:11.07#ibcon#*before return 0, iclass 27, count 0 2006.229.05:47:11.07#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:11.07#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:11.07#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:47:11.07#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:47:11.07$vck44/vb=1,4 2006.229.05:47:11.07#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.05:47:11.07#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.05:47:11.07#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:11.07#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:47:11.07#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:47:11.07#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:47:11.07#ibcon#enter wrdev, iclass 29, count 2 2006.229.05:47:11.07#ibcon#first serial, iclass 29, count 2 2006.229.05:47:11.07#ibcon#enter sib2, iclass 29, count 2 2006.229.05:47:11.07#ibcon#flushed, iclass 29, count 2 2006.229.05:47:11.07#ibcon#about to write, iclass 29, count 2 2006.229.05:47:11.07#ibcon#wrote, iclass 29, count 2 2006.229.05:47:11.07#ibcon#about to read 3, iclass 29, count 2 2006.229.05:47:11.09#ibcon#read 3, iclass 29, count 2 2006.229.05:47:11.09#ibcon#about to read 4, iclass 29, count 2 2006.229.05:47:11.09#ibcon#read 4, iclass 29, count 2 2006.229.05:47:11.09#ibcon#about to read 5, iclass 29, count 2 2006.229.05:47:11.09#ibcon#read 5, iclass 29, count 2 2006.229.05:47:11.09#ibcon#about to read 6, iclass 29, count 2 2006.229.05:47:11.09#ibcon#read 6, iclass 29, count 2 2006.229.05:47:11.09#ibcon#end of sib2, iclass 29, count 2 2006.229.05:47:11.09#ibcon#*mode == 0, iclass 29, count 2 2006.229.05:47:11.09#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.05:47:11.09#ibcon#[27=AT01-04\r\n] 2006.229.05:47:11.09#ibcon#*before write, iclass 29, count 2 2006.229.05:47:11.09#ibcon#enter sib2, iclass 29, count 2 2006.229.05:47:11.09#ibcon#flushed, iclass 29, count 2 2006.229.05:47:11.09#ibcon#about to write, iclass 29, count 2 2006.229.05:47:11.09#ibcon#wrote, iclass 29, count 2 2006.229.05:47:11.09#ibcon#about to read 3, iclass 29, count 2 2006.229.05:47:11.12#ibcon#read 3, iclass 29, count 2 2006.229.05:47:11.12#ibcon#about to read 4, iclass 29, count 2 2006.229.05:47:11.12#ibcon#read 4, iclass 29, count 2 2006.229.05:47:11.12#ibcon#about to read 5, iclass 29, count 2 2006.229.05:47:11.12#ibcon#read 5, iclass 29, count 2 2006.229.05:47:11.12#ibcon#about to read 6, iclass 29, count 2 2006.229.05:47:11.12#ibcon#read 6, iclass 29, count 2 2006.229.05:47:11.12#ibcon#end of sib2, iclass 29, count 2 2006.229.05:47:11.12#ibcon#*after write, iclass 29, count 2 2006.229.05:47:11.12#ibcon#*before return 0, iclass 29, count 2 2006.229.05:47:11.12#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:47:11.12#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.05:47:11.12#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.05:47:11.12#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:11.12#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:47:11.24#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:47:11.24#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:47:11.24#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:47:11.24#ibcon#first serial, iclass 29, count 0 2006.229.05:47:11.24#ibcon#enter sib2, iclass 29, count 0 2006.229.05:47:11.24#ibcon#flushed, iclass 29, count 0 2006.229.05:47:11.24#ibcon#about to write, iclass 29, count 0 2006.229.05:47:11.24#ibcon#wrote, iclass 29, count 0 2006.229.05:47:11.24#ibcon#about to read 3, iclass 29, count 0 2006.229.05:47:11.26#ibcon#read 3, iclass 29, count 0 2006.229.05:47:11.26#ibcon#about to read 4, iclass 29, count 0 2006.229.05:47:11.26#ibcon#read 4, iclass 29, count 0 2006.229.05:47:11.26#ibcon#about to read 5, iclass 29, count 0 2006.229.05:47:11.26#ibcon#read 5, iclass 29, count 0 2006.229.05:47:11.26#ibcon#about to read 6, iclass 29, count 0 2006.229.05:47:11.26#ibcon#read 6, iclass 29, count 0 2006.229.05:47:11.26#ibcon#end of sib2, iclass 29, count 0 2006.229.05:47:11.26#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:47:11.26#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:47:11.26#ibcon#[27=USB\r\n] 2006.229.05:47:11.26#ibcon#*before write, iclass 29, count 0 2006.229.05:47:11.26#ibcon#enter sib2, iclass 29, count 0 2006.229.05:47:11.26#ibcon#flushed, iclass 29, count 0 2006.229.05:47:11.26#ibcon#about to write, iclass 29, count 0 2006.229.05:47:11.26#ibcon#wrote, iclass 29, count 0 2006.229.05:47:11.26#ibcon#about to read 3, iclass 29, count 0 2006.229.05:47:11.29#ibcon#read 3, iclass 29, count 0 2006.229.05:47:11.29#ibcon#about to read 4, iclass 29, count 0 2006.229.05:47:11.29#ibcon#read 4, iclass 29, count 0 2006.229.05:47:11.29#ibcon#about to read 5, iclass 29, count 0 2006.229.05:47:11.29#ibcon#read 5, iclass 29, count 0 2006.229.05:47:11.29#ibcon#about to read 6, iclass 29, count 0 2006.229.05:47:11.29#ibcon#read 6, iclass 29, count 0 2006.229.05:47:11.29#ibcon#end of sib2, iclass 29, count 0 2006.229.05:47:11.29#ibcon#*after write, iclass 29, count 0 2006.229.05:47:11.29#ibcon#*before return 0, iclass 29, count 0 2006.229.05:47:11.29#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:47:11.29#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.05:47:11.29#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:47:11.29#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:47:11.29$vck44/vblo=2,634.99 2006.229.05:47:11.29#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.05:47:11.29#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.05:47:11.29#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:11.29#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:11.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:11.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:11.29#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:47:11.29#ibcon#first serial, iclass 31, count 0 2006.229.05:47:11.29#ibcon#enter sib2, iclass 31, count 0 2006.229.05:47:11.29#ibcon#flushed, iclass 31, count 0 2006.229.05:47:11.29#ibcon#about to write, iclass 31, count 0 2006.229.05:47:11.29#ibcon#wrote, iclass 31, count 0 2006.229.05:47:11.29#ibcon#about to read 3, iclass 31, count 0 2006.229.05:47:11.31#ibcon#read 3, iclass 31, count 0 2006.229.05:47:11.31#ibcon#about to read 4, iclass 31, count 0 2006.229.05:47:11.31#ibcon#read 4, iclass 31, count 0 2006.229.05:47:11.31#ibcon#about to read 5, iclass 31, count 0 2006.229.05:47:11.31#ibcon#read 5, iclass 31, count 0 2006.229.05:47:11.31#ibcon#about to read 6, iclass 31, count 0 2006.229.05:47:11.31#ibcon#read 6, iclass 31, count 0 2006.229.05:47:11.31#ibcon#end of sib2, iclass 31, count 0 2006.229.05:47:11.31#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:47:11.31#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:47:11.31#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:47:11.31#ibcon#*before write, iclass 31, count 0 2006.229.05:47:11.31#ibcon#enter sib2, iclass 31, count 0 2006.229.05:47:11.31#ibcon#flushed, iclass 31, count 0 2006.229.05:47:11.31#ibcon#about to write, iclass 31, count 0 2006.229.05:47:11.31#ibcon#wrote, iclass 31, count 0 2006.229.05:47:11.31#ibcon#about to read 3, iclass 31, count 0 2006.229.05:47:11.35#ibcon#read 3, iclass 31, count 0 2006.229.05:47:11.35#ibcon#about to read 4, iclass 31, count 0 2006.229.05:47:11.35#ibcon#read 4, iclass 31, count 0 2006.229.05:47:11.35#ibcon#about to read 5, iclass 31, count 0 2006.229.05:47:11.35#ibcon#read 5, iclass 31, count 0 2006.229.05:47:11.35#ibcon#about to read 6, iclass 31, count 0 2006.229.05:47:11.35#ibcon#read 6, iclass 31, count 0 2006.229.05:47:11.35#ibcon#end of sib2, iclass 31, count 0 2006.229.05:47:11.35#ibcon#*after write, iclass 31, count 0 2006.229.05:47:11.35#ibcon#*before return 0, iclass 31, count 0 2006.229.05:47:11.35#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:11.35#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.05:47:11.35#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:47:11.35#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:47:11.35$vck44/vb=2,4 2006.229.05:47:11.35#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.05:47:11.35#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.05:47:11.35#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:11.35#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:11.41#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:11.41#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:11.41#ibcon#enter wrdev, iclass 33, count 2 2006.229.05:47:11.41#ibcon#first serial, iclass 33, count 2 2006.229.05:47:11.41#ibcon#enter sib2, iclass 33, count 2 2006.229.05:47:11.41#ibcon#flushed, iclass 33, count 2 2006.229.05:47:11.41#ibcon#about to write, iclass 33, count 2 2006.229.05:47:11.41#ibcon#wrote, iclass 33, count 2 2006.229.05:47:11.41#ibcon#about to read 3, iclass 33, count 2 2006.229.05:47:11.43#ibcon#read 3, iclass 33, count 2 2006.229.05:47:11.43#ibcon#about to read 4, iclass 33, count 2 2006.229.05:47:11.43#ibcon#read 4, iclass 33, count 2 2006.229.05:47:11.43#ibcon#about to read 5, iclass 33, count 2 2006.229.05:47:11.43#ibcon#read 5, iclass 33, count 2 2006.229.05:47:11.43#ibcon#about to read 6, iclass 33, count 2 2006.229.05:47:11.43#ibcon#read 6, iclass 33, count 2 2006.229.05:47:11.43#ibcon#end of sib2, iclass 33, count 2 2006.229.05:47:11.43#ibcon#*mode == 0, iclass 33, count 2 2006.229.05:47:11.43#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.05:47:11.43#ibcon#[27=AT02-04\r\n] 2006.229.05:47:11.43#ibcon#*before write, iclass 33, count 2 2006.229.05:47:11.43#ibcon#enter sib2, iclass 33, count 2 2006.229.05:47:11.43#ibcon#flushed, iclass 33, count 2 2006.229.05:47:11.43#ibcon#about to write, iclass 33, count 2 2006.229.05:47:11.43#ibcon#wrote, iclass 33, count 2 2006.229.05:47:11.43#ibcon#about to read 3, iclass 33, count 2 2006.229.05:47:11.46#ibcon#read 3, iclass 33, count 2 2006.229.05:47:11.46#ibcon#about to read 4, iclass 33, count 2 2006.229.05:47:11.46#ibcon#read 4, iclass 33, count 2 2006.229.05:47:11.46#ibcon#about to read 5, iclass 33, count 2 2006.229.05:47:11.46#ibcon#read 5, iclass 33, count 2 2006.229.05:47:11.46#ibcon#about to read 6, iclass 33, count 2 2006.229.05:47:11.46#ibcon#read 6, iclass 33, count 2 2006.229.05:47:11.46#ibcon#end of sib2, iclass 33, count 2 2006.229.05:47:11.46#ibcon#*after write, iclass 33, count 2 2006.229.05:47:11.46#ibcon#*before return 0, iclass 33, count 2 2006.229.05:47:11.46#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:11.46#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.05:47:11.46#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.05:47:11.46#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:11.46#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:11.58#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:11.58#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:11.58#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:47:11.58#ibcon#first serial, iclass 33, count 0 2006.229.05:47:11.58#ibcon#enter sib2, iclass 33, count 0 2006.229.05:47:11.58#ibcon#flushed, iclass 33, count 0 2006.229.05:47:11.58#ibcon#about to write, iclass 33, count 0 2006.229.05:47:11.58#ibcon#wrote, iclass 33, count 0 2006.229.05:47:11.58#ibcon#about to read 3, iclass 33, count 0 2006.229.05:47:11.60#ibcon#read 3, iclass 33, count 0 2006.229.05:47:11.60#ibcon#about to read 4, iclass 33, count 0 2006.229.05:47:11.60#ibcon#read 4, iclass 33, count 0 2006.229.05:47:11.60#ibcon#about to read 5, iclass 33, count 0 2006.229.05:47:11.60#ibcon#read 5, iclass 33, count 0 2006.229.05:47:11.60#ibcon#about to read 6, iclass 33, count 0 2006.229.05:47:11.60#ibcon#read 6, iclass 33, count 0 2006.229.05:47:11.60#ibcon#end of sib2, iclass 33, count 0 2006.229.05:47:11.60#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:47:11.60#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:47:11.60#ibcon#[27=USB\r\n] 2006.229.05:47:11.60#ibcon#*before write, iclass 33, count 0 2006.229.05:47:11.60#ibcon#enter sib2, iclass 33, count 0 2006.229.05:47:11.60#ibcon#flushed, iclass 33, count 0 2006.229.05:47:11.60#ibcon#about to write, iclass 33, count 0 2006.229.05:47:11.60#ibcon#wrote, iclass 33, count 0 2006.229.05:47:11.60#ibcon#about to read 3, iclass 33, count 0 2006.229.05:47:11.63#ibcon#read 3, iclass 33, count 0 2006.229.05:47:11.63#ibcon#about to read 4, iclass 33, count 0 2006.229.05:47:11.63#ibcon#read 4, iclass 33, count 0 2006.229.05:47:11.63#ibcon#about to read 5, iclass 33, count 0 2006.229.05:47:11.63#ibcon#read 5, iclass 33, count 0 2006.229.05:47:11.63#ibcon#about to read 6, iclass 33, count 0 2006.229.05:47:11.63#ibcon#read 6, iclass 33, count 0 2006.229.05:47:11.63#ibcon#end of sib2, iclass 33, count 0 2006.229.05:47:11.63#ibcon#*after write, iclass 33, count 0 2006.229.05:47:11.63#ibcon#*before return 0, iclass 33, count 0 2006.229.05:47:11.63#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:11.63#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.05:47:11.63#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:47:11.63#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:47:11.63$vck44/vblo=3,649.99 2006.229.05:47:11.63#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.05:47:11.63#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.05:47:11.63#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:11.63#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:11.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:11.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:11.63#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:47:11.63#ibcon#first serial, iclass 35, count 0 2006.229.05:47:11.63#ibcon#enter sib2, iclass 35, count 0 2006.229.05:47:11.63#ibcon#flushed, iclass 35, count 0 2006.229.05:47:11.63#ibcon#about to write, iclass 35, count 0 2006.229.05:47:11.63#ibcon#wrote, iclass 35, count 0 2006.229.05:47:11.63#ibcon#about to read 3, iclass 35, count 0 2006.229.05:47:11.65#ibcon#read 3, iclass 35, count 0 2006.229.05:47:11.65#ibcon#about to read 4, iclass 35, count 0 2006.229.05:47:11.65#ibcon#read 4, iclass 35, count 0 2006.229.05:47:11.65#ibcon#about to read 5, iclass 35, count 0 2006.229.05:47:11.65#ibcon#read 5, iclass 35, count 0 2006.229.05:47:11.65#ibcon#about to read 6, iclass 35, count 0 2006.229.05:47:11.65#ibcon#read 6, iclass 35, count 0 2006.229.05:47:11.65#ibcon#end of sib2, iclass 35, count 0 2006.229.05:47:11.65#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:47:11.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:47:11.65#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:47:11.65#ibcon#*before write, iclass 35, count 0 2006.229.05:47:11.65#ibcon#enter sib2, iclass 35, count 0 2006.229.05:47:11.65#ibcon#flushed, iclass 35, count 0 2006.229.05:47:11.65#ibcon#about to write, iclass 35, count 0 2006.229.05:47:11.65#ibcon#wrote, iclass 35, count 0 2006.229.05:47:11.65#ibcon#about to read 3, iclass 35, count 0 2006.229.05:47:11.69#ibcon#read 3, iclass 35, count 0 2006.229.05:47:11.69#ibcon#about to read 4, iclass 35, count 0 2006.229.05:47:11.69#ibcon#read 4, iclass 35, count 0 2006.229.05:47:11.69#ibcon#about to read 5, iclass 35, count 0 2006.229.05:47:11.69#ibcon#read 5, iclass 35, count 0 2006.229.05:47:11.69#ibcon#about to read 6, iclass 35, count 0 2006.229.05:47:11.69#ibcon#read 6, iclass 35, count 0 2006.229.05:47:11.69#ibcon#end of sib2, iclass 35, count 0 2006.229.05:47:11.69#ibcon#*after write, iclass 35, count 0 2006.229.05:47:11.69#ibcon#*before return 0, iclass 35, count 0 2006.229.05:47:11.69#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:11.69#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.05:47:11.69#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:47:11.69#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:47:11.69$vck44/vb=3,4 2006.229.05:47:11.69#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.05:47:11.69#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.05:47:11.69#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:11.69#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:11.75#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:11.75#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:11.75#ibcon#enter wrdev, iclass 37, count 2 2006.229.05:47:11.75#ibcon#first serial, iclass 37, count 2 2006.229.05:47:11.75#ibcon#enter sib2, iclass 37, count 2 2006.229.05:47:11.75#ibcon#flushed, iclass 37, count 2 2006.229.05:47:11.75#ibcon#about to write, iclass 37, count 2 2006.229.05:47:11.75#ibcon#wrote, iclass 37, count 2 2006.229.05:47:11.75#ibcon#about to read 3, iclass 37, count 2 2006.229.05:47:11.77#ibcon#read 3, iclass 37, count 2 2006.229.05:47:11.77#ibcon#about to read 4, iclass 37, count 2 2006.229.05:47:11.77#ibcon#read 4, iclass 37, count 2 2006.229.05:47:11.77#ibcon#about to read 5, iclass 37, count 2 2006.229.05:47:11.77#ibcon#read 5, iclass 37, count 2 2006.229.05:47:11.77#ibcon#about to read 6, iclass 37, count 2 2006.229.05:47:11.77#ibcon#read 6, iclass 37, count 2 2006.229.05:47:11.77#ibcon#end of sib2, iclass 37, count 2 2006.229.05:47:11.77#ibcon#*mode == 0, iclass 37, count 2 2006.229.05:47:11.77#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.05:47:11.77#ibcon#[27=AT03-04\r\n] 2006.229.05:47:11.77#ibcon#*before write, iclass 37, count 2 2006.229.05:47:11.77#ibcon#enter sib2, iclass 37, count 2 2006.229.05:47:11.77#ibcon#flushed, iclass 37, count 2 2006.229.05:47:11.77#ibcon#about to write, iclass 37, count 2 2006.229.05:47:11.77#ibcon#wrote, iclass 37, count 2 2006.229.05:47:11.77#ibcon#about to read 3, iclass 37, count 2 2006.229.05:47:11.80#ibcon#read 3, iclass 37, count 2 2006.229.05:47:11.80#ibcon#about to read 4, iclass 37, count 2 2006.229.05:47:11.80#ibcon#read 4, iclass 37, count 2 2006.229.05:47:11.80#ibcon#about to read 5, iclass 37, count 2 2006.229.05:47:11.80#ibcon#read 5, iclass 37, count 2 2006.229.05:47:11.80#ibcon#about to read 6, iclass 37, count 2 2006.229.05:47:11.80#ibcon#read 6, iclass 37, count 2 2006.229.05:47:11.80#ibcon#end of sib2, iclass 37, count 2 2006.229.05:47:11.80#ibcon#*after write, iclass 37, count 2 2006.229.05:47:11.80#ibcon#*before return 0, iclass 37, count 2 2006.229.05:47:11.80#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:11.80#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.05:47:11.80#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.05:47:11.80#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:11.80#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:11.92#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:11.92#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:11.92#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:47:11.92#ibcon#first serial, iclass 37, count 0 2006.229.05:47:11.92#ibcon#enter sib2, iclass 37, count 0 2006.229.05:47:11.92#ibcon#flushed, iclass 37, count 0 2006.229.05:47:11.92#ibcon#about to write, iclass 37, count 0 2006.229.05:47:11.92#ibcon#wrote, iclass 37, count 0 2006.229.05:47:11.92#ibcon#about to read 3, iclass 37, count 0 2006.229.05:47:11.94#ibcon#read 3, iclass 37, count 0 2006.229.05:47:11.94#ibcon#about to read 4, iclass 37, count 0 2006.229.05:47:11.94#ibcon#read 4, iclass 37, count 0 2006.229.05:47:11.94#ibcon#about to read 5, iclass 37, count 0 2006.229.05:47:11.94#ibcon#read 5, iclass 37, count 0 2006.229.05:47:11.94#ibcon#about to read 6, iclass 37, count 0 2006.229.05:47:11.94#ibcon#read 6, iclass 37, count 0 2006.229.05:47:11.94#ibcon#end of sib2, iclass 37, count 0 2006.229.05:47:11.94#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:47:11.94#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:47:11.94#ibcon#[27=USB\r\n] 2006.229.05:47:11.94#ibcon#*before write, iclass 37, count 0 2006.229.05:47:11.94#ibcon#enter sib2, iclass 37, count 0 2006.229.05:47:11.94#ibcon#flushed, iclass 37, count 0 2006.229.05:47:11.94#ibcon#about to write, iclass 37, count 0 2006.229.05:47:11.94#ibcon#wrote, iclass 37, count 0 2006.229.05:47:11.94#ibcon#about to read 3, iclass 37, count 0 2006.229.05:47:11.97#ibcon#read 3, iclass 37, count 0 2006.229.05:47:11.97#ibcon#about to read 4, iclass 37, count 0 2006.229.05:47:11.97#ibcon#read 4, iclass 37, count 0 2006.229.05:47:11.97#ibcon#about to read 5, iclass 37, count 0 2006.229.05:47:11.97#ibcon#read 5, iclass 37, count 0 2006.229.05:47:11.97#ibcon#about to read 6, iclass 37, count 0 2006.229.05:47:11.97#ibcon#read 6, iclass 37, count 0 2006.229.05:47:11.97#ibcon#end of sib2, iclass 37, count 0 2006.229.05:47:11.97#ibcon#*after write, iclass 37, count 0 2006.229.05:47:11.97#ibcon#*before return 0, iclass 37, count 0 2006.229.05:47:11.97#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:11.97#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.05:47:11.97#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:47:11.97#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:47:11.97$vck44/vblo=4,679.99 2006.229.05:47:11.97#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:47:11.97#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:47:11.97#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:11.97#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:11.97#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:11.97#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:11.97#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:47:11.97#ibcon#first serial, iclass 39, count 0 2006.229.05:47:11.97#ibcon#enter sib2, iclass 39, count 0 2006.229.05:47:11.97#ibcon#flushed, iclass 39, count 0 2006.229.05:47:11.97#ibcon#about to write, iclass 39, count 0 2006.229.05:47:11.97#ibcon#wrote, iclass 39, count 0 2006.229.05:47:11.97#ibcon#about to read 3, iclass 39, count 0 2006.229.05:47:11.99#ibcon#read 3, iclass 39, count 0 2006.229.05:47:11.99#ibcon#about to read 4, iclass 39, count 0 2006.229.05:47:11.99#ibcon#read 4, iclass 39, count 0 2006.229.05:47:11.99#ibcon#about to read 5, iclass 39, count 0 2006.229.05:47:11.99#ibcon#read 5, iclass 39, count 0 2006.229.05:47:11.99#ibcon#about to read 6, iclass 39, count 0 2006.229.05:47:11.99#ibcon#read 6, iclass 39, count 0 2006.229.05:47:11.99#ibcon#end of sib2, iclass 39, count 0 2006.229.05:47:11.99#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:47:11.99#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:47:11.99#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:47:11.99#ibcon#*before write, iclass 39, count 0 2006.229.05:47:11.99#ibcon#enter sib2, iclass 39, count 0 2006.229.05:47:11.99#ibcon#flushed, iclass 39, count 0 2006.229.05:47:11.99#ibcon#about to write, iclass 39, count 0 2006.229.05:47:11.99#ibcon#wrote, iclass 39, count 0 2006.229.05:47:11.99#ibcon#about to read 3, iclass 39, count 0 2006.229.05:47:12.03#ibcon#read 3, iclass 39, count 0 2006.229.05:47:12.03#ibcon#about to read 4, iclass 39, count 0 2006.229.05:47:12.03#ibcon#read 4, iclass 39, count 0 2006.229.05:47:12.03#ibcon#about to read 5, iclass 39, count 0 2006.229.05:47:12.03#ibcon#read 5, iclass 39, count 0 2006.229.05:47:12.03#ibcon#about to read 6, iclass 39, count 0 2006.229.05:47:12.03#ibcon#read 6, iclass 39, count 0 2006.229.05:47:12.03#ibcon#end of sib2, iclass 39, count 0 2006.229.05:47:12.03#ibcon#*after write, iclass 39, count 0 2006.229.05:47:12.03#ibcon#*before return 0, iclass 39, count 0 2006.229.05:47:12.03#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:12.03#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:47:12.03#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:47:12.03#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:47:12.03$vck44/vb=4,4 2006.229.05:47:12.03#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.05:47:12.03#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.05:47:12.03#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:12.03#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:12.09#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:12.09#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:12.09#ibcon#enter wrdev, iclass 3, count 2 2006.229.05:47:12.09#ibcon#first serial, iclass 3, count 2 2006.229.05:47:12.09#ibcon#enter sib2, iclass 3, count 2 2006.229.05:47:12.09#ibcon#flushed, iclass 3, count 2 2006.229.05:47:12.09#ibcon#about to write, iclass 3, count 2 2006.229.05:47:12.09#ibcon#wrote, iclass 3, count 2 2006.229.05:47:12.09#ibcon#about to read 3, iclass 3, count 2 2006.229.05:47:12.11#ibcon#read 3, iclass 3, count 2 2006.229.05:47:12.11#ibcon#about to read 4, iclass 3, count 2 2006.229.05:47:12.11#ibcon#read 4, iclass 3, count 2 2006.229.05:47:12.11#ibcon#about to read 5, iclass 3, count 2 2006.229.05:47:12.11#ibcon#read 5, iclass 3, count 2 2006.229.05:47:12.11#ibcon#about to read 6, iclass 3, count 2 2006.229.05:47:12.11#ibcon#read 6, iclass 3, count 2 2006.229.05:47:12.11#ibcon#end of sib2, iclass 3, count 2 2006.229.05:47:12.11#ibcon#*mode == 0, iclass 3, count 2 2006.229.05:47:12.11#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.05:47:12.11#ibcon#[27=AT04-04\r\n] 2006.229.05:47:12.11#ibcon#*before write, iclass 3, count 2 2006.229.05:47:12.11#ibcon#enter sib2, iclass 3, count 2 2006.229.05:47:12.11#ibcon#flushed, iclass 3, count 2 2006.229.05:47:12.11#ibcon#about to write, iclass 3, count 2 2006.229.05:47:12.11#ibcon#wrote, iclass 3, count 2 2006.229.05:47:12.11#ibcon#about to read 3, iclass 3, count 2 2006.229.05:47:12.14#ibcon#read 3, iclass 3, count 2 2006.229.05:47:12.14#ibcon#about to read 4, iclass 3, count 2 2006.229.05:47:12.14#ibcon#read 4, iclass 3, count 2 2006.229.05:47:12.14#ibcon#about to read 5, iclass 3, count 2 2006.229.05:47:12.14#ibcon#read 5, iclass 3, count 2 2006.229.05:47:12.14#ibcon#about to read 6, iclass 3, count 2 2006.229.05:47:12.14#ibcon#read 6, iclass 3, count 2 2006.229.05:47:12.14#ibcon#end of sib2, iclass 3, count 2 2006.229.05:47:12.14#ibcon#*after write, iclass 3, count 2 2006.229.05:47:12.14#ibcon#*before return 0, iclass 3, count 2 2006.229.05:47:12.14#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:12.14#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.05:47:12.14#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.05:47:12.14#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:12.14#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:12.26#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:12.26#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:12.26#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:47:12.26#ibcon#first serial, iclass 3, count 0 2006.229.05:47:12.26#ibcon#enter sib2, iclass 3, count 0 2006.229.05:47:12.26#ibcon#flushed, iclass 3, count 0 2006.229.05:47:12.26#ibcon#about to write, iclass 3, count 0 2006.229.05:47:12.26#ibcon#wrote, iclass 3, count 0 2006.229.05:47:12.26#ibcon#about to read 3, iclass 3, count 0 2006.229.05:47:12.28#ibcon#read 3, iclass 3, count 0 2006.229.05:47:12.28#ibcon#about to read 4, iclass 3, count 0 2006.229.05:47:12.28#ibcon#read 4, iclass 3, count 0 2006.229.05:47:12.28#ibcon#about to read 5, iclass 3, count 0 2006.229.05:47:12.28#ibcon#read 5, iclass 3, count 0 2006.229.05:47:12.28#ibcon#about to read 6, iclass 3, count 0 2006.229.05:47:12.28#ibcon#read 6, iclass 3, count 0 2006.229.05:47:12.28#ibcon#end of sib2, iclass 3, count 0 2006.229.05:47:12.28#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:47:12.28#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:47:12.28#ibcon#[27=USB\r\n] 2006.229.05:47:12.28#ibcon#*before write, iclass 3, count 0 2006.229.05:47:12.28#ibcon#enter sib2, iclass 3, count 0 2006.229.05:47:12.28#ibcon#flushed, iclass 3, count 0 2006.229.05:47:12.28#ibcon#about to write, iclass 3, count 0 2006.229.05:47:12.28#ibcon#wrote, iclass 3, count 0 2006.229.05:47:12.28#ibcon#about to read 3, iclass 3, count 0 2006.229.05:47:12.31#ibcon#read 3, iclass 3, count 0 2006.229.05:47:12.31#ibcon#about to read 4, iclass 3, count 0 2006.229.05:47:12.31#ibcon#read 4, iclass 3, count 0 2006.229.05:47:12.31#ibcon#about to read 5, iclass 3, count 0 2006.229.05:47:12.31#ibcon#read 5, iclass 3, count 0 2006.229.05:47:12.31#ibcon#about to read 6, iclass 3, count 0 2006.229.05:47:12.31#ibcon#read 6, iclass 3, count 0 2006.229.05:47:12.31#ibcon#end of sib2, iclass 3, count 0 2006.229.05:47:12.31#ibcon#*after write, iclass 3, count 0 2006.229.05:47:12.31#ibcon#*before return 0, iclass 3, count 0 2006.229.05:47:12.31#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:12.31#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.05:47:12.31#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:47:12.31#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:47:12.31$vck44/vblo=5,709.99 2006.229.05:47:12.31#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.05:47:12.31#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.05:47:12.31#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:12.31#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:12.31#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:12.31#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:12.31#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:47:12.31#ibcon#first serial, iclass 5, count 0 2006.229.05:47:12.31#ibcon#enter sib2, iclass 5, count 0 2006.229.05:47:12.31#ibcon#flushed, iclass 5, count 0 2006.229.05:47:12.31#ibcon#about to write, iclass 5, count 0 2006.229.05:47:12.31#ibcon#wrote, iclass 5, count 0 2006.229.05:47:12.31#ibcon#about to read 3, iclass 5, count 0 2006.229.05:47:12.33#ibcon#read 3, iclass 5, count 0 2006.229.05:47:12.33#ibcon#about to read 4, iclass 5, count 0 2006.229.05:47:12.33#ibcon#read 4, iclass 5, count 0 2006.229.05:47:12.33#ibcon#about to read 5, iclass 5, count 0 2006.229.05:47:12.33#ibcon#read 5, iclass 5, count 0 2006.229.05:47:12.33#ibcon#about to read 6, iclass 5, count 0 2006.229.05:47:12.33#ibcon#read 6, iclass 5, count 0 2006.229.05:47:12.33#ibcon#end of sib2, iclass 5, count 0 2006.229.05:47:12.33#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:47:12.33#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:47:12.33#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:47:12.33#ibcon#*before write, iclass 5, count 0 2006.229.05:47:12.33#ibcon#enter sib2, iclass 5, count 0 2006.229.05:47:12.33#ibcon#flushed, iclass 5, count 0 2006.229.05:47:12.33#ibcon#about to write, iclass 5, count 0 2006.229.05:47:12.33#ibcon#wrote, iclass 5, count 0 2006.229.05:47:12.33#ibcon#about to read 3, iclass 5, count 0 2006.229.05:47:12.37#ibcon#read 3, iclass 5, count 0 2006.229.05:47:12.37#ibcon#about to read 4, iclass 5, count 0 2006.229.05:47:12.37#ibcon#read 4, iclass 5, count 0 2006.229.05:47:12.37#ibcon#about to read 5, iclass 5, count 0 2006.229.05:47:12.37#ibcon#read 5, iclass 5, count 0 2006.229.05:47:12.37#ibcon#about to read 6, iclass 5, count 0 2006.229.05:47:12.37#ibcon#read 6, iclass 5, count 0 2006.229.05:47:12.37#ibcon#end of sib2, iclass 5, count 0 2006.229.05:47:12.37#ibcon#*after write, iclass 5, count 0 2006.229.05:47:12.37#ibcon#*before return 0, iclass 5, count 0 2006.229.05:47:12.37#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:12.37#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.05:47:12.37#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:47:12.37#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:47:12.37$vck44/vb=5,4 2006.229.05:47:12.37#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.05:47:12.37#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.05:47:12.37#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:12.37#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:12.43#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:12.43#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:12.43#ibcon#enter wrdev, iclass 7, count 2 2006.229.05:47:12.43#ibcon#first serial, iclass 7, count 2 2006.229.05:47:12.43#ibcon#enter sib2, iclass 7, count 2 2006.229.05:47:12.43#ibcon#flushed, iclass 7, count 2 2006.229.05:47:12.43#ibcon#about to write, iclass 7, count 2 2006.229.05:47:12.43#ibcon#wrote, iclass 7, count 2 2006.229.05:47:12.43#ibcon#about to read 3, iclass 7, count 2 2006.229.05:47:12.45#ibcon#read 3, iclass 7, count 2 2006.229.05:47:12.45#ibcon#about to read 4, iclass 7, count 2 2006.229.05:47:12.45#ibcon#read 4, iclass 7, count 2 2006.229.05:47:12.45#ibcon#about to read 5, iclass 7, count 2 2006.229.05:47:12.45#ibcon#read 5, iclass 7, count 2 2006.229.05:47:12.45#ibcon#about to read 6, iclass 7, count 2 2006.229.05:47:12.45#ibcon#read 6, iclass 7, count 2 2006.229.05:47:12.45#ibcon#end of sib2, iclass 7, count 2 2006.229.05:47:12.45#ibcon#*mode == 0, iclass 7, count 2 2006.229.05:47:12.45#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.05:47:12.45#ibcon#[27=AT05-04\r\n] 2006.229.05:47:12.45#ibcon#*before write, iclass 7, count 2 2006.229.05:47:12.45#ibcon#enter sib2, iclass 7, count 2 2006.229.05:47:12.45#ibcon#flushed, iclass 7, count 2 2006.229.05:47:12.45#ibcon#about to write, iclass 7, count 2 2006.229.05:47:12.45#ibcon#wrote, iclass 7, count 2 2006.229.05:47:12.45#ibcon#about to read 3, iclass 7, count 2 2006.229.05:47:12.48#ibcon#read 3, iclass 7, count 2 2006.229.05:47:12.48#ibcon#about to read 4, iclass 7, count 2 2006.229.05:47:12.48#ibcon#read 4, iclass 7, count 2 2006.229.05:47:12.48#ibcon#about to read 5, iclass 7, count 2 2006.229.05:47:12.48#ibcon#read 5, iclass 7, count 2 2006.229.05:47:12.48#ibcon#about to read 6, iclass 7, count 2 2006.229.05:47:12.48#ibcon#read 6, iclass 7, count 2 2006.229.05:47:12.48#ibcon#end of sib2, iclass 7, count 2 2006.229.05:47:12.48#ibcon#*after write, iclass 7, count 2 2006.229.05:47:12.48#ibcon#*before return 0, iclass 7, count 2 2006.229.05:47:12.48#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:12.48#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.05:47:12.48#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.05:47:12.48#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:12.48#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:12.60#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:12.60#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:12.60#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:47:12.60#ibcon#first serial, iclass 7, count 0 2006.229.05:47:12.60#ibcon#enter sib2, iclass 7, count 0 2006.229.05:47:12.60#ibcon#flushed, iclass 7, count 0 2006.229.05:47:12.60#ibcon#about to write, iclass 7, count 0 2006.229.05:47:12.60#ibcon#wrote, iclass 7, count 0 2006.229.05:47:12.60#ibcon#about to read 3, iclass 7, count 0 2006.229.05:47:12.62#ibcon#read 3, iclass 7, count 0 2006.229.05:47:12.62#ibcon#about to read 4, iclass 7, count 0 2006.229.05:47:12.62#ibcon#read 4, iclass 7, count 0 2006.229.05:47:12.62#ibcon#about to read 5, iclass 7, count 0 2006.229.05:47:12.62#ibcon#read 5, iclass 7, count 0 2006.229.05:47:12.62#ibcon#about to read 6, iclass 7, count 0 2006.229.05:47:12.62#ibcon#read 6, iclass 7, count 0 2006.229.05:47:12.62#ibcon#end of sib2, iclass 7, count 0 2006.229.05:47:12.62#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:47:12.62#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:47:12.62#ibcon#[27=USB\r\n] 2006.229.05:47:12.62#ibcon#*before write, iclass 7, count 0 2006.229.05:47:12.62#ibcon#enter sib2, iclass 7, count 0 2006.229.05:47:12.62#ibcon#flushed, iclass 7, count 0 2006.229.05:47:12.62#ibcon#about to write, iclass 7, count 0 2006.229.05:47:12.62#ibcon#wrote, iclass 7, count 0 2006.229.05:47:12.62#ibcon#about to read 3, iclass 7, count 0 2006.229.05:47:12.65#ibcon#read 3, iclass 7, count 0 2006.229.05:47:12.65#ibcon#about to read 4, iclass 7, count 0 2006.229.05:47:12.65#ibcon#read 4, iclass 7, count 0 2006.229.05:47:12.65#ibcon#about to read 5, iclass 7, count 0 2006.229.05:47:12.65#ibcon#read 5, iclass 7, count 0 2006.229.05:47:12.65#ibcon#about to read 6, iclass 7, count 0 2006.229.05:47:12.65#ibcon#read 6, iclass 7, count 0 2006.229.05:47:12.65#ibcon#end of sib2, iclass 7, count 0 2006.229.05:47:12.65#ibcon#*after write, iclass 7, count 0 2006.229.05:47:12.65#ibcon#*before return 0, iclass 7, count 0 2006.229.05:47:12.65#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:12.65#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.05:47:12.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:47:12.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:47:12.65$vck44/vblo=6,719.99 2006.229.05:47:12.65#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.05:47:12.65#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.05:47:12.65#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:12.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:12.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:12.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:12.65#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:47:12.65#ibcon#first serial, iclass 11, count 0 2006.229.05:47:12.65#ibcon#enter sib2, iclass 11, count 0 2006.229.05:47:12.65#ibcon#flushed, iclass 11, count 0 2006.229.05:47:12.65#ibcon#about to write, iclass 11, count 0 2006.229.05:47:12.65#ibcon#wrote, iclass 11, count 0 2006.229.05:47:12.65#ibcon#about to read 3, iclass 11, count 0 2006.229.05:47:12.67#ibcon#read 3, iclass 11, count 0 2006.229.05:47:12.67#ibcon#about to read 4, iclass 11, count 0 2006.229.05:47:12.67#ibcon#read 4, iclass 11, count 0 2006.229.05:47:12.67#ibcon#about to read 5, iclass 11, count 0 2006.229.05:47:12.67#ibcon#read 5, iclass 11, count 0 2006.229.05:47:12.67#ibcon#about to read 6, iclass 11, count 0 2006.229.05:47:12.67#ibcon#read 6, iclass 11, count 0 2006.229.05:47:12.67#ibcon#end of sib2, iclass 11, count 0 2006.229.05:47:12.67#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:47:12.67#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:47:12.67#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:47:12.67#ibcon#*before write, iclass 11, count 0 2006.229.05:47:12.67#ibcon#enter sib2, iclass 11, count 0 2006.229.05:47:12.67#ibcon#flushed, iclass 11, count 0 2006.229.05:47:12.67#ibcon#about to write, iclass 11, count 0 2006.229.05:47:12.67#ibcon#wrote, iclass 11, count 0 2006.229.05:47:12.67#ibcon#about to read 3, iclass 11, count 0 2006.229.05:47:12.71#ibcon#read 3, iclass 11, count 0 2006.229.05:47:12.71#ibcon#about to read 4, iclass 11, count 0 2006.229.05:47:12.71#ibcon#read 4, iclass 11, count 0 2006.229.05:47:12.71#ibcon#about to read 5, iclass 11, count 0 2006.229.05:47:12.71#ibcon#read 5, iclass 11, count 0 2006.229.05:47:12.71#ibcon#about to read 6, iclass 11, count 0 2006.229.05:47:12.71#ibcon#read 6, iclass 11, count 0 2006.229.05:47:12.71#ibcon#end of sib2, iclass 11, count 0 2006.229.05:47:12.71#ibcon#*after write, iclass 11, count 0 2006.229.05:47:12.71#ibcon#*before return 0, iclass 11, count 0 2006.229.05:47:12.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:12.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.05:47:12.71#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:47:12.71#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:47:12.71$vck44/vb=6,4 2006.229.05:47:12.71#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.05:47:12.71#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.05:47:12.71#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:12.71#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:12.77#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:12.77#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:12.77#ibcon#enter wrdev, iclass 13, count 2 2006.229.05:47:12.77#ibcon#first serial, iclass 13, count 2 2006.229.05:47:12.77#ibcon#enter sib2, iclass 13, count 2 2006.229.05:47:12.77#ibcon#flushed, iclass 13, count 2 2006.229.05:47:12.77#ibcon#about to write, iclass 13, count 2 2006.229.05:47:12.77#ibcon#wrote, iclass 13, count 2 2006.229.05:47:12.77#ibcon#about to read 3, iclass 13, count 2 2006.229.05:47:12.79#ibcon#read 3, iclass 13, count 2 2006.229.05:47:12.79#ibcon#about to read 4, iclass 13, count 2 2006.229.05:47:12.79#ibcon#read 4, iclass 13, count 2 2006.229.05:47:12.79#ibcon#about to read 5, iclass 13, count 2 2006.229.05:47:12.79#ibcon#read 5, iclass 13, count 2 2006.229.05:47:12.79#ibcon#about to read 6, iclass 13, count 2 2006.229.05:47:12.79#ibcon#read 6, iclass 13, count 2 2006.229.05:47:12.79#ibcon#end of sib2, iclass 13, count 2 2006.229.05:47:12.79#ibcon#*mode == 0, iclass 13, count 2 2006.229.05:47:12.79#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.05:47:12.79#ibcon#[27=AT06-04\r\n] 2006.229.05:47:12.79#ibcon#*before write, iclass 13, count 2 2006.229.05:47:12.79#ibcon#enter sib2, iclass 13, count 2 2006.229.05:47:12.79#ibcon#flushed, iclass 13, count 2 2006.229.05:47:12.79#ibcon#about to write, iclass 13, count 2 2006.229.05:47:12.79#ibcon#wrote, iclass 13, count 2 2006.229.05:47:12.79#ibcon#about to read 3, iclass 13, count 2 2006.229.05:47:12.82#ibcon#read 3, iclass 13, count 2 2006.229.05:47:12.82#ibcon#about to read 4, iclass 13, count 2 2006.229.05:47:12.82#ibcon#read 4, iclass 13, count 2 2006.229.05:47:12.82#ibcon#about to read 5, iclass 13, count 2 2006.229.05:47:12.82#ibcon#read 5, iclass 13, count 2 2006.229.05:47:12.82#ibcon#about to read 6, iclass 13, count 2 2006.229.05:47:12.82#ibcon#read 6, iclass 13, count 2 2006.229.05:47:12.82#ibcon#end of sib2, iclass 13, count 2 2006.229.05:47:12.82#ibcon#*after write, iclass 13, count 2 2006.229.05:47:12.82#ibcon#*before return 0, iclass 13, count 2 2006.229.05:47:12.82#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:12.82#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.05:47:12.82#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.05:47:12.82#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:12.82#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:12.94#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:12.94#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:12.94#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:47:12.94#ibcon#first serial, iclass 13, count 0 2006.229.05:47:12.94#ibcon#enter sib2, iclass 13, count 0 2006.229.05:47:12.94#ibcon#flushed, iclass 13, count 0 2006.229.05:47:12.94#ibcon#about to write, iclass 13, count 0 2006.229.05:47:12.94#ibcon#wrote, iclass 13, count 0 2006.229.05:47:12.94#ibcon#about to read 3, iclass 13, count 0 2006.229.05:47:12.96#ibcon#read 3, iclass 13, count 0 2006.229.05:47:12.96#ibcon#about to read 4, iclass 13, count 0 2006.229.05:47:12.96#ibcon#read 4, iclass 13, count 0 2006.229.05:47:12.96#ibcon#about to read 5, iclass 13, count 0 2006.229.05:47:12.96#ibcon#read 5, iclass 13, count 0 2006.229.05:47:12.96#ibcon#about to read 6, iclass 13, count 0 2006.229.05:47:12.96#ibcon#read 6, iclass 13, count 0 2006.229.05:47:12.96#ibcon#end of sib2, iclass 13, count 0 2006.229.05:47:12.96#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:47:12.96#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:47:12.96#ibcon#[27=USB\r\n] 2006.229.05:47:12.96#ibcon#*before write, iclass 13, count 0 2006.229.05:47:12.96#ibcon#enter sib2, iclass 13, count 0 2006.229.05:47:12.96#ibcon#flushed, iclass 13, count 0 2006.229.05:47:12.96#ibcon#about to write, iclass 13, count 0 2006.229.05:47:12.96#ibcon#wrote, iclass 13, count 0 2006.229.05:47:12.96#ibcon#about to read 3, iclass 13, count 0 2006.229.05:47:12.99#ibcon#read 3, iclass 13, count 0 2006.229.05:47:12.99#ibcon#about to read 4, iclass 13, count 0 2006.229.05:47:12.99#ibcon#read 4, iclass 13, count 0 2006.229.05:47:12.99#ibcon#about to read 5, iclass 13, count 0 2006.229.05:47:12.99#ibcon#read 5, iclass 13, count 0 2006.229.05:47:12.99#ibcon#about to read 6, iclass 13, count 0 2006.229.05:47:12.99#ibcon#read 6, iclass 13, count 0 2006.229.05:47:12.99#ibcon#end of sib2, iclass 13, count 0 2006.229.05:47:12.99#ibcon#*after write, iclass 13, count 0 2006.229.05:47:12.99#ibcon#*before return 0, iclass 13, count 0 2006.229.05:47:12.99#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:12.99#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.05:47:12.99#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:47:12.99#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:47:12.99$vck44/vblo=7,734.99 2006.229.05:47:12.99#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.05:47:12.99#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.05:47:12.99#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:12.99#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:47:12.99#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:47:12.99#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:47:12.99#ibcon#enter wrdev, iclass 16, count 0 2006.229.05:47:12.99#ibcon#first serial, iclass 16, count 0 2006.229.05:47:12.99#ibcon#enter sib2, iclass 16, count 0 2006.229.05:47:12.99#ibcon#flushed, iclass 16, count 0 2006.229.05:47:12.99#ibcon#about to write, iclass 16, count 0 2006.229.05:47:12.99#ibcon#wrote, iclass 16, count 0 2006.229.05:47:12.99#ibcon#about to read 3, iclass 16, count 0 2006.229.05:47:13.01#ibcon#read 3, iclass 16, count 0 2006.229.05:47:13.01#ibcon#about to read 4, iclass 16, count 0 2006.229.05:47:13.01#ibcon#read 4, iclass 16, count 0 2006.229.05:47:13.01#ibcon#about to read 5, iclass 16, count 0 2006.229.05:47:13.01#ibcon#read 5, iclass 16, count 0 2006.229.05:47:13.01#ibcon#about to read 6, iclass 16, count 0 2006.229.05:47:13.01#ibcon#read 6, iclass 16, count 0 2006.229.05:47:13.01#ibcon#end of sib2, iclass 16, count 0 2006.229.05:47:13.01#ibcon#*mode == 0, iclass 16, count 0 2006.229.05:47:13.01#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.05:47:13.01#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:47:13.01#ibcon#*before write, iclass 16, count 0 2006.229.05:47:13.01#ibcon#enter sib2, iclass 16, count 0 2006.229.05:47:13.01#ibcon#flushed, iclass 16, count 0 2006.229.05:47:13.01#ibcon#about to write, iclass 16, count 0 2006.229.05:47:13.01#ibcon#wrote, iclass 16, count 0 2006.229.05:47:13.01#ibcon#about to read 3, iclass 16, count 0 2006.229.05:47:13.02#abcon#<5=/04 3.7 6.8 30.67 90 999.7\r\n> 2006.229.05:47:13.04#abcon#{5=INTERFACE CLEAR} 2006.229.05:47:13.05#ibcon#read 3, iclass 16, count 0 2006.229.05:47:13.05#ibcon#about to read 4, iclass 16, count 0 2006.229.05:47:13.05#ibcon#read 4, iclass 16, count 0 2006.229.05:47:13.05#ibcon#about to read 5, iclass 16, count 0 2006.229.05:47:13.05#ibcon#read 5, iclass 16, count 0 2006.229.05:47:13.05#ibcon#about to read 6, iclass 16, count 0 2006.229.05:47:13.05#ibcon#read 6, iclass 16, count 0 2006.229.05:47:13.05#ibcon#end of sib2, iclass 16, count 0 2006.229.05:47:13.05#ibcon#*after write, iclass 16, count 0 2006.229.05:47:13.05#ibcon#*before return 0, iclass 16, count 0 2006.229.05:47:13.05#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:47:13.05#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.05:47:13.05#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.05:47:13.05#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.05:47:13.05$vck44/vb=7,4 2006.229.05:47:13.05#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.05:47:13.05#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.05:47:13.05#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:13.05#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:47:13.10#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:47:13.11#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:47:13.11#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:47:13.11#ibcon#enter wrdev, iclass 20, count 2 2006.229.05:47:13.11#ibcon#first serial, iclass 20, count 2 2006.229.05:47:13.11#ibcon#enter sib2, iclass 20, count 2 2006.229.05:47:13.11#ibcon#flushed, iclass 20, count 2 2006.229.05:47:13.11#ibcon#about to write, iclass 20, count 2 2006.229.05:47:13.11#ibcon#wrote, iclass 20, count 2 2006.229.05:47:13.11#ibcon#about to read 3, iclass 20, count 2 2006.229.05:47:13.13#ibcon#read 3, iclass 20, count 2 2006.229.05:47:13.13#ibcon#about to read 4, iclass 20, count 2 2006.229.05:47:13.13#ibcon#read 4, iclass 20, count 2 2006.229.05:47:13.13#ibcon#about to read 5, iclass 20, count 2 2006.229.05:47:13.13#ibcon#read 5, iclass 20, count 2 2006.229.05:47:13.13#ibcon#about to read 6, iclass 20, count 2 2006.229.05:47:13.13#ibcon#read 6, iclass 20, count 2 2006.229.05:47:13.13#ibcon#end of sib2, iclass 20, count 2 2006.229.05:47:13.13#ibcon#*mode == 0, iclass 20, count 2 2006.229.05:47:13.13#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.05:47:13.13#ibcon#[27=AT07-04\r\n] 2006.229.05:47:13.13#ibcon#*before write, iclass 20, count 2 2006.229.05:47:13.13#ibcon#enter sib2, iclass 20, count 2 2006.229.05:47:13.13#ibcon#flushed, iclass 20, count 2 2006.229.05:47:13.13#ibcon#about to write, iclass 20, count 2 2006.229.05:47:13.13#ibcon#wrote, iclass 20, count 2 2006.229.05:47:13.13#ibcon#about to read 3, iclass 20, count 2 2006.229.05:47:13.16#ibcon#read 3, iclass 20, count 2 2006.229.05:47:13.16#ibcon#about to read 4, iclass 20, count 2 2006.229.05:47:13.16#ibcon#read 4, iclass 20, count 2 2006.229.05:47:13.16#ibcon#about to read 5, iclass 20, count 2 2006.229.05:47:13.16#ibcon#read 5, iclass 20, count 2 2006.229.05:47:13.16#ibcon#about to read 6, iclass 20, count 2 2006.229.05:47:13.16#ibcon#read 6, iclass 20, count 2 2006.229.05:47:13.16#ibcon#end of sib2, iclass 20, count 2 2006.229.05:47:13.16#ibcon#*after write, iclass 20, count 2 2006.229.05:47:13.16#ibcon#*before return 0, iclass 20, count 2 2006.229.05:47:13.16#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:47:13.16#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.05:47:13.16#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.05:47:13.16#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:13.16#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:47:13.28#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:47:13.28#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:47:13.28#ibcon#enter wrdev, iclass 20, count 0 2006.229.05:47:13.28#ibcon#first serial, iclass 20, count 0 2006.229.05:47:13.28#ibcon#enter sib2, iclass 20, count 0 2006.229.05:47:13.28#ibcon#flushed, iclass 20, count 0 2006.229.05:47:13.28#ibcon#about to write, iclass 20, count 0 2006.229.05:47:13.28#ibcon#wrote, iclass 20, count 0 2006.229.05:47:13.28#ibcon#about to read 3, iclass 20, count 0 2006.229.05:47:13.30#ibcon#read 3, iclass 20, count 0 2006.229.05:47:13.30#ibcon#about to read 4, iclass 20, count 0 2006.229.05:47:13.30#ibcon#read 4, iclass 20, count 0 2006.229.05:47:13.30#ibcon#about to read 5, iclass 20, count 0 2006.229.05:47:13.30#ibcon#read 5, iclass 20, count 0 2006.229.05:47:13.30#ibcon#about to read 6, iclass 20, count 0 2006.229.05:47:13.30#ibcon#read 6, iclass 20, count 0 2006.229.05:47:13.30#ibcon#end of sib2, iclass 20, count 0 2006.229.05:47:13.30#ibcon#*mode == 0, iclass 20, count 0 2006.229.05:47:13.30#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.05:47:13.30#ibcon#[27=USB\r\n] 2006.229.05:47:13.30#ibcon#*before write, iclass 20, count 0 2006.229.05:47:13.30#ibcon#enter sib2, iclass 20, count 0 2006.229.05:47:13.30#ibcon#flushed, iclass 20, count 0 2006.229.05:47:13.30#ibcon#about to write, iclass 20, count 0 2006.229.05:47:13.30#ibcon#wrote, iclass 20, count 0 2006.229.05:47:13.30#ibcon#about to read 3, iclass 20, count 0 2006.229.05:47:13.33#ibcon#read 3, iclass 20, count 0 2006.229.05:47:13.33#ibcon#about to read 4, iclass 20, count 0 2006.229.05:47:13.33#ibcon#read 4, iclass 20, count 0 2006.229.05:47:13.33#ibcon#about to read 5, iclass 20, count 0 2006.229.05:47:13.33#ibcon#read 5, iclass 20, count 0 2006.229.05:47:13.33#ibcon#about to read 6, iclass 20, count 0 2006.229.05:47:13.33#ibcon#read 6, iclass 20, count 0 2006.229.05:47:13.33#ibcon#end of sib2, iclass 20, count 0 2006.229.05:47:13.33#ibcon#*after write, iclass 20, count 0 2006.229.05:47:13.33#ibcon#*before return 0, iclass 20, count 0 2006.229.05:47:13.33#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:47:13.33#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.05:47:13.33#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.05:47:13.33#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.05:47:13.33$vck44/vblo=8,744.99 2006.229.05:47:13.33#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.05:47:13.33#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.05:47:13.33#ibcon#ireg 17 cls_cnt 0 2006.229.05:47:13.33#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:13.33#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:13.33#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:13.33#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:47:13.33#ibcon#first serial, iclass 23, count 0 2006.229.05:47:13.33#ibcon#enter sib2, iclass 23, count 0 2006.229.05:47:13.33#ibcon#flushed, iclass 23, count 0 2006.229.05:47:13.33#ibcon#about to write, iclass 23, count 0 2006.229.05:47:13.33#ibcon#wrote, iclass 23, count 0 2006.229.05:47:13.33#ibcon#about to read 3, iclass 23, count 0 2006.229.05:47:13.35#ibcon#read 3, iclass 23, count 0 2006.229.05:47:13.35#ibcon#about to read 4, iclass 23, count 0 2006.229.05:47:13.35#ibcon#read 4, iclass 23, count 0 2006.229.05:47:13.35#ibcon#about to read 5, iclass 23, count 0 2006.229.05:47:13.35#ibcon#read 5, iclass 23, count 0 2006.229.05:47:13.35#ibcon#about to read 6, iclass 23, count 0 2006.229.05:47:13.35#ibcon#read 6, iclass 23, count 0 2006.229.05:47:13.35#ibcon#end of sib2, iclass 23, count 0 2006.229.05:47:13.35#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:47:13.35#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:47:13.35#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:47:13.35#ibcon#*before write, iclass 23, count 0 2006.229.05:47:13.35#ibcon#enter sib2, iclass 23, count 0 2006.229.05:47:13.35#ibcon#flushed, iclass 23, count 0 2006.229.05:47:13.35#ibcon#about to write, iclass 23, count 0 2006.229.05:47:13.35#ibcon#wrote, iclass 23, count 0 2006.229.05:47:13.35#ibcon#about to read 3, iclass 23, count 0 2006.229.05:47:13.39#ibcon#read 3, iclass 23, count 0 2006.229.05:47:13.39#ibcon#about to read 4, iclass 23, count 0 2006.229.05:47:13.39#ibcon#read 4, iclass 23, count 0 2006.229.05:47:13.39#ibcon#about to read 5, iclass 23, count 0 2006.229.05:47:13.39#ibcon#read 5, iclass 23, count 0 2006.229.05:47:13.39#ibcon#about to read 6, iclass 23, count 0 2006.229.05:47:13.39#ibcon#read 6, iclass 23, count 0 2006.229.05:47:13.39#ibcon#end of sib2, iclass 23, count 0 2006.229.05:47:13.39#ibcon#*after write, iclass 23, count 0 2006.229.05:47:13.39#ibcon#*before return 0, iclass 23, count 0 2006.229.05:47:13.39#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:13.39#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.05:47:13.39#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:47:13.39#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:47:13.39$vck44/vb=8,4 2006.229.05:47:13.39#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.05:47:13.39#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.05:47:13.39#ibcon#ireg 11 cls_cnt 2 2006.229.05:47:13.39#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:13.45#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:13.45#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:13.45#ibcon#enter wrdev, iclass 25, count 2 2006.229.05:47:13.45#ibcon#first serial, iclass 25, count 2 2006.229.05:47:13.45#ibcon#enter sib2, iclass 25, count 2 2006.229.05:47:13.45#ibcon#flushed, iclass 25, count 2 2006.229.05:47:13.45#ibcon#about to write, iclass 25, count 2 2006.229.05:47:13.45#ibcon#wrote, iclass 25, count 2 2006.229.05:47:13.45#ibcon#about to read 3, iclass 25, count 2 2006.229.05:47:13.47#ibcon#read 3, iclass 25, count 2 2006.229.05:47:13.47#ibcon#about to read 4, iclass 25, count 2 2006.229.05:47:13.47#ibcon#read 4, iclass 25, count 2 2006.229.05:47:13.47#ibcon#about to read 5, iclass 25, count 2 2006.229.05:47:13.47#ibcon#read 5, iclass 25, count 2 2006.229.05:47:13.47#ibcon#about to read 6, iclass 25, count 2 2006.229.05:47:13.47#ibcon#read 6, iclass 25, count 2 2006.229.05:47:13.47#ibcon#end of sib2, iclass 25, count 2 2006.229.05:47:13.47#ibcon#*mode == 0, iclass 25, count 2 2006.229.05:47:13.47#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.05:47:13.47#ibcon#[27=AT08-04\r\n] 2006.229.05:47:13.47#ibcon#*before write, iclass 25, count 2 2006.229.05:47:13.47#ibcon#enter sib2, iclass 25, count 2 2006.229.05:47:13.47#ibcon#flushed, iclass 25, count 2 2006.229.05:47:13.47#ibcon#about to write, iclass 25, count 2 2006.229.05:47:13.47#ibcon#wrote, iclass 25, count 2 2006.229.05:47:13.47#ibcon#about to read 3, iclass 25, count 2 2006.229.05:47:13.50#ibcon#read 3, iclass 25, count 2 2006.229.05:47:13.50#ibcon#about to read 4, iclass 25, count 2 2006.229.05:47:13.50#ibcon#read 4, iclass 25, count 2 2006.229.05:47:13.50#ibcon#about to read 5, iclass 25, count 2 2006.229.05:47:13.50#ibcon#read 5, iclass 25, count 2 2006.229.05:47:13.50#ibcon#about to read 6, iclass 25, count 2 2006.229.05:47:13.50#ibcon#read 6, iclass 25, count 2 2006.229.05:47:13.50#ibcon#end of sib2, iclass 25, count 2 2006.229.05:47:13.50#ibcon#*after write, iclass 25, count 2 2006.229.05:47:13.50#ibcon#*before return 0, iclass 25, count 2 2006.229.05:47:13.50#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:13.50#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.05:47:13.50#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.05:47:13.50#ibcon#ireg 7 cls_cnt 0 2006.229.05:47:13.50#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:13.62#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:13.62#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:13.62#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:47:13.62#ibcon#first serial, iclass 25, count 0 2006.229.05:47:13.62#ibcon#enter sib2, iclass 25, count 0 2006.229.05:47:13.62#ibcon#flushed, iclass 25, count 0 2006.229.05:47:13.62#ibcon#about to write, iclass 25, count 0 2006.229.05:47:13.62#ibcon#wrote, iclass 25, count 0 2006.229.05:47:13.62#ibcon#about to read 3, iclass 25, count 0 2006.229.05:47:13.64#ibcon#read 3, iclass 25, count 0 2006.229.05:47:13.64#ibcon#about to read 4, iclass 25, count 0 2006.229.05:47:13.64#ibcon#read 4, iclass 25, count 0 2006.229.05:47:13.64#ibcon#about to read 5, iclass 25, count 0 2006.229.05:47:13.64#ibcon#read 5, iclass 25, count 0 2006.229.05:47:13.64#ibcon#about to read 6, iclass 25, count 0 2006.229.05:47:13.64#ibcon#read 6, iclass 25, count 0 2006.229.05:47:13.64#ibcon#end of sib2, iclass 25, count 0 2006.229.05:47:13.64#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:47:13.64#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:47:13.64#ibcon#[27=USB\r\n] 2006.229.05:47:13.64#ibcon#*before write, iclass 25, count 0 2006.229.05:47:13.64#ibcon#enter sib2, iclass 25, count 0 2006.229.05:47:13.64#ibcon#flushed, iclass 25, count 0 2006.229.05:47:13.64#ibcon#about to write, iclass 25, count 0 2006.229.05:47:13.64#ibcon#wrote, iclass 25, count 0 2006.229.05:47:13.64#ibcon#about to read 3, iclass 25, count 0 2006.229.05:47:13.67#ibcon#read 3, iclass 25, count 0 2006.229.05:47:13.67#ibcon#about to read 4, iclass 25, count 0 2006.229.05:47:13.67#ibcon#read 4, iclass 25, count 0 2006.229.05:47:13.67#ibcon#about to read 5, iclass 25, count 0 2006.229.05:47:13.67#ibcon#read 5, iclass 25, count 0 2006.229.05:47:13.67#ibcon#about to read 6, iclass 25, count 0 2006.229.05:47:13.67#ibcon#read 6, iclass 25, count 0 2006.229.05:47:13.67#ibcon#end of sib2, iclass 25, count 0 2006.229.05:47:13.67#ibcon#*after write, iclass 25, count 0 2006.229.05:47:13.67#ibcon#*before return 0, iclass 25, count 0 2006.229.05:47:13.67#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:13.67#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.05:47:13.67#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:47:13.67#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:47:13.67$vck44/vabw=wide 2006.229.05:47:13.67#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.05:47:13.67#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.05:47:13.67#ibcon#ireg 8 cls_cnt 0 2006.229.05:47:13.67#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:13.67#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:13.67#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:13.67#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:47:13.67#ibcon#first serial, iclass 27, count 0 2006.229.05:47:13.67#ibcon#enter sib2, iclass 27, count 0 2006.229.05:47:13.67#ibcon#flushed, iclass 27, count 0 2006.229.05:47:13.67#ibcon#about to write, iclass 27, count 0 2006.229.05:47:13.67#ibcon#wrote, iclass 27, count 0 2006.229.05:47:13.67#ibcon#about to read 3, iclass 27, count 0 2006.229.05:47:13.69#ibcon#read 3, iclass 27, count 0 2006.229.05:47:13.69#ibcon#about to read 4, iclass 27, count 0 2006.229.05:47:13.69#ibcon#read 4, iclass 27, count 0 2006.229.05:47:13.69#ibcon#about to read 5, iclass 27, count 0 2006.229.05:47:13.69#ibcon#read 5, iclass 27, count 0 2006.229.05:47:13.69#ibcon#about to read 6, iclass 27, count 0 2006.229.05:47:13.69#ibcon#read 6, iclass 27, count 0 2006.229.05:47:13.69#ibcon#end of sib2, iclass 27, count 0 2006.229.05:47:13.69#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:47:13.69#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:47:13.69#ibcon#[25=BW32\r\n] 2006.229.05:47:13.69#ibcon#*before write, iclass 27, count 0 2006.229.05:47:13.69#ibcon#enter sib2, iclass 27, count 0 2006.229.05:47:13.69#ibcon#flushed, iclass 27, count 0 2006.229.05:47:13.69#ibcon#about to write, iclass 27, count 0 2006.229.05:47:13.69#ibcon#wrote, iclass 27, count 0 2006.229.05:47:13.69#ibcon#about to read 3, iclass 27, count 0 2006.229.05:47:13.72#ibcon#read 3, iclass 27, count 0 2006.229.05:47:13.72#ibcon#about to read 4, iclass 27, count 0 2006.229.05:47:13.72#ibcon#read 4, iclass 27, count 0 2006.229.05:47:13.72#ibcon#about to read 5, iclass 27, count 0 2006.229.05:47:13.72#ibcon#read 5, iclass 27, count 0 2006.229.05:47:13.72#ibcon#about to read 6, iclass 27, count 0 2006.229.05:47:13.72#ibcon#read 6, iclass 27, count 0 2006.229.05:47:13.72#ibcon#end of sib2, iclass 27, count 0 2006.229.05:47:13.72#ibcon#*after write, iclass 27, count 0 2006.229.05:47:13.72#ibcon#*before return 0, iclass 27, count 0 2006.229.05:47:13.72#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:13.72#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.05:47:13.72#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:47:13.72#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:47:13.72$vck44/vbbw=wide 2006.229.05:47:13.72#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:47:13.72#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:47:13.72#ibcon#ireg 8 cls_cnt 0 2006.229.05:47:13.72#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:47:13.79#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:47:13.79#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:47:13.79#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:47:13.79#ibcon#first serial, iclass 29, count 0 2006.229.05:47:13.79#ibcon#enter sib2, iclass 29, count 0 2006.229.05:47:13.79#ibcon#flushed, iclass 29, count 0 2006.229.05:47:13.79#ibcon#about to write, iclass 29, count 0 2006.229.05:47:13.79#ibcon#wrote, iclass 29, count 0 2006.229.05:47:13.79#ibcon#about to read 3, iclass 29, count 0 2006.229.05:47:13.81#ibcon#read 3, iclass 29, count 0 2006.229.05:47:13.81#ibcon#about to read 4, iclass 29, count 0 2006.229.05:47:13.81#ibcon#read 4, iclass 29, count 0 2006.229.05:47:13.81#ibcon#about to read 5, iclass 29, count 0 2006.229.05:47:13.81#ibcon#read 5, iclass 29, count 0 2006.229.05:47:13.81#ibcon#about to read 6, iclass 29, count 0 2006.229.05:47:13.81#ibcon#read 6, iclass 29, count 0 2006.229.05:47:13.81#ibcon#end of sib2, iclass 29, count 0 2006.229.05:47:13.81#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:47:13.81#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:47:13.81#ibcon#[27=BW32\r\n] 2006.229.05:47:13.81#ibcon#*before write, iclass 29, count 0 2006.229.05:47:13.81#ibcon#enter sib2, iclass 29, count 0 2006.229.05:47:13.81#ibcon#flushed, iclass 29, count 0 2006.229.05:47:13.81#ibcon#about to write, iclass 29, count 0 2006.229.05:47:13.81#ibcon#wrote, iclass 29, count 0 2006.229.05:47:13.81#ibcon#about to read 3, iclass 29, count 0 2006.229.05:47:13.84#ibcon#read 3, iclass 29, count 0 2006.229.05:47:13.84#ibcon#about to read 4, iclass 29, count 0 2006.229.05:47:13.84#ibcon#read 4, iclass 29, count 0 2006.229.05:47:13.84#ibcon#about to read 5, iclass 29, count 0 2006.229.05:47:13.84#ibcon#read 5, iclass 29, count 0 2006.229.05:47:13.84#ibcon#about to read 6, iclass 29, count 0 2006.229.05:47:13.84#ibcon#read 6, iclass 29, count 0 2006.229.05:47:13.84#ibcon#end of sib2, iclass 29, count 0 2006.229.05:47:13.84#ibcon#*after write, iclass 29, count 0 2006.229.05:47:13.84#ibcon#*before return 0, iclass 29, count 0 2006.229.05:47:13.84#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:47:13.84#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:47:13.84#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:47:13.84#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:47:13.84$setupk4/ifdk4 2006.229.05:47:13.84$ifdk4/lo= 2006.229.05:47:13.84$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:47:13.84$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:47:13.84$ifdk4/patch= 2006.229.05:47:13.84$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:47:13.84$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:47:13.84$setupk4/!*+20s 2006.229.05:47:23.19#abcon#<5=/04 3.7 6.8 30.67 90 999.7\r\n> 2006.229.05:47:23.21#abcon#{5=INTERFACE CLEAR} 2006.229.05:47:23.27#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:47:28.32$setupk4/"tpicd 2006.229.05:47:28.32$setupk4/echo=off 2006.229.05:47:28.32$setupk4/xlog=off 2006.229.05:47:28.32:!2006.229.05:53:50 2006.229.05:47:56.14#trakl#Source acquired 2006.229.05:47:57.14#flagr#flagr/antenna,acquired 2006.229.05:53:50.00:preob 2006.229.05:53:50.14/onsource/TRACKING 2006.229.05:53:50.14:!2006.229.05:54:00 2006.229.05:54:00.00:"tape 2006.229.05:54:00.00:"st=record 2006.229.05:54:00.00:data_valid=on 2006.229.05:54:00.00:midob 2006.229.05:54:00.14/onsource/TRACKING 2006.229.05:54:00.14/wx/30.60,999.6,90 2006.229.05:54:00.22/cable/+6.3984E-03 2006.229.05:54:01.31/va/01,08,usb,yes,29,32 2006.229.05:54:01.31/va/02,07,usb,yes,32,32 2006.229.05:54:01.31/va/03,06,usb,yes,39,42 2006.229.05:54:01.31/va/04,07,usb,yes,33,34 2006.229.05:54:01.31/va/05,04,usb,yes,29,30 2006.229.05:54:01.31/va/06,04,usb,yes,33,32 2006.229.05:54:01.31/va/07,05,usb,yes,29,30 2006.229.05:54:01.31/va/08,06,usb,yes,21,26 2006.229.05:54:01.54/valo/01,524.99,yes,locked 2006.229.05:54:01.54/valo/02,534.99,yes,locked 2006.229.05:54:01.54/valo/03,564.99,yes,locked 2006.229.05:54:01.54/valo/04,624.99,yes,locked 2006.229.05:54:01.54/valo/05,734.99,yes,locked 2006.229.05:54:01.54/valo/06,814.99,yes,locked 2006.229.05:54:01.54/valo/07,864.99,yes,locked 2006.229.05:54:01.54/valo/08,884.99,yes,locked 2006.229.05:54:02.63/vb/01,04,usb,yes,31,29 2006.229.05:54:02.63/vb/02,04,usb,yes,33,33 2006.229.05:54:02.63/vb/03,04,usb,yes,30,33 2006.229.05:54:02.63/vb/04,04,usb,yes,35,34 2006.229.05:54:02.63/vb/05,04,usb,yes,27,29 2006.229.05:54:02.63/vb/06,04,usb,yes,32,28 2006.229.05:54:02.63/vb/07,04,usb,yes,31,31 2006.229.05:54:02.63/vb/08,04,usb,yes,29,32 2006.229.05:54:02.87/vblo/01,629.99,yes,locked 2006.229.05:54:02.87/vblo/02,634.99,yes,locked 2006.229.05:54:02.87/vblo/03,649.99,yes,locked 2006.229.05:54:02.87/vblo/04,679.99,yes,locked 2006.229.05:54:02.87/vblo/05,709.99,yes,locked 2006.229.05:54:02.87/vblo/06,719.99,yes,locked 2006.229.05:54:02.87/vblo/07,734.99,yes,locked 2006.229.05:54:02.87/vblo/08,744.99,yes,locked 2006.229.05:54:03.02/vabw/8 2006.229.05:54:03.17/vbbw/8 2006.229.05:54:03.26/xfe/off,on,12.0 2006.229.05:54:03.63/ifatt/23,28,28,28 2006.229.05:54:04.07/fmout-gps/S +4.46E-07 2006.229.05:54:04.11:!2006.229.05:57:00 2006.229.05:57:00.01:data_valid=off 2006.229.05:57:00.01:"et 2006.229.05:57:00.02:!+3s 2006.229.05:57:03.03:"tape 2006.229.05:57:03.03:postob 2006.229.05:57:03.13/cable/+6.3971E-03 2006.229.05:57:03.13/wx/30.61,999.5,91 2006.229.05:57:03.19/fmout-gps/S +4.45E-07 2006.229.05:57:03.19:scan_name=229-0559,jd0608,40 2006.229.05:57:03.20:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.05:57:04.14#flagr#flagr/antenna,new-source 2006.229.05:57:04.14:checkk5 2006.229.05:57:04.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.05:57:04.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.05:57:05.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.05:57:05.91/chk_autoobs//k5ts4/ autoobs is running! 2006.229.05:57:06.31/chk_obsdata//k5ts1/T2290554??a.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:57:06.70/chk_obsdata//k5ts2/T2290554??b.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:57:07.12/chk_obsdata//k5ts3/T2290554??c.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:57:07.53/chk_obsdata//k5ts4/T2290554??d.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.05:57:08.24/k5log//k5ts1_log_newline 2006.229.05:57:08.94/k5log//k5ts2_log_newline 2006.229.05:57:09.65/k5log//k5ts3_log_newline 2006.229.05:57:10.36/k5log//k5ts4_log_newline 2006.229.05:57:10.38/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.05:57:10.38:setupk4=1 2006.229.05:57:10.38$setupk4/echo=on 2006.229.05:57:10.38$setupk4/pcalon 2006.229.05:57:10.38$pcalon/"no phase cal control is implemented here 2006.229.05:57:10.39$setupk4/"tpicd=stop 2006.229.05:57:10.39$setupk4/"rec=synch_on 2006.229.05:57:10.39$setupk4/"rec_mode=128 2006.229.05:57:10.39$setupk4/!* 2006.229.05:57:10.39$setupk4/recpk4 2006.229.05:57:10.39$recpk4/recpatch= 2006.229.05:57:10.39$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.05:57:10.39$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.05:57:10.39$setupk4/vck44 2006.229.05:57:10.39$vck44/valo=1,524.99 2006.229.05:57:10.39#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.05:57:10.39#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.05:57:10.39#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:10.39#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:10.39#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:10.39#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:10.39#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:57:10.39#ibcon#first serial, iclass 7, count 0 2006.229.05:57:10.39#ibcon#enter sib2, iclass 7, count 0 2006.229.05:57:10.39#ibcon#flushed, iclass 7, count 0 2006.229.05:57:10.39#ibcon#about to write, iclass 7, count 0 2006.229.05:57:10.39#ibcon#wrote, iclass 7, count 0 2006.229.05:57:10.39#ibcon#about to read 3, iclass 7, count 0 2006.229.05:57:10.41#ibcon#read 3, iclass 7, count 0 2006.229.05:57:10.41#ibcon#about to read 4, iclass 7, count 0 2006.229.05:57:10.41#ibcon#read 4, iclass 7, count 0 2006.229.05:57:10.41#ibcon#about to read 5, iclass 7, count 0 2006.229.05:57:10.41#ibcon#read 5, iclass 7, count 0 2006.229.05:57:10.41#ibcon#about to read 6, iclass 7, count 0 2006.229.05:57:10.41#ibcon#read 6, iclass 7, count 0 2006.229.05:57:10.41#ibcon#end of sib2, iclass 7, count 0 2006.229.05:57:10.41#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:57:10.41#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:57:10.41#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.05:57:10.41#ibcon#*before write, iclass 7, count 0 2006.229.05:57:10.41#ibcon#enter sib2, iclass 7, count 0 2006.229.05:57:10.41#ibcon#flushed, iclass 7, count 0 2006.229.05:57:10.41#ibcon#about to write, iclass 7, count 0 2006.229.05:57:10.41#ibcon#wrote, iclass 7, count 0 2006.229.05:57:10.41#ibcon#about to read 3, iclass 7, count 0 2006.229.05:57:10.46#ibcon#read 3, iclass 7, count 0 2006.229.05:57:10.46#ibcon#about to read 4, iclass 7, count 0 2006.229.05:57:10.46#ibcon#read 4, iclass 7, count 0 2006.229.05:57:10.46#ibcon#about to read 5, iclass 7, count 0 2006.229.05:57:10.46#ibcon#read 5, iclass 7, count 0 2006.229.05:57:10.46#ibcon#about to read 6, iclass 7, count 0 2006.229.05:57:10.46#ibcon#read 6, iclass 7, count 0 2006.229.05:57:10.46#ibcon#end of sib2, iclass 7, count 0 2006.229.05:57:10.46#ibcon#*after write, iclass 7, count 0 2006.229.05:57:10.46#ibcon#*before return 0, iclass 7, count 0 2006.229.05:57:10.46#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:10.46#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:10.46#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:57:10.46#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:57:10.46$vck44/va=1,8 2006.229.05:57:10.46#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.05:57:10.46#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.05:57:10.46#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:10.46#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:10.46#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:10.46#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:10.46#ibcon#enter wrdev, iclass 11, count 2 2006.229.05:57:10.46#ibcon#first serial, iclass 11, count 2 2006.229.05:57:10.46#ibcon#enter sib2, iclass 11, count 2 2006.229.05:57:10.46#ibcon#flushed, iclass 11, count 2 2006.229.05:57:10.46#ibcon#about to write, iclass 11, count 2 2006.229.05:57:10.46#ibcon#wrote, iclass 11, count 2 2006.229.05:57:10.46#ibcon#about to read 3, iclass 11, count 2 2006.229.05:57:10.48#ibcon#read 3, iclass 11, count 2 2006.229.05:57:10.48#ibcon#about to read 4, iclass 11, count 2 2006.229.05:57:10.48#ibcon#read 4, iclass 11, count 2 2006.229.05:57:10.48#ibcon#about to read 5, iclass 11, count 2 2006.229.05:57:10.48#ibcon#read 5, iclass 11, count 2 2006.229.05:57:10.48#ibcon#about to read 6, iclass 11, count 2 2006.229.05:57:10.48#ibcon#read 6, iclass 11, count 2 2006.229.05:57:10.48#ibcon#end of sib2, iclass 11, count 2 2006.229.05:57:10.48#ibcon#*mode == 0, iclass 11, count 2 2006.229.05:57:10.48#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.05:57:10.48#ibcon#[25=AT01-08\r\n] 2006.229.05:57:10.48#ibcon#*before write, iclass 11, count 2 2006.229.05:57:10.48#ibcon#enter sib2, iclass 11, count 2 2006.229.05:57:10.48#ibcon#flushed, iclass 11, count 2 2006.229.05:57:10.48#ibcon#about to write, iclass 11, count 2 2006.229.05:57:10.48#ibcon#wrote, iclass 11, count 2 2006.229.05:57:10.48#ibcon#about to read 3, iclass 11, count 2 2006.229.05:57:10.51#ibcon#read 3, iclass 11, count 2 2006.229.05:57:10.51#ibcon#about to read 4, iclass 11, count 2 2006.229.05:57:10.51#ibcon#read 4, iclass 11, count 2 2006.229.05:57:10.51#ibcon#about to read 5, iclass 11, count 2 2006.229.05:57:10.51#ibcon#read 5, iclass 11, count 2 2006.229.05:57:10.51#ibcon#about to read 6, iclass 11, count 2 2006.229.05:57:10.51#ibcon#read 6, iclass 11, count 2 2006.229.05:57:10.51#ibcon#end of sib2, iclass 11, count 2 2006.229.05:57:10.51#ibcon#*after write, iclass 11, count 2 2006.229.05:57:10.51#ibcon#*before return 0, iclass 11, count 2 2006.229.05:57:10.51#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:10.51#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:10.51#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.05:57:10.51#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:10.51#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:10.63#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:10.63#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:10.63#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:57:10.63#ibcon#first serial, iclass 11, count 0 2006.229.05:57:10.63#ibcon#enter sib2, iclass 11, count 0 2006.229.05:57:10.63#ibcon#flushed, iclass 11, count 0 2006.229.05:57:10.63#ibcon#about to write, iclass 11, count 0 2006.229.05:57:10.63#ibcon#wrote, iclass 11, count 0 2006.229.05:57:10.63#ibcon#about to read 3, iclass 11, count 0 2006.229.05:57:10.65#ibcon#read 3, iclass 11, count 0 2006.229.05:57:10.65#ibcon#about to read 4, iclass 11, count 0 2006.229.05:57:10.65#ibcon#read 4, iclass 11, count 0 2006.229.05:57:10.65#ibcon#about to read 5, iclass 11, count 0 2006.229.05:57:10.65#ibcon#read 5, iclass 11, count 0 2006.229.05:57:10.65#ibcon#about to read 6, iclass 11, count 0 2006.229.05:57:10.65#ibcon#read 6, iclass 11, count 0 2006.229.05:57:10.65#ibcon#end of sib2, iclass 11, count 0 2006.229.05:57:10.65#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:57:10.65#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:57:10.65#ibcon#[25=USB\r\n] 2006.229.05:57:10.65#ibcon#*before write, iclass 11, count 0 2006.229.05:57:10.65#ibcon#enter sib2, iclass 11, count 0 2006.229.05:57:10.65#ibcon#flushed, iclass 11, count 0 2006.229.05:57:10.65#ibcon#about to write, iclass 11, count 0 2006.229.05:57:10.65#ibcon#wrote, iclass 11, count 0 2006.229.05:57:10.65#ibcon#about to read 3, iclass 11, count 0 2006.229.05:57:10.68#ibcon#read 3, iclass 11, count 0 2006.229.05:57:10.68#ibcon#about to read 4, iclass 11, count 0 2006.229.05:57:10.68#ibcon#read 4, iclass 11, count 0 2006.229.05:57:10.68#ibcon#about to read 5, iclass 11, count 0 2006.229.05:57:10.68#ibcon#read 5, iclass 11, count 0 2006.229.05:57:10.68#ibcon#about to read 6, iclass 11, count 0 2006.229.05:57:10.68#ibcon#read 6, iclass 11, count 0 2006.229.05:57:10.68#ibcon#end of sib2, iclass 11, count 0 2006.229.05:57:10.68#ibcon#*after write, iclass 11, count 0 2006.229.05:57:10.68#ibcon#*before return 0, iclass 11, count 0 2006.229.05:57:10.68#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:10.68#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:10.68#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:57:10.68#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:57:10.68$vck44/valo=2,534.99 2006.229.05:57:10.68#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.05:57:10.68#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.05:57:10.68#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:10.68#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:10.68#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:10.68#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:10.68#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:57:10.68#ibcon#first serial, iclass 13, count 0 2006.229.05:57:10.68#ibcon#enter sib2, iclass 13, count 0 2006.229.05:57:10.68#ibcon#flushed, iclass 13, count 0 2006.229.05:57:10.68#ibcon#about to write, iclass 13, count 0 2006.229.05:57:10.68#ibcon#wrote, iclass 13, count 0 2006.229.05:57:10.68#ibcon#about to read 3, iclass 13, count 0 2006.229.05:57:10.70#ibcon#read 3, iclass 13, count 0 2006.229.05:57:10.70#ibcon#about to read 4, iclass 13, count 0 2006.229.05:57:10.70#ibcon#read 4, iclass 13, count 0 2006.229.05:57:10.70#ibcon#about to read 5, iclass 13, count 0 2006.229.05:57:10.70#ibcon#read 5, iclass 13, count 0 2006.229.05:57:10.70#ibcon#about to read 6, iclass 13, count 0 2006.229.05:57:10.70#ibcon#read 6, iclass 13, count 0 2006.229.05:57:10.70#ibcon#end of sib2, iclass 13, count 0 2006.229.05:57:10.70#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:57:10.70#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:57:10.70#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.05:57:10.70#ibcon#*before write, iclass 13, count 0 2006.229.05:57:10.70#ibcon#enter sib2, iclass 13, count 0 2006.229.05:57:10.70#ibcon#flushed, iclass 13, count 0 2006.229.05:57:10.70#ibcon#about to write, iclass 13, count 0 2006.229.05:57:10.70#ibcon#wrote, iclass 13, count 0 2006.229.05:57:10.70#ibcon#about to read 3, iclass 13, count 0 2006.229.05:57:10.74#ibcon#read 3, iclass 13, count 0 2006.229.05:57:10.74#ibcon#about to read 4, iclass 13, count 0 2006.229.05:57:10.74#ibcon#read 4, iclass 13, count 0 2006.229.05:57:10.74#ibcon#about to read 5, iclass 13, count 0 2006.229.05:57:10.74#ibcon#read 5, iclass 13, count 0 2006.229.05:57:10.74#ibcon#about to read 6, iclass 13, count 0 2006.229.05:57:10.74#ibcon#read 6, iclass 13, count 0 2006.229.05:57:10.74#ibcon#end of sib2, iclass 13, count 0 2006.229.05:57:10.74#ibcon#*after write, iclass 13, count 0 2006.229.05:57:10.74#ibcon#*before return 0, iclass 13, count 0 2006.229.05:57:10.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:10.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:10.74#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:57:10.74#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:57:10.74$vck44/va=2,7 2006.229.05:57:10.74#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.05:57:10.74#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.05:57:10.74#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:10.74#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:10.80#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:10.80#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:10.80#ibcon#enter wrdev, iclass 15, count 2 2006.229.05:57:10.80#ibcon#first serial, iclass 15, count 2 2006.229.05:57:10.80#ibcon#enter sib2, iclass 15, count 2 2006.229.05:57:10.80#ibcon#flushed, iclass 15, count 2 2006.229.05:57:10.80#ibcon#about to write, iclass 15, count 2 2006.229.05:57:10.80#ibcon#wrote, iclass 15, count 2 2006.229.05:57:10.80#ibcon#about to read 3, iclass 15, count 2 2006.229.05:57:10.82#ibcon#read 3, iclass 15, count 2 2006.229.05:57:10.82#ibcon#about to read 4, iclass 15, count 2 2006.229.05:57:10.82#ibcon#read 4, iclass 15, count 2 2006.229.05:57:10.82#ibcon#about to read 5, iclass 15, count 2 2006.229.05:57:10.82#ibcon#read 5, iclass 15, count 2 2006.229.05:57:10.82#ibcon#about to read 6, iclass 15, count 2 2006.229.05:57:10.82#ibcon#read 6, iclass 15, count 2 2006.229.05:57:10.82#ibcon#end of sib2, iclass 15, count 2 2006.229.05:57:10.82#ibcon#*mode == 0, iclass 15, count 2 2006.229.05:57:10.82#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.05:57:10.82#ibcon#[25=AT02-07\r\n] 2006.229.05:57:10.82#ibcon#*before write, iclass 15, count 2 2006.229.05:57:10.82#ibcon#enter sib2, iclass 15, count 2 2006.229.05:57:10.82#ibcon#flushed, iclass 15, count 2 2006.229.05:57:10.82#ibcon#about to write, iclass 15, count 2 2006.229.05:57:10.82#ibcon#wrote, iclass 15, count 2 2006.229.05:57:10.82#ibcon#about to read 3, iclass 15, count 2 2006.229.05:57:10.85#ibcon#read 3, iclass 15, count 2 2006.229.05:57:10.85#ibcon#about to read 4, iclass 15, count 2 2006.229.05:57:10.85#ibcon#read 4, iclass 15, count 2 2006.229.05:57:10.85#ibcon#about to read 5, iclass 15, count 2 2006.229.05:57:10.85#ibcon#read 5, iclass 15, count 2 2006.229.05:57:10.85#ibcon#about to read 6, iclass 15, count 2 2006.229.05:57:10.85#ibcon#read 6, iclass 15, count 2 2006.229.05:57:10.85#ibcon#end of sib2, iclass 15, count 2 2006.229.05:57:10.85#ibcon#*after write, iclass 15, count 2 2006.229.05:57:10.85#ibcon#*before return 0, iclass 15, count 2 2006.229.05:57:10.85#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:10.85#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:10.85#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.05:57:10.85#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:10.85#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:10.97#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:10.97#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:10.97#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:57:10.97#ibcon#first serial, iclass 15, count 0 2006.229.05:57:10.97#ibcon#enter sib2, iclass 15, count 0 2006.229.05:57:10.97#ibcon#flushed, iclass 15, count 0 2006.229.05:57:10.97#ibcon#about to write, iclass 15, count 0 2006.229.05:57:10.97#ibcon#wrote, iclass 15, count 0 2006.229.05:57:10.97#ibcon#about to read 3, iclass 15, count 0 2006.229.05:57:10.99#ibcon#read 3, iclass 15, count 0 2006.229.05:57:10.99#ibcon#about to read 4, iclass 15, count 0 2006.229.05:57:10.99#ibcon#read 4, iclass 15, count 0 2006.229.05:57:10.99#ibcon#about to read 5, iclass 15, count 0 2006.229.05:57:10.99#ibcon#read 5, iclass 15, count 0 2006.229.05:57:10.99#ibcon#about to read 6, iclass 15, count 0 2006.229.05:57:10.99#ibcon#read 6, iclass 15, count 0 2006.229.05:57:10.99#ibcon#end of sib2, iclass 15, count 0 2006.229.05:57:10.99#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:57:10.99#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:57:10.99#ibcon#[25=USB\r\n] 2006.229.05:57:10.99#ibcon#*before write, iclass 15, count 0 2006.229.05:57:10.99#ibcon#enter sib2, iclass 15, count 0 2006.229.05:57:10.99#ibcon#flushed, iclass 15, count 0 2006.229.05:57:10.99#ibcon#about to write, iclass 15, count 0 2006.229.05:57:10.99#ibcon#wrote, iclass 15, count 0 2006.229.05:57:10.99#ibcon#about to read 3, iclass 15, count 0 2006.229.05:57:11.02#ibcon#read 3, iclass 15, count 0 2006.229.05:57:11.02#ibcon#about to read 4, iclass 15, count 0 2006.229.05:57:11.02#ibcon#read 4, iclass 15, count 0 2006.229.05:57:11.02#ibcon#about to read 5, iclass 15, count 0 2006.229.05:57:11.02#ibcon#read 5, iclass 15, count 0 2006.229.05:57:11.02#ibcon#about to read 6, iclass 15, count 0 2006.229.05:57:11.02#ibcon#read 6, iclass 15, count 0 2006.229.05:57:11.02#ibcon#end of sib2, iclass 15, count 0 2006.229.05:57:11.02#ibcon#*after write, iclass 15, count 0 2006.229.05:57:11.02#ibcon#*before return 0, iclass 15, count 0 2006.229.05:57:11.02#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:11.02#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:11.02#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:57:11.02#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:57:11.02$vck44/valo=3,564.99 2006.229.05:57:11.02#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:57:11.02#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:57:11.02#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:11.02#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:11.02#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:11.02#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:11.02#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:57:11.02#ibcon#first serial, iclass 17, count 0 2006.229.05:57:11.02#ibcon#enter sib2, iclass 17, count 0 2006.229.05:57:11.02#ibcon#flushed, iclass 17, count 0 2006.229.05:57:11.02#ibcon#about to write, iclass 17, count 0 2006.229.05:57:11.02#ibcon#wrote, iclass 17, count 0 2006.229.05:57:11.02#ibcon#about to read 3, iclass 17, count 0 2006.229.05:57:11.04#ibcon#read 3, iclass 17, count 0 2006.229.05:57:11.04#ibcon#about to read 4, iclass 17, count 0 2006.229.05:57:11.04#ibcon#read 4, iclass 17, count 0 2006.229.05:57:11.04#ibcon#about to read 5, iclass 17, count 0 2006.229.05:57:11.04#ibcon#read 5, iclass 17, count 0 2006.229.05:57:11.04#ibcon#about to read 6, iclass 17, count 0 2006.229.05:57:11.04#ibcon#read 6, iclass 17, count 0 2006.229.05:57:11.04#ibcon#end of sib2, iclass 17, count 0 2006.229.05:57:11.04#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:57:11.04#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:57:11.04#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.05:57:11.04#ibcon#*before write, iclass 17, count 0 2006.229.05:57:11.04#ibcon#enter sib2, iclass 17, count 0 2006.229.05:57:11.04#ibcon#flushed, iclass 17, count 0 2006.229.05:57:11.04#ibcon#about to write, iclass 17, count 0 2006.229.05:57:11.04#ibcon#wrote, iclass 17, count 0 2006.229.05:57:11.04#ibcon#about to read 3, iclass 17, count 0 2006.229.05:57:11.08#ibcon#read 3, iclass 17, count 0 2006.229.05:57:11.08#ibcon#about to read 4, iclass 17, count 0 2006.229.05:57:11.08#ibcon#read 4, iclass 17, count 0 2006.229.05:57:11.08#ibcon#about to read 5, iclass 17, count 0 2006.229.05:57:11.08#ibcon#read 5, iclass 17, count 0 2006.229.05:57:11.08#ibcon#about to read 6, iclass 17, count 0 2006.229.05:57:11.08#ibcon#read 6, iclass 17, count 0 2006.229.05:57:11.08#ibcon#end of sib2, iclass 17, count 0 2006.229.05:57:11.08#ibcon#*after write, iclass 17, count 0 2006.229.05:57:11.08#ibcon#*before return 0, iclass 17, count 0 2006.229.05:57:11.08#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:11.08#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:11.08#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:57:11.08#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:57:11.08$vck44/va=3,6 2006.229.05:57:11.08#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.05:57:11.08#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.05:57:11.08#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:11.08#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:11.14#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:11.14#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:11.14#ibcon#enter wrdev, iclass 19, count 2 2006.229.05:57:11.14#ibcon#first serial, iclass 19, count 2 2006.229.05:57:11.14#ibcon#enter sib2, iclass 19, count 2 2006.229.05:57:11.14#ibcon#flushed, iclass 19, count 2 2006.229.05:57:11.14#ibcon#about to write, iclass 19, count 2 2006.229.05:57:11.14#ibcon#wrote, iclass 19, count 2 2006.229.05:57:11.14#ibcon#about to read 3, iclass 19, count 2 2006.229.05:57:11.16#ibcon#read 3, iclass 19, count 2 2006.229.05:57:11.16#ibcon#about to read 4, iclass 19, count 2 2006.229.05:57:11.16#ibcon#read 4, iclass 19, count 2 2006.229.05:57:11.16#ibcon#about to read 5, iclass 19, count 2 2006.229.05:57:11.16#ibcon#read 5, iclass 19, count 2 2006.229.05:57:11.16#ibcon#about to read 6, iclass 19, count 2 2006.229.05:57:11.16#ibcon#read 6, iclass 19, count 2 2006.229.05:57:11.16#ibcon#end of sib2, iclass 19, count 2 2006.229.05:57:11.16#ibcon#*mode == 0, iclass 19, count 2 2006.229.05:57:11.16#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.05:57:11.16#ibcon#[25=AT03-06\r\n] 2006.229.05:57:11.16#ibcon#*before write, iclass 19, count 2 2006.229.05:57:11.16#ibcon#enter sib2, iclass 19, count 2 2006.229.05:57:11.16#ibcon#flushed, iclass 19, count 2 2006.229.05:57:11.16#ibcon#about to write, iclass 19, count 2 2006.229.05:57:11.16#ibcon#wrote, iclass 19, count 2 2006.229.05:57:11.16#ibcon#about to read 3, iclass 19, count 2 2006.229.05:57:11.19#ibcon#read 3, iclass 19, count 2 2006.229.05:57:11.19#ibcon#about to read 4, iclass 19, count 2 2006.229.05:57:11.19#ibcon#read 4, iclass 19, count 2 2006.229.05:57:11.19#ibcon#about to read 5, iclass 19, count 2 2006.229.05:57:11.19#ibcon#read 5, iclass 19, count 2 2006.229.05:57:11.19#ibcon#about to read 6, iclass 19, count 2 2006.229.05:57:11.19#ibcon#read 6, iclass 19, count 2 2006.229.05:57:11.19#ibcon#end of sib2, iclass 19, count 2 2006.229.05:57:11.19#ibcon#*after write, iclass 19, count 2 2006.229.05:57:11.19#ibcon#*before return 0, iclass 19, count 2 2006.229.05:57:11.19#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:11.19#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:11.19#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.05:57:11.19#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:11.19#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:11.31#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:11.31#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:11.31#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:57:11.31#ibcon#first serial, iclass 19, count 0 2006.229.05:57:11.31#ibcon#enter sib2, iclass 19, count 0 2006.229.05:57:11.31#ibcon#flushed, iclass 19, count 0 2006.229.05:57:11.31#ibcon#about to write, iclass 19, count 0 2006.229.05:57:11.31#ibcon#wrote, iclass 19, count 0 2006.229.05:57:11.31#ibcon#about to read 3, iclass 19, count 0 2006.229.05:57:11.33#ibcon#read 3, iclass 19, count 0 2006.229.05:57:11.33#ibcon#about to read 4, iclass 19, count 0 2006.229.05:57:11.33#ibcon#read 4, iclass 19, count 0 2006.229.05:57:11.33#ibcon#about to read 5, iclass 19, count 0 2006.229.05:57:11.33#ibcon#read 5, iclass 19, count 0 2006.229.05:57:11.33#ibcon#about to read 6, iclass 19, count 0 2006.229.05:57:11.33#ibcon#read 6, iclass 19, count 0 2006.229.05:57:11.33#ibcon#end of sib2, iclass 19, count 0 2006.229.05:57:11.33#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:57:11.33#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:57:11.33#ibcon#[25=USB\r\n] 2006.229.05:57:11.33#ibcon#*before write, iclass 19, count 0 2006.229.05:57:11.33#ibcon#enter sib2, iclass 19, count 0 2006.229.05:57:11.33#ibcon#flushed, iclass 19, count 0 2006.229.05:57:11.33#ibcon#about to write, iclass 19, count 0 2006.229.05:57:11.33#ibcon#wrote, iclass 19, count 0 2006.229.05:57:11.33#ibcon#about to read 3, iclass 19, count 0 2006.229.05:57:11.36#ibcon#read 3, iclass 19, count 0 2006.229.05:57:11.36#ibcon#about to read 4, iclass 19, count 0 2006.229.05:57:11.36#ibcon#read 4, iclass 19, count 0 2006.229.05:57:11.36#ibcon#about to read 5, iclass 19, count 0 2006.229.05:57:11.36#ibcon#read 5, iclass 19, count 0 2006.229.05:57:11.36#ibcon#about to read 6, iclass 19, count 0 2006.229.05:57:11.36#ibcon#read 6, iclass 19, count 0 2006.229.05:57:11.36#ibcon#end of sib2, iclass 19, count 0 2006.229.05:57:11.36#ibcon#*after write, iclass 19, count 0 2006.229.05:57:11.36#ibcon#*before return 0, iclass 19, count 0 2006.229.05:57:11.36#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:11.36#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:11.36#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:57:11.36#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:57:11.36$vck44/valo=4,624.99 2006.229.05:57:11.36#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.05:57:11.36#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.05:57:11.36#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:11.36#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:11.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:11.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:11.36#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:57:11.36#ibcon#first serial, iclass 21, count 0 2006.229.05:57:11.36#ibcon#enter sib2, iclass 21, count 0 2006.229.05:57:11.36#ibcon#flushed, iclass 21, count 0 2006.229.05:57:11.36#ibcon#about to write, iclass 21, count 0 2006.229.05:57:11.36#ibcon#wrote, iclass 21, count 0 2006.229.05:57:11.36#ibcon#about to read 3, iclass 21, count 0 2006.229.05:57:11.38#ibcon#read 3, iclass 21, count 0 2006.229.05:57:11.38#ibcon#about to read 4, iclass 21, count 0 2006.229.05:57:11.38#ibcon#read 4, iclass 21, count 0 2006.229.05:57:11.38#ibcon#about to read 5, iclass 21, count 0 2006.229.05:57:11.38#ibcon#read 5, iclass 21, count 0 2006.229.05:57:11.38#ibcon#about to read 6, iclass 21, count 0 2006.229.05:57:11.38#ibcon#read 6, iclass 21, count 0 2006.229.05:57:11.38#ibcon#end of sib2, iclass 21, count 0 2006.229.05:57:11.38#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:57:11.38#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:57:11.38#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.05:57:11.38#ibcon#*before write, iclass 21, count 0 2006.229.05:57:11.38#ibcon#enter sib2, iclass 21, count 0 2006.229.05:57:11.38#ibcon#flushed, iclass 21, count 0 2006.229.05:57:11.38#ibcon#about to write, iclass 21, count 0 2006.229.05:57:11.38#ibcon#wrote, iclass 21, count 0 2006.229.05:57:11.38#ibcon#about to read 3, iclass 21, count 0 2006.229.05:57:11.42#ibcon#read 3, iclass 21, count 0 2006.229.05:57:11.42#ibcon#about to read 4, iclass 21, count 0 2006.229.05:57:11.42#ibcon#read 4, iclass 21, count 0 2006.229.05:57:11.42#ibcon#about to read 5, iclass 21, count 0 2006.229.05:57:11.42#ibcon#read 5, iclass 21, count 0 2006.229.05:57:11.42#ibcon#about to read 6, iclass 21, count 0 2006.229.05:57:11.42#ibcon#read 6, iclass 21, count 0 2006.229.05:57:11.42#ibcon#end of sib2, iclass 21, count 0 2006.229.05:57:11.42#ibcon#*after write, iclass 21, count 0 2006.229.05:57:11.42#ibcon#*before return 0, iclass 21, count 0 2006.229.05:57:11.42#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:11.42#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:11.42#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:57:11.42#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:57:11.42$vck44/va=4,7 2006.229.05:57:11.42#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.05:57:11.42#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.05:57:11.42#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:11.42#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:11.48#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:11.48#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:11.48#ibcon#enter wrdev, iclass 23, count 2 2006.229.05:57:11.48#ibcon#first serial, iclass 23, count 2 2006.229.05:57:11.48#ibcon#enter sib2, iclass 23, count 2 2006.229.05:57:11.48#ibcon#flushed, iclass 23, count 2 2006.229.05:57:11.48#ibcon#about to write, iclass 23, count 2 2006.229.05:57:11.48#ibcon#wrote, iclass 23, count 2 2006.229.05:57:11.48#ibcon#about to read 3, iclass 23, count 2 2006.229.05:57:11.50#ibcon#read 3, iclass 23, count 2 2006.229.05:57:11.50#ibcon#about to read 4, iclass 23, count 2 2006.229.05:57:11.50#ibcon#read 4, iclass 23, count 2 2006.229.05:57:11.50#ibcon#about to read 5, iclass 23, count 2 2006.229.05:57:11.50#ibcon#read 5, iclass 23, count 2 2006.229.05:57:11.50#ibcon#about to read 6, iclass 23, count 2 2006.229.05:57:11.50#ibcon#read 6, iclass 23, count 2 2006.229.05:57:11.50#ibcon#end of sib2, iclass 23, count 2 2006.229.05:57:11.50#ibcon#*mode == 0, iclass 23, count 2 2006.229.05:57:11.50#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.05:57:11.50#ibcon#[25=AT04-07\r\n] 2006.229.05:57:11.50#ibcon#*before write, iclass 23, count 2 2006.229.05:57:11.50#ibcon#enter sib2, iclass 23, count 2 2006.229.05:57:11.50#ibcon#flushed, iclass 23, count 2 2006.229.05:57:11.50#ibcon#about to write, iclass 23, count 2 2006.229.05:57:11.50#ibcon#wrote, iclass 23, count 2 2006.229.05:57:11.50#ibcon#about to read 3, iclass 23, count 2 2006.229.05:57:11.53#ibcon#read 3, iclass 23, count 2 2006.229.05:57:11.53#ibcon#about to read 4, iclass 23, count 2 2006.229.05:57:11.53#ibcon#read 4, iclass 23, count 2 2006.229.05:57:11.53#ibcon#about to read 5, iclass 23, count 2 2006.229.05:57:11.53#ibcon#read 5, iclass 23, count 2 2006.229.05:57:11.53#ibcon#about to read 6, iclass 23, count 2 2006.229.05:57:11.53#ibcon#read 6, iclass 23, count 2 2006.229.05:57:11.53#ibcon#end of sib2, iclass 23, count 2 2006.229.05:57:11.53#ibcon#*after write, iclass 23, count 2 2006.229.05:57:11.53#ibcon#*before return 0, iclass 23, count 2 2006.229.05:57:11.53#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:11.53#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:11.53#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.05:57:11.53#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:11.53#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:11.65#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:11.65#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:11.65#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:57:11.65#ibcon#first serial, iclass 23, count 0 2006.229.05:57:11.65#ibcon#enter sib2, iclass 23, count 0 2006.229.05:57:11.65#ibcon#flushed, iclass 23, count 0 2006.229.05:57:11.65#ibcon#about to write, iclass 23, count 0 2006.229.05:57:11.65#ibcon#wrote, iclass 23, count 0 2006.229.05:57:11.65#ibcon#about to read 3, iclass 23, count 0 2006.229.05:57:11.67#ibcon#read 3, iclass 23, count 0 2006.229.05:57:11.67#ibcon#about to read 4, iclass 23, count 0 2006.229.05:57:11.67#ibcon#read 4, iclass 23, count 0 2006.229.05:57:11.67#ibcon#about to read 5, iclass 23, count 0 2006.229.05:57:11.67#ibcon#read 5, iclass 23, count 0 2006.229.05:57:11.67#ibcon#about to read 6, iclass 23, count 0 2006.229.05:57:11.67#ibcon#read 6, iclass 23, count 0 2006.229.05:57:11.67#ibcon#end of sib2, iclass 23, count 0 2006.229.05:57:11.67#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:57:11.67#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:57:11.67#ibcon#[25=USB\r\n] 2006.229.05:57:11.67#ibcon#*before write, iclass 23, count 0 2006.229.05:57:11.67#ibcon#enter sib2, iclass 23, count 0 2006.229.05:57:11.67#ibcon#flushed, iclass 23, count 0 2006.229.05:57:11.67#ibcon#about to write, iclass 23, count 0 2006.229.05:57:11.67#ibcon#wrote, iclass 23, count 0 2006.229.05:57:11.67#ibcon#about to read 3, iclass 23, count 0 2006.229.05:57:11.70#ibcon#read 3, iclass 23, count 0 2006.229.05:57:11.70#ibcon#about to read 4, iclass 23, count 0 2006.229.05:57:11.70#ibcon#read 4, iclass 23, count 0 2006.229.05:57:11.70#ibcon#about to read 5, iclass 23, count 0 2006.229.05:57:11.70#ibcon#read 5, iclass 23, count 0 2006.229.05:57:11.70#ibcon#about to read 6, iclass 23, count 0 2006.229.05:57:11.70#ibcon#read 6, iclass 23, count 0 2006.229.05:57:11.70#ibcon#end of sib2, iclass 23, count 0 2006.229.05:57:11.70#ibcon#*after write, iclass 23, count 0 2006.229.05:57:11.70#ibcon#*before return 0, iclass 23, count 0 2006.229.05:57:11.70#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:11.70#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:11.70#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:57:11.70#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:57:11.70$vck44/valo=5,734.99 2006.229.05:57:11.70#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.05:57:11.70#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.05:57:11.70#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:11.70#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:11.70#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:11.70#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:11.70#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:57:11.70#ibcon#first serial, iclass 25, count 0 2006.229.05:57:11.70#ibcon#enter sib2, iclass 25, count 0 2006.229.05:57:11.70#ibcon#flushed, iclass 25, count 0 2006.229.05:57:11.70#ibcon#about to write, iclass 25, count 0 2006.229.05:57:11.70#ibcon#wrote, iclass 25, count 0 2006.229.05:57:11.70#ibcon#about to read 3, iclass 25, count 0 2006.229.05:57:11.72#ibcon#read 3, iclass 25, count 0 2006.229.05:57:11.72#ibcon#about to read 4, iclass 25, count 0 2006.229.05:57:11.72#ibcon#read 4, iclass 25, count 0 2006.229.05:57:11.72#ibcon#about to read 5, iclass 25, count 0 2006.229.05:57:11.72#ibcon#read 5, iclass 25, count 0 2006.229.05:57:11.72#ibcon#about to read 6, iclass 25, count 0 2006.229.05:57:11.72#ibcon#read 6, iclass 25, count 0 2006.229.05:57:11.72#ibcon#end of sib2, iclass 25, count 0 2006.229.05:57:11.72#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:57:11.72#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:57:11.72#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.05:57:11.72#ibcon#*before write, iclass 25, count 0 2006.229.05:57:11.72#ibcon#enter sib2, iclass 25, count 0 2006.229.05:57:11.72#ibcon#flushed, iclass 25, count 0 2006.229.05:57:11.72#ibcon#about to write, iclass 25, count 0 2006.229.05:57:11.72#ibcon#wrote, iclass 25, count 0 2006.229.05:57:11.72#ibcon#about to read 3, iclass 25, count 0 2006.229.05:57:11.76#ibcon#read 3, iclass 25, count 0 2006.229.05:57:11.76#ibcon#about to read 4, iclass 25, count 0 2006.229.05:57:11.76#ibcon#read 4, iclass 25, count 0 2006.229.05:57:11.76#ibcon#about to read 5, iclass 25, count 0 2006.229.05:57:11.76#ibcon#read 5, iclass 25, count 0 2006.229.05:57:11.76#ibcon#about to read 6, iclass 25, count 0 2006.229.05:57:11.76#ibcon#read 6, iclass 25, count 0 2006.229.05:57:11.76#ibcon#end of sib2, iclass 25, count 0 2006.229.05:57:11.76#ibcon#*after write, iclass 25, count 0 2006.229.05:57:11.76#ibcon#*before return 0, iclass 25, count 0 2006.229.05:57:11.76#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:11.76#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:11.76#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:57:11.76#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:57:11.76$vck44/va=5,4 2006.229.05:57:11.76#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.05:57:11.76#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.05:57:11.76#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:11.76#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:11.82#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:11.82#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:11.82#ibcon#enter wrdev, iclass 27, count 2 2006.229.05:57:11.82#ibcon#first serial, iclass 27, count 2 2006.229.05:57:11.82#ibcon#enter sib2, iclass 27, count 2 2006.229.05:57:11.82#ibcon#flushed, iclass 27, count 2 2006.229.05:57:11.82#ibcon#about to write, iclass 27, count 2 2006.229.05:57:11.82#ibcon#wrote, iclass 27, count 2 2006.229.05:57:11.82#ibcon#about to read 3, iclass 27, count 2 2006.229.05:57:11.84#ibcon#read 3, iclass 27, count 2 2006.229.05:57:11.84#ibcon#about to read 4, iclass 27, count 2 2006.229.05:57:11.84#ibcon#read 4, iclass 27, count 2 2006.229.05:57:11.84#ibcon#about to read 5, iclass 27, count 2 2006.229.05:57:11.84#ibcon#read 5, iclass 27, count 2 2006.229.05:57:11.84#ibcon#about to read 6, iclass 27, count 2 2006.229.05:57:11.84#ibcon#read 6, iclass 27, count 2 2006.229.05:57:11.84#ibcon#end of sib2, iclass 27, count 2 2006.229.05:57:11.84#ibcon#*mode == 0, iclass 27, count 2 2006.229.05:57:11.84#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.05:57:11.84#ibcon#[25=AT05-04\r\n] 2006.229.05:57:11.84#ibcon#*before write, iclass 27, count 2 2006.229.05:57:11.84#ibcon#enter sib2, iclass 27, count 2 2006.229.05:57:11.84#ibcon#flushed, iclass 27, count 2 2006.229.05:57:11.84#ibcon#about to write, iclass 27, count 2 2006.229.05:57:11.84#ibcon#wrote, iclass 27, count 2 2006.229.05:57:11.84#ibcon#about to read 3, iclass 27, count 2 2006.229.05:57:11.87#ibcon#read 3, iclass 27, count 2 2006.229.05:57:11.87#ibcon#about to read 4, iclass 27, count 2 2006.229.05:57:11.87#ibcon#read 4, iclass 27, count 2 2006.229.05:57:11.87#ibcon#about to read 5, iclass 27, count 2 2006.229.05:57:11.87#ibcon#read 5, iclass 27, count 2 2006.229.05:57:11.87#ibcon#about to read 6, iclass 27, count 2 2006.229.05:57:11.87#ibcon#read 6, iclass 27, count 2 2006.229.05:57:11.87#ibcon#end of sib2, iclass 27, count 2 2006.229.05:57:11.87#ibcon#*after write, iclass 27, count 2 2006.229.05:57:11.87#ibcon#*before return 0, iclass 27, count 2 2006.229.05:57:11.87#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:11.87#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:11.87#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.05:57:11.87#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:11.87#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:11.99#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:11.99#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:11.99#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:57:11.99#ibcon#first serial, iclass 27, count 0 2006.229.05:57:11.99#ibcon#enter sib2, iclass 27, count 0 2006.229.05:57:11.99#ibcon#flushed, iclass 27, count 0 2006.229.05:57:11.99#ibcon#about to write, iclass 27, count 0 2006.229.05:57:11.99#ibcon#wrote, iclass 27, count 0 2006.229.05:57:11.99#ibcon#about to read 3, iclass 27, count 0 2006.229.05:57:12.01#ibcon#read 3, iclass 27, count 0 2006.229.05:57:12.01#ibcon#about to read 4, iclass 27, count 0 2006.229.05:57:12.01#ibcon#read 4, iclass 27, count 0 2006.229.05:57:12.01#ibcon#about to read 5, iclass 27, count 0 2006.229.05:57:12.01#ibcon#read 5, iclass 27, count 0 2006.229.05:57:12.01#ibcon#about to read 6, iclass 27, count 0 2006.229.05:57:12.01#ibcon#read 6, iclass 27, count 0 2006.229.05:57:12.01#ibcon#end of sib2, iclass 27, count 0 2006.229.05:57:12.01#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:57:12.01#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:57:12.01#ibcon#[25=USB\r\n] 2006.229.05:57:12.01#ibcon#*before write, iclass 27, count 0 2006.229.05:57:12.01#ibcon#enter sib2, iclass 27, count 0 2006.229.05:57:12.01#ibcon#flushed, iclass 27, count 0 2006.229.05:57:12.01#ibcon#about to write, iclass 27, count 0 2006.229.05:57:12.01#ibcon#wrote, iclass 27, count 0 2006.229.05:57:12.01#ibcon#about to read 3, iclass 27, count 0 2006.229.05:57:12.04#ibcon#read 3, iclass 27, count 0 2006.229.05:57:12.04#ibcon#about to read 4, iclass 27, count 0 2006.229.05:57:12.04#ibcon#read 4, iclass 27, count 0 2006.229.05:57:12.04#ibcon#about to read 5, iclass 27, count 0 2006.229.05:57:12.04#ibcon#read 5, iclass 27, count 0 2006.229.05:57:12.04#ibcon#about to read 6, iclass 27, count 0 2006.229.05:57:12.04#ibcon#read 6, iclass 27, count 0 2006.229.05:57:12.04#ibcon#end of sib2, iclass 27, count 0 2006.229.05:57:12.04#ibcon#*after write, iclass 27, count 0 2006.229.05:57:12.04#ibcon#*before return 0, iclass 27, count 0 2006.229.05:57:12.04#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:12.04#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:12.04#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:57:12.04#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:57:12.04$vck44/valo=6,814.99 2006.229.05:57:12.04#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:57:12.04#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:57:12.04#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:12.04#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:12.04#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:12.04#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:12.04#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:57:12.04#ibcon#first serial, iclass 29, count 0 2006.229.05:57:12.04#ibcon#enter sib2, iclass 29, count 0 2006.229.05:57:12.04#ibcon#flushed, iclass 29, count 0 2006.229.05:57:12.04#ibcon#about to write, iclass 29, count 0 2006.229.05:57:12.04#ibcon#wrote, iclass 29, count 0 2006.229.05:57:12.04#ibcon#about to read 3, iclass 29, count 0 2006.229.05:57:12.06#ibcon#read 3, iclass 29, count 0 2006.229.05:57:12.06#ibcon#about to read 4, iclass 29, count 0 2006.229.05:57:12.06#ibcon#read 4, iclass 29, count 0 2006.229.05:57:12.06#ibcon#about to read 5, iclass 29, count 0 2006.229.05:57:12.06#ibcon#read 5, iclass 29, count 0 2006.229.05:57:12.06#ibcon#about to read 6, iclass 29, count 0 2006.229.05:57:12.06#ibcon#read 6, iclass 29, count 0 2006.229.05:57:12.06#ibcon#end of sib2, iclass 29, count 0 2006.229.05:57:12.06#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:57:12.06#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:57:12.06#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.05:57:12.06#ibcon#*before write, iclass 29, count 0 2006.229.05:57:12.06#ibcon#enter sib2, iclass 29, count 0 2006.229.05:57:12.06#ibcon#flushed, iclass 29, count 0 2006.229.05:57:12.06#ibcon#about to write, iclass 29, count 0 2006.229.05:57:12.06#ibcon#wrote, iclass 29, count 0 2006.229.05:57:12.06#ibcon#about to read 3, iclass 29, count 0 2006.229.05:57:12.10#ibcon#read 3, iclass 29, count 0 2006.229.05:57:12.10#ibcon#about to read 4, iclass 29, count 0 2006.229.05:57:12.10#ibcon#read 4, iclass 29, count 0 2006.229.05:57:12.10#ibcon#about to read 5, iclass 29, count 0 2006.229.05:57:12.10#ibcon#read 5, iclass 29, count 0 2006.229.05:57:12.10#ibcon#about to read 6, iclass 29, count 0 2006.229.05:57:12.10#ibcon#read 6, iclass 29, count 0 2006.229.05:57:12.10#ibcon#end of sib2, iclass 29, count 0 2006.229.05:57:12.10#ibcon#*after write, iclass 29, count 0 2006.229.05:57:12.10#ibcon#*before return 0, iclass 29, count 0 2006.229.05:57:12.10#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:12.10#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:12.10#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:57:12.10#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:57:12.10$vck44/va=6,4 2006.229.05:57:12.10#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.05:57:12.10#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.05:57:12.10#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:12.10#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:12.16#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:12.16#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:12.16#ibcon#enter wrdev, iclass 31, count 2 2006.229.05:57:12.16#ibcon#first serial, iclass 31, count 2 2006.229.05:57:12.16#ibcon#enter sib2, iclass 31, count 2 2006.229.05:57:12.16#ibcon#flushed, iclass 31, count 2 2006.229.05:57:12.16#ibcon#about to write, iclass 31, count 2 2006.229.05:57:12.16#ibcon#wrote, iclass 31, count 2 2006.229.05:57:12.16#ibcon#about to read 3, iclass 31, count 2 2006.229.05:57:12.18#ibcon#read 3, iclass 31, count 2 2006.229.05:57:12.18#ibcon#about to read 4, iclass 31, count 2 2006.229.05:57:12.18#ibcon#read 4, iclass 31, count 2 2006.229.05:57:12.18#ibcon#about to read 5, iclass 31, count 2 2006.229.05:57:12.18#ibcon#read 5, iclass 31, count 2 2006.229.05:57:12.18#ibcon#about to read 6, iclass 31, count 2 2006.229.05:57:12.18#ibcon#read 6, iclass 31, count 2 2006.229.05:57:12.18#ibcon#end of sib2, iclass 31, count 2 2006.229.05:57:12.18#ibcon#*mode == 0, iclass 31, count 2 2006.229.05:57:12.18#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.05:57:12.18#ibcon#[25=AT06-04\r\n] 2006.229.05:57:12.18#ibcon#*before write, iclass 31, count 2 2006.229.05:57:12.18#ibcon#enter sib2, iclass 31, count 2 2006.229.05:57:12.18#ibcon#flushed, iclass 31, count 2 2006.229.05:57:12.18#ibcon#about to write, iclass 31, count 2 2006.229.05:57:12.18#ibcon#wrote, iclass 31, count 2 2006.229.05:57:12.18#ibcon#about to read 3, iclass 31, count 2 2006.229.05:57:12.21#ibcon#read 3, iclass 31, count 2 2006.229.05:57:12.21#ibcon#about to read 4, iclass 31, count 2 2006.229.05:57:12.21#ibcon#read 4, iclass 31, count 2 2006.229.05:57:12.21#ibcon#about to read 5, iclass 31, count 2 2006.229.05:57:12.21#ibcon#read 5, iclass 31, count 2 2006.229.05:57:12.21#ibcon#about to read 6, iclass 31, count 2 2006.229.05:57:12.21#ibcon#read 6, iclass 31, count 2 2006.229.05:57:12.21#ibcon#end of sib2, iclass 31, count 2 2006.229.05:57:12.21#ibcon#*after write, iclass 31, count 2 2006.229.05:57:12.21#ibcon#*before return 0, iclass 31, count 2 2006.229.05:57:12.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:12.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:12.21#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.05:57:12.21#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:12.21#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:12.33#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:12.33#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:12.33#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:57:12.33#ibcon#first serial, iclass 31, count 0 2006.229.05:57:12.33#ibcon#enter sib2, iclass 31, count 0 2006.229.05:57:12.33#ibcon#flushed, iclass 31, count 0 2006.229.05:57:12.33#ibcon#about to write, iclass 31, count 0 2006.229.05:57:12.33#ibcon#wrote, iclass 31, count 0 2006.229.05:57:12.33#ibcon#about to read 3, iclass 31, count 0 2006.229.05:57:12.35#ibcon#read 3, iclass 31, count 0 2006.229.05:57:12.35#ibcon#about to read 4, iclass 31, count 0 2006.229.05:57:12.35#ibcon#read 4, iclass 31, count 0 2006.229.05:57:12.35#ibcon#about to read 5, iclass 31, count 0 2006.229.05:57:12.35#ibcon#read 5, iclass 31, count 0 2006.229.05:57:12.35#ibcon#about to read 6, iclass 31, count 0 2006.229.05:57:12.35#ibcon#read 6, iclass 31, count 0 2006.229.05:57:12.35#ibcon#end of sib2, iclass 31, count 0 2006.229.05:57:12.35#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:57:12.35#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:57:12.35#ibcon#[25=USB\r\n] 2006.229.05:57:12.35#ibcon#*before write, iclass 31, count 0 2006.229.05:57:12.35#ibcon#enter sib2, iclass 31, count 0 2006.229.05:57:12.35#ibcon#flushed, iclass 31, count 0 2006.229.05:57:12.35#ibcon#about to write, iclass 31, count 0 2006.229.05:57:12.35#ibcon#wrote, iclass 31, count 0 2006.229.05:57:12.35#ibcon#about to read 3, iclass 31, count 0 2006.229.05:57:12.38#ibcon#read 3, iclass 31, count 0 2006.229.05:57:12.38#ibcon#about to read 4, iclass 31, count 0 2006.229.05:57:12.38#ibcon#read 4, iclass 31, count 0 2006.229.05:57:12.38#ibcon#about to read 5, iclass 31, count 0 2006.229.05:57:12.38#ibcon#read 5, iclass 31, count 0 2006.229.05:57:12.38#ibcon#about to read 6, iclass 31, count 0 2006.229.05:57:12.38#ibcon#read 6, iclass 31, count 0 2006.229.05:57:12.38#ibcon#end of sib2, iclass 31, count 0 2006.229.05:57:12.38#ibcon#*after write, iclass 31, count 0 2006.229.05:57:12.38#ibcon#*before return 0, iclass 31, count 0 2006.229.05:57:12.38#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:12.38#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:12.38#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:57:12.38#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:57:12.38$vck44/valo=7,864.99 2006.229.05:57:12.38#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.05:57:12.38#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.05:57:12.38#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:12.38#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:12.38#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:12.38#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:12.38#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:57:12.38#ibcon#first serial, iclass 33, count 0 2006.229.05:57:12.38#ibcon#enter sib2, iclass 33, count 0 2006.229.05:57:12.38#ibcon#flushed, iclass 33, count 0 2006.229.05:57:12.38#ibcon#about to write, iclass 33, count 0 2006.229.05:57:12.38#ibcon#wrote, iclass 33, count 0 2006.229.05:57:12.38#ibcon#about to read 3, iclass 33, count 0 2006.229.05:57:12.40#ibcon#read 3, iclass 33, count 0 2006.229.05:57:12.40#ibcon#about to read 4, iclass 33, count 0 2006.229.05:57:12.40#ibcon#read 4, iclass 33, count 0 2006.229.05:57:12.40#ibcon#about to read 5, iclass 33, count 0 2006.229.05:57:12.40#ibcon#read 5, iclass 33, count 0 2006.229.05:57:12.40#ibcon#about to read 6, iclass 33, count 0 2006.229.05:57:12.40#ibcon#read 6, iclass 33, count 0 2006.229.05:57:12.40#ibcon#end of sib2, iclass 33, count 0 2006.229.05:57:12.40#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:57:12.40#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:57:12.40#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.05:57:12.40#ibcon#*before write, iclass 33, count 0 2006.229.05:57:12.40#ibcon#enter sib2, iclass 33, count 0 2006.229.05:57:12.40#ibcon#flushed, iclass 33, count 0 2006.229.05:57:12.40#ibcon#about to write, iclass 33, count 0 2006.229.05:57:12.40#ibcon#wrote, iclass 33, count 0 2006.229.05:57:12.40#ibcon#about to read 3, iclass 33, count 0 2006.229.05:57:12.44#ibcon#read 3, iclass 33, count 0 2006.229.05:57:12.44#ibcon#about to read 4, iclass 33, count 0 2006.229.05:57:12.44#ibcon#read 4, iclass 33, count 0 2006.229.05:57:12.44#ibcon#about to read 5, iclass 33, count 0 2006.229.05:57:12.44#ibcon#read 5, iclass 33, count 0 2006.229.05:57:12.44#ibcon#about to read 6, iclass 33, count 0 2006.229.05:57:12.44#ibcon#read 6, iclass 33, count 0 2006.229.05:57:12.44#ibcon#end of sib2, iclass 33, count 0 2006.229.05:57:12.44#ibcon#*after write, iclass 33, count 0 2006.229.05:57:12.44#ibcon#*before return 0, iclass 33, count 0 2006.229.05:57:12.44#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:12.44#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:12.44#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:57:12.44#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:57:12.44$vck44/va=7,5 2006.229.05:57:12.44#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.05:57:12.44#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.05:57:12.44#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:12.44#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:12.50#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:12.50#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:12.50#ibcon#enter wrdev, iclass 35, count 2 2006.229.05:57:12.50#ibcon#first serial, iclass 35, count 2 2006.229.05:57:12.50#ibcon#enter sib2, iclass 35, count 2 2006.229.05:57:12.50#ibcon#flushed, iclass 35, count 2 2006.229.05:57:12.50#ibcon#about to write, iclass 35, count 2 2006.229.05:57:12.50#ibcon#wrote, iclass 35, count 2 2006.229.05:57:12.50#ibcon#about to read 3, iclass 35, count 2 2006.229.05:57:12.52#ibcon#read 3, iclass 35, count 2 2006.229.05:57:12.52#ibcon#about to read 4, iclass 35, count 2 2006.229.05:57:12.52#ibcon#read 4, iclass 35, count 2 2006.229.05:57:12.52#ibcon#about to read 5, iclass 35, count 2 2006.229.05:57:12.52#ibcon#read 5, iclass 35, count 2 2006.229.05:57:12.52#ibcon#about to read 6, iclass 35, count 2 2006.229.05:57:12.52#ibcon#read 6, iclass 35, count 2 2006.229.05:57:12.52#ibcon#end of sib2, iclass 35, count 2 2006.229.05:57:12.52#ibcon#*mode == 0, iclass 35, count 2 2006.229.05:57:12.52#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.05:57:12.52#ibcon#[25=AT07-05\r\n] 2006.229.05:57:12.52#ibcon#*before write, iclass 35, count 2 2006.229.05:57:12.52#ibcon#enter sib2, iclass 35, count 2 2006.229.05:57:12.52#ibcon#flushed, iclass 35, count 2 2006.229.05:57:12.52#ibcon#about to write, iclass 35, count 2 2006.229.05:57:12.52#ibcon#wrote, iclass 35, count 2 2006.229.05:57:12.52#ibcon#about to read 3, iclass 35, count 2 2006.229.05:57:12.55#ibcon#read 3, iclass 35, count 2 2006.229.05:57:12.55#ibcon#about to read 4, iclass 35, count 2 2006.229.05:57:12.55#ibcon#read 4, iclass 35, count 2 2006.229.05:57:12.55#ibcon#about to read 5, iclass 35, count 2 2006.229.05:57:12.55#ibcon#read 5, iclass 35, count 2 2006.229.05:57:12.55#ibcon#about to read 6, iclass 35, count 2 2006.229.05:57:12.55#ibcon#read 6, iclass 35, count 2 2006.229.05:57:12.55#ibcon#end of sib2, iclass 35, count 2 2006.229.05:57:12.55#ibcon#*after write, iclass 35, count 2 2006.229.05:57:12.55#ibcon#*before return 0, iclass 35, count 2 2006.229.05:57:12.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:12.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:12.55#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.05:57:12.55#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:12.55#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:12.67#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:12.67#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:12.67#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:57:12.67#ibcon#first serial, iclass 35, count 0 2006.229.05:57:12.67#ibcon#enter sib2, iclass 35, count 0 2006.229.05:57:12.67#ibcon#flushed, iclass 35, count 0 2006.229.05:57:12.67#ibcon#about to write, iclass 35, count 0 2006.229.05:57:12.67#ibcon#wrote, iclass 35, count 0 2006.229.05:57:12.67#ibcon#about to read 3, iclass 35, count 0 2006.229.05:57:12.69#ibcon#read 3, iclass 35, count 0 2006.229.05:57:12.69#ibcon#about to read 4, iclass 35, count 0 2006.229.05:57:12.69#ibcon#read 4, iclass 35, count 0 2006.229.05:57:12.69#ibcon#about to read 5, iclass 35, count 0 2006.229.05:57:12.69#ibcon#read 5, iclass 35, count 0 2006.229.05:57:12.69#ibcon#about to read 6, iclass 35, count 0 2006.229.05:57:12.69#ibcon#read 6, iclass 35, count 0 2006.229.05:57:12.69#ibcon#end of sib2, iclass 35, count 0 2006.229.05:57:12.69#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:57:12.69#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:57:12.69#ibcon#[25=USB\r\n] 2006.229.05:57:12.69#ibcon#*before write, iclass 35, count 0 2006.229.05:57:12.69#ibcon#enter sib2, iclass 35, count 0 2006.229.05:57:12.69#ibcon#flushed, iclass 35, count 0 2006.229.05:57:12.69#ibcon#about to write, iclass 35, count 0 2006.229.05:57:12.69#ibcon#wrote, iclass 35, count 0 2006.229.05:57:12.69#ibcon#about to read 3, iclass 35, count 0 2006.229.05:57:12.72#ibcon#read 3, iclass 35, count 0 2006.229.05:57:12.72#ibcon#about to read 4, iclass 35, count 0 2006.229.05:57:12.72#ibcon#read 4, iclass 35, count 0 2006.229.05:57:12.72#ibcon#about to read 5, iclass 35, count 0 2006.229.05:57:12.72#ibcon#read 5, iclass 35, count 0 2006.229.05:57:12.72#ibcon#about to read 6, iclass 35, count 0 2006.229.05:57:12.72#ibcon#read 6, iclass 35, count 0 2006.229.05:57:12.72#ibcon#end of sib2, iclass 35, count 0 2006.229.05:57:12.72#ibcon#*after write, iclass 35, count 0 2006.229.05:57:12.72#ibcon#*before return 0, iclass 35, count 0 2006.229.05:57:12.72#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:12.72#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:12.72#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:57:12.72#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:57:12.72$vck44/valo=8,884.99 2006.229.05:57:12.72#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:57:12.72#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:57:12.72#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:12.72#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:12.72#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:12.72#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:12.72#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:57:12.72#ibcon#first serial, iclass 37, count 0 2006.229.05:57:12.72#ibcon#enter sib2, iclass 37, count 0 2006.229.05:57:12.72#ibcon#flushed, iclass 37, count 0 2006.229.05:57:12.72#ibcon#about to write, iclass 37, count 0 2006.229.05:57:12.72#ibcon#wrote, iclass 37, count 0 2006.229.05:57:12.72#ibcon#about to read 3, iclass 37, count 0 2006.229.05:57:12.74#ibcon#read 3, iclass 37, count 0 2006.229.05:57:12.74#ibcon#about to read 4, iclass 37, count 0 2006.229.05:57:12.74#ibcon#read 4, iclass 37, count 0 2006.229.05:57:12.74#ibcon#about to read 5, iclass 37, count 0 2006.229.05:57:12.74#ibcon#read 5, iclass 37, count 0 2006.229.05:57:12.74#ibcon#about to read 6, iclass 37, count 0 2006.229.05:57:12.74#ibcon#read 6, iclass 37, count 0 2006.229.05:57:12.74#ibcon#end of sib2, iclass 37, count 0 2006.229.05:57:12.74#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:57:12.74#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:57:12.74#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.05:57:12.74#ibcon#*before write, iclass 37, count 0 2006.229.05:57:12.74#ibcon#enter sib2, iclass 37, count 0 2006.229.05:57:12.74#ibcon#flushed, iclass 37, count 0 2006.229.05:57:12.74#ibcon#about to write, iclass 37, count 0 2006.229.05:57:12.74#ibcon#wrote, iclass 37, count 0 2006.229.05:57:12.74#ibcon#about to read 3, iclass 37, count 0 2006.229.05:57:12.78#ibcon#read 3, iclass 37, count 0 2006.229.05:57:12.78#ibcon#about to read 4, iclass 37, count 0 2006.229.05:57:12.78#ibcon#read 4, iclass 37, count 0 2006.229.05:57:12.78#ibcon#about to read 5, iclass 37, count 0 2006.229.05:57:12.78#ibcon#read 5, iclass 37, count 0 2006.229.05:57:12.78#ibcon#about to read 6, iclass 37, count 0 2006.229.05:57:12.78#ibcon#read 6, iclass 37, count 0 2006.229.05:57:12.78#ibcon#end of sib2, iclass 37, count 0 2006.229.05:57:12.78#ibcon#*after write, iclass 37, count 0 2006.229.05:57:12.78#ibcon#*before return 0, iclass 37, count 0 2006.229.05:57:12.78#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:12.78#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:12.78#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:57:12.78#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:57:12.78$vck44/va=8,6 2006.229.05:57:12.78#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.05:57:12.78#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.05:57:12.78#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:12.78#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:57:12.84#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:57:12.84#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:57:12.84#ibcon#enter wrdev, iclass 39, count 2 2006.229.05:57:12.84#ibcon#first serial, iclass 39, count 2 2006.229.05:57:12.84#ibcon#enter sib2, iclass 39, count 2 2006.229.05:57:12.84#ibcon#flushed, iclass 39, count 2 2006.229.05:57:12.84#ibcon#about to write, iclass 39, count 2 2006.229.05:57:12.84#ibcon#wrote, iclass 39, count 2 2006.229.05:57:12.84#ibcon#about to read 3, iclass 39, count 2 2006.229.05:57:12.86#ibcon#read 3, iclass 39, count 2 2006.229.05:57:12.86#ibcon#about to read 4, iclass 39, count 2 2006.229.05:57:12.86#ibcon#read 4, iclass 39, count 2 2006.229.05:57:12.86#ibcon#about to read 5, iclass 39, count 2 2006.229.05:57:12.86#ibcon#read 5, iclass 39, count 2 2006.229.05:57:12.86#ibcon#about to read 6, iclass 39, count 2 2006.229.05:57:12.86#ibcon#read 6, iclass 39, count 2 2006.229.05:57:12.86#ibcon#end of sib2, iclass 39, count 2 2006.229.05:57:12.86#ibcon#*mode == 0, iclass 39, count 2 2006.229.05:57:12.86#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.05:57:12.86#ibcon#[25=AT08-06\r\n] 2006.229.05:57:12.86#ibcon#*before write, iclass 39, count 2 2006.229.05:57:12.86#ibcon#enter sib2, iclass 39, count 2 2006.229.05:57:12.86#ibcon#flushed, iclass 39, count 2 2006.229.05:57:12.86#ibcon#about to write, iclass 39, count 2 2006.229.05:57:12.86#ibcon#wrote, iclass 39, count 2 2006.229.05:57:12.86#ibcon#about to read 3, iclass 39, count 2 2006.229.05:57:12.89#ibcon#read 3, iclass 39, count 2 2006.229.05:57:12.89#ibcon#about to read 4, iclass 39, count 2 2006.229.05:57:12.89#ibcon#read 4, iclass 39, count 2 2006.229.05:57:12.89#ibcon#about to read 5, iclass 39, count 2 2006.229.05:57:12.89#ibcon#read 5, iclass 39, count 2 2006.229.05:57:12.89#ibcon#about to read 6, iclass 39, count 2 2006.229.05:57:12.89#ibcon#read 6, iclass 39, count 2 2006.229.05:57:12.89#ibcon#end of sib2, iclass 39, count 2 2006.229.05:57:12.89#ibcon#*after write, iclass 39, count 2 2006.229.05:57:12.89#ibcon#*before return 0, iclass 39, count 2 2006.229.05:57:12.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:57:12.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.05:57:12.89#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.05:57:12.89#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:12.89#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:57:13.01#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:57:13.01#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:57:13.01#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:57:13.01#ibcon#first serial, iclass 39, count 0 2006.229.05:57:13.01#ibcon#enter sib2, iclass 39, count 0 2006.229.05:57:13.01#ibcon#flushed, iclass 39, count 0 2006.229.05:57:13.01#ibcon#about to write, iclass 39, count 0 2006.229.05:57:13.01#ibcon#wrote, iclass 39, count 0 2006.229.05:57:13.01#ibcon#about to read 3, iclass 39, count 0 2006.229.05:57:13.03#ibcon#read 3, iclass 39, count 0 2006.229.05:57:13.03#ibcon#about to read 4, iclass 39, count 0 2006.229.05:57:13.03#ibcon#read 4, iclass 39, count 0 2006.229.05:57:13.03#ibcon#about to read 5, iclass 39, count 0 2006.229.05:57:13.03#ibcon#read 5, iclass 39, count 0 2006.229.05:57:13.03#ibcon#about to read 6, iclass 39, count 0 2006.229.05:57:13.03#ibcon#read 6, iclass 39, count 0 2006.229.05:57:13.03#ibcon#end of sib2, iclass 39, count 0 2006.229.05:57:13.03#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:57:13.03#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:57:13.03#ibcon#[25=USB\r\n] 2006.229.05:57:13.03#ibcon#*before write, iclass 39, count 0 2006.229.05:57:13.03#ibcon#enter sib2, iclass 39, count 0 2006.229.05:57:13.03#ibcon#flushed, iclass 39, count 0 2006.229.05:57:13.03#ibcon#about to write, iclass 39, count 0 2006.229.05:57:13.03#ibcon#wrote, iclass 39, count 0 2006.229.05:57:13.03#ibcon#about to read 3, iclass 39, count 0 2006.229.05:57:13.06#ibcon#read 3, iclass 39, count 0 2006.229.05:57:13.06#ibcon#about to read 4, iclass 39, count 0 2006.229.05:57:13.06#ibcon#read 4, iclass 39, count 0 2006.229.05:57:13.06#ibcon#about to read 5, iclass 39, count 0 2006.229.05:57:13.06#ibcon#read 5, iclass 39, count 0 2006.229.05:57:13.06#ibcon#about to read 6, iclass 39, count 0 2006.229.05:57:13.06#ibcon#read 6, iclass 39, count 0 2006.229.05:57:13.06#ibcon#end of sib2, iclass 39, count 0 2006.229.05:57:13.06#ibcon#*after write, iclass 39, count 0 2006.229.05:57:13.06#ibcon#*before return 0, iclass 39, count 0 2006.229.05:57:13.06#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:57:13.06#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.05:57:13.06#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:57:13.06#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:57:13.06$vck44/vblo=1,629.99 2006.229.05:57:13.06#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.05:57:13.06#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.05:57:13.06#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:13.06#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:57:13.06#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:57:13.06#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:57:13.06#ibcon#enter wrdev, iclass 3, count 0 2006.229.05:57:13.06#ibcon#first serial, iclass 3, count 0 2006.229.05:57:13.06#ibcon#enter sib2, iclass 3, count 0 2006.229.05:57:13.06#ibcon#flushed, iclass 3, count 0 2006.229.05:57:13.06#ibcon#about to write, iclass 3, count 0 2006.229.05:57:13.06#ibcon#wrote, iclass 3, count 0 2006.229.05:57:13.06#ibcon#about to read 3, iclass 3, count 0 2006.229.05:57:13.08#ibcon#read 3, iclass 3, count 0 2006.229.05:57:13.08#ibcon#about to read 4, iclass 3, count 0 2006.229.05:57:13.08#ibcon#read 4, iclass 3, count 0 2006.229.05:57:13.08#ibcon#about to read 5, iclass 3, count 0 2006.229.05:57:13.08#ibcon#read 5, iclass 3, count 0 2006.229.05:57:13.08#ibcon#about to read 6, iclass 3, count 0 2006.229.05:57:13.08#ibcon#read 6, iclass 3, count 0 2006.229.05:57:13.08#ibcon#end of sib2, iclass 3, count 0 2006.229.05:57:13.08#ibcon#*mode == 0, iclass 3, count 0 2006.229.05:57:13.08#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.05:57:13.08#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.05:57:13.08#ibcon#*before write, iclass 3, count 0 2006.229.05:57:13.08#ibcon#enter sib2, iclass 3, count 0 2006.229.05:57:13.08#ibcon#flushed, iclass 3, count 0 2006.229.05:57:13.08#ibcon#about to write, iclass 3, count 0 2006.229.05:57:13.08#ibcon#wrote, iclass 3, count 0 2006.229.05:57:13.08#ibcon#about to read 3, iclass 3, count 0 2006.229.05:57:13.12#ibcon#read 3, iclass 3, count 0 2006.229.05:57:13.12#ibcon#about to read 4, iclass 3, count 0 2006.229.05:57:13.12#ibcon#read 4, iclass 3, count 0 2006.229.05:57:13.12#ibcon#about to read 5, iclass 3, count 0 2006.229.05:57:13.12#ibcon#read 5, iclass 3, count 0 2006.229.05:57:13.12#ibcon#about to read 6, iclass 3, count 0 2006.229.05:57:13.12#ibcon#read 6, iclass 3, count 0 2006.229.05:57:13.12#ibcon#end of sib2, iclass 3, count 0 2006.229.05:57:13.12#ibcon#*after write, iclass 3, count 0 2006.229.05:57:13.12#ibcon#*before return 0, iclass 3, count 0 2006.229.05:57:13.12#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:57:13.12#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.05:57:13.12#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.05:57:13.12#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.05:57:13.12$vck44/vb=1,4 2006.229.05:57:13.12#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.05:57:13.12#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.05:57:13.12#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:13.12#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:57:13.12#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:57:13.12#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:57:13.12#ibcon#enter wrdev, iclass 5, count 2 2006.229.05:57:13.12#ibcon#first serial, iclass 5, count 2 2006.229.05:57:13.12#ibcon#enter sib2, iclass 5, count 2 2006.229.05:57:13.12#ibcon#flushed, iclass 5, count 2 2006.229.05:57:13.12#ibcon#about to write, iclass 5, count 2 2006.229.05:57:13.12#ibcon#wrote, iclass 5, count 2 2006.229.05:57:13.12#ibcon#about to read 3, iclass 5, count 2 2006.229.05:57:13.14#ibcon#read 3, iclass 5, count 2 2006.229.05:57:13.14#ibcon#about to read 4, iclass 5, count 2 2006.229.05:57:13.14#ibcon#read 4, iclass 5, count 2 2006.229.05:57:13.14#ibcon#about to read 5, iclass 5, count 2 2006.229.05:57:13.14#ibcon#read 5, iclass 5, count 2 2006.229.05:57:13.14#ibcon#about to read 6, iclass 5, count 2 2006.229.05:57:13.14#ibcon#read 6, iclass 5, count 2 2006.229.05:57:13.14#ibcon#end of sib2, iclass 5, count 2 2006.229.05:57:13.14#ibcon#*mode == 0, iclass 5, count 2 2006.229.05:57:13.14#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.05:57:13.14#ibcon#[27=AT01-04\r\n] 2006.229.05:57:13.14#ibcon#*before write, iclass 5, count 2 2006.229.05:57:13.14#ibcon#enter sib2, iclass 5, count 2 2006.229.05:57:13.14#ibcon#flushed, iclass 5, count 2 2006.229.05:57:13.14#ibcon#about to write, iclass 5, count 2 2006.229.05:57:13.14#ibcon#wrote, iclass 5, count 2 2006.229.05:57:13.14#ibcon#about to read 3, iclass 5, count 2 2006.229.05:57:13.17#ibcon#read 3, iclass 5, count 2 2006.229.05:57:13.17#ibcon#about to read 4, iclass 5, count 2 2006.229.05:57:13.17#ibcon#read 4, iclass 5, count 2 2006.229.05:57:13.17#ibcon#about to read 5, iclass 5, count 2 2006.229.05:57:13.17#ibcon#read 5, iclass 5, count 2 2006.229.05:57:13.17#ibcon#about to read 6, iclass 5, count 2 2006.229.05:57:13.17#ibcon#read 6, iclass 5, count 2 2006.229.05:57:13.17#ibcon#end of sib2, iclass 5, count 2 2006.229.05:57:13.17#ibcon#*after write, iclass 5, count 2 2006.229.05:57:13.17#ibcon#*before return 0, iclass 5, count 2 2006.229.05:57:13.17#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:57:13.17#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.05:57:13.17#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.05:57:13.17#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:13.17#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:57:13.29#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:57:13.29#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:57:13.29#ibcon#enter wrdev, iclass 5, count 0 2006.229.05:57:13.29#ibcon#first serial, iclass 5, count 0 2006.229.05:57:13.29#ibcon#enter sib2, iclass 5, count 0 2006.229.05:57:13.29#ibcon#flushed, iclass 5, count 0 2006.229.05:57:13.29#ibcon#about to write, iclass 5, count 0 2006.229.05:57:13.29#ibcon#wrote, iclass 5, count 0 2006.229.05:57:13.29#ibcon#about to read 3, iclass 5, count 0 2006.229.05:57:13.31#ibcon#read 3, iclass 5, count 0 2006.229.05:57:13.31#ibcon#about to read 4, iclass 5, count 0 2006.229.05:57:13.31#ibcon#read 4, iclass 5, count 0 2006.229.05:57:13.31#ibcon#about to read 5, iclass 5, count 0 2006.229.05:57:13.31#ibcon#read 5, iclass 5, count 0 2006.229.05:57:13.31#ibcon#about to read 6, iclass 5, count 0 2006.229.05:57:13.31#ibcon#read 6, iclass 5, count 0 2006.229.05:57:13.31#ibcon#end of sib2, iclass 5, count 0 2006.229.05:57:13.31#ibcon#*mode == 0, iclass 5, count 0 2006.229.05:57:13.31#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.05:57:13.31#ibcon#[27=USB\r\n] 2006.229.05:57:13.31#ibcon#*before write, iclass 5, count 0 2006.229.05:57:13.31#ibcon#enter sib2, iclass 5, count 0 2006.229.05:57:13.31#ibcon#flushed, iclass 5, count 0 2006.229.05:57:13.31#ibcon#about to write, iclass 5, count 0 2006.229.05:57:13.31#ibcon#wrote, iclass 5, count 0 2006.229.05:57:13.31#ibcon#about to read 3, iclass 5, count 0 2006.229.05:57:13.34#ibcon#read 3, iclass 5, count 0 2006.229.05:57:13.34#ibcon#about to read 4, iclass 5, count 0 2006.229.05:57:13.34#ibcon#read 4, iclass 5, count 0 2006.229.05:57:13.34#ibcon#about to read 5, iclass 5, count 0 2006.229.05:57:13.34#ibcon#read 5, iclass 5, count 0 2006.229.05:57:13.34#ibcon#about to read 6, iclass 5, count 0 2006.229.05:57:13.34#ibcon#read 6, iclass 5, count 0 2006.229.05:57:13.34#ibcon#end of sib2, iclass 5, count 0 2006.229.05:57:13.34#ibcon#*after write, iclass 5, count 0 2006.229.05:57:13.34#ibcon#*before return 0, iclass 5, count 0 2006.229.05:57:13.34#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:57:13.34#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.05:57:13.34#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.05:57:13.34#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.05:57:13.34$vck44/vblo=2,634.99 2006.229.05:57:13.34#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.05:57:13.34#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.05:57:13.34#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:13.34#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:13.34#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:13.34#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:13.34#ibcon#enter wrdev, iclass 7, count 0 2006.229.05:57:13.34#ibcon#first serial, iclass 7, count 0 2006.229.05:57:13.34#ibcon#enter sib2, iclass 7, count 0 2006.229.05:57:13.34#ibcon#flushed, iclass 7, count 0 2006.229.05:57:13.34#ibcon#about to write, iclass 7, count 0 2006.229.05:57:13.34#ibcon#wrote, iclass 7, count 0 2006.229.05:57:13.34#ibcon#about to read 3, iclass 7, count 0 2006.229.05:57:13.36#ibcon#read 3, iclass 7, count 0 2006.229.05:57:13.36#ibcon#about to read 4, iclass 7, count 0 2006.229.05:57:13.36#ibcon#read 4, iclass 7, count 0 2006.229.05:57:13.36#ibcon#about to read 5, iclass 7, count 0 2006.229.05:57:13.36#ibcon#read 5, iclass 7, count 0 2006.229.05:57:13.36#ibcon#about to read 6, iclass 7, count 0 2006.229.05:57:13.36#ibcon#read 6, iclass 7, count 0 2006.229.05:57:13.36#ibcon#end of sib2, iclass 7, count 0 2006.229.05:57:13.36#ibcon#*mode == 0, iclass 7, count 0 2006.229.05:57:13.36#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.05:57:13.36#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.05:57:13.36#ibcon#*before write, iclass 7, count 0 2006.229.05:57:13.36#ibcon#enter sib2, iclass 7, count 0 2006.229.05:57:13.36#ibcon#flushed, iclass 7, count 0 2006.229.05:57:13.36#ibcon#about to write, iclass 7, count 0 2006.229.05:57:13.36#ibcon#wrote, iclass 7, count 0 2006.229.05:57:13.36#ibcon#about to read 3, iclass 7, count 0 2006.229.05:57:13.40#ibcon#read 3, iclass 7, count 0 2006.229.05:57:13.40#ibcon#about to read 4, iclass 7, count 0 2006.229.05:57:13.40#ibcon#read 4, iclass 7, count 0 2006.229.05:57:13.40#ibcon#about to read 5, iclass 7, count 0 2006.229.05:57:13.40#ibcon#read 5, iclass 7, count 0 2006.229.05:57:13.40#ibcon#about to read 6, iclass 7, count 0 2006.229.05:57:13.40#ibcon#read 6, iclass 7, count 0 2006.229.05:57:13.40#ibcon#end of sib2, iclass 7, count 0 2006.229.05:57:13.40#ibcon#*after write, iclass 7, count 0 2006.229.05:57:13.40#ibcon#*before return 0, iclass 7, count 0 2006.229.05:57:13.40#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:13.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.05:57:13.40#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.05:57:13.40#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.05:57:13.40$vck44/vb=2,4 2006.229.05:57:13.40#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.05:57:13.40#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.05:57:13.40#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:13.40#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:13.46#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:13.46#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:13.46#ibcon#enter wrdev, iclass 11, count 2 2006.229.05:57:13.46#ibcon#first serial, iclass 11, count 2 2006.229.05:57:13.46#ibcon#enter sib2, iclass 11, count 2 2006.229.05:57:13.46#ibcon#flushed, iclass 11, count 2 2006.229.05:57:13.46#ibcon#about to write, iclass 11, count 2 2006.229.05:57:13.46#ibcon#wrote, iclass 11, count 2 2006.229.05:57:13.46#ibcon#about to read 3, iclass 11, count 2 2006.229.05:57:13.48#ibcon#read 3, iclass 11, count 2 2006.229.05:57:13.48#ibcon#about to read 4, iclass 11, count 2 2006.229.05:57:13.48#ibcon#read 4, iclass 11, count 2 2006.229.05:57:13.48#ibcon#about to read 5, iclass 11, count 2 2006.229.05:57:13.48#ibcon#read 5, iclass 11, count 2 2006.229.05:57:13.48#ibcon#about to read 6, iclass 11, count 2 2006.229.05:57:13.48#ibcon#read 6, iclass 11, count 2 2006.229.05:57:13.48#ibcon#end of sib2, iclass 11, count 2 2006.229.05:57:13.48#ibcon#*mode == 0, iclass 11, count 2 2006.229.05:57:13.48#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.05:57:13.48#ibcon#[27=AT02-04\r\n] 2006.229.05:57:13.48#ibcon#*before write, iclass 11, count 2 2006.229.05:57:13.48#ibcon#enter sib2, iclass 11, count 2 2006.229.05:57:13.48#ibcon#flushed, iclass 11, count 2 2006.229.05:57:13.48#ibcon#about to write, iclass 11, count 2 2006.229.05:57:13.48#ibcon#wrote, iclass 11, count 2 2006.229.05:57:13.48#ibcon#about to read 3, iclass 11, count 2 2006.229.05:57:13.51#ibcon#read 3, iclass 11, count 2 2006.229.05:57:13.51#ibcon#about to read 4, iclass 11, count 2 2006.229.05:57:13.51#ibcon#read 4, iclass 11, count 2 2006.229.05:57:13.51#ibcon#about to read 5, iclass 11, count 2 2006.229.05:57:13.51#ibcon#read 5, iclass 11, count 2 2006.229.05:57:13.51#ibcon#about to read 6, iclass 11, count 2 2006.229.05:57:13.51#ibcon#read 6, iclass 11, count 2 2006.229.05:57:13.51#ibcon#end of sib2, iclass 11, count 2 2006.229.05:57:13.51#ibcon#*after write, iclass 11, count 2 2006.229.05:57:13.51#ibcon#*before return 0, iclass 11, count 2 2006.229.05:57:13.51#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:13.51#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.05:57:13.51#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.05:57:13.51#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:13.51#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:13.63#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:13.63#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:13.63#ibcon#enter wrdev, iclass 11, count 0 2006.229.05:57:13.63#ibcon#first serial, iclass 11, count 0 2006.229.05:57:13.63#ibcon#enter sib2, iclass 11, count 0 2006.229.05:57:13.63#ibcon#flushed, iclass 11, count 0 2006.229.05:57:13.63#ibcon#about to write, iclass 11, count 0 2006.229.05:57:13.63#ibcon#wrote, iclass 11, count 0 2006.229.05:57:13.63#ibcon#about to read 3, iclass 11, count 0 2006.229.05:57:13.65#ibcon#read 3, iclass 11, count 0 2006.229.05:57:13.65#ibcon#about to read 4, iclass 11, count 0 2006.229.05:57:13.65#ibcon#read 4, iclass 11, count 0 2006.229.05:57:13.65#ibcon#about to read 5, iclass 11, count 0 2006.229.05:57:13.65#ibcon#read 5, iclass 11, count 0 2006.229.05:57:13.65#ibcon#about to read 6, iclass 11, count 0 2006.229.05:57:13.65#ibcon#read 6, iclass 11, count 0 2006.229.05:57:13.65#ibcon#end of sib2, iclass 11, count 0 2006.229.05:57:13.65#ibcon#*mode == 0, iclass 11, count 0 2006.229.05:57:13.65#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.05:57:13.65#ibcon#[27=USB\r\n] 2006.229.05:57:13.65#ibcon#*before write, iclass 11, count 0 2006.229.05:57:13.65#ibcon#enter sib2, iclass 11, count 0 2006.229.05:57:13.65#ibcon#flushed, iclass 11, count 0 2006.229.05:57:13.65#ibcon#about to write, iclass 11, count 0 2006.229.05:57:13.65#ibcon#wrote, iclass 11, count 0 2006.229.05:57:13.65#ibcon#about to read 3, iclass 11, count 0 2006.229.05:57:13.68#ibcon#read 3, iclass 11, count 0 2006.229.05:57:13.68#ibcon#about to read 4, iclass 11, count 0 2006.229.05:57:13.68#ibcon#read 4, iclass 11, count 0 2006.229.05:57:13.68#ibcon#about to read 5, iclass 11, count 0 2006.229.05:57:13.68#ibcon#read 5, iclass 11, count 0 2006.229.05:57:13.68#ibcon#about to read 6, iclass 11, count 0 2006.229.05:57:13.68#ibcon#read 6, iclass 11, count 0 2006.229.05:57:13.68#ibcon#end of sib2, iclass 11, count 0 2006.229.05:57:13.68#ibcon#*after write, iclass 11, count 0 2006.229.05:57:13.68#ibcon#*before return 0, iclass 11, count 0 2006.229.05:57:13.68#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:13.68#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.05:57:13.68#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.05:57:13.68#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.05:57:13.68$vck44/vblo=3,649.99 2006.229.05:57:13.68#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.05:57:13.68#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.05:57:13.68#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:13.68#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:13.68#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:13.68#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:13.68#ibcon#enter wrdev, iclass 13, count 0 2006.229.05:57:13.68#ibcon#first serial, iclass 13, count 0 2006.229.05:57:13.68#ibcon#enter sib2, iclass 13, count 0 2006.229.05:57:13.68#ibcon#flushed, iclass 13, count 0 2006.229.05:57:13.68#ibcon#about to write, iclass 13, count 0 2006.229.05:57:13.68#ibcon#wrote, iclass 13, count 0 2006.229.05:57:13.68#ibcon#about to read 3, iclass 13, count 0 2006.229.05:57:13.70#ibcon#read 3, iclass 13, count 0 2006.229.05:57:13.70#ibcon#about to read 4, iclass 13, count 0 2006.229.05:57:13.70#ibcon#read 4, iclass 13, count 0 2006.229.05:57:13.70#ibcon#about to read 5, iclass 13, count 0 2006.229.05:57:13.70#ibcon#read 5, iclass 13, count 0 2006.229.05:57:13.70#ibcon#about to read 6, iclass 13, count 0 2006.229.05:57:13.70#ibcon#read 6, iclass 13, count 0 2006.229.05:57:13.70#ibcon#end of sib2, iclass 13, count 0 2006.229.05:57:13.70#ibcon#*mode == 0, iclass 13, count 0 2006.229.05:57:13.70#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.05:57:13.70#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.05:57:13.70#ibcon#*before write, iclass 13, count 0 2006.229.05:57:13.70#ibcon#enter sib2, iclass 13, count 0 2006.229.05:57:13.70#ibcon#flushed, iclass 13, count 0 2006.229.05:57:13.70#ibcon#about to write, iclass 13, count 0 2006.229.05:57:13.70#ibcon#wrote, iclass 13, count 0 2006.229.05:57:13.70#ibcon#about to read 3, iclass 13, count 0 2006.229.05:57:13.74#ibcon#read 3, iclass 13, count 0 2006.229.05:57:13.74#ibcon#about to read 4, iclass 13, count 0 2006.229.05:57:13.74#ibcon#read 4, iclass 13, count 0 2006.229.05:57:13.74#ibcon#about to read 5, iclass 13, count 0 2006.229.05:57:13.74#ibcon#read 5, iclass 13, count 0 2006.229.05:57:13.74#ibcon#about to read 6, iclass 13, count 0 2006.229.05:57:13.74#ibcon#read 6, iclass 13, count 0 2006.229.05:57:13.74#ibcon#end of sib2, iclass 13, count 0 2006.229.05:57:13.74#ibcon#*after write, iclass 13, count 0 2006.229.05:57:13.74#ibcon#*before return 0, iclass 13, count 0 2006.229.05:57:13.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:13.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.05:57:13.74#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.05:57:13.74#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.05:57:13.74$vck44/vb=3,4 2006.229.05:57:13.74#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.05:57:13.74#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.05:57:13.74#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:13.74#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:13.80#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:13.80#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:13.80#ibcon#enter wrdev, iclass 15, count 2 2006.229.05:57:13.80#ibcon#first serial, iclass 15, count 2 2006.229.05:57:13.80#ibcon#enter sib2, iclass 15, count 2 2006.229.05:57:13.80#ibcon#flushed, iclass 15, count 2 2006.229.05:57:13.80#ibcon#about to write, iclass 15, count 2 2006.229.05:57:13.80#ibcon#wrote, iclass 15, count 2 2006.229.05:57:13.80#ibcon#about to read 3, iclass 15, count 2 2006.229.05:57:13.82#ibcon#read 3, iclass 15, count 2 2006.229.05:57:13.82#ibcon#about to read 4, iclass 15, count 2 2006.229.05:57:13.82#ibcon#read 4, iclass 15, count 2 2006.229.05:57:13.82#ibcon#about to read 5, iclass 15, count 2 2006.229.05:57:13.82#ibcon#read 5, iclass 15, count 2 2006.229.05:57:13.82#ibcon#about to read 6, iclass 15, count 2 2006.229.05:57:13.82#ibcon#read 6, iclass 15, count 2 2006.229.05:57:13.82#ibcon#end of sib2, iclass 15, count 2 2006.229.05:57:13.82#ibcon#*mode == 0, iclass 15, count 2 2006.229.05:57:13.82#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.05:57:13.82#ibcon#[27=AT03-04\r\n] 2006.229.05:57:13.82#ibcon#*before write, iclass 15, count 2 2006.229.05:57:13.82#ibcon#enter sib2, iclass 15, count 2 2006.229.05:57:13.82#ibcon#flushed, iclass 15, count 2 2006.229.05:57:13.82#ibcon#about to write, iclass 15, count 2 2006.229.05:57:13.82#ibcon#wrote, iclass 15, count 2 2006.229.05:57:13.82#ibcon#about to read 3, iclass 15, count 2 2006.229.05:57:13.85#ibcon#read 3, iclass 15, count 2 2006.229.05:57:13.85#ibcon#about to read 4, iclass 15, count 2 2006.229.05:57:13.85#ibcon#read 4, iclass 15, count 2 2006.229.05:57:13.85#ibcon#about to read 5, iclass 15, count 2 2006.229.05:57:13.85#ibcon#read 5, iclass 15, count 2 2006.229.05:57:13.85#ibcon#about to read 6, iclass 15, count 2 2006.229.05:57:13.85#ibcon#read 6, iclass 15, count 2 2006.229.05:57:13.85#ibcon#end of sib2, iclass 15, count 2 2006.229.05:57:13.85#ibcon#*after write, iclass 15, count 2 2006.229.05:57:13.85#ibcon#*before return 0, iclass 15, count 2 2006.229.05:57:13.85#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:13.85#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.05:57:13.85#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.05:57:13.85#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:13.85#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:13.97#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:13.97#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:13.97#ibcon#enter wrdev, iclass 15, count 0 2006.229.05:57:13.97#ibcon#first serial, iclass 15, count 0 2006.229.05:57:13.97#ibcon#enter sib2, iclass 15, count 0 2006.229.05:57:13.97#ibcon#flushed, iclass 15, count 0 2006.229.05:57:13.97#ibcon#about to write, iclass 15, count 0 2006.229.05:57:13.97#ibcon#wrote, iclass 15, count 0 2006.229.05:57:13.97#ibcon#about to read 3, iclass 15, count 0 2006.229.05:57:13.99#ibcon#read 3, iclass 15, count 0 2006.229.05:57:13.99#ibcon#about to read 4, iclass 15, count 0 2006.229.05:57:13.99#ibcon#read 4, iclass 15, count 0 2006.229.05:57:13.99#ibcon#about to read 5, iclass 15, count 0 2006.229.05:57:13.99#ibcon#read 5, iclass 15, count 0 2006.229.05:57:13.99#ibcon#about to read 6, iclass 15, count 0 2006.229.05:57:13.99#ibcon#read 6, iclass 15, count 0 2006.229.05:57:13.99#ibcon#end of sib2, iclass 15, count 0 2006.229.05:57:13.99#ibcon#*mode == 0, iclass 15, count 0 2006.229.05:57:13.99#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.05:57:13.99#ibcon#[27=USB\r\n] 2006.229.05:57:13.99#ibcon#*before write, iclass 15, count 0 2006.229.05:57:13.99#ibcon#enter sib2, iclass 15, count 0 2006.229.05:57:13.99#ibcon#flushed, iclass 15, count 0 2006.229.05:57:13.99#ibcon#about to write, iclass 15, count 0 2006.229.05:57:13.99#ibcon#wrote, iclass 15, count 0 2006.229.05:57:13.99#ibcon#about to read 3, iclass 15, count 0 2006.229.05:57:14.02#ibcon#read 3, iclass 15, count 0 2006.229.05:57:14.02#ibcon#about to read 4, iclass 15, count 0 2006.229.05:57:14.02#ibcon#read 4, iclass 15, count 0 2006.229.05:57:14.02#ibcon#about to read 5, iclass 15, count 0 2006.229.05:57:14.02#ibcon#read 5, iclass 15, count 0 2006.229.05:57:14.02#ibcon#about to read 6, iclass 15, count 0 2006.229.05:57:14.02#ibcon#read 6, iclass 15, count 0 2006.229.05:57:14.02#ibcon#end of sib2, iclass 15, count 0 2006.229.05:57:14.02#ibcon#*after write, iclass 15, count 0 2006.229.05:57:14.02#ibcon#*before return 0, iclass 15, count 0 2006.229.05:57:14.02#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:14.02#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.05:57:14.02#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.05:57:14.02#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.05:57:14.02$vck44/vblo=4,679.99 2006.229.05:57:14.02#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.05:57:14.02#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.05:57:14.02#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:14.02#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:14.02#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:14.02#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:14.02#ibcon#enter wrdev, iclass 17, count 0 2006.229.05:57:14.02#ibcon#first serial, iclass 17, count 0 2006.229.05:57:14.02#ibcon#enter sib2, iclass 17, count 0 2006.229.05:57:14.02#ibcon#flushed, iclass 17, count 0 2006.229.05:57:14.02#ibcon#about to write, iclass 17, count 0 2006.229.05:57:14.02#ibcon#wrote, iclass 17, count 0 2006.229.05:57:14.02#ibcon#about to read 3, iclass 17, count 0 2006.229.05:57:14.04#ibcon#read 3, iclass 17, count 0 2006.229.05:57:14.04#ibcon#about to read 4, iclass 17, count 0 2006.229.05:57:14.04#ibcon#read 4, iclass 17, count 0 2006.229.05:57:14.04#ibcon#about to read 5, iclass 17, count 0 2006.229.05:57:14.04#ibcon#read 5, iclass 17, count 0 2006.229.05:57:14.04#ibcon#about to read 6, iclass 17, count 0 2006.229.05:57:14.04#ibcon#read 6, iclass 17, count 0 2006.229.05:57:14.04#ibcon#end of sib2, iclass 17, count 0 2006.229.05:57:14.04#ibcon#*mode == 0, iclass 17, count 0 2006.229.05:57:14.04#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.05:57:14.04#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.05:57:14.04#ibcon#*before write, iclass 17, count 0 2006.229.05:57:14.04#ibcon#enter sib2, iclass 17, count 0 2006.229.05:57:14.04#ibcon#flushed, iclass 17, count 0 2006.229.05:57:14.04#ibcon#about to write, iclass 17, count 0 2006.229.05:57:14.04#ibcon#wrote, iclass 17, count 0 2006.229.05:57:14.04#ibcon#about to read 3, iclass 17, count 0 2006.229.05:57:14.08#ibcon#read 3, iclass 17, count 0 2006.229.05:57:14.08#ibcon#about to read 4, iclass 17, count 0 2006.229.05:57:14.08#ibcon#read 4, iclass 17, count 0 2006.229.05:57:14.08#ibcon#about to read 5, iclass 17, count 0 2006.229.05:57:14.08#ibcon#read 5, iclass 17, count 0 2006.229.05:57:14.08#ibcon#about to read 6, iclass 17, count 0 2006.229.05:57:14.08#ibcon#read 6, iclass 17, count 0 2006.229.05:57:14.08#ibcon#end of sib2, iclass 17, count 0 2006.229.05:57:14.08#ibcon#*after write, iclass 17, count 0 2006.229.05:57:14.08#ibcon#*before return 0, iclass 17, count 0 2006.229.05:57:14.08#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:14.08#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.05:57:14.08#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.05:57:14.08#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.05:57:14.08$vck44/vb=4,4 2006.229.05:57:14.08#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.05:57:14.08#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.05:57:14.08#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:14.08#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:14.14#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:14.14#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:14.14#ibcon#enter wrdev, iclass 19, count 2 2006.229.05:57:14.14#ibcon#first serial, iclass 19, count 2 2006.229.05:57:14.14#ibcon#enter sib2, iclass 19, count 2 2006.229.05:57:14.14#ibcon#flushed, iclass 19, count 2 2006.229.05:57:14.14#ibcon#about to write, iclass 19, count 2 2006.229.05:57:14.14#ibcon#wrote, iclass 19, count 2 2006.229.05:57:14.14#ibcon#about to read 3, iclass 19, count 2 2006.229.05:57:14.16#ibcon#read 3, iclass 19, count 2 2006.229.05:57:14.16#ibcon#about to read 4, iclass 19, count 2 2006.229.05:57:14.16#ibcon#read 4, iclass 19, count 2 2006.229.05:57:14.16#ibcon#about to read 5, iclass 19, count 2 2006.229.05:57:14.16#ibcon#read 5, iclass 19, count 2 2006.229.05:57:14.16#ibcon#about to read 6, iclass 19, count 2 2006.229.05:57:14.16#ibcon#read 6, iclass 19, count 2 2006.229.05:57:14.16#ibcon#end of sib2, iclass 19, count 2 2006.229.05:57:14.16#ibcon#*mode == 0, iclass 19, count 2 2006.229.05:57:14.16#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.05:57:14.16#ibcon#[27=AT04-04\r\n] 2006.229.05:57:14.16#ibcon#*before write, iclass 19, count 2 2006.229.05:57:14.16#ibcon#enter sib2, iclass 19, count 2 2006.229.05:57:14.16#ibcon#flushed, iclass 19, count 2 2006.229.05:57:14.16#ibcon#about to write, iclass 19, count 2 2006.229.05:57:14.16#ibcon#wrote, iclass 19, count 2 2006.229.05:57:14.16#ibcon#about to read 3, iclass 19, count 2 2006.229.05:57:14.19#ibcon#read 3, iclass 19, count 2 2006.229.05:57:14.19#ibcon#about to read 4, iclass 19, count 2 2006.229.05:57:14.19#ibcon#read 4, iclass 19, count 2 2006.229.05:57:14.19#ibcon#about to read 5, iclass 19, count 2 2006.229.05:57:14.19#ibcon#read 5, iclass 19, count 2 2006.229.05:57:14.19#ibcon#about to read 6, iclass 19, count 2 2006.229.05:57:14.19#ibcon#read 6, iclass 19, count 2 2006.229.05:57:14.19#ibcon#end of sib2, iclass 19, count 2 2006.229.05:57:14.19#ibcon#*after write, iclass 19, count 2 2006.229.05:57:14.19#ibcon#*before return 0, iclass 19, count 2 2006.229.05:57:14.19#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:14.19#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.05:57:14.19#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.05:57:14.19#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:14.19#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:14.31#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:14.31#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:14.31#ibcon#enter wrdev, iclass 19, count 0 2006.229.05:57:14.31#ibcon#first serial, iclass 19, count 0 2006.229.05:57:14.31#ibcon#enter sib2, iclass 19, count 0 2006.229.05:57:14.31#ibcon#flushed, iclass 19, count 0 2006.229.05:57:14.31#ibcon#about to write, iclass 19, count 0 2006.229.05:57:14.31#ibcon#wrote, iclass 19, count 0 2006.229.05:57:14.31#ibcon#about to read 3, iclass 19, count 0 2006.229.05:57:14.33#ibcon#read 3, iclass 19, count 0 2006.229.05:57:14.33#ibcon#about to read 4, iclass 19, count 0 2006.229.05:57:14.33#ibcon#read 4, iclass 19, count 0 2006.229.05:57:14.33#ibcon#about to read 5, iclass 19, count 0 2006.229.05:57:14.33#ibcon#read 5, iclass 19, count 0 2006.229.05:57:14.33#ibcon#about to read 6, iclass 19, count 0 2006.229.05:57:14.33#ibcon#read 6, iclass 19, count 0 2006.229.05:57:14.33#ibcon#end of sib2, iclass 19, count 0 2006.229.05:57:14.33#ibcon#*mode == 0, iclass 19, count 0 2006.229.05:57:14.33#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.05:57:14.33#ibcon#[27=USB\r\n] 2006.229.05:57:14.33#ibcon#*before write, iclass 19, count 0 2006.229.05:57:14.33#ibcon#enter sib2, iclass 19, count 0 2006.229.05:57:14.33#ibcon#flushed, iclass 19, count 0 2006.229.05:57:14.33#ibcon#about to write, iclass 19, count 0 2006.229.05:57:14.33#ibcon#wrote, iclass 19, count 0 2006.229.05:57:14.33#ibcon#about to read 3, iclass 19, count 0 2006.229.05:57:14.36#ibcon#read 3, iclass 19, count 0 2006.229.05:57:14.36#ibcon#about to read 4, iclass 19, count 0 2006.229.05:57:14.36#ibcon#read 4, iclass 19, count 0 2006.229.05:57:14.36#ibcon#about to read 5, iclass 19, count 0 2006.229.05:57:14.36#ibcon#read 5, iclass 19, count 0 2006.229.05:57:14.36#ibcon#about to read 6, iclass 19, count 0 2006.229.05:57:14.36#ibcon#read 6, iclass 19, count 0 2006.229.05:57:14.36#ibcon#end of sib2, iclass 19, count 0 2006.229.05:57:14.36#ibcon#*after write, iclass 19, count 0 2006.229.05:57:14.36#ibcon#*before return 0, iclass 19, count 0 2006.229.05:57:14.36#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:14.36#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.05:57:14.36#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.05:57:14.36#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.05:57:14.36$vck44/vblo=5,709.99 2006.229.05:57:14.36#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.05:57:14.36#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.05:57:14.36#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:14.36#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:14.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:14.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:14.36#ibcon#enter wrdev, iclass 21, count 0 2006.229.05:57:14.36#ibcon#first serial, iclass 21, count 0 2006.229.05:57:14.36#ibcon#enter sib2, iclass 21, count 0 2006.229.05:57:14.36#ibcon#flushed, iclass 21, count 0 2006.229.05:57:14.36#ibcon#about to write, iclass 21, count 0 2006.229.05:57:14.36#ibcon#wrote, iclass 21, count 0 2006.229.05:57:14.36#ibcon#about to read 3, iclass 21, count 0 2006.229.05:57:14.38#ibcon#read 3, iclass 21, count 0 2006.229.05:57:14.38#ibcon#about to read 4, iclass 21, count 0 2006.229.05:57:14.38#ibcon#read 4, iclass 21, count 0 2006.229.05:57:14.38#ibcon#about to read 5, iclass 21, count 0 2006.229.05:57:14.38#ibcon#read 5, iclass 21, count 0 2006.229.05:57:14.38#ibcon#about to read 6, iclass 21, count 0 2006.229.05:57:14.38#ibcon#read 6, iclass 21, count 0 2006.229.05:57:14.38#ibcon#end of sib2, iclass 21, count 0 2006.229.05:57:14.38#ibcon#*mode == 0, iclass 21, count 0 2006.229.05:57:14.38#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.05:57:14.38#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.05:57:14.38#ibcon#*before write, iclass 21, count 0 2006.229.05:57:14.38#ibcon#enter sib2, iclass 21, count 0 2006.229.05:57:14.38#ibcon#flushed, iclass 21, count 0 2006.229.05:57:14.38#ibcon#about to write, iclass 21, count 0 2006.229.05:57:14.38#ibcon#wrote, iclass 21, count 0 2006.229.05:57:14.38#ibcon#about to read 3, iclass 21, count 0 2006.229.05:57:14.42#ibcon#read 3, iclass 21, count 0 2006.229.05:57:14.42#ibcon#about to read 4, iclass 21, count 0 2006.229.05:57:14.42#ibcon#read 4, iclass 21, count 0 2006.229.05:57:14.42#ibcon#about to read 5, iclass 21, count 0 2006.229.05:57:14.42#ibcon#read 5, iclass 21, count 0 2006.229.05:57:14.42#ibcon#about to read 6, iclass 21, count 0 2006.229.05:57:14.42#ibcon#read 6, iclass 21, count 0 2006.229.05:57:14.42#ibcon#end of sib2, iclass 21, count 0 2006.229.05:57:14.42#ibcon#*after write, iclass 21, count 0 2006.229.05:57:14.42#ibcon#*before return 0, iclass 21, count 0 2006.229.05:57:14.42#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:14.42#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.05:57:14.42#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.05:57:14.42#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.05:57:14.42$vck44/vb=5,4 2006.229.05:57:14.42#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.05:57:14.42#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.05:57:14.42#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:14.42#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:14.48#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:14.48#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:14.48#ibcon#enter wrdev, iclass 23, count 2 2006.229.05:57:14.48#ibcon#first serial, iclass 23, count 2 2006.229.05:57:14.48#ibcon#enter sib2, iclass 23, count 2 2006.229.05:57:14.48#ibcon#flushed, iclass 23, count 2 2006.229.05:57:14.48#ibcon#about to write, iclass 23, count 2 2006.229.05:57:14.48#ibcon#wrote, iclass 23, count 2 2006.229.05:57:14.48#ibcon#about to read 3, iclass 23, count 2 2006.229.05:57:14.50#ibcon#read 3, iclass 23, count 2 2006.229.05:57:14.50#ibcon#about to read 4, iclass 23, count 2 2006.229.05:57:14.50#ibcon#read 4, iclass 23, count 2 2006.229.05:57:14.50#ibcon#about to read 5, iclass 23, count 2 2006.229.05:57:14.50#ibcon#read 5, iclass 23, count 2 2006.229.05:57:14.50#ibcon#about to read 6, iclass 23, count 2 2006.229.05:57:14.50#ibcon#read 6, iclass 23, count 2 2006.229.05:57:14.50#ibcon#end of sib2, iclass 23, count 2 2006.229.05:57:14.50#ibcon#*mode == 0, iclass 23, count 2 2006.229.05:57:14.50#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.05:57:14.50#ibcon#[27=AT05-04\r\n] 2006.229.05:57:14.50#ibcon#*before write, iclass 23, count 2 2006.229.05:57:14.50#ibcon#enter sib2, iclass 23, count 2 2006.229.05:57:14.50#ibcon#flushed, iclass 23, count 2 2006.229.05:57:14.50#ibcon#about to write, iclass 23, count 2 2006.229.05:57:14.50#ibcon#wrote, iclass 23, count 2 2006.229.05:57:14.50#ibcon#about to read 3, iclass 23, count 2 2006.229.05:57:14.53#ibcon#read 3, iclass 23, count 2 2006.229.05:57:14.53#ibcon#about to read 4, iclass 23, count 2 2006.229.05:57:14.53#ibcon#read 4, iclass 23, count 2 2006.229.05:57:14.53#ibcon#about to read 5, iclass 23, count 2 2006.229.05:57:14.53#ibcon#read 5, iclass 23, count 2 2006.229.05:57:14.53#ibcon#about to read 6, iclass 23, count 2 2006.229.05:57:14.53#ibcon#read 6, iclass 23, count 2 2006.229.05:57:14.53#ibcon#end of sib2, iclass 23, count 2 2006.229.05:57:14.53#ibcon#*after write, iclass 23, count 2 2006.229.05:57:14.53#ibcon#*before return 0, iclass 23, count 2 2006.229.05:57:14.53#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:14.53#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.05:57:14.53#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.05:57:14.53#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:14.53#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:14.65#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:14.65#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:14.65#ibcon#enter wrdev, iclass 23, count 0 2006.229.05:57:14.65#ibcon#first serial, iclass 23, count 0 2006.229.05:57:14.65#ibcon#enter sib2, iclass 23, count 0 2006.229.05:57:14.65#ibcon#flushed, iclass 23, count 0 2006.229.05:57:14.65#ibcon#about to write, iclass 23, count 0 2006.229.05:57:14.65#ibcon#wrote, iclass 23, count 0 2006.229.05:57:14.65#ibcon#about to read 3, iclass 23, count 0 2006.229.05:57:14.67#ibcon#read 3, iclass 23, count 0 2006.229.05:57:14.67#ibcon#about to read 4, iclass 23, count 0 2006.229.05:57:14.67#ibcon#read 4, iclass 23, count 0 2006.229.05:57:14.67#ibcon#about to read 5, iclass 23, count 0 2006.229.05:57:14.67#ibcon#read 5, iclass 23, count 0 2006.229.05:57:14.67#ibcon#about to read 6, iclass 23, count 0 2006.229.05:57:14.67#ibcon#read 6, iclass 23, count 0 2006.229.05:57:14.67#ibcon#end of sib2, iclass 23, count 0 2006.229.05:57:14.67#ibcon#*mode == 0, iclass 23, count 0 2006.229.05:57:14.67#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.05:57:14.67#ibcon#[27=USB\r\n] 2006.229.05:57:14.67#ibcon#*before write, iclass 23, count 0 2006.229.05:57:14.67#ibcon#enter sib2, iclass 23, count 0 2006.229.05:57:14.67#ibcon#flushed, iclass 23, count 0 2006.229.05:57:14.67#ibcon#about to write, iclass 23, count 0 2006.229.05:57:14.67#ibcon#wrote, iclass 23, count 0 2006.229.05:57:14.67#ibcon#about to read 3, iclass 23, count 0 2006.229.05:57:14.70#ibcon#read 3, iclass 23, count 0 2006.229.05:57:14.70#ibcon#about to read 4, iclass 23, count 0 2006.229.05:57:14.70#ibcon#read 4, iclass 23, count 0 2006.229.05:57:14.70#ibcon#about to read 5, iclass 23, count 0 2006.229.05:57:14.70#ibcon#read 5, iclass 23, count 0 2006.229.05:57:14.70#ibcon#about to read 6, iclass 23, count 0 2006.229.05:57:14.70#ibcon#read 6, iclass 23, count 0 2006.229.05:57:14.70#ibcon#end of sib2, iclass 23, count 0 2006.229.05:57:14.70#ibcon#*after write, iclass 23, count 0 2006.229.05:57:14.70#ibcon#*before return 0, iclass 23, count 0 2006.229.05:57:14.70#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:14.70#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.05:57:14.70#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.05:57:14.70#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.05:57:14.70$vck44/vblo=6,719.99 2006.229.05:57:14.70#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.05:57:14.70#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.05:57:14.70#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:14.70#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:14.70#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:14.70#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:14.70#ibcon#enter wrdev, iclass 25, count 0 2006.229.05:57:14.70#ibcon#first serial, iclass 25, count 0 2006.229.05:57:14.70#ibcon#enter sib2, iclass 25, count 0 2006.229.05:57:14.70#ibcon#flushed, iclass 25, count 0 2006.229.05:57:14.70#ibcon#about to write, iclass 25, count 0 2006.229.05:57:14.70#ibcon#wrote, iclass 25, count 0 2006.229.05:57:14.70#ibcon#about to read 3, iclass 25, count 0 2006.229.05:57:14.72#ibcon#read 3, iclass 25, count 0 2006.229.05:57:14.72#ibcon#about to read 4, iclass 25, count 0 2006.229.05:57:14.72#ibcon#read 4, iclass 25, count 0 2006.229.05:57:14.72#ibcon#about to read 5, iclass 25, count 0 2006.229.05:57:14.72#ibcon#read 5, iclass 25, count 0 2006.229.05:57:14.72#ibcon#about to read 6, iclass 25, count 0 2006.229.05:57:14.72#ibcon#read 6, iclass 25, count 0 2006.229.05:57:14.72#ibcon#end of sib2, iclass 25, count 0 2006.229.05:57:14.72#ibcon#*mode == 0, iclass 25, count 0 2006.229.05:57:14.72#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.05:57:14.72#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.05:57:14.72#ibcon#*before write, iclass 25, count 0 2006.229.05:57:14.72#ibcon#enter sib2, iclass 25, count 0 2006.229.05:57:14.72#ibcon#flushed, iclass 25, count 0 2006.229.05:57:14.72#ibcon#about to write, iclass 25, count 0 2006.229.05:57:14.72#ibcon#wrote, iclass 25, count 0 2006.229.05:57:14.72#ibcon#about to read 3, iclass 25, count 0 2006.229.05:57:14.76#ibcon#read 3, iclass 25, count 0 2006.229.05:57:14.76#ibcon#about to read 4, iclass 25, count 0 2006.229.05:57:14.76#ibcon#read 4, iclass 25, count 0 2006.229.05:57:14.76#ibcon#about to read 5, iclass 25, count 0 2006.229.05:57:14.76#ibcon#read 5, iclass 25, count 0 2006.229.05:57:14.76#ibcon#about to read 6, iclass 25, count 0 2006.229.05:57:14.76#ibcon#read 6, iclass 25, count 0 2006.229.05:57:14.76#ibcon#end of sib2, iclass 25, count 0 2006.229.05:57:14.76#ibcon#*after write, iclass 25, count 0 2006.229.05:57:14.76#ibcon#*before return 0, iclass 25, count 0 2006.229.05:57:14.76#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:14.76#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.05:57:14.76#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.05:57:14.76#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.05:57:14.76$vck44/vb=6,4 2006.229.05:57:14.76#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.05:57:14.76#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.05:57:14.76#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:14.76#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:14.82#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:14.82#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:14.82#ibcon#enter wrdev, iclass 27, count 2 2006.229.05:57:14.82#ibcon#first serial, iclass 27, count 2 2006.229.05:57:14.82#ibcon#enter sib2, iclass 27, count 2 2006.229.05:57:14.82#ibcon#flushed, iclass 27, count 2 2006.229.05:57:14.82#ibcon#about to write, iclass 27, count 2 2006.229.05:57:14.82#ibcon#wrote, iclass 27, count 2 2006.229.05:57:14.82#ibcon#about to read 3, iclass 27, count 2 2006.229.05:57:14.84#ibcon#read 3, iclass 27, count 2 2006.229.05:57:14.84#ibcon#about to read 4, iclass 27, count 2 2006.229.05:57:14.84#ibcon#read 4, iclass 27, count 2 2006.229.05:57:14.84#ibcon#about to read 5, iclass 27, count 2 2006.229.05:57:14.84#ibcon#read 5, iclass 27, count 2 2006.229.05:57:14.84#ibcon#about to read 6, iclass 27, count 2 2006.229.05:57:14.84#ibcon#read 6, iclass 27, count 2 2006.229.05:57:14.84#ibcon#end of sib2, iclass 27, count 2 2006.229.05:57:14.84#ibcon#*mode == 0, iclass 27, count 2 2006.229.05:57:14.84#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.05:57:14.84#ibcon#[27=AT06-04\r\n] 2006.229.05:57:14.84#ibcon#*before write, iclass 27, count 2 2006.229.05:57:14.84#ibcon#enter sib2, iclass 27, count 2 2006.229.05:57:14.84#ibcon#flushed, iclass 27, count 2 2006.229.05:57:14.84#ibcon#about to write, iclass 27, count 2 2006.229.05:57:14.84#ibcon#wrote, iclass 27, count 2 2006.229.05:57:14.84#ibcon#about to read 3, iclass 27, count 2 2006.229.05:57:14.87#ibcon#read 3, iclass 27, count 2 2006.229.05:57:14.87#ibcon#about to read 4, iclass 27, count 2 2006.229.05:57:14.87#ibcon#read 4, iclass 27, count 2 2006.229.05:57:14.87#ibcon#about to read 5, iclass 27, count 2 2006.229.05:57:14.87#ibcon#read 5, iclass 27, count 2 2006.229.05:57:14.87#ibcon#about to read 6, iclass 27, count 2 2006.229.05:57:14.87#ibcon#read 6, iclass 27, count 2 2006.229.05:57:14.87#ibcon#end of sib2, iclass 27, count 2 2006.229.05:57:14.87#ibcon#*after write, iclass 27, count 2 2006.229.05:57:14.87#ibcon#*before return 0, iclass 27, count 2 2006.229.05:57:14.87#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:14.87#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.05:57:14.87#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.05:57:14.87#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:14.87#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:14.99#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:14.99#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:14.99#ibcon#enter wrdev, iclass 27, count 0 2006.229.05:57:14.99#ibcon#first serial, iclass 27, count 0 2006.229.05:57:14.99#ibcon#enter sib2, iclass 27, count 0 2006.229.05:57:14.99#ibcon#flushed, iclass 27, count 0 2006.229.05:57:14.99#ibcon#about to write, iclass 27, count 0 2006.229.05:57:14.99#ibcon#wrote, iclass 27, count 0 2006.229.05:57:14.99#ibcon#about to read 3, iclass 27, count 0 2006.229.05:57:15.01#ibcon#read 3, iclass 27, count 0 2006.229.05:57:15.01#ibcon#about to read 4, iclass 27, count 0 2006.229.05:57:15.01#ibcon#read 4, iclass 27, count 0 2006.229.05:57:15.01#ibcon#about to read 5, iclass 27, count 0 2006.229.05:57:15.01#ibcon#read 5, iclass 27, count 0 2006.229.05:57:15.01#ibcon#about to read 6, iclass 27, count 0 2006.229.05:57:15.01#ibcon#read 6, iclass 27, count 0 2006.229.05:57:15.01#ibcon#end of sib2, iclass 27, count 0 2006.229.05:57:15.01#ibcon#*mode == 0, iclass 27, count 0 2006.229.05:57:15.01#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.05:57:15.01#ibcon#[27=USB\r\n] 2006.229.05:57:15.01#ibcon#*before write, iclass 27, count 0 2006.229.05:57:15.01#ibcon#enter sib2, iclass 27, count 0 2006.229.05:57:15.01#ibcon#flushed, iclass 27, count 0 2006.229.05:57:15.01#ibcon#about to write, iclass 27, count 0 2006.229.05:57:15.01#ibcon#wrote, iclass 27, count 0 2006.229.05:57:15.01#ibcon#about to read 3, iclass 27, count 0 2006.229.05:57:15.04#ibcon#read 3, iclass 27, count 0 2006.229.05:57:15.04#ibcon#about to read 4, iclass 27, count 0 2006.229.05:57:15.04#ibcon#read 4, iclass 27, count 0 2006.229.05:57:15.04#ibcon#about to read 5, iclass 27, count 0 2006.229.05:57:15.04#ibcon#read 5, iclass 27, count 0 2006.229.05:57:15.04#ibcon#about to read 6, iclass 27, count 0 2006.229.05:57:15.04#ibcon#read 6, iclass 27, count 0 2006.229.05:57:15.04#ibcon#end of sib2, iclass 27, count 0 2006.229.05:57:15.04#ibcon#*after write, iclass 27, count 0 2006.229.05:57:15.04#ibcon#*before return 0, iclass 27, count 0 2006.229.05:57:15.04#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:15.04#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.05:57:15.04#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.05:57:15.04#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.05:57:15.04$vck44/vblo=7,734.99 2006.229.05:57:15.04#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.05:57:15.04#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.05:57:15.04#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:15.04#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:15.04#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:15.04#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:15.04#ibcon#enter wrdev, iclass 29, count 0 2006.229.05:57:15.04#ibcon#first serial, iclass 29, count 0 2006.229.05:57:15.04#ibcon#enter sib2, iclass 29, count 0 2006.229.05:57:15.04#ibcon#flushed, iclass 29, count 0 2006.229.05:57:15.04#ibcon#about to write, iclass 29, count 0 2006.229.05:57:15.04#ibcon#wrote, iclass 29, count 0 2006.229.05:57:15.04#ibcon#about to read 3, iclass 29, count 0 2006.229.05:57:15.06#ibcon#read 3, iclass 29, count 0 2006.229.05:57:15.06#ibcon#about to read 4, iclass 29, count 0 2006.229.05:57:15.06#ibcon#read 4, iclass 29, count 0 2006.229.05:57:15.06#ibcon#about to read 5, iclass 29, count 0 2006.229.05:57:15.06#ibcon#read 5, iclass 29, count 0 2006.229.05:57:15.06#ibcon#about to read 6, iclass 29, count 0 2006.229.05:57:15.06#ibcon#read 6, iclass 29, count 0 2006.229.05:57:15.06#ibcon#end of sib2, iclass 29, count 0 2006.229.05:57:15.06#ibcon#*mode == 0, iclass 29, count 0 2006.229.05:57:15.06#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.05:57:15.06#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.05:57:15.06#ibcon#*before write, iclass 29, count 0 2006.229.05:57:15.06#ibcon#enter sib2, iclass 29, count 0 2006.229.05:57:15.06#ibcon#flushed, iclass 29, count 0 2006.229.05:57:15.06#ibcon#about to write, iclass 29, count 0 2006.229.05:57:15.06#ibcon#wrote, iclass 29, count 0 2006.229.05:57:15.06#ibcon#about to read 3, iclass 29, count 0 2006.229.05:57:15.10#ibcon#read 3, iclass 29, count 0 2006.229.05:57:15.10#ibcon#about to read 4, iclass 29, count 0 2006.229.05:57:15.10#ibcon#read 4, iclass 29, count 0 2006.229.05:57:15.10#ibcon#about to read 5, iclass 29, count 0 2006.229.05:57:15.10#ibcon#read 5, iclass 29, count 0 2006.229.05:57:15.10#ibcon#about to read 6, iclass 29, count 0 2006.229.05:57:15.10#ibcon#read 6, iclass 29, count 0 2006.229.05:57:15.10#ibcon#end of sib2, iclass 29, count 0 2006.229.05:57:15.10#ibcon#*after write, iclass 29, count 0 2006.229.05:57:15.10#ibcon#*before return 0, iclass 29, count 0 2006.229.05:57:15.10#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:15.10#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.05:57:15.10#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.05:57:15.10#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.05:57:15.10$vck44/vb=7,4 2006.229.05:57:15.10#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.05:57:15.10#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.05:57:15.10#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:15.10#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:15.16#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:15.16#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:15.16#ibcon#enter wrdev, iclass 31, count 2 2006.229.05:57:15.16#ibcon#first serial, iclass 31, count 2 2006.229.05:57:15.16#ibcon#enter sib2, iclass 31, count 2 2006.229.05:57:15.16#ibcon#flushed, iclass 31, count 2 2006.229.05:57:15.16#ibcon#about to write, iclass 31, count 2 2006.229.05:57:15.16#ibcon#wrote, iclass 31, count 2 2006.229.05:57:15.16#ibcon#about to read 3, iclass 31, count 2 2006.229.05:57:15.18#ibcon#read 3, iclass 31, count 2 2006.229.05:57:15.18#ibcon#about to read 4, iclass 31, count 2 2006.229.05:57:15.18#ibcon#read 4, iclass 31, count 2 2006.229.05:57:15.18#ibcon#about to read 5, iclass 31, count 2 2006.229.05:57:15.18#ibcon#read 5, iclass 31, count 2 2006.229.05:57:15.18#ibcon#about to read 6, iclass 31, count 2 2006.229.05:57:15.18#ibcon#read 6, iclass 31, count 2 2006.229.05:57:15.18#ibcon#end of sib2, iclass 31, count 2 2006.229.05:57:15.18#ibcon#*mode == 0, iclass 31, count 2 2006.229.05:57:15.18#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.05:57:15.18#ibcon#[27=AT07-04\r\n] 2006.229.05:57:15.18#ibcon#*before write, iclass 31, count 2 2006.229.05:57:15.18#ibcon#enter sib2, iclass 31, count 2 2006.229.05:57:15.18#ibcon#flushed, iclass 31, count 2 2006.229.05:57:15.18#ibcon#about to write, iclass 31, count 2 2006.229.05:57:15.18#ibcon#wrote, iclass 31, count 2 2006.229.05:57:15.18#ibcon#about to read 3, iclass 31, count 2 2006.229.05:57:15.21#ibcon#read 3, iclass 31, count 2 2006.229.05:57:15.21#ibcon#about to read 4, iclass 31, count 2 2006.229.05:57:15.21#ibcon#read 4, iclass 31, count 2 2006.229.05:57:15.21#ibcon#about to read 5, iclass 31, count 2 2006.229.05:57:15.21#ibcon#read 5, iclass 31, count 2 2006.229.05:57:15.21#ibcon#about to read 6, iclass 31, count 2 2006.229.05:57:15.21#ibcon#read 6, iclass 31, count 2 2006.229.05:57:15.21#ibcon#end of sib2, iclass 31, count 2 2006.229.05:57:15.21#ibcon#*after write, iclass 31, count 2 2006.229.05:57:15.21#ibcon#*before return 0, iclass 31, count 2 2006.229.05:57:15.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:15.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.05:57:15.21#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.05:57:15.21#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:15.21#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:15.33#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:15.33#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:15.33#ibcon#enter wrdev, iclass 31, count 0 2006.229.05:57:15.33#ibcon#first serial, iclass 31, count 0 2006.229.05:57:15.33#ibcon#enter sib2, iclass 31, count 0 2006.229.05:57:15.33#ibcon#flushed, iclass 31, count 0 2006.229.05:57:15.33#ibcon#about to write, iclass 31, count 0 2006.229.05:57:15.33#ibcon#wrote, iclass 31, count 0 2006.229.05:57:15.33#ibcon#about to read 3, iclass 31, count 0 2006.229.05:57:15.35#ibcon#read 3, iclass 31, count 0 2006.229.05:57:15.35#ibcon#about to read 4, iclass 31, count 0 2006.229.05:57:15.35#ibcon#read 4, iclass 31, count 0 2006.229.05:57:15.35#ibcon#about to read 5, iclass 31, count 0 2006.229.05:57:15.35#ibcon#read 5, iclass 31, count 0 2006.229.05:57:15.35#ibcon#about to read 6, iclass 31, count 0 2006.229.05:57:15.35#ibcon#read 6, iclass 31, count 0 2006.229.05:57:15.35#ibcon#end of sib2, iclass 31, count 0 2006.229.05:57:15.35#ibcon#*mode == 0, iclass 31, count 0 2006.229.05:57:15.35#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.05:57:15.35#ibcon#[27=USB\r\n] 2006.229.05:57:15.35#ibcon#*before write, iclass 31, count 0 2006.229.05:57:15.35#ibcon#enter sib2, iclass 31, count 0 2006.229.05:57:15.35#ibcon#flushed, iclass 31, count 0 2006.229.05:57:15.35#ibcon#about to write, iclass 31, count 0 2006.229.05:57:15.35#ibcon#wrote, iclass 31, count 0 2006.229.05:57:15.35#ibcon#about to read 3, iclass 31, count 0 2006.229.05:57:15.38#ibcon#read 3, iclass 31, count 0 2006.229.05:57:15.38#ibcon#about to read 4, iclass 31, count 0 2006.229.05:57:15.38#ibcon#read 4, iclass 31, count 0 2006.229.05:57:15.38#ibcon#about to read 5, iclass 31, count 0 2006.229.05:57:15.38#ibcon#read 5, iclass 31, count 0 2006.229.05:57:15.38#ibcon#about to read 6, iclass 31, count 0 2006.229.05:57:15.38#ibcon#read 6, iclass 31, count 0 2006.229.05:57:15.38#ibcon#end of sib2, iclass 31, count 0 2006.229.05:57:15.38#ibcon#*after write, iclass 31, count 0 2006.229.05:57:15.38#ibcon#*before return 0, iclass 31, count 0 2006.229.05:57:15.38#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:15.38#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.05:57:15.38#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.05:57:15.38#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.05:57:15.38$vck44/vblo=8,744.99 2006.229.05:57:15.38#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.05:57:15.38#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.05:57:15.38#ibcon#ireg 17 cls_cnt 0 2006.229.05:57:15.38#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:15.38#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:15.38#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:15.38#ibcon#enter wrdev, iclass 33, count 0 2006.229.05:57:15.38#ibcon#first serial, iclass 33, count 0 2006.229.05:57:15.38#ibcon#enter sib2, iclass 33, count 0 2006.229.05:57:15.38#ibcon#flushed, iclass 33, count 0 2006.229.05:57:15.38#ibcon#about to write, iclass 33, count 0 2006.229.05:57:15.38#ibcon#wrote, iclass 33, count 0 2006.229.05:57:15.38#ibcon#about to read 3, iclass 33, count 0 2006.229.05:57:15.40#ibcon#read 3, iclass 33, count 0 2006.229.05:57:15.40#ibcon#about to read 4, iclass 33, count 0 2006.229.05:57:15.40#ibcon#read 4, iclass 33, count 0 2006.229.05:57:15.40#ibcon#about to read 5, iclass 33, count 0 2006.229.05:57:15.40#ibcon#read 5, iclass 33, count 0 2006.229.05:57:15.40#ibcon#about to read 6, iclass 33, count 0 2006.229.05:57:15.40#ibcon#read 6, iclass 33, count 0 2006.229.05:57:15.40#ibcon#end of sib2, iclass 33, count 0 2006.229.05:57:15.40#ibcon#*mode == 0, iclass 33, count 0 2006.229.05:57:15.40#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.05:57:15.40#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.05:57:15.40#ibcon#*before write, iclass 33, count 0 2006.229.05:57:15.40#ibcon#enter sib2, iclass 33, count 0 2006.229.05:57:15.40#ibcon#flushed, iclass 33, count 0 2006.229.05:57:15.40#ibcon#about to write, iclass 33, count 0 2006.229.05:57:15.40#ibcon#wrote, iclass 33, count 0 2006.229.05:57:15.40#ibcon#about to read 3, iclass 33, count 0 2006.229.05:57:15.44#ibcon#read 3, iclass 33, count 0 2006.229.05:57:15.44#ibcon#about to read 4, iclass 33, count 0 2006.229.05:57:15.44#ibcon#read 4, iclass 33, count 0 2006.229.05:57:15.44#ibcon#about to read 5, iclass 33, count 0 2006.229.05:57:15.44#ibcon#read 5, iclass 33, count 0 2006.229.05:57:15.44#ibcon#about to read 6, iclass 33, count 0 2006.229.05:57:15.44#ibcon#read 6, iclass 33, count 0 2006.229.05:57:15.44#ibcon#end of sib2, iclass 33, count 0 2006.229.05:57:15.44#ibcon#*after write, iclass 33, count 0 2006.229.05:57:15.44#ibcon#*before return 0, iclass 33, count 0 2006.229.05:57:15.44#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:15.44#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.05:57:15.44#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.05:57:15.44#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.05:57:15.44$vck44/vb=8,4 2006.229.05:57:15.44#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.05:57:15.44#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.05:57:15.44#ibcon#ireg 11 cls_cnt 2 2006.229.05:57:15.44#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:15.50#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:15.50#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:15.50#ibcon#enter wrdev, iclass 35, count 2 2006.229.05:57:15.50#ibcon#first serial, iclass 35, count 2 2006.229.05:57:15.50#ibcon#enter sib2, iclass 35, count 2 2006.229.05:57:15.50#ibcon#flushed, iclass 35, count 2 2006.229.05:57:15.50#ibcon#about to write, iclass 35, count 2 2006.229.05:57:15.50#ibcon#wrote, iclass 35, count 2 2006.229.05:57:15.50#ibcon#about to read 3, iclass 35, count 2 2006.229.05:57:15.52#ibcon#read 3, iclass 35, count 2 2006.229.05:57:15.52#ibcon#about to read 4, iclass 35, count 2 2006.229.05:57:15.52#ibcon#read 4, iclass 35, count 2 2006.229.05:57:15.52#ibcon#about to read 5, iclass 35, count 2 2006.229.05:57:15.52#ibcon#read 5, iclass 35, count 2 2006.229.05:57:15.52#ibcon#about to read 6, iclass 35, count 2 2006.229.05:57:15.52#ibcon#read 6, iclass 35, count 2 2006.229.05:57:15.52#ibcon#end of sib2, iclass 35, count 2 2006.229.05:57:15.52#ibcon#*mode == 0, iclass 35, count 2 2006.229.05:57:15.52#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.05:57:15.52#ibcon#[27=AT08-04\r\n] 2006.229.05:57:15.52#ibcon#*before write, iclass 35, count 2 2006.229.05:57:15.52#ibcon#enter sib2, iclass 35, count 2 2006.229.05:57:15.52#ibcon#flushed, iclass 35, count 2 2006.229.05:57:15.52#ibcon#about to write, iclass 35, count 2 2006.229.05:57:15.52#ibcon#wrote, iclass 35, count 2 2006.229.05:57:15.52#ibcon#about to read 3, iclass 35, count 2 2006.229.05:57:15.55#ibcon#read 3, iclass 35, count 2 2006.229.05:57:15.55#ibcon#about to read 4, iclass 35, count 2 2006.229.05:57:15.55#ibcon#read 4, iclass 35, count 2 2006.229.05:57:15.55#ibcon#about to read 5, iclass 35, count 2 2006.229.05:57:15.55#ibcon#read 5, iclass 35, count 2 2006.229.05:57:15.55#ibcon#about to read 6, iclass 35, count 2 2006.229.05:57:15.55#ibcon#read 6, iclass 35, count 2 2006.229.05:57:15.55#ibcon#end of sib2, iclass 35, count 2 2006.229.05:57:15.55#ibcon#*after write, iclass 35, count 2 2006.229.05:57:15.55#ibcon#*before return 0, iclass 35, count 2 2006.229.05:57:15.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:15.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.05:57:15.55#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.05:57:15.55#ibcon#ireg 7 cls_cnt 0 2006.229.05:57:15.55#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:15.67#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:15.67#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:15.67#ibcon#enter wrdev, iclass 35, count 0 2006.229.05:57:15.67#ibcon#first serial, iclass 35, count 0 2006.229.05:57:15.67#ibcon#enter sib2, iclass 35, count 0 2006.229.05:57:15.67#ibcon#flushed, iclass 35, count 0 2006.229.05:57:15.67#ibcon#about to write, iclass 35, count 0 2006.229.05:57:15.67#ibcon#wrote, iclass 35, count 0 2006.229.05:57:15.67#ibcon#about to read 3, iclass 35, count 0 2006.229.05:57:15.69#ibcon#read 3, iclass 35, count 0 2006.229.05:57:15.69#ibcon#about to read 4, iclass 35, count 0 2006.229.05:57:15.69#ibcon#read 4, iclass 35, count 0 2006.229.05:57:15.69#ibcon#about to read 5, iclass 35, count 0 2006.229.05:57:15.69#ibcon#read 5, iclass 35, count 0 2006.229.05:57:15.69#ibcon#about to read 6, iclass 35, count 0 2006.229.05:57:15.69#ibcon#read 6, iclass 35, count 0 2006.229.05:57:15.69#ibcon#end of sib2, iclass 35, count 0 2006.229.05:57:15.69#ibcon#*mode == 0, iclass 35, count 0 2006.229.05:57:15.69#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.05:57:15.69#ibcon#[27=USB\r\n] 2006.229.05:57:15.69#ibcon#*before write, iclass 35, count 0 2006.229.05:57:15.69#ibcon#enter sib2, iclass 35, count 0 2006.229.05:57:15.69#ibcon#flushed, iclass 35, count 0 2006.229.05:57:15.69#ibcon#about to write, iclass 35, count 0 2006.229.05:57:15.69#ibcon#wrote, iclass 35, count 0 2006.229.05:57:15.69#ibcon#about to read 3, iclass 35, count 0 2006.229.05:57:15.72#ibcon#read 3, iclass 35, count 0 2006.229.05:57:15.72#ibcon#about to read 4, iclass 35, count 0 2006.229.05:57:15.72#ibcon#read 4, iclass 35, count 0 2006.229.05:57:15.72#ibcon#about to read 5, iclass 35, count 0 2006.229.05:57:15.72#ibcon#read 5, iclass 35, count 0 2006.229.05:57:15.72#ibcon#about to read 6, iclass 35, count 0 2006.229.05:57:15.72#ibcon#read 6, iclass 35, count 0 2006.229.05:57:15.72#ibcon#end of sib2, iclass 35, count 0 2006.229.05:57:15.72#ibcon#*after write, iclass 35, count 0 2006.229.05:57:15.72#ibcon#*before return 0, iclass 35, count 0 2006.229.05:57:15.72#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:15.72#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.05:57:15.72#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.05:57:15.72#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.05:57:15.72$vck44/vabw=wide 2006.229.05:57:15.72#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.05:57:15.72#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.05:57:15.72#ibcon#ireg 8 cls_cnt 0 2006.229.05:57:15.72#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:15.72#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:15.72#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:15.72#ibcon#enter wrdev, iclass 37, count 0 2006.229.05:57:15.72#ibcon#first serial, iclass 37, count 0 2006.229.05:57:15.72#ibcon#enter sib2, iclass 37, count 0 2006.229.05:57:15.72#ibcon#flushed, iclass 37, count 0 2006.229.05:57:15.72#ibcon#about to write, iclass 37, count 0 2006.229.05:57:15.72#ibcon#wrote, iclass 37, count 0 2006.229.05:57:15.72#ibcon#about to read 3, iclass 37, count 0 2006.229.05:57:15.74#ibcon#read 3, iclass 37, count 0 2006.229.05:57:15.74#ibcon#about to read 4, iclass 37, count 0 2006.229.05:57:15.74#ibcon#read 4, iclass 37, count 0 2006.229.05:57:15.74#ibcon#about to read 5, iclass 37, count 0 2006.229.05:57:15.74#ibcon#read 5, iclass 37, count 0 2006.229.05:57:15.74#ibcon#about to read 6, iclass 37, count 0 2006.229.05:57:15.74#ibcon#read 6, iclass 37, count 0 2006.229.05:57:15.74#ibcon#end of sib2, iclass 37, count 0 2006.229.05:57:15.74#ibcon#*mode == 0, iclass 37, count 0 2006.229.05:57:15.74#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.05:57:15.74#ibcon#[25=BW32\r\n] 2006.229.05:57:15.74#ibcon#*before write, iclass 37, count 0 2006.229.05:57:15.74#ibcon#enter sib2, iclass 37, count 0 2006.229.05:57:15.74#ibcon#flushed, iclass 37, count 0 2006.229.05:57:15.74#ibcon#about to write, iclass 37, count 0 2006.229.05:57:15.74#ibcon#wrote, iclass 37, count 0 2006.229.05:57:15.74#ibcon#about to read 3, iclass 37, count 0 2006.229.05:57:15.77#ibcon#read 3, iclass 37, count 0 2006.229.05:57:15.77#ibcon#about to read 4, iclass 37, count 0 2006.229.05:57:15.77#ibcon#read 4, iclass 37, count 0 2006.229.05:57:15.77#ibcon#about to read 5, iclass 37, count 0 2006.229.05:57:15.77#ibcon#read 5, iclass 37, count 0 2006.229.05:57:15.77#ibcon#about to read 6, iclass 37, count 0 2006.229.05:57:15.77#ibcon#read 6, iclass 37, count 0 2006.229.05:57:15.77#ibcon#end of sib2, iclass 37, count 0 2006.229.05:57:15.77#ibcon#*after write, iclass 37, count 0 2006.229.05:57:15.77#ibcon#*before return 0, iclass 37, count 0 2006.229.05:57:15.77#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:15.77#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.05:57:15.77#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.05:57:15.77#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.05:57:15.77$vck44/vbbw=wide 2006.229.05:57:15.77#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.05:57:15.77#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.05:57:15.77#ibcon#ireg 8 cls_cnt 0 2006.229.05:57:15.77#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:57:15.84#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:57:15.84#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:57:15.84#ibcon#enter wrdev, iclass 39, count 0 2006.229.05:57:15.84#ibcon#first serial, iclass 39, count 0 2006.229.05:57:15.84#ibcon#enter sib2, iclass 39, count 0 2006.229.05:57:15.84#ibcon#flushed, iclass 39, count 0 2006.229.05:57:15.84#ibcon#about to write, iclass 39, count 0 2006.229.05:57:15.84#ibcon#wrote, iclass 39, count 0 2006.229.05:57:15.84#ibcon#about to read 3, iclass 39, count 0 2006.229.05:57:15.86#ibcon#read 3, iclass 39, count 0 2006.229.05:57:15.86#ibcon#about to read 4, iclass 39, count 0 2006.229.05:57:15.86#ibcon#read 4, iclass 39, count 0 2006.229.05:57:15.86#ibcon#about to read 5, iclass 39, count 0 2006.229.05:57:15.86#ibcon#read 5, iclass 39, count 0 2006.229.05:57:15.86#ibcon#about to read 6, iclass 39, count 0 2006.229.05:57:15.86#ibcon#read 6, iclass 39, count 0 2006.229.05:57:15.86#ibcon#end of sib2, iclass 39, count 0 2006.229.05:57:15.86#ibcon#*mode == 0, iclass 39, count 0 2006.229.05:57:15.86#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.05:57:15.86#ibcon#[27=BW32\r\n] 2006.229.05:57:15.86#ibcon#*before write, iclass 39, count 0 2006.229.05:57:15.86#ibcon#enter sib2, iclass 39, count 0 2006.229.05:57:15.86#ibcon#flushed, iclass 39, count 0 2006.229.05:57:15.86#ibcon#about to write, iclass 39, count 0 2006.229.05:57:15.86#ibcon#wrote, iclass 39, count 0 2006.229.05:57:15.86#ibcon#about to read 3, iclass 39, count 0 2006.229.05:57:15.89#ibcon#read 3, iclass 39, count 0 2006.229.05:57:15.89#ibcon#about to read 4, iclass 39, count 0 2006.229.05:57:15.89#ibcon#read 4, iclass 39, count 0 2006.229.05:57:15.89#ibcon#about to read 5, iclass 39, count 0 2006.229.05:57:15.89#ibcon#read 5, iclass 39, count 0 2006.229.05:57:15.89#ibcon#about to read 6, iclass 39, count 0 2006.229.05:57:15.89#ibcon#read 6, iclass 39, count 0 2006.229.05:57:15.89#ibcon#end of sib2, iclass 39, count 0 2006.229.05:57:15.89#ibcon#*after write, iclass 39, count 0 2006.229.05:57:15.89#ibcon#*before return 0, iclass 39, count 0 2006.229.05:57:15.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:57:15.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.05:57:15.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.05:57:15.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.05:57:15.89$setupk4/ifdk4 2006.229.05:57:15.89$ifdk4/lo= 2006.229.05:57:15.89$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.05:57:15.89$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.05:57:15.89$ifdk4/patch= 2006.229.05:57:15.89$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.05:57:15.89$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.05:57:15.89$setupk4/!*+20s 2006.229.05:57:16.05#abcon#<5=/04 3.0 5.9 30.61 92 999.4\r\n> 2006.229.05:57:16.07#abcon#{5=INTERFACE CLEAR} 2006.229.05:57:16.13#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:57:26.22#abcon#<5=/04 3.0 5.9 30.62 92 999.4\r\n> 2006.229.05:57:26.24#abcon#{5=INTERFACE CLEAR} 2006.229.05:57:26.30#abcon#[5=S1D000X0/0*\r\n] 2006.229.05:57:30.40$setupk4/"tpicd 2006.229.05:57:30.40$setupk4/echo=off 2006.229.05:57:30.40$setupk4/xlog=off 2006.229.05:57:30.40:!2006.229.05:59:28 2006.229.05:57:33.14#trakl#Source acquired 2006.229.05:57:33.14#flagr#flagr/antenna,acquired 2006.229.05:59:28.00:preob 2006.229.05:59:28.13/onsource/TRACKING 2006.229.05:59:28.13:!2006.229.05:59:38 2006.229.05:59:38.00:"tape 2006.229.05:59:38.00:"st=record 2006.229.05:59:38.00:data_valid=on 2006.229.05:59:38.00:midob 2006.229.05:59:39.13/onsource/TRACKING 2006.229.05:59:39.13/wx/30.63,999.4,92 2006.229.05:59:39.30/cable/+6.3983E-03 2006.229.05:59:40.39/va/01,08,usb,yes,33,36 2006.229.05:59:40.39/va/02,07,usb,yes,36,36 2006.229.05:59:40.39/va/03,06,usb,yes,44,47 2006.229.05:59:40.39/va/04,07,usb,yes,37,39 2006.229.05:59:40.39/va/05,04,usb,yes,33,34 2006.229.05:59:40.39/va/06,04,usb,yes,37,37 2006.229.05:59:40.39/va/07,05,usb,yes,33,33 2006.229.05:59:40.39/va/08,06,usb,yes,24,30 2006.229.05:59:40.62/valo/01,524.99,yes,locked 2006.229.05:59:40.62/valo/02,534.99,yes,locked 2006.229.05:59:40.62/valo/03,564.99,yes,locked 2006.229.05:59:40.62/valo/04,624.99,yes,locked 2006.229.05:59:40.62/valo/05,734.99,yes,locked 2006.229.05:59:40.62/valo/06,814.99,yes,locked 2006.229.05:59:40.62/valo/07,864.99,yes,locked 2006.229.05:59:40.62/valo/08,884.99,yes,locked 2006.229.05:59:41.71/vb/01,04,usb,yes,34,31 2006.229.05:59:41.71/vb/02,04,usb,yes,36,36 2006.229.05:59:41.71/vb/03,04,usb,yes,33,36 2006.229.05:59:41.71/vb/04,04,usb,yes,38,36 2006.229.05:59:41.71/vb/05,04,usb,yes,29,32 2006.229.05:59:41.71/vb/06,04,usb,yes,34,30 2006.229.05:59:41.71/vb/07,04,usb,yes,34,34 2006.229.05:59:41.71/vb/08,04,usb,yes,31,35 2006.229.05:59:41.94/vblo/01,629.99,yes,locked 2006.229.05:59:41.94/vblo/02,634.99,yes,locked 2006.229.05:59:41.94/vblo/03,649.99,yes,locked 2006.229.05:59:41.94/vblo/04,679.99,yes,locked 2006.229.05:59:41.94/vblo/05,709.99,yes,locked 2006.229.05:59:41.94/vblo/06,719.99,yes,locked 2006.229.05:59:41.94/vblo/07,734.99,yes,locked 2006.229.05:59:41.94/vblo/08,744.99,yes,locked 2006.229.05:59:42.09/vabw/8 2006.229.05:59:42.24/vbbw/8 2006.229.05:59:42.36/xfe/off,on,12.0 2006.229.05:59:42.76/ifatt/23,28,28,28 2006.229.05:59:43.07/fmout-gps/S +4.47E-07 2006.229.05:59:43.11:!2006.229.06:00:18 2006.229.06:00:18.00:data_valid=off 2006.229.06:00:18.00:"et 2006.229.06:00:18.00:!+3s 2006.229.06:00:21.01:"tape 2006.229.06:00:21.01:postob 2006.229.06:00:21.10/cable/+6.3980E-03 2006.229.06:00:21.10/wx/30.63,999.3,92 2006.229.06:00:22.08/fmout-gps/S +4.46E-07 2006.229.06:00:22.08:scan_name=229-0603,jd0608,110 2006.229.06:00:22.08:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.06:00:23.14#flagr#flagr/antenna,new-source 2006.229.06:00:23.14:checkk5 2006.229.06:00:23.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:00:23.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:00:24.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:00:24.86/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:00:25.26/chk_obsdata//k5ts1/T2290559??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:00:25.67/chk_obsdata//k5ts2/T2290559??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:00:26.06/chk_obsdata//k5ts3/T2290559??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:00:26.47/chk_obsdata//k5ts4/T2290559??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:00:27.18/k5log//k5ts1_log_newline 2006.229.06:00:27.89/k5log//k5ts2_log_newline 2006.229.06:00:28.60/k5log//k5ts3_log_newline 2006.229.06:00:29.33/k5log//k5ts4_log_newline 2006.229.06:00:29.36/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:00:29.36:setupk4=1 2006.229.06:00:29.36$setupk4/echo=on 2006.229.06:00:29.36$setupk4/pcalon 2006.229.06:00:29.36$pcalon/"no phase cal control is implemented here 2006.229.06:00:29.36$setupk4/"tpicd=stop 2006.229.06:00:29.36$setupk4/"rec=synch_on 2006.229.06:00:29.36$setupk4/"rec_mode=128 2006.229.06:00:29.36$setupk4/!* 2006.229.06:00:29.36$setupk4/recpk4 2006.229.06:00:29.36$recpk4/recpatch= 2006.229.06:00:29.37$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:00:29.37$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:00:29.37$setupk4/vck44 2006.229.06:00:29.37$vck44/valo=1,524.99 2006.229.06:00:29.37#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:00:29.37#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:00:29.37#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:29.37#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:29.37#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:29.37#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:29.37#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:00:29.37#ibcon#first serial, iclass 16, count 0 2006.229.06:00:29.37#ibcon#enter sib2, iclass 16, count 0 2006.229.06:00:29.37#ibcon#flushed, iclass 16, count 0 2006.229.06:00:29.37#ibcon#about to write, iclass 16, count 0 2006.229.06:00:29.37#ibcon#wrote, iclass 16, count 0 2006.229.06:00:29.37#ibcon#about to read 3, iclass 16, count 0 2006.229.06:00:29.38#ibcon#read 3, iclass 16, count 0 2006.229.06:00:29.38#ibcon#about to read 4, iclass 16, count 0 2006.229.06:00:29.38#ibcon#read 4, iclass 16, count 0 2006.229.06:00:29.38#ibcon#about to read 5, iclass 16, count 0 2006.229.06:00:29.38#ibcon#read 5, iclass 16, count 0 2006.229.06:00:29.38#ibcon#about to read 6, iclass 16, count 0 2006.229.06:00:29.38#ibcon#read 6, iclass 16, count 0 2006.229.06:00:29.38#ibcon#end of sib2, iclass 16, count 0 2006.229.06:00:29.38#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:00:29.38#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:00:29.38#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:00:29.38#ibcon#*before write, iclass 16, count 0 2006.229.06:00:29.38#ibcon#enter sib2, iclass 16, count 0 2006.229.06:00:29.38#ibcon#flushed, iclass 16, count 0 2006.229.06:00:29.38#ibcon#about to write, iclass 16, count 0 2006.229.06:00:29.38#ibcon#wrote, iclass 16, count 0 2006.229.06:00:29.38#ibcon#about to read 3, iclass 16, count 0 2006.229.06:00:29.43#ibcon#read 3, iclass 16, count 0 2006.229.06:00:29.43#ibcon#about to read 4, iclass 16, count 0 2006.229.06:00:29.43#ibcon#read 4, iclass 16, count 0 2006.229.06:00:29.43#ibcon#about to read 5, iclass 16, count 0 2006.229.06:00:29.43#ibcon#read 5, iclass 16, count 0 2006.229.06:00:29.43#ibcon#about to read 6, iclass 16, count 0 2006.229.06:00:29.43#ibcon#read 6, iclass 16, count 0 2006.229.06:00:29.43#ibcon#end of sib2, iclass 16, count 0 2006.229.06:00:29.43#ibcon#*after write, iclass 16, count 0 2006.229.06:00:29.43#ibcon#*before return 0, iclass 16, count 0 2006.229.06:00:29.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:29.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:29.43#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:00:29.43#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:00:29.43$vck44/va=1,8 2006.229.06:00:29.43#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.06:00:29.43#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.06:00:29.43#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:29.43#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:29.43#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:29.43#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:29.43#ibcon#enter wrdev, iclass 18, count 2 2006.229.06:00:29.43#ibcon#first serial, iclass 18, count 2 2006.229.06:00:29.43#ibcon#enter sib2, iclass 18, count 2 2006.229.06:00:29.43#ibcon#flushed, iclass 18, count 2 2006.229.06:00:29.43#ibcon#about to write, iclass 18, count 2 2006.229.06:00:29.43#ibcon#wrote, iclass 18, count 2 2006.229.06:00:29.43#ibcon#about to read 3, iclass 18, count 2 2006.229.06:00:29.45#ibcon#read 3, iclass 18, count 2 2006.229.06:00:29.45#ibcon#about to read 4, iclass 18, count 2 2006.229.06:00:29.45#ibcon#read 4, iclass 18, count 2 2006.229.06:00:29.45#ibcon#about to read 5, iclass 18, count 2 2006.229.06:00:29.45#ibcon#read 5, iclass 18, count 2 2006.229.06:00:29.45#ibcon#about to read 6, iclass 18, count 2 2006.229.06:00:29.45#ibcon#read 6, iclass 18, count 2 2006.229.06:00:29.45#ibcon#end of sib2, iclass 18, count 2 2006.229.06:00:29.45#ibcon#*mode == 0, iclass 18, count 2 2006.229.06:00:29.45#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.06:00:29.45#ibcon#[25=AT01-08\r\n] 2006.229.06:00:29.45#ibcon#*before write, iclass 18, count 2 2006.229.06:00:29.45#ibcon#enter sib2, iclass 18, count 2 2006.229.06:00:29.45#ibcon#flushed, iclass 18, count 2 2006.229.06:00:29.45#ibcon#about to write, iclass 18, count 2 2006.229.06:00:29.45#ibcon#wrote, iclass 18, count 2 2006.229.06:00:29.45#ibcon#about to read 3, iclass 18, count 2 2006.229.06:00:29.48#ibcon#read 3, iclass 18, count 2 2006.229.06:00:29.48#ibcon#about to read 4, iclass 18, count 2 2006.229.06:00:29.48#ibcon#read 4, iclass 18, count 2 2006.229.06:00:29.48#ibcon#about to read 5, iclass 18, count 2 2006.229.06:00:29.48#ibcon#read 5, iclass 18, count 2 2006.229.06:00:29.48#ibcon#about to read 6, iclass 18, count 2 2006.229.06:00:29.48#ibcon#read 6, iclass 18, count 2 2006.229.06:00:29.48#ibcon#end of sib2, iclass 18, count 2 2006.229.06:00:29.48#ibcon#*after write, iclass 18, count 2 2006.229.06:00:29.48#ibcon#*before return 0, iclass 18, count 2 2006.229.06:00:29.48#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:29.48#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:29.48#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.06:00:29.48#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:29.48#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:29.60#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:29.60#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:29.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:00:29.60#ibcon#first serial, iclass 18, count 0 2006.229.06:00:29.60#ibcon#enter sib2, iclass 18, count 0 2006.229.06:00:29.60#ibcon#flushed, iclass 18, count 0 2006.229.06:00:29.60#ibcon#about to write, iclass 18, count 0 2006.229.06:00:29.60#ibcon#wrote, iclass 18, count 0 2006.229.06:00:29.60#ibcon#about to read 3, iclass 18, count 0 2006.229.06:00:29.62#ibcon#read 3, iclass 18, count 0 2006.229.06:00:29.62#ibcon#about to read 4, iclass 18, count 0 2006.229.06:00:29.62#ibcon#read 4, iclass 18, count 0 2006.229.06:00:29.62#ibcon#about to read 5, iclass 18, count 0 2006.229.06:00:29.62#ibcon#read 5, iclass 18, count 0 2006.229.06:00:29.62#ibcon#about to read 6, iclass 18, count 0 2006.229.06:00:29.62#ibcon#read 6, iclass 18, count 0 2006.229.06:00:29.62#ibcon#end of sib2, iclass 18, count 0 2006.229.06:00:29.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:00:29.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:00:29.62#ibcon#[25=USB\r\n] 2006.229.06:00:29.62#ibcon#*before write, iclass 18, count 0 2006.229.06:00:29.62#ibcon#enter sib2, iclass 18, count 0 2006.229.06:00:29.62#ibcon#flushed, iclass 18, count 0 2006.229.06:00:29.62#ibcon#about to write, iclass 18, count 0 2006.229.06:00:29.62#ibcon#wrote, iclass 18, count 0 2006.229.06:00:29.62#ibcon#about to read 3, iclass 18, count 0 2006.229.06:00:29.65#ibcon#read 3, iclass 18, count 0 2006.229.06:00:29.65#ibcon#about to read 4, iclass 18, count 0 2006.229.06:00:29.65#ibcon#read 4, iclass 18, count 0 2006.229.06:00:29.65#ibcon#about to read 5, iclass 18, count 0 2006.229.06:00:29.65#ibcon#read 5, iclass 18, count 0 2006.229.06:00:29.65#ibcon#about to read 6, iclass 18, count 0 2006.229.06:00:29.65#ibcon#read 6, iclass 18, count 0 2006.229.06:00:29.65#ibcon#end of sib2, iclass 18, count 0 2006.229.06:00:29.65#ibcon#*after write, iclass 18, count 0 2006.229.06:00:29.65#ibcon#*before return 0, iclass 18, count 0 2006.229.06:00:29.65#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:29.65#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:29.65#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:00:29.65#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:00:29.65$vck44/valo=2,534.99 2006.229.06:00:29.65#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.06:00:29.65#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.06:00:29.65#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:29.65#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:29.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:29.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:29.65#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:00:29.65#ibcon#first serial, iclass 20, count 0 2006.229.06:00:29.65#ibcon#enter sib2, iclass 20, count 0 2006.229.06:00:29.65#ibcon#flushed, iclass 20, count 0 2006.229.06:00:29.65#ibcon#about to write, iclass 20, count 0 2006.229.06:00:29.65#ibcon#wrote, iclass 20, count 0 2006.229.06:00:29.65#ibcon#about to read 3, iclass 20, count 0 2006.229.06:00:29.67#ibcon#read 3, iclass 20, count 0 2006.229.06:00:29.67#ibcon#about to read 4, iclass 20, count 0 2006.229.06:00:29.67#ibcon#read 4, iclass 20, count 0 2006.229.06:00:29.67#ibcon#about to read 5, iclass 20, count 0 2006.229.06:00:29.67#ibcon#read 5, iclass 20, count 0 2006.229.06:00:29.67#ibcon#about to read 6, iclass 20, count 0 2006.229.06:00:29.67#ibcon#read 6, iclass 20, count 0 2006.229.06:00:29.67#ibcon#end of sib2, iclass 20, count 0 2006.229.06:00:29.67#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:00:29.67#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:00:29.67#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:00:29.67#ibcon#*before write, iclass 20, count 0 2006.229.06:00:29.67#ibcon#enter sib2, iclass 20, count 0 2006.229.06:00:29.67#ibcon#flushed, iclass 20, count 0 2006.229.06:00:29.67#ibcon#about to write, iclass 20, count 0 2006.229.06:00:29.67#ibcon#wrote, iclass 20, count 0 2006.229.06:00:29.67#ibcon#about to read 3, iclass 20, count 0 2006.229.06:00:29.71#ibcon#read 3, iclass 20, count 0 2006.229.06:00:29.71#ibcon#about to read 4, iclass 20, count 0 2006.229.06:00:29.71#ibcon#read 4, iclass 20, count 0 2006.229.06:00:29.71#ibcon#about to read 5, iclass 20, count 0 2006.229.06:00:29.71#ibcon#read 5, iclass 20, count 0 2006.229.06:00:29.71#ibcon#about to read 6, iclass 20, count 0 2006.229.06:00:29.71#ibcon#read 6, iclass 20, count 0 2006.229.06:00:29.71#ibcon#end of sib2, iclass 20, count 0 2006.229.06:00:29.71#ibcon#*after write, iclass 20, count 0 2006.229.06:00:29.71#ibcon#*before return 0, iclass 20, count 0 2006.229.06:00:29.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:29.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:29.71#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:00:29.71#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:00:29.71$vck44/va=2,7 2006.229.06:00:29.71#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.06:00:29.71#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.06:00:29.71#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:29.71#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:29.77#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:29.77#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:29.77#ibcon#enter wrdev, iclass 22, count 2 2006.229.06:00:29.77#ibcon#first serial, iclass 22, count 2 2006.229.06:00:29.77#ibcon#enter sib2, iclass 22, count 2 2006.229.06:00:29.77#ibcon#flushed, iclass 22, count 2 2006.229.06:00:29.77#ibcon#about to write, iclass 22, count 2 2006.229.06:00:29.77#ibcon#wrote, iclass 22, count 2 2006.229.06:00:29.77#ibcon#about to read 3, iclass 22, count 2 2006.229.06:00:29.79#ibcon#read 3, iclass 22, count 2 2006.229.06:00:29.79#ibcon#about to read 4, iclass 22, count 2 2006.229.06:00:29.79#ibcon#read 4, iclass 22, count 2 2006.229.06:00:29.79#ibcon#about to read 5, iclass 22, count 2 2006.229.06:00:29.79#ibcon#read 5, iclass 22, count 2 2006.229.06:00:29.79#ibcon#about to read 6, iclass 22, count 2 2006.229.06:00:29.79#ibcon#read 6, iclass 22, count 2 2006.229.06:00:29.79#ibcon#end of sib2, iclass 22, count 2 2006.229.06:00:29.79#ibcon#*mode == 0, iclass 22, count 2 2006.229.06:00:29.79#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.06:00:29.79#ibcon#[25=AT02-07\r\n] 2006.229.06:00:29.79#ibcon#*before write, iclass 22, count 2 2006.229.06:00:29.79#ibcon#enter sib2, iclass 22, count 2 2006.229.06:00:29.79#ibcon#flushed, iclass 22, count 2 2006.229.06:00:29.79#ibcon#about to write, iclass 22, count 2 2006.229.06:00:29.79#ibcon#wrote, iclass 22, count 2 2006.229.06:00:29.79#ibcon#about to read 3, iclass 22, count 2 2006.229.06:00:29.82#ibcon#read 3, iclass 22, count 2 2006.229.06:00:29.82#ibcon#about to read 4, iclass 22, count 2 2006.229.06:00:29.82#ibcon#read 4, iclass 22, count 2 2006.229.06:00:29.82#ibcon#about to read 5, iclass 22, count 2 2006.229.06:00:29.82#ibcon#read 5, iclass 22, count 2 2006.229.06:00:29.82#ibcon#about to read 6, iclass 22, count 2 2006.229.06:00:29.82#ibcon#read 6, iclass 22, count 2 2006.229.06:00:29.82#ibcon#end of sib2, iclass 22, count 2 2006.229.06:00:29.82#ibcon#*after write, iclass 22, count 2 2006.229.06:00:29.82#ibcon#*before return 0, iclass 22, count 2 2006.229.06:00:29.82#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:29.82#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:29.82#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.06:00:29.82#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:29.82#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:29.94#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:29.94#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:29.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:00:29.94#ibcon#first serial, iclass 22, count 0 2006.229.06:00:29.94#ibcon#enter sib2, iclass 22, count 0 2006.229.06:00:29.94#ibcon#flushed, iclass 22, count 0 2006.229.06:00:29.94#ibcon#about to write, iclass 22, count 0 2006.229.06:00:29.94#ibcon#wrote, iclass 22, count 0 2006.229.06:00:29.94#ibcon#about to read 3, iclass 22, count 0 2006.229.06:00:29.96#ibcon#read 3, iclass 22, count 0 2006.229.06:00:29.96#ibcon#about to read 4, iclass 22, count 0 2006.229.06:00:29.96#ibcon#read 4, iclass 22, count 0 2006.229.06:00:29.96#ibcon#about to read 5, iclass 22, count 0 2006.229.06:00:29.96#ibcon#read 5, iclass 22, count 0 2006.229.06:00:29.96#ibcon#about to read 6, iclass 22, count 0 2006.229.06:00:29.96#ibcon#read 6, iclass 22, count 0 2006.229.06:00:29.96#ibcon#end of sib2, iclass 22, count 0 2006.229.06:00:29.96#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:00:29.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:00:29.96#ibcon#[25=USB\r\n] 2006.229.06:00:29.96#ibcon#*before write, iclass 22, count 0 2006.229.06:00:29.96#ibcon#enter sib2, iclass 22, count 0 2006.229.06:00:29.96#ibcon#flushed, iclass 22, count 0 2006.229.06:00:29.96#ibcon#about to write, iclass 22, count 0 2006.229.06:00:29.96#ibcon#wrote, iclass 22, count 0 2006.229.06:00:29.96#ibcon#about to read 3, iclass 22, count 0 2006.229.06:00:29.99#ibcon#read 3, iclass 22, count 0 2006.229.06:00:29.99#ibcon#about to read 4, iclass 22, count 0 2006.229.06:00:29.99#ibcon#read 4, iclass 22, count 0 2006.229.06:00:29.99#ibcon#about to read 5, iclass 22, count 0 2006.229.06:00:29.99#ibcon#read 5, iclass 22, count 0 2006.229.06:00:29.99#ibcon#about to read 6, iclass 22, count 0 2006.229.06:00:29.99#ibcon#read 6, iclass 22, count 0 2006.229.06:00:29.99#ibcon#end of sib2, iclass 22, count 0 2006.229.06:00:29.99#ibcon#*after write, iclass 22, count 0 2006.229.06:00:29.99#ibcon#*before return 0, iclass 22, count 0 2006.229.06:00:29.99#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:29.99#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:29.99#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:00:29.99#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:00:29.99$vck44/valo=3,564.99 2006.229.06:00:29.99#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.06:00:29.99#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.06:00:29.99#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:29.99#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:29.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:29.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:29.99#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:00:29.99#ibcon#first serial, iclass 24, count 0 2006.229.06:00:29.99#ibcon#enter sib2, iclass 24, count 0 2006.229.06:00:29.99#ibcon#flushed, iclass 24, count 0 2006.229.06:00:29.99#ibcon#about to write, iclass 24, count 0 2006.229.06:00:29.99#ibcon#wrote, iclass 24, count 0 2006.229.06:00:29.99#ibcon#about to read 3, iclass 24, count 0 2006.229.06:00:30.01#ibcon#read 3, iclass 24, count 0 2006.229.06:00:30.01#ibcon#about to read 4, iclass 24, count 0 2006.229.06:00:30.01#ibcon#read 4, iclass 24, count 0 2006.229.06:00:30.01#ibcon#about to read 5, iclass 24, count 0 2006.229.06:00:30.01#ibcon#read 5, iclass 24, count 0 2006.229.06:00:30.01#ibcon#about to read 6, iclass 24, count 0 2006.229.06:00:30.01#ibcon#read 6, iclass 24, count 0 2006.229.06:00:30.01#ibcon#end of sib2, iclass 24, count 0 2006.229.06:00:30.01#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:00:30.01#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:00:30.01#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:00:30.01#ibcon#*before write, iclass 24, count 0 2006.229.06:00:30.01#ibcon#enter sib2, iclass 24, count 0 2006.229.06:00:30.01#ibcon#flushed, iclass 24, count 0 2006.229.06:00:30.01#ibcon#about to write, iclass 24, count 0 2006.229.06:00:30.01#ibcon#wrote, iclass 24, count 0 2006.229.06:00:30.01#ibcon#about to read 3, iclass 24, count 0 2006.229.06:00:30.05#ibcon#read 3, iclass 24, count 0 2006.229.06:00:30.05#ibcon#about to read 4, iclass 24, count 0 2006.229.06:00:30.05#ibcon#read 4, iclass 24, count 0 2006.229.06:00:30.05#ibcon#about to read 5, iclass 24, count 0 2006.229.06:00:30.05#ibcon#read 5, iclass 24, count 0 2006.229.06:00:30.05#ibcon#about to read 6, iclass 24, count 0 2006.229.06:00:30.05#ibcon#read 6, iclass 24, count 0 2006.229.06:00:30.05#ibcon#end of sib2, iclass 24, count 0 2006.229.06:00:30.05#ibcon#*after write, iclass 24, count 0 2006.229.06:00:30.05#ibcon#*before return 0, iclass 24, count 0 2006.229.06:00:30.05#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:30.05#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:30.05#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:00:30.05#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:00:30.05$vck44/va=3,6 2006.229.06:00:30.05#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.06:00:30.05#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.06:00:30.05#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:30.05#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:30.11#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:30.11#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:30.11#ibcon#enter wrdev, iclass 26, count 2 2006.229.06:00:30.11#ibcon#first serial, iclass 26, count 2 2006.229.06:00:30.11#ibcon#enter sib2, iclass 26, count 2 2006.229.06:00:30.11#ibcon#flushed, iclass 26, count 2 2006.229.06:00:30.11#ibcon#about to write, iclass 26, count 2 2006.229.06:00:30.11#ibcon#wrote, iclass 26, count 2 2006.229.06:00:30.11#ibcon#about to read 3, iclass 26, count 2 2006.229.06:00:30.13#ibcon#read 3, iclass 26, count 2 2006.229.06:00:30.13#ibcon#about to read 4, iclass 26, count 2 2006.229.06:00:30.13#ibcon#read 4, iclass 26, count 2 2006.229.06:00:30.13#ibcon#about to read 5, iclass 26, count 2 2006.229.06:00:30.13#ibcon#read 5, iclass 26, count 2 2006.229.06:00:30.13#ibcon#about to read 6, iclass 26, count 2 2006.229.06:00:30.13#ibcon#read 6, iclass 26, count 2 2006.229.06:00:30.13#ibcon#end of sib2, iclass 26, count 2 2006.229.06:00:30.13#ibcon#*mode == 0, iclass 26, count 2 2006.229.06:00:30.13#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.06:00:30.13#ibcon#[25=AT03-06\r\n] 2006.229.06:00:30.13#ibcon#*before write, iclass 26, count 2 2006.229.06:00:30.13#ibcon#enter sib2, iclass 26, count 2 2006.229.06:00:30.13#ibcon#flushed, iclass 26, count 2 2006.229.06:00:30.13#ibcon#about to write, iclass 26, count 2 2006.229.06:00:30.13#ibcon#wrote, iclass 26, count 2 2006.229.06:00:30.13#ibcon#about to read 3, iclass 26, count 2 2006.229.06:00:30.16#ibcon#read 3, iclass 26, count 2 2006.229.06:00:30.16#ibcon#about to read 4, iclass 26, count 2 2006.229.06:00:30.16#ibcon#read 4, iclass 26, count 2 2006.229.06:00:30.16#ibcon#about to read 5, iclass 26, count 2 2006.229.06:00:30.16#ibcon#read 5, iclass 26, count 2 2006.229.06:00:30.16#ibcon#about to read 6, iclass 26, count 2 2006.229.06:00:30.16#ibcon#read 6, iclass 26, count 2 2006.229.06:00:30.16#ibcon#end of sib2, iclass 26, count 2 2006.229.06:00:30.16#ibcon#*after write, iclass 26, count 2 2006.229.06:00:30.16#ibcon#*before return 0, iclass 26, count 2 2006.229.06:00:30.16#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:30.16#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:30.16#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.06:00:30.16#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:30.16#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:30.28#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:30.28#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:30.28#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:00:30.28#ibcon#first serial, iclass 26, count 0 2006.229.06:00:30.28#ibcon#enter sib2, iclass 26, count 0 2006.229.06:00:30.28#ibcon#flushed, iclass 26, count 0 2006.229.06:00:30.28#ibcon#about to write, iclass 26, count 0 2006.229.06:00:30.28#ibcon#wrote, iclass 26, count 0 2006.229.06:00:30.28#ibcon#about to read 3, iclass 26, count 0 2006.229.06:00:30.30#ibcon#read 3, iclass 26, count 0 2006.229.06:00:30.30#ibcon#about to read 4, iclass 26, count 0 2006.229.06:00:30.30#ibcon#read 4, iclass 26, count 0 2006.229.06:00:30.30#ibcon#about to read 5, iclass 26, count 0 2006.229.06:00:30.30#ibcon#read 5, iclass 26, count 0 2006.229.06:00:30.30#ibcon#about to read 6, iclass 26, count 0 2006.229.06:00:30.30#ibcon#read 6, iclass 26, count 0 2006.229.06:00:30.30#ibcon#end of sib2, iclass 26, count 0 2006.229.06:00:30.30#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:00:30.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:00:30.30#ibcon#[25=USB\r\n] 2006.229.06:00:30.30#ibcon#*before write, iclass 26, count 0 2006.229.06:00:30.30#ibcon#enter sib2, iclass 26, count 0 2006.229.06:00:30.30#ibcon#flushed, iclass 26, count 0 2006.229.06:00:30.30#ibcon#about to write, iclass 26, count 0 2006.229.06:00:30.30#ibcon#wrote, iclass 26, count 0 2006.229.06:00:30.30#ibcon#about to read 3, iclass 26, count 0 2006.229.06:00:30.33#ibcon#read 3, iclass 26, count 0 2006.229.06:00:30.33#ibcon#about to read 4, iclass 26, count 0 2006.229.06:00:30.33#ibcon#read 4, iclass 26, count 0 2006.229.06:00:30.33#ibcon#about to read 5, iclass 26, count 0 2006.229.06:00:30.33#ibcon#read 5, iclass 26, count 0 2006.229.06:00:30.33#ibcon#about to read 6, iclass 26, count 0 2006.229.06:00:30.33#ibcon#read 6, iclass 26, count 0 2006.229.06:00:30.33#ibcon#end of sib2, iclass 26, count 0 2006.229.06:00:30.33#ibcon#*after write, iclass 26, count 0 2006.229.06:00:30.33#ibcon#*before return 0, iclass 26, count 0 2006.229.06:00:30.33#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:30.33#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:30.33#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:00:30.33#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:00:30.33$vck44/valo=4,624.99 2006.229.06:00:30.33#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.06:00:30.33#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.06:00:30.33#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:30.33#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:30.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:30.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:30.33#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:00:30.33#ibcon#first serial, iclass 28, count 0 2006.229.06:00:30.33#ibcon#enter sib2, iclass 28, count 0 2006.229.06:00:30.33#ibcon#flushed, iclass 28, count 0 2006.229.06:00:30.33#ibcon#about to write, iclass 28, count 0 2006.229.06:00:30.33#ibcon#wrote, iclass 28, count 0 2006.229.06:00:30.33#ibcon#about to read 3, iclass 28, count 0 2006.229.06:00:30.35#ibcon#read 3, iclass 28, count 0 2006.229.06:00:30.35#ibcon#about to read 4, iclass 28, count 0 2006.229.06:00:30.35#ibcon#read 4, iclass 28, count 0 2006.229.06:00:30.35#ibcon#about to read 5, iclass 28, count 0 2006.229.06:00:30.35#ibcon#read 5, iclass 28, count 0 2006.229.06:00:30.35#ibcon#about to read 6, iclass 28, count 0 2006.229.06:00:30.35#ibcon#read 6, iclass 28, count 0 2006.229.06:00:30.35#ibcon#end of sib2, iclass 28, count 0 2006.229.06:00:30.35#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:00:30.35#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:00:30.35#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:00:30.35#ibcon#*before write, iclass 28, count 0 2006.229.06:00:30.35#ibcon#enter sib2, iclass 28, count 0 2006.229.06:00:30.35#ibcon#flushed, iclass 28, count 0 2006.229.06:00:30.35#ibcon#about to write, iclass 28, count 0 2006.229.06:00:30.35#ibcon#wrote, iclass 28, count 0 2006.229.06:00:30.35#ibcon#about to read 3, iclass 28, count 0 2006.229.06:00:30.39#ibcon#read 3, iclass 28, count 0 2006.229.06:00:30.39#ibcon#about to read 4, iclass 28, count 0 2006.229.06:00:30.39#ibcon#read 4, iclass 28, count 0 2006.229.06:00:30.39#ibcon#about to read 5, iclass 28, count 0 2006.229.06:00:30.39#ibcon#read 5, iclass 28, count 0 2006.229.06:00:30.39#ibcon#about to read 6, iclass 28, count 0 2006.229.06:00:30.39#ibcon#read 6, iclass 28, count 0 2006.229.06:00:30.39#ibcon#end of sib2, iclass 28, count 0 2006.229.06:00:30.39#ibcon#*after write, iclass 28, count 0 2006.229.06:00:30.39#ibcon#*before return 0, iclass 28, count 0 2006.229.06:00:30.39#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:30.39#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:30.39#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:00:30.39#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:00:30.39$vck44/va=4,7 2006.229.06:00:30.39#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.06:00:30.39#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.06:00:30.39#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:30.39#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:30.45#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:30.45#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:30.45#ibcon#enter wrdev, iclass 30, count 2 2006.229.06:00:30.45#ibcon#first serial, iclass 30, count 2 2006.229.06:00:30.45#ibcon#enter sib2, iclass 30, count 2 2006.229.06:00:30.45#ibcon#flushed, iclass 30, count 2 2006.229.06:00:30.45#ibcon#about to write, iclass 30, count 2 2006.229.06:00:30.45#ibcon#wrote, iclass 30, count 2 2006.229.06:00:30.45#ibcon#about to read 3, iclass 30, count 2 2006.229.06:00:30.47#ibcon#read 3, iclass 30, count 2 2006.229.06:00:30.47#ibcon#about to read 4, iclass 30, count 2 2006.229.06:00:30.47#ibcon#read 4, iclass 30, count 2 2006.229.06:00:30.47#ibcon#about to read 5, iclass 30, count 2 2006.229.06:00:30.47#ibcon#read 5, iclass 30, count 2 2006.229.06:00:30.47#ibcon#about to read 6, iclass 30, count 2 2006.229.06:00:30.47#ibcon#read 6, iclass 30, count 2 2006.229.06:00:30.47#ibcon#end of sib2, iclass 30, count 2 2006.229.06:00:30.47#ibcon#*mode == 0, iclass 30, count 2 2006.229.06:00:30.47#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.06:00:30.47#ibcon#[25=AT04-07\r\n] 2006.229.06:00:30.47#ibcon#*before write, iclass 30, count 2 2006.229.06:00:30.47#ibcon#enter sib2, iclass 30, count 2 2006.229.06:00:30.47#ibcon#flushed, iclass 30, count 2 2006.229.06:00:30.47#ibcon#about to write, iclass 30, count 2 2006.229.06:00:30.47#ibcon#wrote, iclass 30, count 2 2006.229.06:00:30.47#ibcon#about to read 3, iclass 30, count 2 2006.229.06:00:30.50#ibcon#read 3, iclass 30, count 2 2006.229.06:00:30.50#ibcon#about to read 4, iclass 30, count 2 2006.229.06:00:30.50#ibcon#read 4, iclass 30, count 2 2006.229.06:00:30.50#ibcon#about to read 5, iclass 30, count 2 2006.229.06:00:30.50#ibcon#read 5, iclass 30, count 2 2006.229.06:00:30.50#ibcon#about to read 6, iclass 30, count 2 2006.229.06:00:30.50#ibcon#read 6, iclass 30, count 2 2006.229.06:00:30.50#ibcon#end of sib2, iclass 30, count 2 2006.229.06:00:30.50#ibcon#*after write, iclass 30, count 2 2006.229.06:00:30.50#ibcon#*before return 0, iclass 30, count 2 2006.229.06:00:30.50#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:30.50#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:30.50#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.06:00:30.50#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:30.50#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:30.62#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:30.62#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:30.62#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:00:30.62#ibcon#first serial, iclass 30, count 0 2006.229.06:00:30.62#ibcon#enter sib2, iclass 30, count 0 2006.229.06:00:30.62#ibcon#flushed, iclass 30, count 0 2006.229.06:00:30.62#ibcon#about to write, iclass 30, count 0 2006.229.06:00:30.62#ibcon#wrote, iclass 30, count 0 2006.229.06:00:30.62#ibcon#about to read 3, iclass 30, count 0 2006.229.06:00:30.64#ibcon#read 3, iclass 30, count 0 2006.229.06:00:30.64#ibcon#about to read 4, iclass 30, count 0 2006.229.06:00:30.64#ibcon#read 4, iclass 30, count 0 2006.229.06:00:30.64#ibcon#about to read 5, iclass 30, count 0 2006.229.06:00:30.64#ibcon#read 5, iclass 30, count 0 2006.229.06:00:30.64#ibcon#about to read 6, iclass 30, count 0 2006.229.06:00:30.64#ibcon#read 6, iclass 30, count 0 2006.229.06:00:30.64#ibcon#end of sib2, iclass 30, count 0 2006.229.06:00:30.64#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:00:30.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:00:30.64#ibcon#[25=USB\r\n] 2006.229.06:00:30.64#ibcon#*before write, iclass 30, count 0 2006.229.06:00:30.64#ibcon#enter sib2, iclass 30, count 0 2006.229.06:00:30.64#ibcon#flushed, iclass 30, count 0 2006.229.06:00:30.64#ibcon#about to write, iclass 30, count 0 2006.229.06:00:30.64#ibcon#wrote, iclass 30, count 0 2006.229.06:00:30.64#ibcon#about to read 3, iclass 30, count 0 2006.229.06:00:30.67#ibcon#read 3, iclass 30, count 0 2006.229.06:00:30.67#ibcon#about to read 4, iclass 30, count 0 2006.229.06:00:30.67#ibcon#read 4, iclass 30, count 0 2006.229.06:00:30.67#ibcon#about to read 5, iclass 30, count 0 2006.229.06:00:30.67#ibcon#read 5, iclass 30, count 0 2006.229.06:00:30.67#ibcon#about to read 6, iclass 30, count 0 2006.229.06:00:30.67#ibcon#read 6, iclass 30, count 0 2006.229.06:00:30.67#ibcon#end of sib2, iclass 30, count 0 2006.229.06:00:30.67#ibcon#*after write, iclass 30, count 0 2006.229.06:00:30.67#ibcon#*before return 0, iclass 30, count 0 2006.229.06:00:30.67#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:30.67#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:30.67#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:00:30.67#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:00:30.67$vck44/valo=5,734.99 2006.229.06:00:30.67#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.06:00:30.67#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.06:00:30.67#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:30.67#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:30.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:30.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:30.67#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:00:30.67#ibcon#first serial, iclass 32, count 0 2006.229.06:00:30.67#ibcon#enter sib2, iclass 32, count 0 2006.229.06:00:30.67#ibcon#flushed, iclass 32, count 0 2006.229.06:00:30.67#ibcon#about to write, iclass 32, count 0 2006.229.06:00:30.67#ibcon#wrote, iclass 32, count 0 2006.229.06:00:30.67#ibcon#about to read 3, iclass 32, count 0 2006.229.06:00:30.69#ibcon#read 3, iclass 32, count 0 2006.229.06:00:30.69#ibcon#about to read 4, iclass 32, count 0 2006.229.06:00:30.69#ibcon#read 4, iclass 32, count 0 2006.229.06:00:30.69#ibcon#about to read 5, iclass 32, count 0 2006.229.06:00:30.69#ibcon#read 5, iclass 32, count 0 2006.229.06:00:30.69#ibcon#about to read 6, iclass 32, count 0 2006.229.06:00:30.69#ibcon#read 6, iclass 32, count 0 2006.229.06:00:30.69#ibcon#end of sib2, iclass 32, count 0 2006.229.06:00:30.69#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:00:30.69#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:00:30.69#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:00:30.69#ibcon#*before write, iclass 32, count 0 2006.229.06:00:30.69#ibcon#enter sib2, iclass 32, count 0 2006.229.06:00:30.69#ibcon#flushed, iclass 32, count 0 2006.229.06:00:30.69#ibcon#about to write, iclass 32, count 0 2006.229.06:00:30.69#ibcon#wrote, iclass 32, count 0 2006.229.06:00:30.69#ibcon#about to read 3, iclass 32, count 0 2006.229.06:00:30.73#ibcon#read 3, iclass 32, count 0 2006.229.06:00:30.73#ibcon#about to read 4, iclass 32, count 0 2006.229.06:00:30.73#ibcon#read 4, iclass 32, count 0 2006.229.06:00:30.73#ibcon#about to read 5, iclass 32, count 0 2006.229.06:00:30.73#ibcon#read 5, iclass 32, count 0 2006.229.06:00:30.73#ibcon#about to read 6, iclass 32, count 0 2006.229.06:00:30.73#ibcon#read 6, iclass 32, count 0 2006.229.06:00:30.73#ibcon#end of sib2, iclass 32, count 0 2006.229.06:00:30.73#ibcon#*after write, iclass 32, count 0 2006.229.06:00:30.73#ibcon#*before return 0, iclass 32, count 0 2006.229.06:00:30.73#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:30.73#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:30.73#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:00:30.73#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:00:30.73$vck44/va=5,4 2006.229.06:00:30.73#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:00:30.73#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:00:30.73#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:30.73#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:30.79#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:30.79#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:30.79#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:00:30.79#ibcon#first serial, iclass 34, count 2 2006.229.06:00:30.79#ibcon#enter sib2, iclass 34, count 2 2006.229.06:00:30.79#ibcon#flushed, iclass 34, count 2 2006.229.06:00:30.79#ibcon#about to write, iclass 34, count 2 2006.229.06:00:30.79#ibcon#wrote, iclass 34, count 2 2006.229.06:00:30.79#ibcon#about to read 3, iclass 34, count 2 2006.229.06:00:30.81#ibcon#read 3, iclass 34, count 2 2006.229.06:00:30.81#ibcon#about to read 4, iclass 34, count 2 2006.229.06:00:30.81#ibcon#read 4, iclass 34, count 2 2006.229.06:00:30.81#ibcon#about to read 5, iclass 34, count 2 2006.229.06:00:30.81#ibcon#read 5, iclass 34, count 2 2006.229.06:00:30.81#ibcon#about to read 6, iclass 34, count 2 2006.229.06:00:30.81#ibcon#read 6, iclass 34, count 2 2006.229.06:00:30.81#ibcon#end of sib2, iclass 34, count 2 2006.229.06:00:30.81#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:00:30.81#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:00:30.81#ibcon#[25=AT05-04\r\n] 2006.229.06:00:30.81#ibcon#*before write, iclass 34, count 2 2006.229.06:00:30.81#ibcon#enter sib2, iclass 34, count 2 2006.229.06:00:30.81#ibcon#flushed, iclass 34, count 2 2006.229.06:00:30.81#ibcon#about to write, iclass 34, count 2 2006.229.06:00:30.81#ibcon#wrote, iclass 34, count 2 2006.229.06:00:30.81#ibcon#about to read 3, iclass 34, count 2 2006.229.06:00:30.84#ibcon#read 3, iclass 34, count 2 2006.229.06:00:30.84#ibcon#about to read 4, iclass 34, count 2 2006.229.06:00:30.84#ibcon#read 4, iclass 34, count 2 2006.229.06:00:30.84#ibcon#about to read 5, iclass 34, count 2 2006.229.06:00:30.84#ibcon#read 5, iclass 34, count 2 2006.229.06:00:30.84#ibcon#about to read 6, iclass 34, count 2 2006.229.06:00:30.84#ibcon#read 6, iclass 34, count 2 2006.229.06:00:30.84#ibcon#end of sib2, iclass 34, count 2 2006.229.06:00:30.84#ibcon#*after write, iclass 34, count 2 2006.229.06:00:30.84#ibcon#*before return 0, iclass 34, count 2 2006.229.06:00:30.84#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:30.84#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:30.84#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:00:30.84#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:30.84#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:30.96#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:30.96#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:30.96#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:00:30.96#ibcon#first serial, iclass 34, count 0 2006.229.06:00:30.96#ibcon#enter sib2, iclass 34, count 0 2006.229.06:00:30.96#ibcon#flushed, iclass 34, count 0 2006.229.06:00:30.96#ibcon#about to write, iclass 34, count 0 2006.229.06:00:30.96#ibcon#wrote, iclass 34, count 0 2006.229.06:00:30.96#ibcon#about to read 3, iclass 34, count 0 2006.229.06:00:30.98#ibcon#read 3, iclass 34, count 0 2006.229.06:00:30.98#ibcon#about to read 4, iclass 34, count 0 2006.229.06:00:30.98#ibcon#read 4, iclass 34, count 0 2006.229.06:00:30.98#ibcon#about to read 5, iclass 34, count 0 2006.229.06:00:30.98#ibcon#read 5, iclass 34, count 0 2006.229.06:00:30.98#ibcon#about to read 6, iclass 34, count 0 2006.229.06:00:30.98#ibcon#read 6, iclass 34, count 0 2006.229.06:00:30.98#ibcon#end of sib2, iclass 34, count 0 2006.229.06:00:30.98#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:00:30.98#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:00:30.98#ibcon#[25=USB\r\n] 2006.229.06:00:30.98#ibcon#*before write, iclass 34, count 0 2006.229.06:00:30.98#ibcon#enter sib2, iclass 34, count 0 2006.229.06:00:30.98#ibcon#flushed, iclass 34, count 0 2006.229.06:00:30.98#ibcon#about to write, iclass 34, count 0 2006.229.06:00:30.98#ibcon#wrote, iclass 34, count 0 2006.229.06:00:30.98#ibcon#about to read 3, iclass 34, count 0 2006.229.06:00:31.01#ibcon#read 3, iclass 34, count 0 2006.229.06:00:31.01#ibcon#about to read 4, iclass 34, count 0 2006.229.06:00:31.01#ibcon#read 4, iclass 34, count 0 2006.229.06:00:31.01#ibcon#about to read 5, iclass 34, count 0 2006.229.06:00:31.01#ibcon#read 5, iclass 34, count 0 2006.229.06:00:31.01#ibcon#about to read 6, iclass 34, count 0 2006.229.06:00:31.01#ibcon#read 6, iclass 34, count 0 2006.229.06:00:31.01#ibcon#end of sib2, iclass 34, count 0 2006.229.06:00:31.01#ibcon#*after write, iclass 34, count 0 2006.229.06:00:31.01#ibcon#*before return 0, iclass 34, count 0 2006.229.06:00:31.01#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:31.01#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:31.01#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:00:31.01#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:00:31.01$vck44/valo=6,814.99 2006.229.06:00:31.01#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.06:00:31.01#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.06:00:31.01#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:31.01#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:31.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:31.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:31.01#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:00:31.01#ibcon#first serial, iclass 36, count 0 2006.229.06:00:31.01#ibcon#enter sib2, iclass 36, count 0 2006.229.06:00:31.01#ibcon#flushed, iclass 36, count 0 2006.229.06:00:31.01#ibcon#about to write, iclass 36, count 0 2006.229.06:00:31.01#ibcon#wrote, iclass 36, count 0 2006.229.06:00:31.01#ibcon#about to read 3, iclass 36, count 0 2006.229.06:00:31.03#ibcon#read 3, iclass 36, count 0 2006.229.06:00:31.03#ibcon#about to read 4, iclass 36, count 0 2006.229.06:00:31.03#ibcon#read 4, iclass 36, count 0 2006.229.06:00:31.03#ibcon#about to read 5, iclass 36, count 0 2006.229.06:00:31.03#ibcon#read 5, iclass 36, count 0 2006.229.06:00:31.03#ibcon#about to read 6, iclass 36, count 0 2006.229.06:00:31.03#ibcon#read 6, iclass 36, count 0 2006.229.06:00:31.03#ibcon#end of sib2, iclass 36, count 0 2006.229.06:00:31.03#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:00:31.03#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:00:31.03#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:00:31.03#ibcon#*before write, iclass 36, count 0 2006.229.06:00:31.03#ibcon#enter sib2, iclass 36, count 0 2006.229.06:00:31.03#ibcon#flushed, iclass 36, count 0 2006.229.06:00:31.03#ibcon#about to write, iclass 36, count 0 2006.229.06:00:31.03#ibcon#wrote, iclass 36, count 0 2006.229.06:00:31.03#ibcon#about to read 3, iclass 36, count 0 2006.229.06:00:31.07#ibcon#read 3, iclass 36, count 0 2006.229.06:00:31.07#ibcon#about to read 4, iclass 36, count 0 2006.229.06:00:31.07#ibcon#read 4, iclass 36, count 0 2006.229.06:00:31.07#ibcon#about to read 5, iclass 36, count 0 2006.229.06:00:31.07#ibcon#read 5, iclass 36, count 0 2006.229.06:00:31.07#ibcon#about to read 6, iclass 36, count 0 2006.229.06:00:31.07#ibcon#read 6, iclass 36, count 0 2006.229.06:00:31.07#ibcon#end of sib2, iclass 36, count 0 2006.229.06:00:31.07#ibcon#*after write, iclass 36, count 0 2006.229.06:00:31.07#ibcon#*before return 0, iclass 36, count 0 2006.229.06:00:31.07#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:31.07#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:31.07#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:00:31.07#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:00:31.07$vck44/va=6,4 2006.229.06:00:31.07#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.06:00:31.07#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.06:00:31.07#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:31.07#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:31.13#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:31.13#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:31.13#ibcon#enter wrdev, iclass 38, count 2 2006.229.06:00:31.13#ibcon#first serial, iclass 38, count 2 2006.229.06:00:31.13#ibcon#enter sib2, iclass 38, count 2 2006.229.06:00:31.13#ibcon#flushed, iclass 38, count 2 2006.229.06:00:31.13#ibcon#about to write, iclass 38, count 2 2006.229.06:00:31.13#ibcon#wrote, iclass 38, count 2 2006.229.06:00:31.13#ibcon#about to read 3, iclass 38, count 2 2006.229.06:00:31.15#ibcon#read 3, iclass 38, count 2 2006.229.06:00:31.15#ibcon#about to read 4, iclass 38, count 2 2006.229.06:00:31.15#ibcon#read 4, iclass 38, count 2 2006.229.06:00:31.15#ibcon#about to read 5, iclass 38, count 2 2006.229.06:00:31.15#ibcon#read 5, iclass 38, count 2 2006.229.06:00:31.15#ibcon#about to read 6, iclass 38, count 2 2006.229.06:00:31.15#ibcon#read 6, iclass 38, count 2 2006.229.06:00:31.15#ibcon#end of sib2, iclass 38, count 2 2006.229.06:00:31.15#ibcon#*mode == 0, iclass 38, count 2 2006.229.06:00:31.15#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.06:00:31.15#ibcon#[25=AT06-04\r\n] 2006.229.06:00:31.15#ibcon#*before write, iclass 38, count 2 2006.229.06:00:31.15#ibcon#enter sib2, iclass 38, count 2 2006.229.06:00:31.15#ibcon#flushed, iclass 38, count 2 2006.229.06:00:31.15#ibcon#about to write, iclass 38, count 2 2006.229.06:00:31.15#ibcon#wrote, iclass 38, count 2 2006.229.06:00:31.15#ibcon#about to read 3, iclass 38, count 2 2006.229.06:00:31.18#ibcon#read 3, iclass 38, count 2 2006.229.06:00:31.18#ibcon#about to read 4, iclass 38, count 2 2006.229.06:00:31.18#ibcon#read 4, iclass 38, count 2 2006.229.06:00:31.18#ibcon#about to read 5, iclass 38, count 2 2006.229.06:00:31.18#ibcon#read 5, iclass 38, count 2 2006.229.06:00:31.18#ibcon#about to read 6, iclass 38, count 2 2006.229.06:00:31.18#ibcon#read 6, iclass 38, count 2 2006.229.06:00:31.18#ibcon#end of sib2, iclass 38, count 2 2006.229.06:00:31.18#ibcon#*after write, iclass 38, count 2 2006.229.06:00:31.18#ibcon#*before return 0, iclass 38, count 2 2006.229.06:00:31.18#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:31.18#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:31.18#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.06:00:31.18#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:31.18#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:31.30#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:31.30#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:31.30#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:00:31.30#ibcon#first serial, iclass 38, count 0 2006.229.06:00:31.30#ibcon#enter sib2, iclass 38, count 0 2006.229.06:00:31.30#ibcon#flushed, iclass 38, count 0 2006.229.06:00:31.30#ibcon#about to write, iclass 38, count 0 2006.229.06:00:31.30#ibcon#wrote, iclass 38, count 0 2006.229.06:00:31.30#ibcon#about to read 3, iclass 38, count 0 2006.229.06:00:31.32#ibcon#read 3, iclass 38, count 0 2006.229.06:00:31.32#ibcon#about to read 4, iclass 38, count 0 2006.229.06:00:31.32#ibcon#read 4, iclass 38, count 0 2006.229.06:00:31.32#ibcon#about to read 5, iclass 38, count 0 2006.229.06:00:31.32#ibcon#read 5, iclass 38, count 0 2006.229.06:00:31.32#ibcon#about to read 6, iclass 38, count 0 2006.229.06:00:31.32#ibcon#read 6, iclass 38, count 0 2006.229.06:00:31.32#ibcon#end of sib2, iclass 38, count 0 2006.229.06:00:31.32#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:00:31.32#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:00:31.32#ibcon#[25=USB\r\n] 2006.229.06:00:31.32#ibcon#*before write, iclass 38, count 0 2006.229.06:00:31.32#ibcon#enter sib2, iclass 38, count 0 2006.229.06:00:31.32#ibcon#flushed, iclass 38, count 0 2006.229.06:00:31.32#ibcon#about to write, iclass 38, count 0 2006.229.06:00:31.32#ibcon#wrote, iclass 38, count 0 2006.229.06:00:31.32#ibcon#about to read 3, iclass 38, count 0 2006.229.06:00:31.35#ibcon#read 3, iclass 38, count 0 2006.229.06:00:31.35#ibcon#about to read 4, iclass 38, count 0 2006.229.06:00:31.35#ibcon#read 4, iclass 38, count 0 2006.229.06:00:31.35#ibcon#about to read 5, iclass 38, count 0 2006.229.06:00:31.35#ibcon#read 5, iclass 38, count 0 2006.229.06:00:31.35#ibcon#about to read 6, iclass 38, count 0 2006.229.06:00:31.35#ibcon#read 6, iclass 38, count 0 2006.229.06:00:31.35#ibcon#end of sib2, iclass 38, count 0 2006.229.06:00:31.35#ibcon#*after write, iclass 38, count 0 2006.229.06:00:31.35#ibcon#*before return 0, iclass 38, count 0 2006.229.06:00:31.35#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:31.35#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:31.35#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:00:31.35#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:00:31.35$vck44/valo=7,864.99 2006.229.06:00:31.35#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.06:00:31.35#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.06:00:31.35#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:31.35#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:31.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:31.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:31.35#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:00:31.35#ibcon#first serial, iclass 40, count 0 2006.229.06:00:31.35#ibcon#enter sib2, iclass 40, count 0 2006.229.06:00:31.35#ibcon#flushed, iclass 40, count 0 2006.229.06:00:31.35#ibcon#about to write, iclass 40, count 0 2006.229.06:00:31.35#ibcon#wrote, iclass 40, count 0 2006.229.06:00:31.35#ibcon#about to read 3, iclass 40, count 0 2006.229.06:00:31.37#ibcon#read 3, iclass 40, count 0 2006.229.06:00:31.37#ibcon#about to read 4, iclass 40, count 0 2006.229.06:00:31.37#ibcon#read 4, iclass 40, count 0 2006.229.06:00:31.37#ibcon#about to read 5, iclass 40, count 0 2006.229.06:00:31.37#ibcon#read 5, iclass 40, count 0 2006.229.06:00:31.37#ibcon#about to read 6, iclass 40, count 0 2006.229.06:00:31.37#ibcon#read 6, iclass 40, count 0 2006.229.06:00:31.37#ibcon#end of sib2, iclass 40, count 0 2006.229.06:00:31.37#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:00:31.37#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:00:31.37#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:00:31.37#ibcon#*before write, iclass 40, count 0 2006.229.06:00:31.37#ibcon#enter sib2, iclass 40, count 0 2006.229.06:00:31.37#ibcon#flushed, iclass 40, count 0 2006.229.06:00:31.37#ibcon#about to write, iclass 40, count 0 2006.229.06:00:31.37#ibcon#wrote, iclass 40, count 0 2006.229.06:00:31.37#ibcon#about to read 3, iclass 40, count 0 2006.229.06:00:31.41#ibcon#read 3, iclass 40, count 0 2006.229.06:00:31.41#ibcon#about to read 4, iclass 40, count 0 2006.229.06:00:31.41#ibcon#read 4, iclass 40, count 0 2006.229.06:00:31.41#ibcon#about to read 5, iclass 40, count 0 2006.229.06:00:31.41#ibcon#read 5, iclass 40, count 0 2006.229.06:00:31.41#ibcon#about to read 6, iclass 40, count 0 2006.229.06:00:31.41#ibcon#read 6, iclass 40, count 0 2006.229.06:00:31.41#ibcon#end of sib2, iclass 40, count 0 2006.229.06:00:31.41#ibcon#*after write, iclass 40, count 0 2006.229.06:00:31.41#ibcon#*before return 0, iclass 40, count 0 2006.229.06:00:31.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:31.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:31.41#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:00:31.41#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:00:31.41$vck44/va=7,5 2006.229.06:00:31.41#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.06:00:31.41#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.06:00:31.41#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:31.41#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:31.47#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:31.47#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:31.47#ibcon#enter wrdev, iclass 4, count 2 2006.229.06:00:31.47#ibcon#first serial, iclass 4, count 2 2006.229.06:00:31.47#ibcon#enter sib2, iclass 4, count 2 2006.229.06:00:31.47#ibcon#flushed, iclass 4, count 2 2006.229.06:00:31.47#ibcon#about to write, iclass 4, count 2 2006.229.06:00:31.47#ibcon#wrote, iclass 4, count 2 2006.229.06:00:31.47#ibcon#about to read 3, iclass 4, count 2 2006.229.06:00:31.49#ibcon#read 3, iclass 4, count 2 2006.229.06:00:31.49#ibcon#about to read 4, iclass 4, count 2 2006.229.06:00:31.49#ibcon#read 4, iclass 4, count 2 2006.229.06:00:31.49#ibcon#about to read 5, iclass 4, count 2 2006.229.06:00:31.49#ibcon#read 5, iclass 4, count 2 2006.229.06:00:31.49#ibcon#about to read 6, iclass 4, count 2 2006.229.06:00:31.49#ibcon#read 6, iclass 4, count 2 2006.229.06:00:31.49#ibcon#end of sib2, iclass 4, count 2 2006.229.06:00:31.49#ibcon#*mode == 0, iclass 4, count 2 2006.229.06:00:31.49#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.06:00:31.49#ibcon#[25=AT07-05\r\n] 2006.229.06:00:31.49#ibcon#*before write, iclass 4, count 2 2006.229.06:00:31.49#ibcon#enter sib2, iclass 4, count 2 2006.229.06:00:31.49#ibcon#flushed, iclass 4, count 2 2006.229.06:00:31.49#ibcon#about to write, iclass 4, count 2 2006.229.06:00:31.49#ibcon#wrote, iclass 4, count 2 2006.229.06:00:31.49#ibcon#about to read 3, iclass 4, count 2 2006.229.06:00:31.52#ibcon#read 3, iclass 4, count 2 2006.229.06:00:31.52#ibcon#about to read 4, iclass 4, count 2 2006.229.06:00:31.52#ibcon#read 4, iclass 4, count 2 2006.229.06:00:31.52#ibcon#about to read 5, iclass 4, count 2 2006.229.06:00:31.52#ibcon#read 5, iclass 4, count 2 2006.229.06:00:31.52#ibcon#about to read 6, iclass 4, count 2 2006.229.06:00:31.52#ibcon#read 6, iclass 4, count 2 2006.229.06:00:31.52#ibcon#end of sib2, iclass 4, count 2 2006.229.06:00:31.52#ibcon#*after write, iclass 4, count 2 2006.229.06:00:31.52#ibcon#*before return 0, iclass 4, count 2 2006.229.06:00:31.52#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:31.52#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:31.52#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.06:00:31.52#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:31.52#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:31.64#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:31.64#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:31.64#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:00:31.64#ibcon#first serial, iclass 4, count 0 2006.229.06:00:31.64#ibcon#enter sib2, iclass 4, count 0 2006.229.06:00:31.64#ibcon#flushed, iclass 4, count 0 2006.229.06:00:31.64#ibcon#about to write, iclass 4, count 0 2006.229.06:00:31.64#ibcon#wrote, iclass 4, count 0 2006.229.06:00:31.64#ibcon#about to read 3, iclass 4, count 0 2006.229.06:00:31.66#ibcon#read 3, iclass 4, count 0 2006.229.06:00:31.66#ibcon#about to read 4, iclass 4, count 0 2006.229.06:00:31.66#ibcon#read 4, iclass 4, count 0 2006.229.06:00:31.66#ibcon#about to read 5, iclass 4, count 0 2006.229.06:00:31.66#ibcon#read 5, iclass 4, count 0 2006.229.06:00:31.66#ibcon#about to read 6, iclass 4, count 0 2006.229.06:00:31.66#ibcon#read 6, iclass 4, count 0 2006.229.06:00:31.66#ibcon#end of sib2, iclass 4, count 0 2006.229.06:00:31.66#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:00:31.66#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:00:31.66#ibcon#[25=USB\r\n] 2006.229.06:00:31.66#ibcon#*before write, iclass 4, count 0 2006.229.06:00:31.66#ibcon#enter sib2, iclass 4, count 0 2006.229.06:00:31.66#ibcon#flushed, iclass 4, count 0 2006.229.06:00:31.66#ibcon#about to write, iclass 4, count 0 2006.229.06:00:31.66#ibcon#wrote, iclass 4, count 0 2006.229.06:00:31.66#ibcon#about to read 3, iclass 4, count 0 2006.229.06:00:31.69#ibcon#read 3, iclass 4, count 0 2006.229.06:00:31.69#ibcon#about to read 4, iclass 4, count 0 2006.229.06:00:31.69#ibcon#read 4, iclass 4, count 0 2006.229.06:00:31.69#ibcon#about to read 5, iclass 4, count 0 2006.229.06:00:31.69#ibcon#read 5, iclass 4, count 0 2006.229.06:00:31.69#ibcon#about to read 6, iclass 4, count 0 2006.229.06:00:31.69#ibcon#read 6, iclass 4, count 0 2006.229.06:00:31.69#ibcon#end of sib2, iclass 4, count 0 2006.229.06:00:31.69#ibcon#*after write, iclass 4, count 0 2006.229.06:00:31.69#ibcon#*before return 0, iclass 4, count 0 2006.229.06:00:31.69#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:31.69#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:31.69#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:00:31.69#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:00:31.69$vck44/valo=8,884.99 2006.229.06:00:31.69#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:00:31.69#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:00:31.69#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:31.69#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:31.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:31.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:31.69#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:00:31.69#ibcon#first serial, iclass 6, count 0 2006.229.06:00:31.69#ibcon#enter sib2, iclass 6, count 0 2006.229.06:00:31.69#ibcon#flushed, iclass 6, count 0 2006.229.06:00:31.69#ibcon#about to write, iclass 6, count 0 2006.229.06:00:31.69#ibcon#wrote, iclass 6, count 0 2006.229.06:00:31.69#ibcon#about to read 3, iclass 6, count 0 2006.229.06:00:31.71#ibcon#read 3, iclass 6, count 0 2006.229.06:00:31.71#ibcon#about to read 4, iclass 6, count 0 2006.229.06:00:31.71#ibcon#read 4, iclass 6, count 0 2006.229.06:00:31.71#ibcon#about to read 5, iclass 6, count 0 2006.229.06:00:31.71#ibcon#read 5, iclass 6, count 0 2006.229.06:00:31.71#ibcon#about to read 6, iclass 6, count 0 2006.229.06:00:31.71#ibcon#read 6, iclass 6, count 0 2006.229.06:00:31.71#ibcon#end of sib2, iclass 6, count 0 2006.229.06:00:31.71#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:00:31.71#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:00:31.71#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:00:31.71#ibcon#*before write, iclass 6, count 0 2006.229.06:00:31.71#ibcon#enter sib2, iclass 6, count 0 2006.229.06:00:31.71#ibcon#flushed, iclass 6, count 0 2006.229.06:00:31.71#ibcon#about to write, iclass 6, count 0 2006.229.06:00:31.71#ibcon#wrote, iclass 6, count 0 2006.229.06:00:31.71#ibcon#about to read 3, iclass 6, count 0 2006.229.06:00:31.75#ibcon#read 3, iclass 6, count 0 2006.229.06:00:31.75#ibcon#about to read 4, iclass 6, count 0 2006.229.06:00:31.75#ibcon#read 4, iclass 6, count 0 2006.229.06:00:31.75#ibcon#about to read 5, iclass 6, count 0 2006.229.06:00:31.75#ibcon#read 5, iclass 6, count 0 2006.229.06:00:31.75#ibcon#about to read 6, iclass 6, count 0 2006.229.06:00:31.75#ibcon#read 6, iclass 6, count 0 2006.229.06:00:31.75#ibcon#end of sib2, iclass 6, count 0 2006.229.06:00:31.75#ibcon#*after write, iclass 6, count 0 2006.229.06:00:31.75#ibcon#*before return 0, iclass 6, count 0 2006.229.06:00:31.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:31.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:31.75#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:00:31.75#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:00:31.75$vck44/va=8,6 2006.229.06:00:31.75#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.06:00:31.75#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.06:00:31.75#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:31.75#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:00:31.81#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:00:31.81#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:00:31.81#ibcon#enter wrdev, iclass 10, count 2 2006.229.06:00:31.81#ibcon#first serial, iclass 10, count 2 2006.229.06:00:31.81#ibcon#enter sib2, iclass 10, count 2 2006.229.06:00:31.81#ibcon#flushed, iclass 10, count 2 2006.229.06:00:31.81#ibcon#about to write, iclass 10, count 2 2006.229.06:00:31.81#ibcon#wrote, iclass 10, count 2 2006.229.06:00:31.81#ibcon#about to read 3, iclass 10, count 2 2006.229.06:00:31.83#ibcon#read 3, iclass 10, count 2 2006.229.06:00:31.83#ibcon#about to read 4, iclass 10, count 2 2006.229.06:00:31.83#ibcon#read 4, iclass 10, count 2 2006.229.06:00:31.83#ibcon#about to read 5, iclass 10, count 2 2006.229.06:00:31.83#ibcon#read 5, iclass 10, count 2 2006.229.06:00:31.83#ibcon#about to read 6, iclass 10, count 2 2006.229.06:00:31.83#ibcon#read 6, iclass 10, count 2 2006.229.06:00:31.83#ibcon#end of sib2, iclass 10, count 2 2006.229.06:00:31.83#ibcon#*mode == 0, iclass 10, count 2 2006.229.06:00:31.83#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.06:00:31.83#ibcon#[25=AT08-06\r\n] 2006.229.06:00:31.83#ibcon#*before write, iclass 10, count 2 2006.229.06:00:31.83#ibcon#enter sib2, iclass 10, count 2 2006.229.06:00:31.83#ibcon#flushed, iclass 10, count 2 2006.229.06:00:31.83#ibcon#about to write, iclass 10, count 2 2006.229.06:00:31.83#ibcon#wrote, iclass 10, count 2 2006.229.06:00:31.83#ibcon#about to read 3, iclass 10, count 2 2006.229.06:00:31.86#ibcon#read 3, iclass 10, count 2 2006.229.06:00:31.86#ibcon#about to read 4, iclass 10, count 2 2006.229.06:00:31.86#ibcon#read 4, iclass 10, count 2 2006.229.06:00:31.86#ibcon#about to read 5, iclass 10, count 2 2006.229.06:00:31.86#ibcon#read 5, iclass 10, count 2 2006.229.06:00:31.86#ibcon#about to read 6, iclass 10, count 2 2006.229.06:00:31.86#ibcon#read 6, iclass 10, count 2 2006.229.06:00:31.86#ibcon#end of sib2, iclass 10, count 2 2006.229.06:00:31.86#ibcon#*after write, iclass 10, count 2 2006.229.06:00:31.86#ibcon#*before return 0, iclass 10, count 2 2006.229.06:00:31.86#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:00:31.86#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:00:31.86#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.06:00:31.86#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:31.86#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:00:31.98#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:00:31.98#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:00:31.98#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:00:31.98#ibcon#first serial, iclass 10, count 0 2006.229.06:00:31.98#ibcon#enter sib2, iclass 10, count 0 2006.229.06:00:31.98#ibcon#flushed, iclass 10, count 0 2006.229.06:00:31.98#ibcon#about to write, iclass 10, count 0 2006.229.06:00:31.98#ibcon#wrote, iclass 10, count 0 2006.229.06:00:31.98#ibcon#about to read 3, iclass 10, count 0 2006.229.06:00:32.00#ibcon#read 3, iclass 10, count 0 2006.229.06:00:32.00#ibcon#about to read 4, iclass 10, count 0 2006.229.06:00:32.00#ibcon#read 4, iclass 10, count 0 2006.229.06:00:32.00#ibcon#about to read 5, iclass 10, count 0 2006.229.06:00:32.00#ibcon#read 5, iclass 10, count 0 2006.229.06:00:32.00#ibcon#about to read 6, iclass 10, count 0 2006.229.06:00:32.00#ibcon#read 6, iclass 10, count 0 2006.229.06:00:32.00#ibcon#end of sib2, iclass 10, count 0 2006.229.06:00:32.00#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:00:32.00#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:00:32.00#ibcon#[25=USB\r\n] 2006.229.06:00:32.00#ibcon#*before write, iclass 10, count 0 2006.229.06:00:32.00#ibcon#enter sib2, iclass 10, count 0 2006.229.06:00:32.00#ibcon#flushed, iclass 10, count 0 2006.229.06:00:32.00#ibcon#about to write, iclass 10, count 0 2006.229.06:00:32.00#ibcon#wrote, iclass 10, count 0 2006.229.06:00:32.00#ibcon#about to read 3, iclass 10, count 0 2006.229.06:00:32.03#ibcon#read 3, iclass 10, count 0 2006.229.06:00:32.03#ibcon#about to read 4, iclass 10, count 0 2006.229.06:00:32.03#ibcon#read 4, iclass 10, count 0 2006.229.06:00:32.03#ibcon#about to read 5, iclass 10, count 0 2006.229.06:00:32.03#ibcon#read 5, iclass 10, count 0 2006.229.06:00:32.03#ibcon#about to read 6, iclass 10, count 0 2006.229.06:00:32.03#ibcon#read 6, iclass 10, count 0 2006.229.06:00:32.03#ibcon#end of sib2, iclass 10, count 0 2006.229.06:00:32.03#ibcon#*after write, iclass 10, count 0 2006.229.06:00:32.03#ibcon#*before return 0, iclass 10, count 0 2006.229.06:00:32.03#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:00:32.03#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:00:32.03#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:00:32.03#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:00:32.03$vck44/vblo=1,629.99 2006.229.06:00:32.03#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.06:00:32.03#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.06:00:32.03#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:32.03#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:00:32.03#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:00:32.03#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:00:32.03#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:00:32.03#ibcon#first serial, iclass 12, count 0 2006.229.06:00:32.03#ibcon#enter sib2, iclass 12, count 0 2006.229.06:00:32.03#ibcon#flushed, iclass 12, count 0 2006.229.06:00:32.03#ibcon#about to write, iclass 12, count 0 2006.229.06:00:32.03#ibcon#wrote, iclass 12, count 0 2006.229.06:00:32.03#ibcon#about to read 3, iclass 12, count 0 2006.229.06:00:32.05#ibcon#read 3, iclass 12, count 0 2006.229.06:00:32.05#ibcon#about to read 4, iclass 12, count 0 2006.229.06:00:32.05#ibcon#read 4, iclass 12, count 0 2006.229.06:00:32.05#ibcon#about to read 5, iclass 12, count 0 2006.229.06:00:32.05#ibcon#read 5, iclass 12, count 0 2006.229.06:00:32.05#ibcon#about to read 6, iclass 12, count 0 2006.229.06:00:32.05#ibcon#read 6, iclass 12, count 0 2006.229.06:00:32.05#ibcon#end of sib2, iclass 12, count 0 2006.229.06:00:32.05#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:00:32.05#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:00:32.05#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:00:32.05#ibcon#*before write, iclass 12, count 0 2006.229.06:00:32.05#ibcon#enter sib2, iclass 12, count 0 2006.229.06:00:32.05#ibcon#flushed, iclass 12, count 0 2006.229.06:00:32.05#ibcon#about to write, iclass 12, count 0 2006.229.06:00:32.05#ibcon#wrote, iclass 12, count 0 2006.229.06:00:32.05#ibcon#about to read 3, iclass 12, count 0 2006.229.06:00:32.09#ibcon#read 3, iclass 12, count 0 2006.229.06:00:32.09#ibcon#about to read 4, iclass 12, count 0 2006.229.06:00:32.09#ibcon#read 4, iclass 12, count 0 2006.229.06:00:32.09#ibcon#about to read 5, iclass 12, count 0 2006.229.06:00:32.09#ibcon#read 5, iclass 12, count 0 2006.229.06:00:32.09#ibcon#about to read 6, iclass 12, count 0 2006.229.06:00:32.09#ibcon#read 6, iclass 12, count 0 2006.229.06:00:32.09#ibcon#end of sib2, iclass 12, count 0 2006.229.06:00:32.09#ibcon#*after write, iclass 12, count 0 2006.229.06:00:32.09#ibcon#*before return 0, iclass 12, count 0 2006.229.06:00:32.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:00:32.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:00:32.09#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:00:32.09#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:00:32.09$vck44/vb=1,4 2006.229.06:00:32.09#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.06:00:32.09#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.06:00:32.09#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:32.09#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:00:32.09#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:00:32.09#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:00:32.09#ibcon#enter wrdev, iclass 14, count 2 2006.229.06:00:32.09#ibcon#first serial, iclass 14, count 2 2006.229.06:00:32.09#ibcon#enter sib2, iclass 14, count 2 2006.229.06:00:32.09#ibcon#flushed, iclass 14, count 2 2006.229.06:00:32.09#ibcon#about to write, iclass 14, count 2 2006.229.06:00:32.09#ibcon#wrote, iclass 14, count 2 2006.229.06:00:32.09#ibcon#about to read 3, iclass 14, count 2 2006.229.06:00:32.11#ibcon#read 3, iclass 14, count 2 2006.229.06:00:32.11#ibcon#about to read 4, iclass 14, count 2 2006.229.06:00:32.11#ibcon#read 4, iclass 14, count 2 2006.229.06:00:32.11#ibcon#about to read 5, iclass 14, count 2 2006.229.06:00:32.11#ibcon#read 5, iclass 14, count 2 2006.229.06:00:32.11#ibcon#about to read 6, iclass 14, count 2 2006.229.06:00:32.11#ibcon#read 6, iclass 14, count 2 2006.229.06:00:32.11#ibcon#end of sib2, iclass 14, count 2 2006.229.06:00:32.11#ibcon#*mode == 0, iclass 14, count 2 2006.229.06:00:32.11#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.06:00:32.11#ibcon#[27=AT01-04\r\n] 2006.229.06:00:32.11#ibcon#*before write, iclass 14, count 2 2006.229.06:00:32.11#ibcon#enter sib2, iclass 14, count 2 2006.229.06:00:32.11#ibcon#flushed, iclass 14, count 2 2006.229.06:00:32.11#ibcon#about to write, iclass 14, count 2 2006.229.06:00:32.11#ibcon#wrote, iclass 14, count 2 2006.229.06:00:32.11#ibcon#about to read 3, iclass 14, count 2 2006.229.06:00:32.14#ibcon#read 3, iclass 14, count 2 2006.229.06:00:32.14#ibcon#about to read 4, iclass 14, count 2 2006.229.06:00:32.14#ibcon#read 4, iclass 14, count 2 2006.229.06:00:32.14#ibcon#about to read 5, iclass 14, count 2 2006.229.06:00:32.14#ibcon#read 5, iclass 14, count 2 2006.229.06:00:32.14#ibcon#about to read 6, iclass 14, count 2 2006.229.06:00:32.14#ibcon#read 6, iclass 14, count 2 2006.229.06:00:32.14#ibcon#end of sib2, iclass 14, count 2 2006.229.06:00:32.14#ibcon#*after write, iclass 14, count 2 2006.229.06:00:32.14#ibcon#*before return 0, iclass 14, count 2 2006.229.06:00:32.14#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:00:32.14#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:00:32.14#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.06:00:32.14#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:32.14#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:00:32.26#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:00:32.26#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:00:32.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:00:32.26#ibcon#first serial, iclass 14, count 0 2006.229.06:00:32.26#ibcon#enter sib2, iclass 14, count 0 2006.229.06:00:32.26#ibcon#flushed, iclass 14, count 0 2006.229.06:00:32.26#ibcon#about to write, iclass 14, count 0 2006.229.06:00:32.26#ibcon#wrote, iclass 14, count 0 2006.229.06:00:32.26#ibcon#about to read 3, iclass 14, count 0 2006.229.06:00:32.28#ibcon#read 3, iclass 14, count 0 2006.229.06:00:32.28#ibcon#about to read 4, iclass 14, count 0 2006.229.06:00:32.28#ibcon#read 4, iclass 14, count 0 2006.229.06:00:32.28#ibcon#about to read 5, iclass 14, count 0 2006.229.06:00:32.28#ibcon#read 5, iclass 14, count 0 2006.229.06:00:32.28#ibcon#about to read 6, iclass 14, count 0 2006.229.06:00:32.28#ibcon#read 6, iclass 14, count 0 2006.229.06:00:32.28#ibcon#end of sib2, iclass 14, count 0 2006.229.06:00:32.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:00:32.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:00:32.28#ibcon#[27=USB\r\n] 2006.229.06:00:32.28#ibcon#*before write, iclass 14, count 0 2006.229.06:00:32.28#ibcon#enter sib2, iclass 14, count 0 2006.229.06:00:32.28#ibcon#flushed, iclass 14, count 0 2006.229.06:00:32.28#ibcon#about to write, iclass 14, count 0 2006.229.06:00:32.28#ibcon#wrote, iclass 14, count 0 2006.229.06:00:32.28#ibcon#about to read 3, iclass 14, count 0 2006.229.06:00:32.31#ibcon#read 3, iclass 14, count 0 2006.229.06:00:32.31#ibcon#about to read 4, iclass 14, count 0 2006.229.06:00:32.31#ibcon#read 4, iclass 14, count 0 2006.229.06:00:32.31#ibcon#about to read 5, iclass 14, count 0 2006.229.06:00:32.31#ibcon#read 5, iclass 14, count 0 2006.229.06:00:32.31#ibcon#about to read 6, iclass 14, count 0 2006.229.06:00:32.31#ibcon#read 6, iclass 14, count 0 2006.229.06:00:32.31#ibcon#end of sib2, iclass 14, count 0 2006.229.06:00:32.31#ibcon#*after write, iclass 14, count 0 2006.229.06:00:32.31#ibcon#*before return 0, iclass 14, count 0 2006.229.06:00:32.31#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:00:32.31#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:00:32.31#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:00:32.31#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:00:32.31$vck44/vblo=2,634.99 2006.229.06:00:32.31#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:00:32.31#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:00:32.31#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:32.31#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:32.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:32.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:32.31#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:00:32.31#ibcon#first serial, iclass 16, count 0 2006.229.06:00:32.31#ibcon#enter sib2, iclass 16, count 0 2006.229.06:00:32.31#ibcon#flushed, iclass 16, count 0 2006.229.06:00:32.31#ibcon#about to write, iclass 16, count 0 2006.229.06:00:32.31#ibcon#wrote, iclass 16, count 0 2006.229.06:00:32.31#ibcon#about to read 3, iclass 16, count 0 2006.229.06:00:32.33#ibcon#read 3, iclass 16, count 0 2006.229.06:00:32.33#ibcon#about to read 4, iclass 16, count 0 2006.229.06:00:32.33#ibcon#read 4, iclass 16, count 0 2006.229.06:00:32.33#ibcon#about to read 5, iclass 16, count 0 2006.229.06:00:32.33#ibcon#read 5, iclass 16, count 0 2006.229.06:00:32.33#ibcon#about to read 6, iclass 16, count 0 2006.229.06:00:32.33#ibcon#read 6, iclass 16, count 0 2006.229.06:00:32.33#ibcon#end of sib2, iclass 16, count 0 2006.229.06:00:32.33#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:00:32.33#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:00:32.33#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:00:32.33#ibcon#*before write, iclass 16, count 0 2006.229.06:00:32.33#ibcon#enter sib2, iclass 16, count 0 2006.229.06:00:32.33#ibcon#flushed, iclass 16, count 0 2006.229.06:00:32.33#ibcon#about to write, iclass 16, count 0 2006.229.06:00:32.33#ibcon#wrote, iclass 16, count 0 2006.229.06:00:32.33#ibcon#about to read 3, iclass 16, count 0 2006.229.06:00:32.37#ibcon#read 3, iclass 16, count 0 2006.229.06:00:32.37#ibcon#about to read 4, iclass 16, count 0 2006.229.06:00:32.37#ibcon#read 4, iclass 16, count 0 2006.229.06:00:32.37#ibcon#about to read 5, iclass 16, count 0 2006.229.06:00:32.37#ibcon#read 5, iclass 16, count 0 2006.229.06:00:32.37#ibcon#about to read 6, iclass 16, count 0 2006.229.06:00:32.37#ibcon#read 6, iclass 16, count 0 2006.229.06:00:32.37#ibcon#end of sib2, iclass 16, count 0 2006.229.06:00:32.37#ibcon#*after write, iclass 16, count 0 2006.229.06:00:32.37#ibcon#*before return 0, iclass 16, count 0 2006.229.06:00:32.37#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:32.37#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:00:32.37#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:00:32.37#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:00:32.37$vck44/vb=2,4 2006.229.06:00:32.37#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.06:00:32.37#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.06:00:32.37#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:32.37#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:32.43#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:32.43#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:32.43#ibcon#enter wrdev, iclass 18, count 2 2006.229.06:00:32.43#ibcon#first serial, iclass 18, count 2 2006.229.06:00:32.43#ibcon#enter sib2, iclass 18, count 2 2006.229.06:00:32.43#ibcon#flushed, iclass 18, count 2 2006.229.06:00:32.43#ibcon#about to write, iclass 18, count 2 2006.229.06:00:32.43#ibcon#wrote, iclass 18, count 2 2006.229.06:00:32.43#ibcon#about to read 3, iclass 18, count 2 2006.229.06:00:32.45#ibcon#read 3, iclass 18, count 2 2006.229.06:00:32.45#ibcon#about to read 4, iclass 18, count 2 2006.229.06:00:32.45#ibcon#read 4, iclass 18, count 2 2006.229.06:00:32.45#ibcon#about to read 5, iclass 18, count 2 2006.229.06:00:32.45#ibcon#read 5, iclass 18, count 2 2006.229.06:00:32.45#ibcon#about to read 6, iclass 18, count 2 2006.229.06:00:32.45#ibcon#read 6, iclass 18, count 2 2006.229.06:00:32.45#ibcon#end of sib2, iclass 18, count 2 2006.229.06:00:32.45#ibcon#*mode == 0, iclass 18, count 2 2006.229.06:00:32.45#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.06:00:32.45#ibcon#[27=AT02-04\r\n] 2006.229.06:00:32.45#ibcon#*before write, iclass 18, count 2 2006.229.06:00:32.45#ibcon#enter sib2, iclass 18, count 2 2006.229.06:00:32.45#ibcon#flushed, iclass 18, count 2 2006.229.06:00:32.45#ibcon#about to write, iclass 18, count 2 2006.229.06:00:32.45#ibcon#wrote, iclass 18, count 2 2006.229.06:00:32.45#ibcon#about to read 3, iclass 18, count 2 2006.229.06:00:32.48#ibcon#read 3, iclass 18, count 2 2006.229.06:00:32.48#ibcon#about to read 4, iclass 18, count 2 2006.229.06:00:32.48#ibcon#read 4, iclass 18, count 2 2006.229.06:00:32.48#ibcon#about to read 5, iclass 18, count 2 2006.229.06:00:32.48#ibcon#read 5, iclass 18, count 2 2006.229.06:00:32.48#ibcon#about to read 6, iclass 18, count 2 2006.229.06:00:32.48#ibcon#read 6, iclass 18, count 2 2006.229.06:00:32.48#ibcon#end of sib2, iclass 18, count 2 2006.229.06:00:32.48#ibcon#*after write, iclass 18, count 2 2006.229.06:00:32.48#ibcon#*before return 0, iclass 18, count 2 2006.229.06:00:32.48#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:32.48#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:00:32.48#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.06:00:32.48#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:32.48#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:32.60#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:32.60#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:32.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:00:32.60#ibcon#first serial, iclass 18, count 0 2006.229.06:00:32.60#ibcon#enter sib2, iclass 18, count 0 2006.229.06:00:32.60#ibcon#flushed, iclass 18, count 0 2006.229.06:00:32.60#ibcon#about to write, iclass 18, count 0 2006.229.06:00:32.60#ibcon#wrote, iclass 18, count 0 2006.229.06:00:32.60#ibcon#about to read 3, iclass 18, count 0 2006.229.06:00:32.62#ibcon#read 3, iclass 18, count 0 2006.229.06:00:32.62#ibcon#about to read 4, iclass 18, count 0 2006.229.06:00:32.62#ibcon#read 4, iclass 18, count 0 2006.229.06:00:32.62#ibcon#about to read 5, iclass 18, count 0 2006.229.06:00:32.62#ibcon#read 5, iclass 18, count 0 2006.229.06:00:32.62#ibcon#about to read 6, iclass 18, count 0 2006.229.06:00:32.62#ibcon#read 6, iclass 18, count 0 2006.229.06:00:32.62#ibcon#end of sib2, iclass 18, count 0 2006.229.06:00:32.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:00:32.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:00:32.62#ibcon#[27=USB\r\n] 2006.229.06:00:32.62#ibcon#*before write, iclass 18, count 0 2006.229.06:00:32.62#ibcon#enter sib2, iclass 18, count 0 2006.229.06:00:32.62#ibcon#flushed, iclass 18, count 0 2006.229.06:00:32.62#ibcon#about to write, iclass 18, count 0 2006.229.06:00:32.62#ibcon#wrote, iclass 18, count 0 2006.229.06:00:32.62#ibcon#about to read 3, iclass 18, count 0 2006.229.06:00:32.65#ibcon#read 3, iclass 18, count 0 2006.229.06:00:32.65#ibcon#about to read 4, iclass 18, count 0 2006.229.06:00:32.65#ibcon#read 4, iclass 18, count 0 2006.229.06:00:32.65#ibcon#about to read 5, iclass 18, count 0 2006.229.06:00:32.65#ibcon#read 5, iclass 18, count 0 2006.229.06:00:32.65#ibcon#about to read 6, iclass 18, count 0 2006.229.06:00:32.65#ibcon#read 6, iclass 18, count 0 2006.229.06:00:32.65#ibcon#end of sib2, iclass 18, count 0 2006.229.06:00:32.65#ibcon#*after write, iclass 18, count 0 2006.229.06:00:32.65#ibcon#*before return 0, iclass 18, count 0 2006.229.06:00:32.65#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:32.65#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:00:32.65#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:00:32.65#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:00:32.65$vck44/vblo=3,649.99 2006.229.06:00:32.65#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.06:00:32.65#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.06:00:32.65#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:32.65#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:32.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:32.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:32.65#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:00:32.65#ibcon#first serial, iclass 20, count 0 2006.229.06:00:32.65#ibcon#enter sib2, iclass 20, count 0 2006.229.06:00:32.65#ibcon#flushed, iclass 20, count 0 2006.229.06:00:32.65#ibcon#about to write, iclass 20, count 0 2006.229.06:00:32.65#ibcon#wrote, iclass 20, count 0 2006.229.06:00:32.65#ibcon#about to read 3, iclass 20, count 0 2006.229.06:00:32.67#ibcon#read 3, iclass 20, count 0 2006.229.06:00:32.67#ibcon#about to read 4, iclass 20, count 0 2006.229.06:00:32.67#ibcon#read 4, iclass 20, count 0 2006.229.06:00:32.67#ibcon#about to read 5, iclass 20, count 0 2006.229.06:00:32.67#ibcon#read 5, iclass 20, count 0 2006.229.06:00:32.67#ibcon#about to read 6, iclass 20, count 0 2006.229.06:00:32.67#ibcon#read 6, iclass 20, count 0 2006.229.06:00:32.67#ibcon#end of sib2, iclass 20, count 0 2006.229.06:00:32.67#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:00:32.67#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:00:32.67#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:00:32.67#ibcon#*before write, iclass 20, count 0 2006.229.06:00:32.67#ibcon#enter sib2, iclass 20, count 0 2006.229.06:00:32.67#ibcon#flushed, iclass 20, count 0 2006.229.06:00:32.67#ibcon#about to write, iclass 20, count 0 2006.229.06:00:32.67#ibcon#wrote, iclass 20, count 0 2006.229.06:00:32.67#ibcon#about to read 3, iclass 20, count 0 2006.229.06:00:32.71#ibcon#read 3, iclass 20, count 0 2006.229.06:00:32.71#ibcon#about to read 4, iclass 20, count 0 2006.229.06:00:32.71#ibcon#read 4, iclass 20, count 0 2006.229.06:00:32.71#ibcon#about to read 5, iclass 20, count 0 2006.229.06:00:32.71#ibcon#read 5, iclass 20, count 0 2006.229.06:00:32.71#ibcon#about to read 6, iclass 20, count 0 2006.229.06:00:32.71#ibcon#read 6, iclass 20, count 0 2006.229.06:00:32.71#ibcon#end of sib2, iclass 20, count 0 2006.229.06:00:32.71#ibcon#*after write, iclass 20, count 0 2006.229.06:00:32.71#ibcon#*before return 0, iclass 20, count 0 2006.229.06:00:32.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:32.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:00:32.71#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:00:32.71#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:00:32.71$vck44/vb=3,4 2006.229.06:00:32.71#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.06:00:32.71#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.06:00:32.71#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:32.71#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:32.77#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:32.77#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:32.77#ibcon#enter wrdev, iclass 22, count 2 2006.229.06:00:32.77#ibcon#first serial, iclass 22, count 2 2006.229.06:00:32.77#ibcon#enter sib2, iclass 22, count 2 2006.229.06:00:32.77#ibcon#flushed, iclass 22, count 2 2006.229.06:00:32.77#ibcon#about to write, iclass 22, count 2 2006.229.06:00:32.77#ibcon#wrote, iclass 22, count 2 2006.229.06:00:32.77#ibcon#about to read 3, iclass 22, count 2 2006.229.06:00:32.79#ibcon#read 3, iclass 22, count 2 2006.229.06:00:32.79#ibcon#about to read 4, iclass 22, count 2 2006.229.06:00:32.79#ibcon#read 4, iclass 22, count 2 2006.229.06:00:32.79#ibcon#about to read 5, iclass 22, count 2 2006.229.06:00:32.79#ibcon#read 5, iclass 22, count 2 2006.229.06:00:32.79#ibcon#about to read 6, iclass 22, count 2 2006.229.06:00:32.79#ibcon#read 6, iclass 22, count 2 2006.229.06:00:32.79#ibcon#end of sib2, iclass 22, count 2 2006.229.06:00:32.79#ibcon#*mode == 0, iclass 22, count 2 2006.229.06:00:32.79#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.06:00:32.79#ibcon#[27=AT03-04\r\n] 2006.229.06:00:32.79#ibcon#*before write, iclass 22, count 2 2006.229.06:00:32.79#ibcon#enter sib2, iclass 22, count 2 2006.229.06:00:32.79#ibcon#flushed, iclass 22, count 2 2006.229.06:00:32.79#ibcon#about to write, iclass 22, count 2 2006.229.06:00:32.79#ibcon#wrote, iclass 22, count 2 2006.229.06:00:32.79#ibcon#about to read 3, iclass 22, count 2 2006.229.06:00:32.82#ibcon#read 3, iclass 22, count 2 2006.229.06:00:32.82#ibcon#about to read 4, iclass 22, count 2 2006.229.06:00:32.82#ibcon#read 4, iclass 22, count 2 2006.229.06:00:32.82#ibcon#about to read 5, iclass 22, count 2 2006.229.06:00:32.82#ibcon#read 5, iclass 22, count 2 2006.229.06:00:32.82#ibcon#about to read 6, iclass 22, count 2 2006.229.06:00:32.82#ibcon#read 6, iclass 22, count 2 2006.229.06:00:32.82#ibcon#end of sib2, iclass 22, count 2 2006.229.06:00:32.82#ibcon#*after write, iclass 22, count 2 2006.229.06:00:32.82#ibcon#*before return 0, iclass 22, count 2 2006.229.06:00:32.82#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:32.82#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:00:32.82#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.06:00:32.82#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:32.82#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:32.94#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:32.94#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:32.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:00:32.94#ibcon#first serial, iclass 22, count 0 2006.229.06:00:32.94#ibcon#enter sib2, iclass 22, count 0 2006.229.06:00:32.94#ibcon#flushed, iclass 22, count 0 2006.229.06:00:32.94#ibcon#about to write, iclass 22, count 0 2006.229.06:00:32.94#ibcon#wrote, iclass 22, count 0 2006.229.06:00:32.94#ibcon#about to read 3, iclass 22, count 0 2006.229.06:00:32.96#ibcon#read 3, iclass 22, count 0 2006.229.06:00:32.96#ibcon#about to read 4, iclass 22, count 0 2006.229.06:00:32.96#ibcon#read 4, iclass 22, count 0 2006.229.06:00:32.96#ibcon#about to read 5, iclass 22, count 0 2006.229.06:00:32.96#ibcon#read 5, iclass 22, count 0 2006.229.06:00:32.96#ibcon#about to read 6, iclass 22, count 0 2006.229.06:00:32.96#ibcon#read 6, iclass 22, count 0 2006.229.06:00:32.96#ibcon#end of sib2, iclass 22, count 0 2006.229.06:00:32.96#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:00:32.96#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:00:32.96#ibcon#[27=USB\r\n] 2006.229.06:00:32.96#ibcon#*before write, iclass 22, count 0 2006.229.06:00:32.96#ibcon#enter sib2, iclass 22, count 0 2006.229.06:00:32.96#ibcon#flushed, iclass 22, count 0 2006.229.06:00:32.96#ibcon#about to write, iclass 22, count 0 2006.229.06:00:32.96#ibcon#wrote, iclass 22, count 0 2006.229.06:00:32.96#ibcon#about to read 3, iclass 22, count 0 2006.229.06:00:32.99#ibcon#read 3, iclass 22, count 0 2006.229.06:00:32.99#ibcon#about to read 4, iclass 22, count 0 2006.229.06:00:32.99#ibcon#read 4, iclass 22, count 0 2006.229.06:00:32.99#ibcon#about to read 5, iclass 22, count 0 2006.229.06:00:32.99#ibcon#read 5, iclass 22, count 0 2006.229.06:00:32.99#ibcon#about to read 6, iclass 22, count 0 2006.229.06:00:32.99#ibcon#read 6, iclass 22, count 0 2006.229.06:00:32.99#ibcon#end of sib2, iclass 22, count 0 2006.229.06:00:32.99#ibcon#*after write, iclass 22, count 0 2006.229.06:00:32.99#ibcon#*before return 0, iclass 22, count 0 2006.229.06:00:32.99#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:32.99#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:00:32.99#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:00:32.99#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:00:32.99$vck44/vblo=4,679.99 2006.229.06:00:32.99#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.06:00:32.99#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.06:00:32.99#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:32.99#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:32.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:32.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:32.99#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:00:32.99#ibcon#first serial, iclass 24, count 0 2006.229.06:00:32.99#ibcon#enter sib2, iclass 24, count 0 2006.229.06:00:32.99#ibcon#flushed, iclass 24, count 0 2006.229.06:00:32.99#ibcon#about to write, iclass 24, count 0 2006.229.06:00:32.99#ibcon#wrote, iclass 24, count 0 2006.229.06:00:32.99#ibcon#about to read 3, iclass 24, count 0 2006.229.06:00:33.01#ibcon#read 3, iclass 24, count 0 2006.229.06:00:33.01#ibcon#about to read 4, iclass 24, count 0 2006.229.06:00:33.01#ibcon#read 4, iclass 24, count 0 2006.229.06:00:33.01#ibcon#about to read 5, iclass 24, count 0 2006.229.06:00:33.01#ibcon#read 5, iclass 24, count 0 2006.229.06:00:33.01#ibcon#about to read 6, iclass 24, count 0 2006.229.06:00:33.01#ibcon#read 6, iclass 24, count 0 2006.229.06:00:33.01#ibcon#end of sib2, iclass 24, count 0 2006.229.06:00:33.01#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:00:33.01#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:00:33.01#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:00:33.01#ibcon#*before write, iclass 24, count 0 2006.229.06:00:33.01#ibcon#enter sib2, iclass 24, count 0 2006.229.06:00:33.01#ibcon#flushed, iclass 24, count 0 2006.229.06:00:33.01#ibcon#about to write, iclass 24, count 0 2006.229.06:00:33.01#ibcon#wrote, iclass 24, count 0 2006.229.06:00:33.01#ibcon#about to read 3, iclass 24, count 0 2006.229.06:00:33.05#ibcon#read 3, iclass 24, count 0 2006.229.06:00:33.05#ibcon#about to read 4, iclass 24, count 0 2006.229.06:00:33.05#ibcon#read 4, iclass 24, count 0 2006.229.06:00:33.05#ibcon#about to read 5, iclass 24, count 0 2006.229.06:00:33.05#ibcon#read 5, iclass 24, count 0 2006.229.06:00:33.05#ibcon#about to read 6, iclass 24, count 0 2006.229.06:00:33.05#ibcon#read 6, iclass 24, count 0 2006.229.06:00:33.05#ibcon#end of sib2, iclass 24, count 0 2006.229.06:00:33.05#ibcon#*after write, iclass 24, count 0 2006.229.06:00:33.05#ibcon#*before return 0, iclass 24, count 0 2006.229.06:00:33.05#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:33.05#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:00:33.05#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:00:33.05#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:00:33.05$vck44/vb=4,4 2006.229.06:00:33.05#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.06:00:33.05#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.06:00:33.05#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:33.05#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:33.11#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:33.11#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:33.11#ibcon#enter wrdev, iclass 26, count 2 2006.229.06:00:33.11#ibcon#first serial, iclass 26, count 2 2006.229.06:00:33.11#ibcon#enter sib2, iclass 26, count 2 2006.229.06:00:33.11#ibcon#flushed, iclass 26, count 2 2006.229.06:00:33.11#ibcon#about to write, iclass 26, count 2 2006.229.06:00:33.11#ibcon#wrote, iclass 26, count 2 2006.229.06:00:33.11#ibcon#about to read 3, iclass 26, count 2 2006.229.06:00:33.13#ibcon#read 3, iclass 26, count 2 2006.229.06:00:33.13#ibcon#about to read 4, iclass 26, count 2 2006.229.06:00:33.13#ibcon#read 4, iclass 26, count 2 2006.229.06:00:33.13#ibcon#about to read 5, iclass 26, count 2 2006.229.06:00:33.13#ibcon#read 5, iclass 26, count 2 2006.229.06:00:33.13#ibcon#about to read 6, iclass 26, count 2 2006.229.06:00:33.13#ibcon#read 6, iclass 26, count 2 2006.229.06:00:33.13#ibcon#end of sib2, iclass 26, count 2 2006.229.06:00:33.13#ibcon#*mode == 0, iclass 26, count 2 2006.229.06:00:33.13#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.06:00:33.13#ibcon#[27=AT04-04\r\n] 2006.229.06:00:33.13#ibcon#*before write, iclass 26, count 2 2006.229.06:00:33.13#ibcon#enter sib2, iclass 26, count 2 2006.229.06:00:33.13#ibcon#flushed, iclass 26, count 2 2006.229.06:00:33.13#ibcon#about to write, iclass 26, count 2 2006.229.06:00:33.13#ibcon#wrote, iclass 26, count 2 2006.229.06:00:33.13#ibcon#about to read 3, iclass 26, count 2 2006.229.06:00:33.16#ibcon#read 3, iclass 26, count 2 2006.229.06:00:33.16#ibcon#about to read 4, iclass 26, count 2 2006.229.06:00:33.16#ibcon#read 4, iclass 26, count 2 2006.229.06:00:33.16#ibcon#about to read 5, iclass 26, count 2 2006.229.06:00:33.16#ibcon#read 5, iclass 26, count 2 2006.229.06:00:33.16#ibcon#about to read 6, iclass 26, count 2 2006.229.06:00:33.16#ibcon#read 6, iclass 26, count 2 2006.229.06:00:33.16#ibcon#end of sib2, iclass 26, count 2 2006.229.06:00:33.16#ibcon#*after write, iclass 26, count 2 2006.229.06:00:33.16#ibcon#*before return 0, iclass 26, count 2 2006.229.06:00:33.16#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:33.16#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:00:33.16#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.06:00:33.16#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:33.16#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:33.28#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:33.28#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:33.28#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:00:33.28#ibcon#first serial, iclass 26, count 0 2006.229.06:00:33.28#ibcon#enter sib2, iclass 26, count 0 2006.229.06:00:33.28#ibcon#flushed, iclass 26, count 0 2006.229.06:00:33.28#ibcon#about to write, iclass 26, count 0 2006.229.06:00:33.28#ibcon#wrote, iclass 26, count 0 2006.229.06:00:33.28#ibcon#about to read 3, iclass 26, count 0 2006.229.06:00:33.30#ibcon#read 3, iclass 26, count 0 2006.229.06:00:33.30#ibcon#about to read 4, iclass 26, count 0 2006.229.06:00:33.30#ibcon#read 4, iclass 26, count 0 2006.229.06:00:33.30#ibcon#about to read 5, iclass 26, count 0 2006.229.06:00:33.30#ibcon#read 5, iclass 26, count 0 2006.229.06:00:33.30#ibcon#about to read 6, iclass 26, count 0 2006.229.06:00:33.30#ibcon#read 6, iclass 26, count 0 2006.229.06:00:33.30#ibcon#end of sib2, iclass 26, count 0 2006.229.06:00:33.30#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:00:33.30#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:00:33.30#ibcon#[27=USB\r\n] 2006.229.06:00:33.30#ibcon#*before write, iclass 26, count 0 2006.229.06:00:33.30#ibcon#enter sib2, iclass 26, count 0 2006.229.06:00:33.30#ibcon#flushed, iclass 26, count 0 2006.229.06:00:33.30#ibcon#about to write, iclass 26, count 0 2006.229.06:00:33.30#ibcon#wrote, iclass 26, count 0 2006.229.06:00:33.30#ibcon#about to read 3, iclass 26, count 0 2006.229.06:00:33.33#ibcon#read 3, iclass 26, count 0 2006.229.06:00:33.33#ibcon#about to read 4, iclass 26, count 0 2006.229.06:00:33.33#ibcon#read 4, iclass 26, count 0 2006.229.06:00:33.33#ibcon#about to read 5, iclass 26, count 0 2006.229.06:00:33.33#ibcon#read 5, iclass 26, count 0 2006.229.06:00:33.33#ibcon#about to read 6, iclass 26, count 0 2006.229.06:00:33.33#ibcon#read 6, iclass 26, count 0 2006.229.06:00:33.33#ibcon#end of sib2, iclass 26, count 0 2006.229.06:00:33.33#ibcon#*after write, iclass 26, count 0 2006.229.06:00:33.33#ibcon#*before return 0, iclass 26, count 0 2006.229.06:00:33.33#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:33.33#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:00:33.33#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:00:33.33#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:00:33.33$vck44/vblo=5,709.99 2006.229.06:00:33.33#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.06:00:33.33#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.06:00:33.33#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:33.33#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:33.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:33.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:33.33#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:00:33.33#ibcon#first serial, iclass 28, count 0 2006.229.06:00:33.33#ibcon#enter sib2, iclass 28, count 0 2006.229.06:00:33.33#ibcon#flushed, iclass 28, count 0 2006.229.06:00:33.33#ibcon#about to write, iclass 28, count 0 2006.229.06:00:33.33#ibcon#wrote, iclass 28, count 0 2006.229.06:00:33.33#ibcon#about to read 3, iclass 28, count 0 2006.229.06:00:33.35#ibcon#read 3, iclass 28, count 0 2006.229.06:00:33.35#ibcon#about to read 4, iclass 28, count 0 2006.229.06:00:33.35#ibcon#read 4, iclass 28, count 0 2006.229.06:00:33.35#ibcon#about to read 5, iclass 28, count 0 2006.229.06:00:33.35#ibcon#read 5, iclass 28, count 0 2006.229.06:00:33.35#ibcon#about to read 6, iclass 28, count 0 2006.229.06:00:33.35#ibcon#read 6, iclass 28, count 0 2006.229.06:00:33.35#ibcon#end of sib2, iclass 28, count 0 2006.229.06:00:33.35#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:00:33.35#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:00:33.35#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:00:33.35#ibcon#*before write, iclass 28, count 0 2006.229.06:00:33.35#ibcon#enter sib2, iclass 28, count 0 2006.229.06:00:33.35#ibcon#flushed, iclass 28, count 0 2006.229.06:00:33.35#ibcon#about to write, iclass 28, count 0 2006.229.06:00:33.35#ibcon#wrote, iclass 28, count 0 2006.229.06:00:33.35#ibcon#about to read 3, iclass 28, count 0 2006.229.06:00:33.39#ibcon#read 3, iclass 28, count 0 2006.229.06:00:33.39#ibcon#about to read 4, iclass 28, count 0 2006.229.06:00:33.39#ibcon#read 4, iclass 28, count 0 2006.229.06:00:33.39#ibcon#about to read 5, iclass 28, count 0 2006.229.06:00:33.39#ibcon#read 5, iclass 28, count 0 2006.229.06:00:33.39#ibcon#about to read 6, iclass 28, count 0 2006.229.06:00:33.39#ibcon#read 6, iclass 28, count 0 2006.229.06:00:33.39#ibcon#end of sib2, iclass 28, count 0 2006.229.06:00:33.39#ibcon#*after write, iclass 28, count 0 2006.229.06:00:33.39#ibcon#*before return 0, iclass 28, count 0 2006.229.06:00:33.39#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:33.39#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:00:33.39#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:00:33.39#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:00:33.39$vck44/vb=5,4 2006.229.06:00:33.39#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.06:00:33.39#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.06:00:33.39#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:33.39#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:33.45#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:33.45#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:33.45#ibcon#enter wrdev, iclass 30, count 2 2006.229.06:00:33.45#ibcon#first serial, iclass 30, count 2 2006.229.06:00:33.45#ibcon#enter sib2, iclass 30, count 2 2006.229.06:00:33.45#ibcon#flushed, iclass 30, count 2 2006.229.06:00:33.45#ibcon#about to write, iclass 30, count 2 2006.229.06:00:33.45#ibcon#wrote, iclass 30, count 2 2006.229.06:00:33.45#ibcon#about to read 3, iclass 30, count 2 2006.229.06:00:33.47#ibcon#read 3, iclass 30, count 2 2006.229.06:00:33.47#ibcon#about to read 4, iclass 30, count 2 2006.229.06:00:33.47#ibcon#read 4, iclass 30, count 2 2006.229.06:00:33.47#ibcon#about to read 5, iclass 30, count 2 2006.229.06:00:33.47#ibcon#read 5, iclass 30, count 2 2006.229.06:00:33.47#ibcon#about to read 6, iclass 30, count 2 2006.229.06:00:33.47#ibcon#read 6, iclass 30, count 2 2006.229.06:00:33.47#ibcon#end of sib2, iclass 30, count 2 2006.229.06:00:33.47#ibcon#*mode == 0, iclass 30, count 2 2006.229.06:00:33.47#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.06:00:33.47#ibcon#[27=AT05-04\r\n] 2006.229.06:00:33.47#ibcon#*before write, iclass 30, count 2 2006.229.06:00:33.47#ibcon#enter sib2, iclass 30, count 2 2006.229.06:00:33.47#ibcon#flushed, iclass 30, count 2 2006.229.06:00:33.47#ibcon#about to write, iclass 30, count 2 2006.229.06:00:33.47#ibcon#wrote, iclass 30, count 2 2006.229.06:00:33.47#ibcon#about to read 3, iclass 30, count 2 2006.229.06:00:33.50#ibcon#read 3, iclass 30, count 2 2006.229.06:00:33.50#ibcon#about to read 4, iclass 30, count 2 2006.229.06:00:33.50#ibcon#read 4, iclass 30, count 2 2006.229.06:00:33.50#ibcon#about to read 5, iclass 30, count 2 2006.229.06:00:33.50#ibcon#read 5, iclass 30, count 2 2006.229.06:00:33.50#ibcon#about to read 6, iclass 30, count 2 2006.229.06:00:33.50#ibcon#read 6, iclass 30, count 2 2006.229.06:00:33.50#ibcon#end of sib2, iclass 30, count 2 2006.229.06:00:33.50#ibcon#*after write, iclass 30, count 2 2006.229.06:00:33.50#ibcon#*before return 0, iclass 30, count 2 2006.229.06:00:33.50#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:33.50#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:00:33.50#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.06:00:33.50#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:33.50#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:33.62#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:33.62#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:33.62#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:00:33.62#ibcon#first serial, iclass 30, count 0 2006.229.06:00:33.62#ibcon#enter sib2, iclass 30, count 0 2006.229.06:00:33.62#ibcon#flushed, iclass 30, count 0 2006.229.06:00:33.62#ibcon#about to write, iclass 30, count 0 2006.229.06:00:33.62#ibcon#wrote, iclass 30, count 0 2006.229.06:00:33.62#ibcon#about to read 3, iclass 30, count 0 2006.229.06:00:33.64#ibcon#read 3, iclass 30, count 0 2006.229.06:00:33.64#ibcon#about to read 4, iclass 30, count 0 2006.229.06:00:33.64#ibcon#read 4, iclass 30, count 0 2006.229.06:00:33.64#ibcon#about to read 5, iclass 30, count 0 2006.229.06:00:33.64#ibcon#read 5, iclass 30, count 0 2006.229.06:00:33.64#ibcon#about to read 6, iclass 30, count 0 2006.229.06:00:33.64#ibcon#read 6, iclass 30, count 0 2006.229.06:00:33.64#ibcon#end of sib2, iclass 30, count 0 2006.229.06:00:33.64#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:00:33.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:00:33.64#ibcon#[27=USB\r\n] 2006.229.06:00:33.64#ibcon#*before write, iclass 30, count 0 2006.229.06:00:33.64#ibcon#enter sib2, iclass 30, count 0 2006.229.06:00:33.64#ibcon#flushed, iclass 30, count 0 2006.229.06:00:33.64#ibcon#about to write, iclass 30, count 0 2006.229.06:00:33.64#ibcon#wrote, iclass 30, count 0 2006.229.06:00:33.64#ibcon#about to read 3, iclass 30, count 0 2006.229.06:00:33.67#ibcon#read 3, iclass 30, count 0 2006.229.06:00:33.67#ibcon#about to read 4, iclass 30, count 0 2006.229.06:00:33.67#ibcon#read 4, iclass 30, count 0 2006.229.06:00:33.67#ibcon#about to read 5, iclass 30, count 0 2006.229.06:00:33.67#ibcon#read 5, iclass 30, count 0 2006.229.06:00:33.67#ibcon#about to read 6, iclass 30, count 0 2006.229.06:00:33.67#ibcon#read 6, iclass 30, count 0 2006.229.06:00:33.67#ibcon#end of sib2, iclass 30, count 0 2006.229.06:00:33.67#ibcon#*after write, iclass 30, count 0 2006.229.06:00:33.67#ibcon#*before return 0, iclass 30, count 0 2006.229.06:00:33.67#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:33.67#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:00:33.67#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:00:33.67#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:00:33.67$vck44/vblo=6,719.99 2006.229.06:00:33.67#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.06:00:33.67#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.06:00:33.67#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:33.67#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:33.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:33.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:33.67#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:00:33.67#ibcon#first serial, iclass 32, count 0 2006.229.06:00:33.67#ibcon#enter sib2, iclass 32, count 0 2006.229.06:00:33.67#ibcon#flushed, iclass 32, count 0 2006.229.06:00:33.67#ibcon#about to write, iclass 32, count 0 2006.229.06:00:33.67#ibcon#wrote, iclass 32, count 0 2006.229.06:00:33.67#ibcon#about to read 3, iclass 32, count 0 2006.229.06:00:33.69#ibcon#read 3, iclass 32, count 0 2006.229.06:00:33.69#ibcon#about to read 4, iclass 32, count 0 2006.229.06:00:33.69#ibcon#read 4, iclass 32, count 0 2006.229.06:00:33.69#ibcon#about to read 5, iclass 32, count 0 2006.229.06:00:33.69#ibcon#read 5, iclass 32, count 0 2006.229.06:00:33.69#ibcon#about to read 6, iclass 32, count 0 2006.229.06:00:33.69#ibcon#read 6, iclass 32, count 0 2006.229.06:00:33.69#ibcon#end of sib2, iclass 32, count 0 2006.229.06:00:33.69#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:00:33.69#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:00:33.69#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:00:33.69#ibcon#*before write, iclass 32, count 0 2006.229.06:00:33.69#ibcon#enter sib2, iclass 32, count 0 2006.229.06:00:33.69#ibcon#flushed, iclass 32, count 0 2006.229.06:00:33.69#ibcon#about to write, iclass 32, count 0 2006.229.06:00:33.69#ibcon#wrote, iclass 32, count 0 2006.229.06:00:33.69#ibcon#about to read 3, iclass 32, count 0 2006.229.06:00:33.73#ibcon#read 3, iclass 32, count 0 2006.229.06:00:33.73#ibcon#about to read 4, iclass 32, count 0 2006.229.06:00:33.73#ibcon#read 4, iclass 32, count 0 2006.229.06:00:33.73#ibcon#about to read 5, iclass 32, count 0 2006.229.06:00:33.73#ibcon#read 5, iclass 32, count 0 2006.229.06:00:33.73#ibcon#about to read 6, iclass 32, count 0 2006.229.06:00:33.73#ibcon#read 6, iclass 32, count 0 2006.229.06:00:33.73#ibcon#end of sib2, iclass 32, count 0 2006.229.06:00:33.73#ibcon#*after write, iclass 32, count 0 2006.229.06:00:33.73#ibcon#*before return 0, iclass 32, count 0 2006.229.06:00:33.73#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:33.73#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:00:33.73#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:00:33.73#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:00:33.73$vck44/vb=6,4 2006.229.06:00:33.73#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:00:33.73#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:00:33.73#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:33.73#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:33.79#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:33.79#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:33.79#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:00:33.79#ibcon#first serial, iclass 34, count 2 2006.229.06:00:33.79#ibcon#enter sib2, iclass 34, count 2 2006.229.06:00:33.79#ibcon#flushed, iclass 34, count 2 2006.229.06:00:33.79#ibcon#about to write, iclass 34, count 2 2006.229.06:00:33.79#ibcon#wrote, iclass 34, count 2 2006.229.06:00:33.79#ibcon#about to read 3, iclass 34, count 2 2006.229.06:00:33.81#ibcon#read 3, iclass 34, count 2 2006.229.06:00:33.81#ibcon#about to read 4, iclass 34, count 2 2006.229.06:00:33.81#ibcon#read 4, iclass 34, count 2 2006.229.06:00:33.81#ibcon#about to read 5, iclass 34, count 2 2006.229.06:00:33.81#ibcon#read 5, iclass 34, count 2 2006.229.06:00:33.81#ibcon#about to read 6, iclass 34, count 2 2006.229.06:00:33.81#ibcon#read 6, iclass 34, count 2 2006.229.06:00:33.81#ibcon#end of sib2, iclass 34, count 2 2006.229.06:00:33.81#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:00:33.81#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:00:33.81#ibcon#[27=AT06-04\r\n] 2006.229.06:00:33.81#ibcon#*before write, iclass 34, count 2 2006.229.06:00:33.81#ibcon#enter sib2, iclass 34, count 2 2006.229.06:00:33.81#ibcon#flushed, iclass 34, count 2 2006.229.06:00:33.81#ibcon#about to write, iclass 34, count 2 2006.229.06:00:33.81#ibcon#wrote, iclass 34, count 2 2006.229.06:00:33.81#ibcon#about to read 3, iclass 34, count 2 2006.229.06:00:33.84#ibcon#read 3, iclass 34, count 2 2006.229.06:00:33.84#ibcon#about to read 4, iclass 34, count 2 2006.229.06:00:33.84#ibcon#read 4, iclass 34, count 2 2006.229.06:00:33.84#ibcon#about to read 5, iclass 34, count 2 2006.229.06:00:33.84#ibcon#read 5, iclass 34, count 2 2006.229.06:00:33.84#ibcon#about to read 6, iclass 34, count 2 2006.229.06:00:33.84#ibcon#read 6, iclass 34, count 2 2006.229.06:00:33.84#ibcon#end of sib2, iclass 34, count 2 2006.229.06:00:33.84#ibcon#*after write, iclass 34, count 2 2006.229.06:00:33.84#ibcon#*before return 0, iclass 34, count 2 2006.229.06:00:33.84#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:33.84#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:00:33.84#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:00:33.84#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:33.84#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:33.96#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:33.96#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:33.96#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:00:33.96#ibcon#first serial, iclass 34, count 0 2006.229.06:00:33.96#ibcon#enter sib2, iclass 34, count 0 2006.229.06:00:33.96#ibcon#flushed, iclass 34, count 0 2006.229.06:00:33.96#ibcon#about to write, iclass 34, count 0 2006.229.06:00:33.96#ibcon#wrote, iclass 34, count 0 2006.229.06:00:33.96#ibcon#about to read 3, iclass 34, count 0 2006.229.06:00:33.98#ibcon#read 3, iclass 34, count 0 2006.229.06:00:33.98#ibcon#about to read 4, iclass 34, count 0 2006.229.06:00:33.98#ibcon#read 4, iclass 34, count 0 2006.229.06:00:33.98#ibcon#about to read 5, iclass 34, count 0 2006.229.06:00:33.98#ibcon#read 5, iclass 34, count 0 2006.229.06:00:33.98#ibcon#about to read 6, iclass 34, count 0 2006.229.06:00:33.98#ibcon#read 6, iclass 34, count 0 2006.229.06:00:33.98#ibcon#end of sib2, iclass 34, count 0 2006.229.06:00:33.98#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:00:33.98#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:00:33.98#ibcon#[27=USB\r\n] 2006.229.06:00:33.98#ibcon#*before write, iclass 34, count 0 2006.229.06:00:33.98#ibcon#enter sib2, iclass 34, count 0 2006.229.06:00:33.98#ibcon#flushed, iclass 34, count 0 2006.229.06:00:33.98#ibcon#about to write, iclass 34, count 0 2006.229.06:00:33.98#ibcon#wrote, iclass 34, count 0 2006.229.06:00:33.98#ibcon#about to read 3, iclass 34, count 0 2006.229.06:00:34.01#ibcon#read 3, iclass 34, count 0 2006.229.06:00:34.01#ibcon#about to read 4, iclass 34, count 0 2006.229.06:00:34.01#ibcon#read 4, iclass 34, count 0 2006.229.06:00:34.01#ibcon#about to read 5, iclass 34, count 0 2006.229.06:00:34.01#ibcon#read 5, iclass 34, count 0 2006.229.06:00:34.01#ibcon#about to read 6, iclass 34, count 0 2006.229.06:00:34.01#ibcon#read 6, iclass 34, count 0 2006.229.06:00:34.01#ibcon#end of sib2, iclass 34, count 0 2006.229.06:00:34.01#ibcon#*after write, iclass 34, count 0 2006.229.06:00:34.01#ibcon#*before return 0, iclass 34, count 0 2006.229.06:00:34.01#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:34.01#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:00:34.01#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:00:34.01#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:00:34.01$vck44/vblo=7,734.99 2006.229.06:00:34.01#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.06:00:34.01#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.06:00:34.01#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:34.01#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:34.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:34.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:34.01#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:00:34.01#ibcon#first serial, iclass 36, count 0 2006.229.06:00:34.01#ibcon#enter sib2, iclass 36, count 0 2006.229.06:00:34.01#ibcon#flushed, iclass 36, count 0 2006.229.06:00:34.01#ibcon#about to write, iclass 36, count 0 2006.229.06:00:34.01#ibcon#wrote, iclass 36, count 0 2006.229.06:00:34.01#ibcon#about to read 3, iclass 36, count 0 2006.229.06:00:34.03#ibcon#read 3, iclass 36, count 0 2006.229.06:00:34.03#ibcon#about to read 4, iclass 36, count 0 2006.229.06:00:34.03#ibcon#read 4, iclass 36, count 0 2006.229.06:00:34.03#ibcon#about to read 5, iclass 36, count 0 2006.229.06:00:34.03#ibcon#read 5, iclass 36, count 0 2006.229.06:00:34.03#ibcon#about to read 6, iclass 36, count 0 2006.229.06:00:34.03#ibcon#read 6, iclass 36, count 0 2006.229.06:00:34.03#ibcon#end of sib2, iclass 36, count 0 2006.229.06:00:34.03#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:00:34.03#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:00:34.03#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:00:34.03#ibcon#*before write, iclass 36, count 0 2006.229.06:00:34.03#ibcon#enter sib2, iclass 36, count 0 2006.229.06:00:34.03#ibcon#flushed, iclass 36, count 0 2006.229.06:00:34.03#ibcon#about to write, iclass 36, count 0 2006.229.06:00:34.03#ibcon#wrote, iclass 36, count 0 2006.229.06:00:34.03#ibcon#about to read 3, iclass 36, count 0 2006.229.06:00:34.07#ibcon#read 3, iclass 36, count 0 2006.229.06:00:34.07#ibcon#about to read 4, iclass 36, count 0 2006.229.06:00:34.07#ibcon#read 4, iclass 36, count 0 2006.229.06:00:34.07#ibcon#about to read 5, iclass 36, count 0 2006.229.06:00:34.07#ibcon#read 5, iclass 36, count 0 2006.229.06:00:34.07#ibcon#about to read 6, iclass 36, count 0 2006.229.06:00:34.07#ibcon#read 6, iclass 36, count 0 2006.229.06:00:34.07#ibcon#end of sib2, iclass 36, count 0 2006.229.06:00:34.07#ibcon#*after write, iclass 36, count 0 2006.229.06:00:34.07#ibcon#*before return 0, iclass 36, count 0 2006.229.06:00:34.07#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:34.07#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:00:34.07#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:00:34.07#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:00:34.07$vck44/vb=7,4 2006.229.06:00:34.07#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.06:00:34.07#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.06:00:34.07#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:34.07#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:34.13#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:34.13#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:34.13#ibcon#enter wrdev, iclass 38, count 2 2006.229.06:00:34.13#ibcon#first serial, iclass 38, count 2 2006.229.06:00:34.13#ibcon#enter sib2, iclass 38, count 2 2006.229.06:00:34.13#ibcon#flushed, iclass 38, count 2 2006.229.06:00:34.13#ibcon#about to write, iclass 38, count 2 2006.229.06:00:34.13#ibcon#wrote, iclass 38, count 2 2006.229.06:00:34.13#ibcon#about to read 3, iclass 38, count 2 2006.229.06:00:34.15#ibcon#read 3, iclass 38, count 2 2006.229.06:00:34.15#ibcon#about to read 4, iclass 38, count 2 2006.229.06:00:34.15#ibcon#read 4, iclass 38, count 2 2006.229.06:00:34.15#ibcon#about to read 5, iclass 38, count 2 2006.229.06:00:34.15#ibcon#read 5, iclass 38, count 2 2006.229.06:00:34.15#ibcon#about to read 6, iclass 38, count 2 2006.229.06:00:34.15#ibcon#read 6, iclass 38, count 2 2006.229.06:00:34.15#ibcon#end of sib2, iclass 38, count 2 2006.229.06:00:34.15#ibcon#*mode == 0, iclass 38, count 2 2006.229.06:00:34.15#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.06:00:34.15#ibcon#[27=AT07-04\r\n] 2006.229.06:00:34.15#ibcon#*before write, iclass 38, count 2 2006.229.06:00:34.15#ibcon#enter sib2, iclass 38, count 2 2006.229.06:00:34.15#ibcon#flushed, iclass 38, count 2 2006.229.06:00:34.15#ibcon#about to write, iclass 38, count 2 2006.229.06:00:34.15#ibcon#wrote, iclass 38, count 2 2006.229.06:00:34.15#ibcon#about to read 3, iclass 38, count 2 2006.229.06:00:34.18#ibcon#read 3, iclass 38, count 2 2006.229.06:00:34.18#ibcon#about to read 4, iclass 38, count 2 2006.229.06:00:34.18#ibcon#read 4, iclass 38, count 2 2006.229.06:00:34.18#ibcon#about to read 5, iclass 38, count 2 2006.229.06:00:34.18#ibcon#read 5, iclass 38, count 2 2006.229.06:00:34.18#ibcon#about to read 6, iclass 38, count 2 2006.229.06:00:34.18#ibcon#read 6, iclass 38, count 2 2006.229.06:00:34.18#ibcon#end of sib2, iclass 38, count 2 2006.229.06:00:34.18#ibcon#*after write, iclass 38, count 2 2006.229.06:00:34.18#ibcon#*before return 0, iclass 38, count 2 2006.229.06:00:34.18#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:34.18#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:00:34.18#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.06:00:34.18#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:34.18#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:34.30#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:34.30#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:34.30#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:00:34.30#ibcon#first serial, iclass 38, count 0 2006.229.06:00:34.30#ibcon#enter sib2, iclass 38, count 0 2006.229.06:00:34.30#ibcon#flushed, iclass 38, count 0 2006.229.06:00:34.30#ibcon#about to write, iclass 38, count 0 2006.229.06:00:34.30#ibcon#wrote, iclass 38, count 0 2006.229.06:00:34.30#ibcon#about to read 3, iclass 38, count 0 2006.229.06:00:34.32#ibcon#read 3, iclass 38, count 0 2006.229.06:00:34.32#ibcon#about to read 4, iclass 38, count 0 2006.229.06:00:34.32#ibcon#read 4, iclass 38, count 0 2006.229.06:00:34.32#ibcon#about to read 5, iclass 38, count 0 2006.229.06:00:34.32#ibcon#read 5, iclass 38, count 0 2006.229.06:00:34.32#ibcon#about to read 6, iclass 38, count 0 2006.229.06:00:34.32#ibcon#read 6, iclass 38, count 0 2006.229.06:00:34.32#ibcon#end of sib2, iclass 38, count 0 2006.229.06:00:34.32#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:00:34.32#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:00:34.32#ibcon#[27=USB\r\n] 2006.229.06:00:34.32#ibcon#*before write, iclass 38, count 0 2006.229.06:00:34.32#ibcon#enter sib2, iclass 38, count 0 2006.229.06:00:34.32#ibcon#flushed, iclass 38, count 0 2006.229.06:00:34.32#ibcon#about to write, iclass 38, count 0 2006.229.06:00:34.32#ibcon#wrote, iclass 38, count 0 2006.229.06:00:34.32#ibcon#about to read 3, iclass 38, count 0 2006.229.06:00:34.35#ibcon#read 3, iclass 38, count 0 2006.229.06:00:34.35#ibcon#about to read 4, iclass 38, count 0 2006.229.06:00:34.35#ibcon#read 4, iclass 38, count 0 2006.229.06:00:34.35#ibcon#about to read 5, iclass 38, count 0 2006.229.06:00:34.35#ibcon#read 5, iclass 38, count 0 2006.229.06:00:34.35#ibcon#about to read 6, iclass 38, count 0 2006.229.06:00:34.35#ibcon#read 6, iclass 38, count 0 2006.229.06:00:34.35#ibcon#end of sib2, iclass 38, count 0 2006.229.06:00:34.35#ibcon#*after write, iclass 38, count 0 2006.229.06:00:34.35#ibcon#*before return 0, iclass 38, count 0 2006.229.06:00:34.35#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:34.35#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:00:34.35#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:00:34.35#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:00:34.35$vck44/vblo=8,744.99 2006.229.06:00:34.35#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.06:00:34.35#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.06:00:34.35#ibcon#ireg 17 cls_cnt 0 2006.229.06:00:34.35#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:34.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:34.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:34.35#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:00:34.35#ibcon#first serial, iclass 40, count 0 2006.229.06:00:34.35#ibcon#enter sib2, iclass 40, count 0 2006.229.06:00:34.35#ibcon#flushed, iclass 40, count 0 2006.229.06:00:34.35#ibcon#about to write, iclass 40, count 0 2006.229.06:00:34.35#ibcon#wrote, iclass 40, count 0 2006.229.06:00:34.35#ibcon#about to read 3, iclass 40, count 0 2006.229.06:00:34.37#ibcon#read 3, iclass 40, count 0 2006.229.06:00:34.37#ibcon#about to read 4, iclass 40, count 0 2006.229.06:00:34.37#ibcon#read 4, iclass 40, count 0 2006.229.06:00:34.37#ibcon#about to read 5, iclass 40, count 0 2006.229.06:00:34.37#ibcon#read 5, iclass 40, count 0 2006.229.06:00:34.37#ibcon#about to read 6, iclass 40, count 0 2006.229.06:00:34.37#ibcon#read 6, iclass 40, count 0 2006.229.06:00:34.37#ibcon#end of sib2, iclass 40, count 0 2006.229.06:00:34.37#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:00:34.37#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:00:34.37#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:00:34.37#ibcon#*before write, iclass 40, count 0 2006.229.06:00:34.37#ibcon#enter sib2, iclass 40, count 0 2006.229.06:00:34.37#ibcon#flushed, iclass 40, count 0 2006.229.06:00:34.37#ibcon#about to write, iclass 40, count 0 2006.229.06:00:34.37#ibcon#wrote, iclass 40, count 0 2006.229.06:00:34.37#ibcon#about to read 3, iclass 40, count 0 2006.229.06:00:34.41#ibcon#read 3, iclass 40, count 0 2006.229.06:00:34.41#ibcon#about to read 4, iclass 40, count 0 2006.229.06:00:34.41#ibcon#read 4, iclass 40, count 0 2006.229.06:00:34.41#ibcon#about to read 5, iclass 40, count 0 2006.229.06:00:34.41#ibcon#read 5, iclass 40, count 0 2006.229.06:00:34.41#ibcon#about to read 6, iclass 40, count 0 2006.229.06:00:34.41#ibcon#read 6, iclass 40, count 0 2006.229.06:00:34.41#ibcon#end of sib2, iclass 40, count 0 2006.229.06:00:34.41#ibcon#*after write, iclass 40, count 0 2006.229.06:00:34.41#ibcon#*before return 0, iclass 40, count 0 2006.229.06:00:34.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:34.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:00:34.41#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:00:34.41#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:00:34.41$vck44/vb=8,4 2006.229.06:00:34.41#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.06:00:34.41#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.06:00:34.41#ibcon#ireg 11 cls_cnt 2 2006.229.06:00:34.41#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:34.47#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:34.47#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:34.47#ibcon#enter wrdev, iclass 4, count 2 2006.229.06:00:34.47#ibcon#first serial, iclass 4, count 2 2006.229.06:00:34.47#ibcon#enter sib2, iclass 4, count 2 2006.229.06:00:34.47#ibcon#flushed, iclass 4, count 2 2006.229.06:00:34.47#ibcon#about to write, iclass 4, count 2 2006.229.06:00:34.47#ibcon#wrote, iclass 4, count 2 2006.229.06:00:34.47#ibcon#about to read 3, iclass 4, count 2 2006.229.06:00:34.49#ibcon#read 3, iclass 4, count 2 2006.229.06:00:34.49#ibcon#about to read 4, iclass 4, count 2 2006.229.06:00:34.49#ibcon#read 4, iclass 4, count 2 2006.229.06:00:34.49#ibcon#about to read 5, iclass 4, count 2 2006.229.06:00:34.49#ibcon#read 5, iclass 4, count 2 2006.229.06:00:34.49#ibcon#about to read 6, iclass 4, count 2 2006.229.06:00:34.49#ibcon#read 6, iclass 4, count 2 2006.229.06:00:34.49#ibcon#end of sib2, iclass 4, count 2 2006.229.06:00:34.49#ibcon#*mode == 0, iclass 4, count 2 2006.229.06:00:34.49#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.06:00:34.49#ibcon#[27=AT08-04\r\n] 2006.229.06:00:34.49#ibcon#*before write, iclass 4, count 2 2006.229.06:00:34.49#ibcon#enter sib2, iclass 4, count 2 2006.229.06:00:34.49#ibcon#flushed, iclass 4, count 2 2006.229.06:00:34.49#ibcon#about to write, iclass 4, count 2 2006.229.06:00:34.49#ibcon#wrote, iclass 4, count 2 2006.229.06:00:34.49#ibcon#about to read 3, iclass 4, count 2 2006.229.06:00:34.52#ibcon#read 3, iclass 4, count 2 2006.229.06:00:34.52#ibcon#about to read 4, iclass 4, count 2 2006.229.06:00:34.52#ibcon#read 4, iclass 4, count 2 2006.229.06:00:34.52#ibcon#about to read 5, iclass 4, count 2 2006.229.06:00:34.52#ibcon#read 5, iclass 4, count 2 2006.229.06:00:34.52#ibcon#about to read 6, iclass 4, count 2 2006.229.06:00:34.52#ibcon#read 6, iclass 4, count 2 2006.229.06:00:34.52#ibcon#end of sib2, iclass 4, count 2 2006.229.06:00:34.52#ibcon#*after write, iclass 4, count 2 2006.229.06:00:34.52#ibcon#*before return 0, iclass 4, count 2 2006.229.06:00:34.52#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:34.52#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:00:34.52#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.06:00:34.52#ibcon#ireg 7 cls_cnt 0 2006.229.06:00:34.52#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:34.64#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:34.64#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:34.64#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:00:34.64#ibcon#first serial, iclass 4, count 0 2006.229.06:00:34.64#ibcon#enter sib2, iclass 4, count 0 2006.229.06:00:34.64#ibcon#flushed, iclass 4, count 0 2006.229.06:00:34.64#ibcon#about to write, iclass 4, count 0 2006.229.06:00:34.64#ibcon#wrote, iclass 4, count 0 2006.229.06:00:34.64#ibcon#about to read 3, iclass 4, count 0 2006.229.06:00:34.66#ibcon#read 3, iclass 4, count 0 2006.229.06:00:34.66#ibcon#about to read 4, iclass 4, count 0 2006.229.06:00:34.66#ibcon#read 4, iclass 4, count 0 2006.229.06:00:34.66#ibcon#about to read 5, iclass 4, count 0 2006.229.06:00:34.66#ibcon#read 5, iclass 4, count 0 2006.229.06:00:34.66#ibcon#about to read 6, iclass 4, count 0 2006.229.06:00:34.66#ibcon#read 6, iclass 4, count 0 2006.229.06:00:34.66#ibcon#end of sib2, iclass 4, count 0 2006.229.06:00:34.66#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:00:34.66#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:00:34.66#ibcon#[27=USB\r\n] 2006.229.06:00:34.66#ibcon#*before write, iclass 4, count 0 2006.229.06:00:34.66#ibcon#enter sib2, iclass 4, count 0 2006.229.06:00:34.66#ibcon#flushed, iclass 4, count 0 2006.229.06:00:34.66#ibcon#about to write, iclass 4, count 0 2006.229.06:00:34.66#ibcon#wrote, iclass 4, count 0 2006.229.06:00:34.66#ibcon#about to read 3, iclass 4, count 0 2006.229.06:00:34.69#ibcon#read 3, iclass 4, count 0 2006.229.06:00:34.69#ibcon#about to read 4, iclass 4, count 0 2006.229.06:00:34.69#ibcon#read 4, iclass 4, count 0 2006.229.06:00:34.69#ibcon#about to read 5, iclass 4, count 0 2006.229.06:00:34.69#ibcon#read 5, iclass 4, count 0 2006.229.06:00:34.69#ibcon#about to read 6, iclass 4, count 0 2006.229.06:00:34.69#ibcon#read 6, iclass 4, count 0 2006.229.06:00:34.69#ibcon#end of sib2, iclass 4, count 0 2006.229.06:00:34.69#ibcon#*after write, iclass 4, count 0 2006.229.06:00:34.69#ibcon#*before return 0, iclass 4, count 0 2006.229.06:00:34.69#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:34.69#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:00:34.69#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:00:34.69#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:00:34.69$vck44/vabw=wide 2006.229.06:00:34.69#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:00:34.69#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:00:34.69#ibcon#ireg 8 cls_cnt 0 2006.229.06:00:34.69#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:34.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:34.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:34.69#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:00:34.69#ibcon#first serial, iclass 6, count 0 2006.229.06:00:34.69#ibcon#enter sib2, iclass 6, count 0 2006.229.06:00:34.69#ibcon#flushed, iclass 6, count 0 2006.229.06:00:34.69#ibcon#about to write, iclass 6, count 0 2006.229.06:00:34.69#ibcon#wrote, iclass 6, count 0 2006.229.06:00:34.69#ibcon#about to read 3, iclass 6, count 0 2006.229.06:00:34.71#ibcon#read 3, iclass 6, count 0 2006.229.06:00:34.71#ibcon#about to read 4, iclass 6, count 0 2006.229.06:00:34.71#ibcon#read 4, iclass 6, count 0 2006.229.06:00:34.71#ibcon#about to read 5, iclass 6, count 0 2006.229.06:00:34.71#ibcon#read 5, iclass 6, count 0 2006.229.06:00:34.71#ibcon#about to read 6, iclass 6, count 0 2006.229.06:00:34.71#ibcon#read 6, iclass 6, count 0 2006.229.06:00:34.71#ibcon#end of sib2, iclass 6, count 0 2006.229.06:00:34.71#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:00:34.71#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:00:34.71#ibcon#[25=BW32\r\n] 2006.229.06:00:34.71#ibcon#*before write, iclass 6, count 0 2006.229.06:00:34.71#ibcon#enter sib2, iclass 6, count 0 2006.229.06:00:34.71#ibcon#flushed, iclass 6, count 0 2006.229.06:00:34.71#ibcon#about to write, iclass 6, count 0 2006.229.06:00:34.71#ibcon#wrote, iclass 6, count 0 2006.229.06:00:34.71#ibcon#about to read 3, iclass 6, count 0 2006.229.06:00:34.74#ibcon#read 3, iclass 6, count 0 2006.229.06:00:34.74#ibcon#about to read 4, iclass 6, count 0 2006.229.06:00:34.74#ibcon#read 4, iclass 6, count 0 2006.229.06:00:34.74#ibcon#about to read 5, iclass 6, count 0 2006.229.06:00:34.74#ibcon#read 5, iclass 6, count 0 2006.229.06:00:34.74#ibcon#about to read 6, iclass 6, count 0 2006.229.06:00:34.74#ibcon#read 6, iclass 6, count 0 2006.229.06:00:34.74#ibcon#end of sib2, iclass 6, count 0 2006.229.06:00:34.74#ibcon#*after write, iclass 6, count 0 2006.229.06:00:34.74#ibcon#*before return 0, iclass 6, count 0 2006.229.06:00:34.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:34.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:00:34.74#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:00:34.74#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:00:34.74$vck44/vbbw=wide 2006.229.06:00:34.74#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.06:00:34.74#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.06:00:34.74#ibcon#ireg 8 cls_cnt 0 2006.229.06:00:34.74#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:00:34.81#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:00:34.81#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:00:34.81#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:00:34.81#ibcon#first serial, iclass 10, count 0 2006.229.06:00:34.81#ibcon#enter sib2, iclass 10, count 0 2006.229.06:00:34.81#ibcon#flushed, iclass 10, count 0 2006.229.06:00:34.81#ibcon#about to write, iclass 10, count 0 2006.229.06:00:34.81#ibcon#wrote, iclass 10, count 0 2006.229.06:00:34.81#ibcon#about to read 3, iclass 10, count 0 2006.229.06:00:34.83#ibcon#read 3, iclass 10, count 0 2006.229.06:00:34.83#ibcon#about to read 4, iclass 10, count 0 2006.229.06:00:34.83#ibcon#read 4, iclass 10, count 0 2006.229.06:00:34.83#ibcon#about to read 5, iclass 10, count 0 2006.229.06:00:34.83#ibcon#read 5, iclass 10, count 0 2006.229.06:00:34.83#ibcon#about to read 6, iclass 10, count 0 2006.229.06:00:34.83#ibcon#read 6, iclass 10, count 0 2006.229.06:00:34.83#ibcon#end of sib2, iclass 10, count 0 2006.229.06:00:34.83#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:00:34.83#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:00:34.83#ibcon#[27=BW32\r\n] 2006.229.06:00:34.83#ibcon#*before write, iclass 10, count 0 2006.229.06:00:34.83#ibcon#enter sib2, iclass 10, count 0 2006.229.06:00:34.83#ibcon#flushed, iclass 10, count 0 2006.229.06:00:34.83#ibcon#about to write, iclass 10, count 0 2006.229.06:00:34.83#ibcon#wrote, iclass 10, count 0 2006.229.06:00:34.83#ibcon#about to read 3, iclass 10, count 0 2006.229.06:00:34.86#ibcon#read 3, iclass 10, count 0 2006.229.06:00:34.86#ibcon#about to read 4, iclass 10, count 0 2006.229.06:00:34.86#ibcon#read 4, iclass 10, count 0 2006.229.06:00:34.86#ibcon#about to read 5, iclass 10, count 0 2006.229.06:00:34.86#ibcon#read 5, iclass 10, count 0 2006.229.06:00:34.86#ibcon#about to read 6, iclass 10, count 0 2006.229.06:00:34.86#ibcon#read 6, iclass 10, count 0 2006.229.06:00:34.86#ibcon#end of sib2, iclass 10, count 0 2006.229.06:00:34.86#ibcon#*after write, iclass 10, count 0 2006.229.06:00:34.86#ibcon#*before return 0, iclass 10, count 0 2006.229.06:00:34.86#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:00:34.86#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:00:34.86#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:00:34.86#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:00:34.86$setupk4/ifdk4 2006.229.06:00:34.86$ifdk4/lo= 2006.229.06:00:34.86$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:00:34.86$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:00:34.86$ifdk4/patch= 2006.229.06:00:34.86$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:00:34.86$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:00:34.86$setupk4/!*+20s 2006.229.06:00:39.46#abcon#<5=/04 2.4 4.4 30.63 92 999.3\r\n> 2006.229.06:00:39.48#abcon#{5=INTERFACE CLEAR} 2006.229.06:00:39.54#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:00:49.37$setupk4/"tpicd 2006.229.06:00:49.37$setupk4/echo=off 2006.229.06:00:49.37$setupk4/xlog=off 2006.229.06:00:49.37:!2006.229.06:03:42 2006.229.06:01:01.14#trakl#Source acquired 2006.229.06:01:03.14#flagr#flagr/antenna,acquired 2006.229.06:03:42.00:preob 2006.229.06:03:43.14/onsource/TRACKING 2006.229.06:03:43.14:!2006.229.06:03:52 2006.229.06:03:52.00:"tape 2006.229.06:03:52.00:"st=record 2006.229.06:03:52.00:data_valid=on 2006.229.06:03:52.00:midob 2006.229.06:03:52.14/onsource/TRACKING 2006.229.06:03:52.14/wx/30.62,999.3,91 2006.229.06:03:52.35/cable/+6.3990E-03 2006.229.06:03:53.44/va/01,08,usb,yes,31,33 2006.229.06:03:53.44/va/02,07,usb,yes,34,34 2006.229.06:03:53.44/va/03,06,usb,yes,41,44 2006.229.06:03:53.44/va/04,07,usb,yes,34,36 2006.229.06:03:53.44/va/05,04,usb,yes,31,31 2006.229.06:03:53.44/va/06,04,usb,yes,34,34 2006.229.06:03:53.44/va/07,05,usb,yes,30,31 2006.229.06:03:53.44/va/08,06,usb,yes,22,27 2006.229.06:03:53.67/valo/01,524.99,yes,locked 2006.229.06:03:53.67/valo/02,534.99,yes,locked 2006.229.06:03:53.67/valo/03,564.99,yes,locked 2006.229.06:03:53.67/valo/04,624.99,yes,locked 2006.229.06:03:53.67/valo/05,734.99,yes,locked 2006.229.06:03:53.67/valo/06,814.99,yes,locked 2006.229.06:03:53.67/valo/07,864.99,yes,locked 2006.229.06:03:53.67/valo/08,884.99,yes,locked 2006.229.06:03:54.76/vb/01,04,usb,yes,38,35 2006.229.06:03:54.76/vb/02,04,usb,yes,41,41 2006.229.06:03:54.76/vb/03,04,usb,yes,37,41 2006.229.06:03:54.76/vb/04,04,usb,yes,42,41 2006.229.06:03:54.76/vb/05,04,usb,yes,33,36 2006.229.06:03:54.76/vb/06,04,usb,yes,39,34 2006.229.06:03:54.76/vb/07,04,usb,yes,38,38 2006.229.06:03:54.76/vb/08,04,usb,yes,35,39 2006.229.06:03:54.99/vblo/01,629.99,yes,locked 2006.229.06:03:54.99/vblo/02,634.99,yes,locked 2006.229.06:03:54.99/vblo/03,649.99,yes,locked 2006.229.06:03:54.99/vblo/04,679.99,yes,locked 2006.229.06:03:54.99/vblo/05,709.99,yes,locked 2006.229.06:03:54.99/vblo/06,719.99,yes,locked 2006.229.06:03:54.99/vblo/07,734.99,yes,locked 2006.229.06:03:54.99/vblo/08,744.99,yes,locked 2006.229.06:03:55.14/vabw/8 2006.229.06:03:55.29/vbbw/8 2006.229.06:03:55.38/xfe/off,on,12.0 2006.229.06:03:55.75/ifatt/23,28,28,28 2006.229.06:03:56.08/fmout-gps/S +4.46E-07 2006.229.06:03:56.12:!2006.229.06:05:42 2006.229.06:05:42.00:data_valid=off 2006.229.06:05:42.00:"et 2006.229.06:05:42.00:!+3s 2006.229.06:05:45.01:"tape 2006.229.06:05:45.01:postob 2006.229.06:05:45.07/cable/+6.3983E-03 2006.229.06:05:45.07/wx/30.60,999.3,91 2006.229.06:05:46.08/fmout-gps/S +4.46E-07 2006.229.06:05:46.08:scan_name=229-0611,jd0608,90 2006.229.06:05:46.08:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.06:05:47.14#flagr#flagr/antenna,new-source 2006.229.06:05:47.14:checkk5 2006.229.06:05:47.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:05:47.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:05:48.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:05:48.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:05:49.17/chk_obsdata//k5ts1/T2290603??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:05:49.56/chk_obsdata//k5ts2/T2290603??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:05:49.95/chk_obsdata//k5ts3/T2290603??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:05:50.35/chk_obsdata//k5ts4/T2290603??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:05:51.07/k5log//k5ts1_log_newline 2006.229.06:05:51.74/k5log//k5ts2_log_newline 2006.229.06:05:52.43/k5log//k5ts3_log_newline 2006.229.06:05:53.15/k5log//k5ts4_log_newline 2006.229.06:05:53.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:05:53.18:setupk4=1 2006.229.06:05:53.18$setupk4/echo=on 2006.229.06:05:53.18$setupk4/pcalon 2006.229.06:05:53.18$pcalon/"no phase cal control is implemented here 2006.229.06:05:53.18$setupk4/"tpicd=stop 2006.229.06:05:53.18$setupk4/"rec=synch_on 2006.229.06:05:53.18$setupk4/"rec_mode=128 2006.229.06:05:53.18$setupk4/!* 2006.229.06:05:53.18$setupk4/recpk4 2006.229.06:05:53.18$recpk4/recpatch= 2006.229.06:05:53.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:05:53.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:05:53.18$setupk4/vck44 2006.229.06:05:53.18$vck44/valo=1,524.99 2006.229.06:05:53.18#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:05:53.18#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:05:53.18#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:53.18#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:53.18#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:53.18#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:53.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:05:53.18#ibcon#first serial, iclass 31, count 0 2006.229.06:05:53.18#ibcon#enter sib2, iclass 31, count 0 2006.229.06:05:53.18#ibcon#flushed, iclass 31, count 0 2006.229.06:05:53.18#ibcon#about to write, iclass 31, count 0 2006.229.06:05:53.18#ibcon#wrote, iclass 31, count 0 2006.229.06:05:53.18#ibcon#about to read 3, iclass 31, count 0 2006.229.06:05:53.20#ibcon#read 3, iclass 31, count 0 2006.229.06:05:53.20#ibcon#about to read 4, iclass 31, count 0 2006.229.06:05:53.20#ibcon#read 4, iclass 31, count 0 2006.229.06:05:53.20#ibcon#about to read 5, iclass 31, count 0 2006.229.06:05:53.20#ibcon#read 5, iclass 31, count 0 2006.229.06:05:53.20#ibcon#about to read 6, iclass 31, count 0 2006.229.06:05:53.20#ibcon#read 6, iclass 31, count 0 2006.229.06:05:53.20#ibcon#end of sib2, iclass 31, count 0 2006.229.06:05:53.20#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:05:53.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:05:53.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:05:53.20#ibcon#*before write, iclass 31, count 0 2006.229.06:05:53.20#ibcon#enter sib2, iclass 31, count 0 2006.229.06:05:53.20#ibcon#flushed, iclass 31, count 0 2006.229.06:05:53.20#ibcon#about to write, iclass 31, count 0 2006.229.06:05:53.20#ibcon#wrote, iclass 31, count 0 2006.229.06:05:53.20#ibcon#about to read 3, iclass 31, count 0 2006.229.06:05:53.25#ibcon#read 3, iclass 31, count 0 2006.229.06:05:53.25#ibcon#about to read 4, iclass 31, count 0 2006.229.06:05:53.25#ibcon#read 4, iclass 31, count 0 2006.229.06:05:53.25#ibcon#about to read 5, iclass 31, count 0 2006.229.06:05:53.25#ibcon#read 5, iclass 31, count 0 2006.229.06:05:53.25#ibcon#about to read 6, iclass 31, count 0 2006.229.06:05:53.25#ibcon#read 6, iclass 31, count 0 2006.229.06:05:53.25#ibcon#end of sib2, iclass 31, count 0 2006.229.06:05:53.25#ibcon#*after write, iclass 31, count 0 2006.229.06:05:53.25#ibcon#*before return 0, iclass 31, count 0 2006.229.06:05:53.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:53.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:53.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:05:53.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:05:53.25$vck44/va=1,8 2006.229.06:05:53.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.06:05:53.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.06:05:53.25#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:53.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:53.25#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:53.25#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:53.25#ibcon#enter wrdev, iclass 33, count 2 2006.229.06:05:53.25#ibcon#first serial, iclass 33, count 2 2006.229.06:05:53.25#ibcon#enter sib2, iclass 33, count 2 2006.229.06:05:53.25#ibcon#flushed, iclass 33, count 2 2006.229.06:05:53.25#ibcon#about to write, iclass 33, count 2 2006.229.06:05:53.25#ibcon#wrote, iclass 33, count 2 2006.229.06:05:53.25#ibcon#about to read 3, iclass 33, count 2 2006.229.06:05:53.27#ibcon#read 3, iclass 33, count 2 2006.229.06:05:53.27#ibcon#about to read 4, iclass 33, count 2 2006.229.06:05:53.27#ibcon#read 4, iclass 33, count 2 2006.229.06:05:53.27#ibcon#about to read 5, iclass 33, count 2 2006.229.06:05:53.27#ibcon#read 5, iclass 33, count 2 2006.229.06:05:53.27#ibcon#about to read 6, iclass 33, count 2 2006.229.06:05:53.27#ibcon#read 6, iclass 33, count 2 2006.229.06:05:53.27#ibcon#end of sib2, iclass 33, count 2 2006.229.06:05:53.27#ibcon#*mode == 0, iclass 33, count 2 2006.229.06:05:53.27#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.06:05:53.27#ibcon#[25=AT01-08\r\n] 2006.229.06:05:53.27#ibcon#*before write, iclass 33, count 2 2006.229.06:05:53.27#ibcon#enter sib2, iclass 33, count 2 2006.229.06:05:53.27#ibcon#flushed, iclass 33, count 2 2006.229.06:05:53.27#ibcon#about to write, iclass 33, count 2 2006.229.06:05:53.27#ibcon#wrote, iclass 33, count 2 2006.229.06:05:53.27#ibcon#about to read 3, iclass 33, count 2 2006.229.06:05:53.30#ibcon#read 3, iclass 33, count 2 2006.229.06:05:53.30#ibcon#about to read 4, iclass 33, count 2 2006.229.06:05:53.30#ibcon#read 4, iclass 33, count 2 2006.229.06:05:53.30#ibcon#about to read 5, iclass 33, count 2 2006.229.06:05:53.30#ibcon#read 5, iclass 33, count 2 2006.229.06:05:53.30#ibcon#about to read 6, iclass 33, count 2 2006.229.06:05:53.30#ibcon#read 6, iclass 33, count 2 2006.229.06:05:53.30#ibcon#end of sib2, iclass 33, count 2 2006.229.06:05:53.30#ibcon#*after write, iclass 33, count 2 2006.229.06:05:53.30#ibcon#*before return 0, iclass 33, count 2 2006.229.06:05:53.30#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:53.30#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:53.30#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.06:05:53.30#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:53.30#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:53.42#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:53.42#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:53.42#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:05:53.42#ibcon#first serial, iclass 33, count 0 2006.229.06:05:53.42#ibcon#enter sib2, iclass 33, count 0 2006.229.06:05:53.42#ibcon#flushed, iclass 33, count 0 2006.229.06:05:53.42#ibcon#about to write, iclass 33, count 0 2006.229.06:05:53.42#ibcon#wrote, iclass 33, count 0 2006.229.06:05:53.42#ibcon#about to read 3, iclass 33, count 0 2006.229.06:05:53.44#ibcon#read 3, iclass 33, count 0 2006.229.06:05:53.44#ibcon#about to read 4, iclass 33, count 0 2006.229.06:05:53.44#ibcon#read 4, iclass 33, count 0 2006.229.06:05:53.44#ibcon#about to read 5, iclass 33, count 0 2006.229.06:05:53.44#ibcon#read 5, iclass 33, count 0 2006.229.06:05:53.44#ibcon#about to read 6, iclass 33, count 0 2006.229.06:05:53.44#ibcon#read 6, iclass 33, count 0 2006.229.06:05:53.44#ibcon#end of sib2, iclass 33, count 0 2006.229.06:05:53.44#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:05:53.44#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:05:53.44#ibcon#[25=USB\r\n] 2006.229.06:05:53.44#ibcon#*before write, iclass 33, count 0 2006.229.06:05:53.44#ibcon#enter sib2, iclass 33, count 0 2006.229.06:05:53.44#ibcon#flushed, iclass 33, count 0 2006.229.06:05:53.44#ibcon#about to write, iclass 33, count 0 2006.229.06:05:53.44#ibcon#wrote, iclass 33, count 0 2006.229.06:05:53.44#ibcon#about to read 3, iclass 33, count 0 2006.229.06:05:53.47#ibcon#read 3, iclass 33, count 0 2006.229.06:05:53.47#ibcon#about to read 4, iclass 33, count 0 2006.229.06:05:53.47#ibcon#read 4, iclass 33, count 0 2006.229.06:05:53.47#ibcon#about to read 5, iclass 33, count 0 2006.229.06:05:53.47#ibcon#read 5, iclass 33, count 0 2006.229.06:05:53.47#ibcon#about to read 6, iclass 33, count 0 2006.229.06:05:53.47#ibcon#read 6, iclass 33, count 0 2006.229.06:05:53.47#ibcon#end of sib2, iclass 33, count 0 2006.229.06:05:53.47#ibcon#*after write, iclass 33, count 0 2006.229.06:05:53.47#ibcon#*before return 0, iclass 33, count 0 2006.229.06:05:53.47#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:53.47#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:53.47#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:05:53.47#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:05:53.47$vck44/valo=2,534.99 2006.229.06:05:53.47#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.06:05:53.47#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.06:05:53.47#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:53.47#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:53.47#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:53.47#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:53.47#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:05:53.47#ibcon#first serial, iclass 35, count 0 2006.229.06:05:53.47#ibcon#enter sib2, iclass 35, count 0 2006.229.06:05:53.47#ibcon#flushed, iclass 35, count 0 2006.229.06:05:53.47#ibcon#about to write, iclass 35, count 0 2006.229.06:05:53.47#ibcon#wrote, iclass 35, count 0 2006.229.06:05:53.47#ibcon#about to read 3, iclass 35, count 0 2006.229.06:05:53.49#ibcon#read 3, iclass 35, count 0 2006.229.06:05:53.49#ibcon#about to read 4, iclass 35, count 0 2006.229.06:05:53.49#ibcon#read 4, iclass 35, count 0 2006.229.06:05:53.49#ibcon#about to read 5, iclass 35, count 0 2006.229.06:05:53.49#ibcon#read 5, iclass 35, count 0 2006.229.06:05:53.49#ibcon#about to read 6, iclass 35, count 0 2006.229.06:05:53.49#ibcon#read 6, iclass 35, count 0 2006.229.06:05:53.49#ibcon#end of sib2, iclass 35, count 0 2006.229.06:05:53.49#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:05:53.49#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:05:53.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:05:53.49#ibcon#*before write, iclass 35, count 0 2006.229.06:05:53.49#ibcon#enter sib2, iclass 35, count 0 2006.229.06:05:53.49#ibcon#flushed, iclass 35, count 0 2006.229.06:05:53.49#ibcon#about to write, iclass 35, count 0 2006.229.06:05:53.49#ibcon#wrote, iclass 35, count 0 2006.229.06:05:53.49#ibcon#about to read 3, iclass 35, count 0 2006.229.06:05:53.53#ibcon#read 3, iclass 35, count 0 2006.229.06:05:53.53#ibcon#about to read 4, iclass 35, count 0 2006.229.06:05:53.53#ibcon#read 4, iclass 35, count 0 2006.229.06:05:53.53#ibcon#about to read 5, iclass 35, count 0 2006.229.06:05:53.53#ibcon#read 5, iclass 35, count 0 2006.229.06:05:53.53#ibcon#about to read 6, iclass 35, count 0 2006.229.06:05:53.53#ibcon#read 6, iclass 35, count 0 2006.229.06:05:53.53#ibcon#end of sib2, iclass 35, count 0 2006.229.06:05:53.53#ibcon#*after write, iclass 35, count 0 2006.229.06:05:53.53#ibcon#*before return 0, iclass 35, count 0 2006.229.06:05:53.53#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:53.53#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:53.53#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:05:53.53#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:05:53.53$vck44/va=2,7 2006.229.06:05:53.53#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.06:05:53.53#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.06:05:53.53#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:53.53#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:53.59#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:53.59#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:53.59#ibcon#enter wrdev, iclass 37, count 2 2006.229.06:05:53.59#ibcon#first serial, iclass 37, count 2 2006.229.06:05:53.59#ibcon#enter sib2, iclass 37, count 2 2006.229.06:05:53.59#ibcon#flushed, iclass 37, count 2 2006.229.06:05:53.59#ibcon#about to write, iclass 37, count 2 2006.229.06:05:53.59#ibcon#wrote, iclass 37, count 2 2006.229.06:05:53.59#ibcon#about to read 3, iclass 37, count 2 2006.229.06:05:53.61#ibcon#read 3, iclass 37, count 2 2006.229.06:05:53.61#ibcon#about to read 4, iclass 37, count 2 2006.229.06:05:53.61#ibcon#read 4, iclass 37, count 2 2006.229.06:05:53.61#ibcon#about to read 5, iclass 37, count 2 2006.229.06:05:53.61#ibcon#read 5, iclass 37, count 2 2006.229.06:05:53.61#ibcon#about to read 6, iclass 37, count 2 2006.229.06:05:53.61#ibcon#read 6, iclass 37, count 2 2006.229.06:05:53.61#ibcon#end of sib2, iclass 37, count 2 2006.229.06:05:53.61#ibcon#*mode == 0, iclass 37, count 2 2006.229.06:05:53.61#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.06:05:53.61#ibcon#[25=AT02-07\r\n] 2006.229.06:05:53.61#ibcon#*before write, iclass 37, count 2 2006.229.06:05:53.61#ibcon#enter sib2, iclass 37, count 2 2006.229.06:05:53.61#ibcon#flushed, iclass 37, count 2 2006.229.06:05:53.61#ibcon#about to write, iclass 37, count 2 2006.229.06:05:53.61#ibcon#wrote, iclass 37, count 2 2006.229.06:05:53.61#ibcon#about to read 3, iclass 37, count 2 2006.229.06:05:53.64#ibcon#read 3, iclass 37, count 2 2006.229.06:05:53.64#ibcon#about to read 4, iclass 37, count 2 2006.229.06:05:53.64#ibcon#read 4, iclass 37, count 2 2006.229.06:05:53.64#ibcon#about to read 5, iclass 37, count 2 2006.229.06:05:53.64#ibcon#read 5, iclass 37, count 2 2006.229.06:05:53.64#ibcon#about to read 6, iclass 37, count 2 2006.229.06:05:53.64#ibcon#read 6, iclass 37, count 2 2006.229.06:05:53.64#ibcon#end of sib2, iclass 37, count 2 2006.229.06:05:53.64#ibcon#*after write, iclass 37, count 2 2006.229.06:05:53.64#ibcon#*before return 0, iclass 37, count 2 2006.229.06:05:53.64#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:53.64#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:53.64#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.06:05:53.64#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:53.64#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:53.76#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:53.76#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:53.76#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:05:53.76#ibcon#first serial, iclass 37, count 0 2006.229.06:05:53.76#ibcon#enter sib2, iclass 37, count 0 2006.229.06:05:53.76#ibcon#flushed, iclass 37, count 0 2006.229.06:05:53.76#ibcon#about to write, iclass 37, count 0 2006.229.06:05:53.76#ibcon#wrote, iclass 37, count 0 2006.229.06:05:53.76#ibcon#about to read 3, iclass 37, count 0 2006.229.06:05:53.78#ibcon#read 3, iclass 37, count 0 2006.229.06:05:53.78#ibcon#about to read 4, iclass 37, count 0 2006.229.06:05:53.78#ibcon#read 4, iclass 37, count 0 2006.229.06:05:53.78#ibcon#about to read 5, iclass 37, count 0 2006.229.06:05:53.78#ibcon#read 5, iclass 37, count 0 2006.229.06:05:53.78#ibcon#about to read 6, iclass 37, count 0 2006.229.06:05:53.78#ibcon#read 6, iclass 37, count 0 2006.229.06:05:53.78#ibcon#end of sib2, iclass 37, count 0 2006.229.06:05:53.78#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:05:53.78#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:05:53.78#ibcon#[25=USB\r\n] 2006.229.06:05:53.78#ibcon#*before write, iclass 37, count 0 2006.229.06:05:53.78#ibcon#enter sib2, iclass 37, count 0 2006.229.06:05:53.78#ibcon#flushed, iclass 37, count 0 2006.229.06:05:53.78#ibcon#about to write, iclass 37, count 0 2006.229.06:05:53.78#ibcon#wrote, iclass 37, count 0 2006.229.06:05:53.78#ibcon#about to read 3, iclass 37, count 0 2006.229.06:05:53.81#ibcon#read 3, iclass 37, count 0 2006.229.06:05:53.81#ibcon#about to read 4, iclass 37, count 0 2006.229.06:05:53.81#ibcon#read 4, iclass 37, count 0 2006.229.06:05:53.81#ibcon#about to read 5, iclass 37, count 0 2006.229.06:05:53.81#ibcon#read 5, iclass 37, count 0 2006.229.06:05:53.81#ibcon#about to read 6, iclass 37, count 0 2006.229.06:05:53.81#ibcon#read 6, iclass 37, count 0 2006.229.06:05:53.81#ibcon#end of sib2, iclass 37, count 0 2006.229.06:05:53.81#ibcon#*after write, iclass 37, count 0 2006.229.06:05:53.81#ibcon#*before return 0, iclass 37, count 0 2006.229.06:05:53.81#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:53.81#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:53.81#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:05:53.81#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:05:53.81$vck44/valo=3,564.99 2006.229.06:05:53.81#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.06:05:53.81#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.06:05:53.81#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:53.81#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:53.81#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:53.81#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:53.81#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:05:53.81#ibcon#first serial, iclass 39, count 0 2006.229.06:05:53.81#ibcon#enter sib2, iclass 39, count 0 2006.229.06:05:53.81#ibcon#flushed, iclass 39, count 0 2006.229.06:05:53.81#ibcon#about to write, iclass 39, count 0 2006.229.06:05:53.81#ibcon#wrote, iclass 39, count 0 2006.229.06:05:53.81#ibcon#about to read 3, iclass 39, count 0 2006.229.06:05:53.83#ibcon#read 3, iclass 39, count 0 2006.229.06:05:53.83#ibcon#about to read 4, iclass 39, count 0 2006.229.06:05:53.83#ibcon#read 4, iclass 39, count 0 2006.229.06:05:53.83#ibcon#about to read 5, iclass 39, count 0 2006.229.06:05:53.83#ibcon#read 5, iclass 39, count 0 2006.229.06:05:53.83#ibcon#about to read 6, iclass 39, count 0 2006.229.06:05:53.83#ibcon#read 6, iclass 39, count 0 2006.229.06:05:53.83#ibcon#end of sib2, iclass 39, count 0 2006.229.06:05:53.83#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:05:53.83#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:05:53.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:05:53.83#ibcon#*before write, iclass 39, count 0 2006.229.06:05:53.83#ibcon#enter sib2, iclass 39, count 0 2006.229.06:05:53.83#ibcon#flushed, iclass 39, count 0 2006.229.06:05:53.83#ibcon#about to write, iclass 39, count 0 2006.229.06:05:53.83#ibcon#wrote, iclass 39, count 0 2006.229.06:05:53.83#ibcon#about to read 3, iclass 39, count 0 2006.229.06:05:53.87#ibcon#read 3, iclass 39, count 0 2006.229.06:05:53.87#ibcon#about to read 4, iclass 39, count 0 2006.229.06:05:53.87#ibcon#read 4, iclass 39, count 0 2006.229.06:05:53.87#ibcon#about to read 5, iclass 39, count 0 2006.229.06:05:53.87#ibcon#read 5, iclass 39, count 0 2006.229.06:05:53.87#ibcon#about to read 6, iclass 39, count 0 2006.229.06:05:53.87#ibcon#read 6, iclass 39, count 0 2006.229.06:05:53.87#ibcon#end of sib2, iclass 39, count 0 2006.229.06:05:53.87#ibcon#*after write, iclass 39, count 0 2006.229.06:05:53.87#ibcon#*before return 0, iclass 39, count 0 2006.229.06:05:53.87#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:53.87#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:53.87#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:05:53.87#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:05:53.87$vck44/va=3,6 2006.229.06:05:53.87#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:05:53.87#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:05:53.87#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:53.87#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:53.93#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:53.93#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:53.93#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:05:53.93#ibcon#first serial, iclass 3, count 2 2006.229.06:05:53.93#ibcon#enter sib2, iclass 3, count 2 2006.229.06:05:53.93#ibcon#flushed, iclass 3, count 2 2006.229.06:05:53.93#ibcon#about to write, iclass 3, count 2 2006.229.06:05:53.93#ibcon#wrote, iclass 3, count 2 2006.229.06:05:53.93#ibcon#about to read 3, iclass 3, count 2 2006.229.06:05:53.95#ibcon#read 3, iclass 3, count 2 2006.229.06:05:53.95#ibcon#about to read 4, iclass 3, count 2 2006.229.06:05:53.95#ibcon#read 4, iclass 3, count 2 2006.229.06:05:53.95#ibcon#about to read 5, iclass 3, count 2 2006.229.06:05:53.95#ibcon#read 5, iclass 3, count 2 2006.229.06:05:53.95#ibcon#about to read 6, iclass 3, count 2 2006.229.06:05:53.95#ibcon#read 6, iclass 3, count 2 2006.229.06:05:53.95#ibcon#end of sib2, iclass 3, count 2 2006.229.06:05:53.95#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:05:53.95#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:05:53.95#ibcon#[25=AT03-06\r\n] 2006.229.06:05:53.95#ibcon#*before write, iclass 3, count 2 2006.229.06:05:53.95#ibcon#enter sib2, iclass 3, count 2 2006.229.06:05:53.95#ibcon#flushed, iclass 3, count 2 2006.229.06:05:53.95#ibcon#about to write, iclass 3, count 2 2006.229.06:05:53.95#ibcon#wrote, iclass 3, count 2 2006.229.06:05:53.95#ibcon#about to read 3, iclass 3, count 2 2006.229.06:05:53.98#ibcon#read 3, iclass 3, count 2 2006.229.06:05:53.98#ibcon#about to read 4, iclass 3, count 2 2006.229.06:05:53.98#ibcon#read 4, iclass 3, count 2 2006.229.06:05:53.98#ibcon#about to read 5, iclass 3, count 2 2006.229.06:05:53.98#ibcon#read 5, iclass 3, count 2 2006.229.06:05:53.98#ibcon#about to read 6, iclass 3, count 2 2006.229.06:05:53.98#ibcon#read 6, iclass 3, count 2 2006.229.06:05:53.98#ibcon#end of sib2, iclass 3, count 2 2006.229.06:05:53.98#ibcon#*after write, iclass 3, count 2 2006.229.06:05:53.98#ibcon#*before return 0, iclass 3, count 2 2006.229.06:05:53.98#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:53.98#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:53.98#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:05:53.98#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:53.98#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:54.10#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:54.10#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:54.10#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:05:54.10#ibcon#first serial, iclass 3, count 0 2006.229.06:05:54.10#ibcon#enter sib2, iclass 3, count 0 2006.229.06:05:54.10#ibcon#flushed, iclass 3, count 0 2006.229.06:05:54.10#ibcon#about to write, iclass 3, count 0 2006.229.06:05:54.10#ibcon#wrote, iclass 3, count 0 2006.229.06:05:54.10#ibcon#about to read 3, iclass 3, count 0 2006.229.06:05:54.12#ibcon#read 3, iclass 3, count 0 2006.229.06:05:54.12#ibcon#about to read 4, iclass 3, count 0 2006.229.06:05:54.12#ibcon#read 4, iclass 3, count 0 2006.229.06:05:54.12#ibcon#about to read 5, iclass 3, count 0 2006.229.06:05:54.12#ibcon#read 5, iclass 3, count 0 2006.229.06:05:54.12#ibcon#about to read 6, iclass 3, count 0 2006.229.06:05:54.12#ibcon#read 6, iclass 3, count 0 2006.229.06:05:54.12#ibcon#end of sib2, iclass 3, count 0 2006.229.06:05:54.12#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:05:54.12#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:05:54.12#ibcon#[25=USB\r\n] 2006.229.06:05:54.12#ibcon#*before write, iclass 3, count 0 2006.229.06:05:54.12#ibcon#enter sib2, iclass 3, count 0 2006.229.06:05:54.12#ibcon#flushed, iclass 3, count 0 2006.229.06:05:54.12#ibcon#about to write, iclass 3, count 0 2006.229.06:05:54.12#ibcon#wrote, iclass 3, count 0 2006.229.06:05:54.12#ibcon#about to read 3, iclass 3, count 0 2006.229.06:05:54.15#ibcon#read 3, iclass 3, count 0 2006.229.06:05:54.15#ibcon#about to read 4, iclass 3, count 0 2006.229.06:05:54.15#ibcon#read 4, iclass 3, count 0 2006.229.06:05:54.15#ibcon#about to read 5, iclass 3, count 0 2006.229.06:05:54.15#ibcon#read 5, iclass 3, count 0 2006.229.06:05:54.15#ibcon#about to read 6, iclass 3, count 0 2006.229.06:05:54.15#ibcon#read 6, iclass 3, count 0 2006.229.06:05:54.15#ibcon#end of sib2, iclass 3, count 0 2006.229.06:05:54.15#ibcon#*after write, iclass 3, count 0 2006.229.06:05:54.15#ibcon#*before return 0, iclass 3, count 0 2006.229.06:05:54.15#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:54.15#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:54.15#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:05:54.15#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:05:54.15$vck44/valo=4,624.99 2006.229.06:05:54.15#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.06:05:54.15#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.06:05:54.15#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:54.15#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:54.15#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:54.15#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:54.15#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:05:54.15#ibcon#first serial, iclass 5, count 0 2006.229.06:05:54.15#ibcon#enter sib2, iclass 5, count 0 2006.229.06:05:54.15#ibcon#flushed, iclass 5, count 0 2006.229.06:05:54.15#ibcon#about to write, iclass 5, count 0 2006.229.06:05:54.15#ibcon#wrote, iclass 5, count 0 2006.229.06:05:54.15#ibcon#about to read 3, iclass 5, count 0 2006.229.06:05:54.17#ibcon#read 3, iclass 5, count 0 2006.229.06:05:54.22#ibcon#about to read 4, iclass 5, count 0 2006.229.06:05:54.22#ibcon#read 4, iclass 5, count 0 2006.229.06:05:54.22#ibcon#about to read 5, iclass 5, count 0 2006.229.06:05:54.22#ibcon#read 5, iclass 5, count 0 2006.229.06:05:54.22#ibcon#about to read 6, iclass 5, count 0 2006.229.06:05:54.22#ibcon#read 6, iclass 5, count 0 2006.229.06:05:54.22#ibcon#end of sib2, iclass 5, count 0 2006.229.06:05:54.22#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:05:54.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:05:54.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:05:54.22#ibcon#*before write, iclass 5, count 0 2006.229.06:05:54.22#ibcon#enter sib2, iclass 5, count 0 2006.229.06:05:54.22#ibcon#flushed, iclass 5, count 0 2006.229.06:05:54.22#ibcon#about to write, iclass 5, count 0 2006.229.06:05:54.23#ibcon#wrote, iclass 5, count 0 2006.229.06:05:54.23#ibcon#about to read 3, iclass 5, count 0 2006.229.06:05:54.27#ibcon#read 3, iclass 5, count 0 2006.229.06:05:54.27#ibcon#about to read 4, iclass 5, count 0 2006.229.06:05:54.27#ibcon#read 4, iclass 5, count 0 2006.229.06:05:54.27#ibcon#about to read 5, iclass 5, count 0 2006.229.06:05:54.27#ibcon#read 5, iclass 5, count 0 2006.229.06:05:54.27#ibcon#about to read 6, iclass 5, count 0 2006.229.06:05:54.27#ibcon#read 6, iclass 5, count 0 2006.229.06:05:54.27#ibcon#end of sib2, iclass 5, count 0 2006.229.06:05:54.27#ibcon#*after write, iclass 5, count 0 2006.229.06:05:54.27#ibcon#*before return 0, iclass 5, count 0 2006.229.06:05:54.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:54.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:54.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:05:54.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:05:54.27$vck44/va=4,7 2006.229.06:05:54.27#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.06:05:54.27#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.06:05:54.27#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:54.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:54.27#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:54.27#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:54.27#ibcon#enter wrdev, iclass 7, count 2 2006.229.06:05:54.27#ibcon#first serial, iclass 7, count 2 2006.229.06:05:54.27#ibcon#enter sib2, iclass 7, count 2 2006.229.06:05:54.27#ibcon#flushed, iclass 7, count 2 2006.229.06:05:54.27#ibcon#about to write, iclass 7, count 2 2006.229.06:05:54.27#ibcon#wrote, iclass 7, count 2 2006.229.06:05:54.27#ibcon#about to read 3, iclass 7, count 2 2006.229.06:05:54.29#ibcon#read 3, iclass 7, count 2 2006.229.06:05:54.29#ibcon#about to read 4, iclass 7, count 2 2006.229.06:05:54.29#ibcon#read 4, iclass 7, count 2 2006.229.06:05:54.29#ibcon#about to read 5, iclass 7, count 2 2006.229.06:05:54.29#ibcon#read 5, iclass 7, count 2 2006.229.06:05:54.29#ibcon#about to read 6, iclass 7, count 2 2006.229.06:05:54.29#ibcon#read 6, iclass 7, count 2 2006.229.06:05:54.29#ibcon#end of sib2, iclass 7, count 2 2006.229.06:05:54.29#ibcon#*mode == 0, iclass 7, count 2 2006.229.06:05:54.29#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.06:05:54.29#ibcon#[25=AT04-07\r\n] 2006.229.06:05:54.29#ibcon#*before write, iclass 7, count 2 2006.229.06:05:54.29#ibcon#enter sib2, iclass 7, count 2 2006.229.06:05:54.29#ibcon#flushed, iclass 7, count 2 2006.229.06:05:54.29#ibcon#about to write, iclass 7, count 2 2006.229.06:05:54.29#ibcon#wrote, iclass 7, count 2 2006.229.06:05:54.29#ibcon#about to read 3, iclass 7, count 2 2006.229.06:05:54.32#ibcon#read 3, iclass 7, count 2 2006.229.06:05:54.32#ibcon#about to read 4, iclass 7, count 2 2006.229.06:05:54.32#ibcon#read 4, iclass 7, count 2 2006.229.06:05:54.32#ibcon#about to read 5, iclass 7, count 2 2006.229.06:05:54.32#ibcon#read 5, iclass 7, count 2 2006.229.06:05:54.32#ibcon#about to read 6, iclass 7, count 2 2006.229.06:05:54.32#ibcon#read 6, iclass 7, count 2 2006.229.06:05:54.32#ibcon#end of sib2, iclass 7, count 2 2006.229.06:05:54.32#ibcon#*after write, iclass 7, count 2 2006.229.06:05:54.32#ibcon#*before return 0, iclass 7, count 2 2006.229.06:05:54.32#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:54.32#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:54.32#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.06:05:54.32#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:54.32#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:54.44#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:54.44#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:54.44#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:05:54.44#ibcon#first serial, iclass 7, count 0 2006.229.06:05:54.44#ibcon#enter sib2, iclass 7, count 0 2006.229.06:05:54.44#ibcon#flushed, iclass 7, count 0 2006.229.06:05:54.44#ibcon#about to write, iclass 7, count 0 2006.229.06:05:54.44#ibcon#wrote, iclass 7, count 0 2006.229.06:05:54.44#ibcon#about to read 3, iclass 7, count 0 2006.229.06:05:54.46#ibcon#read 3, iclass 7, count 0 2006.229.06:05:54.46#ibcon#about to read 4, iclass 7, count 0 2006.229.06:05:54.46#ibcon#read 4, iclass 7, count 0 2006.229.06:05:54.46#ibcon#about to read 5, iclass 7, count 0 2006.229.06:05:54.46#ibcon#read 5, iclass 7, count 0 2006.229.06:05:54.46#ibcon#about to read 6, iclass 7, count 0 2006.229.06:05:54.46#ibcon#read 6, iclass 7, count 0 2006.229.06:05:54.46#ibcon#end of sib2, iclass 7, count 0 2006.229.06:05:54.46#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:05:54.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:05:54.46#ibcon#[25=USB\r\n] 2006.229.06:05:54.46#ibcon#*before write, iclass 7, count 0 2006.229.06:05:54.46#ibcon#enter sib2, iclass 7, count 0 2006.229.06:05:54.46#ibcon#flushed, iclass 7, count 0 2006.229.06:05:54.46#ibcon#about to write, iclass 7, count 0 2006.229.06:05:54.46#ibcon#wrote, iclass 7, count 0 2006.229.06:05:54.46#ibcon#about to read 3, iclass 7, count 0 2006.229.06:05:54.49#ibcon#read 3, iclass 7, count 0 2006.229.06:05:54.49#ibcon#about to read 4, iclass 7, count 0 2006.229.06:05:54.49#ibcon#read 4, iclass 7, count 0 2006.229.06:05:54.49#ibcon#about to read 5, iclass 7, count 0 2006.229.06:05:54.49#ibcon#read 5, iclass 7, count 0 2006.229.06:05:54.49#ibcon#about to read 6, iclass 7, count 0 2006.229.06:05:54.49#ibcon#read 6, iclass 7, count 0 2006.229.06:05:54.49#ibcon#end of sib2, iclass 7, count 0 2006.229.06:05:54.49#ibcon#*after write, iclass 7, count 0 2006.229.06:05:54.49#ibcon#*before return 0, iclass 7, count 0 2006.229.06:05:54.49#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:54.49#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:54.49#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:05:54.49#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:05:54.49$vck44/valo=5,734.99 2006.229.06:05:54.49#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.06:05:54.49#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.06:05:54.49#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:54.49#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:54.49#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:54.49#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:54.49#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:05:54.49#ibcon#first serial, iclass 11, count 0 2006.229.06:05:54.49#ibcon#enter sib2, iclass 11, count 0 2006.229.06:05:54.49#ibcon#flushed, iclass 11, count 0 2006.229.06:05:54.49#ibcon#about to write, iclass 11, count 0 2006.229.06:05:54.49#ibcon#wrote, iclass 11, count 0 2006.229.06:05:54.49#ibcon#about to read 3, iclass 11, count 0 2006.229.06:05:54.51#ibcon#read 3, iclass 11, count 0 2006.229.06:05:54.51#ibcon#about to read 4, iclass 11, count 0 2006.229.06:05:54.51#ibcon#read 4, iclass 11, count 0 2006.229.06:05:54.51#ibcon#about to read 5, iclass 11, count 0 2006.229.06:05:54.51#ibcon#read 5, iclass 11, count 0 2006.229.06:05:54.51#ibcon#about to read 6, iclass 11, count 0 2006.229.06:05:54.51#ibcon#read 6, iclass 11, count 0 2006.229.06:05:54.51#ibcon#end of sib2, iclass 11, count 0 2006.229.06:05:54.51#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:05:54.51#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:05:54.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:05:54.51#ibcon#*before write, iclass 11, count 0 2006.229.06:05:54.51#ibcon#enter sib2, iclass 11, count 0 2006.229.06:05:54.51#ibcon#flushed, iclass 11, count 0 2006.229.06:05:54.51#ibcon#about to write, iclass 11, count 0 2006.229.06:05:54.51#ibcon#wrote, iclass 11, count 0 2006.229.06:05:54.51#ibcon#about to read 3, iclass 11, count 0 2006.229.06:05:54.55#ibcon#read 3, iclass 11, count 0 2006.229.06:05:54.55#ibcon#about to read 4, iclass 11, count 0 2006.229.06:05:54.55#ibcon#read 4, iclass 11, count 0 2006.229.06:05:54.55#ibcon#about to read 5, iclass 11, count 0 2006.229.06:05:54.55#ibcon#read 5, iclass 11, count 0 2006.229.06:05:54.55#ibcon#about to read 6, iclass 11, count 0 2006.229.06:05:54.55#ibcon#read 6, iclass 11, count 0 2006.229.06:05:54.55#ibcon#end of sib2, iclass 11, count 0 2006.229.06:05:54.55#ibcon#*after write, iclass 11, count 0 2006.229.06:05:54.55#ibcon#*before return 0, iclass 11, count 0 2006.229.06:05:54.55#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:54.55#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:54.55#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:05:54.55#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:05:54.55$vck44/va=5,4 2006.229.06:05:54.55#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.06:05:54.55#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.06:05:54.55#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:54.55#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:54.61#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:54.61#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:54.61#ibcon#enter wrdev, iclass 13, count 2 2006.229.06:05:54.61#ibcon#first serial, iclass 13, count 2 2006.229.06:05:54.61#ibcon#enter sib2, iclass 13, count 2 2006.229.06:05:54.61#ibcon#flushed, iclass 13, count 2 2006.229.06:05:54.61#ibcon#about to write, iclass 13, count 2 2006.229.06:05:54.61#ibcon#wrote, iclass 13, count 2 2006.229.06:05:54.61#ibcon#about to read 3, iclass 13, count 2 2006.229.06:05:54.63#ibcon#read 3, iclass 13, count 2 2006.229.06:05:54.63#ibcon#about to read 4, iclass 13, count 2 2006.229.06:05:54.63#ibcon#read 4, iclass 13, count 2 2006.229.06:05:54.63#ibcon#about to read 5, iclass 13, count 2 2006.229.06:05:54.63#ibcon#read 5, iclass 13, count 2 2006.229.06:05:54.63#ibcon#about to read 6, iclass 13, count 2 2006.229.06:05:54.63#ibcon#read 6, iclass 13, count 2 2006.229.06:05:54.63#ibcon#end of sib2, iclass 13, count 2 2006.229.06:05:54.63#ibcon#*mode == 0, iclass 13, count 2 2006.229.06:05:54.63#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.06:05:54.63#ibcon#[25=AT05-04\r\n] 2006.229.06:05:54.63#ibcon#*before write, iclass 13, count 2 2006.229.06:05:54.63#ibcon#enter sib2, iclass 13, count 2 2006.229.06:05:54.63#ibcon#flushed, iclass 13, count 2 2006.229.06:05:54.63#ibcon#about to write, iclass 13, count 2 2006.229.06:05:54.63#ibcon#wrote, iclass 13, count 2 2006.229.06:05:54.63#ibcon#about to read 3, iclass 13, count 2 2006.229.06:05:54.66#ibcon#read 3, iclass 13, count 2 2006.229.06:05:54.66#ibcon#about to read 4, iclass 13, count 2 2006.229.06:05:54.66#ibcon#read 4, iclass 13, count 2 2006.229.06:05:54.66#ibcon#about to read 5, iclass 13, count 2 2006.229.06:05:54.66#ibcon#read 5, iclass 13, count 2 2006.229.06:05:54.66#ibcon#about to read 6, iclass 13, count 2 2006.229.06:05:54.66#ibcon#read 6, iclass 13, count 2 2006.229.06:05:54.66#ibcon#end of sib2, iclass 13, count 2 2006.229.06:05:54.66#ibcon#*after write, iclass 13, count 2 2006.229.06:05:54.66#ibcon#*before return 0, iclass 13, count 2 2006.229.06:05:54.66#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:54.66#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:54.66#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.06:05:54.66#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:54.66#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:54.78#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:54.78#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:54.78#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:05:54.78#ibcon#first serial, iclass 13, count 0 2006.229.06:05:54.78#ibcon#enter sib2, iclass 13, count 0 2006.229.06:05:54.78#ibcon#flushed, iclass 13, count 0 2006.229.06:05:54.78#ibcon#about to write, iclass 13, count 0 2006.229.06:05:54.78#ibcon#wrote, iclass 13, count 0 2006.229.06:05:54.78#ibcon#about to read 3, iclass 13, count 0 2006.229.06:05:54.80#ibcon#read 3, iclass 13, count 0 2006.229.06:05:54.80#ibcon#about to read 4, iclass 13, count 0 2006.229.06:05:54.80#ibcon#read 4, iclass 13, count 0 2006.229.06:05:54.80#ibcon#about to read 5, iclass 13, count 0 2006.229.06:05:54.80#ibcon#read 5, iclass 13, count 0 2006.229.06:05:54.80#ibcon#about to read 6, iclass 13, count 0 2006.229.06:05:54.80#ibcon#read 6, iclass 13, count 0 2006.229.06:05:54.80#ibcon#end of sib2, iclass 13, count 0 2006.229.06:05:54.80#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:05:54.80#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:05:54.80#ibcon#[25=USB\r\n] 2006.229.06:05:54.80#ibcon#*before write, iclass 13, count 0 2006.229.06:05:54.80#ibcon#enter sib2, iclass 13, count 0 2006.229.06:05:54.80#ibcon#flushed, iclass 13, count 0 2006.229.06:05:54.80#ibcon#about to write, iclass 13, count 0 2006.229.06:05:54.80#ibcon#wrote, iclass 13, count 0 2006.229.06:05:54.80#ibcon#about to read 3, iclass 13, count 0 2006.229.06:05:54.83#ibcon#read 3, iclass 13, count 0 2006.229.06:05:54.83#ibcon#about to read 4, iclass 13, count 0 2006.229.06:05:54.83#ibcon#read 4, iclass 13, count 0 2006.229.06:05:54.83#ibcon#about to read 5, iclass 13, count 0 2006.229.06:05:54.83#ibcon#read 5, iclass 13, count 0 2006.229.06:05:54.83#ibcon#about to read 6, iclass 13, count 0 2006.229.06:05:54.83#ibcon#read 6, iclass 13, count 0 2006.229.06:05:54.83#ibcon#end of sib2, iclass 13, count 0 2006.229.06:05:54.83#ibcon#*after write, iclass 13, count 0 2006.229.06:05:54.83#ibcon#*before return 0, iclass 13, count 0 2006.229.06:05:54.83#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:54.83#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:54.83#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:05:54.83#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:05:54.83$vck44/valo=6,814.99 2006.229.06:05:54.83#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:05:54.83#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:05:54.83#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:54.83#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:05:54.83#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:05:54.83#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:05:54.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:05:54.83#ibcon#first serial, iclass 16, count 0 2006.229.06:05:54.83#ibcon#enter sib2, iclass 16, count 0 2006.229.06:05:54.83#ibcon#flushed, iclass 16, count 0 2006.229.06:05:54.83#ibcon#about to write, iclass 16, count 0 2006.229.06:05:54.83#ibcon#wrote, iclass 16, count 0 2006.229.06:05:54.83#ibcon#about to read 3, iclass 16, count 0 2006.229.06:05:54.85#ibcon#read 3, iclass 16, count 0 2006.229.06:05:54.85#ibcon#about to read 4, iclass 16, count 0 2006.229.06:05:54.85#ibcon#read 4, iclass 16, count 0 2006.229.06:05:54.85#ibcon#about to read 5, iclass 16, count 0 2006.229.06:05:54.85#ibcon#read 5, iclass 16, count 0 2006.229.06:05:54.85#ibcon#about to read 6, iclass 16, count 0 2006.229.06:05:54.85#ibcon#read 6, iclass 16, count 0 2006.229.06:05:54.85#ibcon#end of sib2, iclass 16, count 0 2006.229.06:05:54.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:05:54.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:05:54.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:05:54.85#ibcon#*before write, iclass 16, count 0 2006.229.06:05:54.85#ibcon#enter sib2, iclass 16, count 0 2006.229.06:05:54.85#ibcon#flushed, iclass 16, count 0 2006.229.06:05:54.85#ibcon#about to write, iclass 16, count 0 2006.229.06:05:54.85#ibcon#wrote, iclass 16, count 0 2006.229.06:05:54.85#ibcon#about to read 3, iclass 16, count 0 2006.229.06:05:54.85#abcon#<5=/04 2.5 4.2 30.60 91 999.3\r\n> 2006.229.06:05:54.87#abcon#{5=INTERFACE CLEAR} 2006.229.06:05:54.89#ibcon#read 3, iclass 16, count 0 2006.229.06:05:54.89#ibcon#about to read 4, iclass 16, count 0 2006.229.06:05:54.89#ibcon#read 4, iclass 16, count 0 2006.229.06:05:54.89#ibcon#about to read 5, iclass 16, count 0 2006.229.06:05:54.89#ibcon#read 5, iclass 16, count 0 2006.229.06:05:54.89#ibcon#about to read 6, iclass 16, count 0 2006.229.06:05:54.89#ibcon#read 6, iclass 16, count 0 2006.229.06:05:54.89#ibcon#end of sib2, iclass 16, count 0 2006.229.06:05:54.89#ibcon#*after write, iclass 16, count 0 2006.229.06:05:54.89#ibcon#*before return 0, iclass 16, count 0 2006.229.06:05:54.89#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:05:54.89#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:05:54.89#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:05:54.89#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:05:54.89$vck44/va=6,4 2006.229.06:05:54.89#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.06:05:54.89#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.06:05:54.89#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:54.89#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:05:54.93#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:05:54.95#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:05:54.95#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:05:54.95#ibcon#enter wrdev, iclass 20, count 2 2006.229.06:05:54.95#ibcon#first serial, iclass 20, count 2 2006.229.06:05:54.95#ibcon#enter sib2, iclass 20, count 2 2006.229.06:05:54.95#ibcon#flushed, iclass 20, count 2 2006.229.06:05:54.95#ibcon#about to write, iclass 20, count 2 2006.229.06:05:54.95#ibcon#wrote, iclass 20, count 2 2006.229.06:05:54.95#ibcon#about to read 3, iclass 20, count 2 2006.229.06:05:54.97#ibcon#read 3, iclass 20, count 2 2006.229.06:05:54.97#ibcon#about to read 4, iclass 20, count 2 2006.229.06:05:54.97#ibcon#read 4, iclass 20, count 2 2006.229.06:05:54.97#ibcon#about to read 5, iclass 20, count 2 2006.229.06:05:54.97#ibcon#read 5, iclass 20, count 2 2006.229.06:05:54.97#ibcon#about to read 6, iclass 20, count 2 2006.229.06:05:54.97#ibcon#read 6, iclass 20, count 2 2006.229.06:05:54.97#ibcon#end of sib2, iclass 20, count 2 2006.229.06:05:54.97#ibcon#*mode == 0, iclass 20, count 2 2006.229.06:05:54.97#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.06:05:54.97#ibcon#[25=AT06-04\r\n] 2006.229.06:05:54.97#ibcon#*before write, iclass 20, count 2 2006.229.06:05:54.97#ibcon#enter sib2, iclass 20, count 2 2006.229.06:05:54.97#ibcon#flushed, iclass 20, count 2 2006.229.06:05:54.97#ibcon#about to write, iclass 20, count 2 2006.229.06:05:54.97#ibcon#wrote, iclass 20, count 2 2006.229.06:05:54.97#ibcon#about to read 3, iclass 20, count 2 2006.229.06:05:55.00#ibcon#read 3, iclass 20, count 2 2006.229.06:05:55.00#ibcon#about to read 4, iclass 20, count 2 2006.229.06:05:55.00#ibcon#read 4, iclass 20, count 2 2006.229.06:05:55.00#ibcon#about to read 5, iclass 20, count 2 2006.229.06:05:55.00#ibcon#read 5, iclass 20, count 2 2006.229.06:05:55.00#ibcon#about to read 6, iclass 20, count 2 2006.229.06:05:55.00#ibcon#read 6, iclass 20, count 2 2006.229.06:05:55.00#ibcon#end of sib2, iclass 20, count 2 2006.229.06:05:55.00#ibcon#*after write, iclass 20, count 2 2006.229.06:05:55.00#ibcon#*before return 0, iclass 20, count 2 2006.229.06:05:55.00#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:05:55.00#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:05:55.00#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.06:05:55.00#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:55.00#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:05:55.12#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:05:55.12#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:05:55.12#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:05:55.12#ibcon#first serial, iclass 20, count 0 2006.229.06:05:55.12#ibcon#enter sib2, iclass 20, count 0 2006.229.06:05:55.12#ibcon#flushed, iclass 20, count 0 2006.229.06:05:55.12#ibcon#about to write, iclass 20, count 0 2006.229.06:05:55.12#ibcon#wrote, iclass 20, count 0 2006.229.06:05:55.12#ibcon#about to read 3, iclass 20, count 0 2006.229.06:05:55.14#ibcon#read 3, iclass 20, count 0 2006.229.06:05:55.14#ibcon#about to read 4, iclass 20, count 0 2006.229.06:05:55.14#ibcon#read 4, iclass 20, count 0 2006.229.06:05:55.14#ibcon#about to read 5, iclass 20, count 0 2006.229.06:05:55.14#ibcon#read 5, iclass 20, count 0 2006.229.06:05:55.14#ibcon#about to read 6, iclass 20, count 0 2006.229.06:05:55.14#ibcon#read 6, iclass 20, count 0 2006.229.06:05:55.14#ibcon#end of sib2, iclass 20, count 0 2006.229.06:05:55.14#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:05:55.14#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:05:55.14#ibcon#[25=USB\r\n] 2006.229.06:05:55.14#ibcon#*before write, iclass 20, count 0 2006.229.06:05:55.14#ibcon#enter sib2, iclass 20, count 0 2006.229.06:05:55.14#ibcon#flushed, iclass 20, count 0 2006.229.06:05:55.14#ibcon#about to write, iclass 20, count 0 2006.229.06:05:55.14#ibcon#wrote, iclass 20, count 0 2006.229.06:05:55.14#ibcon#about to read 3, iclass 20, count 0 2006.229.06:05:55.17#ibcon#read 3, iclass 20, count 0 2006.229.06:05:55.17#ibcon#about to read 4, iclass 20, count 0 2006.229.06:05:55.17#ibcon#read 4, iclass 20, count 0 2006.229.06:05:55.17#ibcon#about to read 5, iclass 20, count 0 2006.229.06:05:55.17#ibcon#read 5, iclass 20, count 0 2006.229.06:05:55.17#ibcon#about to read 6, iclass 20, count 0 2006.229.06:05:55.17#ibcon#read 6, iclass 20, count 0 2006.229.06:05:55.17#ibcon#end of sib2, iclass 20, count 0 2006.229.06:05:55.17#ibcon#*after write, iclass 20, count 0 2006.229.06:05:55.17#ibcon#*before return 0, iclass 20, count 0 2006.229.06:05:55.17#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:05:55.17#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:05:55.17#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:05:55.17#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:05:55.17$vck44/valo=7,864.99 2006.229.06:05:55.17#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.06:05:55.17#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.06:05:55.17#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:55.17#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:55.17#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:55.17#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:55.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:05:55.17#ibcon#first serial, iclass 23, count 0 2006.229.06:05:55.17#ibcon#enter sib2, iclass 23, count 0 2006.229.06:05:55.17#ibcon#flushed, iclass 23, count 0 2006.229.06:05:55.17#ibcon#about to write, iclass 23, count 0 2006.229.06:05:55.17#ibcon#wrote, iclass 23, count 0 2006.229.06:05:55.17#ibcon#about to read 3, iclass 23, count 0 2006.229.06:05:55.19#ibcon#read 3, iclass 23, count 0 2006.229.06:05:55.19#ibcon#about to read 4, iclass 23, count 0 2006.229.06:05:55.19#ibcon#read 4, iclass 23, count 0 2006.229.06:05:55.19#ibcon#about to read 5, iclass 23, count 0 2006.229.06:05:55.19#ibcon#read 5, iclass 23, count 0 2006.229.06:05:55.19#ibcon#about to read 6, iclass 23, count 0 2006.229.06:05:55.19#ibcon#read 6, iclass 23, count 0 2006.229.06:05:55.19#ibcon#end of sib2, iclass 23, count 0 2006.229.06:05:55.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:05:55.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:05:55.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:05:55.19#ibcon#*before write, iclass 23, count 0 2006.229.06:05:55.19#ibcon#enter sib2, iclass 23, count 0 2006.229.06:05:55.19#ibcon#flushed, iclass 23, count 0 2006.229.06:05:55.19#ibcon#about to write, iclass 23, count 0 2006.229.06:05:55.19#ibcon#wrote, iclass 23, count 0 2006.229.06:05:55.19#ibcon#about to read 3, iclass 23, count 0 2006.229.06:05:55.23#ibcon#read 3, iclass 23, count 0 2006.229.06:05:55.23#ibcon#about to read 4, iclass 23, count 0 2006.229.06:05:55.23#ibcon#read 4, iclass 23, count 0 2006.229.06:05:55.23#ibcon#about to read 5, iclass 23, count 0 2006.229.06:05:55.23#ibcon#read 5, iclass 23, count 0 2006.229.06:05:55.23#ibcon#about to read 6, iclass 23, count 0 2006.229.06:05:55.23#ibcon#read 6, iclass 23, count 0 2006.229.06:05:55.23#ibcon#end of sib2, iclass 23, count 0 2006.229.06:05:55.23#ibcon#*after write, iclass 23, count 0 2006.229.06:05:55.23#ibcon#*before return 0, iclass 23, count 0 2006.229.06:05:55.23#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:55.23#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:55.23#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:05:55.23#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:05:55.23$vck44/va=7,5 2006.229.06:05:55.23#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.06:05:55.23#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.06:05:55.23#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:55.23#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:55.29#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:55.29#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:55.29#ibcon#enter wrdev, iclass 25, count 2 2006.229.06:05:55.29#ibcon#first serial, iclass 25, count 2 2006.229.06:05:55.29#ibcon#enter sib2, iclass 25, count 2 2006.229.06:05:55.29#ibcon#flushed, iclass 25, count 2 2006.229.06:05:55.29#ibcon#about to write, iclass 25, count 2 2006.229.06:05:55.29#ibcon#wrote, iclass 25, count 2 2006.229.06:05:55.29#ibcon#about to read 3, iclass 25, count 2 2006.229.06:05:55.31#ibcon#read 3, iclass 25, count 2 2006.229.06:05:55.31#ibcon#about to read 4, iclass 25, count 2 2006.229.06:05:55.31#ibcon#read 4, iclass 25, count 2 2006.229.06:05:55.31#ibcon#about to read 5, iclass 25, count 2 2006.229.06:05:55.31#ibcon#read 5, iclass 25, count 2 2006.229.06:05:55.31#ibcon#about to read 6, iclass 25, count 2 2006.229.06:05:55.31#ibcon#read 6, iclass 25, count 2 2006.229.06:05:55.31#ibcon#end of sib2, iclass 25, count 2 2006.229.06:05:55.31#ibcon#*mode == 0, iclass 25, count 2 2006.229.06:05:55.31#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.06:05:55.31#ibcon#[25=AT07-05\r\n] 2006.229.06:05:55.31#ibcon#*before write, iclass 25, count 2 2006.229.06:05:55.31#ibcon#enter sib2, iclass 25, count 2 2006.229.06:05:55.31#ibcon#flushed, iclass 25, count 2 2006.229.06:05:55.31#ibcon#about to write, iclass 25, count 2 2006.229.06:05:55.31#ibcon#wrote, iclass 25, count 2 2006.229.06:05:55.31#ibcon#about to read 3, iclass 25, count 2 2006.229.06:05:55.34#ibcon#read 3, iclass 25, count 2 2006.229.06:05:55.34#ibcon#about to read 4, iclass 25, count 2 2006.229.06:05:55.34#ibcon#read 4, iclass 25, count 2 2006.229.06:05:55.34#ibcon#about to read 5, iclass 25, count 2 2006.229.06:05:55.34#ibcon#read 5, iclass 25, count 2 2006.229.06:05:55.34#ibcon#about to read 6, iclass 25, count 2 2006.229.06:05:55.34#ibcon#read 6, iclass 25, count 2 2006.229.06:05:55.34#ibcon#end of sib2, iclass 25, count 2 2006.229.06:05:55.52#ibcon#*after write, iclass 25, count 2 2006.229.06:05:55.52#ibcon#*before return 0, iclass 25, count 2 2006.229.06:05:55.52#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:55.52#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:55.52#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.06:05:55.52#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:55.52#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:55.64#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:55.64#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:55.64#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:05:55.64#ibcon#first serial, iclass 25, count 0 2006.229.06:05:55.64#ibcon#enter sib2, iclass 25, count 0 2006.229.06:05:55.64#ibcon#flushed, iclass 25, count 0 2006.229.06:05:55.64#ibcon#about to write, iclass 25, count 0 2006.229.06:05:55.64#ibcon#wrote, iclass 25, count 0 2006.229.06:05:55.64#ibcon#about to read 3, iclass 25, count 0 2006.229.06:05:55.66#ibcon#read 3, iclass 25, count 0 2006.229.06:05:55.66#ibcon#about to read 4, iclass 25, count 0 2006.229.06:05:55.66#ibcon#read 4, iclass 25, count 0 2006.229.06:05:55.66#ibcon#about to read 5, iclass 25, count 0 2006.229.06:05:55.66#ibcon#read 5, iclass 25, count 0 2006.229.06:05:55.66#ibcon#about to read 6, iclass 25, count 0 2006.229.06:05:55.66#ibcon#read 6, iclass 25, count 0 2006.229.06:05:55.66#ibcon#end of sib2, iclass 25, count 0 2006.229.06:05:55.66#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:05:55.66#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:05:55.66#ibcon#[25=USB\r\n] 2006.229.06:05:55.66#ibcon#*before write, iclass 25, count 0 2006.229.06:05:55.66#ibcon#enter sib2, iclass 25, count 0 2006.229.06:05:55.66#ibcon#flushed, iclass 25, count 0 2006.229.06:05:55.66#ibcon#about to write, iclass 25, count 0 2006.229.06:05:55.66#ibcon#wrote, iclass 25, count 0 2006.229.06:05:55.66#ibcon#about to read 3, iclass 25, count 0 2006.229.06:05:55.69#ibcon#read 3, iclass 25, count 0 2006.229.06:05:55.69#ibcon#about to read 4, iclass 25, count 0 2006.229.06:05:55.69#ibcon#read 4, iclass 25, count 0 2006.229.06:05:55.69#ibcon#about to read 5, iclass 25, count 0 2006.229.06:05:55.69#ibcon#read 5, iclass 25, count 0 2006.229.06:05:55.69#ibcon#about to read 6, iclass 25, count 0 2006.229.06:05:55.69#ibcon#read 6, iclass 25, count 0 2006.229.06:05:55.69#ibcon#end of sib2, iclass 25, count 0 2006.229.06:05:55.69#ibcon#*after write, iclass 25, count 0 2006.229.06:05:55.69#ibcon#*before return 0, iclass 25, count 0 2006.229.06:05:55.69#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:55.69#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:55.69#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:05:55.69#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:05:55.69$vck44/valo=8,884.99 2006.229.06:05:55.69#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.06:05:55.69#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.06:05:55.69#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:55.69#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:55.69#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:55.69#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:55.69#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:05:55.69#ibcon#first serial, iclass 27, count 0 2006.229.06:05:55.69#ibcon#enter sib2, iclass 27, count 0 2006.229.06:05:55.69#ibcon#flushed, iclass 27, count 0 2006.229.06:05:55.69#ibcon#about to write, iclass 27, count 0 2006.229.06:05:55.69#ibcon#wrote, iclass 27, count 0 2006.229.06:05:55.69#ibcon#about to read 3, iclass 27, count 0 2006.229.06:05:55.71#ibcon#read 3, iclass 27, count 0 2006.229.06:05:55.71#ibcon#about to read 4, iclass 27, count 0 2006.229.06:05:55.71#ibcon#read 4, iclass 27, count 0 2006.229.06:05:55.71#ibcon#about to read 5, iclass 27, count 0 2006.229.06:05:55.71#ibcon#read 5, iclass 27, count 0 2006.229.06:05:55.71#ibcon#about to read 6, iclass 27, count 0 2006.229.06:05:55.71#ibcon#read 6, iclass 27, count 0 2006.229.06:05:55.71#ibcon#end of sib2, iclass 27, count 0 2006.229.06:05:55.71#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:05:55.71#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:05:55.71#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:05:55.71#ibcon#*before write, iclass 27, count 0 2006.229.06:05:55.71#ibcon#enter sib2, iclass 27, count 0 2006.229.06:05:55.71#ibcon#flushed, iclass 27, count 0 2006.229.06:05:55.71#ibcon#about to write, iclass 27, count 0 2006.229.06:05:55.71#ibcon#wrote, iclass 27, count 0 2006.229.06:05:55.71#ibcon#about to read 3, iclass 27, count 0 2006.229.06:05:55.75#ibcon#read 3, iclass 27, count 0 2006.229.06:05:55.75#ibcon#about to read 4, iclass 27, count 0 2006.229.06:05:55.75#ibcon#read 4, iclass 27, count 0 2006.229.06:05:55.75#ibcon#about to read 5, iclass 27, count 0 2006.229.06:05:55.75#ibcon#read 5, iclass 27, count 0 2006.229.06:05:55.75#ibcon#about to read 6, iclass 27, count 0 2006.229.06:05:55.75#ibcon#read 6, iclass 27, count 0 2006.229.06:05:55.75#ibcon#end of sib2, iclass 27, count 0 2006.229.06:05:55.75#ibcon#*after write, iclass 27, count 0 2006.229.06:05:55.75#ibcon#*before return 0, iclass 27, count 0 2006.229.06:05:55.75#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:55.75#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:55.75#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:05:55.75#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:05:55.75$vck44/va=8,6 2006.229.06:05:55.75#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.06:05:55.75#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.06:05:55.75#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:55.75#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:05:55.81#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:05:55.81#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:05:55.81#ibcon#enter wrdev, iclass 29, count 2 2006.229.06:05:55.81#ibcon#first serial, iclass 29, count 2 2006.229.06:05:55.81#ibcon#enter sib2, iclass 29, count 2 2006.229.06:05:55.81#ibcon#flushed, iclass 29, count 2 2006.229.06:05:55.81#ibcon#about to write, iclass 29, count 2 2006.229.06:05:55.81#ibcon#wrote, iclass 29, count 2 2006.229.06:05:55.81#ibcon#about to read 3, iclass 29, count 2 2006.229.06:05:55.83#ibcon#read 3, iclass 29, count 2 2006.229.06:05:55.83#ibcon#about to read 4, iclass 29, count 2 2006.229.06:05:55.83#ibcon#read 4, iclass 29, count 2 2006.229.06:05:55.83#ibcon#about to read 5, iclass 29, count 2 2006.229.06:05:55.83#ibcon#read 5, iclass 29, count 2 2006.229.06:05:55.83#ibcon#about to read 6, iclass 29, count 2 2006.229.06:05:55.83#ibcon#read 6, iclass 29, count 2 2006.229.06:05:55.83#ibcon#end of sib2, iclass 29, count 2 2006.229.06:05:55.83#ibcon#*mode == 0, iclass 29, count 2 2006.229.06:05:55.83#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.06:05:55.83#ibcon#[25=AT08-06\r\n] 2006.229.06:05:55.83#ibcon#*before write, iclass 29, count 2 2006.229.06:05:55.83#ibcon#enter sib2, iclass 29, count 2 2006.229.06:05:55.83#ibcon#flushed, iclass 29, count 2 2006.229.06:05:55.83#ibcon#about to write, iclass 29, count 2 2006.229.06:05:55.83#ibcon#wrote, iclass 29, count 2 2006.229.06:05:55.83#ibcon#about to read 3, iclass 29, count 2 2006.229.06:05:55.86#ibcon#read 3, iclass 29, count 2 2006.229.06:05:55.86#ibcon#about to read 4, iclass 29, count 2 2006.229.06:05:55.86#ibcon#read 4, iclass 29, count 2 2006.229.06:05:55.86#ibcon#about to read 5, iclass 29, count 2 2006.229.06:05:55.86#ibcon#read 5, iclass 29, count 2 2006.229.06:05:55.86#ibcon#about to read 6, iclass 29, count 2 2006.229.06:05:55.86#ibcon#read 6, iclass 29, count 2 2006.229.06:05:55.86#ibcon#end of sib2, iclass 29, count 2 2006.229.06:05:55.86#ibcon#*after write, iclass 29, count 2 2006.229.06:05:55.86#ibcon#*before return 0, iclass 29, count 2 2006.229.06:05:55.86#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:05:55.86#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:05:55.86#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.06:05:55.86#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:55.86#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:05:55.98#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:05:55.98#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:05:55.98#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:05:55.98#ibcon#first serial, iclass 29, count 0 2006.229.06:05:55.98#ibcon#enter sib2, iclass 29, count 0 2006.229.06:05:55.98#ibcon#flushed, iclass 29, count 0 2006.229.06:05:55.98#ibcon#about to write, iclass 29, count 0 2006.229.06:05:55.98#ibcon#wrote, iclass 29, count 0 2006.229.06:05:55.98#ibcon#about to read 3, iclass 29, count 0 2006.229.06:05:56.00#ibcon#read 3, iclass 29, count 0 2006.229.06:05:56.00#ibcon#about to read 4, iclass 29, count 0 2006.229.06:05:56.00#ibcon#read 4, iclass 29, count 0 2006.229.06:05:56.00#ibcon#about to read 5, iclass 29, count 0 2006.229.06:05:56.00#ibcon#read 5, iclass 29, count 0 2006.229.06:05:56.00#ibcon#about to read 6, iclass 29, count 0 2006.229.06:05:56.00#ibcon#read 6, iclass 29, count 0 2006.229.06:05:56.00#ibcon#end of sib2, iclass 29, count 0 2006.229.06:05:56.00#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:05:56.00#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:05:56.00#ibcon#[25=USB\r\n] 2006.229.06:05:56.00#ibcon#*before write, iclass 29, count 0 2006.229.06:05:56.00#ibcon#enter sib2, iclass 29, count 0 2006.229.06:05:56.00#ibcon#flushed, iclass 29, count 0 2006.229.06:05:56.00#ibcon#about to write, iclass 29, count 0 2006.229.06:05:56.00#ibcon#wrote, iclass 29, count 0 2006.229.06:05:56.00#ibcon#about to read 3, iclass 29, count 0 2006.229.06:05:56.03#ibcon#read 3, iclass 29, count 0 2006.229.06:05:56.03#ibcon#about to read 4, iclass 29, count 0 2006.229.06:05:56.03#ibcon#read 4, iclass 29, count 0 2006.229.06:05:56.03#ibcon#about to read 5, iclass 29, count 0 2006.229.06:05:56.03#ibcon#read 5, iclass 29, count 0 2006.229.06:05:56.03#ibcon#about to read 6, iclass 29, count 0 2006.229.06:05:56.03#ibcon#read 6, iclass 29, count 0 2006.229.06:05:56.03#ibcon#end of sib2, iclass 29, count 0 2006.229.06:05:56.03#ibcon#*after write, iclass 29, count 0 2006.229.06:05:56.03#ibcon#*before return 0, iclass 29, count 0 2006.229.06:05:56.03#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:05:56.03#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:05:56.03#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:05:56.03#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:05:56.03$vck44/vblo=1,629.99 2006.229.06:05:56.03#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:05:56.03#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:05:56.03#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:56.03#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:56.03#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:56.03#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:56.03#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:05:56.03#ibcon#first serial, iclass 31, count 0 2006.229.06:05:56.03#ibcon#enter sib2, iclass 31, count 0 2006.229.06:05:56.03#ibcon#flushed, iclass 31, count 0 2006.229.06:05:56.03#ibcon#about to write, iclass 31, count 0 2006.229.06:05:56.03#ibcon#wrote, iclass 31, count 0 2006.229.06:05:56.03#ibcon#about to read 3, iclass 31, count 0 2006.229.06:05:56.05#ibcon#read 3, iclass 31, count 0 2006.229.06:05:56.05#ibcon#about to read 4, iclass 31, count 0 2006.229.06:05:56.05#ibcon#read 4, iclass 31, count 0 2006.229.06:05:56.05#ibcon#about to read 5, iclass 31, count 0 2006.229.06:05:56.05#ibcon#read 5, iclass 31, count 0 2006.229.06:05:56.05#ibcon#about to read 6, iclass 31, count 0 2006.229.06:05:56.05#ibcon#read 6, iclass 31, count 0 2006.229.06:05:56.05#ibcon#end of sib2, iclass 31, count 0 2006.229.06:05:56.05#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:05:56.05#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:05:56.05#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:05:56.05#ibcon#*before write, iclass 31, count 0 2006.229.06:05:56.05#ibcon#enter sib2, iclass 31, count 0 2006.229.06:05:56.05#ibcon#flushed, iclass 31, count 0 2006.229.06:05:56.05#ibcon#about to write, iclass 31, count 0 2006.229.06:05:56.05#ibcon#wrote, iclass 31, count 0 2006.229.06:05:56.05#ibcon#about to read 3, iclass 31, count 0 2006.229.06:05:56.09#ibcon#read 3, iclass 31, count 0 2006.229.06:05:56.09#ibcon#about to read 4, iclass 31, count 0 2006.229.06:05:56.09#ibcon#read 4, iclass 31, count 0 2006.229.06:05:56.09#ibcon#about to read 5, iclass 31, count 0 2006.229.06:05:56.09#ibcon#read 5, iclass 31, count 0 2006.229.06:05:56.09#ibcon#about to read 6, iclass 31, count 0 2006.229.06:05:56.09#ibcon#read 6, iclass 31, count 0 2006.229.06:05:56.09#ibcon#end of sib2, iclass 31, count 0 2006.229.06:05:56.09#ibcon#*after write, iclass 31, count 0 2006.229.06:05:56.09#ibcon#*before return 0, iclass 31, count 0 2006.229.06:05:56.09#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:56.09#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:05:56.09#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:05:56.09#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:05:56.09$vck44/vb=1,4 2006.229.06:05:56.09#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.06:05:56.09#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.06:05:56.09#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:56.09#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:56.09#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:56.09#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:56.09#ibcon#enter wrdev, iclass 33, count 2 2006.229.06:05:56.09#ibcon#first serial, iclass 33, count 2 2006.229.06:05:56.09#ibcon#enter sib2, iclass 33, count 2 2006.229.06:05:56.09#ibcon#flushed, iclass 33, count 2 2006.229.06:05:56.09#ibcon#about to write, iclass 33, count 2 2006.229.06:05:56.09#ibcon#wrote, iclass 33, count 2 2006.229.06:05:56.09#ibcon#about to read 3, iclass 33, count 2 2006.229.06:05:56.11#ibcon#read 3, iclass 33, count 2 2006.229.06:05:56.11#ibcon#about to read 4, iclass 33, count 2 2006.229.06:05:56.11#ibcon#read 4, iclass 33, count 2 2006.229.06:05:56.11#ibcon#about to read 5, iclass 33, count 2 2006.229.06:05:56.11#ibcon#read 5, iclass 33, count 2 2006.229.06:05:56.11#ibcon#about to read 6, iclass 33, count 2 2006.229.06:05:56.11#ibcon#read 6, iclass 33, count 2 2006.229.06:05:56.11#ibcon#end of sib2, iclass 33, count 2 2006.229.06:05:56.11#ibcon#*mode == 0, iclass 33, count 2 2006.229.06:05:56.11#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.06:05:56.11#ibcon#[27=AT01-04\r\n] 2006.229.06:05:56.11#ibcon#*before write, iclass 33, count 2 2006.229.06:05:56.11#ibcon#enter sib2, iclass 33, count 2 2006.229.06:05:56.11#ibcon#flushed, iclass 33, count 2 2006.229.06:05:56.11#ibcon#about to write, iclass 33, count 2 2006.229.06:05:56.11#ibcon#wrote, iclass 33, count 2 2006.229.06:05:56.11#ibcon#about to read 3, iclass 33, count 2 2006.229.06:05:56.14#ibcon#read 3, iclass 33, count 2 2006.229.06:05:56.14#ibcon#about to read 4, iclass 33, count 2 2006.229.06:05:56.14#ibcon#read 4, iclass 33, count 2 2006.229.06:05:56.14#ibcon#about to read 5, iclass 33, count 2 2006.229.06:05:56.14#ibcon#read 5, iclass 33, count 2 2006.229.06:05:56.14#ibcon#about to read 6, iclass 33, count 2 2006.229.06:05:56.14#ibcon#read 6, iclass 33, count 2 2006.229.06:05:56.14#ibcon#end of sib2, iclass 33, count 2 2006.229.06:05:56.14#ibcon#*after write, iclass 33, count 2 2006.229.06:05:56.14#ibcon#*before return 0, iclass 33, count 2 2006.229.06:05:56.14#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:56.14#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:05:56.14#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.06:05:56.14#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:56.14#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:56.26#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:56.26#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:56.26#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:05:56.26#ibcon#first serial, iclass 33, count 0 2006.229.06:05:56.26#ibcon#enter sib2, iclass 33, count 0 2006.229.06:05:56.26#ibcon#flushed, iclass 33, count 0 2006.229.06:05:56.26#ibcon#about to write, iclass 33, count 0 2006.229.06:05:56.26#ibcon#wrote, iclass 33, count 0 2006.229.06:05:56.26#ibcon#about to read 3, iclass 33, count 0 2006.229.06:05:56.28#ibcon#read 3, iclass 33, count 0 2006.229.06:05:56.28#ibcon#about to read 4, iclass 33, count 0 2006.229.06:05:56.28#ibcon#read 4, iclass 33, count 0 2006.229.06:05:56.28#ibcon#about to read 5, iclass 33, count 0 2006.229.06:05:56.28#ibcon#read 5, iclass 33, count 0 2006.229.06:05:56.28#ibcon#about to read 6, iclass 33, count 0 2006.229.06:05:56.28#ibcon#read 6, iclass 33, count 0 2006.229.06:05:56.28#ibcon#end of sib2, iclass 33, count 0 2006.229.06:05:56.28#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:05:56.28#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:05:56.28#ibcon#[27=USB\r\n] 2006.229.06:05:56.28#ibcon#*before write, iclass 33, count 0 2006.229.06:05:56.28#ibcon#enter sib2, iclass 33, count 0 2006.229.06:05:56.28#ibcon#flushed, iclass 33, count 0 2006.229.06:05:56.28#ibcon#about to write, iclass 33, count 0 2006.229.06:05:56.28#ibcon#wrote, iclass 33, count 0 2006.229.06:05:56.28#ibcon#about to read 3, iclass 33, count 0 2006.229.06:05:56.31#ibcon#read 3, iclass 33, count 0 2006.229.06:05:56.31#ibcon#about to read 4, iclass 33, count 0 2006.229.06:05:56.31#ibcon#read 4, iclass 33, count 0 2006.229.06:05:56.31#ibcon#about to read 5, iclass 33, count 0 2006.229.06:05:56.31#ibcon#read 5, iclass 33, count 0 2006.229.06:05:56.31#ibcon#about to read 6, iclass 33, count 0 2006.229.06:05:56.31#ibcon#read 6, iclass 33, count 0 2006.229.06:05:56.31#ibcon#end of sib2, iclass 33, count 0 2006.229.06:05:56.31#ibcon#*after write, iclass 33, count 0 2006.229.06:05:56.31#ibcon#*before return 0, iclass 33, count 0 2006.229.06:05:56.31#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:56.31#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:05:56.31#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:05:56.31#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:05:56.31$vck44/vblo=2,634.99 2006.229.06:05:56.31#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.06:05:56.31#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.06:05:56.31#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:56.31#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:56.31#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:56.31#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:56.31#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:05:56.31#ibcon#first serial, iclass 35, count 0 2006.229.06:05:56.31#ibcon#enter sib2, iclass 35, count 0 2006.229.06:05:56.31#ibcon#flushed, iclass 35, count 0 2006.229.06:05:56.31#ibcon#about to write, iclass 35, count 0 2006.229.06:05:56.31#ibcon#wrote, iclass 35, count 0 2006.229.06:05:56.31#ibcon#about to read 3, iclass 35, count 0 2006.229.06:05:56.33#ibcon#read 3, iclass 35, count 0 2006.229.06:05:56.33#ibcon#about to read 4, iclass 35, count 0 2006.229.06:05:56.33#ibcon#read 4, iclass 35, count 0 2006.229.06:05:56.33#ibcon#about to read 5, iclass 35, count 0 2006.229.06:05:56.33#ibcon#read 5, iclass 35, count 0 2006.229.06:05:56.33#ibcon#about to read 6, iclass 35, count 0 2006.229.06:05:56.33#ibcon#read 6, iclass 35, count 0 2006.229.06:05:56.33#ibcon#end of sib2, iclass 35, count 0 2006.229.06:05:56.33#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:05:56.33#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:05:56.33#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:05:56.33#ibcon#*before write, iclass 35, count 0 2006.229.06:05:56.33#ibcon#enter sib2, iclass 35, count 0 2006.229.06:05:56.33#ibcon#flushed, iclass 35, count 0 2006.229.06:05:56.33#ibcon#about to write, iclass 35, count 0 2006.229.06:05:56.33#ibcon#wrote, iclass 35, count 0 2006.229.06:05:56.33#ibcon#about to read 3, iclass 35, count 0 2006.229.06:05:56.37#ibcon#read 3, iclass 35, count 0 2006.229.06:05:56.37#ibcon#about to read 4, iclass 35, count 0 2006.229.06:05:56.37#ibcon#read 4, iclass 35, count 0 2006.229.06:05:56.37#ibcon#about to read 5, iclass 35, count 0 2006.229.06:05:56.37#ibcon#read 5, iclass 35, count 0 2006.229.06:05:56.37#ibcon#about to read 6, iclass 35, count 0 2006.229.06:05:56.37#ibcon#read 6, iclass 35, count 0 2006.229.06:05:56.37#ibcon#end of sib2, iclass 35, count 0 2006.229.06:05:56.37#ibcon#*after write, iclass 35, count 0 2006.229.06:05:56.37#ibcon#*before return 0, iclass 35, count 0 2006.229.06:05:56.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:56.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:05:56.37#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:05:56.37#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:05:56.37$vck44/vb=2,4 2006.229.06:05:56.37#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.06:05:56.37#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.06:05:56.37#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:56.37#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:56.43#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:56.43#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:56.43#ibcon#enter wrdev, iclass 37, count 2 2006.229.06:05:56.43#ibcon#first serial, iclass 37, count 2 2006.229.06:05:56.43#ibcon#enter sib2, iclass 37, count 2 2006.229.06:05:56.43#ibcon#flushed, iclass 37, count 2 2006.229.06:05:56.43#ibcon#about to write, iclass 37, count 2 2006.229.06:05:56.43#ibcon#wrote, iclass 37, count 2 2006.229.06:05:56.43#ibcon#about to read 3, iclass 37, count 2 2006.229.06:05:56.45#ibcon#read 3, iclass 37, count 2 2006.229.06:05:56.45#ibcon#about to read 4, iclass 37, count 2 2006.229.06:05:56.45#ibcon#read 4, iclass 37, count 2 2006.229.06:05:56.45#ibcon#about to read 5, iclass 37, count 2 2006.229.06:05:56.45#ibcon#read 5, iclass 37, count 2 2006.229.06:05:56.45#ibcon#about to read 6, iclass 37, count 2 2006.229.06:05:56.45#ibcon#read 6, iclass 37, count 2 2006.229.06:05:56.45#ibcon#end of sib2, iclass 37, count 2 2006.229.06:05:56.45#ibcon#*mode == 0, iclass 37, count 2 2006.229.06:05:56.45#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.06:05:56.45#ibcon#[27=AT02-04\r\n] 2006.229.06:05:56.45#ibcon#*before write, iclass 37, count 2 2006.229.06:05:56.45#ibcon#enter sib2, iclass 37, count 2 2006.229.06:05:56.45#ibcon#flushed, iclass 37, count 2 2006.229.06:05:56.45#ibcon#about to write, iclass 37, count 2 2006.229.06:05:56.45#ibcon#wrote, iclass 37, count 2 2006.229.06:05:56.45#ibcon#about to read 3, iclass 37, count 2 2006.229.06:05:56.48#ibcon#read 3, iclass 37, count 2 2006.229.06:05:56.48#ibcon#about to read 4, iclass 37, count 2 2006.229.06:05:56.48#ibcon#read 4, iclass 37, count 2 2006.229.06:05:56.48#ibcon#about to read 5, iclass 37, count 2 2006.229.06:05:56.48#ibcon#read 5, iclass 37, count 2 2006.229.06:05:56.48#ibcon#about to read 6, iclass 37, count 2 2006.229.06:05:56.48#ibcon#read 6, iclass 37, count 2 2006.229.06:05:56.48#ibcon#end of sib2, iclass 37, count 2 2006.229.06:05:56.48#ibcon#*after write, iclass 37, count 2 2006.229.06:05:56.48#ibcon#*before return 0, iclass 37, count 2 2006.229.06:05:56.48#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:56.48#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:05:56.48#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.06:05:56.48#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:56.48#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:56.60#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:56.60#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:56.60#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:05:56.60#ibcon#first serial, iclass 37, count 0 2006.229.06:05:56.60#ibcon#enter sib2, iclass 37, count 0 2006.229.06:05:56.60#ibcon#flushed, iclass 37, count 0 2006.229.06:05:56.60#ibcon#about to write, iclass 37, count 0 2006.229.06:05:56.60#ibcon#wrote, iclass 37, count 0 2006.229.06:05:56.60#ibcon#about to read 3, iclass 37, count 0 2006.229.06:05:56.62#ibcon#read 3, iclass 37, count 0 2006.229.06:05:56.62#ibcon#about to read 4, iclass 37, count 0 2006.229.06:05:56.62#ibcon#read 4, iclass 37, count 0 2006.229.06:05:56.62#ibcon#about to read 5, iclass 37, count 0 2006.229.06:05:56.62#ibcon#read 5, iclass 37, count 0 2006.229.06:05:56.62#ibcon#about to read 6, iclass 37, count 0 2006.229.06:05:56.62#ibcon#read 6, iclass 37, count 0 2006.229.06:05:56.62#ibcon#end of sib2, iclass 37, count 0 2006.229.06:05:56.62#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:05:56.62#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:05:56.62#ibcon#[27=USB\r\n] 2006.229.06:05:56.62#ibcon#*before write, iclass 37, count 0 2006.229.06:05:56.62#ibcon#enter sib2, iclass 37, count 0 2006.229.06:05:56.62#ibcon#flushed, iclass 37, count 0 2006.229.06:05:56.62#ibcon#about to write, iclass 37, count 0 2006.229.06:05:56.62#ibcon#wrote, iclass 37, count 0 2006.229.06:05:56.62#ibcon#about to read 3, iclass 37, count 0 2006.229.06:05:56.65#ibcon#read 3, iclass 37, count 0 2006.229.06:05:56.65#ibcon#about to read 4, iclass 37, count 0 2006.229.06:05:56.65#ibcon#read 4, iclass 37, count 0 2006.229.06:05:56.65#ibcon#about to read 5, iclass 37, count 0 2006.229.06:05:56.65#ibcon#read 5, iclass 37, count 0 2006.229.06:05:56.65#ibcon#about to read 6, iclass 37, count 0 2006.229.06:05:56.65#ibcon#read 6, iclass 37, count 0 2006.229.06:05:56.65#ibcon#end of sib2, iclass 37, count 0 2006.229.06:05:56.65#ibcon#*after write, iclass 37, count 0 2006.229.06:05:56.65#ibcon#*before return 0, iclass 37, count 0 2006.229.06:05:56.65#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:56.65#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:05:56.65#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:05:56.65#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:05:56.65$vck44/vblo=3,649.99 2006.229.06:05:56.65#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.06:05:56.65#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.06:05:56.65#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:56.65#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:56.65#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:56.65#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:56.65#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:05:56.65#ibcon#first serial, iclass 39, count 0 2006.229.06:05:56.65#ibcon#enter sib2, iclass 39, count 0 2006.229.06:05:56.65#ibcon#flushed, iclass 39, count 0 2006.229.06:05:56.65#ibcon#about to write, iclass 39, count 0 2006.229.06:05:56.65#ibcon#wrote, iclass 39, count 0 2006.229.06:05:56.65#ibcon#about to read 3, iclass 39, count 0 2006.229.06:05:56.67#ibcon#read 3, iclass 39, count 0 2006.229.06:05:56.67#ibcon#about to read 4, iclass 39, count 0 2006.229.06:05:56.67#ibcon#read 4, iclass 39, count 0 2006.229.06:05:56.67#ibcon#about to read 5, iclass 39, count 0 2006.229.06:05:56.67#ibcon#read 5, iclass 39, count 0 2006.229.06:05:56.67#ibcon#about to read 6, iclass 39, count 0 2006.229.06:05:56.67#ibcon#read 6, iclass 39, count 0 2006.229.06:05:56.67#ibcon#end of sib2, iclass 39, count 0 2006.229.06:05:56.67#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:05:56.67#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:05:56.67#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:05:56.67#ibcon#*before write, iclass 39, count 0 2006.229.06:05:56.67#ibcon#enter sib2, iclass 39, count 0 2006.229.06:05:56.67#ibcon#flushed, iclass 39, count 0 2006.229.06:05:56.67#ibcon#about to write, iclass 39, count 0 2006.229.06:05:56.67#ibcon#wrote, iclass 39, count 0 2006.229.06:05:56.67#ibcon#about to read 3, iclass 39, count 0 2006.229.06:05:56.71#ibcon#read 3, iclass 39, count 0 2006.229.06:05:56.71#ibcon#about to read 4, iclass 39, count 0 2006.229.06:05:56.71#ibcon#read 4, iclass 39, count 0 2006.229.06:05:56.71#ibcon#about to read 5, iclass 39, count 0 2006.229.06:05:56.71#ibcon#read 5, iclass 39, count 0 2006.229.06:05:56.71#ibcon#about to read 6, iclass 39, count 0 2006.229.06:05:56.71#ibcon#read 6, iclass 39, count 0 2006.229.06:05:56.71#ibcon#end of sib2, iclass 39, count 0 2006.229.06:05:56.71#ibcon#*after write, iclass 39, count 0 2006.229.06:05:56.71#ibcon#*before return 0, iclass 39, count 0 2006.229.06:05:56.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:56.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:05:56.71#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:05:56.71#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:05:56.71$vck44/vb=3,4 2006.229.06:05:56.71#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:05:56.71#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:05:56.71#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:56.71#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:56.77#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:56.77#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:56.77#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:05:56.77#ibcon#first serial, iclass 3, count 2 2006.229.06:05:56.77#ibcon#enter sib2, iclass 3, count 2 2006.229.06:05:56.77#ibcon#flushed, iclass 3, count 2 2006.229.06:05:56.77#ibcon#about to write, iclass 3, count 2 2006.229.06:05:56.77#ibcon#wrote, iclass 3, count 2 2006.229.06:05:56.77#ibcon#about to read 3, iclass 3, count 2 2006.229.06:05:56.79#ibcon#read 3, iclass 3, count 2 2006.229.06:05:56.79#ibcon#about to read 4, iclass 3, count 2 2006.229.06:05:56.79#ibcon#read 4, iclass 3, count 2 2006.229.06:05:56.79#ibcon#about to read 5, iclass 3, count 2 2006.229.06:05:56.79#ibcon#read 5, iclass 3, count 2 2006.229.06:05:56.79#ibcon#about to read 6, iclass 3, count 2 2006.229.06:05:56.79#ibcon#read 6, iclass 3, count 2 2006.229.06:05:56.79#ibcon#end of sib2, iclass 3, count 2 2006.229.06:05:56.79#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:05:56.79#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:05:56.79#ibcon#[27=AT03-04\r\n] 2006.229.06:05:56.79#ibcon#*before write, iclass 3, count 2 2006.229.06:05:56.79#ibcon#enter sib2, iclass 3, count 2 2006.229.06:05:56.79#ibcon#flushed, iclass 3, count 2 2006.229.06:05:56.79#ibcon#about to write, iclass 3, count 2 2006.229.06:05:56.79#ibcon#wrote, iclass 3, count 2 2006.229.06:05:56.79#ibcon#about to read 3, iclass 3, count 2 2006.229.06:05:56.82#ibcon#read 3, iclass 3, count 2 2006.229.06:05:56.96#ibcon#about to read 4, iclass 3, count 2 2006.229.06:05:56.96#ibcon#read 4, iclass 3, count 2 2006.229.06:05:56.96#ibcon#about to read 5, iclass 3, count 2 2006.229.06:05:56.96#ibcon#read 5, iclass 3, count 2 2006.229.06:05:56.97#ibcon#about to read 6, iclass 3, count 2 2006.229.06:05:56.97#ibcon#read 6, iclass 3, count 2 2006.229.06:05:56.97#ibcon#end of sib2, iclass 3, count 2 2006.229.06:05:56.97#ibcon#*after write, iclass 3, count 2 2006.229.06:05:56.97#ibcon#*before return 0, iclass 3, count 2 2006.229.06:05:56.97#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:56.97#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:05:56.97#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:05:56.97#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:56.97#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:57.09#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:57.09#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:57.09#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:05:57.09#ibcon#first serial, iclass 3, count 0 2006.229.06:05:57.09#ibcon#enter sib2, iclass 3, count 0 2006.229.06:05:57.09#ibcon#flushed, iclass 3, count 0 2006.229.06:05:57.09#ibcon#about to write, iclass 3, count 0 2006.229.06:05:57.09#ibcon#wrote, iclass 3, count 0 2006.229.06:05:57.09#ibcon#about to read 3, iclass 3, count 0 2006.229.06:05:57.11#ibcon#read 3, iclass 3, count 0 2006.229.06:05:57.11#ibcon#about to read 4, iclass 3, count 0 2006.229.06:05:57.11#ibcon#read 4, iclass 3, count 0 2006.229.06:05:57.11#ibcon#about to read 5, iclass 3, count 0 2006.229.06:05:57.11#ibcon#read 5, iclass 3, count 0 2006.229.06:05:57.11#ibcon#about to read 6, iclass 3, count 0 2006.229.06:05:57.11#ibcon#read 6, iclass 3, count 0 2006.229.06:05:57.11#ibcon#end of sib2, iclass 3, count 0 2006.229.06:05:57.11#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:05:57.11#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:05:57.11#ibcon#[27=USB\r\n] 2006.229.06:05:57.11#ibcon#*before write, iclass 3, count 0 2006.229.06:05:57.11#ibcon#enter sib2, iclass 3, count 0 2006.229.06:05:57.11#ibcon#flushed, iclass 3, count 0 2006.229.06:05:57.11#ibcon#about to write, iclass 3, count 0 2006.229.06:05:57.11#ibcon#wrote, iclass 3, count 0 2006.229.06:05:57.11#ibcon#about to read 3, iclass 3, count 0 2006.229.06:05:57.14#ibcon#read 3, iclass 3, count 0 2006.229.06:05:57.14#ibcon#about to read 4, iclass 3, count 0 2006.229.06:05:57.14#ibcon#read 4, iclass 3, count 0 2006.229.06:05:57.14#ibcon#about to read 5, iclass 3, count 0 2006.229.06:05:57.14#ibcon#read 5, iclass 3, count 0 2006.229.06:05:57.14#ibcon#about to read 6, iclass 3, count 0 2006.229.06:05:57.14#ibcon#read 6, iclass 3, count 0 2006.229.06:05:57.14#ibcon#end of sib2, iclass 3, count 0 2006.229.06:05:57.14#ibcon#*after write, iclass 3, count 0 2006.229.06:05:57.14#ibcon#*before return 0, iclass 3, count 0 2006.229.06:05:57.14#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:57.14#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:05:57.14#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:05:57.14#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:05:57.14$vck44/vblo=4,679.99 2006.229.06:05:57.14#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.06:05:57.14#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.06:05:57.14#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:57.14#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:57.14#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:57.14#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:57.14#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:05:57.14#ibcon#first serial, iclass 5, count 0 2006.229.06:05:57.14#ibcon#enter sib2, iclass 5, count 0 2006.229.06:05:57.14#ibcon#flushed, iclass 5, count 0 2006.229.06:05:57.14#ibcon#about to write, iclass 5, count 0 2006.229.06:05:57.14#ibcon#wrote, iclass 5, count 0 2006.229.06:05:57.14#ibcon#about to read 3, iclass 5, count 0 2006.229.06:05:57.16#ibcon#read 3, iclass 5, count 0 2006.229.06:05:57.16#ibcon#about to read 4, iclass 5, count 0 2006.229.06:05:57.16#ibcon#read 4, iclass 5, count 0 2006.229.06:05:57.16#ibcon#about to read 5, iclass 5, count 0 2006.229.06:05:57.16#ibcon#read 5, iclass 5, count 0 2006.229.06:05:57.16#ibcon#about to read 6, iclass 5, count 0 2006.229.06:05:57.16#ibcon#read 6, iclass 5, count 0 2006.229.06:05:57.16#ibcon#end of sib2, iclass 5, count 0 2006.229.06:05:57.16#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:05:57.16#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:05:57.16#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:05:57.16#ibcon#*before write, iclass 5, count 0 2006.229.06:05:57.16#ibcon#enter sib2, iclass 5, count 0 2006.229.06:05:57.16#ibcon#flushed, iclass 5, count 0 2006.229.06:05:57.16#ibcon#about to write, iclass 5, count 0 2006.229.06:05:57.16#ibcon#wrote, iclass 5, count 0 2006.229.06:05:57.16#ibcon#about to read 3, iclass 5, count 0 2006.229.06:05:57.20#ibcon#read 3, iclass 5, count 0 2006.229.06:05:57.20#ibcon#about to read 4, iclass 5, count 0 2006.229.06:05:57.20#ibcon#read 4, iclass 5, count 0 2006.229.06:05:57.20#ibcon#about to read 5, iclass 5, count 0 2006.229.06:05:57.20#ibcon#read 5, iclass 5, count 0 2006.229.06:05:57.20#ibcon#about to read 6, iclass 5, count 0 2006.229.06:05:57.20#ibcon#read 6, iclass 5, count 0 2006.229.06:05:57.20#ibcon#end of sib2, iclass 5, count 0 2006.229.06:05:57.20#ibcon#*after write, iclass 5, count 0 2006.229.06:05:57.20#ibcon#*before return 0, iclass 5, count 0 2006.229.06:05:57.20#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:57.20#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:05:57.20#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:05:57.20#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:05:57.20$vck44/vb=4,4 2006.229.06:05:57.20#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.06:05:57.20#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.06:05:57.20#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:57.20#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:57.26#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:57.26#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:57.26#ibcon#enter wrdev, iclass 7, count 2 2006.229.06:05:57.26#ibcon#first serial, iclass 7, count 2 2006.229.06:05:57.26#ibcon#enter sib2, iclass 7, count 2 2006.229.06:05:57.26#ibcon#flushed, iclass 7, count 2 2006.229.06:05:57.26#ibcon#about to write, iclass 7, count 2 2006.229.06:05:57.26#ibcon#wrote, iclass 7, count 2 2006.229.06:05:57.26#ibcon#about to read 3, iclass 7, count 2 2006.229.06:05:57.28#ibcon#read 3, iclass 7, count 2 2006.229.06:05:57.28#ibcon#about to read 4, iclass 7, count 2 2006.229.06:05:57.28#ibcon#read 4, iclass 7, count 2 2006.229.06:05:57.28#ibcon#about to read 5, iclass 7, count 2 2006.229.06:05:57.28#ibcon#read 5, iclass 7, count 2 2006.229.06:05:57.28#ibcon#about to read 6, iclass 7, count 2 2006.229.06:05:57.28#ibcon#read 6, iclass 7, count 2 2006.229.06:05:57.28#ibcon#end of sib2, iclass 7, count 2 2006.229.06:05:57.28#ibcon#*mode == 0, iclass 7, count 2 2006.229.06:05:57.28#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.06:05:57.28#ibcon#[27=AT04-04\r\n] 2006.229.06:05:57.28#ibcon#*before write, iclass 7, count 2 2006.229.06:05:57.28#ibcon#enter sib2, iclass 7, count 2 2006.229.06:05:57.28#ibcon#flushed, iclass 7, count 2 2006.229.06:05:57.28#ibcon#about to write, iclass 7, count 2 2006.229.06:05:57.28#ibcon#wrote, iclass 7, count 2 2006.229.06:05:57.28#ibcon#about to read 3, iclass 7, count 2 2006.229.06:05:57.31#ibcon#read 3, iclass 7, count 2 2006.229.06:05:57.31#ibcon#about to read 4, iclass 7, count 2 2006.229.06:05:57.31#ibcon#read 4, iclass 7, count 2 2006.229.06:05:57.31#ibcon#about to read 5, iclass 7, count 2 2006.229.06:05:57.31#ibcon#read 5, iclass 7, count 2 2006.229.06:05:57.31#ibcon#about to read 6, iclass 7, count 2 2006.229.06:05:57.31#ibcon#read 6, iclass 7, count 2 2006.229.06:05:57.31#ibcon#end of sib2, iclass 7, count 2 2006.229.06:05:57.31#ibcon#*after write, iclass 7, count 2 2006.229.06:05:57.31#ibcon#*before return 0, iclass 7, count 2 2006.229.06:05:57.31#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:57.31#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:05:57.31#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.06:05:57.31#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:57.31#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:57.43#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:57.43#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:57.43#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:05:57.43#ibcon#first serial, iclass 7, count 0 2006.229.06:05:57.43#ibcon#enter sib2, iclass 7, count 0 2006.229.06:05:57.43#ibcon#flushed, iclass 7, count 0 2006.229.06:05:57.43#ibcon#about to write, iclass 7, count 0 2006.229.06:05:57.43#ibcon#wrote, iclass 7, count 0 2006.229.06:05:57.43#ibcon#about to read 3, iclass 7, count 0 2006.229.06:05:57.45#ibcon#read 3, iclass 7, count 0 2006.229.06:05:57.45#ibcon#about to read 4, iclass 7, count 0 2006.229.06:05:57.45#ibcon#read 4, iclass 7, count 0 2006.229.06:05:57.45#ibcon#about to read 5, iclass 7, count 0 2006.229.06:05:57.45#ibcon#read 5, iclass 7, count 0 2006.229.06:05:57.45#ibcon#about to read 6, iclass 7, count 0 2006.229.06:05:57.45#ibcon#read 6, iclass 7, count 0 2006.229.06:05:57.45#ibcon#end of sib2, iclass 7, count 0 2006.229.06:05:57.45#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:05:57.45#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:05:57.45#ibcon#[27=USB\r\n] 2006.229.06:05:57.45#ibcon#*before write, iclass 7, count 0 2006.229.06:05:57.45#ibcon#enter sib2, iclass 7, count 0 2006.229.06:05:57.45#ibcon#flushed, iclass 7, count 0 2006.229.06:05:57.45#ibcon#about to write, iclass 7, count 0 2006.229.06:05:57.45#ibcon#wrote, iclass 7, count 0 2006.229.06:05:57.45#ibcon#about to read 3, iclass 7, count 0 2006.229.06:05:57.48#ibcon#read 3, iclass 7, count 0 2006.229.06:05:57.48#ibcon#about to read 4, iclass 7, count 0 2006.229.06:05:57.48#ibcon#read 4, iclass 7, count 0 2006.229.06:05:57.48#ibcon#about to read 5, iclass 7, count 0 2006.229.06:05:57.48#ibcon#read 5, iclass 7, count 0 2006.229.06:05:57.48#ibcon#about to read 6, iclass 7, count 0 2006.229.06:05:57.48#ibcon#read 6, iclass 7, count 0 2006.229.06:05:57.48#ibcon#end of sib2, iclass 7, count 0 2006.229.06:05:57.48#ibcon#*after write, iclass 7, count 0 2006.229.06:05:57.48#ibcon#*before return 0, iclass 7, count 0 2006.229.06:05:57.48#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:57.48#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:05:57.48#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:05:57.48#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:05:57.48$vck44/vblo=5,709.99 2006.229.06:05:57.48#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.06:05:57.48#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.06:05:57.48#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:57.48#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:57.48#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:57.48#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:57.48#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:05:57.48#ibcon#first serial, iclass 11, count 0 2006.229.06:05:57.48#ibcon#enter sib2, iclass 11, count 0 2006.229.06:05:57.48#ibcon#flushed, iclass 11, count 0 2006.229.06:05:57.48#ibcon#about to write, iclass 11, count 0 2006.229.06:05:57.48#ibcon#wrote, iclass 11, count 0 2006.229.06:05:57.48#ibcon#about to read 3, iclass 11, count 0 2006.229.06:05:57.50#ibcon#read 3, iclass 11, count 0 2006.229.06:05:57.50#ibcon#about to read 4, iclass 11, count 0 2006.229.06:05:57.50#ibcon#read 4, iclass 11, count 0 2006.229.06:05:57.50#ibcon#about to read 5, iclass 11, count 0 2006.229.06:05:57.50#ibcon#read 5, iclass 11, count 0 2006.229.06:05:57.50#ibcon#about to read 6, iclass 11, count 0 2006.229.06:05:57.50#ibcon#read 6, iclass 11, count 0 2006.229.06:05:57.50#ibcon#end of sib2, iclass 11, count 0 2006.229.06:05:57.50#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:05:57.50#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:05:57.50#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:05:57.50#ibcon#*before write, iclass 11, count 0 2006.229.06:05:57.50#ibcon#enter sib2, iclass 11, count 0 2006.229.06:05:57.50#ibcon#flushed, iclass 11, count 0 2006.229.06:05:57.50#ibcon#about to write, iclass 11, count 0 2006.229.06:05:57.50#ibcon#wrote, iclass 11, count 0 2006.229.06:05:57.50#ibcon#about to read 3, iclass 11, count 0 2006.229.06:05:57.54#ibcon#read 3, iclass 11, count 0 2006.229.06:05:57.54#ibcon#about to read 4, iclass 11, count 0 2006.229.06:05:57.54#ibcon#read 4, iclass 11, count 0 2006.229.06:05:57.54#ibcon#about to read 5, iclass 11, count 0 2006.229.06:05:57.54#ibcon#read 5, iclass 11, count 0 2006.229.06:05:57.54#ibcon#about to read 6, iclass 11, count 0 2006.229.06:05:57.54#ibcon#read 6, iclass 11, count 0 2006.229.06:05:57.54#ibcon#end of sib2, iclass 11, count 0 2006.229.06:05:57.54#ibcon#*after write, iclass 11, count 0 2006.229.06:05:57.54#ibcon#*before return 0, iclass 11, count 0 2006.229.06:05:57.54#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:57.54#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:05:57.54#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:05:57.54#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:05:57.54$vck44/vb=5,4 2006.229.06:05:57.54#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.06:05:57.54#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.06:05:57.54#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:57.54#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:57.60#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:57.60#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:57.60#ibcon#enter wrdev, iclass 13, count 2 2006.229.06:05:57.60#ibcon#first serial, iclass 13, count 2 2006.229.06:05:57.60#ibcon#enter sib2, iclass 13, count 2 2006.229.06:05:57.60#ibcon#flushed, iclass 13, count 2 2006.229.06:05:57.60#ibcon#about to write, iclass 13, count 2 2006.229.06:05:57.60#ibcon#wrote, iclass 13, count 2 2006.229.06:05:57.60#ibcon#about to read 3, iclass 13, count 2 2006.229.06:05:57.62#ibcon#read 3, iclass 13, count 2 2006.229.06:05:57.62#ibcon#about to read 4, iclass 13, count 2 2006.229.06:05:57.62#ibcon#read 4, iclass 13, count 2 2006.229.06:05:57.62#ibcon#about to read 5, iclass 13, count 2 2006.229.06:05:57.62#ibcon#read 5, iclass 13, count 2 2006.229.06:05:57.62#ibcon#about to read 6, iclass 13, count 2 2006.229.06:05:57.62#ibcon#read 6, iclass 13, count 2 2006.229.06:05:57.62#ibcon#end of sib2, iclass 13, count 2 2006.229.06:05:57.62#ibcon#*mode == 0, iclass 13, count 2 2006.229.06:05:57.62#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.06:05:57.62#ibcon#[27=AT05-04\r\n] 2006.229.06:05:57.62#ibcon#*before write, iclass 13, count 2 2006.229.06:05:57.62#ibcon#enter sib2, iclass 13, count 2 2006.229.06:05:57.62#ibcon#flushed, iclass 13, count 2 2006.229.06:05:57.62#ibcon#about to write, iclass 13, count 2 2006.229.06:05:57.62#ibcon#wrote, iclass 13, count 2 2006.229.06:05:57.62#ibcon#about to read 3, iclass 13, count 2 2006.229.06:05:57.65#ibcon#read 3, iclass 13, count 2 2006.229.06:05:57.65#ibcon#about to read 4, iclass 13, count 2 2006.229.06:05:57.65#ibcon#read 4, iclass 13, count 2 2006.229.06:05:57.65#ibcon#about to read 5, iclass 13, count 2 2006.229.06:05:57.65#ibcon#read 5, iclass 13, count 2 2006.229.06:05:57.65#ibcon#about to read 6, iclass 13, count 2 2006.229.06:05:57.65#ibcon#read 6, iclass 13, count 2 2006.229.06:05:57.65#ibcon#end of sib2, iclass 13, count 2 2006.229.06:05:57.65#ibcon#*after write, iclass 13, count 2 2006.229.06:05:57.65#ibcon#*before return 0, iclass 13, count 2 2006.229.06:05:57.65#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:57.65#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:05:57.65#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.06:05:57.65#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:57.65#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:57.77#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:57.77#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:57.77#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:05:57.77#ibcon#first serial, iclass 13, count 0 2006.229.06:05:57.77#ibcon#enter sib2, iclass 13, count 0 2006.229.06:05:57.77#ibcon#flushed, iclass 13, count 0 2006.229.06:05:57.77#ibcon#about to write, iclass 13, count 0 2006.229.06:05:57.77#ibcon#wrote, iclass 13, count 0 2006.229.06:05:57.77#ibcon#about to read 3, iclass 13, count 0 2006.229.06:05:57.79#ibcon#read 3, iclass 13, count 0 2006.229.06:05:57.79#ibcon#about to read 4, iclass 13, count 0 2006.229.06:05:57.79#ibcon#read 4, iclass 13, count 0 2006.229.06:05:57.79#ibcon#about to read 5, iclass 13, count 0 2006.229.06:05:57.79#ibcon#read 5, iclass 13, count 0 2006.229.06:05:57.79#ibcon#about to read 6, iclass 13, count 0 2006.229.06:05:57.79#ibcon#read 6, iclass 13, count 0 2006.229.06:05:57.79#ibcon#end of sib2, iclass 13, count 0 2006.229.06:05:57.79#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:05:57.79#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:05:57.79#ibcon#[27=USB\r\n] 2006.229.06:05:57.79#ibcon#*before write, iclass 13, count 0 2006.229.06:05:57.79#ibcon#enter sib2, iclass 13, count 0 2006.229.06:05:57.79#ibcon#flushed, iclass 13, count 0 2006.229.06:05:57.79#ibcon#about to write, iclass 13, count 0 2006.229.06:05:57.79#ibcon#wrote, iclass 13, count 0 2006.229.06:05:57.79#ibcon#about to read 3, iclass 13, count 0 2006.229.06:05:57.82#ibcon#read 3, iclass 13, count 0 2006.229.06:05:57.82#ibcon#about to read 4, iclass 13, count 0 2006.229.06:05:57.82#ibcon#read 4, iclass 13, count 0 2006.229.06:05:57.82#ibcon#about to read 5, iclass 13, count 0 2006.229.06:05:57.82#ibcon#read 5, iclass 13, count 0 2006.229.06:05:57.82#ibcon#about to read 6, iclass 13, count 0 2006.229.06:05:57.82#ibcon#read 6, iclass 13, count 0 2006.229.06:05:57.82#ibcon#end of sib2, iclass 13, count 0 2006.229.06:05:57.82#ibcon#*after write, iclass 13, count 0 2006.229.06:05:57.82#ibcon#*before return 0, iclass 13, count 0 2006.229.06:05:57.82#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:57.82#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:05:57.82#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:05:57.82#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:05:57.82$vck44/vblo=6,719.99 2006.229.06:05:57.82#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.06:05:57.82#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.06:05:57.82#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:57.82#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:05:57.82#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:05:57.82#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:05:57.82#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:05:57.82#ibcon#first serial, iclass 15, count 0 2006.229.06:05:57.82#ibcon#enter sib2, iclass 15, count 0 2006.229.06:05:57.82#ibcon#flushed, iclass 15, count 0 2006.229.06:05:57.82#ibcon#about to write, iclass 15, count 0 2006.229.06:05:57.82#ibcon#wrote, iclass 15, count 0 2006.229.06:05:57.82#ibcon#about to read 3, iclass 15, count 0 2006.229.06:05:57.84#ibcon#read 3, iclass 15, count 0 2006.229.06:05:57.84#ibcon#about to read 4, iclass 15, count 0 2006.229.06:05:57.84#ibcon#read 4, iclass 15, count 0 2006.229.06:05:57.84#ibcon#about to read 5, iclass 15, count 0 2006.229.06:05:57.84#ibcon#read 5, iclass 15, count 0 2006.229.06:05:57.84#ibcon#about to read 6, iclass 15, count 0 2006.229.06:05:57.84#ibcon#read 6, iclass 15, count 0 2006.229.06:05:57.84#ibcon#end of sib2, iclass 15, count 0 2006.229.06:05:57.84#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:05:57.84#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:05:57.84#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:05:57.84#ibcon#*before write, iclass 15, count 0 2006.229.06:05:57.84#ibcon#enter sib2, iclass 15, count 0 2006.229.06:05:57.84#ibcon#flushed, iclass 15, count 0 2006.229.06:05:57.84#ibcon#about to write, iclass 15, count 0 2006.229.06:05:57.84#ibcon#wrote, iclass 15, count 0 2006.229.06:05:57.84#ibcon#about to read 3, iclass 15, count 0 2006.229.06:05:57.88#ibcon#read 3, iclass 15, count 0 2006.229.06:05:57.88#ibcon#about to read 4, iclass 15, count 0 2006.229.06:05:57.88#ibcon#read 4, iclass 15, count 0 2006.229.06:05:57.88#ibcon#about to read 5, iclass 15, count 0 2006.229.06:05:57.88#ibcon#read 5, iclass 15, count 0 2006.229.06:05:57.88#ibcon#about to read 6, iclass 15, count 0 2006.229.06:05:57.88#ibcon#read 6, iclass 15, count 0 2006.229.06:05:57.88#ibcon#end of sib2, iclass 15, count 0 2006.229.06:05:57.88#ibcon#*after write, iclass 15, count 0 2006.229.06:05:57.88#ibcon#*before return 0, iclass 15, count 0 2006.229.06:05:57.88#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:05:57.88#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:05:57.88#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:05:57.88#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:05:57.88$vck44/vb=6,4 2006.229.06:05:57.88#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.06:05:57.88#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.06:05:57.88#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:57.88#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:05:57.94#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:05:57.94#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:05:57.94#ibcon#enter wrdev, iclass 17, count 2 2006.229.06:05:57.94#ibcon#first serial, iclass 17, count 2 2006.229.06:05:57.94#ibcon#enter sib2, iclass 17, count 2 2006.229.06:05:57.94#ibcon#flushed, iclass 17, count 2 2006.229.06:05:57.94#ibcon#about to write, iclass 17, count 2 2006.229.06:05:57.94#ibcon#wrote, iclass 17, count 2 2006.229.06:05:57.94#ibcon#about to read 3, iclass 17, count 2 2006.229.06:05:57.96#ibcon#read 3, iclass 17, count 2 2006.229.06:05:57.96#ibcon#about to read 4, iclass 17, count 2 2006.229.06:05:57.96#ibcon#read 4, iclass 17, count 2 2006.229.06:05:57.96#ibcon#about to read 5, iclass 17, count 2 2006.229.06:05:57.96#ibcon#read 5, iclass 17, count 2 2006.229.06:05:57.96#ibcon#about to read 6, iclass 17, count 2 2006.229.06:05:57.96#ibcon#read 6, iclass 17, count 2 2006.229.06:05:57.96#ibcon#end of sib2, iclass 17, count 2 2006.229.06:05:57.96#ibcon#*mode == 0, iclass 17, count 2 2006.229.06:05:57.96#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.06:05:57.96#ibcon#[27=AT06-04\r\n] 2006.229.06:05:57.96#ibcon#*before write, iclass 17, count 2 2006.229.06:05:57.96#ibcon#enter sib2, iclass 17, count 2 2006.229.06:05:57.96#ibcon#flushed, iclass 17, count 2 2006.229.06:05:57.96#ibcon#about to write, iclass 17, count 2 2006.229.06:05:57.96#ibcon#wrote, iclass 17, count 2 2006.229.06:05:57.96#ibcon#about to read 3, iclass 17, count 2 2006.229.06:05:57.99#ibcon#read 3, iclass 17, count 2 2006.229.06:05:57.99#ibcon#about to read 4, iclass 17, count 2 2006.229.06:05:57.99#ibcon#read 4, iclass 17, count 2 2006.229.06:05:57.99#ibcon#about to read 5, iclass 17, count 2 2006.229.06:05:57.99#ibcon#read 5, iclass 17, count 2 2006.229.06:05:57.99#ibcon#about to read 6, iclass 17, count 2 2006.229.06:05:57.99#ibcon#read 6, iclass 17, count 2 2006.229.06:05:57.99#ibcon#end of sib2, iclass 17, count 2 2006.229.06:05:57.99#ibcon#*after write, iclass 17, count 2 2006.229.06:05:57.99#ibcon#*before return 0, iclass 17, count 2 2006.229.06:05:57.99#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:05:57.99#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:05:57.99#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.06:05:57.99#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:57.99#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:05:58.11#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:05:58.11#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:05:58.11#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:05:58.11#ibcon#first serial, iclass 17, count 0 2006.229.06:05:58.11#ibcon#enter sib2, iclass 17, count 0 2006.229.06:05:58.11#ibcon#flushed, iclass 17, count 0 2006.229.06:05:58.11#ibcon#about to write, iclass 17, count 0 2006.229.06:05:58.11#ibcon#wrote, iclass 17, count 0 2006.229.06:05:58.11#ibcon#about to read 3, iclass 17, count 0 2006.229.06:05:58.13#ibcon#read 3, iclass 17, count 0 2006.229.06:05:58.13#ibcon#about to read 4, iclass 17, count 0 2006.229.06:05:58.13#ibcon#read 4, iclass 17, count 0 2006.229.06:05:58.13#ibcon#about to read 5, iclass 17, count 0 2006.229.06:05:58.13#ibcon#read 5, iclass 17, count 0 2006.229.06:05:58.13#ibcon#about to read 6, iclass 17, count 0 2006.229.06:05:58.13#ibcon#read 6, iclass 17, count 0 2006.229.06:05:58.13#ibcon#end of sib2, iclass 17, count 0 2006.229.06:05:58.13#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:05:58.13#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:05:58.13#ibcon#[27=USB\r\n] 2006.229.06:05:58.13#ibcon#*before write, iclass 17, count 0 2006.229.06:05:58.13#ibcon#enter sib2, iclass 17, count 0 2006.229.06:05:58.13#ibcon#flushed, iclass 17, count 0 2006.229.06:05:58.13#ibcon#about to write, iclass 17, count 0 2006.229.06:05:58.13#ibcon#wrote, iclass 17, count 0 2006.229.06:05:58.13#ibcon#about to read 3, iclass 17, count 0 2006.229.06:05:58.16#ibcon#read 3, iclass 17, count 0 2006.229.06:05:58.16#ibcon#about to read 4, iclass 17, count 0 2006.229.06:05:58.16#ibcon#read 4, iclass 17, count 0 2006.229.06:05:58.16#ibcon#about to read 5, iclass 17, count 0 2006.229.06:05:58.16#ibcon#read 5, iclass 17, count 0 2006.229.06:05:58.16#ibcon#about to read 6, iclass 17, count 0 2006.229.06:05:58.16#ibcon#read 6, iclass 17, count 0 2006.229.06:05:58.16#ibcon#end of sib2, iclass 17, count 0 2006.229.06:05:58.16#ibcon#*after write, iclass 17, count 0 2006.229.06:05:58.16#ibcon#*before return 0, iclass 17, count 0 2006.229.06:05:58.16#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:05:58.16#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:05:58.16#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:05:58.16#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:05:58.16$vck44/vblo=7,734.99 2006.229.06:05:58.16#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.06:05:58.16#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.06:05:58.16#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:58.16#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:05:58.16#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:05:58.16#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:05:58.16#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:05:58.16#ibcon#first serial, iclass 19, count 0 2006.229.06:05:58.16#ibcon#enter sib2, iclass 19, count 0 2006.229.06:05:58.16#ibcon#flushed, iclass 19, count 0 2006.229.06:05:58.16#ibcon#about to write, iclass 19, count 0 2006.229.06:05:58.16#ibcon#wrote, iclass 19, count 0 2006.229.06:05:58.16#ibcon#about to read 3, iclass 19, count 0 2006.229.06:05:58.18#ibcon#read 3, iclass 19, count 0 2006.229.06:05:58.18#ibcon#about to read 4, iclass 19, count 0 2006.229.06:05:58.18#ibcon#read 4, iclass 19, count 0 2006.229.06:05:58.18#ibcon#about to read 5, iclass 19, count 0 2006.229.06:05:58.18#ibcon#read 5, iclass 19, count 0 2006.229.06:05:58.18#ibcon#about to read 6, iclass 19, count 0 2006.229.06:05:58.18#ibcon#read 6, iclass 19, count 0 2006.229.06:05:58.18#ibcon#end of sib2, iclass 19, count 0 2006.229.06:05:58.18#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:05:58.18#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:05:58.18#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:05:58.18#ibcon#*before write, iclass 19, count 0 2006.229.06:05:58.18#ibcon#enter sib2, iclass 19, count 0 2006.229.06:05:58.18#ibcon#flushed, iclass 19, count 0 2006.229.06:05:58.18#ibcon#about to write, iclass 19, count 0 2006.229.06:05:58.18#ibcon#wrote, iclass 19, count 0 2006.229.06:05:58.18#ibcon#about to read 3, iclass 19, count 0 2006.229.06:05:58.22#ibcon#read 3, iclass 19, count 0 2006.229.06:05:58.22#ibcon#about to read 4, iclass 19, count 0 2006.229.06:05:58.22#ibcon#read 4, iclass 19, count 0 2006.229.06:05:58.22#ibcon#about to read 5, iclass 19, count 0 2006.229.06:05:58.22#ibcon#read 5, iclass 19, count 0 2006.229.06:05:58.22#ibcon#about to read 6, iclass 19, count 0 2006.229.06:05:58.22#ibcon#read 6, iclass 19, count 0 2006.229.06:05:58.22#ibcon#end of sib2, iclass 19, count 0 2006.229.06:05:58.22#ibcon#*after write, iclass 19, count 0 2006.229.06:05:58.22#ibcon#*before return 0, iclass 19, count 0 2006.229.06:05:58.22#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:05:58.22#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:05:58.22#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:05:58.22#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:05:58.22$vck44/vb=7,4 2006.229.06:05:58.22#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.06:05:58.22#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.06:05:58.22#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:58.22#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:05:58.28#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:05:58.28#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:05:58.28#ibcon#enter wrdev, iclass 21, count 2 2006.229.06:05:58.28#ibcon#first serial, iclass 21, count 2 2006.229.06:05:58.28#ibcon#enter sib2, iclass 21, count 2 2006.229.06:05:58.28#ibcon#flushed, iclass 21, count 2 2006.229.06:05:58.28#ibcon#about to write, iclass 21, count 2 2006.229.06:05:58.28#ibcon#wrote, iclass 21, count 2 2006.229.06:05:58.28#ibcon#about to read 3, iclass 21, count 2 2006.229.06:05:58.30#ibcon#read 3, iclass 21, count 2 2006.229.06:05:58.30#ibcon#about to read 4, iclass 21, count 2 2006.229.06:05:58.30#ibcon#read 4, iclass 21, count 2 2006.229.06:05:58.30#ibcon#about to read 5, iclass 21, count 2 2006.229.06:05:58.30#ibcon#read 5, iclass 21, count 2 2006.229.06:05:58.30#ibcon#about to read 6, iclass 21, count 2 2006.229.06:05:58.30#ibcon#read 6, iclass 21, count 2 2006.229.06:05:58.30#ibcon#end of sib2, iclass 21, count 2 2006.229.06:05:58.30#ibcon#*mode == 0, iclass 21, count 2 2006.229.06:05:58.30#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.06:05:58.30#ibcon#[27=AT07-04\r\n] 2006.229.06:05:58.30#ibcon#*before write, iclass 21, count 2 2006.229.06:05:58.30#ibcon#enter sib2, iclass 21, count 2 2006.229.06:05:58.30#ibcon#flushed, iclass 21, count 2 2006.229.06:05:58.30#ibcon#about to write, iclass 21, count 2 2006.229.06:05:58.30#ibcon#wrote, iclass 21, count 2 2006.229.06:05:58.30#ibcon#about to read 3, iclass 21, count 2 2006.229.06:05:58.33#ibcon#read 3, iclass 21, count 2 2006.229.06:05:58.33#ibcon#about to read 4, iclass 21, count 2 2006.229.06:05:58.39#ibcon#read 4, iclass 21, count 2 2006.229.06:05:58.39#ibcon#about to read 5, iclass 21, count 2 2006.229.06:05:58.39#ibcon#read 5, iclass 21, count 2 2006.229.06:05:58.39#ibcon#about to read 6, iclass 21, count 2 2006.229.06:05:58.39#ibcon#read 6, iclass 21, count 2 2006.229.06:05:58.39#ibcon#end of sib2, iclass 21, count 2 2006.229.06:05:58.39#ibcon#*after write, iclass 21, count 2 2006.229.06:05:58.39#ibcon#*before return 0, iclass 21, count 2 2006.229.06:05:58.39#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:05:58.39#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:05:58.39#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.06:05:58.39#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:58.39#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:05:58.51#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:05:58.51#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:05:58.51#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:05:58.51#ibcon#first serial, iclass 21, count 0 2006.229.06:05:58.51#ibcon#enter sib2, iclass 21, count 0 2006.229.06:05:58.51#ibcon#flushed, iclass 21, count 0 2006.229.06:05:58.51#ibcon#about to write, iclass 21, count 0 2006.229.06:05:58.51#ibcon#wrote, iclass 21, count 0 2006.229.06:05:58.51#ibcon#about to read 3, iclass 21, count 0 2006.229.06:05:58.53#ibcon#read 3, iclass 21, count 0 2006.229.06:05:58.53#ibcon#about to read 4, iclass 21, count 0 2006.229.06:05:58.53#ibcon#read 4, iclass 21, count 0 2006.229.06:05:58.53#ibcon#about to read 5, iclass 21, count 0 2006.229.06:05:58.53#ibcon#read 5, iclass 21, count 0 2006.229.06:05:58.53#ibcon#about to read 6, iclass 21, count 0 2006.229.06:05:58.53#ibcon#read 6, iclass 21, count 0 2006.229.06:05:58.53#ibcon#end of sib2, iclass 21, count 0 2006.229.06:05:58.53#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:05:58.53#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:05:58.53#ibcon#[27=USB\r\n] 2006.229.06:05:58.53#ibcon#*before write, iclass 21, count 0 2006.229.06:05:58.53#ibcon#enter sib2, iclass 21, count 0 2006.229.06:05:58.53#ibcon#flushed, iclass 21, count 0 2006.229.06:05:58.53#ibcon#about to write, iclass 21, count 0 2006.229.06:05:58.53#ibcon#wrote, iclass 21, count 0 2006.229.06:05:58.53#ibcon#about to read 3, iclass 21, count 0 2006.229.06:05:58.56#ibcon#read 3, iclass 21, count 0 2006.229.06:05:58.56#ibcon#about to read 4, iclass 21, count 0 2006.229.06:05:58.56#ibcon#read 4, iclass 21, count 0 2006.229.06:05:58.56#ibcon#about to read 5, iclass 21, count 0 2006.229.06:05:58.56#ibcon#read 5, iclass 21, count 0 2006.229.06:05:58.56#ibcon#about to read 6, iclass 21, count 0 2006.229.06:05:58.56#ibcon#read 6, iclass 21, count 0 2006.229.06:05:58.56#ibcon#end of sib2, iclass 21, count 0 2006.229.06:05:58.56#ibcon#*after write, iclass 21, count 0 2006.229.06:05:58.56#ibcon#*before return 0, iclass 21, count 0 2006.229.06:05:58.56#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:05:58.56#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:05:58.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:05:58.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:05:58.56$vck44/vblo=8,744.99 2006.229.06:05:58.56#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.06:05:58.56#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.06:05:58.56#ibcon#ireg 17 cls_cnt 0 2006.229.06:05:58.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:58.56#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:58.56#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:58.56#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:05:58.56#ibcon#first serial, iclass 23, count 0 2006.229.06:05:58.56#ibcon#enter sib2, iclass 23, count 0 2006.229.06:05:58.56#ibcon#flushed, iclass 23, count 0 2006.229.06:05:58.56#ibcon#about to write, iclass 23, count 0 2006.229.06:05:58.56#ibcon#wrote, iclass 23, count 0 2006.229.06:05:58.56#ibcon#about to read 3, iclass 23, count 0 2006.229.06:05:58.58#ibcon#read 3, iclass 23, count 0 2006.229.06:05:58.58#ibcon#about to read 4, iclass 23, count 0 2006.229.06:05:58.58#ibcon#read 4, iclass 23, count 0 2006.229.06:05:58.58#ibcon#about to read 5, iclass 23, count 0 2006.229.06:05:58.58#ibcon#read 5, iclass 23, count 0 2006.229.06:05:58.58#ibcon#about to read 6, iclass 23, count 0 2006.229.06:05:58.58#ibcon#read 6, iclass 23, count 0 2006.229.06:05:58.58#ibcon#end of sib2, iclass 23, count 0 2006.229.06:05:58.58#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:05:58.58#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:05:58.58#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:05:58.58#ibcon#*before write, iclass 23, count 0 2006.229.06:05:58.58#ibcon#enter sib2, iclass 23, count 0 2006.229.06:05:58.58#ibcon#flushed, iclass 23, count 0 2006.229.06:05:58.58#ibcon#about to write, iclass 23, count 0 2006.229.06:05:58.58#ibcon#wrote, iclass 23, count 0 2006.229.06:05:58.58#ibcon#about to read 3, iclass 23, count 0 2006.229.06:05:58.62#ibcon#read 3, iclass 23, count 0 2006.229.06:05:58.62#ibcon#about to read 4, iclass 23, count 0 2006.229.06:05:58.62#ibcon#read 4, iclass 23, count 0 2006.229.06:05:58.62#ibcon#about to read 5, iclass 23, count 0 2006.229.06:05:58.62#ibcon#read 5, iclass 23, count 0 2006.229.06:05:58.62#ibcon#about to read 6, iclass 23, count 0 2006.229.06:05:58.62#ibcon#read 6, iclass 23, count 0 2006.229.06:05:58.62#ibcon#end of sib2, iclass 23, count 0 2006.229.06:05:58.62#ibcon#*after write, iclass 23, count 0 2006.229.06:05:58.62#ibcon#*before return 0, iclass 23, count 0 2006.229.06:05:58.62#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:58.62#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:05:58.62#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:05:58.62#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:05:58.62$vck44/vb=8,4 2006.229.06:05:58.62#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.06:05:58.62#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.06:05:58.62#ibcon#ireg 11 cls_cnt 2 2006.229.06:05:58.62#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:58.68#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:58.68#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:58.68#ibcon#enter wrdev, iclass 25, count 2 2006.229.06:05:58.68#ibcon#first serial, iclass 25, count 2 2006.229.06:05:58.68#ibcon#enter sib2, iclass 25, count 2 2006.229.06:05:58.68#ibcon#flushed, iclass 25, count 2 2006.229.06:05:58.68#ibcon#about to write, iclass 25, count 2 2006.229.06:05:58.68#ibcon#wrote, iclass 25, count 2 2006.229.06:05:58.68#ibcon#about to read 3, iclass 25, count 2 2006.229.06:05:58.70#ibcon#read 3, iclass 25, count 2 2006.229.06:05:58.70#ibcon#about to read 4, iclass 25, count 2 2006.229.06:05:58.70#ibcon#read 4, iclass 25, count 2 2006.229.06:05:58.70#ibcon#about to read 5, iclass 25, count 2 2006.229.06:05:58.70#ibcon#read 5, iclass 25, count 2 2006.229.06:05:58.70#ibcon#about to read 6, iclass 25, count 2 2006.229.06:05:58.70#ibcon#read 6, iclass 25, count 2 2006.229.06:05:58.70#ibcon#end of sib2, iclass 25, count 2 2006.229.06:05:58.70#ibcon#*mode == 0, iclass 25, count 2 2006.229.06:05:58.70#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.06:05:58.70#ibcon#[27=AT08-04\r\n] 2006.229.06:05:58.70#ibcon#*before write, iclass 25, count 2 2006.229.06:05:58.70#ibcon#enter sib2, iclass 25, count 2 2006.229.06:05:58.70#ibcon#flushed, iclass 25, count 2 2006.229.06:05:58.70#ibcon#about to write, iclass 25, count 2 2006.229.06:05:58.70#ibcon#wrote, iclass 25, count 2 2006.229.06:05:58.70#ibcon#about to read 3, iclass 25, count 2 2006.229.06:05:58.73#ibcon#read 3, iclass 25, count 2 2006.229.06:05:58.73#ibcon#about to read 4, iclass 25, count 2 2006.229.06:05:58.73#ibcon#read 4, iclass 25, count 2 2006.229.06:05:58.73#ibcon#about to read 5, iclass 25, count 2 2006.229.06:05:58.73#ibcon#read 5, iclass 25, count 2 2006.229.06:05:58.73#ibcon#about to read 6, iclass 25, count 2 2006.229.06:05:58.73#ibcon#read 6, iclass 25, count 2 2006.229.06:05:58.73#ibcon#end of sib2, iclass 25, count 2 2006.229.06:05:58.73#ibcon#*after write, iclass 25, count 2 2006.229.06:05:58.73#ibcon#*before return 0, iclass 25, count 2 2006.229.06:05:58.73#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:58.73#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:05:58.73#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.06:05:58.73#ibcon#ireg 7 cls_cnt 0 2006.229.06:05:58.73#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:58.85#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:58.85#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:58.85#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:05:58.85#ibcon#first serial, iclass 25, count 0 2006.229.06:05:58.85#ibcon#enter sib2, iclass 25, count 0 2006.229.06:05:58.85#ibcon#flushed, iclass 25, count 0 2006.229.06:05:58.85#ibcon#about to write, iclass 25, count 0 2006.229.06:05:58.85#ibcon#wrote, iclass 25, count 0 2006.229.06:05:58.85#ibcon#about to read 3, iclass 25, count 0 2006.229.06:05:58.87#ibcon#read 3, iclass 25, count 0 2006.229.06:05:58.87#ibcon#about to read 4, iclass 25, count 0 2006.229.06:05:58.87#ibcon#read 4, iclass 25, count 0 2006.229.06:05:58.87#ibcon#about to read 5, iclass 25, count 0 2006.229.06:05:58.87#ibcon#read 5, iclass 25, count 0 2006.229.06:05:58.87#ibcon#about to read 6, iclass 25, count 0 2006.229.06:05:58.87#ibcon#read 6, iclass 25, count 0 2006.229.06:05:58.87#ibcon#end of sib2, iclass 25, count 0 2006.229.06:05:58.87#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:05:58.87#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:05:58.87#ibcon#[27=USB\r\n] 2006.229.06:05:58.87#ibcon#*before write, iclass 25, count 0 2006.229.06:05:58.87#ibcon#enter sib2, iclass 25, count 0 2006.229.06:05:58.87#ibcon#flushed, iclass 25, count 0 2006.229.06:05:58.87#ibcon#about to write, iclass 25, count 0 2006.229.06:05:58.87#ibcon#wrote, iclass 25, count 0 2006.229.06:05:58.87#ibcon#about to read 3, iclass 25, count 0 2006.229.06:05:58.90#ibcon#read 3, iclass 25, count 0 2006.229.06:05:58.90#ibcon#about to read 4, iclass 25, count 0 2006.229.06:05:58.90#ibcon#read 4, iclass 25, count 0 2006.229.06:05:58.90#ibcon#about to read 5, iclass 25, count 0 2006.229.06:05:58.90#ibcon#read 5, iclass 25, count 0 2006.229.06:05:58.90#ibcon#about to read 6, iclass 25, count 0 2006.229.06:05:58.90#ibcon#read 6, iclass 25, count 0 2006.229.06:05:58.90#ibcon#end of sib2, iclass 25, count 0 2006.229.06:05:58.90#ibcon#*after write, iclass 25, count 0 2006.229.06:05:58.90#ibcon#*before return 0, iclass 25, count 0 2006.229.06:05:58.90#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:58.90#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:05:58.90#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:05:58.90#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:05:58.90$vck44/vabw=wide 2006.229.06:05:58.90#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.06:05:58.90#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.06:05:58.90#ibcon#ireg 8 cls_cnt 0 2006.229.06:05:58.90#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:58.90#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:58.90#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:58.90#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:05:58.90#ibcon#first serial, iclass 27, count 0 2006.229.06:05:58.90#ibcon#enter sib2, iclass 27, count 0 2006.229.06:05:58.90#ibcon#flushed, iclass 27, count 0 2006.229.06:05:58.90#ibcon#about to write, iclass 27, count 0 2006.229.06:05:58.90#ibcon#wrote, iclass 27, count 0 2006.229.06:05:58.90#ibcon#about to read 3, iclass 27, count 0 2006.229.06:05:58.92#ibcon#read 3, iclass 27, count 0 2006.229.06:05:58.92#ibcon#about to read 4, iclass 27, count 0 2006.229.06:05:58.92#ibcon#read 4, iclass 27, count 0 2006.229.06:05:58.92#ibcon#about to read 5, iclass 27, count 0 2006.229.06:05:58.92#ibcon#read 5, iclass 27, count 0 2006.229.06:05:58.92#ibcon#about to read 6, iclass 27, count 0 2006.229.06:05:58.92#ibcon#read 6, iclass 27, count 0 2006.229.06:05:58.92#ibcon#end of sib2, iclass 27, count 0 2006.229.06:05:58.92#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:05:58.92#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:05:58.92#ibcon#[25=BW32\r\n] 2006.229.06:05:58.92#ibcon#*before write, iclass 27, count 0 2006.229.06:05:58.92#ibcon#enter sib2, iclass 27, count 0 2006.229.06:05:58.92#ibcon#flushed, iclass 27, count 0 2006.229.06:05:58.92#ibcon#about to write, iclass 27, count 0 2006.229.06:05:58.92#ibcon#wrote, iclass 27, count 0 2006.229.06:05:58.92#ibcon#about to read 3, iclass 27, count 0 2006.229.06:05:58.95#ibcon#read 3, iclass 27, count 0 2006.229.06:05:58.95#ibcon#about to read 4, iclass 27, count 0 2006.229.06:05:58.95#ibcon#read 4, iclass 27, count 0 2006.229.06:05:58.95#ibcon#about to read 5, iclass 27, count 0 2006.229.06:05:58.95#ibcon#read 5, iclass 27, count 0 2006.229.06:05:58.95#ibcon#about to read 6, iclass 27, count 0 2006.229.06:05:58.95#ibcon#read 6, iclass 27, count 0 2006.229.06:05:58.95#ibcon#end of sib2, iclass 27, count 0 2006.229.06:05:58.95#ibcon#*after write, iclass 27, count 0 2006.229.06:05:58.95#ibcon#*before return 0, iclass 27, count 0 2006.229.06:05:58.95#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:58.95#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:05:58.95#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:05:58.95#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:05:58.95$vck44/vbbw=wide 2006.229.06:05:58.95#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.06:05:58.95#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.06:05:58.95#ibcon#ireg 8 cls_cnt 0 2006.229.06:05:58.95#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:05:59.02#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:05:59.02#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:05:59.02#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:05:59.02#ibcon#first serial, iclass 29, count 0 2006.229.06:05:59.02#ibcon#enter sib2, iclass 29, count 0 2006.229.06:05:59.02#ibcon#flushed, iclass 29, count 0 2006.229.06:05:59.02#ibcon#about to write, iclass 29, count 0 2006.229.06:05:59.02#ibcon#wrote, iclass 29, count 0 2006.229.06:05:59.02#ibcon#about to read 3, iclass 29, count 0 2006.229.06:05:59.04#ibcon#read 3, iclass 29, count 0 2006.229.06:05:59.04#ibcon#about to read 4, iclass 29, count 0 2006.229.06:05:59.04#ibcon#read 4, iclass 29, count 0 2006.229.06:05:59.04#ibcon#about to read 5, iclass 29, count 0 2006.229.06:05:59.04#ibcon#read 5, iclass 29, count 0 2006.229.06:05:59.04#ibcon#about to read 6, iclass 29, count 0 2006.229.06:05:59.04#ibcon#read 6, iclass 29, count 0 2006.229.06:05:59.04#ibcon#end of sib2, iclass 29, count 0 2006.229.06:05:59.04#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:05:59.04#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:05:59.04#ibcon#[27=BW32\r\n] 2006.229.06:05:59.04#ibcon#*before write, iclass 29, count 0 2006.229.06:05:59.04#ibcon#enter sib2, iclass 29, count 0 2006.229.06:05:59.04#ibcon#flushed, iclass 29, count 0 2006.229.06:05:59.04#ibcon#about to write, iclass 29, count 0 2006.229.06:05:59.04#ibcon#wrote, iclass 29, count 0 2006.229.06:05:59.04#ibcon#about to read 3, iclass 29, count 0 2006.229.06:05:59.07#ibcon#read 3, iclass 29, count 0 2006.229.06:05:59.07#ibcon#about to read 4, iclass 29, count 0 2006.229.06:05:59.07#ibcon#read 4, iclass 29, count 0 2006.229.06:05:59.07#ibcon#about to read 5, iclass 29, count 0 2006.229.06:05:59.07#ibcon#read 5, iclass 29, count 0 2006.229.06:05:59.07#ibcon#about to read 6, iclass 29, count 0 2006.229.06:05:59.07#ibcon#read 6, iclass 29, count 0 2006.229.06:05:59.07#ibcon#end of sib2, iclass 29, count 0 2006.229.06:05:59.07#ibcon#*after write, iclass 29, count 0 2006.229.06:05:59.07#ibcon#*before return 0, iclass 29, count 0 2006.229.06:05:59.07#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:05:59.07#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:05:59.07#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:05:59.07#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:05:59.07$setupk4/ifdk4 2006.229.06:05:59.07$ifdk4/lo= 2006.229.06:05:59.07$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:05:59.07$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:05:59.07$ifdk4/patch= 2006.229.06:05:59.07$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:05:59.07$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:05:59.07$setupk4/!*+20s 2006.229.06:06:05.02#abcon#<5=/04 2.5 4.2 30.60 91 999.3\r\n> 2006.229.06:06:05.04#abcon#{5=INTERFACE CLEAR} 2006.229.06:06:05.10#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:06:13.19$setupk4/"tpicd 2006.229.06:06:13.19$setupk4/echo=off 2006.229.06:06:13.19$setupk4/xlog=off 2006.229.06:06:13.19:!2006.229.06:10:51 2006.229.06:06:31.14#trakl#Source acquired 2006.229.06:06:31.14#flagr#flagr/antenna,acquired 2006.229.06:10:51.00:preob 2006.229.06:10:51.14/onsource/TRACKING 2006.229.06:10:51.14:!2006.229.06:11:01 2006.229.06:11:01.00:"tape 2006.229.06:11:01.00:"st=record 2006.229.06:11:01.00:data_valid=on 2006.229.06:11:01.00:midob 2006.229.06:11:01.14/onsource/TRACKING 2006.229.06:11:01.14/wx/30.55,999.3,90 2006.229.06:11:01.35/cable/+6.3963E-03 2006.229.06:11:02.44/va/01,08,usb,yes,44,47 2006.229.06:11:02.44/va/02,07,usb,yes,47,48 2006.229.06:11:02.44/va/03,06,usb,yes,58,61 2006.229.06:11:02.44/va/04,07,usb,yes,49,52 2006.229.06:11:02.44/va/05,04,usb,yes,44,45 2006.229.06:11:02.44/va/06,04,usb,yes,49,48 2006.229.06:11:02.44/va/07,05,usb,yes,43,44 2006.229.06:11:02.44/va/08,06,usb,yes,32,39 2006.229.06:11:02.67/valo/01,524.99,yes,locked 2006.229.06:11:02.67/valo/02,534.99,yes,locked 2006.229.06:11:02.67/valo/03,564.99,yes,locked 2006.229.06:11:02.67/valo/04,624.99,yes,locked 2006.229.06:11:02.67/valo/05,734.99,yes,locked 2006.229.06:11:02.67/valo/06,814.99,yes,locked 2006.229.06:11:02.67/valo/07,864.99,yes,locked 2006.229.06:11:02.67/valo/08,884.99,yes,locked 2006.229.06:11:03.76/vb/01,04,usb,yes,43,40 2006.229.06:11:03.76/vb/02,04,usb,yes,46,45 2006.229.06:11:03.76/vb/03,04,usb,yes,42,47 2006.229.06:11:03.76/vb/04,04,usb,yes,48,47 2006.229.06:11:03.76/vb/05,04,usb,yes,38,42 2006.229.06:11:03.76/vb/06,04,usb,yes,44,40 2006.229.06:11:03.76/vb/07,04,usb,yes,44,44 2006.229.06:11:03.76/vb/08,04,usb,yes,40,45 2006.229.06:11:04.00/vblo/01,629.99,yes,locked 2006.229.06:11:04.00/vblo/02,634.99,yes,locked 2006.229.06:11:04.00/vblo/03,649.99,yes,locked 2006.229.06:11:04.00/vblo/04,679.99,yes,locked 2006.229.06:11:04.00/vblo/05,709.99,yes,locked 2006.229.06:11:04.00/vblo/06,719.99,yes,locked 2006.229.06:11:04.00/vblo/07,734.99,yes,locked 2006.229.06:11:04.00/vblo/08,744.99,yes,locked 2006.229.06:11:04.15/vabw/8 2006.229.06:11:04.30/vbbw/8 2006.229.06:11:04.39/xfe/off,on,12.0 2006.229.06:11:04.78/ifatt/23,28,28,28 2006.229.06:11:05.08/fmout-gps/S +4.45E-07 2006.229.06:11:05.12:!2006.229.06:12:31 2006.229.06:12:31.00:data_valid=off 2006.229.06:12:31.00:"et 2006.229.06:12:31.00:!+3s 2006.229.06:12:34.02:"tape 2006.229.06:12:34.02:postob 2006.229.06:12:34.11/cable/+6.3993E-03 2006.229.06:12:34.11/wx/30.55,999.4,91 2006.229.06:12:34.18/fmout-gps/S +4.47E-07 2006.229.06:12:34.18:scan_name=229-0613,jd0608,220 2006.229.06:12:34.19:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.06:12:35.14#flagr#flagr/antenna,new-source 2006.229.06:12:35.14:checkk5 2006.229.06:12:35.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:12:35.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:12:36.48/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:12:36.88/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:12:37.27/chk_obsdata//k5ts1/T2290611??a.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.06:12:37.66/chk_obsdata//k5ts2/T2290611??b.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.06:12:38.06/chk_obsdata//k5ts3/T2290611??c.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.06:12:38.45/chk_obsdata//k5ts4/T2290611??d.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.06:12:39.18/k5log//k5ts1_log_newline 2006.229.06:12:39.86/k5log//k5ts2_log_newline 2006.229.06:12:40.56/k5log//k5ts3_log_newline 2006.229.06:12:41.24/k5log//k5ts4_log_newline 2006.229.06:12:41.27/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:12:41.27:setupk4=1 2006.229.06:12:41.27$setupk4/echo=on 2006.229.06:12:41.27$setupk4/pcalon 2006.229.06:12:41.27$pcalon/"no phase cal control is implemented here 2006.229.06:12:41.27$setupk4/"tpicd=stop 2006.229.06:12:41.27$setupk4/"rec=synch_on 2006.229.06:12:41.27$setupk4/"rec_mode=128 2006.229.06:12:41.27$setupk4/!* 2006.229.06:12:41.27$setupk4/recpk4 2006.229.06:12:41.27$recpk4/recpatch= 2006.229.06:12:41.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:12:41.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:12:41.27$setupk4/vck44 2006.229.06:12:41.27$vck44/valo=1,524.99 2006.229.06:12:41.27#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.06:12:41.27#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.06:12:41.27#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:41.27#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:41.27#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:41.27#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:41.27#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:12:41.27#ibcon#first serial, iclass 10, count 0 2006.229.06:12:41.27#ibcon#enter sib2, iclass 10, count 0 2006.229.06:12:41.27#ibcon#flushed, iclass 10, count 0 2006.229.06:12:41.27#ibcon#about to write, iclass 10, count 0 2006.229.06:12:41.27#ibcon#wrote, iclass 10, count 0 2006.229.06:12:41.27#ibcon#about to read 3, iclass 10, count 0 2006.229.06:12:41.29#ibcon#read 3, iclass 10, count 0 2006.229.06:12:41.29#ibcon#about to read 4, iclass 10, count 0 2006.229.06:12:41.29#ibcon#read 4, iclass 10, count 0 2006.229.06:12:41.29#ibcon#about to read 5, iclass 10, count 0 2006.229.06:12:41.29#ibcon#read 5, iclass 10, count 0 2006.229.06:12:41.29#ibcon#about to read 6, iclass 10, count 0 2006.229.06:12:41.29#ibcon#read 6, iclass 10, count 0 2006.229.06:12:41.29#ibcon#end of sib2, iclass 10, count 0 2006.229.06:12:41.29#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:12:41.29#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:12:41.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:12:41.29#ibcon#*before write, iclass 10, count 0 2006.229.06:12:41.29#ibcon#enter sib2, iclass 10, count 0 2006.229.06:12:41.29#ibcon#flushed, iclass 10, count 0 2006.229.06:12:41.29#ibcon#about to write, iclass 10, count 0 2006.229.06:12:41.29#ibcon#wrote, iclass 10, count 0 2006.229.06:12:41.29#ibcon#about to read 3, iclass 10, count 0 2006.229.06:12:41.34#ibcon#read 3, iclass 10, count 0 2006.229.06:12:41.34#ibcon#about to read 4, iclass 10, count 0 2006.229.06:12:41.34#ibcon#read 4, iclass 10, count 0 2006.229.06:12:41.34#ibcon#about to read 5, iclass 10, count 0 2006.229.06:12:41.34#ibcon#read 5, iclass 10, count 0 2006.229.06:12:41.34#ibcon#about to read 6, iclass 10, count 0 2006.229.06:12:41.34#ibcon#read 6, iclass 10, count 0 2006.229.06:12:41.34#ibcon#end of sib2, iclass 10, count 0 2006.229.06:12:41.34#ibcon#*after write, iclass 10, count 0 2006.229.06:12:41.34#ibcon#*before return 0, iclass 10, count 0 2006.229.06:12:41.34#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:41.34#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:41.34#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:12:41.34#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:12:41.34$vck44/va=1,8 2006.229.06:12:41.34#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.06:12:41.34#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.06:12:41.34#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:41.34#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:41.34#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:41.34#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:41.34#ibcon#enter wrdev, iclass 12, count 2 2006.229.06:12:41.34#ibcon#first serial, iclass 12, count 2 2006.229.06:12:41.34#ibcon#enter sib2, iclass 12, count 2 2006.229.06:12:41.34#ibcon#flushed, iclass 12, count 2 2006.229.06:12:41.34#ibcon#about to write, iclass 12, count 2 2006.229.06:12:41.34#ibcon#wrote, iclass 12, count 2 2006.229.06:12:41.34#ibcon#about to read 3, iclass 12, count 2 2006.229.06:12:41.36#ibcon#read 3, iclass 12, count 2 2006.229.06:12:41.36#ibcon#about to read 4, iclass 12, count 2 2006.229.06:12:41.36#ibcon#read 4, iclass 12, count 2 2006.229.06:12:41.36#ibcon#about to read 5, iclass 12, count 2 2006.229.06:12:41.36#ibcon#read 5, iclass 12, count 2 2006.229.06:12:41.36#ibcon#about to read 6, iclass 12, count 2 2006.229.06:12:41.36#ibcon#read 6, iclass 12, count 2 2006.229.06:12:41.36#ibcon#end of sib2, iclass 12, count 2 2006.229.06:12:41.36#ibcon#*mode == 0, iclass 12, count 2 2006.229.06:12:41.36#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.06:12:41.36#ibcon#[25=AT01-08\r\n] 2006.229.06:12:41.36#ibcon#*before write, iclass 12, count 2 2006.229.06:12:41.36#ibcon#enter sib2, iclass 12, count 2 2006.229.06:12:41.36#ibcon#flushed, iclass 12, count 2 2006.229.06:12:41.36#ibcon#about to write, iclass 12, count 2 2006.229.06:12:41.36#ibcon#wrote, iclass 12, count 2 2006.229.06:12:41.36#ibcon#about to read 3, iclass 12, count 2 2006.229.06:12:41.39#ibcon#read 3, iclass 12, count 2 2006.229.06:12:41.39#ibcon#about to read 4, iclass 12, count 2 2006.229.06:12:41.39#ibcon#read 4, iclass 12, count 2 2006.229.06:12:41.39#ibcon#about to read 5, iclass 12, count 2 2006.229.06:12:41.39#ibcon#read 5, iclass 12, count 2 2006.229.06:12:41.39#ibcon#about to read 6, iclass 12, count 2 2006.229.06:12:41.39#ibcon#read 6, iclass 12, count 2 2006.229.06:12:41.39#ibcon#end of sib2, iclass 12, count 2 2006.229.06:12:41.39#ibcon#*after write, iclass 12, count 2 2006.229.06:12:41.39#ibcon#*before return 0, iclass 12, count 2 2006.229.06:12:41.39#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:41.39#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:41.39#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.06:12:41.39#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:41.39#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:41.51#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:41.51#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:41.51#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:12:41.51#ibcon#first serial, iclass 12, count 0 2006.229.06:12:41.51#ibcon#enter sib2, iclass 12, count 0 2006.229.06:12:41.51#ibcon#flushed, iclass 12, count 0 2006.229.06:12:41.51#ibcon#about to write, iclass 12, count 0 2006.229.06:12:41.51#ibcon#wrote, iclass 12, count 0 2006.229.06:12:41.51#ibcon#about to read 3, iclass 12, count 0 2006.229.06:12:41.53#ibcon#read 3, iclass 12, count 0 2006.229.06:12:41.53#ibcon#about to read 4, iclass 12, count 0 2006.229.06:12:41.53#ibcon#read 4, iclass 12, count 0 2006.229.06:12:41.53#ibcon#about to read 5, iclass 12, count 0 2006.229.06:12:41.53#ibcon#read 5, iclass 12, count 0 2006.229.06:12:41.53#ibcon#about to read 6, iclass 12, count 0 2006.229.06:12:41.53#ibcon#read 6, iclass 12, count 0 2006.229.06:12:41.53#ibcon#end of sib2, iclass 12, count 0 2006.229.06:12:41.53#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:12:41.53#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:12:41.53#ibcon#[25=USB\r\n] 2006.229.06:12:41.53#ibcon#*before write, iclass 12, count 0 2006.229.06:12:41.53#ibcon#enter sib2, iclass 12, count 0 2006.229.06:12:41.53#ibcon#flushed, iclass 12, count 0 2006.229.06:12:41.53#ibcon#about to write, iclass 12, count 0 2006.229.06:12:41.53#ibcon#wrote, iclass 12, count 0 2006.229.06:12:41.53#ibcon#about to read 3, iclass 12, count 0 2006.229.06:12:41.56#ibcon#read 3, iclass 12, count 0 2006.229.06:12:41.56#ibcon#about to read 4, iclass 12, count 0 2006.229.06:12:41.56#ibcon#read 4, iclass 12, count 0 2006.229.06:12:41.56#ibcon#about to read 5, iclass 12, count 0 2006.229.06:12:41.56#ibcon#read 5, iclass 12, count 0 2006.229.06:12:41.56#ibcon#about to read 6, iclass 12, count 0 2006.229.06:12:41.56#ibcon#read 6, iclass 12, count 0 2006.229.06:12:41.56#ibcon#end of sib2, iclass 12, count 0 2006.229.06:12:41.56#ibcon#*after write, iclass 12, count 0 2006.229.06:12:41.56#ibcon#*before return 0, iclass 12, count 0 2006.229.06:12:41.56#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:41.56#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:41.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:12:41.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:12:41.56$vck44/valo=2,534.99 2006.229.06:12:41.56#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.06:12:41.56#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.06:12:41.56#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:41.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:41.56#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:41.56#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:41.56#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:12:41.56#ibcon#first serial, iclass 14, count 0 2006.229.06:12:41.56#ibcon#enter sib2, iclass 14, count 0 2006.229.06:12:41.56#ibcon#flushed, iclass 14, count 0 2006.229.06:12:41.56#ibcon#about to write, iclass 14, count 0 2006.229.06:12:41.56#ibcon#wrote, iclass 14, count 0 2006.229.06:12:41.56#ibcon#about to read 3, iclass 14, count 0 2006.229.06:12:41.58#ibcon#read 3, iclass 14, count 0 2006.229.06:12:41.58#ibcon#about to read 4, iclass 14, count 0 2006.229.06:12:41.58#ibcon#read 4, iclass 14, count 0 2006.229.06:12:41.58#ibcon#about to read 5, iclass 14, count 0 2006.229.06:12:41.58#ibcon#read 5, iclass 14, count 0 2006.229.06:12:41.58#ibcon#about to read 6, iclass 14, count 0 2006.229.06:12:41.58#ibcon#read 6, iclass 14, count 0 2006.229.06:12:41.58#ibcon#end of sib2, iclass 14, count 0 2006.229.06:12:41.58#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:12:41.58#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:12:41.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:12:41.58#ibcon#*before write, iclass 14, count 0 2006.229.06:12:41.58#ibcon#enter sib2, iclass 14, count 0 2006.229.06:12:41.58#ibcon#flushed, iclass 14, count 0 2006.229.06:12:41.58#ibcon#about to write, iclass 14, count 0 2006.229.06:12:41.58#ibcon#wrote, iclass 14, count 0 2006.229.06:12:41.58#ibcon#about to read 3, iclass 14, count 0 2006.229.06:12:41.62#ibcon#read 3, iclass 14, count 0 2006.229.06:12:41.62#ibcon#about to read 4, iclass 14, count 0 2006.229.06:12:41.62#ibcon#read 4, iclass 14, count 0 2006.229.06:12:41.62#ibcon#about to read 5, iclass 14, count 0 2006.229.06:12:41.62#ibcon#read 5, iclass 14, count 0 2006.229.06:12:41.62#ibcon#about to read 6, iclass 14, count 0 2006.229.06:12:41.62#ibcon#read 6, iclass 14, count 0 2006.229.06:12:41.62#ibcon#end of sib2, iclass 14, count 0 2006.229.06:12:41.62#ibcon#*after write, iclass 14, count 0 2006.229.06:12:41.62#ibcon#*before return 0, iclass 14, count 0 2006.229.06:12:41.62#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:41.62#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:41.62#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:12:41.62#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:12:41.62$vck44/va=2,7 2006.229.06:12:41.62#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.06:12:41.62#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.06:12:41.62#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:41.62#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:12:41.65#abcon#<5=/05 2.7 4.6 30.55 91 999.3\r\n> 2006.229.06:12:41.67#abcon#{5=INTERFACE CLEAR} 2006.229.06:12:41.68#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:12:41.68#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:12:41.68#ibcon#enter wrdev, iclass 17, count 2 2006.229.06:12:41.68#ibcon#first serial, iclass 17, count 2 2006.229.06:12:41.68#ibcon#enter sib2, iclass 17, count 2 2006.229.06:12:41.68#ibcon#flushed, iclass 17, count 2 2006.229.06:12:41.68#ibcon#about to write, iclass 17, count 2 2006.229.06:12:41.68#ibcon#wrote, iclass 17, count 2 2006.229.06:12:41.68#ibcon#about to read 3, iclass 17, count 2 2006.229.06:12:41.70#ibcon#read 3, iclass 17, count 2 2006.229.06:12:41.70#ibcon#about to read 4, iclass 17, count 2 2006.229.06:12:41.70#ibcon#read 4, iclass 17, count 2 2006.229.06:12:41.70#ibcon#about to read 5, iclass 17, count 2 2006.229.06:12:41.70#ibcon#read 5, iclass 17, count 2 2006.229.06:12:41.70#ibcon#about to read 6, iclass 17, count 2 2006.229.06:12:41.70#ibcon#read 6, iclass 17, count 2 2006.229.06:12:41.70#ibcon#end of sib2, iclass 17, count 2 2006.229.06:12:41.70#ibcon#*mode == 0, iclass 17, count 2 2006.229.06:12:41.70#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.06:12:41.70#ibcon#[25=AT02-07\r\n] 2006.229.06:12:41.70#ibcon#*before write, iclass 17, count 2 2006.229.06:12:41.70#ibcon#enter sib2, iclass 17, count 2 2006.229.06:12:41.70#ibcon#flushed, iclass 17, count 2 2006.229.06:12:41.70#ibcon#about to write, iclass 17, count 2 2006.229.06:12:41.70#ibcon#wrote, iclass 17, count 2 2006.229.06:12:41.70#ibcon#about to read 3, iclass 17, count 2 2006.229.06:12:41.73#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:12:41.73#ibcon#read 3, iclass 17, count 2 2006.229.06:12:41.73#ibcon#about to read 4, iclass 17, count 2 2006.229.06:12:41.73#ibcon#read 4, iclass 17, count 2 2006.229.06:12:41.73#ibcon#about to read 5, iclass 17, count 2 2006.229.06:12:41.73#ibcon#read 5, iclass 17, count 2 2006.229.06:12:41.73#ibcon#about to read 6, iclass 17, count 2 2006.229.06:12:41.73#ibcon#read 6, iclass 17, count 2 2006.229.06:12:41.73#ibcon#end of sib2, iclass 17, count 2 2006.229.06:12:41.73#ibcon#*after write, iclass 17, count 2 2006.229.06:12:41.73#ibcon#*before return 0, iclass 17, count 2 2006.229.06:12:41.73#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:12:41.73#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:12:41.73#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.06:12:41.73#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:41.73#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:12:41.85#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:12:41.85#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:12:41.85#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:12:41.85#ibcon#first serial, iclass 17, count 0 2006.229.06:12:41.85#ibcon#enter sib2, iclass 17, count 0 2006.229.06:12:41.85#ibcon#flushed, iclass 17, count 0 2006.229.06:12:41.85#ibcon#about to write, iclass 17, count 0 2006.229.06:12:41.85#ibcon#wrote, iclass 17, count 0 2006.229.06:12:41.85#ibcon#about to read 3, iclass 17, count 0 2006.229.06:12:41.87#ibcon#read 3, iclass 17, count 0 2006.229.06:12:41.87#ibcon#about to read 4, iclass 17, count 0 2006.229.06:12:41.87#ibcon#read 4, iclass 17, count 0 2006.229.06:12:41.87#ibcon#about to read 5, iclass 17, count 0 2006.229.06:12:41.87#ibcon#read 5, iclass 17, count 0 2006.229.06:12:41.87#ibcon#about to read 6, iclass 17, count 0 2006.229.06:12:41.87#ibcon#read 6, iclass 17, count 0 2006.229.06:12:41.87#ibcon#end of sib2, iclass 17, count 0 2006.229.06:12:41.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:12:41.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:12:41.87#ibcon#[25=USB\r\n] 2006.229.06:12:41.87#ibcon#*before write, iclass 17, count 0 2006.229.06:12:41.87#ibcon#enter sib2, iclass 17, count 0 2006.229.06:12:41.87#ibcon#flushed, iclass 17, count 0 2006.229.06:12:41.87#ibcon#about to write, iclass 17, count 0 2006.229.06:12:41.87#ibcon#wrote, iclass 17, count 0 2006.229.06:12:41.87#ibcon#about to read 3, iclass 17, count 0 2006.229.06:12:41.90#ibcon#read 3, iclass 17, count 0 2006.229.06:12:41.90#ibcon#about to read 4, iclass 17, count 0 2006.229.06:12:41.90#ibcon#read 4, iclass 17, count 0 2006.229.06:12:41.90#ibcon#about to read 5, iclass 17, count 0 2006.229.06:12:41.90#ibcon#read 5, iclass 17, count 0 2006.229.06:12:41.90#ibcon#about to read 6, iclass 17, count 0 2006.229.06:12:41.90#ibcon#read 6, iclass 17, count 0 2006.229.06:12:41.90#ibcon#end of sib2, iclass 17, count 0 2006.229.06:12:41.90#ibcon#*after write, iclass 17, count 0 2006.229.06:12:41.90#ibcon#*before return 0, iclass 17, count 0 2006.229.06:12:41.90#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:12:41.90#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:12:41.90#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:12:41.90#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:12:41.90$vck44/valo=3,564.99 2006.229.06:12:41.90#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.06:12:41.90#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.06:12:41.90#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:41.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:41.90#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:41.90#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:41.90#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:12:41.90#ibcon#first serial, iclass 22, count 0 2006.229.06:12:41.90#ibcon#enter sib2, iclass 22, count 0 2006.229.06:12:41.90#ibcon#flushed, iclass 22, count 0 2006.229.06:12:41.90#ibcon#about to write, iclass 22, count 0 2006.229.06:12:41.90#ibcon#wrote, iclass 22, count 0 2006.229.06:12:41.90#ibcon#about to read 3, iclass 22, count 0 2006.229.06:12:41.92#ibcon#read 3, iclass 22, count 0 2006.229.06:12:41.92#ibcon#about to read 4, iclass 22, count 0 2006.229.06:12:41.92#ibcon#read 4, iclass 22, count 0 2006.229.06:12:41.92#ibcon#about to read 5, iclass 22, count 0 2006.229.06:12:41.92#ibcon#read 5, iclass 22, count 0 2006.229.06:12:41.92#ibcon#about to read 6, iclass 22, count 0 2006.229.06:12:41.92#ibcon#read 6, iclass 22, count 0 2006.229.06:12:41.92#ibcon#end of sib2, iclass 22, count 0 2006.229.06:12:41.92#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:12:41.92#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:12:41.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:12:41.92#ibcon#*before write, iclass 22, count 0 2006.229.06:12:41.92#ibcon#enter sib2, iclass 22, count 0 2006.229.06:12:41.92#ibcon#flushed, iclass 22, count 0 2006.229.06:12:41.92#ibcon#about to write, iclass 22, count 0 2006.229.06:12:41.92#ibcon#wrote, iclass 22, count 0 2006.229.06:12:41.92#ibcon#about to read 3, iclass 22, count 0 2006.229.06:12:41.96#ibcon#read 3, iclass 22, count 0 2006.229.06:12:41.96#ibcon#about to read 4, iclass 22, count 0 2006.229.06:12:41.96#ibcon#read 4, iclass 22, count 0 2006.229.06:12:41.96#ibcon#about to read 5, iclass 22, count 0 2006.229.06:12:41.96#ibcon#read 5, iclass 22, count 0 2006.229.06:12:41.96#ibcon#about to read 6, iclass 22, count 0 2006.229.06:12:41.96#ibcon#read 6, iclass 22, count 0 2006.229.06:12:41.96#ibcon#end of sib2, iclass 22, count 0 2006.229.06:12:41.96#ibcon#*after write, iclass 22, count 0 2006.229.06:12:41.96#ibcon#*before return 0, iclass 22, count 0 2006.229.06:12:41.96#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:41.96#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:41.96#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:12:41.96#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:12:41.96$vck44/va=3,6 2006.229.06:12:41.96#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.06:12:41.96#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.06:12:41.96#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:41.96#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:42.02#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:42.02#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:42.02#ibcon#enter wrdev, iclass 24, count 2 2006.229.06:12:42.02#ibcon#first serial, iclass 24, count 2 2006.229.06:12:42.02#ibcon#enter sib2, iclass 24, count 2 2006.229.06:12:42.02#ibcon#flushed, iclass 24, count 2 2006.229.06:12:42.02#ibcon#about to write, iclass 24, count 2 2006.229.06:12:42.02#ibcon#wrote, iclass 24, count 2 2006.229.06:12:42.02#ibcon#about to read 3, iclass 24, count 2 2006.229.06:12:42.04#ibcon#read 3, iclass 24, count 2 2006.229.06:12:42.04#ibcon#about to read 4, iclass 24, count 2 2006.229.06:12:42.04#ibcon#read 4, iclass 24, count 2 2006.229.06:12:42.04#ibcon#about to read 5, iclass 24, count 2 2006.229.06:12:42.04#ibcon#read 5, iclass 24, count 2 2006.229.06:12:42.04#ibcon#about to read 6, iclass 24, count 2 2006.229.06:12:42.04#ibcon#read 6, iclass 24, count 2 2006.229.06:12:42.04#ibcon#end of sib2, iclass 24, count 2 2006.229.06:12:42.04#ibcon#*mode == 0, iclass 24, count 2 2006.229.06:12:42.04#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.06:12:42.04#ibcon#[25=AT03-06\r\n] 2006.229.06:12:42.04#ibcon#*before write, iclass 24, count 2 2006.229.06:12:42.04#ibcon#enter sib2, iclass 24, count 2 2006.229.06:12:42.04#ibcon#flushed, iclass 24, count 2 2006.229.06:12:42.04#ibcon#about to write, iclass 24, count 2 2006.229.06:12:42.04#ibcon#wrote, iclass 24, count 2 2006.229.06:12:42.04#ibcon#about to read 3, iclass 24, count 2 2006.229.06:12:42.07#ibcon#read 3, iclass 24, count 2 2006.229.06:12:42.07#ibcon#about to read 4, iclass 24, count 2 2006.229.06:12:42.07#ibcon#read 4, iclass 24, count 2 2006.229.06:12:42.07#ibcon#about to read 5, iclass 24, count 2 2006.229.06:12:42.07#ibcon#read 5, iclass 24, count 2 2006.229.06:12:42.07#ibcon#about to read 6, iclass 24, count 2 2006.229.06:12:42.07#ibcon#read 6, iclass 24, count 2 2006.229.06:12:42.07#ibcon#end of sib2, iclass 24, count 2 2006.229.06:12:42.07#ibcon#*after write, iclass 24, count 2 2006.229.06:12:42.07#ibcon#*before return 0, iclass 24, count 2 2006.229.06:12:42.07#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:42.07#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:42.07#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.06:12:42.07#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:42.07#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:42.19#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:42.19#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:42.19#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:12:42.19#ibcon#first serial, iclass 24, count 0 2006.229.06:12:42.19#ibcon#enter sib2, iclass 24, count 0 2006.229.06:12:42.19#ibcon#flushed, iclass 24, count 0 2006.229.06:12:42.19#ibcon#about to write, iclass 24, count 0 2006.229.06:12:42.19#ibcon#wrote, iclass 24, count 0 2006.229.06:12:42.19#ibcon#about to read 3, iclass 24, count 0 2006.229.06:12:42.21#ibcon#read 3, iclass 24, count 0 2006.229.06:12:42.21#ibcon#about to read 4, iclass 24, count 0 2006.229.06:12:42.21#ibcon#read 4, iclass 24, count 0 2006.229.06:12:42.21#ibcon#about to read 5, iclass 24, count 0 2006.229.06:12:42.21#ibcon#read 5, iclass 24, count 0 2006.229.06:12:42.21#ibcon#about to read 6, iclass 24, count 0 2006.229.06:12:42.21#ibcon#read 6, iclass 24, count 0 2006.229.06:12:42.21#ibcon#end of sib2, iclass 24, count 0 2006.229.06:12:42.21#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:12:42.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:12:42.21#ibcon#[25=USB\r\n] 2006.229.06:12:42.21#ibcon#*before write, iclass 24, count 0 2006.229.06:12:42.21#ibcon#enter sib2, iclass 24, count 0 2006.229.06:12:42.21#ibcon#flushed, iclass 24, count 0 2006.229.06:12:42.21#ibcon#about to write, iclass 24, count 0 2006.229.06:12:42.21#ibcon#wrote, iclass 24, count 0 2006.229.06:12:42.21#ibcon#about to read 3, iclass 24, count 0 2006.229.06:12:42.24#ibcon#read 3, iclass 24, count 0 2006.229.06:12:42.24#ibcon#about to read 4, iclass 24, count 0 2006.229.06:12:42.24#ibcon#read 4, iclass 24, count 0 2006.229.06:12:42.24#ibcon#about to read 5, iclass 24, count 0 2006.229.06:12:42.24#ibcon#read 5, iclass 24, count 0 2006.229.06:12:42.24#ibcon#about to read 6, iclass 24, count 0 2006.229.06:12:42.24#ibcon#read 6, iclass 24, count 0 2006.229.06:12:42.24#ibcon#end of sib2, iclass 24, count 0 2006.229.06:12:42.24#ibcon#*after write, iclass 24, count 0 2006.229.06:12:42.24#ibcon#*before return 0, iclass 24, count 0 2006.229.06:12:42.24#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:42.24#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:42.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:12:42.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:12:42.24$vck44/valo=4,624.99 2006.229.06:12:42.24#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.06:12:42.24#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.06:12:42.24#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:42.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:42.24#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:42.24#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:42.24#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:12:42.24#ibcon#first serial, iclass 26, count 0 2006.229.06:12:42.24#ibcon#enter sib2, iclass 26, count 0 2006.229.06:12:42.24#ibcon#flushed, iclass 26, count 0 2006.229.06:12:42.24#ibcon#about to write, iclass 26, count 0 2006.229.06:12:42.24#ibcon#wrote, iclass 26, count 0 2006.229.06:12:42.24#ibcon#about to read 3, iclass 26, count 0 2006.229.06:12:42.26#ibcon#read 3, iclass 26, count 0 2006.229.06:12:42.26#ibcon#about to read 4, iclass 26, count 0 2006.229.06:12:42.26#ibcon#read 4, iclass 26, count 0 2006.229.06:12:42.26#ibcon#about to read 5, iclass 26, count 0 2006.229.06:12:42.26#ibcon#read 5, iclass 26, count 0 2006.229.06:12:42.26#ibcon#about to read 6, iclass 26, count 0 2006.229.06:12:42.26#ibcon#read 6, iclass 26, count 0 2006.229.06:12:42.26#ibcon#end of sib2, iclass 26, count 0 2006.229.06:12:42.26#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:12:42.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:12:42.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:12:42.26#ibcon#*before write, iclass 26, count 0 2006.229.06:12:42.26#ibcon#enter sib2, iclass 26, count 0 2006.229.06:12:42.26#ibcon#flushed, iclass 26, count 0 2006.229.06:12:42.26#ibcon#about to write, iclass 26, count 0 2006.229.06:12:42.26#ibcon#wrote, iclass 26, count 0 2006.229.06:12:42.26#ibcon#about to read 3, iclass 26, count 0 2006.229.06:12:42.30#ibcon#read 3, iclass 26, count 0 2006.229.06:12:42.30#ibcon#about to read 4, iclass 26, count 0 2006.229.06:12:42.30#ibcon#read 4, iclass 26, count 0 2006.229.06:12:42.30#ibcon#about to read 5, iclass 26, count 0 2006.229.06:12:42.30#ibcon#read 5, iclass 26, count 0 2006.229.06:12:42.30#ibcon#about to read 6, iclass 26, count 0 2006.229.06:12:42.30#ibcon#read 6, iclass 26, count 0 2006.229.06:12:42.30#ibcon#end of sib2, iclass 26, count 0 2006.229.06:12:42.30#ibcon#*after write, iclass 26, count 0 2006.229.06:12:42.30#ibcon#*before return 0, iclass 26, count 0 2006.229.06:12:42.30#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:42.30#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:42.30#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:12:42.30#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:12:42.30$vck44/va=4,7 2006.229.06:12:42.30#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.06:12:42.30#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.06:12:42.30#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:42.30#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:42.36#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:42.36#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:42.36#ibcon#enter wrdev, iclass 28, count 2 2006.229.06:12:42.36#ibcon#first serial, iclass 28, count 2 2006.229.06:12:42.36#ibcon#enter sib2, iclass 28, count 2 2006.229.06:12:42.36#ibcon#flushed, iclass 28, count 2 2006.229.06:12:42.36#ibcon#about to write, iclass 28, count 2 2006.229.06:12:42.36#ibcon#wrote, iclass 28, count 2 2006.229.06:12:42.36#ibcon#about to read 3, iclass 28, count 2 2006.229.06:12:42.38#ibcon#read 3, iclass 28, count 2 2006.229.06:12:42.38#ibcon#about to read 4, iclass 28, count 2 2006.229.06:12:42.38#ibcon#read 4, iclass 28, count 2 2006.229.06:12:42.38#ibcon#about to read 5, iclass 28, count 2 2006.229.06:12:42.38#ibcon#read 5, iclass 28, count 2 2006.229.06:12:42.38#ibcon#about to read 6, iclass 28, count 2 2006.229.06:12:42.38#ibcon#read 6, iclass 28, count 2 2006.229.06:12:42.38#ibcon#end of sib2, iclass 28, count 2 2006.229.06:12:42.38#ibcon#*mode == 0, iclass 28, count 2 2006.229.06:12:42.38#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.06:12:42.38#ibcon#[25=AT04-07\r\n] 2006.229.06:12:42.38#ibcon#*before write, iclass 28, count 2 2006.229.06:12:42.38#ibcon#enter sib2, iclass 28, count 2 2006.229.06:12:42.38#ibcon#flushed, iclass 28, count 2 2006.229.06:12:42.38#ibcon#about to write, iclass 28, count 2 2006.229.06:12:42.70#ibcon#wrote, iclass 28, count 2 2006.229.06:12:42.70#ibcon#about to read 3, iclass 28, count 2 2006.229.06:12:42.74#ibcon#read 3, iclass 28, count 2 2006.229.06:12:42.74#ibcon#about to read 4, iclass 28, count 2 2006.229.06:12:42.74#ibcon#read 4, iclass 28, count 2 2006.229.06:12:42.74#ibcon#about to read 5, iclass 28, count 2 2006.229.06:12:42.74#ibcon#read 5, iclass 28, count 2 2006.229.06:12:42.74#ibcon#about to read 6, iclass 28, count 2 2006.229.06:12:42.74#ibcon#read 6, iclass 28, count 2 2006.229.06:12:42.74#ibcon#end of sib2, iclass 28, count 2 2006.229.06:12:42.74#ibcon#*after write, iclass 28, count 2 2006.229.06:12:42.74#ibcon#*before return 0, iclass 28, count 2 2006.229.06:12:42.74#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:42.74#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:42.74#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.06:12:42.74#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:42.74#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:42.86#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:42.86#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:42.86#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:12:42.86#ibcon#first serial, iclass 28, count 0 2006.229.06:12:42.86#ibcon#enter sib2, iclass 28, count 0 2006.229.06:12:42.86#ibcon#flushed, iclass 28, count 0 2006.229.06:12:42.86#ibcon#about to write, iclass 28, count 0 2006.229.06:12:42.86#ibcon#wrote, iclass 28, count 0 2006.229.06:12:42.86#ibcon#about to read 3, iclass 28, count 0 2006.229.06:12:42.88#ibcon#read 3, iclass 28, count 0 2006.229.06:12:42.88#ibcon#about to read 4, iclass 28, count 0 2006.229.06:12:42.88#ibcon#read 4, iclass 28, count 0 2006.229.06:12:42.88#ibcon#about to read 5, iclass 28, count 0 2006.229.06:12:42.88#ibcon#read 5, iclass 28, count 0 2006.229.06:12:42.88#ibcon#about to read 6, iclass 28, count 0 2006.229.06:12:42.88#ibcon#read 6, iclass 28, count 0 2006.229.06:12:42.88#ibcon#end of sib2, iclass 28, count 0 2006.229.06:12:42.88#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:12:42.88#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:12:42.88#ibcon#[25=USB\r\n] 2006.229.06:12:42.88#ibcon#*before write, iclass 28, count 0 2006.229.06:12:42.88#ibcon#enter sib2, iclass 28, count 0 2006.229.06:12:42.88#ibcon#flushed, iclass 28, count 0 2006.229.06:12:42.88#ibcon#about to write, iclass 28, count 0 2006.229.06:12:42.88#ibcon#wrote, iclass 28, count 0 2006.229.06:12:42.88#ibcon#about to read 3, iclass 28, count 0 2006.229.06:12:42.91#ibcon#read 3, iclass 28, count 0 2006.229.06:12:42.91#ibcon#about to read 4, iclass 28, count 0 2006.229.06:12:42.91#ibcon#read 4, iclass 28, count 0 2006.229.06:12:42.91#ibcon#about to read 5, iclass 28, count 0 2006.229.06:12:42.91#ibcon#read 5, iclass 28, count 0 2006.229.06:12:42.91#ibcon#about to read 6, iclass 28, count 0 2006.229.06:12:42.91#ibcon#read 6, iclass 28, count 0 2006.229.06:12:42.91#ibcon#end of sib2, iclass 28, count 0 2006.229.06:12:42.91#ibcon#*after write, iclass 28, count 0 2006.229.06:12:42.91#ibcon#*before return 0, iclass 28, count 0 2006.229.06:12:42.91#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:42.91#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:42.91#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:12:42.91#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:12:42.91$vck44/valo=5,734.99 2006.229.06:12:42.91#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.06:12:42.91#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.06:12:42.91#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:42.91#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:42.91#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:42.91#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:42.91#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:12:42.91#ibcon#first serial, iclass 30, count 0 2006.229.06:12:42.91#ibcon#enter sib2, iclass 30, count 0 2006.229.06:12:42.91#ibcon#flushed, iclass 30, count 0 2006.229.06:12:42.91#ibcon#about to write, iclass 30, count 0 2006.229.06:12:42.91#ibcon#wrote, iclass 30, count 0 2006.229.06:12:42.91#ibcon#about to read 3, iclass 30, count 0 2006.229.06:12:42.93#ibcon#read 3, iclass 30, count 0 2006.229.06:12:42.93#ibcon#about to read 4, iclass 30, count 0 2006.229.06:12:42.93#ibcon#read 4, iclass 30, count 0 2006.229.06:12:42.93#ibcon#about to read 5, iclass 30, count 0 2006.229.06:12:42.93#ibcon#read 5, iclass 30, count 0 2006.229.06:12:42.93#ibcon#about to read 6, iclass 30, count 0 2006.229.06:12:42.93#ibcon#read 6, iclass 30, count 0 2006.229.06:12:42.93#ibcon#end of sib2, iclass 30, count 0 2006.229.06:12:42.93#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:12:42.93#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:12:42.93#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:12:42.93#ibcon#*before write, iclass 30, count 0 2006.229.06:12:42.93#ibcon#enter sib2, iclass 30, count 0 2006.229.06:12:42.93#ibcon#flushed, iclass 30, count 0 2006.229.06:12:42.93#ibcon#about to write, iclass 30, count 0 2006.229.06:12:42.93#ibcon#wrote, iclass 30, count 0 2006.229.06:12:42.93#ibcon#about to read 3, iclass 30, count 0 2006.229.06:12:42.97#ibcon#read 3, iclass 30, count 0 2006.229.06:12:42.97#ibcon#about to read 4, iclass 30, count 0 2006.229.06:12:42.97#ibcon#read 4, iclass 30, count 0 2006.229.06:12:42.97#ibcon#about to read 5, iclass 30, count 0 2006.229.06:12:42.97#ibcon#read 5, iclass 30, count 0 2006.229.06:12:42.97#ibcon#about to read 6, iclass 30, count 0 2006.229.06:12:42.97#ibcon#read 6, iclass 30, count 0 2006.229.06:12:42.97#ibcon#end of sib2, iclass 30, count 0 2006.229.06:12:42.97#ibcon#*after write, iclass 30, count 0 2006.229.06:12:42.97#ibcon#*before return 0, iclass 30, count 0 2006.229.06:12:42.97#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:42.97#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:42.97#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:12:42.97#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:12:42.97$vck44/va=5,4 2006.229.06:12:42.97#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.06:12:42.97#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.06:12:42.97#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:42.97#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:43.03#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:43.03#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:43.03#ibcon#enter wrdev, iclass 32, count 2 2006.229.06:12:43.03#ibcon#first serial, iclass 32, count 2 2006.229.06:12:43.03#ibcon#enter sib2, iclass 32, count 2 2006.229.06:12:43.03#ibcon#flushed, iclass 32, count 2 2006.229.06:12:43.03#ibcon#about to write, iclass 32, count 2 2006.229.06:12:43.03#ibcon#wrote, iclass 32, count 2 2006.229.06:12:43.03#ibcon#about to read 3, iclass 32, count 2 2006.229.06:12:43.05#ibcon#read 3, iclass 32, count 2 2006.229.06:12:43.05#ibcon#about to read 4, iclass 32, count 2 2006.229.06:12:43.05#ibcon#read 4, iclass 32, count 2 2006.229.06:12:43.05#ibcon#about to read 5, iclass 32, count 2 2006.229.06:12:43.05#ibcon#read 5, iclass 32, count 2 2006.229.06:12:43.05#ibcon#about to read 6, iclass 32, count 2 2006.229.06:12:43.05#ibcon#read 6, iclass 32, count 2 2006.229.06:12:43.05#ibcon#end of sib2, iclass 32, count 2 2006.229.06:12:43.05#ibcon#*mode == 0, iclass 32, count 2 2006.229.06:12:43.05#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.06:12:43.05#ibcon#[25=AT05-04\r\n] 2006.229.06:12:43.05#ibcon#*before write, iclass 32, count 2 2006.229.06:12:43.05#ibcon#enter sib2, iclass 32, count 2 2006.229.06:12:43.05#ibcon#flushed, iclass 32, count 2 2006.229.06:12:43.05#ibcon#about to write, iclass 32, count 2 2006.229.06:12:43.05#ibcon#wrote, iclass 32, count 2 2006.229.06:12:43.05#ibcon#about to read 3, iclass 32, count 2 2006.229.06:12:43.08#ibcon#read 3, iclass 32, count 2 2006.229.06:12:43.08#ibcon#about to read 4, iclass 32, count 2 2006.229.06:12:43.08#ibcon#read 4, iclass 32, count 2 2006.229.06:12:43.08#ibcon#about to read 5, iclass 32, count 2 2006.229.06:12:43.08#ibcon#read 5, iclass 32, count 2 2006.229.06:12:43.08#ibcon#about to read 6, iclass 32, count 2 2006.229.06:12:43.08#ibcon#read 6, iclass 32, count 2 2006.229.06:12:43.08#ibcon#end of sib2, iclass 32, count 2 2006.229.06:12:43.08#ibcon#*after write, iclass 32, count 2 2006.229.06:12:43.08#ibcon#*before return 0, iclass 32, count 2 2006.229.06:12:43.08#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:43.08#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:43.08#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.06:12:43.08#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:43.08#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:43.20#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:43.20#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:43.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:12:43.20#ibcon#first serial, iclass 32, count 0 2006.229.06:12:43.20#ibcon#enter sib2, iclass 32, count 0 2006.229.06:12:43.20#ibcon#flushed, iclass 32, count 0 2006.229.06:12:43.20#ibcon#about to write, iclass 32, count 0 2006.229.06:12:43.20#ibcon#wrote, iclass 32, count 0 2006.229.06:12:43.20#ibcon#about to read 3, iclass 32, count 0 2006.229.06:12:43.22#ibcon#read 3, iclass 32, count 0 2006.229.06:12:43.22#ibcon#about to read 4, iclass 32, count 0 2006.229.06:12:43.22#ibcon#read 4, iclass 32, count 0 2006.229.06:12:43.22#ibcon#about to read 5, iclass 32, count 0 2006.229.06:12:43.22#ibcon#read 5, iclass 32, count 0 2006.229.06:12:43.22#ibcon#about to read 6, iclass 32, count 0 2006.229.06:12:43.22#ibcon#read 6, iclass 32, count 0 2006.229.06:12:43.22#ibcon#end of sib2, iclass 32, count 0 2006.229.06:12:43.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:12:43.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:12:43.22#ibcon#[25=USB\r\n] 2006.229.06:12:43.22#ibcon#*before write, iclass 32, count 0 2006.229.06:12:43.22#ibcon#enter sib2, iclass 32, count 0 2006.229.06:12:43.22#ibcon#flushed, iclass 32, count 0 2006.229.06:12:43.22#ibcon#about to write, iclass 32, count 0 2006.229.06:12:43.22#ibcon#wrote, iclass 32, count 0 2006.229.06:12:43.22#ibcon#about to read 3, iclass 32, count 0 2006.229.06:12:43.25#ibcon#read 3, iclass 32, count 0 2006.229.06:12:43.25#ibcon#about to read 4, iclass 32, count 0 2006.229.06:12:43.25#ibcon#read 4, iclass 32, count 0 2006.229.06:12:43.25#ibcon#about to read 5, iclass 32, count 0 2006.229.06:12:43.25#ibcon#read 5, iclass 32, count 0 2006.229.06:12:43.25#ibcon#about to read 6, iclass 32, count 0 2006.229.06:12:43.25#ibcon#read 6, iclass 32, count 0 2006.229.06:12:43.25#ibcon#end of sib2, iclass 32, count 0 2006.229.06:12:43.25#ibcon#*after write, iclass 32, count 0 2006.229.06:12:43.25#ibcon#*before return 0, iclass 32, count 0 2006.229.06:12:43.25#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:43.25#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:43.25#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:12:43.25#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:12:43.25$vck44/valo=6,814.99 2006.229.06:12:43.25#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.06:12:43.25#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.06:12:43.25#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:43.25#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:43.25#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:43.25#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:43.25#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:12:43.25#ibcon#first serial, iclass 34, count 0 2006.229.06:12:43.25#ibcon#enter sib2, iclass 34, count 0 2006.229.06:12:43.25#ibcon#flushed, iclass 34, count 0 2006.229.06:12:43.25#ibcon#about to write, iclass 34, count 0 2006.229.06:12:43.25#ibcon#wrote, iclass 34, count 0 2006.229.06:12:43.25#ibcon#about to read 3, iclass 34, count 0 2006.229.06:12:43.27#ibcon#read 3, iclass 34, count 0 2006.229.06:12:43.27#ibcon#about to read 4, iclass 34, count 0 2006.229.06:12:43.27#ibcon#read 4, iclass 34, count 0 2006.229.06:12:43.27#ibcon#about to read 5, iclass 34, count 0 2006.229.06:12:43.27#ibcon#read 5, iclass 34, count 0 2006.229.06:12:43.27#ibcon#about to read 6, iclass 34, count 0 2006.229.06:12:43.27#ibcon#read 6, iclass 34, count 0 2006.229.06:12:43.27#ibcon#end of sib2, iclass 34, count 0 2006.229.06:12:43.27#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:12:43.27#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:12:43.27#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:12:43.27#ibcon#*before write, iclass 34, count 0 2006.229.06:12:43.27#ibcon#enter sib2, iclass 34, count 0 2006.229.06:12:43.27#ibcon#flushed, iclass 34, count 0 2006.229.06:12:43.27#ibcon#about to write, iclass 34, count 0 2006.229.06:12:43.27#ibcon#wrote, iclass 34, count 0 2006.229.06:12:43.27#ibcon#about to read 3, iclass 34, count 0 2006.229.06:12:43.31#ibcon#read 3, iclass 34, count 0 2006.229.06:12:43.31#ibcon#about to read 4, iclass 34, count 0 2006.229.06:12:43.31#ibcon#read 4, iclass 34, count 0 2006.229.06:12:43.31#ibcon#about to read 5, iclass 34, count 0 2006.229.06:12:43.31#ibcon#read 5, iclass 34, count 0 2006.229.06:12:43.31#ibcon#about to read 6, iclass 34, count 0 2006.229.06:12:43.31#ibcon#read 6, iclass 34, count 0 2006.229.06:12:43.31#ibcon#end of sib2, iclass 34, count 0 2006.229.06:12:43.31#ibcon#*after write, iclass 34, count 0 2006.229.06:12:43.31#ibcon#*before return 0, iclass 34, count 0 2006.229.06:12:43.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:43.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:43.31#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:12:43.31#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:12:43.31$vck44/va=6,4 2006.229.06:12:43.31#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.06:12:43.31#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.06:12:43.31#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:43.31#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:43.37#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:43.37#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:43.37#ibcon#enter wrdev, iclass 36, count 2 2006.229.06:12:43.37#ibcon#first serial, iclass 36, count 2 2006.229.06:12:43.37#ibcon#enter sib2, iclass 36, count 2 2006.229.06:12:43.37#ibcon#flushed, iclass 36, count 2 2006.229.06:12:43.37#ibcon#about to write, iclass 36, count 2 2006.229.06:12:43.37#ibcon#wrote, iclass 36, count 2 2006.229.06:12:43.37#ibcon#about to read 3, iclass 36, count 2 2006.229.06:12:43.39#ibcon#read 3, iclass 36, count 2 2006.229.06:12:43.39#ibcon#about to read 4, iclass 36, count 2 2006.229.06:12:43.39#ibcon#read 4, iclass 36, count 2 2006.229.06:12:43.39#ibcon#about to read 5, iclass 36, count 2 2006.229.06:12:43.39#ibcon#read 5, iclass 36, count 2 2006.229.06:12:43.39#ibcon#about to read 6, iclass 36, count 2 2006.229.06:12:43.39#ibcon#read 6, iclass 36, count 2 2006.229.06:12:43.39#ibcon#end of sib2, iclass 36, count 2 2006.229.06:12:43.39#ibcon#*mode == 0, iclass 36, count 2 2006.229.06:12:43.39#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.06:12:43.39#ibcon#[25=AT06-04\r\n] 2006.229.06:12:43.39#ibcon#*before write, iclass 36, count 2 2006.229.06:12:43.39#ibcon#enter sib2, iclass 36, count 2 2006.229.06:12:43.39#ibcon#flushed, iclass 36, count 2 2006.229.06:12:43.39#ibcon#about to write, iclass 36, count 2 2006.229.06:12:43.39#ibcon#wrote, iclass 36, count 2 2006.229.06:12:43.39#ibcon#about to read 3, iclass 36, count 2 2006.229.06:12:43.42#ibcon#read 3, iclass 36, count 2 2006.229.06:12:43.42#ibcon#about to read 4, iclass 36, count 2 2006.229.06:12:43.42#ibcon#read 4, iclass 36, count 2 2006.229.06:12:43.42#ibcon#about to read 5, iclass 36, count 2 2006.229.06:12:43.42#ibcon#read 5, iclass 36, count 2 2006.229.06:12:43.42#ibcon#about to read 6, iclass 36, count 2 2006.229.06:12:43.42#ibcon#read 6, iclass 36, count 2 2006.229.06:12:43.42#ibcon#end of sib2, iclass 36, count 2 2006.229.06:12:43.42#ibcon#*after write, iclass 36, count 2 2006.229.06:12:43.42#ibcon#*before return 0, iclass 36, count 2 2006.229.06:12:43.42#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:43.42#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:43.42#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.06:12:43.42#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:43.42#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:43.54#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:43.54#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:43.54#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:12:43.54#ibcon#first serial, iclass 36, count 0 2006.229.06:12:43.54#ibcon#enter sib2, iclass 36, count 0 2006.229.06:12:43.54#ibcon#flushed, iclass 36, count 0 2006.229.06:12:43.54#ibcon#about to write, iclass 36, count 0 2006.229.06:12:43.54#ibcon#wrote, iclass 36, count 0 2006.229.06:12:43.54#ibcon#about to read 3, iclass 36, count 0 2006.229.06:12:43.56#ibcon#read 3, iclass 36, count 0 2006.229.06:12:43.56#ibcon#about to read 4, iclass 36, count 0 2006.229.06:12:43.56#ibcon#read 4, iclass 36, count 0 2006.229.06:12:43.56#ibcon#about to read 5, iclass 36, count 0 2006.229.06:12:43.56#ibcon#read 5, iclass 36, count 0 2006.229.06:12:43.56#ibcon#about to read 6, iclass 36, count 0 2006.229.06:12:43.56#ibcon#read 6, iclass 36, count 0 2006.229.06:12:43.56#ibcon#end of sib2, iclass 36, count 0 2006.229.06:12:43.56#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:12:43.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:12:43.56#ibcon#[25=USB\r\n] 2006.229.06:12:43.56#ibcon#*before write, iclass 36, count 0 2006.229.06:12:43.56#ibcon#enter sib2, iclass 36, count 0 2006.229.06:12:43.56#ibcon#flushed, iclass 36, count 0 2006.229.06:12:43.56#ibcon#about to write, iclass 36, count 0 2006.229.06:12:43.56#ibcon#wrote, iclass 36, count 0 2006.229.06:12:43.56#ibcon#about to read 3, iclass 36, count 0 2006.229.06:12:43.59#ibcon#read 3, iclass 36, count 0 2006.229.06:12:43.59#ibcon#about to read 4, iclass 36, count 0 2006.229.06:12:43.59#ibcon#read 4, iclass 36, count 0 2006.229.06:12:43.59#ibcon#about to read 5, iclass 36, count 0 2006.229.06:12:43.59#ibcon#read 5, iclass 36, count 0 2006.229.06:12:43.59#ibcon#about to read 6, iclass 36, count 0 2006.229.06:12:43.59#ibcon#read 6, iclass 36, count 0 2006.229.06:12:43.59#ibcon#end of sib2, iclass 36, count 0 2006.229.06:12:43.59#ibcon#*after write, iclass 36, count 0 2006.229.06:12:43.59#ibcon#*before return 0, iclass 36, count 0 2006.229.06:12:43.59#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:43.59#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:43.59#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:12:43.59#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:12:43.59$vck44/valo=7,864.99 2006.229.06:12:43.59#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.06:12:43.59#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.06:12:43.59#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:43.59#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:43.59#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:43.59#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:43.59#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:12:43.59#ibcon#first serial, iclass 38, count 0 2006.229.06:12:43.59#ibcon#enter sib2, iclass 38, count 0 2006.229.06:12:43.59#ibcon#flushed, iclass 38, count 0 2006.229.06:12:43.59#ibcon#about to write, iclass 38, count 0 2006.229.06:12:43.59#ibcon#wrote, iclass 38, count 0 2006.229.06:12:43.59#ibcon#about to read 3, iclass 38, count 0 2006.229.06:12:43.61#ibcon#read 3, iclass 38, count 0 2006.229.06:12:43.61#ibcon#about to read 4, iclass 38, count 0 2006.229.06:12:43.61#ibcon#read 4, iclass 38, count 0 2006.229.06:12:43.61#ibcon#about to read 5, iclass 38, count 0 2006.229.06:12:43.61#ibcon#read 5, iclass 38, count 0 2006.229.06:12:43.61#ibcon#about to read 6, iclass 38, count 0 2006.229.06:12:43.61#ibcon#read 6, iclass 38, count 0 2006.229.06:12:43.61#ibcon#end of sib2, iclass 38, count 0 2006.229.06:12:43.61#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:12:43.61#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:12:43.61#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:12:43.61#ibcon#*before write, iclass 38, count 0 2006.229.06:12:43.61#ibcon#enter sib2, iclass 38, count 0 2006.229.06:12:43.61#ibcon#flushed, iclass 38, count 0 2006.229.06:12:43.61#ibcon#about to write, iclass 38, count 0 2006.229.06:12:43.61#ibcon#wrote, iclass 38, count 0 2006.229.06:12:43.61#ibcon#about to read 3, iclass 38, count 0 2006.229.06:12:43.65#ibcon#read 3, iclass 38, count 0 2006.229.06:12:43.65#ibcon#about to read 4, iclass 38, count 0 2006.229.06:12:43.65#ibcon#read 4, iclass 38, count 0 2006.229.06:12:43.65#ibcon#about to read 5, iclass 38, count 0 2006.229.06:12:43.65#ibcon#read 5, iclass 38, count 0 2006.229.06:12:43.65#ibcon#about to read 6, iclass 38, count 0 2006.229.06:12:43.65#ibcon#read 6, iclass 38, count 0 2006.229.06:12:43.65#ibcon#end of sib2, iclass 38, count 0 2006.229.06:12:43.65#ibcon#*after write, iclass 38, count 0 2006.229.06:12:43.65#ibcon#*before return 0, iclass 38, count 0 2006.229.06:12:43.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:43.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:43.65#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:12:43.65#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:12:43.65$vck44/va=7,5 2006.229.06:12:43.65#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.06:12:43.65#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.06:12:43.65#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:43.65#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:43.71#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:43.71#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:43.71#ibcon#enter wrdev, iclass 40, count 2 2006.229.06:12:43.71#ibcon#first serial, iclass 40, count 2 2006.229.06:12:43.71#ibcon#enter sib2, iclass 40, count 2 2006.229.06:12:43.71#ibcon#flushed, iclass 40, count 2 2006.229.06:12:43.71#ibcon#about to write, iclass 40, count 2 2006.229.06:12:43.71#ibcon#wrote, iclass 40, count 2 2006.229.06:12:43.71#ibcon#about to read 3, iclass 40, count 2 2006.229.06:12:43.73#ibcon#read 3, iclass 40, count 2 2006.229.06:12:43.73#ibcon#about to read 4, iclass 40, count 2 2006.229.06:12:43.73#ibcon#read 4, iclass 40, count 2 2006.229.06:12:43.73#ibcon#about to read 5, iclass 40, count 2 2006.229.06:12:43.73#ibcon#read 5, iclass 40, count 2 2006.229.06:12:43.73#ibcon#about to read 6, iclass 40, count 2 2006.229.06:12:43.73#ibcon#read 6, iclass 40, count 2 2006.229.06:12:43.73#ibcon#end of sib2, iclass 40, count 2 2006.229.06:12:43.73#ibcon#*mode == 0, iclass 40, count 2 2006.229.06:12:43.73#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.06:12:43.73#ibcon#[25=AT07-05\r\n] 2006.229.06:12:43.73#ibcon#*before write, iclass 40, count 2 2006.229.06:12:43.73#ibcon#enter sib2, iclass 40, count 2 2006.229.06:12:43.73#ibcon#flushed, iclass 40, count 2 2006.229.06:12:43.73#ibcon#about to write, iclass 40, count 2 2006.229.06:12:43.73#ibcon#wrote, iclass 40, count 2 2006.229.06:12:43.73#ibcon#about to read 3, iclass 40, count 2 2006.229.06:12:43.76#ibcon#read 3, iclass 40, count 2 2006.229.06:12:43.92#ibcon#about to read 4, iclass 40, count 2 2006.229.06:12:43.92#ibcon#read 4, iclass 40, count 2 2006.229.06:12:43.92#ibcon#about to read 5, iclass 40, count 2 2006.229.06:12:43.92#ibcon#read 5, iclass 40, count 2 2006.229.06:12:43.92#ibcon#about to read 6, iclass 40, count 2 2006.229.06:12:43.92#ibcon#read 6, iclass 40, count 2 2006.229.06:12:43.92#ibcon#end of sib2, iclass 40, count 2 2006.229.06:12:43.92#ibcon#*after write, iclass 40, count 2 2006.229.06:12:43.92#ibcon#*before return 0, iclass 40, count 2 2006.229.06:12:43.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:43.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:43.92#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.06:12:43.92#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:43.92#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:44.04#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:44.04#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:44.04#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:12:44.04#ibcon#first serial, iclass 40, count 0 2006.229.06:12:44.04#ibcon#enter sib2, iclass 40, count 0 2006.229.06:12:44.04#ibcon#flushed, iclass 40, count 0 2006.229.06:12:44.04#ibcon#about to write, iclass 40, count 0 2006.229.06:12:44.04#ibcon#wrote, iclass 40, count 0 2006.229.06:12:44.04#ibcon#about to read 3, iclass 40, count 0 2006.229.06:12:44.06#ibcon#read 3, iclass 40, count 0 2006.229.06:12:44.06#ibcon#about to read 4, iclass 40, count 0 2006.229.06:12:44.06#ibcon#read 4, iclass 40, count 0 2006.229.06:12:44.06#ibcon#about to read 5, iclass 40, count 0 2006.229.06:12:44.06#ibcon#read 5, iclass 40, count 0 2006.229.06:12:44.06#ibcon#about to read 6, iclass 40, count 0 2006.229.06:12:44.06#ibcon#read 6, iclass 40, count 0 2006.229.06:12:44.06#ibcon#end of sib2, iclass 40, count 0 2006.229.06:12:44.06#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:12:44.06#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:12:44.06#ibcon#[25=USB\r\n] 2006.229.06:12:44.06#ibcon#*before write, iclass 40, count 0 2006.229.06:12:44.06#ibcon#enter sib2, iclass 40, count 0 2006.229.06:12:44.06#ibcon#flushed, iclass 40, count 0 2006.229.06:12:44.06#ibcon#about to write, iclass 40, count 0 2006.229.06:12:44.06#ibcon#wrote, iclass 40, count 0 2006.229.06:12:44.06#ibcon#about to read 3, iclass 40, count 0 2006.229.06:12:44.09#ibcon#read 3, iclass 40, count 0 2006.229.06:12:44.09#ibcon#about to read 4, iclass 40, count 0 2006.229.06:12:44.09#ibcon#read 4, iclass 40, count 0 2006.229.06:12:44.09#ibcon#about to read 5, iclass 40, count 0 2006.229.06:12:44.09#ibcon#read 5, iclass 40, count 0 2006.229.06:12:44.09#ibcon#about to read 6, iclass 40, count 0 2006.229.06:12:44.09#ibcon#read 6, iclass 40, count 0 2006.229.06:12:44.09#ibcon#end of sib2, iclass 40, count 0 2006.229.06:12:44.09#ibcon#*after write, iclass 40, count 0 2006.229.06:12:44.09#ibcon#*before return 0, iclass 40, count 0 2006.229.06:12:44.09#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:44.09#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:44.09#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:12:44.09#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:12:44.09$vck44/valo=8,884.99 2006.229.06:12:44.09#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.06:12:44.09#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.06:12:44.09#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:44.09#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:44.09#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:44.09#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:44.09#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:12:44.09#ibcon#first serial, iclass 4, count 0 2006.229.06:12:44.09#ibcon#enter sib2, iclass 4, count 0 2006.229.06:12:44.09#ibcon#flushed, iclass 4, count 0 2006.229.06:12:44.09#ibcon#about to write, iclass 4, count 0 2006.229.06:12:44.09#ibcon#wrote, iclass 4, count 0 2006.229.06:12:44.09#ibcon#about to read 3, iclass 4, count 0 2006.229.06:12:44.11#ibcon#read 3, iclass 4, count 0 2006.229.06:12:44.11#ibcon#about to read 4, iclass 4, count 0 2006.229.06:12:44.11#ibcon#read 4, iclass 4, count 0 2006.229.06:12:44.11#ibcon#about to read 5, iclass 4, count 0 2006.229.06:12:44.11#ibcon#read 5, iclass 4, count 0 2006.229.06:12:44.11#ibcon#about to read 6, iclass 4, count 0 2006.229.06:12:44.11#ibcon#read 6, iclass 4, count 0 2006.229.06:12:44.11#ibcon#end of sib2, iclass 4, count 0 2006.229.06:12:44.11#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:12:44.11#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:12:44.11#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:12:44.11#ibcon#*before write, iclass 4, count 0 2006.229.06:12:44.11#ibcon#enter sib2, iclass 4, count 0 2006.229.06:12:44.11#ibcon#flushed, iclass 4, count 0 2006.229.06:12:44.11#ibcon#about to write, iclass 4, count 0 2006.229.06:12:44.11#ibcon#wrote, iclass 4, count 0 2006.229.06:12:44.11#ibcon#about to read 3, iclass 4, count 0 2006.229.06:12:44.15#ibcon#read 3, iclass 4, count 0 2006.229.06:12:44.15#ibcon#about to read 4, iclass 4, count 0 2006.229.06:12:44.15#ibcon#read 4, iclass 4, count 0 2006.229.06:12:44.15#ibcon#about to read 5, iclass 4, count 0 2006.229.06:12:44.15#ibcon#read 5, iclass 4, count 0 2006.229.06:12:44.15#ibcon#about to read 6, iclass 4, count 0 2006.229.06:12:44.15#ibcon#read 6, iclass 4, count 0 2006.229.06:12:44.15#ibcon#end of sib2, iclass 4, count 0 2006.229.06:12:44.15#ibcon#*after write, iclass 4, count 0 2006.229.06:12:44.15#ibcon#*before return 0, iclass 4, count 0 2006.229.06:12:44.15#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:44.15#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:44.15#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:12:44.15#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:12:44.15$vck44/va=8,6 2006.229.06:12:44.15#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.06:12:44.15#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.06:12:44.15#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:44.15#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:12:44.21#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:12:44.21#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:12:44.21#ibcon#enter wrdev, iclass 6, count 2 2006.229.06:12:44.21#ibcon#first serial, iclass 6, count 2 2006.229.06:12:44.21#ibcon#enter sib2, iclass 6, count 2 2006.229.06:12:44.21#ibcon#flushed, iclass 6, count 2 2006.229.06:12:44.21#ibcon#about to write, iclass 6, count 2 2006.229.06:12:44.21#ibcon#wrote, iclass 6, count 2 2006.229.06:12:44.21#ibcon#about to read 3, iclass 6, count 2 2006.229.06:12:44.23#ibcon#read 3, iclass 6, count 2 2006.229.06:12:44.23#ibcon#about to read 4, iclass 6, count 2 2006.229.06:12:44.23#ibcon#read 4, iclass 6, count 2 2006.229.06:12:44.23#ibcon#about to read 5, iclass 6, count 2 2006.229.06:12:44.23#ibcon#read 5, iclass 6, count 2 2006.229.06:12:44.23#ibcon#about to read 6, iclass 6, count 2 2006.229.06:12:44.23#ibcon#read 6, iclass 6, count 2 2006.229.06:12:44.23#ibcon#end of sib2, iclass 6, count 2 2006.229.06:12:44.23#ibcon#*mode == 0, iclass 6, count 2 2006.229.06:12:44.23#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.06:12:44.23#ibcon#[25=AT08-06\r\n] 2006.229.06:12:44.23#ibcon#*before write, iclass 6, count 2 2006.229.06:12:44.23#ibcon#enter sib2, iclass 6, count 2 2006.229.06:12:44.23#ibcon#flushed, iclass 6, count 2 2006.229.06:12:44.23#ibcon#about to write, iclass 6, count 2 2006.229.06:12:44.23#ibcon#wrote, iclass 6, count 2 2006.229.06:12:44.23#ibcon#about to read 3, iclass 6, count 2 2006.229.06:12:44.26#ibcon#read 3, iclass 6, count 2 2006.229.06:12:44.26#ibcon#about to read 4, iclass 6, count 2 2006.229.06:12:44.26#ibcon#read 4, iclass 6, count 2 2006.229.06:12:44.26#ibcon#about to read 5, iclass 6, count 2 2006.229.06:12:44.26#ibcon#read 5, iclass 6, count 2 2006.229.06:12:44.26#ibcon#about to read 6, iclass 6, count 2 2006.229.06:12:44.26#ibcon#read 6, iclass 6, count 2 2006.229.06:12:44.26#ibcon#end of sib2, iclass 6, count 2 2006.229.06:12:44.26#ibcon#*after write, iclass 6, count 2 2006.229.06:12:44.26#ibcon#*before return 0, iclass 6, count 2 2006.229.06:12:44.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:12:44.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:12:44.26#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.06:12:44.26#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:44.26#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:12:44.38#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:12:44.38#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:12:44.38#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:12:44.38#ibcon#first serial, iclass 6, count 0 2006.229.06:12:44.38#ibcon#enter sib2, iclass 6, count 0 2006.229.06:12:44.38#ibcon#flushed, iclass 6, count 0 2006.229.06:12:44.38#ibcon#about to write, iclass 6, count 0 2006.229.06:12:44.38#ibcon#wrote, iclass 6, count 0 2006.229.06:12:44.38#ibcon#about to read 3, iclass 6, count 0 2006.229.06:12:44.40#ibcon#read 3, iclass 6, count 0 2006.229.06:12:44.40#ibcon#about to read 4, iclass 6, count 0 2006.229.06:12:44.40#ibcon#read 4, iclass 6, count 0 2006.229.06:12:44.40#ibcon#about to read 5, iclass 6, count 0 2006.229.06:12:44.40#ibcon#read 5, iclass 6, count 0 2006.229.06:12:44.40#ibcon#about to read 6, iclass 6, count 0 2006.229.06:12:44.40#ibcon#read 6, iclass 6, count 0 2006.229.06:12:44.40#ibcon#end of sib2, iclass 6, count 0 2006.229.06:12:44.40#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:12:44.40#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:12:44.40#ibcon#[25=USB\r\n] 2006.229.06:12:44.40#ibcon#*before write, iclass 6, count 0 2006.229.06:12:44.40#ibcon#enter sib2, iclass 6, count 0 2006.229.06:12:44.40#ibcon#flushed, iclass 6, count 0 2006.229.06:12:44.40#ibcon#about to write, iclass 6, count 0 2006.229.06:12:44.40#ibcon#wrote, iclass 6, count 0 2006.229.06:12:44.40#ibcon#about to read 3, iclass 6, count 0 2006.229.06:12:44.43#ibcon#read 3, iclass 6, count 0 2006.229.06:12:44.43#ibcon#about to read 4, iclass 6, count 0 2006.229.06:12:44.43#ibcon#read 4, iclass 6, count 0 2006.229.06:12:44.43#ibcon#about to read 5, iclass 6, count 0 2006.229.06:12:44.43#ibcon#read 5, iclass 6, count 0 2006.229.06:12:44.43#ibcon#about to read 6, iclass 6, count 0 2006.229.06:12:44.43#ibcon#read 6, iclass 6, count 0 2006.229.06:12:44.43#ibcon#end of sib2, iclass 6, count 0 2006.229.06:12:44.43#ibcon#*after write, iclass 6, count 0 2006.229.06:12:44.43#ibcon#*before return 0, iclass 6, count 0 2006.229.06:12:44.43#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:12:44.43#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:12:44.43#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:12:44.43#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:12:44.43$vck44/vblo=1,629.99 2006.229.06:12:44.43#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.06:12:44.43#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.06:12:44.43#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:44.43#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:44.43#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:44.43#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:44.43#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:12:44.43#ibcon#first serial, iclass 10, count 0 2006.229.06:12:44.43#ibcon#enter sib2, iclass 10, count 0 2006.229.06:12:44.43#ibcon#flushed, iclass 10, count 0 2006.229.06:12:44.43#ibcon#about to write, iclass 10, count 0 2006.229.06:12:44.43#ibcon#wrote, iclass 10, count 0 2006.229.06:12:44.43#ibcon#about to read 3, iclass 10, count 0 2006.229.06:12:44.45#ibcon#read 3, iclass 10, count 0 2006.229.06:12:44.45#ibcon#about to read 4, iclass 10, count 0 2006.229.06:12:44.45#ibcon#read 4, iclass 10, count 0 2006.229.06:12:44.45#ibcon#about to read 5, iclass 10, count 0 2006.229.06:12:44.45#ibcon#read 5, iclass 10, count 0 2006.229.06:12:44.45#ibcon#about to read 6, iclass 10, count 0 2006.229.06:12:44.45#ibcon#read 6, iclass 10, count 0 2006.229.06:12:44.45#ibcon#end of sib2, iclass 10, count 0 2006.229.06:12:44.45#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:12:44.45#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:12:44.45#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:12:44.45#ibcon#*before write, iclass 10, count 0 2006.229.06:12:44.45#ibcon#enter sib2, iclass 10, count 0 2006.229.06:12:44.45#ibcon#flushed, iclass 10, count 0 2006.229.06:12:44.45#ibcon#about to write, iclass 10, count 0 2006.229.06:12:44.45#ibcon#wrote, iclass 10, count 0 2006.229.06:12:44.45#ibcon#about to read 3, iclass 10, count 0 2006.229.06:12:44.49#ibcon#read 3, iclass 10, count 0 2006.229.06:12:44.49#ibcon#about to read 4, iclass 10, count 0 2006.229.06:12:44.49#ibcon#read 4, iclass 10, count 0 2006.229.06:12:44.49#ibcon#about to read 5, iclass 10, count 0 2006.229.06:12:44.49#ibcon#read 5, iclass 10, count 0 2006.229.06:12:44.49#ibcon#about to read 6, iclass 10, count 0 2006.229.06:12:44.49#ibcon#read 6, iclass 10, count 0 2006.229.06:12:44.49#ibcon#end of sib2, iclass 10, count 0 2006.229.06:12:44.49#ibcon#*after write, iclass 10, count 0 2006.229.06:12:44.49#ibcon#*before return 0, iclass 10, count 0 2006.229.06:12:44.49#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:44.49#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:12:44.49#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:12:44.49#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:12:44.49$vck44/vb=1,4 2006.229.06:12:44.49#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.06:12:44.49#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.06:12:44.49#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:44.49#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:44.49#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:44.49#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:44.49#ibcon#enter wrdev, iclass 12, count 2 2006.229.06:12:44.49#ibcon#first serial, iclass 12, count 2 2006.229.06:12:44.49#ibcon#enter sib2, iclass 12, count 2 2006.229.06:12:44.49#ibcon#flushed, iclass 12, count 2 2006.229.06:12:44.49#ibcon#about to write, iclass 12, count 2 2006.229.06:12:44.49#ibcon#wrote, iclass 12, count 2 2006.229.06:12:44.49#ibcon#about to read 3, iclass 12, count 2 2006.229.06:12:44.51#ibcon#read 3, iclass 12, count 2 2006.229.06:12:44.51#ibcon#about to read 4, iclass 12, count 2 2006.229.06:12:44.51#ibcon#read 4, iclass 12, count 2 2006.229.06:12:44.51#ibcon#about to read 5, iclass 12, count 2 2006.229.06:12:44.51#ibcon#read 5, iclass 12, count 2 2006.229.06:12:44.51#ibcon#about to read 6, iclass 12, count 2 2006.229.06:12:44.51#ibcon#read 6, iclass 12, count 2 2006.229.06:12:44.51#ibcon#end of sib2, iclass 12, count 2 2006.229.06:12:44.51#ibcon#*mode == 0, iclass 12, count 2 2006.229.06:12:44.51#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.06:12:44.51#ibcon#[27=AT01-04\r\n] 2006.229.06:12:44.51#ibcon#*before write, iclass 12, count 2 2006.229.06:12:44.51#ibcon#enter sib2, iclass 12, count 2 2006.229.06:12:44.51#ibcon#flushed, iclass 12, count 2 2006.229.06:12:44.51#ibcon#about to write, iclass 12, count 2 2006.229.06:12:44.51#ibcon#wrote, iclass 12, count 2 2006.229.06:12:44.51#ibcon#about to read 3, iclass 12, count 2 2006.229.06:12:44.54#ibcon#read 3, iclass 12, count 2 2006.229.06:12:44.54#ibcon#about to read 4, iclass 12, count 2 2006.229.06:12:44.54#ibcon#read 4, iclass 12, count 2 2006.229.06:12:44.54#ibcon#about to read 5, iclass 12, count 2 2006.229.06:12:44.54#ibcon#read 5, iclass 12, count 2 2006.229.06:12:44.54#ibcon#about to read 6, iclass 12, count 2 2006.229.06:12:44.54#ibcon#read 6, iclass 12, count 2 2006.229.06:12:44.54#ibcon#end of sib2, iclass 12, count 2 2006.229.06:12:44.54#ibcon#*after write, iclass 12, count 2 2006.229.06:12:44.54#ibcon#*before return 0, iclass 12, count 2 2006.229.06:12:44.54#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:44.54#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:12:44.54#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.06:12:44.54#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:44.54#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:44.66#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:44.66#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:44.66#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:12:44.66#ibcon#first serial, iclass 12, count 0 2006.229.06:12:44.66#ibcon#enter sib2, iclass 12, count 0 2006.229.06:12:44.66#ibcon#flushed, iclass 12, count 0 2006.229.06:12:44.66#ibcon#about to write, iclass 12, count 0 2006.229.06:12:44.66#ibcon#wrote, iclass 12, count 0 2006.229.06:12:44.66#ibcon#about to read 3, iclass 12, count 0 2006.229.06:12:44.68#ibcon#read 3, iclass 12, count 0 2006.229.06:12:44.68#ibcon#about to read 4, iclass 12, count 0 2006.229.06:12:44.68#ibcon#read 4, iclass 12, count 0 2006.229.06:12:44.68#ibcon#about to read 5, iclass 12, count 0 2006.229.06:12:44.68#ibcon#read 5, iclass 12, count 0 2006.229.06:12:44.68#ibcon#about to read 6, iclass 12, count 0 2006.229.06:12:44.68#ibcon#read 6, iclass 12, count 0 2006.229.06:12:44.68#ibcon#end of sib2, iclass 12, count 0 2006.229.06:12:44.68#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:12:44.68#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:12:44.68#ibcon#[27=USB\r\n] 2006.229.06:12:44.68#ibcon#*before write, iclass 12, count 0 2006.229.06:12:44.68#ibcon#enter sib2, iclass 12, count 0 2006.229.06:12:44.68#ibcon#flushed, iclass 12, count 0 2006.229.06:12:44.68#ibcon#about to write, iclass 12, count 0 2006.229.06:12:44.68#ibcon#wrote, iclass 12, count 0 2006.229.06:12:44.68#ibcon#about to read 3, iclass 12, count 0 2006.229.06:12:44.71#ibcon#read 3, iclass 12, count 0 2006.229.06:12:44.71#ibcon#about to read 4, iclass 12, count 0 2006.229.06:12:44.71#ibcon#read 4, iclass 12, count 0 2006.229.06:12:44.71#ibcon#about to read 5, iclass 12, count 0 2006.229.06:12:44.71#ibcon#read 5, iclass 12, count 0 2006.229.06:12:44.71#ibcon#about to read 6, iclass 12, count 0 2006.229.06:12:44.71#ibcon#read 6, iclass 12, count 0 2006.229.06:12:44.71#ibcon#end of sib2, iclass 12, count 0 2006.229.06:12:44.71#ibcon#*after write, iclass 12, count 0 2006.229.06:12:44.71#ibcon#*before return 0, iclass 12, count 0 2006.229.06:12:44.71#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:44.71#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:12:44.71#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:12:44.71#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:12:44.71$vck44/vblo=2,634.99 2006.229.06:12:44.71#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.06:12:44.71#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.06:12:44.71#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:44.71#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:44.71#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:44.71#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:44.71#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:12:44.71#ibcon#first serial, iclass 14, count 0 2006.229.06:12:44.71#ibcon#enter sib2, iclass 14, count 0 2006.229.06:12:44.71#ibcon#flushed, iclass 14, count 0 2006.229.06:12:44.71#ibcon#about to write, iclass 14, count 0 2006.229.06:12:44.71#ibcon#wrote, iclass 14, count 0 2006.229.06:12:44.71#ibcon#about to read 3, iclass 14, count 0 2006.229.06:12:44.73#ibcon#read 3, iclass 14, count 0 2006.229.06:12:44.73#ibcon#about to read 4, iclass 14, count 0 2006.229.06:12:44.73#ibcon#read 4, iclass 14, count 0 2006.229.06:12:44.73#ibcon#about to read 5, iclass 14, count 0 2006.229.06:12:44.73#ibcon#read 5, iclass 14, count 0 2006.229.06:12:44.73#ibcon#about to read 6, iclass 14, count 0 2006.229.06:12:44.73#ibcon#read 6, iclass 14, count 0 2006.229.06:12:44.73#ibcon#end of sib2, iclass 14, count 0 2006.229.06:12:44.73#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:12:44.73#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:12:44.73#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:12:44.73#ibcon#*before write, iclass 14, count 0 2006.229.06:12:44.73#ibcon#enter sib2, iclass 14, count 0 2006.229.06:12:44.73#ibcon#flushed, iclass 14, count 0 2006.229.06:12:44.73#ibcon#about to write, iclass 14, count 0 2006.229.06:12:44.73#ibcon#wrote, iclass 14, count 0 2006.229.06:12:44.73#ibcon#about to read 3, iclass 14, count 0 2006.229.06:12:44.77#ibcon#read 3, iclass 14, count 0 2006.229.06:12:44.77#ibcon#about to read 4, iclass 14, count 0 2006.229.06:12:44.77#ibcon#read 4, iclass 14, count 0 2006.229.06:12:44.77#ibcon#about to read 5, iclass 14, count 0 2006.229.06:12:44.77#ibcon#read 5, iclass 14, count 0 2006.229.06:12:44.77#ibcon#about to read 6, iclass 14, count 0 2006.229.06:12:44.77#ibcon#read 6, iclass 14, count 0 2006.229.06:12:44.77#ibcon#end of sib2, iclass 14, count 0 2006.229.06:12:44.77#ibcon#*after write, iclass 14, count 0 2006.229.06:12:44.77#ibcon#*before return 0, iclass 14, count 0 2006.229.06:12:44.77#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:44.77#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:12:44.77#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:12:44.77#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:12:44.77$vck44/vb=2,4 2006.229.06:12:44.77#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.06:12:44.77#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.06:12:44.77#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:44.77#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:12:44.83#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:12:44.83#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:12:44.83#ibcon#enter wrdev, iclass 16, count 2 2006.229.06:12:44.83#ibcon#first serial, iclass 16, count 2 2006.229.06:12:44.83#ibcon#enter sib2, iclass 16, count 2 2006.229.06:12:44.83#ibcon#flushed, iclass 16, count 2 2006.229.06:12:44.83#ibcon#about to write, iclass 16, count 2 2006.229.06:12:44.83#ibcon#wrote, iclass 16, count 2 2006.229.06:12:44.83#ibcon#about to read 3, iclass 16, count 2 2006.229.06:12:44.85#ibcon#read 3, iclass 16, count 2 2006.229.06:12:44.85#ibcon#about to read 4, iclass 16, count 2 2006.229.06:12:44.85#ibcon#read 4, iclass 16, count 2 2006.229.06:12:44.85#ibcon#about to read 5, iclass 16, count 2 2006.229.06:12:44.85#ibcon#read 5, iclass 16, count 2 2006.229.06:12:44.85#ibcon#about to read 6, iclass 16, count 2 2006.229.06:12:44.85#ibcon#read 6, iclass 16, count 2 2006.229.06:12:44.85#ibcon#end of sib2, iclass 16, count 2 2006.229.06:12:44.85#ibcon#*mode == 0, iclass 16, count 2 2006.229.06:12:44.85#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.06:12:44.85#ibcon#[27=AT02-04\r\n] 2006.229.06:12:44.85#ibcon#*before write, iclass 16, count 2 2006.229.06:12:44.85#ibcon#enter sib2, iclass 16, count 2 2006.229.06:12:44.85#ibcon#flushed, iclass 16, count 2 2006.229.06:12:44.85#ibcon#about to write, iclass 16, count 2 2006.229.06:12:44.85#ibcon#wrote, iclass 16, count 2 2006.229.06:12:44.85#ibcon#about to read 3, iclass 16, count 2 2006.229.06:12:44.88#ibcon#read 3, iclass 16, count 2 2006.229.06:12:44.88#ibcon#about to read 4, iclass 16, count 2 2006.229.06:12:44.88#ibcon#read 4, iclass 16, count 2 2006.229.06:12:44.88#ibcon#about to read 5, iclass 16, count 2 2006.229.06:12:44.88#ibcon#read 5, iclass 16, count 2 2006.229.06:12:44.88#ibcon#about to read 6, iclass 16, count 2 2006.229.06:12:44.88#ibcon#read 6, iclass 16, count 2 2006.229.06:12:44.88#ibcon#end of sib2, iclass 16, count 2 2006.229.06:12:44.88#ibcon#*after write, iclass 16, count 2 2006.229.06:12:44.88#ibcon#*before return 0, iclass 16, count 2 2006.229.06:12:44.88#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:12:44.88#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:12:44.88#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.06:12:44.88#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:44.88#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:12:45.00#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:12:45.00#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:12:45.00#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:12:45.00#ibcon#first serial, iclass 16, count 0 2006.229.06:12:45.00#ibcon#enter sib2, iclass 16, count 0 2006.229.06:12:45.00#ibcon#flushed, iclass 16, count 0 2006.229.06:12:45.00#ibcon#about to write, iclass 16, count 0 2006.229.06:12:45.00#ibcon#wrote, iclass 16, count 0 2006.229.06:12:45.00#ibcon#about to read 3, iclass 16, count 0 2006.229.06:12:45.02#ibcon#read 3, iclass 16, count 0 2006.229.06:12:45.02#ibcon#about to read 4, iclass 16, count 0 2006.229.06:12:45.02#ibcon#read 4, iclass 16, count 0 2006.229.06:12:45.02#ibcon#about to read 5, iclass 16, count 0 2006.229.06:12:45.02#ibcon#read 5, iclass 16, count 0 2006.229.06:12:45.02#ibcon#about to read 6, iclass 16, count 0 2006.229.06:12:45.02#ibcon#read 6, iclass 16, count 0 2006.229.06:12:45.02#ibcon#end of sib2, iclass 16, count 0 2006.229.06:12:45.02#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:12:45.02#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:12:45.02#ibcon#[27=USB\r\n] 2006.229.06:12:45.02#ibcon#*before write, iclass 16, count 0 2006.229.06:12:45.02#ibcon#enter sib2, iclass 16, count 0 2006.229.06:12:45.02#ibcon#flushed, iclass 16, count 0 2006.229.06:12:45.02#ibcon#about to write, iclass 16, count 0 2006.229.06:12:45.02#ibcon#wrote, iclass 16, count 0 2006.229.06:12:45.02#ibcon#about to read 3, iclass 16, count 0 2006.229.06:12:45.05#ibcon#read 3, iclass 16, count 0 2006.229.06:12:45.05#ibcon#about to read 4, iclass 16, count 0 2006.229.06:12:45.05#ibcon#read 4, iclass 16, count 0 2006.229.06:12:45.05#ibcon#about to read 5, iclass 16, count 0 2006.229.06:12:45.05#ibcon#read 5, iclass 16, count 0 2006.229.06:12:45.05#ibcon#about to read 6, iclass 16, count 0 2006.229.06:12:45.05#ibcon#read 6, iclass 16, count 0 2006.229.06:12:45.05#ibcon#end of sib2, iclass 16, count 0 2006.229.06:12:45.05#ibcon#*after write, iclass 16, count 0 2006.229.06:12:45.05#ibcon#*before return 0, iclass 16, count 0 2006.229.06:12:45.05#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:12:45.05#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:12:45.05#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:12:45.05#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:12:45.05$vck44/vblo=3,649.99 2006.229.06:12:45.05#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.06:12:45.05#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.06:12:45.05#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:45.05#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:12:45.05#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:12:45.05#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:12:45.05#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:12:45.05#ibcon#first serial, iclass 18, count 0 2006.229.06:12:45.05#ibcon#enter sib2, iclass 18, count 0 2006.229.06:12:45.05#ibcon#flushed, iclass 18, count 0 2006.229.06:12:45.05#ibcon#about to write, iclass 18, count 0 2006.229.06:12:45.05#ibcon#wrote, iclass 18, count 0 2006.229.06:12:45.05#ibcon#about to read 3, iclass 18, count 0 2006.229.06:12:45.07#ibcon#read 3, iclass 18, count 0 2006.229.06:12:45.07#ibcon#about to read 4, iclass 18, count 0 2006.229.06:12:45.07#ibcon#read 4, iclass 18, count 0 2006.229.06:12:45.07#ibcon#about to read 5, iclass 18, count 0 2006.229.06:12:45.07#ibcon#read 5, iclass 18, count 0 2006.229.06:12:45.07#ibcon#about to read 6, iclass 18, count 0 2006.229.06:12:45.07#ibcon#read 6, iclass 18, count 0 2006.229.06:12:45.07#ibcon#end of sib2, iclass 18, count 0 2006.229.06:12:45.07#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:12:45.07#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:12:45.07#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:12:45.07#ibcon#*before write, iclass 18, count 0 2006.229.06:12:45.07#ibcon#enter sib2, iclass 18, count 0 2006.229.06:12:45.07#ibcon#flushed, iclass 18, count 0 2006.229.06:12:45.07#ibcon#about to write, iclass 18, count 0 2006.229.06:12:45.07#ibcon#wrote, iclass 18, count 0 2006.229.06:12:45.07#ibcon#about to read 3, iclass 18, count 0 2006.229.06:12:45.11#ibcon#read 3, iclass 18, count 0 2006.229.06:12:45.11#ibcon#about to read 4, iclass 18, count 0 2006.229.06:12:45.11#ibcon#read 4, iclass 18, count 0 2006.229.06:12:45.11#ibcon#about to read 5, iclass 18, count 0 2006.229.06:12:45.11#ibcon#read 5, iclass 18, count 0 2006.229.06:12:45.11#ibcon#about to read 6, iclass 18, count 0 2006.229.06:12:45.11#ibcon#read 6, iclass 18, count 0 2006.229.06:12:45.11#ibcon#end of sib2, iclass 18, count 0 2006.229.06:12:45.11#ibcon#*after write, iclass 18, count 0 2006.229.06:12:45.11#ibcon#*before return 0, iclass 18, count 0 2006.229.06:12:45.11#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:12:45.11#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:12:45.11#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:12:45.11#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:12:45.11$vck44/vb=3,4 2006.229.06:12:45.11#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.06:12:45.11#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.06:12:45.11#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:45.11#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:12:45.17#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:12:45.17#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:12:45.17#ibcon#enter wrdev, iclass 20, count 2 2006.229.06:12:45.17#ibcon#first serial, iclass 20, count 2 2006.229.06:12:45.17#ibcon#enter sib2, iclass 20, count 2 2006.229.06:12:45.17#ibcon#flushed, iclass 20, count 2 2006.229.06:12:45.17#ibcon#about to write, iclass 20, count 2 2006.229.06:12:45.17#ibcon#wrote, iclass 20, count 2 2006.229.06:12:45.17#ibcon#about to read 3, iclass 20, count 2 2006.229.06:12:45.19#ibcon#read 3, iclass 20, count 2 2006.229.06:12:45.19#ibcon#about to read 4, iclass 20, count 2 2006.229.06:12:45.19#ibcon#read 4, iclass 20, count 2 2006.229.06:12:45.19#ibcon#about to read 5, iclass 20, count 2 2006.229.06:12:45.19#ibcon#read 5, iclass 20, count 2 2006.229.06:12:45.19#ibcon#about to read 6, iclass 20, count 2 2006.229.06:12:45.19#ibcon#read 6, iclass 20, count 2 2006.229.06:12:45.19#ibcon#end of sib2, iclass 20, count 2 2006.229.06:12:45.19#ibcon#*mode == 0, iclass 20, count 2 2006.229.06:12:45.19#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.06:12:45.19#ibcon#[27=AT03-04\r\n] 2006.229.06:12:45.19#ibcon#*before write, iclass 20, count 2 2006.229.06:12:45.19#ibcon#enter sib2, iclass 20, count 2 2006.229.06:12:45.19#ibcon#flushed, iclass 20, count 2 2006.229.06:12:45.19#ibcon#about to write, iclass 20, count 2 2006.229.06:12:45.19#ibcon#wrote, iclass 20, count 2 2006.229.06:12:45.19#ibcon#about to read 3, iclass 20, count 2 2006.229.06:12:45.22#ibcon#read 3, iclass 20, count 2 2006.229.06:12:45.22#ibcon#about to read 4, iclass 20, count 2 2006.229.06:12:45.31#ibcon#read 4, iclass 20, count 2 2006.229.06:12:45.31#ibcon#about to read 5, iclass 20, count 2 2006.229.06:12:45.31#ibcon#read 5, iclass 20, count 2 2006.229.06:12:45.31#ibcon#about to read 6, iclass 20, count 2 2006.229.06:12:45.31#ibcon#read 6, iclass 20, count 2 2006.229.06:12:45.31#ibcon#end of sib2, iclass 20, count 2 2006.229.06:12:45.31#ibcon#*after write, iclass 20, count 2 2006.229.06:12:45.31#ibcon#*before return 0, iclass 20, count 2 2006.229.06:12:45.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:12:45.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:12:45.31#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.06:12:45.31#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:45.31#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:12:45.43#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:12:45.43#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:12:45.43#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:12:45.43#ibcon#first serial, iclass 20, count 0 2006.229.06:12:45.43#ibcon#enter sib2, iclass 20, count 0 2006.229.06:12:45.43#ibcon#flushed, iclass 20, count 0 2006.229.06:12:45.43#ibcon#about to write, iclass 20, count 0 2006.229.06:12:45.43#ibcon#wrote, iclass 20, count 0 2006.229.06:12:45.43#ibcon#about to read 3, iclass 20, count 0 2006.229.06:12:45.45#ibcon#read 3, iclass 20, count 0 2006.229.06:12:45.45#ibcon#about to read 4, iclass 20, count 0 2006.229.06:12:45.45#ibcon#read 4, iclass 20, count 0 2006.229.06:12:45.45#ibcon#about to read 5, iclass 20, count 0 2006.229.06:12:45.45#ibcon#read 5, iclass 20, count 0 2006.229.06:12:45.45#ibcon#about to read 6, iclass 20, count 0 2006.229.06:12:45.45#ibcon#read 6, iclass 20, count 0 2006.229.06:12:45.45#ibcon#end of sib2, iclass 20, count 0 2006.229.06:12:45.45#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:12:45.45#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:12:45.45#ibcon#[27=USB\r\n] 2006.229.06:12:45.45#ibcon#*before write, iclass 20, count 0 2006.229.06:12:45.45#ibcon#enter sib2, iclass 20, count 0 2006.229.06:12:45.45#ibcon#flushed, iclass 20, count 0 2006.229.06:12:45.45#ibcon#about to write, iclass 20, count 0 2006.229.06:12:45.45#ibcon#wrote, iclass 20, count 0 2006.229.06:12:45.45#ibcon#about to read 3, iclass 20, count 0 2006.229.06:12:45.48#ibcon#read 3, iclass 20, count 0 2006.229.06:12:45.48#ibcon#about to read 4, iclass 20, count 0 2006.229.06:12:45.48#ibcon#read 4, iclass 20, count 0 2006.229.06:12:45.48#ibcon#about to read 5, iclass 20, count 0 2006.229.06:12:45.48#ibcon#read 5, iclass 20, count 0 2006.229.06:12:45.48#ibcon#about to read 6, iclass 20, count 0 2006.229.06:12:45.48#ibcon#read 6, iclass 20, count 0 2006.229.06:12:45.48#ibcon#end of sib2, iclass 20, count 0 2006.229.06:12:45.48#ibcon#*after write, iclass 20, count 0 2006.229.06:12:45.48#ibcon#*before return 0, iclass 20, count 0 2006.229.06:12:45.48#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:12:45.48#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:12:45.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:12:45.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:12:45.48$vck44/vblo=4,679.99 2006.229.06:12:45.48#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.06:12:45.48#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.06:12:45.48#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:45.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:45.48#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:45.48#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:45.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:12:45.48#ibcon#first serial, iclass 22, count 0 2006.229.06:12:45.48#ibcon#enter sib2, iclass 22, count 0 2006.229.06:12:45.48#ibcon#flushed, iclass 22, count 0 2006.229.06:12:45.48#ibcon#about to write, iclass 22, count 0 2006.229.06:12:45.48#ibcon#wrote, iclass 22, count 0 2006.229.06:12:45.48#ibcon#about to read 3, iclass 22, count 0 2006.229.06:12:45.50#ibcon#read 3, iclass 22, count 0 2006.229.06:12:45.50#ibcon#about to read 4, iclass 22, count 0 2006.229.06:12:45.50#ibcon#read 4, iclass 22, count 0 2006.229.06:12:45.50#ibcon#about to read 5, iclass 22, count 0 2006.229.06:12:45.50#ibcon#read 5, iclass 22, count 0 2006.229.06:12:45.50#ibcon#about to read 6, iclass 22, count 0 2006.229.06:12:45.50#ibcon#read 6, iclass 22, count 0 2006.229.06:12:45.50#ibcon#end of sib2, iclass 22, count 0 2006.229.06:12:45.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:12:45.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:12:45.50#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:12:45.50#ibcon#*before write, iclass 22, count 0 2006.229.06:12:45.50#ibcon#enter sib2, iclass 22, count 0 2006.229.06:12:45.50#ibcon#flushed, iclass 22, count 0 2006.229.06:12:45.50#ibcon#about to write, iclass 22, count 0 2006.229.06:12:45.50#ibcon#wrote, iclass 22, count 0 2006.229.06:12:45.50#ibcon#about to read 3, iclass 22, count 0 2006.229.06:12:45.54#ibcon#read 3, iclass 22, count 0 2006.229.06:12:45.54#ibcon#about to read 4, iclass 22, count 0 2006.229.06:12:45.54#ibcon#read 4, iclass 22, count 0 2006.229.06:12:45.54#ibcon#about to read 5, iclass 22, count 0 2006.229.06:12:45.54#ibcon#read 5, iclass 22, count 0 2006.229.06:12:45.54#ibcon#about to read 6, iclass 22, count 0 2006.229.06:12:45.54#ibcon#read 6, iclass 22, count 0 2006.229.06:12:45.54#ibcon#end of sib2, iclass 22, count 0 2006.229.06:12:45.54#ibcon#*after write, iclass 22, count 0 2006.229.06:12:45.54#ibcon#*before return 0, iclass 22, count 0 2006.229.06:12:45.54#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:45.54#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:12:45.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:12:45.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:12:45.54$vck44/vb=4,4 2006.229.06:12:45.54#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.06:12:45.54#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.06:12:45.54#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:45.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:45.60#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:45.60#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:45.60#ibcon#enter wrdev, iclass 24, count 2 2006.229.06:12:45.60#ibcon#first serial, iclass 24, count 2 2006.229.06:12:45.60#ibcon#enter sib2, iclass 24, count 2 2006.229.06:12:45.60#ibcon#flushed, iclass 24, count 2 2006.229.06:12:45.60#ibcon#about to write, iclass 24, count 2 2006.229.06:12:45.60#ibcon#wrote, iclass 24, count 2 2006.229.06:12:45.60#ibcon#about to read 3, iclass 24, count 2 2006.229.06:12:45.62#ibcon#read 3, iclass 24, count 2 2006.229.06:12:45.62#ibcon#about to read 4, iclass 24, count 2 2006.229.06:12:45.62#ibcon#read 4, iclass 24, count 2 2006.229.06:12:45.62#ibcon#about to read 5, iclass 24, count 2 2006.229.06:12:45.62#ibcon#read 5, iclass 24, count 2 2006.229.06:12:45.62#ibcon#about to read 6, iclass 24, count 2 2006.229.06:12:45.62#ibcon#read 6, iclass 24, count 2 2006.229.06:12:45.62#ibcon#end of sib2, iclass 24, count 2 2006.229.06:12:45.62#ibcon#*mode == 0, iclass 24, count 2 2006.229.06:12:45.62#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.06:12:45.62#ibcon#[27=AT04-04\r\n] 2006.229.06:12:45.62#ibcon#*before write, iclass 24, count 2 2006.229.06:12:45.62#ibcon#enter sib2, iclass 24, count 2 2006.229.06:12:45.62#ibcon#flushed, iclass 24, count 2 2006.229.06:12:45.62#ibcon#about to write, iclass 24, count 2 2006.229.06:12:45.62#ibcon#wrote, iclass 24, count 2 2006.229.06:12:45.62#ibcon#about to read 3, iclass 24, count 2 2006.229.06:12:45.65#ibcon#read 3, iclass 24, count 2 2006.229.06:12:45.65#ibcon#about to read 4, iclass 24, count 2 2006.229.06:12:45.65#ibcon#read 4, iclass 24, count 2 2006.229.06:12:45.65#ibcon#about to read 5, iclass 24, count 2 2006.229.06:12:45.65#ibcon#read 5, iclass 24, count 2 2006.229.06:12:45.65#ibcon#about to read 6, iclass 24, count 2 2006.229.06:12:45.65#ibcon#read 6, iclass 24, count 2 2006.229.06:12:45.65#ibcon#end of sib2, iclass 24, count 2 2006.229.06:12:45.65#ibcon#*after write, iclass 24, count 2 2006.229.06:12:45.65#ibcon#*before return 0, iclass 24, count 2 2006.229.06:12:45.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:45.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:12:45.65#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.06:12:45.65#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:45.65#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:45.77#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:45.77#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:45.77#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:12:45.77#ibcon#first serial, iclass 24, count 0 2006.229.06:12:45.77#ibcon#enter sib2, iclass 24, count 0 2006.229.06:12:45.77#ibcon#flushed, iclass 24, count 0 2006.229.06:12:45.77#ibcon#about to write, iclass 24, count 0 2006.229.06:12:45.77#ibcon#wrote, iclass 24, count 0 2006.229.06:12:45.77#ibcon#about to read 3, iclass 24, count 0 2006.229.06:12:45.79#ibcon#read 3, iclass 24, count 0 2006.229.06:12:45.79#ibcon#about to read 4, iclass 24, count 0 2006.229.06:12:45.79#ibcon#read 4, iclass 24, count 0 2006.229.06:12:45.79#ibcon#about to read 5, iclass 24, count 0 2006.229.06:12:45.79#ibcon#read 5, iclass 24, count 0 2006.229.06:12:45.79#ibcon#about to read 6, iclass 24, count 0 2006.229.06:12:45.79#ibcon#read 6, iclass 24, count 0 2006.229.06:12:45.79#ibcon#end of sib2, iclass 24, count 0 2006.229.06:12:45.79#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:12:45.79#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:12:45.79#ibcon#[27=USB\r\n] 2006.229.06:12:45.79#ibcon#*before write, iclass 24, count 0 2006.229.06:12:45.79#ibcon#enter sib2, iclass 24, count 0 2006.229.06:12:45.79#ibcon#flushed, iclass 24, count 0 2006.229.06:12:45.79#ibcon#about to write, iclass 24, count 0 2006.229.06:12:45.79#ibcon#wrote, iclass 24, count 0 2006.229.06:12:45.79#ibcon#about to read 3, iclass 24, count 0 2006.229.06:12:45.82#ibcon#read 3, iclass 24, count 0 2006.229.06:12:45.82#ibcon#about to read 4, iclass 24, count 0 2006.229.06:12:45.82#ibcon#read 4, iclass 24, count 0 2006.229.06:12:45.82#ibcon#about to read 5, iclass 24, count 0 2006.229.06:12:45.82#ibcon#read 5, iclass 24, count 0 2006.229.06:12:45.82#ibcon#about to read 6, iclass 24, count 0 2006.229.06:12:45.82#ibcon#read 6, iclass 24, count 0 2006.229.06:12:45.82#ibcon#end of sib2, iclass 24, count 0 2006.229.06:12:45.82#ibcon#*after write, iclass 24, count 0 2006.229.06:12:45.82#ibcon#*before return 0, iclass 24, count 0 2006.229.06:12:45.82#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:45.82#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:12:45.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:12:45.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:12:45.82$vck44/vblo=5,709.99 2006.229.06:12:45.82#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.06:12:45.82#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.06:12:45.82#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:45.82#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:45.82#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:45.82#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:45.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:12:45.82#ibcon#first serial, iclass 26, count 0 2006.229.06:12:45.82#ibcon#enter sib2, iclass 26, count 0 2006.229.06:12:45.82#ibcon#flushed, iclass 26, count 0 2006.229.06:12:45.82#ibcon#about to write, iclass 26, count 0 2006.229.06:12:45.82#ibcon#wrote, iclass 26, count 0 2006.229.06:12:45.82#ibcon#about to read 3, iclass 26, count 0 2006.229.06:12:45.84#ibcon#read 3, iclass 26, count 0 2006.229.06:12:45.84#ibcon#about to read 4, iclass 26, count 0 2006.229.06:12:45.84#ibcon#read 4, iclass 26, count 0 2006.229.06:12:45.84#ibcon#about to read 5, iclass 26, count 0 2006.229.06:12:45.84#ibcon#read 5, iclass 26, count 0 2006.229.06:12:45.84#ibcon#about to read 6, iclass 26, count 0 2006.229.06:12:45.84#ibcon#read 6, iclass 26, count 0 2006.229.06:12:45.84#ibcon#end of sib2, iclass 26, count 0 2006.229.06:12:45.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:12:45.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:12:45.84#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:12:45.84#ibcon#*before write, iclass 26, count 0 2006.229.06:12:45.84#ibcon#enter sib2, iclass 26, count 0 2006.229.06:12:45.84#ibcon#flushed, iclass 26, count 0 2006.229.06:12:45.84#ibcon#about to write, iclass 26, count 0 2006.229.06:12:45.84#ibcon#wrote, iclass 26, count 0 2006.229.06:12:45.84#ibcon#about to read 3, iclass 26, count 0 2006.229.06:12:45.88#ibcon#read 3, iclass 26, count 0 2006.229.06:12:45.88#ibcon#about to read 4, iclass 26, count 0 2006.229.06:12:45.88#ibcon#read 4, iclass 26, count 0 2006.229.06:12:45.88#ibcon#about to read 5, iclass 26, count 0 2006.229.06:12:45.88#ibcon#read 5, iclass 26, count 0 2006.229.06:12:45.88#ibcon#about to read 6, iclass 26, count 0 2006.229.06:12:45.88#ibcon#read 6, iclass 26, count 0 2006.229.06:12:45.88#ibcon#end of sib2, iclass 26, count 0 2006.229.06:12:45.88#ibcon#*after write, iclass 26, count 0 2006.229.06:12:45.88#ibcon#*before return 0, iclass 26, count 0 2006.229.06:12:45.88#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:45.88#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:12:45.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:12:45.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:12:45.88$vck44/vb=5,4 2006.229.06:12:45.88#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.06:12:45.88#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.06:12:45.88#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:45.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:45.94#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:45.94#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:45.94#ibcon#enter wrdev, iclass 28, count 2 2006.229.06:12:45.94#ibcon#first serial, iclass 28, count 2 2006.229.06:12:45.94#ibcon#enter sib2, iclass 28, count 2 2006.229.06:12:45.94#ibcon#flushed, iclass 28, count 2 2006.229.06:12:45.94#ibcon#about to write, iclass 28, count 2 2006.229.06:12:45.94#ibcon#wrote, iclass 28, count 2 2006.229.06:12:45.94#ibcon#about to read 3, iclass 28, count 2 2006.229.06:12:45.96#ibcon#read 3, iclass 28, count 2 2006.229.06:12:45.96#ibcon#about to read 4, iclass 28, count 2 2006.229.06:12:45.96#ibcon#read 4, iclass 28, count 2 2006.229.06:12:45.96#ibcon#about to read 5, iclass 28, count 2 2006.229.06:12:45.96#ibcon#read 5, iclass 28, count 2 2006.229.06:12:45.96#ibcon#about to read 6, iclass 28, count 2 2006.229.06:12:45.96#ibcon#read 6, iclass 28, count 2 2006.229.06:12:45.96#ibcon#end of sib2, iclass 28, count 2 2006.229.06:12:45.96#ibcon#*mode == 0, iclass 28, count 2 2006.229.06:12:45.96#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.06:12:45.96#ibcon#[27=AT05-04\r\n] 2006.229.06:12:45.96#ibcon#*before write, iclass 28, count 2 2006.229.06:12:45.96#ibcon#enter sib2, iclass 28, count 2 2006.229.06:12:45.96#ibcon#flushed, iclass 28, count 2 2006.229.06:12:45.96#ibcon#about to write, iclass 28, count 2 2006.229.06:12:45.96#ibcon#wrote, iclass 28, count 2 2006.229.06:12:45.96#ibcon#about to read 3, iclass 28, count 2 2006.229.06:12:45.99#ibcon#read 3, iclass 28, count 2 2006.229.06:12:45.99#ibcon#about to read 4, iclass 28, count 2 2006.229.06:12:45.99#ibcon#read 4, iclass 28, count 2 2006.229.06:12:45.99#ibcon#about to read 5, iclass 28, count 2 2006.229.06:12:45.99#ibcon#read 5, iclass 28, count 2 2006.229.06:12:45.99#ibcon#about to read 6, iclass 28, count 2 2006.229.06:12:45.99#ibcon#read 6, iclass 28, count 2 2006.229.06:12:45.99#ibcon#end of sib2, iclass 28, count 2 2006.229.06:12:45.99#ibcon#*after write, iclass 28, count 2 2006.229.06:12:45.99#ibcon#*before return 0, iclass 28, count 2 2006.229.06:12:45.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:45.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:12:45.99#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.06:12:45.99#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:45.99#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:46.11#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:46.11#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:46.11#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:12:46.11#ibcon#first serial, iclass 28, count 0 2006.229.06:12:46.11#ibcon#enter sib2, iclass 28, count 0 2006.229.06:12:46.11#ibcon#flushed, iclass 28, count 0 2006.229.06:12:46.11#ibcon#about to write, iclass 28, count 0 2006.229.06:12:46.11#ibcon#wrote, iclass 28, count 0 2006.229.06:12:46.11#ibcon#about to read 3, iclass 28, count 0 2006.229.06:12:46.13#ibcon#read 3, iclass 28, count 0 2006.229.06:12:46.13#ibcon#about to read 4, iclass 28, count 0 2006.229.06:12:46.13#ibcon#read 4, iclass 28, count 0 2006.229.06:12:46.13#ibcon#about to read 5, iclass 28, count 0 2006.229.06:12:46.13#ibcon#read 5, iclass 28, count 0 2006.229.06:12:46.13#ibcon#about to read 6, iclass 28, count 0 2006.229.06:12:46.13#ibcon#read 6, iclass 28, count 0 2006.229.06:12:46.13#ibcon#end of sib2, iclass 28, count 0 2006.229.06:12:46.13#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:12:46.13#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:12:46.13#ibcon#[27=USB\r\n] 2006.229.06:12:46.13#ibcon#*before write, iclass 28, count 0 2006.229.06:12:46.13#ibcon#enter sib2, iclass 28, count 0 2006.229.06:12:46.13#ibcon#flushed, iclass 28, count 0 2006.229.06:12:46.13#ibcon#about to write, iclass 28, count 0 2006.229.06:12:46.13#ibcon#wrote, iclass 28, count 0 2006.229.06:12:46.13#ibcon#about to read 3, iclass 28, count 0 2006.229.06:12:46.16#ibcon#read 3, iclass 28, count 0 2006.229.06:12:46.16#ibcon#about to read 4, iclass 28, count 0 2006.229.06:12:46.16#ibcon#read 4, iclass 28, count 0 2006.229.06:12:46.16#ibcon#about to read 5, iclass 28, count 0 2006.229.06:12:46.16#ibcon#read 5, iclass 28, count 0 2006.229.06:12:46.16#ibcon#about to read 6, iclass 28, count 0 2006.229.06:12:46.16#ibcon#read 6, iclass 28, count 0 2006.229.06:12:46.16#ibcon#end of sib2, iclass 28, count 0 2006.229.06:12:46.16#ibcon#*after write, iclass 28, count 0 2006.229.06:12:46.16#ibcon#*before return 0, iclass 28, count 0 2006.229.06:12:46.16#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:46.16#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:12:46.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:12:46.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:12:46.16$vck44/vblo=6,719.99 2006.229.06:12:46.16#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.06:12:46.16#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.06:12:46.16#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:46.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:46.16#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:46.16#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:46.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:12:46.16#ibcon#first serial, iclass 30, count 0 2006.229.06:12:46.16#ibcon#enter sib2, iclass 30, count 0 2006.229.06:12:46.16#ibcon#flushed, iclass 30, count 0 2006.229.06:12:46.16#ibcon#about to write, iclass 30, count 0 2006.229.06:12:46.16#ibcon#wrote, iclass 30, count 0 2006.229.06:12:46.16#ibcon#about to read 3, iclass 30, count 0 2006.229.06:12:46.18#ibcon#read 3, iclass 30, count 0 2006.229.06:12:46.18#ibcon#about to read 4, iclass 30, count 0 2006.229.06:12:46.18#ibcon#read 4, iclass 30, count 0 2006.229.06:12:46.18#ibcon#about to read 5, iclass 30, count 0 2006.229.06:12:46.18#ibcon#read 5, iclass 30, count 0 2006.229.06:12:46.18#ibcon#about to read 6, iclass 30, count 0 2006.229.06:12:46.18#ibcon#read 6, iclass 30, count 0 2006.229.06:12:46.18#ibcon#end of sib2, iclass 30, count 0 2006.229.06:12:46.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:12:46.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:12:46.18#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:12:46.18#ibcon#*before write, iclass 30, count 0 2006.229.06:12:46.18#ibcon#enter sib2, iclass 30, count 0 2006.229.06:12:46.18#ibcon#flushed, iclass 30, count 0 2006.229.06:12:46.18#ibcon#about to write, iclass 30, count 0 2006.229.06:12:46.18#ibcon#wrote, iclass 30, count 0 2006.229.06:12:46.18#ibcon#about to read 3, iclass 30, count 0 2006.229.06:12:46.22#ibcon#read 3, iclass 30, count 0 2006.229.06:12:46.22#ibcon#about to read 4, iclass 30, count 0 2006.229.06:12:46.22#ibcon#read 4, iclass 30, count 0 2006.229.06:12:46.22#ibcon#about to read 5, iclass 30, count 0 2006.229.06:12:46.22#ibcon#read 5, iclass 30, count 0 2006.229.06:12:46.22#ibcon#about to read 6, iclass 30, count 0 2006.229.06:12:46.22#ibcon#read 6, iclass 30, count 0 2006.229.06:12:46.22#ibcon#end of sib2, iclass 30, count 0 2006.229.06:12:46.22#ibcon#*after write, iclass 30, count 0 2006.229.06:12:46.22#ibcon#*before return 0, iclass 30, count 0 2006.229.06:12:46.22#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:46.22#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:12:46.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:12:46.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:12:46.22$vck44/vb=6,4 2006.229.06:12:46.22#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.06:12:46.22#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.06:12:46.22#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:46.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:46.28#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:46.28#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:46.28#ibcon#enter wrdev, iclass 32, count 2 2006.229.06:12:46.28#ibcon#first serial, iclass 32, count 2 2006.229.06:12:46.28#ibcon#enter sib2, iclass 32, count 2 2006.229.06:12:46.28#ibcon#flushed, iclass 32, count 2 2006.229.06:12:46.28#ibcon#about to write, iclass 32, count 2 2006.229.06:12:46.28#ibcon#wrote, iclass 32, count 2 2006.229.06:12:46.28#ibcon#about to read 3, iclass 32, count 2 2006.229.06:12:46.30#ibcon#read 3, iclass 32, count 2 2006.229.06:12:46.30#ibcon#about to read 4, iclass 32, count 2 2006.229.06:12:46.30#ibcon#read 4, iclass 32, count 2 2006.229.06:12:46.30#ibcon#about to read 5, iclass 32, count 2 2006.229.06:12:46.30#ibcon#read 5, iclass 32, count 2 2006.229.06:12:46.30#ibcon#about to read 6, iclass 32, count 2 2006.229.06:12:46.30#ibcon#read 6, iclass 32, count 2 2006.229.06:12:46.30#ibcon#end of sib2, iclass 32, count 2 2006.229.06:12:46.30#ibcon#*mode == 0, iclass 32, count 2 2006.229.06:12:46.30#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.06:12:46.30#ibcon#[27=AT06-04\r\n] 2006.229.06:12:46.30#ibcon#*before write, iclass 32, count 2 2006.229.06:12:46.30#ibcon#enter sib2, iclass 32, count 2 2006.229.06:12:46.30#ibcon#flushed, iclass 32, count 2 2006.229.06:12:46.30#ibcon#about to write, iclass 32, count 2 2006.229.06:12:46.30#ibcon#wrote, iclass 32, count 2 2006.229.06:12:46.30#ibcon#about to read 3, iclass 32, count 2 2006.229.06:12:46.33#ibcon#read 3, iclass 32, count 2 2006.229.06:12:46.33#ibcon#about to read 4, iclass 32, count 2 2006.229.06:12:46.33#ibcon#read 4, iclass 32, count 2 2006.229.06:12:46.33#ibcon#about to read 5, iclass 32, count 2 2006.229.06:12:46.33#ibcon#read 5, iclass 32, count 2 2006.229.06:12:46.33#ibcon#about to read 6, iclass 32, count 2 2006.229.06:12:46.33#ibcon#read 6, iclass 32, count 2 2006.229.06:12:46.33#ibcon#end of sib2, iclass 32, count 2 2006.229.06:12:46.33#ibcon#*after write, iclass 32, count 2 2006.229.06:12:46.33#ibcon#*before return 0, iclass 32, count 2 2006.229.06:12:46.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:46.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:12:46.33#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.06:12:46.33#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:46.33#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:46.45#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:46.45#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:46.45#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:12:46.45#ibcon#first serial, iclass 32, count 0 2006.229.06:12:46.45#ibcon#enter sib2, iclass 32, count 0 2006.229.06:12:46.45#ibcon#flushed, iclass 32, count 0 2006.229.06:12:46.45#ibcon#about to write, iclass 32, count 0 2006.229.06:12:46.45#ibcon#wrote, iclass 32, count 0 2006.229.06:12:46.45#ibcon#about to read 3, iclass 32, count 0 2006.229.06:12:46.47#ibcon#read 3, iclass 32, count 0 2006.229.06:12:46.47#ibcon#about to read 4, iclass 32, count 0 2006.229.06:12:46.47#ibcon#read 4, iclass 32, count 0 2006.229.06:12:46.47#ibcon#about to read 5, iclass 32, count 0 2006.229.06:12:46.47#ibcon#read 5, iclass 32, count 0 2006.229.06:12:46.47#ibcon#about to read 6, iclass 32, count 0 2006.229.06:12:46.47#ibcon#read 6, iclass 32, count 0 2006.229.06:12:46.47#ibcon#end of sib2, iclass 32, count 0 2006.229.06:12:46.47#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:12:46.47#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:12:46.47#ibcon#[27=USB\r\n] 2006.229.06:12:46.47#ibcon#*before write, iclass 32, count 0 2006.229.06:12:46.47#ibcon#enter sib2, iclass 32, count 0 2006.229.06:12:46.47#ibcon#flushed, iclass 32, count 0 2006.229.06:12:46.47#ibcon#about to write, iclass 32, count 0 2006.229.06:12:46.47#ibcon#wrote, iclass 32, count 0 2006.229.06:12:46.47#ibcon#about to read 3, iclass 32, count 0 2006.229.06:12:46.50#ibcon#read 3, iclass 32, count 0 2006.229.06:12:46.50#ibcon#about to read 4, iclass 32, count 0 2006.229.06:12:46.50#ibcon#read 4, iclass 32, count 0 2006.229.06:12:46.50#ibcon#about to read 5, iclass 32, count 0 2006.229.06:12:46.50#ibcon#read 5, iclass 32, count 0 2006.229.06:12:46.50#ibcon#about to read 6, iclass 32, count 0 2006.229.06:12:46.50#ibcon#read 6, iclass 32, count 0 2006.229.06:12:46.50#ibcon#end of sib2, iclass 32, count 0 2006.229.06:12:46.50#ibcon#*after write, iclass 32, count 0 2006.229.06:12:46.50#ibcon#*before return 0, iclass 32, count 0 2006.229.06:12:46.50#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:46.50#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:12:46.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:12:46.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:12:46.50$vck44/vblo=7,734.99 2006.229.06:12:46.50#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.06:12:46.50#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.06:12:46.50#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:46.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:46.50#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:46.50#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:46.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:12:46.50#ibcon#first serial, iclass 34, count 0 2006.229.06:12:46.50#ibcon#enter sib2, iclass 34, count 0 2006.229.06:12:46.50#ibcon#flushed, iclass 34, count 0 2006.229.06:12:46.50#ibcon#about to write, iclass 34, count 0 2006.229.06:12:46.50#ibcon#wrote, iclass 34, count 0 2006.229.06:12:46.50#ibcon#about to read 3, iclass 34, count 0 2006.229.06:12:46.52#ibcon#read 3, iclass 34, count 0 2006.229.06:12:46.52#ibcon#about to read 4, iclass 34, count 0 2006.229.06:12:46.52#ibcon#read 4, iclass 34, count 0 2006.229.06:12:46.52#ibcon#about to read 5, iclass 34, count 0 2006.229.06:12:46.52#ibcon#read 5, iclass 34, count 0 2006.229.06:12:46.52#ibcon#about to read 6, iclass 34, count 0 2006.229.06:12:46.52#ibcon#read 6, iclass 34, count 0 2006.229.06:12:46.52#ibcon#end of sib2, iclass 34, count 0 2006.229.06:12:46.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:12:46.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:12:46.52#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:12:46.52#ibcon#*before write, iclass 34, count 0 2006.229.06:12:46.52#ibcon#enter sib2, iclass 34, count 0 2006.229.06:12:46.52#ibcon#flushed, iclass 34, count 0 2006.229.06:12:46.52#ibcon#about to write, iclass 34, count 0 2006.229.06:12:46.52#ibcon#wrote, iclass 34, count 0 2006.229.06:12:46.52#ibcon#about to read 3, iclass 34, count 0 2006.229.06:12:46.56#ibcon#read 3, iclass 34, count 0 2006.229.06:12:46.56#ibcon#about to read 4, iclass 34, count 0 2006.229.06:12:46.56#ibcon#read 4, iclass 34, count 0 2006.229.06:12:46.56#ibcon#about to read 5, iclass 34, count 0 2006.229.06:12:46.56#ibcon#read 5, iclass 34, count 0 2006.229.06:12:46.56#ibcon#about to read 6, iclass 34, count 0 2006.229.06:12:46.56#ibcon#read 6, iclass 34, count 0 2006.229.06:12:46.56#ibcon#end of sib2, iclass 34, count 0 2006.229.06:12:46.56#ibcon#*after write, iclass 34, count 0 2006.229.06:12:46.56#ibcon#*before return 0, iclass 34, count 0 2006.229.06:12:46.56#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:46.56#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:12:46.56#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:12:46.56#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:12:46.56$vck44/vb=7,4 2006.229.06:12:46.56#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.06:12:46.56#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.06:12:46.56#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:46.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:46.62#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:46.62#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:46.62#ibcon#enter wrdev, iclass 36, count 2 2006.229.06:12:46.62#ibcon#first serial, iclass 36, count 2 2006.229.06:12:46.62#ibcon#enter sib2, iclass 36, count 2 2006.229.06:12:46.62#ibcon#flushed, iclass 36, count 2 2006.229.06:12:46.62#ibcon#about to write, iclass 36, count 2 2006.229.06:12:46.62#ibcon#wrote, iclass 36, count 2 2006.229.06:12:46.62#ibcon#about to read 3, iclass 36, count 2 2006.229.06:12:46.64#ibcon#read 3, iclass 36, count 2 2006.229.06:12:46.64#ibcon#about to read 4, iclass 36, count 2 2006.229.06:12:46.64#ibcon#read 4, iclass 36, count 2 2006.229.06:12:46.64#ibcon#about to read 5, iclass 36, count 2 2006.229.06:12:46.64#ibcon#read 5, iclass 36, count 2 2006.229.06:12:46.64#ibcon#about to read 6, iclass 36, count 2 2006.229.06:12:46.64#ibcon#read 6, iclass 36, count 2 2006.229.06:12:46.64#ibcon#end of sib2, iclass 36, count 2 2006.229.06:12:46.64#ibcon#*mode == 0, iclass 36, count 2 2006.229.06:12:46.64#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.06:12:46.64#ibcon#[27=AT07-04\r\n] 2006.229.06:12:46.64#ibcon#*before write, iclass 36, count 2 2006.229.06:12:46.64#ibcon#enter sib2, iclass 36, count 2 2006.229.06:12:46.64#ibcon#flushed, iclass 36, count 2 2006.229.06:12:46.64#ibcon#about to write, iclass 36, count 2 2006.229.06:12:46.64#ibcon#wrote, iclass 36, count 2 2006.229.06:12:46.64#ibcon#about to read 3, iclass 36, count 2 2006.229.06:12:46.67#ibcon#read 3, iclass 36, count 2 2006.229.06:12:46.78#ibcon#about to read 4, iclass 36, count 2 2006.229.06:12:46.78#ibcon#read 4, iclass 36, count 2 2006.229.06:12:46.78#ibcon#about to read 5, iclass 36, count 2 2006.229.06:12:46.78#ibcon#read 5, iclass 36, count 2 2006.229.06:12:46.78#ibcon#about to read 6, iclass 36, count 2 2006.229.06:12:46.78#ibcon#read 6, iclass 36, count 2 2006.229.06:12:46.78#ibcon#end of sib2, iclass 36, count 2 2006.229.06:12:46.78#ibcon#*after write, iclass 36, count 2 2006.229.06:12:46.78#ibcon#*before return 0, iclass 36, count 2 2006.229.06:12:46.78#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:46.78#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:12:46.78#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.06:12:46.78#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:46.78#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:46.90#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:46.90#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:46.90#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:12:46.90#ibcon#first serial, iclass 36, count 0 2006.229.06:12:46.90#ibcon#enter sib2, iclass 36, count 0 2006.229.06:12:46.90#ibcon#flushed, iclass 36, count 0 2006.229.06:12:46.90#ibcon#about to write, iclass 36, count 0 2006.229.06:12:46.90#ibcon#wrote, iclass 36, count 0 2006.229.06:12:46.90#ibcon#about to read 3, iclass 36, count 0 2006.229.06:12:46.92#ibcon#read 3, iclass 36, count 0 2006.229.06:12:46.92#ibcon#about to read 4, iclass 36, count 0 2006.229.06:12:46.92#ibcon#read 4, iclass 36, count 0 2006.229.06:12:46.92#ibcon#about to read 5, iclass 36, count 0 2006.229.06:12:46.92#ibcon#read 5, iclass 36, count 0 2006.229.06:12:46.92#ibcon#about to read 6, iclass 36, count 0 2006.229.06:12:46.92#ibcon#read 6, iclass 36, count 0 2006.229.06:12:46.92#ibcon#end of sib2, iclass 36, count 0 2006.229.06:12:46.92#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:12:46.92#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:12:46.92#ibcon#[27=USB\r\n] 2006.229.06:12:46.92#ibcon#*before write, iclass 36, count 0 2006.229.06:12:46.92#ibcon#enter sib2, iclass 36, count 0 2006.229.06:12:46.92#ibcon#flushed, iclass 36, count 0 2006.229.06:12:46.92#ibcon#about to write, iclass 36, count 0 2006.229.06:12:46.92#ibcon#wrote, iclass 36, count 0 2006.229.06:12:46.92#ibcon#about to read 3, iclass 36, count 0 2006.229.06:12:46.95#ibcon#read 3, iclass 36, count 0 2006.229.06:12:46.95#ibcon#about to read 4, iclass 36, count 0 2006.229.06:12:46.95#ibcon#read 4, iclass 36, count 0 2006.229.06:12:46.95#ibcon#about to read 5, iclass 36, count 0 2006.229.06:12:46.95#ibcon#read 5, iclass 36, count 0 2006.229.06:12:46.95#ibcon#about to read 6, iclass 36, count 0 2006.229.06:12:46.95#ibcon#read 6, iclass 36, count 0 2006.229.06:12:46.95#ibcon#end of sib2, iclass 36, count 0 2006.229.06:12:46.95#ibcon#*after write, iclass 36, count 0 2006.229.06:12:46.95#ibcon#*before return 0, iclass 36, count 0 2006.229.06:12:46.95#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:46.95#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:12:46.95#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:12:46.95#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:12:46.95$vck44/vblo=8,744.99 2006.229.06:12:46.95#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.06:12:46.95#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.06:12:46.95#ibcon#ireg 17 cls_cnt 0 2006.229.06:12:46.95#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:46.95#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:46.95#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:46.95#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:12:46.95#ibcon#first serial, iclass 38, count 0 2006.229.06:12:46.95#ibcon#enter sib2, iclass 38, count 0 2006.229.06:12:46.95#ibcon#flushed, iclass 38, count 0 2006.229.06:12:46.95#ibcon#about to write, iclass 38, count 0 2006.229.06:12:46.95#ibcon#wrote, iclass 38, count 0 2006.229.06:12:46.95#ibcon#about to read 3, iclass 38, count 0 2006.229.06:12:46.97#ibcon#read 3, iclass 38, count 0 2006.229.06:12:46.97#ibcon#about to read 4, iclass 38, count 0 2006.229.06:12:46.97#ibcon#read 4, iclass 38, count 0 2006.229.06:12:46.97#ibcon#about to read 5, iclass 38, count 0 2006.229.06:12:46.97#ibcon#read 5, iclass 38, count 0 2006.229.06:12:46.97#ibcon#about to read 6, iclass 38, count 0 2006.229.06:12:46.97#ibcon#read 6, iclass 38, count 0 2006.229.06:12:46.97#ibcon#end of sib2, iclass 38, count 0 2006.229.06:12:46.97#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:12:46.97#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:12:46.97#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:12:46.97#ibcon#*before write, iclass 38, count 0 2006.229.06:12:46.97#ibcon#enter sib2, iclass 38, count 0 2006.229.06:12:46.97#ibcon#flushed, iclass 38, count 0 2006.229.06:12:46.97#ibcon#about to write, iclass 38, count 0 2006.229.06:12:46.97#ibcon#wrote, iclass 38, count 0 2006.229.06:12:46.97#ibcon#about to read 3, iclass 38, count 0 2006.229.06:12:47.01#ibcon#read 3, iclass 38, count 0 2006.229.06:12:47.01#ibcon#about to read 4, iclass 38, count 0 2006.229.06:12:47.01#ibcon#read 4, iclass 38, count 0 2006.229.06:12:47.01#ibcon#about to read 5, iclass 38, count 0 2006.229.06:12:47.01#ibcon#read 5, iclass 38, count 0 2006.229.06:12:47.01#ibcon#about to read 6, iclass 38, count 0 2006.229.06:12:47.01#ibcon#read 6, iclass 38, count 0 2006.229.06:12:47.01#ibcon#end of sib2, iclass 38, count 0 2006.229.06:12:47.01#ibcon#*after write, iclass 38, count 0 2006.229.06:12:47.01#ibcon#*before return 0, iclass 38, count 0 2006.229.06:12:47.01#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:47.01#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:12:47.01#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:12:47.01#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:12:47.01$vck44/vb=8,4 2006.229.06:12:47.01#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.06:12:47.01#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.06:12:47.01#ibcon#ireg 11 cls_cnt 2 2006.229.06:12:47.01#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:47.07#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:47.07#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:47.07#ibcon#enter wrdev, iclass 40, count 2 2006.229.06:12:47.07#ibcon#first serial, iclass 40, count 2 2006.229.06:12:47.07#ibcon#enter sib2, iclass 40, count 2 2006.229.06:12:47.07#ibcon#flushed, iclass 40, count 2 2006.229.06:12:47.07#ibcon#about to write, iclass 40, count 2 2006.229.06:12:47.07#ibcon#wrote, iclass 40, count 2 2006.229.06:12:47.07#ibcon#about to read 3, iclass 40, count 2 2006.229.06:12:47.09#ibcon#read 3, iclass 40, count 2 2006.229.06:12:47.09#ibcon#about to read 4, iclass 40, count 2 2006.229.06:12:47.09#ibcon#read 4, iclass 40, count 2 2006.229.06:12:47.09#ibcon#about to read 5, iclass 40, count 2 2006.229.06:12:47.09#ibcon#read 5, iclass 40, count 2 2006.229.06:12:47.09#ibcon#about to read 6, iclass 40, count 2 2006.229.06:12:47.09#ibcon#read 6, iclass 40, count 2 2006.229.06:12:47.09#ibcon#end of sib2, iclass 40, count 2 2006.229.06:12:47.09#ibcon#*mode == 0, iclass 40, count 2 2006.229.06:12:47.09#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.06:12:47.09#ibcon#[27=AT08-04\r\n] 2006.229.06:12:47.09#ibcon#*before write, iclass 40, count 2 2006.229.06:12:47.09#ibcon#enter sib2, iclass 40, count 2 2006.229.06:12:47.09#ibcon#flushed, iclass 40, count 2 2006.229.06:12:47.09#ibcon#about to write, iclass 40, count 2 2006.229.06:12:47.09#ibcon#wrote, iclass 40, count 2 2006.229.06:12:47.09#ibcon#about to read 3, iclass 40, count 2 2006.229.06:12:47.12#ibcon#read 3, iclass 40, count 2 2006.229.06:12:47.12#ibcon#about to read 4, iclass 40, count 2 2006.229.06:12:47.12#ibcon#read 4, iclass 40, count 2 2006.229.06:12:47.12#ibcon#about to read 5, iclass 40, count 2 2006.229.06:12:47.12#ibcon#read 5, iclass 40, count 2 2006.229.06:12:47.12#ibcon#about to read 6, iclass 40, count 2 2006.229.06:12:47.12#ibcon#read 6, iclass 40, count 2 2006.229.06:12:47.12#ibcon#end of sib2, iclass 40, count 2 2006.229.06:12:47.12#ibcon#*after write, iclass 40, count 2 2006.229.06:12:47.12#ibcon#*before return 0, iclass 40, count 2 2006.229.06:12:47.12#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:47.12#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:12:47.12#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.06:12:47.12#ibcon#ireg 7 cls_cnt 0 2006.229.06:12:47.12#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:47.24#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:47.24#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:47.24#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:12:47.24#ibcon#first serial, iclass 40, count 0 2006.229.06:12:47.24#ibcon#enter sib2, iclass 40, count 0 2006.229.06:12:47.24#ibcon#flushed, iclass 40, count 0 2006.229.06:12:47.24#ibcon#about to write, iclass 40, count 0 2006.229.06:12:47.24#ibcon#wrote, iclass 40, count 0 2006.229.06:12:47.24#ibcon#about to read 3, iclass 40, count 0 2006.229.06:12:47.26#ibcon#read 3, iclass 40, count 0 2006.229.06:12:47.26#ibcon#about to read 4, iclass 40, count 0 2006.229.06:12:47.26#ibcon#read 4, iclass 40, count 0 2006.229.06:12:47.26#ibcon#about to read 5, iclass 40, count 0 2006.229.06:12:47.26#ibcon#read 5, iclass 40, count 0 2006.229.06:12:47.26#ibcon#about to read 6, iclass 40, count 0 2006.229.06:12:47.26#ibcon#read 6, iclass 40, count 0 2006.229.06:12:47.26#ibcon#end of sib2, iclass 40, count 0 2006.229.06:12:47.26#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:12:47.26#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:12:47.26#ibcon#[27=USB\r\n] 2006.229.06:12:47.26#ibcon#*before write, iclass 40, count 0 2006.229.06:12:47.26#ibcon#enter sib2, iclass 40, count 0 2006.229.06:12:47.26#ibcon#flushed, iclass 40, count 0 2006.229.06:12:47.26#ibcon#about to write, iclass 40, count 0 2006.229.06:12:47.26#ibcon#wrote, iclass 40, count 0 2006.229.06:12:47.26#ibcon#about to read 3, iclass 40, count 0 2006.229.06:12:47.29#ibcon#read 3, iclass 40, count 0 2006.229.06:12:47.29#ibcon#about to read 4, iclass 40, count 0 2006.229.06:12:47.29#ibcon#read 4, iclass 40, count 0 2006.229.06:12:47.29#ibcon#about to read 5, iclass 40, count 0 2006.229.06:12:47.29#ibcon#read 5, iclass 40, count 0 2006.229.06:12:47.29#ibcon#about to read 6, iclass 40, count 0 2006.229.06:12:47.29#ibcon#read 6, iclass 40, count 0 2006.229.06:12:47.29#ibcon#end of sib2, iclass 40, count 0 2006.229.06:12:47.29#ibcon#*after write, iclass 40, count 0 2006.229.06:12:47.29#ibcon#*before return 0, iclass 40, count 0 2006.229.06:12:47.29#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:47.29#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:12:47.29#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:12:47.29#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:12:47.29$vck44/vabw=wide 2006.229.06:12:47.29#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.06:12:47.29#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.06:12:47.29#ibcon#ireg 8 cls_cnt 0 2006.229.06:12:47.29#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:47.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:47.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:47.29#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:12:47.29#ibcon#first serial, iclass 4, count 0 2006.229.06:12:47.29#ibcon#enter sib2, iclass 4, count 0 2006.229.06:12:47.29#ibcon#flushed, iclass 4, count 0 2006.229.06:12:47.29#ibcon#about to write, iclass 4, count 0 2006.229.06:12:47.29#ibcon#wrote, iclass 4, count 0 2006.229.06:12:47.29#ibcon#about to read 3, iclass 4, count 0 2006.229.06:12:47.31#ibcon#read 3, iclass 4, count 0 2006.229.06:12:47.31#ibcon#about to read 4, iclass 4, count 0 2006.229.06:12:47.31#ibcon#read 4, iclass 4, count 0 2006.229.06:12:47.31#ibcon#about to read 5, iclass 4, count 0 2006.229.06:12:47.31#ibcon#read 5, iclass 4, count 0 2006.229.06:12:47.31#ibcon#about to read 6, iclass 4, count 0 2006.229.06:12:47.31#ibcon#read 6, iclass 4, count 0 2006.229.06:12:47.31#ibcon#end of sib2, iclass 4, count 0 2006.229.06:12:47.31#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:12:47.31#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:12:47.31#ibcon#[25=BW32\r\n] 2006.229.06:12:47.31#ibcon#*before write, iclass 4, count 0 2006.229.06:12:47.31#ibcon#enter sib2, iclass 4, count 0 2006.229.06:12:47.31#ibcon#flushed, iclass 4, count 0 2006.229.06:12:47.31#ibcon#about to write, iclass 4, count 0 2006.229.06:12:47.31#ibcon#wrote, iclass 4, count 0 2006.229.06:12:47.31#ibcon#about to read 3, iclass 4, count 0 2006.229.06:12:47.34#ibcon#read 3, iclass 4, count 0 2006.229.06:12:47.34#ibcon#about to read 4, iclass 4, count 0 2006.229.06:12:47.34#ibcon#read 4, iclass 4, count 0 2006.229.06:12:47.34#ibcon#about to read 5, iclass 4, count 0 2006.229.06:12:47.34#ibcon#read 5, iclass 4, count 0 2006.229.06:12:47.34#ibcon#about to read 6, iclass 4, count 0 2006.229.06:12:47.34#ibcon#read 6, iclass 4, count 0 2006.229.06:12:47.34#ibcon#end of sib2, iclass 4, count 0 2006.229.06:12:47.34#ibcon#*after write, iclass 4, count 0 2006.229.06:12:47.34#ibcon#*before return 0, iclass 4, count 0 2006.229.06:12:47.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:47.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:12:47.34#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:12:47.34#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:12:47.34$vck44/vbbw=wide 2006.229.06:12:47.34#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:12:47.34#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:12:47.34#ibcon#ireg 8 cls_cnt 0 2006.229.06:12:47.34#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:12:47.41#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:12:47.41#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:12:47.41#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:12:47.41#ibcon#first serial, iclass 6, count 0 2006.229.06:12:47.41#ibcon#enter sib2, iclass 6, count 0 2006.229.06:12:47.41#ibcon#flushed, iclass 6, count 0 2006.229.06:12:47.41#ibcon#about to write, iclass 6, count 0 2006.229.06:12:47.41#ibcon#wrote, iclass 6, count 0 2006.229.06:12:47.41#ibcon#about to read 3, iclass 6, count 0 2006.229.06:12:47.43#ibcon#read 3, iclass 6, count 0 2006.229.06:12:47.43#ibcon#about to read 4, iclass 6, count 0 2006.229.06:12:47.43#ibcon#read 4, iclass 6, count 0 2006.229.06:12:47.43#ibcon#about to read 5, iclass 6, count 0 2006.229.06:12:47.43#ibcon#read 5, iclass 6, count 0 2006.229.06:12:47.43#ibcon#about to read 6, iclass 6, count 0 2006.229.06:12:47.43#ibcon#read 6, iclass 6, count 0 2006.229.06:12:47.43#ibcon#end of sib2, iclass 6, count 0 2006.229.06:12:47.43#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:12:47.43#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:12:47.43#ibcon#[27=BW32\r\n] 2006.229.06:12:47.43#ibcon#*before write, iclass 6, count 0 2006.229.06:12:47.43#ibcon#enter sib2, iclass 6, count 0 2006.229.06:12:47.43#ibcon#flushed, iclass 6, count 0 2006.229.06:12:47.43#ibcon#about to write, iclass 6, count 0 2006.229.06:12:47.43#ibcon#wrote, iclass 6, count 0 2006.229.06:12:47.43#ibcon#about to read 3, iclass 6, count 0 2006.229.06:12:47.46#ibcon#read 3, iclass 6, count 0 2006.229.06:12:47.46#ibcon#about to read 4, iclass 6, count 0 2006.229.06:12:47.46#ibcon#read 4, iclass 6, count 0 2006.229.06:12:47.46#ibcon#about to read 5, iclass 6, count 0 2006.229.06:12:47.46#ibcon#read 5, iclass 6, count 0 2006.229.06:12:47.46#ibcon#about to read 6, iclass 6, count 0 2006.229.06:12:47.46#ibcon#read 6, iclass 6, count 0 2006.229.06:12:47.46#ibcon#end of sib2, iclass 6, count 0 2006.229.06:12:47.46#ibcon#*after write, iclass 6, count 0 2006.229.06:12:47.46#ibcon#*before return 0, iclass 6, count 0 2006.229.06:12:47.46#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:12:47.46#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:12:47.46#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:12:47.46#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:12:47.46$setupk4/ifdk4 2006.229.06:12:47.46$ifdk4/lo= 2006.229.06:12:47.46$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:12:47.46$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:12:47.46$ifdk4/patch= 2006.229.06:12:47.46$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:12:47.46$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:12:47.46$setupk4/!*+20s 2006.229.06:12:51.82#abcon#<5=/05 2.7 4.6 30.54 91 999.3\r\n> 2006.229.06:12:51.84#abcon#{5=INTERFACE CLEAR} 2006.229.06:12:51.90#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:12:58.14#trakl#Source acquired 2006.229.06:12:58.14#flagr#flagr/antenna,acquired 2006.229.06:13:01.28$setupk4/"tpicd 2006.229.06:13:01.28$setupk4/echo=off 2006.229.06:13:01.28$setupk4/xlog=off 2006.229.06:13:01.28:!2006.229.06:13:45 2006.229.06:13:45.00:preob 2006.229.06:13:45.14/onsource/TRACKING 2006.229.06:13:45.14:!2006.229.06:13:55 2006.229.06:13:55.00:"tape 2006.229.06:13:55.00:"st=record 2006.229.06:13:55.00:data_valid=on 2006.229.06:13:55.00:midob 2006.229.06:13:55.14/onsource/TRACKING 2006.229.06:13:55.14/wx/30.54,999.3,90 2006.229.06:13:55.31/cable/+6.3972E-03 2006.229.06:13:56.40/va/01,08,usb,yes,29,31 2006.229.06:13:56.40/va/02,07,usb,yes,31,32 2006.229.06:13:56.40/va/03,06,usb,yes,39,41 2006.229.06:13:56.40/va/04,07,usb,yes,32,34 2006.229.06:13:56.40/va/05,04,usb,yes,29,29 2006.229.06:13:56.40/va/06,04,usb,yes,32,32 2006.229.06:13:56.40/va/07,05,usb,yes,28,29 2006.229.06:13:56.40/va/08,06,usb,yes,20,26 2006.229.06:13:56.63/valo/01,524.99,yes,locked 2006.229.06:13:56.63/valo/02,534.99,yes,locked 2006.229.06:13:56.63/valo/03,564.99,yes,locked 2006.229.06:13:56.63/valo/04,624.99,yes,locked 2006.229.06:13:56.63/valo/05,734.99,yes,locked 2006.229.06:13:56.63/valo/06,814.99,yes,locked 2006.229.06:13:56.63/valo/07,864.99,yes,locked 2006.229.06:13:56.63/valo/08,884.99,yes,locked 2006.229.06:13:57.72/vb/01,04,usb,yes,31,28 2006.229.06:13:57.72/vb/02,04,usb,yes,33,33 2006.229.06:13:57.72/vb/03,04,usb,yes,30,33 2006.229.06:13:57.72/vb/04,04,usb,yes,34,33 2006.229.06:13:57.72/vb/05,04,usb,yes,27,29 2006.229.06:13:57.72/vb/06,04,usb,yes,31,27 2006.229.06:13:57.72/vb/07,04,usb,yes,31,31 2006.229.06:13:57.72/vb/08,04,usb,yes,29,32 2006.229.06:13:57.96/vblo/01,629.99,yes,locked 2006.229.06:13:57.96/vblo/02,634.99,yes,locked 2006.229.06:13:57.96/vblo/03,649.99,yes,locked 2006.229.06:13:57.96/vblo/04,679.99,yes,locked 2006.229.06:13:57.96/vblo/05,709.99,yes,locked 2006.229.06:13:57.96/vblo/06,719.99,yes,locked 2006.229.06:13:57.96/vblo/07,734.99,yes,locked 2006.229.06:13:57.96/vblo/08,744.99,yes,locked 2006.229.06:13:58.11/vabw/8 2006.229.06:13:58.26/vbbw/8 2006.229.06:13:58.35/xfe/off,on,12.2 2006.229.06:13:58.72/ifatt/23,28,28,28 2006.229.06:13:59.08/fmout-gps/S +4.47E-07 2006.229.06:13:59.12:!2006.229.06:17:35 2006.229.06:17:35.01:data_valid=off 2006.229.06:17:35.02:"et 2006.229.06:17:35.02:!+3s 2006.229.06:17:38.05:"tape 2006.229.06:17:38.05:postob 2006.229.06:17:38.26/cable/+6.3984E-03 2006.229.06:17:38.26/wx/30.51,999.3,91 2006.229.06:17:38.32/fmout-gps/S +4.51E-07 2006.229.06:17:38.32:scan_name=229-0621,jd0608,50 2006.229.06:17:38.33:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.06:17:40.14#flagr#flagr/antenna,new-source 2006.229.06:17:40.15:checkk5 2006.229.06:17:40.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:17:40.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:17:41.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:17:41.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:17:42.14/chk_obsdata//k5ts1/T2290613??a.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.06:17:42.53/chk_obsdata//k5ts2/T2290613??b.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.06:17:42.94/chk_obsdata//k5ts3/T2290613??c.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.06:17:43.33/chk_obsdata//k5ts4/T2290613??d.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.06:17:44.06/k5log//k5ts1_log_newline 2006.229.06:17:44.76/k5log//k5ts2_log_newline 2006.229.06:17:45.48/k5log//k5ts3_log_newline 2006.229.06:17:46.18/k5log//k5ts4_log_newline 2006.229.06:17:46.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:17:46.21:setupk4=1 2006.229.06:17:46.21$setupk4/echo=on 2006.229.06:17:46.21$setupk4/pcalon 2006.229.06:17:46.21$pcalon/"no phase cal control is implemented here 2006.229.06:17:46.21$setupk4/"tpicd=stop 2006.229.06:17:46.21$setupk4/"rec=synch_on 2006.229.06:17:46.21$setupk4/"rec_mode=128 2006.229.06:17:46.21$setupk4/!* 2006.229.06:17:46.21$setupk4/recpk4 2006.229.06:17:46.21$recpk4/recpatch= 2006.229.06:17:46.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:17:46.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:17:46.22$setupk4/vck44 2006.229.06:17:46.22$vck44/valo=1,524.99 2006.229.06:17:46.22#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.06:17:46.22#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.06:17:46.22#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:46.22#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:46.22#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:46.22#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:46.22#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:17:46.22#ibcon#first serial, iclass 21, count 0 2006.229.06:17:46.22#ibcon#enter sib2, iclass 21, count 0 2006.229.06:17:46.22#ibcon#flushed, iclass 21, count 0 2006.229.06:17:46.22#ibcon#about to write, iclass 21, count 0 2006.229.06:17:46.22#ibcon#wrote, iclass 21, count 0 2006.229.06:17:46.22#ibcon#about to read 3, iclass 21, count 0 2006.229.06:17:46.23#ibcon#read 3, iclass 21, count 0 2006.229.06:17:46.23#ibcon#about to read 4, iclass 21, count 0 2006.229.06:17:46.23#ibcon#read 4, iclass 21, count 0 2006.229.06:17:46.23#ibcon#about to read 5, iclass 21, count 0 2006.229.06:17:46.23#ibcon#read 5, iclass 21, count 0 2006.229.06:17:46.23#ibcon#about to read 6, iclass 21, count 0 2006.229.06:17:46.23#ibcon#read 6, iclass 21, count 0 2006.229.06:17:46.23#ibcon#end of sib2, iclass 21, count 0 2006.229.06:17:46.23#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:17:46.23#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:17:46.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:17:46.23#ibcon#*before write, iclass 21, count 0 2006.229.06:17:46.23#ibcon#enter sib2, iclass 21, count 0 2006.229.06:17:46.23#ibcon#flushed, iclass 21, count 0 2006.229.06:17:46.23#ibcon#about to write, iclass 21, count 0 2006.229.06:17:46.23#ibcon#wrote, iclass 21, count 0 2006.229.06:17:46.23#ibcon#about to read 3, iclass 21, count 0 2006.229.06:17:46.28#ibcon#read 3, iclass 21, count 0 2006.229.06:17:46.28#ibcon#about to read 4, iclass 21, count 0 2006.229.06:17:46.28#ibcon#read 4, iclass 21, count 0 2006.229.06:17:46.28#ibcon#about to read 5, iclass 21, count 0 2006.229.06:17:46.28#ibcon#read 5, iclass 21, count 0 2006.229.06:17:46.28#ibcon#about to read 6, iclass 21, count 0 2006.229.06:17:46.28#ibcon#read 6, iclass 21, count 0 2006.229.06:17:46.28#ibcon#end of sib2, iclass 21, count 0 2006.229.06:17:46.28#ibcon#*after write, iclass 21, count 0 2006.229.06:17:46.28#ibcon#*before return 0, iclass 21, count 0 2006.229.06:17:46.28#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:46.28#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:46.28#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:17:46.28#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:17:46.28$vck44/va=1,8 2006.229.06:17:46.28#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.06:17:46.28#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.06:17:46.28#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:46.28#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:46.28#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:46.28#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:46.28#ibcon#enter wrdev, iclass 23, count 2 2006.229.06:17:46.28#ibcon#first serial, iclass 23, count 2 2006.229.06:17:46.28#ibcon#enter sib2, iclass 23, count 2 2006.229.06:17:46.28#ibcon#flushed, iclass 23, count 2 2006.229.06:17:46.28#ibcon#about to write, iclass 23, count 2 2006.229.06:17:46.28#ibcon#wrote, iclass 23, count 2 2006.229.06:17:46.28#ibcon#about to read 3, iclass 23, count 2 2006.229.06:17:46.30#ibcon#read 3, iclass 23, count 2 2006.229.06:17:46.30#ibcon#about to read 4, iclass 23, count 2 2006.229.06:17:46.30#ibcon#read 4, iclass 23, count 2 2006.229.06:17:46.30#ibcon#about to read 5, iclass 23, count 2 2006.229.06:17:46.30#ibcon#read 5, iclass 23, count 2 2006.229.06:17:46.30#ibcon#about to read 6, iclass 23, count 2 2006.229.06:17:46.30#ibcon#read 6, iclass 23, count 2 2006.229.06:17:46.30#ibcon#end of sib2, iclass 23, count 2 2006.229.06:17:46.30#ibcon#*mode == 0, iclass 23, count 2 2006.229.06:17:46.30#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.06:17:46.30#ibcon#[25=AT01-08\r\n] 2006.229.06:17:46.30#ibcon#*before write, iclass 23, count 2 2006.229.06:17:46.30#ibcon#enter sib2, iclass 23, count 2 2006.229.06:17:46.30#ibcon#flushed, iclass 23, count 2 2006.229.06:17:46.30#ibcon#about to write, iclass 23, count 2 2006.229.06:17:46.30#ibcon#wrote, iclass 23, count 2 2006.229.06:17:46.30#ibcon#about to read 3, iclass 23, count 2 2006.229.06:17:46.33#ibcon#read 3, iclass 23, count 2 2006.229.06:17:46.33#ibcon#about to read 4, iclass 23, count 2 2006.229.06:17:46.33#ibcon#read 4, iclass 23, count 2 2006.229.06:17:46.33#ibcon#about to read 5, iclass 23, count 2 2006.229.06:17:46.33#ibcon#read 5, iclass 23, count 2 2006.229.06:17:46.33#ibcon#about to read 6, iclass 23, count 2 2006.229.06:17:46.33#ibcon#read 6, iclass 23, count 2 2006.229.06:17:46.33#ibcon#end of sib2, iclass 23, count 2 2006.229.06:17:46.33#ibcon#*after write, iclass 23, count 2 2006.229.06:17:46.33#ibcon#*before return 0, iclass 23, count 2 2006.229.06:17:46.33#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:46.33#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:46.33#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.06:17:46.33#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:46.33#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:46.45#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:46.45#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:46.45#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:17:46.45#ibcon#first serial, iclass 23, count 0 2006.229.06:17:46.45#ibcon#enter sib2, iclass 23, count 0 2006.229.06:17:46.45#ibcon#flushed, iclass 23, count 0 2006.229.06:17:46.45#ibcon#about to write, iclass 23, count 0 2006.229.06:17:46.45#ibcon#wrote, iclass 23, count 0 2006.229.06:17:46.45#ibcon#about to read 3, iclass 23, count 0 2006.229.06:17:46.47#ibcon#read 3, iclass 23, count 0 2006.229.06:17:46.47#ibcon#about to read 4, iclass 23, count 0 2006.229.06:17:46.47#ibcon#read 4, iclass 23, count 0 2006.229.06:17:46.47#ibcon#about to read 5, iclass 23, count 0 2006.229.06:17:46.47#ibcon#read 5, iclass 23, count 0 2006.229.06:17:46.47#ibcon#about to read 6, iclass 23, count 0 2006.229.06:17:46.47#ibcon#read 6, iclass 23, count 0 2006.229.06:17:46.47#ibcon#end of sib2, iclass 23, count 0 2006.229.06:17:46.47#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:17:46.47#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:17:46.47#ibcon#[25=USB\r\n] 2006.229.06:17:46.47#ibcon#*before write, iclass 23, count 0 2006.229.06:17:46.47#ibcon#enter sib2, iclass 23, count 0 2006.229.06:17:46.47#ibcon#flushed, iclass 23, count 0 2006.229.06:17:46.47#ibcon#about to write, iclass 23, count 0 2006.229.06:17:46.47#ibcon#wrote, iclass 23, count 0 2006.229.06:17:46.47#ibcon#about to read 3, iclass 23, count 0 2006.229.06:17:46.50#ibcon#read 3, iclass 23, count 0 2006.229.06:17:46.50#ibcon#about to read 4, iclass 23, count 0 2006.229.06:17:46.50#ibcon#read 4, iclass 23, count 0 2006.229.06:17:46.50#ibcon#about to read 5, iclass 23, count 0 2006.229.06:17:46.50#ibcon#read 5, iclass 23, count 0 2006.229.06:17:46.50#ibcon#about to read 6, iclass 23, count 0 2006.229.06:17:46.50#ibcon#read 6, iclass 23, count 0 2006.229.06:17:46.50#ibcon#end of sib2, iclass 23, count 0 2006.229.06:17:46.50#ibcon#*after write, iclass 23, count 0 2006.229.06:17:46.50#ibcon#*before return 0, iclass 23, count 0 2006.229.06:17:46.50#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:46.50#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:46.50#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:17:46.50#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:17:46.50$vck44/valo=2,534.99 2006.229.06:17:46.50#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.06:17:46.50#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.06:17:46.50#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:46.50#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:46.50#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:46.50#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:46.50#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:17:46.50#ibcon#first serial, iclass 25, count 0 2006.229.06:17:46.50#ibcon#enter sib2, iclass 25, count 0 2006.229.06:17:46.50#ibcon#flushed, iclass 25, count 0 2006.229.06:17:46.50#ibcon#about to write, iclass 25, count 0 2006.229.06:17:46.50#ibcon#wrote, iclass 25, count 0 2006.229.06:17:46.50#ibcon#about to read 3, iclass 25, count 0 2006.229.06:17:46.52#ibcon#read 3, iclass 25, count 0 2006.229.06:17:46.52#ibcon#about to read 4, iclass 25, count 0 2006.229.06:17:46.52#ibcon#read 4, iclass 25, count 0 2006.229.06:17:46.52#ibcon#about to read 5, iclass 25, count 0 2006.229.06:17:46.52#ibcon#read 5, iclass 25, count 0 2006.229.06:17:46.52#ibcon#about to read 6, iclass 25, count 0 2006.229.06:17:46.52#ibcon#read 6, iclass 25, count 0 2006.229.06:17:46.52#ibcon#end of sib2, iclass 25, count 0 2006.229.06:17:46.52#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:17:46.52#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:17:46.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:17:46.52#ibcon#*before write, iclass 25, count 0 2006.229.06:17:46.52#ibcon#enter sib2, iclass 25, count 0 2006.229.06:17:46.52#ibcon#flushed, iclass 25, count 0 2006.229.06:17:46.52#ibcon#about to write, iclass 25, count 0 2006.229.06:17:46.52#ibcon#wrote, iclass 25, count 0 2006.229.06:17:46.52#ibcon#about to read 3, iclass 25, count 0 2006.229.06:17:46.56#ibcon#read 3, iclass 25, count 0 2006.229.06:17:46.56#ibcon#about to read 4, iclass 25, count 0 2006.229.06:17:46.56#ibcon#read 4, iclass 25, count 0 2006.229.06:17:46.56#ibcon#about to read 5, iclass 25, count 0 2006.229.06:17:46.56#ibcon#read 5, iclass 25, count 0 2006.229.06:17:46.56#ibcon#about to read 6, iclass 25, count 0 2006.229.06:17:46.56#ibcon#read 6, iclass 25, count 0 2006.229.06:17:46.56#ibcon#end of sib2, iclass 25, count 0 2006.229.06:17:46.56#ibcon#*after write, iclass 25, count 0 2006.229.06:17:46.56#ibcon#*before return 0, iclass 25, count 0 2006.229.06:17:46.56#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:46.56#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:46.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:17:46.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:17:46.56$vck44/va=2,7 2006.229.06:17:46.56#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.06:17:46.56#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.06:17:46.56#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:46.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:46.62#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:46.62#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:46.62#ibcon#enter wrdev, iclass 27, count 2 2006.229.06:17:46.62#ibcon#first serial, iclass 27, count 2 2006.229.06:17:46.62#ibcon#enter sib2, iclass 27, count 2 2006.229.06:17:46.62#ibcon#flushed, iclass 27, count 2 2006.229.06:17:46.62#ibcon#about to write, iclass 27, count 2 2006.229.06:17:46.62#ibcon#wrote, iclass 27, count 2 2006.229.06:17:46.62#ibcon#about to read 3, iclass 27, count 2 2006.229.06:17:46.64#ibcon#read 3, iclass 27, count 2 2006.229.06:17:46.64#ibcon#about to read 4, iclass 27, count 2 2006.229.06:17:46.64#ibcon#read 4, iclass 27, count 2 2006.229.06:17:46.64#ibcon#about to read 5, iclass 27, count 2 2006.229.06:17:46.64#ibcon#read 5, iclass 27, count 2 2006.229.06:17:46.64#ibcon#about to read 6, iclass 27, count 2 2006.229.06:17:46.64#ibcon#read 6, iclass 27, count 2 2006.229.06:17:46.64#ibcon#end of sib2, iclass 27, count 2 2006.229.06:17:46.64#ibcon#*mode == 0, iclass 27, count 2 2006.229.06:17:46.64#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.06:17:46.64#ibcon#[25=AT02-07\r\n] 2006.229.06:17:46.64#ibcon#*before write, iclass 27, count 2 2006.229.06:17:46.64#ibcon#enter sib2, iclass 27, count 2 2006.229.06:17:46.64#ibcon#flushed, iclass 27, count 2 2006.229.06:17:46.64#ibcon#about to write, iclass 27, count 2 2006.229.06:17:46.64#ibcon#wrote, iclass 27, count 2 2006.229.06:17:46.64#ibcon#about to read 3, iclass 27, count 2 2006.229.06:17:46.67#ibcon#read 3, iclass 27, count 2 2006.229.06:17:46.67#ibcon#about to read 4, iclass 27, count 2 2006.229.06:17:46.67#ibcon#read 4, iclass 27, count 2 2006.229.06:17:46.67#ibcon#about to read 5, iclass 27, count 2 2006.229.06:17:46.67#ibcon#read 5, iclass 27, count 2 2006.229.06:17:46.67#ibcon#about to read 6, iclass 27, count 2 2006.229.06:17:46.67#ibcon#read 6, iclass 27, count 2 2006.229.06:17:46.67#ibcon#end of sib2, iclass 27, count 2 2006.229.06:17:46.67#ibcon#*after write, iclass 27, count 2 2006.229.06:17:46.67#ibcon#*before return 0, iclass 27, count 2 2006.229.06:17:46.67#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:46.67#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:46.67#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.06:17:46.67#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:46.67#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:46.79#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:46.79#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:46.79#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:17:46.79#ibcon#first serial, iclass 27, count 0 2006.229.06:17:46.79#ibcon#enter sib2, iclass 27, count 0 2006.229.06:17:46.79#ibcon#flushed, iclass 27, count 0 2006.229.06:17:46.79#ibcon#about to write, iclass 27, count 0 2006.229.06:17:46.79#ibcon#wrote, iclass 27, count 0 2006.229.06:17:46.79#ibcon#about to read 3, iclass 27, count 0 2006.229.06:17:46.81#ibcon#read 3, iclass 27, count 0 2006.229.06:17:46.81#ibcon#about to read 4, iclass 27, count 0 2006.229.06:17:46.81#ibcon#read 4, iclass 27, count 0 2006.229.06:17:46.81#ibcon#about to read 5, iclass 27, count 0 2006.229.06:17:46.81#ibcon#read 5, iclass 27, count 0 2006.229.06:17:46.81#ibcon#about to read 6, iclass 27, count 0 2006.229.06:17:46.81#ibcon#read 6, iclass 27, count 0 2006.229.06:17:46.81#ibcon#end of sib2, iclass 27, count 0 2006.229.06:17:46.81#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:17:46.81#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:17:46.81#ibcon#[25=USB\r\n] 2006.229.06:17:46.81#ibcon#*before write, iclass 27, count 0 2006.229.06:17:46.81#ibcon#enter sib2, iclass 27, count 0 2006.229.06:17:46.81#ibcon#flushed, iclass 27, count 0 2006.229.06:17:46.81#ibcon#about to write, iclass 27, count 0 2006.229.06:17:46.81#ibcon#wrote, iclass 27, count 0 2006.229.06:17:46.81#ibcon#about to read 3, iclass 27, count 0 2006.229.06:17:46.84#ibcon#read 3, iclass 27, count 0 2006.229.06:17:46.84#ibcon#about to read 4, iclass 27, count 0 2006.229.06:17:46.84#ibcon#read 4, iclass 27, count 0 2006.229.06:17:46.84#ibcon#about to read 5, iclass 27, count 0 2006.229.06:17:46.84#ibcon#read 5, iclass 27, count 0 2006.229.06:17:46.84#ibcon#about to read 6, iclass 27, count 0 2006.229.06:17:46.84#ibcon#read 6, iclass 27, count 0 2006.229.06:17:46.84#ibcon#end of sib2, iclass 27, count 0 2006.229.06:17:46.84#ibcon#*after write, iclass 27, count 0 2006.229.06:17:46.84#ibcon#*before return 0, iclass 27, count 0 2006.229.06:17:46.84#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:46.84#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:46.84#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:17:46.84#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:17:46.84$vck44/valo=3,564.99 2006.229.06:17:46.84#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.06:17:46.84#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.06:17:46.84#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:46.84#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:46.84#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:46.84#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:46.84#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:17:46.84#ibcon#first serial, iclass 29, count 0 2006.229.06:17:46.84#ibcon#enter sib2, iclass 29, count 0 2006.229.06:17:46.84#ibcon#flushed, iclass 29, count 0 2006.229.06:17:46.84#ibcon#about to write, iclass 29, count 0 2006.229.06:17:46.84#ibcon#wrote, iclass 29, count 0 2006.229.06:17:46.84#ibcon#about to read 3, iclass 29, count 0 2006.229.06:17:46.86#ibcon#read 3, iclass 29, count 0 2006.229.06:17:46.86#ibcon#about to read 4, iclass 29, count 0 2006.229.06:17:46.86#ibcon#read 4, iclass 29, count 0 2006.229.06:17:46.86#ibcon#about to read 5, iclass 29, count 0 2006.229.06:17:46.86#ibcon#read 5, iclass 29, count 0 2006.229.06:17:46.86#ibcon#about to read 6, iclass 29, count 0 2006.229.06:17:46.86#ibcon#read 6, iclass 29, count 0 2006.229.06:17:46.86#ibcon#end of sib2, iclass 29, count 0 2006.229.06:17:46.86#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:17:46.86#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:17:46.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:17:46.86#ibcon#*before write, iclass 29, count 0 2006.229.06:17:46.86#ibcon#enter sib2, iclass 29, count 0 2006.229.06:17:46.86#ibcon#flushed, iclass 29, count 0 2006.229.06:17:46.86#ibcon#about to write, iclass 29, count 0 2006.229.06:17:46.86#ibcon#wrote, iclass 29, count 0 2006.229.06:17:46.86#ibcon#about to read 3, iclass 29, count 0 2006.229.06:17:46.90#ibcon#read 3, iclass 29, count 0 2006.229.06:17:46.90#ibcon#about to read 4, iclass 29, count 0 2006.229.06:17:46.90#ibcon#read 4, iclass 29, count 0 2006.229.06:17:46.90#ibcon#about to read 5, iclass 29, count 0 2006.229.06:17:46.90#ibcon#read 5, iclass 29, count 0 2006.229.06:17:46.90#ibcon#about to read 6, iclass 29, count 0 2006.229.06:17:46.90#ibcon#read 6, iclass 29, count 0 2006.229.06:17:46.90#ibcon#end of sib2, iclass 29, count 0 2006.229.06:17:46.90#ibcon#*after write, iclass 29, count 0 2006.229.06:17:46.90#ibcon#*before return 0, iclass 29, count 0 2006.229.06:17:46.90#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:46.90#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:46.90#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:17:46.90#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:17:46.90$vck44/va=3,6 2006.229.06:17:46.90#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.06:17:46.90#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.06:17:46.90#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:46.90#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:46.96#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:46.96#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:46.96#ibcon#enter wrdev, iclass 31, count 2 2006.229.06:17:46.96#ibcon#first serial, iclass 31, count 2 2006.229.06:17:46.96#ibcon#enter sib2, iclass 31, count 2 2006.229.06:17:46.96#ibcon#flushed, iclass 31, count 2 2006.229.06:17:46.96#ibcon#about to write, iclass 31, count 2 2006.229.06:17:46.96#ibcon#wrote, iclass 31, count 2 2006.229.06:17:46.96#ibcon#about to read 3, iclass 31, count 2 2006.229.06:17:46.98#ibcon#read 3, iclass 31, count 2 2006.229.06:17:46.98#ibcon#about to read 4, iclass 31, count 2 2006.229.06:17:46.98#ibcon#read 4, iclass 31, count 2 2006.229.06:17:46.98#ibcon#about to read 5, iclass 31, count 2 2006.229.06:17:46.98#ibcon#read 5, iclass 31, count 2 2006.229.06:17:46.98#ibcon#about to read 6, iclass 31, count 2 2006.229.06:17:46.98#ibcon#read 6, iclass 31, count 2 2006.229.06:17:46.98#ibcon#end of sib2, iclass 31, count 2 2006.229.06:17:46.98#ibcon#*mode == 0, iclass 31, count 2 2006.229.06:17:46.98#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.06:17:46.98#ibcon#[25=AT03-06\r\n] 2006.229.06:17:46.98#ibcon#*before write, iclass 31, count 2 2006.229.06:17:46.98#ibcon#enter sib2, iclass 31, count 2 2006.229.06:17:46.98#ibcon#flushed, iclass 31, count 2 2006.229.06:17:46.98#ibcon#about to write, iclass 31, count 2 2006.229.06:17:46.98#ibcon#wrote, iclass 31, count 2 2006.229.06:17:46.98#ibcon#about to read 3, iclass 31, count 2 2006.229.06:17:46.98#abcon#<5=/05 2.6 4.7 30.51 91 999.3\r\n> 2006.229.06:17:47.00#abcon#{5=INTERFACE CLEAR} 2006.229.06:17:47.01#ibcon#read 3, iclass 31, count 2 2006.229.06:17:47.01#ibcon#about to read 4, iclass 31, count 2 2006.229.06:17:47.01#ibcon#read 4, iclass 31, count 2 2006.229.06:17:47.01#ibcon#about to read 5, iclass 31, count 2 2006.229.06:17:47.01#ibcon#read 5, iclass 31, count 2 2006.229.06:17:47.01#ibcon#about to read 6, iclass 31, count 2 2006.229.06:17:47.01#ibcon#read 6, iclass 31, count 2 2006.229.06:17:47.01#ibcon#end of sib2, iclass 31, count 2 2006.229.06:17:47.01#ibcon#*after write, iclass 31, count 2 2006.229.06:17:47.01#ibcon#*before return 0, iclass 31, count 2 2006.229.06:17:47.01#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:47.01#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:47.01#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.06:17:47.01#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:47.01#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:47.06#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:17:47.13#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:47.13#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:47.13#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:17:47.13#ibcon#first serial, iclass 31, count 0 2006.229.06:17:47.13#ibcon#enter sib2, iclass 31, count 0 2006.229.06:17:47.13#ibcon#flushed, iclass 31, count 0 2006.229.06:17:47.13#ibcon#about to write, iclass 31, count 0 2006.229.06:17:47.13#ibcon#wrote, iclass 31, count 0 2006.229.06:17:47.13#ibcon#about to read 3, iclass 31, count 0 2006.229.06:17:47.15#ibcon#read 3, iclass 31, count 0 2006.229.06:17:47.15#ibcon#about to read 4, iclass 31, count 0 2006.229.06:17:47.15#ibcon#read 4, iclass 31, count 0 2006.229.06:17:47.15#ibcon#about to read 5, iclass 31, count 0 2006.229.06:17:47.15#ibcon#read 5, iclass 31, count 0 2006.229.06:17:47.15#ibcon#about to read 6, iclass 31, count 0 2006.229.06:17:47.15#ibcon#read 6, iclass 31, count 0 2006.229.06:17:47.15#ibcon#end of sib2, iclass 31, count 0 2006.229.06:17:47.15#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:17:47.15#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:17:47.15#ibcon#[25=USB\r\n] 2006.229.06:17:47.15#ibcon#*before write, iclass 31, count 0 2006.229.06:17:47.15#ibcon#enter sib2, iclass 31, count 0 2006.229.06:17:47.15#ibcon#flushed, iclass 31, count 0 2006.229.06:17:47.15#ibcon#about to write, iclass 31, count 0 2006.229.06:17:47.15#ibcon#wrote, iclass 31, count 0 2006.229.06:17:47.15#ibcon#about to read 3, iclass 31, count 0 2006.229.06:17:47.18#ibcon#read 3, iclass 31, count 0 2006.229.06:17:47.18#ibcon#about to read 4, iclass 31, count 0 2006.229.06:17:47.18#ibcon#read 4, iclass 31, count 0 2006.229.06:17:47.18#ibcon#about to read 5, iclass 31, count 0 2006.229.06:17:47.18#ibcon#read 5, iclass 31, count 0 2006.229.06:17:47.18#ibcon#about to read 6, iclass 31, count 0 2006.229.06:17:47.18#ibcon#read 6, iclass 31, count 0 2006.229.06:17:47.18#ibcon#end of sib2, iclass 31, count 0 2006.229.06:17:47.18#ibcon#*after write, iclass 31, count 0 2006.229.06:17:47.18#ibcon#*before return 0, iclass 31, count 0 2006.229.06:17:47.18#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:47.18#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:47.18#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:17:47.18#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:17:47.18$vck44/valo=4,624.99 2006.229.06:17:47.18#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.06:17:47.18#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.06:17:47.18#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:47.18#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:47.18#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:47.18#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:47.18#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:17:47.18#ibcon#first serial, iclass 37, count 0 2006.229.06:17:47.18#ibcon#enter sib2, iclass 37, count 0 2006.229.06:17:47.18#ibcon#flushed, iclass 37, count 0 2006.229.06:17:47.18#ibcon#about to write, iclass 37, count 0 2006.229.06:17:47.18#ibcon#wrote, iclass 37, count 0 2006.229.06:17:47.18#ibcon#about to read 3, iclass 37, count 0 2006.229.06:17:47.20#ibcon#read 3, iclass 37, count 0 2006.229.06:17:47.20#ibcon#about to read 4, iclass 37, count 0 2006.229.06:17:47.20#ibcon#read 4, iclass 37, count 0 2006.229.06:17:47.20#ibcon#about to read 5, iclass 37, count 0 2006.229.06:17:47.20#ibcon#read 5, iclass 37, count 0 2006.229.06:17:47.20#ibcon#about to read 6, iclass 37, count 0 2006.229.06:17:47.20#ibcon#read 6, iclass 37, count 0 2006.229.06:17:47.20#ibcon#end of sib2, iclass 37, count 0 2006.229.06:17:47.20#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:17:47.20#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:17:47.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:17:47.20#ibcon#*before write, iclass 37, count 0 2006.229.06:17:47.20#ibcon#enter sib2, iclass 37, count 0 2006.229.06:17:47.20#ibcon#flushed, iclass 37, count 0 2006.229.06:17:47.20#ibcon#about to write, iclass 37, count 0 2006.229.06:17:47.20#ibcon#wrote, iclass 37, count 0 2006.229.06:17:47.20#ibcon#about to read 3, iclass 37, count 0 2006.229.06:17:47.24#ibcon#read 3, iclass 37, count 0 2006.229.06:17:47.24#ibcon#about to read 4, iclass 37, count 0 2006.229.06:17:47.24#ibcon#read 4, iclass 37, count 0 2006.229.06:17:47.24#ibcon#about to read 5, iclass 37, count 0 2006.229.06:17:47.24#ibcon#read 5, iclass 37, count 0 2006.229.06:17:47.24#ibcon#about to read 6, iclass 37, count 0 2006.229.06:17:47.24#ibcon#read 6, iclass 37, count 0 2006.229.06:17:47.24#ibcon#end of sib2, iclass 37, count 0 2006.229.06:17:47.24#ibcon#*after write, iclass 37, count 0 2006.229.06:17:47.24#ibcon#*before return 0, iclass 37, count 0 2006.229.06:17:47.24#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:47.24#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:47.24#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:17:47.24#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:17:47.24$vck44/va=4,7 2006.229.06:17:47.24#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.06:17:47.24#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.06:17:47.24#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:47.24#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:47.30#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:47.30#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:47.30#ibcon#enter wrdev, iclass 39, count 2 2006.229.06:17:47.30#ibcon#first serial, iclass 39, count 2 2006.229.06:17:47.30#ibcon#enter sib2, iclass 39, count 2 2006.229.06:17:47.30#ibcon#flushed, iclass 39, count 2 2006.229.06:17:47.30#ibcon#about to write, iclass 39, count 2 2006.229.06:17:47.30#ibcon#wrote, iclass 39, count 2 2006.229.06:17:47.30#ibcon#about to read 3, iclass 39, count 2 2006.229.06:17:47.32#ibcon#read 3, iclass 39, count 2 2006.229.06:17:47.32#ibcon#about to read 4, iclass 39, count 2 2006.229.06:17:47.32#ibcon#read 4, iclass 39, count 2 2006.229.06:17:47.32#ibcon#about to read 5, iclass 39, count 2 2006.229.06:17:47.32#ibcon#read 5, iclass 39, count 2 2006.229.06:17:47.32#ibcon#about to read 6, iclass 39, count 2 2006.229.06:17:47.32#ibcon#read 6, iclass 39, count 2 2006.229.06:17:47.32#ibcon#end of sib2, iclass 39, count 2 2006.229.06:17:47.32#ibcon#*mode == 0, iclass 39, count 2 2006.229.06:17:47.32#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.06:17:47.32#ibcon#[25=AT04-07\r\n] 2006.229.06:17:47.32#ibcon#*before write, iclass 39, count 2 2006.229.06:17:47.32#ibcon#enter sib2, iclass 39, count 2 2006.229.06:17:47.32#ibcon#flushed, iclass 39, count 2 2006.229.06:17:47.32#ibcon#about to write, iclass 39, count 2 2006.229.06:17:47.32#ibcon#wrote, iclass 39, count 2 2006.229.06:17:47.32#ibcon#about to read 3, iclass 39, count 2 2006.229.06:17:47.35#ibcon#read 3, iclass 39, count 2 2006.229.06:17:47.35#ibcon#about to read 4, iclass 39, count 2 2006.229.06:17:47.35#ibcon#read 4, iclass 39, count 2 2006.229.06:17:47.35#ibcon#about to read 5, iclass 39, count 2 2006.229.06:17:47.35#ibcon#read 5, iclass 39, count 2 2006.229.06:17:47.35#ibcon#about to read 6, iclass 39, count 2 2006.229.06:17:47.35#ibcon#read 6, iclass 39, count 2 2006.229.06:17:47.35#ibcon#end of sib2, iclass 39, count 2 2006.229.06:17:47.35#ibcon#*after write, iclass 39, count 2 2006.229.06:17:47.35#ibcon#*before return 0, iclass 39, count 2 2006.229.06:17:47.35#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:47.35#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:47.35#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.06:17:47.35#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:47.35#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:47.47#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:47.47#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:47.47#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:17:47.47#ibcon#first serial, iclass 39, count 0 2006.229.06:17:47.47#ibcon#enter sib2, iclass 39, count 0 2006.229.06:17:47.47#ibcon#flushed, iclass 39, count 0 2006.229.06:17:47.47#ibcon#about to write, iclass 39, count 0 2006.229.06:17:47.47#ibcon#wrote, iclass 39, count 0 2006.229.06:17:47.47#ibcon#about to read 3, iclass 39, count 0 2006.229.06:17:47.49#ibcon#read 3, iclass 39, count 0 2006.229.06:17:47.49#ibcon#about to read 4, iclass 39, count 0 2006.229.06:17:47.49#ibcon#read 4, iclass 39, count 0 2006.229.06:17:47.49#ibcon#about to read 5, iclass 39, count 0 2006.229.06:17:47.49#ibcon#read 5, iclass 39, count 0 2006.229.06:17:47.49#ibcon#about to read 6, iclass 39, count 0 2006.229.06:17:47.49#ibcon#read 6, iclass 39, count 0 2006.229.06:17:47.49#ibcon#end of sib2, iclass 39, count 0 2006.229.06:17:47.49#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:17:47.49#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:17:47.49#ibcon#[25=USB\r\n] 2006.229.06:17:47.49#ibcon#*before write, iclass 39, count 0 2006.229.06:17:47.49#ibcon#enter sib2, iclass 39, count 0 2006.229.06:17:47.49#ibcon#flushed, iclass 39, count 0 2006.229.06:17:47.49#ibcon#about to write, iclass 39, count 0 2006.229.06:17:47.49#ibcon#wrote, iclass 39, count 0 2006.229.06:17:47.49#ibcon#about to read 3, iclass 39, count 0 2006.229.06:17:47.52#ibcon#read 3, iclass 39, count 0 2006.229.06:17:47.52#ibcon#about to read 4, iclass 39, count 0 2006.229.06:17:47.52#ibcon#read 4, iclass 39, count 0 2006.229.06:17:47.52#ibcon#about to read 5, iclass 39, count 0 2006.229.06:17:47.52#ibcon#read 5, iclass 39, count 0 2006.229.06:17:47.52#ibcon#about to read 6, iclass 39, count 0 2006.229.06:17:47.52#ibcon#read 6, iclass 39, count 0 2006.229.06:17:47.52#ibcon#end of sib2, iclass 39, count 0 2006.229.06:17:47.52#ibcon#*after write, iclass 39, count 0 2006.229.06:17:47.52#ibcon#*before return 0, iclass 39, count 0 2006.229.06:17:47.52#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:47.52#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:47.52#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:17:47.52#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:17:47.52$vck44/valo=5,734.99 2006.229.06:17:47.52#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.06:17:47.52#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.06:17:47.52#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:47.52#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:47.52#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:47.52#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:47.52#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:17:47.52#ibcon#first serial, iclass 3, count 0 2006.229.06:17:47.52#ibcon#enter sib2, iclass 3, count 0 2006.229.06:17:47.52#ibcon#flushed, iclass 3, count 0 2006.229.06:17:47.52#ibcon#about to write, iclass 3, count 0 2006.229.06:17:47.52#ibcon#wrote, iclass 3, count 0 2006.229.06:17:47.52#ibcon#about to read 3, iclass 3, count 0 2006.229.06:17:47.54#ibcon#read 3, iclass 3, count 0 2006.229.06:17:47.54#ibcon#about to read 4, iclass 3, count 0 2006.229.06:17:47.54#ibcon#read 4, iclass 3, count 0 2006.229.06:17:47.54#ibcon#about to read 5, iclass 3, count 0 2006.229.06:17:47.54#ibcon#read 5, iclass 3, count 0 2006.229.06:17:47.54#ibcon#about to read 6, iclass 3, count 0 2006.229.06:17:47.54#ibcon#read 6, iclass 3, count 0 2006.229.06:17:47.54#ibcon#end of sib2, iclass 3, count 0 2006.229.06:17:47.54#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:17:47.54#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:17:47.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:17:47.54#ibcon#*before write, iclass 3, count 0 2006.229.06:17:47.54#ibcon#enter sib2, iclass 3, count 0 2006.229.06:17:47.54#ibcon#flushed, iclass 3, count 0 2006.229.06:17:47.54#ibcon#about to write, iclass 3, count 0 2006.229.06:17:47.54#ibcon#wrote, iclass 3, count 0 2006.229.06:17:47.54#ibcon#about to read 3, iclass 3, count 0 2006.229.06:17:47.58#ibcon#read 3, iclass 3, count 0 2006.229.06:17:47.58#ibcon#about to read 4, iclass 3, count 0 2006.229.06:17:47.58#ibcon#read 4, iclass 3, count 0 2006.229.06:17:47.58#ibcon#about to read 5, iclass 3, count 0 2006.229.06:17:47.58#ibcon#read 5, iclass 3, count 0 2006.229.06:17:47.58#ibcon#about to read 6, iclass 3, count 0 2006.229.06:17:47.58#ibcon#read 6, iclass 3, count 0 2006.229.06:17:47.58#ibcon#end of sib2, iclass 3, count 0 2006.229.06:17:47.58#ibcon#*after write, iclass 3, count 0 2006.229.06:17:47.58#ibcon#*before return 0, iclass 3, count 0 2006.229.06:17:47.58#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:47.58#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:47.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:17:47.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:17:47.58$vck44/va=5,4 2006.229.06:17:47.58#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.06:17:47.58#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.06:17:47.58#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:47.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:47.64#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:47.64#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:47.64#ibcon#enter wrdev, iclass 5, count 2 2006.229.06:17:47.64#ibcon#first serial, iclass 5, count 2 2006.229.06:17:47.64#ibcon#enter sib2, iclass 5, count 2 2006.229.06:17:47.64#ibcon#flushed, iclass 5, count 2 2006.229.06:17:47.64#ibcon#about to write, iclass 5, count 2 2006.229.06:17:47.64#ibcon#wrote, iclass 5, count 2 2006.229.06:17:47.64#ibcon#about to read 3, iclass 5, count 2 2006.229.06:17:47.66#ibcon#read 3, iclass 5, count 2 2006.229.06:17:47.66#ibcon#about to read 4, iclass 5, count 2 2006.229.06:17:47.66#ibcon#read 4, iclass 5, count 2 2006.229.06:17:47.66#ibcon#about to read 5, iclass 5, count 2 2006.229.06:17:47.66#ibcon#read 5, iclass 5, count 2 2006.229.06:17:47.66#ibcon#about to read 6, iclass 5, count 2 2006.229.06:17:47.66#ibcon#read 6, iclass 5, count 2 2006.229.06:17:47.66#ibcon#end of sib2, iclass 5, count 2 2006.229.06:17:47.66#ibcon#*mode == 0, iclass 5, count 2 2006.229.06:17:47.66#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.06:17:47.66#ibcon#[25=AT05-04\r\n] 2006.229.06:17:47.66#ibcon#*before write, iclass 5, count 2 2006.229.06:17:47.66#ibcon#enter sib2, iclass 5, count 2 2006.229.06:17:47.66#ibcon#flushed, iclass 5, count 2 2006.229.06:17:47.66#ibcon#about to write, iclass 5, count 2 2006.229.06:17:47.66#ibcon#wrote, iclass 5, count 2 2006.229.06:17:47.66#ibcon#about to read 3, iclass 5, count 2 2006.229.06:17:47.69#ibcon#read 3, iclass 5, count 2 2006.229.06:17:47.69#ibcon#about to read 4, iclass 5, count 2 2006.229.06:17:47.69#ibcon#read 4, iclass 5, count 2 2006.229.06:17:47.69#ibcon#about to read 5, iclass 5, count 2 2006.229.06:17:47.69#ibcon#read 5, iclass 5, count 2 2006.229.06:17:47.69#ibcon#about to read 6, iclass 5, count 2 2006.229.06:17:47.69#ibcon#read 6, iclass 5, count 2 2006.229.06:17:47.69#ibcon#end of sib2, iclass 5, count 2 2006.229.06:17:47.69#ibcon#*after write, iclass 5, count 2 2006.229.06:17:47.69#ibcon#*before return 0, iclass 5, count 2 2006.229.06:17:47.69#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:47.69#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:47.69#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.06:17:47.69#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:47.69#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:47.81#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:47.81#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:47.81#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:17:47.81#ibcon#first serial, iclass 5, count 0 2006.229.06:17:47.81#ibcon#enter sib2, iclass 5, count 0 2006.229.06:17:47.81#ibcon#flushed, iclass 5, count 0 2006.229.06:17:47.81#ibcon#about to write, iclass 5, count 0 2006.229.06:17:47.81#ibcon#wrote, iclass 5, count 0 2006.229.06:17:47.81#ibcon#about to read 3, iclass 5, count 0 2006.229.06:17:47.83#ibcon#read 3, iclass 5, count 0 2006.229.06:17:47.83#ibcon#about to read 4, iclass 5, count 0 2006.229.06:17:47.83#ibcon#read 4, iclass 5, count 0 2006.229.06:17:47.83#ibcon#about to read 5, iclass 5, count 0 2006.229.06:17:47.83#ibcon#read 5, iclass 5, count 0 2006.229.06:17:47.83#ibcon#about to read 6, iclass 5, count 0 2006.229.06:17:47.83#ibcon#read 6, iclass 5, count 0 2006.229.06:17:47.83#ibcon#end of sib2, iclass 5, count 0 2006.229.06:17:47.83#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:17:47.83#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:17:47.83#ibcon#[25=USB\r\n] 2006.229.06:17:47.83#ibcon#*before write, iclass 5, count 0 2006.229.06:17:47.83#ibcon#enter sib2, iclass 5, count 0 2006.229.06:17:47.83#ibcon#flushed, iclass 5, count 0 2006.229.06:17:47.83#ibcon#about to write, iclass 5, count 0 2006.229.06:17:47.83#ibcon#wrote, iclass 5, count 0 2006.229.06:17:47.83#ibcon#about to read 3, iclass 5, count 0 2006.229.06:17:47.86#ibcon#read 3, iclass 5, count 0 2006.229.06:17:47.86#ibcon#about to read 4, iclass 5, count 0 2006.229.06:17:47.86#ibcon#read 4, iclass 5, count 0 2006.229.06:17:47.86#ibcon#about to read 5, iclass 5, count 0 2006.229.06:17:47.86#ibcon#read 5, iclass 5, count 0 2006.229.06:17:47.86#ibcon#about to read 6, iclass 5, count 0 2006.229.06:17:47.86#ibcon#read 6, iclass 5, count 0 2006.229.06:17:47.86#ibcon#end of sib2, iclass 5, count 0 2006.229.06:17:47.86#ibcon#*after write, iclass 5, count 0 2006.229.06:17:47.86#ibcon#*before return 0, iclass 5, count 0 2006.229.06:17:47.86#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:47.86#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:47.86#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:17:47.86#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:17:47.86$vck44/valo=6,814.99 2006.229.06:17:47.86#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.06:17:47.86#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.06:17:47.86#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:47.86#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:47.86#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:47.86#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:47.86#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:17:47.86#ibcon#first serial, iclass 7, count 0 2006.229.06:17:47.86#ibcon#enter sib2, iclass 7, count 0 2006.229.06:17:47.86#ibcon#flushed, iclass 7, count 0 2006.229.06:17:47.86#ibcon#about to write, iclass 7, count 0 2006.229.06:17:47.86#ibcon#wrote, iclass 7, count 0 2006.229.06:17:47.86#ibcon#about to read 3, iclass 7, count 0 2006.229.06:17:47.88#ibcon#read 3, iclass 7, count 0 2006.229.06:17:47.88#ibcon#about to read 4, iclass 7, count 0 2006.229.06:17:47.88#ibcon#read 4, iclass 7, count 0 2006.229.06:17:47.88#ibcon#about to read 5, iclass 7, count 0 2006.229.06:17:47.88#ibcon#read 5, iclass 7, count 0 2006.229.06:17:47.88#ibcon#about to read 6, iclass 7, count 0 2006.229.06:17:47.88#ibcon#read 6, iclass 7, count 0 2006.229.06:17:47.88#ibcon#end of sib2, iclass 7, count 0 2006.229.06:17:47.88#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:17:47.88#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:17:47.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:17:47.88#ibcon#*before write, iclass 7, count 0 2006.229.06:17:47.88#ibcon#enter sib2, iclass 7, count 0 2006.229.06:17:47.88#ibcon#flushed, iclass 7, count 0 2006.229.06:17:47.88#ibcon#about to write, iclass 7, count 0 2006.229.06:17:47.88#ibcon#wrote, iclass 7, count 0 2006.229.06:17:47.88#ibcon#about to read 3, iclass 7, count 0 2006.229.06:17:47.92#ibcon#read 3, iclass 7, count 0 2006.229.06:17:47.92#ibcon#about to read 4, iclass 7, count 0 2006.229.06:17:47.92#ibcon#read 4, iclass 7, count 0 2006.229.06:17:47.92#ibcon#about to read 5, iclass 7, count 0 2006.229.06:17:47.92#ibcon#read 5, iclass 7, count 0 2006.229.06:17:47.92#ibcon#about to read 6, iclass 7, count 0 2006.229.06:17:47.92#ibcon#read 6, iclass 7, count 0 2006.229.06:17:47.92#ibcon#end of sib2, iclass 7, count 0 2006.229.06:17:47.92#ibcon#*after write, iclass 7, count 0 2006.229.06:17:47.92#ibcon#*before return 0, iclass 7, count 0 2006.229.06:17:47.92#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:47.92#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:47.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:17:47.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:17:47.92$vck44/va=6,4 2006.229.06:17:47.92#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.06:17:47.92#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.06:17:47.92#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:47.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:47.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:47.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:47.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.06:17:47.98#ibcon#first serial, iclass 11, count 2 2006.229.06:17:47.98#ibcon#enter sib2, iclass 11, count 2 2006.229.06:17:47.98#ibcon#flushed, iclass 11, count 2 2006.229.06:17:47.98#ibcon#about to write, iclass 11, count 2 2006.229.06:17:47.98#ibcon#wrote, iclass 11, count 2 2006.229.06:17:47.98#ibcon#about to read 3, iclass 11, count 2 2006.229.06:17:48.00#ibcon#read 3, iclass 11, count 2 2006.229.06:17:48.00#ibcon#about to read 4, iclass 11, count 2 2006.229.06:17:48.00#ibcon#read 4, iclass 11, count 2 2006.229.06:17:48.00#ibcon#about to read 5, iclass 11, count 2 2006.229.06:17:48.00#ibcon#read 5, iclass 11, count 2 2006.229.06:17:48.00#ibcon#about to read 6, iclass 11, count 2 2006.229.06:17:48.00#ibcon#read 6, iclass 11, count 2 2006.229.06:17:48.00#ibcon#end of sib2, iclass 11, count 2 2006.229.06:17:48.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.06:17:48.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.06:17:48.00#ibcon#[25=AT06-04\r\n] 2006.229.06:17:48.00#ibcon#*before write, iclass 11, count 2 2006.229.06:17:48.00#ibcon#enter sib2, iclass 11, count 2 2006.229.06:17:48.00#ibcon#flushed, iclass 11, count 2 2006.229.06:17:48.00#ibcon#about to write, iclass 11, count 2 2006.229.06:17:48.00#ibcon#wrote, iclass 11, count 2 2006.229.06:17:48.00#ibcon#about to read 3, iclass 11, count 2 2006.229.06:17:48.03#ibcon#read 3, iclass 11, count 2 2006.229.06:17:48.03#ibcon#about to read 4, iclass 11, count 2 2006.229.06:17:48.03#ibcon#read 4, iclass 11, count 2 2006.229.06:17:48.03#ibcon#about to read 5, iclass 11, count 2 2006.229.06:17:48.03#ibcon#read 5, iclass 11, count 2 2006.229.06:17:48.03#ibcon#about to read 6, iclass 11, count 2 2006.229.06:17:48.03#ibcon#read 6, iclass 11, count 2 2006.229.06:17:48.03#ibcon#end of sib2, iclass 11, count 2 2006.229.06:17:48.03#ibcon#*after write, iclass 11, count 2 2006.229.06:17:48.03#ibcon#*before return 0, iclass 11, count 2 2006.229.06:17:48.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:48.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:48.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.06:17:48.03#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:48.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:48.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:48.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:48.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:17:48.15#ibcon#first serial, iclass 11, count 0 2006.229.06:17:48.15#ibcon#enter sib2, iclass 11, count 0 2006.229.06:17:48.15#ibcon#flushed, iclass 11, count 0 2006.229.06:17:48.15#ibcon#about to write, iclass 11, count 0 2006.229.06:17:48.15#ibcon#wrote, iclass 11, count 0 2006.229.06:17:48.15#ibcon#about to read 3, iclass 11, count 0 2006.229.06:17:48.17#ibcon#read 3, iclass 11, count 0 2006.229.06:17:48.17#ibcon#about to read 4, iclass 11, count 0 2006.229.06:17:48.17#ibcon#read 4, iclass 11, count 0 2006.229.06:17:48.17#ibcon#about to read 5, iclass 11, count 0 2006.229.06:17:48.17#ibcon#read 5, iclass 11, count 0 2006.229.06:17:48.17#ibcon#about to read 6, iclass 11, count 0 2006.229.06:17:48.17#ibcon#read 6, iclass 11, count 0 2006.229.06:17:48.17#ibcon#end of sib2, iclass 11, count 0 2006.229.06:17:48.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:17:48.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:17:48.17#ibcon#[25=USB\r\n] 2006.229.06:17:48.17#ibcon#*before write, iclass 11, count 0 2006.229.06:17:48.17#ibcon#enter sib2, iclass 11, count 0 2006.229.06:17:48.17#ibcon#flushed, iclass 11, count 0 2006.229.06:17:48.17#ibcon#about to write, iclass 11, count 0 2006.229.06:17:48.17#ibcon#wrote, iclass 11, count 0 2006.229.06:17:48.17#ibcon#about to read 3, iclass 11, count 0 2006.229.06:17:48.20#ibcon#read 3, iclass 11, count 0 2006.229.06:17:48.20#ibcon#about to read 4, iclass 11, count 0 2006.229.06:17:48.20#ibcon#read 4, iclass 11, count 0 2006.229.06:17:48.20#ibcon#about to read 5, iclass 11, count 0 2006.229.06:17:48.20#ibcon#read 5, iclass 11, count 0 2006.229.06:17:48.20#ibcon#about to read 6, iclass 11, count 0 2006.229.06:17:48.20#ibcon#read 6, iclass 11, count 0 2006.229.06:17:48.20#ibcon#end of sib2, iclass 11, count 0 2006.229.06:17:48.20#ibcon#*after write, iclass 11, count 0 2006.229.06:17:48.20#ibcon#*before return 0, iclass 11, count 0 2006.229.06:17:48.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:48.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:48.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:17:48.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:17:48.20$vck44/valo=7,864.99 2006.229.06:17:48.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.06:17:48.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.06:17:48.20#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:48.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:48.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:48.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:48.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:17:48.20#ibcon#first serial, iclass 13, count 0 2006.229.06:17:48.20#ibcon#enter sib2, iclass 13, count 0 2006.229.06:17:48.20#ibcon#flushed, iclass 13, count 0 2006.229.06:17:48.20#ibcon#about to write, iclass 13, count 0 2006.229.06:17:48.20#ibcon#wrote, iclass 13, count 0 2006.229.06:17:48.20#ibcon#about to read 3, iclass 13, count 0 2006.229.06:17:48.22#ibcon#read 3, iclass 13, count 0 2006.229.06:17:48.22#ibcon#about to read 4, iclass 13, count 0 2006.229.06:17:48.22#ibcon#read 4, iclass 13, count 0 2006.229.06:17:48.22#ibcon#about to read 5, iclass 13, count 0 2006.229.06:17:48.22#ibcon#read 5, iclass 13, count 0 2006.229.06:17:48.22#ibcon#about to read 6, iclass 13, count 0 2006.229.06:17:48.22#ibcon#read 6, iclass 13, count 0 2006.229.06:17:48.22#ibcon#end of sib2, iclass 13, count 0 2006.229.06:17:48.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:17:48.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:17:48.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:17:48.22#ibcon#*before write, iclass 13, count 0 2006.229.06:17:48.22#ibcon#enter sib2, iclass 13, count 0 2006.229.06:17:48.22#ibcon#flushed, iclass 13, count 0 2006.229.06:17:48.22#ibcon#about to write, iclass 13, count 0 2006.229.06:17:48.22#ibcon#wrote, iclass 13, count 0 2006.229.06:17:48.22#ibcon#about to read 3, iclass 13, count 0 2006.229.06:17:48.26#ibcon#read 3, iclass 13, count 0 2006.229.06:17:48.26#ibcon#about to read 4, iclass 13, count 0 2006.229.06:17:48.26#ibcon#read 4, iclass 13, count 0 2006.229.06:17:48.26#ibcon#about to read 5, iclass 13, count 0 2006.229.06:17:48.26#ibcon#read 5, iclass 13, count 0 2006.229.06:17:48.26#ibcon#about to read 6, iclass 13, count 0 2006.229.06:17:48.26#ibcon#read 6, iclass 13, count 0 2006.229.06:17:48.26#ibcon#end of sib2, iclass 13, count 0 2006.229.06:17:48.26#ibcon#*after write, iclass 13, count 0 2006.229.06:17:48.26#ibcon#*before return 0, iclass 13, count 0 2006.229.06:17:48.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:48.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:48.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:17:48.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:17:48.26$vck44/va=7,5 2006.229.06:17:48.26#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.06:17:48.26#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.06:17:48.26#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:48.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:48.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:48.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:48.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.06:17:48.32#ibcon#first serial, iclass 15, count 2 2006.229.06:17:48.32#ibcon#enter sib2, iclass 15, count 2 2006.229.06:17:48.32#ibcon#flushed, iclass 15, count 2 2006.229.06:17:48.32#ibcon#about to write, iclass 15, count 2 2006.229.06:17:48.32#ibcon#wrote, iclass 15, count 2 2006.229.06:17:48.32#ibcon#about to read 3, iclass 15, count 2 2006.229.06:17:48.34#ibcon#read 3, iclass 15, count 2 2006.229.06:17:48.34#ibcon#about to read 4, iclass 15, count 2 2006.229.06:17:48.34#ibcon#read 4, iclass 15, count 2 2006.229.06:17:48.34#ibcon#about to read 5, iclass 15, count 2 2006.229.06:17:48.34#ibcon#read 5, iclass 15, count 2 2006.229.06:17:48.34#ibcon#about to read 6, iclass 15, count 2 2006.229.06:17:48.34#ibcon#read 6, iclass 15, count 2 2006.229.06:17:48.34#ibcon#end of sib2, iclass 15, count 2 2006.229.06:17:48.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.06:17:48.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.06:17:48.34#ibcon#[25=AT07-05\r\n] 2006.229.06:17:48.34#ibcon#*before write, iclass 15, count 2 2006.229.06:17:48.34#ibcon#enter sib2, iclass 15, count 2 2006.229.06:17:48.34#ibcon#flushed, iclass 15, count 2 2006.229.06:17:48.34#ibcon#about to write, iclass 15, count 2 2006.229.06:17:48.34#ibcon#wrote, iclass 15, count 2 2006.229.06:17:48.34#ibcon#about to read 3, iclass 15, count 2 2006.229.06:17:48.37#ibcon#read 3, iclass 15, count 2 2006.229.06:17:48.37#ibcon#about to read 4, iclass 15, count 2 2006.229.06:17:48.37#ibcon#read 4, iclass 15, count 2 2006.229.06:17:48.37#ibcon#about to read 5, iclass 15, count 2 2006.229.06:17:48.37#ibcon#read 5, iclass 15, count 2 2006.229.06:17:48.37#ibcon#about to read 6, iclass 15, count 2 2006.229.06:17:48.37#ibcon#read 6, iclass 15, count 2 2006.229.06:17:48.37#ibcon#end of sib2, iclass 15, count 2 2006.229.06:17:48.37#ibcon#*after write, iclass 15, count 2 2006.229.06:17:48.37#ibcon#*before return 0, iclass 15, count 2 2006.229.06:17:48.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:48.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:48.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.06:17:48.37#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:48.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:48.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:48.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:48.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:17:48.49#ibcon#first serial, iclass 15, count 0 2006.229.06:17:48.49#ibcon#enter sib2, iclass 15, count 0 2006.229.06:17:48.49#ibcon#flushed, iclass 15, count 0 2006.229.06:17:48.49#ibcon#about to write, iclass 15, count 0 2006.229.06:17:48.49#ibcon#wrote, iclass 15, count 0 2006.229.06:17:48.49#ibcon#about to read 3, iclass 15, count 0 2006.229.06:17:48.51#ibcon#read 3, iclass 15, count 0 2006.229.06:17:48.51#ibcon#about to read 4, iclass 15, count 0 2006.229.06:17:48.51#ibcon#read 4, iclass 15, count 0 2006.229.06:17:48.51#ibcon#about to read 5, iclass 15, count 0 2006.229.06:17:48.51#ibcon#read 5, iclass 15, count 0 2006.229.06:17:48.51#ibcon#about to read 6, iclass 15, count 0 2006.229.06:17:48.51#ibcon#read 6, iclass 15, count 0 2006.229.06:17:48.51#ibcon#end of sib2, iclass 15, count 0 2006.229.06:17:48.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:17:48.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:17:48.51#ibcon#[25=USB\r\n] 2006.229.06:17:48.51#ibcon#*before write, iclass 15, count 0 2006.229.06:17:48.51#ibcon#enter sib2, iclass 15, count 0 2006.229.06:17:48.51#ibcon#flushed, iclass 15, count 0 2006.229.06:17:48.51#ibcon#about to write, iclass 15, count 0 2006.229.06:17:48.51#ibcon#wrote, iclass 15, count 0 2006.229.06:17:48.51#ibcon#about to read 3, iclass 15, count 0 2006.229.06:17:48.54#ibcon#read 3, iclass 15, count 0 2006.229.06:17:48.54#ibcon#about to read 4, iclass 15, count 0 2006.229.06:17:48.54#ibcon#read 4, iclass 15, count 0 2006.229.06:17:48.54#ibcon#about to read 5, iclass 15, count 0 2006.229.06:17:48.54#ibcon#read 5, iclass 15, count 0 2006.229.06:17:48.54#ibcon#about to read 6, iclass 15, count 0 2006.229.06:17:48.54#ibcon#read 6, iclass 15, count 0 2006.229.06:17:48.54#ibcon#end of sib2, iclass 15, count 0 2006.229.06:17:48.54#ibcon#*after write, iclass 15, count 0 2006.229.06:17:48.54#ibcon#*before return 0, iclass 15, count 0 2006.229.06:17:48.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:48.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:48.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:17:48.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:17:48.54$vck44/valo=8,884.99 2006.229.06:17:48.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.06:17:48.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.06:17:48.54#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:48.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:48.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:48.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:48.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:17:48.54#ibcon#first serial, iclass 17, count 0 2006.229.06:17:48.54#ibcon#enter sib2, iclass 17, count 0 2006.229.06:17:48.54#ibcon#flushed, iclass 17, count 0 2006.229.06:17:48.54#ibcon#about to write, iclass 17, count 0 2006.229.06:17:48.54#ibcon#wrote, iclass 17, count 0 2006.229.06:17:48.54#ibcon#about to read 3, iclass 17, count 0 2006.229.06:17:48.56#ibcon#read 3, iclass 17, count 0 2006.229.06:17:48.56#ibcon#about to read 4, iclass 17, count 0 2006.229.06:17:48.56#ibcon#read 4, iclass 17, count 0 2006.229.06:17:48.56#ibcon#about to read 5, iclass 17, count 0 2006.229.06:17:48.56#ibcon#read 5, iclass 17, count 0 2006.229.06:17:48.56#ibcon#about to read 6, iclass 17, count 0 2006.229.06:17:48.56#ibcon#read 6, iclass 17, count 0 2006.229.06:17:48.56#ibcon#end of sib2, iclass 17, count 0 2006.229.06:17:48.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:17:48.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:17:48.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:17:48.56#ibcon#*before write, iclass 17, count 0 2006.229.06:17:48.56#ibcon#enter sib2, iclass 17, count 0 2006.229.06:17:48.56#ibcon#flushed, iclass 17, count 0 2006.229.06:17:48.56#ibcon#about to write, iclass 17, count 0 2006.229.06:17:48.56#ibcon#wrote, iclass 17, count 0 2006.229.06:17:48.56#ibcon#about to read 3, iclass 17, count 0 2006.229.06:17:48.60#ibcon#read 3, iclass 17, count 0 2006.229.06:17:48.60#ibcon#about to read 4, iclass 17, count 0 2006.229.06:17:48.60#ibcon#read 4, iclass 17, count 0 2006.229.06:17:48.60#ibcon#about to read 5, iclass 17, count 0 2006.229.06:17:48.60#ibcon#read 5, iclass 17, count 0 2006.229.06:17:48.60#ibcon#about to read 6, iclass 17, count 0 2006.229.06:17:48.60#ibcon#read 6, iclass 17, count 0 2006.229.06:17:48.60#ibcon#end of sib2, iclass 17, count 0 2006.229.06:17:48.60#ibcon#*after write, iclass 17, count 0 2006.229.06:17:48.60#ibcon#*before return 0, iclass 17, count 0 2006.229.06:17:48.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:48.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:48.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:17:48.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:17:48.60$vck44/va=8,6 2006.229.06:17:48.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.06:17:48.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.06:17:48.60#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:48.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:17:48.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:17:48.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:17:48.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.06:17:48.66#ibcon#first serial, iclass 19, count 2 2006.229.06:17:48.66#ibcon#enter sib2, iclass 19, count 2 2006.229.06:17:48.66#ibcon#flushed, iclass 19, count 2 2006.229.06:17:48.66#ibcon#about to write, iclass 19, count 2 2006.229.06:17:48.66#ibcon#wrote, iclass 19, count 2 2006.229.06:17:48.66#ibcon#about to read 3, iclass 19, count 2 2006.229.06:17:48.68#ibcon#read 3, iclass 19, count 2 2006.229.06:17:48.68#ibcon#about to read 4, iclass 19, count 2 2006.229.06:17:48.68#ibcon#read 4, iclass 19, count 2 2006.229.06:17:48.68#ibcon#about to read 5, iclass 19, count 2 2006.229.06:17:48.68#ibcon#read 5, iclass 19, count 2 2006.229.06:17:48.68#ibcon#about to read 6, iclass 19, count 2 2006.229.06:17:48.68#ibcon#read 6, iclass 19, count 2 2006.229.06:17:48.68#ibcon#end of sib2, iclass 19, count 2 2006.229.06:17:48.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.06:17:48.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.06:17:48.68#ibcon#[25=AT08-06\r\n] 2006.229.06:17:48.68#ibcon#*before write, iclass 19, count 2 2006.229.06:17:48.68#ibcon#enter sib2, iclass 19, count 2 2006.229.06:17:48.68#ibcon#flushed, iclass 19, count 2 2006.229.06:17:48.68#ibcon#about to write, iclass 19, count 2 2006.229.06:17:48.68#ibcon#wrote, iclass 19, count 2 2006.229.06:17:48.68#ibcon#about to read 3, iclass 19, count 2 2006.229.06:17:48.71#ibcon#read 3, iclass 19, count 2 2006.229.06:17:48.71#ibcon#about to read 4, iclass 19, count 2 2006.229.06:17:48.71#ibcon#read 4, iclass 19, count 2 2006.229.06:17:48.71#ibcon#about to read 5, iclass 19, count 2 2006.229.06:17:48.71#ibcon#read 5, iclass 19, count 2 2006.229.06:17:48.71#ibcon#about to read 6, iclass 19, count 2 2006.229.06:17:48.71#ibcon#read 6, iclass 19, count 2 2006.229.06:17:48.71#ibcon#end of sib2, iclass 19, count 2 2006.229.06:17:48.71#ibcon#*after write, iclass 19, count 2 2006.229.06:17:48.71#ibcon#*before return 0, iclass 19, count 2 2006.229.06:17:48.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:17:48.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:17:48.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.06:17:48.71#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:48.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:17:48.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:17:48.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:17:48.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:17:48.83#ibcon#first serial, iclass 19, count 0 2006.229.06:17:48.83#ibcon#enter sib2, iclass 19, count 0 2006.229.06:17:48.83#ibcon#flushed, iclass 19, count 0 2006.229.06:17:48.83#ibcon#about to write, iclass 19, count 0 2006.229.06:17:48.83#ibcon#wrote, iclass 19, count 0 2006.229.06:17:48.83#ibcon#about to read 3, iclass 19, count 0 2006.229.06:17:48.85#ibcon#read 3, iclass 19, count 0 2006.229.06:17:48.85#ibcon#about to read 4, iclass 19, count 0 2006.229.06:17:48.85#ibcon#read 4, iclass 19, count 0 2006.229.06:17:48.85#ibcon#about to read 5, iclass 19, count 0 2006.229.06:17:48.85#ibcon#read 5, iclass 19, count 0 2006.229.06:17:48.85#ibcon#about to read 6, iclass 19, count 0 2006.229.06:17:48.85#ibcon#read 6, iclass 19, count 0 2006.229.06:17:48.85#ibcon#end of sib2, iclass 19, count 0 2006.229.06:17:48.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:17:48.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:17:48.85#ibcon#[25=USB\r\n] 2006.229.06:17:48.85#ibcon#*before write, iclass 19, count 0 2006.229.06:17:48.85#ibcon#enter sib2, iclass 19, count 0 2006.229.06:17:48.85#ibcon#flushed, iclass 19, count 0 2006.229.06:17:48.85#ibcon#about to write, iclass 19, count 0 2006.229.06:17:48.85#ibcon#wrote, iclass 19, count 0 2006.229.06:17:48.85#ibcon#about to read 3, iclass 19, count 0 2006.229.06:17:48.88#ibcon#read 3, iclass 19, count 0 2006.229.06:17:48.88#ibcon#about to read 4, iclass 19, count 0 2006.229.06:17:48.88#ibcon#read 4, iclass 19, count 0 2006.229.06:17:48.88#ibcon#about to read 5, iclass 19, count 0 2006.229.06:17:48.88#ibcon#read 5, iclass 19, count 0 2006.229.06:17:48.88#ibcon#about to read 6, iclass 19, count 0 2006.229.06:17:48.88#ibcon#read 6, iclass 19, count 0 2006.229.06:17:48.88#ibcon#end of sib2, iclass 19, count 0 2006.229.06:17:48.88#ibcon#*after write, iclass 19, count 0 2006.229.06:17:48.88#ibcon#*before return 0, iclass 19, count 0 2006.229.06:17:48.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:17:48.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:17:48.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:17:48.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:17:48.88$vck44/vblo=1,629.99 2006.229.06:17:48.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.06:17:48.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.06:17:48.88#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:48.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:48.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:48.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:48.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:17:48.88#ibcon#first serial, iclass 21, count 0 2006.229.06:17:48.88#ibcon#enter sib2, iclass 21, count 0 2006.229.06:17:48.88#ibcon#flushed, iclass 21, count 0 2006.229.06:17:48.88#ibcon#about to write, iclass 21, count 0 2006.229.06:17:48.88#ibcon#wrote, iclass 21, count 0 2006.229.06:17:48.88#ibcon#about to read 3, iclass 21, count 0 2006.229.06:17:48.90#ibcon#read 3, iclass 21, count 0 2006.229.06:17:48.90#ibcon#about to read 4, iclass 21, count 0 2006.229.06:17:48.90#ibcon#read 4, iclass 21, count 0 2006.229.06:17:48.90#ibcon#about to read 5, iclass 21, count 0 2006.229.06:17:48.90#ibcon#read 5, iclass 21, count 0 2006.229.06:17:48.90#ibcon#about to read 6, iclass 21, count 0 2006.229.06:17:48.90#ibcon#read 6, iclass 21, count 0 2006.229.06:17:48.90#ibcon#end of sib2, iclass 21, count 0 2006.229.06:17:48.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:17:48.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:17:48.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:17:48.90#ibcon#*before write, iclass 21, count 0 2006.229.06:17:48.90#ibcon#enter sib2, iclass 21, count 0 2006.229.06:17:48.90#ibcon#flushed, iclass 21, count 0 2006.229.06:17:48.90#ibcon#about to write, iclass 21, count 0 2006.229.06:17:48.90#ibcon#wrote, iclass 21, count 0 2006.229.06:17:48.90#ibcon#about to read 3, iclass 21, count 0 2006.229.06:17:48.94#ibcon#read 3, iclass 21, count 0 2006.229.06:17:48.94#ibcon#about to read 4, iclass 21, count 0 2006.229.06:17:48.94#ibcon#read 4, iclass 21, count 0 2006.229.06:17:48.94#ibcon#about to read 5, iclass 21, count 0 2006.229.06:17:48.94#ibcon#read 5, iclass 21, count 0 2006.229.06:17:48.94#ibcon#about to read 6, iclass 21, count 0 2006.229.06:17:48.94#ibcon#read 6, iclass 21, count 0 2006.229.06:17:48.94#ibcon#end of sib2, iclass 21, count 0 2006.229.06:17:48.94#ibcon#*after write, iclass 21, count 0 2006.229.06:17:48.94#ibcon#*before return 0, iclass 21, count 0 2006.229.06:17:48.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:48.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:17:48.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:17:48.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:17:48.94$vck44/vb=1,4 2006.229.06:17:48.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.06:17:48.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.06:17:48.94#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:48.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:48.94#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:48.94#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:48.94#ibcon#enter wrdev, iclass 23, count 2 2006.229.06:17:48.94#ibcon#first serial, iclass 23, count 2 2006.229.06:17:48.94#ibcon#enter sib2, iclass 23, count 2 2006.229.06:17:48.94#ibcon#flushed, iclass 23, count 2 2006.229.06:17:48.94#ibcon#about to write, iclass 23, count 2 2006.229.06:17:48.94#ibcon#wrote, iclass 23, count 2 2006.229.06:17:48.94#ibcon#about to read 3, iclass 23, count 2 2006.229.06:17:48.96#ibcon#read 3, iclass 23, count 2 2006.229.06:17:48.96#ibcon#about to read 4, iclass 23, count 2 2006.229.06:17:48.96#ibcon#read 4, iclass 23, count 2 2006.229.06:17:48.96#ibcon#about to read 5, iclass 23, count 2 2006.229.06:17:48.96#ibcon#read 5, iclass 23, count 2 2006.229.06:17:48.96#ibcon#about to read 6, iclass 23, count 2 2006.229.06:17:48.96#ibcon#read 6, iclass 23, count 2 2006.229.06:17:48.96#ibcon#end of sib2, iclass 23, count 2 2006.229.06:17:48.96#ibcon#*mode == 0, iclass 23, count 2 2006.229.06:17:48.96#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.06:17:48.96#ibcon#[27=AT01-04\r\n] 2006.229.06:17:48.96#ibcon#*before write, iclass 23, count 2 2006.229.06:17:48.96#ibcon#enter sib2, iclass 23, count 2 2006.229.06:17:48.96#ibcon#flushed, iclass 23, count 2 2006.229.06:17:48.96#ibcon#about to write, iclass 23, count 2 2006.229.06:17:48.96#ibcon#wrote, iclass 23, count 2 2006.229.06:17:48.96#ibcon#about to read 3, iclass 23, count 2 2006.229.06:17:48.99#ibcon#read 3, iclass 23, count 2 2006.229.06:17:48.99#ibcon#about to read 4, iclass 23, count 2 2006.229.06:17:48.99#ibcon#read 4, iclass 23, count 2 2006.229.06:17:48.99#ibcon#about to read 5, iclass 23, count 2 2006.229.06:17:48.99#ibcon#read 5, iclass 23, count 2 2006.229.06:17:48.99#ibcon#about to read 6, iclass 23, count 2 2006.229.06:17:48.99#ibcon#read 6, iclass 23, count 2 2006.229.06:17:48.99#ibcon#end of sib2, iclass 23, count 2 2006.229.06:17:48.99#ibcon#*after write, iclass 23, count 2 2006.229.06:17:48.99#ibcon#*before return 0, iclass 23, count 2 2006.229.06:17:48.99#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:48.99#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:17:48.99#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.06:17:48.99#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:48.99#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:49.11#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:49.11#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:49.11#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:17:49.11#ibcon#first serial, iclass 23, count 0 2006.229.06:17:49.11#ibcon#enter sib2, iclass 23, count 0 2006.229.06:17:49.11#ibcon#flushed, iclass 23, count 0 2006.229.06:17:49.11#ibcon#about to write, iclass 23, count 0 2006.229.06:17:49.11#ibcon#wrote, iclass 23, count 0 2006.229.06:17:49.11#ibcon#about to read 3, iclass 23, count 0 2006.229.06:17:49.13#ibcon#read 3, iclass 23, count 0 2006.229.06:17:49.13#ibcon#about to read 4, iclass 23, count 0 2006.229.06:17:49.13#ibcon#read 4, iclass 23, count 0 2006.229.06:17:49.13#ibcon#about to read 5, iclass 23, count 0 2006.229.06:17:49.13#ibcon#read 5, iclass 23, count 0 2006.229.06:17:49.13#ibcon#about to read 6, iclass 23, count 0 2006.229.06:17:49.13#ibcon#read 6, iclass 23, count 0 2006.229.06:17:49.13#ibcon#end of sib2, iclass 23, count 0 2006.229.06:17:49.13#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:17:49.13#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:17:49.13#ibcon#[27=USB\r\n] 2006.229.06:17:49.13#ibcon#*before write, iclass 23, count 0 2006.229.06:17:49.13#ibcon#enter sib2, iclass 23, count 0 2006.229.06:17:49.13#ibcon#flushed, iclass 23, count 0 2006.229.06:17:49.13#ibcon#about to write, iclass 23, count 0 2006.229.06:17:49.13#ibcon#wrote, iclass 23, count 0 2006.229.06:17:49.13#ibcon#about to read 3, iclass 23, count 0 2006.229.06:17:49.16#ibcon#read 3, iclass 23, count 0 2006.229.06:17:49.16#ibcon#about to read 4, iclass 23, count 0 2006.229.06:17:49.16#ibcon#read 4, iclass 23, count 0 2006.229.06:17:49.16#ibcon#about to read 5, iclass 23, count 0 2006.229.06:17:49.16#ibcon#read 5, iclass 23, count 0 2006.229.06:17:49.16#ibcon#about to read 6, iclass 23, count 0 2006.229.06:17:49.16#ibcon#read 6, iclass 23, count 0 2006.229.06:17:49.16#ibcon#end of sib2, iclass 23, count 0 2006.229.06:17:49.16#ibcon#*after write, iclass 23, count 0 2006.229.06:17:49.16#ibcon#*before return 0, iclass 23, count 0 2006.229.06:17:49.16#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:49.16#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:17:49.16#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:17:49.16#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:17:49.16$vck44/vblo=2,634.99 2006.229.06:17:49.16#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.06:17:49.16#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.06:17:49.16#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:49.16#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:49.16#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:49.16#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:49.16#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:17:49.16#ibcon#first serial, iclass 25, count 0 2006.229.06:17:49.16#ibcon#enter sib2, iclass 25, count 0 2006.229.06:17:49.16#ibcon#flushed, iclass 25, count 0 2006.229.06:17:49.16#ibcon#about to write, iclass 25, count 0 2006.229.06:17:49.16#ibcon#wrote, iclass 25, count 0 2006.229.06:17:49.16#ibcon#about to read 3, iclass 25, count 0 2006.229.06:17:49.18#ibcon#read 3, iclass 25, count 0 2006.229.06:17:49.18#ibcon#about to read 4, iclass 25, count 0 2006.229.06:17:49.18#ibcon#read 4, iclass 25, count 0 2006.229.06:17:49.18#ibcon#about to read 5, iclass 25, count 0 2006.229.06:17:49.18#ibcon#read 5, iclass 25, count 0 2006.229.06:17:49.18#ibcon#about to read 6, iclass 25, count 0 2006.229.06:17:49.18#ibcon#read 6, iclass 25, count 0 2006.229.06:17:49.18#ibcon#end of sib2, iclass 25, count 0 2006.229.06:17:49.18#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:17:49.18#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:17:49.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:17:49.18#ibcon#*before write, iclass 25, count 0 2006.229.06:17:49.18#ibcon#enter sib2, iclass 25, count 0 2006.229.06:17:49.18#ibcon#flushed, iclass 25, count 0 2006.229.06:17:49.18#ibcon#about to write, iclass 25, count 0 2006.229.06:17:49.18#ibcon#wrote, iclass 25, count 0 2006.229.06:17:49.18#ibcon#about to read 3, iclass 25, count 0 2006.229.06:17:49.22#ibcon#read 3, iclass 25, count 0 2006.229.06:17:49.22#ibcon#about to read 4, iclass 25, count 0 2006.229.06:17:49.22#ibcon#read 4, iclass 25, count 0 2006.229.06:17:49.22#ibcon#about to read 5, iclass 25, count 0 2006.229.06:17:49.22#ibcon#read 5, iclass 25, count 0 2006.229.06:17:49.22#ibcon#about to read 6, iclass 25, count 0 2006.229.06:17:49.22#ibcon#read 6, iclass 25, count 0 2006.229.06:17:49.22#ibcon#end of sib2, iclass 25, count 0 2006.229.06:17:49.22#ibcon#*after write, iclass 25, count 0 2006.229.06:17:49.22#ibcon#*before return 0, iclass 25, count 0 2006.229.06:17:49.22#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:49.22#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:17:49.22#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:17:49.22#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:17:49.22$vck44/vb=2,4 2006.229.06:17:49.22#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.06:17:49.22#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.06:17:49.22#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:49.22#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:49.28#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:49.28#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:49.28#ibcon#enter wrdev, iclass 27, count 2 2006.229.06:17:49.28#ibcon#first serial, iclass 27, count 2 2006.229.06:17:49.28#ibcon#enter sib2, iclass 27, count 2 2006.229.06:17:49.28#ibcon#flushed, iclass 27, count 2 2006.229.06:17:49.28#ibcon#about to write, iclass 27, count 2 2006.229.06:17:49.28#ibcon#wrote, iclass 27, count 2 2006.229.06:17:49.28#ibcon#about to read 3, iclass 27, count 2 2006.229.06:17:49.30#ibcon#read 3, iclass 27, count 2 2006.229.06:17:49.30#ibcon#about to read 4, iclass 27, count 2 2006.229.06:17:49.30#ibcon#read 4, iclass 27, count 2 2006.229.06:17:49.30#ibcon#about to read 5, iclass 27, count 2 2006.229.06:17:49.30#ibcon#read 5, iclass 27, count 2 2006.229.06:17:49.30#ibcon#about to read 6, iclass 27, count 2 2006.229.06:17:49.30#ibcon#read 6, iclass 27, count 2 2006.229.06:17:49.30#ibcon#end of sib2, iclass 27, count 2 2006.229.06:17:49.30#ibcon#*mode == 0, iclass 27, count 2 2006.229.06:17:49.30#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.06:17:49.30#ibcon#[27=AT02-04\r\n] 2006.229.06:17:49.30#ibcon#*before write, iclass 27, count 2 2006.229.06:17:49.30#ibcon#enter sib2, iclass 27, count 2 2006.229.06:17:49.30#ibcon#flushed, iclass 27, count 2 2006.229.06:17:49.30#ibcon#about to write, iclass 27, count 2 2006.229.06:17:49.30#ibcon#wrote, iclass 27, count 2 2006.229.06:17:49.30#ibcon#about to read 3, iclass 27, count 2 2006.229.06:17:49.33#ibcon#read 3, iclass 27, count 2 2006.229.06:17:49.33#ibcon#about to read 4, iclass 27, count 2 2006.229.06:17:49.33#ibcon#read 4, iclass 27, count 2 2006.229.06:17:49.33#ibcon#about to read 5, iclass 27, count 2 2006.229.06:17:49.33#ibcon#read 5, iclass 27, count 2 2006.229.06:17:49.33#ibcon#about to read 6, iclass 27, count 2 2006.229.06:17:49.33#ibcon#read 6, iclass 27, count 2 2006.229.06:17:49.33#ibcon#end of sib2, iclass 27, count 2 2006.229.06:17:49.33#ibcon#*after write, iclass 27, count 2 2006.229.06:17:49.33#ibcon#*before return 0, iclass 27, count 2 2006.229.06:17:49.33#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:49.33#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:17:49.33#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.06:17:49.33#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:49.33#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:49.45#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:49.45#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:49.45#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:17:49.45#ibcon#first serial, iclass 27, count 0 2006.229.06:17:49.45#ibcon#enter sib2, iclass 27, count 0 2006.229.06:17:49.45#ibcon#flushed, iclass 27, count 0 2006.229.06:17:49.45#ibcon#about to write, iclass 27, count 0 2006.229.06:17:49.45#ibcon#wrote, iclass 27, count 0 2006.229.06:17:49.45#ibcon#about to read 3, iclass 27, count 0 2006.229.06:17:49.47#ibcon#read 3, iclass 27, count 0 2006.229.06:17:49.47#ibcon#about to read 4, iclass 27, count 0 2006.229.06:17:49.47#ibcon#read 4, iclass 27, count 0 2006.229.06:17:49.47#ibcon#about to read 5, iclass 27, count 0 2006.229.06:17:49.47#ibcon#read 5, iclass 27, count 0 2006.229.06:17:49.47#ibcon#about to read 6, iclass 27, count 0 2006.229.06:17:49.47#ibcon#read 6, iclass 27, count 0 2006.229.06:17:49.47#ibcon#end of sib2, iclass 27, count 0 2006.229.06:17:49.47#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:17:49.47#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:17:49.47#ibcon#[27=USB\r\n] 2006.229.06:17:49.47#ibcon#*before write, iclass 27, count 0 2006.229.06:17:49.47#ibcon#enter sib2, iclass 27, count 0 2006.229.06:17:49.47#ibcon#flushed, iclass 27, count 0 2006.229.06:17:49.47#ibcon#about to write, iclass 27, count 0 2006.229.06:17:49.47#ibcon#wrote, iclass 27, count 0 2006.229.06:17:49.47#ibcon#about to read 3, iclass 27, count 0 2006.229.06:17:49.50#ibcon#read 3, iclass 27, count 0 2006.229.06:17:49.50#ibcon#about to read 4, iclass 27, count 0 2006.229.06:17:49.50#ibcon#read 4, iclass 27, count 0 2006.229.06:17:49.50#ibcon#about to read 5, iclass 27, count 0 2006.229.06:17:49.50#ibcon#read 5, iclass 27, count 0 2006.229.06:17:49.50#ibcon#about to read 6, iclass 27, count 0 2006.229.06:17:49.50#ibcon#read 6, iclass 27, count 0 2006.229.06:17:49.50#ibcon#end of sib2, iclass 27, count 0 2006.229.06:17:49.50#ibcon#*after write, iclass 27, count 0 2006.229.06:17:49.50#ibcon#*before return 0, iclass 27, count 0 2006.229.06:17:49.50#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:49.50#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:17:49.50#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:17:49.50#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:17:49.50$vck44/vblo=3,649.99 2006.229.06:17:49.50#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.06:17:49.50#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.06:17:49.50#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:49.50#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:49.50#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:49.50#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:49.50#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:17:49.50#ibcon#first serial, iclass 29, count 0 2006.229.06:17:49.50#ibcon#enter sib2, iclass 29, count 0 2006.229.06:17:49.50#ibcon#flushed, iclass 29, count 0 2006.229.06:17:49.50#ibcon#about to write, iclass 29, count 0 2006.229.06:17:49.50#ibcon#wrote, iclass 29, count 0 2006.229.06:17:49.50#ibcon#about to read 3, iclass 29, count 0 2006.229.06:17:49.52#ibcon#read 3, iclass 29, count 0 2006.229.06:17:49.52#ibcon#about to read 4, iclass 29, count 0 2006.229.06:17:49.52#ibcon#read 4, iclass 29, count 0 2006.229.06:17:49.52#ibcon#about to read 5, iclass 29, count 0 2006.229.06:17:49.52#ibcon#read 5, iclass 29, count 0 2006.229.06:17:49.52#ibcon#about to read 6, iclass 29, count 0 2006.229.06:17:49.52#ibcon#read 6, iclass 29, count 0 2006.229.06:17:49.52#ibcon#end of sib2, iclass 29, count 0 2006.229.06:17:49.52#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:17:49.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:17:49.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:17:49.52#ibcon#*before write, iclass 29, count 0 2006.229.06:17:49.52#ibcon#enter sib2, iclass 29, count 0 2006.229.06:17:49.52#ibcon#flushed, iclass 29, count 0 2006.229.06:17:49.52#ibcon#about to write, iclass 29, count 0 2006.229.06:17:49.52#ibcon#wrote, iclass 29, count 0 2006.229.06:17:49.52#ibcon#about to read 3, iclass 29, count 0 2006.229.06:17:49.56#ibcon#read 3, iclass 29, count 0 2006.229.06:17:49.56#ibcon#about to read 4, iclass 29, count 0 2006.229.06:17:49.56#ibcon#read 4, iclass 29, count 0 2006.229.06:17:49.56#ibcon#about to read 5, iclass 29, count 0 2006.229.06:17:49.56#ibcon#read 5, iclass 29, count 0 2006.229.06:17:49.56#ibcon#about to read 6, iclass 29, count 0 2006.229.06:17:49.56#ibcon#read 6, iclass 29, count 0 2006.229.06:17:49.56#ibcon#end of sib2, iclass 29, count 0 2006.229.06:17:49.56#ibcon#*after write, iclass 29, count 0 2006.229.06:17:49.56#ibcon#*before return 0, iclass 29, count 0 2006.229.06:17:49.56#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:49.56#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:17:49.56#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:17:49.56#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:17:49.56$vck44/vb=3,4 2006.229.06:17:49.56#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.06:17:49.56#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.06:17:49.56#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:49.56#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:49.62#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:49.62#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:49.62#ibcon#enter wrdev, iclass 31, count 2 2006.229.06:17:49.62#ibcon#first serial, iclass 31, count 2 2006.229.06:17:49.62#ibcon#enter sib2, iclass 31, count 2 2006.229.06:17:49.62#ibcon#flushed, iclass 31, count 2 2006.229.06:17:49.62#ibcon#about to write, iclass 31, count 2 2006.229.06:17:49.62#ibcon#wrote, iclass 31, count 2 2006.229.06:17:49.62#ibcon#about to read 3, iclass 31, count 2 2006.229.06:17:49.64#ibcon#read 3, iclass 31, count 2 2006.229.06:17:49.64#ibcon#about to read 4, iclass 31, count 2 2006.229.06:17:49.64#ibcon#read 4, iclass 31, count 2 2006.229.06:17:49.64#ibcon#about to read 5, iclass 31, count 2 2006.229.06:17:49.64#ibcon#read 5, iclass 31, count 2 2006.229.06:17:49.64#ibcon#about to read 6, iclass 31, count 2 2006.229.06:17:49.64#ibcon#read 6, iclass 31, count 2 2006.229.06:17:49.64#ibcon#end of sib2, iclass 31, count 2 2006.229.06:17:49.64#ibcon#*mode == 0, iclass 31, count 2 2006.229.06:17:49.64#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.06:17:49.64#ibcon#[27=AT03-04\r\n] 2006.229.06:17:49.64#ibcon#*before write, iclass 31, count 2 2006.229.06:17:49.64#ibcon#enter sib2, iclass 31, count 2 2006.229.06:17:49.64#ibcon#flushed, iclass 31, count 2 2006.229.06:17:49.64#ibcon#about to write, iclass 31, count 2 2006.229.06:17:49.64#ibcon#wrote, iclass 31, count 2 2006.229.06:17:49.64#ibcon#about to read 3, iclass 31, count 2 2006.229.06:17:49.67#ibcon#read 3, iclass 31, count 2 2006.229.06:17:49.67#ibcon#about to read 4, iclass 31, count 2 2006.229.06:17:49.67#ibcon#read 4, iclass 31, count 2 2006.229.06:17:49.67#ibcon#about to read 5, iclass 31, count 2 2006.229.06:17:49.67#ibcon#read 5, iclass 31, count 2 2006.229.06:17:49.67#ibcon#about to read 6, iclass 31, count 2 2006.229.06:17:49.67#ibcon#read 6, iclass 31, count 2 2006.229.06:17:49.67#ibcon#end of sib2, iclass 31, count 2 2006.229.06:17:49.67#ibcon#*after write, iclass 31, count 2 2006.229.06:17:49.67#ibcon#*before return 0, iclass 31, count 2 2006.229.06:17:49.67#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:49.67#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:17:49.67#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.06:17:49.67#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:49.67#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:49.79#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:49.79#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:49.79#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:17:49.79#ibcon#first serial, iclass 31, count 0 2006.229.06:17:49.79#ibcon#enter sib2, iclass 31, count 0 2006.229.06:17:49.79#ibcon#flushed, iclass 31, count 0 2006.229.06:17:49.79#ibcon#about to write, iclass 31, count 0 2006.229.06:17:49.79#ibcon#wrote, iclass 31, count 0 2006.229.06:17:49.79#ibcon#about to read 3, iclass 31, count 0 2006.229.06:17:49.81#ibcon#read 3, iclass 31, count 0 2006.229.06:17:49.81#ibcon#about to read 4, iclass 31, count 0 2006.229.06:17:49.81#ibcon#read 4, iclass 31, count 0 2006.229.06:17:49.81#ibcon#about to read 5, iclass 31, count 0 2006.229.06:17:49.81#ibcon#read 5, iclass 31, count 0 2006.229.06:17:49.81#ibcon#about to read 6, iclass 31, count 0 2006.229.06:17:49.81#ibcon#read 6, iclass 31, count 0 2006.229.06:17:49.81#ibcon#end of sib2, iclass 31, count 0 2006.229.06:17:49.81#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:17:49.81#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:17:49.81#ibcon#[27=USB\r\n] 2006.229.06:17:49.81#ibcon#*before write, iclass 31, count 0 2006.229.06:17:49.81#ibcon#enter sib2, iclass 31, count 0 2006.229.06:17:49.81#ibcon#flushed, iclass 31, count 0 2006.229.06:17:49.81#ibcon#about to write, iclass 31, count 0 2006.229.06:17:49.81#ibcon#wrote, iclass 31, count 0 2006.229.06:17:49.81#ibcon#about to read 3, iclass 31, count 0 2006.229.06:17:49.84#ibcon#read 3, iclass 31, count 0 2006.229.06:17:49.84#ibcon#about to read 4, iclass 31, count 0 2006.229.06:17:49.84#ibcon#read 4, iclass 31, count 0 2006.229.06:17:49.84#ibcon#about to read 5, iclass 31, count 0 2006.229.06:17:49.84#ibcon#read 5, iclass 31, count 0 2006.229.06:17:49.84#ibcon#about to read 6, iclass 31, count 0 2006.229.06:17:49.84#ibcon#read 6, iclass 31, count 0 2006.229.06:17:49.84#ibcon#end of sib2, iclass 31, count 0 2006.229.06:17:49.84#ibcon#*after write, iclass 31, count 0 2006.229.06:17:49.84#ibcon#*before return 0, iclass 31, count 0 2006.229.06:17:49.84#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:49.84#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:17:49.84#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:17:49.84#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:17:49.84$vck44/vblo=4,679.99 2006.229.06:17:49.84#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.06:17:49.84#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.06:17:49.84#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:49.84#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:17:49.84#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:17:49.84#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:17:49.84#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:17:49.84#ibcon#first serial, iclass 33, count 0 2006.229.06:17:49.84#ibcon#enter sib2, iclass 33, count 0 2006.229.06:17:49.84#ibcon#flushed, iclass 33, count 0 2006.229.06:17:49.84#ibcon#about to write, iclass 33, count 0 2006.229.06:17:49.84#ibcon#wrote, iclass 33, count 0 2006.229.06:17:49.84#ibcon#about to read 3, iclass 33, count 0 2006.229.06:17:49.86#ibcon#read 3, iclass 33, count 0 2006.229.06:17:49.86#ibcon#about to read 4, iclass 33, count 0 2006.229.06:17:49.86#ibcon#read 4, iclass 33, count 0 2006.229.06:17:49.86#ibcon#about to read 5, iclass 33, count 0 2006.229.06:17:49.86#ibcon#read 5, iclass 33, count 0 2006.229.06:17:49.86#ibcon#about to read 6, iclass 33, count 0 2006.229.06:17:49.86#ibcon#read 6, iclass 33, count 0 2006.229.06:17:49.86#ibcon#end of sib2, iclass 33, count 0 2006.229.06:17:49.86#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:17:49.86#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:17:49.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:17:49.86#ibcon#*before write, iclass 33, count 0 2006.229.06:17:49.86#ibcon#enter sib2, iclass 33, count 0 2006.229.06:17:49.86#ibcon#flushed, iclass 33, count 0 2006.229.06:17:49.86#ibcon#about to write, iclass 33, count 0 2006.229.06:17:49.86#ibcon#wrote, iclass 33, count 0 2006.229.06:17:49.86#ibcon#about to read 3, iclass 33, count 0 2006.229.06:17:49.90#ibcon#read 3, iclass 33, count 0 2006.229.06:17:49.90#ibcon#about to read 4, iclass 33, count 0 2006.229.06:17:49.90#ibcon#read 4, iclass 33, count 0 2006.229.06:17:49.90#ibcon#about to read 5, iclass 33, count 0 2006.229.06:17:49.90#ibcon#read 5, iclass 33, count 0 2006.229.06:17:49.90#ibcon#about to read 6, iclass 33, count 0 2006.229.06:17:49.90#ibcon#read 6, iclass 33, count 0 2006.229.06:17:49.90#ibcon#end of sib2, iclass 33, count 0 2006.229.06:17:49.90#ibcon#*after write, iclass 33, count 0 2006.229.06:17:49.90#ibcon#*before return 0, iclass 33, count 0 2006.229.06:17:49.90#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:17:49.90#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:17:49.90#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:17:49.90#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:17:49.90$vck44/vb=4,4 2006.229.06:17:49.90#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.06:17:49.90#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.06:17:49.90#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:49.90#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:17:49.96#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:17:49.96#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:17:49.96#ibcon#enter wrdev, iclass 35, count 2 2006.229.06:17:49.96#ibcon#first serial, iclass 35, count 2 2006.229.06:17:49.96#ibcon#enter sib2, iclass 35, count 2 2006.229.06:17:49.96#ibcon#flushed, iclass 35, count 2 2006.229.06:17:49.96#ibcon#about to write, iclass 35, count 2 2006.229.06:17:49.96#ibcon#wrote, iclass 35, count 2 2006.229.06:17:49.96#ibcon#about to read 3, iclass 35, count 2 2006.229.06:17:49.98#ibcon#read 3, iclass 35, count 2 2006.229.06:17:49.98#ibcon#about to read 4, iclass 35, count 2 2006.229.06:17:49.98#ibcon#read 4, iclass 35, count 2 2006.229.06:17:49.98#ibcon#about to read 5, iclass 35, count 2 2006.229.06:17:49.98#ibcon#read 5, iclass 35, count 2 2006.229.06:17:49.98#ibcon#about to read 6, iclass 35, count 2 2006.229.06:17:49.98#ibcon#read 6, iclass 35, count 2 2006.229.06:17:49.98#ibcon#end of sib2, iclass 35, count 2 2006.229.06:17:49.98#ibcon#*mode == 0, iclass 35, count 2 2006.229.06:17:49.98#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.06:17:49.98#ibcon#[27=AT04-04\r\n] 2006.229.06:17:49.98#ibcon#*before write, iclass 35, count 2 2006.229.06:17:49.98#ibcon#enter sib2, iclass 35, count 2 2006.229.06:17:49.98#ibcon#flushed, iclass 35, count 2 2006.229.06:17:49.98#ibcon#about to write, iclass 35, count 2 2006.229.06:17:49.98#ibcon#wrote, iclass 35, count 2 2006.229.06:17:49.98#ibcon#about to read 3, iclass 35, count 2 2006.229.06:17:50.01#ibcon#read 3, iclass 35, count 2 2006.229.06:17:50.01#ibcon#about to read 4, iclass 35, count 2 2006.229.06:17:50.01#ibcon#read 4, iclass 35, count 2 2006.229.06:17:50.01#ibcon#about to read 5, iclass 35, count 2 2006.229.06:17:50.01#ibcon#read 5, iclass 35, count 2 2006.229.06:17:50.01#ibcon#about to read 6, iclass 35, count 2 2006.229.06:17:50.01#ibcon#read 6, iclass 35, count 2 2006.229.06:17:50.01#ibcon#end of sib2, iclass 35, count 2 2006.229.06:17:50.01#ibcon#*after write, iclass 35, count 2 2006.229.06:17:50.01#ibcon#*before return 0, iclass 35, count 2 2006.229.06:17:50.01#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:17:50.01#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:17:50.01#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.06:17:50.01#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:50.01#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:17:50.13#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:17:50.13#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:17:50.13#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:17:50.13#ibcon#first serial, iclass 35, count 0 2006.229.06:17:50.13#ibcon#enter sib2, iclass 35, count 0 2006.229.06:17:50.13#ibcon#flushed, iclass 35, count 0 2006.229.06:17:50.13#ibcon#about to write, iclass 35, count 0 2006.229.06:17:50.13#ibcon#wrote, iclass 35, count 0 2006.229.06:17:50.13#ibcon#about to read 3, iclass 35, count 0 2006.229.06:17:50.15#ibcon#read 3, iclass 35, count 0 2006.229.06:17:50.15#ibcon#about to read 4, iclass 35, count 0 2006.229.06:17:50.15#ibcon#read 4, iclass 35, count 0 2006.229.06:17:50.15#ibcon#about to read 5, iclass 35, count 0 2006.229.06:17:50.15#ibcon#read 5, iclass 35, count 0 2006.229.06:17:50.15#ibcon#about to read 6, iclass 35, count 0 2006.229.06:17:50.15#ibcon#read 6, iclass 35, count 0 2006.229.06:17:50.15#ibcon#end of sib2, iclass 35, count 0 2006.229.06:17:50.15#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:17:50.15#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:17:50.15#ibcon#[27=USB\r\n] 2006.229.06:17:50.15#ibcon#*before write, iclass 35, count 0 2006.229.06:17:50.15#ibcon#enter sib2, iclass 35, count 0 2006.229.06:17:50.15#ibcon#flushed, iclass 35, count 0 2006.229.06:17:50.15#ibcon#about to write, iclass 35, count 0 2006.229.06:17:50.15#ibcon#wrote, iclass 35, count 0 2006.229.06:17:50.15#ibcon#about to read 3, iclass 35, count 0 2006.229.06:17:50.18#ibcon#read 3, iclass 35, count 0 2006.229.06:17:50.18#ibcon#about to read 4, iclass 35, count 0 2006.229.06:17:50.18#ibcon#read 4, iclass 35, count 0 2006.229.06:17:50.18#ibcon#about to read 5, iclass 35, count 0 2006.229.06:17:50.18#ibcon#read 5, iclass 35, count 0 2006.229.06:17:50.18#ibcon#about to read 6, iclass 35, count 0 2006.229.06:17:50.18#ibcon#read 6, iclass 35, count 0 2006.229.06:17:50.18#ibcon#end of sib2, iclass 35, count 0 2006.229.06:17:50.18#ibcon#*after write, iclass 35, count 0 2006.229.06:17:50.18#ibcon#*before return 0, iclass 35, count 0 2006.229.06:17:50.18#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:17:50.18#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:17:50.18#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:17:50.18#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:17:50.18$vck44/vblo=5,709.99 2006.229.06:17:50.18#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.06:17:50.18#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.06:17:50.18#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:50.18#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:50.18#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:50.18#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:50.18#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:17:50.18#ibcon#first serial, iclass 37, count 0 2006.229.06:17:50.18#ibcon#enter sib2, iclass 37, count 0 2006.229.06:17:50.18#ibcon#flushed, iclass 37, count 0 2006.229.06:17:50.18#ibcon#about to write, iclass 37, count 0 2006.229.06:17:50.18#ibcon#wrote, iclass 37, count 0 2006.229.06:17:50.18#ibcon#about to read 3, iclass 37, count 0 2006.229.06:17:50.20#ibcon#read 3, iclass 37, count 0 2006.229.06:17:50.20#ibcon#about to read 4, iclass 37, count 0 2006.229.06:17:50.20#ibcon#read 4, iclass 37, count 0 2006.229.06:17:50.20#ibcon#about to read 5, iclass 37, count 0 2006.229.06:17:50.20#ibcon#read 5, iclass 37, count 0 2006.229.06:17:50.20#ibcon#about to read 6, iclass 37, count 0 2006.229.06:17:50.20#ibcon#read 6, iclass 37, count 0 2006.229.06:17:50.20#ibcon#end of sib2, iclass 37, count 0 2006.229.06:17:50.20#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:17:50.20#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:17:50.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:17:50.20#ibcon#*before write, iclass 37, count 0 2006.229.06:17:50.20#ibcon#enter sib2, iclass 37, count 0 2006.229.06:17:50.20#ibcon#flushed, iclass 37, count 0 2006.229.06:17:50.20#ibcon#about to write, iclass 37, count 0 2006.229.06:17:50.20#ibcon#wrote, iclass 37, count 0 2006.229.06:17:50.20#ibcon#about to read 3, iclass 37, count 0 2006.229.06:17:50.24#ibcon#read 3, iclass 37, count 0 2006.229.06:17:50.24#ibcon#about to read 4, iclass 37, count 0 2006.229.06:17:50.24#ibcon#read 4, iclass 37, count 0 2006.229.06:17:50.24#ibcon#about to read 5, iclass 37, count 0 2006.229.06:17:50.24#ibcon#read 5, iclass 37, count 0 2006.229.06:17:50.24#ibcon#about to read 6, iclass 37, count 0 2006.229.06:17:50.24#ibcon#read 6, iclass 37, count 0 2006.229.06:17:50.24#ibcon#end of sib2, iclass 37, count 0 2006.229.06:17:50.24#ibcon#*after write, iclass 37, count 0 2006.229.06:17:50.24#ibcon#*before return 0, iclass 37, count 0 2006.229.06:17:50.24#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:50.24#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:17:50.24#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:17:50.24#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:17:50.24$vck44/vb=5,4 2006.229.06:17:50.24#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.06:17:50.24#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.06:17:50.24#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:50.24#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:50.30#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:50.30#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:50.30#ibcon#enter wrdev, iclass 39, count 2 2006.229.06:17:50.30#ibcon#first serial, iclass 39, count 2 2006.229.06:17:50.30#ibcon#enter sib2, iclass 39, count 2 2006.229.06:17:50.30#ibcon#flushed, iclass 39, count 2 2006.229.06:17:50.30#ibcon#about to write, iclass 39, count 2 2006.229.06:17:50.30#ibcon#wrote, iclass 39, count 2 2006.229.06:17:50.30#ibcon#about to read 3, iclass 39, count 2 2006.229.06:17:50.32#ibcon#read 3, iclass 39, count 2 2006.229.06:17:50.32#ibcon#about to read 4, iclass 39, count 2 2006.229.06:17:50.32#ibcon#read 4, iclass 39, count 2 2006.229.06:17:50.32#ibcon#about to read 5, iclass 39, count 2 2006.229.06:17:50.32#ibcon#read 5, iclass 39, count 2 2006.229.06:17:50.32#ibcon#about to read 6, iclass 39, count 2 2006.229.06:17:50.32#ibcon#read 6, iclass 39, count 2 2006.229.06:17:50.32#ibcon#end of sib2, iclass 39, count 2 2006.229.06:17:50.32#ibcon#*mode == 0, iclass 39, count 2 2006.229.06:17:50.32#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.06:17:50.32#ibcon#[27=AT05-04\r\n] 2006.229.06:17:50.32#ibcon#*before write, iclass 39, count 2 2006.229.06:17:50.32#ibcon#enter sib2, iclass 39, count 2 2006.229.06:17:50.32#ibcon#flushed, iclass 39, count 2 2006.229.06:17:50.32#ibcon#about to write, iclass 39, count 2 2006.229.06:17:50.32#ibcon#wrote, iclass 39, count 2 2006.229.06:17:50.32#ibcon#about to read 3, iclass 39, count 2 2006.229.06:17:50.35#ibcon#read 3, iclass 39, count 2 2006.229.06:17:50.35#ibcon#about to read 4, iclass 39, count 2 2006.229.06:17:50.35#ibcon#read 4, iclass 39, count 2 2006.229.06:17:50.35#ibcon#about to read 5, iclass 39, count 2 2006.229.06:17:50.35#ibcon#read 5, iclass 39, count 2 2006.229.06:17:50.35#ibcon#about to read 6, iclass 39, count 2 2006.229.06:17:50.35#ibcon#read 6, iclass 39, count 2 2006.229.06:17:50.35#ibcon#end of sib2, iclass 39, count 2 2006.229.06:17:50.35#ibcon#*after write, iclass 39, count 2 2006.229.06:17:50.35#ibcon#*before return 0, iclass 39, count 2 2006.229.06:17:50.35#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:50.35#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:17:50.35#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.06:17:50.35#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:50.35#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:50.47#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:50.47#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:50.47#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:17:50.47#ibcon#first serial, iclass 39, count 0 2006.229.06:17:50.47#ibcon#enter sib2, iclass 39, count 0 2006.229.06:17:50.47#ibcon#flushed, iclass 39, count 0 2006.229.06:17:50.47#ibcon#about to write, iclass 39, count 0 2006.229.06:17:50.47#ibcon#wrote, iclass 39, count 0 2006.229.06:17:50.47#ibcon#about to read 3, iclass 39, count 0 2006.229.06:17:50.49#ibcon#read 3, iclass 39, count 0 2006.229.06:17:50.49#ibcon#about to read 4, iclass 39, count 0 2006.229.06:17:50.49#ibcon#read 4, iclass 39, count 0 2006.229.06:17:50.49#ibcon#about to read 5, iclass 39, count 0 2006.229.06:17:50.49#ibcon#read 5, iclass 39, count 0 2006.229.06:17:50.49#ibcon#about to read 6, iclass 39, count 0 2006.229.06:17:50.49#ibcon#read 6, iclass 39, count 0 2006.229.06:17:50.49#ibcon#end of sib2, iclass 39, count 0 2006.229.06:17:50.49#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:17:50.49#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:17:50.49#ibcon#[27=USB\r\n] 2006.229.06:17:50.49#ibcon#*before write, iclass 39, count 0 2006.229.06:17:50.49#ibcon#enter sib2, iclass 39, count 0 2006.229.06:17:50.49#ibcon#flushed, iclass 39, count 0 2006.229.06:17:50.49#ibcon#about to write, iclass 39, count 0 2006.229.06:17:50.49#ibcon#wrote, iclass 39, count 0 2006.229.06:17:50.49#ibcon#about to read 3, iclass 39, count 0 2006.229.06:17:50.52#ibcon#read 3, iclass 39, count 0 2006.229.06:17:50.52#ibcon#about to read 4, iclass 39, count 0 2006.229.06:17:50.52#ibcon#read 4, iclass 39, count 0 2006.229.06:17:50.52#ibcon#about to read 5, iclass 39, count 0 2006.229.06:17:50.52#ibcon#read 5, iclass 39, count 0 2006.229.06:17:50.52#ibcon#about to read 6, iclass 39, count 0 2006.229.06:17:50.52#ibcon#read 6, iclass 39, count 0 2006.229.06:17:50.52#ibcon#end of sib2, iclass 39, count 0 2006.229.06:17:50.52#ibcon#*after write, iclass 39, count 0 2006.229.06:17:50.52#ibcon#*before return 0, iclass 39, count 0 2006.229.06:17:50.52#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:50.52#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:17:50.52#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:17:50.52#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:17:50.52$vck44/vblo=6,719.99 2006.229.06:17:50.52#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.06:17:50.52#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.06:17:50.52#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:50.52#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:50.52#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:50.52#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:50.52#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:17:50.52#ibcon#first serial, iclass 3, count 0 2006.229.06:17:50.52#ibcon#enter sib2, iclass 3, count 0 2006.229.06:17:50.52#ibcon#flushed, iclass 3, count 0 2006.229.06:17:50.52#ibcon#about to write, iclass 3, count 0 2006.229.06:17:50.52#ibcon#wrote, iclass 3, count 0 2006.229.06:17:50.52#ibcon#about to read 3, iclass 3, count 0 2006.229.06:17:50.54#ibcon#read 3, iclass 3, count 0 2006.229.06:17:50.54#ibcon#about to read 4, iclass 3, count 0 2006.229.06:17:50.54#ibcon#read 4, iclass 3, count 0 2006.229.06:17:50.54#ibcon#about to read 5, iclass 3, count 0 2006.229.06:17:50.54#ibcon#read 5, iclass 3, count 0 2006.229.06:17:50.54#ibcon#about to read 6, iclass 3, count 0 2006.229.06:17:50.54#ibcon#read 6, iclass 3, count 0 2006.229.06:17:50.54#ibcon#end of sib2, iclass 3, count 0 2006.229.06:17:50.54#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:17:50.54#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:17:50.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:17:50.54#ibcon#*before write, iclass 3, count 0 2006.229.06:17:50.54#ibcon#enter sib2, iclass 3, count 0 2006.229.06:17:50.54#ibcon#flushed, iclass 3, count 0 2006.229.06:17:50.54#ibcon#about to write, iclass 3, count 0 2006.229.06:17:50.54#ibcon#wrote, iclass 3, count 0 2006.229.06:17:50.54#ibcon#about to read 3, iclass 3, count 0 2006.229.06:17:50.58#ibcon#read 3, iclass 3, count 0 2006.229.06:17:50.58#ibcon#about to read 4, iclass 3, count 0 2006.229.06:17:50.58#ibcon#read 4, iclass 3, count 0 2006.229.06:17:50.58#ibcon#about to read 5, iclass 3, count 0 2006.229.06:17:50.58#ibcon#read 5, iclass 3, count 0 2006.229.06:17:50.58#ibcon#about to read 6, iclass 3, count 0 2006.229.06:17:50.58#ibcon#read 6, iclass 3, count 0 2006.229.06:17:50.58#ibcon#end of sib2, iclass 3, count 0 2006.229.06:17:50.58#ibcon#*after write, iclass 3, count 0 2006.229.06:17:50.58#ibcon#*before return 0, iclass 3, count 0 2006.229.06:17:50.58#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:50.58#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:17:50.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:17:50.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:17:50.58$vck44/vb=6,4 2006.229.06:17:50.58#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.06:17:50.58#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.06:17:50.58#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:50.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:50.64#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:50.64#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:50.64#ibcon#enter wrdev, iclass 5, count 2 2006.229.06:17:50.64#ibcon#first serial, iclass 5, count 2 2006.229.06:17:50.64#ibcon#enter sib2, iclass 5, count 2 2006.229.06:17:50.64#ibcon#flushed, iclass 5, count 2 2006.229.06:17:50.64#ibcon#about to write, iclass 5, count 2 2006.229.06:17:50.64#ibcon#wrote, iclass 5, count 2 2006.229.06:17:50.64#ibcon#about to read 3, iclass 5, count 2 2006.229.06:17:50.66#ibcon#read 3, iclass 5, count 2 2006.229.06:17:50.66#ibcon#about to read 4, iclass 5, count 2 2006.229.06:17:50.66#ibcon#read 4, iclass 5, count 2 2006.229.06:17:50.66#ibcon#about to read 5, iclass 5, count 2 2006.229.06:17:50.66#ibcon#read 5, iclass 5, count 2 2006.229.06:17:50.66#ibcon#about to read 6, iclass 5, count 2 2006.229.06:17:50.66#ibcon#read 6, iclass 5, count 2 2006.229.06:17:50.66#ibcon#end of sib2, iclass 5, count 2 2006.229.06:17:50.66#ibcon#*mode == 0, iclass 5, count 2 2006.229.06:17:50.66#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.06:17:50.66#ibcon#[27=AT06-04\r\n] 2006.229.06:17:50.66#ibcon#*before write, iclass 5, count 2 2006.229.06:17:50.66#ibcon#enter sib2, iclass 5, count 2 2006.229.06:17:50.66#ibcon#flushed, iclass 5, count 2 2006.229.06:17:50.66#ibcon#about to write, iclass 5, count 2 2006.229.06:17:50.66#ibcon#wrote, iclass 5, count 2 2006.229.06:17:50.66#ibcon#about to read 3, iclass 5, count 2 2006.229.06:17:50.69#ibcon#read 3, iclass 5, count 2 2006.229.06:17:50.69#ibcon#about to read 4, iclass 5, count 2 2006.229.06:17:50.69#ibcon#read 4, iclass 5, count 2 2006.229.06:17:50.69#ibcon#about to read 5, iclass 5, count 2 2006.229.06:17:50.69#ibcon#read 5, iclass 5, count 2 2006.229.06:17:50.69#ibcon#about to read 6, iclass 5, count 2 2006.229.06:17:50.69#ibcon#read 6, iclass 5, count 2 2006.229.06:17:50.69#ibcon#end of sib2, iclass 5, count 2 2006.229.06:17:50.69#ibcon#*after write, iclass 5, count 2 2006.229.06:17:50.69#ibcon#*before return 0, iclass 5, count 2 2006.229.06:17:50.69#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:50.69#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:17:50.69#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.06:17:50.69#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:50.69#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:50.81#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:50.81#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:50.81#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:17:50.81#ibcon#first serial, iclass 5, count 0 2006.229.06:17:50.81#ibcon#enter sib2, iclass 5, count 0 2006.229.06:17:50.81#ibcon#flushed, iclass 5, count 0 2006.229.06:17:50.81#ibcon#about to write, iclass 5, count 0 2006.229.06:17:50.81#ibcon#wrote, iclass 5, count 0 2006.229.06:17:50.81#ibcon#about to read 3, iclass 5, count 0 2006.229.06:17:50.83#ibcon#read 3, iclass 5, count 0 2006.229.06:17:50.83#ibcon#about to read 4, iclass 5, count 0 2006.229.06:17:50.83#ibcon#read 4, iclass 5, count 0 2006.229.06:17:50.83#ibcon#about to read 5, iclass 5, count 0 2006.229.06:17:50.83#ibcon#read 5, iclass 5, count 0 2006.229.06:17:50.83#ibcon#about to read 6, iclass 5, count 0 2006.229.06:17:50.83#ibcon#read 6, iclass 5, count 0 2006.229.06:17:50.83#ibcon#end of sib2, iclass 5, count 0 2006.229.06:17:50.83#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:17:50.83#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:17:50.83#ibcon#[27=USB\r\n] 2006.229.06:17:50.83#ibcon#*before write, iclass 5, count 0 2006.229.06:17:50.83#ibcon#enter sib2, iclass 5, count 0 2006.229.06:17:50.83#ibcon#flushed, iclass 5, count 0 2006.229.06:17:50.83#ibcon#about to write, iclass 5, count 0 2006.229.06:17:50.83#ibcon#wrote, iclass 5, count 0 2006.229.06:17:50.83#ibcon#about to read 3, iclass 5, count 0 2006.229.06:17:50.86#ibcon#read 3, iclass 5, count 0 2006.229.06:17:50.86#ibcon#about to read 4, iclass 5, count 0 2006.229.06:17:50.86#ibcon#read 4, iclass 5, count 0 2006.229.06:17:50.86#ibcon#about to read 5, iclass 5, count 0 2006.229.06:17:50.86#ibcon#read 5, iclass 5, count 0 2006.229.06:17:50.86#ibcon#about to read 6, iclass 5, count 0 2006.229.06:17:50.86#ibcon#read 6, iclass 5, count 0 2006.229.06:17:50.86#ibcon#end of sib2, iclass 5, count 0 2006.229.06:17:50.86#ibcon#*after write, iclass 5, count 0 2006.229.06:17:50.86#ibcon#*before return 0, iclass 5, count 0 2006.229.06:17:50.86#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:50.86#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:17:50.86#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:17:50.86#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:17:50.86$vck44/vblo=7,734.99 2006.229.06:17:50.86#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.06:17:50.86#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.06:17:50.86#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:50.86#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:50.86#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:50.86#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:50.86#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:17:50.86#ibcon#first serial, iclass 7, count 0 2006.229.06:17:50.86#ibcon#enter sib2, iclass 7, count 0 2006.229.06:17:50.86#ibcon#flushed, iclass 7, count 0 2006.229.06:17:50.86#ibcon#about to write, iclass 7, count 0 2006.229.06:17:50.86#ibcon#wrote, iclass 7, count 0 2006.229.06:17:50.86#ibcon#about to read 3, iclass 7, count 0 2006.229.06:17:50.88#ibcon#read 3, iclass 7, count 0 2006.229.06:17:50.88#ibcon#about to read 4, iclass 7, count 0 2006.229.06:17:50.88#ibcon#read 4, iclass 7, count 0 2006.229.06:17:50.88#ibcon#about to read 5, iclass 7, count 0 2006.229.06:17:50.88#ibcon#read 5, iclass 7, count 0 2006.229.06:17:50.88#ibcon#about to read 6, iclass 7, count 0 2006.229.06:17:50.88#ibcon#read 6, iclass 7, count 0 2006.229.06:17:50.88#ibcon#end of sib2, iclass 7, count 0 2006.229.06:17:50.88#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:17:50.88#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:17:50.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:17:50.88#ibcon#*before write, iclass 7, count 0 2006.229.06:17:50.88#ibcon#enter sib2, iclass 7, count 0 2006.229.06:17:50.88#ibcon#flushed, iclass 7, count 0 2006.229.06:17:50.88#ibcon#about to write, iclass 7, count 0 2006.229.06:17:50.88#ibcon#wrote, iclass 7, count 0 2006.229.06:17:50.88#ibcon#about to read 3, iclass 7, count 0 2006.229.06:17:50.92#ibcon#read 3, iclass 7, count 0 2006.229.06:17:50.92#ibcon#about to read 4, iclass 7, count 0 2006.229.06:17:50.92#ibcon#read 4, iclass 7, count 0 2006.229.06:17:50.92#ibcon#about to read 5, iclass 7, count 0 2006.229.06:17:50.92#ibcon#read 5, iclass 7, count 0 2006.229.06:17:50.92#ibcon#about to read 6, iclass 7, count 0 2006.229.06:17:50.92#ibcon#read 6, iclass 7, count 0 2006.229.06:17:50.92#ibcon#end of sib2, iclass 7, count 0 2006.229.06:17:50.92#ibcon#*after write, iclass 7, count 0 2006.229.06:17:50.92#ibcon#*before return 0, iclass 7, count 0 2006.229.06:17:50.92#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:50.92#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:17:50.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:17:50.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:17:50.92$vck44/vb=7,4 2006.229.06:17:50.92#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.06:17:50.92#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.06:17:50.92#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:50.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:50.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:50.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:50.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.06:17:50.98#ibcon#first serial, iclass 11, count 2 2006.229.06:17:50.98#ibcon#enter sib2, iclass 11, count 2 2006.229.06:17:50.98#ibcon#flushed, iclass 11, count 2 2006.229.06:17:50.98#ibcon#about to write, iclass 11, count 2 2006.229.06:17:50.98#ibcon#wrote, iclass 11, count 2 2006.229.06:17:50.98#ibcon#about to read 3, iclass 11, count 2 2006.229.06:17:51.00#ibcon#read 3, iclass 11, count 2 2006.229.06:17:51.00#ibcon#about to read 4, iclass 11, count 2 2006.229.06:17:51.00#ibcon#read 4, iclass 11, count 2 2006.229.06:17:51.00#ibcon#about to read 5, iclass 11, count 2 2006.229.06:17:51.00#ibcon#read 5, iclass 11, count 2 2006.229.06:17:51.00#ibcon#about to read 6, iclass 11, count 2 2006.229.06:17:51.00#ibcon#read 6, iclass 11, count 2 2006.229.06:17:51.00#ibcon#end of sib2, iclass 11, count 2 2006.229.06:17:51.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.06:17:51.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.06:17:51.00#ibcon#[27=AT07-04\r\n] 2006.229.06:17:51.00#ibcon#*before write, iclass 11, count 2 2006.229.06:17:51.00#ibcon#enter sib2, iclass 11, count 2 2006.229.06:17:51.00#ibcon#flushed, iclass 11, count 2 2006.229.06:17:51.00#ibcon#about to write, iclass 11, count 2 2006.229.06:17:51.00#ibcon#wrote, iclass 11, count 2 2006.229.06:17:51.00#ibcon#about to read 3, iclass 11, count 2 2006.229.06:17:51.03#ibcon#read 3, iclass 11, count 2 2006.229.06:17:51.03#ibcon#about to read 4, iclass 11, count 2 2006.229.06:17:51.03#ibcon#read 4, iclass 11, count 2 2006.229.06:17:51.03#ibcon#about to read 5, iclass 11, count 2 2006.229.06:17:51.03#ibcon#read 5, iclass 11, count 2 2006.229.06:17:51.03#ibcon#about to read 6, iclass 11, count 2 2006.229.06:17:51.03#ibcon#read 6, iclass 11, count 2 2006.229.06:17:51.03#ibcon#end of sib2, iclass 11, count 2 2006.229.06:17:51.03#ibcon#*after write, iclass 11, count 2 2006.229.06:17:51.03#ibcon#*before return 0, iclass 11, count 2 2006.229.06:17:51.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:51.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:17:51.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.06:17:51.03#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:51.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:51.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:51.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:51.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:17:51.15#ibcon#first serial, iclass 11, count 0 2006.229.06:17:51.15#ibcon#enter sib2, iclass 11, count 0 2006.229.06:17:51.15#ibcon#flushed, iclass 11, count 0 2006.229.06:17:51.15#ibcon#about to write, iclass 11, count 0 2006.229.06:17:51.15#ibcon#wrote, iclass 11, count 0 2006.229.06:17:51.15#ibcon#about to read 3, iclass 11, count 0 2006.229.06:17:51.17#ibcon#read 3, iclass 11, count 0 2006.229.06:17:51.17#ibcon#about to read 4, iclass 11, count 0 2006.229.06:17:51.17#ibcon#read 4, iclass 11, count 0 2006.229.06:17:51.17#ibcon#about to read 5, iclass 11, count 0 2006.229.06:17:51.17#ibcon#read 5, iclass 11, count 0 2006.229.06:17:51.17#ibcon#about to read 6, iclass 11, count 0 2006.229.06:17:51.17#ibcon#read 6, iclass 11, count 0 2006.229.06:17:51.17#ibcon#end of sib2, iclass 11, count 0 2006.229.06:17:51.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:17:51.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:17:51.17#ibcon#[27=USB\r\n] 2006.229.06:17:51.17#ibcon#*before write, iclass 11, count 0 2006.229.06:17:51.17#ibcon#enter sib2, iclass 11, count 0 2006.229.06:17:51.17#ibcon#flushed, iclass 11, count 0 2006.229.06:17:51.17#ibcon#about to write, iclass 11, count 0 2006.229.06:17:51.17#ibcon#wrote, iclass 11, count 0 2006.229.06:17:51.17#ibcon#about to read 3, iclass 11, count 0 2006.229.06:17:51.20#ibcon#read 3, iclass 11, count 0 2006.229.06:17:51.20#ibcon#about to read 4, iclass 11, count 0 2006.229.06:17:51.20#ibcon#read 4, iclass 11, count 0 2006.229.06:17:51.20#ibcon#about to read 5, iclass 11, count 0 2006.229.06:17:51.20#ibcon#read 5, iclass 11, count 0 2006.229.06:17:51.20#ibcon#about to read 6, iclass 11, count 0 2006.229.06:17:51.20#ibcon#read 6, iclass 11, count 0 2006.229.06:17:51.20#ibcon#end of sib2, iclass 11, count 0 2006.229.06:17:51.20#ibcon#*after write, iclass 11, count 0 2006.229.06:17:51.20#ibcon#*before return 0, iclass 11, count 0 2006.229.06:17:51.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:51.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:17:51.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:17:51.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:17:51.20$vck44/vblo=8,744.99 2006.229.06:17:51.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.06:17:51.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.06:17:51.20#ibcon#ireg 17 cls_cnt 0 2006.229.06:17:51.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:51.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:51.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:51.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:17:51.20#ibcon#first serial, iclass 13, count 0 2006.229.06:17:51.20#ibcon#enter sib2, iclass 13, count 0 2006.229.06:17:51.20#ibcon#flushed, iclass 13, count 0 2006.229.06:17:51.20#ibcon#about to write, iclass 13, count 0 2006.229.06:17:51.20#ibcon#wrote, iclass 13, count 0 2006.229.06:17:51.20#ibcon#about to read 3, iclass 13, count 0 2006.229.06:17:51.22#ibcon#read 3, iclass 13, count 0 2006.229.06:17:51.22#ibcon#about to read 4, iclass 13, count 0 2006.229.06:17:51.22#ibcon#read 4, iclass 13, count 0 2006.229.06:17:51.22#ibcon#about to read 5, iclass 13, count 0 2006.229.06:17:51.22#ibcon#read 5, iclass 13, count 0 2006.229.06:17:51.22#ibcon#about to read 6, iclass 13, count 0 2006.229.06:17:51.22#ibcon#read 6, iclass 13, count 0 2006.229.06:17:51.22#ibcon#end of sib2, iclass 13, count 0 2006.229.06:17:51.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:17:51.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:17:51.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:17:51.22#ibcon#*before write, iclass 13, count 0 2006.229.06:17:51.22#ibcon#enter sib2, iclass 13, count 0 2006.229.06:17:51.22#ibcon#flushed, iclass 13, count 0 2006.229.06:17:51.22#ibcon#about to write, iclass 13, count 0 2006.229.06:17:51.22#ibcon#wrote, iclass 13, count 0 2006.229.06:17:51.22#ibcon#about to read 3, iclass 13, count 0 2006.229.06:17:51.26#ibcon#read 3, iclass 13, count 0 2006.229.06:17:51.26#ibcon#about to read 4, iclass 13, count 0 2006.229.06:17:51.26#ibcon#read 4, iclass 13, count 0 2006.229.06:17:51.26#ibcon#about to read 5, iclass 13, count 0 2006.229.06:17:51.26#ibcon#read 5, iclass 13, count 0 2006.229.06:17:51.26#ibcon#about to read 6, iclass 13, count 0 2006.229.06:17:51.26#ibcon#read 6, iclass 13, count 0 2006.229.06:17:51.26#ibcon#end of sib2, iclass 13, count 0 2006.229.06:17:51.26#ibcon#*after write, iclass 13, count 0 2006.229.06:17:51.26#ibcon#*before return 0, iclass 13, count 0 2006.229.06:17:51.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:51.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:17:51.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:17:51.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:17:51.26$vck44/vb=8,4 2006.229.06:17:51.26#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.06:17:51.26#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.06:17:51.26#ibcon#ireg 11 cls_cnt 2 2006.229.06:17:51.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:51.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:51.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:51.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.06:17:51.32#ibcon#first serial, iclass 15, count 2 2006.229.06:17:51.32#ibcon#enter sib2, iclass 15, count 2 2006.229.06:17:51.32#ibcon#flushed, iclass 15, count 2 2006.229.06:17:51.32#ibcon#about to write, iclass 15, count 2 2006.229.06:17:51.32#ibcon#wrote, iclass 15, count 2 2006.229.06:17:51.32#ibcon#about to read 3, iclass 15, count 2 2006.229.06:17:51.34#ibcon#read 3, iclass 15, count 2 2006.229.06:17:51.34#ibcon#about to read 4, iclass 15, count 2 2006.229.06:17:51.34#ibcon#read 4, iclass 15, count 2 2006.229.06:17:51.34#ibcon#about to read 5, iclass 15, count 2 2006.229.06:17:51.34#ibcon#read 5, iclass 15, count 2 2006.229.06:17:51.34#ibcon#about to read 6, iclass 15, count 2 2006.229.06:17:51.34#ibcon#read 6, iclass 15, count 2 2006.229.06:17:51.34#ibcon#end of sib2, iclass 15, count 2 2006.229.06:17:51.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.06:17:51.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.06:17:51.34#ibcon#[27=AT08-04\r\n] 2006.229.06:17:51.34#ibcon#*before write, iclass 15, count 2 2006.229.06:17:51.34#ibcon#enter sib2, iclass 15, count 2 2006.229.06:17:51.34#ibcon#flushed, iclass 15, count 2 2006.229.06:17:51.34#ibcon#about to write, iclass 15, count 2 2006.229.06:17:51.34#ibcon#wrote, iclass 15, count 2 2006.229.06:17:51.34#ibcon#about to read 3, iclass 15, count 2 2006.229.06:17:51.37#ibcon#read 3, iclass 15, count 2 2006.229.06:17:51.37#ibcon#about to read 4, iclass 15, count 2 2006.229.06:17:51.37#ibcon#read 4, iclass 15, count 2 2006.229.06:17:51.37#ibcon#about to read 5, iclass 15, count 2 2006.229.06:17:51.37#ibcon#read 5, iclass 15, count 2 2006.229.06:17:51.37#ibcon#about to read 6, iclass 15, count 2 2006.229.06:17:51.37#ibcon#read 6, iclass 15, count 2 2006.229.06:17:51.37#ibcon#end of sib2, iclass 15, count 2 2006.229.06:17:51.37#ibcon#*after write, iclass 15, count 2 2006.229.06:17:51.37#ibcon#*before return 0, iclass 15, count 2 2006.229.06:17:51.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:51.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:17:51.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.06:17:51.37#ibcon#ireg 7 cls_cnt 0 2006.229.06:17:51.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:51.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:51.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:51.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:17:51.49#ibcon#first serial, iclass 15, count 0 2006.229.06:17:51.49#ibcon#enter sib2, iclass 15, count 0 2006.229.06:17:51.49#ibcon#flushed, iclass 15, count 0 2006.229.06:17:51.49#ibcon#about to write, iclass 15, count 0 2006.229.06:17:51.49#ibcon#wrote, iclass 15, count 0 2006.229.06:17:51.49#ibcon#about to read 3, iclass 15, count 0 2006.229.06:17:51.51#ibcon#read 3, iclass 15, count 0 2006.229.06:17:51.51#ibcon#about to read 4, iclass 15, count 0 2006.229.06:17:51.51#ibcon#read 4, iclass 15, count 0 2006.229.06:17:51.51#ibcon#about to read 5, iclass 15, count 0 2006.229.06:17:51.51#ibcon#read 5, iclass 15, count 0 2006.229.06:17:51.51#ibcon#about to read 6, iclass 15, count 0 2006.229.06:17:51.51#ibcon#read 6, iclass 15, count 0 2006.229.06:17:51.51#ibcon#end of sib2, iclass 15, count 0 2006.229.06:17:51.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:17:51.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:17:51.51#ibcon#[27=USB\r\n] 2006.229.06:17:51.51#ibcon#*before write, iclass 15, count 0 2006.229.06:17:51.51#ibcon#enter sib2, iclass 15, count 0 2006.229.06:17:51.51#ibcon#flushed, iclass 15, count 0 2006.229.06:17:51.51#ibcon#about to write, iclass 15, count 0 2006.229.06:17:51.51#ibcon#wrote, iclass 15, count 0 2006.229.06:17:51.51#ibcon#about to read 3, iclass 15, count 0 2006.229.06:17:51.54#ibcon#read 3, iclass 15, count 0 2006.229.06:17:51.54#ibcon#about to read 4, iclass 15, count 0 2006.229.06:17:51.54#ibcon#read 4, iclass 15, count 0 2006.229.06:17:51.54#ibcon#about to read 5, iclass 15, count 0 2006.229.06:17:51.54#ibcon#read 5, iclass 15, count 0 2006.229.06:17:51.54#ibcon#about to read 6, iclass 15, count 0 2006.229.06:17:51.54#ibcon#read 6, iclass 15, count 0 2006.229.06:17:51.54#ibcon#end of sib2, iclass 15, count 0 2006.229.06:17:51.54#ibcon#*after write, iclass 15, count 0 2006.229.06:17:51.54#ibcon#*before return 0, iclass 15, count 0 2006.229.06:17:51.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:51.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:17:51.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:17:51.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:17:51.54$vck44/vabw=wide 2006.229.06:17:51.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.06:17:51.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.06:17:51.54#ibcon#ireg 8 cls_cnt 0 2006.229.06:17:51.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:51.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:51.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:51.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:17:51.54#ibcon#first serial, iclass 17, count 0 2006.229.06:17:51.54#ibcon#enter sib2, iclass 17, count 0 2006.229.06:17:51.54#ibcon#flushed, iclass 17, count 0 2006.229.06:17:51.54#ibcon#about to write, iclass 17, count 0 2006.229.06:17:51.54#ibcon#wrote, iclass 17, count 0 2006.229.06:17:51.54#ibcon#about to read 3, iclass 17, count 0 2006.229.06:17:51.56#ibcon#read 3, iclass 17, count 0 2006.229.06:17:51.56#ibcon#about to read 4, iclass 17, count 0 2006.229.06:17:51.56#ibcon#read 4, iclass 17, count 0 2006.229.06:17:51.56#ibcon#about to read 5, iclass 17, count 0 2006.229.06:17:51.56#ibcon#read 5, iclass 17, count 0 2006.229.06:17:51.56#ibcon#about to read 6, iclass 17, count 0 2006.229.06:17:51.56#ibcon#read 6, iclass 17, count 0 2006.229.06:17:51.56#ibcon#end of sib2, iclass 17, count 0 2006.229.06:17:51.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:17:51.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:17:51.56#ibcon#[25=BW32\r\n] 2006.229.06:17:51.56#ibcon#*before write, iclass 17, count 0 2006.229.06:17:51.56#ibcon#enter sib2, iclass 17, count 0 2006.229.06:17:51.56#ibcon#flushed, iclass 17, count 0 2006.229.06:17:51.56#ibcon#about to write, iclass 17, count 0 2006.229.06:17:51.56#ibcon#wrote, iclass 17, count 0 2006.229.06:17:51.56#ibcon#about to read 3, iclass 17, count 0 2006.229.06:17:51.59#ibcon#read 3, iclass 17, count 0 2006.229.06:17:51.59#ibcon#about to read 4, iclass 17, count 0 2006.229.06:17:51.59#ibcon#read 4, iclass 17, count 0 2006.229.06:17:51.59#ibcon#about to read 5, iclass 17, count 0 2006.229.06:17:51.59#ibcon#read 5, iclass 17, count 0 2006.229.06:17:51.59#ibcon#about to read 6, iclass 17, count 0 2006.229.06:17:51.59#ibcon#read 6, iclass 17, count 0 2006.229.06:17:51.59#ibcon#end of sib2, iclass 17, count 0 2006.229.06:17:51.59#ibcon#*after write, iclass 17, count 0 2006.229.06:17:51.59#ibcon#*before return 0, iclass 17, count 0 2006.229.06:17:51.59#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:51.59#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:17:51.59#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:17:51.59#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:17:51.59$vck44/vbbw=wide 2006.229.06:17:51.59#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.06:17:51.59#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.06:17:51.59#ibcon#ireg 8 cls_cnt 0 2006.229.06:17:51.59#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:17:51.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:17:51.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:17:51.66#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:17:51.66#ibcon#first serial, iclass 19, count 0 2006.229.06:17:51.66#ibcon#enter sib2, iclass 19, count 0 2006.229.06:17:51.66#ibcon#flushed, iclass 19, count 0 2006.229.06:17:51.66#ibcon#about to write, iclass 19, count 0 2006.229.06:17:51.66#ibcon#wrote, iclass 19, count 0 2006.229.06:17:51.66#ibcon#about to read 3, iclass 19, count 0 2006.229.06:17:51.68#ibcon#read 3, iclass 19, count 0 2006.229.06:17:51.68#ibcon#about to read 4, iclass 19, count 0 2006.229.06:17:51.68#ibcon#read 4, iclass 19, count 0 2006.229.06:17:51.68#ibcon#about to read 5, iclass 19, count 0 2006.229.06:17:51.68#ibcon#read 5, iclass 19, count 0 2006.229.06:17:51.68#ibcon#about to read 6, iclass 19, count 0 2006.229.06:17:51.68#ibcon#read 6, iclass 19, count 0 2006.229.06:17:51.68#ibcon#end of sib2, iclass 19, count 0 2006.229.06:17:51.68#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:17:51.68#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:17:51.68#ibcon#[27=BW32\r\n] 2006.229.06:17:51.68#ibcon#*before write, iclass 19, count 0 2006.229.06:17:51.68#ibcon#enter sib2, iclass 19, count 0 2006.229.06:17:51.68#ibcon#flushed, iclass 19, count 0 2006.229.06:17:51.68#ibcon#about to write, iclass 19, count 0 2006.229.06:17:51.68#ibcon#wrote, iclass 19, count 0 2006.229.06:17:51.68#ibcon#about to read 3, iclass 19, count 0 2006.229.06:17:51.71#ibcon#read 3, iclass 19, count 0 2006.229.06:17:51.71#ibcon#about to read 4, iclass 19, count 0 2006.229.06:17:51.71#ibcon#read 4, iclass 19, count 0 2006.229.06:17:51.71#ibcon#about to read 5, iclass 19, count 0 2006.229.06:17:51.71#ibcon#read 5, iclass 19, count 0 2006.229.06:17:51.71#ibcon#about to read 6, iclass 19, count 0 2006.229.06:17:51.71#ibcon#read 6, iclass 19, count 0 2006.229.06:17:51.71#ibcon#end of sib2, iclass 19, count 0 2006.229.06:17:51.71#ibcon#*after write, iclass 19, count 0 2006.229.06:17:51.71#ibcon#*before return 0, iclass 19, count 0 2006.229.06:17:51.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:17:51.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:17:51.71#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:17:51.71#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:17:51.71$setupk4/ifdk4 2006.229.06:17:51.71$ifdk4/lo= 2006.229.06:17:51.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:17:51.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:17:51.72$ifdk4/patch= 2006.229.06:17:51.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:17:51.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:17:51.72$setupk4/!*+20s 2006.229.06:17:57.15#abcon#<5=/05 2.6 4.7 30.51 91 999.3\r\n> 2006.229.06:17:57.17#abcon#{5=INTERFACE CLEAR} 2006.229.06:17:57.23#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:18:06.23$setupk4/"tpicd 2006.229.06:18:06.23$setupk4/echo=off 2006.229.06:18:06.23$setupk4/xlog=off 2006.229.06:18:06.23:!2006.229.06:21:10 2006.229.06:19:10.14#trakl#Source acquired 2006.229.06:19:11.14#flagr#flagr/antenna,acquired 2006.229.06:21:10.00:preob 2006.229.06:21:10.14/onsource/TRACKING 2006.229.06:21:10.14:!2006.229.06:21:20 2006.229.06:21:20.00:"tape 2006.229.06:21:20.00:"st=record 2006.229.06:21:20.00:data_valid=on 2006.229.06:21:20.00:midob 2006.229.06:21:20.14/onsource/TRACKING 2006.229.06:21:20.14/wx/30.48,999.3,90 2006.229.06:21:20.21/cable/+6.3992E-03 2006.229.06:21:21.30/va/01,08,usb,yes,29,31 2006.229.06:21:21.30/va/02,07,usb,yes,31,32 2006.229.06:21:21.30/va/03,06,usb,yes,39,41 2006.229.06:21:21.30/va/04,07,usb,yes,32,34 2006.229.06:21:21.30/va/05,04,usb,yes,29,29 2006.229.06:21:21.30/va/06,04,usb,yes,32,32 2006.229.06:21:21.30/va/07,05,usb,yes,29,29 2006.229.06:21:21.30/va/08,06,usb,yes,21,26 2006.229.06:21:21.53/valo/01,524.99,yes,locked 2006.229.06:21:21.53/valo/02,534.99,yes,locked 2006.229.06:21:21.53/valo/03,564.99,yes,locked 2006.229.06:21:21.53/valo/04,624.99,yes,locked 2006.229.06:21:21.53/valo/05,734.99,yes,locked 2006.229.06:21:21.53/valo/06,814.99,yes,locked 2006.229.06:21:21.53/valo/07,864.99,yes,locked 2006.229.06:21:21.53/valo/08,884.99,yes,locked 2006.229.06:21:22.62/vb/01,04,usb,yes,31,29 2006.229.06:21:22.62/vb/02,04,usb,yes,33,33 2006.229.06:21:22.62/vb/03,04,usb,yes,30,33 2006.229.06:21:22.62/vb/04,04,usb,yes,34,33 2006.229.06:21:22.62/vb/05,04,usb,yes,27,29 2006.229.06:21:22.62/vb/06,04,usb,yes,31,27 2006.229.06:21:22.62/vb/07,04,usb,yes,31,31 2006.229.06:21:22.62/vb/08,04,usb,yes,29,32 2006.229.06:21:22.86/vblo/01,629.99,yes,locked 2006.229.06:21:22.86/vblo/02,634.99,yes,locked 2006.229.06:21:22.86/vblo/03,649.99,yes,locked 2006.229.06:21:22.86/vblo/04,679.99,yes,locked 2006.229.06:21:22.86/vblo/05,709.99,yes,locked 2006.229.06:21:22.86/vblo/06,719.99,yes,locked 2006.229.06:21:22.86/vblo/07,734.99,yes,locked 2006.229.06:21:22.86/vblo/08,744.99,yes,locked 2006.229.06:21:23.01/vabw/8 2006.229.06:21:23.16/vbbw/8 2006.229.06:21:23.36/xfe/off,on,12.0 2006.229.06:21:23.76/ifatt/23,28,28,28 2006.229.06:21:24.07/fmout-gps/S +4.54E-07 2006.229.06:21:24.11:!2006.229.06:22:10 2006.229.06:22:10.01:data_valid=off 2006.229.06:22:10.01:"et 2006.229.06:22:10.01:!+3s 2006.229.06:22:13.02:"tape 2006.229.06:22:13.02:postob 2006.229.06:22:13.17/cable/+6.3979E-03 2006.229.06:22:13.17/wx/30.46,999.4,91 2006.229.06:22:13.23/fmout-gps/S +4.54E-07 2006.229.06:22:13.23:scan_name=229-0627,jd0608,460 2006.229.06:22:13.23:source=1622-253,162546.89,-252738.3,2000.0,cw 2006.229.06:22:14.14#flagr#flagr/antenna,new-source 2006.229.06:22:14.14:checkk5 2006.229.06:22:14.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:22:14.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:22:15.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:22:15.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:22:16.16/chk_obsdata//k5ts1/T2290621??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.06:22:16.55/chk_obsdata//k5ts2/T2290621??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.06:22:16.94/chk_obsdata//k5ts3/T2290621??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.06:22:17.37/chk_obsdata//k5ts4/T2290621??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.06:22:18.08/k5log//k5ts1_log_newline 2006.229.06:22:18.79/k5log//k5ts2_log_newline 2006.229.06:22:19.50/k5log//k5ts3_log_newline 2006.229.06:22:20.22/k5log//k5ts4_log_newline 2006.229.06:22:20.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:22:20.24:setupk4=1 2006.229.06:22:20.24$setupk4/echo=on 2006.229.06:22:20.24$setupk4/pcalon 2006.229.06:22:20.24$pcalon/"no phase cal control is implemented here 2006.229.06:22:20.24$setupk4/"tpicd=stop 2006.229.06:22:20.24$setupk4/"rec=synch_on 2006.229.06:22:20.24$setupk4/"rec_mode=128 2006.229.06:22:20.24$setupk4/!* 2006.229.06:22:20.24$setupk4/recpk4 2006.229.06:22:20.24$recpk4/recpatch= 2006.229.06:22:20.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:22:20.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:22:20.25$setupk4/vck44 2006.229.06:22:20.25$vck44/valo=1,524.99 2006.229.06:22:20.25#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.06:22:20.25#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.06:22:20.25#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:20.25#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:20.25#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:20.25#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:20.25#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:22:20.25#ibcon#first serial, iclass 20, count 0 2006.229.06:22:20.25#ibcon#enter sib2, iclass 20, count 0 2006.229.06:22:20.25#ibcon#flushed, iclass 20, count 0 2006.229.06:22:20.25#ibcon#about to write, iclass 20, count 0 2006.229.06:22:20.25#ibcon#wrote, iclass 20, count 0 2006.229.06:22:20.25#ibcon#about to read 3, iclass 20, count 0 2006.229.06:22:20.26#ibcon#read 3, iclass 20, count 0 2006.229.06:22:20.26#ibcon#about to read 4, iclass 20, count 0 2006.229.06:22:20.26#ibcon#read 4, iclass 20, count 0 2006.229.06:22:20.26#ibcon#about to read 5, iclass 20, count 0 2006.229.06:22:20.26#ibcon#read 5, iclass 20, count 0 2006.229.06:22:20.26#ibcon#about to read 6, iclass 20, count 0 2006.229.06:22:20.26#ibcon#read 6, iclass 20, count 0 2006.229.06:22:20.26#ibcon#end of sib2, iclass 20, count 0 2006.229.06:22:20.26#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:22:20.26#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:22:20.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:22:20.26#ibcon#*before write, iclass 20, count 0 2006.229.06:22:20.26#ibcon#enter sib2, iclass 20, count 0 2006.229.06:22:20.26#ibcon#flushed, iclass 20, count 0 2006.229.06:22:20.26#ibcon#about to write, iclass 20, count 0 2006.229.06:22:20.26#ibcon#wrote, iclass 20, count 0 2006.229.06:22:20.26#ibcon#about to read 3, iclass 20, count 0 2006.229.06:22:20.31#ibcon#read 3, iclass 20, count 0 2006.229.06:22:20.31#ibcon#about to read 4, iclass 20, count 0 2006.229.06:22:20.31#ibcon#read 4, iclass 20, count 0 2006.229.06:22:20.31#ibcon#about to read 5, iclass 20, count 0 2006.229.06:22:20.31#ibcon#read 5, iclass 20, count 0 2006.229.06:22:20.31#ibcon#about to read 6, iclass 20, count 0 2006.229.06:22:20.31#ibcon#read 6, iclass 20, count 0 2006.229.06:22:20.31#ibcon#end of sib2, iclass 20, count 0 2006.229.06:22:20.31#ibcon#*after write, iclass 20, count 0 2006.229.06:22:20.31#ibcon#*before return 0, iclass 20, count 0 2006.229.06:22:20.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:20.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:20.31#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:22:20.31#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:22:20.31$vck44/va=1,8 2006.229.06:22:20.31#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.06:22:20.31#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.06:22:20.31#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:20.31#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:20.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:20.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:20.31#ibcon#enter wrdev, iclass 22, count 2 2006.229.06:22:20.31#ibcon#first serial, iclass 22, count 2 2006.229.06:22:20.31#ibcon#enter sib2, iclass 22, count 2 2006.229.06:22:20.31#ibcon#flushed, iclass 22, count 2 2006.229.06:22:20.31#ibcon#about to write, iclass 22, count 2 2006.229.06:22:20.31#ibcon#wrote, iclass 22, count 2 2006.229.06:22:20.31#ibcon#about to read 3, iclass 22, count 2 2006.229.06:22:20.33#ibcon#read 3, iclass 22, count 2 2006.229.06:22:20.33#ibcon#about to read 4, iclass 22, count 2 2006.229.06:22:20.33#ibcon#read 4, iclass 22, count 2 2006.229.06:22:20.33#ibcon#about to read 5, iclass 22, count 2 2006.229.06:22:20.33#ibcon#read 5, iclass 22, count 2 2006.229.06:22:20.33#ibcon#about to read 6, iclass 22, count 2 2006.229.06:22:20.33#ibcon#read 6, iclass 22, count 2 2006.229.06:22:20.33#ibcon#end of sib2, iclass 22, count 2 2006.229.06:22:20.33#ibcon#*mode == 0, iclass 22, count 2 2006.229.06:22:20.33#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.06:22:20.33#ibcon#[25=AT01-08\r\n] 2006.229.06:22:20.33#ibcon#*before write, iclass 22, count 2 2006.229.06:22:20.33#ibcon#enter sib2, iclass 22, count 2 2006.229.06:22:20.33#ibcon#flushed, iclass 22, count 2 2006.229.06:22:20.33#ibcon#about to write, iclass 22, count 2 2006.229.06:22:20.33#ibcon#wrote, iclass 22, count 2 2006.229.06:22:20.33#ibcon#about to read 3, iclass 22, count 2 2006.229.06:22:20.36#ibcon#read 3, iclass 22, count 2 2006.229.06:22:20.36#ibcon#about to read 4, iclass 22, count 2 2006.229.06:22:20.36#ibcon#read 4, iclass 22, count 2 2006.229.06:22:20.36#ibcon#about to read 5, iclass 22, count 2 2006.229.06:22:20.36#ibcon#read 5, iclass 22, count 2 2006.229.06:22:20.36#ibcon#about to read 6, iclass 22, count 2 2006.229.06:22:20.36#ibcon#read 6, iclass 22, count 2 2006.229.06:22:20.36#ibcon#end of sib2, iclass 22, count 2 2006.229.06:22:20.36#ibcon#*after write, iclass 22, count 2 2006.229.06:22:20.36#ibcon#*before return 0, iclass 22, count 2 2006.229.06:22:20.36#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:20.36#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:20.36#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.06:22:20.36#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:20.36#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:20.48#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:20.48#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:20.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:22:20.48#ibcon#first serial, iclass 22, count 0 2006.229.06:22:20.48#ibcon#enter sib2, iclass 22, count 0 2006.229.06:22:20.48#ibcon#flushed, iclass 22, count 0 2006.229.06:22:20.48#ibcon#about to write, iclass 22, count 0 2006.229.06:22:20.48#ibcon#wrote, iclass 22, count 0 2006.229.06:22:20.48#ibcon#about to read 3, iclass 22, count 0 2006.229.06:22:20.50#ibcon#read 3, iclass 22, count 0 2006.229.06:22:20.50#ibcon#about to read 4, iclass 22, count 0 2006.229.06:22:20.50#ibcon#read 4, iclass 22, count 0 2006.229.06:22:20.50#ibcon#about to read 5, iclass 22, count 0 2006.229.06:22:20.50#ibcon#read 5, iclass 22, count 0 2006.229.06:22:20.50#ibcon#about to read 6, iclass 22, count 0 2006.229.06:22:20.50#ibcon#read 6, iclass 22, count 0 2006.229.06:22:20.50#ibcon#end of sib2, iclass 22, count 0 2006.229.06:22:20.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:22:20.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:22:20.50#ibcon#[25=USB\r\n] 2006.229.06:22:20.50#ibcon#*before write, iclass 22, count 0 2006.229.06:22:20.50#ibcon#enter sib2, iclass 22, count 0 2006.229.06:22:20.50#ibcon#flushed, iclass 22, count 0 2006.229.06:22:20.50#ibcon#about to write, iclass 22, count 0 2006.229.06:22:20.50#ibcon#wrote, iclass 22, count 0 2006.229.06:22:20.50#ibcon#about to read 3, iclass 22, count 0 2006.229.06:22:20.53#ibcon#read 3, iclass 22, count 0 2006.229.06:22:20.53#ibcon#about to read 4, iclass 22, count 0 2006.229.06:22:20.53#ibcon#read 4, iclass 22, count 0 2006.229.06:22:20.53#ibcon#about to read 5, iclass 22, count 0 2006.229.06:22:20.53#ibcon#read 5, iclass 22, count 0 2006.229.06:22:20.53#ibcon#about to read 6, iclass 22, count 0 2006.229.06:22:20.53#ibcon#read 6, iclass 22, count 0 2006.229.06:22:20.53#ibcon#end of sib2, iclass 22, count 0 2006.229.06:22:20.53#ibcon#*after write, iclass 22, count 0 2006.229.06:22:20.53#ibcon#*before return 0, iclass 22, count 0 2006.229.06:22:20.53#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:20.53#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:20.53#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:22:20.53#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:22:20.53$vck44/valo=2,534.99 2006.229.06:22:20.53#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.06:22:20.53#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.06:22:20.53#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:20.53#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:20.53#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:20.53#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:20.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:22:20.53#ibcon#first serial, iclass 24, count 0 2006.229.06:22:20.53#ibcon#enter sib2, iclass 24, count 0 2006.229.06:22:20.53#ibcon#flushed, iclass 24, count 0 2006.229.06:22:20.53#ibcon#about to write, iclass 24, count 0 2006.229.06:22:20.53#ibcon#wrote, iclass 24, count 0 2006.229.06:22:20.53#ibcon#about to read 3, iclass 24, count 0 2006.229.06:22:20.55#ibcon#read 3, iclass 24, count 0 2006.229.06:22:20.55#ibcon#about to read 4, iclass 24, count 0 2006.229.06:22:20.55#ibcon#read 4, iclass 24, count 0 2006.229.06:22:20.55#ibcon#about to read 5, iclass 24, count 0 2006.229.06:22:20.55#ibcon#read 5, iclass 24, count 0 2006.229.06:22:20.55#ibcon#about to read 6, iclass 24, count 0 2006.229.06:22:20.55#ibcon#read 6, iclass 24, count 0 2006.229.06:22:20.55#ibcon#end of sib2, iclass 24, count 0 2006.229.06:22:20.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:22:20.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:22:20.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:22:20.55#ibcon#*before write, iclass 24, count 0 2006.229.06:22:20.55#ibcon#enter sib2, iclass 24, count 0 2006.229.06:22:20.55#ibcon#flushed, iclass 24, count 0 2006.229.06:22:20.55#ibcon#about to write, iclass 24, count 0 2006.229.06:22:20.55#ibcon#wrote, iclass 24, count 0 2006.229.06:22:20.55#ibcon#about to read 3, iclass 24, count 0 2006.229.06:22:20.59#ibcon#read 3, iclass 24, count 0 2006.229.06:22:20.59#ibcon#about to read 4, iclass 24, count 0 2006.229.06:22:20.59#ibcon#read 4, iclass 24, count 0 2006.229.06:22:20.59#ibcon#about to read 5, iclass 24, count 0 2006.229.06:22:20.59#ibcon#read 5, iclass 24, count 0 2006.229.06:22:20.59#ibcon#about to read 6, iclass 24, count 0 2006.229.06:22:20.59#ibcon#read 6, iclass 24, count 0 2006.229.06:22:20.59#ibcon#end of sib2, iclass 24, count 0 2006.229.06:22:20.59#ibcon#*after write, iclass 24, count 0 2006.229.06:22:20.59#ibcon#*before return 0, iclass 24, count 0 2006.229.06:22:20.59#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:20.59#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:20.59#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:22:20.59#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:22:20.59$vck44/va=2,7 2006.229.06:22:20.59#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.06:22:20.59#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.06:22:20.59#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:20.59#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:20.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:20.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:20.65#ibcon#enter wrdev, iclass 26, count 2 2006.229.06:22:20.65#ibcon#first serial, iclass 26, count 2 2006.229.06:22:20.65#ibcon#enter sib2, iclass 26, count 2 2006.229.06:22:20.65#ibcon#flushed, iclass 26, count 2 2006.229.06:22:20.65#ibcon#about to write, iclass 26, count 2 2006.229.06:22:20.65#ibcon#wrote, iclass 26, count 2 2006.229.06:22:20.65#ibcon#about to read 3, iclass 26, count 2 2006.229.06:22:20.67#ibcon#read 3, iclass 26, count 2 2006.229.06:22:20.67#ibcon#about to read 4, iclass 26, count 2 2006.229.06:22:20.67#ibcon#read 4, iclass 26, count 2 2006.229.06:22:20.67#ibcon#about to read 5, iclass 26, count 2 2006.229.06:22:20.67#ibcon#read 5, iclass 26, count 2 2006.229.06:22:20.67#ibcon#about to read 6, iclass 26, count 2 2006.229.06:22:20.67#ibcon#read 6, iclass 26, count 2 2006.229.06:22:20.67#ibcon#end of sib2, iclass 26, count 2 2006.229.06:22:20.67#ibcon#*mode == 0, iclass 26, count 2 2006.229.06:22:20.67#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.06:22:20.67#ibcon#[25=AT02-07\r\n] 2006.229.06:22:20.67#ibcon#*before write, iclass 26, count 2 2006.229.06:22:20.67#ibcon#enter sib2, iclass 26, count 2 2006.229.06:22:20.67#ibcon#flushed, iclass 26, count 2 2006.229.06:22:20.67#ibcon#about to write, iclass 26, count 2 2006.229.06:22:20.67#ibcon#wrote, iclass 26, count 2 2006.229.06:22:20.67#ibcon#about to read 3, iclass 26, count 2 2006.229.06:22:20.70#ibcon#read 3, iclass 26, count 2 2006.229.06:22:20.70#ibcon#about to read 4, iclass 26, count 2 2006.229.06:22:20.70#ibcon#read 4, iclass 26, count 2 2006.229.06:22:20.70#ibcon#about to read 5, iclass 26, count 2 2006.229.06:22:20.70#ibcon#read 5, iclass 26, count 2 2006.229.06:22:20.70#ibcon#about to read 6, iclass 26, count 2 2006.229.06:22:20.70#ibcon#read 6, iclass 26, count 2 2006.229.06:22:20.70#ibcon#end of sib2, iclass 26, count 2 2006.229.06:22:20.70#ibcon#*after write, iclass 26, count 2 2006.229.06:22:20.70#ibcon#*before return 0, iclass 26, count 2 2006.229.06:22:20.70#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:20.70#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:20.70#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.06:22:20.70#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:20.70#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:20.82#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:20.82#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:20.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:22:20.82#ibcon#first serial, iclass 26, count 0 2006.229.06:22:20.82#ibcon#enter sib2, iclass 26, count 0 2006.229.06:22:20.82#ibcon#flushed, iclass 26, count 0 2006.229.06:22:20.82#ibcon#about to write, iclass 26, count 0 2006.229.06:22:20.82#ibcon#wrote, iclass 26, count 0 2006.229.06:22:20.82#ibcon#about to read 3, iclass 26, count 0 2006.229.06:22:20.84#ibcon#read 3, iclass 26, count 0 2006.229.06:22:20.84#ibcon#about to read 4, iclass 26, count 0 2006.229.06:22:20.84#ibcon#read 4, iclass 26, count 0 2006.229.06:22:20.84#ibcon#about to read 5, iclass 26, count 0 2006.229.06:22:20.84#ibcon#read 5, iclass 26, count 0 2006.229.06:22:20.84#ibcon#about to read 6, iclass 26, count 0 2006.229.06:22:20.84#ibcon#read 6, iclass 26, count 0 2006.229.06:22:20.84#ibcon#end of sib2, iclass 26, count 0 2006.229.06:22:20.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:22:20.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:22:20.84#ibcon#[25=USB\r\n] 2006.229.06:22:20.84#ibcon#*before write, iclass 26, count 0 2006.229.06:22:20.84#ibcon#enter sib2, iclass 26, count 0 2006.229.06:22:20.84#ibcon#flushed, iclass 26, count 0 2006.229.06:22:20.84#ibcon#about to write, iclass 26, count 0 2006.229.06:22:20.84#ibcon#wrote, iclass 26, count 0 2006.229.06:22:20.84#ibcon#about to read 3, iclass 26, count 0 2006.229.06:22:20.87#ibcon#read 3, iclass 26, count 0 2006.229.06:22:20.87#ibcon#about to read 4, iclass 26, count 0 2006.229.06:22:20.87#ibcon#read 4, iclass 26, count 0 2006.229.06:22:20.87#ibcon#about to read 5, iclass 26, count 0 2006.229.06:22:20.87#ibcon#read 5, iclass 26, count 0 2006.229.06:22:20.87#ibcon#about to read 6, iclass 26, count 0 2006.229.06:22:20.87#ibcon#read 6, iclass 26, count 0 2006.229.06:22:20.87#ibcon#end of sib2, iclass 26, count 0 2006.229.06:22:20.87#ibcon#*after write, iclass 26, count 0 2006.229.06:22:20.87#ibcon#*before return 0, iclass 26, count 0 2006.229.06:22:20.87#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:20.87#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:20.87#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:22:20.87#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:22:20.87$vck44/valo=3,564.99 2006.229.06:22:20.87#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.06:22:20.87#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.06:22:20.87#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:20.87#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:20.87#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:20.87#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:20.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:22:20.87#ibcon#first serial, iclass 28, count 0 2006.229.06:22:20.87#ibcon#enter sib2, iclass 28, count 0 2006.229.06:22:20.87#ibcon#flushed, iclass 28, count 0 2006.229.06:22:20.87#ibcon#about to write, iclass 28, count 0 2006.229.06:22:20.87#ibcon#wrote, iclass 28, count 0 2006.229.06:22:20.87#ibcon#about to read 3, iclass 28, count 0 2006.229.06:22:20.89#ibcon#read 3, iclass 28, count 0 2006.229.06:22:20.89#ibcon#about to read 4, iclass 28, count 0 2006.229.06:22:20.89#ibcon#read 4, iclass 28, count 0 2006.229.06:22:20.89#ibcon#about to read 5, iclass 28, count 0 2006.229.06:22:20.89#ibcon#read 5, iclass 28, count 0 2006.229.06:22:20.89#ibcon#about to read 6, iclass 28, count 0 2006.229.06:22:20.89#ibcon#read 6, iclass 28, count 0 2006.229.06:22:20.89#ibcon#end of sib2, iclass 28, count 0 2006.229.06:22:20.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:22:20.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:22:20.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:22:20.89#ibcon#*before write, iclass 28, count 0 2006.229.06:22:20.89#ibcon#enter sib2, iclass 28, count 0 2006.229.06:22:20.89#ibcon#flushed, iclass 28, count 0 2006.229.06:22:20.89#ibcon#about to write, iclass 28, count 0 2006.229.06:22:20.89#ibcon#wrote, iclass 28, count 0 2006.229.06:22:20.89#ibcon#about to read 3, iclass 28, count 0 2006.229.06:22:20.93#ibcon#read 3, iclass 28, count 0 2006.229.06:22:20.93#ibcon#about to read 4, iclass 28, count 0 2006.229.06:22:20.93#ibcon#read 4, iclass 28, count 0 2006.229.06:22:20.93#ibcon#about to read 5, iclass 28, count 0 2006.229.06:22:20.93#ibcon#read 5, iclass 28, count 0 2006.229.06:22:20.93#ibcon#about to read 6, iclass 28, count 0 2006.229.06:22:20.93#ibcon#read 6, iclass 28, count 0 2006.229.06:22:20.93#ibcon#end of sib2, iclass 28, count 0 2006.229.06:22:20.93#ibcon#*after write, iclass 28, count 0 2006.229.06:22:20.93#ibcon#*before return 0, iclass 28, count 0 2006.229.06:22:20.93#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:20.93#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:20.93#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:22:20.93#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:22:20.93$vck44/va=3,6 2006.229.06:22:20.93#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.06:22:20.93#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.06:22:20.93#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:20.93#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:20.99#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:20.99#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:20.99#ibcon#enter wrdev, iclass 30, count 2 2006.229.06:22:20.99#ibcon#first serial, iclass 30, count 2 2006.229.06:22:20.99#ibcon#enter sib2, iclass 30, count 2 2006.229.06:22:20.99#ibcon#flushed, iclass 30, count 2 2006.229.06:22:20.99#ibcon#about to write, iclass 30, count 2 2006.229.06:22:20.99#ibcon#wrote, iclass 30, count 2 2006.229.06:22:20.99#ibcon#about to read 3, iclass 30, count 2 2006.229.06:22:21.01#ibcon#read 3, iclass 30, count 2 2006.229.06:22:21.01#ibcon#about to read 4, iclass 30, count 2 2006.229.06:22:21.01#ibcon#read 4, iclass 30, count 2 2006.229.06:22:21.01#ibcon#about to read 5, iclass 30, count 2 2006.229.06:22:21.01#ibcon#read 5, iclass 30, count 2 2006.229.06:22:21.01#ibcon#about to read 6, iclass 30, count 2 2006.229.06:22:21.01#ibcon#read 6, iclass 30, count 2 2006.229.06:22:21.01#ibcon#end of sib2, iclass 30, count 2 2006.229.06:22:21.01#ibcon#*mode == 0, iclass 30, count 2 2006.229.06:22:21.01#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.06:22:21.01#ibcon#[25=AT03-06\r\n] 2006.229.06:22:21.01#ibcon#*before write, iclass 30, count 2 2006.229.06:22:21.01#ibcon#enter sib2, iclass 30, count 2 2006.229.06:22:21.01#ibcon#flushed, iclass 30, count 2 2006.229.06:22:21.01#ibcon#about to write, iclass 30, count 2 2006.229.06:22:21.01#ibcon#wrote, iclass 30, count 2 2006.229.06:22:21.01#ibcon#about to read 3, iclass 30, count 2 2006.229.06:22:21.04#ibcon#read 3, iclass 30, count 2 2006.229.06:22:21.04#ibcon#about to read 4, iclass 30, count 2 2006.229.06:22:21.04#ibcon#read 4, iclass 30, count 2 2006.229.06:22:21.04#ibcon#about to read 5, iclass 30, count 2 2006.229.06:22:21.04#ibcon#read 5, iclass 30, count 2 2006.229.06:22:21.04#ibcon#about to read 6, iclass 30, count 2 2006.229.06:22:21.04#ibcon#read 6, iclass 30, count 2 2006.229.06:22:21.04#ibcon#end of sib2, iclass 30, count 2 2006.229.06:22:21.04#ibcon#*after write, iclass 30, count 2 2006.229.06:22:21.04#ibcon#*before return 0, iclass 30, count 2 2006.229.06:22:21.04#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:21.04#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:21.04#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.06:22:21.04#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:21.04#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:21.16#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:21.16#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:21.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:22:21.16#ibcon#first serial, iclass 30, count 0 2006.229.06:22:21.16#ibcon#enter sib2, iclass 30, count 0 2006.229.06:22:21.16#ibcon#flushed, iclass 30, count 0 2006.229.06:22:21.16#ibcon#about to write, iclass 30, count 0 2006.229.06:22:21.16#ibcon#wrote, iclass 30, count 0 2006.229.06:22:21.16#ibcon#about to read 3, iclass 30, count 0 2006.229.06:22:21.18#ibcon#read 3, iclass 30, count 0 2006.229.06:22:21.18#ibcon#about to read 4, iclass 30, count 0 2006.229.06:22:21.18#ibcon#read 4, iclass 30, count 0 2006.229.06:22:21.18#ibcon#about to read 5, iclass 30, count 0 2006.229.06:22:21.18#ibcon#read 5, iclass 30, count 0 2006.229.06:22:21.18#ibcon#about to read 6, iclass 30, count 0 2006.229.06:22:21.18#ibcon#read 6, iclass 30, count 0 2006.229.06:22:21.18#ibcon#end of sib2, iclass 30, count 0 2006.229.06:22:21.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:22:21.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:22:21.18#ibcon#[25=USB\r\n] 2006.229.06:22:21.18#ibcon#*before write, iclass 30, count 0 2006.229.06:22:21.18#ibcon#enter sib2, iclass 30, count 0 2006.229.06:22:21.18#ibcon#flushed, iclass 30, count 0 2006.229.06:22:21.18#ibcon#about to write, iclass 30, count 0 2006.229.06:22:21.18#ibcon#wrote, iclass 30, count 0 2006.229.06:22:21.18#ibcon#about to read 3, iclass 30, count 0 2006.229.06:22:21.21#ibcon#read 3, iclass 30, count 0 2006.229.06:22:21.21#ibcon#about to read 4, iclass 30, count 0 2006.229.06:22:21.21#ibcon#read 4, iclass 30, count 0 2006.229.06:22:21.21#ibcon#about to read 5, iclass 30, count 0 2006.229.06:22:21.21#ibcon#read 5, iclass 30, count 0 2006.229.06:22:21.21#ibcon#about to read 6, iclass 30, count 0 2006.229.06:22:21.21#ibcon#read 6, iclass 30, count 0 2006.229.06:22:21.21#ibcon#end of sib2, iclass 30, count 0 2006.229.06:22:21.21#ibcon#*after write, iclass 30, count 0 2006.229.06:22:21.21#ibcon#*before return 0, iclass 30, count 0 2006.229.06:22:21.21#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:21.21#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:21.21#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:22:21.21#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:22:21.21$vck44/valo=4,624.99 2006.229.06:22:21.21#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.06:22:21.21#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.06:22:21.21#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:21.21#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:21.21#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:21.21#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:21.21#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:22:21.21#ibcon#first serial, iclass 32, count 0 2006.229.06:22:21.21#ibcon#enter sib2, iclass 32, count 0 2006.229.06:22:21.21#ibcon#flushed, iclass 32, count 0 2006.229.06:22:21.21#ibcon#about to write, iclass 32, count 0 2006.229.06:22:21.21#ibcon#wrote, iclass 32, count 0 2006.229.06:22:21.21#ibcon#about to read 3, iclass 32, count 0 2006.229.06:22:21.23#ibcon#read 3, iclass 32, count 0 2006.229.06:22:21.23#ibcon#about to read 4, iclass 32, count 0 2006.229.06:22:21.23#ibcon#read 4, iclass 32, count 0 2006.229.06:22:21.23#ibcon#about to read 5, iclass 32, count 0 2006.229.06:22:21.23#ibcon#read 5, iclass 32, count 0 2006.229.06:22:21.23#ibcon#about to read 6, iclass 32, count 0 2006.229.06:22:21.23#ibcon#read 6, iclass 32, count 0 2006.229.06:22:21.23#ibcon#end of sib2, iclass 32, count 0 2006.229.06:22:21.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:22:21.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:22:21.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:22:21.23#ibcon#*before write, iclass 32, count 0 2006.229.06:22:21.23#ibcon#enter sib2, iclass 32, count 0 2006.229.06:22:21.23#ibcon#flushed, iclass 32, count 0 2006.229.06:22:21.23#ibcon#about to write, iclass 32, count 0 2006.229.06:22:21.23#ibcon#wrote, iclass 32, count 0 2006.229.06:22:21.23#ibcon#about to read 3, iclass 32, count 0 2006.229.06:22:21.27#ibcon#read 3, iclass 32, count 0 2006.229.06:22:21.27#ibcon#about to read 4, iclass 32, count 0 2006.229.06:22:21.27#ibcon#read 4, iclass 32, count 0 2006.229.06:22:21.27#ibcon#about to read 5, iclass 32, count 0 2006.229.06:22:21.27#ibcon#read 5, iclass 32, count 0 2006.229.06:22:21.27#ibcon#about to read 6, iclass 32, count 0 2006.229.06:22:21.27#ibcon#read 6, iclass 32, count 0 2006.229.06:22:21.27#ibcon#end of sib2, iclass 32, count 0 2006.229.06:22:21.27#ibcon#*after write, iclass 32, count 0 2006.229.06:22:21.27#ibcon#*before return 0, iclass 32, count 0 2006.229.06:22:21.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:21.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:21.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:22:21.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:22:21.27$vck44/va=4,7 2006.229.06:22:21.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:22:21.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:22:21.27#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:21.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:21.33#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:21.33#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:21.33#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:22:21.33#ibcon#first serial, iclass 34, count 2 2006.229.06:22:21.33#ibcon#enter sib2, iclass 34, count 2 2006.229.06:22:21.33#ibcon#flushed, iclass 34, count 2 2006.229.06:22:21.33#ibcon#about to write, iclass 34, count 2 2006.229.06:22:21.33#ibcon#wrote, iclass 34, count 2 2006.229.06:22:21.33#ibcon#about to read 3, iclass 34, count 2 2006.229.06:22:21.35#ibcon#read 3, iclass 34, count 2 2006.229.06:22:21.35#ibcon#about to read 4, iclass 34, count 2 2006.229.06:22:21.35#ibcon#read 4, iclass 34, count 2 2006.229.06:22:21.35#ibcon#about to read 5, iclass 34, count 2 2006.229.06:22:21.35#ibcon#read 5, iclass 34, count 2 2006.229.06:22:21.35#ibcon#about to read 6, iclass 34, count 2 2006.229.06:22:21.35#ibcon#read 6, iclass 34, count 2 2006.229.06:22:21.35#ibcon#end of sib2, iclass 34, count 2 2006.229.06:22:21.35#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:22:21.35#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:22:21.35#ibcon#[25=AT04-07\r\n] 2006.229.06:22:21.35#ibcon#*before write, iclass 34, count 2 2006.229.06:22:21.35#ibcon#enter sib2, iclass 34, count 2 2006.229.06:22:21.35#ibcon#flushed, iclass 34, count 2 2006.229.06:22:21.35#ibcon#about to write, iclass 34, count 2 2006.229.06:22:21.35#ibcon#wrote, iclass 34, count 2 2006.229.06:22:21.35#ibcon#about to read 3, iclass 34, count 2 2006.229.06:22:21.38#ibcon#read 3, iclass 34, count 2 2006.229.06:22:21.38#ibcon#about to read 4, iclass 34, count 2 2006.229.06:22:21.38#ibcon#read 4, iclass 34, count 2 2006.229.06:22:21.38#ibcon#about to read 5, iclass 34, count 2 2006.229.06:22:21.38#ibcon#read 5, iclass 34, count 2 2006.229.06:22:21.38#ibcon#about to read 6, iclass 34, count 2 2006.229.06:22:21.38#ibcon#read 6, iclass 34, count 2 2006.229.06:22:21.38#ibcon#end of sib2, iclass 34, count 2 2006.229.06:22:21.38#ibcon#*after write, iclass 34, count 2 2006.229.06:22:21.38#ibcon#*before return 0, iclass 34, count 2 2006.229.06:22:21.38#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:21.38#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:21.38#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:22:21.38#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:21.38#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:21.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:21.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:21.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:22:21.50#ibcon#first serial, iclass 34, count 0 2006.229.06:22:21.50#ibcon#enter sib2, iclass 34, count 0 2006.229.06:22:21.50#ibcon#flushed, iclass 34, count 0 2006.229.06:22:21.50#ibcon#about to write, iclass 34, count 0 2006.229.06:22:21.50#ibcon#wrote, iclass 34, count 0 2006.229.06:22:21.50#ibcon#about to read 3, iclass 34, count 0 2006.229.06:22:21.52#ibcon#read 3, iclass 34, count 0 2006.229.06:22:21.52#ibcon#about to read 4, iclass 34, count 0 2006.229.06:22:21.52#ibcon#read 4, iclass 34, count 0 2006.229.06:22:21.52#ibcon#about to read 5, iclass 34, count 0 2006.229.06:22:21.52#ibcon#read 5, iclass 34, count 0 2006.229.06:22:21.52#ibcon#about to read 6, iclass 34, count 0 2006.229.06:22:21.52#ibcon#read 6, iclass 34, count 0 2006.229.06:22:21.52#ibcon#end of sib2, iclass 34, count 0 2006.229.06:22:21.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:22:21.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:22:21.52#ibcon#[25=USB\r\n] 2006.229.06:22:21.52#ibcon#*before write, iclass 34, count 0 2006.229.06:22:21.52#ibcon#enter sib2, iclass 34, count 0 2006.229.06:22:21.52#ibcon#flushed, iclass 34, count 0 2006.229.06:22:21.52#ibcon#about to write, iclass 34, count 0 2006.229.06:22:21.52#ibcon#wrote, iclass 34, count 0 2006.229.06:22:21.52#ibcon#about to read 3, iclass 34, count 0 2006.229.06:22:21.55#ibcon#read 3, iclass 34, count 0 2006.229.06:22:21.55#ibcon#about to read 4, iclass 34, count 0 2006.229.06:22:21.55#ibcon#read 4, iclass 34, count 0 2006.229.06:22:21.55#ibcon#about to read 5, iclass 34, count 0 2006.229.06:22:21.55#ibcon#read 5, iclass 34, count 0 2006.229.06:22:21.55#ibcon#about to read 6, iclass 34, count 0 2006.229.06:22:21.55#ibcon#read 6, iclass 34, count 0 2006.229.06:22:21.55#ibcon#end of sib2, iclass 34, count 0 2006.229.06:22:21.55#ibcon#*after write, iclass 34, count 0 2006.229.06:22:21.55#ibcon#*before return 0, iclass 34, count 0 2006.229.06:22:21.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:21.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:21.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:22:21.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:22:21.55$vck44/valo=5,734.99 2006.229.06:22:21.55#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.06:22:21.55#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.06:22:21.55#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:21.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:22:21.55#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:22:21.55#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:22:21.55#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:22:21.55#ibcon#first serial, iclass 37, count 0 2006.229.06:22:21.55#ibcon#enter sib2, iclass 37, count 0 2006.229.06:22:21.55#ibcon#flushed, iclass 37, count 0 2006.229.06:22:21.55#ibcon#about to write, iclass 37, count 0 2006.229.06:22:21.55#ibcon#wrote, iclass 37, count 0 2006.229.06:22:21.55#ibcon#about to read 3, iclass 37, count 0 2006.229.06:22:21.57#ibcon#read 3, iclass 37, count 0 2006.229.06:22:21.57#ibcon#about to read 4, iclass 37, count 0 2006.229.06:22:21.57#ibcon#read 4, iclass 37, count 0 2006.229.06:22:21.57#ibcon#about to read 5, iclass 37, count 0 2006.229.06:22:21.57#ibcon#read 5, iclass 37, count 0 2006.229.06:22:21.57#ibcon#about to read 6, iclass 37, count 0 2006.229.06:22:21.57#ibcon#read 6, iclass 37, count 0 2006.229.06:22:21.57#ibcon#end of sib2, iclass 37, count 0 2006.229.06:22:21.57#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:22:21.57#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:22:21.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:22:21.57#ibcon#*before write, iclass 37, count 0 2006.229.06:22:21.57#ibcon#enter sib2, iclass 37, count 0 2006.229.06:22:21.57#ibcon#flushed, iclass 37, count 0 2006.229.06:22:21.57#ibcon#about to write, iclass 37, count 0 2006.229.06:22:21.57#ibcon#wrote, iclass 37, count 0 2006.229.06:22:21.57#ibcon#about to read 3, iclass 37, count 0 2006.229.06:22:21.57#abcon#<5=/05 2.7 5.4 30.46 91 999.4\r\n> 2006.229.06:22:21.59#abcon#{5=INTERFACE CLEAR} 2006.229.06:22:21.61#ibcon#read 3, iclass 37, count 0 2006.229.06:22:21.61#ibcon#about to read 4, iclass 37, count 0 2006.229.06:22:21.61#ibcon#read 4, iclass 37, count 0 2006.229.06:22:21.61#ibcon#about to read 5, iclass 37, count 0 2006.229.06:22:21.61#ibcon#read 5, iclass 37, count 0 2006.229.06:22:21.61#ibcon#about to read 6, iclass 37, count 0 2006.229.06:22:21.61#ibcon#read 6, iclass 37, count 0 2006.229.06:22:21.61#ibcon#end of sib2, iclass 37, count 0 2006.229.06:22:21.61#ibcon#*after write, iclass 37, count 0 2006.229.06:22:21.61#ibcon#*before return 0, iclass 37, count 0 2006.229.06:22:21.61#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:22:21.61#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:22:21.61#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:22:21.61#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:22:21.61$vck44/va=5,4 2006.229.06:22:21.61#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:22:21.61#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:22:21.61#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:21.61#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:22:21.65#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:22:21.67#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:22:21.67#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:22:21.67#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:22:21.67#ibcon#first serial, iclass 3, count 2 2006.229.06:22:21.67#ibcon#enter sib2, iclass 3, count 2 2006.229.06:22:21.67#ibcon#flushed, iclass 3, count 2 2006.229.06:22:21.67#ibcon#about to write, iclass 3, count 2 2006.229.06:22:21.67#ibcon#wrote, iclass 3, count 2 2006.229.06:22:21.67#ibcon#about to read 3, iclass 3, count 2 2006.229.06:22:21.69#ibcon#read 3, iclass 3, count 2 2006.229.06:22:21.69#ibcon#about to read 4, iclass 3, count 2 2006.229.06:22:21.69#ibcon#read 4, iclass 3, count 2 2006.229.06:22:21.69#ibcon#about to read 5, iclass 3, count 2 2006.229.06:22:21.69#ibcon#read 5, iclass 3, count 2 2006.229.06:22:21.69#ibcon#about to read 6, iclass 3, count 2 2006.229.06:22:21.69#ibcon#read 6, iclass 3, count 2 2006.229.06:22:21.69#ibcon#end of sib2, iclass 3, count 2 2006.229.06:22:21.69#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:22:21.69#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:22:21.69#ibcon#[25=AT05-04\r\n] 2006.229.06:22:21.69#ibcon#*before write, iclass 3, count 2 2006.229.06:22:21.69#ibcon#enter sib2, iclass 3, count 2 2006.229.06:22:21.69#ibcon#flushed, iclass 3, count 2 2006.229.06:22:21.69#ibcon#about to write, iclass 3, count 2 2006.229.06:22:21.69#ibcon#wrote, iclass 3, count 2 2006.229.06:22:21.69#ibcon#about to read 3, iclass 3, count 2 2006.229.06:22:21.72#ibcon#read 3, iclass 3, count 2 2006.229.06:22:21.72#ibcon#about to read 4, iclass 3, count 2 2006.229.06:22:21.72#ibcon#read 4, iclass 3, count 2 2006.229.06:22:21.72#ibcon#about to read 5, iclass 3, count 2 2006.229.06:22:21.72#ibcon#read 5, iclass 3, count 2 2006.229.06:22:21.72#ibcon#about to read 6, iclass 3, count 2 2006.229.06:22:21.72#ibcon#read 6, iclass 3, count 2 2006.229.06:22:21.72#ibcon#end of sib2, iclass 3, count 2 2006.229.06:22:21.72#ibcon#*after write, iclass 3, count 2 2006.229.06:22:21.72#ibcon#*before return 0, iclass 3, count 2 2006.229.06:22:21.72#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:22:21.72#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:22:21.72#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:22:21.72#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:21.72#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:22:21.84#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:22:21.84#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:22:21.84#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:22:21.84#ibcon#first serial, iclass 3, count 0 2006.229.06:22:21.84#ibcon#enter sib2, iclass 3, count 0 2006.229.06:22:21.84#ibcon#flushed, iclass 3, count 0 2006.229.06:22:21.84#ibcon#about to write, iclass 3, count 0 2006.229.06:22:21.84#ibcon#wrote, iclass 3, count 0 2006.229.06:22:21.84#ibcon#about to read 3, iclass 3, count 0 2006.229.06:22:21.86#ibcon#read 3, iclass 3, count 0 2006.229.06:22:21.86#ibcon#about to read 4, iclass 3, count 0 2006.229.06:22:21.86#ibcon#read 4, iclass 3, count 0 2006.229.06:22:21.86#ibcon#about to read 5, iclass 3, count 0 2006.229.06:22:21.86#ibcon#read 5, iclass 3, count 0 2006.229.06:22:21.86#ibcon#about to read 6, iclass 3, count 0 2006.229.06:22:21.86#ibcon#read 6, iclass 3, count 0 2006.229.06:22:21.86#ibcon#end of sib2, iclass 3, count 0 2006.229.06:22:21.86#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:22:21.86#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:22:21.86#ibcon#[25=USB\r\n] 2006.229.06:22:21.86#ibcon#*before write, iclass 3, count 0 2006.229.06:22:21.86#ibcon#enter sib2, iclass 3, count 0 2006.229.06:22:21.86#ibcon#flushed, iclass 3, count 0 2006.229.06:22:21.86#ibcon#about to write, iclass 3, count 0 2006.229.06:22:21.86#ibcon#wrote, iclass 3, count 0 2006.229.06:22:21.86#ibcon#about to read 3, iclass 3, count 0 2006.229.06:22:21.89#ibcon#read 3, iclass 3, count 0 2006.229.06:22:21.89#ibcon#about to read 4, iclass 3, count 0 2006.229.06:22:21.89#ibcon#read 4, iclass 3, count 0 2006.229.06:22:21.89#ibcon#about to read 5, iclass 3, count 0 2006.229.06:22:21.89#ibcon#read 5, iclass 3, count 0 2006.229.06:22:21.89#ibcon#about to read 6, iclass 3, count 0 2006.229.06:22:21.89#ibcon#read 6, iclass 3, count 0 2006.229.06:22:21.89#ibcon#end of sib2, iclass 3, count 0 2006.229.06:22:21.89#ibcon#*after write, iclass 3, count 0 2006.229.06:22:21.89#ibcon#*before return 0, iclass 3, count 0 2006.229.06:22:21.89#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:22:21.89#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:22:21.89#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:22:21.89#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:22:21.89$vck44/valo=6,814.99 2006.229.06:22:21.89#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:22:21.89#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:22:21.89#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:21.89#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:21.89#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:21.89#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:21.89#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:22:21.89#ibcon#first serial, iclass 6, count 0 2006.229.06:22:21.89#ibcon#enter sib2, iclass 6, count 0 2006.229.06:22:21.89#ibcon#flushed, iclass 6, count 0 2006.229.06:22:21.89#ibcon#about to write, iclass 6, count 0 2006.229.06:22:21.89#ibcon#wrote, iclass 6, count 0 2006.229.06:22:21.89#ibcon#about to read 3, iclass 6, count 0 2006.229.06:22:21.91#ibcon#read 3, iclass 6, count 0 2006.229.06:22:21.91#ibcon#about to read 4, iclass 6, count 0 2006.229.06:22:21.91#ibcon#read 4, iclass 6, count 0 2006.229.06:22:21.91#ibcon#about to read 5, iclass 6, count 0 2006.229.06:22:21.91#ibcon#read 5, iclass 6, count 0 2006.229.06:22:21.91#ibcon#about to read 6, iclass 6, count 0 2006.229.06:22:21.91#ibcon#read 6, iclass 6, count 0 2006.229.06:22:21.91#ibcon#end of sib2, iclass 6, count 0 2006.229.06:22:21.91#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:22:21.91#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:22:21.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:22:21.91#ibcon#*before write, iclass 6, count 0 2006.229.06:22:21.91#ibcon#enter sib2, iclass 6, count 0 2006.229.06:22:21.91#ibcon#flushed, iclass 6, count 0 2006.229.06:22:21.91#ibcon#about to write, iclass 6, count 0 2006.229.06:22:21.91#ibcon#wrote, iclass 6, count 0 2006.229.06:22:21.91#ibcon#about to read 3, iclass 6, count 0 2006.229.06:22:21.95#ibcon#read 3, iclass 6, count 0 2006.229.06:22:21.95#ibcon#about to read 4, iclass 6, count 0 2006.229.06:22:21.95#ibcon#read 4, iclass 6, count 0 2006.229.06:22:21.95#ibcon#about to read 5, iclass 6, count 0 2006.229.06:22:21.95#ibcon#read 5, iclass 6, count 0 2006.229.06:22:21.95#ibcon#about to read 6, iclass 6, count 0 2006.229.06:22:21.95#ibcon#read 6, iclass 6, count 0 2006.229.06:22:21.95#ibcon#end of sib2, iclass 6, count 0 2006.229.06:22:21.95#ibcon#*after write, iclass 6, count 0 2006.229.06:22:21.95#ibcon#*before return 0, iclass 6, count 0 2006.229.06:22:21.95#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:21.95#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:21.95#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:22:21.95#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:22:21.95$vck44/va=6,4 2006.229.06:22:21.95#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.06:22:21.95#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.06:22:21.95#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:21.95#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:22.01#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:22.01#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:22.01#ibcon#enter wrdev, iclass 10, count 2 2006.229.06:22:22.01#ibcon#first serial, iclass 10, count 2 2006.229.06:22:22.01#ibcon#enter sib2, iclass 10, count 2 2006.229.06:22:22.01#ibcon#flushed, iclass 10, count 2 2006.229.06:22:22.01#ibcon#about to write, iclass 10, count 2 2006.229.06:22:22.01#ibcon#wrote, iclass 10, count 2 2006.229.06:22:22.01#ibcon#about to read 3, iclass 10, count 2 2006.229.06:22:22.03#ibcon#read 3, iclass 10, count 2 2006.229.06:22:22.03#ibcon#about to read 4, iclass 10, count 2 2006.229.06:22:22.03#ibcon#read 4, iclass 10, count 2 2006.229.06:22:22.03#ibcon#about to read 5, iclass 10, count 2 2006.229.06:22:22.03#ibcon#read 5, iclass 10, count 2 2006.229.06:22:22.03#ibcon#about to read 6, iclass 10, count 2 2006.229.06:22:22.03#ibcon#read 6, iclass 10, count 2 2006.229.06:22:22.03#ibcon#end of sib2, iclass 10, count 2 2006.229.06:22:22.03#ibcon#*mode == 0, iclass 10, count 2 2006.229.06:22:22.03#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.06:22:22.03#ibcon#[25=AT06-04\r\n] 2006.229.06:22:22.03#ibcon#*before write, iclass 10, count 2 2006.229.06:22:22.03#ibcon#enter sib2, iclass 10, count 2 2006.229.06:22:22.03#ibcon#flushed, iclass 10, count 2 2006.229.06:22:22.03#ibcon#about to write, iclass 10, count 2 2006.229.06:22:22.03#ibcon#wrote, iclass 10, count 2 2006.229.06:22:22.03#ibcon#about to read 3, iclass 10, count 2 2006.229.06:22:22.06#ibcon#read 3, iclass 10, count 2 2006.229.06:22:22.06#ibcon#about to read 4, iclass 10, count 2 2006.229.06:22:22.06#ibcon#read 4, iclass 10, count 2 2006.229.06:22:22.06#ibcon#about to read 5, iclass 10, count 2 2006.229.06:22:22.06#ibcon#read 5, iclass 10, count 2 2006.229.06:22:22.06#ibcon#about to read 6, iclass 10, count 2 2006.229.06:22:22.06#ibcon#read 6, iclass 10, count 2 2006.229.06:22:22.06#ibcon#end of sib2, iclass 10, count 2 2006.229.06:22:22.06#ibcon#*after write, iclass 10, count 2 2006.229.06:22:22.06#ibcon#*before return 0, iclass 10, count 2 2006.229.06:22:22.06#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:22.06#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:22.06#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.06:22:22.06#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:22.06#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:22.18#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:22.18#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:22.18#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:22:22.18#ibcon#first serial, iclass 10, count 0 2006.229.06:22:22.18#ibcon#enter sib2, iclass 10, count 0 2006.229.06:22:22.18#ibcon#flushed, iclass 10, count 0 2006.229.06:22:22.18#ibcon#about to write, iclass 10, count 0 2006.229.06:22:22.18#ibcon#wrote, iclass 10, count 0 2006.229.06:22:22.18#ibcon#about to read 3, iclass 10, count 0 2006.229.06:22:22.20#ibcon#read 3, iclass 10, count 0 2006.229.06:22:22.20#ibcon#about to read 4, iclass 10, count 0 2006.229.06:22:22.20#ibcon#read 4, iclass 10, count 0 2006.229.06:22:22.20#ibcon#about to read 5, iclass 10, count 0 2006.229.06:22:22.20#ibcon#read 5, iclass 10, count 0 2006.229.06:22:22.20#ibcon#about to read 6, iclass 10, count 0 2006.229.06:22:22.20#ibcon#read 6, iclass 10, count 0 2006.229.06:22:22.20#ibcon#end of sib2, iclass 10, count 0 2006.229.06:22:22.20#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:22:22.20#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:22:22.20#ibcon#[25=USB\r\n] 2006.229.06:22:22.20#ibcon#*before write, iclass 10, count 0 2006.229.06:22:22.20#ibcon#enter sib2, iclass 10, count 0 2006.229.06:22:22.20#ibcon#flushed, iclass 10, count 0 2006.229.06:22:22.20#ibcon#about to write, iclass 10, count 0 2006.229.06:22:22.20#ibcon#wrote, iclass 10, count 0 2006.229.06:22:22.20#ibcon#about to read 3, iclass 10, count 0 2006.229.06:22:22.23#ibcon#read 3, iclass 10, count 0 2006.229.06:22:22.23#ibcon#about to read 4, iclass 10, count 0 2006.229.06:22:22.23#ibcon#read 4, iclass 10, count 0 2006.229.06:22:22.23#ibcon#about to read 5, iclass 10, count 0 2006.229.06:22:22.23#ibcon#read 5, iclass 10, count 0 2006.229.06:22:22.23#ibcon#about to read 6, iclass 10, count 0 2006.229.06:22:22.23#ibcon#read 6, iclass 10, count 0 2006.229.06:22:22.23#ibcon#end of sib2, iclass 10, count 0 2006.229.06:22:22.23#ibcon#*after write, iclass 10, count 0 2006.229.06:22:22.23#ibcon#*before return 0, iclass 10, count 0 2006.229.06:22:22.23#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:22.23#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:22.23#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:22:22.23#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:22:22.23$vck44/valo=7,864.99 2006.229.06:22:22.23#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.06:22:22.23#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.06:22:22.23#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:22.23#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:22.23#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:22.23#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:22.23#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:22:22.23#ibcon#first serial, iclass 12, count 0 2006.229.06:22:22.23#ibcon#enter sib2, iclass 12, count 0 2006.229.06:22:22.23#ibcon#flushed, iclass 12, count 0 2006.229.06:22:22.23#ibcon#about to write, iclass 12, count 0 2006.229.06:22:22.23#ibcon#wrote, iclass 12, count 0 2006.229.06:22:22.23#ibcon#about to read 3, iclass 12, count 0 2006.229.06:22:22.25#ibcon#read 3, iclass 12, count 0 2006.229.06:22:22.25#ibcon#about to read 4, iclass 12, count 0 2006.229.06:22:22.25#ibcon#read 4, iclass 12, count 0 2006.229.06:22:22.25#ibcon#about to read 5, iclass 12, count 0 2006.229.06:22:22.25#ibcon#read 5, iclass 12, count 0 2006.229.06:22:22.25#ibcon#about to read 6, iclass 12, count 0 2006.229.06:22:22.25#ibcon#read 6, iclass 12, count 0 2006.229.06:22:22.25#ibcon#end of sib2, iclass 12, count 0 2006.229.06:22:22.25#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:22:22.25#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:22:22.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:22:22.25#ibcon#*before write, iclass 12, count 0 2006.229.06:22:22.25#ibcon#enter sib2, iclass 12, count 0 2006.229.06:22:22.25#ibcon#flushed, iclass 12, count 0 2006.229.06:22:22.25#ibcon#about to write, iclass 12, count 0 2006.229.06:22:22.25#ibcon#wrote, iclass 12, count 0 2006.229.06:22:22.25#ibcon#about to read 3, iclass 12, count 0 2006.229.06:22:22.29#ibcon#read 3, iclass 12, count 0 2006.229.06:22:22.29#ibcon#about to read 4, iclass 12, count 0 2006.229.06:22:22.29#ibcon#read 4, iclass 12, count 0 2006.229.06:22:22.29#ibcon#about to read 5, iclass 12, count 0 2006.229.06:22:22.29#ibcon#read 5, iclass 12, count 0 2006.229.06:22:22.29#ibcon#about to read 6, iclass 12, count 0 2006.229.06:22:22.29#ibcon#read 6, iclass 12, count 0 2006.229.06:22:22.29#ibcon#end of sib2, iclass 12, count 0 2006.229.06:22:22.29#ibcon#*after write, iclass 12, count 0 2006.229.06:22:22.29#ibcon#*before return 0, iclass 12, count 0 2006.229.06:22:22.29#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:22.29#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:22.29#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:22:22.29#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:22:22.29$vck44/va=7,5 2006.229.06:22:22.29#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.06:22:22.29#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.06:22:22.29#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:22.29#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:22.35#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:22.35#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:22.35#ibcon#enter wrdev, iclass 14, count 2 2006.229.06:22:22.35#ibcon#first serial, iclass 14, count 2 2006.229.06:22:22.35#ibcon#enter sib2, iclass 14, count 2 2006.229.06:22:22.35#ibcon#flushed, iclass 14, count 2 2006.229.06:22:22.35#ibcon#about to write, iclass 14, count 2 2006.229.06:22:22.35#ibcon#wrote, iclass 14, count 2 2006.229.06:22:22.35#ibcon#about to read 3, iclass 14, count 2 2006.229.06:22:22.37#ibcon#read 3, iclass 14, count 2 2006.229.06:22:22.37#ibcon#about to read 4, iclass 14, count 2 2006.229.06:22:22.37#ibcon#read 4, iclass 14, count 2 2006.229.06:22:22.37#ibcon#about to read 5, iclass 14, count 2 2006.229.06:22:22.37#ibcon#read 5, iclass 14, count 2 2006.229.06:22:22.37#ibcon#about to read 6, iclass 14, count 2 2006.229.06:22:22.37#ibcon#read 6, iclass 14, count 2 2006.229.06:22:22.37#ibcon#end of sib2, iclass 14, count 2 2006.229.06:22:22.37#ibcon#*mode == 0, iclass 14, count 2 2006.229.06:22:22.37#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.06:22:22.37#ibcon#[25=AT07-05\r\n] 2006.229.06:22:22.37#ibcon#*before write, iclass 14, count 2 2006.229.06:22:22.37#ibcon#enter sib2, iclass 14, count 2 2006.229.06:22:22.37#ibcon#flushed, iclass 14, count 2 2006.229.06:22:22.37#ibcon#about to write, iclass 14, count 2 2006.229.06:22:22.37#ibcon#wrote, iclass 14, count 2 2006.229.06:22:22.37#ibcon#about to read 3, iclass 14, count 2 2006.229.06:22:22.40#ibcon#read 3, iclass 14, count 2 2006.229.06:22:22.40#ibcon#about to read 4, iclass 14, count 2 2006.229.06:22:22.40#ibcon#read 4, iclass 14, count 2 2006.229.06:22:22.40#ibcon#about to read 5, iclass 14, count 2 2006.229.06:22:22.40#ibcon#read 5, iclass 14, count 2 2006.229.06:22:22.40#ibcon#about to read 6, iclass 14, count 2 2006.229.06:22:22.40#ibcon#read 6, iclass 14, count 2 2006.229.06:22:22.40#ibcon#end of sib2, iclass 14, count 2 2006.229.06:22:22.40#ibcon#*after write, iclass 14, count 2 2006.229.06:22:22.40#ibcon#*before return 0, iclass 14, count 2 2006.229.06:22:22.40#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:22.40#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:22.40#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.06:22:22.40#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:22.40#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:22.52#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:22.52#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:22.52#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:22:22.52#ibcon#first serial, iclass 14, count 0 2006.229.06:22:22.52#ibcon#enter sib2, iclass 14, count 0 2006.229.06:22:22.52#ibcon#flushed, iclass 14, count 0 2006.229.06:22:22.52#ibcon#about to write, iclass 14, count 0 2006.229.06:22:22.52#ibcon#wrote, iclass 14, count 0 2006.229.06:22:22.52#ibcon#about to read 3, iclass 14, count 0 2006.229.06:22:22.54#ibcon#read 3, iclass 14, count 0 2006.229.06:22:22.54#ibcon#about to read 4, iclass 14, count 0 2006.229.06:22:22.54#ibcon#read 4, iclass 14, count 0 2006.229.06:22:22.54#ibcon#about to read 5, iclass 14, count 0 2006.229.06:22:22.54#ibcon#read 5, iclass 14, count 0 2006.229.06:22:22.54#ibcon#about to read 6, iclass 14, count 0 2006.229.06:22:22.54#ibcon#read 6, iclass 14, count 0 2006.229.06:22:22.54#ibcon#end of sib2, iclass 14, count 0 2006.229.06:22:22.54#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:22:22.54#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:22:22.54#ibcon#[25=USB\r\n] 2006.229.06:22:22.54#ibcon#*before write, iclass 14, count 0 2006.229.06:22:22.54#ibcon#enter sib2, iclass 14, count 0 2006.229.06:22:22.54#ibcon#flushed, iclass 14, count 0 2006.229.06:22:22.54#ibcon#about to write, iclass 14, count 0 2006.229.06:22:22.54#ibcon#wrote, iclass 14, count 0 2006.229.06:22:22.54#ibcon#about to read 3, iclass 14, count 0 2006.229.06:22:22.57#ibcon#read 3, iclass 14, count 0 2006.229.06:22:22.57#ibcon#about to read 4, iclass 14, count 0 2006.229.06:22:22.57#ibcon#read 4, iclass 14, count 0 2006.229.06:22:22.57#ibcon#about to read 5, iclass 14, count 0 2006.229.06:22:22.57#ibcon#read 5, iclass 14, count 0 2006.229.06:22:22.57#ibcon#about to read 6, iclass 14, count 0 2006.229.06:22:22.57#ibcon#read 6, iclass 14, count 0 2006.229.06:22:22.57#ibcon#end of sib2, iclass 14, count 0 2006.229.06:22:22.57#ibcon#*after write, iclass 14, count 0 2006.229.06:22:22.57#ibcon#*before return 0, iclass 14, count 0 2006.229.06:22:22.57#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:22.57#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:22.57#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:22:22.57#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:22:22.57$vck44/valo=8,884.99 2006.229.06:22:22.57#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:22:22.57#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:22:22.57#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:22.57#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:22.57#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:22.57#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:22.57#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:22:22.57#ibcon#first serial, iclass 16, count 0 2006.229.06:22:22.57#ibcon#enter sib2, iclass 16, count 0 2006.229.06:22:22.57#ibcon#flushed, iclass 16, count 0 2006.229.06:22:22.57#ibcon#about to write, iclass 16, count 0 2006.229.06:22:22.57#ibcon#wrote, iclass 16, count 0 2006.229.06:22:22.57#ibcon#about to read 3, iclass 16, count 0 2006.229.06:22:22.59#ibcon#read 3, iclass 16, count 0 2006.229.06:22:22.59#ibcon#about to read 4, iclass 16, count 0 2006.229.06:22:22.59#ibcon#read 4, iclass 16, count 0 2006.229.06:22:22.59#ibcon#about to read 5, iclass 16, count 0 2006.229.06:22:22.59#ibcon#read 5, iclass 16, count 0 2006.229.06:22:22.59#ibcon#about to read 6, iclass 16, count 0 2006.229.06:22:22.59#ibcon#read 6, iclass 16, count 0 2006.229.06:22:22.59#ibcon#end of sib2, iclass 16, count 0 2006.229.06:22:22.59#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:22:22.59#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:22:22.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:22:22.59#ibcon#*before write, iclass 16, count 0 2006.229.06:22:22.59#ibcon#enter sib2, iclass 16, count 0 2006.229.06:22:22.59#ibcon#flushed, iclass 16, count 0 2006.229.06:22:22.59#ibcon#about to write, iclass 16, count 0 2006.229.06:22:22.59#ibcon#wrote, iclass 16, count 0 2006.229.06:22:22.59#ibcon#about to read 3, iclass 16, count 0 2006.229.06:22:22.63#ibcon#read 3, iclass 16, count 0 2006.229.06:22:22.63#ibcon#about to read 4, iclass 16, count 0 2006.229.06:22:22.63#ibcon#read 4, iclass 16, count 0 2006.229.06:22:22.63#ibcon#about to read 5, iclass 16, count 0 2006.229.06:22:22.63#ibcon#read 5, iclass 16, count 0 2006.229.06:22:22.63#ibcon#about to read 6, iclass 16, count 0 2006.229.06:22:22.63#ibcon#read 6, iclass 16, count 0 2006.229.06:22:22.63#ibcon#end of sib2, iclass 16, count 0 2006.229.06:22:22.63#ibcon#*after write, iclass 16, count 0 2006.229.06:22:22.63#ibcon#*before return 0, iclass 16, count 0 2006.229.06:22:22.63#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:22.63#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:22.63#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:22:22.63#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:22:22.63$vck44/va=8,6 2006.229.06:22:22.63#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.06:22:22.63#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.06:22:22.63#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:22.63#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:22:22.69#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:22:22.69#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:22:22.69#ibcon#enter wrdev, iclass 18, count 2 2006.229.06:22:22.69#ibcon#first serial, iclass 18, count 2 2006.229.06:22:22.69#ibcon#enter sib2, iclass 18, count 2 2006.229.06:22:22.69#ibcon#flushed, iclass 18, count 2 2006.229.06:22:22.69#ibcon#about to write, iclass 18, count 2 2006.229.06:22:22.69#ibcon#wrote, iclass 18, count 2 2006.229.06:22:22.69#ibcon#about to read 3, iclass 18, count 2 2006.229.06:22:22.71#ibcon#read 3, iclass 18, count 2 2006.229.06:22:22.71#ibcon#about to read 4, iclass 18, count 2 2006.229.06:22:22.71#ibcon#read 4, iclass 18, count 2 2006.229.06:22:22.71#ibcon#about to read 5, iclass 18, count 2 2006.229.06:22:22.71#ibcon#read 5, iclass 18, count 2 2006.229.06:22:22.71#ibcon#about to read 6, iclass 18, count 2 2006.229.06:22:22.71#ibcon#read 6, iclass 18, count 2 2006.229.06:22:22.71#ibcon#end of sib2, iclass 18, count 2 2006.229.06:22:22.71#ibcon#*mode == 0, iclass 18, count 2 2006.229.06:22:22.71#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.06:22:22.71#ibcon#[25=AT08-06\r\n] 2006.229.06:22:22.71#ibcon#*before write, iclass 18, count 2 2006.229.06:22:22.71#ibcon#enter sib2, iclass 18, count 2 2006.229.06:22:22.71#ibcon#flushed, iclass 18, count 2 2006.229.06:22:22.71#ibcon#about to write, iclass 18, count 2 2006.229.06:22:22.71#ibcon#wrote, iclass 18, count 2 2006.229.06:22:22.71#ibcon#about to read 3, iclass 18, count 2 2006.229.06:22:22.74#ibcon#read 3, iclass 18, count 2 2006.229.06:22:22.74#ibcon#about to read 4, iclass 18, count 2 2006.229.06:22:22.74#ibcon#read 4, iclass 18, count 2 2006.229.06:22:22.74#ibcon#about to read 5, iclass 18, count 2 2006.229.06:22:22.74#ibcon#read 5, iclass 18, count 2 2006.229.06:22:22.74#ibcon#about to read 6, iclass 18, count 2 2006.229.06:22:22.74#ibcon#read 6, iclass 18, count 2 2006.229.06:22:22.74#ibcon#end of sib2, iclass 18, count 2 2006.229.06:22:22.74#ibcon#*after write, iclass 18, count 2 2006.229.06:22:22.74#ibcon#*before return 0, iclass 18, count 2 2006.229.06:22:22.74#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:22:22.74#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:22:22.74#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.06:22:22.74#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:22.74#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:22:22.86#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:22:22.86#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:22:22.86#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:22:22.86#ibcon#first serial, iclass 18, count 0 2006.229.06:22:22.86#ibcon#enter sib2, iclass 18, count 0 2006.229.06:22:22.86#ibcon#flushed, iclass 18, count 0 2006.229.06:22:22.86#ibcon#about to write, iclass 18, count 0 2006.229.06:22:22.86#ibcon#wrote, iclass 18, count 0 2006.229.06:22:22.86#ibcon#about to read 3, iclass 18, count 0 2006.229.06:22:22.88#ibcon#read 3, iclass 18, count 0 2006.229.06:22:22.88#ibcon#about to read 4, iclass 18, count 0 2006.229.06:22:22.88#ibcon#read 4, iclass 18, count 0 2006.229.06:22:22.88#ibcon#about to read 5, iclass 18, count 0 2006.229.06:22:22.88#ibcon#read 5, iclass 18, count 0 2006.229.06:22:22.88#ibcon#about to read 6, iclass 18, count 0 2006.229.06:22:22.88#ibcon#read 6, iclass 18, count 0 2006.229.06:22:22.88#ibcon#end of sib2, iclass 18, count 0 2006.229.06:22:22.88#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:22:22.88#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:22:22.88#ibcon#[25=USB\r\n] 2006.229.06:22:22.88#ibcon#*before write, iclass 18, count 0 2006.229.06:22:22.88#ibcon#enter sib2, iclass 18, count 0 2006.229.06:22:22.88#ibcon#flushed, iclass 18, count 0 2006.229.06:22:22.88#ibcon#about to write, iclass 18, count 0 2006.229.06:22:22.88#ibcon#wrote, iclass 18, count 0 2006.229.06:22:22.88#ibcon#about to read 3, iclass 18, count 0 2006.229.06:22:22.91#ibcon#read 3, iclass 18, count 0 2006.229.06:22:22.91#ibcon#about to read 4, iclass 18, count 0 2006.229.06:22:22.91#ibcon#read 4, iclass 18, count 0 2006.229.06:22:22.91#ibcon#about to read 5, iclass 18, count 0 2006.229.06:22:22.91#ibcon#read 5, iclass 18, count 0 2006.229.06:22:22.91#ibcon#about to read 6, iclass 18, count 0 2006.229.06:22:22.91#ibcon#read 6, iclass 18, count 0 2006.229.06:22:22.91#ibcon#end of sib2, iclass 18, count 0 2006.229.06:22:22.91#ibcon#*after write, iclass 18, count 0 2006.229.06:22:22.91#ibcon#*before return 0, iclass 18, count 0 2006.229.06:22:22.91#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:22:22.91#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:22:22.91#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:22:22.91#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:22:22.91$vck44/vblo=1,629.99 2006.229.06:22:22.91#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.06:22:22.91#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.06:22:22.91#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:22.91#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:22.91#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:22.91#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:22.91#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:22:22.91#ibcon#first serial, iclass 20, count 0 2006.229.06:22:22.91#ibcon#enter sib2, iclass 20, count 0 2006.229.06:22:22.91#ibcon#flushed, iclass 20, count 0 2006.229.06:22:22.91#ibcon#about to write, iclass 20, count 0 2006.229.06:22:22.91#ibcon#wrote, iclass 20, count 0 2006.229.06:22:22.91#ibcon#about to read 3, iclass 20, count 0 2006.229.06:22:22.93#ibcon#read 3, iclass 20, count 0 2006.229.06:22:22.93#ibcon#about to read 4, iclass 20, count 0 2006.229.06:22:22.93#ibcon#read 4, iclass 20, count 0 2006.229.06:22:22.93#ibcon#about to read 5, iclass 20, count 0 2006.229.06:22:22.93#ibcon#read 5, iclass 20, count 0 2006.229.06:22:22.93#ibcon#about to read 6, iclass 20, count 0 2006.229.06:22:22.93#ibcon#read 6, iclass 20, count 0 2006.229.06:22:22.93#ibcon#end of sib2, iclass 20, count 0 2006.229.06:22:22.93#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:22:22.93#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:22:22.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:22:22.93#ibcon#*before write, iclass 20, count 0 2006.229.06:22:22.93#ibcon#enter sib2, iclass 20, count 0 2006.229.06:22:22.93#ibcon#flushed, iclass 20, count 0 2006.229.06:22:22.93#ibcon#about to write, iclass 20, count 0 2006.229.06:22:22.93#ibcon#wrote, iclass 20, count 0 2006.229.06:22:22.93#ibcon#about to read 3, iclass 20, count 0 2006.229.06:22:22.97#ibcon#read 3, iclass 20, count 0 2006.229.06:22:22.97#ibcon#about to read 4, iclass 20, count 0 2006.229.06:22:22.97#ibcon#read 4, iclass 20, count 0 2006.229.06:22:22.97#ibcon#about to read 5, iclass 20, count 0 2006.229.06:22:22.97#ibcon#read 5, iclass 20, count 0 2006.229.06:22:22.97#ibcon#about to read 6, iclass 20, count 0 2006.229.06:22:22.97#ibcon#read 6, iclass 20, count 0 2006.229.06:22:22.97#ibcon#end of sib2, iclass 20, count 0 2006.229.06:22:22.97#ibcon#*after write, iclass 20, count 0 2006.229.06:22:22.97#ibcon#*before return 0, iclass 20, count 0 2006.229.06:22:22.97#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:22.97#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:22:22.97#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:22:22.97#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:22:22.97$vck44/vb=1,4 2006.229.06:22:22.97#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.06:22:22.97#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.06:22:22.97#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:22.97#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:22.97#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:22.97#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:22.97#ibcon#enter wrdev, iclass 22, count 2 2006.229.06:22:22.97#ibcon#first serial, iclass 22, count 2 2006.229.06:22:22.97#ibcon#enter sib2, iclass 22, count 2 2006.229.06:22:22.97#ibcon#flushed, iclass 22, count 2 2006.229.06:22:22.97#ibcon#about to write, iclass 22, count 2 2006.229.06:22:22.97#ibcon#wrote, iclass 22, count 2 2006.229.06:22:22.97#ibcon#about to read 3, iclass 22, count 2 2006.229.06:22:22.99#ibcon#read 3, iclass 22, count 2 2006.229.06:22:22.99#ibcon#about to read 4, iclass 22, count 2 2006.229.06:22:22.99#ibcon#read 4, iclass 22, count 2 2006.229.06:22:22.99#ibcon#about to read 5, iclass 22, count 2 2006.229.06:22:22.99#ibcon#read 5, iclass 22, count 2 2006.229.06:22:22.99#ibcon#about to read 6, iclass 22, count 2 2006.229.06:22:22.99#ibcon#read 6, iclass 22, count 2 2006.229.06:22:22.99#ibcon#end of sib2, iclass 22, count 2 2006.229.06:22:22.99#ibcon#*mode == 0, iclass 22, count 2 2006.229.06:22:22.99#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.06:22:22.99#ibcon#[27=AT01-04\r\n] 2006.229.06:22:22.99#ibcon#*before write, iclass 22, count 2 2006.229.06:22:22.99#ibcon#enter sib2, iclass 22, count 2 2006.229.06:22:22.99#ibcon#flushed, iclass 22, count 2 2006.229.06:22:22.99#ibcon#about to write, iclass 22, count 2 2006.229.06:22:22.99#ibcon#wrote, iclass 22, count 2 2006.229.06:22:22.99#ibcon#about to read 3, iclass 22, count 2 2006.229.06:22:23.02#ibcon#read 3, iclass 22, count 2 2006.229.06:22:23.02#ibcon#about to read 4, iclass 22, count 2 2006.229.06:22:23.02#ibcon#read 4, iclass 22, count 2 2006.229.06:22:23.02#ibcon#about to read 5, iclass 22, count 2 2006.229.06:22:23.02#ibcon#read 5, iclass 22, count 2 2006.229.06:22:23.02#ibcon#about to read 6, iclass 22, count 2 2006.229.06:22:23.02#ibcon#read 6, iclass 22, count 2 2006.229.06:22:23.02#ibcon#end of sib2, iclass 22, count 2 2006.229.06:22:23.02#ibcon#*after write, iclass 22, count 2 2006.229.06:22:23.02#ibcon#*before return 0, iclass 22, count 2 2006.229.06:22:23.02#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:23.02#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:22:23.02#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.06:22:23.02#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:23.02#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:23.14#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:23.14#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:23.14#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:22:23.14#ibcon#first serial, iclass 22, count 0 2006.229.06:22:23.14#ibcon#enter sib2, iclass 22, count 0 2006.229.06:22:23.14#ibcon#flushed, iclass 22, count 0 2006.229.06:22:23.14#ibcon#about to write, iclass 22, count 0 2006.229.06:22:23.14#ibcon#wrote, iclass 22, count 0 2006.229.06:22:23.14#ibcon#about to read 3, iclass 22, count 0 2006.229.06:22:23.16#ibcon#read 3, iclass 22, count 0 2006.229.06:22:23.16#ibcon#about to read 4, iclass 22, count 0 2006.229.06:22:23.16#ibcon#read 4, iclass 22, count 0 2006.229.06:22:23.16#ibcon#about to read 5, iclass 22, count 0 2006.229.06:22:23.16#ibcon#read 5, iclass 22, count 0 2006.229.06:22:23.16#ibcon#about to read 6, iclass 22, count 0 2006.229.06:22:23.16#ibcon#read 6, iclass 22, count 0 2006.229.06:22:23.16#ibcon#end of sib2, iclass 22, count 0 2006.229.06:22:23.16#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:22:23.16#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:22:23.16#ibcon#[27=USB\r\n] 2006.229.06:22:23.16#ibcon#*before write, iclass 22, count 0 2006.229.06:22:23.16#ibcon#enter sib2, iclass 22, count 0 2006.229.06:22:23.16#ibcon#flushed, iclass 22, count 0 2006.229.06:22:23.16#ibcon#about to write, iclass 22, count 0 2006.229.06:22:23.16#ibcon#wrote, iclass 22, count 0 2006.229.06:22:23.16#ibcon#about to read 3, iclass 22, count 0 2006.229.06:22:23.19#ibcon#read 3, iclass 22, count 0 2006.229.06:22:23.19#ibcon#about to read 4, iclass 22, count 0 2006.229.06:22:23.19#ibcon#read 4, iclass 22, count 0 2006.229.06:22:23.19#ibcon#about to read 5, iclass 22, count 0 2006.229.06:22:23.19#ibcon#read 5, iclass 22, count 0 2006.229.06:22:23.19#ibcon#about to read 6, iclass 22, count 0 2006.229.06:22:23.19#ibcon#read 6, iclass 22, count 0 2006.229.06:22:23.19#ibcon#end of sib2, iclass 22, count 0 2006.229.06:22:23.19#ibcon#*after write, iclass 22, count 0 2006.229.06:22:23.19#ibcon#*before return 0, iclass 22, count 0 2006.229.06:22:23.19#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:23.19#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:22:23.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:22:23.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:22:23.19$vck44/vblo=2,634.99 2006.229.06:22:23.19#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.06:22:23.19#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.06:22:23.19#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:23.19#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:23.19#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:23.19#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:23.19#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:22:23.19#ibcon#first serial, iclass 24, count 0 2006.229.06:22:23.19#ibcon#enter sib2, iclass 24, count 0 2006.229.06:22:23.19#ibcon#flushed, iclass 24, count 0 2006.229.06:22:23.19#ibcon#about to write, iclass 24, count 0 2006.229.06:22:23.19#ibcon#wrote, iclass 24, count 0 2006.229.06:22:23.19#ibcon#about to read 3, iclass 24, count 0 2006.229.06:22:23.21#ibcon#read 3, iclass 24, count 0 2006.229.06:22:23.21#ibcon#about to read 4, iclass 24, count 0 2006.229.06:22:23.21#ibcon#read 4, iclass 24, count 0 2006.229.06:22:23.21#ibcon#about to read 5, iclass 24, count 0 2006.229.06:22:23.21#ibcon#read 5, iclass 24, count 0 2006.229.06:22:23.21#ibcon#about to read 6, iclass 24, count 0 2006.229.06:22:23.21#ibcon#read 6, iclass 24, count 0 2006.229.06:22:23.21#ibcon#end of sib2, iclass 24, count 0 2006.229.06:22:23.21#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:22:23.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:22:23.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:22:23.21#ibcon#*before write, iclass 24, count 0 2006.229.06:22:23.21#ibcon#enter sib2, iclass 24, count 0 2006.229.06:22:23.21#ibcon#flushed, iclass 24, count 0 2006.229.06:22:23.21#ibcon#about to write, iclass 24, count 0 2006.229.06:22:23.21#ibcon#wrote, iclass 24, count 0 2006.229.06:22:23.21#ibcon#about to read 3, iclass 24, count 0 2006.229.06:22:23.25#ibcon#read 3, iclass 24, count 0 2006.229.06:22:23.25#ibcon#about to read 4, iclass 24, count 0 2006.229.06:22:23.25#ibcon#read 4, iclass 24, count 0 2006.229.06:22:23.25#ibcon#about to read 5, iclass 24, count 0 2006.229.06:22:23.25#ibcon#read 5, iclass 24, count 0 2006.229.06:22:23.25#ibcon#about to read 6, iclass 24, count 0 2006.229.06:22:23.25#ibcon#read 6, iclass 24, count 0 2006.229.06:22:23.25#ibcon#end of sib2, iclass 24, count 0 2006.229.06:22:23.25#ibcon#*after write, iclass 24, count 0 2006.229.06:22:23.25#ibcon#*before return 0, iclass 24, count 0 2006.229.06:22:23.25#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:23.25#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:22:23.25#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:22:23.25#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:22:23.25$vck44/vb=2,4 2006.229.06:22:23.25#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.06:22:23.25#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.06:22:23.25#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:23.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:23.31#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:23.31#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:23.31#ibcon#enter wrdev, iclass 26, count 2 2006.229.06:22:23.31#ibcon#first serial, iclass 26, count 2 2006.229.06:22:23.31#ibcon#enter sib2, iclass 26, count 2 2006.229.06:22:23.31#ibcon#flushed, iclass 26, count 2 2006.229.06:22:23.31#ibcon#about to write, iclass 26, count 2 2006.229.06:22:23.31#ibcon#wrote, iclass 26, count 2 2006.229.06:22:23.31#ibcon#about to read 3, iclass 26, count 2 2006.229.06:22:23.33#ibcon#read 3, iclass 26, count 2 2006.229.06:22:23.33#ibcon#about to read 4, iclass 26, count 2 2006.229.06:22:23.33#ibcon#read 4, iclass 26, count 2 2006.229.06:22:23.33#ibcon#about to read 5, iclass 26, count 2 2006.229.06:22:23.33#ibcon#read 5, iclass 26, count 2 2006.229.06:22:23.33#ibcon#about to read 6, iclass 26, count 2 2006.229.06:22:23.33#ibcon#read 6, iclass 26, count 2 2006.229.06:22:23.33#ibcon#end of sib2, iclass 26, count 2 2006.229.06:22:23.33#ibcon#*mode == 0, iclass 26, count 2 2006.229.06:22:23.33#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.06:22:23.33#ibcon#[27=AT02-04\r\n] 2006.229.06:22:23.33#ibcon#*before write, iclass 26, count 2 2006.229.06:22:23.33#ibcon#enter sib2, iclass 26, count 2 2006.229.06:22:23.33#ibcon#flushed, iclass 26, count 2 2006.229.06:22:23.33#ibcon#about to write, iclass 26, count 2 2006.229.06:22:23.33#ibcon#wrote, iclass 26, count 2 2006.229.06:22:23.33#ibcon#about to read 3, iclass 26, count 2 2006.229.06:22:23.36#ibcon#read 3, iclass 26, count 2 2006.229.06:22:23.36#ibcon#about to read 4, iclass 26, count 2 2006.229.06:22:23.36#ibcon#read 4, iclass 26, count 2 2006.229.06:22:23.36#ibcon#about to read 5, iclass 26, count 2 2006.229.06:22:23.36#ibcon#read 5, iclass 26, count 2 2006.229.06:22:23.36#ibcon#about to read 6, iclass 26, count 2 2006.229.06:22:23.36#ibcon#read 6, iclass 26, count 2 2006.229.06:22:23.36#ibcon#end of sib2, iclass 26, count 2 2006.229.06:22:23.36#ibcon#*after write, iclass 26, count 2 2006.229.06:22:23.36#ibcon#*before return 0, iclass 26, count 2 2006.229.06:22:23.36#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:23.36#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:22:23.36#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.06:22:23.36#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:23.36#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:23.48#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:23.48#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:23.48#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:22:23.48#ibcon#first serial, iclass 26, count 0 2006.229.06:22:23.48#ibcon#enter sib2, iclass 26, count 0 2006.229.06:22:23.48#ibcon#flushed, iclass 26, count 0 2006.229.06:22:23.48#ibcon#about to write, iclass 26, count 0 2006.229.06:22:23.48#ibcon#wrote, iclass 26, count 0 2006.229.06:22:23.48#ibcon#about to read 3, iclass 26, count 0 2006.229.06:22:23.50#ibcon#read 3, iclass 26, count 0 2006.229.06:22:23.50#ibcon#about to read 4, iclass 26, count 0 2006.229.06:22:23.50#ibcon#read 4, iclass 26, count 0 2006.229.06:22:23.50#ibcon#about to read 5, iclass 26, count 0 2006.229.06:22:23.50#ibcon#read 5, iclass 26, count 0 2006.229.06:22:23.50#ibcon#about to read 6, iclass 26, count 0 2006.229.06:22:23.50#ibcon#read 6, iclass 26, count 0 2006.229.06:22:23.50#ibcon#end of sib2, iclass 26, count 0 2006.229.06:22:23.50#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:22:23.50#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:22:23.50#ibcon#[27=USB\r\n] 2006.229.06:22:23.50#ibcon#*before write, iclass 26, count 0 2006.229.06:22:23.50#ibcon#enter sib2, iclass 26, count 0 2006.229.06:22:23.50#ibcon#flushed, iclass 26, count 0 2006.229.06:22:23.50#ibcon#about to write, iclass 26, count 0 2006.229.06:22:23.50#ibcon#wrote, iclass 26, count 0 2006.229.06:22:23.50#ibcon#about to read 3, iclass 26, count 0 2006.229.06:22:23.53#ibcon#read 3, iclass 26, count 0 2006.229.06:22:23.53#ibcon#about to read 4, iclass 26, count 0 2006.229.06:22:23.53#ibcon#read 4, iclass 26, count 0 2006.229.06:22:23.53#ibcon#about to read 5, iclass 26, count 0 2006.229.06:22:23.53#ibcon#read 5, iclass 26, count 0 2006.229.06:22:23.53#ibcon#about to read 6, iclass 26, count 0 2006.229.06:22:23.53#ibcon#read 6, iclass 26, count 0 2006.229.06:22:23.53#ibcon#end of sib2, iclass 26, count 0 2006.229.06:22:23.53#ibcon#*after write, iclass 26, count 0 2006.229.06:22:23.53#ibcon#*before return 0, iclass 26, count 0 2006.229.06:22:23.53#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:23.53#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:22:23.53#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:22:23.53#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:22:23.53$vck44/vblo=3,649.99 2006.229.06:22:23.53#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.06:22:23.53#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.06:22:23.53#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:23.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:23.53#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:23.53#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:23.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:22:23.53#ibcon#first serial, iclass 28, count 0 2006.229.06:22:23.53#ibcon#enter sib2, iclass 28, count 0 2006.229.06:22:23.53#ibcon#flushed, iclass 28, count 0 2006.229.06:22:23.53#ibcon#about to write, iclass 28, count 0 2006.229.06:22:23.53#ibcon#wrote, iclass 28, count 0 2006.229.06:22:23.53#ibcon#about to read 3, iclass 28, count 0 2006.229.06:22:23.55#ibcon#read 3, iclass 28, count 0 2006.229.06:22:23.55#ibcon#about to read 4, iclass 28, count 0 2006.229.06:22:23.55#ibcon#read 4, iclass 28, count 0 2006.229.06:22:23.55#ibcon#about to read 5, iclass 28, count 0 2006.229.06:22:23.55#ibcon#read 5, iclass 28, count 0 2006.229.06:22:23.55#ibcon#about to read 6, iclass 28, count 0 2006.229.06:22:23.55#ibcon#read 6, iclass 28, count 0 2006.229.06:22:23.55#ibcon#end of sib2, iclass 28, count 0 2006.229.06:22:23.55#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:22:23.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:22:23.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:22:23.55#ibcon#*before write, iclass 28, count 0 2006.229.06:22:23.55#ibcon#enter sib2, iclass 28, count 0 2006.229.06:22:23.55#ibcon#flushed, iclass 28, count 0 2006.229.06:22:23.55#ibcon#about to write, iclass 28, count 0 2006.229.06:22:23.55#ibcon#wrote, iclass 28, count 0 2006.229.06:22:23.55#ibcon#about to read 3, iclass 28, count 0 2006.229.06:22:23.59#ibcon#read 3, iclass 28, count 0 2006.229.06:22:23.59#ibcon#about to read 4, iclass 28, count 0 2006.229.06:22:23.59#ibcon#read 4, iclass 28, count 0 2006.229.06:22:23.59#ibcon#about to read 5, iclass 28, count 0 2006.229.06:22:23.59#ibcon#read 5, iclass 28, count 0 2006.229.06:22:23.59#ibcon#about to read 6, iclass 28, count 0 2006.229.06:22:23.59#ibcon#read 6, iclass 28, count 0 2006.229.06:22:23.59#ibcon#end of sib2, iclass 28, count 0 2006.229.06:22:23.59#ibcon#*after write, iclass 28, count 0 2006.229.06:22:23.59#ibcon#*before return 0, iclass 28, count 0 2006.229.06:22:23.59#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:23.59#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:22:23.59#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:22:23.59#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:22:23.59$vck44/vb=3,4 2006.229.06:22:23.59#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.06:22:23.59#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.06:22:23.59#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:23.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:23.65#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:23.65#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:23.65#ibcon#enter wrdev, iclass 30, count 2 2006.229.06:22:23.65#ibcon#first serial, iclass 30, count 2 2006.229.06:22:23.65#ibcon#enter sib2, iclass 30, count 2 2006.229.06:22:23.65#ibcon#flushed, iclass 30, count 2 2006.229.06:22:23.65#ibcon#about to write, iclass 30, count 2 2006.229.06:22:23.65#ibcon#wrote, iclass 30, count 2 2006.229.06:22:23.65#ibcon#about to read 3, iclass 30, count 2 2006.229.06:22:23.67#ibcon#read 3, iclass 30, count 2 2006.229.06:22:23.67#ibcon#about to read 4, iclass 30, count 2 2006.229.06:22:23.67#ibcon#read 4, iclass 30, count 2 2006.229.06:22:23.67#ibcon#about to read 5, iclass 30, count 2 2006.229.06:22:23.67#ibcon#read 5, iclass 30, count 2 2006.229.06:22:23.67#ibcon#about to read 6, iclass 30, count 2 2006.229.06:22:23.67#ibcon#read 6, iclass 30, count 2 2006.229.06:22:23.67#ibcon#end of sib2, iclass 30, count 2 2006.229.06:22:23.67#ibcon#*mode == 0, iclass 30, count 2 2006.229.06:22:23.67#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.06:22:23.67#ibcon#[27=AT03-04\r\n] 2006.229.06:22:23.67#ibcon#*before write, iclass 30, count 2 2006.229.06:22:23.67#ibcon#enter sib2, iclass 30, count 2 2006.229.06:22:23.67#ibcon#flushed, iclass 30, count 2 2006.229.06:22:23.67#ibcon#about to write, iclass 30, count 2 2006.229.06:22:23.67#ibcon#wrote, iclass 30, count 2 2006.229.06:22:23.67#ibcon#about to read 3, iclass 30, count 2 2006.229.06:22:23.70#ibcon#read 3, iclass 30, count 2 2006.229.06:22:23.70#ibcon#about to read 4, iclass 30, count 2 2006.229.06:22:23.70#ibcon#read 4, iclass 30, count 2 2006.229.06:22:23.70#ibcon#about to read 5, iclass 30, count 2 2006.229.06:22:23.70#ibcon#read 5, iclass 30, count 2 2006.229.06:22:23.70#ibcon#about to read 6, iclass 30, count 2 2006.229.06:22:23.70#ibcon#read 6, iclass 30, count 2 2006.229.06:22:23.70#ibcon#end of sib2, iclass 30, count 2 2006.229.06:22:23.70#ibcon#*after write, iclass 30, count 2 2006.229.06:22:23.70#ibcon#*before return 0, iclass 30, count 2 2006.229.06:22:23.70#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:23.70#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:22:23.70#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.06:22:23.70#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:23.70#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:23.82#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:23.82#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:23.82#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:22:23.82#ibcon#first serial, iclass 30, count 0 2006.229.06:22:23.82#ibcon#enter sib2, iclass 30, count 0 2006.229.06:22:23.82#ibcon#flushed, iclass 30, count 0 2006.229.06:22:23.82#ibcon#about to write, iclass 30, count 0 2006.229.06:22:23.82#ibcon#wrote, iclass 30, count 0 2006.229.06:22:23.82#ibcon#about to read 3, iclass 30, count 0 2006.229.06:22:23.84#ibcon#read 3, iclass 30, count 0 2006.229.06:22:23.84#ibcon#about to read 4, iclass 30, count 0 2006.229.06:22:23.84#ibcon#read 4, iclass 30, count 0 2006.229.06:22:23.84#ibcon#about to read 5, iclass 30, count 0 2006.229.06:22:23.84#ibcon#read 5, iclass 30, count 0 2006.229.06:22:23.84#ibcon#about to read 6, iclass 30, count 0 2006.229.06:22:23.84#ibcon#read 6, iclass 30, count 0 2006.229.06:22:23.84#ibcon#end of sib2, iclass 30, count 0 2006.229.06:22:23.84#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:22:23.84#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:22:23.84#ibcon#[27=USB\r\n] 2006.229.06:22:23.84#ibcon#*before write, iclass 30, count 0 2006.229.06:22:23.84#ibcon#enter sib2, iclass 30, count 0 2006.229.06:22:23.84#ibcon#flushed, iclass 30, count 0 2006.229.06:22:23.84#ibcon#about to write, iclass 30, count 0 2006.229.06:22:23.84#ibcon#wrote, iclass 30, count 0 2006.229.06:22:23.84#ibcon#about to read 3, iclass 30, count 0 2006.229.06:22:23.87#ibcon#read 3, iclass 30, count 0 2006.229.06:22:23.87#ibcon#about to read 4, iclass 30, count 0 2006.229.06:22:23.87#ibcon#read 4, iclass 30, count 0 2006.229.06:22:23.87#ibcon#about to read 5, iclass 30, count 0 2006.229.06:22:23.87#ibcon#read 5, iclass 30, count 0 2006.229.06:22:23.87#ibcon#about to read 6, iclass 30, count 0 2006.229.06:22:23.87#ibcon#read 6, iclass 30, count 0 2006.229.06:22:23.87#ibcon#end of sib2, iclass 30, count 0 2006.229.06:22:23.87#ibcon#*after write, iclass 30, count 0 2006.229.06:22:23.87#ibcon#*before return 0, iclass 30, count 0 2006.229.06:22:23.87#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:23.87#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:22:23.87#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:22:23.87#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:22:23.87$vck44/vblo=4,679.99 2006.229.06:22:23.87#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.06:22:23.87#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.06:22:23.87#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:23.87#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:23.87#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:23.87#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:23.87#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:22:23.87#ibcon#first serial, iclass 32, count 0 2006.229.06:22:23.87#ibcon#enter sib2, iclass 32, count 0 2006.229.06:22:23.87#ibcon#flushed, iclass 32, count 0 2006.229.06:22:23.87#ibcon#about to write, iclass 32, count 0 2006.229.06:22:23.87#ibcon#wrote, iclass 32, count 0 2006.229.06:22:23.87#ibcon#about to read 3, iclass 32, count 0 2006.229.06:22:23.89#ibcon#read 3, iclass 32, count 0 2006.229.06:22:23.89#ibcon#about to read 4, iclass 32, count 0 2006.229.06:22:23.89#ibcon#read 4, iclass 32, count 0 2006.229.06:22:23.89#ibcon#about to read 5, iclass 32, count 0 2006.229.06:22:23.89#ibcon#read 5, iclass 32, count 0 2006.229.06:22:23.89#ibcon#about to read 6, iclass 32, count 0 2006.229.06:22:23.89#ibcon#read 6, iclass 32, count 0 2006.229.06:22:23.89#ibcon#end of sib2, iclass 32, count 0 2006.229.06:22:23.89#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:22:23.89#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:22:23.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:22:23.89#ibcon#*before write, iclass 32, count 0 2006.229.06:22:23.89#ibcon#enter sib2, iclass 32, count 0 2006.229.06:22:23.89#ibcon#flushed, iclass 32, count 0 2006.229.06:22:23.89#ibcon#about to write, iclass 32, count 0 2006.229.06:22:23.89#ibcon#wrote, iclass 32, count 0 2006.229.06:22:23.89#ibcon#about to read 3, iclass 32, count 0 2006.229.06:22:23.93#ibcon#read 3, iclass 32, count 0 2006.229.06:22:23.93#ibcon#about to read 4, iclass 32, count 0 2006.229.06:22:23.93#ibcon#read 4, iclass 32, count 0 2006.229.06:22:23.93#ibcon#about to read 5, iclass 32, count 0 2006.229.06:22:23.93#ibcon#read 5, iclass 32, count 0 2006.229.06:22:23.93#ibcon#about to read 6, iclass 32, count 0 2006.229.06:22:23.93#ibcon#read 6, iclass 32, count 0 2006.229.06:22:23.93#ibcon#end of sib2, iclass 32, count 0 2006.229.06:22:23.93#ibcon#*after write, iclass 32, count 0 2006.229.06:22:23.93#ibcon#*before return 0, iclass 32, count 0 2006.229.06:22:23.93#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:23.93#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:22:23.93#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:22:23.93#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:22:23.93$vck44/vb=4,4 2006.229.06:22:23.93#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:22:23.93#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:22:23.93#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:23.93#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:23.99#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:23.99#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:23.99#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:22:23.99#ibcon#first serial, iclass 34, count 2 2006.229.06:22:23.99#ibcon#enter sib2, iclass 34, count 2 2006.229.06:22:23.99#ibcon#flushed, iclass 34, count 2 2006.229.06:22:23.99#ibcon#about to write, iclass 34, count 2 2006.229.06:22:23.99#ibcon#wrote, iclass 34, count 2 2006.229.06:22:23.99#ibcon#about to read 3, iclass 34, count 2 2006.229.06:22:24.01#ibcon#read 3, iclass 34, count 2 2006.229.06:22:24.01#ibcon#about to read 4, iclass 34, count 2 2006.229.06:22:24.01#ibcon#read 4, iclass 34, count 2 2006.229.06:22:24.01#ibcon#about to read 5, iclass 34, count 2 2006.229.06:22:24.01#ibcon#read 5, iclass 34, count 2 2006.229.06:22:24.01#ibcon#about to read 6, iclass 34, count 2 2006.229.06:22:24.01#ibcon#read 6, iclass 34, count 2 2006.229.06:22:24.01#ibcon#end of sib2, iclass 34, count 2 2006.229.06:22:24.01#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:22:24.01#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:22:24.01#ibcon#[27=AT04-04\r\n] 2006.229.06:22:24.01#ibcon#*before write, iclass 34, count 2 2006.229.06:22:24.01#ibcon#enter sib2, iclass 34, count 2 2006.229.06:22:24.01#ibcon#flushed, iclass 34, count 2 2006.229.06:22:24.01#ibcon#about to write, iclass 34, count 2 2006.229.06:22:24.01#ibcon#wrote, iclass 34, count 2 2006.229.06:22:24.01#ibcon#about to read 3, iclass 34, count 2 2006.229.06:22:24.04#ibcon#read 3, iclass 34, count 2 2006.229.06:22:24.04#ibcon#about to read 4, iclass 34, count 2 2006.229.06:22:24.04#ibcon#read 4, iclass 34, count 2 2006.229.06:22:24.04#ibcon#about to read 5, iclass 34, count 2 2006.229.06:22:24.04#ibcon#read 5, iclass 34, count 2 2006.229.06:22:24.04#ibcon#about to read 6, iclass 34, count 2 2006.229.06:22:24.04#ibcon#read 6, iclass 34, count 2 2006.229.06:22:24.04#ibcon#end of sib2, iclass 34, count 2 2006.229.06:22:24.04#ibcon#*after write, iclass 34, count 2 2006.229.06:22:24.04#ibcon#*before return 0, iclass 34, count 2 2006.229.06:22:24.04#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:24.04#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:22:24.04#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:22:24.04#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:24.04#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:24.16#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:24.16#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:24.16#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:22:24.16#ibcon#first serial, iclass 34, count 0 2006.229.06:22:24.16#ibcon#enter sib2, iclass 34, count 0 2006.229.06:22:24.16#ibcon#flushed, iclass 34, count 0 2006.229.06:22:24.16#ibcon#about to write, iclass 34, count 0 2006.229.06:22:24.16#ibcon#wrote, iclass 34, count 0 2006.229.06:22:24.16#ibcon#about to read 3, iclass 34, count 0 2006.229.06:22:24.18#ibcon#read 3, iclass 34, count 0 2006.229.06:22:24.18#ibcon#about to read 4, iclass 34, count 0 2006.229.06:22:24.18#ibcon#read 4, iclass 34, count 0 2006.229.06:22:24.18#ibcon#about to read 5, iclass 34, count 0 2006.229.06:22:24.18#ibcon#read 5, iclass 34, count 0 2006.229.06:22:24.18#ibcon#about to read 6, iclass 34, count 0 2006.229.06:22:24.18#ibcon#read 6, iclass 34, count 0 2006.229.06:22:24.18#ibcon#end of sib2, iclass 34, count 0 2006.229.06:22:24.18#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:22:24.18#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:22:24.18#ibcon#[27=USB\r\n] 2006.229.06:22:24.18#ibcon#*before write, iclass 34, count 0 2006.229.06:22:24.18#ibcon#enter sib2, iclass 34, count 0 2006.229.06:22:24.18#ibcon#flushed, iclass 34, count 0 2006.229.06:22:24.18#ibcon#about to write, iclass 34, count 0 2006.229.06:22:24.18#ibcon#wrote, iclass 34, count 0 2006.229.06:22:24.18#ibcon#about to read 3, iclass 34, count 0 2006.229.06:22:24.21#ibcon#read 3, iclass 34, count 0 2006.229.06:22:24.21#ibcon#about to read 4, iclass 34, count 0 2006.229.06:22:24.21#ibcon#read 4, iclass 34, count 0 2006.229.06:22:24.21#ibcon#about to read 5, iclass 34, count 0 2006.229.06:22:24.21#ibcon#read 5, iclass 34, count 0 2006.229.06:22:24.21#ibcon#about to read 6, iclass 34, count 0 2006.229.06:22:24.21#ibcon#read 6, iclass 34, count 0 2006.229.06:22:24.21#ibcon#end of sib2, iclass 34, count 0 2006.229.06:22:24.21#ibcon#*after write, iclass 34, count 0 2006.229.06:22:24.21#ibcon#*before return 0, iclass 34, count 0 2006.229.06:22:24.21#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:24.21#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:22:24.21#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:22:24.21#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:22:24.21$vck44/vblo=5,709.99 2006.229.06:22:24.21#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.06:22:24.21#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.06:22:24.21#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:24.21#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:22:24.21#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:22:24.21#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:22:24.21#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:22:24.21#ibcon#first serial, iclass 36, count 0 2006.229.06:22:24.21#ibcon#enter sib2, iclass 36, count 0 2006.229.06:22:24.21#ibcon#flushed, iclass 36, count 0 2006.229.06:22:24.21#ibcon#about to write, iclass 36, count 0 2006.229.06:22:24.21#ibcon#wrote, iclass 36, count 0 2006.229.06:22:24.21#ibcon#about to read 3, iclass 36, count 0 2006.229.06:22:24.23#ibcon#read 3, iclass 36, count 0 2006.229.06:22:24.23#ibcon#about to read 4, iclass 36, count 0 2006.229.06:22:24.23#ibcon#read 4, iclass 36, count 0 2006.229.06:22:24.23#ibcon#about to read 5, iclass 36, count 0 2006.229.06:22:24.23#ibcon#read 5, iclass 36, count 0 2006.229.06:22:24.23#ibcon#about to read 6, iclass 36, count 0 2006.229.06:22:24.23#ibcon#read 6, iclass 36, count 0 2006.229.06:22:24.23#ibcon#end of sib2, iclass 36, count 0 2006.229.06:22:24.23#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:22:24.23#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:22:24.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:22:24.23#ibcon#*before write, iclass 36, count 0 2006.229.06:22:24.23#ibcon#enter sib2, iclass 36, count 0 2006.229.06:22:24.23#ibcon#flushed, iclass 36, count 0 2006.229.06:22:24.23#ibcon#about to write, iclass 36, count 0 2006.229.06:22:24.23#ibcon#wrote, iclass 36, count 0 2006.229.06:22:24.23#ibcon#about to read 3, iclass 36, count 0 2006.229.06:22:24.27#ibcon#read 3, iclass 36, count 0 2006.229.06:22:24.27#ibcon#about to read 4, iclass 36, count 0 2006.229.06:22:24.27#ibcon#read 4, iclass 36, count 0 2006.229.06:22:24.27#ibcon#about to read 5, iclass 36, count 0 2006.229.06:22:24.27#ibcon#read 5, iclass 36, count 0 2006.229.06:22:24.27#ibcon#about to read 6, iclass 36, count 0 2006.229.06:22:24.27#ibcon#read 6, iclass 36, count 0 2006.229.06:22:24.27#ibcon#end of sib2, iclass 36, count 0 2006.229.06:22:24.27#ibcon#*after write, iclass 36, count 0 2006.229.06:22:24.27#ibcon#*before return 0, iclass 36, count 0 2006.229.06:22:24.27#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:22:24.27#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:22:24.27#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:22:24.27#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:22:24.27$vck44/vb=5,4 2006.229.06:22:24.27#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.06:22:24.27#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.06:22:24.27#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:24.27#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:22:24.33#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:22:24.33#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:22:24.33#ibcon#enter wrdev, iclass 38, count 2 2006.229.06:22:24.33#ibcon#first serial, iclass 38, count 2 2006.229.06:22:24.33#ibcon#enter sib2, iclass 38, count 2 2006.229.06:22:24.33#ibcon#flushed, iclass 38, count 2 2006.229.06:22:24.33#ibcon#about to write, iclass 38, count 2 2006.229.06:22:24.33#ibcon#wrote, iclass 38, count 2 2006.229.06:22:24.33#ibcon#about to read 3, iclass 38, count 2 2006.229.06:22:24.35#ibcon#read 3, iclass 38, count 2 2006.229.06:22:24.35#ibcon#about to read 4, iclass 38, count 2 2006.229.06:22:24.35#ibcon#read 4, iclass 38, count 2 2006.229.06:22:24.35#ibcon#about to read 5, iclass 38, count 2 2006.229.06:22:24.35#ibcon#read 5, iclass 38, count 2 2006.229.06:22:24.35#ibcon#about to read 6, iclass 38, count 2 2006.229.06:22:24.35#ibcon#read 6, iclass 38, count 2 2006.229.06:22:24.35#ibcon#end of sib2, iclass 38, count 2 2006.229.06:22:24.35#ibcon#*mode == 0, iclass 38, count 2 2006.229.06:22:24.35#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.06:22:24.35#ibcon#[27=AT05-04\r\n] 2006.229.06:22:24.35#ibcon#*before write, iclass 38, count 2 2006.229.06:22:24.35#ibcon#enter sib2, iclass 38, count 2 2006.229.06:22:24.35#ibcon#flushed, iclass 38, count 2 2006.229.06:22:24.35#ibcon#about to write, iclass 38, count 2 2006.229.06:22:24.35#ibcon#wrote, iclass 38, count 2 2006.229.06:22:24.35#ibcon#about to read 3, iclass 38, count 2 2006.229.06:22:24.38#ibcon#read 3, iclass 38, count 2 2006.229.06:22:24.38#ibcon#about to read 4, iclass 38, count 2 2006.229.06:22:24.38#ibcon#read 4, iclass 38, count 2 2006.229.06:22:24.38#ibcon#about to read 5, iclass 38, count 2 2006.229.06:22:24.38#ibcon#read 5, iclass 38, count 2 2006.229.06:22:24.38#ibcon#about to read 6, iclass 38, count 2 2006.229.06:22:24.38#ibcon#read 6, iclass 38, count 2 2006.229.06:22:24.38#ibcon#end of sib2, iclass 38, count 2 2006.229.06:22:24.38#ibcon#*after write, iclass 38, count 2 2006.229.06:22:24.38#ibcon#*before return 0, iclass 38, count 2 2006.229.06:22:24.38#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:22:24.38#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:22:24.38#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.06:22:24.38#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:24.38#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:22:24.50#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:22:24.50#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:22:24.50#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:22:24.50#ibcon#first serial, iclass 38, count 0 2006.229.06:22:24.50#ibcon#enter sib2, iclass 38, count 0 2006.229.06:22:24.50#ibcon#flushed, iclass 38, count 0 2006.229.06:22:24.50#ibcon#about to write, iclass 38, count 0 2006.229.06:22:24.50#ibcon#wrote, iclass 38, count 0 2006.229.06:22:24.50#ibcon#about to read 3, iclass 38, count 0 2006.229.06:22:24.52#ibcon#read 3, iclass 38, count 0 2006.229.06:22:24.52#ibcon#about to read 4, iclass 38, count 0 2006.229.06:22:24.52#ibcon#read 4, iclass 38, count 0 2006.229.06:22:24.52#ibcon#about to read 5, iclass 38, count 0 2006.229.06:22:24.52#ibcon#read 5, iclass 38, count 0 2006.229.06:22:24.52#ibcon#about to read 6, iclass 38, count 0 2006.229.06:22:24.52#ibcon#read 6, iclass 38, count 0 2006.229.06:22:24.52#ibcon#end of sib2, iclass 38, count 0 2006.229.06:22:24.52#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:22:24.52#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:22:24.52#ibcon#[27=USB\r\n] 2006.229.06:22:24.52#ibcon#*before write, iclass 38, count 0 2006.229.06:22:24.52#ibcon#enter sib2, iclass 38, count 0 2006.229.06:22:24.52#ibcon#flushed, iclass 38, count 0 2006.229.06:22:24.52#ibcon#about to write, iclass 38, count 0 2006.229.06:22:24.52#ibcon#wrote, iclass 38, count 0 2006.229.06:22:24.52#ibcon#about to read 3, iclass 38, count 0 2006.229.06:22:24.55#ibcon#read 3, iclass 38, count 0 2006.229.06:22:24.55#ibcon#about to read 4, iclass 38, count 0 2006.229.06:22:24.55#ibcon#read 4, iclass 38, count 0 2006.229.06:22:24.55#ibcon#about to read 5, iclass 38, count 0 2006.229.06:22:24.55#ibcon#read 5, iclass 38, count 0 2006.229.06:22:24.55#ibcon#about to read 6, iclass 38, count 0 2006.229.06:22:24.55#ibcon#read 6, iclass 38, count 0 2006.229.06:22:24.55#ibcon#end of sib2, iclass 38, count 0 2006.229.06:22:24.55#ibcon#*after write, iclass 38, count 0 2006.229.06:22:24.55#ibcon#*before return 0, iclass 38, count 0 2006.229.06:22:24.55#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:22:24.55#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:22:24.55#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:22:24.55#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:22:24.55$vck44/vblo=6,719.99 2006.229.06:22:24.55#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.06:22:24.55#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.06:22:24.55#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:24.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:22:24.55#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:22:24.55#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:22:24.55#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:22:24.55#ibcon#first serial, iclass 40, count 0 2006.229.06:22:24.55#ibcon#enter sib2, iclass 40, count 0 2006.229.06:22:24.55#ibcon#flushed, iclass 40, count 0 2006.229.06:22:24.55#ibcon#about to write, iclass 40, count 0 2006.229.06:22:24.55#ibcon#wrote, iclass 40, count 0 2006.229.06:22:24.55#ibcon#about to read 3, iclass 40, count 0 2006.229.06:22:24.57#ibcon#read 3, iclass 40, count 0 2006.229.06:22:24.57#ibcon#about to read 4, iclass 40, count 0 2006.229.06:22:24.57#ibcon#read 4, iclass 40, count 0 2006.229.06:22:24.57#ibcon#about to read 5, iclass 40, count 0 2006.229.06:22:24.57#ibcon#read 5, iclass 40, count 0 2006.229.06:22:24.57#ibcon#about to read 6, iclass 40, count 0 2006.229.06:22:24.57#ibcon#read 6, iclass 40, count 0 2006.229.06:22:24.57#ibcon#end of sib2, iclass 40, count 0 2006.229.06:22:24.57#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:22:24.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:22:24.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:22:24.57#ibcon#*before write, iclass 40, count 0 2006.229.06:22:24.57#ibcon#enter sib2, iclass 40, count 0 2006.229.06:22:24.57#ibcon#flushed, iclass 40, count 0 2006.229.06:22:24.57#ibcon#about to write, iclass 40, count 0 2006.229.06:22:24.57#ibcon#wrote, iclass 40, count 0 2006.229.06:22:24.57#ibcon#about to read 3, iclass 40, count 0 2006.229.06:22:24.61#ibcon#read 3, iclass 40, count 0 2006.229.06:22:24.61#ibcon#about to read 4, iclass 40, count 0 2006.229.06:22:24.61#ibcon#read 4, iclass 40, count 0 2006.229.06:22:24.61#ibcon#about to read 5, iclass 40, count 0 2006.229.06:22:24.61#ibcon#read 5, iclass 40, count 0 2006.229.06:22:24.61#ibcon#about to read 6, iclass 40, count 0 2006.229.06:22:24.61#ibcon#read 6, iclass 40, count 0 2006.229.06:22:24.61#ibcon#end of sib2, iclass 40, count 0 2006.229.06:22:24.61#ibcon#*after write, iclass 40, count 0 2006.229.06:22:24.61#ibcon#*before return 0, iclass 40, count 0 2006.229.06:22:24.61#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:22:24.61#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:22:24.61#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:22:24.61#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:22:24.61$vck44/vb=6,4 2006.229.06:22:24.61#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.06:22:24.61#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.06:22:24.61#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:24.61#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:22:24.67#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:22:24.67#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:22:24.67#ibcon#enter wrdev, iclass 4, count 2 2006.229.06:22:24.67#ibcon#first serial, iclass 4, count 2 2006.229.06:22:24.67#ibcon#enter sib2, iclass 4, count 2 2006.229.06:22:24.67#ibcon#flushed, iclass 4, count 2 2006.229.06:22:24.67#ibcon#about to write, iclass 4, count 2 2006.229.06:22:24.67#ibcon#wrote, iclass 4, count 2 2006.229.06:22:24.67#ibcon#about to read 3, iclass 4, count 2 2006.229.06:22:24.69#ibcon#read 3, iclass 4, count 2 2006.229.06:22:24.69#ibcon#about to read 4, iclass 4, count 2 2006.229.06:22:24.69#ibcon#read 4, iclass 4, count 2 2006.229.06:22:24.69#ibcon#about to read 5, iclass 4, count 2 2006.229.06:22:24.69#ibcon#read 5, iclass 4, count 2 2006.229.06:22:24.69#ibcon#about to read 6, iclass 4, count 2 2006.229.06:22:24.69#ibcon#read 6, iclass 4, count 2 2006.229.06:22:24.69#ibcon#end of sib2, iclass 4, count 2 2006.229.06:22:24.69#ibcon#*mode == 0, iclass 4, count 2 2006.229.06:22:24.69#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.06:22:24.69#ibcon#[27=AT06-04\r\n] 2006.229.06:22:24.69#ibcon#*before write, iclass 4, count 2 2006.229.06:22:24.69#ibcon#enter sib2, iclass 4, count 2 2006.229.06:22:24.69#ibcon#flushed, iclass 4, count 2 2006.229.06:22:24.69#ibcon#about to write, iclass 4, count 2 2006.229.06:22:24.69#ibcon#wrote, iclass 4, count 2 2006.229.06:22:24.69#ibcon#about to read 3, iclass 4, count 2 2006.229.06:22:24.72#ibcon#read 3, iclass 4, count 2 2006.229.06:22:24.72#ibcon#about to read 4, iclass 4, count 2 2006.229.06:22:24.72#ibcon#read 4, iclass 4, count 2 2006.229.06:22:24.72#ibcon#about to read 5, iclass 4, count 2 2006.229.06:22:24.72#ibcon#read 5, iclass 4, count 2 2006.229.06:22:24.72#ibcon#about to read 6, iclass 4, count 2 2006.229.06:22:24.72#ibcon#read 6, iclass 4, count 2 2006.229.06:22:24.72#ibcon#end of sib2, iclass 4, count 2 2006.229.06:22:24.72#ibcon#*after write, iclass 4, count 2 2006.229.06:22:24.72#ibcon#*before return 0, iclass 4, count 2 2006.229.06:22:24.72#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:22:24.72#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:22:24.72#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.06:22:24.72#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:24.72#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:22:24.84#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:22:24.84#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:22:24.84#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:22:24.84#ibcon#first serial, iclass 4, count 0 2006.229.06:22:24.84#ibcon#enter sib2, iclass 4, count 0 2006.229.06:22:24.84#ibcon#flushed, iclass 4, count 0 2006.229.06:22:24.84#ibcon#about to write, iclass 4, count 0 2006.229.06:22:24.84#ibcon#wrote, iclass 4, count 0 2006.229.06:22:24.84#ibcon#about to read 3, iclass 4, count 0 2006.229.06:22:24.86#ibcon#read 3, iclass 4, count 0 2006.229.06:22:24.86#ibcon#about to read 4, iclass 4, count 0 2006.229.06:22:24.86#ibcon#read 4, iclass 4, count 0 2006.229.06:22:24.86#ibcon#about to read 5, iclass 4, count 0 2006.229.06:22:24.86#ibcon#read 5, iclass 4, count 0 2006.229.06:22:24.86#ibcon#about to read 6, iclass 4, count 0 2006.229.06:22:24.86#ibcon#read 6, iclass 4, count 0 2006.229.06:22:24.86#ibcon#end of sib2, iclass 4, count 0 2006.229.06:22:24.86#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:22:24.86#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:22:24.86#ibcon#[27=USB\r\n] 2006.229.06:22:24.86#ibcon#*before write, iclass 4, count 0 2006.229.06:22:24.86#ibcon#enter sib2, iclass 4, count 0 2006.229.06:22:24.86#ibcon#flushed, iclass 4, count 0 2006.229.06:22:24.86#ibcon#about to write, iclass 4, count 0 2006.229.06:22:24.86#ibcon#wrote, iclass 4, count 0 2006.229.06:22:24.86#ibcon#about to read 3, iclass 4, count 0 2006.229.06:22:24.89#ibcon#read 3, iclass 4, count 0 2006.229.06:22:24.89#ibcon#about to read 4, iclass 4, count 0 2006.229.06:22:24.89#ibcon#read 4, iclass 4, count 0 2006.229.06:22:24.89#ibcon#about to read 5, iclass 4, count 0 2006.229.06:22:24.89#ibcon#read 5, iclass 4, count 0 2006.229.06:22:24.89#ibcon#about to read 6, iclass 4, count 0 2006.229.06:22:24.89#ibcon#read 6, iclass 4, count 0 2006.229.06:22:24.89#ibcon#end of sib2, iclass 4, count 0 2006.229.06:22:24.89#ibcon#*after write, iclass 4, count 0 2006.229.06:22:24.89#ibcon#*before return 0, iclass 4, count 0 2006.229.06:22:24.89#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:22:24.89#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:22:24.89#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:22:24.89#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:22:24.89$vck44/vblo=7,734.99 2006.229.06:22:24.89#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:22:24.89#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:22:24.89#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:24.89#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:24.89#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:24.89#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:24.89#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:22:24.89#ibcon#first serial, iclass 6, count 0 2006.229.06:22:24.89#ibcon#enter sib2, iclass 6, count 0 2006.229.06:22:24.89#ibcon#flushed, iclass 6, count 0 2006.229.06:22:24.89#ibcon#about to write, iclass 6, count 0 2006.229.06:22:24.89#ibcon#wrote, iclass 6, count 0 2006.229.06:22:24.89#ibcon#about to read 3, iclass 6, count 0 2006.229.06:22:24.91#ibcon#read 3, iclass 6, count 0 2006.229.06:22:24.91#ibcon#about to read 4, iclass 6, count 0 2006.229.06:22:24.91#ibcon#read 4, iclass 6, count 0 2006.229.06:22:24.91#ibcon#about to read 5, iclass 6, count 0 2006.229.06:22:24.91#ibcon#read 5, iclass 6, count 0 2006.229.06:22:24.91#ibcon#about to read 6, iclass 6, count 0 2006.229.06:22:24.91#ibcon#read 6, iclass 6, count 0 2006.229.06:22:24.91#ibcon#end of sib2, iclass 6, count 0 2006.229.06:22:24.91#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:22:24.91#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:22:24.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:22:24.91#ibcon#*before write, iclass 6, count 0 2006.229.06:22:24.91#ibcon#enter sib2, iclass 6, count 0 2006.229.06:22:24.91#ibcon#flushed, iclass 6, count 0 2006.229.06:22:24.91#ibcon#about to write, iclass 6, count 0 2006.229.06:22:24.91#ibcon#wrote, iclass 6, count 0 2006.229.06:22:24.91#ibcon#about to read 3, iclass 6, count 0 2006.229.06:22:24.95#ibcon#read 3, iclass 6, count 0 2006.229.06:22:24.95#ibcon#about to read 4, iclass 6, count 0 2006.229.06:22:24.95#ibcon#read 4, iclass 6, count 0 2006.229.06:22:24.95#ibcon#about to read 5, iclass 6, count 0 2006.229.06:22:24.95#ibcon#read 5, iclass 6, count 0 2006.229.06:22:24.95#ibcon#about to read 6, iclass 6, count 0 2006.229.06:22:24.95#ibcon#read 6, iclass 6, count 0 2006.229.06:22:24.95#ibcon#end of sib2, iclass 6, count 0 2006.229.06:22:24.95#ibcon#*after write, iclass 6, count 0 2006.229.06:22:24.95#ibcon#*before return 0, iclass 6, count 0 2006.229.06:22:24.95#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:24.95#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:22:24.95#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:22:24.95#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:22:24.95$vck44/vb=7,4 2006.229.06:22:24.95#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.06:22:24.95#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.06:22:24.95#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:24.95#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:25.01#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:25.01#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:25.01#ibcon#enter wrdev, iclass 10, count 2 2006.229.06:22:25.01#ibcon#first serial, iclass 10, count 2 2006.229.06:22:25.01#ibcon#enter sib2, iclass 10, count 2 2006.229.06:22:25.01#ibcon#flushed, iclass 10, count 2 2006.229.06:22:25.01#ibcon#about to write, iclass 10, count 2 2006.229.06:22:25.01#ibcon#wrote, iclass 10, count 2 2006.229.06:22:25.01#ibcon#about to read 3, iclass 10, count 2 2006.229.06:22:25.03#ibcon#read 3, iclass 10, count 2 2006.229.06:22:25.03#ibcon#about to read 4, iclass 10, count 2 2006.229.06:22:25.03#ibcon#read 4, iclass 10, count 2 2006.229.06:22:25.03#ibcon#about to read 5, iclass 10, count 2 2006.229.06:22:25.03#ibcon#read 5, iclass 10, count 2 2006.229.06:22:25.03#ibcon#about to read 6, iclass 10, count 2 2006.229.06:22:25.03#ibcon#read 6, iclass 10, count 2 2006.229.06:22:25.03#ibcon#end of sib2, iclass 10, count 2 2006.229.06:22:25.03#ibcon#*mode == 0, iclass 10, count 2 2006.229.06:22:25.03#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.06:22:25.03#ibcon#[27=AT07-04\r\n] 2006.229.06:22:25.03#ibcon#*before write, iclass 10, count 2 2006.229.06:22:25.03#ibcon#enter sib2, iclass 10, count 2 2006.229.06:22:25.03#ibcon#flushed, iclass 10, count 2 2006.229.06:22:25.03#ibcon#about to write, iclass 10, count 2 2006.229.06:22:25.03#ibcon#wrote, iclass 10, count 2 2006.229.06:22:25.03#ibcon#about to read 3, iclass 10, count 2 2006.229.06:22:25.06#ibcon#read 3, iclass 10, count 2 2006.229.06:22:25.06#ibcon#about to read 4, iclass 10, count 2 2006.229.06:22:25.06#ibcon#read 4, iclass 10, count 2 2006.229.06:22:25.06#ibcon#about to read 5, iclass 10, count 2 2006.229.06:22:25.06#ibcon#read 5, iclass 10, count 2 2006.229.06:22:25.06#ibcon#about to read 6, iclass 10, count 2 2006.229.06:22:25.06#ibcon#read 6, iclass 10, count 2 2006.229.06:22:25.06#ibcon#end of sib2, iclass 10, count 2 2006.229.06:22:25.06#ibcon#*after write, iclass 10, count 2 2006.229.06:22:25.06#ibcon#*before return 0, iclass 10, count 2 2006.229.06:22:25.06#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:25.06#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:22:25.06#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.06:22:25.06#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:25.06#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:25.18#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:25.18#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:25.18#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:22:25.18#ibcon#first serial, iclass 10, count 0 2006.229.06:22:25.18#ibcon#enter sib2, iclass 10, count 0 2006.229.06:22:25.18#ibcon#flushed, iclass 10, count 0 2006.229.06:22:25.18#ibcon#about to write, iclass 10, count 0 2006.229.06:22:25.18#ibcon#wrote, iclass 10, count 0 2006.229.06:22:25.18#ibcon#about to read 3, iclass 10, count 0 2006.229.06:22:25.20#ibcon#read 3, iclass 10, count 0 2006.229.06:22:25.20#ibcon#about to read 4, iclass 10, count 0 2006.229.06:22:25.20#ibcon#read 4, iclass 10, count 0 2006.229.06:22:25.20#ibcon#about to read 5, iclass 10, count 0 2006.229.06:22:25.20#ibcon#read 5, iclass 10, count 0 2006.229.06:22:25.20#ibcon#about to read 6, iclass 10, count 0 2006.229.06:22:25.20#ibcon#read 6, iclass 10, count 0 2006.229.06:22:25.20#ibcon#end of sib2, iclass 10, count 0 2006.229.06:22:25.20#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:22:25.20#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:22:25.20#ibcon#[27=USB\r\n] 2006.229.06:22:25.20#ibcon#*before write, iclass 10, count 0 2006.229.06:22:25.20#ibcon#enter sib2, iclass 10, count 0 2006.229.06:22:25.20#ibcon#flushed, iclass 10, count 0 2006.229.06:22:25.20#ibcon#about to write, iclass 10, count 0 2006.229.06:22:25.20#ibcon#wrote, iclass 10, count 0 2006.229.06:22:25.20#ibcon#about to read 3, iclass 10, count 0 2006.229.06:22:25.23#ibcon#read 3, iclass 10, count 0 2006.229.06:22:25.23#ibcon#about to read 4, iclass 10, count 0 2006.229.06:22:25.23#ibcon#read 4, iclass 10, count 0 2006.229.06:22:25.23#ibcon#about to read 5, iclass 10, count 0 2006.229.06:22:25.23#ibcon#read 5, iclass 10, count 0 2006.229.06:22:25.23#ibcon#about to read 6, iclass 10, count 0 2006.229.06:22:25.23#ibcon#read 6, iclass 10, count 0 2006.229.06:22:25.23#ibcon#end of sib2, iclass 10, count 0 2006.229.06:22:25.23#ibcon#*after write, iclass 10, count 0 2006.229.06:22:25.23#ibcon#*before return 0, iclass 10, count 0 2006.229.06:22:25.23#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:25.23#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:22:25.23#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:22:25.23#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:22:25.23$vck44/vblo=8,744.99 2006.229.06:22:25.23#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.06:22:25.23#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.06:22:25.23#ibcon#ireg 17 cls_cnt 0 2006.229.06:22:25.23#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:25.23#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:25.23#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:25.23#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:22:25.23#ibcon#first serial, iclass 12, count 0 2006.229.06:22:25.23#ibcon#enter sib2, iclass 12, count 0 2006.229.06:22:25.23#ibcon#flushed, iclass 12, count 0 2006.229.06:22:25.23#ibcon#about to write, iclass 12, count 0 2006.229.06:22:25.23#ibcon#wrote, iclass 12, count 0 2006.229.06:22:25.23#ibcon#about to read 3, iclass 12, count 0 2006.229.06:22:25.25#ibcon#read 3, iclass 12, count 0 2006.229.06:22:25.25#ibcon#about to read 4, iclass 12, count 0 2006.229.06:22:25.25#ibcon#read 4, iclass 12, count 0 2006.229.06:22:25.25#ibcon#about to read 5, iclass 12, count 0 2006.229.06:22:25.25#ibcon#read 5, iclass 12, count 0 2006.229.06:22:25.25#ibcon#about to read 6, iclass 12, count 0 2006.229.06:22:25.25#ibcon#read 6, iclass 12, count 0 2006.229.06:22:25.25#ibcon#end of sib2, iclass 12, count 0 2006.229.06:22:25.25#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:22:25.25#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:22:25.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:22:25.25#ibcon#*before write, iclass 12, count 0 2006.229.06:22:25.25#ibcon#enter sib2, iclass 12, count 0 2006.229.06:22:25.25#ibcon#flushed, iclass 12, count 0 2006.229.06:22:25.25#ibcon#about to write, iclass 12, count 0 2006.229.06:22:25.25#ibcon#wrote, iclass 12, count 0 2006.229.06:22:25.25#ibcon#about to read 3, iclass 12, count 0 2006.229.06:22:25.29#ibcon#read 3, iclass 12, count 0 2006.229.06:22:25.29#ibcon#about to read 4, iclass 12, count 0 2006.229.06:22:25.29#ibcon#read 4, iclass 12, count 0 2006.229.06:22:25.29#ibcon#about to read 5, iclass 12, count 0 2006.229.06:22:25.29#ibcon#read 5, iclass 12, count 0 2006.229.06:22:25.29#ibcon#about to read 6, iclass 12, count 0 2006.229.06:22:25.29#ibcon#read 6, iclass 12, count 0 2006.229.06:22:25.29#ibcon#end of sib2, iclass 12, count 0 2006.229.06:22:25.29#ibcon#*after write, iclass 12, count 0 2006.229.06:22:25.29#ibcon#*before return 0, iclass 12, count 0 2006.229.06:22:25.29#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:25.29#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:22:25.29#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:22:25.29#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:22:25.29$vck44/vb=8,4 2006.229.06:22:25.29#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.06:22:25.29#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.06:22:25.29#ibcon#ireg 11 cls_cnt 2 2006.229.06:22:25.29#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:25.35#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:25.35#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:25.35#ibcon#enter wrdev, iclass 14, count 2 2006.229.06:22:25.35#ibcon#first serial, iclass 14, count 2 2006.229.06:22:25.35#ibcon#enter sib2, iclass 14, count 2 2006.229.06:22:25.35#ibcon#flushed, iclass 14, count 2 2006.229.06:22:25.35#ibcon#about to write, iclass 14, count 2 2006.229.06:22:25.35#ibcon#wrote, iclass 14, count 2 2006.229.06:22:25.35#ibcon#about to read 3, iclass 14, count 2 2006.229.06:22:25.37#ibcon#read 3, iclass 14, count 2 2006.229.06:22:25.37#ibcon#about to read 4, iclass 14, count 2 2006.229.06:22:25.37#ibcon#read 4, iclass 14, count 2 2006.229.06:22:25.37#ibcon#about to read 5, iclass 14, count 2 2006.229.06:22:25.37#ibcon#read 5, iclass 14, count 2 2006.229.06:22:25.37#ibcon#about to read 6, iclass 14, count 2 2006.229.06:22:25.37#ibcon#read 6, iclass 14, count 2 2006.229.06:22:25.37#ibcon#end of sib2, iclass 14, count 2 2006.229.06:22:25.37#ibcon#*mode == 0, iclass 14, count 2 2006.229.06:22:25.37#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.06:22:25.37#ibcon#[27=AT08-04\r\n] 2006.229.06:22:25.37#ibcon#*before write, iclass 14, count 2 2006.229.06:22:25.37#ibcon#enter sib2, iclass 14, count 2 2006.229.06:22:25.37#ibcon#flushed, iclass 14, count 2 2006.229.06:22:25.37#ibcon#about to write, iclass 14, count 2 2006.229.06:22:25.37#ibcon#wrote, iclass 14, count 2 2006.229.06:22:25.37#ibcon#about to read 3, iclass 14, count 2 2006.229.06:22:25.40#ibcon#read 3, iclass 14, count 2 2006.229.06:22:25.40#ibcon#about to read 4, iclass 14, count 2 2006.229.06:22:25.40#ibcon#read 4, iclass 14, count 2 2006.229.06:22:25.40#ibcon#about to read 5, iclass 14, count 2 2006.229.06:22:25.40#ibcon#read 5, iclass 14, count 2 2006.229.06:22:25.40#ibcon#about to read 6, iclass 14, count 2 2006.229.06:22:25.40#ibcon#read 6, iclass 14, count 2 2006.229.06:22:25.40#ibcon#end of sib2, iclass 14, count 2 2006.229.06:22:25.40#ibcon#*after write, iclass 14, count 2 2006.229.06:22:25.40#ibcon#*before return 0, iclass 14, count 2 2006.229.06:22:25.40#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:25.40#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:22:25.40#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.06:22:25.40#ibcon#ireg 7 cls_cnt 0 2006.229.06:22:25.40#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:25.52#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:25.52#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:25.52#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:22:25.52#ibcon#first serial, iclass 14, count 0 2006.229.06:22:25.52#ibcon#enter sib2, iclass 14, count 0 2006.229.06:22:25.52#ibcon#flushed, iclass 14, count 0 2006.229.06:22:25.52#ibcon#about to write, iclass 14, count 0 2006.229.06:22:25.52#ibcon#wrote, iclass 14, count 0 2006.229.06:22:25.52#ibcon#about to read 3, iclass 14, count 0 2006.229.06:22:25.54#ibcon#read 3, iclass 14, count 0 2006.229.06:22:25.54#ibcon#about to read 4, iclass 14, count 0 2006.229.06:22:25.54#ibcon#read 4, iclass 14, count 0 2006.229.06:22:25.54#ibcon#about to read 5, iclass 14, count 0 2006.229.06:22:25.54#ibcon#read 5, iclass 14, count 0 2006.229.06:22:25.54#ibcon#about to read 6, iclass 14, count 0 2006.229.06:22:25.54#ibcon#read 6, iclass 14, count 0 2006.229.06:22:25.54#ibcon#end of sib2, iclass 14, count 0 2006.229.06:22:25.54#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:22:25.54#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:22:25.54#ibcon#[27=USB\r\n] 2006.229.06:22:25.54#ibcon#*before write, iclass 14, count 0 2006.229.06:22:25.54#ibcon#enter sib2, iclass 14, count 0 2006.229.06:22:25.54#ibcon#flushed, iclass 14, count 0 2006.229.06:22:25.54#ibcon#about to write, iclass 14, count 0 2006.229.06:22:25.54#ibcon#wrote, iclass 14, count 0 2006.229.06:22:25.54#ibcon#about to read 3, iclass 14, count 0 2006.229.06:22:25.57#ibcon#read 3, iclass 14, count 0 2006.229.06:22:25.57#ibcon#about to read 4, iclass 14, count 0 2006.229.06:22:25.57#ibcon#read 4, iclass 14, count 0 2006.229.06:22:25.57#ibcon#about to read 5, iclass 14, count 0 2006.229.06:22:25.57#ibcon#read 5, iclass 14, count 0 2006.229.06:22:25.57#ibcon#about to read 6, iclass 14, count 0 2006.229.06:22:25.57#ibcon#read 6, iclass 14, count 0 2006.229.06:22:25.57#ibcon#end of sib2, iclass 14, count 0 2006.229.06:22:25.57#ibcon#*after write, iclass 14, count 0 2006.229.06:22:25.57#ibcon#*before return 0, iclass 14, count 0 2006.229.06:22:25.57#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:25.57#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:22:25.57#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:22:25.57#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:22:25.57$vck44/vabw=wide 2006.229.06:22:25.57#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:22:25.57#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:22:25.57#ibcon#ireg 8 cls_cnt 0 2006.229.06:22:25.57#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:25.57#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:25.57#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:25.57#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:22:25.57#ibcon#first serial, iclass 16, count 0 2006.229.06:22:25.57#ibcon#enter sib2, iclass 16, count 0 2006.229.06:22:25.57#ibcon#flushed, iclass 16, count 0 2006.229.06:22:25.57#ibcon#about to write, iclass 16, count 0 2006.229.06:22:25.57#ibcon#wrote, iclass 16, count 0 2006.229.06:22:25.57#ibcon#about to read 3, iclass 16, count 0 2006.229.06:22:25.59#ibcon#read 3, iclass 16, count 0 2006.229.06:22:25.59#ibcon#about to read 4, iclass 16, count 0 2006.229.06:22:25.59#ibcon#read 4, iclass 16, count 0 2006.229.06:22:25.59#ibcon#about to read 5, iclass 16, count 0 2006.229.06:22:25.59#ibcon#read 5, iclass 16, count 0 2006.229.06:22:25.59#ibcon#about to read 6, iclass 16, count 0 2006.229.06:22:25.59#ibcon#read 6, iclass 16, count 0 2006.229.06:22:25.59#ibcon#end of sib2, iclass 16, count 0 2006.229.06:22:25.59#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:22:25.59#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:22:25.59#ibcon#[25=BW32\r\n] 2006.229.06:22:25.59#ibcon#*before write, iclass 16, count 0 2006.229.06:22:25.59#ibcon#enter sib2, iclass 16, count 0 2006.229.06:22:25.59#ibcon#flushed, iclass 16, count 0 2006.229.06:22:25.59#ibcon#about to write, iclass 16, count 0 2006.229.06:22:25.59#ibcon#wrote, iclass 16, count 0 2006.229.06:22:25.59#ibcon#about to read 3, iclass 16, count 0 2006.229.06:22:25.62#ibcon#read 3, iclass 16, count 0 2006.229.06:22:25.62#ibcon#about to read 4, iclass 16, count 0 2006.229.06:22:25.62#ibcon#read 4, iclass 16, count 0 2006.229.06:22:25.62#ibcon#about to read 5, iclass 16, count 0 2006.229.06:22:25.62#ibcon#read 5, iclass 16, count 0 2006.229.06:22:25.62#ibcon#about to read 6, iclass 16, count 0 2006.229.06:22:25.62#ibcon#read 6, iclass 16, count 0 2006.229.06:22:25.62#ibcon#end of sib2, iclass 16, count 0 2006.229.06:22:25.62#ibcon#*after write, iclass 16, count 0 2006.229.06:22:25.62#ibcon#*before return 0, iclass 16, count 0 2006.229.06:22:25.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:25.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:22:25.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:22:25.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:22:25.62$vck44/vbbw=wide 2006.229.06:22:25.62#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.06:22:25.62#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.06:22:25.62#ibcon#ireg 8 cls_cnt 0 2006.229.06:22:25.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:22:25.69#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:22:25.69#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:22:25.69#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:22:25.69#ibcon#first serial, iclass 18, count 0 2006.229.06:22:25.69#ibcon#enter sib2, iclass 18, count 0 2006.229.06:22:25.69#ibcon#flushed, iclass 18, count 0 2006.229.06:22:25.69#ibcon#about to write, iclass 18, count 0 2006.229.06:22:25.69#ibcon#wrote, iclass 18, count 0 2006.229.06:22:25.69#ibcon#about to read 3, iclass 18, count 0 2006.229.06:22:25.71#ibcon#read 3, iclass 18, count 0 2006.229.06:22:25.71#ibcon#about to read 4, iclass 18, count 0 2006.229.06:22:25.71#ibcon#read 4, iclass 18, count 0 2006.229.06:22:25.71#ibcon#about to read 5, iclass 18, count 0 2006.229.06:22:25.71#ibcon#read 5, iclass 18, count 0 2006.229.06:22:25.71#ibcon#about to read 6, iclass 18, count 0 2006.229.06:22:25.71#ibcon#read 6, iclass 18, count 0 2006.229.06:22:25.71#ibcon#end of sib2, iclass 18, count 0 2006.229.06:22:25.71#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:22:25.71#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:22:25.71#ibcon#[27=BW32\r\n] 2006.229.06:22:25.71#ibcon#*before write, iclass 18, count 0 2006.229.06:22:25.71#ibcon#enter sib2, iclass 18, count 0 2006.229.06:22:25.71#ibcon#flushed, iclass 18, count 0 2006.229.06:22:25.71#ibcon#about to write, iclass 18, count 0 2006.229.06:22:25.71#ibcon#wrote, iclass 18, count 0 2006.229.06:22:25.71#ibcon#about to read 3, iclass 18, count 0 2006.229.06:22:25.74#ibcon#read 3, iclass 18, count 0 2006.229.06:22:25.74#ibcon#about to read 4, iclass 18, count 0 2006.229.06:22:25.74#ibcon#read 4, iclass 18, count 0 2006.229.06:22:25.74#ibcon#about to read 5, iclass 18, count 0 2006.229.06:22:25.74#ibcon#read 5, iclass 18, count 0 2006.229.06:22:25.74#ibcon#about to read 6, iclass 18, count 0 2006.229.06:22:25.74#ibcon#read 6, iclass 18, count 0 2006.229.06:22:25.74#ibcon#end of sib2, iclass 18, count 0 2006.229.06:22:25.74#ibcon#*after write, iclass 18, count 0 2006.229.06:22:25.74#ibcon#*before return 0, iclass 18, count 0 2006.229.06:22:25.74#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:22:25.74#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:22:25.74#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:22:25.74#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:22:25.74$setupk4/ifdk4 2006.229.06:22:25.74$ifdk4/lo= 2006.229.06:22:25.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:22:25.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:22:25.74$ifdk4/patch= 2006.229.06:22:25.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:22:25.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:22:25.74$setupk4/!*+20s 2006.229.06:22:31.74#abcon#<5=/05 2.7 5.4 30.46 91 999.4\r\n> 2006.229.06:22:31.76#abcon#{5=INTERFACE CLEAR} 2006.229.06:22:31.82#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:22:40.25$setupk4/"tpicd 2006.229.06:22:40.25$setupk4/echo=off 2006.229.06:22:40.25$setupk4/xlog=off 2006.229.06:22:40.25:!2006.229.06:27:00 2006.229.06:22:42.14#trakl#Source acquired 2006.229.06:22:42.14#flagr#flagr/antenna,acquired 2006.229.06:27:00.00:preob 2006.229.06:27:01.14/onsource/TRACKING 2006.229.06:27:01.14:!2006.229.06:27:10 2006.229.06:27:10.00:"tape 2006.229.06:27:10.00:"st=record 2006.229.06:27:10.00:data_valid=on 2006.229.06:27:10.01:midob 2006.229.06:27:11.14/onsource/TRACKING 2006.229.06:27:11.14/wx/30.40,999.6,90 2006.229.06:27:11.34/cable/+6.3971E-03 2006.229.06:27:12.43/va/01,08,usb,yes,32,35 2006.229.06:27:12.43/va/02,07,usb,yes,35,35 2006.229.06:27:12.43/va/03,06,usb,yes,43,46 2006.229.06:27:12.43/va/04,07,usb,yes,36,38 2006.229.06:27:12.43/va/05,04,usb,yes,32,33 2006.229.06:27:12.43/va/06,04,usb,yes,36,36 2006.229.06:27:12.43/va/07,05,usb,yes,32,33 2006.229.06:27:12.43/va/08,06,usb,yes,23,29 2006.229.06:27:12.66/valo/01,524.99,yes,locked 2006.229.06:27:12.66/valo/02,534.99,yes,locked 2006.229.06:27:12.66/valo/03,564.99,yes,locked 2006.229.06:27:12.66/valo/04,624.99,yes,locked 2006.229.06:27:12.66/valo/05,734.99,yes,locked 2006.229.06:27:12.66/valo/06,814.99,yes,locked 2006.229.06:27:12.66/valo/07,864.99,yes,locked 2006.229.06:27:12.66/valo/08,884.99,yes,locked 2006.229.06:27:13.75/vb/01,04,usb,yes,32,29 2006.229.06:27:13.75/vb/02,04,usb,yes,34,34 2006.229.06:27:13.75/vb/03,04,usb,yes,31,34 2006.229.06:27:13.75/vb/04,04,usb,yes,36,35 2006.229.06:27:13.75/vb/05,04,usb,yes,28,30 2006.229.06:27:13.75/vb/06,04,usb,yes,33,29 2006.229.06:27:13.75/vb/07,04,usb,yes,32,32 2006.229.06:27:13.75/vb/08,04,usb,yes,30,33 2006.229.06:27:13.99/vblo/01,629.99,yes,locked 2006.229.06:27:13.99/vblo/02,634.99,yes,locked 2006.229.06:27:13.99/vblo/03,649.99,yes,locked 2006.229.06:27:13.99/vblo/04,679.99,yes,locked 2006.229.06:27:13.99/vblo/05,709.99,yes,locked 2006.229.06:27:13.99/vblo/06,719.99,yes,locked 2006.229.06:27:13.99/vblo/07,734.99,yes,locked 2006.229.06:27:13.99/vblo/08,744.99,yes,locked 2006.229.06:27:14.14/vabw/8 2006.229.06:27:14.29/vbbw/8 2006.229.06:27:14.38/xfe/off,on,12.0 2006.229.06:27:14.76/ifatt/23,28,28,28 2006.229.06:27:15.07/fmout-gps/S +4.54E-07 2006.229.06:27:15.12:!2006.229.06:34:50 2006.229.06:34:50.00:data_valid=off 2006.229.06:34:50.00:"et 2006.229.06:34:50.01:!+3s 2006.229.06:34:53.02:"tape 2006.229.06:34:53.02:postob 2006.229.06:34:53.14/cable/+6.3979E-03 2006.229.06:34:53.15/wx/30.32,999.7,91 2006.229.06:34:54.07/fmout-gps/S +4.56E-07 2006.229.06:34:54.07:scan_name=229-0638,jd0608,40 2006.229.06:34:54.08:source=1424-418,142756.30,-420619.4,2000.0,cw 2006.229.06:34:54.14#flagr#flagr/antenna,new-source 2006.229.06:34:55.14:checkk5 2006.229.06:34:55.58/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:34:55.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:34:56.55/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:34:57.16/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:34:57.55/chk_obsdata//k5ts1/T2290627??a.dat file size is correct (nominal:1840MB, actual:1836MB). 2006.229.06:34:57.95/chk_obsdata//k5ts2/T2290627??b.dat file size is correct (nominal:1840MB, actual:1836MB). 2006.229.06:34:58.35/chk_obsdata//k5ts3/T2290627??c.dat file size is correct (nominal:1840MB, actual:1836MB). 2006.229.06:34:58.75/chk_obsdata//k5ts4/T2290627??d.dat file size is correct (nominal:1840MB, actual:1836MB). 2006.229.06:34:59.50/k5log//k5ts1_log_newline 2006.229.06:35:00.20/k5log//k5ts2_log_newline 2006.229.06:35:00.89/k5log//k5ts3_log_newline 2006.229.06:35:01.60/k5log//k5ts4_log_newline 2006.229.06:35:01.63/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:35:01.63:setupk4=1 2006.229.06:35:01.63$setupk4/echo=on 2006.229.06:35:01.63$setupk4/pcalon 2006.229.06:35:01.63$pcalon/"no phase cal control is implemented here 2006.229.06:35:01.63$setupk4/"tpicd=stop 2006.229.06:35:01.63$setupk4/"rec=synch_on 2006.229.06:35:01.63$setupk4/"rec_mode=128 2006.229.06:35:01.63$setupk4/!* 2006.229.06:35:01.63$setupk4/recpk4 2006.229.06:35:01.63$recpk4/recpatch= 2006.229.06:35:01.63$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:35:01.63$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:35:01.63$setupk4/vck44 2006.229.06:35:01.63$vck44/valo=1,524.99 2006.229.06:35:01.63#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:35:01.63#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:35:01.63#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:01.63#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:01.63#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:01.63#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:01.63#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:35:01.63#ibcon#first serial, iclass 31, count 0 2006.229.06:35:01.63#ibcon#enter sib2, iclass 31, count 0 2006.229.06:35:01.63#ibcon#flushed, iclass 31, count 0 2006.229.06:35:01.63#ibcon#about to write, iclass 31, count 0 2006.229.06:35:01.63#ibcon#wrote, iclass 31, count 0 2006.229.06:35:01.63#ibcon#about to read 3, iclass 31, count 0 2006.229.06:35:01.65#ibcon#read 3, iclass 31, count 0 2006.229.06:35:01.65#ibcon#about to read 4, iclass 31, count 0 2006.229.06:35:01.65#ibcon#read 4, iclass 31, count 0 2006.229.06:35:01.65#ibcon#about to read 5, iclass 31, count 0 2006.229.06:35:01.65#ibcon#read 5, iclass 31, count 0 2006.229.06:35:01.65#ibcon#about to read 6, iclass 31, count 0 2006.229.06:35:01.65#ibcon#read 6, iclass 31, count 0 2006.229.06:35:01.65#ibcon#end of sib2, iclass 31, count 0 2006.229.06:35:01.65#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:35:01.65#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:35:01.65#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:35:01.65#ibcon#*before write, iclass 31, count 0 2006.229.06:35:01.65#ibcon#enter sib2, iclass 31, count 0 2006.229.06:35:01.65#ibcon#flushed, iclass 31, count 0 2006.229.06:35:01.65#ibcon#about to write, iclass 31, count 0 2006.229.06:35:01.65#ibcon#wrote, iclass 31, count 0 2006.229.06:35:01.65#ibcon#about to read 3, iclass 31, count 0 2006.229.06:35:01.70#ibcon#read 3, iclass 31, count 0 2006.229.06:35:01.70#ibcon#about to read 4, iclass 31, count 0 2006.229.06:35:01.70#ibcon#read 4, iclass 31, count 0 2006.229.06:35:01.70#ibcon#about to read 5, iclass 31, count 0 2006.229.06:35:01.70#ibcon#read 5, iclass 31, count 0 2006.229.06:35:01.70#ibcon#about to read 6, iclass 31, count 0 2006.229.06:35:01.70#ibcon#read 6, iclass 31, count 0 2006.229.06:35:01.70#ibcon#end of sib2, iclass 31, count 0 2006.229.06:35:01.70#ibcon#*after write, iclass 31, count 0 2006.229.06:35:01.70#ibcon#*before return 0, iclass 31, count 0 2006.229.06:35:01.70#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:01.70#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:01.70#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:35:01.70#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:35:01.70$vck44/va=1,8 2006.229.06:35:01.70#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.06:35:01.70#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.06:35:01.70#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:01.70#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:35:01.70#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:35:01.70#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:35:01.70#ibcon#enter wrdev, iclass 33, count 2 2006.229.06:35:01.70#ibcon#first serial, iclass 33, count 2 2006.229.06:35:01.70#ibcon#enter sib2, iclass 33, count 2 2006.229.06:35:01.70#ibcon#flushed, iclass 33, count 2 2006.229.06:35:01.70#ibcon#about to write, iclass 33, count 2 2006.229.06:35:01.70#ibcon#wrote, iclass 33, count 2 2006.229.06:35:01.70#ibcon#about to read 3, iclass 33, count 2 2006.229.06:35:01.72#ibcon#read 3, iclass 33, count 2 2006.229.06:35:01.72#ibcon#about to read 4, iclass 33, count 2 2006.229.06:35:01.72#ibcon#read 4, iclass 33, count 2 2006.229.06:35:01.72#ibcon#about to read 5, iclass 33, count 2 2006.229.06:35:01.72#ibcon#read 5, iclass 33, count 2 2006.229.06:35:01.72#ibcon#about to read 6, iclass 33, count 2 2006.229.06:35:01.72#ibcon#read 6, iclass 33, count 2 2006.229.06:35:01.72#ibcon#end of sib2, iclass 33, count 2 2006.229.06:35:01.72#ibcon#*mode == 0, iclass 33, count 2 2006.229.06:35:01.72#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.06:35:01.72#ibcon#[25=AT01-08\r\n] 2006.229.06:35:01.72#ibcon#*before write, iclass 33, count 2 2006.229.06:35:01.72#ibcon#enter sib2, iclass 33, count 2 2006.229.06:35:01.72#ibcon#flushed, iclass 33, count 2 2006.229.06:35:01.72#ibcon#about to write, iclass 33, count 2 2006.229.06:35:01.72#ibcon#wrote, iclass 33, count 2 2006.229.06:35:01.72#ibcon#about to read 3, iclass 33, count 2 2006.229.06:35:01.75#ibcon#read 3, iclass 33, count 2 2006.229.06:35:01.75#ibcon#about to read 4, iclass 33, count 2 2006.229.06:35:01.75#ibcon#read 4, iclass 33, count 2 2006.229.06:35:01.75#ibcon#about to read 5, iclass 33, count 2 2006.229.06:35:01.75#ibcon#read 5, iclass 33, count 2 2006.229.06:35:01.75#ibcon#about to read 6, iclass 33, count 2 2006.229.06:35:01.75#ibcon#read 6, iclass 33, count 2 2006.229.06:35:01.75#ibcon#end of sib2, iclass 33, count 2 2006.229.06:35:01.75#ibcon#*after write, iclass 33, count 2 2006.229.06:35:01.75#ibcon#*before return 0, iclass 33, count 2 2006.229.06:35:01.75#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:35:01.75#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:35:01.75#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.06:35:01.75#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:01.75#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:35:01.87#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:35:01.87#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:35:01.87#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:35:01.87#ibcon#first serial, iclass 33, count 0 2006.229.06:35:01.87#ibcon#enter sib2, iclass 33, count 0 2006.229.06:35:01.87#ibcon#flushed, iclass 33, count 0 2006.229.06:35:01.87#ibcon#about to write, iclass 33, count 0 2006.229.06:35:01.87#ibcon#wrote, iclass 33, count 0 2006.229.06:35:01.87#ibcon#about to read 3, iclass 33, count 0 2006.229.06:35:01.89#ibcon#read 3, iclass 33, count 0 2006.229.06:35:01.89#ibcon#about to read 4, iclass 33, count 0 2006.229.06:35:01.89#ibcon#read 4, iclass 33, count 0 2006.229.06:35:01.89#ibcon#about to read 5, iclass 33, count 0 2006.229.06:35:01.89#ibcon#read 5, iclass 33, count 0 2006.229.06:35:01.89#ibcon#about to read 6, iclass 33, count 0 2006.229.06:35:01.89#ibcon#read 6, iclass 33, count 0 2006.229.06:35:01.89#ibcon#end of sib2, iclass 33, count 0 2006.229.06:35:01.89#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:35:01.89#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:35:01.89#ibcon#[25=USB\r\n] 2006.229.06:35:01.89#ibcon#*before write, iclass 33, count 0 2006.229.06:35:01.89#ibcon#enter sib2, iclass 33, count 0 2006.229.06:35:01.89#ibcon#flushed, iclass 33, count 0 2006.229.06:35:01.89#ibcon#about to write, iclass 33, count 0 2006.229.06:35:01.89#ibcon#wrote, iclass 33, count 0 2006.229.06:35:01.89#ibcon#about to read 3, iclass 33, count 0 2006.229.06:35:01.92#ibcon#read 3, iclass 33, count 0 2006.229.06:35:01.92#ibcon#about to read 4, iclass 33, count 0 2006.229.06:35:01.92#ibcon#read 4, iclass 33, count 0 2006.229.06:35:01.92#ibcon#about to read 5, iclass 33, count 0 2006.229.06:35:01.92#ibcon#read 5, iclass 33, count 0 2006.229.06:35:01.92#ibcon#about to read 6, iclass 33, count 0 2006.229.06:35:01.92#ibcon#read 6, iclass 33, count 0 2006.229.06:35:01.92#ibcon#end of sib2, iclass 33, count 0 2006.229.06:35:01.92#ibcon#*after write, iclass 33, count 0 2006.229.06:35:01.92#ibcon#*before return 0, iclass 33, count 0 2006.229.06:35:01.92#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:35:01.92#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:35:01.92#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:35:01.92#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:35:01.92$vck44/valo=2,534.99 2006.229.06:35:01.92#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.06:35:01.92#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.06:35:01.92#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:01.92#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:35:01.92#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:35:01.92#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:35:01.92#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:35:01.92#ibcon#first serial, iclass 35, count 0 2006.229.06:35:01.92#ibcon#enter sib2, iclass 35, count 0 2006.229.06:35:01.92#ibcon#flushed, iclass 35, count 0 2006.229.06:35:01.92#ibcon#about to write, iclass 35, count 0 2006.229.06:35:01.92#ibcon#wrote, iclass 35, count 0 2006.229.06:35:01.92#ibcon#about to read 3, iclass 35, count 0 2006.229.06:35:01.94#ibcon#read 3, iclass 35, count 0 2006.229.06:35:01.94#ibcon#about to read 4, iclass 35, count 0 2006.229.06:35:01.94#ibcon#read 4, iclass 35, count 0 2006.229.06:35:01.94#ibcon#about to read 5, iclass 35, count 0 2006.229.06:35:01.94#ibcon#read 5, iclass 35, count 0 2006.229.06:35:01.94#ibcon#about to read 6, iclass 35, count 0 2006.229.06:35:01.94#ibcon#read 6, iclass 35, count 0 2006.229.06:35:01.94#ibcon#end of sib2, iclass 35, count 0 2006.229.06:35:01.94#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:35:01.94#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:35:01.94#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:35:01.94#ibcon#*before write, iclass 35, count 0 2006.229.06:35:01.94#ibcon#enter sib2, iclass 35, count 0 2006.229.06:35:01.94#ibcon#flushed, iclass 35, count 0 2006.229.06:35:01.94#ibcon#about to write, iclass 35, count 0 2006.229.06:35:01.94#ibcon#wrote, iclass 35, count 0 2006.229.06:35:01.94#ibcon#about to read 3, iclass 35, count 0 2006.229.06:35:01.98#ibcon#read 3, iclass 35, count 0 2006.229.06:35:01.98#ibcon#about to read 4, iclass 35, count 0 2006.229.06:35:01.98#ibcon#read 4, iclass 35, count 0 2006.229.06:35:01.98#ibcon#about to read 5, iclass 35, count 0 2006.229.06:35:01.98#ibcon#read 5, iclass 35, count 0 2006.229.06:35:01.98#ibcon#about to read 6, iclass 35, count 0 2006.229.06:35:01.98#ibcon#read 6, iclass 35, count 0 2006.229.06:35:01.98#ibcon#end of sib2, iclass 35, count 0 2006.229.06:35:01.98#ibcon#*after write, iclass 35, count 0 2006.229.06:35:01.98#ibcon#*before return 0, iclass 35, count 0 2006.229.06:35:01.98#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:35:01.98#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:35:01.98#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:35:01.98#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:35:01.98$vck44/va=2,7 2006.229.06:35:01.98#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.06:35:01.98#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.06:35:01.98#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:01.98#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:35:02.04#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:35:02.04#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:35:02.04#ibcon#enter wrdev, iclass 37, count 2 2006.229.06:35:02.04#ibcon#first serial, iclass 37, count 2 2006.229.06:35:02.04#ibcon#enter sib2, iclass 37, count 2 2006.229.06:35:02.04#ibcon#flushed, iclass 37, count 2 2006.229.06:35:02.04#ibcon#about to write, iclass 37, count 2 2006.229.06:35:02.04#ibcon#wrote, iclass 37, count 2 2006.229.06:35:02.04#ibcon#about to read 3, iclass 37, count 2 2006.229.06:35:02.06#ibcon#read 3, iclass 37, count 2 2006.229.06:35:02.06#ibcon#about to read 4, iclass 37, count 2 2006.229.06:35:02.06#ibcon#read 4, iclass 37, count 2 2006.229.06:35:02.06#ibcon#about to read 5, iclass 37, count 2 2006.229.06:35:02.06#ibcon#read 5, iclass 37, count 2 2006.229.06:35:02.06#ibcon#about to read 6, iclass 37, count 2 2006.229.06:35:02.06#ibcon#read 6, iclass 37, count 2 2006.229.06:35:02.06#ibcon#end of sib2, iclass 37, count 2 2006.229.06:35:02.06#ibcon#*mode == 0, iclass 37, count 2 2006.229.06:35:02.06#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.06:35:02.06#ibcon#[25=AT02-07\r\n] 2006.229.06:35:02.06#ibcon#*before write, iclass 37, count 2 2006.229.06:35:02.06#ibcon#enter sib2, iclass 37, count 2 2006.229.06:35:02.06#ibcon#flushed, iclass 37, count 2 2006.229.06:35:02.06#ibcon#about to write, iclass 37, count 2 2006.229.06:35:02.06#ibcon#wrote, iclass 37, count 2 2006.229.06:35:02.06#ibcon#about to read 3, iclass 37, count 2 2006.229.06:35:02.09#ibcon#read 3, iclass 37, count 2 2006.229.06:35:02.09#ibcon#about to read 4, iclass 37, count 2 2006.229.06:35:02.09#ibcon#read 4, iclass 37, count 2 2006.229.06:35:02.09#ibcon#about to read 5, iclass 37, count 2 2006.229.06:35:02.09#ibcon#read 5, iclass 37, count 2 2006.229.06:35:02.09#ibcon#about to read 6, iclass 37, count 2 2006.229.06:35:02.09#ibcon#read 6, iclass 37, count 2 2006.229.06:35:02.09#ibcon#end of sib2, iclass 37, count 2 2006.229.06:35:02.09#ibcon#*after write, iclass 37, count 2 2006.229.06:35:02.09#ibcon#*before return 0, iclass 37, count 2 2006.229.06:35:02.09#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:35:02.09#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:35:02.09#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.06:35:02.09#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:02.09#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:35:02.21#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:35:02.21#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:35:02.21#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:35:02.21#ibcon#first serial, iclass 37, count 0 2006.229.06:35:02.21#ibcon#enter sib2, iclass 37, count 0 2006.229.06:35:02.21#ibcon#flushed, iclass 37, count 0 2006.229.06:35:02.21#ibcon#about to write, iclass 37, count 0 2006.229.06:35:02.21#ibcon#wrote, iclass 37, count 0 2006.229.06:35:02.21#ibcon#about to read 3, iclass 37, count 0 2006.229.06:35:02.23#ibcon#read 3, iclass 37, count 0 2006.229.06:35:02.23#ibcon#about to read 4, iclass 37, count 0 2006.229.06:35:02.23#ibcon#read 4, iclass 37, count 0 2006.229.06:35:02.23#ibcon#about to read 5, iclass 37, count 0 2006.229.06:35:02.23#ibcon#read 5, iclass 37, count 0 2006.229.06:35:02.23#ibcon#about to read 6, iclass 37, count 0 2006.229.06:35:02.23#ibcon#read 6, iclass 37, count 0 2006.229.06:35:02.23#ibcon#end of sib2, iclass 37, count 0 2006.229.06:35:02.23#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:35:02.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:35:02.23#ibcon#[25=USB\r\n] 2006.229.06:35:02.23#ibcon#*before write, iclass 37, count 0 2006.229.06:35:02.23#ibcon#enter sib2, iclass 37, count 0 2006.229.06:35:02.23#ibcon#flushed, iclass 37, count 0 2006.229.06:35:02.23#ibcon#about to write, iclass 37, count 0 2006.229.06:35:02.23#ibcon#wrote, iclass 37, count 0 2006.229.06:35:02.23#ibcon#about to read 3, iclass 37, count 0 2006.229.06:35:02.26#ibcon#read 3, iclass 37, count 0 2006.229.06:35:02.26#ibcon#about to read 4, iclass 37, count 0 2006.229.06:35:02.26#ibcon#read 4, iclass 37, count 0 2006.229.06:35:02.26#ibcon#about to read 5, iclass 37, count 0 2006.229.06:35:02.26#ibcon#read 5, iclass 37, count 0 2006.229.06:35:02.26#ibcon#about to read 6, iclass 37, count 0 2006.229.06:35:02.26#ibcon#read 6, iclass 37, count 0 2006.229.06:35:02.26#ibcon#end of sib2, iclass 37, count 0 2006.229.06:35:02.26#ibcon#*after write, iclass 37, count 0 2006.229.06:35:02.26#ibcon#*before return 0, iclass 37, count 0 2006.229.06:35:02.26#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:35:02.26#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:35:02.26#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:35:02.26#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:35:02.26$vck44/valo=3,564.99 2006.229.06:35:02.26#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.06:35:02.26#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.06:35:02.26#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:02.26#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:02.26#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:02.26#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:02.26#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:35:02.26#ibcon#first serial, iclass 39, count 0 2006.229.06:35:02.26#ibcon#enter sib2, iclass 39, count 0 2006.229.06:35:02.26#ibcon#flushed, iclass 39, count 0 2006.229.06:35:02.26#ibcon#about to write, iclass 39, count 0 2006.229.06:35:02.26#ibcon#wrote, iclass 39, count 0 2006.229.06:35:02.26#ibcon#about to read 3, iclass 39, count 0 2006.229.06:35:02.28#ibcon#read 3, iclass 39, count 0 2006.229.06:35:02.28#ibcon#about to read 4, iclass 39, count 0 2006.229.06:35:02.28#ibcon#read 4, iclass 39, count 0 2006.229.06:35:02.28#ibcon#about to read 5, iclass 39, count 0 2006.229.06:35:02.28#ibcon#read 5, iclass 39, count 0 2006.229.06:35:02.28#ibcon#about to read 6, iclass 39, count 0 2006.229.06:35:02.28#ibcon#read 6, iclass 39, count 0 2006.229.06:35:02.28#ibcon#end of sib2, iclass 39, count 0 2006.229.06:35:02.28#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:35:02.28#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:35:02.28#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:35:02.28#ibcon#*before write, iclass 39, count 0 2006.229.06:35:02.28#ibcon#enter sib2, iclass 39, count 0 2006.229.06:35:02.28#ibcon#flushed, iclass 39, count 0 2006.229.06:35:02.28#ibcon#about to write, iclass 39, count 0 2006.229.06:35:02.28#ibcon#wrote, iclass 39, count 0 2006.229.06:35:02.28#ibcon#about to read 3, iclass 39, count 0 2006.229.06:35:02.32#ibcon#read 3, iclass 39, count 0 2006.229.06:35:02.32#ibcon#about to read 4, iclass 39, count 0 2006.229.06:35:02.32#ibcon#read 4, iclass 39, count 0 2006.229.06:35:02.32#ibcon#about to read 5, iclass 39, count 0 2006.229.06:35:02.32#ibcon#read 5, iclass 39, count 0 2006.229.06:35:02.32#ibcon#about to read 6, iclass 39, count 0 2006.229.06:35:02.32#ibcon#read 6, iclass 39, count 0 2006.229.06:35:02.32#ibcon#end of sib2, iclass 39, count 0 2006.229.06:35:02.32#ibcon#*after write, iclass 39, count 0 2006.229.06:35:02.32#ibcon#*before return 0, iclass 39, count 0 2006.229.06:35:02.32#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:02.32#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:02.32#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:35:02.32#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:35:02.32$vck44/va=3,6 2006.229.06:35:02.32#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:35:02.32#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:35:02.32#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:02.32#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:02.38#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:02.38#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:02.38#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:35:02.38#ibcon#first serial, iclass 3, count 2 2006.229.06:35:02.38#ibcon#enter sib2, iclass 3, count 2 2006.229.06:35:02.38#ibcon#flushed, iclass 3, count 2 2006.229.06:35:02.38#ibcon#about to write, iclass 3, count 2 2006.229.06:35:02.38#ibcon#wrote, iclass 3, count 2 2006.229.06:35:02.38#ibcon#about to read 3, iclass 3, count 2 2006.229.06:35:02.40#ibcon#read 3, iclass 3, count 2 2006.229.06:35:02.40#ibcon#about to read 4, iclass 3, count 2 2006.229.06:35:02.40#ibcon#read 4, iclass 3, count 2 2006.229.06:35:02.40#ibcon#about to read 5, iclass 3, count 2 2006.229.06:35:02.40#ibcon#read 5, iclass 3, count 2 2006.229.06:35:02.40#ibcon#about to read 6, iclass 3, count 2 2006.229.06:35:02.40#ibcon#read 6, iclass 3, count 2 2006.229.06:35:02.40#ibcon#end of sib2, iclass 3, count 2 2006.229.06:35:02.40#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:35:02.40#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:35:02.40#ibcon#[25=AT03-06\r\n] 2006.229.06:35:02.40#ibcon#*before write, iclass 3, count 2 2006.229.06:35:02.40#ibcon#enter sib2, iclass 3, count 2 2006.229.06:35:02.40#ibcon#flushed, iclass 3, count 2 2006.229.06:35:02.40#ibcon#about to write, iclass 3, count 2 2006.229.06:35:02.40#ibcon#wrote, iclass 3, count 2 2006.229.06:35:02.40#ibcon#about to read 3, iclass 3, count 2 2006.229.06:35:02.43#ibcon#read 3, iclass 3, count 2 2006.229.06:35:02.43#ibcon#about to read 4, iclass 3, count 2 2006.229.06:35:02.43#ibcon#read 4, iclass 3, count 2 2006.229.06:35:02.43#ibcon#about to read 5, iclass 3, count 2 2006.229.06:35:02.43#ibcon#read 5, iclass 3, count 2 2006.229.06:35:02.43#ibcon#about to read 6, iclass 3, count 2 2006.229.06:35:02.43#ibcon#read 6, iclass 3, count 2 2006.229.06:35:02.43#ibcon#end of sib2, iclass 3, count 2 2006.229.06:35:02.43#ibcon#*after write, iclass 3, count 2 2006.229.06:35:02.43#ibcon#*before return 0, iclass 3, count 2 2006.229.06:35:02.43#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:02.43#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:02.43#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:35:02.43#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:02.43#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:02.55#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:02.55#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:02.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:35:02.55#ibcon#first serial, iclass 3, count 0 2006.229.06:35:02.55#ibcon#enter sib2, iclass 3, count 0 2006.229.06:35:02.55#ibcon#flushed, iclass 3, count 0 2006.229.06:35:02.55#ibcon#about to write, iclass 3, count 0 2006.229.06:35:02.55#ibcon#wrote, iclass 3, count 0 2006.229.06:35:02.55#ibcon#about to read 3, iclass 3, count 0 2006.229.06:35:02.57#ibcon#read 3, iclass 3, count 0 2006.229.06:35:02.57#ibcon#about to read 4, iclass 3, count 0 2006.229.06:35:02.57#ibcon#read 4, iclass 3, count 0 2006.229.06:35:02.57#ibcon#about to read 5, iclass 3, count 0 2006.229.06:35:02.57#ibcon#read 5, iclass 3, count 0 2006.229.06:35:02.57#ibcon#about to read 6, iclass 3, count 0 2006.229.06:35:02.57#ibcon#read 6, iclass 3, count 0 2006.229.06:35:02.57#ibcon#end of sib2, iclass 3, count 0 2006.229.06:35:02.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:35:02.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:35:02.57#ibcon#[25=USB\r\n] 2006.229.06:35:02.57#ibcon#*before write, iclass 3, count 0 2006.229.06:35:02.57#ibcon#enter sib2, iclass 3, count 0 2006.229.06:35:02.57#ibcon#flushed, iclass 3, count 0 2006.229.06:35:02.57#ibcon#about to write, iclass 3, count 0 2006.229.06:35:02.57#ibcon#wrote, iclass 3, count 0 2006.229.06:35:02.57#ibcon#about to read 3, iclass 3, count 0 2006.229.06:35:02.60#ibcon#read 3, iclass 3, count 0 2006.229.06:35:02.60#ibcon#about to read 4, iclass 3, count 0 2006.229.06:35:02.60#ibcon#read 4, iclass 3, count 0 2006.229.06:35:02.60#ibcon#about to read 5, iclass 3, count 0 2006.229.06:35:02.60#ibcon#read 5, iclass 3, count 0 2006.229.06:35:02.60#ibcon#about to read 6, iclass 3, count 0 2006.229.06:35:02.60#ibcon#read 6, iclass 3, count 0 2006.229.06:35:02.60#ibcon#end of sib2, iclass 3, count 0 2006.229.06:35:02.60#ibcon#*after write, iclass 3, count 0 2006.229.06:35:02.60#ibcon#*before return 0, iclass 3, count 0 2006.229.06:35:02.60#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:02.60#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:02.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:35:02.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:35:02.60$vck44/valo=4,624.99 2006.229.06:35:02.60#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.06:35:02.60#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.06:35:02.60#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:02.60#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:02.60#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:02.60#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:02.60#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:35:02.60#ibcon#first serial, iclass 5, count 0 2006.229.06:35:02.60#ibcon#enter sib2, iclass 5, count 0 2006.229.06:35:02.60#ibcon#flushed, iclass 5, count 0 2006.229.06:35:02.60#ibcon#about to write, iclass 5, count 0 2006.229.06:35:02.60#ibcon#wrote, iclass 5, count 0 2006.229.06:35:02.60#ibcon#about to read 3, iclass 5, count 0 2006.229.06:35:02.62#ibcon#read 3, iclass 5, count 0 2006.229.06:35:02.62#ibcon#about to read 4, iclass 5, count 0 2006.229.06:35:02.62#ibcon#read 4, iclass 5, count 0 2006.229.06:35:02.62#ibcon#about to read 5, iclass 5, count 0 2006.229.06:35:02.62#ibcon#read 5, iclass 5, count 0 2006.229.06:35:02.62#ibcon#about to read 6, iclass 5, count 0 2006.229.06:35:02.62#ibcon#read 6, iclass 5, count 0 2006.229.06:35:02.62#ibcon#end of sib2, iclass 5, count 0 2006.229.06:35:02.62#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:35:02.62#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:35:02.62#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:35:02.62#ibcon#*before write, iclass 5, count 0 2006.229.06:35:02.62#ibcon#enter sib2, iclass 5, count 0 2006.229.06:35:02.62#ibcon#flushed, iclass 5, count 0 2006.229.06:35:02.62#ibcon#about to write, iclass 5, count 0 2006.229.06:35:02.62#ibcon#wrote, iclass 5, count 0 2006.229.06:35:02.62#ibcon#about to read 3, iclass 5, count 0 2006.229.06:35:02.66#ibcon#read 3, iclass 5, count 0 2006.229.06:35:02.66#ibcon#about to read 4, iclass 5, count 0 2006.229.06:35:02.66#ibcon#read 4, iclass 5, count 0 2006.229.06:35:02.66#ibcon#about to read 5, iclass 5, count 0 2006.229.06:35:02.66#ibcon#read 5, iclass 5, count 0 2006.229.06:35:02.66#ibcon#about to read 6, iclass 5, count 0 2006.229.06:35:02.66#ibcon#read 6, iclass 5, count 0 2006.229.06:35:02.66#ibcon#end of sib2, iclass 5, count 0 2006.229.06:35:02.66#ibcon#*after write, iclass 5, count 0 2006.229.06:35:02.66#ibcon#*before return 0, iclass 5, count 0 2006.229.06:35:02.66#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:02.66#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:02.66#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:35:02.66#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:35:02.66$vck44/va=4,7 2006.229.06:35:02.66#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.06:35:02.66#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.06:35:02.66#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:02.66#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:02.72#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:02.72#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:02.72#ibcon#enter wrdev, iclass 7, count 2 2006.229.06:35:02.72#ibcon#first serial, iclass 7, count 2 2006.229.06:35:02.72#ibcon#enter sib2, iclass 7, count 2 2006.229.06:35:02.72#ibcon#flushed, iclass 7, count 2 2006.229.06:35:02.72#ibcon#about to write, iclass 7, count 2 2006.229.06:35:02.72#ibcon#wrote, iclass 7, count 2 2006.229.06:35:02.72#ibcon#about to read 3, iclass 7, count 2 2006.229.06:35:02.74#ibcon#read 3, iclass 7, count 2 2006.229.06:35:02.74#ibcon#about to read 4, iclass 7, count 2 2006.229.06:35:02.74#ibcon#read 4, iclass 7, count 2 2006.229.06:35:02.74#ibcon#about to read 5, iclass 7, count 2 2006.229.06:35:02.74#ibcon#read 5, iclass 7, count 2 2006.229.06:35:02.74#ibcon#about to read 6, iclass 7, count 2 2006.229.06:35:02.74#ibcon#read 6, iclass 7, count 2 2006.229.06:35:02.74#ibcon#end of sib2, iclass 7, count 2 2006.229.06:35:02.74#ibcon#*mode == 0, iclass 7, count 2 2006.229.06:35:02.74#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.06:35:02.74#ibcon#[25=AT04-07\r\n] 2006.229.06:35:02.74#ibcon#*before write, iclass 7, count 2 2006.229.06:35:02.74#ibcon#enter sib2, iclass 7, count 2 2006.229.06:35:02.74#ibcon#flushed, iclass 7, count 2 2006.229.06:35:02.74#ibcon#about to write, iclass 7, count 2 2006.229.06:35:02.74#ibcon#wrote, iclass 7, count 2 2006.229.06:35:02.74#ibcon#about to read 3, iclass 7, count 2 2006.229.06:35:02.77#ibcon#read 3, iclass 7, count 2 2006.229.06:35:02.77#ibcon#about to read 4, iclass 7, count 2 2006.229.06:35:02.77#ibcon#read 4, iclass 7, count 2 2006.229.06:35:02.77#ibcon#about to read 5, iclass 7, count 2 2006.229.06:35:02.77#ibcon#read 5, iclass 7, count 2 2006.229.06:35:02.77#ibcon#about to read 6, iclass 7, count 2 2006.229.06:35:02.77#ibcon#read 6, iclass 7, count 2 2006.229.06:35:02.77#ibcon#end of sib2, iclass 7, count 2 2006.229.06:35:02.77#ibcon#*after write, iclass 7, count 2 2006.229.06:35:02.77#ibcon#*before return 0, iclass 7, count 2 2006.229.06:35:02.77#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:02.77#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:02.77#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.06:35:02.77#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:02.77#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:02.89#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:02.89#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:02.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:35:02.89#ibcon#first serial, iclass 7, count 0 2006.229.06:35:02.89#ibcon#enter sib2, iclass 7, count 0 2006.229.06:35:02.89#ibcon#flushed, iclass 7, count 0 2006.229.06:35:02.89#ibcon#about to write, iclass 7, count 0 2006.229.06:35:02.89#ibcon#wrote, iclass 7, count 0 2006.229.06:35:02.89#ibcon#about to read 3, iclass 7, count 0 2006.229.06:35:02.91#ibcon#read 3, iclass 7, count 0 2006.229.06:35:02.91#ibcon#about to read 4, iclass 7, count 0 2006.229.06:35:02.91#ibcon#read 4, iclass 7, count 0 2006.229.06:35:02.91#ibcon#about to read 5, iclass 7, count 0 2006.229.06:35:02.91#ibcon#read 5, iclass 7, count 0 2006.229.06:35:02.91#ibcon#about to read 6, iclass 7, count 0 2006.229.06:35:02.91#ibcon#read 6, iclass 7, count 0 2006.229.06:35:02.91#ibcon#end of sib2, iclass 7, count 0 2006.229.06:35:02.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:35:02.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:35:02.91#ibcon#[25=USB\r\n] 2006.229.06:35:02.91#ibcon#*before write, iclass 7, count 0 2006.229.06:35:02.91#ibcon#enter sib2, iclass 7, count 0 2006.229.06:35:02.91#ibcon#flushed, iclass 7, count 0 2006.229.06:35:02.91#ibcon#about to write, iclass 7, count 0 2006.229.06:35:02.91#ibcon#wrote, iclass 7, count 0 2006.229.06:35:02.91#ibcon#about to read 3, iclass 7, count 0 2006.229.06:35:02.94#ibcon#read 3, iclass 7, count 0 2006.229.06:35:02.94#ibcon#about to read 4, iclass 7, count 0 2006.229.06:35:02.94#ibcon#read 4, iclass 7, count 0 2006.229.06:35:02.94#ibcon#about to read 5, iclass 7, count 0 2006.229.06:35:02.94#ibcon#read 5, iclass 7, count 0 2006.229.06:35:02.94#ibcon#about to read 6, iclass 7, count 0 2006.229.06:35:02.94#ibcon#read 6, iclass 7, count 0 2006.229.06:35:02.94#ibcon#end of sib2, iclass 7, count 0 2006.229.06:35:02.94#ibcon#*after write, iclass 7, count 0 2006.229.06:35:02.94#ibcon#*before return 0, iclass 7, count 0 2006.229.06:35:02.94#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:02.94#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:02.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:35:02.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:35:02.94$vck44/valo=5,734.99 2006.229.06:35:02.94#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.06:35:02.94#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.06:35:02.94#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:02.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:02.94#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:02.94#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:02.94#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:35:02.94#ibcon#first serial, iclass 11, count 0 2006.229.06:35:02.94#ibcon#enter sib2, iclass 11, count 0 2006.229.06:35:02.94#ibcon#flushed, iclass 11, count 0 2006.229.06:35:02.94#ibcon#about to write, iclass 11, count 0 2006.229.06:35:02.94#ibcon#wrote, iclass 11, count 0 2006.229.06:35:02.94#ibcon#about to read 3, iclass 11, count 0 2006.229.06:35:02.96#ibcon#read 3, iclass 11, count 0 2006.229.06:35:02.96#ibcon#about to read 4, iclass 11, count 0 2006.229.06:35:02.96#ibcon#read 4, iclass 11, count 0 2006.229.06:35:02.96#ibcon#about to read 5, iclass 11, count 0 2006.229.06:35:02.96#ibcon#read 5, iclass 11, count 0 2006.229.06:35:02.96#ibcon#about to read 6, iclass 11, count 0 2006.229.06:35:02.96#ibcon#read 6, iclass 11, count 0 2006.229.06:35:02.96#ibcon#end of sib2, iclass 11, count 0 2006.229.06:35:02.96#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:35:02.96#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:35:02.96#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:35:02.96#ibcon#*before write, iclass 11, count 0 2006.229.06:35:02.96#ibcon#enter sib2, iclass 11, count 0 2006.229.06:35:02.96#ibcon#flushed, iclass 11, count 0 2006.229.06:35:02.96#ibcon#about to write, iclass 11, count 0 2006.229.06:35:02.96#ibcon#wrote, iclass 11, count 0 2006.229.06:35:02.96#ibcon#about to read 3, iclass 11, count 0 2006.229.06:35:03.00#ibcon#read 3, iclass 11, count 0 2006.229.06:35:03.00#ibcon#about to read 4, iclass 11, count 0 2006.229.06:35:03.00#ibcon#read 4, iclass 11, count 0 2006.229.06:35:03.00#ibcon#about to read 5, iclass 11, count 0 2006.229.06:35:03.00#ibcon#read 5, iclass 11, count 0 2006.229.06:35:03.00#ibcon#about to read 6, iclass 11, count 0 2006.229.06:35:03.00#ibcon#read 6, iclass 11, count 0 2006.229.06:35:03.00#ibcon#end of sib2, iclass 11, count 0 2006.229.06:35:03.00#ibcon#*after write, iclass 11, count 0 2006.229.06:35:03.00#ibcon#*before return 0, iclass 11, count 0 2006.229.06:35:03.00#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:03.00#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:03.00#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:35:03.00#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:35:03.00$vck44/va=5,4 2006.229.06:35:03.00#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.06:35:03.00#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.06:35:03.00#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:03.00#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:03.06#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:03.06#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:03.06#ibcon#enter wrdev, iclass 13, count 2 2006.229.06:35:03.06#ibcon#first serial, iclass 13, count 2 2006.229.06:35:03.06#ibcon#enter sib2, iclass 13, count 2 2006.229.06:35:03.06#ibcon#flushed, iclass 13, count 2 2006.229.06:35:03.06#ibcon#about to write, iclass 13, count 2 2006.229.06:35:03.06#ibcon#wrote, iclass 13, count 2 2006.229.06:35:03.06#ibcon#about to read 3, iclass 13, count 2 2006.229.06:35:03.08#ibcon#read 3, iclass 13, count 2 2006.229.06:35:03.08#ibcon#about to read 4, iclass 13, count 2 2006.229.06:35:03.08#ibcon#read 4, iclass 13, count 2 2006.229.06:35:03.08#ibcon#about to read 5, iclass 13, count 2 2006.229.06:35:03.08#ibcon#read 5, iclass 13, count 2 2006.229.06:35:03.08#ibcon#about to read 6, iclass 13, count 2 2006.229.06:35:03.08#ibcon#read 6, iclass 13, count 2 2006.229.06:35:03.08#ibcon#end of sib2, iclass 13, count 2 2006.229.06:35:03.08#ibcon#*mode == 0, iclass 13, count 2 2006.229.06:35:03.08#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.06:35:03.08#ibcon#[25=AT05-04\r\n] 2006.229.06:35:03.08#ibcon#*before write, iclass 13, count 2 2006.229.06:35:03.08#ibcon#enter sib2, iclass 13, count 2 2006.229.06:35:03.08#ibcon#flushed, iclass 13, count 2 2006.229.06:35:03.08#ibcon#about to write, iclass 13, count 2 2006.229.06:35:03.08#ibcon#wrote, iclass 13, count 2 2006.229.06:35:03.08#ibcon#about to read 3, iclass 13, count 2 2006.229.06:35:03.11#ibcon#read 3, iclass 13, count 2 2006.229.06:35:03.11#ibcon#about to read 4, iclass 13, count 2 2006.229.06:35:03.11#ibcon#read 4, iclass 13, count 2 2006.229.06:35:03.11#ibcon#about to read 5, iclass 13, count 2 2006.229.06:35:03.11#ibcon#read 5, iclass 13, count 2 2006.229.06:35:03.11#ibcon#about to read 6, iclass 13, count 2 2006.229.06:35:03.11#ibcon#read 6, iclass 13, count 2 2006.229.06:35:03.11#ibcon#end of sib2, iclass 13, count 2 2006.229.06:35:03.11#ibcon#*after write, iclass 13, count 2 2006.229.06:35:03.11#ibcon#*before return 0, iclass 13, count 2 2006.229.06:35:03.11#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:03.11#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:03.11#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.06:35:03.11#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:03.11#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:03.23#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:03.23#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:03.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:35:03.23#ibcon#first serial, iclass 13, count 0 2006.229.06:35:03.23#ibcon#enter sib2, iclass 13, count 0 2006.229.06:35:03.23#ibcon#flushed, iclass 13, count 0 2006.229.06:35:03.23#ibcon#about to write, iclass 13, count 0 2006.229.06:35:03.23#ibcon#wrote, iclass 13, count 0 2006.229.06:35:03.23#ibcon#about to read 3, iclass 13, count 0 2006.229.06:35:03.25#ibcon#read 3, iclass 13, count 0 2006.229.06:35:03.25#ibcon#about to read 4, iclass 13, count 0 2006.229.06:35:03.25#ibcon#read 4, iclass 13, count 0 2006.229.06:35:03.25#ibcon#about to read 5, iclass 13, count 0 2006.229.06:35:03.25#ibcon#read 5, iclass 13, count 0 2006.229.06:35:03.25#ibcon#about to read 6, iclass 13, count 0 2006.229.06:35:03.25#ibcon#read 6, iclass 13, count 0 2006.229.06:35:03.25#ibcon#end of sib2, iclass 13, count 0 2006.229.06:35:03.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:35:03.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:35:03.25#ibcon#[25=USB\r\n] 2006.229.06:35:03.25#ibcon#*before write, iclass 13, count 0 2006.229.06:35:03.25#ibcon#enter sib2, iclass 13, count 0 2006.229.06:35:03.25#ibcon#flushed, iclass 13, count 0 2006.229.06:35:03.25#ibcon#about to write, iclass 13, count 0 2006.229.06:35:03.25#ibcon#wrote, iclass 13, count 0 2006.229.06:35:03.25#ibcon#about to read 3, iclass 13, count 0 2006.229.06:35:03.28#ibcon#read 3, iclass 13, count 0 2006.229.06:35:03.28#ibcon#about to read 4, iclass 13, count 0 2006.229.06:35:03.28#ibcon#read 4, iclass 13, count 0 2006.229.06:35:03.28#ibcon#about to read 5, iclass 13, count 0 2006.229.06:35:03.28#ibcon#read 5, iclass 13, count 0 2006.229.06:35:03.28#ibcon#about to read 6, iclass 13, count 0 2006.229.06:35:03.28#ibcon#read 6, iclass 13, count 0 2006.229.06:35:03.28#ibcon#end of sib2, iclass 13, count 0 2006.229.06:35:03.28#ibcon#*after write, iclass 13, count 0 2006.229.06:35:03.28#ibcon#*before return 0, iclass 13, count 0 2006.229.06:35:03.28#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:03.28#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:03.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:35:03.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:35:03.28$vck44/valo=6,814.99 2006.229.06:35:03.28#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.06:35:03.28#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.06:35:03.28#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:03.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:03.28#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:03.28#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:03.28#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:35:03.28#ibcon#first serial, iclass 15, count 0 2006.229.06:35:03.28#ibcon#enter sib2, iclass 15, count 0 2006.229.06:35:03.28#ibcon#flushed, iclass 15, count 0 2006.229.06:35:03.28#ibcon#about to write, iclass 15, count 0 2006.229.06:35:03.28#ibcon#wrote, iclass 15, count 0 2006.229.06:35:03.28#ibcon#about to read 3, iclass 15, count 0 2006.229.06:35:03.30#ibcon#read 3, iclass 15, count 0 2006.229.06:35:03.30#ibcon#about to read 4, iclass 15, count 0 2006.229.06:35:03.30#ibcon#read 4, iclass 15, count 0 2006.229.06:35:03.30#ibcon#about to read 5, iclass 15, count 0 2006.229.06:35:03.30#ibcon#read 5, iclass 15, count 0 2006.229.06:35:03.30#ibcon#about to read 6, iclass 15, count 0 2006.229.06:35:03.30#ibcon#read 6, iclass 15, count 0 2006.229.06:35:03.30#ibcon#end of sib2, iclass 15, count 0 2006.229.06:35:03.30#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:35:03.30#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:35:03.30#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:35:03.30#ibcon#*before write, iclass 15, count 0 2006.229.06:35:03.30#ibcon#enter sib2, iclass 15, count 0 2006.229.06:35:03.30#ibcon#flushed, iclass 15, count 0 2006.229.06:35:03.30#ibcon#about to write, iclass 15, count 0 2006.229.06:35:03.30#ibcon#wrote, iclass 15, count 0 2006.229.06:35:03.30#ibcon#about to read 3, iclass 15, count 0 2006.229.06:35:03.34#ibcon#read 3, iclass 15, count 0 2006.229.06:35:03.34#ibcon#about to read 4, iclass 15, count 0 2006.229.06:35:03.34#ibcon#read 4, iclass 15, count 0 2006.229.06:35:03.34#ibcon#about to read 5, iclass 15, count 0 2006.229.06:35:03.34#ibcon#read 5, iclass 15, count 0 2006.229.06:35:03.34#ibcon#about to read 6, iclass 15, count 0 2006.229.06:35:03.34#ibcon#read 6, iclass 15, count 0 2006.229.06:35:03.34#ibcon#end of sib2, iclass 15, count 0 2006.229.06:35:03.34#ibcon#*after write, iclass 15, count 0 2006.229.06:35:03.34#ibcon#*before return 0, iclass 15, count 0 2006.229.06:35:03.34#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:03.34#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:03.34#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:35:03.34#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:35:03.34$vck44/va=6,4 2006.229.06:35:03.34#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.06:35:03.34#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.06:35:03.34#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:03.34#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:03.40#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:03.40#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:03.40#ibcon#enter wrdev, iclass 17, count 2 2006.229.06:35:03.40#ibcon#first serial, iclass 17, count 2 2006.229.06:35:03.40#ibcon#enter sib2, iclass 17, count 2 2006.229.06:35:03.40#ibcon#flushed, iclass 17, count 2 2006.229.06:35:03.40#ibcon#about to write, iclass 17, count 2 2006.229.06:35:03.40#ibcon#wrote, iclass 17, count 2 2006.229.06:35:03.40#ibcon#about to read 3, iclass 17, count 2 2006.229.06:35:03.42#ibcon#read 3, iclass 17, count 2 2006.229.06:35:03.42#ibcon#about to read 4, iclass 17, count 2 2006.229.06:35:03.42#ibcon#read 4, iclass 17, count 2 2006.229.06:35:03.42#ibcon#about to read 5, iclass 17, count 2 2006.229.06:35:03.42#ibcon#read 5, iclass 17, count 2 2006.229.06:35:03.42#ibcon#about to read 6, iclass 17, count 2 2006.229.06:35:03.42#ibcon#read 6, iclass 17, count 2 2006.229.06:35:03.42#ibcon#end of sib2, iclass 17, count 2 2006.229.06:35:03.42#ibcon#*mode == 0, iclass 17, count 2 2006.229.06:35:03.42#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.06:35:03.42#ibcon#[25=AT06-04\r\n] 2006.229.06:35:03.42#ibcon#*before write, iclass 17, count 2 2006.229.06:35:03.42#ibcon#enter sib2, iclass 17, count 2 2006.229.06:35:03.42#ibcon#flushed, iclass 17, count 2 2006.229.06:35:03.42#ibcon#about to write, iclass 17, count 2 2006.229.06:35:03.42#ibcon#wrote, iclass 17, count 2 2006.229.06:35:03.42#ibcon#about to read 3, iclass 17, count 2 2006.229.06:35:03.45#ibcon#read 3, iclass 17, count 2 2006.229.06:35:03.45#ibcon#about to read 4, iclass 17, count 2 2006.229.06:35:03.45#ibcon#read 4, iclass 17, count 2 2006.229.06:35:03.45#ibcon#about to read 5, iclass 17, count 2 2006.229.06:35:03.45#ibcon#read 5, iclass 17, count 2 2006.229.06:35:03.45#ibcon#about to read 6, iclass 17, count 2 2006.229.06:35:03.45#ibcon#read 6, iclass 17, count 2 2006.229.06:35:03.45#ibcon#end of sib2, iclass 17, count 2 2006.229.06:35:03.45#ibcon#*after write, iclass 17, count 2 2006.229.06:35:03.45#ibcon#*before return 0, iclass 17, count 2 2006.229.06:35:03.45#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:03.45#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:03.45#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.06:35:03.45#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:03.45#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:03.57#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:03.57#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:03.57#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:35:03.57#ibcon#first serial, iclass 17, count 0 2006.229.06:35:03.57#ibcon#enter sib2, iclass 17, count 0 2006.229.06:35:03.57#ibcon#flushed, iclass 17, count 0 2006.229.06:35:03.57#ibcon#about to write, iclass 17, count 0 2006.229.06:35:03.57#ibcon#wrote, iclass 17, count 0 2006.229.06:35:03.57#ibcon#about to read 3, iclass 17, count 0 2006.229.06:35:03.59#ibcon#read 3, iclass 17, count 0 2006.229.06:35:03.59#ibcon#about to read 4, iclass 17, count 0 2006.229.06:35:03.59#ibcon#read 4, iclass 17, count 0 2006.229.06:35:03.59#ibcon#about to read 5, iclass 17, count 0 2006.229.06:35:03.59#ibcon#read 5, iclass 17, count 0 2006.229.06:35:03.59#ibcon#about to read 6, iclass 17, count 0 2006.229.06:35:03.59#ibcon#read 6, iclass 17, count 0 2006.229.06:35:03.59#ibcon#end of sib2, iclass 17, count 0 2006.229.06:35:03.59#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:35:03.59#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:35:03.59#ibcon#[25=USB\r\n] 2006.229.06:35:03.59#ibcon#*before write, iclass 17, count 0 2006.229.06:35:03.59#ibcon#enter sib2, iclass 17, count 0 2006.229.06:35:03.59#ibcon#flushed, iclass 17, count 0 2006.229.06:35:03.59#ibcon#about to write, iclass 17, count 0 2006.229.06:35:03.59#ibcon#wrote, iclass 17, count 0 2006.229.06:35:03.59#ibcon#about to read 3, iclass 17, count 0 2006.229.06:35:03.62#ibcon#read 3, iclass 17, count 0 2006.229.06:35:03.62#ibcon#about to read 4, iclass 17, count 0 2006.229.06:35:03.62#ibcon#read 4, iclass 17, count 0 2006.229.06:35:03.62#ibcon#about to read 5, iclass 17, count 0 2006.229.06:35:03.62#ibcon#read 5, iclass 17, count 0 2006.229.06:35:03.62#ibcon#about to read 6, iclass 17, count 0 2006.229.06:35:03.62#ibcon#read 6, iclass 17, count 0 2006.229.06:35:03.62#ibcon#end of sib2, iclass 17, count 0 2006.229.06:35:03.62#ibcon#*after write, iclass 17, count 0 2006.229.06:35:03.62#ibcon#*before return 0, iclass 17, count 0 2006.229.06:35:03.62#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:03.62#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:03.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:35:03.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:35:03.62$vck44/valo=7,864.99 2006.229.06:35:03.62#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.06:35:03.62#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.06:35:03.62#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:03.62#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:03.62#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:03.62#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:03.62#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:35:03.62#ibcon#first serial, iclass 19, count 0 2006.229.06:35:03.62#ibcon#enter sib2, iclass 19, count 0 2006.229.06:35:03.62#ibcon#flushed, iclass 19, count 0 2006.229.06:35:03.62#ibcon#about to write, iclass 19, count 0 2006.229.06:35:03.62#ibcon#wrote, iclass 19, count 0 2006.229.06:35:03.62#ibcon#about to read 3, iclass 19, count 0 2006.229.06:35:03.64#ibcon#read 3, iclass 19, count 0 2006.229.06:35:03.64#ibcon#about to read 4, iclass 19, count 0 2006.229.06:35:03.64#ibcon#read 4, iclass 19, count 0 2006.229.06:35:03.64#ibcon#about to read 5, iclass 19, count 0 2006.229.06:35:03.64#ibcon#read 5, iclass 19, count 0 2006.229.06:35:03.64#ibcon#about to read 6, iclass 19, count 0 2006.229.06:35:03.64#ibcon#read 6, iclass 19, count 0 2006.229.06:35:03.64#ibcon#end of sib2, iclass 19, count 0 2006.229.06:35:03.64#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:35:03.64#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:35:03.64#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:35:03.64#ibcon#*before write, iclass 19, count 0 2006.229.06:35:03.64#ibcon#enter sib2, iclass 19, count 0 2006.229.06:35:03.64#ibcon#flushed, iclass 19, count 0 2006.229.06:35:03.64#ibcon#about to write, iclass 19, count 0 2006.229.06:35:03.64#ibcon#wrote, iclass 19, count 0 2006.229.06:35:03.64#ibcon#about to read 3, iclass 19, count 0 2006.229.06:35:03.68#ibcon#read 3, iclass 19, count 0 2006.229.06:35:03.68#ibcon#about to read 4, iclass 19, count 0 2006.229.06:35:03.68#ibcon#read 4, iclass 19, count 0 2006.229.06:35:03.68#ibcon#about to read 5, iclass 19, count 0 2006.229.06:35:03.68#ibcon#read 5, iclass 19, count 0 2006.229.06:35:03.68#ibcon#about to read 6, iclass 19, count 0 2006.229.06:35:03.68#ibcon#read 6, iclass 19, count 0 2006.229.06:35:03.68#ibcon#end of sib2, iclass 19, count 0 2006.229.06:35:03.68#ibcon#*after write, iclass 19, count 0 2006.229.06:35:03.68#ibcon#*before return 0, iclass 19, count 0 2006.229.06:35:03.68#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:03.68#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:03.68#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:35:03.68#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:35:03.68$vck44/va=7,5 2006.229.06:35:03.68#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.06:35:03.68#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.06:35:03.68#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:03.68#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:03.74#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:03.74#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:03.74#ibcon#enter wrdev, iclass 21, count 2 2006.229.06:35:03.74#ibcon#first serial, iclass 21, count 2 2006.229.06:35:03.74#ibcon#enter sib2, iclass 21, count 2 2006.229.06:35:03.74#ibcon#flushed, iclass 21, count 2 2006.229.06:35:03.74#ibcon#about to write, iclass 21, count 2 2006.229.06:35:03.74#ibcon#wrote, iclass 21, count 2 2006.229.06:35:03.74#ibcon#about to read 3, iclass 21, count 2 2006.229.06:35:03.76#ibcon#read 3, iclass 21, count 2 2006.229.06:35:03.76#ibcon#about to read 4, iclass 21, count 2 2006.229.06:35:03.76#ibcon#read 4, iclass 21, count 2 2006.229.06:35:03.76#ibcon#about to read 5, iclass 21, count 2 2006.229.06:35:03.76#ibcon#read 5, iclass 21, count 2 2006.229.06:35:03.76#ibcon#about to read 6, iclass 21, count 2 2006.229.06:35:03.76#ibcon#read 6, iclass 21, count 2 2006.229.06:35:03.76#ibcon#end of sib2, iclass 21, count 2 2006.229.06:35:03.76#ibcon#*mode == 0, iclass 21, count 2 2006.229.06:35:03.76#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.06:35:03.76#ibcon#[25=AT07-05\r\n] 2006.229.06:35:03.76#ibcon#*before write, iclass 21, count 2 2006.229.06:35:03.76#ibcon#enter sib2, iclass 21, count 2 2006.229.06:35:03.76#ibcon#flushed, iclass 21, count 2 2006.229.06:35:03.76#ibcon#about to write, iclass 21, count 2 2006.229.06:35:03.76#ibcon#wrote, iclass 21, count 2 2006.229.06:35:03.76#ibcon#about to read 3, iclass 21, count 2 2006.229.06:35:03.79#ibcon#read 3, iclass 21, count 2 2006.229.06:35:03.79#ibcon#about to read 4, iclass 21, count 2 2006.229.06:35:03.79#ibcon#read 4, iclass 21, count 2 2006.229.06:35:03.79#ibcon#about to read 5, iclass 21, count 2 2006.229.06:35:03.79#ibcon#read 5, iclass 21, count 2 2006.229.06:35:03.79#ibcon#about to read 6, iclass 21, count 2 2006.229.06:35:03.79#ibcon#read 6, iclass 21, count 2 2006.229.06:35:03.79#ibcon#end of sib2, iclass 21, count 2 2006.229.06:35:03.79#ibcon#*after write, iclass 21, count 2 2006.229.06:35:03.79#ibcon#*before return 0, iclass 21, count 2 2006.229.06:35:03.79#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:03.79#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:03.79#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.06:35:03.79#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:03.79#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:03.91#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:03.91#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:03.91#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:35:03.91#ibcon#first serial, iclass 21, count 0 2006.229.06:35:03.91#ibcon#enter sib2, iclass 21, count 0 2006.229.06:35:03.91#ibcon#flushed, iclass 21, count 0 2006.229.06:35:03.91#ibcon#about to write, iclass 21, count 0 2006.229.06:35:03.91#ibcon#wrote, iclass 21, count 0 2006.229.06:35:03.91#ibcon#about to read 3, iclass 21, count 0 2006.229.06:35:03.93#ibcon#read 3, iclass 21, count 0 2006.229.06:35:03.93#ibcon#about to read 4, iclass 21, count 0 2006.229.06:35:03.93#ibcon#read 4, iclass 21, count 0 2006.229.06:35:03.93#ibcon#about to read 5, iclass 21, count 0 2006.229.06:35:03.93#ibcon#read 5, iclass 21, count 0 2006.229.06:35:03.93#ibcon#about to read 6, iclass 21, count 0 2006.229.06:35:03.93#ibcon#read 6, iclass 21, count 0 2006.229.06:35:03.93#ibcon#end of sib2, iclass 21, count 0 2006.229.06:35:03.93#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:35:03.93#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:35:03.93#ibcon#[25=USB\r\n] 2006.229.06:35:03.93#ibcon#*before write, iclass 21, count 0 2006.229.06:35:03.93#ibcon#enter sib2, iclass 21, count 0 2006.229.06:35:03.93#ibcon#flushed, iclass 21, count 0 2006.229.06:35:03.93#ibcon#about to write, iclass 21, count 0 2006.229.06:35:03.93#ibcon#wrote, iclass 21, count 0 2006.229.06:35:03.93#ibcon#about to read 3, iclass 21, count 0 2006.229.06:35:03.96#ibcon#read 3, iclass 21, count 0 2006.229.06:35:03.96#ibcon#about to read 4, iclass 21, count 0 2006.229.06:35:03.96#ibcon#read 4, iclass 21, count 0 2006.229.06:35:03.96#ibcon#about to read 5, iclass 21, count 0 2006.229.06:35:03.96#ibcon#read 5, iclass 21, count 0 2006.229.06:35:03.96#ibcon#about to read 6, iclass 21, count 0 2006.229.06:35:03.96#ibcon#read 6, iclass 21, count 0 2006.229.06:35:03.96#ibcon#end of sib2, iclass 21, count 0 2006.229.06:35:03.96#ibcon#*after write, iclass 21, count 0 2006.229.06:35:03.96#ibcon#*before return 0, iclass 21, count 0 2006.229.06:35:03.96#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:03.96#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:03.96#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:35:03.96#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:35:03.96$vck44/valo=8,884.99 2006.229.06:35:03.96#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.06:35:03.96#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.06:35:03.96#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:03.96#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:03.96#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:03.96#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:03.96#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:35:03.96#ibcon#first serial, iclass 23, count 0 2006.229.06:35:03.96#ibcon#enter sib2, iclass 23, count 0 2006.229.06:35:03.96#ibcon#flushed, iclass 23, count 0 2006.229.06:35:03.96#ibcon#about to write, iclass 23, count 0 2006.229.06:35:03.96#ibcon#wrote, iclass 23, count 0 2006.229.06:35:03.96#ibcon#about to read 3, iclass 23, count 0 2006.229.06:35:03.98#ibcon#read 3, iclass 23, count 0 2006.229.06:35:03.98#ibcon#about to read 4, iclass 23, count 0 2006.229.06:35:03.98#ibcon#read 4, iclass 23, count 0 2006.229.06:35:03.98#ibcon#about to read 5, iclass 23, count 0 2006.229.06:35:03.98#ibcon#read 5, iclass 23, count 0 2006.229.06:35:03.98#ibcon#about to read 6, iclass 23, count 0 2006.229.06:35:03.98#ibcon#read 6, iclass 23, count 0 2006.229.06:35:03.98#ibcon#end of sib2, iclass 23, count 0 2006.229.06:35:03.98#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:35:03.98#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:35:03.98#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:35:03.98#ibcon#*before write, iclass 23, count 0 2006.229.06:35:03.98#ibcon#enter sib2, iclass 23, count 0 2006.229.06:35:03.98#ibcon#flushed, iclass 23, count 0 2006.229.06:35:03.98#ibcon#about to write, iclass 23, count 0 2006.229.06:35:03.98#ibcon#wrote, iclass 23, count 0 2006.229.06:35:03.98#ibcon#about to read 3, iclass 23, count 0 2006.229.06:35:04.02#ibcon#read 3, iclass 23, count 0 2006.229.06:35:04.02#ibcon#about to read 4, iclass 23, count 0 2006.229.06:35:04.02#ibcon#read 4, iclass 23, count 0 2006.229.06:35:04.02#ibcon#about to read 5, iclass 23, count 0 2006.229.06:35:04.02#ibcon#read 5, iclass 23, count 0 2006.229.06:35:04.02#ibcon#about to read 6, iclass 23, count 0 2006.229.06:35:04.02#ibcon#read 6, iclass 23, count 0 2006.229.06:35:04.02#ibcon#end of sib2, iclass 23, count 0 2006.229.06:35:04.02#ibcon#*after write, iclass 23, count 0 2006.229.06:35:04.02#ibcon#*before return 0, iclass 23, count 0 2006.229.06:35:04.02#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:04.02#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:04.02#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:35:04.02#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:35:04.02$vck44/va=8,6 2006.229.06:35:04.02#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.06:35:04.02#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.06:35:04.02#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:04.02#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:04.08#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:04.08#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:04.08#ibcon#enter wrdev, iclass 25, count 2 2006.229.06:35:04.08#ibcon#first serial, iclass 25, count 2 2006.229.06:35:04.08#ibcon#enter sib2, iclass 25, count 2 2006.229.06:35:04.08#ibcon#flushed, iclass 25, count 2 2006.229.06:35:04.08#ibcon#about to write, iclass 25, count 2 2006.229.06:35:04.08#ibcon#wrote, iclass 25, count 2 2006.229.06:35:04.08#ibcon#about to read 3, iclass 25, count 2 2006.229.06:35:04.10#ibcon#read 3, iclass 25, count 2 2006.229.06:35:04.10#ibcon#about to read 4, iclass 25, count 2 2006.229.06:35:04.10#ibcon#read 4, iclass 25, count 2 2006.229.06:35:04.10#ibcon#about to read 5, iclass 25, count 2 2006.229.06:35:04.10#ibcon#read 5, iclass 25, count 2 2006.229.06:35:04.10#ibcon#about to read 6, iclass 25, count 2 2006.229.06:35:04.10#ibcon#read 6, iclass 25, count 2 2006.229.06:35:04.10#ibcon#end of sib2, iclass 25, count 2 2006.229.06:35:04.10#ibcon#*mode == 0, iclass 25, count 2 2006.229.06:35:04.10#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.06:35:04.10#ibcon#[25=AT08-06\r\n] 2006.229.06:35:04.10#ibcon#*before write, iclass 25, count 2 2006.229.06:35:04.10#ibcon#enter sib2, iclass 25, count 2 2006.229.06:35:04.10#ibcon#flushed, iclass 25, count 2 2006.229.06:35:04.10#ibcon#about to write, iclass 25, count 2 2006.229.06:35:04.10#ibcon#wrote, iclass 25, count 2 2006.229.06:35:04.10#ibcon#about to read 3, iclass 25, count 2 2006.229.06:35:04.13#ibcon#read 3, iclass 25, count 2 2006.229.06:35:04.13#ibcon#about to read 4, iclass 25, count 2 2006.229.06:35:04.13#ibcon#read 4, iclass 25, count 2 2006.229.06:35:04.13#ibcon#about to read 5, iclass 25, count 2 2006.229.06:35:04.13#ibcon#read 5, iclass 25, count 2 2006.229.06:35:04.13#ibcon#about to read 6, iclass 25, count 2 2006.229.06:35:04.13#ibcon#read 6, iclass 25, count 2 2006.229.06:35:04.13#ibcon#end of sib2, iclass 25, count 2 2006.229.06:35:04.13#ibcon#*after write, iclass 25, count 2 2006.229.06:35:04.13#ibcon#*before return 0, iclass 25, count 2 2006.229.06:35:04.13#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:04.13#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:04.13#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.06:35:04.13#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:04.13#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:04.25#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:04.25#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:04.25#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:35:04.25#ibcon#first serial, iclass 25, count 0 2006.229.06:35:04.25#ibcon#enter sib2, iclass 25, count 0 2006.229.06:35:04.25#ibcon#flushed, iclass 25, count 0 2006.229.06:35:04.25#ibcon#about to write, iclass 25, count 0 2006.229.06:35:04.25#ibcon#wrote, iclass 25, count 0 2006.229.06:35:04.25#ibcon#about to read 3, iclass 25, count 0 2006.229.06:35:04.27#ibcon#read 3, iclass 25, count 0 2006.229.06:35:04.27#ibcon#about to read 4, iclass 25, count 0 2006.229.06:35:04.27#ibcon#read 4, iclass 25, count 0 2006.229.06:35:04.27#ibcon#about to read 5, iclass 25, count 0 2006.229.06:35:04.27#ibcon#read 5, iclass 25, count 0 2006.229.06:35:04.27#ibcon#about to read 6, iclass 25, count 0 2006.229.06:35:04.27#ibcon#read 6, iclass 25, count 0 2006.229.06:35:04.27#ibcon#end of sib2, iclass 25, count 0 2006.229.06:35:04.27#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:35:04.27#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:35:04.27#ibcon#[25=USB\r\n] 2006.229.06:35:04.27#ibcon#*before write, iclass 25, count 0 2006.229.06:35:04.27#ibcon#enter sib2, iclass 25, count 0 2006.229.06:35:04.27#ibcon#flushed, iclass 25, count 0 2006.229.06:35:04.27#ibcon#about to write, iclass 25, count 0 2006.229.06:35:04.27#ibcon#wrote, iclass 25, count 0 2006.229.06:35:04.27#ibcon#about to read 3, iclass 25, count 0 2006.229.06:35:04.30#ibcon#read 3, iclass 25, count 0 2006.229.06:35:04.30#ibcon#about to read 4, iclass 25, count 0 2006.229.06:35:04.30#ibcon#read 4, iclass 25, count 0 2006.229.06:35:04.30#ibcon#about to read 5, iclass 25, count 0 2006.229.06:35:04.30#ibcon#read 5, iclass 25, count 0 2006.229.06:35:04.30#ibcon#about to read 6, iclass 25, count 0 2006.229.06:35:04.30#ibcon#read 6, iclass 25, count 0 2006.229.06:35:04.30#ibcon#end of sib2, iclass 25, count 0 2006.229.06:35:04.30#ibcon#*after write, iclass 25, count 0 2006.229.06:35:04.30#ibcon#*before return 0, iclass 25, count 0 2006.229.06:35:04.30#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:04.30#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:04.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:35:04.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:35:04.30$vck44/vblo=1,629.99 2006.229.06:35:04.30#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.06:35:04.30#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.06:35:04.30#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:04.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:04.30#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:04.30#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:04.30#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:35:04.30#ibcon#first serial, iclass 27, count 0 2006.229.06:35:04.30#ibcon#enter sib2, iclass 27, count 0 2006.229.06:35:04.30#ibcon#flushed, iclass 27, count 0 2006.229.06:35:04.30#ibcon#about to write, iclass 27, count 0 2006.229.06:35:04.30#ibcon#wrote, iclass 27, count 0 2006.229.06:35:04.30#ibcon#about to read 3, iclass 27, count 0 2006.229.06:35:04.32#ibcon#read 3, iclass 27, count 0 2006.229.06:35:04.32#ibcon#about to read 4, iclass 27, count 0 2006.229.06:35:04.32#ibcon#read 4, iclass 27, count 0 2006.229.06:35:04.32#ibcon#about to read 5, iclass 27, count 0 2006.229.06:35:04.32#ibcon#read 5, iclass 27, count 0 2006.229.06:35:04.32#ibcon#about to read 6, iclass 27, count 0 2006.229.06:35:04.32#ibcon#read 6, iclass 27, count 0 2006.229.06:35:04.32#ibcon#end of sib2, iclass 27, count 0 2006.229.06:35:04.32#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:35:04.32#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:35:04.32#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:35:04.32#ibcon#*before write, iclass 27, count 0 2006.229.06:35:04.32#ibcon#enter sib2, iclass 27, count 0 2006.229.06:35:04.32#ibcon#flushed, iclass 27, count 0 2006.229.06:35:04.32#ibcon#about to write, iclass 27, count 0 2006.229.06:35:04.32#ibcon#wrote, iclass 27, count 0 2006.229.06:35:04.32#ibcon#about to read 3, iclass 27, count 0 2006.229.06:35:04.36#ibcon#read 3, iclass 27, count 0 2006.229.06:35:04.36#ibcon#about to read 4, iclass 27, count 0 2006.229.06:35:04.36#ibcon#read 4, iclass 27, count 0 2006.229.06:35:04.36#ibcon#about to read 5, iclass 27, count 0 2006.229.06:35:04.36#ibcon#read 5, iclass 27, count 0 2006.229.06:35:04.36#ibcon#about to read 6, iclass 27, count 0 2006.229.06:35:04.36#ibcon#read 6, iclass 27, count 0 2006.229.06:35:04.36#ibcon#end of sib2, iclass 27, count 0 2006.229.06:35:04.36#ibcon#*after write, iclass 27, count 0 2006.229.06:35:04.36#ibcon#*before return 0, iclass 27, count 0 2006.229.06:35:04.36#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:04.36#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:04.36#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:35:04.36#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:35:04.36$vck44/vb=1,4 2006.229.06:35:04.36#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.06:35:04.36#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.06:35:04.36#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:04.36#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:35:04.36#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:35:04.36#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:35:04.36#ibcon#enter wrdev, iclass 29, count 2 2006.229.06:35:04.36#ibcon#first serial, iclass 29, count 2 2006.229.06:35:04.36#ibcon#enter sib2, iclass 29, count 2 2006.229.06:35:04.36#ibcon#flushed, iclass 29, count 2 2006.229.06:35:04.36#ibcon#about to write, iclass 29, count 2 2006.229.06:35:04.36#ibcon#wrote, iclass 29, count 2 2006.229.06:35:04.36#ibcon#about to read 3, iclass 29, count 2 2006.229.06:35:04.38#ibcon#read 3, iclass 29, count 2 2006.229.06:35:04.38#ibcon#about to read 4, iclass 29, count 2 2006.229.06:35:04.38#ibcon#read 4, iclass 29, count 2 2006.229.06:35:04.38#ibcon#about to read 5, iclass 29, count 2 2006.229.06:35:04.38#ibcon#read 5, iclass 29, count 2 2006.229.06:35:04.38#ibcon#about to read 6, iclass 29, count 2 2006.229.06:35:04.38#ibcon#read 6, iclass 29, count 2 2006.229.06:35:04.38#ibcon#end of sib2, iclass 29, count 2 2006.229.06:35:04.38#ibcon#*mode == 0, iclass 29, count 2 2006.229.06:35:04.38#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.06:35:04.38#ibcon#[27=AT01-04\r\n] 2006.229.06:35:04.38#ibcon#*before write, iclass 29, count 2 2006.229.06:35:04.38#ibcon#enter sib2, iclass 29, count 2 2006.229.06:35:04.38#ibcon#flushed, iclass 29, count 2 2006.229.06:35:04.38#ibcon#about to write, iclass 29, count 2 2006.229.06:35:04.38#ibcon#wrote, iclass 29, count 2 2006.229.06:35:04.38#ibcon#about to read 3, iclass 29, count 2 2006.229.06:35:04.41#ibcon#read 3, iclass 29, count 2 2006.229.06:35:04.41#ibcon#about to read 4, iclass 29, count 2 2006.229.06:35:04.41#ibcon#read 4, iclass 29, count 2 2006.229.06:35:04.41#ibcon#about to read 5, iclass 29, count 2 2006.229.06:35:04.41#ibcon#read 5, iclass 29, count 2 2006.229.06:35:04.41#ibcon#about to read 6, iclass 29, count 2 2006.229.06:35:04.41#ibcon#read 6, iclass 29, count 2 2006.229.06:35:04.41#ibcon#end of sib2, iclass 29, count 2 2006.229.06:35:04.41#ibcon#*after write, iclass 29, count 2 2006.229.06:35:04.41#ibcon#*before return 0, iclass 29, count 2 2006.229.06:35:04.41#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:35:04.41#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:35:04.41#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.06:35:04.41#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:04.41#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:35:04.53#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:35:04.53#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:35:04.53#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:35:04.53#ibcon#first serial, iclass 29, count 0 2006.229.06:35:04.53#ibcon#enter sib2, iclass 29, count 0 2006.229.06:35:04.53#ibcon#flushed, iclass 29, count 0 2006.229.06:35:04.53#ibcon#about to write, iclass 29, count 0 2006.229.06:35:04.53#ibcon#wrote, iclass 29, count 0 2006.229.06:35:04.53#ibcon#about to read 3, iclass 29, count 0 2006.229.06:35:04.55#ibcon#read 3, iclass 29, count 0 2006.229.06:35:04.55#ibcon#about to read 4, iclass 29, count 0 2006.229.06:35:04.55#ibcon#read 4, iclass 29, count 0 2006.229.06:35:04.55#ibcon#about to read 5, iclass 29, count 0 2006.229.06:35:04.55#ibcon#read 5, iclass 29, count 0 2006.229.06:35:04.55#ibcon#about to read 6, iclass 29, count 0 2006.229.06:35:04.55#ibcon#read 6, iclass 29, count 0 2006.229.06:35:04.55#ibcon#end of sib2, iclass 29, count 0 2006.229.06:35:04.55#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:35:04.55#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:35:04.55#ibcon#[27=USB\r\n] 2006.229.06:35:04.55#ibcon#*before write, iclass 29, count 0 2006.229.06:35:04.55#ibcon#enter sib2, iclass 29, count 0 2006.229.06:35:04.55#ibcon#flushed, iclass 29, count 0 2006.229.06:35:04.55#ibcon#about to write, iclass 29, count 0 2006.229.06:35:04.55#ibcon#wrote, iclass 29, count 0 2006.229.06:35:04.55#ibcon#about to read 3, iclass 29, count 0 2006.229.06:35:04.58#ibcon#read 3, iclass 29, count 0 2006.229.06:35:04.58#ibcon#about to read 4, iclass 29, count 0 2006.229.06:35:04.58#ibcon#read 4, iclass 29, count 0 2006.229.06:35:04.58#ibcon#about to read 5, iclass 29, count 0 2006.229.06:35:04.58#ibcon#read 5, iclass 29, count 0 2006.229.06:35:04.58#ibcon#about to read 6, iclass 29, count 0 2006.229.06:35:04.58#ibcon#read 6, iclass 29, count 0 2006.229.06:35:04.58#ibcon#end of sib2, iclass 29, count 0 2006.229.06:35:04.58#ibcon#*after write, iclass 29, count 0 2006.229.06:35:04.58#ibcon#*before return 0, iclass 29, count 0 2006.229.06:35:04.58#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:35:04.58#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:35:04.58#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:35:04.58#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:35:04.58$vck44/vblo=2,634.99 2006.229.06:35:04.58#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:35:04.58#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:35:04.58#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:04.58#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:04.58#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:04.58#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:04.58#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:35:04.58#ibcon#first serial, iclass 31, count 0 2006.229.06:35:04.58#ibcon#enter sib2, iclass 31, count 0 2006.229.06:35:04.58#ibcon#flushed, iclass 31, count 0 2006.229.06:35:04.58#ibcon#about to write, iclass 31, count 0 2006.229.06:35:04.58#ibcon#wrote, iclass 31, count 0 2006.229.06:35:04.58#ibcon#about to read 3, iclass 31, count 0 2006.229.06:35:04.60#ibcon#read 3, iclass 31, count 0 2006.229.06:35:04.60#ibcon#about to read 4, iclass 31, count 0 2006.229.06:35:04.60#ibcon#read 4, iclass 31, count 0 2006.229.06:35:04.60#ibcon#about to read 5, iclass 31, count 0 2006.229.06:35:04.60#ibcon#read 5, iclass 31, count 0 2006.229.06:35:04.60#ibcon#about to read 6, iclass 31, count 0 2006.229.06:35:04.60#ibcon#read 6, iclass 31, count 0 2006.229.06:35:04.60#ibcon#end of sib2, iclass 31, count 0 2006.229.06:35:04.60#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:35:04.60#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:35:04.60#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:35:04.60#ibcon#*before write, iclass 31, count 0 2006.229.06:35:04.60#ibcon#enter sib2, iclass 31, count 0 2006.229.06:35:04.60#ibcon#flushed, iclass 31, count 0 2006.229.06:35:04.60#ibcon#about to write, iclass 31, count 0 2006.229.06:35:04.60#ibcon#wrote, iclass 31, count 0 2006.229.06:35:04.60#ibcon#about to read 3, iclass 31, count 0 2006.229.06:35:04.64#ibcon#read 3, iclass 31, count 0 2006.229.06:35:04.64#ibcon#about to read 4, iclass 31, count 0 2006.229.06:35:04.64#ibcon#read 4, iclass 31, count 0 2006.229.06:35:04.64#ibcon#about to read 5, iclass 31, count 0 2006.229.06:35:04.64#ibcon#read 5, iclass 31, count 0 2006.229.06:35:04.64#ibcon#about to read 6, iclass 31, count 0 2006.229.06:35:04.64#ibcon#read 6, iclass 31, count 0 2006.229.06:35:04.64#ibcon#end of sib2, iclass 31, count 0 2006.229.06:35:04.64#ibcon#*after write, iclass 31, count 0 2006.229.06:35:04.64#ibcon#*before return 0, iclass 31, count 0 2006.229.06:35:04.64#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:04.64#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:35:04.64#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:35:04.64#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:35:04.64$vck44/vb=2,4 2006.229.06:35:04.64#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:35:04.64#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:35:04.64#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:04.64#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:35:04.68#abcon#<5=/05 3.2 6.8 30.32 92 999.7\r\n> 2006.229.06:35:04.70#abcon#{5=INTERFACE CLEAR} 2006.229.06:35:04.70#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:35:04.70#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:35:04.70#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:35:04.70#ibcon#first serial, iclass 34, count 2 2006.229.06:35:04.70#ibcon#enter sib2, iclass 34, count 2 2006.229.06:35:04.70#ibcon#flushed, iclass 34, count 2 2006.229.06:35:04.70#ibcon#about to write, iclass 34, count 2 2006.229.06:35:04.70#ibcon#wrote, iclass 34, count 2 2006.229.06:35:04.70#ibcon#about to read 3, iclass 34, count 2 2006.229.06:35:04.72#ibcon#read 3, iclass 34, count 2 2006.229.06:35:04.72#ibcon#about to read 4, iclass 34, count 2 2006.229.06:35:04.72#ibcon#read 4, iclass 34, count 2 2006.229.06:35:04.72#ibcon#about to read 5, iclass 34, count 2 2006.229.06:35:04.72#ibcon#read 5, iclass 34, count 2 2006.229.06:35:04.72#ibcon#about to read 6, iclass 34, count 2 2006.229.06:35:04.72#ibcon#read 6, iclass 34, count 2 2006.229.06:35:04.72#ibcon#end of sib2, iclass 34, count 2 2006.229.06:35:04.72#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:35:04.72#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:35:04.72#ibcon#[27=AT02-04\r\n] 2006.229.06:35:04.72#ibcon#*before write, iclass 34, count 2 2006.229.06:35:04.72#ibcon#enter sib2, iclass 34, count 2 2006.229.06:35:04.72#ibcon#flushed, iclass 34, count 2 2006.229.06:35:04.72#ibcon#about to write, iclass 34, count 2 2006.229.06:35:04.72#ibcon#wrote, iclass 34, count 2 2006.229.06:35:04.72#ibcon#about to read 3, iclass 34, count 2 2006.229.06:35:04.75#ibcon#read 3, iclass 34, count 2 2006.229.06:35:04.75#ibcon#about to read 4, iclass 34, count 2 2006.229.06:35:04.75#ibcon#read 4, iclass 34, count 2 2006.229.06:35:04.75#ibcon#about to read 5, iclass 34, count 2 2006.229.06:35:04.75#ibcon#read 5, iclass 34, count 2 2006.229.06:35:04.75#ibcon#about to read 6, iclass 34, count 2 2006.229.06:35:04.75#ibcon#read 6, iclass 34, count 2 2006.229.06:35:04.75#ibcon#end of sib2, iclass 34, count 2 2006.229.06:35:04.75#ibcon#*after write, iclass 34, count 2 2006.229.06:35:04.75#ibcon#*before return 0, iclass 34, count 2 2006.229.06:35:04.75#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:35:04.75#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:35:04.75#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:35:04.75#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:04.75#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:35:04.76#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:35:04.87#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:35:04.87#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:35:04.87#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:35:04.87#ibcon#first serial, iclass 34, count 0 2006.229.06:35:04.87#ibcon#enter sib2, iclass 34, count 0 2006.229.06:35:04.87#ibcon#flushed, iclass 34, count 0 2006.229.06:35:04.87#ibcon#about to write, iclass 34, count 0 2006.229.06:35:04.87#ibcon#wrote, iclass 34, count 0 2006.229.06:35:04.87#ibcon#about to read 3, iclass 34, count 0 2006.229.06:35:04.89#ibcon#read 3, iclass 34, count 0 2006.229.06:35:04.89#ibcon#about to read 4, iclass 34, count 0 2006.229.06:35:04.89#ibcon#read 4, iclass 34, count 0 2006.229.06:35:04.89#ibcon#about to read 5, iclass 34, count 0 2006.229.06:35:04.89#ibcon#read 5, iclass 34, count 0 2006.229.06:35:04.89#ibcon#about to read 6, iclass 34, count 0 2006.229.06:35:04.89#ibcon#read 6, iclass 34, count 0 2006.229.06:35:04.89#ibcon#end of sib2, iclass 34, count 0 2006.229.06:35:04.89#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:35:04.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:35:04.89#ibcon#[27=USB\r\n] 2006.229.06:35:04.89#ibcon#*before write, iclass 34, count 0 2006.229.06:35:04.89#ibcon#enter sib2, iclass 34, count 0 2006.229.06:35:04.89#ibcon#flushed, iclass 34, count 0 2006.229.06:35:04.89#ibcon#about to write, iclass 34, count 0 2006.229.06:35:04.89#ibcon#wrote, iclass 34, count 0 2006.229.06:35:04.89#ibcon#about to read 3, iclass 34, count 0 2006.229.06:35:04.92#ibcon#read 3, iclass 34, count 0 2006.229.06:35:04.92#ibcon#about to read 4, iclass 34, count 0 2006.229.06:35:04.92#ibcon#read 4, iclass 34, count 0 2006.229.06:35:04.92#ibcon#about to read 5, iclass 34, count 0 2006.229.06:35:04.92#ibcon#read 5, iclass 34, count 0 2006.229.06:35:04.92#ibcon#about to read 6, iclass 34, count 0 2006.229.06:35:04.92#ibcon#read 6, iclass 34, count 0 2006.229.06:35:04.92#ibcon#end of sib2, iclass 34, count 0 2006.229.06:35:04.92#ibcon#*after write, iclass 34, count 0 2006.229.06:35:04.92#ibcon#*before return 0, iclass 34, count 0 2006.229.06:35:04.92#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:35:04.92#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:35:04.92#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:35:04.92#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:35:04.92$vck44/vblo=3,649.99 2006.229.06:35:04.92#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.06:35:04.92#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.06:35:04.92#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:04.92#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:04.92#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:04.92#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:04.92#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:35:04.92#ibcon#first serial, iclass 39, count 0 2006.229.06:35:04.92#ibcon#enter sib2, iclass 39, count 0 2006.229.06:35:04.92#ibcon#flushed, iclass 39, count 0 2006.229.06:35:04.92#ibcon#about to write, iclass 39, count 0 2006.229.06:35:04.92#ibcon#wrote, iclass 39, count 0 2006.229.06:35:04.92#ibcon#about to read 3, iclass 39, count 0 2006.229.06:35:04.94#ibcon#read 3, iclass 39, count 0 2006.229.06:35:04.94#ibcon#about to read 4, iclass 39, count 0 2006.229.06:35:04.94#ibcon#read 4, iclass 39, count 0 2006.229.06:35:04.94#ibcon#about to read 5, iclass 39, count 0 2006.229.06:35:04.94#ibcon#read 5, iclass 39, count 0 2006.229.06:35:04.94#ibcon#about to read 6, iclass 39, count 0 2006.229.06:35:04.94#ibcon#read 6, iclass 39, count 0 2006.229.06:35:04.94#ibcon#end of sib2, iclass 39, count 0 2006.229.06:35:04.94#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:35:04.94#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:35:04.94#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:35:04.94#ibcon#*before write, iclass 39, count 0 2006.229.06:35:04.94#ibcon#enter sib2, iclass 39, count 0 2006.229.06:35:04.94#ibcon#flushed, iclass 39, count 0 2006.229.06:35:04.94#ibcon#about to write, iclass 39, count 0 2006.229.06:35:04.94#ibcon#wrote, iclass 39, count 0 2006.229.06:35:04.94#ibcon#about to read 3, iclass 39, count 0 2006.229.06:35:04.98#ibcon#read 3, iclass 39, count 0 2006.229.06:35:04.98#ibcon#about to read 4, iclass 39, count 0 2006.229.06:35:04.98#ibcon#read 4, iclass 39, count 0 2006.229.06:35:04.98#ibcon#about to read 5, iclass 39, count 0 2006.229.06:35:04.98#ibcon#read 5, iclass 39, count 0 2006.229.06:35:04.98#ibcon#about to read 6, iclass 39, count 0 2006.229.06:35:04.98#ibcon#read 6, iclass 39, count 0 2006.229.06:35:04.98#ibcon#end of sib2, iclass 39, count 0 2006.229.06:35:04.98#ibcon#*after write, iclass 39, count 0 2006.229.06:35:04.98#ibcon#*before return 0, iclass 39, count 0 2006.229.06:35:04.98#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:04.98#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:35:04.98#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:35:04.98#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:35:04.98$vck44/vb=3,4 2006.229.06:35:04.98#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:35:04.98#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:35:04.98#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:04.98#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:05.04#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:05.04#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:05.04#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:35:05.04#ibcon#first serial, iclass 3, count 2 2006.229.06:35:05.04#ibcon#enter sib2, iclass 3, count 2 2006.229.06:35:05.04#ibcon#flushed, iclass 3, count 2 2006.229.06:35:05.04#ibcon#about to write, iclass 3, count 2 2006.229.06:35:05.04#ibcon#wrote, iclass 3, count 2 2006.229.06:35:05.04#ibcon#about to read 3, iclass 3, count 2 2006.229.06:35:05.06#ibcon#read 3, iclass 3, count 2 2006.229.06:35:05.06#ibcon#about to read 4, iclass 3, count 2 2006.229.06:35:05.06#ibcon#read 4, iclass 3, count 2 2006.229.06:35:05.06#ibcon#about to read 5, iclass 3, count 2 2006.229.06:35:05.06#ibcon#read 5, iclass 3, count 2 2006.229.06:35:05.06#ibcon#about to read 6, iclass 3, count 2 2006.229.06:35:05.06#ibcon#read 6, iclass 3, count 2 2006.229.06:35:05.06#ibcon#end of sib2, iclass 3, count 2 2006.229.06:35:05.06#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:35:05.06#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:35:05.06#ibcon#[27=AT03-04\r\n] 2006.229.06:35:05.06#ibcon#*before write, iclass 3, count 2 2006.229.06:35:05.06#ibcon#enter sib2, iclass 3, count 2 2006.229.06:35:05.06#ibcon#flushed, iclass 3, count 2 2006.229.06:35:05.06#ibcon#about to write, iclass 3, count 2 2006.229.06:35:05.06#ibcon#wrote, iclass 3, count 2 2006.229.06:35:05.06#ibcon#about to read 3, iclass 3, count 2 2006.229.06:35:05.09#ibcon#read 3, iclass 3, count 2 2006.229.06:35:05.09#ibcon#about to read 4, iclass 3, count 2 2006.229.06:35:05.09#ibcon#read 4, iclass 3, count 2 2006.229.06:35:05.09#ibcon#about to read 5, iclass 3, count 2 2006.229.06:35:05.09#ibcon#read 5, iclass 3, count 2 2006.229.06:35:05.09#ibcon#about to read 6, iclass 3, count 2 2006.229.06:35:05.09#ibcon#read 6, iclass 3, count 2 2006.229.06:35:05.09#ibcon#end of sib2, iclass 3, count 2 2006.229.06:35:05.09#ibcon#*after write, iclass 3, count 2 2006.229.06:35:05.09#ibcon#*before return 0, iclass 3, count 2 2006.229.06:35:05.09#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:05.09#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:35:05.09#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:35:05.09#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:05.09#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:05.21#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:05.21#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:05.21#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:35:05.21#ibcon#first serial, iclass 3, count 0 2006.229.06:35:05.21#ibcon#enter sib2, iclass 3, count 0 2006.229.06:35:05.21#ibcon#flushed, iclass 3, count 0 2006.229.06:35:05.21#ibcon#about to write, iclass 3, count 0 2006.229.06:35:05.21#ibcon#wrote, iclass 3, count 0 2006.229.06:35:05.21#ibcon#about to read 3, iclass 3, count 0 2006.229.06:35:05.23#ibcon#read 3, iclass 3, count 0 2006.229.06:35:05.23#ibcon#about to read 4, iclass 3, count 0 2006.229.06:35:05.23#ibcon#read 4, iclass 3, count 0 2006.229.06:35:05.23#ibcon#about to read 5, iclass 3, count 0 2006.229.06:35:05.23#ibcon#read 5, iclass 3, count 0 2006.229.06:35:05.23#ibcon#about to read 6, iclass 3, count 0 2006.229.06:35:05.23#ibcon#read 6, iclass 3, count 0 2006.229.06:35:05.23#ibcon#end of sib2, iclass 3, count 0 2006.229.06:35:05.23#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:35:05.23#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:35:05.23#ibcon#[27=USB\r\n] 2006.229.06:35:05.23#ibcon#*before write, iclass 3, count 0 2006.229.06:35:05.23#ibcon#enter sib2, iclass 3, count 0 2006.229.06:35:05.23#ibcon#flushed, iclass 3, count 0 2006.229.06:35:05.23#ibcon#about to write, iclass 3, count 0 2006.229.06:35:05.23#ibcon#wrote, iclass 3, count 0 2006.229.06:35:05.23#ibcon#about to read 3, iclass 3, count 0 2006.229.06:35:05.26#ibcon#read 3, iclass 3, count 0 2006.229.06:35:05.26#ibcon#about to read 4, iclass 3, count 0 2006.229.06:35:05.26#ibcon#read 4, iclass 3, count 0 2006.229.06:35:05.26#ibcon#about to read 5, iclass 3, count 0 2006.229.06:35:05.26#ibcon#read 5, iclass 3, count 0 2006.229.06:35:05.26#ibcon#about to read 6, iclass 3, count 0 2006.229.06:35:05.26#ibcon#read 6, iclass 3, count 0 2006.229.06:35:05.26#ibcon#end of sib2, iclass 3, count 0 2006.229.06:35:05.26#ibcon#*after write, iclass 3, count 0 2006.229.06:35:05.26#ibcon#*before return 0, iclass 3, count 0 2006.229.06:35:05.26#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:05.26#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:35:05.26#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:35:05.26#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:35:05.26$vck44/vblo=4,679.99 2006.229.06:35:05.26#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.06:35:05.26#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.06:35:05.26#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:05.26#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:05.26#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:05.26#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:05.26#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:35:05.26#ibcon#first serial, iclass 5, count 0 2006.229.06:35:05.26#ibcon#enter sib2, iclass 5, count 0 2006.229.06:35:05.26#ibcon#flushed, iclass 5, count 0 2006.229.06:35:05.26#ibcon#about to write, iclass 5, count 0 2006.229.06:35:05.26#ibcon#wrote, iclass 5, count 0 2006.229.06:35:05.26#ibcon#about to read 3, iclass 5, count 0 2006.229.06:35:05.28#ibcon#read 3, iclass 5, count 0 2006.229.06:35:05.28#ibcon#about to read 4, iclass 5, count 0 2006.229.06:35:05.28#ibcon#read 4, iclass 5, count 0 2006.229.06:35:05.28#ibcon#about to read 5, iclass 5, count 0 2006.229.06:35:05.28#ibcon#read 5, iclass 5, count 0 2006.229.06:35:05.28#ibcon#about to read 6, iclass 5, count 0 2006.229.06:35:05.28#ibcon#read 6, iclass 5, count 0 2006.229.06:35:05.28#ibcon#end of sib2, iclass 5, count 0 2006.229.06:35:05.28#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:35:05.28#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:35:05.28#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:35:05.28#ibcon#*before write, iclass 5, count 0 2006.229.06:35:05.28#ibcon#enter sib2, iclass 5, count 0 2006.229.06:35:05.28#ibcon#flushed, iclass 5, count 0 2006.229.06:35:05.28#ibcon#about to write, iclass 5, count 0 2006.229.06:35:05.28#ibcon#wrote, iclass 5, count 0 2006.229.06:35:05.28#ibcon#about to read 3, iclass 5, count 0 2006.229.06:35:05.32#ibcon#read 3, iclass 5, count 0 2006.229.06:35:05.32#ibcon#about to read 4, iclass 5, count 0 2006.229.06:35:05.32#ibcon#read 4, iclass 5, count 0 2006.229.06:35:05.32#ibcon#about to read 5, iclass 5, count 0 2006.229.06:35:05.32#ibcon#read 5, iclass 5, count 0 2006.229.06:35:05.32#ibcon#about to read 6, iclass 5, count 0 2006.229.06:35:05.32#ibcon#read 6, iclass 5, count 0 2006.229.06:35:05.32#ibcon#end of sib2, iclass 5, count 0 2006.229.06:35:05.32#ibcon#*after write, iclass 5, count 0 2006.229.06:35:05.32#ibcon#*before return 0, iclass 5, count 0 2006.229.06:35:05.32#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:05.32#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:35:05.32#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:35:05.32#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:35:05.32$vck44/vb=4,4 2006.229.06:35:05.32#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.06:35:05.32#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.06:35:05.32#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:05.32#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:05.38#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:05.38#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:05.38#ibcon#enter wrdev, iclass 7, count 2 2006.229.06:35:05.38#ibcon#first serial, iclass 7, count 2 2006.229.06:35:05.38#ibcon#enter sib2, iclass 7, count 2 2006.229.06:35:05.38#ibcon#flushed, iclass 7, count 2 2006.229.06:35:05.38#ibcon#about to write, iclass 7, count 2 2006.229.06:35:05.38#ibcon#wrote, iclass 7, count 2 2006.229.06:35:05.38#ibcon#about to read 3, iclass 7, count 2 2006.229.06:35:05.40#ibcon#read 3, iclass 7, count 2 2006.229.06:35:05.40#ibcon#about to read 4, iclass 7, count 2 2006.229.06:35:05.40#ibcon#read 4, iclass 7, count 2 2006.229.06:35:05.40#ibcon#about to read 5, iclass 7, count 2 2006.229.06:35:05.40#ibcon#read 5, iclass 7, count 2 2006.229.06:35:05.40#ibcon#about to read 6, iclass 7, count 2 2006.229.06:35:05.40#ibcon#read 6, iclass 7, count 2 2006.229.06:35:05.40#ibcon#end of sib2, iclass 7, count 2 2006.229.06:35:05.40#ibcon#*mode == 0, iclass 7, count 2 2006.229.06:35:05.40#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.06:35:05.40#ibcon#[27=AT04-04\r\n] 2006.229.06:35:05.40#ibcon#*before write, iclass 7, count 2 2006.229.06:35:05.40#ibcon#enter sib2, iclass 7, count 2 2006.229.06:35:05.40#ibcon#flushed, iclass 7, count 2 2006.229.06:35:05.40#ibcon#about to write, iclass 7, count 2 2006.229.06:35:05.40#ibcon#wrote, iclass 7, count 2 2006.229.06:35:05.40#ibcon#about to read 3, iclass 7, count 2 2006.229.06:35:05.43#ibcon#read 3, iclass 7, count 2 2006.229.06:35:05.43#ibcon#about to read 4, iclass 7, count 2 2006.229.06:35:05.43#ibcon#read 4, iclass 7, count 2 2006.229.06:35:05.43#ibcon#about to read 5, iclass 7, count 2 2006.229.06:35:05.43#ibcon#read 5, iclass 7, count 2 2006.229.06:35:05.43#ibcon#about to read 6, iclass 7, count 2 2006.229.06:35:05.43#ibcon#read 6, iclass 7, count 2 2006.229.06:35:05.43#ibcon#end of sib2, iclass 7, count 2 2006.229.06:35:05.43#ibcon#*after write, iclass 7, count 2 2006.229.06:35:05.43#ibcon#*before return 0, iclass 7, count 2 2006.229.06:35:05.43#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:05.43#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:35:05.43#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.06:35:05.43#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:05.43#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:05.55#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:05.55#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:05.55#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:35:05.55#ibcon#first serial, iclass 7, count 0 2006.229.06:35:05.55#ibcon#enter sib2, iclass 7, count 0 2006.229.06:35:05.55#ibcon#flushed, iclass 7, count 0 2006.229.06:35:05.55#ibcon#about to write, iclass 7, count 0 2006.229.06:35:05.55#ibcon#wrote, iclass 7, count 0 2006.229.06:35:05.55#ibcon#about to read 3, iclass 7, count 0 2006.229.06:35:05.57#ibcon#read 3, iclass 7, count 0 2006.229.06:35:05.57#ibcon#about to read 4, iclass 7, count 0 2006.229.06:35:05.57#ibcon#read 4, iclass 7, count 0 2006.229.06:35:05.57#ibcon#about to read 5, iclass 7, count 0 2006.229.06:35:05.57#ibcon#read 5, iclass 7, count 0 2006.229.06:35:05.57#ibcon#about to read 6, iclass 7, count 0 2006.229.06:35:05.57#ibcon#read 6, iclass 7, count 0 2006.229.06:35:05.57#ibcon#end of sib2, iclass 7, count 0 2006.229.06:35:05.57#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:35:05.57#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:35:05.57#ibcon#[27=USB\r\n] 2006.229.06:35:05.57#ibcon#*before write, iclass 7, count 0 2006.229.06:35:05.57#ibcon#enter sib2, iclass 7, count 0 2006.229.06:35:05.57#ibcon#flushed, iclass 7, count 0 2006.229.06:35:05.57#ibcon#about to write, iclass 7, count 0 2006.229.06:35:05.57#ibcon#wrote, iclass 7, count 0 2006.229.06:35:05.57#ibcon#about to read 3, iclass 7, count 0 2006.229.06:35:05.60#ibcon#read 3, iclass 7, count 0 2006.229.06:35:05.60#ibcon#about to read 4, iclass 7, count 0 2006.229.06:35:05.60#ibcon#read 4, iclass 7, count 0 2006.229.06:35:05.60#ibcon#about to read 5, iclass 7, count 0 2006.229.06:35:05.60#ibcon#read 5, iclass 7, count 0 2006.229.06:35:05.60#ibcon#about to read 6, iclass 7, count 0 2006.229.06:35:05.60#ibcon#read 6, iclass 7, count 0 2006.229.06:35:05.60#ibcon#end of sib2, iclass 7, count 0 2006.229.06:35:05.60#ibcon#*after write, iclass 7, count 0 2006.229.06:35:05.60#ibcon#*before return 0, iclass 7, count 0 2006.229.06:35:05.60#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:05.60#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:35:05.60#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:35:05.60#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:35:05.60$vck44/vblo=5,709.99 2006.229.06:35:05.60#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.06:35:05.60#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.06:35:05.60#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:05.60#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:05.60#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:05.60#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:05.60#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:35:05.60#ibcon#first serial, iclass 11, count 0 2006.229.06:35:05.60#ibcon#enter sib2, iclass 11, count 0 2006.229.06:35:05.60#ibcon#flushed, iclass 11, count 0 2006.229.06:35:05.60#ibcon#about to write, iclass 11, count 0 2006.229.06:35:05.60#ibcon#wrote, iclass 11, count 0 2006.229.06:35:05.60#ibcon#about to read 3, iclass 11, count 0 2006.229.06:35:05.62#ibcon#read 3, iclass 11, count 0 2006.229.06:35:05.62#ibcon#about to read 4, iclass 11, count 0 2006.229.06:35:05.62#ibcon#read 4, iclass 11, count 0 2006.229.06:35:05.62#ibcon#about to read 5, iclass 11, count 0 2006.229.06:35:05.62#ibcon#read 5, iclass 11, count 0 2006.229.06:35:05.62#ibcon#about to read 6, iclass 11, count 0 2006.229.06:35:05.62#ibcon#read 6, iclass 11, count 0 2006.229.06:35:05.62#ibcon#end of sib2, iclass 11, count 0 2006.229.06:35:05.62#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:35:05.62#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:35:05.62#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:35:05.62#ibcon#*before write, iclass 11, count 0 2006.229.06:35:05.62#ibcon#enter sib2, iclass 11, count 0 2006.229.06:35:05.62#ibcon#flushed, iclass 11, count 0 2006.229.06:35:05.62#ibcon#about to write, iclass 11, count 0 2006.229.06:35:05.62#ibcon#wrote, iclass 11, count 0 2006.229.06:35:05.62#ibcon#about to read 3, iclass 11, count 0 2006.229.06:35:05.66#ibcon#read 3, iclass 11, count 0 2006.229.06:35:05.66#ibcon#about to read 4, iclass 11, count 0 2006.229.06:35:05.66#ibcon#read 4, iclass 11, count 0 2006.229.06:35:05.66#ibcon#about to read 5, iclass 11, count 0 2006.229.06:35:05.66#ibcon#read 5, iclass 11, count 0 2006.229.06:35:05.66#ibcon#about to read 6, iclass 11, count 0 2006.229.06:35:05.66#ibcon#read 6, iclass 11, count 0 2006.229.06:35:05.66#ibcon#end of sib2, iclass 11, count 0 2006.229.06:35:05.66#ibcon#*after write, iclass 11, count 0 2006.229.06:35:05.66#ibcon#*before return 0, iclass 11, count 0 2006.229.06:35:05.66#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:05.66#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:35:05.66#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:35:05.66#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:35:05.66$vck44/vb=5,4 2006.229.06:35:05.66#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.06:35:05.66#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.06:35:05.66#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:05.66#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:05.72#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:05.72#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:05.72#ibcon#enter wrdev, iclass 13, count 2 2006.229.06:35:05.72#ibcon#first serial, iclass 13, count 2 2006.229.06:35:05.72#ibcon#enter sib2, iclass 13, count 2 2006.229.06:35:05.72#ibcon#flushed, iclass 13, count 2 2006.229.06:35:05.72#ibcon#about to write, iclass 13, count 2 2006.229.06:35:05.72#ibcon#wrote, iclass 13, count 2 2006.229.06:35:05.72#ibcon#about to read 3, iclass 13, count 2 2006.229.06:35:05.74#ibcon#read 3, iclass 13, count 2 2006.229.06:35:05.74#ibcon#about to read 4, iclass 13, count 2 2006.229.06:35:05.74#ibcon#read 4, iclass 13, count 2 2006.229.06:35:05.74#ibcon#about to read 5, iclass 13, count 2 2006.229.06:35:05.74#ibcon#read 5, iclass 13, count 2 2006.229.06:35:05.74#ibcon#about to read 6, iclass 13, count 2 2006.229.06:35:05.74#ibcon#read 6, iclass 13, count 2 2006.229.06:35:05.74#ibcon#end of sib2, iclass 13, count 2 2006.229.06:35:05.74#ibcon#*mode == 0, iclass 13, count 2 2006.229.06:35:05.74#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.06:35:05.74#ibcon#[27=AT05-04\r\n] 2006.229.06:35:05.74#ibcon#*before write, iclass 13, count 2 2006.229.06:35:05.74#ibcon#enter sib2, iclass 13, count 2 2006.229.06:35:05.74#ibcon#flushed, iclass 13, count 2 2006.229.06:35:05.74#ibcon#about to write, iclass 13, count 2 2006.229.06:35:05.74#ibcon#wrote, iclass 13, count 2 2006.229.06:35:05.74#ibcon#about to read 3, iclass 13, count 2 2006.229.06:35:05.77#ibcon#read 3, iclass 13, count 2 2006.229.06:35:05.77#ibcon#about to read 4, iclass 13, count 2 2006.229.06:35:05.77#ibcon#read 4, iclass 13, count 2 2006.229.06:35:05.77#ibcon#about to read 5, iclass 13, count 2 2006.229.06:35:05.77#ibcon#read 5, iclass 13, count 2 2006.229.06:35:05.77#ibcon#about to read 6, iclass 13, count 2 2006.229.06:35:05.77#ibcon#read 6, iclass 13, count 2 2006.229.06:35:05.77#ibcon#end of sib2, iclass 13, count 2 2006.229.06:35:05.77#ibcon#*after write, iclass 13, count 2 2006.229.06:35:05.77#ibcon#*before return 0, iclass 13, count 2 2006.229.06:35:05.77#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:05.77#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:35:05.77#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.06:35:05.77#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:05.77#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:05.89#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:05.89#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:05.89#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:35:05.89#ibcon#first serial, iclass 13, count 0 2006.229.06:35:05.89#ibcon#enter sib2, iclass 13, count 0 2006.229.06:35:05.89#ibcon#flushed, iclass 13, count 0 2006.229.06:35:05.89#ibcon#about to write, iclass 13, count 0 2006.229.06:35:05.89#ibcon#wrote, iclass 13, count 0 2006.229.06:35:05.89#ibcon#about to read 3, iclass 13, count 0 2006.229.06:35:05.91#ibcon#read 3, iclass 13, count 0 2006.229.06:35:05.91#ibcon#about to read 4, iclass 13, count 0 2006.229.06:35:05.91#ibcon#read 4, iclass 13, count 0 2006.229.06:35:05.91#ibcon#about to read 5, iclass 13, count 0 2006.229.06:35:05.91#ibcon#read 5, iclass 13, count 0 2006.229.06:35:05.91#ibcon#about to read 6, iclass 13, count 0 2006.229.06:35:05.91#ibcon#read 6, iclass 13, count 0 2006.229.06:35:05.91#ibcon#end of sib2, iclass 13, count 0 2006.229.06:35:05.91#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:35:05.91#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:35:05.91#ibcon#[27=USB\r\n] 2006.229.06:35:05.91#ibcon#*before write, iclass 13, count 0 2006.229.06:35:05.91#ibcon#enter sib2, iclass 13, count 0 2006.229.06:35:05.91#ibcon#flushed, iclass 13, count 0 2006.229.06:35:05.91#ibcon#about to write, iclass 13, count 0 2006.229.06:35:05.91#ibcon#wrote, iclass 13, count 0 2006.229.06:35:05.91#ibcon#about to read 3, iclass 13, count 0 2006.229.06:35:05.94#ibcon#read 3, iclass 13, count 0 2006.229.06:35:05.94#ibcon#about to read 4, iclass 13, count 0 2006.229.06:35:05.94#ibcon#read 4, iclass 13, count 0 2006.229.06:35:05.94#ibcon#about to read 5, iclass 13, count 0 2006.229.06:35:05.94#ibcon#read 5, iclass 13, count 0 2006.229.06:35:05.94#ibcon#about to read 6, iclass 13, count 0 2006.229.06:35:05.94#ibcon#read 6, iclass 13, count 0 2006.229.06:35:05.94#ibcon#end of sib2, iclass 13, count 0 2006.229.06:35:05.94#ibcon#*after write, iclass 13, count 0 2006.229.06:35:05.94#ibcon#*before return 0, iclass 13, count 0 2006.229.06:35:05.94#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:05.94#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:35:05.94#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:35:05.94#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:35:05.94$vck44/vblo=6,719.99 2006.229.06:35:05.94#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.06:35:05.94#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.06:35:05.94#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:05.94#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:05.94#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:05.94#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:05.94#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:35:05.94#ibcon#first serial, iclass 15, count 0 2006.229.06:35:05.94#ibcon#enter sib2, iclass 15, count 0 2006.229.06:35:05.94#ibcon#flushed, iclass 15, count 0 2006.229.06:35:05.94#ibcon#about to write, iclass 15, count 0 2006.229.06:35:05.94#ibcon#wrote, iclass 15, count 0 2006.229.06:35:05.94#ibcon#about to read 3, iclass 15, count 0 2006.229.06:35:05.96#ibcon#read 3, iclass 15, count 0 2006.229.06:35:05.96#ibcon#about to read 4, iclass 15, count 0 2006.229.06:35:05.96#ibcon#read 4, iclass 15, count 0 2006.229.06:35:05.96#ibcon#about to read 5, iclass 15, count 0 2006.229.06:35:05.96#ibcon#read 5, iclass 15, count 0 2006.229.06:35:05.96#ibcon#about to read 6, iclass 15, count 0 2006.229.06:35:05.96#ibcon#read 6, iclass 15, count 0 2006.229.06:35:05.96#ibcon#end of sib2, iclass 15, count 0 2006.229.06:35:05.96#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:35:05.96#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:35:05.96#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:35:05.96#ibcon#*before write, iclass 15, count 0 2006.229.06:35:05.96#ibcon#enter sib2, iclass 15, count 0 2006.229.06:35:05.96#ibcon#flushed, iclass 15, count 0 2006.229.06:35:05.96#ibcon#about to write, iclass 15, count 0 2006.229.06:35:05.96#ibcon#wrote, iclass 15, count 0 2006.229.06:35:05.96#ibcon#about to read 3, iclass 15, count 0 2006.229.06:35:06.00#ibcon#read 3, iclass 15, count 0 2006.229.06:35:06.00#ibcon#about to read 4, iclass 15, count 0 2006.229.06:35:06.00#ibcon#read 4, iclass 15, count 0 2006.229.06:35:06.00#ibcon#about to read 5, iclass 15, count 0 2006.229.06:35:06.00#ibcon#read 5, iclass 15, count 0 2006.229.06:35:06.00#ibcon#about to read 6, iclass 15, count 0 2006.229.06:35:06.00#ibcon#read 6, iclass 15, count 0 2006.229.06:35:06.00#ibcon#end of sib2, iclass 15, count 0 2006.229.06:35:06.00#ibcon#*after write, iclass 15, count 0 2006.229.06:35:06.00#ibcon#*before return 0, iclass 15, count 0 2006.229.06:35:06.00#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:06.00#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:35:06.00#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:35:06.00#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:35:06.00$vck44/vb=6,4 2006.229.06:35:06.00#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.06:35:06.00#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.06:35:06.00#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:06.00#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:06.06#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:06.06#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:06.06#ibcon#enter wrdev, iclass 17, count 2 2006.229.06:35:06.06#ibcon#first serial, iclass 17, count 2 2006.229.06:35:06.06#ibcon#enter sib2, iclass 17, count 2 2006.229.06:35:06.06#ibcon#flushed, iclass 17, count 2 2006.229.06:35:06.06#ibcon#about to write, iclass 17, count 2 2006.229.06:35:06.06#ibcon#wrote, iclass 17, count 2 2006.229.06:35:06.06#ibcon#about to read 3, iclass 17, count 2 2006.229.06:35:06.08#ibcon#read 3, iclass 17, count 2 2006.229.06:35:06.08#ibcon#about to read 4, iclass 17, count 2 2006.229.06:35:06.08#ibcon#read 4, iclass 17, count 2 2006.229.06:35:06.08#ibcon#about to read 5, iclass 17, count 2 2006.229.06:35:06.08#ibcon#read 5, iclass 17, count 2 2006.229.06:35:06.08#ibcon#about to read 6, iclass 17, count 2 2006.229.06:35:06.08#ibcon#read 6, iclass 17, count 2 2006.229.06:35:06.08#ibcon#end of sib2, iclass 17, count 2 2006.229.06:35:06.08#ibcon#*mode == 0, iclass 17, count 2 2006.229.06:35:06.08#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.06:35:06.08#ibcon#[27=AT06-04\r\n] 2006.229.06:35:06.08#ibcon#*before write, iclass 17, count 2 2006.229.06:35:06.08#ibcon#enter sib2, iclass 17, count 2 2006.229.06:35:06.08#ibcon#flushed, iclass 17, count 2 2006.229.06:35:06.08#ibcon#about to write, iclass 17, count 2 2006.229.06:35:06.08#ibcon#wrote, iclass 17, count 2 2006.229.06:35:06.08#ibcon#about to read 3, iclass 17, count 2 2006.229.06:35:06.11#ibcon#read 3, iclass 17, count 2 2006.229.06:35:06.11#ibcon#about to read 4, iclass 17, count 2 2006.229.06:35:06.11#ibcon#read 4, iclass 17, count 2 2006.229.06:35:06.11#ibcon#about to read 5, iclass 17, count 2 2006.229.06:35:06.11#ibcon#read 5, iclass 17, count 2 2006.229.06:35:06.11#ibcon#about to read 6, iclass 17, count 2 2006.229.06:35:06.11#ibcon#read 6, iclass 17, count 2 2006.229.06:35:06.11#ibcon#end of sib2, iclass 17, count 2 2006.229.06:35:06.11#ibcon#*after write, iclass 17, count 2 2006.229.06:35:06.11#ibcon#*before return 0, iclass 17, count 2 2006.229.06:35:06.11#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:06.11#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:35:06.11#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.06:35:06.11#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:06.11#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:06.23#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:06.23#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:06.23#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:35:06.23#ibcon#first serial, iclass 17, count 0 2006.229.06:35:06.23#ibcon#enter sib2, iclass 17, count 0 2006.229.06:35:06.23#ibcon#flushed, iclass 17, count 0 2006.229.06:35:06.23#ibcon#about to write, iclass 17, count 0 2006.229.06:35:06.23#ibcon#wrote, iclass 17, count 0 2006.229.06:35:06.23#ibcon#about to read 3, iclass 17, count 0 2006.229.06:35:06.25#ibcon#read 3, iclass 17, count 0 2006.229.06:35:06.25#ibcon#about to read 4, iclass 17, count 0 2006.229.06:35:06.25#ibcon#read 4, iclass 17, count 0 2006.229.06:35:06.25#ibcon#about to read 5, iclass 17, count 0 2006.229.06:35:06.25#ibcon#read 5, iclass 17, count 0 2006.229.06:35:06.25#ibcon#about to read 6, iclass 17, count 0 2006.229.06:35:06.25#ibcon#read 6, iclass 17, count 0 2006.229.06:35:06.25#ibcon#end of sib2, iclass 17, count 0 2006.229.06:35:06.25#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:35:06.25#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:35:06.25#ibcon#[27=USB\r\n] 2006.229.06:35:06.25#ibcon#*before write, iclass 17, count 0 2006.229.06:35:06.25#ibcon#enter sib2, iclass 17, count 0 2006.229.06:35:06.25#ibcon#flushed, iclass 17, count 0 2006.229.06:35:06.25#ibcon#about to write, iclass 17, count 0 2006.229.06:35:06.25#ibcon#wrote, iclass 17, count 0 2006.229.06:35:06.25#ibcon#about to read 3, iclass 17, count 0 2006.229.06:35:06.28#ibcon#read 3, iclass 17, count 0 2006.229.06:35:06.28#ibcon#about to read 4, iclass 17, count 0 2006.229.06:35:06.28#ibcon#read 4, iclass 17, count 0 2006.229.06:35:06.28#ibcon#about to read 5, iclass 17, count 0 2006.229.06:35:06.28#ibcon#read 5, iclass 17, count 0 2006.229.06:35:06.28#ibcon#about to read 6, iclass 17, count 0 2006.229.06:35:06.28#ibcon#read 6, iclass 17, count 0 2006.229.06:35:06.28#ibcon#end of sib2, iclass 17, count 0 2006.229.06:35:06.28#ibcon#*after write, iclass 17, count 0 2006.229.06:35:06.28#ibcon#*before return 0, iclass 17, count 0 2006.229.06:35:06.28#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:06.28#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:35:06.28#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:35:06.28#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:35:06.28$vck44/vblo=7,734.99 2006.229.06:35:06.28#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.06:35:06.28#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.06:35:06.28#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:06.28#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:06.28#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:06.28#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:06.28#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:35:06.28#ibcon#first serial, iclass 19, count 0 2006.229.06:35:06.28#ibcon#enter sib2, iclass 19, count 0 2006.229.06:35:06.28#ibcon#flushed, iclass 19, count 0 2006.229.06:35:06.28#ibcon#about to write, iclass 19, count 0 2006.229.06:35:06.28#ibcon#wrote, iclass 19, count 0 2006.229.06:35:06.28#ibcon#about to read 3, iclass 19, count 0 2006.229.06:35:06.30#ibcon#read 3, iclass 19, count 0 2006.229.06:35:06.30#ibcon#about to read 4, iclass 19, count 0 2006.229.06:35:06.30#ibcon#read 4, iclass 19, count 0 2006.229.06:35:06.30#ibcon#about to read 5, iclass 19, count 0 2006.229.06:35:06.30#ibcon#read 5, iclass 19, count 0 2006.229.06:35:06.30#ibcon#about to read 6, iclass 19, count 0 2006.229.06:35:06.30#ibcon#read 6, iclass 19, count 0 2006.229.06:35:06.30#ibcon#end of sib2, iclass 19, count 0 2006.229.06:35:06.30#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:35:06.30#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:35:06.30#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:35:06.30#ibcon#*before write, iclass 19, count 0 2006.229.06:35:06.30#ibcon#enter sib2, iclass 19, count 0 2006.229.06:35:06.30#ibcon#flushed, iclass 19, count 0 2006.229.06:35:06.30#ibcon#about to write, iclass 19, count 0 2006.229.06:35:06.30#ibcon#wrote, iclass 19, count 0 2006.229.06:35:06.30#ibcon#about to read 3, iclass 19, count 0 2006.229.06:35:06.34#ibcon#read 3, iclass 19, count 0 2006.229.06:35:06.34#ibcon#about to read 4, iclass 19, count 0 2006.229.06:35:06.34#ibcon#read 4, iclass 19, count 0 2006.229.06:35:06.34#ibcon#about to read 5, iclass 19, count 0 2006.229.06:35:06.34#ibcon#read 5, iclass 19, count 0 2006.229.06:35:06.34#ibcon#about to read 6, iclass 19, count 0 2006.229.06:35:06.34#ibcon#read 6, iclass 19, count 0 2006.229.06:35:06.34#ibcon#end of sib2, iclass 19, count 0 2006.229.06:35:06.34#ibcon#*after write, iclass 19, count 0 2006.229.06:35:06.34#ibcon#*before return 0, iclass 19, count 0 2006.229.06:35:06.34#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:06.34#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:35:06.34#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:35:06.34#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:35:06.34$vck44/vb=7,4 2006.229.06:35:06.34#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.06:35:06.34#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.06:35:06.34#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:06.34#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:06.40#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:06.40#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:06.40#ibcon#enter wrdev, iclass 21, count 2 2006.229.06:35:06.40#ibcon#first serial, iclass 21, count 2 2006.229.06:35:06.40#ibcon#enter sib2, iclass 21, count 2 2006.229.06:35:06.40#ibcon#flushed, iclass 21, count 2 2006.229.06:35:06.40#ibcon#about to write, iclass 21, count 2 2006.229.06:35:06.40#ibcon#wrote, iclass 21, count 2 2006.229.06:35:06.40#ibcon#about to read 3, iclass 21, count 2 2006.229.06:35:06.42#ibcon#read 3, iclass 21, count 2 2006.229.06:35:06.42#ibcon#about to read 4, iclass 21, count 2 2006.229.06:35:06.42#ibcon#read 4, iclass 21, count 2 2006.229.06:35:06.42#ibcon#about to read 5, iclass 21, count 2 2006.229.06:35:06.42#ibcon#read 5, iclass 21, count 2 2006.229.06:35:06.42#ibcon#about to read 6, iclass 21, count 2 2006.229.06:35:06.42#ibcon#read 6, iclass 21, count 2 2006.229.06:35:06.42#ibcon#end of sib2, iclass 21, count 2 2006.229.06:35:06.42#ibcon#*mode == 0, iclass 21, count 2 2006.229.06:35:06.42#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.06:35:06.42#ibcon#[27=AT07-04\r\n] 2006.229.06:35:06.42#ibcon#*before write, iclass 21, count 2 2006.229.06:35:06.42#ibcon#enter sib2, iclass 21, count 2 2006.229.06:35:06.42#ibcon#flushed, iclass 21, count 2 2006.229.06:35:06.42#ibcon#about to write, iclass 21, count 2 2006.229.06:35:06.42#ibcon#wrote, iclass 21, count 2 2006.229.06:35:06.42#ibcon#about to read 3, iclass 21, count 2 2006.229.06:35:06.45#ibcon#read 3, iclass 21, count 2 2006.229.06:35:06.45#ibcon#about to read 4, iclass 21, count 2 2006.229.06:35:06.45#ibcon#read 4, iclass 21, count 2 2006.229.06:35:06.45#ibcon#about to read 5, iclass 21, count 2 2006.229.06:35:06.45#ibcon#read 5, iclass 21, count 2 2006.229.06:35:06.45#ibcon#about to read 6, iclass 21, count 2 2006.229.06:35:06.45#ibcon#read 6, iclass 21, count 2 2006.229.06:35:06.45#ibcon#end of sib2, iclass 21, count 2 2006.229.06:35:06.45#ibcon#*after write, iclass 21, count 2 2006.229.06:35:06.45#ibcon#*before return 0, iclass 21, count 2 2006.229.06:35:06.45#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:06.45#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:35:06.45#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.06:35:06.45#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:06.45#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:06.57#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:06.57#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:06.57#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:35:06.57#ibcon#first serial, iclass 21, count 0 2006.229.06:35:06.57#ibcon#enter sib2, iclass 21, count 0 2006.229.06:35:06.57#ibcon#flushed, iclass 21, count 0 2006.229.06:35:06.57#ibcon#about to write, iclass 21, count 0 2006.229.06:35:06.57#ibcon#wrote, iclass 21, count 0 2006.229.06:35:06.57#ibcon#about to read 3, iclass 21, count 0 2006.229.06:35:06.59#ibcon#read 3, iclass 21, count 0 2006.229.06:35:06.59#ibcon#about to read 4, iclass 21, count 0 2006.229.06:35:06.59#ibcon#read 4, iclass 21, count 0 2006.229.06:35:06.59#ibcon#about to read 5, iclass 21, count 0 2006.229.06:35:06.59#ibcon#read 5, iclass 21, count 0 2006.229.06:35:06.59#ibcon#about to read 6, iclass 21, count 0 2006.229.06:35:06.59#ibcon#read 6, iclass 21, count 0 2006.229.06:35:06.59#ibcon#end of sib2, iclass 21, count 0 2006.229.06:35:06.59#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:35:06.59#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:35:06.59#ibcon#[27=USB\r\n] 2006.229.06:35:06.59#ibcon#*before write, iclass 21, count 0 2006.229.06:35:06.59#ibcon#enter sib2, iclass 21, count 0 2006.229.06:35:06.59#ibcon#flushed, iclass 21, count 0 2006.229.06:35:06.59#ibcon#about to write, iclass 21, count 0 2006.229.06:35:06.59#ibcon#wrote, iclass 21, count 0 2006.229.06:35:06.59#ibcon#about to read 3, iclass 21, count 0 2006.229.06:35:06.62#ibcon#read 3, iclass 21, count 0 2006.229.06:35:06.62#ibcon#about to read 4, iclass 21, count 0 2006.229.06:35:06.62#ibcon#read 4, iclass 21, count 0 2006.229.06:35:06.62#ibcon#about to read 5, iclass 21, count 0 2006.229.06:35:06.62#ibcon#read 5, iclass 21, count 0 2006.229.06:35:06.62#ibcon#about to read 6, iclass 21, count 0 2006.229.06:35:06.62#ibcon#read 6, iclass 21, count 0 2006.229.06:35:06.62#ibcon#end of sib2, iclass 21, count 0 2006.229.06:35:06.62#ibcon#*after write, iclass 21, count 0 2006.229.06:35:06.62#ibcon#*before return 0, iclass 21, count 0 2006.229.06:35:06.62#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:06.62#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:35:06.62#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:35:06.62#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:35:06.62$vck44/vblo=8,744.99 2006.229.06:35:06.62#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.06:35:06.62#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.06:35:06.62#ibcon#ireg 17 cls_cnt 0 2006.229.06:35:06.62#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:06.62#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:06.62#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:06.62#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:35:06.62#ibcon#first serial, iclass 23, count 0 2006.229.06:35:06.62#ibcon#enter sib2, iclass 23, count 0 2006.229.06:35:06.62#ibcon#flushed, iclass 23, count 0 2006.229.06:35:06.62#ibcon#about to write, iclass 23, count 0 2006.229.06:35:06.62#ibcon#wrote, iclass 23, count 0 2006.229.06:35:06.62#ibcon#about to read 3, iclass 23, count 0 2006.229.06:35:06.64#ibcon#read 3, iclass 23, count 0 2006.229.06:35:06.64#ibcon#about to read 4, iclass 23, count 0 2006.229.06:35:06.64#ibcon#read 4, iclass 23, count 0 2006.229.06:35:06.64#ibcon#about to read 5, iclass 23, count 0 2006.229.06:35:06.64#ibcon#read 5, iclass 23, count 0 2006.229.06:35:06.64#ibcon#about to read 6, iclass 23, count 0 2006.229.06:35:06.64#ibcon#read 6, iclass 23, count 0 2006.229.06:35:06.64#ibcon#end of sib2, iclass 23, count 0 2006.229.06:35:06.64#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:35:06.64#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:35:06.64#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:35:06.64#ibcon#*before write, iclass 23, count 0 2006.229.06:35:06.64#ibcon#enter sib2, iclass 23, count 0 2006.229.06:35:06.64#ibcon#flushed, iclass 23, count 0 2006.229.06:35:06.64#ibcon#about to write, iclass 23, count 0 2006.229.06:35:06.64#ibcon#wrote, iclass 23, count 0 2006.229.06:35:06.64#ibcon#about to read 3, iclass 23, count 0 2006.229.06:35:06.68#ibcon#read 3, iclass 23, count 0 2006.229.06:35:06.68#ibcon#about to read 4, iclass 23, count 0 2006.229.06:35:06.68#ibcon#read 4, iclass 23, count 0 2006.229.06:35:06.68#ibcon#about to read 5, iclass 23, count 0 2006.229.06:35:06.68#ibcon#read 5, iclass 23, count 0 2006.229.06:35:06.68#ibcon#about to read 6, iclass 23, count 0 2006.229.06:35:06.68#ibcon#read 6, iclass 23, count 0 2006.229.06:35:06.68#ibcon#end of sib2, iclass 23, count 0 2006.229.06:35:06.68#ibcon#*after write, iclass 23, count 0 2006.229.06:35:06.68#ibcon#*before return 0, iclass 23, count 0 2006.229.06:35:06.68#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:06.68#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:35:06.68#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:35:06.68#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:35:06.68$vck44/vb=8,4 2006.229.06:35:06.68#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.06:35:06.68#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.06:35:06.68#ibcon#ireg 11 cls_cnt 2 2006.229.06:35:06.68#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:06.74#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:06.74#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:06.74#ibcon#enter wrdev, iclass 25, count 2 2006.229.06:35:06.74#ibcon#first serial, iclass 25, count 2 2006.229.06:35:06.74#ibcon#enter sib2, iclass 25, count 2 2006.229.06:35:06.74#ibcon#flushed, iclass 25, count 2 2006.229.06:35:06.74#ibcon#about to write, iclass 25, count 2 2006.229.06:35:06.74#ibcon#wrote, iclass 25, count 2 2006.229.06:35:06.74#ibcon#about to read 3, iclass 25, count 2 2006.229.06:35:06.76#ibcon#read 3, iclass 25, count 2 2006.229.06:35:06.76#ibcon#about to read 4, iclass 25, count 2 2006.229.06:35:06.76#ibcon#read 4, iclass 25, count 2 2006.229.06:35:06.76#ibcon#about to read 5, iclass 25, count 2 2006.229.06:35:06.76#ibcon#read 5, iclass 25, count 2 2006.229.06:35:06.76#ibcon#about to read 6, iclass 25, count 2 2006.229.06:35:06.76#ibcon#read 6, iclass 25, count 2 2006.229.06:35:06.76#ibcon#end of sib2, iclass 25, count 2 2006.229.06:35:06.76#ibcon#*mode == 0, iclass 25, count 2 2006.229.06:35:06.76#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.06:35:06.76#ibcon#[27=AT08-04\r\n] 2006.229.06:35:06.76#ibcon#*before write, iclass 25, count 2 2006.229.06:35:06.76#ibcon#enter sib2, iclass 25, count 2 2006.229.06:35:06.76#ibcon#flushed, iclass 25, count 2 2006.229.06:35:06.76#ibcon#about to write, iclass 25, count 2 2006.229.06:35:06.76#ibcon#wrote, iclass 25, count 2 2006.229.06:35:06.76#ibcon#about to read 3, iclass 25, count 2 2006.229.06:35:06.79#ibcon#read 3, iclass 25, count 2 2006.229.06:35:06.79#ibcon#about to read 4, iclass 25, count 2 2006.229.06:35:06.79#ibcon#read 4, iclass 25, count 2 2006.229.06:35:06.79#ibcon#about to read 5, iclass 25, count 2 2006.229.06:35:06.79#ibcon#read 5, iclass 25, count 2 2006.229.06:35:06.79#ibcon#about to read 6, iclass 25, count 2 2006.229.06:35:06.79#ibcon#read 6, iclass 25, count 2 2006.229.06:35:06.79#ibcon#end of sib2, iclass 25, count 2 2006.229.06:35:06.79#ibcon#*after write, iclass 25, count 2 2006.229.06:35:06.79#ibcon#*before return 0, iclass 25, count 2 2006.229.06:35:06.79#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:06.79#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:35:06.79#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.06:35:06.79#ibcon#ireg 7 cls_cnt 0 2006.229.06:35:06.79#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:06.91#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:06.91#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:06.91#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:35:06.91#ibcon#first serial, iclass 25, count 0 2006.229.06:35:06.91#ibcon#enter sib2, iclass 25, count 0 2006.229.06:35:06.91#ibcon#flushed, iclass 25, count 0 2006.229.06:35:06.91#ibcon#about to write, iclass 25, count 0 2006.229.06:35:06.91#ibcon#wrote, iclass 25, count 0 2006.229.06:35:06.91#ibcon#about to read 3, iclass 25, count 0 2006.229.06:35:06.93#ibcon#read 3, iclass 25, count 0 2006.229.06:35:06.93#ibcon#about to read 4, iclass 25, count 0 2006.229.06:35:06.93#ibcon#read 4, iclass 25, count 0 2006.229.06:35:06.93#ibcon#about to read 5, iclass 25, count 0 2006.229.06:35:06.93#ibcon#read 5, iclass 25, count 0 2006.229.06:35:06.93#ibcon#about to read 6, iclass 25, count 0 2006.229.06:35:06.93#ibcon#read 6, iclass 25, count 0 2006.229.06:35:06.93#ibcon#end of sib2, iclass 25, count 0 2006.229.06:35:06.93#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:35:06.93#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:35:06.93#ibcon#[27=USB\r\n] 2006.229.06:35:06.93#ibcon#*before write, iclass 25, count 0 2006.229.06:35:06.93#ibcon#enter sib2, iclass 25, count 0 2006.229.06:35:06.93#ibcon#flushed, iclass 25, count 0 2006.229.06:35:06.93#ibcon#about to write, iclass 25, count 0 2006.229.06:35:06.93#ibcon#wrote, iclass 25, count 0 2006.229.06:35:06.93#ibcon#about to read 3, iclass 25, count 0 2006.229.06:35:06.96#ibcon#read 3, iclass 25, count 0 2006.229.06:35:06.96#ibcon#about to read 4, iclass 25, count 0 2006.229.06:35:06.96#ibcon#read 4, iclass 25, count 0 2006.229.06:35:06.96#ibcon#about to read 5, iclass 25, count 0 2006.229.06:35:06.96#ibcon#read 5, iclass 25, count 0 2006.229.06:35:06.96#ibcon#about to read 6, iclass 25, count 0 2006.229.06:35:06.96#ibcon#read 6, iclass 25, count 0 2006.229.06:35:06.96#ibcon#end of sib2, iclass 25, count 0 2006.229.06:35:06.96#ibcon#*after write, iclass 25, count 0 2006.229.06:35:06.96#ibcon#*before return 0, iclass 25, count 0 2006.229.06:35:06.96#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:06.96#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:35:06.96#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:35:06.96#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:35:06.96$vck44/vabw=wide 2006.229.06:35:06.96#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.06:35:06.96#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.06:35:06.96#ibcon#ireg 8 cls_cnt 0 2006.229.06:35:06.96#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:06.96#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:06.96#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:06.96#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:35:06.96#ibcon#first serial, iclass 27, count 0 2006.229.06:35:06.96#ibcon#enter sib2, iclass 27, count 0 2006.229.06:35:06.96#ibcon#flushed, iclass 27, count 0 2006.229.06:35:06.96#ibcon#about to write, iclass 27, count 0 2006.229.06:35:06.96#ibcon#wrote, iclass 27, count 0 2006.229.06:35:06.96#ibcon#about to read 3, iclass 27, count 0 2006.229.06:35:06.98#ibcon#read 3, iclass 27, count 0 2006.229.06:35:06.98#ibcon#about to read 4, iclass 27, count 0 2006.229.06:35:06.98#ibcon#read 4, iclass 27, count 0 2006.229.06:35:06.98#ibcon#about to read 5, iclass 27, count 0 2006.229.06:35:06.98#ibcon#read 5, iclass 27, count 0 2006.229.06:35:06.98#ibcon#about to read 6, iclass 27, count 0 2006.229.06:35:06.98#ibcon#read 6, iclass 27, count 0 2006.229.06:35:06.98#ibcon#end of sib2, iclass 27, count 0 2006.229.06:35:06.98#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:35:06.98#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:35:06.98#ibcon#[25=BW32\r\n] 2006.229.06:35:06.98#ibcon#*before write, iclass 27, count 0 2006.229.06:35:06.98#ibcon#enter sib2, iclass 27, count 0 2006.229.06:35:06.98#ibcon#flushed, iclass 27, count 0 2006.229.06:35:06.98#ibcon#about to write, iclass 27, count 0 2006.229.06:35:06.98#ibcon#wrote, iclass 27, count 0 2006.229.06:35:06.98#ibcon#about to read 3, iclass 27, count 0 2006.229.06:35:07.01#ibcon#read 3, iclass 27, count 0 2006.229.06:35:07.01#ibcon#about to read 4, iclass 27, count 0 2006.229.06:35:07.01#ibcon#read 4, iclass 27, count 0 2006.229.06:35:07.01#ibcon#about to read 5, iclass 27, count 0 2006.229.06:35:07.01#ibcon#read 5, iclass 27, count 0 2006.229.06:35:07.01#ibcon#about to read 6, iclass 27, count 0 2006.229.06:35:07.01#ibcon#read 6, iclass 27, count 0 2006.229.06:35:07.01#ibcon#end of sib2, iclass 27, count 0 2006.229.06:35:07.01#ibcon#*after write, iclass 27, count 0 2006.229.06:35:07.01#ibcon#*before return 0, iclass 27, count 0 2006.229.06:35:07.01#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:07.01#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:35:07.01#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:35:07.01#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:35:07.01$vck44/vbbw=wide 2006.229.06:35:07.01#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.06:35:07.01#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.06:35:07.01#ibcon#ireg 8 cls_cnt 0 2006.229.06:35:07.01#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:35:07.08#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:35:07.08#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:35:07.08#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:35:07.08#ibcon#first serial, iclass 29, count 0 2006.229.06:35:07.08#ibcon#enter sib2, iclass 29, count 0 2006.229.06:35:07.08#ibcon#flushed, iclass 29, count 0 2006.229.06:35:07.08#ibcon#about to write, iclass 29, count 0 2006.229.06:35:07.08#ibcon#wrote, iclass 29, count 0 2006.229.06:35:07.08#ibcon#about to read 3, iclass 29, count 0 2006.229.06:35:07.10#ibcon#read 3, iclass 29, count 0 2006.229.06:35:07.10#ibcon#about to read 4, iclass 29, count 0 2006.229.06:35:07.10#ibcon#read 4, iclass 29, count 0 2006.229.06:35:07.10#ibcon#about to read 5, iclass 29, count 0 2006.229.06:35:07.10#ibcon#read 5, iclass 29, count 0 2006.229.06:35:07.10#ibcon#about to read 6, iclass 29, count 0 2006.229.06:35:07.10#ibcon#read 6, iclass 29, count 0 2006.229.06:35:07.10#ibcon#end of sib2, iclass 29, count 0 2006.229.06:35:07.10#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:35:07.10#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:35:07.10#ibcon#[27=BW32\r\n] 2006.229.06:35:07.10#ibcon#*before write, iclass 29, count 0 2006.229.06:35:07.10#ibcon#enter sib2, iclass 29, count 0 2006.229.06:35:07.10#ibcon#flushed, iclass 29, count 0 2006.229.06:35:07.10#ibcon#about to write, iclass 29, count 0 2006.229.06:35:07.10#ibcon#wrote, iclass 29, count 0 2006.229.06:35:07.10#ibcon#about to read 3, iclass 29, count 0 2006.229.06:35:07.13#ibcon#read 3, iclass 29, count 0 2006.229.06:35:07.13#ibcon#about to read 4, iclass 29, count 0 2006.229.06:35:07.13#ibcon#read 4, iclass 29, count 0 2006.229.06:35:07.13#ibcon#about to read 5, iclass 29, count 0 2006.229.06:35:07.13#ibcon#read 5, iclass 29, count 0 2006.229.06:35:07.13#ibcon#about to read 6, iclass 29, count 0 2006.229.06:35:07.13#ibcon#read 6, iclass 29, count 0 2006.229.06:35:07.13#ibcon#end of sib2, iclass 29, count 0 2006.229.06:35:07.13#ibcon#*after write, iclass 29, count 0 2006.229.06:35:07.13#ibcon#*before return 0, iclass 29, count 0 2006.229.06:35:07.13#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:35:07.13#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:35:07.13#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:35:07.13#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:35:07.13$setupk4/ifdk4 2006.229.06:35:07.13$ifdk4/lo= 2006.229.06:35:07.13$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:35:07.13$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:35:07.13$ifdk4/patch= 2006.229.06:35:07.13$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:35:07.13$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:35:07.13$setupk4/!*+20s 2006.229.06:35:14.85#abcon#<5=/05 3.2 6.8 30.32 92 999.7\r\n> 2006.229.06:35:14.87#abcon#{5=INTERFACE CLEAR} 2006.229.06:35:14.93#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:35:15.14#trakl#Source acquired 2006.229.06:35:15.14#flagr#flagr/antenna,acquired 2006.229.06:35:21.64$setupk4/"tpicd 2006.229.06:35:21.64$setupk4/echo=off 2006.229.06:35:21.64$setupk4/xlog=off 2006.229.06:35:21.64:!2006.229.06:37:57 2006.229.06:37:57.00:preob 2006.229.06:37:58.14/onsource/TRACKING 2006.229.06:37:58.14:!2006.229.06:38:07 2006.229.06:38:07.00:"tape 2006.229.06:38:07.00:"st=record 2006.229.06:38:07.00:data_valid=on 2006.229.06:38:07.00:midob 2006.229.06:38:07.14/onsource/TRACKING 2006.229.06:38:07.14/wx/30.29,999.7,92 2006.229.06:38:07.34/cable/+6.3988E-03 2006.229.06:38:08.43/va/01,08,usb,yes,34,37 2006.229.06:38:08.43/va/02,07,usb,yes,37,38 2006.229.06:38:08.43/va/03,06,usb,yes,46,49 2006.229.06:38:08.43/va/04,07,usb,yes,38,40 2006.229.06:38:08.43/va/05,04,usb,yes,34,35 2006.229.06:38:08.43/va/06,04,usb,yes,38,38 2006.229.06:38:08.43/va/07,05,usb,yes,34,35 2006.229.06:38:08.43/va/08,06,usb,yes,25,31 2006.229.06:38:08.66/valo/01,524.99,yes,locked 2006.229.06:38:08.66/valo/02,534.99,yes,locked 2006.229.06:38:08.66/valo/03,564.99,yes,locked 2006.229.06:38:08.66/valo/04,624.99,yes,locked 2006.229.06:38:08.66/valo/05,734.99,yes,locked 2006.229.06:38:08.66/valo/06,814.99,yes,locked 2006.229.06:38:08.66/valo/07,864.99,yes,locked 2006.229.06:38:08.66/valo/08,884.99,yes,locked 2006.229.06:38:09.75/vb/01,04,usb,yes,33,31 2006.229.06:38:09.75/vb/02,04,usb,yes,36,36 2006.229.06:38:09.75/vb/03,04,usb,yes,33,36 2006.229.06:38:09.75/vb/04,04,usb,yes,37,36 2006.229.06:38:09.75/vb/05,04,usb,yes,29,32 2006.229.06:38:09.75/vb/06,04,usb,yes,34,30 2006.229.06:38:09.75/vb/07,04,usb,yes,34,34 2006.229.06:38:09.75/vb/08,04,usb,yes,31,35 2006.229.06:38:09.98/vblo/01,629.99,yes,locked 2006.229.06:38:09.98/vblo/02,634.99,yes,locked 2006.229.06:38:09.98/vblo/03,649.99,yes,locked 2006.229.06:38:09.98/vblo/04,679.99,yes,locked 2006.229.06:38:09.98/vblo/05,709.99,yes,locked 2006.229.06:38:09.98/vblo/06,719.99,yes,locked 2006.229.06:38:09.98/vblo/07,734.99,yes,locked 2006.229.06:38:09.98/vblo/08,744.99,yes,locked 2006.229.06:38:10.13/vabw/8 2006.229.06:38:10.28/vbbw/8 2006.229.06:38:10.37/xfe/off,on,12.0 2006.229.06:38:10.75/ifatt/23,28,28,28 2006.229.06:38:11.07/fmout-gps/S +4.57E-07 2006.229.06:38:11.11:!2006.229.06:38:47 2006.229.06:38:47.01:data_valid=off 2006.229.06:38:47.01:"et 2006.229.06:38:47.02:!+3s 2006.229.06:38:50.03:"tape 2006.229.06:38:50.03:postob 2006.229.06:38:50.19/cable/+6.3995E-03 2006.229.06:38:50.19/wx/30.28,999.7,92 2006.229.06:38:50.25/fmout-gps/S +4.58E-07 2006.229.06:38:50.25:scan_name=229-0642,jd0608,180 2006.229.06:38:50.26:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.06:38:52.14#flagr#flagr/antenna,new-source 2006.229.06:38:52.14:checkk5 2006.229.06:38:52.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:38:52.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:38:53.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:38:53.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:38:54.13/chk_obsdata//k5ts1/T2290638??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:38:54.51/chk_obsdata//k5ts2/T2290638??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:38:54.90/chk_obsdata//k5ts3/T2290638??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:38:55.30/chk_obsdata//k5ts4/T2290638??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:38:56.04/k5log//k5ts1_log_newline 2006.229.06:38:56.75/k5log//k5ts2_log_newline 2006.229.06:38:57.48/k5log//k5ts3_log_newline 2006.229.06:38:58.16/k5log//k5ts4_log_newline 2006.229.06:38:58.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:38:58.19:setupk4=1 2006.229.06:38:58.19$setupk4/echo=on 2006.229.06:38:58.19$setupk4/pcalon 2006.229.06:38:58.19$pcalon/"no phase cal control is implemented here 2006.229.06:38:58.19$setupk4/"tpicd=stop 2006.229.06:38:58.19$setupk4/"rec=synch_on 2006.229.06:38:58.19$setupk4/"rec_mode=128 2006.229.06:38:58.19$setupk4/!* 2006.229.06:38:58.19$setupk4/recpk4 2006.229.06:38:58.19$recpk4/recpatch= 2006.229.06:38:58.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:38:58.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:38:58.20$setupk4/vck44 2006.229.06:38:58.20$vck44/valo=1,524.99 2006.229.06:38:58.20#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.06:38:58.20#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.06:38:58.20#ibcon#ireg 17 cls_cnt 0 2006.229.06:38:58.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:38:58.20#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:38:58.20#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:38:58.20#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:38:58.20#ibcon#first serial, iclass 14, count 0 2006.229.06:38:58.20#ibcon#enter sib2, iclass 14, count 0 2006.229.06:38:58.20#ibcon#flushed, iclass 14, count 0 2006.229.06:38:58.20#ibcon#about to write, iclass 14, count 0 2006.229.06:38:58.20#ibcon#wrote, iclass 14, count 0 2006.229.06:38:58.20#ibcon#about to read 3, iclass 14, count 0 2006.229.06:38:58.22#ibcon#read 3, iclass 14, count 0 2006.229.06:38:58.22#ibcon#about to read 4, iclass 14, count 0 2006.229.06:38:58.22#ibcon#read 4, iclass 14, count 0 2006.229.06:38:58.22#ibcon#about to read 5, iclass 14, count 0 2006.229.06:38:58.22#ibcon#read 5, iclass 14, count 0 2006.229.06:38:58.22#ibcon#about to read 6, iclass 14, count 0 2006.229.06:38:58.22#ibcon#read 6, iclass 14, count 0 2006.229.06:38:58.22#ibcon#end of sib2, iclass 14, count 0 2006.229.06:38:58.22#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:38:58.22#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:38:58.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:38:58.22#ibcon#*before write, iclass 14, count 0 2006.229.06:38:58.22#ibcon#enter sib2, iclass 14, count 0 2006.229.06:38:58.22#ibcon#flushed, iclass 14, count 0 2006.229.06:38:58.22#ibcon#about to write, iclass 14, count 0 2006.229.06:38:58.22#ibcon#wrote, iclass 14, count 0 2006.229.06:38:58.22#ibcon#about to read 3, iclass 14, count 0 2006.229.06:38:58.27#ibcon#read 3, iclass 14, count 0 2006.229.06:38:58.27#ibcon#about to read 4, iclass 14, count 0 2006.229.06:38:58.27#ibcon#read 4, iclass 14, count 0 2006.229.06:38:58.27#ibcon#about to read 5, iclass 14, count 0 2006.229.06:38:58.27#ibcon#read 5, iclass 14, count 0 2006.229.06:38:58.27#ibcon#about to read 6, iclass 14, count 0 2006.229.06:38:58.27#ibcon#read 6, iclass 14, count 0 2006.229.06:38:58.27#ibcon#end of sib2, iclass 14, count 0 2006.229.06:38:58.27#ibcon#*after write, iclass 14, count 0 2006.229.06:38:58.27#ibcon#*before return 0, iclass 14, count 0 2006.229.06:38:58.27#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:38:58.27#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:38:58.27#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:38:58.27#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:38:58.27$vck44/va=1,8 2006.229.06:38:58.27#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.06:38:58.27#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.06:38:58.27#ibcon#ireg 11 cls_cnt 2 2006.229.06:38:58.27#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:38:58.27#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:38:58.27#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:38:58.27#ibcon#enter wrdev, iclass 16, count 2 2006.229.06:38:58.27#ibcon#first serial, iclass 16, count 2 2006.229.06:38:58.27#ibcon#enter sib2, iclass 16, count 2 2006.229.06:38:58.27#ibcon#flushed, iclass 16, count 2 2006.229.06:38:58.27#ibcon#about to write, iclass 16, count 2 2006.229.06:38:58.27#ibcon#wrote, iclass 16, count 2 2006.229.06:38:58.27#ibcon#about to read 3, iclass 16, count 2 2006.229.06:38:58.29#ibcon#read 3, iclass 16, count 2 2006.229.06:38:58.29#ibcon#about to read 4, iclass 16, count 2 2006.229.06:38:58.29#ibcon#read 4, iclass 16, count 2 2006.229.06:38:58.29#ibcon#about to read 5, iclass 16, count 2 2006.229.06:38:58.29#ibcon#read 5, iclass 16, count 2 2006.229.06:38:58.29#ibcon#about to read 6, iclass 16, count 2 2006.229.06:38:58.29#ibcon#read 6, iclass 16, count 2 2006.229.06:38:58.29#ibcon#end of sib2, iclass 16, count 2 2006.229.06:38:58.29#ibcon#*mode == 0, iclass 16, count 2 2006.229.06:38:58.29#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.06:38:58.29#ibcon#[25=AT01-08\r\n] 2006.229.06:38:58.29#ibcon#*before write, iclass 16, count 2 2006.229.06:38:58.29#ibcon#enter sib2, iclass 16, count 2 2006.229.06:38:58.29#ibcon#flushed, iclass 16, count 2 2006.229.06:38:58.29#ibcon#about to write, iclass 16, count 2 2006.229.06:38:58.29#ibcon#wrote, iclass 16, count 2 2006.229.06:38:58.29#ibcon#about to read 3, iclass 16, count 2 2006.229.06:38:58.32#ibcon#read 3, iclass 16, count 2 2006.229.06:38:58.32#ibcon#about to read 4, iclass 16, count 2 2006.229.06:38:58.32#ibcon#read 4, iclass 16, count 2 2006.229.06:38:58.32#ibcon#about to read 5, iclass 16, count 2 2006.229.06:38:58.32#ibcon#read 5, iclass 16, count 2 2006.229.06:38:58.32#ibcon#about to read 6, iclass 16, count 2 2006.229.06:38:58.32#ibcon#read 6, iclass 16, count 2 2006.229.06:38:58.32#ibcon#end of sib2, iclass 16, count 2 2006.229.06:38:58.32#ibcon#*after write, iclass 16, count 2 2006.229.06:38:58.32#ibcon#*before return 0, iclass 16, count 2 2006.229.06:38:58.32#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:38:58.32#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:38:58.32#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.06:38:58.32#ibcon#ireg 7 cls_cnt 0 2006.229.06:38:58.32#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:38:58.44#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:38:58.44#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:38:58.44#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:38:58.44#ibcon#first serial, iclass 16, count 0 2006.229.06:38:58.44#ibcon#enter sib2, iclass 16, count 0 2006.229.06:38:58.44#ibcon#flushed, iclass 16, count 0 2006.229.06:38:58.44#ibcon#about to write, iclass 16, count 0 2006.229.06:38:58.44#ibcon#wrote, iclass 16, count 0 2006.229.06:38:58.44#ibcon#about to read 3, iclass 16, count 0 2006.229.06:38:58.46#ibcon#read 3, iclass 16, count 0 2006.229.06:38:58.46#ibcon#about to read 4, iclass 16, count 0 2006.229.06:38:58.46#ibcon#read 4, iclass 16, count 0 2006.229.06:38:58.46#ibcon#about to read 5, iclass 16, count 0 2006.229.06:38:58.46#ibcon#read 5, iclass 16, count 0 2006.229.06:38:58.46#ibcon#about to read 6, iclass 16, count 0 2006.229.06:38:58.46#ibcon#read 6, iclass 16, count 0 2006.229.06:38:58.46#ibcon#end of sib2, iclass 16, count 0 2006.229.06:38:58.46#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:38:58.46#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:38:58.46#ibcon#[25=USB\r\n] 2006.229.06:38:58.46#ibcon#*before write, iclass 16, count 0 2006.229.06:38:58.46#ibcon#enter sib2, iclass 16, count 0 2006.229.06:38:58.46#ibcon#flushed, iclass 16, count 0 2006.229.06:38:58.46#ibcon#about to write, iclass 16, count 0 2006.229.06:38:58.46#ibcon#wrote, iclass 16, count 0 2006.229.06:38:58.46#ibcon#about to read 3, iclass 16, count 0 2006.229.06:38:58.49#ibcon#read 3, iclass 16, count 0 2006.229.06:38:58.49#ibcon#about to read 4, iclass 16, count 0 2006.229.06:38:58.49#ibcon#read 4, iclass 16, count 0 2006.229.06:38:58.49#ibcon#about to read 5, iclass 16, count 0 2006.229.06:38:58.49#ibcon#read 5, iclass 16, count 0 2006.229.06:38:58.49#ibcon#about to read 6, iclass 16, count 0 2006.229.06:38:58.49#ibcon#read 6, iclass 16, count 0 2006.229.06:38:58.49#ibcon#end of sib2, iclass 16, count 0 2006.229.06:38:58.49#ibcon#*after write, iclass 16, count 0 2006.229.06:38:58.49#ibcon#*before return 0, iclass 16, count 0 2006.229.06:38:58.49#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:38:58.49#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:38:58.49#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:38:58.49#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:38:58.49$vck44/valo=2,534.99 2006.229.06:38:58.49#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.06:38:58.49#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.06:38:58.49#ibcon#ireg 17 cls_cnt 0 2006.229.06:38:58.49#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:38:58.49#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:38:58.49#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:38:58.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:38:58.49#ibcon#first serial, iclass 18, count 0 2006.229.06:38:58.49#ibcon#enter sib2, iclass 18, count 0 2006.229.06:38:58.49#ibcon#flushed, iclass 18, count 0 2006.229.06:38:58.49#ibcon#about to write, iclass 18, count 0 2006.229.06:38:58.49#ibcon#wrote, iclass 18, count 0 2006.229.06:38:58.49#ibcon#about to read 3, iclass 18, count 0 2006.229.06:38:58.51#ibcon#read 3, iclass 18, count 0 2006.229.06:38:58.51#ibcon#about to read 4, iclass 18, count 0 2006.229.06:38:58.51#ibcon#read 4, iclass 18, count 0 2006.229.06:38:58.51#ibcon#about to read 5, iclass 18, count 0 2006.229.06:38:58.51#ibcon#read 5, iclass 18, count 0 2006.229.06:38:58.51#ibcon#about to read 6, iclass 18, count 0 2006.229.06:38:58.51#ibcon#read 6, iclass 18, count 0 2006.229.06:38:58.51#ibcon#end of sib2, iclass 18, count 0 2006.229.06:38:58.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:38:58.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:38:58.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:38:58.51#ibcon#*before write, iclass 18, count 0 2006.229.06:38:58.51#ibcon#enter sib2, iclass 18, count 0 2006.229.06:38:58.51#ibcon#flushed, iclass 18, count 0 2006.229.06:38:58.51#ibcon#about to write, iclass 18, count 0 2006.229.06:38:58.51#ibcon#wrote, iclass 18, count 0 2006.229.06:38:58.51#ibcon#about to read 3, iclass 18, count 0 2006.229.06:38:58.55#ibcon#read 3, iclass 18, count 0 2006.229.06:38:58.55#ibcon#about to read 4, iclass 18, count 0 2006.229.06:38:58.55#ibcon#read 4, iclass 18, count 0 2006.229.06:38:58.55#ibcon#about to read 5, iclass 18, count 0 2006.229.06:38:58.55#ibcon#read 5, iclass 18, count 0 2006.229.06:38:58.55#ibcon#about to read 6, iclass 18, count 0 2006.229.06:38:58.55#ibcon#read 6, iclass 18, count 0 2006.229.06:38:58.55#ibcon#end of sib2, iclass 18, count 0 2006.229.06:38:58.55#ibcon#*after write, iclass 18, count 0 2006.229.06:38:58.55#ibcon#*before return 0, iclass 18, count 0 2006.229.06:38:58.55#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:38:58.55#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:38:58.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:38:58.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:38:58.55$vck44/va=2,7 2006.229.06:38:58.55#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.06:38:58.55#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.06:38:58.55#ibcon#ireg 11 cls_cnt 2 2006.229.06:38:58.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:38:58.61#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:38:58.61#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:38:58.61#ibcon#enter wrdev, iclass 20, count 2 2006.229.06:38:58.61#ibcon#first serial, iclass 20, count 2 2006.229.06:38:58.61#ibcon#enter sib2, iclass 20, count 2 2006.229.06:38:58.61#ibcon#flushed, iclass 20, count 2 2006.229.06:38:58.61#ibcon#about to write, iclass 20, count 2 2006.229.06:38:58.61#ibcon#wrote, iclass 20, count 2 2006.229.06:38:58.61#ibcon#about to read 3, iclass 20, count 2 2006.229.06:38:58.63#ibcon#read 3, iclass 20, count 2 2006.229.06:38:58.63#ibcon#about to read 4, iclass 20, count 2 2006.229.06:38:58.63#ibcon#read 4, iclass 20, count 2 2006.229.06:38:58.63#ibcon#about to read 5, iclass 20, count 2 2006.229.06:38:58.63#ibcon#read 5, iclass 20, count 2 2006.229.06:38:58.63#ibcon#about to read 6, iclass 20, count 2 2006.229.06:38:58.63#ibcon#read 6, iclass 20, count 2 2006.229.06:38:58.63#ibcon#end of sib2, iclass 20, count 2 2006.229.06:38:58.63#ibcon#*mode == 0, iclass 20, count 2 2006.229.06:38:58.63#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.06:38:58.63#ibcon#[25=AT02-07\r\n] 2006.229.06:38:58.63#ibcon#*before write, iclass 20, count 2 2006.229.06:38:58.63#ibcon#enter sib2, iclass 20, count 2 2006.229.06:38:58.63#ibcon#flushed, iclass 20, count 2 2006.229.06:38:58.63#ibcon#about to write, iclass 20, count 2 2006.229.06:38:58.63#ibcon#wrote, iclass 20, count 2 2006.229.06:38:58.63#ibcon#about to read 3, iclass 20, count 2 2006.229.06:38:58.66#ibcon#read 3, iclass 20, count 2 2006.229.06:38:58.66#ibcon#about to read 4, iclass 20, count 2 2006.229.06:38:58.66#ibcon#read 4, iclass 20, count 2 2006.229.06:38:58.66#ibcon#about to read 5, iclass 20, count 2 2006.229.06:38:58.66#ibcon#read 5, iclass 20, count 2 2006.229.06:38:58.66#ibcon#about to read 6, iclass 20, count 2 2006.229.06:38:58.66#ibcon#read 6, iclass 20, count 2 2006.229.06:38:58.66#ibcon#end of sib2, iclass 20, count 2 2006.229.06:38:58.66#ibcon#*after write, iclass 20, count 2 2006.229.06:38:58.66#ibcon#*before return 0, iclass 20, count 2 2006.229.06:38:58.66#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:38:58.66#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:38:58.66#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.06:38:58.66#ibcon#ireg 7 cls_cnt 0 2006.229.06:38:58.66#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:38:58.68#abcon#<5=/05 2.6 4.7 30.28 92 999.7\r\n> 2006.229.06:38:58.70#abcon#{5=INTERFACE CLEAR} 2006.229.06:38:58.76#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:38:58.78#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:38:58.78#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:38:58.78#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:38:58.78#ibcon#first serial, iclass 20, count 0 2006.229.06:38:58.78#ibcon#enter sib2, iclass 20, count 0 2006.229.06:38:58.78#ibcon#flushed, iclass 20, count 0 2006.229.06:38:58.78#ibcon#about to write, iclass 20, count 0 2006.229.06:38:58.78#ibcon#wrote, iclass 20, count 0 2006.229.06:38:58.78#ibcon#about to read 3, iclass 20, count 0 2006.229.06:38:58.80#ibcon#read 3, iclass 20, count 0 2006.229.06:38:58.80#ibcon#about to read 4, iclass 20, count 0 2006.229.06:38:58.80#ibcon#read 4, iclass 20, count 0 2006.229.06:38:58.80#ibcon#about to read 5, iclass 20, count 0 2006.229.06:38:58.80#ibcon#read 5, iclass 20, count 0 2006.229.06:38:58.80#ibcon#about to read 6, iclass 20, count 0 2006.229.06:38:58.80#ibcon#read 6, iclass 20, count 0 2006.229.06:38:58.80#ibcon#end of sib2, iclass 20, count 0 2006.229.06:38:58.80#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:38:58.80#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:38:58.80#ibcon#[25=USB\r\n] 2006.229.06:38:58.80#ibcon#*before write, iclass 20, count 0 2006.229.06:38:58.80#ibcon#enter sib2, iclass 20, count 0 2006.229.06:38:58.80#ibcon#flushed, iclass 20, count 0 2006.229.06:38:58.80#ibcon#about to write, iclass 20, count 0 2006.229.06:38:58.80#ibcon#wrote, iclass 20, count 0 2006.229.06:38:58.80#ibcon#about to read 3, iclass 20, count 0 2006.229.06:38:58.83#ibcon#read 3, iclass 20, count 0 2006.229.06:38:58.83#ibcon#about to read 4, iclass 20, count 0 2006.229.06:38:58.83#ibcon#read 4, iclass 20, count 0 2006.229.06:38:58.83#ibcon#about to read 5, iclass 20, count 0 2006.229.06:38:58.83#ibcon#read 5, iclass 20, count 0 2006.229.06:38:58.83#ibcon#about to read 6, iclass 20, count 0 2006.229.06:38:58.83#ibcon#read 6, iclass 20, count 0 2006.229.06:38:58.83#ibcon#end of sib2, iclass 20, count 0 2006.229.06:38:58.83#ibcon#*after write, iclass 20, count 0 2006.229.06:38:58.83#ibcon#*before return 0, iclass 20, count 0 2006.229.06:38:58.83#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:38:58.83#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:38:58.83#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:38:58.83#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:38:58.83$vck44/valo=3,564.99 2006.229.06:38:58.83#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.06:38:58.83#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.06:38:58.83#ibcon#ireg 17 cls_cnt 0 2006.229.06:38:58.83#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:38:58.83#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:38:58.83#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:38:58.83#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:38:58.83#ibcon#first serial, iclass 26, count 0 2006.229.06:38:58.83#ibcon#enter sib2, iclass 26, count 0 2006.229.06:38:58.83#ibcon#flushed, iclass 26, count 0 2006.229.06:38:58.83#ibcon#about to write, iclass 26, count 0 2006.229.06:38:58.83#ibcon#wrote, iclass 26, count 0 2006.229.06:38:58.83#ibcon#about to read 3, iclass 26, count 0 2006.229.06:38:58.85#ibcon#read 3, iclass 26, count 0 2006.229.06:38:58.85#ibcon#about to read 4, iclass 26, count 0 2006.229.06:38:58.85#ibcon#read 4, iclass 26, count 0 2006.229.06:38:58.85#ibcon#about to read 5, iclass 26, count 0 2006.229.06:38:58.85#ibcon#read 5, iclass 26, count 0 2006.229.06:38:58.85#ibcon#about to read 6, iclass 26, count 0 2006.229.06:38:58.85#ibcon#read 6, iclass 26, count 0 2006.229.06:38:58.85#ibcon#end of sib2, iclass 26, count 0 2006.229.06:38:58.85#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:38:58.85#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:38:58.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:38:58.85#ibcon#*before write, iclass 26, count 0 2006.229.06:38:58.85#ibcon#enter sib2, iclass 26, count 0 2006.229.06:38:58.85#ibcon#flushed, iclass 26, count 0 2006.229.06:38:58.85#ibcon#about to write, iclass 26, count 0 2006.229.06:38:58.85#ibcon#wrote, iclass 26, count 0 2006.229.06:38:58.85#ibcon#about to read 3, iclass 26, count 0 2006.229.06:38:58.89#ibcon#read 3, iclass 26, count 0 2006.229.06:38:58.89#ibcon#about to read 4, iclass 26, count 0 2006.229.06:38:58.89#ibcon#read 4, iclass 26, count 0 2006.229.06:38:58.89#ibcon#about to read 5, iclass 26, count 0 2006.229.06:38:58.89#ibcon#read 5, iclass 26, count 0 2006.229.06:38:58.89#ibcon#about to read 6, iclass 26, count 0 2006.229.06:38:58.89#ibcon#read 6, iclass 26, count 0 2006.229.06:38:58.89#ibcon#end of sib2, iclass 26, count 0 2006.229.06:38:58.89#ibcon#*after write, iclass 26, count 0 2006.229.06:38:58.89#ibcon#*before return 0, iclass 26, count 0 2006.229.06:38:58.89#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:38:58.89#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:38:58.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:38:58.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:38:58.89$vck44/va=3,6 2006.229.06:38:58.89#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.06:38:58.89#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.06:38:58.89#ibcon#ireg 11 cls_cnt 2 2006.229.06:38:58.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:38:58.95#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:38:58.95#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:38:58.95#ibcon#enter wrdev, iclass 28, count 2 2006.229.06:38:58.95#ibcon#first serial, iclass 28, count 2 2006.229.06:38:58.95#ibcon#enter sib2, iclass 28, count 2 2006.229.06:38:58.95#ibcon#flushed, iclass 28, count 2 2006.229.06:38:58.95#ibcon#about to write, iclass 28, count 2 2006.229.06:38:58.95#ibcon#wrote, iclass 28, count 2 2006.229.06:38:58.95#ibcon#about to read 3, iclass 28, count 2 2006.229.06:38:58.97#ibcon#read 3, iclass 28, count 2 2006.229.06:38:58.97#ibcon#about to read 4, iclass 28, count 2 2006.229.06:38:58.97#ibcon#read 4, iclass 28, count 2 2006.229.06:38:58.97#ibcon#about to read 5, iclass 28, count 2 2006.229.06:38:58.97#ibcon#read 5, iclass 28, count 2 2006.229.06:38:58.97#ibcon#about to read 6, iclass 28, count 2 2006.229.06:38:58.97#ibcon#read 6, iclass 28, count 2 2006.229.06:38:58.97#ibcon#end of sib2, iclass 28, count 2 2006.229.06:38:58.97#ibcon#*mode == 0, iclass 28, count 2 2006.229.06:38:58.97#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.06:38:58.97#ibcon#[25=AT03-06\r\n] 2006.229.06:38:58.97#ibcon#*before write, iclass 28, count 2 2006.229.06:38:58.97#ibcon#enter sib2, iclass 28, count 2 2006.229.06:38:58.97#ibcon#flushed, iclass 28, count 2 2006.229.06:38:58.97#ibcon#about to write, iclass 28, count 2 2006.229.06:38:58.97#ibcon#wrote, iclass 28, count 2 2006.229.06:38:58.97#ibcon#about to read 3, iclass 28, count 2 2006.229.06:38:59.00#ibcon#read 3, iclass 28, count 2 2006.229.06:38:59.00#ibcon#about to read 4, iclass 28, count 2 2006.229.06:38:59.00#ibcon#read 4, iclass 28, count 2 2006.229.06:38:59.00#ibcon#about to read 5, iclass 28, count 2 2006.229.06:38:59.00#ibcon#read 5, iclass 28, count 2 2006.229.06:38:59.00#ibcon#about to read 6, iclass 28, count 2 2006.229.06:38:59.00#ibcon#read 6, iclass 28, count 2 2006.229.06:38:59.00#ibcon#end of sib2, iclass 28, count 2 2006.229.06:38:59.00#ibcon#*after write, iclass 28, count 2 2006.229.06:38:59.00#ibcon#*before return 0, iclass 28, count 2 2006.229.06:38:59.00#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:38:59.00#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:38:59.00#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.06:38:59.00#ibcon#ireg 7 cls_cnt 0 2006.229.06:38:59.00#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:38:59.12#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:38:59.12#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:38:59.12#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:38:59.12#ibcon#first serial, iclass 28, count 0 2006.229.06:38:59.12#ibcon#enter sib2, iclass 28, count 0 2006.229.06:38:59.12#ibcon#flushed, iclass 28, count 0 2006.229.06:38:59.12#ibcon#about to write, iclass 28, count 0 2006.229.06:38:59.12#ibcon#wrote, iclass 28, count 0 2006.229.06:38:59.12#ibcon#about to read 3, iclass 28, count 0 2006.229.06:38:59.14#ibcon#read 3, iclass 28, count 0 2006.229.06:38:59.14#ibcon#about to read 4, iclass 28, count 0 2006.229.06:38:59.14#ibcon#read 4, iclass 28, count 0 2006.229.06:38:59.14#ibcon#about to read 5, iclass 28, count 0 2006.229.06:38:59.14#ibcon#read 5, iclass 28, count 0 2006.229.06:38:59.14#ibcon#about to read 6, iclass 28, count 0 2006.229.06:38:59.14#ibcon#read 6, iclass 28, count 0 2006.229.06:38:59.14#ibcon#end of sib2, iclass 28, count 0 2006.229.06:38:59.14#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:38:59.14#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:38:59.14#ibcon#[25=USB\r\n] 2006.229.06:38:59.14#ibcon#*before write, iclass 28, count 0 2006.229.06:38:59.14#ibcon#enter sib2, iclass 28, count 0 2006.229.06:38:59.14#ibcon#flushed, iclass 28, count 0 2006.229.06:38:59.14#ibcon#about to write, iclass 28, count 0 2006.229.06:38:59.14#ibcon#wrote, iclass 28, count 0 2006.229.06:38:59.14#ibcon#about to read 3, iclass 28, count 0 2006.229.06:38:59.17#ibcon#read 3, iclass 28, count 0 2006.229.06:38:59.17#ibcon#about to read 4, iclass 28, count 0 2006.229.06:38:59.17#ibcon#read 4, iclass 28, count 0 2006.229.06:38:59.17#ibcon#about to read 5, iclass 28, count 0 2006.229.06:38:59.17#ibcon#read 5, iclass 28, count 0 2006.229.06:38:59.17#ibcon#about to read 6, iclass 28, count 0 2006.229.06:38:59.17#ibcon#read 6, iclass 28, count 0 2006.229.06:38:59.17#ibcon#end of sib2, iclass 28, count 0 2006.229.06:38:59.17#ibcon#*after write, iclass 28, count 0 2006.229.06:38:59.17#ibcon#*before return 0, iclass 28, count 0 2006.229.06:38:59.17#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:38:59.17#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:38:59.17#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:38:59.17#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:38:59.17$vck44/valo=4,624.99 2006.229.06:38:59.17#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.06:38:59.17#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.06:38:59.17#ibcon#ireg 17 cls_cnt 0 2006.229.06:38:59.17#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:38:59.17#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:38:59.17#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:38:59.17#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:38:59.17#ibcon#first serial, iclass 30, count 0 2006.229.06:38:59.17#ibcon#enter sib2, iclass 30, count 0 2006.229.06:38:59.17#ibcon#flushed, iclass 30, count 0 2006.229.06:38:59.17#ibcon#about to write, iclass 30, count 0 2006.229.06:38:59.17#ibcon#wrote, iclass 30, count 0 2006.229.06:38:59.17#ibcon#about to read 3, iclass 30, count 0 2006.229.06:38:59.19#ibcon#read 3, iclass 30, count 0 2006.229.06:38:59.19#ibcon#about to read 4, iclass 30, count 0 2006.229.06:38:59.19#ibcon#read 4, iclass 30, count 0 2006.229.06:38:59.19#ibcon#about to read 5, iclass 30, count 0 2006.229.06:38:59.19#ibcon#read 5, iclass 30, count 0 2006.229.06:38:59.19#ibcon#about to read 6, iclass 30, count 0 2006.229.06:38:59.19#ibcon#read 6, iclass 30, count 0 2006.229.06:38:59.19#ibcon#end of sib2, iclass 30, count 0 2006.229.06:38:59.19#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:38:59.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:38:59.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:38:59.19#ibcon#*before write, iclass 30, count 0 2006.229.06:38:59.19#ibcon#enter sib2, iclass 30, count 0 2006.229.06:38:59.19#ibcon#flushed, iclass 30, count 0 2006.229.06:38:59.19#ibcon#about to write, iclass 30, count 0 2006.229.06:38:59.19#ibcon#wrote, iclass 30, count 0 2006.229.06:38:59.19#ibcon#about to read 3, iclass 30, count 0 2006.229.06:38:59.23#ibcon#read 3, iclass 30, count 0 2006.229.06:38:59.23#ibcon#about to read 4, iclass 30, count 0 2006.229.06:38:59.23#ibcon#read 4, iclass 30, count 0 2006.229.06:38:59.23#ibcon#about to read 5, iclass 30, count 0 2006.229.06:38:59.23#ibcon#read 5, iclass 30, count 0 2006.229.06:38:59.23#ibcon#about to read 6, iclass 30, count 0 2006.229.06:38:59.23#ibcon#read 6, iclass 30, count 0 2006.229.06:38:59.23#ibcon#end of sib2, iclass 30, count 0 2006.229.06:38:59.23#ibcon#*after write, iclass 30, count 0 2006.229.06:38:59.23#ibcon#*before return 0, iclass 30, count 0 2006.229.06:38:59.23#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:38:59.23#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:38:59.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:38:59.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:38:59.23$vck44/va=4,7 2006.229.06:38:59.23#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.06:38:59.23#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.06:38:59.23#ibcon#ireg 11 cls_cnt 2 2006.229.06:38:59.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:38:59.29#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:38:59.29#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:38:59.29#ibcon#enter wrdev, iclass 32, count 2 2006.229.06:38:59.29#ibcon#first serial, iclass 32, count 2 2006.229.06:38:59.29#ibcon#enter sib2, iclass 32, count 2 2006.229.06:38:59.29#ibcon#flushed, iclass 32, count 2 2006.229.06:38:59.29#ibcon#about to write, iclass 32, count 2 2006.229.06:38:59.29#ibcon#wrote, iclass 32, count 2 2006.229.06:38:59.29#ibcon#about to read 3, iclass 32, count 2 2006.229.06:38:59.31#ibcon#read 3, iclass 32, count 2 2006.229.06:38:59.31#ibcon#about to read 4, iclass 32, count 2 2006.229.06:38:59.31#ibcon#read 4, iclass 32, count 2 2006.229.06:38:59.31#ibcon#about to read 5, iclass 32, count 2 2006.229.06:38:59.31#ibcon#read 5, iclass 32, count 2 2006.229.06:38:59.31#ibcon#about to read 6, iclass 32, count 2 2006.229.06:38:59.31#ibcon#read 6, iclass 32, count 2 2006.229.06:38:59.31#ibcon#end of sib2, iclass 32, count 2 2006.229.06:38:59.31#ibcon#*mode == 0, iclass 32, count 2 2006.229.06:38:59.31#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.06:38:59.31#ibcon#[25=AT04-07\r\n] 2006.229.06:38:59.31#ibcon#*before write, iclass 32, count 2 2006.229.06:38:59.31#ibcon#enter sib2, iclass 32, count 2 2006.229.06:38:59.31#ibcon#flushed, iclass 32, count 2 2006.229.06:38:59.31#ibcon#about to write, iclass 32, count 2 2006.229.06:38:59.31#ibcon#wrote, iclass 32, count 2 2006.229.06:38:59.31#ibcon#about to read 3, iclass 32, count 2 2006.229.06:38:59.34#ibcon#read 3, iclass 32, count 2 2006.229.06:38:59.34#ibcon#about to read 4, iclass 32, count 2 2006.229.06:38:59.34#ibcon#read 4, iclass 32, count 2 2006.229.06:38:59.34#ibcon#about to read 5, iclass 32, count 2 2006.229.06:38:59.34#ibcon#read 5, iclass 32, count 2 2006.229.06:38:59.34#ibcon#about to read 6, iclass 32, count 2 2006.229.06:38:59.34#ibcon#read 6, iclass 32, count 2 2006.229.06:38:59.34#ibcon#end of sib2, iclass 32, count 2 2006.229.06:38:59.34#ibcon#*after write, iclass 32, count 2 2006.229.06:38:59.34#ibcon#*before return 0, iclass 32, count 2 2006.229.06:38:59.34#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:38:59.34#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:38:59.34#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.06:38:59.34#ibcon#ireg 7 cls_cnt 0 2006.229.06:38:59.34#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:38:59.46#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:38:59.46#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:38:59.46#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:38:59.46#ibcon#first serial, iclass 32, count 0 2006.229.06:38:59.46#ibcon#enter sib2, iclass 32, count 0 2006.229.06:38:59.46#ibcon#flushed, iclass 32, count 0 2006.229.06:38:59.46#ibcon#about to write, iclass 32, count 0 2006.229.06:38:59.46#ibcon#wrote, iclass 32, count 0 2006.229.06:38:59.46#ibcon#about to read 3, iclass 32, count 0 2006.229.06:38:59.48#ibcon#read 3, iclass 32, count 0 2006.229.06:38:59.48#ibcon#about to read 4, iclass 32, count 0 2006.229.06:38:59.48#ibcon#read 4, iclass 32, count 0 2006.229.06:38:59.48#ibcon#about to read 5, iclass 32, count 0 2006.229.06:38:59.48#ibcon#read 5, iclass 32, count 0 2006.229.06:38:59.48#ibcon#about to read 6, iclass 32, count 0 2006.229.06:38:59.48#ibcon#read 6, iclass 32, count 0 2006.229.06:38:59.48#ibcon#end of sib2, iclass 32, count 0 2006.229.06:38:59.48#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:38:59.48#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:38:59.48#ibcon#[25=USB\r\n] 2006.229.06:38:59.48#ibcon#*before write, iclass 32, count 0 2006.229.06:38:59.48#ibcon#enter sib2, iclass 32, count 0 2006.229.06:38:59.48#ibcon#flushed, iclass 32, count 0 2006.229.06:38:59.48#ibcon#about to write, iclass 32, count 0 2006.229.06:38:59.48#ibcon#wrote, iclass 32, count 0 2006.229.06:38:59.48#ibcon#about to read 3, iclass 32, count 0 2006.229.06:38:59.51#ibcon#read 3, iclass 32, count 0 2006.229.06:38:59.51#ibcon#about to read 4, iclass 32, count 0 2006.229.06:38:59.51#ibcon#read 4, iclass 32, count 0 2006.229.06:38:59.51#ibcon#about to read 5, iclass 32, count 0 2006.229.06:38:59.51#ibcon#read 5, iclass 32, count 0 2006.229.06:38:59.51#ibcon#about to read 6, iclass 32, count 0 2006.229.06:38:59.51#ibcon#read 6, iclass 32, count 0 2006.229.06:38:59.51#ibcon#end of sib2, iclass 32, count 0 2006.229.06:38:59.51#ibcon#*after write, iclass 32, count 0 2006.229.06:38:59.51#ibcon#*before return 0, iclass 32, count 0 2006.229.06:38:59.51#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:38:59.51#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:38:59.51#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:38:59.51#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:38:59.51$vck44/valo=5,734.99 2006.229.06:38:59.51#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.06:38:59.51#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.06:38:59.51#ibcon#ireg 17 cls_cnt 0 2006.229.06:38:59.51#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:38:59.51#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:38:59.51#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:38:59.51#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:38:59.51#ibcon#first serial, iclass 34, count 0 2006.229.06:38:59.51#ibcon#enter sib2, iclass 34, count 0 2006.229.06:38:59.51#ibcon#flushed, iclass 34, count 0 2006.229.06:38:59.51#ibcon#about to write, iclass 34, count 0 2006.229.06:38:59.51#ibcon#wrote, iclass 34, count 0 2006.229.06:38:59.51#ibcon#about to read 3, iclass 34, count 0 2006.229.06:38:59.53#ibcon#read 3, iclass 34, count 0 2006.229.06:38:59.53#ibcon#about to read 4, iclass 34, count 0 2006.229.06:38:59.53#ibcon#read 4, iclass 34, count 0 2006.229.06:38:59.53#ibcon#about to read 5, iclass 34, count 0 2006.229.06:38:59.53#ibcon#read 5, iclass 34, count 0 2006.229.06:38:59.53#ibcon#about to read 6, iclass 34, count 0 2006.229.06:38:59.53#ibcon#read 6, iclass 34, count 0 2006.229.06:38:59.53#ibcon#end of sib2, iclass 34, count 0 2006.229.06:38:59.53#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:38:59.53#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:38:59.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:38:59.53#ibcon#*before write, iclass 34, count 0 2006.229.06:38:59.53#ibcon#enter sib2, iclass 34, count 0 2006.229.06:38:59.53#ibcon#flushed, iclass 34, count 0 2006.229.06:38:59.53#ibcon#about to write, iclass 34, count 0 2006.229.06:38:59.53#ibcon#wrote, iclass 34, count 0 2006.229.06:38:59.53#ibcon#about to read 3, iclass 34, count 0 2006.229.06:38:59.57#ibcon#read 3, iclass 34, count 0 2006.229.06:38:59.57#ibcon#about to read 4, iclass 34, count 0 2006.229.06:38:59.57#ibcon#read 4, iclass 34, count 0 2006.229.06:38:59.57#ibcon#about to read 5, iclass 34, count 0 2006.229.06:38:59.57#ibcon#read 5, iclass 34, count 0 2006.229.06:38:59.57#ibcon#about to read 6, iclass 34, count 0 2006.229.06:38:59.57#ibcon#read 6, iclass 34, count 0 2006.229.06:38:59.57#ibcon#end of sib2, iclass 34, count 0 2006.229.06:38:59.57#ibcon#*after write, iclass 34, count 0 2006.229.06:38:59.57#ibcon#*before return 0, iclass 34, count 0 2006.229.06:38:59.57#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:38:59.57#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:38:59.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:38:59.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:38:59.57$vck44/va=5,4 2006.229.06:38:59.57#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.06:38:59.57#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.06:38:59.57#ibcon#ireg 11 cls_cnt 2 2006.229.06:38:59.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:38:59.63#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:38:59.63#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:38:59.63#ibcon#enter wrdev, iclass 36, count 2 2006.229.06:38:59.63#ibcon#first serial, iclass 36, count 2 2006.229.06:38:59.63#ibcon#enter sib2, iclass 36, count 2 2006.229.06:38:59.63#ibcon#flushed, iclass 36, count 2 2006.229.06:38:59.63#ibcon#about to write, iclass 36, count 2 2006.229.06:38:59.63#ibcon#wrote, iclass 36, count 2 2006.229.06:38:59.63#ibcon#about to read 3, iclass 36, count 2 2006.229.06:38:59.65#ibcon#read 3, iclass 36, count 2 2006.229.06:38:59.65#ibcon#about to read 4, iclass 36, count 2 2006.229.06:38:59.65#ibcon#read 4, iclass 36, count 2 2006.229.06:38:59.65#ibcon#about to read 5, iclass 36, count 2 2006.229.06:38:59.65#ibcon#read 5, iclass 36, count 2 2006.229.06:38:59.65#ibcon#about to read 6, iclass 36, count 2 2006.229.06:38:59.65#ibcon#read 6, iclass 36, count 2 2006.229.06:38:59.65#ibcon#end of sib2, iclass 36, count 2 2006.229.06:38:59.65#ibcon#*mode == 0, iclass 36, count 2 2006.229.06:38:59.65#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.06:38:59.65#ibcon#[25=AT05-04\r\n] 2006.229.06:38:59.65#ibcon#*before write, iclass 36, count 2 2006.229.06:38:59.65#ibcon#enter sib2, iclass 36, count 2 2006.229.06:38:59.65#ibcon#flushed, iclass 36, count 2 2006.229.06:38:59.65#ibcon#about to write, iclass 36, count 2 2006.229.06:38:59.65#ibcon#wrote, iclass 36, count 2 2006.229.06:38:59.65#ibcon#about to read 3, iclass 36, count 2 2006.229.06:38:59.68#ibcon#read 3, iclass 36, count 2 2006.229.06:38:59.68#ibcon#about to read 4, iclass 36, count 2 2006.229.06:38:59.68#ibcon#read 4, iclass 36, count 2 2006.229.06:38:59.68#ibcon#about to read 5, iclass 36, count 2 2006.229.06:38:59.68#ibcon#read 5, iclass 36, count 2 2006.229.06:38:59.68#ibcon#about to read 6, iclass 36, count 2 2006.229.06:38:59.68#ibcon#read 6, iclass 36, count 2 2006.229.06:38:59.68#ibcon#end of sib2, iclass 36, count 2 2006.229.06:38:59.68#ibcon#*after write, iclass 36, count 2 2006.229.06:38:59.68#ibcon#*before return 0, iclass 36, count 2 2006.229.06:38:59.68#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:38:59.68#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:38:59.68#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.06:38:59.68#ibcon#ireg 7 cls_cnt 0 2006.229.06:38:59.68#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:38:59.80#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:38:59.80#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:38:59.80#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:38:59.80#ibcon#first serial, iclass 36, count 0 2006.229.06:38:59.80#ibcon#enter sib2, iclass 36, count 0 2006.229.06:38:59.80#ibcon#flushed, iclass 36, count 0 2006.229.06:38:59.80#ibcon#about to write, iclass 36, count 0 2006.229.06:38:59.80#ibcon#wrote, iclass 36, count 0 2006.229.06:38:59.80#ibcon#about to read 3, iclass 36, count 0 2006.229.06:38:59.82#ibcon#read 3, iclass 36, count 0 2006.229.06:38:59.82#ibcon#about to read 4, iclass 36, count 0 2006.229.06:38:59.82#ibcon#read 4, iclass 36, count 0 2006.229.06:38:59.82#ibcon#about to read 5, iclass 36, count 0 2006.229.06:38:59.82#ibcon#read 5, iclass 36, count 0 2006.229.06:38:59.82#ibcon#about to read 6, iclass 36, count 0 2006.229.06:38:59.82#ibcon#read 6, iclass 36, count 0 2006.229.06:38:59.82#ibcon#end of sib2, iclass 36, count 0 2006.229.06:38:59.82#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:38:59.82#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:38:59.82#ibcon#[25=USB\r\n] 2006.229.06:38:59.82#ibcon#*before write, iclass 36, count 0 2006.229.06:38:59.82#ibcon#enter sib2, iclass 36, count 0 2006.229.06:38:59.82#ibcon#flushed, iclass 36, count 0 2006.229.06:38:59.82#ibcon#about to write, iclass 36, count 0 2006.229.06:38:59.82#ibcon#wrote, iclass 36, count 0 2006.229.06:38:59.82#ibcon#about to read 3, iclass 36, count 0 2006.229.06:38:59.85#ibcon#read 3, iclass 36, count 0 2006.229.06:38:59.85#ibcon#about to read 4, iclass 36, count 0 2006.229.06:38:59.85#ibcon#read 4, iclass 36, count 0 2006.229.06:38:59.85#ibcon#about to read 5, iclass 36, count 0 2006.229.06:38:59.85#ibcon#read 5, iclass 36, count 0 2006.229.06:38:59.85#ibcon#about to read 6, iclass 36, count 0 2006.229.06:38:59.85#ibcon#read 6, iclass 36, count 0 2006.229.06:38:59.85#ibcon#end of sib2, iclass 36, count 0 2006.229.06:38:59.85#ibcon#*after write, iclass 36, count 0 2006.229.06:38:59.85#ibcon#*before return 0, iclass 36, count 0 2006.229.06:38:59.85#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:38:59.85#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:38:59.85#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:38:59.85#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:38:59.85$vck44/valo=6,814.99 2006.229.06:38:59.85#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.06:38:59.85#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.06:38:59.85#ibcon#ireg 17 cls_cnt 0 2006.229.06:38:59.85#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:38:59.85#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:38:59.85#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:38:59.85#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:38:59.85#ibcon#first serial, iclass 38, count 0 2006.229.06:38:59.85#ibcon#enter sib2, iclass 38, count 0 2006.229.06:38:59.85#ibcon#flushed, iclass 38, count 0 2006.229.06:38:59.85#ibcon#about to write, iclass 38, count 0 2006.229.06:38:59.85#ibcon#wrote, iclass 38, count 0 2006.229.06:38:59.85#ibcon#about to read 3, iclass 38, count 0 2006.229.06:38:59.87#ibcon#read 3, iclass 38, count 0 2006.229.06:38:59.87#ibcon#about to read 4, iclass 38, count 0 2006.229.06:38:59.87#ibcon#read 4, iclass 38, count 0 2006.229.06:38:59.87#ibcon#about to read 5, iclass 38, count 0 2006.229.06:38:59.87#ibcon#read 5, iclass 38, count 0 2006.229.06:38:59.87#ibcon#about to read 6, iclass 38, count 0 2006.229.06:38:59.87#ibcon#read 6, iclass 38, count 0 2006.229.06:38:59.87#ibcon#end of sib2, iclass 38, count 0 2006.229.06:38:59.87#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:38:59.87#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:38:59.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:38:59.87#ibcon#*before write, iclass 38, count 0 2006.229.06:38:59.87#ibcon#enter sib2, iclass 38, count 0 2006.229.06:38:59.87#ibcon#flushed, iclass 38, count 0 2006.229.06:38:59.87#ibcon#about to write, iclass 38, count 0 2006.229.06:38:59.87#ibcon#wrote, iclass 38, count 0 2006.229.06:38:59.87#ibcon#about to read 3, iclass 38, count 0 2006.229.06:38:59.91#ibcon#read 3, iclass 38, count 0 2006.229.06:38:59.91#ibcon#about to read 4, iclass 38, count 0 2006.229.06:38:59.91#ibcon#read 4, iclass 38, count 0 2006.229.06:38:59.91#ibcon#about to read 5, iclass 38, count 0 2006.229.06:38:59.91#ibcon#read 5, iclass 38, count 0 2006.229.06:38:59.91#ibcon#about to read 6, iclass 38, count 0 2006.229.06:38:59.91#ibcon#read 6, iclass 38, count 0 2006.229.06:38:59.91#ibcon#end of sib2, iclass 38, count 0 2006.229.06:38:59.91#ibcon#*after write, iclass 38, count 0 2006.229.06:38:59.91#ibcon#*before return 0, iclass 38, count 0 2006.229.06:38:59.91#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:38:59.91#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:38:59.91#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:38:59.91#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:38:59.91$vck44/va=6,4 2006.229.06:38:59.91#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.06:38:59.91#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.06:38:59.91#ibcon#ireg 11 cls_cnt 2 2006.229.06:38:59.91#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:38:59.97#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:38:59.97#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:38:59.97#ibcon#enter wrdev, iclass 40, count 2 2006.229.06:38:59.97#ibcon#first serial, iclass 40, count 2 2006.229.06:38:59.97#ibcon#enter sib2, iclass 40, count 2 2006.229.06:38:59.97#ibcon#flushed, iclass 40, count 2 2006.229.06:38:59.97#ibcon#about to write, iclass 40, count 2 2006.229.06:38:59.97#ibcon#wrote, iclass 40, count 2 2006.229.06:38:59.97#ibcon#about to read 3, iclass 40, count 2 2006.229.06:38:59.99#ibcon#read 3, iclass 40, count 2 2006.229.06:38:59.99#ibcon#about to read 4, iclass 40, count 2 2006.229.06:38:59.99#ibcon#read 4, iclass 40, count 2 2006.229.06:38:59.99#ibcon#about to read 5, iclass 40, count 2 2006.229.06:38:59.99#ibcon#read 5, iclass 40, count 2 2006.229.06:38:59.99#ibcon#about to read 6, iclass 40, count 2 2006.229.06:38:59.99#ibcon#read 6, iclass 40, count 2 2006.229.06:38:59.99#ibcon#end of sib2, iclass 40, count 2 2006.229.06:38:59.99#ibcon#*mode == 0, iclass 40, count 2 2006.229.06:38:59.99#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.06:38:59.99#ibcon#[25=AT06-04\r\n] 2006.229.06:38:59.99#ibcon#*before write, iclass 40, count 2 2006.229.06:38:59.99#ibcon#enter sib2, iclass 40, count 2 2006.229.06:38:59.99#ibcon#flushed, iclass 40, count 2 2006.229.06:38:59.99#ibcon#about to write, iclass 40, count 2 2006.229.06:38:59.99#ibcon#wrote, iclass 40, count 2 2006.229.06:38:59.99#ibcon#about to read 3, iclass 40, count 2 2006.229.06:39:00.02#ibcon#read 3, iclass 40, count 2 2006.229.06:39:00.02#ibcon#about to read 4, iclass 40, count 2 2006.229.06:39:00.02#ibcon#read 4, iclass 40, count 2 2006.229.06:39:00.02#ibcon#about to read 5, iclass 40, count 2 2006.229.06:39:00.02#ibcon#read 5, iclass 40, count 2 2006.229.06:39:00.02#ibcon#about to read 6, iclass 40, count 2 2006.229.06:39:00.02#ibcon#read 6, iclass 40, count 2 2006.229.06:39:00.02#ibcon#end of sib2, iclass 40, count 2 2006.229.06:39:00.02#ibcon#*after write, iclass 40, count 2 2006.229.06:39:00.02#ibcon#*before return 0, iclass 40, count 2 2006.229.06:39:00.02#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:00.02#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:00.02#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.06:39:00.02#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:00.02#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:00.14#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:00.14#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:00.14#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:39:00.14#ibcon#first serial, iclass 40, count 0 2006.229.06:39:00.14#ibcon#enter sib2, iclass 40, count 0 2006.229.06:39:00.14#ibcon#flushed, iclass 40, count 0 2006.229.06:39:00.14#ibcon#about to write, iclass 40, count 0 2006.229.06:39:00.14#ibcon#wrote, iclass 40, count 0 2006.229.06:39:00.14#ibcon#about to read 3, iclass 40, count 0 2006.229.06:39:00.16#ibcon#read 3, iclass 40, count 0 2006.229.06:39:00.16#ibcon#about to read 4, iclass 40, count 0 2006.229.06:39:00.16#ibcon#read 4, iclass 40, count 0 2006.229.06:39:00.16#ibcon#about to read 5, iclass 40, count 0 2006.229.06:39:00.16#ibcon#read 5, iclass 40, count 0 2006.229.06:39:00.16#ibcon#about to read 6, iclass 40, count 0 2006.229.06:39:00.16#ibcon#read 6, iclass 40, count 0 2006.229.06:39:00.16#ibcon#end of sib2, iclass 40, count 0 2006.229.06:39:00.16#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:39:00.16#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:39:00.16#ibcon#[25=USB\r\n] 2006.229.06:39:00.16#ibcon#*before write, iclass 40, count 0 2006.229.06:39:00.16#ibcon#enter sib2, iclass 40, count 0 2006.229.06:39:00.16#ibcon#flushed, iclass 40, count 0 2006.229.06:39:00.16#ibcon#about to write, iclass 40, count 0 2006.229.06:39:00.16#ibcon#wrote, iclass 40, count 0 2006.229.06:39:00.16#ibcon#about to read 3, iclass 40, count 0 2006.229.06:39:00.19#ibcon#read 3, iclass 40, count 0 2006.229.06:39:00.19#ibcon#about to read 4, iclass 40, count 0 2006.229.06:39:00.19#ibcon#read 4, iclass 40, count 0 2006.229.06:39:00.19#ibcon#about to read 5, iclass 40, count 0 2006.229.06:39:00.19#ibcon#read 5, iclass 40, count 0 2006.229.06:39:00.19#ibcon#about to read 6, iclass 40, count 0 2006.229.06:39:00.19#ibcon#read 6, iclass 40, count 0 2006.229.06:39:00.19#ibcon#end of sib2, iclass 40, count 0 2006.229.06:39:00.19#ibcon#*after write, iclass 40, count 0 2006.229.06:39:00.19#ibcon#*before return 0, iclass 40, count 0 2006.229.06:39:00.19#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:00.19#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:00.19#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:39:00.19#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:39:00.19$vck44/valo=7,864.99 2006.229.06:39:00.19#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.06:39:00.19#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.06:39:00.19#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:00.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:00.19#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:00.19#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:00.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:39:00.19#ibcon#first serial, iclass 4, count 0 2006.229.06:39:00.19#ibcon#enter sib2, iclass 4, count 0 2006.229.06:39:00.19#ibcon#flushed, iclass 4, count 0 2006.229.06:39:00.19#ibcon#about to write, iclass 4, count 0 2006.229.06:39:00.19#ibcon#wrote, iclass 4, count 0 2006.229.06:39:00.19#ibcon#about to read 3, iclass 4, count 0 2006.229.06:39:00.21#ibcon#read 3, iclass 4, count 0 2006.229.06:39:00.21#ibcon#about to read 4, iclass 4, count 0 2006.229.06:39:00.21#ibcon#read 4, iclass 4, count 0 2006.229.06:39:00.21#ibcon#about to read 5, iclass 4, count 0 2006.229.06:39:00.21#ibcon#read 5, iclass 4, count 0 2006.229.06:39:00.21#ibcon#about to read 6, iclass 4, count 0 2006.229.06:39:00.21#ibcon#read 6, iclass 4, count 0 2006.229.06:39:00.21#ibcon#end of sib2, iclass 4, count 0 2006.229.06:39:00.21#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:39:00.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:39:00.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:39:00.21#ibcon#*before write, iclass 4, count 0 2006.229.06:39:00.21#ibcon#enter sib2, iclass 4, count 0 2006.229.06:39:00.21#ibcon#flushed, iclass 4, count 0 2006.229.06:39:00.21#ibcon#about to write, iclass 4, count 0 2006.229.06:39:00.21#ibcon#wrote, iclass 4, count 0 2006.229.06:39:00.21#ibcon#about to read 3, iclass 4, count 0 2006.229.06:39:00.25#ibcon#read 3, iclass 4, count 0 2006.229.06:39:00.25#ibcon#about to read 4, iclass 4, count 0 2006.229.06:39:00.25#ibcon#read 4, iclass 4, count 0 2006.229.06:39:00.25#ibcon#about to read 5, iclass 4, count 0 2006.229.06:39:00.25#ibcon#read 5, iclass 4, count 0 2006.229.06:39:00.25#ibcon#about to read 6, iclass 4, count 0 2006.229.06:39:00.25#ibcon#read 6, iclass 4, count 0 2006.229.06:39:00.25#ibcon#end of sib2, iclass 4, count 0 2006.229.06:39:00.25#ibcon#*after write, iclass 4, count 0 2006.229.06:39:00.25#ibcon#*before return 0, iclass 4, count 0 2006.229.06:39:00.25#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:00.25#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:00.25#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:39:00.25#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:39:00.25$vck44/va=7,5 2006.229.06:39:00.25#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.06:39:00.25#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.06:39:00.25#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:00.25#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:00.31#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:00.31#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:00.31#ibcon#enter wrdev, iclass 6, count 2 2006.229.06:39:00.31#ibcon#first serial, iclass 6, count 2 2006.229.06:39:00.31#ibcon#enter sib2, iclass 6, count 2 2006.229.06:39:00.31#ibcon#flushed, iclass 6, count 2 2006.229.06:39:00.31#ibcon#about to write, iclass 6, count 2 2006.229.06:39:00.31#ibcon#wrote, iclass 6, count 2 2006.229.06:39:00.31#ibcon#about to read 3, iclass 6, count 2 2006.229.06:39:00.33#ibcon#read 3, iclass 6, count 2 2006.229.06:39:00.33#ibcon#about to read 4, iclass 6, count 2 2006.229.06:39:00.33#ibcon#read 4, iclass 6, count 2 2006.229.06:39:00.33#ibcon#about to read 5, iclass 6, count 2 2006.229.06:39:00.33#ibcon#read 5, iclass 6, count 2 2006.229.06:39:00.33#ibcon#about to read 6, iclass 6, count 2 2006.229.06:39:00.33#ibcon#read 6, iclass 6, count 2 2006.229.06:39:00.33#ibcon#end of sib2, iclass 6, count 2 2006.229.06:39:00.33#ibcon#*mode == 0, iclass 6, count 2 2006.229.06:39:00.33#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.06:39:00.33#ibcon#[25=AT07-05\r\n] 2006.229.06:39:00.33#ibcon#*before write, iclass 6, count 2 2006.229.06:39:00.33#ibcon#enter sib2, iclass 6, count 2 2006.229.06:39:00.33#ibcon#flushed, iclass 6, count 2 2006.229.06:39:00.33#ibcon#about to write, iclass 6, count 2 2006.229.06:39:00.33#ibcon#wrote, iclass 6, count 2 2006.229.06:39:00.33#ibcon#about to read 3, iclass 6, count 2 2006.229.06:39:00.36#ibcon#read 3, iclass 6, count 2 2006.229.06:39:00.36#ibcon#about to read 4, iclass 6, count 2 2006.229.06:39:00.36#ibcon#read 4, iclass 6, count 2 2006.229.06:39:00.36#ibcon#about to read 5, iclass 6, count 2 2006.229.06:39:00.36#ibcon#read 5, iclass 6, count 2 2006.229.06:39:00.36#ibcon#about to read 6, iclass 6, count 2 2006.229.06:39:00.36#ibcon#read 6, iclass 6, count 2 2006.229.06:39:00.36#ibcon#end of sib2, iclass 6, count 2 2006.229.06:39:00.36#ibcon#*after write, iclass 6, count 2 2006.229.06:39:00.36#ibcon#*before return 0, iclass 6, count 2 2006.229.06:39:00.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:00.36#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:00.36#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.06:39:00.36#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:00.36#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:00.48#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:00.48#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:00.48#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:39:00.48#ibcon#first serial, iclass 6, count 0 2006.229.06:39:00.48#ibcon#enter sib2, iclass 6, count 0 2006.229.06:39:00.48#ibcon#flushed, iclass 6, count 0 2006.229.06:39:00.48#ibcon#about to write, iclass 6, count 0 2006.229.06:39:00.48#ibcon#wrote, iclass 6, count 0 2006.229.06:39:00.48#ibcon#about to read 3, iclass 6, count 0 2006.229.06:39:00.50#ibcon#read 3, iclass 6, count 0 2006.229.06:39:00.50#ibcon#about to read 4, iclass 6, count 0 2006.229.06:39:00.50#ibcon#read 4, iclass 6, count 0 2006.229.06:39:00.50#ibcon#about to read 5, iclass 6, count 0 2006.229.06:39:00.50#ibcon#read 5, iclass 6, count 0 2006.229.06:39:00.50#ibcon#about to read 6, iclass 6, count 0 2006.229.06:39:00.50#ibcon#read 6, iclass 6, count 0 2006.229.06:39:00.50#ibcon#end of sib2, iclass 6, count 0 2006.229.06:39:00.50#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:39:00.50#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:39:00.50#ibcon#[25=USB\r\n] 2006.229.06:39:00.50#ibcon#*before write, iclass 6, count 0 2006.229.06:39:00.50#ibcon#enter sib2, iclass 6, count 0 2006.229.06:39:00.50#ibcon#flushed, iclass 6, count 0 2006.229.06:39:00.50#ibcon#about to write, iclass 6, count 0 2006.229.06:39:00.50#ibcon#wrote, iclass 6, count 0 2006.229.06:39:00.50#ibcon#about to read 3, iclass 6, count 0 2006.229.06:39:00.53#ibcon#read 3, iclass 6, count 0 2006.229.06:39:00.53#ibcon#about to read 4, iclass 6, count 0 2006.229.06:39:00.53#ibcon#read 4, iclass 6, count 0 2006.229.06:39:00.53#ibcon#about to read 5, iclass 6, count 0 2006.229.06:39:00.53#ibcon#read 5, iclass 6, count 0 2006.229.06:39:00.53#ibcon#about to read 6, iclass 6, count 0 2006.229.06:39:00.53#ibcon#read 6, iclass 6, count 0 2006.229.06:39:00.53#ibcon#end of sib2, iclass 6, count 0 2006.229.06:39:00.53#ibcon#*after write, iclass 6, count 0 2006.229.06:39:00.53#ibcon#*before return 0, iclass 6, count 0 2006.229.06:39:00.53#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:00.53#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:00.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:39:00.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:39:00.53$vck44/valo=8,884.99 2006.229.06:39:00.53#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.06:39:00.53#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.06:39:00.53#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:00.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:00.53#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:00.53#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:00.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:39:00.53#ibcon#first serial, iclass 10, count 0 2006.229.06:39:00.53#ibcon#enter sib2, iclass 10, count 0 2006.229.06:39:00.53#ibcon#flushed, iclass 10, count 0 2006.229.06:39:00.53#ibcon#about to write, iclass 10, count 0 2006.229.06:39:00.53#ibcon#wrote, iclass 10, count 0 2006.229.06:39:00.53#ibcon#about to read 3, iclass 10, count 0 2006.229.06:39:00.55#ibcon#read 3, iclass 10, count 0 2006.229.06:39:00.55#ibcon#about to read 4, iclass 10, count 0 2006.229.06:39:00.55#ibcon#read 4, iclass 10, count 0 2006.229.06:39:00.55#ibcon#about to read 5, iclass 10, count 0 2006.229.06:39:00.55#ibcon#read 5, iclass 10, count 0 2006.229.06:39:00.55#ibcon#about to read 6, iclass 10, count 0 2006.229.06:39:00.55#ibcon#read 6, iclass 10, count 0 2006.229.06:39:00.55#ibcon#end of sib2, iclass 10, count 0 2006.229.06:39:00.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:39:00.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:39:00.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:39:00.55#ibcon#*before write, iclass 10, count 0 2006.229.06:39:00.55#ibcon#enter sib2, iclass 10, count 0 2006.229.06:39:00.55#ibcon#flushed, iclass 10, count 0 2006.229.06:39:00.55#ibcon#about to write, iclass 10, count 0 2006.229.06:39:00.55#ibcon#wrote, iclass 10, count 0 2006.229.06:39:00.55#ibcon#about to read 3, iclass 10, count 0 2006.229.06:39:00.59#ibcon#read 3, iclass 10, count 0 2006.229.06:39:00.59#ibcon#about to read 4, iclass 10, count 0 2006.229.06:39:00.59#ibcon#read 4, iclass 10, count 0 2006.229.06:39:00.59#ibcon#about to read 5, iclass 10, count 0 2006.229.06:39:00.59#ibcon#read 5, iclass 10, count 0 2006.229.06:39:00.59#ibcon#about to read 6, iclass 10, count 0 2006.229.06:39:00.59#ibcon#read 6, iclass 10, count 0 2006.229.06:39:00.59#ibcon#end of sib2, iclass 10, count 0 2006.229.06:39:00.59#ibcon#*after write, iclass 10, count 0 2006.229.06:39:00.59#ibcon#*before return 0, iclass 10, count 0 2006.229.06:39:00.59#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:00.59#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:00.59#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:39:00.59#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:39:00.59$vck44/va=8,6 2006.229.06:39:00.59#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.06:39:00.59#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.06:39:00.59#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:00.59#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:39:00.65#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:39:00.65#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:39:00.65#ibcon#enter wrdev, iclass 12, count 2 2006.229.06:39:00.65#ibcon#first serial, iclass 12, count 2 2006.229.06:39:00.65#ibcon#enter sib2, iclass 12, count 2 2006.229.06:39:00.65#ibcon#flushed, iclass 12, count 2 2006.229.06:39:00.65#ibcon#about to write, iclass 12, count 2 2006.229.06:39:00.65#ibcon#wrote, iclass 12, count 2 2006.229.06:39:00.65#ibcon#about to read 3, iclass 12, count 2 2006.229.06:39:00.67#ibcon#read 3, iclass 12, count 2 2006.229.06:39:00.67#ibcon#about to read 4, iclass 12, count 2 2006.229.06:39:00.67#ibcon#read 4, iclass 12, count 2 2006.229.06:39:00.67#ibcon#about to read 5, iclass 12, count 2 2006.229.06:39:00.67#ibcon#read 5, iclass 12, count 2 2006.229.06:39:00.67#ibcon#about to read 6, iclass 12, count 2 2006.229.06:39:00.67#ibcon#read 6, iclass 12, count 2 2006.229.06:39:00.67#ibcon#end of sib2, iclass 12, count 2 2006.229.06:39:00.67#ibcon#*mode == 0, iclass 12, count 2 2006.229.06:39:00.67#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.06:39:00.67#ibcon#[25=AT08-06\r\n] 2006.229.06:39:00.67#ibcon#*before write, iclass 12, count 2 2006.229.06:39:00.67#ibcon#enter sib2, iclass 12, count 2 2006.229.06:39:00.67#ibcon#flushed, iclass 12, count 2 2006.229.06:39:00.67#ibcon#about to write, iclass 12, count 2 2006.229.06:39:00.67#ibcon#wrote, iclass 12, count 2 2006.229.06:39:00.67#ibcon#about to read 3, iclass 12, count 2 2006.229.06:39:00.70#ibcon#read 3, iclass 12, count 2 2006.229.06:39:00.70#ibcon#about to read 4, iclass 12, count 2 2006.229.06:39:00.70#ibcon#read 4, iclass 12, count 2 2006.229.06:39:00.70#ibcon#about to read 5, iclass 12, count 2 2006.229.06:39:00.70#ibcon#read 5, iclass 12, count 2 2006.229.06:39:00.70#ibcon#about to read 6, iclass 12, count 2 2006.229.06:39:00.70#ibcon#read 6, iclass 12, count 2 2006.229.06:39:00.70#ibcon#end of sib2, iclass 12, count 2 2006.229.06:39:00.70#ibcon#*after write, iclass 12, count 2 2006.229.06:39:00.70#ibcon#*before return 0, iclass 12, count 2 2006.229.06:39:00.70#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:39:00.70#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.06:39:00.70#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.06:39:00.70#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:00.70#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:39:00.82#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:39:00.82#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:39:00.82#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:39:00.82#ibcon#first serial, iclass 12, count 0 2006.229.06:39:00.82#ibcon#enter sib2, iclass 12, count 0 2006.229.06:39:00.82#ibcon#flushed, iclass 12, count 0 2006.229.06:39:00.82#ibcon#about to write, iclass 12, count 0 2006.229.06:39:00.82#ibcon#wrote, iclass 12, count 0 2006.229.06:39:00.82#ibcon#about to read 3, iclass 12, count 0 2006.229.06:39:00.84#ibcon#read 3, iclass 12, count 0 2006.229.06:39:00.84#ibcon#about to read 4, iclass 12, count 0 2006.229.06:39:00.84#ibcon#read 4, iclass 12, count 0 2006.229.06:39:00.84#ibcon#about to read 5, iclass 12, count 0 2006.229.06:39:00.84#ibcon#read 5, iclass 12, count 0 2006.229.06:39:00.84#ibcon#about to read 6, iclass 12, count 0 2006.229.06:39:00.84#ibcon#read 6, iclass 12, count 0 2006.229.06:39:00.84#ibcon#end of sib2, iclass 12, count 0 2006.229.06:39:00.84#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:39:00.84#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:39:00.84#ibcon#[25=USB\r\n] 2006.229.06:39:00.84#ibcon#*before write, iclass 12, count 0 2006.229.06:39:00.84#ibcon#enter sib2, iclass 12, count 0 2006.229.06:39:00.84#ibcon#flushed, iclass 12, count 0 2006.229.06:39:00.84#ibcon#about to write, iclass 12, count 0 2006.229.06:39:00.84#ibcon#wrote, iclass 12, count 0 2006.229.06:39:00.84#ibcon#about to read 3, iclass 12, count 0 2006.229.06:39:00.87#ibcon#read 3, iclass 12, count 0 2006.229.06:39:00.87#ibcon#about to read 4, iclass 12, count 0 2006.229.06:39:00.87#ibcon#read 4, iclass 12, count 0 2006.229.06:39:00.87#ibcon#about to read 5, iclass 12, count 0 2006.229.06:39:00.87#ibcon#read 5, iclass 12, count 0 2006.229.06:39:00.87#ibcon#about to read 6, iclass 12, count 0 2006.229.06:39:00.87#ibcon#read 6, iclass 12, count 0 2006.229.06:39:00.87#ibcon#end of sib2, iclass 12, count 0 2006.229.06:39:00.87#ibcon#*after write, iclass 12, count 0 2006.229.06:39:00.87#ibcon#*before return 0, iclass 12, count 0 2006.229.06:39:00.87#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:39:00.87#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.06:39:00.87#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:39:00.87#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:39:00.87$vck44/vblo=1,629.99 2006.229.06:39:00.87#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.06:39:00.87#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.06:39:00.87#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:00.87#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:39:00.87#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:39:00.87#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:39:00.87#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:39:00.87#ibcon#first serial, iclass 14, count 0 2006.229.06:39:00.87#ibcon#enter sib2, iclass 14, count 0 2006.229.06:39:00.87#ibcon#flushed, iclass 14, count 0 2006.229.06:39:00.87#ibcon#about to write, iclass 14, count 0 2006.229.06:39:00.87#ibcon#wrote, iclass 14, count 0 2006.229.06:39:00.87#ibcon#about to read 3, iclass 14, count 0 2006.229.06:39:00.89#ibcon#read 3, iclass 14, count 0 2006.229.06:39:00.89#ibcon#about to read 4, iclass 14, count 0 2006.229.06:39:00.89#ibcon#read 4, iclass 14, count 0 2006.229.06:39:00.89#ibcon#about to read 5, iclass 14, count 0 2006.229.06:39:00.89#ibcon#read 5, iclass 14, count 0 2006.229.06:39:00.89#ibcon#about to read 6, iclass 14, count 0 2006.229.06:39:00.89#ibcon#read 6, iclass 14, count 0 2006.229.06:39:00.89#ibcon#end of sib2, iclass 14, count 0 2006.229.06:39:00.89#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:39:00.89#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:39:00.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:39:00.89#ibcon#*before write, iclass 14, count 0 2006.229.06:39:00.89#ibcon#enter sib2, iclass 14, count 0 2006.229.06:39:00.89#ibcon#flushed, iclass 14, count 0 2006.229.06:39:00.89#ibcon#about to write, iclass 14, count 0 2006.229.06:39:00.89#ibcon#wrote, iclass 14, count 0 2006.229.06:39:00.89#ibcon#about to read 3, iclass 14, count 0 2006.229.06:39:00.93#ibcon#read 3, iclass 14, count 0 2006.229.06:39:00.93#ibcon#about to read 4, iclass 14, count 0 2006.229.06:39:00.93#ibcon#read 4, iclass 14, count 0 2006.229.06:39:00.93#ibcon#about to read 5, iclass 14, count 0 2006.229.06:39:00.93#ibcon#read 5, iclass 14, count 0 2006.229.06:39:00.93#ibcon#about to read 6, iclass 14, count 0 2006.229.06:39:00.93#ibcon#read 6, iclass 14, count 0 2006.229.06:39:00.93#ibcon#end of sib2, iclass 14, count 0 2006.229.06:39:00.93#ibcon#*after write, iclass 14, count 0 2006.229.06:39:00.93#ibcon#*before return 0, iclass 14, count 0 2006.229.06:39:00.93#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:39:00.93#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.06:39:00.93#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:39:00.93#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:39:00.93$vck44/vb=1,4 2006.229.06:39:00.93#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.06:39:00.93#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.06:39:00.93#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:00.93#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:39:00.93#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:39:00.93#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:39:00.93#ibcon#enter wrdev, iclass 16, count 2 2006.229.06:39:00.93#ibcon#first serial, iclass 16, count 2 2006.229.06:39:00.93#ibcon#enter sib2, iclass 16, count 2 2006.229.06:39:00.93#ibcon#flushed, iclass 16, count 2 2006.229.06:39:00.93#ibcon#about to write, iclass 16, count 2 2006.229.06:39:00.93#ibcon#wrote, iclass 16, count 2 2006.229.06:39:00.93#ibcon#about to read 3, iclass 16, count 2 2006.229.06:39:00.95#ibcon#read 3, iclass 16, count 2 2006.229.06:39:00.95#ibcon#about to read 4, iclass 16, count 2 2006.229.06:39:00.95#ibcon#read 4, iclass 16, count 2 2006.229.06:39:00.95#ibcon#about to read 5, iclass 16, count 2 2006.229.06:39:00.95#ibcon#read 5, iclass 16, count 2 2006.229.06:39:00.95#ibcon#about to read 6, iclass 16, count 2 2006.229.06:39:00.95#ibcon#read 6, iclass 16, count 2 2006.229.06:39:00.95#ibcon#end of sib2, iclass 16, count 2 2006.229.06:39:00.95#ibcon#*mode == 0, iclass 16, count 2 2006.229.06:39:00.95#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.06:39:00.95#ibcon#[27=AT01-04\r\n] 2006.229.06:39:00.95#ibcon#*before write, iclass 16, count 2 2006.229.06:39:00.95#ibcon#enter sib2, iclass 16, count 2 2006.229.06:39:00.95#ibcon#flushed, iclass 16, count 2 2006.229.06:39:00.95#ibcon#about to write, iclass 16, count 2 2006.229.06:39:00.95#ibcon#wrote, iclass 16, count 2 2006.229.06:39:00.95#ibcon#about to read 3, iclass 16, count 2 2006.229.06:39:00.98#ibcon#read 3, iclass 16, count 2 2006.229.06:39:00.98#ibcon#about to read 4, iclass 16, count 2 2006.229.06:39:00.98#ibcon#read 4, iclass 16, count 2 2006.229.06:39:00.98#ibcon#about to read 5, iclass 16, count 2 2006.229.06:39:00.98#ibcon#read 5, iclass 16, count 2 2006.229.06:39:00.98#ibcon#about to read 6, iclass 16, count 2 2006.229.06:39:00.98#ibcon#read 6, iclass 16, count 2 2006.229.06:39:00.98#ibcon#end of sib2, iclass 16, count 2 2006.229.06:39:00.98#ibcon#*after write, iclass 16, count 2 2006.229.06:39:00.98#ibcon#*before return 0, iclass 16, count 2 2006.229.06:39:00.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:39:00.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.06:39:00.98#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.06:39:00.98#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:00.98#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:39:01.10#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:39:01.10#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:39:01.10#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:39:01.10#ibcon#first serial, iclass 16, count 0 2006.229.06:39:01.10#ibcon#enter sib2, iclass 16, count 0 2006.229.06:39:01.10#ibcon#flushed, iclass 16, count 0 2006.229.06:39:01.10#ibcon#about to write, iclass 16, count 0 2006.229.06:39:01.10#ibcon#wrote, iclass 16, count 0 2006.229.06:39:01.10#ibcon#about to read 3, iclass 16, count 0 2006.229.06:39:01.12#ibcon#read 3, iclass 16, count 0 2006.229.06:39:01.12#ibcon#about to read 4, iclass 16, count 0 2006.229.06:39:01.12#ibcon#read 4, iclass 16, count 0 2006.229.06:39:01.12#ibcon#about to read 5, iclass 16, count 0 2006.229.06:39:01.12#ibcon#read 5, iclass 16, count 0 2006.229.06:39:01.12#ibcon#about to read 6, iclass 16, count 0 2006.229.06:39:01.12#ibcon#read 6, iclass 16, count 0 2006.229.06:39:01.12#ibcon#end of sib2, iclass 16, count 0 2006.229.06:39:01.12#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:39:01.12#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:39:01.12#ibcon#[27=USB\r\n] 2006.229.06:39:01.12#ibcon#*before write, iclass 16, count 0 2006.229.06:39:01.12#ibcon#enter sib2, iclass 16, count 0 2006.229.06:39:01.12#ibcon#flushed, iclass 16, count 0 2006.229.06:39:01.12#ibcon#about to write, iclass 16, count 0 2006.229.06:39:01.12#ibcon#wrote, iclass 16, count 0 2006.229.06:39:01.12#ibcon#about to read 3, iclass 16, count 0 2006.229.06:39:01.15#ibcon#read 3, iclass 16, count 0 2006.229.06:39:01.15#ibcon#about to read 4, iclass 16, count 0 2006.229.06:39:01.15#ibcon#read 4, iclass 16, count 0 2006.229.06:39:01.15#ibcon#about to read 5, iclass 16, count 0 2006.229.06:39:01.15#ibcon#read 5, iclass 16, count 0 2006.229.06:39:01.15#ibcon#about to read 6, iclass 16, count 0 2006.229.06:39:01.15#ibcon#read 6, iclass 16, count 0 2006.229.06:39:01.15#ibcon#end of sib2, iclass 16, count 0 2006.229.06:39:01.15#ibcon#*after write, iclass 16, count 0 2006.229.06:39:01.15#ibcon#*before return 0, iclass 16, count 0 2006.229.06:39:01.15#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:39:01.15#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.06:39:01.15#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:39:01.15#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:39:01.15$vck44/vblo=2,634.99 2006.229.06:39:01.15#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.06:39:01.15#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.06:39:01.15#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:01.15#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:39:01.15#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:39:01.15#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:39:01.15#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:39:01.15#ibcon#first serial, iclass 18, count 0 2006.229.06:39:01.15#ibcon#enter sib2, iclass 18, count 0 2006.229.06:39:01.15#ibcon#flushed, iclass 18, count 0 2006.229.06:39:01.15#ibcon#about to write, iclass 18, count 0 2006.229.06:39:01.15#ibcon#wrote, iclass 18, count 0 2006.229.06:39:01.15#ibcon#about to read 3, iclass 18, count 0 2006.229.06:39:01.17#ibcon#read 3, iclass 18, count 0 2006.229.06:39:01.17#ibcon#about to read 4, iclass 18, count 0 2006.229.06:39:01.17#ibcon#read 4, iclass 18, count 0 2006.229.06:39:01.17#ibcon#about to read 5, iclass 18, count 0 2006.229.06:39:01.17#ibcon#read 5, iclass 18, count 0 2006.229.06:39:01.17#ibcon#about to read 6, iclass 18, count 0 2006.229.06:39:01.17#ibcon#read 6, iclass 18, count 0 2006.229.06:39:01.17#ibcon#end of sib2, iclass 18, count 0 2006.229.06:39:01.17#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:39:01.17#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:39:01.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:39:01.17#ibcon#*before write, iclass 18, count 0 2006.229.06:39:01.17#ibcon#enter sib2, iclass 18, count 0 2006.229.06:39:01.17#ibcon#flushed, iclass 18, count 0 2006.229.06:39:01.17#ibcon#about to write, iclass 18, count 0 2006.229.06:39:01.17#ibcon#wrote, iclass 18, count 0 2006.229.06:39:01.17#ibcon#about to read 3, iclass 18, count 0 2006.229.06:39:01.21#ibcon#read 3, iclass 18, count 0 2006.229.06:39:01.21#ibcon#about to read 4, iclass 18, count 0 2006.229.06:39:01.21#ibcon#read 4, iclass 18, count 0 2006.229.06:39:01.21#ibcon#about to read 5, iclass 18, count 0 2006.229.06:39:01.21#ibcon#read 5, iclass 18, count 0 2006.229.06:39:01.21#ibcon#about to read 6, iclass 18, count 0 2006.229.06:39:01.21#ibcon#read 6, iclass 18, count 0 2006.229.06:39:01.21#ibcon#end of sib2, iclass 18, count 0 2006.229.06:39:01.21#ibcon#*after write, iclass 18, count 0 2006.229.06:39:01.21#ibcon#*before return 0, iclass 18, count 0 2006.229.06:39:01.21#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:39:01.21#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.06:39:01.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:39:01.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:39:01.21$vck44/vb=2,4 2006.229.06:39:01.21#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.06:39:01.21#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.06:39:01.21#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:01.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:39:01.27#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:39:01.27#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:39:01.27#ibcon#enter wrdev, iclass 20, count 2 2006.229.06:39:01.27#ibcon#first serial, iclass 20, count 2 2006.229.06:39:01.27#ibcon#enter sib2, iclass 20, count 2 2006.229.06:39:01.27#ibcon#flushed, iclass 20, count 2 2006.229.06:39:01.27#ibcon#about to write, iclass 20, count 2 2006.229.06:39:01.27#ibcon#wrote, iclass 20, count 2 2006.229.06:39:01.27#ibcon#about to read 3, iclass 20, count 2 2006.229.06:39:01.29#ibcon#read 3, iclass 20, count 2 2006.229.06:39:01.29#ibcon#about to read 4, iclass 20, count 2 2006.229.06:39:01.29#ibcon#read 4, iclass 20, count 2 2006.229.06:39:01.29#ibcon#about to read 5, iclass 20, count 2 2006.229.06:39:01.29#ibcon#read 5, iclass 20, count 2 2006.229.06:39:01.29#ibcon#about to read 6, iclass 20, count 2 2006.229.06:39:01.29#ibcon#read 6, iclass 20, count 2 2006.229.06:39:01.29#ibcon#end of sib2, iclass 20, count 2 2006.229.06:39:01.29#ibcon#*mode == 0, iclass 20, count 2 2006.229.06:39:01.29#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.06:39:01.29#ibcon#[27=AT02-04\r\n] 2006.229.06:39:01.29#ibcon#*before write, iclass 20, count 2 2006.229.06:39:01.29#ibcon#enter sib2, iclass 20, count 2 2006.229.06:39:01.29#ibcon#flushed, iclass 20, count 2 2006.229.06:39:01.29#ibcon#about to write, iclass 20, count 2 2006.229.06:39:01.29#ibcon#wrote, iclass 20, count 2 2006.229.06:39:01.29#ibcon#about to read 3, iclass 20, count 2 2006.229.06:39:01.32#ibcon#read 3, iclass 20, count 2 2006.229.06:39:01.32#ibcon#about to read 4, iclass 20, count 2 2006.229.06:39:01.32#ibcon#read 4, iclass 20, count 2 2006.229.06:39:01.32#ibcon#about to read 5, iclass 20, count 2 2006.229.06:39:01.32#ibcon#read 5, iclass 20, count 2 2006.229.06:39:01.32#ibcon#about to read 6, iclass 20, count 2 2006.229.06:39:01.32#ibcon#read 6, iclass 20, count 2 2006.229.06:39:01.32#ibcon#end of sib2, iclass 20, count 2 2006.229.06:39:01.32#ibcon#*after write, iclass 20, count 2 2006.229.06:39:01.32#ibcon#*before return 0, iclass 20, count 2 2006.229.06:39:01.32#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:39:01.32#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.06:39:01.32#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.06:39:01.32#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:01.32#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:39:01.44#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:39:01.44#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:39:01.44#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:39:01.44#ibcon#first serial, iclass 20, count 0 2006.229.06:39:01.44#ibcon#enter sib2, iclass 20, count 0 2006.229.06:39:01.44#ibcon#flushed, iclass 20, count 0 2006.229.06:39:01.44#ibcon#about to write, iclass 20, count 0 2006.229.06:39:01.44#ibcon#wrote, iclass 20, count 0 2006.229.06:39:01.44#ibcon#about to read 3, iclass 20, count 0 2006.229.06:39:01.46#ibcon#read 3, iclass 20, count 0 2006.229.06:39:01.46#ibcon#about to read 4, iclass 20, count 0 2006.229.06:39:01.46#ibcon#read 4, iclass 20, count 0 2006.229.06:39:01.46#ibcon#about to read 5, iclass 20, count 0 2006.229.06:39:01.46#ibcon#read 5, iclass 20, count 0 2006.229.06:39:01.46#ibcon#about to read 6, iclass 20, count 0 2006.229.06:39:01.46#ibcon#read 6, iclass 20, count 0 2006.229.06:39:01.46#ibcon#end of sib2, iclass 20, count 0 2006.229.06:39:01.46#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:39:01.46#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:39:01.46#ibcon#[27=USB\r\n] 2006.229.06:39:01.46#ibcon#*before write, iclass 20, count 0 2006.229.06:39:01.46#ibcon#enter sib2, iclass 20, count 0 2006.229.06:39:01.46#ibcon#flushed, iclass 20, count 0 2006.229.06:39:01.46#ibcon#about to write, iclass 20, count 0 2006.229.06:39:01.46#ibcon#wrote, iclass 20, count 0 2006.229.06:39:01.46#ibcon#about to read 3, iclass 20, count 0 2006.229.06:39:01.49#ibcon#read 3, iclass 20, count 0 2006.229.06:39:01.49#ibcon#about to read 4, iclass 20, count 0 2006.229.06:39:01.49#ibcon#read 4, iclass 20, count 0 2006.229.06:39:01.49#ibcon#about to read 5, iclass 20, count 0 2006.229.06:39:01.49#ibcon#read 5, iclass 20, count 0 2006.229.06:39:01.49#ibcon#about to read 6, iclass 20, count 0 2006.229.06:39:01.49#ibcon#read 6, iclass 20, count 0 2006.229.06:39:01.49#ibcon#end of sib2, iclass 20, count 0 2006.229.06:39:01.49#ibcon#*after write, iclass 20, count 0 2006.229.06:39:01.49#ibcon#*before return 0, iclass 20, count 0 2006.229.06:39:01.49#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:39:01.49#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.06:39:01.49#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:39:01.49#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:39:01.49$vck44/vblo=3,649.99 2006.229.06:39:01.49#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.06:39:01.49#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.06:39:01.49#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:01.49#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:39:01.49#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:39:01.49#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:39:01.49#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:39:01.49#ibcon#first serial, iclass 22, count 0 2006.229.06:39:01.49#ibcon#enter sib2, iclass 22, count 0 2006.229.06:39:01.49#ibcon#flushed, iclass 22, count 0 2006.229.06:39:01.49#ibcon#about to write, iclass 22, count 0 2006.229.06:39:01.49#ibcon#wrote, iclass 22, count 0 2006.229.06:39:01.49#ibcon#about to read 3, iclass 22, count 0 2006.229.06:39:01.51#ibcon#read 3, iclass 22, count 0 2006.229.06:39:01.51#ibcon#about to read 4, iclass 22, count 0 2006.229.06:39:01.51#ibcon#read 4, iclass 22, count 0 2006.229.06:39:01.51#ibcon#about to read 5, iclass 22, count 0 2006.229.06:39:01.51#ibcon#read 5, iclass 22, count 0 2006.229.06:39:01.51#ibcon#about to read 6, iclass 22, count 0 2006.229.06:39:01.51#ibcon#read 6, iclass 22, count 0 2006.229.06:39:01.51#ibcon#end of sib2, iclass 22, count 0 2006.229.06:39:01.51#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:39:01.51#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:39:01.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:39:01.51#ibcon#*before write, iclass 22, count 0 2006.229.06:39:01.51#ibcon#enter sib2, iclass 22, count 0 2006.229.06:39:01.51#ibcon#flushed, iclass 22, count 0 2006.229.06:39:01.51#ibcon#about to write, iclass 22, count 0 2006.229.06:39:01.51#ibcon#wrote, iclass 22, count 0 2006.229.06:39:01.51#ibcon#about to read 3, iclass 22, count 0 2006.229.06:39:01.55#ibcon#read 3, iclass 22, count 0 2006.229.06:39:01.55#ibcon#about to read 4, iclass 22, count 0 2006.229.06:39:01.55#ibcon#read 4, iclass 22, count 0 2006.229.06:39:01.55#ibcon#about to read 5, iclass 22, count 0 2006.229.06:39:01.55#ibcon#read 5, iclass 22, count 0 2006.229.06:39:01.55#ibcon#about to read 6, iclass 22, count 0 2006.229.06:39:01.55#ibcon#read 6, iclass 22, count 0 2006.229.06:39:01.55#ibcon#end of sib2, iclass 22, count 0 2006.229.06:39:01.55#ibcon#*after write, iclass 22, count 0 2006.229.06:39:01.55#ibcon#*before return 0, iclass 22, count 0 2006.229.06:39:01.55#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:39:01.55#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.06:39:01.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:39:01.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:39:01.55$vck44/vb=3,4 2006.229.06:39:01.55#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.06:39:01.55#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.06:39:01.55#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:01.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:39:01.61#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:39:01.61#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:39:01.61#ibcon#enter wrdev, iclass 24, count 2 2006.229.06:39:01.61#ibcon#first serial, iclass 24, count 2 2006.229.06:39:01.61#ibcon#enter sib2, iclass 24, count 2 2006.229.06:39:01.61#ibcon#flushed, iclass 24, count 2 2006.229.06:39:01.61#ibcon#about to write, iclass 24, count 2 2006.229.06:39:01.61#ibcon#wrote, iclass 24, count 2 2006.229.06:39:01.61#ibcon#about to read 3, iclass 24, count 2 2006.229.06:39:01.63#ibcon#read 3, iclass 24, count 2 2006.229.06:39:01.63#ibcon#about to read 4, iclass 24, count 2 2006.229.06:39:01.63#ibcon#read 4, iclass 24, count 2 2006.229.06:39:01.63#ibcon#about to read 5, iclass 24, count 2 2006.229.06:39:01.63#ibcon#read 5, iclass 24, count 2 2006.229.06:39:01.63#ibcon#about to read 6, iclass 24, count 2 2006.229.06:39:01.63#ibcon#read 6, iclass 24, count 2 2006.229.06:39:01.63#ibcon#end of sib2, iclass 24, count 2 2006.229.06:39:01.63#ibcon#*mode == 0, iclass 24, count 2 2006.229.06:39:01.63#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.06:39:01.63#ibcon#[27=AT03-04\r\n] 2006.229.06:39:01.63#ibcon#*before write, iclass 24, count 2 2006.229.06:39:01.63#ibcon#enter sib2, iclass 24, count 2 2006.229.06:39:01.63#ibcon#flushed, iclass 24, count 2 2006.229.06:39:01.63#ibcon#about to write, iclass 24, count 2 2006.229.06:39:01.63#ibcon#wrote, iclass 24, count 2 2006.229.06:39:01.63#ibcon#about to read 3, iclass 24, count 2 2006.229.06:39:01.66#ibcon#read 3, iclass 24, count 2 2006.229.06:39:01.66#ibcon#about to read 4, iclass 24, count 2 2006.229.06:39:01.66#ibcon#read 4, iclass 24, count 2 2006.229.06:39:01.66#ibcon#about to read 5, iclass 24, count 2 2006.229.06:39:01.66#ibcon#read 5, iclass 24, count 2 2006.229.06:39:01.66#ibcon#about to read 6, iclass 24, count 2 2006.229.06:39:01.66#ibcon#read 6, iclass 24, count 2 2006.229.06:39:01.66#ibcon#end of sib2, iclass 24, count 2 2006.229.06:39:01.66#ibcon#*after write, iclass 24, count 2 2006.229.06:39:01.66#ibcon#*before return 0, iclass 24, count 2 2006.229.06:39:01.66#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:39:01.66#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.06:39:01.66#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.06:39:01.66#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:01.66#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:39:01.78#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:39:01.78#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:39:01.78#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:39:01.78#ibcon#first serial, iclass 24, count 0 2006.229.06:39:01.78#ibcon#enter sib2, iclass 24, count 0 2006.229.06:39:01.78#ibcon#flushed, iclass 24, count 0 2006.229.06:39:01.78#ibcon#about to write, iclass 24, count 0 2006.229.06:39:01.78#ibcon#wrote, iclass 24, count 0 2006.229.06:39:01.78#ibcon#about to read 3, iclass 24, count 0 2006.229.06:39:01.80#ibcon#read 3, iclass 24, count 0 2006.229.06:39:01.80#ibcon#about to read 4, iclass 24, count 0 2006.229.06:39:01.80#ibcon#read 4, iclass 24, count 0 2006.229.06:39:01.80#ibcon#about to read 5, iclass 24, count 0 2006.229.06:39:01.80#ibcon#read 5, iclass 24, count 0 2006.229.06:39:01.80#ibcon#about to read 6, iclass 24, count 0 2006.229.06:39:01.80#ibcon#read 6, iclass 24, count 0 2006.229.06:39:01.80#ibcon#end of sib2, iclass 24, count 0 2006.229.06:39:01.80#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:39:01.80#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:39:01.80#ibcon#[27=USB\r\n] 2006.229.06:39:01.80#ibcon#*before write, iclass 24, count 0 2006.229.06:39:01.80#ibcon#enter sib2, iclass 24, count 0 2006.229.06:39:01.80#ibcon#flushed, iclass 24, count 0 2006.229.06:39:01.80#ibcon#about to write, iclass 24, count 0 2006.229.06:39:01.80#ibcon#wrote, iclass 24, count 0 2006.229.06:39:01.80#ibcon#about to read 3, iclass 24, count 0 2006.229.06:39:01.83#ibcon#read 3, iclass 24, count 0 2006.229.06:39:01.83#ibcon#about to read 4, iclass 24, count 0 2006.229.06:39:01.83#ibcon#read 4, iclass 24, count 0 2006.229.06:39:01.83#ibcon#about to read 5, iclass 24, count 0 2006.229.06:39:01.83#ibcon#read 5, iclass 24, count 0 2006.229.06:39:01.83#ibcon#about to read 6, iclass 24, count 0 2006.229.06:39:01.83#ibcon#read 6, iclass 24, count 0 2006.229.06:39:01.83#ibcon#end of sib2, iclass 24, count 0 2006.229.06:39:01.83#ibcon#*after write, iclass 24, count 0 2006.229.06:39:01.83#ibcon#*before return 0, iclass 24, count 0 2006.229.06:39:01.83#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:39:01.83#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.06:39:01.83#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:39:01.83#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:39:01.83$vck44/vblo=4,679.99 2006.229.06:39:01.83#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.06:39:01.83#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.06:39:01.83#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:01.83#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:39:01.83#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:39:01.83#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:39:01.83#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:39:01.83#ibcon#first serial, iclass 26, count 0 2006.229.06:39:01.83#ibcon#enter sib2, iclass 26, count 0 2006.229.06:39:01.83#ibcon#flushed, iclass 26, count 0 2006.229.06:39:01.83#ibcon#about to write, iclass 26, count 0 2006.229.06:39:01.83#ibcon#wrote, iclass 26, count 0 2006.229.06:39:01.83#ibcon#about to read 3, iclass 26, count 0 2006.229.06:39:01.85#ibcon#read 3, iclass 26, count 0 2006.229.06:39:01.85#ibcon#about to read 4, iclass 26, count 0 2006.229.06:39:01.85#ibcon#read 4, iclass 26, count 0 2006.229.06:39:01.85#ibcon#about to read 5, iclass 26, count 0 2006.229.06:39:01.85#ibcon#read 5, iclass 26, count 0 2006.229.06:39:01.85#ibcon#about to read 6, iclass 26, count 0 2006.229.06:39:01.85#ibcon#read 6, iclass 26, count 0 2006.229.06:39:01.85#ibcon#end of sib2, iclass 26, count 0 2006.229.06:39:01.85#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:39:01.85#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:39:01.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:39:01.85#ibcon#*before write, iclass 26, count 0 2006.229.06:39:01.85#ibcon#enter sib2, iclass 26, count 0 2006.229.06:39:01.85#ibcon#flushed, iclass 26, count 0 2006.229.06:39:01.85#ibcon#about to write, iclass 26, count 0 2006.229.06:39:01.85#ibcon#wrote, iclass 26, count 0 2006.229.06:39:01.85#ibcon#about to read 3, iclass 26, count 0 2006.229.06:39:01.89#ibcon#read 3, iclass 26, count 0 2006.229.06:39:01.89#ibcon#about to read 4, iclass 26, count 0 2006.229.06:39:01.89#ibcon#read 4, iclass 26, count 0 2006.229.06:39:01.89#ibcon#about to read 5, iclass 26, count 0 2006.229.06:39:01.89#ibcon#read 5, iclass 26, count 0 2006.229.06:39:01.89#ibcon#about to read 6, iclass 26, count 0 2006.229.06:39:01.89#ibcon#read 6, iclass 26, count 0 2006.229.06:39:01.89#ibcon#end of sib2, iclass 26, count 0 2006.229.06:39:01.89#ibcon#*after write, iclass 26, count 0 2006.229.06:39:01.89#ibcon#*before return 0, iclass 26, count 0 2006.229.06:39:01.89#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:39:01.89#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.06:39:01.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:39:01.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:39:01.89$vck44/vb=4,4 2006.229.06:39:01.89#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.06:39:01.89#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.06:39:01.89#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:01.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:39:01.95#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:39:01.95#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:39:01.95#ibcon#enter wrdev, iclass 28, count 2 2006.229.06:39:01.95#ibcon#first serial, iclass 28, count 2 2006.229.06:39:01.95#ibcon#enter sib2, iclass 28, count 2 2006.229.06:39:01.95#ibcon#flushed, iclass 28, count 2 2006.229.06:39:01.95#ibcon#about to write, iclass 28, count 2 2006.229.06:39:01.95#ibcon#wrote, iclass 28, count 2 2006.229.06:39:01.95#ibcon#about to read 3, iclass 28, count 2 2006.229.06:39:01.97#ibcon#read 3, iclass 28, count 2 2006.229.06:39:01.97#ibcon#about to read 4, iclass 28, count 2 2006.229.06:39:01.97#ibcon#read 4, iclass 28, count 2 2006.229.06:39:01.97#ibcon#about to read 5, iclass 28, count 2 2006.229.06:39:01.97#ibcon#read 5, iclass 28, count 2 2006.229.06:39:01.97#ibcon#about to read 6, iclass 28, count 2 2006.229.06:39:01.97#ibcon#read 6, iclass 28, count 2 2006.229.06:39:01.97#ibcon#end of sib2, iclass 28, count 2 2006.229.06:39:01.97#ibcon#*mode == 0, iclass 28, count 2 2006.229.06:39:01.97#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.06:39:01.97#ibcon#[27=AT04-04\r\n] 2006.229.06:39:01.97#ibcon#*before write, iclass 28, count 2 2006.229.06:39:01.97#ibcon#enter sib2, iclass 28, count 2 2006.229.06:39:01.97#ibcon#flushed, iclass 28, count 2 2006.229.06:39:01.97#ibcon#about to write, iclass 28, count 2 2006.229.06:39:01.97#ibcon#wrote, iclass 28, count 2 2006.229.06:39:01.97#ibcon#about to read 3, iclass 28, count 2 2006.229.06:39:02.00#ibcon#read 3, iclass 28, count 2 2006.229.06:39:02.00#ibcon#about to read 4, iclass 28, count 2 2006.229.06:39:02.00#ibcon#read 4, iclass 28, count 2 2006.229.06:39:02.00#ibcon#about to read 5, iclass 28, count 2 2006.229.06:39:02.00#ibcon#read 5, iclass 28, count 2 2006.229.06:39:02.00#ibcon#about to read 6, iclass 28, count 2 2006.229.06:39:02.00#ibcon#read 6, iclass 28, count 2 2006.229.06:39:02.00#ibcon#end of sib2, iclass 28, count 2 2006.229.06:39:02.00#ibcon#*after write, iclass 28, count 2 2006.229.06:39:02.00#ibcon#*before return 0, iclass 28, count 2 2006.229.06:39:02.00#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:39:02.00#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.06:39:02.00#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.06:39:02.00#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:02.00#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:39:02.12#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:39:02.12#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:39:02.12#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:39:02.12#ibcon#first serial, iclass 28, count 0 2006.229.06:39:02.12#ibcon#enter sib2, iclass 28, count 0 2006.229.06:39:02.12#ibcon#flushed, iclass 28, count 0 2006.229.06:39:02.12#ibcon#about to write, iclass 28, count 0 2006.229.06:39:02.12#ibcon#wrote, iclass 28, count 0 2006.229.06:39:02.12#ibcon#about to read 3, iclass 28, count 0 2006.229.06:39:02.14#ibcon#read 3, iclass 28, count 0 2006.229.06:39:02.14#ibcon#about to read 4, iclass 28, count 0 2006.229.06:39:02.14#ibcon#read 4, iclass 28, count 0 2006.229.06:39:02.14#ibcon#about to read 5, iclass 28, count 0 2006.229.06:39:02.14#ibcon#read 5, iclass 28, count 0 2006.229.06:39:02.14#ibcon#about to read 6, iclass 28, count 0 2006.229.06:39:02.14#ibcon#read 6, iclass 28, count 0 2006.229.06:39:02.14#ibcon#end of sib2, iclass 28, count 0 2006.229.06:39:02.14#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:39:02.14#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:39:02.14#ibcon#[27=USB\r\n] 2006.229.06:39:02.14#ibcon#*before write, iclass 28, count 0 2006.229.06:39:02.14#ibcon#enter sib2, iclass 28, count 0 2006.229.06:39:02.14#ibcon#flushed, iclass 28, count 0 2006.229.06:39:02.14#ibcon#about to write, iclass 28, count 0 2006.229.06:39:02.14#ibcon#wrote, iclass 28, count 0 2006.229.06:39:02.14#ibcon#about to read 3, iclass 28, count 0 2006.229.06:39:02.17#ibcon#read 3, iclass 28, count 0 2006.229.06:39:02.17#ibcon#about to read 4, iclass 28, count 0 2006.229.06:39:02.17#ibcon#read 4, iclass 28, count 0 2006.229.06:39:02.17#ibcon#about to read 5, iclass 28, count 0 2006.229.06:39:02.17#ibcon#read 5, iclass 28, count 0 2006.229.06:39:02.17#ibcon#about to read 6, iclass 28, count 0 2006.229.06:39:02.17#ibcon#read 6, iclass 28, count 0 2006.229.06:39:02.17#ibcon#end of sib2, iclass 28, count 0 2006.229.06:39:02.17#ibcon#*after write, iclass 28, count 0 2006.229.06:39:02.17#ibcon#*before return 0, iclass 28, count 0 2006.229.06:39:02.17#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:39:02.17#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.06:39:02.17#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:39:02.17#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:39:02.17$vck44/vblo=5,709.99 2006.229.06:39:02.17#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.06:39:02.17#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.06:39:02.17#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:02.17#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:39:02.17#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:39:02.17#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:39:02.17#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:39:02.17#ibcon#first serial, iclass 30, count 0 2006.229.06:39:02.17#ibcon#enter sib2, iclass 30, count 0 2006.229.06:39:02.17#ibcon#flushed, iclass 30, count 0 2006.229.06:39:02.17#ibcon#about to write, iclass 30, count 0 2006.229.06:39:02.17#ibcon#wrote, iclass 30, count 0 2006.229.06:39:02.17#ibcon#about to read 3, iclass 30, count 0 2006.229.06:39:02.19#ibcon#read 3, iclass 30, count 0 2006.229.06:39:02.19#ibcon#about to read 4, iclass 30, count 0 2006.229.06:39:02.19#ibcon#read 4, iclass 30, count 0 2006.229.06:39:02.19#ibcon#about to read 5, iclass 30, count 0 2006.229.06:39:02.19#ibcon#read 5, iclass 30, count 0 2006.229.06:39:02.19#ibcon#about to read 6, iclass 30, count 0 2006.229.06:39:02.19#ibcon#read 6, iclass 30, count 0 2006.229.06:39:02.19#ibcon#end of sib2, iclass 30, count 0 2006.229.06:39:02.19#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:39:02.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:39:02.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:39:02.19#ibcon#*before write, iclass 30, count 0 2006.229.06:39:02.19#ibcon#enter sib2, iclass 30, count 0 2006.229.06:39:02.19#ibcon#flushed, iclass 30, count 0 2006.229.06:39:02.19#ibcon#about to write, iclass 30, count 0 2006.229.06:39:02.19#ibcon#wrote, iclass 30, count 0 2006.229.06:39:02.19#ibcon#about to read 3, iclass 30, count 0 2006.229.06:39:02.23#ibcon#read 3, iclass 30, count 0 2006.229.06:39:02.23#ibcon#about to read 4, iclass 30, count 0 2006.229.06:39:02.23#ibcon#read 4, iclass 30, count 0 2006.229.06:39:02.23#ibcon#about to read 5, iclass 30, count 0 2006.229.06:39:02.23#ibcon#read 5, iclass 30, count 0 2006.229.06:39:02.23#ibcon#about to read 6, iclass 30, count 0 2006.229.06:39:02.23#ibcon#read 6, iclass 30, count 0 2006.229.06:39:02.23#ibcon#end of sib2, iclass 30, count 0 2006.229.06:39:02.23#ibcon#*after write, iclass 30, count 0 2006.229.06:39:02.23#ibcon#*before return 0, iclass 30, count 0 2006.229.06:39:02.23#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:39:02.23#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.06:39:02.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:39:02.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:39:02.23$vck44/vb=5,4 2006.229.06:39:02.23#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.06:39:02.23#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.06:39:02.23#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:02.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:39:02.29#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:39:02.29#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:39:02.29#ibcon#enter wrdev, iclass 32, count 2 2006.229.06:39:02.29#ibcon#first serial, iclass 32, count 2 2006.229.06:39:02.29#ibcon#enter sib2, iclass 32, count 2 2006.229.06:39:02.29#ibcon#flushed, iclass 32, count 2 2006.229.06:39:02.29#ibcon#about to write, iclass 32, count 2 2006.229.06:39:02.29#ibcon#wrote, iclass 32, count 2 2006.229.06:39:02.29#ibcon#about to read 3, iclass 32, count 2 2006.229.06:39:02.31#ibcon#read 3, iclass 32, count 2 2006.229.06:39:02.31#ibcon#about to read 4, iclass 32, count 2 2006.229.06:39:02.31#ibcon#read 4, iclass 32, count 2 2006.229.06:39:02.31#ibcon#about to read 5, iclass 32, count 2 2006.229.06:39:02.31#ibcon#read 5, iclass 32, count 2 2006.229.06:39:02.31#ibcon#about to read 6, iclass 32, count 2 2006.229.06:39:02.31#ibcon#read 6, iclass 32, count 2 2006.229.06:39:02.31#ibcon#end of sib2, iclass 32, count 2 2006.229.06:39:02.31#ibcon#*mode == 0, iclass 32, count 2 2006.229.06:39:02.31#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.06:39:02.31#ibcon#[27=AT05-04\r\n] 2006.229.06:39:02.31#ibcon#*before write, iclass 32, count 2 2006.229.06:39:02.31#ibcon#enter sib2, iclass 32, count 2 2006.229.06:39:02.31#ibcon#flushed, iclass 32, count 2 2006.229.06:39:02.31#ibcon#about to write, iclass 32, count 2 2006.229.06:39:02.31#ibcon#wrote, iclass 32, count 2 2006.229.06:39:02.31#ibcon#about to read 3, iclass 32, count 2 2006.229.06:39:02.34#ibcon#read 3, iclass 32, count 2 2006.229.06:39:02.34#ibcon#about to read 4, iclass 32, count 2 2006.229.06:39:02.34#ibcon#read 4, iclass 32, count 2 2006.229.06:39:02.34#ibcon#about to read 5, iclass 32, count 2 2006.229.06:39:02.34#ibcon#read 5, iclass 32, count 2 2006.229.06:39:02.34#ibcon#about to read 6, iclass 32, count 2 2006.229.06:39:02.34#ibcon#read 6, iclass 32, count 2 2006.229.06:39:02.34#ibcon#end of sib2, iclass 32, count 2 2006.229.06:39:02.34#ibcon#*after write, iclass 32, count 2 2006.229.06:39:02.34#ibcon#*before return 0, iclass 32, count 2 2006.229.06:39:02.34#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:39:02.34#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.06:39:02.34#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.06:39:02.34#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:02.34#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:39:02.46#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:39:02.46#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:39:02.46#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:39:02.46#ibcon#first serial, iclass 32, count 0 2006.229.06:39:02.46#ibcon#enter sib2, iclass 32, count 0 2006.229.06:39:02.46#ibcon#flushed, iclass 32, count 0 2006.229.06:39:02.46#ibcon#about to write, iclass 32, count 0 2006.229.06:39:02.46#ibcon#wrote, iclass 32, count 0 2006.229.06:39:02.46#ibcon#about to read 3, iclass 32, count 0 2006.229.06:39:02.48#ibcon#read 3, iclass 32, count 0 2006.229.06:39:02.48#ibcon#about to read 4, iclass 32, count 0 2006.229.06:39:02.48#ibcon#read 4, iclass 32, count 0 2006.229.06:39:02.48#ibcon#about to read 5, iclass 32, count 0 2006.229.06:39:02.48#ibcon#read 5, iclass 32, count 0 2006.229.06:39:02.48#ibcon#about to read 6, iclass 32, count 0 2006.229.06:39:02.48#ibcon#read 6, iclass 32, count 0 2006.229.06:39:02.48#ibcon#end of sib2, iclass 32, count 0 2006.229.06:39:02.48#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:39:02.48#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:39:02.48#ibcon#[27=USB\r\n] 2006.229.06:39:02.48#ibcon#*before write, iclass 32, count 0 2006.229.06:39:02.48#ibcon#enter sib2, iclass 32, count 0 2006.229.06:39:02.48#ibcon#flushed, iclass 32, count 0 2006.229.06:39:02.48#ibcon#about to write, iclass 32, count 0 2006.229.06:39:02.48#ibcon#wrote, iclass 32, count 0 2006.229.06:39:02.48#ibcon#about to read 3, iclass 32, count 0 2006.229.06:39:02.51#ibcon#read 3, iclass 32, count 0 2006.229.06:39:02.51#ibcon#about to read 4, iclass 32, count 0 2006.229.06:39:02.51#ibcon#read 4, iclass 32, count 0 2006.229.06:39:02.51#ibcon#about to read 5, iclass 32, count 0 2006.229.06:39:02.51#ibcon#read 5, iclass 32, count 0 2006.229.06:39:02.51#ibcon#about to read 6, iclass 32, count 0 2006.229.06:39:02.51#ibcon#read 6, iclass 32, count 0 2006.229.06:39:02.51#ibcon#end of sib2, iclass 32, count 0 2006.229.06:39:02.51#ibcon#*after write, iclass 32, count 0 2006.229.06:39:02.51#ibcon#*before return 0, iclass 32, count 0 2006.229.06:39:02.51#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:39:02.51#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.06:39:02.51#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:39:02.51#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:39:02.51$vck44/vblo=6,719.99 2006.229.06:39:02.51#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.06:39:02.51#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.06:39:02.51#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:02.51#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:39:02.51#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:39:02.51#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:39:02.51#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:39:02.51#ibcon#first serial, iclass 34, count 0 2006.229.06:39:02.51#ibcon#enter sib2, iclass 34, count 0 2006.229.06:39:02.51#ibcon#flushed, iclass 34, count 0 2006.229.06:39:02.51#ibcon#about to write, iclass 34, count 0 2006.229.06:39:02.51#ibcon#wrote, iclass 34, count 0 2006.229.06:39:02.51#ibcon#about to read 3, iclass 34, count 0 2006.229.06:39:02.53#ibcon#read 3, iclass 34, count 0 2006.229.06:39:02.53#ibcon#about to read 4, iclass 34, count 0 2006.229.06:39:02.53#ibcon#read 4, iclass 34, count 0 2006.229.06:39:02.53#ibcon#about to read 5, iclass 34, count 0 2006.229.06:39:02.53#ibcon#read 5, iclass 34, count 0 2006.229.06:39:02.53#ibcon#about to read 6, iclass 34, count 0 2006.229.06:39:02.53#ibcon#read 6, iclass 34, count 0 2006.229.06:39:02.53#ibcon#end of sib2, iclass 34, count 0 2006.229.06:39:02.53#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:39:02.53#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:39:02.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:39:02.53#ibcon#*before write, iclass 34, count 0 2006.229.06:39:02.53#ibcon#enter sib2, iclass 34, count 0 2006.229.06:39:02.53#ibcon#flushed, iclass 34, count 0 2006.229.06:39:02.53#ibcon#about to write, iclass 34, count 0 2006.229.06:39:02.53#ibcon#wrote, iclass 34, count 0 2006.229.06:39:02.53#ibcon#about to read 3, iclass 34, count 0 2006.229.06:39:02.57#ibcon#read 3, iclass 34, count 0 2006.229.06:39:02.57#ibcon#about to read 4, iclass 34, count 0 2006.229.06:39:02.57#ibcon#read 4, iclass 34, count 0 2006.229.06:39:02.57#ibcon#about to read 5, iclass 34, count 0 2006.229.06:39:02.57#ibcon#read 5, iclass 34, count 0 2006.229.06:39:02.57#ibcon#about to read 6, iclass 34, count 0 2006.229.06:39:02.57#ibcon#read 6, iclass 34, count 0 2006.229.06:39:02.57#ibcon#end of sib2, iclass 34, count 0 2006.229.06:39:02.57#ibcon#*after write, iclass 34, count 0 2006.229.06:39:02.57#ibcon#*before return 0, iclass 34, count 0 2006.229.06:39:02.57#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:39:02.57#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.06:39:02.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:39:02.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:39:02.57$vck44/vb=6,4 2006.229.06:39:02.57#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.06:39:02.57#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.06:39:02.57#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:02.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:39:02.63#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:39:02.63#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:39:02.63#ibcon#enter wrdev, iclass 36, count 2 2006.229.06:39:02.63#ibcon#first serial, iclass 36, count 2 2006.229.06:39:02.63#ibcon#enter sib2, iclass 36, count 2 2006.229.06:39:02.63#ibcon#flushed, iclass 36, count 2 2006.229.06:39:02.63#ibcon#about to write, iclass 36, count 2 2006.229.06:39:02.63#ibcon#wrote, iclass 36, count 2 2006.229.06:39:02.63#ibcon#about to read 3, iclass 36, count 2 2006.229.06:39:02.65#ibcon#read 3, iclass 36, count 2 2006.229.06:39:02.65#ibcon#about to read 4, iclass 36, count 2 2006.229.06:39:02.65#ibcon#read 4, iclass 36, count 2 2006.229.06:39:02.65#ibcon#about to read 5, iclass 36, count 2 2006.229.06:39:02.65#ibcon#read 5, iclass 36, count 2 2006.229.06:39:02.65#ibcon#about to read 6, iclass 36, count 2 2006.229.06:39:02.65#ibcon#read 6, iclass 36, count 2 2006.229.06:39:02.65#ibcon#end of sib2, iclass 36, count 2 2006.229.06:39:02.65#ibcon#*mode == 0, iclass 36, count 2 2006.229.06:39:02.65#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.06:39:02.65#ibcon#[27=AT06-04\r\n] 2006.229.06:39:02.65#ibcon#*before write, iclass 36, count 2 2006.229.06:39:02.65#ibcon#enter sib2, iclass 36, count 2 2006.229.06:39:02.65#ibcon#flushed, iclass 36, count 2 2006.229.06:39:02.65#ibcon#about to write, iclass 36, count 2 2006.229.06:39:02.65#ibcon#wrote, iclass 36, count 2 2006.229.06:39:02.65#ibcon#about to read 3, iclass 36, count 2 2006.229.06:39:02.68#ibcon#read 3, iclass 36, count 2 2006.229.06:39:02.68#ibcon#about to read 4, iclass 36, count 2 2006.229.06:39:02.68#ibcon#read 4, iclass 36, count 2 2006.229.06:39:02.68#ibcon#about to read 5, iclass 36, count 2 2006.229.06:39:02.68#ibcon#read 5, iclass 36, count 2 2006.229.06:39:02.68#ibcon#about to read 6, iclass 36, count 2 2006.229.06:39:02.68#ibcon#read 6, iclass 36, count 2 2006.229.06:39:02.68#ibcon#end of sib2, iclass 36, count 2 2006.229.06:39:02.68#ibcon#*after write, iclass 36, count 2 2006.229.06:39:02.68#ibcon#*before return 0, iclass 36, count 2 2006.229.06:39:02.68#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:39:02.68#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.06:39:02.68#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.06:39:02.68#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:02.68#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:39:02.80#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:39:02.80#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:39:02.80#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:39:02.80#ibcon#first serial, iclass 36, count 0 2006.229.06:39:02.80#ibcon#enter sib2, iclass 36, count 0 2006.229.06:39:02.80#ibcon#flushed, iclass 36, count 0 2006.229.06:39:02.80#ibcon#about to write, iclass 36, count 0 2006.229.06:39:02.80#ibcon#wrote, iclass 36, count 0 2006.229.06:39:02.80#ibcon#about to read 3, iclass 36, count 0 2006.229.06:39:02.82#ibcon#read 3, iclass 36, count 0 2006.229.06:39:02.82#ibcon#about to read 4, iclass 36, count 0 2006.229.06:39:02.82#ibcon#read 4, iclass 36, count 0 2006.229.06:39:02.82#ibcon#about to read 5, iclass 36, count 0 2006.229.06:39:02.82#ibcon#read 5, iclass 36, count 0 2006.229.06:39:02.82#ibcon#about to read 6, iclass 36, count 0 2006.229.06:39:02.82#ibcon#read 6, iclass 36, count 0 2006.229.06:39:02.82#ibcon#end of sib2, iclass 36, count 0 2006.229.06:39:02.82#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:39:02.82#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:39:02.82#ibcon#[27=USB\r\n] 2006.229.06:39:02.82#ibcon#*before write, iclass 36, count 0 2006.229.06:39:02.82#ibcon#enter sib2, iclass 36, count 0 2006.229.06:39:02.82#ibcon#flushed, iclass 36, count 0 2006.229.06:39:02.82#ibcon#about to write, iclass 36, count 0 2006.229.06:39:02.82#ibcon#wrote, iclass 36, count 0 2006.229.06:39:02.82#ibcon#about to read 3, iclass 36, count 0 2006.229.06:39:02.85#ibcon#read 3, iclass 36, count 0 2006.229.06:39:02.85#ibcon#about to read 4, iclass 36, count 0 2006.229.06:39:02.85#ibcon#read 4, iclass 36, count 0 2006.229.06:39:02.85#ibcon#about to read 5, iclass 36, count 0 2006.229.06:39:02.85#ibcon#read 5, iclass 36, count 0 2006.229.06:39:02.85#ibcon#about to read 6, iclass 36, count 0 2006.229.06:39:02.85#ibcon#read 6, iclass 36, count 0 2006.229.06:39:02.85#ibcon#end of sib2, iclass 36, count 0 2006.229.06:39:02.85#ibcon#*after write, iclass 36, count 0 2006.229.06:39:02.85#ibcon#*before return 0, iclass 36, count 0 2006.229.06:39:02.85#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:39:02.85#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.06:39:02.85#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:39:02.85#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:39:02.85$vck44/vblo=7,734.99 2006.229.06:39:02.85#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.06:39:02.85#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.06:39:02.85#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:02.85#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:39:02.85#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:39:02.85#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:39:02.85#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:39:02.85#ibcon#first serial, iclass 38, count 0 2006.229.06:39:02.85#ibcon#enter sib2, iclass 38, count 0 2006.229.06:39:02.85#ibcon#flushed, iclass 38, count 0 2006.229.06:39:02.85#ibcon#about to write, iclass 38, count 0 2006.229.06:39:02.85#ibcon#wrote, iclass 38, count 0 2006.229.06:39:02.85#ibcon#about to read 3, iclass 38, count 0 2006.229.06:39:02.87#ibcon#read 3, iclass 38, count 0 2006.229.06:39:02.87#ibcon#about to read 4, iclass 38, count 0 2006.229.06:39:02.87#ibcon#read 4, iclass 38, count 0 2006.229.06:39:02.87#ibcon#about to read 5, iclass 38, count 0 2006.229.06:39:02.87#ibcon#read 5, iclass 38, count 0 2006.229.06:39:02.87#ibcon#about to read 6, iclass 38, count 0 2006.229.06:39:02.87#ibcon#read 6, iclass 38, count 0 2006.229.06:39:02.87#ibcon#end of sib2, iclass 38, count 0 2006.229.06:39:02.87#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:39:02.87#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:39:02.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:39:02.87#ibcon#*before write, iclass 38, count 0 2006.229.06:39:02.87#ibcon#enter sib2, iclass 38, count 0 2006.229.06:39:02.87#ibcon#flushed, iclass 38, count 0 2006.229.06:39:02.87#ibcon#about to write, iclass 38, count 0 2006.229.06:39:02.87#ibcon#wrote, iclass 38, count 0 2006.229.06:39:02.87#ibcon#about to read 3, iclass 38, count 0 2006.229.06:39:02.91#ibcon#read 3, iclass 38, count 0 2006.229.06:39:02.91#ibcon#about to read 4, iclass 38, count 0 2006.229.06:39:02.91#ibcon#read 4, iclass 38, count 0 2006.229.06:39:02.91#ibcon#about to read 5, iclass 38, count 0 2006.229.06:39:02.91#ibcon#read 5, iclass 38, count 0 2006.229.06:39:02.91#ibcon#about to read 6, iclass 38, count 0 2006.229.06:39:02.91#ibcon#read 6, iclass 38, count 0 2006.229.06:39:02.91#ibcon#end of sib2, iclass 38, count 0 2006.229.06:39:02.91#ibcon#*after write, iclass 38, count 0 2006.229.06:39:02.91#ibcon#*before return 0, iclass 38, count 0 2006.229.06:39:02.91#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:39:02.91#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:39:02.91#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:39:02.91#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:39:02.91$vck44/vb=7,4 2006.229.06:39:02.91#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.06:39:02.91#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.06:39:02.91#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:02.91#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:02.97#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:02.97#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:02.97#ibcon#enter wrdev, iclass 40, count 2 2006.229.06:39:02.97#ibcon#first serial, iclass 40, count 2 2006.229.06:39:02.97#ibcon#enter sib2, iclass 40, count 2 2006.229.06:39:02.97#ibcon#flushed, iclass 40, count 2 2006.229.06:39:02.97#ibcon#about to write, iclass 40, count 2 2006.229.06:39:02.97#ibcon#wrote, iclass 40, count 2 2006.229.06:39:02.97#ibcon#about to read 3, iclass 40, count 2 2006.229.06:39:02.99#ibcon#read 3, iclass 40, count 2 2006.229.06:39:02.99#ibcon#about to read 4, iclass 40, count 2 2006.229.06:39:02.99#ibcon#read 4, iclass 40, count 2 2006.229.06:39:02.99#ibcon#about to read 5, iclass 40, count 2 2006.229.06:39:02.99#ibcon#read 5, iclass 40, count 2 2006.229.06:39:02.99#ibcon#about to read 6, iclass 40, count 2 2006.229.06:39:02.99#ibcon#read 6, iclass 40, count 2 2006.229.06:39:02.99#ibcon#end of sib2, iclass 40, count 2 2006.229.06:39:02.99#ibcon#*mode == 0, iclass 40, count 2 2006.229.06:39:02.99#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.06:39:02.99#ibcon#[27=AT07-04\r\n] 2006.229.06:39:02.99#ibcon#*before write, iclass 40, count 2 2006.229.06:39:02.99#ibcon#enter sib2, iclass 40, count 2 2006.229.06:39:02.99#ibcon#flushed, iclass 40, count 2 2006.229.06:39:02.99#ibcon#about to write, iclass 40, count 2 2006.229.06:39:02.99#ibcon#wrote, iclass 40, count 2 2006.229.06:39:02.99#ibcon#about to read 3, iclass 40, count 2 2006.229.06:39:03.02#ibcon#read 3, iclass 40, count 2 2006.229.06:39:03.02#ibcon#about to read 4, iclass 40, count 2 2006.229.06:39:03.02#ibcon#read 4, iclass 40, count 2 2006.229.06:39:03.02#ibcon#about to read 5, iclass 40, count 2 2006.229.06:39:03.02#ibcon#read 5, iclass 40, count 2 2006.229.06:39:03.02#ibcon#about to read 6, iclass 40, count 2 2006.229.06:39:03.02#ibcon#read 6, iclass 40, count 2 2006.229.06:39:03.02#ibcon#end of sib2, iclass 40, count 2 2006.229.06:39:03.02#ibcon#*after write, iclass 40, count 2 2006.229.06:39:03.02#ibcon#*before return 0, iclass 40, count 2 2006.229.06:39:03.02#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:03.02#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.06:39:03.02#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.06:39:03.02#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:03.02#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:03.14#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:03.14#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:03.14#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:39:03.14#ibcon#first serial, iclass 40, count 0 2006.229.06:39:03.14#ibcon#enter sib2, iclass 40, count 0 2006.229.06:39:03.14#ibcon#flushed, iclass 40, count 0 2006.229.06:39:03.14#ibcon#about to write, iclass 40, count 0 2006.229.06:39:03.14#ibcon#wrote, iclass 40, count 0 2006.229.06:39:03.14#ibcon#about to read 3, iclass 40, count 0 2006.229.06:39:03.16#ibcon#read 3, iclass 40, count 0 2006.229.06:39:03.16#ibcon#about to read 4, iclass 40, count 0 2006.229.06:39:03.16#ibcon#read 4, iclass 40, count 0 2006.229.06:39:03.16#ibcon#about to read 5, iclass 40, count 0 2006.229.06:39:03.16#ibcon#read 5, iclass 40, count 0 2006.229.06:39:03.16#ibcon#about to read 6, iclass 40, count 0 2006.229.06:39:03.16#ibcon#read 6, iclass 40, count 0 2006.229.06:39:03.16#ibcon#end of sib2, iclass 40, count 0 2006.229.06:39:03.16#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:39:03.16#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:39:03.16#ibcon#[27=USB\r\n] 2006.229.06:39:03.16#ibcon#*before write, iclass 40, count 0 2006.229.06:39:03.16#ibcon#enter sib2, iclass 40, count 0 2006.229.06:39:03.16#ibcon#flushed, iclass 40, count 0 2006.229.06:39:03.16#ibcon#about to write, iclass 40, count 0 2006.229.06:39:03.16#ibcon#wrote, iclass 40, count 0 2006.229.06:39:03.16#ibcon#about to read 3, iclass 40, count 0 2006.229.06:39:03.19#ibcon#read 3, iclass 40, count 0 2006.229.06:39:03.19#ibcon#about to read 4, iclass 40, count 0 2006.229.06:39:03.19#ibcon#read 4, iclass 40, count 0 2006.229.06:39:03.19#ibcon#about to read 5, iclass 40, count 0 2006.229.06:39:03.19#ibcon#read 5, iclass 40, count 0 2006.229.06:39:03.19#ibcon#about to read 6, iclass 40, count 0 2006.229.06:39:03.19#ibcon#read 6, iclass 40, count 0 2006.229.06:39:03.19#ibcon#end of sib2, iclass 40, count 0 2006.229.06:39:03.19#ibcon#*after write, iclass 40, count 0 2006.229.06:39:03.19#ibcon#*before return 0, iclass 40, count 0 2006.229.06:39:03.19#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:03.19#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.06:39:03.19#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:39:03.19#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:39:03.19$vck44/vblo=8,744.99 2006.229.06:39:03.19#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.06:39:03.19#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.06:39:03.19#ibcon#ireg 17 cls_cnt 0 2006.229.06:39:03.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:03.19#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:03.19#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:03.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:39:03.19#ibcon#first serial, iclass 4, count 0 2006.229.06:39:03.19#ibcon#enter sib2, iclass 4, count 0 2006.229.06:39:03.19#ibcon#flushed, iclass 4, count 0 2006.229.06:39:03.19#ibcon#about to write, iclass 4, count 0 2006.229.06:39:03.19#ibcon#wrote, iclass 4, count 0 2006.229.06:39:03.19#ibcon#about to read 3, iclass 4, count 0 2006.229.06:39:03.21#ibcon#read 3, iclass 4, count 0 2006.229.06:39:03.21#ibcon#about to read 4, iclass 4, count 0 2006.229.06:39:03.21#ibcon#read 4, iclass 4, count 0 2006.229.06:39:03.21#ibcon#about to read 5, iclass 4, count 0 2006.229.06:39:03.21#ibcon#read 5, iclass 4, count 0 2006.229.06:39:03.21#ibcon#about to read 6, iclass 4, count 0 2006.229.06:39:03.21#ibcon#read 6, iclass 4, count 0 2006.229.06:39:03.21#ibcon#end of sib2, iclass 4, count 0 2006.229.06:39:03.21#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:39:03.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:39:03.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:39:03.21#ibcon#*before write, iclass 4, count 0 2006.229.06:39:03.21#ibcon#enter sib2, iclass 4, count 0 2006.229.06:39:03.21#ibcon#flushed, iclass 4, count 0 2006.229.06:39:03.21#ibcon#about to write, iclass 4, count 0 2006.229.06:39:03.21#ibcon#wrote, iclass 4, count 0 2006.229.06:39:03.21#ibcon#about to read 3, iclass 4, count 0 2006.229.06:39:03.25#ibcon#read 3, iclass 4, count 0 2006.229.06:39:03.25#ibcon#about to read 4, iclass 4, count 0 2006.229.06:39:03.25#ibcon#read 4, iclass 4, count 0 2006.229.06:39:03.25#ibcon#about to read 5, iclass 4, count 0 2006.229.06:39:03.25#ibcon#read 5, iclass 4, count 0 2006.229.06:39:03.25#ibcon#about to read 6, iclass 4, count 0 2006.229.06:39:03.25#ibcon#read 6, iclass 4, count 0 2006.229.06:39:03.25#ibcon#end of sib2, iclass 4, count 0 2006.229.06:39:03.25#ibcon#*after write, iclass 4, count 0 2006.229.06:39:03.25#ibcon#*before return 0, iclass 4, count 0 2006.229.06:39:03.25#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:03.25#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.06:39:03.25#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:39:03.25#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:39:03.25$vck44/vb=8,4 2006.229.06:39:03.25#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.06:39:03.25#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.06:39:03.25#ibcon#ireg 11 cls_cnt 2 2006.229.06:39:03.25#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:03.31#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:03.31#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:03.31#ibcon#enter wrdev, iclass 6, count 2 2006.229.06:39:03.31#ibcon#first serial, iclass 6, count 2 2006.229.06:39:03.31#ibcon#enter sib2, iclass 6, count 2 2006.229.06:39:03.31#ibcon#flushed, iclass 6, count 2 2006.229.06:39:03.31#ibcon#about to write, iclass 6, count 2 2006.229.06:39:03.31#ibcon#wrote, iclass 6, count 2 2006.229.06:39:03.31#ibcon#about to read 3, iclass 6, count 2 2006.229.06:39:03.33#ibcon#read 3, iclass 6, count 2 2006.229.06:39:03.33#ibcon#about to read 4, iclass 6, count 2 2006.229.06:39:03.33#ibcon#read 4, iclass 6, count 2 2006.229.06:39:03.33#ibcon#about to read 5, iclass 6, count 2 2006.229.06:39:03.33#ibcon#read 5, iclass 6, count 2 2006.229.06:39:03.33#ibcon#about to read 6, iclass 6, count 2 2006.229.06:39:03.33#ibcon#read 6, iclass 6, count 2 2006.229.06:39:03.33#ibcon#end of sib2, iclass 6, count 2 2006.229.06:39:03.33#ibcon#*mode == 0, iclass 6, count 2 2006.229.06:39:03.33#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.06:39:03.33#ibcon#[27=AT08-04\r\n] 2006.229.06:39:03.33#ibcon#*before write, iclass 6, count 2 2006.229.06:39:03.33#ibcon#enter sib2, iclass 6, count 2 2006.229.06:39:03.33#ibcon#flushed, iclass 6, count 2 2006.229.06:39:03.33#ibcon#about to write, iclass 6, count 2 2006.229.06:39:03.33#ibcon#wrote, iclass 6, count 2 2006.229.06:39:03.33#ibcon#about to read 3, iclass 6, count 2 2006.229.06:39:03.36#ibcon#read 3, iclass 6, count 2 2006.229.06:39:03.36#ibcon#about to read 4, iclass 6, count 2 2006.229.06:39:03.36#ibcon#read 4, iclass 6, count 2 2006.229.06:39:03.36#ibcon#about to read 5, iclass 6, count 2 2006.229.06:39:03.36#ibcon#read 5, iclass 6, count 2 2006.229.06:39:03.36#ibcon#about to read 6, iclass 6, count 2 2006.229.06:39:03.36#ibcon#read 6, iclass 6, count 2 2006.229.06:39:03.36#ibcon#end of sib2, iclass 6, count 2 2006.229.06:39:03.36#ibcon#*after write, iclass 6, count 2 2006.229.06:39:03.36#ibcon#*before return 0, iclass 6, count 2 2006.229.06:39:03.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:03.36#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.06:39:03.36#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.06:39:03.36#ibcon#ireg 7 cls_cnt 0 2006.229.06:39:03.36#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:03.48#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:03.48#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:03.48#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:39:03.48#ibcon#first serial, iclass 6, count 0 2006.229.06:39:03.48#ibcon#enter sib2, iclass 6, count 0 2006.229.06:39:03.48#ibcon#flushed, iclass 6, count 0 2006.229.06:39:03.48#ibcon#about to write, iclass 6, count 0 2006.229.06:39:03.48#ibcon#wrote, iclass 6, count 0 2006.229.06:39:03.48#ibcon#about to read 3, iclass 6, count 0 2006.229.06:39:03.50#ibcon#read 3, iclass 6, count 0 2006.229.06:39:03.50#ibcon#about to read 4, iclass 6, count 0 2006.229.06:39:03.50#ibcon#read 4, iclass 6, count 0 2006.229.06:39:03.50#ibcon#about to read 5, iclass 6, count 0 2006.229.06:39:03.50#ibcon#read 5, iclass 6, count 0 2006.229.06:39:03.50#ibcon#about to read 6, iclass 6, count 0 2006.229.06:39:03.50#ibcon#read 6, iclass 6, count 0 2006.229.06:39:03.50#ibcon#end of sib2, iclass 6, count 0 2006.229.06:39:03.50#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:39:03.50#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:39:03.50#ibcon#[27=USB\r\n] 2006.229.06:39:03.50#ibcon#*before write, iclass 6, count 0 2006.229.06:39:03.50#ibcon#enter sib2, iclass 6, count 0 2006.229.06:39:03.50#ibcon#flushed, iclass 6, count 0 2006.229.06:39:03.50#ibcon#about to write, iclass 6, count 0 2006.229.06:39:03.50#ibcon#wrote, iclass 6, count 0 2006.229.06:39:03.50#ibcon#about to read 3, iclass 6, count 0 2006.229.06:39:03.53#ibcon#read 3, iclass 6, count 0 2006.229.06:39:03.53#ibcon#about to read 4, iclass 6, count 0 2006.229.06:39:03.53#ibcon#read 4, iclass 6, count 0 2006.229.06:39:03.53#ibcon#about to read 5, iclass 6, count 0 2006.229.06:39:03.53#ibcon#read 5, iclass 6, count 0 2006.229.06:39:03.53#ibcon#about to read 6, iclass 6, count 0 2006.229.06:39:03.53#ibcon#read 6, iclass 6, count 0 2006.229.06:39:03.53#ibcon#end of sib2, iclass 6, count 0 2006.229.06:39:03.53#ibcon#*after write, iclass 6, count 0 2006.229.06:39:03.53#ibcon#*before return 0, iclass 6, count 0 2006.229.06:39:03.53#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:03.53#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.06:39:03.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:39:03.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:39:03.53$vck44/vabw=wide 2006.229.06:39:03.53#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.06:39:03.53#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.06:39:03.53#ibcon#ireg 8 cls_cnt 0 2006.229.06:39:03.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:03.53#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:03.53#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:03.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:39:03.53#ibcon#first serial, iclass 10, count 0 2006.229.06:39:03.53#ibcon#enter sib2, iclass 10, count 0 2006.229.06:39:03.53#ibcon#flushed, iclass 10, count 0 2006.229.06:39:03.53#ibcon#about to write, iclass 10, count 0 2006.229.06:39:03.53#ibcon#wrote, iclass 10, count 0 2006.229.06:39:03.53#ibcon#about to read 3, iclass 10, count 0 2006.229.06:39:03.55#ibcon#read 3, iclass 10, count 0 2006.229.06:39:03.55#ibcon#about to read 4, iclass 10, count 0 2006.229.06:39:03.55#ibcon#read 4, iclass 10, count 0 2006.229.06:39:03.55#ibcon#about to read 5, iclass 10, count 0 2006.229.06:39:03.55#ibcon#read 5, iclass 10, count 0 2006.229.06:39:03.55#ibcon#about to read 6, iclass 10, count 0 2006.229.06:39:03.55#ibcon#read 6, iclass 10, count 0 2006.229.06:39:03.55#ibcon#end of sib2, iclass 10, count 0 2006.229.06:39:03.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:39:03.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:39:03.55#ibcon#[25=BW32\r\n] 2006.229.06:39:03.55#ibcon#*before write, iclass 10, count 0 2006.229.06:39:03.55#ibcon#enter sib2, iclass 10, count 0 2006.229.06:39:03.55#ibcon#flushed, iclass 10, count 0 2006.229.06:39:03.55#ibcon#about to write, iclass 10, count 0 2006.229.06:39:03.55#ibcon#wrote, iclass 10, count 0 2006.229.06:39:03.55#ibcon#about to read 3, iclass 10, count 0 2006.229.06:39:03.58#ibcon#read 3, iclass 10, count 0 2006.229.06:39:03.58#ibcon#about to read 4, iclass 10, count 0 2006.229.06:39:03.58#ibcon#read 4, iclass 10, count 0 2006.229.06:39:03.58#ibcon#about to read 5, iclass 10, count 0 2006.229.06:39:03.58#ibcon#read 5, iclass 10, count 0 2006.229.06:39:03.58#ibcon#about to read 6, iclass 10, count 0 2006.229.06:39:03.58#ibcon#read 6, iclass 10, count 0 2006.229.06:39:03.58#ibcon#end of sib2, iclass 10, count 0 2006.229.06:39:03.58#ibcon#*after write, iclass 10, count 0 2006.229.06:39:03.58#ibcon#*before return 0, iclass 10, count 0 2006.229.06:39:03.58#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:03.58#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.06:39:03.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:39:03.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:39:03.58$vck44/vbbw=wide 2006.229.06:39:03.58#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.06:39:03.58#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.06:39:03.58#ibcon#ireg 8 cls_cnt 0 2006.229.06:39:03.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:39:03.65#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:39:03.65#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:39:03.65#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:39:03.65#ibcon#first serial, iclass 12, count 0 2006.229.06:39:03.65#ibcon#enter sib2, iclass 12, count 0 2006.229.06:39:03.65#ibcon#flushed, iclass 12, count 0 2006.229.06:39:03.65#ibcon#about to write, iclass 12, count 0 2006.229.06:39:03.65#ibcon#wrote, iclass 12, count 0 2006.229.06:39:03.65#ibcon#about to read 3, iclass 12, count 0 2006.229.06:39:03.67#ibcon#read 3, iclass 12, count 0 2006.229.06:39:03.67#ibcon#about to read 4, iclass 12, count 0 2006.229.06:39:03.67#ibcon#read 4, iclass 12, count 0 2006.229.06:39:03.67#ibcon#about to read 5, iclass 12, count 0 2006.229.06:39:03.67#ibcon#read 5, iclass 12, count 0 2006.229.06:39:03.67#ibcon#about to read 6, iclass 12, count 0 2006.229.06:39:03.67#ibcon#read 6, iclass 12, count 0 2006.229.06:39:03.67#ibcon#end of sib2, iclass 12, count 0 2006.229.06:39:03.67#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:39:03.67#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:39:03.67#ibcon#[27=BW32\r\n] 2006.229.06:39:03.67#ibcon#*before write, iclass 12, count 0 2006.229.06:39:03.67#ibcon#enter sib2, iclass 12, count 0 2006.229.06:39:03.67#ibcon#flushed, iclass 12, count 0 2006.229.06:39:03.67#ibcon#about to write, iclass 12, count 0 2006.229.06:39:03.67#ibcon#wrote, iclass 12, count 0 2006.229.06:39:03.67#ibcon#about to read 3, iclass 12, count 0 2006.229.06:39:03.70#ibcon#read 3, iclass 12, count 0 2006.229.06:39:03.70#ibcon#about to read 4, iclass 12, count 0 2006.229.06:39:03.70#ibcon#read 4, iclass 12, count 0 2006.229.06:39:03.70#ibcon#about to read 5, iclass 12, count 0 2006.229.06:39:03.70#ibcon#read 5, iclass 12, count 0 2006.229.06:39:03.70#ibcon#about to read 6, iclass 12, count 0 2006.229.06:39:03.70#ibcon#read 6, iclass 12, count 0 2006.229.06:39:03.70#ibcon#end of sib2, iclass 12, count 0 2006.229.06:39:03.70#ibcon#*after write, iclass 12, count 0 2006.229.06:39:03.70#ibcon#*before return 0, iclass 12, count 0 2006.229.06:39:03.70#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:39:03.70#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:39:03.70#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:39:03.70#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:39:03.70$setupk4/ifdk4 2006.229.06:39:03.70$ifdk4/lo= 2006.229.06:39:03.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:39:03.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:39:03.70$ifdk4/patch= 2006.229.06:39:03.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:39:03.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:39:03.70$setupk4/!*+20s 2006.229.06:39:08.85#abcon#<5=/05 2.6 4.7 30.28 92 999.7\r\n> 2006.229.06:39:08.87#abcon#{5=INTERFACE CLEAR} 2006.229.06:39:08.93#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:39:15.14#trakl#Source acquired 2006.229.06:39:17.14#flagr#flagr/antenna,acquired 2006.229.06:39:18.20$setupk4/"tpicd 2006.229.06:39:18.20$setupk4/echo=off 2006.229.06:39:18.20$setupk4/xlog=off 2006.229.06:39:18.20:!2006.229.06:42:34 2006.229.06:42:34.00:preob 2006.229.06:42:34.13/onsource/TRACKING 2006.229.06:42:34.13:!2006.229.06:42:44 2006.229.06:42:44.00:"tape 2006.229.06:42:44.00:"st=record 2006.229.06:42:44.00:data_valid=on 2006.229.06:42:44.00:midob 2006.229.06:42:44.14/onsource/TRACKING 2006.229.06:42:44.14/wx/30.25,999.7,92 2006.229.06:42:44.22/cable/+6.3977E-03 2006.229.06:42:45.31/va/01,08,usb,yes,29,32 2006.229.06:42:45.31/va/02,07,usb,yes,32,32 2006.229.06:42:45.31/va/03,06,usb,yes,39,42 2006.229.06:42:45.31/va/04,07,usb,yes,33,34 2006.229.06:42:45.31/va/05,04,usb,yes,29,30 2006.229.06:42:45.31/va/06,04,usb,yes,33,32 2006.229.06:42:45.31/va/07,05,usb,yes,29,30 2006.229.06:42:45.31/va/08,06,usb,yes,21,26 2006.229.06:42:45.54/valo/01,524.99,yes,locked 2006.229.06:42:45.54/valo/02,534.99,yes,locked 2006.229.06:42:45.54/valo/03,564.99,yes,locked 2006.229.06:42:45.54/valo/04,624.99,yes,locked 2006.229.06:42:45.54/valo/05,734.99,yes,locked 2006.229.06:42:45.54/valo/06,814.99,yes,locked 2006.229.06:42:45.54/valo/07,864.99,yes,locked 2006.229.06:42:45.54/valo/08,884.99,yes,locked 2006.229.06:42:46.63/vb/01,04,usb,yes,31,29 2006.229.06:42:46.63/vb/02,04,usb,yes,33,33 2006.229.06:42:46.63/vb/03,04,usb,yes,30,33 2006.229.06:42:46.63/vb/04,04,usb,yes,35,34 2006.229.06:42:46.63/vb/05,04,usb,yes,27,29 2006.229.06:42:46.63/vb/06,04,usb,yes,31,28 2006.229.06:42:46.63/vb/07,04,usb,yes,31,31 2006.229.06:42:46.63/vb/08,04,usb,yes,29,32 2006.229.06:42:46.87/vblo/01,629.99,yes,locked 2006.229.06:42:46.87/vblo/02,634.99,yes,locked 2006.229.06:42:46.87/vblo/03,649.99,yes,locked 2006.229.06:42:46.87/vblo/04,679.99,yes,locked 2006.229.06:42:46.87/vblo/05,709.99,yes,locked 2006.229.06:42:46.87/vblo/06,719.99,yes,locked 2006.229.06:42:46.87/vblo/07,734.99,yes,locked 2006.229.06:42:46.87/vblo/08,744.99,yes,locked 2006.229.06:42:47.02/vabw/8 2006.229.06:42:47.17/vbbw/8 2006.229.06:42:47.26/xfe/off,on,12.0 2006.229.06:42:47.63/ifatt/23,28,28,28 2006.229.06:42:48.08/fmout-gps/S +4.57E-07 2006.229.06:42:48.12:!2006.229.06:45:44 2006.229.06:45:44.01:data_valid=off 2006.229.06:45:44.01:"et 2006.229.06:45:44.01:!+3s 2006.229.06:45:47.02:"tape 2006.229.06:45:47.02:postob 2006.229.06:45:47.19/cable/+6.3971E-03 2006.229.06:45:47.19/wx/30.22,999.7,92 2006.229.06:45:48.08/fmout-gps/S +4.56E-07 2006.229.06:45:48.08:scan_name=229-0648,jd0608,40 2006.229.06:45:48.08:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.06:45:48.14#flagr#flagr/antenna,new-source 2006.229.06:45:49.14:checkk5 2006.229.06:45:49.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:45:49.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:45:50.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:45:50.68/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:45:51.08/chk_obsdata//k5ts1/T2290642??a.dat file size is correct (nominal:720MB, actual:720MB). 2006.229.06:45:51.49/chk_obsdata//k5ts2/T2290642??b.dat file size is correct (nominal:720MB, actual:720MB). 2006.229.06:45:51.89/chk_obsdata//k5ts3/T2290642??c.dat file size is correct (nominal:720MB, actual:720MB). 2006.229.06:45:52.30/chk_obsdata//k5ts4/T2290642??d.dat file size is correct (nominal:720MB, actual:720MB). 2006.229.06:45:53.01/k5log//k5ts1_log_newline 2006.229.06:45:53.70/k5log//k5ts2_log_newline 2006.229.06:45:54.40/k5log//k5ts3_log_newline 2006.229.06:45:55.10/k5log//k5ts4_log_newline 2006.229.06:45:55.13/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:45:55.13:setupk4=1 2006.229.06:45:55.13$setupk4/echo=on 2006.229.06:45:55.13$setupk4/pcalon 2006.229.06:45:55.13$pcalon/"no phase cal control is implemented here 2006.229.06:45:55.13$setupk4/"tpicd=stop 2006.229.06:45:55.13$setupk4/"rec=synch_on 2006.229.06:45:55.13$setupk4/"rec_mode=128 2006.229.06:45:55.13$setupk4/!* 2006.229.06:45:55.13$setupk4/recpk4 2006.229.06:45:55.13$recpk4/recpatch= 2006.229.06:45:55.13$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:45:55.13$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:45:55.14$setupk4/vck44 2006.229.06:45:55.14$vck44/valo=1,524.99 2006.229.06:45:55.14#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.06:45:55.14#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.06:45:55.14#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:55.14#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:55.14#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:55.14#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:55.14#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:45:55.14#ibcon#first serial, iclass 33, count 0 2006.229.06:45:55.14#ibcon#enter sib2, iclass 33, count 0 2006.229.06:45:55.14#ibcon#flushed, iclass 33, count 0 2006.229.06:45:55.14#ibcon#about to write, iclass 33, count 0 2006.229.06:45:55.14#ibcon#wrote, iclass 33, count 0 2006.229.06:45:55.14#ibcon#about to read 3, iclass 33, count 0 2006.229.06:45:55.16#ibcon#read 3, iclass 33, count 0 2006.229.06:45:55.16#ibcon#about to read 4, iclass 33, count 0 2006.229.06:45:55.16#ibcon#read 4, iclass 33, count 0 2006.229.06:45:55.16#ibcon#about to read 5, iclass 33, count 0 2006.229.06:45:55.16#ibcon#read 5, iclass 33, count 0 2006.229.06:45:55.16#ibcon#about to read 6, iclass 33, count 0 2006.229.06:45:55.16#ibcon#read 6, iclass 33, count 0 2006.229.06:45:55.16#ibcon#end of sib2, iclass 33, count 0 2006.229.06:45:55.16#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:45:55.16#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:45:55.16#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:45:55.16#ibcon#*before write, iclass 33, count 0 2006.229.06:45:55.16#ibcon#enter sib2, iclass 33, count 0 2006.229.06:45:55.16#ibcon#flushed, iclass 33, count 0 2006.229.06:45:55.16#ibcon#about to write, iclass 33, count 0 2006.229.06:45:55.16#ibcon#wrote, iclass 33, count 0 2006.229.06:45:55.16#ibcon#about to read 3, iclass 33, count 0 2006.229.06:45:55.21#ibcon#read 3, iclass 33, count 0 2006.229.06:45:55.21#ibcon#about to read 4, iclass 33, count 0 2006.229.06:45:55.21#ibcon#read 4, iclass 33, count 0 2006.229.06:45:55.21#ibcon#about to read 5, iclass 33, count 0 2006.229.06:45:55.21#ibcon#read 5, iclass 33, count 0 2006.229.06:45:55.21#ibcon#about to read 6, iclass 33, count 0 2006.229.06:45:55.21#ibcon#read 6, iclass 33, count 0 2006.229.06:45:55.21#ibcon#end of sib2, iclass 33, count 0 2006.229.06:45:55.21#ibcon#*after write, iclass 33, count 0 2006.229.06:45:55.21#ibcon#*before return 0, iclass 33, count 0 2006.229.06:45:55.21#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:55.21#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:55.21#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:45:55.21#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:45:55.22$vck44/va=1,8 2006.229.06:45:55.22#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.06:45:55.22#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.06:45:55.22#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:55.22#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:55.22#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:55.22#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:55.22#ibcon#enter wrdev, iclass 35, count 2 2006.229.06:45:55.22#ibcon#first serial, iclass 35, count 2 2006.229.06:45:55.22#ibcon#enter sib2, iclass 35, count 2 2006.229.06:45:55.22#ibcon#flushed, iclass 35, count 2 2006.229.06:45:55.22#ibcon#about to write, iclass 35, count 2 2006.229.06:45:55.22#ibcon#wrote, iclass 35, count 2 2006.229.06:45:55.22#ibcon#about to read 3, iclass 35, count 2 2006.229.06:45:55.24#ibcon#read 3, iclass 35, count 2 2006.229.06:45:55.24#ibcon#about to read 4, iclass 35, count 2 2006.229.06:45:55.24#ibcon#read 4, iclass 35, count 2 2006.229.06:45:55.24#ibcon#about to read 5, iclass 35, count 2 2006.229.06:45:55.24#ibcon#read 5, iclass 35, count 2 2006.229.06:45:55.24#ibcon#about to read 6, iclass 35, count 2 2006.229.06:45:55.24#ibcon#read 6, iclass 35, count 2 2006.229.06:45:55.24#ibcon#end of sib2, iclass 35, count 2 2006.229.06:45:55.24#ibcon#*mode == 0, iclass 35, count 2 2006.229.06:45:55.24#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.06:45:55.24#ibcon#[25=AT01-08\r\n] 2006.229.06:45:55.24#ibcon#*before write, iclass 35, count 2 2006.229.06:45:55.24#ibcon#enter sib2, iclass 35, count 2 2006.229.06:45:55.24#ibcon#flushed, iclass 35, count 2 2006.229.06:45:55.24#ibcon#about to write, iclass 35, count 2 2006.229.06:45:55.24#ibcon#wrote, iclass 35, count 2 2006.229.06:45:55.24#ibcon#about to read 3, iclass 35, count 2 2006.229.06:45:55.27#ibcon#read 3, iclass 35, count 2 2006.229.06:45:55.27#ibcon#about to read 4, iclass 35, count 2 2006.229.06:45:55.27#ibcon#read 4, iclass 35, count 2 2006.229.06:45:55.27#ibcon#about to read 5, iclass 35, count 2 2006.229.06:45:55.27#ibcon#read 5, iclass 35, count 2 2006.229.06:45:55.27#ibcon#about to read 6, iclass 35, count 2 2006.229.06:45:55.27#ibcon#read 6, iclass 35, count 2 2006.229.06:45:55.27#ibcon#end of sib2, iclass 35, count 2 2006.229.06:45:55.27#ibcon#*after write, iclass 35, count 2 2006.229.06:45:55.27#ibcon#*before return 0, iclass 35, count 2 2006.229.06:45:55.27#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:55.27#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:55.27#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.06:45:55.27#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:55.27#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:55.39#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:55.39#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:55.39#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:45:55.39#ibcon#first serial, iclass 35, count 0 2006.229.06:45:55.39#ibcon#enter sib2, iclass 35, count 0 2006.229.06:45:55.39#ibcon#flushed, iclass 35, count 0 2006.229.06:45:55.39#ibcon#about to write, iclass 35, count 0 2006.229.06:45:55.39#ibcon#wrote, iclass 35, count 0 2006.229.06:45:55.39#ibcon#about to read 3, iclass 35, count 0 2006.229.06:45:55.41#ibcon#read 3, iclass 35, count 0 2006.229.06:45:55.41#ibcon#about to read 4, iclass 35, count 0 2006.229.06:45:55.41#ibcon#read 4, iclass 35, count 0 2006.229.06:45:55.41#ibcon#about to read 5, iclass 35, count 0 2006.229.06:45:55.41#ibcon#read 5, iclass 35, count 0 2006.229.06:45:55.41#ibcon#about to read 6, iclass 35, count 0 2006.229.06:45:55.41#ibcon#read 6, iclass 35, count 0 2006.229.06:45:55.41#ibcon#end of sib2, iclass 35, count 0 2006.229.06:45:55.41#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:45:55.41#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:45:55.41#ibcon#[25=USB\r\n] 2006.229.06:45:55.41#ibcon#*before write, iclass 35, count 0 2006.229.06:45:55.41#ibcon#enter sib2, iclass 35, count 0 2006.229.06:45:55.41#ibcon#flushed, iclass 35, count 0 2006.229.06:45:55.41#ibcon#about to write, iclass 35, count 0 2006.229.06:45:55.41#ibcon#wrote, iclass 35, count 0 2006.229.06:45:55.41#ibcon#about to read 3, iclass 35, count 0 2006.229.06:45:55.44#ibcon#read 3, iclass 35, count 0 2006.229.06:45:55.44#ibcon#about to read 4, iclass 35, count 0 2006.229.06:45:55.44#ibcon#read 4, iclass 35, count 0 2006.229.06:45:55.44#ibcon#about to read 5, iclass 35, count 0 2006.229.06:45:55.44#ibcon#read 5, iclass 35, count 0 2006.229.06:45:55.44#ibcon#about to read 6, iclass 35, count 0 2006.229.06:45:55.44#ibcon#read 6, iclass 35, count 0 2006.229.06:45:55.44#ibcon#end of sib2, iclass 35, count 0 2006.229.06:45:55.44#ibcon#*after write, iclass 35, count 0 2006.229.06:45:55.44#ibcon#*before return 0, iclass 35, count 0 2006.229.06:45:55.44#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:55.44#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:55.44#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:45:55.44#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:45:55.44$vck44/valo=2,534.99 2006.229.06:45:55.44#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.06:45:55.44#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.06:45:55.44#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:55.44#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:55.44#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:55.44#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:55.44#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:45:55.44#ibcon#first serial, iclass 37, count 0 2006.229.06:45:55.44#ibcon#enter sib2, iclass 37, count 0 2006.229.06:45:55.44#ibcon#flushed, iclass 37, count 0 2006.229.06:45:55.44#ibcon#about to write, iclass 37, count 0 2006.229.06:45:55.44#ibcon#wrote, iclass 37, count 0 2006.229.06:45:55.44#ibcon#about to read 3, iclass 37, count 0 2006.229.06:45:55.46#ibcon#read 3, iclass 37, count 0 2006.229.06:45:55.46#ibcon#about to read 4, iclass 37, count 0 2006.229.06:45:55.46#ibcon#read 4, iclass 37, count 0 2006.229.06:45:55.46#ibcon#about to read 5, iclass 37, count 0 2006.229.06:45:55.46#ibcon#read 5, iclass 37, count 0 2006.229.06:45:55.46#ibcon#about to read 6, iclass 37, count 0 2006.229.06:45:55.46#ibcon#read 6, iclass 37, count 0 2006.229.06:45:55.46#ibcon#end of sib2, iclass 37, count 0 2006.229.06:45:55.46#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:45:55.46#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:45:55.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:45:55.46#ibcon#*before write, iclass 37, count 0 2006.229.06:45:55.46#ibcon#enter sib2, iclass 37, count 0 2006.229.06:45:55.46#ibcon#flushed, iclass 37, count 0 2006.229.06:45:55.46#ibcon#about to write, iclass 37, count 0 2006.229.06:45:55.46#ibcon#wrote, iclass 37, count 0 2006.229.06:45:55.46#ibcon#about to read 3, iclass 37, count 0 2006.229.06:45:55.50#ibcon#read 3, iclass 37, count 0 2006.229.06:45:55.50#ibcon#about to read 4, iclass 37, count 0 2006.229.06:45:55.50#ibcon#read 4, iclass 37, count 0 2006.229.06:45:55.50#ibcon#about to read 5, iclass 37, count 0 2006.229.06:45:55.50#ibcon#read 5, iclass 37, count 0 2006.229.06:45:55.50#ibcon#about to read 6, iclass 37, count 0 2006.229.06:45:55.50#ibcon#read 6, iclass 37, count 0 2006.229.06:45:55.50#ibcon#end of sib2, iclass 37, count 0 2006.229.06:45:55.50#ibcon#*after write, iclass 37, count 0 2006.229.06:45:55.50#ibcon#*before return 0, iclass 37, count 0 2006.229.06:45:55.50#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:55.50#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:55.50#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:45:55.50#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:45:55.50$vck44/va=2,7 2006.229.06:45:55.50#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.06:45:55.50#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.06:45:55.50#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:55.50#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:55.56#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:55.56#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:55.56#ibcon#enter wrdev, iclass 39, count 2 2006.229.06:45:55.56#ibcon#first serial, iclass 39, count 2 2006.229.06:45:55.56#ibcon#enter sib2, iclass 39, count 2 2006.229.06:45:55.56#ibcon#flushed, iclass 39, count 2 2006.229.06:45:55.56#ibcon#about to write, iclass 39, count 2 2006.229.06:45:55.56#ibcon#wrote, iclass 39, count 2 2006.229.06:45:55.56#ibcon#about to read 3, iclass 39, count 2 2006.229.06:45:55.58#ibcon#read 3, iclass 39, count 2 2006.229.06:45:55.58#ibcon#about to read 4, iclass 39, count 2 2006.229.06:45:55.58#ibcon#read 4, iclass 39, count 2 2006.229.06:45:55.58#ibcon#about to read 5, iclass 39, count 2 2006.229.06:45:55.58#ibcon#read 5, iclass 39, count 2 2006.229.06:45:55.58#ibcon#about to read 6, iclass 39, count 2 2006.229.06:45:55.58#ibcon#read 6, iclass 39, count 2 2006.229.06:45:55.58#ibcon#end of sib2, iclass 39, count 2 2006.229.06:45:55.58#ibcon#*mode == 0, iclass 39, count 2 2006.229.06:45:55.58#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.06:45:55.58#ibcon#[25=AT02-07\r\n] 2006.229.06:45:55.58#ibcon#*before write, iclass 39, count 2 2006.229.06:45:55.58#ibcon#enter sib2, iclass 39, count 2 2006.229.06:45:55.58#ibcon#flushed, iclass 39, count 2 2006.229.06:45:55.58#ibcon#about to write, iclass 39, count 2 2006.229.06:45:55.58#ibcon#wrote, iclass 39, count 2 2006.229.06:45:55.58#ibcon#about to read 3, iclass 39, count 2 2006.229.06:45:55.61#ibcon#read 3, iclass 39, count 2 2006.229.06:45:55.61#ibcon#about to read 4, iclass 39, count 2 2006.229.06:45:55.61#ibcon#read 4, iclass 39, count 2 2006.229.06:45:55.61#ibcon#about to read 5, iclass 39, count 2 2006.229.06:45:55.61#ibcon#read 5, iclass 39, count 2 2006.229.06:45:55.61#ibcon#about to read 6, iclass 39, count 2 2006.229.06:45:55.61#ibcon#read 6, iclass 39, count 2 2006.229.06:45:55.61#ibcon#end of sib2, iclass 39, count 2 2006.229.06:45:55.61#ibcon#*after write, iclass 39, count 2 2006.229.06:45:55.61#ibcon#*before return 0, iclass 39, count 2 2006.229.06:45:55.61#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:55.61#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:55.61#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.06:45:55.61#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:55.61#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:55.70#abcon#<5=/05 2.9 5.7 30.22 92 999.8\r\n> 2006.229.06:45:55.72#abcon#{5=INTERFACE CLEAR} 2006.229.06:45:55.73#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:55.73#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:55.73#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:45:55.73#ibcon#first serial, iclass 39, count 0 2006.229.06:45:55.73#ibcon#enter sib2, iclass 39, count 0 2006.229.06:45:55.73#ibcon#flushed, iclass 39, count 0 2006.229.06:45:55.73#ibcon#about to write, iclass 39, count 0 2006.229.06:45:55.73#ibcon#wrote, iclass 39, count 0 2006.229.06:45:55.73#ibcon#about to read 3, iclass 39, count 0 2006.229.06:45:55.75#ibcon#read 3, iclass 39, count 0 2006.229.06:45:55.75#ibcon#about to read 4, iclass 39, count 0 2006.229.06:45:55.75#ibcon#read 4, iclass 39, count 0 2006.229.06:45:55.75#ibcon#about to read 5, iclass 39, count 0 2006.229.06:45:55.75#ibcon#read 5, iclass 39, count 0 2006.229.06:45:55.75#ibcon#about to read 6, iclass 39, count 0 2006.229.06:45:55.75#ibcon#read 6, iclass 39, count 0 2006.229.06:45:55.75#ibcon#end of sib2, iclass 39, count 0 2006.229.06:45:55.75#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:45:55.75#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:45:55.75#ibcon#[25=USB\r\n] 2006.229.06:45:55.75#ibcon#*before write, iclass 39, count 0 2006.229.06:45:55.75#ibcon#enter sib2, iclass 39, count 0 2006.229.06:45:55.75#ibcon#flushed, iclass 39, count 0 2006.229.06:45:55.75#ibcon#about to write, iclass 39, count 0 2006.229.06:45:55.75#ibcon#wrote, iclass 39, count 0 2006.229.06:45:55.75#ibcon#about to read 3, iclass 39, count 0 2006.229.06:45:55.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:45:55.78#ibcon#read 3, iclass 39, count 0 2006.229.06:45:55.78#ibcon#about to read 4, iclass 39, count 0 2006.229.06:45:55.78#ibcon#read 4, iclass 39, count 0 2006.229.06:45:55.78#ibcon#about to read 5, iclass 39, count 0 2006.229.06:45:55.78#ibcon#read 5, iclass 39, count 0 2006.229.06:45:55.78#ibcon#about to read 6, iclass 39, count 0 2006.229.06:45:55.78#ibcon#read 6, iclass 39, count 0 2006.229.06:45:55.78#ibcon#end of sib2, iclass 39, count 0 2006.229.06:45:55.78#ibcon#*after write, iclass 39, count 0 2006.229.06:45:55.78#ibcon#*before return 0, iclass 39, count 0 2006.229.06:45:55.78#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:55.78#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:55.78#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:45:55.78#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:45:55.78$vck44/valo=3,564.99 2006.229.06:45:55.78#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.06:45:55.78#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.06:45:55.78#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:55.78#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:55.78#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:55.78#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:55.78#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:45:55.78#ibcon#first serial, iclass 7, count 0 2006.229.06:45:55.78#ibcon#enter sib2, iclass 7, count 0 2006.229.06:45:55.78#ibcon#flushed, iclass 7, count 0 2006.229.06:45:55.78#ibcon#about to write, iclass 7, count 0 2006.229.06:45:55.78#ibcon#wrote, iclass 7, count 0 2006.229.06:45:55.78#ibcon#about to read 3, iclass 7, count 0 2006.229.06:45:55.80#ibcon#read 3, iclass 7, count 0 2006.229.06:45:55.80#ibcon#about to read 4, iclass 7, count 0 2006.229.06:45:55.80#ibcon#read 4, iclass 7, count 0 2006.229.06:45:55.80#ibcon#about to read 5, iclass 7, count 0 2006.229.06:45:55.80#ibcon#read 5, iclass 7, count 0 2006.229.06:45:55.80#ibcon#about to read 6, iclass 7, count 0 2006.229.06:45:55.80#ibcon#read 6, iclass 7, count 0 2006.229.06:45:55.80#ibcon#end of sib2, iclass 7, count 0 2006.229.06:45:55.80#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:45:55.80#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:45:55.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:45:55.80#ibcon#*before write, iclass 7, count 0 2006.229.06:45:55.80#ibcon#enter sib2, iclass 7, count 0 2006.229.06:45:55.80#ibcon#flushed, iclass 7, count 0 2006.229.06:45:55.80#ibcon#about to write, iclass 7, count 0 2006.229.06:45:55.80#ibcon#wrote, iclass 7, count 0 2006.229.06:45:55.80#ibcon#about to read 3, iclass 7, count 0 2006.229.06:45:55.84#ibcon#read 3, iclass 7, count 0 2006.229.06:45:55.84#ibcon#about to read 4, iclass 7, count 0 2006.229.06:45:55.84#ibcon#read 4, iclass 7, count 0 2006.229.06:45:55.84#ibcon#about to read 5, iclass 7, count 0 2006.229.06:45:55.84#ibcon#read 5, iclass 7, count 0 2006.229.06:45:55.84#ibcon#about to read 6, iclass 7, count 0 2006.229.06:45:55.84#ibcon#read 6, iclass 7, count 0 2006.229.06:45:55.84#ibcon#end of sib2, iclass 7, count 0 2006.229.06:45:55.84#ibcon#*after write, iclass 7, count 0 2006.229.06:45:55.84#ibcon#*before return 0, iclass 7, count 0 2006.229.06:45:55.84#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:55.84#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:55.84#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:45:55.84#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:45:55.84$vck44/va=3,6 2006.229.06:45:55.84#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.06:45:55.84#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.06:45:55.84#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:55.84#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:55.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:55.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:55.90#ibcon#enter wrdev, iclass 11, count 2 2006.229.06:45:55.90#ibcon#first serial, iclass 11, count 2 2006.229.06:45:55.90#ibcon#enter sib2, iclass 11, count 2 2006.229.06:45:55.90#ibcon#flushed, iclass 11, count 2 2006.229.06:45:55.90#ibcon#about to write, iclass 11, count 2 2006.229.06:45:55.90#ibcon#wrote, iclass 11, count 2 2006.229.06:45:55.90#ibcon#about to read 3, iclass 11, count 2 2006.229.06:45:55.92#ibcon#read 3, iclass 11, count 2 2006.229.06:45:55.92#ibcon#about to read 4, iclass 11, count 2 2006.229.06:45:55.92#ibcon#read 4, iclass 11, count 2 2006.229.06:45:55.92#ibcon#about to read 5, iclass 11, count 2 2006.229.06:45:55.92#ibcon#read 5, iclass 11, count 2 2006.229.06:45:55.92#ibcon#about to read 6, iclass 11, count 2 2006.229.06:45:55.92#ibcon#read 6, iclass 11, count 2 2006.229.06:45:55.92#ibcon#end of sib2, iclass 11, count 2 2006.229.06:45:55.92#ibcon#*mode == 0, iclass 11, count 2 2006.229.06:45:55.92#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.06:45:55.92#ibcon#[25=AT03-06\r\n] 2006.229.06:45:55.92#ibcon#*before write, iclass 11, count 2 2006.229.06:45:55.92#ibcon#enter sib2, iclass 11, count 2 2006.229.06:45:55.92#ibcon#flushed, iclass 11, count 2 2006.229.06:45:55.92#ibcon#about to write, iclass 11, count 2 2006.229.06:45:55.92#ibcon#wrote, iclass 11, count 2 2006.229.06:45:55.92#ibcon#about to read 3, iclass 11, count 2 2006.229.06:45:55.95#ibcon#read 3, iclass 11, count 2 2006.229.06:45:55.95#ibcon#about to read 4, iclass 11, count 2 2006.229.06:45:55.95#ibcon#read 4, iclass 11, count 2 2006.229.06:45:55.95#ibcon#about to read 5, iclass 11, count 2 2006.229.06:45:55.95#ibcon#read 5, iclass 11, count 2 2006.229.06:45:55.95#ibcon#about to read 6, iclass 11, count 2 2006.229.06:45:55.95#ibcon#read 6, iclass 11, count 2 2006.229.06:45:55.95#ibcon#end of sib2, iclass 11, count 2 2006.229.06:45:55.95#ibcon#*after write, iclass 11, count 2 2006.229.06:45:55.95#ibcon#*before return 0, iclass 11, count 2 2006.229.06:45:55.95#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:55.95#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:55.95#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.06:45:55.95#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:55.95#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:56.07#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:56.07#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:56.07#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:45:56.07#ibcon#first serial, iclass 11, count 0 2006.229.06:45:56.07#ibcon#enter sib2, iclass 11, count 0 2006.229.06:45:56.07#ibcon#flushed, iclass 11, count 0 2006.229.06:45:56.07#ibcon#about to write, iclass 11, count 0 2006.229.06:45:56.07#ibcon#wrote, iclass 11, count 0 2006.229.06:45:56.07#ibcon#about to read 3, iclass 11, count 0 2006.229.06:45:56.09#ibcon#read 3, iclass 11, count 0 2006.229.06:45:56.09#ibcon#about to read 4, iclass 11, count 0 2006.229.06:45:56.09#ibcon#read 4, iclass 11, count 0 2006.229.06:45:56.09#ibcon#about to read 5, iclass 11, count 0 2006.229.06:45:56.09#ibcon#read 5, iclass 11, count 0 2006.229.06:45:56.09#ibcon#about to read 6, iclass 11, count 0 2006.229.06:45:56.09#ibcon#read 6, iclass 11, count 0 2006.229.06:45:56.09#ibcon#end of sib2, iclass 11, count 0 2006.229.06:45:56.09#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:45:56.09#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:45:56.09#ibcon#[25=USB\r\n] 2006.229.06:45:56.09#ibcon#*before write, iclass 11, count 0 2006.229.06:45:56.09#ibcon#enter sib2, iclass 11, count 0 2006.229.06:45:56.09#ibcon#flushed, iclass 11, count 0 2006.229.06:45:56.09#ibcon#about to write, iclass 11, count 0 2006.229.06:45:56.09#ibcon#wrote, iclass 11, count 0 2006.229.06:45:56.09#ibcon#about to read 3, iclass 11, count 0 2006.229.06:45:56.12#ibcon#read 3, iclass 11, count 0 2006.229.06:45:56.12#ibcon#about to read 4, iclass 11, count 0 2006.229.06:45:56.12#ibcon#read 4, iclass 11, count 0 2006.229.06:45:56.12#ibcon#about to read 5, iclass 11, count 0 2006.229.06:45:56.12#ibcon#read 5, iclass 11, count 0 2006.229.06:45:56.12#ibcon#about to read 6, iclass 11, count 0 2006.229.06:45:56.12#ibcon#read 6, iclass 11, count 0 2006.229.06:45:56.12#ibcon#end of sib2, iclass 11, count 0 2006.229.06:45:56.12#ibcon#*after write, iclass 11, count 0 2006.229.06:45:56.12#ibcon#*before return 0, iclass 11, count 0 2006.229.06:45:56.12#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:56.12#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:56.12#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:45:56.12#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:45:56.12$vck44/valo=4,624.99 2006.229.06:45:56.12#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.06:45:56.12#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.06:45:56.12#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:56.12#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:56.12#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:56.12#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:56.12#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:45:56.12#ibcon#first serial, iclass 13, count 0 2006.229.06:45:56.12#ibcon#enter sib2, iclass 13, count 0 2006.229.06:45:56.12#ibcon#flushed, iclass 13, count 0 2006.229.06:45:56.12#ibcon#about to write, iclass 13, count 0 2006.229.06:45:56.12#ibcon#wrote, iclass 13, count 0 2006.229.06:45:56.12#ibcon#about to read 3, iclass 13, count 0 2006.229.06:45:56.14#ibcon#read 3, iclass 13, count 0 2006.229.06:45:56.14#ibcon#about to read 4, iclass 13, count 0 2006.229.06:45:56.14#ibcon#read 4, iclass 13, count 0 2006.229.06:45:56.14#ibcon#about to read 5, iclass 13, count 0 2006.229.06:45:56.14#ibcon#read 5, iclass 13, count 0 2006.229.06:45:56.14#ibcon#about to read 6, iclass 13, count 0 2006.229.06:45:56.14#ibcon#read 6, iclass 13, count 0 2006.229.06:45:56.14#ibcon#end of sib2, iclass 13, count 0 2006.229.06:45:56.14#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:45:56.14#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:45:56.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:45:56.14#ibcon#*before write, iclass 13, count 0 2006.229.06:45:56.14#ibcon#enter sib2, iclass 13, count 0 2006.229.06:45:56.14#ibcon#flushed, iclass 13, count 0 2006.229.06:45:56.14#ibcon#about to write, iclass 13, count 0 2006.229.06:45:56.14#ibcon#wrote, iclass 13, count 0 2006.229.06:45:56.14#ibcon#about to read 3, iclass 13, count 0 2006.229.06:45:56.18#ibcon#read 3, iclass 13, count 0 2006.229.06:45:56.18#ibcon#about to read 4, iclass 13, count 0 2006.229.06:45:56.18#ibcon#read 4, iclass 13, count 0 2006.229.06:45:56.18#ibcon#about to read 5, iclass 13, count 0 2006.229.06:45:56.18#ibcon#read 5, iclass 13, count 0 2006.229.06:45:56.18#ibcon#about to read 6, iclass 13, count 0 2006.229.06:45:56.18#ibcon#read 6, iclass 13, count 0 2006.229.06:45:56.18#ibcon#end of sib2, iclass 13, count 0 2006.229.06:45:56.18#ibcon#*after write, iclass 13, count 0 2006.229.06:45:56.18#ibcon#*before return 0, iclass 13, count 0 2006.229.06:45:56.18#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:56.18#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:56.18#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:45:56.18#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:45:56.18$vck44/va=4,7 2006.229.06:45:56.18#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.06:45:56.18#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.06:45:56.18#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:56.18#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:56.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:56.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:56.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.06:45:56.24#ibcon#first serial, iclass 15, count 2 2006.229.06:45:56.24#ibcon#enter sib2, iclass 15, count 2 2006.229.06:45:56.24#ibcon#flushed, iclass 15, count 2 2006.229.06:45:56.24#ibcon#about to write, iclass 15, count 2 2006.229.06:45:56.24#ibcon#wrote, iclass 15, count 2 2006.229.06:45:56.24#ibcon#about to read 3, iclass 15, count 2 2006.229.06:45:56.26#ibcon#read 3, iclass 15, count 2 2006.229.06:45:56.26#ibcon#about to read 4, iclass 15, count 2 2006.229.06:45:56.26#ibcon#read 4, iclass 15, count 2 2006.229.06:45:56.26#ibcon#about to read 5, iclass 15, count 2 2006.229.06:45:56.26#ibcon#read 5, iclass 15, count 2 2006.229.06:45:56.26#ibcon#about to read 6, iclass 15, count 2 2006.229.06:45:56.26#ibcon#read 6, iclass 15, count 2 2006.229.06:45:56.26#ibcon#end of sib2, iclass 15, count 2 2006.229.06:45:56.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.06:45:56.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.06:45:56.26#ibcon#[25=AT04-07\r\n] 2006.229.06:45:56.26#ibcon#*before write, iclass 15, count 2 2006.229.06:45:56.26#ibcon#enter sib2, iclass 15, count 2 2006.229.06:45:56.26#ibcon#flushed, iclass 15, count 2 2006.229.06:45:56.26#ibcon#about to write, iclass 15, count 2 2006.229.06:45:56.26#ibcon#wrote, iclass 15, count 2 2006.229.06:45:56.26#ibcon#about to read 3, iclass 15, count 2 2006.229.06:45:56.29#ibcon#read 3, iclass 15, count 2 2006.229.06:45:56.29#ibcon#about to read 4, iclass 15, count 2 2006.229.06:45:56.29#ibcon#read 4, iclass 15, count 2 2006.229.06:45:56.29#ibcon#about to read 5, iclass 15, count 2 2006.229.06:45:56.29#ibcon#read 5, iclass 15, count 2 2006.229.06:45:56.29#ibcon#about to read 6, iclass 15, count 2 2006.229.06:45:56.29#ibcon#read 6, iclass 15, count 2 2006.229.06:45:56.29#ibcon#end of sib2, iclass 15, count 2 2006.229.06:45:56.29#ibcon#*after write, iclass 15, count 2 2006.229.06:45:56.29#ibcon#*before return 0, iclass 15, count 2 2006.229.06:45:56.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:56.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:56.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.06:45:56.29#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:56.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:56.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:56.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:56.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:45:56.41#ibcon#first serial, iclass 15, count 0 2006.229.06:45:56.41#ibcon#enter sib2, iclass 15, count 0 2006.229.06:45:56.41#ibcon#flushed, iclass 15, count 0 2006.229.06:45:56.41#ibcon#about to write, iclass 15, count 0 2006.229.06:45:56.41#ibcon#wrote, iclass 15, count 0 2006.229.06:45:56.41#ibcon#about to read 3, iclass 15, count 0 2006.229.06:45:56.43#ibcon#read 3, iclass 15, count 0 2006.229.06:45:56.43#ibcon#about to read 4, iclass 15, count 0 2006.229.06:45:56.43#ibcon#read 4, iclass 15, count 0 2006.229.06:45:56.43#ibcon#about to read 5, iclass 15, count 0 2006.229.06:45:56.43#ibcon#read 5, iclass 15, count 0 2006.229.06:45:56.43#ibcon#about to read 6, iclass 15, count 0 2006.229.06:45:56.43#ibcon#read 6, iclass 15, count 0 2006.229.06:45:56.43#ibcon#end of sib2, iclass 15, count 0 2006.229.06:45:56.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:45:56.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:45:56.43#ibcon#[25=USB\r\n] 2006.229.06:45:56.43#ibcon#*before write, iclass 15, count 0 2006.229.06:45:56.43#ibcon#enter sib2, iclass 15, count 0 2006.229.06:45:56.43#ibcon#flushed, iclass 15, count 0 2006.229.06:45:56.43#ibcon#about to write, iclass 15, count 0 2006.229.06:45:56.43#ibcon#wrote, iclass 15, count 0 2006.229.06:45:56.43#ibcon#about to read 3, iclass 15, count 0 2006.229.06:45:56.46#ibcon#read 3, iclass 15, count 0 2006.229.06:45:56.46#ibcon#about to read 4, iclass 15, count 0 2006.229.06:45:56.46#ibcon#read 4, iclass 15, count 0 2006.229.06:45:56.46#ibcon#about to read 5, iclass 15, count 0 2006.229.06:45:56.46#ibcon#read 5, iclass 15, count 0 2006.229.06:45:56.46#ibcon#about to read 6, iclass 15, count 0 2006.229.06:45:56.46#ibcon#read 6, iclass 15, count 0 2006.229.06:45:56.46#ibcon#end of sib2, iclass 15, count 0 2006.229.06:45:56.46#ibcon#*after write, iclass 15, count 0 2006.229.06:45:56.46#ibcon#*before return 0, iclass 15, count 0 2006.229.06:45:56.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:56.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:56.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:45:56.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:45:56.46$vck44/valo=5,734.99 2006.229.06:45:56.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.06:45:56.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.06:45:56.46#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:56.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:56.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:56.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:56.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:45:56.46#ibcon#first serial, iclass 17, count 0 2006.229.06:45:56.46#ibcon#enter sib2, iclass 17, count 0 2006.229.06:45:56.46#ibcon#flushed, iclass 17, count 0 2006.229.06:45:56.46#ibcon#about to write, iclass 17, count 0 2006.229.06:45:56.46#ibcon#wrote, iclass 17, count 0 2006.229.06:45:56.46#ibcon#about to read 3, iclass 17, count 0 2006.229.06:45:56.48#ibcon#read 3, iclass 17, count 0 2006.229.06:45:56.48#ibcon#about to read 4, iclass 17, count 0 2006.229.06:45:56.48#ibcon#read 4, iclass 17, count 0 2006.229.06:45:56.48#ibcon#about to read 5, iclass 17, count 0 2006.229.06:45:56.48#ibcon#read 5, iclass 17, count 0 2006.229.06:45:56.48#ibcon#about to read 6, iclass 17, count 0 2006.229.06:45:56.48#ibcon#read 6, iclass 17, count 0 2006.229.06:45:56.48#ibcon#end of sib2, iclass 17, count 0 2006.229.06:45:56.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:45:56.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:45:56.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:45:56.48#ibcon#*before write, iclass 17, count 0 2006.229.06:45:56.48#ibcon#enter sib2, iclass 17, count 0 2006.229.06:45:56.48#ibcon#flushed, iclass 17, count 0 2006.229.06:45:56.48#ibcon#about to write, iclass 17, count 0 2006.229.06:45:56.48#ibcon#wrote, iclass 17, count 0 2006.229.06:45:56.48#ibcon#about to read 3, iclass 17, count 0 2006.229.06:45:56.52#ibcon#read 3, iclass 17, count 0 2006.229.06:45:56.52#ibcon#about to read 4, iclass 17, count 0 2006.229.06:45:56.52#ibcon#read 4, iclass 17, count 0 2006.229.06:45:56.52#ibcon#about to read 5, iclass 17, count 0 2006.229.06:45:56.52#ibcon#read 5, iclass 17, count 0 2006.229.06:45:56.52#ibcon#about to read 6, iclass 17, count 0 2006.229.06:45:56.52#ibcon#read 6, iclass 17, count 0 2006.229.06:45:56.52#ibcon#end of sib2, iclass 17, count 0 2006.229.06:45:56.52#ibcon#*after write, iclass 17, count 0 2006.229.06:45:56.52#ibcon#*before return 0, iclass 17, count 0 2006.229.06:45:56.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:56.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:56.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:45:56.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:45:56.52$vck44/va=5,4 2006.229.06:45:56.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.06:45:56.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.06:45:56.52#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:56.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:56.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:56.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:56.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.06:45:56.58#ibcon#first serial, iclass 19, count 2 2006.229.06:45:56.58#ibcon#enter sib2, iclass 19, count 2 2006.229.06:45:56.58#ibcon#flushed, iclass 19, count 2 2006.229.06:45:56.58#ibcon#about to write, iclass 19, count 2 2006.229.06:45:56.58#ibcon#wrote, iclass 19, count 2 2006.229.06:45:56.58#ibcon#about to read 3, iclass 19, count 2 2006.229.06:45:56.60#ibcon#read 3, iclass 19, count 2 2006.229.06:45:56.60#ibcon#about to read 4, iclass 19, count 2 2006.229.06:45:56.60#ibcon#read 4, iclass 19, count 2 2006.229.06:45:56.60#ibcon#about to read 5, iclass 19, count 2 2006.229.06:45:56.60#ibcon#read 5, iclass 19, count 2 2006.229.06:45:56.60#ibcon#about to read 6, iclass 19, count 2 2006.229.06:45:56.60#ibcon#read 6, iclass 19, count 2 2006.229.06:45:56.60#ibcon#end of sib2, iclass 19, count 2 2006.229.06:45:56.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.06:45:56.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.06:45:56.60#ibcon#[25=AT05-04\r\n] 2006.229.06:45:56.60#ibcon#*before write, iclass 19, count 2 2006.229.06:45:56.60#ibcon#enter sib2, iclass 19, count 2 2006.229.06:45:56.60#ibcon#flushed, iclass 19, count 2 2006.229.06:45:56.60#ibcon#about to write, iclass 19, count 2 2006.229.06:45:56.60#ibcon#wrote, iclass 19, count 2 2006.229.06:45:56.60#ibcon#about to read 3, iclass 19, count 2 2006.229.06:45:56.63#ibcon#read 3, iclass 19, count 2 2006.229.06:45:56.63#ibcon#about to read 4, iclass 19, count 2 2006.229.06:45:56.63#ibcon#read 4, iclass 19, count 2 2006.229.06:45:56.63#ibcon#about to read 5, iclass 19, count 2 2006.229.06:45:56.63#ibcon#read 5, iclass 19, count 2 2006.229.06:45:56.63#ibcon#about to read 6, iclass 19, count 2 2006.229.06:45:56.63#ibcon#read 6, iclass 19, count 2 2006.229.06:45:56.63#ibcon#end of sib2, iclass 19, count 2 2006.229.06:45:56.63#ibcon#*after write, iclass 19, count 2 2006.229.06:45:56.63#ibcon#*before return 0, iclass 19, count 2 2006.229.06:45:56.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:56.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:56.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.06:45:56.63#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:56.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:56.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:56.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:56.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:45:56.75#ibcon#first serial, iclass 19, count 0 2006.229.06:45:56.75#ibcon#enter sib2, iclass 19, count 0 2006.229.06:45:56.75#ibcon#flushed, iclass 19, count 0 2006.229.06:45:56.75#ibcon#about to write, iclass 19, count 0 2006.229.06:45:56.75#ibcon#wrote, iclass 19, count 0 2006.229.06:45:56.75#ibcon#about to read 3, iclass 19, count 0 2006.229.06:45:56.77#ibcon#read 3, iclass 19, count 0 2006.229.06:45:56.77#ibcon#about to read 4, iclass 19, count 0 2006.229.06:45:56.77#ibcon#read 4, iclass 19, count 0 2006.229.06:45:56.77#ibcon#about to read 5, iclass 19, count 0 2006.229.06:45:56.77#ibcon#read 5, iclass 19, count 0 2006.229.06:45:56.77#ibcon#about to read 6, iclass 19, count 0 2006.229.06:45:56.77#ibcon#read 6, iclass 19, count 0 2006.229.06:45:56.77#ibcon#end of sib2, iclass 19, count 0 2006.229.06:45:56.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:45:56.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:45:56.77#ibcon#[25=USB\r\n] 2006.229.06:45:56.77#ibcon#*before write, iclass 19, count 0 2006.229.06:45:56.77#ibcon#enter sib2, iclass 19, count 0 2006.229.06:45:56.77#ibcon#flushed, iclass 19, count 0 2006.229.06:45:56.77#ibcon#about to write, iclass 19, count 0 2006.229.06:45:56.77#ibcon#wrote, iclass 19, count 0 2006.229.06:45:56.77#ibcon#about to read 3, iclass 19, count 0 2006.229.06:45:56.80#ibcon#read 3, iclass 19, count 0 2006.229.06:45:56.80#ibcon#about to read 4, iclass 19, count 0 2006.229.06:45:56.80#ibcon#read 4, iclass 19, count 0 2006.229.06:45:56.80#ibcon#about to read 5, iclass 19, count 0 2006.229.06:45:56.80#ibcon#read 5, iclass 19, count 0 2006.229.06:45:56.80#ibcon#about to read 6, iclass 19, count 0 2006.229.06:45:56.80#ibcon#read 6, iclass 19, count 0 2006.229.06:45:56.80#ibcon#end of sib2, iclass 19, count 0 2006.229.06:45:56.80#ibcon#*after write, iclass 19, count 0 2006.229.06:45:56.80#ibcon#*before return 0, iclass 19, count 0 2006.229.06:45:56.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:56.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:56.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:45:56.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:45:56.80$vck44/valo=6,814.99 2006.229.06:45:56.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.06:45:56.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.06:45:56.80#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:56.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:56.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:56.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:56.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:45:56.80#ibcon#first serial, iclass 21, count 0 2006.229.06:45:56.80#ibcon#enter sib2, iclass 21, count 0 2006.229.06:45:56.80#ibcon#flushed, iclass 21, count 0 2006.229.06:45:56.80#ibcon#about to write, iclass 21, count 0 2006.229.06:45:56.80#ibcon#wrote, iclass 21, count 0 2006.229.06:45:56.80#ibcon#about to read 3, iclass 21, count 0 2006.229.06:45:56.82#ibcon#read 3, iclass 21, count 0 2006.229.06:45:56.82#ibcon#about to read 4, iclass 21, count 0 2006.229.06:45:56.82#ibcon#read 4, iclass 21, count 0 2006.229.06:45:56.82#ibcon#about to read 5, iclass 21, count 0 2006.229.06:45:56.82#ibcon#read 5, iclass 21, count 0 2006.229.06:45:56.82#ibcon#about to read 6, iclass 21, count 0 2006.229.06:45:56.82#ibcon#read 6, iclass 21, count 0 2006.229.06:45:56.82#ibcon#end of sib2, iclass 21, count 0 2006.229.06:45:56.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:45:56.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:45:56.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:45:56.82#ibcon#*before write, iclass 21, count 0 2006.229.06:45:56.82#ibcon#enter sib2, iclass 21, count 0 2006.229.06:45:56.82#ibcon#flushed, iclass 21, count 0 2006.229.06:45:56.82#ibcon#about to write, iclass 21, count 0 2006.229.06:45:56.82#ibcon#wrote, iclass 21, count 0 2006.229.06:45:56.82#ibcon#about to read 3, iclass 21, count 0 2006.229.06:45:56.86#ibcon#read 3, iclass 21, count 0 2006.229.06:45:56.86#ibcon#about to read 4, iclass 21, count 0 2006.229.06:45:56.86#ibcon#read 4, iclass 21, count 0 2006.229.06:45:56.86#ibcon#about to read 5, iclass 21, count 0 2006.229.06:45:56.86#ibcon#read 5, iclass 21, count 0 2006.229.06:45:56.86#ibcon#about to read 6, iclass 21, count 0 2006.229.06:45:56.86#ibcon#read 6, iclass 21, count 0 2006.229.06:45:56.86#ibcon#end of sib2, iclass 21, count 0 2006.229.06:45:56.86#ibcon#*after write, iclass 21, count 0 2006.229.06:45:56.86#ibcon#*before return 0, iclass 21, count 0 2006.229.06:45:56.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:56.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:56.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:45:56.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:45:56.86$vck44/va=6,4 2006.229.06:45:56.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.06:45:56.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.06:45:56.86#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:56.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:56.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:56.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:56.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.06:45:56.92#ibcon#first serial, iclass 23, count 2 2006.229.06:45:56.92#ibcon#enter sib2, iclass 23, count 2 2006.229.06:45:56.92#ibcon#flushed, iclass 23, count 2 2006.229.06:45:56.92#ibcon#about to write, iclass 23, count 2 2006.229.06:45:56.92#ibcon#wrote, iclass 23, count 2 2006.229.06:45:56.92#ibcon#about to read 3, iclass 23, count 2 2006.229.06:45:56.94#ibcon#read 3, iclass 23, count 2 2006.229.06:45:56.94#ibcon#about to read 4, iclass 23, count 2 2006.229.06:45:56.94#ibcon#read 4, iclass 23, count 2 2006.229.06:45:56.94#ibcon#about to read 5, iclass 23, count 2 2006.229.06:45:56.94#ibcon#read 5, iclass 23, count 2 2006.229.06:45:56.94#ibcon#about to read 6, iclass 23, count 2 2006.229.06:45:56.94#ibcon#read 6, iclass 23, count 2 2006.229.06:45:56.94#ibcon#end of sib2, iclass 23, count 2 2006.229.06:45:56.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.06:45:56.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.06:45:56.94#ibcon#[25=AT06-04\r\n] 2006.229.06:45:56.94#ibcon#*before write, iclass 23, count 2 2006.229.06:45:56.94#ibcon#enter sib2, iclass 23, count 2 2006.229.06:45:56.94#ibcon#flushed, iclass 23, count 2 2006.229.06:45:56.94#ibcon#about to write, iclass 23, count 2 2006.229.06:45:56.94#ibcon#wrote, iclass 23, count 2 2006.229.06:45:56.94#ibcon#about to read 3, iclass 23, count 2 2006.229.06:45:56.97#ibcon#read 3, iclass 23, count 2 2006.229.06:45:56.97#ibcon#about to read 4, iclass 23, count 2 2006.229.06:45:56.97#ibcon#read 4, iclass 23, count 2 2006.229.06:45:56.97#ibcon#about to read 5, iclass 23, count 2 2006.229.06:45:56.97#ibcon#read 5, iclass 23, count 2 2006.229.06:45:56.97#ibcon#about to read 6, iclass 23, count 2 2006.229.06:45:56.97#ibcon#read 6, iclass 23, count 2 2006.229.06:45:56.97#ibcon#end of sib2, iclass 23, count 2 2006.229.06:45:56.97#ibcon#*after write, iclass 23, count 2 2006.229.06:45:56.97#ibcon#*before return 0, iclass 23, count 2 2006.229.06:45:56.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:56.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:56.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.06:45:56.97#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:56.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:45:57.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:45:57.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:45:57.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:45:57.09#ibcon#first serial, iclass 23, count 0 2006.229.06:45:57.09#ibcon#enter sib2, iclass 23, count 0 2006.229.06:45:57.09#ibcon#flushed, iclass 23, count 0 2006.229.06:45:57.09#ibcon#about to write, iclass 23, count 0 2006.229.06:45:57.09#ibcon#wrote, iclass 23, count 0 2006.229.06:45:57.09#ibcon#about to read 3, iclass 23, count 0 2006.229.06:45:57.11#ibcon#read 3, iclass 23, count 0 2006.229.06:45:57.11#ibcon#about to read 4, iclass 23, count 0 2006.229.06:45:57.11#ibcon#read 4, iclass 23, count 0 2006.229.06:45:57.11#ibcon#about to read 5, iclass 23, count 0 2006.229.06:45:57.11#ibcon#read 5, iclass 23, count 0 2006.229.06:45:57.11#ibcon#about to read 6, iclass 23, count 0 2006.229.06:45:57.11#ibcon#read 6, iclass 23, count 0 2006.229.06:45:57.11#ibcon#end of sib2, iclass 23, count 0 2006.229.06:45:57.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:45:57.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:45:57.11#ibcon#[25=USB\r\n] 2006.229.06:45:57.11#ibcon#*before write, iclass 23, count 0 2006.229.06:45:57.11#ibcon#enter sib2, iclass 23, count 0 2006.229.06:45:57.11#ibcon#flushed, iclass 23, count 0 2006.229.06:45:57.11#ibcon#about to write, iclass 23, count 0 2006.229.06:45:57.11#ibcon#wrote, iclass 23, count 0 2006.229.06:45:57.11#ibcon#about to read 3, iclass 23, count 0 2006.229.06:45:57.14#ibcon#read 3, iclass 23, count 0 2006.229.06:45:57.14#ibcon#about to read 4, iclass 23, count 0 2006.229.06:45:57.14#ibcon#read 4, iclass 23, count 0 2006.229.06:45:57.14#ibcon#about to read 5, iclass 23, count 0 2006.229.06:45:57.14#ibcon#read 5, iclass 23, count 0 2006.229.06:45:57.14#ibcon#about to read 6, iclass 23, count 0 2006.229.06:45:57.14#ibcon#read 6, iclass 23, count 0 2006.229.06:45:57.14#ibcon#end of sib2, iclass 23, count 0 2006.229.06:45:57.14#ibcon#*after write, iclass 23, count 0 2006.229.06:45:57.14#ibcon#*before return 0, iclass 23, count 0 2006.229.06:45:57.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:45:57.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:45:57.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:45:57.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:45:57.14$vck44/valo=7,864.99 2006.229.06:45:57.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.06:45:57.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.06:45:57.14#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:57.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:45:57.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:45:57.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:45:57.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:45:57.14#ibcon#first serial, iclass 25, count 0 2006.229.06:45:57.14#ibcon#enter sib2, iclass 25, count 0 2006.229.06:45:57.14#ibcon#flushed, iclass 25, count 0 2006.229.06:45:57.14#ibcon#about to write, iclass 25, count 0 2006.229.06:45:57.14#ibcon#wrote, iclass 25, count 0 2006.229.06:45:57.14#ibcon#about to read 3, iclass 25, count 0 2006.229.06:45:57.16#ibcon#read 3, iclass 25, count 0 2006.229.06:45:57.16#ibcon#about to read 4, iclass 25, count 0 2006.229.06:45:57.16#ibcon#read 4, iclass 25, count 0 2006.229.06:45:57.16#ibcon#about to read 5, iclass 25, count 0 2006.229.06:45:57.16#ibcon#read 5, iclass 25, count 0 2006.229.06:45:57.16#ibcon#about to read 6, iclass 25, count 0 2006.229.06:45:57.16#ibcon#read 6, iclass 25, count 0 2006.229.06:45:57.16#ibcon#end of sib2, iclass 25, count 0 2006.229.06:45:57.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:45:57.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:45:57.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:45:57.16#ibcon#*before write, iclass 25, count 0 2006.229.06:45:57.16#ibcon#enter sib2, iclass 25, count 0 2006.229.06:45:57.16#ibcon#flushed, iclass 25, count 0 2006.229.06:45:57.16#ibcon#about to write, iclass 25, count 0 2006.229.06:45:57.16#ibcon#wrote, iclass 25, count 0 2006.229.06:45:57.16#ibcon#about to read 3, iclass 25, count 0 2006.229.06:45:57.20#ibcon#read 3, iclass 25, count 0 2006.229.06:45:57.20#ibcon#about to read 4, iclass 25, count 0 2006.229.06:45:57.20#ibcon#read 4, iclass 25, count 0 2006.229.06:45:57.20#ibcon#about to read 5, iclass 25, count 0 2006.229.06:45:57.20#ibcon#read 5, iclass 25, count 0 2006.229.06:45:57.20#ibcon#about to read 6, iclass 25, count 0 2006.229.06:45:57.20#ibcon#read 6, iclass 25, count 0 2006.229.06:45:57.20#ibcon#end of sib2, iclass 25, count 0 2006.229.06:45:57.20#ibcon#*after write, iclass 25, count 0 2006.229.06:45:57.20#ibcon#*before return 0, iclass 25, count 0 2006.229.06:45:57.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:45:57.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:45:57.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:45:57.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:45:57.20$vck44/va=7,5 2006.229.06:45:57.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.06:45:57.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.06:45:57.20#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:57.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:45:57.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:45:57.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:45:57.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.06:45:57.26#ibcon#first serial, iclass 27, count 2 2006.229.06:45:57.26#ibcon#enter sib2, iclass 27, count 2 2006.229.06:45:57.26#ibcon#flushed, iclass 27, count 2 2006.229.06:45:57.26#ibcon#about to write, iclass 27, count 2 2006.229.06:45:57.26#ibcon#wrote, iclass 27, count 2 2006.229.06:45:57.26#ibcon#about to read 3, iclass 27, count 2 2006.229.06:45:57.28#ibcon#read 3, iclass 27, count 2 2006.229.06:45:57.28#ibcon#about to read 4, iclass 27, count 2 2006.229.06:45:57.28#ibcon#read 4, iclass 27, count 2 2006.229.06:45:57.28#ibcon#about to read 5, iclass 27, count 2 2006.229.06:45:57.28#ibcon#read 5, iclass 27, count 2 2006.229.06:45:57.28#ibcon#about to read 6, iclass 27, count 2 2006.229.06:45:57.28#ibcon#read 6, iclass 27, count 2 2006.229.06:45:57.28#ibcon#end of sib2, iclass 27, count 2 2006.229.06:45:57.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.06:45:57.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.06:45:57.28#ibcon#[25=AT07-05\r\n] 2006.229.06:45:57.28#ibcon#*before write, iclass 27, count 2 2006.229.06:45:57.28#ibcon#enter sib2, iclass 27, count 2 2006.229.06:45:57.28#ibcon#flushed, iclass 27, count 2 2006.229.06:45:57.28#ibcon#about to write, iclass 27, count 2 2006.229.06:45:57.28#ibcon#wrote, iclass 27, count 2 2006.229.06:45:57.28#ibcon#about to read 3, iclass 27, count 2 2006.229.06:45:57.31#ibcon#read 3, iclass 27, count 2 2006.229.06:45:57.31#ibcon#about to read 4, iclass 27, count 2 2006.229.06:45:57.31#ibcon#read 4, iclass 27, count 2 2006.229.06:45:57.31#ibcon#about to read 5, iclass 27, count 2 2006.229.06:45:57.31#ibcon#read 5, iclass 27, count 2 2006.229.06:45:57.31#ibcon#about to read 6, iclass 27, count 2 2006.229.06:45:57.31#ibcon#read 6, iclass 27, count 2 2006.229.06:45:57.31#ibcon#end of sib2, iclass 27, count 2 2006.229.06:45:57.31#ibcon#*after write, iclass 27, count 2 2006.229.06:45:57.31#ibcon#*before return 0, iclass 27, count 2 2006.229.06:45:57.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:45:57.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:45:57.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.06:45:57.31#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:57.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:45:57.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:45:57.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:45:57.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:45:57.43#ibcon#first serial, iclass 27, count 0 2006.229.06:45:57.43#ibcon#enter sib2, iclass 27, count 0 2006.229.06:45:57.43#ibcon#flushed, iclass 27, count 0 2006.229.06:45:57.43#ibcon#about to write, iclass 27, count 0 2006.229.06:45:57.43#ibcon#wrote, iclass 27, count 0 2006.229.06:45:57.43#ibcon#about to read 3, iclass 27, count 0 2006.229.06:45:57.45#ibcon#read 3, iclass 27, count 0 2006.229.06:45:57.45#ibcon#about to read 4, iclass 27, count 0 2006.229.06:45:57.45#ibcon#read 4, iclass 27, count 0 2006.229.06:45:57.45#ibcon#about to read 5, iclass 27, count 0 2006.229.06:45:57.45#ibcon#read 5, iclass 27, count 0 2006.229.06:45:57.45#ibcon#about to read 6, iclass 27, count 0 2006.229.06:45:57.45#ibcon#read 6, iclass 27, count 0 2006.229.06:45:57.45#ibcon#end of sib2, iclass 27, count 0 2006.229.06:45:57.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:45:57.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:45:57.45#ibcon#[25=USB\r\n] 2006.229.06:45:57.45#ibcon#*before write, iclass 27, count 0 2006.229.06:45:57.45#ibcon#enter sib2, iclass 27, count 0 2006.229.06:45:57.45#ibcon#flushed, iclass 27, count 0 2006.229.06:45:57.45#ibcon#about to write, iclass 27, count 0 2006.229.06:45:57.45#ibcon#wrote, iclass 27, count 0 2006.229.06:45:57.45#ibcon#about to read 3, iclass 27, count 0 2006.229.06:45:57.48#ibcon#read 3, iclass 27, count 0 2006.229.06:45:57.48#ibcon#about to read 4, iclass 27, count 0 2006.229.06:45:57.48#ibcon#read 4, iclass 27, count 0 2006.229.06:45:57.48#ibcon#about to read 5, iclass 27, count 0 2006.229.06:45:57.48#ibcon#read 5, iclass 27, count 0 2006.229.06:45:57.48#ibcon#about to read 6, iclass 27, count 0 2006.229.06:45:57.48#ibcon#read 6, iclass 27, count 0 2006.229.06:45:57.48#ibcon#end of sib2, iclass 27, count 0 2006.229.06:45:57.48#ibcon#*after write, iclass 27, count 0 2006.229.06:45:57.48#ibcon#*before return 0, iclass 27, count 0 2006.229.06:45:57.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:45:57.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:45:57.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:45:57.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:45:57.48$vck44/valo=8,884.99 2006.229.06:45:57.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.06:45:57.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.06:45:57.48#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:57.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:45:57.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:45:57.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:45:57.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:45:57.48#ibcon#first serial, iclass 29, count 0 2006.229.06:45:57.48#ibcon#enter sib2, iclass 29, count 0 2006.229.06:45:57.48#ibcon#flushed, iclass 29, count 0 2006.229.06:45:57.48#ibcon#about to write, iclass 29, count 0 2006.229.06:45:57.48#ibcon#wrote, iclass 29, count 0 2006.229.06:45:57.48#ibcon#about to read 3, iclass 29, count 0 2006.229.06:45:57.50#ibcon#read 3, iclass 29, count 0 2006.229.06:45:57.50#ibcon#about to read 4, iclass 29, count 0 2006.229.06:45:57.50#ibcon#read 4, iclass 29, count 0 2006.229.06:45:57.50#ibcon#about to read 5, iclass 29, count 0 2006.229.06:45:57.50#ibcon#read 5, iclass 29, count 0 2006.229.06:45:57.50#ibcon#about to read 6, iclass 29, count 0 2006.229.06:45:57.50#ibcon#read 6, iclass 29, count 0 2006.229.06:45:57.50#ibcon#end of sib2, iclass 29, count 0 2006.229.06:45:57.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:45:57.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:45:57.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:45:57.50#ibcon#*before write, iclass 29, count 0 2006.229.06:45:57.50#ibcon#enter sib2, iclass 29, count 0 2006.229.06:45:57.50#ibcon#flushed, iclass 29, count 0 2006.229.06:45:57.50#ibcon#about to write, iclass 29, count 0 2006.229.06:45:57.50#ibcon#wrote, iclass 29, count 0 2006.229.06:45:57.50#ibcon#about to read 3, iclass 29, count 0 2006.229.06:45:57.54#ibcon#read 3, iclass 29, count 0 2006.229.06:45:57.54#ibcon#about to read 4, iclass 29, count 0 2006.229.06:45:57.54#ibcon#read 4, iclass 29, count 0 2006.229.06:45:57.54#ibcon#about to read 5, iclass 29, count 0 2006.229.06:45:57.54#ibcon#read 5, iclass 29, count 0 2006.229.06:45:57.54#ibcon#about to read 6, iclass 29, count 0 2006.229.06:45:57.54#ibcon#read 6, iclass 29, count 0 2006.229.06:45:57.54#ibcon#end of sib2, iclass 29, count 0 2006.229.06:45:57.54#ibcon#*after write, iclass 29, count 0 2006.229.06:45:57.54#ibcon#*before return 0, iclass 29, count 0 2006.229.06:45:57.54#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:45:57.54#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:45:57.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:45:57.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:45:57.54$vck44/va=8,6 2006.229.06:45:57.54#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.06:45:57.54#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.06:45:57.54#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:57.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:45:57.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:45:57.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:45:57.60#ibcon#enter wrdev, iclass 31, count 2 2006.229.06:45:57.60#ibcon#first serial, iclass 31, count 2 2006.229.06:45:57.60#ibcon#enter sib2, iclass 31, count 2 2006.229.06:45:57.60#ibcon#flushed, iclass 31, count 2 2006.229.06:45:57.60#ibcon#about to write, iclass 31, count 2 2006.229.06:45:57.60#ibcon#wrote, iclass 31, count 2 2006.229.06:45:57.60#ibcon#about to read 3, iclass 31, count 2 2006.229.06:45:57.62#ibcon#read 3, iclass 31, count 2 2006.229.06:45:57.62#ibcon#about to read 4, iclass 31, count 2 2006.229.06:45:57.62#ibcon#read 4, iclass 31, count 2 2006.229.06:45:57.62#ibcon#about to read 5, iclass 31, count 2 2006.229.06:45:57.62#ibcon#read 5, iclass 31, count 2 2006.229.06:45:57.62#ibcon#about to read 6, iclass 31, count 2 2006.229.06:45:57.62#ibcon#read 6, iclass 31, count 2 2006.229.06:45:57.62#ibcon#end of sib2, iclass 31, count 2 2006.229.06:45:57.62#ibcon#*mode == 0, iclass 31, count 2 2006.229.06:45:57.62#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.06:45:57.62#ibcon#[25=AT08-06\r\n] 2006.229.06:45:57.62#ibcon#*before write, iclass 31, count 2 2006.229.06:45:57.62#ibcon#enter sib2, iclass 31, count 2 2006.229.06:45:57.62#ibcon#flushed, iclass 31, count 2 2006.229.06:45:57.62#ibcon#about to write, iclass 31, count 2 2006.229.06:45:57.62#ibcon#wrote, iclass 31, count 2 2006.229.06:45:57.62#ibcon#about to read 3, iclass 31, count 2 2006.229.06:45:57.65#ibcon#read 3, iclass 31, count 2 2006.229.06:45:57.65#ibcon#about to read 4, iclass 31, count 2 2006.229.06:45:57.65#ibcon#read 4, iclass 31, count 2 2006.229.06:45:57.65#ibcon#about to read 5, iclass 31, count 2 2006.229.06:45:57.65#ibcon#read 5, iclass 31, count 2 2006.229.06:45:57.65#ibcon#about to read 6, iclass 31, count 2 2006.229.06:45:57.65#ibcon#read 6, iclass 31, count 2 2006.229.06:45:57.65#ibcon#end of sib2, iclass 31, count 2 2006.229.06:45:57.65#ibcon#*after write, iclass 31, count 2 2006.229.06:45:57.65#ibcon#*before return 0, iclass 31, count 2 2006.229.06:45:57.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:45:57.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.06:45:57.65#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.06:45:57.65#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:57.65#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:45:57.77#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:45:57.77#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:45:57.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:45:57.77#ibcon#first serial, iclass 31, count 0 2006.229.06:45:57.77#ibcon#enter sib2, iclass 31, count 0 2006.229.06:45:57.77#ibcon#flushed, iclass 31, count 0 2006.229.06:45:57.77#ibcon#about to write, iclass 31, count 0 2006.229.06:45:57.77#ibcon#wrote, iclass 31, count 0 2006.229.06:45:57.77#ibcon#about to read 3, iclass 31, count 0 2006.229.06:45:57.79#ibcon#read 3, iclass 31, count 0 2006.229.06:45:57.79#ibcon#about to read 4, iclass 31, count 0 2006.229.06:45:57.79#ibcon#read 4, iclass 31, count 0 2006.229.06:45:57.79#ibcon#about to read 5, iclass 31, count 0 2006.229.06:45:57.79#ibcon#read 5, iclass 31, count 0 2006.229.06:45:57.79#ibcon#about to read 6, iclass 31, count 0 2006.229.06:45:57.79#ibcon#read 6, iclass 31, count 0 2006.229.06:45:57.79#ibcon#end of sib2, iclass 31, count 0 2006.229.06:45:57.79#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:45:57.79#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:45:57.79#ibcon#[25=USB\r\n] 2006.229.06:45:57.79#ibcon#*before write, iclass 31, count 0 2006.229.06:45:57.79#ibcon#enter sib2, iclass 31, count 0 2006.229.06:45:57.79#ibcon#flushed, iclass 31, count 0 2006.229.06:45:57.79#ibcon#about to write, iclass 31, count 0 2006.229.06:45:57.79#ibcon#wrote, iclass 31, count 0 2006.229.06:45:57.79#ibcon#about to read 3, iclass 31, count 0 2006.229.06:45:57.82#ibcon#read 3, iclass 31, count 0 2006.229.06:45:57.82#ibcon#about to read 4, iclass 31, count 0 2006.229.06:45:57.82#ibcon#read 4, iclass 31, count 0 2006.229.06:45:57.82#ibcon#about to read 5, iclass 31, count 0 2006.229.06:45:57.82#ibcon#read 5, iclass 31, count 0 2006.229.06:45:57.82#ibcon#about to read 6, iclass 31, count 0 2006.229.06:45:57.82#ibcon#read 6, iclass 31, count 0 2006.229.06:45:57.82#ibcon#end of sib2, iclass 31, count 0 2006.229.06:45:57.82#ibcon#*after write, iclass 31, count 0 2006.229.06:45:57.82#ibcon#*before return 0, iclass 31, count 0 2006.229.06:45:57.82#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:45:57.82#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.06:45:57.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:45:57.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:45:57.82$vck44/vblo=1,629.99 2006.229.06:45:57.82#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.06:45:57.82#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.06:45:57.82#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:57.82#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:57.82#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:57.82#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:57.82#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:45:57.82#ibcon#first serial, iclass 33, count 0 2006.229.06:45:57.82#ibcon#enter sib2, iclass 33, count 0 2006.229.06:45:57.82#ibcon#flushed, iclass 33, count 0 2006.229.06:45:57.82#ibcon#about to write, iclass 33, count 0 2006.229.06:45:57.82#ibcon#wrote, iclass 33, count 0 2006.229.06:45:57.82#ibcon#about to read 3, iclass 33, count 0 2006.229.06:45:57.84#ibcon#read 3, iclass 33, count 0 2006.229.06:45:57.84#ibcon#about to read 4, iclass 33, count 0 2006.229.06:45:57.84#ibcon#read 4, iclass 33, count 0 2006.229.06:45:57.84#ibcon#about to read 5, iclass 33, count 0 2006.229.06:45:57.84#ibcon#read 5, iclass 33, count 0 2006.229.06:45:57.84#ibcon#about to read 6, iclass 33, count 0 2006.229.06:45:57.84#ibcon#read 6, iclass 33, count 0 2006.229.06:45:57.84#ibcon#end of sib2, iclass 33, count 0 2006.229.06:45:57.84#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:45:57.84#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:45:57.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:45:57.84#ibcon#*before write, iclass 33, count 0 2006.229.06:45:57.84#ibcon#enter sib2, iclass 33, count 0 2006.229.06:45:57.84#ibcon#flushed, iclass 33, count 0 2006.229.06:45:57.84#ibcon#about to write, iclass 33, count 0 2006.229.06:45:57.84#ibcon#wrote, iclass 33, count 0 2006.229.06:45:57.84#ibcon#about to read 3, iclass 33, count 0 2006.229.06:45:57.88#ibcon#read 3, iclass 33, count 0 2006.229.06:45:57.88#ibcon#about to read 4, iclass 33, count 0 2006.229.06:45:57.88#ibcon#read 4, iclass 33, count 0 2006.229.06:45:57.88#ibcon#about to read 5, iclass 33, count 0 2006.229.06:45:57.88#ibcon#read 5, iclass 33, count 0 2006.229.06:45:57.88#ibcon#about to read 6, iclass 33, count 0 2006.229.06:45:57.88#ibcon#read 6, iclass 33, count 0 2006.229.06:45:57.88#ibcon#end of sib2, iclass 33, count 0 2006.229.06:45:57.88#ibcon#*after write, iclass 33, count 0 2006.229.06:45:57.88#ibcon#*before return 0, iclass 33, count 0 2006.229.06:45:57.88#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:57.88#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.06:45:57.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:45:57.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:45:57.88$vck44/vb=1,4 2006.229.06:45:57.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.06:45:57.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.06:45:57.88#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:57.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:57.88#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:57.88#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:57.88#ibcon#enter wrdev, iclass 35, count 2 2006.229.06:45:57.88#ibcon#first serial, iclass 35, count 2 2006.229.06:45:57.88#ibcon#enter sib2, iclass 35, count 2 2006.229.06:45:57.88#ibcon#flushed, iclass 35, count 2 2006.229.06:45:57.88#ibcon#about to write, iclass 35, count 2 2006.229.06:45:57.88#ibcon#wrote, iclass 35, count 2 2006.229.06:45:57.88#ibcon#about to read 3, iclass 35, count 2 2006.229.06:45:57.90#ibcon#read 3, iclass 35, count 2 2006.229.06:45:57.90#ibcon#about to read 4, iclass 35, count 2 2006.229.06:45:57.90#ibcon#read 4, iclass 35, count 2 2006.229.06:45:57.90#ibcon#about to read 5, iclass 35, count 2 2006.229.06:45:57.90#ibcon#read 5, iclass 35, count 2 2006.229.06:45:57.90#ibcon#about to read 6, iclass 35, count 2 2006.229.06:45:57.90#ibcon#read 6, iclass 35, count 2 2006.229.06:45:57.90#ibcon#end of sib2, iclass 35, count 2 2006.229.06:45:57.90#ibcon#*mode == 0, iclass 35, count 2 2006.229.06:45:57.90#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.06:45:57.90#ibcon#[27=AT01-04\r\n] 2006.229.06:45:57.90#ibcon#*before write, iclass 35, count 2 2006.229.06:45:57.90#ibcon#enter sib2, iclass 35, count 2 2006.229.06:45:57.90#ibcon#flushed, iclass 35, count 2 2006.229.06:45:57.90#ibcon#about to write, iclass 35, count 2 2006.229.06:45:57.90#ibcon#wrote, iclass 35, count 2 2006.229.06:45:57.90#ibcon#about to read 3, iclass 35, count 2 2006.229.06:45:57.93#ibcon#read 3, iclass 35, count 2 2006.229.06:45:57.93#ibcon#about to read 4, iclass 35, count 2 2006.229.06:45:57.93#ibcon#read 4, iclass 35, count 2 2006.229.06:45:57.93#ibcon#about to read 5, iclass 35, count 2 2006.229.06:45:57.93#ibcon#read 5, iclass 35, count 2 2006.229.06:45:57.93#ibcon#about to read 6, iclass 35, count 2 2006.229.06:45:57.93#ibcon#read 6, iclass 35, count 2 2006.229.06:45:57.93#ibcon#end of sib2, iclass 35, count 2 2006.229.06:45:57.93#ibcon#*after write, iclass 35, count 2 2006.229.06:45:57.93#ibcon#*before return 0, iclass 35, count 2 2006.229.06:45:57.93#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:57.93#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.06:45:57.93#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.06:45:57.93#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:57.93#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:58.05#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:58.05#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:58.05#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:45:58.05#ibcon#first serial, iclass 35, count 0 2006.229.06:45:58.05#ibcon#enter sib2, iclass 35, count 0 2006.229.06:45:58.05#ibcon#flushed, iclass 35, count 0 2006.229.06:45:58.05#ibcon#about to write, iclass 35, count 0 2006.229.06:45:58.05#ibcon#wrote, iclass 35, count 0 2006.229.06:45:58.05#ibcon#about to read 3, iclass 35, count 0 2006.229.06:45:58.07#ibcon#read 3, iclass 35, count 0 2006.229.06:45:58.07#ibcon#about to read 4, iclass 35, count 0 2006.229.06:45:58.07#ibcon#read 4, iclass 35, count 0 2006.229.06:45:58.07#ibcon#about to read 5, iclass 35, count 0 2006.229.06:45:58.07#ibcon#read 5, iclass 35, count 0 2006.229.06:45:58.07#ibcon#about to read 6, iclass 35, count 0 2006.229.06:45:58.07#ibcon#read 6, iclass 35, count 0 2006.229.06:45:58.07#ibcon#end of sib2, iclass 35, count 0 2006.229.06:45:58.07#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:45:58.07#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:45:58.07#ibcon#[27=USB\r\n] 2006.229.06:45:58.07#ibcon#*before write, iclass 35, count 0 2006.229.06:45:58.07#ibcon#enter sib2, iclass 35, count 0 2006.229.06:45:58.07#ibcon#flushed, iclass 35, count 0 2006.229.06:45:58.07#ibcon#about to write, iclass 35, count 0 2006.229.06:45:58.07#ibcon#wrote, iclass 35, count 0 2006.229.06:45:58.07#ibcon#about to read 3, iclass 35, count 0 2006.229.06:45:58.10#ibcon#read 3, iclass 35, count 0 2006.229.06:45:58.10#ibcon#about to read 4, iclass 35, count 0 2006.229.06:45:58.10#ibcon#read 4, iclass 35, count 0 2006.229.06:45:58.10#ibcon#about to read 5, iclass 35, count 0 2006.229.06:45:58.10#ibcon#read 5, iclass 35, count 0 2006.229.06:45:58.10#ibcon#about to read 6, iclass 35, count 0 2006.229.06:45:58.10#ibcon#read 6, iclass 35, count 0 2006.229.06:45:58.10#ibcon#end of sib2, iclass 35, count 0 2006.229.06:45:58.10#ibcon#*after write, iclass 35, count 0 2006.229.06:45:58.10#ibcon#*before return 0, iclass 35, count 0 2006.229.06:45:58.10#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:58.10#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.06:45:58.10#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:45:58.10#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:45:58.10$vck44/vblo=2,634.99 2006.229.06:45:58.10#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.06:45:58.10#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.06:45:58.10#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:58.10#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:58.10#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:58.10#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:58.10#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:45:58.10#ibcon#first serial, iclass 37, count 0 2006.229.06:45:58.10#ibcon#enter sib2, iclass 37, count 0 2006.229.06:45:58.10#ibcon#flushed, iclass 37, count 0 2006.229.06:45:58.10#ibcon#about to write, iclass 37, count 0 2006.229.06:45:58.10#ibcon#wrote, iclass 37, count 0 2006.229.06:45:58.10#ibcon#about to read 3, iclass 37, count 0 2006.229.06:45:58.12#ibcon#read 3, iclass 37, count 0 2006.229.06:45:58.12#ibcon#about to read 4, iclass 37, count 0 2006.229.06:45:58.12#ibcon#read 4, iclass 37, count 0 2006.229.06:45:58.12#ibcon#about to read 5, iclass 37, count 0 2006.229.06:45:58.12#ibcon#read 5, iclass 37, count 0 2006.229.06:45:58.12#ibcon#about to read 6, iclass 37, count 0 2006.229.06:45:58.12#ibcon#read 6, iclass 37, count 0 2006.229.06:45:58.12#ibcon#end of sib2, iclass 37, count 0 2006.229.06:45:58.12#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:45:58.12#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:45:58.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:45:58.12#ibcon#*before write, iclass 37, count 0 2006.229.06:45:58.12#ibcon#enter sib2, iclass 37, count 0 2006.229.06:45:58.12#ibcon#flushed, iclass 37, count 0 2006.229.06:45:58.12#ibcon#about to write, iclass 37, count 0 2006.229.06:45:58.12#ibcon#wrote, iclass 37, count 0 2006.229.06:45:58.12#ibcon#about to read 3, iclass 37, count 0 2006.229.06:45:58.16#ibcon#read 3, iclass 37, count 0 2006.229.06:45:58.16#ibcon#about to read 4, iclass 37, count 0 2006.229.06:45:58.16#ibcon#read 4, iclass 37, count 0 2006.229.06:45:58.16#ibcon#about to read 5, iclass 37, count 0 2006.229.06:45:58.16#ibcon#read 5, iclass 37, count 0 2006.229.06:45:58.16#ibcon#about to read 6, iclass 37, count 0 2006.229.06:45:58.16#ibcon#read 6, iclass 37, count 0 2006.229.06:45:58.16#ibcon#end of sib2, iclass 37, count 0 2006.229.06:45:58.16#ibcon#*after write, iclass 37, count 0 2006.229.06:45:58.16#ibcon#*before return 0, iclass 37, count 0 2006.229.06:45:58.16#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:58.16#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.06:45:58.16#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:45:58.16#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:45:58.16$vck44/vb=2,4 2006.229.06:45:58.16#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.06:45:58.16#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.06:45:58.16#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:58.16#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:58.22#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:58.22#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:58.22#ibcon#enter wrdev, iclass 39, count 2 2006.229.06:45:58.22#ibcon#first serial, iclass 39, count 2 2006.229.06:45:58.22#ibcon#enter sib2, iclass 39, count 2 2006.229.06:45:58.22#ibcon#flushed, iclass 39, count 2 2006.229.06:45:58.22#ibcon#about to write, iclass 39, count 2 2006.229.06:45:58.22#ibcon#wrote, iclass 39, count 2 2006.229.06:45:58.22#ibcon#about to read 3, iclass 39, count 2 2006.229.06:45:58.24#ibcon#read 3, iclass 39, count 2 2006.229.06:45:58.24#ibcon#about to read 4, iclass 39, count 2 2006.229.06:45:58.24#ibcon#read 4, iclass 39, count 2 2006.229.06:45:58.24#ibcon#about to read 5, iclass 39, count 2 2006.229.06:45:58.24#ibcon#read 5, iclass 39, count 2 2006.229.06:45:58.24#ibcon#about to read 6, iclass 39, count 2 2006.229.06:45:58.24#ibcon#read 6, iclass 39, count 2 2006.229.06:45:58.24#ibcon#end of sib2, iclass 39, count 2 2006.229.06:45:58.24#ibcon#*mode == 0, iclass 39, count 2 2006.229.06:45:58.24#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.06:45:58.24#ibcon#[27=AT02-04\r\n] 2006.229.06:45:58.24#ibcon#*before write, iclass 39, count 2 2006.229.06:45:58.24#ibcon#enter sib2, iclass 39, count 2 2006.229.06:45:58.24#ibcon#flushed, iclass 39, count 2 2006.229.06:45:58.24#ibcon#about to write, iclass 39, count 2 2006.229.06:45:58.24#ibcon#wrote, iclass 39, count 2 2006.229.06:45:58.24#ibcon#about to read 3, iclass 39, count 2 2006.229.06:45:58.27#ibcon#read 3, iclass 39, count 2 2006.229.06:45:58.27#ibcon#about to read 4, iclass 39, count 2 2006.229.06:45:58.27#ibcon#read 4, iclass 39, count 2 2006.229.06:45:58.27#ibcon#about to read 5, iclass 39, count 2 2006.229.06:45:58.27#ibcon#read 5, iclass 39, count 2 2006.229.06:45:58.27#ibcon#about to read 6, iclass 39, count 2 2006.229.06:45:58.27#ibcon#read 6, iclass 39, count 2 2006.229.06:45:58.27#ibcon#end of sib2, iclass 39, count 2 2006.229.06:45:58.27#ibcon#*after write, iclass 39, count 2 2006.229.06:45:58.27#ibcon#*before return 0, iclass 39, count 2 2006.229.06:45:58.27#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:58.27#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.06:45:58.27#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.06:45:58.27#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:58.27#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:58.39#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:58.39#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:58.39#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:45:58.39#ibcon#first serial, iclass 39, count 0 2006.229.06:45:58.39#ibcon#enter sib2, iclass 39, count 0 2006.229.06:45:58.39#ibcon#flushed, iclass 39, count 0 2006.229.06:45:58.39#ibcon#about to write, iclass 39, count 0 2006.229.06:45:58.39#ibcon#wrote, iclass 39, count 0 2006.229.06:45:58.39#ibcon#about to read 3, iclass 39, count 0 2006.229.06:45:58.41#ibcon#read 3, iclass 39, count 0 2006.229.06:45:58.41#ibcon#about to read 4, iclass 39, count 0 2006.229.06:45:58.41#ibcon#read 4, iclass 39, count 0 2006.229.06:45:58.41#ibcon#about to read 5, iclass 39, count 0 2006.229.06:45:58.41#ibcon#read 5, iclass 39, count 0 2006.229.06:45:58.41#ibcon#about to read 6, iclass 39, count 0 2006.229.06:45:58.41#ibcon#read 6, iclass 39, count 0 2006.229.06:45:58.41#ibcon#end of sib2, iclass 39, count 0 2006.229.06:45:58.41#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:45:58.41#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:45:58.41#ibcon#[27=USB\r\n] 2006.229.06:45:58.41#ibcon#*before write, iclass 39, count 0 2006.229.06:45:58.41#ibcon#enter sib2, iclass 39, count 0 2006.229.06:45:58.41#ibcon#flushed, iclass 39, count 0 2006.229.06:45:58.41#ibcon#about to write, iclass 39, count 0 2006.229.06:45:58.41#ibcon#wrote, iclass 39, count 0 2006.229.06:45:58.41#ibcon#about to read 3, iclass 39, count 0 2006.229.06:45:58.44#ibcon#read 3, iclass 39, count 0 2006.229.06:45:58.44#ibcon#about to read 4, iclass 39, count 0 2006.229.06:45:58.44#ibcon#read 4, iclass 39, count 0 2006.229.06:45:58.44#ibcon#about to read 5, iclass 39, count 0 2006.229.06:45:58.44#ibcon#read 5, iclass 39, count 0 2006.229.06:45:58.44#ibcon#about to read 6, iclass 39, count 0 2006.229.06:45:58.44#ibcon#read 6, iclass 39, count 0 2006.229.06:45:58.44#ibcon#end of sib2, iclass 39, count 0 2006.229.06:45:58.44#ibcon#*after write, iclass 39, count 0 2006.229.06:45:58.44#ibcon#*before return 0, iclass 39, count 0 2006.229.06:45:58.44#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:58.44#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.06:45:58.44#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:45:58.44#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:45:58.44$vck44/vblo=3,649.99 2006.229.06:45:58.44#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.06:45:58.44#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.06:45:58.44#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:58.44#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:45:58.44#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:45:58.44#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:45:58.44#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:45:58.44#ibcon#first serial, iclass 3, count 0 2006.229.06:45:58.44#ibcon#enter sib2, iclass 3, count 0 2006.229.06:45:58.44#ibcon#flushed, iclass 3, count 0 2006.229.06:45:58.44#ibcon#about to write, iclass 3, count 0 2006.229.06:45:58.44#ibcon#wrote, iclass 3, count 0 2006.229.06:45:58.44#ibcon#about to read 3, iclass 3, count 0 2006.229.06:45:58.46#ibcon#read 3, iclass 3, count 0 2006.229.06:45:58.46#ibcon#about to read 4, iclass 3, count 0 2006.229.06:45:58.46#ibcon#read 4, iclass 3, count 0 2006.229.06:45:58.46#ibcon#about to read 5, iclass 3, count 0 2006.229.06:45:58.46#ibcon#read 5, iclass 3, count 0 2006.229.06:45:58.46#ibcon#about to read 6, iclass 3, count 0 2006.229.06:45:58.46#ibcon#read 6, iclass 3, count 0 2006.229.06:45:58.46#ibcon#end of sib2, iclass 3, count 0 2006.229.06:45:58.46#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:45:58.46#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:45:58.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:45:58.46#ibcon#*before write, iclass 3, count 0 2006.229.06:45:58.46#ibcon#enter sib2, iclass 3, count 0 2006.229.06:45:58.46#ibcon#flushed, iclass 3, count 0 2006.229.06:45:58.46#ibcon#about to write, iclass 3, count 0 2006.229.06:45:58.46#ibcon#wrote, iclass 3, count 0 2006.229.06:45:58.46#ibcon#about to read 3, iclass 3, count 0 2006.229.06:45:58.50#ibcon#read 3, iclass 3, count 0 2006.229.06:45:58.50#ibcon#about to read 4, iclass 3, count 0 2006.229.06:45:58.50#ibcon#read 4, iclass 3, count 0 2006.229.06:45:58.50#ibcon#about to read 5, iclass 3, count 0 2006.229.06:45:58.50#ibcon#read 5, iclass 3, count 0 2006.229.06:45:58.50#ibcon#about to read 6, iclass 3, count 0 2006.229.06:45:58.50#ibcon#read 6, iclass 3, count 0 2006.229.06:45:58.50#ibcon#end of sib2, iclass 3, count 0 2006.229.06:45:58.50#ibcon#*after write, iclass 3, count 0 2006.229.06:45:58.50#ibcon#*before return 0, iclass 3, count 0 2006.229.06:45:58.50#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:45:58.50#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.06:45:58.50#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:45:58.50#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:45:58.50$vck44/vb=3,4 2006.229.06:45:58.50#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.06:45:58.50#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.06:45:58.50#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:58.50#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:45:58.56#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:45:58.56#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:45:58.56#ibcon#enter wrdev, iclass 5, count 2 2006.229.06:45:58.56#ibcon#first serial, iclass 5, count 2 2006.229.06:45:58.56#ibcon#enter sib2, iclass 5, count 2 2006.229.06:45:58.56#ibcon#flushed, iclass 5, count 2 2006.229.06:45:58.56#ibcon#about to write, iclass 5, count 2 2006.229.06:45:58.56#ibcon#wrote, iclass 5, count 2 2006.229.06:45:58.56#ibcon#about to read 3, iclass 5, count 2 2006.229.06:45:58.58#ibcon#read 3, iclass 5, count 2 2006.229.06:45:58.58#ibcon#about to read 4, iclass 5, count 2 2006.229.06:45:58.58#ibcon#read 4, iclass 5, count 2 2006.229.06:45:58.58#ibcon#about to read 5, iclass 5, count 2 2006.229.06:45:58.58#ibcon#read 5, iclass 5, count 2 2006.229.06:45:58.58#ibcon#about to read 6, iclass 5, count 2 2006.229.06:45:58.58#ibcon#read 6, iclass 5, count 2 2006.229.06:45:58.58#ibcon#end of sib2, iclass 5, count 2 2006.229.06:45:58.58#ibcon#*mode == 0, iclass 5, count 2 2006.229.06:45:58.58#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.06:45:58.58#ibcon#[27=AT03-04\r\n] 2006.229.06:45:58.58#ibcon#*before write, iclass 5, count 2 2006.229.06:45:58.58#ibcon#enter sib2, iclass 5, count 2 2006.229.06:45:58.58#ibcon#flushed, iclass 5, count 2 2006.229.06:45:58.58#ibcon#about to write, iclass 5, count 2 2006.229.06:45:58.58#ibcon#wrote, iclass 5, count 2 2006.229.06:45:58.58#ibcon#about to read 3, iclass 5, count 2 2006.229.06:45:58.61#ibcon#read 3, iclass 5, count 2 2006.229.06:45:58.61#ibcon#about to read 4, iclass 5, count 2 2006.229.06:45:58.61#ibcon#read 4, iclass 5, count 2 2006.229.06:45:58.61#ibcon#about to read 5, iclass 5, count 2 2006.229.06:45:58.61#ibcon#read 5, iclass 5, count 2 2006.229.06:45:58.61#ibcon#about to read 6, iclass 5, count 2 2006.229.06:45:58.61#ibcon#read 6, iclass 5, count 2 2006.229.06:45:58.61#ibcon#end of sib2, iclass 5, count 2 2006.229.06:45:58.61#ibcon#*after write, iclass 5, count 2 2006.229.06:45:58.61#ibcon#*before return 0, iclass 5, count 2 2006.229.06:45:58.61#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:45:58.61#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.06:45:58.61#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.06:45:58.61#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:58.61#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:45:58.73#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:45:58.73#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:45:58.73#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:45:58.73#ibcon#first serial, iclass 5, count 0 2006.229.06:45:58.73#ibcon#enter sib2, iclass 5, count 0 2006.229.06:45:58.73#ibcon#flushed, iclass 5, count 0 2006.229.06:45:58.73#ibcon#about to write, iclass 5, count 0 2006.229.06:45:58.73#ibcon#wrote, iclass 5, count 0 2006.229.06:45:58.73#ibcon#about to read 3, iclass 5, count 0 2006.229.06:45:58.75#ibcon#read 3, iclass 5, count 0 2006.229.06:45:58.75#ibcon#about to read 4, iclass 5, count 0 2006.229.06:45:58.75#ibcon#read 4, iclass 5, count 0 2006.229.06:45:58.75#ibcon#about to read 5, iclass 5, count 0 2006.229.06:45:58.75#ibcon#read 5, iclass 5, count 0 2006.229.06:45:58.75#ibcon#about to read 6, iclass 5, count 0 2006.229.06:45:58.75#ibcon#read 6, iclass 5, count 0 2006.229.06:45:58.75#ibcon#end of sib2, iclass 5, count 0 2006.229.06:45:58.75#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:45:58.75#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:45:58.75#ibcon#[27=USB\r\n] 2006.229.06:45:58.75#ibcon#*before write, iclass 5, count 0 2006.229.06:45:58.75#ibcon#enter sib2, iclass 5, count 0 2006.229.06:45:58.75#ibcon#flushed, iclass 5, count 0 2006.229.06:45:58.75#ibcon#about to write, iclass 5, count 0 2006.229.06:45:58.75#ibcon#wrote, iclass 5, count 0 2006.229.06:45:58.75#ibcon#about to read 3, iclass 5, count 0 2006.229.06:45:58.78#ibcon#read 3, iclass 5, count 0 2006.229.06:45:58.78#ibcon#about to read 4, iclass 5, count 0 2006.229.06:45:58.78#ibcon#read 4, iclass 5, count 0 2006.229.06:45:58.78#ibcon#about to read 5, iclass 5, count 0 2006.229.06:45:58.78#ibcon#read 5, iclass 5, count 0 2006.229.06:45:58.78#ibcon#about to read 6, iclass 5, count 0 2006.229.06:45:58.78#ibcon#read 6, iclass 5, count 0 2006.229.06:45:58.78#ibcon#end of sib2, iclass 5, count 0 2006.229.06:45:58.78#ibcon#*after write, iclass 5, count 0 2006.229.06:45:58.78#ibcon#*before return 0, iclass 5, count 0 2006.229.06:45:58.78#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:45:58.78#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.06:45:58.78#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:45:58.78#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:45:58.78$vck44/vblo=4,679.99 2006.229.06:45:58.78#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.06:45:58.78#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.06:45:58.78#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:58.78#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:58.78#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:58.78#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:58.78#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:45:58.78#ibcon#first serial, iclass 7, count 0 2006.229.06:45:58.78#ibcon#enter sib2, iclass 7, count 0 2006.229.06:45:58.78#ibcon#flushed, iclass 7, count 0 2006.229.06:45:58.78#ibcon#about to write, iclass 7, count 0 2006.229.06:45:58.78#ibcon#wrote, iclass 7, count 0 2006.229.06:45:58.78#ibcon#about to read 3, iclass 7, count 0 2006.229.06:45:58.80#ibcon#read 3, iclass 7, count 0 2006.229.06:45:58.80#ibcon#about to read 4, iclass 7, count 0 2006.229.06:45:58.80#ibcon#read 4, iclass 7, count 0 2006.229.06:45:58.80#ibcon#about to read 5, iclass 7, count 0 2006.229.06:45:58.80#ibcon#read 5, iclass 7, count 0 2006.229.06:45:58.80#ibcon#about to read 6, iclass 7, count 0 2006.229.06:45:58.80#ibcon#read 6, iclass 7, count 0 2006.229.06:45:58.80#ibcon#end of sib2, iclass 7, count 0 2006.229.06:45:58.80#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:45:58.80#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:45:58.80#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:45:58.80#ibcon#*before write, iclass 7, count 0 2006.229.06:45:58.80#ibcon#enter sib2, iclass 7, count 0 2006.229.06:45:58.80#ibcon#flushed, iclass 7, count 0 2006.229.06:45:58.80#ibcon#about to write, iclass 7, count 0 2006.229.06:45:58.80#ibcon#wrote, iclass 7, count 0 2006.229.06:45:58.80#ibcon#about to read 3, iclass 7, count 0 2006.229.06:45:58.84#ibcon#read 3, iclass 7, count 0 2006.229.06:45:58.84#ibcon#about to read 4, iclass 7, count 0 2006.229.06:45:58.84#ibcon#read 4, iclass 7, count 0 2006.229.06:45:58.84#ibcon#about to read 5, iclass 7, count 0 2006.229.06:45:58.84#ibcon#read 5, iclass 7, count 0 2006.229.06:45:58.84#ibcon#about to read 6, iclass 7, count 0 2006.229.06:45:58.84#ibcon#read 6, iclass 7, count 0 2006.229.06:45:58.84#ibcon#end of sib2, iclass 7, count 0 2006.229.06:45:58.84#ibcon#*after write, iclass 7, count 0 2006.229.06:45:58.84#ibcon#*before return 0, iclass 7, count 0 2006.229.06:45:58.84#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:58.84#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.06:45:58.84#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:45:58.84#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:45:58.84$vck44/vb=4,4 2006.229.06:45:58.84#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.06:45:58.84#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.06:45:58.84#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:58.84#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:58.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:58.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:58.90#ibcon#enter wrdev, iclass 11, count 2 2006.229.06:45:58.90#ibcon#first serial, iclass 11, count 2 2006.229.06:45:58.90#ibcon#enter sib2, iclass 11, count 2 2006.229.06:45:58.90#ibcon#flushed, iclass 11, count 2 2006.229.06:45:58.90#ibcon#about to write, iclass 11, count 2 2006.229.06:45:58.90#ibcon#wrote, iclass 11, count 2 2006.229.06:45:58.90#ibcon#about to read 3, iclass 11, count 2 2006.229.06:45:58.92#ibcon#read 3, iclass 11, count 2 2006.229.06:45:58.92#ibcon#about to read 4, iclass 11, count 2 2006.229.06:45:58.92#ibcon#read 4, iclass 11, count 2 2006.229.06:45:58.92#ibcon#about to read 5, iclass 11, count 2 2006.229.06:45:58.92#ibcon#read 5, iclass 11, count 2 2006.229.06:45:58.92#ibcon#about to read 6, iclass 11, count 2 2006.229.06:45:58.92#ibcon#read 6, iclass 11, count 2 2006.229.06:45:58.92#ibcon#end of sib2, iclass 11, count 2 2006.229.06:45:58.92#ibcon#*mode == 0, iclass 11, count 2 2006.229.06:45:58.92#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.06:45:58.92#ibcon#[27=AT04-04\r\n] 2006.229.06:45:58.92#ibcon#*before write, iclass 11, count 2 2006.229.06:45:58.92#ibcon#enter sib2, iclass 11, count 2 2006.229.06:45:58.92#ibcon#flushed, iclass 11, count 2 2006.229.06:45:58.92#ibcon#about to write, iclass 11, count 2 2006.229.06:45:58.92#ibcon#wrote, iclass 11, count 2 2006.229.06:45:58.92#ibcon#about to read 3, iclass 11, count 2 2006.229.06:45:58.95#ibcon#read 3, iclass 11, count 2 2006.229.06:45:58.95#ibcon#about to read 4, iclass 11, count 2 2006.229.06:45:58.95#ibcon#read 4, iclass 11, count 2 2006.229.06:45:58.95#ibcon#about to read 5, iclass 11, count 2 2006.229.06:45:58.95#ibcon#read 5, iclass 11, count 2 2006.229.06:45:58.95#ibcon#about to read 6, iclass 11, count 2 2006.229.06:45:58.95#ibcon#read 6, iclass 11, count 2 2006.229.06:45:58.95#ibcon#end of sib2, iclass 11, count 2 2006.229.06:45:58.95#ibcon#*after write, iclass 11, count 2 2006.229.06:45:58.95#ibcon#*before return 0, iclass 11, count 2 2006.229.06:45:58.95#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:58.95#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.06:45:58.95#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.06:45:58.95#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:58.95#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:59.07#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:59.07#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:59.07#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:45:59.07#ibcon#first serial, iclass 11, count 0 2006.229.06:45:59.07#ibcon#enter sib2, iclass 11, count 0 2006.229.06:45:59.07#ibcon#flushed, iclass 11, count 0 2006.229.06:45:59.07#ibcon#about to write, iclass 11, count 0 2006.229.06:45:59.07#ibcon#wrote, iclass 11, count 0 2006.229.06:45:59.07#ibcon#about to read 3, iclass 11, count 0 2006.229.06:45:59.09#ibcon#read 3, iclass 11, count 0 2006.229.06:45:59.09#ibcon#about to read 4, iclass 11, count 0 2006.229.06:45:59.09#ibcon#read 4, iclass 11, count 0 2006.229.06:45:59.09#ibcon#about to read 5, iclass 11, count 0 2006.229.06:45:59.09#ibcon#read 5, iclass 11, count 0 2006.229.06:45:59.09#ibcon#about to read 6, iclass 11, count 0 2006.229.06:45:59.09#ibcon#read 6, iclass 11, count 0 2006.229.06:45:59.09#ibcon#end of sib2, iclass 11, count 0 2006.229.06:45:59.09#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:45:59.09#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:45:59.09#ibcon#[27=USB\r\n] 2006.229.06:45:59.09#ibcon#*before write, iclass 11, count 0 2006.229.06:45:59.09#ibcon#enter sib2, iclass 11, count 0 2006.229.06:45:59.09#ibcon#flushed, iclass 11, count 0 2006.229.06:45:59.09#ibcon#about to write, iclass 11, count 0 2006.229.06:45:59.09#ibcon#wrote, iclass 11, count 0 2006.229.06:45:59.09#ibcon#about to read 3, iclass 11, count 0 2006.229.06:45:59.12#ibcon#read 3, iclass 11, count 0 2006.229.06:45:59.12#ibcon#about to read 4, iclass 11, count 0 2006.229.06:45:59.12#ibcon#read 4, iclass 11, count 0 2006.229.06:45:59.12#ibcon#about to read 5, iclass 11, count 0 2006.229.06:45:59.12#ibcon#read 5, iclass 11, count 0 2006.229.06:45:59.12#ibcon#about to read 6, iclass 11, count 0 2006.229.06:45:59.12#ibcon#read 6, iclass 11, count 0 2006.229.06:45:59.12#ibcon#end of sib2, iclass 11, count 0 2006.229.06:45:59.12#ibcon#*after write, iclass 11, count 0 2006.229.06:45:59.12#ibcon#*before return 0, iclass 11, count 0 2006.229.06:45:59.12#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:59.12#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.06:45:59.12#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:45:59.12#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:45:59.12$vck44/vblo=5,709.99 2006.229.06:45:59.12#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.06:45:59.12#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.06:45:59.12#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:59.12#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:59.12#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:59.12#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:59.12#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:45:59.12#ibcon#first serial, iclass 13, count 0 2006.229.06:45:59.12#ibcon#enter sib2, iclass 13, count 0 2006.229.06:45:59.12#ibcon#flushed, iclass 13, count 0 2006.229.06:45:59.12#ibcon#about to write, iclass 13, count 0 2006.229.06:45:59.12#ibcon#wrote, iclass 13, count 0 2006.229.06:45:59.12#ibcon#about to read 3, iclass 13, count 0 2006.229.06:45:59.14#ibcon#read 3, iclass 13, count 0 2006.229.06:45:59.14#ibcon#about to read 4, iclass 13, count 0 2006.229.06:45:59.14#ibcon#read 4, iclass 13, count 0 2006.229.06:45:59.14#ibcon#about to read 5, iclass 13, count 0 2006.229.06:45:59.14#ibcon#read 5, iclass 13, count 0 2006.229.06:45:59.14#ibcon#about to read 6, iclass 13, count 0 2006.229.06:45:59.14#ibcon#read 6, iclass 13, count 0 2006.229.06:45:59.14#ibcon#end of sib2, iclass 13, count 0 2006.229.06:45:59.14#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:45:59.14#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:45:59.14#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:45:59.14#ibcon#*before write, iclass 13, count 0 2006.229.06:45:59.14#ibcon#enter sib2, iclass 13, count 0 2006.229.06:45:59.14#ibcon#flushed, iclass 13, count 0 2006.229.06:45:59.14#ibcon#about to write, iclass 13, count 0 2006.229.06:45:59.14#ibcon#wrote, iclass 13, count 0 2006.229.06:45:59.14#ibcon#about to read 3, iclass 13, count 0 2006.229.06:45:59.18#ibcon#read 3, iclass 13, count 0 2006.229.06:45:59.18#ibcon#about to read 4, iclass 13, count 0 2006.229.06:45:59.18#ibcon#read 4, iclass 13, count 0 2006.229.06:45:59.18#ibcon#about to read 5, iclass 13, count 0 2006.229.06:45:59.18#ibcon#read 5, iclass 13, count 0 2006.229.06:45:59.18#ibcon#about to read 6, iclass 13, count 0 2006.229.06:45:59.18#ibcon#read 6, iclass 13, count 0 2006.229.06:45:59.18#ibcon#end of sib2, iclass 13, count 0 2006.229.06:45:59.18#ibcon#*after write, iclass 13, count 0 2006.229.06:45:59.18#ibcon#*before return 0, iclass 13, count 0 2006.229.06:45:59.18#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:59.18#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.06:45:59.18#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:45:59.18#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:45:59.18$vck44/vb=5,4 2006.229.06:45:59.18#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.06:45:59.18#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.06:45:59.18#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:59.18#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:59.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:59.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:59.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.06:45:59.24#ibcon#first serial, iclass 15, count 2 2006.229.06:45:59.24#ibcon#enter sib2, iclass 15, count 2 2006.229.06:45:59.24#ibcon#flushed, iclass 15, count 2 2006.229.06:45:59.24#ibcon#about to write, iclass 15, count 2 2006.229.06:45:59.24#ibcon#wrote, iclass 15, count 2 2006.229.06:45:59.24#ibcon#about to read 3, iclass 15, count 2 2006.229.06:45:59.26#ibcon#read 3, iclass 15, count 2 2006.229.06:45:59.26#ibcon#about to read 4, iclass 15, count 2 2006.229.06:45:59.26#ibcon#read 4, iclass 15, count 2 2006.229.06:45:59.26#ibcon#about to read 5, iclass 15, count 2 2006.229.06:45:59.26#ibcon#read 5, iclass 15, count 2 2006.229.06:45:59.26#ibcon#about to read 6, iclass 15, count 2 2006.229.06:45:59.26#ibcon#read 6, iclass 15, count 2 2006.229.06:45:59.26#ibcon#end of sib2, iclass 15, count 2 2006.229.06:45:59.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.06:45:59.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.06:45:59.26#ibcon#[27=AT05-04\r\n] 2006.229.06:45:59.26#ibcon#*before write, iclass 15, count 2 2006.229.06:45:59.26#ibcon#enter sib2, iclass 15, count 2 2006.229.06:45:59.26#ibcon#flushed, iclass 15, count 2 2006.229.06:45:59.26#ibcon#about to write, iclass 15, count 2 2006.229.06:45:59.26#ibcon#wrote, iclass 15, count 2 2006.229.06:45:59.26#ibcon#about to read 3, iclass 15, count 2 2006.229.06:45:59.29#ibcon#read 3, iclass 15, count 2 2006.229.06:45:59.29#ibcon#about to read 4, iclass 15, count 2 2006.229.06:45:59.29#ibcon#read 4, iclass 15, count 2 2006.229.06:45:59.29#ibcon#about to read 5, iclass 15, count 2 2006.229.06:45:59.29#ibcon#read 5, iclass 15, count 2 2006.229.06:45:59.29#ibcon#about to read 6, iclass 15, count 2 2006.229.06:45:59.29#ibcon#read 6, iclass 15, count 2 2006.229.06:45:59.29#ibcon#end of sib2, iclass 15, count 2 2006.229.06:45:59.29#ibcon#*after write, iclass 15, count 2 2006.229.06:45:59.29#ibcon#*before return 0, iclass 15, count 2 2006.229.06:45:59.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:59.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.06:45:59.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.06:45:59.29#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:59.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:59.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:59.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:59.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:45:59.41#ibcon#first serial, iclass 15, count 0 2006.229.06:45:59.41#ibcon#enter sib2, iclass 15, count 0 2006.229.06:45:59.41#ibcon#flushed, iclass 15, count 0 2006.229.06:45:59.41#ibcon#about to write, iclass 15, count 0 2006.229.06:45:59.41#ibcon#wrote, iclass 15, count 0 2006.229.06:45:59.41#ibcon#about to read 3, iclass 15, count 0 2006.229.06:45:59.43#ibcon#read 3, iclass 15, count 0 2006.229.06:45:59.43#ibcon#about to read 4, iclass 15, count 0 2006.229.06:45:59.43#ibcon#read 4, iclass 15, count 0 2006.229.06:45:59.43#ibcon#about to read 5, iclass 15, count 0 2006.229.06:45:59.43#ibcon#read 5, iclass 15, count 0 2006.229.06:45:59.43#ibcon#about to read 6, iclass 15, count 0 2006.229.06:45:59.43#ibcon#read 6, iclass 15, count 0 2006.229.06:45:59.43#ibcon#end of sib2, iclass 15, count 0 2006.229.06:45:59.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:45:59.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:45:59.43#ibcon#[27=USB\r\n] 2006.229.06:45:59.43#ibcon#*before write, iclass 15, count 0 2006.229.06:45:59.43#ibcon#enter sib2, iclass 15, count 0 2006.229.06:45:59.43#ibcon#flushed, iclass 15, count 0 2006.229.06:45:59.43#ibcon#about to write, iclass 15, count 0 2006.229.06:45:59.43#ibcon#wrote, iclass 15, count 0 2006.229.06:45:59.43#ibcon#about to read 3, iclass 15, count 0 2006.229.06:45:59.46#ibcon#read 3, iclass 15, count 0 2006.229.06:45:59.46#ibcon#about to read 4, iclass 15, count 0 2006.229.06:45:59.46#ibcon#read 4, iclass 15, count 0 2006.229.06:45:59.46#ibcon#about to read 5, iclass 15, count 0 2006.229.06:45:59.46#ibcon#read 5, iclass 15, count 0 2006.229.06:45:59.46#ibcon#about to read 6, iclass 15, count 0 2006.229.06:45:59.46#ibcon#read 6, iclass 15, count 0 2006.229.06:45:59.46#ibcon#end of sib2, iclass 15, count 0 2006.229.06:45:59.46#ibcon#*after write, iclass 15, count 0 2006.229.06:45:59.46#ibcon#*before return 0, iclass 15, count 0 2006.229.06:45:59.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:59.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.06:45:59.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:45:59.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:45:59.46$vck44/vblo=6,719.99 2006.229.06:45:59.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.06:45:59.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.06:45:59.46#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:59.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:59.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:59.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:59.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:45:59.46#ibcon#first serial, iclass 17, count 0 2006.229.06:45:59.46#ibcon#enter sib2, iclass 17, count 0 2006.229.06:45:59.46#ibcon#flushed, iclass 17, count 0 2006.229.06:45:59.46#ibcon#about to write, iclass 17, count 0 2006.229.06:45:59.46#ibcon#wrote, iclass 17, count 0 2006.229.06:45:59.46#ibcon#about to read 3, iclass 17, count 0 2006.229.06:45:59.48#ibcon#read 3, iclass 17, count 0 2006.229.06:45:59.48#ibcon#about to read 4, iclass 17, count 0 2006.229.06:45:59.48#ibcon#read 4, iclass 17, count 0 2006.229.06:45:59.48#ibcon#about to read 5, iclass 17, count 0 2006.229.06:45:59.48#ibcon#read 5, iclass 17, count 0 2006.229.06:45:59.48#ibcon#about to read 6, iclass 17, count 0 2006.229.06:45:59.48#ibcon#read 6, iclass 17, count 0 2006.229.06:45:59.48#ibcon#end of sib2, iclass 17, count 0 2006.229.06:45:59.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:45:59.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:45:59.48#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:45:59.48#ibcon#*before write, iclass 17, count 0 2006.229.06:45:59.48#ibcon#enter sib2, iclass 17, count 0 2006.229.06:45:59.48#ibcon#flushed, iclass 17, count 0 2006.229.06:45:59.48#ibcon#about to write, iclass 17, count 0 2006.229.06:45:59.48#ibcon#wrote, iclass 17, count 0 2006.229.06:45:59.48#ibcon#about to read 3, iclass 17, count 0 2006.229.06:45:59.52#ibcon#read 3, iclass 17, count 0 2006.229.06:45:59.52#ibcon#about to read 4, iclass 17, count 0 2006.229.06:45:59.52#ibcon#read 4, iclass 17, count 0 2006.229.06:45:59.52#ibcon#about to read 5, iclass 17, count 0 2006.229.06:45:59.52#ibcon#read 5, iclass 17, count 0 2006.229.06:45:59.52#ibcon#about to read 6, iclass 17, count 0 2006.229.06:45:59.52#ibcon#read 6, iclass 17, count 0 2006.229.06:45:59.52#ibcon#end of sib2, iclass 17, count 0 2006.229.06:45:59.52#ibcon#*after write, iclass 17, count 0 2006.229.06:45:59.52#ibcon#*before return 0, iclass 17, count 0 2006.229.06:45:59.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:59.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.06:45:59.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:45:59.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:45:59.52$vck44/vb=6,4 2006.229.06:45:59.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.06:45:59.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.06:45:59.52#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:59.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:59.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:59.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:59.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.06:45:59.58#ibcon#first serial, iclass 19, count 2 2006.229.06:45:59.58#ibcon#enter sib2, iclass 19, count 2 2006.229.06:45:59.58#ibcon#flushed, iclass 19, count 2 2006.229.06:45:59.58#ibcon#about to write, iclass 19, count 2 2006.229.06:45:59.58#ibcon#wrote, iclass 19, count 2 2006.229.06:45:59.58#ibcon#about to read 3, iclass 19, count 2 2006.229.06:45:59.60#ibcon#read 3, iclass 19, count 2 2006.229.06:45:59.60#ibcon#about to read 4, iclass 19, count 2 2006.229.06:45:59.60#ibcon#read 4, iclass 19, count 2 2006.229.06:45:59.60#ibcon#about to read 5, iclass 19, count 2 2006.229.06:45:59.60#ibcon#read 5, iclass 19, count 2 2006.229.06:45:59.60#ibcon#about to read 6, iclass 19, count 2 2006.229.06:45:59.60#ibcon#read 6, iclass 19, count 2 2006.229.06:45:59.60#ibcon#end of sib2, iclass 19, count 2 2006.229.06:45:59.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.06:45:59.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.06:45:59.60#ibcon#[27=AT06-04\r\n] 2006.229.06:45:59.60#ibcon#*before write, iclass 19, count 2 2006.229.06:45:59.60#ibcon#enter sib2, iclass 19, count 2 2006.229.06:45:59.60#ibcon#flushed, iclass 19, count 2 2006.229.06:45:59.60#ibcon#about to write, iclass 19, count 2 2006.229.06:45:59.60#ibcon#wrote, iclass 19, count 2 2006.229.06:45:59.60#ibcon#about to read 3, iclass 19, count 2 2006.229.06:45:59.63#ibcon#read 3, iclass 19, count 2 2006.229.06:45:59.63#ibcon#about to read 4, iclass 19, count 2 2006.229.06:45:59.63#ibcon#read 4, iclass 19, count 2 2006.229.06:45:59.63#ibcon#about to read 5, iclass 19, count 2 2006.229.06:45:59.63#ibcon#read 5, iclass 19, count 2 2006.229.06:45:59.63#ibcon#about to read 6, iclass 19, count 2 2006.229.06:45:59.63#ibcon#read 6, iclass 19, count 2 2006.229.06:45:59.63#ibcon#end of sib2, iclass 19, count 2 2006.229.06:45:59.63#ibcon#*after write, iclass 19, count 2 2006.229.06:45:59.63#ibcon#*before return 0, iclass 19, count 2 2006.229.06:45:59.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:59.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.06:45:59.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.06:45:59.63#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:59.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:59.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:59.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:59.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:45:59.75#ibcon#first serial, iclass 19, count 0 2006.229.06:45:59.75#ibcon#enter sib2, iclass 19, count 0 2006.229.06:45:59.75#ibcon#flushed, iclass 19, count 0 2006.229.06:45:59.75#ibcon#about to write, iclass 19, count 0 2006.229.06:45:59.75#ibcon#wrote, iclass 19, count 0 2006.229.06:45:59.75#ibcon#about to read 3, iclass 19, count 0 2006.229.06:45:59.77#ibcon#read 3, iclass 19, count 0 2006.229.06:45:59.77#ibcon#about to read 4, iclass 19, count 0 2006.229.06:45:59.77#ibcon#read 4, iclass 19, count 0 2006.229.06:45:59.77#ibcon#about to read 5, iclass 19, count 0 2006.229.06:45:59.77#ibcon#read 5, iclass 19, count 0 2006.229.06:45:59.77#ibcon#about to read 6, iclass 19, count 0 2006.229.06:45:59.77#ibcon#read 6, iclass 19, count 0 2006.229.06:45:59.77#ibcon#end of sib2, iclass 19, count 0 2006.229.06:45:59.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:45:59.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:45:59.77#ibcon#[27=USB\r\n] 2006.229.06:45:59.77#ibcon#*before write, iclass 19, count 0 2006.229.06:45:59.77#ibcon#enter sib2, iclass 19, count 0 2006.229.06:45:59.77#ibcon#flushed, iclass 19, count 0 2006.229.06:45:59.77#ibcon#about to write, iclass 19, count 0 2006.229.06:45:59.77#ibcon#wrote, iclass 19, count 0 2006.229.06:45:59.77#ibcon#about to read 3, iclass 19, count 0 2006.229.06:45:59.80#ibcon#read 3, iclass 19, count 0 2006.229.06:45:59.80#ibcon#about to read 4, iclass 19, count 0 2006.229.06:45:59.80#ibcon#read 4, iclass 19, count 0 2006.229.06:45:59.80#ibcon#about to read 5, iclass 19, count 0 2006.229.06:45:59.80#ibcon#read 5, iclass 19, count 0 2006.229.06:45:59.80#ibcon#about to read 6, iclass 19, count 0 2006.229.06:45:59.80#ibcon#read 6, iclass 19, count 0 2006.229.06:45:59.80#ibcon#end of sib2, iclass 19, count 0 2006.229.06:45:59.80#ibcon#*after write, iclass 19, count 0 2006.229.06:45:59.80#ibcon#*before return 0, iclass 19, count 0 2006.229.06:45:59.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:59.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.06:45:59.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:45:59.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:45:59.80$vck44/vblo=7,734.99 2006.229.06:45:59.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.06:45:59.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.06:45:59.80#ibcon#ireg 17 cls_cnt 0 2006.229.06:45:59.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:59.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:59.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:59.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:45:59.80#ibcon#first serial, iclass 21, count 0 2006.229.06:45:59.80#ibcon#enter sib2, iclass 21, count 0 2006.229.06:45:59.80#ibcon#flushed, iclass 21, count 0 2006.229.06:45:59.80#ibcon#about to write, iclass 21, count 0 2006.229.06:45:59.80#ibcon#wrote, iclass 21, count 0 2006.229.06:45:59.80#ibcon#about to read 3, iclass 21, count 0 2006.229.06:45:59.82#ibcon#read 3, iclass 21, count 0 2006.229.06:45:59.82#ibcon#about to read 4, iclass 21, count 0 2006.229.06:45:59.82#ibcon#read 4, iclass 21, count 0 2006.229.06:45:59.82#ibcon#about to read 5, iclass 21, count 0 2006.229.06:45:59.82#ibcon#read 5, iclass 21, count 0 2006.229.06:45:59.82#ibcon#about to read 6, iclass 21, count 0 2006.229.06:45:59.82#ibcon#read 6, iclass 21, count 0 2006.229.06:45:59.82#ibcon#end of sib2, iclass 21, count 0 2006.229.06:45:59.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:45:59.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:45:59.82#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:45:59.82#ibcon#*before write, iclass 21, count 0 2006.229.06:45:59.82#ibcon#enter sib2, iclass 21, count 0 2006.229.06:45:59.82#ibcon#flushed, iclass 21, count 0 2006.229.06:45:59.82#ibcon#about to write, iclass 21, count 0 2006.229.06:45:59.82#ibcon#wrote, iclass 21, count 0 2006.229.06:45:59.82#ibcon#about to read 3, iclass 21, count 0 2006.229.06:45:59.86#ibcon#read 3, iclass 21, count 0 2006.229.06:45:59.86#ibcon#about to read 4, iclass 21, count 0 2006.229.06:45:59.86#ibcon#read 4, iclass 21, count 0 2006.229.06:45:59.86#ibcon#about to read 5, iclass 21, count 0 2006.229.06:45:59.86#ibcon#read 5, iclass 21, count 0 2006.229.06:45:59.86#ibcon#about to read 6, iclass 21, count 0 2006.229.06:45:59.86#ibcon#read 6, iclass 21, count 0 2006.229.06:45:59.86#ibcon#end of sib2, iclass 21, count 0 2006.229.06:45:59.86#ibcon#*after write, iclass 21, count 0 2006.229.06:45:59.86#ibcon#*before return 0, iclass 21, count 0 2006.229.06:45:59.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:59.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.06:45:59.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:45:59.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:45:59.86$vck44/vb=7,4 2006.229.06:45:59.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.06:45:59.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.06:45:59.86#ibcon#ireg 11 cls_cnt 2 2006.229.06:45:59.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:59.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:59.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:59.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.06:45:59.92#ibcon#first serial, iclass 23, count 2 2006.229.06:45:59.92#ibcon#enter sib2, iclass 23, count 2 2006.229.06:45:59.92#ibcon#flushed, iclass 23, count 2 2006.229.06:45:59.92#ibcon#about to write, iclass 23, count 2 2006.229.06:45:59.92#ibcon#wrote, iclass 23, count 2 2006.229.06:45:59.92#ibcon#about to read 3, iclass 23, count 2 2006.229.06:45:59.94#ibcon#read 3, iclass 23, count 2 2006.229.06:45:59.94#ibcon#about to read 4, iclass 23, count 2 2006.229.06:45:59.94#ibcon#read 4, iclass 23, count 2 2006.229.06:45:59.94#ibcon#about to read 5, iclass 23, count 2 2006.229.06:45:59.94#ibcon#read 5, iclass 23, count 2 2006.229.06:45:59.94#ibcon#about to read 6, iclass 23, count 2 2006.229.06:45:59.94#ibcon#read 6, iclass 23, count 2 2006.229.06:45:59.94#ibcon#end of sib2, iclass 23, count 2 2006.229.06:45:59.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.06:45:59.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.06:45:59.94#ibcon#[27=AT07-04\r\n] 2006.229.06:45:59.94#ibcon#*before write, iclass 23, count 2 2006.229.06:45:59.94#ibcon#enter sib2, iclass 23, count 2 2006.229.06:45:59.94#ibcon#flushed, iclass 23, count 2 2006.229.06:45:59.94#ibcon#about to write, iclass 23, count 2 2006.229.06:45:59.94#ibcon#wrote, iclass 23, count 2 2006.229.06:45:59.94#ibcon#about to read 3, iclass 23, count 2 2006.229.06:45:59.97#ibcon#read 3, iclass 23, count 2 2006.229.06:45:59.97#ibcon#about to read 4, iclass 23, count 2 2006.229.06:45:59.97#ibcon#read 4, iclass 23, count 2 2006.229.06:45:59.97#ibcon#about to read 5, iclass 23, count 2 2006.229.06:45:59.97#ibcon#read 5, iclass 23, count 2 2006.229.06:45:59.97#ibcon#about to read 6, iclass 23, count 2 2006.229.06:45:59.97#ibcon#read 6, iclass 23, count 2 2006.229.06:45:59.97#ibcon#end of sib2, iclass 23, count 2 2006.229.06:45:59.97#ibcon#*after write, iclass 23, count 2 2006.229.06:45:59.97#ibcon#*before return 0, iclass 23, count 2 2006.229.06:45:59.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:59.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.06:45:59.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.06:45:59.97#ibcon#ireg 7 cls_cnt 0 2006.229.06:45:59.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:46:00.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:46:00.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:46:00.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:46:00.09#ibcon#first serial, iclass 23, count 0 2006.229.06:46:00.09#ibcon#enter sib2, iclass 23, count 0 2006.229.06:46:00.09#ibcon#flushed, iclass 23, count 0 2006.229.06:46:00.09#ibcon#about to write, iclass 23, count 0 2006.229.06:46:00.09#ibcon#wrote, iclass 23, count 0 2006.229.06:46:00.09#ibcon#about to read 3, iclass 23, count 0 2006.229.06:46:00.11#ibcon#read 3, iclass 23, count 0 2006.229.06:46:00.11#ibcon#about to read 4, iclass 23, count 0 2006.229.06:46:00.11#ibcon#read 4, iclass 23, count 0 2006.229.06:46:00.11#ibcon#about to read 5, iclass 23, count 0 2006.229.06:46:00.11#ibcon#read 5, iclass 23, count 0 2006.229.06:46:00.11#ibcon#about to read 6, iclass 23, count 0 2006.229.06:46:00.11#ibcon#read 6, iclass 23, count 0 2006.229.06:46:00.11#ibcon#end of sib2, iclass 23, count 0 2006.229.06:46:00.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:46:00.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:46:00.11#ibcon#[27=USB\r\n] 2006.229.06:46:00.11#ibcon#*before write, iclass 23, count 0 2006.229.06:46:00.11#ibcon#enter sib2, iclass 23, count 0 2006.229.06:46:00.11#ibcon#flushed, iclass 23, count 0 2006.229.06:46:00.11#ibcon#about to write, iclass 23, count 0 2006.229.06:46:00.11#ibcon#wrote, iclass 23, count 0 2006.229.06:46:00.11#ibcon#about to read 3, iclass 23, count 0 2006.229.06:46:00.14#ibcon#read 3, iclass 23, count 0 2006.229.06:46:00.14#ibcon#about to read 4, iclass 23, count 0 2006.229.06:46:00.14#ibcon#read 4, iclass 23, count 0 2006.229.06:46:00.14#ibcon#about to read 5, iclass 23, count 0 2006.229.06:46:00.14#ibcon#read 5, iclass 23, count 0 2006.229.06:46:00.14#ibcon#about to read 6, iclass 23, count 0 2006.229.06:46:00.14#ibcon#read 6, iclass 23, count 0 2006.229.06:46:00.14#ibcon#end of sib2, iclass 23, count 0 2006.229.06:46:00.14#ibcon#*after write, iclass 23, count 0 2006.229.06:46:00.14#ibcon#*before return 0, iclass 23, count 0 2006.229.06:46:00.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:46:00.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.06:46:00.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:46:00.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:46:00.14$vck44/vblo=8,744.99 2006.229.06:46:00.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.06:46:00.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.06:46:00.14#ibcon#ireg 17 cls_cnt 0 2006.229.06:46:00.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:46:00.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:46:00.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:46:00.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:46:00.14#ibcon#first serial, iclass 25, count 0 2006.229.06:46:00.14#ibcon#enter sib2, iclass 25, count 0 2006.229.06:46:00.14#ibcon#flushed, iclass 25, count 0 2006.229.06:46:00.14#ibcon#about to write, iclass 25, count 0 2006.229.06:46:00.14#ibcon#wrote, iclass 25, count 0 2006.229.06:46:00.14#ibcon#about to read 3, iclass 25, count 0 2006.229.06:46:00.16#ibcon#read 3, iclass 25, count 0 2006.229.06:46:00.16#ibcon#about to read 4, iclass 25, count 0 2006.229.06:46:00.16#ibcon#read 4, iclass 25, count 0 2006.229.06:46:00.16#ibcon#about to read 5, iclass 25, count 0 2006.229.06:46:00.16#ibcon#read 5, iclass 25, count 0 2006.229.06:46:00.16#ibcon#about to read 6, iclass 25, count 0 2006.229.06:46:00.16#ibcon#read 6, iclass 25, count 0 2006.229.06:46:00.16#ibcon#end of sib2, iclass 25, count 0 2006.229.06:46:00.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:46:00.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:46:00.16#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:46:00.16#ibcon#*before write, iclass 25, count 0 2006.229.06:46:00.16#ibcon#enter sib2, iclass 25, count 0 2006.229.06:46:00.16#ibcon#flushed, iclass 25, count 0 2006.229.06:46:00.16#ibcon#about to write, iclass 25, count 0 2006.229.06:46:00.16#ibcon#wrote, iclass 25, count 0 2006.229.06:46:00.16#ibcon#about to read 3, iclass 25, count 0 2006.229.06:46:00.20#ibcon#read 3, iclass 25, count 0 2006.229.06:46:00.20#ibcon#about to read 4, iclass 25, count 0 2006.229.06:46:00.20#ibcon#read 4, iclass 25, count 0 2006.229.06:46:00.20#ibcon#about to read 5, iclass 25, count 0 2006.229.06:46:00.20#ibcon#read 5, iclass 25, count 0 2006.229.06:46:00.20#ibcon#about to read 6, iclass 25, count 0 2006.229.06:46:00.20#ibcon#read 6, iclass 25, count 0 2006.229.06:46:00.20#ibcon#end of sib2, iclass 25, count 0 2006.229.06:46:00.20#ibcon#*after write, iclass 25, count 0 2006.229.06:46:00.20#ibcon#*before return 0, iclass 25, count 0 2006.229.06:46:00.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:46:00.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:46:00.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:46:00.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:46:00.20$vck44/vb=8,4 2006.229.06:46:00.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.06:46:00.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.06:46:00.20#ibcon#ireg 11 cls_cnt 2 2006.229.06:46:00.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:46:00.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:46:00.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:46:00.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.06:46:00.26#ibcon#first serial, iclass 27, count 2 2006.229.06:46:00.26#ibcon#enter sib2, iclass 27, count 2 2006.229.06:46:00.26#ibcon#flushed, iclass 27, count 2 2006.229.06:46:00.26#ibcon#about to write, iclass 27, count 2 2006.229.06:46:00.26#ibcon#wrote, iclass 27, count 2 2006.229.06:46:00.26#ibcon#about to read 3, iclass 27, count 2 2006.229.06:46:00.28#ibcon#read 3, iclass 27, count 2 2006.229.06:46:00.28#ibcon#about to read 4, iclass 27, count 2 2006.229.06:46:00.28#ibcon#read 4, iclass 27, count 2 2006.229.06:46:00.28#ibcon#about to read 5, iclass 27, count 2 2006.229.06:46:00.28#ibcon#read 5, iclass 27, count 2 2006.229.06:46:00.28#ibcon#about to read 6, iclass 27, count 2 2006.229.06:46:00.28#ibcon#read 6, iclass 27, count 2 2006.229.06:46:00.28#ibcon#end of sib2, iclass 27, count 2 2006.229.06:46:00.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.06:46:00.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.06:46:00.28#ibcon#[27=AT08-04\r\n] 2006.229.06:46:00.28#ibcon#*before write, iclass 27, count 2 2006.229.06:46:00.28#ibcon#enter sib2, iclass 27, count 2 2006.229.06:46:00.28#ibcon#flushed, iclass 27, count 2 2006.229.06:46:00.28#ibcon#about to write, iclass 27, count 2 2006.229.06:46:00.28#ibcon#wrote, iclass 27, count 2 2006.229.06:46:00.28#ibcon#about to read 3, iclass 27, count 2 2006.229.06:46:00.31#ibcon#read 3, iclass 27, count 2 2006.229.06:46:00.31#ibcon#about to read 4, iclass 27, count 2 2006.229.06:46:00.31#ibcon#read 4, iclass 27, count 2 2006.229.06:46:00.31#ibcon#about to read 5, iclass 27, count 2 2006.229.06:46:00.31#ibcon#read 5, iclass 27, count 2 2006.229.06:46:00.31#ibcon#about to read 6, iclass 27, count 2 2006.229.06:46:00.31#ibcon#read 6, iclass 27, count 2 2006.229.06:46:00.31#ibcon#end of sib2, iclass 27, count 2 2006.229.06:46:00.31#ibcon#*after write, iclass 27, count 2 2006.229.06:46:00.31#ibcon#*before return 0, iclass 27, count 2 2006.229.06:46:00.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:46:00.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.06:46:00.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.06:46:00.31#ibcon#ireg 7 cls_cnt 0 2006.229.06:46:00.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:46:00.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:46:00.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:46:00.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:46:00.43#ibcon#first serial, iclass 27, count 0 2006.229.06:46:00.43#ibcon#enter sib2, iclass 27, count 0 2006.229.06:46:00.43#ibcon#flushed, iclass 27, count 0 2006.229.06:46:00.43#ibcon#about to write, iclass 27, count 0 2006.229.06:46:00.43#ibcon#wrote, iclass 27, count 0 2006.229.06:46:00.43#ibcon#about to read 3, iclass 27, count 0 2006.229.06:46:00.45#ibcon#read 3, iclass 27, count 0 2006.229.06:46:00.45#ibcon#about to read 4, iclass 27, count 0 2006.229.06:46:00.45#ibcon#read 4, iclass 27, count 0 2006.229.06:46:00.45#ibcon#about to read 5, iclass 27, count 0 2006.229.06:46:00.45#ibcon#read 5, iclass 27, count 0 2006.229.06:46:00.45#ibcon#about to read 6, iclass 27, count 0 2006.229.06:46:00.45#ibcon#read 6, iclass 27, count 0 2006.229.06:46:00.45#ibcon#end of sib2, iclass 27, count 0 2006.229.06:46:00.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:46:00.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:46:00.45#ibcon#[27=USB\r\n] 2006.229.06:46:00.45#ibcon#*before write, iclass 27, count 0 2006.229.06:46:00.45#ibcon#enter sib2, iclass 27, count 0 2006.229.06:46:00.45#ibcon#flushed, iclass 27, count 0 2006.229.06:46:00.45#ibcon#about to write, iclass 27, count 0 2006.229.06:46:00.45#ibcon#wrote, iclass 27, count 0 2006.229.06:46:00.45#ibcon#about to read 3, iclass 27, count 0 2006.229.06:46:00.48#ibcon#read 3, iclass 27, count 0 2006.229.06:46:00.48#ibcon#about to read 4, iclass 27, count 0 2006.229.06:46:00.48#ibcon#read 4, iclass 27, count 0 2006.229.06:46:00.48#ibcon#about to read 5, iclass 27, count 0 2006.229.06:46:00.48#ibcon#read 5, iclass 27, count 0 2006.229.06:46:00.48#ibcon#about to read 6, iclass 27, count 0 2006.229.06:46:00.48#ibcon#read 6, iclass 27, count 0 2006.229.06:46:00.48#ibcon#end of sib2, iclass 27, count 0 2006.229.06:46:00.48#ibcon#*after write, iclass 27, count 0 2006.229.06:46:00.48#ibcon#*before return 0, iclass 27, count 0 2006.229.06:46:00.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:46:00.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.06:46:00.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:46:00.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:46:00.48$vck44/vabw=wide 2006.229.06:46:00.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.06:46:00.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.06:46:00.48#ibcon#ireg 8 cls_cnt 0 2006.229.06:46:00.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:46:00.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:46:00.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:46:00.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:46:00.48#ibcon#first serial, iclass 29, count 0 2006.229.06:46:00.48#ibcon#enter sib2, iclass 29, count 0 2006.229.06:46:00.48#ibcon#flushed, iclass 29, count 0 2006.229.06:46:00.48#ibcon#about to write, iclass 29, count 0 2006.229.06:46:00.48#ibcon#wrote, iclass 29, count 0 2006.229.06:46:00.48#ibcon#about to read 3, iclass 29, count 0 2006.229.06:46:00.50#ibcon#read 3, iclass 29, count 0 2006.229.06:46:00.50#ibcon#about to read 4, iclass 29, count 0 2006.229.06:46:00.50#ibcon#read 4, iclass 29, count 0 2006.229.06:46:00.50#ibcon#about to read 5, iclass 29, count 0 2006.229.06:46:00.50#ibcon#read 5, iclass 29, count 0 2006.229.06:46:00.50#ibcon#about to read 6, iclass 29, count 0 2006.229.06:46:00.50#ibcon#read 6, iclass 29, count 0 2006.229.06:46:00.50#ibcon#end of sib2, iclass 29, count 0 2006.229.06:46:00.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:46:00.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:46:00.50#ibcon#[25=BW32\r\n] 2006.229.06:46:00.50#ibcon#*before write, iclass 29, count 0 2006.229.06:46:00.50#ibcon#enter sib2, iclass 29, count 0 2006.229.06:46:00.50#ibcon#flushed, iclass 29, count 0 2006.229.06:46:00.50#ibcon#about to write, iclass 29, count 0 2006.229.06:46:00.50#ibcon#wrote, iclass 29, count 0 2006.229.06:46:00.50#ibcon#about to read 3, iclass 29, count 0 2006.229.06:46:00.53#ibcon#read 3, iclass 29, count 0 2006.229.06:46:00.53#ibcon#about to read 4, iclass 29, count 0 2006.229.06:46:00.53#ibcon#read 4, iclass 29, count 0 2006.229.06:46:00.53#ibcon#about to read 5, iclass 29, count 0 2006.229.06:46:00.53#ibcon#read 5, iclass 29, count 0 2006.229.06:46:00.53#ibcon#about to read 6, iclass 29, count 0 2006.229.06:46:00.53#ibcon#read 6, iclass 29, count 0 2006.229.06:46:00.53#ibcon#end of sib2, iclass 29, count 0 2006.229.06:46:00.53#ibcon#*after write, iclass 29, count 0 2006.229.06:46:00.53#ibcon#*before return 0, iclass 29, count 0 2006.229.06:46:00.53#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:46:00.53#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.06:46:00.53#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:46:00.53#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:46:00.53$vck44/vbbw=wide 2006.229.06:46:00.53#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:46:00.53#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:46:00.53#ibcon#ireg 8 cls_cnt 0 2006.229.06:46:00.53#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:46:00.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:46:00.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:46:00.60#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:46:00.60#ibcon#first serial, iclass 31, count 0 2006.229.06:46:00.60#ibcon#enter sib2, iclass 31, count 0 2006.229.06:46:00.60#ibcon#flushed, iclass 31, count 0 2006.229.06:46:00.60#ibcon#about to write, iclass 31, count 0 2006.229.06:46:00.60#ibcon#wrote, iclass 31, count 0 2006.229.06:46:00.60#ibcon#about to read 3, iclass 31, count 0 2006.229.06:46:00.62#ibcon#read 3, iclass 31, count 0 2006.229.06:46:00.62#ibcon#about to read 4, iclass 31, count 0 2006.229.06:46:00.62#ibcon#read 4, iclass 31, count 0 2006.229.06:46:00.62#ibcon#about to read 5, iclass 31, count 0 2006.229.06:46:00.62#ibcon#read 5, iclass 31, count 0 2006.229.06:46:00.62#ibcon#about to read 6, iclass 31, count 0 2006.229.06:46:00.62#ibcon#read 6, iclass 31, count 0 2006.229.06:46:00.62#ibcon#end of sib2, iclass 31, count 0 2006.229.06:46:00.62#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:46:00.62#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:46:00.62#ibcon#[27=BW32\r\n] 2006.229.06:46:00.62#ibcon#*before write, iclass 31, count 0 2006.229.06:46:00.62#ibcon#enter sib2, iclass 31, count 0 2006.229.06:46:00.62#ibcon#flushed, iclass 31, count 0 2006.229.06:46:00.62#ibcon#about to write, iclass 31, count 0 2006.229.06:46:00.62#ibcon#wrote, iclass 31, count 0 2006.229.06:46:00.62#ibcon#about to read 3, iclass 31, count 0 2006.229.06:46:00.65#ibcon#read 3, iclass 31, count 0 2006.229.06:46:00.65#ibcon#about to read 4, iclass 31, count 0 2006.229.06:46:00.65#ibcon#read 4, iclass 31, count 0 2006.229.06:46:00.65#ibcon#about to read 5, iclass 31, count 0 2006.229.06:46:00.65#ibcon#read 5, iclass 31, count 0 2006.229.06:46:00.65#ibcon#about to read 6, iclass 31, count 0 2006.229.06:46:00.65#ibcon#read 6, iclass 31, count 0 2006.229.06:46:00.65#ibcon#end of sib2, iclass 31, count 0 2006.229.06:46:00.65#ibcon#*after write, iclass 31, count 0 2006.229.06:46:00.65#ibcon#*before return 0, iclass 31, count 0 2006.229.06:46:00.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:46:00.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:46:00.65#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:46:00.65#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:46:00.65$setupk4/ifdk4 2006.229.06:46:00.65$ifdk4/lo= 2006.229.06:46:00.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:46:00.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:46:00.65$ifdk4/patch= 2006.229.06:46:00.65$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:46:00.65$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:46:00.65$setupk4/!*+20s 2006.229.06:46:05.87#abcon#<5=/05 3.0 5.7 30.22 92 999.8\r\n> 2006.229.06:46:05.89#abcon#{5=INTERFACE CLEAR} 2006.229.06:46:05.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:46:15.14$setupk4/"tpicd 2006.229.06:46:15.14$setupk4/echo=off 2006.229.06:46:15.14$setupk4/xlog=off 2006.229.06:46:15.14:!2006.229.06:48:16 2006.229.06:46:21.14#trakl#Source acquired 2006.229.06:46:21.14#flagr#flagr/antenna,acquired 2006.229.06:48:16.00:preob 2006.229.06:48:16.14/onsource/TRACKING 2006.229.06:48:16.14:!2006.229.06:48:26 2006.229.06:48:26.00:"tape 2006.229.06:48:26.00:"st=record 2006.229.06:48:26.00:data_valid=on 2006.229.06:48:26.00:midob 2006.229.06:48:27.14/onsource/TRACKING 2006.229.06:48:27.14/wx/30.20,999.8,92 2006.229.06:48:27.35/cable/+6.3955E-03 2006.229.06:48:28.44/va/01,08,usb,yes,31,33 2006.229.06:48:28.44/va/02,07,usb,yes,34,34 2006.229.06:48:28.44/va/03,06,usb,yes,41,44 2006.229.06:48:28.44/va/04,07,usb,yes,34,36 2006.229.06:48:28.44/va/05,04,usb,yes,31,31 2006.229.06:48:28.44/va/06,04,usb,yes,35,34 2006.229.06:48:28.44/va/07,05,usb,yes,31,31 2006.229.06:48:28.44/va/08,06,usb,yes,22,28 2006.229.06:48:28.67/valo/01,524.99,yes,locked 2006.229.06:48:28.67/valo/02,534.99,yes,locked 2006.229.06:48:28.67/valo/03,564.99,yes,locked 2006.229.06:48:28.67/valo/04,624.99,yes,locked 2006.229.06:48:28.67/valo/05,734.99,yes,locked 2006.229.06:48:28.67/valo/06,814.99,yes,locked 2006.229.06:48:28.67/valo/07,864.99,yes,locked 2006.229.06:48:28.67/valo/08,884.99,yes,locked 2006.229.06:48:29.76/vb/01,04,usb,yes,32,30 2006.229.06:48:29.76/vb/02,04,usb,yes,34,34 2006.229.06:48:29.76/vb/03,04,usb,yes,31,34 2006.229.06:48:29.76/vb/04,04,usb,yes,36,35 2006.229.06:48:29.76/vb/05,04,usb,yes,28,31 2006.229.06:48:29.76/vb/06,04,usb,yes,33,29 2006.229.06:48:29.76/vb/07,04,usb,yes,32,32 2006.229.06:48:29.76/vb/08,04,usb,yes,30,33 2006.229.06:48:29.99/vblo/01,629.99,yes,locked 2006.229.06:48:29.99/vblo/02,634.99,yes,locked 2006.229.06:48:29.99/vblo/03,649.99,yes,locked 2006.229.06:48:29.99/vblo/04,679.99,yes,locked 2006.229.06:48:29.99/vblo/05,709.99,yes,locked 2006.229.06:48:29.99/vblo/06,719.99,yes,locked 2006.229.06:48:29.99/vblo/07,734.99,yes,locked 2006.229.06:48:29.99/vblo/08,744.99,yes,locked 2006.229.06:48:30.14/vabw/8 2006.229.06:48:30.29/vbbw/8 2006.229.06:48:30.38/xfe/off,on,11.7 2006.229.06:48:30.75/ifatt/23,28,28,28 2006.229.06:48:31.08/fmout-gps/S +4.56E-07 2006.229.06:48:31.12:!2006.229.06:49:06 2006.229.06:49:06.00:data_valid=off 2006.229.06:49:06.00:"et 2006.229.06:49:06.00:!+3s 2006.229.06:49:09.02:"tape 2006.229.06:49:09.02:postob 2006.229.06:49:09.19/cable/+6.3968E-03 2006.229.06:49:09.19/wx/30.18,999.8,92 2006.229.06:49:09.25/fmout-gps/S +4.55E-07 2006.229.06:49:09.25:scan_name=229-0651,jd0608,110 2006.229.06:49:09.25:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.06:49:11.13#flagr#flagr/antenna,new-source 2006.229.06:49:11.13:checkk5 2006.229.06:49:11.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:49:11.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:49:12.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:49:12.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:49:13.11/chk_obsdata//k5ts1/T2290648??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:49:13.49/chk_obsdata//k5ts2/T2290648??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:49:13.88/chk_obsdata//k5ts3/T2290648??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:49:14.29/chk_obsdata//k5ts4/T2290648??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.06:49:15.00/k5log//k5ts1_log_newline 2006.229.06:49:15.69/k5log//k5ts2_log_newline 2006.229.06:49:16.43/k5log//k5ts3_log_newline 2006.229.06:49:17.13/k5log//k5ts4_log_newline 2006.229.06:49:17.15/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:49:17.15:setupk4=1 2006.229.06:49:17.15$setupk4/echo=on 2006.229.06:49:17.15$setupk4/pcalon 2006.229.06:49:17.15$pcalon/"no phase cal control is implemented here 2006.229.06:49:17.15$setupk4/"tpicd=stop 2006.229.06:49:17.15$setupk4/"rec=synch_on 2006.229.06:49:17.15$setupk4/"rec_mode=128 2006.229.06:49:17.15$setupk4/!* 2006.229.06:49:17.15$setupk4/recpk4 2006.229.06:49:17.15$recpk4/recpatch= 2006.229.06:49:17.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:49:17.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:49:17.16$setupk4/vck44 2006.229.06:49:17.16$vck44/valo=1,524.99 2006.229.06:49:17.16#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.06:49:17.16#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.06:49:17.16#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:17.16#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:17.16#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:17.16#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:17.16#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:49:17.16#ibcon#first serial, iclass 40, count 0 2006.229.06:49:17.16#ibcon#enter sib2, iclass 40, count 0 2006.229.06:49:17.16#ibcon#flushed, iclass 40, count 0 2006.229.06:49:17.16#ibcon#about to write, iclass 40, count 0 2006.229.06:49:17.16#ibcon#wrote, iclass 40, count 0 2006.229.06:49:17.16#ibcon#about to read 3, iclass 40, count 0 2006.229.06:49:17.18#ibcon#read 3, iclass 40, count 0 2006.229.06:49:17.18#ibcon#about to read 4, iclass 40, count 0 2006.229.06:49:17.18#ibcon#read 4, iclass 40, count 0 2006.229.06:49:17.18#ibcon#about to read 5, iclass 40, count 0 2006.229.06:49:17.18#ibcon#read 5, iclass 40, count 0 2006.229.06:49:17.18#ibcon#about to read 6, iclass 40, count 0 2006.229.06:49:17.18#ibcon#read 6, iclass 40, count 0 2006.229.06:49:17.18#ibcon#end of sib2, iclass 40, count 0 2006.229.06:49:17.18#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:49:17.18#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:49:17.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:49:17.18#ibcon#*before write, iclass 40, count 0 2006.229.06:49:17.18#ibcon#enter sib2, iclass 40, count 0 2006.229.06:49:17.18#ibcon#flushed, iclass 40, count 0 2006.229.06:49:17.18#ibcon#about to write, iclass 40, count 0 2006.229.06:49:17.18#ibcon#wrote, iclass 40, count 0 2006.229.06:49:17.18#ibcon#about to read 3, iclass 40, count 0 2006.229.06:49:17.23#ibcon#read 3, iclass 40, count 0 2006.229.06:49:17.23#ibcon#about to read 4, iclass 40, count 0 2006.229.06:49:17.23#ibcon#read 4, iclass 40, count 0 2006.229.06:49:17.23#ibcon#about to read 5, iclass 40, count 0 2006.229.06:49:17.23#ibcon#read 5, iclass 40, count 0 2006.229.06:49:17.23#ibcon#about to read 6, iclass 40, count 0 2006.229.06:49:17.23#ibcon#read 6, iclass 40, count 0 2006.229.06:49:17.23#ibcon#end of sib2, iclass 40, count 0 2006.229.06:49:17.23#ibcon#*after write, iclass 40, count 0 2006.229.06:49:17.23#ibcon#*before return 0, iclass 40, count 0 2006.229.06:49:17.23#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:17.23#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:17.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:49:17.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:49:17.23$vck44/va=1,8 2006.229.06:49:17.23#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.06:49:17.23#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.06:49:17.23#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:17.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:17.23#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:17.23#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:17.23#ibcon#enter wrdev, iclass 4, count 2 2006.229.06:49:17.23#ibcon#first serial, iclass 4, count 2 2006.229.06:49:17.23#ibcon#enter sib2, iclass 4, count 2 2006.229.06:49:17.23#ibcon#flushed, iclass 4, count 2 2006.229.06:49:17.23#ibcon#about to write, iclass 4, count 2 2006.229.06:49:17.23#ibcon#wrote, iclass 4, count 2 2006.229.06:49:17.23#ibcon#about to read 3, iclass 4, count 2 2006.229.06:49:17.25#ibcon#read 3, iclass 4, count 2 2006.229.06:49:17.25#ibcon#about to read 4, iclass 4, count 2 2006.229.06:49:17.25#ibcon#read 4, iclass 4, count 2 2006.229.06:49:17.25#ibcon#about to read 5, iclass 4, count 2 2006.229.06:49:17.25#ibcon#read 5, iclass 4, count 2 2006.229.06:49:17.25#ibcon#about to read 6, iclass 4, count 2 2006.229.06:49:17.25#ibcon#read 6, iclass 4, count 2 2006.229.06:49:17.25#ibcon#end of sib2, iclass 4, count 2 2006.229.06:49:17.25#ibcon#*mode == 0, iclass 4, count 2 2006.229.06:49:17.25#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.06:49:17.25#ibcon#[25=AT01-08\r\n] 2006.229.06:49:17.25#ibcon#*before write, iclass 4, count 2 2006.229.06:49:17.25#ibcon#enter sib2, iclass 4, count 2 2006.229.06:49:17.25#ibcon#flushed, iclass 4, count 2 2006.229.06:49:17.25#ibcon#about to write, iclass 4, count 2 2006.229.06:49:17.25#ibcon#wrote, iclass 4, count 2 2006.229.06:49:17.25#ibcon#about to read 3, iclass 4, count 2 2006.229.06:49:17.28#ibcon#read 3, iclass 4, count 2 2006.229.06:49:17.28#ibcon#about to read 4, iclass 4, count 2 2006.229.06:49:17.28#ibcon#read 4, iclass 4, count 2 2006.229.06:49:17.28#ibcon#about to read 5, iclass 4, count 2 2006.229.06:49:17.28#ibcon#read 5, iclass 4, count 2 2006.229.06:49:17.28#ibcon#about to read 6, iclass 4, count 2 2006.229.06:49:17.28#ibcon#read 6, iclass 4, count 2 2006.229.06:49:17.28#ibcon#end of sib2, iclass 4, count 2 2006.229.06:49:17.28#ibcon#*after write, iclass 4, count 2 2006.229.06:49:17.28#ibcon#*before return 0, iclass 4, count 2 2006.229.06:49:17.28#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:17.28#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:17.28#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.06:49:17.28#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:17.28#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:17.40#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:17.40#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:17.40#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:49:17.40#ibcon#first serial, iclass 4, count 0 2006.229.06:49:17.40#ibcon#enter sib2, iclass 4, count 0 2006.229.06:49:17.40#ibcon#flushed, iclass 4, count 0 2006.229.06:49:17.40#ibcon#about to write, iclass 4, count 0 2006.229.06:49:17.40#ibcon#wrote, iclass 4, count 0 2006.229.06:49:17.40#ibcon#about to read 3, iclass 4, count 0 2006.229.06:49:17.42#ibcon#read 3, iclass 4, count 0 2006.229.06:49:17.42#ibcon#about to read 4, iclass 4, count 0 2006.229.06:49:17.42#ibcon#read 4, iclass 4, count 0 2006.229.06:49:17.42#ibcon#about to read 5, iclass 4, count 0 2006.229.06:49:17.42#ibcon#read 5, iclass 4, count 0 2006.229.06:49:17.42#ibcon#about to read 6, iclass 4, count 0 2006.229.06:49:17.42#ibcon#read 6, iclass 4, count 0 2006.229.06:49:17.42#ibcon#end of sib2, iclass 4, count 0 2006.229.06:49:17.42#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:49:17.42#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:49:17.42#ibcon#[25=USB\r\n] 2006.229.06:49:17.42#ibcon#*before write, iclass 4, count 0 2006.229.06:49:17.42#ibcon#enter sib2, iclass 4, count 0 2006.229.06:49:17.42#ibcon#flushed, iclass 4, count 0 2006.229.06:49:17.42#ibcon#about to write, iclass 4, count 0 2006.229.06:49:17.42#ibcon#wrote, iclass 4, count 0 2006.229.06:49:17.42#ibcon#about to read 3, iclass 4, count 0 2006.229.06:49:17.45#ibcon#read 3, iclass 4, count 0 2006.229.06:49:17.45#ibcon#about to read 4, iclass 4, count 0 2006.229.06:49:17.45#ibcon#read 4, iclass 4, count 0 2006.229.06:49:17.45#ibcon#about to read 5, iclass 4, count 0 2006.229.06:49:17.45#ibcon#read 5, iclass 4, count 0 2006.229.06:49:17.45#ibcon#about to read 6, iclass 4, count 0 2006.229.06:49:17.45#ibcon#read 6, iclass 4, count 0 2006.229.06:49:17.45#ibcon#end of sib2, iclass 4, count 0 2006.229.06:49:17.45#ibcon#*after write, iclass 4, count 0 2006.229.06:49:17.45#ibcon#*before return 0, iclass 4, count 0 2006.229.06:49:17.45#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:17.45#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:17.45#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:49:17.45#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:49:17.45$vck44/valo=2,534.99 2006.229.06:49:17.45#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:49:17.45#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:49:17.45#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:17.45#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:17.45#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:17.45#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:17.45#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:49:17.45#ibcon#first serial, iclass 6, count 0 2006.229.06:49:17.45#ibcon#enter sib2, iclass 6, count 0 2006.229.06:49:17.45#ibcon#flushed, iclass 6, count 0 2006.229.06:49:17.45#ibcon#about to write, iclass 6, count 0 2006.229.06:49:17.45#ibcon#wrote, iclass 6, count 0 2006.229.06:49:17.45#ibcon#about to read 3, iclass 6, count 0 2006.229.06:49:17.47#ibcon#read 3, iclass 6, count 0 2006.229.06:49:17.47#ibcon#about to read 4, iclass 6, count 0 2006.229.06:49:17.47#ibcon#read 4, iclass 6, count 0 2006.229.06:49:17.47#ibcon#about to read 5, iclass 6, count 0 2006.229.06:49:17.47#ibcon#read 5, iclass 6, count 0 2006.229.06:49:17.47#ibcon#about to read 6, iclass 6, count 0 2006.229.06:49:17.47#ibcon#read 6, iclass 6, count 0 2006.229.06:49:17.47#ibcon#end of sib2, iclass 6, count 0 2006.229.06:49:17.47#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:49:17.47#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:49:17.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:49:17.47#ibcon#*before write, iclass 6, count 0 2006.229.06:49:17.47#ibcon#enter sib2, iclass 6, count 0 2006.229.06:49:17.47#ibcon#flushed, iclass 6, count 0 2006.229.06:49:17.47#ibcon#about to write, iclass 6, count 0 2006.229.06:49:17.47#ibcon#wrote, iclass 6, count 0 2006.229.06:49:17.47#ibcon#about to read 3, iclass 6, count 0 2006.229.06:49:17.51#ibcon#read 3, iclass 6, count 0 2006.229.06:49:17.51#ibcon#about to read 4, iclass 6, count 0 2006.229.06:49:17.51#ibcon#read 4, iclass 6, count 0 2006.229.06:49:17.51#ibcon#about to read 5, iclass 6, count 0 2006.229.06:49:17.51#ibcon#read 5, iclass 6, count 0 2006.229.06:49:17.51#ibcon#about to read 6, iclass 6, count 0 2006.229.06:49:17.51#ibcon#read 6, iclass 6, count 0 2006.229.06:49:17.51#ibcon#end of sib2, iclass 6, count 0 2006.229.06:49:17.51#ibcon#*after write, iclass 6, count 0 2006.229.06:49:17.51#ibcon#*before return 0, iclass 6, count 0 2006.229.06:49:17.51#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:17.51#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:17.51#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:49:17.51#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:49:17.51$vck44/va=2,7 2006.229.06:49:17.51#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.06:49:17.51#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.06:49:17.51#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:17.51#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:17.57#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:17.57#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:17.57#ibcon#enter wrdev, iclass 10, count 2 2006.229.06:49:17.57#ibcon#first serial, iclass 10, count 2 2006.229.06:49:17.57#ibcon#enter sib2, iclass 10, count 2 2006.229.06:49:17.57#ibcon#flushed, iclass 10, count 2 2006.229.06:49:17.57#ibcon#about to write, iclass 10, count 2 2006.229.06:49:17.57#ibcon#wrote, iclass 10, count 2 2006.229.06:49:17.57#ibcon#about to read 3, iclass 10, count 2 2006.229.06:49:17.59#ibcon#read 3, iclass 10, count 2 2006.229.06:49:17.59#ibcon#about to read 4, iclass 10, count 2 2006.229.06:49:17.59#ibcon#read 4, iclass 10, count 2 2006.229.06:49:17.59#ibcon#about to read 5, iclass 10, count 2 2006.229.06:49:17.59#ibcon#read 5, iclass 10, count 2 2006.229.06:49:17.59#ibcon#about to read 6, iclass 10, count 2 2006.229.06:49:17.59#ibcon#read 6, iclass 10, count 2 2006.229.06:49:17.59#ibcon#end of sib2, iclass 10, count 2 2006.229.06:49:17.59#ibcon#*mode == 0, iclass 10, count 2 2006.229.06:49:17.59#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.06:49:17.59#ibcon#[25=AT02-07\r\n] 2006.229.06:49:17.59#ibcon#*before write, iclass 10, count 2 2006.229.06:49:17.59#ibcon#enter sib2, iclass 10, count 2 2006.229.06:49:17.59#ibcon#flushed, iclass 10, count 2 2006.229.06:49:17.59#ibcon#about to write, iclass 10, count 2 2006.229.06:49:17.59#ibcon#wrote, iclass 10, count 2 2006.229.06:49:17.59#ibcon#about to read 3, iclass 10, count 2 2006.229.06:49:17.62#ibcon#read 3, iclass 10, count 2 2006.229.06:49:17.62#ibcon#about to read 4, iclass 10, count 2 2006.229.06:49:17.62#ibcon#read 4, iclass 10, count 2 2006.229.06:49:17.62#ibcon#about to read 5, iclass 10, count 2 2006.229.06:49:17.62#ibcon#read 5, iclass 10, count 2 2006.229.06:49:17.62#ibcon#about to read 6, iclass 10, count 2 2006.229.06:49:17.62#ibcon#read 6, iclass 10, count 2 2006.229.06:49:17.62#ibcon#end of sib2, iclass 10, count 2 2006.229.06:49:17.62#ibcon#*after write, iclass 10, count 2 2006.229.06:49:17.62#ibcon#*before return 0, iclass 10, count 2 2006.229.06:49:17.62#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:17.62#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:17.62#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.06:49:17.62#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:17.62#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:17.74#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:17.74#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:17.74#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:49:17.74#ibcon#first serial, iclass 10, count 0 2006.229.06:49:17.74#ibcon#enter sib2, iclass 10, count 0 2006.229.06:49:17.74#ibcon#flushed, iclass 10, count 0 2006.229.06:49:17.74#ibcon#about to write, iclass 10, count 0 2006.229.06:49:17.74#ibcon#wrote, iclass 10, count 0 2006.229.06:49:17.74#ibcon#about to read 3, iclass 10, count 0 2006.229.06:49:17.76#ibcon#read 3, iclass 10, count 0 2006.229.06:49:17.76#ibcon#about to read 4, iclass 10, count 0 2006.229.06:49:17.76#ibcon#read 4, iclass 10, count 0 2006.229.06:49:17.76#ibcon#about to read 5, iclass 10, count 0 2006.229.06:49:17.76#ibcon#read 5, iclass 10, count 0 2006.229.06:49:17.76#ibcon#about to read 6, iclass 10, count 0 2006.229.06:49:17.76#ibcon#read 6, iclass 10, count 0 2006.229.06:49:17.76#ibcon#end of sib2, iclass 10, count 0 2006.229.06:49:17.76#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:49:17.76#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:49:17.76#ibcon#[25=USB\r\n] 2006.229.06:49:17.76#ibcon#*before write, iclass 10, count 0 2006.229.06:49:17.76#ibcon#enter sib2, iclass 10, count 0 2006.229.06:49:17.76#ibcon#flushed, iclass 10, count 0 2006.229.06:49:17.76#ibcon#about to write, iclass 10, count 0 2006.229.06:49:17.76#ibcon#wrote, iclass 10, count 0 2006.229.06:49:17.76#ibcon#about to read 3, iclass 10, count 0 2006.229.06:49:17.79#ibcon#read 3, iclass 10, count 0 2006.229.06:49:17.79#ibcon#about to read 4, iclass 10, count 0 2006.229.06:49:17.79#ibcon#read 4, iclass 10, count 0 2006.229.06:49:17.79#ibcon#about to read 5, iclass 10, count 0 2006.229.06:49:17.79#ibcon#read 5, iclass 10, count 0 2006.229.06:49:17.79#ibcon#about to read 6, iclass 10, count 0 2006.229.06:49:17.79#ibcon#read 6, iclass 10, count 0 2006.229.06:49:17.79#ibcon#end of sib2, iclass 10, count 0 2006.229.06:49:17.79#ibcon#*after write, iclass 10, count 0 2006.229.06:49:17.79#ibcon#*before return 0, iclass 10, count 0 2006.229.06:49:17.79#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:17.79#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:17.79#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:49:17.79#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:49:17.79$vck44/valo=3,564.99 2006.229.06:49:17.79#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.06:49:17.79#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.06:49:17.79#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:17.79#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:17.79#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:17.79#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:17.79#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:49:17.79#ibcon#first serial, iclass 12, count 0 2006.229.06:49:17.79#ibcon#enter sib2, iclass 12, count 0 2006.229.06:49:17.79#ibcon#flushed, iclass 12, count 0 2006.229.06:49:17.79#ibcon#about to write, iclass 12, count 0 2006.229.06:49:17.79#ibcon#wrote, iclass 12, count 0 2006.229.06:49:17.79#ibcon#about to read 3, iclass 12, count 0 2006.229.06:49:17.81#ibcon#read 3, iclass 12, count 0 2006.229.06:49:17.81#ibcon#about to read 4, iclass 12, count 0 2006.229.06:49:17.81#ibcon#read 4, iclass 12, count 0 2006.229.06:49:17.81#ibcon#about to read 5, iclass 12, count 0 2006.229.06:49:17.81#ibcon#read 5, iclass 12, count 0 2006.229.06:49:17.81#ibcon#about to read 6, iclass 12, count 0 2006.229.06:49:17.81#ibcon#read 6, iclass 12, count 0 2006.229.06:49:17.81#ibcon#end of sib2, iclass 12, count 0 2006.229.06:49:17.81#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:49:17.81#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:49:17.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:49:17.81#ibcon#*before write, iclass 12, count 0 2006.229.06:49:17.81#ibcon#enter sib2, iclass 12, count 0 2006.229.06:49:17.81#ibcon#flushed, iclass 12, count 0 2006.229.06:49:17.81#ibcon#about to write, iclass 12, count 0 2006.229.06:49:17.81#ibcon#wrote, iclass 12, count 0 2006.229.06:49:17.81#ibcon#about to read 3, iclass 12, count 0 2006.229.06:49:17.85#ibcon#read 3, iclass 12, count 0 2006.229.06:49:17.85#ibcon#about to read 4, iclass 12, count 0 2006.229.06:49:17.85#ibcon#read 4, iclass 12, count 0 2006.229.06:49:17.85#ibcon#about to read 5, iclass 12, count 0 2006.229.06:49:17.85#ibcon#read 5, iclass 12, count 0 2006.229.06:49:17.85#ibcon#about to read 6, iclass 12, count 0 2006.229.06:49:17.85#ibcon#read 6, iclass 12, count 0 2006.229.06:49:17.85#ibcon#end of sib2, iclass 12, count 0 2006.229.06:49:17.85#ibcon#*after write, iclass 12, count 0 2006.229.06:49:17.85#ibcon#*before return 0, iclass 12, count 0 2006.229.06:49:17.85#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:17.85#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:17.85#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:49:17.85#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:49:17.85$vck44/va=3,6 2006.229.06:49:17.85#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.06:49:17.85#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.06:49:17.85#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:17.85#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:17.91#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:17.91#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:17.91#ibcon#enter wrdev, iclass 14, count 2 2006.229.06:49:17.91#ibcon#first serial, iclass 14, count 2 2006.229.06:49:17.91#ibcon#enter sib2, iclass 14, count 2 2006.229.06:49:17.91#ibcon#flushed, iclass 14, count 2 2006.229.06:49:17.91#ibcon#about to write, iclass 14, count 2 2006.229.06:49:17.91#ibcon#wrote, iclass 14, count 2 2006.229.06:49:17.91#ibcon#about to read 3, iclass 14, count 2 2006.229.06:49:17.93#ibcon#read 3, iclass 14, count 2 2006.229.06:49:17.93#ibcon#about to read 4, iclass 14, count 2 2006.229.06:49:17.93#ibcon#read 4, iclass 14, count 2 2006.229.06:49:17.93#ibcon#about to read 5, iclass 14, count 2 2006.229.06:49:17.93#ibcon#read 5, iclass 14, count 2 2006.229.06:49:17.93#ibcon#about to read 6, iclass 14, count 2 2006.229.06:49:17.93#ibcon#read 6, iclass 14, count 2 2006.229.06:49:17.93#ibcon#end of sib2, iclass 14, count 2 2006.229.06:49:17.93#ibcon#*mode == 0, iclass 14, count 2 2006.229.06:49:17.93#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.06:49:17.93#ibcon#[25=AT03-06\r\n] 2006.229.06:49:17.93#ibcon#*before write, iclass 14, count 2 2006.229.06:49:17.93#ibcon#enter sib2, iclass 14, count 2 2006.229.06:49:17.93#ibcon#flushed, iclass 14, count 2 2006.229.06:49:17.93#ibcon#about to write, iclass 14, count 2 2006.229.06:49:17.93#ibcon#wrote, iclass 14, count 2 2006.229.06:49:17.93#ibcon#about to read 3, iclass 14, count 2 2006.229.06:49:17.96#ibcon#read 3, iclass 14, count 2 2006.229.06:49:17.96#ibcon#about to read 4, iclass 14, count 2 2006.229.06:49:17.96#ibcon#read 4, iclass 14, count 2 2006.229.06:49:17.96#ibcon#about to read 5, iclass 14, count 2 2006.229.06:49:17.96#ibcon#read 5, iclass 14, count 2 2006.229.06:49:17.96#ibcon#about to read 6, iclass 14, count 2 2006.229.06:49:17.96#ibcon#read 6, iclass 14, count 2 2006.229.06:49:17.96#ibcon#end of sib2, iclass 14, count 2 2006.229.06:49:17.96#ibcon#*after write, iclass 14, count 2 2006.229.06:49:17.96#ibcon#*before return 0, iclass 14, count 2 2006.229.06:49:17.96#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:17.96#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:17.96#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.06:49:17.96#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:17.96#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:18.08#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:18.08#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:18.08#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:49:18.08#ibcon#first serial, iclass 14, count 0 2006.229.06:49:18.08#ibcon#enter sib2, iclass 14, count 0 2006.229.06:49:18.08#ibcon#flushed, iclass 14, count 0 2006.229.06:49:18.08#ibcon#about to write, iclass 14, count 0 2006.229.06:49:18.08#ibcon#wrote, iclass 14, count 0 2006.229.06:49:18.08#ibcon#about to read 3, iclass 14, count 0 2006.229.06:49:18.10#ibcon#read 3, iclass 14, count 0 2006.229.06:49:18.10#ibcon#about to read 4, iclass 14, count 0 2006.229.06:49:18.10#ibcon#read 4, iclass 14, count 0 2006.229.06:49:18.10#ibcon#about to read 5, iclass 14, count 0 2006.229.06:49:18.10#ibcon#read 5, iclass 14, count 0 2006.229.06:49:18.10#ibcon#about to read 6, iclass 14, count 0 2006.229.06:49:18.10#ibcon#read 6, iclass 14, count 0 2006.229.06:49:18.10#ibcon#end of sib2, iclass 14, count 0 2006.229.06:49:18.10#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:49:18.10#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:49:18.10#ibcon#[25=USB\r\n] 2006.229.06:49:18.10#ibcon#*before write, iclass 14, count 0 2006.229.06:49:18.10#ibcon#enter sib2, iclass 14, count 0 2006.229.06:49:18.10#ibcon#flushed, iclass 14, count 0 2006.229.06:49:18.10#ibcon#about to write, iclass 14, count 0 2006.229.06:49:18.10#ibcon#wrote, iclass 14, count 0 2006.229.06:49:18.10#ibcon#about to read 3, iclass 14, count 0 2006.229.06:49:18.13#ibcon#read 3, iclass 14, count 0 2006.229.06:49:18.13#ibcon#about to read 4, iclass 14, count 0 2006.229.06:49:18.13#ibcon#read 4, iclass 14, count 0 2006.229.06:49:18.13#ibcon#about to read 5, iclass 14, count 0 2006.229.06:49:18.13#ibcon#read 5, iclass 14, count 0 2006.229.06:49:18.13#ibcon#about to read 6, iclass 14, count 0 2006.229.06:49:18.13#ibcon#read 6, iclass 14, count 0 2006.229.06:49:18.13#ibcon#end of sib2, iclass 14, count 0 2006.229.06:49:18.13#ibcon#*after write, iclass 14, count 0 2006.229.06:49:18.13#ibcon#*before return 0, iclass 14, count 0 2006.229.06:49:18.13#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:18.13#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:18.13#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:49:18.13#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:49:18.13$vck44/valo=4,624.99 2006.229.06:49:18.13#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:49:18.13#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:49:18.13#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:18.13#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:18.13#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:18.13#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:18.13#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:49:18.13#ibcon#first serial, iclass 16, count 0 2006.229.06:49:18.13#ibcon#enter sib2, iclass 16, count 0 2006.229.06:49:18.13#ibcon#flushed, iclass 16, count 0 2006.229.06:49:18.13#ibcon#about to write, iclass 16, count 0 2006.229.06:49:18.13#ibcon#wrote, iclass 16, count 0 2006.229.06:49:18.13#ibcon#about to read 3, iclass 16, count 0 2006.229.06:49:18.15#ibcon#read 3, iclass 16, count 0 2006.229.06:49:18.15#ibcon#about to read 4, iclass 16, count 0 2006.229.06:49:18.15#ibcon#read 4, iclass 16, count 0 2006.229.06:49:18.15#ibcon#about to read 5, iclass 16, count 0 2006.229.06:49:18.15#ibcon#read 5, iclass 16, count 0 2006.229.06:49:18.15#ibcon#about to read 6, iclass 16, count 0 2006.229.06:49:18.15#ibcon#read 6, iclass 16, count 0 2006.229.06:49:18.15#ibcon#end of sib2, iclass 16, count 0 2006.229.06:49:18.15#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:49:18.15#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:49:18.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:49:18.15#ibcon#*before write, iclass 16, count 0 2006.229.06:49:18.15#ibcon#enter sib2, iclass 16, count 0 2006.229.06:49:18.15#ibcon#flushed, iclass 16, count 0 2006.229.06:49:18.15#ibcon#about to write, iclass 16, count 0 2006.229.06:49:18.15#ibcon#wrote, iclass 16, count 0 2006.229.06:49:18.15#ibcon#about to read 3, iclass 16, count 0 2006.229.06:49:18.19#ibcon#read 3, iclass 16, count 0 2006.229.06:49:18.19#ibcon#about to read 4, iclass 16, count 0 2006.229.06:49:18.19#ibcon#read 4, iclass 16, count 0 2006.229.06:49:18.19#ibcon#about to read 5, iclass 16, count 0 2006.229.06:49:18.19#ibcon#read 5, iclass 16, count 0 2006.229.06:49:18.19#ibcon#about to read 6, iclass 16, count 0 2006.229.06:49:18.19#ibcon#read 6, iclass 16, count 0 2006.229.06:49:18.19#ibcon#end of sib2, iclass 16, count 0 2006.229.06:49:18.19#ibcon#*after write, iclass 16, count 0 2006.229.06:49:18.19#ibcon#*before return 0, iclass 16, count 0 2006.229.06:49:18.19#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:18.19#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:18.19#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:49:18.19#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:49:18.19$vck44/va=4,7 2006.229.06:49:18.19#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.06:49:18.19#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.06:49:18.19#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:18.19#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:18.25#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:18.25#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:18.25#ibcon#enter wrdev, iclass 18, count 2 2006.229.06:49:18.25#ibcon#first serial, iclass 18, count 2 2006.229.06:49:18.25#ibcon#enter sib2, iclass 18, count 2 2006.229.06:49:18.25#ibcon#flushed, iclass 18, count 2 2006.229.06:49:18.25#ibcon#about to write, iclass 18, count 2 2006.229.06:49:18.25#ibcon#wrote, iclass 18, count 2 2006.229.06:49:18.25#ibcon#about to read 3, iclass 18, count 2 2006.229.06:49:18.27#ibcon#read 3, iclass 18, count 2 2006.229.06:49:18.27#ibcon#about to read 4, iclass 18, count 2 2006.229.06:49:18.27#ibcon#read 4, iclass 18, count 2 2006.229.06:49:18.27#ibcon#about to read 5, iclass 18, count 2 2006.229.06:49:18.27#ibcon#read 5, iclass 18, count 2 2006.229.06:49:18.27#ibcon#about to read 6, iclass 18, count 2 2006.229.06:49:18.27#ibcon#read 6, iclass 18, count 2 2006.229.06:49:18.27#ibcon#end of sib2, iclass 18, count 2 2006.229.06:49:18.27#ibcon#*mode == 0, iclass 18, count 2 2006.229.06:49:18.27#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.06:49:18.27#ibcon#[25=AT04-07\r\n] 2006.229.06:49:18.27#ibcon#*before write, iclass 18, count 2 2006.229.06:49:18.27#ibcon#enter sib2, iclass 18, count 2 2006.229.06:49:18.27#ibcon#flushed, iclass 18, count 2 2006.229.06:49:18.27#ibcon#about to write, iclass 18, count 2 2006.229.06:49:18.27#ibcon#wrote, iclass 18, count 2 2006.229.06:49:18.27#ibcon#about to read 3, iclass 18, count 2 2006.229.06:49:18.30#ibcon#read 3, iclass 18, count 2 2006.229.06:49:18.30#ibcon#about to read 4, iclass 18, count 2 2006.229.06:49:18.30#ibcon#read 4, iclass 18, count 2 2006.229.06:49:18.30#ibcon#about to read 5, iclass 18, count 2 2006.229.06:49:18.30#ibcon#read 5, iclass 18, count 2 2006.229.06:49:18.30#ibcon#about to read 6, iclass 18, count 2 2006.229.06:49:18.30#ibcon#read 6, iclass 18, count 2 2006.229.06:49:18.30#ibcon#end of sib2, iclass 18, count 2 2006.229.06:49:18.30#ibcon#*after write, iclass 18, count 2 2006.229.06:49:18.30#ibcon#*before return 0, iclass 18, count 2 2006.229.06:49:18.30#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:18.30#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:18.30#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.06:49:18.30#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:18.30#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:18.42#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:18.42#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:18.42#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:49:18.42#ibcon#first serial, iclass 18, count 0 2006.229.06:49:18.42#ibcon#enter sib2, iclass 18, count 0 2006.229.06:49:18.42#ibcon#flushed, iclass 18, count 0 2006.229.06:49:18.42#ibcon#about to write, iclass 18, count 0 2006.229.06:49:18.42#ibcon#wrote, iclass 18, count 0 2006.229.06:49:18.42#ibcon#about to read 3, iclass 18, count 0 2006.229.06:49:18.44#ibcon#read 3, iclass 18, count 0 2006.229.06:49:18.44#ibcon#about to read 4, iclass 18, count 0 2006.229.06:49:18.44#ibcon#read 4, iclass 18, count 0 2006.229.06:49:18.44#ibcon#about to read 5, iclass 18, count 0 2006.229.06:49:18.44#ibcon#read 5, iclass 18, count 0 2006.229.06:49:18.44#ibcon#about to read 6, iclass 18, count 0 2006.229.06:49:18.44#ibcon#read 6, iclass 18, count 0 2006.229.06:49:18.44#ibcon#end of sib2, iclass 18, count 0 2006.229.06:49:18.44#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:49:18.44#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:49:18.44#ibcon#[25=USB\r\n] 2006.229.06:49:18.44#ibcon#*before write, iclass 18, count 0 2006.229.06:49:18.44#ibcon#enter sib2, iclass 18, count 0 2006.229.06:49:18.44#ibcon#flushed, iclass 18, count 0 2006.229.06:49:18.44#ibcon#about to write, iclass 18, count 0 2006.229.06:49:18.44#ibcon#wrote, iclass 18, count 0 2006.229.06:49:18.44#ibcon#about to read 3, iclass 18, count 0 2006.229.06:49:18.47#ibcon#read 3, iclass 18, count 0 2006.229.06:49:18.47#ibcon#about to read 4, iclass 18, count 0 2006.229.06:49:18.47#ibcon#read 4, iclass 18, count 0 2006.229.06:49:18.47#ibcon#about to read 5, iclass 18, count 0 2006.229.06:49:18.47#ibcon#read 5, iclass 18, count 0 2006.229.06:49:18.47#ibcon#about to read 6, iclass 18, count 0 2006.229.06:49:18.47#ibcon#read 6, iclass 18, count 0 2006.229.06:49:18.47#ibcon#end of sib2, iclass 18, count 0 2006.229.06:49:18.47#ibcon#*after write, iclass 18, count 0 2006.229.06:49:18.47#ibcon#*before return 0, iclass 18, count 0 2006.229.06:49:18.47#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:18.47#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:18.47#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:49:18.47#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:49:18.47$vck44/valo=5,734.99 2006.229.06:49:18.47#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.06:49:18.47#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.06:49:18.47#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:18.47#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:18.47#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:18.47#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:18.47#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:49:18.47#ibcon#first serial, iclass 20, count 0 2006.229.06:49:18.47#ibcon#enter sib2, iclass 20, count 0 2006.229.06:49:18.47#ibcon#flushed, iclass 20, count 0 2006.229.06:49:18.47#ibcon#about to write, iclass 20, count 0 2006.229.06:49:18.47#ibcon#wrote, iclass 20, count 0 2006.229.06:49:18.47#ibcon#about to read 3, iclass 20, count 0 2006.229.06:49:18.49#ibcon#read 3, iclass 20, count 0 2006.229.06:49:18.49#ibcon#about to read 4, iclass 20, count 0 2006.229.06:49:18.49#ibcon#read 4, iclass 20, count 0 2006.229.06:49:18.49#ibcon#about to read 5, iclass 20, count 0 2006.229.06:49:18.49#ibcon#read 5, iclass 20, count 0 2006.229.06:49:18.49#ibcon#about to read 6, iclass 20, count 0 2006.229.06:49:18.49#ibcon#read 6, iclass 20, count 0 2006.229.06:49:18.49#ibcon#end of sib2, iclass 20, count 0 2006.229.06:49:18.49#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:49:18.49#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:49:18.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:49:18.49#ibcon#*before write, iclass 20, count 0 2006.229.06:49:18.49#ibcon#enter sib2, iclass 20, count 0 2006.229.06:49:18.49#ibcon#flushed, iclass 20, count 0 2006.229.06:49:18.49#ibcon#about to write, iclass 20, count 0 2006.229.06:49:18.49#ibcon#wrote, iclass 20, count 0 2006.229.06:49:18.49#ibcon#about to read 3, iclass 20, count 0 2006.229.06:49:18.53#ibcon#read 3, iclass 20, count 0 2006.229.06:49:18.53#ibcon#about to read 4, iclass 20, count 0 2006.229.06:49:18.53#ibcon#read 4, iclass 20, count 0 2006.229.06:49:18.53#ibcon#about to read 5, iclass 20, count 0 2006.229.06:49:18.53#ibcon#read 5, iclass 20, count 0 2006.229.06:49:18.53#ibcon#about to read 6, iclass 20, count 0 2006.229.06:49:18.53#ibcon#read 6, iclass 20, count 0 2006.229.06:49:18.53#ibcon#end of sib2, iclass 20, count 0 2006.229.06:49:18.53#ibcon#*after write, iclass 20, count 0 2006.229.06:49:18.53#ibcon#*before return 0, iclass 20, count 0 2006.229.06:49:18.53#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:18.53#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:18.53#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:49:18.53#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:49:18.53$vck44/va=5,4 2006.229.06:49:18.53#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.06:49:18.53#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.06:49:18.53#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:18.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:18.59#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:18.59#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:18.59#ibcon#enter wrdev, iclass 22, count 2 2006.229.06:49:18.59#ibcon#first serial, iclass 22, count 2 2006.229.06:49:18.59#ibcon#enter sib2, iclass 22, count 2 2006.229.06:49:18.59#ibcon#flushed, iclass 22, count 2 2006.229.06:49:18.59#ibcon#about to write, iclass 22, count 2 2006.229.06:49:18.59#ibcon#wrote, iclass 22, count 2 2006.229.06:49:18.59#ibcon#about to read 3, iclass 22, count 2 2006.229.06:49:18.61#ibcon#read 3, iclass 22, count 2 2006.229.06:49:18.61#ibcon#about to read 4, iclass 22, count 2 2006.229.06:49:18.61#ibcon#read 4, iclass 22, count 2 2006.229.06:49:18.61#ibcon#about to read 5, iclass 22, count 2 2006.229.06:49:18.61#ibcon#read 5, iclass 22, count 2 2006.229.06:49:18.61#ibcon#about to read 6, iclass 22, count 2 2006.229.06:49:18.61#ibcon#read 6, iclass 22, count 2 2006.229.06:49:18.61#ibcon#end of sib2, iclass 22, count 2 2006.229.06:49:18.61#ibcon#*mode == 0, iclass 22, count 2 2006.229.06:49:18.61#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.06:49:18.61#ibcon#[25=AT05-04\r\n] 2006.229.06:49:18.61#ibcon#*before write, iclass 22, count 2 2006.229.06:49:18.61#ibcon#enter sib2, iclass 22, count 2 2006.229.06:49:18.61#ibcon#flushed, iclass 22, count 2 2006.229.06:49:18.61#ibcon#about to write, iclass 22, count 2 2006.229.06:49:18.61#ibcon#wrote, iclass 22, count 2 2006.229.06:49:18.61#ibcon#about to read 3, iclass 22, count 2 2006.229.06:49:18.64#ibcon#read 3, iclass 22, count 2 2006.229.06:49:18.64#ibcon#about to read 4, iclass 22, count 2 2006.229.06:49:18.64#ibcon#read 4, iclass 22, count 2 2006.229.06:49:18.64#ibcon#about to read 5, iclass 22, count 2 2006.229.06:49:18.64#ibcon#read 5, iclass 22, count 2 2006.229.06:49:18.64#ibcon#about to read 6, iclass 22, count 2 2006.229.06:49:18.64#ibcon#read 6, iclass 22, count 2 2006.229.06:49:18.64#ibcon#end of sib2, iclass 22, count 2 2006.229.06:49:18.64#ibcon#*after write, iclass 22, count 2 2006.229.06:49:18.64#ibcon#*before return 0, iclass 22, count 2 2006.229.06:49:18.64#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:18.64#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:18.64#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.06:49:18.64#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:18.64#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:18.76#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:18.76#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:18.76#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:49:18.76#ibcon#first serial, iclass 22, count 0 2006.229.06:49:18.76#ibcon#enter sib2, iclass 22, count 0 2006.229.06:49:18.76#ibcon#flushed, iclass 22, count 0 2006.229.06:49:18.76#ibcon#about to write, iclass 22, count 0 2006.229.06:49:18.76#ibcon#wrote, iclass 22, count 0 2006.229.06:49:18.76#ibcon#about to read 3, iclass 22, count 0 2006.229.06:49:18.78#ibcon#read 3, iclass 22, count 0 2006.229.06:49:18.78#ibcon#about to read 4, iclass 22, count 0 2006.229.06:49:18.78#ibcon#read 4, iclass 22, count 0 2006.229.06:49:18.78#ibcon#about to read 5, iclass 22, count 0 2006.229.06:49:18.78#ibcon#read 5, iclass 22, count 0 2006.229.06:49:18.78#ibcon#about to read 6, iclass 22, count 0 2006.229.06:49:18.78#ibcon#read 6, iclass 22, count 0 2006.229.06:49:18.78#ibcon#end of sib2, iclass 22, count 0 2006.229.06:49:18.78#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:49:18.78#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:49:18.78#ibcon#[25=USB\r\n] 2006.229.06:49:18.78#ibcon#*before write, iclass 22, count 0 2006.229.06:49:18.78#ibcon#enter sib2, iclass 22, count 0 2006.229.06:49:18.78#ibcon#flushed, iclass 22, count 0 2006.229.06:49:18.78#ibcon#about to write, iclass 22, count 0 2006.229.06:49:18.78#ibcon#wrote, iclass 22, count 0 2006.229.06:49:18.78#ibcon#about to read 3, iclass 22, count 0 2006.229.06:49:18.81#ibcon#read 3, iclass 22, count 0 2006.229.06:49:18.81#ibcon#about to read 4, iclass 22, count 0 2006.229.06:49:18.81#ibcon#read 4, iclass 22, count 0 2006.229.06:49:18.81#ibcon#about to read 5, iclass 22, count 0 2006.229.06:49:18.81#ibcon#read 5, iclass 22, count 0 2006.229.06:49:18.81#ibcon#about to read 6, iclass 22, count 0 2006.229.06:49:18.81#ibcon#read 6, iclass 22, count 0 2006.229.06:49:18.81#ibcon#end of sib2, iclass 22, count 0 2006.229.06:49:18.81#ibcon#*after write, iclass 22, count 0 2006.229.06:49:18.81#ibcon#*before return 0, iclass 22, count 0 2006.229.06:49:18.81#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:18.81#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:18.81#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:49:18.81#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:49:18.81$vck44/valo=6,814.99 2006.229.06:49:18.81#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.06:49:18.81#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.06:49:18.81#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:18.81#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:18.81#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:18.81#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:18.81#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:49:18.81#ibcon#first serial, iclass 24, count 0 2006.229.06:49:18.81#ibcon#enter sib2, iclass 24, count 0 2006.229.06:49:18.81#ibcon#flushed, iclass 24, count 0 2006.229.06:49:18.81#ibcon#about to write, iclass 24, count 0 2006.229.06:49:18.81#ibcon#wrote, iclass 24, count 0 2006.229.06:49:18.81#ibcon#about to read 3, iclass 24, count 0 2006.229.06:49:18.83#ibcon#read 3, iclass 24, count 0 2006.229.06:49:18.83#ibcon#about to read 4, iclass 24, count 0 2006.229.06:49:18.83#ibcon#read 4, iclass 24, count 0 2006.229.06:49:18.83#ibcon#about to read 5, iclass 24, count 0 2006.229.06:49:18.83#ibcon#read 5, iclass 24, count 0 2006.229.06:49:18.83#ibcon#about to read 6, iclass 24, count 0 2006.229.06:49:18.83#ibcon#read 6, iclass 24, count 0 2006.229.06:49:18.83#ibcon#end of sib2, iclass 24, count 0 2006.229.06:49:18.83#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:49:18.83#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:49:18.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:49:18.83#ibcon#*before write, iclass 24, count 0 2006.229.06:49:18.83#ibcon#enter sib2, iclass 24, count 0 2006.229.06:49:18.83#ibcon#flushed, iclass 24, count 0 2006.229.06:49:18.83#ibcon#about to write, iclass 24, count 0 2006.229.06:49:18.83#ibcon#wrote, iclass 24, count 0 2006.229.06:49:18.83#ibcon#about to read 3, iclass 24, count 0 2006.229.06:49:18.87#ibcon#read 3, iclass 24, count 0 2006.229.06:49:18.87#ibcon#about to read 4, iclass 24, count 0 2006.229.06:49:18.87#ibcon#read 4, iclass 24, count 0 2006.229.06:49:18.87#ibcon#about to read 5, iclass 24, count 0 2006.229.06:49:18.87#ibcon#read 5, iclass 24, count 0 2006.229.06:49:18.87#ibcon#about to read 6, iclass 24, count 0 2006.229.06:49:18.87#ibcon#read 6, iclass 24, count 0 2006.229.06:49:18.87#ibcon#end of sib2, iclass 24, count 0 2006.229.06:49:18.87#ibcon#*after write, iclass 24, count 0 2006.229.06:49:18.87#ibcon#*before return 0, iclass 24, count 0 2006.229.06:49:18.87#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:18.87#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:18.87#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:49:18.87#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:49:18.87$vck44/va=6,4 2006.229.06:49:18.87#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.06:49:18.87#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.06:49:18.87#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:18.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:18.93#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:18.93#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:18.93#ibcon#enter wrdev, iclass 26, count 2 2006.229.06:49:18.93#ibcon#first serial, iclass 26, count 2 2006.229.06:49:18.93#ibcon#enter sib2, iclass 26, count 2 2006.229.06:49:18.93#ibcon#flushed, iclass 26, count 2 2006.229.06:49:18.93#ibcon#about to write, iclass 26, count 2 2006.229.06:49:18.93#ibcon#wrote, iclass 26, count 2 2006.229.06:49:18.93#ibcon#about to read 3, iclass 26, count 2 2006.229.06:49:18.95#ibcon#read 3, iclass 26, count 2 2006.229.06:49:18.95#ibcon#about to read 4, iclass 26, count 2 2006.229.06:49:18.95#ibcon#read 4, iclass 26, count 2 2006.229.06:49:18.95#ibcon#about to read 5, iclass 26, count 2 2006.229.06:49:18.95#ibcon#read 5, iclass 26, count 2 2006.229.06:49:18.95#ibcon#about to read 6, iclass 26, count 2 2006.229.06:49:18.95#ibcon#read 6, iclass 26, count 2 2006.229.06:49:18.95#ibcon#end of sib2, iclass 26, count 2 2006.229.06:49:18.95#ibcon#*mode == 0, iclass 26, count 2 2006.229.06:49:18.95#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.06:49:18.95#ibcon#[25=AT06-04\r\n] 2006.229.06:49:18.95#ibcon#*before write, iclass 26, count 2 2006.229.06:49:18.95#ibcon#enter sib2, iclass 26, count 2 2006.229.06:49:18.95#ibcon#flushed, iclass 26, count 2 2006.229.06:49:18.95#ibcon#about to write, iclass 26, count 2 2006.229.06:49:18.95#ibcon#wrote, iclass 26, count 2 2006.229.06:49:18.95#ibcon#about to read 3, iclass 26, count 2 2006.229.06:49:18.98#ibcon#read 3, iclass 26, count 2 2006.229.06:49:18.98#ibcon#about to read 4, iclass 26, count 2 2006.229.06:49:18.98#ibcon#read 4, iclass 26, count 2 2006.229.06:49:18.98#ibcon#about to read 5, iclass 26, count 2 2006.229.06:49:18.98#ibcon#read 5, iclass 26, count 2 2006.229.06:49:18.98#ibcon#about to read 6, iclass 26, count 2 2006.229.06:49:18.98#ibcon#read 6, iclass 26, count 2 2006.229.06:49:18.98#ibcon#end of sib2, iclass 26, count 2 2006.229.06:49:18.98#ibcon#*after write, iclass 26, count 2 2006.229.06:49:18.98#ibcon#*before return 0, iclass 26, count 2 2006.229.06:49:18.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:18.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:18.98#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.06:49:18.98#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:18.98#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:19.10#abcon#<5=/05 3.0 5.7 30.18 92 999.8\r\n> 2006.229.06:49:19.10#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:19.10#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:19.10#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:49:19.10#ibcon#first serial, iclass 26, count 0 2006.229.06:49:19.10#ibcon#enter sib2, iclass 26, count 0 2006.229.06:49:19.10#ibcon#flushed, iclass 26, count 0 2006.229.06:49:19.10#ibcon#about to write, iclass 26, count 0 2006.229.06:49:19.10#ibcon#wrote, iclass 26, count 0 2006.229.06:49:19.10#ibcon#about to read 3, iclass 26, count 0 2006.229.06:49:19.12#ibcon#read 3, iclass 26, count 0 2006.229.06:49:19.12#ibcon#about to read 4, iclass 26, count 0 2006.229.06:49:19.12#ibcon#read 4, iclass 26, count 0 2006.229.06:49:19.12#ibcon#about to read 5, iclass 26, count 0 2006.229.06:49:19.12#ibcon#read 5, iclass 26, count 0 2006.229.06:49:19.12#ibcon#about to read 6, iclass 26, count 0 2006.229.06:49:19.12#ibcon#read 6, iclass 26, count 0 2006.229.06:49:19.12#ibcon#end of sib2, iclass 26, count 0 2006.229.06:49:19.12#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:49:19.12#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:49:19.12#ibcon#[25=USB\r\n] 2006.229.06:49:19.12#ibcon#*before write, iclass 26, count 0 2006.229.06:49:19.12#ibcon#enter sib2, iclass 26, count 0 2006.229.06:49:19.12#ibcon#flushed, iclass 26, count 0 2006.229.06:49:19.12#ibcon#about to write, iclass 26, count 0 2006.229.06:49:19.12#ibcon#wrote, iclass 26, count 0 2006.229.06:49:19.12#ibcon#about to read 3, iclass 26, count 0 2006.229.06:49:19.12#abcon#{5=INTERFACE CLEAR} 2006.229.06:49:19.15#ibcon#read 3, iclass 26, count 0 2006.229.06:49:19.15#ibcon#about to read 4, iclass 26, count 0 2006.229.06:49:19.15#ibcon#read 4, iclass 26, count 0 2006.229.06:49:19.15#ibcon#about to read 5, iclass 26, count 0 2006.229.06:49:19.15#ibcon#read 5, iclass 26, count 0 2006.229.06:49:19.15#ibcon#about to read 6, iclass 26, count 0 2006.229.06:49:19.15#ibcon#read 6, iclass 26, count 0 2006.229.06:49:19.15#ibcon#end of sib2, iclass 26, count 0 2006.229.06:49:19.15#ibcon#*after write, iclass 26, count 0 2006.229.06:49:19.15#ibcon#*before return 0, iclass 26, count 0 2006.229.06:49:19.15#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:19.15#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:19.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:49:19.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:49:19.15$vck44/valo=7,864.99 2006.229.06:49:19.15#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:49:19.15#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:49:19.15#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:19.15#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:49:19.15#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:49:19.15#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:49:19.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:49:19.15#ibcon#first serial, iclass 31, count 0 2006.229.06:49:19.15#ibcon#enter sib2, iclass 31, count 0 2006.229.06:49:19.15#ibcon#flushed, iclass 31, count 0 2006.229.06:49:19.15#ibcon#about to write, iclass 31, count 0 2006.229.06:49:19.15#ibcon#wrote, iclass 31, count 0 2006.229.06:49:19.15#ibcon#about to read 3, iclass 31, count 0 2006.229.06:49:19.17#ibcon#read 3, iclass 31, count 0 2006.229.06:49:19.17#ibcon#about to read 4, iclass 31, count 0 2006.229.06:49:19.17#ibcon#read 4, iclass 31, count 0 2006.229.06:49:19.17#ibcon#about to read 5, iclass 31, count 0 2006.229.06:49:19.17#ibcon#read 5, iclass 31, count 0 2006.229.06:49:19.17#ibcon#about to read 6, iclass 31, count 0 2006.229.06:49:19.17#ibcon#read 6, iclass 31, count 0 2006.229.06:49:19.17#ibcon#end of sib2, iclass 31, count 0 2006.229.06:49:19.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:49:19.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:49:19.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:49:19.17#ibcon#*before write, iclass 31, count 0 2006.229.06:49:19.17#ibcon#enter sib2, iclass 31, count 0 2006.229.06:49:19.17#ibcon#flushed, iclass 31, count 0 2006.229.06:49:19.17#ibcon#about to write, iclass 31, count 0 2006.229.06:49:19.17#ibcon#wrote, iclass 31, count 0 2006.229.06:49:19.17#ibcon#about to read 3, iclass 31, count 0 2006.229.06:49:19.18#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:49:19.21#ibcon#read 3, iclass 31, count 0 2006.229.06:49:19.21#ibcon#about to read 4, iclass 31, count 0 2006.229.06:49:19.21#ibcon#read 4, iclass 31, count 0 2006.229.06:49:19.21#ibcon#about to read 5, iclass 31, count 0 2006.229.06:49:19.21#ibcon#read 5, iclass 31, count 0 2006.229.06:49:19.21#ibcon#about to read 6, iclass 31, count 0 2006.229.06:49:19.21#ibcon#read 6, iclass 31, count 0 2006.229.06:49:19.21#ibcon#end of sib2, iclass 31, count 0 2006.229.06:49:19.21#ibcon#*after write, iclass 31, count 0 2006.229.06:49:19.21#ibcon#*before return 0, iclass 31, count 0 2006.229.06:49:19.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:49:19.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:49:19.21#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:49:19.21#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:49:19.21$vck44/va=7,5 2006.229.06:49:19.21#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:49:19.21#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:49:19.21#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:19.21#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:19.27#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:19.27#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:19.27#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:49:19.27#ibcon#first serial, iclass 34, count 2 2006.229.06:49:19.27#ibcon#enter sib2, iclass 34, count 2 2006.229.06:49:19.27#ibcon#flushed, iclass 34, count 2 2006.229.06:49:19.27#ibcon#about to write, iclass 34, count 2 2006.229.06:49:19.27#ibcon#wrote, iclass 34, count 2 2006.229.06:49:19.27#ibcon#about to read 3, iclass 34, count 2 2006.229.06:49:19.29#ibcon#read 3, iclass 34, count 2 2006.229.06:49:19.29#ibcon#about to read 4, iclass 34, count 2 2006.229.06:49:19.29#ibcon#read 4, iclass 34, count 2 2006.229.06:49:19.29#ibcon#about to read 5, iclass 34, count 2 2006.229.06:49:19.29#ibcon#read 5, iclass 34, count 2 2006.229.06:49:19.29#ibcon#about to read 6, iclass 34, count 2 2006.229.06:49:19.29#ibcon#read 6, iclass 34, count 2 2006.229.06:49:19.29#ibcon#end of sib2, iclass 34, count 2 2006.229.06:49:19.29#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:49:19.29#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:49:19.29#ibcon#[25=AT07-05\r\n] 2006.229.06:49:19.29#ibcon#*before write, iclass 34, count 2 2006.229.06:49:19.29#ibcon#enter sib2, iclass 34, count 2 2006.229.06:49:19.29#ibcon#flushed, iclass 34, count 2 2006.229.06:49:19.29#ibcon#about to write, iclass 34, count 2 2006.229.06:49:19.29#ibcon#wrote, iclass 34, count 2 2006.229.06:49:19.29#ibcon#about to read 3, iclass 34, count 2 2006.229.06:49:19.32#ibcon#read 3, iclass 34, count 2 2006.229.06:49:19.32#ibcon#about to read 4, iclass 34, count 2 2006.229.06:49:19.32#ibcon#read 4, iclass 34, count 2 2006.229.06:49:19.32#ibcon#about to read 5, iclass 34, count 2 2006.229.06:49:19.32#ibcon#read 5, iclass 34, count 2 2006.229.06:49:19.32#ibcon#about to read 6, iclass 34, count 2 2006.229.06:49:19.32#ibcon#read 6, iclass 34, count 2 2006.229.06:49:19.32#ibcon#end of sib2, iclass 34, count 2 2006.229.06:49:19.32#ibcon#*after write, iclass 34, count 2 2006.229.06:49:19.32#ibcon#*before return 0, iclass 34, count 2 2006.229.06:49:19.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:19.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:19.32#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:49:19.32#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:19.32#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:19.44#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:19.44#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:19.44#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:49:19.44#ibcon#first serial, iclass 34, count 0 2006.229.06:49:19.44#ibcon#enter sib2, iclass 34, count 0 2006.229.06:49:19.44#ibcon#flushed, iclass 34, count 0 2006.229.06:49:19.44#ibcon#about to write, iclass 34, count 0 2006.229.06:49:19.44#ibcon#wrote, iclass 34, count 0 2006.229.06:49:19.44#ibcon#about to read 3, iclass 34, count 0 2006.229.06:49:19.46#ibcon#read 3, iclass 34, count 0 2006.229.06:49:19.46#ibcon#about to read 4, iclass 34, count 0 2006.229.06:49:19.46#ibcon#read 4, iclass 34, count 0 2006.229.06:49:19.46#ibcon#about to read 5, iclass 34, count 0 2006.229.06:49:19.46#ibcon#read 5, iclass 34, count 0 2006.229.06:49:19.46#ibcon#about to read 6, iclass 34, count 0 2006.229.06:49:19.46#ibcon#read 6, iclass 34, count 0 2006.229.06:49:19.46#ibcon#end of sib2, iclass 34, count 0 2006.229.06:49:19.46#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:49:19.46#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:49:19.46#ibcon#[25=USB\r\n] 2006.229.06:49:19.46#ibcon#*before write, iclass 34, count 0 2006.229.06:49:19.46#ibcon#enter sib2, iclass 34, count 0 2006.229.06:49:19.46#ibcon#flushed, iclass 34, count 0 2006.229.06:49:19.46#ibcon#about to write, iclass 34, count 0 2006.229.06:49:19.46#ibcon#wrote, iclass 34, count 0 2006.229.06:49:19.46#ibcon#about to read 3, iclass 34, count 0 2006.229.06:49:19.49#ibcon#read 3, iclass 34, count 0 2006.229.06:49:19.49#ibcon#about to read 4, iclass 34, count 0 2006.229.06:49:19.49#ibcon#read 4, iclass 34, count 0 2006.229.06:49:19.49#ibcon#about to read 5, iclass 34, count 0 2006.229.06:49:19.49#ibcon#read 5, iclass 34, count 0 2006.229.06:49:19.49#ibcon#about to read 6, iclass 34, count 0 2006.229.06:49:19.49#ibcon#read 6, iclass 34, count 0 2006.229.06:49:19.49#ibcon#end of sib2, iclass 34, count 0 2006.229.06:49:19.49#ibcon#*after write, iclass 34, count 0 2006.229.06:49:19.49#ibcon#*before return 0, iclass 34, count 0 2006.229.06:49:19.49#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:19.49#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:19.49#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:49:19.49#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:49:19.49$vck44/valo=8,884.99 2006.229.06:49:19.49#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.06:49:19.49#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.06:49:19.49#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:19.49#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:19.49#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:19.49#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:19.49#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:49:19.49#ibcon#first serial, iclass 36, count 0 2006.229.06:49:19.49#ibcon#enter sib2, iclass 36, count 0 2006.229.06:49:19.49#ibcon#flushed, iclass 36, count 0 2006.229.06:49:19.49#ibcon#about to write, iclass 36, count 0 2006.229.06:49:19.49#ibcon#wrote, iclass 36, count 0 2006.229.06:49:19.49#ibcon#about to read 3, iclass 36, count 0 2006.229.06:49:19.51#ibcon#read 3, iclass 36, count 0 2006.229.06:49:19.51#ibcon#about to read 4, iclass 36, count 0 2006.229.06:49:19.51#ibcon#read 4, iclass 36, count 0 2006.229.06:49:19.51#ibcon#about to read 5, iclass 36, count 0 2006.229.06:49:19.51#ibcon#read 5, iclass 36, count 0 2006.229.06:49:19.51#ibcon#about to read 6, iclass 36, count 0 2006.229.06:49:19.51#ibcon#read 6, iclass 36, count 0 2006.229.06:49:19.51#ibcon#end of sib2, iclass 36, count 0 2006.229.06:49:19.51#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:49:19.51#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:49:19.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:49:19.51#ibcon#*before write, iclass 36, count 0 2006.229.06:49:19.51#ibcon#enter sib2, iclass 36, count 0 2006.229.06:49:19.51#ibcon#flushed, iclass 36, count 0 2006.229.06:49:19.51#ibcon#about to write, iclass 36, count 0 2006.229.06:49:19.51#ibcon#wrote, iclass 36, count 0 2006.229.06:49:19.51#ibcon#about to read 3, iclass 36, count 0 2006.229.06:49:19.55#ibcon#read 3, iclass 36, count 0 2006.229.06:49:19.55#ibcon#about to read 4, iclass 36, count 0 2006.229.06:49:19.55#ibcon#read 4, iclass 36, count 0 2006.229.06:49:19.55#ibcon#about to read 5, iclass 36, count 0 2006.229.06:49:19.55#ibcon#read 5, iclass 36, count 0 2006.229.06:49:19.55#ibcon#about to read 6, iclass 36, count 0 2006.229.06:49:19.55#ibcon#read 6, iclass 36, count 0 2006.229.06:49:19.55#ibcon#end of sib2, iclass 36, count 0 2006.229.06:49:19.55#ibcon#*after write, iclass 36, count 0 2006.229.06:49:19.55#ibcon#*before return 0, iclass 36, count 0 2006.229.06:49:19.55#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:19.55#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:19.55#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:49:19.55#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:49:19.55$vck44/va=8,6 2006.229.06:49:19.55#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.06:49:19.55#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.06:49:19.55#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:19.55#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:49:19.61#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:49:19.61#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:49:19.61#ibcon#enter wrdev, iclass 38, count 2 2006.229.06:49:19.61#ibcon#first serial, iclass 38, count 2 2006.229.06:49:19.61#ibcon#enter sib2, iclass 38, count 2 2006.229.06:49:19.61#ibcon#flushed, iclass 38, count 2 2006.229.06:49:19.61#ibcon#about to write, iclass 38, count 2 2006.229.06:49:19.61#ibcon#wrote, iclass 38, count 2 2006.229.06:49:19.61#ibcon#about to read 3, iclass 38, count 2 2006.229.06:49:19.63#ibcon#read 3, iclass 38, count 2 2006.229.06:49:19.63#ibcon#about to read 4, iclass 38, count 2 2006.229.06:49:19.63#ibcon#read 4, iclass 38, count 2 2006.229.06:49:19.63#ibcon#about to read 5, iclass 38, count 2 2006.229.06:49:19.63#ibcon#read 5, iclass 38, count 2 2006.229.06:49:19.63#ibcon#about to read 6, iclass 38, count 2 2006.229.06:49:19.63#ibcon#read 6, iclass 38, count 2 2006.229.06:49:19.63#ibcon#end of sib2, iclass 38, count 2 2006.229.06:49:19.63#ibcon#*mode == 0, iclass 38, count 2 2006.229.06:49:19.63#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.06:49:19.63#ibcon#[25=AT08-06\r\n] 2006.229.06:49:19.63#ibcon#*before write, iclass 38, count 2 2006.229.06:49:19.63#ibcon#enter sib2, iclass 38, count 2 2006.229.06:49:19.63#ibcon#flushed, iclass 38, count 2 2006.229.06:49:19.63#ibcon#about to write, iclass 38, count 2 2006.229.06:49:19.63#ibcon#wrote, iclass 38, count 2 2006.229.06:49:19.63#ibcon#about to read 3, iclass 38, count 2 2006.229.06:49:19.66#ibcon#read 3, iclass 38, count 2 2006.229.06:49:19.66#ibcon#about to read 4, iclass 38, count 2 2006.229.06:49:19.66#ibcon#read 4, iclass 38, count 2 2006.229.06:49:19.66#ibcon#about to read 5, iclass 38, count 2 2006.229.06:49:19.66#ibcon#read 5, iclass 38, count 2 2006.229.06:49:19.66#ibcon#about to read 6, iclass 38, count 2 2006.229.06:49:19.66#ibcon#read 6, iclass 38, count 2 2006.229.06:49:19.66#ibcon#end of sib2, iclass 38, count 2 2006.229.06:49:19.66#ibcon#*after write, iclass 38, count 2 2006.229.06:49:19.66#ibcon#*before return 0, iclass 38, count 2 2006.229.06:49:19.66#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:49:19.66#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.06:49:19.66#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.06:49:19.66#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:19.66#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:49:19.78#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:49:19.78#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:49:19.78#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:49:19.78#ibcon#first serial, iclass 38, count 0 2006.229.06:49:19.78#ibcon#enter sib2, iclass 38, count 0 2006.229.06:49:19.78#ibcon#flushed, iclass 38, count 0 2006.229.06:49:19.78#ibcon#about to write, iclass 38, count 0 2006.229.06:49:19.78#ibcon#wrote, iclass 38, count 0 2006.229.06:49:19.78#ibcon#about to read 3, iclass 38, count 0 2006.229.06:49:19.80#ibcon#read 3, iclass 38, count 0 2006.229.06:49:19.80#ibcon#about to read 4, iclass 38, count 0 2006.229.06:49:19.80#ibcon#read 4, iclass 38, count 0 2006.229.06:49:19.80#ibcon#about to read 5, iclass 38, count 0 2006.229.06:49:19.80#ibcon#read 5, iclass 38, count 0 2006.229.06:49:19.80#ibcon#about to read 6, iclass 38, count 0 2006.229.06:49:19.80#ibcon#read 6, iclass 38, count 0 2006.229.06:49:19.80#ibcon#end of sib2, iclass 38, count 0 2006.229.06:49:19.80#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:49:19.80#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:49:19.80#ibcon#[25=USB\r\n] 2006.229.06:49:19.80#ibcon#*before write, iclass 38, count 0 2006.229.06:49:19.80#ibcon#enter sib2, iclass 38, count 0 2006.229.06:49:19.80#ibcon#flushed, iclass 38, count 0 2006.229.06:49:19.80#ibcon#about to write, iclass 38, count 0 2006.229.06:49:19.80#ibcon#wrote, iclass 38, count 0 2006.229.06:49:19.80#ibcon#about to read 3, iclass 38, count 0 2006.229.06:49:19.83#ibcon#read 3, iclass 38, count 0 2006.229.06:49:19.83#ibcon#about to read 4, iclass 38, count 0 2006.229.06:49:19.83#ibcon#read 4, iclass 38, count 0 2006.229.06:49:19.83#ibcon#about to read 5, iclass 38, count 0 2006.229.06:49:19.83#ibcon#read 5, iclass 38, count 0 2006.229.06:49:19.83#ibcon#about to read 6, iclass 38, count 0 2006.229.06:49:19.83#ibcon#read 6, iclass 38, count 0 2006.229.06:49:19.83#ibcon#end of sib2, iclass 38, count 0 2006.229.06:49:19.83#ibcon#*after write, iclass 38, count 0 2006.229.06:49:19.83#ibcon#*before return 0, iclass 38, count 0 2006.229.06:49:19.83#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:49:19.83#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.06:49:19.83#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:49:19.83#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:49:19.83$vck44/vblo=1,629.99 2006.229.06:49:19.83#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.06:49:19.83#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.06:49:19.83#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:19.83#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:19.83#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:19.83#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:19.83#ibcon#enter wrdev, iclass 40, count 0 2006.229.06:49:19.83#ibcon#first serial, iclass 40, count 0 2006.229.06:49:19.83#ibcon#enter sib2, iclass 40, count 0 2006.229.06:49:19.83#ibcon#flushed, iclass 40, count 0 2006.229.06:49:19.83#ibcon#about to write, iclass 40, count 0 2006.229.06:49:19.83#ibcon#wrote, iclass 40, count 0 2006.229.06:49:19.83#ibcon#about to read 3, iclass 40, count 0 2006.229.06:49:19.85#ibcon#read 3, iclass 40, count 0 2006.229.06:49:19.85#ibcon#about to read 4, iclass 40, count 0 2006.229.06:49:19.85#ibcon#read 4, iclass 40, count 0 2006.229.06:49:19.85#ibcon#about to read 5, iclass 40, count 0 2006.229.06:49:19.85#ibcon#read 5, iclass 40, count 0 2006.229.06:49:19.85#ibcon#about to read 6, iclass 40, count 0 2006.229.06:49:19.85#ibcon#read 6, iclass 40, count 0 2006.229.06:49:19.85#ibcon#end of sib2, iclass 40, count 0 2006.229.06:49:19.85#ibcon#*mode == 0, iclass 40, count 0 2006.229.06:49:19.85#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.06:49:19.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:49:19.85#ibcon#*before write, iclass 40, count 0 2006.229.06:49:19.85#ibcon#enter sib2, iclass 40, count 0 2006.229.06:49:19.85#ibcon#flushed, iclass 40, count 0 2006.229.06:49:19.85#ibcon#about to write, iclass 40, count 0 2006.229.06:49:19.85#ibcon#wrote, iclass 40, count 0 2006.229.06:49:19.85#ibcon#about to read 3, iclass 40, count 0 2006.229.06:49:19.89#ibcon#read 3, iclass 40, count 0 2006.229.06:49:19.89#ibcon#about to read 4, iclass 40, count 0 2006.229.06:49:19.89#ibcon#read 4, iclass 40, count 0 2006.229.06:49:19.89#ibcon#about to read 5, iclass 40, count 0 2006.229.06:49:19.89#ibcon#read 5, iclass 40, count 0 2006.229.06:49:19.89#ibcon#about to read 6, iclass 40, count 0 2006.229.06:49:19.89#ibcon#read 6, iclass 40, count 0 2006.229.06:49:19.89#ibcon#end of sib2, iclass 40, count 0 2006.229.06:49:19.89#ibcon#*after write, iclass 40, count 0 2006.229.06:49:19.89#ibcon#*before return 0, iclass 40, count 0 2006.229.06:49:19.89#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:19.89#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.06:49:19.89#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.06:49:19.89#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.06:49:19.89$vck44/vb=1,4 2006.229.06:49:19.89#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.06:49:19.89#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.06:49:19.89#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:19.89#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:19.89#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:19.89#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:19.89#ibcon#enter wrdev, iclass 4, count 2 2006.229.06:49:19.89#ibcon#first serial, iclass 4, count 2 2006.229.06:49:19.89#ibcon#enter sib2, iclass 4, count 2 2006.229.06:49:19.89#ibcon#flushed, iclass 4, count 2 2006.229.06:49:19.89#ibcon#about to write, iclass 4, count 2 2006.229.06:49:19.89#ibcon#wrote, iclass 4, count 2 2006.229.06:49:19.89#ibcon#about to read 3, iclass 4, count 2 2006.229.06:49:19.91#ibcon#read 3, iclass 4, count 2 2006.229.06:49:19.91#ibcon#about to read 4, iclass 4, count 2 2006.229.06:49:19.91#ibcon#read 4, iclass 4, count 2 2006.229.06:49:19.91#ibcon#about to read 5, iclass 4, count 2 2006.229.06:49:19.91#ibcon#read 5, iclass 4, count 2 2006.229.06:49:19.91#ibcon#about to read 6, iclass 4, count 2 2006.229.06:49:19.91#ibcon#read 6, iclass 4, count 2 2006.229.06:49:19.91#ibcon#end of sib2, iclass 4, count 2 2006.229.06:49:19.91#ibcon#*mode == 0, iclass 4, count 2 2006.229.06:49:19.91#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.06:49:19.91#ibcon#[27=AT01-04\r\n] 2006.229.06:49:19.91#ibcon#*before write, iclass 4, count 2 2006.229.06:49:19.91#ibcon#enter sib2, iclass 4, count 2 2006.229.06:49:19.91#ibcon#flushed, iclass 4, count 2 2006.229.06:49:19.91#ibcon#about to write, iclass 4, count 2 2006.229.06:49:19.91#ibcon#wrote, iclass 4, count 2 2006.229.06:49:19.91#ibcon#about to read 3, iclass 4, count 2 2006.229.06:49:19.94#ibcon#read 3, iclass 4, count 2 2006.229.06:49:19.94#ibcon#about to read 4, iclass 4, count 2 2006.229.06:49:19.94#ibcon#read 4, iclass 4, count 2 2006.229.06:49:19.94#ibcon#about to read 5, iclass 4, count 2 2006.229.06:49:19.94#ibcon#read 5, iclass 4, count 2 2006.229.06:49:19.94#ibcon#about to read 6, iclass 4, count 2 2006.229.06:49:19.94#ibcon#read 6, iclass 4, count 2 2006.229.06:49:19.94#ibcon#end of sib2, iclass 4, count 2 2006.229.06:49:19.94#ibcon#*after write, iclass 4, count 2 2006.229.06:49:19.94#ibcon#*before return 0, iclass 4, count 2 2006.229.06:49:19.94#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:19.94#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.06:49:19.94#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.06:49:19.94#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:19.94#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:20.06#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:20.06#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:20.06#ibcon#enter wrdev, iclass 4, count 0 2006.229.06:49:20.06#ibcon#first serial, iclass 4, count 0 2006.229.06:49:20.06#ibcon#enter sib2, iclass 4, count 0 2006.229.06:49:20.06#ibcon#flushed, iclass 4, count 0 2006.229.06:49:20.06#ibcon#about to write, iclass 4, count 0 2006.229.06:49:20.06#ibcon#wrote, iclass 4, count 0 2006.229.06:49:20.06#ibcon#about to read 3, iclass 4, count 0 2006.229.06:49:20.08#ibcon#read 3, iclass 4, count 0 2006.229.06:49:20.08#ibcon#about to read 4, iclass 4, count 0 2006.229.06:49:20.08#ibcon#read 4, iclass 4, count 0 2006.229.06:49:20.08#ibcon#about to read 5, iclass 4, count 0 2006.229.06:49:20.08#ibcon#read 5, iclass 4, count 0 2006.229.06:49:20.08#ibcon#about to read 6, iclass 4, count 0 2006.229.06:49:20.08#ibcon#read 6, iclass 4, count 0 2006.229.06:49:20.08#ibcon#end of sib2, iclass 4, count 0 2006.229.06:49:20.08#ibcon#*mode == 0, iclass 4, count 0 2006.229.06:49:20.08#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.06:49:20.08#ibcon#[27=USB\r\n] 2006.229.06:49:20.08#ibcon#*before write, iclass 4, count 0 2006.229.06:49:20.08#ibcon#enter sib2, iclass 4, count 0 2006.229.06:49:20.08#ibcon#flushed, iclass 4, count 0 2006.229.06:49:20.08#ibcon#about to write, iclass 4, count 0 2006.229.06:49:20.08#ibcon#wrote, iclass 4, count 0 2006.229.06:49:20.08#ibcon#about to read 3, iclass 4, count 0 2006.229.06:49:20.11#ibcon#read 3, iclass 4, count 0 2006.229.06:49:20.11#ibcon#about to read 4, iclass 4, count 0 2006.229.06:49:20.11#ibcon#read 4, iclass 4, count 0 2006.229.06:49:20.11#ibcon#about to read 5, iclass 4, count 0 2006.229.06:49:20.11#ibcon#read 5, iclass 4, count 0 2006.229.06:49:20.11#ibcon#about to read 6, iclass 4, count 0 2006.229.06:49:20.11#ibcon#read 6, iclass 4, count 0 2006.229.06:49:20.11#ibcon#end of sib2, iclass 4, count 0 2006.229.06:49:20.11#ibcon#*after write, iclass 4, count 0 2006.229.06:49:20.11#ibcon#*before return 0, iclass 4, count 0 2006.229.06:49:20.11#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:20.11#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.06:49:20.11#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.06:49:20.11#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.06:49:20.11$vck44/vblo=2,634.99 2006.229.06:49:20.11#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.06:49:20.11#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.06:49:20.11#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:20.11#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:20.11#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:20.11#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:20.11#ibcon#enter wrdev, iclass 6, count 0 2006.229.06:49:20.11#ibcon#first serial, iclass 6, count 0 2006.229.06:49:20.11#ibcon#enter sib2, iclass 6, count 0 2006.229.06:49:20.11#ibcon#flushed, iclass 6, count 0 2006.229.06:49:20.11#ibcon#about to write, iclass 6, count 0 2006.229.06:49:20.11#ibcon#wrote, iclass 6, count 0 2006.229.06:49:20.11#ibcon#about to read 3, iclass 6, count 0 2006.229.06:49:20.13#ibcon#read 3, iclass 6, count 0 2006.229.06:49:20.13#ibcon#about to read 4, iclass 6, count 0 2006.229.06:49:20.13#ibcon#read 4, iclass 6, count 0 2006.229.06:49:20.13#ibcon#about to read 5, iclass 6, count 0 2006.229.06:49:20.13#ibcon#read 5, iclass 6, count 0 2006.229.06:49:20.13#ibcon#about to read 6, iclass 6, count 0 2006.229.06:49:20.13#ibcon#read 6, iclass 6, count 0 2006.229.06:49:20.13#ibcon#end of sib2, iclass 6, count 0 2006.229.06:49:20.13#ibcon#*mode == 0, iclass 6, count 0 2006.229.06:49:20.13#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.06:49:20.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:49:20.13#ibcon#*before write, iclass 6, count 0 2006.229.06:49:20.13#ibcon#enter sib2, iclass 6, count 0 2006.229.06:49:20.13#ibcon#flushed, iclass 6, count 0 2006.229.06:49:20.13#ibcon#about to write, iclass 6, count 0 2006.229.06:49:20.13#ibcon#wrote, iclass 6, count 0 2006.229.06:49:20.13#ibcon#about to read 3, iclass 6, count 0 2006.229.06:49:20.17#ibcon#read 3, iclass 6, count 0 2006.229.06:49:20.17#ibcon#about to read 4, iclass 6, count 0 2006.229.06:49:20.17#ibcon#read 4, iclass 6, count 0 2006.229.06:49:20.17#ibcon#about to read 5, iclass 6, count 0 2006.229.06:49:20.17#ibcon#read 5, iclass 6, count 0 2006.229.06:49:20.17#ibcon#about to read 6, iclass 6, count 0 2006.229.06:49:20.17#ibcon#read 6, iclass 6, count 0 2006.229.06:49:20.17#ibcon#end of sib2, iclass 6, count 0 2006.229.06:49:20.17#ibcon#*after write, iclass 6, count 0 2006.229.06:49:20.17#ibcon#*before return 0, iclass 6, count 0 2006.229.06:49:20.17#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:20.17#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.06:49:20.17#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.06:49:20.17#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.06:49:20.17$vck44/vb=2,4 2006.229.06:49:20.17#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.06:49:20.17#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.06:49:20.17#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:20.17#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:20.23#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:20.23#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:20.23#ibcon#enter wrdev, iclass 10, count 2 2006.229.06:49:20.23#ibcon#first serial, iclass 10, count 2 2006.229.06:49:20.23#ibcon#enter sib2, iclass 10, count 2 2006.229.06:49:20.23#ibcon#flushed, iclass 10, count 2 2006.229.06:49:20.23#ibcon#about to write, iclass 10, count 2 2006.229.06:49:20.23#ibcon#wrote, iclass 10, count 2 2006.229.06:49:20.23#ibcon#about to read 3, iclass 10, count 2 2006.229.06:49:20.25#ibcon#read 3, iclass 10, count 2 2006.229.06:49:20.25#ibcon#about to read 4, iclass 10, count 2 2006.229.06:49:20.25#ibcon#read 4, iclass 10, count 2 2006.229.06:49:20.25#ibcon#about to read 5, iclass 10, count 2 2006.229.06:49:20.25#ibcon#read 5, iclass 10, count 2 2006.229.06:49:20.25#ibcon#about to read 6, iclass 10, count 2 2006.229.06:49:20.25#ibcon#read 6, iclass 10, count 2 2006.229.06:49:20.25#ibcon#end of sib2, iclass 10, count 2 2006.229.06:49:20.25#ibcon#*mode == 0, iclass 10, count 2 2006.229.06:49:20.25#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.06:49:20.25#ibcon#[27=AT02-04\r\n] 2006.229.06:49:20.25#ibcon#*before write, iclass 10, count 2 2006.229.06:49:20.25#ibcon#enter sib2, iclass 10, count 2 2006.229.06:49:20.25#ibcon#flushed, iclass 10, count 2 2006.229.06:49:20.25#ibcon#about to write, iclass 10, count 2 2006.229.06:49:20.25#ibcon#wrote, iclass 10, count 2 2006.229.06:49:20.25#ibcon#about to read 3, iclass 10, count 2 2006.229.06:49:20.28#ibcon#read 3, iclass 10, count 2 2006.229.06:49:20.28#ibcon#about to read 4, iclass 10, count 2 2006.229.06:49:20.28#ibcon#read 4, iclass 10, count 2 2006.229.06:49:20.28#ibcon#about to read 5, iclass 10, count 2 2006.229.06:49:20.28#ibcon#read 5, iclass 10, count 2 2006.229.06:49:20.28#ibcon#about to read 6, iclass 10, count 2 2006.229.06:49:20.28#ibcon#read 6, iclass 10, count 2 2006.229.06:49:20.28#ibcon#end of sib2, iclass 10, count 2 2006.229.06:49:20.28#ibcon#*after write, iclass 10, count 2 2006.229.06:49:20.28#ibcon#*before return 0, iclass 10, count 2 2006.229.06:49:20.28#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:20.28#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.06:49:20.28#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.06:49:20.28#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:20.28#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:20.40#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:20.40#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:20.40#ibcon#enter wrdev, iclass 10, count 0 2006.229.06:49:20.40#ibcon#first serial, iclass 10, count 0 2006.229.06:49:20.40#ibcon#enter sib2, iclass 10, count 0 2006.229.06:49:20.40#ibcon#flushed, iclass 10, count 0 2006.229.06:49:20.40#ibcon#about to write, iclass 10, count 0 2006.229.06:49:20.40#ibcon#wrote, iclass 10, count 0 2006.229.06:49:20.40#ibcon#about to read 3, iclass 10, count 0 2006.229.06:49:20.42#ibcon#read 3, iclass 10, count 0 2006.229.06:49:20.42#ibcon#about to read 4, iclass 10, count 0 2006.229.06:49:20.42#ibcon#read 4, iclass 10, count 0 2006.229.06:49:20.42#ibcon#about to read 5, iclass 10, count 0 2006.229.06:49:20.42#ibcon#read 5, iclass 10, count 0 2006.229.06:49:20.42#ibcon#about to read 6, iclass 10, count 0 2006.229.06:49:20.42#ibcon#read 6, iclass 10, count 0 2006.229.06:49:20.42#ibcon#end of sib2, iclass 10, count 0 2006.229.06:49:20.42#ibcon#*mode == 0, iclass 10, count 0 2006.229.06:49:20.42#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.06:49:20.42#ibcon#[27=USB\r\n] 2006.229.06:49:20.42#ibcon#*before write, iclass 10, count 0 2006.229.06:49:20.42#ibcon#enter sib2, iclass 10, count 0 2006.229.06:49:20.42#ibcon#flushed, iclass 10, count 0 2006.229.06:49:20.42#ibcon#about to write, iclass 10, count 0 2006.229.06:49:20.42#ibcon#wrote, iclass 10, count 0 2006.229.06:49:20.42#ibcon#about to read 3, iclass 10, count 0 2006.229.06:49:20.45#ibcon#read 3, iclass 10, count 0 2006.229.06:49:20.45#ibcon#about to read 4, iclass 10, count 0 2006.229.06:49:20.45#ibcon#read 4, iclass 10, count 0 2006.229.06:49:20.45#ibcon#about to read 5, iclass 10, count 0 2006.229.06:49:20.45#ibcon#read 5, iclass 10, count 0 2006.229.06:49:20.45#ibcon#about to read 6, iclass 10, count 0 2006.229.06:49:20.45#ibcon#read 6, iclass 10, count 0 2006.229.06:49:20.45#ibcon#end of sib2, iclass 10, count 0 2006.229.06:49:20.45#ibcon#*after write, iclass 10, count 0 2006.229.06:49:20.45#ibcon#*before return 0, iclass 10, count 0 2006.229.06:49:20.45#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:20.45#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.06:49:20.45#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.06:49:20.45#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.06:49:20.45$vck44/vblo=3,649.99 2006.229.06:49:20.45#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.06:49:20.45#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.06:49:20.45#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:20.45#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:20.45#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:20.45#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:20.45#ibcon#enter wrdev, iclass 12, count 0 2006.229.06:49:20.45#ibcon#first serial, iclass 12, count 0 2006.229.06:49:20.45#ibcon#enter sib2, iclass 12, count 0 2006.229.06:49:20.45#ibcon#flushed, iclass 12, count 0 2006.229.06:49:20.45#ibcon#about to write, iclass 12, count 0 2006.229.06:49:20.45#ibcon#wrote, iclass 12, count 0 2006.229.06:49:20.45#ibcon#about to read 3, iclass 12, count 0 2006.229.06:49:20.47#ibcon#read 3, iclass 12, count 0 2006.229.06:49:20.47#ibcon#about to read 4, iclass 12, count 0 2006.229.06:49:20.47#ibcon#read 4, iclass 12, count 0 2006.229.06:49:20.47#ibcon#about to read 5, iclass 12, count 0 2006.229.06:49:20.47#ibcon#read 5, iclass 12, count 0 2006.229.06:49:20.47#ibcon#about to read 6, iclass 12, count 0 2006.229.06:49:20.47#ibcon#read 6, iclass 12, count 0 2006.229.06:49:20.47#ibcon#end of sib2, iclass 12, count 0 2006.229.06:49:20.47#ibcon#*mode == 0, iclass 12, count 0 2006.229.06:49:20.47#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.06:49:20.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:49:20.47#ibcon#*before write, iclass 12, count 0 2006.229.06:49:20.47#ibcon#enter sib2, iclass 12, count 0 2006.229.06:49:20.47#ibcon#flushed, iclass 12, count 0 2006.229.06:49:20.47#ibcon#about to write, iclass 12, count 0 2006.229.06:49:20.47#ibcon#wrote, iclass 12, count 0 2006.229.06:49:20.47#ibcon#about to read 3, iclass 12, count 0 2006.229.06:49:20.51#ibcon#read 3, iclass 12, count 0 2006.229.06:49:20.51#ibcon#about to read 4, iclass 12, count 0 2006.229.06:49:20.51#ibcon#read 4, iclass 12, count 0 2006.229.06:49:20.51#ibcon#about to read 5, iclass 12, count 0 2006.229.06:49:20.51#ibcon#read 5, iclass 12, count 0 2006.229.06:49:20.51#ibcon#about to read 6, iclass 12, count 0 2006.229.06:49:20.51#ibcon#read 6, iclass 12, count 0 2006.229.06:49:20.51#ibcon#end of sib2, iclass 12, count 0 2006.229.06:49:20.51#ibcon#*after write, iclass 12, count 0 2006.229.06:49:20.51#ibcon#*before return 0, iclass 12, count 0 2006.229.06:49:20.51#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:20.51#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.06:49:20.51#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.06:49:20.51#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.06:49:20.51$vck44/vb=3,4 2006.229.06:49:20.51#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.06:49:20.51#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.06:49:20.51#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:20.51#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:20.57#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:20.57#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:20.57#ibcon#enter wrdev, iclass 14, count 2 2006.229.06:49:20.57#ibcon#first serial, iclass 14, count 2 2006.229.06:49:20.57#ibcon#enter sib2, iclass 14, count 2 2006.229.06:49:20.57#ibcon#flushed, iclass 14, count 2 2006.229.06:49:20.57#ibcon#about to write, iclass 14, count 2 2006.229.06:49:20.57#ibcon#wrote, iclass 14, count 2 2006.229.06:49:20.57#ibcon#about to read 3, iclass 14, count 2 2006.229.06:49:20.59#ibcon#read 3, iclass 14, count 2 2006.229.06:49:20.59#ibcon#about to read 4, iclass 14, count 2 2006.229.06:49:20.59#ibcon#read 4, iclass 14, count 2 2006.229.06:49:20.59#ibcon#about to read 5, iclass 14, count 2 2006.229.06:49:20.59#ibcon#read 5, iclass 14, count 2 2006.229.06:49:20.59#ibcon#about to read 6, iclass 14, count 2 2006.229.06:49:20.59#ibcon#read 6, iclass 14, count 2 2006.229.06:49:20.59#ibcon#end of sib2, iclass 14, count 2 2006.229.06:49:20.59#ibcon#*mode == 0, iclass 14, count 2 2006.229.06:49:20.59#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.06:49:20.59#ibcon#[27=AT03-04\r\n] 2006.229.06:49:20.59#ibcon#*before write, iclass 14, count 2 2006.229.06:49:20.59#ibcon#enter sib2, iclass 14, count 2 2006.229.06:49:20.59#ibcon#flushed, iclass 14, count 2 2006.229.06:49:20.59#ibcon#about to write, iclass 14, count 2 2006.229.06:49:20.59#ibcon#wrote, iclass 14, count 2 2006.229.06:49:20.59#ibcon#about to read 3, iclass 14, count 2 2006.229.06:49:20.62#ibcon#read 3, iclass 14, count 2 2006.229.06:49:20.62#ibcon#about to read 4, iclass 14, count 2 2006.229.06:49:20.62#ibcon#read 4, iclass 14, count 2 2006.229.06:49:20.62#ibcon#about to read 5, iclass 14, count 2 2006.229.06:49:20.62#ibcon#read 5, iclass 14, count 2 2006.229.06:49:20.62#ibcon#about to read 6, iclass 14, count 2 2006.229.06:49:20.62#ibcon#read 6, iclass 14, count 2 2006.229.06:49:20.62#ibcon#end of sib2, iclass 14, count 2 2006.229.06:49:20.62#ibcon#*after write, iclass 14, count 2 2006.229.06:49:20.62#ibcon#*before return 0, iclass 14, count 2 2006.229.06:49:20.62#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:20.62#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.06:49:20.62#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.06:49:20.62#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:20.62#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:20.74#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:20.74#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:20.74#ibcon#enter wrdev, iclass 14, count 0 2006.229.06:49:20.74#ibcon#first serial, iclass 14, count 0 2006.229.06:49:20.74#ibcon#enter sib2, iclass 14, count 0 2006.229.06:49:20.74#ibcon#flushed, iclass 14, count 0 2006.229.06:49:20.74#ibcon#about to write, iclass 14, count 0 2006.229.06:49:20.74#ibcon#wrote, iclass 14, count 0 2006.229.06:49:20.74#ibcon#about to read 3, iclass 14, count 0 2006.229.06:49:20.76#ibcon#read 3, iclass 14, count 0 2006.229.06:49:20.76#ibcon#about to read 4, iclass 14, count 0 2006.229.06:49:20.76#ibcon#read 4, iclass 14, count 0 2006.229.06:49:20.76#ibcon#about to read 5, iclass 14, count 0 2006.229.06:49:20.76#ibcon#read 5, iclass 14, count 0 2006.229.06:49:20.76#ibcon#about to read 6, iclass 14, count 0 2006.229.06:49:20.76#ibcon#read 6, iclass 14, count 0 2006.229.06:49:20.76#ibcon#end of sib2, iclass 14, count 0 2006.229.06:49:20.76#ibcon#*mode == 0, iclass 14, count 0 2006.229.06:49:20.76#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.06:49:20.76#ibcon#[27=USB\r\n] 2006.229.06:49:20.76#ibcon#*before write, iclass 14, count 0 2006.229.06:49:20.76#ibcon#enter sib2, iclass 14, count 0 2006.229.06:49:20.76#ibcon#flushed, iclass 14, count 0 2006.229.06:49:20.76#ibcon#about to write, iclass 14, count 0 2006.229.06:49:20.76#ibcon#wrote, iclass 14, count 0 2006.229.06:49:20.76#ibcon#about to read 3, iclass 14, count 0 2006.229.06:49:20.79#ibcon#read 3, iclass 14, count 0 2006.229.06:49:20.79#ibcon#about to read 4, iclass 14, count 0 2006.229.06:49:20.79#ibcon#read 4, iclass 14, count 0 2006.229.06:49:20.79#ibcon#about to read 5, iclass 14, count 0 2006.229.06:49:20.79#ibcon#read 5, iclass 14, count 0 2006.229.06:49:20.79#ibcon#about to read 6, iclass 14, count 0 2006.229.06:49:20.79#ibcon#read 6, iclass 14, count 0 2006.229.06:49:20.79#ibcon#end of sib2, iclass 14, count 0 2006.229.06:49:20.79#ibcon#*after write, iclass 14, count 0 2006.229.06:49:20.79#ibcon#*before return 0, iclass 14, count 0 2006.229.06:49:20.79#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:20.79#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.06:49:20.79#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.06:49:20.79#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.06:49:20.79$vck44/vblo=4,679.99 2006.229.06:49:20.79#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.06:49:20.79#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.06:49:20.79#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:20.79#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:20.79#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:20.79#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:20.79#ibcon#enter wrdev, iclass 16, count 0 2006.229.06:49:20.79#ibcon#first serial, iclass 16, count 0 2006.229.06:49:20.79#ibcon#enter sib2, iclass 16, count 0 2006.229.06:49:20.79#ibcon#flushed, iclass 16, count 0 2006.229.06:49:20.79#ibcon#about to write, iclass 16, count 0 2006.229.06:49:20.79#ibcon#wrote, iclass 16, count 0 2006.229.06:49:20.79#ibcon#about to read 3, iclass 16, count 0 2006.229.06:49:20.81#ibcon#read 3, iclass 16, count 0 2006.229.06:49:20.81#ibcon#about to read 4, iclass 16, count 0 2006.229.06:49:20.81#ibcon#read 4, iclass 16, count 0 2006.229.06:49:20.81#ibcon#about to read 5, iclass 16, count 0 2006.229.06:49:20.81#ibcon#read 5, iclass 16, count 0 2006.229.06:49:20.81#ibcon#about to read 6, iclass 16, count 0 2006.229.06:49:20.81#ibcon#read 6, iclass 16, count 0 2006.229.06:49:20.81#ibcon#end of sib2, iclass 16, count 0 2006.229.06:49:20.81#ibcon#*mode == 0, iclass 16, count 0 2006.229.06:49:20.81#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.06:49:20.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:49:20.81#ibcon#*before write, iclass 16, count 0 2006.229.06:49:20.81#ibcon#enter sib2, iclass 16, count 0 2006.229.06:49:20.81#ibcon#flushed, iclass 16, count 0 2006.229.06:49:20.81#ibcon#about to write, iclass 16, count 0 2006.229.06:49:20.81#ibcon#wrote, iclass 16, count 0 2006.229.06:49:20.81#ibcon#about to read 3, iclass 16, count 0 2006.229.06:49:20.85#ibcon#read 3, iclass 16, count 0 2006.229.06:49:20.85#ibcon#about to read 4, iclass 16, count 0 2006.229.06:49:20.85#ibcon#read 4, iclass 16, count 0 2006.229.06:49:20.85#ibcon#about to read 5, iclass 16, count 0 2006.229.06:49:20.85#ibcon#read 5, iclass 16, count 0 2006.229.06:49:20.85#ibcon#about to read 6, iclass 16, count 0 2006.229.06:49:20.85#ibcon#read 6, iclass 16, count 0 2006.229.06:49:20.85#ibcon#end of sib2, iclass 16, count 0 2006.229.06:49:20.85#ibcon#*after write, iclass 16, count 0 2006.229.06:49:20.85#ibcon#*before return 0, iclass 16, count 0 2006.229.06:49:20.85#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:20.85#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.06:49:20.85#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.06:49:20.85#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.06:49:20.85$vck44/vb=4,4 2006.229.06:49:20.85#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.06:49:20.85#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.06:49:20.85#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:20.85#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:20.91#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:20.91#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:20.91#ibcon#enter wrdev, iclass 18, count 2 2006.229.06:49:20.91#ibcon#first serial, iclass 18, count 2 2006.229.06:49:20.91#ibcon#enter sib2, iclass 18, count 2 2006.229.06:49:20.91#ibcon#flushed, iclass 18, count 2 2006.229.06:49:20.91#ibcon#about to write, iclass 18, count 2 2006.229.06:49:20.91#ibcon#wrote, iclass 18, count 2 2006.229.06:49:20.91#ibcon#about to read 3, iclass 18, count 2 2006.229.06:49:20.93#ibcon#read 3, iclass 18, count 2 2006.229.06:49:20.93#ibcon#about to read 4, iclass 18, count 2 2006.229.06:49:20.93#ibcon#read 4, iclass 18, count 2 2006.229.06:49:20.93#ibcon#about to read 5, iclass 18, count 2 2006.229.06:49:20.93#ibcon#read 5, iclass 18, count 2 2006.229.06:49:20.93#ibcon#about to read 6, iclass 18, count 2 2006.229.06:49:20.93#ibcon#read 6, iclass 18, count 2 2006.229.06:49:20.93#ibcon#end of sib2, iclass 18, count 2 2006.229.06:49:20.93#ibcon#*mode == 0, iclass 18, count 2 2006.229.06:49:20.93#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.06:49:20.93#ibcon#[27=AT04-04\r\n] 2006.229.06:49:20.93#ibcon#*before write, iclass 18, count 2 2006.229.06:49:20.93#ibcon#enter sib2, iclass 18, count 2 2006.229.06:49:20.93#ibcon#flushed, iclass 18, count 2 2006.229.06:49:20.93#ibcon#about to write, iclass 18, count 2 2006.229.06:49:20.93#ibcon#wrote, iclass 18, count 2 2006.229.06:49:20.93#ibcon#about to read 3, iclass 18, count 2 2006.229.06:49:20.96#ibcon#read 3, iclass 18, count 2 2006.229.06:49:20.96#ibcon#about to read 4, iclass 18, count 2 2006.229.06:49:20.96#ibcon#read 4, iclass 18, count 2 2006.229.06:49:20.96#ibcon#about to read 5, iclass 18, count 2 2006.229.06:49:20.96#ibcon#read 5, iclass 18, count 2 2006.229.06:49:20.96#ibcon#about to read 6, iclass 18, count 2 2006.229.06:49:20.96#ibcon#read 6, iclass 18, count 2 2006.229.06:49:20.96#ibcon#end of sib2, iclass 18, count 2 2006.229.06:49:20.96#ibcon#*after write, iclass 18, count 2 2006.229.06:49:20.96#ibcon#*before return 0, iclass 18, count 2 2006.229.06:49:20.96#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:20.96#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.06:49:20.96#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.06:49:20.96#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:20.96#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:21.08#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:21.08#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:21.08#ibcon#enter wrdev, iclass 18, count 0 2006.229.06:49:21.08#ibcon#first serial, iclass 18, count 0 2006.229.06:49:21.08#ibcon#enter sib2, iclass 18, count 0 2006.229.06:49:21.08#ibcon#flushed, iclass 18, count 0 2006.229.06:49:21.08#ibcon#about to write, iclass 18, count 0 2006.229.06:49:21.08#ibcon#wrote, iclass 18, count 0 2006.229.06:49:21.08#ibcon#about to read 3, iclass 18, count 0 2006.229.06:49:21.10#ibcon#read 3, iclass 18, count 0 2006.229.06:49:21.10#ibcon#about to read 4, iclass 18, count 0 2006.229.06:49:21.10#ibcon#read 4, iclass 18, count 0 2006.229.06:49:21.10#ibcon#about to read 5, iclass 18, count 0 2006.229.06:49:21.10#ibcon#read 5, iclass 18, count 0 2006.229.06:49:21.10#ibcon#about to read 6, iclass 18, count 0 2006.229.06:49:21.10#ibcon#read 6, iclass 18, count 0 2006.229.06:49:21.10#ibcon#end of sib2, iclass 18, count 0 2006.229.06:49:21.10#ibcon#*mode == 0, iclass 18, count 0 2006.229.06:49:21.10#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.06:49:21.10#ibcon#[27=USB\r\n] 2006.229.06:49:21.10#ibcon#*before write, iclass 18, count 0 2006.229.06:49:21.10#ibcon#enter sib2, iclass 18, count 0 2006.229.06:49:21.10#ibcon#flushed, iclass 18, count 0 2006.229.06:49:21.10#ibcon#about to write, iclass 18, count 0 2006.229.06:49:21.10#ibcon#wrote, iclass 18, count 0 2006.229.06:49:21.10#ibcon#about to read 3, iclass 18, count 0 2006.229.06:49:21.13#ibcon#read 3, iclass 18, count 0 2006.229.06:49:21.13#ibcon#about to read 4, iclass 18, count 0 2006.229.06:49:21.13#ibcon#read 4, iclass 18, count 0 2006.229.06:49:21.13#ibcon#about to read 5, iclass 18, count 0 2006.229.06:49:21.13#ibcon#read 5, iclass 18, count 0 2006.229.06:49:21.13#ibcon#about to read 6, iclass 18, count 0 2006.229.06:49:21.13#ibcon#read 6, iclass 18, count 0 2006.229.06:49:21.13#ibcon#end of sib2, iclass 18, count 0 2006.229.06:49:21.13#ibcon#*after write, iclass 18, count 0 2006.229.06:49:21.13#ibcon#*before return 0, iclass 18, count 0 2006.229.06:49:21.13#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:21.13#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.06:49:21.13#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.06:49:21.13#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.06:49:21.13$vck44/vblo=5,709.99 2006.229.06:49:21.13#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.06:49:21.13#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.06:49:21.13#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:21.13#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:21.13#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:21.13#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:21.13#ibcon#enter wrdev, iclass 20, count 0 2006.229.06:49:21.13#ibcon#first serial, iclass 20, count 0 2006.229.06:49:21.13#ibcon#enter sib2, iclass 20, count 0 2006.229.06:49:21.13#ibcon#flushed, iclass 20, count 0 2006.229.06:49:21.13#ibcon#about to write, iclass 20, count 0 2006.229.06:49:21.13#ibcon#wrote, iclass 20, count 0 2006.229.06:49:21.13#ibcon#about to read 3, iclass 20, count 0 2006.229.06:49:21.15#ibcon#read 3, iclass 20, count 0 2006.229.06:49:21.15#ibcon#about to read 4, iclass 20, count 0 2006.229.06:49:21.15#ibcon#read 4, iclass 20, count 0 2006.229.06:49:21.15#ibcon#about to read 5, iclass 20, count 0 2006.229.06:49:21.15#ibcon#read 5, iclass 20, count 0 2006.229.06:49:21.15#ibcon#about to read 6, iclass 20, count 0 2006.229.06:49:21.15#ibcon#read 6, iclass 20, count 0 2006.229.06:49:21.15#ibcon#end of sib2, iclass 20, count 0 2006.229.06:49:21.15#ibcon#*mode == 0, iclass 20, count 0 2006.229.06:49:21.15#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.06:49:21.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:49:21.15#ibcon#*before write, iclass 20, count 0 2006.229.06:49:21.15#ibcon#enter sib2, iclass 20, count 0 2006.229.06:49:21.15#ibcon#flushed, iclass 20, count 0 2006.229.06:49:21.15#ibcon#about to write, iclass 20, count 0 2006.229.06:49:21.15#ibcon#wrote, iclass 20, count 0 2006.229.06:49:21.15#ibcon#about to read 3, iclass 20, count 0 2006.229.06:49:21.19#ibcon#read 3, iclass 20, count 0 2006.229.06:49:21.19#ibcon#about to read 4, iclass 20, count 0 2006.229.06:49:21.19#ibcon#read 4, iclass 20, count 0 2006.229.06:49:21.19#ibcon#about to read 5, iclass 20, count 0 2006.229.06:49:21.19#ibcon#read 5, iclass 20, count 0 2006.229.06:49:21.19#ibcon#about to read 6, iclass 20, count 0 2006.229.06:49:21.19#ibcon#read 6, iclass 20, count 0 2006.229.06:49:21.19#ibcon#end of sib2, iclass 20, count 0 2006.229.06:49:21.19#ibcon#*after write, iclass 20, count 0 2006.229.06:49:21.19#ibcon#*before return 0, iclass 20, count 0 2006.229.06:49:21.19#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:21.19#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.06:49:21.19#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.06:49:21.19#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.06:49:21.19$vck44/vb=5,4 2006.229.06:49:21.19#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.06:49:21.19#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.06:49:21.19#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:21.19#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:21.25#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:21.25#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:21.25#ibcon#enter wrdev, iclass 22, count 2 2006.229.06:49:21.25#ibcon#first serial, iclass 22, count 2 2006.229.06:49:21.25#ibcon#enter sib2, iclass 22, count 2 2006.229.06:49:21.25#ibcon#flushed, iclass 22, count 2 2006.229.06:49:21.25#ibcon#about to write, iclass 22, count 2 2006.229.06:49:21.25#ibcon#wrote, iclass 22, count 2 2006.229.06:49:21.25#ibcon#about to read 3, iclass 22, count 2 2006.229.06:49:21.27#ibcon#read 3, iclass 22, count 2 2006.229.06:49:21.27#ibcon#about to read 4, iclass 22, count 2 2006.229.06:49:21.27#ibcon#read 4, iclass 22, count 2 2006.229.06:49:21.27#ibcon#about to read 5, iclass 22, count 2 2006.229.06:49:21.27#ibcon#read 5, iclass 22, count 2 2006.229.06:49:21.27#ibcon#about to read 6, iclass 22, count 2 2006.229.06:49:21.27#ibcon#read 6, iclass 22, count 2 2006.229.06:49:21.27#ibcon#end of sib2, iclass 22, count 2 2006.229.06:49:21.27#ibcon#*mode == 0, iclass 22, count 2 2006.229.06:49:21.27#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.06:49:21.27#ibcon#[27=AT05-04\r\n] 2006.229.06:49:21.27#ibcon#*before write, iclass 22, count 2 2006.229.06:49:21.27#ibcon#enter sib2, iclass 22, count 2 2006.229.06:49:21.27#ibcon#flushed, iclass 22, count 2 2006.229.06:49:21.27#ibcon#about to write, iclass 22, count 2 2006.229.06:49:21.27#ibcon#wrote, iclass 22, count 2 2006.229.06:49:21.27#ibcon#about to read 3, iclass 22, count 2 2006.229.06:49:21.30#ibcon#read 3, iclass 22, count 2 2006.229.06:49:21.30#ibcon#about to read 4, iclass 22, count 2 2006.229.06:49:21.30#ibcon#read 4, iclass 22, count 2 2006.229.06:49:21.30#ibcon#about to read 5, iclass 22, count 2 2006.229.06:49:21.30#ibcon#read 5, iclass 22, count 2 2006.229.06:49:21.30#ibcon#about to read 6, iclass 22, count 2 2006.229.06:49:21.30#ibcon#read 6, iclass 22, count 2 2006.229.06:49:21.30#ibcon#end of sib2, iclass 22, count 2 2006.229.06:49:21.30#ibcon#*after write, iclass 22, count 2 2006.229.06:49:21.30#ibcon#*before return 0, iclass 22, count 2 2006.229.06:49:21.30#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:21.30#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.06:49:21.30#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.06:49:21.30#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:21.30#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:21.42#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:21.42#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:21.42#ibcon#enter wrdev, iclass 22, count 0 2006.229.06:49:21.42#ibcon#first serial, iclass 22, count 0 2006.229.06:49:21.42#ibcon#enter sib2, iclass 22, count 0 2006.229.06:49:21.42#ibcon#flushed, iclass 22, count 0 2006.229.06:49:21.42#ibcon#about to write, iclass 22, count 0 2006.229.06:49:21.42#ibcon#wrote, iclass 22, count 0 2006.229.06:49:21.42#ibcon#about to read 3, iclass 22, count 0 2006.229.06:49:21.44#ibcon#read 3, iclass 22, count 0 2006.229.06:49:21.44#ibcon#about to read 4, iclass 22, count 0 2006.229.06:49:21.44#ibcon#read 4, iclass 22, count 0 2006.229.06:49:21.44#ibcon#about to read 5, iclass 22, count 0 2006.229.06:49:21.44#ibcon#read 5, iclass 22, count 0 2006.229.06:49:21.44#ibcon#about to read 6, iclass 22, count 0 2006.229.06:49:21.44#ibcon#read 6, iclass 22, count 0 2006.229.06:49:21.44#ibcon#end of sib2, iclass 22, count 0 2006.229.06:49:21.44#ibcon#*mode == 0, iclass 22, count 0 2006.229.06:49:21.44#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.06:49:21.44#ibcon#[27=USB\r\n] 2006.229.06:49:21.44#ibcon#*before write, iclass 22, count 0 2006.229.06:49:21.44#ibcon#enter sib2, iclass 22, count 0 2006.229.06:49:21.44#ibcon#flushed, iclass 22, count 0 2006.229.06:49:21.44#ibcon#about to write, iclass 22, count 0 2006.229.06:49:21.44#ibcon#wrote, iclass 22, count 0 2006.229.06:49:21.44#ibcon#about to read 3, iclass 22, count 0 2006.229.06:49:21.47#ibcon#read 3, iclass 22, count 0 2006.229.06:49:21.47#ibcon#about to read 4, iclass 22, count 0 2006.229.06:49:21.47#ibcon#read 4, iclass 22, count 0 2006.229.06:49:21.47#ibcon#about to read 5, iclass 22, count 0 2006.229.06:49:21.47#ibcon#read 5, iclass 22, count 0 2006.229.06:49:21.47#ibcon#about to read 6, iclass 22, count 0 2006.229.06:49:21.47#ibcon#read 6, iclass 22, count 0 2006.229.06:49:21.47#ibcon#end of sib2, iclass 22, count 0 2006.229.06:49:21.47#ibcon#*after write, iclass 22, count 0 2006.229.06:49:21.47#ibcon#*before return 0, iclass 22, count 0 2006.229.06:49:21.47#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:21.47#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.06:49:21.47#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.06:49:21.47#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.06:49:21.47$vck44/vblo=6,719.99 2006.229.06:49:21.47#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.06:49:21.47#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.06:49:21.47#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:21.47#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:21.47#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:21.47#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:21.47#ibcon#enter wrdev, iclass 24, count 0 2006.229.06:49:21.47#ibcon#first serial, iclass 24, count 0 2006.229.06:49:21.47#ibcon#enter sib2, iclass 24, count 0 2006.229.06:49:21.47#ibcon#flushed, iclass 24, count 0 2006.229.06:49:21.47#ibcon#about to write, iclass 24, count 0 2006.229.06:49:21.47#ibcon#wrote, iclass 24, count 0 2006.229.06:49:21.47#ibcon#about to read 3, iclass 24, count 0 2006.229.06:49:21.49#ibcon#read 3, iclass 24, count 0 2006.229.06:49:21.49#ibcon#about to read 4, iclass 24, count 0 2006.229.06:49:21.49#ibcon#read 4, iclass 24, count 0 2006.229.06:49:21.49#ibcon#about to read 5, iclass 24, count 0 2006.229.06:49:21.49#ibcon#read 5, iclass 24, count 0 2006.229.06:49:21.49#ibcon#about to read 6, iclass 24, count 0 2006.229.06:49:21.49#ibcon#read 6, iclass 24, count 0 2006.229.06:49:21.49#ibcon#end of sib2, iclass 24, count 0 2006.229.06:49:21.49#ibcon#*mode == 0, iclass 24, count 0 2006.229.06:49:21.49#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.06:49:21.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:49:21.49#ibcon#*before write, iclass 24, count 0 2006.229.06:49:21.49#ibcon#enter sib2, iclass 24, count 0 2006.229.06:49:21.49#ibcon#flushed, iclass 24, count 0 2006.229.06:49:21.49#ibcon#about to write, iclass 24, count 0 2006.229.06:49:21.49#ibcon#wrote, iclass 24, count 0 2006.229.06:49:21.49#ibcon#about to read 3, iclass 24, count 0 2006.229.06:49:21.53#ibcon#read 3, iclass 24, count 0 2006.229.06:49:21.53#ibcon#about to read 4, iclass 24, count 0 2006.229.06:49:21.53#ibcon#read 4, iclass 24, count 0 2006.229.06:49:21.53#ibcon#about to read 5, iclass 24, count 0 2006.229.06:49:21.53#ibcon#read 5, iclass 24, count 0 2006.229.06:49:21.53#ibcon#about to read 6, iclass 24, count 0 2006.229.06:49:21.53#ibcon#read 6, iclass 24, count 0 2006.229.06:49:21.53#ibcon#end of sib2, iclass 24, count 0 2006.229.06:49:21.53#ibcon#*after write, iclass 24, count 0 2006.229.06:49:21.53#ibcon#*before return 0, iclass 24, count 0 2006.229.06:49:21.53#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:21.53#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.06:49:21.53#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.06:49:21.53#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.06:49:21.53$vck44/vb=6,4 2006.229.06:49:21.53#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.06:49:21.53#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.06:49:21.53#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:21.53#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:21.59#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:21.59#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:21.59#ibcon#enter wrdev, iclass 26, count 2 2006.229.06:49:21.59#ibcon#first serial, iclass 26, count 2 2006.229.06:49:21.59#ibcon#enter sib2, iclass 26, count 2 2006.229.06:49:21.59#ibcon#flushed, iclass 26, count 2 2006.229.06:49:21.59#ibcon#about to write, iclass 26, count 2 2006.229.06:49:21.59#ibcon#wrote, iclass 26, count 2 2006.229.06:49:21.59#ibcon#about to read 3, iclass 26, count 2 2006.229.06:49:21.61#ibcon#read 3, iclass 26, count 2 2006.229.06:49:21.61#ibcon#about to read 4, iclass 26, count 2 2006.229.06:49:21.61#ibcon#read 4, iclass 26, count 2 2006.229.06:49:21.61#ibcon#about to read 5, iclass 26, count 2 2006.229.06:49:21.61#ibcon#read 5, iclass 26, count 2 2006.229.06:49:21.61#ibcon#about to read 6, iclass 26, count 2 2006.229.06:49:21.61#ibcon#read 6, iclass 26, count 2 2006.229.06:49:21.61#ibcon#end of sib2, iclass 26, count 2 2006.229.06:49:21.61#ibcon#*mode == 0, iclass 26, count 2 2006.229.06:49:21.61#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.06:49:21.61#ibcon#[27=AT06-04\r\n] 2006.229.06:49:21.61#ibcon#*before write, iclass 26, count 2 2006.229.06:49:21.61#ibcon#enter sib2, iclass 26, count 2 2006.229.06:49:21.61#ibcon#flushed, iclass 26, count 2 2006.229.06:49:21.61#ibcon#about to write, iclass 26, count 2 2006.229.06:49:21.61#ibcon#wrote, iclass 26, count 2 2006.229.06:49:21.61#ibcon#about to read 3, iclass 26, count 2 2006.229.06:49:21.64#ibcon#read 3, iclass 26, count 2 2006.229.06:49:21.64#ibcon#about to read 4, iclass 26, count 2 2006.229.06:49:21.64#ibcon#read 4, iclass 26, count 2 2006.229.06:49:21.64#ibcon#about to read 5, iclass 26, count 2 2006.229.06:49:21.64#ibcon#read 5, iclass 26, count 2 2006.229.06:49:21.64#ibcon#about to read 6, iclass 26, count 2 2006.229.06:49:21.64#ibcon#read 6, iclass 26, count 2 2006.229.06:49:21.64#ibcon#end of sib2, iclass 26, count 2 2006.229.06:49:21.64#ibcon#*after write, iclass 26, count 2 2006.229.06:49:21.64#ibcon#*before return 0, iclass 26, count 2 2006.229.06:49:21.64#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:21.64#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.06:49:21.64#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.06:49:21.64#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:21.64#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:21.76#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:21.76#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:21.76#ibcon#enter wrdev, iclass 26, count 0 2006.229.06:49:21.76#ibcon#first serial, iclass 26, count 0 2006.229.06:49:21.76#ibcon#enter sib2, iclass 26, count 0 2006.229.06:49:21.76#ibcon#flushed, iclass 26, count 0 2006.229.06:49:21.76#ibcon#about to write, iclass 26, count 0 2006.229.06:49:21.76#ibcon#wrote, iclass 26, count 0 2006.229.06:49:21.76#ibcon#about to read 3, iclass 26, count 0 2006.229.06:49:21.78#ibcon#read 3, iclass 26, count 0 2006.229.06:49:21.78#ibcon#about to read 4, iclass 26, count 0 2006.229.06:49:21.78#ibcon#read 4, iclass 26, count 0 2006.229.06:49:21.78#ibcon#about to read 5, iclass 26, count 0 2006.229.06:49:21.78#ibcon#read 5, iclass 26, count 0 2006.229.06:49:21.78#ibcon#about to read 6, iclass 26, count 0 2006.229.06:49:21.78#ibcon#read 6, iclass 26, count 0 2006.229.06:49:21.78#ibcon#end of sib2, iclass 26, count 0 2006.229.06:49:21.78#ibcon#*mode == 0, iclass 26, count 0 2006.229.06:49:21.78#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.06:49:21.78#ibcon#[27=USB\r\n] 2006.229.06:49:21.78#ibcon#*before write, iclass 26, count 0 2006.229.06:49:21.78#ibcon#enter sib2, iclass 26, count 0 2006.229.06:49:21.78#ibcon#flushed, iclass 26, count 0 2006.229.06:49:21.78#ibcon#about to write, iclass 26, count 0 2006.229.06:49:21.78#ibcon#wrote, iclass 26, count 0 2006.229.06:49:21.78#ibcon#about to read 3, iclass 26, count 0 2006.229.06:49:21.81#ibcon#read 3, iclass 26, count 0 2006.229.06:49:21.81#ibcon#about to read 4, iclass 26, count 0 2006.229.06:49:21.81#ibcon#read 4, iclass 26, count 0 2006.229.06:49:21.81#ibcon#about to read 5, iclass 26, count 0 2006.229.06:49:21.81#ibcon#read 5, iclass 26, count 0 2006.229.06:49:21.81#ibcon#about to read 6, iclass 26, count 0 2006.229.06:49:21.81#ibcon#read 6, iclass 26, count 0 2006.229.06:49:21.81#ibcon#end of sib2, iclass 26, count 0 2006.229.06:49:21.81#ibcon#*after write, iclass 26, count 0 2006.229.06:49:21.81#ibcon#*before return 0, iclass 26, count 0 2006.229.06:49:21.81#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:21.81#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.06:49:21.81#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.06:49:21.81#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.06:49:21.81$vck44/vblo=7,734.99 2006.229.06:49:21.81#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.06:49:21.81#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.06:49:21.81#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:21.81#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:49:21.81#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:49:21.81#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:49:21.81#ibcon#enter wrdev, iclass 28, count 0 2006.229.06:49:21.81#ibcon#first serial, iclass 28, count 0 2006.229.06:49:21.81#ibcon#enter sib2, iclass 28, count 0 2006.229.06:49:21.81#ibcon#flushed, iclass 28, count 0 2006.229.06:49:21.81#ibcon#about to write, iclass 28, count 0 2006.229.06:49:21.81#ibcon#wrote, iclass 28, count 0 2006.229.06:49:21.81#ibcon#about to read 3, iclass 28, count 0 2006.229.06:49:21.83#ibcon#read 3, iclass 28, count 0 2006.229.06:49:21.83#ibcon#about to read 4, iclass 28, count 0 2006.229.06:49:21.83#ibcon#read 4, iclass 28, count 0 2006.229.06:49:21.83#ibcon#about to read 5, iclass 28, count 0 2006.229.06:49:21.83#ibcon#read 5, iclass 28, count 0 2006.229.06:49:21.83#ibcon#about to read 6, iclass 28, count 0 2006.229.06:49:21.83#ibcon#read 6, iclass 28, count 0 2006.229.06:49:21.83#ibcon#end of sib2, iclass 28, count 0 2006.229.06:49:21.83#ibcon#*mode == 0, iclass 28, count 0 2006.229.06:49:21.83#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.06:49:21.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:49:21.83#ibcon#*before write, iclass 28, count 0 2006.229.06:49:21.83#ibcon#enter sib2, iclass 28, count 0 2006.229.06:49:21.83#ibcon#flushed, iclass 28, count 0 2006.229.06:49:21.83#ibcon#about to write, iclass 28, count 0 2006.229.06:49:21.83#ibcon#wrote, iclass 28, count 0 2006.229.06:49:21.83#ibcon#about to read 3, iclass 28, count 0 2006.229.06:49:21.87#ibcon#read 3, iclass 28, count 0 2006.229.06:49:21.87#ibcon#about to read 4, iclass 28, count 0 2006.229.06:49:21.87#ibcon#read 4, iclass 28, count 0 2006.229.06:49:21.87#ibcon#about to read 5, iclass 28, count 0 2006.229.06:49:21.87#ibcon#read 5, iclass 28, count 0 2006.229.06:49:21.87#ibcon#about to read 6, iclass 28, count 0 2006.229.06:49:21.87#ibcon#read 6, iclass 28, count 0 2006.229.06:49:21.87#ibcon#end of sib2, iclass 28, count 0 2006.229.06:49:21.87#ibcon#*after write, iclass 28, count 0 2006.229.06:49:21.87#ibcon#*before return 0, iclass 28, count 0 2006.229.06:49:21.87#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:49:21.87#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.06:49:21.87#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.06:49:21.87#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.06:49:21.87$vck44/vb=7,4 2006.229.06:49:21.87#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.06:49:21.87#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.06:49:21.87#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:21.87#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:49:21.93#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:49:21.93#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:49:21.93#ibcon#enter wrdev, iclass 30, count 2 2006.229.06:49:21.93#ibcon#first serial, iclass 30, count 2 2006.229.06:49:21.93#ibcon#enter sib2, iclass 30, count 2 2006.229.06:49:21.93#ibcon#flushed, iclass 30, count 2 2006.229.06:49:21.93#ibcon#about to write, iclass 30, count 2 2006.229.06:49:21.93#ibcon#wrote, iclass 30, count 2 2006.229.06:49:21.93#ibcon#about to read 3, iclass 30, count 2 2006.229.06:49:21.95#ibcon#read 3, iclass 30, count 2 2006.229.06:49:21.95#ibcon#about to read 4, iclass 30, count 2 2006.229.06:49:21.95#ibcon#read 4, iclass 30, count 2 2006.229.06:49:21.95#ibcon#about to read 5, iclass 30, count 2 2006.229.06:49:21.95#ibcon#read 5, iclass 30, count 2 2006.229.06:49:21.95#ibcon#about to read 6, iclass 30, count 2 2006.229.06:49:21.95#ibcon#read 6, iclass 30, count 2 2006.229.06:49:21.95#ibcon#end of sib2, iclass 30, count 2 2006.229.06:49:21.95#ibcon#*mode == 0, iclass 30, count 2 2006.229.06:49:21.95#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.06:49:21.95#ibcon#[27=AT07-04\r\n] 2006.229.06:49:21.95#ibcon#*before write, iclass 30, count 2 2006.229.06:49:21.95#ibcon#enter sib2, iclass 30, count 2 2006.229.06:49:21.95#ibcon#flushed, iclass 30, count 2 2006.229.06:49:21.95#ibcon#about to write, iclass 30, count 2 2006.229.06:49:21.95#ibcon#wrote, iclass 30, count 2 2006.229.06:49:21.95#ibcon#about to read 3, iclass 30, count 2 2006.229.06:49:21.98#ibcon#read 3, iclass 30, count 2 2006.229.06:49:21.98#ibcon#about to read 4, iclass 30, count 2 2006.229.06:49:21.98#ibcon#read 4, iclass 30, count 2 2006.229.06:49:21.98#ibcon#about to read 5, iclass 30, count 2 2006.229.06:49:21.98#ibcon#read 5, iclass 30, count 2 2006.229.06:49:21.98#ibcon#about to read 6, iclass 30, count 2 2006.229.06:49:21.98#ibcon#read 6, iclass 30, count 2 2006.229.06:49:21.98#ibcon#end of sib2, iclass 30, count 2 2006.229.06:49:21.98#ibcon#*after write, iclass 30, count 2 2006.229.06:49:21.98#ibcon#*before return 0, iclass 30, count 2 2006.229.06:49:21.98#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:49:21.98#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.06:49:21.98#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.06:49:21.98#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:21.98#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:49:22.10#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:49:22.10#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:49:22.10#ibcon#enter wrdev, iclass 30, count 0 2006.229.06:49:22.10#ibcon#first serial, iclass 30, count 0 2006.229.06:49:22.10#ibcon#enter sib2, iclass 30, count 0 2006.229.06:49:22.10#ibcon#flushed, iclass 30, count 0 2006.229.06:49:22.10#ibcon#about to write, iclass 30, count 0 2006.229.06:49:22.10#ibcon#wrote, iclass 30, count 0 2006.229.06:49:22.10#ibcon#about to read 3, iclass 30, count 0 2006.229.06:49:22.12#ibcon#read 3, iclass 30, count 0 2006.229.06:49:22.12#ibcon#about to read 4, iclass 30, count 0 2006.229.06:49:22.12#ibcon#read 4, iclass 30, count 0 2006.229.06:49:22.12#ibcon#about to read 5, iclass 30, count 0 2006.229.06:49:22.12#ibcon#read 5, iclass 30, count 0 2006.229.06:49:22.12#ibcon#about to read 6, iclass 30, count 0 2006.229.06:49:22.12#ibcon#read 6, iclass 30, count 0 2006.229.06:49:22.12#ibcon#end of sib2, iclass 30, count 0 2006.229.06:49:22.12#ibcon#*mode == 0, iclass 30, count 0 2006.229.06:49:22.12#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.06:49:22.12#ibcon#[27=USB\r\n] 2006.229.06:49:22.12#ibcon#*before write, iclass 30, count 0 2006.229.06:49:22.12#ibcon#enter sib2, iclass 30, count 0 2006.229.06:49:22.12#ibcon#flushed, iclass 30, count 0 2006.229.06:49:22.12#ibcon#about to write, iclass 30, count 0 2006.229.06:49:22.12#ibcon#wrote, iclass 30, count 0 2006.229.06:49:22.12#ibcon#about to read 3, iclass 30, count 0 2006.229.06:49:22.15#ibcon#read 3, iclass 30, count 0 2006.229.06:49:22.15#ibcon#about to read 4, iclass 30, count 0 2006.229.06:49:22.15#ibcon#read 4, iclass 30, count 0 2006.229.06:49:22.15#ibcon#about to read 5, iclass 30, count 0 2006.229.06:49:22.15#ibcon#read 5, iclass 30, count 0 2006.229.06:49:22.15#ibcon#about to read 6, iclass 30, count 0 2006.229.06:49:22.15#ibcon#read 6, iclass 30, count 0 2006.229.06:49:22.15#ibcon#end of sib2, iclass 30, count 0 2006.229.06:49:22.15#ibcon#*after write, iclass 30, count 0 2006.229.06:49:22.15#ibcon#*before return 0, iclass 30, count 0 2006.229.06:49:22.15#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:49:22.15#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.06:49:22.15#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.06:49:22.15#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.06:49:22.15$vck44/vblo=8,744.99 2006.229.06:49:22.15#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.06:49:22.15#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.06:49:22.15#ibcon#ireg 17 cls_cnt 0 2006.229.06:49:22.15#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:49:22.15#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:49:22.15#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:49:22.15#ibcon#enter wrdev, iclass 32, count 0 2006.229.06:49:22.15#ibcon#first serial, iclass 32, count 0 2006.229.06:49:22.15#ibcon#enter sib2, iclass 32, count 0 2006.229.06:49:22.15#ibcon#flushed, iclass 32, count 0 2006.229.06:49:22.15#ibcon#about to write, iclass 32, count 0 2006.229.06:49:22.15#ibcon#wrote, iclass 32, count 0 2006.229.06:49:22.15#ibcon#about to read 3, iclass 32, count 0 2006.229.06:49:22.17#ibcon#read 3, iclass 32, count 0 2006.229.06:49:22.17#ibcon#about to read 4, iclass 32, count 0 2006.229.06:49:22.17#ibcon#read 4, iclass 32, count 0 2006.229.06:49:22.17#ibcon#about to read 5, iclass 32, count 0 2006.229.06:49:22.17#ibcon#read 5, iclass 32, count 0 2006.229.06:49:22.17#ibcon#about to read 6, iclass 32, count 0 2006.229.06:49:22.17#ibcon#read 6, iclass 32, count 0 2006.229.06:49:22.17#ibcon#end of sib2, iclass 32, count 0 2006.229.06:49:22.17#ibcon#*mode == 0, iclass 32, count 0 2006.229.06:49:22.17#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.06:49:22.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:49:22.17#ibcon#*before write, iclass 32, count 0 2006.229.06:49:22.17#ibcon#enter sib2, iclass 32, count 0 2006.229.06:49:22.17#ibcon#flushed, iclass 32, count 0 2006.229.06:49:22.17#ibcon#about to write, iclass 32, count 0 2006.229.06:49:22.17#ibcon#wrote, iclass 32, count 0 2006.229.06:49:22.17#ibcon#about to read 3, iclass 32, count 0 2006.229.06:49:22.21#ibcon#read 3, iclass 32, count 0 2006.229.06:49:22.21#ibcon#about to read 4, iclass 32, count 0 2006.229.06:49:22.21#ibcon#read 4, iclass 32, count 0 2006.229.06:49:22.21#ibcon#about to read 5, iclass 32, count 0 2006.229.06:49:22.21#ibcon#read 5, iclass 32, count 0 2006.229.06:49:22.21#ibcon#about to read 6, iclass 32, count 0 2006.229.06:49:22.21#ibcon#read 6, iclass 32, count 0 2006.229.06:49:22.21#ibcon#end of sib2, iclass 32, count 0 2006.229.06:49:22.21#ibcon#*after write, iclass 32, count 0 2006.229.06:49:22.21#ibcon#*before return 0, iclass 32, count 0 2006.229.06:49:22.21#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:49:22.21#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.06:49:22.21#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.06:49:22.21#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.06:49:22.21$vck44/vb=8,4 2006.229.06:49:22.21#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.06:49:22.21#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.06:49:22.21#ibcon#ireg 11 cls_cnt 2 2006.229.06:49:22.21#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:22.27#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:22.27#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:22.27#ibcon#enter wrdev, iclass 34, count 2 2006.229.06:49:22.27#ibcon#first serial, iclass 34, count 2 2006.229.06:49:22.27#ibcon#enter sib2, iclass 34, count 2 2006.229.06:49:22.27#ibcon#flushed, iclass 34, count 2 2006.229.06:49:22.27#ibcon#about to write, iclass 34, count 2 2006.229.06:49:22.27#ibcon#wrote, iclass 34, count 2 2006.229.06:49:22.27#ibcon#about to read 3, iclass 34, count 2 2006.229.06:49:22.29#ibcon#read 3, iclass 34, count 2 2006.229.06:49:22.29#ibcon#about to read 4, iclass 34, count 2 2006.229.06:49:22.29#ibcon#read 4, iclass 34, count 2 2006.229.06:49:22.29#ibcon#about to read 5, iclass 34, count 2 2006.229.06:49:22.29#ibcon#read 5, iclass 34, count 2 2006.229.06:49:22.29#ibcon#about to read 6, iclass 34, count 2 2006.229.06:49:22.29#ibcon#read 6, iclass 34, count 2 2006.229.06:49:22.29#ibcon#end of sib2, iclass 34, count 2 2006.229.06:49:22.29#ibcon#*mode == 0, iclass 34, count 2 2006.229.06:49:22.29#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.06:49:22.29#ibcon#[27=AT08-04\r\n] 2006.229.06:49:22.29#ibcon#*before write, iclass 34, count 2 2006.229.06:49:22.29#ibcon#enter sib2, iclass 34, count 2 2006.229.06:49:22.29#ibcon#flushed, iclass 34, count 2 2006.229.06:49:22.29#ibcon#about to write, iclass 34, count 2 2006.229.06:49:22.29#ibcon#wrote, iclass 34, count 2 2006.229.06:49:22.29#ibcon#about to read 3, iclass 34, count 2 2006.229.06:49:22.32#ibcon#read 3, iclass 34, count 2 2006.229.06:49:22.32#ibcon#about to read 4, iclass 34, count 2 2006.229.06:49:22.32#ibcon#read 4, iclass 34, count 2 2006.229.06:49:22.32#ibcon#about to read 5, iclass 34, count 2 2006.229.06:49:22.32#ibcon#read 5, iclass 34, count 2 2006.229.06:49:22.32#ibcon#about to read 6, iclass 34, count 2 2006.229.06:49:22.32#ibcon#read 6, iclass 34, count 2 2006.229.06:49:22.32#ibcon#end of sib2, iclass 34, count 2 2006.229.06:49:22.32#ibcon#*after write, iclass 34, count 2 2006.229.06:49:22.32#ibcon#*before return 0, iclass 34, count 2 2006.229.06:49:22.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:22.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.06:49:22.32#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.06:49:22.32#ibcon#ireg 7 cls_cnt 0 2006.229.06:49:22.32#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:22.44#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:22.44#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:22.44#ibcon#enter wrdev, iclass 34, count 0 2006.229.06:49:22.44#ibcon#first serial, iclass 34, count 0 2006.229.06:49:22.44#ibcon#enter sib2, iclass 34, count 0 2006.229.06:49:22.44#ibcon#flushed, iclass 34, count 0 2006.229.06:49:22.44#ibcon#about to write, iclass 34, count 0 2006.229.06:49:22.44#ibcon#wrote, iclass 34, count 0 2006.229.06:49:22.44#ibcon#about to read 3, iclass 34, count 0 2006.229.06:49:22.46#ibcon#read 3, iclass 34, count 0 2006.229.06:49:22.46#ibcon#about to read 4, iclass 34, count 0 2006.229.06:49:22.46#ibcon#read 4, iclass 34, count 0 2006.229.06:49:22.46#ibcon#about to read 5, iclass 34, count 0 2006.229.06:49:22.46#ibcon#read 5, iclass 34, count 0 2006.229.06:49:22.46#ibcon#about to read 6, iclass 34, count 0 2006.229.06:49:22.46#ibcon#read 6, iclass 34, count 0 2006.229.06:49:22.46#ibcon#end of sib2, iclass 34, count 0 2006.229.06:49:22.46#ibcon#*mode == 0, iclass 34, count 0 2006.229.06:49:22.46#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.06:49:22.46#ibcon#[27=USB\r\n] 2006.229.06:49:22.46#ibcon#*before write, iclass 34, count 0 2006.229.06:49:22.46#ibcon#enter sib2, iclass 34, count 0 2006.229.06:49:22.46#ibcon#flushed, iclass 34, count 0 2006.229.06:49:22.46#ibcon#about to write, iclass 34, count 0 2006.229.06:49:22.46#ibcon#wrote, iclass 34, count 0 2006.229.06:49:22.46#ibcon#about to read 3, iclass 34, count 0 2006.229.06:49:22.49#ibcon#read 3, iclass 34, count 0 2006.229.06:49:22.49#ibcon#about to read 4, iclass 34, count 0 2006.229.06:49:22.49#ibcon#read 4, iclass 34, count 0 2006.229.06:49:22.49#ibcon#about to read 5, iclass 34, count 0 2006.229.06:49:22.49#ibcon#read 5, iclass 34, count 0 2006.229.06:49:22.49#ibcon#about to read 6, iclass 34, count 0 2006.229.06:49:22.49#ibcon#read 6, iclass 34, count 0 2006.229.06:49:22.49#ibcon#end of sib2, iclass 34, count 0 2006.229.06:49:22.49#ibcon#*after write, iclass 34, count 0 2006.229.06:49:22.49#ibcon#*before return 0, iclass 34, count 0 2006.229.06:49:22.49#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:22.49#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.06:49:22.49#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.06:49:22.49#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.06:49:22.49$vck44/vabw=wide 2006.229.06:49:22.49#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.06:49:22.49#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.06:49:22.49#ibcon#ireg 8 cls_cnt 0 2006.229.06:49:22.49#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:22.49#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:22.49#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:22.49#ibcon#enter wrdev, iclass 36, count 0 2006.229.06:49:22.49#ibcon#first serial, iclass 36, count 0 2006.229.06:49:22.49#ibcon#enter sib2, iclass 36, count 0 2006.229.06:49:22.49#ibcon#flushed, iclass 36, count 0 2006.229.06:49:22.49#ibcon#about to write, iclass 36, count 0 2006.229.06:49:22.49#ibcon#wrote, iclass 36, count 0 2006.229.06:49:22.49#ibcon#about to read 3, iclass 36, count 0 2006.229.06:49:22.51#ibcon#read 3, iclass 36, count 0 2006.229.06:49:22.51#ibcon#about to read 4, iclass 36, count 0 2006.229.06:49:22.51#ibcon#read 4, iclass 36, count 0 2006.229.06:49:22.51#ibcon#about to read 5, iclass 36, count 0 2006.229.06:49:22.51#ibcon#read 5, iclass 36, count 0 2006.229.06:49:22.51#ibcon#about to read 6, iclass 36, count 0 2006.229.06:49:22.51#ibcon#read 6, iclass 36, count 0 2006.229.06:49:22.51#ibcon#end of sib2, iclass 36, count 0 2006.229.06:49:22.51#ibcon#*mode == 0, iclass 36, count 0 2006.229.06:49:22.51#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.06:49:22.51#ibcon#[25=BW32\r\n] 2006.229.06:49:22.51#ibcon#*before write, iclass 36, count 0 2006.229.06:49:22.51#ibcon#enter sib2, iclass 36, count 0 2006.229.06:49:22.51#ibcon#flushed, iclass 36, count 0 2006.229.06:49:22.51#ibcon#about to write, iclass 36, count 0 2006.229.06:49:22.51#ibcon#wrote, iclass 36, count 0 2006.229.06:49:22.51#ibcon#about to read 3, iclass 36, count 0 2006.229.06:49:22.54#ibcon#read 3, iclass 36, count 0 2006.229.06:49:22.54#ibcon#about to read 4, iclass 36, count 0 2006.229.06:49:22.54#ibcon#read 4, iclass 36, count 0 2006.229.06:49:22.54#ibcon#about to read 5, iclass 36, count 0 2006.229.06:49:22.54#ibcon#read 5, iclass 36, count 0 2006.229.06:49:22.54#ibcon#about to read 6, iclass 36, count 0 2006.229.06:49:22.54#ibcon#read 6, iclass 36, count 0 2006.229.06:49:22.54#ibcon#end of sib2, iclass 36, count 0 2006.229.06:49:22.54#ibcon#*after write, iclass 36, count 0 2006.229.06:49:22.54#ibcon#*before return 0, iclass 36, count 0 2006.229.06:49:22.54#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:22.54#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.06:49:22.54#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.06:49:22.54#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.06:49:22.54$vck44/vbbw=wide 2006.229.06:49:22.54#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.06:49:22.54#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.06:49:22.54#ibcon#ireg 8 cls_cnt 0 2006.229.06:49:22.54#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:49:22.61#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:49:22.61#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:49:22.61#ibcon#enter wrdev, iclass 38, count 0 2006.229.06:49:22.61#ibcon#first serial, iclass 38, count 0 2006.229.06:49:22.61#ibcon#enter sib2, iclass 38, count 0 2006.229.06:49:22.61#ibcon#flushed, iclass 38, count 0 2006.229.06:49:22.61#ibcon#about to write, iclass 38, count 0 2006.229.06:49:22.61#ibcon#wrote, iclass 38, count 0 2006.229.06:49:22.61#ibcon#about to read 3, iclass 38, count 0 2006.229.06:49:22.63#ibcon#read 3, iclass 38, count 0 2006.229.06:49:22.63#ibcon#about to read 4, iclass 38, count 0 2006.229.06:49:22.63#ibcon#read 4, iclass 38, count 0 2006.229.06:49:22.63#ibcon#about to read 5, iclass 38, count 0 2006.229.06:49:22.63#ibcon#read 5, iclass 38, count 0 2006.229.06:49:22.63#ibcon#about to read 6, iclass 38, count 0 2006.229.06:49:22.63#ibcon#read 6, iclass 38, count 0 2006.229.06:49:22.63#ibcon#end of sib2, iclass 38, count 0 2006.229.06:49:22.63#ibcon#*mode == 0, iclass 38, count 0 2006.229.06:49:22.63#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.06:49:22.63#ibcon#[27=BW32\r\n] 2006.229.06:49:22.63#ibcon#*before write, iclass 38, count 0 2006.229.06:49:22.63#ibcon#enter sib2, iclass 38, count 0 2006.229.06:49:22.63#ibcon#flushed, iclass 38, count 0 2006.229.06:49:22.63#ibcon#about to write, iclass 38, count 0 2006.229.06:49:22.63#ibcon#wrote, iclass 38, count 0 2006.229.06:49:22.63#ibcon#about to read 3, iclass 38, count 0 2006.229.06:49:22.66#ibcon#read 3, iclass 38, count 0 2006.229.06:49:22.66#ibcon#about to read 4, iclass 38, count 0 2006.229.06:49:22.66#ibcon#read 4, iclass 38, count 0 2006.229.06:49:22.66#ibcon#about to read 5, iclass 38, count 0 2006.229.06:49:22.66#ibcon#read 5, iclass 38, count 0 2006.229.06:49:22.66#ibcon#about to read 6, iclass 38, count 0 2006.229.06:49:22.66#ibcon#read 6, iclass 38, count 0 2006.229.06:49:22.66#ibcon#end of sib2, iclass 38, count 0 2006.229.06:49:22.66#ibcon#*after write, iclass 38, count 0 2006.229.06:49:22.66#ibcon#*before return 0, iclass 38, count 0 2006.229.06:49:22.66#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:49:22.66#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.06:49:22.66#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.06:49:22.66#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.06:49:22.66$setupk4/ifdk4 2006.229.06:49:22.66$ifdk4/lo= 2006.229.06:49:22.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:49:22.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:49:22.66$ifdk4/patch= 2006.229.06:49:22.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:49:22.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:49:22.66$setupk4/!*+20s 2006.229.06:49:29.27#abcon#<5=/05 3.0 5.7 30.18 92 999.8\r\n> 2006.229.06:49:29.29#abcon#{5=INTERFACE CLEAR} 2006.229.06:49:29.35#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:49:37.16$setupk4/"tpicd 2006.229.06:49:37.16$setupk4/echo=off 2006.229.06:49:37.16$setupk4/xlog=off 2006.229.06:49:37.16:!2006.229.06:51:15 2006.229.06:49:54.13#trakl#Source acquired 2006.229.06:49:54.13#flagr#flagr/antenna,acquired 2006.229.06:51:15.02:preob 2006.229.06:51:16.14/onsource/TRACKING 2006.229.06:51:16.14:!2006.229.06:51:25 2006.229.06:51:25.02:"tape 2006.229.06:51:25.02:"st=record 2006.229.06:51:25.02:data_valid=on 2006.229.06:51:25.02:midob 2006.229.06:51:26.14/onsource/TRACKING 2006.229.06:51:26.14/wx/30.17,999.9,93 2006.229.06:51:26.21/cable/+6.3974E-03 2006.229.06:51:27.30/va/01,08,usb,yes,31,34 2006.229.06:51:27.30/va/02,07,usb,yes,34,34 2006.229.06:51:27.30/va/03,06,usb,yes,42,44 2006.229.06:51:27.30/va/04,07,usb,yes,35,36 2006.229.06:51:27.30/va/05,04,usb,yes,31,32 2006.229.06:51:27.30/va/06,04,usb,yes,35,34 2006.229.06:51:27.30/va/07,05,usb,yes,31,31 2006.229.06:51:27.30/va/08,06,usb,yes,22,28 2006.229.06:51:27.53/valo/01,524.99,yes,locked 2006.229.06:51:27.53/valo/02,534.99,yes,locked 2006.229.06:51:27.53/valo/03,564.99,yes,locked 2006.229.06:51:27.53/valo/04,624.99,yes,locked 2006.229.06:51:27.53/valo/05,734.99,yes,locked 2006.229.06:51:27.53/valo/06,814.99,yes,locked 2006.229.06:51:27.53/valo/07,864.99,yes,locked 2006.229.06:51:27.53/valo/08,884.99,yes,locked 2006.229.06:51:28.62/vb/01,04,usb,yes,38,35 2006.229.06:51:28.62/vb/02,04,usb,yes,41,41 2006.229.06:51:28.62/vb/03,04,usb,yes,37,41 2006.229.06:51:28.62/vb/04,04,usb,yes,43,41 2006.229.06:51:28.62/vb/05,04,usb,yes,34,36 2006.229.06:51:28.62/vb/06,04,usb,yes,39,34 2006.229.06:51:28.62/vb/07,04,usb,yes,38,38 2006.229.06:51:28.62/vb/08,04,usb,yes,35,39 2006.229.06:51:28.86/vblo/01,629.99,yes,locked 2006.229.06:51:28.86/vblo/02,634.99,yes,locked 2006.229.06:51:28.86/vblo/03,649.99,yes,locked 2006.229.06:51:28.86/vblo/04,679.99,yes,locked 2006.229.06:51:28.87/vblo/05,709.99,yes,locked 2006.229.06:51:28.87/vblo/06,719.99,yes,locked 2006.229.06:51:28.87/vblo/07,734.99,yes,locked 2006.229.06:51:28.87/vblo/08,744.99,yes,locked 2006.229.06:51:29.01/vabw/8 2006.229.06:51:29.16/vbbw/8 2006.229.06:51:29.25/xfe/off,on,12.0 2006.229.06:51:29.63/ifatt/23,28,28,28 2006.229.06:51:30.07/fmout-gps/S +4.55E-07 2006.229.06:51:30.11:!2006.229.06:53:15 2006.229.06:53:15.01:data_valid=off 2006.229.06:53:15.02:"et 2006.229.06:53:15.02:!+3s 2006.229.06:53:18.04:"tape 2006.229.06:53:18.04:postob 2006.229.06:53:18.22/cable/+6.3986E-03 2006.229.06:53:18.23/wx/30.16,999.9,93 2006.229.06:53:18.28/fmout-gps/S +4.53E-07 2006.229.06:53:18.29:scan_name=229-0657,jd0608,270 2006.229.06:53:18.29:source=0059+581,010245.76,582411.1,2000.0,neutral 2006.229.06:53:20.14#flagr#flagr/antenna,new-source 2006.229.06:53:20.15:checkk5 2006.229.06:53:20.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.06:53:20.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.06:53:21.40/chk_autoobs//k5ts3/ autoobs is running! 2006.229.06:53:21.82/chk_autoobs//k5ts4/ autoobs is running! 2006.229.06:53:22.21/chk_obsdata//k5ts1/T2290651??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:53:22.60/chk_obsdata//k5ts2/T2290651??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:53:23.01/chk_obsdata//k5ts3/T2290651??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:53:23.40/chk_obsdata//k5ts4/T2290651??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.06:53:24.13/k5log//k5ts1_log_newline 2006.229.06:53:24.84/k5log//k5ts2_log_newline 2006.229.06:53:25.58/k5log//k5ts3_log_newline 2006.229.06:53:26.32/k5log//k5ts4_log_newline 2006.229.06:53:26.34/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.06:53:26.34:setupk4=1 2006.229.06:53:26.34$setupk4/echo=on 2006.229.06:53:26.34$setupk4/pcalon 2006.229.06:53:26.34$pcalon/"no phase cal control is implemented here 2006.229.06:53:26.34$setupk4/"tpicd=stop 2006.229.06:53:26.34$setupk4/"rec=synch_on 2006.229.06:53:26.34$setupk4/"rec_mode=128 2006.229.06:53:26.34$setupk4/!* 2006.229.06:53:26.34$setupk4/recpk4 2006.229.06:53:26.34$recpk4/recpatch= 2006.229.06:53:26.35$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.06:53:26.35$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.06:53:26.35$setupk4/vck44 2006.229.06:53:26.35$vck44/valo=1,524.99 2006.229.06:53:26.35#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:53:26.35#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:53:26.35#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:26.35#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:26.35#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:26.35#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:26.35#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:53:26.35#ibcon#first serial, iclass 31, count 0 2006.229.06:53:26.35#ibcon#enter sib2, iclass 31, count 0 2006.229.06:53:26.35#ibcon#flushed, iclass 31, count 0 2006.229.06:53:26.35#ibcon#about to write, iclass 31, count 0 2006.229.06:53:26.35#ibcon#wrote, iclass 31, count 0 2006.229.06:53:26.35#ibcon#about to read 3, iclass 31, count 0 2006.229.06:53:26.36#ibcon#read 3, iclass 31, count 0 2006.229.06:53:26.36#ibcon#about to read 4, iclass 31, count 0 2006.229.06:53:26.36#ibcon#read 4, iclass 31, count 0 2006.229.06:53:26.36#ibcon#about to read 5, iclass 31, count 0 2006.229.06:53:26.36#ibcon#read 5, iclass 31, count 0 2006.229.06:53:26.36#ibcon#about to read 6, iclass 31, count 0 2006.229.06:53:26.36#ibcon#read 6, iclass 31, count 0 2006.229.06:53:26.36#ibcon#end of sib2, iclass 31, count 0 2006.229.06:53:26.36#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:53:26.36#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:53:26.36#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.06:53:26.36#ibcon#*before write, iclass 31, count 0 2006.229.06:53:26.36#ibcon#enter sib2, iclass 31, count 0 2006.229.06:53:26.36#ibcon#flushed, iclass 31, count 0 2006.229.06:53:26.36#ibcon#about to write, iclass 31, count 0 2006.229.06:53:26.36#ibcon#wrote, iclass 31, count 0 2006.229.06:53:26.36#ibcon#about to read 3, iclass 31, count 0 2006.229.06:53:26.41#ibcon#read 3, iclass 31, count 0 2006.229.06:53:26.41#ibcon#about to read 4, iclass 31, count 0 2006.229.06:53:26.41#ibcon#read 4, iclass 31, count 0 2006.229.06:53:26.41#ibcon#about to read 5, iclass 31, count 0 2006.229.06:53:26.41#ibcon#read 5, iclass 31, count 0 2006.229.06:53:26.41#ibcon#about to read 6, iclass 31, count 0 2006.229.06:53:26.41#ibcon#read 6, iclass 31, count 0 2006.229.06:53:26.41#ibcon#end of sib2, iclass 31, count 0 2006.229.06:53:26.41#ibcon#*after write, iclass 31, count 0 2006.229.06:53:26.41#ibcon#*before return 0, iclass 31, count 0 2006.229.06:53:26.41#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:26.41#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:26.41#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:53:26.41#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:53:26.41$vck44/va=1,8 2006.229.06:53:26.41#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.06:53:26.41#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.06:53:26.41#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:26.41#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:26.41#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:26.41#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:26.41#ibcon#enter wrdev, iclass 33, count 2 2006.229.06:53:26.41#ibcon#first serial, iclass 33, count 2 2006.229.06:53:26.41#ibcon#enter sib2, iclass 33, count 2 2006.229.06:53:26.41#ibcon#flushed, iclass 33, count 2 2006.229.06:53:26.41#ibcon#about to write, iclass 33, count 2 2006.229.06:53:26.41#ibcon#wrote, iclass 33, count 2 2006.229.06:53:26.42#ibcon#about to read 3, iclass 33, count 2 2006.229.06:53:26.43#ibcon#read 3, iclass 33, count 2 2006.229.06:53:26.43#ibcon#about to read 4, iclass 33, count 2 2006.229.06:53:26.43#ibcon#read 4, iclass 33, count 2 2006.229.06:53:26.43#ibcon#about to read 5, iclass 33, count 2 2006.229.06:53:26.43#ibcon#read 5, iclass 33, count 2 2006.229.06:53:26.43#ibcon#about to read 6, iclass 33, count 2 2006.229.06:53:26.43#ibcon#read 6, iclass 33, count 2 2006.229.06:53:26.43#ibcon#end of sib2, iclass 33, count 2 2006.229.06:53:26.43#ibcon#*mode == 0, iclass 33, count 2 2006.229.06:53:26.43#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.06:53:26.43#ibcon#[25=AT01-08\r\n] 2006.229.06:53:26.43#ibcon#*before write, iclass 33, count 2 2006.229.06:53:26.43#ibcon#enter sib2, iclass 33, count 2 2006.229.06:53:26.43#ibcon#flushed, iclass 33, count 2 2006.229.06:53:26.43#ibcon#about to write, iclass 33, count 2 2006.229.06:53:26.43#ibcon#wrote, iclass 33, count 2 2006.229.06:53:26.43#ibcon#about to read 3, iclass 33, count 2 2006.229.06:53:26.46#ibcon#read 3, iclass 33, count 2 2006.229.06:53:26.46#ibcon#about to read 4, iclass 33, count 2 2006.229.06:53:26.46#ibcon#read 4, iclass 33, count 2 2006.229.06:53:26.46#ibcon#about to read 5, iclass 33, count 2 2006.229.06:53:26.46#ibcon#read 5, iclass 33, count 2 2006.229.06:53:26.46#ibcon#about to read 6, iclass 33, count 2 2006.229.06:53:26.46#ibcon#read 6, iclass 33, count 2 2006.229.06:53:26.46#ibcon#end of sib2, iclass 33, count 2 2006.229.06:53:26.46#ibcon#*after write, iclass 33, count 2 2006.229.06:53:26.46#ibcon#*before return 0, iclass 33, count 2 2006.229.06:53:26.46#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:26.46#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:26.46#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.06:53:26.46#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:26.46#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:26.58#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:26.58#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:26.58#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:53:26.58#ibcon#first serial, iclass 33, count 0 2006.229.06:53:26.58#ibcon#enter sib2, iclass 33, count 0 2006.229.06:53:26.58#ibcon#flushed, iclass 33, count 0 2006.229.06:53:26.58#ibcon#about to write, iclass 33, count 0 2006.229.06:53:26.58#ibcon#wrote, iclass 33, count 0 2006.229.06:53:26.58#ibcon#about to read 3, iclass 33, count 0 2006.229.06:53:26.60#ibcon#read 3, iclass 33, count 0 2006.229.06:53:26.60#ibcon#about to read 4, iclass 33, count 0 2006.229.06:53:26.60#ibcon#read 4, iclass 33, count 0 2006.229.06:53:26.60#ibcon#about to read 5, iclass 33, count 0 2006.229.06:53:26.60#ibcon#read 5, iclass 33, count 0 2006.229.06:53:26.60#ibcon#about to read 6, iclass 33, count 0 2006.229.06:53:26.60#ibcon#read 6, iclass 33, count 0 2006.229.06:53:26.60#ibcon#end of sib2, iclass 33, count 0 2006.229.06:53:26.60#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:53:26.60#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:53:26.60#ibcon#[25=USB\r\n] 2006.229.06:53:26.60#ibcon#*before write, iclass 33, count 0 2006.229.06:53:26.60#ibcon#enter sib2, iclass 33, count 0 2006.229.06:53:26.60#ibcon#flushed, iclass 33, count 0 2006.229.06:53:26.60#ibcon#about to write, iclass 33, count 0 2006.229.06:53:26.60#ibcon#wrote, iclass 33, count 0 2006.229.06:53:26.60#ibcon#about to read 3, iclass 33, count 0 2006.229.06:53:26.63#ibcon#read 3, iclass 33, count 0 2006.229.06:53:26.63#ibcon#about to read 4, iclass 33, count 0 2006.229.06:53:26.63#ibcon#read 4, iclass 33, count 0 2006.229.06:53:26.63#ibcon#about to read 5, iclass 33, count 0 2006.229.06:53:26.63#ibcon#read 5, iclass 33, count 0 2006.229.06:53:26.63#ibcon#about to read 6, iclass 33, count 0 2006.229.06:53:26.63#ibcon#read 6, iclass 33, count 0 2006.229.06:53:26.63#ibcon#end of sib2, iclass 33, count 0 2006.229.06:53:26.63#ibcon#*after write, iclass 33, count 0 2006.229.06:53:26.63#ibcon#*before return 0, iclass 33, count 0 2006.229.06:53:26.63#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:26.63#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:26.63#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:53:26.63#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:53:26.63$vck44/valo=2,534.99 2006.229.06:53:26.63#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.06:53:26.63#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.06:53:26.63#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:26.63#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:26.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:26.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:26.63#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:53:26.63#ibcon#first serial, iclass 35, count 0 2006.229.06:53:26.63#ibcon#enter sib2, iclass 35, count 0 2006.229.06:53:26.63#ibcon#flushed, iclass 35, count 0 2006.229.06:53:26.63#ibcon#about to write, iclass 35, count 0 2006.229.06:53:26.64#ibcon#wrote, iclass 35, count 0 2006.229.06:53:26.64#ibcon#about to read 3, iclass 35, count 0 2006.229.06:53:26.65#ibcon#read 3, iclass 35, count 0 2006.229.06:53:26.65#ibcon#about to read 4, iclass 35, count 0 2006.229.06:53:26.65#ibcon#read 4, iclass 35, count 0 2006.229.06:53:26.65#ibcon#about to read 5, iclass 35, count 0 2006.229.06:53:26.65#ibcon#read 5, iclass 35, count 0 2006.229.06:53:26.65#ibcon#about to read 6, iclass 35, count 0 2006.229.06:53:26.65#ibcon#read 6, iclass 35, count 0 2006.229.06:53:26.65#ibcon#end of sib2, iclass 35, count 0 2006.229.06:53:26.65#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:53:26.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:53:26.65#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.06:53:26.65#ibcon#*before write, iclass 35, count 0 2006.229.06:53:26.65#ibcon#enter sib2, iclass 35, count 0 2006.229.06:53:26.65#ibcon#flushed, iclass 35, count 0 2006.229.06:53:26.65#ibcon#about to write, iclass 35, count 0 2006.229.06:53:26.65#ibcon#wrote, iclass 35, count 0 2006.229.06:53:26.65#ibcon#about to read 3, iclass 35, count 0 2006.229.06:53:26.69#ibcon#read 3, iclass 35, count 0 2006.229.06:53:26.69#ibcon#about to read 4, iclass 35, count 0 2006.229.06:53:26.69#ibcon#read 4, iclass 35, count 0 2006.229.06:53:26.69#ibcon#about to read 5, iclass 35, count 0 2006.229.06:53:26.69#ibcon#read 5, iclass 35, count 0 2006.229.06:53:26.69#ibcon#about to read 6, iclass 35, count 0 2006.229.06:53:26.69#ibcon#read 6, iclass 35, count 0 2006.229.06:53:26.69#ibcon#end of sib2, iclass 35, count 0 2006.229.06:53:26.69#ibcon#*after write, iclass 35, count 0 2006.229.06:53:26.69#ibcon#*before return 0, iclass 35, count 0 2006.229.06:53:26.69#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:26.69#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:26.69#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:53:26.69#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:53:26.69$vck44/va=2,7 2006.229.06:53:26.69#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.06:53:26.69#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.06:53:26.69#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:26.69#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:26.75#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:26.75#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:26.75#ibcon#enter wrdev, iclass 37, count 2 2006.229.06:53:26.75#ibcon#first serial, iclass 37, count 2 2006.229.06:53:26.75#ibcon#enter sib2, iclass 37, count 2 2006.229.06:53:26.75#ibcon#flushed, iclass 37, count 2 2006.229.06:53:26.75#ibcon#about to write, iclass 37, count 2 2006.229.06:53:26.75#ibcon#wrote, iclass 37, count 2 2006.229.06:53:26.75#ibcon#about to read 3, iclass 37, count 2 2006.229.06:53:26.77#ibcon#read 3, iclass 37, count 2 2006.229.06:53:26.77#ibcon#about to read 4, iclass 37, count 2 2006.229.06:53:26.77#ibcon#read 4, iclass 37, count 2 2006.229.06:53:26.77#ibcon#about to read 5, iclass 37, count 2 2006.229.06:53:26.77#ibcon#read 5, iclass 37, count 2 2006.229.06:53:26.77#ibcon#about to read 6, iclass 37, count 2 2006.229.06:53:26.77#ibcon#read 6, iclass 37, count 2 2006.229.06:53:26.77#ibcon#end of sib2, iclass 37, count 2 2006.229.06:53:26.77#ibcon#*mode == 0, iclass 37, count 2 2006.229.06:53:26.77#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.06:53:26.77#ibcon#[25=AT02-07\r\n] 2006.229.06:53:26.77#ibcon#*before write, iclass 37, count 2 2006.229.06:53:26.77#ibcon#enter sib2, iclass 37, count 2 2006.229.06:53:26.77#ibcon#flushed, iclass 37, count 2 2006.229.06:53:26.77#ibcon#about to write, iclass 37, count 2 2006.229.06:53:26.77#ibcon#wrote, iclass 37, count 2 2006.229.06:53:26.77#ibcon#about to read 3, iclass 37, count 2 2006.229.06:53:26.80#ibcon#read 3, iclass 37, count 2 2006.229.06:53:26.80#ibcon#about to read 4, iclass 37, count 2 2006.229.06:53:26.80#ibcon#read 4, iclass 37, count 2 2006.229.06:53:26.80#ibcon#about to read 5, iclass 37, count 2 2006.229.06:53:26.80#ibcon#read 5, iclass 37, count 2 2006.229.06:53:26.80#ibcon#about to read 6, iclass 37, count 2 2006.229.06:53:26.80#ibcon#read 6, iclass 37, count 2 2006.229.06:53:26.80#ibcon#end of sib2, iclass 37, count 2 2006.229.06:53:26.80#ibcon#*after write, iclass 37, count 2 2006.229.06:53:26.80#ibcon#*before return 0, iclass 37, count 2 2006.229.06:53:26.80#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:26.80#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:26.80#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.06:53:26.80#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:26.80#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:26.92#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:26.92#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:26.92#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:53:26.92#ibcon#first serial, iclass 37, count 0 2006.229.06:53:26.92#ibcon#enter sib2, iclass 37, count 0 2006.229.06:53:26.92#ibcon#flushed, iclass 37, count 0 2006.229.06:53:26.92#ibcon#about to write, iclass 37, count 0 2006.229.06:53:26.92#ibcon#wrote, iclass 37, count 0 2006.229.06:53:26.92#ibcon#about to read 3, iclass 37, count 0 2006.229.06:53:26.94#ibcon#read 3, iclass 37, count 0 2006.229.06:53:26.94#ibcon#about to read 4, iclass 37, count 0 2006.229.06:53:26.94#ibcon#read 4, iclass 37, count 0 2006.229.06:53:26.94#ibcon#about to read 5, iclass 37, count 0 2006.229.06:53:26.94#ibcon#read 5, iclass 37, count 0 2006.229.06:53:26.94#ibcon#about to read 6, iclass 37, count 0 2006.229.06:53:26.94#ibcon#read 6, iclass 37, count 0 2006.229.06:53:26.94#ibcon#end of sib2, iclass 37, count 0 2006.229.06:53:26.94#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:53:26.94#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:53:26.94#ibcon#[25=USB\r\n] 2006.229.06:53:26.94#ibcon#*before write, iclass 37, count 0 2006.229.06:53:26.94#ibcon#enter sib2, iclass 37, count 0 2006.229.06:53:26.94#ibcon#flushed, iclass 37, count 0 2006.229.06:53:26.94#ibcon#about to write, iclass 37, count 0 2006.229.06:53:26.94#ibcon#wrote, iclass 37, count 0 2006.229.06:53:26.94#ibcon#about to read 3, iclass 37, count 0 2006.229.06:53:26.97#ibcon#read 3, iclass 37, count 0 2006.229.06:53:26.97#ibcon#about to read 4, iclass 37, count 0 2006.229.06:53:26.97#ibcon#read 4, iclass 37, count 0 2006.229.06:53:26.97#ibcon#about to read 5, iclass 37, count 0 2006.229.06:53:26.97#ibcon#read 5, iclass 37, count 0 2006.229.06:53:26.97#ibcon#about to read 6, iclass 37, count 0 2006.229.06:53:26.97#ibcon#read 6, iclass 37, count 0 2006.229.06:53:26.97#ibcon#end of sib2, iclass 37, count 0 2006.229.06:53:26.97#ibcon#*after write, iclass 37, count 0 2006.229.06:53:26.97#ibcon#*before return 0, iclass 37, count 0 2006.229.06:53:26.97#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:26.97#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:26.97#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:53:26.97#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:53:26.97$vck44/valo=3,564.99 2006.229.06:53:26.97#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.06:53:26.97#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.06:53:26.97#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:26.97#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:26.97#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:26.97#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:26.97#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:53:26.97#ibcon#first serial, iclass 39, count 0 2006.229.06:53:26.97#ibcon#enter sib2, iclass 39, count 0 2006.229.06:53:26.97#ibcon#flushed, iclass 39, count 0 2006.229.06:53:26.97#ibcon#about to write, iclass 39, count 0 2006.229.06:53:26.97#ibcon#wrote, iclass 39, count 0 2006.229.06:53:26.97#ibcon#about to read 3, iclass 39, count 0 2006.229.06:53:26.99#ibcon#read 3, iclass 39, count 0 2006.229.06:53:26.99#ibcon#about to read 4, iclass 39, count 0 2006.229.06:53:26.99#ibcon#read 4, iclass 39, count 0 2006.229.06:53:26.99#ibcon#about to read 5, iclass 39, count 0 2006.229.06:53:26.99#ibcon#read 5, iclass 39, count 0 2006.229.06:53:26.99#ibcon#about to read 6, iclass 39, count 0 2006.229.06:53:26.99#ibcon#read 6, iclass 39, count 0 2006.229.06:53:26.99#ibcon#end of sib2, iclass 39, count 0 2006.229.06:53:26.99#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:53:26.99#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:53:26.99#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.06:53:26.99#ibcon#*before write, iclass 39, count 0 2006.229.06:53:26.99#ibcon#enter sib2, iclass 39, count 0 2006.229.06:53:26.99#ibcon#flushed, iclass 39, count 0 2006.229.06:53:26.99#ibcon#about to write, iclass 39, count 0 2006.229.06:53:26.99#ibcon#wrote, iclass 39, count 0 2006.229.06:53:26.99#ibcon#about to read 3, iclass 39, count 0 2006.229.06:53:27.03#ibcon#read 3, iclass 39, count 0 2006.229.06:53:27.03#ibcon#about to read 4, iclass 39, count 0 2006.229.06:53:27.03#ibcon#read 4, iclass 39, count 0 2006.229.06:53:27.03#ibcon#about to read 5, iclass 39, count 0 2006.229.06:53:27.03#ibcon#read 5, iclass 39, count 0 2006.229.06:53:27.03#ibcon#about to read 6, iclass 39, count 0 2006.229.06:53:27.03#ibcon#read 6, iclass 39, count 0 2006.229.06:53:27.03#ibcon#end of sib2, iclass 39, count 0 2006.229.06:53:27.03#ibcon#*after write, iclass 39, count 0 2006.229.06:53:27.03#ibcon#*before return 0, iclass 39, count 0 2006.229.06:53:27.03#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:27.03#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:27.03#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:53:27.03#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:53:27.03$vck44/va=3,6 2006.229.06:53:27.03#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:53:27.03#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:53:27.03#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:27.03#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:27.09#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:27.09#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:27.09#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:53:27.09#ibcon#first serial, iclass 3, count 2 2006.229.06:53:27.09#ibcon#enter sib2, iclass 3, count 2 2006.229.06:53:27.09#ibcon#flushed, iclass 3, count 2 2006.229.06:53:27.09#ibcon#about to write, iclass 3, count 2 2006.229.06:53:27.09#ibcon#wrote, iclass 3, count 2 2006.229.06:53:27.09#ibcon#about to read 3, iclass 3, count 2 2006.229.06:53:27.11#ibcon#read 3, iclass 3, count 2 2006.229.06:53:27.11#ibcon#about to read 4, iclass 3, count 2 2006.229.06:53:27.11#ibcon#read 4, iclass 3, count 2 2006.229.06:53:27.11#ibcon#about to read 5, iclass 3, count 2 2006.229.06:53:27.11#ibcon#read 5, iclass 3, count 2 2006.229.06:53:27.11#ibcon#about to read 6, iclass 3, count 2 2006.229.06:53:27.11#ibcon#read 6, iclass 3, count 2 2006.229.06:53:27.11#ibcon#end of sib2, iclass 3, count 2 2006.229.06:53:27.11#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:53:27.11#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:53:27.11#ibcon#[25=AT03-06\r\n] 2006.229.06:53:27.11#ibcon#*before write, iclass 3, count 2 2006.229.06:53:27.11#ibcon#enter sib2, iclass 3, count 2 2006.229.06:53:27.11#ibcon#flushed, iclass 3, count 2 2006.229.06:53:27.11#ibcon#about to write, iclass 3, count 2 2006.229.06:53:27.11#ibcon#wrote, iclass 3, count 2 2006.229.06:53:27.11#ibcon#about to read 3, iclass 3, count 2 2006.229.06:53:27.14#ibcon#read 3, iclass 3, count 2 2006.229.06:53:27.14#ibcon#about to read 4, iclass 3, count 2 2006.229.06:53:27.15#ibcon#read 4, iclass 3, count 2 2006.229.06:53:27.15#ibcon#about to read 5, iclass 3, count 2 2006.229.06:53:27.15#ibcon#read 5, iclass 3, count 2 2006.229.06:53:27.15#ibcon#about to read 6, iclass 3, count 2 2006.229.06:53:27.15#ibcon#read 6, iclass 3, count 2 2006.229.06:53:27.15#ibcon#end of sib2, iclass 3, count 2 2006.229.06:53:27.15#ibcon#*after write, iclass 3, count 2 2006.229.06:53:27.15#ibcon#*before return 0, iclass 3, count 2 2006.229.06:53:27.15#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:27.15#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:27.15#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:53:27.15#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:27.15#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:27.26#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:27.26#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:27.26#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:53:27.26#ibcon#first serial, iclass 3, count 0 2006.229.06:53:27.26#ibcon#enter sib2, iclass 3, count 0 2006.229.06:53:27.26#ibcon#flushed, iclass 3, count 0 2006.229.06:53:27.26#ibcon#about to write, iclass 3, count 0 2006.229.06:53:27.26#ibcon#wrote, iclass 3, count 0 2006.229.06:53:27.26#ibcon#about to read 3, iclass 3, count 0 2006.229.06:53:27.28#ibcon#read 3, iclass 3, count 0 2006.229.06:53:27.28#ibcon#about to read 4, iclass 3, count 0 2006.229.06:53:27.28#ibcon#read 4, iclass 3, count 0 2006.229.06:53:27.28#ibcon#about to read 5, iclass 3, count 0 2006.229.06:53:27.28#ibcon#read 5, iclass 3, count 0 2006.229.06:53:27.28#ibcon#about to read 6, iclass 3, count 0 2006.229.06:53:27.28#ibcon#read 6, iclass 3, count 0 2006.229.06:53:27.28#ibcon#end of sib2, iclass 3, count 0 2006.229.06:53:27.28#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:53:27.28#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:53:27.28#ibcon#[25=USB\r\n] 2006.229.06:53:27.28#ibcon#*before write, iclass 3, count 0 2006.229.06:53:27.28#ibcon#enter sib2, iclass 3, count 0 2006.229.06:53:27.28#ibcon#flushed, iclass 3, count 0 2006.229.06:53:27.28#ibcon#about to write, iclass 3, count 0 2006.229.06:53:27.28#ibcon#wrote, iclass 3, count 0 2006.229.06:53:27.28#ibcon#about to read 3, iclass 3, count 0 2006.229.06:53:27.31#ibcon#read 3, iclass 3, count 0 2006.229.06:53:27.31#ibcon#about to read 4, iclass 3, count 0 2006.229.06:53:27.31#ibcon#read 4, iclass 3, count 0 2006.229.06:53:27.31#ibcon#about to read 5, iclass 3, count 0 2006.229.06:53:27.31#ibcon#read 5, iclass 3, count 0 2006.229.06:53:27.31#ibcon#about to read 6, iclass 3, count 0 2006.229.06:53:27.31#ibcon#read 6, iclass 3, count 0 2006.229.06:53:27.31#ibcon#end of sib2, iclass 3, count 0 2006.229.06:53:27.31#ibcon#*after write, iclass 3, count 0 2006.229.06:53:27.31#ibcon#*before return 0, iclass 3, count 0 2006.229.06:53:27.31#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:27.31#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:27.31#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:53:27.31#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:53:27.31$vck44/valo=4,624.99 2006.229.06:53:27.31#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.06:53:27.31#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.06:53:27.31#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:27.31#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:27.31#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:27.31#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:27.31#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:53:27.31#ibcon#first serial, iclass 5, count 0 2006.229.06:53:27.31#ibcon#enter sib2, iclass 5, count 0 2006.229.06:53:27.31#ibcon#flushed, iclass 5, count 0 2006.229.06:53:27.31#ibcon#about to write, iclass 5, count 0 2006.229.06:53:27.32#ibcon#wrote, iclass 5, count 0 2006.229.06:53:27.32#ibcon#about to read 3, iclass 5, count 0 2006.229.06:53:27.33#ibcon#read 3, iclass 5, count 0 2006.229.06:53:27.33#ibcon#about to read 4, iclass 5, count 0 2006.229.06:53:27.33#ibcon#read 4, iclass 5, count 0 2006.229.06:53:27.33#ibcon#about to read 5, iclass 5, count 0 2006.229.06:53:27.33#ibcon#read 5, iclass 5, count 0 2006.229.06:53:27.33#ibcon#about to read 6, iclass 5, count 0 2006.229.06:53:27.33#ibcon#read 6, iclass 5, count 0 2006.229.06:53:27.33#ibcon#end of sib2, iclass 5, count 0 2006.229.06:53:27.33#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:53:27.33#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:53:27.33#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.06:53:27.33#ibcon#*before write, iclass 5, count 0 2006.229.06:53:27.33#ibcon#enter sib2, iclass 5, count 0 2006.229.06:53:27.33#ibcon#flushed, iclass 5, count 0 2006.229.06:53:27.33#ibcon#about to write, iclass 5, count 0 2006.229.06:53:27.33#ibcon#wrote, iclass 5, count 0 2006.229.06:53:27.33#ibcon#about to read 3, iclass 5, count 0 2006.229.06:53:27.37#ibcon#read 3, iclass 5, count 0 2006.229.06:53:27.37#ibcon#about to read 4, iclass 5, count 0 2006.229.06:53:27.37#ibcon#read 4, iclass 5, count 0 2006.229.06:53:27.37#ibcon#about to read 5, iclass 5, count 0 2006.229.06:53:27.37#ibcon#read 5, iclass 5, count 0 2006.229.06:53:27.37#ibcon#about to read 6, iclass 5, count 0 2006.229.06:53:27.37#ibcon#read 6, iclass 5, count 0 2006.229.06:53:27.37#ibcon#end of sib2, iclass 5, count 0 2006.229.06:53:27.37#ibcon#*after write, iclass 5, count 0 2006.229.06:53:27.37#ibcon#*before return 0, iclass 5, count 0 2006.229.06:53:27.37#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:27.37#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:27.37#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:53:27.37#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:53:27.37$vck44/va=4,7 2006.229.06:53:27.37#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.06:53:27.37#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.06:53:27.37#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:27.37#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:27.43#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:27.43#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:27.43#ibcon#enter wrdev, iclass 7, count 2 2006.229.06:53:27.43#ibcon#first serial, iclass 7, count 2 2006.229.06:53:27.43#ibcon#enter sib2, iclass 7, count 2 2006.229.06:53:27.43#ibcon#flushed, iclass 7, count 2 2006.229.06:53:27.43#ibcon#about to write, iclass 7, count 2 2006.229.06:53:27.43#ibcon#wrote, iclass 7, count 2 2006.229.06:53:27.43#ibcon#about to read 3, iclass 7, count 2 2006.229.06:53:27.45#ibcon#read 3, iclass 7, count 2 2006.229.06:53:27.45#ibcon#about to read 4, iclass 7, count 2 2006.229.06:53:27.45#ibcon#read 4, iclass 7, count 2 2006.229.06:53:27.45#ibcon#about to read 5, iclass 7, count 2 2006.229.06:53:27.45#ibcon#read 5, iclass 7, count 2 2006.229.06:53:27.45#ibcon#about to read 6, iclass 7, count 2 2006.229.06:53:27.45#ibcon#read 6, iclass 7, count 2 2006.229.06:53:27.45#ibcon#end of sib2, iclass 7, count 2 2006.229.06:53:27.45#ibcon#*mode == 0, iclass 7, count 2 2006.229.06:53:27.45#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.06:53:27.45#ibcon#[25=AT04-07\r\n] 2006.229.06:53:27.45#ibcon#*before write, iclass 7, count 2 2006.229.06:53:27.45#ibcon#enter sib2, iclass 7, count 2 2006.229.06:53:27.45#ibcon#flushed, iclass 7, count 2 2006.229.06:53:27.45#ibcon#about to write, iclass 7, count 2 2006.229.06:53:27.45#ibcon#wrote, iclass 7, count 2 2006.229.06:53:27.45#ibcon#about to read 3, iclass 7, count 2 2006.229.06:53:27.48#ibcon#read 3, iclass 7, count 2 2006.229.06:53:27.48#ibcon#about to read 4, iclass 7, count 2 2006.229.06:53:27.48#ibcon#read 4, iclass 7, count 2 2006.229.06:53:27.48#ibcon#about to read 5, iclass 7, count 2 2006.229.06:53:27.48#ibcon#read 5, iclass 7, count 2 2006.229.06:53:27.48#ibcon#about to read 6, iclass 7, count 2 2006.229.06:53:27.48#ibcon#read 6, iclass 7, count 2 2006.229.06:53:27.48#ibcon#end of sib2, iclass 7, count 2 2006.229.06:53:27.48#ibcon#*after write, iclass 7, count 2 2006.229.06:53:27.48#ibcon#*before return 0, iclass 7, count 2 2006.229.06:53:27.48#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:27.48#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:27.48#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.06:53:27.48#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:27.48#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:27.60#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:27.60#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:27.60#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:53:27.60#ibcon#first serial, iclass 7, count 0 2006.229.06:53:27.60#ibcon#enter sib2, iclass 7, count 0 2006.229.06:53:27.60#ibcon#flushed, iclass 7, count 0 2006.229.06:53:27.60#ibcon#about to write, iclass 7, count 0 2006.229.06:53:27.60#ibcon#wrote, iclass 7, count 0 2006.229.06:53:27.60#ibcon#about to read 3, iclass 7, count 0 2006.229.06:53:27.62#ibcon#read 3, iclass 7, count 0 2006.229.06:53:27.62#ibcon#about to read 4, iclass 7, count 0 2006.229.06:53:27.62#ibcon#read 4, iclass 7, count 0 2006.229.06:53:27.62#ibcon#about to read 5, iclass 7, count 0 2006.229.06:53:27.62#ibcon#read 5, iclass 7, count 0 2006.229.06:53:27.62#ibcon#about to read 6, iclass 7, count 0 2006.229.06:53:27.62#ibcon#read 6, iclass 7, count 0 2006.229.06:53:27.62#ibcon#end of sib2, iclass 7, count 0 2006.229.06:53:27.62#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:53:27.62#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:53:27.62#ibcon#[25=USB\r\n] 2006.229.06:53:27.62#ibcon#*before write, iclass 7, count 0 2006.229.06:53:27.62#ibcon#enter sib2, iclass 7, count 0 2006.229.06:53:27.62#ibcon#flushed, iclass 7, count 0 2006.229.06:53:27.62#ibcon#about to write, iclass 7, count 0 2006.229.06:53:27.62#ibcon#wrote, iclass 7, count 0 2006.229.06:53:27.62#ibcon#about to read 3, iclass 7, count 0 2006.229.06:53:27.65#ibcon#read 3, iclass 7, count 0 2006.229.06:53:27.65#ibcon#about to read 4, iclass 7, count 0 2006.229.06:53:27.65#ibcon#read 4, iclass 7, count 0 2006.229.06:53:27.65#ibcon#about to read 5, iclass 7, count 0 2006.229.06:53:27.65#ibcon#read 5, iclass 7, count 0 2006.229.06:53:27.65#ibcon#about to read 6, iclass 7, count 0 2006.229.06:53:27.65#ibcon#read 6, iclass 7, count 0 2006.229.06:53:27.65#ibcon#end of sib2, iclass 7, count 0 2006.229.06:53:27.65#ibcon#*after write, iclass 7, count 0 2006.229.06:53:27.65#ibcon#*before return 0, iclass 7, count 0 2006.229.06:53:27.65#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:27.65#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:27.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:53:27.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:53:27.65$vck44/valo=5,734.99 2006.229.06:53:27.65#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.06:53:27.65#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.06:53:27.65#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:27.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:27.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:27.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:27.65#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:53:27.65#ibcon#first serial, iclass 11, count 0 2006.229.06:53:27.65#ibcon#enter sib2, iclass 11, count 0 2006.229.06:53:27.65#ibcon#flushed, iclass 11, count 0 2006.229.06:53:27.66#ibcon#about to write, iclass 11, count 0 2006.229.06:53:27.66#ibcon#wrote, iclass 11, count 0 2006.229.06:53:27.66#ibcon#about to read 3, iclass 11, count 0 2006.229.06:53:27.67#ibcon#read 3, iclass 11, count 0 2006.229.06:53:27.67#ibcon#about to read 4, iclass 11, count 0 2006.229.06:53:27.67#ibcon#read 4, iclass 11, count 0 2006.229.06:53:27.67#ibcon#about to read 5, iclass 11, count 0 2006.229.06:53:27.67#ibcon#read 5, iclass 11, count 0 2006.229.06:53:27.67#ibcon#about to read 6, iclass 11, count 0 2006.229.06:53:27.67#ibcon#read 6, iclass 11, count 0 2006.229.06:53:27.67#ibcon#end of sib2, iclass 11, count 0 2006.229.06:53:27.67#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:53:27.67#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:53:27.67#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.06:53:27.67#ibcon#*before write, iclass 11, count 0 2006.229.06:53:27.67#ibcon#enter sib2, iclass 11, count 0 2006.229.06:53:27.67#ibcon#flushed, iclass 11, count 0 2006.229.06:53:27.67#ibcon#about to write, iclass 11, count 0 2006.229.06:53:27.67#ibcon#wrote, iclass 11, count 0 2006.229.06:53:27.67#ibcon#about to read 3, iclass 11, count 0 2006.229.06:53:27.71#ibcon#read 3, iclass 11, count 0 2006.229.06:53:27.71#ibcon#about to read 4, iclass 11, count 0 2006.229.06:53:27.71#ibcon#read 4, iclass 11, count 0 2006.229.06:53:27.71#ibcon#about to read 5, iclass 11, count 0 2006.229.06:53:27.71#ibcon#read 5, iclass 11, count 0 2006.229.06:53:27.71#ibcon#about to read 6, iclass 11, count 0 2006.229.06:53:27.71#ibcon#read 6, iclass 11, count 0 2006.229.06:53:27.71#ibcon#end of sib2, iclass 11, count 0 2006.229.06:53:27.71#ibcon#*after write, iclass 11, count 0 2006.229.06:53:27.71#ibcon#*before return 0, iclass 11, count 0 2006.229.06:53:27.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:27.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:27.71#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:53:27.71#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:53:27.71$vck44/va=5,4 2006.229.06:53:27.71#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.06:53:27.71#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.06:53:27.71#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:27.71#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:27.77#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:27.77#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:27.77#ibcon#enter wrdev, iclass 13, count 2 2006.229.06:53:27.77#ibcon#first serial, iclass 13, count 2 2006.229.06:53:27.77#ibcon#enter sib2, iclass 13, count 2 2006.229.06:53:27.77#ibcon#flushed, iclass 13, count 2 2006.229.06:53:27.77#ibcon#about to write, iclass 13, count 2 2006.229.06:53:27.77#ibcon#wrote, iclass 13, count 2 2006.229.06:53:27.77#ibcon#about to read 3, iclass 13, count 2 2006.229.06:53:27.79#ibcon#read 3, iclass 13, count 2 2006.229.06:53:27.79#ibcon#about to read 4, iclass 13, count 2 2006.229.06:53:27.79#ibcon#read 4, iclass 13, count 2 2006.229.06:53:27.79#ibcon#about to read 5, iclass 13, count 2 2006.229.06:53:27.79#ibcon#read 5, iclass 13, count 2 2006.229.06:53:27.79#ibcon#about to read 6, iclass 13, count 2 2006.229.06:53:27.79#ibcon#read 6, iclass 13, count 2 2006.229.06:53:27.79#ibcon#end of sib2, iclass 13, count 2 2006.229.06:53:27.79#ibcon#*mode == 0, iclass 13, count 2 2006.229.06:53:27.79#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.06:53:27.79#ibcon#[25=AT05-04\r\n] 2006.229.06:53:27.79#ibcon#*before write, iclass 13, count 2 2006.229.06:53:27.79#ibcon#enter sib2, iclass 13, count 2 2006.229.06:53:27.79#ibcon#flushed, iclass 13, count 2 2006.229.06:53:27.79#ibcon#about to write, iclass 13, count 2 2006.229.06:53:27.79#ibcon#wrote, iclass 13, count 2 2006.229.06:53:27.79#ibcon#about to read 3, iclass 13, count 2 2006.229.06:53:27.82#ibcon#read 3, iclass 13, count 2 2006.229.06:53:27.82#ibcon#about to read 4, iclass 13, count 2 2006.229.06:53:27.82#ibcon#read 4, iclass 13, count 2 2006.229.06:53:27.82#ibcon#about to read 5, iclass 13, count 2 2006.229.06:53:27.82#ibcon#read 5, iclass 13, count 2 2006.229.06:53:27.82#ibcon#about to read 6, iclass 13, count 2 2006.229.06:53:27.82#ibcon#read 6, iclass 13, count 2 2006.229.06:53:27.82#ibcon#end of sib2, iclass 13, count 2 2006.229.06:53:27.82#ibcon#*after write, iclass 13, count 2 2006.229.06:53:27.82#ibcon#*before return 0, iclass 13, count 2 2006.229.06:53:27.82#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:27.82#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:27.82#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.06:53:27.82#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:27.82#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:27.94#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:27.94#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:27.94#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:53:27.94#ibcon#first serial, iclass 13, count 0 2006.229.06:53:27.94#ibcon#enter sib2, iclass 13, count 0 2006.229.06:53:27.94#ibcon#flushed, iclass 13, count 0 2006.229.06:53:27.94#ibcon#about to write, iclass 13, count 0 2006.229.06:53:27.94#ibcon#wrote, iclass 13, count 0 2006.229.06:53:27.94#ibcon#about to read 3, iclass 13, count 0 2006.229.06:53:27.96#ibcon#read 3, iclass 13, count 0 2006.229.06:53:27.96#ibcon#about to read 4, iclass 13, count 0 2006.229.06:53:27.96#ibcon#read 4, iclass 13, count 0 2006.229.06:53:27.96#ibcon#about to read 5, iclass 13, count 0 2006.229.06:53:27.96#ibcon#read 5, iclass 13, count 0 2006.229.06:53:27.96#ibcon#about to read 6, iclass 13, count 0 2006.229.06:53:27.96#ibcon#read 6, iclass 13, count 0 2006.229.06:53:27.96#ibcon#end of sib2, iclass 13, count 0 2006.229.06:53:27.96#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:53:27.96#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:53:27.96#ibcon#[25=USB\r\n] 2006.229.06:53:27.96#ibcon#*before write, iclass 13, count 0 2006.229.06:53:27.96#ibcon#enter sib2, iclass 13, count 0 2006.229.06:53:27.96#ibcon#flushed, iclass 13, count 0 2006.229.06:53:27.96#ibcon#about to write, iclass 13, count 0 2006.229.06:53:27.96#ibcon#wrote, iclass 13, count 0 2006.229.06:53:27.96#ibcon#about to read 3, iclass 13, count 0 2006.229.06:53:27.99#ibcon#read 3, iclass 13, count 0 2006.229.06:53:27.99#ibcon#about to read 4, iclass 13, count 0 2006.229.06:53:27.99#ibcon#read 4, iclass 13, count 0 2006.229.06:53:27.99#ibcon#about to read 5, iclass 13, count 0 2006.229.06:53:27.99#ibcon#read 5, iclass 13, count 0 2006.229.06:53:27.99#ibcon#about to read 6, iclass 13, count 0 2006.229.06:53:27.99#ibcon#read 6, iclass 13, count 0 2006.229.06:53:27.99#ibcon#end of sib2, iclass 13, count 0 2006.229.06:53:27.99#ibcon#*after write, iclass 13, count 0 2006.229.06:53:27.99#ibcon#*before return 0, iclass 13, count 0 2006.229.06:53:27.99#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:27.99#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:27.99#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:53:27.99#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:53:27.99$vck44/valo=6,814.99 2006.229.06:53:27.99#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.06:53:27.99#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.06:53:27.99#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:27.99#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:27.99#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:27.99#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:27.99#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:53:27.99#ibcon#first serial, iclass 15, count 0 2006.229.06:53:27.99#ibcon#enter sib2, iclass 15, count 0 2006.229.06:53:27.99#ibcon#flushed, iclass 15, count 0 2006.229.06:53:27.99#ibcon#about to write, iclass 15, count 0 2006.229.06:53:28.00#ibcon#wrote, iclass 15, count 0 2006.229.06:53:28.00#ibcon#about to read 3, iclass 15, count 0 2006.229.06:53:28.01#ibcon#read 3, iclass 15, count 0 2006.229.06:53:28.01#ibcon#about to read 4, iclass 15, count 0 2006.229.06:53:28.01#ibcon#read 4, iclass 15, count 0 2006.229.06:53:28.01#ibcon#about to read 5, iclass 15, count 0 2006.229.06:53:28.01#ibcon#read 5, iclass 15, count 0 2006.229.06:53:28.01#ibcon#about to read 6, iclass 15, count 0 2006.229.06:53:28.01#ibcon#read 6, iclass 15, count 0 2006.229.06:53:28.01#ibcon#end of sib2, iclass 15, count 0 2006.229.06:53:28.01#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:53:28.01#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:53:28.01#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.06:53:28.01#ibcon#*before write, iclass 15, count 0 2006.229.06:53:28.01#ibcon#enter sib2, iclass 15, count 0 2006.229.06:53:28.01#ibcon#flushed, iclass 15, count 0 2006.229.06:53:28.01#ibcon#about to write, iclass 15, count 0 2006.229.06:53:28.01#ibcon#wrote, iclass 15, count 0 2006.229.06:53:28.01#ibcon#about to read 3, iclass 15, count 0 2006.229.06:53:28.05#ibcon#read 3, iclass 15, count 0 2006.229.06:53:28.05#ibcon#about to read 4, iclass 15, count 0 2006.229.06:53:28.05#ibcon#read 4, iclass 15, count 0 2006.229.06:53:28.05#ibcon#about to read 5, iclass 15, count 0 2006.229.06:53:28.05#ibcon#read 5, iclass 15, count 0 2006.229.06:53:28.05#ibcon#about to read 6, iclass 15, count 0 2006.229.06:53:28.05#ibcon#read 6, iclass 15, count 0 2006.229.06:53:28.05#ibcon#end of sib2, iclass 15, count 0 2006.229.06:53:28.05#ibcon#*after write, iclass 15, count 0 2006.229.06:53:28.05#ibcon#*before return 0, iclass 15, count 0 2006.229.06:53:28.05#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:28.05#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:28.05#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:53:28.05#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:53:28.05$vck44/va=6,4 2006.229.06:53:28.05#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.06:53:28.05#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.06:53:28.05#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:28.05#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:28.11#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:28.11#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:28.11#ibcon#enter wrdev, iclass 17, count 2 2006.229.06:53:28.11#ibcon#first serial, iclass 17, count 2 2006.229.06:53:28.11#ibcon#enter sib2, iclass 17, count 2 2006.229.06:53:28.11#ibcon#flushed, iclass 17, count 2 2006.229.06:53:28.11#ibcon#about to write, iclass 17, count 2 2006.229.06:53:28.11#ibcon#wrote, iclass 17, count 2 2006.229.06:53:28.11#ibcon#about to read 3, iclass 17, count 2 2006.229.06:53:28.13#ibcon#read 3, iclass 17, count 2 2006.229.06:53:28.13#ibcon#about to read 4, iclass 17, count 2 2006.229.06:53:28.13#ibcon#read 4, iclass 17, count 2 2006.229.06:53:28.13#ibcon#about to read 5, iclass 17, count 2 2006.229.06:53:28.13#ibcon#read 5, iclass 17, count 2 2006.229.06:53:28.13#ibcon#about to read 6, iclass 17, count 2 2006.229.06:53:28.13#ibcon#read 6, iclass 17, count 2 2006.229.06:53:28.13#ibcon#end of sib2, iclass 17, count 2 2006.229.06:53:28.13#ibcon#*mode == 0, iclass 17, count 2 2006.229.06:53:28.13#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.06:53:28.13#ibcon#[25=AT06-04\r\n] 2006.229.06:53:28.13#ibcon#*before write, iclass 17, count 2 2006.229.06:53:28.13#ibcon#enter sib2, iclass 17, count 2 2006.229.06:53:28.13#ibcon#flushed, iclass 17, count 2 2006.229.06:53:28.13#ibcon#about to write, iclass 17, count 2 2006.229.06:53:28.13#ibcon#wrote, iclass 17, count 2 2006.229.06:53:28.13#ibcon#about to read 3, iclass 17, count 2 2006.229.06:53:28.16#ibcon#read 3, iclass 17, count 2 2006.229.06:53:28.16#ibcon#about to read 4, iclass 17, count 2 2006.229.06:53:28.16#ibcon#read 4, iclass 17, count 2 2006.229.06:53:28.16#ibcon#about to read 5, iclass 17, count 2 2006.229.06:53:28.16#ibcon#read 5, iclass 17, count 2 2006.229.06:53:28.16#ibcon#about to read 6, iclass 17, count 2 2006.229.06:53:28.16#ibcon#read 6, iclass 17, count 2 2006.229.06:53:28.16#ibcon#end of sib2, iclass 17, count 2 2006.229.06:53:28.16#ibcon#*after write, iclass 17, count 2 2006.229.06:53:28.16#ibcon#*before return 0, iclass 17, count 2 2006.229.06:53:28.16#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:28.16#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:28.16#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.06:53:28.16#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:28.16#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:28.28#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:28.28#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:28.28#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:53:28.28#ibcon#first serial, iclass 17, count 0 2006.229.06:53:28.28#ibcon#enter sib2, iclass 17, count 0 2006.229.06:53:28.28#ibcon#flushed, iclass 17, count 0 2006.229.06:53:28.28#ibcon#about to write, iclass 17, count 0 2006.229.06:53:28.28#ibcon#wrote, iclass 17, count 0 2006.229.06:53:28.28#ibcon#about to read 3, iclass 17, count 0 2006.229.06:53:28.30#ibcon#read 3, iclass 17, count 0 2006.229.06:53:28.30#ibcon#about to read 4, iclass 17, count 0 2006.229.06:53:28.30#ibcon#read 4, iclass 17, count 0 2006.229.06:53:28.30#ibcon#about to read 5, iclass 17, count 0 2006.229.06:53:28.30#ibcon#read 5, iclass 17, count 0 2006.229.06:53:28.30#ibcon#about to read 6, iclass 17, count 0 2006.229.06:53:28.30#ibcon#read 6, iclass 17, count 0 2006.229.06:53:28.30#ibcon#end of sib2, iclass 17, count 0 2006.229.06:53:28.30#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:53:28.30#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:53:28.30#ibcon#[25=USB\r\n] 2006.229.06:53:28.30#ibcon#*before write, iclass 17, count 0 2006.229.06:53:28.30#ibcon#enter sib2, iclass 17, count 0 2006.229.06:53:28.30#ibcon#flushed, iclass 17, count 0 2006.229.06:53:28.30#ibcon#about to write, iclass 17, count 0 2006.229.06:53:28.30#ibcon#wrote, iclass 17, count 0 2006.229.06:53:28.30#ibcon#about to read 3, iclass 17, count 0 2006.229.06:53:28.33#ibcon#read 3, iclass 17, count 0 2006.229.06:53:28.33#ibcon#about to read 4, iclass 17, count 0 2006.229.06:53:28.33#ibcon#read 4, iclass 17, count 0 2006.229.06:53:28.33#ibcon#about to read 5, iclass 17, count 0 2006.229.06:53:28.33#ibcon#read 5, iclass 17, count 0 2006.229.06:53:28.33#ibcon#about to read 6, iclass 17, count 0 2006.229.06:53:28.33#ibcon#read 6, iclass 17, count 0 2006.229.06:53:28.33#ibcon#end of sib2, iclass 17, count 0 2006.229.06:53:28.33#ibcon#*after write, iclass 17, count 0 2006.229.06:53:28.33#ibcon#*before return 0, iclass 17, count 0 2006.229.06:53:28.33#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:28.33#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:28.33#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:53:28.33#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:53:28.33$vck44/valo=7,864.99 2006.229.06:53:28.33#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.06:53:28.33#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.06:53:28.33#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:28.33#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:28.33#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:28.33#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:28.33#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:53:28.33#ibcon#first serial, iclass 19, count 0 2006.229.06:53:28.33#ibcon#enter sib2, iclass 19, count 0 2006.229.06:53:28.33#ibcon#flushed, iclass 19, count 0 2006.229.06:53:28.33#ibcon#about to write, iclass 19, count 0 2006.229.06:53:28.33#ibcon#wrote, iclass 19, count 0 2006.229.06:53:28.33#ibcon#about to read 3, iclass 19, count 0 2006.229.06:53:28.35#ibcon#read 3, iclass 19, count 0 2006.229.06:53:28.35#ibcon#about to read 4, iclass 19, count 0 2006.229.06:53:28.35#ibcon#read 4, iclass 19, count 0 2006.229.06:53:28.35#ibcon#about to read 5, iclass 19, count 0 2006.229.06:53:28.35#ibcon#read 5, iclass 19, count 0 2006.229.06:53:28.35#ibcon#about to read 6, iclass 19, count 0 2006.229.06:53:28.35#ibcon#read 6, iclass 19, count 0 2006.229.06:53:28.35#ibcon#end of sib2, iclass 19, count 0 2006.229.06:53:28.35#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:53:28.35#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:53:28.35#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.06:53:28.35#ibcon#*before write, iclass 19, count 0 2006.229.06:53:28.35#ibcon#enter sib2, iclass 19, count 0 2006.229.06:53:28.35#ibcon#flushed, iclass 19, count 0 2006.229.06:53:28.35#ibcon#about to write, iclass 19, count 0 2006.229.06:53:28.35#ibcon#wrote, iclass 19, count 0 2006.229.06:53:28.35#ibcon#about to read 3, iclass 19, count 0 2006.229.06:53:28.39#ibcon#read 3, iclass 19, count 0 2006.229.06:53:28.39#ibcon#about to read 4, iclass 19, count 0 2006.229.06:53:28.39#ibcon#read 4, iclass 19, count 0 2006.229.06:53:28.39#ibcon#about to read 5, iclass 19, count 0 2006.229.06:53:28.39#ibcon#read 5, iclass 19, count 0 2006.229.06:53:28.39#ibcon#about to read 6, iclass 19, count 0 2006.229.06:53:28.39#ibcon#read 6, iclass 19, count 0 2006.229.06:53:28.39#ibcon#end of sib2, iclass 19, count 0 2006.229.06:53:28.39#ibcon#*after write, iclass 19, count 0 2006.229.06:53:28.39#ibcon#*before return 0, iclass 19, count 0 2006.229.06:53:28.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:28.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:28.39#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:53:28.39#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:53:28.39$vck44/va=7,5 2006.229.06:53:28.39#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.06:53:28.39#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.06:53:28.39#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:28.39#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:28.45#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:28.45#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:28.45#ibcon#enter wrdev, iclass 21, count 2 2006.229.06:53:28.45#ibcon#first serial, iclass 21, count 2 2006.229.06:53:28.45#ibcon#enter sib2, iclass 21, count 2 2006.229.06:53:28.45#ibcon#flushed, iclass 21, count 2 2006.229.06:53:28.45#ibcon#about to write, iclass 21, count 2 2006.229.06:53:28.45#ibcon#wrote, iclass 21, count 2 2006.229.06:53:28.45#ibcon#about to read 3, iclass 21, count 2 2006.229.06:53:28.47#ibcon#read 3, iclass 21, count 2 2006.229.06:53:28.47#ibcon#about to read 4, iclass 21, count 2 2006.229.06:53:28.47#ibcon#read 4, iclass 21, count 2 2006.229.06:53:28.47#ibcon#about to read 5, iclass 21, count 2 2006.229.06:53:28.47#ibcon#read 5, iclass 21, count 2 2006.229.06:53:28.47#ibcon#about to read 6, iclass 21, count 2 2006.229.06:53:28.47#ibcon#read 6, iclass 21, count 2 2006.229.06:53:28.47#ibcon#end of sib2, iclass 21, count 2 2006.229.06:53:28.47#ibcon#*mode == 0, iclass 21, count 2 2006.229.06:53:28.47#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.06:53:28.47#ibcon#[25=AT07-05\r\n] 2006.229.06:53:28.47#ibcon#*before write, iclass 21, count 2 2006.229.06:53:28.47#ibcon#enter sib2, iclass 21, count 2 2006.229.06:53:28.47#ibcon#flushed, iclass 21, count 2 2006.229.06:53:28.47#ibcon#about to write, iclass 21, count 2 2006.229.06:53:28.47#ibcon#wrote, iclass 21, count 2 2006.229.06:53:28.47#ibcon#about to read 3, iclass 21, count 2 2006.229.06:53:28.50#ibcon#read 3, iclass 21, count 2 2006.229.06:53:28.50#ibcon#about to read 4, iclass 21, count 2 2006.229.06:53:28.50#ibcon#read 4, iclass 21, count 2 2006.229.06:53:28.50#ibcon#about to read 5, iclass 21, count 2 2006.229.06:53:28.50#ibcon#read 5, iclass 21, count 2 2006.229.06:53:28.50#ibcon#about to read 6, iclass 21, count 2 2006.229.06:53:28.50#ibcon#read 6, iclass 21, count 2 2006.229.06:53:28.50#ibcon#end of sib2, iclass 21, count 2 2006.229.06:53:28.50#ibcon#*after write, iclass 21, count 2 2006.229.06:53:28.50#ibcon#*before return 0, iclass 21, count 2 2006.229.06:53:28.50#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:28.50#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:28.50#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.06:53:28.50#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:28.50#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:28.62#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:28.62#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:28.62#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:53:28.62#ibcon#first serial, iclass 21, count 0 2006.229.06:53:28.62#ibcon#enter sib2, iclass 21, count 0 2006.229.06:53:28.62#ibcon#flushed, iclass 21, count 0 2006.229.06:53:28.62#ibcon#about to write, iclass 21, count 0 2006.229.06:53:28.62#ibcon#wrote, iclass 21, count 0 2006.229.06:53:28.62#ibcon#about to read 3, iclass 21, count 0 2006.229.06:53:28.64#ibcon#read 3, iclass 21, count 0 2006.229.06:53:28.64#ibcon#about to read 4, iclass 21, count 0 2006.229.06:53:28.64#ibcon#read 4, iclass 21, count 0 2006.229.06:53:28.64#ibcon#about to read 5, iclass 21, count 0 2006.229.06:53:28.64#ibcon#read 5, iclass 21, count 0 2006.229.06:53:28.64#ibcon#about to read 6, iclass 21, count 0 2006.229.06:53:28.64#ibcon#read 6, iclass 21, count 0 2006.229.06:53:28.64#ibcon#end of sib2, iclass 21, count 0 2006.229.06:53:28.64#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:53:28.64#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:53:28.64#ibcon#[25=USB\r\n] 2006.229.06:53:28.64#ibcon#*before write, iclass 21, count 0 2006.229.06:53:28.64#ibcon#enter sib2, iclass 21, count 0 2006.229.06:53:28.64#ibcon#flushed, iclass 21, count 0 2006.229.06:53:28.64#ibcon#about to write, iclass 21, count 0 2006.229.06:53:28.64#ibcon#wrote, iclass 21, count 0 2006.229.06:53:28.64#ibcon#about to read 3, iclass 21, count 0 2006.229.06:53:28.67#ibcon#read 3, iclass 21, count 0 2006.229.06:53:28.67#ibcon#about to read 4, iclass 21, count 0 2006.229.06:53:28.67#ibcon#read 4, iclass 21, count 0 2006.229.06:53:28.67#ibcon#about to read 5, iclass 21, count 0 2006.229.06:53:28.67#ibcon#read 5, iclass 21, count 0 2006.229.06:53:28.67#ibcon#about to read 6, iclass 21, count 0 2006.229.06:53:28.67#ibcon#read 6, iclass 21, count 0 2006.229.06:53:28.67#ibcon#end of sib2, iclass 21, count 0 2006.229.06:53:28.67#ibcon#*after write, iclass 21, count 0 2006.229.06:53:28.67#ibcon#*before return 0, iclass 21, count 0 2006.229.06:53:28.67#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:28.67#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:28.67#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:53:28.67#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:53:28.67$vck44/valo=8,884.99 2006.229.06:53:28.67#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.06:53:28.67#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.06:53:28.67#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:28.67#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:28.67#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:28.67#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:28.67#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:53:28.67#ibcon#first serial, iclass 23, count 0 2006.229.06:53:28.67#ibcon#enter sib2, iclass 23, count 0 2006.229.06:53:28.68#ibcon#flushed, iclass 23, count 0 2006.229.06:53:28.68#ibcon#about to write, iclass 23, count 0 2006.229.06:53:28.68#ibcon#wrote, iclass 23, count 0 2006.229.06:53:28.68#ibcon#about to read 3, iclass 23, count 0 2006.229.06:53:28.69#ibcon#read 3, iclass 23, count 0 2006.229.06:53:28.69#ibcon#about to read 4, iclass 23, count 0 2006.229.06:53:28.69#ibcon#read 4, iclass 23, count 0 2006.229.06:53:28.69#ibcon#about to read 5, iclass 23, count 0 2006.229.06:53:28.69#ibcon#read 5, iclass 23, count 0 2006.229.06:53:28.69#ibcon#about to read 6, iclass 23, count 0 2006.229.06:53:28.69#ibcon#read 6, iclass 23, count 0 2006.229.06:53:28.69#ibcon#end of sib2, iclass 23, count 0 2006.229.06:53:28.69#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:53:28.69#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:53:28.69#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.06:53:28.69#ibcon#*before write, iclass 23, count 0 2006.229.06:53:28.69#ibcon#enter sib2, iclass 23, count 0 2006.229.06:53:28.69#ibcon#flushed, iclass 23, count 0 2006.229.06:53:28.69#ibcon#about to write, iclass 23, count 0 2006.229.06:53:28.69#ibcon#wrote, iclass 23, count 0 2006.229.06:53:28.69#ibcon#about to read 3, iclass 23, count 0 2006.229.06:53:28.73#ibcon#read 3, iclass 23, count 0 2006.229.06:53:28.73#ibcon#about to read 4, iclass 23, count 0 2006.229.06:53:28.73#ibcon#read 4, iclass 23, count 0 2006.229.06:53:28.73#ibcon#about to read 5, iclass 23, count 0 2006.229.06:53:28.73#ibcon#read 5, iclass 23, count 0 2006.229.06:53:28.73#ibcon#about to read 6, iclass 23, count 0 2006.229.06:53:28.73#ibcon#read 6, iclass 23, count 0 2006.229.06:53:28.73#ibcon#end of sib2, iclass 23, count 0 2006.229.06:53:28.73#ibcon#*after write, iclass 23, count 0 2006.229.06:53:28.73#ibcon#*before return 0, iclass 23, count 0 2006.229.06:53:28.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:28.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:28.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:53:28.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:53:28.73$vck44/va=8,6 2006.229.06:53:28.73#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.06:53:28.73#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.06:53:28.73#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:28.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:53:28.79#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:53:28.79#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:53:28.79#ibcon#enter wrdev, iclass 25, count 2 2006.229.06:53:28.79#ibcon#first serial, iclass 25, count 2 2006.229.06:53:28.79#ibcon#enter sib2, iclass 25, count 2 2006.229.06:53:28.79#ibcon#flushed, iclass 25, count 2 2006.229.06:53:28.79#ibcon#about to write, iclass 25, count 2 2006.229.06:53:28.79#ibcon#wrote, iclass 25, count 2 2006.229.06:53:28.79#ibcon#about to read 3, iclass 25, count 2 2006.229.06:53:28.81#ibcon#read 3, iclass 25, count 2 2006.229.06:53:28.81#ibcon#about to read 4, iclass 25, count 2 2006.229.06:53:28.81#ibcon#read 4, iclass 25, count 2 2006.229.06:53:28.81#ibcon#about to read 5, iclass 25, count 2 2006.229.06:53:28.81#ibcon#read 5, iclass 25, count 2 2006.229.06:53:28.81#ibcon#about to read 6, iclass 25, count 2 2006.229.06:53:28.81#ibcon#read 6, iclass 25, count 2 2006.229.06:53:28.81#ibcon#end of sib2, iclass 25, count 2 2006.229.06:53:28.81#ibcon#*mode == 0, iclass 25, count 2 2006.229.06:53:28.81#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.06:53:28.81#ibcon#[25=AT08-06\r\n] 2006.229.06:53:28.81#ibcon#*before write, iclass 25, count 2 2006.229.06:53:28.81#ibcon#enter sib2, iclass 25, count 2 2006.229.06:53:28.81#ibcon#flushed, iclass 25, count 2 2006.229.06:53:28.81#ibcon#about to write, iclass 25, count 2 2006.229.06:53:28.81#ibcon#wrote, iclass 25, count 2 2006.229.06:53:28.81#ibcon#about to read 3, iclass 25, count 2 2006.229.06:53:28.84#ibcon#read 3, iclass 25, count 2 2006.229.06:53:28.84#ibcon#about to read 4, iclass 25, count 2 2006.229.06:53:28.84#ibcon#read 4, iclass 25, count 2 2006.229.06:53:28.84#ibcon#about to read 5, iclass 25, count 2 2006.229.06:53:28.84#ibcon#read 5, iclass 25, count 2 2006.229.06:53:28.84#ibcon#about to read 6, iclass 25, count 2 2006.229.06:53:28.84#ibcon#read 6, iclass 25, count 2 2006.229.06:53:28.84#ibcon#end of sib2, iclass 25, count 2 2006.229.06:53:28.84#ibcon#*after write, iclass 25, count 2 2006.229.06:53:28.84#ibcon#*before return 0, iclass 25, count 2 2006.229.06:53:28.84#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:53:28.84#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.06:53:28.84#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.06:53:28.84#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:28.84#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:53:28.96#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:53:28.96#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:53:28.96#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:53:28.96#ibcon#first serial, iclass 25, count 0 2006.229.06:53:28.96#ibcon#enter sib2, iclass 25, count 0 2006.229.06:53:28.96#ibcon#flushed, iclass 25, count 0 2006.229.06:53:28.96#ibcon#about to write, iclass 25, count 0 2006.229.06:53:28.96#ibcon#wrote, iclass 25, count 0 2006.229.06:53:28.96#ibcon#about to read 3, iclass 25, count 0 2006.229.06:53:28.98#ibcon#read 3, iclass 25, count 0 2006.229.06:53:28.98#ibcon#about to read 4, iclass 25, count 0 2006.229.06:53:28.98#ibcon#read 4, iclass 25, count 0 2006.229.06:53:28.98#ibcon#about to read 5, iclass 25, count 0 2006.229.06:53:28.98#ibcon#read 5, iclass 25, count 0 2006.229.06:53:28.98#ibcon#about to read 6, iclass 25, count 0 2006.229.06:53:28.98#ibcon#read 6, iclass 25, count 0 2006.229.06:53:28.98#ibcon#end of sib2, iclass 25, count 0 2006.229.06:53:28.98#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:53:28.98#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:53:28.98#ibcon#[25=USB\r\n] 2006.229.06:53:28.98#ibcon#*before write, iclass 25, count 0 2006.229.06:53:28.98#ibcon#enter sib2, iclass 25, count 0 2006.229.06:53:28.98#ibcon#flushed, iclass 25, count 0 2006.229.06:53:28.98#ibcon#about to write, iclass 25, count 0 2006.229.06:53:28.98#ibcon#wrote, iclass 25, count 0 2006.229.06:53:28.98#ibcon#about to read 3, iclass 25, count 0 2006.229.06:53:29.01#ibcon#read 3, iclass 25, count 0 2006.229.06:53:29.01#ibcon#about to read 4, iclass 25, count 0 2006.229.06:53:29.01#ibcon#read 4, iclass 25, count 0 2006.229.06:53:29.01#ibcon#about to read 5, iclass 25, count 0 2006.229.06:53:29.01#ibcon#read 5, iclass 25, count 0 2006.229.06:53:29.01#ibcon#about to read 6, iclass 25, count 0 2006.229.06:53:29.01#ibcon#read 6, iclass 25, count 0 2006.229.06:53:29.01#ibcon#end of sib2, iclass 25, count 0 2006.229.06:53:29.01#ibcon#*after write, iclass 25, count 0 2006.229.06:53:29.01#ibcon#*before return 0, iclass 25, count 0 2006.229.06:53:29.01#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:53:29.01#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.06:53:29.01#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:53:29.01#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:53:29.01$vck44/vblo=1,629.99 2006.229.06:53:29.01#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.06:53:29.01#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.06:53:29.01#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:29.01#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:53:29.01#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:53:29.01#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:53:29.01#ibcon#enter wrdev, iclass 27, count 0 2006.229.06:53:29.01#ibcon#first serial, iclass 27, count 0 2006.229.06:53:29.01#ibcon#enter sib2, iclass 27, count 0 2006.229.06:53:29.01#ibcon#flushed, iclass 27, count 0 2006.229.06:53:29.01#ibcon#about to write, iclass 27, count 0 2006.229.06:53:29.01#ibcon#wrote, iclass 27, count 0 2006.229.06:53:29.01#ibcon#about to read 3, iclass 27, count 0 2006.229.06:53:29.03#ibcon#read 3, iclass 27, count 0 2006.229.06:53:29.03#ibcon#about to read 4, iclass 27, count 0 2006.229.06:53:29.03#ibcon#read 4, iclass 27, count 0 2006.229.06:53:29.03#ibcon#about to read 5, iclass 27, count 0 2006.229.06:53:29.03#ibcon#read 5, iclass 27, count 0 2006.229.06:53:29.03#ibcon#about to read 6, iclass 27, count 0 2006.229.06:53:29.03#ibcon#read 6, iclass 27, count 0 2006.229.06:53:29.03#ibcon#end of sib2, iclass 27, count 0 2006.229.06:53:29.03#ibcon#*mode == 0, iclass 27, count 0 2006.229.06:53:29.03#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.06:53:29.03#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.06:53:29.03#ibcon#*before write, iclass 27, count 0 2006.229.06:53:29.03#ibcon#enter sib2, iclass 27, count 0 2006.229.06:53:29.03#ibcon#flushed, iclass 27, count 0 2006.229.06:53:29.03#ibcon#about to write, iclass 27, count 0 2006.229.06:53:29.03#ibcon#wrote, iclass 27, count 0 2006.229.06:53:29.03#ibcon#about to read 3, iclass 27, count 0 2006.229.06:53:29.07#ibcon#read 3, iclass 27, count 0 2006.229.06:53:29.07#ibcon#about to read 4, iclass 27, count 0 2006.229.06:53:29.07#ibcon#read 4, iclass 27, count 0 2006.229.06:53:29.07#ibcon#about to read 5, iclass 27, count 0 2006.229.06:53:29.07#ibcon#read 5, iclass 27, count 0 2006.229.06:53:29.07#ibcon#about to read 6, iclass 27, count 0 2006.229.06:53:29.07#ibcon#read 6, iclass 27, count 0 2006.229.06:53:29.07#ibcon#end of sib2, iclass 27, count 0 2006.229.06:53:29.07#ibcon#*after write, iclass 27, count 0 2006.229.06:53:29.07#ibcon#*before return 0, iclass 27, count 0 2006.229.06:53:29.07#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:53:29.07#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.06:53:29.07#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.06:53:29.07#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.06:53:29.07$vck44/vb=1,4 2006.229.06:53:29.07#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.06:53:29.07#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.06:53:29.07#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:29.07#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:53:29.07#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:53:29.07#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:53:29.07#ibcon#enter wrdev, iclass 29, count 2 2006.229.06:53:29.07#ibcon#first serial, iclass 29, count 2 2006.229.06:53:29.07#ibcon#enter sib2, iclass 29, count 2 2006.229.06:53:29.07#ibcon#flushed, iclass 29, count 2 2006.229.06:53:29.07#ibcon#about to write, iclass 29, count 2 2006.229.06:53:29.07#ibcon#wrote, iclass 29, count 2 2006.229.06:53:29.08#ibcon#about to read 3, iclass 29, count 2 2006.229.06:53:29.09#ibcon#read 3, iclass 29, count 2 2006.229.06:53:29.09#ibcon#about to read 4, iclass 29, count 2 2006.229.06:53:29.09#ibcon#read 4, iclass 29, count 2 2006.229.06:53:29.09#ibcon#about to read 5, iclass 29, count 2 2006.229.06:53:29.09#ibcon#read 5, iclass 29, count 2 2006.229.06:53:29.09#ibcon#about to read 6, iclass 29, count 2 2006.229.06:53:29.09#ibcon#read 6, iclass 29, count 2 2006.229.06:53:29.09#ibcon#end of sib2, iclass 29, count 2 2006.229.06:53:29.09#ibcon#*mode == 0, iclass 29, count 2 2006.229.06:53:29.09#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.06:53:29.09#ibcon#[27=AT01-04\r\n] 2006.229.06:53:29.09#ibcon#*before write, iclass 29, count 2 2006.229.06:53:29.09#ibcon#enter sib2, iclass 29, count 2 2006.229.06:53:29.09#ibcon#flushed, iclass 29, count 2 2006.229.06:53:29.09#ibcon#about to write, iclass 29, count 2 2006.229.06:53:29.09#ibcon#wrote, iclass 29, count 2 2006.229.06:53:29.09#ibcon#about to read 3, iclass 29, count 2 2006.229.06:53:29.12#ibcon#read 3, iclass 29, count 2 2006.229.06:53:29.12#ibcon#about to read 4, iclass 29, count 2 2006.229.06:53:29.12#ibcon#read 4, iclass 29, count 2 2006.229.06:53:29.12#ibcon#about to read 5, iclass 29, count 2 2006.229.06:53:29.12#ibcon#read 5, iclass 29, count 2 2006.229.06:53:29.12#ibcon#about to read 6, iclass 29, count 2 2006.229.06:53:29.12#ibcon#read 6, iclass 29, count 2 2006.229.06:53:29.12#ibcon#end of sib2, iclass 29, count 2 2006.229.06:53:29.12#ibcon#*after write, iclass 29, count 2 2006.229.06:53:29.12#ibcon#*before return 0, iclass 29, count 2 2006.229.06:53:29.12#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:53:29.12#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.06:53:29.12#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.06:53:29.12#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:29.12#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:53:29.24#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:53:29.24#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:53:29.24#ibcon#enter wrdev, iclass 29, count 0 2006.229.06:53:29.24#ibcon#first serial, iclass 29, count 0 2006.229.06:53:29.24#ibcon#enter sib2, iclass 29, count 0 2006.229.06:53:29.24#ibcon#flushed, iclass 29, count 0 2006.229.06:53:29.24#ibcon#about to write, iclass 29, count 0 2006.229.06:53:29.24#ibcon#wrote, iclass 29, count 0 2006.229.06:53:29.24#ibcon#about to read 3, iclass 29, count 0 2006.229.06:53:29.26#ibcon#read 3, iclass 29, count 0 2006.229.06:53:29.26#ibcon#about to read 4, iclass 29, count 0 2006.229.06:53:29.26#ibcon#read 4, iclass 29, count 0 2006.229.06:53:29.26#ibcon#about to read 5, iclass 29, count 0 2006.229.06:53:29.26#ibcon#read 5, iclass 29, count 0 2006.229.06:53:29.26#ibcon#about to read 6, iclass 29, count 0 2006.229.06:53:29.26#ibcon#read 6, iclass 29, count 0 2006.229.06:53:29.26#ibcon#end of sib2, iclass 29, count 0 2006.229.06:53:29.26#ibcon#*mode == 0, iclass 29, count 0 2006.229.06:53:29.26#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.06:53:29.26#ibcon#[27=USB\r\n] 2006.229.06:53:29.26#ibcon#*before write, iclass 29, count 0 2006.229.06:53:29.26#ibcon#enter sib2, iclass 29, count 0 2006.229.06:53:29.26#ibcon#flushed, iclass 29, count 0 2006.229.06:53:29.26#ibcon#about to write, iclass 29, count 0 2006.229.06:53:29.26#ibcon#wrote, iclass 29, count 0 2006.229.06:53:29.26#ibcon#about to read 3, iclass 29, count 0 2006.229.06:53:29.29#ibcon#read 3, iclass 29, count 0 2006.229.06:53:29.29#ibcon#about to read 4, iclass 29, count 0 2006.229.06:53:29.29#ibcon#read 4, iclass 29, count 0 2006.229.06:53:29.29#ibcon#about to read 5, iclass 29, count 0 2006.229.06:53:29.29#ibcon#read 5, iclass 29, count 0 2006.229.06:53:29.29#ibcon#about to read 6, iclass 29, count 0 2006.229.06:53:29.29#ibcon#read 6, iclass 29, count 0 2006.229.06:53:29.29#ibcon#end of sib2, iclass 29, count 0 2006.229.06:53:29.29#ibcon#*after write, iclass 29, count 0 2006.229.06:53:29.29#ibcon#*before return 0, iclass 29, count 0 2006.229.06:53:29.29#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:53:29.29#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.06:53:29.29#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.06:53:29.29#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.06:53:29.29$vck44/vblo=2,634.99 2006.229.06:53:29.29#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.06:53:29.29#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.06:53:29.29#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:29.29#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:29.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:29.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:29.29#ibcon#enter wrdev, iclass 31, count 0 2006.229.06:53:29.29#ibcon#first serial, iclass 31, count 0 2006.229.06:53:29.29#ibcon#enter sib2, iclass 31, count 0 2006.229.06:53:29.29#ibcon#flushed, iclass 31, count 0 2006.229.06:53:29.29#ibcon#about to write, iclass 31, count 0 2006.229.06:53:29.29#ibcon#wrote, iclass 31, count 0 2006.229.06:53:29.29#ibcon#about to read 3, iclass 31, count 0 2006.229.06:53:29.31#ibcon#read 3, iclass 31, count 0 2006.229.06:53:29.31#ibcon#about to read 4, iclass 31, count 0 2006.229.06:53:29.31#ibcon#read 4, iclass 31, count 0 2006.229.06:53:29.31#ibcon#about to read 5, iclass 31, count 0 2006.229.06:53:29.31#ibcon#read 5, iclass 31, count 0 2006.229.06:53:29.31#ibcon#about to read 6, iclass 31, count 0 2006.229.06:53:29.31#ibcon#read 6, iclass 31, count 0 2006.229.06:53:29.31#ibcon#end of sib2, iclass 31, count 0 2006.229.06:53:29.31#ibcon#*mode == 0, iclass 31, count 0 2006.229.06:53:29.31#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.06:53:29.31#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.06:53:29.31#ibcon#*before write, iclass 31, count 0 2006.229.06:53:29.31#ibcon#enter sib2, iclass 31, count 0 2006.229.06:53:29.31#ibcon#flushed, iclass 31, count 0 2006.229.06:53:29.31#ibcon#about to write, iclass 31, count 0 2006.229.06:53:29.31#ibcon#wrote, iclass 31, count 0 2006.229.06:53:29.31#ibcon#about to read 3, iclass 31, count 0 2006.229.06:53:29.35#ibcon#read 3, iclass 31, count 0 2006.229.06:53:29.35#ibcon#about to read 4, iclass 31, count 0 2006.229.06:53:29.35#ibcon#read 4, iclass 31, count 0 2006.229.06:53:29.35#ibcon#about to read 5, iclass 31, count 0 2006.229.06:53:29.35#ibcon#read 5, iclass 31, count 0 2006.229.06:53:29.35#ibcon#about to read 6, iclass 31, count 0 2006.229.06:53:29.35#ibcon#read 6, iclass 31, count 0 2006.229.06:53:29.35#ibcon#end of sib2, iclass 31, count 0 2006.229.06:53:29.35#ibcon#*after write, iclass 31, count 0 2006.229.06:53:29.35#ibcon#*before return 0, iclass 31, count 0 2006.229.06:53:29.35#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:29.35#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.06:53:29.35#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.06:53:29.35#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.06:53:29.35$vck44/vb=2,4 2006.229.06:53:29.35#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.06:53:29.35#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.06:53:29.35#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:29.35#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:29.41#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:29.41#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:29.41#ibcon#enter wrdev, iclass 33, count 2 2006.229.06:53:29.41#ibcon#first serial, iclass 33, count 2 2006.229.06:53:29.41#ibcon#enter sib2, iclass 33, count 2 2006.229.06:53:29.41#ibcon#flushed, iclass 33, count 2 2006.229.06:53:29.41#ibcon#about to write, iclass 33, count 2 2006.229.06:53:29.41#ibcon#wrote, iclass 33, count 2 2006.229.06:53:29.41#ibcon#about to read 3, iclass 33, count 2 2006.229.06:53:29.43#ibcon#read 3, iclass 33, count 2 2006.229.06:53:29.43#ibcon#about to read 4, iclass 33, count 2 2006.229.06:53:29.43#ibcon#read 4, iclass 33, count 2 2006.229.06:53:29.43#ibcon#about to read 5, iclass 33, count 2 2006.229.06:53:29.43#ibcon#read 5, iclass 33, count 2 2006.229.06:53:29.43#ibcon#about to read 6, iclass 33, count 2 2006.229.06:53:29.43#ibcon#read 6, iclass 33, count 2 2006.229.06:53:29.43#ibcon#end of sib2, iclass 33, count 2 2006.229.06:53:29.43#ibcon#*mode == 0, iclass 33, count 2 2006.229.06:53:29.43#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.06:53:29.43#ibcon#[27=AT02-04\r\n] 2006.229.06:53:29.43#ibcon#*before write, iclass 33, count 2 2006.229.06:53:29.43#ibcon#enter sib2, iclass 33, count 2 2006.229.06:53:29.43#ibcon#flushed, iclass 33, count 2 2006.229.06:53:29.43#ibcon#about to write, iclass 33, count 2 2006.229.06:53:29.43#ibcon#wrote, iclass 33, count 2 2006.229.06:53:29.43#ibcon#about to read 3, iclass 33, count 2 2006.229.06:53:29.46#ibcon#read 3, iclass 33, count 2 2006.229.06:53:29.46#ibcon#about to read 4, iclass 33, count 2 2006.229.06:53:29.46#ibcon#read 4, iclass 33, count 2 2006.229.06:53:29.46#ibcon#about to read 5, iclass 33, count 2 2006.229.06:53:29.46#ibcon#read 5, iclass 33, count 2 2006.229.06:53:29.46#ibcon#about to read 6, iclass 33, count 2 2006.229.06:53:29.46#ibcon#read 6, iclass 33, count 2 2006.229.06:53:29.46#ibcon#end of sib2, iclass 33, count 2 2006.229.06:53:29.46#ibcon#*after write, iclass 33, count 2 2006.229.06:53:29.46#ibcon#*before return 0, iclass 33, count 2 2006.229.06:53:29.46#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:29.46#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.06:53:29.46#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.06:53:29.46#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:29.46#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:29.58#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:29.58#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:29.58#ibcon#enter wrdev, iclass 33, count 0 2006.229.06:53:29.58#ibcon#first serial, iclass 33, count 0 2006.229.06:53:29.58#ibcon#enter sib2, iclass 33, count 0 2006.229.06:53:29.58#ibcon#flushed, iclass 33, count 0 2006.229.06:53:29.58#ibcon#about to write, iclass 33, count 0 2006.229.06:53:29.58#ibcon#wrote, iclass 33, count 0 2006.229.06:53:29.58#ibcon#about to read 3, iclass 33, count 0 2006.229.06:53:29.60#ibcon#read 3, iclass 33, count 0 2006.229.06:53:29.60#ibcon#about to read 4, iclass 33, count 0 2006.229.06:53:29.60#ibcon#read 4, iclass 33, count 0 2006.229.06:53:29.60#ibcon#about to read 5, iclass 33, count 0 2006.229.06:53:29.60#ibcon#read 5, iclass 33, count 0 2006.229.06:53:29.60#ibcon#about to read 6, iclass 33, count 0 2006.229.06:53:29.60#ibcon#read 6, iclass 33, count 0 2006.229.06:53:29.60#ibcon#end of sib2, iclass 33, count 0 2006.229.06:53:29.60#ibcon#*mode == 0, iclass 33, count 0 2006.229.06:53:29.60#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.06:53:29.60#ibcon#[27=USB\r\n] 2006.229.06:53:29.60#ibcon#*before write, iclass 33, count 0 2006.229.06:53:29.60#ibcon#enter sib2, iclass 33, count 0 2006.229.06:53:29.60#ibcon#flushed, iclass 33, count 0 2006.229.06:53:29.60#ibcon#about to write, iclass 33, count 0 2006.229.06:53:29.60#ibcon#wrote, iclass 33, count 0 2006.229.06:53:29.60#ibcon#about to read 3, iclass 33, count 0 2006.229.06:53:29.63#ibcon#read 3, iclass 33, count 0 2006.229.06:53:29.63#ibcon#about to read 4, iclass 33, count 0 2006.229.06:53:29.63#ibcon#read 4, iclass 33, count 0 2006.229.06:53:29.63#ibcon#about to read 5, iclass 33, count 0 2006.229.06:53:29.63#ibcon#read 5, iclass 33, count 0 2006.229.06:53:29.63#ibcon#about to read 6, iclass 33, count 0 2006.229.06:53:29.63#ibcon#read 6, iclass 33, count 0 2006.229.06:53:29.63#ibcon#end of sib2, iclass 33, count 0 2006.229.06:53:29.63#ibcon#*after write, iclass 33, count 0 2006.229.06:53:29.63#ibcon#*before return 0, iclass 33, count 0 2006.229.06:53:29.63#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:29.63#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.06:53:29.63#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.06:53:29.63#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.06:53:29.63$vck44/vblo=3,649.99 2006.229.06:53:29.63#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.06:53:29.63#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.06:53:29.63#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:29.63#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:29.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:29.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:29.63#ibcon#enter wrdev, iclass 35, count 0 2006.229.06:53:29.63#ibcon#first serial, iclass 35, count 0 2006.229.06:53:29.63#ibcon#enter sib2, iclass 35, count 0 2006.229.06:53:29.63#ibcon#flushed, iclass 35, count 0 2006.229.06:53:29.63#ibcon#about to write, iclass 35, count 0 2006.229.06:53:29.64#ibcon#wrote, iclass 35, count 0 2006.229.06:53:29.64#ibcon#about to read 3, iclass 35, count 0 2006.229.06:53:29.65#ibcon#read 3, iclass 35, count 0 2006.229.06:53:29.65#ibcon#about to read 4, iclass 35, count 0 2006.229.06:53:29.65#ibcon#read 4, iclass 35, count 0 2006.229.06:53:29.65#ibcon#about to read 5, iclass 35, count 0 2006.229.06:53:29.65#ibcon#read 5, iclass 35, count 0 2006.229.06:53:29.65#ibcon#about to read 6, iclass 35, count 0 2006.229.06:53:29.65#ibcon#read 6, iclass 35, count 0 2006.229.06:53:29.65#ibcon#end of sib2, iclass 35, count 0 2006.229.06:53:29.65#ibcon#*mode == 0, iclass 35, count 0 2006.229.06:53:29.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.06:53:29.65#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.06:53:29.65#ibcon#*before write, iclass 35, count 0 2006.229.06:53:29.65#ibcon#enter sib2, iclass 35, count 0 2006.229.06:53:29.65#ibcon#flushed, iclass 35, count 0 2006.229.06:53:29.65#ibcon#about to write, iclass 35, count 0 2006.229.06:53:29.65#ibcon#wrote, iclass 35, count 0 2006.229.06:53:29.65#ibcon#about to read 3, iclass 35, count 0 2006.229.06:53:29.69#ibcon#read 3, iclass 35, count 0 2006.229.06:53:29.69#ibcon#about to read 4, iclass 35, count 0 2006.229.06:53:29.69#ibcon#read 4, iclass 35, count 0 2006.229.06:53:29.69#ibcon#about to read 5, iclass 35, count 0 2006.229.06:53:29.69#ibcon#read 5, iclass 35, count 0 2006.229.06:53:29.69#ibcon#about to read 6, iclass 35, count 0 2006.229.06:53:29.69#ibcon#read 6, iclass 35, count 0 2006.229.06:53:29.69#ibcon#end of sib2, iclass 35, count 0 2006.229.06:53:29.69#ibcon#*after write, iclass 35, count 0 2006.229.06:53:29.69#ibcon#*before return 0, iclass 35, count 0 2006.229.06:53:29.69#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:29.69#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.06:53:29.69#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.06:53:29.69#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.06:53:29.69$vck44/vb=3,4 2006.229.06:53:29.69#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.06:53:29.69#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.06:53:29.69#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:29.69#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:29.75#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:29.75#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:29.75#ibcon#enter wrdev, iclass 37, count 2 2006.229.06:53:29.75#ibcon#first serial, iclass 37, count 2 2006.229.06:53:29.75#ibcon#enter sib2, iclass 37, count 2 2006.229.06:53:29.75#ibcon#flushed, iclass 37, count 2 2006.229.06:53:29.75#ibcon#about to write, iclass 37, count 2 2006.229.06:53:29.75#ibcon#wrote, iclass 37, count 2 2006.229.06:53:29.75#ibcon#about to read 3, iclass 37, count 2 2006.229.06:53:29.77#ibcon#read 3, iclass 37, count 2 2006.229.06:53:29.77#ibcon#about to read 4, iclass 37, count 2 2006.229.06:53:29.77#ibcon#read 4, iclass 37, count 2 2006.229.06:53:29.77#ibcon#about to read 5, iclass 37, count 2 2006.229.06:53:29.77#ibcon#read 5, iclass 37, count 2 2006.229.06:53:29.77#ibcon#about to read 6, iclass 37, count 2 2006.229.06:53:29.77#ibcon#read 6, iclass 37, count 2 2006.229.06:53:29.77#ibcon#end of sib2, iclass 37, count 2 2006.229.06:53:29.77#ibcon#*mode == 0, iclass 37, count 2 2006.229.06:53:29.77#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.06:53:29.77#ibcon#[27=AT03-04\r\n] 2006.229.06:53:29.77#ibcon#*before write, iclass 37, count 2 2006.229.06:53:29.77#ibcon#enter sib2, iclass 37, count 2 2006.229.06:53:29.77#ibcon#flushed, iclass 37, count 2 2006.229.06:53:29.77#ibcon#about to write, iclass 37, count 2 2006.229.06:53:29.77#ibcon#wrote, iclass 37, count 2 2006.229.06:53:29.77#ibcon#about to read 3, iclass 37, count 2 2006.229.06:53:29.80#ibcon#read 3, iclass 37, count 2 2006.229.06:53:29.80#ibcon#about to read 4, iclass 37, count 2 2006.229.06:53:29.80#ibcon#read 4, iclass 37, count 2 2006.229.06:53:29.80#ibcon#about to read 5, iclass 37, count 2 2006.229.06:53:29.80#ibcon#read 5, iclass 37, count 2 2006.229.06:53:29.80#ibcon#about to read 6, iclass 37, count 2 2006.229.06:53:29.80#ibcon#read 6, iclass 37, count 2 2006.229.06:53:29.80#ibcon#end of sib2, iclass 37, count 2 2006.229.06:53:29.80#ibcon#*after write, iclass 37, count 2 2006.229.06:53:29.80#ibcon#*before return 0, iclass 37, count 2 2006.229.06:53:29.81#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:29.81#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.06:53:29.81#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.06:53:29.81#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:29.81#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:29.93#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:29.93#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:29.93#ibcon#enter wrdev, iclass 37, count 0 2006.229.06:53:29.93#ibcon#first serial, iclass 37, count 0 2006.229.06:53:29.93#ibcon#enter sib2, iclass 37, count 0 2006.229.06:53:29.93#ibcon#flushed, iclass 37, count 0 2006.229.06:53:29.93#ibcon#about to write, iclass 37, count 0 2006.229.06:53:29.93#ibcon#wrote, iclass 37, count 0 2006.229.06:53:29.93#ibcon#about to read 3, iclass 37, count 0 2006.229.06:53:29.95#ibcon#read 3, iclass 37, count 0 2006.229.06:53:29.95#ibcon#about to read 4, iclass 37, count 0 2006.229.06:53:29.95#ibcon#read 4, iclass 37, count 0 2006.229.06:53:29.95#ibcon#about to read 5, iclass 37, count 0 2006.229.06:53:29.95#ibcon#read 5, iclass 37, count 0 2006.229.06:53:29.95#ibcon#about to read 6, iclass 37, count 0 2006.229.06:53:29.95#ibcon#read 6, iclass 37, count 0 2006.229.06:53:29.95#ibcon#end of sib2, iclass 37, count 0 2006.229.06:53:29.95#ibcon#*mode == 0, iclass 37, count 0 2006.229.06:53:29.95#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.06:53:29.95#ibcon#[27=USB\r\n] 2006.229.06:53:29.95#ibcon#*before write, iclass 37, count 0 2006.229.06:53:29.95#ibcon#enter sib2, iclass 37, count 0 2006.229.06:53:29.95#ibcon#flushed, iclass 37, count 0 2006.229.06:53:29.95#ibcon#about to write, iclass 37, count 0 2006.229.06:53:29.95#ibcon#wrote, iclass 37, count 0 2006.229.06:53:29.95#ibcon#about to read 3, iclass 37, count 0 2006.229.06:53:29.98#ibcon#read 3, iclass 37, count 0 2006.229.06:53:29.98#ibcon#about to read 4, iclass 37, count 0 2006.229.06:53:29.98#ibcon#read 4, iclass 37, count 0 2006.229.06:53:29.98#ibcon#about to read 5, iclass 37, count 0 2006.229.06:53:29.98#ibcon#read 5, iclass 37, count 0 2006.229.06:53:29.98#ibcon#about to read 6, iclass 37, count 0 2006.229.06:53:29.98#ibcon#read 6, iclass 37, count 0 2006.229.06:53:29.98#ibcon#end of sib2, iclass 37, count 0 2006.229.06:53:29.98#ibcon#*after write, iclass 37, count 0 2006.229.06:53:29.98#ibcon#*before return 0, iclass 37, count 0 2006.229.06:53:29.98#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:29.98#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.06:53:29.98#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.06:53:29.98#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.06:53:29.98$vck44/vblo=4,679.99 2006.229.06:53:29.98#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.06:53:29.98#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.06:53:29.98#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:29.98#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:29.98#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:29.98#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:29.98#ibcon#enter wrdev, iclass 39, count 0 2006.229.06:53:29.98#ibcon#first serial, iclass 39, count 0 2006.229.06:53:29.98#ibcon#enter sib2, iclass 39, count 0 2006.229.06:53:29.98#ibcon#flushed, iclass 39, count 0 2006.229.06:53:29.98#ibcon#about to write, iclass 39, count 0 2006.229.06:53:29.98#ibcon#wrote, iclass 39, count 0 2006.229.06:53:29.98#ibcon#about to read 3, iclass 39, count 0 2006.229.06:53:30.00#ibcon#read 3, iclass 39, count 0 2006.229.06:53:30.00#ibcon#about to read 4, iclass 39, count 0 2006.229.06:53:30.00#ibcon#read 4, iclass 39, count 0 2006.229.06:53:30.00#ibcon#about to read 5, iclass 39, count 0 2006.229.06:53:30.00#ibcon#read 5, iclass 39, count 0 2006.229.06:53:30.00#ibcon#about to read 6, iclass 39, count 0 2006.229.06:53:30.00#ibcon#read 6, iclass 39, count 0 2006.229.06:53:30.00#ibcon#end of sib2, iclass 39, count 0 2006.229.06:53:30.00#ibcon#*mode == 0, iclass 39, count 0 2006.229.06:53:30.00#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.06:53:30.00#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.06:53:30.00#ibcon#*before write, iclass 39, count 0 2006.229.06:53:30.00#ibcon#enter sib2, iclass 39, count 0 2006.229.06:53:30.00#ibcon#flushed, iclass 39, count 0 2006.229.06:53:30.00#ibcon#about to write, iclass 39, count 0 2006.229.06:53:30.00#ibcon#wrote, iclass 39, count 0 2006.229.06:53:30.00#ibcon#about to read 3, iclass 39, count 0 2006.229.06:53:30.04#ibcon#read 3, iclass 39, count 0 2006.229.06:53:30.04#ibcon#about to read 4, iclass 39, count 0 2006.229.06:53:30.04#ibcon#read 4, iclass 39, count 0 2006.229.06:53:30.04#ibcon#about to read 5, iclass 39, count 0 2006.229.06:53:30.04#ibcon#read 5, iclass 39, count 0 2006.229.06:53:30.04#ibcon#about to read 6, iclass 39, count 0 2006.229.06:53:30.04#ibcon#read 6, iclass 39, count 0 2006.229.06:53:30.04#ibcon#end of sib2, iclass 39, count 0 2006.229.06:53:30.04#ibcon#*after write, iclass 39, count 0 2006.229.06:53:30.04#ibcon#*before return 0, iclass 39, count 0 2006.229.06:53:30.04#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:30.04#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.06:53:30.04#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.06:53:30.04#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.06:53:30.04$vck44/vb=4,4 2006.229.06:53:30.04#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.06:53:30.04#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.06:53:30.04#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:30.04#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:30.10#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:30.10#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:30.10#ibcon#enter wrdev, iclass 3, count 2 2006.229.06:53:30.10#ibcon#first serial, iclass 3, count 2 2006.229.06:53:30.10#ibcon#enter sib2, iclass 3, count 2 2006.229.06:53:30.10#ibcon#flushed, iclass 3, count 2 2006.229.06:53:30.10#ibcon#about to write, iclass 3, count 2 2006.229.06:53:30.10#ibcon#wrote, iclass 3, count 2 2006.229.06:53:30.10#ibcon#about to read 3, iclass 3, count 2 2006.229.06:53:30.12#ibcon#read 3, iclass 3, count 2 2006.229.06:53:30.12#ibcon#about to read 4, iclass 3, count 2 2006.229.06:53:30.12#ibcon#read 4, iclass 3, count 2 2006.229.06:53:30.12#ibcon#about to read 5, iclass 3, count 2 2006.229.06:53:30.12#ibcon#read 5, iclass 3, count 2 2006.229.06:53:30.12#ibcon#about to read 6, iclass 3, count 2 2006.229.06:53:30.12#ibcon#read 6, iclass 3, count 2 2006.229.06:53:30.12#ibcon#end of sib2, iclass 3, count 2 2006.229.06:53:30.12#ibcon#*mode == 0, iclass 3, count 2 2006.229.06:53:30.12#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.06:53:30.12#ibcon#[27=AT04-04\r\n] 2006.229.06:53:30.12#ibcon#*before write, iclass 3, count 2 2006.229.06:53:30.12#ibcon#enter sib2, iclass 3, count 2 2006.229.06:53:30.12#ibcon#flushed, iclass 3, count 2 2006.229.06:53:30.12#ibcon#about to write, iclass 3, count 2 2006.229.06:53:30.12#ibcon#wrote, iclass 3, count 2 2006.229.06:53:30.12#ibcon#about to read 3, iclass 3, count 2 2006.229.06:53:30.15#ibcon#read 3, iclass 3, count 2 2006.229.06:53:30.15#ibcon#about to read 4, iclass 3, count 2 2006.229.06:53:30.15#ibcon#read 4, iclass 3, count 2 2006.229.06:53:30.15#ibcon#about to read 5, iclass 3, count 2 2006.229.06:53:30.15#ibcon#read 5, iclass 3, count 2 2006.229.06:53:30.15#ibcon#about to read 6, iclass 3, count 2 2006.229.06:53:30.15#ibcon#read 6, iclass 3, count 2 2006.229.06:53:30.15#ibcon#end of sib2, iclass 3, count 2 2006.229.06:53:30.15#ibcon#*after write, iclass 3, count 2 2006.229.06:53:30.15#ibcon#*before return 0, iclass 3, count 2 2006.229.06:53:30.15#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:30.15#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.06:53:30.15#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.06:53:30.15#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:30.15#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:30.27#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:30.27#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:30.27#ibcon#enter wrdev, iclass 3, count 0 2006.229.06:53:30.27#ibcon#first serial, iclass 3, count 0 2006.229.06:53:30.27#ibcon#enter sib2, iclass 3, count 0 2006.229.06:53:30.27#ibcon#flushed, iclass 3, count 0 2006.229.06:53:30.27#ibcon#about to write, iclass 3, count 0 2006.229.06:53:30.27#ibcon#wrote, iclass 3, count 0 2006.229.06:53:30.27#ibcon#about to read 3, iclass 3, count 0 2006.229.06:53:30.29#ibcon#read 3, iclass 3, count 0 2006.229.06:53:30.29#ibcon#about to read 4, iclass 3, count 0 2006.229.06:53:30.29#ibcon#read 4, iclass 3, count 0 2006.229.06:53:30.29#ibcon#about to read 5, iclass 3, count 0 2006.229.06:53:30.29#ibcon#read 5, iclass 3, count 0 2006.229.06:53:30.29#ibcon#about to read 6, iclass 3, count 0 2006.229.06:53:30.29#ibcon#read 6, iclass 3, count 0 2006.229.06:53:30.29#ibcon#end of sib2, iclass 3, count 0 2006.229.06:53:30.29#ibcon#*mode == 0, iclass 3, count 0 2006.229.06:53:30.29#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.06:53:30.29#ibcon#[27=USB\r\n] 2006.229.06:53:30.29#ibcon#*before write, iclass 3, count 0 2006.229.06:53:30.29#ibcon#enter sib2, iclass 3, count 0 2006.229.06:53:30.29#ibcon#flushed, iclass 3, count 0 2006.229.06:53:30.29#ibcon#about to write, iclass 3, count 0 2006.229.06:53:30.29#ibcon#wrote, iclass 3, count 0 2006.229.06:53:30.29#ibcon#about to read 3, iclass 3, count 0 2006.229.06:53:30.32#ibcon#read 3, iclass 3, count 0 2006.229.06:53:30.32#ibcon#about to read 4, iclass 3, count 0 2006.229.06:53:30.32#ibcon#read 4, iclass 3, count 0 2006.229.06:53:30.32#ibcon#about to read 5, iclass 3, count 0 2006.229.06:53:30.32#ibcon#read 5, iclass 3, count 0 2006.229.06:53:30.32#ibcon#about to read 6, iclass 3, count 0 2006.229.06:53:30.32#ibcon#read 6, iclass 3, count 0 2006.229.06:53:30.32#ibcon#end of sib2, iclass 3, count 0 2006.229.06:53:30.32#ibcon#*after write, iclass 3, count 0 2006.229.06:53:30.32#ibcon#*before return 0, iclass 3, count 0 2006.229.06:53:30.32#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:30.32#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.06:53:30.32#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.06:53:30.32#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.06:53:30.32$vck44/vblo=5,709.99 2006.229.06:53:30.32#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.06:53:30.32#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.06:53:30.32#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:30.32#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:30.32#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:30.32#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:30.32#ibcon#enter wrdev, iclass 5, count 0 2006.229.06:53:30.32#ibcon#first serial, iclass 5, count 0 2006.229.06:53:30.32#ibcon#enter sib2, iclass 5, count 0 2006.229.06:53:30.32#ibcon#flushed, iclass 5, count 0 2006.229.06:53:30.32#ibcon#about to write, iclass 5, count 0 2006.229.06:53:30.32#ibcon#wrote, iclass 5, count 0 2006.229.06:53:30.32#ibcon#about to read 3, iclass 5, count 0 2006.229.06:53:30.34#ibcon#read 3, iclass 5, count 0 2006.229.06:53:30.34#ibcon#about to read 4, iclass 5, count 0 2006.229.06:53:30.34#ibcon#read 4, iclass 5, count 0 2006.229.06:53:30.34#ibcon#about to read 5, iclass 5, count 0 2006.229.06:53:30.34#ibcon#read 5, iclass 5, count 0 2006.229.06:53:30.34#ibcon#about to read 6, iclass 5, count 0 2006.229.06:53:30.34#ibcon#read 6, iclass 5, count 0 2006.229.06:53:30.34#ibcon#end of sib2, iclass 5, count 0 2006.229.06:53:30.34#ibcon#*mode == 0, iclass 5, count 0 2006.229.06:53:30.34#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.06:53:30.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.06:53:30.34#ibcon#*before write, iclass 5, count 0 2006.229.06:53:30.34#ibcon#enter sib2, iclass 5, count 0 2006.229.06:53:30.34#ibcon#flushed, iclass 5, count 0 2006.229.06:53:30.34#ibcon#about to write, iclass 5, count 0 2006.229.06:53:30.34#ibcon#wrote, iclass 5, count 0 2006.229.06:53:30.34#ibcon#about to read 3, iclass 5, count 0 2006.229.06:53:30.38#ibcon#read 3, iclass 5, count 0 2006.229.06:53:30.38#ibcon#about to read 4, iclass 5, count 0 2006.229.06:53:30.38#ibcon#read 4, iclass 5, count 0 2006.229.06:53:30.38#ibcon#about to read 5, iclass 5, count 0 2006.229.06:53:30.38#ibcon#read 5, iclass 5, count 0 2006.229.06:53:30.38#ibcon#about to read 6, iclass 5, count 0 2006.229.06:53:30.38#ibcon#read 6, iclass 5, count 0 2006.229.06:53:30.38#ibcon#end of sib2, iclass 5, count 0 2006.229.06:53:30.38#ibcon#*after write, iclass 5, count 0 2006.229.06:53:30.38#ibcon#*before return 0, iclass 5, count 0 2006.229.06:53:30.38#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:30.38#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.06:53:30.38#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.06:53:30.38#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.06:53:30.38$vck44/vb=5,4 2006.229.06:53:30.38#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.06:53:30.38#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.06:53:30.38#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:30.38#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:30.44#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:30.44#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:30.44#ibcon#enter wrdev, iclass 7, count 2 2006.229.06:53:30.44#ibcon#first serial, iclass 7, count 2 2006.229.06:53:30.44#ibcon#enter sib2, iclass 7, count 2 2006.229.06:53:30.44#ibcon#flushed, iclass 7, count 2 2006.229.06:53:30.44#ibcon#about to write, iclass 7, count 2 2006.229.06:53:30.44#ibcon#wrote, iclass 7, count 2 2006.229.06:53:30.44#ibcon#about to read 3, iclass 7, count 2 2006.229.06:53:30.46#ibcon#read 3, iclass 7, count 2 2006.229.06:53:30.46#ibcon#about to read 4, iclass 7, count 2 2006.229.06:53:30.46#ibcon#read 4, iclass 7, count 2 2006.229.06:53:30.46#ibcon#about to read 5, iclass 7, count 2 2006.229.06:53:30.46#ibcon#read 5, iclass 7, count 2 2006.229.06:53:30.46#ibcon#about to read 6, iclass 7, count 2 2006.229.06:53:30.46#ibcon#read 6, iclass 7, count 2 2006.229.06:53:30.46#ibcon#end of sib2, iclass 7, count 2 2006.229.06:53:30.46#ibcon#*mode == 0, iclass 7, count 2 2006.229.06:53:30.46#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.06:53:30.46#ibcon#[27=AT05-04\r\n] 2006.229.06:53:30.46#ibcon#*before write, iclass 7, count 2 2006.229.06:53:30.46#ibcon#enter sib2, iclass 7, count 2 2006.229.06:53:30.46#ibcon#flushed, iclass 7, count 2 2006.229.06:53:30.46#ibcon#about to write, iclass 7, count 2 2006.229.06:53:30.46#ibcon#wrote, iclass 7, count 2 2006.229.06:53:30.46#ibcon#about to read 3, iclass 7, count 2 2006.229.06:53:30.49#ibcon#read 3, iclass 7, count 2 2006.229.06:53:30.49#ibcon#about to read 4, iclass 7, count 2 2006.229.06:53:30.49#ibcon#read 4, iclass 7, count 2 2006.229.06:53:30.49#ibcon#about to read 5, iclass 7, count 2 2006.229.06:53:30.49#ibcon#read 5, iclass 7, count 2 2006.229.06:53:30.49#ibcon#about to read 6, iclass 7, count 2 2006.229.06:53:30.49#ibcon#read 6, iclass 7, count 2 2006.229.06:53:30.49#ibcon#end of sib2, iclass 7, count 2 2006.229.06:53:30.49#ibcon#*after write, iclass 7, count 2 2006.229.06:53:30.49#ibcon#*before return 0, iclass 7, count 2 2006.229.06:53:30.49#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:30.49#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.06:53:30.49#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.06:53:30.49#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:30.49#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:30.61#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:30.61#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:30.61#ibcon#enter wrdev, iclass 7, count 0 2006.229.06:53:30.61#ibcon#first serial, iclass 7, count 0 2006.229.06:53:30.61#ibcon#enter sib2, iclass 7, count 0 2006.229.06:53:30.61#ibcon#flushed, iclass 7, count 0 2006.229.06:53:30.61#ibcon#about to write, iclass 7, count 0 2006.229.06:53:30.61#ibcon#wrote, iclass 7, count 0 2006.229.06:53:30.61#ibcon#about to read 3, iclass 7, count 0 2006.229.06:53:30.63#ibcon#read 3, iclass 7, count 0 2006.229.06:53:30.63#ibcon#about to read 4, iclass 7, count 0 2006.229.06:53:30.63#ibcon#read 4, iclass 7, count 0 2006.229.06:53:30.63#ibcon#about to read 5, iclass 7, count 0 2006.229.06:53:30.63#ibcon#read 5, iclass 7, count 0 2006.229.06:53:30.63#ibcon#about to read 6, iclass 7, count 0 2006.229.06:53:30.63#ibcon#read 6, iclass 7, count 0 2006.229.06:53:30.63#ibcon#end of sib2, iclass 7, count 0 2006.229.06:53:30.63#ibcon#*mode == 0, iclass 7, count 0 2006.229.06:53:30.63#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.06:53:30.63#ibcon#[27=USB\r\n] 2006.229.06:53:30.63#ibcon#*before write, iclass 7, count 0 2006.229.06:53:30.63#ibcon#enter sib2, iclass 7, count 0 2006.229.06:53:30.63#ibcon#flushed, iclass 7, count 0 2006.229.06:53:30.63#ibcon#about to write, iclass 7, count 0 2006.229.06:53:30.63#ibcon#wrote, iclass 7, count 0 2006.229.06:53:30.63#ibcon#about to read 3, iclass 7, count 0 2006.229.06:53:30.66#ibcon#read 3, iclass 7, count 0 2006.229.06:53:30.66#ibcon#about to read 4, iclass 7, count 0 2006.229.06:53:30.66#ibcon#read 4, iclass 7, count 0 2006.229.06:53:30.66#ibcon#about to read 5, iclass 7, count 0 2006.229.06:53:30.66#ibcon#read 5, iclass 7, count 0 2006.229.06:53:30.66#ibcon#about to read 6, iclass 7, count 0 2006.229.06:53:30.66#ibcon#read 6, iclass 7, count 0 2006.229.06:53:30.66#ibcon#end of sib2, iclass 7, count 0 2006.229.06:53:30.66#ibcon#*after write, iclass 7, count 0 2006.229.06:53:30.66#ibcon#*before return 0, iclass 7, count 0 2006.229.06:53:30.66#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:30.66#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.06:53:30.66#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.06:53:30.66#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.06:53:30.66$vck44/vblo=6,719.99 2006.229.06:53:30.66#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.06:53:30.66#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.06:53:30.66#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:30.66#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:30.66#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:30.66#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:30.66#ibcon#enter wrdev, iclass 11, count 0 2006.229.06:53:30.66#ibcon#first serial, iclass 11, count 0 2006.229.06:53:30.66#ibcon#enter sib2, iclass 11, count 0 2006.229.06:53:30.66#ibcon#flushed, iclass 11, count 0 2006.229.06:53:30.66#ibcon#about to write, iclass 11, count 0 2006.229.06:53:30.67#ibcon#wrote, iclass 11, count 0 2006.229.06:53:30.67#ibcon#about to read 3, iclass 11, count 0 2006.229.06:53:30.68#ibcon#read 3, iclass 11, count 0 2006.229.06:53:30.68#ibcon#about to read 4, iclass 11, count 0 2006.229.06:53:30.68#ibcon#read 4, iclass 11, count 0 2006.229.06:53:30.68#ibcon#about to read 5, iclass 11, count 0 2006.229.06:53:30.68#ibcon#read 5, iclass 11, count 0 2006.229.06:53:30.68#ibcon#about to read 6, iclass 11, count 0 2006.229.06:53:30.68#ibcon#read 6, iclass 11, count 0 2006.229.06:53:30.68#ibcon#end of sib2, iclass 11, count 0 2006.229.06:53:30.68#ibcon#*mode == 0, iclass 11, count 0 2006.229.06:53:30.68#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.06:53:30.68#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.06:53:30.68#ibcon#*before write, iclass 11, count 0 2006.229.06:53:30.68#ibcon#enter sib2, iclass 11, count 0 2006.229.06:53:30.68#ibcon#flushed, iclass 11, count 0 2006.229.06:53:30.68#ibcon#about to write, iclass 11, count 0 2006.229.06:53:30.68#ibcon#wrote, iclass 11, count 0 2006.229.06:53:30.68#ibcon#about to read 3, iclass 11, count 0 2006.229.06:53:30.72#ibcon#read 3, iclass 11, count 0 2006.229.06:53:30.72#ibcon#about to read 4, iclass 11, count 0 2006.229.06:53:30.72#ibcon#read 4, iclass 11, count 0 2006.229.06:53:30.72#ibcon#about to read 5, iclass 11, count 0 2006.229.06:53:30.72#ibcon#read 5, iclass 11, count 0 2006.229.06:53:30.72#ibcon#about to read 6, iclass 11, count 0 2006.229.06:53:30.72#ibcon#read 6, iclass 11, count 0 2006.229.06:53:30.72#ibcon#end of sib2, iclass 11, count 0 2006.229.06:53:30.72#ibcon#*after write, iclass 11, count 0 2006.229.06:53:30.72#ibcon#*before return 0, iclass 11, count 0 2006.229.06:53:30.72#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:30.72#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.06:53:30.72#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.06:53:30.72#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.06:53:30.72$vck44/vb=6,4 2006.229.06:53:30.72#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.06:53:30.72#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.06:53:30.72#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:30.72#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:30.78#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:30.78#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:30.78#ibcon#enter wrdev, iclass 13, count 2 2006.229.06:53:30.78#ibcon#first serial, iclass 13, count 2 2006.229.06:53:30.78#ibcon#enter sib2, iclass 13, count 2 2006.229.06:53:30.78#ibcon#flushed, iclass 13, count 2 2006.229.06:53:30.78#ibcon#about to write, iclass 13, count 2 2006.229.06:53:30.78#ibcon#wrote, iclass 13, count 2 2006.229.06:53:30.78#ibcon#about to read 3, iclass 13, count 2 2006.229.06:53:30.80#ibcon#read 3, iclass 13, count 2 2006.229.06:53:30.80#ibcon#about to read 4, iclass 13, count 2 2006.229.06:53:30.80#ibcon#read 4, iclass 13, count 2 2006.229.06:53:30.80#ibcon#about to read 5, iclass 13, count 2 2006.229.06:53:30.80#ibcon#read 5, iclass 13, count 2 2006.229.06:53:30.80#ibcon#about to read 6, iclass 13, count 2 2006.229.06:53:30.80#ibcon#read 6, iclass 13, count 2 2006.229.06:53:30.80#ibcon#end of sib2, iclass 13, count 2 2006.229.06:53:30.80#ibcon#*mode == 0, iclass 13, count 2 2006.229.06:53:30.80#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.06:53:30.80#ibcon#[27=AT06-04\r\n] 2006.229.06:53:30.80#ibcon#*before write, iclass 13, count 2 2006.229.06:53:30.80#ibcon#enter sib2, iclass 13, count 2 2006.229.06:53:30.80#ibcon#flushed, iclass 13, count 2 2006.229.06:53:30.80#ibcon#about to write, iclass 13, count 2 2006.229.06:53:30.80#ibcon#wrote, iclass 13, count 2 2006.229.06:53:30.80#ibcon#about to read 3, iclass 13, count 2 2006.229.06:53:30.83#ibcon#read 3, iclass 13, count 2 2006.229.06:53:30.83#ibcon#about to read 4, iclass 13, count 2 2006.229.06:53:30.83#ibcon#read 4, iclass 13, count 2 2006.229.06:53:30.83#ibcon#about to read 5, iclass 13, count 2 2006.229.06:53:30.83#ibcon#read 5, iclass 13, count 2 2006.229.06:53:30.83#ibcon#about to read 6, iclass 13, count 2 2006.229.06:53:30.83#ibcon#read 6, iclass 13, count 2 2006.229.06:53:30.83#ibcon#end of sib2, iclass 13, count 2 2006.229.06:53:30.83#ibcon#*after write, iclass 13, count 2 2006.229.06:53:30.83#ibcon#*before return 0, iclass 13, count 2 2006.229.06:53:30.83#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:30.83#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.06:53:30.83#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.06:53:30.83#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:30.83#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:30.95#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:30.95#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:30.95#ibcon#enter wrdev, iclass 13, count 0 2006.229.06:53:30.95#ibcon#first serial, iclass 13, count 0 2006.229.06:53:30.95#ibcon#enter sib2, iclass 13, count 0 2006.229.06:53:30.95#ibcon#flushed, iclass 13, count 0 2006.229.06:53:30.95#ibcon#about to write, iclass 13, count 0 2006.229.06:53:30.95#ibcon#wrote, iclass 13, count 0 2006.229.06:53:30.95#ibcon#about to read 3, iclass 13, count 0 2006.229.06:53:30.97#ibcon#read 3, iclass 13, count 0 2006.229.06:53:30.97#ibcon#about to read 4, iclass 13, count 0 2006.229.06:53:30.97#ibcon#read 4, iclass 13, count 0 2006.229.06:53:30.97#ibcon#about to read 5, iclass 13, count 0 2006.229.06:53:30.97#ibcon#read 5, iclass 13, count 0 2006.229.06:53:30.97#ibcon#about to read 6, iclass 13, count 0 2006.229.06:53:30.97#ibcon#read 6, iclass 13, count 0 2006.229.06:53:30.97#ibcon#end of sib2, iclass 13, count 0 2006.229.06:53:30.97#ibcon#*mode == 0, iclass 13, count 0 2006.229.06:53:30.97#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.06:53:30.97#ibcon#[27=USB\r\n] 2006.229.06:53:30.97#ibcon#*before write, iclass 13, count 0 2006.229.06:53:30.97#ibcon#enter sib2, iclass 13, count 0 2006.229.06:53:30.97#ibcon#flushed, iclass 13, count 0 2006.229.06:53:30.97#ibcon#about to write, iclass 13, count 0 2006.229.06:53:30.97#ibcon#wrote, iclass 13, count 0 2006.229.06:53:30.97#ibcon#about to read 3, iclass 13, count 0 2006.229.06:53:31.00#ibcon#read 3, iclass 13, count 0 2006.229.06:53:31.00#ibcon#about to read 4, iclass 13, count 0 2006.229.06:53:31.00#ibcon#read 4, iclass 13, count 0 2006.229.06:53:31.00#ibcon#about to read 5, iclass 13, count 0 2006.229.06:53:31.00#ibcon#read 5, iclass 13, count 0 2006.229.06:53:31.00#ibcon#about to read 6, iclass 13, count 0 2006.229.06:53:31.00#ibcon#read 6, iclass 13, count 0 2006.229.06:53:31.00#ibcon#end of sib2, iclass 13, count 0 2006.229.06:53:31.00#ibcon#*after write, iclass 13, count 0 2006.229.06:53:31.00#ibcon#*before return 0, iclass 13, count 0 2006.229.06:53:31.00#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:31.00#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.06:53:31.00#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.06:53:31.00#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.06:53:31.00$vck44/vblo=7,734.99 2006.229.06:53:31.00#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.06:53:31.00#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.06:53:31.00#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:31.00#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:31.00#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:31.00#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:31.00#ibcon#enter wrdev, iclass 15, count 0 2006.229.06:53:31.00#ibcon#first serial, iclass 15, count 0 2006.229.06:53:31.00#ibcon#enter sib2, iclass 15, count 0 2006.229.06:53:31.00#ibcon#flushed, iclass 15, count 0 2006.229.06:53:31.01#ibcon#about to write, iclass 15, count 0 2006.229.06:53:31.01#ibcon#wrote, iclass 15, count 0 2006.229.06:53:31.01#ibcon#about to read 3, iclass 15, count 0 2006.229.06:53:31.02#ibcon#read 3, iclass 15, count 0 2006.229.06:53:31.02#ibcon#about to read 4, iclass 15, count 0 2006.229.06:53:31.02#ibcon#read 4, iclass 15, count 0 2006.229.06:53:31.02#ibcon#about to read 5, iclass 15, count 0 2006.229.06:53:31.02#ibcon#read 5, iclass 15, count 0 2006.229.06:53:31.02#ibcon#about to read 6, iclass 15, count 0 2006.229.06:53:31.02#ibcon#read 6, iclass 15, count 0 2006.229.06:53:31.02#ibcon#end of sib2, iclass 15, count 0 2006.229.06:53:31.02#ibcon#*mode == 0, iclass 15, count 0 2006.229.06:53:31.02#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.06:53:31.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.06:53:31.02#ibcon#*before write, iclass 15, count 0 2006.229.06:53:31.02#ibcon#enter sib2, iclass 15, count 0 2006.229.06:53:31.02#ibcon#flushed, iclass 15, count 0 2006.229.06:53:31.02#ibcon#about to write, iclass 15, count 0 2006.229.06:53:31.02#ibcon#wrote, iclass 15, count 0 2006.229.06:53:31.02#ibcon#about to read 3, iclass 15, count 0 2006.229.06:53:31.06#ibcon#read 3, iclass 15, count 0 2006.229.06:53:31.06#ibcon#about to read 4, iclass 15, count 0 2006.229.06:53:31.06#ibcon#read 4, iclass 15, count 0 2006.229.06:53:31.06#ibcon#about to read 5, iclass 15, count 0 2006.229.06:53:31.06#ibcon#read 5, iclass 15, count 0 2006.229.06:53:31.06#ibcon#about to read 6, iclass 15, count 0 2006.229.06:53:31.06#ibcon#read 6, iclass 15, count 0 2006.229.06:53:31.06#ibcon#end of sib2, iclass 15, count 0 2006.229.06:53:31.06#ibcon#*after write, iclass 15, count 0 2006.229.06:53:31.06#ibcon#*before return 0, iclass 15, count 0 2006.229.06:53:31.06#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:31.06#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.06:53:31.06#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.06:53:31.06#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.06:53:31.06$vck44/vb=7,4 2006.229.06:53:31.06#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.06:53:31.06#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.06:53:31.06#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:31.06#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:31.12#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:31.12#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:31.12#ibcon#enter wrdev, iclass 17, count 2 2006.229.06:53:31.12#ibcon#first serial, iclass 17, count 2 2006.229.06:53:31.12#ibcon#enter sib2, iclass 17, count 2 2006.229.06:53:31.12#ibcon#flushed, iclass 17, count 2 2006.229.06:53:31.12#ibcon#about to write, iclass 17, count 2 2006.229.06:53:31.12#ibcon#wrote, iclass 17, count 2 2006.229.06:53:31.12#ibcon#about to read 3, iclass 17, count 2 2006.229.06:53:31.14#ibcon#read 3, iclass 17, count 2 2006.229.06:53:31.14#ibcon#about to read 4, iclass 17, count 2 2006.229.06:53:31.14#ibcon#read 4, iclass 17, count 2 2006.229.06:53:31.14#ibcon#about to read 5, iclass 17, count 2 2006.229.06:53:31.14#ibcon#read 5, iclass 17, count 2 2006.229.06:53:31.14#ibcon#about to read 6, iclass 17, count 2 2006.229.06:53:31.14#ibcon#read 6, iclass 17, count 2 2006.229.06:53:31.14#ibcon#end of sib2, iclass 17, count 2 2006.229.06:53:31.14#ibcon#*mode == 0, iclass 17, count 2 2006.229.06:53:31.14#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.06:53:31.14#ibcon#[27=AT07-04\r\n] 2006.229.06:53:31.14#ibcon#*before write, iclass 17, count 2 2006.229.06:53:31.14#ibcon#enter sib2, iclass 17, count 2 2006.229.06:53:31.14#ibcon#flushed, iclass 17, count 2 2006.229.06:53:31.14#ibcon#about to write, iclass 17, count 2 2006.229.06:53:31.14#ibcon#wrote, iclass 17, count 2 2006.229.06:53:31.14#ibcon#about to read 3, iclass 17, count 2 2006.229.06:53:31.17#ibcon#read 3, iclass 17, count 2 2006.229.06:53:31.17#ibcon#about to read 4, iclass 17, count 2 2006.229.06:53:31.17#ibcon#read 4, iclass 17, count 2 2006.229.06:53:31.17#ibcon#about to read 5, iclass 17, count 2 2006.229.06:53:31.17#ibcon#read 5, iclass 17, count 2 2006.229.06:53:31.17#ibcon#about to read 6, iclass 17, count 2 2006.229.06:53:31.17#ibcon#read 6, iclass 17, count 2 2006.229.06:53:31.17#ibcon#end of sib2, iclass 17, count 2 2006.229.06:53:31.17#ibcon#*after write, iclass 17, count 2 2006.229.06:53:31.17#ibcon#*before return 0, iclass 17, count 2 2006.229.06:53:31.17#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:31.17#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.06:53:31.17#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.06:53:31.17#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:31.17#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:31.29#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:31.29#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:31.29#ibcon#enter wrdev, iclass 17, count 0 2006.229.06:53:31.29#ibcon#first serial, iclass 17, count 0 2006.229.06:53:31.29#ibcon#enter sib2, iclass 17, count 0 2006.229.06:53:31.29#ibcon#flushed, iclass 17, count 0 2006.229.06:53:31.29#ibcon#about to write, iclass 17, count 0 2006.229.06:53:31.29#ibcon#wrote, iclass 17, count 0 2006.229.06:53:31.29#ibcon#about to read 3, iclass 17, count 0 2006.229.06:53:31.31#ibcon#read 3, iclass 17, count 0 2006.229.06:53:31.31#ibcon#about to read 4, iclass 17, count 0 2006.229.06:53:31.31#ibcon#read 4, iclass 17, count 0 2006.229.06:53:31.31#ibcon#about to read 5, iclass 17, count 0 2006.229.06:53:31.31#ibcon#read 5, iclass 17, count 0 2006.229.06:53:31.31#ibcon#about to read 6, iclass 17, count 0 2006.229.06:53:31.31#ibcon#read 6, iclass 17, count 0 2006.229.06:53:31.31#ibcon#end of sib2, iclass 17, count 0 2006.229.06:53:31.31#ibcon#*mode == 0, iclass 17, count 0 2006.229.06:53:31.31#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.06:53:31.31#ibcon#[27=USB\r\n] 2006.229.06:53:31.31#ibcon#*before write, iclass 17, count 0 2006.229.06:53:31.31#ibcon#enter sib2, iclass 17, count 0 2006.229.06:53:31.31#ibcon#flushed, iclass 17, count 0 2006.229.06:53:31.31#ibcon#about to write, iclass 17, count 0 2006.229.06:53:31.31#ibcon#wrote, iclass 17, count 0 2006.229.06:53:31.31#ibcon#about to read 3, iclass 17, count 0 2006.229.06:53:31.34#ibcon#read 3, iclass 17, count 0 2006.229.06:53:31.34#ibcon#about to read 4, iclass 17, count 0 2006.229.06:53:31.34#ibcon#read 4, iclass 17, count 0 2006.229.06:53:31.34#ibcon#about to read 5, iclass 17, count 0 2006.229.06:53:31.34#ibcon#read 5, iclass 17, count 0 2006.229.06:53:31.34#ibcon#about to read 6, iclass 17, count 0 2006.229.06:53:31.34#ibcon#read 6, iclass 17, count 0 2006.229.06:53:31.34#ibcon#end of sib2, iclass 17, count 0 2006.229.06:53:31.34#ibcon#*after write, iclass 17, count 0 2006.229.06:53:31.34#ibcon#*before return 0, iclass 17, count 0 2006.229.06:53:31.34#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:31.34#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.06:53:31.34#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.06:53:31.34#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.06:53:31.34$vck44/vblo=8,744.99 2006.229.06:53:31.34#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.06:53:31.34#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.06:53:31.34#ibcon#ireg 17 cls_cnt 0 2006.229.06:53:31.34#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:31.34#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:31.34#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:31.34#ibcon#enter wrdev, iclass 19, count 0 2006.229.06:53:31.34#ibcon#first serial, iclass 19, count 0 2006.229.06:53:31.34#ibcon#enter sib2, iclass 19, count 0 2006.229.06:53:31.34#ibcon#flushed, iclass 19, count 0 2006.229.06:53:31.34#ibcon#about to write, iclass 19, count 0 2006.229.06:53:31.34#ibcon#wrote, iclass 19, count 0 2006.229.06:53:31.34#ibcon#about to read 3, iclass 19, count 0 2006.229.06:53:31.36#ibcon#read 3, iclass 19, count 0 2006.229.06:53:31.36#ibcon#about to read 4, iclass 19, count 0 2006.229.06:53:31.36#ibcon#read 4, iclass 19, count 0 2006.229.06:53:31.36#ibcon#about to read 5, iclass 19, count 0 2006.229.06:53:31.36#ibcon#read 5, iclass 19, count 0 2006.229.06:53:31.36#ibcon#about to read 6, iclass 19, count 0 2006.229.06:53:31.36#ibcon#read 6, iclass 19, count 0 2006.229.06:53:31.36#ibcon#end of sib2, iclass 19, count 0 2006.229.06:53:31.36#ibcon#*mode == 0, iclass 19, count 0 2006.229.06:53:31.36#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.06:53:31.36#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.06:53:31.36#ibcon#*before write, iclass 19, count 0 2006.229.06:53:31.36#ibcon#enter sib2, iclass 19, count 0 2006.229.06:53:31.36#ibcon#flushed, iclass 19, count 0 2006.229.06:53:31.36#ibcon#about to write, iclass 19, count 0 2006.229.06:53:31.36#ibcon#wrote, iclass 19, count 0 2006.229.06:53:31.36#ibcon#about to read 3, iclass 19, count 0 2006.229.06:53:31.40#ibcon#read 3, iclass 19, count 0 2006.229.06:53:31.40#ibcon#about to read 4, iclass 19, count 0 2006.229.06:53:31.40#ibcon#read 4, iclass 19, count 0 2006.229.06:53:31.40#ibcon#about to read 5, iclass 19, count 0 2006.229.06:53:31.40#ibcon#read 5, iclass 19, count 0 2006.229.06:53:31.40#ibcon#about to read 6, iclass 19, count 0 2006.229.06:53:31.40#ibcon#read 6, iclass 19, count 0 2006.229.06:53:31.40#ibcon#end of sib2, iclass 19, count 0 2006.229.06:53:31.40#ibcon#*after write, iclass 19, count 0 2006.229.06:53:31.40#ibcon#*before return 0, iclass 19, count 0 2006.229.06:53:31.40#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:31.40#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.06:53:31.40#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.06:53:31.40#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.06:53:31.40$vck44/vb=8,4 2006.229.06:53:31.40#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.06:53:31.40#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.06:53:31.40#ibcon#ireg 11 cls_cnt 2 2006.229.06:53:31.40#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:31.46#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:31.46#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:31.46#ibcon#enter wrdev, iclass 21, count 2 2006.229.06:53:31.46#ibcon#first serial, iclass 21, count 2 2006.229.06:53:31.46#ibcon#enter sib2, iclass 21, count 2 2006.229.06:53:31.46#ibcon#flushed, iclass 21, count 2 2006.229.06:53:31.46#ibcon#about to write, iclass 21, count 2 2006.229.06:53:31.46#ibcon#wrote, iclass 21, count 2 2006.229.06:53:31.46#ibcon#about to read 3, iclass 21, count 2 2006.229.06:53:31.48#ibcon#read 3, iclass 21, count 2 2006.229.06:53:31.48#ibcon#about to read 4, iclass 21, count 2 2006.229.06:53:31.48#ibcon#read 4, iclass 21, count 2 2006.229.06:53:31.48#ibcon#about to read 5, iclass 21, count 2 2006.229.06:53:31.48#ibcon#read 5, iclass 21, count 2 2006.229.06:53:31.48#ibcon#about to read 6, iclass 21, count 2 2006.229.06:53:31.48#ibcon#read 6, iclass 21, count 2 2006.229.06:53:31.48#ibcon#end of sib2, iclass 21, count 2 2006.229.06:53:31.48#ibcon#*mode == 0, iclass 21, count 2 2006.229.06:53:31.48#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.06:53:31.48#ibcon#[27=AT08-04\r\n] 2006.229.06:53:31.48#ibcon#*before write, iclass 21, count 2 2006.229.06:53:31.48#ibcon#enter sib2, iclass 21, count 2 2006.229.06:53:31.48#ibcon#flushed, iclass 21, count 2 2006.229.06:53:31.48#ibcon#about to write, iclass 21, count 2 2006.229.06:53:31.48#ibcon#wrote, iclass 21, count 2 2006.229.06:53:31.48#ibcon#about to read 3, iclass 21, count 2 2006.229.06:53:31.51#ibcon#read 3, iclass 21, count 2 2006.229.06:53:31.51#ibcon#about to read 4, iclass 21, count 2 2006.229.06:53:31.51#ibcon#read 4, iclass 21, count 2 2006.229.06:53:31.51#ibcon#about to read 5, iclass 21, count 2 2006.229.06:53:31.51#ibcon#read 5, iclass 21, count 2 2006.229.06:53:31.51#ibcon#about to read 6, iclass 21, count 2 2006.229.06:53:31.51#ibcon#read 6, iclass 21, count 2 2006.229.06:53:31.51#ibcon#end of sib2, iclass 21, count 2 2006.229.06:53:31.51#ibcon#*after write, iclass 21, count 2 2006.229.06:53:31.51#ibcon#*before return 0, iclass 21, count 2 2006.229.06:53:31.51#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:31.51#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.06:53:31.51#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.06:53:31.51#ibcon#ireg 7 cls_cnt 0 2006.229.06:53:31.51#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:31.63#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:31.63#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:31.63#ibcon#enter wrdev, iclass 21, count 0 2006.229.06:53:31.63#ibcon#first serial, iclass 21, count 0 2006.229.06:53:31.63#ibcon#enter sib2, iclass 21, count 0 2006.229.06:53:31.63#ibcon#flushed, iclass 21, count 0 2006.229.06:53:31.63#ibcon#about to write, iclass 21, count 0 2006.229.06:53:31.63#ibcon#wrote, iclass 21, count 0 2006.229.06:53:31.63#ibcon#about to read 3, iclass 21, count 0 2006.229.06:53:31.65#ibcon#read 3, iclass 21, count 0 2006.229.06:53:31.65#ibcon#about to read 4, iclass 21, count 0 2006.229.06:53:31.65#ibcon#read 4, iclass 21, count 0 2006.229.06:53:31.65#ibcon#about to read 5, iclass 21, count 0 2006.229.06:53:31.65#ibcon#read 5, iclass 21, count 0 2006.229.06:53:31.65#ibcon#about to read 6, iclass 21, count 0 2006.229.06:53:31.65#ibcon#read 6, iclass 21, count 0 2006.229.06:53:31.65#ibcon#end of sib2, iclass 21, count 0 2006.229.06:53:31.65#ibcon#*mode == 0, iclass 21, count 0 2006.229.06:53:31.65#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.06:53:31.65#ibcon#[27=USB\r\n] 2006.229.06:53:31.65#ibcon#*before write, iclass 21, count 0 2006.229.06:53:31.65#ibcon#enter sib2, iclass 21, count 0 2006.229.06:53:31.65#ibcon#flushed, iclass 21, count 0 2006.229.06:53:31.65#ibcon#about to write, iclass 21, count 0 2006.229.06:53:31.65#ibcon#wrote, iclass 21, count 0 2006.229.06:53:31.65#ibcon#about to read 3, iclass 21, count 0 2006.229.06:53:31.68#ibcon#read 3, iclass 21, count 0 2006.229.06:53:31.68#ibcon#about to read 4, iclass 21, count 0 2006.229.06:53:31.68#ibcon#read 4, iclass 21, count 0 2006.229.06:53:31.68#ibcon#about to read 5, iclass 21, count 0 2006.229.06:53:31.68#ibcon#read 5, iclass 21, count 0 2006.229.06:53:31.68#ibcon#about to read 6, iclass 21, count 0 2006.229.06:53:31.68#ibcon#read 6, iclass 21, count 0 2006.229.06:53:31.68#ibcon#end of sib2, iclass 21, count 0 2006.229.06:53:31.68#ibcon#*after write, iclass 21, count 0 2006.229.06:53:31.68#ibcon#*before return 0, iclass 21, count 0 2006.229.06:53:31.68#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:31.68#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.06:53:31.68#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.06:53:31.68#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.06:53:31.68$vck44/vabw=wide 2006.229.06:53:31.68#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.06:53:31.68#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.06:53:31.68#ibcon#ireg 8 cls_cnt 0 2006.229.06:53:31.68#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:31.68#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:31.68#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:31.68#ibcon#enter wrdev, iclass 23, count 0 2006.229.06:53:31.68#ibcon#first serial, iclass 23, count 0 2006.229.06:53:31.68#ibcon#enter sib2, iclass 23, count 0 2006.229.06:53:31.68#ibcon#flushed, iclass 23, count 0 2006.229.06:53:31.68#ibcon#about to write, iclass 23, count 0 2006.229.06:53:31.68#ibcon#wrote, iclass 23, count 0 2006.229.06:53:31.68#ibcon#about to read 3, iclass 23, count 0 2006.229.06:53:31.70#ibcon#read 3, iclass 23, count 0 2006.229.06:53:31.70#ibcon#about to read 4, iclass 23, count 0 2006.229.06:53:31.70#ibcon#read 4, iclass 23, count 0 2006.229.06:53:31.70#ibcon#about to read 5, iclass 23, count 0 2006.229.06:53:31.70#ibcon#read 5, iclass 23, count 0 2006.229.06:53:31.70#ibcon#about to read 6, iclass 23, count 0 2006.229.06:53:31.70#ibcon#read 6, iclass 23, count 0 2006.229.06:53:31.70#ibcon#end of sib2, iclass 23, count 0 2006.229.06:53:31.70#ibcon#*mode == 0, iclass 23, count 0 2006.229.06:53:31.70#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.06:53:31.70#ibcon#[25=BW32\r\n] 2006.229.06:53:31.70#ibcon#*before write, iclass 23, count 0 2006.229.06:53:31.70#ibcon#enter sib2, iclass 23, count 0 2006.229.06:53:31.70#ibcon#flushed, iclass 23, count 0 2006.229.06:53:31.70#ibcon#about to write, iclass 23, count 0 2006.229.06:53:31.70#ibcon#wrote, iclass 23, count 0 2006.229.06:53:31.70#ibcon#about to read 3, iclass 23, count 0 2006.229.06:53:31.73#ibcon#read 3, iclass 23, count 0 2006.229.06:53:31.73#ibcon#about to read 4, iclass 23, count 0 2006.229.06:53:31.73#ibcon#read 4, iclass 23, count 0 2006.229.06:53:31.73#ibcon#about to read 5, iclass 23, count 0 2006.229.06:53:31.73#ibcon#read 5, iclass 23, count 0 2006.229.06:53:31.73#ibcon#about to read 6, iclass 23, count 0 2006.229.06:53:31.73#ibcon#read 6, iclass 23, count 0 2006.229.06:53:31.73#ibcon#end of sib2, iclass 23, count 0 2006.229.06:53:31.73#ibcon#*after write, iclass 23, count 0 2006.229.06:53:31.73#ibcon#*before return 0, iclass 23, count 0 2006.229.06:53:31.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:31.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.06:53:31.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.06:53:31.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.06:53:31.73$vck44/vbbw=wide 2006.229.06:53:31.73#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.06:53:31.73#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.06:53:31.73#ibcon#ireg 8 cls_cnt 0 2006.229.06:53:31.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:53:31.80#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:53:31.80#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:53:31.80#ibcon#enter wrdev, iclass 25, count 0 2006.229.06:53:31.80#ibcon#first serial, iclass 25, count 0 2006.229.06:53:31.80#ibcon#enter sib2, iclass 25, count 0 2006.229.06:53:31.80#ibcon#flushed, iclass 25, count 0 2006.229.06:53:31.80#ibcon#about to write, iclass 25, count 0 2006.229.06:53:31.80#ibcon#wrote, iclass 25, count 0 2006.229.06:53:31.80#ibcon#about to read 3, iclass 25, count 0 2006.229.06:53:31.82#ibcon#read 3, iclass 25, count 0 2006.229.06:53:31.82#ibcon#about to read 4, iclass 25, count 0 2006.229.06:53:31.82#ibcon#read 4, iclass 25, count 0 2006.229.06:53:31.82#ibcon#about to read 5, iclass 25, count 0 2006.229.06:53:31.82#ibcon#read 5, iclass 25, count 0 2006.229.06:53:31.82#ibcon#about to read 6, iclass 25, count 0 2006.229.06:53:31.82#ibcon#read 6, iclass 25, count 0 2006.229.06:53:31.82#ibcon#end of sib2, iclass 25, count 0 2006.229.06:53:31.82#ibcon#*mode == 0, iclass 25, count 0 2006.229.06:53:31.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.06:53:31.82#ibcon#[27=BW32\r\n] 2006.229.06:53:31.82#ibcon#*before write, iclass 25, count 0 2006.229.06:53:31.82#ibcon#enter sib2, iclass 25, count 0 2006.229.06:53:31.82#ibcon#flushed, iclass 25, count 0 2006.229.06:53:31.82#ibcon#about to write, iclass 25, count 0 2006.229.06:53:31.82#ibcon#wrote, iclass 25, count 0 2006.229.06:53:31.82#ibcon#about to read 3, iclass 25, count 0 2006.229.06:53:31.85#ibcon#read 3, iclass 25, count 0 2006.229.06:53:31.85#ibcon#about to read 4, iclass 25, count 0 2006.229.06:53:31.85#ibcon#read 4, iclass 25, count 0 2006.229.06:53:31.85#ibcon#about to read 5, iclass 25, count 0 2006.229.06:53:31.85#ibcon#read 5, iclass 25, count 0 2006.229.06:53:31.85#ibcon#about to read 6, iclass 25, count 0 2006.229.06:53:31.85#ibcon#read 6, iclass 25, count 0 2006.229.06:53:31.85#ibcon#end of sib2, iclass 25, count 0 2006.229.06:53:31.85#ibcon#*after write, iclass 25, count 0 2006.229.06:53:31.85#ibcon#*before return 0, iclass 25, count 0 2006.229.06:53:31.85#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:53:31.85#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.06:53:31.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.06:53:31.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.06:53:31.85$setupk4/ifdk4 2006.229.06:53:31.85$ifdk4/lo= 2006.229.06:53:31.86$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.06:53:31.86$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.06:53:31.86$ifdk4/patch= 2006.229.06:53:31.86$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.06:53:31.86$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.06:53:31.86$setupk4/!*+20s 2006.229.06:53:33.34#abcon#<5=/05 2.6 5.7 30.16 94 999.9\r\n> 2006.229.06:53:33.36#abcon#{5=INTERFACE CLEAR} 2006.229.06:53:33.42#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:53:43.60#abcon#<5=/05 2.6 5.7 30.16 94 999.9\r\n> 2006.229.06:53:43.62#abcon#{5=INTERFACE CLEAR} 2006.229.06:53:43.68#abcon#[5=S1D000X0/0*\r\n] 2006.229.06:53:46.36$setupk4/"tpicd 2006.229.06:53:46.36$setupk4/echo=off 2006.229.06:53:46.36$setupk4/xlog=off 2006.229.06:53:46.36:!2006.229.06:57:02 2006.229.06:54:36.14#trakl#Source acquired 2006.229.06:54:36.14#flagr#flagr/antenna,acquired 2006.229.06:57:02.00:preob 2006.229.06:57:02.14/onsource/TRACKING 2006.229.06:57:02.14:!2006.229.06:57:12 2006.229.06:57:12.00:"tape 2006.229.06:57:12.00:"st=record 2006.229.06:57:12.00:data_valid=on 2006.229.06:57:12.00:midob 2006.229.06:57:12.14/onsource/TRACKING 2006.229.06:57:12.14/wx/30.14,999.9,92 2006.229.06:57:12.22/cable/+6.3954E-03 2006.229.06:57:13.31/va/01,08,usb,yes,44,47 2006.229.06:57:13.31/va/02,07,usb,yes,47,48 2006.229.06:57:13.31/va/03,06,usb,yes,57,61 2006.229.06:57:13.31/va/04,07,usb,yes,48,51 2006.229.06:57:13.31/va/05,04,usb,yes,43,44 2006.229.06:57:13.31/va/06,04,usb,yes,48,48 2006.229.06:57:13.31/va/07,05,usb,yes,43,44 2006.229.06:57:13.31/va/08,06,usb,yes,32,39 2006.229.06:57:13.54/valo/01,524.99,yes,locked 2006.229.06:57:13.54/valo/02,534.99,yes,locked 2006.229.06:57:13.54/valo/03,564.99,yes,locked 2006.229.06:57:13.54/valo/04,624.99,yes,locked 2006.229.06:57:13.54/valo/05,734.99,yes,locked 2006.229.06:57:13.54/valo/06,814.99,yes,locked 2006.229.06:57:13.54/valo/07,864.99,yes,locked 2006.229.06:57:13.54/valo/08,884.99,yes,locked 2006.229.06:57:14.63/vb/01,04,usb,yes,37,48 2006.229.06:57:14.63/vb/02,04,usb,yes,40,54 2006.229.06:57:14.63/vb/03,04,usb,yes,37,42 2006.229.06:57:14.63/vb/04,04,usb,yes,42,40 2006.229.06:57:14.63/vb/05,04,usb,yes,34,36 2006.229.06:57:14.63/vb/06,04,usb,yes,39,35 2006.229.06:57:14.63/vb/07,04,usb,yes,38,39 2006.229.06:57:14.63/vb/08,04,usb,yes,35,39 2006.229.06:57:14.86/vblo/01,629.99,yes,locked 2006.229.06:57:14.86/vblo/02,634.99,yes,locked 2006.229.06:57:14.86/vblo/03,649.99,yes,locked 2006.229.06:57:14.86/vblo/04,679.99,yes,locked 2006.229.06:57:14.86/vblo/05,709.99,yes,locked 2006.229.06:57:14.86/vblo/06,719.99,yes,locked 2006.229.06:57:14.86/vblo/07,734.99,yes,locked 2006.229.06:57:14.86/vblo/08,744.99,yes,locked 2006.229.06:57:15.01/vabw/8 2006.229.06:57:15.16/vbbw/8 2006.229.06:57:15.25/xfe/off,on,12.0 2006.229.06:57:15.64/ifatt/23,28,28,28 2006.229.06:57:16.07/fmout-gps/S +4.51E-07 2006.229.06:57:16.11:!2006.229.07:01:42 2006.229.07:01:42.00:data_valid=off 2006.229.07:01:42.00:"et 2006.229.07:01:42.00:!+3s 2006.229.07:01:45.01:"tape 2006.229.07:01:45.01:postob 2006.229.07:01:45.11/cable/+6.3988E-03 2006.229.07:01:45.11/wx/30.11,1000.0,92 2006.229.07:01:46.07/fmout-gps/S +4.56E-07 2006.229.07:01:46.07:scan_name=229-0702,jd0608,270 2006.229.07:01:46.07:source=1803+784,180045.68,782804.0,2000.0,cw 2006.229.07:01:46.14#flagr#flagr/antenna,new-source 2006.229.07:01:47.14:checkk5 2006.229.07:01:47.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:01:47.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:01:48.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:01:48.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:01:49.13/chk_obsdata//k5ts1/T2290657??a.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:01:49.54/chk_obsdata//k5ts2/T2290657??b.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:01:49.93/chk_obsdata//k5ts3/T2290657??c.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:01:50.33/chk_obsdata//k5ts4/T2290657??d.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:01:51.05/k5log//k5ts1_log_newline 2006.229.07:01:51.75/k5log//k5ts2_log_newline 2006.229.07:01:52.46/k5log//k5ts3_log_newline 2006.229.07:01:53.19/k5log//k5ts4_log_newline 2006.229.07:01:53.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:01:53.22:setupk4=1 2006.229.07:01:53.22$setupk4/echo=on 2006.229.07:01:53.22$setupk4/pcalon 2006.229.07:01:53.22$pcalon/"no phase cal control is implemented here 2006.229.07:01:53.22$setupk4/"tpicd=stop 2006.229.07:01:53.22$setupk4/"rec=synch_on 2006.229.07:01:53.22$setupk4/"rec_mode=128 2006.229.07:01:53.22$setupk4/!* 2006.229.07:01:53.22$setupk4/recpk4 2006.229.07:01:53.22$recpk4/recpatch= 2006.229.07:01:53.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:01:53.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:01:53.22$setupk4/vck44 2006.229.07:01:53.22$vck44/valo=1,524.99 2006.229.07:01:53.22#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.07:01:53.22#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.07:01:53.22#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:53.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:53.22#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:53.22#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:53.22#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:01:53.22#ibcon#first serial, iclass 14, count 0 2006.229.07:01:53.22#ibcon#enter sib2, iclass 14, count 0 2006.229.07:01:53.22#ibcon#flushed, iclass 14, count 0 2006.229.07:01:53.22#ibcon#about to write, iclass 14, count 0 2006.229.07:01:53.23#ibcon#wrote, iclass 14, count 0 2006.229.07:01:53.23#ibcon#about to read 3, iclass 14, count 0 2006.229.07:01:53.24#ibcon#read 3, iclass 14, count 0 2006.229.07:01:53.24#ibcon#about to read 4, iclass 14, count 0 2006.229.07:01:53.24#ibcon#read 4, iclass 14, count 0 2006.229.07:01:53.24#ibcon#about to read 5, iclass 14, count 0 2006.229.07:01:53.24#ibcon#read 5, iclass 14, count 0 2006.229.07:01:53.24#ibcon#about to read 6, iclass 14, count 0 2006.229.07:01:53.24#ibcon#read 6, iclass 14, count 0 2006.229.07:01:53.24#ibcon#end of sib2, iclass 14, count 0 2006.229.07:01:53.24#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:01:53.24#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:01:53.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:01:53.24#ibcon#*before write, iclass 14, count 0 2006.229.07:01:53.24#ibcon#enter sib2, iclass 14, count 0 2006.229.07:01:53.24#ibcon#flushed, iclass 14, count 0 2006.229.07:01:53.24#ibcon#about to write, iclass 14, count 0 2006.229.07:01:53.24#ibcon#wrote, iclass 14, count 0 2006.229.07:01:53.24#ibcon#about to read 3, iclass 14, count 0 2006.229.07:01:53.29#ibcon#read 3, iclass 14, count 0 2006.229.07:01:53.29#ibcon#about to read 4, iclass 14, count 0 2006.229.07:01:53.29#ibcon#read 4, iclass 14, count 0 2006.229.07:01:53.29#ibcon#about to read 5, iclass 14, count 0 2006.229.07:01:53.29#ibcon#read 5, iclass 14, count 0 2006.229.07:01:53.29#ibcon#about to read 6, iclass 14, count 0 2006.229.07:01:53.29#ibcon#read 6, iclass 14, count 0 2006.229.07:01:53.29#ibcon#end of sib2, iclass 14, count 0 2006.229.07:01:53.29#ibcon#*after write, iclass 14, count 0 2006.229.07:01:53.29#ibcon#*before return 0, iclass 14, count 0 2006.229.07:01:53.29#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:53.29#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:53.29#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:01:53.29#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:01:53.29$vck44/va=1,8 2006.229.07:01:53.29#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.07:01:53.29#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.07:01:53.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:53.29#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:53.29#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:53.29#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:53.29#ibcon#enter wrdev, iclass 16, count 2 2006.229.07:01:53.29#ibcon#first serial, iclass 16, count 2 2006.229.07:01:53.29#ibcon#enter sib2, iclass 16, count 2 2006.229.07:01:53.29#ibcon#flushed, iclass 16, count 2 2006.229.07:01:53.29#ibcon#about to write, iclass 16, count 2 2006.229.07:01:53.29#ibcon#wrote, iclass 16, count 2 2006.229.07:01:53.29#ibcon#about to read 3, iclass 16, count 2 2006.229.07:01:53.31#ibcon#read 3, iclass 16, count 2 2006.229.07:01:53.31#ibcon#about to read 4, iclass 16, count 2 2006.229.07:01:53.31#ibcon#read 4, iclass 16, count 2 2006.229.07:01:53.31#ibcon#about to read 5, iclass 16, count 2 2006.229.07:01:53.31#ibcon#read 5, iclass 16, count 2 2006.229.07:01:53.31#ibcon#about to read 6, iclass 16, count 2 2006.229.07:01:53.31#ibcon#read 6, iclass 16, count 2 2006.229.07:01:53.31#ibcon#end of sib2, iclass 16, count 2 2006.229.07:01:53.31#ibcon#*mode == 0, iclass 16, count 2 2006.229.07:01:53.31#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.07:01:53.31#ibcon#[25=AT01-08\r\n] 2006.229.07:01:53.31#ibcon#*before write, iclass 16, count 2 2006.229.07:01:53.31#ibcon#enter sib2, iclass 16, count 2 2006.229.07:01:53.31#ibcon#flushed, iclass 16, count 2 2006.229.07:01:53.31#ibcon#about to write, iclass 16, count 2 2006.229.07:01:53.31#ibcon#wrote, iclass 16, count 2 2006.229.07:01:53.31#ibcon#about to read 3, iclass 16, count 2 2006.229.07:01:53.34#ibcon#read 3, iclass 16, count 2 2006.229.07:01:53.34#ibcon#about to read 4, iclass 16, count 2 2006.229.07:01:53.34#ibcon#read 4, iclass 16, count 2 2006.229.07:01:53.34#ibcon#about to read 5, iclass 16, count 2 2006.229.07:01:53.34#ibcon#read 5, iclass 16, count 2 2006.229.07:01:53.34#ibcon#about to read 6, iclass 16, count 2 2006.229.07:01:53.34#ibcon#read 6, iclass 16, count 2 2006.229.07:01:53.34#ibcon#end of sib2, iclass 16, count 2 2006.229.07:01:53.34#ibcon#*after write, iclass 16, count 2 2006.229.07:01:53.34#ibcon#*before return 0, iclass 16, count 2 2006.229.07:01:53.34#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:53.34#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:53.34#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.07:01:53.34#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:53.34#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:53.46#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:53.46#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:53.46#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:01:53.46#ibcon#first serial, iclass 16, count 0 2006.229.07:01:53.46#ibcon#enter sib2, iclass 16, count 0 2006.229.07:01:53.46#ibcon#flushed, iclass 16, count 0 2006.229.07:01:53.46#ibcon#about to write, iclass 16, count 0 2006.229.07:01:53.46#ibcon#wrote, iclass 16, count 0 2006.229.07:01:53.46#ibcon#about to read 3, iclass 16, count 0 2006.229.07:01:53.48#ibcon#read 3, iclass 16, count 0 2006.229.07:01:53.48#ibcon#about to read 4, iclass 16, count 0 2006.229.07:01:53.48#ibcon#read 4, iclass 16, count 0 2006.229.07:01:53.48#ibcon#about to read 5, iclass 16, count 0 2006.229.07:01:53.48#ibcon#read 5, iclass 16, count 0 2006.229.07:01:53.48#ibcon#about to read 6, iclass 16, count 0 2006.229.07:01:53.48#ibcon#read 6, iclass 16, count 0 2006.229.07:01:53.48#ibcon#end of sib2, iclass 16, count 0 2006.229.07:01:53.48#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:01:53.48#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:01:53.48#ibcon#[25=USB\r\n] 2006.229.07:01:53.48#ibcon#*before write, iclass 16, count 0 2006.229.07:01:53.48#ibcon#enter sib2, iclass 16, count 0 2006.229.07:01:53.48#ibcon#flushed, iclass 16, count 0 2006.229.07:01:53.48#ibcon#about to write, iclass 16, count 0 2006.229.07:01:53.48#ibcon#wrote, iclass 16, count 0 2006.229.07:01:53.48#ibcon#about to read 3, iclass 16, count 0 2006.229.07:01:53.51#ibcon#read 3, iclass 16, count 0 2006.229.07:01:53.51#ibcon#about to read 4, iclass 16, count 0 2006.229.07:01:53.51#ibcon#read 4, iclass 16, count 0 2006.229.07:01:53.51#ibcon#about to read 5, iclass 16, count 0 2006.229.07:01:53.51#ibcon#read 5, iclass 16, count 0 2006.229.07:01:53.51#ibcon#about to read 6, iclass 16, count 0 2006.229.07:01:53.51#ibcon#read 6, iclass 16, count 0 2006.229.07:01:53.51#ibcon#end of sib2, iclass 16, count 0 2006.229.07:01:53.51#ibcon#*after write, iclass 16, count 0 2006.229.07:01:53.51#ibcon#*before return 0, iclass 16, count 0 2006.229.07:01:53.51#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:53.51#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:53.51#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:01:53.51#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:01:53.51$vck44/valo=2,534.99 2006.229.07:01:53.51#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:01:53.51#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:01:53.51#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:53.51#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:53.51#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:53.51#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:53.51#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:01:53.51#ibcon#first serial, iclass 18, count 0 2006.229.07:01:53.51#ibcon#enter sib2, iclass 18, count 0 2006.229.07:01:53.51#ibcon#flushed, iclass 18, count 0 2006.229.07:01:53.51#ibcon#about to write, iclass 18, count 0 2006.229.07:01:53.51#ibcon#wrote, iclass 18, count 0 2006.229.07:01:53.51#ibcon#about to read 3, iclass 18, count 0 2006.229.07:01:53.53#ibcon#read 3, iclass 18, count 0 2006.229.07:01:53.53#ibcon#about to read 4, iclass 18, count 0 2006.229.07:01:53.53#ibcon#read 4, iclass 18, count 0 2006.229.07:01:53.53#ibcon#about to read 5, iclass 18, count 0 2006.229.07:01:53.53#ibcon#read 5, iclass 18, count 0 2006.229.07:01:53.53#ibcon#about to read 6, iclass 18, count 0 2006.229.07:01:53.53#ibcon#read 6, iclass 18, count 0 2006.229.07:01:53.53#ibcon#end of sib2, iclass 18, count 0 2006.229.07:01:53.53#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:01:53.53#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:01:53.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:01:53.53#ibcon#*before write, iclass 18, count 0 2006.229.07:01:53.53#ibcon#enter sib2, iclass 18, count 0 2006.229.07:01:53.53#ibcon#flushed, iclass 18, count 0 2006.229.07:01:53.53#ibcon#about to write, iclass 18, count 0 2006.229.07:01:53.53#ibcon#wrote, iclass 18, count 0 2006.229.07:01:53.53#ibcon#about to read 3, iclass 18, count 0 2006.229.07:01:53.57#ibcon#read 3, iclass 18, count 0 2006.229.07:01:53.57#ibcon#about to read 4, iclass 18, count 0 2006.229.07:01:53.57#ibcon#read 4, iclass 18, count 0 2006.229.07:01:53.57#ibcon#about to read 5, iclass 18, count 0 2006.229.07:01:53.57#ibcon#read 5, iclass 18, count 0 2006.229.07:01:53.57#ibcon#about to read 6, iclass 18, count 0 2006.229.07:01:53.57#ibcon#read 6, iclass 18, count 0 2006.229.07:01:53.57#ibcon#end of sib2, iclass 18, count 0 2006.229.07:01:53.57#ibcon#*after write, iclass 18, count 0 2006.229.07:01:53.57#ibcon#*before return 0, iclass 18, count 0 2006.229.07:01:53.57#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:53.57#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:53.57#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:01:53.57#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:01:53.57$vck44/va=2,7 2006.229.07:01:53.57#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.07:01:53.57#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.07:01:53.57#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:53.57#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:53.63#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:53.63#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:53.63#ibcon#enter wrdev, iclass 20, count 2 2006.229.07:01:53.63#ibcon#first serial, iclass 20, count 2 2006.229.07:01:53.63#ibcon#enter sib2, iclass 20, count 2 2006.229.07:01:53.63#ibcon#flushed, iclass 20, count 2 2006.229.07:01:53.63#ibcon#about to write, iclass 20, count 2 2006.229.07:01:53.63#ibcon#wrote, iclass 20, count 2 2006.229.07:01:53.63#ibcon#about to read 3, iclass 20, count 2 2006.229.07:01:53.65#ibcon#read 3, iclass 20, count 2 2006.229.07:01:53.65#ibcon#about to read 4, iclass 20, count 2 2006.229.07:01:53.65#ibcon#read 4, iclass 20, count 2 2006.229.07:01:53.65#ibcon#about to read 5, iclass 20, count 2 2006.229.07:01:53.65#ibcon#read 5, iclass 20, count 2 2006.229.07:01:53.65#ibcon#about to read 6, iclass 20, count 2 2006.229.07:01:53.65#ibcon#read 6, iclass 20, count 2 2006.229.07:01:53.65#ibcon#end of sib2, iclass 20, count 2 2006.229.07:01:53.65#ibcon#*mode == 0, iclass 20, count 2 2006.229.07:01:53.65#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.07:01:53.65#ibcon#[25=AT02-07\r\n] 2006.229.07:01:53.65#ibcon#*before write, iclass 20, count 2 2006.229.07:01:53.65#ibcon#enter sib2, iclass 20, count 2 2006.229.07:01:53.65#ibcon#flushed, iclass 20, count 2 2006.229.07:01:53.65#ibcon#about to write, iclass 20, count 2 2006.229.07:01:53.65#ibcon#wrote, iclass 20, count 2 2006.229.07:01:53.65#ibcon#about to read 3, iclass 20, count 2 2006.229.07:01:53.68#ibcon#read 3, iclass 20, count 2 2006.229.07:01:53.68#ibcon#about to read 4, iclass 20, count 2 2006.229.07:01:53.68#ibcon#read 4, iclass 20, count 2 2006.229.07:01:53.68#ibcon#about to read 5, iclass 20, count 2 2006.229.07:01:53.68#ibcon#read 5, iclass 20, count 2 2006.229.07:01:53.68#ibcon#about to read 6, iclass 20, count 2 2006.229.07:01:53.68#ibcon#read 6, iclass 20, count 2 2006.229.07:01:53.68#ibcon#end of sib2, iclass 20, count 2 2006.229.07:01:53.68#ibcon#*after write, iclass 20, count 2 2006.229.07:01:53.68#ibcon#*before return 0, iclass 20, count 2 2006.229.07:01:53.68#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:53.68#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:53.68#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.07:01:53.68#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:53.68#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:53.80#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:53.80#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:53.80#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:01:53.80#ibcon#first serial, iclass 20, count 0 2006.229.07:01:53.80#ibcon#enter sib2, iclass 20, count 0 2006.229.07:01:53.80#ibcon#flushed, iclass 20, count 0 2006.229.07:01:53.80#ibcon#about to write, iclass 20, count 0 2006.229.07:01:53.80#ibcon#wrote, iclass 20, count 0 2006.229.07:01:53.80#ibcon#about to read 3, iclass 20, count 0 2006.229.07:01:53.82#ibcon#read 3, iclass 20, count 0 2006.229.07:01:53.82#ibcon#about to read 4, iclass 20, count 0 2006.229.07:01:53.82#ibcon#read 4, iclass 20, count 0 2006.229.07:01:53.82#ibcon#about to read 5, iclass 20, count 0 2006.229.07:01:53.82#ibcon#read 5, iclass 20, count 0 2006.229.07:01:53.82#ibcon#about to read 6, iclass 20, count 0 2006.229.07:01:53.82#ibcon#read 6, iclass 20, count 0 2006.229.07:01:53.82#ibcon#end of sib2, iclass 20, count 0 2006.229.07:01:53.82#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:01:53.82#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:01:53.82#ibcon#[25=USB\r\n] 2006.229.07:01:53.82#ibcon#*before write, iclass 20, count 0 2006.229.07:01:53.82#ibcon#enter sib2, iclass 20, count 0 2006.229.07:01:53.82#ibcon#flushed, iclass 20, count 0 2006.229.07:01:53.82#ibcon#about to write, iclass 20, count 0 2006.229.07:01:53.82#ibcon#wrote, iclass 20, count 0 2006.229.07:01:53.82#ibcon#about to read 3, iclass 20, count 0 2006.229.07:01:53.85#ibcon#read 3, iclass 20, count 0 2006.229.07:01:53.85#ibcon#about to read 4, iclass 20, count 0 2006.229.07:01:53.85#ibcon#read 4, iclass 20, count 0 2006.229.07:01:53.85#ibcon#about to read 5, iclass 20, count 0 2006.229.07:01:53.85#ibcon#read 5, iclass 20, count 0 2006.229.07:01:53.85#ibcon#about to read 6, iclass 20, count 0 2006.229.07:01:53.85#ibcon#read 6, iclass 20, count 0 2006.229.07:01:53.85#ibcon#end of sib2, iclass 20, count 0 2006.229.07:01:53.85#ibcon#*after write, iclass 20, count 0 2006.229.07:01:53.85#ibcon#*before return 0, iclass 20, count 0 2006.229.07:01:53.85#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:53.85#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:53.85#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:01:53.85#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:01:53.85$vck44/valo=3,564.99 2006.229.07:01:53.85#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.07:01:53.85#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.07:01:53.85#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:53.85#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:53.85#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:53.85#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:53.85#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:01:53.85#ibcon#first serial, iclass 22, count 0 2006.229.07:01:53.85#ibcon#enter sib2, iclass 22, count 0 2006.229.07:01:53.85#ibcon#flushed, iclass 22, count 0 2006.229.07:01:53.85#ibcon#about to write, iclass 22, count 0 2006.229.07:01:53.85#ibcon#wrote, iclass 22, count 0 2006.229.07:01:53.85#ibcon#about to read 3, iclass 22, count 0 2006.229.07:01:53.87#ibcon#read 3, iclass 22, count 0 2006.229.07:01:53.87#ibcon#about to read 4, iclass 22, count 0 2006.229.07:01:53.87#ibcon#read 4, iclass 22, count 0 2006.229.07:01:53.87#ibcon#about to read 5, iclass 22, count 0 2006.229.07:01:53.87#ibcon#read 5, iclass 22, count 0 2006.229.07:01:53.87#ibcon#about to read 6, iclass 22, count 0 2006.229.07:01:53.87#ibcon#read 6, iclass 22, count 0 2006.229.07:01:53.87#ibcon#end of sib2, iclass 22, count 0 2006.229.07:01:53.87#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:01:53.87#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:01:53.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:01:53.87#ibcon#*before write, iclass 22, count 0 2006.229.07:01:53.87#ibcon#enter sib2, iclass 22, count 0 2006.229.07:01:53.87#ibcon#flushed, iclass 22, count 0 2006.229.07:01:53.87#ibcon#about to write, iclass 22, count 0 2006.229.07:01:53.87#ibcon#wrote, iclass 22, count 0 2006.229.07:01:53.87#ibcon#about to read 3, iclass 22, count 0 2006.229.07:01:53.91#ibcon#read 3, iclass 22, count 0 2006.229.07:01:53.91#ibcon#about to read 4, iclass 22, count 0 2006.229.07:01:53.91#ibcon#read 4, iclass 22, count 0 2006.229.07:01:53.91#ibcon#about to read 5, iclass 22, count 0 2006.229.07:01:53.91#ibcon#read 5, iclass 22, count 0 2006.229.07:01:53.91#ibcon#about to read 6, iclass 22, count 0 2006.229.07:01:53.91#ibcon#read 6, iclass 22, count 0 2006.229.07:01:53.91#ibcon#end of sib2, iclass 22, count 0 2006.229.07:01:53.91#ibcon#*after write, iclass 22, count 0 2006.229.07:01:53.91#ibcon#*before return 0, iclass 22, count 0 2006.229.07:01:53.91#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:53.91#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:53.91#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:01:53.91#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:01:53.91$vck44/va=3,6 2006.229.07:01:53.91#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.07:01:53.91#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.07:01:53.91#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:53.91#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:53.97#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:53.97#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:53.97#ibcon#enter wrdev, iclass 24, count 2 2006.229.07:01:53.97#ibcon#first serial, iclass 24, count 2 2006.229.07:01:53.97#ibcon#enter sib2, iclass 24, count 2 2006.229.07:01:53.97#ibcon#flushed, iclass 24, count 2 2006.229.07:01:53.97#ibcon#about to write, iclass 24, count 2 2006.229.07:01:53.97#ibcon#wrote, iclass 24, count 2 2006.229.07:01:53.97#ibcon#about to read 3, iclass 24, count 2 2006.229.07:01:53.99#ibcon#read 3, iclass 24, count 2 2006.229.07:01:53.99#ibcon#about to read 4, iclass 24, count 2 2006.229.07:01:53.99#ibcon#read 4, iclass 24, count 2 2006.229.07:01:53.99#ibcon#about to read 5, iclass 24, count 2 2006.229.07:01:53.99#ibcon#read 5, iclass 24, count 2 2006.229.07:01:53.99#ibcon#about to read 6, iclass 24, count 2 2006.229.07:01:53.99#ibcon#read 6, iclass 24, count 2 2006.229.07:01:53.99#ibcon#end of sib2, iclass 24, count 2 2006.229.07:01:53.99#ibcon#*mode == 0, iclass 24, count 2 2006.229.07:01:53.99#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.07:01:53.99#ibcon#[25=AT03-06\r\n] 2006.229.07:01:53.99#ibcon#*before write, iclass 24, count 2 2006.229.07:01:53.99#ibcon#enter sib2, iclass 24, count 2 2006.229.07:01:53.99#ibcon#flushed, iclass 24, count 2 2006.229.07:01:53.99#ibcon#about to write, iclass 24, count 2 2006.229.07:01:53.99#ibcon#wrote, iclass 24, count 2 2006.229.07:01:53.99#ibcon#about to read 3, iclass 24, count 2 2006.229.07:01:54.02#ibcon#read 3, iclass 24, count 2 2006.229.07:01:54.02#ibcon#about to read 4, iclass 24, count 2 2006.229.07:01:54.02#ibcon#read 4, iclass 24, count 2 2006.229.07:01:54.02#ibcon#about to read 5, iclass 24, count 2 2006.229.07:01:54.02#ibcon#read 5, iclass 24, count 2 2006.229.07:01:54.02#ibcon#about to read 6, iclass 24, count 2 2006.229.07:01:54.02#ibcon#read 6, iclass 24, count 2 2006.229.07:01:54.02#ibcon#end of sib2, iclass 24, count 2 2006.229.07:01:54.02#ibcon#*after write, iclass 24, count 2 2006.229.07:01:54.02#ibcon#*before return 0, iclass 24, count 2 2006.229.07:01:54.02#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:54.02#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:54.02#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.07:01:54.02#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:54.02#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:54.14#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:54.14#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:54.14#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:01:54.14#ibcon#first serial, iclass 24, count 0 2006.229.07:01:54.14#ibcon#enter sib2, iclass 24, count 0 2006.229.07:01:54.14#ibcon#flushed, iclass 24, count 0 2006.229.07:01:54.14#ibcon#about to write, iclass 24, count 0 2006.229.07:01:54.14#ibcon#wrote, iclass 24, count 0 2006.229.07:01:54.14#ibcon#about to read 3, iclass 24, count 0 2006.229.07:01:54.16#ibcon#read 3, iclass 24, count 0 2006.229.07:01:54.16#ibcon#about to read 4, iclass 24, count 0 2006.229.07:01:54.16#ibcon#read 4, iclass 24, count 0 2006.229.07:01:54.16#ibcon#about to read 5, iclass 24, count 0 2006.229.07:01:54.16#ibcon#read 5, iclass 24, count 0 2006.229.07:01:54.16#ibcon#about to read 6, iclass 24, count 0 2006.229.07:01:54.16#ibcon#read 6, iclass 24, count 0 2006.229.07:01:54.16#ibcon#end of sib2, iclass 24, count 0 2006.229.07:01:54.16#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:01:54.16#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:01:54.16#ibcon#[25=USB\r\n] 2006.229.07:01:54.16#ibcon#*before write, iclass 24, count 0 2006.229.07:01:54.16#ibcon#enter sib2, iclass 24, count 0 2006.229.07:01:54.16#ibcon#flushed, iclass 24, count 0 2006.229.07:01:54.16#ibcon#about to write, iclass 24, count 0 2006.229.07:01:54.16#ibcon#wrote, iclass 24, count 0 2006.229.07:01:54.16#ibcon#about to read 3, iclass 24, count 0 2006.229.07:01:54.19#ibcon#read 3, iclass 24, count 0 2006.229.07:01:54.19#ibcon#about to read 4, iclass 24, count 0 2006.229.07:01:54.19#ibcon#read 4, iclass 24, count 0 2006.229.07:01:54.19#ibcon#about to read 5, iclass 24, count 0 2006.229.07:01:54.19#ibcon#read 5, iclass 24, count 0 2006.229.07:01:54.19#ibcon#about to read 6, iclass 24, count 0 2006.229.07:01:54.19#ibcon#read 6, iclass 24, count 0 2006.229.07:01:54.19#ibcon#end of sib2, iclass 24, count 0 2006.229.07:01:54.19#ibcon#*after write, iclass 24, count 0 2006.229.07:01:54.19#ibcon#*before return 0, iclass 24, count 0 2006.229.07:01:54.19#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:54.19#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:54.19#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:01:54.19#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:01:54.19$vck44/valo=4,624.99 2006.229.07:01:54.19#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.07:01:54.19#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.07:01:54.19#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:54.19#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:54.19#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:54.19#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:54.19#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:01:54.19#ibcon#first serial, iclass 26, count 0 2006.229.07:01:54.19#ibcon#enter sib2, iclass 26, count 0 2006.229.07:01:54.19#ibcon#flushed, iclass 26, count 0 2006.229.07:01:54.19#ibcon#about to write, iclass 26, count 0 2006.229.07:01:54.19#ibcon#wrote, iclass 26, count 0 2006.229.07:01:54.19#ibcon#about to read 3, iclass 26, count 0 2006.229.07:01:54.21#ibcon#read 3, iclass 26, count 0 2006.229.07:01:54.21#ibcon#about to read 4, iclass 26, count 0 2006.229.07:01:54.21#ibcon#read 4, iclass 26, count 0 2006.229.07:01:54.21#ibcon#about to read 5, iclass 26, count 0 2006.229.07:01:54.21#ibcon#read 5, iclass 26, count 0 2006.229.07:01:54.21#ibcon#about to read 6, iclass 26, count 0 2006.229.07:01:54.21#ibcon#read 6, iclass 26, count 0 2006.229.07:01:54.21#ibcon#end of sib2, iclass 26, count 0 2006.229.07:01:54.21#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:01:54.21#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:01:54.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:01:54.21#ibcon#*before write, iclass 26, count 0 2006.229.07:01:54.21#ibcon#enter sib2, iclass 26, count 0 2006.229.07:01:54.21#ibcon#flushed, iclass 26, count 0 2006.229.07:01:54.21#ibcon#about to write, iclass 26, count 0 2006.229.07:01:54.21#ibcon#wrote, iclass 26, count 0 2006.229.07:01:54.21#ibcon#about to read 3, iclass 26, count 0 2006.229.07:01:54.25#ibcon#read 3, iclass 26, count 0 2006.229.07:01:54.25#ibcon#about to read 4, iclass 26, count 0 2006.229.07:01:54.25#ibcon#read 4, iclass 26, count 0 2006.229.07:01:54.25#ibcon#about to read 5, iclass 26, count 0 2006.229.07:01:54.25#ibcon#read 5, iclass 26, count 0 2006.229.07:01:54.25#ibcon#about to read 6, iclass 26, count 0 2006.229.07:01:54.25#ibcon#read 6, iclass 26, count 0 2006.229.07:01:54.25#ibcon#end of sib2, iclass 26, count 0 2006.229.07:01:54.25#ibcon#*after write, iclass 26, count 0 2006.229.07:01:54.25#ibcon#*before return 0, iclass 26, count 0 2006.229.07:01:54.25#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:54.25#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:54.25#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:01:54.25#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:01:54.25$vck44/va=4,7 2006.229.07:01:54.25#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.07:01:54.25#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.07:01:54.25#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:54.25#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:54.31#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:54.31#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:54.31#ibcon#enter wrdev, iclass 28, count 2 2006.229.07:01:54.31#ibcon#first serial, iclass 28, count 2 2006.229.07:01:54.31#ibcon#enter sib2, iclass 28, count 2 2006.229.07:01:54.31#ibcon#flushed, iclass 28, count 2 2006.229.07:01:54.31#ibcon#about to write, iclass 28, count 2 2006.229.07:01:54.31#ibcon#wrote, iclass 28, count 2 2006.229.07:01:54.31#ibcon#about to read 3, iclass 28, count 2 2006.229.07:01:54.33#ibcon#read 3, iclass 28, count 2 2006.229.07:01:54.33#ibcon#about to read 4, iclass 28, count 2 2006.229.07:01:54.33#ibcon#read 4, iclass 28, count 2 2006.229.07:01:54.33#ibcon#about to read 5, iclass 28, count 2 2006.229.07:01:54.33#ibcon#read 5, iclass 28, count 2 2006.229.07:01:54.33#ibcon#about to read 6, iclass 28, count 2 2006.229.07:01:54.33#ibcon#read 6, iclass 28, count 2 2006.229.07:01:54.33#ibcon#end of sib2, iclass 28, count 2 2006.229.07:01:54.33#ibcon#*mode == 0, iclass 28, count 2 2006.229.07:01:54.33#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.07:01:54.33#ibcon#[25=AT04-07\r\n] 2006.229.07:01:54.33#ibcon#*before write, iclass 28, count 2 2006.229.07:01:54.33#ibcon#enter sib2, iclass 28, count 2 2006.229.07:01:54.33#ibcon#flushed, iclass 28, count 2 2006.229.07:01:54.33#ibcon#about to write, iclass 28, count 2 2006.229.07:01:54.33#ibcon#wrote, iclass 28, count 2 2006.229.07:01:54.33#ibcon#about to read 3, iclass 28, count 2 2006.229.07:01:54.36#ibcon#read 3, iclass 28, count 2 2006.229.07:01:54.36#ibcon#about to read 4, iclass 28, count 2 2006.229.07:01:54.36#ibcon#read 4, iclass 28, count 2 2006.229.07:01:54.36#ibcon#about to read 5, iclass 28, count 2 2006.229.07:01:54.36#ibcon#read 5, iclass 28, count 2 2006.229.07:01:54.36#ibcon#about to read 6, iclass 28, count 2 2006.229.07:01:54.36#ibcon#read 6, iclass 28, count 2 2006.229.07:01:54.36#ibcon#end of sib2, iclass 28, count 2 2006.229.07:01:54.36#ibcon#*after write, iclass 28, count 2 2006.229.07:01:54.39#ibcon#*before return 0, iclass 28, count 2 2006.229.07:01:54.39#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:54.39#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:54.39#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.07:01:54.39#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:54.39#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:54.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:54.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:54.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:01:54.50#ibcon#first serial, iclass 28, count 0 2006.229.07:01:54.50#ibcon#enter sib2, iclass 28, count 0 2006.229.07:01:54.50#ibcon#flushed, iclass 28, count 0 2006.229.07:01:54.50#ibcon#about to write, iclass 28, count 0 2006.229.07:01:54.50#ibcon#wrote, iclass 28, count 0 2006.229.07:01:54.50#ibcon#about to read 3, iclass 28, count 0 2006.229.07:01:54.52#ibcon#read 3, iclass 28, count 0 2006.229.07:01:54.52#ibcon#about to read 4, iclass 28, count 0 2006.229.07:01:54.52#ibcon#read 4, iclass 28, count 0 2006.229.07:01:54.52#ibcon#about to read 5, iclass 28, count 0 2006.229.07:01:54.52#ibcon#read 5, iclass 28, count 0 2006.229.07:01:54.52#ibcon#about to read 6, iclass 28, count 0 2006.229.07:01:54.52#ibcon#read 6, iclass 28, count 0 2006.229.07:01:54.52#ibcon#end of sib2, iclass 28, count 0 2006.229.07:01:54.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:01:54.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:01:54.52#ibcon#[25=USB\r\n] 2006.229.07:01:54.52#ibcon#*before write, iclass 28, count 0 2006.229.07:01:54.52#ibcon#enter sib2, iclass 28, count 0 2006.229.07:01:54.52#ibcon#flushed, iclass 28, count 0 2006.229.07:01:54.52#ibcon#about to write, iclass 28, count 0 2006.229.07:01:54.52#ibcon#wrote, iclass 28, count 0 2006.229.07:01:54.52#ibcon#about to read 3, iclass 28, count 0 2006.229.07:01:54.55#ibcon#read 3, iclass 28, count 0 2006.229.07:01:54.55#ibcon#about to read 4, iclass 28, count 0 2006.229.07:01:54.55#ibcon#read 4, iclass 28, count 0 2006.229.07:01:54.55#ibcon#about to read 5, iclass 28, count 0 2006.229.07:01:54.55#ibcon#read 5, iclass 28, count 0 2006.229.07:01:54.55#ibcon#about to read 6, iclass 28, count 0 2006.229.07:01:54.55#ibcon#read 6, iclass 28, count 0 2006.229.07:01:54.55#ibcon#end of sib2, iclass 28, count 0 2006.229.07:01:54.55#ibcon#*after write, iclass 28, count 0 2006.229.07:01:54.55#ibcon#*before return 0, iclass 28, count 0 2006.229.07:01:54.55#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:54.55#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:54.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:01:54.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:01:54.55$vck44/valo=5,734.99 2006.229.07:01:54.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:01:54.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:01:54.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:54.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:54.55#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:54.55#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:54.55#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:01:54.55#ibcon#first serial, iclass 30, count 0 2006.229.07:01:54.55#ibcon#enter sib2, iclass 30, count 0 2006.229.07:01:54.55#ibcon#flushed, iclass 30, count 0 2006.229.07:01:54.55#ibcon#about to write, iclass 30, count 0 2006.229.07:01:54.55#ibcon#wrote, iclass 30, count 0 2006.229.07:01:54.55#ibcon#about to read 3, iclass 30, count 0 2006.229.07:01:54.57#ibcon#read 3, iclass 30, count 0 2006.229.07:01:54.57#ibcon#about to read 4, iclass 30, count 0 2006.229.07:01:54.57#ibcon#read 4, iclass 30, count 0 2006.229.07:01:54.57#ibcon#about to read 5, iclass 30, count 0 2006.229.07:01:54.57#ibcon#read 5, iclass 30, count 0 2006.229.07:01:54.57#ibcon#about to read 6, iclass 30, count 0 2006.229.07:01:54.57#ibcon#read 6, iclass 30, count 0 2006.229.07:01:54.57#ibcon#end of sib2, iclass 30, count 0 2006.229.07:01:54.57#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:01:54.57#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:01:54.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:01:54.57#ibcon#*before write, iclass 30, count 0 2006.229.07:01:54.57#ibcon#enter sib2, iclass 30, count 0 2006.229.07:01:54.57#ibcon#flushed, iclass 30, count 0 2006.229.07:01:54.57#ibcon#about to write, iclass 30, count 0 2006.229.07:01:54.57#ibcon#wrote, iclass 30, count 0 2006.229.07:01:54.57#ibcon#about to read 3, iclass 30, count 0 2006.229.07:01:54.61#ibcon#read 3, iclass 30, count 0 2006.229.07:01:54.61#ibcon#about to read 4, iclass 30, count 0 2006.229.07:01:54.61#ibcon#read 4, iclass 30, count 0 2006.229.07:01:54.61#ibcon#about to read 5, iclass 30, count 0 2006.229.07:01:54.61#ibcon#read 5, iclass 30, count 0 2006.229.07:01:54.61#ibcon#about to read 6, iclass 30, count 0 2006.229.07:01:54.61#ibcon#read 6, iclass 30, count 0 2006.229.07:01:54.61#ibcon#end of sib2, iclass 30, count 0 2006.229.07:01:54.61#ibcon#*after write, iclass 30, count 0 2006.229.07:01:54.61#ibcon#*before return 0, iclass 30, count 0 2006.229.07:01:54.61#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:54.61#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:54.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:01:54.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:01:54.61$vck44/va=5,4 2006.229.07:01:54.61#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.07:01:54.61#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.07:01:54.61#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:54.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:54.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:54.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:54.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.07:01:54.67#ibcon#first serial, iclass 32, count 2 2006.229.07:01:54.67#ibcon#enter sib2, iclass 32, count 2 2006.229.07:01:54.67#ibcon#flushed, iclass 32, count 2 2006.229.07:01:54.67#ibcon#about to write, iclass 32, count 2 2006.229.07:01:54.67#ibcon#wrote, iclass 32, count 2 2006.229.07:01:54.67#ibcon#about to read 3, iclass 32, count 2 2006.229.07:01:54.69#ibcon#read 3, iclass 32, count 2 2006.229.07:01:54.69#ibcon#about to read 4, iclass 32, count 2 2006.229.07:01:54.69#ibcon#read 4, iclass 32, count 2 2006.229.07:01:54.69#ibcon#about to read 5, iclass 32, count 2 2006.229.07:01:54.69#ibcon#read 5, iclass 32, count 2 2006.229.07:01:54.69#ibcon#about to read 6, iclass 32, count 2 2006.229.07:01:54.69#ibcon#read 6, iclass 32, count 2 2006.229.07:01:54.69#ibcon#end of sib2, iclass 32, count 2 2006.229.07:01:54.69#ibcon#*mode == 0, iclass 32, count 2 2006.229.07:01:54.69#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.07:01:54.69#ibcon#[25=AT05-04\r\n] 2006.229.07:01:54.69#ibcon#*before write, iclass 32, count 2 2006.229.07:01:54.69#ibcon#enter sib2, iclass 32, count 2 2006.229.07:01:54.69#ibcon#flushed, iclass 32, count 2 2006.229.07:01:54.69#ibcon#about to write, iclass 32, count 2 2006.229.07:01:54.69#ibcon#wrote, iclass 32, count 2 2006.229.07:01:54.69#ibcon#about to read 3, iclass 32, count 2 2006.229.07:01:54.72#ibcon#read 3, iclass 32, count 2 2006.229.07:01:54.72#ibcon#about to read 4, iclass 32, count 2 2006.229.07:01:54.72#ibcon#read 4, iclass 32, count 2 2006.229.07:01:54.72#ibcon#about to read 5, iclass 32, count 2 2006.229.07:01:54.72#ibcon#read 5, iclass 32, count 2 2006.229.07:01:54.72#ibcon#about to read 6, iclass 32, count 2 2006.229.07:01:54.72#ibcon#read 6, iclass 32, count 2 2006.229.07:01:54.72#ibcon#end of sib2, iclass 32, count 2 2006.229.07:01:54.72#ibcon#*after write, iclass 32, count 2 2006.229.07:01:54.72#ibcon#*before return 0, iclass 32, count 2 2006.229.07:01:54.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:54.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:54.72#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.07:01:54.72#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:54.72#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:54.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:54.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:54.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:01:54.84#ibcon#first serial, iclass 32, count 0 2006.229.07:01:54.84#ibcon#enter sib2, iclass 32, count 0 2006.229.07:01:54.84#ibcon#flushed, iclass 32, count 0 2006.229.07:01:54.84#ibcon#about to write, iclass 32, count 0 2006.229.07:01:54.84#ibcon#wrote, iclass 32, count 0 2006.229.07:01:54.84#ibcon#about to read 3, iclass 32, count 0 2006.229.07:01:54.86#ibcon#read 3, iclass 32, count 0 2006.229.07:01:54.86#ibcon#about to read 4, iclass 32, count 0 2006.229.07:01:54.86#ibcon#read 4, iclass 32, count 0 2006.229.07:01:54.86#ibcon#about to read 5, iclass 32, count 0 2006.229.07:01:54.86#ibcon#read 5, iclass 32, count 0 2006.229.07:01:54.86#ibcon#about to read 6, iclass 32, count 0 2006.229.07:01:54.86#ibcon#read 6, iclass 32, count 0 2006.229.07:01:54.86#ibcon#end of sib2, iclass 32, count 0 2006.229.07:01:54.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:01:54.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:01:54.86#ibcon#[25=USB\r\n] 2006.229.07:01:54.86#ibcon#*before write, iclass 32, count 0 2006.229.07:01:54.86#ibcon#enter sib2, iclass 32, count 0 2006.229.07:01:54.86#ibcon#flushed, iclass 32, count 0 2006.229.07:01:54.86#ibcon#about to write, iclass 32, count 0 2006.229.07:01:54.86#ibcon#wrote, iclass 32, count 0 2006.229.07:01:54.86#ibcon#about to read 3, iclass 32, count 0 2006.229.07:01:54.89#ibcon#read 3, iclass 32, count 0 2006.229.07:01:54.89#ibcon#about to read 4, iclass 32, count 0 2006.229.07:01:54.89#ibcon#read 4, iclass 32, count 0 2006.229.07:01:54.89#ibcon#about to read 5, iclass 32, count 0 2006.229.07:01:54.89#ibcon#read 5, iclass 32, count 0 2006.229.07:01:54.89#ibcon#about to read 6, iclass 32, count 0 2006.229.07:01:54.89#ibcon#read 6, iclass 32, count 0 2006.229.07:01:54.89#ibcon#end of sib2, iclass 32, count 0 2006.229.07:01:54.89#ibcon#*after write, iclass 32, count 0 2006.229.07:01:54.89#ibcon#*before return 0, iclass 32, count 0 2006.229.07:01:54.89#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:54.89#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:54.89#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:01:54.89#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:01:54.89$vck44/valo=6,814.99 2006.229.07:01:54.89#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.07:01:54.89#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.07:01:54.89#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:54.89#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:54.89#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:54.89#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:54.89#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:01:54.89#ibcon#first serial, iclass 34, count 0 2006.229.07:01:54.89#ibcon#enter sib2, iclass 34, count 0 2006.229.07:01:54.89#ibcon#flushed, iclass 34, count 0 2006.229.07:01:54.89#ibcon#about to write, iclass 34, count 0 2006.229.07:01:54.89#ibcon#wrote, iclass 34, count 0 2006.229.07:01:54.89#ibcon#about to read 3, iclass 34, count 0 2006.229.07:01:54.91#ibcon#read 3, iclass 34, count 0 2006.229.07:01:54.91#ibcon#about to read 4, iclass 34, count 0 2006.229.07:01:54.91#ibcon#read 4, iclass 34, count 0 2006.229.07:01:54.91#ibcon#about to read 5, iclass 34, count 0 2006.229.07:01:54.91#ibcon#read 5, iclass 34, count 0 2006.229.07:01:54.91#ibcon#about to read 6, iclass 34, count 0 2006.229.07:01:54.91#ibcon#read 6, iclass 34, count 0 2006.229.07:01:54.91#ibcon#end of sib2, iclass 34, count 0 2006.229.07:01:54.91#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:01:54.91#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:01:54.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:01:54.91#ibcon#*before write, iclass 34, count 0 2006.229.07:01:54.91#ibcon#enter sib2, iclass 34, count 0 2006.229.07:01:54.91#ibcon#flushed, iclass 34, count 0 2006.229.07:01:54.91#ibcon#about to write, iclass 34, count 0 2006.229.07:01:54.91#ibcon#wrote, iclass 34, count 0 2006.229.07:01:54.91#ibcon#about to read 3, iclass 34, count 0 2006.229.07:01:54.95#ibcon#read 3, iclass 34, count 0 2006.229.07:01:54.95#ibcon#about to read 4, iclass 34, count 0 2006.229.07:01:54.95#ibcon#read 4, iclass 34, count 0 2006.229.07:01:54.95#ibcon#about to read 5, iclass 34, count 0 2006.229.07:01:54.95#ibcon#read 5, iclass 34, count 0 2006.229.07:01:54.95#ibcon#about to read 6, iclass 34, count 0 2006.229.07:01:54.95#ibcon#read 6, iclass 34, count 0 2006.229.07:01:54.95#ibcon#end of sib2, iclass 34, count 0 2006.229.07:01:54.95#ibcon#*after write, iclass 34, count 0 2006.229.07:01:54.95#ibcon#*before return 0, iclass 34, count 0 2006.229.07:01:54.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:54.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:54.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:01:54.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:01:54.95$vck44/va=6,4 2006.229.07:01:54.95#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.07:01:54.95#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.07:01:54.95#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:54.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:55.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:55.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:55.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.07:01:55.01#ibcon#first serial, iclass 36, count 2 2006.229.07:01:55.01#ibcon#enter sib2, iclass 36, count 2 2006.229.07:01:55.01#ibcon#flushed, iclass 36, count 2 2006.229.07:01:55.01#ibcon#about to write, iclass 36, count 2 2006.229.07:01:55.01#ibcon#wrote, iclass 36, count 2 2006.229.07:01:55.01#ibcon#about to read 3, iclass 36, count 2 2006.229.07:01:55.03#ibcon#read 3, iclass 36, count 2 2006.229.07:01:55.03#ibcon#about to read 4, iclass 36, count 2 2006.229.07:01:55.03#ibcon#read 4, iclass 36, count 2 2006.229.07:01:55.03#ibcon#about to read 5, iclass 36, count 2 2006.229.07:01:55.03#ibcon#read 5, iclass 36, count 2 2006.229.07:01:55.03#ibcon#about to read 6, iclass 36, count 2 2006.229.07:01:55.03#ibcon#read 6, iclass 36, count 2 2006.229.07:01:55.03#ibcon#end of sib2, iclass 36, count 2 2006.229.07:01:55.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.07:01:55.03#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.07:01:55.03#ibcon#[25=AT06-04\r\n] 2006.229.07:01:55.03#ibcon#*before write, iclass 36, count 2 2006.229.07:01:55.03#ibcon#enter sib2, iclass 36, count 2 2006.229.07:01:55.03#ibcon#flushed, iclass 36, count 2 2006.229.07:01:55.03#ibcon#about to write, iclass 36, count 2 2006.229.07:01:55.03#ibcon#wrote, iclass 36, count 2 2006.229.07:01:55.03#ibcon#about to read 3, iclass 36, count 2 2006.229.07:01:55.06#ibcon#read 3, iclass 36, count 2 2006.229.07:01:55.06#ibcon#about to read 4, iclass 36, count 2 2006.229.07:01:55.06#ibcon#read 4, iclass 36, count 2 2006.229.07:01:55.06#ibcon#about to read 5, iclass 36, count 2 2006.229.07:01:55.06#ibcon#read 5, iclass 36, count 2 2006.229.07:01:55.06#ibcon#about to read 6, iclass 36, count 2 2006.229.07:01:55.06#ibcon#read 6, iclass 36, count 2 2006.229.07:01:55.06#ibcon#end of sib2, iclass 36, count 2 2006.229.07:01:55.06#ibcon#*after write, iclass 36, count 2 2006.229.07:01:55.06#ibcon#*before return 0, iclass 36, count 2 2006.229.07:01:55.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:55.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:55.06#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.07:01:55.06#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:55.06#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:55.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:55.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:55.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:01:55.18#ibcon#first serial, iclass 36, count 0 2006.229.07:01:55.18#ibcon#enter sib2, iclass 36, count 0 2006.229.07:01:55.18#ibcon#flushed, iclass 36, count 0 2006.229.07:01:55.18#ibcon#about to write, iclass 36, count 0 2006.229.07:01:55.18#ibcon#wrote, iclass 36, count 0 2006.229.07:01:55.18#ibcon#about to read 3, iclass 36, count 0 2006.229.07:01:55.20#ibcon#read 3, iclass 36, count 0 2006.229.07:01:55.20#ibcon#about to read 4, iclass 36, count 0 2006.229.07:01:55.20#ibcon#read 4, iclass 36, count 0 2006.229.07:01:55.20#ibcon#about to read 5, iclass 36, count 0 2006.229.07:01:55.20#ibcon#read 5, iclass 36, count 0 2006.229.07:01:55.20#ibcon#about to read 6, iclass 36, count 0 2006.229.07:01:55.20#ibcon#read 6, iclass 36, count 0 2006.229.07:01:55.20#ibcon#end of sib2, iclass 36, count 0 2006.229.07:01:55.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:01:55.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:01:55.20#ibcon#[25=USB\r\n] 2006.229.07:01:55.20#ibcon#*before write, iclass 36, count 0 2006.229.07:01:55.20#ibcon#enter sib2, iclass 36, count 0 2006.229.07:01:55.20#ibcon#flushed, iclass 36, count 0 2006.229.07:01:55.20#ibcon#about to write, iclass 36, count 0 2006.229.07:01:55.20#ibcon#wrote, iclass 36, count 0 2006.229.07:01:55.20#ibcon#about to read 3, iclass 36, count 0 2006.229.07:01:55.23#ibcon#read 3, iclass 36, count 0 2006.229.07:01:55.23#ibcon#about to read 4, iclass 36, count 0 2006.229.07:01:55.23#ibcon#read 4, iclass 36, count 0 2006.229.07:01:55.23#ibcon#about to read 5, iclass 36, count 0 2006.229.07:01:55.23#ibcon#read 5, iclass 36, count 0 2006.229.07:01:55.23#ibcon#about to read 6, iclass 36, count 0 2006.229.07:01:55.23#ibcon#read 6, iclass 36, count 0 2006.229.07:01:55.23#ibcon#end of sib2, iclass 36, count 0 2006.229.07:01:55.23#ibcon#*after write, iclass 36, count 0 2006.229.07:01:55.23#ibcon#*before return 0, iclass 36, count 0 2006.229.07:01:55.23#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:55.23#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:55.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:01:55.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:01:55.23$vck44/valo=7,864.99 2006.229.07:01:55.23#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.07:01:55.23#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.07:01:55.23#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:55.23#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:55.23#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:55.23#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:55.23#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:01:55.23#ibcon#first serial, iclass 38, count 0 2006.229.07:01:55.23#ibcon#enter sib2, iclass 38, count 0 2006.229.07:01:55.23#ibcon#flushed, iclass 38, count 0 2006.229.07:01:55.23#ibcon#about to write, iclass 38, count 0 2006.229.07:01:55.23#ibcon#wrote, iclass 38, count 0 2006.229.07:01:55.23#ibcon#about to read 3, iclass 38, count 0 2006.229.07:01:55.25#ibcon#read 3, iclass 38, count 0 2006.229.07:01:55.25#ibcon#about to read 4, iclass 38, count 0 2006.229.07:01:55.25#ibcon#read 4, iclass 38, count 0 2006.229.07:01:55.25#ibcon#about to read 5, iclass 38, count 0 2006.229.07:01:55.25#ibcon#read 5, iclass 38, count 0 2006.229.07:01:55.25#ibcon#about to read 6, iclass 38, count 0 2006.229.07:01:55.25#ibcon#read 6, iclass 38, count 0 2006.229.07:01:55.25#ibcon#end of sib2, iclass 38, count 0 2006.229.07:01:55.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:01:55.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:01:55.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:01:55.25#ibcon#*before write, iclass 38, count 0 2006.229.07:01:55.25#ibcon#enter sib2, iclass 38, count 0 2006.229.07:01:55.25#ibcon#flushed, iclass 38, count 0 2006.229.07:01:55.25#ibcon#about to write, iclass 38, count 0 2006.229.07:01:55.25#ibcon#wrote, iclass 38, count 0 2006.229.07:01:55.25#ibcon#about to read 3, iclass 38, count 0 2006.229.07:01:55.29#ibcon#read 3, iclass 38, count 0 2006.229.07:01:55.29#ibcon#about to read 4, iclass 38, count 0 2006.229.07:01:55.29#ibcon#read 4, iclass 38, count 0 2006.229.07:01:55.29#ibcon#about to read 5, iclass 38, count 0 2006.229.07:01:55.29#ibcon#read 5, iclass 38, count 0 2006.229.07:01:55.29#ibcon#about to read 6, iclass 38, count 0 2006.229.07:01:55.29#ibcon#read 6, iclass 38, count 0 2006.229.07:01:55.29#ibcon#end of sib2, iclass 38, count 0 2006.229.07:01:55.29#ibcon#*after write, iclass 38, count 0 2006.229.07:01:55.29#ibcon#*before return 0, iclass 38, count 0 2006.229.07:01:55.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:55.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:55.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:01:55.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:01:55.29$vck44/va=7,5 2006.229.07:01:55.29#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.07:01:55.29#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.07:01:55.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:55.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:55.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:55.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:55.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.07:01:55.35#ibcon#first serial, iclass 40, count 2 2006.229.07:01:55.35#ibcon#enter sib2, iclass 40, count 2 2006.229.07:01:55.35#ibcon#flushed, iclass 40, count 2 2006.229.07:01:55.35#ibcon#about to write, iclass 40, count 2 2006.229.07:01:55.35#ibcon#wrote, iclass 40, count 2 2006.229.07:01:55.35#ibcon#about to read 3, iclass 40, count 2 2006.229.07:01:55.37#ibcon#read 3, iclass 40, count 2 2006.229.07:01:55.37#ibcon#about to read 4, iclass 40, count 2 2006.229.07:01:55.37#ibcon#read 4, iclass 40, count 2 2006.229.07:01:55.37#ibcon#about to read 5, iclass 40, count 2 2006.229.07:01:55.37#ibcon#read 5, iclass 40, count 2 2006.229.07:01:55.37#ibcon#about to read 6, iclass 40, count 2 2006.229.07:01:55.37#ibcon#read 6, iclass 40, count 2 2006.229.07:01:55.37#ibcon#end of sib2, iclass 40, count 2 2006.229.07:01:55.37#ibcon#*mode == 0, iclass 40, count 2 2006.229.07:01:55.37#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.07:01:55.37#ibcon#[25=AT07-05\r\n] 2006.229.07:01:55.37#ibcon#*before write, iclass 40, count 2 2006.229.07:01:55.37#ibcon#enter sib2, iclass 40, count 2 2006.229.07:01:55.37#ibcon#flushed, iclass 40, count 2 2006.229.07:01:55.37#ibcon#about to write, iclass 40, count 2 2006.229.07:01:55.37#ibcon#wrote, iclass 40, count 2 2006.229.07:01:55.37#ibcon#about to read 3, iclass 40, count 2 2006.229.07:01:55.40#ibcon#read 3, iclass 40, count 2 2006.229.07:01:55.40#ibcon#about to read 4, iclass 40, count 2 2006.229.07:01:55.40#ibcon#read 4, iclass 40, count 2 2006.229.07:01:55.40#ibcon#about to read 5, iclass 40, count 2 2006.229.07:01:55.40#ibcon#read 5, iclass 40, count 2 2006.229.07:01:55.40#ibcon#about to read 6, iclass 40, count 2 2006.229.07:01:55.40#ibcon#read 6, iclass 40, count 2 2006.229.07:01:55.40#ibcon#end of sib2, iclass 40, count 2 2006.229.07:01:55.40#ibcon#*after write, iclass 40, count 2 2006.229.07:01:55.40#ibcon#*before return 0, iclass 40, count 2 2006.229.07:01:55.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:55.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:55.40#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.07:01:55.40#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:55.40#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:55.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:55.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:55.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:01:55.52#ibcon#first serial, iclass 40, count 0 2006.229.07:01:55.52#ibcon#enter sib2, iclass 40, count 0 2006.229.07:01:55.52#ibcon#flushed, iclass 40, count 0 2006.229.07:01:55.52#ibcon#about to write, iclass 40, count 0 2006.229.07:01:55.52#ibcon#wrote, iclass 40, count 0 2006.229.07:01:55.52#ibcon#about to read 3, iclass 40, count 0 2006.229.07:01:55.54#ibcon#read 3, iclass 40, count 0 2006.229.07:01:55.54#ibcon#about to read 4, iclass 40, count 0 2006.229.07:01:55.54#ibcon#read 4, iclass 40, count 0 2006.229.07:01:55.54#ibcon#about to read 5, iclass 40, count 0 2006.229.07:01:55.54#ibcon#read 5, iclass 40, count 0 2006.229.07:01:55.54#ibcon#about to read 6, iclass 40, count 0 2006.229.07:01:55.54#ibcon#read 6, iclass 40, count 0 2006.229.07:01:55.54#ibcon#end of sib2, iclass 40, count 0 2006.229.07:01:55.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:01:55.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:01:55.54#ibcon#[25=USB\r\n] 2006.229.07:01:55.54#ibcon#*before write, iclass 40, count 0 2006.229.07:01:55.54#ibcon#enter sib2, iclass 40, count 0 2006.229.07:01:55.54#ibcon#flushed, iclass 40, count 0 2006.229.07:01:55.54#ibcon#about to write, iclass 40, count 0 2006.229.07:01:55.54#ibcon#wrote, iclass 40, count 0 2006.229.07:01:55.54#ibcon#about to read 3, iclass 40, count 0 2006.229.07:01:55.57#ibcon#read 3, iclass 40, count 0 2006.229.07:01:55.57#ibcon#about to read 4, iclass 40, count 0 2006.229.07:01:55.57#ibcon#read 4, iclass 40, count 0 2006.229.07:01:55.57#ibcon#about to read 5, iclass 40, count 0 2006.229.07:01:55.57#ibcon#read 5, iclass 40, count 0 2006.229.07:01:55.57#ibcon#about to read 6, iclass 40, count 0 2006.229.07:01:55.57#ibcon#read 6, iclass 40, count 0 2006.229.07:01:55.57#ibcon#end of sib2, iclass 40, count 0 2006.229.07:01:55.57#ibcon#*after write, iclass 40, count 0 2006.229.07:01:55.57#ibcon#*before return 0, iclass 40, count 0 2006.229.07:01:55.57#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:55.57#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:55.57#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:01:55.57#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:01:55.57$vck44/valo=8,884.99 2006.229.07:01:55.57#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.07:01:55.57#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.07:01:55.57#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:55.57#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:55.57#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:55.57#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:55.57#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:01:55.57#ibcon#first serial, iclass 4, count 0 2006.229.07:01:55.57#ibcon#enter sib2, iclass 4, count 0 2006.229.07:01:55.57#ibcon#flushed, iclass 4, count 0 2006.229.07:01:55.57#ibcon#about to write, iclass 4, count 0 2006.229.07:01:55.57#ibcon#wrote, iclass 4, count 0 2006.229.07:01:55.57#ibcon#about to read 3, iclass 4, count 0 2006.229.07:01:55.59#ibcon#read 3, iclass 4, count 0 2006.229.07:01:55.59#ibcon#about to read 4, iclass 4, count 0 2006.229.07:01:55.59#ibcon#read 4, iclass 4, count 0 2006.229.07:01:55.59#ibcon#about to read 5, iclass 4, count 0 2006.229.07:01:55.59#ibcon#read 5, iclass 4, count 0 2006.229.07:01:55.59#ibcon#about to read 6, iclass 4, count 0 2006.229.07:01:55.59#ibcon#read 6, iclass 4, count 0 2006.229.07:01:55.59#ibcon#end of sib2, iclass 4, count 0 2006.229.07:01:55.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:01:55.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:01:55.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:01:55.59#ibcon#*before write, iclass 4, count 0 2006.229.07:01:55.59#ibcon#enter sib2, iclass 4, count 0 2006.229.07:01:55.59#ibcon#flushed, iclass 4, count 0 2006.229.07:01:55.59#ibcon#about to write, iclass 4, count 0 2006.229.07:01:55.59#ibcon#wrote, iclass 4, count 0 2006.229.07:01:55.59#ibcon#about to read 3, iclass 4, count 0 2006.229.07:01:55.63#ibcon#read 3, iclass 4, count 0 2006.229.07:01:55.63#ibcon#about to read 4, iclass 4, count 0 2006.229.07:01:55.63#ibcon#read 4, iclass 4, count 0 2006.229.07:01:55.63#ibcon#about to read 5, iclass 4, count 0 2006.229.07:01:55.63#ibcon#read 5, iclass 4, count 0 2006.229.07:01:55.63#ibcon#about to read 6, iclass 4, count 0 2006.229.07:01:55.63#ibcon#read 6, iclass 4, count 0 2006.229.07:01:55.63#ibcon#end of sib2, iclass 4, count 0 2006.229.07:01:55.63#ibcon#*after write, iclass 4, count 0 2006.229.07:01:55.63#ibcon#*before return 0, iclass 4, count 0 2006.229.07:01:55.63#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:55.63#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:55.63#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:01:55.63#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:01:55.63$vck44/va=8,6 2006.229.07:01:55.63#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.07:01:55.63#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.07:01:55.63#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:55.63#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:01:55.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:01:55.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:01:55.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.07:01:55.69#ibcon#first serial, iclass 6, count 2 2006.229.07:01:55.69#ibcon#enter sib2, iclass 6, count 2 2006.229.07:01:55.69#ibcon#flushed, iclass 6, count 2 2006.229.07:01:55.69#ibcon#about to write, iclass 6, count 2 2006.229.07:01:55.69#ibcon#wrote, iclass 6, count 2 2006.229.07:01:55.69#ibcon#about to read 3, iclass 6, count 2 2006.229.07:01:55.71#ibcon#read 3, iclass 6, count 2 2006.229.07:01:55.71#ibcon#about to read 4, iclass 6, count 2 2006.229.07:01:55.71#ibcon#read 4, iclass 6, count 2 2006.229.07:01:55.71#ibcon#about to read 5, iclass 6, count 2 2006.229.07:01:55.71#ibcon#read 5, iclass 6, count 2 2006.229.07:01:55.71#ibcon#about to read 6, iclass 6, count 2 2006.229.07:01:55.71#ibcon#read 6, iclass 6, count 2 2006.229.07:01:55.71#ibcon#end of sib2, iclass 6, count 2 2006.229.07:01:55.71#ibcon#*mode == 0, iclass 6, count 2 2006.229.07:01:55.71#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.07:01:55.71#ibcon#[25=AT08-06\r\n] 2006.229.07:01:55.71#ibcon#*before write, iclass 6, count 2 2006.229.07:01:55.71#ibcon#enter sib2, iclass 6, count 2 2006.229.07:01:55.71#ibcon#flushed, iclass 6, count 2 2006.229.07:01:55.71#ibcon#about to write, iclass 6, count 2 2006.229.07:01:55.71#ibcon#wrote, iclass 6, count 2 2006.229.07:01:55.71#ibcon#about to read 3, iclass 6, count 2 2006.229.07:01:55.74#ibcon#read 3, iclass 6, count 2 2006.229.07:01:55.74#ibcon#about to read 4, iclass 6, count 2 2006.229.07:01:55.74#ibcon#read 4, iclass 6, count 2 2006.229.07:01:55.74#ibcon#about to read 5, iclass 6, count 2 2006.229.07:01:55.74#ibcon#read 5, iclass 6, count 2 2006.229.07:01:55.74#ibcon#about to read 6, iclass 6, count 2 2006.229.07:01:55.74#ibcon#read 6, iclass 6, count 2 2006.229.07:01:55.74#ibcon#end of sib2, iclass 6, count 2 2006.229.07:01:55.74#ibcon#*after write, iclass 6, count 2 2006.229.07:01:55.74#ibcon#*before return 0, iclass 6, count 2 2006.229.07:01:55.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:01:55.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:01:55.74#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.07:01:55.74#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:55.74#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:01:55.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:01:55.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:01:55.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:01:55.86#ibcon#first serial, iclass 6, count 0 2006.229.07:01:55.86#ibcon#enter sib2, iclass 6, count 0 2006.229.07:01:55.86#ibcon#flushed, iclass 6, count 0 2006.229.07:01:55.86#ibcon#about to write, iclass 6, count 0 2006.229.07:01:55.86#ibcon#wrote, iclass 6, count 0 2006.229.07:01:55.86#ibcon#about to read 3, iclass 6, count 0 2006.229.07:01:55.88#ibcon#read 3, iclass 6, count 0 2006.229.07:01:55.88#ibcon#about to read 4, iclass 6, count 0 2006.229.07:01:55.88#ibcon#read 4, iclass 6, count 0 2006.229.07:01:55.88#ibcon#about to read 5, iclass 6, count 0 2006.229.07:01:55.88#ibcon#read 5, iclass 6, count 0 2006.229.07:01:55.88#ibcon#about to read 6, iclass 6, count 0 2006.229.07:01:55.88#ibcon#read 6, iclass 6, count 0 2006.229.07:01:55.88#ibcon#end of sib2, iclass 6, count 0 2006.229.07:01:55.88#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:01:55.88#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:01:55.88#ibcon#[25=USB\r\n] 2006.229.07:01:55.88#ibcon#*before write, iclass 6, count 0 2006.229.07:01:55.88#ibcon#enter sib2, iclass 6, count 0 2006.229.07:01:55.88#ibcon#flushed, iclass 6, count 0 2006.229.07:01:55.88#ibcon#about to write, iclass 6, count 0 2006.229.07:01:55.88#ibcon#wrote, iclass 6, count 0 2006.229.07:01:55.88#ibcon#about to read 3, iclass 6, count 0 2006.229.07:01:55.91#ibcon#read 3, iclass 6, count 0 2006.229.07:01:55.91#ibcon#about to read 4, iclass 6, count 0 2006.229.07:01:55.91#ibcon#read 4, iclass 6, count 0 2006.229.07:01:55.91#ibcon#about to read 5, iclass 6, count 0 2006.229.07:01:55.91#ibcon#read 5, iclass 6, count 0 2006.229.07:01:55.91#ibcon#about to read 6, iclass 6, count 0 2006.229.07:01:55.91#ibcon#read 6, iclass 6, count 0 2006.229.07:01:55.91#ibcon#end of sib2, iclass 6, count 0 2006.229.07:01:55.91#ibcon#*after write, iclass 6, count 0 2006.229.07:01:55.91#ibcon#*before return 0, iclass 6, count 0 2006.229.07:01:55.91#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:01:55.91#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:01:55.91#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:01:55.91#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:01:55.91$vck44/vblo=1,629.99 2006.229.07:01:55.91#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.07:01:55.91#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.07:01:55.91#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:55.91#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:01:55.91#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:01:55.91#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:01:55.91#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:01:55.91#ibcon#first serial, iclass 10, count 0 2006.229.07:01:55.91#ibcon#enter sib2, iclass 10, count 0 2006.229.07:01:55.91#ibcon#flushed, iclass 10, count 0 2006.229.07:01:55.91#ibcon#about to write, iclass 10, count 0 2006.229.07:01:55.91#ibcon#wrote, iclass 10, count 0 2006.229.07:01:55.91#ibcon#about to read 3, iclass 10, count 0 2006.229.07:01:55.93#ibcon#read 3, iclass 10, count 0 2006.229.07:01:55.93#ibcon#about to read 4, iclass 10, count 0 2006.229.07:01:55.93#ibcon#read 4, iclass 10, count 0 2006.229.07:01:55.93#ibcon#about to read 5, iclass 10, count 0 2006.229.07:01:55.93#ibcon#read 5, iclass 10, count 0 2006.229.07:01:55.93#ibcon#about to read 6, iclass 10, count 0 2006.229.07:01:55.93#ibcon#read 6, iclass 10, count 0 2006.229.07:01:55.93#ibcon#end of sib2, iclass 10, count 0 2006.229.07:01:55.93#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:01:55.93#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:01:55.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:01:55.93#ibcon#*before write, iclass 10, count 0 2006.229.07:01:55.93#ibcon#enter sib2, iclass 10, count 0 2006.229.07:01:55.93#ibcon#flushed, iclass 10, count 0 2006.229.07:01:55.93#ibcon#about to write, iclass 10, count 0 2006.229.07:01:55.93#ibcon#wrote, iclass 10, count 0 2006.229.07:01:55.93#ibcon#about to read 3, iclass 10, count 0 2006.229.07:01:55.97#ibcon#read 3, iclass 10, count 0 2006.229.07:01:55.97#ibcon#about to read 4, iclass 10, count 0 2006.229.07:01:55.97#ibcon#read 4, iclass 10, count 0 2006.229.07:01:55.97#ibcon#about to read 5, iclass 10, count 0 2006.229.07:01:55.97#ibcon#read 5, iclass 10, count 0 2006.229.07:01:55.97#ibcon#about to read 6, iclass 10, count 0 2006.229.07:01:55.97#ibcon#read 6, iclass 10, count 0 2006.229.07:01:55.97#ibcon#end of sib2, iclass 10, count 0 2006.229.07:01:55.97#ibcon#*after write, iclass 10, count 0 2006.229.07:01:55.97#ibcon#*before return 0, iclass 10, count 0 2006.229.07:01:55.97#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:01:55.97#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:01:55.97#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:01:55.97#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:01:55.97$vck44/vb=1,4 2006.229.07:01:55.97#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.07:01:55.97#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.07:01:55.97#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:55.97#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:01:55.97#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:01:55.97#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:01:55.97#ibcon#enter wrdev, iclass 12, count 2 2006.229.07:01:55.97#ibcon#first serial, iclass 12, count 2 2006.229.07:01:55.97#ibcon#enter sib2, iclass 12, count 2 2006.229.07:01:55.97#ibcon#flushed, iclass 12, count 2 2006.229.07:01:55.97#ibcon#about to write, iclass 12, count 2 2006.229.07:01:55.97#ibcon#wrote, iclass 12, count 2 2006.229.07:01:55.97#ibcon#about to read 3, iclass 12, count 2 2006.229.07:01:55.99#ibcon#read 3, iclass 12, count 2 2006.229.07:01:55.99#ibcon#about to read 4, iclass 12, count 2 2006.229.07:01:55.99#ibcon#read 4, iclass 12, count 2 2006.229.07:01:55.99#ibcon#about to read 5, iclass 12, count 2 2006.229.07:01:55.99#ibcon#read 5, iclass 12, count 2 2006.229.07:01:55.99#ibcon#about to read 6, iclass 12, count 2 2006.229.07:01:55.99#ibcon#read 6, iclass 12, count 2 2006.229.07:01:55.99#ibcon#end of sib2, iclass 12, count 2 2006.229.07:01:55.99#ibcon#*mode == 0, iclass 12, count 2 2006.229.07:01:55.99#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.07:01:55.99#ibcon#[27=AT01-04\r\n] 2006.229.07:01:55.99#ibcon#*before write, iclass 12, count 2 2006.229.07:01:55.99#ibcon#enter sib2, iclass 12, count 2 2006.229.07:01:55.99#ibcon#flushed, iclass 12, count 2 2006.229.07:01:55.99#ibcon#about to write, iclass 12, count 2 2006.229.07:01:55.99#ibcon#wrote, iclass 12, count 2 2006.229.07:01:55.99#ibcon#about to read 3, iclass 12, count 2 2006.229.07:01:56.02#ibcon#read 3, iclass 12, count 2 2006.229.07:01:56.02#ibcon#about to read 4, iclass 12, count 2 2006.229.07:01:56.02#ibcon#read 4, iclass 12, count 2 2006.229.07:01:56.02#ibcon#about to read 5, iclass 12, count 2 2006.229.07:01:56.02#ibcon#read 5, iclass 12, count 2 2006.229.07:01:56.02#ibcon#about to read 6, iclass 12, count 2 2006.229.07:01:56.02#ibcon#read 6, iclass 12, count 2 2006.229.07:01:56.02#ibcon#end of sib2, iclass 12, count 2 2006.229.07:01:56.02#ibcon#*after write, iclass 12, count 2 2006.229.07:01:56.02#ibcon#*before return 0, iclass 12, count 2 2006.229.07:01:56.02#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:01:56.02#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:01:56.02#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.07:01:56.02#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:56.02#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:01:56.14#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:01:56.14#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:01:56.14#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:01:56.14#ibcon#first serial, iclass 12, count 0 2006.229.07:01:56.14#ibcon#enter sib2, iclass 12, count 0 2006.229.07:01:56.14#ibcon#flushed, iclass 12, count 0 2006.229.07:01:56.14#ibcon#about to write, iclass 12, count 0 2006.229.07:01:56.14#ibcon#wrote, iclass 12, count 0 2006.229.07:01:56.14#ibcon#about to read 3, iclass 12, count 0 2006.229.07:01:56.16#ibcon#read 3, iclass 12, count 0 2006.229.07:01:56.16#ibcon#about to read 4, iclass 12, count 0 2006.229.07:01:56.16#ibcon#read 4, iclass 12, count 0 2006.229.07:01:56.16#ibcon#about to read 5, iclass 12, count 0 2006.229.07:01:56.16#ibcon#read 5, iclass 12, count 0 2006.229.07:01:56.16#ibcon#about to read 6, iclass 12, count 0 2006.229.07:01:56.16#ibcon#read 6, iclass 12, count 0 2006.229.07:01:56.16#ibcon#end of sib2, iclass 12, count 0 2006.229.07:01:56.16#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:01:56.16#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:01:56.16#ibcon#[27=USB\r\n] 2006.229.07:01:56.16#ibcon#*before write, iclass 12, count 0 2006.229.07:01:56.16#ibcon#enter sib2, iclass 12, count 0 2006.229.07:01:56.16#ibcon#flushed, iclass 12, count 0 2006.229.07:01:56.16#ibcon#about to write, iclass 12, count 0 2006.229.07:01:56.16#ibcon#wrote, iclass 12, count 0 2006.229.07:01:56.16#ibcon#about to read 3, iclass 12, count 0 2006.229.07:01:56.19#ibcon#read 3, iclass 12, count 0 2006.229.07:01:56.19#ibcon#about to read 4, iclass 12, count 0 2006.229.07:01:56.19#ibcon#read 4, iclass 12, count 0 2006.229.07:01:56.19#ibcon#about to read 5, iclass 12, count 0 2006.229.07:01:56.19#ibcon#read 5, iclass 12, count 0 2006.229.07:01:56.19#ibcon#about to read 6, iclass 12, count 0 2006.229.07:01:56.19#ibcon#read 6, iclass 12, count 0 2006.229.07:01:56.19#ibcon#end of sib2, iclass 12, count 0 2006.229.07:01:56.19#ibcon#*after write, iclass 12, count 0 2006.229.07:01:56.19#ibcon#*before return 0, iclass 12, count 0 2006.229.07:01:56.19#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:01:56.19#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:01:56.19#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:01:56.19#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:01:56.19$vck44/vblo=2,634.99 2006.229.07:01:56.19#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.07:01:56.19#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.07:01:56.19#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:56.19#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:56.19#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:56.19#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:56.19#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:01:56.19#ibcon#first serial, iclass 14, count 0 2006.229.07:01:56.19#ibcon#enter sib2, iclass 14, count 0 2006.229.07:01:56.19#ibcon#flushed, iclass 14, count 0 2006.229.07:01:56.19#ibcon#about to write, iclass 14, count 0 2006.229.07:01:56.19#ibcon#wrote, iclass 14, count 0 2006.229.07:01:56.19#ibcon#about to read 3, iclass 14, count 0 2006.229.07:01:56.21#ibcon#read 3, iclass 14, count 0 2006.229.07:01:56.21#ibcon#about to read 4, iclass 14, count 0 2006.229.07:01:56.21#ibcon#read 4, iclass 14, count 0 2006.229.07:01:56.21#ibcon#about to read 5, iclass 14, count 0 2006.229.07:01:56.21#ibcon#read 5, iclass 14, count 0 2006.229.07:01:56.21#ibcon#about to read 6, iclass 14, count 0 2006.229.07:01:56.21#ibcon#read 6, iclass 14, count 0 2006.229.07:01:56.21#ibcon#end of sib2, iclass 14, count 0 2006.229.07:01:56.21#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:01:56.21#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:01:56.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:01:56.21#ibcon#*before write, iclass 14, count 0 2006.229.07:01:56.21#ibcon#enter sib2, iclass 14, count 0 2006.229.07:01:56.21#ibcon#flushed, iclass 14, count 0 2006.229.07:01:56.21#ibcon#about to write, iclass 14, count 0 2006.229.07:01:56.21#ibcon#wrote, iclass 14, count 0 2006.229.07:01:56.21#ibcon#about to read 3, iclass 14, count 0 2006.229.07:01:56.25#ibcon#read 3, iclass 14, count 0 2006.229.07:01:56.25#ibcon#about to read 4, iclass 14, count 0 2006.229.07:01:56.25#ibcon#read 4, iclass 14, count 0 2006.229.07:01:56.25#ibcon#about to read 5, iclass 14, count 0 2006.229.07:01:56.25#ibcon#read 5, iclass 14, count 0 2006.229.07:01:56.25#ibcon#about to read 6, iclass 14, count 0 2006.229.07:01:56.25#ibcon#read 6, iclass 14, count 0 2006.229.07:01:56.25#ibcon#end of sib2, iclass 14, count 0 2006.229.07:01:56.25#ibcon#*after write, iclass 14, count 0 2006.229.07:01:56.25#ibcon#*before return 0, iclass 14, count 0 2006.229.07:01:56.25#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:56.25#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:01:56.25#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:01:56.25#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:01:56.25$vck44/vb=2,4 2006.229.07:01:56.25#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.07:01:56.25#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.07:01:56.25#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:56.25#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:56.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:56.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:56.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.07:01:56.31#ibcon#first serial, iclass 16, count 2 2006.229.07:01:56.31#ibcon#enter sib2, iclass 16, count 2 2006.229.07:01:56.31#ibcon#flushed, iclass 16, count 2 2006.229.07:01:56.31#ibcon#about to write, iclass 16, count 2 2006.229.07:01:56.31#ibcon#wrote, iclass 16, count 2 2006.229.07:01:56.31#ibcon#about to read 3, iclass 16, count 2 2006.229.07:01:56.33#ibcon#read 3, iclass 16, count 2 2006.229.07:01:56.33#ibcon#about to read 4, iclass 16, count 2 2006.229.07:01:56.33#ibcon#read 4, iclass 16, count 2 2006.229.07:01:56.33#ibcon#about to read 5, iclass 16, count 2 2006.229.07:01:56.33#ibcon#read 5, iclass 16, count 2 2006.229.07:01:56.33#ibcon#about to read 6, iclass 16, count 2 2006.229.07:01:56.33#ibcon#read 6, iclass 16, count 2 2006.229.07:01:56.33#ibcon#end of sib2, iclass 16, count 2 2006.229.07:01:56.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.07:01:56.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.07:01:56.33#ibcon#[27=AT02-04\r\n] 2006.229.07:01:56.33#ibcon#*before write, iclass 16, count 2 2006.229.07:01:56.33#ibcon#enter sib2, iclass 16, count 2 2006.229.07:01:56.33#ibcon#flushed, iclass 16, count 2 2006.229.07:01:56.33#ibcon#about to write, iclass 16, count 2 2006.229.07:01:56.33#ibcon#wrote, iclass 16, count 2 2006.229.07:01:56.33#ibcon#about to read 3, iclass 16, count 2 2006.229.07:01:56.36#ibcon#read 3, iclass 16, count 2 2006.229.07:01:56.36#ibcon#about to read 4, iclass 16, count 2 2006.229.07:01:56.36#ibcon#read 4, iclass 16, count 2 2006.229.07:01:56.36#ibcon#about to read 5, iclass 16, count 2 2006.229.07:01:56.36#ibcon#read 5, iclass 16, count 2 2006.229.07:01:56.36#ibcon#about to read 6, iclass 16, count 2 2006.229.07:01:56.36#ibcon#read 6, iclass 16, count 2 2006.229.07:01:56.36#ibcon#end of sib2, iclass 16, count 2 2006.229.07:01:56.36#ibcon#*after write, iclass 16, count 2 2006.229.07:01:56.36#ibcon#*before return 0, iclass 16, count 2 2006.229.07:01:56.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:56.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:01:56.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.07:01:56.36#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:56.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:56.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:56.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:56.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:01:56.48#ibcon#first serial, iclass 16, count 0 2006.229.07:01:56.48#ibcon#enter sib2, iclass 16, count 0 2006.229.07:01:56.48#ibcon#flushed, iclass 16, count 0 2006.229.07:01:56.48#ibcon#about to write, iclass 16, count 0 2006.229.07:01:56.48#ibcon#wrote, iclass 16, count 0 2006.229.07:01:56.48#ibcon#about to read 3, iclass 16, count 0 2006.229.07:01:56.50#ibcon#read 3, iclass 16, count 0 2006.229.07:01:56.50#ibcon#about to read 4, iclass 16, count 0 2006.229.07:01:56.50#ibcon#read 4, iclass 16, count 0 2006.229.07:01:56.50#ibcon#about to read 5, iclass 16, count 0 2006.229.07:01:56.50#ibcon#read 5, iclass 16, count 0 2006.229.07:01:56.50#ibcon#about to read 6, iclass 16, count 0 2006.229.07:01:56.50#ibcon#read 6, iclass 16, count 0 2006.229.07:01:56.50#ibcon#end of sib2, iclass 16, count 0 2006.229.07:01:56.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:01:56.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:01:56.50#ibcon#[27=USB\r\n] 2006.229.07:01:56.50#ibcon#*before write, iclass 16, count 0 2006.229.07:01:56.50#ibcon#enter sib2, iclass 16, count 0 2006.229.07:01:56.50#ibcon#flushed, iclass 16, count 0 2006.229.07:01:56.50#ibcon#about to write, iclass 16, count 0 2006.229.07:01:56.50#ibcon#wrote, iclass 16, count 0 2006.229.07:01:56.50#ibcon#about to read 3, iclass 16, count 0 2006.229.07:01:56.53#ibcon#read 3, iclass 16, count 0 2006.229.07:01:56.53#ibcon#about to read 4, iclass 16, count 0 2006.229.07:01:56.53#ibcon#read 4, iclass 16, count 0 2006.229.07:01:56.53#ibcon#about to read 5, iclass 16, count 0 2006.229.07:01:56.53#ibcon#read 5, iclass 16, count 0 2006.229.07:01:56.53#ibcon#about to read 6, iclass 16, count 0 2006.229.07:01:56.53#ibcon#read 6, iclass 16, count 0 2006.229.07:01:56.53#ibcon#end of sib2, iclass 16, count 0 2006.229.07:01:56.53#ibcon#*after write, iclass 16, count 0 2006.229.07:01:56.53#ibcon#*before return 0, iclass 16, count 0 2006.229.07:01:56.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:56.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:01:56.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:01:56.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:01:56.53$vck44/vblo=3,649.99 2006.229.07:01:56.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:01:56.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:01:56.53#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:56.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:56.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:56.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:56.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:01:56.53#ibcon#first serial, iclass 18, count 0 2006.229.07:01:56.53#ibcon#enter sib2, iclass 18, count 0 2006.229.07:01:56.53#ibcon#flushed, iclass 18, count 0 2006.229.07:01:56.53#ibcon#about to write, iclass 18, count 0 2006.229.07:01:56.53#ibcon#wrote, iclass 18, count 0 2006.229.07:01:56.53#ibcon#about to read 3, iclass 18, count 0 2006.229.07:01:56.55#ibcon#read 3, iclass 18, count 0 2006.229.07:01:56.55#ibcon#about to read 4, iclass 18, count 0 2006.229.07:01:56.55#ibcon#read 4, iclass 18, count 0 2006.229.07:01:56.55#ibcon#about to read 5, iclass 18, count 0 2006.229.07:01:56.55#ibcon#read 5, iclass 18, count 0 2006.229.07:01:56.55#ibcon#about to read 6, iclass 18, count 0 2006.229.07:01:56.55#ibcon#read 6, iclass 18, count 0 2006.229.07:01:56.55#ibcon#end of sib2, iclass 18, count 0 2006.229.07:01:56.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:01:56.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:01:56.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:01:56.55#ibcon#*before write, iclass 18, count 0 2006.229.07:01:56.55#ibcon#enter sib2, iclass 18, count 0 2006.229.07:01:56.55#ibcon#flushed, iclass 18, count 0 2006.229.07:01:56.55#ibcon#about to write, iclass 18, count 0 2006.229.07:01:56.55#ibcon#wrote, iclass 18, count 0 2006.229.07:01:56.55#ibcon#about to read 3, iclass 18, count 0 2006.229.07:01:56.59#ibcon#read 3, iclass 18, count 0 2006.229.07:01:56.59#ibcon#about to read 4, iclass 18, count 0 2006.229.07:01:56.59#ibcon#read 4, iclass 18, count 0 2006.229.07:01:56.59#ibcon#about to read 5, iclass 18, count 0 2006.229.07:01:56.59#ibcon#read 5, iclass 18, count 0 2006.229.07:01:56.59#ibcon#about to read 6, iclass 18, count 0 2006.229.07:01:56.59#ibcon#read 6, iclass 18, count 0 2006.229.07:01:56.59#ibcon#end of sib2, iclass 18, count 0 2006.229.07:01:56.59#ibcon#*after write, iclass 18, count 0 2006.229.07:01:56.59#ibcon#*before return 0, iclass 18, count 0 2006.229.07:01:56.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:56.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:01:56.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:01:56.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:01:56.59$vck44/vb=3,4 2006.229.07:01:56.59#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.07:01:56.59#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.07:01:56.59#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:56.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:56.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:56.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:56.65#ibcon#enter wrdev, iclass 20, count 2 2006.229.07:01:56.65#ibcon#first serial, iclass 20, count 2 2006.229.07:01:56.65#ibcon#enter sib2, iclass 20, count 2 2006.229.07:01:56.65#ibcon#flushed, iclass 20, count 2 2006.229.07:01:56.65#ibcon#about to write, iclass 20, count 2 2006.229.07:01:56.65#ibcon#wrote, iclass 20, count 2 2006.229.07:01:56.65#ibcon#about to read 3, iclass 20, count 2 2006.229.07:01:56.67#ibcon#read 3, iclass 20, count 2 2006.229.07:01:56.67#ibcon#about to read 4, iclass 20, count 2 2006.229.07:01:56.67#ibcon#read 4, iclass 20, count 2 2006.229.07:01:56.67#ibcon#about to read 5, iclass 20, count 2 2006.229.07:01:56.67#ibcon#read 5, iclass 20, count 2 2006.229.07:01:56.67#ibcon#about to read 6, iclass 20, count 2 2006.229.07:01:56.67#ibcon#read 6, iclass 20, count 2 2006.229.07:01:56.67#ibcon#end of sib2, iclass 20, count 2 2006.229.07:01:56.67#ibcon#*mode == 0, iclass 20, count 2 2006.229.07:01:56.67#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.07:01:56.67#ibcon#[27=AT03-04\r\n] 2006.229.07:01:56.67#ibcon#*before write, iclass 20, count 2 2006.229.07:01:56.67#ibcon#enter sib2, iclass 20, count 2 2006.229.07:01:56.67#ibcon#flushed, iclass 20, count 2 2006.229.07:01:56.67#ibcon#about to write, iclass 20, count 2 2006.229.07:01:56.67#ibcon#wrote, iclass 20, count 2 2006.229.07:01:56.67#ibcon#about to read 3, iclass 20, count 2 2006.229.07:01:56.70#ibcon#read 3, iclass 20, count 2 2006.229.07:01:56.70#ibcon#about to read 4, iclass 20, count 2 2006.229.07:01:56.70#ibcon#read 4, iclass 20, count 2 2006.229.07:01:56.70#ibcon#about to read 5, iclass 20, count 2 2006.229.07:01:56.70#ibcon#read 5, iclass 20, count 2 2006.229.07:01:56.70#ibcon#about to read 6, iclass 20, count 2 2006.229.07:01:56.70#ibcon#read 6, iclass 20, count 2 2006.229.07:01:56.70#ibcon#end of sib2, iclass 20, count 2 2006.229.07:01:56.70#ibcon#*after write, iclass 20, count 2 2006.229.07:01:56.70#ibcon#*before return 0, iclass 20, count 2 2006.229.07:01:56.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:56.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:01:56.70#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.07:01:56.70#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:56.70#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:56.82#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:56.82#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:56.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:01:56.82#ibcon#first serial, iclass 20, count 0 2006.229.07:01:56.82#ibcon#enter sib2, iclass 20, count 0 2006.229.07:01:56.82#ibcon#flushed, iclass 20, count 0 2006.229.07:01:56.82#ibcon#about to write, iclass 20, count 0 2006.229.07:01:56.82#ibcon#wrote, iclass 20, count 0 2006.229.07:01:56.82#ibcon#about to read 3, iclass 20, count 0 2006.229.07:01:56.84#ibcon#read 3, iclass 20, count 0 2006.229.07:01:56.84#ibcon#about to read 4, iclass 20, count 0 2006.229.07:01:56.84#ibcon#read 4, iclass 20, count 0 2006.229.07:01:56.84#ibcon#about to read 5, iclass 20, count 0 2006.229.07:01:56.84#ibcon#read 5, iclass 20, count 0 2006.229.07:01:56.84#ibcon#about to read 6, iclass 20, count 0 2006.229.07:01:56.84#ibcon#read 6, iclass 20, count 0 2006.229.07:01:56.84#ibcon#end of sib2, iclass 20, count 0 2006.229.07:01:56.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:01:56.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:01:56.84#ibcon#[27=USB\r\n] 2006.229.07:01:56.84#ibcon#*before write, iclass 20, count 0 2006.229.07:01:56.84#ibcon#enter sib2, iclass 20, count 0 2006.229.07:01:56.84#ibcon#flushed, iclass 20, count 0 2006.229.07:01:56.84#ibcon#about to write, iclass 20, count 0 2006.229.07:01:56.84#ibcon#wrote, iclass 20, count 0 2006.229.07:01:56.84#ibcon#about to read 3, iclass 20, count 0 2006.229.07:01:56.87#ibcon#read 3, iclass 20, count 0 2006.229.07:01:56.87#ibcon#about to read 4, iclass 20, count 0 2006.229.07:01:56.87#ibcon#read 4, iclass 20, count 0 2006.229.07:01:56.87#ibcon#about to read 5, iclass 20, count 0 2006.229.07:01:56.87#ibcon#read 5, iclass 20, count 0 2006.229.07:01:56.87#ibcon#about to read 6, iclass 20, count 0 2006.229.07:01:56.87#ibcon#read 6, iclass 20, count 0 2006.229.07:01:56.87#ibcon#end of sib2, iclass 20, count 0 2006.229.07:01:56.87#ibcon#*after write, iclass 20, count 0 2006.229.07:01:56.87#ibcon#*before return 0, iclass 20, count 0 2006.229.07:01:56.87#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:56.87#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:01:56.87#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:01:56.87#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:01:56.87$vck44/vblo=4,679.99 2006.229.07:01:56.87#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.07:01:56.87#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.07:01:56.87#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:56.87#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:56.87#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:56.87#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:56.87#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:01:56.87#ibcon#first serial, iclass 22, count 0 2006.229.07:01:56.87#ibcon#enter sib2, iclass 22, count 0 2006.229.07:01:56.87#ibcon#flushed, iclass 22, count 0 2006.229.07:01:56.87#ibcon#about to write, iclass 22, count 0 2006.229.07:01:56.87#ibcon#wrote, iclass 22, count 0 2006.229.07:01:56.87#ibcon#about to read 3, iclass 22, count 0 2006.229.07:01:56.89#ibcon#read 3, iclass 22, count 0 2006.229.07:01:56.89#ibcon#about to read 4, iclass 22, count 0 2006.229.07:01:56.89#ibcon#read 4, iclass 22, count 0 2006.229.07:01:56.89#ibcon#about to read 5, iclass 22, count 0 2006.229.07:01:56.89#ibcon#read 5, iclass 22, count 0 2006.229.07:01:56.89#ibcon#about to read 6, iclass 22, count 0 2006.229.07:01:56.89#ibcon#read 6, iclass 22, count 0 2006.229.07:01:56.89#ibcon#end of sib2, iclass 22, count 0 2006.229.07:01:56.89#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:01:56.89#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:01:56.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:01:56.89#ibcon#*before write, iclass 22, count 0 2006.229.07:01:56.89#ibcon#enter sib2, iclass 22, count 0 2006.229.07:01:56.89#ibcon#flushed, iclass 22, count 0 2006.229.07:01:56.89#ibcon#about to write, iclass 22, count 0 2006.229.07:01:56.89#ibcon#wrote, iclass 22, count 0 2006.229.07:01:56.89#ibcon#about to read 3, iclass 22, count 0 2006.229.07:01:56.93#ibcon#read 3, iclass 22, count 0 2006.229.07:01:56.93#ibcon#about to read 4, iclass 22, count 0 2006.229.07:01:56.93#ibcon#read 4, iclass 22, count 0 2006.229.07:01:56.93#ibcon#about to read 5, iclass 22, count 0 2006.229.07:01:56.93#ibcon#read 5, iclass 22, count 0 2006.229.07:01:56.93#ibcon#about to read 6, iclass 22, count 0 2006.229.07:01:56.93#ibcon#read 6, iclass 22, count 0 2006.229.07:01:56.93#ibcon#end of sib2, iclass 22, count 0 2006.229.07:01:56.93#ibcon#*after write, iclass 22, count 0 2006.229.07:01:56.93#ibcon#*before return 0, iclass 22, count 0 2006.229.07:01:56.93#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:56.93#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:01:56.93#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:01:56.93#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:01:56.93$vck44/vb=4,4 2006.229.07:01:56.93#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.07:01:56.93#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.07:01:56.93#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:56.93#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:56.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:56.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:56.99#ibcon#enter wrdev, iclass 24, count 2 2006.229.07:01:56.99#ibcon#first serial, iclass 24, count 2 2006.229.07:01:56.99#ibcon#enter sib2, iclass 24, count 2 2006.229.07:01:56.99#ibcon#flushed, iclass 24, count 2 2006.229.07:01:56.99#ibcon#about to write, iclass 24, count 2 2006.229.07:01:56.99#ibcon#wrote, iclass 24, count 2 2006.229.07:01:56.99#ibcon#about to read 3, iclass 24, count 2 2006.229.07:01:57.01#ibcon#read 3, iclass 24, count 2 2006.229.07:01:57.01#ibcon#about to read 4, iclass 24, count 2 2006.229.07:01:57.01#ibcon#read 4, iclass 24, count 2 2006.229.07:01:57.01#ibcon#about to read 5, iclass 24, count 2 2006.229.07:01:57.01#ibcon#read 5, iclass 24, count 2 2006.229.07:01:57.01#ibcon#about to read 6, iclass 24, count 2 2006.229.07:01:57.01#ibcon#read 6, iclass 24, count 2 2006.229.07:01:57.01#ibcon#end of sib2, iclass 24, count 2 2006.229.07:01:57.01#ibcon#*mode == 0, iclass 24, count 2 2006.229.07:01:57.01#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.07:01:57.01#ibcon#[27=AT04-04\r\n] 2006.229.07:01:57.01#ibcon#*before write, iclass 24, count 2 2006.229.07:01:57.01#ibcon#enter sib2, iclass 24, count 2 2006.229.07:01:57.01#ibcon#flushed, iclass 24, count 2 2006.229.07:01:57.01#ibcon#about to write, iclass 24, count 2 2006.229.07:01:57.01#ibcon#wrote, iclass 24, count 2 2006.229.07:01:57.01#ibcon#about to read 3, iclass 24, count 2 2006.229.07:01:57.04#ibcon#read 3, iclass 24, count 2 2006.229.07:01:57.04#ibcon#about to read 4, iclass 24, count 2 2006.229.07:01:57.04#ibcon#read 4, iclass 24, count 2 2006.229.07:01:57.04#ibcon#about to read 5, iclass 24, count 2 2006.229.07:01:57.04#ibcon#read 5, iclass 24, count 2 2006.229.07:01:57.04#ibcon#about to read 6, iclass 24, count 2 2006.229.07:01:57.04#ibcon#read 6, iclass 24, count 2 2006.229.07:01:57.04#ibcon#end of sib2, iclass 24, count 2 2006.229.07:01:57.04#ibcon#*after write, iclass 24, count 2 2006.229.07:01:57.04#ibcon#*before return 0, iclass 24, count 2 2006.229.07:01:57.04#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:57.04#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:01:57.04#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.07:01:57.04#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:57.04#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:57.16#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:57.16#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:57.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:01:57.16#ibcon#first serial, iclass 24, count 0 2006.229.07:01:57.16#ibcon#enter sib2, iclass 24, count 0 2006.229.07:01:57.16#ibcon#flushed, iclass 24, count 0 2006.229.07:01:57.16#ibcon#about to write, iclass 24, count 0 2006.229.07:01:57.16#ibcon#wrote, iclass 24, count 0 2006.229.07:01:57.16#ibcon#about to read 3, iclass 24, count 0 2006.229.07:01:57.18#ibcon#read 3, iclass 24, count 0 2006.229.07:01:57.18#ibcon#about to read 4, iclass 24, count 0 2006.229.07:01:57.18#ibcon#read 4, iclass 24, count 0 2006.229.07:01:57.18#ibcon#about to read 5, iclass 24, count 0 2006.229.07:01:57.18#ibcon#read 5, iclass 24, count 0 2006.229.07:01:57.18#ibcon#about to read 6, iclass 24, count 0 2006.229.07:01:57.18#ibcon#read 6, iclass 24, count 0 2006.229.07:01:57.18#ibcon#end of sib2, iclass 24, count 0 2006.229.07:01:57.18#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:01:57.18#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:01:57.18#ibcon#[27=USB\r\n] 2006.229.07:01:57.18#ibcon#*before write, iclass 24, count 0 2006.229.07:01:57.18#ibcon#enter sib2, iclass 24, count 0 2006.229.07:01:57.18#ibcon#flushed, iclass 24, count 0 2006.229.07:01:57.18#ibcon#about to write, iclass 24, count 0 2006.229.07:01:57.18#ibcon#wrote, iclass 24, count 0 2006.229.07:01:57.18#ibcon#about to read 3, iclass 24, count 0 2006.229.07:01:57.21#ibcon#read 3, iclass 24, count 0 2006.229.07:01:57.21#ibcon#about to read 4, iclass 24, count 0 2006.229.07:01:57.21#ibcon#read 4, iclass 24, count 0 2006.229.07:01:57.21#ibcon#about to read 5, iclass 24, count 0 2006.229.07:01:57.21#ibcon#read 5, iclass 24, count 0 2006.229.07:01:57.21#ibcon#about to read 6, iclass 24, count 0 2006.229.07:01:57.21#ibcon#read 6, iclass 24, count 0 2006.229.07:01:57.21#ibcon#end of sib2, iclass 24, count 0 2006.229.07:01:57.21#ibcon#*after write, iclass 24, count 0 2006.229.07:01:57.21#ibcon#*before return 0, iclass 24, count 0 2006.229.07:01:57.21#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:57.21#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:01:57.21#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:01:57.21#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:01:57.21$vck44/vblo=5,709.99 2006.229.07:01:57.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.07:01:57.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.07:01:57.21#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:57.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:57.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:57.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:57.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:01:57.21#ibcon#first serial, iclass 26, count 0 2006.229.07:01:57.21#ibcon#enter sib2, iclass 26, count 0 2006.229.07:01:57.21#ibcon#flushed, iclass 26, count 0 2006.229.07:01:57.21#ibcon#about to write, iclass 26, count 0 2006.229.07:01:57.21#ibcon#wrote, iclass 26, count 0 2006.229.07:01:57.21#ibcon#about to read 3, iclass 26, count 0 2006.229.07:01:57.23#ibcon#read 3, iclass 26, count 0 2006.229.07:01:57.23#ibcon#about to read 4, iclass 26, count 0 2006.229.07:01:57.23#ibcon#read 4, iclass 26, count 0 2006.229.07:01:57.23#ibcon#about to read 5, iclass 26, count 0 2006.229.07:01:57.23#ibcon#read 5, iclass 26, count 0 2006.229.07:01:57.23#ibcon#about to read 6, iclass 26, count 0 2006.229.07:01:57.23#ibcon#read 6, iclass 26, count 0 2006.229.07:01:57.23#ibcon#end of sib2, iclass 26, count 0 2006.229.07:01:57.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:01:57.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:01:57.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:01:57.23#ibcon#*before write, iclass 26, count 0 2006.229.07:01:57.23#ibcon#enter sib2, iclass 26, count 0 2006.229.07:01:57.23#ibcon#flushed, iclass 26, count 0 2006.229.07:01:57.23#ibcon#about to write, iclass 26, count 0 2006.229.07:01:57.23#ibcon#wrote, iclass 26, count 0 2006.229.07:01:57.23#ibcon#about to read 3, iclass 26, count 0 2006.229.07:01:57.27#ibcon#read 3, iclass 26, count 0 2006.229.07:01:57.27#ibcon#about to read 4, iclass 26, count 0 2006.229.07:01:57.27#ibcon#read 4, iclass 26, count 0 2006.229.07:01:57.27#ibcon#about to read 5, iclass 26, count 0 2006.229.07:01:57.27#ibcon#read 5, iclass 26, count 0 2006.229.07:01:57.27#ibcon#about to read 6, iclass 26, count 0 2006.229.07:01:57.27#ibcon#read 6, iclass 26, count 0 2006.229.07:01:57.27#ibcon#end of sib2, iclass 26, count 0 2006.229.07:01:57.27#ibcon#*after write, iclass 26, count 0 2006.229.07:01:57.27#ibcon#*before return 0, iclass 26, count 0 2006.229.07:01:57.27#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:57.27#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:01:57.27#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:01:57.27#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:01:57.27$vck44/vb=5,4 2006.229.07:01:57.27#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.07:01:57.27#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.07:01:57.27#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:57.27#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:57.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:57.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:57.33#ibcon#enter wrdev, iclass 28, count 2 2006.229.07:01:57.33#ibcon#first serial, iclass 28, count 2 2006.229.07:01:57.33#ibcon#enter sib2, iclass 28, count 2 2006.229.07:01:57.33#ibcon#flushed, iclass 28, count 2 2006.229.07:01:57.33#ibcon#about to write, iclass 28, count 2 2006.229.07:01:57.33#ibcon#wrote, iclass 28, count 2 2006.229.07:01:57.33#ibcon#about to read 3, iclass 28, count 2 2006.229.07:01:57.35#ibcon#read 3, iclass 28, count 2 2006.229.07:01:57.35#ibcon#about to read 4, iclass 28, count 2 2006.229.07:01:57.35#ibcon#read 4, iclass 28, count 2 2006.229.07:01:57.35#ibcon#about to read 5, iclass 28, count 2 2006.229.07:01:57.35#ibcon#read 5, iclass 28, count 2 2006.229.07:01:57.35#ibcon#about to read 6, iclass 28, count 2 2006.229.07:01:57.35#ibcon#read 6, iclass 28, count 2 2006.229.07:01:57.35#ibcon#end of sib2, iclass 28, count 2 2006.229.07:01:57.35#ibcon#*mode == 0, iclass 28, count 2 2006.229.07:01:57.35#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.07:01:57.35#ibcon#[27=AT05-04\r\n] 2006.229.07:01:57.35#ibcon#*before write, iclass 28, count 2 2006.229.07:01:57.35#ibcon#enter sib2, iclass 28, count 2 2006.229.07:01:57.35#ibcon#flushed, iclass 28, count 2 2006.229.07:01:57.35#ibcon#about to write, iclass 28, count 2 2006.229.07:01:57.35#ibcon#wrote, iclass 28, count 2 2006.229.07:01:57.35#ibcon#about to read 3, iclass 28, count 2 2006.229.07:01:57.38#ibcon#read 3, iclass 28, count 2 2006.229.07:01:57.38#ibcon#about to read 4, iclass 28, count 2 2006.229.07:01:57.38#ibcon#read 4, iclass 28, count 2 2006.229.07:01:57.38#ibcon#about to read 5, iclass 28, count 2 2006.229.07:01:57.38#ibcon#read 5, iclass 28, count 2 2006.229.07:01:57.38#ibcon#about to read 6, iclass 28, count 2 2006.229.07:01:57.38#ibcon#read 6, iclass 28, count 2 2006.229.07:01:57.38#ibcon#end of sib2, iclass 28, count 2 2006.229.07:01:57.38#ibcon#*after write, iclass 28, count 2 2006.229.07:01:57.38#ibcon#*before return 0, iclass 28, count 2 2006.229.07:01:57.38#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:57.38#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:01:57.38#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.07:01:57.38#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:57.38#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:57.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:57.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:57.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:01:57.50#ibcon#first serial, iclass 28, count 0 2006.229.07:01:57.50#ibcon#enter sib2, iclass 28, count 0 2006.229.07:01:57.50#ibcon#flushed, iclass 28, count 0 2006.229.07:01:57.50#ibcon#about to write, iclass 28, count 0 2006.229.07:01:57.50#ibcon#wrote, iclass 28, count 0 2006.229.07:01:57.50#ibcon#about to read 3, iclass 28, count 0 2006.229.07:01:57.52#ibcon#read 3, iclass 28, count 0 2006.229.07:01:57.52#ibcon#about to read 4, iclass 28, count 0 2006.229.07:01:57.52#ibcon#read 4, iclass 28, count 0 2006.229.07:01:57.52#ibcon#about to read 5, iclass 28, count 0 2006.229.07:01:57.52#ibcon#read 5, iclass 28, count 0 2006.229.07:01:57.52#ibcon#about to read 6, iclass 28, count 0 2006.229.07:01:57.52#ibcon#read 6, iclass 28, count 0 2006.229.07:01:57.52#ibcon#end of sib2, iclass 28, count 0 2006.229.07:01:57.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:01:57.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:01:57.52#ibcon#[27=USB\r\n] 2006.229.07:01:57.52#ibcon#*before write, iclass 28, count 0 2006.229.07:01:57.52#ibcon#enter sib2, iclass 28, count 0 2006.229.07:01:57.52#ibcon#flushed, iclass 28, count 0 2006.229.07:01:57.52#ibcon#about to write, iclass 28, count 0 2006.229.07:01:57.52#ibcon#wrote, iclass 28, count 0 2006.229.07:01:57.52#ibcon#about to read 3, iclass 28, count 0 2006.229.07:01:57.55#ibcon#read 3, iclass 28, count 0 2006.229.07:01:57.55#ibcon#about to read 4, iclass 28, count 0 2006.229.07:01:57.55#ibcon#read 4, iclass 28, count 0 2006.229.07:01:57.55#ibcon#about to read 5, iclass 28, count 0 2006.229.07:01:57.55#ibcon#read 5, iclass 28, count 0 2006.229.07:01:57.55#ibcon#about to read 6, iclass 28, count 0 2006.229.07:01:57.55#ibcon#read 6, iclass 28, count 0 2006.229.07:01:57.55#ibcon#end of sib2, iclass 28, count 0 2006.229.07:01:57.55#ibcon#*after write, iclass 28, count 0 2006.229.07:01:57.55#ibcon#*before return 0, iclass 28, count 0 2006.229.07:01:57.55#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:57.55#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:01:57.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:01:57.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:01:57.55$vck44/vblo=6,719.99 2006.229.07:01:57.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:01:57.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:01:57.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:57.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:57.55#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:57.55#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:57.55#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:01:57.55#ibcon#first serial, iclass 30, count 0 2006.229.07:01:57.55#ibcon#enter sib2, iclass 30, count 0 2006.229.07:01:57.55#ibcon#flushed, iclass 30, count 0 2006.229.07:01:57.55#ibcon#about to write, iclass 30, count 0 2006.229.07:01:57.55#ibcon#wrote, iclass 30, count 0 2006.229.07:01:57.55#ibcon#about to read 3, iclass 30, count 0 2006.229.07:01:57.57#ibcon#read 3, iclass 30, count 0 2006.229.07:01:57.57#ibcon#about to read 4, iclass 30, count 0 2006.229.07:01:57.57#ibcon#read 4, iclass 30, count 0 2006.229.07:01:57.57#ibcon#about to read 5, iclass 30, count 0 2006.229.07:01:57.57#ibcon#read 5, iclass 30, count 0 2006.229.07:01:57.57#ibcon#about to read 6, iclass 30, count 0 2006.229.07:01:57.57#ibcon#read 6, iclass 30, count 0 2006.229.07:01:57.57#ibcon#end of sib2, iclass 30, count 0 2006.229.07:01:57.57#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:01:57.57#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:01:57.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:01:57.57#ibcon#*before write, iclass 30, count 0 2006.229.07:01:57.57#ibcon#enter sib2, iclass 30, count 0 2006.229.07:01:57.57#ibcon#flushed, iclass 30, count 0 2006.229.07:01:57.57#ibcon#about to write, iclass 30, count 0 2006.229.07:01:57.57#ibcon#wrote, iclass 30, count 0 2006.229.07:01:57.57#ibcon#about to read 3, iclass 30, count 0 2006.229.07:01:57.61#ibcon#read 3, iclass 30, count 0 2006.229.07:01:57.61#ibcon#about to read 4, iclass 30, count 0 2006.229.07:01:57.61#ibcon#read 4, iclass 30, count 0 2006.229.07:01:57.61#ibcon#about to read 5, iclass 30, count 0 2006.229.07:01:57.61#ibcon#read 5, iclass 30, count 0 2006.229.07:01:57.61#ibcon#about to read 6, iclass 30, count 0 2006.229.07:01:57.61#ibcon#read 6, iclass 30, count 0 2006.229.07:01:57.61#ibcon#end of sib2, iclass 30, count 0 2006.229.07:01:57.61#ibcon#*after write, iclass 30, count 0 2006.229.07:01:57.61#ibcon#*before return 0, iclass 30, count 0 2006.229.07:01:57.61#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:57.61#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:01:57.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:01:57.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:01:57.61$vck44/vb=6,4 2006.229.07:01:57.61#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.07:01:57.61#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.07:01:57.61#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:57.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:57.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:57.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:57.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.07:01:57.67#ibcon#first serial, iclass 32, count 2 2006.229.07:01:57.67#ibcon#enter sib2, iclass 32, count 2 2006.229.07:01:57.67#ibcon#flushed, iclass 32, count 2 2006.229.07:01:57.67#ibcon#about to write, iclass 32, count 2 2006.229.07:01:57.67#ibcon#wrote, iclass 32, count 2 2006.229.07:01:57.67#ibcon#about to read 3, iclass 32, count 2 2006.229.07:01:57.69#ibcon#read 3, iclass 32, count 2 2006.229.07:01:57.69#ibcon#about to read 4, iclass 32, count 2 2006.229.07:01:57.69#ibcon#read 4, iclass 32, count 2 2006.229.07:01:57.69#ibcon#about to read 5, iclass 32, count 2 2006.229.07:01:57.69#ibcon#read 5, iclass 32, count 2 2006.229.07:01:57.69#ibcon#about to read 6, iclass 32, count 2 2006.229.07:01:57.69#ibcon#read 6, iclass 32, count 2 2006.229.07:01:57.69#ibcon#end of sib2, iclass 32, count 2 2006.229.07:01:57.69#ibcon#*mode == 0, iclass 32, count 2 2006.229.07:01:57.69#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.07:01:57.69#ibcon#[27=AT06-04\r\n] 2006.229.07:01:57.69#ibcon#*before write, iclass 32, count 2 2006.229.07:01:57.69#ibcon#enter sib2, iclass 32, count 2 2006.229.07:01:57.69#ibcon#flushed, iclass 32, count 2 2006.229.07:01:57.69#ibcon#about to write, iclass 32, count 2 2006.229.07:01:57.69#ibcon#wrote, iclass 32, count 2 2006.229.07:01:57.69#ibcon#about to read 3, iclass 32, count 2 2006.229.07:01:57.72#ibcon#read 3, iclass 32, count 2 2006.229.07:01:57.72#ibcon#about to read 4, iclass 32, count 2 2006.229.07:01:57.72#ibcon#read 4, iclass 32, count 2 2006.229.07:01:57.72#ibcon#about to read 5, iclass 32, count 2 2006.229.07:01:57.72#ibcon#read 5, iclass 32, count 2 2006.229.07:01:57.72#ibcon#about to read 6, iclass 32, count 2 2006.229.07:01:57.72#ibcon#read 6, iclass 32, count 2 2006.229.07:01:57.72#ibcon#end of sib2, iclass 32, count 2 2006.229.07:01:57.72#ibcon#*after write, iclass 32, count 2 2006.229.07:01:57.72#ibcon#*before return 0, iclass 32, count 2 2006.229.07:01:57.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:57.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:01:57.72#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.07:01:57.72#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:57.72#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:57.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:57.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:57.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:01:57.84#ibcon#first serial, iclass 32, count 0 2006.229.07:01:57.84#ibcon#enter sib2, iclass 32, count 0 2006.229.07:01:57.84#ibcon#flushed, iclass 32, count 0 2006.229.07:01:57.84#ibcon#about to write, iclass 32, count 0 2006.229.07:01:57.84#ibcon#wrote, iclass 32, count 0 2006.229.07:01:57.84#ibcon#about to read 3, iclass 32, count 0 2006.229.07:01:57.86#ibcon#read 3, iclass 32, count 0 2006.229.07:01:57.86#ibcon#about to read 4, iclass 32, count 0 2006.229.07:01:57.86#ibcon#read 4, iclass 32, count 0 2006.229.07:01:57.86#ibcon#about to read 5, iclass 32, count 0 2006.229.07:01:57.86#ibcon#read 5, iclass 32, count 0 2006.229.07:01:57.86#ibcon#about to read 6, iclass 32, count 0 2006.229.07:01:57.86#ibcon#read 6, iclass 32, count 0 2006.229.07:01:57.86#ibcon#end of sib2, iclass 32, count 0 2006.229.07:01:57.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:01:57.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:01:57.86#ibcon#[27=USB\r\n] 2006.229.07:01:57.86#ibcon#*before write, iclass 32, count 0 2006.229.07:01:57.86#ibcon#enter sib2, iclass 32, count 0 2006.229.07:01:57.86#ibcon#flushed, iclass 32, count 0 2006.229.07:01:57.86#ibcon#about to write, iclass 32, count 0 2006.229.07:01:57.86#ibcon#wrote, iclass 32, count 0 2006.229.07:01:57.86#ibcon#about to read 3, iclass 32, count 0 2006.229.07:01:57.89#ibcon#read 3, iclass 32, count 0 2006.229.07:01:57.89#ibcon#about to read 4, iclass 32, count 0 2006.229.07:01:57.89#ibcon#read 4, iclass 32, count 0 2006.229.07:01:57.89#ibcon#about to read 5, iclass 32, count 0 2006.229.07:01:57.89#ibcon#read 5, iclass 32, count 0 2006.229.07:01:57.89#ibcon#about to read 6, iclass 32, count 0 2006.229.07:01:57.89#ibcon#read 6, iclass 32, count 0 2006.229.07:01:57.89#ibcon#end of sib2, iclass 32, count 0 2006.229.07:01:57.89#ibcon#*after write, iclass 32, count 0 2006.229.07:01:57.89#ibcon#*before return 0, iclass 32, count 0 2006.229.07:01:57.89#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:57.89#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:01:57.89#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:01:57.89#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:01:57.89$vck44/vblo=7,734.99 2006.229.07:01:57.89#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.07:01:57.89#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.07:01:57.89#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:57.89#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:57.89#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:57.89#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:57.89#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:01:57.89#ibcon#first serial, iclass 34, count 0 2006.229.07:01:57.89#ibcon#enter sib2, iclass 34, count 0 2006.229.07:01:57.89#ibcon#flushed, iclass 34, count 0 2006.229.07:01:57.89#ibcon#about to write, iclass 34, count 0 2006.229.07:01:57.89#ibcon#wrote, iclass 34, count 0 2006.229.07:01:57.89#ibcon#about to read 3, iclass 34, count 0 2006.229.07:01:57.91#ibcon#read 3, iclass 34, count 0 2006.229.07:01:57.91#ibcon#about to read 4, iclass 34, count 0 2006.229.07:01:57.91#ibcon#read 4, iclass 34, count 0 2006.229.07:01:57.91#ibcon#about to read 5, iclass 34, count 0 2006.229.07:01:57.91#ibcon#read 5, iclass 34, count 0 2006.229.07:01:57.91#ibcon#about to read 6, iclass 34, count 0 2006.229.07:01:57.91#ibcon#read 6, iclass 34, count 0 2006.229.07:01:57.91#ibcon#end of sib2, iclass 34, count 0 2006.229.07:01:57.91#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:01:57.91#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:01:57.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:01:57.91#ibcon#*before write, iclass 34, count 0 2006.229.07:01:57.91#ibcon#enter sib2, iclass 34, count 0 2006.229.07:01:57.91#ibcon#flushed, iclass 34, count 0 2006.229.07:01:57.91#ibcon#about to write, iclass 34, count 0 2006.229.07:01:57.91#ibcon#wrote, iclass 34, count 0 2006.229.07:01:57.91#ibcon#about to read 3, iclass 34, count 0 2006.229.07:01:57.95#ibcon#read 3, iclass 34, count 0 2006.229.07:01:57.95#ibcon#about to read 4, iclass 34, count 0 2006.229.07:01:57.95#ibcon#read 4, iclass 34, count 0 2006.229.07:01:57.95#ibcon#about to read 5, iclass 34, count 0 2006.229.07:01:57.95#ibcon#read 5, iclass 34, count 0 2006.229.07:01:57.95#ibcon#about to read 6, iclass 34, count 0 2006.229.07:01:57.95#ibcon#read 6, iclass 34, count 0 2006.229.07:01:57.95#ibcon#end of sib2, iclass 34, count 0 2006.229.07:01:57.95#ibcon#*after write, iclass 34, count 0 2006.229.07:01:57.95#ibcon#*before return 0, iclass 34, count 0 2006.229.07:01:57.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:57.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:01:57.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:01:57.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:01:57.95$vck44/vb=7,4 2006.229.07:01:57.95#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.07:01:57.95#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.07:01:57.95#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:57.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:58.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:58.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:58.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.07:01:58.01#ibcon#first serial, iclass 36, count 2 2006.229.07:01:58.01#ibcon#enter sib2, iclass 36, count 2 2006.229.07:01:58.01#ibcon#flushed, iclass 36, count 2 2006.229.07:01:58.01#ibcon#about to write, iclass 36, count 2 2006.229.07:01:58.01#ibcon#wrote, iclass 36, count 2 2006.229.07:01:58.01#ibcon#about to read 3, iclass 36, count 2 2006.229.07:01:58.03#ibcon#read 3, iclass 36, count 2 2006.229.07:01:58.03#ibcon#about to read 4, iclass 36, count 2 2006.229.07:01:58.03#ibcon#read 4, iclass 36, count 2 2006.229.07:01:58.03#ibcon#about to read 5, iclass 36, count 2 2006.229.07:01:58.03#ibcon#read 5, iclass 36, count 2 2006.229.07:01:58.03#ibcon#about to read 6, iclass 36, count 2 2006.229.07:01:58.03#ibcon#read 6, iclass 36, count 2 2006.229.07:01:58.03#ibcon#end of sib2, iclass 36, count 2 2006.229.07:01:58.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.07:01:58.03#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.07:01:58.03#ibcon#[27=AT07-04\r\n] 2006.229.07:01:58.03#ibcon#*before write, iclass 36, count 2 2006.229.07:01:58.03#ibcon#enter sib2, iclass 36, count 2 2006.229.07:01:58.03#ibcon#flushed, iclass 36, count 2 2006.229.07:01:58.03#ibcon#about to write, iclass 36, count 2 2006.229.07:01:58.03#ibcon#wrote, iclass 36, count 2 2006.229.07:01:58.03#ibcon#about to read 3, iclass 36, count 2 2006.229.07:01:58.06#ibcon#read 3, iclass 36, count 2 2006.229.07:01:58.06#ibcon#about to read 4, iclass 36, count 2 2006.229.07:01:58.06#ibcon#read 4, iclass 36, count 2 2006.229.07:01:58.06#ibcon#about to read 5, iclass 36, count 2 2006.229.07:01:58.06#ibcon#read 5, iclass 36, count 2 2006.229.07:01:58.06#ibcon#about to read 6, iclass 36, count 2 2006.229.07:01:58.06#ibcon#read 6, iclass 36, count 2 2006.229.07:01:58.06#ibcon#end of sib2, iclass 36, count 2 2006.229.07:01:58.06#ibcon#*after write, iclass 36, count 2 2006.229.07:01:58.06#ibcon#*before return 0, iclass 36, count 2 2006.229.07:01:58.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:58.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:01:58.06#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.07:01:58.06#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:58.06#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:58.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:58.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:58.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:01:58.18#ibcon#first serial, iclass 36, count 0 2006.229.07:01:58.18#ibcon#enter sib2, iclass 36, count 0 2006.229.07:01:58.18#ibcon#flushed, iclass 36, count 0 2006.229.07:01:58.18#ibcon#about to write, iclass 36, count 0 2006.229.07:01:58.18#ibcon#wrote, iclass 36, count 0 2006.229.07:01:58.18#ibcon#about to read 3, iclass 36, count 0 2006.229.07:01:58.20#ibcon#read 3, iclass 36, count 0 2006.229.07:01:58.20#ibcon#about to read 4, iclass 36, count 0 2006.229.07:01:58.20#ibcon#read 4, iclass 36, count 0 2006.229.07:01:58.20#ibcon#about to read 5, iclass 36, count 0 2006.229.07:01:58.20#ibcon#read 5, iclass 36, count 0 2006.229.07:01:58.20#ibcon#about to read 6, iclass 36, count 0 2006.229.07:01:58.20#ibcon#read 6, iclass 36, count 0 2006.229.07:01:58.20#ibcon#end of sib2, iclass 36, count 0 2006.229.07:01:58.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:01:58.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:01:58.20#ibcon#[27=USB\r\n] 2006.229.07:01:58.20#ibcon#*before write, iclass 36, count 0 2006.229.07:01:58.20#ibcon#enter sib2, iclass 36, count 0 2006.229.07:01:58.20#ibcon#flushed, iclass 36, count 0 2006.229.07:01:58.20#ibcon#about to write, iclass 36, count 0 2006.229.07:01:58.20#ibcon#wrote, iclass 36, count 0 2006.229.07:01:58.20#ibcon#about to read 3, iclass 36, count 0 2006.229.07:01:58.23#ibcon#read 3, iclass 36, count 0 2006.229.07:01:58.23#ibcon#about to read 4, iclass 36, count 0 2006.229.07:01:58.23#ibcon#read 4, iclass 36, count 0 2006.229.07:01:58.23#ibcon#about to read 5, iclass 36, count 0 2006.229.07:01:58.23#ibcon#read 5, iclass 36, count 0 2006.229.07:01:58.23#ibcon#about to read 6, iclass 36, count 0 2006.229.07:01:58.23#ibcon#read 6, iclass 36, count 0 2006.229.07:01:58.23#ibcon#end of sib2, iclass 36, count 0 2006.229.07:01:58.23#ibcon#*after write, iclass 36, count 0 2006.229.07:01:58.23#ibcon#*before return 0, iclass 36, count 0 2006.229.07:01:58.23#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:58.23#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:01:58.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:01:58.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:01:58.23$vck44/vblo=8,744.99 2006.229.07:01:58.23#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.07:01:58.23#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.07:01:58.23#ibcon#ireg 17 cls_cnt 0 2006.229.07:01:58.23#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:58.23#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:58.23#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:58.23#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:01:58.23#ibcon#first serial, iclass 38, count 0 2006.229.07:01:58.23#ibcon#enter sib2, iclass 38, count 0 2006.229.07:01:58.23#ibcon#flushed, iclass 38, count 0 2006.229.07:01:58.23#ibcon#about to write, iclass 38, count 0 2006.229.07:01:58.23#ibcon#wrote, iclass 38, count 0 2006.229.07:01:58.23#ibcon#about to read 3, iclass 38, count 0 2006.229.07:01:58.25#ibcon#read 3, iclass 38, count 0 2006.229.07:01:58.25#ibcon#about to read 4, iclass 38, count 0 2006.229.07:01:58.25#ibcon#read 4, iclass 38, count 0 2006.229.07:01:58.25#ibcon#about to read 5, iclass 38, count 0 2006.229.07:01:58.25#ibcon#read 5, iclass 38, count 0 2006.229.07:01:58.25#ibcon#about to read 6, iclass 38, count 0 2006.229.07:01:58.25#ibcon#read 6, iclass 38, count 0 2006.229.07:01:58.25#ibcon#end of sib2, iclass 38, count 0 2006.229.07:01:58.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:01:58.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:01:58.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:01:58.25#ibcon#*before write, iclass 38, count 0 2006.229.07:01:58.25#ibcon#enter sib2, iclass 38, count 0 2006.229.07:01:58.25#ibcon#flushed, iclass 38, count 0 2006.229.07:01:58.25#ibcon#about to write, iclass 38, count 0 2006.229.07:01:58.25#ibcon#wrote, iclass 38, count 0 2006.229.07:01:58.25#ibcon#about to read 3, iclass 38, count 0 2006.229.07:01:58.29#ibcon#read 3, iclass 38, count 0 2006.229.07:01:58.29#ibcon#about to read 4, iclass 38, count 0 2006.229.07:01:58.29#ibcon#read 4, iclass 38, count 0 2006.229.07:01:58.29#ibcon#about to read 5, iclass 38, count 0 2006.229.07:01:58.29#ibcon#read 5, iclass 38, count 0 2006.229.07:01:58.29#ibcon#about to read 6, iclass 38, count 0 2006.229.07:01:58.29#ibcon#read 6, iclass 38, count 0 2006.229.07:01:58.29#ibcon#end of sib2, iclass 38, count 0 2006.229.07:01:58.29#ibcon#*after write, iclass 38, count 0 2006.229.07:01:58.29#ibcon#*before return 0, iclass 38, count 0 2006.229.07:01:58.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:58.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:01:58.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:01:58.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:01:58.29$vck44/vb=8,4 2006.229.07:01:58.29#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.07:01:58.29#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.07:01:58.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:01:58.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:58.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:58.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:58.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.07:01:58.35#ibcon#first serial, iclass 40, count 2 2006.229.07:01:58.35#ibcon#enter sib2, iclass 40, count 2 2006.229.07:01:58.35#ibcon#flushed, iclass 40, count 2 2006.229.07:01:58.35#ibcon#about to write, iclass 40, count 2 2006.229.07:01:58.35#ibcon#wrote, iclass 40, count 2 2006.229.07:01:58.35#ibcon#about to read 3, iclass 40, count 2 2006.229.07:01:58.37#ibcon#read 3, iclass 40, count 2 2006.229.07:01:58.37#ibcon#about to read 4, iclass 40, count 2 2006.229.07:01:58.37#ibcon#read 4, iclass 40, count 2 2006.229.07:01:58.37#ibcon#about to read 5, iclass 40, count 2 2006.229.07:01:58.37#ibcon#read 5, iclass 40, count 2 2006.229.07:01:58.37#ibcon#about to read 6, iclass 40, count 2 2006.229.07:01:58.37#ibcon#read 6, iclass 40, count 2 2006.229.07:01:58.37#ibcon#end of sib2, iclass 40, count 2 2006.229.07:01:58.37#ibcon#*mode == 0, iclass 40, count 2 2006.229.07:01:58.37#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.07:01:58.37#ibcon#[27=AT08-04\r\n] 2006.229.07:01:58.37#ibcon#*before write, iclass 40, count 2 2006.229.07:01:58.37#ibcon#enter sib2, iclass 40, count 2 2006.229.07:01:58.37#ibcon#flushed, iclass 40, count 2 2006.229.07:01:58.37#ibcon#about to write, iclass 40, count 2 2006.229.07:01:58.37#ibcon#wrote, iclass 40, count 2 2006.229.07:01:58.37#ibcon#about to read 3, iclass 40, count 2 2006.229.07:01:58.40#ibcon#read 3, iclass 40, count 2 2006.229.07:01:58.40#ibcon#about to read 4, iclass 40, count 2 2006.229.07:01:58.40#ibcon#read 4, iclass 40, count 2 2006.229.07:01:58.40#ibcon#about to read 5, iclass 40, count 2 2006.229.07:01:58.40#ibcon#read 5, iclass 40, count 2 2006.229.07:01:58.40#ibcon#about to read 6, iclass 40, count 2 2006.229.07:01:58.40#ibcon#read 6, iclass 40, count 2 2006.229.07:01:58.40#ibcon#end of sib2, iclass 40, count 2 2006.229.07:01:58.40#ibcon#*after write, iclass 40, count 2 2006.229.07:01:58.40#ibcon#*before return 0, iclass 40, count 2 2006.229.07:01:58.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:58.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:01:58.40#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.07:01:58.40#ibcon#ireg 7 cls_cnt 0 2006.229.07:01:58.40#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:58.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:58.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:58.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:01:58.52#ibcon#first serial, iclass 40, count 0 2006.229.07:01:58.52#ibcon#enter sib2, iclass 40, count 0 2006.229.07:01:58.52#ibcon#flushed, iclass 40, count 0 2006.229.07:01:58.52#ibcon#about to write, iclass 40, count 0 2006.229.07:01:58.52#ibcon#wrote, iclass 40, count 0 2006.229.07:01:58.52#ibcon#about to read 3, iclass 40, count 0 2006.229.07:01:58.54#ibcon#read 3, iclass 40, count 0 2006.229.07:01:58.54#ibcon#about to read 4, iclass 40, count 0 2006.229.07:01:58.54#ibcon#read 4, iclass 40, count 0 2006.229.07:01:58.54#ibcon#about to read 5, iclass 40, count 0 2006.229.07:01:58.54#ibcon#read 5, iclass 40, count 0 2006.229.07:01:58.54#ibcon#about to read 6, iclass 40, count 0 2006.229.07:01:58.54#ibcon#read 6, iclass 40, count 0 2006.229.07:01:58.54#ibcon#end of sib2, iclass 40, count 0 2006.229.07:01:58.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:01:58.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:01:58.54#ibcon#[27=USB\r\n] 2006.229.07:01:58.54#ibcon#*before write, iclass 40, count 0 2006.229.07:01:58.54#ibcon#enter sib2, iclass 40, count 0 2006.229.07:01:58.54#ibcon#flushed, iclass 40, count 0 2006.229.07:01:58.54#ibcon#about to write, iclass 40, count 0 2006.229.07:01:58.54#ibcon#wrote, iclass 40, count 0 2006.229.07:01:58.54#ibcon#about to read 3, iclass 40, count 0 2006.229.07:01:58.57#ibcon#read 3, iclass 40, count 0 2006.229.07:01:58.57#ibcon#about to read 4, iclass 40, count 0 2006.229.07:01:58.57#ibcon#read 4, iclass 40, count 0 2006.229.07:01:58.57#ibcon#about to read 5, iclass 40, count 0 2006.229.07:01:58.57#ibcon#read 5, iclass 40, count 0 2006.229.07:01:58.57#ibcon#about to read 6, iclass 40, count 0 2006.229.07:01:58.57#ibcon#read 6, iclass 40, count 0 2006.229.07:01:58.57#ibcon#end of sib2, iclass 40, count 0 2006.229.07:01:58.57#ibcon#*after write, iclass 40, count 0 2006.229.07:01:58.57#ibcon#*before return 0, iclass 40, count 0 2006.229.07:01:58.57#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:58.57#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:01:58.57#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:01:58.57#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:01:58.57$vck44/vabw=wide 2006.229.07:01:58.57#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.07:01:58.57#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.07:01:58.57#ibcon#ireg 8 cls_cnt 0 2006.229.07:01:58.57#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:58.57#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:58.57#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:58.57#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:01:58.57#ibcon#first serial, iclass 4, count 0 2006.229.07:01:58.57#ibcon#enter sib2, iclass 4, count 0 2006.229.07:01:58.57#ibcon#flushed, iclass 4, count 0 2006.229.07:01:58.57#ibcon#about to write, iclass 4, count 0 2006.229.07:01:58.57#ibcon#wrote, iclass 4, count 0 2006.229.07:01:58.57#ibcon#about to read 3, iclass 4, count 0 2006.229.07:01:58.59#ibcon#read 3, iclass 4, count 0 2006.229.07:01:58.59#ibcon#about to read 4, iclass 4, count 0 2006.229.07:01:58.59#ibcon#read 4, iclass 4, count 0 2006.229.07:01:58.59#ibcon#about to read 5, iclass 4, count 0 2006.229.07:01:58.59#ibcon#read 5, iclass 4, count 0 2006.229.07:01:58.59#ibcon#about to read 6, iclass 4, count 0 2006.229.07:01:58.59#ibcon#read 6, iclass 4, count 0 2006.229.07:01:58.59#ibcon#end of sib2, iclass 4, count 0 2006.229.07:01:58.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:01:58.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:01:58.59#ibcon#[25=BW32\r\n] 2006.229.07:01:58.59#ibcon#*before write, iclass 4, count 0 2006.229.07:01:58.59#ibcon#enter sib2, iclass 4, count 0 2006.229.07:01:58.59#ibcon#flushed, iclass 4, count 0 2006.229.07:01:58.59#ibcon#about to write, iclass 4, count 0 2006.229.07:01:58.59#ibcon#wrote, iclass 4, count 0 2006.229.07:01:58.59#ibcon#about to read 3, iclass 4, count 0 2006.229.07:01:58.62#ibcon#read 3, iclass 4, count 0 2006.229.07:01:58.62#ibcon#about to read 4, iclass 4, count 0 2006.229.07:01:58.62#ibcon#read 4, iclass 4, count 0 2006.229.07:01:58.62#ibcon#about to read 5, iclass 4, count 0 2006.229.07:01:58.62#ibcon#read 5, iclass 4, count 0 2006.229.07:01:58.62#ibcon#about to read 6, iclass 4, count 0 2006.229.07:01:58.62#ibcon#read 6, iclass 4, count 0 2006.229.07:01:58.62#ibcon#end of sib2, iclass 4, count 0 2006.229.07:01:58.62#ibcon#*after write, iclass 4, count 0 2006.229.07:01:58.62#ibcon#*before return 0, iclass 4, count 0 2006.229.07:01:58.62#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:58.62#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:01:58.62#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:01:58.62#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:01:58.62$vck44/vbbw=wide 2006.229.07:01:58.62#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.07:01:58.62#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.07:01:58.62#ibcon#ireg 8 cls_cnt 0 2006.229.07:01:58.62#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:01:58.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:01:58.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:01:58.69#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:01:58.69#ibcon#first serial, iclass 6, count 0 2006.229.07:01:58.69#ibcon#enter sib2, iclass 6, count 0 2006.229.07:01:58.69#ibcon#flushed, iclass 6, count 0 2006.229.07:01:58.69#ibcon#about to write, iclass 6, count 0 2006.229.07:01:58.69#ibcon#wrote, iclass 6, count 0 2006.229.07:01:58.69#ibcon#about to read 3, iclass 6, count 0 2006.229.07:01:58.71#ibcon#read 3, iclass 6, count 0 2006.229.07:01:58.71#ibcon#about to read 4, iclass 6, count 0 2006.229.07:01:58.71#ibcon#read 4, iclass 6, count 0 2006.229.07:01:58.71#ibcon#about to read 5, iclass 6, count 0 2006.229.07:01:58.71#ibcon#read 5, iclass 6, count 0 2006.229.07:01:58.71#ibcon#about to read 6, iclass 6, count 0 2006.229.07:01:58.71#ibcon#read 6, iclass 6, count 0 2006.229.07:01:58.71#ibcon#end of sib2, iclass 6, count 0 2006.229.07:01:58.71#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:01:58.71#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:01:58.71#ibcon#[27=BW32\r\n] 2006.229.07:01:58.71#ibcon#*before write, iclass 6, count 0 2006.229.07:01:58.71#ibcon#enter sib2, iclass 6, count 0 2006.229.07:01:58.71#ibcon#flushed, iclass 6, count 0 2006.229.07:01:58.71#ibcon#about to write, iclass 6, count 0 2006.229.07:01:58.71#ibcon#wrote, iclass 6, count 0 2006.229.07:01:58.71#ibcon#about to read 3, iclass 6, count 0 2006.229.07:01:58.74#ibcon#read 3, iclass 6, count 0 2006.229.07:01:58.74#ibcon#about to read 4, iclass 6, count 0 2006.229.07:01:58.74#ibcon#read 4, iclass 6, count 0 2006.229.07:01:58.74#ibcon#about to read 5, iclass 6, count 0 2006.229.07:01:58.74#ibcon#read 5, iclass 6, count 0 2006.229.07:01:58.74#ibcon#about to read 6, iclass 6, count 0 2006.229.07:01:58.74#ibcon#read 6, iclass 6, count 0 2006.229.07:01:58.74#ibcon#end of sib2, iclass 6, count 0 2006.229.07:01:58.74#ibcon#*after write, iclass 6, count 0 2006.229.07:01:58.74#ibcon#*before return 0, iclass 6, count 0 2006.229.07:01:58.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:01:58.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:01:58.74#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:01:58.74#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:01:58.74$setupk4/ifdk4 2006.229.07:01:58.74$ifdk4/lo= 2006.229.07:01:58.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:01:58.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:01:58.74$ifdk4/patch= 2006.229.07:01:58.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:01:58.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:01:58.74$setupk4/!*+20s 2006.229.07:02:02.07#abcon#<5=/07 2.4 4.8 30.11 921000.0\r\n> 2006.229.07:02:02.09#abcon#{5=INTERFACE CLEAR} 2006.229.07:02:02.15#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:02:09.14#trakl#Source acquired 2006.229.07:02:10.14#flagr#flagr/antenna,acquired 2006.229.07:02:12.24#abcon#<5=/07 2.4 4.8 30.11 921000.0\r\n> 2006.229.07:02:12.26#abcon#{5=INTERFACE CLEAR} 2006.229.07:02:12.32#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:02:13.23$setupk4/"tpicd 2006.229.07:02:13.23$setupk4/echo=off 2006.229.07:02:13.23$setupk4/xlog=off 2006.229.07:02:13.23:!2006.229.07:02:34 2006.229.07:02:34.00:preob 2006.229.07:02:35.14/onsource/TRACKING 2006.229.07:02:35.14:!2006.229.07:02:44 2006.229.07:02:44.00:"tape 2006.229.07:02:44.00:"st=record 2006.229.07:02:44.00:data_valid=on 2006.229.07:02:44.00:midob 2006.229.07:02:44.14/onsource/TRACKING 2006.229.07:02:44.14/wx/30.11,1000.0,91 2006.229.07:02:44.23/cable/+6.3967E-03 2006.229.07:02:45.32/va/01,08,usb,yes,29,32 2006.229.07:02:45.32/va/02,07,usb,yes,32,32 2006.229.07:02:45.32/va/03,06,usb,yes,39,42 2006.229.07:02:45.32/va/04,07,usb,yes,33,34 2006.229.07:02:45.32/va/05,04,usb,yes,29,29 2006.229.07:02:45.32/va/06,04,usb,yes,33,32 2006.229.07:02:45.32/va/07,05,usb,yes,29,29 2006.229.07:02:45.32/va/08,06,usb,yes,21,26 2006.229.07:02:45.55/valo/01,524.99,yes,locked 2006.229.07:02:45.55/valo/02,534.99,yes,locked 2006.229.07:02:45.55/valo/03,564.99,yes,locked 2006.229.07:02:45.55/valo/04,624.99,yes,locked 2006.229.07:02:45.55/valo/05,734.99,yes,locked 2006.229.07:02:45.55/valo/06,814.99,yes,locked 2006.229.07:02:45.55/valo/07,864.99,yes,locked 2006.229.07:02:45.55/valo/08,884.99,yes,locked 2006.229.07:02:46.64/vb/01,04,usb,yes,31,28 2006.229.07:02:46.64/vb/02,04,usb,yes,33,33 2006.229.07:02:46.64/vb/03,04,usb,yes,30,33 2006.229.07:02:46.64/vb/04,04,usb,yes,34,33 2006.229.07:02:46.64/vb/05,04,usb,yes,27,29 2006.229.07:02:46.64/vb/06,04,usb,yes,31,27 2006.229.07:02:46.64/vb/07,04,usb,yes,31,31 2006.229.07:02:46.64/vb/08,04,usb,yes,28,32 2006.229.07:02:46.87/vblo/01,629.99,yes,locked 2006.229.07:02:46.87/vblo/02,634.99,yes,locked 2006.229.07:02:46.87/vblo/03,649.99,yes,locked 2006.229.07:02:46.87/vblo/04,679.99,yes,locked 2006.229.07:02:46.87/vblo/05,709.99,yes,locked 2006.229.07:02:46.87/vblo/06,719.99,yes,locked 2006.229.07:02:46.87/vblo/07,734.99,yes,locked 2006.229.07:02:46.87/vblo/08,744.99,yes,locked 2006.229.07:02:47.02/vabw/8 2006.229.07:02:47.17/vbbw/8 2006.229.07:02:47.26/xfe/off,on,12.0 2006.229.07:02:47.63/ifatt/23,28,28,28 2006.229.07:02:48.07/fmout-gps/S +4.58E-07 2006.229.07:02:48.11:!2006.229.07:07:14 2006.229.07:07:14.01:data_valid=off 2006.229.07:07:14.02:"et 2006.229.07:07:14.02:!+3s 2006.229.07:07:17.03:"tape 2006.229.07:07:17.03:postob 2006.229.07:07:17.26/cable/+6.3987E-03 2006.229.07:07:17.26/wx/30.12,1000.1,92 2006.229.07:07:17.32/fmout-gps/S +4.60E-07 2006.229.07:07:17.32:scan_name=229-0716,jd0608,50 2006.229.07:07:17.32:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.07:07:18.13#flagr#flagr/antenna,new-source 2006.229.07:07:18.13:checkk5 2006.229.07:07:18.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:07:18.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:07:19.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:07:19.83/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:07:20.22/chk_obsdata//k5ts1/T2290702??a.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:07:20.62/chk_obsdata//k5ts2/T2290702??b.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:07:21.03/chk_obsdata//k5ts3/T2290702??c.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:07:21.42/chk_obsdata//k5ts4/T2290702??d.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.07:07:22.15/k5log//k5ts1_log_newline 2006.229.07:07:22.86/k5log//k5ts2_log_newline 2006.229.07:07:23.59/k5log//k5ts3_log_newline 2006.229.07:07:24.30/k5log//k5ts4_log_newline 2006.229.07:07:24.33/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:07:24.33:setupk4=1 2006.229.07:07:24.33$setupk4/echo=on 2006.229.07:07:24.33$setupk4/pcalon 2006.229.07:07:24.33$pcalon/"no phase cal control is implemented here 2006.229.07:07:24.33$setupk4/"tpicd=stop 2006.229.07:07:24.33$setupk4/"rec=synch_on 2006.229.07:07:24.33$setupk4/"rec_mode=128 2006.229.07:07:24.33$setupk4/!* 2006.229.07:07:24.33$setupk4/recpk4 2006.229.07:07:24.33$recpk4/recpatch= 2006.229.07:07:24.33$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:07:24.33$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:07:24.33$setupk4/vck44 2006.229.07:07:24.33$vck44/valo=1,524.99 2006.229.07:07:24.33#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.07:07:24.33#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.07:07:24.33#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:24.33#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:24.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:24.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:24.33#ibcon#enter wrdev, iclass 33, count 0 2006.229.07:07:24.33#ibcon#first serial, iclass 33, count 0 2006.229.07:07:24.33#ibcon#enter sib2, iclass 33, count 0 2006.229.07:07:24.33#ibcon#flushed, iclass 33, count 0 2006.229.07:07:24.33#ibcon#about to write, iclass 33, count 0 2006.229.07:07:24.33#ibcon#wrote, iclass 33, count 0 2006.229.07:07:24.33#ibcon#about to read 3, iclass 33, count 0 2006.229.07:07:24.35#ibcon#read 3, iclass 33, count 0 2006.229.07:07:24.35#ibcon#about to read 4, iclass 33, count 0 2006.229.07:07:24.35#ibcon#read 4, iclass 33, count 0 2006.229.07:07:24.35#ibcon#about to read 5, iclass 33, count 0 2006.229.07:07:24.35#ibcon#read 5, iclass 33, count 0 2006.229.07:07:24.35#ibcon#about to read 6, iclass 33, count 0 2006.229.07:07:24.35#ibcon#read 6, iclass 33, count 0 2006.229.07:07:24.35#ibcon#end of sib2, iclass 33, count 0 2006.229.07:07:24.35#ibcon#*mode == 0, iclass 33, count 0 2006.229.07:07:24.35#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.07:07:24.35#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:07:24.35#ibcon#*before write, iclass 33, count 0 2006.229.07:07:24.35#ibcon#enter sib2, iclass 33, count 0 2006.229.07:07:24.35#ibcon#flushed, iclass 33, count 0 2006.229.07:07:24.35#ibcon#about to write, iclass 33, count 0 2006.229.07:07:24.35#ibcon#wrote, iclass 33, count 0 2006.229.07:07:24.35#ibcon#about to read 3, iclass 33, count 0 2006.229.07:07:24.40#ibcon#read 3, iclass 33, count 0 2006.229.07:07:24.40#ibcon#about to read 4, iclass 33, count 0 2006.229.07:07:24.40#ibcon#read 4, iclass 33, count 0 2006.229.07:07:24.40#ibcon#about to read 5, iclass 33, count 0 2006.229.07:07:24.40#ibcon#read 5, iclass 33, count 0 2006.229.07:07:24.40#ibcon#about to read 6, iclass 33, count 0 2006.229.07:07:24.40#ibcon#read 6, iclass 33, count 0 2006.229.07:07:24.40#ibcon#end of sib2, iclass 33, count 0 2006.229.07:07:24.40#ibcon#*after write, iclass 33, count 0 2006.229.07:07:24.40#ibcon#*before return 0, iclass 33, count 0 2006.229.07:07:24.40#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:24.40#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:24.40#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.07:07:24.40#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.07:07:24.40$vck44/va=1,8 2006.229.07:07:24.40#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.07:07:24.40#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.07:07:24.40#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:24.40#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:24.40#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:24.40#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:24.40#ibcon#enter wrdev, iclass 35, count 2 2006.229.07:07:24.40#ibcon#first serial, iclass 35, count 2 2006.229.07:07:24.40#ibcon#enter sib2, iclass 35, count 2 2006.229.07:07:24.40#ibcon#flushed, iclass 35, count 2 2006.229.07:07:24.40#ibcon#about to write, iclass 35, count 2 2006.229.07:07:24.40#ibcon#wrote, iclass 35, count 2 2006.229.07:07:24.40#ibcon#about to read 3, iclass 35, count 2 2006.229.07:07:24.42#ibcon#read 3, iclass 35, count 2 2006.229.07:07:24.42#ibcon#about to read 4, iclass 35, count 2 2006.229.07:07:24.42#ibcon#read 4, iclass 35, count 2 2006.229.07:07:24.42#ibcon#about to read 5, iclass 35, count 2 2006.229.07:07:24.42#ibcon#read 5, iclass 35, count 2 2006.229.07:07:24.42#ibcon#about to read 6, iclass 35, count 2 2006.229.07:07:24.42#ibcon#read 6, iclass 35, count 2 2006.229.07:07:24.42#ibcon#end of sib2, iclass 35, count 2 2006.229.07:07:24.42#ibcon#*mode == 0, iclass 35, count 2 2006.229.07:07:24.42#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.07:07:24.42#ibcon#[25=AT01-08\r\n] 2006.229.07:07:24.42#ibcon#*before write, iclass 35, count 2 2006.229.07:07:24.42#ibcon#enter sib2, iclass 35, count 2 2006.229.07:07:24.42#ibcon#flushed, iclass 35, count 2 2006.229.07:07:24.42#ibcon#about to write, iclass 35, count 2 2006.229.07:07:24.42#ibcon#wrote, iclass 35, count 2 2006.229.07:07:24.42#ibcon#about to read 3, iclass 35, count 2 2006.229.07:07:24.45#ibcon#read 3, iclass 35, count 2 2006.229.07:07:24.45#ibcon#about to read 4, iclass 35, count 2 2006.229.07:07:24.45#ibcon#read 4, iclass 35, count 2 2006.229.07:07:24.45#ibcon#about to read 5, iclass 35, count 2 2006.229.07:07:24.45#ibcon#read 5, iclass 35, count 2 2006.229.07:07:24.45#ibcon#about to read 6, iclass 35, count 2 2006.229.07:07:24.45#ibcon#read 6, iclass 35, count 2 2006.229.07:07:24.45#ibcon#end of sib2, iclass 35, count 2 2006.229.07:07:24.45#ibcon#*after write, iclass 35, count 2 2006.229.07:07:24.45#ibcon#*before return 0, iclass 35, count 2 2006.229.07:07:24.45#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:24.45#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:24.45#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.07:07:24.45#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:24.45#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:24.57#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:24.57#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:24.57#ibcon#enter wrdev, iclass 35, count 0 2006.229.07:07:24.57#ibcon#first serial, iclass 35, count 0 2006.229.07:07:24.57#ibcon#enter sib2, iclass 35, count 0 2006.229.07:07:24.57#ibcon#flushed, iclass 35, count 0 2006.229.07:07:24.57#ibcon#about to write, iclass 35, count 0 2006.229.07:07:24.57#ibcon#wrote, iclass 35, count 0 2006.229.07:07:24.57#ibcon#about to read 3, iclass 35, count 0 2006.229.07:07:24.59#ibcon#read 3, iclass 35, count 0 2006.229.07:07:24.59#ibcon#about to read 4, iclass 35, count 0 2006.229.07:07:24.59#ibcon#read 4, iclass 35, count 0 2006.229.07:07:24.59#ibcon#about to read 5, iclass 35, count 0 2006.229.07:07:24.59#ibcon#read 5, iclass 35, count 0 2006.229.07:07:24.59#ibcon#about to read 6, iclass 35, count 0 2006.229.07:07:24.59#ibcon#read 6, iclass 35, count 0 2006.229.07:07:24.59#ibcon#end of sib2, iclass 35, count 0 2006.229.07:07:24.59#ibcon#*mode == 0, iclass 35, count 0 2006.229.07:07:24.59#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.07:07:24.59#ibcon#[25=USB\r\n] 2006.229.07:07:24.59#ibcon#*before write, iclass 35, count 0 2006.229.07:07:24.59#ibcon#enter sib2, iclass 35, count 0 2006.229.07:07:24.59#ibcon#flushed, iclass 35, count 0 2006.229.07:07:24.59#ibcon#about to write, iclass 35, count 0 2006.229.07:07:24.59#ibcon#wrote, iclass 35, count 0 2006.229.07:07:24.59#ibcon#about to read 3, iclass 35, count 0 2006.229.07:07:24.62#ibcon#read 3, iclass 35, count 0 2006.229.07:07:24.62#ibcon#about to read 4, iclass 35, count 0 2006.229.07:07:24.62#ibcon#read 4, iclass 35, count 0 2006.229.07:07:24.62#ibcon#about to read 5, iclass 35, count 0 2006.229.07:07:24.62#ibcon#read 5, iclass 35, count 0 2006.229.07:07:24.62#ibcon#about to read 6, iclass 35, count 0 2006.229.07:07:24.62#ibcon#read 6, iclass 35, count 0 2006.229.07:07:24.62#ibcon#end of sib2, iclass 35, count 0 2006.229.07:07:24.62#ibcon#*after write, iclass 35, count 0 2006.229.07:07:24.62#ibcon#*before return 0, iclass 35, count 0 2006.229.07:07:24.62#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:24.62#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:24.62#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.07:07:24.62#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.07:07:24.62$vck44/valo=2,534.99 2006.229.07:07:24.62#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.07:07:24.62#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.07:07:24.62#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:24.62#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:07:24.62#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:07:24.62#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:07:24.62#ibcon#enter wrdev, iclass 37, count 0 2006.229.07:07:24.62#ibcon#first serial, iclass 37, count 0 2006.229.07:07:24.62#ibcon#enter sib2, iclass 37, count 0 2006.229.07:07:24.62#ibcon#flushed, iclass 37, count 0 2006.229.07:07:24.62#ibcon#about to write, iclass 37, count 0 2006.229.07:07:24.62#ibcon#wrote, iclass 37, count 0 2006.229.07:07:24.62#ibcon#about to read 3, iclass 37, count 0 2006.229.07:07:24.64#ibcon#read 3, iclass 37, count 0 2006.229.07:07:24.64#ibcon#about to read 4, iclass 37, count 0 2006.229.07:07:24.64#ibcon#read 4, iclass 37, count 0 2006.229.07:07:24.64#ibcon#about to read 5, iclass 37, count 0 2006.229.07:07:24.64#ibcon#read 5, iclass 37, count 0 2006.229.07:07:24.64#ibcon#about to read 6, iclass 37, count 0 2006.229.07:07:24.64#ibcon#read 6, iclass 37, count 0 2006.229.07:07:24.64#ibcon#end of sib2, iclass 37, count 0 2006.229.07:07:24.64#ibcon#*mode == 0, iclass 37, count 0 2006.229.07:07:24.64#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.07:07:24.64#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:07:24.64#ibcon#*before write, iclass 37, count 0 2006.229.07:07:24.64#ibcon#enter sib2, iclass 37, count 0 2006.229.07:07:24.64#ibcon#flushed, iclass 37, count 0 2006.229.07:07:24.64#ibcon#about to write, iclass 37, count 0 2006.229.07:07:24.64#ibcon#wrote, iclass 37, count 0 2006.229.07:07:24.64#ibcon#about to read 3, iclass 37, count 0 2006.229.07:07:24.68#ibcon#read 3, iclass 37, count 0 2006.229.07:07:24.68#ibcon#about to read 4, iclass 37, count 0 2006.229.07:07:24.68#ibcon#read 4, iclass 37, count 0 2006.229.07:07:24.68#ibcon#about to read 5, iclass 37, count 0 2006.229.07:07:24.68#ibcon#read 5, iclass 37, count 0 2006.229.07:07:24.68#ibcon#about to read 6, iclass 37, count 0 2006.229.07:07:24.68#ibcon#read 6, iclass 37, count 0 2006.229.07:07:24.68#ibcon#end of sib2, iclass 37, count 0 2006.229.07:07:24.68#ibcon#*after write, iclass 37, count 0 2006.229.07:07:24.68#ibcon#*before return 0, iclass 37, count 0 2006.229.07:07:24.68#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:07:24.68#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:07:24.68#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.07:07:24.68#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.07:07:24.68$vck44/va=2,7 2006.229.07:07:24.68#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.07:07:24.68#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.07:07:24.68#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:24.68#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:07:24.74#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:07:24.74#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:07:24.74#ibcon#enter wrdev, iclass 39, count 2 2006.229.07:07:24.74#ibcon#first serial, iclass 39, count 2 2006.229.07:07:24.74#ibcon#enter sib2, iclass 39, count 2 2006.229.07:07:24.74#ibcon#flushed, iclass 39, count 2 2006.229.07:07:24.74#ibcon#about to write, iclass 39, count 2 2006.229.07:07:24.74#ibcon#wrote, iclass 39, count 2 2006.229.07:07:24.74#ibcon#about to read 3, iclass 39, count 2 2006.229.07:07:24.76#ibcon#read 3, iclass 39, count 2 2006.229.07:07:24.76#ibcon#about to read 4, iclass 39, count 2 2006.229.07:07:24.76#ibcon#read 4, iclass 39, count 2 2006.229.07:07:24.76#ibcon#about to read 5, iclass 39, count 2 2006.229.07:07:24.76#ibcon#read 5, iclass 39, count 2 2006.229.07:07:24.76#ibcon#about to read 6, iclass 39, count 2 2006.229.07:07:24.76#ibcon#read 6, iclass 39, count 2 2006.229.07:07:24.76#ibcon#end of sib2, iclass 39, count 2 2006.229.07:07:24.76#ibcon#*mode == 0, iclass 39, count 2 2006.229.07:07:24.76#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.07:07:24.76#ibcon#[25=AT02-07\r\n] 2006.229.07:07:24.76#ibcon#*before write, iclass 39, count 2 2006.229.07:07:24.76#ibcon#enter sib2, iclass 39, count 2 2006.229.07:07:24.76#ibcon#flushed, iclass 39, count 2 2006.229.07:07:24.76#ibcon#about to write, iclass 39, count 2 2006.229.07:07:24.76#ibcon#wrote, iclass 39, count 2 2006.229.07:07:24.76#ibcon#about to read 3, iclass 39, count 2 2006.229.07:07:24.79#ibcon#read 3, iclass 39, count 2 2006.229.07:07:24.79#ibcon#about to read 4, iclass 39, count 2 2006.229.07:07:24.79#ibcon#read 4, iclass 39, count 2 2006.229.07:07:24.79#ibcon#about to read 5, iclass 39, count 2 2006.229.07:07:24.79#ibcon#read 5, iclass 39, count 2 2006.229.07:07:24.79#ibcon#about to read 6, iclass 39, count 2 2006.229.07:07:24.79#ibcon#read 6, iclass 39, count 2 2006.229.07:07:24.79#ibcon#end of sib2, iclass 39, count 2 2006.229.07:07:24.79#ibcon#*after write, iclass 39, count 2 2006.229.07:07:24.79#ibcon#*before return 0, iclass 39, count 2 2006.229.07:07:24.79#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:07:24.79#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:07:24.79#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.07:07:24.79#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:24.79#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:07:24.91#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:07:24.91#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:07:24.91#ibcon#enter wrdev, iclass 39, count 0 2006.229.07:07:24.91#ibcon#first serial, iclass 39, count 0 2006.229.07:07:24.91#ibcon#enter sib2, iclass 39, count 0 2006.229.07:07:24.91#ibcon#flushed, iclass 39, count 0 2006.229.07:07:24.91#ibcon#about to write, iclass 39, count 0 2006.229.07:07:24.91#ibcon#wrote, iclass 39, count 0 2006.229.07:07:24.91#ibcon#about to read 3, iclass 39, count 0 2006.229.07:07:24.93#ibcon#read 3, iclass 39, count 0 2006.229.07:07:24.93#ibcon#about to read 4, iclass 39, count 0 2006.229.07:07:24.93#ibcon#read 4, iclass 39, count 0 2006.229.07:07:24.93#ibcon#about to read 5, iclass 39, count 0 2006.229.07:07:24.93#ibcon#read 5, iclass 39, count 0 2006.229.07:07:24.93#ibcon#about to read 6, iclass 39, count 0 2006.229.07:07:24.93#ibcon#read 6, iclass 39, count 0 2006.229.07:07:24.93#ibcon#end of sib2, iclass 39, count 0 2006.229.07:07:24.93#ibcon#*mode == 0, iclass 39, count 0 2006.229.07:07:24.93#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.07:07:24.93#ibcon#[25=USB\r\n] 2006.229.07:07:24.93#ibcon#*before write, iclass 39, count 0 2006.229.07:07:24.93#ibcon#enter sib2, iclass 39, count 0 2006.229.07:07:24.93#ibcon#flushed, iclass 39, count 0 2006.229.07:07:24.93#ibcon#about to write, iclass 39, count 0 2006.229.07:07:24.93#ibcon#wrote, iclass 39, count 0 2006.229.07:07:24.93#ibcon#about to read 3, iclass 39, count 0 2006.229.07:07:24.96#ibcon#read 3, iclass 39, count 0 2006.229.07:07:24.96#ibcon#about to read 4, iclass 39, count 0 2006.229.07:07:24.96#ibcon#read 4, iclass 39, count 0 2006.229.07:07:24.96#ibcon#about to read 5, iclass 39, count 0 2006.229.07:07:24.96#ibcon#read 5, iclass 39, count 0 2006.229.07:07:24.96#ibcon#about to read 6, iclass 39, count 0 2006.229.07:07:24.96#ibcon#read 6, iclass 39, count 0 2006.229.07:07:24.96#ibcon#end of sib2, iclass 39, count 0 2006.229.07:07:24.96#ibcon#*after write, iclass 39, count 0 2006.229.07:07:24.96#ibcon#*before return 0, iclass 39, count 0 2006.229.07:07:24.96#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:07:24.96#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:07:24.96#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.07:07:24.96#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.07:07:24.96$vck44/valo=3,564.99 2006.229.07:07:24.96#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.07:07:24.96#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.07:07:24.96#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:24.96#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:24.96#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:24.96#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:24.96#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:07:24.96#ibcon#first serial, iclass 3, count 0 2006.229.07:07:24.96#ibcon#enter sib2, iclass 3, count 0 2006.229.07:07:24.96#ibcon#flushed, iclass 3, count 0 2006.229.07:07:24.96#ibcon#about to write, iclass 3, count 0 2006.229.07:07:24.96#ibcon#wrote, iclass 3, count 0 2006.229.07:07:24.96#ibcon#about to read 3, iclass 3, count 0 2006.229.07:07:24.98#ibcon#read 3, iclass 3, count 0 2006.229.07:07:24.98#ibcon#about to read 4, iclass 3, count 0 2006.229.07:07:24.98#ibcon#read 4, iclass 3, count 0 2006.229.07:07:24.98#ibcon#about to read 5, iclass 3, count 0 2006.229.07:07:24.98#ibcon#read 5, iclass 3, count 0 2006.229.07:07:24.98#ibcon#about to read 6, iclass 3, count 0 2006.229.07:07:24.98#ibcon#read 6, iclass 3, count 0 2006.229.07:07:24.98#ibcon#end of sib2, iclass 3, count 0 2006.229.07:07:24.98#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:07:24.98#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:07:24.98#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:07:24.98#ibcon#*before write, iclass 3, count 0 2006.229.07:07:24.98#ibcon#enter sib2, iclass 3, count 0 2006.229.07:07:24.98#ibcon#flushed, iclass 3, count 0 2006.229.07:07:24.98#ibcon#about to write, iclass 3, count 0 2006.229.07:07:24.98#ibcon#wrote, iclass 3, count 0 2006.229.07:07:24.98#ibcon#about to read 3, iclass 3, count 0 2006.229.07:07:25.02#ibcon#read 3, iclass 3, count 0 2006.229.07:07:25.02#ibcon#about to read 4, iclass 3, count 0 2006.229.07:07:25.02#ibcon#read 4, iclass 3, count 0 2006.229.07:07:25.02#ibcon#about to read 5, iclass 3, count 0 2006.229.07:07:25.02#ibcon#read 5, iclass 3, count 0 2006.229.07:07:25.02#ibcon#about to read 6, iclass 3, count 0 2006.229.07:07:25.02#ibcon#read 6, iclass 3, count 0 2006.229.07:07:25.02#ibcon#end of sib2, iclass 3, count 0 2006.229.07:07:25.02#ibcon#*after write, iclass 3, count 0 2006.229.07:07:25.02#ibcon#*before return 0, iclass 3, count 0 2006.229.07:07:25.02#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:25.02#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:25.02#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:07:25.02#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:07:25.02$vck44/va=3,6 2006.229.07:07:25.02#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.07:07:25.02#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.07:07:25.02#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:25.02#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:25.08#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:25.08#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:25.08#ibcon#enter wrdev, iclass 5, count 2 2006.229.07:07:25.08#ibcon#first serial, iclass 5, count 2 2006.229.07:07:25.08#ibcon#enter sib2, iclass 5, count 2 2006.229.07:07:25.08#ibcon#flushed, iclass 5, count 2 2006.229.07:07:25.08#ibcon#about to write, iclass 5, count 2 2006.229.07:07:25.08#ibcon#wrote, iclass 5, count 2 2006.229.07:07:25.08#ibcon#about to read 3, iclass 5, count 2 2006.229.07:07:25.10#ibcon#read 3, iclass 5, count 2 2006.229.07:07:25.10#ibcon#about to read 4, iclass 5, count 2 2006.229.07:07:25.10#ibcon#read 4, iclass 5, count 2 2006.229.07:07:25.10#ibcon#about to read 5, iclass 5, count 2 2006.229.07:07:25.10#ibcon#read 5, iclass 5, count 2 2006.229.07:07:25.10#ibcon#about to read 6, iclass 5, count 2 2006.229.07:07:25.10#ibcon#read 6, iclass 5, count 2 2006.229.07:07:25.10#ibcon#end of sib2, iclass 5, count 2 2006.229.07:07:25.10#ibcon#*mode == 0, iclass 5, count 2 2006.229.07:07:25.10#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.07:07:25.10#ibcon#[25=AT03-06\r\n] 2006.229.07:07:25.10#ibcon#*before write, iclass 5, count 2 2006.229.07:07:25.10#ibcon#enter sib2, iclass 5, count 2 2006.229.07:07:25.10#ibcon#flushed, iclass 5, count 2 2006.229.07:07:25.10#ibcon#about to write, iclass 5, count 2 2006.229.07:07:25.10#ibcon#wrote, iclass 5, count 2 2006.229.07:07:25.10#ibcon#about to read 3, iclass 5, count 2 2006.229.07:07:25.13#ibcon#read 3, iclass 5, count 2 2006.229.07:07:25.13#ibcon#about to read 4, iclass 5, count 2 2006.229.07:07:25.13#ibcon#read 4, iclass 5, count 2 2006.229.07:07:25.13#ibcon#about to read 5, iclass 5, count 2 2006.229.07:07:25.13#ibcon#read 5, iclass 5, count 2 2006.229.07:07:25.13#ibcon#about to read 6, iclass 5, count 2 2006.229.07:07:25.13#ibcon#read 6, iclass 5, count 2 2006.229.07:07:25.13#ibcon#end of sib2, iclass 5, count 2 2006.229.07:07:25.13#ibcon#*after write, iclass 5, count 2 2006.229.07:07:25.13#ibcon#*before return 0, iclass 5, count 2 2006.229.07:07:25.13#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:25.13#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:25.13#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.07:07:25.13#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:25.13#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:25.25#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:25.25#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:25.25#ibcon#enter wrdev, iclass 5, count 0 2006.229.07:07:25.25#ibcon#first serial, iclass 5, count 0 2006.229.07:07:25.25#ibcon#enter sib2, iclass 5, count 0 2006.229.07:07:25.25#ibcon#flushed, iclass 5, count 0 2006.229.07:07:25.25#ibcon#about to write, iclass 5, count 0 2006.229.07:07:25.25#ibcon#wrote, iclass 5, count 0 2006.229.07:07:25.25#ibcon#about to read 3, iclass 5, count 0 2006.229.07:07:25.27#ibcon#read 3, iclass 5, count 0 2006.229.07:07:25.27#ibcon#about to read 4, iclass 5, count 0 2006.229.07:07:25.27#ibcon#read 4, iclass 5, count 0 2006.229.07:07:25.27#ibcon#about to read 5, iclass 5, count 0 2006.229.07:07:25.27#ibcon#read 5, iclass 5, count 0 2006.229.07:07:25.27#ibcon#about to read 6, iclass 5, count 0 2006.229.07:07:25.27#ibcon#read 6, iclass 5, count 0 2006.229.07:07:25.27#ibcon#end of sib2, iclass 5, count 0 2006.229.07:07:25.27#ibcon#*mode == 0, iclass 5, count 0 2006.229.07:07:25.27#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.07:07:25.27#ibcon#[25=USB\r\n] 2006.229.07:07:25.27#ibcon#*before write, iclass 5, count 0 2006.229.07:07:25.27#ibcon#enter sib2, iclass 5, count 0 2006.229.07:07:25.27#ibcon#flushed, iclass 5, count 0 2006.229.07:07:25.27#ibcon#about to write, iclass 5, count 0 2006.229.07:07:25.27#ibcon#wrote, iclass 5, count 0 2006.229.07:07:25.27#ibcon#about to read 3, iclass 5, count 0 2006.229.07:07:25.30#ibcon#read 3, iclass 5, count 0 2006.229.07:07:25.30#ibcon#about to read 4, iclass 5, count 0 2006.229.07:07:25.30#ibcon#read 4, iclass 5, count 0 2006.229.07:07:25.30#ibcon#about to read 5, iclass 5, count 0 2006.229.07:07:25.30#ibcon#read 5, iclass 5, count 0 2006.229.07:07:25.30#ibcon#about to read 6, iclass 5, count 0 2006.229.07:07:25.30#ibcon#read 6, iclass 5, count 0 2006.229.07:07:25.30#ibcon#end of sib2, iclass 5, count 0 2006.229.07:07:25.30#ibcon#*after write, iclass 5, count 0 2006.229.07:07:25.30#ibcon#*before return 0, iclass 5, count 0 2006.229.07:07:25.30#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:25.30#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:25.30#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.07:07:25.30#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.07:07:25.30$vck44/valo=4,624.99 2006.229.07:07:25.30#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.07:07:25.30#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.07:07:25.30#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:25.30#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:25.30#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:25.30#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:25.30#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:07:25.30#ibcon#first serial, iclass 7, count 0 2006.229.07:07:25.30#ibcon#enter sib2, iclass 7, count 0 2006.229.07:07:25.30#ibcon#flushed, iclass 7, count 0 2006.229.07:07:25.30#ibcon#about to write, iclass 7, count 0 2006.229.07:07:25.30#ibcon#wrote, iclass 7, count 0 2006.229.07:07:25.30#ibcon#about to read 3, iclass 7, count 0 2006.229.07:07:25.32#ibcon#read 3, iclass 7, count 0 2006.229.07:07:25.32#ibcon#about to read 4, iclass 7, count 0 2006.229.07:07:25.32#ibcon#read 4, iclass 7, count 0 2006.229.07:07:25.32#ibcon#about to read 5, iclass 7, count 0 2006.229.07:07:25.32#ibcon#read 5, iclass 7, count 0 2006.229.07:07:25.32#ibcon#about to read 6, iclass 7, count 0 2006.229.07:07:25.32#ibcon#read 6, iclass 7, count 0 2006.229.07:07:25.32#ibcon#end of sib2, iclass 7, count 0 2006.229.07:07:25.32#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:07:25.32#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:07:25.32#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:07:25.32#ibcon#*before write, iclass 7, count 0 2006.229.07:07:25.32#ibcon#enter sib2, iclass 7, count 0 2006.229.07:07:25.32#ibcon#flushed, iclass 7, count 0 2006.229.07:07:25.32#ibcon#about to write, iclass 7, count 0 2006.229.07:07:25.32#ibcon#wrote, iclass 7, count 0 2006.229.07:07:25.32#ibcon#about to read 3, iclass 7, count 0 2006.229.07:07:25.36#ibcon#read 3, iclass 7, count 0 2006.229.07:07:25.36#ibcon#about to read 4, iclass 7, count 0 2006.229.07:07:25.36#ibcon#read 4, iclass 7, count 0 2006.229.07:07:25.36#ibcon#about to read 5, iclass 7, count 0 2006.229.07:07:25.36#ibcon#read 5, iclass 7, count 0 2006.229.07:07:25.36#ibcon#about to read 6, iclass 7, count 0 2006.229.07:07:25.36#ibcon#read 6, iclass 7, count 0 2006.229.07:07:25.36#ibcon#end of sib2, iclass 7, count 0 2006.229.07:07:25.36#ibcon#*after write, iclass 7, count 0 2006.229.07:07:25.36#ibcon#*before return 0, iclass 7, count 0 2006.229.07:07:25.36#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:25.36#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:25.36#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:07:25.36#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:07:25.36$vck44/va=4,7 2006.229.07:07:25.36#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.07:07:25.36#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.07:07:25.36#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:25.36#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:25.42#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:25.42#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:25.42#ibcon#enter wrdev, iclass 11, count 2 2006.229.07:07:25.42#ibcon#first serial, iclass 11, count 2 2006.229.07:07:25.42#ibcon#enter sib2, iclass 11, count 2 2006.229.07:07:25.42#ibcon#flushed, iclass 11, count 2 2006.229.07:07:25.42#ibcon#about to write, iclass 11, count 2 2006.229.07:07:25.42#ibcon#wrote, iclass 11, count 2 2006.229.07:07:25.42#ibcon#about to read 3, iclass 11, count 2 2006.229.07:07:25.44#ibcon#read 3, iclass 11, count 2 2006.229.07:07:25.44#ibcon#about to read 4, iclass 11, count 2 2006.229.07:07:25.44#ibcon#read 4, iclass 11, count 2 2006.229.07:07:25.44#ibcon#about to read 5, iclass 11, count 2 2006.229.07:07:25.44#ibcon#read 5, iclass 11, count 2 2006.229.07:07:25.44#ibcon#about to read 6, iclass 11, count 2 2006.229.07:07:25.44#ibcon#read 6, iclass 11, count 2 2006.229.07:07:25.44#ibcon#end of sib2, iclass 11, count 2 2006.229.07:07:25.44#ibcon#*mode == 0, iclass 11, count 2 2006.229.07:07:25.44#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.07:07:25.44#ibcon#[25=AT04-07\r\n] 2006.229.07:07:25.44#ibcon#*before write, iclass 11, count 2 2006.229.07:07:25.44#ibcon#enter sib2, iclass 11, count 2 2006.229.07:07:25.44#ibcon#flushed, iclass 11, count 2 2006.229.07:07:25.44#ibcon#about to write, iclass 11, count 2 2006.229.07:07:25.44#ibcon#wrote, iclass 11, count 2 2006.229.07:07:25.44#ibcon#about to read 3, iclass 11, count 2 2006.229.07:07:25.47#ibcon#read 3, iclass 11, count 2 2006.229.07:07:25.47#ibcon#about to read 4, iclass 11, count 2 2006.229.07:07:25.47#ibcon#read 4, iclass 11, count 2 2006.229.07:07:25.47#ibcon#about to read 5, iclass 11, count 2 2006.229.07:07:25.47#ibcon#read 5, iclass 11, count 2 2006.229.07:07:25.47#ibcon#about to read 6, iclass 11, count 2 2006.229.07:07:25.47#ibcon#read 6, iclass 11, count 2 2006.229.07:07:25.47#ibcon#end of sib2, iclass 11, count 2 2006.229.07:07:25.47#ibcon#*after write, iclass 11, count 2 2006.229.07:07:25.47#ibcon#*before return 0, iclass 11, count 2 2006.229.07:07:25.47#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:25.47#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:25.47#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.07:07:25.47#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:25.47#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:25.59#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:25.59#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:25.59#ibcon#enter wrdev, iclass 11, count 0 2006.229.07:07:25.59#ibcon#first serial, iclass 11, count 0 2006.229.07:07:25.59#ibcon#enter sib2, iclass 11, count 0 2006.229.07:07:25.59#ibcon#flushed, iclass 11, count 0 2006.229.07:07:25.59#ibcon#about to write, iclass 11, count 0 2006.229.07:07:25.59#ibcon#wrote, iclass 11, count 0 2006.229.07:07:25.59#ibcon#about to read 3, iclass 11, count 0 2006.229.07:07:25.61#ibcon#read 3, iclass 11, count 0 2006.229.07:07:25.61#ibcon#about to read 4, iclass 11, count 0 2006.229.07:07:25.69#ibcon#read 4, iclass 11, count 0 2006.229.07:07:25.69#ibcon#about to read 5, iclass 11, count 0 2006.229.07:07:25.69#ibcon#read 5, iclass 11, count 0 2006.229.07:07:25.69#ibcon#about to read 6, iclass 11, count 0 2006.229.07:07:25.69#ibcon#read 6, iclass 11, count 0 2006.229.07:07:25.69#ibcon#end of sib2, iclass 11, count 0 2006.229.07:07:25.69#ibcon#*mode == 0, iclass 11, count 0 2006.229.07:07:25.69#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.07:07:25.70#ibcon#[25=USB\r\n] 2006.229.07:07:25.70#ibcon#*before write, iclass 11, count 0 2006.229.07:07:25.70#ibcon#enter sib2, iclass 11, count 0 2006.229.07:07:25.70#ibcon#flushed, iclass 11, count 0 2006.229.07:07:25.70#ibcon#about to write, iclass 11, count 0 2006.229.07:07:25.70#ibcon#wrote, iclass 11, count 0 2006.229.07:07:25.70#ibcon#about to read 3, iclass 11, count 0 2006.229.07:07:25.72#ibcon#read 3, iclass 11, count 0 2006.229.07:07:25.72#ibcon#about to read 4, iclass 11, count 0 2006.229.07:07:25.72#ibcon#read 4, iclass 11, count 0 2006.229.07:07:25.72#ibcon#about to read 5, iclass 11, count 0 2006.229.07:07:25.72#ibcon#read 5, iclass 11, count 0 2006.229.07:07:25.72#ibcon#about to read 6, iclass 11, count 0 2006.229.07:07:25.72#ibcon#read 6, iclass 11, count 0 2006.229.07:07:25.72#ibcon#end of sib2, iclass 11, count 0 2006.229.07:07:25.72#ibcon#*after write, iclass 11, count 0 2006.229.07:07:25.72#ibcon#*before return 0, iclass 11, count 0 2006.229.07:07:25.72#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:25.72#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:25.72#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.07:07:25.72#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.07:07:25.72$vck44/valo=5,734.99 2006.229.07:07:25.72#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.07:07:25.72#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.07:07:25.72#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:25.72#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:25.72#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:25.72#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:25.72#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:07:25.72#ibcon#first serial, iclass 13, count 0 2006.229.07:07:25.72#ibcon#enter sib2, iclass 13, count 0 2006.229.07:07:25.72#ibcon#flushed, iclass 13, count 0 2006.229.07:07:25.72#ibcon#about to write, iclass 13, count 0 2006.229.07:07:25.72#ibcon#wrote, iclass 13, count 0 2006.229.07:07:25.72#ibcon#about to read 3, iclass 13, count 0 2006.229.07:07:25.74#ibcon#read 3, iclass 13, count 0 2006.229.07:07:25.74#ibcon#about to read 4, iclass 13, count 0 2006.229.07:07:25.74#ibcon#read 4, iclass 13, count 0 2006.229.07:07:25.74#ibcon#about to read 5, iclass 13, count 0 2006.229.07:07:25.74#ibcon#read 5, iclass 13, count 0 2006.229.07:07:25.74#ibcon#about to read 6, iclass 13, count 0 2006.229.07:07:25.74#ibcon#read 6, iclass 13, count 0 2006.229.07:07:25.74#ibcon#end of sib2, iclass 13, count 0 2006.229.07:07:25.74#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:07:25.74#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:07:25.74#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:07:25.74#ibcon#*before write, iclass 13, count 0 2006.229.07:07:25.74#ibcon#enter sib2, iclass 13, count 0 2006.229.07:07:25.74#ibcon#flushed, iclass 13, count 0 2006.229.07:07:25.74#ibcon#about to write, iclass 13, count 0 2006.229.07:07:25.74#ibcon#wrote, iclass 13, count 0 2006.229.07:07:25.74#ibcon#about to read 3, iclass 13, count 0 2006.229.07:07:25.78#ibcon#read 3, iclass 13, count 0 2006.229.07:07:25.78#ibcon#about to read 4, iclass 13, count 0 2006.229.07:07:25.78#ibcon#read 4, iclass 13, count 0 2006.229.07:07:25.78#ibcon#about to read 5, iclass 13, count 0 2006.229.07:07:25.78#ibcon#read 5, iclass 13, count 0 2006.229.07:07:25.78#ibcon#about to read 6, iclass 13, count 0 2006.229.07:07:25.78#ibcon#read 6, iclass 13, count 0 2006.229.07:07:25.78#ibcon#end of sib2, iclass 13, count 0 2006.229.07:07:25.78#ibcon#*after write, iclass 13, count 0 2006.229.07:07:25.78#ibcon#*before return 0, iclass 13, count 0 2006.229.07:07:25.78#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:25.78#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:25.78#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:07:25.78#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:07:25.78$vck44/va=5,4 2006.229.07:07:25.78#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.07:07:25.78#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.07:07:25.78#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:25.78#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:25.84#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:25.84#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:25.84#ibcon#enter wrdev, iclass 15, count 2 2006.229.07:07:25.84#ibcon#first serial, iclass 15, count 2 2006.229.07:07:25.84#ibcon#enter sib2, iclass 15, count 2 2006.229.07:07:25.84#ibcon#flushed, iclass 15, count 2 2006.229.07:07:25.84#ibcon#about to write, iclass 15, count 2 2006.229.07:07:25.84#ibcon#wrote, iclass 15, count 2 2006.229.07:07:25.84#ibcon#about to read 3, iclass 15, count 2 2006.229.07:07:25.86#ibcon#read 3, iclass 15, count 2 2006.229.07:07:25.86#ibcon#about to read 4, iclass 15, count 2 2006.229.07:07:25.86#ibcon#read 4, iclass 15, count 2 2006.229.07:07:25.86#ibcon#about to read 5, iclass 15, count 2 2006.229.07:07:25.86#ibcon#read 5, iclass 15, count 2 2006.229.07:07:25.86#ibcon#about to read 6, iclass 15, count 2 2006.229.07:07:25.86#ibcon#read 6, iclass 15, count 2 2006.229.07:07:25.86#ibcon#end of sib2, iclass 15, count 2 2006.229.07:07:25.86#ibcon#*mode == 0, iclass 15, count 2 2006.229.07:07:25.86#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.07:07:25.86#ibcon#[25=AT05-04\r\n] 2006.229.07:07:25.86#ibcon#*before write, iclass 15, count 2 2006.229.07:07:25.86#ibcon#enter sib2, iclass 15, count 2 2006.229.07:07:25.86#ibcon#flushed, iclass 15, count 2 2006.229.07:07:25.86#ibcon#about to write, iclass 15, count 2 2006.229.07:07:25.86#ibcon#wrote, iclass 15, count 2 2006.229.07:07:25.86#ibcon#about to read 3, iclass 15, count 2 2006.229.07:07:25.89#ibcon#read 3, iclass 15, count 2 2006.229.07:07:25.89#ibcon#about to read 4, iclass 15, count 2 2006.229.07:07:25.89#ibcon#read 4, iclass 15, count 2 2006.229.07:07:25.89#ibcon#about to read 5, iclass 15, count 2 2006.229.07:07:25.89#ibcon#read 5, iclass 15, count 2 2006.229.07:07:25.89#ibcon#about to read 6, iclass 15, count 2 2006.229.07:07:25.89#ibcon#read 6, iclass 15, count 2 2006.229.07:07:25.89#ibcon#end of sib2, iclass 15, count 2 2006.229.07:07:25.89#ibcon#*after write, iclass 15, count 2 2006.229.07:07:25.89#ibcon#*before return 0, iclass 15, count 2 2006.229.07:07:25.89#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:25.89#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:25.89#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.07:07:25.89#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:25.89#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:26.01#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:26.01#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:26.01#ibcon#enter wrdev, iclass 15, count 0 2006.229.07:07:26.01#ibcon#first serial, iclass 15, count 0 2006.229.07:07:26.01#ibcon#enter sib2, iclass 15, count 0 2006.229.07:07:26.01#ibcon#flushed, iclass 15, count 0 2006.229.07:07:26.01#ibcon#about to write, iclass 15, count 0 2006.229.07:07:26.01#ibcon#wrote, iclass 15, count 0 2006.229.07:07:26.01#ibcon#about to read 3, iclass 15, count 0 2006.229.07:07:26.03#ibcon#read 3, iclass 15, count 0 2006.229.07:07:26.03#ibcon#about to read 4, iclass 15, count 0 2006.229.07:07:26.03#ibcon#read 4, iclass 15, count 0 2006.229.07:07:26.03#ibcon#about to read 5, iclass 15, count 0 2006.229.07:07:26.03#ibcon#read 5, iclass 15, count 0 2006.229.07:07:26.03#ibcon#about to read 6, iclass 15, count 0 2006.229.07:07:26.03#ibcon#read 6, iclass 15, count 0 2006.229.07:07:26.03#ibcon#end of sib2, iclass 15, count 0 2006.229.07:07:26.03#ibcon#*mode == 0, iclass 15, count 0 2006.229.07:07:26.03#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.07:07:26.03#ibcon#[25=USB\r\n] 2006.229.07:07:26.03#ibcon#*before write, iclass 15, count 0 2006.229.07:07:26.03#ibcon#enter sib2, iclass 15, count 0 2006.229.07:07:26.03#ibcon#flushed, iclass 15, count 0 2006.229.07:07:26.03#ibcon#about to write, iclass 15, count 0 2006.229.07:07:26.03#ibcon#wrote, iclass 15, count 0 2006.229.07:07:26.03#ibcon#about to read 3, iclass 15, count 0 2006.229.07:07:26.06#ibcon#read 3, iclass 15, count 0 2006.229.07:07:26.06#ibcon#about to read 4, iclass 15, count 0 2006.229.07:07:26.06#ibcon#read 4, iclass 15, count 0 2006.229.07:07:26.06#ibcon#about to read 5, iclass 15, count 0 2006.229.07:07:26.06#ibcon#read 5, iclass 15, count 0 2006.229.07:07:26.06#ibcon#about to read 6, iclass 15, count 0 2006.229.07:07:26.06#ibcon#read 6, iclass 15, count 0 2006.229.07:07:26.06#ibcon#end of sib2, iclass 15, count 0 2006.229.07:07:26.06#ibcon#*after write, iclass 15, count 0 2006.229.07:07:26.06#ibcon#*before return 0, iclass 15, count 0 2006.229.07:07:26.06#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:26.06#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:26.06#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.07:07:26.06#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.07:07:26.06$vck44/valo=6,814.99 2006.229.07:07:26.06#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.07:07:26.06#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.07:07:26.06#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:26.06#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:26.06#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:26.06#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:26.06#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:07:26.06#ibcon#first serial, iclass 17, count 0 2006.229.07:07:26.06#ibcon#enter sib2, iclass 17, count 0 2006.229.07:07:26.06#ibcon#flushed, iclass 17, count 0 2006.229.07:07:26.06#ibcon#about to write, iclass 17, count 0 2006.229.07:07:26.06#ibcon#wrote, iclass 17, count 0 2006.229.07:07:26.06#ibcon#about to read 3, iclass 17, count 0 2006.229.07:07:26.08#ibcon#read 3, iclass 17, count 0 2006.229.07:07:26.08#ibcon#about to read 4, iclass 17, count 0 2006.229.07:07:26.08#ibcon#read 4, iclass 17, count 0 2006.229.07:07:26.08#ibcon#about to read 5, iclass 17, count 0 2006.229.07:07:26.08#ibcon#read 5, iclass 17, count 0 2006.229.07:07:26.08#ibcon#about to read 6, iclass 17, count 0 2006.229.07:07:26.08#ibcon#read 6, iclass 17, count 0 2006.229.07:07:26.08#ibcon#end of sib2, iclass 17, count 0 2006.229.07:07:26.08#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:07:26.08#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:07:26.08#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:07:26.08#ibcon#*before write, iclass 17, count 0 2006.229.07:07:26.08#ibcon#enter sib2, iclass 17, count 0 2006.229.07:07:26.08#ibcon#flushed, iclass 17, count 0 2006.229.07:07:26.08#ibcon#about to write, iclass 17, count 0 2006.229.07:07:26.08#ibcon#wrote, iclass 17, count 0 2006.229.07:07:26.08#ibcon#about to read 3, iclass 17, count 0 2006.229.07:07:26.12#ibcon#read 3, iclass 17, count 0 2006.229.07:07:26.12#ibcon#about to read 4, iclass 17, count 0 2006.229.07:07:26.12#ibcon#read 4, iclass 17, count 0 2006.229.07:07:26.12#ibcon#about to read 5, iclass 17, count 0 2006.229.07:07:26.12#ibcon#read 5, iclass 17, count 0 2006.229.07:07:26.12#ibcon#about to read 6, iclass 17, count 0 2006.229.07:07:26.12#ibcon#read 6, iclass 17, count 0 2006.229.07:07:26.12#ibcon#end of sib2, iclass 17, count 0 2006.229.07:07:26.12#ibcon#*after write, iclass 17, count 0 2006.229.07:07:26.12#ibcon#*before return 0, iclass 17, count 0 2006.229.07:07:26.12#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:26.12#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:26.12#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:07:26.12#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:07:26.12$vck44/va=6,4 2006.229.07:07:26.12#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.07:07:26.12#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.07:07:26.12#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:26.12#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:26.18#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:26.18#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:26.18#ibcon#enter wrdev, iclass 19, count 2 2006.229.07:07:26.18#ibcon#first serial, iclass 19, count 2 2006.229.07:07:26.18#ibcon#enter sib2, iclass 19, count 2 2006.229.07:07:26.18#ibcon#flushed, iclass 19, count 2 2006.229.07:07:26.18#ibcon#about to write, iclass 19, count 2 2006.229.07:07:26.18#ibcon#wrote, iclass 19, count 2 2006.229.07:07:26.18#ibcon#about to read 3, iclass 19, count 2 2006.229.07:07:26.20#ibcon#read 3, iclass 19, count 2 2006.229.07:07:26.20#ibcon#about to read 4, iclass 19, count 2 2006.229.07:07:26.20#ibcon#read 4, iclass 19, count 2 2006.229.07:07:26.20#ibcon#about to read 5, iclass 19, count 2 2006.229.07:07:26.20#ibcon#read 5, iclass 19, count 2 2006.229.07:07:26.20#ibcon#about to read 6, iclass 19, count 2 2006.229.07:07:26.20#ibcon#read 6, iclass 19, count 2 2006.229.07:07:26.20#ibcon#end of sib2, iclass 19, count 2 2006.229.07:07:26.20#ibcon#*mode == 0, iclass 19, count 2 2006.229.07:07:26.20#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.07:07:26.20#ibcon#[25=AT06-04\r\n] 2006.229.07:07:26.20#ibcon#*before write, iclass 19, count 2 2006.229.07:07:26.20#ibcon#enter sib2, iclass 19, count 2 2006.229.07:07:26.20#ibcon#flushed, iclass 19, count 2 2006.229.07:07:26.20#ibcon#about to write, iclass 19, count 2 2006.229.07:07:26.20#ibcon#wrote, iclass 19, count 2 2006.229.07:07:26.20#ibcon#about to read 3, iclass 19, count 2 2006.229.07:07:26.23#ibcon#read 3, iclass 19, count 2 2006.229.07:07:26.23#ibcon#about to read 4, iclass 19, count 2 2006.229.07:07:26.23#ibcon#read 4, iclass 19, count 2 2006.229.07:07:26.23#ibcon#about to read 5, iclass 19, count 2 2006.229.07:07:26.23#ibcon#read 5, iclass 19, count 2 2006.229.07:07:26.23#ibcon#about to read 6, iclass 19, count 2 2006.229.07:07:26.23#ibcon#read 6, iclass 19, count 2 2006.229.07:07:26.23#ibcon#end of sib2, iclass 19, count 2 2006.229.07:07:26.23#ibcon#*after write, iclass 19, count 2 2006.229.07:07:26.23#ibcon#*before return 0, iclass 19, count 2 2006.229.07:07:26.23#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:26.23#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:26.23#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.07:07:26.23#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:26.23#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:26.35#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:26.35#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:26.35#ibcon#enter wrdev, iclass 19, count 0 2006.229.07:07:26.35#ibcon#first serial, iclass 19, count 0 2006.229.07:07:26.35#ibcon#enter sib2, iclass 19, count 0 2006.229.07:07:26.35#ibcon#flushed, iclass 19, count 0 2006.229.07:07:26.35#ibcon#about to write, iclass 19, count 0 2006.229.07:07:26.35#ibcon#wrote, iclass 19, count 0 2006.229.07:07:26.35#ibcon#about to read 3, iclass 19, count 0 2006.229.07:07:26.37#ibcon#read 3, iclass 19, count 0 2006.229.07:07:26.37#ibcon#about to read 4, iclass 19, count 0 2006.229.07:07:26.37#ibcon#read 4, iclass 19, count 0 2006.229.07:07:26.37#ibcon#about to read 5, iclass 19, count 0 2006.229.07:07:26.37#ibcon#read 5, iclass 19, count 0 2006.229.07:07:26.37#ibcon#about to read 6, iclass 19, count 0 2006.229.07:07:26.37#ibcon#read 6, iclass 19, count 0 2006.229.07:07:26.37#ibcon#end of sib2, iclass 19, count 0 2006.229.07:07:26.37#ibcon#*mode == 0, iclass 19, count 0 2006.229.07:07:26.37#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.07:07:26.37#ibcon#[25=USB\r\n] 2006.229.07:07:26.37#ibcon#*before write, iclass 19, count 0 2006.229.07:07:26.37#ibcon#enter sib2, iclass 19, count 0 2006.229.07:07:26.37#ibcon#flushed, iclass 19, count 0 2006.229.07:07:26.37#ibcon#about to write, iclass 19, count 0 2006.229.07:07:26.37#ibcon#wrote, iclass 19, count 0 2006.229.07:07:26.37#ibcon#about to read 3, iclass 19, count 0 2006.229.07:07:26.40#ibcon#read 3, iclass 19, count 0 2006.229.07:07:26.40#ibcon#about to read 4, iclass 19, count 0 2006.229.07:07:26.40#ibcon#read 4, iclass 19, count 0 2006.229.07:07:26.40#ibcon#about to read 5, iclass 19, count 0 2006.229.07:07:26.40#ibcon#read 5, iclass 19, count 0 2006.229.07:07:26.40#ibcon#about to read 6, iclass 19, count 0 2006.229.07:07:26.40#ibcon#read 6, iclass 19, count 0 2006.229.07:07:26.40#ibcon#end of sib2, iclass 19, count 0 2006.229.07:07:26.40#ibcon#*after write, iclass 19, count 0 2006.229.07:07:26.40#ibcon#*before return 0, iclass 19, count 0 2006.229.07:07:26.40#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:26.40#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:26.40#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.07:07:26.40#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.07:07:26.40$vck44/valo=7,864.99 2006.229.07:07:26.40#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.07:07:26.40#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.07:07:26.40#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:26.40#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:26.40#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:26.40#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:26.40#ibcon#enter wrdev, iclass 21, count 0 2006.229.07:07:26.40#ibcon#first serial, iclass 21, count 0 2006.229.07:07:26.40#ibcon#enter sib2, iclass 21, count 0 2006.229.07:07:26.40#ibcon#flushed, iclass 21, count 0 2006.229.07:07:26.40#ibcon#about to write, iclass 21, count 0 2006.229.07:07:26.40#ibcon#wrote, iclass 21, count 0 2006.229.07:07:26.40#ibcon#about to read 3, iclass 21, count 0 2006.229.07:07:26.42#ibcon#read 3, iclass 21, count 0 2006.229.07:07:26.42#ibcon#about to read 4, iclass 21, count 0 2006.229.07:07:26.42#ibcon#read 4, iclass 21, count 0 2006.229.07:07:26.42#ibcon#about to read 5, iclass 21, count 0 2006.229.07:07:26.42#ibcon#read 5, iclass 21, count 0 2006.229.07:07:26.42#ibcon#about to read 6, iclass 21, count 0 2006.229.07:07:26.42#ibcon#read 6, iclass 21, count 0 2006.229.07:07:26.42#ibcon#end of sib2, iclass 21, count 0 2006.229.07:07:26.42#ibcon#*mode == 0, iclass 21, count 0 2006.229.07:07:26.42#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.07:07:26.42#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:07:26.42#ibcon#*before write, iclass 21, count 0 2006.229.07:07:26.42#ibcon#enter sib2, iclass 21, count 0 2006.229.07:07:26.42#ibcon#flushed, iclass 21, count 0 2006.229.07:07:26.42#ibcon#about to write, iclass 21, count 0 2006.229.07:07:26.42#ibcon#wrote, iclass 21, count 0 2006.229.07:07:26.42#ibcon#about to read 3, iclass 21, count 0 2006.229.07:07:26.46#ibcon#read 3, iclass 21, count 0 2006.229.07:07:26.46#ibcon#about to read 4, iclass 21, count 0 2006.229.07:07:26.46#ibcon#read 4, iclass 21, count 0 2006.229.07:07:26.46#ibcon#about to read 5, iclass 21, count 0 2006.229.07:07:26.46#ibcon#read 5, iclass 21, count 0 2006.229.07:07:26.46#ibcon#about to read 6, iclass 21, count 0 2006.229.07:07:26.46#ibcon#read 6, iclass 21, count 0 2006.229.07:07:26.46#ibcon#end of sib2, iclass 21, count 0 2006.229.07:07:26.46#ibcon#*after write, iclass 21, count 0 2006.229.07:07:26.46#ibcon#*before return 0, iclass 21, count 0 2006.229.07:07:26.46#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:26.46#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:26.46#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.07:07:26.46#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.07:07:26.46$vck44/va=7,5 2006.229.07:07:26.46#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.07:07:26.46#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.07:07:26.46#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:26.46#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:26.52#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:26.52#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:26.52#ibcon#enter wrdev, iclass 23, count 2 2006.229.07:07:26.52#ibcon#first serial, iclass 23, count 2 2006.229.07:07:26.52#ibcon#enter sib2, iclass 23, count 2 2006.229.07:07:26.52#ibcon#flushed, iclass 23, count 2 2006.229.07:07:26.52#ibcon#about to write, iclass 23, count 2 2006.229.07:07:26.52#ibcon#wrote, iclass 23, count 2 2006.229.07:07:26.52#ibcon#about to read 3, iclass 23, count 2 2006.229.07:07:26.54#ibcon#read 3, iclass 23, count 2 2006.229.07:07:26.54#ibcon#about to read 4, iclass 23, count 2 2006.229.07:07:26.54#ibcon#read 4, iclass 23, count 2 2006.229.07:07:26.54#ibcon#about to read 5, iclass 23, count 2 2006.229.07:07:26.54#ibcon#read 5, iclass 23, count 2 2006.229.07:07:26.54#ibcon#about to read 6, iclass 23, count 2 2006.229.07:07:26.54#ibcon#read 6, iclass 23, count 2 2006.229.07:07:26.54#ibcon#end of sib2, iclass 23, count 2 2006.229.07:07:26.54#ibcon#*mode == 0, iclass 23, count 2 2006.229.07:07:26.54#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.07:07:26.54#ibcon#[25=AT07-05\r\n] 2006.229.07:07:26.54#ibcon#*before write, iclass 23, count 2 2006.229.07:07:26.54#ibcon#enter sib2, iclass 23, count 2 2006.229.07:07:26.54#ibcon#flushed, iclass 23, count 2 2006.229.07:07:26.54#ibcon#about to write, iclass 23, count 2 2006.229.07:07:26.54#ibcon#wrote, iclass 23, count 2 2006.229.07:07:26.54#ibcon#about to read 3, iclass 23, count 2 2006.229.07:07:26.57#ibcon#read 3, iclass 23, count 2 2006.229.07:07:26.57#ibcon#about to read 4, iclass 23, count 2 2006.229.07:07:26.57#ibcon#read 4, iclass 23, count 2 2006.229.07:07:26.57#ibcon#about to read 5, iclass 23, count 2 2006.229.07:07:26.57#ibcon#read 5, iclass 23, count 2 2006.229.07:07:26.57#ibcon#about to read 6, iclass 23, count 2 2006.229.07:07:26.57#ibcon#read 6, iclass 23, count 2 2006.229.07:07:26.57#ibcon#end of sib2, iclass 23, count 2 2006.229.07:07:26.57#ibcon#*after write, iclass 23, count 2 2006.229.07:07:26.57#ibcon#*before return 0, iclass 23, count 2 2006.229.07:07:26.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:26.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:26.57#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.07:07:26.57#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:26.57#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:26.69#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:26.69#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:26.69#ibcon#enter wrdev, iclass 23, count 0 2006.229.07:07:26.69#ibcon#first serial, iclass 23, count 0 2006.229.07:07:26.69#ibcon#enter sib2, iclass 23, count 0 2006.229.07:07:26.69#ibcon#flushed, iclass 23, count 0 2006.229.07:07:26.69#ibcon#about to write, iclass 23, count 0 2006.229.07:07:26.69#ibcon#wrote, iclass 23, count 0 2006.229.07:07:26.69#ibcon#about to read 3, iclass 23, count 0 2006.229.07:07:26.71#ibcon#read 3, iclass 23, count 0 2006.229.07:07:26.71#ibcon#about to read 4, iclass 23, count 0 2006.229.07:07:26.71#ibcon#read 4, iclass 23, count 0 2006.229.07:07:26.71#ibcon#about to read 5, iclass 23, count 0 2006.229.07:07:26.71#ibcon#read 5, iclass 23, count 0 2006.229.07:07:26.71#ibcon#about to read 6, iclass 23, count 0 2006.229.07:07:26.71#ibcon#read 6, iclass 23, count 0 2006.229.07:07:26.71#ibcon#end of sib2, iclass 23, count 0 2006.229.07:07:26.71#ibcon#*mode == 0, iclass 23, count 0 2006.229.07:07:26.71#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.07:07:26.71#ibcon#[25=USB\r\n] 2006.229.07:07:26.71#ibcon#*before write, iclass 23, count 0 2006.229.07:07:26.71#ibcon#enter sib2, iclass 23, count 0 2006.229.07:07:26.71#ibcon#flushed, iclass 23, count 0 2006.229.07:07:26.71#ibcon#about to write, iclass 23, count 0 2006.229.07:07:26.71#ibcon#wrote, iclass 23, count 0 2006.229.07:07:26.71#ibcon#about to read 3, iclass 23, count 0 2006.229.07:07:26.74#ibcon#read 3, iclass 23, count 0 2006.229.07:07:26.74#ibcon#about to read 4, iclass 23, count 0 2006.229.07:07:26.74#ibcon#read 4, iclass 23, count 0 2006.229.07:07:26.74#ibcon#about to read 5, iclass 23, count 0 2006.229.07:07:26.74#ibcon#read 5, iclass 23, count 0 2006.229.07:07:26.74#ibcon#about to read 6, iclass 23, count 0 2006.229.07:07:26.74#ibcon#read 6, iclass 23, count 0 2006.229.07:07:26.74#ibcon#end of sib2, iclass 23, count 0 2006.229.07:07:26.74#ibcon#*after write, iclass 23, count 0 2006.229.07:07:26.74#ibcon#*before return 0, iclass 23, count 0 2006.229.07:07:26.74#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:26.74#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:26.74#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.07:07:26.74#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.07:07:26.74$vck44/valo=8,884.99 2006.229.07:07:26.74#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.07:07:26.74#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.07:07:26.74#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:26.74#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:26.74#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:26.74#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:26.74#ibcon#enter wrdev, iclass 25, count 0 2006.229.07:07:26.74#ibcon#first serial, iclass 25, count 0 2006.229.07:07:26.74#ibcon#enter sib2, iclass 25, count 0 2006.229.07:07:26.74#ibcon#flushed, iclass 25, count 0 2006.229.07:07:26.74#ibcon#about to write, iclass 25, count 0 2006.229.07:07:26.74#ibcon#wrote, iclass 25, count 0 2006.229.07:07:26.74#ibcon#about to read 3, iclass 25, count 0 2006.229.07:07:26.76#ibcon#read 3, iclass 25, count 0 2006.229.07:07:26.76#ibcon#about to read 4, iclass 25, count 0 2006.229.07:07:26.76#ibcon#read 4, iclass 25, count 0 2006.229.07:07:26.76#ibcon#about to read 5, iclass 25, count 0 2006.229.07:07:26.76#ibcon#read 5, iclass 25, count 0 2006.229.07:07:26.76#ibcon#about to read 6, iclass 25, count 0 2006.229.07:07:26.76#ibcon#read 6, iclass 25, count 0 2006.229.07:07:26.76#ibcon#end of sib2, iclass 25, count 0 2006.229.07:07:26.76#ibcon#*mode == 0, iclass 25, count 0 2006.229.07:07:26.76#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.07:07:26.76#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:07:26.76#ibcon#*before write, iclass 25, count 0 2006.229.07:07:26.76#ibcon#enter sib2, iclass 25, count 0 2006.229.07:07:26.76#ibcon#flushed, iclass 25, count 0 2006.229.07:07:26.76#ibcon#about to write, iclass 25, count 0 2006.229.07:07:26.76#ibcon#wrote, iclass 25, count 0 2006.229.07:07:26.76#ibcon#about to read 3, iclass 25, count 0 2006.229.07:07:26.80#ibcon#read 3, iclass 25, count 0 2006.229.07:07:26.80#ibcon#about to read 4, iclass 25, count 0 2006.229.07:07:26.80#ibcon#read 4, iclass 25, count 0 2006.229.07:07:26.80#ibcon#about to read 5, iclass 25, count 0 2006.229.07:07:26.80#ibcon#read 5, iclass 25, count 0 2006.229.07:07:26.80#ibcon#about to read 6, iclass 25, count 0 2006.229.07:07:26.80#ibcon#read 6, iclass 25, count 0 2006.229.07:07:26.80#ibcon#end of sib2, iclass 25, count 0 2006.229.07:07:26.80#ibcon#*after write, iclass 25, count 0 2006.229.07:07:26.80#ibcon#*before return 0, iclass 25, count 0 2006.229.07:07:26.80#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:26.80#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:26.80#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.07:07:26.80#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.07:07:26.80$vck44/va=8,6 2006.229.07:07:26.80#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.07:07:26.80#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.07:07:26.80#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:26.80#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:26.86#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:26.86#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:26.86#ibcon#enter wrdev, iclass 27, count 2 2006.229.07:07:26.86#ibcon#first serial, iclass 27, count 2 2006.229.07:07:26.86#ibcon#enter sib2, iclass 27, count 2 2006.229.07:07:26.86#ibcon#flushed, iclass 27, count 2 2006.229.07:07:26.86#ibcon#about to write, iclass 27, count 2 2006.229.07:07:26.86#ibcon#wrote, iclass 27, count 2 2006.229.07:07:26.86#ibcon#about to read 3, iclass 27, count 2 2006.229.07:07:26.88#ibcon#read 3, iclass 27, count 2 2006.229.07:07:26.88#ibcon#about to read 4, iclass 27, count 2 2006.229.07:07:26.88#ibcon#read 4, iclass 27, count 2 2006.229.07:07:26.88#ibcon#about to read 5, iclass 27, count 2 2006.229.07:07:26.88#ibcon#read 5, iclass 27, count 2 2006.229.07:07:26.88#ibcon#about to read 6, iclass 27, count 2 2006.229.07:07:26.88#ibcon#read 6, iclass 27, count 2 2006.229.07:07:26.88#ibcon#end of sib2, iclass 27, count 2 2006.229.07:07:26.88#ibcon#*mode == 0, iclass 27, count 2 2006.229.07:07:26.88#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.07:07:26.88#ibcon#[25=AT08-06\r\n] 2006.229.07:07:26.88#ibcon#*before write, iclass 27, count 2 2006.229.07:07:26.88#ibcon#enter sib2, iclass 27, count 2 2006.229.07:07:26.88#ibcon#flushed, iclass 27, count 2 2006.229.07:07:26.88#ibcon#about to write, iclass 27, count 2 2006.229.07:07:26.88#ibcon#wrote, iclass 27, count 2 2006.229.07:07:26.88#ibcon#about to read 3, iclass 27, count 2 2006.229.07:07:26.91#ibcon#read 3, iclass 27, count 2 2006.229.07:07:26.91#ibcon#about to read 4, iclass 27, count 2 2006.229.07:07:26.91#ibcon#read 4, iclass 27, count 2 2006.229.07:07:26.91#ibcon#about to read 5, iclass 27, count 2 2006.229.07:07:26.91#ibcon#read 5, iclass 27, count 2 2006.229.07:07:26.91#ibcon#about to read 6, iclass 27, count 2 2006.229.07:07:26.91#ibcon#read 6, iclass 27, count 2 2006.229.07:07:26.91#ibcon#end of sib2, iclass 27, count 2 2006.229.07:07:26.91#ibcon#*after write, iclass 27, count 2 2006.229.07:07:26.91#ibcon#*before return 0, iclass 27, count 2 2006.229.07:07:26.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:26.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:26.91#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.07:07:26.91#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:26.91#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:27.03#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:27.03#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:27.03#ibcon#enter wrdev, iclass 27, count 0 2006.229.07:07:27.03#ibcon#first serial, iclass 27, count 0 2006.229.07:07:27.03#ibcon#enter sib2, iclass 27, count 0 2006.229.07:07:27.03#ibcon#flushed, iclass 27, count 0 2006.229.07:07:27.03#ibcon#about to write, iclass 27, count 0 2006.229.07:07:27.03#ibcon#wrote, iclass 27, count 0 2006.229.07:07:27.03#ibcon#about to read 3, iclass 27, count 0 2006.229.07:07:27.05#ibcon#read 3, iclass 27, count 0 2006.229.07:07:27.05#ibcon#about to read 4, iclass 27, count 0 2006.229.07:07:27.05#ibcon#read 4, iclass 27, count 0 2006.229.07:07:27.05#ibcon#about to read 5, iclass 27, count 0 2006.229.07:07:27.05#ibcon#read 5, iclass 27, count 0 2006.229.07:07:27.05#ibcon#about to read 6, iclass 27, count 0 2006.229.07:07:27.05#ibcon#read 6, iclass 27, count 0 2006.229.07:07:27.05#ibcon#end of sib2, iclass 27, count 0 2006.229.07:07:27.05#ibcon#*mode == 0, iclass 27, count 0 2006.229.07:07:27.05#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.07:07:27.05#ibcon#[25=USB\r\n] 2006.229.07:07:27.05#ibcon#*before write, iclass 27, count 0 2006.229.07:07:27.05#ibcon#enter sib2, iclass 27, count 0 2006.229.07:07:27.05#ibcon#flushed, iclass 27, count 0 2006.229.07:07:27.05#ibcon#about to write, iclass 27, count 0 2006.229.07:07:27.05#ibcon#wrote, iclass 27, count 0 2006.229.07:07:27.05#ibcon#about to read 3, iclass 27, count 0 2006.229.07:07:27.08#ibcon#read 3, iclass 27, count 0 2006.229.07:07:27.08#ibcon#about to read 4, iclass 27, count 0 2006.229.07:07:27.08#ibcon#read 4, iclass 27, count 0 2006.229.07:07:27.08#ibcon#about to read 5, iclass 27, count 0 2006.229.07:07:27.08#ibcon#read 5, iclass 27, count 0 2006.229.07:07:27.08#ibcon#about to read 6, iclass 27, count 0 2006.229.07:07:27.08#ibcon#read 6, iclass 27, count 0 2006.229.07:07:27.08#ibcon#end of sib2, iclass 27, count 0 2006.229.07:07:27.08#ibcon#*after write, iclass 27, count 0 2006.229.07:07:27.08#ibcon#*before return 0, iclass 27, count 0 2006.229.07:07:27.08#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:27.08#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:27.08#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.07:07:27.08#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.07:07:27.08$vck44/vblo=1,629.99 2006.229.07:07:27.08#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.07:07:27.08#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.07:07:27.08#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:27.08#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:27.08#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:27.08#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:27.08#ibcon#enter wrdev, iclass 29, count 0 2006.229.07:07:27.08#ibcon#first serial, iclass 29, count 0 2006.229.07:07:27.08#ibcon#enter sib2, iclass 29, count 0 2006.229.07:07:27.08#ibcon#flushed, iclass 29, count 0 2006.229.07:07:27.08#ibcon#about to write, iclass 29, count 0 2006.229.07:07:27.08#ibcon#wrote, iclass 29, count 0 2006.229.07:07:27.08#ibcon#about to read 3, iclass 29, count 0 2006.229.07:07:27.10#ibcon#read 3, iclass 29, count 0 2006.229.07:07:27.10#ibcon#about to read 4, iclass 29, count 0 2006.229.07:07:27.10#ibcon#read 4, iclass 29, count 0 2006.229.07:07:27.10#ibcon#about to read 5, iclass 29, count 0 2006.229.07:07:27.10#ibcon#read 5, iclass 29, count 0 2006.229.07:07:27.10#ibcon#about to read 6, iclass 29, count 0 2006.229.07:07:27.10#ibcon#read 6, iclass 29, count 0 2006.229.07:07:27.10#ibcon#end of sib2, iclass 29, count 0 2006.229.07:07:27.10#ibcon#*mode == 0, iclass 29, count 0 2006.229.07:07:27.10#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.07:07:27.10#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:07:27.10#ibcon#*before write, iclass 29, count 0 2006.229.07:07:27.10#ibcon#enter sib2, iclass 29, count 0 2006.229.07:07:27.10#ibcon#flushed, iclass 29, count 0 2006.229.07:07:27.10#ibcon#about to write, iclass 29, count 0 2006.229.07:07:27.10#ibcon#wrote, iclass 29, count 0 2006.229.07:07:27.10#ibcon#about to read 3, iclass 29, count 0 2006.229.07:07:27.14#ibcon#read 3, iclass 29, count 0 2006.229.07:07:27.14#ibcon#about to read 4, iclass 29, count 0 2006.229.07:07:27.14#ibcon#read 4, iclass 29, count 0 2006.229.07:07:27.14#ibcon#about to read 5, iclass 29, count 0 2006.229.07:07:27.14#ibcon#read 5, iclass 29, count 0 2006.229.07:07:27.14#ibcon#about to read 6, iclass 29, count 0 2006.229.07:07:27.14#ibcon#read 6, iclass 29, count 0 2006.229.07:07:27.14#ibcon#end of sib2, iclass 29, count 0 2006.229.07:07:27.14#ibcon#*after write, iclass 29, count 0 2006.229.07:07:27.14#ibcon#*before return 0, iclass 29, count 0 2006.229.07:07:27.14#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:27.14#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:27.14#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.07:07:27.14#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.07:07:27.14$vck44/vb=1,4 2006.229.07:07:27.14#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.07:07:27.14#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.07:07:27.14#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:27.14#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:07:27.14#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:07:27.14#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:07:27.14#ibcon#enter wrdev, iclass 31, count 2 2006.229.07:07:27.14#ibcon#first serial, iclass 31, count 2 2006.229.07:07:27.14#ibcon#enter sib2, iclass 31, count 2 2006.229.07:07:27.14#ibcon#flushed, iclass 31, count 2 2006.229.07:07:27.14#ibcon#about to write, iclass 31, count 2 2006.229.07:07:27.14#ibcon#wrote, iclass 31, count 2 2006.229.07:07:27.14#ibcon#about to read 3, iclass 31, count 2 2006.229.07:07:27.16#ibcon#read 3, iclass 31, count 2 2006.229.07:07:27.16#ibcon#about to read 4, iclass 31, count 2 2006.229.07:07:27.16#ibcon#read 4, iclass 31, count 2 2006.229.07:07:27.16#ibcon#about to read 5, iclass 31, count 2 2006.229.07:07:27.16#ibcon#read 5, iclass 31, count 2 2006.229.07:07:27.16#ibcon#about to read 6, iclass 31, count 2 2006.229.07:07:27.16#ibcon#read 6, iclass 31, count 2 2006.229.07:07:27.16#ibcon#end of sib2, iclass 31, count 2 2006.229.07:07:27.16#ibcon#*mode == 0, iclass 31, count 2 2006.229.07:07:27.16#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.07:07:27.16#ibcon#[27=AT01-04\r\n] 2006.229.07:07:27.16#ibcon#*before write, iclass 31, count 2 2006.229.07:07:27.16#ibcon#enter sib2, iclass 31, count 2 2006.229.07:07:27.16#ibcon#flushed, iclass 31, count 2 2006.229.07:07:27.16#ibcon#about to write, iclass 31, count 2 2006.229.07:07:27.16#ibcon#wrote, iclass 31, count 2 2006.229.07:07:27.16#ibcon#about to read 3, iclass 31, count 2 2006.229.07:07:27.19#ibcon#read 3, iclass 31, count 2 2006.229.07:07:27.19#ibcon#about to read 4, iclass 31, count 2 2006.229.07:07:27.19#ibcon#read 4, iclass 31, count 2 2006.229.07:07:27.19#ibcon#about to read 5, iclass 31, count 2 2006.229.07:07:27.19#ibcon#read 5, iclass 31, count 2 2006.229.07:07:27.19#ibcon#about to read 6, iclass 31, count 2 2006.229.07:07:27.19#ibcon#read 6, iclass 31, count 2 2006.229.07:07:27.19#ibcon#end of sib2, iclass 31, count 2 2006.229.07:07:27.19#ibcon#*after write, iclass 31, count 2 2006.229.07:07:27.19#ibcon#*before return 0, iclass 31, count 2 2006.229.07:07:27.19#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:07:27.19#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:07:27.19#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.07:07:27.19#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:27.19#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:07:27.31#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:07:27.31#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:07:27.31#ibcon#enter wrdev, iclass 31, count 0 2006.229.07:07:27.31#ibcon#first serial, iclass 31, count 0 2006.229.07:07:27.31#ibcon#enter sib2, iclass 31, count 0 2006.229.07:07:27.31#ibcon#flushed, iclass 31, count 0 2006.229.07:07:27.31#ibcon#about to write, iclass 31, count 0 2006.229.07:07:27.31#ibcon#wrote, iclass 31, count 0 2006.229.07:07:27.31#ibcon#about to read 3, iclass 31, count 0 2006.229.07:07:27.33#ibcon#read 3, iclass 31, count 0 2006.229.07:07:27.33#ibcon#about to read 4, iclass 31, count 0 2006.229.07:07:27.33#ibcon#read 4, iclass 31, count 0 2006.229.07:07:27.33#ibcon#about to read 5, iclass 31, count 0 2006.229.07:07:27.33#ibcon#read 5, iclass 31, count 0 2006.229.07:07:27.33#ibcon#about to read 6, iclass 31, count 0 2006.229.07:07:27.33#ibcon#read 6, iclass 31, count 0 2006.229.07:07:27.33#ibcon#end of sib2, iclass 31, count 0 2006.229.07:07:27.33#ibcon#*mode == 0, iclass 31, count 0 2006.229.07:07:27.33#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.07:07:27.33#ibcon#[27=USB\r\n] 2006.229.07:07:27.33#ibcon#*before write, iclass 31, count 0 2006.229.07:07:27.33#ibcon#enter sib2, iclass 31, count 0 2006.229.07:07:27.33#ibcon#flushed, iclass 31, count 0 2006.229.07:07:27.33#ibcon#about to write, iclass 31, count 0 2006.229.07:07:27.33#ibcon#wrote, iclass 31, count 0 2006.229.07:07:27.33#ibcon#about to read 3, iclass 31, count 0 2006.229.07:07:27.36#ibcon#read 3, iclass 31, count 0 2006.229.07:07:27.36#ibcon#about to read 4, iclass 31, count 0 2006.229.07:07:27.36#ibcon#read 4, iclass 31, count 0 2006.229.07:07:27.36#ibcon#about to read 5, iclass 31, count 0 2006.229.07:07:27.36#ibcon#read 5, iclass 31, count 0 2006.229.07:07:27.36#ibcon#about to read 6, iclass 31, count 0 2006.229.07:07:27.36#ibcon#read 6, iclass 31, count 0 2006.229.07:07:27.36#ibcon#end of sib2, iclass 31, count 0 2006.229.07:07:27.36#ibcon#*after write, iclass 31, count 0 2006.229.07:07:27.36#ibcon#*before return 0, iclass 31, count 0 2006.229.07:07:27.36#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:07:27.36#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:07:27.36#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.07:07:27.36#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.07:07:27.36$vck44/vblo=2,634.99 2006.229.07:07:27.36#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.07:07:27.36#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.07:07:27.36#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:27.36#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:27.36#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:27.36#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:27.36#ibcon#enter wrdev, iclass 33, count 0 2006.229.07:07:27.36#ibcon#first serial, iclass 33, count 0 2006.229.07:07:27.36#ibcon#enter sib2, iclass 33, count 0 2006.229.07:07:27.36#ibcon#flushed, iclass 33, count 0 2006.229.07:07:27.36#ibcon#about to write, iclass 33, count 0 2006.229.07:07:27.36#ibcon#wrote, iclass 33, count 0 2006.229.07:07:27.36#ibcon#about to read 3, iclass 33, count 0 2006.229.07:07:27.38#ibcon#read 3, iclass 33, count 0 2006.229.07:07:27.38#ibcon#about to read 4, iclass 33, count 0 2006.229.07:07:27.38#ibcon#read 4, iclass 33, count 0 2006.229.07:07:27.38#ibcon#about to read 5, iclass 33, count 0 2006.229.07:07:27.38#ibcon#read 5, iclass 33, count 0 2006.229.07:07:27.38#ibcon#about to read 6, iclass 33, count 0 2006.229.07:07:27.38#ibcon#read 6, iclass 33, count 0 2006.229.07:07:27.38#ibcon#end of sib2, iclass 33, count 0 2006.229.07:07:27.38#ibcon#*mode == 0, iclass 33, count 0 2006.229.07:07:27.38#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.07:07:27.38#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:07:27.38#ibcon#*before write, iclass 33, count 0 2006.229.07:07:27.38#ibcon#enter sib2, iclass 33, count 0 2006.229.07:07:27.38#ibcon#flushed, iclass 33, count 0 2006.229.07:07:27.38#ibcon#about to write, iclass 33, count 0 2006.229.07:07:27.38#ibcon#wrote, iclass 33, count 0 2006.229.07:07:27.38#ibcon#about to read 3, iclass 33, count 0 2006.229.07:07:27.42#ibcon#read 3, iclass 33, count 0 2006.229.07:07:27.42#ibcon#about to read 4, iclass 33, count 0 2006.229.07:07:27.42#ibcon#read 4, iclass 33, count 0 2006.229.07:07:27.42#ibcon#about to read 5, iclass 33, count 0 2006.229.07:07:27.42#ibcon#read 5, iclass 33, count 0 2006.229.07:07:27.42#ibcon#about to read 6, iclass 33, count 0 2006.229.07:07:27.42#ibcon#read 6, iclass 33, count 0 2006.229.07:07:27.42#ibcon#end of sib2, iclass 33, count 0 2006.229.07:07:27.42#ibcon#*after write, iclass 33, count 0 2006.229.07:07:27.42#ibcon#*before return 0, iclass 33, count 0 2006.229.07:07:27.42#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:27.42#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:07:27.42#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.07:07:27.42#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.07:07:27.42$vck44/vb=2,4 2006.229.07:07:27.42#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.07:07:27.42#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.07:07:27.42#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:27.42#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:27.48#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:27.48#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:27.48#ibcon#enter wrdev, iclass 35, count 2 2006.229.07:07:27.48#ibcon#first serial, iclass 35, count 2 2006.229.07:07:27.48#ibcon#enter sib2, iclass 35, count 2 2006.229.07:07:27.48#ibcon#flushed, iclass 35, count 2 2006.229.07:07:27.48#ibcon#about to write, iclass 35, count 2 2006.229.07:07:27.48#ibcon#wrote, iclass 35, count 2 2006.229.07:07:27.48#ibcon#about to read 3, iclass 35, count 2 2006.229.07:07:27.50#ibcon#read 3, iclass 35, count 2 2006.229.07:07:27.50#ibcon#about to read 4, iclass 35, count 2 2006.229.07:07:27.50#ibcon#read 4, iclass 35, count 2 2006.229.07:07:27.50#ibcon#about to read 5, iclass 35, count 2 2006.229.07:07:27.50#ibcon#read 5, iclass 35, count 2 2006.229.07:07:27.50#ibcon#about to read 6, iclass 35, count 2 2006.229.07:07:27.50#ibcon#read 6, iclass 35, count 2 2006.229.07:07:27.50#ibcon#end of sib2, iclass 35, count 2 2006.229.07:07:27.50#ibcon#*mode == 0, iclass 35, count 2 2006.229.07:07:27.50#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.07:07:27.50#ibcon#[27=AT02-04\r\n] 2006.229.07:07:27.50#ibcon#*before write, iclass 35, count 2 2006.229.07:07:27.50#ibcon#enter sib2, iclass 35, count 2 2006.229.07:07:27.50#ibcon#flushed, iclass 35, count 2 2006.229.07:07:27.50#ibcon#about to write, iclass 35, count 2 2006.229.07:07:27.50#ibcon#wrote, iclass 35, count 2 2006.229.07:07:27.50#ibcon#about to read 3, iclass 35, count 2 2006.229.07:07:27.53#ibcon#read 3, iclass 35, count 2 2006.229.07:07:27.53#ibcon#about to read 4, iclass 35, count 2 2006.229.07:07:27.53#ibcon#read 4, iclass 35, count 2 2006.229.07:07:27.53#ibcon#about to read 5, iclass 35, count 2 2006.229.07:07:27.53#ibcon#read 5, iclass 35, count 2 2006.229.07:07:27.53#ibcon#about to read 6, iclass 35, count 2 2006.229.07:07:27.53#ibcon#read 6, iclass 35, count 2 2006.229.07:07:27.53#ibcon#end of sib2, iclass 35, count 2 2006.229.07:07:27.53#ibcon#*after write, iclass 35, count 2 2006.229.07:07:27.53#ibcon#*before return 0, iclass 35, count 2 2006.229.07:07:27.53#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:27.53#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:07:27.53#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.07:07:27.53#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:27.53#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:27.56#abcon#<5=/06 2.8 4.7 30.12 921000.1\r\n> 2006.229.07:07:27.58#abcon#{5=INTERFACE CLEAR} 2006.229.07:07:27.64#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:07:27.65#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:27.65#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:27.65#ibcon#enter wrdev, iclass 35, count 0 2006.229.07:07:27.65#ibcon#first serial, iclass 35, count 0 2006.229.07:07:27.65#ibcon#enter sib2, iclass 35, count 0 2006.229.07:07:27.65#ibcon#flushed, iclass 35, count 0 2006.229.07:07:27.65#ibcon#about to write, iclass 35, count 0 2006.229.07:07:27.65#ibcon#wrote, iclass 35, count 0 2006.229.07:07:27.65#ibcon#about to read 3, iclass 35, count 0 2006.229.07:07:27.67#ibcon#read 3, iclass 35, count 0 2006.229.07:07:27.67#ibcon#about to read 4, iclass 35, count 0 2006.229.07:07:27.67#ibcon#read 4, iclass 35, count 0 2006.229.07:07:27.67#ibcon#about to read 5, iclass 35, count 0 2006.229.07:07:27.67#ibcon#read 5, iclass 35, count 0 2006.229.07:07:27.67#ibcon#about to read 6, iclass 35, count 0 2006.229.07:07:27.67#ibcon#read 6, iclass 35, count 0 2006.229.07:07:27.67#ibcon#end of sib2, iclass 35, count 0 2006.229.07:07:27.67#ibcon#*mode == 0, iclass 35, count 0 2006.229.07:07:27.67#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.07:07:27.67#ibcon#[27=USB\r\n] 2006.229.07:07:27.67#ibcon#*before write, iclass 35, count 0 2006.229.07:07:27.67#ibcon#enter sib2, iclass 35, count 0 2006.229.07:07:27.67#ibcon#flushed, iclass 35, count 0 2006.229.07:07:27.67#ibcon#about to write, iclass 35, count 0 2006.229.07:07:27.67#ibcon#wrote, iclass 35, count 0 2006.229.07:07:27.67#ibcon#about to read 3, iclass 35, count 0 2006.229.07:07:27.70#ibcon#read 3, iclass 35, count 0 2006.229.07:07:27.70#ibcon#about to read 4, iclass 35, count 0 2006.229.07:07:27.70#ibcon#read 4, iclass 35, count 0 2006.229.07:07:27.70#ibcon#about to read 5, iclass 35, count 0 2006.229.07:07:27.70#ibcon#read 5, iclass 35, count 0 2006.229.07:07:27.70#ibcon#about to read 6, iclass 35, count 0 2006.229.07:07:27.70#ibcon#read 6, iclass 35, count 0 2006.229.07:07:27.70#ibcon#end of sib2, iclass 35, count 0 2006.229.07:07:27.70#ibcon#*after write, iclass 35, count 0 2006.229.07:07:27.70#ibcon#*before return 0, iclass 35, count 0 2006.229.07:07:27.70#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:27.70#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:07:27.70#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.07:07:27.70#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.07:07:27.70$vck44/vblo=3,649.99 2006.229.07:07:27.70#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.07:07:27.70#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.07:07:27.70#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:27.70#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:27.70#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:27.70#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:27.70#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:07:27.70#ibcon#first serial, iclass 3, count 0 2006.229.07:07:27.70#ibcon#enter sib2, iclass 3, count 0 2006.229.07:07:27.70#ibcon#flushed, iclass 3, count 0 2006.229.07:07:27.70#ibcon#about to write, iclass 3, count 0 2006.229.07:07:27.70#ibcon#wrote, iclass 3, count 0 2006.229.07:07:27.70#ibcon#about to read 3, iclass 3, count 0 2006.229.07:07:27.72#ibcon#read 3, iclass 3, count 0 2006.229.07:07:27.72#ibcon#about to read 4, iclass 3, count 0 2006.229.07:07:27.72#ibcon#read 4, iclass 3, count 0 2006.229.07:07:27.72#ibcon#about to read 5, iclass 3, count 0 2006.229.07:07:27.72#ibcon#read 5, iclass 3, count 0 2006.229.07:07:27.72#ibcon#about to read 6, iclass 3, count 0 2006.229.07:07:27.72#ibcon#read 6, iclass 3, count 0 2006.229.07:07:27.72#ibcon#end of sib2, iclass 3, count 0 2006.229.07:07:27.72#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:07:27.72#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:07:27.72#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:07:27.72#ibcon#*before write, iclass 3, count 0 2006.229.07:07:27.72#ibcon#enter sib2, iclass 3, count 0 2006.229.07:07:27.72#ibcon#flushed, iclass 3, count 0 2006.229.07:07:27.72#ibcon#about to write, iclass 3, count 0 2006.229.07:07:27.72#ibcon#wrote, iclass 3, count 0 2006.229.07:07:27.72#ibcon#about to read 3, iclass 3, count 0 2006.229.07:07:27.76#ibcon#read 3, iclass 3, count 0 2006.229.07:07:27.76#ibcon#about to read 4, iclass 3, count 0 2006.229.07:07:27.76#ibcon#read 4, iclass 3, count 0 2006.229.07:07:27.76#ibcon#about to read 5, iclass 3, count 0 2006.229.07:07:27.76#ibcon#read 5, iclass 3, count 0 2006.229.07:07:27.76#ibcon#about to read 6, iclass 3, count 0 2006.229.07:07:27.76#ibcon#read 6, iclass 3, count 0 2006.229.07:07:27.76#ibcon#end of sib2, iclass 3, count 0 2006.229.07:07:27.76#ibcon#*after write, iclass 3, count 0 2006.229.07:07:27.76#ibcon#*before return 0, iclass 3, count 0 2006.229.07:07:27.76#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:27.76#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:07:27.76#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:07:27.76#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:07:27.76$vck44/vb=3,4 2006.229.07:07:27.76#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.07:07:27.76#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.07:07:27.76#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:27.76#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:27.82#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:27.82#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:27.82#ibcon#enter wrdev, iclass 5, count 2 2006.229.07:07:27.82#ibcon#first serial, iclass 5, count 2 2006.229.07:07:27.82#ibcon#enter sib2, iclass 5, count 2 2006.229.07:07:27.82#ibcon#flushed, iclass 5, count 2 2006.229.07:07:27.82#ibcon#about to write, iclass 5, count 2 2006.229.07:07:27.82#ibcon#wrote, iclass 5, count 2 2006.229.07:07:27.82#ibcon#about to read 3, iclass 5, count 2 2006.229.07:07:27.84#ibcon#read 3, iclass 5, count 2 2006.229.07:07:27.84#ibcon#about to read 4, iclass 5, count 2 2006.229.07:07:27.84#ibcon#read 4, iclass 5, count 2 2006.229.07:07:27.84#ibcon#about to read 5, iclass 5, count 2 2006.229.07:07:27.84#ibcon#read 5, iclass 5, count 2 2006.229.07:07:27.84#ibcon#about to read 6, iclass 5, count 2 2006.229.07:07:27.84#ibcon#read 6, iclass 5, count 2 2006.229.07:07:27.84#ibcon#end of sib2, iclass 5, count 2 2006.229.07:07:27.84#ibcon#*mode == 0, iclass 5, count 2 2006.229.07:07:27.84#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.07:07:27.84#ibcon#[27=AT03-04\r\n] 2006.229.07:07:27.84#ibcon#*before write, iclass 5, count 2 2006.229.07:07:27.84#ibcon#enter sib2, iclass 5, count 2 2006.229.07:07:27.84#ibcon#flushed, iclass 5, count 2 2006.229.07:07:27.84#ibcon#about to write, iclass 5, count 2 2006.229.07:07:27.84#ibcon#wrote, iclass 5, count 2 2006.229.07:07:27.84#ibcon#about to read 3, iclass 5, count 2 2006.229.07:07:27.87#ibcon#read 3, iclass 5, count 2 2006.229.07:07:27.87#ibcon#about to read 4, iclass 5, count 2 2006.229.07:07:27.87#ibcon#read 4, iclass 5, count 2 2006.229.07:07:27.87#ibcon#about to read 5, iclass 5, count 2 2006.229.07:07:27.87#ibcon#read 5, iclass 5, count 2 2006.229.07:07:27.87#ibcon#about to read 6, iclass 5, count 2 2006.229.07:07:27.87#ibcon#read 6, iclass 5, count 2 2006.229.07:07:27.87#ibcon#end of sib2, iclass 5, count 2 2006.229.07:07:27.87#ibcon#*after write, iclass 5, count 2 2006.229.07:07:27.87#ibcon#*before return 0, iclass 5, count 2 2006.229.07:07:27.87#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:27.87#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:07:27.87#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.07:07:27.87#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:27.87#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:27.99#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:27.99#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:27.99#ibcon#enter wrdev, iclass 5, count 0 2006.229.07:07:27.99#ibcon#first serial, iclass 5, count 0 2006.229.07:07:27.99#ibcon#enter sib2, iclass 5, count 0 2006.229.07:07:27.99#ibcon#flushed, iclass 5, count 0 2006.229.07:07:27.99#ibcon#about to write, iclass 5, count 0 2006.229.07:07:27.99#ibcon#wrote, iclass 5, count 0 2006.229.07:07:27.99#ibcon#about to read 3, iclass 5, count 0 2006.229.07:07:28.01#ibcon#read 3, iclass 5, count 0 2006.229.07:07:28.01#ibcon#about to read 4, iclass 5, count 0 2006.229.07:07:28.01#ibcon#read 4, iclass 5, count 0 2006.229.07:07:28.01#ibcon#about to read 5, iclass 5, count 0 2006.229.07:07:28.01#ibcon#read 5, iclass 5, count 0 2006.229.07:07:28.01#ibcon#about to read 6, iclass 5, count 0 2006.229.07:07:28.01#ibcon#read 6, iclass 5, count 0 2006.229.07:07:28.01#ibcon#end of sib2, iclass 5, count 0 2006.229.07:07:28.01#ibcon#*mode == 0, iclass 5, count 0 2006.229.07:07:28.01#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.07:07:28.01#ibcon#[27=USB\r\n] 2006.229.07:07:28.01#ibcon#*before write, iclass 5, count 0 2006.229.07:07:28.01#ibcon#enter sib2, iclass 5, count 0 2006.229.07:07:28.01#ibcon#flushed, iclass 5, count 0 2006.229.07:07:28.01#ibcon#about to write, iclass 5, count 0 2006.229.07:07:28.01#ibcon#wrote, iclass 5, count 0 2006.229.07:07:28.01#ibcon#about to read 3, iclass 5, count 0 2006.229.07:07:28.04#ibcon#read 3, iclass 5, count 0 2006.229.07:07:28.04#ibcon#about to read 4, iclass 5, count 0 2006.229.07:07:28.04#ibcon#read 4, iclass 5, count 0 2006.229.07:07:28.04#ibcon#about to read 5, iclass 5, count 0 2006.229.07:07:28.04#ibcon#read 5, iclass 5, count 0 2006.229.07:07:28.04#ibcon#about to read 6, iclass 5, count 0 2006.229.07:07:28.04#ibcon#read 6, iclass 5, count 0 2006.229.07:07:28.04#ibcon#end of sib2, iclass 5, count 0 2006.229.07:07:28.04#ibcon#*after write, iclass 5, count 0 2006.229.07:07:28.04#ibcon#*before return 0, iclass 5, count 0 2006.229.07:07:28.04#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:28.04#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:07:28.04#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.07:07:28.04#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.07:07:28.04$vck44/vblo=4,679.99 2006.229.07:07:28.04#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.07:07:28.04#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.07:07:28.04#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:28.04#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:28.04#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:28.04#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:28.04#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:07:28.04#ibcon#first serial, iclass 7, count 0 2006.229.07:07:28.04#ibcon#enter sib2, iclass 7, count 0 2006.229.07:07:28.04#ibcon#flushed, iclass 7, count 0 2006.229.07:07:28.04#ibcon#about to write, iclass 7, count 0 2006.229.07:07:28.04#ibcon#wrote, iclass 7, count 0 2006.229.07:07:28.04#ibcon#about to read 3, iclass 7, count 0 2006.229.07:07:28.06#ibcon#read 3, iclass 7, count 0 2006.229.07:07:28.06#ibcon#about to read 4, iclass 7, count 0 2006.229.07:07:28.06#ibcon#read 4, iclass 7, count 0 2006.229.07:07:28.06#ibcon#about to read 5, iclass 7, count 0 2006.229.07:07:28.06#ibcon#read 5, iclass 7, count 0 2006.229.07:07:28.06#ibcon#about to read 6, iclass 7, count 0 2006.229.07:07:28.06#ibcon#read 6, iclass 7, count 0 2006.229.07:07:28.06#ibcon#end of sib2, iclass 7, count 0 2006.229.07:07:28.06#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:07:28.06#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:07:28.06#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:07:28.06#ibcon#*before write, iclass 7, count 0 2006.229.07:07:28.06#ibcon#enter sib2, iclass 7, count 0 2006.229.07:07:28.06#ibcon#flushed, iclass 7, count 0 2006.229.07:07:28.06#ibcon#about to write, iclass 7, count 0 2006.229.07:07:28.06#ibcon#wrote, iclass 7, count 0 2006.229.07:07:28.06#ibcon#about to read 3, iclass 7, count 0 2006.229.07:07:28.10#ibcon#read 3, iclass 7, count 0 2006.229.07:07:28.10#ibcon#about to read 4, iclass 7, count 0 2006.229.07:07:28.10#ibcon#read 4, iclass 7, count 0 2006.229.07:07:28.10#ibcon#about to read 5, iclass 7, count 0 2006.229.07:07:28.10#ibcon#read 5, iclass 7, count 0 2006.229.07:07:28.10#ibcon#about to read 6, iclass 7, count 0 2006.229.07:07:28.10#ibcon#read 6, iclass 7, count 0 2006.229.07:07:28.10#ibcon#end of sib2, iclass 7, count 0 2006.229.07:07:28.10#ibcon#*after write, iclass 7, count 0 2006.229.07:07:28.10#ibcon#*before return 0, iclass 7, count 0 2006.229.07:07:28.10#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:28.10#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:07:28.10#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:07:28.10#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:07:28.10$vck44/vb=4,4 2006.229.07:07:28.10#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.07:07:28.10#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.07:07:28.10#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:28.10#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:28.16#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:28.16#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:28.16#ibcon#enter wrdev, iclass 11, count 2 2006.229.07:07:28.16#ibcon#first serial, iclass 11, count 2 2006.229.07:07:28.16#ibcon#enter sib2, iclass 11, count 2 2006.229.07:07:28.16#ibcon#flushed, iclass 11, count 2 2006.229.07:07:28.16#ibcon#about to write, iclass 11, count 2 2006.229.07:07:28.16#ibcon#wrote, iclass 11, count 2 2006.229.07:07:28.16#ibcon#about to read 3, iclass 11, count 2 2006.229.07:07:28.18#ibcon#read 3, iclass 11, count 2 2006.229.07:07:28.18#ibcon#about to read 4, iclass 11, count 2 2006.229.07:07:28.18#ibcon#read 4, iclass 11, count 2 2006.229.07:07:28.18#ibcon#about to read 5, iclass 11, count 2 2006.229.07:07:28.18#ibcon#read 5, iclass 11, count 2 2006.229.07:07:28.18#ibcon#about to read 6, iclass 11, count 2 2006.229.07:07:28.18#ibcon#read 6, iclass 11, count 2 2006.229.07:07:28.18#ibcon#end of sib2, iclass 11, count 2 2006.229.07:07:28.18#ibcon#*mode == 0, iclass 11, count 2 2006.229.07:07:28.18#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.07:07:28.18#ibcon#[27=AT04-04\r\n] 2006.229.07:07:28.18#ibcon#*before write, iclass 11, count 2 2006.229.07:07:28.18#ibcon#enter sib2, iclass 11, count 2 2006.229.07:07:28.18#ibcon#flushed, iclass 11, count 2 2006.229.07:07:28.18#ibcon#about to write, iclass 11, count 2 2006.229.07:07:28.18#ibcon#wrote, iclass 11, count 2 2006.229.07:07:28.18#ibcon#about to read 3, iclass 11, count 2 2006.229.07:07:28.21#ibcon#read 3, iclass 11, count 2 2006.229.07:07:28.21#ibcon#about to read 4, iclass 11, count 2 2006.229.07:07:28.21#ibcon#read 4, iclass 11, count 2 2006.229.07:07:28.21#ibcon#about to read 5, iclass 11, count 2 2006.229.07:07:28.21#ibcon#read 5, iclass 11, count 2 2006.229.07:07:28.21#ibcon#about to read 6, iclass 11, count 2 2006.229.07:07:28.21#ibcon#read 6, iclass 11, count 2 2006.229.07:07:28.21#ibcon#end of sib2, iclass 11, count 2 2006.229.07:07:28.21#ibcon#*after write, iclass 11, count 2 2006.229.07:07:28.21#ibcon#*before return 0, iclass 11, count 2 2006.229.07:07:28.21#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:28.21#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:07:28.21#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.07:07:28.21#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:28.21#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:28.33#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:28.33#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:28.33#ibcon#enter wrdev, iclass 11, count 0 2006.229.07:07:28.33#ibcon#first serial, iclass 11, count 0 2006.229.07:07:28.33#ibcon#enter sib2, iclass 11, count 0 2006.229.07:07:28.33#ibcon#flushed, iclass 11, count 0 2006.229.07:07:28.33#ibcon#about to write, iclass 11, count 0 2006.229.07:07:28.33#ibcon#wrote, iclass 11, count 0 2006.229.07:07:28.33#ibcon#about to read 3, iclass 11, count 0 2006.229.07:07:28.35#ibcon#read 3, iclass 11, count 0 2006.229.07:07:28.35#ibcon#about to read 4, iclass 11, count 0 2006.229.07:07:28.35#ibcon#read 4, iclass 11, count 0 2006.229.07:07:28.35#ibcon#about to read 5, iclass 11, count 0 2006.229.07:07:28.35#ibcon#read 5, iclass 11, count 0 2006.229.07:07:28.35#ibcon#about to read 6, iclass 11, count 0 2006.229.07:07:28.35#ibcon#read 6, iclass 11, count 0 2006.229.07:07:28.35#ibcon#end of sib2, iclass 11, count 0 2006.229.07:07:28.35#ibcon#*mode == 0, iclass 11, count 0 2006.229.07:07:28.35#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.07:07:28.35#ibcon#[27=USB\r\n] 2006.229.07:07:28.35#ibcon#*before write, iclass 11, count 0 2006.229.07:07:28.35#ibcon#enter sib2, iclass 11, count 0 2006.229.07:07:28.35#ibcon#flushed, iclass 11, count 0 2006.229.07:07:28.35#ibcon#about to write, iclass 11, count 0 2006.229.07:07:28.35#ibcon#wrote, iclass 11, count 0 2006.229.07:07:28.35#ibcon#about to read 3, iclass 11, count 0 2006.229.07:07:28.38#ibcon#read 3, iclass 11, count 0 2006.229.07:07:28.38#ibcon#about to read 4, iclass 11, count 0 2006.229.07:07:28.38#ibcon#read 4, iclass 11, count 0 2006.229.07:07:28.38#ibcon#about to read 5, iclass 11, count 0 2006.229.07:07:28.38#ibcon#read 5, iclass 11, count 0 2006.229.07:07:28.38#ibcon#about to read 6, iclass 11, count 0 2006.229.07:07:28.38#ibcon#read 6, iclass 11, count 0 2006.229.07:07:28.38#ibcon#end of sib2, iclass 11, count 0 2006.229.07:07:28.38#ibcon#*after write, iclass 11, count 0 2006.229.07:07:28.38#ibcon#*before return 0, iclass 11, count 0 2006.229.07:07:28.38#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:28.38#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:07:28.38#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.07:07:28.38#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.07:07:28.38$vck44/vblo=5,709.99 2006.229.07:07:28.38#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.07:07:28.38#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.07:07:28.38#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:28.38#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:28.38#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:28.38#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:28.38#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:07:28.38#ibcon#first serial, iclass 13, count 0 2006.229.07:07:28.38#ibcon#enter sib2, iclass 13, count 0 2006.229.07:07:28.38#ibcon#flushed, iclass 13, count 0 2006.229.07:07:28.38#ibcon#about to write, iclass 13, count 0 2006.229.07:07:28.38#ibcon#wrote, iclass 13, count 0 2006.229.07:07:28.38#ibcon#about to read 3, iclass 13, count 0 2006.229.07:07:28.40#ibcon#read 3, iclass 13, count 0 2006.229.07:07:28.40#ibcon#about to read 4, iclass 13, count 0 2006.229.07:07:28.40#ibcon#read 4, iclass 13, count 0 2006.229.07:07:28.40#ibcon#about to read 5, iclass 13, count 0 2006.229.07:07:28.40#ibcon#read 5, iclass 13, count 0 2006.229.07:07:28.40#ibcon#about to read 6, iclass 13, count 0 2006.229.07:07:28.40#ibcon#read 6, iclass 13, count 0 2006.229.07:07:28.40#ibcon#end of sib2, iclass 13, count 0 2006.229.07:07:28.40#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:07:28.40#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:07:28.40#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:07:28.40#ibcon#*before write, iclass 13, count 0 2006.229.07:07:28.40#ibcon#enter sib2, iclass 13, count 0 2006.229.07:07:28.40#ibcon#flushed, iclass 13, count 0 2006.229.07:07:28.40#ibcon#about to write, iclass 13, count 0 2006.229.07:07:28.40#ibcon#wrote, iclass 13, count 0 2006.229.07:07:28.40#ibcon#about to read 3, iclass 13, count 0 2006.229.07:07:28.44#ibcon#read 3, iclass 13, count 0 2006.229.07:07:28.44#ibcon#about to read 4, iclass 13, count 0 2006.229.07:07:28.44#ibcon#read 4, iclass 13, count 0 2006.229.07:07:28.44#ibcon#about to read 5, iclass 13, count 0 2006.229.07:07:28.44#ibcon#read 5, iclass 13, count 0 2006.229.07:07:28.44#ibcon#about to read 6, iclass 13, count 0 2006.229.07:07:28.44#ibcon#read 6, iclass 13, count 0 2006.229.07:07:28.44#ibcon#end of sib2, iclass 13, count 0 2006.229.07:07:28.44#ibcon#*after write, iclass 13, count 0 2006.229.07:07:28.44#ibcon#*before return 0, iclass 13, count 0 2006.229.07:07:28.44#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:28.44#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:07:28.44#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:07:28.44#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:07:28.44$vck44/vb=5,4 2006.229.07:07:28.44#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.07:07:28.44#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.07:07:28.44#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:28.44#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:28.50#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:28.50#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:28.50#ibcon#enter wrdev, iclass 15, count 2 2006.229.07:07:28.50#ibcon#first serial, iclass 15, count 2 2006.229.07:07:28.50#ibcon#enter sib2, iclass 15, count 2 2006.229.07:07:28.50#ibcon#flushed, iclass 15, count 2 2006.229.07:07:28.50#ibcon#about to write, iclass 15, count 2 2006.229.07:07:28.50#ibcon#wrote, iclass 15, count 2 2006.229.07:07:28.50#ibcon#about to read 3, iclass 15, count 2 2006.229.07:07:28.52#ibcon#read 3, iclass 15, count 2 2006.229.07:07:28.52#ibcon#about to read 4, iclass 15, count 2 2006.229.07:07:28.52#ibcon#read 4, iclass 15, count 2 2006.229.07:07:28.52#ibcon#about to read 5, iclass 15, count 2 2006.229.07:07:28.52#ibcon#read 5, iclass 15, count 2 2006.229.07:07:28.52#ibcon#about to read 6, iclass 15, count 2 2006.229.07:07:28.52#ibcon#read 6, iclass 15, count 2 2006.229.07:07:28.52#ibcon#end of sib2, iclass 15, count 2 2006.229.07:07:28.52#ibcon#*mode == 0, iclass 15, count 2 2006.229.07:07:28.52#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.07:07:28.52#ibcon#[27=AT05-04\r\n] 2006.229.07:07:28.52#ibcon#*before write, iclass 15, count 2 2006.229.07:07:28.52#ibcon#enter sib2, iclass 15, count 2 2006.229.07:07:28.52#ibcon#flushed, iclass 15, count 2 2006.229.07:07:28.52#ibcon#about to write, iclass 15, count 2 2006.229.07:07:28.52#ibcon#wrote, iclass 15, count 2 2006.229.07:07:28.52#ibcon#about to read 3, iclass 15, count 2 2006.229.07:07:28.55#ibcon#read 3, iclass 15, count 2 2006.229.07:07:28.55#ibcon#about to read 4, iclass 15, count 2 2006.229.07:07:28.55#ibcon#read 4, iclass 15, count 2 2006.229.07:07:28.55#ibcon#about to read 5, iclass 15, count 2 2006.229.07:07:28.55#ibcon#read 5, iclass 15, count 2 2006.229.07:07:28.55#ibcon#about to read 6, iclass 15, count 2 2006.229.07:07:28.55#ibcon#read 6, iclass 15, count 2 2006.229.07:07:28.55#ibcon#end of sib2, iclass 15, count 2 2006.229.07:07:28.55#ibcon#*after write, iclass 15, count 2 2006.229.07:07:28.55#ibcon#*before return 0, iclass 15, count 2 2006.229.07:07:28.55#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:28.55#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:07:28.55#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.07:07:28.55#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:28.55#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:28.67#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:28.67#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:28.67#ibcon#enter wrdev, iclass 15, count 0 2006.229.07:07:28.67#ibcon#first serial, iclass 15, count 0 2006.229.07:07:28.67#ibcon#enter sib2, iclass 15, count 0 2006.229.07:07:28.67#ibcon#flushed, iclass 15, count 0 2006.229.07:07:28.67#ibcon#about to write, iclass 15, count 0 2006.229.07:07:28.67#ibcon#wrote, iclass 15, count 0 2006.229.07:07:28.67#ibcon#about to read 3, iclass 15, count 0 2006.229.07:07:28.69#ibcon#read 3, iclass 15, count 0 2006.229.07:07:28.69#ibcon#about to read 4, iclass 15, count 0 2006.229.07:07:28.69#ibcon#read 4, iclass 15, count 0 2006.229.07:07:28.69#ibcon#about to read 5, iclass 15, count 0 2006.229.07:07:28.69#ibcon#read 5, iclass 15, count 0 2006.229.07:07:28.69#ibcon#about to read 6, iclass 15, count 0 2006.229.07:07:28.69#ibcon#read 6, iclass 15, count 0 2006.229.07:07:28.69#ibcon#end of sib2, iclass 15, count 0 2006.229.07:07:28.69#ibcon#*mode == 0, iclass 15, count 0 2006.229.07:07:28.69#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.07:07:28.69#ibcon#[27=USB\r\n] 2006.229.07:07:28.69#ibcon#*before write, iclass 15, count 0 2006.229.07:07:28.69#ibcon#enter sib2, iclass 15, count 0 2006.229.07:07:28.69#ibcon#flushed, iclass 15, count 0 2006.229.07:07:28.69#ibcon#about to write, iclass 15, count 0 2006.229.07:07:28.69#ibcon#wrote, iclass 15, count 0 2006.229.07:07:28.69#ibcon#about to read 3, iclass 15, count 0 2006.229.07:07:28.72#ibcon#read 3, iclass 15, count 0 2006.229.07:07:28.72#ibcon#about to read 4, iclass 15, count 0 2006.229.07:07:28.72#ibcon#read 4, iclass 15, count 0 2006.229.07:07:28.72#ibcon#about to read 5, iclass 15, count 0 2006.229.07:07:28.72#ibcon#read 5, iclass 15, count 0 2006.229.07:07:28.72#ibcon#about to read 6, iclass 15, count 0 2006.229.07:07:28.72#ibcon#read 6, iclass 15, count 0 2006.229.07:07:28.72#ibcon#end of sib2, iclass 15, count 0 2006.229.07:07:28.72#ibcon#*after write, iclass 15, count 0 2006.229.07:07:28.72#ibcon#*before return 0, iclass 15, count 0 2006.229.07:07:28.72#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:28.72#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:07:28.72#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.07:07:28.72#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.07:07:28.72$vck44/vblo=6,719.99 2006.229.07:07:28.72#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.07:07:28.72#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.07:07:28.72#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:28.72#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:28.72#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:28.72#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:28.72#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:07:28.72#ibcon#first serial, iclass 17, count 0 2006.229.07:07:28.72#ibcon#enter sib2, iclass 17, count 0 2006.229.07:07:28.72#ibcon#flushed, iclass 17, count 0 2006.229.07:07:28.72#ibcon#about to write, iclass 17, count 0 2006.229.07:07:28.72#ibcon#wrote, iclass 17, count 0 2006.229.07:07:28.72#ibcon#about to read 3, iclass 17, count 0 2006.229.07:07:28.74#ibcon#read 3, iclass 17, count 0 2006.229.07:07:28.74#ibcon#about to read 4, iclass 17, count 0 2006.229.07:07:28.74#ibcon#read 4, iclass 17, count 0 2006.229.07:07:28.74#ibcon#about to read 5, iclass 17, count 0 2006.229.07:07:28.74#ibcon#read 5, iclass 17, count 0 2006.229.07:07:28.74#ibcon#about to read 6, iclass 17, count 0 2006.229.07:07:28.74#ibcon#read 6, iclass 17, count 0 2006.229.07:07:28.74#ibcon#end of sib2, iclass 17, count 0 2006.229.07:07:28.74#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:07:28.74#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:07:28.74#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:07:28.74#ibcon#*before write, iclass 17, count 0 2006.229.07:07:28.74#ibcon#enter sib2, iclass 17, count 0 2006.229.07:07:28.74#ibcon#flushed, iclass 17, count 0 2006.229.07:07:28.74#ibcon#about to write, iclass 17, count 0 2006.229.07:07:28.74#ibcon#wrote, iclass 17, count 0 2006.229.07:07:28.74#ibcon#about to read 3, iclass 17, count 0 2006.229.07:07:28.78#ibcon#read 3, iclass 17, count 0 2006.229.07:07:28.78#ibcon#about to read 4, iclass 17, count 0 2006.229.07:07:28.78#ibcon#read 4, iclass 17, count 0 2006.229.07:07:28.78#ibcon#about to read 5, iclass 17, count 0 2006.229.07:07:28.78#ibcon#read 5, iclass 17, count 0 2006.229.07:07:28.78#ibcon#about to read 6, iclass 17, count 0 2006.229.07:07:28.78#ibcon#read 6, iclass 17, count 0 2006.229.07:07:28.78#ibcon#end of sib2, iclass 17, count 0 2006.229.07:07:28.78#ibcon#*after write, iclass 17, count 0 2006.229.07:07:28.78#ibcon#*before return 0, iclass 17, count 0 2006.229.07:07:28.78#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:28.78#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:07:28.78#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:07:28.78#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:07:28.78$vck44/vb=6,4 2006.229.07:07:28.78#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.07:07:28.78#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.07:07:28.78#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:28.78#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:28.84#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:28.84#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:28.84#ibcon#enter wrdev, iclass 19, count 2 2006.229.07:07:28.84#ibcon#first serial, iclass 19, count 2 2006.229.07:07:28.84#ibcon#enter sib2, iclass 19, count 2 2006.229.07:07:28.84#ibcon#flushed, iclass 19, count 2 2006.229.07:07:28.84#ibcon#about to write, iclass 19, count 2 2006.229.07:07:28.84#ibcon#wrote, iclass 19, count 2 2006.229.07:07:28.84#ibcon#about to read 3, iclass 19, count 2 2006.229.07:07:28.86#ibcon#read 3, iclass 19, count 2 2006.229.07:07:28.86#ibcon#about to read 4, iclass 19, count 2 2006.229.07:07:28.86#ibcon#read 4, iclass 19, count 2 2006.229.07:07:28.86#ibcon#about to read 5, iclass 19, count 2 2006.229.07:07:28.86#ibcon#read 5, iclass 19, count 2 2006.229.07:07:28.86#ibcon#about to read 6, iclass 19, count 2 2006.229.07:07:28.86#ibcon#read 6, iclass 19, count 2 2006.229.07:07:28.86#ibcon#end of sib2, iclass 19, count 2 2006.229.07:07:28.86#ibcon#*mode == 0, iclass 19, count 2 2006.229.07:07:28.86#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.07:07:28.86#ibcon#[27=AT06-04\r\n] 2006.229.07:07:28.86#ibcon#*before write, iclass 19, count 2 2006.229.07:07:28.86#ibcon#enter sib2, iclass 19, count 2 2006.229.07:07:28.86#ibcon#flushed, iclass 19, count 2 2006.229.07:07:28.86#ibcon#about to write, iclass 19, count 2 2006.229.07:07:28.86#ibcon#wrote, iclass 19, count 2 2006.229.07:07:28.86#ibcon#about to read 3, iclass 19, count 2 2006.229.07:07:28.89#ibcon#read 3, iclass 19, count 2 2006.229.07:07:28.89#ibcon#about to read 4, iclass 19, count 2 2006.229.07:07:28.89#ibcon#read 4, iclass 19, count 2 2006.229.07:07:28.89#ibcon#about to read 5, iclass 19, count 2 2006.229.07:07:28.89#ibcon#read 5, iclass 19, count 2 2006.229.07:07:28.89#ibcon#about to read 6, iclass 19, count 2 2006.229.07:07:28.89#ibcon#read 6, iclass 19, count 2 2006.229.07:07:28.89#ibcon#end of sib2, iclass 19, count 2 2006.229.07:07:28.89#ibcon#*after write, iclass 19, count 2 2006.229.07:07:28.89#ibcon#*before return 0, iclass 19, count 2 2006.229.07:07:28.89#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:28.89#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:07:28.89#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.07:07:28.89#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:28.89#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:29.01#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:29.01#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:29.01#ibcon#enter wrdev, iclass 19, count 0 2006.229.07:07:29.01#ibcon#first serial, iclass 19, count 0 2006.229.07:07:29.01#ibcon#enter sib2, iclass 19, count 0 2006.229.07:07:29.01#ibcon#flushed, iclass 19, count 0 2006.229.07:07:29.01#ibcon#about to write, iclass 19, count 0 2006.229.07:07:29.01#ibcon#wrote, iclass 19, count 0 2006.229.07:07:29.01#ibcon#about to read 3, iclass 19, count 0 2006.229.07:07:29.03#ibcon#read 3, iclass 19, count 0 2006.229.07:07:29.03#ibcon#about to read 4, iclass 19, count 0 2006.229.07:07:29.03#ibcon#read 4, iclass 19, count 0 2006.229.07:07:29.03#ibcon#about to read 5, iclass 19, count 0 2006.229.07:07:29.03#ibcon#read 5, iclass 19, count 0 2006.229.07:07:29.03#ibcon#about to read 6, iclass 19, count 0 2006.229.07:07:29.03#ibcon#read 6, iclass 19, count 0 2006.229.07:07:29.03#ibcon#end of sib2, iclass 19, count 0 2006.229.07:07:29.03#ibcon#*mode == 0, iclass 19, count 0 2006.229.07:07:29.03#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.07:07:29.03#ibcon#[27=USB\r\n] 2006.229.07:07:29.03#ibcon#*before write, iclass 19, count 0 2006.229.07:07:29.03#ibcon#enter sib2, iclass 19, count 0 2006.229.07:07:29.03#ibcon#flushed, iclass 19, count 0 2006.229.07:07:29.03#ibcon#about to write, iclass 19, count 0 2006.229.07:07:29.03#ibcon#wrote, iclass 19, count 0 2006.229.07:07:29.03#ibcon#about to read 3, iclass 19, count 0 2006.229.07:07:29.06#ibcon#read 3, iclass 19, count 0 2006.229.07:07:29.06#ibcon#about to read 4, iclass 19, count 0 2006.229.07:07:29.06#ibcon#read 4, iclass 19, count 0 2006.229.07:07:29.06#ibcon#about to read 5, iclass 19, count 0 2006.229.07:07:29.06#ibcon#read 5, iclass 19, count 0 2006.229.07:07:29.06#ibcon#about to read 6, iclass 19, count 0 2006.229.07:07:29.06#ibcon#read 6, iclass 19, count 0 2006.229.07:07:29.06#ibcon#end of sib2, iclass 19, count 0 2006.229.07:07:29.06#ibcon#*after write, iclass 19, count 0 2006.229.07:07:29.06#ibcon#*before return 0, iclass 19, count 0 2006.229.07:07:29.06#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:29.06#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:07:29.06#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.07:07:29.06#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.07:07:29.06$vck44/vblo=7,734.99 2006.229.07:07:29.06#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.07:07:29.06#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.07:07:29.06#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:29.06#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:29.06#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:29.06#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:29.06#ibcon#enter wrdev, iclass 21, count 0 2006.229.07:07:29.06#ibcon#first serial, iclass 21, count 0 2006.229.07:07:29.06#ibcon#enter sib2, iclass 21, count 0 2006.229.07:07:29.06#ibcon#flushed, iclass 21, count 0 2006.229.07:07:29.06#ibcon#about to write, iclass 21, count 0 2006.229.07:07:29.06#ibcon#wrote, iclass 21, count 0 2006.229.07:07:29.06#ibcon#about to read 3, iclass 21, count 0 2006.229.07:07:29.08#ibcon#read 3, iclass 21, count 0 2006.229.07:07:29.08#ibcon#about to read 4, iclass 21, count 0 2006.229.07:07:29.08#ibcon#read 4, iclass 21, count 0 2006.229.07:07:29.08#ibcon#about to read 5, iclass 21, count 0 2006.229.07:07:29.08#ibcon#read 5, iclass 21, count 0 2006.229.07:07:29.08#ibcon#about to read 6, iclass 21, count 0 2006.229.07:07:29.08#ibcon#read 6, iclass 21, count 0 2006.229.07:07:29.08#ibcon#end of sib2, iclass 21, count 0 2006.229.07:07:29.08#ibcon#*mode == 0, iclass 21, count 0 2006.229.07:07:29.08#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.07:07:29.08#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:07:29.08#ibcon#*before write, iclass 21, count 0 2006.229.07:07:29.08#ibcon#enter sib2, iclass 21, count 0 2006.229.07:07:29.08#ibcon#flushed, iclass 21, count 0 2006.229.07:07:29.08#ibcon#about to write, iclass 21, count 0 2006.229.07:07:29.08#ibcon#wrote, iclass 21, count 0 2006.229.07:07:29.08#ibcon#about to read 3, iclass 21, count 0 2006.229.07:07:29.12#ibcon#read 3, iclass 21, count 0 2006.229.07:07:29.12#ibcon#about to read 4, iclass 21, count 0 2006.229.07:07:29.12#ibcon#read 4, iclass 21, count 0 2006.229.07:07:29.12#ibcon#about to read 5, iclass 21, count 0 2006.229.07:07:29.12#ibcon#read 5, iclass 21, count 0 2006.229.07:07:29.12#ibcon#about to read 6, iclass 21, count 0 2006.229.07:07:29.12#ibcon#read 6, iclass 21, count 0 2006.229.07:07:29.12#ibcon#end of sib2, iclass 21, count 0 2006.229.07:07:29.12#ibcon#*after write, iclass 21, count 0 2006.229.07:07:29.12#ibcon#*before return 0, iclass 21, count 0 2006.229.07:07:29.12#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:29.12#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:07:29.12#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.07:07:29.12#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.07:07:29.12$vck44/vb=7,4 2006.229.07:07:29.12#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.07:07:29.12#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.07:07:29.12#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:29.12#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:29.18#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:29.18#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:29.18#ibcon#enter wrdev, iclass 23, count 2 2006.229.07:07:29.18#ibcon#first serial, iclass 23, count 2 2006.229.07:07:29.18#ibcon#enter sib2, iclass 23, count 2 2006.229.07:07:29.18#ibcon#flushed, iclass 23, count 2 2006.229.07:07:29.18#ibcon#about to write, iclass 23, count 2 2006.229.07:07:29.18#ibcon#wrote, iclass 23, count 2 2006.229.07:07:29.18#ibcon#about to read 3, iclass 23, count 2 2006.229.07:07:29.20#ibcon#read 3, iclass 23, count 2 2006.229.07:07:29.20#ibcon#about to read 4, iclass 23, count 2 2006.229.07:07:29.20#ibcon#read 4, iclass 23, count 2 2006.229.07:07:29.20#ibcon#about to read 5, iclass 23, count 2 2006.229.07:07:29.20#ibcon#read 5, iclass 23, count 2 2006.229.07:07:29.20#ibcon#about to read 6, iclass 23, count 2 2006.229.07:07:29.20#ibcon#read 6, iclass 23, count 2 2006.229.07:07:29.20#ibcon#end of sib2, iclass 23, count 2 2006.229.07:07:29.20#ibcon#*mode == 0, iclass 23, count 2 2006.229.07:07:29.20#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.07:07:29.20#ibcon#[27=AT07-04\r\n] 2006.229.07:07:29.20#ibcon#*before write, iclass 23, count 2 2006.229.07:07:29.20#ibcon#enter sib2, iclass 23, count 2 2006.229.07:07:29.20#ibcon#flushed, iclass 23, count 2 2006.229.07:07:29.20#ibcon#about to write, iclass 23, count 2 2006.229.07:07:29.20#ibcon#wrote, iclass 23, count 2 2006.229.07:07:29.20#ibcon#about to read 3, iclass 23, count 2 2006.229.07:07:29.23#ibcon#read 3, iclass 23, count 2 2006.229.07:07:29.23#ibcon#about to read 4, iclass 23, count 2 2006.229.07:07:29.23#ibcon#read 4, iclass 23, count 2 2006.229.07:07:29.23#ibcon#about to read 5, iclass 23, count 2 2006.229.07:07:29.23#ibcon#read 5, iclass 23, count 2 2006.229.07:07:29.23#ibcon#about to read 6, iclass 23, count 2 2006.229.07:07:29.23#ibcon#read 6, iclass 23, count 2 2006.229.07:07:29.23#ibcon#end of sib2, iclass 23, count 2 2006.229.07:07:29.23#ibcon#*after write, iclass 23, count 2 2006.229.07:07:29.23#ibcon#*before return 0, iclass 23, count 2 2006.229.07:07:29.23#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:29.23#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:07:29.23#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.07:07:29.23#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:29.23#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:29.35#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:29.35#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:29.35#ibcon#enter wrdev, iclass 23, count 0 2006.229.07:07:29.35#ibcon#first serial, iclass 23, count 0 2006.229.07:07:29.35#ibcon#enter sib2, iclass 23, count 0 2006.229.07:07:29.35#ibcon#flushed, iclass 23, count 0 2006.229.07:07:29.35#ibcon#about to write, iclass 23, count 0 2006.229.07:07:29.35#ibcon#wrote, iclass 23, count 0 2006.229.07:07:29.35#ibcon#about to read 3, iclass 23, count 0 2006.229.07:07:29.37#ibcon#read 3, iclass 23, count 0 2006.229.07:07:29.37#ibcon#about to read 4, iclass 23, count 0 2006.229.07:07:29.37#ibcon#read 4, iclass 23, count 0 2006.229.07:07:29.37#ibcon#about to read 5, iclass 23, count 0 2006.229.07:07:29.37#ibcon#read 5, iclass 23, count 0 2006.229.07:07:29.37#ibcon#about to read 6, iclass 23, count 0 2006.229.07:07:29.37#ibcon#read 6, iclass 23, count 0 2006.229.07:07:29.37#ibcon#end of sib2, iclass 23, count 0 2006.229.07:07:29.37#ibcon#*mode == 0, iclass 23, count 0 2006.229.07:07:29.37#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.07:07:29.37#ibcon#[27=USB\r\n] 2006.229.07:07:29.37#ibcon#*before write, iclass 23, count 0 2006.229.07:07:29.37#ibcon#enter sib2, iclass 23, count 0 2006.229.07:07:29.37#ibcon#flushed, iclass 23, count 0 2006.229.07:07:29.37#ibcon#about to write, iclass 23, count 0 2006.229.07:07:29.37#ibcon#wrote, iclass 23, count 0 2006.229.07:07:29.37#ibcon#about to read 3, iclass 23, count 0 2006.229.07:07:29.40#ibcon#read 3, iclass 23, count 0 2006.229.07:07:29.40#ibcon#about to read 4, iclass 23, count 0 2006.229.07:07:29.40#ibcon#read 4, iclass 23, count 0 2006.229.07:07:29.40#ibcon#about to read 5, iclass 23, count 0 2006.229.07:07:29.40#ibcon#read 5, iclass 23, count 0 2006.229.07:07:29.40#ibcon#about to read 6, iclass 23, count 0 2006.229.07:07:29.40#ibcon#read 6, iclass 23, count 0 2006.229.07:07:29.40#ibcon#end of sib2, iclass 23, count 0 2006.229.07:07:29.40#ibcon#*after write, iclass 23, count 0 2006.229.07:07:29.40#ibcon#*before return 0, iclass 23, count 0 2006.229.07:07:29.40#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:29.40#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:07:29.40#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.07:07:29.40#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.07:07:29.40$vck44/vblo=8,744.99 2006.229.07:07:29.40#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.07:07:29.40#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.07:07:29.40#ibcon#ireg 17 cls_cnt 0 2006.229.07:07:29.40#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:29.40#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:29.40#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:29.40#ibcon#enter wrdev, iclass 25, count 0 2006.229.07:07:29.40#ibcon#first serial, iclass 25, count 0 2006.229.07:07:29.40#ibcon#enter sib2, iclass 25, count 0 2006.229.07:07:29.40#ibcon#flushed, iclass 25, count 0 2006.229.07:07:29.40#ibcon#about to write, iclass 25, count 0 2006.229.07:07:29.40#ibcon#wrote, iclass 25, count 0 2006.229.07:07:29.40#ibcon#about to read 3, iclass 25, count 0 2006.229.07:07:29.42#ibcon#read 3, iclass 25, count 0 2006.229.07:07:29.42#ibcon#about to read 4, iclass 25, count 0 2006.229.07:07:29.42#ibcon#read 4, iclass 25, count 0 2006.229.07:07:29.42#ibcon#about to read 5, iclass 25, count 0 2006.229.07:07:29.42#ibcon#read 5, iclass 25, count 0 2006.229.07:07:29.42#ibcon#about to read 6, iclass 25, count 0 2006.229.07:07:29.42#ibcon#read 6, iclass 25, count 0 2006.229.07:07:29.42#ibcon#end of sib2, iclass 25, count 0 2006.229.07:07:29.42#ibcon#*mode == 0, iclass 25, count 0 2006.229.07:07:29.42#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.07:07:29.42#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:07:29.42#ibcon#*before write, iclass 25, count 0 2006.229.07:07:29.42#ibcon#enter sib2, iclass 25, count 0 2006.229.07:07:29.42#ibcon#flushed, iclass 25, count 0 2006.229.07:07:29.42#ibcon#about to write, iclass 25, count 0 2006.229.07:07:29.42#ibcon#wrote, iclass 25, count 0 2006.229.07:07:29.42#ibcon#about to read 3, iclass 25, count 0 2006.229.07:07:29.46#ibcon#read 3, iclass 25, count 0 2006.229.07:07:29.46#ibcon#about to read 4, iclass 25, count 0 2006.229.07:07:29.46#ibcon#read 4, iclass 25, count 0 2006.229.07:07:29.46#ibcon#about to read 5, iclass 25, count 0 2006.229.07:07:29.46#ibcon#read 5, iclass 25, count 0 2006.229.07:07:29.46#ibcon#about to read 6, iclass 25, count 0 2006.229.07:07:29.46#ibcon#read 6, iclass 25, count 0 2006.229.07:07:29.46#ibcon#end of sib2, iclass 25, count 0 2006.229.07:07:29.46#ibcon#*after write, iclass 25, count 0 2006.229.07:07:29.46#ibcon#*before return 0, iclass 25, count 0 2006.229.07:07:29.46#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:29.46#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:07:29.46#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.07:07:29.46#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.07:07:29.46$vck44/vb=8,4 2006.229.07:07:29.46#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.07:07:29.46#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.07:07:29.46#ibcon#ireg 11 cls_cnt 2 2006.229.07:07:29.46#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:29.52#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:29.52#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:29.52#ibcon#enter wrdev, iclass 27, count 2 2006.229.07:07:29.52#ibcon#first serial, iclass 27, count 2 2006.229.07:07:29.52#ibcon#enter sib2, iclass 27, count 2 2006.229.07:07:29.52#ibcon#flushed, iclass 27, count 2 2006.229.07:07:29.52#ibcon#about to write, iclass 27, count 2 2006.229.07:07:29.52#ibcon#wrote, iclass 27, count 2 2006.229.07:07:29.52#ibcon#about to read 3, iclass 27, count 2 2006.229.07:07:29.54#ibcon#read 3, iclass 27, count 2 2006.229.07:07:29.54#ibcon#about to read 4, iclass 27, count 2 2006.229.07:07:29.54#ibcon#read 4, iclass 27, count 2 2006.229.07:07:29.54#ibcon#about to read 5, iclass 27, count 2 2006.229.07:07:29.54#ibcon#read 5, iclass 27, count 2 2006.229.07:07:29.54#ibcon#about to read 6, iclass 27, count 2 2006.229.07:07:29.54#ibcon#read 6, iclass 27, count 2 2006.229.07:07:29.54#ibcon#end of sib2, iclass 27, count 2 2006.229.07:07:29.54#ibcon#*mode == 0, iclass 27, count 2 2006.229.07:07:29.54#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.07:07:29.54#ibcon#[27=AT08-04\r\n] 2006.229.07:07:29.54#ibcon#*before write, iclass 27, count 2 2006.229.07:07:29.54#ibcon#enter sib2, iclass 27, count 2 2006.229.07:07:29.54#ibcon#flushed, iclass 27, count 2 2006.229.07:07:29.54#ibcon#about to write, iclass 27, count 2 2006.229.07:07:29.54#ibcon#wrote, iclass 27, count 2 2006.229.07:07:29.54#ibcon#about to read 3, iclass 27, count 2 2006.229.07:07:29.57#ibcon#read 3, iclass 27, count 2 2006.229.07:07:29.57#ibcon#about to read 4, iclass 27, count 2 2006.229.07:07:29.57#ibcon#read 4, iclass 27, count 2 2006.229.07:07:29.57#ibcon#about to read 5, iclass 27, count 2 2006.229.07:07:29.57#ibcon#read 5, iclass 27, count 2 2006.229.07:07:29.57#ibcon#about to read 6, iclass 27, count 2 2006.229.07:07:29.57#ibcon#read 6, iclass 27, count 2 2006.229.07:07:29.57#ibcon#end of sib2, iclass 27, count 2 2006.229.07:07:29.57#ibcon#*after write, iclass 27, count 2 2006.229.07:07:29.57#ibcon#*before return 0, iclass 27, count 2 2006.229.07:07:29.57#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:29.57#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:07:29.57#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.07:07:29.57#ibcon#ireg 7 cls_cnt 0 2006.229.07:07:29.57#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:29.69#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:29.69#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:29.69#ibcon#enter wrdev, iclass 27, count 0 2006.229.07:07:29.69#ibcon#first serial, iclass 27, count 0 2006.229.07:07:29.69#ibcon#enter sib2, iclass 27, count 0 2006.229.07:07:29.69#ibcon#flushed, iclass 27, count 0 2006.229.07:07:29.69#ibcon#about to write, iclass 27, count 0 2006.229.07:07:29.69#ibcon#wrote, iclass 27, count 0 2006.229.07:07:29.69#ibcon#about to read 3, iclass 27, count 0 2006.229.07:07:29.71#ibcon#read 3, iclass 27, count 0 2006.229.07:07:29.71#ibcon#about to read 4, iclass 27, count 0 2006.229.07:07:29.71#ibcon#read 4, iclass 27, count 0 2006.229.07:07:29.71#ibcon#about to read 5, iclass 27, count 0 2006.229.07:07:29.71#ibcon#read 5, iclass 27, count 0 2006.229.07:07:29.71#ibcon#about to read 6, iclass 27, count 0 2006.229.07:07:29.71#ibcon#read 6, iclass 27, count 0 2006.229.07:07:29.71#ibcon#end of sib2, iclass 27, count 0 2006.229.07:07:29.71#ibcon#*mode == 0, iclass 27, count 0 2006.229.07:07:29.71#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.07:07:29.71#ibcon#[27=USB\r\n] 2006.229.07:07:29.71#ibcon#*before write, iclass 27, count 0 2006.229.07:07:29.71#ibcon#enter sib2, iclass 27, count 0 2006.229.07:07:29.71#ibcon#flushed, iclass 27, count 0 2006.229.07:07:29.71#ibcon#about to write, iclass 27, count 0 2006.229.07:07:29.71#ibcon#wrote, iclass 27, count 0 2006.229.07:07:29.71#ibcon#about to read 3, iclass 27, count 0 2006.229.07:07:29.74#ibcon#read 3, iclass 27, count 0 2006.229.07:07:29.74#ibcon#about to read 4, iclass 27, count 0 2006.229.07:07:29.74#ibcon#read 4, iclass 27, count 0 2006.229.07:07:29.74#ibcon#about to read 5, iclass 27, count 0 2006.229.07:07:29.74#ibcon#read 5, iclass 27, count 0 2006.229.07:07:29.74#ibcon#about to read 6, iclass 27, count 0 2006.229.07:07:29.74#ibcon#read 6, iclass 27, count 0 2006.229.07:07:29.74#ibcon#end of sib2, iclass 27, count 0 2006.229.07:07:29.74#ibcon#*after write, iclass 27, count 0 2006.229.07:07:29.74#ibcon#*before return 0, iclass 27, count 0 2006.229.07:07:29.74#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:29.74#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:07:29.74#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.07:07:29.74#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.07:07:29.74$vck44/vabw=wide 2006.229.07:07:29.74#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.07:07:29.74#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.07:07:29.74#ibcon#ireg 8 cls_cnt 0 2006.229.07:07:29.74#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:29.74#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:29.74#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:29.74#ibcon#enter wrdev, iclass 29, count 0 2006.229.07:07:29.74#ibcon#first serial, iclass 29, count 0 2006.229.07:07:29.74#ibcon#enter sib2, iclass 29, count 0 2006.229.07:07:29.74#ibcon#flushed, iclass 29, count 0 2006.229.07:07:29.74#ibcon#about to write, iclass 29, count 0 2006.229.07:07:29.74#ibcon#wrote, iclass 29, count 0 2006.229.07:07:29.74#ibcon#about to read 3, iclass 29, count 0 2006.229.07:07:29.76#ibcon#read 3, iclass 29, count 0 2006.229.07:07:29.76#ibcon#about to read 4, iclass 29, count 0 2006.229.07:07:29.76#ibcon#read 4, iclass 29, count 0 2006.229.07:07:29.76#ibcon#about to read 5, iclass 29, count 0 2006.229.07:07:29.76#ibcon#read 5, iclass 29, count 0 2006.229.07:07:29.76#ibcon#about to read 6, iclass 29, count 0 2006.229.07:07:29.76#ibcon#read 6, iclass 29, count 0 2006.229.07:07:29.76#ibcon#end of sib2, iclass 29, count 0 2006.229.07:07:29.76#ibcon#*mode == 0, iclass 29, count 0 2006.229.07:07:29.76#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.07:07:29.76#ibcon#[25=BW32\r\n] 2006.229.07:07:29.76#ibcon#*before write, iclass 29, count 0 2006.229.07:07:29.76#ibcon#enter sib2, iclass 29, count 0 2006.229.07:07:29.76#ibcon#flushed, iclass 29, count 0 2006.229.07:07:29.76#ibcon#about to write, iclass 29, count 0 2006.229.07:07:29.76#ibcon#wrote, iclass 29, count 0 2006.229.07:07:29.76#ibcon#about to read 3, iclass 29, count 0 2006.229.07:07:29.79#ibcon#read 3, iclass 29, count 0 2006.229.07:07:29.79#ibcon#about to read 4, iclass 29, count 0 2006.229.07:07:29.79#ibcon#read 4, iclass 29, count 0 2006.229.07:07:29.79#ibcon#about to read 5, iclass 29, count 0 2006.229.07:07:29.79#ibcon#read 5, iclass 29, count 0 2006.229.07:07:29.79#ibcon#about to read 6, iclass 29, count 0 2006.229.07:07:29.79#ibcon#read 6, iclass 29, count 0 2006.229.07:07:29.79#ibcon#end of sib2, iclass 29, count 0 2006.229.07:07:29.79#ibcon#*after write, iclass 29, count 0 2006.229.07:07:29.79#ibcon#*before return 0, iclass 29, count 0 2006.229.07:07:29.79#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:29.79#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:07:29.79#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.07:07:29.79#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.07:07:29.79$vck44/vbbw=wide 2006.229.07:07:29.79#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.07:07:29.79#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.07:07:29.79#ibcon#ireg 8 cls_cnt 0 2006.229.07:07:29.79#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:07:29.86#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:07:29.86#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:07:29.86#ibcon#enter wrdev, iclass 31, count 0 2006.229.07:07:29.86#ibcon#first serial, iclass 31, count 0 2006.229.07:07:29.86#ibcon#enter sib2, iclass 31, count 0 2006.229.07:07:29.86#ibcon#flushed, iclass 31, count 0 2006.229.07:07:29.86#ibcon#about to write, iclass 31, count 0 2006.229.07:07:29.86#ibcon#wrote, iclass 31, count 0 2006.229.07:07:29.86#ibcon#about to read 3, iclass 31, count 0 2006.229.07:07:29.88#ibcon#read 3, iclass 31, count 0 2006.229.07:07:29.88#ibcon#about to read 4, iclass 31, count 0 2006.229.07:07:29.88#ibcon#read 4, iclass 31, count 0 2006.229.07:07:29.88#ibcon#about to read 5, iclass 31, count 0 2006.229.07:07:29.88#ibcon#read 5, iclass 31, count 0 2006.229.07:07:29.88#ibcon#about to read 6, iclass 31, count 0 2006.229.07:07:29.88#ibcon#read 6, iclass 31, count 0 2006.229.07:07:29.88#ibcon#end of sib2, iclass 31, count 0 2006.229.07:07:29.88#ibcon#*mode == 0, iclass 31, count 0 2006.229.07:07:29.88#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.07:07:29.88#ibcon#[27=BW32\r\n] 2006.229.07:07:29.88#ibcon#*before write, iclass 31, count 0 2006.229.07:07:29.88#ibcon#enter sib2, iclass 31, count 0 2006.229.07:07:29.88#ibcon#flushed, iclass 31, count 0 2006.229.07:07:29.88#ibcon#about to write, iclass 31, count 0 2006.229.07:07:29.88#ibcon#wrote, iclass 31, count 0 2006.229.07:07:29.88#ibcon#about to read 3, iclass 31, count 0 2006.229.07:07:29.91#ibcon#read 3, iclass 31, count 0 2006.229.07:07:29.91#ibcon#about to read 4, iclass 31, count 0 2006.229.07:07:29.91#ibcon#read 4, iclass 31, count 0 2006.229.07:07:29.91#ibcon#about to read 5, iclass 31, count 0 2006.229.07:07:29.91#ibcon#read 5, iclass 31, count 0 2006.229.07:07:29.91#ibcon#about to read 6, iclass 31, count 0 2006.229.07:07:29.91#ibcon#read 6, iclass 31, count 0 2006.229.07:07:29.91#ibcon#end of sib2, iclass 31, count 0 2006.229.07:07:29.91#ibcon#*after write, iclass 31, count 0 2006.229.07:07:29.91#ibcon#*before return 0, iclass 31, count 0 2006.229.07:07:29.91#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:07:29.91#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:07:29.91#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.07:07:29.91#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.07:07:29.91$setupk4/ifdk4 2006.229.07:07:29.91$ifdk4/lo= 2006.229.07:07:29.91$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:07:29.91$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:07:29.91$ifdk4/patch= 2006.229.07:07:29.91$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:07:29.91$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:07:29.91$setupk4/!*+20s 2006.229.07:07:37.73#abcon#<5=/06 2.8 4.7 30.12 921000.1\r\n> 2006.229.07:07:37.75#abcon#{5=INTERFACE CLEAR} 2006.229.07:07:37.81#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:07:44.34$setupk4/"tpicd 2006.229.07:07:44.34$setupk4/echo=off 2006.229.07:07:44.34$setupk4/xlog=off 2006.229.07:07:44.34:!2006.229.07:16:25 2006.229.07:07:50.13#trakl#Source acquired 2006.229.07:07:50.13#flagr#flagr/antenna,acquired 2006.229.07:16:25.00:preob 2006.229.07:16:25.13/onsource/TRACKING 2006.229.07:16:25.13:!2006.229.07:16:35 2006.229.07:16:35.00:"tape 2006.229.07:16:35.00:"st=record 2006.229.07:16:35.00:data_valid=on 2006.229.07:16:35.00:midob 2006.229.07:16:35.14/onsource/TRACKING 2006.229.07:16:35.14/wx/30.09,1000.2,92 2006.229.07:16:35.23/cable/+6.3955E-03 2006.229.07:16:36.32/va/01,08,usb,yes,29,31 2006.229.07:16:36.32/va/02,07,usb,yes,31,32 2006.229.07:16:36.32/va/03,06,usb,yes,39,41 2006.229.07:16:36.32/va/04,07,usb,yes,32,34 2006.229.07:16:36.32/va/05,04,usb,yes,29,29 2006.229.07:16:36.32/va/06,04,usb,yes,32,32 2006.229.07:16:36.32/va/07,05,usb,yes,29,29 2006.229.07:16:36.32/va/08,06,usb,yes,21,26 2006.229.07:16:36.55/valo/01,524.99,yes,locked 2006.229.07:16:36.55/valo/02,534.99,yes,locked 2006.229.07:16:36.55/valo/03,564.99,yes,locked 2006.229.07:16:36.55/valo/04,624.99,yes,locked 2006.229.07:16:36.55/valo/05,734.99,yes,locked 2006.229.07:16:36.55/valo/06,814.99,yes,locked 2006.229.07:16:36.55/valo/07,864.99,yes,locked 2006.229.07:16:36.55/valo/08,884.99,yes,locked 2006.229.07:16:37.64/vb/01,04,usb,yes,31,28 2006.229.07:16:37.64/vb/02,04,usb,yes,33,33 2006.229.07:16:37.64/vb/03,04,usb,yes,30,33 2006.229.07:16:37.64/vb/04,04,usb,yes,34,33 2006.229.07:16:37.64/vb/05,04,usb,yes,27,29 2006.229.07:16:37.64/vb/06,04,usb,yes,31,27 2006.229.07:16:37.64/vb/07,04,usb,yes,31,31 2006.229.07:16:37.64/vb/08,04,usb,yes,28,32 2006.229.07:16:37.87/vblo/01,629.99,yes,locked 2006.229.07:16:37.87/vblo/02,634.99,yes,locked 2006.229.07:16:37.87/vblo/03,649.99,yes,locked 2006.229.07:16:37.87/vblo/04,679.99,yes,locked 2006.229.07:16:37.87/vblo/05,709.99,yes,locked 2006.229.07:16:37.87/vblo/06,719.99,yes,locked 2006.229.07:16:37.87/vblo/07,734.99,yes,locked 2006.229.07:16:37.87/vblo/08,744.99,yes,locked 2006.229.07:16:38.02/vabw/8 2006.229.07:16:38.17/vbbw/8 2006.229.07:16:38.26/xfe/off,on,12.0 2006.229.07:16:38.63/ifatt/23,28,28,28 2006.229.07:16:39.07/fmout-gps/S +4.54E-07 2006.229.07:16:39.11:!2006.229.07:17:25 2006.229.07:17:25.00:data_valid=off 2006.229.07:17:25.00:"et 2006.229.07:17:25.00:!+3s 2006.229.07:17:28.01:"tape 2006.229.07:17:28.01:postob 2006.229.07:17:28.07/cable/+6.3976E-03 2006.229.07:17:28.07/wx/30.08,1000.2,92 2006.229.07:17:29.08/fmout-gps/S +4.55E-07 2006.229.07:17:29.08:scan_name=229-0722,jd0608,390 2006.229.07:17:29.08:source=1622-253,162546.89,-252738.3,2000.0,cw 2006.229.07:17:30.14#flagr#flagr/antenna,new-source 2006.229.07:17:30.14:checkk5 2006.229.07:17:30.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:17:30.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:17:31.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:17:31.81/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:17:32.21/chk_obsdata//k5ts1/T2290716??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.07:17:32.61/chk_obsdata//k5ts2/T2290716??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.07:17:33.03/chk_obsdata//k5ts3/T2290716??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.07:17:33.41/chk_obsdata//k5ts4/T2290716??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.07:17:34.13/k5log//k5ts1_log_newline 2006.229.07:17:34.83/k5log//k5ts2_log_newline 2006.229.07:17:35.54/k5log//k5ts3_log_newline 2006.229.07:17:36.27/k5log//k5ts4_log_newline 2006.229.07:17:36.30/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:17:36.30:setupk4=1 2006.229.07:17:36.30$setupk4/echo=on 2006.229.07:17:36.30$setupk4/pcalon 2006.229.07:17:36.30$pcalon/"no phase cal control is implemented here 2006.229.07:17:36.30$setupk4/"tpicd=stop 2006.229.07:17:36.30$setupk4/"rec=synch_on 2006.229.07:17:36.30$setupk4/"rec_mode=128 2006.229.07:17:36.30$setupk4/!* 2006.229.07:17:36.30$setupk4/recpk4 2006.229.07:17:36.30$recpk4/recpatch= 2006.229.07:17:36.31$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:17:36.31$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:17:36.31$setupk4/vck44 2006.229.07:17:36.31$vck44/valo=1,524.99 2006.229.07:17:36.31#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:17:36.31#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:17:36.31#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:36.31#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:36.31#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:36.31#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:36.31#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:17:36.31#ibcon#first serial, iclass 20, count 0 2006.229.07:17:36.31#ibcon#enter sib2, iclass 20, count 0 2006.229.07:17:36.31#ibcon#flushed, iclass 20, count 0 2006.229.07:17:36.31#ibcon#about to write, iclass 20, count 0 2006.229.07:17:36.31#ibcon#wrote, iclass 20, count 0 2006.229.07:17:36.31#ibcon#about to read 3, iclass 20, count 0 2006.229.07:17:36.32#ibcon#read 3, iclass 20, count 0 2006.229.07:17:36.32#ibcon#about to read 4, iclass 20, count 0 2006.229.07:17:36.32#ibcon#read 4, iclass 20, count 0 2006.229.07:17:36.32#ibcon#about to read 5, iclass 20, count 0 2006.229.07:17:36.32#ibcon#read 5, iclass 20, count 0 2006.229.07:17:36.32#ibcon#about to read 6, iclass 20, count 0 2006.229.07:17:36.32#ibcon#read 6, iclass 20, count 0 2006.229.07:17:36.32#ibcon#end of sib2, iclass 20, count 0 2006.229.07:17:36.32#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:17:36.32#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:17:36.32#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:17:36.32#ibcon#*before write, iclass 20, count 0 2006.229.07:17:36.32#ibcon#enter sib2, iclass 20, count 0 2006.229.07:17:36.32#ibcon#flushed, iclass 20, count 0 2006.229.07:17:36.32#ibcon#about to write, iclass 20, count 0 2006.229.07:17:36.32#ibcon#wrote, iclass 20, count 0 2006.229.07:17:36.32#ibcon#about to read 3, iclass 20, count 0 2006.229.07:17:36.37#ibcon#read 3, iclass 20, count 0 2006.229.07:17:36.37#ibcon#about to read 4, iclass 20, count 0 2006.229.07:17:36.37#ibcon#read 4, iclass 20, count 0 2006.229.07:17:36.37#ibcon#about to read 5, iclass 20, count 0 2006.229.07:17:36.37#ibcon#read 5, iclass 20, count 0 2006.229.07:17:36.37#ibcon#about to read 6, iclass 20, count 0 2006.229.07:17:36.37#ibcon#read 6, iclass 20, count 0 2006.229.07:17:36.37#ibcon#end of sib2, iclass 20, count 0 2006.229.07:17:36.37#ibcon#*after write, iclass 20, count 0 2006.229.07:17:36.37#ibcon#*before return 0, iclass 20, count 0 2006.229.07:17:36.37#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:36.37#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:36.37#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:17:36.37#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:17:36.37$vck44/va=1,8 2006.229.07:17:36.37#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.07:17:36.37#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.07:17:36.37#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:36.37#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:36.37#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:36.37#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:36.37#ibcon#enter wrdev, iclass 22, count 2 2006.229.07:17:36.37#ibcon#first serial, iclass 22, count 2 2006.229.07:17:36.37#ibcon#enter sib2, iclass 22, count 2 2006.229.07:17:36.37#ibcon#flushed, iclass 22, count 2 2006.229.07:17:36.37#ibcon#about to write, iclass 22, count 2 2006.229.07:17:36.37#ibcon#wrote, iclass 22, count 2 2006.229.07:17:36.37#ibcon#about to read 3, iclass 22, count 2 2006.229.07:17:36.39#ibcon#read 3, iclass 22, count 2 2006.229.07:17:36.39#ibcon#about to read 4, iclass 22, count 2 2006.229.07:17:36.39#ibcon#read 4, iclass 22, count 2 2006.229.07:17:36.39#ibcon#about to read 5, iclass 22, count 2 2006.229.07:17:36.39#ibcon#read 5, iclass 22, count 2 2006.229.07:17:36.39#ibcon#about to read 6, iclass 22, count 2 2006.229.07:17:36.39#ibcon#read 6, iclass 22, count 2 2006.229.07:17:36.39#ibcon#end of sib2, iclass 22, count 2 2006.229.07:17:36.39#ibcon#*mode == 0, iclass 22, count 2 2006.229.07:17:36.39#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.07:17:36.39#ibcon#[25=AT01-08\r\n] 2006.229.07:17:36.39#ibcon#*before write, iclass 22, count 2 2006.229.07:17:36.39#ibcon#enter sib2, iclass 22, count 2 2006.229.07:17:36.39#ibcon#flushed, iclass 22, count 2 2006.229.07:17:36.39#ibcon#about to write, iclass 22, count 2 2006.229.07:17:36.39#ibcon#wrote, iclass 22, count 2 2006.229.07:17:36.39#ibcon#about to read 3, iclass 22, count 2 2006.229.07:17:36.42#ibcon#read 3, iclass 22, count 2 2006.229.07:17:36.42#ibcon#about to read 4, iclass 22, count 2 2006.229.07:17:36.42#ibcon#read 4, iclass 22, count 2 2006.229.07:17:36.42#ibcon#about to read 5, iclass 22, count 2 2006.229.07:17:36.42#ibcon#read 5, iclass 22, count 2 2006.229.07:17:36.42#ibcon#about to read 6, iclass 22, count 2 2006.229.07:17:36.42#ibcon#read 6, iclass 22, count 2 2006.229.07:17:36.42#ibcon#end of sib2, iclass 22, count 2 2006.229.07:17:36.42#ibcon#*after write, iclass 22, count 2 2006.229.07:17:36.42#ibcon#*before return 0, iclass 22, count 2 2006.229.07:17:36.42#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:36.42#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:36.42#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.07:17:36.42#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:36.42#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:36.54#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:36.54#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:36.54#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:17:36.54#ibcon#first serial, iclass 22, count 0 2006.229.07:17:36.54#ibcon#enter sib2, iclass 22, count 0 2006.229.07:17:36.54#ibcon#flushed, iclass 22, count 0 2006.229.07:17:36.54#ibcon#about to write, iclass 22, count 0 2006.229.07:17:36.54#ibcon#wrote, iclass 22, count 0 2006.229.07:17:36.54#ibcon#about to read 3, iclass 22, count 0 2006.229.07:17:36.56#ibcon#read 3, iclass 22, count 0 2006.229.07:17:36.56#ibcon#about to read 4, iclass 22, count 0 2006.229.07:17:36.56#ibcon#read 4, iclass 22, count 0 2006.229.07:17:36.56#ibcon#about to read 5, iclass 22, count 0 2006.229.07:17:36.56#ibcon#read 5, iclass 22, count 0 2006.229.07:17:36.56#ibcon#about to read 6, iclass 22, count 0 2006.229.07:17:36.56#ibcon#read 6, iclass 22, count 0 2006.229.07:17:36.56#ibcon#end of sib2, iclass 22, count 0 2006.229.07:17:36.56#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:17:36.56#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:17:36.56#ibcon#[25=USB\r\n] 2006.229.07:17:36.56#ibcon#*before write, iclass 22, count 0 2006.229.07:17:36.56#ibcon#enter sib2, iclass 22, count 0 2006.229.07:17:36.56#ibcon#flushed, iclass 22, count 0 2006.229.07:17:36.56#ibcon#about to write, iclass 22, count 0 2006.229.07:17:36.56#ibcon#wrote, iclass 22, count 0 2006.229.07:17:36.56#ibcon#about to read 3, iclass 22, count 0 2006.229.07:17:36.59#ibcon#read 3, iclass 22, count 0 2006.229.07:17:36.59#ibcon#about to read 4, iclass 22, count 0 2006.229.07:17:36.59#ibcon#read 4, iclass 22, count 0 2006.229.07:17:36.59#ibcon#about to read 5, iclass 22, count 0 2006.229.07:17:36.59#ibcon#read 5, iclass 22, count 0 2006.229.07:17:36.59#ibcon#about to read 6, iclass 22, count 0 2006.229.07:17:36.59#ibcon#read 6, iclass 22, count 0 2006.229.07:17:36.59#ibcon#end of sib2, iclass 22, count 0 2006.229.07:17:36.59#ibcon#*after write, iclass 22, count 0 2006.229.07:17:36.59#ibcon#*before return 0, iclass 22, count 0 2006.229.07:17:36.59#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:36.59#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:36.59#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:17:36.59#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:17:36.59$vck44/valo=2,534.99 2006.229.07:17:36.59#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.07:17:36.59#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.07:17:36.59#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:36.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:36.59#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:36.59#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:36.59#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:17:36.59#ibcon#first serial, iclass 24, count 0 2006.229.07:17:36.59#ibcon#enter sib2, iclass 24, count 0 2006.229.07:17:36.59#ibcon#flushed, iclass 24, count 0 2006.229.07:17:36.59#ibcon#about to write, iclass 24, count 0 2006.229.07:17:36.59#ibcon#wrote, iclass 24, count 0 2006.229.07:17:36.59#ibcon#about to read 3, iclass 24, count 0 2006.229.07:17:36.61#ibcon#read 3, iclass 24, count 0 2006.229.07:17:36.61#ibcon#about to read 4, iclass 24, count 0 2006.229.07:17:36.61#ibcon#read 4, iclass 24, count 0 2006.229.07:17:36.61#ibcon#about to read 5, iclass 24, count 0 2006.229.07:17:36.61#ibcon#read 5, iclass 24, count 0 2006.229.07:17:36.61#ibcon#about to read 6, iclass 24, count 0 2006.229.07:17:36.61#ibcon#read 6, iclass 24, count 0 2006.229.07:17:36.61#ibcon#end of sib2, iclass 24, count 0 2006.229.07:17:36.61#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:17:36.61#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:17:36.61#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:17:36.61#ibcon#*before write, iclass 24, count 0 2006.229.07:17:36.61#ibcon#enter sib2, iclass 24, count 0 2006.229.07:17:36.61#ibcon#flushed, iclass 24, count 0 2006.229.07:17:36.61#ibcon#about to write, iclass 24, count 0 2006.229.07:17:36.61#ibcon#wrote, iclass 24, count 0 2006.229.07:17:36.61#ibcon#about to read 3, iclass 24, count 0 2006.229.07:17:36.65#ibcon#read 3, iclass 24, count 0 2006.229.07:17:36.65#ibcon#about to read 4, iclass 24, count 0 2006.229.07:17:36.65#ibcon#read 4, iclass 24, count 0 2006.229.07:17:36.65#ibcon#about to read 5, iclass 24, count 0 2006.229.07:17:36.65#ibcon#read 5, iclass 24, count 0 2006.229.07:17:36.65#ibcon#about to read 6, iclass 24, count 0 2006.229.07:17:36.65#ibcon#read 6, iclass 24, count 0 2006.229.07:17:36.65#ibcon#end of sib2, iclass 24, count 0 2006.229.07:17:36.65#ibcon#*after write, iclass 24, count 0 2006.229.07:17:36.65#ibcon#*before return 0, iclass 24, count 0 2006.229.07:17:36.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:36.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:36.65#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:17:36.65#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:17:36.65$vck44/va=2,7 2006.229.07:17:36.65#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.07:17:36.65#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.07:17:36.65#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:36.65#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:36.71#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:36.71#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:36.71#ibcon#enter wrdev, iclass 26, count 2 2006.229.07:17:36.71#ibcon#first serial, iclass 26, count 2 2006.229.07:17:36.71#ibcon#enter sib2, iclass 26, count 2 2006.229.07:17:36.71#ibcon#flushed, iclass 26, count 2 2006.229.07:17:36.71#ibcon#about to write, iclass 26, count 2 2006.229.07:17:36.71#ibcon#wrote, iclass 26, count 2 2006.229.07:17:36.71#ibcon#about to read 3, iclass 26, count 2 2006.229.07:17:36.73#ibcon#read 3, iclass 26, count 2 2006.229.07:17:36.73#ibcon#about to read 4, iclass 26, count 2 2006.229.07:17:36.73#ibcon#read 4, iclass 26, count 2 2006.229.07:17:36.73#ibcon#about to read 5, iclass 26, count 2 2006.229.07:17:36.73#ibcon#read 5, iclass 26, count 2 2006.229.07:17:36.73#ibcon#about to read 6, iclass 26, count 2 2006.229.07:17:36.73#ibcon#read 6, iclass 26, count 2 2006.229.07:17:36.73#ibcon#end of sib2, iclass 26, count 2 2006.229.07:17:36.73#ibcon#*mode == 0, iclass 26, count 2 2006.229.07:17:36.73#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.07:17:36.73#ibcon#[25=AT02-07\r\n] 2006.229.07:17:36.73#ibcon#*before write, iclass 26, count 2 2006.229.07:17:36.73#ibcon#enter sib2, iclass 26, count 2 2006.229.07:17:36.73#ibcon#flushed, iclass 26, count 2 2006.229.07:17:36.73#ibcon#about to write, iclass 26, count 2 2006.229.07:17:36.73#ibcon#wrote, iclass 26, count 2 2006.229.07:17:36.73#ibcon#about to read 3, iclass 26, count 2 2006.229.07:17:36.76#ibcon#read 3, iclass 26, count 2 2006.229.07:17:36.76#ibcon#about to read 4, iclass 26, count 2 2006.229.07:17:36.76#ibcon#read 4, iclass 26, count 2 2006.229.07:17:36.76#ibcon#about to read 5, iclass 26, count 2 2006.229.07:17:36.76#ibcon#read 5, iclass 26, count 2 2006.229.07:17:36.76#ibcon#about to read 6, iclass 26, count 2 2006.229.07:17:36.76#ibcon#read 6, iclass 26, count 2 2006.229.07:17:36.76#ibcon#end of sib2, iclass 26, count 2 2006.229.07:17:36.76#ibcon#*after write, iclass 26, count 2 2006.229.07:17:36.76#ibcon#*before return 0, iclass 26, count 2 2006.229.07:17:36.76#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:36.76#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:36.76#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.07:17:36.76#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:36.76#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:36.88#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:36.88#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:36.88#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:17:36.88#ibcon#first serial, iclass 26, count 0 2006.229.07:17:36.88#ibcon#enter sib2, iclass 26, count 0 2006.229.07:17:36.88#ibcon#flushed, iclass 26, count 0 2006.229.07:17:36.88#ibcon#about to write, iclass 26, count 0 2006.229.07:17:36.88#ibcon#wrote, iclass 26, count 0 2006.229.07:17:36.88#ibcon#about to read 3, iclass 26, count 0 2006.229.07:17:36.90#ibcon#read 3, iclass 26, count 0 2006.229.07:17:36.90#ibcon#about to read 4, iclass 26, count 0 2006.229.07:17:36.90#ibcon#read 4, iclass 26, count 0 2006.229.07:17:36.90#ibcon#about to read 5, iclass 26, count 0 2006.229.07:17:36.90#ibcon#read 5, iclass 26, count 0 2006.229.07:17:36.90#ibcon#about to read 6, iclass 26, count 0 2006.229.07:17:36.90#ibcon#read 6, iclass 26, count 0 2006.229.07:17:36.90#ibcon#end of sib2, iclass 26, count 0 2006.229.07:17:36.90#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:17:36.90#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:17:36.90#ibcon#[25=USB\r\n] 2006.229.07:17:36.90#ibcon#*before write, iclass 26, count 0 2006.229.07:17:36.90#ibcon#enter sib2, iclass 26, count 0 2006.229.07:17:36.90#ibcon#flushed, iclass 26, count 0 2006.229.07:17:36.90#ibcon#about to write, iclass 26, count 0 2006.229.07:17:36.90#ibcon#wrote, iclass 26, count 0 2006.229.07:17:36.90#ibcon#about to read 3, iclass 26, count 0 2006.229.07:17:36.93#ibcon#read 3, iclass 26, count 0 2006.229.07:17:36.93#ibcon#about to read 4, iclass 26, count 0 2006.229.07:17:36.93#ibcon#read 4, iclass 26, count 0 2006.229.07:17:36.93#ibcon#about to read 5, iclass 26, count 0 2006.229.07:17:36.93#ibcon#read 5, iclass 26, count 0 2006.229.07:17:36.93#ibcon#about to read 6, iclass 26, count 0 2006.229.07:17:36.93#ibcon#read 6, iclass 26, count 0 2006.229.07:17:36.93#ibcon#end of sib2, iclass 26, count 0 2006.229.07:17:36.93#ibcon#*after write, iclass 26, count 0 2006.229.07:17:36.93#ibcon#*before return 0, iclass 26, count 0 2006.229.07:17:36.93#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:36.93#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:36.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:17:36.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:17:36.93$vck44/valo=3,564.99 2006.229.07:17:36.93#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.07:17:36.93#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.07:17:36.93#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:36.93#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:36.93#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:36.93#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:36.93#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:17:36.93#ibcon#first serial, iclass 28, count 0 2006.229.07:17:36.93#ibcon#enter sib2, iclass 28, count 0 2006.229.07:17:36.93#ibcon#flushed, iclass 28, count 0 2006.229.07:17:36.93#ibcon#about to write, iclass 28, count 0 2006.229.07:17:36.93#ibcon#wrote, iclass 28, count 0 2006.229.07:17:36.93#ibcon#about to read 3, iclass 28, count 0 2006.229.07:17:36.95#ibcon#read 3, iclass 28, count 0 2006.229.07:17:36.95#ibcon#about to read 4, iclass 28, count 0 2006.229.07:17:36.95#ibcon#read 4, iclass 28, count 0 2006.229.07:17:36.95#ibcon#about to read 5, iclass 28, count 0 2006.229.07:17:36.95#ibcon#read 5, iclass 28, count 0 2006.229.07:17:36.95#ibcon#about to read 6, iclass 28, count 0 2006.229.07:17:36.95#ibcon#read 6, iclass 28, count 0 2006.229.07:17:36.95#ibcon#end of sib2, iclass 28, count 0 2006.229.07:17:36.95#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:17:36.95#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:17:36.95#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:17:36.95#ibcon#*before write, iclass 28, count 0 2006.229.07:17:36.95#ibcon#enter sib2, iclass 28, count 0 2006.229.07:17:36.95#ibcon#flushed, iclass 28, count 0 2006.229.07:17:36.95#ibcon#about to write, iclass 28, count 0 2006.229.07:17:36.95#ibcon#wrote, iclass 28, count 0 2006.229.07:17:36.95#ibcon#about to read 3, iclass 28, count 0 2006.229.07:17:36.99#ibcon#read 3, iclass 28, count 0 2006.229.07:17:36.99#ibcon#about to read 4, iclass 28, count 0 2006.229.07:17:36.99#ibcon#read 4, iclass 28, count 0 2006.229.07:17:36.99#ibcon#about to read 5, iclass 28, count 0 2006.229.07:17:36.99#ibcon#read 5, iclass 28, count 0 2006.229.07:17:36.99#ibcon#about to read 6, iclass 28, count 0 2006.229.07:17:36.99#ibcon#read 6, iclass 28, count 0 2006.229.07:17:36.99#ibcon#end of sib2, iclass 28, count 0 2006.229.07:17:36.99#ibcon#*after write, iclass 28, count 0 2006.229.07:17:36.99#ibcon#*before return 0, iclass 28, count 0 2006.229.07:17:36.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:36.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:36.99#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:17:36.99#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:17:36.99$vck44/va=3,6 2006.229.07:17:36.99#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.07:17:36.99#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.07:17:36.99#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:36.99#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:37.05#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:37.05#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:37.05#ibcon#enter wrdev, iclass 30, count 2 2006.229.07:17:37.05#ibcon#first serial, iclass 30, count 2 2006.229.07:17:37.05#ibcon#enter sib2, iclass 30, count 2 2006.229.07:17:37.05#ibcon#flushed, iclass 30, count 2 2006.229.07:17:37.05#ibcon#about to write, iclass 30, count 2 2006.229.07:17:37.05#ibcon#wrote, iclass 30, count 2 2006.229.07:17:37.05#ibcon#about to read 3, iclass 30, count 2 2006.229.07:17:37.07#ibcon#read 3, iclass 30, count 2 2006.229.07:17:37.07#ibcon#about to read 4, iclass 30, count 2 2006.229.07:17:37.07#ibcon#read 4, iclass 30, count 2 2006.229.07:17:37.07#ibcon#about to read 5, iclass 30, count 2 2006.229.07:17:37.07#ibcon#read 5, iclass 30, count 2 2006.229.07:17:37.07#ibcon#about to read 6, iclass 30, count 2 2006.229.07:17:37.07#ibcon#read 6, iclass 30, count 2 2006.229.07:17:37.07#ibcon#end of sib2, iclass 30, count 2 2006.229.07:17:37.07#ibcon#*mode == 0, iclass 30, count 2 2006.229.07:17:37.07#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.07:17:37.07#ibcon#[25=AT03-06\r\n] 2006.229.07:17:37.07#ibcon#*before write, iclass 30, count 2 2006.229.07:17:37.07#ibcon#enter sib2, iclass 30, count 2 2006.229.07:17:37.07#ibcon#flushed, iclass 30, count 2 2006.229.07:17:37.07#ibcon#about to write, iclass 30, count 2 2006.229.07:17:37.07#ibcon#wrote, iclass 30, count 2 2006.229.07:17:37.07#ibcon#about to read 3, iclass 30, count 2 2006.229.07:17:37.10#ibcon#read 3, iclass 30, count 2 2006.229.07:17:37.10#ibcon#about to read 4, iclass 30, count 2 2006.229.07:17:37.10#ibcon#read 4, iclass 30, count 2 2006.229.07:17:37.10#ibcon#about to read 5, iclass 30, count 2 2006.229.07:17:37.10#ibcon#read 5, iclass 30, count 2 2006.229.07:17:37.10#ibcon#about to read 6, iclass 30, count 2 2006.229.07:17:37.10#ibcon#read 6, iclass 30, count 2 2006.229.07:17:37.10#ibcon#end of sib2, iclass 30, count 2 2006.229.07:17:37.10#ibcon#*after write, iclass 30, count 2 2006.229.07:17:37.10#ibcon#*before return 0, iclass 30, count 2 2006.229.07:17:37.10#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:37.10#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:37.10#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.07:17:37.10#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:37.10#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:37.22#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:37.22#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:37.22#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:17:37.22#ibcon#first serial, iclass 30, count 0 2006.229.07:17:37.22#ibcon#enter sib2, iclass 30, count 0 2006.229.07:17:37.22#ibcon#flushed, iclass 30, count 0 2006.229.07:17:37.22#ibcon#about to write, iclass 30, count 0 2006.229.07:17:37.22#ibcon#wrote, iclass 30, count 0 2006.229.07:17:37.22#ibcon#about to read 3, iclass 30, count 0 2006.229.07:17:37.24#ibcon#read 3, iclass 30, count 0 2006.229.07:17:37.24#ibcon#about to read 4, iclass 30, count 0 2006.229.07:17:37.24#ibcon#read 4, iclass 30, count 0 2006.229.07:17:37.24#ibcon#about to read 5, iclass 30, count 0 2006.229.07:17:37.24#ibcon#read 5, iclass 30, count 0 2006.229.07:17:37.24#ibcon#about to read 6, iclass 30, count 0 2006.229.07:17:37.24#ibcon#read 6, iclass 30, count 0 2006.229.07:17:37.24#ibcon#end of sib2, iclass 30, count 0 2006.229.07:17:37.24#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:17:37.24#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:17:37.24#ibcon#[25=USB\r\n] 2006.229.07:17:37.24#ibcon#*before write, iclass 30, count 0 2006.229.07:17:37.24#ibcon#enter sib2, iclass 30, count 0 2006.229.07:17:37.24#ibcon#flushed, iclass 30, count 0 2006.229.07:17:37.24#ibcon#about to write, iclass 30, count 0 2006.229.07:17:37.24#ibcon#wrote, iclass 30, count 0 2006.229.07:17:37.24#ibcon#about to read 3, iclass 30, count 0 2006.229.07:17:37.27#ibcon#read 3, iclass 30, count 0 2006.229.07:17:37.27#ibcon#about to read 4, iclass 30, count 0 2006.229.07:17:37.27#ibcon#read 4, iclass 30, count 0 2006.229.07:17:37.27#ibcon#about to read 5, iclass 30, count 0 2006.229.07:17:37.27#ibcon#read 5, iclass 30, count 0 2006.229.07:17:37.27#ibcon#about to read 6, iclass 30, count 0 2006.229.07:17:37.27#ibcon#read 6, iclass 30, count 0 2006.229.07:17:37.27#ibcon#end of sib2, iclass 30, count 0 2006.229.07:17:37.27#ibcon#*after write, iclass 30, count 0 2006.229.07:17:37.27#ibcon#*before return 0, iclass 30, count 0 2006.229.07:17:37.27#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:37.27#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:37.27#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:17:37.27#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:17:37.27$vck44/valo=4,624.99 2006.229.07:17:37.27#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:17:37.27#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:17:37.27#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:37.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:37.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:37.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:37.27#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:17:37.27#ibcon#first serial, iclass 32, count 0 2006.229.07:17:37.27#ibcon#enter sib2, iclass 32, count 0 2006.229.07:17:37.27#ibcon#flushed, iclass 32, count 0 2006.229.07:17:37.27#ibcon#about to write, iclass 32, count 0 2006.229.07:17:37.27#ibcon#wrote, iclass 32, count 0 2006.229.07:17:37.27#ibcon#about to read 3, iclass 32, count 0 2006.229.07:17:37.29#ibcon#read 3, iclass 32, count 0 2006.229.07:17:37.29#ibcon#about to read 4, iclass 32, count 0 2006.229.07:17:37.29#ibcon#read 4, iclass 32, count 0 2006.229.07:17:37.29#ibcon#about to read 5, iclass 32, count 0 2006.229.07:17:37.29#ibcon#read 5, iclass 32, count 0 2006.229.07:17:37.29#ibcon#about to read 6, iclass 32, count 0 2006.229.07:17:37.29#ibcon#read 6, iclass 32, count 0 2006.229.07:17:37.29#ibcon#end of sib2, iclass 32, count 0 2006.229.07:17:37.29#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:17:37.29#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:17:37.29#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:17:37.29#ibcon#*before write, iclass 32, count 0 2006.229.07:17:37.29#ibcon#enter sib2, iclass 32, count 0 2006.229.07:17:37.29#ibcon#flushed, iclass 32, count 0 2006.229.07:17:37.29#ibcon#about to write, iclass 32, count 0 2006.229.07:17:37.29#ibcon#wrote, iclass 32, count 0 2006.229.07:17:37.29#ibcon#about to read 3, iclass 32, count 0 2006.229.07:17:37.33#ibcon#read 3, iclass 32, count 0 2006.229.07:17:37.33#ibcon#about to read 4, iclass 32, count 0 2006.229.07:17:37.33#ibcon#read 4, iclass 32, count 0 2006.229.07:17:37.33#ibcon#about to read 5, iclass 32, count 0 2006.229.07:17:37.33#ibcon#read 5, iclass 32, count 0 2006.229.07:17:37.33#ibcon#about to read 6, iclass 32, count 0 2006.229.07:17:37.33#ibcon#read 6, iclass 32, count 0 2006.229.07:17:37.33#ibcon#end of sib2, iclass 32, count 0 2006.229.07:17:37.33#ibcon#*after write, iclass 32, count 0 2006.229.07:17:37.33#ibcon#*before return 0, iclass 32, count 0 2006.229.07:17:37.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:37.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:37.33#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:17:37.33#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:17:37.33$vck44/va=4,7 2006.229.07:17:37.33#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.07:17:37.33#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.07:17:37.33#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:37.33#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:37.39#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:37.39#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:37.39#ibcon#enter wrdev, iclass 34, count 2 2006.229.07:17:37.39#ibcon#first serial, iclass 34, count 2 2006.229.07:17:37.39#ibcon#enter sib2, iclass 34, count 2 2006.229.07:17:37.39#ibcon#flushed, iclass 34, count 2 2006.229.07:17:37.39#ibcon#about to write, iclass 34, count 2 2006.229.07:17:37.39#ibcon#wrote, iclass 34, count 2 2006.229.07:17:37.39#ibcon#about to read 3, iclass 34, count 2 2006.229.07:17:37.41#ibcon#read 3, iclass 34, count 2 2006.229.07:17:37.41#ibcon#about to read 4, iclass 34, count 2 2006.229.07:17:37.41#ibcon#read 4, iclass 34, count 2 2006.229.07:17:37.41#ibcon#about to read 5, iclass 34, count 2 2006.229.07:17:37.41#ibcon#read 5, iclass 34, count 2 2006.229.07:17:37.41#ibcon#about to read 6, iclass 34, count 2 2006.229.07:17:37.41#ibcon#read 6, iclass 34, count 2 2006.229.07:17:37.41#ibcon#end of sib2, iclass 34, count 2 2006.229.07:17:37.41#ibcon#*mode == 0, iclass 34, count 2 2006.229.07:17:37.41#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.07:17:37.41#ibcon#[25=AT04-07\r\n] 2006.229.07:17:37.41#ibcon#*before write, iclass 34, count 2 2006.229.07:17:37.41#ibcon#enter sib2, iclass 34, count 2 2006.229.07:17:37.41#ibcon#flushed, iclass 34, count 2 2006.229.07:17:37.41#ibcon#about to write, iclass 34, count 2 2006.229.07:17:37.41#ibcon#wrote, iclass 34, count 2 2006.229.07:17:37.41#ibcon#about to read 3, iclass 34, count 2 2006.229.07:17:37.44#ibcon#read 3, iclass 34, count 2 2006.229.07:17:37.44#ibcon#about to read 4, iclass 34, count 2 2006.229.07:17:37.44#ibcon#read 4, iclass 34, count 2 2006.229.07:17:37.44#ibcon#about to read 5, iclass 34, count 2 2006.229.07:17:37.44#ibcon#read 5, iclass 34, count 2 2006.229.07:17:37.44#ibcon#about to read 6, iclass 34, count 2 2006.229.07:17:37.44#ibcon#read 6, iclass 34, count 2 2006.229.07:17:37.44#ibcon#end of sib2, iclass 34, count 2 2006.229.07:17:37.44#ibcon#*after write, iclass 34, count 2 2006.229.07:17:37.44#ibcon#*before return 0, iclass 34, count 2 2006.229.07:17:37.44#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:37.44#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:37.44#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.07:17:37.44#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:37.44#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:37.56#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:37.56#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:37.56#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:17:37.56#ibcon#first serial, iclass 34, count 0 2006.229.07:17:37.56#ibcon#enter sib2, iclass 34, count 0 2006.229.07:17:37.56#ibcon#flushed, iclass 34, count 0 2006.229.07:17:37.56#ibcon#about to write, iclass 34, count 0 2006.229.07:17:37.56#ibcon#wrote, iclass 34, count 0 2006.229.07:17:37.56#ibcon#about to read 3, iclass 34, count 0 2006.229.07:17:37.58#ibcon#read 3, iclass 34, count 0 2006.229.07:17:37.58#ibcon#about to read 4, iclass 34, count 0 2006.229.07:17:37.58#ibcon#read 4, iclass 34, count 0 2006.229.07:17:37.58#ibcon#about to read 5, iclass 34, count 0 2006.229.07:17:37.58#ibcon#read 5, iclass 34, count 0 2006.229.07:17:37.58#ibcon#about to read 6, iclass 34, count 0 2006.229.07:17:37.58#ibcon#read 6, iclass 34, count 0 2006.229.07:17:37.58#ibcon#end of sib2, iclass 34, count 0 2006.229.07:17:37.58#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:17:37.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:17:37.58#ibcon#[25=USB\r\n] 2006.229.07:17:37.58#ibcon#*before write, iclass 34, count 0 2006.229.07:17:37.58#ibcon#enter sib2, iclass 34, count 0 2006.229.07:17:37.58#ibcon#flushed, iclass 34, count 0 2006.229.07:17:37.58#ibcon#about to write, iclass 34, count 0 2006.229.07:17:37.58#ibcon#wrote, iclass 34, count 0 2006.229.07:17:37.58#ibcon#about to read 3, iclass 34, count 0 2006.229.07:17:37.61#ibcon#read 3, iclass 34, count 0 2006.229.07:17:37.61#ibcon#about to read 4, iclass 34, count 0 2006.229.07:17:37.61#ibcon#read 4, iclass 34, count 0 2006.229.07:17:37.61#ibcon#about to read 5, iclass 34, count 0 2006.229.07:17:37.61#ibcon#read 5, iclass 34, count 0 2006.229.07:17:37.61#ibcon#about to read 6, iclass 34, count 0 2006.229.07:17:37.61#ibcon#read 6, iclass 34, count 0 2006.229.07:17:37.61#ibcon#end of sib2, iclass 34, count 0 2006.229.07:17:37.61#ibcon#*after write, iclass 34, count 0 2006.229.07:17:37.61#ibcon#*before return 0, iclass 34, count 0 2006.229.07:17:37.61#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:37.61#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:37.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:17:37.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:17:37.61$vck44/valo=5,734.99 2006.229.07:17:37.61#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.07:17:37.61#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.07:17:37.61#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:37.61#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:37.61#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:37.61#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:37.61#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:17:37.61#ibcon#first serial, iclass 36, count 0 2006.229.07:17:37.61#ibcon#enter sib2, iclass 36, count 0 2006.229.07:17:37.61#ibcon#flushed, iclass 36, count 0 2006.229.07:17:37.61#ibcon#about to write, iclass 36, count 0 2006.229.07:17:37.61#ibcon#wrote, iclass 36, count 0 2006.229.07:17:37.61#ibcon#about to read 3, iclass 36, count 0 2006.229.07:17:37.63#ibcon#read 3, iclass 36, count 0 2006.229.07:17:37.63#ibcon#about to read 4, iclass 36, count 0 2006.229.07:17:37.63#ibcon#read 4, iclass 36, count 0 2006.229.07:17:37.63#ibcon#about to read 5, iclass 36, count 0 2006.229.07:17:37.63#ibcon#read 5, iclass 36, count 0 2006.229.07:17:37.63#ibcon#about to read 6, iclass 36, count 0 2006.229.07:17:37.63#ibcon#read 6, iclass 36, count 0 2006.229.07:17:37.63#ibcon#end of sib2, iclass 36, count 0 2006.229.07:17:37.63#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:17:37.63#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:17:37.63#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:17:37.63#ibcon#*before write, iclass 36, count 0 2006.229.07:17:37.63#ibcon#enter sib2, iclass 36, count 0 2006.229.07:17:37.63#ibcon#flushed, iclass 36, count 0 2006.229.07:17:37.63#ibcon#about to write, iclass 36, count 0 2006.229.07:17:37.63#ibcon#wrote, iclass 36, count 0 2006.229.07:17:37.63#ibcon#about to read 3, iclass 36, count 0 2006.229.07:17:37.67#ibcon#read 3, iclass 36, count 0 2006.229.07:17:37.67#ibcon#about to read 4, iclass 36, count 0 2006.229.07:17:37.67#ibcon#read 4, iclass 36, count 0 2006.229.07:17:37.67#ibcon#about to read 5, iclass 36, count 0 2006.229.07:17:37.67#ibcon#read 5, iclass 36, count 0 2006.229.07:17:37.67#ibcon#about to read 6, iclass 36, count 0 2006.229.07:17:37.67#ibcon#read 6, iclass 36, count 0 2006.229.07:17:37.67#ibcon#end of sib2, iclass 36, count 0 2006.229.07:17:37.67#ibcon#*after write, iclass 36, count 0 2006.229.07:17:37.67#ibcon#*before return 0, iclass 36, count 0 2006.229.07:17:37.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:37.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:37.67#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:17:37.67#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:17:37.67$vck44/va=5,4 2006.229.07:17:37.67#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.07:17:37.67#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.07:17:37.67#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:37.67#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:37.73#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:37.73#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:37.73#ibcon#enter wrdev, iclass 38, count 2 2006.229.07:17:37.73#ibcon#first serial, iclass 38, count 2 2006.229.07:17:37.73#ibcon#enter sib2, iclass 38, count 2 2006.229.07:17:37.73#ibcon#flushed, iclass 38, count 2 2006.229.07:17:37.73#ibcon#about to write, iclass 38, count 2 2006.229.07:17:37.73#ibcon#wrote, iclass 38, count 2 2006.229.07:17:37.73#ibcon#about to read 3, iclass 38, count 2 2006.229.07:17:37.75#ibcon#read 3, iclass 38, count 2 2006.229.07:17:37.75#ibcon#about to read 4, iclass 38, count 2 2006.229.07:17:37.75#ibcon#read 4, iclass 38, count 2 2006.229.07:17:37.75#ibcon#about to read 5, iclass 38, count 2 2006.229.07:17:37.75#ibcon#read 5, iclass 38, count 2 2006.229.07:17:37.75#ibcon#about to read 6, iclass 38, count 2 2006.229.07:17:37.75#ibcon#read 6, iclass 38, count 2 2006.229.07:17:37.75#ibcon#end of sib2, iclass 38, count 2 2006.229.07:17:37.75#ibcon#*mode == 0, iclass 38, count 2 2006.229.07:17:37.75#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.07:17:37.75#ibcon#[25=AT05-04\r\n] 2006.229.07:17:37.75#ibcon#*before write, iclass 38, count 2 2006.229.07:17:37.75#ibcon#enter sib2, iclass 38, count 2 2006.229.07:17:37.75#ibcon#flushed, iclass 38, count 2 2006.229.07:17:37.75#ibcon#about to write, iclass 38, count 2 2006.229.07:17:37.75#ibcon#wrote, iclass 38, count 2 2006.229.07:17:37.75#ibcon#about to read 3, iclass 38, count 2 2006.229.07:17:37.78#ibcon#read 3, iclass 38, count 2 2006.229.07:17:37.78#ibcon#about to read 4, iclass 38, count 2 2006.229.07:17:37.78#ibcon#read 4, iclass 38, count 2 2006.229.07:17:37.78#ibcon#about to read 5, iclass 38, count 2 2006.229.07:17:37.78#ibcon#read 5, iclass 38, count 2 2006.229.07:17:37.78#ibcon#about to read 6, iclass 38, count 2 2006.229.07:17:37.78#ibcon#read 6, iclass 38, count 2 2006.229.07:17:37.78#ibcon#end of sib2, iclass 38, count 2 2006.229.07:17:37.78#ibcon#*after write, iclass 38, count 2 2006.229.07:17:37.78#ibcon#*before return 0, iclass 38, count 2 2006.229.07:17:37.78#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:37.78#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:37.78#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.07:17:37.78#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:37.78#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:37.90#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:37.90#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:37.90#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:17:37.90#ibcon#first serial, iclass 38, count 0 2006.229.07:17:37.90#ibcon#enter sib2, iclass 38, count 0 2006.229.07:17:37.90#ibcon#flushed, iclass 38, count 0 2006.229.07:17:37.90#ibcon#about to write, iclass 38, count 0 2006.229.07:17:37.90#ibcon#wrote, iclass 38, count 0 2006.229.07:17:37.90#ibcon#about to read 3, iclass 38, count 0 2006.229.07:17:37.92#ibcon#read 3, iclass 38, count 0 2006.229.07:17:37.92#ibcon#about to read 4, iclass 38, count 0 2006.229.07:17:37.92#ibcon#read 4, iclass 38, count 0 2006.229.07:17:37.92#ibcon#about to read 5, iclass 38, count 0 2006.229.07:17:37.92#ibcon#read 5, iclass 38, count 0 2006.229.07:17:37.92#ibcon#about to read 6, iclass 38, count 0 2006.229.07:17:37.92#ibcon#read 6, iclass 38, count 0 2006.229.07:17:37.92#ibcon#end of sib2, iclass 38, count 0 2006.229.07:17:37.92#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:17:37.92#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:17:37.92#ibcon#[25=USB\r\n] 2006.229.07:17:37.92#ibcon#*before write, iclass 38, count 0 2006.229.07:17:37.92#ibcon#enter sib2, iclass 38, count 0 2006.229.07:17:37.92#ibcon#flushed, iclass 38, count 0 2006.229.07:17:37.92#ibcon#about to write, iclass 38, count 0 2006.229.07:17:37.92#ibcon#wrote, iclass 38, count 0 2006.229.07:17:37.92#ibcon#about to read 3, iclass 38, count 0 2006.229.07:17:37.95#ibcon#read 3, iclass 38, count 0 2006.229.07:17:37.95#ibcon#about to read 4, iclass 38, count 0 2006.229.07:17:37.95#ibcon#read 4, iclass 38, count 0 2006.229.07:17:37.95#ibcon#about to read 5, iclass 38, count 0 2006.229.07:17:37.95#ibcon#read 5, iclass 38, count 0 2006.229.07:17:37.95#ibcon#about to read 6, iclass 38, count 0 2006.229.07:17:37.95#ibcon#read 6, iclass 38, count 0 2006.229.07:17:37.95#ibcon#end of sib2, iclass 38, count 0 2006.229.07:17:37.95#ibcon#*after write, iclass 38, count 0 2006.229.07:17:37.95#ibcon#*before return 0, iclass 38, count 0 2006.229.07:17:37.95#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:37.95#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:37.95#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:17:37.95#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:17:37.95$vck44/valo=6,814.99 2006.229.07:17:37.95#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.07:17:37.95#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.07:17:37.95#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:37.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:17:37.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:17:37.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:17:37.95#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:17:37.95#ibcon#first serial, iclass 3, count 0 2006.229.07:17:37.95#ibcon#enter sib2, iclass 3, count 0 2006.229.07:17:37.95#ibcon#flushed, iclass 3, count 0 2006.229.07:17:37.95#ibcon#about to write, iclass 3, count 0 2006.229.07:17:37.95#ibcon#wrote, iclass 3, count 0 2006.229.07:17:37.95#ibcon#about to read 3, iclass 3, count 0 2006.229.07:17:37.97#ibcon#read 3, iclass 3, count 0 2006.229.07:17:37.97#ibcon#about to read 4, iclass 3, count 0 2006.229.07:17:37.97#ibcon#read 4, iclass 3, count 0 2006.229.07:17:37.97#ibcon#about to read 5, iclass 3, count 0 2006.229.07:17:37.97#ibcon#read 5, iclass 3, count 0 2006.229.07:17:37.97#ibcon#about to read 6, iclass 3, count 0 2006.229.07:17:37.97#ibcon#read 6, iclass 3, count 0 2006.229.07:17:37.97#ibcon#end of sib2, iclass 3, count 0 2006.229.07:17:37.97#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:17:37.97#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:17:37.97#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:17:37.97#ibcon#*before write, iclass 3, count 0 2006.229.07:17:37.97#ibcon#enter sib2, iclass 3, count 0 2006.229.07:17:37.97#ibcon#flushed, iclass 3, count 0 2006.229.07:17:37.97#ibcon#about to write, iclass 3, count 0 2006.229.07:17:37.97#ibcon#wrote, iclass 3, count 0 2006.229.07:17:37.97#ibcon#about to read 3, iclass 3, count 0 2006.229.07:17:38.00#abcon#<5=/06 2.8 5.6 30.08 921000.2\r\n> 2006.229.07:17:38.01#ibcon#read 3, iclass 3, count 0 2006.229.07:17:38.01#ibcon#about to read 4, iclass 3, count 0 2006.229.07:17:38.01#ibcon#read 4, iclass 3, count 0 2006.229.07:17:38.01#ibcon#about to read 5, iclass 3, count 0 2006.229.07:17:38.01#ibcon#read 5, iclass 3, count 0 2006.229.07:17:38.01#ibcon#about to read 6, iclass 3, count 0 2006.229.07:17:38.01#ibcon#read 6, iclass 3, count 0 2006.229.07:17:38.01#ibcon#end of sib2, iclass 3, count 0 2006.229.07:17:38.01#ibcon#*after write, iclass 3, count 0 2006.229.07:17:38.01#ibcon#*before return 0, iclass 3, count 0 2006.229.07:17:38.01#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:17:38.01#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:17:38.01#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:17:38.01#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:17:38.01$vck44/va=6,4 2006.229.07:17:38.01#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.07:17:38.01#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.07:17:38.01#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:38.01#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:17:38.02#abcon#{5=INTERFACE CLEAR} 2006.229.07:17:38.07#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:17:38.07#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:17:38.07#ibcon#enter wrdev, iclass 7, count 2 2006.229.07:17:38.07#ibcon#first serial, iclass 7, count 2 2006.229.07:17:38.07#ibcon#enter sib2, iclass 7, count 2 2006.229.07:17:38.07#ibcon#flushed, iclass 7, count 2 2006.229.07:17:38.07#ibcon#about to write, iclass 7, count 2 2006.229.07:17:38.07#ibcon#wrote, iclass 7, count 2 2006.229.07:17:38.07#ibcon#about to read 3, iclass 7, count 2 2006.229.07:17:38.08#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:17:38.09#ibcon#read 3, iclass 7, count 2 2006.229.07:17:38.09#ibcon#about to read 4, iclass 7, count 2 2006.229.07:17:38.09#ibcon#read 4, iclass 7, count 2 2006.229.07:17:38.09#ibcon#about to read 5, iclass 7, count 2 2006.229.07:17:38.09#ibcon#read 5, iclass 7, count 2 2006.229.07:17:38.09#ibcon#about to read 6, iclass 7, count 2 2006.229.07:17:38.09#ibcon#read 6, iclass 7, count 2 2006.229.07:17:38.09#ibcon#end of sib2, iclass 7, count 2 2006.229.07:17:38.09#ibcon#*mode == 0, iclass 7, count 2 2006.229.07:17:38.09#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.07:17:38.09#ibcon#[25=AT06-04\r\n] 2006.229.07:17:38.09#ibcon#*before write, iclass 7, count 2 2006.229.07:17:38.09#ibcon#enter sib2, iclass 7, count 2 2006.229.07:17:38.09#ibcon#flushed, iclass 7, count 2 2006.229.07:17:38.09#ibcon#about to write, iclass 7, count 2 2006.229.07:17:38.09#ibcon#wrote, iclass 7, count 2 2006.229.07:17:38.09#ibcon#about to read 3, iclass 7, count 2 2006.229.07:17:38.12#ibcon#read 3, iclass 7, count 2 2006.229.07:17:38.12#ibcon#about to read 4, iclass 7, count 2 2006.229.07:17:38.12#ibcon#read 4, iclass 7, count 2 2006.229.07:17:38.12#ibcon#about to read 5, iclass 7, count 2 2006.229.07:17:38.12#ibcon#read 5, iclass 7, count 2 2006.229.07:17:38.12#ibcon#about to read 6, iclass 7, count 2 2006.229.07:17:38.12#ibcon#read 6, iclass 7, count 2 2006.229.07:17:38.12#ibcon#end of sib2, iclass 7, count 2 2006.229.07:17:38.12#ibcon#*after write, iclass 7, count 2 2006.229.07:17:38.12#ibcon#*before return 0, iclass 7, count 2 2006.229.07:17:38.12#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:17:38.12#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:17:38.12#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.07:17:38.12#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:38.12#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:17:38.24#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:17:38.24#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:17:38.24#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:17:38.24#ibcon#first serial, iclass 7, count 0 2006.229.07:17:38.24#ibcon#enter sib2, iclass 7, count 0 2006.229.07:17:38.24#ibcon#flushed, iclass 7, count 0 2006.229.07:17:38.24#ibcon#about to write, iclass 7, count 0 2006.229.07:17:38.24#ibcon#wrote, iclass 7, count 0 2006.229.07:17:38.24#ibcon#about to read 3, iclass 7, count 0 2006.229.07:17:38.26#ibcon#read 3, iclass 7, count 0 2006.229.07:17:38.26#ibcon#about to read 4, iclass 7, count 0 2006.229.07:17:38.26#ibcon#read 4, iclass 7, count 0 2006.229.07:17:38.26#ibcon#about to read 5, iclass 7, count 0 2006.229.07:17:38.26#ibcon#read 5, iclass 7, count 0 2006.229.07:17:38.26#ibcon#about to read 6, iclass 7, count 0 2006.229.07:17:38.26#ibcon#read 6, iclass 7, count 0 2006.229.07:17:38.26#ibcon#end of sib2, iclass 7, count 0 2006.229.07:17:38.26#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:17:38.26#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:17:38.26#ibcon#[25=USB\r\n] 2006.229.07:17:38.26#ibcon#*before write, iclass 7, count 0 2006.229.07:17:38.26#ibcon#enter sib2, iclass 7, count 0 2006.229.07:17:38.26#ibcon#flushed, iclass 7, count 0 2006.229.07:17:38.26#ibcon#about to write, iclass 7, count 0 2006.229.07:17:38.26#ibcon#wrote, iclass 7, count 0 2006.229.07:17:38.26#ibcon#about to read 3, iclass 7, count 0 2006.229.07:17:38.29#ibcon#read 3, iclass 7, count 0 2006.229.07:17:38.29#ibcon#about to read 4, iclass 7, count 0 2006.229.07:17:38.29#ibcon#read 4, iclass 7, count 0 2006.229.07:17:38.29#ibcon#about to read 5, iclass 7, count 0 2006.229.07:17:38.29#ibcon#read 5, iclass 7, count 0 2006.229.07:17:38.29#ibcon#about to read 6, iclass 7, count 0 2006.229.07:17:38.29#ibcon#read 6, iclass 7, count 0 2006.229.07:17:38.29#ibcon#end of sib2, iclass 7, count 0 2006.229.07:17:38.29#ibcon#*after write, iclass 7, count 0 2006.229.07:17:38.29#ibcon#*before return 0, iclass 7, count 0 2006.229.07:17:38.29#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:17:38.29#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:17:38.29#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:17:38.29#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:17:38.29$vck44/valo=7,864.99 2006.229.07:17:38.29#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.07:17:38.29#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.07:17:38.29#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:38.29#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:38.29#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:38.29#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:38.29#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:17:38.29#ibcon#first serial, iclass 12, count 0 2006.229.07:17:38.29#ibcon#enter sib2, iclass 12, count 0 2006.229.07:17:38.29#ibcon#flushed, iclass 12, count 0 2006.229.07:17:38.29#ibcon#about to write, iclass 12, count 0 2006.229.07:17:38.29#ibcon#wrote, iclass 12, count 0 2006.229.07:17:38.29#ibcon#about to read 3, iclass 12, count 0 2006.229.07:17:38.31#ibcon#read 3, iclass 12, count 0 2006.229.07:17:38.31#ibcon#about to read 4, iclass 12, count 0 2006.229.07:17:38.31#ibcon#read 4, iclass 12, count 0 2006.229.07:17:38.31#ibcon#about to read 5, iclass 12, count 0 2006.229.07:17:38.31#ibcon#read 5, iclass 12, count 0 2006.229.07:17:38.31#ibcon#about to read 6, iclass 12, count 0 2006.229.07:17:38.31#ibcon#read 6, iclass 12, count 0 2006.229.07:17:38.31#ibcon#end of sib2, iclass 12, count 0 2006.229.07:17:38.31#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:17:38.31#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:17:38.31#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:17:38.31#ibcon#*before write, iclass 12, count 0 2006.229.07:17:38.31#ibcon#enter sib2, iclass 12, count 0 2006.229.07:17:38.31#ibcon#flushed, iclass 12, count 0 2006.229.07:17:38.31#ibcon#about to write, iclass 12, count 0 2006.229.07:17:38.31#ibcon#wrote, iclass 12, count 0 2006.229.07:17:38.31#ibcon#about to read 3, iclass 12, count 0 2006.229.07:17:38.35#ibcon#read 3, iclass 12, count 0 2006.229.07:17:38.35#ibcon#about to read 4, iclass 12, count 0 2006.229.07:17:38.35#ibcon#read 4, iclass 12, count 0 2006.229.07:17:38.35#ibcon#about to read 5, iclass 12, count 0 2006.229.07:17:38.35#ibcon#read 5, iclass 12, count 0 2006.229.07:17:38.35#ibcon#about to read 6, iclass 12, count 0 2006.229.07:17:38.35#ibcon#read 6, iclass 12, count 0 2006.229.07:17:38.35#ibcon#end of sib2, iclass 12, count 0 2006.229.07:17:38.35#ibcon#*after write, iclass 12, count 0 2006.229.07:17:38.35#ibcon#*before return 0, iclass 12, count 0 2006.229.07:17:38.35#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:38.35#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:38.35#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:17:38.35#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:17:38.35$vck44/va=7,5 2006.229.07:17:38.35#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.07:17:38.35#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.07:17:38.35#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:38.35#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:38.41#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:38.41#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:38.41#ibcon#enter wrdev, iclass 14, count 2 2006.229.07:17:38.41#ibcon#first serial, iclass 14, count 2 2006.229.07:17:38.41#ibcon#enter sib2, iclass 14, count 2 2006.229.07:17:38.41#ibcon#flushed, iclass 14, count 2 2006.229.07:17:38.41#ibcon#about to write, iclass 14, count 2 2006.229.07:17:38.41#ibcon#wrote, iclass 14, count 2 2006.229.07:17:38.41#ibcon#about to read 3, iclass 14, count 2 2006.229.07:17:38.43#ibcon#read 3, iclass 14, count 2 2006.229.07:17:38.43#ibcon#about to read 4, iclass 14, count 2 2006.229.07:17:38.43#ibcon#read 4, iclass 14, count 2 2006.229.07:17:38.43#ibcon#about to read 5, iclass 14, count 2 2006.229.07:17:38.43#ibcon#read 5, iclass 14, count 2 2006.229.07:17:38.43#ibcon#about to read 6, iclass 14, count 2 2006.229.07:17:38.43#ibcon#read 6, iclass 14, count 2 2006.229.07:17:38.43#ibcon#end of sib2, iclass 14, count 2 2006.229.07:17:38.43#ibcon#*mode == 0, iclass 14, count 2 2006.229.07:17:38.43#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.07:17:38.43#ibcon#[25=AT07-05\r\n] 2006.229.07:17:38.43#ibcon#*before write, iclass 14, count 2 2006.229.07:17:38.43#ibcon#enter sib2, iclass 14, count 2 2006.229.07:17:38.43#ibcon#flushed, iclass 14, count 2 2006.229.07:17:38.43#ibcon#about to write, iclass 14, count 2 2006.229.07:17:38.43#ibcon#wrote, iclass 14, count 2 2006.229.07:17:38.43#ibcon#about to read 3, iclass 14, count 2 2006.229.07:17:38.46#ibcon#read 3, iclass 14, count 2 2006.229.07:17:38.46#ibcon#about to read 4, iclass 14, count 2 2006.229.07:17:38.46#ibcon#read 4, iclass 14, count 2 2006.229.07:17:38.46#ibcon#about to read 5, iclass 14, count 2 2006.229.07:17:38.46#ibcon#read 5, iclass 14, count 2 2006.229.07:17:38.46#ibcon#about to read 6, iclass 14, count 2 2006.229.07:17:38.46#ibcon#read 6, iclass 14, count 2 2006.229.07:17:38.46#ibcon#end of sib2, iclass 14, count 2 2006.229.07:17:38.46#ibcon#*after write, iclass 14, count 2 2006.229.07:17:38.46#ibcon#*before return 0, iclass 14, count 2 2006.229.07:17:38.46#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:38.46#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:38.46#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.07:17:38.46#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:38.46#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:38.58#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:38.58#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:38.58#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:17:38.58#ibcon#first serial, iclass 14, count 0 2006.229.07:17:38.58#ibcon#enter sib2, iclass 14, count 0 2006.229.07:17:38.58#ibcon#flushed, iclass 14, count 0 2006.229.07:17:38.58#ibcon#about to write, iclass 14, count 0 2006.229.07:17:38.58#ibcon#wrote, iclass 14, count 0 2006.229.07:17:38.58#ibcon#about to read 3, iclass 14, count 0 2006.229.07:17:38.60#ibcon#read 3, iclass 14, count 0 2006.229.07:17:38.60#ibcon#about to read 4, iclass 14, count 0 2006.229.07:17:38.60#ibcon#read 4, iclass 14, count 0 2006.229.07:17:38.60#ibcon#about to read 5, iclass 14, count 0 2006.229.07:17:38.60#ibcon#read 5, iclass 14, count 0 2006.229.07:17:38.60#ibcon#about to read 6, iclass 14, count 0 2006.229.07:17:38.60#ibcon#read 6, iclass 14, count 0 2006.229.07:17:38.60#ibcon#end of sib2, iclass 14, count 0 2006.229.07:17:38.60#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:17:38.60#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:17:38.60#ibcon#[25=USB\r\n] 2006.229.07:17:38.60#ibcon#*before write, iclass 14, count 0 2006.229.07:17:38.60#ibcon#enter sib2, iclass 14, count 0 2006.229.07:17:38.60#ibcon#flushed, iclass 14, count 0 2006.229.07:17:38.60#ibcon#about to write, iclass 14, count 0 2006.229.07:17:38.60#ibcon#wrote, iclass 14, count 0 2006.229.07:17:38.60#ibcon#about to read 3, iclass 14, count 0 2006.229.07:17:38.63#ibcon#read 3, iclass 14, count 0 2006.229.07:17:38.63#ibcon#about to read 4, iclass 14, count 0 2006.229.07:17:38.63#ibcon#read 4, iclass 14, count 0 2006.229.07:17:38.63#ibcon#about to read 5, iclass 14, count 0 2006.229.07:17:38.63#ibcon#read 5, iclass 14, count 0 2006.229.07:17:38.63#ibcon#about to read 6, iclass 14, count 0 2006.229.07:17:38.63#ibcon#read 6, iclass 14, count 0 2006.229.07:17:38.63#ibcon#end of sib2, iclass 14, count 0 2006.229.07:17:38.63#ibcon#*after write, iclass 14, count 0 2006.229.07:17:38.63#ibcon#*before return 0, iclass 14, count 0 2006.229.07:17:38.63#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:38.63#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:38.63#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:17:38.63#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:17:38.63$vck44/valo=8,884.99 2006.229.07:17:38.63#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.07:17:38.63#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.07:17:38.63#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:38.63#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:38.63#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:38.63#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:38.63#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:17:38.63#ibcon#first serial, iclass 16, count 0 2006.229.07:17:38.63#ibcon#enter sib2, iclass 16, count 0 2006.229.07:17:38.63#ibcon#flushed, iclass 16, count 0 2006.229.07:17:38.63#ibcon#about to write, iclass 16, count 0 2006.229.07:17:38.63#ibcon#wrote, iclass 16, count 0 2006.229.07:17:38.63#ibcon#about to read 3, iclass 16, count 0 2006.229.07:17:38.65#ibcon#read 3, iclass 16, count 0 2006.229.07:17:38.65#ibcon#about to read 4, iclass 16, count 0 2006.229.07:17:38.65#ibcon#read 4, iclass 16, count 0 2006.229.07:17:38.65#ibcon#about to read 5, iclass 16, count 0 2006.229.07:17:38.65#ibcon#read 5, iclass 16, count 0 2006.229.07:17:38.65#ibcon#about to read 6, iclass 16, count 0 2006.229.07:17:38.65#ibcon#read 6, iclass 16, count 0 2006.229.07:17:38.65#ibcon#end of sib2, iclass 16, count 0 2006.229.07:17:38.65#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:17:38.65#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:17:38.65#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:17:38.65#ibcon#*before write, iclass 16, count 0 2006.229.07:17:38.65#ibcon#enter sib2, iclass 16, count 0 2006.229.07:17:38.65#ibcon#flushed, iclass 16, count 0 2006.229.07:17:38.65#ibcon#about to write, iclass 16, count 0 2006.229.07:17:38.65#ibcon#wrote, iclass 16, count 0 2006.229.07:17:38.65#ibcon#about to read 3, iclass 16, count 0 2006.229.07:17:38.69#ibcon#read 3, iclass 16, count 0 2006.229.07:17:38.69#ibcon#about to read 4, iclass 16, count 0 2006.229.07:17:38.69#ibcon#read 4, iclass 16, count 0 2006.229.07:17:38.69#ibcon#about to read 5, iclass 16, count 0 2006.229.07:17:38.69#ibcon#read 5, iclass 16, count 0 2006.229.07:17:38.69#ibcon#about to read 6, iclass 16, count 0 2006.229.07:17:38.69#ibcon#read 6, iclass 16, count 0 2006.229.07:17:38.69#ibcon#end of sib2, iclass 16, count 0 2006.229.07:17:38.69#ibcon#*after write, iclass 16, count 0 2006.229.07:17:38.69#ibcon#*before return 0, iclass 16, count 0 2006.229.07:17:38.69#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:38.69#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:38.69#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:17:38.69#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:17:38.69$vck44/va=8,6 2006.229.07:17:38.69#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.07:17:38.69#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.07:17:38.69#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:38.69#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:17:38.75#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:17:38.75#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:17:38.75#ibcon#enter wrdev, iclass 18, count 2 2006.229.07:17:38.75#ibcon#first serial, iclass 18, count 2 2006.229.07:17:38.75#ibcon#enter sib2, iclass 18, count 2 2006.229.07:17:38.75#ibcon#flushed, iclass 18, count 2 2006.229.07:17:38.75#ibcon#about to write, iclass 18, count 2 2006.229.07:17:38.75#ibcon#wrote, iclass 18, count 2 2006.229.07:17:38.75#ibcon#about to read 3, iclass 18, count 2 2006.229.07:17:38.77#ibcon#read 3, iclass 18, count 2 2006.229.07:17:38.77#ibcon#about to read 4, iclass 18, count 2 2006.229.07:17:38.77#ibcon#read 4, iclass 18, count 2 2006.229.07:17:38.77#ibcon#about to read 5, iclass 18, count 2 2006.229.07:17:38.77#ibcon#read 5, iclass 18, count 2 2006.229.07:17:38.77#ibcon#about to read 6, iclass 18, count 2 2006.229.07:17:38.77#ibcon#read 6, iclass 18, count 2 2006.229.07:17:38.77#ibcon#end of sib2, iclass 18, count 2 2006.229.07:17:38.77#ibcon#*mode == 0, iclass 18, count 2 2006.229.07:17:38.77#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.07:17:38.77#ibcon#[25=AT08-06\r\n] 2006.229.07:17:38.77#ibcon#*before write, iclass 18, count 2 2006.229.07:17:38.77#ibcon#enter sib2, iclass 18, count 2 2006.229.07:17:38.77#ibcon#flushed, iclass 18, count 2 2006.229.07:17:38.77#ibcon#about to write, iclass 18, count 2 2006.229.07:17:38.77#ibcon#wrote, iclass 18, count 2 2006.229.07:17:38.77#ibcon#about to read 3, iclass 18, count 2 2006.229.07:17:38.80#ibcon#read 3, iclass 18, count 2 2006.229.07:17:38.80#ibcon#about to read 4, iclass 18, count 2 2006.229.07:17:38.80#ibcon#read 4, iclass 18, count 2 2006.229.07:17:38.80#ibcon#about to read 5, iclass 18, count 2 2006.229.07:17:38.80#ibcon#read 5, iclass 18, count 2 2006.229.07:17:38.80#ibcon#about to read 6, iclass 18, count 2 2006.229.07:17:38.80#ibcon#read 6, iclass 18, count 2 2006.229.07:17:38.80#ibcon#end of sib2, iclass 18, count 2 2006.229.07:17:38.80#ibcon#*after write, iclass 18, count 2 2006.229.07:17:38.80#ibcon#*before return 0, iclass 18, count 2 2006.229.07:17:38.80#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:17:38.80#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:17:38.80#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.07:17:38.80#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:38.80#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:17:38.92#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:17:38.92#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:17:38.92#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:17:38.92#ibcon#first serial, iclass 18, count 0 2006.229.07:17:38.92#ibcon#enter sib2, iclass 18, count 0 2006.229.07:17:38.92#ibcon#flushed, iclass 18, count 0 2006.229.07:17:38.92#ibcon#about to write, iclass 18, count 0 2006.229.07:17:38.92#ibcon#wrote, iclass 18, count 0 2006.229.07:17:38.92#ibcon#about to read 3, iclass 18, count 0 2006.229.07:17:38.94#ibcon#read 3, iclass 18, count 0 2006.229.07:17:38.94#ibcon#about to read 4, iclass 18, count 0 2006.229.07:17:38.94#ibcon#read 4, iclass 18, count 0 2006.229.07:17:38.94#ibcon#about to read 5, iclass 18, count 0 2006.229.07:17:38.94#ibcon#read 5, iclass 18, count 0 2006.229.07:17:38.94#ibcon#about to read 6, iclass 18, count 0 2006.229.07:17:38.94#ibcon#read 6, iclass 18, count 0 2006.229.07:17:38.94#ibcon#end of sib2, iclass 18, count 0 2006.229.07:17:38.94#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:17:38.94#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:17:38.94#ibcon#[25=USB\r\n] 2006.229.07:17:38.94#ibcon#*before write, iclass 18, count 0 2006.229.07:17:38.94#ibcon#enter sib2, iclass 18, count 0 2006.229.07:17:38.94#ibcon#flushed, iclass 18, count 0 2006.229.07:17:38.94#ibcon#about to write, iclass 18, count 0 2006.229.07:17:38.94#ibcon#wrote, iclass 18, count 0 2006.229.07:17:38.94#ibcon#about to read 3, iclass 18, count 0 2006.229.07:17:38.97#ibcon#read 3, iclass 18, count 0 2006.229.07:17:38.97#ibcon#about to read 4, iclass 18, count 0 2006.229.07:17:38.97#ibcon#read 4, iclass 18, count 0 2006.229.07:17:38.97#ibcon#about to read 5, iclass 18, count 0 2006.229.07:17:38.97#ibcon#read 5, iclass 18, count 0 2006.229.07:17:38.97#ibcon#about to read 6, iclass 18, count 0 2006.229.07:17:38.97#ibcon#read 6, iclass 18, count 0 2006.229.07:17:38.97#ibcon#end of sib2, iclass 18, count 0 2006.229.07:17:38.97#ibcon#*after write, iclass 18, count 0 2006.229.07:17:38.97#ibcon#*before return 0, iclass 18, count 0 2006.229.07:17:38.97#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:17:38.97#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:17:38.97#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:17:38.97#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:17:38.97$vck44/vblo=1,629.99 2006.229.07:17:38.97#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:17:38.97#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:17:38.97#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:38.97#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:38.97#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:38.97#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:38.97#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:17:38.97#ibcon#first serial, iclass 20, count 0 2006.229.07:17:38.97#ibcon#enter sib2, iclass 20, count 0 2006.229.07:17:38.97#ibcon#flushed, iclass 20, count 0 2006.229.07:17:38.97#ibcon#about to write, iclass 20, count 0 2006.229.07:17:38.97#ibcon#wrote, iclass 20, count 0 2006.229.07:17:38.97#ibcon#about to read 3, iclass 20, count 0 2006.229.07:17:38.99#ibcon#read 3, iclass 20, count 0 2006.229.07:17:38.99#ibcon#about to read 4, iclass 20, count 0 2006.229.07:17:38.99#ibcon#read 4, iclass 20, count 0 2006.229.07:17:38.99#ibcon#about to read 5, iclass 20, count 0 2006.229.07:17:38.99#ibcon#read 5, iclass 20, count 0 2006.229.07:17:38.99#ibcon#about to read 6, iclass 20, count 0 2006.229.07:17:38.99#ibcon#read 6, iclass 20, count 0 2006.229.07:17:38.99#ibcon#end of sib2, iclass 20, count 0 2006.229.07:17:38.99#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:17:38.99#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:17:38.99#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:17:38.99#ibcon#*before write, iclass 20, count 0 2006.229.07:17:38.99#ibcon#enter sib2, iclass 20, count 0 2006.229.07:17:38.99#ibcon#flushed, iclass 20, count 0 2006.229.07:17:38.99#ibcon#about to write, iclass 20, count 0 2006.229.07:17:38.99#ibcon#wrote, iclass 20, count 0 2006.229.07:17:38.99#ibcon#about to read 3, iclass 20, count 0 2006.229.07:17:39.03#ibcon#read 3, iclass 20, count 0 2006.229.07:17:39.03#ibcon#about to read 4, iclass 20, count 0 2006.229.07:17:39.03#ibcon#read 4, iclass 20, count 0 2006.229.07:17:39.03#ibcon#about to read 5, iclass 20, count 0 2006.229.07:17:39.03#ibcon#read 5, iclass 20, count 0 2006.229.07:17:39.03#ibcon#about to read 6, iclass 20, count 0 2006.229.07:17:39.03#ibcon#read 6, iclass 20, count 0 2006.229.07:17:39.03#ibcon#end of sib2, iclass 20, count 0 2006.229.07:17:39.03#ibcon#*after write, iclass 20, count 0 2006.229.07:17:39.03#ibcon#*before return 0, iclass 20, count 0 2006.229.07:17:39.03#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:39.03#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:17:39.03#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:17:39.03#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:17:39.03$vck44/vb=1,4 2006.229.07:17:39.03#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.07:17:39.03#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.07:17:39.03#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:39.03#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:39.03#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:39.03#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:39.03#ibcon#enter wrdev, iclass 22, count 2 2006.229.07:17:39.03#ibcon#first serial, iclass 22, count 2 2006.229.07:17:39.03#ibcon#enter sib2, iclass 22, count 2 2006.229.07:17:39.03#ibcon#flushed, iclass 22, count 2 2006.229.07:17:39.03#ibcon#about to write, iclass 22, count 2 2006.229.07:17:39.03#ibcon#wrote, iclass 22, count 2 2006.229.07:17:39.03#ibcon#about to read 3, iclass 22, count 2 2006.229.07:17:39.05#ibcon#read 3, iclass 22, count 2 2006.229.07:17:39.05#ibcon#about to read 4, iclass 22, count 2 2006.229.07:17:39.05#ibcon#read 4, iclass 22, count 2 2006.229.07:17:39.05#ibcon#about to read 5, iclass 22, count 2 2006.229.07:17:39.05#ibcon#read 5, iclass 22, count 2 2006.229.07:17:39.05#ibcon#about to read 6, iclass 22, count 2 2006.229.07:17:39.05#ibcon#read 6, iclass 22, count 2 2006.229.07:17:39.05#ibcon#end of sib2, iclass 22, count 2 2006.229.07:17:39.05#ibcon#*mode == 0, iclass 22, count 2 2006.229.07:17:39.05#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.07:17:39.05#ibcon#[27=AT01-04\r\n] 2006.229.07:17:39.05#ibcon#*before write, iclass 22, count 2 2006.229.07:17:39.05#ibcon#enter sib2, iclass 22, count 2 2006.229.07:17:39.05#ibcon#flushed, iclass 22, count 2 2006.229.07:17:39.05#ibcon#about to write, iclass 22, count 2 2006.229.07:17:39.05#ibcon#wrote, iclass 22, count 2 2006.229.07:17:39.05#ibcon#about to read 3, iclass 22, count 2 2006.229.07:17:39.08#ibcon#read 3, iclass 22, count 2 2006.229.07:17:39.08#ibcon#about to read 4, iclass 22, count 2 2006.229.07:17:39.08#ibcon#read 4, iclass 22, count 2 2006.229.07:17:39.08#ibcon#about to read 5, iclass 22, count 2 2006.229.07:17:39.08#ibcon#read 5, iclass 22, count 2 2006.229.07:17:39.08#ibcon#about to read 6, iclass 22, count 2 2006.229.07:17:39.08#ibcon#read 6, iclass 22, count 2 2006.229.07:17:39.08#ibcon#end of sib2, iclass 22, count 2 2006.229.07:17:39.08#ibcon#*after write, iclass 22, count 2 2006.229.07:17:39.08#ibcon#*before return 0, iclass 22, count 2 2006.229.07:17:39.08#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:39.08#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:17:39.08#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.07:17:39.08#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:39.08#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:39.20#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:39.20#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:39.20#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:17:39.20#ibcon#first serial, iclass 22, count 0 2006.229.07:17:39.20#ibcon#enter sib2, iclass 22, count 0 2006.229.07:17:39.20#ibcon#flushed, iclass 22, count 0 2006.229.07:17:39.20#ibcon#about to write, iclass 22, count 0 2006.229.07:17:39.20#ibcon#wrote, iclass 22, count 0 2006.229.07:17:39.20#ibcon#about to read 3, iclass 22, count 0 2006.229.07:17:39.22#ibcon#read 3, iclass 22, count 0 2006.229.07:17:39.22#ibcon#about to read 4, iclass 22, count 0 2006.229.07:17:39.22#ibcon#read 4, iclass 22, count 0 2006.229.07:17:39.22#ibcon#about to read 5, iclass 22, count 0 2006.229.07:17:39.22#ibcon#read 5, iclass 22, count 0 2006.229.07:17:39.22#ibcon#about to read 6, iclass 22, count 0 2006.229.07:17:39.22#ibcon#read 6, iclass 22, count 0 2006.229.07:17:39.22#ibcon#end of sib2, iclass 22, count 0 2006.229.07:17:39.22#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:17:39.22#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:17:39.22#ibcon#[27=USB\r\n] 2006.229.07:17:39.22#ibcon#*before write, iclass 22, count 0 2006.229.07:17:39.22#ibcon#enter sib2, iclass 22, count 0 2006.229.07:17:39.22#ibcon#flushed, iclass 22, count 0 2006.229.07:17:39.22#ibcon#about to write, iclass 22, count 0 2006.229.07:17:39.22#ibcon#wrote, iclass 22, count 0 2006.229.07:17:39.22#ibcon#about to read 3, iclass 22, count 0 2006.229.07:17:39.25#ibcon#read 3, iclass 22, count 0 2006.229.07:17:39.25#ibcon#about to read 4, iclass 22, count 0 2006.229.07:17:39.25#ibcon#read 4, iclass 22, count 0 2006.229.07:17:39.25#ibcon#about to read 5, iclass 22, count 0 2006.229.07:17:39.25#ibcon#read 5, iclass 22, count 0 2006.229.07:17:39.25#ibcon#about to read 6, iclass 22, count 0 2006.229.07:17:39.25#ibcon#read 6, iclass 22, count 0 2006.229.07:17:39.25#ibcon#end of sib2, iclass 22, count 0 2006.229.07:17:39.25#ibcon#*after write, iclass 22, count 0 2006.229.07:17:39.25#ibcon#*before return 0, iclass 22, count 0 2006.229.07:17:39.25#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:39.25#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:17:39.25#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:17:39.25#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:17:39.25$vck44/vblo=2,634.99 2006.229.07:17:39.25#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.07:17:39.25#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.07:17:39.25#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:39.25#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:39.25#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:39.25#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:39.25#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:17:39.25#ibcon#first serial, iclass 24, count 0 2006.229.07:17:39.25#ibcon#enter sib2, iclass 24, count 0 2006.229.07:17:39.25#ibcon#flushed, iclass 24, count 0 2006.229.07:17:39.25#ibcon#about to write, iclass 24, count 0 2006.229.07:17:39.25#ibcon#wrote, iclass 24, count 0 2006.229.07:17:39.25#ibcon#about to read 3, iclass 24, count 0 2006.229.07:17:39.27#ibcon#read 3, iclass 24, count 0 2006.229.07:17:39.27#ibcon#about to read 4, iclass 24, count 0 2006.229.07:17:39.27#ibcon#read 4, iclass 24, count 0 2006.229.07:17:39.27#ibcon#about to read 5, iclass 24, count 0 2006.229.07:17:39.27#ibcon#read 5, iclass 24, count 0 2006.229.07:17:39.27#ibcon#about to read 6, iclass 24, count 0 2006.229.07:17:39.27#ibcon#read 6, iclass 24, count 0 2006.229.07:17:39.27#ibcon#end of sib2, iclass 24, count 0 2006.229.07:17:39.27#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:17:39.27#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:17:39.27#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:17:39.27#ibcon#*before write, iclass 24, count 0 2006.229.07:17:39.27#ibcon#enter sib2, iclass 24, count 0 2006.229.07:17:39.27#ibcon#flushed, iclass 24, count 0 2006.229.07:17:39.27#ibcon#about to write, iclass 24, count 0 2006.229.07:17:39.27#ibcon#wrote, iclass 24, count 0 2006.229.07:17:39.27#ibcon#about to read 3, iclass 24, count 0 2006.229.07:17:39.31#ibcon#read 3, iclass 24, count 0 2006.229.07:17:39.31#ibcon#about to read 4, iclass 24, count 0 2006.229.07:17:39.31#ibcon#read 4, iclass 24, count 0 2006.229.07:17:39.31#ibcon#about to read 5, iclass 24, count 0 2006.229.07:17:39.31#ibcon#read 5, iclass 24, count 0 2006.229.07:17:39.31#ibcon#about to read 6, iclass 24, count 0 2006.229.07:17:39.31#ibcon#read 6, iclass 24, count 0 2006.229.07:17:39.31#ibcon#end of sib2, iclass 24, count 0 2006.229.07:17:39.31#ibcon#*after write, iclass 24, count 0 2006.229.07:17:39.31#ibcon#*before return 0, iclass 24, count 0 2006.229.07:17:39.31#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:39.31#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:17:39.31#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:17:39.31#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:17:39.31$vck44/vb=2,4 2006.229.07:17:39.31#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.07:17:39.31#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.07:17:39.31#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:39.31#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:39.37#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:39.37#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:39.37#ibcon#enter wrdev, iclass 26, count 2 2006.229.07:17:39.37#ibcon#first serial, iclass 26, count 2 2006.229.07:17:39.37#ibcon#enter sib2, iclass 26, count 2 2006.229.07:17:39.37#ibcon#flushed, iclass 26, count 2 2006.229.07:17:39.37#ibcon#about to write, iclass 26, count 2 2006.229.07:17:39.37#ibcon#wrote, iclass 26, count 2 2006.229.07:17:39.37#ibcon#about to read 3, iclass 26, count 2 2006.229.07:17:39.39#ibcon#read 3, iclass 26, count 2 2006.229.07:17:39.39#ibcon#about to read 4, iclass 26, count 2 2006.229.07:17:39.39#ibcon#read 4, iclass 26, count 2 2006.229.07:17:39.39#ibcon#about to read 5, iclass 26, count 2 2006.229.07:17:39.39#ibcon#read 5, iclass 26, count 2 2006.229.07:17:39.39#ibcon#about to read 6, iclass 26, count 2 2006.229.07:17:39.39#ibcon#read 6, iclass 26, count 2 2006.229.07:17:39.39#ibcon#end of sib2, iclass 26, count 2 2006.229.07:17:39.39#ibcon#*mode == 0, iclass 26, count 2 2006.229.07:17:39.39#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.07:17:39.39#ibcon#[27=AT02-04\r\n] 2006.229.07:17:39.39#ibcon#*before write, iclass 26, count 2 2006.229.07:17:39.39#ibcon#enter sib2, iclass 26, count 2 2006.229.07:17:39.39#ibcon#flushed, iclass 26, count 2 2006.229.07:17:39.39#ibcon#about to write, iclass 26, count 2 2006.229.07:17:39.39#ibcon#wrote, iclass 26, count 2 2006.229.07:17:39.39#ibcon#about to read 3, iclass 26, count 2 2006.229.07:17:39.42#ibcon#read 3, iclass 26, count 2 2006.229.07:17:39.42#ibcon#about to read 4, iclass 26, count 2 2006.229.07:17:39.42#ibcon#read 4, iclass 26, count 2 2006.229.07:17:39.42#ibcon#about to read 5, iclass 26, count 2 2006.229.07:17:39.42#ibcon#read 5, iclass 26, count 2 2006.229.07:17:39.42#ibcon#about to read 6, iclass 26, count 2 2006.229.07:17:39.42#ibcon#read 6, iclass 26, count 2 2006.229.07:17:39.42#ibcon#end of sib2, iclass 26, count 2 2006.229.07:17:39.42#ibcon#*after write, iclass 26, count 2 2006.229.07:17:39.42#ibcon#*before return 0, iclass 26, count 2 2006.229.07:17:39.42#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:39.42#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:17:39.42#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.07:17:39.42#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:39.42#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:39.54#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:39.54#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:39.54#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:17:39.54#ibcon#first serial, iclass 26, count 0 2006.229.07:17:39.54#ibcon#enter sib2, iclass 26, count 0 2006.229.07:17:39.54#ibcon#flushed, iclass 26, count 0 2006.229.07:17:39.54#ibcon#about to write, iclass 26, count 0 2006.229.07:17:39.54#ibcon#wrote, iclass 26, count 0 2006.229.07:17:39.54#ibcon#about to read 3, iclass 26, count 0 2006.229.07:17:39.56#ibcon#read 3, iclass 26, count 0 2006.229.07:17:39.56#ibcon#about to read 4, iclass 26, count 0 2006.229.07:17:39.56#ibcon#read 4, iclass 26, count 0 2006.229.07:17:39.56#ibcon#about to read 5, iclass 26, count 0 2006.229.07:17:39.56#ibcon#read 5, iclass 26, count 0 2006.229.07:17:39.56#ibcon#about to read 6, iclass 26, count 0 2006.229.07:17:39.56#ibcon#read 6, iclass 26, count 0 2006.229.07:17:39.56#ibcon#end of sib2, iclass 26, count 0 2006.229.07:17:39.56#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:17:39.56#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:17:39.56#ibcon#[27=USB\r\n] 2006.229.07:17:39.56#ibcon#*before write, iclass 26, count 0 2006.229.07:17:39.56#ibcon#enter sib2, iclass 26, count 0 2006.229.07:17:39.56#ibcon#flushed, iclass 26, count 0 2006.229.07:17:39.56#ibcon#about to write, iclass 26, count 0 2006.229.07:17:39.56#ibcon#wrote, iclass 26, count 0 2006.229.07:17:39.56#ibcon#about to read 3, iclass 26, count 0 2006.229.07:17:39.59#ibcon#read 3, iclass 26, count 0 2006.229.07:17:39.59#ibcon#about to read 4, iclass 26, count 0 2006.229.07:17:39.59#ibcon#read 4, iclass 26, count 0 2006.229.07:17:39.59#ibcon#about to read 5, iclass 26, count 0 2006.229.07:17:39.59#ibcon#read 5, iclass 26, count 0 2006.229.07:17:39.59#ibcon#about to read 6, iclass 26, count 0 2006.229.07:17:39.59#ibcon#read 6, iclass 26, count 0 2006.229.07:17:39.59#ibcon#end of sib2, iclass 26, count 0 2006.229.07:17:39.59#ibcon#*after write, iclass 26, count 0 2006.229.07:17:39.59#ibcon#*before return 0, iclass 26, count 0 2006.229.07:17:39.59#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:39.59#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:17:39.59#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:17:39.59#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:17:39.59$vck44/vblo=3,649.99 2006.229.07:17:39.59#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.07:17:39.59#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.07:17:39.59#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:39.59#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:39.59#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:39.59#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:39.59#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:17:39.59#ibcon#first serial, iclass 28, count 0 2006.229.07:17:39.59#ibcon#enter sib2, iclass 28, count 0 2006.229.07:17:39.59#ibcon#flushed, iclass 28, count 0 2006.229.07:17:39.59#ibcon#about to write, iclass 28, count 0 2006.229.07:17:39.59#ibcon#wrote, iclass 28, count 0 2006.229.07:17:39.59#ibcon#about to read 3, iclass 28, count 0 2006.229.07:17:39.61#ibcon#read 3, iclass 28, count 0 2006.229.07:17:39.61#ibcon#about to read 4, iclass 28, count 0 2006.229.07:17:39.61#ibcon#read 4, iclass 28, count 0 2006.229.07:17:39.61#ibcon#about to read 5, iclass 28, count 0 2006.229.07:17:39.61#ibcon#read 5, iclass 28, count 0 2006.229.07:17:39.61#ibcon#about to read 6, iclass 28, count 0 2006.229.07:17:39.61#ibcon#read 6, iclass 28, count 0 2006.229.07:17:39.61#ibcon#end of sib2, iclass 28, count 0 2006.229.07:17:39.61#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:17:39.61#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:17:39.61#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:17:39.61#ibcon#*before write, iclass 28, count 0 2006.229.07:17:39.61#ibcon#enter sib2, iclass 28, count 0 2006.229.07:17:39.61#ibcon#flushed, iclass 28, count 0 2006.229.07:17:39.61#ibcon#about to write, iclass 28, count 0 2006.229.07:17:39.61#ibcon#wrote, iclass 28, count 0 2006.229.07:17:39.61#ibcon#about to read 3, iclass 28, count 0 2006.229.07:17:39.65#ibcon#read 3, iclass 28, count 0 2006.229.07:17:39.65#ibcon#about to read 4, iclass 28, count 0 2006.229.07:17:39.65#ibcon#read 4, iclass 28, count 0 2006.229.07:17:39.65#ibcon#about to read 5, iclass 28, count 0 2006.229.07:17:39.65#ibcon#read 5, iclass 28, count 0 2006.229.07:17:39.65#ibcon#about to read 6, iclass 28, count 0 2006.229.07:17:39.65#ibcon#read 6, iclass 28, count 0 2006.229.07:17:39.65#ibcon#end of sib2, iclass 28, count 0 2006.229.07:17:39.65#ibcon#*after write, iclass 28, count 0 2006.229.07:17:39.65#ibcon#*before return 0, iclass 28, count 0 2006.229.07:17:39.65#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:39.65#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:17:39.65#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:17:39.65#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:17:39.65$vck44/vb=3,4 2006.229.07:17:39.65#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.07:17:39.65#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.07:17:39.65#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:39.65#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:39.71#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:39.71#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:39.71#ibcon#enter wrdev, iclass 30, count 2 2006.229.07:17:39.71#ibcon#first serial, iclass 30, count 2 2006.229.07:17:39.71#ibcon#enter sib2, iclass 30, count 2 2006.229.07:17:39.71#ibcon#flushed, iclass 30, count 2 2006.229.07:17:39.71#ibcon#about to write, iclass 30, count 2 2006.229.07:17:39.71#ibcon#wrote, iclass 30, count 2 2006.229.07:17:39.71#ibcon#about to read 3, iclass 30, count 2 2006.229.07:17:39.73#ibcon#read 3, iclass 30, count 2 2006.229.07:17:39.73#ibcon#about to read 4, iclass 30, count 2 2006.229.07:17:39.73#ibcon#read 4, iclass 30, count 2 2006.229.07:17:39.73#ibcon#about to read 5, iclass 30, count 2 2006.229.07:17:39.73#ibcon#read 5, iclass 30, count 2 2006.229.07:17:39.73#ibcon#about to read 6, iclass 30, count 2 2006.229.07:17:39.73#ibcon#read 6, iclass 30, count 2 2006.229.07:17:39.73#ibcon#end of sib2, iclass 30, count 2 2006.229.07:17:39.73#ibcon#*mode == 0, iclass 30, count 2 2006.229.07:17:39.73#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.07:17:39.73#ibcon#[27=AT03-04\r\n] 2006.229.07:17:39.73#ibcon#*before write, iclass 30, count 2 2006.229.07:17:39.73#ibcon#enter sib2, iclass 30, count 2 2006.229.07:17:39.73#ibcon#flushed, iclass 30, count 2 2006.229.07:17:39.73#ibcon#about to write, iclass 30, count 2 2006.229.07:17:39.73#ibcon#wrote, iclass 30, count 2 2006.229.07:17:39.73#ibcon#about to read 3, iclass 30, count 2 2006.229.07:17:39.76#ibcon#read 3, iclass 30, count 2 2006.229.07:17:39.76#ibcon#about to read 4, iclass 30, count 2 2006.229.07:17:39.76#ibcon#read 4, iclass 30, count 2 2006.229.07:17:39.76#ibcon#about to read 5, iclass 30, count 2 2006.229.07:17:39.76#ibcon#read 5, iclass 30, count 2 2006.229.07:17:39.76#ibcon#about to read 6, iclass 30, count 2 2006.229.07:17:39.76#ibcon#read 6, iclass 30, count 2 2006.229.07:17:39.76#ibcon#end of sib2, iclass 30, count 2 2006.229.07:17:39.76#ibcon#*after write, iclass 30, count 2 2006.229.07:17:39.76#ibcon#*before return 0, iclass 30, count 2 2006.229.07:17:39.76#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:39.76#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:17:39.76#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.07:17:39.76#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:39.76#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:39.88#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:39.88#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:39.88#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:17:39.88#ibcon#first serial, iclass 30, count 0 2006.229.07:17:39.88#ibcon#enter sib2, iclass 30, count 0 2006.229.07:17:39.88#ibcon#flushed, iclass 30, count 0 2006.229.07:17:39.88#ibcon#about to write, iclass 30, count 0 2006.229.07:17:39.88#ibcon#wrote, iclass 30, count 0 2006.229.07:17:39.88#ibcon#about to read 3, iclass 30, count 0 2006.229.07:17:39.90#ibcon#read 3, iclass 30, count 0 2006.229.07:17:39.90#ibcon#about to read 4, iclass 30, count 0 2006.229.07:17:39.90#ibcon#read 4, iclass 30, count 0 2006.229.07:17:39.90#ibcon#about to read 5, iclass 30, count 0 2006.229.07:17:39.90#ibcon#read 5, iclass 30, count 0 2006.229.07:17:39.90#ibcon#about to read 6, iclass 30, count 0 2006.229.07:17:39.90#ibcon#read 6, iclass 30, count 0 2006.229.07:17:39.90#ibcon#end of sib2, iclass 30, count 0 2006.229.07:17:39.90#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:17:39.90#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:17:39.90#ibcon#[27=USB\r\n] 2006.229.07:17:39.90#ibcon#*before write, iclass 30, count 0 2006.229.07:17:39.90#ibcon#enter sib2, iclass 30, count 0 2006.229.07:17:39.90#ibcon#flushed, iclass 30, count 0 2006.229.07:17:39.90#ibcon#about to write, iclass 30, count 0 2006.229.07:17:39.90#ibcon#wrote, iclass 30, count 0 2006.229.07:17:39.90#ibcon#about to read 3, iclass 30, count 0 2006.229.07:17:39.93#ibcon#read 3, iclass 30, count 0 2006.229.07:17:39.93#ibcon#about to read 4, iclass 30, count 0 2006.229.07:17:39.93#ibcon#read 4, iclass 30, count 0 2006.229.07:17:39.93#ibcon#about to read 5, iclass 30, count 0 2006.229.07:17:39.93#ibcon#read 5, iclass 30, count 0 2006.229.07:17:39.93#ibcon#about to read 6, iclass 30, count 0 2006.229.07:17:39.93#ibcon#read 6, iclass 30, count 0 2006.229.07:17:39.93#ibcon#end of sib2, iclass 30, count 0 2006.229.07:17:39.93#ibcon#*after write, iclass 30, count 0 2006.229.07:17:39.93#ibcon#*before return 0, iclass 30, count 0 2006.229.07:17:39.93#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:39.93#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:17:39.93#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:17:39.93#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:17:39.93$vck44/vblo=4,679.99 2006.229.07:17:39.93#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:17:39.93#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:17:39.93#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:39.93#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:39.93#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:39.93#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:39.93#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:17:39.93#ibcon#first serial, iclass 32, count 0 2006.229.07:17:39.93#ibcon#enter sib2, iclass 32, count 0 2006.229.07:17:39.93#ibcon#flushed, iclass 32, count 0 2006.229.07:17:39.93#ibcon#about to write, iclass 32, count 0 2006.229.07:17:39.93#ibcon#wrote, iclass 32, count 0 2006.229.07:17:39.93#ibcon#about to read 3, iclass 32, count 0 2006.229.07:17:39.95#ibcon#read 3, iclass 32, count 0 2006.229.07:17:39.95#ibcon#about to read 4, iclass 32, count 0 2006.229.07:17:39.95#ibcon#read 4, iclass 32, count 0 2006.229.07:17:39.95#ibcon#about to read 5, iclass 32, count 0 2006.229.07:17:39.95#ibcon#read 5, iclass 32, count 0 2006.229.07:17:39.95#ibcon#about to read 6, iclass 32, count 0 2006.229.07:17:39.95#ibcon#read 6, iclass 32, count 0 2006.229.07:17:39.95#ibcon#end of sib2, iclass 32, count 0 2006.229.07:17:39.95#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:17:39.95#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:17:39.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:17:39.95#ibcon#*before write, iclass 32, count 0 2006.229.07:17:39.95#ibcon#enter sib2, iclass 32, count 0 2006.229.07:17:39.95#ibcon#flushed, iclass 32, count 0 2006.229.07:17:39.95#ibcon#about to write, iclass 32, count 0 2006.229.07:17:39.95#ibcon#wrote, iclass 32, count 0 2006.229.07:17:39.95#ibcon#about to read 3, iclass 32, count 0 2006.229.07:17:39.99#ibcon#read 3, iclass 32, count 0 2006.229.07:17:39.99#ibcon#about to read 4, iclass 32, count 0 2006.229.07:17:39.99#ibcon#read 4, iclass 32, count 0 2006.229.07:17:39.99#ibcon#about to read 5, iclass 32, count 0 2006.229.07:17:39.99#ibcon#read 5, iclass 32, count 0 2006.229.07:17:39.99#ibcon#about to read 6, iclass 32, count 0 2006.229.07:17:39.99#ibcon#read 6, iclass 32, count 0 2006.229.07:17:39.99#ibcon#end of sib2, iclass 32, count 0 2006.229.07:17:39.99#ibcon#*after write, iclass 32, count 0 2006.229.07:17:39.99#ibcon#*before return 0, iclass 32, count 0 2006.229.07:17:39.99#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:39.99#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:17:39.99#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:17:39.99#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:17:39.99$vck44/vb=4,4 2006.229.07:17:39.99#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.07:17:39.99#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.07:17:39.99#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:39.99#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:40.05#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:40.05#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:40.05#ibcon#enter wrdev, iclass 34, count 2 2006.229.07:17:40.05#ibcon#first serial, iclass 34, count 2 2006.229.07:17:40.05#ibcon#enter sib2, iclass 34, count 2 2006.229.07:17:40.05#ibcon#flushed, iclass 34, count 2 2006.229.07:17:40.05#ibcon#about to write, iclass 34, count 2 2006.229.07:17:40.05#ibcon#wrote, iclass 34, count 2 2006.229.07:17:40.05#ibcon#about to read 3, iclass 34, count 2 2006.229.07:17:40.07#ibcon#read 3, iclass 34, count 2 2006.229.07:17:40.07#ibcon#about to read 4, iclass 34, count 2 2006.229.07:17:40.07#ibcon#read 4, iclass 34, count 2 2006.229.07:17:40.07#ibcon#about to read 5, iclass 34, count 2 2006.229.07:17:40.07#ibcon#read 5, iclass 34, count 2 2006.229.07:17:40.07#ibcon#about to read 6, iclass 34, count 2 2006.229.07:17:40.07#ibcon#read 6, iclass 34, count 2 2006.229.07:17:40.07#ibcon#end of sib2, iclass 34, count 2 2006.229.07:17:40.07#ibcon#*mode == 0, iclass 34, count 2 2006.229.07:17:40.07#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.07:17:40.07#ibcon#[27=AT04-04\r\n] 2006.229.07:17:40.07#ibcon#*before write, iclass 34, count 2 2006.229.07:17:40.07#ibcon#enter sib2, iclass 34, count 2 2006.229.07:17:40.07#ibcon#flushed, iclass 34, count 2 2006.229.07:17:40.07#ibcon#about to write, iclass 34, count 2 2006.229.07:17:40.07#ibcon#wrote, iclass 34, count 2 2006.229.07:17:40.07#ibcon#about to read 3, iclass 34, count 2 2006.229.07:17:40.10#ibcon#read 3, iclass 34, count 2 2006.229.07:17:40.10#ibcon#about to read 4, iclass 34, count 2 2006.229.07:17:40.10#ibcon#read 4, iclass 34, count 2 2006.229.07:17:40.10#ibcon#about to read 5, iclass 34, count 2 2006.229.07:17:40.10#ibcon#read 5, iclass 34, count 2 2006.229.07:17:40.10#ibcon#about to read 6, iclass 34, count 2 2006.229.07:17:40.10#ibcon#read 6, iclass 34, count 2 2006.229.07:17:40.10#ibcon#end of sib2, iclass 34, count 2 2006.229.07:17:40.10#ibcon#*after write, iclass 34, count 2 2006.229.07:17:40.10#ibcon#*before return 0, iclass 34, count 2 2006.229.07:17:40.10#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:40.10#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:17:40.10#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.07:17:40.10#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:40.10#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:40.22#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:40.22#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:40.22#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:17:40.22#ibcon#first serial, iclass 34, count 0 2006.229.07:17:40.22#ibcon#enter sib2, iclass 34, count 0 2006.229.07:17:40.22#ibcon#flushed, iclass 34, count 0 2006.229.07:17:40.22#ibcon#about to write, iclass 34, count 0 2006.229.07:17:40.22#ibcon#wrote, iclass 34, count 0 2006.229.07:17:40.22#ibcon#about to read 3, iclass 34, count 0 2006.229.07:17:40.24#ibcon#read 3, iclass 34, count 0 2006.229.07:17:40.24#ibcon#about to read 4, iclass 34, count 0 2006.229.07:17:40.24#ibcon#read 4, iclass 34, count 0 2006.229.07:17:40.24#ibcon#about to read 5, iclass 34, count 0 2006.229.07:17:40.24#ibcon#read 5, iclass 34, count 0 2006.229.07:17:40.24#ibcon#about to read 6, iclass 34, count 0 2006.229.07:17:40.24#ibcon#read 6, iclass 34, count 0 2006.229.07:17:40.24#ibcon#end of sib2, iclass 34, count 0 2006.229.07:17:40.24#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:17:40.24#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:17:40.24#ibcon#[27=USB\r\n] 2006.229.07:17:40.24#ibcon#*before write, iclass 34, count 0 2006.229.07:17:40.24#ibcon#enter sib2, iclass 34, count 0 2006.229.07:17:40.24#ibcon#flushed, iclass 34, count 0 2006.229.07:17:40.24#ibcon#about to write, iclass 34, count 0 2006.229.07:17:40.24#ibcon#wrote, iclass 34, count 0 2006.229.07:17:40.24#ibcon#about to read 3, iclass 34, count 0 2006.229.07:17:40.27#ibcon#read 3, iclass 34, count 0 2006.229.07:17:40.27#ibcon#about to read 4, iclass 34, count 0 2006.229.07:17:40.27#ibcon#read 4, iclass 34, count 0 2006.229.07:17:40.27#ibcon#about to read 5, iclass 34, count 0 2006.229.07:17:40.27#ibcon#read 5, iclass 34, count 0 2006.229.07:17:40.27#ibcon#about to read 6, iclass 34, count 0 2006.229.07:17:40.27#ibcon#read 6, iclass 34, count 0 2006.229.07:17:40.27#ibcon#end of sib2, iclass 34, count 0 2006.229.07:17:40.27#ibcon#*after write, iclass 34, count 0 2006.229.07:17:40.27#ibcon#*before return 0, iclass 34, count 0 2006.229.07:17:40.27#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:40.27#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:17:40.27#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:17:40.27#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:17:40.27$vck44/vblo=5,709.99 2006.229.07:17:40.27#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.07:17:40.27#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.07:17:40.27#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:40.27#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:40.27#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:40.27#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:40.27#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:17:40.27#ibcon#first serial, iclass 36, count 0 2006.229.07:17:40.27#ibcon#enter sib2, iclass 36, count 0 2006.229.07:17:40.27#ibcon#flushed, iclass 36, count 0 2006.229.07:17:40.27#ibcon#about to write, iclass 36, count 0 2006.229.07:17:40.27#ibcon#wrote, iclass 36, count 0 2006.229.07:17:40.27#ibcon#about to read 3, iclass 36, count 0 2006.229.07:17:40.29#ibcon#read 3, iclass 36, count 0 2006.229.07:17:40.29#ibcon#about to read 4, iclass 36, count 0 2006.229.07:17:40.29#ibcon#read 4, iclass 36, count 0 2006.229.07:17:40.29#ibcon#about to read 5, iclass 36, count 0 2006.229.07:17:40.29#ibcon#read 5, iclass 36, count 0 2006.229.07:17:40.29#ibcon#about to read 6, iclass 36, count 0 2006.229.07:17:40.29#ibcon#read 6, iclass 36, count 0 2006.229.07:17:40.29#ibcon#end of sib2, iclass 36, count 0 2006.229.07:17:40.29#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:17:40.29#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:17:40.29#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:17:40.29#ibcon#*before write, iclass 36, count 0 2006.229.07:17:40.29#ibcon#enter sib2, iclass 36, count 0 2006.229.07:17:40.29#ibcon#flushed, iclass 36, count 0 2006.229.07:17:40.29#ibcon#about to write, iclass 36, count 0 2006.229.07:17:40.29#ibcon#wrote, iclass 36, count 0 2006.229.07:17:40.29#ibcon#about to read 3, iclass 36, count 0 2006.229.07:17:40.33#ibcon#read 3, iclass 36, count 0 2006.229.07:17:40.33#ibcon#about to read 4, iclass 36, count 0 2006.229.07:17:40.33#ibcon#read 4, iclass 36, count 0 2006.229.07:17:40.33#ibcon#about to read 5, iclass 36, count 0 2006.229.07:17:40.33#ibcon#read 5, iclass 36, count 0 2006.229.07:17:40.33#ibcon#about to read 6, iclass 36, count 0 2006.229.07:17:40.33#ibcon#read 6, iclass 36, count 0 2006.229.07:17:40.33#ibcon#end of sib2, iclass 36, count 0 2006.229.07:17:40.33#ibcon#*after write, iclass 36, count 0 2006.229.07:17:40.33#ibcon#*before return 0, iclass 36, count 0 2006.229.07:17:40.33#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:40.33#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:17:40.33#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:17:40.33#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:17:40.33$vck44/vb=5,4 2006.229.07:17:40.33#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.07:17:40.33#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.07:17:40.33#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:40.33#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:40.39#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:40.39#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:40.39#ibcon#enter wrdev, iclass 38, count 2 2006.229.07:17:40.39#ibcon#first serial, iclass 38, count 2 2006.229.07:17:40.39#ibcon#enter sib2, iclass 38, count 2 2006.229.07:17:40.39#ibcon#flushed, iclass 38, count 2 2006.229.07:17:40.39#ibcon#about to write, iclass 38, count 2 2006.229.07:17:40.39#ibcon#wrote, iclass 38, count 2 2006.229.07:17:40.39#ibcon#about to read 3, iclass 38, count 2 2006.229.07:17:40.41#ibcon#read 3, iclass 38, count 2 2006.229.07:17:40.41#ibcon#about to read 4, iclass 38, count 2 2006.229.07:17:40.41#ibcon#read 4, iclass 38, count 2 2006.229.07:17:40.41#ibcon#about to read 5, iclass 38, count 2 2006.229.07:17:40.41#ibcon#read 5, iclass 38, count 2 2006.229.07:17:40.41#ibcon#about to read 6, iclass 38, count 2 2006.229.07:17:40.41#ibcon#read 6, iclass 38, count 2 2006.229.07:17:40.41#ibcon#end of sib2, iclass 38, count 2 2006.229.07:17:40.41#ibcon#*mode == 0, iclass 38, count 2 2006.229.07:17:40.41#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.07:17:40.41#ibcon#[27=AT05-04\r\n] 2006.229.07:17:40.41#ibcon#*before write, iclass 38, count 2 2006.229.07:17:40.41#ibcon#enter sib2, iclass 38, count 2 2006.229.07:17:40.41#ibcon#flushed, iclass 38, count 2 2006.229.07:17:40.41#ibcon#about to write, iclass 38, count 2 2006.229.07:17:40.41#ibcon#wrote, iclass 38, count 2 2006.229.07:17:40.41#ibcon#about to read 3, iclass 38, count 2 2006.229.07:17:40.44#ibcon#read 3, iclass 38, count 2 2006.229.07:17:40.44#ibcon#about to read 4, iclass 38, count 2 2006.229.07:17:40.44#ibcon#read 4, iclass 38, count 2 2006.229.07:17:40.44#ibcon#about to read 5, iclass 38, count 2 2006.229.07:17:40.44#ibcon#read 5, iclass 38, count 2 2006.229.07:17:40.44#ibcon#about to read 6, iclass 38, count 2 2006.229.07:17:40.44#ibcon#read 6, iclass 38, count 2 2006.229.07:17:40.44#ibcon#end of sib2, iclass 38, count 2 2006.229.07:17:40.44#ibcon#*after write, iclass 38, count 2 2006.229.07:17:40.44#ibcon#*before return 0, iclass 38, count 2 2006.229.07:17:40.44#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:40.44#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:17:40.44#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.07:17:40.44#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:40.44#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:40.56#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:40.56#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:40.56#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:17:40.56#ibcon#first serial, iclass 38, count 0 2006.229.07:17:40.56#ibcon#enter sib2, iclass 38, count 0 2006.229.07:17:40.56#ibcon#flushed, iclass 38, count 0 2006.229.07:17:40.56#ibcon#about to write, iclass 38, count 0 2006.229.07:17:40.56#ibcon#wrote, iclass 38, count 0 2006.229.07:17:40.56#ibcon#about to read 3, iclass 38, count 0 2006.229.07:17:40.58#ibcon#read 3, iclass 38, count 0 2006.229.07:17:40.58#ibcon#about to read 4, iclass 38, count 0 2006.229.07:17:40.58#ibcon#read 4, iclass 38, count 0 2006.229.07:17:40.58#ibcon#about to read 5, iclass 38, count 0 2006.229.07:17:40.58#ibcon#read 5, iclass 38, count 0 2006.229.07:17:40.58#ibcon#about to read 6, iclass 38, count 0 2006.229.07:17:40.58#ibcon#read 6, iclass 38, count 0 2006.229.07:17:40.58#ibcon#end of sib2, iclass 38, count 0 2006.229.07:17:40.58#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:17:40.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:17:40.58#ibcon#[27=USB\r\n] 2006.229.07:17:40.58#ibcon#*before write, iclass 38, count 0 2006.229.07:17:40.58#ibcon#enter sib2, iclass 38, count 0 2006.229.07:17:40.58#ibcon#flushed, iclass 38, count 0 2006.229.07:17:40.58#ibcon#about to write, iclass 38, count 0 2006.229.07:17:40.58#ibcon#wrote, iclass 38, count 0 2006.229.07:17:40.58#ibcon#about to read 3, iclass 38, count 0 2006.229.07:17:40.61#ibcon#read 3, iclass 38, count 0 2006.229.07:17:40.61#ibcon#about to read 4, iclass 38, count 0 2006.229.07:17:40.61#ibcon#read 4, iclass 38, count 0 2006.229.07:17:40.61#ibcon#about to read 5, iclass 38, count 0 2006.229.07:17:40.61#ibcon#read 5, iclass 38, count 0 2006.229.07:17:40.61#ibcon#about to read 6, iclass 38, count 0 2006.229.07:17:40.61#ibcon#read 6, iclass 38, count 0 2006.229.07:17:40.61#ibcon#end of sib2, iclass 38, count 0 2006.229.07:17:40.61#ibcon#*after write, iclass 38, count 0 2006.229.07:17:40.61#ibcon#*before return 0, iclass 38, count 0 2006.229.07:17:40.61#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:40.61#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:17:40.61#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:17:40.61#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:17:40.61$vck44/vblo=6,719.99 2006.229.07:17:40.61#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.07:17:40.61#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.07:17:40.61#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:40.61#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:17:40.61#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:17:40.61#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:17:40.61#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:17:40.61#ibcon#first serial, iclass 40, count 0 2006.229.07:17:40.61#ibcon#enter sib2, iclass 40, count 0 2006.229.07:17:40.61#ibcon#flushed, iclass 40, count 0 2006.229.07:17:40.61#ibcon#about to write, iclass 40, count 0 2006.229.07:17:40.61#ibcon#wrote, iclass 40, count 0 2006.229.07:17:40.61#ibcon#about to read 3, iclass 40, count 0 2006.229.07:17:40.63#ibcon#read 3, iclass 40, count 0 2006.229.07:17:40.63#ibcon#about to read 4, iclass 40, count 0 2006.229.07:17:40.63#ibcon#read 4, iclass 40, count 0 2006.229.07:17:40.63#ibcon#about to read 5, iclass 40, count 0 2006.229.07:17:40.63#ibcon#read 5, iclass 40, count 0 2006.229.07:17:40.63#ibcon#about to read 6, iclass 40, count 0 2006.229.07:17:40.63#ibcon#read 6, iclass 40, count 0 2006.229.07:17:40.63#ibcon#end of sib2, iclass 40, count 0 2006.229.07:17:40.63#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:17:40.63#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:17:40.63#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:17:40.63#ibcon#*before write, iclass 40, count 0 2006.229.07:17:40.63#ibcon#enter sib2, iclass 40, count 0 2006.229.07:17:40.63#ibcon#flushed, iclass 40, count 0 2006.229.07:17:40.63#ibcon#about to write, iclass 40, count 0 2006.229.07:17:40.63#ibcon#wrote, iclass 40, count 0 2006.229.07:17:40.63#ibcon#about to read 3, iclass 40, count 0 2006.229.07:17:40.67#ibcon#read 3, iclass 40, count 0 2006.229.07:17:40.67#ibcon#about to read 4, iclass 40, count 0 2006.229.07:17:40.67#ibcon#read 4, iclass 40, count 0 2006.229.07:17:40.67#ibcon#about to read 5, iclass 40, count 0 2006.229.07:17:40.67#ibcon#read 5, iclass 40, count 0 2006.229.07:17:40.67#ibcon#about to read 6, iclass 40, count 0 2006.229.07:17:40.67#ibcon#read 6, iclass 40, count 0 2006.229.07:17:40.67#ibcon#end of sib2, iclass 40, count 0 2006.229.07:17:40.67#ibcon#*after write, iclass 40, count 0 2006.229.07:17:40.67#ibcon#*before return 0, iclass 40, count 0 2006.229.07:17:40.67#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:17:40.67#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:17:40.67#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:17:40.67#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:17:40.67$vck44/vb=6,4 2006.229.07:17:40.67#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.07:17:40.67#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.07:17:40.67#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:40.67#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:17:40.73#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:17:40.73#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:17:40.73#ibcon#enter wrdev, iclass 4, count 2 2006.229.07:17:40.73#ibcon#first serial, iclass 4, count 2 2006.229.07:17:40.73#ibcon#enter sib2, iclass 4, count 2 2006.229.07:17:40.73#ibcon#flushed, iclass 4, count 2 2006.229.07:17:40.73#ibcon#about to write, iclass 4, count 2 2006.229.07:17:40.73#ibcon#wrote, iclass 4, count 2 2006.229.07:17:40.73#ibcon#about to read 3, iclass 4, count 2 2006.229.07:17:40.75#ibcon#read 3, iclass 4, count 2 2006.229.07:17:40.75#ibcon#about to read 4, iclass 4, count 2 2006.229.07:17:40.75#ibcon#read 4, iclass 4, count 2 2006.229.07:17:40.75#ibcon#about to read 5, iclass 4, count 2 2006.229.07:17:40.75#ibcon#read 5, iclass 4, count 2 2006.229.07:17:40.75#ibcon#about to read 6, iclass 4, count 2 2006.229.07:17:40.75#ibcon#read 6, iclass 4, count 2 2006.229.07:17:40.75#ibcon#end of sib2, iclass 4, count 2 2006.229.07:17:40.75#ibcon#*mode == 0, iclass 4, count 2 2006.229.07:17:40.75#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.07:17:40.75#ibcon#[27=AT06-04\r\n] 2006.229.07:17:40.75#ibcon#*before write, iclass 4, count 2 2006.229.07:17:40.75#ibcon#enter sib2, iclass 4, count 2 2006.229.07:17:40.75#ibcon#flushed, iclass 4, count 2 2006.229.07:17:40.75#ibcon#about to write, iclass 4, count 2 2006.229.07:17:40.75#ibcon#wrote, iclass 4, count 2 2006.229.07:17:40.75#ibcon#about to read 3, iclass 4, count 2 2006.229.07:17:40.78#ibcon#read 3, iclass 4, count 2 2006.229.07:17:40.78#ibcon#about to read 4, iclass 4, count 2 2006.229.07:17:40.78#ibcon#read 4, iclass 4, count 2 2006.229.07:17:40.78#ibcon#about to read 5, iclass 4, count 2 2006.229.07:17:40.78#ibcon#read 5, iclass 4, count 2 2006.229.07:17:40.78#ibcon#about to read 6, iclass 4, count 2 2006.229.07:17:40.78#ibcon#read 6, iclass 4, count 2 2006.229.07:17:40.78#ibcon#end of sib2, iclass 4, count 2 2006.229.07:17:40.78#ibcon#*after write, iclass 4, count 2 2006.229.07:17:40.78#ibcon#*before return 0, iclass 4, count 2 2006.229.07:17:40.78#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:17:40.78#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:17:40.78#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.07:17:40.78#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:40.78#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:17:40.90#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:17:40.90#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:17:40.90#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:17:40.90#ibcon#first serial, iclass 4, count 0 2006.229.07:17:40.90#ibcon#enter sib2, iclass 4, count 0 2006.229.07:17:40.90#ibcon#flushed, iclass 4, count 0 2006.229.07:17:40.90#ibcon#about to write, iclass 4, count 0 2006.229.07:17:40.90#ibcon#wrote, iclass 4, count 0 2006.229.07:17:40.90#ibcon#about to read 3, iclass 4, count 0 2006.229.07:17:40.92#ibcon#read 3, iclass 4, count 0 2006.229.07:17:40.92#ibcon#about to read 4, iclass 4, count 0 2006.229.07:17:40.92#ibcon#read 4, iclass 4, count 0 2006.229.07:17:40.92#ibcon#about to read 5, iclass 4, count 0 2006.229.07:17:40.92#ibcon#read 5, iclass 4, count 0 2006.229.07:17:40.92#ibcon#about to read 6, iclass 4, count 0 2006.229.07:17:40.92#ibcon#read 6, iclass 4, count 0 2006.229.07:17:40.92#ibcon#end of sib2, iclass 4, count 0 2006.229.07:17:40.92#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:17:40.92#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:17:40.92#ibcon#[27=USB\r\n] 2006.229.07:17:40.92#ibcon#*before write, iclass 4, count 0 2006.229.07:17:40.92#ibcon#enter sib2, iclass 4, count 0 2006.229.07:17:40.92#ibcon#flushed, iclass 4, count 0 2006.229.07:17:40.92#ibcon#about to write, iclass 4, count 0 2006.229.07:17:40.92#ibcon#wrote, iclass 4, count 0 2006.229.07:17:40.92#ibcon#about to read 3, iclass 4, count 0 2006.229.07:17:40.95#ibcon#read 3, iclass 4, count 0 2006.229.07:17:40.95#ibcon#about to read 4, iclass 4, count 0 2006.229.07:17:40.95#ibcon#read 4, iclass 4, count 0 2006.229.07:17:40.95#ibcon#about to read 5, iclass 4, count 0 2006.229.07:17:40.95#ibcon#read 5, iclass 4, count 0 2006.229.07:17:40.95#ibcon#about to read 6, iclass 4, count 0 2006.229.07:17:40.95#ibcon#read 6, iclass 4, count 0 2006.229.07:17:40.95#ibcon#end of sib2, iclass 4, count 0 2006.229.07:17:40.95#ibcon#*after write, iclass 4, count 0 2006.229.07:17:40.95#ibcon#*before return 0, iclass 4, count 0 2006.229.07:17:40.95#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:17:40.95#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:17:40.95#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:17:40.95#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:17:40.95$vck44/vblo=7,734.99 2006.229.07:17:40.95#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.07:17:40.95#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.07:17:40.95#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:40.95#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:17:40.95#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:17:40.95#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:17:40.95#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:17:40.95#ibcon#first serial, iclass 6, count 0 2006.229.07:17:40.95#ibcon#enter sib2, iclass 6, count 0 2006.229.07:17:40.95#ibcon#flushed, iclass 6, count 0 2006.229.07:17:40.95#ibcon#about to write, iclass 6, count 0 2006.229.07:17:40.95#ibcon#wrote, iclass 6, count 0 2006.229.07:17:40.95#ibcon#about to read 3, iclass 6, count 0 2006.229.07:17:40.97#ibcon#read 3, iclass 6, count 0 2006.229.07:17:40.97#ibcon#about to read 4, iclass 6, count 0 2006.229.07:17:40.97#ibcon#read 4, iclass 6, count 0 2006.229.07:17:40.97#ibcon#about to read 5, iclass 6, count 0 2006.229.07:17:40.97#ibcon#read 5, iclass 6, count 0 2006.229.07:17:40.97#ibcon#about to read 6, iclass 6, count 0 2006.229.07:17:40.97#ibcon#read 6, iclass 6, count 0 2006.229.07:17:40.97#ibcon#end of sib2, iclass 6, count 0 2006.229.07:17:40.97#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:17:40.97#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:17:40.97#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:17:40.97#ibcon#*before write, iclass 6, count 0 2006.229.07:17:40.97#ibcon#enter sib2, iclass 6, count 0 2006.229.07:17:40.97#ibcon#flushed, iclass 6, count 0 2006.229.07:17:40.97#ibcon#about to write, iclass 6, count 0 2006.229.07:17:40.97#ibcon#wrote, iclass 6, count 0 2006.229.07:17:40.97#ibcon#about to read 3, iclass 6, count 0 2006.229.07:17:41.01#ibcon#read 3, iclass 6, count 0 2006.229.07:17:41.01#ibcon#about to read 4, iclass 6, count 0 2006.229.07:17:41.01#ibcon#read 4, iclass 6, count 0 2006.229.07:17:41.01#ibcon#about to read 5, iclass 6, count 0 2006.229.07:17:41.01#ibcon#read 5, iclass 6, count 0 2006.229.07:17:41.01#ibcon#about to read 6, iclass 6, count 0 2006.229.07:17:41.01#ibcon#read 6, iclass 6, count 0 2006.229.07:17:41.01#ibcon#end of sib2, iclass 6, count 0 2006.229.07:17:41.01#ibcon#*after write, iclass 6, count 0 2006.229.07:17:41.01#ibcon#*before return 0, iclass 6, count 0 2006.229.07:17:41.01#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:17:41.01#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:17:41.01#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:17:41.01#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:17:41.01$vck44/vb=7,4 2006.229.07:17:41.01#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.07:17:41.01#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.07:17:41.01#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:41.01#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:17:41.07#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:17:41.07#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:17:41.07#ibcon#enter wrdev, iclass 10, count 2 2006.229.07:17:41.07#ibcon#first serial, iclass 10, count 2 2006.229.07:17:41.07#ibcon#enter sib2, iclass 10, count 2 2006.229.07:17:41.07#ibcon#flushed, iclass 10, count 2 2006.229.07:17:41.07#ibcon#about to write, iclass 10, count 2 2006.229.07:17:41.07#ibcon#wrote, iclass 10, count 2 2006.229.07:17:41.07#ibcon#about to read 3, iclass 10, count 2 2006.229.07:17:41.09#ibcon#read 3, iclass 10, count 2 2006.229.07:17:41.09#ibcon#about to read 4, iclass 10, count 2 2006.229.07:17:41.09#ibcon#read 4, iclass 10, count 2 2006.229.07:17:41.09#ibcon#about to read 5, iclass 10, count 2 2006.229.07:17:41.09#ibcon#read 5, iclass 10, count 2 2006.229.07:17:41.09#ibcon#about to read 6, iclass 10, count 2 2006.229.07:17:41.09#ibcon#read 6, iclass 10, count 2 2006.229.07:17:41.09#ibcon#end of sib2, iclass 10, count 2 2006.229.07:17:41.09#ibcon#*mode == 0, iclass 10, count 2 2006.229.07:17:41.09#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.07:17:41.09#ibcon#[27=AT07-04\r\n] 2006.229.07:17:41.09#ibcon#*before write, iclass 10, count 2 2006.229.07:17:41.09#ibcon#enter sib2, iclass 10, count 2 2006.229.07:17:41.09#ibcon#flushed, iclass 10, count 2 2006.229.07:17:41.09#ibcon#about to write, iclass 10, count 2 2006.229.07:17:41.09#ibcon#wrote, iclass 10, count 2 2006.229.07:17:41.09#ibcon#about to read 3, iclass 10, count 2 2006.229.07:17:41.12#ibcon#read 3, iclass 10, count 2 2006.229.07:17:41.12#ibcon#about to read 4, iclass 10, count 2 2006.229.07:17:41.12#ibcon#read 4, iclass 10, count 2 2006.229.07:17:41.12#ibcon#about to read 5, iclass 10, count 2 2006.229.07:17:41.12#ibcon#read 5, iclass 10, count 2 2006.229.07:17:41.12#ibcon#about to read 6, iclass 10, count 2 2006.229.07:17:41.12#ibcon#read 6, iclass 10, count 2 2006.229.07:17:41.12#ibcon#end of sib2, iclass 10, count 2 2006.229.07:17:41.12#ibcon#*after write, iclass 10, count 2 2006.229.07:17:41.12#ibcon#*before return 0, iclass 10, count 2 2006.229.07:17:41.12#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:17:41.12#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:17:41.12#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.07:17:41.12#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:41.12#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:17:41.24#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:17:41.24#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:17:41.24#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:17:41.24#ibcon#first serial, iclass 10, count 0 2006.229.07:17:41.24#ibcon#enter sib2, iclass 10, count 0 2006.229.07:17:41.24#ibcon#flushed, iclass 10, count 0 2006.229.07:17:41.24#ibcon#about to write, iclass 10, count 0 2006.229.07:17:41.24#ibcon#wrote, iclass 10, count 0 2006.229.07:17:41.24#ibcon#about to read 3, iclass 10, count 0 2006.229.07:17:41.26#ibcon#read 3, iclass 10, count 0 2006.229.07:17:41.26#ibcon#about to read 4, iclass 10, count 0 2006.229.07:17:41.26#ibcon#read 4, iclass 10, count 0 2006.229.07:17:41.26#ibcon#about to read 5, iclass 10, count 0 2006.229.07:17:41.26#ibcon#read 5, iclass 10, count 0 2006.229.07:17:41.26#ibcon#about to read 6, iclass 10, count 0 2006.229.07:17:41.26#ibcon#read 6, iclass 10, count 0 2006.229.07:17:41.26#ibcon#end of sib2, iclass 10, count 0 2006.229.07:17:41.26#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:17:41.26#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:17:41.26#ibcon#[27=USB\r\n] 2006.229.07:17:41.26#ibcon#*before write, iclass 10, count 0 2006.229.07:17:41.26#ibcon#enter sib2, iclass 10, count 0 2006.229.07:17:41.26#ibcon#flushed, iclass 10, count 0 2006.229.07:17:41.26#ibcon#about to write, iclass 10, count 0 2006.229.07:17:41.26#ibcon#wrote, iclass 10, count 0 2006.229.07:17:41.26#ibcon#about to read 3, iclass 10, count 0 2006.229.07:17:41.29#ibcon#read 3, iclass 10, count 0 2006.229.07:17:41.29#ibcon#about to read 4, iclass 10, count 0 2006.229.07:17:41.29#ibcon#read 4, iclass 10, count 0 2006.229.07:17:41.29#ibcon#about to read 5, iclass 10, count 0 2006.229.07:17:41.29#ibcon#read 5, iclass 10, count 0 2006.229.07:17:41.29#ibcon#about to read 6, iclass 10, count 0 2006.229.07:17:41.29#ibcon#read 6, iclass 10, count 0 2006.229.07:17:41.29#ibcon#end of sib2, iclass 10, count 0 2006.229.07:17:41.29#ibcon#*after write, iclass 10, count 0 2006.229.07:17:41.29#ibcon#*before return 0, iclass 10, count 0 2006.229.07:17:41.29#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:17:41.29#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:17:41.29#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:17:41.29#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:17:41.29$vck44/vblo=8,744.99 2006.229.07:17:41.29#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.07:17:41.29#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.07:17:41.29#ibcon#ireg 17 cls_cnt 0 2006.229.07:17:41.29#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:41.29#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:41.29#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:41.29#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:17:41.29#ibcon#first serial, iclass 12, count 0 2006.229.07:17:41.29#ibcon#enter sib2, iclass 12, count 0 2006.229.07:17:41.29#ibcon#flushed, iclass 12, count 0 2006.229.07:17:41.29#ibcon#about to write, iclass 12, count 0 2006.229.07:17:41.29#ibcon#wrote, iclass 12, count 0 2006.229.07:17:41.29#ibcon#about to read 3, iclass 12, count 0 2006.229.07:17:41.31#ibcon#read 3, iclass 12, count 0 2006.229.07:17:41.31#ibcon#about to read 4, iclass 12, count 0 2006.229.07:17:41.31#ibcon#read 4, iclass 12, count 0 2006.229.07:17:41.31#ibcon#about to read 5, iclass 12, count 0 2006.229.07:17:41.31#ibcon#read 5, iclass 12, count 0 2006.229.07:17:41.31#ibcon#about to read 6, iclass 12, count 0 2006.229.07:17:41.31#ibcon#read 6, iclass 12, count 0 2006.229.07:17:41.31#ibcon#end of sib2, iclass 12, count 0 2006.229.07:17:41.31#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:17:41.31#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:17:41.31#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:17:41.31#ibcon#*before write, iclass 12, count 0 2006.229.07:17:41.31#ibcon#enter sib2, iclass 12, count 0 2006.229.07:17:41.31#ibcon#flushed, iclass 12, count 0 2006.229.07:17:41.31#ibcon#about to write, iclass 12, count 0 2006.229.07:17:41.31#ibcon#wrote, iclass 12, count 0 2006.229.07:17:41.31#ibcon#about to read 3, iclass 12, count 0 2006.229.07:17:41.35#ibcon#read 3, iclass 12, count 0 2006.229.07:17:41.35#ibcon#about to read 4, iclass 12, count 0 2006.229.07:17:41.35#ibcon#read 4, iclass 12, count 0 2006.229.07:17:41.35#ibcon#about to read 5, iclass 12, count 0 2006.229.07:17:41.35#ibcon#read 5, iclass 12, count 0 2006.229.07:17:41.35#ibcon#about to read 6, iclass 12, count 0 2006.229.07:17:41.35#ibcon#read 6, iclass 12, count 0 2006.229.07:17:41.35#ibcon#end of sib2, iclass 12, count 0 2006.229.07:17:41.35#ibcon#*after write, iclass 12, count 0 2006.229.07:17:41.35#ibcon#*before return 0, iclass 12, count 0 2006.229.07:17:41.35#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:41.35#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:17:41.35#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:17:41.35#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:17:41.35$vck44/vb=8,4 2006.229.07:17:41.35#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.07:17:41.35#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.07:17:41.35#ibcon#ireg 11 cls_cnt 2 2006.229.07:17:41.35#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:41.41#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:41.41#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:41.41#ibcon#enter wrdev, iclass 14, count 2 2006.229.07:17:41.41#ibcon#first serial, iclass 14, count 2 2006.229.07:17:41.41#ibcon#enter sib2, iclass 14, count 2 2006.229.07:17:41.41#ibcon#flushed, iclass 14, count 2 2006.229.07:17:41.41#ibcon#about to write, iclass 14, count 2 2006.229.07:17:41.41#ibcon#wrote, iclass 14, count 2 2006.229.07:17:41.41#ibcon#about to read 3, iclass 14, count 2 2006.229.07:17:41.43#ibcon#read 3, iclass 14, count 2 2006.229.07:17:41.43#ibcon#about to read 4, iclass 14, count 2 2006.229.07:17:41.43#ibcon#read 4, iclass 14, count 2 2006.229.07:17:41.43#ibcon#about to read 5, iclass 14, count 2 2006.229.07:17:41.43#ibcon#read 5, iclass 14, count 2 2006.229.07:17:41.43#ibcon#about to read 6, iclass 14, count 2 2006.229.07:17:41.43#ibcon#read 6, iclass 14, count 2 2006.229.07:17:41.43#ibcon#end of sib2, iclass 14, count 2 2006.229.07:17:41.43#ibcon#*mode == 0, iclass 14, count 2 2006.229.07:17:41.43#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.07:17:41.43#ibcon#[27=AT08-04\r\n] 2006.229.07:17:41.43#ibcon#*before write, iclass 14, count 2 2006.229.07:17:41.43#ibcon#enter sib2, iclass 14, count 2 2006.229.07:17:41.43#ibcon#flushed, iclass 14, count 2 2006.229.07:17:41.43#ibcon#about to write, iclass 14, count 2 2006.229.07:17:41.43#ibcon#wrote, iclass 14, count 2 2006.229.07:17:41.43#ibcon#about to read 3, iclass 14, count 2 2006.229.07:17:41.46#ibcon#read 3, iclass 14, count 2 2006.229.07:17:41.46#ibcon#about to read 4, iclass 14, count 2 2006.229.07:17:41.46#ibcon#read 4, iclass 14, count 2 2006.229.07:17:41.46#ibcon#about to read 5, iclass 14, count 2 2006.229.07:17:41.46#ibcon#read 5, iclass 14, count 2 2006.229.07:17:41.46#ibcon#about to read 6, iclass 14, count 2 2006.229.07:17:41.46#ibcon#read 6, iclass 14, count 2 2006.229.07:17:41.46#ibcon#end of sib2, iclass 14, count 2 2006.229.07:17:41.46#ibcon#*after write, iclass 14, count 2 2006.229.07:17:41.46#ibcon#*before return 0, iclass 14, count 2 2006.229.07:17:41.46#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:41.46#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:17:41.46#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.07:17:41.46#ibcon#ireg 7 cls_cnt 0 2006.229.07:17:41.46#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:41.58#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:41.58#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:41.58#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:17:41.58#ibcon#first serial, iclass 14, count 0 2006.229.07:17:41.58#ibcon#enter sib2, iclass 14, count 0 2006.229.07:17:41.58#ibcon#flushed, iclass 14, count 0 2006.229.07:17:41.58#ibcon#about to write, iclass 14, count 0 2006.229.07:17:41.58#ibcon#wrote, iclass 14, count 0 2006.229.07:17:41.58#ibcon#about to read 3, iclass 14, count 0 2006.229.07:17:41.60#ibcon#read 3, iclass 14, count 0 2006.229.07:17:41.60#ibcon#about to read 4, iclass 14, count 0 2006.229.07:17:41.60#ibcon#read 4, iclass 14, count 0 2006.229.07:17:41.60#ibcon#about to read 5, iclass 14, count 0 2006.229.07:17:41.60#ibcon#read 5, iclass 14, count 0 2006.229.07:17:41.60#ibcon#about to read 6, iclass 14, count 0 2006.229.07:17:41.60#ibcon#read 6, iclass 14, count 0 2006.229.07:17:41.60#ibcon#end of sib2, iclass 14, count 0 2006.229.07:17:41.60#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:17:41.60#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:17:41.60#ibcon#[27=USB\r\n] 2006.229.07:17:41.60#ibcon#*before write, iclass 14, count 0 2006.229.07:17:41.60#ibcon#enter sib2, iclass 14, count 0 2006.229.07:17:41.60#ibcon#flushed, iclass 14, count 0 2006.229.07:17:41.60#ibcon#about to write, iclass 14, count 0 2006.229.07:17:41.60#ibcon#wrote, iclass 14, count 0 2006.229.07:17:41.60#ibcon#about to read 3, iclass 14, count 0 2006.229.07:17:41.63#ibcon#read 3, iclass 14, count 0 2006.229.07:17:41.63#ibcon#about to read 4, iclass 14, count 0 2006.229.07:17:41.63#ibcon#read 4, iclass 14, count 0 2006.229.07:17:41.63#ibcon#about to read 5, iclass 14, count 0 2006.229.07:17:41.63#ibcon#read 5, iclass 14, count 0 2006.229.07:17:41.63#ibcon#about to read 6, iclass 14, count 0 2006.229.07:17:41.63#ibcon#read 6, iclass 14, count 0 2006.229.07:17:41.63#ibcon#end of sib2, iclass 14, count 0 2006.229.07:17:41.63#ibcon#*after write, iclass 14, count 0 2006.229.07:17:41.63#ibcon#*before return 0, iclass 14, count 0 2006.229.07:17:41.63#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:41.63#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:17:41.63#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:17:41.63#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:17:41.63$vck44/vabw=wide 2006.229.07:17:41.63#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.07:17:41.63#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.07:17:41.63#ibcon#ireg 8 cls_cnt 0 2006.229.07:17:41.63#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:41.63#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:41.63#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:41.63#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:17:41.63#ibcon#first serial, iclass 16, count 0 2006.229.07:17:41.63#ibcon#enter sib2, iclass 16, count 0 2006.229.07:17:41.63#ibcon#flushed, iclass 16, count 0 2006.229.07:17:41.63#ibcon#about to write, iclass 16, count 0 2006.229.07:17:41.63#ibcon#wrote, iclass 16, count 0 2006.229.07:17:41.63#ibcon#about to read 3, iclass 16, count 0 2006.229.07:17:41.65#ibcon#read 3, iclass 16, count 0 2006.229.07:17:41.65#ibcon#about to read 4, iclass 16, count 0 2006.229.07:17:41.65#ibcon#read 4, iclass 16, count 0 2006.229.07:17:41.65#ibcon#about to read 5, iclass 16, count 0 2006.229.07:17:41.65#ibcon#read 5, iclass 16, count 0 2006.229.07:17:41.65#ibcon#about to read 6, iclass 16, count 0 2006.229.07:17:41.65#ibcon#read 6, iclass 16, count 0 2006.229.07:17:41.65#ibcon#end of sib2, iclass 16, count 0 2006.229.07:17:41.65#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:17:41.65#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:17:41.65#ibcon#[25=BW32\r\n] 2006.229.07:17:41.65#ibcon#*before write, iclass 16, count 0 2006.229.07:17:41.65#ibcon#enter sib2, iclass 16, count 0 2006.229.07:17:41.65#ibcon#flushed, iclass 16, count 0 2006.229.07:17:41.65#ibcon#about to write, iclass 16, count 0 2006.229.07:17:41.65#ibcon#wrote, iclass 16, count 0 2006.229.07:17:41.65#ibcon#about to read 3, iclass 16, count 0 2006.229.07:17:41.68#ibcon#read 3, iclass 16, count 0 2006.229.07:17:41.68#ibcon#about to read 4, iclass 16, count 0 2006.229.07:17:41.68#ibcon#read 4, iclass 16, count 0 2006.229.07:17:41.68#ibcon#about to read 5, iclass 16, count 0 2006.229.07:17:41.68#ibcon#read 5, iclass 16, count 0 2006.229.07:17:41.68#ibcon#about to read 6, iclass 16, count 0 2006.229.07:17:41.68#ibcon#read 6, iclass 16, count 0 2006.229.07:17:41.68#ibcon#end of sib2, iclass 16, count 0 2006.229.07:17:41.68#ibcon#*after write, iclass 16, count 0 2006.229.07:17:41.68#ibcon#*before return 0, iclass 16, count 0 2006.229.07:17:41.68#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:41.68#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:17:41.68#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:17:41.68#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:17:41.68$vck44/vbbw=wide 2006.229.07:17:41.68#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:17:41.68#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:17:41.68#ibcon#ireg 8 cls_cnt 0 2006.229.07:17:41.68#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:17:41.75#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:17:41.75#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:17:41.75#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:17:41.75#ibcon#first serial, iclass 18, count 0 2006.229.07:17:41.75#ibcon#enter sib2, iclass 18, count 0 2006.229.07:17:41.75#ibcon#flushed, iclass 18, count 0 2006.229.07:17:41.75#ibcon#about to write, iclass 18, count 0 2006.229.07:17:41.75#ibcon#wrote, iclass 18, count 0 2006.229.07:17:41.75#ibcon#about to read 3, iclass 18, count 0 2006.229.07:17:41.77#ibcon#read 3, iclass 18, count 0 2006.229.07:17:41.77#ibcon#about to read 4, iclass 18, count 0 2006.229.07:17:41.77#ibcon#read 4, iclass 18, count 0 2006.229.07:17:41.77#ibcon#about to read 5, iclass 18, count 0 2006.229.07:17:41.77#ibcon#read 5, iclass 18, count 0 2006.229.07:17:41.77#ibcon#about to read 6, iclass 18, count 0 2006.229.07:17:41.77#ibcon#read 6, iclass 18, count 0 2006.229.07:17:41.77#ibcon#end of sib2, iclass 18, count 0 2006.229.07:17:41.77#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:17:41.77#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:17:41.77#ibcon#[27=BW32\r\n] 2006.229.07:17:41.77#ibcon#*before write, iclass 18, count 0 2006.229.07:17:41.77#ibcon#enter sib2, iclass 18, count 0 2006.229.07:17:41.77#ibcon#flushed, iclass 18, count 0 2006.229.07:17:41.77#ibcon#about to write, iclass 18, count 0 2006.229.07:17:41.77#ibcon#wrote, iclass 18, count 0 2006.229.07:17:41.77#ibcon#about to read 3, iclass 18, count 0 2006.229.07:17:41.80#ibcon#read 3, iclass 18, count 0 2006.229.07:17:41.80#ibcon#about to read 4, iclass 18, count 0 2006.229.07:17:41.80#ibcon#read 4, iclass 18, count 0 2006.229.07:17:41.80#ibcon#about to read 5, iclass 18, count 0 2006.229.07:17:41.80#ibcon#read 5, iclass 18, count 0 2006.229.07:17:41.80#ibcon#about to read 6, iclass 18, count 0 2006.229.07:17:41.80#ibcon#read 6, iclass 18, count 0 2006.229.07:17:41.80#ibcon#end of sib2, iclass 18, count 0 2006.229.07:17:41.80#ibcon#*after write, iclass 18, count 0 2006.229.07:17:41.80#ibcon#*before return 0, iclass 18, count 0 2006.229.07:17:41.80#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:17:41.80#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:17:41.80#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:17:41.80#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:17:41.80$setupk4/ifdk4 2006.229.07:17:41.80$ifdk4/lo= 2006.229.07:17:41.80$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:17:41.80$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:17:41.80$ifdk4/patch= 2006.229.07:17:41.80$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:17:41.80$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:17:41.80$setupk4/!*+20s 2006.229.07:17:48.17#abcon#<5=/06 2.9 5.7 30.08 921000.2\r\n> 2006.229.07:17:48.19#abcon#{5=INTERFACE CLEAR} 2006.229.07:17:48.25#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:17:56.31$setupk4/"tpicd 2006.229.07:17:56.31$setupk4/echo=off 2006.229.07:17:56.31$setupk4/xlog=off 2006.229.07:17:56.31:!2006.229.07:22:10 2006.229.07:17:59.14#trakl#Source acquired 2006.229.07:17:59.14#flagr#flagr/antenna,acquired 2006.229.07:22:10.00:preob 2006.229.07:22:10.14/onsource/TRACKING 2006.229.07:22:10.14:!2006.229.07:22:20 2006.229.07:22:20.00:"tape 2006.229.07:22:20.00:"st=record 2006.229.07:22:20.00:data_valid=on 2006.229.07:22:20.00:midob 2006.229.07:22:20.14/onsource/TRACKING 2006.229.07:22:20.14/wx/30.07,1000.2,92 2006.229.07:22:20.31/cable/+6.3992E-03 2006.229.07:22:21.40/va/01,08,usb,yes,31,33 2006.229.07:22:21.40/va/02,07,usb,yes,33,34 2006.229.07:22:21.40/va/03,06,usb,yes,41,44 2006.229.07:22:21.40/va/04,07,usb,yes,34,36 2006.229.07:22:21.40/va/05,04,usb,yes,31,31 2006.229.07:22:21.40/va/06,04,usb,yes,35,34 2006.229.07:22:21.40/va/07,05,usb,yes,31,31 2006.229.07:22:21.40/va/08,06,usb,yes,22,27 2006.229.07:22:21.63/valo/01,524.99,yes,locked 2006.229.07:22:21.63/valo/02,534.99,yes,locked 2006.229.07:22:21.63/valo/03,564.99,yes,locked 2006.229.07:22:21.63/valo/04,624.99,yes,locked 2006.229.07:22:21.63/valo/05,734.99,yes,locked 2006.229.07:22:21.63/valo/06,814.99,yes,locked 2006.229.07:22:21.63/valo/07,864.99,yes,locked 2006.229.07:22:21.63/valo/08,884.99,yes,locked 2006.229.07:22:22.72/vb/01,04,usb,yes,32,30 2006.229.07:22:22.72/vb/02,04,usb,yes,34,34 2006.229.07:22:22.72/vb/03,04,usb,yes,31,34 2006.229.07:22:22.72/vb/04,04,usb,yes,36,35 2006.229.07:22:22.72/vb/05,04,usb,yes,28,30 2006.229.07:22:22.72/vb/06,04,usb,yes,33,29 2006.229.07:22:22.72/vb/07,04,usb,yes,32,32 2006.229.07:22:22.72/vb/08,04,usb,yes,30,33 2006.229.07:22:22.96/vblo/01,629.99,yes,locked 2006.229.07:22:22.96/vblo/02,634.99,yes,locked 2006.229.07:22:22.96/vblo/03,649.99,yes,locked 2006.229.07:22:22.96/vblo/04,679.99,yes,locked 2006.229.07:22:22.96/vblo/05,709.99,yes,locked 2006.229.07:22:22.96/vblo/06,719.99,yes,locked 2006.229.07:22:22.96/vblo/07,734.99,yes,locked 2006.229.07:22:22.96/vblo/08,744.99,yes,locked 2006.229.07:22:23.11/vabw/8 2006.229.07:22:23.26/vbbw/8 2006.229.07:22:23.37/xfe/off,on,12.0 2006.229.07:22:23.76/ifatt/23,28,28,28 2006.229.07:22:24.08/fmout-gps/S +4.54E-07 2006.229.07:22:24.11:!2006.229.07:28:50 2006.229.07:28:50.00:data_valid=off 2006.229.07:28:50.01:"et 2006.229.07:28:50.01:!+3s 2006.229.07:28:53.02:"tape 2006.229.07:28:53.02:postob 2006.229.07:28:53.17/cable/+6.3963E-03 2006.229.07:28:53.18/wx/30.04,1000.2,92 2006.229.07:28:54.07/fmout-gps/S +4.54E-07 2006.229.07:28:54.08:scan_name=229-0732,jd0608,40 2006.229.07:28:54.08:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.07:28:54.15#flagr#flagr/antenna,new-source 2006.229.07:28:55.15:checkk5 2006.229.07:28:55.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:28:55.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:28:56.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:28:56.89/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:28:57.31/chk_obsdata//k5ts1/T2290722??a.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.07:28:57.70/chk_obsdata//k5ts2/T2290722??b.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.07:28:58.10/chk_obsdata//k5ts3/T2290722??c.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.07:28:58.50/chk_obsdata//k5ts4/T2290722??d.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.07:28:59.22/k5log//k5ts1_log_newline 2006.229.07:28:59.92/k5log//k5ts2_log_newline 2006.229.07:29:00.65/k5log//k5ts3_log_newline 2006.229.07:29:01.36/k5log//k5ts4_log_newline 2006.229.07:29:01.38/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:29:01.38:setupk4=1 2006.229.07:29:01.38$setupk4/echo=on 2006.229.07:29:01.38$setupk4/pcalon 2006.229.07:29:01.38$pcalon/"no phase cal control is implemented here 2006.229.07:29:01.38$setupk4/"tpicd=stop 2006.229.07:29:01.38$setupk4/"rec=synch_on 2006.229.07:29:01.38$setupk4/"rec_mode=128 2006.229.07:29:01.38$setupk4/!* 2006.229.07:29:01.38$setupk4/recpk4 2006.229.07:29:01.38$recpk4/recpatch= 2006.229.07:29:01.39$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:29:01.39$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:29:01.39$setupk4/vck44 2006.229.07:29:01.39$vck44/valo=1,524.99 2006.229.07:29:01.39#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.07:29:01.39#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.07:29:01.39#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:01.39#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:01.39#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:01.39#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:01.39#ibcon#enter wrdev, iclass 39, count 0 2006.229.07:29:01.39#ibcon#first serial, iclass 39, count 0 2006.229.07:29:01.39#ibcon#enter sib2, iclass 39, count 0 2006.229.07:29:01.39#ibcon#flushed, iclass 39, count 0 2006.229.07:29:01.39#ibcon#about to write, iclass 39, count 0 2006.229.07:29:01.39#ibcon#wrote, iclass 39, count 0 2006.229.07:29:01.39#ibcon#about to read 3, iclass 39, count 0 2006.229.07:29:01.40#ibcon#read 3, iclass 39, count 0 2006.229.07:29:01.40#ibcon#about to read 4, iclass 39, count 0 2006.229.07:29:01.40#ibcon#read 4, iclass 39, count 0 2006.229.07:29:01.40#ibcon#about to read 5, iclass 39, count 0 2006.229.07:29:01.40#ibcon#read 5, iclass 39, count 0 2006.229.07:29:01.40#ibcon#about to read 6, iclass 39, count 0 2006.229.07:29:01.40#ibcon#read 6, iclass 39, count 0 2006.229.07:29:01.40#ibcon#end of sib2, iclass 39, count 0 2006.229.07:29:01.40#ibcon#*mode == 0, iclass 39, count 0 2006.229.07:29:01.40#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.07:29:01.40#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:29:01.40#ibcon#*before write, iclass 39, count 0 2006.229.07:29:01.40#ibcon#enter sib2, iclass 39, count 0 2006.229.07:29:01.40#ibcon#flushed, iclass 39, count 0 2006.229.07:29:01.40#ibcon#about to write, iclass 39, count 0 2006.229.07:29:01.40#ibcon#wrote, iclass 39, count 0 2006.229.07:29:01.40#ibcon#about to read 3, iclass 39, count 0 2006.229.07:29:01.45#ibcon#read 3, iclass 39, count 0 2006.229.07:29:01.45#ibcon#about to read 4, iclass 39, count 0 2006.229.07:29:01.45#ibcon#read 4, iclass 39, count 0 2006.229.07:29:01.45#ibcon#about to read 5, iclass 39, count 0 2006.229.07:29:01.45#ibcon#read 5, iclass 39, count 0 2006.229.07:29:01.45#ibcon#about to read 6, iclass 39, count 0 2006.229.07:29:01.45#ibcon#read 6, iclass 39, count 0 2006.229.07:29:01.45#ibcon#end of sib2, iclass 39, count 0 2006.229.07:29:01.45#ibcon#*after write, iclass 39, count 0 2006.229.07:29:01.45#ibcon#*before return 0, iclass 39, count 0 2006.229.07:29:01.45#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:01.45#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:01.45#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.07:29:01.45#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.07:29:01.45$vck44/va=1,8 2006.229.07:29:01.45#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.07:29:01.45#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.07:29:01.46#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:01.46#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:01.46#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:01.46#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:01.46#ibcon#enter wrdev, iclass 3, count 2 2006.229.07:29:01.46#ibcon#first serial, iclass 3, count 2 2006.229.07:29:01.46#ibcon#enter sib2, iclass 3, count 2 2006.229.07:29:01.46#ibcon#flushed, iclass 3, count 2 2006.229.07:29:01.46#ibcon#about to write, iclass 3, count 2 2006.229.07:29:01.46#ibcon#wrote, iclass 3, count 2 2006.229.07:29:01.46#ibcon#about to read 3, iclass 3, count 2 2006.229.07:29:01.47#ibcon#read 3, iclass 3, count 2 2006.229.07:29:01.47#ibcon#about to read 4, iclass 3, count 2 2006.229.07:29:01.47#ibcon#read 4, iclass 3, count 2 2006.229.07:29:01.47#ibcon#about to read 5, iclass 3, count 2 2006.229.07:29:01.47#ibcon#read 5, iclass 3, count 2 2006.229.07:29:01.47#ibcon#about to read 6, iclass 3, count 2 2006.229.07:29:01.47#ibcon#read 6, iclass 3, count 2 2006.229.07:29:01.47#ibcon#end of sib2, iclass 3, count 2 2006.229.07:29:01.47#ibcon#*mode == 0, iclass 3, count 2 2006.229.07:29:01.47#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.07:29:01.47#ibcon#[25=AT01-08\r\n] 2006.229.07:29:01.47#ibcon#*before write, iclass 3, count 2 2006.229.07:29:01.47#ibcon#enter sib2, iclass 3, count 2 2006.229.07:29:01.47#ibcon#flushed, iclass 3, count 2 2006.229.07:29:01.47#ibcon#about to write, iclass 3, count 2 2006.229.07:29:01.47#ibcon#wrote, iclass 3, count 2 2006.229.07:29:01.47#ibcon#about to read 3, iclass 3, count 2 2006.229.07:29:01.50#ibcon#read 3, iclass 3, count 2 2006.229.07:29:01.50#ibcon#about to read 4, iclass 3, count 2 2006.229.07:29:01.50#ibcon#read 4, iclass 3, count 2 2006.229.07:29:01.50#ibcon#about to read 5, iclass 3, count 2 2006.229.07:29:01.50#ibcon#read 5, iclass 3, count 2 2006.229.07:29:01.50#ibcon#about to read 6, iclass 3, count 2 2006.229.07:29:01.50#ibcon#read 6, iclass 3, count 2 2006.229.07:29:01.50#ibcon#end of sib2, iclass 3, count 2 2006.229.07:29:01.50#ibcon#*after write, iclass 3, count 2 2006.229.07:29:01.50#ibcon#*before return 0, iclass 3, count 2 2006.229.07:29:01.50#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:01.50#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:01.50#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.07:29:01.50#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:01.50#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:01.62#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:01.62#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:01.62#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:29:01.62#ibcon#first serial, iclass 3, count 0 2006.229.07:29:01.62#ibcon#enter sib2, iclass 3, count 0 2006.229.07:29:01.62#ibcon#flushed, iclass 3, count 0 2006.229.07:29:01.62#ibcon#about to write, iclass 3, count 0 2006.229.07:29:01.62#ibcon#wrote, iclass 3, count 0 2006.229.07:29:01.62#ibcon#about to read 3, iclass 3, count 0 2006.229.07:29:01.64#ibcon#read 3, iclass 3, count 0 2006.229.07:29:01.64#ibcon#about to read 4, iclass 3, count 0 2006.229.07:29:01.64#ibcon#read 4, iclass 3, count 0 2006.229.07:29:01.64#ibcon#about to read 5, iclass 3, count 0 2006.229.07:29:01.64#ibcon#read 5, iclass 3, count 0 2006.229.07:29:01.64#ibcon#about to read 6, iclass 3, count 0 2006.229.07:29:01.64#ibcon#read 6, iclass 3, count 0 2006.229.07:29:01.64#ibcon#end of sib2, iclass 3, count 0 2006.229.07:29:01.64#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:29:01.64#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:29:01.64#ibcon#[25=USB\r\n] 2006.229.07:29:01.64#ibcon#*before write, iclass 3, count 0 2006.229.07:29:01.64#ibcon#enter sib2, iclass 3, count 0 2006.229.07:29:01.64#ibcon#flushed, iclass 3, count 0 2006.229.07:29:01.64#ibcon#about to write, iclass 3, count 0 2006.229.07:29:01.64#ibcon#wrote, iclass 3, count 0 2006.229.07:29:01.64#ibcon#about to read 3, iclass 3, count 0 2006.229.07:29:01.67#ibcon#read 3, iclass 3, count 0 2006.229.07:29:01.67#ibcon#about to read 4, iclass 3, count 0 2006.229.07:29:01.67#ibcon#read 4, iclass 3, count 0 2006.229.07:29:01.67#ibcon#about to read 5, iclass 3, count 0 2006.229.07:29:01.67#ibcon#read 5, iclass 3, count 0 2006.229.07:29:01.67#ibcon#about to read 6, iclass 3, count 0 2006.229.07:29:01.67#ibcon#read 6, iclass 3, count 0 2006.229.07:29:01.67#ibcon#end of sib2, iclass 3, count 0 2006.229.07:29:01.67#ibcon#*after write, iclass 3, count 0 2006.229.07:29:01.67#ibcon#*before return 0, iclass 3, count 0 2006.229.07:29:01.67#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:01.67#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:01.67#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:29:01.67#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:29:01.67$vck44/valo=2,534.99 2006.229.07:29:01.68#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.07:29:01.68#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.07:29:01.68#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:01.68#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:01.68#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:01.68#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:01.68#ibcon#enter wrdev, iclass 5, count 0 2006.229.07:29:01.68#ibcon#first serial, iclass 5, count 0 2006.229.07:29:01.68#ibcon#enter sib2, iclass 5, count 0 2006.229.07:29:01.68#ibcon#flushed, iclass 5, count 0 2006.229.07:29:01.68#ibcon#about to write, iclass 5, count 0 2006.229.07:29:01.68#ibcon#wrote, iclass 5, count 0 2006.229.07:29:01.68#ibcon#about to read 3, iclass 5, count 0 2006.229.07:29:01.69#ibcon#read 3, iclass 5, count 0 2006.229.07:29:01.69#ibcon#about to read 4, iclass 5, count 0 2006.229.07:29:01.69#ibcon#read 4, iclass 5, count 0 2006.229.07:29:01.69#ibcon#about to read 5, iclass 5, count 0 2006.229.07:29:01.69#ibcon#read 5, iclass 5, count 0 2006.229.07:29:01.69#ibcon#about to read 6, iclass 5, count 0 2006.229.07:29:01.69#ibcon#read 6, iclass 5, count 0 2006.229.07:29:01.69#ibcon#end of sib2, iclass 5, count 0 2006.229.07:29:01.69#ibcon#*mode == 0, iclass 5, count 0 2006.229.07:29:01.69#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.07:29:01.69#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:29:01.69#ibcon#*before write, iclass 5, count 0 2006.229.07:29:01.69#ibcon#enter sib2, iclass 5, count 0 2006.229.07:29:01.69#ibcon#flushed, iclass 5, count 0 2006.229.07:29:01.69#ibcon#about to write, iclass 5, count 0 2006.229.07:29:01.69#ibcon#wrote, iclass 5, count 0 2006.229.07:29:01.69#ibcon#about to read 3, iclass 5, count 0 2006.229.07:29:01.73#ibcon#read 3, iclass 5, count 0 2006.229.07:29:01.73#ibcon#about to read 4, iclass 5, count 0 2006.229.07:29:01.73#ibcon#read 4, iclass 5, count 0 2006.229.07:29:01.73#ibcon#about to read 5, iclass 5, count 0 2006.229.07:29:01.73#ibcon#read 5, iclass 5, count 0 2006.229.07:29:01.73#ibcon#about to read 6, iclass 5, count 0 2006.229.07:29:01.73#ibcon#read 6, iclass 5, count 0 2006.229.07:29:01.73#ibcon#end of sib2, iclass 5, count 0 2006.229.07:29:01.73#ibcon#*after write, iclass 5, count 0 2006.229.07:29:01.73#ibcon#*before return 0, iclass 5, count 0 2006.229.07:29:01.73#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:01.73#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:01.73#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.07:29:01.73#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.07:29:01.73$vck44/va=2,7 2006.229.07:29:01.73#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.07:29:01.73#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.07:29:01.73#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:01.74#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:01.78#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:01.78#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:01.78#ibcon#enter wrdev, iclass 7, count 2 2006.229.07:29:01.78#ibcon#first serial, iclass 7, count 2 2006.229.07:29:01.78#ibcon#enter sib2, iclass 7, count 2 2006.229.07:29:01.78#ibcon#flushed, iclass 7, count 2 2006.229.07:29:01.78#ibcon#about to write, iclass 7, count 2 2006.229.07:29:01.78#ibcon#wrote, iclass 7, count 2 2006.229.07:29:01.78#ibcon#about to read 3, iclass 7, count 2 2006.229.07:29:01.80#ibcon#read 3, iclass 7, count 2 2006.229.07:29:01.80#ibcon#about to read 4, iclass 7, count 2 2006.229.07:29:01.80#ibcon#read 4, iclass 7, count 2 2006.229.07:29:01.80#ibcon#about to read 5, iclass 7, count 2 2006.229.07:29:01.80#ibcon#read 5, iclass 7, count 2 2006.229.07:29:01.80#ibcon#about to read 6, iclass 7, count 2 2006.229.07:29:01.80#ibcon#read 6, iclass 7, count 2 2006.229.07:29:01.80#ibcon#end of sib2, iclass 7, count 2 2006.229.07:29:01.80#ibcon#*mode == 0, iclass 7, count 2 2006.229.07:29:01.80#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.07:29:01.80#ibcon#[25=AT02-07\r\n] 2006.229.07:29:01.80#ibcon#*before write, iclass 7, count 2 2006.229.07:29:01.80#ibcon#enter sib2, iclass 7, count 2 2006.229.07:29:01.80#ibcon#flushed, iclass 7, count 2 2006.229.07:29:01.80#ibcon#about to write, iclass 7, count 2 2006.229.07:29:01.80#ibcon#wrote, iclass 7, count 2 2006.229.07:29:01.80#ibcon#about to read 3, iclass 7, count 2 2006.229.07:29:01.83#ibcon#read 3, iclass 7, count 2 2006.229.07:29:01.83#ibcon#about to read 4, iclass 7, count 2 2006.229.07:29:01.83#ibcon#read 4, iclass 7, count 2 2006.229.07:29:01.83#ibcon#about to read 5, iclass 7, count 2 2006.229.07:29:01.83#ibcon#read 5, iclass 7, count 2 2006.229.07:29:01.83#ibcon#about to read 6, iclass 7, count 2 2006.229.07:29:01.83#ibcon#read 6, iclass 7, count 2 2006.229.07:29:01.83#ibcon#end of sib2, iclass 7, count 2 2006.229.07:29:01.83#ibcon#*after write, iclass 7, count 2 2006.229.07:29:01.83#ibcon#*before return 0, iclass 7, count 2 2006.229.07:29:01.83#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:01.83#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:01.83#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.07:29:01.83#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:01.83#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:01.95#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:01.95#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:01.95#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:29:01.95#ibcon#first serial, iclass 7, count 0 2006.229.07:29:01.95#ibcon#enter sib2, iclass 7, count 0 2006.229.07:29:01.95#ibcon#flushed, iclass 7, count 0 2006.229.07:29:01.95#ibcon#about to write, iclass 7, count 0 2006.229.07:29:01.95#ibcon#wrote, iclass 7, count 0 2006.229.07:29:01.95#ibcon#about to read 3, iclass 7, count 0 2006.229.07:29:01.97#ibcon#read 3, iclass 7, count 0 2006.229.07:29:01.97#ibcon#about to read 4, iclass 7, count 0 2006.229.07:29:01.97#ibcon#read 4, iclass 7, count 0 2006.229.07:29:01.97#ibcon#about to read 5, iclass 7, count 0 2006.229.07:29:01.97#ibcon#read 5, iclass 7, count 0 2006.229.07:29:01.97#ibcon#about to read 6, iclass 7, count 0 2006.229.07:29:01.97#ibcon#read 6, iclass 7, count 0 2006.229.07:29:01.97#ibcon#end of sib2, iclass 7, count 0 2006.229.07:29:01.97#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:29:01.97#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:29:01.97#ibcon#[25=USB\r\n] 2006.229.07:29:01.97#ibcon#*before write, iclass 7, count 0 2006.229.07:29:01.97#ibcon#enter sib2, iclass 7, count 0 2006.229.07:29:01.97#ibcon#flushed, iclass 7, count 0 2006.229.07:29:01.97#ibcon#about to write, iclass 7, count 0 2006.229.07:29:01.97#ibcon#wrote, iclass 7, count 0 2006.229.07:29:01.97#ibcon#about to read 3, iclass 7, count 0 2006.229.07:29:02.00#ibcon#read 3, iclass 7, count 0 2006.229.07:29:02.00#ibcon#about to read 4, iclass 7, count 0 2006.229.07:29:02.00#ibcon#read 4, iclass 7, count 0 2006.229.07:29:02.00#ibcon#about to read 5, iclass 7, count 0 2006.229.07:29:02.00#ibcon#read 5, iclass 7, count 0 2006.229.07:29:02.00#ibcon#about to read 6, iclass 7, count 0 2006.229.07:29:02.00#ibcon#read 6, iclass 7, count 0 2006.229.07:29:02.00#ibcon#end of sib2, iclass 7, count 0 2006.229.07:29:02.00#ibcon#*after write, iclass 7, count 0 2006.229.07:29:02.00#ibcon#*before return 0, iclass 7, count 0 2006.229.07:29:02.00#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:02.00#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:02.00#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:29:02.00#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:29:02.00$vck44/valo=3,564.99 2006.229.07:29:02.00#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.07:29:02.00#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.07:29:02.00#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:02.01#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:02.01#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:02.01#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:02.01#ibcon#enter wrdev, iclass 11, count 0 2006.229.07:29:02.01#ibcon#first serial, iclass 11, count 0 2006.229.07:29:02.01#ibcon#enter sib2, iclass 11, count 0 2006.229.07:29:02.01#ibcon#flushed, iclass 11, count 0 2006.229.07:29:02.01#ibcon#about to write, iclass 11, count 0 2006.229.07:29:02.01#ibcon#wrote, iclass 11, count 0 2006.229.07:29:02.01#ibcon#about to read 3, iclass 11, count 0 2006.229.07:29:02.02#ibcon#read 3, iclass 11, count 0 2006.229.07:29:02.02#ibcon#about to read 4, iclass 11, count 0 2006.229.07:29:02.02#ibcon#read 4, iclass 11, count 0 2006.229.07:29:02.02#ibcon#about to read 5, iclass 11, count 0 2006.229.07:29:02.02#ibcon#read 5, iclass 11, count 0 2006.229.07:29:02.02#ibcon#about to read 6, iclass 11, count 0 2006.229.07:29:02.02#ibcon#read 6, iclass 11, count 0 2006.229.07:29:02.02#ibcon#end of sib2, iclass 11, count 0 2006.229.07:29:02.02#ibcon#*mode == 0, iclass 11, count 0 2006.229.07:29:02.02#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.07:29:02.02#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:29:02.02#ibcon#*before write, iclass 11, count 0 2006.229.07:29:02.02#ibcon#enter sib2, iclass 11, count 0 2006.229.07:29:02.02#ibcon#flushed, iclass 11, count 0 2006.229.07:29:02.02#ibcon#about to write, iclass 11, count 0 2006.229.07:29:02.02#ibcon#wrote, iclass 11, count 0 2006.229.07:29:02.02#ibcon#about to read 3, iclass 11, count 0 2006.229.07:29:02.06#ibcon#read 3, iclass 11, count 0 2006.229.07:29:02.06#ibcon#about to read 4, iclass 11, count 0 2006.229.07:29:02.06#ibcon#read 4, iclass 11, count 0 2006.229.07:29:02.06#ibcon#about to read 5, iclass 11, count 0 2006.229.07:29:02.06#ibcon#read 5, iclass 11, count 0 2006.229.07:29:02.06#ibcon#about to read 6, iclass 11, count 0 2006.229.07:29:02.06#ibcon#read 6, iclass 11, count 0 2006.229.07:29:02.06#ibcon#end of sib2, iclass 11, count 0 2006.229.07:29:02.06#ibcon#*after write, iclass 11, count 0 2006.229.07:29:02.06#ibcon#*before return 0, iclass 11, count 0 2006.229.07:29:02.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:02.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:02.06#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.07:29:02.06#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.07:29:02.06$vck44/va=3,6 2006.229.07:29:02.06#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.07:29:02.07#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.07:29:02.07#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:02.07#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:02.11#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:02.11#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:02.11#ibcon#enter wrdev, iclass 13, count 2 2006.229.07:29:02.11#ibcon#first serial, iclass 13, count 2 2006.229.07:29:02.11#ibcon#enter sib2, iclass 13, count 2 2006.229.07:29:02.11#ibcon#flushed, iclass 13, count 2 2006.229.07:29:02.11#ibcon#about to write, iclass 13, count 2 2006.229.07:29:02.11#ibcon#wrote, iclass 13, count 2 2006.229.07:29:02.11#ibcon#about to read 3, iclass 13, count 2 2006.229.07:29:02.13#ibcon#read 3, iclass 13, count 2 2006.229.07:29:02.13#ibcon#about to read 4, iclass 13, count 2 2006.229.07:29:02.13#ibcon#read 4, iclass 13, count 2 2006.229.07:29:02.13#ibcon#about to read 5, iclass 13, count 2 2006.229.07:29:02.13#ibcon#read 5, iclass 13, count 2 2006.229.07:29:02.13#ibcon#about to read 6, iclass 13, count 2 2006.229.07:29:02.13#ibcon#read 6, iclass 13, count 2 2006.229.07:29:02.13#ibcon#end of sib2, iclass 13, count 2 2006.229.07:29:02.13#ibcon#*mode == 0, iclass 13, count 2 2006.229.07:29:02.13#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.07:29:02.13#ibcon#[25=AT03-06\r\n] 2006.229.07:29:02.13#ibcon#*before write, iclass 13, count 2 2006.229.07:29:02.13#ibcon#enter sib2, iclass 13, count 2 2006.229.07:29:02.13#ibcon#flushed, iclass 13, count 2 2006.229.07:29:02.13#ibcon#about to write, iclass 13, count 2 2006.229.07:29:02.13#ibcon#wrote, iclass 13, count 2 2006.229.07:29:02.13#ibcon#about to read 3, iclass 13, count 2 2006.229.07:29:02.16#ibcon#read 3, iclass 13, count 2 2006.229.07:29:02.16#ibcon#about to read 4, iclass 13, count 2 2006.229.07:29:02.16#ibcon#read 4, iclass 13, count 2 2006.229.07:29:02.16#ibcon#about to read 5, iclass 13, count 2 2006.229.07:29:02.16#ibcon#read 5, iclass 13, count 2 2006.229.07:29:02.16#ibcon#about to read 6, iclass 13, count 2 2006.229.07:29:02.16#ibcon#read 6, iclass 13, count 2 2006.229.07:29:02.16#ibcon#end of sib2, iclass 13, count 2 2006.229.07:29:02.16#ibcon#*after write, iclass 13, count 2 2006.229.07:29:02.16#ibcon#*before return 0, iclass 13, count 2 2006.229.07:29:02.16#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:02.16#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:02.16#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.07:29:02.16#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:02.16#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:02.28#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:02.28#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:02.28#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:29:02.28#ibcon#first serial, iclass 13, count 0 2006.229.07:29:02.28#ibcon#enter sib2, iclass 13, count 0 2006.229.07:29:02.28#ibcon#flushed, iclass 13, count 0 2006.229.07:29:02.28#ibcon#about to write, iclass 13, count 0 2006.229.07:29:02.28#ibcon#wrote, iclass 13, count 0 2006.229.07:29:02.28#ibcon#about to read 3, iclass 13, count 0 2006.229.07:29:02.30#ibcon#read 3, iclass 13, count 0 2006.229.07:29:02.30#ibcon#about to read 4, iclass 13, count 0 2006.229.07:29:02.30#ibcon#read 4, iclass 13, count 0 2006.229.07:29:02.30#ibcon#about to read 5, iclass 13, count 0 2006.229.07:29:02.30#ibcon#read 5, iclass 13, count 0 2006.229.07:29:02.30#ibcon#about to read 6, iclass 13, count 0 2006.229.07:29:02.30#ibcon#read 6, iclass 13, count 0 2006.229.07:29:02.30#ibcon#end of sib2, iclass 13, count 0 2006.229.07:29:02.30#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:29:02.30#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:29:02.30#ibcon#[25=USB\r\n] 2006.229.07:29:02.30#ibcon#*before write, iclass 13, count 0 2006.229.07:29:02.30#ibcon#enter sib2, iclass 13, count 0 2006.229.07:29:02.30#ibcon#flushed, iclass 13, count 0 2006.229.07:29:02.30#ibcon#about to write, iclass 13, count 0 2006.229.07:29:02.30#ibcon#wrote, iclass 13, count 0 2006.229.07:29:02.30#ibcon#about to read 3, iclass 13, count 0 2006.229.07:29:02.33#ibcon#read 3, iclass 13, count 0 2006.229.07:29:02.33#ibcon#about to read 4, iclass 13, count 0 2006.229.07:29:02.33#ibcon#read 4, iclass 13, count 0 2006.229.07:29:02.33#ibcon#about to read 5, iclass 13, count 0 2006.229.07:29:02.33#ibcon#read 5, iclass 13, count 0 2006.229.07:29:02.33#ibcon#about to read 6, iclass 13, count 0 2006.229.07:29:02.33#ibcon#read 6, iclass 13, count 0 2006.229.07:29:02.33#ibcon#end of sib2, iclass 13, count 0 2006.229.07:29:02.33#ibcon#*after write, iclass 13, count 0 2006.229.07:29:02.33#ibcon#*before return 0, iclass 13, count 0 2006.229.07:29:02.33#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:02.33#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:02.33#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:29:02.33#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:29:02.33$vck44/valo=4,624.99 2006.229.07:29:02.34#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.07:29:02.34#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.07:29:02.34#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:02.34#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:02.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:02.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:02.34#ibcon#enter wrdev, iclass 15, count 0 2006.229.07:29:02.34#ibcon#first serial, iclass 15, count 0 2006.229.07:29:02.34#ibcon#enter sib2, iclass 15, count 0 2006.229.07:29:02.34#ibcon#flushed, iclass 15, count 0 2006.229.07:29:02.34#ibcon#about to write, iclass 15, count 0 2006.229.07:29:02.34#ibcon#wrote, iclass 15, count 0 2006.229.07:29:02.34#ibcon#about to read 3, iclass 15, count 0 2006.229.07:29:02.35#ibcon#read 3, iclass 15, count 0 2006.229.07:29:02.35#ibcon#about to read 4, iclass 15, count 0 2006.229.07:29:02.35#ibcon#read 4, iclass 15, count 0 2006.229.07:29:02.35#ibcon#about to read 5, iclass 15, count 0 2006.229.07:29:02.35#ibcon#read 5, iclass 15, count 0 2006.229.07:29:02.35#ibcon#about to read 6, iclass 15, count 0 2006.229.07:29:02.35#ibcon#read 6, iclass 15, count 0 2006.229.07:29:02.35#ibcon#end of sib2, iclass 15, count 0 2006.229.07:29:02.35#ibcon#*mode == 0, iclass 15, count 0 2006.229.07:29:02.35#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.07:29:02.35#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:29:02.35#ibcon#*before write, iclass 15, count 0 2006.229.07:29:02.35#ibcon#enter sib2, iclass 15, count 0 2006.229.07:29:02.35#ibcon#flushed, iclass 15, count 0 2006.229.07:29:02.35#ibcon#about to write, iclass 15, count 0 2006.229.07:29:02.35#ibcon#wrote, iclass 15, count 0 2006.229.07:29:02.35#ibcon#about to read 3, iclass 15, count 0 2006.229.07:29:02.39#ibcon#read 3, iclass 15, count 0 2006.229.07:29:02.39#ibcon#about to read 4, iclass 15, count 0 2006.229.07:29:02.39#ibcon#read 4, iclass 15, count 0 2006.229.07:29:02.39#ibcon#about to read 5, iclass 15, count 0 2006.229.07:29:02.39#ibcon#read 5, iclass 15, count 0 2006.229.07:29:02.39#ibcon#about to read 6, iclass 15, count 0 2006.229.07:29:02.39#ibcon#read 6, iclass 15, count 0 2006.229.07:29:02.39#ibcon#end of sib2, iclass 15, count 0 2006.229.07:29:02.39#ibcon#*after write, iclass 15, count 0 2006.229.07:29:02.39#ibcon#*before return 0, iclass 15, count 0 2006.229.07:29:02.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:02.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:02.39#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.07:29:02.39#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.07:29:02.39$vck44/va=4,7 2006.229.07:29:02.40#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.07:29:02.40#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.07:29:02.40#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:02.40#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:02.44#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:02.44#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:02.44#ibcon#enter wrdev, iclass 17, count 2 2006.229.07:29:02.44#ibcon#first serial, iclass 17, count 2 2006.229.07:29:02.44#ibcon#enter sib2, iclass 17, count 2 2006.229.07:29:02.44#ibcon#flushed, iclass 17, count 2 2006.229.07:29:02.44#ibcon#about to write, iclass 17, count 2 2006.229.07:29:02.44#ibcon#wrote, iclass 17, count 2 2006.229.07:29:02.44#ibcon#about to read 3, iclass 17, count 2 2006.229.07:29:02.46#ibcon#read 3, iclass 17, count 2 2006.229.07:29:02.46#ibcon#about to read 4, iclass 17, count 2 2006.229.07:29:02.46#ibcon#read 4, iclass 17, count 2 2006.229.07:29:02.46#ibcon#about to read 5, iclass 17, count 2 2006.229.07:29:02.46#ibcon#read 5, iclass 17, count 2 2006.229.07:29:02.46#ibcon#about to read 6, iclass 17, count 2 2006.229.07:29:02.46#ibcon#read 6, iclass 17, count 2 2006.229.07:29:02.46#ibcon#end of sib2, iclass 17, count 2 2006.229.07:29:02.46#ibcon#*mode == 0, iclass 17, count 2 2006.229.07:29:02.46#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.07:29:02.46#ibcon#[25=AT04-07\r\n] 2006.229.07:29:02.46#ibcon#*before write, iclass 17, count 2 2006.229.07:29:02.46#ibcon#enter sib2, iclass 17, count 2 2006.229.07:29:02.46#ibcon#flushed, iclass 17, count 2 2006.229.07:29:02.46#ibcon#about to write, iclass 17, count 2 2006.229.07:29:02.46#ibcon#wrote, iclass 17, count 2 2006.229.07:29:02.46#ibcon#about to read 3, iclass 17, count 2 2006.229.07:29:02.49#ibcon#read 3, iclass 17, count 2 2006.229.07:29:02.49#ibcon#about to read 4, iclass 17, count 2 2006.229.07:29:02.49#ibcon#read 4, iclass 17, count 2 2006.229.07:29:02.49#ibcon#about to read 5, iclass 17, count 2 2006.229.07:29:02.49#ibcon#read 5, iclass 17, count 2 2006.229.07:29:02.49#ibcon#about to read 6, iclass 17, count 2 2006.229.07:29:02.49#ibcon#read 6, iclass 17, count 2 2006.229.07:29:02.49#ibcon#end of sib2, iclass 17, count 2 2006.229.07:29:02.49#ibcon#*after write, iclass 17, count 2 2006.229.07:29:02.49#ibcon#*before return 0, iclass 17, count 2 2006.229.07:29:02.49#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:02.49#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:02.49#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.07:29:02.49#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:02.49#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:02.61#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:02.61#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:02.61#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:29:02.61#ibcon#first serial, iclass 17, count 0 2006.229.07:29:02.61#ibcon#enter sib2, iclass 17, count 0 2006.229.07:29:02.61#ibcon#flushed, iclass 17, count 0 2006.229.07:29:02.61#ibcon#about to write, iclass 17, count 0 2006.229.07:29:02.61#ibcon#wrote, iclass 17, count 0 2006.229.07:29:02.61#ibcon#about to read 3, iclass 17, count 0 2006.229.07:29:02.63#ibcon#read 3, iclass 17, count 0 2006.229.07:29:02.63#ibcon#about to read 4, iclass 17, count 0 2006.229.07:29:02.63#ibcon#read 4, iclass 17, count 0 2006.229.07:29:02.63#ibcon#about to read 5, iclass 17, count 0 2006.229.07:29:02.63#ibcon#read 5, iclass 17, count 0 2006.229.07:29:02.63#ibcon#about to read 6, iclass 17, count 0 2006.229.07:29:02.63#ibcon#read 6, iclass 17, count 0 2006.229.07:29:02.63#ibcon#end of sib2, iclass 17, count 0 2006.229.07:29:02.63#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:29:02.63#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:29:02.63#ibcon#[25=USB\r\n] 2006.229.07:29:02.63#ibcon#*before write, iclass 17, count 0 2006.229.07:29:02.63#ibcon#enter sib2, iclass 17, count 0 2006.229.07:29:02.63#ibcon#flushed, iclass 17, count 0 2006.229.07:29:02.63#ibcon#about to write, iclass 17, count 0 2006.229.07:29:02.63#ibcon#wrote, iclass 17, count 0 2006.229.07:29:02.63#ibcon#about to read 3, iclass 17, count 0 2006.229.07:29:02.66#ibcon#read 3, iclass 17, count 0 2006.229.07:29:02.66#ibcon#about to read 4, iclass 17, count 0 2006.229.07:29:02.66#ibcon#read 4, iclass 17, count 0 2006.229.07:29:02.66#ibcon#about to read 5, iclass 17, count 0 2006.229.07:29:02.66#ibcon#read 5, iclass 17, count 0 2006.229.07:29:02.66#ibcon#about to read 6, iclass 17, count 0 2006.229.07:29:02.66#ibcon#read 6, iclass 17, count 0 2006.229.07:29:02.66#ibcon#end of sib2, iclass 17, count 0 2006.229.07:29:02.66#ibcon#*after write, iclass 17, count 0 2006.229.07:29:02.66#ibcon#*before return 0, iclass 17, count 0 2006.229.07:29:02.66#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:02.66#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:02.66#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:29:02.66#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:29:02.66$vck44/valo=5,734.99 2006.229.07:29:02.66#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.07:29:02.67#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.07:29:02.67#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:02.67#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:02.67#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:02.67#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:02.67#ibcon#enter wrdev, iclass 19, count 0 2006.229.07:29:02.67#ibcon#first serial, iclass 19, count 0 2006.229.07:29:02.67#ibcon#enter sib2, iclass 19, count 0 2006.229.07:29:02.67#ibcon#flushed, iclass 19, count 0 2006.229.07:29:02.67#ibcon#about to write, iclass 19, count 0 2006.229.07:29:02.67#ibcon#wrote, iclass 19, count 0 2006.229.07:29:02.67#ibcon#about to read 3, iclass 19, count 0 2006.229.07:29:02.68#ibcon#read 3, iclass 19, count 0 2006.229.07:29:02.68#ibcon#about to read 4, iclass 19, count 0 2006.229.07:29:02.68#ibcon#read 4, iclass 19, count 0 2006.229.07:29:02.68#ibcon#about to read 5, iclass 19, count 0 2006.229.07:29:02.68#ibcon#read 5, iclass 19, count 0 2006.229.07:29:02.68#ibcon#about to read 6, iclass 19, count 0 2006.229.07:29:02.68#ibcon#read 6, iclass 19, count 0 2006.229.07:29:02.68#ibcon#end of sib2, iclass 19, count 0 2006.229.07:29:02.68#ibcon#*mode == 0, iclass 19, count 0 2006.229.07:29:02.68#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.07:29:02.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:29:02.68#ibcon#*before write, iclass 19, count 0 2006.229.07:29:02.68#ibcon#enter sib2, iclass 19, count 0 2006.229.07:29:02.68#ibcon#flushed, iclass 19, count 0 2006.229.07:29:02.68#ibcon#about to write, iclass 19, count 0 2006.229.07:29:02.68#ibcon#wrote, iclass 19, count 0 2006.229.07:29:02.68#ibcon#about to read 3, iclass 19, count 0 2006.229.07:29:02.72#ibcon#read 3, iclass 19, count 0 2006.229.07:29:02.72#ibcon#about to read 4, iclass 19, count 0 2006.229.07:29:02.72#ibcon#read 4, iclass 19, count 0 2006.229.07:29:02.72#ibcon#about to read 5, iclass 19, count 0 2006.229.07:29:02.72#ibcon#read 5, iclass 19, count 0 2006.229.07:29:02.72#ibcon#about to read 6, iclass 19, count 0 2006.229.07:29:02.72#ibcon#read 6, iclass 19, count 0 2006.229.07:29:02.72#ibcon#end of sib2, iclass 19, count 0 2006.229.07:29:02.72#ibcon#*after write, iclass 19, count 0 2006.229.07:29:02.72#ibcon#*before return 0, iclass 19, count 0 2006.229.07:29:02.72#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:02.72#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:02.72#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.07:29:02.72#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.07:29:02.72$vck44/va=5,4 2006.229.07:29:02.73#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.07:29:02.73#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.07:29:02.73#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:02.73#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:02.77#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:02.77#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:02.77#ibcon#enter wrdev, iclass 21, count 2 2006.229.07:29:02.77#ibcon#first serial, iclass 21, count 2 2006.229.07:29:02.77#ibcon#enter sib2, iclass 21, count 2 2006.229.07:29:02.77#ibcon#flushed, iclass 21, count 2 2006.229.07:29:02.77#ibcon#about to write, iclass 21, count 2 2006.229.07:29:02.77#ibcon#wrote, iclass 21, count 2 2006.229.07:29:02.77#ibcon#about to read 3, iclass 21, count 2 2006.229.07:29:02.79#ibcon#read 3, iclass 21, count 2 2006.229.07:29:02.79#ibcon#about to read 4, iclass 21, count 2 2006.229.07:29:02.79#ibcon#read 4, iclass 21, count 2 2006.229.07:29:02.79#ibcon#about to read 5, iclass 21, count 2 2006.229.07:29:02.79#ibcon#read 5, iclass 21, count 2 2006.229.07:29:02.79#ibcon#about to read 6, iclass 21, count 2 2006.229.07:29:02.79#ibcon#read 6, iclass 21, count 2 2006.229.07:29:02.79#ibcon#end of sib2, iclass 21, count 2 2006.229.07:29:02.79#ibcon#*mode == 0, iclass 21, count 2 2006.229.07:29:02.79#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.07:29:02.79#ibcon#[25=AT05-04\r\n] 2006.229.07:29:02.79#ibcon#*before write, iclass 21, count 2 2006.229.07:29:02.79#ibcon#enter sib2, iclass 21, count 2 2006.229.07:29:02.79#ibcon#flushed, iclass 21, count 2 2006.229.07:29:02.79#ibcon#about to write, iclass 21, count 2 2006.229.07:29:02.79#ibcon#wrote, iclass 21, count 2 2006.229.07:29:02.79#ibcon#about to read 3, iclass 21, count 2 2006.229.07:29:02.82#ibcon#read 3, iclass 21, count 2 2006.229.07:29:02.82#ibcon#about to read 4, iclass 21, count 2 2006.229.07:29:02.82#ibcon#read 4, iclass 21, count 2 2006.229.07:29:02.82#ibcon#about to read 5, iclass 21, count 2 2006.229.07:29:02.82#ibcon#read 5, iclass 21, count 2 2006.229.07:29:02.82#ibcon#about to read 6, iclass 21, count 2 2006.229.07:29:02.82#ibcon#read 6, iclass 21, count 2 2006.229.07:29:02.82#ibcon#end of sib2, iclass 21, count 2 2006.229.07:29:02.82#ibcon#*after write, iclass 21, count 2 2006.229.07:29:02.82#ibcon#*before return 0, iclass 21, count 2 2006.229.07:29:02.82#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:02.82#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:02.82#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.07:29:02.82#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:02.82#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:02.94#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:02.94#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:02.94#ibcon#enter wrdev, iclass 21, count 0 2006.229.07:29:02.94#ibcon#first serial, iclass 21, count 0 2006.229.07:29:02.94#ibcon#enter sib2, iclass 21, count 0 2006.229.07:29:02.94#ibcon#flushed, iclass 21, count 0 2006.229.07:29:02.94#ibcon#about to write, iclass 21, count 0 2006.229.07:29:02.94#ibcon#wrote, iclass 21, count 0 2006.229.07:29:02.94#ibcon#about to read 3, iclass 21, count 0 2006.229.07:29:02.96#ibcon#read 3, iclass 21, count 0 2006.229.07:29:02.96#ibcon#about to read 4, iclass 21, count 0 2006.229.07:29:02.96#ibcon#read 4, iclass 21, count 0 2006.229.07:29:02.96#ibcon#about to read 5, iclass 21, count 0 2006.229.07:29:02.96#ibcon#read 5, iclass 21, count 0 2006.229.07:29:02.96#ibcon#about to read 6, iclass 21, count 0 2006.229.07:29:02.96#ibcon#read 6, iclass 21, count 0 2006.229.07:29:02.96#ibcon#end of sib2, iclass 21, count 0 2006.229.07:29:02.96#ibcon#*mode == 0, iclass 21, count 0 2006.229.07:29:02.96#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.07:29:02.96#ibcon#[25=USB\r\n] 2006.229.07:29:02.96#ibcon#*before write, iclass 21, count 0 2006.229.07:29:02.96#ibcon#enter sib2, iclass 21, count 0 2006.229.07:29:02.96#ibcon#flushed, iclass 21, count 0 2006.229.07:29:02.96#ibcon#about to write, iclass 21, count 0 2006.229.07:29:02.96#ibcon#wrote, iclass 21, count 0 2006.229.07:29:02.96#ibcon#about to read 3, iclass 21, count 0 2006.229.07:29:02.99#ibcon#read 3, iclass 21, count 0 2006.229.07:29:02.99#ibcon#about to read 4, iclass 21, count 0 2006.229.07:29:02.99#ibcon#read 4, iclass 21, count 0 2006.229.07:29:02.99#ibcon#about to read 5, iclass 21, count 0 2006.229.07:29:02.99#ibcon#read 5, iclass 21, count 0 2006.229.07:29:02.99#ibcon#about to read 6, iclass 21, count 0 2006.229.07:29:02.99#ibcon#read 6, iclass 21, count 0 2006.229.07:29:02.99#ibcon#end of sib2, iclass 21, count 0 2006.229.07:29:02.99#ibcon#*after write, iclass 21, count 0 2006.229.07:29:02.99#ibcon#*before return 0, iclass 21, count 0 2006.229.07:29:02.99#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:02.99#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:02.99#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.07:29:02.99#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.07:29:02.99$vck44/valo=6,814.99 2006.229.07:29:02.99#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.07:29:02.99#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.07:29:02.99#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:02.99#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:03.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:03.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:03.00#ibcon#enter wrdev, iclass 23, count 0 2006.229.07:29:03.00#ibcon#first serial, iclass 23, count 0 2006.229.07:29:03.00#ibcon#enter sib2, iclass 23, count 0 2006.229.07:29:03.00#ibcon#flushed, iclass 23, count 0 2006.229.07:29:03.00#ibcon#about to write, iclass 23, count 0 2006.229.07:29:03.00#ibcon#wrote, iclass 23, count 0 2006.229.07:29:03.00#ibcon#about to read 3, iclass 23, count 0 2006.229.07:29:03.01#ibcon#read 3, iclass 23, count 0 2006.229.07:29:03.01#ibcon#about to read 4, iclass 23, count 0 2006.229.07:29:03.01#ibcon#read 4, iclass 23, count 0 2006.229.07:29:03.01#ibcon#about to read 5, iclass 23, count 0 2006.229.07:29:03.01#ibcon#read 5, iclass 23, count 0 2006.229.07:29:03.01#ibcon#about to read 6, iclass 23, count 0 2006.229.07:29:03.01#ibcon#read 6, iclass 23, count 0 2006.229.07:29:03.01#ibcon#end of sib2, iclass 23, count 0 2006.229.07:29:03.01#ibcon#*mode == 0, iclass 23, count 0 2006.229.07:29:03.01#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.07:29:03.01#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:29:03.01#ibcon#*before write, iclass 23, count 0 2006.229.07:29:03.01#ibcon#enter sib2, iclass 23, count 0 2006.229.07:29:03.01#ibcon#flushed, iclass 23, count 0 2006.229.07:29:03.01#ibcon#about to write, iclass 23, count 0 2006.229.07:29:03.01#ibcon#wrote, iclass 23, count 0 2006.229.07:29:03.01#ibcon#about to read 3, iclass 23, count 0 2006.229.07:29:03.05#ibcon#read 3, iclass 23, count 0 2006.229.07:29:03.05#ibcon#about to read 4, iclass 23, count 0 2006.229.07:29:03.05#ibcon#read 4, iclass 23, count 0 2006.229.07:29:03.05#ibcon#about to read 5, iclass 23, count 0 2006.229.07:29:03.05#ibcon#read 5, iclass 23, count 0 2006.229.07:29:03.05#ibcon#about to read 6, iclass 23, count 0 2006.229.07:29:03.05#ibcon#read 6, iclass 23, count 0 2006.229.07:29:03.05#ibcon#end of sib2, iclass 23, count 0 2006.229.07:29:03.05#ibcon#*after write, iclass 23, count 0 2006.229.07:29:03.05#ibcon#*before return 0, iclass 23, count 0 2006.229.07:29:03.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:03.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:03.05#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.07:29:03.05#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.07:29:03.06$vck44/va=6,4 2006.229.07:29:03.06#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.07:29:03.06#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.07:29:03.06#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:03.06#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:03.10#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:03.10#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:03.10#ibcon#enter wrdev, iclass 25, count 2 2006.229.07:29:03.10#ibcon#first serial, iclass 25, count 2 2006.229.07:29:03.10#ibcon#enter sib2, iclass 25, count 2 2006.229.07:29:03.10#ibcon#flushed, iclass 25, count 2 2006.229.07:29:03.10#ibcon#about to write, iclass 25, count 2 2006.229.07:29:03.10#ibcon#wrote, iclass 25, count 2 2006.229.07:29:03.10#ibcon#about to read 3, iclass 25, count 2 2006.229.07:29:03.12#ibcon#read 3, iclass 25, count 2 2006.229.07:29:03.12#ibcon#about to read 4, iclass 25, count 2 2006.229.07:29:03.12#ibcon#read 4, iclass 25, count 2 2006.229.07:29:03.12#ibcon#about to read 5, iclass 25, count 2 2006.229.07:29:03.12#ibcon#read 5, iclass 25, count 2 2006.229.07:29:03.12#ibcon#about to read 6, iclass 25, count 2 2006.229.07:29:03.12#ibcon#read 6, iclass 25, count 2 2006.229.07:29:03.12#ibcon#end of sib2, iclass 25, count 2 2006.229.07:29:03.12#ibcon#*mode == 0, iclass 25, count 2 2006.229.07:29:03.12#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.07:29:03.12#ibcon#[25=AT06-04\r\n] 2006.229.07:29:03.12#ibcon#*before write, iclass 25, count 2 2006.229.07:29:03.12#ibcon#enter sib2, iclass 25, count 2 2006.229.07:29:03.12#ibcon#flushed, iclass 25, count 2 2006.229.07:29:03.12#ibcon#about to write, iclass 25, count 2 2006.229.07:29:03.12#ibcon#wrote, iclass 25, count 2 2006.229.07:29:03.12#ibcon#about to read 3, iclass 25, count 2 2006.229.07:29:03.15#ibcon#read 3, iclass 25, count 2 2006.229.07:29:03.15#ibcon#about to read 4, iclass 25, count 2 2006.229.07:29:03.15#ibcon#read 4, iclass 25, count 2 2006.229.07:29:03.15#ibcon#about to read 5, iclass 25, count 2 2006.229.07:29:03.15#ibcon#read 5, iclass 25, count 2 2006.229.07:29:03.15#ibcon#about to read 6, iclass 25, count 2 2006.229.07:29:03.15#ibcon#read 6, iclass 25, count 2 2006.229.07:29:03.15#ibcon#end of sib2, iclass 25, count 2 2006.229.07:29:03.15#ibcon#*after write, iclass 25, count 2 2006.229.07:29:03.15#ibcon#*before return 0, iclass 25, count 2 2006.229.07:29:03.15#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:03.15#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:03.15#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.07:29:03.15#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:03.15#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:03.27#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:03.27#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:03.27#ibcon#enter wrdev, iclass 25, count 0 2006.229.07:29:03.27#ibcon#first serial, iclass 25, count 0 2006.229.07:29:03.27#ibcon#enter sib2, iclass 25, count 0 2006.229.07:29:03.27#ibcon#flushed, iclass 25, count 0 2006.229.07:29:03.27#ibcon#about to write, iclass 25, count 0 2006.229.07:29:03.27#ibcon#wrote, iclass 25, count 0 2006.229.07:29:03.27#ibcon#about to read 3, iclass 25, count 0 2006.229.07:29:03.29#ibcon#read 3, iclass 25, count 0 2006.229.07:29:03.29#ibcon#about to read 4, iclass 25, count 0 2006.229.07:29:03.29#ibcon#read 4, iclass 25, count 0 2006.229.07:29:03.29#ibcon#about to read 5, iclass 25, count 0 2006.229.07:29:03.29#ibcon#read 5, iclass 25, count 0 2006.229.07:29:03.29#ibcon#about to read 6, iclass 25, count 0 2006.229.07:29:03.29#ibcon#read 6, iclass 25, count 0 2006.229.07:29:03.29#ibcon#end of sib2, iclass 25, count 0 2006.229.07:29:03.29#ibcon#*mode == 0, iclass 25, count 0 2006.229.07:29:03.29#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.07:29:03.29#ibcon#[25=USB\r\n] 2006.229.07:29:03.29#ibcon#*before write, iclass 25, count 0 2006.229.07:29:03.29#ibcon#enter sib2, iclass 25, count 0 2006.229.07:29:03.29#ibcon#flushed, iclass 25, count 0 2006.229.07:29:03.29#ibcon#about to write, iclass 25, count 0 2006.229.07:29:03.29#ibcon#wrote, iclass 25, count 0 2006.229.07:29:03.29#ibcon#about to read 3, iclass 25, count 0 2006.229.07:29:03.32#ibcon#read 3, iclass 25, count 0 2006.229.07:29:03.32#ibcon#about to read 4, iclass 25, count 0 2006.229.07:29:03.32#ibcon#read 4, iclass 25, count 0 2006.229.07:29:03.32#ibcon#about to read 5, iclass 25, count 0 2006.229.07:29:03.32#ibcon#read 5, iclass 25, count 0 2006.229.07:29:03.32#ibcon#about to read 6, iclass 25, count 0 2006.229.07:29:03.32#ibcon#read 6, iclass 25, count 0 2006.229.07:29:03.32#ibcon#end of sib2, iclass 25, count 0 2006.229.07:29:03.32#ibcon#*after write, iclass 25, count 0 2006.229.07:29:03.32#ibcon#*before return 0, iclass 25, count 0 2006.229.07:29:03.32#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:03.32#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:03.32#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.07:29:03.32#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.07:29:03.32$vck44/valo=7,864.99 2006.229.07:29:03.33#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.07:29:03.33#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.07:29:03.33#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:03.33#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:03.33#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:03.33#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:03.33#ibcon#enter wrdev, iclass 27, count 0 2006.229.07:29:03.33#ibcon#first serial, iclass 27, count 0 2006.229.07:29:03.33#ibcon#enter sib2, iclass 27, count 0 2006.229.07:29:03.33#ibcon#flushed, iclass 27, count 0 2006.229.07:29:03.33#ibcon#about to write, iclass 27, count 0 2006.229.07:29:03.33#ibcon#wrote, iclass 27, count 0 2006.229.07:29:03.33#ibcon#about to read 3, iclass 27, count 0 2006.229.07:29:03.34#ibcon#read 3, iclass 27, count 0 2006.229.07:29:03.34#ibcon#about to read 4, iclass 27, count 0 2006.229.07:29:03.34#ibcon#read 4, iclass 27, count 0 2006.229.07:29:03.34#ibcon#about to read 5, iclass 27, count 0 2006.229.07:29:03.34#ibcon#read 5, iclass 27, count 0 2006.229.07:29:03.34#ibcon#about to read 6, iclass 27, count 0 2006.229.07:29:03.34#ibcon#read 6, iclass 27, count 0 2006.229.07:29:03.34#ibcon#end of sib2, iclass 27, count 0 2006.229.07:29:03.34#ibcon#*mode == 0, iclass 27, count 0 2006.229.07:29:03.34#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.07:29:03.34#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:29:03.34#ibcon#*before write, iclass 27, count 0 2006.229.07:29:03.34#ibcon#enter sib2, iclass 27, count 0 2006.229.07:29:03.34#ibcon#flushed, iclass 27, count 0 2006.229.07:29:03.34#ibcon#about to write, iclass 27, count 0 2006.229.07:29:03.34#ibcon#wrote, iclass 27, count 0 2006.229.07:29:03.34#ibcon#about to read 3, iclass 27, count 0 2006.229.07:29:03.38#ibcon#read 3, iclass 27, count 0 2006.229.07:29:03.38#ibcon#about to read 4, iclass 27, count 0 2006.229.07:29:03.38#ibcon#read 4, iclass 27, count 0 2006.229.07:29:03.38#ibcon#about to read 5, iclass 27, count 0 2006.229.07:29:03.38#ibcon#read 5, iclass 27, count 0 2006.229.07:29:03.38#ibcon#about to read 6, iclass 27, count 0 2006.229.07:29:03.38#ibcon#read 6, iclass 27, count 0 2006.229.07:29:03.38#ibcon#end of sib2, iclass 27, count 0 2006.229.07:29:03.38#ibcon#*after write, iclass 27, count 0 2006.229.07:29:03.38#ibcon#*before return 0, iclass 27, count 0 2006.229.07:29:03.38#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:03.38#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:03.38#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.07:29:03.38#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.07:29:03.38$vck44/va=7,5 2006.229.07:29:03.39#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.07:29:03.39#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.07:29:03.39#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:03.39#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:03.43#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:03.43#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:03.43#ibcon#enter wrdev, iclass 29, count 2 2006.229.07:29:03.43#ibcon#first serial, iclass 29, count 2 2006.229.07:29:03.43#ibcon#enter sib2, iclass 29, count 2 2006.229.07:29:03.43#ibcon#flushed, iclass 29, count 2 2006.229.07:29:03.43#ibcon#about to write, iclass 29, count 2 2006.229.07:29:03.43#ibcon#wrote, iclass 29, count 2 2006.229.07:29:03.43#ibcon#about to read 3, iclass 29, count 2 2006.229.07:29:03.45#ibcon#read 3, iclass 29, count 2 2006.229.07:29:03.45#ibcon#about to read 4, iclass 29, count 2 2006.229.07:29:03.45#ibcon#read 4, iclass 29, count 2 2006.229.07:29:03.45#ibcon#about to read 5, iclass 29, count 2 2006.229.07:29:03.45#ibcon#read 5, iclass 29, count 2 2006.229.07:29:03.45#ibcon#about to read 6, iclass 29, count 2 2006.229.07:29:03.45#ibcon#read 6, iclass 29, count 2 2006.229.07:29:03.45#ibcon#end of sib2, iclass 29, count 2 2006.229.07:29:03.45#ibcon#*mode == 0, iclass 29, count 2 2006.229.07:29:03.45#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.07:29:03.45#ibcon#[25=AT07-05\r\n] 2006.229.07:29:03.45#ibcon#*before write, iclass 29, count 2 2006.229.07:29:03.45#ibcon#enter sib2, iclass 29, count 2 2006.229.07:29:03.45#ibcon#flushed, iclass 29, count 2 2006.229.07:29:03.45#ibcon#about to write, iclass 29, count 2 2006.229.07:29:03.45#ibcon#wrote, iclass 29, count 2 2006.229.07:29:03.45#ibcon#about to read 3, iclass 29, count 2 2006.229.07:29:03.48#ibcon#read 3, iclass 29, count 2 2006.229.07:29:03.48#ibcon#about to read 4, iclass 29, count 2 2006.229.07:29:03.48#ibcon#read 4, iclass 29, count 2 2006.229.07:29:03.48#ibcon#about to read 5, iclass 29, count 2 2006.229.07:29:03.48#ibcon#read 5, iclass 29, count 2 2006.229.07:29:03.48#ibcon#about to read 6, iclass 29, count 2 2006.229.07:29:03.48#ibcon#read 6, iclass 29, count 2 2006.229.07:29:03.48#ibcon#end of sib2, iclass 29, count 2 2006.229.07:29:03.48#ibcon#*after write, iclass 29, count 2 2006.229.07:29:03.48#ibcon#*before return 0, iclass 29, count 2 2006.229.07:29:03.48#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:03.48#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:03.48#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.07:29:03.48#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:03.48#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:03.60#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:03.60#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:03.60#ibcon#enter wrdev, iclass 29, count 0 2006.229.07:29:03.60#ibcon#first serial, iclass 29, count 0 2006.229.07:29:03.60#ibcon#enter sib2, iclass 29, count 0 2006.229.07:29:03.60#ibcon#flushed, iclass 29, count 0 2006.229.07:29:03.60#ibcon#about to write, iclass 29, count 0 2006.229.07:29:03.60#ibcon#wrote, iclass 29, count 0 2006.229.07:29:03.60#ibcon#about to read 3, iclass 29, count 0 2006.229.07:29:03.62#ibcon#read 3, iclass 29, count 0 2006.229.07:29:03.62#ibcon#about to read 4, iclass 29, count 0 2006.229.07:29:03.62#ibcon#read 4, iclass 29, count 0 2006.229.07:29:03.62#ibcon#about to read 5, iclass 29, count 0 2006.229.07:29:03.62#ibcon#read 5, iclass 29, count 0 2006.229.07:29:03.62#ibcon#about to read 6, iclass 29, count 0 2006.229.07:29:03.62#ibcon#read 6, iclass 29, count 0 2006.229.07:29:03.62#ibcon#end of sib2, iclass 29, count 0 2006.229.07:29:03.62#ibcon#*mode == 0, iclass 29, count 0 2006.229.07:29:03.62#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.07:29:03.62#ibcon#[25=USB\r\n] 2006.229.07:29:03.62#ibcon#*before write, iclass 29, count 0 2006.229.07:29:03.62#ibcon#enter sib2, iclass 29, count 0 2006.229.07:29:03.62#ibcon#flushed, iclass 29, count 0 2006.229.07:29:03.62#ibcon#about to write, iclass 29, count 0 2006.229.07:29:03.62#ibcon#wrote, iclass 29, count 0 2006.229.07:29:03.62#ibcon#about to read 3, iclass 29, count 0 2006.229.07:29:03.65#ibcon#read 3, iclass 29, count 0 2006.229.07:29:03.65#ibcon#about to read 4, iclass 29, count 0 2006.229.07:29:03.65#ibcon#read 4, iclass 29, count 0 2006.229.07:29:03.65#ibcon#about to read 5, iclass 29, count 0 2006.229.07:29:03.65#ibcon#read 5, iclass 29, count 0 2006.229.07:29:03.65#ibcon#about to read 6, iclass 29, count 0 2006.229.07:29:03.65#ibcon#read 6, iclass 29, count 0 2006.229.07:29:03.65#ibcon#end of sib2, iclass 29, count 0 2006.229.07:29:03.65#ibcon#*after write, iclass 29, count 0 2006.229.07:29:03.65#ibcon#*before return 0, iclass 29, count 0 2006.229.07:29:03.65#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:03.65#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:03.65#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.07:29:03.65#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.07:29:03.65$vck44/valo=8,884.99 2006.229.07:29:03.66#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.07:29:03.66#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.07:29:03.66#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:03.66#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:03.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:03.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:03.66#ibcon#enter wrdev, iclass 31, count 0 2006.229.07:29:03.66#ibcon#first serial, iclass 31, count 0 2006.229.07:29:03.66#ibcon#enter sib2, iclass 31, count 0 2006.229.07:29:03.66#ibcon#flushed, iclass 31, count 0 2006.229.07:29:03.66#ibcon#about to write, iclass 31, count 0 2006.229.07:29:03.66#ibcon#wrote, iclass 31, count 0 2006.229.07:29:03.66#ibcon#about to read 3, iclass 31, count 0 2006.229.07:29:03.67#ibcon#read 3, iclass 31, count 0 2006.229.07:29:03.67#ibcon#about to read 4, iclass 31, count 0 2006.229.07:29:03.67#ibcon#read 4, iclass 31, count 0 2006.229.07:29:03.67#ibcon#about to read 5, iclass 31, count 0 2006.229.07:29:03.67#ibcon#read 5, iclass 31, count 0 2006.229.07:29:03.67#ibcon#about to read 6, iclass 31, count 0 2006.229.07:29:03.67#ibcon#read 6, iclass 31, count 0 2006.229.07:29:03.67#ibcon#end of sib2, iclass 31, count 0 2006.229.07:29:03.67#ibcon#*mode == 0, iclass 31, count 0 2006.229.07:29:03.67#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.07:29:03.67#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:29:03.67#ibcon#*before write, iclass 31, count 0 2006.229.07:29:03.67#ibcon#enter sib2, iclass 31, count 0 2006.229.07:29:03.67#ibcon#flushed, iclass 31, count 0 2006.229.07:29:03.67#ibcon#about to write, iclass 31, count 0 2006.229.07:29:03.67#ibcon#wrote, iclass 31, count 0 2006.229.07:29:03.67#ibcon#about to read 3, iclass 31, count 0 2006.229.07:29:03.71#ibcon#read 3, iclass 31, count 0 2006.229.07:29:03.71#ibcon#about to read 4, iclass 31, count 0 2006.229.07:29:03.71#ibcon#read 4, iclass 31, count 0 2006.229.07:29:03.71#ibcon#about to read 5, iclass 31, count 0 2006.229.07:29:03.71#ibcon#read 5, iclass 31, count 0 2006.229.07:29:03.71#ibcon#about to read 6, iclass 31, count 0 2006.229.07:29:03.71#ibcon#read 6, iclass 31, count 0 2006.229.07:29:03.71#ibcon#end of sib2, iclass 31, count 0 2006.229.07:29:03.71#ibcon#*after write, iclass 31, count 0 2006.229.07:29:03.71#ibcon#*before return 0, iclass 31, count 0 2006.229.07:29:03.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:03.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:03.71#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.07:29:03.71#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.07:29:03.71$vck44/va=8,6 2006.229.07:29:03.72#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.07:29:03.72#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.07:29:03.72#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:03.72#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.07:29:03.76#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.07:29:03.76#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.07:29:03.76#ibcon#enter wrdev, iclass 33, count 2 2006.229.07:29:03.76#ibcon#first serial, iclass 33, count 2 2006.229.07:29:03.76#ibcon#enter sib2, iclass 33, count 2 2006.229.07:29:03.76#ibcon#flushed, iclass 33, count 2 2006.229.07:29:03.76#ibcon#about to write, iclass 33, count 2 2006.229.07:29:03.76#ibcon#wrote, iclass 33, count 2 2006.229.07:29:03.76#ibcon#about to read 3, iclass 33, count 2 2006.229.07:29:03.78#ibcon#read 3, iclass 33, count 2 2006.229.07:29:03.78#ibcon#about to read 4, iclass 33, count 2 2006.229.07:29:03.78#ibcon#read 4, iclass 33, count 2 2006.229.07:29:03.78#ibcon#about to read 5, iclass 33, count 2 2006.229.07:29:03.78#ibcon#read 5, iclass 33, count 2 2006.229.07:29:03.78#ibcon#about to read 6, iclass 33, count 2 2006.229.07:29:03.78#ibcon#read 6, iclass 33, count 2 2006.229.07:29:03.78#ibcon#end of sib2, iclass 33, count 2 2006.229.07:29:03.78#ibcon#*mode == 0, iclass 33, count 2 2006.229.07:29:03.78#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.07:29:03.78#ibcon#[25=AT08-06\r\n] 2006.229.07:29:03.78#ibcon#*before write, iclass 33, count 2 2006.229.07:29:03.78#ibcon#enter sib2, iclass 33, count 2 2006.229.07:29:03.78#ibcon#flushed, iclass 33, count 2 2006.229.07:29:03.78#ibcon#about to write, iclass 33, count 2 2006.229.07:29:03.78#ibcon#wrote, iclass 33, count 2 2006.229.07:29:03.78#ibcon#about to read 3, iclass 33, count 2 2006.229.07:29:03.81#ibcon#read 3, iclass 33, count 2 2006.229.07:29:03.81#ibcon#about to read 4, iclass 33, count 2 2006.229.07:29:03.81#ibcon#read 4, iclass 33, count 2 2006.229.07:29:03.81#ibcon#about to read 5, iclass 33, count 2 2006.229.07:29:03.81#ibcon#read 5, iclass 33, count 2 2006.229.07:29:03.81#ibcon#about to read 6, iclass 33, count 2 2006.229.07:29:03.81#ibcon#read 6, iclass 33, count 2 2006.229.07:29:03.81#ibcon#end of sib2, iclass 33, count 2 2006.229.07:29:03.81#ibcon#*after write, iclass 33, count 2 2006.229.07:29:03.81#ibcon#*before return 0, iclass 33, count 2 2006.229.07:29:03.81#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.07:29:03.81#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.07:29:03.81#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.07:29:03.81#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:03.81#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.07:29:03.93#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.07:29:03.93#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.07:29:03.93#ibcon#enter wrdev, iclass 33, count 0 2006.229.07:29:03.93#ibcon#first serial, iclass 33, count 0 2006.229.07:29:03.93#ibcon#enter sib2, iclass 33, count 0 2006.229.07:29:03.93#ibcon#flushed, iclass 33, count 0 2006.229.07:29:03.93#ibcon#about to write, iclass 33, count 0 2006.229.07:29:03.93#ibcon#wrote, iclass 33, count 0 2006.229.07:29:03.93#ibcon#about to read 3, iclass 33, count 0 2006.229.07:29:03.95#ibcon#read 3, iclass 33, count 0 2006.229.07:29:03.95#ibcon#about to read 4, iclass 33, count 0 2006.229.07:29:03.95#ibcon#read 4, iclass 33, count 0 2006.229.07:29:03.95#ibcon#about to read 5, iclass 33, count 0 2006.229.07:29:03.95#ibcon#read 5, iclass 33, count 0 2006.229.07:29:03.95#ibcon#about to read 6, iclass 33, count 0 2006.229.07:29:03.95#ibcon#read 6, iclass 33, count 0 2006.229.07:29:03.95#ibcon#end of sib2, iclass 33, count 0 2006.229.07:29:03.95#ibcon#*mode == 0, iclass 33, count 0 2006.229.07:29:03.95#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.07:29:03.95#ibcon#[25=USB\r\n] 2006.229.07:29:03.95#ibcon#*before write, iclass 33, count 0 2006.229.07:29:03.95#ibcon#enter sib2, iclass 33, count 0 2006.229.07:29:03.95#ibcon#flushed, iclass 33, count 0 2006.229.07:29:03.95#ibcon#about to write, iclass 33, count 0 2006.229.07:29:03.95#ibcon#wrote, iclass 33, count 0 2006.229.07:29:03.95#ibcon#about to read 3, iclass 33, count 0 2006.229.07:29:03.98#ibcon#read 3, iclass 33, count 0 2006.229.07:29:03.98#ibcon#about to read 4, iclass 33, count 0 2006.229.07:29:03.98#ibcon#read 4, iclass 33, count 0 2006.229.07:29:03.98#ibcon#about to read 5, iclass 33, count 0 2006.229.07:29:03.98#ibcon#read 5, iclass 33, count 0 2006.229.07:29:03.98#ibcon#about to read 6, iclass 33, count 0 2006.229.07:29:03.98#ibcon#read 6, iclass 33, count 0 2006.229.07:29:03.98#ibcon#end of sib2, iclass 33, count 0 2006.229.07:29:03.98#ibcon#*after write, iclass 33, count 0 2006.229.07:29:03.98#ibcon#*before return 0, iclass 33, count 0 2006.229.07:29:03.98#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.07:29:03.98#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.07:29:03.98#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.07:29:03.98#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.07:29:03.98$vck44/vblo=1,629.99 2006.229.07:29:03.99#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.07:29:03.99#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.07:29:03.99#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:03.99#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.07:29:03.99#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.07:29:03.99#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.07:29:03.99#ibcon#enter wrdev, iclass 35, count 0 2006.229.07:29:03.99#ibcon#first serial, iclass 35, count 0 2006.229.07:29:03.99#ibcon#enter sib2, iclass 35, count 0 2006.229.07:29:03.99#ibcon#flushed, iclass 35, count 0 2006.229.07:29:03.99#ibcon#about to write, iclass 35, count 0 2006.229.07:29:03.99#ibcon#wrote, iclass 35, count 0 2006.229.07:29:03.99#ibcon#about to read 3, iclass 35, count 0 2006.229.07:29:04.00#ibcon#read 3, iclass 35, count 0 2006.229.07:29:04.00#ibcon#about to read 4, iclass 35, count 0 2006.229.07:29:04.00#ibcon#read 4, iclass 35, count 0 2006.229.07:29:04.00#ibcon#about to read 5, iclass 35, count 0 2006.229.07:29:04.00#ibcon#read 5, iclass 35, count 0 2006.229.07:29:04.00#ibcon#about to read 6, iclass 35, count 0 2006.229.07:29:04.00#ibcon#read 6, iclass 35, count 0 2006.229.07:29:04.00#ibcon#end of sib2, iclass 35, count 0 2006.229.07:29:04.00#ibcon#*mode == 0, iclass 35, count 0 2006.229.07:29:04.00#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.07:29:04.00#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:29:04.00#ibcon#*before write, iclass 35, count 0 2006.229.07:29:04.00#ibcon#enter sib2, iclass 35, count 0 2006.229.07:29:04.00#ibcon#flushed, iclass 35, count 0 2006.229.07:29:04.00#ibcon#about to write, iclass 35, count 0 2006.229.07:29:04.00#ibcon#wrote, iclass 35, count 0 2006.229.07:29:04.00#ibcon#about to read 3, iclass 35, count 0 2006.229.07:29:04.04#ibcon#read 3, iclass 35, count 0 2006.229.07:29:04.04#ibcon#about to read 4, iclass 35, count 0 2006.229.07:29:04.04#ibcon#read 4, iclass 35, count 0 2006.229.07:29:04.04#ibcon#about to read 5, iclass 35, count 0 2006.229.07:29:04.04#ibcon#read 5, iclass 35, count 0 2006.229.07:29:04.04#ibcon#about to read 6, iclass 35, count 0 2006.229.07:29:04.04#ibcon#read 6, iclass 35, count 0 2006.229.07:29:04.04#ibcon#end of sib2, iclass 35, count 0 2006.229.07:29:04.04#ibcon#*after write, iclass 35, count 0 2006.229.07:29:04.04#ibcon#*before return 0, iclass 35, count 0 2006.229.07:29:04.04#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.07:29:04.04#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.07:29:04.04#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.07:29:04.04#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.07:29:04.04$vck44/vb=1,4 2006.229.07:29:04.04#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.07:29:04.05#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.07:29:04.05#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:04.05#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.07:29:04.05#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.07:29:04.05#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.07:29:04.05#ibcon#enter wrdev, iclass 37, count 2 2006.229.07:29:04.05#ibcon#first serial, iclass 37, count 2 2006.229.07:29:04.05#ibcon#enter sib2, iclass 37, count 2 2006.229.07:29:04.05#ibcon#flushed, iclass 37, count 2 2006.229.07:29:04.05#ibcon#about to write, iclass 37, count 2 2006.229.07:29:04.05#ibcon#wrote, iclass 37, count 2 2006.229.07:29:04.05#ibcon#about to read 3, iclass 37, count 2 2006.229.07:29:04.06#ibcon#read 3, iclass 37, count 2 2006.229.07:29:04.06#ibcon#about to read 4, iclass 37, count 2 2006.229.07:29:04.06#ibcon#read 4, iclass 37, count 2 2006.229.07:29:04.06#ibcon#about to read 5, iclass 37, count 2 2006.229.07:29:04.06#ibcon#read 5, iclass 37, count 2 2006.229.07:29:04.06#ibcon#about to read 6, iclass 37, count 2 2006.229.07:29:04.06#ibcon#read 6, iclass 37, count 2 2006.229.07:29:04.06#ibcon#end of sib2, iclass 37, count 2 2006.229.07:29:04.06#ibcon#*mode == 0, iclass 37, count 2 2006.229.07:29:04.06#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.07:29:04.06#ibcon#[27=AT01-04\r\n] 2006.229.07:29:04.06#ibcon#*before write, iclass 37, count 2 2006.229.07:29:04.06#ibcon#enter sib2, iclass 37, count 2 2006.229.07:29:04.06#ibcon#flushed, iclass 37, count 2 2006.229.07:29:04.06#ibcon#about to write, iclass 37, count 2 2006.229.07:29:04.06#ibcon#wrote, iclass 37, count 2 2006.229.07:29:04.06#ibcon#about to read 3, iclass 37, count 2 2006.229.07:29:04.09#ibcon#read 3, iclass 37, count 2 2006.229.07:29:04.09#ibcon#about to read 4, iclass 37, count 2 2006.229.07:29:04.09#ibcon#read 4, iclass 37, count 2 2006.229.07:29:04.09#ibcon#about to read 5, iclass 37, count 2 2006.229.07:29:04.09#ibcon#read 5, iclass 37, count 2 2006.229.07:29:04.09#ibcon#about to read 6, iclass 37, count 2 2006.229.07:29:04.09#ibcon#read 6, iclass 37, count 2 2006.229.07:29:04.09#ibcon#end of sib2, iclass 37, count 2 2006.229.07:29:04.09#ibcon#*after write, iclass 37, count 2 2006.229.07:29:04.09#ibcon#*before return 0, iclass 37, count 2 2006.229.07:29:04.09#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.07:29:04.09#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.07:29:04.09#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.07:29:04.09#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:04.09#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.07:29:04.21#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.07:29:04.21#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.07:29:04.21#ibcon#enter wrdev, iclass 37, count 0 2006.229.07:29:04.21#ibcon#first serial, iclass 37, count 0 2006.229.07:29:04.21#ibcon#enter sib2, iclass 37, count 0 2006.229.07:29:04.21#ibcon#flushed, iclass 37, count 0 2006.229.07:29:04.21#ibcon#about to write, iclass 37, count 0 2006.229.07:29:04.21#ibcon#wrote, iclass 37, count 0 2006.229.07:29:04.21#ibcon#about to read 3, iclass 37, count 0 2006.229.07:29:04.23#ibcon#read 3, iclass 37, count 0 2006.229.07:29:04.23#ibcon#about to read 4, iclass 37, count 0 2006.229.07:29:04.23#ibcon#read 4, iclass 37, count 0 2006.229.07:29:04.23#ibcon#about to read 5, iclass 37, count 0 2006.229.07:29:04.23#ibcon#read 5, iclass 37, count 0 2006.229.07:29:04.23#ibcon#about to read 6, iclass 37, count 0 2006.229.07:29:04.23#ibcon#read 6, iclass 37, count 0 2006.229.07:29:04.23#ibcon#end of sib2, iclass 37, count 0 2006.229.07:29:04.23#ibcon#*mode == 0, iclass 37, count 0 2006.229.07:29:04.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.07:29:04.23#ibcon#[27=USB\r\n] 2006.229.07:29:04.23#ibcon#*before write, iclass 37, count 0 2006.229.07:29:04.23#ibcon#enter sib2, iclass 37, count 0 2006.229.07:29:04.23#ibcon#flushed, iclass 37, count 0 2006.229.07:29:04.23#ibcon#about to write, iclass 37, count 0 2006.229.07:29:04.23#ibcon#wrote, iclass 37, count 0 2006.229.07:29:04.23#ibcon#about to read 3, iclass 37, count 0 2006.229.07:29:04.26#ibcon#read 3, iclass 37, count 0 2006.229.07:29:04.26#ibcon#about to read 4, iclass 37, count 0 2006.229.07:29:04.26#ibcon#read 4, iclass 37, count 0 2006.229.07:29:04.26#ibcon#about to read 5, iclass 37, count 0 2006.229.07:29:04.26#ibcon#read 5, iclass 37, count 0 2006.229.07:29:04.26#ibcon#about to read 6, iclass 37, count 0 2006.229.07:29:04.26#ibcon#read 6, iclass 37, count 0 2006.229.07:29:04.26#ibcon#end of sib2, iclass 37, count 0 2006.229.07:29:04.26#ibcon#*after write, iclass 37, count 0 2006.229.07:29:04.26#ibcon#*before return 0, iclass 37, count 0 2006.229.07:29:04.26#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.07:29:04.26#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.07:29:04.26#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.07:29:04.26#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.07:29:04.26$vck44/vblo=2,634.99 2006.229.07:29:04.26#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.07:29:04.27#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.07:29:04.27#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:04.27#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:04.27#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:04.27#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:04.27#ibcon#enter wrdev, iclass 39, count 0 2006.229.07:29:04.27#ibcon#first serial, iclass 39, count 0 2006.229.07:29:04.27#ibcon#enter sib2, iclass 39, count 0 2006.229.07:29:04.27#ibcon#flushed, iclass 39, count 0 2006.229.07:29:04.27#ibcon#about to write, iclass 39, count 0 2006.229.07:29:04.27#ibcon#wrote, iclass 39, count 0 2006.229.07:29:04.27#ibcon#about to read 3, iclass 39, count 0 2006.229.07:29:04.28#ibcon#read 3, iclass 39, count 0 2006.229.07:29:04.28#ibcon#about to read 4, iclass 39, count 0 2006.229.07:29:04.28#ibcon#read 4, iclass 39, count 0 2006.229.07:29:04.28#ibcon#about to read 5, iclass 39, count 0 2006.229.07:29:04.28#ibcon#read 5, iclass 39, count 0 2006.229.07:29:04.28#ibcon#about to read 6, iclass 39, count 0 2006.229.07:29:04.28#ibcon#read 6, iclass 39, count 0 2006.229.07:29:04.28#ibcon#end of sib2, iclass 39, count 0 2006.229.07:29:04.28#ibcon#*mode == 0, iclass 39, count 0 2006.229.07:29:04.28#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.07:29:04.28#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:29:04.28#ibcon#*before write, iclass 39, count 0 2006.229.07:29:04.28#ibcon#enter sib2, iclass 39, count 0 2006.229.07:29:04.28#ibcon#flushed, iclass 39, count 0 2006.229.07:29:04.28#ibcon#about to write, iclass 39, count 0 2006.229.07:29:04.28#ibcon#wrote, iclass 39, count 0 2006.229.07:29:04.28#ibcon#about to read 3, iclass 39, count 0 2006.229.07:29:04.32#ibcon#read 3, iclass 39, count 0 2006.229.07:29:04.32#ibcon#about to read 4, iclass 39, count 0 2006.229.07:29:04.32#ibcon#read 4, iclass 39, count 0 2006.229.07:29:04.32#ibcon#about to read 5, iclass 39, count 0 2006.229.07:29:04.32#ibcon#read 5, iclass 39, count 0 2006.229.07:29:04.32#ibcon#about to read 6, iclass 39, count 0 2006.229.07:29:04.32#ibcon#read 6, iclass 39, count 0 2006.229.07:29:04.32#ibcon#end of sib2, iclass 39, count 0 2006.229.07:29:04.32#ibcon#*after write, iclass 39, count 0 2006.229.07:29:04.32#ibcon#*before return 0, iclass 39, count 0 2006.229.07:29:04.32#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:04.32#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.07:29:04.32#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.07:29:04.32#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.07:29:04.32$vck44/vb=2,4 2006.229.07:29:04.32#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.07:29:04.32#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.07:29:04.32#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:04.32#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:04.38#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:04.38#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:04.38#ibcon#enter wrdev, iclass 3, count 2 2006.229.07:29:04.38#ibcon#first serial, iclass 3, count 2 2006.229.07:29:04.38#ibcon#enter sib2, iclass 3, count 2 2006.229.07:29:04.38#ibcon#flushed, iclass 3, count 2 2006.229.07:29:04.38#ibcon#about to write, iclass 3, count 2 2006.229.07:29:04.38#ibcon#wrote, iclass 3, count 2 2006.229.07:29:04.38#ibcon#about to read 3, iclass 3, count 2 2006.229.07:29:04.40#ibcon#read 3, iclass 3, count 2 2006.229.07:29:04.40#ibcon#about to read 4, iclass 3, count 2 2006.229.07:29:04.40#ibcon#read 4, iclass 3, count 2 2006.229.07:29:04.40#ibcon#about to read 5, iclass 3, count 2 2006.229.07:29:04.40#ibcon#read 5, iclass 3, count 2 2006.229.07:29:04.40#ibcon#about to read 6, iclass 3, count 2 2006.229.07:29:04.40#ibcon#read 6, iclass 3, count 2 2006.229.07:29:04.40#ibcon#end of sib2, iclass 3, count 2 2006.229.07:29:04.40#ibcon#*mode == 0, iclass 3, count 2 2006.229.07:29:04.40#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.07:29:04.40#ibcon#[27=AT02-04\r\n] 2006.229.07:29:04.40#ibcon#*before write, iclass 3, count 2 2006.229.07:29:04.40#ibcon#enter sib2, iclass 3, count 2 2006.229.07:29:04.40#ibcon#flushed, iclass 3, count 2 2006.229.07:29:04.40#ibcon#about to write, iclass 3, count 2 2006.229.07:29:04.40#ibcon#wrote, iclass 3, count 2 2006.229.07:29:04.40#ibcon#about to read 3, iclass 3, count 2 2006.229.07:29:04.43#ibcon#read 3, iclass 3, count 2 2006.229.07:29:04.43#ibcon#about to read 4, iclass 3, count 2 2006.229.07:29:04.43#ibcon#read 4, iclass 3, count 2 2006.229.07:29:04.43#ibcon#about to read 5, iclass 3, count 2 2006.229.07:29:04.43#ibcon#read 5, iclass 3, count 2 2006.229.07:29:04.43#ibcon#about to read 6, iclass 3, count 2 2006.229.07:29:04.43#ibcon#read 6, iclass 3, count 2 2006.229.07:29:04.43#ibcon#end of sib2, iclass 3, count 2 2006.229.07:29:04.43#ibcon#*after write, iclass 3, count 2 2006.229.07:29:04.43#ibcon#*before return 0, iclass 3, count 2 2006.229.07:29:04.43#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:04.43#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.07:29:04.43#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.07:29:04.43#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:04.43#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:04.55#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:04.55#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:04.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:29:04.55#ibcon#first serial, iclass 3, count 0 2006.229.07:29:04.55#ibcon#enter sib2, iclass 3, count 0 2006.229.07:29:04.55#ibcon#flushed, iclass 3, count 0 2006.229.07:29:04.55#ibcon#about to write, iclass 3, count 0 2006.229.07:29:04.55#ibcon#wrote, iclass 3, count 0 2006.229.07:29:04.55#ibcon#about to read 3, iclass 3, count 0 2006.229.07:29:04.57#ibcon#read 3, iclass 3, count 0 2006.229.07:29:04.57#ibcon#about to read 4, iclass 3, count 0 2006.229.07:29:04.57#ibcon#read 4, iclass 3, count 0 2006.229.07:29:04.57#ibcon#about to read 5, iclass 3, count 0 2006.229.07:29:04.57#ibcon#read 5, iclass 3, count 0 2006.229.07:29:04.57#ibcon#about to read 6, iclass 3, count 0 2006.229.07:29:04.57#ibcon#read 6, iclass 3, count 0 2006.229.07:29:04.57#ibcon#end of sib2, iclass 3, count 0 2006.229.07:29:04.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:29:04.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:29:04.57#ibcon#[27=USB\r\n] 2006.229.07:29:04.57#ibcon#*before write, iclass 3, count 0 2006.229.07:29:04.57#ibcon#enter sib2, iclass 3, count 0 2006.229.07:29:04.57#ibcon#flushed, iclass 3, count 0 2006.229.07:29:04.57#ibcon#about to write, iclass 3, count 0 2006.229.07:29:04.57#ibcon#wrote, iclass 3, count 0 2006.229.07:29:04.57#ibcon#about to read 3, iclass 3, count 0 2006.229.07:29:04.60#ibcon#read 3, iclass 3, count 0 2006.229.07:29:04.60#ibcon#about to read 4, iclass 3, count 0 2006.229.07:29:04.60#ibcon#read 4, iclass 3, count 0 2006.229.07:29:04.60#ibcon#about to read 5, iclass 3, count 0 2006.229.07:29:04.60#ibcon#read 5, iclass 3, count 0 2006.229.07:29:04.60#ibcon#about to read 6, iclass 3, count 0 2006.229.07:29:04.60#ibcon#read 6, iclass 3, count 0 2006.229.07:29:04.60#ibcon#end of sib2, iclass 3, count 0 2006.229.07:29:04.60#ibcon#*after write, iclass 3, count 0 2006.229.07:29:04.60#ibcon#*before return 0, iclass 3, count 0 2006.229.07:29:04.60#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:04.60#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.07:29:04.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:29:04.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:29:04.60$vck44/vblo=3,649.99 2006.229.07:29:04.60#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.07:29:04.61#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.07:29:04.61#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:04.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:04.61#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:04.61#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:04.61#ibcon#enter wrdev, iclass 5, count 0 2006.229.07:29:04.61#ibcon#first serial, iclass 5, count 0 2006.229.07:29:04.61#ibcon#enter sib2, iclass 5, count 0 2006.229.07:29:04.61#ibcon#flushed, iclass 5, count 0 2006.229.07:29:04.61#ibcon#about to write, iclass 5, count 0 2006.229.07:29:04.61#ibcon#wrote, iclass 5, count 0 2006.229.07:29:04.61#ibcon#about to read 3, iclass 5, count 0 2006.229.07:29:04.62#ibcon#read 3, iclass 5, count 0 2006.229.07:29:04.62#ibcon#about to read 4, iclass 5, count 0 2006.229.07:29:04.62#ibcon#read 4, iclass 5, count 0 2006.229.07:29:04.62#ibcon#about to read 5, iclass 5, count 0 2006.229.07:29:04.62#ibcon#read 5, iclass 5, count 0 2006.229.07:29:04.62#ibcon#about to read 6, iclass 5, count 0 2006.229.07:29:04.62#ibcon#read 6, iclass 5, count 0 2006.229.07:29:04.62#ibcon#end of sib2, iclass 5, count 0 2006.229.07:29:04.62#ibcon#*mode == 0, iclass 5, count 0 2006.229.07:29:04.62#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.07:29:04.62#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:29:04.62#ibcon#*before write, iclass 5, count 0 2006.229.07:29:04.62#ibcon#enter sib2, iclass 5, count 0 2006.229.07:29:04.62#ibcon#flushed, iclass 5, count 0 2006.229.07:29:04.62#ibcon#about to write, iclass 5, count 0 2006.229.07:29:04.62#ibcon#wrote, iclass 5, count 0 2006.229.07:29:04.62#ibcon#about to read 3, iclass 5, count 0 2006.229.07:29:04.66#ibcon#read 3, iclass 5, count 0 2006.229.07:29:04.66#ibcon#about to read 4, iclass 5, count 0 2006.229.07:29:04.66#ibcon#read 4, iclass 5, count 0 2006.229.07:29:04.66#ibcon#about to read 5, iclass 5, count 0 2006.229.07:29:04.66#ibcon#read 5, iclass 5, count 0 2006.229.07:29:04.66#ibcon#about to read 6, iclass 5, count 0 2006.229.07:29:04.66#ibcon#read 6, iclass 5, count 0 2006.229.07:29:04.66#ibcon#end of sib2, iclass 5, count 0 2006.229.07:29:04.66#ibcon#*after write, iclass 5, count 0 2006.229.07:29:04.66#ibcon#*before return 0, iclass 5, count 0 2006.229.07:29:04.66#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:04.66#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.07:29:04.66#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.07:29:04.66#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.07:29:04.66$vck44/vb=3,4 2006.229.07:29:04.67#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.07:29:04.67#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.07:29:04.67#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:04.67#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:04.71#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:04.71#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:04.71#ibcon#enter wrdev, iclass 7, count 2 2006.229.07:29:04.71#ibcon#first serial, iclass 7, count 2 2006.229.07:29:04.71#ibcon#enter sib2, iclass 7, count 2 2006.229.07:29:04.71#ibcon#flushed, iclass 7, count 2 2006.229.07:29:04.71#ibcon#about to write, iclass 7, count 2 2006.229.07:29:04.71#ibcon#wrote, iclass 7, count 2 2006.229.07:29:04.71#ibcon#about to read 3, iclass 7, count 2 2006.229.07:29:04.73#ibcon#read 3, iclass 7, count 2 2006.229.07:29:04.73#ibcon#about to read 4, iclass 7, count 2 2006.229.07:29:04.73#ibcon#read 4, iclass 7, count 2 2006.229.07:29:04.73#ibcon#about to read 5, iclass 7, count 2 2006.229.07:29:04.73#ibcon#read 5, iclass 7, count 2 2006.229.07:29:04.73#ibcon#about to read 6, iclass 7, count 2 2006.229.07:29:04.73#ibcon#read 6, iclass 7, count 2 2006.229.07:29:04.73#ibcon#end of sib2, iclass 7, count 2 2006.229.07:29:04.73#ibcon#*mode == 0, iclass 7, count 2 2006.229.07:29:04.73#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.07:29:04.73#ibcon#[27=AT03-04\r\n] 2006.229.07:29:04.73#ibcon#*before write, iclass 7, count 2 2006.229.07:29:04.73#ibcon#enter sib2, iclass 7, count 2 2006.229.07:29:04.73#ibcon#flushed, iclass 7, count 2 2006.229.07:29:04.73#ibcon#about to write, iclass 7, count 2 2006.229.07:29:04.73#ibcon#wrote, iclass 7, count 2 2006.229.07:29:04.73#ibcon#about to read 3, iclass 7, count 2 2006.229.07:29:04.76#ibcon#read 3, iclass 7, count 2 2006.229.07:29:04.76#ibcon#about to read 4, iclass 7, count 2 2006.229.07:29:04.76#ibcon#read 4, iclass 7, count 2 2006.229.07:29:04.76#ibcon#about to read 5, iclass 7, count 2 2006.229.07:29:04.76#ibcon#read 5, iclass 7, count 2 2006.229.07:29:04.76#ibcon#about to read 6, iclass 7, count 2 2006.229.07:29:04.76#ibcon#read 6, iclass 7, count 2 2006.229.07:29:04.76#ibcon#end of sib2, iclass 7, count 2 2006.229.07:29:04.76#ibcon#*after write, iclass 7, count 2 2006.229.07:29:04.76#ibcon#*before return 0, iclass 7, count 2 2006.229.07:29:04.76#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:04.76#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.07:29:04.76#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.07:29:04.76#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:04.76#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:04.88#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:04.88#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:04.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:29:04.88#ibcon#first serial, iclass 7, count 0 2006.229.07:29:04.88#ibcon#enter sib2, iclass 7, count 0 2006.229.07:29:04.88#ibcon#flushed, iclass 7, count 0 2006.229.07:29:04.88#ibcon#about to write, iclass 7, count 0 2006.229.07:29:04.88#ibcon#wrote, iclass 7, count 0 2006.229.07:29:04.88#ibcon#about to read 3, iclass 7, count 0 2006.229.07:29:04.90#ibcon#read 3, iclass 7, count 0 2006.229.07:29:04.90#ibcon#about to read 4, iclass 7, count 0 2006.229.07:29:04.90#ibcon#read 4, iclass 7, count 0 2006.229.07:29:04.90#ibcon#about to read 5, iclass 7, count 0 2006.229.07:29:04.90#ibcon#read 5, iclass 7, count 0 2006.229.07:29:04.90#ibcon#about to read 6, iclass 7, count 0 2006.229.07:29:04.90#ibcon#read 6, iclass 7, count 0 2006.229.07:29:04.90#ibcon#end of sib2, iclass 7, count 0 2006.229.07:29:04.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:29:04.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:29:04.90#ibcon#[27=USB\r\n] 2006.229.07:29:04.90#ibcon#*before write, iclass 7, count 0 2006.229.07:29:04.90#ibcon#enter sib2, iclass 7, count 0 2006.229.07:29:04.90#ibcon#flushed, iclass 7, count 0 2006.229.07:29:04.90#ibcon#about to write, iclass 7, count 0 2006.229.07:29:04.90#ibcon#wrote, iclass 7, count 0 2006.229.07:29:04.90#ibcon#about to read 3, iclass 7, count 0 2006.229.07:29:04.93#ibcon#read 3, iclass 7, count 0 2006.229.07:29:04.93#ibcon#about to read 4, iclass 7, count 0 2006.229.07:29:04.93#ibcon#read 4, iclass 7, count 0 2006.229.07:29:04.93#ibcon#about to read 5, iclass 7, count 0 2006.229.07:29:04.93#ibcon#read 5, iclass 7, count 0 2006.229.07:29:04.93#ibcon#about to read 6, iclass 7, count 0 2006.229.07:29:04.93#ibcon#read 6, iclass 7, count 0 2006.229.07:29:04.93#ibcon#end of sib2, iclass 7, count 0 2006.229.07:29:04.93#ibcon#*after write, iclass 7, count 0 2006.229.07:29:04.93#ibcon#*before return 0, iclass 7, count 0 2006.229.07:29:04.93#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:04.93#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.07:29:04.93#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:29:04.93#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:29:04.93$vck44/vblo=4,679.99 2006.229.07:29:04.94#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.07:29:04.94#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.07:29:04.94#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:04.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:04.94#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:04.94#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:04.94#ibcon#enter wrdev, iclass 11, count 0 2006.229.07:29:04.94#ibcon#first serial, iclass 11, count 0 2006.229.07:29:04.94#ibcon#enter sib2, iclass 11, count 0 2006.229.07:29:04.94#ibcon#flushed, iclass 11, count 0 2006.229.07:29:04.94#ibcon#about to write, iclass 11, count 0 2006.229.07:29:04.94#ibcon#wrote, iclass 11, count 0 2006.229.07:29:04.94#ibcon#about to read 3, iclass 11, count 0 2006.229.07:29:04.95#ibcon#read 3, iclass 11, count 0 2006.229.07:29:04.95#ibcon#about to read 4, iclass 11, count 0 2006.229.07:29:04.95#ibcon#read 4, iclass 11, count 0 2006.229.07:29:04.95#ibcon#about to read 5, iclass 11, count 0 2006.229.07:29:04.95#ibcon#read 5, iclass 11, count 0 2006.229.07:29:04.95#ibcon#about to read 6, iclass 11, count 0 2006.229.07:29:04.95#ibcon#read 6, iclass 11, count 0 2006.229.07:29:04.95#ibcon#end of sib2, iclass 11, count 0 2006.229.07:29:04.95#ibcon#*mode == 0, iclass 11, count 0 2006.229.07:29:04.95#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.07:29:04.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:29:04.95#ibcon#*before write, iclass 11, count 0 2006.229.07:29:04.95#ibcon#enter sib2, iclass 11, count 0 2006.229.07:29:04.95#ibcon#flushed, iclass 11, count 0 2006.229.07:29:04.95#ibcon#about to write, iclass 11, count 0 2006.229.07:29:04.95#ibcon#wrote, iclass 11, count 0 2006.229.07:29:04.95#ibcon#about to read 3, iclass 11, count 0 2006.229.07:29:04.99#ibcon#read 3, iclass 11, count 0 2006.229.07:29:04.99#ibcon#about to read 4, iclass 11, count 0 2006.229.07:29:04.99#ibcon#read 4, iclass 11, count 0 2006.229.07:29:04.99#ibcon#about to read 5, iclass 11, count 0 2006.229.07:29:04.99#ibcon#read 5, iclass 11, count 0 2006.229.07:29:04.99#ibcon#about to read 6, iclass 11, count 0 2006.229.07:29:04.99#ibcon#read 6, iclass 11, count 0 2006.229.07:29:04.99#ibcon#end of sib2, iclass 11, count 0 2006.229.07:29:04.99#ibcon#*after write, iclass 11, count 0 2006.229.07:29:04.99#ibcon#*before return 0, iclass 11, count 0 2006.229.07:29:04.99#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:04.99#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.07:29:04.99#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.07:29:04.99#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.07:29:04.99$vck44/vb=4,4 2006.229.07:29:05.00#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.07:29:05.00#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.07:29:05.00#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:05.00#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:05.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:05.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:05.04#ibcon#enter wrdev, iclass 13, count 2 2006.229.07:29:05.04#ibcon#first serial, iclass 13, count 2 2006.229.07:29:05.04#ibcon#enter sib2, iclass 13, count 2 2006.229.07:29:05.04#ibcon#flushed, iclass 13, count 2 2006.229.07:29:05.04#ibcon#about to write, iclass 13, count 2 2006.229.07:29:05.04#ibcon#wrote, iclass 13, count 2 2006.229.07:29:05.04#ibcon#about to read 3, iclass 13, count 2 2006.229.07:29:05.06#ibcon#read 3, iclass 13, count 2 2006.229.07:29:05.06#ibcon#about to read 4, iclass 13, count 2 2006.229.07:29:05.06#ibcon#read 4, iclass 13, count 2 2006.229.07:29:05.06#ibcon#about to read 5, iclass 13, count 2 2006.229.07:29:05.06#ibcon#read 5, iclass 13, count 2 2006.229.07:29:05.06#ibcon#about to read 6, iclass 13, count 2 2006.229.07:29:05.06#ibcon#read 6, iclass 13, count 2 2006.229.07:29:05.06#ibcon#end of sib2, iclass 13, count 2 2006.229.07:29:05.06#ibcon#*mode == 0, iclass 13, count 2 2006.229.07:29:05.06#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.07:29:05.06#ibcon#[27=AT04-04\r\n] 2006.229.07:29:05.06#ibcon#*before write, iclass 13, count 2 2006.229.07:29:05.06#ibcon#enter sib2, iclass 13, count 2 2006.229.07:29:05.06#ibcon#flushed, iclass 13, count 2 2006.229.07:29:05.06#ibcon#about to write, iclass 13, count 2 2006.229.07:29:05.06#ibcon#wrote, iclass 13, count 2 2006.229.07:29:05.06#ibcon#about to read 3, iclass 13, count 2 2006.229.07:29:05.09#ibcon#read 3, iclass 13, count 2 2006.229.07:29:05.09#ibcon#about to read 4, iclass 13, count 2 2006.229.07:29:05.09#ibcon#read 4, iclass 13, count 2 2006.229.07:29:05.09#ibcon#about to read 5, iclass 13, count 2 2006.229.07:29:05.09#ibcon#read 5, iclass 13, count 2 2006.229.07:29:05.09#ibcon#about to read 6, iclass 13, count 2 2006.229.07:29:05.09#ibcon#read 6, iclass 13, count 2 2006.229.07:29:05.09#ibcon#end of sib2, iclass 13, count 2 2006.229.07:29:05.09#ibcon#*after write, iclass 13, count 2 2006.229.07:29:05.09#ibcon#*before return 0, iclass 13, count 2 2006.229.07:29:05.09#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:05.09#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.07:29:05.09#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.07:29:05.09#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:05.09#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:05.21#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:05.21#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:05.21#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:29:05.21#ibcon#first serial, iclass 13, count 0 2006.229.07:29:05.21#ibcon#enter sib2, iclass 13, count 0 2006.229.07:29:05.21#ibcon#flushed, iclass 13, count 0 2006.229.07:29:05.21#ibcon#about to write, iclass 13, count 0 2006.229.07:29:05.21#ibcon#wrote, iclass 13, count 0 2006.229.07:29:05.21#ibcon#about to read 3, iclass 13, count 0 2006.229.07:29:05.23#ibcon#read 3, iclass 13, count 0 2006.229.07:29:05.23#ibcon#about to read 4, iclass 13, count 0 2006.229.07:29:05.23#ibcon#read 4, iclass 13, count 0 2006.229.07:29:05.23#ibcon#about to read 5, iclass 13, count 0 2006.229.07:29:05.23#ibcon#read 5, iclass 13, count 0 2006.229.07:29:05.23#ibcon#about to read 6, iclass 13, count 0 2006.229.07:29:05.23#ibcon#read 6, iclass 13, count 0 2006.229.07:29:05.23#ibcon#end of sib2, iclass 13, count 0 2006.229.07:29:05.23#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:29:05.23#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:29:05.23#ibcon#[27=USB\r\n] 2006.229.07:29:05.23#ibcon#*before write, iclass 13, count 0 2006.229.07:29:05.23#ibcon#enter sib2, iclass 13, count 0 2006.229.07:29:05.23#ibcon#flushed, iclass 13, count 0 2006.229.07:29:05.23#ibcon#about to write, iclass 13, count 0 2006.229.07:29:05.23#ibcon#wrote, iclass 13, count 0 2006.229.07:29:05.23#ibcon#about to read 3, iclass 13, count 0 2006.229.07:29:05.26#ibcon#read 3, iclass 13, count 0 2006.229.07:29:05.26#ibcon#about to read 4, iclass 13, count 0 2006.229.07:29:05.26#ibcon#read 4, iclass 13, count 0 2006.229.07:29:05.26#ibcon#about to read 5, iclass 13, count 0 2006.229.07:29:05.26#ibcon#read 5, iclass 13, count 0 2006.229.07:29:05.26#ibcon#about to read 6, iclass 13, count 0 2006.229.07:29:05.26#ibcon#read 6, iclass 13, count 0 2006.229.07:29:05.26#ibcon#end of sib2, iclass 13, count 0 2006.229.07:29:05.26#ibcon#*after write, iclass 13, count 0 2006.229.07:29:05.26#ibcon#*before return 0, iclass 13, count 0 2006.229.07:29:05.26#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:05.26#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.07:29:05.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:29:05.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:29:05.26$vck44/vblo=5,709.99 2006.229.07:29:05.26#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.07:29:05.26#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.07:29:05.27#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:05.27#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:05.27#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:05.27#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:05.27#ibcon#enter wrdev, iclass 15, count 0 2006.229.07:29:05.27#ibcon#first serial, iclass 15, count 0 2006.229.07:29:05.27#ibcon#enter sib2, iclass 15, count 0 2006.229.07:29:05.27#ibcon#flushed, iclass 15, count 0 2006.229.07:29:05.27#ibcon#about to write, iclass 15, count 0 2006.229.07:29:05.27#ibcon#wrote, iclass 15, count 0 2006.229.07:29:05.27#ibcon#about to read 3, iclass 15, count 0 2006.229.07:29:05.28#ibcon#read 3, iclass 15, count 0 2006.229.07:29:05.28#ibcon#about to read 4, iclass 15, count 0 2006.229.07:29:05.28#ibcon#read 4, iclass 15, count 0 2006.229.07:29:05.28#ibcon#about to read 5, iclass 15, count 0 2006.229.07:29:05.28#ibcon#read 5, iclass 15, count 0 2006.229.07:29:05.28#ibcon#about to read 6, iclass 15, count 0 2006.229.07:29:05.28#ibcon#read 6, iclass 15, count 0 2006.229.07:29:05.28#ibcon#end of sib2, iclass 15, count 0 2006.229.07:29:05.28#ibcon#*mode == 0, iclass 15, count 0 2006.229.07:29:05.28#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.07:29:05.28#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:29:05.28#ibcon#*before write, iclass 15, count 0 2006.229.07:29:05.28#ibcon#enter sib2, iclass 15, count 0 2006.229.07:29:05.28#ibcon#flushed, iclass 15, count 0 2006.229.07:29:05.28#ibcon#about to write, iclass 15, count 0 2006.229.07:29:05.28#ibcon#wrote, iclass 15, count 0 2006.229.07:29:05.28#ibcon#about to read 3, iclass 15, count 0 2006.229.07:29:05.32#ibcon#read 3, iclass 15, count 0 2006.229.07:29:05.32#ibcon#about to read 4, iclass 15, count 0 2006.229.07:29:05.32#ibcon#read 4, iclass 15, count 0 2006.229.07:29:05.32#ibcon#about to read 5, iclass 15, count 0 2006.229.07:29:05.32#ibcon#read 5, iclass 15, count 0 2006.229.07:29:05.32#ibcon#about to read 6, iclass 15, count 0 2006.229.07:29:05.32#ibcon#read 6, iclass 15, count 0 2006.229.07:29:05.32#ibcon#end of sib2, iclass 15, count 0 2006.229.07:29:05.32#ibcon#*after write, iclass 15, count 0 2006.229.07:29:05.32#ibcon#*before return 0, iclass 15, count 0 2006.229.07:29:05.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:05.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:29:05.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.07:29:05.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.07:29:05.32$vck44/vb=5,4 2006.229.07:29:05.32#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.07:29:05.33#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.07:29:05.33#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:05.33#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:05.37#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:05.37#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:05.37#ibcon#enter wrdev, iclass 17, count 2 2006.229.07:29:05.37#ibcon#first serial, iclass 17, count 2 2006.229.07:29:05.37#ibcon#enter sib2, iclass 17, count 2 2006.229.07:29:05.37#ibcon#flushed, iclass 17, count 2 2006.229.07:29:05.37#ibcon#about to write, iclass 17, count 2 2006.229.07:29:05.37#ibcon#wrote, iclass 17, count 2 2006.229.07:29:05.37#ibcon#about to read 3, iclass 17, count 2 2006.229.07:29:05.39#ibcon#read 3, iclass 17, count 2 2006.229.07:29:05.39#ibcon#about to read 4, iclass 17, count 2 2006.229.07:29:05.39#ibcon#read 4, iclass 17, count 2 2006.229.07:29:05.39#ibcon#about to read 5, iclass 17, count 2 2006.229.07:29:05.39#ibcon#read 5, iclass 17, count 2 2006.229.07:29:05.39#ibcon#about to read 6, iclass 17, count 2 2006.229.07:29:05.39#ibcon#read 6, iclass 17, count 2 2006.229.07:29:05.39#ibcon#end of sib2, iclass 17, count 2 2006.229.07:29:05.39#ibcon#*mode == 0, iclass 17, count 2 2006.229.07:29:05.39#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.07:29:05.39#ibcon#[27=AT05-04\r\n] 2006.229.07:29:05.39#ibcon#*before write, iclass 17, count 2 2006.229.07:29:05.39#ibcon#enter sib2, iclass 17, count 2 2006.229.07:29:05.39#ibcon#flushed, iclass 17, count 2 2006.229.07:29:05.39#ibcon#about to write, iclass 17, count 2 2006.229.07:29:05.39#ibcon#wrote, iclass 17, count 2 2006.229.07:29:05.39#ibcon#about to read 3, iclass 17, count 2 2006.229.07:29:05.42#ibcon#read 3, iclass 17, count 2 2006.229.07:29:05.42#ibcon#about to read 4, iclass 17, count 2 2006.229.07:29:05.42#ibcon#read 4, iclass 17, count 2 2006.229.07:29:05.42#ibcon#about to read 5, iclass 17, count 2 2006.229.07:29:05.42#ibcon#read 5, iclass 17, count 2 2006.229.07:29:05.42#ibcon#about to read 6, iclass 17, count 2 2006.229.07:29:05.42#ibcon#read 6, iclass 17, count 2 2006.229.07:29:05.42#ibcon#end of sib2, iclass 17, count 2 2006.229.07:29:05.42#ibcon#*after write, iclass 17, count 2 2006.229.07:29:05.42#ibcon#*before return 0, iclass 17, count 2 2006.229.07:29:05.42#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:05.42#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:29:05.42#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.07:29:05.42#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:05.42#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:05.54#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:05.54#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:05.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:29:05.54#ibcon#first serial, iclass 17, count 0 2006.229.07:29:05.54#ibcon#enter sib2, iclass 17, count 0 2006.229.07:29:05.54#ibcon#flushed, iclass 17, count 0 2006.229.07:29:05.54#ibcon#about to write, iclass 17, count 0 2006.229.07:29:05.54#ibcon#wrote, iclass 17, count 0 2006.229.07:29:05.54#ibcon#about to read 3, iclass 17, count 0 2006.229.07:29:05.56#ibcon#read 3, iclass 17, count 0 2006.229.07:29:05.56#ibcon#about to read 4, iclass 17, count 0 2006.229.07:29:05.56#ibcon#read 4, iclass 17, count 0 2006.229.07:29:05.56#ibcon#about to read 5, iclass 17, count 0 2006.229.07:29:05.56#ibcon#read 5, iclass 17, count 0 2006.229.07:29:05.56#ibcon#about to read 6, iclass 17, count 0 2006.229.07:29:05.56#ibcon#read 6, iclass 17, count 0 2006.229.07:29:05.56#ibcon#end of sib2, iclass 17, count 0 2006.229.07:29:05.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:29:05.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:29:05.56#ibcon#[27=USB\r\n] 2006.229.07:29:05.56#ibcon#*before write, iclass 17, count 0 2006.229.07:29:05.56#ibcon#enter sib2, iclass 17, count 0 2006.229.07:29:05.56#ibcon#flushed, iclass 17, count 0 2006.229.07:29:05.56#ibcon#about to write, iclass 17, count 0 2006.229.07:29:05.56#ibcon#wrote, iclass 17, count 0 2006.229.07:29:05.56#ibcon#about to read 3, iclass 17, count 0 2006.229.07:29:05.59#ibcon#read 3, iclass 17, count 0 2006.229.07:29:05.59#ibcon#about to read 4, iclass 17, count 0 2006.229.07:29:05.59#ibcon#read 4, iclass 17, count 0 2006.229.07:29:05.59#ibcon#about to read 5, iclass 17, count 0 2006.229.07:29:05.59#ibcon#read 5, iclass 17, count 0 2006.229.07:29:05.59#ibcon#about to read 6, iclass 17, count 0 2006.229.07:29:05.59#ibcon#read 6, iclass 17, count 0 2006.229.07:29:05.59#ibcon#end of sib2, iclass 17, count 0 2006.229.07:29:05.59#ibcon#*after write, iclass 17, count 0 2006.229.07:29:05.59#ibcon#*before return 0, iclass 17, count 0 2006.229.07:29:05.59#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:05.59#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:29:05.59#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:29:05.59#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:29:05.60$vck44/vblo=6,719.99 2006.229.07:29:05.60#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.07:29:05.60#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.07:29:05.60#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:05.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:05.60#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:05.60#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:05.60#ibcon#enter wrdev, iclass 19, count 0 2006.229.07:29:05.60#ibcon#first serial, iclass 19, count 0 2006.229.07:29:05.60#ibcon#enter sib2, iclass 19, count 0 2006.229.07:29:05.60#ibcon#flushed, iclass 19, count 0 2006.229.07:29:05.60#ibcon#about to write, iclass 19, count 0 2006.229.07:29:05.60#ibcon#wrote, iclass 19, count 0 2006.229.07:29:05.60#ibcon#about to read 3, iclass 19, count 0 2006.229.07:29:05.61#ibcon#read 3, iclass 19, count 0 2006.229.07:29:05.61#ibcon#about to read 4, iclass 19, count 0 2006.229.07:29:05.61#ibcon#read 4, iclass 19, count 0 2006.229.07:29:05.61#ibcon#about to read 5, iclass 19, count 0 2006.229.07:29:05.61#ibcon#read 5, iclass 19, count 0 2006.229.07:29:05.61#ibcon#about to read 6, iclass 19, count 0 2006.229.07:29:05.61#ibcon#read 6, iclass 19, count 0 2006.229.07:29:05.61#ibcon#end of sib2, iclass 19, count 0 2006.229.07:29:05.61#ibcon#*mode == 0, iclass 19, count 0 2006.229.07:29:05.61#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.07:29:05.61#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:29:05.61#ibcon#*before write, iclass 19, count 0 2006.229.07:29:05.61#ibcon#enter sib2, iclass 19, count 0 2006.229.07:29:05.61#ibcon#flushed, iclass 19, count 0 2006.229.07:29:05.61#ibcon#about to write, iclass 19, count 0 2006.229.07:29:05.61#ibcon#wrote, iclass 19, count 0 2006.229.07:29:05.61#ibcon#about to read 3, iclass 19, count 0 2006.229.07:29:05.65#ibcon#read 3, iclass 19, count 0 2006.229.07:29:05.65#ibcon#about to read 4, iclass 19, count 0 2006.229.07:29:05.65#ibcon#read 4, iclass 19, count 0 2006.229.07:29:05.65#ibcon#about to read 5, iclass 19, count 0 2006.229.07:29:05.65#ibcon#read 5, iclass 19, count 0 2006.229.07:29:05.65#ibcon#about to read 6, iclass 19, count 0 2006.229.07:29:05.65#ibcon#read 6, iclass 19, count 0 2006.229.07:29:05.65#ibcon#end of sib2, iclass 19, count 0 2006.229.07:29:05.65#ibcon#*after write, iclass 19, count 0 2006.229.07:29:05.65#ibcon#*before return 0, iclass 19, count 0 2006.229.07:29:05.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:05.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.07:29:05.65#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.07:29:05.65#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.07:29:05.65$vck44/vb=6,4 2006.229.07:29:05.65#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.07:29:05.65#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.07:29:05.66#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:05.66#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:05.70#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:05.70#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:05.70#ibcon#enter wrdev, iclass 21, count 2 2006.229.07:29:05.70#ibcon#first serial, iclass 21, count 2 2006.229.07:29:05.70#ibcon#enter sib2, iclass 21, count 2 2006.229.07:29:05.70#ibcon#flushed, iclass 21, count 2 2006.229.07:29:05.70#ibcon#about to write, iclass 21, count 2 2006.229.07:29:05.70#ibcon#wrote, iclass 21, count 2 2006.229.07:29:05.70#ibcon#about to read 3, iclass 21, count 2 2006.229.07:29:05.72#ibcon#read 3, iclass 21, count 2 2006.229.07:29:05.72#ibcon#about to read 4, iclass 21, count 2 2006.229.07:29:05.72#ibcon#read 4, iclass 21, count 2 2006.229.07:29:05.72#ibcon#about to read 5, iclass 21, count 2 2006.229.07:29:05.72#ibcon#read 5, iclass 21, count 2 2006.229.07:29:05.72#ibcon#about to read 6, iclass 21, count 2 2006.229.07:29:05.72#ibcon#read 6, iclass 21, count 2 2006.229.07:29:05.72#ibcon#end of sib2, iclass 21, count 2 2006.229.07:29:05.72#ibcon#*mode == 0, iclass 21, count 2 2006.229.07:29:05.72#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.07:29:05.72#ibcon#[27=AT06-04\r\n] 2006.229.07:29:05.72#ibcon#*before write, iclass 21, count 2 2006.229.07:29:05.72#ibcon#enter sib2, iclass 21, count 2 2006.229.07:29:05.72#ibcon#flushed, iclass 21, count 2 2006.229.07:29:05.72#ibcon#about to write, iclass 21, count 2 2006.229.07:29:05.72#ibcon#wrote, iclass 21, count 2 2006.229.07:29:05.72#ibcon#about to read 3, iclass 21, count 2 2006.229.07:29:05.75#ibcon#read 3, iclass 21, count 2 2006.229.07:29:05.75#ibcon#about to read 4, iclass 21, count 2 2006.229.07:29:05.75#ibcon#read 4, iclass 21, count 2 2006.229.07:29:05.75#ibcon#about to read 5, iclass 21, count 2 2006.229.07:29:05.75#ibcon#read 5, iclass 21, count 2 2006.229.07:29:05.75#ibcon#about to read 6, iclass 21, count 2 2006.229.07:29:05.75#ibcon#read 6, iclass 21, count 2 2006.229.07:29:05.75#ibcon#end of sib2, iclass 21, count 2 2006.229.07:29:05.75#ibcon#*after write, iclass 21, count 2 2006.229.07:29:05.75#ibcon#*before return 0, iclass 21, count 2 2006.229.07:29:05.75#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:05.75#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.07:29:05.75#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.07:29:05.75#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:05.75#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:05.87#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:05.87#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:05.87#ibcon#enter wrdev, iclass 21, count 0 2006.229.07:29:05.87#ibcon#first serial, iclass 21, count 0 2006.229.07:29:05.87#ibcon#enter sib2, iclass 21, count 0 2006.229.07:29:05.87#ibcon#flushed, iclass 21, count 0 2006.229.07:29:05.87#ibcon#about to write, iclass 21, count 0 2006.229.07:29:05.87#ibcon#wrote, iclass 21, count 0 2006.229.07:29:05.87#ibcon#about to read 3, iclass 21, count 0 2006.229.07:29:05.89#ibcon#read 3, iclass 21, count 0 2006.229.07:29:05.89#ibcon#about to read 4, iclass 21, count 0 2006.229.07:29:05.89#ibcon#read 4, iclass 21, count 0 2006.229.07:29:05.89#ibcon#about to read 5, iclass 21, count 0 2006.229.07:29:05.89#ibcon#read 5, iclass 21, count 0 2006.229.07:29:05.89#ibcon#about to read 6, iclass 21, count 0 2006.229.07:29:05.89#ibcon#read 6, iclass 21, count 0 2006.229.07:29:05.89#ibcon#end of sib2, iclass 21, count 0 2006.229.07:29:05.89#ibcon#*mode == 0, iclass 21, count 0 2006.229.07:29:05.89#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.07:29:05.89#ibcon#[27=USB\r\n] 2006.229.07:29:05.89#ibcon#*before write, iclass 21, count 0 2006.229.07:29:05.89#ibcon#enter sib2, iclass 21, count 0 2006.229.07:29:05.89#ibcon#flushed, iclass 21, count 0 2006.229.07:29:05.89#ibcon#about to write, iclass 21, count 0 2006.229.07:29:05.89#ibcon#wrote, iclass 21, count 0 2006.229.07:29:05.89#ibcon#about to read 3, iclass 21, count 0 2006.229.07:29:05.92#ibcon#read 3, iclass 21, count 0 2006.229.07:29:05.92#ibcon#about to read 4, iclass 21, count 0 2006.229.07:29:05.92#ibcon#read 4, iclass 21, count 0 2006.229.07:29:05.92#ibcon#about to read 5, iclass 21, count 0 2006.229.07:29:05.92#ibcon#read 5, iclass 21, count 0 2006.229.07:29:05.92#ibcon#about to read 6, iclass 21, count 0 2006.229.07:29:05.92#ibcon#read 6, iclass 21, count 0 2006.229.07:29:05.92#ibcon#end of sib2, iclass 21, count 0 2006.229.07:29:05.92#ibcon#*after write, iclass 21, count 0 2006.229.07:29:05.92#ibcon#*before return 0, iclass 21, count 0 2006.229.07:29:05.92#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:05.92#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.07:29:05.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.07:29:05.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.07:29:05.92$vck44/vblo=7,734.99 2006.229.07:29:05.93#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.07:29:05.93#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.07:29:05.93#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:05.93#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:05.93#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:05.93#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:05.93#ibcon#enter wrdev, iclass 23, count 0 2006.229.07:29:05.93#ibcon#first serial, iclass 23, count 0 2006.229.07:29:05.93#ibcon#enter sib2, iclass 23, count 0 2006.229.07:29:05.93#ibcon#flushed, iclass 23, count 0 2006.229.07:29:05.93#ibcon#about to write, iclass 23, count 0 2006.229.07:29:05.93#ibcon#wrote, iclass 23, count 0 2006.229.07:29:05.93#ibcon#about to read 3, iclass 23, count 0 2006.229.07:29:05.94#ibcon#read 3, iclass 23, count 0 2006.229.07:29:05.94#ibcon#about to read 4, iclass 23, count 0 2006.229.07:29:05.94#ibcon#read 4, iclass 23, count 0 2006.229.07:29:05.94#ibcon#about to read 5, iclass 23, count 0 2006.229.07:29:05.94#ibcon#read 5, iclass 23, count 0 2006.229.07:29:05.94#ibcon#about to read 6, iclass 23, count 0 2006.229.07:29:05.94#ibcon#read 6, iclass 23, count 0 2006.229.07:29:05.94#ibcon#end of sib2, iclass 23, count 0 2006.229.07:29:05.94#ibcon#*mode == 0, iclass 23, count 0 2006.229.07:29:05.94#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.07:29:05.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:29:05.94#ibcon#*before write, iclass 23, count 0 2006.229.07:29:05.94#ibcon#enter sib2, iclass 23, count 0 2006.229.07:29:05.94#ibcon#flushed, iclass 23, count 0 2006.229.07:29:05.94#ibcon#about to write, iclass 23, count 0 2006.229.07:29:05.94#ibcon#wrote, iclass 23, count 0 2006.229.07:29:05.94#ibcon#about to read 3, iclass 23, count 0 2006.229.07:29:05.98#ibcon#read 3, iclass 23, count 0 2006.229.07:29:05.98#ibcon#about to read 4, iclass 23, count 0 2006.229.07:29:05.98#ibcon#read 4, iclass 23, count 0 2006.229.07:29:05.98#ibcon#about to read 5, iclass 23, count 0 2006.229.07:29:05.98#ibcon#read 5, iclass 23, count 0 2006.229.07:29:05.98#ibcon#about to read 6, iclass 23, count 0 2006.229.07:29:05.98#ibcon#read 6, iclass 23, count 0 2006.229.07:29:05.98#ibcon#end of sib2, iclass 23, count 0 2006.229.07:29:05.98#ibcon#*after write, iclass 23, count 0 2006.229.07:29:05.98#ibcon#*before return 0, iclass 23, count 0 2006.229.07:29:05.98#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:05.98#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.07:29:05.98#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.07:29:05.98#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.07:29:05.98$vck44/vb=7,4 2006.229.07:29:05.99#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.07:29:05.99#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.07:29:05.99#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:05.99#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:06.03#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:06.03#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:06.03#ibcon#enter wrdev, iclass 25, count 2 2006.229.07:29:06.03#ibcon#first serial, iclass 25, count 2 2006.229.07:29:06.03#ibcon#enter sib2, iclass 25, count 2 2006.229.07:29:06.03#ibcon#flushed, iclass 25, count 2 2006.229.07:29:06.03#ibcon#about to write, iclass 25, count 2 2006.229.07:29:06.03#ibcon#wrote, iclass 25, count 2 2006.229.07:29:06.03#ibcon#about to read 3, iclass 25, count 2 2006.229.07:29:06.05#ibcon#read 3, iclass 25, count 2 2006.229.07:29:06.05#ibcon#about to read 4, iclass 25, count 2 2006.229.07:29:06.05#ibcon#read 4, iclass 25, count 2 2006.229.07:29:06.05#ibcon#about to read 5, iclass 25, count 2 2006.229.07:29:06.05#ibcon#read 5, iclass 25, count 2 2006.229.07:29:06.05#ibcon#about to read 6, iclass 25, count 2 2006.229.07:29:06.05#ibcon#read 6, iclass 25, count 2 2006.229.07:29:06.05#ibcon#end of sib2, iclass 25, count 2 2006.229.07:29:06.05#ibcon#*mode == 0, iclass 25, count 2 2006.229.07:29:06.05#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.07:29:06.05#ibcon#[27=AT07-04\r\n] 2006.229.07:29:06.05#ibcon#*before write, iclass 25, count 2 2006.229.07:29:06.05#ibcon#enter sib2, iclass 25, count 2 2006.229.07:29:06.05#ibcon#flushed, iclass 25, count 2 2006.229.07:29:06.05#ibcon#about to write, iclass 25, count 2 2006.229.07:29:06.05#ibcon#wrote, iclass 25, count 2 2006.229.07:29:06.05#ibcon#about to read 3, iclass 25, count 2 2006.229.07:29:06.08#ibcon#read 3, iclass 25, count 2 2006.229.07:29:06.08#ibcon#about to read 4, iclass 25, count 2 2006.229.07:29:06.08#ibcon#read 4, iclass 25, count 2 2006.229.07:29:06.08#ibcon#about to read 5, iclass 25, count 2 2006.229.07:29:06.08#ibcon#read 5, iclass 25, count 2 2006.229.07:29:06.08#ibcon#about to read 6, iclass 25, count 2 2006.229.07:29:06.08#ibcon#read 6, iclass 25, count 2 2006.229.07:29:06.08#ibcon#end of sib2, iclass 25, count 2 2006.229.07:29:06.08#ibcon#*after write, iclass 25, count 2 2006.229.07:29:06.08#ibcon#*before return 0, iclass 25, count 2 2006.229.07:29:06.08#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:06.08#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.07:29:06.08#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.07:29:06.08#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:06.08#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:06.20#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:06.20#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:06.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.07:29:06.20#ibcon#first serial, iclass 25, count 0 2006.229.07:29:06.20#ibcon#enter sib2, iclass 25, count 0 2006.229.07:29:06.20#ibcon#flushed, iclass 25, count 0 2006.229.07:29:06.20#ibcon#about to write, iclass 25, count 0 2006.229.07:29:06.20#ibcon#wrote, iclass 25, count 0 2006.229.07:29:06.20#ibcon#about to read 3, iclass 25, count 0 2006.229.07:29:06.22#ibcon#read 3, iclass 25, count 0 2006.229.07:29:06.22#ibcon#about to read 4, iclass 25, count 0 2006.229.07:29:06.22#ibcon#read 4, iclass 25, count 0 2006.229.07:29:06.22#ibcon#about to read 5, iclass 25, count 0 2006.229.07:29:06.22#ibcon#read 5, iclass 25, count 0 2006.229.07:29:06.22#ibcon#about to read 6, iclass 25, count 0 2006.229.07:29:06.22#ibcon#read 6, iclass 25, count 0 2006.229.07:29:06.22#ibcon#end of sib2, iclass 25, count 0 2006.229.07:29:06.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.07:29:06.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.07:29:06.22#ibcon#[27=USB\r\n] 2006.229.07:29:06.22#ibcon#*before write, iclass 25, count 0 2006.229.07:29:06.22#ibcon#enter sib2, iclass 25, count 0 2006.229.07:29:06.22#ibcon#flushed, iclass 25, count 0 2006.229.07:29:06.22#ibcon#about to write, iclass 25, count 0 2006.229.07:29:06.22#ibcon#wrote, iclass 25, count 0 2006.229.07:29:06.22#ibcon#about to read 3, iclass 25, count 0 2006.229.07:29:06.25#ibcon#read 3, iclass 25, count 0 2006.229.07:29:06.25#ibcon#about to read 4, iclass 25, count 0 2006.229.07:29:06.25#ibcon#read 4, iclass 25, count 0 2006.229.07:29:06.25#ibcon#about to read 5, iclass 25, count 0 2006.229.07:29:06.25#ibcon#read 5, iclass 25, count 0 2006.229.07:29:06.25#ibcon#about to read 6, iclass 25, count 0 2006.229.07:29:06.25#ibcon#read 6, iclass 25, count 0 2006.229.07:29:06.25#ibcon#end of sib2, iclass 25, count 0 2006.229.07:29:06.25#ibcon#*after write, iclass 25, count 0 2006.229.07:29:06.25#ibcon#*before return 0, iclass 25, count 0 2006.229.07:29:06.25#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:06.25#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.07:29:06.25#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.07:29:06.25#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.07:29:06.25$vck44/vblo=8,744.99 2006.229.07:29:06.26#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.07:29:06.26#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.07:29:06.26#ibcon#ireg 17 cls_cnt 0 2006.229.07:29:06.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:06.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:06.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:06.26#ibcon#enter wrdev, iclass 27, count 0 2006.229.07:29:06.26#ibcon#first serial, iclass 27, count 0 2006.229.07:29:06.26#ibcon#enter sib2, iclass 27, count 0 2006.229.07:29:06.26#ibcon#flushed, iclass 27, count 0 2006.229.07:29:06.26#ibcon#about to write, iclass 27, count 0 2006.229.07:29:06.26#ibcon#wrote, iclass 27, count 0 2006.229.07:29:06.26#ibcon#about to read 3, iclass 27, count 0 2006.229.07:29:06.27#ibcon#read 3, iclass 27, count 0 2006.229.07:29:06.27#ibcon#about to read 4, iclass 27, count 0 2006.229.07:29:06.27#ibcon#read 4, iclass 27, count 0 2006.229.07:29:06.27#ibcon#about to read 5, iclass 27, count 0 2006.229.07:29:06.27#ibcon#read 5, iclass 27, count 0 2006.229.07:29:06.27#ibcon#about to read 6, iclass 27, count 0 2006.229.07:29:06.27#ibcon#read 6, iclass 27, count 0 2006.229.07:29:06.27#ibcon#end of sib2, iclass 27, count 0 2006.229.07:29:06.27#ibcon#*mode == 0, iclass 27, count 0 2006.229.07:29:06.27#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.07:29:06.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:29:06.27#ibcon#*before write, iclass 27, count 0 2006.229.07:29:06.27#ibcon#enter sib2, iclass 27, count 0 2006.229.07:29:06.27#ibcon#flushed, iclass 27, count 0 2006.229.07:29:06.27#ibcon#about to write, iclass 27, count 0 2006.229.07:29:06.27#ibcon#wrote, iclass 27, count 0 2006.229.07:29:06.27#ibcon#about to read 3, iclass 27, count 0 2006.229.07:29:06.31#ibcon#read 3, iclass 27, count 0 2006.229.07:29:06.31#ibcon#about to read 4, iclass 27, count 0 2006.229.07:29:06.31#ibcon#read 4, iclass 27, count 0 2006.229.07:29:06.31#ibcon#about to read 5, iclass 27, count 0 2006.229.07:29:06.31#ibcon#read 5, iclass 27, count 0 2006.229.07:29:06.31#ibcon#about to read 6, iclass 27, count 0 2006.229.07:29:06.31#ibcon#read 6, iclass 27, count 0 2006.229.07:29:06.31#ibcon#end of sib2, iclass 27, count 0 2006.229.07:29:06.31#ibcon#*after write, iclass 27, count 0 2006.229.07:29:06.31#ibcon#*before return 0, iclass 27, count 0 2006.229.07:29:06.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:06.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.07:29:06.31#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.07:29:06.31#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.07:29:06.31$vck44/vb=8,4 2006.229.07:29:06.31#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.07:29:06.31#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.07:29:06.31#ibcon#ireg 11 cls_cnt 2 2006.229.07:29:06.32#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:06.36#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:06.36#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:06.36#ibcon#enter wrdev, iclass 29, count 2 2006.229.07:29:06.36#ibcon#first serial, iclass 29, count 2 2006.229.07:29:06.36#ibcon#enter sib2, iclass 29, count 2 2006.229.07:29:06.36#ibcon#flushed, iclass 29, count 2 2006.229.07:29:06.36#ibcon#about to write, iclass 29, count 2 2006.229.07:29:06.36#ibcon#wrote, iclass 29, count 2 2006.229.07:29:06.36#ibcon#about to read 3, iclass 29, count 2 2006.229.07:29:06.38#ibcon#read 3, iclass 29, count 2 2006.229.07:29:06.38#ibcon#about to read 4, iclass 29, count 2 2006.229.07:29:06.38#ibcon#read 4, iclass 29, count 2 2006.229.07:29:06.38#ibcon#about to read 5, iclass 29, count 2 2006.229.07:29:06.38#ibcon#read 5, iclass 29, count 2 2006.229.07:29:06.38#ibcon#about to read 6, iclass 29, count 2 2006.229.07:29:06.38#ibcon#read 6, iclass 29, count 2 2006.229.07:29:06.38#ibcon#end of sib2, iclass 29, count 2 2006.229.07:29:06.38#ibcon#*mode == 0, iclass 29, count 2 2006.229.07:29:06.38#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.07:29:06.38#ibcon#[27=AT08-04\r\n] 2006.229.07:29:06.38#ibcon#*before write, iclass 29, count 2 2006.229.07:29:06.38#ibcon#enter sib2, iclass 29, count 2 2006.229.07:29:06.38#ibcon#flushed, iclass 29, count 2 2006.229.07:29:06.38#ibcon#about to write, iclass 29, count 2 2006.229.07:29:06.38#ibcon#wrote, iclass 29, count 2 2006.229.07:29:06.38#ibcon#about to read 3, iclass 29, count 2 2006.229.07:29:06.41#ibcon#read 3, iclass 29, count 2 2006.229.07:29:06.41#ibcon#about to read 4, iclass 29, count 2 2006.229.07:29:06.41#ibcon#read 4, iclass 29, count 2 2006.229.07:29:06.41#ibcon#about to read 5, iclass 29, count 2 2006.229.07:29:06.41#ibcon#read 5, iclass 29, count 2 2006.229.07:29:06.41#ibcon#about to read 6, iclass 29, count 2 2006.229.07:29:06.41#ibcon#read 6, iclass 29, count 2 2006.229.07:29:06.41#ibcon#end of sib2, iclass 29, count 2 2006.229.07:29:06.41#ibcon#*after write, iclass 29, count 2 2006.229.07:29:06.41#ibcon#*before return 0, iclass 29, count 2 2006.229.07:29:06.41#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:06.41#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.07:29:06.41#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.07:29:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.07:29:06.41#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:06.53#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:06.53#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:06.53#ibcon#enter wrdev, iclass 29, count 0 2006.229.07:29:06.53#ibcon#first serial, iclass 29, count 0 2006.229.07:29:06.53#ibcon#enter sib2, iclass 29, count 0 2006.229.07:29:06.53#ibcon#flushed, iclass 29, count 0 2006.229.07:29:06.53#ibcon#about to write, iclass 29, count 0 2006.229.07:29:06.53#ibcon#wrote, iclass 29, count 0 2006.229.07:29:06.53#ibcon#about to read 3, iclass 29, count 0 2006.229.07:29:06.55#ibcon#read 3, iclass 29, count 0 2006.229.07:29:06.55#ibcon#about to read 4, iclass 29, count 0 2006.229.07:29:06.55#ibcon#read 4, iclass 29, count 0 2006.229.07:29:06.55#ibcon#about to read 5, iclass 29, count 0 2006.229.07:29:06.55#ibcon#read 5, iclass 29, count 0 2006.229.07:29:06.55#ibcon#about to read 6, iclass 29, count 0 2006.229.07:29:06.55#ibcon#read 6, iclass 29, count 0 2006.229.07:29:06.55#ibcon#end of sib2, iclass 29, count 0 2006.229.07:29:06.55#ibcon#*mode == 0, iclass 29, count 0 2006.229.07:29:06.55#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.07:29:06.55#ibcon#[27=USB\r\n] 2006.229.07:29:06.55#ibcon#*before write, iclass 29, count 0 2006.229.07:29:06.55#ibcon#enter sib2, iclass 29, count 0 2006.229.07:29:06.55#ibcon#flushed, iclass 29, count 0 2006.229.07:29:06.55#ibcon#about to write, iclass 29, count 0 2006.229.07:29:06.55#ibcon#wrote, iclass 29, count 0 2006.229.07:29:06.55#ibcon#about to read 3, iclass 29, count 0 2006.229.07:29:06.58#ibcon#read 3, iclass 29, count 0 2006.229.07:29:06.58#ibcon#about to read 4, iclass 29, count 0 2006.229.07:29:06.58#ibcon#read 4, iclass 29, count 0 2006.229.07:29:06.58#ibcon#about to read 5, iclass 29, count 0 2006.229.07:29:06.58#ibcon#read 5, iclass 29, count 0 2006.229.07:29:06.58#ibcon#about to read 6, iclass 29, count 0 2006.229.07:29:06.58#ibcon#read 6, iclass 29, count 0 2006.229.07:29:06.58#ibcon#end of sib2, iclass 29, count 0 2006.229.07:29:06.58#ibcon#*after write, iclass 29, count 0 2006.229.07:29:06.58#ibcon#*before return 0, iclass 29, count 0 2006.229.07:29:06.58#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:06.58#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.07:29:06.58#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.07:29:06.58#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.07:29:06.58$vck44/vabw=wide 2006.229.07:29:06.59#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.07:29:06.59#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.07:29:06.59#ibcon#ireg 8 cls_cnt 0 2006.229.07:29:06.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:06.59#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:06.59#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:06.59#ibcon#enter wrdev, iclass 31, count 0 2006.229.07:29:06.59#ibcon#first serial, iclass 31, count 0 2006.229.07:29:06.59#ibcon#enter sib2, iclass 31, count 0 2006.229.07:29:06.59#ibcon#flushed, iclass 31, count 0 2006.229.07:29:06.59#ibcon#about to write, iclass 31, count 0 2006.229.07:29:06.59#ibcon#wrote, iclass 31, count 0 2006.229.07:29:06.59#ibcon#about to read 3, iclass 31, count 0 2006.229.07:29:06.60#ibcon#read 3, iclass 31, count 0 2006.229.07:29:06.60#ibcon#about to read 4, iclass 31, count 0 2006.229.07:29:06.60#ibcon#read 4, iclass 31, count 0 2006.229.07:29:06.60#ibcon#about to read 5, iclass 31, count 0 2006.229.07:29:06.60#ibcon#read 5, iclass 31, count 0 2006.229.07:29:06.60#ibcon#about to read 6, iclass 31, count 0 2006.229.07:29:06.60#ibcon#read 6, iclass 31, count 0 2006.229.07:29:06.60#ibcon#end of sib2, iclass 31, count 0 2006.229.07:29:06.60#ibcon#*mode == 0, iclass 31, count 0 2006.229.07:29:06.60#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.07:29:06.60#ibcon#[25=BW32\r\n] 2006.229.07:29:06.60#ibcon#*before write, iclass 31, count 0 2006.229.07:29:06.60#ibcon#enter sib2, iclass 31, count 0 2006.229.07:29:06.60#ibcon#flushed, iclass 31, count 0 2006.229.07:29:06.60#ibcon#about to write, iclass 31, count 0 2006.229.07:29:06.60#ibcon#wrote, iclass 31, count 0 2006.229.07:29:06.60#ibcon#about to read 3, iclass 31, count 0 2006.229.07:29:06.63#ibcon#read 3, iclass 31, count 0 2006.229.07:29:06.63#ibcon#about to read 4, iclass 31, count 0 2006.229.07:29:06.63#ibcon#read 4, iclass 31, count 0 2006.229.07:29:06.63#ibcon#about to read 5, iclass 31, count 0 2006.229.07:29:06.63#ibcon#read 5, iclass 31, count 0 2006.229.07:29:06.63#ibcon#about to read 6, iclass 31, count 0 2006.229.07:29:06.63#ibcon#read 6, iclass 31, count 0 2006.229.07:29:06.63#ibcon#end of sib2, iclass 31, count 0 2006.229.07:29:06.63#ibcon#*after write, iclass 31, count 0 2006.229.07:29:06.63#ibcon#*before return 0, iclass 31, count 0 2006.229.07:29:06.63#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:06.63#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.07:29:06.63#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.07:29:06.63#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.07:29:06.63$vck44/vbbw=wide 2006.229.07:29:06.63#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.07:29:06.63#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.07:29:06.63#ibcon#ireg 8 cls_cnt 0 2006.229.07:29:06.64#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:29:06.69#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:29:06.69#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:29:06.69#ibcon#enter wrdev, iclass 33, count 0 2006.229.07:29:06.69#ibcon#first serial, iclass 33, count 0 2006.229.07:29:06.69#ibcon#enter sib2, iclass 33, count 0 2006.229.07:29:06.69#ibcon#flushed, iclass 33, count 0 2006.229.07:29:06.69#ibcon#about to write, iclass 33, count 0 2006.229.07:29:06.69#ibcon#wrote, iclass 33, count 0 2006.229.07:29:06.69#ibcon#about to read 3, iclass 33, count 0 2006.229.07:29:06.71#ibcon#read 3, iclass 33, count 0 2006.229.07:29:06.71#ibcon#about to read 4, iclass 33, count 0 2006.229.07:29:06.71#ibcon#read 4, iclass 33, count 0 2006.229.07:29:06.71#ibcon#about to read 5, iclass 33, count 0 2006.229.07:29:06.71#ibcon#read 5, iclass 33, count 0 2006.229.07:29:06.71#ibcon#about to read 6, iclass 33, count 0 2006.229.07:29:06.71#ibcon#read 6, iclass 33, count 0 2006.229.07:29:06.71#ibcon#end of sib2, iclass 33, count 0 2006.229.07:29:06.71#ibcon#*mode == 0, iclass 33, count 0 2006.229.07:29:06.71#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.07:29:06.71#ibcon#[27=BW32\r\n] 2006.229.07:29:06.71#ibcon#*before write, iclass 33, count 0 2006.229.07:29:06.71#ibcon#enter sib2, iclass 33, count 0 2006.229.07:29:06.71#ibcon#flushed, iclass 33, count 0 2006.229.07:29:06.71#ibcon#about to write, iclass 33, count 0 2006.229.07:29:06.71#ibcon#wrote, iclass 33, count 0 2006.229.07:29:06.71#ibcon#about to read 3, iclass 33, count 0 2006.229.07:29:06.74#ibcon#read 3, iclass 33, count 0 2006.229.07:29:06.74#ibcon#about to read 4, iclass 33, count 0 2006.229.07:29:06.74#ibcon#read 4, iclass 33, count 0 2006.229.07:29:06.74#ibcon#about to read 5, iclass 33, count 0 2006.229.07:29:06.74#ibcon#read 5, iclass 33, count 0 2006.229.07:29:06.74#ibcon#about to read 6, iclass 33, count 0 2006.229.07:29:06.74#ibcon#read 6, iclass 33, count 0 2006.229.07:29:06.74#ibcon#end of sib2, iclass 33, count 0 2006.229.07:29:06.74#ibcon#*after write, iclass 33, count 0 2006.229.07:29:06.74#ibcon#*before return 0, iclass 33, count 0 2006.229.07:29:06.74#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:29:06.74#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:29:06.74#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.07:29:06.74#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.07:29:06.74$setupk4/ifdk4 2006.229.07:29:06.75$ifdk4/lo= 2006.229.07:29:06.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:29:06.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:29:06.75$ifdk4/patch= 2006.229.07:29:06.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:29:06.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:29:06.75$setupk4/!*+20s 2006.229.07:29:09.69#abcon#<5=/06 3.3 5.5 30.04 921000.2\r\n> 2006.229.07:29:09.71#abcon#{5=INTERFACE CLEAR} 2006.229.07:29:09.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:29:14.14#trakl#Source acquired 2006.229.07:29:15.14#flagr#flagr/antenna,acquired 2006.229.07:29:19.86#abcon#<5=/06 3.2 5.5 30.04 921000.2\r\n> 2006.229.07:29:19.88#abcon#{5=INTERFACE CLEAR} 2006.229.07:29:19.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:29:21.40$setupk4/"tpicd 2006.229.07:29:21.40$setupk4/echo=off 2006.229.07:29:21.40$setupk4/xlog=off 2006.229.07:29:21.40:!2006.229.07:32:37 2006.229.07:32:37.00:preob 2006.229.07:32:37.13/onsource/TRACKING 2006.229.07:32:37.13:!2006.229.07:32:47 2006.229.07:32:47.00:"tape 2006.229.07:32:47.00:"st=record 2006.229.07:32:47.00:data_valid=on 2006.229.07:32:47.00:midob 2006.229.07:32:48.13/onsource/TRACKING 2006.229.07:32:48.13/wx/30.03,1000.2,92 2006.229.07:32:48.18/cable/+6.3979E-03 2006.229.07:32:49.27/va/01,08,usb,yes,30,32 2006.229.07:32:49.27/va/02,07,usb,yes,33,33 2006.229.07:32:49.27/va/03,06,usb,yes,40,43 2006.229.07:32:49.27/va/04,07,usb,yes,34,35 2006.229.07:32:49.27/va/05,04,usb,yes,30,30 2006.229.07:32:49.27/va/06,04,usb,yes,34,33 2006.229.07:32:49.27/va/07,05,usb,yes,30,30 2006.229.07:32:49.27/va/08,06,usb,yes,21,27 2006.229.07:32:49.50/valo/01,524.99,yes,locked 2006.229.07:32:49.50/valo/02,534.99,yes,locked 2006.229.07:32:49.50/valo/03,564.99,yes,locked 2006.229.07:32:49.50/valo/04,624.99,yes,locked 2006.229.07:32:49.50/valo/05,734.99,yes,locked 2006.229.07:32:49.50/valo/06,814.99,yes,locked 2006.229.07:32:49.50/valo/07,864.99,yes,locked 2006.229.07:32:49.50/valo/08,884.99,yes,locked 2006.229.07:32:50.59/vb/01,04,usb,yes,32,29 2006.229.07:32:50.59/vb/02,04,usb,yes,34,34 2006.229.07:32:50.59/vb/03,04,usb,yes,31,34 2006.229.07:32:50.59/vb/04,04,usb,yes,35,34 2006.229.07:32:50.59/vb/05,04,usb,yes,27,30 2006.229.07:32:50.59/vb/06,04,usb,yes,32,28 2006.229.07:32:50.59/vb/07,04,usb,yes,32,32 2006.229.07:32:50.59/vb/08,04,usb,yes,29,33 2006.229.07:32:50.83/vblo/01,629.99,yes,locked 2006.229.07:32:50.83/vblo/02,634.99,yes,locked 2006.229.07:32:50.83/vblo/03,649.99,yes,locked 2006.229.07:32:50.83/vblo/04,679.99,yes,locked 2006.229.07:32:50.83/vblo/05,709.99,yes,locked 2006.229.07:32:50.83/vblo/06,719.99,yes,locked 2006.229.07:32:50.83/vblo/07,734.99,yes,locked 2006.229.07:32:50.83/vblo/08,744.99,yes,locked 2006.229.07:32:50.98/vabw/8 2006.229.07:32:51.13/vbbw/8 2006.229.07:32:51.22/xfe/off,on,11.7 2006.229.07:32:51.59/ifatt/23,28,28,28 2006.229.07:32:52.07/fmout-gps/S +4.51E-07 2006.229.07:32:52.11:!2006.229.07:33:27 2006.229.07:33:27.01:data_valid=off 2006.229.07:33:27.02:"et 2006.229.07:33:27.02:!+3s 2006.229.07:33:30.05:"tape 2006.229.07:33:30.06:postob 2006.229.07:33:30.29/cable/+6.3957E-03 2006.229.07:33:30.30/wx/30.02,1000.2,92 2006.229.07:33:30.35/fmout-gps/S +4.51E-07 2006.229.07:33:30.36:scan_name=229-0735,jd0608,40 2006.229.07:33:30.36:source=1424-418,142756.30,-420619.4,2000.0,cw 2006.229.07:33:32.14#flagr#flagr/antenna,new-source 2006.229.07:33:32.15:checkk5 2006.229.07:33:32.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:33:32.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:33:33.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:33:33.81/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:33:34.20/chk_obsdata//k5ts1/T2290732??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:33:34.59/chk_obsdata//k5ts2/T2290732??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:33:35.00/chk_obsdata//k5ts3/T2290732??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:33:35.40/chk_obsdata//k5ts4/T2290732??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:33:36.12/k5log//k5ts1_log_newline 2006.229.07:33:36.83/k5log//k5ts2_log_newline 2006.229.07:33:37.56/k5log//k5ts3_log_newline 2006.229.07:33:38.30/k5log//k5ts4_log_newline 2006.229.07:33:38.32/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:33:38.32:setupk4=1 2006.229.07:33:38.32$setupk4/echo=on 2006.229.07:33:38.32$setupk4/pcalon 2006.229.07:33:38.32$pcalon/"no phase cal control is implemented here 2006.229.07:33:38.32$setupk4/"tpicd=stop 2006.229.07:33:38.32$setupk4/"rec=synch_on 2006.229.07:33:38.32$setupk4/"rec_mode=128 2006.229.07:33:38.32$setupk4/!* 2006.229.07:33:38.32$setupk4/recpk4 2006.229.07:33:38.32$recpk4/recpatch= 2006.229.07:33:38.33$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:33:38.33$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:33:38.33$setupk4/vck44 2006.229.07:33:38.33$vck44/valo=1,524.99 2006.229.07:33:38.33#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.07:33:38.33#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.07:33:38.33#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:38.33#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:38.33#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:38.33#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:38.33#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:33:38.33#ibcon#first serial, iclass 38, count 0 2006.229.07:33:38.33#ibcon#enter sib2, iclass 38, count 0 2006.229.07:33:38.33#ibcon#flushed, iclass 38, count 0 2006.229.07:33:38.33#ibcon#about to write, iclass 38, count 0 2006.229.07:33:38.33#ibcon#wrote, iclass 38, count 0 2006.229.07:33:38.33#ibcon#about to read 3, iclass 38, count 0 2006.229.07:33:38.35#ibcon#read 3, iclass 38, count 0 2006.229.07:33:38.35#ibcon#about to read 4, iclass 38, count 0 2006.229.07:33:38.35#ibcon#read 4, iclass 38, count 0 2006.229.07:33:38.35#ibcon#about to read 5, iclass 38, count 0 2006.229.07:33:38.35#ibcon#read 5, iclass 38, count 0 2006.229.07:33:38.35#ibcon#about to read 6, iclass 38, count 0 2006.229.07:33:38.35#ibcon#read 6, iclass 38, count 0 2006.229.07:33:38.35#ibcon#end of sib2, iclass 38, count 0 2006.229.07:33:38.35#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:33:38.35#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:33:38.35#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:33:38.35#ibcon#*before write, iclass 38, count 0 2006.229.07:33:38.35#ibcon#enter sib2, iclass 38, count 0 2006.229.07:33:38.35#ibcon#flushed, iclass 38, count 0 2006.229.07:33:38.35#ibcon#about to write, iclass 38, count 0 2006.229.07:33:38.35#ibcon#wrote, iclass 38, count 0 2006.229.07:33:38.35#ibcon#about to read 3, iclass 38, count 0 2006.229.07:33:38.40#ibcon#read 3, iclass 38, count 0 2006.229.07:33:38.40#ibcon#about to read 4, iclass 38, count 0 2006.229.07:33:38.40#ibcon#read 4, iclass 38, count 0 2006.229.07:33:38.40#ibcon#about to read 5, iclass 38, count 0 2006.229.07:33:38.40#ibcon#read 5, iclass 38, count 0 2006.229.07:33:38.40#ibcon#about to read 6, iclass 38, count 0 2006.229.07:33:38.40#ibcon#read 6, iclass 38, count 0 2006.229.07:33:38.40#ibcon#end of sib2, iclass 38, count 0 2006.229.07:33:38.40#ibcon#*after write, iclass 38, count 0 2006.229.07:33:38.40#ibcon#*before return 0, iclass 38, count 0 2006.229.07:33:38.40#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:38.40#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:38.40#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:33:38.40#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:33:38.42$vck44/va=1,8 2006.229.07:33:38.42#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.07:33:38.42#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.07:33:38.42#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:38.42#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:38.42#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:38.42#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:38.42#ibcon#enter wrdev, iclass 40, count 2 2006.229.07:33:38.42#ibcon#first serial, iclass 40, count 2 2006.229.07:33:38.42#ibcon#enter sib2, iclass 40, count 2 2006.229.07:33:38.42#ibcon#flushed, iclass 40, count 2 2006.229.07:33:38.42#ibcon#about to write, iclass 40, count 2 2006.229.07:33:38.42#ibcon#wrote, iclass 40, count 2 2006.229.07:33:38.42#ibcon#about to read 3, iclass 40, count 2 2006.229.07:33:38.43#ibcon#read 3, iclass 40, count 2 2006.229.07:33:38.43#ibcon#about to read 4, iclass 40, count 2 2006.229.07:33:38.43#ibcon#read 4, iclass 40, count 2 2006.229.07:33:38.43#ibcon#about to read 5, iclass 40, count 2 2006.229.07:33:38.43#ibcon#read 5, iclass 40, count 2 2006.229.07:33:38.43#ibcon#about to read 6, iclass 40, count 2 2006.229.07:33:38.43#ibcon#read 6, iclass 40, count 2 2006.229.07:33:38.43#ibcon#end of sib2, iclass 40, count 2 2006.229.07:33:38.43#ibcon#*mode == 0, iclass 40, count 2 2006.229.07:33:38.43#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.07:33:38.43#ibcon#[25=AT01-08\r\n] 2006.229.07:33:38.43#ibcon#*before write, iclass 40, count 2 2006.229.07:33:38.43#ibcon#enter sib2, iclass 40, count 2 2006.229.07:33:38.43#ibcon#flushed, iclass 40, count 2 2006.229.07:33:38.43#ibcon#about to write, iclass 40, count 2 2006.229.07:33:38.43#ibcon#wrote, iclass 40, count 2 2006.229.07:33:38.43#ibcon#about to read 3, iclass 40, count 2 2006.229.07:33:38.46#ibcon#read 3, iclass 40, count 2 2006.229.07:33:38.46#ibcon#about to read 4, iclass 40, count 2 2006.229.07:33:38.46#ibcon#read 4, iclass 40, count 2 2006.229.07:33:38.46#ibcon#about to read 5, iclass 40, count 2 2006.229.07:33:38.46#ibcon#read 5, iclass 40, count 2 2006.229.07:33:38.46#ibcon#about to read 6, iclass 40, count 2 2006.229.07:33:38.46#ibcon#read 6, iclass 40, count 2 2006.229.07:33:38.46#ibcon#end of sib2, iclass 40, count 2 2006.229.07:33:38.46#ibcon#*after write, iclass 40, count 2 2006.229.07:33:38.46#ibcon#*before return 0, iclass 40, count 2 2006.229.07:33:38.46#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:38.46#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:38.46#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.07:33:38.46#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:38.46#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:38.58#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:38.58#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:38.58#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:33:38.58#ibcon#first serial, iclass 40, count 0 2006.229.07:33:38.58#ibcon#enter sib2, iclass 40, count 0 2006.229.07:33:38.58#ibcon#flushed, iclass 40, count 0 2006.229.07:33:38.58#ibcon#about to write, iclass 40, count 0 2006.229.07:33:38.58#ibcon#wrote, iclass 40, count 0 2006.229.07:33:38.58#ibcon#about to read 3, iclass 40, count 0 2006.229.07:33:38.60#ibcon#read 3, iclass 40, count 0 2006.229.07:33:38.60#ibcon#about to read 4, iclass 40, count 0 2006.229.07:33:38.60#ibcon#read 4, iclass 40, count 0 2006.229.07:33:38.60#ibcon#about to read 5, iclass 40, count 0 2006.229.07:33:38.60#ibcon#read 5, iclass 40, count 0 2006.229.07:33:38.60#ibcon#about to read 6, iclass 40, count 0 2006.229.07:33:38.60#ibcon#read 6, iclass 40, count 0 2006.229.07:33:38.60#ibcon#end of sib2, iclass 40, count 0 2006.229.07:33:38.60#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:33:38.60#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:33:38.60#ibcon#[25=USB\r\n] 2006.229.07:33:38.60#ibcon#*before write, iclass 40, count 0 2006.229.07:33:38.60#ibcon#enter sib2, iclass 40, count 0 2006.229.07:33:38.60#ibcon#flushed, iclass 40, count 0 2006.229.07:33:38.60#ibcon#about to write, iclass 40, count 0 2006.229.07:33:38.60#ibcon#wrote, iclass 40, count 0 2006.229.07:33:38.60#ibcon#about to read 3, iclass 40, count 0 2006.229.07:33:38.63#ibcon#read 3, iclass 40, count 0 2006.229.07:33:38.63#ibcon#about to read 4, iclass 40, count 0 2006.229.07:33:38.63#ibcon#read 4, iclass 40, count 0 2006.229.07:33:38.63#ibcon#about to read 5, iclass 40, count 0 2006.229.07:33:38.63#ibcon#read 5, iclass 40, count 0 2006.229.07:33:38.63#ibcon#about to read 6, iclass 40, count 0 2006.229.07:33:38.63#ibcon#read 6, iclass 40, count 0 2006.229.07:33:38.63#ibcon#end of sib2, iclass 40, count 0 2006.229.07:33:38.63#ibcon#*after write, iclass 40, count 0 2006.229.07:33:38.63#ibcon#*before return 0, iclass 40, count 0 2006.229.07:33:38.63#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:38.63#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:38.63#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:33:38.63#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:33:38.63$vck44/valo=2,534.99 2006.229.07:33:38.63#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.07:33:38.63#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.07:33:38.63#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:38.63#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:38.63#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:38.63#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:38.63#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:33:38.63#ibcon#first serial, iclass 4, count 0 2006.229.07:33:38.63#ibcon#enter sib2, iclass 4, count 0 2006.229.07:33:38.63#ibcon#flushed, iclass 4, count 0 2006.229.07:33:38.63#ibcon#about to write, iclass 4, count 0 2006.229.07:33:38.63#ibcon#wrote, iclass 4, count 0 2006.229.07:33:38.63#ibcon#about to read 3, iclass 4, count 0 2006.229.07:33:38.65#ibcon#read 3, iclass 4, count 0 2006.229.07:33:38.65#ibcon#about to read 4, iclass 4, count 0 2006.229.07:33:38.65#ibcon#read 4, iclass 4, count 0 2006.229.07:33:38.65#ibcon#about to read 5, iclass 4, count 0 2006.229.07:33:38.65#ibcon#read 5, iclass 4, count 0 2006.229.07:33:38.65#ibcon#about to read 6, iclass 4, count 0 2006.229.07:33:38.65#ibcon#read 6, iclass 4, count 0 2006.229.07:33:38.65#ibcon#end of sib2, iclass 4, count 0 2006.229.07:33:38.65#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:33:38.65#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:33:38.65#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:33:38.65#ibcon#*before write, iclass 4, count 0 2006.229.07:33:38.65#ibcon#enter sib2, iclass 4, count 0 2006.229.07:33:38.65#ibcon#flushed, iclass 4, count 0 2006.229.07:33:38.65#ibcon#about to write, iclass 4, count 0 2006.229.07:33:38.65#ibcon#wrote, iclass 4, count 0 2006.229.07:33:38.65#ibcon#about to read 3, iclass 4, count 0 2006.229.07:33:38.69#ibcon#read 3, iclass 4, count 0 2006.229.07:33:38.69#ibcon#about to read 4, iclass 4, count 0 2006.229.07:33:38.69#ibcon#read 4, iclass 4, count 0 2006.229.07:33:38.69#ibcon#about to read 5, iclass 4, count 0 2006.229.07:33:38.69#ibcon#read 5, iclass 4, count 0 2006.229.07:33:38.69#ibcon#about to read 6, iclass 4, count 0 2006.229.07:33:38.69#ibcon#read 6, iclass 4, count 0 2006.229.07:33:38.69#ibcon#end of sib2, iclass 4, count 0 2006.229.07:33:38.69#ibcon#*after write, iclass 4, count 0 2006.229.07:33:38.69#ibcon#*before return 0, iclass 4, count 0 2006.229.07:33:38.69#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:38.69#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:38.69#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:33:38.69#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:33:38.69$vck44/va=2,7 2006.229.07:33:38.69#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.07:33:38.69#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.07:33:38.69#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:38.69#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:38.75#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:38.75#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:38.75#ibcon#enter wrdev, iclass 6, count 2 2006.229.07:33:38.75#ibcon#first serial, iclass 6, count 2 2006.229.07:33:38.75#ibcon#enter sib2, iclass 6, count 2 2006.229.07:33:38.75#ibcon#flushed, iclass 6, count 2 2006.229.07:33:38.75#ibcon#about to write, iclass 6, count 2 2006.229.07:33:38.75#ibcon#wrote, iclass 6, count 2 2006.229.07:33:38.75#ibcon#about to read 3, iclass 6, count 2 2006.229.07:33:38.77#ibcon#read 3, iclass 6, count 2 2006.229.07:33:38.77#ibcon#about to read 4, iclass 6, count 2 2006.229.07:33:38.77#ibcon#read 4, iclass 6, count 2 2006.229.07:33:38.77#ibcon#about to read 5, iclass 6, count 2 2006.229.07:33:38.77#ibcon#read 5, iclass 6, count 2 2006.229.07:33:38.77#ibcon#about to read 6, iclass 6, count 2 2006.229.07:33:38.77#ibcon#read 6, iclass 6, count 2 2006.229.07:33:38.77#ibcon#end of sib2, iclass 6, count 2 2006.229.07:33:38.77#ibcon#*mode == 0, iclass 6, count 2 2006.229.07:33:38.77#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.07:33:38.77#ibcon#[25=AT02-07\r\n] 2006.229.07:33:38.77#ibcon#*before write, iclass 6, count 2 2006.229.07:33:38.77#ibcon#enter sib2, iclass 6, count 2 2006.229.07:33:38.77#ibcon#flushed, iclass 6, count 2 2006.229.07:33:38.77#ibcon#about to write, iclass 6, count 2 2006.229.07:33:38.77#ibcon#wrote, iclass 6, count 2 2006.229.07:33:38.77#ibcon#about to read 3, iclass 6, count 2 2006.229.07:33:38.80#ibcon#read 3, iclass 6, count 2 2006.229.07:33:38.80#ibcon#about to read 4, iclass 6, count 2 2006.229.07:33:38.80#ibcon#read 4, iclass 6, count 2 2006.229.07:33:38.80#ibcon#about to read 5, iclass 6, count 2 2006.229.07:33:38.80#ibcon#read 5, iclass 6, count 2 2006.229.07:33:38.80#ibcon#about to read 6, iclass 6, count 2 2006.229.07:33:38.80#ibcon#read 6, iclass 6, count 2 2006.229.07:33:38.80#ibcon#end of sib2, iclass 6, count 2 2006.229.07:33:38.80#ibcon#*after write, iclass 6, count 2 2006.229.07:33:38.80#ibcon#*before return 0, iclass 6, count 2 2006.229.07:33:38.80#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:38.80#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:38.80#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.07:33:38.80#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:38.80#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:38.92#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:38.92#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:38.92#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:33:38.92#ibcon#first serial, iclass 6, count 0 2006.229.07:33:38.92#ibcon#enter sib2, iclass 6, count 0 2006.229.07:33:38.92#ibcon#flushed, iclass 6, count 0 2006.229.07:33:38.92#ibcon#about to write, iclass 6, count 0 2006.229.07:33:38.92#ibcon#wrote, iclass 6, count 0 2006.229.07:33:38.92#ibcon#about to read 3, iclass 6, count 0 2006.229.07:33:38.94#ibcon#read 3, iclass 6, count 0 2006.229.07:33:38.94#ibcon#about to read 4, iclass 6, count 0 2006.229.07:33:38.94#ibcon#read 4, iclass 6, count 0 2006.229.07:33:38.94#ibcon#about to read 5, iclass 6, count 0 2006.229.07:33:38.94#ibcon#read 5, iclass 6, count 0 2006.229.07:33:38.94#ibcon#about to read 6, iclass 6, count 0 2006.229.07:33:38.94#ibcon#read 6, iclass 6, count 0 2006.229.07:33:38.94#ibcon#end of sib2, iclass 6, count 0 2006.229.07:33:38.94#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:33:38.94#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:33:38.94#ibcon#[25=USB\r\n] 2006.229.07:33:38.94#ibcon#*before write, iclass 6, count 0 2006.229.07:33:38.94#ibcon#enter sib2, iclass 6, count 0 2006.229.07:33:38.94#ibcon#flushed, iclass 6, count 0 2006.229.07:33:38.94#ibcon#about to write, iclass 6, count 0 2006.229.07:33:38.94#ibcon#wrote, iclass 6, count 0 2006.229.07:33:38.94#ibcon#about to read 3, iclass 6, count 0 2006.229.07:33:38.97#ibcon#read 3, iclass 6, count 0 2006.229.07:33:38.97#ibcon#about to read 4, iclass 6, count 0 2006.229.07:33:38.97#ibcon#read 4, iclass 6, count 0 2006.229.07:33:38.97#ibcon#about to read 5, iclass 6, count 0 2006.229.07:33:38.97#ibcon#read 5, iclass 6, count 0 2006.229.07:33:38.97#ibcon#about to read 6, iclass 6, count 0 2006.229.07:33:38.97#ibcon#read 6, iclass 6, count 0 2006.229.07:33:38.97#ibcon#end of sib2, iclass 6, count 0 2006.229.07:33:38.97#ibcon#*after write, iclass 6, count 0 2006.229.07:33:38.97#ibcon#*before return 0, iclass 6, count 0 2006.229.07:33:38.97#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:38.97#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:38.97#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:33:38.97#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:33:38.97$vck44/valo=3,564.99 2006.229.07:33:38.97#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.07:33:38.97#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.07:33:38.97#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:38.97#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:38.97#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:38.97#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:38.97#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:33:38.97#ibcon#first serial, iclass 10, count 0 2006.229.07:33:38.97#ibcon#enter sib2, iclass 10, count 0 2006.229.07:33:38.97#ibcon#flushed, iclass 10, count 0 2006.229.07:33:38.97#ibcon#about to write, iclass 10, count 0 2006.229.07:33:38.97#ibcon#wrote, iclass 10, count 0 2006.229.07:33:38.97#ibcon#about to read 3, iclass 10, count 0 2006.229.07:33:38.99#ibcon#read 3, iclass 10, count 0 2006.229.07:33:38.99#ibcon#about to read 4, iclass 10, count 0 2006.229.07:33:38.99#ibcon#read 4, iclass 10, count 0 2006.229.07:33:38.99#ibcon#about to read 5, iclass 10, count 0 2006.229.07:33:38.99#ibcon#read 5, iclass 10, count 0 2006.229.07:33:38.99#ibcon#about to read 6, iclass 10, count 0 2006.229.07:33:38.99#ibcon#read 6, iclass 10, count 0 2006.229.07:33:38.99#ibcon#end of sib2, iclass 10, count 0 2006.229.07:33:38.99#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:33:38.99#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:33:38.99#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:33:38.99#ibcon#*before write, iclass 10, count 0 2006.229.07:33:38.99#ibcon#enter sib2, iclass 10, count 0 2006.229.07:33:38.99#ibcon#flushed, iclass 10, count 0 2006.229.07:33:38.99#ibcon#about to write, iclass 10, count 0 2006.229.07:33:38.99#ibcon#wrote, iclass 10, count 0 2006.229.07:33:38.99#ibcon#about to read 3, iclass 10, count 0 2006.229.07:33:39.03#ibcon#read 3, iclass 10, count 0 2006.229.07:33:39.03#ibcon#about to read 4, iclass 10, count 0 2006.229.07:33:39.03#ibcon#read 4, iclass 10, count 0 2006.229.07:33:39.03#ibcon#about to read 5, iclass 10, count 0 2006.229.07:33:39.03#ibcon#read 5, iclass 10, count 0 2006.229.07:33:39.03#ibcon#about to read 6, iclass 10, count 0 2006.229.07:33:39.03#ibcon#read 6, iclass 10, count 0 2006.229.07:33:39.03#ibcon#end of sib2, iclass 10, count 0 2006.229.07:33:39.03#ibcon#*after write, iclass 10, count 0 2006.229.07:33:39.03#ibcon#*before return 0, iclass 10, count 0 2006.229.07:33:39.03#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:39.03#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:39.03#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:33:39.03#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:33:39.03$vck44/va=3,6 2006.229.07:33:39.03#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.07:33:39.03#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.07:33:39.03#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:39.03#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:39.09#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:39.09#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:39.09#ibcon#enter wrdev, iclass 12, count 2 2006.229.07:33:39.09#ibcon#first serial, iclass 12, count 2 2006.229.07:33:39.09#ibcon#enter sib2, iclass 12, count 2 2006.229.07:33:39.09#ibcon#flushed, iclass 12, count 2 2006.229.07:33:39.09#ibcon#about to write, iclass 12, count 2 2006.229.07:33:39.09#ibcon#wrote, iclass 12, count 2 2006.229.07:33:39.09#ibcon#about to read 3, iclass 12, count 2 2006.229.07:33:39.11#ibcon#read 3, iclass 12, count 2 2006.229.07:33:39.11#ibcon#about to read 4, iclass 12, count 2 2006.229.07:33:39.11#ibcon#read 4, iclass 12, count 2 2006.229.07:33:39.11#ibcon#about to read 5, iclass 12, count 2 2006.229.07:33:39.11#ibcon#read 5, iclass 12, count 2 2006.229.07:33:39.11#ibcon#about to read 6, iclass 12, count 2 2006.229.07:33:39.11#ibcon#read 6, iclass 12, count 2 2006.229.07:33:39.11#ibcon#end of sib2, iclass 12, count 2 2006.229.07:33:39.11#ibcon#*mode == 0, iclass 12, count 2 2006.229.07:33:39.11#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.07:33:39.11#ibcon#[25=AT03-06\r\n] 2006.229.07:33:39.11#ibcon#*before write, iclass 12, count 2 2006.229.07:33:39.11#ibcon#enter sib2, iclass 12, count 2 2006.229.07:33:39.11#ibcon#flushed, iclass 12, count 2 2006.229.07:33:39.11#ibcon#about to write, iclass 12, count 2 2006.229.07:33:39.11#ibcon#wrote, iclass 12, count 2 2006.229.07:33:39.11#ibcon#about to read 3, iclass 12, count 2 2006.229.07:33:39.14#ibcon#read 3, iclass 12, count 2 2006.229.07:33:39.14#ibcon#about to read 4, iclass 12, count 2 2006.229.07:33:39.14#ibcon#read 4, iclass 12, count 2 2006.229.07:33:39.14#ibcon#about to read 5, iclass 12, count 2 2006.229.07:33:39.14#ibcon#read 5, iclass 12, count 2 2006.229.07:33:39.14#ibcon#about to read 6, iclass 12, count 2 2006.229.07:33:39.14#ibcon#read 6, iclass 12, count 2 2006.229.07:33:39.14#ibcon#end of sib2, iclass 12, count 2 2006.229.07:33:39.14#ibcon#*after write, iclass 12, count 2 2006.229.07:33:39.14#ibcon#*before return 0, iclass 12, count 2 2006.229.07:33:39.14#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:39.14#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:39.14#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.07:33:39.14#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:39.14#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:39.26#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:39.26#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:39.26#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:33:39.26#ibcon#first serial, iclass 12, count 0 2006.229.07:33:39.26#ibcon#enter sib2, iclass 12, count 0 2006.229.07:33:39.26#ibcon#flushed, iclass 12, count 0 2006.229.07:33:39.26#ibcon#about to write, iclass 12, count 0 2006.229.07:33:39.26#ibcon#wrote, iclass 12, count 0 2006.229.07:33:39.26#ibcon#about to read 3, iclass 12, count 0 2006.229.07:33:39.28#ibcon#read 3, iclass 12, count 0 2006.229.07:33:39.28#ibcon#about to read 4, iclass 12, count 0 2006.229.07:33:39.28#ibcon#read 4, iclass 12, count 0 2006.229.07:33:39.28#ibcon#about to read 5, iclass 12, count 0 2006.229.07:33:39.28#ibcon#read 5, iclass 12, count 0 2006.229.07:33:39.28#ibcon#about to read 6, iclass 12, count 0 2006.229.07:33:39.28#ibcon#read 6, iclass 12, count 0 2006.229.07:33:39.28#ibcon#end of sib2, iclass 12, count 0 2006.229.07:33:39.28#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:33:39.28#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:33:39.28#ibcon#[25=USB\r\n] 2006.229.07:33:39.28#ibcon#*before write, iclass 12, count 0 2006.229.07:33:39.28#ibcon#enter sib2, iclass 12, count 0 2006.229.07:33:39.28#ibcon#flushed, iclass 12, count 0 2006.229.07:33:39.28#ibcon#about to write, iclass 12, count 0 2006.229.07:33:39.28#ibcon#wrote, iclass 12, count 0 2006.229.07:33:39.28#ibcon#about to read 3, iclass 12, count 0 2006.229.07:33:39.31#ibcon#read 3, iclass 12, count 0 2006.229.07:33:39.31#ibcon#about to read 4, iclass 12, count 0 2006.229.07:33:39.31#ibcon#read 4, iclass 12, count 0 2006.229.07:33:39.31#ibcon#about to read 5, iclass 12, count 0 2006.229.07:33:39.31#ibcon#read 5, iclass 12, count 0 2006.229.07:33:39.31#ibcon#about to read 6, iclass 12, count 0 2006.229.07:33:39.31#ibcon#read 6, iclass 12, count 0 2006.229.07:33:39.31#ibcon#end of sib2, iclass 12, count 0 2006.229.07:33:39.31#ibcon#*after write, iclass 12, count 0 2006.229.07:33:39.31#ibcon#*before return 0, iclass 12, count 0 2006.229.07:33:39.31#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:39.31#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:39.31#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:33:39.31#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:33:39.31$vck44/valo=4,624.99 2006.229.07:33:39.31#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.07:33:39.31#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.07:33:39.31#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:39.31#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:39.31#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:39.31#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:39.31#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:33:39.31#ibcon#first serial, iclass 14, count 0 2006.229.07:33:39.31#ibcon#enter sib2, iclass 14, count 0 2006.229.07:33:39.31#ibcon#flushed, iclass 14, count 0 2006.229.07:33:39.31#ibcon#about to write, iclass 14, count 0 2006.229.07:33:39.31#ibcon#wrote, iclass 14, count 0 2006.229.07:33:39.31#ibcon#about to read 3, iclass 14, count 0 2006.229.07:33:39.33#ibcon#read 3, iclass 14, count 0 2006.229.07:33:39.33#ibcon#about to read 4, iclass 14, count 0 2006.229.07:33:39.33#ibcon#read 4, iclass 14, count 0 2006.229.07:33:39.33#ibcon#about to read 5, iclass 14, count 0 2006.229.07:33:39.33#ibcon#read 5, iclass 14, count 0 2006.229.07:33:39.33#ibcon#about to read 6, iclass 14, count 0 2006.229.07:33:39.33#ibcon#read 6, iclass 14, count 0 2006.229.07:33:39.33#ibcon#end of sib2, iclass 14, count 0 2006.229.07:33:39.33#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:33:39.33#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:33:39.33#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:33:39.33#ibcon#*before write, iclass 14, count 0 2006.229.07:33:39.33#ibcon#enter sib2, iclass 14, count 0 2006.229.07:33:39.33#ibcon#flushed, iclass 14, count 0 2006.229.07:33:39.33#ibcon#about to write, iclass 14, count 0 2006.229.07:33:39.33#ibcon#wrote, iclass 14, count 0 2006.229.07:33:39.33#ibcon#about to read 3, iclass 14, count 0 2006.229.07:33:39.37#ibcon#read 3, iclass 14, count 0 2006.229.07:33:39.37#ibcon#about to read 4, iclass 14, count 0 2006.229.07:33:39.37#ibcon#read 4, iclass 14, count 0 2006.229.07:33:39.37#ibcon#about to read 5, iclass 14, count 0 2006.229.07:33:39.37#ibcon#read 5, iclass 14, count 0 2006.229.07:33:39.37#ibcon#about to read 6, iclass 14, count 0 2006.229.07:33:39.37#ibcon#read 6, iclass 14, count 0 2006.229.07:33:39.37#ibcon#end of sib2, iclass 14, count 0 2006.229.07:33:39.37#ibcon#*after write, iclass 14, count 0 2006.229.07:33:39.37#ibcon#*before return 0, iclass 14, count 0 2006.229.07:33:39.37#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:39.37#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:39.37#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:33:39.37#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:33:39.37$vck44/va=4,7 2006.229.07:33:39.37#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.07:33:39.37#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.07:33:39.37#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:39.37#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:39.43#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:39.43#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:39.43#ibcon#enter wrdev, iclass 16, count 2 2006.229.07:33:39.43#ibcon#first serial, iclass 16, count 2 2006.229.07:33:39.43#ibcon#enter sib2, iclass 16, count 2 2006.229.07:33:39.43#ibcon#flushed, iclass 16, count 2 2006.229.07:33:39.43#ibcon#about to write, iclass 16, count 2 2006.229.07:33:39.43#ibcon#wrote, iclass 16, count 2 2006.229.07:33:39.43#ibcon#about to read 3, iclass 16, count 2 2006.229.07:33:39.45#ibcon#read 3, iclass 16, count 2 2006.229.07:33:39.45#ibcon#about to read 4, iclass 16, count 2 2006.229.07:33:39.45#ibcon#read 4, iclass 16, count 2 2006.229.07:33:39.45#ibcon#about to read 5, iclass 16, count 2 2006.229.07:33:39.45#ibcon#read 5, iclass 16, count 2 2006.229.07:33:39.45#ibcon#about to read 6, iclass 16, count 2 2006.229.07:33:39.45#ibcon#read 6, iclass 16, count 2 2006.229.07:33:39.45#ibcon#end of sib2, iclass 16, count 2 2006.229.07:33:39.45#ibcon#*mode == 0, iclass 16, count 2 2006.229.07:33:39.45#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.07:33:39.45#ibcon#[25=AT04-07\r\n] 2006.229.07:33:39.45#ibcon#*before write, iclass 16, count 2 2006.229.07:33:39.45#ibcon#enter sib2, iclass 16, count 2 2006.229.07:33:39.45#ibcon#flushed, iclass 16, count 2 2006.229.07:33:39.45#ibcon#about to write, iclass 16, count 2 2006.229.07:33:39.45#ibcon#wrote, iclass 16, count 2 2006.229.07:33:39.45#ibcon#about to read 3, iclass 16, count 2 2006.229.07:33:39.48#ibcon#read 3, iclass 16, count 2 2006.229.07:33:39.48#ibcon#about to read 4, iclass 16, count 2 2006.229.07:33:39.48#ibcon#read 4, iclass 16, count 2 2006.229.07:33:39.48#ibcon#about to read 5, iclass 16, count 2 2006.229.07:33:39.48#ibcon#read 5, iclass 16, count 2 2006.229.07:33:39.48#ibcon#about to read 6, iclass 16, count 2 2006.229.07:33:39.48#ibcon#read 6, iclass 16, count 2 2006.229.07:33:39.48#ibcon#end of sib2, iclass 16, count 2 2006.229.07:33:39.48#ibcon#*after write, iclass 16, count 2 2006.229.07:33:39.48#ibcon#*before return 0, iclass 16, count 2 2006.229.07:33:39.48#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:39.48#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:39.48#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.07:33:39.48#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:39.48#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:39.60#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:39.60#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:39.60#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:33:39.60#ibcon#first serial, iclass 16, count 0 2006.229.07:33:39.60#ibcon#enter sib2, iclass 16, count 0 2006.229.07:33:39.60#ibcon#flushed, iclass 16, count 0 2006.229.07:33:39.60#ibcon#about to write, iclass 16, count 0 2006.229.07:33:39.60#ibcon#wrote, iclass 16, count 0 2006.229.07:33:39.60#ibcon#about to read 3, iclass 16, count 0 2006.229.07:33:39.62#ibcon#read 3, iclass 16, count 0 2006.229.07:33:39.62#ibcon#about to read 4, iclass 16, count 0 2006.229.07:33:39.62#ibcon#read 4, iclass 16, count 0 2006.229.07:33:39.62#ibcon#about to read 5, iclass 16, count 0 2006.229.07:33:39.62#ibcon#read 5, iclass 16, count 0 2006.229.07:33:39.62#ibcon#about to read 6, iclass 16, count 0 2006.229.07:33:39.62#ibcon#read 6, iclass 16, count 0 2006.229.07:33:39.62#ibcon#end of sib2, iclass 16, count 0 2006.229.07:33:39.62#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:33:39.62#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:33:39.62#ibcon#[25=USB\r\n] 2006.229.07:33:39.62#ibcon#*before write, iclass 16, count 0 2006.229.07:33:39.62#ibcon#enter sib2, iclass 16, count 0 2006.229.07:33:39.62#ibcon#flushed, iclass 16, count 0 2006.229.07:33:39.62#ibcon#about to write, iclass 16, count 0 2006.229.07:33:39.62#ibcon#wrote, iclass 16, count 0 2006.229.07:33:39.62#ibcon#about to read 3, iclass 16, count 0 2006.229.07:33:39.65#ibcon#read 3, iclass 16, count 0 2006.229.07:33:39.65#ibcon#about to read 4, iclass 16, count 0 2006.229.07:33:39.65#ibcon#read 4, iclass 16, count 0 2006.229.07:33:39.65#ibcon#about to read 5, iclass 16, count 0 2006.229.07:33:39.65#ibcon#read 5, iclass 16, count 0 2006.229.07:33:39.65#ibcon#about to read 6, iclass 16, count 0 2006.229.07:33:39.65#ibcon#read 6, iclass 16, count 0 2006.229.07:33:39.65#ibcon#end of sib2, iclass 16, count 0 2006.229.07:33:39.65#ibcon#*after write, iclass 16, count 0 2006.229.07:33:39.65#ibcon#*before return 0, iclass 16, count 0 2006.229.07:33:39.65#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:39.65#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:39.65#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:33:39.65#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:33:39.65$vck44/valo=5,734.99 2006.229.07:33:39.65#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:33:39.65#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:33:39.65#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:39.65#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:39.65#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:39.65#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:39.65#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:33:39.65#ibcon#first serial, iclass 18, count 0 2006.229.07:33:39.65#ibcon#enter sib2, iclass 18, count 0 2006.229.07:33:39.65#ibcon#flushed, iclass 18, count 0 2006.229.07:33:39.65#ibcon#about to write, iclass 18, count 0 2006.229.07:33:39.65#ibcon#wrote, iclass 18, count 0 2006.229.07:33:39.65#ibcon#about to read 3, iclass 18, count 0 2006.229.07:33:39.67#ibcon#read 3, iclass 18, count 0 2006.229.07:33:39.67#ibcon#about to read 4, iclass 18, count 0 2006.229.07:33:39.67#ibcon#read 4, iclass 18, count 0 2006.229.07:33:39.67#ibcon#about to read 5, iclass 18, count 0 2006.229.07:33:39.67#ibcon#read 5, iclass 18, count 0 2006.229.07:33:39.67#ibcon#about to read 6, iclass 18, count 0 2006.229.07:33:39.67#ibcon#read 6, iclass 18, count 0 2006.229.07:33:39.67#ibcon#end of sib2, iclass 18, count 0 2006.229.07:33:39.67#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:33:39.67#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:33:39.67#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:33:39.67#ibcon#*before write, iclass 18, count 0 2006.229.07:33:39.67#ibcon#enter sib2, iclass 18, count 0 2006.229.07:33:39.67#ibcon#flushed, iclass 18, count 0 2006.229.07:33:39.67#ibcon#about to write, iclass 18, count 0 2006.229.07:33:39.67#ibcon#wrote, iclass 18, count 0 2006.229.07:33:39.67#ibcon#about to read 3, iclass 18, count 0 2006.229.07:33:39.71#ibcon#read 3, iclass 18, count 0 2006.229.07:33:39.71#ibcon#about to read 4, iclass 18, count 0 2006.229.07:33:39.71#ibcon#read 4, iclass 18, count 0 2006.229.07:33:39.71#ibcon#about to read 5, iclass 18, count 0 2006.229.07:33:39.71#ibcon#read 5, iclass 18, count 0 2006.229.07:33:39.71#ibcon#about to read 6, iclass 18, count 0 2006.229.07:33:39.71#ibcon#read 6, iclass 18, count 0 2006.229.07:33:39.71#ibcon#end of sib2, iclass 18, count 0 2006.229.07:33:39.71#ibcon#*after write, iclass 18, count 0 2006.229.07:33:39.71#ibcon#*before return 0, iclass 18, count 0 2006.229.07:33:39.71#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:39.71#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:39.71#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:33:39.71#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:33:39.71$vck44/va=5,4 2006.229.07:33:39.71#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.07:33:39.71#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.07:33:39.71#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:39.71#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:39.77#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:39.77#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:39.77#ibcon#enter wrdev, iclass 20, count 2 2006.229.07:33:39.77#ibcon#first serial, iclass 20, count 2 2006.229.07:33:39.77#ibcon#enter sib2, iclass 20, count 2 2006.229.07:33:39.77#ibcon#flushed, iclass 20, count 2 2006.229.07:33:39.77#ibcon#about to write, iclass 20, count 2 2006.229.07:33:39.77#ibcon#wrote, iclass 20, count 2 2006.229.07:33:39.77#ibcon#about to read 3, iclass 20, count 2 2006.229.07:33:39.79#ibcon#read 3, iclass 20, count 2 2006.229.07:33:39.79#ibcon#about to read 4, iclass 20, count 2 2006.229.07:33:39.79#ibcon#read 4, iclass 20, count 2 2006.229.07:33:39.79#ibcon#about to read 5, iclass 20, count 2 2006.229.07:33:39.79#ibcon#read 5, iclass 20, count 2 2006.229.07:33:39.79#ibcon#about to read 6, iclass 20, count 2 2006.229.07:33:39.79#ibcon#read 6, iclass 20, count 2 2006.229.07:33:39.79#ibcon#end of sib2, iclass 20, count 2 2006.229.07:33:39.79#ibcon#*mode == 0, iclass 20, count 2 2006.229.07:33:39.79#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.07:33:39.79#ibcon#[25=AT05-04\r\n] 2006.229.07:33:39.79#ibcon#*before write, iclass 20, count 2 2006.229.07:33:39.79#ibcon#enter sib2, iclass 20, count 2 2006.229.07:33:39.79#ibcon#flushed, iclass 20, count 2 2006.229.07:33:39.79#ibcon#about to write, iclass 20, count 2 2006.229.07:33:39.79#ibcon#wrote, iclass 20, count 2 2006.229.07:33:39.79#ibcon#about to read 3, iclass 20, count 2 2006.229.07:33:39.82#ibcon#read 3, iclass 20, count 2 2006.229.07:33:39.82#ibcon#about to read 4, iclass 20, count 2 2006.229.07:33:39.82#ibcon#read 4, iclass 20, count 2 2006.229.07:33:39.82#ibcon#about to read 5, iclass 20, count 2 2006.229.07:33:39.82#ibcon#read 5, iclass 20, count 2 2006.229.07:33:39.82#ibcon#about to read 6, iclass 20, count 2 2006.229.07:33:39.82#ibcon#read 6, iclass 20, count 2 2006.229.07:33:39.82#ibcon#end of sib2, iclass 20, count 2 2006.229.07:33:39.82#ibcon#*after write, iclass 20, count 2 2006.229.07:33:39.82#ibcon#*before return 0, iclass 20, count 2 2006.229.07:33:39.82#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:39.82#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:39.82#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.07:33:39.82#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:39.82#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:39.94#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:39.94#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:39.94#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:33:39.94#ibcon#first serial, iclass 20, count 0 2006.229.07:33:39.94#ibcon#enter sib2, iclass 20, count 0 2006.229.07:33:39.94#ibcon#flushed, iclass 20, count 0 2006.229.07:33:39.94#ibcon#about to write, iclass 20, count 0 2006.229.07:33:39.94#ibcon#wrote, iclass 20, count 0 2006.229.07:33:39.94#ibcon#about to read 3, iclass 20, count 0 2006.229.07:33:39.96#ibcon#read 3, iclass 20, count 0 2006.229.07:33:39.96#ibcon#about to read 4, iclass 20, count 0 2006.229.07:33:39.96#ibcon#read 4, iclass 20, count 0 2006.229.07:33:39.96#ibcon#about to read 5, iclass 20, count 0 2006.229.07:33:39.96#ibcon#read 5, iclass 20, count 0 2006.229.07:33:39.96#ibcon#about to read 6, iclass 20, count 0 2006.229.07:33:39.96#ibcon#read 6, iclass 20, count 0 2006.229.07:33:39.96#ibcon#end of sib2, iclass 20, count 0 2006.229.07:33:39.96#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:33:39.96#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:33:39.96#ibcon#[25=USB\r\n] 2006.229.07:33:39.96#ibcon#*before write, iclass 20, count 0 2006.229.07:33:39.96#ibcon#enter sib2, iclass 20, count 0 2006.229.07:33:39.96#ibcon#flushed, iclass 20, count 0 2006.229.07:33:39.96#ibcon#about to write, iclass 20, count 0 2006.229.07:33:39.96#ibcon#wrote, iclass 20, count 0 2006.229.07:33:39.96#ibcon#about to read 3, iclass 20, count 0 2006.229.07:33:39.99#ibcon#read 3, iclass 20, count 0 2006.229.07:33:39.99#ibcon#about to read 4, iclass 20, count 0 2006.229.07:33:39.99#ibcon#read 4, iclass 20, count 0 2006.229.07:33:39.99#ibcon#about to read 5, iclass 20, count 0 2006.229.07:33:39.99#ibcon#read 5, iclass 20, count 0 2006.229.07:33:39.99#ibcon#about to read 6, iclass 20, count 0 2006.229.07:33:39.99#ibcon#read 6, iclass 20, count 0 2006.229.07:33:39.99#ibcon#end of sib2, iclass 20, count 0 2006.229.07:33:39.99#ibcon#*after write, iclass 20, count 0 2006.229.07:33:39.99#ibcon#*before return 0, iclass 20, count 0 2006.229.07:33:39.99#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:39.99#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:39.99#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:33:39.99#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:33:39.99$vck44/valo=6,814.99 2006.229.07:33:39.99#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.07:33:39.99#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.07:33:39.99#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:39.99#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:39.99#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:39.99#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:39.99#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:33:39.99#ibcon#first serial, iclass 22, count 0 2006.229.07:33:39.99#ibcon#enter sib2, iclass 22, count 0 2006.229.07:33:39.99#ibcon#flushed, iclass 22, count 0 2006.229.07:33:39.99#ibcon#about to write, iclass 22, count 0 2006.229.07:33:39.99#ibcon#wrote, iclass 22, count 0 2006.229.07:33:39.99#ibcon#about to read 3, iclass 22, count 0 2006.229.07:33:40.01#ibcon#read 3, iclass 22, count 0 2006.229.07:33:40.01#ibcon#about to read 4, iclass 22, count 0 2006.229.07:33:40.01#ibcon#read 4, iclass 22, count 0 2006.229.07:33:40.01#ibcon#about to read 5, iclass 22, count 0 2006.229.07:33:40.01#ibcon#read 5, iclass 22, count 0 2006.229.07:33:40.01#ibcon#about to read 6, iclass 22, count 0 2006.229.07:33:40.01#ibcon#read 6, iclass 22, count 0 2006.229.07:33:40.01#ibcon#end of sib2, iclass 22, count 0 2006.229.07:33:40.01#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:33:40.01#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:33:40.01#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:33:40.01#ibcon#*before write, iclass 22, count 0 2006.229.07:33:40.01#ibcon#enter sib2, iclass 22, count 0 2006.229.07:33:40.01#ibcon#flushed, iclass 22, count 0 2006.229.07:33:40.01#ibcon#about to write, iclass 22, count 0 2006.229.07:33:40.01#ibcon#wrote, iclass 22, count 0 2006.229.07:33:40.01#ibcon#about to read 3, iclass 22, count 0 2006.229.07:33:40.05#ibcon#read 3, iclass 22, count 0 2006.229.07:33:40.05#ibcon#about to read 4, iclass 22, count 0 2006.229.07:33:40.05#ibcon#read 4, iclass 22, count 0 2006.229.07:33:40.05#ibcon#about to read 5, iclass 22, count 0 2006.229.07:33:40.05#ibcon#read 5, iclass 22, count 0 2006.229.07:33:40.05#ibcon#about to read 6, iclass 22, count 0 2006.229.07:33:40.05#ibcon#read 6, iclass 22, count 0 2006.229.07:33:40.05#ibcon#end of sib2, iclass 22, count 0 2006.229.07:33:40.05#ibcon#*after write, iclass 22, count 0 2006.229.07:33:40.05#ibcon#*before return 0, iclass 22, count 0 2006.229.07:33:40.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:40.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:40.05#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:33:40.05#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:33:40.05$vck44/va=6,4 2006.229.07:33:40.05#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.07:33:40.05#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.07:33:40.05#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:40.05#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:40.11#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:40.11#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:40.11#ibcon#enter wrdev, iclass 24, count 2 2006.229.07:33:40.11#ibcon#first serial, iclass 24, count 2 2006.229.07:33:40.11#ibcon#enter sib2, iclass 24, count 2 2006.229.07:33:40.11#ibcon#flushed, iclass 24, count 2 2006.229.07:33:40.11#ibcon#about to write, iclass 24, count 2 2006.229.07:33:40.11#ibcon#wrote, iclass 24, count 2 2006.229.07:33:40.11#ibcon#about to read 3, iclass 24, count 2 2006.229.07:33:40.13#ibcon#read 3, iclass 24, count 2 2006.229.07:33:40.13#ibcon#about to read 4, iclass 24, count 2 2006.229.07:33:40.13#ibcon#read 4, iclass 24, count 2 2006.229.07:33:40.13#ibcon#about to read 5, iclass 24, count 2 2006.229.07:33:40.13#ibcon#read 5, iclass 24, count 2 2006.229.07:33:40.13#ibcon#about to read 6, iclass 24, count 2 2006.229.07:33:40.13#ibcon#read 6, iclass 24, count 2 2006.229.07:33:40.13#ibcon#end of sib2, iclass 24, count 2 2006.229.07:33:40.13#ibcon#*mode == 0, iclass 24, count 2 2006.229.07:33:40.13#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.07:33:40.13#ibcon#[25=AT06-04\r\n] 2006.229.07:33:40.13#ibcon#*before write, iclass 24, count 2 2006.229.07:33:40.13#ibcon#enter sib2, iclass 24, count 2 2006.229.07:33:40.13#ibcon#flushed, iclass 24, count 2 2006.229.07:33:40.13#ibcon#about to write, iclass 24, count 2 2006.229.07:33:40.13#ibcon#wrote, iclass 24, count 2 2006.229.07:33:40.13#ibcon#about to read 3, iclass 24, count 2 2006.229.07:33:40.16#ibcon#read 3, iclass 24, count 2 2006.229.07:33:40.16#ibcon#about to read 4, iclass 24, count 2 2006.229.07:33:40.16#ibcon#read 4, iclass 24, count 2 2006.229.07:33:40.16#ibcon#about to read 5, iclass 24, count 2 2006.229.07:33:40.16#ibcon#read 5, iclass 24, count 2 2006.229.07:33:40.16#ibcon#about to read 6, iclass 24, count 2 2006.229.07:33:40.16#ibcon#read 6, iclass 24, count 2 2006.229.07:33:40.16#ibcon#end of sib2, iclass 24, count 2 2006.229.07:33:40.16#ibcon#*after write, iclass 24, count 2 2006.229.07:33:40.16#ibcon#*before return 0, iclass 24, count 2 2006.229.07:33:40.16#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:40.16#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:40.16#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.07:33:40.16#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:40.16#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:40.28#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:40.28#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:40.28#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:33:40.28#ibcon#first serial, iclass 24, count 0 2006.229.07:33:40.28#ibcon#enter sib2, iclass 24, count 0 2006.229.07:33:40.28#ibcon#flushed, iclass 24, count 0 2006.229.07:33:40.28#ibcon#about to write, iclass 24, count 0 2006.229.07:33:40.28#ibcon#wrote, iclass 24, count 0 2006.229.07:33:40.28#ibcon#about to read 3, iclass 24, count 0 2006.229.07:33:40.30#ibcon#read 3, iclass 24, count 0 2006.229.07:33:40.30#ibcon#about to read 4, iclass 24, count 0 2006.229.07:33:40.30#ibcon#read 4, iclass 24, count 0 2006.229.07:33:40.30#ibcon#about to read 5, iclass 24, count 0 2006.229.07:33:40.30#ibcon#read 5, iclass 24, count 0 2006.229.07:33:40.30#ibcon#about to read 6, iclass 24, count 0 2006.229.07:33:40.30#ibcon#read 6, iclass 24, count 0 2006.229.07:33:40.30#ibcon#end of sib2, iclass 24, count 0 2006.229.07:33:40.30#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:33:40.30#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:33:40.30#ibcon#[25=USB\r\n] 2006.229.07:33:40.30#ibcon#*before write, iclass 24, count 0 2006.229.07:33:40.30#ibcon#enter sib2, iclass 24, count 0 2006.229.07:33:40.30#ibcon#flushed, iclass 24, count 0 2006.229.07:33:40.30#ibcon#about to write, iclass 24, count 0 2006.229.07:33:40.30#ibcon#wrote, iclass 24, count 0 2006.229.07:33:40.30#ibcon#about to read 3, iclass 24, count 0 2006.229.07:33:40.33#ibcon#read 3, iclass 24, count 0 2006.229.07:33:40.33#ibcon#about to read 4, iclass 24, count 0 2006.229.07:33:40.33#ibcon#read 4, iclass 24, count 0 2006.229.07:33:40.33#ibcon#about to read 5, iclass 24, count 0 2006.229.07:33:40.33#ibcon#read 5, iclass 24, count 0 2006.229.07:33:40.33#ibcon#about to read 6, iclass 24, count 0 2006.229.07:33:40.33#ibcon#read 6, iclass 24, count 0 2006.229.07:33:40.33#ibcon#end of sib2, iclass 24, count 0 2006.229.07:33:40.33#ibcon#*after write, iclass 24, count 0 2006.229.07:33:40.33#ibcon#*before return 0, iclass 24, count 0 2006.229.07:33:40.33#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:40.33#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:40.33#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:33:40.33#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:33:40.33$vck44/valo=7,864.99 2006.229.07:33:40.33#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.07:33:40.33#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.07:33:40.33#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:40.33#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:40.33#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:40.33#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:40.33#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:33:40.33#ibcon#first serial, iclass 26, count 0 2006.229.07:33:40.33#ibcon#enter sib2, iclass 26, count 0 2006.229.07:33:40.33#ibcon#flushed, iclass 26, count 0 2006.229.07:33:40.33#ibcon#about to write, iclass 26, count 0 2006.229.07:33:40.33#ibcon#wrote, iclass 26, count 0 2006.229.07:33:40.33#ibcon#about to read 3, iclass 26, count 0 2006.229.07:33:40.35#ibcon#read 3, iclass 26, count 0 2006.229.07:33:40.35#ibcon#about to read 4, iclass 26, count 0 2006.229.07:33:40.35#ibcon#read 4, iclass 26, count 0 2006.229.07:33:40.35#ibcon#about to read 5, iclass 26, count 0 2006.229.07:33:40.35#ibcon#read 5, iclass 26, count 0 2006.229.07:33:40.35#ibcon#about to read 6, iclass 26, count 0 2006.229.07:33:40.35#ibcon#read 6, iclass 26, count 0 2006.229.07:33:40.35#ibcon#end of sib2, iclass 26, count 0 2006.229.07:33:40.35#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:33:40.35#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:33:40.35#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:33:40.35#ibcon#*before write, iclass 26, count 0 2006.229.07:33:40.35#ibcon#enter sib2, iclass 26, count 0 2006.229.07:33:40.35#ibcon#flushed, iclass 26, count 0 2006.229.07:33:40.35#ibcon#about to write, iclass 26, count 0 2006.229.07:33:40.35#ibcon#wrote, iclass 26, count 0 2006.229.07:33:40.35#ibcon#about to read 3, iclass 26, count 0 2006.229.07:33:40.39#ibcon#read 3, iclass 26, count 0 2006.229.07:33:40.39#ibcon#about to read 4, iclass 26, count 0 2006.229.07:33:40.39#ibcon#read 4, iclass 26, count 0 2006.229.07:33:40.39#ibcon#about to read 5, iclass 26, count 0 2006.229.07:33:40.39#ibcon#read 5, iclass 26, count 0 2006.229.07:33:40.39#ibcon#about to read 6, iclass 26, count 0 2006.229.07:33:40.39#ibcon#read 6, iclass 26, count 0 2006.229.07:33:40.39#ibcon#end of sib2, iclass 26, count 0 2006.229.07:33:40.39#ibcon#*after write, iclass 26, count 0 2006.229.07:33:40.39#ibcon#*before return 0, iclass 26, count 0 2006.229.07:33:40.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:40.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:40.39#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:33:40.39#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:33:40.39$vck44/va=7,5 2006.229.07:33:40.39#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.07:33:40.39#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.07:33:40.39#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:40.39#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:40.45#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:40.45#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:40.45#ibcon#enter wrdev, iclass 28, count 2 2006.229.07:33:40.45#ibcon#first serial, iclass 28, count 2 2006.229.07:33:40.45#ibcon#enter sib2, iclass 28, count 2 2006.229.07:33:40.45#ibcon#flushed, iclass 28, count 2 2006.229.07:33:40.45#ibcon#about to write, iclass 28, count 2 2006.229.07:33:40.45#ibcon#wrote, iclass 28, count 2 2006.229.07:33:40.45#ibcon#about to read 3, iclass 28, count 2 2006.229.07:33:40.47#ibcon#read 3, iclass 28, count 2 2006.229.07:33:40.47#ibcon#about to read 4, iclass 28, count 2 2006.229.07:33:40.47#ibcon#read 4, iclass 28, count 2 2006.229.07:33:40.47#ibcon#about to read 5, iclass 28, count 2 2006.229.07:33:40.47#ibcon#read 5, iclass 28, count 2 2006.229.07:33:40.47#ibcon#about to read 6, iclass 28, count 2 2006.229.07:33:40.47#ibcon#read 6, iclass 28, count 2 2006.229.07:33:40.47#ibcon#end of sib2, iclass 28, count 2 2006.229.07:33:40.47#ibcon#*mode == 0, iclass 28, count 2 2006.229.07:33:40.47#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.07:33:40.47#ibcon#[25=AT07-05\r\n] 2006.229.07:33:40.47#ibcon#*before write, iclass 28, count 2 2006.229.07:33:40.47#ibcon#enter sib2, iclass 28, count 2 2006.229.07:33:40.47#ibcon#flushed, iclass 28, count 2 2006.229.07:33:40.47#ibcon#about to write, iclass 28, count 2 2006.229.07:33:40.47#ibcon#wrote, iclass 28, count 2 2006.229.07:33:40.47#ibcon#about to read 3, iclass 28, count 2 2006.229.07:33:40.50#ibcon#read 3, iclass 28, count 2 2006.229.07:33:40.50#ibcon#about to read 4, iclass 28, count 2 2006.229.07:33:40.50#ibcon#read 4, iclass 28, count 2 2006.229.07:33:40.50#ibcon#about to read 5, iclass 28, count 2 2006.229.07:33:40.50#ibcon#read 5, iclass 28, count 2 2006.229.07:33:40.50#ibcon#about to read 6, iclass 28, count 2 2006.229.07:33:40.50#ibcon#read 6, iclass 28, count 2 2006.229.07:33:40.50#ibcon#end of sib2, iclass 28, count 2 2006.229.07:33:40.50#ibcon#*after write, iclass 28, count 2 2006.229.07:33:40.50#ibcon#*before return 0, iclass 28, count 2 2006.229.07:33:40.50#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:40.50#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:40.50#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.07:33:40.50#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:40.50#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:40.62#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:40.62#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:40.62#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:33:40.62#ibcon#first serial, iclass 28, count 0 2006.229.07:33:40.62#ibcon#enter sib2, iclass 28, count 0 2006.229.07:33:40.62#ibcon#flushed, iclass 28, count 0 2006.229.07:33:40.62#ibcon#about to write, iclass 28, count 0 2006.229.07:33:40.62#ibcon#wrote, iclass 28, count 0 2006.229.07:33:40.62#ibcon#about to read 3, iclass 28, count 0 2006.229.07:33:40.64#ibcon#read 3, iclass 28, count 0 2006.229.07:33:40.64#ibcon#about to read 4, iclass 28, count 0 2006.229.07:33:40.64#ibcon#read 4, iclass 28, count 0 2006.229.07:33:40.64#ibcon#about to read 5, iclass 28, count 0 2006.229.07:33:40.64#ibcon#read 5, iclass 28, count 0 2006.229.07:33:40.64#ibcon#about to read 6, iclass 28, count 0 2006.229.07:33:40.64#ibcon#read 6, iclass 28, count 0 2006.229.07:33:40.64#ibcon#end of sib2, iclass 28, count 0 2006.229.07:33:40.64#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:33:40.64#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:33:40.64#ibcon#[25=USB\r\n] 2006.229.07:33:40.64#ibcon#*before write, iclass 28, count 0 2006.229.07:33:40.64#ibcon#enter sib2, iclass 28, count 0 2006.229.07:33:40.64#ibcon#flushed, iclass 28, count 0 2006.229.07:33:40.64#ibcon#about to write, iclass 28, count 0 2006.229.07:33:40.64#ibcon#wrote, iclass 28, count 0 2006.229.07:33:40.64#ibcon#about to read 3, iclass 28, count 0 2006.229.07:33:40.67#ibcon#read 3, iclass 28, count 0 2006.229.07:33:40.67#ibcon#about to read 4, iclass 28, count 0 2006.229.07:33:40.67#ibcon#read 4, iclass 28, count 0 2006.229.07:33:40.67#ibcon#about to read 5, iclass 28, count 0 2006.229.07:33:40.67#ibcon#read 5, iclass 28, count 0 2006.229.07:33:40.67#ibcon#about to read 6, iclass 28, count 0 2006.229.07:33:40.67#ibcon#read 6, iclass 28, count 0 2006.229.07:33:40.67#ibcon#end of sib2, iclass 28, count 0 2006.229.07:33:40.67#ibcon#*after write, iclass 28, count 0 2006.229.07:33:40.67#ibcon#*before return 0, iclass 28, count 0 2006.229.07:33:40.67#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:40.67#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:40.67#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:33:40.67#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:33:40.67$vck44/valo=8,884.99 2006.229.07:33:40.67#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:33:40.67#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:33:40.67#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:40.67#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:40.67#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:40.67#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:40.67#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:33:40.67#ibcon#first serial, iclass 30, count 0 2006.229.07:33:40.67#ibcon#enter sib2, iclass 30, count 0 2006.229.07:33:40.67#ibcon#flushed, iclass 30, count 0 2006.229.07:33:40.67#ibcon#about to write, iclass 30, count 0 2006.229.07:33:40.67#ibcon#wrote, iclass 30, count 0 2006.229.07:33:40.67#ibcon#about to read 3, iclass 30, count 0 2006.229.07:33:40.69#ibcon#read 3, iclass 30, count 0 2006.229.07:33:40.69#ibcon#about to read 4, iclass 30, count 0 2006.229.07:33:40.69#ibcon#read 4, iclass 30, count 0 2006.229.07:33:40.69#ibcon#about to read 5, iclass 30, count 0 2006.229.07:33:40.69#ibcon#read 5, iclass 30, count 0 2006.229.07:33:40.69#ibcon#about to read 6, iclass 30, count 0 2006.229.07:33:40.69#ibcon#read 6, iclass 30, count 0 2006.229.07:33:40.69#ibcon#end of sib2, iclass 30, count 0 2006.229.07:33:40.69#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:33:40.69#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:33:40.69#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:33:40.69#ibcon#*before write, iclass 30, count 0 2006.229.07:33:40.69#ibcon#enter sib2, iclass 30, count 0 2006.229.07:33:40.69#ibcon#flushed, iclass 30, count 0 2006.229.07:33:40.69#ibcon#about to write, iclass 30, count 0 2006.229.07:33:40.69#ibcon#wrote, iclass 30, count 0 2006.229.07:33:40.69#ibcon#about to read 3, iclass 30, count 0 2006.229.07:33:40.73#ibcon#read 3, iclass 30, count 0 2006.229.07:33:40.73#ibcon#about to read 4, iclass 30, count 0 2006.229.07:33:40.73#ibcon#read 4, iclass 30, count 0 2006.229.07:33:40.73#ibcon#about to read 5, iclass 30, count 0 2006.229.07:33:40.73#ibcon#read 5, iclass 30, count 0 2006.229.07:33:40.73#ibcon#about to read 6, iclass 30, count 0 2006.229.07:33:40.73#ibcon#read 6, iclass 30, count 0 2006.229.07:33:40.73#ibcon#end of sib2, iclass 30, count 0 2006.229.07:33:40.73#ibcon#*after write, iclass 30, count 0 2006.229.07:33:40.73#ibcon#*before return 0, iclass 30, count 0 2006.229.07:33:40.73#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:40.73#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:40.73#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:33:40.73#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:33:40.73$vck44/va=8,6 2006.229.07:33:40.73#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.07:33:40.73#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.07:33:40.73#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:40.73#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:33:40.79#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:33:40.79#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:33:40.79#ibcon#enter wrdev, iclass 32, count 2 2006.229.07:33:40.79#ibcon#first serial, iclass 32, count 2 2006.229.07:33:40.79#ibcon#enter sib2, iclass 32, count 2 2006.229.07:33:40.79#ibcon#flushed, iclass 32, count 2 2006.229.07:33:40.79#ibcon#about to write, iclass 32, count 2 2006.229.07:33:40.79#ibcon#wrote, iclass 32, count 2 2006.229.07:33:40.79#ibcon#about to read 3, iclass 32, count 2 2006.229.07:33:40.81#ibcon#read 3, iclass 32, count 2 2006.229.07:33:40.81#ibcon#about to read 4, iclass 32, count 2 2006.229.07:33:40.81#ibcon#read 4, iclass 32, count 2 2006.229.07:33:40.81#ibcon#about to read 5, iclass 32, count 2 2006.229.07:33:40.81#ibcon#read 5, iclass 32, count 2 2006.229.07:33:40.81#ibcon#about to read 6, iclass 32, count 2 2006.229.07:33:40.81#ibcon#read 6, iclass 32, count 2 2006.229.07:33:40.81#ibcon#end of sib2, iclass 32, count 2 2006.229.07:33:40.81#ibcon#*mode == 0, iclass 32, count 2 2006.229.07:33:40.81#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.07:33:40.81#ibcon#[25=AT08-06\r\n] 2006.229.07:33:40.81#ibcon#*before write, iclass 32, count 2 2006.229.07:33:40.81#ibcon#enter sib2, iclass 32, count 2 2006.229.07:33:40.81#ibcon#flushed, iclass 32, count 2 2006.229.07:33:40.81#ibcon#about to write, iclass 32, count 2 2006.229.07:33:40.81#ibcon#wrote, iclass 32, count 2 2006.229.07:33:40.81#ibcon#about to read 3, iclass 32, count 2 2006.229.07:33:40.84#ibcon#read 3, iclass 32, count 2 2006.229.07:33:40.84#ibcon#about to read 4, iclass 32, count 2 2006.229.07:33:40.84#ibcon#read 4, iclass 32, count 2 2006.229.07:33:40.84#ibcon#about to read 5, iclass 32, count 2 2006.229.07:33:40.84#ibcon#read 5, iclass 32, count 2 2006.229.07:33:40.84#ibcon#about to read 6, iclass 32, count 2 2006.229.07:33:40.84#ibcon#read 6, iclass 32, count 2 2006.229.07:33:40.84#ibcon#end of sib2, iclass 32, count 2 2006.229.07:33:40.84#ibcon#*after write, iclass 32, count 2 2006.229.07:33:40.84#ibcon#*before return 0, iclass 32, count 2 2006.229.07:33:40.84#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:33:40.84#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:33:40.84#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.07:33:40.84#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:40.84#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:33:40.96#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:33:40.96#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:33:40.96#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:33:40.96#ibcon#first serial, iclass 32, count 0 2006.229.07:33:40.96#ibcon#enter sib2, iclass 32, count 0 2006.229.07:33:40.96#ibcon#flushed, iclass 32, count 0 2006.229.07:33:40.96#ibcon#about to write, iclass 32, count 0 2006.229.07:33:40.96#ibcon#wrote, iclass 32, count 0 2006.229.07:33:40.96#ibcon#about to read 3, iclass 32, count 0 2006.229.07:33:40.98#ibcon#read 3, iclass 32, count 0 2006.229.07:33:40.98#ibcon#about to read 4, iclass 32, count 0 2006.229.07:33:40.98#ibcon#read 4, iclass 32, count 0 2006.229.07:33:40.98#ibcon#about to read 5, iclass 32, count 0 2006.229.07:33:40.98#ibcon#read 5, iclass 32, count 0 2006.229.07:33:40.98#ibcon#about to read 6, iclass 32, count 0 2006.229.07:33:40.98#ibcon#read 6, iclass 32, count 0 2006.229.07:33:40.98#ibcon#end of sib2, iclass 32, count 0 2006.229.07:33:40.98#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:33:40.98#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:33:40.98#ibcon#[25=USB\r\n] 2006.229.07:33:40.98#ibcon#*before write, iclass 32, count 0 2006.229.07:33:40.98#ibcon#enter sib2, iclass 32, count 0 2006.229.07:33:40.98#ibcon#flushed, iclass 32, count 0 2006.229.07:33:40.98#ibcon#about to write, iclass 32, count 0 2006.229.07:33:40.98#ibcon#wrote, iclass 32, count 0 2006.229.07:33:40.98#ibcon#about to read 3, iclass 32, count 0 2006.229.07:33:41.01#ibcon#read 3, iclass 32, count 0 2006.229.07:33:41.01#ibcon#about to read 4, iclass 32, count 0 2006.229.07:33:41.01#ibcon#read 4, iclass 32, count 0 2006.229.07:33:41.01#ibcon#about to read 5, iclass 32, count 0 2006.229.07:33:41.01#ibcon#read 5, iclass 32, count 0 2006.229.07:33:41.01#ibcon#about to read 6, iclass 32, count 0 2006.229.07:33:41.01#ibcon#read 6, iclass 32, count 0 2006.229.07:33:41.01#ibcon#end of sib2, iclass 32, count 0 2006.229.07:33:41.01#ibcon#*after write, iclass 32, count 0 2006.229.07:33:41.01#ibcon#*before return 0, iclass 32, count 0 2006.229.07:33:41.01#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:33:41.01#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:33:41.01#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:33:41.01#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:33:41.01$vck44/vblo=1,629.99 2006.229.07:33:41.01#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.07:33:41.01#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.07:33:41.01#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:41.01#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:33:41.01#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:33:41.01#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:33:41.01#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:33:41.01#ibcon#first serial, iclass 34, count 0 2006.229.07:33:41.01#ibcon#enter sib2, iclass 34, count 0 2006.229.07:33:41.01#ibcon#flushed, iclass 34, count 0 2006.229.07:33:41.01#ibcon#about to write, iclass 34, count 0 2006.229.07:33:41.01#ibcon#wrote, iclass 34, count 0 2006.229.07:33:41.01#ibcon#about to read 3, iclass 34, count 0 2006.229.07:33:41.03#ibcon#read 3, iclass 34, count 0 2006.229.07:33:41.03#ibcon#about to read 4, iclass 34, count 0 2006.229.07:33:41.03#ibcon#read 4, iclass 34, count 0 2006.229.07:33:41.03#ibcon#about to read 5, iclass 34, count 0 2006.229.07:33:41.03#ibcon#read 5, iclass 34, count 0 2006.229.07:33:41.03#ibcon#about to read 6, iclass 34, count 0 2006.229.07:33:41.03#ibcon#read 6, iclass 34, count 0 2006.229.07:33:41.03#ibcon#end of sib2, iclass 34, count 0 2006.229.07:33:41.03#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:33:41.03#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:33:41.03#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:33:41.03#ibcon#*before write, iclass 34, count 0 2006.229.07:33:41.03#ibcon#enter sib2, iclass 34, count 0 2006.229.07:33:41.03#ibcon#flushed, iclass 34, count 0 2006.229.07:33:41.03#ibcon#about to write, iclass 34, count 0 2006.229.07:33:41.03#ibcon#wrote, iclass 34, count 0 2006.229.07:33:41.03#ibcon#about to read 3, iclass 34, count 0 2006.229.07:33:41.07#ibcon#read 3, iclass 34, count 0 2006.229.07:33:41.07#ibcon#about to read 4, iclass 34, count 0 2006.229.07:33:41.07#ibcon#read 4, iclass 34, count 0 2006.229.07:33:41.07#ibcon#about to read 5, iclass 34, count 0 2006.229.07:33:41.07#ibcon#read 5, iclass 34, count 0 2006.229.07:33:41.07#ibcon#about to read 6, iclass 34, count 0 2006.229.07:33:41.07#ibcon#read 6, iclass 34, count 0 2006.229.07:33:41.07#ibcon#end of sib2, iclass 34, count 0 2006.229.07:33:41.07#ibcon#*after write, iclass 34, count 0 2006.229.07:33:41.07#ibcon#*before return 0, iclass 34, count 0 2006.229.07:33:41.07#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:33:41.07#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:33:41.07#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:33:41.07#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:33:41.07$vck44/vb=1,4 2006.229.07:33:41.07#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.07:33:41.07#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.07:33:41.07#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:41.07#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:33:41.07#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:33:41.07#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:33:41.07#ibcon#enter wrdev, iclass 36, count 2 2006.229.07:33:41.07#ibcon#first serial, iclass 36, count 2 2006.229.07:33:41.07#ibcon#enter sib2, iclass 36, count 2 2006.229.07:33:41.07#ibcon#flushed, iclass 36, count 2 2006.229.07:33:41.07#ibcon#about to write, iclass 36, count 2 2006.229.07:33:41.07#ibcon#wrote, iclass 36, count 2 2006.229.07:33:41.07#ibcon#about to read 3, iclass 36, count 2 2006.229.07:33:41.09#ibcon#read 3, iclass 36, count 2 2006.229.07:33:41.09#ibcon#about to read 4, iclass 36, count 2 2006.229.07:33:41.09#ibcon#read 4, iclass 36, count 2 2006.229.07:33:41.09#ibcon#about to read 5, iclass 36, count 2 2006.229.07:33:41.09#ibcon#read 5, iclass 36, count 2 2006.229.07:33:41.09#ibcon#about to read 6, iclass 36, count 2 2006.229.07:33:41.09#ibcon#read 6, iclass 36, count 2 2006.229.07:33:41.09#ibcon#end of sib2, iclass 36, count 2 2006.229.07:33:41.09#ibcon#*mode == 0, iclass 36, count 2 2006.229.07:33:41.09#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.07:33:41.09#ibcon#[27=AT01-04\r\n] 2006.229.07:33:41.09#ibcon#*before write, iclass 36, count 2 2006.229.07:33:41.09#ibcon#enter sib2, iclass 36, count 2 2006.229.07:33:41.09#ibcon#flushed, iclass 36, count 2 2006.229.07:33:41.09#ibcon#about to write, iclass 36, count 2 2006.229.07:33:41.09#ibcon#wrote, iclass 36, count 2 2006.229.07:33:41.09#ibcon#about to read 3, iclass 36, count 2 2006.229.07:33:41.12#ibcon#read 3, iclass 36, count 2 2006.229.07:33:41.12#ibcon#about to read 4, iclass 36, count 2 2006.229.07:33:41.12#ibcon#read 4, iclass 36, count 2 2006.229.07:33:41.12#ibcon#about to read 5, iclass 36, count 2 2006.229.07:33:41.12#ibcon#read 5, iclass 36, count 2 2006.229.07:33:41.12#ibcon#about to read 6, iclass 36, count 2 2006.229.07:33:41.12#ibcon#read 6, iclass 36, count 2 2006.229.07:33:41.12#ibcon#end of sib2, iclass 36, count 2 2006.229.07:33:41.12#ibcon#*after write, iclass 36, count 2 2006.229.07:33:41.12#ibcon#*before return 0, iclass 36, count 2 2006.229.07:33:41.12#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:33:41.12#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:33:41.12#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.07:33:41.12#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:41.12#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:33:41.24#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:33:41.24#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:33:41.24#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:33:41.24#ibcon#first serial, iclass 36, count 0 2006.229.07:33:41.24#ibcon#enter sib2, iclass 36, count 0 2006.229.07:33:41.24#ibcon#flushed, iclass 36, count 0 2006.229.07:33:41.24#ibcon#about to write, iclass 36, count 0 2006.229.07:33:41.24#ibcon#wrote, iclass 36, count 0 2006.229.07:33:41.24#ibcon#about to read 3, iclass 36, count 0 2006.229.07:33:41.26#ibcon#read 3, iclass 36, count 0 2006.229.07:33:41.26#ibcon#about to read 4, iclass 36, count 0 2006.229.07:33:41.26#ibcon#read 4, iclass 36, count 0 2006.229.07:33:41.26#ibcon#about to read 5, iclass 36, count 0 2006.229.07:33:41.26#ibcon#read 5, iclass 36, count 0 2006.229.07:33:41.26#ibcon#about to read 6, iclass 36, count 0 2006.229.07:33:41.26#ibcon#read 6, iclass 36, count 0 2006.229.07:33:41.26#ibcon#end of sib2, iclass 36, count 0 2006.229.07:33:41.26#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:33:41.26#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:33:41.26#ibcon#[27=USB\r\n] 2006.229.07:33:41.26#ibcon#*before write, iclass 36, count 0 2006.229.07:33:41.26#ibcon#enter sib2, iclass 36, count 0 2006.229.07:33:41.26#ibcon#flushed, iclass 36, count 0 2006.229.07:33:41.26#ibcon#about to write, iclass 36, count 0 2006.229.07:33:41.26#ibcon#wrote, iclass 36, count 0 2006.229.07:33:41.26#ibcon#about to read 3, iclass 36, count 0 2006.229.07:33:41.29#ibcon#read 3, iclass 36, count 0 2006.229.07:33:41.29#ibcon#about to read 4, iclass 36, count 0 2006.229.07:33:41.29#ibcon#read 4, iclass 36, count 0 2006.229.07:33:41.29#ibcon#about to read 5, iclass 36, count 0 2006.229.07:33:41.29#ibcon#read 5, iclass 36, count 0 2006.229.07:33:41.29#ibcon#about to read 6, iclass 36, count 0 2006.229.07:33:41.29#ibcon#read 6, iclass 36, count 0 2006.229.07:33:41.29#ibcon#end of sib2, iclass 36, count 0 2006.229.07:33:41.29#ibcon#*after write, iclass 36, count 0 2006.229.07:33:41.29#ibcon#*before return 0, iclass 36, count 0 2006.229.07:33:41.29#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:33:41.29#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:33:41.29#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:33:41.29#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:33:41.29$vck44/vblo=2,634.99 2006.229.07:33:41.29#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.07:33:41.29#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.07:33:41.29#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:41.29#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:41.29#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:41.29#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:41.29#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:33:41.29#ibcon#first serial, iclass 38, count 0 2006.229.07:33:41.29#ibcon#enter sib2, iclass 38, count 0 2006.229.07:33:41.29#ibcon#flushed, iclass 38, count 0 2006.229.07:33:41.29#ibcon#about to write, iclass 38, count 0 2006.229.07:33:41.29#ibcon#wrote, iclass 38, count 0 2006.229.07:33:41.29#ibcon#about to read 3, iclass 38, count 0 2006.229.07:33:41.31#ibcon#read 3, iclass 38, count 0 2006.229.07:33:41.31#ibcon#about to read 4, iclass 38, count 0 2006.229.07:33:41.31#ibcon#read 4, iclass 38, count 0 2006.229.07:33:41.31#ibcon#about to read 5, iclass 38, count 0 2006.229.07:33:41.31#ibcon#read 5, iclass 38, count 0 2006.229.07:33:41.31#ibcon#about to read 6, iclass 38, count 0 2006.229.07:33:41.31#ibcon#read 6, iclass 38, count 0 2006.229.07:33:41.31#ibcon#end of sib2, iclass 38, count 0 2006.229.07:33:41.31#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:33:41.31#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:33:41.31#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:33:41.31#ibcon#*before write, iclass 38, count 0 2006.229.07:33:41.31#ibcon#enter sib2, iclass 38, count 0 2006.229.07:33:41.31#ibcon#flushed, iclass 38, count 0 2006.229.07:33:41.31#ibcon#about to write, iclass 38, count 0 2006.229.07:33:41.31#ibcon#wrote, iclass 38, count 0 2006.229.07:33:41.31#ibcon#about to read 3, iclass 38, count 0 2006.229.07:33:41.35#ibcon#read 3, iclass 38, count 0 2006.229.07:33:41.35#ibcon#about to read 4, iclass 38, count 0 2006.229.07:33:41.35#ibcon#read 4, iclass 38, count 0 2006.229.07:33:41.35#ibcon#about to read 5, iclass 38, count 0 2006.229.07:33:41.35#ibcon#read 5, iclass 38, count 0 2006.229.07:33:41.35#ibcon#about to read 6, iclass 38, count 0 2006.229.07:33:41.35#ibcon#read 6, iclass 38, count 0 2006.229.07:33:41.35#ibcon#end of sib2, iclass 38, count 0 2006.229.07:33:41.35#ibcon#*after write, iclass 38, count 0 2006.229.07:33:41.35#ibcon#*before return 0, iclass 38, count 0 2006.229.07:33:41.35#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:41.35#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:33:41.35#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:33:41.35#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:33:41.35$vck44/vb=2,4 2006.229.07:33:41.35#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.07:33:41.35#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.07:33:41.35#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:41.35#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:41.41#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:41.41#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:41.41#ibcon#enter wrdev, iclass 40, count 2 2006.229.07:33:41.41#ibcon#first serial, iclass 40, count 2 2006.229.07:33:41.41#ibcon#enter sib2, iclass 40, count 2 2006.229.07:33:41.41#ibcon#flushed, iclass 40, count 2 2006.229.07:33:41.41#ibcon#about to write, iclass 40, count 2 2006.229.07:33:41.41#ibcon#wrote, iclass 40, count 2 2006.229.07:33:41.41#ibcon#about to read 3, iclass 40, count 2 2006.229.07:33:41.43#ibcon#read 3, iclass 40, count 2 2006.229.07:33:41.43#ibcon#about to read 4, iclass 40, count 2 2006.229.07:33:41.43#ibcon#read 4, iclass 40, count 2 2006.229.07:33:41.43#ibcon#about to read 5, iclass 40, count 2 2006.229.07:33:41.43#ibcon#read 5, iclass 40, count 2 2006.229.07:33:41.43#ibcon#about to read 6, iclass 40, count 2 2006.229.07:33:41.43#ibcon#read 6, iclass 40, count 2 2006.229.07:33:41.43#ibcon#end of sib2, iclass 40, count 2 2006.229.07:33:41.43#ibcon#*mode == 0, iclass 40, count 2 2006.229.07:33:41.43#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.07:33:41.43#ibcon#[27=AT02-04\r\n] 2006.229.07:33:41.43#ibcon#*before write, iclass 40, count 2 2006.229.07:33:41.43#ibcon#enter sib2, iclass 40, count 2 2006.229.07:33:41.43#ibcon#flushed, iclass 40, count 2 2006.229.07:33:41.43#ibcon#about to write, iclass 40, count 2 2006.229.07:33:41.43#ibcon#wrote, iclass 40, count 2 2006.229.07:33:41.43#ibcon#about to read 3, iclass 40, count 2 2006.229.07:33:41.46#ibcon#read 3, iclass 40, count 2 2006.229.07:33:41.46#ibcon#about to read 4, iclass 40, count 2 2006.229.07:33:41.46#ibcon#read 4, iclass 40, count 2 2006.229.07:33:41.46#ibcon#about to read 5, iclass 40, count 2 2006.229.07:33:41.46#ibcon#read 5, iclass 40, count 2 2006.229.07:33:41.46#ibcon#about to read 6, iclass 40, count 2 2006.229.07:33:41.46#ibcon#read 6, iclass 40, count 2 2006.229.07:33:41.46#ibcon#end of sib2, iclass 40, count 2 2006.229.07:33:41.46#ibcon#*after write, iclass 40, count 2 2006.229.07:33:41.46#ibcon#*before return 0, iclass 40, count 2 2006.229.07:33:41.46#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:41.46#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:33:41.46#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.07:33:41.46#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:41.46#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:41.58#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:41.58#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:41.58#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:33:41.58#ibcon#first serial, iclass 40, count 0 2006.229.07:33:41.58#ibcon#enter sib2, iclass 40, count 0 2006.229.07:33:41.58#ibcon#flushed, iclass 40, count 0 2006.229.07:33:41.58#ibcon#about to write, iclass 40, count 0 2006.229.07:33:41.58#ibcon#wrote, iclass 40, count 0 2006.229.07:33:41.58#ibcon#about to read 3, iclass 40, count 0 2006.229.07:33:41.60#ibcon#read 3, iclass 40, count 0 2006.229.07:33:41.60#ibcon#about to read 4, iclass 40, count 0 2006.229.07:33:41.60#ibcon#read 4, iclass 40, count 0 2006.229.07:33:41.60#ibcon#about to read 5, iclass 40, count 0 2006.229.07:33:41.60#ibcon#read 5, iclass 40, count 0 2006.229.07:33:41.60#ibcon#about to read 6, iclass 40, count 0 2006.229.07:33:41.60#ibcon#read 6, iclass 40, count 0 2006.229.07:33:41.60#ibcon#end of sib2, iclass 40, count 0 2006.229.07:33:41.60#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:33:41.60#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:33:41.60#ibcon#[27=USB\r\n] 2006.229.07:33:41.60#ibcon#*before write, iclass 40, count 0 2006.229.07:33:41.60#ibcon#enter sib2, iclass 40, count 0 2006.229.07:33:41.60#ibcon#flushed, iclass 40, count 0 2006.229.07:33:41.60#ibcon#about to write, iclass 40, count 0 2006.229.07:33:41.60#ibcon#wrote, iclass 40, count 0 2006.229.07:33:41.60#ibcon#about to read 3, iclass 40, count 0 2006.229.07:33:41.63#ibcon#read 3, iclass 40, count 0 2006.229.07:33:41.63#ibcon#about to read 4, iclass 40, count 0 2006.229.07:33:41.63#ibcon#read 4, iclass 40, count 0 2006.229.07:33:41.63#ibcon#about to read 5, iclass 40, count 0 2006.229.07:33:41.63#ibcon#read 5, iclass 40, count 0 2006.229.07:33:41.63#ibcon#about to read 6, iclass 40, count 0 2006.229.07:33:41.63#ibcon#read 6, iclass 40, count 0 2006.229.07:33:41.63#ibcon#end of sib2, iclass 40, count 0 2006.229.07:33:41.63#ibcon#*after write, iclass 40, count 0 2006.229.07:33:41.63#ibcon#*before return 0, iclass 40, count 0 2006.229.07:33:41.63#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:41.63#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:33:41.63#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:33:41.63#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:33:41.63$vck44/vblo=3,649.99 2006.229.07:33:41.63#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.07:33:41.63#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.07:33:41.63#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:41.63#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:41.63#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:41.63#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:41.63#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:33:41.63#ibcon#first serial, iclass 4, count 0 2006.229.07:33:41.63#ibcon#enter sib2, iclass 4, count 0 2006.229.07:33:41.63#ibcon#flushed, iclass 4, count 0 2006.229.07:33:41.63#ibcon#about to write, iclass 4, count 0 2006.229.07:33:41.63#ibcon#wrote, iclass 4, count 0 2006.229.07:33:41.63#ibcon#about to read 3, iclass 4, count 0 2006.229.07:33:41.65#ibcon#read 3, iclass 4, count 0 2006.229.07:33:41.65#ibcon#about to read 4, iclass 4, count 0 2006.229.07:33:41.65#ibcon#read 4, iclass 4, count 0 2006.229.07:33:41.65#ibcon#about to read 5, iclass 4, count 0 2006.229.07:33:41.65#ibcon#read 5, iclass 4, count 0 2006.229.07:33:41.65#ibcon#about to read 6, iclass 4, count 0 2006.229.07:33:41.65#ibcon#read 6, iclass 4, count 0 2006.229.07:33:41.65#ibcon#end of sib2, iclass 4, count 0 2006.229.07:33:41.65#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:33:41.65#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:33:41.65#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:33:41.65#ibcon#*before write, iclass 4, count 0 2006.229.07:33:41.65#ibcon#enter sib2, iclass 4, count 0 2006.229.07:33:41.65#ibcon#flushed, iclass 4, count 0 2006.229.07:33:41.65#ibcon#about to write, iclass 4, count 0 2006.229.07:33:41.65#ibcon#wrote, iclass 4, count 0 2006.229.07:33:41.65#ibcon#about to read 3, iclass 4, count 0 2006.229.07:33:41.69#ibcon#read 3, iclass 4, count 0 2006.229.07:33:41.69#ibcon#about to read 4, iclass 4, count 0 2006.229.07:33:41.69#ibcon#read 4, iclass 4, count 0 2006.229.07:33:41.69#ibcon#about to read 5, iclass 4, count 0 2006.229.07:33:41.69#ibcon#read 5, iclass 4, count 0 2006.229.07:33:41.69#ibcon#about to read 6, iclass 4, count 0 2006.229.07:33:41.69#ibcon#read 6, iclass 4, count 0 2006.229.07:33:41.69#ibcon#end of sib2, iclass 4, count 0 2006.229.07:33:41.69#ibcon#*after write, iclass 4, count 0 2006.229.07:33:41.69#ibcon#*before return 0, iclass 4, count 0 2006.229.07:33:41.69#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:41.69#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:33:41.69#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:33:41.69#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:33:41.69$vck44/vb=3,4 2006.229.07:33:41.69#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.07:33:41.69#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.07:33:41.69#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:41.69#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:41.75#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:41.75#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:41.75#ibcon#enter wrdev, iclass 6, count 2 2006.229.07:33:41.75#ibcon#first serial, iclass 6, count 2 2006.229.07:33:41.75#ibcon#enter sib2, iclass 6, count 2 2006.229.07:33:41.75#ibcon#flushed, iclass 6, count 2 2006.229.07:33:41.75#ibcon#about to write, iclass 6, count 2 2006.229.07:33:41.75#ibcon#wrote, iclass 6, count 2 2006.229.07:33:41.75#ibcon#about to read 3, iclass 6, count 2 2006.229.07:33:41.77#ibcon#read 3, iclass 6, count 2 2006.229.07:33:41.77#ibcon#about to read 4, iclass 6, count 2 2006.229.07:33:41.77#ibcon#read 4, iclass 6, count 2 2006.229.07:33:41.77#ibcon#about to read 5, iclass 6, count 2 2006.229.07:33:41.77#ibcon#read 5, iclass 6, count 2 2006.229.07:33:41.77#ibcon#about to read 6, iclass 6, count 2 2006.229.07:33:41.77#ibcon#read 6, iclass 6, count 2 2006.229.07:33:41.77#ibcon#end of sib2, iclass 6, count 2 2006.229.07:33:41.77#ibcon#*mode == 0, iclass 6, count 2 2006.229.07:33:41.77#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.07:33:41.77#ibcon#[27=AT03-04\r\n] 2006.229.07:33:41.77#ibcon#*before write, iclass 6, count 2 2006.229.07:33:41.77#ibcon#enter sib2, iclass 6, count 2 2006.229.07:33:41.77#ibcon#flushed, iclass 6, count 2 2006.229.07:33:41.77#ibcon#about to write, iclass 6, count 2 2006.229.07:33:41.77#ibcon#wrote, iclass 6, count 2 2006.229.07:33:41.77#ibcon#about to read 3, iclass 6, count 2 2006.229.07:33:41.80#ibcon#read 3, iclass 6, count 2 2006.229.07:33:41.80#ibcon#about to read 4, iclass 6, count 2 2006.229.07:33:41.80#ibcon#read 4, iclass 6, count 2 2006.229.07:33:41.80#ibcon#about to read 5, iclass 6, count 2 2006.229.07:33:41.80#ibcon#read 5, iclass 6, count 2 2006.229.07:33:41.80#ibcon#about to read 6, iclass 6, count 2 2006.229.07:33:41.80#ibcon#read 6, iclass 6, count 2 2006.229.07:33:41.80#ibcon#end of sib2, iclass 6, count 2 2006.229.07:33:41.80#ibcon#*after write, iclass 6, count 2 2006.229.07:33:41.80#ibcon#*before return 0, iclass 6, count 2 2006.229.07:33:41.80#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:41.80#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:33:41.80#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.07:33:41.80#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:41.80#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:41.92#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:41.92#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:41.92#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:33:41.92#ibcon#first serial, iclass 6, count 0 2006.229.07:33:41.92#ibcon#enter sib2, iclass 6, count 0 2006.229.07:33:41.92#ibcon#flushed, iclass 6, count 0 2006.229.07:33:41.92#ibcon#about to write, iclass 6, count 0 2006.229.07:33:41.92#ibcon#wrote, iclass 6, count 0 2006.229.07:33:41.92#ibcon#about to read 3, iclass 6, count 0 2006.229.07:33:41.94#ibcon#read 3, iclass 6, count 0 2006.229.07:33:41.94#ibcon#about to read 4, iclass 6, count 0 2006.229.07:33:41.94#ibcon#read 4, iclass 6, count 0 2006.229.07:33:41.94#ibcon#about to read 5, iclass 6, count 0 2006.229.07:33:41.94#ibcon#read 5, iclass 6, count 0 2006.229.07:33:41.94#ibcon#about to read 6, iclass 6, count 0 2006.229.07:33:41.94#ibcon#read 6, iclass 6, count 0 2006.229.07:33:41.94#ibcon#end of sib2, iclass 6, count 0 2006.229.07:33:41.94#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:33:41.94#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:33:41.94#ibcon#[27=USB\r\n] 2006.229.07:33:41.94#ibcon#*before write, iclass 6, count 0 2006.229.07:33:41.94#ibcon#enter sib2, iclass 6, count 0 2006.229.07:33:41.94#ibcon#flushed, iclass 6, count 0 2006.229.07:33:41.94#ibcon#about to write, iclass 6, count 0 2006.229.07:33:41.94#ibcon#wrote, iclass 6, count 0 2006.229.07:33:41.94#ibcon#about to read 3, iclass 6, count 0 2006.229.07:33:41.97#ibcon#read 3, iclass 6, count 0 2006.229.07:33:41.97#ibcon#about to read 4, iclass 6, count 0 2006.229.07:33:41.97#ibcon#read 4, iclass 6, count 0 2006.229.07:33:41.97#ibcon#about to read 5, iclass 6, count 0 2006.229.07:33:41.97#ibcon#read 5, iclass 6, count 0 2006.229.07:33:41.97#ibcon#about to read 6, iclass 6, count 0 2006.229.07:33:41.97#ibcon#read 6, iclass 6, count 0 2006.229.07:33:41.97#ibcon#end of sib2, iclass 6, count 0 2006.229.07:33:41.97#ibcon#*after write, iclass 6, count 0 2006.229.07:33:41.97#ibcon#*before return 0, iclass 6, count 0 2006.229.07:33:41.97#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:41.97#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:33:41.97#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:33:41.97#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:33:41.97$vck44/vblo=4,679.99 2006.229.07:33:41.97#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.07:33:41.97#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.07:33:41.97#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:41.97#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:41.97#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:41.97#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:41.97#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:33:41.97#ibcon#first serial, iclass 10, count 0 2006.229.07:33:41.97#ibcon#enter sib2, iclass 10, count 0 2006.229.07:33:41.97#ibcon#flushed, iclass 10, count 0 2006.229.07:33:41.97#ibcon#about to write, iclass 10, count 0 2006.229.07:33:41.97#ibcon#wrote, iclass 10, count 0 2006.229.07:33:41.97#ibcon#about to read 3, iclass 10, count 0 2006.229.07:33:41.99#ibcon#read 3, iclass 10, count 0 2006.229.07:33:41.99#ibcon#about to read 4, iclass 10, count 0 2006.229.07:33:41.99#ibcon#read 4, iclass 10, count 0 2006.229.07:33:41.99#ibcon#about to read 5, iclass 10, count 0 2006.229.07:33:41.99#ibcon#read 5, iclass 10, count 0 2006.229.07:33:41.99#ibcon#about to read 6, iclass 10, count 0 2006.229.07:33:41.99#ibcon#read 6, iclass 10, count 0 2006.229.07:33:41.99#ibcon#end of sib2, iclass 10, count 0 2006.229.07:33:41.99#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:33:41.99#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:33:41.99#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:33:41.99#ibcon#*before write, iclass 10, count 0 2006.229.07:33:41.99#ibcon#enter sib2, iclass 10, count 0 2006.229.07:33:41.99#ibcon#flushed, iclass 10, count 0 2006.229.07:33:41.99#ibcon#about to write, iclass 10, count 0 2006.229.07:33:41.99#ibcon#wrote, iclass 10, count 0 2006.229.07:33:41.99#ibcon#about to read 3, iclass 10, count 0 2006.229.07:33:42.03#ibcon#read 3, iclass 10, count 0 2006.229.07:33:42.03#ibcon#about to read 4, iclass 10, count 0 2006.229.07:33:42.03#ibcon#read 4, iclass 10, count 0 2006.229.07:33:42.03#ibcon#about to read 5, iclass 10, count 0 2006.229.07:33:42.03#ibcon#read 5, iclass 10, count 0 2006.229.07:33:42.03#ibcon#about to read 6, iclass 10, count 0 2006.229.07:33:42.03#ibcon#read 6, iclass 10, count 0 2006.229.07:33:42.03#ibcon#end of sib2, iclass 10, count 0 2006.229.07:33:42.03#ibcon#*after write, iclass 10, count 0 2006.229.07:33:42.03#ibcon#*before return 0, iclass 10, count 0 2006.229.07:33:42.03#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:42.03#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:33:42.03#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:33:42.03#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:33:42.03$vck44/vb=4,4 2006.229.07:33:42.03#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.07:33:42.03#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.07:33:42.03#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:42.03#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:42.09#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:42.09#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:42.09#ibcon#enter wrdev, iclass 12, count 2 2006.229.07:33:42.09#ibcon#first serial, iclass 12, count 2 2006.229.07:33:42.09#ibcon#enter sib2, iclass 12, count 2 2006.229.07:33:42.09#ibcon#flushed, iclass 12, count 2 2006.229.07:33:42.09#ibcon#about to write, iclass 12, count 2 2006.229.07:33:42.09#ibcon#wrote, iclass 12, count 2 2006.229.07:33:42.09#ibcon#about to read 3, iclass 12, count 2 2006.229.07:33:42.11#ibcon#read 3, iclass 12, count 2 2006.229.07:33:42.11#ibcon#about to read 4, iclass 12, count 2 2006.229.07:33:42.11#ibcon#read 4, iclass 12, count 2 2006.229.07:33:42.11#ibcon#about to read 5, iclass 12, count 2 2006.229.07:33:42.11#ibcon#read 5, iclass 12, count 2 2006.229.07:33:42.11#ibcon#about to read 6, iclass 12, count 2 2006.229.07:33:42.11#ibcon#read 6, iclass 12, count 2 2006.229.07:33:42.11#ibcon#end of sib2, iclass 12, count 2 2006.229.07:33:42.11#ibcon#*mode == 0, iclass 12, count 2 2006.229.07:33:42.11#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.07:33:42.11#ibcon#[27=AT04-04\r\n] 2006.229.07:33:42.11#ibcon#*before write, iclass 12, count 2 2006.229.07:33:42.11#ibcon#enter sib2, iclass 12, count 2 2006.229.07:33:42.11#ibcon#flushed, iclass 12, count 2 2006.229.07:33:42.11#ibcon#about to write, iclass 12, count 2 2006.229.07:33:42.11#ibcon#wrote, iclass 12, count 2 2006.229.07:33:42.11#ibcon#about to read 3, iclass 12, count 2 2006.229.07:33:42.14#ibcon#read 3, iclass 12, count 2 2006.229.07:33:42.14#ibcon#about to read 4, iclass 12, count 2 2006.229.07:33:42.14#ibcon#read 4, iclass 12, count 2 2006.229.07:33:42.14#ibcon#about to read 5, iclass 12, count 2 2006.229.07:33:42.14#ibcon#read 5, iclass 12, count 2 2006.229.07:33:42.14#ibcon#about to read 6, iclass 12, count 2 2006.229.07:33:42.14#ibcon#read 6, iclass 12, count 2 2006.229.07:33:42.14#ibcon#end of sib2, iclass 12, count 2 2006.229.07:33:42.14#ibcon#*after write, iclass 12, count 2 2006.229.07:33:42.14#ibcon#*before return 0, iclass 12, count 2 2006.229.07:33:42.14#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:42.14#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:33:42.14#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.07:33:42.14#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:42.14#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:42.26#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:42.26#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:42.26#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:33:42.26#ibcon#first serial, iclass 12, count 0 2006.229.07:33:42.26#ibcon#enter sib2, iclass 12, count 0 2006.229.07:33:42.26#ibcon#flushed, iclass 12, count 0 2006.229.07:33:42.26#ibcon#about to write, iclass 12, count 0 2006.229.07:33:42.26#ibcon#wrote, iclass 12, count 0 2006.229.07:33:42.26#ibcon#about to read 3, iclass 12, count 0 2006.229.07:33:42.28#ibcon#read 3, iclass 12, count 0 2006.229.07:33:42.28#ibcon#about to read 4, iclass 12, count 0 2006.229.07:33:42.28#ibcon#read 4, iclass 12, count 0 2006.229.07:33:42.28#ibcon#about to read 5, iclass 12, count 0 2006.229.07:33:42.28#ibcon#read 5, iclass 12, count 0 2006.229.07:33:42.28#ibcon#about to read 6, iclass 12, count 0 2006.229.07:33:42.28#ibcon#read 6, iclass 12, count 0 2006.229.07:33:42.28#ibcon#end of sib2, iclass 12, count 0 2006.229.07:33:42.28#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:33:42.28#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:33:42.28#ibcon#[27=USB\r\n] 2006.229.07:33:42.28#ibcon#*before write, iclass 12, count 0 2006.229.07:33:42.28#ibcon#enter sib2, iclass 12, count 0 2006.229.07:33:42.28#ibcon#flushed, iclass 12, count 0 2006.229.07:33:42.28#ibcon#about to write, iclass 12, count 0 2006.229.07:33:42.28#ibcon#wrote, iclass 12, count 0 2006.229.07:33:42.28#ibcon#about to read 3, iclass 12, count 0 2006.229.07:33:42.31#ibcon#read 3, iclass 12, count 0 2006.229.07:33:42.31#ibcon#about to read 4, iclass 12, count 0 2006.229.07:33:42.31#ibcon#read 4, iclass 12, count 0 2006.229.07:33:42.31#ibcon#about to read 5, iclass 12, count 0 2006.229.07:33:42.31#ibcon#read 5, iclass 12, count 0 2006.229.07:33:42.31#ibcon#about to read 6, iclass 12, count 0 2006.229.07:33:42.31#ibcon#read 6, iclass 12, count 0 2006.229.07:33:42.31#ibcon#end of sib2, iclass 12, count 0 2006.229.07:33:42.31#ibcon#*after write, iclass 12, count 0 2006.229.07:33:42.31#ibcon#*before return 0, iclass 12, count 0 2006.229.07:33:42.31#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:42.31#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:33:42.31#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:33:42.31#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:33:42.31$vck44/vblo=5,709.99 2006.229.07:33:42.31#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.07:33:42.31#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.07:33:42.31#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:42.31#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:42.31#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:42.31#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:42.31#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:33:42.31#ibcon#first serial, iclass 14, count 0 2006.229.07:33:42.31#ibcon#enter sib2, iclass 14, count 0 2006.229.07:33:42.31#ibcon#flushed, iclass 14, count 0 2006.229.07:33:42.31#ibcon#about to write, iclass 14, count 0 2006.229.07:33:42.31#ibcon#wrote, iclass 14, count 0 2006.229.07:33:42.31#ibcon#about to read 3, iclass 14, count 0 2006.229.07:33:42.33#ibcon#read 3, iclass 14, count 0 2006.229.07:33:42.33#ibcon#about to read 4, iclass 14, count 0 2006.229.07:33:42.33#ibcon#read 4, iclass 14, count 0 2006.229.07:33:42.33#ibcon#about to read 5, iclass 14, count 0 2006.229.07:33:42.33#ibcon#read 5, iclass 14, count 0 2006.229.07:33:42.33#ibcon#about to read 6, iclass 14, count 0 2006.229.07:33:42.33#ibcon#read 6, iclass 14, count 0 2006.229.07:33:42.33#ibcon#end of sib2, iclass 14, count 0 2006.229.07:33:42.33#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:33:42.33#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:33:42.33#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:33:42.33#ibcon#*before write, iclass 14, count 0 2006.229.07:33:42.33#ibcon#enter sib2, iclass 14, count 0 2006.229.07:33:42.33#ibcon#flushed, iclass 14, count 0 2006.229.07:33:42.33#ibcon#about to write, iclass 14, count 0 2006.229.07:33:42.33#ibcon#wrote, iclass 14, count 0 2006.229.07:33:42.33#ibcon#about to read 3, iclass 14, count 0 2006.229.07:33:42.37#ibcon#read 3, iclass 14, count 0 2006.229.07:33:42.37#ibcon#about to read 4, iclass 14, count 0 2006.229.07:33:42.37#ibcon#read 4, iclass 14, count 0 2006.229.07:33:42.37#ibcon#about to read 5, iclass 14, count 0 2006.229.07:33:42.37#ibcon#read 5, iclass 14, count 0 2006.229.07:33:42.37#ibcon#about to read 6, iclass 14, count 0 2006.229.07:33:42.37#ibcon#read 6, iclass 14, count 0 2006.229.07:33:42.37#ibcon#end of sib2, iclass 14, count 0 2006.229.07:33:42.37#ibcon#*after write, iclass 14, count 0 2006.229.07:33:42.37#ibcon#*before return 0, iclass 14, count 0 2006.229.07:33:42.37#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:42.37#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:33:42.37#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:33:42.37#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:33:42.37$vck44/vb=5,4 2006.229.07:33:42.37#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.07:33:42.37#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.07:33:42.37#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:42.37#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:42.43#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:42.43#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:42.43#ibcon#enter wrdev, iclass 16, count 2 2006.229.07:33:42.43#ibcon#first serial, iclass 16, count 2 2006.229.07:33:42.43#ibcon#enter sib2, iclass 16, count 2 2006.229.07:33:42.43#ibcon#flushed, iclass 16, count 2 2006.229.07:33:42.43#ibcon#about to write, iclass 16, count 2 2006.229.07:33:42.43#ibcon#wrote, iclass 16, count 2 2006.229.07:33:42.43#ibcon#about to read 3, iclass 16, count 2 2006.229.07:33:42.45#ibcon#read 3, iclass 16, count 2 2006.229.07:33:42.45#ibcon#about to read 4, iclass 16, count 2 2006.229.07:33:42.45#ibcon#read 4, iclass 16, count 2 2006.229.07:33:42.45#ibcon#about to read 5, iclass 16, count 2 2006.229.07:33:42.45#ibcon#read 5, iclass 16, count 2 2006.229.07:33:42.45#ibcon#about to read 6, iclass 16, count 2 2006.229.07:33:42.45#ibcon#read 6, iclass 16, count 2 2006.229.07:33:42.45#ibcon#end of sib2, iclass 16, count 2 2006.229.07:33:42.45#ibcon#*mode == 0, iclass 16, count 2 2006.229.07:33:42.45#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.07:33:42.45#ibcon#[27=AT05-04\r\n] 2006.229.07:33:42.45#ibcon#*before write, iclass 16, count 2 2006.229.07:33:42.45#ibcon#enter sib2, iclass 16, count 2 2006.229.07:33:42.45#ibcon#flushed, iclass 16, count 2 2006.229.07:33:42.45#ibcon#about to write, iclass 16, count 2 2006.229.07:33:42.45#ibcon#wrote, iclass 16, count 2 2006.229.07:33:42.45#ibcon#about to read 3, iclass 16, count 2 2006.229.07:33:42.48#ibcon#read 3, iclass 16, count 2 2006.229.07:33:42.48#ibcon#about to read 4, iclass 16, count 2 2006.229.07:33:42.48#ibcon#read 4, iclass 16, count 2 2006.229.07:33:42.48#ibcon#about to read 5, iclass 16, count 2 2006.229.07:33:42.48#ibcon#read 5, iclass 16, count 2 2006.229.07:33:42.48#ibcon#about to read 6, iclass 16, count 2 2006.229.07:33:42.48#ibcon#read 6, iclass 16, count 2 2006.229.07:33:42.48#ibcon#end of sib2, iclass 16, count 2 2006.229.07:33:42.48#ibcon#*after write, iclass 16, count 2 2006.229.07:33:42.48#ibcon#*before return 0, iclass 16, count 2 2006.229.07:33:42.48#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:42.48#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:33:42.48#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.07:33:42.48#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:42.48#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:42.60#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:42.60#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:42.60#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:33:42.60#ibcon#first serial, iclass 16, count 0 2006.229.07:33:42.60#ibcon#enter sib2, iclass 16, count 0 2006.229.07:33:42.60#ibcon#flushed, iclass 16, count 0 2006.229.07:33:42.60#ibcon#about to write, iclass 16, count 0 2006.229.07:33:42.60#ibcon#wrote, iclass 16, count 0 2006.229.07:33:42.60#ibcon#about to read 3, iclass 16, count 0 2006.229.07:33:42.62#ibcon#read 3, iclass 16, count 0 2006.229.07:33:42.62#ibcon#about to read 4, iclass 16, count 0 2006.229.07:33:42.62#ibcon#read 4, iclass 16, count 0 2006.229.07:33:42.62#ibcon#about to read 5, iclass 16, count 0 2006.229.07:33:42.62#ibcon#read 5, iclass 16, count 0 2006.229.07:33:42.62#ibcon#about to read 6, iclass 16, count 0 2006.229.07:33:42.62#ibcon#read 6, iclass 16, count 0 2006.229.07:33:42.62#ibcon#end of sib2, iclass 16, count 0 2006.229.07:33:42.62#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:33:42.62#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:33:42.62#ibcon#[27=USB\r\n] 2006.229.07:33:42.62#ibcon#*before write, iclass 16, count 0 2006.229.07:33:42.62#ibcon#enter sib2, iclass 16, count 0 2006.229.07:33:42.62#ibcon#flushed, iclass 16, count 0 2006.229.07:33:42.62#ibcon#about to write, iclass 16, count 0 2006.229.07:33:42.62#ibcon#wrote, iclass 16, count 0 2006.229.07:33:42.62#ibcon#about to read 3, iclass 16, count 0 2006.229.07:33:42.65#ibcon#read 3, iclass 16, count 0 2006.229.07:33:42.65#ibcon#about to read 4, iclass 16, count 0 2006.229.07:33:42.65#ibcon#read 4, iclass 16, count 0 2006.229.07:33:42.65#ibcon#about to read 5, iclass 16, count 0 2006.229.07:33:42.65#ibcon#read 5, iclass 16, count 0 2006.229.07:33:42.65#ibcon#about to read 6, iclass 16, count 0 2006.229.07:33:42.65#ibcon#read 6, iclass 16, count 0 2006.229.07:33:42.65#ibcon#end of sib2, iclass 16, count 0 2006.229.07:33:42.65#ibcon#*after write, iclass 16, count 0 2006.229.07:33:42.65#ibcon#*before return 0, iclass 16, count 0 2006.229.07:33:42.65#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:42.65#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:33:42.65#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:33:42.65#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:33:42.65$vck44/vblo=6,719.99 2006.229.07:33:42.65#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:33:42.65#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:33:42.65#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:42.65#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:42.65#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:42.65#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:42.65#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:33:42.65#ibcon#first serial, iclass 18, count 0 2006.229.07:33:42.65#ibcon#enter sib2, iclass 18, count 0 2006.229.07:33:42.65#ibcon#flushed, iclass 18, count 0 2006.229.07:33:42.65#ibcon#about to write, iclass 18, count 0 2006.229.07:33:42.65#ibcon#wrote, iclass 18, count 0 2006.229.07:33:42.65#ibcon#about to read 3, iclass 18, count 0 2006.229.07:33:42.67#ibcon#read 3, iclass 18, count 0 2006.229.07:33:42.67#ibcon#about to read 4, iclass 18, count 0 2006.229.07:33:42.67#ibcon#read 4, iclass 18, count 0 2006.229.07:33:42.67#ibcon#about to read 5, iclass 18, count 0 2006.229.07:33:42.67#ibcon#read 5, iclass 18, count 0 2006.229.07:33:42.67#ibcon#about to read 6, iclass 18, count 0 2006.229.07:33:42.67#ibcon#read 6, iclass 18, count 0 2006.229.07:33:42.67#ibcon#end of sib2, iclass 18, count 0 2006.229.07:33:42.67#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:33:42.67#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:33:42.67#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:33:42.67#ibcon#*before write, iclass 18, count 0 2006.229.07:33:42.67#ibcon#enter sib2, iclass 18, count 0 2006.229.07:33:42.67#ibcon#flushed, iclass 18, count 0 2006.229.07:33:42.67#ibcon#about to write, iclass 18, count 0 2006.229.07:33:42.67#ibcon#wrote, iclass 18, count 0 2006.229.07:33:42.67#ibcon#about to read 3, iclass 18, count 0 2006.229.07:33:42.71#ibcon#read 3, iclass 18, count 0 2006.229.07:33:42.71#ibcon#about to read 4, iclass 18, count 0 2006.229.07:33:42.71#ibcon#read 4, iclass 18, count 0 2006.229.07:33:42.71#ibcon#about to read 5, iclass 18, count 0 2006.229.07:33:42.71#ibcon#read 5, iclass 18, count 0 2006.229.07:33:42.71#ibcon#about to read 6, iclass 18, count 0 2006.229.07:33:42.71#ibcon#read 6, iclass 18, count 0 2006.229.07:33:42.71#ibcon#end of sib2, iclass 18, count 0 2006.229.07:33:42.71#ibcon#*after write, iclass 18, count 0 2006.229.07:33:42.71#ibcon#*before return 0, iclass 18, count 0 2006.229.07:33:42.71#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:42.71#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:33:42.71#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:33:42.71#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:33:42.71$vck44/vb=6,4 2006.229.07:33:42.71#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.07:33:42.71#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.07:33:42.71#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:42.71#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:42.77#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:42.77#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:42.77#ibcon#enter wrdev, iclass 20, count 2 2006.229.07:33:42.77#ibcon#first serial, iclass 20, count 2 2006.229.07:33:42.77#ibcon#enter sib2, iclass 20, count 2 2006.229.07:33:42.77#ibcon#flushed, iclass 20, count 2 2006.229.07:33:42.77#ibcon#about to write, iclass 20, count 2 2006.229.07:33:42.77#ibcon#wrote, iclass 20, count 2 2006.229.07:33:42.77#ibcon#about to read 3, iclass 20, count 2 2006.229.07:33:42.79#ibcon#read 3, iclass 20, count 2 2006.229.07:33:42.79#ibcon#about to read 4, iclass 20, count 2 2006.229.07:33:42.79#ibcon#read 4, iclass 20, count 2 2006.229.07:33:42.79#ibcon#about to read 5, iclass 20, count 2 2006.229.07:33:42.79#ibcon#read 5, iclass 20, count 2 2006.229.07:33:42.79#ibcon#about to read 6, iclass 20, count 2 2006.229.07:33:42.79#ibcon#read 6, iclass 20, count 2 2006.229.07:33:42.79#ibcon#end of sib2, iclass 20, count 2 2006.229.07:33:42.79#ibcon#*mode == 0, iclass 20, count 2 2006.229.07:33:42.79#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.07:33:42.79#ibcon#[27=AT06-04\r\n] 2006.229.07:33:42.79#ibcon#*before write, iclass 20, count 2 2006.229.07:33:42.79#ibcon#enter sib2, iclass 20, count 2 2006.229.07:33:42.79#ibcon#flushed, iclass 20, count 2 2006.229.07:33:42.79#ibcon#about to write, iclass 20, count 2 2006.229.07:33:42.79#ibcon#wrote, iclass 20, count 2 2006.229.07:33:42.79#ibcon#about to read 3, iclass 20, count 2 2006.229.07:33:42.82#ibcon#read 3, iclass 20, count 2 2006.229.07:33:42.82#ibcon#about to read 4, iclass 20, count 2 2006.229.07:33:42.82#ibcon#read 4, iclass 20, count 2 2006.229.07:33:42.82#ibcon#about to read 5, iclass 20, count 2 2006.229.07:33:42.82#ibcon#read 5, iclass 20, count 2 2006.229.07:33:42.82#ibcon#about to read 6, iclass 20, count 2 2006.229.07:33:42.82#ibcon#read 6, iclass 20, count 2 2006.229.07:33:42.82#ibcon#end of sib2, iclass 20, count 2 2006.229.07:33:42.82#ibcon#*after write, iclass 20, count 2 2006.229.07:33:42.82#ibcon#*before return 0, iclass 20, count 2 2006.229.07:33:42.82#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:42.82#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:33:42.82#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.07:33:42.82#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:42.82#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:42.94#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:42.94#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:42.94#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:33:42.94#ibcon#first serial, iclass 20, count 0 2006.229.07:33:42.94#ibcon#enter sib2, iclass 20, count 0 2006.229.07:33:42.94#ibcon#flushed, iclass 20, count 0 2006.229.07:33:42.94#ibcon#about to write, iclass 20, count 0 2006.229.07:33:42.94#ibcon#wrote, iclass 20, count 0 2006.229.07:33:42.94#ibcon#about to read 3, iclass 20, count 0 2006.229.07:33:42.96#ibcon#read 3, iclass 20, count 0 2006.229.07:33:42.96#ibcon#about to read 4, iclass 20, count 0 2006.229.07:33:42.96#ibcon#read 4, iclass 20, count 0 2006.229.07:33:42.96#ibcon#about to read 5, iclass 20, count 0 2006.229.07:33:42.96#ibcon#read 5, iclass 20, count 0 2006.229.07:33:42.96#ibcon#about to read 6, iclass 20, count 0 2006.229.07:33:42.96#ibcon#read 6, iclass 20, count 0 2006.229.07:33:42.96#ibcon#end of sib2, iclass 20, count 0 2006.229.07:33:42.96#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:33:42.96#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:33:42.96#ibcon#[27=USB\r\n] 2006.229.07:33:42.96#ibcon#*before write, iclass 20, count 0 2006.229.07:33:42.96#ibcon#enter sib2, iclass 20, count 0 2006.229.07:33:42.96#ibcon#flushed, iclass 20, count 0 2006.229.07:33:42.96#ibcon#about to write, iclass 20, count 0 2006.229.07:33:42.96#ibcon#wrote, iclass 20, count 0 2006.229.07:33:42.96#ibcon#about to read 3, iclass 20, count 0 2006.229.07:33:42.99#ibcon#read 3, iclass 20, count 0 2006.229.07:33:42.99#ibcon#about to read 4, iclass 20, count 0 2006.229.07:33:42.99#ibcon#read 4, iclass 20, count 0 2006.229.07:33:42.99#ibcon#about to read 5, iclass 20, count 0 2006.229.07:33:42.99#ibcon#read 5, iclass 20, count 0 2006.229.07:33:42.99#ibcon#about to read 6, iclass 20, count 0 2006.229.07:33:42.99#ibcon#read 6, iclass 20, count 0 2006.229.07:33:42.99#ibcon#end of sib2, iclass 20, count 0 2006.229.07:33:42.99#ibcon#*after write, iclass 20, count 0 2006.229.07:33:42.99#ibcon#*before return 0, iclass 20, count 0 2006.229.07:33:42.99#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:42.99#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:33:42.99#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:33:42.99#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:33:42.99$vck44/vblo=7,734.99 2006.229.07:33:42.99#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.07:33:42.99#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.07:33:42.99#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:42.99#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:42.99#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:42.99#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:42.99#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:33:42.99#ibcon#first serial, iclass 22, count 0 2006.229.07:33:42.99#ibcon#enter sib2, iclass 22, count 0 2006.229.07:33:42.99#ibcon#flushed, iclass 22, count 0 2006.229.07:33:42.99#ibcon#about to write, iclass 22, count 0 2006.229.07:33:42.99#ibcon#wrote, iclass 22, count 0 2006.229.07:33:42.99#ibcon#about to read 3, iclass 22, count 0 2006.229.07:33:43.01#ibcon#read 3, iclass 22, count 0 2006.229.07:33:43.01#ibcon#about to read 4, iclass 22, count 0 2006.229.07:33:43.01#ibcon#read 4, iclass 22, count 0 2006.229.07:33:43.01#ibcon#about to read 5, iclass 22, count 0 2006.229.07:33:43.01#ibcon#read 5, iclass 22, count 0 2006.229.07:33:43.01#ibcon#about to read 6, iclass 22, count 0 2006.229.07:33:43.01#ibcon#read 6, iclass 22, count 0 2006.229.07:33:43.01#ibcon#end of sib2, iclass 22, count 0 2006.229.07:33:43.01#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:33:43.01#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:33:43.01#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:33:43.01#ibcon#*before write, iclass 22, count 0 2006.229.07:33:43.01#ibcon#enter sib2, iclass 22, count 0 2006.229.07:33:43.01#ibcon#flushed, iclass 22, count 0 2006.229.07:33:43.01#ibcon#about to write, iclass 22, count 0 2006.229.07:33:43.01#ibcon#wrote, iclass 22, count 0 2006.229.07:33:43.01#ibcon#about to read 3, iclass 22, count 0 2006.229.07:33:43.05#ibcon#read 3, iclass 22, count 0 2006.229.07:33:43.05#ibcon#about to read 4, iclass 22, count 0 2006.229.07:33:43.05#ibcon#read 4, iclass 22, count 0 2006.229.07:33:43.05#ibcon#about to read 5, iclass 22, count 0 2006.229.07:33:43.05#ibcon#read 5, iclass 22, count 0 2006.229.07:33:43.05#ibcon#about to read 6, iclass 22, count 0 2006.229.07:33:43.05#ibcon#read 6, iclass 22, count 0 2006.229.07:33:43.05#ibcon#end of sib2, iclass 22, count 0 2006.229.07:33:43.05#ibcon#*after write, iclass 22, count 0 2006.229.07:33:43.05#ibcon#*before return 0, iclass 22, count 0 2006.229.07:33:43.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:43.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:33:43.05#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:33:43.05#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:33:43.05$vck44/vb=7,4 2006.229.07:33:43.05#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.07:33:43.05#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.07:33:43.05#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:43.05#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:43.11#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:43.11#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:43.11#ibcon#enter wrdev, iclass 24, count 2 2006.229.07:33:43.11#ibcon#first serial, iclass 24, count 2 2006.229.07:33:43.11#ibcon#enter sib2, iclass 24, count 2 2006.229.07:33:43.11#ibcon#flushed, iclass 24, count 2 2006.229.07:33:43.11#ibcon#about to write, iclass 24, count 2 2006.229.07:33:43.11#ibcon#wrote, iclass 24, count 2 2006.229.07:33:43.11#ibcon#about to read 3, iclass 24, count 2 2006.229.07:33:43.13#ibcon#read 3, iclass 24, count 2 2006.229.07:33:43.13#ibcon#about to read 4, iclass 24, count 2 2006.229.07:33:43.13#ibcon#read 4, iclass 24, count 2 2006.229.07:33:43.13#ibcon#about to read 5, iclass 24, count 2 2006.229.07:33:43.13#ibcon#read 5, iclass 24, count 2 2006.229.07:33:43.13#ibcon#about to read 6, iclass 24, count 2 2006.229.07:33:43.13#ibcon#read 6, iclass 24, count 2 2006.229.07:33:43.13#ibcon#end of sib2, iclass 24, count 2 2006.229.07:33:43.13#ibcon#*mode == 0, iclass 24, count 2 2006.229.07:33:43.13#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.07:33:43.13#ibcon#[27=AT07-04\r\n] 2006.229.07:33:43.13#ibcon#*before write, iclass 24, count 2 2006.229.07:33:43.13#ibcon#enter sib2, iclass 24, count 2 2006.229.07:33:43.13#ibcon#flushed, iclass 24, count 2 2006.229.07:33:43.13#ibcon#about to write, iclass 24, count 2 2006.229.07:33:43.13#ibcon#wrote, iclass 24, count 2 2006.229.07:33:43.13#ibcon#about to read 3, iclass 24, count 2 2006.229.07:33:43.16#ibcon#read 3, iclass 24, count 2 2006.229.07:33:43.16#ibcon#about to read 4, iclass 24, count 2 2006.229.07:33:43.16#ibcon#read 4, iclass 24, count 2 2006.229.07:33:43.16#ibcon#about to read 5, iclass 24, count 2 2006.229.07:33:43.16#ibcon#read 5, iclass 24, count 2 2006.229.07:33:43.16#ibcon#about to read 6, iclass 24, count 2 2006.229.07:33:43.16#ibcon#read 6, iclass 24, count 2 2006.229.07:33:43.16#ibcon#end of sib2, iclass 24, count 2 2006.229.07:33:43.16#ibcon#*after write, iclass 24, count 2 2006.229.07:33:43.16#ibcon#*before return 0, iclass 24, count 2 2006.229.07:33:43.16#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:43.16#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:33:43.16#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.07:33:43.16#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:43.16#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:43.28#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:43.28#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:43.28#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:33:43.28#ibcon#first serial, iclass 24, count 0 2006.229.07:33:43.28#ibcon#enter sib2, iclass 24, count 0 2006.229.07:33:43.28#ibcon#flushed, iclass 24, count 0 2006.229.07:33:43.28#ibcon#about to write, iclass 24, count 0 2006.229.07:33:43.28#ibcon#wrote, iclass 24, count 0 2006.229.07:33:43.28#ibcon#about to read 3, iclass 24, count 0 2006.229.07:33:43.30#ibcon#read 3, iclass 24, count 0 2006.229.07:33:43.30#ibcon#about to read 4, iclass 24, count 0 2006.229.07:33:43.30#ibcon#read 4, iclass 24, count 0 2006.229.07:33:43.30#ibcon#about to read 5, iclass 24, count 0 2006.229.07:33:43.30#ibcon#read 5, iclass 24, count 0 2006.229.07:33:43.30#ibcon#about to read 6, iclass 24, count 0 2006.229.07:33:43.30#ibcon#read 6, iclass 24, count 0 2006.229.07:33:43.30#ibcon#end of sib2, iclass 24, count 0 2006.229.07:33:43.30#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:33:43.30#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:33:43.30#ibcon#[27=USB\r\n] 2006.229.07:33:43.30#ibcon#*before write, iclass 24, count 0 2006.229.07:33:43.30#ibcon#enter sib2, iclass 24, count 0 2006.229.07:33:43.30#ibcon#flushed, iclass 24, count 0 2006.229.07:33:43.30#ibcon#about to write, iclass 24, count 0 2006.229.07:33:43.30#ibcon#wrote, iclass 24, count 0 2006.229.07:33:43.30#ibcon#about to read 3, iclass 24, count 0 2006.229.07:33:43.33#ibcon#read 3, iclass 24, count 0 2006.229.07:33:43.33#ibcon#about to read 4, iclass 24, count 0 2006.229.07:33:43.33#ibcon#read 4, iclass 24, count 0 2006.229.07:33:43.33#ibcon#about to read 5, iclass 24, count 0 2006.229.07:33:43.33#ibcon#read 5, iclass 24, count 0 2006.229.07:33:43.33#ibcon#about to read 6, iclass 24, count 0 2006.229.07:33:43.33#ibcon#read 6, iclass 24, count 0 2006.229.07:33:43.33#ibcon#end of sib2, iclass 24, count 0 2006.229.07:33:43.33#ibcon#*after write, iclass 24, count 0 2006.229.07:33:43.33#ibcon#*before return 0, iclass 24, count 0 2006.229.07:33:43.33#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:43.33#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:33:43.33#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:33:43.33#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:33:43.33$vck44/vblo=8,744.99 2006.229.07:33:43.33#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.07:33:43.33#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.07:33:43.33#ibcon#ireg 17 cls_cnt 0 2006.229.07:33:43.33#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:43.33#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:43.33#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:43.33#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:33:43.33#ibcon#first serial, iclass 26, count 0 2006.229.07:33:43.33#ibcon#enter sib2, iclass 26, count 0 2006.229.07:33:43.33#ibcon#flushed, iclass 26, count 0 2006.229.07:33:43.33#ibcon#about to write, iclass 26, count 0 2006.229.07:33:43.33#ibcon#wrote, iclass 26, count 0 2006.229.07:33:43.33#ibcon#about to read 3, iclass 26, count 0 2006.229.07:33:43.35#ibcon#read 3, iclass 26, count 0 2006.229.07:33:43.35#ibcon#about to read 4, iclass 26, count 0 2006.229.07:33:43.35#ibcon#read 4, iclass 26, count 0 2006.229.07:33:43.35#ibcon#about to read 5, iclass 26, count 0 2006.229.07:33:43.35#ibcon#read 5, iclass 26, count 0 2006.229.07:33:43.35#ibcon#about to read 6, iclass 26, count 0 2006.229.07:33:43.35#ibcon#read 6, iclass 26, count 0 2006.229.07:33:43.35#ibcon#end of sib2, iclass 26, count 0 2006.229.07:33:43.35#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:33:43.35#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:33:43.35#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:33:43.35#ibcon#*before write, iclass 26, count 0 2006.229.07:33:43.35#ibcon#enter sib2, iclass 26, count 0 2006.229.07:33:43.35#ibcon#flushed, iclass 26, count 0 2006.229.07:33:43.35#ibcon#about to write, iclass 26, count 0 2006.229.07:33:43.35#ibcon#wrote, iclass 26, count 0 2006.229.07:33:43.35#ibcon#about to read 3, iclass 26, count 0 2006.229.07:33:43.39#ibcon#read 3, iclass 26, count 0 2006.229.07:33:43.39#ibcon#about to read 4, iclass 26, count 0 2006.229.07:33:43.39#ibcon#read 4, iclass 26, count 0 2006.229.07:33:43.39#ibcon#about to read 5, iclass 26, count 0 2006.229.07:33:43.39#ibcon#read 5, iclass 26, count 0 2006.229.07:33:43.39#ibcon#about to read 6, iclass 26, count 0 2006.229.07:33:43.39#ibcon#read 6, iclass 26, count 0 2006.229.07:33:43.39#ibcon#end of sib2, iclass 26, count 0 2006.229.07:33:43.39#ibcon#*after write, iclass 26, count 0 2006.229.07:33:43.39#ibcon#*before return 0, iclass 26, count 0 2006.229.07:33:43.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:43.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:33:43.39#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:33:43.39#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:33:43.39$vck44/vb=8,4 2006.229.07:33:43.39#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.07:33:43.39#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.07:33:43.39#ibcon#ireg 11 cls_cnt 2 2006.229.07:33:43.39#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:43.45#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:43.45#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:43.45#ibcon#enter wrdev, iclass 28, count 2 2006.229.07:33:43.45#ibcon#first serial, iclass 28, count 2 2006.229.07:33:43.45#ibcon#enter sib2, iclass 28, count 2 2006.229.07:33:43.45#ibcon#flushed, iclass 28, count 2 2006.229.07:33:43.45#ibcon#about to write, iclass 28, count 2 2006.229.07:33:43.45#ibcon#wrote, iclass 28, count 2 2006.229.07:33:43.45#ibcon#about to read 3, iclass 28, count 2 2006.229.07:33:43.47#ibcon#read 3, iclass 28, count 2 2006.229.07:33:43.47#ibcon#about to read 4, iclass 28, count 2 2006.229.07:33:43.47#ibcon#read 4, iclass 28, count 2 2006.229.07:33:43.47#ibcon#about to read 5, iclass 28, count 2 2006.229.07:33:43.47#ibcon#read 5, iclass 28, count 2 2006.229.07:33:43.47#ibcon#about to read 6, iclass 28, count 2 2006.229.07:33:43.47#ibcon#read 6, iclass 28, count 2 2006.229.07:33:43.47#ibcon#end of sib2, iclass 28, count 2 2006.229.07:33:43.47#ibcon#*mode == 0, iclass 28, count 2 2006.229.07:33:43.47#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.07:33:43.47#ibcon#[27=AT08-04\r\n] 2006.229.07:33:43.47#ibcon#*before write, iclass 28, count 2 2006.229.07:33:43.47#ibcon#enter sib2, iclass 28, count 2 2006.229.07:33:43.47#ibcon#flushed, iclass 28, count 2 2006.229.07:33:43.47#ibcon#about to write, iclass 28, count 2 2006.229.07:33:43.47#ibcon#wrote, iclass 28, count 2 2006.229.07:33:43.47#ibcon#about to read 3, iclass 28, count 2 2006.229.07:33:43.50#ibcon#read 3, iclass 28, count 2 2006.229.07:33:43.50#ibcon#about to read 4, iclass 28, count 2 2006.229.07:33:43.50#ibcon#read 4, iclass 28, count 2 2006.229.07:33:43.50#ibcon#about to read 5, iclass 28, count 2 2006.229.07:33:43.50#ibcon#read 5, iclass 28, count 2 2006.229.07:33:43.50#ibcon#about to read 6, iclass 28, count 2 2006.229.07:33:43.50#ibcon#read 6, iclass 28, count 2 2006.229.07:33:43.50#ibcon#end of sib2, iclass 28, count 2 2006.229.07:33:43.50#ibcon#*after write, iclass 28, count 2 2006.229.07:33:43.50#ibcon#*before return 0, iclass 28, count 2 2006.229.07:33:43.50#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:43.50#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:33:43.50#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.07:33:43.50#ibcon#ireg 7 cls_cnt 0 2006.229.07:33:43.50#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:43.62#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:43.62#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:43.62#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:33:43.62#ibcon#first serial, iclass 28, count 0 2006.229.07:33:43.62#ibcon#enter sib2, iclass 28, count 0 2006.229.07:33:43.62#ibcon#flushed, iclass 28, count 0 2006.229.07:33:43.62#ibcon#about to write, iclass 28, count 0 2006.229.07:33:43.62#ibcon#wrote, iclass 28, count 0 2006.229.07:33:43.62#ibcon#about to read 3, iclass 28, count 0 2006.229.07:33:43.64#ibcon#read 3, iclass 28, count 0 2006.229.07:33:43.64#ibcon#about to read 4, iclass 28, count 0 2006.229.07:33:43.64#ibcon#read 4, iclass 28, count 0 2006.229.07:33:43.64#ibcon#about to read 5, iclass 28, count 0 2006.229.07:33:43.64#ibcon#read 5, iclass 28, count 0 2006.229.07:33:43.64#ibcon#about to read 6, iclass 28, count 0 2006.229.07:33:43.64#ibcon#read 6, iclass 28, count 0 2006.229.07:33:43.64#ibcon#end of sib2, iclass 28, count 0 2006.229.07:33:43.64#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:33:43.64#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:33:43.64#ibcon#[27=USB\r\n] 2006.229.07:33:43.64#ibcon#*before write, iclass 28, count 0 2006.229.07:33:43.64#ibcon#enter sib2, iclass 28, count 0 2006.229.07:33:43.64#ibcon#flushed, iclass 28, count 0 2006.229.07:33:43.64#ibcon#about to write, iclass 28, count 0 2006.229.07:33:43.64#ibcon#wrote, iclass 28, count 0 2006.229.07:33:43.64#ibcon#about to read 3, iclass 28, count 0 2006.229.07:33:43.67#ibcon#read 3, iclass 28, count 0 2006.229.07:33:43.67#ibcon#about to read 4, iclass 28, count 0 2006.229.07:33:43.67#ibcon#read 4, iclass 28, count 0 2006.229.07:33:43.67#ibcon#about to read 5, iclass 28, count 0 2006.229.07:33:43.67#ibcon#read 5, iclass 28, count 0 2006.229.07:33:43.67#ibcon#about to read 6, iclass 28, count 0 2006.229.07:33:43.67#ibcon#read 6, iclass 28, count 0 2006.229.07:33:43.67#ibcon#end of sib2, iclass 28, count 0 2006.229.07:33:43.67#ibcon#*after write, iclass 28, count 0 2006.229.07:33:43.67#ibcon#*before return 0, iclass 28, count 0 2006.229.07:33:43.67#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:43.67#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:33:43.67#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:33:43.67#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:33:43.67$vck44/vabw=wide 2006.229.07:33:43.67#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:33:43.67#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:33:43.67#ibcon#ireg 8 cls_cnt 0 2006.229.07:33:43.67#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:43.67#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:43.67#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:43.67#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:33:43.67#ibcon#first serial, iclass 30, count 0 2006.229.07:33:43.67#ibcon#enter sib2, iclass 30, count 0 2006.229.07:33:43.67#ibcon#flushed, iclass 30, count 0 2006.229.07:33:43.67#ibcon#about to write, iclass 30, count 0 2006.229.07:33:43.67#ibcon#wrote, iclass 30, count 0 2006.229.07:33:43.67#ibcon#about to read 3, iclass 30, count 0 2006.229.07:33:43.69#ibcon#read 3, iclass 30, count 0 2006.229.07:33:43.69#ibcon#about to read 4, iclass 30, count 0 2006.229.07:33:43.69#ibcon#read 4, iclass 30, count 0 2006.229.07:33:43.69#ibcon#about to read 5, iclass 30, count 0 2006.229.07:33:43.69#ibcon#read 5, iclass 30, count 0 2006.229.07:33:43.69#ibcon#about to read 6, iclass 30, count 0 2006.229.07:33:43.69#ibcon#read 6, iclass 30, count 0 2006.229.07:33:43.69#ibcon#end of sib2, iclass 30, count 0 2006.229.07:33:43.69#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:33:43.69#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:33:43.69#ibcon#[25=BW32\r\n] 2006.229.07:33:43.69#ibcon#*before write, iclass 30, count 0 2006.229.07:33:43.69#ibcon#enter sib2, iclass 30, count 0 2006.229.07:33:43.69#ibcon#flushed, iclass 30, count 0 2006.229.07:33:43.69#ibcon#about to write, iclass 30, count 0 2006.229.07:33:43.69#ibcon#wrote, iclass 30, count 0 2006.229.07:33:43.69#ibcon#about to read 3, iclass 30, count 0 2006.229.07:33:43.72#ibcon#read 3, iclass 30, count 0 2006.229.07:33:43.72#ibcon#about to read 4, iclass 30, count 0 2006.229.07:33:43.72#ibcon#read 4, iclass 30, count 0 2006.229.07:33:43.72#ibcon#about to read 5, iclass 30, count 0 2006.229.07:33:43.72#ibcon#read 5, iclass 30, count 0 2006.229.07:33:43.72#ibcon#about to read 6, iclass 30, count 0 2006.229.07:33:43.72#ibcon#read 6, iclass 30, count 0 2006.229.07:33:43.72#ibcon#end of sib2, iclass 30, count 0 2006.229.07:33:43.72#ibcon#*after write, iclass 30, count 0 2006.229.07:33:43.72#ibcon#*before return 0, iclass 30, count 0 2006.229.07:33:43.72#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:43.72#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:33:43.72#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:33:43.72#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:33:43.72$vck44/vbbw=wide 2006.229.07:33:43.72#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:33:43.72#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:33:43.72#ibcon#ireg 8 cls_cnt 0 2006.229.07:33:43.72#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:33:43.79#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:33:43.79#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:33:43.79#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:33:43.79#ibcon#first serial, iclass 32, count 0 2006.229.07:33:43.79#ibcon#enter sib2, iclass 32, count 0 2006.229.07:33:43.79#ibcon#flushed, iclass 32, count 0 2006.229.07:33:43.79#ibcon#about to write, iclass 32, count 0 2006.229.07:33:43.79#ibcon#wrote, iclass 32, count 0 2006.229.07:33:43.79#ibcon#about to read 3, iclass 32, count 0 2006.229.07:33:43.81#ibcon#read 3, iclass 32, count 0 2006.229.07:33:43.81#ibcon#about to read 4, iclass 32, count 0 2006.229.07:33:43.81#ibcon#read 4, iclass 32, count 0 2006.229.07:33:43.81#ibcon#about to read 5, iclass 32, count 0 2006.229.07:33:43.81#ibcon#read 5, iclass 32, count 0 2006.229.07:33:43.81#ibcon#about to read 6, iclass 32, count 0 2006.229.07:33:43.81#ibcon#read 6, iclass 32, count 0 2006.229.07:33:43.81#ibcon#end of sib2, iclass 32, count 0 2006.229.07:33:43.81#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:33:43.81#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:33:43.81#ibcon#[27=BW32\r\n] 2006.229.07:33:43.81#ibcon#*before write, iclass 32, count 0 2006.229.07:33:43.81#ibcon#enter sib2, iclass 32, count 0 2006.229.07:33:43.81#ibcon#flushed, iclass 32, count 0 2006.229.07:33:43.81#ibcon#about to write, iclass 32, count 0 2006.229.07:33:43.81#ibcon#wrote, iclass 32, count 0 2006.229.07:33:43.81#ibcon#about to read 3, iclass 32, count 0 2006.229.07:33:43.84#ibcon#read 3, iclass 32, count 0 2006.229.07:33:43.84#ibcon#about to read 4, iclass 32, count 0 2006.229.07:33:43.84#ibcon#read 4, iclass 32, count 0 2006.229.07:33:43.84#ibcon#about to read 5, iclass 32, count 0 2006.229.07:33:43.84#ibcon#read 5, iclass 32, count 0 2006.229.07:33:43.84#ibcon#about to read 6, iclass 32, count 0 2006.229.07:33:43.84#ibcon#read 6, iclass 32, count 0 2006.229.07:33:43.84#ibcon#end of sib2, iclass 32, count 0 2006.229.07:33:43.84#ibcon#*after write, iclass 32, count 0 2006.229.07:33:43.84#ibcon#*before return 0, iclass 32, count 0 2006.229.07:33:43.84#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:33:43.84#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:33:43.84#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:33:43.84#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:33:43.84$setupk4/ifdk4 2006.229.07:33:43.84$ifdk4/lo= 2006.229.07:33:43.84$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:33:43.84$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:33:43.84$ifdk4/patch= 2006.229.07:33:43.84$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:33:43.84$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:33:43.85$setupk4/!*+20s 2006.229.07:33:44.49#abcon#<5=/06 3.0 5.5 30.01 921000.2\r\n> 2006.229.07:33:44.51#abcon#{5=INTERFACE CLEAR} 2006.229.07:33:44.57#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:33:54.66#abcon#<5=/06 3.0 5.5 30.01 921000.2\r\n> 2006.229.07:33:54.68#abcon#{5=INTERFACE CLEAR} 2006.229.07:33:54.74#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:33:58.34$setupk4/"tpicd 2006.229.07:33:58.34$setupk4/echo=off 2006.229.07:33:58.34$setupk4/xlog=off 2006.229.07:33:58.34:!2006.229.07:34:55 2006.229.07:34:00.14#trakl#Source acquired 2006.229.07:34:00.14#flagr#flagr/antenna,acquired 2006.229.07:34:55.00:preob 2006.229.07:34:55.14/onsource/TRACKING 2006.229.07:34:55.14:!2006.229.07:35:05 2006.229.07:35:05.00:"tape 2006.229.07:35:05.00:"st=record 2006.229.07:35:05.00:data_valid=on 2006.229.07:35:05.00:midob 2006.229.07:35:06.14/onsource/TRACKING 2006.229.07:35:06.14/wx/30.00,1000.2,92 2006.229.07:35:06.22/cable/+6.3973E-03 2006.229.07:35:07.31/va/01,08,usb,yes,34,37 2006.229.07:35:07.31/va/02,07,usb,yes,37,37 2006.229.07:35:07.31/va/03,06,usb,yes,45,48 2006.229.07:35:07.31/va/04,07,usb,yes,38,40 2006.229.07:35:07.31/va/05,04,usb,yes,34,35 2006.229.07:35:07.31/va/06,04,usb,yes,38,38 2006.229.07:35:07.31/va/07,05,usb,yes,34,34 2006.229.07:35:07.31/va/08,06,usb,yes,25,30 2006.229.07:35:07.54/valo/01,524.99,yes,locked 2006.229.07:35:07.54/valo/02,534.99,yes,locked 2006.229.07:35:07.54/valo/03,564.99,yes,locked 2006.229.07:35:07.54/valo/04,624.99,yes,locked 2006.229.07:35:07.54/valo/05,734.99,yes,locked 2006.229.07:35:07.54/valo/06,814.99,yes,locked 2006.229.07:35:07.54/valo/07,864.99,yes,locked 2006.229.07:35:07.54/valo/08,884.99,yes,locked 2006.229.07:35:08.63/vb/01,04,usb,yes,34,31 2006.229.07:35:08.63/vb/02,04,usb,yes,36,36 2006.229.07:35:08.63/vb/03,04,usb,yes,33,36 2006.229.07:35:08.63/vb/04,04,usb,yes,38,36 2006.229.07:35:08.63/vb/05,04,usb,yes,29,32 2006.229.07:35:08.63/vb/06,04,usb,yes,34,30 2006.229.07:35:08.63/vb/07,04,usb,yes,34,34 2006.229.07:35:08.63/vb/08,04,usb,yes,31,35 2006.229.07:35:08.86/vblo/01,629.99,yes,locked 2006.229.07:35:08.86/vblo/02,634.99,yes,locked 2006.229.07:35:08.86/vblo/03,649.99,yes,locked 2006.229.07:35:08.86/vblo/04,679.99,yes,locked 2006.229.07:35:08.86/vblo/05,709.99,yes,locked 2006.229.07:35:08.86/vblo/06,719.99,yes,locked 2006.229.07:35:08.86/vblo/07,734.99,yes,locked 2006.229.07:35:08.86/vblo/08,744.99,yes,locked 2006.229.07:35:09.01/vabw/8 2006.229.07:35:09.16/vbbw/8 2006.229.07:35:09.25/xfe/off,on,12.0 2006.229.07:35:09.62/ifatt/23,28,28,28 2006.229.07:35:10.07/fmout-gps/S +4.50E-07 2006.229.07:35:10.11:!2006.229.07:35:45 2006.229.07:35:45.01:data_valid=off 2006.229.07:35:45.01:"et 2006.229.07:35:45.01:!+3s 2006.229.07:35:48.02:"tape 2006.229.07:35:48.02:postob 2006.229.07:35:48.13/cable/+6.3966E-03 2006.229.07:35:48.13/wx/29.99,1000.3,92 2006.229.07:35:49.07/fmout-gps/S +4.50E-07 2006.229.07:35:49.07:scan_name=229-0739,jd0608,180 2006.229.07:35:49.07:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.07:35:50.14#flagr#flagr/antenna,new-source 2006.229.07:35:50.14:checkk5 2006.229.07:35:50.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:35:50.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:35:51.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:35:51.79/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:35:52.18/chk_obsdata//k5ts1/T2290735??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:35:52.58/chk_obsdata//k5ts2/T2290735??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:35:52.97/chk_obsdata//k5ts3/T2290735??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:35:53.36/chk_obsdata//k5ts4/T2290735??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.07:35:54.08/k5log//k5ts1_log_newline 2006.229.07:35:54.80/k5log//k5ts2_log_newline 2006.229.07:35:55.50/k5log//k5ts3_log_newline 2006.229.07:35:56.23/k5log//k5ts4_log_newline 2006.229.07:35:56.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:35:56.25:setupk4=1 2006.229.07:35:56.25$setupk4/echo=on 2006.229.07:35:56.25$setupk4/pcalon 2006.229.07:35:56.25$pcalon/"no phase cal control is implemented here 2006.229.07:35:56.25$setupk4/"tpicd=stop 2006.229.07:35:56.25$setupk4/"rec=synch_on 2006.229.07:35:56.25$setupk4/"rec_mode=128 2006.229.07:35:56.25$setupk4/!* 2006.229.07:35:56.25$setupk4/recpk4 2006.229.07:35:56.25$recpk4/recpatch= 2006.229.07:35:56.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:35:56.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:35:56.26$setupk4/vck44 2006.229.07:35:56.26$vck44/valo=1,524.99 2006.229.07:35:56.26#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.07:35:56.26#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.07:35:56.26#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:56.26#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:56.26#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:56.26#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:56.26#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:35:56.26#ibcon#first serial, iclass 17, count 0 2006.229.07:35:56.26#ibcon#enter sib2, iclass 17, count 0 2006.229.07:35:56.26#ibcon#flushed, iclass 17, count 0 2006.229.07:35:56.26#ibcon#about to write, iclass 17, count 0 2006.229.07:35:56.26#ibcon#wrote, iclass 17, count 0 2006.229.07:35:56.26#ibcon#about to read 3, iclass 17, count 0 2006.229.07:35:56.28#ibcon#read 3, iclass 17, count 0 2006.229.07:35:56.28#ibcon#about to read 4, iclass 17, count 0 2006.229.07:35:56.28#ibcon#read 4, iclass 17, count 0 2006.229.07:35:56.28#ibcon#about to read 5, iclass 17, count 0 2006.229.07:35:56.28#ibcon#read 5, iclass 17, count 0 2006.229.07:35:56.28#ibcon#about to read 6, iclass 17, count 0 2006.229.07:35:56.28#ibcon#read 6, iclass 17, count 0 2006.229.07:35:56.28#ibcon#end of sib2, iclass 17, count 0 2006.229.07:35:56.28#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:35:56.28#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:35:56.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:35:56.28#ibcon#*before write, iclass 17, count 0 2006.229.07:35:56.28#ibcon#enter sib2, iclass 17, count 0 2006.229.07:35:56.28#ibcon#flushed, iclass 17, count 0 2006.229.07:35:56.28#ibcon#about to write, iclass 17, count 0 2006.229.07:35:56.28#ibcon#wrote, iclass 17, count 0 2006.229.07:35:56.28#ibcon#about to read 3, iclass 17, count 0 2006.229.07:35:56.33#ibcon#read 3, iclass 17, count 0 2006.229.07:35:56.33#ibcon#about to read 4, iclass 17, count 0 2006.229.07:35:56.33#ibcon#read 4, iclass 17, count 0 2006.229.07:35:56.33#ibcon#about to read 5, iclass 17, count 0 2006.229.07:35:56.33#ibcon#read 5, iclass 17, count 0 2006.229.07:35:56.33#ibcon#about to read 6, iclass 17, count 0 2006.229.07:35:56.33#ibcon#read 6, iclass 17, count 0 2006.229.07:35:56.33#ibcon#end of sib2, iclass 17, count 0 2006.229.07:35:56.33#ibcon#*after write, iclass 17, count 0 2006.229.07:35:56.33#ibcon#*before return 0, iclass 17, count 0 2006.229.07:35:56.33#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:56.33#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:56.33#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:35:56.33#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:35:56.34$vck44/va=1,8 2006.229.07:35:56.34#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.07:35:56.34#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.07:35:56.34#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:56.34#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:56.34#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:56.34#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:56.34#ibcon#enter wrdev, iclass 19, count 2 2006.229.07:35:56.34#ibcon#first serial, iclass 19, count 2 2006.229.07:35:56.34#ibcon#enter sib2, iclass 19, count 2 2006.229.07:35:56.34#ibcon#flushed, iclass 19, count 2 2006.229.07:35:56.34#ibcon#about to write, iclass 19, count 2 2006.229.07:35:56.34#ibcon#wrote, iclass 19, count 2 2006.229.07:35:56.34#ibcon#about to read 3, iclass 19, count 2 2006.229.07:35:56.36#ibcon#read 3, iclass 19, count 2 2006.229.07:35:56.36#ibcon#about to read 4, iclass 19, count 2 2006.229.07:35:56.36#ibcon#read 4, iclass 19, count 2 2006.229.07:35:56.36#ibcon#about to read 5, iclass 19, count 2 2006.229.07:35:56.36#ibcon#read 5, iclass 19, count 2 2006.229.07:35:56.36#ibcon#about to read 6, iclass 19, count 2 2006.229.07:35:56.36#ibcon#read 6, iclass 19, count 2 2006.229.07:35:56.36#ibcon#end of sib2, iclass 19, count 2 2006.229.07:35:56.36#ibcon#*mode == 0, iclass 19, count 2 2006.229.07:35:56.36#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.07:35:56.36#ibcon#[25=AT01-08\r\n] 2006.229.07:35:56.36#ibcon#*before write, iclass 19, count 2 2006.229.07:35:56.36#ibcon#enter sib2, iclass 19, count 2 2006.229.07:35:56.36#ibcon#flushed, iclass 19, count 2 2006.229.07:35:56.36#ibcon#about to write, iclass 19, count 2 2006.229.07:35:56.36#ibcon#wrote, iclass 19, count 2 2006.229.07:35:56.36#ibcon#about to read 3, iclass 19, count 2 2006.229.07:35:56.39#ibcon#read 3, iclass 19, count 2 2006.229.07:35:56.39#ibcon#about to read 4, iclass 19, count 2 2006.229.07:35:56.39#ibcon#read 4, iclass 19, count 2 2006.229.07:35:56.39#ibcon#about to read 5, iclass 19, count 2 2006.229.07:35:56.39#ibcon#read 5, iclass 19, count 2 2006.229.07:35:56.39#ibcon#about to read 6, iclass 19, count 2 2006.229.07:35:56.39#ibcon#read 6, iclass 19, count 2 2006.229.07:35:56.39#ibcon#end of sib2, iclass 19, count 2 2006.229.07:35:56.39#ibcon#*after write, iclass 19, count 2 2006.229.07:35:56.39#ibcon#*before return 0, iclass 19, count 2 2006.229.07:35:56.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:56.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:56.39#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.07:35:56.39#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:56.39#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:56.51#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:56.51#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:56.51#ibcon#enter wrdev, iclass 19, count 0 2006.229.07:35:56.51#ibcon#first serial, iclass 19, count 0 2006.229.07:35:56.51#ibcon#enter sib2, iclass 19, count 0 2006.229.07:35:56.51#ibcon#flushed, iclass 19, count 0 2006.229.07:35:56.51#ibcon#about to write, iclass 19, count 0 2006.229.07:35:56.51#ibcon#wrote, iclass 19, count 0 2006.229.07:35:56.51#ibcon#about to read 3, iclass 19, count 0 2006.229.07:35:56.53#ibcon#read 3, iclass 19, count 0 2006.229.07:35:56.53#ibcon#about to read 4, iclass 19, count 0 2006.229.07:35:56.53#ibcon#read 4, iclass 19, count 0 2006.229.07:35:56.53#ibcon#about to read 5, iclass 19, count 0 2006.229.07:35:56.53#ibcon#read 5, iclass 19, count 0 2006.229.07:35:56.53#ibcon#about to read 6, iclass 19, count 0 2006.229.07:35:56.53#ibcon#read 6, iclass 19, count 0 2006.229.07:35:56.53#ibcon#end of sib2, iclass 19, count 0 2006.229.07:35:56.53#ibcon#*mode == 0, iclass 19, count 0 2006.229.07:35:56.53#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.07:35:56.53#ibcon#[25=USB\r\n] 2006.229.07:35:56.53#ibcon#*before write, iclass 19, count 0 2006.229.07:35:56.53#ibcon#enter sib2, iclass 19, count 0 2006.229.07:35:56.53#ibcon#flushed, iclass 19, count 0 2006.229.07:35:56.53#ibcon#about to write, iclass 19, count 0 2006.229.07:35:56.53#ibcon#wrote, iclass 19, count 0 2006.229.07:35:56.53#ibcon#about to read 3, iclass 19, count 0 2006.229.07:35:56.56#ibcon#read 3, iclass 19, count 0 2006.229.07:35:56.56#ibcon#about to read 4, iclass 19, count 0 2006.229.07:35:56.56#ibcon#read 4, iclass 19, count 0 2006.229.07:35:56.56#ibcon#about to read 5, iclass 19, count 0 2006.229.07:35:56.56#ibcon#read 5, iclass 19, count 0 2006.229.07:35:56.56#ibcon#about to read 6, iclass 19, count 0 2006.229.07:35:56.56#ibcon#read 6, iclass 19, count 0 2006.229.07:35:56.56#ibcon#end of sib2, iclass 19, count 0 2006.229.07:35:56.56#ibcon#*after write, iclass 19, count 0 2006.229.07:35:56.56#ibcon#*before return 0, iclass 19, count 0 2006.229.07:35:56.56#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:56.56#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:56.56#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.07:35:56.56#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.07:35:56.56$vck44/valo=2,534.99 2006.229.07:35:56.56#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.07:35:56.56#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.07:35:56.56#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:56.56#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:56.56#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:56.56#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:56.56#ibcon#enter wrdev, iclass 21, count 0 2006.229.07:35:56.56#ibcon#first serial, iclass 21, count 0 2006.229.07:35:56.56#ibcon#enter sib2, iclass 21, count 0 2006.229.07:35:56.56#ibcon#flushed, iclass 21, count 0 2006.229.07:35:56.56#ibcon#about to write, iclass 21, count 0 2006.229.07:35:56.56#ibcon#wrote, iclass 21, count 0 2006.229.07:35:56.56#ibcon#about to read 3, iclass 21, count 0 2006.229.07:35:56.58#ibcon#read 3, iclass 21, count 0 2006.229.07:35:56.58#ibcon#about to read 4, iclass 21, count 0 2006.229.07:35:56.58#ibcon#read 4, iclass 21, count 0 2006.229.07:35:56.58#ibcon#about to read 5, iclass 21, count 0 2006.229.07:35:56.58#ibcon#read 5, iclass 21, count 0 2006.229.07:35:56.58#ibcon#about to read 6, iclass 21, count 0 2006.229.07:35:56.58#ibcon#read 6, iclass 21, count 0 2006.229.07:35:56.58#ibcon#end of sib2, iclass 21, count 0 2006.229.07:35:56.58#ibcon#*mode == 0, iclass 21, count 0 2006.229.07:35:56.58#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.07:35:56.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:35:56.58#ibcon#*before write, iclass 21, count 0 2006.229.07:35:56.58#ibcon#enter sib2, iclass 21, count 0 2006.229.07:35:56.58#ibcon#flushed, iclass 21, count 0 2006.229.07:35:56.58#ibcon#about to write, iclass 21, count 0 2006.229.07:35:56.58#ibcon#wrote, iclass 21, count 0 2006.229.07:35:56.58#ibcon#about to read 3, iclass 21, count 0 2006.229.07:35:56.62#ibcon#read 3, iclass 21, count 0 2006.229.07:35:56.62#ibcon#about to read 4, iclass 21, count 0 2006.229.07:35:56.62#ibcon#read 4, iclass 21, count 0 2006.229.07:35:56.62#ibcon#about to read 5, iclass 21, count 0 2006.229.07:35:56.62#ibcon#read 5, iclass 21, count 0 2006.229.07:35:56.62#ibcon#about to read 6, iclass 21, count 0 2006.229.07:35:56.62#ibcon#read 6, iclass 21, count 0 2006.229.07:35:56.62#ibcon#end of sib2, iclass 21, count 0 2006.229.07:35:56.62#ibcon#*after write, iclass 21, count 0 2006.229.07:35:56.62#ibcon#*before return 0, iclass 21, count 0 2006.229.07:35:56.62#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:56.62#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:56.62#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.07:35:56.62#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.07:35:56.62$vck44/va=2,7 2006.229.07:35:56.62#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.07:35:56.62#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.07:35:56.62#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:56.62#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:56.68#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:56.68#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:56.68#ibcon#enter wrdev, iclass 23, count 2 2006.229.07:35:56.68#ibcon#first serial, iclass 23, count 2 2006.229.07:35:56.68#ibcon#enter sib2, iclass 23, count 2 2006.229.07:35:56.68#ibcon#flushed, iclass 23, count 2 2006.229.07:35:56.68#ibcon#about to write, iclass 23, count 2 2006.229.07:35:56.68#ibcon#wrote, iclass 23, count 2 2006.229.07:35:56.68#ibcon#about to read 3, iclass 23, count 2 2006.229.07:35:56.70#ibcon#read 3, iclass 23, count 2 2006.229.07:35:56.70#ibcon#about to read 4, iclass 23, count 2 2006.229.07:35:56.70#ibcon#read 4, iclass 23, count 2 2006.229.07:35:56.70#ibcon#about to read 5, iclass 23, count 2 2006.229.07:35:56.70#ibcon#read 5, iclass 23, count 2 2006.229.07:35:56.70#ibcon#about to read 6, iclass 23, count 2 2006.229.07:35:56.70#ibcon#read 6, iclass 23, count 2 2006.229.07:35:56.70#ibcon#end of sib2, iclass 23, count 2 2006.229.07:35:56.70#ibcon#*mode == 0, iclass 23, count 2 2006.229.07:35:56.70#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.07:35:56.70#ibcon#[25=AT02-07\r\n] 2006.229.07:35:56.70#ibcon#*before write, iclass 23, count 2 2006.229.07:35:56.70#ibcon#enter sib2, iclass 23, count 2 2006.229.07:35:56.70#ibcon#flushed, iclass 23, count 2 2006.229.07:35:56.70#ibcon#about to write, iclass 23, count 2 2006.229.07:35:56.70#ibcon#wrote, iclass 23, count 2 2006.229.07:35:56.70#ibcon#about to read 3, iclass 23, count 2 2006.229.07:35:56.70#abcon#<5=/06 2.9 5.3 29.99 921000.3\r\n> 2006.229.07:35:56.72#abcon#{5=INTERFACE CLEAR} 2006.229.07:35:56.73#ibcon#read 3, iclass 23, count 2 2006.229.07:35:56.73#ibcon#about to read 4, iclass 23, count 2 2006.229.07:35:56.73#ibcon#read 4, iclass 23, count 2 2006.229.07:35:56.73#ibcon#about to read 5, iclass 23, count 2 2006.229.07:35:56.73#ibcon#read 5, iclass 23, count 2 2006.229.07:35:56.73#ibcon#about to read 6, iclass 23, count 2 2006.229.07:35:56.73#ibcon#read 6, iclass 23, count 2 2006.229.07:35:56.73#ibcon#end of sib2, iclass 23, count 2 2006.229.07:35:56.73#ibcon#*after write, iclass 23, count 2 2006.229.07:35:56.73#ibcon#*before return 0, iclass 23, count 2 2006.229.07:35:56.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:56.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:56.73#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.07:35:56.73#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:56.73#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:56.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:35:56.85#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:56.85#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:56.85#ibcon#enter wrdev, iclass 23, count 0 2006.229.07:35:56.85#ibcon#first serial, iclass 23, count 0 2006.229.07:35:56.85#ibcon#enter sib2, iclass 23, count 0 2006.229.07:35:56.85#ibcon#flushed, iclass 23, count 0 2006.229.07:35:56.85#ibcon#about to write, iclass 23, count 0 2006.229.07:35:56.85#ibcon#wrote, iclass 23, count 0 2006.229.07:35:56.85#ibcon#about to read 3, iclass 23, count 0 2006.229.07:35:56.87#ibcon#read 3, iclass 23, count 0 2006.229.07:35:56.87#ibcon#about to read 4, iclass 23, count 0 2006.229.07:35:56.87#ibcon#read 4, iclass 23, count 0 2006.229.07:35:56.87#ibcon#about to read 5, iclass 23, count 0 2006.229.07:35:56.87#ibcon#read 5, iclass 23, count 0 2006.229.07:35:56.87#ibcon#about to read 6, iclass 23, count 0 2006.229.07:35:56.87#ibcon#read 6, iclass 23, count 0 2006.229.07:35:56.87#ibcon#end of sib2, iclass 23, count 0 2006.229.07:35:56.87#ibcon#*mode == 0, iclass 23, count 0 2006.229.07:35:56.87#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.07:35:56.87#ibcon#[25=USB\r\n] 2006.229.07:35:56.87#ibcon#*before write, iclass 23, count 0 2006.229.07:35:56.87#ibcon#enter sib2, iclass 23, count 0 2006.229.07:35:56.87#ibcon#flushed, iclass 23, count 0 2006.229.07:35:56.87#ibcon#about to write, iclass 23, count 0 2006.229.07:35:56.87#ibcon#wrote, iclass 23, count 0 2006.229.07:35:56.87#ibcon#about to read 3, iclass 23, count 0 2006.229.07:35:56.90#ibcon#read 3, iclass 23, count 0 2006.229.07:35:56.90#ibcon#about to read 4, iclass 23, count 0 2006.229.07:35:56.90#ibcon#read 4, iclass 23, count 0 2006.229.07:35:56.90#ibcon#about to read 5, iclass 23, count 0 2006.229.07:35:56.90#ibcon#read 5, iclass 23, count 0 2006.229.07:35:56.90#ibcon#about to read 6, iclass 23, count 0 2006.229.07:35:56.90#ibcon#read 6, iclass 23, count 0 2006.229.07:35:56.90#ibcon#end of sib2, iclass 23, count 0 2006.229.07:35:56.90#ibcon#*after write, iclass 23, count 0 2006.229.07:35:56.90#ibcon#*before return 0, iclass 23, count 0 2006.229.07:35:56.90#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:56.90#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:56.90#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.07:35:56.90#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.07:35:56.90$vck44/valo=3,564.99 2006.229.07:35:56.90#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.07:35:56.90#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.07:35:56.90#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:56.90#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:56.90#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:56.90#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:56.90#ibcon#enter wrdev, iclass 29, count 0 2006.229.07:35:56.90#ibcon#first serial, iclass 29, count 0 2006.229.07:35:56.90#ibcon#enter sib2, iclass 29, count 0 2006.229.07:35:56.90#ibcon#flushed, iclass 29, count 0 2006.229.07:35:56.90#ibcon#about to write, iclass 29, count 0 2006.229.07:35:56.90#ibcon#wrote, iclass 29, count 0 2006.229.07:35:56.90#ibcon#about to read 3, iclass 29, count 0 2006.229.07:35:56.92#ibcon#read 3, iclass 29, count 0 2006.229.07:35:56.92#ibcon#about to read 4, iclass 29, count 0 2006.229.07:35:56.92#ibcon#read 4, iclass 29, count 0 2006.229.07:35:56.92#ibcon#about to read 5, iclass 29, count 0 2006.229.07:35:56.92#ibcon#read 5, iclass 29, count 0 2006.229.07:35:56.92#ibcon#about to read 6, iclass 29, count 0 2006.229.07:35:56.92#ibcon#read 6, iclass 29, count 0 2006.229.07:35:56.92#ibcon#end of sib2, iclass 29, count 0 2006.229.07:35:56.92#ibcon#*mode == 0, iclass 29, count 0 2006.229.07:35:56.92#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.07:35:56.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:35:56.92#ibcon#*before write, iclass 29, count 0 2006.229.07:35:56.92#ibcon#enter sib2, iclass 29, count 0 2006.229.07:35:56.92#ibcon#flushed, iclass 29, count 0 2006.229.07:35:56.92#ibcon#about to write, iclass 29, count 0 2006.229.07:35:56.92#ibcon#wrote, iclass 29, count 0 2006.229.07:35:56.92#ibcon#about to read 3, iclass 29, count 0 2006.229.07:35:56.96#ibcon#read 3, iclass 29, count 0 2006.229.07:35:56.96#ibcon#about to read 4, iclass 29, count 0 2006.229.07:35:56.96#ibcon#read 4, iclass 29, count 0 2006.229.07:35:56.96#ibcon#about to read 5, iclass 29, count 0 2006.229.07:35:56.96#ibcon#read 5, iclass 29, count 0 2006.229.07:35:56.96#ibcon#about to read 6, iclass 29, count 0 2006.229.07:35:56.96#ibcon#read 6, iclass 29, count 0 2006.229.07:35:56.96#ibcon#end of sib2, iclass 29, count 0 2006.229.07:35:56.96#ibcon#*after write, iclass 29, count 0 2006.229.07:35:56.96#ibcon#*before return 0, iclass 29, count 0 2006.229.07:35:56.96#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:56.96#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:56.96#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.07:35:56.96#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.07:35:56.96$vck44/va=3,6 2006.229.07:35:56.96#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.07:35:56.96#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.07:35:56.96#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:56.96#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:35:57.02#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:35:57.02#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:35:57.02#ibcon#enter wrdev, iclass 31, count 2 2006.229.07:35:57.02#ibcon#first serial, iclass 31, count 2 2006.229.07:35:57.02#ibcon#enter sib2, iclass 31, count 2 2006.229.07:35:57.02#ibcon#flushed, iclass 31, count 2 2006.229.07:35:57.02#ibcon#about to write, iclass 31, count 2 2006.229.07:35:57.02#ibcon#wrote, iclass 31, count 2 2006.229.07:35:57.02#ibcon#about to read 3, iclass 31, count 2 2006.229.07:35:57.04#ibcon#read 3, iclass 31, count 2 2006.229.07:35:57.04#ibcon#about to read 4, iclass 31, count 2 2006.229.07:35:57.04#ibcon#read 4, iclass 31, count 2 2006.229.07:35:57.04#ibcon#about to read 5, iclass 31, count 2 2006.229.07:35:57.04#ibcon#read 5, iclass 31, count 2 2006.229.07:35:57.04#ibcon#about to read 6, iclass 31, count 2 2006.229.07:35:57.04#ibcon#read 6, iclass 31, count 2 2006.229.07:35:57.04#ibcon#end of sib2, iclass 31, count 2 2006.229.07:35:57.04#ibcon#*mode == 0, iclass 31, count 2 2006.229.07:35:57.04#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.07:35:57.04#ibcon#[25=AT03-06\r\n] 2006.229.07:35:57.04#ibcon#*before write, iclass 31, count 2 2006.229.07:35:57.04#ibcon#enter sib2, iclass 31, count 2 2006.229.07:35:57.04#ibcon#flushed, iclass 31, count 2 2006.229.07:35:57.04#ibcon#about to write, iclass 31, count 2 2006.229.07:35:57.04#ibcon#wrote, iclass 31, count 2 2006.229.07:35:57.04#ibcon#about to read 3, iclass 31, count 2 2006.229.07:35:57.07#ibcon#read 3, iclass 31, count 2 2006.229.07:35:57.07#ibcon#about to read 4, iclass 31, count 2 2006.229.07:35:57.07#ibcon#read 4, iclass 31, count 2 2006.229.07:35:57.07#ibcon#about to read 5, iclass 31, count 2 2006.229.07:35:57.07#ibcon#read 5, iclass 31, count 2 2006.229.07:35:57.07#ibcon#about to read 6, iclass 31, count 2 2006.229.07:35:57.07#ibcon#read 6, iclass 31, count 2 2006.229.07:35:57.07#ibcon#end of sib2, iclass 31, count 2 2006.229.07:35:57.07#ibcon#*after write, iclass 31, count 2 2006.229.07:35:57.07#ibcon#*before return 0, iclass 31, count 2 2006.229.07:35:57.07#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:35:57.07#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:35:57.07#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.07:35:57.07#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:57.07#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:35:57.19#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:35:57.19#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:35:57.19#ibcon#enter wrdev, iclass 31, count 0 2006.229.07:35:57.19#ibcon#first serial, iclass 31, count 0 2006.229.07:35:57.19#ibcon#enter sib2, iclass 31, count 0 2006.229.07:35:57.19#ibcon#flushed, iclass 31, count 0 2006.229.07:35:57.19#ibcon#about to write, iclass 31, count 0 2006.229.07:35:57.19#ibcon#wrote, iclass 31, count 0 2006.229.07:35:57.19#ibcon#about to read 3, iclass 31, count 0 2006.229.07:35:57.21#ibcon#read 3, iclass 31, count 0 2006.229.07:35:57.21#ibcon#about to read 4, iclass 31, count 0 2006.229.07:35:57.21#ibcon#read 4, iclass 31, count 0 2006.229.07:35:57.21#ibcon#about to read 5, iclass 31, count 0 2006.229.07:35:57.21#ibcon#read 5, iclass 31, count 0 2006.229.07:35:57.21#ibcon#about to read 6, iclass 31, count 0 2006.229.07:35:57.21#ibcon#read 6, iclass 31, count 0 2006.229.07:35:57.21#ibcon#end of sib2, iclass 31, count 0 2006.229.07:35:57.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.07:35:57.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.07:35:57.21#ibcon#[25=USB\r\n] 2006.229.07:35:57.21#ibcon#*before write, iclass 31, count 0 2006.229.07:35:57.21#ibcon#enter sib2, iclass 31, count 0 2006.229.07:35:57.21#ibcon#flushed, iclass 31, count 0 2006.229.07:35:57.21#ibcon#about to write, iclass 31, count 0 2006.229.07:35:57.21#ibcon#wrote, iclass 31, count 0 2006.229.07:35:57.21#ibcon#about to read 3, iclass 31, count 0 2006.229.07:35:57.24#ibcon#read 3, iclass 31, count 0 2006.229.07:35:57.24#ibcon#about to read 4, iclass 31, count 0 2006.229.07:35:57.24#ibcon#read 4, iclass 31, count 0 2006.229.07:35:57.24#ibcon#about to read 5, iclass 31, count 0 2006.229.07:35:57.24#ibcon#read 5, iclass 31, count 0 2006.229.07:35:57.24#ibcon#about to read 6, iclass 31, count 0 2006.229.07:35:57.24#ibcon#read 6, iclass 31, count 0 2006.229.07:35:57.24#ibcon#end of sib2, iclass 31, count 0 2006.229.07:35:57.24#ibcon#*after write, iclass 31, count 0 2006.229.07:35:57.24#ibcon#*before return 0, iclass 31, count 0 2006.229.07:35:57.24#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:35:57.24#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:35:57.24#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.07:35:57.24#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.07:35:57.24$vck44/valo=4,624.99 2006.229.07:35:57.24#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.07:35:57.24#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.07:35:57.24#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:57.24#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:35:57.24#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:35:57.24#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:35:57.24#ibcon#enter wrdev, iclass 33, count 0 2006.229.07:35:57.24#ibcon#first serial, iclass 33, count 0 2006.229.07:35:57.24#ibcon#enter sib2, iclass 33, count 0 2006.229.07:35:57.24#ibcon#flushed, iclass 33, count 0 2006.229.07:35:57.24#ibcon#about to write, iclass 33, count 0 2006.229.07:35:57.24#ibcon#wrote, iclass 33, count 0 2006.229.07:35:57.24#ibcon#about to read 3, iclass 33, count 0 2006.229.07:35:57.26#ibcon#read 3, iclass 33, count 0 2006.229.07:35:57.26#ibcon#about to read 4, iclass 33, count 0 2006.229.07:35:57.26#ibcon#read 4, iclass 33, count 0 2006.229.07:35:57.26#ibcon#about to read 5, iclass 33, count 0 2006.229.07:35:57.26#ibcon#read 5, iclass 33, count 0 2006.229.07:35:57.26#ibcon#about to read 6, iclass 33, count 0 2006.229.07:35:57.26#ibcon#read 6, iclass 33, count 0 2006.229.07:35:57.26#ibcon#end of sib2, iclass 33, count 0 2006.229.07:35:57.26#ibcon#*mode == 0, iclass 33, count 0 2006.229.07:35:57.26#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.07:35:57.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:35:57.26#ibcon#*before write, iclass 33, count 0 2006.229.07:35:57.26#ibcon#enter sib2, iclass 33, count 0 2006.229.07:35:57.26#ibcon#flushed, iclass 33, count 0 2006.229.07:35:57.26#ibcon#about to write, iclass 33, count 0 2006.229.07:35:57.26#ibcon#wrote, iclass 33, count 0 2006.229.07:35:57.26#ibcon#about to read 3, iclass 33, count 0 2006.229.07:35:57.30#ibcon#read 3, iclass 33, count 0 2006.229.07:35:57.30#ibcon#about to read 4, iclass 33, count 0 2006.229.07:35:57.30#ibcon#read 4, iclass 33, count 0 2006.229.07:35:57.30#ibcon#about to read 5, iclass 33, count 0 2006.229.07:35:57.30#ibcon#read 5, iclass 33, count 0 2006.229.07:35:57.30#ibcon#about to read 6, iclass 33, count 0 2006.229.07:35:57.30#ibcon#read 6, iclass 33, count 0 2006.229.07:35:57.30#ibcon#end of sib2, iclass 33, count 0 2006.229.07:35:57.30#ibcon#*after write, iclass 33, count 0 2006.229.07:35:57.30#ibcon#*before return 0, iclass 33, count 0 2006.229.07:35:57.30#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:35:57.30#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:35:57.30#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.07:35:57.30#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.07:35:57.30$vck44/va=4,7 2006.229.07:35:57.30#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.07:35:57.30#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.07:35:57.30#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:57.30#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:35:57.36#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:35:57.36#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:35:57.36#ibcon#enter wrdev, iclass 35, count 2 2006.229.07:35:57.36#ibcon#first serial, iclass 35, count 2 2006.229.07:35:57.36#ibcon#enter sib2, iclass 35, count 2 2006.229.07:35:57.36#ibcon#flushed, iclass 35, count 2 2006.229.07:35:57.36#ibcon#about to write, iclass 35, count 2 2006.229.07:35:57.36#ibcon#wrote, iclass 35, count 2 2006.229.07:35:57.36#ibcon#about to read 3, iclass 35, count 2 2006.229.07:35:57.38#ibcon#read 3, iclass 35, count 2 2006.229.07:35:57.38#ibcon#about to read 4, iclass 35, count 2 2006.229.07:35:57.38#ibcon#read 4, iclass 35, count 2 2006.229.07:35:57.38#ibcon#about to read 5, iclass 35, count 2 2006.229.07:35:57.38#ibcon#read 5, iclass 35, count 2 2006.229.07:35:57.38#ibcon#about to read 6, iclass 35, count 2 2006.229.07:35:57.38#ibcon#read 6, iclass 35, count 2 2006.229.07:35:57.38#ibcon#end of sib2, iclass 35, count 2 2006.229.07:35:57.38#ibcon#*mode == 0, iclass 35, count 2 2006.229.07:35:57.38#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.07:35:57.38#ibcon#[25=AT04-07\r\n] 2006.229.07:35:57.38#ibcon#*before write, iclass 35, count 2 2006.229.07:35:57.38#ibcon#enter sib2, iclass 35, count 2 2006.229.07:35:57.38#ibcon#flushed, iclass 35, count 2 2006.229.07:35:57.38#ibcon#about to write, iclass 35, count 2 2006.229.07:35:57.38#ibcon#wrote, iclass 35, count 2 2006.229.07:35:57.38#ibcon#about to read 3, iclass 35, count 2 2006.229.07:35:57.41#ibcon#read 3, iclass 35, count 2 2006.229.07:35:57.41#ibcon#about to read 4, iclass 35, count 2 2006.229.07:35:57.41#ibcon#read 4, iclass 35, count 2 2006.229.07:35:57.41#ibcon#about to read 5, iclass 35, count 2 2006.229.07:35:57.41#ibcon#read 5, iclass 35, count 2 2006.229.07:35:57.41#ibcon#about to read 6, iclass 35, count 2 2006.229.07:35:57.41#ibcon#read 6, iclass 35, count 2 2006.229.07:35:57.41#ibcon#end of sib2, iclass 35, count 2 2006.229.07:35:57.44#ibcon#*after write, iclass 35, count 2 2006.229.07:35:57.44#ibcon#*before return 0, iclass 35, count 2 2006.229.07:35:57.44#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:35:57.44#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:35:57.44#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.07:35:57.44#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:57.44#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:35:57.55#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:35:57.55#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:35:57.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.07:35:57.55#ibcon#first serial, iclass 35, count 0 2006.229.07:35:57.55#ibcon#enter sib2, iclass 35, count 0 2006.229.07:35:57.55#ibcon#flushed, iclass 35, count 0 2006.229.07:35:57.55#ibcon#about to write, iclass 35, count 0 2006.229.07:35:57.55#ibcon#wrote, iclass 35, count 0 2006.229.07:35:57.55#ibcon#about to read 3, iclass 35, count 0 2006.229.07:35:57.57#ibcon#read 3, iclass 35, count 0 2006.229.07:35:57.57#ibcon#about to read 4, iclass 35, count 0 2006.229.07:35:57.57#ibcon#read 4, iclass 35, count 0 2006.229.07:35:57.57#ibcon#about to read 5, iclass 35, count 0 2006.229.07:35:57.57#ibcon#read 5, iclass 35, count 0 2006.229.07:35:57.57#ibcon#about to read 6, iclass 35, count 0 2006.229.07:35:57.57#ibcon#read 6, iclass 35, count 0 2006.229.07:35:57.57#ibcon#end of sib2, iclass 35, count 0 2006.229.07:35:57.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.07:35:57.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.07:35:57.57#ibcon#[25=USB\r\n] 2006.229.07:35:57.57#ibcon#*before write, iclass 35, count 0 2006.229.07:35:57.57#ibcon#enter sib2, iclass 35, count 0 2006.229.07:35:57.57#ibcon#flushed, iclass 35, count 0 2006.229.07:35:57.57#ibcon#about to write, iclass 35, count 0 2006.229.07:35:57.57#ibcon#wrote, iclass 35, count 0 2006.229.07:35:57.57#ibcon#about to read 3, iclass 35, count 0 2006.229.07:35:57.60#ibcon#read 3, iclass 35, count 0 2006.229.07:35:57.60#ibcon#about to read 4, iclass 35, count 0 2006.229.07:35:57.60#ibcon#read 4, iclass 35, count 0 2006.229.07:35:57.60#ibcon#about to read 5, iclass 35, count 0 2006.229.07:35:57.60#ibcon#read 5, iclass 35, count 0 2006.229.07:35:57.60#ibcon#about to read 6, iclass 35, count 0 2006.229.07:35:57.60#ibcon#read 6, iclass 35, count 0 2006.229.07:35:57.60#ibcon#end of sib2, iclass 35, count 0 2006.229.07:35:57.60#ibcon#*after write, iclass 35, count 0 2006.229.07:35:57.60#ibcon#*before return 0, iclass 35, count 0 2006.229.07:35:57.60#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:35:57.60#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:35:57.60#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.07:35:57.60#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.07:35:57.60$vck44/valo=5,734.99 2006.229.07:35:57.60#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.07:35:57.60#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.07:35:57.60#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:57.60#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:35:57.60#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:35:57.60#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:35:57.60#ibcon#enter wrdev, iclass 37, count 0 2006.229.07:35:57.60#ibcon#first serial, iclass 37, count 0 2006.229.07:35:57.60#ibcon#enter sib2, iclass 37, count 0 2006.229.07:35:57.60#ibcon#flushed, iclass 37, count 0 2006.229.07:35:57.60#ibcon#about to write, iclass 37, count 0 2006.229.07:35:57.60#ibcon#wrote, iclass 37, count 0 2006.229.07:35:57.60#ibcon#about to read 3, iclass 37, count 0 2006.229.07:35:57.62#ibcon#read 3, iclass 37, count 0 2006.229.07:35:57.62#ibcon#about to read 4, iclass 37, count 0 2006.229.07:35:57.62#ibcon#read 4, iclass 37, count 0 2006.229.07:35:57.62#ibcon#about to read 5, iclass 37, count 0 2006.229.07:35:57.62#ibcon#read 5, iclass 37, count 0 2006.229.07:35:57.62#ibcon#about to read 6, iclass 37, count 0 2006.229.07:35:57.62#ibcon#read 6, iclass 37, count 0 2006.229.07:35:57.62#ibcon#end of sib2, iclass 37, count 0 2006.229.07:35:57.62#ibcon#*mode == 0, iclass 37, count 0 2006.229.07:35:57.62#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.07:35:57.62#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:35:57.62#ibcon#*before write, iclass 37, count 0 2006.229.07:35:57.62#ibcon#enter sib2, iclass 37, count 0 2006.229.07:35:57.62#ibcon#flushed, iclass 37, count 0 2006.229.07:35:57.62#ibcon#about to write, iclass 37, count 0 2006.229.07:35:57.62#ibcon#wrote, iclass 37, count 0 2006.229.07:35:57.62#ibcon#about to read 3, iclass 37, count 0 2006.229.07:35:57.66#ibcon#read 3, iclass 37, count 0 2006.229.07:35:57.66#ibcon#about to read 4, iclass 37, count 0 2006.229.07:35:57.66#ibcon#read 4, iclass 37, count 0 2006.229.07:35:57.66#ibcon#about to read 5, iclass 37, count 0 2006.229.07:35:57.66#ibcon#read 5, iclass 37, count 0 2006.229.07:35:57.66#ibcon#about to read 6, iclass 37, count 0 2006.229.07:35:57.66#ibcon#read 6, iclass 37, count 0 2006.229.07:35:57.66#ibcon#end of sib2, iclass 37, count 0 2006.229.07:35:57.66#ibcon#*after write, iclass 37, count 0 2006.229.07:35:57.66#ibcon#*before return 0, iclass 37, count 0 2006.229.07:35:57.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:35:57.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:35:57.66#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.07:35:57.66#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.07:35:57.66$vck44/va=5,4 2006.229.07:35:57.66#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.07:35:57.66#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.07:35:57.66#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:57.66#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:35:57.72#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:35:57.72#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:35:57.72#ibcon#enter wrdev, iclass 39, count 2 2006.229.07:35:57.72#ibcon#first serial, iclass 39, count 2 2006.229.07:35:57.72#ibcon#enter sib2, iclass 39, count 2 2006.229.07:35:57.72#ibcon#flushed, iclass 39, count 2 2006.229.07:35:57.72#ibcon#about to write, iclass 39, count 2 2006.229.07:35:57.72#ibcon#wrote, iclass 39, count 2 2006.229.07:35:57.72#ibcon#about to read 3, iclass 39, count 2 2006.229.07:35:57.74#ibcon#read 3, iclass 39, count 2 2006.229.07:35:57.74#ibcon#about to read 4, iclass 39, count 2 2006.229.07:35:57.74#ibcon#read 4, iclass 39, count 2 2006.229.07:35:57.74#ibcon#about to read 5, iclass 39, count 2 2006.229.07:35:57.74#ibcon#read 5, iclass 39, count 2 2006.229.07:35:57.74#ibcon#about to read 6, iclass 39, count 2 2006.229.07:35:57.74#ibcon#read 6, iclass 39, count 2 2006.229.07:35:57.74#ibcon#end of sib2, iclass 39, count 2 2006.229.07:35:57.74#ibcon#*mode == 0, iclass 39, count 2 2006.229.07:35:57.74#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.07:35:57.74#ibcon#[25=AT05-04\r\n] 2006.229.07:35:57.74#ibcon#*before write, iclass 39, count 2 2006.229.07:35:57.74#ibcon#enter sib2, iclass 39, count 2 2006.229.07:35:57.74#ibcon#flushed, iclass 39, count 2 2006.229.07:35:57.74#ibcon#about to write, iclass 39, count 2 2006.229.07:35:57.74#ibcon#wrote, iclass 39, count 2 2006.229.07:35:57.74#ibcon#about to read 3, iclass 39, count 2 2006.229.07:35:57.77#ibcon#read 3, iclass 39, count 2 2006.229.07:35:57.77#ibcon#about to read 4, iclass 39, count 2 2006.229.07:35:57.77#ibcon#read 4, iclass 39, count 2 2006.229.07:35:57.77#ibcon#about to read 5, iclass 39, count 2 2006.229.07:35:57.77#ibcon#read 5, iclass 39, count 2 2006.229.07:35:57.77#ibcon#about to read 6, iclass 39, count 2 2006.229.07:35:57.77#ibcon#read 6, iclass 39, count 2 2006.229.07:35:57.77#ibcon#end of sib2, iclass 39, count 2 2006.229.07:35:57.77#ibcon#*after write, iclass 39, count 2 2006.229.07:35:57.77#ibcon#*before return 0, iclass 39, count 2 2006.229.07:35:57.77#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:35:57.77#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:35:57.77#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.07:35:57.77#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:57.77#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:35:57.89#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:35:57.89#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:35:57.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.07:35:57.89#ibcon#first serial, iclass 39, count 0 2006.229.07:35:57.89#ibcon#enter sib2, iclass 39, count 0 2006.229.07:35:57.89#ibcon#flushed, iclass 39, count 0 2006.229.07:35:57.89#ibcon#about to write, iclass 39, count 0 2006.229.07:35:57.89#ibcon#wrote, iclass 39, count 0 2006.229.07:35:57.89#ibcon#about to read 3, iclass 39, count 0 2006.229.07:35:57.91#ibcon#read 3, iclass 39, count 0 2006.229.07:35:57.91#ibcon#about to read 4, iclass 39, count 0 2006.229.07:35:57.91#ibcon#read 4, iclass 39, count 0 2006.229.07:35:57.91#ibcon#about to read 5, iclass 39, count 0 2006.229.07:35:57.91#ibcon#read 5, iclass 39, count 0 2006.229.07:35:57.91#ibcon#about to read 6, iclass 39, count 0 2006.229.07:35:57.91#ibcon#read 6, iclass 39, count 0 2006.229.07:35:57.91#ibcon#end of sib2, iclass 39, count 0 2006.229.07:35:57.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.07:35:57.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.07:35:57.91#ibcon#[25=USB\r\n] 2006.229.07:35:57.91#ibcon#*before write, iclass 39, count 0 2006.229.07:35:57.91#ibcon#enter sib2, iclass 39, count 0 2006.229.07:35:57.91#ibcon#flushed, iclass 39, count 0 2006.229.07:35:57.91#ibcon#about to write, iclass 39, count 0 2006.229.07:35:57.91#ibcon#wrote, iclass 39, count 0 2006.229.07:35:57.91#ibcon#about to read 3, iclass 39, count 0 2006.229.07:35:57.94#ibcon#read 3, iclass 39, count 0 2006.229.07:35:57.94#ibcon#about to read 4, iclass 39, count 0 2006.229.07:35:57.94#ibcon#read 4, iclass 39, count 0 2006.229.07:35:57.94#ibcon#about to read 5, iclass 39, count 0 2006.229.07:35:57.94#ibcon#read 5, iclass 39, count 0 2006.229.07:35:57.94#ibcon#about to read 6, iclass 39, count 0 2006.229.07:35:57.94#ibcon#read 6, iclass 39, count 0 2006.229.07:35:57.94#ibcon#end of sib2, iclass 39, count 0 2006.229.07:35:57.94#ibcon#*after write, iclass 39, count 0 2006.229.07:35:57.94#ibcon#*before return 0, iclass 39, count 0 2006.229.07:35:57.94#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:35:57.94#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:35:57.94#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.07:35:57.94#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.07:35:57.94$vck44/valo=6,814.99 2006.229.07:35:57.94#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.07:35:57.94#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.07:35:57.94#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:57.94#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:35:57.94#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:35:57.94#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:35:57.94#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:35:57.94#ibcon#first serial, iclass 3, count 0 2006.229.07:35:57.94#ibcon#enter sib2, iclass 3, count 0 2006.229.07:35:57.94#ibcon#flushed, iclass 3, count 0 2006.229.07:35:57.94#ibcon#about to write, iclass 3, count 0 2006.229.07:35:57.94#ibcon#wrote, iclass 3, count 0 2006.229.07:35:57.94#ibcon#about to read 3, iclass 3, count 0 2006.229.07:35:57.96#ibcon#read 3, iclass 3, count 0 2006.229.07:35:57.96#ibcon#about to read 4, iclass 3, count 0 2006.229.07:35:57.96#ibcon#read 4, iclass 3, count 0 2006.229.07:35:57.96#ibcon#about to read 5, iclass 3, count 0 2006.229.07:35:57.96#ibcon#read 5, iclass 3, count 0 2006.229.07:35:57.96#ibcon#about to read 6, iclass 3, count 0 2006.229.07:35:57.96#ibcon#read 6, iclass 3, count 0 2006.229.07:35:57.96#ibcon#end of sib2, iclass 3, count 0 2006.229.07:35:57.96#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:35:57.96#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:35:57.96#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:35:57.96#ibcon#*before write, iclass 3, count 0 2006.229.07:35:57.96#ibcon#enter sib2, iclass 3, count 0 2006.229.07:35:57.96#ibcon#flushed, iclass 3, count 0 2006.229.07:35:57.96#ibcon#about to write, iclass 3, count 0 2006.229.07:35:57.96#ibcon#wrote, iclass 3, count 0 2006.229.07:35:57.96#ibcon#about to read 3, iclass 3, count 0 2006.229.07:35:58.00#ibcon#read 3, iclass 3, count 0 2006.229.07:35:58.00#ibcon#about to read 4, iclass 3, count 0 2006.229.07:35:58.00#ibcon#read 4, iclass 3, count 0 2006.229.07:35:58.00#ibcon#about to read 5, iclass 3, count 0 2006.229.07:35:58.00#ibcon#read 5, iclass 3, count 0 2006.229.07:35:58.00#ibcon#about to read 6, iclass 3, count 0 2006.229.07:35:58.00#ibcon#read 6, iclass 3, count 0 2006.229.07:35:58.00#ibcon#end of sib2, iclass 3, count 0 2006.229.07:35:58.00#ibcon#*after write, iclass 3, count 0 2006.229.07:35:58.00#ibcon#*before return 0, iclass 3, count 0 2006.229.07:35:58.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:35:58.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:35:58.00#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:35:58.00#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:35:58.00$vck44/va=6,4 2006.229.07:35:58.00#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.07:35:58.00#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.07:35:58.00#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:58.00#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:35:58.06#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:35:58.06#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:35:58.06#ibcon#enter wrdev, iclass 5, count 2 2006.229.07:35:58.06#ibcon#first serial, iclass 5, count 2 2006.229.07:35:58.06#ibcon#enter sib2, iclass 5, count 2 2006.229.07:35:58.06#ibcon#flushed, iclass 5, count 2 2006.229.07:35:58.06#ibcon#about to write, iclass 5, count 2 2006.229.07:35:58.06#ibcon#wrote, iclass 5, count 2 2006.229.07:35:58.06#ibcon#about to read 3, iclass 5, count 2 2006.229.07:35:58.08#ibcon#read 3, iclass 5, count 2 2006.229.07:35:58.08#ibcon#about to read 4, iclass 5, count 2 2006.229.07:35:58.08#ibcon#read 4, iclass 5, count 2 2006.229.07:35:58.08#ibcon#about to read 5, iclass 5, count 2 2006.229.07:35:58.08#ibcon#read 5, iclass 5, count 2 2006.229.07:35:58.08#ibcon#about to read 6, iclass 5, count 2 2006.229.07:35:58.08#ibcon#read 6, iclass 5, count 2 2006.229.07:35:58.08#ibcon#end of sib2, iclass 5, count 2 2006.229.07:35:58.08#ibcon#*mode == 0, iclass 5, count 2 2006.229.07:35:58.08#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.07:35:58.08#ibcon#[25=AT06-04\r\n] 2006.229.07:35:58.08#ibcon#*before write, iclass 5, count 2 2006.229.07:35:58.08#ibcon#enter sib2, iclass 5, count 2 2006.229.07:35:58.08#ibcon#flushed, iclass 5, count 2 2006.229.07:35:58.08#ibcon#about to write, iclass 5, count 2 2006.229.07:35:58.08#ibcon#wrote, iclass 5, count 2 2006.229.07:35:58.08#ibcon#about to read 3, iclass 5, count 2 2006.229.07:35:58.11#ibcon#read 3, iclass 5, count 2 2006.229.07:35:58.11#ibcon#about to read 4, iclass 5, count 2 2006.229.07:35:58.11#ibcon#read 4, iclass 5, count 2 2006.229.07:35:58.11#ibcon#about to read 5, iclass 5, count 2 2006.229.07:35:58.11#ibcon#read 5, iclass 5, count 2 2006.229.07:35:58.11#ibcon#about to read 6, iclass 5, count 2 2006.229.07:35:58.11#ibcon#read 6, iclass 5, count 2 2006.229.07:35:58.11#ibcon#end of sib2, iclass 5, count 2 2006.229.07:35:58.11#ibcon#*after write, iclass 5, count 2 2006.229.07:35:58.11#ibcon#*before return 0, iclass 5, count 2 2006.229.07:35:58.11#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:35:58.11#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:35:58.11#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.07:35:58.11#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:58.11#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:35:58.23#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:35:58.23#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:35:58.23#ibcon#enter wrdev, iclass 5, count 0 2006.229.07:35:58.23#ibcon#first serial, iclass 5, count 0 2006.229.07:35:58.23#ibcon#enter sib2, iclass 5, count 0 2006.229.07:35:58.23#ibcon#flushed, iclass 5, count 0 2006.229.07:35:58.23#ibcon#about to write, iclass 5, count 0 2006.229.07:35:58.23#ibcon#wrote, iclass 5, count 0 2006.229.07:35:58.23#ibcon#about to read 3, iclass 5, count 0 2006.229.07:35:58.25#ibcon#read 3, iclass 5, count 0 2006.229.07:35:58.25#ibcon#about to read 4, iclass 5, count 0 2006.229.07:35:58.25#ibcon#read 4, iclass 5, count 0 2006.229.07:35:58.25#ibcon#about to read 5, iclass 5, count 0 2006.229.07:35:58.25#ibcon#read 5, iclass 5, count 0 2006.229.07:35:58.25#ibcon#about to read 6, iclass 5, count 0 2006.229.07:35:58.25#ibcon#read 6, iclass 5, count 0 2006.229.07:35:58.25#ibcon#end of sib2, iclass 5, count 0 2006.229.07:35:58.25#ibcon#*mode == 0, iclass 5, count 0 2006.229.07:35:58.25#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.07:35:58.25#ibcon#[25=USB\r\n] 2006.229.07:35:58.25#ibcon#*before write, iclass 5, count 0 2006.229.07:35:58.25#ibcon#enter sib2, iclass 5, count 0 2006.229.07:35:58.25#ibcon#flushed, iclass 5, count 0 2006.229.07:35:58.25#ibcon#about to write, iclass 5, count 0 2006.229.07:35:58.25#ibcon#wrote, iclass 5, count 0 2006.229.07:35:58.25#ibcon#about to read 3, iclass 5, count 0 2006.229.07:35:58.28#ibcon#read 3, iclass 5, count 0 2006.229.07:35:58.28#ibcon#about to read 4, iclass 5, count 0 2006.229.07:35:58.28#ibcon#read 4, iclass 5, count 0 2006.229.07:35:58.28#ibcon#about to read 5, iclass 5, count 0 2006.229.07:35:58.28#ibcon#read 5, iclass 5, count 0 2006.229.07:35:58.28#ibcon#about to read 6, iclass 5, count 0 2006.229.07:35:58.28#ibcon#read 6, iclass 5, count 0 2006.229.07:35:58.28#ibcon#end of sib2, iclass 5, count 0 2006.229.07:35:58.28#ibcon#*after write, iclass 5, count 0 2006.229.07:35:58.28#ibcon#*before return 0, iclass 5, count 0 2006.229.07:35:58.28#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:35:58.28#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:35:58.28#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.07:35:58.28#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.07:35:58.28$vck44/valo=7,864.99 2006.229.07:35:58.28#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.07:35:58.28#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.07:35:58.28#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:58.28#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:35:58.28#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:35:58.28#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:35:58.28#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:35:58.28#ibcon#first serial, iclass 7, count 0 2006.229.07:35:58.28#ibcon#enter sib2, iclass 7, count 0 2006.229.07:35:58.28#ibcon#flushed, iclass 7, count 0 2006.229.07:35:58.28#ibcon#about to write, iclass 7, count 0 2006.229.07:35:58.28#ibcon#wrote, iclass 7, count 0 2006.229.07:35:58.28#ibcon#about to read 3, iclass 7, count 0 2006.229.07:35:58.30#ibcon#read 3, iclass 7, count 0 2006.229.07:35:58.30#ibcon#about to read 4, iclass 7, count 0 2006.229.07:35:58.30#ibcon#read 4, iclass 7, count 0 2006.229.07:35:58.30#ibcon#about to read 5, iclass 7, count 0 2006.229.07:35:58.30#ibcon#read 5, iclass 7, count 0 2006.229.07:35:58.30#ibcon#about to read 6, iclass 7, count 0 2006.229.07:35:58.30#ibcon#read 6, iclass 7, count 0 2006.229.07:35:58.30#ibcon#end of sib2, iclass 7, count 0 2006.229.07:35:58.30#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:35:58.30#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:35:58.30#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:35:58.30#ibcon#*before write, iclass 7, count 0 2006.229.07:35:58.30#ibcon#enter sib2, iclass 7, count 0 2006.229.07:35:58.30#ibcon#flushed, iclass 7, count 0 2006.229.07:35:58.30#ibcon#about to write, iclass 7, count 0 2006.229.07:35:58.30#ibcon#wrote, iclass 7, count 0 2006.229.07:35:58.30#ibcon#about to read 3, iclass 7, count 0 2006.229.07:35:58.34#ibcon#read 3, iclass 7, count 0 2006.229.07:35:58.34#ibcon#about to read 4, iclass 7, count 0 2006.229.07:35:58.34#ibcon#read 4, iclass 7, count 0 2006.229.07:35:58.34#ibcon#about to read 5, iclass 7, count 0 2006.229.07:35:58.34#ibcon#read 5, iclass 7, count 0 2006.229.07:35:58.34#ibcon#about to read 6, iclass 7, count 0 2006.229.07:35:58.34#ibcon#read 6, iclass 7, count 0 2006.229.07:35:58.34#ibcon#end of sib2, iclass 7, count 0 2006.229.07:35:58.34#ibcon#*after write, iclass 7, count 0 2006.229.07:35:58.34#ibcon#*before return 0, iclass 7, count 0 2006.229.07:35:58.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:35:58.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:35:58.34#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:35:58.34#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:35:58.34$vck44/va=7,5 2006.229.07:35:58.34#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.07:35:58.34#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.07:35:58.34#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:58.34#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:35:58.40#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:35:58.40#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:35:58.40#ibcon#enter wrdev, iclass 11, count 2 2006.229.07:35:58.40#ibcon#first serial, iclass 11, count 2 2006.229.07:35:58.40#ibcon#enter sib2, iclass 11, count 2 2006.229.07:35:58.40#ibcon#flushed, iclass 11, count 2 2006.229.07:35:58.40#ibcon#about to write, iclass 11, count 2 2006.229.07:35:58.40#ibcon#wrote, iclass 11, count 2 2006.229.07:35:58.40#ibcon#about to read 3, iclass 11, count 2 2006.229.07:35:58.42#ibcon#read 3, iclass 11, count 2 2006.229.07:35:58.42#ibcon#about to read 4, iclass 11, count 2 2006.229.07:35:58.42#ibcon#read 4, iclass 11, count 2 2006.229.07:35:58.42#ibcon#about to read 5, iclass 11, count 2 2006.229.07:35:58.42#ibcon#read 5, iclass 11, count 2 2006.229.07:35:58.42#ibcon#about to read 6, iclass 11, count 2 2006.229.07:35:58.42#ibcon#read 6, iclass 11, count 2 2006.229.07:35:58.42#ibcon#end of sib2, iclass 11, count 2 2006.229.07:35:58.42#ibcon#*mode == 0, iclass 11, count 2 2006.229.07:35:58.42#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.07:35:58.42#ibcon#[25=AT07-05\r\n] 2006.229.07:35:58.42#ibcon#*before write, iclass 11, count 2 2006.229.07:35:58.42#ibcon#enter sib2, iclass 11, count 2 2006.229.07:35:58.42#ibcon#flushed, iclass 11, count 2 2006.229.07:35:58.42#ibcon#about to write, iclass 11, count 2 2006.229.07:35:58.42#ibcon#wrote, iclass 11, count 2 2006.229.07:35:58.42#ibcon#about to read 3, iclass 11, count 2 2006.229.07:35:58.45#ibcon#read 3, iclass 11, count 2 2006.229.07:35:58.45#ibcon#about to read 4, iclass 11, count 2 2006.229.07:35:58.45#ibcon#read 4, iclass 11, count 2 2006.229.07:35:58.45#ibcon#about to read 5, iclass 11, count 2 2006.229.07:35:58.45#ibcon#read 5, iclass 11, count 2 2006.229.07:35:58.45#ibcon#about to read 6, iclass 11, count 2 2006.229.07:35:58.45#ibcon#read 6, iclass 11, count 2 2006.229.07:35:58.45#ibcon#end of sib2, iclass 11, count 2 2006.229.07:35:58.45#ibcon#*after write, iclass 11, count 2 2006.229.07:35:58.45#ibcon#*before return 0, iclass 11, count 2 2006.229.07:35:58.45#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:35:58.45#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:35:58.45#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.07:35:58.45#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:58.45#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:35:58.57#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:35:58.57#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:35:58.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.07:35:58.57#ibcon#first serial, iclass 11, count 0 2006.229.07:35:58.57#ibcon#enter sib2, iclass 11, count 0 2006.229.07:35:58.57#ibcon#flushed, iclass 11, count 0 2006.229.07:35:58.57#ibcon#about to write, iclass 11, count 0 2006.229.07:35:58.57#ibcon#wrote, iclass 11, count 0 2006.229.07:35:58.57#ibcon#about to read 3, iclass 11, count 0 2006.229.07:35:58.59#ibcon#read 3, iclass 11, count 0 2006.229.07:35:58.59#ibcon#about to read 4, iclass 11, count 0 2006.229.07:35:58.59#ibcon#read 4, iclass 11, count 0 2006.229.07:35:58.59#ibcon#about to read 5, iclass 11, count 0 2006.229.07:35:58.59#ibcon#read 5, iclass 11, count 0 2006.229.07:35:58.59#ibcon#about to read 6, iclass 11, count 0 2006.229.07:35:58.59#ibcon#read 6, iclass 11, count 0 2006.229.07:35:58.59#ibcon#end of sib2, iclass 11, count 0 2006.229.07:35:58.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.07:35:58.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.07:35:58.59#ibcon#[25=USB\r\n] 2006.229.07:35:58.59#ibcon#*before write, iclass 11, count 0 2006.229.07:35:58.59#ibcon#enter sib2, iclass 11, count 0 2006.229.07:35:58.59#ibcon#flushed, iclass 11, count 0 2006.229.07:35:58.59#ibcon#about to write, iclass 11, count 0 2006.229.07:35:58.59#ibcon#wrote, iclass 11, count 0 2006.229.07:35:58.59#ibcon#about to read 3, iclass 11, count 0 2006.229.07:35:58.62#ibcon#read 3, iclass 11, count 0 2006.229.07:35:58.62#ibcon#about to read 4, iclass 11, count 0 2006.229.07:35:58.62#ibcon#read 4, iclass 11, count 0 2006.229.07:35:58.62#ibcon#about to read 5, iclass 11, count 0 2006.229.07:35:58.62#ibcon#read 5, iclass 11, count 0 2006.229.07:35:58.62#ibcon#about to read 6, iclass 11, count 0 2006.229.07:35:58.62#ibcon#read 6, iclass 11, count 0 2006.229.07:35:58.62#ibcon#end of sib2, iclass 11, count 0 2006.229.07:35:58.62#ibcon#*after write, iclass 11, count 0 2006.229.07:35:58.62#ibcon#*before return 0, iclass 11, count 0 2006.229.07:35:58.62#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:35:58.62#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:35:58.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.07:35:58.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.07:35:58.62$vck44/valo=8,884.99 2006.229.07:35:58.62#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.07:35:58.62#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.07:35:58.62#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:58.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:35:58.62#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:35:58.62#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:35:58.62#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:35:58.62#ibcon#first serial, iclass 13, count 0 2006.229.07:35:58.62#ibcon#enter sib2, iclass 13, count 0 2006.229.07:35:58.62#ibcon#flushed, iclass 13, count 0 2006.229.07:35:58.62#ibcon#about to write, iclass 13, count 0 2006.229.07:35:58.62#ibcon#wrote, iclass 13, count 0 2006.229.07:35:58.62#ibcon#about to read 3, iclass 13, count 0 2006.229.07:35:58.64#ibcon#read 3, iclass 13, count 0 2006.229.07:35:58.64#ibcon#about to read 4, iclass 13, count 0 2006.229.07:35:58.64#ibcon#read 4, iclass 13, count 0 2006.229.07:35:58.64#ibcon#about to read 5, iclass 13, count 0 2006.229.07:35:58.64#ibcon#read 5, iclass 13, count 0 2006.229.07:35:58.64#ibcon#about to read 6, iclass 13, count 0 2006.229.07:35:58.64#ibcon#read 6, iclass 13, count 0 2006.229.07:35:58.64#ibcon#end of sib2, iclass 13, count 0 2006.229.07:35:58.64#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:35:58.64#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:35:58.64#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:35:58.64#ibcon#*before write, iclass 13, count 0 2006.229.07:35:58.64#ibcon#enter sib2, iclass 13, count 0 2006.229.07:35:58.64#ibcon#flushed, iclass 13, count 0 2006.229.07:35:58.64#ibcon#about to write, iclass 13, count 0 2006.229.07:35:58.64#ibcon#wrote, iclass 13, count 0 2006.229.07:35:58.64#ibcon#about to read 3, iclass 13, count 0 2006.229.07:35:58.68#ibcon#read 3, iclass 13, count 0 2006.229.07:35:58.68#ibcon#about to read 4, iclass 13, count 0 2006.229.07:35:58.68#ibcon#read 4, iclass 13, count 0 2006.229.07:35:58.68#ibcon#about to read 5, iclass 13, count 0 2006.229.07:35:58.68#ibcon#read 5, iclass 13, count 0 2006.229.07:35:58.68#ibcon#about to read 6, iclass 13, count 0 2006.229.07:35:58.68#ibcon#read 6, iclass 13, count 0 2006.229.07:35:58.68#ibcon#end of sib2, iclass 13, count 0 2006.229.07:35:58.68#ibcon#*after write, iclass 13, count 0 2006.229.07:35:58.68#ibcon#*before return 0, iclass 13, count 0 2006.229.07:35:58.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:35:58.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:35:58.68#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:35:58.68#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:35:58.68$vck44/va=8,6 2006.229.07:35:58.68#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.07:35:58.68#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.07:35:58.68#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:58.68#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:35:58.74#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:35:58.74#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:35:58.74#ibcon#enter wrdev, iclass 15, count 2 2006.229.07:35:58.74#ibcon#first serial, iclass 15, count 2 2006.229.07:35:58.74#ibcon#enter sib2, iclass 15, count 2 2006.229.07:35:58.74#ibcon#flushed, iclass 15, count 2 2006.229.07:35:58.74#ibcon#about to write, iclass 15, count 2 2006.229.07:35:58.74#ibcon#wrote, iclass 15, count 2 2006.229.07:35:58.74#ibcon#about to read 3, iclass 15, count 2 2006.229.07:35:58.76#ibcon#read 3, iclass 15, count 2 2006.229.07:35:58.76#ibcon#about to read 4, iclass 15, count 2 2006.229.07:35:58.76#ibcon#read 4, iclass 15, count 2 2006.229.07:35:58.76#ibcon#about to read 5, iclass 15, count 2 2006.229.07:35:58.76#ibcon#read 5, iclass 15, count 2 2006.229.07:35:58.76#ibcon#about to read 6, iclass 15, count 2 2006.229.07:35:58.76#ibcon#read 6, iclass 15, count 2 2006.229.07:35:58.76#ibcon#end of sib2, iclass 15, count 2 2006.229.07:35:58.76#ibcon#*mode == 0, iclass 15, count 2 2006.229.07:35:58.76#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.07:35:58.76#ibcon#[25=AT08-06\r\n] 2006.229.07:35:58.76#ibcon#*before write, iclass 15, count 2 2006.229.07:35:58.76#ibcon#enter sib2, iclass 15, count 2 2006.229.07:35:58.76#ibcon#flushed, iclass 15, count 2 2006.229.07:35:58.76#ibcon#about to write, iclass 15, count 2 2006.229.07:35:58.76#ibcon#wrote, iclass 15, count 2 2006.229.07:35:58.76#ibcon#about to read 3, iclass 15, count 2 2006.229.07:35:58.79#ibcon#read 3, iclass 15, count 2 2006.229.07:35:58.79#ibcon#about to read 4, iclass 15, count 2 2006.229.07:35:58.79#ibcon#read 4, iclass 15, count 2 2006.229.07:35:58.79#ibcon#about to read 5, iclass 15, count 2 2006.229.07:35:58.79#ibcon#read 5, iclass 15, count 2 2006.229.07:35:58.79#ibcon#about to read 6, iclass 15, count 2 2006.229.07:35:58.79#ibcon#read 6, iclass 15, count 2 2006.229.07:35:58.79#ibcon#end of sib2, iclass 15, count 2 2006.229.07:35:58.79#ibcon#*after write, iclass 15, count 2 2006.229.07:35:58.79#ibcon#*before return 0, iclass 15, count 2 2006.229.07:35:58.79#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:35:58.79#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.07:35:58.79#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.07:35:58.79#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:58.79#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:35:58.91#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:35:58.91#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:35:58.91#ibcon#enter wrdev, iclass 15, count 0 2006.229.07:35:58.91#ibcon#first serial, iclass 15, count 0 2006.229.07:35:58.91#ibcon#enter sib2, iclass 15, count 0 2006.229.07:35:58.91#ibcon#flushed, iclass 15, count 0 2006.229.07:35:58.91#ibcon#about to write, iclass 15, count 0 2006.229.07:35:58.91#ibcon#wrote, iclass 15, count 0 2006.229.07:35:58.91#ibcon#about to read 3, iclass 15, count 0 2006.229.07:35:58.93#ibcon#read 3, iclass 15, count 0 2006.229.07:35:58.93#ibcon#about to read 4, iclass 15, count 0 2006.229.07:35:58.93#ibcon#read 4, iclass 15, count 0 2006.229.07:35:58.93#ibcon#about to read 5, iclass 15, count 0 2006.229.07:35:58.93#ibcon#read 5, iclass 15, count 0 2006.229.07:35:58.93#ibcon#about to read 6, iclass 15, count 0 2006.229.07:35:58.93#ibcon#read 6, iclass 15, count 0 2006.229.07:35:58.93#ibcon#end of sib2, iclass 15, count 0 2006.229.07:35:58.93#ibcon#*mode == 0, iclass 15, count 0 2006.229.07:35:58.93#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.07:35:58.93#ibcon#[25=USB\r\n] 2006.229.07:35:58.93#ibcon#*before write, iclass 15, count 0 2006.229.07:35:58.93#ibcon#enter sib2, iclass 15, count 0 2006.229.07:35:58.93#ibcon#flushed, iclass 15, count 0 2006.229.07:35:58.93#ibcon#about to write, iclass 15, count 0 2006.229.07:35:58.93#ibcon#wrote, iclass 15, count 0 2006.229.07:35:58.93#ibcon#about to read 3, iclass 15, count 0 2006.229.07:35:58.96#ibcon#read 3, iclass 15, count 0 2006.229.07:35:58.96#ibcon#about to read 4, iclass 15, count 0 2006.229.07:35:58.96#ibcon#read 4, iclass 15, count 0 2006.229.07:35:58.96#ibcon#about to read 5, iclass 15, count 0 2006.229.07:35:58.96#ibcon#read 5, iclass 15, count 0 2006.229.07:35:58.96#ibcon#about to read 6, iclass 15, count 0 2006.229.07:35:58.96#ibcon#read 6, iclass 15, count 0 2006.229.07:35:58.96#ibcon#end of sib2, iclass 15, count 0 2006.229.07:35:58.96#ibcon#*after write, iclass 15, count 0 2006.229.07:35:58.96#ibcon#*before return 0, iclass 15, count 0 2006.229.07:35:58.96#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:35:58.96#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.07:35:58.96#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.07:35:58.96#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.07:35:58.96$vck44/vblo=1,629.99 2006.229.07:35:58.96#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.07:35:58.96#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.07:35:58.96#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:58.96#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:58.96#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:58.96#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:58.96#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:35:58.96#ibcon#first serial, iclass 17, count 0 2006.229.07:35:58.96#ibcon#enter sib2, iclass 17, count 0 2006.229.07:35:58.96#ibcon#flushed, iclass 17, count 0 2006.229.07:35:58.96#ibcon#about to write, iclass 17, count 0 2006.229.07:35:58.96#ibcon#wrote, iclass 17, count 0 2006.229.07:35:58.96#ibcon#about to read 3, iclass 17, count 0 2006.229.07:35:58.98#ibcon#read 3, iclass 17, count 0 2006.229.07:35:58.98#ibcon#about to read 4, iclass 17, count 0 2006.229.07:35:58.98#ibcon#read 4, iclass 17, count 0 2006.229.07:35:58.98#ibcon#about to read 5, iclass 17, count 0 2006.229.07:35:58.98#ibcon#read 5, iclass 17, count 0 2006.229.07:35:58.98#ibcon#about to read 6, iclass 17, count 0 2006.229.07:35:58.98#ibcon#read 6, iclass 17, count 0 2006.229.07:35:58.98#ibcon#end of sib2, iclass 17, count 0 2006.229.07:35:58.98#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:35:58.98#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:35:58.98#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:35:58.98#ibcon#*before write, iclass 17, count 0 2006.229.07:35:58.98#ibcon#enter sib2, iclass 17, count 0 2006.229.07:35:58.98#ibcon#flushed, iclass 17, count 0 2006.229.07:35:58.98#ibcon#about to write, iclass 17, count 0 2006.229.07:35:58.98#ibcon#wrote, iclass 17, count 0 2006.229.07:35:58.98#ibcon#about to read 3, iclass 17, count 0 2006.229.07:35:59.02#ibcon#read 3, iclass 17, count 0 2006.229.07:35:59.02#ibcon#about to read 4, iclass 17, count 0 2006.229.07:35:59.02#ibcon#read 4, iclass 17, count 0 2006.229.07:35:59.02#ibcon#about to read 5, iclass 17, count 0 2006.229.07:35:59.02#ibcon#read 5, iclass 17, count 0 2006.229.07:35:59.02#ibcon#about to read 6, iclass 17, count 0 2006.229.07:35:59.02#ibcon#read 6, iclass 17, count 0 2006.229.07:35:59.02#ibcon#end of sib2, iclass 17, count 0 2006.229.07:35:59.02#ibcon#*after write, iclass 17, count 0 2006.229.07:35:59.02#ibcon#*before return 0, iclass 17, count 0 2006.229.07:35:59.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:59.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.07:35:59.02#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:35:59.02#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:35:59.02$vck44/vb=1,4 2006.229.07:35:59.02#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.07:35:59.02#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.07:35:59.02#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:59.02#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:59.02#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:59.02#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:59.02#ibcon#enter wrdev, iclass 19, count 2 2006.229.07:35:59.02#ibcon#first serial, iclass 19, count 2 2006.229.07:35:59.02#ibcon#enter sib2, iclass 19, count 2 2006.229.07:35:59.02#ibcon#flushed, iclass 19, count 2 2006.229.07:35:59.02#ibcon#about to write, iclass 19, count 2 2006.229.07:35:59.02#ibcon#wrote, iclass 19, count 2 2006.229.07:35:59.02#ibcon#about to read 3, iclass 19, count 2 2006.229.07:35:59.04#ibcon#read 3, iclass 19, count 2 2006.229.07:35:59.04#ibcon#about to read 4, iclass 19, count 2 2006.229.07:35:59.04#ibcon#read 4, iclass 19, count 2 2006.229.07:35:59.04#ibcon#about to read 5, iclass 19, count 2 2006.229.07:35:59.04#ibcon#read 5, iclass 19, count 2 2006.229.07:35:59.04#ibcon#about to read 6, iclass 19, count 2 2006.229.07:35:59.04#ibcon#read 6, iclass 19, count 2 2006.229.07:35:59.04#ibcon#end of sib2, iclass 19, count 2 2006.229.07:35:59.04#ibcon#*mode == 0, iclass 19, count 2 2006.229.07:35:59.04#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.07:35:59.04#ibcon#[27=AT01-04\r\n] 2006.229.07:35:59.04#ibcon#*before write, iclass 19, count 2 2006.229.07:35:59.04#ibcon#enter sib2, iclass 19, count 2 2006.229.07:35:59.04#ibcon#flushed, iclass 19, count 2 2006.229.07:35:59.04#ibcon#about to write, iclass 19, count 2 2006.229.07:35:59.04#ibcon#wrote, iclass 19, count 2 2006.229.07:35:59.04#ibcon#about to read 3, iclass 19, count 2 2006.229.07:35:59.07#ibcon#read 3, iclass 19, count 2 2006.229.07:35:59.07#ibcon#about to read 4, iclass 19, count 2 2006.229.07:35:59.07#ibcon#read 4, iclass 19, count 2 2006.229.07:35:59.07#ibcon#about to read 5, iclass 19, count 2 2006.229.07:35:59.07#ibcon#read 5, iclass 19, count 2 2006.229.07:35:59.07#ibcon#about to read 6, iclass 19, count 2 2006.229.07:35:59.07#ibcon#read 6, iclass 19, count 2 2006.229.07:35:59.07#ibcon#end of sib2, iclass 19, count 2 2006.229.07:35:59.07#ibcon#*after write, iclass 19, count 2 2006.229.07:35:59.07#ibcon#*before return 0, iclass 19, count 2 2006.229.07:35:59.07#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:59.07#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.07:35:59.07#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.07:35:59.07#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:59.07#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:59.19#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:59.19#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:59.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.07:35:59.19#ibcon#first serial, iclass 19, count 0 2006.229.07:35:59.19#ibcon#enter sib2, iclass 19, count 0 2006.229.07:35:59.19#ibcon#flushed, iclass 19, count 0 2006.229.07:35:59.19#ibcon#about to write, iclass 19, count 0 2006.229.07:35:59.19#ibcon#wrote, iclass 19, count 0 2006.229.07:35:59.19#ibcon#about to read 3, iclass 19, count 0 2006.229.07:35:59.21#ibcon#read 3, iclass 19, count 0 2006.229.07:35:59.21#ibcon#about to read 4, iclass 19, count 0 2006.229.07:35:59.21#ibcon#read 4, iclass 19, count 0 2006.229.07:35:59.21#ibcon#about to read 5, iclass 19, count 0 2006.229.07:35:59.21#ibcon#read 5, iclass 19, count 0 2006.229.07:35:59.21#ibcon#about to read 6, iclass 19, count 0 2006.229.07:35:59.21#ibcon#read 6, iclass 19, count 0 2006.229.07:35:59.21#ibcon#end of sib2, iclass 19, count 0 2006.229.07:35:59.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.07:35:59.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.07:35:59.21#ibcon#[27=USB\r\n] 2006.229.07:35:59.21#ibcon#*before write, iclass 19, count 0 2006.229.07:35:59.21#ibcon#enter sib2, iclass 19, count 0 2006.229.07:35:59.21#ibcon#flushed, iclass 19, count 0 2006.229.07:35:59.21#ibcon#about to write, iclass 19, count 0 2006.229.07:35:59.21#ibcon#wrote, iclass 19, count 0 2006.229.07:35:59.21#ibcon#about to read 3, iclass 19, count 0 2006.229.07:35:59.24#ibcon#read 3, iclass 19, count 0 2006.229.07:35:59.24#ibcon#about to read 4, iclass 19, count 0 2006.229.07:35:59.24#ibcon#read 4, iclass 19, count 0 2006.229.07:35:59.24#ibcon#about to read 5, iclass 19, count 0 2006.229.07:35:59.24#ibcon#read 5, iclass 19, count 0 2006.229.07:35:59.24#ibcon#about to read 6, iclass 19, count 0 2006.229.07:35:59.24#ibcon#read 6, iclass 19, count 0 2006.229.07:35:59.24#ibcon#end of sib2, iclass 19, count 0 2006.229.07:35:59.24#ibcon#*after write, iclass 19, count 0 2006.229.07:35:59.24#ibcon#*before return 0, iclass 19, count 0 2006.229.07:35:59.24#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:59.24#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.07:35:59.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.07:35:59.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.07:35:59.24$vck44/vblo=2,634.99 2006.229.07:35:59.24#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.07:35:59.24#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.07:35:59.24#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:59.24#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:59.24#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:59.24#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:59.24#ibcon#enter wrdev, iclass 21, count 0 2006.229.07:35:59.24#ibcon#first serial, iclass 21, count 0 2006.229.07:35:59.24#ibcon#enter sib2, iclass 21, count 0 2006.229.07:35:59.24#ibcon#flushed, iclass 21, count 0 2006.229.07:35:59.24#ibcon#about to write, iclass 21, count 0 2006.229.07:35:59.24#ibcon#wrote, iclass 21, count 0 2006.229.07:35:59.24#ibcon#about to read 3, iclass 21, count 0 2006.229.07:35:59.26#ibcon#read 3, iclass 21, count 0 2006.229.07:35:59.26#ibcon#about to read 4, iclass 21, count 0 2006.229.07:35:59.26#ibcon#read 4, iclass 21, count 0 2006.229.07:35:59.26#ibcon#about to read 5, iclass 21, count 0 2006.229.07:35:59.26#ibcon#read 5, iclass 21, count 0 2006.229.07:35:59.26#ibcon#about to read 6, iclass 21, count 0 2006.229.07:35:59.26#ibcon#read 6, iclass 21, count 0 2006.229.07:35:59.26#ibcon#end of sib2, iclass 21, count 0 2006.229.07:35:59.26#ibcon#*mode == 0, iclass 21, count 0 2006.229.07:35:59.26#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.07:35:59.26#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:35:59.26#ibcon#*before write, iclass 21, count 0 2006.229.07:35:59.26#ibcon#enter sib2, iclass 21, count 0 2006.229.07:35:59.26#ibcon#flushed, iclass 21, count 0 2006.229.07:35:59.26#ibcon#about to write, iclass 21, count 0 2006.229.07:35:59.26#ibcon#wrote, iclass 21, count 0 2006.229.07:35:59.26#ibcon#about to read 3, iclass 21, count 0 2006.229.07:35:59.30#ibcon#read 3, iclass 21, count 0 2006.229.07:35:59.30#ibcon#about to read 4, iclass 21, count 0 2006.229.07:35:59.30#ibcon#read 4, iclass 21, count 0 2006.229.07:35:59.30#ibcon#about to read 5, iclass 21, count 0 2006.229.07:35:59.30#ibcon#read 5, iclass 21, count 0 2006.229.07:35:59.30#ibcon#about to read 6, iclass 21, count 0 2006.229.07:35:59.30#ibcon#read 6, iclass 21, count 0 2006.229.07:35:59.30#ibcon#end of sib2, iclass 21, count 0 2006.229.07:35:59.30#ibcon#*after write, iclass 21, count 0 2006.229.07:35:59.30#ibcon#*before return 0, iclass 21, count 0 2006.229.07:35:59.30#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:59.30#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.07:35:59.30#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.07:35:59.30#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.07:35:59.30$vck44/vb=2,4 2006.229.07:35:59.30#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.07:35:59.30#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.07:35:59.30#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:59.30#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:59.36#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:59.36#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:59.36#ibcon#enter wrdev, iclass 23, count 2 2006.229.07:35:59.36#ibcon#first serial, iclass 23, count 2 2006.229.07:35:59.36#ibcon#enter sib2, iclass 23, count 2 2006.229.07:35:59.36#ibcon#flushed, iclass 23, count 2 2006.229.07:35:59.36#ibcon#about to write, iclass 23, count 2 2006.229.07:35:59.36#ibcon#wrote, iclass 23, count 2 2006.229.07:35:59.36#ibcon#about to read 3, iclass 23, count 2 2006.229.07:35:59.38#ibcon#read 3, iclass 23, count 2 2006.229.07:35:59.38#ibcon#about to read 4, iclass 23, count 2 2006.229.07:35:59.38#ibcon#read 4, iclass 23, count 2 2006.229.07:35:59.38#ibcon#about to read 5, iclass 23, count 2 2006.229.07:35:59.38#ibcon#read 5, iclass 23, count 2 2006.229.07:35:59.38#ibcon#about to read 6, iclass 23, count 2 2006.229.07:35:59.38#ibcon#read 6, iclass 23, count 2 2006.229.07:35:59.38#ibcon#end of sib2, iclass 23, count 2 2006.229.07:35:59.38#ibcon#*mode == 0, iclass 23, count 2 2006.229.07:35:59.38#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.07:35:59.38#ibcon#[27=AT02-04\r\n] 2006.229.07:35:59.38#ibcon#*before write, iclass 23, count 2 2006.229.07:35:59.38#ibcon#enter sib2, iclass 23, count 2 2006.229.07:35:59.38#ibcon#flushed, iclass 23, count 2 2006.229.07:35:59.38#ibcon#about to write, iclass 23, count 2 2006.229.07:35:59.38#ibcon#wrote, iclass 23, count 2 2006.229.07:35:59.38#ibcon#about to read 3, iclass 23, count 2 2006.229.07:35:59.41#ibcon#read 3, iclass 23, count 2 2006.229.07:35:59.41#ibcon#about to read 4, iclass 23, count 2 2006.229.07:35:59.41#ibcon#read 4, iclass 23, count 2 2006.229.07:35:59.41#ibcon#about to read 5, iclass 23, count 2 2006.229.07:35:59.41#ibcon#read 5, iclass 23, count 2 2006.229.07:35:59.41#ibcon#about to read 6, iclass 23, count 2 2006.229.07:35:59.41#ibcon#read 6, iclass 23, count 2 2006.229.07:35:59.41#ibcon#end of sib2, iclass 23, count 2 2006.229.07:35:59.41#ibcon#*after write, iclass 23, count 2 2006.229.07:35:59.41#ibcon#*before return 0, iclass 23, count 2 2006.229.07:35:59.41#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:59.41#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.07:35:59.41#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.07:35:59.41#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:59.41#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:59.53#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:59.53#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:59.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.07:35:59.53#ibcon#first serial, iclass 23, count 0 2006.229.07:35:59.53#ibcon#enter sib2, iclass 23, count 0 2006.229.07:35:59.53#ibcon#flushed, iclass 23, count 0 2006.229.07:35:59.53#ibcon#about to write, iclass 23, count 0 2006.229.07:35:59.53#ibcon#wrote, iclass 23, count 0 2006.229.07:35:59.53#ibcon#about to read 3, iclass 23, count 0 2006.229.07:35:59.55#ibcon#read 3, iclass 23, count 0 2006.229.07:35:59.55#ibcon#about to read 4, iclass 23, count 0 2006.229.07:35:59.55#ibcon#read 4, iclass 23, count 0 2006.229.07:35:59.55#ibcon#about to read 5, iclass 23, count 0 2006.229.07:35:59.55#ibcon#read 5, iclass 23, count 0 2006.229.07:35:59.55#ibcon#about to read 6, iclass 23, count 0 2006.229.07:35:59.55#ibcon#read 6, iclass 23, count 0 2006.229.07:35:59.55#ibcon#end of sib2, iclass 23, count 0 2006.229.07:35:59.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.07:35:59.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.07:35:59.55#ibcon#[27=USB\r\n] 2006.229.07:35:59.55#ibcon#*before write, iclass 23, count 0 2006.229.07:35:59.55#ibcon#enter sib2, iclass 23, count 0 2006.229.07:35:59.55#ibcon#flushed, iclass 23, count 0 2006.229.07:35:59.55#ibcon#about to write, iclass 23, count 0 2006.229.07:35:59.55#ibcon#wrote, iclass 23, count 0 2006.229.07:35:59.55#ibcon#about to read 3, iclass 23, count 0 2006.229.07:35:59.58#ibcon#read 3, iclass 23, count 0 2006.229.07:35:59.58#ibcon#about to read 4, iclass 23, count 0 2006.229.07:35:59.58#ibcon#read 4, iclass 23, count 0 2006.229.07:35:59.58#ibcon#about to read 5, iclass 23, count 0 2006.229.07:35:59.58#ibcon#read 5, iclass 23, count 0 2006.229.07:35:59.58#ibcon#about to read 6, iclass 23, count 0 2006.229.07:35:59.58#ibcon#read 6, iclass 23, count 0 2006.229.07:35:59.58#ibcon#end of sib2, iclass 23, count 0 2006.229.07:35:59.58#ibcon#*after write, iclass 23, count 0 2006.229.07:35:59.58#ibcon#*before return 0, iclass 23, count 0 2006.229.07:35:59.58#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:59.58#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.07:35:59.58#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.07:35:59.58#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.07:35:59.58$vck44/vblo=3,649.99 2006.229.07:35:59.58#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.07:35:59.58#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.07:35:59.58#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:59.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:35:59.58#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:35:59.58#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:35:59.58#ibcon#enter wrdev, iclass 25, count 0 2006.229.07:35:59.58#ibcon#first serial, iclass 25, count 0 2006.229.07:35:59.58#ibcon#enter sib2, iclass 25, count 0 2006.229.07:35:59.58#ibcon#flushed, iclass 25, count 0 2006.229.07:35:59.58#ibcon#about to write, iclass 25, count 0 2006.229.07:35:59.58#ibcon#wrote, iclass 25, count 0 2006.229.07:35:59.58#ibcon#about to read 3, iclass 25, count 0 2006.229.07:35:59.60#ibcon#read 3, iclass 25, count 0 2006.229.07:35:59.60#ibcon#about to read 4, iclass 25, count 0 2006.229.07:35:59.60#ibcon#read 4, iclass 25, count 0 2006.229.07:35:59.60#ibcon#about to read 5, iclass 25, count 0 2006.229.07:35:59.60#ibcon#read 5, iclass 25, count 0 2006.229.07:35:59.60#ibcon#about to read 6, iclass 25, count 0 2006.229.07:35:59.60#ibcon#read 6, iclass 25, count 0 2006.229.07:35:59.60#ibcon#end of sib2, iclass 25, count 0 2006.229.07:35:59.60#ibcon#*mode == 0, iclass 25, count 0 2006.229.07:35:59.60#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.07:35:59.60#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:35:59.60#ibcon#*before write, iclass 25, count 0 2006.229.07:35:59.60#ibcon#enter sib2, iclass 25, count 0 2006.229.07:35:59.60#ibcon#flushed, iclass 25, count 0 2006.229.07:35:59.60#ibcon#about to write, iclass 25, count 0 2006.229.07:35:59.60#ibcon#wrote, iclass 25, count 0 2006.229.07:35:59.60#ibcon#about to read 3, iclass 25, count 0 2006.229.07:35:59.64#ibcon#read 3, iclass 25, count 0 2006.229.07:35:59.64#ibcon#about to read 4, iclass 25, count 0 2006.229.07:35:59.64#ibcon#read 4, iclass 25, count 0 2006.229.07:35:59.64#ibcon#about to read 5, iclass 25, count 0 2006.229.07:35:59.64#ibcon#read 5, iclass 25, count 0 2006.229.07:35:59.64#ibcon#about to read 6, iclass 25, count 0 2006.229.07:35:59.64#ibcon#read 6, iclass 25, count 0 2006.229.07:35:59.64#ibcon#end of sib2, iclass 25, count 0 2006.229.07:35:59.64#ibcon#*after write, iclass 25, count 0 2006.229.07:35:59.64#ibcon#*before return 0, iclass 25, count 0 2006.229.07:35:59.64#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:35:59.64#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.07:35:59.64#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.07:35:59.64#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.07:35:59.64$vck44/vb=3,4 2006.229.07:35:59.64#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.07:35:59.64#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.07:35:59.64#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:59.64#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:35:59.70#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:35:59.70#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:35:59.70#ibcon#enter wrdev, iclass 27, count 2 2006.229.07:35:59.70#ibcon#first serial, iclass 27, count 2 2006.229.07:35:59.70#ibcon#enter sib2, iclass 27, count 2 2006.229.07:35:59.70#ibcon#flushed, iclass 27, count 2 2006.229.07:35:59.70#ibcon#about to write, iclass 27, count 2 2006.229.07:35:59.70#ibcon#wrote, iclass 27, count 2 2006.229.07:35:59.70#ibcon#about to read 3, iclass 27, count 2 2006.229.07:35:59.72#ibcon#read 3, iclass 27, count 2 2006.229.07:35:59.72#ibcon#about to read 4, iclass 27, count 2 2006.229.07:35:59.72#ibcon#read 4, iclass 27, count 2 2006.229.07:35:59.72#ibcon#about to read 5, iclass 27, count 2 2006.229.07:35:59.72#ibcon#read 5, iclass 27, count 2 2006.229.07:35:59.72#ibcon#about to read 6, iclass 27, count 2 2006.229.07:35:59.72#ibcon#read 6, iclass 27, count 2 2006.229.07:35:59.72#ibcon#end of sib2, iclass 27, count 2 2006.229.07:35:59.72#ibcon#*mode == 0, iclass 27, count 2 2006.229.07:35:59.72#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.07:35:59.72#ibcon#[27=AT03-04\r\n] 2006.229.07:35:59.72#ibcon#*before write, iclass 27, count 2 2006.229.07:35:59.72#ibcon#enter sib2, iclass 27, count 2 2006.229.07:35:59.72#ibcon#flushed, iclass 27, count 2 2006.229.07:35:59.72#ibcon#about to write, iclass 27, count 2 2006.229.07:35:59.72#ibcon#wrote, iclass 27, count 2 2006.229.07:35:59.72#ibcon#about to read 3, iclass 27, count 2 2006.229.07:35:59.75#ibcon#read 3, iclass 27, count 2 2006.229.07:35:59.75#ibcon#about to read 4, iclass 27, count 2 2006.229.07:35:59.75#ibcon#read 4, iclass 27, count 2 2006.229.07:35:59.75#ibcon#about to read 5, iclass 27, count 2 2006.229.07:35:59.75#ibcon#read 5, iclass 27, count 2 2006.229.07:35:59.75#ibcon#about to read 6, iclass 27, count 2 2006.229.07:35:59.75#ibcon#read 6, iclass 27, count 2 2006.229.07:35:59.75#ibcon#end of sib2, iclass 27, count 2 2006.229.07:35:59.75#ibcon#*after write, iclass 27, count 2 2006.229.07:35:59.75#ibcon#*before return 0, iclass 27, count 2 2006.229.07:35:59.75#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:35:59.75#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.07:35:59.75#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.07:35:59.75#ibcon#ireg 7 cls_cnt 0 2006.229.07:35:59.75#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:35:59.87#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:35:59.87#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:35:59.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.07:35:59.87#ibcon#first serial, iclass 27, count 0 2006.229.07:35:59.87#ibcon#enter sib2, iclass 27, count 0 2006.229.07:35:59.87#ibcon#flushed, iclass 27, count 0 2006.229.07:35:59.87#ibcon#about to write, iclass 27, count 0 2006.229.07:35:59.87#ibcon#wrote, iclass 27, count 0 2006.229.07:35:59.87#ibcon#about to read 3, iclass 27, count 0 2006.229.07:35:59.89#ibcon#read 3, iclass 27, count 0 2006.229.07:35:59.89#ibcon#about to read 4, iclass 27, count 0 2006.229.07:35:59.89#ibcon#read 4, iclass 27, count 0 2006.229.07:35:59.89#ibcon#about to read 5, iclass 27, count 0 2006.229.07:35:59.89#ibcon#read 5, iclass 27, count 0 2006.229.07:35:59.89#ibcon#about to read 6, iclass 27, count 0 2006.229.07:35:59.89#ibcon#read 6, iclass 27, count 0 2006.229.07:35:59.89#ibcon#end of sib2, iclass 27, count 0 2006.229.07:35:59.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.07:35:59.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.07:35:59.89#ibcon#[27=USB\r\n] 2006.229.07:35:59.89#ibcon#*before write, iclass 27, count 0 2006.229.07:35:59.89#ibcon#enter sib2, iclass 27, count 0 2006.229.07:35:59.89#ibcon#flushed, iclass 27, count 0 2006.229.07:35:59.89#ibcon#about to write, iclass 27, count 0 2006.229.07:35:59.89#ibcon#wrote, iclass 27, count 0 2006.229.07:35:59.89#ibcon#about to read 3, iclass 27, count 0 2006.229.07:35:59.92#ibcon#read 3, iclass 27, count 0 2006.229.07:35:59.92#ibcon#about to read 4, iclass 27, count 0 2006.229.07:35:59.92#ibcon#read 4, iclass 27, count 0 2006.229.07:35:59.92#ibcon#about to read 5, iclass 27, count 0 2006.229.07:35:59.92#ibcon#read 5, iclass 27, count 0 2006.229.07:35:59.92#ibcon#about to read 6, iclass 27, count 0 2006.229.07:35:59.92#ibcon#read 6, iclass 27, count 0 2006.229.07:35:59.92#ibcon#end of sib2, iclass 27, count 0 2006.229.07:35:59.92#ibcon#*after write, iclass 27, count 0 2006.229.07:35:59.92#ibcon#*before return 0, iclass 27, count 0 2006.229.07:35:59.92#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:35:59.92#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.07:35:59.92#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.07:35:59.92#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.07:35:59.92$vck44/vblo=4,679.99 2006.229.07:35:59.92#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.07:35:59.92#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.07:35:59.92#ibcon#ireg 17 cls_cnt 0 2006.229.07:35:59.92#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:59.92#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:59.92#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:59.92#ibcon#enter wrdev, iclass 29, count 0 2006.229.07:35:59.92#ibcon#first serial, iclass 29, count 0 2006.229.07:35:59.92#ibcon#enter sib2, iclass 29, count 0 2006.229.07:35:59.92#ibcon#flushed, iclass 29, count 0 2006.229.07:35:59.92#ibcon#about to write, iclass 29, count 0 2006.229.07:35:59.92#ibcon#wrote, iclass 29, count 0 2006.229.07:35:59.92#ibcon#about to read 3, iclass 29, count 0 2006.229.07:35:59.94#ibcon#read 3, iclass 29, count 0 2006.229.07:35:59.94#ibcon#about to read 4, iclass 29, count 0 2006.229.07:35:59.94#ibcon#read 4, iclass 29, count 0 2006.229.07:35:59.94#ibcon#about to read 5, iclass 29, count 0 2006.229.07:35:59.94#ibcon#read 5, iclass 29, count 0 2006.229.07:35:59.94#ibcon#about to read 6, iclass 29, count 0 2006.229.07:35:59.94#ibcon#read 6, iclass 29, count 0 2006.229.07:35:59.94#ibcon#end of sib2, iclass 29, count 0 2006.229.07:35:59.94#ibcon#*mode == 0, iclass 29, count 0 2006.229.07:35:59.94#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.07:35:59.94#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:35:59.94#ibcon#*before write, iclass 29, count 0 2006.229.07:35:59.94#ibcon#enter sib2, iclass 29, count 0 2006.229.07:35:59.94#ibcon#flushed, iclass 29, count 0 2006.229.07:35:59.94#ibcon#about to write, iclass 29, count 0 2006.229.07:35:59.94#ibcon#wrote, iclass 29, count 0 2006.229.07:35:59.94#ibcon#about to read 3, iclass 29, count 0 2006.229.07:35:59.98#ibcon#read 3, iclass 29, count 0 2006.229.07:35:59.98#ibcon#about to read 4, iclass 29, count 0 2006.229.07:35:59.98#ibcon#read 4, iclass 29, count 0 2006.229.07:35:59.98#ibcon#about to read 5, iclass 29, count 0 2006.229.07:35:59.98#ibcon#read 5, iclass 29, count 0 2006.229.07:35:59.98#ibcon#about to read 6, iclass 29, count 0 2006.229.07:35:59.98#ibcon#read 6, iclass 29, count 0 2006.229.07:35:59.98#ibcon#end of sib2, iclass 29, count 0 2006.229.07:35:59.98#ibcon#*after write, iclass 29, count 0 2006.229.07:35:59.98#ibcon#*before return 0, iclass 29, count 0 2006.229.07:35:59.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:59.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.07:35:59.98#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.07:35:59.98#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.07:35:59.98$vck44/vb=4,4 2006.229.07:35:59.98#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.07:35:59.98#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.07:35:59.98#ibcon#ireg 11 cls_cnt 2 2006.229.07:35:59.98#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:36:00.04#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:36:00.04#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:36:00.04#ibcon#enter wrdev, iclass 31, count 2 2006.229.07:36:00.04#ibcon#first serial, iclass 31, count 2 2006.229.07:36:00.04#ibcon#enter sib2, iclass 31, count 2 2006.229.07:36:00.04#ibcon#flushed, iclass 31, count 2 2006.229.07:36:00.04#ibcon#about to write, iclass 31, count 2 2006.229.07:36:00.04#ibcon#wrote, iclass 31, count 2 2006.229.07:36:00.04#ibcon#about to read 3, iclass 31, count 2 2006.229.07:36:00.06#ibcon#read 3, iclass 31, count 2 2006.229.07:36:00.06#ibcon#about to read 4, iclass 31, count 2 2006.229.07:36:00.06#ibcon#read 4, iclass 31, count 2 2006.229.07:36:00.06#ibcon#about to read 5, iclass 31, count 2 2006.229.07:36:00.06#ibcon#read 5, iclass 31, count 2 2006.229.07:36:00.06#ibcon#about to read 6, iclass 31, count 2 2006.229.07:36:00.06#ibcon#read 6, iclass 31, count 2 2006.229.07:36:00.06#ibcon#end of sib2, iclass 31, count 2 2006.229.07:36:00.06#ibcon#*mode == 0, iclass 31, count 2 2006.229.07:36:00.06#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.07:36:00.06#ibcon#[27=AT04-04\r\n] 2006.229.07:36:00.06#ibcon#*before write, iclass 31, count 2 2006.229.07:36:00.06#ibcon#enter sib2, iclass 31, count 2 2006.229.07:36:00.06#ibcon#flushed, iclass 31, count 2 2006.229.07:36:00.06#ibcon#about to write, iclass 31, count 2 2006.229.07:36:00.06#ibcon#wrote, iclass 31, count 2 2006.229.07:36:00.06#ibcon#about to read 3, iclass 31, count 2 2006.229.07:36:00.09#ibcon#read 3, iclass 31, count 2 2006.229.07:36:00.09#ibcon#about to read 4, iclass 31, count 2 2006.229.07:36:00.09#ibcon#read 4, iclass 31, count 2 2006.229.07:36:00.09#ibcon#about to read 5, iclass 31, count 2 2006.229.07:36:00.09#ibcon#read 5, iclass 31, count 2 2006.229.07:36:00.09#ibcon#about to read 6, iclass 31, count 2 2006.229.07:36:00.09#ibcon#read 6, iclass 31, count 2 2006.229.07:36:00.09#ibcon#end of sib2, iclass 31, count 2 2006.229.07:36:00.09#ibcon#*after write, iclass 31, count 2 2006.229.07:36:00.09#ibcon#*before return 0, iclass 31, count 2 2006.229.07:36:00.09#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:36:00.09#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.07:36:00.09#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.07:36:00.09#ibcon#ireg 7 cls_cnt 0 2006.229.07:36:00.09#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:36:00.21#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:36:00.21#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:36:00.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.07:36:00.21#ibcon#first serial, iclass 31, count 0 2006.229.07:36:00.21#ibcon#enter sib2, iclass 31, count 0 2006.229.07:36:00.21#ibcon#flushed, iclass 31, count 0 2006.229.07:36:00.21#ibcon#about to write, iclass 31, count 0 2006.229.07:36:00.21#ibcon#wrote, iclass 31, count 0 2006.229.07:36:00.21#ibcon#about to read 3, iclass 31, count 0 2006.229.07:36:00.23#ibcon#read 3, iclass 31, count 0 2006.229.07:36:00.23#ibcon#about to read 4, iclass 31, count 0 2006.229.07:36:00.23#ibcon#read 4, iclass 31, count 0 2006.229.07:36:00.23#ibcon#about to read 5, iclass 31, count 0 2006.229.07:36:00.23#ibcon#read 5, iclass 31, count 0 2006.229.07:36:00.23#ibcon#about to read 6, iclass 31, count 0 2006.229.07:36:00.23#ibcon#read 6, iclass 31, count 0 2006.229.07:36:00.23#ibcon#end of sib2, iclass 31, count 0 2006.229.07:36:00.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.07:36:00.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.07:36:00.23#ibcon#[27=USB\r\n] 2006.229.07:36:00.23#ibcon#*before write, iclass 31, count 0 2006.229.07:36:00.23#ibcon#enter sib2, iclass 31, count 0 2006.229.07:36:00.23#ibcon#flushed, iclass 31, count 0 2006.229.07:36:00.23#ibcon#about to write, iclass 31, count 0 2006.229.07:36:00.23#ibcon#wrote, iclass 31, count 0 2006.229.07:36:00.23#ibcon#about to read 3, iclass 31, count 0 2006.229.07:36:00.26#ibcon#read 3, iclass 31, count 0 2006.229.07:36:00.26#ibcon#about to read 4, iclass 31, count 0 2006.229.07:36:00.26#ibcon#read 4, iclass 31, count 0 2006.229.07:36:00.26#ibcon#about to read 5, iclass 31, count 0 2006.229.07:36:00.26#ibcon#read 5, iclass 31, count 0 2006.229.07:36:00.26#ibcon#about to read 6, iclass 31, count 0 2006.229.07:36:00.26#ibcon#read 6, iclass 31, count 0 2006.229.07:36:00.26#ibcon#end of sib2, iclass 31, count 0 2006.229.07:36:00.26#ibcon#*after write, iclass 31, count 0 2006.229.07:36:00.26#ibcon#*before return 0, iclass 31, count 0 2006.229.07:36:00.26#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:36:00.26#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.07:36:00.26#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.07:36:00.26#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.07:36:00.26$vck44/vblo=5,709.99 2006.229.07:36:00.26#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.07:36:00.26#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.07:36:00.26#ibcon#ireg 17 cls_cnt 0 2006.229.07:36:00.26#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:36:00.26#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:36:00.26#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:36:00.26#ibcon#enter wrdev, iclass 33, count 0 2006.229.07:36:00.26#ibcon#first serial, iclass 33, count 0 2006.229.07:36:00.26#ibcon#enter sib2, iclass 33, count 0 2006.229.07:36:00.26#ibcon#flushed, iclass 33, count 0 2006.229.07:36:00.26#ibcon#about to write, iclass 33, count 0 2006.229.07:36:00.26#ibcon#wrote, iclass 33, count 0 2006.229.07:36:00.26#ibcon#about to read 3, iclass 33, count 0 2006.229.07:36:00.28#ibcon#read 3, iclass 33, count 0 2006.229.07:36:00.28#ibcon#about to read 4, iclass 33, count 0 2006.229.07:36:00.28#ibcon#read 4, iclass 33, count 0 2006.229.07:36:00.28#ibcon#about to read 5, iclass 33, count 0 2006.229.07:36:00.28#ibcon#read 5, iclass 33, count 0 2006.229.07:36:00.28#ibcon#about to read 6, iclass 33, count 0 2006.229.07:36:00.28#ibcon#read 6, iclass 33, count 0 2006.229.07:36:00.28#ibcon#end of sib2, iclass 33, count 0 2006.229.07:36:00.28#ibcon#*mode == 0, iclass 33, count 0 2006.229.07:36:00.28#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.07:36:00.28#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:36:00.28#ibcon#*before write, iclass 33, count 0 2006.229.07:36:00.28#ibcon#enter sib2, iclass 33, count 0 2006.229.07:36:00.28#ibcon#flushed, iclass 33, count 0 2006.229.07:36:00.28#ibcon#about to write, iclass 33, count 0 2006.229.07:36:00.28#ibcon#wrote, iclass 33, count 0 2006.229.07:36:00.28#ibcon#about to read 3, iclass 33, count 0 2006.229.07:36:00.32#ibcon#read 3, iclass 33, count 0 2006.229.07:36:00.32#ibcon#about to read 4, iclass 33, count 0 2006.229.07:36:00.32#ibcon#read 4, iclass 33, count 0 2006.229.07:36:00.32#ibcon#about to read 5, iclass 33, count 0 2006.229.07:36:00.32#ibcon#read 5, iclass 33, count 0 2006.229.07:36:00.32#ibcon#about to read 6, iclass 33, count 0 2006.229.07:36:00.32#ibcon#read 6, iclass 33, count 0 2006.229.07:36:00.32#ibcon#end of sib2, iclass 33, count 0 2006.229.07:36:00.32#ibcon#*after write, iclass 33, count 0 2006.229.07:36:00.32#ibcon#*before return 0, iclass 33, count 0 2006.229.07:36:00.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:36:00.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.07:36:00.32#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.07:36:00.32#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.07:36:00.32$vck44/vb=5,4 2006.229.07:36:00.32#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.07:36:00.32#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.07:36:00.32#ibcon#ireg 11 cls_cnt 2 2006.229.07:36:00.32#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:36:00.38#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:36:00.38#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:36:00.38#ibcon#enter wrdev, iclass 35, count 2 2006.229.07:36:00.38#ibcon#first serial, iclass 35, count 2 2006.229.07:36:00.38#ibcon#enter sib2, iclass 35, count 2 2006.229.07:36:00.38#ibcon#flushed, iclass 35, count 2 2006.229.07:36:00.38#ibcon#about to write, iclass 35, count 2 2006.229.07:36:00.38#ibcon#wrote, iclass 35, count 2 2006.229.07:36:00.38#ibcon#about to read 3, iclass 35, count 2 2006.229.07:36:00.40#ibcon#read 3, iclass 35, count 2 2006.229.07:36:00.40#ibcon#about to read 4, iclass 35, count 2 2006.229.07:36:00.40#ibcon#read 4, iclass 35, count 2 2006.229.07:36:00.40#ibcon#about to read 5, iclass 35, count 2 2006.229.07:36:00.40#ibcon#read 5, iclass 35, count 2 2006.229.07:36:00.40#ibcon#about to read 6, iclass 35, count 2 2006.229.07:36:00.40#ibcon#read 6, iclass 35, count 2 2006.229.07:36:00.40#ibcon#end of sib2, iclass 35, count 2 2006.229.07:36:00.40#ibcon#*mode == 0, iclass 35, count 2 2006.229.07:36:00.40#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.07:36:00.40#ibcon#[27=AT05-04\r\n] 2006.229.07:36:00.40#ibcon#*before write, iclass 35, count 2 2006.229.07:36:00.40#ibcon#enter sib2, iclass 35, count 2 2006.229.07:36:00.40#ibcon#flushed, iclass 35, count 2 2006.229.07:36:00.40#ibcon#about to write, iclass 35, count 2 2006.229.07:36:00.40#ibcon#wrote, iclass 35, count 2 2006.229.07:36:00.40#ibcon#about to read 3, iclass 35, count 2 2006.229.07:36:00.43#ibcon#read 3, iclass 35, count 2 2006.229.07:36:00.43#ibcon#about to read 4, iclass 35, count 2 2006.229.07:36:00.43#ibcon#read 4, iclass 35, count 2 2006.229.07:36:00.43#ibcon#about to read 5, iclass 35, count 2 2006.229.07:36:00.43#ibcon#read 5, iclass 35, count 2 2006.229.07:36:00.43#ibcon#about to read 6, iclass 35, count 2 2006.229.07:36:00.43#ibcon#read 6, iclass 35, count 2 2006.229.07:36:00.43#ibcon#end of sib2, iclass 35, count 2 2006.229.07:36:00.43#ibcon#*after write, iclass 35, count 2 2006.229.07:36:00.43#ibcon#*before return 0, iclass 35, count 2 2006.229.07:36:00.43#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:36:00.43#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.07:36:00.43#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.07:36:00.43#ibcon#ireg 7 cls_cnt 0 2006.229.07:36:00.43#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:36:00.55#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:36:00.55#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:36:00.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.07:36:00.55#ibcon#first serial, iclass 35, count 0 2006.229.07:36:00.55#ibcon#enter sib2, iclass 35, count 0 2006.229.07:36:00.55#ibcon#flushed, iclass 35, count 0 2006.229.07:36:00.55#ibcon#about to write, iclass 35, count 0 2006.229.07:36:00.55#ibcon#wrote, iclass 35, count 0 2006.229.07:36:00.55#ibcon#about to read 3, iclass 35, count 0 2006.229.07:36:00.57#ibcon#read 3, iclass 35, count 0 2006.229.07:36:00.57#ibcon#about to read 4, iclass 35, count 0 2006.229.07:36:00.57#ibcon#read 4, iclass 35, count 0 2006.229.07:36:00.57#ibcon#about to read 5, iclass 35, count 0 2006.229.07:36:00.57#ibcon#read 5, iclass 35, count 0 2006.229.07:36:00.57#ibcon#about to read 6, iclass 35, count 0 2006.229.07:36:00.57#ibcon#read 6, iclass 35, count 0 2006.229.07:36:00.57#ibcon#end of sib2, iclass 35, count 0 2006.229.07:36:00.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.07:36:00.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.07:36:00.57#ibcon#[27=USB\r\n] 2006.229.07:36:00.57#ibcon#*before write, iclass 35, count 0 2006.229.07:36:00.57#ibcon#enter sib2, iclass 35, count 0 2006.229.07:36:00.57#ibcon#flushed, iclass 35, count 0 2006.229.07:36:00.57#ibcon#about to write, iclass 35, count 0 2006.229.07:36:00.57#ibcon#wrote, iclass 35, count 0 2006.229.07:36:00.57#ibcon#about to read 3, iclass 35, count 0 2006.229.07:36:00.60#ibcon#read 3, iclass 35, count 0 2006.229.07:36:00.60#ibcon#about to read 4, iclass 35, count 0 2006.229.07:36:00.60#ibcon#read 4, iclass 35, count 0 2006.229.07:36:00.60#ibcon#about to read 5, iclass 35, count 0 2006.229.07:36:00.60#ibcon#read 5, iclass 35, count 0 2006.229.07:36:00.60#ibcon#about to read 6, iclass 35, count 0 2006.229.07:36:00.60#ibcon#read 6, iclass 35, count 0 2006.229.07:36:00.60#ibcon#end of sib2, iclass 35, count 0 2006.229.07:36:00.60#ibcon#*after write, iclass 35, count 0 2006.229.07:36:00.60#ibcon#*before return 0, iclass 35, count 0 2006.229.07:36:00.60#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:36:00.60#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.07:36:00.60#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.07:36:00.60#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.07:36:00.60$vck44/vblo=6,719.99 2006.229.07:36:00.60#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.07:36:00.60#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.07:36:00.60#ibcon#ireg 17 cls_cnt 0 2006.229.07:36:00.60#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:36:00.60#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:36:00.60#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:36:00.60#ibcon#enter wrdev, iclass 37, count 0 2006.229.07:36:00.60#ibcon#first serial, iclass 37, count 0 2006.229.07:36:00.60#ibcon#enter sib2, iclass 37, count 0 2006.229.07:36:00.60#ibcon#flushed, iclass 37, count 0 2006.229.07:36:00.60#ibcon#about to write, iclass 37, count 0 2006.229.07:36:00.60#ibcon#wrote, iclass 37, count 0 2006.229.07:36:00.60#ibcon#about to read 3, iclass 37, count 0 2006.229.07:36:00.62#ibcon#read 3, iclass 37, count 0 2006.229.07:36:00.62#ibcon#about to read 4, iclass 37, count 0 2006.229.07:36:00.62#ibcon#read 4, iclass 37, count 0 2006.229.07:36:00.62#ibcon#about to read 5, iclass 37, count 0 2006.229.07:36:00.62#ibcon#read 5, iclass 37, count 0 2006.229.07:36:00.62#ibcon#about to read 6, iclass 37, count 0 2006.229.07:36:00.62#ibcon#read 6, iclass 37, count 0 2006.229.07:36:00.62#ibcon#end of sib2, iclass 37, count 0 2006.229.07:36:00.62#ibcon#*mode == 0, iclass 37, count 0 2006.229.07:36:00.62#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.07:36:00.62#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:36:00.62#ibcon#*before write, iclass 37, count 0 2006.229.07:36:00.62#ibcon#enter sib2, iclass 37, count 0 2006.229.07:36:00.62#ibcon#flushed, iclass 37, count 0 2006.229.07:36:00.62#ibcon#about to write, iclass 37, count 0 2006.229.07:36:00.62#ibcon#wrote, iclass 37, count 0 2006.229.07:36:00.62#ibcon#about to read 3, iclass 37, count 0 2006.229.07:36:00.66#ibcon#read 3, iclass 37, count 0 2006.229.07:36:00.66#ibcon#about to read 4, iclass 37, count 0 2006.229.07:36:00.66#ibcon#read 4, iclass 37, count 0 2006.229.07:36:00.66#ibcon#about to read 5, iclass 37, count 0 2006.229.07:36:00.66#ibcon#read 5, iclass 37, count 0 2006.229.07:36:00.66#ibcon#about to read 6, iclass 37, count 0 2006.229.07:36:00.66#ibcon#read 6, iclass 37, count 0 2006.229.07:36:00.66#ibcon#end of sib2, iclass 37, count 0 2006.229.07:36:00.66#ibcon#*after write, iclass 37, count 0 2006.229.07:36:00.66#ibcon#*before return 0, iclass 37, count 0 2006.229.07:36:00.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:36:00.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.07:36:00.66#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.07:36:00.66#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.07:36:00.66$vck44/vb=6,4 2006.229.07:36:00.66#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.07:36:00.66#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.07:36:00.66#ibcon#ireg 11 cls_cnt 2 2006.229.07:36:00.66#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:36:00.72#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:36:00.72#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:36:00.72#ibcon#enter wrdev, iclass 39, count 2 2006.229.07:36:00.72#ibcon#first serial, iclass 39, count 2 2006.229.07:36:00.72#ibcon#enter sib2, iclass 39, count 2 2006.229.07:36:00.72#ibcon#flushed, iclass 39, count 2 2006.229.07:36:00.72#ibcon#about to write, iclass 39, count 2 2006.229.07:36:00.72#ibcon#wrote, iclass 39, count 2 2006.229.07:36:00.72#ibcon#about to read 3, iclass 39, count 2 2006.229.07:36:00.74#ibcon#read 3, iclass 39, count 2 2006.229.07:36:00.74#ibcon#about to read 4, iclass 39, count 2 2006.229.07:36:00.74#ibcon#read 4, iclass 39, count 2 2006.229.07:36:00.74#ibcon#about to read 5, iclass 39, count 2 2006.229.07:36:00.74#ibcon#read 5, iclass 39, count 2 2006.229.07:36:00.74#ibcon#about to read 6, iclass 39, count 2 2006.229.07:36:00.74#ibcon#read 6, iclass 39, count 2 2006.229.07:36:00.74#ibcon#end of sib2, iclass 39, count 2 2006.229.07:36:00.74#ibcon#*mode == 0, iclass 39, count 2 2006.229.07:36:00.74#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.07:36:00.74#ibcon#[27=AT06-04\r\n] 2006.229.07:36:00.74#ibcon#*before write, iclass 39, count 2 2006.229.07:36:00.74#ibcon#enter sib2, iclass 39, count 2 2006.229.07:36:00.74#ibcon#flushed, iclass 39, count 2 2006.229.07:36:00.74#ibcon#about to write, iclass 39, count 2 2006.229.07:36:00.74#ibcon#wrote, iclass 39, count 2 2006.229.07:36:00.74#ibcon#about to read 3, iclass 39, count 2 2006.229.07:36:00.77#ibcon#read 3, iclass 39, count 2 2006.229.07:36:00.77#ibcon#about to read 4, iclass 39, count 2 2006.229.07:36:00.77#ibcon#read 4, iclass 39, count 2 2006.229.07:36:00.77#ibcon#about to read 5, iclass 39, count 2 2006.229.07:36:00.77#ibcon#read 5, iclass 39, count 2 2006.229.07:36:00.77#ibcon#about to read 6, iclass 39, count 2 2006.229.07:36:00.77#ibcon#read 6, iclass 39, count 2 2006.229.07:36:00.77#ibcon#end of sib2, iclass 39, count 2 2006.229.07:36:00.77#ibcon#*after write, iclass 39, count 2 2006.229.07:36:00.77#ibcon#*before return 0, iclass 39, count 2 2006.229.07:36:00.77#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:36:00.77#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.07:36:00.77#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.07:36:00.77#ibcon#ireg 7 cls_cnt 0 2006.229.07:36:00.77#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:36:00.89#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:36:00.89#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:36:00.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.07:36:00.89#ibcon#first serial, iclass 39, count 0 2006.229.07:36:00.89#ibcon#enter sib2, iclass 39, count 0 2006.229.07:36:00.89#ibcon#flushed, iclass 39, count 0 2006.229.07:36:00.89#ibcon#about to write, iclass 39, count 0 2006.229.07:36:00.89#ibcon#wrote, iclass 39, count 0 2006.229.07:36:00.89#ibcon#about to read 3, iclass 39, count 0 2006.229.07:36:00.91#ibcon#read 3, iclass 39, count 0 2006.229.07:36:00.91#ibcon#about to read 4, iclass 39, count 0 2006.229.07:36:00.91#ibcon#read 4, iclass 39, count 0 2006.229.07:36:00.91#ibcon#about to read 5, iclass 39, count 0 2006.229.07:36:00.91#ibcon#read 5, iclass 39, count 0 2006.229.07:36:00.91#ibcon#about to read 6, iclass 39, count 0 2006.229.07:36:00.91#ibcon#read 6, iclass 39, count 0 2006.229.07:36:00.91#ibcon#end of sib2, iclass 39, count 0 2006.229.07:36:00.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.07:36:00.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.07:36:00.91#ibcon#[27=USB\r\n] 2006.229.07:36:00.91#ibcon#*before write, iclass 39, count 0 2006.229.07:36:00.91#ibcon#enter sib2, iclass 39, count 0 2006.229.07:36:00.91#ibcon#flushed, iclass 39, count 0 2006.229.07:36:00.91#ibcon#about to write, iclass 39, count 0 2006.229.07:36:00.91#ibcon#wrote, iclass 39, count 0 2006.229.07:36:00.91#ibcon#about to read 3, iclass 39, count 0 2006.229.07:36:00.94#ibcon#read 3, iclass 39, count 0 2006.229.07:36:00.94#ibcon#about to read 4, iclass 39, count 0 2006.229.07:36:00.94#ibcon#read 4, iclass 39, count 0 2006.229.07:36:00.94#ibcon#about to read 5, iclass 39, count 0 2006.229.07:36:00.94#ibcon#read 5, iclass 39, count 0 2006.229.07:36:00.94#ibcon#about to read 6, iclass 39, count 0 2006.229.07:36:00.94#ibcon#read 6, iclass 39, count 0 2006.229.07:36:00.94#ibcon#end of sib2, iclass 39, count 0 2006.229.07:36:00.94#ibcon#*after write, iclass 39, count 0 2006.229.07:36:00.94#ibcon#*before return 0, iclass 39, count 0 2006.229.07:36:00.94#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:36:00.94#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.07:36:00.94#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.07:36:00.94#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.07:36:00.94$vck44/vblo=7,734.99 2006.229.07:36:00.94#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.07:36:00.94#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.07:36:00.94#ibcon#ireg 17 cls_cnt 0 2006.229.07:36:00.94#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:36:00.94#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:36:00.94#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:36:00.94#ibcon#enter wrdev, iclass 3, count 0 2006.229.07:36:00.94#ibcon#first serial, iclass 3, count 0 2006.229.07:36:00.94#ibcon#enter sib2, iclass 3, count 0 2006.229.07:36:00.94#ibcon#flushed, iclass 3, count 0 2006.229.07:36:00.94#ibcon#about to write, iclass 3, count 0 2006.229.07:36:00.94#ibcon#wrote, iclass 3, count 0 2006.229.07:36:00.94#ibcon#about to read 3, iclass 3, count 0 2006.229.07:36:00.96#ibcon#read 3, iclass 3, count 0 2006.229.07:36:00.96#ibcon#about to read 4, iclass 3, count 0 2006.229.07:36:00.96#ibcon#read 4, iclass 3, count 0 2006.229.07:36:00.96#ibcon#about to read 5, iclass 3, count 0 2006.229.07:36:00.96#ibcon#read 5, iclass 3, count 0 2006.229.07:36:00.96#ibcon#about to read 6, iclass 3, count 0 2006.229.07:36:00.96#ibcon#read 6, iclass 3, count 0 2006.229.07:36:00.96#ibcon#end of sib2, iclass 3, count 0 2006.229.07:36:00.96#ibcon#*mode == 0, iclass 3, count 0 2006.229.07:36:00.96#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.07:36:00.96#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:36:00.96#ibcon#*before write, iclass 3, count 0 2006.229.07:36:00.96#ibcon#enter sib2, iclass 3, count 0 2006.229.07:36:00.96#ibcon#flushed, iclass 3, count 0 2006.229.07:36:00.96#ibcon#about to write, iclass 3, count 0 2006.229.07:36:00.96#ibcon#wrote, iclass 3, count 0 2006.229.07:36:00.96#ibcon#about to read 3, iclass 3, count 0 2006.229.07:36:01.00#ibcon#read 3, iclass 3, count 0 2006.229.07:36:01.00#ibcon#about to read 4, iclass 3, count 0 2006.229.07:36:01.00#ibcon#read 4, iclass 3, count 0 2006.229.07:36:01.00#ibcon#about to read 5, iclass 3, count 0 2006.229.07:36:01.00#ibcon#read 5, iclass 3, count 0 2006.229.07:36:01.00#ibcon#about to read 6, iclass 3, count 0 2006.229.07:36:01.00#ibcon#read 6, iclass 3, count 0 2006.229.07:36:01.00#ibcon#end of sib2, iclass 3, count 0 2006.229.07:36:01.00#ibcon#*after write, iclass 3, count 0 2006.229.07:36:01.00#ibcon#*before return 0, iclass 3, count 0 2006.229.07:36:01.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:36:01.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.07:36:01.00#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.07:36:01.00#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.07:36:01.00$vck44/vb=7,4 2006.229.07:36:01.00#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.07:36:01.00#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.07:36:01.00#ibcon#ireg 11 cls_cnt 2 2006.229.07:36:01.00#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:36:01.06#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:36:01.06#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:36:01.06#ibcon#enter wrdev, iclass 5, count 2 2006.229.07:36:01.06#ibcon#first serial, iclass 5, count 2 2006.229.07:36:01.06#ibcon#enter sib2, iclass 5, count 2 2006.229.07:36:01.06#ibcon#flushed, iclass 5, count 2 2006.229.07:36:01.06#ibcon#about to write, iclass 5, count 2 2006.229.07:36:01.06#ibcon#wrote, iclass 5, count 2 2006.229.07:36:01.06#ibcon#about to read 3, iclass 5, count 2 2006.229.07:36:01.08#ibcon#read 3, iclass 5, count 2 2006.229.07:36:01.08#ibcon#about to read 4, iclass 5, count 2 2006.229.07:36:01.08#ibcon#read 4, iclass 5, count 2 2006.229.07:36:01.08#ibcon#about to read 5, iclass 5, count 2 2006.229.07:36:01.08#ibcon#read 5, iclass 5, count 2 2006.229.07:36:01.08#ibcon#about to read 6, iclass 5, count 2 2006.229.07:36:01.08#ibcon#read 6, iclass 5, count 2 2006.229.07:36:01.08#ibcon#end of sib2, iclass 5, count 2 2006.229.07:36:01.08#ibcon#*mode == 0, iclass 5, count 2 2006.229.07:36:01.08#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.07:36:01.08#ibcon#[27=AT07-04\r\n] 2006.229.07:36:01.08#ibcon#*before write, iclass 5, count 2 2006.229.07:36:01.08#ibcon#enter sib2, iclass 5, count 2 2006.229.07:36:01.08#ibcon#flushed, iclass 5, count 2 2006.229.07:36:01.08#ibcon#about to write, iclass 5, count 2 2006.229.07:36:01.08#ibcon#wrote, iclass 5, count 2 2006.229.07:36:01.08#ibcon#about to read 3, iclass 5, count 2 2006.229.07:36:01.11#ibcon#read 3, iclass 5, count 2 2006.229.07:36:01.11#ibcon#about to read 4, iclass 5, count 2 2006.229.07:36:01.11#ibcon#read 4, iclass 5, count 2 2006.229.07:36:01.11#ibcon#about to read 5, iclass 5, count 2 2006.229.07:36:01.11#ibcon#read 5, iclass 5, count 2 2006.229.07:36:01.11#ibcon#about to read 6, iclass 5, count 2 2006.229.07:36:01.11#ibcon#read 6, iclass 5, count 2 2006.229.07:36:01.11#ibcon#end of sib2, iclass 5, count 2 2006.229.07:36:01.11#ibcon#*after write, iclass 5, count 2 2006.229.07:36:01.11#ibcon#*before return 0, iclass 5, count 2 2006.229.07:36:01.11#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:36:01.11#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.07:36:01.11#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.07:36:01.11#ibcon#ireg 7 cls_cnt 0 2006.229.07:36:01.11#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:36:01.23#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:36:01.23#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:36:01.23#ibcon#enter wrdev, iclass 5, count 0 2006.229.07:36:01.23#ibcon#first serial, iclass 5, count 0 2006.229.07:36:01.23#ibcon#enter sib2, iclass 5, count 0 2006.229.07:36:01.23#ibcon#flushed, iclass 5, count 0 2006.229.07:36:01.23#ibcon#about to write, iclass 5, count 0 2006.229.07:36:01.23#ibcon#wrote, iclass 5, count 0 2006.229.07:36:01.23#ibcon#about to read 3, iclass 5, count 0 2006.229.07:36:01.25#ibcon#read 3, iclass 5, count 0 2006.229.07:36:01.25#ibcon#about to read 4, iclass 5, count 0 2006.229.07:36:01.25#ibcon#read 4, iclass 5, count 0 2006.229.07:36:01.25#ibcon#about to read 5, iclass 5, count 0 2006.229.07:36:01.25#ibcon#read 5, iclass 5, count 0 2006.229.07:36:01.25#ibcon#about to read 6, iclass 5, count 0 2006.229.07:36:01.25#ibcon#read 6, iclass 5, count 0 2006.229.07:36:01.25#ibcon#end of sib2, iclass 5, count 0 2006.229.07:36:01.25#ibcon#*mode == 0, iclass 5, count 0 2006.229.07:36:01.25#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.07:36:01.25#ibcon#[27=USB\r\n] 2006.229.07:36:01.25#ibcon#*before write, iclass 5, count 0 2006.229.07:36:01.25#ibcon#enter sib2, iclass 5, count 0 2006.229.07:36:01.25#ibcon#flushed, iclass 5, count 0 2006.229.07:36:01.25#ibcon#about to write, iclass 5, count 0 2006.229.07:36:01.25#ibcon#wrote, iclass 5, count 0 2006.229.07:36:01.25#ibcon#about to read 3, iclass 5, count 0 2006.229.07:36:01.28#ibcon#read 3, iclass 5, count 0 2006.229.07:36:01.28#ibcon#about to read 4, iclass 5, count 0 2006.229.07:36:01.28#ibcon#read 4, iclass 5, count 0 2006.229.07:36:01.28#ibcon#about to read 5, iclass 5, count 0 2006.229.07:36:01.28#ibcon#read 5, iclass 5, count 0 2006.229.07:36:01.28#ibcon#about to read 6, iclass 5, count 0 2006.229.07:36:01.28#ibcon#read 6, iclass 5, count 0 2006.229.07:36:01.28#ibcon#end of sib2, iclass 5, count 0 2006.229.07:36:01.28#ibcon#*after write, iclass 5, count 0 2006.229.07:36:01.28#ibcon#*before return 0, iclass 5, count 0 2006.229.07:36:01.28#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:36:01.28#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.07:36:01.28#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.07:36:01.28#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.07:36:01.28$vck44/vblo=8,744.99 2006.229.07:36:01.28#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.07:36:01.28#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.07:36:01.28#ibcon#ireg 17 cls_cnt 0 2006.229.07:36:01.28#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:36:01.28#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:36:01.28#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:36:01.28#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:36:01.28#ibcon#first serial, iclass 7, count 0 2006.229.07:36:01.28#ibcon#enter sib2, iclass 7, count 0 2006.229.07:36:01.28#ibcon#flushed, iclass 7, count 0 2006.229.07:36:01.28#ibcon#about to write, iclass 7, count 0 2006.229.07:36:01.28#ibcon#wrote, iclass 7, count 0 2006.229.07:36:01.28#ibcon#about to read 3, iclass 7, count 0 2006.229.07:36:01.30#ibcon#read 3, iclass 7, count 0 2006.229.07:36:01.30#ibcon#about to read 4, iclass 7, count 0 2006.229.07:36:01.30#ibcon#read 4, iclass 7, count 0 2006.229.07:36:01.30#ibcon#about to read 5, iclass 7, count 0 2006.229.07:36:01.30#ibcon#read 5, iclass 7, count 0 2006.229.07:36:01.30#ibcon#about to read 6, iclass 7, count 0 2006.229.07:36:01.30#ibcon#read 6, iclass 7, count 0 2006.229.07:36:01.30#ibcon#end of sib2, iclass 7, count 0 2006.229.07:36:01.30#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:36:01.30#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:36:01.30#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:36:01.30#ibcon#*before write, iclass 7, count 0 2006.229.07:36:01.30#ibcon#enter sib2, iclass 7, count 0 2006.229.07:36:01.30#ibcon#flushed, iclass 7, count 0 2006.229.07:36:01.30#ibcon#about to write, iclass 7, count 0 2006.229.07:36:01.30#ibcon#wrote, iclass 7, count 0 2006.229.07:36:01.30#ibcon#about to read 3, iclass 7, count 0 2006.229.07:36:01.34#ibcon#read 3, iclass 7, count 0 2006.229.07:36:01.34#ibcon#about to read 4, iclass 7, count 0 2006.229.07:36:01.34#ibcon#read 4, iclass 7, count 0 2006.229.07:36:01.34#ibcon#about to read 5, iclass 7, count 0 2006.229.07:36:01.34#ibcon#read 5, iclass 7, count 0 2006.229.07:36:01.34#ibcon#about to read 6, iclass 7, count 0 2006.229.07:36:01.34#ibcon#read 6, iclass 7, count 0 2006.229.07:36:01.34#ibcon#end of sib2, iclass 7, count 0 2006.229.07:36:01.34#ibcon#*after write, iclass 7, count 0 2006.229.07:36:01.34#ibcon#*before return 0, iclass 7, count 0 2006.229.07:36:01.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:36:01.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:36:01.34#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:36:01.34#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:36:01.34$vck44/vb=8,4 2006.229.07:36:01.34#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.07:36:01.34#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.07:36:01.34#ibcon#ireg 11 cls_cnt 2 2006.229.07:36:01.34#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:36:01.40#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:36:01.40#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:36:01.40#ibcon#enter wrdev, iclass 11, count 2 2006.229.07:36:01.40#ibcon#first serial, iclass 11, count 2 2006.229.07:36:01.40#ibcon#enter sib2, iclass 11, count 2 2006.229.07:36:01.40#ibcon#flushed, iclass 11, count 2 2006.229.07:36:01.40#ibcon#about to write, iclass 11, count 2 2006.229.07:36:01.40#ibcon#wrote, iclass 11, count 2 2006.229.07:36:01.40#ibcon#about to read 3, iclass 11, count 2 2006.229.07:36:01.42#ibcon#read 3, iclass 11, count 2 2006.229.07:36:01.42#ibcon#about to read 4, iclass 11, count 2 2006.229.07:36:01.42#ibcon#read 4, iclass 11, count 2 2006.229.07:36:01.42#ibcon#about to read 5, iclass 11, count 2 2006.229.07:36:01.42#ibcon#read 5, iclass 11, count 2 2006.229.07:36:01.42#ibcon#about to read 6, iclass 11, count 2 2006.229.07:36:01.42#ibcon#read 6, iclass 11, count 2 2006.229.07:36:01.42#ibcon#end of sib2, iclass 11, count 2 2006.229.07:36:01.42#ibcon#*mode == 0, iclass 11, count 2 2006.229.07:36:01.42#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.07:36:01.42#ibcon#[27=AT08-04\r\n] 2006.229.07:36:01.42#ibcon#*before write, iclass 11, count 2 2006.229.07:36:01.42#ibcon#enter sib2, iclass 11, count 2 2006.229.07:36:01.42#ibcon#flushed, iclass 11, count 2 2006.229.07:36:01.42#ibcon#about to write, iclass 11, count 2 2006.229.07:36:01.42#ibcon#wrote, iclass 11, count 2 2006.229.07:36:01.42#ibcon#about to read 3, iclass 11, count 2 2006.229.07:36:01.45#ibcon#read 3, iclass 11, count 2 2006.229.07:36:01.45#ibcon#about to read 4, iclass 11, count 2 2006.229.07:36:01.45#ibcon#read 4, iclass 11, count 2 2006.229.07:36:01.45#ibcon#about to read 5, iclass 11, count 2 2006.229.07:36:01.45#ibcon#read 5, iclass 11, count 2 2006.229.07:36:01.45#ibcon#about to read 6, iclass 11, count 2 2006.229.07:36:01.45#ibcon#read 6, iclass 11, count 2 2006.229.07:36:01.45#ibcon#end of sib2, iclass 11, count 2 2006.229.07:36:01.45#ibcon#*after write, iclass 11, count 2 2006.229.07:36:01.45#ibcon#*before return 0, iclass 11, count 2 2006.229.07:36:01.45#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:36:01.45#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.07:36:01.45#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.07:36:01.45#ibcon#ireg 7 cls_cnt 0 2006.229.07:36:01.45#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:36:01.57#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:36:01.57#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:36:01.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.07:36:01.57#ibcon#first serial, iclass 11, count 0 2006.229.07:36:01.57#ibcon#enter sib2, iclass 11, count 0 2006.229.07:36:01.57#ibcon#flushed, iclass 11, count 0 2006.229.07:36:01.57#ibcon#about to write, iclass 11, count 0 2006.229.07:36:01.57#ibcon#wrote, iclass 11, count 0 2006.229.07:36:01.57#ibcon#about to read 3, iclass 11, count 0 2006.229.07:36:01.59#ibcon#read 3, iclass 11, count 0 2006.229.07:36:01.59#ibcon#about to read 4, iclass 11, count 0 2006.229.07:36:01.59#ibcon#read 4, iclass 11, count 0 2006.229.07:36:01.59#ibcon#about to read 5, iclass 11, count 0 2006.229.07:36:01.59#ibcon#read 5, iclass 11, count 0 2006.229.07:36:01.59#ibcon#about to read 6, iclass 11, count 0 2006.229.07:36:01.59#ibcon#read 6, iclass 11, count 0 2006.229.07:36:01.59#ibcon#end of sib2, iclass 11, count 0 2006.229.07:36:01.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.07:36:01.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.07:36:01.59#ibcon#[27=USB\r\n] 2006.229.07:36:01.59#ibcon#*before write, iclass 11, count 0 2006.229.07:36:01.59#ibcon#enter sib2, iclass 11, count 0 2006.229.07:36:01.59#ibcon#flushed, iclass 11, count 0 2006.229.07:36:01.59#ibcon#about to write, iclass 11, count 0 2006.229.07:36:01.59#ibcon#wrote, iclass 11, count 0 2006.229.07:36:01.59#ibcon#about to read 3, iclass 11, count 0 2006.229.07:36:01.62#ibcon#read 3, iclass 11, count 0 2006.229.07:36:01.62#ibcon#about to read 4, iclass 11, count 0 2006.229.07:36:01.62#ibcon#read 4, iclass 11, count 0 2006.229.07:36:01.62#ibcon#about to read 5, iclass 11, count 0 2006.229.07:36:01.62#ibcon#read 5, iclass 11, count 0 2006.229.07:36:01.62#ibcon#about to read 6, iclass 11, count 0 2006.229.07:36:01.62#ibcon#read 6, iclass 11, count 0 2006.229.07:36:01.62#ibcon#end of sib2, iclass 11, count 0 2006.229.07:36:01.62#ibcon#*after write, iclass 11, count 0 2006.229.07:36:01.62#ibcon#*before return 0, iclass 11, count 0 2006.229.07:36:01.62#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:36:01.62#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.07:36:01.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.07:36:01.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.07:36:01.62$vck44/vabw=wide 2006.229.07:36:01.62#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.07:36:01.62#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.07:36:01.62#ibcon#ireg 8 cls_cnt 0 2006.229.07:36:01.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:36:01.62#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:36:01.62#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:36:01.62#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:36:01.62#ibcon#first serial, iclass 13, count 0 2006.229.07:36:01.62#ibcon#enter sib2, iclass 13, count 0 2006.229.07:36:01.62#ibcon#flushed, iclass 13, count 0 2006.229.07:36:01.62#ibcon#about to write, iclass 13, count 0 2006.229.07:36:01.62#ibcon#wrote, iclass 13, count 0 2006.229.07:36:01.62#ibcon#about to read 3, iclass 13, count 0 2006.229.07:36:01.64#ibcon#read 3, iclass 13, count 0 2006.229.07:36:01.64#ibcon#about to read 4, iclass 13, count 0 2006.229.07:36:01.64#ibcon#read 4, iclass 13, count 0 2006.229.07:36:01.64#ibcon#about to read 5, iclass 13, count 0 2006.229.07:36:01.64#ibcon#read 5, iclass 13, count 0 2006.229.07:36:01.64#ibcon#about to read 6, iclass 13, count 0 2006.229.07:36:01.64#ibcon#read 6, iclass 13, count 0 2006.229.07:36:01.64#ibcon#end of sib2, iclass 13, count 0 2006.229.07:36:01.64#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:36:01.64#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:36:01.64#ibcon#[25=BW32\r\n] 2006.229.07:36:01.64#ibcon#*before write, iclass 13, count 0 2006.229.07:36:01.64#ibcon#enter sib2, iclass 13, count 0 2006.229.07:36:01.64#ibcon#flushed, iclass 13, count 0 2006.229.07:36:01.64#ibcon#about to write, iclass 13, count 0 2006.229.07:36:01.64#ibcon#wrote, iclass 13, count 0 2006.229.07:36:01.64#ibcon#about to read 3, iclass 13, count 0 2006.229.07:36:01.67#ibcon#read 3, iclass 13, count 0 2006.229.07:36:01.67#ibcon#about to read 4, iclass 13, count 0 2006.229.07:36:01.67#ibcon#read 4, iclass 13, count 0 2006.229.07:36:01.67#ibcon#about to read 5, iclass 13, count 0 2006.229.07:36:01.67#ibcon#read 5, iclass 13, count 0 2006.229.07:36:01.67#ibcon#about to read 6, iclass 13, count 0 2006.229.07:36:01.67#ibcon#read 6, iclass 13, count 0 2006.229.07:36:01.67#ibcon#end of sib2, iclass 13, count 0 2006.229.07:36:01.67#ibcon#*after write, iclass 13, count 0 2006.229.07:36:01.67#ibcon#*before return 0, iclass 13, count 0 2006.229.07:36:01.67#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:36:01.67#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:36:01.67#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:36:01.67#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:36:01.67$vck44/vbbw=wide 2006.229.07:36:01.67#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.07:36:01.67#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.07:36:01.67#ibcon#ireg 8 cls_cnt 0 2006.229.07:36:01.67#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:36:01.74#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:36:01.74#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:36:01.74#ibcon#enter wrdev, iclass 15, count 0 2006.229.07:36:01.74#ibcon#first serial, iclass 15, count 0 2006.229.07:36:01.74#ibcon#enter sib2, iclass 15, count 0 2006.229.07:36:01.74#ibcon#flushed, iclass 15, count 0 2006.229.07:36:01.74#ibcon#about to write, iclass 15, count 0 2006.229.07:36:01.74#ibcon#wrote, iclass 15, count 0 2006.229.07:36:01.74#ibcon#about to read 3, iclass 15, count 0 2006.229.07:36:01.76#ibcon#read 3, iclass 15, count 0 2006.229.07:36:01.76#ibcon#about to read 4, iclass 15, count 0 2006.229.07:36:01.76#ibcon#read 4, iclass 15, count 0 2006.229.07:36:01.76#ibcon#about to read 5, iclass 15, count 0 2006.229.07:36:01.76#ibcon#read 5, iclass 15, count 0 2006.229.07:36:01.76#ibcon#about to read 6, iclass 15, count 0 2006.229.07:36:01.76#ibcon#read 6, iclass 15, count 0 2006.229.07:36:01.76#ibcon#end of sib2, iclass 15, count 0 2006.229.07:36:01.76#ibcon#*mode == 0, iclass 15, count 0 2006.229.07:36:01.76#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.07:36:01.76#ibcon#[27=BW32\r\n] 2006.229.07:36:01.76#ibcon#*before write, iclass 15, count 0 2006.229.07:36:01.76#ibcon#enter sib2, iclass 15, count 0 2006.229.07:36:01.76#ibcon#flushed, iclass 15, count 0 2006.229.07:36:01.76#ibcon#about to write, iclass 15, count 0 2006.229.07:36:01.76#ibcon#wrote, iclass 15, count 0 2006.229.07:36:01.76#ibcon#about to read 3, iclass 15, count 0 2006.229.07:36:01.79#ibcon#read 3, iclass 15, count 0 2006.229.07:36:01.79#ibcon#about to read 4, iclass 15, count 0 2006.229.07:36:01.79#ibcon#read 4, iclass 15, count 0 2006.229.07:36:01.79#ibcon#about to read 5, iclass 15, count 0 2006.229.07:36:01.79#ibcon#read 5, iclass 15, count 0 2006.229.07:36:01.79#ibcon#about to read 6, iclass 15, count 0 2006.229.07:36:01.79#ibcon#read 6, iclass 15, count 0 2006.229.07:36:01.79#ibcon#end of sib2, iclass 15, count 0 2006.229.07:36:01.79#ibcon#*after write, iclass 15, count 0 2006.229.07:36:01.79#ibcon#*before return 0, iclass 15, count 0 2006.229.07:36:01.79#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:36:01.79#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.07:36:01.79#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.07:36:01.79#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.07:36:01.79$setupk4/ifdk4 2006.229.07:36:01.79$ifdk4/lo= 2006.229.07:36:01.79$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:36:01.79$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:36:01.79$ifdk4/patch= 2006.229.07:36:01.79$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:36:01.79$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:36:01.79$setupk4/!*+20s 2006.229.07:36:06.87#abcon#<5=/06 2.9 5.3 29.99 921000.3\r\n> 2006.229.07:36:06.89#abcon#{5=INTERFACE CLEAR} 2006.229.07:36:06.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:36:09.14#trakl#Source acquired 2006.229.07:36:09.14#flagr#flagr/antenna,acquired 2006.229.07:36:16.26$setupk4/"tpicd 2006.229.07:36:16.26$setupk4/echo=off 2006.229.07:36:16.26$setupk4/xlog=off 2006.229.07:36:16.26:!2006.229.07:39:22 2006.229.07:39:22.00:preob 2006.229.07:39:22.14/onsource/TRACKING 2006.229.07:39:22.14:!2006.229.07:39:32 2006.229.07:39:32.00:"tape 2006.229.07:39:32.00:"st=record 2006.229.07:39:32.00:data_valid=on 2006.229.07:39:32.00:midob 2006.229.07:39:33.14/onsource/TRACKING 2006.229.07:39:33.14/wx/29.97,1000.3,93 2006.229.07:39:33.34/cable/+6.3972E-03 2006.229.07:39:34.43/va/01,08,usb,yes,29,32 2006.229.07:39:34.43/va/02,07,usb,yes,32,32 2006.229.07:39:34.43/va/03,06,usb,yes,40,42 2006.229.07:39:34.43/va/04,07,usb,yes,33,34 2006.229.07:39:34.43/va/05,04,usb,yes,29,30 2006.229.07:39:34.43/va/06,04,usb,yes,33,33 2006.229.07:39:34.43/va/07,05,usb,yes,29,30 2006.229.07:39:34.43/va/08,06,usb,yes,21,26 2006.229.07:39:34.66/valo/01,524.99,yes,locked 2006.229.07:39:34.66/valo/02,534.99,yes,locked 2006.229.07:39:34.66/valo/03,564.99,yes,locked 2006.229.07:39:34.66/valo/04,624.99,yes,locked 2006.229.07:39:34.66/valo/05,734.99,yes,locked 2006.229.07:39:34.66/valo/06,814.99,yes,locked 2006.229.07:39:34.66/valo/07,864.99,yes,locked 2006.229.07:39:34.66/valo/08,884.99,yes,locked 2006.229.07:39:35.75/vb/01,04,usb,yes,31,29 2006.229.07:39:35.75/vb/02,04,usb,yes,33,33 2006.229.07:39:35.75/vb/03,04,usb,yes,30,33 2006.229.07:39:35.75/vb/04,04,usb,yes,35,34 2006.229.07:39:35.75/vb/05,04,usb,yes,27,29 2006.229.07:39:35.75/vb/06,04,usb,yes,32,28 2006.229.07:39:35.75/vb/07,04,usb,yes,31,31 2006.229.07:39:35.75/vb/08,04,usb,yes,29,32 2006.229.07:39:35.98/vblo/01,629.99,yes,locked 2006.229.07:39:35.98/vblo/02,634.99,yes,locked 2006.229.07:39:35.98/vblo/03,649.99,yes,locked 2006.229.07:39:35.98/vblo/04,679.99,yes,locked 2006.229.07:39:35.98/vblo/05,709.99,yes,locked 2006.229.07:39:35.98/vblo/06,719.99,yes,locked 2006.229.07:39:35.98/vblo/07,734.99,yes,locked 2006.229.07:39:35.98/vblo/08,744.99,yes,locked 2006.229.07:39:36.13/vabw/8 2006.229.07:39:36.28/vbbw/8 2006.229.07:39:36.37/xfe/off,on,12.0 2006.229.07:39:36.76/ifatt/23,28,28,28 2006.229.07:39:37.07/fmout-gps/S +4.50E-07 2006.229.07:39:37.11:!2006.229.07:42:32 2006.229.07:42:32.01:data_valid=off 2006.229.07:42:32.02:"et 2006.229.07:42:32.02:!+3s 2006.229.07:42:35.03:"tape 2006.229.07:42:35.03:postob 2006.229.07:42:35.19/cable/+6.3986E-03 2006.229.07:42:35.19/wx/29.96,1000.4,94 2006.229.07:42:35.25/fmout-gps/S +4.51E-07 2006.229.07:42:35.25:scan_name=229-0745,jd0608,110 2006.229.07:42:35.25:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.07:42:36.14#flagr#flagr/antenna,new-source 2006.229.07:42:36.14:checkk5 2006.229.07:42:36.58/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:42:36.99/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:42:37.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:42:37.79/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:42:38.17/chk_obsdata//k5ts1/T2290739??a.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.07:42:38.57/chk_obsdata//k5ts2/T2290739??b.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.07:42:38.97/chk_obsdata//k5ts3/T2290739??c.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.07:42:39.37/chk_obsdata//k5ts4/T2290739??d.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.07:42:40.11/k5log//k5ts1_log_newline 2006.229.07:42:40.80/k5log//k5ts2_log_newline 2006.229.07:42:41.51/k5log//k5ts3_log_newline 2006.229.07:42:42.21/k5log//k5ts4_log_newline 2006.229.07:42:42.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:42:42.24:setupk4=1 2006.229.07:42:42.24$setupk4/echo=on 2006.229.07:42:42.24$setupk4/pcalon 2006.229.07:42:42.24$pcalon/"no phase cal control is implemented here 2006.229.07:42:42.24$setupk4/"tpicd=stop 2006.229.07:42:42.24$setupk4/"rec=synch_on 2006.229.07:42:42.24$setupk4/"rec_mode=128 2006.229.07:42:42.24$setupk4/!* 2006.229.07:42:42.24$setupk4/recpk4 2006.229.07:42:42.24$recpk4/recpatch= 2006.229.07:42:42.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:42:42.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:42:42.24$setupk4/vck44 2006.229.07:42:42.24$vck44/valo=1,524.99 2006.229.07:42:42.24#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:42:42.24#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:42:42.24#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:42.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:42.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:42.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:42.24#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:42:42.24#ibcon#first serial, iclass 32, count 0 2006.229.07:42:42.24#ibcon#enter sib2, iclass 32, count 0 2006.229.07:42:42.24#ibcon#flushed, iclass 32, count 0 2006.229.07:42:42.24#ibcon#about to write, iclass 32, count 0 2006.229.07:42:42.24#ibcon#wrote, iclass 32, count 0 2006.229.07:42:42.24#ibcon#about to read 3, iclass 32, count 0 2006.229.07:42:42.26#ibcon#read 3, iclass 32, count 0 2006.229.07:42:42.26#ibcon#about to read 4, iclass 32, count 0 2006.229.07:42:42.26#ibcon#read 4, iclass 32, count 0 2006.229.07:42:42.26#ibcon#about to read 5, iclass 32, count 0 2006.229.07:42:42.26#ibcon#read 5, iclass 32, count 0 2006.229.07:42:42.26#ibcon#about to read 6, iclass 32, count 0 2006.229.07:42:42.26#ibcon#read 6, iclass 32, count 0 2006.229.07:42:42.26#ibcon#end of sib2, iclass 32, count 0 2006.229.07:42:42.26#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:42:42.26#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:42:42.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:42:42.26#ibcon#*before write, iclass 32, count 0 2006.229.07:42:42.26#ibcon#enter sib2, iclass 32, count 0 2006.229.07:42:42.26#ibcon#flushed, iclass 32, count 0 2006.229.07:42:42.26#ibcon#about to write, iclass 32, count 0 2006.229.07:42:42.26#ibcon#wrote, iclass 32, count 0 2006.229.07:42:42.26#ibcon#about to read 3, iclass 32, count 0 2006.229.07:42:42.31#ibcon#read 3, iclass 32, count 0 2006.229.07:42:42.31#ibcon#about to read 4, iclass 32, count 0 2006.229.07:42:42.31#ibcon#read 4, iclass 32, count 0 2006.229.07:42:42.31#ibcon#about to read 5, iclass 32, count 0 2006.229.07:42:42.31#ibcon#read 5, iclass 32, count 0 2006.229.07:42:42.31#ibcon#about to read 6, iclass 32, count 0 2006.229.07:42:42.31#ibcon#read 6, iclass 32, count 0 2006.229.07:42:42.31#ibcon#end of sib2, iclass 32, count 0 2006.229.07:42:42.31#ibcon#*after write, iclass 32, count 0 2006.229.07:42:42.31#ibcon#*before return 0, iclass 32, count 0 2006.229.07:42:42.31#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:42.31#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:42.31#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:42:42.31#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:42:42.31$vck44/va=1,8 2006.229.07:42:42.31#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.07:42:42.31#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.07:42:42.31#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:42.31#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:42.31#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:42.31#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:42.31#ibcon#enter wrdev, iclass 34, count 2 2006.229.07:42:42.31#ibcon#first serial, iclass 34, count 2 2006.229.07:42:42.31#ibcon#enter sib2, iclass 34, count 2 2006.229.07:42:42.31#ibcon#flushed, iclass 34, count 2 2006.229.07:42:42.31#ibcon#about to write, iclass 34, count 2 2006.229.07:42:42.31#ibcon#wrote, iclass 34, count 2 2006.229.07:42:42.31#ibcon#about to read 3, iclass 34, count 2 2006.229.07:42:42.33#ibcon#read 3, iclass 34, count 2 2006.229.07:42:42.33#ibcon#about to read 4, iclass 34, count 2 2006.229.07:42:42.33#ibcon#read 4, iclass 34, count 2 2006.229.07:42:42.33#ibcon#about to read 5, iclass 34, count 2 2006.229.07:42:42.33#ibcon#read 5, iclass 34, count 2 2006.229.07:42:42.33#ibcon#about to read 6, iclass 34, count 2 2006.229.07:42:42.33#ibcon#read 6, iclass 34, count 2 2006.229.07:42:42.33#ibcon#end of sib2, iclass 34, count 2 2006.229.07:42:42.33#ibcon#*mode == 0, iclass 34, count 2 2006.229.07:42:42.33#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.07:42:42.33#ibcon#[25=AT01-08\r\n] 2006.229.07:42:42.33#ibcon#*before write, iclass 34, count 2 2006.229.07:42:42.33#ibcon#enter sib2, iclass 34, count 2 2006.229.07:42:42.33#ibcon#flushed, iclass 34, count 2 2006.229.07:42:42.33#ibcon#about to write, iclass 34, count 2 2006.229.07:42:42.33#ibcon#wrote, iclass 34, count 2 2006.229.07:42:42.33#ibcon#about to read 3, iclass 34, count 2 2006.229.07:42:42.36#ibcon#read 3, iclass 34, count 2 2006.229.07:42:42.36#ibcon#about to read 4, iclass 34, count 2 2006.229.07:42:42.36#ibcon#read 4, iclass 34, count 2 2006.229.07:42:42.36#ibcon#about to read 5, iclass 34, count 2 2006.229.07:42:42.36#ibcon#read 5, iclass 34, count 2 2006.229.07:42:42.36#ibcon#about to read 6, iclass 34, count 2 2006.229.07:42:42.36#ibcon#read 6, iclass 34, count 2 2006.229.07:42:42.36#ibcon#end of sib2, iclass 34, count 2 2006.229.07:42:42.36#ibcon#*after write, iclass 34, count 2 2006.229.07:42:42.36#ibcon#*before return 0, iclass 34, count 2 2006.229.07:42:42.36#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:42.36#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:42.36#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.07:42:42.36#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:42.36#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:42.48#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:42.48#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:42.48#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:42:42.48#ibcon#first serial, iclass 34, count 0 2006.229.07:42:42.48#ibcon#enter sib2, iclass 34, count 0 2006.229.07:42:42.48#ibcon#flushed, iclass 34, count 0 2006.229.07:42:42.48#ibcon#about to write, iclass 34, count 0 2006.229.07:42:42.48#ibcon#wrote, iclass 34, count 0 2006.229.07:42:42.48#ibcon#about to read 3, iclass 34, count 0 2006.229.07:42:42.50#ibcon#read 3, iclass 34, count 0 2006.229.07:42:42.50#ibcon#about to read 4, iclass 34, count 0 2006.229.07:42:42.50#ibcon#read 4, iclass 34, count 0 2006.229.07:42:42.50#ibcon#about to read 5, iclass 34, count 0 2006.229.07:42:42.50#ibcon#read 5, iclass 34, count 0 2006.229.07:42:42.50#ibcon#about to read 6, iclass 34, count 0 2006.229.07:42:42.50#ibcon#read 6, iclass 34, count 0 2006.229.07:42:42.50#ibcon#end of sib2, iclass 34, count 0 2006.229.07:42:42.50#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:42:42.50#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:42:42.50#ibcon#[25=USB\r\n] 2006.229.07:42:42.50#ibcon#*before write, iclass 34, count 0 2006.229.07:42:42.50#ibcon#enter sib2, iclass 34, count 0 2006.229.07:42:42.50#ibcon#flushed, iclass 34, count 0 2006.229.07:42:42.50#ibcon#about to write, iclass 34, count 0 2006.229.07:42:42.50#ibcon#wrote, iclass 34, count 0 2006.229.07:42:42.50#ibcon#about to read 3, iclass 34, count 0 2006.229.07:42:42.53#ibcon#read 3, iclass 34, count 0 2006.229.07:42:42.53#ibcon#about to read 4, iclass 34, count 0 2006.229.07:42:42.53#ibcon#read 4, iclass 34, count 0 2006.229.07:42:42.53#ibcon#about to read 5, iclass 34, count 0 2006.229.07:42:42.53#ibcon#read 5, iclass 34, count 0 2006.229.07:42:42.53#ibcon#about to read 6, iclass 34, count 0 2006.229.07:42:42.53#ibcon#read 6, iclass 34, count 0 2006.229.07:42:42.53#ibcon#end of sib2, iclass 34, count 0 2006.229.07:42:42.53#ibcon#*after write, iclass 34, count 0 2006.229.07:42:42.53#ibcon#*before return 0, iclass 34, count 0 2006.229.07:42:42.53#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:42.53#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:42.53#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:42:42.53#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:42:42.53$vck44/valo=2,534.99 2006.229.07:42:42.53#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.07:42:42.53#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.07:42:42.53#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:42.53#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:42.53#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:42.53#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:42.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:42:42.53#ibcon#first serial, iclass 36, count 0 2006.229.07:42:42.53#ibcon#enter sib2, iclass 36, count 0 2006.229.07:42:42.53#ibcon#flushed, iclass 36, count 0 2006.229.07:42:42.53#ibcon#about to write, iclass 36, count 0 2006.229.07:42:42.53#ibcon#wrote, iclass 36, count 0 2006.229.07:42:42.53#ibcon#about to read 3, iclass 36, count 0 2006.229.07:42:42.55#ibcon#read 3, iclass 36, count 0 2006.229.07:42:42.55#ibcon#about to read 4, iclass 36, count 0 2006.229.07:42:42.55#ibcon#read 4, iclass 36, count 0 2006.229.07:42:42.55#ibcon#about to read 5, iclass 36, count 0 2006.229.07:42:42.55#ibcon#read 5, iclass 36, count 0 2006.229.07:42:42.55#ibcon#about to read 6, iclass 36, count 0 2006.229.07:42:42.55#ibcon#read 6, iclass 36, count 0 2006.229.07:42:42.55#ibcon#end of sib2, iclass 36, count 0 2006.229.07:42:42.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:42:42.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:42:42.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:42:42.55#ibcon#*before write, iclass 36, count 0 2006.229.07:42:42.55#ibcon#enter sib2, iclass 36, count 0 2006.229.07:42:42.55#ibcon#flushed, iclass 36, count 0 2006.229.07:42:42.55#ibcon#about to write, iclass 36, count 0 2006.229.07:42:42.55#ibcon#wrote, iclass 36, count 0 2006.229.07:42:42.55#ibcon#about to read 3, iclass 36, count 0 2006.229.07:42:42.59#ibcon#read 3, iclass 36, count 0 2006.229.07:42:42.59#ibcon#about to read 4, iclass 36, count 0 2006.229.07:42:42.59#ibcon#read 4, iclass 36, count 0 2006.229.07:42:42.59#ibcon#about to read 5, iclass 36, count 0 2006.229.07:42:42.59#ibcon#read 5, iclass 36, count 0 2006.229.07:42:42.59#ibcon#about to read 6, iclass 36, count 0 2006.229.07:42:42.59#ibcon#read 6, iclass 36, count 0 2006.229.07:42:42.59#ibcon#end of sib2, iclass 36, count 0 2006.229.07:42:42.59#ibcon#*after write, iclass 36, count 0 2006.229.07:42:42.59#ibcon#*before return 0, iclass 36, count 0 2006.229.07:42:42.59#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:42.59#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:42.59#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:42:42.59#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:42:42.59$vck44/va=2,7 2006.229.07:42:42.59#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.07:42:42.59#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.07:42:42.59#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:42.59#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:42.65#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:42.65#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:42.65#ibcon#enter wrdev, iclass 38, count 2 2006.229.07:42:42.65#ibcon#first serial, iclass 38, count 2 2006.229.07:42:42.65#ibcon#enter sib2, iclass 38, count 2 2006.229.07:42:42.65#ibcon#flushed, iclass 38, count 2 2006.229.07:42:42.65#ibcon#about to write, iclass 38, count 2 2006.229.07:42:42.65#ibcon#wrote, iclass 38, count 2 2006.229.07:42:42.65#ibcon#about to read 3, iclass 38, count 2 2006.229.07:42:42.67#ibcon#read 3, iclass 38, count 2 2006.229.07:42:42.67#ibcon#about to read 4, iclass 38, count 2 2006.229.07:42:42.67#ibcon#read 4, iclass 38, count 2 2006.229.07:42:42.67#ibcon#about to read 5, iclass 38, count 2 2006.229.07:42:42.67#ibcon#read 5, iclass 38, count 2 2006.229.07:42:42.67#ibcon#about to read 6, iclass 38, count 2 2006.229.07:42:42.67#ibcon#read 6, iclass 38, count 2 2006.229.07:42:42.67#ibcon#end of sib2, iclass 38, count 2 2006.229.07:42:42.67#ibcon#*mode == 0, iclass 38, count 2 2006.229.07:42:42.67#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.07:42:42.67#ibcon#[25=AT02-07\r\n] 2006.229.07:42:42.67#ibcon#*before write, iclass 38, count 2 2006.229.07:42:42.67#ibcon#enter sib2, iclass 38, count 2 2006.229.07:42:42.67#ibcon#flushed, iclass 38, count 2 2006.229.07:42:42.67#ibcon#about to write, iclass 38, count 2 2006.229.07:42:42.67#ibcon#wrote, iclass 38, count 2 2006.229.07:42:42.67#ibcon#about to read 3, iclass 38, count 2 2006.229.07:42:42.70#ibcon#read 3, iclass 38, count 2 2006.229.07:42:42.70#ibcon#about to read 4, iclass 38, count 2 2006.229.07:42:42.70#ibcon#read 4, iclass 38, count 2 2006.229.07:42:42.70#ibcon#about to read 5, iclass 38, count 2 2006.229.07:42:42.70#ibcon#read 5, iclass 38, count 2 2006.229.07:42:42.70#ibcon#about to read 6, iclass 38, count 2 2006.229.07:42:42.70#ibcon#read 6, iclass 38, count 2 2006.229.07:42:42.70#ibcon#end of sib2, iclass 38, count 2 2006.229.07:42:42.70#ibcon#*after write, iclass 38, count 2 2006.229.07:42:42.70#ibcon#*before return 0, iclass 38, count 2 2006.229.07:42:42.70#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:42.70#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:42.70#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.07:42:42.70#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:42.70#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:42.82#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:42.82#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:42.82#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:42:42.82#ibcon#first serial, iclass 38, count 0 2006.229.07:42:42.82#ibcon#enter sib2, iclass 38, count 0 2006.229.07:42:42.82#ibcon#flushed, iclass 38, count 0 2006.229.07:42:42.82#ibcon#about to write, iclass 38, count 0 2006.229.07:42:42.82#ibcon#wrote, iclass 38, count 0 2006.229.07:42:42.82#ibcon#about to read 3, iclass 38, count 0 2006.229.07:42:42.84#ibcon#read 3, iclass 38, count 0 2006.229.07:42:42.84#ibcon#about to read 4, iclass 38, count 0 2006.229.07:42:42.84#ibcon#read 4, iclass 38, count 0 2006.229.07:42:42.84#ibcon#about to read 5, iclass 38, count 0 2006.229.07:42:42.84#ibcon#read 5, iclass 38, count 0 2006.229.07:42:42.84#ibcon#about to read 6, iclass 38, count 0 2006.229.07:42:42.84#ibcon#read 6, iclass 38, count 0 2006.229.07:42:42.84#ibcon#end of sib2, iclass 38, count 0 2006.229.07:42:42.84#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:42:42.84#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:42:42.84#ibcon#[25=USB\r\n] 2006.229.07:42:42.84#ibcon#*before write, iclass 38, count 0 2006.229.07:42:42.84#ibcon#enter sib2, iclass 38, count 0 2006.229.07:42:42.84#ibcon#flushed, iclass 38, count 0 2006.229.07:42:42.84#ibcon#about to write, iclass 38, count 0 2006.229.07:42:42.84#ibcon#wrote, iclass 38, count 0 2006.229.07:42:42.84#ibcon#about to read 3, iclass 38, count 0 2006.229.07:42:42.87#ibcon#read 3, iclass 38, count 0 2006.229.07:42:42.87#ibcon#about to read 4, iclass 38, count 0 2006.229.07:42:42.87#ibcon#read 4, iclass 38, count 0 2006.229.07:42:42.87#ibcon#about to read 5, iclass 38, count 0 2006.229.07:42:42.87#ibcon#read 5, iclass 38, count 0 2006.229.07:42:42.87#ibcon#about to read 6, iclass 38, count 0 2006.229.07:42:42.87#ibcon#read 6, iclass 38, count 0 2006.229.07:42:42.87#ibcon#end of sib2, iclass 38, count 0 2006.229.07:42:42.87#ibcon#*after write, iclass 38, count 0 2006.229.07:42:42.87#ibcon#*before return 0, iclass 38, count 0 2006.229.07:42:42.87#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:42.87#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:42.87#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:42:42.87#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:42:42.87$vck44/valo=3,564.99 2006.229.07:42:42.87#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.07:42:42.87#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.07:42:42.87#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:42.87#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:42.87#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:42.87#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:42.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:42:42.87#ibcon#first serial, iclass 40, count 0 2006.229.07:42:42.87#ibcon#enter sib2, iclass 40, count 0 2006.229.07:42:42.87#ibcon#flushed, iclass 40, count 0 2006.229.07:42:42.87#ibcon#about to write, iclass 40, count 0 2006.229.07:42:42.87#ibcon#wrote, iclass 40, count 0 2006.229.07:42:42.87#ibcon#about to read 3, iclass 40, count 0 2006.229.07:42:42.89#ibcon#read 3, iclass 40, count 0 2006.229.07:42:42.89#ibcon#about to read 4, iclass 40, count 0 2006.229.07:42:42.89#ibcon#read 4, iclass 40, count 0 2006.229.07:42:42.89#ibcon#about to read 5, iclass 40, count 0 2006.229.07:42:42.89#ibcon#read 5, iclass 40, count 0 2006.229.07:42:42.89#ibcon#about to read 6, iclass 40, count 0 2006.229.07:42:42.89#ibcon#read 6, iclass 40, count 0 2006.229.07:42:42.89#ibcon#end of sib2, iclass 40, count 0 2006.229.07:42:42.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:42:42.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:42:42.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:42:42.89#ibcon#*before write, iclass 40, count 0 2006.229.07:42:42.89#ibcon#enter sib2, iclass 40, count 0 2006.229.07:42:42.89#ibcon#flushed, iclass 40, count 0 2006.229.07:42:42.89#ibcon#about to write, iclass 40, count 0 2006.229.07:42:42.89#ibcon#wrote, iclass 40, count 0 2006.229.07:42:42.89#ibcon#about to read 3, iclass 40, count 0 2006.229.07:42:42.93#ibcon#read 3, iclass 40, count 0 2006.229.07:42:42.93#ibcon#about to read 4, iclass 40, count 0 2006.229.07:42:42.93#ibcon#read 4, iclass 40, count 0 2006.229.07:42:42.93#ibcon#about to read 5, iclass 40, count 0 2006.229.07:42:42.93#ibcon#read 5, iclass 40, count 0 2006.229.07:42:42.93#ibcon#about to read 6, iclass 40, count 0 2006.229.07:42:42.93#ibcon#read 6, iclass 40, count 0 2006.229.07:42:42.93#ibcon#end of sib2, iclass 40, count 0 2006.229.07:42:42.93#ibcon#*after write, iclass 40, count 0 2006.229.07:42:42.93#ibcon#*before return 0, iclass 40, count 0 2006.229.07:42:42.93#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:42.93#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:42.93#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:42:42.93#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:42:42.93$vck44/va=3,6 2006.229.07:42:42.93#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.07:42:42.93#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.07:42:42.93#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:42.93#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:42.99#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:42.99#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:42.99#ibcon#enter wrdev, iclass 4, count 2 2006.229.07:42:42.99#ibcon#first serial, iclass 4, count 2 2006.229.07:42:42.99#ibcon#enter sib2, iclass 4, count 2 2006.229.07:42:42.99#ibcon#flushed, iclass 4, count 2 2006.229.07:42:42.99#ibcon#about to write, iclass 4, count 2 2006.229.07:42:42.99#ibcon#wrote, iclass 4, count 2 2006.229.07:42:42.99#ibcon#about to read 3, iclass 4, count 2 2006.229.07:42:43.01#ibcon#read 3, iclass 4, count 2 2006.229.07:42:43.01#ibcon#about to read 4, iclass 4, count 2 2006.229.07:42:43.01#ibcon#read 4, iclass 4, count 2 2006.229.07:42:43.01#ibcon#about to read 5, iclass 4, count 2 2006.229.07:42:43.01#ibcon#read 5, iclass 4, count 2 2006.229.07:42:43.01#ibcon#about to read 6, iclass 4, count 2 2006.229.07:42:43.01#ibcon#read 6, iclass 4, count 2 2006.229.07:42:43.01#ibcon#end of sib2, iclass 4, count 2 2006.229.07:42:43.01#ibcon#*mode == 0, iclass 4, count 2 2006.229.07:42:43.01#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.07:42:43.01#ibcon#[25=AT03-06\r\n] 2006.229.07:42:43.01#ibcon#*before write, iclass 4, count 2 2006.229.07:42:43.01#ibcon#enter sib2, iclass 4, count 2 2006.229.07:42:43.01#ibcon#flushed, iclass 4, count 2 2006.229.07:42:43.01#ibcon#about to write, iclass 4, count 2 2006.229.07:42:43.01#ibcon#wrote, iclass 4, count 2 2006.229.07:42:43.01#ibcon#about to read 3, iclass 4, count 2 2006.229.07:42:43.04#ibcon#read 3, iclass 4, count 2 2006.229.07:42:43.04#ibcon#about to read 4, iclass 4, count 2 2006.229.07:42:43.04#ibcon#read 4, iclass 4, count 2 2006.229.07:42:43.04#ibcon#about to read 5, iclass 4, count 2 2006.229.07:42:43.04#ibcon#read 5, iclass 4, count 2 2006.229.07:42:43.04#ibcon#about to read 6, iclass 4, count 2 2006.229.07:42:43.04#ibcon#read 6, iclass 4, count 2 2006.229.07:42:43.04#ibcon#end of sib2, iclass 4, count 2 2006.229.07:42:43.04#ibcon#*after write, iclass 4, count 2 2006.229.07:42:43.04#ibcon#*before return 0, iclass 4, count 2 2006.229.07:42:43.04#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:43.04#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:43.04#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.07:42:43.04#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:43.04#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:43.16#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:43.16#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:43.16#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:42:43.16#ibcon#first serial, iclass 4, count 0 2006.229.07:42:43.16#ibcon#enter sib2, iclass 4, count 0 2006.229.07:42:43.16#ibcon#flushed, iclass 4, count 0 2006.229.07:42:43.16#ibcon#about to write, iclass 4, count 0 2006.229.07:42:43.16#ibcon#wrote, iclass 4, count 0 2006.229.07:42:43.16#ibcon#about to read 3, iclass 4, count 0 2006.229.07:42:43.18#ibcon#read 3, iclass 4, count 0 2006.229.07:42:43.18#ibcon#about to read 4, iclass 4, count 0 2006.229.07:42:43.18#ibcon#read 4, iclass 4, count 0 2006.229.07:42:43.18#ibcon#about to read 5, iclass 4, count 0 2006.229.07:42:43.18#ibcon#read 5, iclass 4, count 0 2006.229.07:42:43.18#ibcon#about to read 6, iclass 4, count 0 2006.229.07:42:43.18#ibcon#read 6, iclass 4, count 0 2006.229.07:42:43.18#ibcon#end of sib2, iclass 4, count 0 2006.229.07:42:43.18#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:42:43.18#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:42:43.18#ibcon#[25=USB\r\n] 2006.229.07:42:43.18#ibcon#*before write, iclass 4, count 0 2006.229.07:42:43.18#ibcon#enter sib2, iclass 4, count 0 2006.229.07:42:43.18#ibcon#flushed, iclass 4, count 0 2006.229.07:42:43.18#ibcon#about to write, iclass 4, count 0 2006.229.07:42:43.18#ibcon#wrote, iclass 4, count 0 2006.229.07:42:43.18#ibcon#about to read 3, iclass 4, count 0 2006.229.07:42:43.21#ibcon#read 3, iclass 4, count 0 2006.229.07:42:43.21#ibcon#about to read 4, iclass 4, count 0 2006.229.07:42:43.21#ibcon#read 4, iclass 4, count 0 2006.229.07:42:43.21#ibcon#about to read 5, iclass 4, count 0 2006.229.07:42:43.21#ibcon#read 5, iclass 4, count 0 2006.229.07:42:43.21#ibcon#about to read 6, iclass 4, count 0 2006.229.07:42:43.21#ibcon#read 6, iclass 4, count 0 2006.229.07:42:43.21#ibcon#end of sib2, iclass 4, count 0 2006.229.07:42:43.21#ibcon#*after write, iclass 4, count 0 2006.229.07:42:43.21#ibcon#*before return 0, iclass 4, count 0 2006.229.07:42:43.21#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:43.21#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:43.21#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:42:43.21#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:42:43.21$vck44/valo=4,624.99 2006.229.07:42:43.21#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.07:42:43.21#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.07:42:43.21#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:43.21#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:43.21#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:43.21#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:43.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:42:43.21#ibcon#first serial, iclass 6, count 0 2006.229.07:42:43.21#ibcon#enter sib2, iclass 6, count 0 2006.229.07:42:43.21#ibcon#flushed, iclass 6, count 0 2006.229.07:42:43.21#ibcon#about to write, iclass 6, count 0 2006.229.07:42:43.21#ibcon#wrote, iclass 6, count 0 2006.229.07:42:43.21#ibcon#about to read 3, iclass 6, count 0 2006.229.07:42:43.23#ibcon#read 3, iclass 6, count 0 2006.229.07:42:43.23#ibcon#about to read 4, iclass 6, count 0 2006.229.07:42:43.23#ibcon#read 4, iclass 6, count 0 2006.229.07:42:43.23#ibcon#about to read 5, iclass 6, count 0 2006.229.07:42:43.23#ibcon#read 5, iclass 6, count 0 2006.229.07:42:43.23#ibcon#about to read 6, iclass 6, count 0 2006.229.07:42:43.23#ibcon#read 6, iclass 6, count 0 2006.229.07:42:43.23#ibcon#end of sib2, iclass 6, count 0 2006.229.07:42:43.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:42:43.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:42:43.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:42:43.23#ibcon#*before write, iclass 6, count 0 2006.229.07:42:43.23#ibcon#enter sib2, iclass 6, count 0 2006.229.07:42:43.23#ibcon#flushed, iclass 6, count 0 2006.229.07:42:43.23#ibcon#about to write, iclass 6, count 0 2006.229.07:42:43.23#ibcon#wrote, iclass 6, count 0 2006.229.07:42:43.23#ibcon#about to read 3, iclass 6, count 0 2006.229.07:42:43.27#ibcon#read 3, iclass 6, count 0 2006.229.07:42:43.27#ibcon#about to read 4, iclass 6, count 0 2006.229.07:42:43.27#ibcon#read 4, iclass 6, count 0 2006.229.07:42:43.27#ibcon#about to read 5, iclass 6, count 0 2006.229.07:42:43.27#ibcon#read 5, iclass 6, count 0 2006.229.07:42:43.27#ibcon#about to read 6, iclass 6, count 0 2006.229.07:42:43.27#ibcon#read 6, iclass 6, count 0 2006.229.07:42:43.27#ibcon#end of sib2, iclass 6, count 0 2006.229.07:42:43.27#ibcon#*after write, iclass 6, count 0 2006.229.07:42:43.27#ibcon#*before return 0, iclass 6, count 0 2006.229.07:42:43.27#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:43.27#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:43.27#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:42:43.27#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:42:43.27$vck44/va=4,7 2006.229.07:42:43.27#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.07:42:43.27#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.07:42:43.27#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:43.27#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:43.33#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:43.33#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:43.33#ibcon#enter wrdev, iclass 10, count 2 2006.229.07:42:43.33#ibcon#first serial, iclass 10, count 2 2006.229.07:42:43.33#ibcon#enter sib2, iclass 10, count 2 2006.229.07:42:43.33#ibcon#flushed, iclass 10, count 2 2006.229.07:42:43.33#ibcon#about to write, iclass 10, count 2 2006.229.07:42:43.33#ibcon#wrote, iclass 10, count 2 2006.229.07:42:43.33#ibcon#about to read 3, iclass 10, count 2 2006.229.07:42:43.35#ibcon#read 3, iclass 10, count 2 2006.229.07:42:43.35#ibcon#about to read 4, iclass 10, count 2 2006.229.07:42:43.35#ibcon#read 4, iclass 10, count 2 2006.229.07:42:43.35#ibcon#about to read 5, iclass 10, count 2 2006.229.07:42:43.35#ibcon#read 5, iclass 10, count 2 2006.229.07:42:43.35#ibcon#about to read 6, iclass 10, count 2 2006.229.07:42:43.35#ibcon#read 6, iclass 10, count 2 2006.229.07:42:43.35#ibcon#end of sib2, iclass 10, count 2 2006.229.07:42:43.35#ibcon#*mode == 0, iclass 10, count 2 2006.229.07:42:43.35#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.07:42:43.35#ibcon#[25=AT04-07\r\n] 2006.229.07:42:43.35#ibcon#*before write, iclass 10, count 2 2006.229.07:42:43.35#ibcon#enter sib2, iclass 10, count 2 2006.229.07:42:43.35#ibcon#flushed, iclass 10, count 2 2006.229.07:42:43.35#ibcon#about to write, iclass 10, count 2 2006.229.07:42:43.35#ibcon#wrote, iclass 10, count 2 2006.229.07:42:43.35#ibcon#about to read 3, iclass 10, count 2 2006.229.07:42:43.38#ibcon#read 3, iclass 10, count 2 2006.229.07:42:43.38#ibcon#about to read 4, iclass 10, count 2 2006.229.07:42:43.38#ibcon#read 4, iclass 10, count 2 2006.229.07:42:43.38#ibcon#about to read 5, iclass 10, count 2 2006.229.07:42:43.38#ibcon#read 5, iclass 10, count 2 2006.229.07:42:43.38#ibcon#about to read 6, iclass 10, count 2 2006.229.07:42:43.38#ibcon#read 6, iclass 10, count 2 2006.229.07:42:43.38#ibcon#end of sib2, iclass 10, count 2 2006.229.07:42:43.38#ibcon#*after write, iclass 10, count 2 2006.229.07:42:43.38#ibcon#*before return 0, iclass 10, count 2 2006.229.07:42:43.38#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:43.38#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:43.38#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.07:42:43.38#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:43.38#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:43.50#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:43.50#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:43.50#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:42:43.50#ibcon#first serial, iclass 10, count 0 2006.229.07:42:43.50#ibcon#enter sib2, iclass 10, count 0 2006.229.07:42:43.50#ibcon#flushed, iclass 10, count 0 2006.229.07:42:43.50#ibcon#about to write, iclass 10, count 0 2006.229.07:42:43.50#ibcon#wrote, iclass 10, count 0 2006.229.07:42:43.50#ibcon#about to read 3, iclass 10, count 0 2006.229.07:42:43.52#ibcon#read 3, iclass 10, count 0 2006.229.07:42:43.52#ibcon#about to read 4, iclass 10, count 0 2006.229.07:42:43.52#ibcon#read 4, iclass 10, count 0 2006.229.07:42:43.52#ibcon#about to read 5, iclass 10, count 0 2006.229.07:42:43.52#ibcon#read 5, iclass 10, count 0 2006.229.07:42:43.52#ibcon#about to read 6, iclass 10, count 0 2006.229.07:42:43.52#ibcon#read 6, iclass 10, count 0 2006.229.07:42:43.52#ibcon#end of sib2, iclass 10, count 0 2006.229.07:42:43.52#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:42:43.52#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:42:43.52#ibcon#[25=USB\r\n] 2006.229.07:42:43.52#ibcon#*before write, iclass 10, count 0 2006.229.07:42:43.52#ibcon#enter sib2, iclass 10, count 0 2006.229.07:42:43.52#ibcon#flushed, iclass 10, count 0 2006.229.07:42:43.52#ibcon#about to write, iclass 10, count 0 2006.229.07:42:43.52#ibcon#wrote, iclass 10, count 0 2006.229.07:42:43.52#ibcon#about to read 3, iclass 10, count 0 2006.229.07:42:43.55#ibcon#read 3, iclass 10, count 0 2006.229.07:42:43.55#ibcon#about to read 4, iclass 10, count 0 2006.229.07:42:43.55#ibcon#read 4, iclass 10, count 0 2006.229.07:42:43.55#ibcon#about to read 5, iclass 10, count 0 2006.229.07:42:43.55#ibcon#read 5, iclass 10, count 0 2006.229.07:42:43.55#ibcon#about to read 6, iclass 10, count 0 2006.229.07:42:43.55#ibcon#read 6, iclass 10, count 0 2006.229.07:42:43.55#ibcon#end of sib2, iclass 10, count 0 2006.229.07:42:43.55#ibcon#*after write, iclass 10, count 0 2006.229.07:42:43.55#ibcon#*before return 0, iclass 10, count 0 2006.229.07:42:43.55#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:43.55#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:43.55#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:42:43.55#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:42:43.55$vck44/valo=5,734.99 2006.229.07:42:43.55#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.07:42:43.55#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.07:42:43.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:43.55#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:42:43.55#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:42:43.55#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:42:43.55#ibcon#enter wrdev, iclass 13, count 0 2006.229.07:42:43.55#ibcon#first serial, iclass 13, count 0 2006.229.07:42:43.55#ibcon#enter sib2, iclass 13, count 0 2006.229.07:42:43.55#ibcon#flushed, iclass 13, count 0 2006.229.07:42:43.55#ibcon#about to write, iclass 13, count 0 2006.229.07:42:43.55#ibcon#wrote, iclass 13, count 0 2006.229.07:42:43.55#ibcon#about to read 3, iclass 13, count 0 2006.229.07:42:43.57#ibcon#read 3, iclass 13, count 0 2006.229.07:42:43.57#ibcon#about to read 4, iclass 13, count 0 2006.229.07:42:43.57#ibcon#read 4, iclass 13, count 0 2006.229.07:42:43.57#ibcon#about to read 5, iclass 13, count 0 2006.229.07:42:43.57#ibcon#read 5, iclass 13, count 0 2006.229.07:42:43.57#ibcon#about to read 6, iclass 13, count 0 2006.229.07:42:43.57#ibcon#read 6, iclass 13, count 0 2006.229.07:42:43.57#ibcon#end of sib2, iclass 13, count 0 2006.229.07:42:43.57#ibcon#*mode == 0, iclass 13, count 0 2006.229.07:42:43.57#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.07:42:43.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:42:43.57#ibcon#*before write, iclass 13, count 0 2006.229.07:42:43.57#ibcon#enter sib2, iclass 13, count 0 2006.229.07:42:43.57#ibcon#flushed, iclass 13, count 0 2006.229.07:42:43.57#ibcon#about to write, iclass 13, count 0 2006.229.07:42:43.57#ibcon#wrote, iclass 13, count 0 2006.229.07:42:43.57#ibcon#about to read 3, iclass 13, count 0 2006.229.07:42:43.59#abcon#<5=/06 2.8 4.9 29.96 931000.4\r\n> 2006.229.07:42:43.61#abcon#{5=INTERFACE CLEAR} 2006.229.07:42:43.61#ibcon#read 3, iclass 13, count 0 2006.229.07:42:43.61#ibcon#about to read 4, iclass 13, count 0 2006.229.07:42:43.61#ibcon#read 4, iclass 13, count 0 2006.229.07:42:43.61#ibcon#about to read 5, iclass 13, count 0 2006.229.07:42:43.61#ibcon#read 5, iclass 13, count 0 2006.229.07:42:43.61#ibcon#about to read 6, iclass 13, count 0 2006.229.07:42:43.61#ibcon#read 6, iclass 13, count 0 2006.229.07:42:43.61#ibcon#end of sib2, iclass 13, count 0 2006.229.07:42:43.61#ibcon#*after write, iclass 13, count 0 2006.229.07:42:43.61#ibcon#*before return 0, iclass 13, count 0 2006.229.07:42:43.61#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:42:43.61#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.07:42:43.61#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.07:42:43.61#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.07:42:43.61$vck44/va=5,4 2006.229.07:42:43.61#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.07:42:43.61#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.07:42:43.61#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:43.61#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:42:43.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:42:43.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:42:43.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:42:43.67#ibcon#enter wrdev, iclass 17, count 2 2006.229.07:42:43.67#ibcon#first serial, iclass 17, count 2 2006.229.07:42:43.67#ibcon#enter sib2, iclass 17, count 2 2006.229.07:42:43.67#ibcon#flushed, iclass 17, count 2 2006.229.07:42:43.67#ibcon#about to write, iclass 17, count 2 2006.229.07:42:43.67#ibcon#wrote, iclass 17, count 2 2006.229.07:42:43.67#ibcon#about to read 3, iclass 17, count 2 2006.229.07:42:43.69#ibcon#read 3, iclass 17, count 2 2006.229.07:42:43.69#ibcon#about to read 4, iclass 17, count 2 2006.229.07:42:43.69#ibcon#read 4, iclass 17, count 2 2006.229.07:42:43.69#ibcon#about to read 5, iclass 17, count 2 2006.229.07:42:43.69#ibcon#read 5, iclass 17, count 2 2006.229.07:42:43.69#ibcon#about to read 6, iclass 17, count 2 2006.229.07:42:43.69#ibcon#read 6, iclass 17, count 2 2006.229.07:42:43.69#ibcon#end of sib2, iclass 17, count 2 2006.229.07:42:43.69#ibcon#*mode == 0, iclass 17, count 2 2006.229.07:42:43.69#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.07:42:43.69#ibcon#[25=AT05-04\r\n] 2006.229.07:42:43.69#ibcon#*before write, iclass 17, count 2 2006.229.07:42:43.69#ibcon#enter sib2, iclass 17, count 2 2006.229.07:42:43.69#ibcon#flushed, iclass 17, count 2 2006.229.07:42:43.69#ibcon#about to write, iclass 17, count 2 2006.229.07:42:43.69#ibcon#wrote, iclass 17, count 2 2006.229.07:42:43.69#ibcon#about to read 3, iclass 17, count 2 2006.229.07:42:43.72#ibcon#read 3, iclass 17, count 2 2006.229.07:42:43.72#ibcon#about to read 4, iclass 17, count 2 2006.229.07:42:43.72#ibcon#read 4, iclass 17, count 2 2006.229.07:42:43.72#ibcon#about to read 5, iclass 17, count 2 2006.229.07:42:43.72#ibcon#read 5, iclass 17, count 2 2006.229.07:42:43.72#ibcon#about to read 6, iclass 17, count 2 2006.229.07:42:43.72#ibcon#read 6, iclass 17, count 2 2006.229.07:42:43.72#ibcon#end of sib2, iclass 17, count 2 2006.229.07:42:43.72#ibcon#*after write, iclass 17, count 2 2006.229.07:42:43.72#ibcon#*before return 0, iclass 17, count 2 2006.229.07:42:43.72#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:42:43.72#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.07:42:43.72#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.07:42:43.72#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:43.72#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:42:43.84#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:42:43.84#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:42:43.84#ibcon#enter wrdev, iclass 17, count 0 2006.229.07:42:43.84#ibcon#first serial, iclass 17, count 0 2006.229.07:42:43.84#ibcon#enter sib2, iclass 17, count 0 2006.229.07:42:43.84#ibcon#flushed, iclass 17, count 0 2006.229.07:42:43.84#ibcon#about to write, iclass 17, count 0 2006.229.07:42:43.84#ibcon#wrote, iclass 17, count 0 2006.229.07:42:43.84#ibcon#about to read 3, iclass 17, count 0 2006.229.07:42:43.86#ibcon#read 3, iclass 17, count 0 2006.229.07:42:43.86#ibcon#about to read 4, iclass 17, count 0 2006.229.07:42:43.86#ibcon#read 4, iclass 17, count 0 2006.229.07:42:43.86#ibcon#about to read 5, iclass 17, count 0 2006.229.07:42:43.86#ibcon#read 5, iclass 17, count 0 2006.229.07:42:43.86#ibcon#about to read 6, iclass 17, count 0 2006.229.07:42:43.86#ibcon#read 6, iclass 17, count 0 2006.229.07:42:43.86#ibcon#end of sib2, iclass 17, count 0 2006.229.07:42:43.86#ibcon#*mode == 0, iclass 17, count 0 2006.229.07:42:43.86#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.07:42:43.86#ibcon#[25=USB\r\n] 2006.229.07:42:43.86#ibcon#*before write, iclass 17, count 0 2006.229.07:42:43.86#ibcon#enter sib2, iclass 17, count 0 2006.229.07:42:43.86#ibcon#flushed, iclass 17, count 0 2006.229.07:42:43.86#ibcon#about to write, iclass 17, count 0 2006.229.07:42:43.86#ibcon#wrote, iclass 17, count 0 2006.229.07:42:43.86#ibcon#about to read 3, iclass 17, count 0 2006.229.07:42:43.89#ibcon#read 3, iclass 17, count 0 2006.229.07:42:43.89#ibcon#about to read 4, iclass 17, count 0 2006.229.07:42:43.89#ibcon#read 4, iclass 17, count 0 2006.229.07:42:43.89#ibcon#about to read 5, iclass 17, count 0 2006.229.07:42:43.89#ibcon#read 5, iclass 17, count 0 2006.229.07:42:43.89#ibcon#about to read 6, iclass 17, count 0 2006.229.07:42:43.89#ibcon#read 6, iclass 17, count 0 2006.229.07:42:43.89#ibcon#end of sib2, iclass 17, count 0 2006.229.07:42:43.89#ibcon#*after write, iclass 17, count 0 2006.229.07:42:43.89#ibcon#*before return 0, iclass 17, count 0 2006.229.07:42:43.89#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:42:43.89#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.07:42:43.89#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.07:42:43.89#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.07:42:43.89$vck44/valo=6,814.99 2006.229.07:42:43.89#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:42:43.89#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:42:43.89#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:43.89#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:43.89#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:43.89#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:43.89#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:42:43.89#ibcon#first serial, iclass 20, count 0 2006.229.07:42:43.89#ibcon#enter sib2, iclass 20, count 0 2006.229.07:42:43.89#ibcon#flushed, iclass 20, count 0 2006.229.07:42:43.89#ibcon#about to write, iclass 20, count 0 2006.229.07:42:43.89#ibcon#wrote, iclass 20, count 0 2006.229.07:42:43.89#ibcon#about to read 3, iclass 20, count 0 2006.229.07:42:43.91#ibcon#read 3, iclass 20, count 0 2006.229.07:42:43.91#ibcon#about to read 4, iclass 20, count 0 2006.229.07:42:43.91#ibcon#read 4, iclass 20, count 0 2006.229.07:42:43.91#ibcon#about to read 5, iclass 20, count 0 2006.229.07:42:43.91#ibcon#read 5, iclass 20, count 0 2006.229.07:42:43.91#ibcon#about to read 6, iclass 20, count 0 2006.229.07:42:43.91#ibcon#read 6, iclass 20, count 0 2006.229.07:42:43.91#ibcon#end of sib2, iclass 20, count 0 2006.229.07:42:43.91#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:42:43.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:42:43.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:42:43.91#ibcon#*before write, iclass 20, count 0 2006.229.07:42:43.91#ibcon#enter sib2, iclass 20, count 0 2006.229.07:42:43.91#ibcon#flushed, iclass 20, count 0 2006.229.07:42:43.91#ibcon#about to write, iclass 20, count 0 2006.229.07:42:43.91#ibcon#wrote, iclass 20, count 0 2006.229.07:42:43.91#ibcon#about to read 3, iclass 20, count 0 2006.229.07:42:43.95#ibcon#read 3, iclass 20, count 0 2006.229.07:42:43.95#ibcon#about to read 4, iclass 20, count 0 2006.229.07:42:43.95#ibcon#read 4, iclass 20, count 0 2006.229.07:42:43.95#ibcon#about to read 5, iclass 20, count 0 2006.229.07:42:43.95#ibcon#read 5, iclass 20, count 0 2006.229.07:42:43.95#ibcon#about to read 6, iclass 20, count 0 2006.229.07:42:43.95#ibcon#read 6, iclass 20, count 0 2006.229.07:42:43.95#ibcon#end of sib2, iclass 20, count 0 2006.229.07:42:43.95#ibcon#*after write, iclass 20, count 0 2006.229.07:42:43.95#ibcon#*before return 0, iclass 20, count 0 2006.229.07:42:43.95#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:43.95#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:43.95#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:42:43.95#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:42:43.95$vck44/va=6,4 2006.229.07:42:43.95#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.07:42:43.95#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.07:42:43.95#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:43.95#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:44.01#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:44.01#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:44.01#ibcon#enter wrdev, iclass 22, count 2 2006.229.07:42:44.01#ibcon#first serial, iclass 22, count 2 2006.229.07:42:44.01#ibcon#enter sib2, iclass 22, count 2 2006.229.07:42:44.01#ibcon#flushed, iclass 22, count 2 2006.229.07:42:44.01#ibcon#about to write, iclass 22, count 2 2006.229.07:42:44.01#ibcon#wrote, iclass 22, count 2 2006.229.07:42:44.01#ibcon#about to read 3, iclass 22, count 2 2006.229.07:42:44.03#ibcon#read 3, iclass 22, count 2 2006.229.07:42:44.03#ibcon#about to read 4, iclass 22, count 2 2006.229.07:42:44.03#ibcon#read 4, iclass 22, count 2 2006.229.07:42:44.03#ibcon#about to read 5, iclass 22, count 2 2006.229.07:42:44.03#ibcon#read 5, iclass 22, count 2 2006.229.07:42:44.03#ibcon#about to read 6, iclass 22, count 2 2006.229.07:42:44.03#ibcon#read 6, iclass 22, count 2 2006.229.07:42:44.03#ibcon#end of sib2, iclass 22, count 2 2006.229.07:42:44.03#ibcon#*mode == 0, iclass 22, count 2 2006.229.07:42:44.03#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.07:42:44.03#ibcon#[25=AT06-04\r\n] 2006.229.07:42:44.03#ibcon#*before write, iclass 22, count 2 2006.229.07:42:44.03#ibcon#enter sib2, iclass 22, count 2 2006.229.07:42:44.03#ibcon#flushed, iclass 22, count 2 2006.229.07:42:44.03#ibcon#about to write, iclass 22, count 2 2006.229.07:42:44.03#ibcon#wrote, iclass 22, count 2 2006.229.07:42:44.03#ibcon#about to read 3, iclass 22, count 2 2006.229.07:42:44.06#ibcon#read 3, iclass 22, count 2 2006.229.07:42:44.06#ibcon#about to read 4, iclass 22, count 2 2006.229.07:42:44.06#ibcon#read 4, iclass 22, count 2 2006.229.07:42:44.06#ibcon#about to read 5, iclass 22, count 2 2006.229.07:42:44.06#ibcon#read 5, iclass 22, count 2 2006.229.07:42:44.06#ibcon#about to read 6, iclass 22, count 2 2006.229.07:42:44.06#ibcon#read 6, iclass 22, count 2 2006.229.07:42:44.06#ibcon#end of sib2, iclass 22, count 2 2006.229.07:42:44.06#ibcon#*after write, iclass 22, count 2 2006.229.07:42:44.06#ibcon#*before return 0, iclass 22, count 2 2006.229.07:42:44.06#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:44.06#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:44.06#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.07:42:44.06#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:44.06#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:44.18#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:44.18#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:44.18#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:42:44.18#ibcon#first serial, iclass 22, count 0 2006.229.07:42:44.18#ibcon#enter sib2, iclass 22, count 0 2006.229.07:42:44.18#ibcon#flushed, iclass 22, count 0 2006.229.07:42:44.18#ibcon#about to write, iclass 22, count 0 2006.229.07:42:44.18#ibcon#wrote, iclass 22, count 0 2006.229.07:42:44.18#ibcon#about to read 3, iclass 22, count 0 2006.229.07:42:44.20#ibcon#read 3, iclass 22, count 0 2006.229.07:42:44.20#ibcon#about to read 4, iclass 22, count 0 2006.229.07:42:44.20#ibcon#read 4, iclass 22, count 0 2006.229.07:42:44.20#ibcon#about to read 5, iclass 22, count 0 2006.229.07:42:44.20#ibcon#read 5, iclass 22, count 0 2006.229.07:42:44.20#ibcon#about to read 6, iclass 22, count 0 2006.229.07:42:44.20#ibcon#read 6, iclass 22, count 0 2006.229.07:42:44.20#ibcon#end of sib2, iclass 22, count 0 2006.229.07:42:44.20#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:42:44.20#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:42:44.20#ibcon#[25=USB\r\n] 2006.229.07:42:44.20#ibcon#*before write, iclass 22, count 0 2006.229.07:42:44.20#ibcon#enter sib2, iclass 22, count 0 2006.229.07:42:44.20#ibcon#flushed, iclass 22, count 0 2006.229.07:42:44.20#ibcon#about to write, iclass 22, count 0 2006.229.07:42:44.20#ibcon#wrote, iclass 22, count 0 2006.229.07:42:44.20#ibcon#about to read 3, iclass 22, count 0 2006.229.07:42:44.23#ibcon#read 3, iclass 22, count 0 2006.229.07:42:44.23#ibcon#about to read 4, iclass 22, count 0 2006.229.07:42:44.23#ibcon#read 4, iclass 22, count 0 2006.229.07:42:44.23#ibcon#about to read 5, iclass 22, count 0 2006.229.07:42:44.23#ibcon#read 5, iclass 22, count 0 2006.229.07:42:44.23#ibcon#about to read 6, iclass 22, count 0 2006.229.07:42:44.23#ibcon#read 6, iclass 22, count 0 2006.229.07:42:44.23#ibcon#end of sib2, iclass 22, count 0 2006.229.07:42:44.23#ibcon#*after write, iclass 22, count 0 2006.229.07:42:44.23#ibcon#*before return 0, iclass 22, count 0 2006.229.07:42:44.23#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:44.23#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:44.23#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:42:44.23#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:42:44.23$vck44/valo=7,864.99 2006.229.07:42:44.23#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.07:42:44.23#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.07:42:44.23#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:44.23#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:44.23#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:44.23#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:44.23#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:42:44.23#ibcon#first serial, iclass 24, count 0 2006.229.07:42:44.23#ibcon#enter sib2, iclass 24, count 0 2006.229.07:42:44.23#ibcon#flushed, iclass 24, count 0 2006.229.07:42:44.23#ibcon#about to write, iclass 24, count 0 2006.229.07:42:44.23#ibcon#wrote, iclass 24, count 0 2006.229.07:42:44.23#ibcon#about to read 3, iclass 24, count 0 2006.229.07:42:44.25#ibcon#read 3, iclass 24, count 0 2006.229.07:42:44.25#ibcon#about to read 4, iclass 24, count 0 2006.229.07:42:44.25#ibcon#read 4, iclass 24, count 0 2006.229.07:42:44.25#ibcon#about to read 5, iclass 24, count 0 2006.229.07:42:44.25#ibcon#read 5, iclass 24, count 0 2006.229.07:42:44.25#ibcon#about to read 6, iclass 24, count 0 2006.229.07:42:44.25#ibcon#read 6, iclass 24, count 0 2006.229.07:42:44.25#ibcon#end of sib2, iclass 24, count 0 2006.229.07:42:44.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:42:44.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:42:44.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:42:44.25#ibcon#*before write, iclass 24, count 0 2006.229.07:42:44.25#ibcon#enter sib2, iclass 24, count 0 2006.229.07:42:44.25#ibcon#flushed, iclass 24, count 0 2006.229.07:42:44.25#ibcon#about to write, iclass 24, count 0 2006.229.07:42:44.25#ibcon#wrote, iclass 24, count 0 2006.229.07:42:44.25#ibcon#about to read 3, iclass 24, count 0 2006.229.07:42:44.29#ibcon#read 3, iclass 24, count 0 2006.229.07:42:44.29#ibcon#about to read 4, iclass 24, count 0 2006.229.07:42:44.29#ibcon#read 4, iclass 24, count 0 2006.229.07:42:44.29#ibcon#about to read 5, iclass 24, count 0 2006.229.07:42:44.29#ibcon#read 5, iclass 24, count 0 2006.229.07:42:44.29#ibcon#about to read 6, iclass 24, count 0 2006.229.07:42:44.29#ibcon#read 6, iclass 24, count 0 2006.229.07:42:44.29#ibcon#end of sib2, iclass 24, count 0 2006.229.07:42:44.29#ibcon#*after write, iclass 24, count 0 2006.229.07:42:44.29#ibcon#*before return 0, iclass 24, count 0 2006.229.07:42:44.29#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:44.29#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:44.29#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:42:44.29#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:42:44.29$vck44/va=7,5 2006.229.07:42:44.29#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.07:42:44.29#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.07:42:44.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:44.29#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:44.35#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:44.35#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:44.35#ibcon#enter wrdev, iclass 26, count 2 2006.229.07:42:44.35#ibcon#first serial, iclass 26, count 2 2006.229.07:42:44.35#ibcon#enter sib2, iclass 26, count 2 2006.229.07:42:44.35#ibcon#flushed, iclass 26, count 2 2006.229.07:42:44.35#ibcon#about to write, iclass 26, count 2 2006.229.07:42:44.35#ibcon#wrote, iclass 26, count 2 2006.229.07:42:44.35#ibcon#about to read 3, iclass 26, count 2 2006.229.07:42:44.37#ibcon#read 3, iclass 26, count 2 2006.229.07:42:44.37#ibcon#about to read 4, iclass 26, count 2 2006.229.07:42:44.37#ibcon#read 4, iclass 26, count 2 2006.229.07:42:44.37#ibcon#about to read 5, iclass 26, count 2 2006.229.07:42:44.37#ibcon#read 5, iclass 26, count 2 2006.229.07:42:44.37#ibcon#about to read 6, iclass 26, count 2 2006.229.07:42:44.37#ibcon#read 6, iclass 26, count 2 2006.229.07:42:44.37#ibcon#end of sib2, iclass 26, count 2 2006.229.07:42:44.37#ibcon#*mode == 0, iclass 26, count 2 2006.229.07:42:44.37#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.07:42:44.37#ibcon#[25=AT07-05\r\n] 2006.229.07:42:44.37#ibcon#*before write, iclass 26, count 2 2006.229.07:42:44.37#ibcon#enter sib2, iclass 26, count 2 2006.229.07:42:44.37#ibcon#flushed, iclass 26, count 2 2006.229.07:42:44.37#ibcon#about to write, iclass 26, count 2 2006.229.07:42:44.37#ibcon#wrote, iclass 26, count 2 2006.229.07:42:44.37#ibcon#about to read 3, iclass 26, count 2 2006.229.07:42:44.40#ibcon#read 3, iclass 26, count 2 2006.229.07:42:44.40#ibcon#about to read 4, iclass 26, count 2 2006.229.07:42:44.40#ibcon#read 4, iclass 26, count 2 2006.229.07:42:44.40#ibcon#about to read 5, iclass 26, count 2 2006.229.07:42:44.40#ibcon#read 5, iclass 26, count 2 2006.229.07:42:44.40#ibcon#about to read 6, iclass 26, count 2 2006.229.07:42:44.40#ibcon#read 6, iclass 26, count 2 2006.229.07:42:44.40#ibcon#end of sib2, iclass 26, count 2 2006.229.07:42:44.40#ibcon#*after write, iclass 26, count 2 2006.229.07:42:44.40#ibcon#*before return 0, iclass 26, count 2 2006.229.07:42:44.40#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:44.40#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:44.40#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.07:42:44.40#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:44.40#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:44.52#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:44.52#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:44.52#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:42:44.52#ibcon#first serial, iclass 26, count 0 2006.229.07:42:44.52#ibcon#enter sib2, iclass 26, count 0 2006.229.07:42:44.52#ibcon#flushed, iclass 26, count 0 2006.229.07:42:44.52#ibcon#about to write, iclass 26, count 0 2006.229.07:42:44.52#ibcon#wrote, iclass 26, count 0 2006.229.07:42:44.52#ibcon#about to read 3, iclass 26, count 0 2006.229.07:42:44.54#ibcon#read 3, iclass 26, count 0 2006.229.07:42:44.54#ibcon#about to read 4, iclass 26, count 0 2006.229.07:42:44.54#ibcon#read 4, iclass 26, count 0 2006.229.07:42:44.54#ibcon#about to read 5, iclass 26, count 0 2006.229.07:42:44.54#ibcon#read 5, iclass 26, count 0 2006.229.07:42:44.54#ibcon#about to read 6, iclass 26, count 0 2006.229.07:42:44.54#ibcon#read 6, iclass 26, count 0 2006.229.07:42:44.54#ibcon#end of sib2, iclass 26, count 0 2006.229.07:42:44.54#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:42:44.54#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:42:44.54#ibcon#[25=USB\r\n] 2006.229.07:42:44.54#ibcon#*before write, iclass 26, count 0 2006.229.07:42:44.54#ibcon#enter sib2, iclass 26, count 0 2006.229.07:42:44.54#ibcon#flushed, iclass 26, count 0 2006.229.07:42:44.54#ibcon#about to write, iclass 26, count 0 2006.229.07:42:44.54#ibcon#wrote, iclass 26, count 0 2006.229.07:42:44.54#ibcon#about to read 3, iclass 26, count 0 2006.229.07:42:44.57#ibcon#read 3, iclass 26, count 0 2006.229.07:42:44.57#ibcon#about to read 4, iclass 26, count 0 2006.229.07:42:44.57#ibcon#read 4, iclass 26, count 0 2006.229.07:42:44.57#ibcon#about to read 5, iclass 26, count 0 2006.229.07:42:44.57#ibcon#read 5, iclass 26, count 0 2006.229.07:42:44.57#ibcon#about to read 6, iclass 26, count 0 2006.229.07:42:44.57#ibcon#read 6, iclass 26, count 0 2006.229.07:42:44.57#ibcon#end of sib2, iclass 26, count 0 2006.229.07:42:44.57#ibcon#*after write, iclass 26, count 0 2006.229.07:42:44.57#ibcon#*before return 0, iclass 26, count 0 2006.229.07:42:44.57#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:44.57#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:44.57#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:42:44.57#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:42:44.57$vck44/valo=8,884.99 2006.229.07:42:44.57#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.07:42:44.57#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.07:42:44.57#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:44.57#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:44.57#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:44.57#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:44.57#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:42:44.57#ibcon#first serial, iclass 28, count 0 2006.229.07:42:44.57#ibcon#enter sib2, iclass 28, count 0 2006.229.07:42:44.57#ibcon#flushed, iclass 28, count 0 2006.229.07:42:44.57#ibcon#about to write, iclass 28, count 0 2006.229.07:42:44.57#ibcon#wrote, iclass 28, count 0 2006.229.07:42:44.57#ibcon#about to read 3, iclass 28, count 0 2006.229.07:42:44.59#ibcon#read 3, iclass 28, count 0 2006.229.07:42:44.59#ibcon#about to read 4, iclass 28, count 0 2006.229.07:42:44.59#ibcon#read 4, iclass 28, count 0 2006.229.07:42:44.59#ibcon#about to read 5, iclass 28, count 0 2006.229.07:42:44.59#ibcon#read 5, iclass 28, count 0 2006.229.07:42:44.59#ibcon#about to read 6, iclass 28, count 0 2006.229.07:42:44.59#ibcon#read 6, iclass 28, count 0 2006.229.07:42:44.59#ibcon#end of sib2, iclass 28, count 0 2006.229.07:42:44.59#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:42:44.59#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:42:44.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:42:44.59#ibcon#*before write, iclass 28, count 0 2006.229.07:42:44.59#ibcon#enter sib2, iclass 28, count 0 2006.229.07:42:44.59#ibcon#flushed, iclass 28, count 0 2006.229.07:42:44.59#ibcon#about to write, iclass 28, count 0 2006.229.07:42:44.59#ibcon#wrote, iclass 28, count 0 2006.229.07:42:44.59#ibcon#about to read 3, iclass 28, count 0 2006.229.07:42:44.63#ibcon#read 3, iclass 28, count 0 2006.229.07:42:44.63#ibcon#about to read 4, iclass 28, count 0 2006.229.07:42:44.63#ibcon#read 4, iclass 28, count 0 2006.229.07:42:44.63#ibcon#about to read 5, iclass 28, count 0 2006.229.07:42:44.63#ibcon#read 5, iclass 28, count 0 2006.229.07:42:44.63#ibcon#about to read 6, iclass 28, count 0 2006.229.07:42:44.63#ibcon#read 6, iclass 28, count 0 2006.229.07:42:44.63#ibcon#end of sib2, iclass 28, count 0 2006.229.07:42:44.63#ibcon#*after write, iclass 28, count 0 2006.229.07:42:44.63#ibcon#*before return 0, iclass 28, count 0 2006.229.07:42:44.63#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:44.63#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:44.63#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:42:44.63#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:42:44.63$vck44/va=8,6 2006.229.07:42:44.63#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.07:42:44.63#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.07:42:44.63#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:44.63#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:42:44.69#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:42:44.69#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:42:44.69#ibcon#enter wrdev, iclass 30, count 2 2006.229.07:42:44.69#ibcon#first serial, iclass 30, count 2 2006.229.07:42:44.69#ibcon#enter sib2, iclass 30, count 2 2006.229.07:42:44.69#ibcon#flushed, iclass 30, count 2 2006.229.07:42:44.69#ibcon#about to write, iclass 30, count 2 2006.229.07:42:44.69#ibcon#wrote, iclass 30, count 2 2006.229.07:42:44.69#ibcon#about to read 3, iclass 30, count 2 2006.229.07:42:44.71#ibcon#read 3, iclass 30, count 2 2006.229.07:42:44.71#ibcon#about to read 4, iclass 30, count 2 2006.229.07:42:44.71#ibcon#read 4, iclass 30, count 2 2006.229.07:42:44.71#ibcon#about to read 5, iclass 30, count 2 2006.229.07:42:44.71#ibcon#read 5, iclass 30, count 2 2006.229.07:42:44.71#ibcon#about to read 6, iclass 30, count 2 2006.229.07:42:44.71#ibcon#read 6, iclass 30, count 2 2006.229.07:42:44.71#ibcon#end of sib2, iclass 30, count 2 2006.229.07:42:44.71#ibcon#*mode == 0, iclass 30, count 2 2006.229.07:42:44.71#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.07:42:44.71#ibcon#[25=AT08-06\r\n] 2006.229.07:42:44.71#ibcon#*before write, iclass 30, count 2 2006.229.07:42:44.71#ibcon#enter sib2, iclass 30, count 2 2006.229.07:42:44.71#ibcon#flushed, iclass 30, count 2 2006.229.07:42:44.71#ibcon#about to write, iclass 30, count 2 2006.229.07:42:44.71#ibcon#wrote, iclass 30, count 2 2006.229.07:42:44.71#ibcon#about to read 3, iclass 30, count 2 2006.229.07:42:44.74#ibcon#read 3, iclass 30, count 2 2006.229.07:42:44.74#ibcon#about to read 4, iclass 30, count 2 2006.229.07:42:44.74#ibcon#read 4, iclass 30, count 2 2006.229.07:42:44.74#ibcon#about to read 5, iclass 30, count 2 2006.229.07:42:44.74#ibcon#read 5, iclass 30, count 2 2006.229.07:42:44.74#ibcon#about to read 6, iclass 30, count 2 2006.229.07:42:44.74#ibcon#read 6, iclass 30, count 2 2006.229.07:42:44.74#ibcon#end of sib2, iclass 30, count 2 2006.229.07:42:44.74#ibcon#*after write, iclass 30, count 2 2006.229.07:42:44.74#ibcon#*before return 0, iclass 30, count 2 2006.229.07:42:44.74#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:42:44.74#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:42:44.74#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.07:42:44.74#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:44.74#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:42:44.86#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:42:44.86#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:42:44.86#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:42:44.86#ibcon#first serial, iclass 30, count 0 2006.229.07:42:44.86#ibcon#enter sib2, iclass 30, count 0 2006.229.07:42:44.86#ibcon#flushed, iclass 30, count 0 2006.229.07:42:44.86#ibcon#about to write, iclass 30, count 0 2006.229.07:42:44.86#ibcon#wrote, iclass 30, count 0 2006.229.07:42:44.86#ibcon#about to read 3, iclass 30, count 0 2006.229.07:42:44.88#ibcon#read 3, iclass 30, count 0 2006.229.07:42:44.88#ibcon#about to read 4, iclass 30, count 0 2006.229.07:42:44.88#ibcon#read 4, iclass 30, count 0 2006.229.07:42:44.88#ibcon#about to read 5, iclass 30, count 0 2006.229.07:42:44.88#ibcon#read 5, iclass 30, count 0 2006.229.07:42:44.88#ibcon#about to read 6, iclass 30, count 0 2006.229.07:42:44.88#ibcon#read 6, iclass 30, count 0 2006.229.07:42:44.88#ibcon#end of sib2, iclass 30, count 0 2006.229.07:42:44.88#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:42:44.88#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:42:44.88#ibcon#[25=USB\r\n] 2006.229.07:42:44.88#ibcon#*before write, iclass 30, count 0 2006.229.07:42:44.88#ibcon#enter sib2, iclass 30, count 0 2006.229.07:42:44.88#ibcon#flushed, iclass 30, count 0 2006.229.07:42:44.88#ibcon#about to write, iclass 30, count 0 2006.229.07:42:44.88#ibcon#wrote, iclass 30, count 0 2006.229.07:42:44.88#ibcon#about to read 3, iclass 30, count 0 2006.229.07:42:44.91#ibcon#read 3, iclass 30, count 0 2006.229.07:42:44.91#ibcon#about to read 4, iclass 30, count 0 2006.229.07:42:44.91#ibcon#read 4, iclass 30, count 0 2006.229.07:42:44.91#ibcon#about to read 5, iclass 30, count 0 2006.229.07:42:44.91#ibcon#read 5, iclass 30, count 0 2006.229.07:42:44.91#ibcon#about to read 6, iclass 30, count 0 2006.229.07:42:44.91#ibcon#read 6, iclass 30, count 0 2006.229.07:42:44.91#ibcon#end of sib2, iclass 30, count 0 2006.229.07:42:44.91#ibcon#*after write, iclass 30, count 0 2006.229.07:42:44.91#ibcon#*before return 0, iclass 30, count 0 2006.229.07:42:44.91#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:42:44.91#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:42:44.91#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:42:44.91#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:42:44.91$vck44/vblo=1,629.99 2006.229.07:42:44.91#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:42:44.91#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:42:44.91#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:44.91#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:44.91#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:44.91#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:44.91#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:42:44.91#ibcon#first serial, iclass 32, count 0 2006.229.07:42:44.91#ibcon#enter sib2, iclass 32, count 0 2006.229.07:42:44.91#ibcon#flushed, iclass 32, count 0 2006.229.07:42:44.91#ibcon#about to write, iclass 32, count 0 2006.229.07:42:44.91#ibcon#wrote, iclass 32, count 0 2006.229.07:42:44.91#ibcon#about to read 3, iclass 32, count 0 2006.229.07:42:44.93#ibcon#read 3, iclass 32, count 0 2006.229.07:42:44.93#ibcon#about to read 4, iclass 32, count 0 2006.229.07:42:44.93#ibcon#read 4, iclass 32, count 0 2006.229.07:42:44.93#ibcon#about to read 5, iclass 32, count 0 2006.229.07:42:44.93#ibcon#read 5, iclass 32, count 0 2006.229.07:42:44.93#ibcon#about to read 6, iclass 32, count 0 2006.229.07:42:44.93#ibcon#read 6, iclass 32, count 0 2006.229.07:42:44.93#ibcon#end of sib2, iclass 32, count 0 2006.229.07:42:44.93#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:42:44.93#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:42:44.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:42:44.93#ibcon#*before write, iclass 32, count 0 2006.229.07:42:44.93#ibcon#enter sib2, iclass 32, count 0 2006.229.07:42:44.93#ibcon#flushed, iclass 32, count 0 2006.229.07:42:44.93#ibcon#about to write, iclass 32, count 0 2006.229.07:42:44.93#ibcon#wrote, iclass 32, count 0 2006.229.07:42:44.93#ibcon#about to read 3, iclass 32, count 0 2006.229.07:42:44.97#ibcon#read 3, iclass 32, count 0 2006.229.07:42:44.97#ibcon#about to read 4, iclass 32, count 0 2006.229.07:42:44.97#ibcon#read 4, iclass 32, count 0 2006.229.07:42:44.97#ibcon#about to read 5, iclass 32, count 0 2006.229.07:42:44.97#ibcon#read 5, iclass 32, count 0 2006.229.07:42:44.97#ibcon#about to read 6, iclass 32, count 0 2006.229.07:42:44.97#ibcon#read 6, iclass 32, count 0 2006.229.07:42:44.97#ibcon#end of sib2, iclass 32, count 0 2006.229.07:42:44.97#ibcon#*after write, iclass 32, count 0 2006.229.07:42:44.97#ibcon#*before return 0, iclass 32, count 0 2006.229.07:42:44.97#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:44.97#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:42:44.97#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:42:44.97#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:42:44.97$vck44/vb=1,4 2006.229.07:42:44.97#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.07:42:44.97#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.07:42:44.97#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:44.97#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:44.97#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:44.97#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:44.97#ibcon#enter wrdev, iclass 34, count 2 2006.229.07:42:44.97#ibcon#first serial, iclass 34, count 2 2006.229.07:42:44.97#ibcon#enter sib2, iclass 34, count 2 2006.229.07:42:44.97#ibcon#flushed, iclass 34, count 2 2006.229.07:42:44.97#ibcon#about to write, iclass 34, count 2 2006.229.07:42:44.97#ibcon#wrote, iclass 34, count 2 2006.229.07:42:44.97#ibcon#about to read 3, iclass 34, count 2 2006.229.07:42:44.99#ibcon#read 3, iclass 34, count 2 2006.229.07:42:44.99#ibcon#about to read 4, iclass 34, count 2 2006.229.07:42:44.99#ibcon#read 4, iclass 34, count 2 2006.229.07:42:44.99#ibcon#about to read 5, iclass 34, count 2 2006.229.07:42:44.99#ibcon#read 5, iclass 34, count 2 2006.229.07:42:44.99#ibcon#about to read 6, iclass 34, count 2 2006.229.07:42:44.99#ibcon#read 6, iclass 34, count 2 2006.229.07:42:44.99#ibcon#end of sib2, iclass 34, count 2 2006.229.07:42:44.99#ibcon#*mode == 0, iclass 34, count 2 2006.229.07:42:44.99#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.07:42:44.99#ibcon#[27=AT01-04\r\n] 2006.229.07:42:44.99#ibcon#*before write, iclass 34, count 2 2006.229.07:42:44.99#ibcon#enter sib2, iclass 34, count 2 2006.229.07:42:44.99#ibcon#flushed, iclass 34, count 2 2006.229.07:42:44.99#ibcon#about to write, iclass 34, count 2 2006.229.07:42:44.99#ibcon#wrote, iclass 34, count 2 2006.229.07:42:44.99#ibcon#about to read 3, iclass 34, count 2 2006.229.07:42:45.02#ibcon#read 3, iclass 34, count 2 2006.229.07:42:45.02#ibcon#about to read 4, iclass 34, count 2 2006.229.07:42:45.02#ibcon#read 4, iclass 34, count 2 2006.229.07:42:45.02#ibcon#about to read 5, iclass 34, count 2 2006.229.07:42:45.02#ibcon#read 5, iclass 34, count 2 2006.229.07:42:45.02#ibcon#about to read 6, iclass 34, count 2 2006.229.07:42:45.02#ibcon#read 6, iclass 34, count 2 2006.229.07:42:45.02#ibcon#end of sib2, iclass 34, count 2 2006.229.07:42:45.02#ibcon#*after write, iclass 34, count 2 2006.229.07:42:45.02#ibcon#*before return 0, iclass 34, count 2 2006.229.07:42:45.02#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:45.02#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:42:45.02#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.07:42:45.02#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:45.02#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:45.14#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:45.14#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:45.14#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:42:45.14#ibcon#first serial, iclass 34, count 0 2006.229.07:42:45.14#ibcon#enter sib2, iclass 34, count 0 2006.229.07:42:45.14#ibcon#flushed, iclass 34, count 0 2006.229.07:42:45.14#ibcon#about to write, iclass 34, count 0 2006.229.07:42:45.14#ibcon#wrote, iclass 34, count 0 2006.229.07:42:45.14#ibcon#about to read 3, iclass 34, count 0 2006.229.07:42:45.16#ibcon#read 3, iclass 34, count 0 2006.229.07:42:45.16#ibcon#about to read 4, iclass 34, count 0 2006.229.07:42:45.16#ibcon#read 4, iclass 34, count 0 2006.229.07:42:45.16#ibcon#about to read 5, iclass 34, count 0 2006.229.07:42:45.16#ibcon#read 5, iclass 34, count 0 2006.229.07:42:45.16#ibcon#about to read 6, iclass 34, count 0 2006.229.07:42:45.16#ibcon#read 6, iclass 34, count 0 2006.229.07:42:45.16#ibcon#end of sib2, iclass 34, count 0 2006.229.07:42:45.16#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:42:45.16#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:42:45.16#ibcon#[27=USB\r\n] 2006.229.07:42:45.16#ibcon#*before write, iclass 34, count 0 2006.229.07:42:45.16#ibcon#enter sib2, iclass 34, count 0 2006.229.07:42:45.16#ibcon#flushed, iclass 34, count 0 2006.229.07:42:45.16#ibcon#about to write, iclass 34, count 0 2006.229.07:42:45.16#ibcon#wrote, iclass 34, count 0 2006.229.07:42:45.16#ibcon#about to read 3, iclass 34, count 0 2006.229.07:42:45.19#ibcon#read 3, iclass 34, count 0 2006.229.07:42:45.19#ibcon#about to read 4, iclass 34, count 0 2006.229.07:42:45.19#ibcon#read 4, iclass 34, count 0 2006.229.07:42:45.19#ibcon#about to read 5, iclass 34, count 0 2006.229.07:42:45.19#ibcon#read 5, iclass 34, count 0 2006.229.07:42:45.19#ibcon#about to read 6, iclass 34, count 0 2006.229.07:42:45.19#ibcon#read 6, iclass 34, count 0 2006.229.07:42:45.19#ibcon#end of sib2, iclass 34, count 0 2006.229.07:42:45.19#ibcon#*after write, iclass 34, count 0 2006.229.07:42:45.19#ibcon#*before return 0, iclass 34, count 0 2006.229.07:42:45.19#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:45.19#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:42:45.19#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:42:45.19#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:42:45.19$vck44/vblo=2,634.99 2006.229.07:42:45.19#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.07:42:45.19#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.07:42:45.19#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:45.19#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:45.19#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:45.19#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:45.19#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:42:45.19#ibcon#first serial, iclass 36, count 0 2006.229.07:42:45.19#ibcon#enter sib2, iclass 36, count 0 2006.229.07:42:45.19#ibcon#flushed, iclass 36, count 0 2006.229.07:42:45.19#ibcon#about to write, iclass 36, count 0 2006.229.07:42:45.19#ibcon#wrote, iclass 36, count 0 2006.229.07:42:45.19#ibcon#about to read 3, iclass 36, count 0 2006.229.07:42:45.21#ibcon#read 3, iclass 36, count 0 2006.229.07:42:45.21#ibcon#about to read 4, iclass 36, count 0 2006.229.07:42:45.21#ibcon#read 4, iclass 36, count 0 2006.229.07:42:45.21#ibcon#about to read 5, iclass 36, count 0 2006.229.07:42:45.21#ibcon#read 5, iclass 36, count 0 2006.229.07:42:45.21#ibcon#about to read 6, iclass 36, count 0 2006.229.07:42:45.21#ibcon#read 6, iclass 36, count 0 2006.229.07:42:45.21#ibcon#end of sib2, iclass 36, count 0 2006.229.07:42:45.21#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:42:45.21#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:42:45.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:42:45.21#ibcon#*before write, iclass 36, count 0 2006.229.07:42:45.21#ibcon#enter sib2, iclass 36, count 0 2006.229.07:42:45.21#ibcon#flushed, iclass 36, count 0 2006.229.07:42:45.21#ibcon#about to write, iclass 36, count 0 2006.229.07:42:45.21#ibcon#wrote, iclass 36, count 0 2006.229.07:42:45.21#ibcon#about to read 3, iclass 36, count 0 2006.229.07:42:45.25#ibcon#read 3, iclass 36, count 0 2006.229.07:42:45.25#ibcon#about to read 4, iclass 36, count 0 2006.229.07:42:45.25#ibcon#read 4, iclass 36, count 0 2006.229.07:42:45.25#ibcon#about to read 5, iclass 36, count 0 2006.229.07:42:45.25#ibcon#read 5, iclass 36, count 0 2006.229.07:42:45.25#ibcon#about to read 6, iclass 36, count 0 2006.229.07:42:45.25#ibcon#read 6, iclass 36, count 0 2006.229.07:42:45.25#ibcon#end of sib2, iclass 36, count 0 2006.229.07:42:45.25#ibcon#*after write, iclass 36, count 0 2006.229.07:42:45.25#ibcon#*before return 0, iclass 36, count 0 2006.229.07:42:45.25#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:45.25#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:42:45.25#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:42:45.25#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:42:45.25$vck44/vb=2,4 2006.229.07:42:45.25#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.07:42:45.25#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.07:42:45.25#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:45.25#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:45.31#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:45.31#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:45.31#ibcon#enter wrdev, iclass 38, count 2 2006.229.07:42:45.31#ibcon#first serial, iclass 38, count 2 2006.229.07:42:45.31#ibcon#enter sib2, iclass 38, count 2 2006.229.07:42:45.31#ibcon#flushed, iclass 38, count 2 2006.229.07:42:45.31#ibcon#about to write, iclass 38, count 2 2006.229.07:42:45.31#ibcon#wrote, iclass 38, count 2 2006.229.07:42:45.31#ibcon#about to read 3, iclass 38, count 2 2006.229.07:42:45.33#ibcon#read 3, iclass 38, count 2 2006.229.07:42:45.33#ibcon#about to read 4, iclass 38, count 2 2006.229.07:42:45.33#ibcon#read 4, iclass 38, count 2 2006.229.07:42:45.33#ibcon#about to read 5, iclass 38, count 2 2006.229.07:42:45.33#ibcon#read 5, iclass 38, count 2 2006.229.07:42:45.33#ibcon#about to read 6, iclass 38, count 2 2006.229.07:42:45.33#ibcon#read 6, iclass 38, count 2 2006.229.07:42:45.33#ibcon#end of sib2, iclass 38, count 2 2006.229.07:42:45.33#ibcon#*mode == 0, iclass 38, count 2 2006.229.07:42:45.33#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.07:42:45.33#ibcon#[27=AT02-04\r\n] 2006.229.07:42:45.33#ibcon#*before write, iclass 38, count 2 2006.229.07:42:45.33#ibcon#enter sib2, iclass 38, count 2 2006.229.07:42:45.33#ibcon#flushed, iclass 38, count 2 2006.229.07:42:45.33#ibcon#about to write, iclass 38, count 2 2006.229.07:42:45.33#ibcon#wrote, iclass 38, count 2 2006.229.07:42:45.33#ibcon#about to read 3, iclass 38, count 2 2006.229.07:42:45.36#ibcon#read 3, iclass 38, count 2 2006.229.07:42:45.36#ibcon#about to read 4, iclass 38, count 2 2006.229.07:42:45.36#ibcon#read 4, iclass 38, count 2 2006.229.07:42:45.36#ibcon#about to read 5, iclass 38, count 2 2006.229.07:42:45.36#ibcon#read 5, iclass 38, count 2 2006.229.07:42:45.36#ibcon#about to read 6, iclass 38, count 2 2006.229.07:42:45.36#ibcon#read 6, iclass 38, count 2 2006.229.07:42:45.36#ibcon#end of sib2, iclass 38, count 2 2006.229.07:42:45.36#ibcon#*after write, iclass 38, count 2 2006.229.07:42:45.36#ibcon#*before return 0, iclass 38, count 2 2006.229.07:42:45.36#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:45.36#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:42:45.36#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.07:42:45.36#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:45.36#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:45.48#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:45.48#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:45.48#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:42:45.48#ibcon#first serial, iclass 38, count 0 2006.229.07:42:45.48#ibcon#enter sib2, iclass 38, count 0 2006.229.07:42:45.48#ibcon#flushed, iclass 38, count 0 2006.229.07:42:45.48#ibcon#about to write, iclass 38, count 0 2006.229.07:42:45.48#ibcon#wrote, iclass 38, count 0 2006.229.07:42:45.48#ibcon#about to read 3, iclass 38, count 0 2006.229.07:42:45.50#ibcon#read 3, iclass 38, count 0 2006.229.07:42:45.50#ibcon#about to read 4, iclass 38, count 0 2006.229.07:42:45.50#ibcon#read 4, iclass 38, count 0 2006.229.07:42:45.50#ibcon#about to read 5, iclass 38, count 0 2006.229.07:42:45.50#ibcon#read 5, iclass 38, count 0 2006.229.07:42:45.50#ibcon#about to read 6, iclass 38, count 0 2006.229.07:42:45.50#ibcon#read 6, iclass 38, count 0 2006.229.07:42:45.50#ibcon#end of sib2, iclass 38, count 0 2006.229.07:42:45.50#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:42:45.50#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:42:45.50#ibcon#[27=USB\r\n] 2006.229.07:42:45.50#ibcon#*before write, iclass 38, count 0 2006.229.07:42:45.50#ibcon#enter sib2, iclass 38, count 0 2006.229.07:42:45.50#ibcon#flushed, iclass 38, count 0 2006.229.07:42:45.50#ibcon#about to write, iclass 38, count 0 2006.229.07:42:45.50#ibcon#wrote, iclass 38, count 0 2006.229.07:42:45.50#ibcon#about to read 3, iclass 38, count 0 2006.229.07:42:45.53#ibcon#read 3, iclass 38, count 0 2006.229.07:42:45.53#ibcon#about to read 4, iclass 38, count 0 2006.229.07:42:45.53#ibcon#read 4, iclass 38, count 0 2006.229.07:42:45.53#ibcon#about to read 5, iclass 38, count 0 2006.229.07:42:45.53#ibcon#read 5, iclass 38, count 0 2006.229.07:42:45.53#ibcon#about to read 6, iclass 38, count 0 2006.229.07:42:45.53#ibcon#read 6, iclass 38, count 0 2006.229.07:42:45.53#ibcon#end of sib2, iclass 38, count 0 2006.229.07:42:45.53#ibcon#*after write, iclass 38, count 0 2006.229.07:42:45.53#ibcon#*before return 0, iclass 38, count 0 2006.229.07:42:45.53#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:45.53#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:42:45.53#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:42:45.53#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:42:45.53$vck44/vblo=3,649.99 2006.229.07:42:45.53#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.07:42:45.53#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.07:42:45.53#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:45.53#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:45.53#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:45.53#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:45.53#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:42:45.53#ibcon#first serial, iclass 40, count 0 2006.229.07:42:45.53#ibcon#enter sib2, iclass 40, count 0 2006.229.07:42:45.53#ibcon#flushed, iclass 40, count 0 2006.229.07:42:45.53#ibcon#about to write, iclass 40, count 0 2006.229.07:42:45.53#ibcon#wrote, iclass 40, count 0 2006.229.07:42:45.53#ibcon#about to read 3, iclass 40, count 0 2006.229.07:42:45.55#ibcon#read 3, iclass 40, count 0 2006.229.07:42:45.55#ibcon#about to read 4, iclass 40, count 0 2006.229.07:42:45.55#ibcon#read 4, iclass 40, count 0 2006.229.07:42:45.55#ibcon#about to read 5, iclass 40, count 0 2006.229.07:42:45.55#ibcon#read 5, iclass 40, count 0 2006.229.07:42:45.55#ibcon#about to read 6, iclass 40, count 0 2006.229.07:42:45.55#ibcon#read 6, iclass 40, count 0 2006.229.07:42:45.55#ibcon#end of sib2, iclass 40, count 0 2006.229.07:42:45.55#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:42:45.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:42:45.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:42:45.55#ibcon#*before write, iclass 40, count 0 2006.229.07:42:45.55#ibcon#enter sib2, iclass 40, count 0 2006.229.07:42:45.55#ibcon#flushed, iclass 40, count 0 2006.229.07:42:45.55#ibcon#about to write, iclass 40, count 0 2006.229.07:42:45.55#ibcon#wrote, iclass 40, count 0 2006.229.07:42:45.55#ibcon#about to read 3, iclass 40, count 0 2006.229.07:42:45.59#ibcon#read 3, iclass 40, count 0 2006.229.07:42:45.59#ibcon#about to read 4, iclass 40, count 0 2006.229.07:42:45.59#ibcon#read 4, iclass 40, count 0 2006.229.07:42:45.59#ibcon#about to read 5, iclass 40, count 0 2006.229.07:42:45.59#ibcon#read 5, iclass 40, count 0 2006.229.07:42:45.59#ibcon#about to read 6, iclass 40, count 0 2006.229.07:42:45.59#ibcon#read 6, iclass 40, count 0 2006.229.07:42:45.59#ibcon#end of sib2, iclass 40, count 0 2006.229.07:42:45.59#ibcon#*after write, iclass 40, count 0 2006.229.07:42:45.59#ibcon#*before return 0, iclass 40, count 0 2006.229.07:42:45.59#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:45.59#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:42:45.59#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:42:45.59#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:42:45.59$vck44/vb=3,4 2006.229.07:42:45.59#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.07:42:45.59#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.07:42:45.59#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:45.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:45.65#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:45.65#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:45.65#ibcon#enter wrdev, iclass 4, count 2 2006.229.07:42:45.65#ibcon#first serial, iclass 4, count 2 2006.229.07:42:45.65#ibcon#enter sib2, iclass 4, count 2 2006.229.07:42:45.65#ibcon#flushed, iclass 4, count 2 2006.229.07:42:45.65#ibcon#about to write, iclass 4, count 2 2006.229.07:42:45.65#ibcon#wrote, iclass 4, count 2 2006.229.07:42:45.65#ibcon#about to read 3, iclass 4, count 2 2006.229.07:42:45.67#ibcon#read 3, iclass 4, count 2 2006.229.07:42:45.67#ibcon#about to read 4, iclass 4, count 2 2006.229.07:42:45.67#ibcon#read 4, iclass 4, count 2 2006.229.07:42:45.67#ibcon#about to read 5, iclass 4, count 2 2006.229.07:42:45.67#ibcon#read 5, iclass 4, count 2 2006.229.07:42:45.67#ibcon#about to read 6, iclass 4, count 2 2006.229.07:42:45.67#ibcon#read 6, iclass 4, count 2 2006.229.07:42:45.67#ibcon#end of sib2, iclass 4, count 2 2006.229.07:42:45.67#ibcon#*mode == 0, iclass 4, count 2 2006.229.07:42:45.67#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.07:42:45.67#ibcon#[27=AT03-04\r\n] 2006.229.07:42:45.67#ibcon#*before write, iclass 4, count 2 2006.229.07:42:45.67#ibcon#enter sib2, iclass 4, count 2 2006.229.07:42:45.67#ibcon#flushed, iclass 4, count 2 2006.229.07:42:45.67#ibcon#about to write, iclass 4, count 2 2006.229.07:42:45.67#ibcon#wrote, iclass 4, count 2 2006.229.07:42:45.67#ibcon#about to read 3, iclass 4, count 2 2006.229.07:42:45.70#ibcon#read 3, iclass 4, count 2 2006.229.07:42:45.70#ibcon#about to read 4, iclass 4, count 2 2006.229.07:42:45.70#ibcon#read 4, iclass 4, count 2 2006.229.07:42:45.70#ibcon#about to read 5, iclass 4, count 2 2006.229.07:42:45.70#ibcon#read 5, iclass 4, count 2 2006.229.07:42:45.70#ibcon#about to read 6, iclass 4, count 2 2006.229.07:42:45.70#ibcon#read 6, iclass 4, count 2 2006.229.07:42:45.70#ibcon#end of sib2, iclass 4, count 2 2006.229.07:42:45.70#ibcon#*after write, iclass 4, count 2 2006.229.07:42:45.70#ibcon#*before return 0, iclass 4, count 2 2006.229.07:42:45.70#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:45.70#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:42:45.70#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.07:42:45.70#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:45.70#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:45.82#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:45.82#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:45.82#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:42:45.82#ibcon#first serial, iclass 4, count 0 2006.229.07:42:45.82#ibcon#enter sib2, iclass 4, count 0 2006.229.07:42:45.82#ibcon#flushed, iclass 4, count 0 2006.229.07:42:45.82#ibcon#about to write, iclass 4, count 0 2006.229.07:42:45.82#ibcon#wrote, iclass 4, count 0 2006.229.07:42:45.82#ibcon#about to read 3, iclass 4, count 0 2006.229.07:42:45.84#ibcon#read 3, iclass 4, count 0 2006.229.07:42:45.84#ibcon#about to read 4, iclass 4, count 0 2006.229.07:42:45.84#ibcon#read 4, iclass 4, count 0 2006.229.07:42:45.84#ibcon#about to read 5, iclass 4, count 0 2006.229.07:42:45.84#ibcon#read 5, iclass 4, count 0 2006.229.07:42:45.84#ibcon#about to read 6, iclass 4, count 0 2006.229.07:42:45.84#ibcon#read 6, iclass 4, count 0 2006.229.07:42:45.84#ibcon#end of sib2, iclass 4, count 0 2006.229.07:42:45.84#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:42:45.84#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:42:45.84#ibcon#[27=USB\r\n] 2006.229.07:42:45.84#ibcon#*before write, iclass 4, count 0 2006.229.07:42:45.84#ibcon#enter sib2, iclass 4, count 0 2006.229.07:42:45.84#ibcon#flushed, iclass 4, count 0 2006.229.07:42:45.84#ibcon#about to write, iclass 4, count 0 2006.229.07:42:45.84#ibcon#wrote, iclass 4, count 0 2006.229.07:42:45.84#ibcon#about to read 3, iclass 4, count 0 2006.229.07:42:45.87#ibcon#read 3, iclass 4, count 0 2006.229.07:42:45.87#ibcon#about to read 4, iclass 4, count 0 2006.229.07:42:45.87#ibcon#read 4, iclass 4, count 0 2006.229.07:42:45.87#ibcon#about to read 5, iclass 4, count 0 2006.229.07:42:45.87#ibcon#read 5, iclass 4, count 0 2006.229.07:42:45.87#ibcon#about to read 6, iclass 4, count 0 2006.229.07:42:45.87#ibcon#read 6, iclass 4, count 0 2006.229.07:42:45.87#ibcon#end of sib2, iclass 4, count 0 2006.229.07:42:45.87#ibcon#*after write, iclass 4, count 0 2006.229.07:42:45.87#ibcon#*before return 0, iclass 4, count 0 2006.229.07:42:45.87#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:45.87#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:42:45.87#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:42:45.87#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:42:45.87$vck44/vblo=4,679.99 2006.229.07:42:45.87#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.07:42:45.87#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.07:42:45.87#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:45.87#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:45.87#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:45.87#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:45.87#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:42:45.87#ibcon#first serial, iclass 6, count 0 2006.229.07:42:45.87#ibcon#enter sib2, iclass 6, count 0 2006.229.07:42:45.87#ibcon#flushed, iclass 6, count 0 2006.229.07:42:45.87#ibcon#about to write, iclass 6, count 0 2006.229.07:42:45.87#ibcon#wrote, iclass 6, count 0 2006.229.07:42:45.87#ibcon#about to read 3, iclass 6, count 0 2006.229.07:42:45.89#ibcon#read 3, iclass 6, count 0 2006.229.07:42:45.89#ibcon#about to read 4, iclass 6, count 0 2006.229.07:42:45.89#ibcon#read 4, iclass 6, count 0 2006.229.07:42:45.89#ibcon#about to read 5, iclass 6, count 0 2006.229.07:42:45.89#ibcon#read 5, iclass 6, count 0 2006.229.07:42:45.89#ibcon#about to read 6, iclass 6, count 0 2006.229.07:42:45.89#ibcon#read 6, iclass 6, count 0 2006.229.07:42:45.89#ibcon#end of sib2, iclass 6, count 0 2006.229.07:42:45.89#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:42:45.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:42:45.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:42:45.89#ibcon#*before write, iclass 6, count 0 2006.229.07:42:45.89#ibcon#enter sib2, iclass 6, count 0 2006.229.07:42:45.89#ibcon#flushed, iclass 6, count 0 2006.229.07:42:45.89#ibcon#about to write, iclass 6, count 0 2006.229.07:42:45.89#ibcon#wrote, iclass 6, count 0 2006.229.07:42:45.89#ibcon#about to read 3, iclass 6, count 0 2006.229.07:42:45.93#ibcon#read 3, iclass 6, count 0 2006.229.07:42:45.93#ibcon#about to read 4, iclass 6, count 0 2006.229.07:42:45.93#ibcon#read 4, iclass 6, count 0 2006.229.07:42:45.93#ibcon#about to read 5, iclass 6, count 0 2006.229.07:42:45.93#ibcon#read 5, iclass 6, count 0 2006.229.07:42:45.93#ibcon#about to read 6, iclass 6, count 0 2006.229.07:42:45.93#ibcon#read 6, iclass 6, count 0 2006.229.07:42:45.93#ibcon#end of sib2, iclass 6, count 0 2006.229.07:42:45.93#ibcon#*after write, iclass 6, count 0 2006.229.07:42:45.93#ibcon#*before return 0, iclass 6, count 0 2006.229.07:42:45.93#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:45.93#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:42:45.93#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:42:45.93#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:42:45.93$vck44/vb=4,4 2006.229.07:42:45.93#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.07:42:45.93#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.07:42:45.93#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:45.93#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:45.99#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:45.99#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:45.99#ibcon#enter wrdev, iclass 10, count 2 2006.229.07:42:45.99#ibcon#first serial, iclass 10, count 2 2006.229.07:42:45.99#ibcon#enter sib2, iclass 10, count 2 2006.229.07:42:45.99#ibcon#flushed, iclass 10, count 2 2006.229.07:42:45.99#ibcon#about to write, iclass 10, count 2 2006.229.07:42:45.99#ibcon#wrote, iclass 10, count 2 2006.229.07:42:45.99#ibcon#about to read 3, iclass 10, count 2 2006.229.07:42:46.01#ibcon#read 3, iclass 10, count 2 2006.229.07:42:46.01#ibcon#about to read 4, iclass 10, count 2 2006.229.07:42:46.01#ibcon#read 4, iclass 10, count 2 2006.229.07:42:46.01#ibcon#about to read 5, iclass 10, count 2 2006.229.07:42:46.01#ibcon#read 5, iclass 10, count 2 2006.229.07:42:46.01#ibcon#about to read 6, iclass 10, count 2 2006.229.07:42:46.01#ibcon#read 6, iclass 10, count 2 2006.229.07:42:46.01#ibcon#end of sib2, iclass 10, count 2 2006.229.07:42:46.01#ibcon#*mode == 0, iclass 10, count 2 2006.229.07:42:46.01#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.07:42:46.01#ibcon#[27=AT04-04\r\n] 2006.229.07:42:46.01#ibcon#*before write, iclass 10, count 2 2006.229.07:42:46.01#ibcon#enter sib2, iclass 10, count 2 2006.229.07:42:46.01#ibcon#flushed, iclass 10, count 2 2006.229.07:42:46.01#ibcon#about to write, iclass 10, count 2 2006.229.07:42:46.01#ibcon#wrote, iclass 10, count 2 2006.229.07:42:46.01#ibcon#about to read 3, iclass 10, count 2 2006.229.07:42:46.04#ibcon#read 3, iclass 10, count 2 2006.229.07:42:46.04#ibcon#about to read 4, iclass 10, count 2 2006.229.07:42:46.04#ibcon#read 4, iclass 10, count 2 2006.229.07:42:46.04#ibcon#about to read 5, iclass 10, count 2 2006.229.07:42:46.04#ibcon#read 5, iclass 10, count 2 2006.229.07:42:46.04#ibcon#about to read 6, iclass 10, count 2 2006.229.07:42:46.04#ibcon#read 6, iclass 10, count 2 2006.229.07:42:46.04#ibcon#end of sib2, iclass 10, count 2 2006.229.07:42:46.04#ibcon#*after write, iclass 10, count 2 2006.229.07:42:46.04#ibcon#*before return 0, iclass 10, count 2 2006.229.07:42:46.04#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:46.04#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:42:46.04#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.07:42:46.04#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:46.04#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:46.16#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:46.16#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:46.16#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:42:46.16#ibcon#first serial, iclass 10, count 0 2006.229.07:42:46.16#ibcon#enter sib2, iclass 10, count 0 2006.229.07:42:46.16#ibcon#flushed, iclass 10, count 0 2006.229.07:42:46.16#ibcon#about to write, iclass 10, count 0 2006.229.07:42:46.16#ibcon#wrote, iclass 10, count 0 2006.229.07:42:46.16#ibcon#about to read 3, iclass 10, count 0 2006.229.07:42:46.18#ibcon#read 3, iclass 10, count 0 2006.229.07:42:46.18#ibcon#about to read 4, iclass 10, count 0 2006.229.07:42:46.18#ibcon#read 4, iclass 10, count 0 2006.229.07:42:46.18#ibcon#about to read 5, iclass 10, count 0 2006.229.07:42:46.18#ibcon#read 5, iclass 10, count 0 2006.229.07:42:46.18#ibcon#about to read 6, iclass 10, count 0 2006.229.07:42:46.18#ibcon#read 6, iclass 10, count 0 2006.229.07:42:46.18#ibcon#end of sib2, iclass 10, count 0 2006.229.07:42:46.18#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:42:46.18#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:42:46.18#ibcon#[27=USB\r\n] 2006.229.07:42:46.18#ibcon#*before write, iclass 10, count 0 2006.229.07:42:46.18#ibcon#enter sib2, iclass 10, count 0 2006.229.07:42:46.18#ibcon#flushed, iclass 10, count 0 2006.229.07:42:46.18#ibcon#about to write, iclass 10, count 0 2006.229.07:42:46.18#ibcon#wrote, iclass 10, count 0 2006.229.07:42:46.18#ibcon#about to read 3, iclass 10, count 0 2006.229.07:42:46.21#ibcon#read 3, iclass 10, count 0 2006.229.07:42:46.21#ibcon#about to read 4, iclass 10, count 0 2006.229.07:42:46.21#ibcon#read 4, iclass 10, count 0 2006.229.07:42:46.21#ibcon#about to read 5, iclass 10, count 0 2006.229.07:42:46.21#ibcon#read 5, iclass 10, count 0 2006.229.07:42:46.21#ibcon#about to read 6, iclass 10, count 0 2006.229.07:42:46.21#ibcon#read 6, iclass 10, count 0 2006.229.07:42:46.21#ibcon#end of sib2, iclass 10, count 0 2006.229.07:42:46.21#ibcon#*after write, iclass 10, count 0 2006.229.07:42:46.21#ibcon#*before return 0, iclass 10, count 0 2006.229.07:42:46.21#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:46.21#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:42:46.21#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:42:46.21#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:42:46.21$vck44/vblo=5,709.99 2006.229.07:42:46.21#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.07:42:46.21#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.07:42:46.21#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:46.21#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:42:46.21#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:42:46.21#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:42:46.21#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:42:46.21#ibcon#first serial, iclass 12, count 0 2006.229.07:42:46.21#ibcon#enter sib2, iclass 12, count 0 2006.229.07:42:46.21#ibcon#flushed, iclass 12, count 0 2006.229.07:42:46.21#ibcon#about to write, iclass 12, count 0 2006.229.07:42:46.21#ibcon#wrote, iclass 12, count 0 2006.229.07:42:46.21#ibcon#about to read 3, iclass 12, count 0 2006.229.07:42:46.23#ibcon#read 3, iclass 12, count 0 2006.229.07:42:46.23#ibcon#about to read 4, iclass 12, count 0 2006.229.07:42:46.23#ibcon#read 4, iclass 12, count 0 2006.229.07:42:46.23#ibcon#about to read 5, iclass 12, count 0 2006.229.07:42:46.23#ibcon#read 5, iclass 12, count 0 2006.229.07:42:46.23#ibcon#about to read 6, iclass 12, count 0 2006.229.07:42:46.23#ibcon#read 6, iclass 12, count 0 2006.229.07:42:46.23#ibcon#end of sib2, iclass 12, count 0 2006.229.07:42:46.23#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:42:46.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:42:46.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:42:46.23#ibcon#*before write, iclass 12, count 0 2006.229.07:42:46.23#ibcon#enter sib2, iclass 12, count 0 2006.229.07:42:46.23#ibcon#flushed, iclass 12, count 0 2006.229.07:42:46.23#ibcon#about to write, iclass 12, count 0 2006.229.07:42:46.23#ibcon#wrote, iclass 12, count 0 2006.229.07:42:46.23#ibcon#about to read 3, iclass 12, count 0 2006.229.07:42:46.27#ibcon#read 3, iclass 12, count 0 2006.229.07:42:46.27#ibcon#about to read 4, iclass 12, count 0 2006.229.07:42:46.27#ibcon#read 4, iclass 12, count 0 2006.229.07:42:46.27#ibcon#about to read 5, iclass 12, count 0 2006.229.07:42:46.27#ibcon#read 5, iclass 12, count 0 2006.229.07:42:46.27#ibcon#about to read 6, iclass 12, count 0 2006.229.07:42:46.27#ibcon#read 6, iclass 12, count 0 2006.229.07:42:46.27#ibcon#end of sib2, iclass 12, count 0 2006.229.07:42:46.27#ibcon#*after write, iclass 12, count 0 2006.229.07:42:46.27#ibcon#*before return 0, iclass 12, count 0 2006.229.07:42:46.27#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:42:46.27#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:42:46.27#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:42:46.27#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:42:46.27$vck44/vb=5,4 2006.229.07:42:46.27#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.07:42:46.27#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.07:42:46.27#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:46.27#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:42:46.33#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:42:46.33#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:42:46.33#ibcon#enter wrdev, iclass 14, count 2 2006.229.07:42:46.33#ibcon#first serial, iclass 14, count 2 2006.229.07:42:46.33#ibcon#enter sib2, iclass 14, count 2 2006.229.07:42:46.33#ibcon#flushed, iclass 14, count 2 2006.229.07:42:46.33#ibcon#about to write, iclass 14, count 2 2006.229.07:42:46.33#ibcon#wrote, iclass 14, count 2 2006.229.07:42:46.33#ibcon#about to read 3, iclass 14, count 2 2006.229.07:42:46.35#ibcon#read 3, iclass 14, count 2 2006.229.07:42:46.35#ibcon#about to read 4, iclass 14, count 2 2006.229.07:42:46.35#ibcon#read 4, iclass 14, count 2 2006.229.07:42:46.35#ibcon#about to read 5, iclass 14, count 2 2006.229.07:42:46.35#ibcon#read 5, iclass 14, count 2 2006.229.07:42:46.35#ibcon#about to read 6, iclass 14, count 2 2006.229.07:42:46.35#ibcon#read 6, iclass 14, count 2 2006.229.07:42:46.35#ibcon#end of sib2, iclass 14, count 2 2006.229.07:42:46.35#ibcon#*mode == 0, iclass 14, count 2 2006.229.07:42:46.35#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.07:42:46.35#ibcon#[27=AT05-04\r\n] 2006.229.07:42:46.35#ibcon#*before write, iclass 14, count 2 2006.229.07:42:46.35#ibcon#enter sib2, iclass 14, count 2 2006.229.07:42:46.35#ibcon#flushed, iclass 14, count 2 2006.229.07:42:46.35#ibcon#about to write, iclass 14, count 2 2006.229.07:42:46.35#ibcon#wrote, iclass 14, count 2 2006.229.07:42:46.35#ibcon#about to read 3, iclass 14, count 2 2006.229.07:42:46.38#ibcon#read 3, iclass 14, count 2 2006.229.07:42:46.38#ibcon#about to read 4, iclass 14, count 2 2006.229.07:42:46.38#ibcon#read 4, iclass 14, count 2 2006.229.07:42:46.38#ibcon#about to read 5, iclass 14, count 2 2006.229.07:42:46.38#ibcon#read 5, iclass 14, count 2 2006.229.07:42:46.38#ibcon#about to read 6, iclass 14, count 2 2006.229.07:42:46.38#ibcon#read 6, iclass 14, count 2 2006.229.07:42:46.38#ibcon#end of sib2, iclass 14, count 2 2006.229.07:42:46.38#ibcon#*after write, iclass 14, count 2 2006.229.07:42:46.38#ibcon#*before return 0, iclass 14, count 2 2006.229.07:42:46.38#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:42:46.38#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:42:46.38#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.07:42:46.38#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:46.38#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:42:46.50#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:42:46.50#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:42:46.50#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:42:46.50#ibcon#first serial, iclass 14, count 0 2006.229.07:42:46.50#ibcon#enter sib2, iclass 14, count 0 2006.229.07:42:46.50#ibcon#flushed, iclass 14, count 0 2006.229.07:42:46.50#ibcon#about to write, iclass 14, count 0 2006.229.07:42:46.50#ibcon#wrote, iclass 14, count 0 2006.229.07:42:46.50#ibcon#about to read 3, iclass 14, count 0 2006.229.07:42:46.52#ibcon#read 3, iclass 14, count 0 2006.229.07:42:46.52#ibcon#about to read 4, iclass 14, count 0 2006.229.07:42:46.52#ibcon#read 4, iclass 14, count 0 2006.229.07:42:46.52#ibcon#about to read 5, iclass 14, count 0 2006.229.07:42:46.52#ibcon#read 5, iclass 14, count 0 2006.229.07:42:46.52#ibcon#about to read 6, iclass 14, count 0 2006.229.07:42:46.52#ibcon#read 6, iclass 14, count 0 2006.229.07:42:46.52#ibcon#end of sib2, iclass 14, count 0 2006.229.07:42:46.52#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:42:46.52#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:42:46.52#ibcon#[27=USB\r\n] 2006.229.07:42:46.52#ibcon#*before write, iclass 14, count 0 2006.229.07:42:46.52#ibcon#enter sib2, iclass 14, count 0 2006.229.07:42:46.52#ibcon#flushed, iclass 14, count 0 2006.229.07:42:46.52#ibcon#about to write, iclass 14, count 0 2006.229.07:42:46.52#ibcon#wrote, iclass 14, count 0 2006.229.07:42:46.52#ibcon#about to read 3, iclass 14, count 0 2006.229.07:42:46.55#ibcon#read 3, iclass 14, count 0 2006.229.07:42:46.55#ibcon#about to read 4, iclass 14, count 0 2006.229.07:42:46.55#ibcon#read 4, iclass 14, count 0 2006.229.07:42:46.55#ibcon#about to read 5, iclass 14, count 0 2006.229.07:42:46.55#ibcon#read 5, iclass 14, count 0 2006.229.07:42:46.55#ibcon#about to read 6, iclass 14, count 0 2006.229.07:42:46.55#ibcon#read 6, iclass 14, count 0 2006.229.07:42:46.55#ibcon#end of sib2, iclass 14, count 0 2006.229.07:42:46.55#ibcon#*after write, iclass 14, count 0 2006.229.07:42:46.55#ibcon#*before return 0, iclass 14, count 0 2006.229.07:42:46.55#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:42:46.55#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:42:46.55#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:42:46.55#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:42:46.55$vck44/vblo=6,719.99 2006.229.07:42:46.55#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.07:42:46.55#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.07:42:46.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:46.55#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:42:46.55#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:42:46.55#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:42:46.55#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:42:46.55#ibcon#first serial, iclass 16, count 0 2006.229.07:42:46.55#ibcon#enter sib2, iclass 16, count 0 2006.229.07:42:46.55#ibcon#flushed, iclass 16, count 0 2006.229.07:42:46.55#ibcon#about to write, iclass 16, count 0 2006.229.07:42:46.55#ibcon#wrote, iclass 16, count 0 2006.229.07:42:46.55#ibcon#about to read 3, iclass 16, count 0 2006.229.07:42:46.57#ibcon#read 3, iclass 16, count 0 2006.229.07:42:46.57#ibcon#about to read 4, iclass 16, count 0 2006.229.07:42:46.57#ibcon#read 4, iclass 16, count 0 2006.229.07:42:46.57#ibcon#about to read 5, iclass 16, count 0 2006.229.07:42:46.57#ibcon#read 5, iclass 16, count 0 2006.229.07:42:46.57#ibcon#about to read 6, iclass 16, count 0 2006.229.07:42:46.57#ibcon#read 6, iclass 16, count 0 2006.229.07:42:46.57#ibcon#end of sib2, iclass 16, count 0 2006.229.07:42:46.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:42:46.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:42:46.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:42:46.57#ibcon#*before write, iclass 16, count 0 2006.229.07:42:46.57#ibcon#enter sib2, iclass 16, count 0 2006.229.07:42:46.57#ibcon#flushed, iclass 16, count 0 2006.229.07:42:46.57#ibcon#about to write, iclass 16, count 0 2006.229.07:42:46.57#ibcon#wrote, iclass 16, count 0 2006.229.07:42:46.57#ibcon#about to read 3, iclass 16, count 0 2006.229.07:42:46.61#ibcon#read 3, iclass 16, count 0 2006.229.07:42:46.61#ibcon#about to read 4, iclass 16, count 0 2006.229.07:42:46.61#ibcon#read 4, iclass 16, count 0 2006.229.07:42:46.61#ibcon#about to read 5, iclass 16, count 0 2006.229.07:42:46.61#ibcon#read 5, iclass 16, count 0 2006.229.07:42:46.61#ibcon#about to read 6, iclass 16, count 0 2006.229.07:42:46.61#ibcon#read 6, iclass 16, count 0 2006.229.07:42:46.61#ibcon#end of sib2, iclass 16, count 0 2006.229.07:42:46.61#ibcon#*after write, iclass 16, count 0 2006.229.07:42:46.61#ibcon#*before return 0, iclass 16, count 0 2006.229.07:42:46.61#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:42:46.61#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:42:46.61#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:42:46.61#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:42:46.61$vck44/vb=6,4 2006.229.07:42:46.61#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.07:42:46.61#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.07:42:46.61#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:46.61#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:42:46.67#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:42:46.67#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:42:46.67#ibcon#enter wrdev, iclass 18, count 2 2006.229.07:42:46.67#ibcon#first serial, iclass 18, count 2 2006.229.07:42:46.67#ibcon#enter sib2, iclass 18, count 2 2006.229.07:42:46.67#ibcon#flushed, iclass 18, count 2 2006.229.07:42:46.67#ibcon#about to write, iclass 18, count 2 2006.229.07:42:46.67#ibcon#wrote, iclass 18, count 2 2006.229.07:42:46.67#ibcon#about to read 3, iclass 18, count 2 2006.229.07:42:46.69#ibcon#read 3, iclass 18, count 2 2006.229.07:42:46.69#ibcon#about to read 4, iclass 18, count 2 2006.229.07:42:46.69#ibcon#read 4, iclass 18, count 2 2006.229.07:42:46.69#ibcon#about to read 5, iclass 18, count 2 2006.229.07:42:46.69#ibcon#read 5, iclass 18, count 2 2006.229.07:42:46.69#ibcon#about to read 6, iclass 18, count 2 2006.229.07:42:46.69#ibcon#read 6, iclass 18, count 2 2006.229.07:42:46.69#ibcon#end of sib2, iclass 18, count 2 2006.229.07:42:46.69#ibcon#*mode == 0, iclass 18, count 2 2006.229.07:42:46.69#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.07:42:46.69#ibcon#[27=AT06-04\r\n] 2006.229.07:42:46.69#ibcon#*before write, iclass 18, count 2 2006.229.07:42:46.69#ibcon#enter sib2, iclass 18, count 2 2006.229.07:42:46.69#ibcon#flushed, iclass 18, count 2 2006.229.07:42:46.69#ibcon#about to write, iclass 18, count 2 2006.229.07:42:46.69#ibcon#wrote, iclass 18, count 2 2006.229.07:42:46.69#ibcon#about to read 3, iclass 18, count 2 2006.229.07:42:46.72#ibcon#read 3, iclass 18, count 2 2006.229.07:42:46.72#ibcon#about to read 4, iclass 18, count 2 2006.229.07:42:46.72#ibcon#read 4, iclass 18, count 2 2006.229.07:42:46.72#ibcon#about to read 5, iclass 18, count 2 2006.229.07:42:46.72#ibcon#read 5, iclass 18, count 2 2006.229.07:42:46.72#ibcon#about to read 6, iclass 18, count 2 2006.229.07:42:46.72#ibcon#read 6, iclass 18, count 2 2006.229.07:42:46.72#ibcon#end of sib2, iclass 18, count 2 2006.229.07:42:46.72#ibcon#*after write, iclass 18, count 2 2006.229.07:42:46.72#ibcon#*before return 0, iclass 18, count 2 2006.229.07:42:46.72#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:42:46.72#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:42:46.72#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.07:42:46.72#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:46.72#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:42:46.84#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:42:46.84#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:42:46.84#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:42:46.84#ibcon#first serial, iclass 18, count 0 2006.229.07:42:46.84#ibcon#enter sib2, iclass 18, count 0 2006.229.07:42:46.84#ibcon#flushed, iclass 18, count 0 2006.229.07:42:46.84#ibcon#about to write, iclass 18, count 0 2006.229.07:42:46.84#ibcon#wrote, iclass 18, count 0 2006.229.07:42:46.84#ibcon#about to read 3, iclass 18, count 0 2006.229.07:42:46.86#ibcon#read 3, iclass 18, count 0 2006.229.07:42:46.86#ibcon#about to read 4, iclass 18, count 0 2006.229.07:42:46.86#ibcon#read 4, iclass 18, count 0 2006.229.07:42:46.86#ibcon#about to read 5, iclass 18, count 0 2006.229.07:42:46.86#ibcon#read 5, iclass 18, count 0 2006.229.07:42:46.86#ibcon#about to read 6, iclass 18, count 0 2006.229.07:42:46.86#ibcon#read 6, iclass 18, count 0 2006.229.07:42:46.86#ibcon#end of sib2, iclass 18, count 0 2006.229.07:42:46.86#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:42:46.86#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:42:46.86#ibcon#[27=USB\r\n] 2006.229.07:42:46.86#ibcon#*before write, iclass 18, count 0 2006.229.07:42:46.86#ibcon#enter sib2, iclass 18, count 0 2006.229.07:42:46.86#ibcon#flushed, iclass 18, count 0 2006.229.07:42:46.86#ibcon#about to write, iclass 18, count 0 2006.229.07:42:46.86#ibcon#wrote, iclass 18, count 0 2006.229.07:42:46.86#ibcon#about to read 3, iclass 18, count 0 2006.229.07:42:46.89#ibcon#read 3, iclass 18, count 0 2006.229.07:42:46.89#ibcon#about to read 4, iclass 18, count 0 2006.229.07:42:46.89#ibcon#read 4, iclass 18, count 0 2006.229.07:42:46.89#ibcon#about to read 5, iclass 18, count 0 2006.229.07:42:46.89#ibcon#read 5, iclass 18, count 0 2006.229.07:42:46.89#ibcon#about to read 6, iclass 18, count 0 2006.229.07:42:46.89#ibcon#read 6, iclass 18, count 0 2006.229.07:42:46.89#ibcon#end of sib2, iclass 18, count 0 2006.229.07:42:46.89#ibcon#*after write, iclass 18, count 0 2006.229.07:42:46.89#ibcon#*before return 0, iclass 18, count 0 2006.229.07:42:46.89#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:42:46.89#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:42:46.89#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:42:46.89#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:42:46.89$vck44/vblo=7,734.99 2006.229.07:42:46.89#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:42:46.89#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:42:46.89#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:46.89#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:46.89#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:46.89#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:46.89#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:42:46.89#ibcon#first serial, iclass 20, count 0 2006.229.07:42:46.89#ibcon#enter sib2, iclass 20, count 0 2006.229.07:42:46.89#ibcon#flushed, iclass 20, count 0 2006.229.07:42:46.89#ibcon#about to write, iclass 20, count 0 2006.229.07:42:46.89#ibcon#wrote, iclass 20, count 0 2006.229.07:42:46.89#ibcon#about to read 3, iclass 20, count 0 2006.229.07:42:46.91#ibcon#read 3, iclass 20, count 0 2006.229.07:42:46.91#ibcon#about to read 4, iclass 20, count 0 2006.229.07:42:46.91#ibcon#read 4, iclass 20, count 0 2006.229.07:42:46.91#ibcon#about to read 5, iclass 20, count 0 2006.229.07:42:46.91#ibcon#read 5, iclass 20, count 0 2006.229.07:42:46.91#ibcon#about to read 6, iclass 20, count 0 2006.229.07:42:46.91#ibcon#read 6, iclass 20, count 0 2006.229.07:42:46.91#ibcon#end of sib2, iclass 20, count 0 2006.229.07:42:46.91#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:42:46.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:42:46.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:42:46.91#ibcon#*before write, iclass 20, count 0 2006.229.07:42:46.91#ibcon#enter sib2, iclass 20, count 0 2006.229.07:42:46.91#ibcon#flushed, iclass 20, count 0 2006.229.07:42:46.91#ibcon#about to write, iclass 20, count 0 2006.229.07:42:46.91#ibcon#wrote, iclass 20, count 0 2006.229.07:42:46.91#ibcon#about to read 3, iclass 20, count 0 2006.229.07:42:46.95#ibcon#read 3, iclass 20, count 0 2006.229.07:42:46.95#ibcon#about to read 4, iclass 20, count 0 2006.229.07:42:46.95#ibcon#read 4, iclass 20, count 0 2006.229.07:42:46.95#ibcon#about to read 5, iclass 20, count 0 2006.229.07:42:46.95#ibcon#read 5, iclass 20, count 0 2006.229.07:42:46.95#ibcon#about to read 6, iclass 20, count 0 2006.229.07:42:46.95#ibcon#read 6, iclass 20, count 0 2006.229.07:42:46.95#ibcon#end of sib2, iclass 20, count 0 2006.229.07:42:46.95#ibcon#*after write, iclass 20, count 0 2006.229.07:42:46.95#ibcon#*before return 0, iclass 20, count 0 2006.229.07:42:46.95#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:46.95#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:42:46.95#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:42:46.95#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:42:46.95$vck44/vb=7,4 2006.229.07:42:46.95#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.07:42:46.95#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.07:42:46.95#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:46.95#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:47.01#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:47.01#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:47.01#ibcon#enter wrdev, iclass 22, count 2 2006.229.07:42:47.01#ibcon#first serial, iclass 22, count 2 2006.229.07:42:47.01#ibcon#enter sib2, iclass 22, count 2 2006.229.07:42:47.01#ibcon#flushed, iclass 22, count 2 2006.229.07:42:47.01#ibcon#about to write, iclass 22, count 2 2006.229.07:42:47.01#ibcon#wrote, iclass 22, count 2 2006.229.07:42:47.01#ibcon#about to read 3, iclass 22, count 2 2006.229.07:42:47.03#ibcon#read 3, iclass 22, count 2 2006.229.07:42:47.03#ibcon#about to read 4, iclass 22, count 2 2006.229.07:42:47.03#ibcon#read 4, iclass 22, count 2 2006.229.07:42:47.03#ibcon#about to read 5, iclass 22, count 2 2006.229.07:42:47.03#ibcon#read 5, iclass 22, count 2 2006.229.07:42:47.03#ibcon#about to read 6, iclass 22, count 2 2006.229.07:42:47.03#ibcon#read 6, iclass 22, count 2 2006.229.07:42:47.03#ibcon#end of sib2, iclass 22, count 2 2006.229.07:42:47.03#ibcon#*mode == 0, iclass 22, count 2 2006.229.07:42:47.03#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.07:42:47.03#ibcon#[27=AT07-04\r\n] 2006.229.07:42:47.03#ibcon#*before write, iclass 22, count 2 2006.229.07:42:47.03#ibcon#enter sib2, iclass 22, count 2 2006.229.07:42:47.03#ibcon#flushed, iclass 22, count 2 2006.229.07:42:47.03#ibcon#about to write, iclass 22, count 2 2006.229.07:42:47.03#ibcon#wrote, iclass 22, count 2 2006.229.07:42:47.03#ibcon#about to read 3, iclass 22, count 2 2006.229.07:42:47.06#ibcon#read 3, iclass 22, count 2 2006.229.07:42:47.06#ibcon#about to read 4, iclass 22, count 2 2006.229.07:42:47.06#ibcon#read 4, iclass 22, count 2 2006.229.07:42:47.06#ibcon#about to read 5, iclass 22, count 2 2006.229.07:42:47.06#ibcon#read 5, iclass 22, count 2 2006.229.07:42:47.06#ibcon#about to read 6, iclass 22, count 2 2006.229.07:42:47.06#ibcon#read 6, iclass 22, count 2 2006.229.07:42:47.06#ibcon#end of sib2, iclass 22, count 2 2006.229.07:42:47.06#ibcon#*after write, iclass 22, count 2 2006.229.07:42:47.06#ibcon#*before return 0, iclass 22, count 2 2006.229.07:42:47.06#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:47.06#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:42:47.06#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.07:42:47.06#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:47.06#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:47.18#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:47.18#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:47.18#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:42:47.18#ibcon#first serial, iclass 22, count 0 2006.229.07:42:47.18#ibcon#enter sib2, iclass 22, count 0 2006.229.07:42:47.18#ibcon#flushed, iclass 22, count 0 2006.229.07:42:47.18#ibcon#about to write, iclass 22, count 0 2006.229.07:42:47.18#ibcon#wrote, iclass 22, count 0 2006.229.07:42:47.18#ibcon#about to read 3, iclass 22, count 0 2006.229.07:42:47.20#ibcon#read 3, iclass 22, count 0 2006.229.07:42:47.20#ibcon#about to read 4, iclass 22, count 0 2006.229.07:42:47.20#ibcon#read 4, iclass 22, count 0 2006.229.07:42:47.20#ibcon#about to read 5, iclass 22, count 0 2006.229.07:42:47.20#ibcon#read 5, iclass 22, count 0 2006.229.07:42:47.20#ibcon#about to read 6, iclass 22, count 0 2006.229.07:42:47.20#ibcon#read 6, iclass 22, count 0 2006.229.07:42:47.20#ibcon#end of sib2, iclass 22, count 0 2006.229.07:42:47.20#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:42:47.20#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:42:47.20#ibcon#[27=USB\r\n] 2006.229.07:42:47.20#ibcon#*before write, iclass 22, count 0 2006.229.07:42:47.20#ibcon#enter sib2, iclass 22, count 0 2006.229.07:42:47.20#ibcon#flushed, iclass 22, count 0 2006.229.07:42:47.20#ibcon#about to write, iclass 22, count 0 2006.229.07:42:47.20#ibcon#wrote, iclass 22, count 0 2006.229.07:42:47.20#ibcon#about to read 3, iclass 22, count 0 2006.229.07:42:47.23#ibcon#read 3, iclass 22, count 0 2006.229.07:42:47.23#ibcon#about to read 4, iclass 22, count 0 2006.229.07:42:47.23#ibcon#read 4, iclass 22, count 0 2006.229.07:42:47.23#ibcon#about to read 5, iclass 22, count 0 2006.229.07:42:47.23#ibcon#read 5, iclass 22, count 0 2006.229.07:42:47.23#ibcon#about to read 6, iclass 22, count 0 2006.229.07:42:47.23#ibcon#read 6, iclass 22, count 0 2006.229.07:42:47.23#ibcon#end of sib2, iclass 22, count 0 2006.229.07:42:47.23#ibcon#*after write, iclass 22, count 0 2006.229.07:42:47.23#ibcon#*before return 0, iclass 22, count 0 2006.229.07:42:47.23#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:47.23#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:42:47.23#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:42:47.23#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:42:47.23$vck44/vblo=8,744.99 2006.229.07:42:47.23#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.07:42:47.23#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.07:42:47.23#ibcon#ireg 17 cls_cnt 0 2006.229.07:42:47.23#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:47.23#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:47.23#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:47.23#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:42:47.23#ibcon#first serial, iclass 24, count 0 2006.229.07:42:47.23#ibcon#enter sib2, iclass 24, count 0 2006.229.07:42:47.23#ibcon#flushed, iclass 24, count 0 2006.229.07:42:47.23#ibcon#about to write, iclass 24, count 0 2006.229.07:42:47.23#ibcon#wrote, iclass 24, count 0 2006.229.07:42:47.23#ibcon#about to read 3, iclass 24, count 0 2006.229.07:42:47.25#ibcon#read 3, iclass 24, count 0 2006.229.07:42:47.25#ibcon#about to read 4, iclass 24, count 0 2006.229.07:42:47.25#ibcon#read 4, iclass 24, count 0 2006.229.07:42:47.25#ibcon#about to read 5, iclass 24, count 0 2006.229.07:42:47.25#ibcon#read 5, iclass 24, count 0 2006.229.07:42:47.25#ibcon#about to read 6, iclass 24, count 0 2006.229.07:42:47.25#ibcon#read 6, iclass 24, count 0 2006.229.07:42:47.25#ibcon#end of sib2, iclass 24, count 0 2006.229.07:42:47.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:42:47.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:42:47.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:42:47.25#ibcon#*before write, iclass 24, count 0 2006.229.07:42:47.25#ibcon#enter sib2, iclass 24, count 0 2006.229.07:42:47.25#ibcon#flushed, iclass 24, count 0 2006.229.07:42:47.25#ibcon#about to write, iclass 24, count 0 2006.229.07:42:47.25#ibcon#wrote, iclass 24, count 0 2006.229.07:42:47.25#ibcon#about to read 3, iclass 24, count 0 2006.229.07:42:47.29#ibcon#read 3, iclass 24, count 0 2006.229.07:42:47.29#ibcon#about to read 4, iclass 24, count 0 2006.229.07:42:47.29#ibcon#read 4, iclass 24, count 0 2006.229.07:42:47.29#ibcon#about to read 5, iclass 24, count 0 2006.229.07:42:47.29#ibcon#read 5, iclass 24, count 0 2006.229.07:42:47.29#ibcon#about to read 6, iclass 24, count 0 2006.229.07:42:47.29#ibcon#read 6, iclass 24, count 0 2006.229.07:42:47.29#ibcon#end of sib2, iclass 24, count 0 2006.229.07:42:47.29#ibcon#*after write, iclass 24, count 0 2006.229.07:42:47.29#ibcon#*before return 0, iclass 24, count 0 2006.229.07:42:47.29#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:47.29#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:42:47.29#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:42:47.29#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:42:47.29$vck44/vb=8,4 2006.229.07:42:47.29#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.07:42:47.29#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.07:42:47.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:42:47.29#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:47.35#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:47.35#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:47.35#ibcon#enter wrdev, iclass 26, count 2 2006.229.07:42:47.35#ibcon#first serial, iclass 26, count 2 2006.229.07:42:47.35#ibcon#enter sib2, iclass 26, count 2 2006.229.07:42:47.35#ibcon#flushed, iclass 26, count 2 2006.229.07:42:47.35#ibcon#about to write, iclass 26, count 2 2006.229.07:42:47.35#ibcon#wrote, iclass 26, count 2 2006.229.07:42:47.35#ibcon#about to read 3, iclass 26, count 2 2006.229.07:42:47.37#ibcon#read 3, iclass 26, count 2 2006.229.07:42:47.37#ibcon#about to read 4, iclass 26, count 2 2006.229.07:42:47.37#ibcon#read 4, iclass 26, count 2 2006.229.07:42:47.37#ibcon#about to read 5, iclass 26, count 2 2006.229.07:42:47.37#ibcon#read 5, iclass 26, count 2 2006.229.07:42:47.37#ibcon#about to read 6, iclass 26, count 2 2006.229.07:42:47.37#ibcon#read 6, iclass 26, count 2 2006.229.07:42:47.37#ibcon#end of sib2, iclass 26, count 2 2006.229.07:42:47.37#ibcon#*mode == 0, iclass 26, count 2 2006.229.07:42:47.37#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.07:42:47.37#ibcon#[27=AT08-04\r\n] 2006.229.07:42:47.37#ibcon#*before write, iclass 26, count 2 2006.229.07:42:47.37#ibcon#enter sib2, iclass 26, count 2 2006.229.07:42:47.37#ibcon#flushed, iclass 26, count 2 2006.229.07:42:47.37#ibcon#about to write, iclass 26, count 2 2006.229.07:42:47.37#ibcon#wrote, iclass 26, count 2 2006.229.07:42:47.37#ibcon#about to read 3, iclass 26, count 2 2006.229.07:42:47.40#ibcon#read 3, iclass 26, count 2 2006.229.07:42:47.40#ibcon#about to read 4, iclass 26, count 2 2006.229.07:42:47.40#ibcon#read 4, iclass 26, count 2 2006.229.07:42:47.40#ibcon#about to read 5, iclass 26, count 2 2006.229.07:42:47.40#ibcon#read 5, iclass 26, count 2 2006.229.07:42:47.40#ibcon#about to read 6, iclass 26, count 2 2006.229.07:42:47.40#ibcon#read 6, iclass 26, count 2 2006.229.07:42:47.40#ibcon#end of sib2, iclass 26, count 2 2006.229.07:42:47.40#ibcon#*after write, iclass 26, count 2 2006.229.07:42:47.40#ibcon#*before return 0, iclass 26, count 2 2006.229.07:42:47.40#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:47.40#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:42:47.40#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.07:42:47.40#ibcon#ireg 7 cls_cnt 0 2006.229.07:42:47.40#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:47.52#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:47.52#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:47.52#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:42:47.52#ibcon#first serial, iclass 26, count 0 2006.229.07:42:47.52#ibcon#enter sib2, iclass 26, count 0 2006.229.07:42:47.52#ibcon#flushed, iclass 26, count 0 2006.229.07:42:47.52#ibcon#about to write, iclass 26, count 0 2006.229.07:42:47.52#ibcon#wrote, iclass 26, count 0 2006.229.07:42:47.52#ibcon#about to read 3, iclass 26, count 0 2006.229.07:42:47.54#ibcon#read 3, iclass 26, count 0 2006.229.07:42:47.54#ibcon#about to read 4, iclass 26, count 0 2006.229.07:42:47.54#ibcon#read 4, iclass 26, count 0 2006.229.07:42:47.54#ibcon#about to read 5, iclass 26, count 0 2006.229.07:42:47.54#ibcon#read 5, iclass 26, count 0 2006.229.07:42:47.54#ibcon#about to read 6, iclass 26, count 0 2006.229.07:42:47.54#ibcon#read 6, iclass 26, count 0 2006.229.07:42:47.54#ibcon#end of sib2, iclass 26, count 0 2006.229.07:42:47.54#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:42:47.54#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:42:47.54#ibcon#[27=USB\r\n] 2006.229.07:42:47.54#ibcon#*before write, iclass 26, count 0 2006.229.07:42:47.54#ibcon#enter sib2, iclass 26, count 0 2006.229.07:42:47.54#ibcon#flushed, iclass 26, count 0 2006.229.07:42:47.54#ibcon#about to write, iclass 26, count 0 2006.229.07:42:47.54#ibcon#wrote, iclass 26, count 0 2006.229.07:42:47.54#ibcon#about to read 3, iclass 26, count 0 2006.229.07:42:47.57#ibcon#read 3, iclass 26, count 0 2006.229.07:42:47.57#ibcon#about to read 4, iclass 26, count 0 2006.229.07:42:47.57#ibcon#read 4, iclass 26, count 0 2006.229.07:42:47.57#ibcon#about to read 5, iclass 26, count 0 2006.229.07:42:47.57#ibcon#read 5, iclass 26, count 0 2006.229.07:42:47.57#ibcon#about to read 6, iclass 26, count 0 2006.229.07:42:47.57#ibcon#read 6, iclass 26, count 0 2006.229.07:42:47.57#ibcon#end of sib2, iclass 26, count 0 2006.229.07:42:47.57#ibcon#*after write, iclass 26, count 0 2006.229.07:42:47.57#ibcon#*before return 0, iclass 26, count 0 2006.229.07:42:47.57#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:47.57#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:42:47.57#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:42:47.57#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:42:47.57$vck44/vabw=wide 2006.229.07:42:47.57#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.07:42:47.57#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.07:42:47.57#ibcon#ireg 8 cls_cnt 0 2006.229.07:42:47.57#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:47.57#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:47.57#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:47.57#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:42:47.57#ibcon#first serial, iclass 28, count 0 2006.229.07:42:47.57#ibcon#enter sib2, iclass 28, count 0 2006.229.07:42:47.57#ibcon#flushed, iclass 28, count 0 2006.229.07:42:47.57#ibcon#about to write, iclass 28, count 0 2006.229.07:42:47.57#ibcon#wrote, iclass 28, count 0 2006.229.07:42:47.57#ibcon#about to read 3, iclass 28, count 0 2006.229.07:42:47.59#ibcon#read 3, iclass 28, count 0 2006.229.07:42:47.59#ibcon#about to read 4, iclass 28, count 0 2006.229.07:42:47.59#ibcon#read 4, iclass 28, count 0 2006.229.07:42:47.59#ibcon#about to read 5, iclass 28, count 0 2006.229.07:42:47.59#ibcon#read 5, iclass 28, count 0 2006.229.07:42:47.59#ibcon#about to read 6, iclass 28, count 0 2006.229.07:42:47.59#ibcon#read 6, iclass 28, count 0 2006.229.07:42:47.59#ibcon#end of sib2, iclass 28, count 0 2006.229.07:42:47.59#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:42:47.59#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:42:47.59#ibcon#[25=BW32\r\n] 2006.229.07:42:47.59#ibcon#*before write, iclass 28, count 0 2006.229.07:42:47.59#ibcon#enter sib2, iclass 28, count 0 2006.229.07:42:47.59#ibcon#flushed, iclass 28, count 0 2006.229.07:42:47.59#ibcon#about to write, iclass 28, count 0 2006.229.07:42:47.59#ibcon#wrote, iclass 28, count 0 2006.229.07:42:47.59#ibcon#about to read 3, iclass 28, count 0 2006.229.07:42:47.62#ibcon#read 3, iclass 28, count 0 2006.229.07:42:47.62#ibcon#about to read 4, iclass 28, count 0 2006.229.07:42:47.62#ibcon#read 4, iclass 28, count 0 2006.229.07:42:47.62#ibcon#about to read 5, iclass 28, count 0 2006.229.07:42:47.62#ibcon#read 5, iclass 28, count 0 2006.229.07:42:47.62#ibcon#about to read 6, iclass 28, count 0 2006.229.07:42:47.62#ibcon#read 6, iclass 28, count 0 2006.229.07:42:47.62#ibcon#end of sib2, iclass 28, count 0 2006.229.07:42:47.62#ibcon#*after write, iclass 28, count 0 2006.229.07:42:47.62#ibcon#*before return 0, iclass 28, count 0 2006.229.07:42:47.62#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:47.62#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:42:47.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:42:47.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:42:47.62$vck44/vbbw=wide 2006.229.07:42:47.62#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:42:47.62#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:42:47.62#ibcon#ireg 8 cls_cnt 0 2006.229.07:42:47.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:42:47.69#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:42:47.69#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:42:47.69#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:42:47.69#ibcon#first serial, iclass 30, count 0 2006.229.07:42:47.69#ibcon#enter sib2, iclass 30, count 0 2006.229.07:42:47.69#ibcon#flushed, iclass 30, count 0 2006.229.07:42:47.69#ibcon#about to write, iclass 30, count 0 2006.229.07:42:47.69#ibcon#wrote, iclass 30, count 0 2006.229.07:42:47.69#ibcon#about to read 3, iclass 30, count 0 2006.229.07:42:47.71#ibcon#read 3, iclass 30, count 0 2006.229.07:42:47.71#ibcon#about to read 4, iclass 30, count 0 2006.229.07:42:47.71#ibcon#read 4, iclass 30, count 0 2006.229.07:42:47.71#ibcon#about to read 5, iclass 30, count 0 2006.229.07:42:47.71#ibcon#read 5, iclass 30, count 0 2006.229.07:42:47.71#ibcon#about to read 6, iclass 30, count 0 2006.229.07:42:47.71#ibcon#read 6, iclass 30, count 0 2006.229.07:42:47.71#ibcon#end of sib2, iclass 30, count 0 2006.229.07:42:47.71#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:42:47.71#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:42:47.71#ibcon#[27=BW32\r\n] 2006.229.07:42:47.71#ibcon#*before write, iclass 30, count 0 2006.229.07:42:47.71#ibcon#enter sib2, iclass 30, count 0 2006.229.07:42:47.71#ibcon#flushed, iclass 30, count 0 2006.229.07:42:47.71#ibcon#about to write, iclass 30, count 0 2006.229.07:42:47.71#ibcon#wrote, iclass 30, count 0 2006.229.07:42:47.71#ibcon#about to read 3, iclass 30, count 0 2006.229.07:42:47.74#ibcon#read 3, iclass 30, count 0 2006.229.07:42:47.74#ibcon#about to read 4, iclass 30, count 0 2006.229.07:42:47.74#ibcon#read 4, iclass 30, count 0 2006.229.07:42:47.74#ibcon#about to read 5, iclass 30, count 0 2006.229.07:42:47.74#ibcon#read 5, iclass 30, count 0 2006.229.07:42:47.74#ibcon#about to read 6, iclass 30, count 0 2006.229.07:42:47.74#ibcon#read 6, iclass 30, count 0 2006.229.07:42:47.74#ibcon#end of sib2, iclass 30, count 0 2006.229.07:42:47.74#ibcon#*after write, iclass 30, count 0 2006.229.07:42:47.74#ibcon#*before return 0, iclass 30, count 0 2006.229.07:42:47.74#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:42:47.74#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:42:47.74#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:42:47.74#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:42:47.74$setupk4/ifdk4 2006.229.07:42:47.74$ifdk4/lo= 2006.229.07:42:47.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:42:47.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:42:47.74$ifdk4/patch= 2006.229.07:42:47.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:42:47.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:42:47.74$setupk4/!*+20s 2006.229.07:42:58.14#trakl#Source acquired 2006.229.07:42:59.14#flagr#flagr/antenna,acquired 2006.229.07:43:02.25$setupk4/"tpicd 2006.229.07:43:02.25$setupk4/echo=off 2006.229.07:43:02.25$setupk4/xlog=off 2006.229.07:43:02.25:!2006.229.07:44:59 2006.229.07:44:59.00:preob 2006.229.07:45:00.14/onsource/TRACKING 2006.229.07:45:00.14:!2006.229.07:45:09 2006.229.07:45:09.00:"tape 2006.229.07:45:09.00:"st=record 2006.229.07:45:09.00:data_valid=on 2006.229.07:45:09.00:midob 2006.229.07:45:09.14/onsource/TRACKING 2006.229.07:45:09.14/wx/29.95,1000.5,94 2006.229.07:45:09.23/cable/+6.3962E-03 2006.229.07:45:10.32/va/01,08,usb,yes,31,34 2006.229.07:45:10.32/va/02,07,usb,yes,34,35 2006.229.07:45:10.32/va/03,06,usb,yes,42,45 2006.229.07:45:10.32/va/04,07,usb,yes,35,37 2006.229.07:45:10.32/va/05,04,usb,yes,31,32 2006.229.07:45:10.32/va/06,04,usb,yes,35,35 2006.229.07:45:10.32/va/07,05,usb,yes,31,32 2006.229.07:45:10.32/va/08,06,usb,yes,22,28 2006.229.07:45:10.55/valo/01,524.99,yes,locked 2006.229.07:45:10.55/valo/02,534.99,yes,locked 2006.229.07:45:10.55/valo/03,564.99,yes,locked 2006.229.07:45:10.55/valo/04,624.99,yes,locked 2006.229.07:45:10.55/valo/05,734.99,yes,locked 2006.229.07:45:10.55/valo/06,814.99,yes,locked 2006.229.07:45:10.55/valo/07,864.99,yes,locked 2006.229.07:45:10.55/valo/08,884.99,yes,locked 2006.229.07:45:11.64/vb/01,04,usb,yes,38,35 2006.229.07:45:11.64/vb/02,04,usb,yes,41,41 2006.229.07:45:11.64/vb/03,04,usb,yes,37,41 2006.229.07:45:11.64/vb/04,04,usb,yes,42,41 2006.229.07:45:11.64/vb/05,04,usb,yes,33,36 2006.229.07:45:11.64/vb/06,04,usb,yes,39,34 2006.229.07:45:11.64/vb/07,04,usb,yes,38,38 2006.229.07:45:11.64/vb/08,04,usb,yes,35,39 2006.229.07:45:11.87/vblo/01,629.99,yes,locked 2006.229.07:45:11.87/vblo/02,634.99,yes,locked 2006.229.07:45:11.87/vblo/03,649.99,yes,locked 2006.229.07:45:11.87/vblo/04,679.99,yes,locked 2006.229.07:45:11.87/vblo/05,709.99,yes,locked 2006.229.07:45:11.87/vblo/06,719.99,yes,locked 2006.229.07:45:11.87/vblo/07,734.99,yes,locked 2006.229.07:45:11.87/vblo/08,744.99,yes,locked 2006.229.07:45:12.02/vabw/8 2006.229.07:45:12.17/vbbw/8 2006.229.07:45:12.26/xfe/off,on,12.5 2006.229.07:45:12.63/ifatt/23,28,28,28 2006.229.07:45:13.08/fmout-gps/S +4.50E-07 2006.229.07:45:13.12:!2006.229.07:46:59 2006.229.07:46:59.01:data_valid=off 2006.229.07:46:59.01:"et 2006.229.07:46:59.02:!+3s 2006.229.07:47:02.03:"tape 2006.229.07:47:02.03:postob 2006.229.07:47:02.11/cable/+6.3977E-03 2006.229.07:47:02.11/wx/29.94,1000.5,93 2006.229.07:47:02.17/fmout-gps/S +4.51E-07 2006.229.07:47:02.17:scan_name=229-0750,jd0608,490 2006.229.07:47:02.17:source=2201+315,220314.98,314538.3,2000.0,cw 2006.229.07:47:03.14#flagr#flagr/antenna,new-source 2006.229.07:47:03.14:checkk5 2006.229.07:47:03.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:47:03.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:47:04.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:47:04.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:47:05.15/chk_obsdata//k5ts1/T2290745??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.07:47:05.54/chk_obsdata//k5ts2/T2290745??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.07:47:05.94/chk_obsdata//k5ts3/T2290745??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.07:47:06.33/chk_obsdata//k5ts4/T2290745??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.07:47:07.05/k5log//k5ts1_log_newline 2006.229.07:47:07.75/k5log//k5ts2_log_newline 2006.229.07:47:08.49/k5log//k5ts3_log_newline 2006.229.07:47:09.21/k5log//k5ts4_log_newline 2006.229.07:47:09.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:47:09.24:setupk4=1 2006.229.07:47:09.24$setupk4/echo=on 2006.229.07:47:09.24$setupk4/pcalon 2006.229.07:47:09.24$pcalon/"no phase cal control is implemented here 2006.229.07:47:09.24$setupk4/"tpicd=stop 2006.229.07:47:09.24$setupk4/"rec=synch_on 2006.229.07:47:09.24$setupk4/"rec_mode=128 2006.229.07:47:09.24$setupk4/!* 2006.229.07:47:09.24$setupk4/recpk4 2006.229.07:47:09.24$recpk4/recpatch= 2006.229.07:47:09.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:47:09.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:47:09.24$setupk4/vck44 2006.229.07:47:09.24$vck44/valo=1,524.99 2006.229.07:47:09.24#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.07:47:09.24#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.07:47:09.24#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:09.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:09.24#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:09.24#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:09.24#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:47:09.24#ibcon#first serial, iclass 22, count 0 2006.229.07:47:09.24#ibcon#enter sib2, iclass 22, count 0 2006.229.07:47:09.24#ibcon#flushed, iclass 22, count 0 2006.229.07:47:09.24#ibcon#about to write, iclass 22, count 0 2006.229.07:47:09.24#ibcon#wrote, iclass 22, count 0 2006.229.07:47:09.24#ibcon#about to read 3, iclass 22, count 0 2006.229.07:47:09.26#ibcon#read 3, iclass 22, count 0 2006.229.07:47:09.26#ibcon#about to read 4, iclass 22, count 0 2006.229.07:47:09.26#ibcon#read 4, iclass 22, count 0 2006.229.07:47:09.26#ibcon#about to read 5, iclass 22, count 0 2006.229.07:47:09.26#ibcon#read 5, iclass 22, count 0 2006.229.07:47:09.26#ibcon#about to read 6, iclass 22, count 0 2006.229.07:47:09.26#ibcon#read 6, iclass 22, count 0 2006.229.07:47:09.26#ibcon#end of sib2, iclass 22, count 0 2006.229.07:47:09.26#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:47:09.26#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:47:09.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:47:09.26#ibcon#*before write, iclass 22, count 0 2006.229.07:47:09.26#ibcon#enter sib2, iclass 22, count 0 2006.229.07:47:09.26#ibcon#flushed, iclass 22, count 0 2006.229.07:47:09.26#ibcon#about to write, iclass 22, count 0 2006.229.07:47:09.26#ibcon#wrote, iclass 22, count 0 2006.229.07:47:09.26#ibcon#about to read 3, iclass 22, count 0 2006.229.07:47:09.31#ibcon#read 3, iclass 22, count 0 2006.229.07:47:09.31#ibcon#about to read 4, iclass 22, count 0 2006.229.07:47:09.31#ibcon#read 4, iclass 22, count 0 2006.229.07:47:09.31#ibcon#about to read 5, iclass 22, count 0 2006.229.07:47:09.31#ibcon#read 5, iclass 22, count 0 2006.229.07:47:09.31#ibcon#about to read 6, iclass 22, count 0 2006.229.07:47:09.31#ibcon#read 6, iclass 22, count 0 2006.229.07:47:09.31#ibcon#end of sib2, iclass 22, count 0 2006.229.07:47:09.31#ibcon#*after write, iclass 22, count 0 2006.229.07:47:09.31#ibcon#*before return 0, iclass 22, count 0 2006.229.07:47:09.31#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:09.31#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:09.31#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:47:09.31#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:47:09.31$vck44/va=1,8 2006.229.07:47:09.31#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.07:47:09.31#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.07:47:09.31#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:09.31#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:09.31#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:09.31#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:09.31#ibcon#enter wrdev, iclass 24, count 2 2006.229.07:47:09.31#ibcon#first serial, iclass 24, count 2 2006.229.07:47:09.31#ibcon#enter sib2, iclass 24, count 2 2006.229.07:47:09.31#ibcon#flushed, iclass 24, count 2 2006.229.07:47:09.31#ibcon#about to write, iclass 24, count 2 2006.229.07:47:09.31#ibcon#wrote, iclass 24, count 2 2006.229.07:47:09.31#ibcon#about to read 3, iclass 24, count 2 2006.229.07:47:09.33#ibcon#read 3, iclass 24, count 2 2006.229.07:47:09.33#ibcon#about to read 4, iclass 24, count 2 2006.229.07:47:09.33#ibcon#read 4, iclass 24, count 2 2006.229.07:47:09.33#ibcon#about to read 5, iclass 24, count 2 2006.229.07:47:09.33#ibcon#read 5, iclass 24, count 2 2006.229.07:47:09.33#ibcon#about to read 6, iclass 24, count 2 2006.229.07:47:09.33#ibcon#read 6, iclass 24, count 2 2006.229.07:47:09.33#ibcon#end of sib2, iclass 24, count 2 2006.229.07:47:09.33#ibcon#*mode == 0, iclass 24, count 2 2006.229.07:47:09.33#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.07:47:09.33#ibcon#[25=AT01-08\r\n] 2006.229.07:47:09.33#ibcon#*before write, iclass 24, count 2 2006.229.07:47:09.33#ibcon#enter sib2, iclass 24, count 2 2006.229.07:47:09.33#ibcon#flushed, iclass 24, count 2 2006.229.07:47:09.33#ibcon#about to write, iclass 24, count 2 2006.229.07:47:09.33#ibcon#wrote, iclass 24, count 2 2006.229.07:47:09.33#ibcon#about to read 3, iclass 24, count 2 2006.229.07:47:09.36#ibcon#read 3, iclass 24, count 2 2006.229.07:47:09.36#ibcon#about to read 4, iclass 24, count 2 2006.229.07:47:09.36#ibcon#read 4, iclass 24, count 2 2006.229.07:47:09.36#ibcon#about to read 5, iclass 24, count 2 2006.229.07:47:09.36#ibcon#read 5, iclass 24, count 2 2006.229.07:47:09.36#ibcon#about to read 6, iclass 24, count 2 2006.229.07:47:09.36#ibcon#read 6, iclass 24, count 2 2006.229.07:47:09.36#ibcon#end of sib2, iclass 24, count 2 2006.229.07:47:09.36#ibcon#*after write, iclass 24, count 2 2006.229.07:47:09.36#ibcon#*before return 0, iclass 24, count 2 2006.229.07:47:09.36#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:09.36#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:09.36#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.07:47:09.36#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:09.36#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:09.48#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:09.48#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:09.48#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:47:09.48#ibcon#first serial, iclass 24, count 0 2006.229.07:47:09.48#ibcon#enter sib2, iclass 24, count 0 2006.229.07:47:09.48#ibcon#flushed, iclass 24, count 0 2006.229.07:47:09.48#ibcon#about to write, iclass 24, count 0 2006.229.07:47:09.48#ibcon#wrote, iclass 24, count 0 2006.229.07:47:09.48#ibcon#about to read 3, iclass 24, count 0 2006.229.07:47:09.50#ibcon#read 3, iclass 24, count 0 2006.229.07:47:09.50#ibcon#about to read 4, iclass 24, count 0 2006.229.07:47:09.50#ibcon#read 4, iclass 24, count 0 2006.229.07:47:09.50#ibcon#about to read 5, iclass 24, count 0 2006.229.07:47:09.50#ibcon#read 5, iclass 24, count 0 2006.229.07:47:09.50#ibcon#about to read 6, iclass 24, count 0 2006.229.07:47:09.50#ibcon#read 6, iclass 24, count 0 2006.229.07:47:09.50#ibcon#end of sib2, iclass 24, count 0 2006.229.07:47:09.50#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:47:09.50#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:47:09.50#ibcon#[25=USB\r\n] 2006.229.07:47:09.50#ibcon#*before write, iclass 24, count 0 2006.229.07:47:09.50#ibcon#enter sib2, iclass 24, count 0 2006.229.07:47:09.50#ibcon#flushed, iclass 24, count 0 2006.229.07:47:09.50#ibcon#about to write, iclass 24, count 0 2006.229.07:47:09.50#ibcon#wrote, iclass 24, count 0 2006.229.07:47:09.50#ibcon#about to read 3, iclass 24, count 0 2006.229.07:47:09.53#ibcon#read 3, iclass 24, count 0 2006.229.07:47:09.53#ibcon#about to read 4, iclass 24, count 0 2006.229.07:47:09.53#ibcon#read 4, iclass 24, count 0 2006.229.07:47:09.53#ibcon#about to read 5, iclass 24, count 0 2006.229.07:47:09.53#ibcon#read 5, iclass 24, count 0 2006.229.07:47:09.53#ibcon#about to read 6, iclass 24, count 0 2006.229.07:47:09.53#ibcon#read 6, iclass 24, count 0 2006.229.07:47:09.53#ibcon#end of sib2, iclass 24, count 0 2006.229.07:47:09.53#ibcon#*after write, iclass 24, count 0 2006.229.07:47:09.53#ibcon#*before return 0, iclass 24, count 0 2006.229.07:47:09.53#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:09.53#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:09.53#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:47:09.53#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:47:09.53$vck44/valo=2,534.99 2006.229.07:47:09.53#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.07:47:09.53#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.07:47:09.53#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:09.53#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:09.53#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:09.53#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:09.53#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:47:09.53#ibcon#first serial, iclass 26, count 0 2006.229.07:47:09.53#ibcon#enter sib2, iclass 26, count 0 2006.229.07:47:09.53#ibcon#flushed, iclass 26, count 0 2006.229.07:47:09.53#ibcon#about to write, iclass 26, count 0 2006.229.07:47:09.53#ibcon#wrote, iclass 26, count 0 2006.229.07:47:09.53#ibcon#about to read 3, iclass 26, count 0 2006.229.07:47:09.55#ibcon#read 3, iclass 26, count 0 2006.229.07:47:09.55#ibcon#about to read 4, iclass 26, count 0 2006.229.07:47:09.55#ibcon#read 4, iclass 26, count 0 2006.229.07:47:09.55#ibcon#about to read 5, iclass 26, count 0 2006.229.07:47:09.55#ibcon#read 5, iclass 26, count 0 2006.229.07:47:09.55#ibcon#about to read 6, iclass 26, count 0 2006.229.07:47:09.55#ibcon#read 6, iclass 26, count 0 2006.229.07:47:09.55#ibcon#end of sib2, iclass 26, count 0 2006.229.07:47:09.55#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:47:09.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:47:09.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:47:09.55#ibcon#*before write, iclass 26, count 0 2006.229.07:47:09.55#ibcon#enter sib2, iclass 26, count 0 2006.229.07:47:09.55#ibcon#flushed, iclass 26, count 0 2006.229.07:47:09.55#ibcon#about to write, iclass 26, count 0 2006.229.07:47:09.55#ibcon#wrote, iclass 26, count 0 2006.229.07:47:09.55#ibcon#about to read 3, iclass 26, count 0 2006.229.07:47:09.59#ibcon#read 3, iclass 26, count 0 2006.229.07:47:09.59#ibcon#about to read 4, iclass 26, count 0 2006.229.07:47:09.59#ibcon#read 4, iclass 26, count 0 2006.229.07:47:09.59#ibcon#about to read 5, iclass 26, count 0 2006.229.07:47:09.59#ibcon#read 5, iclass 26, count 0 2006.229.07:47:09.59#ibcon#about to read 6, iclass 26, count 0 2006.229.07:47:09.59#ibcon#read 6, iclass 26, count 0 2006.229.07:47:09.59#ibcon#end of sib2, iclass 26, count 0 2006.229.07:47:09.59#ibcon#*after write, iclass 26, count 0 2006.229.07:47:09.59#ibcon#*before return 0, iclass 26, count 0 2006.229.07:47:09.59#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:09.59#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:09.59#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:47:09.59#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:47:09.59$vck44/va=2,7 2006.229.07:47:09.59#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.07:47:09.59#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.07:47:09.59#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:09.59#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:09.65#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:09.65#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:09.65#ibcon#enter wrdev, iclass 28, count 2 2006.229.07:47:09.65#ibcon#first serial, iclass 28, count 2 2006.229.07:47:09.65#ibcon#enter sib2, iclass 28, count 2 2006.229.07:47:09.65#ibcon#flushed, iclass 28, count 2 2006.229.07:47:09.65#ibcon#about to write, iclass 28, count 2 2006.229.07:47:09.65#ibcon#wrote, iclass 28, count 2 2006.229.07:47:09.65#ibcon#about to read 3, iclass 28, count 2 2006.229.07:47:09.67#ibcon#read 3, iclass 28, count 2 2006.229.07:47:09.67#ibcon#about to read 4, iclass 28, count 2 2006.229.07:47:09.67#ibcon#read 4, iclass 28, count 2 2006.229.07:47:09.67#ibcon#about to read 5, iclass 28, count 2 2006.229.07:47:09.67#ibcon#read 5, iclass 28, count 2 2006.229.07:47:09.67#ibcon#about to read 6, iclass 28, count 2 2006.229.07:47:09.67#ibcon#read 6, iclass 28, count 2 2006.229.07:47:09.67#ibcon#end of sib2, iclass 28, count 2 2006.229.07:47:09.67#ibcon#*mode == 0, iclass 28, count 2 2006.229.07:47:09.67#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.07:47:09.67#ibcon#[25=AT02-07\r\n] 2006.229.07:47:09.67#ibcon#*before write, iclass 28, count 2 2006.229.07:47:09.67#ibcon#enter sib2, iclass 28, count 2 2006.229.07:47:09.67#ibcon#flushed, iclass 28, count 2 2006.229.07:47:09.67#ibcon#about to write, iclass 28, count 2 2006.229.07:47:09.67#ibcon#wrote, iclass 28, count 2 2006.229.07:47:09.67#ibcon#about to read 3, iclass 28, count 2 2006.229.07:47:09.70#ibcon#read 3, iclass 28, count 2 2006.229.07:47:09.70#ibcon#about to read 4, iclass 28, count 2 2006.229.07:47:09.70#ibcon#read 4, iclass 28, count 2 2006.229.07:47:09.70#ibcon#about to read 5, iclass 28, count 2 2006.229.07:47:09.70#ibcon#read 5, iclass 28, count 2 2006.229.07:47:09.70#ibcon#about to read 6, iclass 28, count 2 2006.229.07:47:09.70#ibcon#read 6, iclass 28, count 2 2006.229.07:47:09.70#ibcon#end of sib2, iclass 28, count 2 2006.229.07:47:09.70#ibcon#*after write, iclass 28, count 2 2006.229.07:47:09.70#ibcon#*before return 0, iclass 28, count 2 2006.229.07:47:09.70#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:09.70#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:09.70#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.07:47:09.70#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:09.70#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:09.82#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:09.82#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:09.82#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:47:09.82#ibcon#first serial, iclass 28, count 0 2006.229.07:47:09.82#ibcon#enter sib2, iclass 28, count 0 2006.229.07:47:09.82#ibcon#flushed, iclass 28, count 0 2006.229.07:47:09.82#ibcon#about to write, iclass 28, count 0 2006.229.07:47:09.82#ibcon#wrote, iclass 28, count 0 2006.229.07:47:09.82#ibcon#about to read 3, iclass 28, count 0 2006.229.07:47:09.84#ibcon#read 3, iclass 28, count 0 2006.229.07:47:09.84#ibcon#about to read 4, iclass 28, count 0 2006.229.07:47:09.84#ibcon#read 4, iclass 28, count 0 2006.229.07:47:09.84#ibcon#about to read 5, iclass 28, count 0 2006.229.07:47:09.84#ibcon#read 5, iclass 28, count 0 2006.229.07:47:09.84#ibcon#about to read 6, iclass 28, count 0 2006.229.07:47:09.84#ibcon#read 6, iclass 28, count 0 2006.229.07:47:09.84#ibcon#end of sib2, iclass 28, count 0 2006.229.07:47:09.84#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:47:09.84#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:47:09.84#ibcon#[25=USB\r\n] 2006.229.07:47:09.84#ibcon#*before write, iclass 28, count 0 2006.229.07:47:09.84#ibcon#enter sib2, iclass 28, count 0 2006.229.07:47:09.84#ibcon#flushed, iclass 28, count 0 2006.229.07:47:09.84#ibcon#about to write, iclass 28, count 0 2006.229.07:47:09.84#ibcon#wrote, iclass 28, count 0 2006.229.07:47:09.84#ibcon#about to read 3, iclass 28, count 0 2006.229.07:47:09.87#ibcon#read 3, iclass 28, count 0 2006.229.07:47:09.87#ibcon#about to read 4, iclass 28, count 0 2006.229.07:47:09.87#ibcon#read 4, iclass 28, count 0 2006.229.07:47:09.87#ibcon#about to read 5, iclass 28, count 0 2006.229.07:47:09.87#ibcon#read 5, iclass 28, count 0 2006.229.07:47:09.87#ibcon#about to read 6, iclass 28, count 0 2006.229.07:47:09.87#ibcon#read 6, iclass 28, count 0 2006.229.07:47:09.87#ibcon#end of sib2, iclass 28, count 0 2006.229.07:47:09.87#ibcon#*after write, iclass 28, count 0 2006.229.07:47:09.87#ibcon#*before return 0, iclass 28, count 0 2006.229.07:47:09.87#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:09.87#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:09.87#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:47:09.87#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:47:09.87$vck44/valo=3,564.99 2006.229.07:47:09.87#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:47:09.87#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:47:09.87#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:09.87#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:09.87#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:09.87#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:09.87#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:47:09.87#ibcon#first serial, iclass 30, count 0 2006.229.07:47:09.87#ibcon#enter sib2, iclass 30, count 0 2006.229.07:47:09.87#ibcon#flushed, iclass 30, count 0 2006.229.07:47:09.87#ibcon#about to write, iclass 30, count 0 2006.229.07:47:09.87#ibcon#wrote, iclass 30, count 0 2006.229.07:47:09.87#ibcon#about to read 3, iclass 30, count 0 2006.229.07:47:09.89#ibcon#read 3, iclass 30, count 0 2006.229.07:47:09.89#ibcon#about to read 4, iclass 30, count 0 2006.229.07:47:09.89#ibcon#read 4, iclass 30, count 0 2006.229.07:47:09.89#ibcon#about to read 5, iclass 30, count 0 2006.229.07:47:09.89#ibcon#read 5, iclass 30, count 0 2006.229.07:47:09.89#ibcon#about to read 6, iclass 30, count 0 2006.229.07:47:09.89#ibcon#read 6, iclass 30, count 0 2006.229.07:47:09.89#ibcon#end of sib2, iclass 30, count 0 2006.229.07:47:09.89#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:47:09.89#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:47:09.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:47:09.89#ibcon#*before write, iclass 30, count 0 2006.229.07:47:09.89#ibcon#enter sib2, iclass 30, count 0 2006.229.07:47:09.89#ibcon#flushed, iclass 30, count 0 2006.229.07:47:09.89#ibcon#about to write, iclass 30, count 0 2006.229.07:47:09.89#ibcon#wrote, iclass 30, count 0 2006.229.07:47:09.89#ibcon#about to read 3, iclass 30, count 0 2006.229.07:47:09.93#ibcon#read 3, iclass 30, count 0 2006.229.07:47:09.93#ibcon#about to read 4, iclass 30, count 0 2006.229.07:47:09.93#ibcon#read 4, iclass 30, count 0 2006.229.07:47:09.93#ibcon#about to read 5, iclass 30, count 0 2006.229.07:47:09.93#ibcon#read 5, iclass 30, count 0 2006.229.07:47:09.93#ibcon#about to read 6, iclass 30, count 0 2006.229.07:47:09.93#ibcon#read 6, iclass 30, count 0 2006.229.07:47:09.93#ibcon#end of sib2, iclass 30, count 0 2006.229.07:47:09.93#ibcon#*after write, iclass 30, count 0 2006.229.07:47:09.93#ibcon#*before return 0, iclass 30, count 0 2006.229.07:47:09.93#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:09.93#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:09.93#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:47:09.93#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:47:09.93$vck44/va=3,6 2006.229.07:47:09.93#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.07:47:09.93#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.07:47:09.93#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:09.93#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:09.99#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:09.99#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:09.99#ibcon#enter wrdev, iclass 32, count 2 2006.229.07:47:09.99#ibcon#first serial, iclass 32, count 2 2006.229.07:47:09.99#ibcon#enter sib2, iclass 32, count 2 2006.229.07:47:09.99#ibcon#flushed, iclass 32, count 2 2006.229.07:47:09.99#ibcon#about to write, iclass 32, count 2 2006.229.07:47:09.99#ibcon#wrote, iclass 32, count 2 2006.229.07:47:09.99#ibcon#about to read 3, iclass 32, count 2 2006.229.07:47:10.01#ibcon#read 3, iclass 32, count 2 2006.229.07:47:10.01#ibcon#about to read 4, iclass 32, count 2 2006.229.07:47:10.01#ibcon#read 4, iclass 32, count 2 2006.229.07:47:10.01#ibcon#about to read 5, iclass 32, count 2 2006.229.07:47:10.01#ibcon#read 5, iclass 32, count 2 2006.229.07:47:10.01#ibcon#about to read 6, iclass 32, count 2 2006.229.07:47:10.01#ibcon#read 6, iclass 32, count 2 2006.229.07:47:10.01#ibcon#end of sib2, iclass 32, count 2 2006.229.07:47:10.01#ibcon#*mode == 0, iclass 32, count 2 2006.229.07:47:10.01#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.07:47:10.01#ibcon#[25=AT03-06\r\n] 2006.229.07:47:10.01#ibcon#*before write, iclass 32, count 2 2006.229.07:47:10.01#ibcon#enter sib2, iclass 32, count 2 2006.229.07:47:10.01#ibcon#flushed, iclass 32, count 2 2006.229.07:47:10.01#ibcon#about to write, iclass 32, count 2 2006.229.07:47:10.01#ibcon#wrote, iclass 32, count 2 2006.229.07:47:10.01#ibcon#about to read 3, iclass 32, count 2 2006.229.07:47:10.04#ibcon#read 3, iclass 32, count 2 2006.229.07:47:10.04#ibcon#about to read 4, iclass 32, count 2 2006.229.07:47:10.04#ibcon#read 4, iclass 32, count 2 2006.229.07:47:10.04#ibcon#about to read 5, iclass 32, count 2 2006.229.07:47:10.04#ibcon#read 5, iclass 32, count 2 2006.229.07:47:10.04#ibcon#about to read 6, iclass 32, count 2 2006.229.07:47:10.04#ibcon#read 6, iclass 32, count 2 2006.229.07:47:10.04#ibcon#end of sib2, iclass 32, count 2 2006.229.07:47:10.04#ibcon#*after write, iclass 32, count 2 2006.229.07:47:10.04#ibcon#*before return 0, iclass 32, count 2 2006.229.07:47:10.04#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:10.04#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:10.04#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.07:47:10.04#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:10.04#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:10.16#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:10.16#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:10.16#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:47:10.16#ibcon#first serial, iclass 32, count 0 2006.229.07:47:10.16#ibcon#enter sib2, iclass 32, count 0 2006.229.07:47:10.16#ibcon#flushed, iclass 32, count 0 2006.229.07:47:10.16#ibcon#about to write, iclass 32, count 0 2006.229.07:47:10.16#ibcon#wrote, iclass 32, count 0 2006.229.07:47:10.16#ibcon#about to read 3, iclass 32, count 0 2006.229.07:47:10.18#ibcon#read 3, iclass 32, count 0 2006.229.07:47:10.18#ibcon#about to read 4, iclass 32, count 0 2006.229.07:47:10.18#ibcon#read 4, iclass 32, count 0 2006.229.07:47:10.18#ibcon#about to read 5, iclass 32, count 0 2006.229.07:47:10.18#ibcon#read 5, iclass 32, count 0 2006.229.07:47:10.18#ibcon#about to read 6, iclass 32, count 0 2006.229.07:47:10.18#ibcon#read 6, iclass 32, count 0 2006.229.07:47:10.18#ibcon#end of sib2, iclass 32, count 0 2006.229.07:47:10.18#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:47:10.18#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:47:10.18#ibcon#[25=USB\r\n] 2006.229.07:47:10.18#ibcon#*before write, iclass 32, count 0 2006.229.07:47:10.18#ibcon#enter sib2, iclass 32, count 0 2006.229.07:47:10.18#ibcon#flushed, iclass 32, count 0 2006.229.07:47:10.18#ibcon#about to write, iclass 32, count 0 2006.229.07:47:10.18#ibcon#wrote, iclass 32, count 0 2006.229.07:47:10.18#ibcon#about to read 3, iclass 32, count 0 2006.229.07:47:10.21#ibcon#read 3, iclass 32, count 0 2006.229.07:47:10.21#ibcon#about to read 4, iclass 32, count 0 2006.229.07:47:10.21#ibcon#read 4, iclass 32, count 0 2006.229.07:47:10.21#ibcon#about to read 5, iclass 32, count 0 2006.229.07:47:10.21#ibcon#read 5, iclass 32, count 0 2006.229.07:47:10.21#ibcon#about to read 6, iclass 32, count 0 2006.229.07:47:10.21#ibcon#read 6, iclass 32, count 0 2006.229.07:47:10.21#ibcon#end of sib2, iclass 32, count 0 2006.229.07:47:10.21#ibcon#*after write, iclass 32, count 0 2006.229.07:47:10.21#ibcon#*before return 0, iclass 32, count 0 2006.229.07:47:10.21#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:10.21#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:10.21#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:47:10.21#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:47:10.21$vck44/valo=4,624.99 2006.229.07:47:10.21#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.07:47:10.21#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.07:47:10.21#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:10.21#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:10.21#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:10.21#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:10.21#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:47:10.21#ibcon#first serial, iclass 34, count 0 2006.229.07:47:10.21#ibcon#enter sib2, iclass 34, count 0 2006.229.07:47:10.21#ibcon#flushed, iclass 34, count 0 2006.229.07:47:10.21#ibcon#about to write, iclass 34, count 0 2006.229.07:47:10.21#ibcon#wrote, iclass 34, count 0 2006.229.07:47:10.21#ibcon#about to read 3, iclass 34, count 0 2006.229.07:47:10.23#ibcon#read 3, iclass 34, count 0 2006.229.07:47:10.23#ibcon#about to read 4, iclass 34, count 0 2006.229.07:47:10.23#ibcon#read 4, iclass 34, count 0 2006.229.07:47:10.23#ibcon#about to read 5, iclass 34, count 0 2006.229.07:47:10.23#ibcon#read 5, iclass 34, count 0 2006.229.07:47:10.23#ibcon#about to read 6, iclass 34, count 0 2006.229.07:47:10.23#ibcon#read 6, iclass 34, count 0 2006.229.07:47:10.23#ibcon#end of sib2, iclass 34, count 0 2006.229.07:47:10.23#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:47:10.23#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:47:10.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:47:10.23#ibcon#*before write, iclass 34, count 0 2006.229.07:47:10.23#ibcon#enter sib2, iclass 34, count 0 2006.229.07:47:10.23#ibcon#flushed, iclass 34, count 0 2006.229.07:47:10.23#ibcon#about to write, iclass 34, count 0 2006.229.07:47:10.23#ibcon#wrote, iclass 34, count 0 2006.229.07:47:10.23#ibcon#about to read 3, iclass 34, count 0 2006.229.07:47:10.27#ibcon#read 3, iclass 34, count 0 2006.229.07:47:10.27#ibcon#about to read 4, iclass 34, count 0 2006.229.07:47:10.27#ibcon#read 4, iclass 34, count 0 2006.229.07:47:10.27#ibcon#about to read 5, iclass 34, count 0 2006.229.07:47:10.27#ibcon#read 5, iclass 34, count 0 2006.229.07:47:10.27#ibcon#about to read 6, iclass 34, count 0 2006.229.07:47:10.27#ibcon#read 6, iclass 34, count 0 2006.229.07:47:10.27#ibcon#end of sib2, iclass 34, count 0 2006.229.07:47:10.27#ibcon#*after write, iclass 34, count 0 2006.229.07:47:10.27#ibcon#*before return 0, iclass 34, count 0 2006.229.07:47:10.27#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:10.27#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:10.27#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:47:10.27#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:47:10.27$vck44/va=4,7 2006.229.07:47:10.27#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.07:47:10.27#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.07:47:10.27#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:10.27#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:10.33#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:10.33#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:10.33#ibcon#enter wrdev, iclass 36, count 2 2006.229.07:47:10.33#ibcon#first serial, iclass 36, count 2 2006.229.07:47:10.33#ibcon#enter sib2, iclass 36, count 2 2006.229.07:47:10.33#ibcon#flushed, iclass 36, count 2 2006.229.07:47:10.33#ibcon#about to write, iclass 36, count 2 2006.229.07:47:10.33#ibcon#wrote, iclass 36, count 2 2006.229.07:47:10.33#ibcon#about to read 3, iclass 36, count 2 2006.229.07:47:10.35#ibcon#read 3, iclass 36, count 2 2006.229.07:47:10.35#ibcon#about to read 4, iclass 36, count 2 2006.229.07:47:10.35#ibcon#read 4, iclass 36, count 2 2006.229.07:47:10.35#ibcon#about to read 5, iclass 36, count 2 2006.229.07:47:10.35#ibcon#read 5, iclass 36, count 2 2006.229.07:47:10.35#ibcon#about to read 6, iclass 36, count 2 2006.229.07:47:10.35#ibcon#read 6, iclass 36, count 2 2006.229.07:47:10.35#ibcon#end of sib2, iclass 36, count 2 2006.229.07:47:10.35#ibcon#*mode == 0, iclass 36, count 2 2006.229.07:47:10.35#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.07:47:10.35#ibcon#[25=AT04-07\r\n] 2006.229.07:47:10.35#ibcon#*before write, iclass 36, count 2 2006.229.07:47:10.35#ibcon#enter sib2, iclass 36, count 2 2006.229.07:47:10.35#ibcon#flushed, iclass 36, count 2 2006.229.07:47:10.35#ibcon#about to write, iclass 36, count 2 2006.229.07:47:10.35#ibcon#wrote, iclass 36, count 2 2006.229.07:47:10.35#ibcon#about to read 3, iclass 36, count 2 2006.229.07:47:10.38#ibcon#read 3, iclass 36, count 2 2006.229.07:47:10.38#ibcon#about to read 4, iclass 36, count 2 2006.229.07:47:10.38#ibcon#read 4, iclass 36, count 2 2006.229.07:47:10.38#ibcon#about to read 5, iclass 36, count 2 2006.229.07:47:10.38#ibcon#read 5, iclass 36, count 2 2006.229.07:47:10.38#ibcon#about to read 6, iclass 36, count 2 2006.229.07:47:10.38#ibcon#read 6, iclass 36, count 2 2006.229.07:47:10.38#ibcon#end of sib2, iclass 36, count 2 2006.229.07:47:10.38#ibcon#*after write, iclass 36, count 2 2006.229.07:47:10.38#ibcon#*before return 0, iclass 36, count 2 2006.229.07:47:10.38#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:10.38#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:10.38#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.07:47:10.38#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:10.38#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:10.50#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:10.50#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:10.50#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:47:10.50#ibcon#first serial, iclass 36, count 0 2006.229.07:47:10.50#ibcon#enter sib2, iclass 36, count 0 2006.229.07:47:10.50#ibcon#flushed, iclass 36, count 0 2006.229.07:47:10.50#ibcon#about to write, iclass 36, count 0 2006.229.07:47:10.50#ibcon#wrote, iclass 36, count 0 2006.229.07:47:10.50#ibcon#about to read 3, iclass 36, count 0 2006.229.07:47:10.52#ibcon#read 3, iclass 36, count 0 2006.229.07:47:10.52#ibcon#about to read 4, iclass 36, count 0 2006.229.07:47:10.52#ibcon#read 4, iclass 36, count 0 2006.229.07:47:10.52#ibcon#about to read 5, iclass 36, count 0 2006.229.07:47:10.52#ibcon#read 5, iclass 36, count 0 2006.229.07:47:10.52#ibcon#about to read 6, iclass 36, count 0 2006.229.07:47:10.52#ibcon#read 6, iclass 36, count 0 2006.229.07:47:10.52#ibcon#end of sib2, iclass 36, count 0 2006.229.07:47:10.52#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:47:10.52#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:47:10.52#ibcon#[25=USB\r\n] 2006.229.07:47:10.52#ibcon#*before write, iclass 36, count 0 2006.229.07:47:10.52#ibcon#enter sib2, iclass 36, count 0 2006.229.07:47:10.52#ibcon#flushed, iclass 36, count 0 2006.229.07:47:10.52#ibcon#about to write, iclass 36, count 0 2006.229.07:47:10.52#ibcon#wrote, iclass 36, count 0 2006.229.07:47:10.52#ibcon#about to read 3, iclass 36, count 0 2006.229.07:47:10.55#ibcon#read 3, iclass 36, count 0 2006.229.07:47:10.55#ibcon#about to read 4, iclass 36, count 0 2006.229.07:47:10.55#ibcon#read 4, iclass 36, count 0 2006.229.07:47:10.55#ibcon#about to read 5, iclass 36, count 0 2006.229.07:47:10.55#ibcon#read 5, iclass 36, count 0 2006.229.07:47:10.55#ibcon#about to read 6, iclass 36, count 0 2006.229.07:47:10.55#ibcon#read 6, iclass 36, count 0 2006.229.07:47:10.55#ibcon#end of sib2, iclass 36, count 0 2006.229.07:47:10.55#ibcon#*after write, iclass 36, count 0 2006.229.07:47:10.55#ibcon#*before return 0, iclass 36, count 0 2006.229.07:47:10.55#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:10.55#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:10.55#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:47:10.55#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:47:10.55$vck44/valo=5,734.99 2006.229.07:47:10.55#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.07:47:10.55#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.07:47:10.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:10.55#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:10.55#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:10.55#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:10.55#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:47:10.55#ibcon#first serial, iclass 38, count 0 2006.229.07:47:10.55#ibcon#enter sib2, iclass 38, count 0 2006.229.07:47:10.55#ibcon#flushed, iclass 38, count 0 2006.229.07:47:10.55#ibcon#about to write, iclass 38, count 0 2006.229.07:47:10.55#ibcon#wrote, iclass 38, count 0 2006.229.07:47:10.55#ibcon#about to read 3, iclass 38, count 0 2006.229.07:47:10.57#ibcon#read 3, iclass 38, count 0 2006.229.07:47:10.57#ibcon#about to read 4, iclass 38, count 0 2006.229.07:47:10.57#ibcon#read 4, iclass 38, count 0 2006.229.07:47:10.57#ibcon#about to read 5, iclass 38, count 0 2006.229.07:47:10.57#ibcon#read 5, iclass 38, count 0 2006.229.07:47:10.57#ibcon#about to read 6, iclass 38, count 0 2006.229.07:47:10.57#ibcon#read 6, iclass 38, count 0 2006.229.07:47:10.57#ibcon#end of sib2, iclass 38, count 0 2006.229.07:47:10.57#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:47:10.57#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:47:10.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:47:10.57#ibcon#*before write, iclass 38, count 0 2006.229.07:47:10.57#ibcon#enter sib2, iclass 38, count 0 2006.229.07:47:10.57#ibcon#flushed, iclass 38, count 0 2006.229.07:47:10.57#ibcon#about to write, iclass 38, count 0 2006.229.07:47:10.57#ibcon#wrote, iclass 38, count 0 2006.229.07:47:10.57#ibcon#about to read 3, iclass 38, count 0 2006.229.07:47:10.61#ibcon#read 3, iclass 38, count 0 2006.229.07:47:10.61#ibcon#about to read 4, iclass 38, count 0 2006.229.07:47:10.61#ibcon#read 4, iclass 38, count 0 2006.229.07:47:10.61#ibcon#about to read 5, iclass 38, count 0 2006.229.07:47:10.61#ibcon#read 5, iclass 38, count 0 2006.229.07:47:10.61#ibcon#about to read 6, iclass 38, count 0 2006.229.07:47:10.61#ibcon#read 6, iclass 38, count 0 2006.229.07:47:10.61#ibcon#end of sib2, iclass 38, count 0 2006.229.07:47:10.61#ibcon#*after write, iclass 38, count 0 2006.229.07:47:10.61#ibcon#*before return 0, iclass 38, count 0 2006.229.07:47:10.61#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:10.61#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:10.61#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:47:10.61#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:47:10.61$vck44/va=5,4 2006.229.07:47:10.61#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.07:47:10.61#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.07:47:10.61#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:10.61#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:10.67#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:10.67#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:10.67#ibcon#enter wrdev, iclass 40, count 2 2006.229.07:47:10.67#ibcon#first serial, iclass 40, count 2 2006.229.07:47:10.67#ibcon#enter sib2, iclass 40, count 2 2006.229.07:47:10.67#ibcon#flushed, iclass 40, count 2 2006.229.07:47:10.67#ibcon#about to write, iclass 40, count 2 2006.229.07:47:10.67#ibcon#wrote, iclass 40, count 2 2006.229.07:47:10.67#ibcon#about to read 3, iclass 40, count 2 2006.229.07:47:10.69#ibcon#read 3, iclass 40, count 2 2006.229.07:47:10.69#ibcon#about to read 4, iclass 40, count 2 2006.229.07:47:10.69#ibcon#read 4, iclass 40, count 2 2006.229.07:47:10.69#ibcon#about to read 5, iclass 40, count 2 2006.229.07:47:10.69#ibcon#read 5, iclass 40, count 2 2006.229.07:47:10.69#ibcon#about to read 6, iclass 40, count 2 2006.229.07:47:10.69#ibcon#read 6, iclass 40, count 2 2006.229.07:47:10.69#ibcon#end of sib2, iclass 40, count 2 2006.229.07:47:10.69#ibcon#*mode == 0, iclass 40, count 2 2006.229.07:47:10.69#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.07:47:10.69#ibcon#[25=AT05-04\r\n] 2006.229.07:47:10.69#ibcon#*before write, iclass 40, count 2 2006.229.07:47:10.69#ibcon#enter sib2, iclass 40, count 2 2006.229.07:47:10.69#ibcon#flushed, iclass 40, count 2 2006.229.07:47:10.69#ibcon#about to write, iclass 40, count 2 2006.229.07:47:10.69#ibcon#wrote, iclass 40, count 2 2006.229.07:47:10.69#ibcon#about to read 3, iclass 40, count 2 2006.229.07:47:10.72#ibcon#read 3, iclass 40, count 2 2006.229.07:47:10.72#ibcon#about to read 4, iclass 40, count 2 2006.229.07:47:10.72#ibcon#read 4, iclass 40, count 2 2006.229.07:47:10.72#ibcon#about to read 5, iclass 40, count 2 2006.229.07:47:10.72#ibcon#read 5, iclass 40, count 2 2006.229.07:47:10.72#ibcon#about to read 6, iclass 40, count 2 2006.229.07:47:10.72#ibcon#read 6, iclass 40, count 2 2006.229.07:47:10.72#ibcon#end of sib2, iclass 40, count 2 2006.229.07:47:10.72#ibcon#*after write, iclass 40, count 2 2006.229.07:47:10.72#ibcon#*before return 0, iclass 40, count 2 2006.229.07:47:10.72#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:10.72#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:10.72#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.07:47:10.72#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:10.72#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:10.84#abcon#<5=/06 2.2 4.7 29.94 941000.5\r\n> 2006.229.07:47:10.84#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:10.84#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:10.84#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:47:10.84#ibcon#first serial, iclass 40, count 0 2006.229.07:47:10.84#ibcon#enter sib2, iclass 40, count 0 2006.229.07:47:10.84#ibcon#flushed, iclass 40, count 0 2006.229.07:47:10.84#ibcon#about to write, iclass 40, count 0 2006.229.07:47:10.84#ibcon#wrote, iclass 40, count 0 2006.229.07:47:10.84#ibcon#about to read 3, iclass 40, count 0 2006.229.07:47:10.86#ibcon#read 3, iclass 40, count 0 2006.229.07:47:10.86#ibcon#about to read 4, iclass 40, count 0 2006.229.07:47:10.86#ibcon#read 4, iclass 40, count 0 2006.229.07:47:10.86#ibcon#about to read 5, iclass 40, count 0 2006.229.07:47:10.86#ibcon#read 5, iclass 40, count 0 2006.229.07:47:10.86#ibcon#about to read 6, iclass 40, count 0 2006.229.07:47:10.86#ibcon#read 6, iclass 40, count 0 2006.229.07:47:10.86#ibcon#end of sib2, iclass 40, count 0 2006.229.07:47:10.86#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:47:10.86#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:47:10.86#ibcon#[25=USB\r\n] 2006.229.07:47:10.86#ibcon#*before write, iclass 40, count 0 2006.229.07:47:10.86#ibcon#enter sib2, iclass 40, count 0 2006.229.07:47:10.86#ibcon#flushed, iclass 40, count 0 2006.229.07:47:10.86#ibcon#about to write, iclass 40, count 0 2006.229.07:47:10.86#ibcon#wrote, iclass 40, count 0 2006.229.07:47:10.86#ibcon#about to read 3, iclass 40, count 0 2006.229.07:47:10.86#abcon#{5=INTERFACE CLEAR} 2006.229.07:47:10.89#ibcon#read 3, iclass 40, count 0 2006.229.07:47:10.89#ibcon#about to read 4, iclass 40, count 0 2006.229.07:47:10.89#ibcon#read 4, iclass 40, count 0 2006.229.07:47:10.89#ibcon#about to read 5, iclass 40, count 0 2006.229.07:47:10.89#ibcon#read 5, iclass 40, count 0 2006.229.07:47:10.89#ibcon#about to read 6, iclass 40, count 0 2006.229.07:47:10.89#ibcon#read 6, iclass 40, count 0 2006.229.07:47:10.89#ibcon#end of sib2, iclass 40, count 0 2006.229.07:47:10.89#ibcon#*after write, iclass 40, count 0 2006.229.07:47:10.89#ibcon#*before return 0, iclass 40, count 0 2006.229.07:47:10.89#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:10.89#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:10.89#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:47:10.89#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:47:10.89$vck44/valo=6,814.99 2006.229.07:47:10.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.07:47:10.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.07:47:10.89#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:10.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:47:10.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:47:10.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:47:10.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.07:47:10.89#ibcon#first serial, iclass 7, count 0 2006.229.07:47:10.89#ibcon#enter sib2, iclass 7, count 0 2006.229.07:47:10.89#ibcon#flushed, iclass 7, count 0 2006.229.07:47:10.89#ibcon#about to write, iclass 7, count 0 2006.229.07:47:10.89#ibcon#wrote, iclass 7, count 0 2006.229.07:47:10.89#ibcon#about to read 3, iclass 7, count 0 2006.229.07:47:10.91#ibcon#read 3, iclass 7, count 0 2006.229.07:47:10.91#ibcon#about to read 4, iclass 7, count 0 2006.229.07:47:10.91#ibcon#read 4, iclass 7, count 0 2006.229.07:47:10.91#ibcon#about to read 5, iclass 7, count 0 2006.229.07:47:10.91#ibcon#read 5, iclass 7, count 0 2006.229.07:47:10.91#ibcon#about to read 6, iclass 7, count 0 2006.229.07:47:10.91#ibcon#read 6, iclass 7, count 0 2006.229.07:47:10.91#ibcon#end of sib2, iclass 7, count 0 2006.229.07:47:10.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.07:47:10.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.07:47:10.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:47:10.91#ibcon#*before write, iclass 7, count 0 2006.229.07:47:10.91#ibcon#enter sib2, iclass 7, count 0 2006.229.07:47:10.91#ibcon#flushed, iclass 7, count 0 2006.229.07:47:10.91#ibcon#about to write, iclass 7, count 0 2006.229.07:47:10.91#ibcon#wrote, iclass 7, count 0 2006.229.07:47:10.91#ibcon#about to read 3, iclass 7, count 0 2006.229.07:47:10.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:47:10.95#ibcon#read 3, iclass 7, count 0 2006.229.07:47:10.95#ibcon#about to read 4, iclass 7, count 0 2006.229.07:47:10.95#ibcon#read 4, iclass 7, count 0 2006.229.07:47:10.95#ibcon#about to read 5, iclass 7, count 0 2006.229.07:47:10.95#ibcon#read 5, iclass 7, count 0 2006.229.07:47:10.95#ibcon#about to read 6, iclass 7, count 0 2006.229.07:47:10.95#ibcon#read 6, iclass 7, count 0 2006.229.07:47:10.95#ibcon#end of sib2, iclass 7, count 0 2006.229.07:47:10.95#ibcon#*after write, iclass 7, count 0 2006.229.07:47:10.95#ibcon#*before return 0, iclass 7, count 0 2006.229.07:47:10.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:47:10.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.07:47:10.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.07:47:10.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.07:47:10.95$vck44/va=6,4 2006.229.07:47:10.95#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.07:47:10.95#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.07:47:10.95#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:10.95#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:11.01#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:11.01#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:11.01#ibcon#enter wrdev, iclass 12, count 2 2006.229.07:47:11.01#ibcon#first serial, iclass 12, count 2 2006.229.07:47:11.01#ibcon#enter sib2, iclass 12, count 2 2006.229.07:47:11.01#ibcon#flushed, iclass 12, count 2 2006.229.07:47:11.01#ibcon#about to write, iclass 12, count 2 2006.229.07:47:11.01#ibcon#wrote, iclass 12, count 2 2006.229.07:47:11.01#ibcon#about to read 3, iclass 12, count 2 2006.229.07:47:11.03#ibcon#read 3, iclass 12, count 2 2006.229.07:47:11.03#ibcon#about to read 4, iclass 12, count 2 2006.229.07:47:11.03#ibcon#read 4, iclass 12, count 2 2006.229.07:47:11.03#ibcon#about to read 5, iclass 12, count 2 2006.229.07:47:11.03#ibcon#read 5, iclass 12, count 2 2006.229.07:47:11.03#ibcon#about to read 6, iclass 12, count 2 2006.229.07:47:11.03#ibcon#read 6, iclass 12, count 2 2006.229.07:47:11.03#ibcon#end of sib2, iclass 12, count 2 2006.229.07:47:11.03#ibcon#*mode == 0, iclass 12, count 2 2006.229.07:47:11.03#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.07:47:11.03#ibcon#[25=AT06-04\r\n] 2006.229.07:47:11.03#ibcon#*before write, iclass 12, count 2 2006.229.07:47:11.03#ibcon#enter sib2, iclass 12, count 2 2006.229.07:47:11.03#ibcon#flushed, iclass 12, count 2 2006.229.07:47:11.03#ibcon#about to write, iclass 12, count 2 2006.229.07:47:11.03#ibcon#wrote, iclass 12, count 2 2006.229.07:47:11.03#ibcon#about to read 3, iclass 12, count 2 2006.229.07:47:11.06#ibcon#read 3, iclass 12, count 2 2006.229.07:47:11.06#ibcon#about to read 4, iclass 12, count 2 2006.229.07:47:11.06#ibcon#read 4, iclass 12, count 2 2006.229.07:47:11.06#ibcon#about to read 5, iclass 12, count 2 2006.229.07:47:11.06#ibcon#read 5, iclass 12, count 2 2006.229.07:47:11.06#ibcon#about to read 6, iclass 12, count 2 2006.229.07:47:11.06#ibcon#read 6, iclass 12, count 2 2006.229.07:47:11.06#ibcon#end of sib2, iclass 12, count 2 2006.229.07:47:11.06#ibcon#*after write, iclass 12, count 2 2006.229.07:47:11.06#ibcon#*before return 0, iclass 12, count 2 2006.229.07:47:11.06#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:11.06#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:11.06#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.07:47:11.06#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:11.06#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:11.18#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:11.18#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:11.18#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:47:11.18#ibcon#first serial, iclass 12, count 0 2006.229.07:47:11.18#ibcon#enter sib2, iclass 12, count 0 2006.229.07:47:11.18#ibcon#flushed, iclass 12, count 0 2006.229.07:47:11.18#ibcon#about to write, iclass 12, count 0 2006.229.07:47:11.18#ibcon#wrote, iclass 12, count 0 2006.229.07:47:11.18#ibcon#about to read 3, iclass 12, count 0 2006.229.07:47:11.20#ibcon#read 3, iclass 12, count 0 2006.229.07:47:11.20#ibcon#about to read 4, iclass 12, count 0 2006.229.07:47:11.20#ibcon#read 4, iclass 12, count 0 2006.229.07:47:11.20#ibcon#about to read 5, iclass 12, count 0 2006.229.07:47:11.20#ibcon#read 5, iclass 12, count 0 2006.229.07:47:11.20#ibcon#about to read 6, iclass 12, count 0 2006.229.07:47:11.20#ibcon#read 6, iclass 12, count 0 2006.229.07:47:11.20#ibcon#end of sib2, iclass 12, count 0 2006.229.07:47:11.20#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:47:11.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:47:11.20#ibcon#[25=USB\r\n] 2006.229.07:47:11.20#ibcon#*before write, iclass 12, count 0 2006.229.07:47:11.20#ibcon#enter sib2, iclass 12, count 0 2006.229.07:47:11.20#ibcon#flushed, iclass 12, count 0 2006.229.07:47:11.20#ibcon#about to write, iclass 12, count 0 2006.229.07:47:11.20#ibcon#wrote, iclass 12, count 0 2006.229.07:47:11.20#ibcon#about to read 3, iclass 12, count 0 2006.229.07:47:11.23#ibcon#read 3, iclass 12, count 0 2006.229.07:47:11.23#ibcon#about to read 4, iclass 12, count 0 2006.229.07:47:11.23#ibcon#read 4, iclass 12, count 0 2006.229.07:47:11.23#ibcon#about to read 5, iclass 12, count 0 2006.229.07:47:11.23#ibcon#read 5, iclass 12, count 0 2006.229.07:47:11.23#ibcon#about to read 6, iclass 12, count 0 2006.229.07:47:11.23#ibcon#read 6, iclass 12, count 0 2006.229.07:47:11.23#ibcon#end of sib2, iclass 12, count 0 2006.229.07:47:11.23#ibcon#*after write, iclass 12, count 0 2006.229.07:47:11.23#ibcon#*before return 0, iclass 12, count 0 2006.229.07:47:11.23#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:11.23#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:11.23#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:47:11.23#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:47:11.23$vck44/valo=7,864.99 2006.229.07:47:11.23#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.07:47:11.23#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.07:47:11.23#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:11.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:11.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:11.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:11.23#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:47:11.23#ibcon#first serial, iclass 14, count 0 2006.229.07:47:11.23#ibcon#enter sib2, iclass 14, count 0 2006.229.07:47:11.23#ibcon#flushed, iclass 14, count 0 2006.229.07:47:11.23#ibcon#about to write, iclass 14, count 0 2006.229.07:47:11.23#ibcon#wrote, iclass 14, count 0 2006.229.07:47:11.23#ibcon#about to read 3, iclass 14, count 0 2006.229.07:47:11.25#ibcon#read 3, iclass 14, count 0 2006.229.07:47:11.25#ibcon#about to read 4, iclass 14, count 0 2006.229.07:47:11.25#ibcon#read 4, iclass 14, count 0 2006.229.07:47:11.25#ibcon#about to read 5, iclass 14, count 0 2006.229.07:47:11.25#ibcon#read 5, iclass 14, count 0 2006.229.07:47:11.25#ibcon#about to read 6, iclass 14, count 0 2006.229.07:47:11.25#ibcon#read 6, iclass 14, count 0 2006.229.07:47:11.25#ibcon#end of sib2, iclass 14, count 0 2006.229.07:47:11.25#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:47:11.25#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:47:11.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:47:11.25#ibcon#*before write, iclass 14, count 0 2006.229.07:47:11.25#ibcon#enter sib2, iclass 14, count 0 2006.229.07:47:11.25#ibcon#flushed, iclass 14, count 0 2006.229.07:47:11.25#ibcon#about to write, iclass 14, count 0 2006.229.07:47:11.25#ibcon#wrote, iclass 14, count 0 2006.229.07:47:11.25#ibcon#about to read 3, iclass 14, count 0 2006.229.07:47:11.29#ibcon#read 3, iclass 14, count 0 2006.229.07:47:11.29#ibcon#about to read 4, iclass 14, count 0 2006.229.07:47:11.29#ibcon#read 4, iclass 14, count 0 2006.229.07:47:11.29#ibcon#about to read 5, iclass 14, count 0 2006.229.07:47:11.29#ibcon#read 5, iclass 14, count 0 2006.229.07:47:11.29#ibcon#about to read 6, iclass 14, count 0 2006.229.07:47:11.29#ibcon#read 6, iclass 14, count 0 2006.229.07:47:11.29#ibcon#end of sib2, iclass 14, count 0 2006.229.07:47:11.29#ibcon#*after write, iclass 14, count 0 2006.229.07:47:11.29#ibcon#*before return 0, iclass 14, count 0 2006.229.07:47:11.29#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:11.29#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:11.29#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:47:11.29#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:47:11.29$vck44/va=7,5 2006.229.07:47:11.29#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.07:47:11.29#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.07:47:11.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:11.29#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:11.35#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:11.35#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:11.35#ibcon#enter wrdev, iclass 16, count 2 2006.229.07:47:11.35#ibcon#first serial, iclass 16, count 2 2006.229.07:47:11.35#ibcon#enter sib2, iclass 16, count 2 2006.229.07:47:11.35#ibcon#flushed, iclass 16, count 2 2006.229.07:47:11.35#ibcon#about to write, iclass 16, count 2 2006.229.07:47:11.35#ibcon#wrote, iclass 16, count 2 2006.229.07:47:11.35#ibcon#about to read 3, iclass 16, count 2 2006.229.07:47:11.37#ibcon#read 3, iclass 16, count 2 2006.229.07:47:11.37#ibcon#about to read 4, iclass 16, count 2 2006.229.07:47:11.37#ibcon#read 4, iclass 16, count 2 2006.229.07:47:11.37#ibcon#about to read 5, iclass 16, count 2 2006.229.07:47:11.37#ibcon#read 5, iclass 16, count 2 2006.229.07:47:11.37#ibcon#about to read 6, iclass 16, count 2 2006.229.07:47:11.37#ibcon#read 6, iclass 16, count 2 2006.229.07:47:11.37#ibcon#end of sib2, iclass 16, count 2 2006.229.07:47:11.37#ibcon#*mode == 0, iclass 16, count 2 2006.229.07:47:11.37#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.07:47:11.37#ibcon#[25=AT07-05\r\n] 2006.229.07:47:11.37#ibcon#*before write, iclass 16, count 2 2006.229.07:47:11.37#ibcon#enter sib2, iclass 16, count 2 2006.229.07:47:11.37#ibcon#flushed, iclass 16, count 2 2006.229.07:47:11.37#ibcon#about to write, iclass 16, count 2 2006.229.07:47:11.37#ibcon#wrote, iclass 16, count 2 2006.229.07:47:11.37#ibcon#about to read 3, iclass 16, count 2 2006.229.07:47:11.40#ibcon#read 3, iclass 16, count 2 2006.229.07:47:11.40#ibcon#about to read 4, iclass 16, count 2 2006.229.07:47:11.40#ibcon#read 4, iclass 16, count 2 2006.229.07:47:11.40#ibcon#about to read 5, iclass 16, count 2 2006.229.07:47:11.40#ibcon#read 5, iclass 16, count 2 2006.229.07:47:11.40#ibcon#about to read 6, iclass 16, count 2 2006.229.07:47:11.40#ibcon#read 6, iclass 16, count 2 2006.229.07:47:11.40#ibcon#end of sib2, iclass 16, count 2 2006.229.07:47:11.40#ibcon#*after write, iclass 16, count 2 2006.229.07:47:11.40#ibcon#*before return 0, iclass 16, count 2 2006.229.07:47:11.40#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:11.40#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:11.40#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.07:47:11.40#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:11.40#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:11.52#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:11.52#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:11.52#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:47:11.52#ibcon#first serial, iclass 16, count 0 2006.229.07:47:11.52#ibcon#enter sib2, iclass 16, count 0 2006.229.07:47:11.52#ibcon#flushed, iclass 16, count 0 2006.229.07:47:11.52#ibcon#about to write, iclass 16, count 0 2006.229.07:47:11.52#ibcon#wrote, iclass 16, count 0 2006.229.07:47:11.52#ibcon#about to read 3, iclass 16, count 0 2006.229.07:47:11.54#ibcon#read 3, iclass 16, count 0 2006.229.07:47:11.54#ibcon#about to read 4, iclass 16, count 0 2006.229.07:47:11.54#ibcon#read 4, iclass 16, count 0 2006.229.07:47:11.54#ibcon#about to read 5, iclass 16, count 0 2006.229.07:47:11.54#ibcon#read 5, iclass 16, count 0 2006.229.07:47:11.54#ibcon#about to read 6, iclass 16, count 0 2006.229.07:47:11.54#ibcon#read 6, iclass 16, count 0 2006.229.07:47:11.54#ibcon#end of sib2, iclass 16, count 0 2006.229.07:47:11.54#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:47:11.54#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:47:11.54#ibcon#[25=USB\r\n] 2006.229.07:47:11.54#ibcon#*before write, iclass 16, count 0 2006.229.07:47:11.54#ibcon#enter sib2, iclass 16, count 0 2006.229.07:47:11.54#ibcon#flushed, iclass 16, count 0 2006.229.07:47:11.54#ibcon#about to write, iclass 16, count 0 2006.229.07:47:11.54#ibcon#wrote, iclass 16, count 0 2006.229.07:47:11.54#ibcon#about to read 3, iclass 16, count 0 2006.229.07:47:11.57#ibcon#read 3, iclass 16, count 0 2006.229.07:47:11.57#ibcon#about to read 4, iclass 16, count 0 2006.229.07:47:11.57#ibcon#read 4, iclass 16, count 0 2006.229.07:47:11.57#ibcon#about to read 5, iclass 16, count 0 2006.229.07:47:11.57#ibcon#read 5, iclass 16, count 0 2006.229.07:47:11.57#ibcon#about to read 6, iclass 16, count 0 2006.229.07:47:11.57#ibcon#read 6, iclass 16, count 0 2006.229.07:47:11.57#ibcon#end of sib2, iclass 16, count 0 2006.229.07:47:11.57#ibcon#*after write, iclass 16, count 0 2006.229.07:47:11.57#ibcon#*before return 0, iclass 16, count 0 2006.229.07:47:11.57#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:11.57#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:11.57#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:47:11.57#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:47:11.57$vck44/valo=8,884.99 2006.229.07:47:11.57#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:47:11.57#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:47:11.57#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:11.57#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:11.57#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:11.57#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:11.57#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:47:11.57#ibcon#first serial, iclass 18, count 0 2006.229.07:47:11.57#ibcon#enter sib2, iclass 18, count 0 2006.229.07:47:11.57#ibcon#flushed, iclass 18, count 0 2006.229.07:47:11.57#ibcon#about to write, iclass 18, count 0 2006.229.07:47:11.57#ibcon#wrote, iclass 18, count 0 2006.229.07:47:11.57#ibcon#about to read 3, iclass 18, count 0 2006.229.07:47:11.59#ibcon#read 3, iclass 18, count 0 2006.229.07:47:11.59#ibcon#about to read 4, iclass 18, count 0 2006.229.07:47:11.59#ibcon#read 4, iclass 18, count 0 2006.229.07:47:11.59#ibcon#about to read 5, iclass 18, count 0 2006.229.07:47:11.59#ibcon#read 5, iclass 18, count 0 2006.229.07:47:11.59#ibcon#about to read 6, iclass 18, count 0 2006.229.07:47:11.59#ibcon#read 6, iclass 18, count 0 2006.229.07:47:11.59#ibcon#end of sib2, iclass 18, count 0 2006.229.07:47:11.59#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:47:11.59#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:47:11.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:47:11.59#ibcon#*before write, iclass 18, count 0 2006.229.07:47:11.59#ibcon#enter sib2, iclass 18, count 0 2006.229.07:47:11.59#ibcon#flushed, iclass 18, count 0 2006.229.07:47:11.59#ibcon#about to write, iclass 18, count 0 2006.229.07:47:11.59#ibcon#wrote, iclass 18, count 0 2006.229.07:47:11.59#ibcon#about to read 3, iclass 18, count 0 2006.229.07:47:11.63#ibcon#read 3, iclass 18, count 0 2006.229.07:47:11.63#ibcon#about to read 4, iclass 18, count 0 2006.229.07:47:11.63#ibcon#read 4, iclass 18, count 0 2006.229.07:47:11.63#ibcon#about to read 5, iclass 18, count 0 2006.229.07:47:11.63#ibcon#read 5, iclass 18, count 0 2006.229.07:47:11.63#ibcon#about to read 6, iclass 18, count 0 2006.229.07:47:11.63#ibcon#read 6, iclass 18, count 0 2006.229.07:47:11.63#ibcon#end of sib2, iclass 18, count 0 2006.229.07:47:11.63#ibcon#*after write, iclass 18, count 0 2006.229.07:47:11.63#ibcon#*before return 0, iclass 18, count 0 2006.229.07:47:11.63#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:11.63#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:11.63#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:47:11.63#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:47:11.63$vck44/va=8,6 2006.229.07:47:11.63#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.07:47:11.63#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.07:47:11.63#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:11.63#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:47:11.69#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:47:11.69#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:47:11.69#ibcon#enter wrdev, iclass 20, count 2 2006.229.07:47:11.69#ibcon#first serial, iclass 20, count 2 2006.229.07:47:11.69#ibcon#enter sib2, iclass 20, count 2 2006.229.07:47:11.69#ibcon#flushed, iclass 20, count 2 2006.229.07:47:11.69#ibcon#about to write, iclass 20, count 2 2006.229.07:47:11.69#ibcon#wrote, iclass 20, count 2 2006.229.07:47:11.69#ibcon#about to read 3, iclass 20, count 2 2006.229.07:47:11.71#ibcon#read 3, iclass 20, count 2 2006.229.07:47:11.71#ibcon#about to read 4, iclass 20, count 2 2006.229.07:47:11.71#ibcon#read 4, iclass 20, count 2 2006.229.07:47:11.71#ibcon#about to read 5, iclass 20, count 2 2006.229.07:47:11.71#ibcon#read 5, iclass 20, count 2 2006.229.07:47:11.71#ibcon#about to read 6, iclass 20, count 2 2006.229.07:47:11.71#ibcon#read 6, iclass 20, count 2 2006.229.07:47:11.71#ibcon#end of sib2, iclass 20, count 2 2006.229.07:47:11.71#ibcon#*mode == 0, iclass 20, count 2 2006.229.07:47:11.71#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.07:47:11.71#ibcon#[25=AT08-06\r\n] 2006.229.07:47:11.71#ibcon#*before write, iclass 20, count 2 2006.229.07:47:11.71#ibcon#enter sib2, iclass 20, count 2 2006.229.07:47:11.71#ibcon#flushed, iclass 20, count 2 2006.229.07:47:11.71#ibcon#about to write, iclass 20, count 2 2006.229.07:47:11.71#ibcon#wrote, iclass 20, count 2 2006.229.07:47:11.71#ibcon#about to read 3, iclass 20, count 2 2006.229.07:47:11.74#ibcon#read 3, iclass 20, count 2 2006.229.07:47:11.74#ibcon#about to read 4, iclass 20, count 2 2006.229.07:47:11.74#ibcon#read 4, iclass 20, count 2 2006.229.07:47:11.74#ibcon#about to read 5, iclass 20, count 2 2006.229.07:47:11.74#ibcon#read 5, iclass 20, count 2 2006.229.07:47:11.74#ibcon#about to read 6, iclass 20, count 2 2006.229.07:47:11.74#ibcon#read 6, iclass 20, count 2 2006.229.07:47:11.74#ibcon#end of sib2, iclass 20, count 2 2006.229.07:47:11.74#ibcon#*after write, iclass 20, count 2 2006.229.07:47:11.74#ibcon#*before return 0, iclass 20, count 2 2006.229.07:47:11.74#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:47:11.74#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.07:47:11.74#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.07:47:11.74#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:11.74#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:47:11.86#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:47:11.86#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:47:11.86#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:47:11.86#ibcon#first serial, iclass 20, count 0 2006.229.07:47:11.86#ibcon#enter sib2, iclass 20, count 0 2006.229.07:47:11.86#ibcon#flushed, iclass 20, count 0 2006.229.07:47:11.86#ibcon#about to write, iclass 20, count 0 2006.229.07:47:11.86#ibcon#wrote, iclass 20, count 0 2006.229.07:47:11.86#ibcon#about to read 3, iclass 20, count 0 2006.229.07:47:11.88#ibcon#read 3, iclass 20, count 0 2006.229.07:47:11.88#ibcon#about to read 4, iclass 20, count 0 2006.229.07:47:11.88#ibcon#read 4, iclass 20, count 0 2006.229.07:47:11.88#ibcon#about to read 5, iclass 20, count 0 2006.229.07:47:11.88#ibcon#read 5, iclass 20, count 0 2006.229.07:47:11.88#ibcon#about to read 6, iclass 20, count 0 2006.229.07:47:11.88#ibcon#read 6, iclass 20, count 0 2006.229.07:47:11.88#ibcon#end of sib2, iclass 20, count 0 2006.229.07:47:11.88#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:47:11.88#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:47:11.88#ibcon#[25=USB\r\n] 2006.229.07:47:11.88#ibcon#*before write, iclass 20, count 0 2006.229.07:47:11.88#ibcon#enter sib2, iclass 20, count 0 2006.229.07:47:11.88#ibcon#flushed, iclass 20, count 0 2006.229.07:47:11.88#ibcon#about to write, iclass 20, count 0 2006.229.07:47:11.88#ibcon#wrote, iclass 20, count 0 2006.229.07:47:11.88#ibcon#about to read 3, iclass 20, count 0 2006.229.07:47:11.91#ibcon#read 3, iclass 20, count 0 2006.229.07:47:11.91#ibcon#about to read 4, iclass 20, count 0 2006.229.07:47:11.91#ibcon#read 4, iclass 20, count 0 2006.229.07:47:11.91#ibcon#about to read 5, iclass 20, count 0 2006.229.07:47:11.91#ibcon#read 5, iclass 20, count 0 2006.229.07:47:11.91#ibcon#about to read 6, iclass 20, count 0 2006.229.07:47:11.91#ibcon#read 6, iclass 20, count 0 2006.229.07:47:11.91#ibcon#end of sib2, iclass 20, count 0 2006.229.07:47:11.91#ibcon#*after write, iclass 20, count 0 2006.229.07:47:11.91#ibcon#*before return 0, iclass 20, count 0 2006.229.07:47:11.91#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:47:11.91#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.07:47:11.91#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:47:11.91#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:47:11.91$vck44/vblo=1,629.99 2006.229.07:47:11.91#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.07:47:11.91#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.07:47:11.91#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:11.91#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:11.91#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:11.91#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:11.91#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:47:11.91#ibcon#first serial, iclass 22, count 0 2006.229.07:47:11.91#ibcon#enter sib2, iclass 22, count 0 2006.229.07:47:11.91#ibcon#flushed, iclass 22, count 0 2006.229.07:47:11.91#ibcon#about to write, iclass 22, count 0 2006.229.07:47:11.91#ibcon#wrote, iclass 22, count 0 2006.229.07:47:11.91#ibcon#about to read 3, iclass 22, count 0 2006.229.07:47:11.93#ibcon#read 3, iclass 22, count 0 2006.229.07:47:11.93#ibcon#about to read 4, iclass 22, count 0 2006.229.07:47:11.93#ibcon#read 4, iclass 22, count 0 2006.229.07:47:11.93#ibcon#about to read 5, iclass 22, count 0 2006.229.07:47:11.93#ibcon#read 5, iclass 22, count 0 2006.229.07:47:11.93#ibcon#about to read 6, iclass 22, count 0 2006.229.07:47:11.93#ibcon#read 6, iclass 22, count 0 2006.229.07:47:11.93#ibcon#end of sib2, iclass 22, count 0 2006.229.07:47:11.93#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:47:11.93#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:47:11.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:47:11.93#ibcon#*before write, iclass 22, count 0 2006.229.07:47:11.93#ibcon#enter sib2, iclass 22, count 0 2006.229.07:47:11.93#ibcon#flushed, iclass 22, count 0 2006.229.07:47:11.93#ibcon#about to write, iclass 22, count 0 2006.229.07:47:11.93#ibcon#wrote, iclass 22, count 0 2006.229.07:47:11.93#ibcon#about to read 3, iclass 22, count 0 2006.229.07:47:11.97#ibcon#read 3, iclass 22, count 0 2006.229.07:47:11.97#ibcon#about to read 4, iclass 22, count 0 2006.229.07:47:11.97#ibcon#read 4, iclass 22, count 0 2006.229.07:47:11.97#ibcon#about to read 5, iclass 22, count 0 2006.229.07:47:11.97#ibcon#read 5, iclass 22, count 0 2006.229.07:47:11.97#ibcon#about to read 6, iclass 22, count 0 2006.229.07:47:11.97#ibcon#read 6, iclass 22, count 0 2006.229.07:47:11.97#ibcon#end of sib2, iclass 22, count 0 2006.229.07:47:11.97#ibcon#*after write, iclass 22, count 0 2006.229.07:47:11.97#ibcon#*before return 0, iclass 22, count 0 2006.229.07:47:11.97#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:11.97#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.07:47:11.97#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:47:11.97#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:47:11.97$vck44/vb=1,4 2006.229.07:47:11.97#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.07:47:11.97#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.07:47:11.97#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:11.97#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:11.97#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:11.97#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:11.97#ibcon#enter wrdev, iclass 24, count 2 2006.229.07:47:11.97#ibcon#first serial, iclass 24, count 2 2006.229.07:47:11.97#ibcon#enter sib2, iclass 24, count 2 2006.229.07:47:11.97#ibcon#flushed, iclass 24, count 2 2006.229.07:47:11.97#ibcon#about to write, iclass 24, count 2 2006.229.07:47:11.97#ibcon#wrote, iclass 24, count 2 2006.229.07:47:11.97#ibcon#about to read 3, iclass 24, count 2 2006.229.07:47:11.99#ibcon#read 3, iclass 24, count 2 2006.229.07:47:11.99#ibcon#about to read 4, iclass 24, count 2 2006.229.07:47:11.99#ibcon#read 4, iclass 24, count 2 2006.229.07:47:11.99#ibcon#about to read 5, iclass 24, count 2 2006.229.07:47:11.99#ibcon#read 5, iclass 24, count 2 2006.229.07:47:11.99#ibcon#about to read 6, iclass 24, count 2 2006.229.07:47:11.99#ibcon#read 6, iclass 24, count 2 2006.229.07:47:11.99#ibcon#end of sib2, iclass 24, count 2 2006.229.07:47:11.99#ibcon#*mode == 0, iclass 24, count 2 2006.229.07:47:11.99#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.07:47:11.99#ibcon#[27=AT01-04\r\n] 2006.229.07:47:11.99#ibcon#*before write, iclass 24, count 2 2006.229.07:47:11.99#ibcon#enter sib2, iclass 24, count 2 2006.229.07:47:11.99#ibcon#flushed, iclass 24, count 2 2006.229.07:47:11.99#ibcon#about to write, iclass 24, count 2 2006.229.07:47:11.99#ibcon#wrote, iclass 24, count 2 2006.229.07:47:11.99#ibcon#about to read 3, iclass 24, count 2 2006.229.07:47:12.02#ibcon#read 3, iclass 24, count 2 2006.229.07:47:12.02#ibcon#about to read 4, iclass 24, count 2 2006.229.07:47:12.02#ibcon#read 4, iclass 24, count 2 2006.229.07:47:12.02#ibcon#about to read 5, iclass 24, count 2 2006.229.07:47:12.02#ibcon#read 5, iclass 24, count 2 2006.229.07:47:12.02#ibcon#about to read 6, iclass 24, count 2 2006.229.07:47:12.02#ibcon#read 6, iclass 24, count 2 2006.229.07:47:12.02#ibcon#end of sib2, iclass 24, count 2 2006.229.07:47:12.02#ibcon#*after write, iclass 24, count 2 2006.229.07:47:12.02#ibcon#*before return 0, iclass 24, count 2 2006.229.07:47:12.02#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:12.02#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.07:47:12.02#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.07:47:12.02#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:12.02#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:12.14#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:12.14#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:12.14#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:47:12.14#ibcon#first serial, iclass 24, count 0 2006.229.07:47:12.14#ibcon#enter sib2, iclass 24, count 0 2006.229.07:47:12.14#ibcon#flushed, iclass 24, count 0 2006.229.07:47:12.14#ibcon#about to write, iclass 24, count 0 2006.229.07:47:12.14#ibcon#wrote, iclass 24, count 0 2006.229.07:47:12.14#ibcon#about to read 3, iclass 24, count 0 2006.229.07:47:12.16#ibcon#read 3, iclass 24, count 0 2006.229.07:47:12.16#ibcon#about to read 4, iclass 24, count 0 2006.229.07:47:12.16#ibcon#read 4, iclass 24, count 0 2006.229.07:47:12.16#ibcon#about to read 5, iclass 24, count 0 2006.229.07:47:12.16#ibcon#read 5, iclass 24, count 0 2006.229.07:47:12.16#ibcon#about to read 6, iclass 24, count 0 2006.229.07:47:12.16#ibcon#read 6, iclass 24, count 0 2006.229.07:47:12.16#ibcon#end of sib2, iclass 24, count 0 2006.229.07:47:12.16#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:47:12.16#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:47:12.16#ibcon#[27=USB\r\n] 2006.229.07:47:12.16#ibcon#*before write, iclass 24, count 0 2006.229.07:47:12.16#ibcon#enter sib2, iclass 24, count 0 2006.229.07:47:12.16#ibcon#flushed, iclass 24, count 0 2006.229.07:47:12.16#ibcon#about to write, iclass 24, count 0 2006.229.07:47:12.16#ibcon#wrote, iclass 24, count 0 2006.229.07:47:12.16#ibcon#about to read 3, iclass 24, count 0 2006.229.07:47:12.19#ibcon#read 3, iclass 24, count 0 2006.229.07:47:12.19#ibcon#about to read 4, iclass 24, count 0 2006.229.07:47:12.19#ibcon#read 4, iclass 24, count 0 2006.229.07:47:12.19#ibcon#about to read 5, iclass 24, count 0 2006.229.07:47:12.19#ibcon#read 5, iclass 24, count 0 2006.229.07:47:12.19#ibcon#about to read 6, iclass 24, count 0 2006.229.07:47:12.19#ibcon#read 6, iclass 24, count 0 2006.229.07:47:12.19#ibcon#end of sib2, iclass 24, count 0 2006.229.07:47:12.19#ibcon#*after write, iclass 24, count 0 2006.229.07:47:12.19#ibcon#*before return 0, iclass 24, count 0 2006.229.07:47:12.19#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:12.19#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.07:47:12.19#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:47:12.19#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:47:12.19$vck44/vblo=2,634.99 2006.229.07:47:12.19#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.07:47:12.19#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.07:47:12.19#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:12.19#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:12.19#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:12.19#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:12.19#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:47:12.19#ibcon#first serial, iclass 26, count 0 2006.229.07:47:12.19#ibcon#enter sib2, iclass 26, count 0 2006.229.07:47:12.19#ibcon#flushed, iclass 26, count 0 2006.229.07:47:12.19#ibcon#about to write, iclass 26, count 0 2006.229.07:47:12.19#ibcon#wrote, iclass 26, count 0 2006.229.07:47:12.19#ibcon#about to read 3, iclass 26, count 0 2006.229.07:47:12.21#ibcon#read 3, iclass 26, count 0 2006.229.07:47:12.21#ibcon#about to read 4, iclass 26, count 0 2006.229.07:47:12.21#ibcon#read 4, iclass 26, count 0 2006.229.07:47:12.21#ibcon#about to read 5, iclass 26, count 0 2006.229.07:47:12.21#ibcon#read 5, iclass 26, count 0 2006.229.07:47:12.21#ibcon#about to read 6, iclass 26, count 0 2006.229.07:47:12.21#ibcon#read 6, iclass 26, count 0 2006.229.07:47:12.21#ibcon#end of sib2, iclass 26, count 0 2006.229.07:47:12.21#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:47:12.21#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:47:12.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:47:12.21#ibcon#*before write, iclass 26, count 0 2006.229.07:47:12.21#ibcon#enter sib2, iclass 26, count 0 2006.229.07:47:12.21#ibcon#flushed, iclass 26, count 0 2006.229.07:47:12.21#ibcon#about to write, iclass 26, count 0 2006.229.07:47:12.21#ibcon#wrote, iclass 26, count 0 2006.229.07:47:12.21#ibcon#about to read 3, iclass 26, count 0 2006.229.07:47:12.25#ibcon#read 3, iclass 26, count 0 2006.229.07:47:12.25#ibcon#about to read 4, iclass 26, count 0 2006.229.07:47:12.25#ibcon#read 4, iclass 26, count 0 2006.229.07:47:12.25#ibcon#about to read 5, iclass 26, count 0 2006.229.07:47:12.25#ibcon#read 5, iclass 26, count 0 2006.229.07:47:12.25#ibcon#about to read 6, iclass 26, count 0 2006.229.07:47:12.25#ibcon#read 6, iclass 26, count 0 2006.229.07:47:12.25#ibcon#end of sib2, iclass 26, count 0 2006.229.07:47:12.25#ibcon#*after write, iclass 26, count 0 2006.229.07:47:12.25#ibcon#*before return 0, iclass 26, count 0 2006.229.07:47:12.25#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:12.25#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.07:47:12.25#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:47:12.25#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:47:12.25$vck44/vb=2,4 2006.229.07:47:12.25#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.07:47:12.25#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.07:47:12.25#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:12.25#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:12.31#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:12.31#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:12.31#ibcon#enter wrdev, iclass 28, count 2 2006.229.07:47:12.31#ibcon#first serial, iclass 28, count 2 2006.229.07:47:12.31#ibcon#enter sib2, iclass 28, count 2 2006.229.07:47:12.31#ibcon#flushed, iclass 28, count 2 2006.229.07:47:12.31#ibcon#about to write, iclass 28, count 2 2006.229.07:47:12.31#ibcon#wrote, iclass 28, count 2 2006.229.07:47:12.31#ibcon#about to read 3, iclass 28, count 2 2006.229.07:47:12.33#ibcon#read 3, iclass 28, count 2 2006.229.07:47:12.33#ibcon#about to read 4, iclass 28, count 2 2006.229.07:47:12.33#ibcon#read 4, iclass 28, count 2 2006.229.07:47:12.33#ibcon#about to read 5, iclass 28, count 2 2006.229.07:47:12.33#ibcon#read 5, iclass 28, count 2 2006.229.07:47:12.33#ibcon#about to read 6, iclass 28, count 2 2006.229.07:47:12.33#ibcon#read 6, iclass 28, count 2 2006.229.07:47:12.33#ibcon#end of sib2, iclass 28, count 2 2006.229.07:47:12.33#ibcon#*mode == 0, iclass 28, count 2 2006.229.07:47:12.33#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.07:47:12.33#ibcon#[27=AT02-04\r\n] 2006.229.07:47:12.33#ibcon#*before write, iclass 28, count 2 2006.229.07:47:12.33#ibcon#enter sib2, iclass 28, count 2 2006.229.07:47:12.33#ibcon#flushed, iclass 28, count 2 2006.229.07:47:12.33#ibcon#about to write, iclass 28, count 2 2006.229.07:47:12.33#ibcon#wrote, iclass 28, count 2 2006.229.07:47:12.33#ibcon#about to read 3, iclass 28, count 2 2006.229.07:47:12.36#ibcon#read 3, iclass 28, count 2 2006.229.07:47:12.36#ibcon#about to read 4, iclass 28, count 2 2006.229.07:47:12.36#ibcon#read 4, iclass 28, count 2 2006.229.07:47:12.36#ibcon#about to read 5, iclass 28, count 2 2006.229.07:47:12.36#ibcon#read 5, iclass 28, count 2 2006.229.07:47:12.36#ibcon#about to read 6, iclass 28, count 2 2006.229.07:47:12.36#ibcon#read 6, iclass 28, count 2 2006.229.07:47:12.36#ibcon#end of sib2, iclass 28, count 2 2006.229.07:47:12.36#ibcon#*after write, iclass 28, count 2 2006.229.07:47:12.36#ibcon#*before return 0, iclass 28, count 2 2006.229.07:47:12.36#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:12.36#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.07:47:12.36#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.07:47:12.36#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:12.36#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:12.48#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:12.48#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:12.48#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:47:12.48#ibcon#first serial, iclass 28, count 0 2006.229.07:47:12.48#ibcon#enter sib2, iclass 28, count 0 2006.229.07:47:12.48#ibcon#flushed, iclass 28, count 0 2006.229.07:47:12.48#ibcon#about to write, iclass 28, count 0 2006.229.07:47:12.48#ibcon#wrote, iclass 28, count 0 2006.229.07:47:12.48#ibcon#about to read 3, iclass 28, count 0 2006.229.07:47:12.50#ibcon#read 3, iclass 28, count 0 2006.229.07:47:12.50#ibcon#about to read 4, iclass 28, count 0 2006.229.07:47:12.50#ibcon#read 4, iclass 28, count 0 2006.229.07:47:12.50#ibcon#about to read 5, iclass 28, count 0 2006.229.07:47:12.50#ibcon#read 5, iclass 28, count 0 2006.229.07:47:12.50#ibcon#about to read 6, iclass 28, count 0 2006.229.07:47:12.50#ibcon#read 6, iclass 28, count 0 2006.229.07:47:12.50#ibcon#end of sib2, iclass 28, count 0 2006.229.07:47:12.50#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:47:12.50#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:47:12.50#ibcon#[27=USB\r\n] 2006.229.07:47:12.50#ibcon#*before write, iclass 28, count 0 2006.229.07:47:12.50#ibcon#enter sib2, iclass 28, count 0 2006.229.07:47:12.50#ibcon#flushed, iclass 28, count 0 2006.229.07:47:12.50#ibcon#about to write, iclass 28, count 0 2006.229.07:47:12.50#ibcon#wrote, iclass 28, count 0 2006.229.07:47:12.50#ibcon#about to read 3, iclass 28, count 0 2006.229.07:47:12.53#ibcon#read 3, iclass 28, count 0 2006.229.07:47:12.53#ibcon#about to read 4, iclass 28, count 0 2006.229.07:47:12.53#ibcon#read 4, iclass 28, count 0 2006.229.07:47:12.53#ibcon#about to read 5, iclass 28, count 0 2006.229.07:47:12.53#ibcon#read 5, iclass 28, count 0 2006.229.07:47:12.53#ibcon#about to read 6, iclass 28, count 0 2006.229.07:47:12.53#ibcon#read 6, iclass 28, count 0 2006.229.07:47:12.53#ibcon#end of sib2, iclass 28, count 0 2006.229.07:47:12.53#ibcon#*after write, iclass 28, count 0 2006.229.07:47:12.53#ibcon#*before return 0, iclass 28, count 0 2006.229.07:47:12.53#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:12.53#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.07:47:12.53#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:47:12.53#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:47:12.53$vck44/vblo=3,649.99 2006.229.07:47:12.53#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.07:47:12.53#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.07:47:12.53#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:12.53#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:12.53#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:12.53#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:12.53#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:47:12.53#ibcon#first serial, iclass 30, count 0 2006.229.07:47:12.53#ibcon#enter sib2, iclass 30, count 0 2006.229.07:47:12.53#ibcon#flushed, iclass 30, count 0 2006.229.07:47:12.53#ibcon#about to write, iclass 30, count 0 2006.229.07:47:12.53#ibcon#wrote, iclass 30, count 0 2006.229.07:47:12.53#ibcon#about to read 3, iclass 30, count 0 2006.229.07:47:12.55#ibcon#read 3, iclass 30, count 0 2006.229.07:47:12.55#ibcon#about to read 4, iclass 30, count 0 2006.229.07:47:12.55#ibcon#read 4, iclass 30, count 0 2006.229.07:47:12.55#ibcon#about to read 5, iclass 30, count 0 2006.229.07:47:12.55#ibcon#read 5, iclass 30, count 0 2006.229.07:47:12.55#ibcon#about to read 6, iclass 30, count 0 2006.229.07:47:12.55#ibcon#read 6, iclass 30, count 0 2006.229.07:47:12.55#ibcon#end of sib2, iclass 30, count 0 2006.229.07:47:12.55#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:47:12.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:47:12.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:47:12.55#ibcon#*before write, iclass 30, count 0 2006.229.07:47:12.55#ibcon#enter sib2, iclass 30, count 0 2006.229.07:47:12.55#ibcon#flushed, iclass 30, count 0 2006.229.07:47:12.55#ibcon#about to write, iclass 30, count 0 2006.229.07:47:12.55#ibcon#wrote, iclass 30, count 0 2006.229.07:47:12.55#ibcon#about to read 3, iclass 30, count 0 2006.229.07:47:12.59#ibcon#read 3, iclass 30, count 0 2006.229.07:47:12.59#ibcon#about to read 4, iclass 30, count 0 2006.229.07:47:12.59#ibcon#read 4, iclass 30, count 0 2006.229.07:47:12.59#ibcon#about to read 5, iclass 30, count 0 2006.229.07:47:12.59#ibcon#read 5, iclass 30, count 0 2006.229.07:47:12.59#ibcon#about to read 6, iclass 30, count 0 2006.229.07:47:12.59#ibcon#read 6, iclass 30, count 0 2006.229.07:47:12.59#ibcon#end of sib2, iclass 30, count 0 2006.229.07:47:12.59#ibcon#*after write, iclass 30, count 0 2006.229.07:47:12.59#ibcon#*before return 0, iclass 30, count 0 2006.229.07:47:12.59#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:12.59#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.07:47:12.59#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:47:12.59#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:47:12.59$vck44/vb=3,4 2006.229.07:47:12.59#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.07:47:12.59#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.07:47:12.59#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:12.59#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:12.65#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:12.65#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:12.65#ibcon#enter wrdev, iclass 32, count 2 2006.229.07:47:12.65#ibcon#first serial, iclass 32, count 2 2006.229.07:47:12.65#ibcon#enter sib2, iclass 32, count 2 2006.229.07:47:12.65#ibcon#flushed, iclass 32, count 2 2006.229.07:47:12.65#ibcon#about to write, iclass 32, count 2 2006.229.07:47:12.65#ibcon#wrote, iclass 32, count 2 2006.229.07:47:12.65#ibcon#about to read 3, iclass 32, count 2 2006.229.07:47:12.67#ibcon#read 3, iclass 32, count 2 2006.229.07:47:12.67#ibcon#about to read 4, iclass 32, count 2 2006.229.07:47:12.67#ibcon#read 4, iclass 32, count 2 2006.229.07:47:12.67#ibcon#about to read 5, iclass 32, count 2 2006.229.07:47:12.67#ibcon#read 5, iclass 32, count 2 2006.229.07:47:12.67#ibcon#about to read 6, iclass 32, count 2 2006.229.07:47:12.67#ibcon#read 6, iclass 32, count 2 2006.229.07:47:12.67#ibcon#end of sib2, iclass 32, count 2 2006.229.07:47:12.67#ibcon#*mode == 0, iclass 32, count 2 2006.229.07:47:12.67#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.07:47:12.67#ibcon#[27=AT03-04\r\n] 2006.229.07:47:12.67#ibcon#*before write, iclass 32, count 2 2006.229.07:47:12.67#ibcon#enter sib2, iclass 32, count 2 2006.229.07:47:12.67#ibcon#flushed, iclass 32, count 2 2006.229.07:47:12.67#ibcon#about to write, iclass 32, count 2 2006.229.07:47:12.67#ibcon#wrote, iclass 32, count 2 2006.229.07:47:12.67#ibcon#about to read 3, iclass 32, count 2 2006.229.07:47:12.70#ibcon#read 3, iclass 32, count 2 2006.229.07:47:12.70#ibcon#about to read 4, iclass 32, count 2 2006.229.07:47:12.70#ibcon#read 4, iclass 32, count 2 2006.229.07:47:12.70#ibcon#about to read 5, iclass 32, count 2 2006.229.07:47:12.70#ibcon#read 5, iclass 32, count 2 2006.229.07:47:12.70#ibcon#about to read 6, iclass 32, count 2 2006.229.07:47:12.70#ibcon#read 6, iclass 32, count 2 2006.229.07:47:12.70#ibcon#end of sib2, iclass 32, count 2 2006.229.07:47:12.70#ibcon#*after write, iclass 32, count 2 2006.229.07:47:12.70#ibcon#*before return 0, iclass 32, count 2 2006.229.07:47:12.70#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:12.70#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.07:47:12.70#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.07:47:12.70#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:12.70#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:12.82#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:12.82#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:12.82#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:47:12.82#ibcon#first serial, iclass 32, count 0 2006.229.07:47:12.82#ibcon#enter sib2, iclass 32, count 0 2006.229.07:47:12.82#ibcon#flushed, iclass 32, count 0 2006.229.07:47:12.82#ibcon#about to write, iclass 32, count 0 2006.229.07:47:12.82#ibcon#wrote, iclass 32, count 0 2006.229.07:47:12.82#ibcon#about to read 3, iclass 32, count 0 2006.229.07:47:12.84#ibcon#read 3, iclass 32, count 0 2006.229.07:47:12.84#ibcon#about to read 4, iclass 32, count 0 2006.229.07:47:12.84#ibcon#read 4, iclass 32, count 0 2006.229.07:47:12.84#ibcon#about to read 5, iclass 32, count 0 2006.229.07:47:12.84#ibcon#read 5, iclass 32, count 0 2006.229.07:47:12.84#ibcon#about to read 6, iclass 32, count 0 2006.229.07:47:12.84#ibcon#read 6, iclass 32, count 0 2006.229.07:47:12.84#ibcon#end of sib2, iclass 32, count 0 2006.229.07:47:12.84#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:47:12.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:47:12.84#ibcon#[27=USB\r\n] 2006.229.07:47:12.84#ibcon#*before write, iclass 32, count 0 2006.229.07:47:12.84#ibcon#enter sib2, iclass 32, count 0 2006.229.07:47:12.84#ibcon#flushed, iclass 32, count 0 2006.229.07:47:12.84#ibcon#about to write, iclass 32, count 0 2006.229.07:47:12.84#ibcon#wrote, iclass 32, count 0 2006.229.07:47:12.84#ibcon#about to read 3, iclass 32, count 0 2006.229.07:47:12.87#ibcon#read 3, iclass 32, count 0 2006.229.07:47:12.87#ibcon#about to read 4, iclass 32, count 0 2006.229.07:47:12.87#ibcon#read 4, iclass 32, count 0 2006.229.07:47:12.87#ibcon#about to read 5, iclass 32, count 0 2006.229.07:47:12.87#ibcon#read 5, iclass 32, count 0 2006.229.07:47:12.87#ibcon#about to read 6, iclass 32, count 0 2006.229.07:47:12.87#ibcon#read 6, iclass 32, count 0 2006.229.07:47:12.87#ibcon#end of sib2, iclass 32, count 0 2006.229.07:47:12.87#ibcon#*after write, iclass 32, count 0 2006.229.07:47:12.87#ibcon#*before return 0, iclass 32, count 0 2006.229.07:47:12.87#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:12.87#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.07:47:12.87#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:47:12.87#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:47:12.87$vck44/vblo=4,679.99 2006.229.07:47:12.87#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.07:47:12.87#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.07:47:12.87#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:12.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:12.87#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:12.87#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:12.87#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:47:12.87#ibcon#first serial, iclass 34, count 0 2006.229.07:47:12.87#ibcon#enter sib2, iclass 34, count 0 2006.229.07:47:12.87#ibcon#flushed, iclass 34, count 0 2006.229.07:47:12.87#ibcon#about to write, iclass 34, count 0 2006.229.07:47:12.87#ibcon#wrote, iclass 34, count 0 2006.229.07:47:12.87#ibcon#about to read 3, iclass 34, count 0 2006.229.07:47:12.89#ibcon#read 3, iclass 34, count 0 2006.229.07:47:12.89#ibcon#about to read 4, iclass 34, count 0 2006.229.07:47:12.89#ibcon#read 4, iclass 34, count 0 2006.229.07:47:12.89#ibcon#about to read 5, iclass 34, count 0 2006.229.07:47:12.89#ibcon#read 5, iclass 34, count 0 2006.229.07:47:12.89#ibcon#about to read 6, iclass 34, count 0 2006.229.07:47:12.89#ibcon#read 6, iclass 34, count 0 2006.229.07:47:12.89#ibcon#end of sib2, iclass 34, count 0 2006.229.07:47:12.89#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:47:12.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:47:12.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:47:12.89#ibcon#*before write, iclass 34, count 0 2006.229.07:47:12.89#ibcon#enter sib2, iclass 34, count 0 2006.229.07:47:12.89#ibcon#flushed, iclass 34, count 0 2006.229.07:47:12.89#ibcon#about to write, iclass 34, count 0 2006.229.07:47:12.89#ibcon#wrote, iclass 34, count 0 2006.229.07:47:12.89#ibcon#about to read 3, iclass 34, count 0 2006.229.07:47:12.93#ibcon#read 3, iclass 34, count 0 2006.229.07:47:12.93#ibcon#about to read 4, iclass 34, count 0 2006.229.07:47:12.93#ibcon#read 4, iclass 34, count 0 2006.229.07:47:12.93#ibcon#about to read 5, iclass 34, count 0 2006.229.07:47:12.93#ibcon#read 5, iclass 34, count 0 2006.229.07:47:12.93#ibcon#about to read 6, iclass 34, count 0 2006.229.07:47:12.93#ibcon#read 6, iclass 34, count 0 2006.229.07:47:12.93#ibcon#end of sib2, iclass 34, count 0 2006.229.07:47:12.93#ibcon#*after write, iclass 34, count 0 2006.229.07:47:12.93#ibcon#*before return 0, iclass 34, count 0 2006.229.07:47:12.93#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:12.93#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:47:12.93#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:47:12.93#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:47:12.93$vck44/vb=4,4 2006.229.07:47:12.93#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.07:47:12.93#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.07:47:12.93#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:12.93#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:12.99#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:12.99#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:12.99#ibcon#enter wrdev, iclass 36, count 2 2006.229.07:47:12.99#ibcon#first serial, iclass 36, count 2 2006.229.07:47:12.99#ibcon#enter sib2, iclass 36, count 2 2006.229.07:47:12.99#ibcon#flushed, iclass 36, count 2 2006.229.07:47:12.99#ibcon#about to write, iclass 36, count 2 2006.229.07:47:12.99#ibcon#wrote, iclass 36, count 2 2006.229.07:47:12.99#ibcon#about to read 3, iclass 36, count 2 2006.229.07:47:13.01#ibcon#read 3, iclass 36, count 2 2006.229.07:47:13.01#ibcon#about to read 4, iclass 36, count 2 2006.229.07:47:13.01#ibcon#read 4, iclass 36, count 2 2006.229.07:47:13.01#ibcon#about to read 5, iclass 36, count 2 2006.229.07:47:13.01#ibcon#read 5, iclass 36, count 2 2006.229.07:47:13.01#ibcon#about to read 6, iclass 36, count 2 2006.229.07:47:13.01#ibcon#read 6, iclass 36, count 2 2006.229.07:47:13.01#ibcon#end of sib2, iclass 36, count 2 2006.229.07:47:13.01#ibcon#*mode == 0, iclass 36, count 2 2006.229.07:47:13.01#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.07:47:13.01#ibcon#[27=AT04-04\r\n] 2006.229.07:47:13.01#ibcon#*before write, iclass 36, count 2 2006.229.07:47:13.01#ibcon#enter sib2, iclass 36, count 2 2006.229.07:47:13.01#ibcon#flushed, iclass 36, count 2 2006.229.07:47:13.01#ibcon#about to write, iclass 36, count 2 2006.229.07:47:13.01#ibcon#wrote, iclass 36, count 2 2006.229.07:47:13.01#ibcon#about to read 3, iclass 36, count 2 2006.229.07:47:13.04#ibcon#read 3, iclass 36, count 2 2006.229.07:47:13.04#ibcon#about to read 4, iclass 36, count 2 2006.229.07:47:13.04#ibcon#read 4, iclass 36, count 2 2006.229.07:47:13.04#ibcon#about to read 5, iclass 36, count 2 2006.229.07:47:13.04#ibcon#read 5, iclass 36, count 2 2006.229.07:47:13.04#ibcon#about to read 6, iclass 36, count 2 2006.229.07:47:13.04#ibcon#read 6, iclass 36, count 2 2006.229.07:47:13.04#ibcon#end of sib2, iclass 36, count 2 2006.229.07:47:13.04#ibcon#*after write, iclass 36, count 2 2006.229.07:47:13.04#ibcon#*before return 0, iclass 36, count 2 2006.229.07:47:13.04#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:13.04#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.07:47:13.04#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.07:47:13.04#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:13.04#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:13.16#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:13.16#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:13.16#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:47:13.16#ibcon#first serial, iclass 36, count 0 2006.229.07:47:13.16#ibcon#enter sib2, iclass 36, count 0 2006.229.07:47:13.16#ibcon#flushed, iclass 36, count 0 2006.229.07:47:13.16#ibcon#about to write, iclass 36, count 0 2006.229.07:47:13.16#ibcon#wrote, iclass 36, count 0 2006.229.07:47:13.16#ibcon#about to read 3, iclass 36, count 0 2006.229.07:47:13.18#ibcon#read 3, iclass 36, count 0 2006.229.07:47:13.18#ibcon#about to read 4, iclass 36, count 0 2006.229.07:47:13.18#ibcon#read 4, iclass 36, count 0 2006.229.07:47:13.18#ibcon#about to read 5, iclass 36, count 0 2006.229.07:47:13.18#ibcon#read 5, iclass 36, count 0 2006.229.07:47:13.18#ibcon#about to read 6, iclass 36, count 0 2006.229.07:47:13.18#ibcon#read 6, iclass 36, count 0 2006.229.07:47:13.18#ibcon#end of sib2, iclass 36, count 0 2006.229.07:47:13.18#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:47:13.18#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:47:13.18#ibcon#[27=USB\r\n] 2006.229.07:47:13.18#ibcon#*before write, iclass 36, count 0 2006.229.07:47:13.18#ibcon#enter sib2, iclass 36, count 0 2006.229.07:47:13.18#ibcon#flushed, iclass 36, count 0 2006.229.07:47:13.18#ibcon#about to write, iclass 36, count 0 2006.229.07:47:13.18#ibcon#wrote, iclass 36, count 0 2006.229.07:47:13.18#ibcon#about to read 3, iclass 36, count 0 2006.229.07:47:13.21#ibcon#read 3, iclass 36, count 0 2006.229.07:47:13.21#ibcon#about to read 4, iclass 36, count 0 2006.229.07:47:13.21#ibcon#read 4, iclass 36, count 0 2006.229.07:47:13.21#ibcon#about to read 5, iclass 36, count 0 2006.229.07:47:13.21#ibcon#read 5, iclass 36, count 0 2006.229.07:47:13.21#ibcon#about to read 6, iclass 36, count 0 2006.229.07:47:13.21#ibcon#read 6, iclass 36, count 0 2006.229.07:47:13.21#ibcon#end of sib2, iclass 36, count 0 2006.229.07:47:13.21#ibcon#*after write, iclass 36, count 0 2006.229.07:47:13.21#ibcon#*before return 0, iclass 36, count 0 2006.229.07:47:13.21#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:13.21#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.07:47:13.21#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:47:13.21#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:47:13.21$vck44/vblo=5,709.99 2006.229.07:47:13.21#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.07:47:13.21#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.07:47:13.21#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:13.21#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:13.21#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:13.21#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:13.21#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:47:13.21#ibcon#first serial, iclass 38, count 0 2006.229.07:47:13.21#ibcon#enter sib2, iclass 38, count 0 2006.229.07:47:13.21#ibcon#flushed, iclass 38, count 0 2006.229.07:47:13.21#ibcon#about to write, iclass 38, count 0 2006.229.07:47:13.21#ibcon#wrote, iclass 38, count 0 2006.229.07:47:13.21#ibcon#about to read 3, iclass 38, count 0 2006.229.07:47:13.23#ibcon#read 3, iclass 38, count 0 2006.229.07:47:13.23#ibcon#about to read 4, iclass 38, count 0 2006.229.07:47:13.23#ibcon#read 4, iclass 38, count 0 2006.229.07:47:13.23#ibcon#about to read 5, iclass 38, count 0 2006.229.07:47:13.23#ibcon#read 5, iclass 38, count 0 2006.229.07:47:13.23#ibcon#about to read 6, iclass 38, count 0 2006.229.07:47:13.23#ibcon#read 6, iclass 38, count 0 2006.229.07:47:13.23#ibcon#end of sib2, iclass 38, count 0 2006.229.07:47:13.23#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:47:13.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:47:13.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:47:13.23#ibcon#*before write, iclass 38, count 0 2006.229.07:47:13.23#ibcon#enter sib2, iclass 38, count 0 2006.229.07:47:13.23#ibcon#flushed, iclass 38, count 0 2006.229.07:47:13.23#ibcon#about to write, iclass 38, count 0 2006.229.07:47:13.23#ibcon#wrote, iclass 38, count 0 2006.229.07:47:13.23#ibcon#about to read 3, iclass 38, count 0 2006.229.07:47:13.27#ibcon#read 3, iclass 38, count 0 2006.229.07:47:13.27#ibcon#about to read 4, iclass 38, count 0 2006.229.07:47:13.27#ibcon#read 4, iclass 38, count 0 2006.229.07:47:13.27#ibcon#about to read 5, iclass 38, count 0 2006.229.07:47:13.27#ibcon#read 5, iclass 38, count 0 2006.229.07:47:13.27#ibcon#about to read 6, iclass 38, count 0 2006.229.07:47:13.27#ibcon#read 6, iclass 38, count 0 2006.229.07:47:13.27#ibcon#end of sib2, iclass 38, count 0 2006.229.07:47:13.27#ibcon#*after write, iclass 38, count 0 2006.229.07:47:13.27#ibcon#*before return 0, iclass 38, count 0 2006.229.07:47:13.27#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:13.27#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.07:47:13.27#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:47:13.27#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:47:13.27$vck44/vb=5,4 2006.229.07:47:13.27#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.07:47:13.27#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.07:47:13.27#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:13.27#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:13.33#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:13.33#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:13.33#ibcon#enter wrdev, iclass 40, count 2 2006.229.07:47:13.33#ibcon#first serial, iclass 40, count 2 2006.229.07:47:13.33#ibcon#enter sib2, iclass 40, count 2 2006.229.07:47:13.33#ibcon#flushed, iclass 40, count 2 2006.229.07:47:13.33#ibcon#about to write, iclass 40, count 2 2006.229.07:47:13.33#ibcon#wrote, iclass 40, count 2 2006.229.07:47:13.33#ibcon#about to read 3, iclass 40, count 2 2006.229.07:47:13.35#ibcon#read 3, iclass 40, count 2 2006.229.07:47:13.35#ibcon#about to read 4, iclass 40, count 2 2006.229.07:47:13.35#ibcon#read 4, iclass 40, count 2 2006.229.07:47:13.35#ibcon#about to read 5, iclass 40, count 2 2006.229.07:47:13.35#ibcon#read 5, iclass 40, count 2 2006.229.07:47:13.35#ibcon#about to read 6, iclass 40, count 2 2006.229.07:47:13.35#ibcon#read 6, iclass 40, count 2 2006.229.07:47:13.35#ibcon#end of sib2, iclass 40, count 2 2006.229.07:47:13.35#ibcon#*mode == 0, iclass 40, count 2 2006.229.07:47:13.35#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.07:47:13.35#ibcon#[27=AT05-04\r\n] 2006.229.07:47:13.35#ibcon#*before write, iclass 40, count 2 2006.229.07:47:13.35#ibcon#enter sib2, iclass 40, count 2 2006.229.07:47:13.35#ibcon#flushed, iclass 40, count 2 2006.229.07:47:13.35#ibcon#about to write, iclass 40, count 2 2006.229.07:47:13.35#ibcon#wrote, iclass 40, count 2 2006.229.07:47:13.35#ibcon#about to read 3, iclass 40, count 2 2006.229.07:47:13.38#ibcon#read 3, iclass 40, count 2 2006.229.07:47:13.38#ibcon#about to read 4, iclass 40, count 2 2006.229.07:47:13.38#ibcon#read 4, iclass 40, count 2 2006.229.07:47:13.38#ibcon#about to read 5, iclass 40, count 2 2006.229.07:47:13.38#ibcon#read 5, iclass 40, count 2 2006.229.07:47:13.38#ibcon#about to read 6, iclass 40, count 2 2006.229.07:47:13.38#ibcon#read 6, iclass 40, count 2 2006.229.07:47:13.38#ibcon#end of sib2, iclass 40, count 2 2006.229.07:47:13.38#ibcon#*after write, iclass 40, count 2 2006.229.07:47:13.38#ibcon#*before return 0, iclass 40, count 2 2006.229.07:47:13.38#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:13.38#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.07:47:13.38#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.07:47:13.38#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:13.38#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:13.50#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:13.50#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:13.50#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:47:13.50#ibcon#first serial, iclass 40, count 0 2006.229.07:47:13.50#ibcon#enter sib2, iclass 40, count 0 2006.229.07:47:13.50#ibcon#flushed, iclass 40, count 0 2006.229.07:47:13.50#ibcon#about to write, iclass 40, count 0 2006.229.07:47:13.50#ibcon#wrote, iclass 40, count 0 2006.229.07:47:13.50#ibcon#about to read 3, iclass 40, count 0 2006.229.07:47:13.52#ibcon#read 3, iclass 40, count 0 2006.229.07:47:13.52#ibcon#about to read 4, iclass 40, count 0 2006.229.07:47:13.52#ibcon#read 4, iclass 40, count 0 2006.229.07:47:13.52#ibcon#about to read 5, iclass 40, count 0 2006.229.07:47:13.52#ibcon#read 5, iclass 40, count 0 2006.229.07:47:13.52#ibcon#about to read 6, iclass 40, count 0 2006.229.07:47:13.52#ibcon#read 6, iclass 40, count 0 2006.229.07:47:13.52#ibcon#end of sib2, iclass 40, count 0 2006.229.07:47:13.52#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:47:13.52#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:47:13.52#ibcon#[27=USB\r\n] 2006.229.07:47:13.52#ibcon#*before write, iclass 40, count 0 2006.229.07:47:13.52#ibcon#enter sib2, iclass 40, count 0 2006.229.07:47:13.52#ibcon#flushed, iclass 40, count 0 2006.229.07:47:13.52#ibcon#about to write, iclass 40, count 0 2006.229.07:47:13.52#ibcon#wrote, iclass 40, count 0 2006.229.07:47:13.52#ibcon#about to read 3, iclass 40, count 0 2006.229.07:47:13.55#ibcon#read 3, iclass 40, count 0 2006.229.07:47:13.55#ibcon#about to read 4, iclass 40, count 0 2006.229.07:47:13.55#ibcon#read 4, iclass 40, count 0 2006.229.07:47:13.55#ibcon#about to read 5, iclass 40, count 0 2006.229.07:47:13.55#ibcon#read 5, iclass 40, count 0 2006.229.07:47:13.55#ibcon#about to read 6, iclass 40, count 0 2006.229.07:47:13.55#ibcon#read 6, iclass 40, count 0 2006.229.07:47:13.55#ibcon#end of sib2, iclass 40, count 0 2006.229.07:47:13.55#ibcon#*after write, iclass 40, count 0 2006.229.07:47:13.55#ibcon#*before return 0, iclass 40, count 0 2006.229.07:47:13.55#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:13.55#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.07:47:13.55#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:47:13.55#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:47:13.55$vck44/vblo=6,719.99 2006.229.07:47:13.55#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.07:47:13.55#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.07:47:13.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:13.55#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:47:13.55#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:47:13.55#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:47:13.55#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:47:13.55#ibcon#first serial, iclass 4, count 0 2006.229.07:47:13.55#ibcon#enter sib2, iclass 4, count 0 2006.229.07:47:13.55#ibcon#flushed, iclass 4, count 0 2006.229.07:47:13.55#ibcon#about to write, iclass 4, count 0 2006.229.07:47:13.55#ibcon#wrote, iclass 4, count 0 2006.229.07:47:13.55#ibcon#about to read 3, iclass 4, count 0 2006.229.07:47:13.57#ibcon#read 3, iclass 4, count 0 2006.229.07:47:13.57#ibcon#about to read 4, iclass 4, count 0 2006.229.07:47:13.57#ibcon#read 4, iclass 4, count 0 2006.229.07:47:13.57#ibcon#about to read 5, iclass 4, count 0 2006.229.07:47:13.57#ibcon#read 5, iclass 4, count 0 2006.229.07:47:13.57#ibcon#about to read 6, iclass 4, count 0 2006.229.07:47:13.57#ibcon#read 6, iclass 4, count 0 2006.229.07:47:13.57#ibcon#end of sib2, iclass 4, count 0 2006.229.07:47:13.57#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:47:13.57#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:47:13.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:47:13.57#ibcon#*before write, iclass 4, count 0 2006.229.07:47:13.57#ibcon#enter sib2, iclass 4, count 0 2006.229.07:47:13.57#ibcon#flushed, iclass 4, count 0 2006.229.07:47:13.57#ibcon#about to write, iclass 4, count 0 2006.229.07:47:13.57#ibcon#wrote, iclass 4, count 0 2006.229.07:47:13.57#ibcon#about to read 3, iclass 4, count 0 2006.229.07:47:13.61#ibcon#read 3, iclass 4, count 0 2006.229.07:47:13.61#ibcon#about to read 4, iclass 4, count 0 2006.229.07:47:13.61#ibcon#read 4, iclass 4, count 0 2006.229.07:47:13.61#ibcon#about to read 5, iclass 4, count 0 2006.229.07:47:13.61#ibcon#read 5, iclass 4, count 0 2006.229.07:47:13.61#ibcon#about to read 6, iclass 4, count 0 2006.229.07:47:13.61#ibcon#read 6, iclass 4, count 0 2006.229.07:47:13.61#ibcon#end of sib2, iclass 4, count 0 2006.229.07:47:13.61#ibcon#*after write, iclass 4, count 0 2006.229.07:47:13.61#ibcon#*before return 0, iclass 4, count 0 2006.229.07:47:13.61#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:47:13.61#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.07:47:13.61#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:47:13.61#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:47:13.61$vck44/vb=6,4 2006.229.07:47:13.61#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.07:47:13.61#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.07:47:13.61#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:13.61#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:47:13.67#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:47:13.67#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:47:13.67#ibcon#enter wrdev, iclass 6, count 2 2006.229.07:47:13.67#ibcon#first serial, iclass 6, count 2 2006.229.07:47:13.67#ibcon#enter sib2, iclass 6, count 2 2006.229.07:47:13.67#ibcon#flushed, iclass 6, count 2 2006.229.07:47:13.67#ibcon#about to write, iclass 6, count 2 2006.229.07:47:13.67#ibcon#wrote, iclass 6, count 2 2006.229.07:47:13.67#ibcon#about to read 3, iclass 6, count 2 2006.229.07:47:13.69#ibcon#read 3, iclass 6, count 2 2006.229.07:47:13.69#ibcon#about to read 4, iclass 6, count 2 2006.229.07:47:13.69#ibcon#read 4, iclass 6, count 2 2006.229.07:47:13.69#ibcon#about to read 5, iclass 6, count 2 2006.229.07:47:13.69#ibcon#read 5, iclass 6, count 2 2006.229.07:47:13.69#ibcon#about to read 6, iclass 6, count 2 2006.229.07:47:13.69#ibcon#read 6, iclass 6, count 2 2006.229.07:47:13.69#ibcon#end of sib2, iclass 6, count 2 2006.229.07:47:13.69#ibcon#*mode == 0, iclass 6, count 2 2006.229.07:47:13.69#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.07:47:13.69#ibcon#[27=AT06-04\r\n] 2006.229.07:47:13.69#ibcon#*before write, iclass 6, count 2 2006.229.07:47:13.69#ibcon#enter sib2, iclass 6, count 2 2006.229.07:47:13.69#ibcon#flushed, iclass 6, count 2 2006.229.07:47:13.69#ibcon#about to write, iclass 6, count 2 2006.229.07:47:13.69#ibcon#wrote, iclass 6, count 2 2006.229.07:47:13.69#ibcon#about to read 3, iclass 6, count 2 2006.229.07:47:13.72#ibcon#read 3, iclass 6, count 2 2006.229.07:47:13.72#ibcon#about to read 4, iclass 6, count 2 2006.229.07:47:13.72#ibcon#read 4, iclass 6, count 2 2006.229.07:47:13.72#ibcon#about to read 5, iclass 6, count 2 2006.229.07:47:13.72#ibcon#read 5, iclass 6, count 2 2006.229.07:47:13.72#ibcon#about to read 6, iclass 6, count 2 2006.229.07:47:13.72#ibcon#read 6, iclass 6, count 2 2006.229.07:47:13.72#ibcon#end of sib2, iclass 6, count 2 2006.229.07:47:13.72#ibcon#*after write, iclass 6, count 2 2006.229.07:47:13.72#ibcon#*before return 0, iclass 6, count 2 2006.229.07:47:13.72#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:47:13.72#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.07:47:13.72#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.07:47:13.72#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:13.72#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:47:13.84#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:47:13.84#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:47:13.84#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:47:13.84#ibcon#first serial, iclass 6, count 0 2006.229.07:47:13.84#ibcon#enter sib2, iclass 6, count 0 2006.229.07:47:13.84#ibcon#flushed, iclass 6, count 0 2006.229.07:47:13.84#ibcon#about to write, iclass 6, count 0 2006.229.07:47:13.84#ibcon#wrote, iclass 6, count 0 2006.229.07:47:13.84#ibcon#about to read 3, iclass 6, count 0 2006.229.07:47:13.86#ibcon#read 3, iclass 6, count 0 2006.229.07:47:13.86#ibcon#about to read 4, iclass 6, count 0 2006.229.07:47:13.86#ibcon#read 4, iclass 6, count 0 2006.229.07:47:13.86#ibcon#about to read 5, iclass 6, count 0 2006.229.07:47:13.86#ibcon#read 5, iclass 6, count 0 2006.229.07:47:13.86#ibcon#about to read 6, iclass 6, count 0 2006.229.07:47:13.86#ibcon#read 6, iclass 6, count 0 2006.229.07:47:13.86#ibcon#end of sib2, iclass 6, count 0 2006.229.07:47:13.86#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:47:13.86#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:47:13.86#ibcon#[27=USB\r\n] 2006.229.07:47:13.86#ibcon#*before write, iclass 6, count 0 2006.229.07:47:13.86#ibcon#enter sib2, iclass 6, count 0 2006.229.07:47:13.86#ibcon#flushed, iclass 6, count 0 2006.229.07:47:13.86#ibcon#about to write, iclass 6, count 0 2006.229.07:47:13.86#ibcon#wrote, iclass 6, count 0 2006.229.07:47:13.86#ibcon#about to read 3, iclass 6, count 0 2006.229.07:47:13.89#ibcon#read 3, iclass 6, count 0 2006.229.07:47:13.89#ibcon#about to read 4, iclass 6, count 0 2006.229.07:47:13.89#ibcon#read 4, iclass 6, count 0 2006.229.07:47:13.89#ibcon#about to read 5, iclass 6, count 0 2006.229.07:47:13.89#ibcon#read 5, iclass 6, count 0 2006.229.07:47:13.89#ibcon#about to read 6, iclass 6, count 0 2006.229.07:47:13.89#ibcon#read 6, iclass 6, count 0 2006.229.07:47:13.89#ibcon#end of sib2, iclass 6, count 0 2006.229.07:47:13.89#ibcon#*after write, iclass 6, count 0 2006.229.07:47:13.89#ibcon#*before return 0, iclass 6, count 0 2006.229.07:47:13.89#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:47:13.89#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.07:47:13.89#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:47:13.89#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:47:13.89$vck44/vblo=7,734.99 2006.229.07:47:13.89#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.07:47:13.89#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.07:47:13.89#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:13.89#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:47:13.89#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:47:13.89#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:47:13.89#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:47:13.89#ibcon#first serial, iclass 10, count 0 2006.229.07:47:13.89#ibcon#enter sib2, iclass 10, count 0 2006.229.07:47:13.89#ibcon#flushed, iclass 10, count 0 2006.229.07:47:13.89#ibcon#about to write, iclass 10, count 0 2006.229.07:47:13.89#ibcon#wrote, iclass 10, count 0 2006.229.07:47:13.89#ibcon#about to read 3, iclass 10, count 0 2006.229.07:47:13.91#ibcon#read 3, iclass 10, count 0 2006.229.07:47:13.91#ibcon#about to read 4, iclass 10, count 0 2006.229.07:47:13.91#ibcon#read 4, iclass 10, count 0 2006.229.07:47:13.91#ibcon#about to read 5, iclass 10, count 0 2006.229.07:47:13.91#ibcon#read 5, iclass 10, count 0 2006.229.07:47:13.91#ibcon#about to read 6, iclass 10, count 0 2006.229.07:47:13.91#ibcon#read 6, iclass 10, count 0 2006.229.07:47:13.91#ibcon#end of sib2, iclass 10, count 0 2006.229.07:47:13.91#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:47:13.91#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:47:13.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:47:13.91#ibcon#*before write, iclass 10, count 0 2006.229.07:47:13.91#ibcon#enter sib2, iclass 10, count 0 2006.229.07:47:13.91#ibcon#flushed, iclass 10, count 0 2006.229.07:47:13.91#ibcon#about to write, iclass 10, count 0 2006.229.07:47:13.91#ibcon#wrote, iclass 10, count 0 2006.229.07:47:13.91#ibcon#about to read 3, iclass 10, count 0 2006.229.07:47:13.95#ibcon#read 3, iclass 10, count 0 2006.229.07:47:13.95#ibcon#about to read 4, iclass 10, count 0 2006.229.07:47:13.95#ibcon#read 4, iclass 10, count 0 2006.229.07:47:13.95#ibcon#about to read 5, iclass 10, count 0 2006.229.07:47:13.95#ibcon#read 5, iclass 10, count 0 2006.229.07:47:13.95#ibcon#about to read 6, iclass 10, count 0 2006.229.07:47:13.95#ibcon#read 6, iclass 10, count 0 2006.229.07:47:13.95#ibcon#end of sib2, iclass 10, count 0 2006.229.07:47:13.95#ibcon#*after write, iclass 10, count 0 2006.229.07:47:13.95#ibcon#*before return 0, iclass 10, count 0 2006.229.07:47:13.95#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:47:13.95#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.07:47:13.95#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:47:13.95#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:47:13.95$vck44/vb=7,4 2006.229.07:47:13.95#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.07:47:13.95#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.07:47:13.95#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:13.95#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:14.01#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:14.01#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:14.01#ibcon#enter wrdev, iclass 12, count 2 2006.229.07:47:14.01#ibcon#first serial, iclass 12, count 2 2006.229.07:47:14.01#ibcon#enter sib2, iclass 12, count 2 2006.229.07:47:14.01#ibcon#flushed, iclass 12, count 2 2006.229.07:47:14.01#ibcon#about to write, iclass 12, count 2 2006.229.07:47:14.01#ibcon#wrote, iclass 12, count 2 2006.229.07:47:14.01#ibcon#about to read 3, iclass 12, count 2 2006.229.07:47:14.03#ibcon#read 3, iclass 12, count 2 2006.229.07:47:14.03#ibcon#about to read 4, iclass 12, count 2 2006.229.07:47:14.03#ibcon#read 4, iclass 12, count 2 2006.229.07:47:14.03#ibcon#about to read 5, iclass 12, count 2 2006.229.07:47:14.03#ibcon#read 5, iclass 12, count 2 2006.229.07:47:14.03#ibcon#about to read 6, iclass 12, count 2 2006.229.07:47:14.03#ibcon#read 6, iclass 12, count 2 2006.229.07:47:14.03#ibcon#end of sib2, iclass 12, count 2 2006.229.07:47:14.03#ibcon#*mode == 0, iclass 12, count 2 2006.229.07:47:14.03#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.07:47:14.03#ibcon#[27=AT07-04\r\n] 2006.229.07:47:14.03#ibcon#*before write, iclass 12, count 2 2006.229.07:47:14.03#ibcon#enter sib2, iclass 12, count 2 2006.229.07:47:14.03#ibcon#flushed, iclass 12, count 2 2006.229.07:47:14.03#ibcon#about to write, iclass 12, count 2 2006.229.07:47:14.03#ibcon#wrote, iclass 12, count 2 2006.229.07:47:14.03#ibcon#about to read 3, iclass 12, count 2 2006.229.07:47:14.06#ibcon#read 3, iclass 12, count 2 2006.229.07:47:14.06#ibcon#about to read 4, iclass 12, count 2 2006.229.07:47:14.06#ibcon#read 4, iclass 12, count 2 2006.229.07:47:14.06#ibcon#about to read 5, iclass 12, count 2 2006.229.07:47:14.06#ibcon#read 5, iclass 12, count 2 2006.229.07:47:14.06#ibcon#about to read 6, iclass 12, count 2 2006.229.07:47:14.06#ibcon#read 6, iclass 12, count 2 2006.229.07:47:14.06#ibcon#end of sib2, iclass 12, count 2 2006.229.07:47:14.06#ibcon#*after write, iclass 12, count 2 2006.229.07:47:14.06#ibcon#*before return 0, iclass 12, count 2 2006.229.07:47:14.06#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:14.06#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.07:47:14.06#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.07:47:14.06#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:14.06#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:14.18#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:14.18#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:14.18#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:47:14.18#ibcon#first serial, iclass 12, count 0 2006.229.07:47:14.18#ibcon#enter sib2, iclass 12, count 0 2006.229.07:47:14.18#ibcon#flushed, iclass 12, count 0 2006.229.07:47:14.18#ibcon#about to write, iclass 12, count 0 2006.229.07:47:14.18#ibcon#wrote, iclass 12, count 0 2006.229.07:47:14.18#ibcon#about to read 3, iclass 12, count 0 2006.229.07:47:14.20#ibcon#read 3, iclass 12, count 0 2006.229.07:47:14.20#ibcon#about to read 4, iclass 12, count 0 2006.229.07:47:14.20#ibcon#read 4, iclass 12, count 0 2006.229.07:47:14.20#ibcon#about to read 5, iclass 12, count 0 2006.229.07:47:14.20#ibcon#read 5, iclass 12, count 0 2006.229.07:47:14.20#ibcon#about to read 6, iclass 12, count 0 2006.229.07:47:14.20#ibcon#read 6, iclass 12, count 0 2006.229.07:47:14.20#ibcon#end of sib2, iclass 12, count 0 2006.229.07:47:14.20#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:47:14.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:47:14.20#ibcon#[27=USB\r\n] 2006.229.07:47:14.20#ibcon#*before write, iclass 12, count 0 2006.229.07:47:14.20#ibcon#enter sib2, iclass 12, count 0 2006.229.07:47:14.20#ibcon#flushed, iclass 12, count 0 2006.229.07:47:14.20#ibcon#about to write, iclass 12, count 0 2006.229.07:47:14.20#ibcon#wrote, iclass 12, count 0 2006.229.07:47:14.20#ibcon#about to read 3, iclass 12, count 0 2006.229.07:47:14.23#ibcon#read 3, iclass 12, count 0 2006.229.07:47:14.23#ibcon#about to read 4, iclass 12, count 0 2006.229.07:47:14.23#ibcon#read 4, iclass 12, count 0 2006.229.07:47:14.23#ibcon#about to read 5, iclass 12, count 0 2006.229.07:47:14.23#ibcon#read 5, iclass 12, count 0 2006.229.07:47:14.23#ibcon#about to read 6, iclass 12, count 0 2006.229.07:47:14.23#ibcon#read 6, iclass 12, count 0 2006.229.07:47:14.23#ibcon#end of sib2, iclass 12, count 0 2006.229.07:47:14.23#ibcon#*after write, iclass 12, count 0 2006.229.07:47:14.23#ibcon#*before return 0, iclass 12, count 0 2006.229.07:47:14.23#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:14.23#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.07:47:14.23#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:47:14.23#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:47:14.23$vck44/vblo=8,744.99 2006.229.07:47:14.23#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.07:47:14.23#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.07:47:14.23#ibcon#ireg 17 cls_cnt 0 2006.229.07:47:14.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:14.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:14.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:14.23#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:47:14.23#ibcon#first serial, iclass 14, count 0 2006.229.07:47:14.23#ibcon#enter sib2, iclass 14, count 0 2006.229.07:47:14.23#ibcon#flushed, iclass 14, count 0 2006.229.07:47:14.23#ibcon#about to write, iclass 14, count 0 2006.229.07:47:14.23#ibcon#wrote, iclass 14, count 0 2006.229.07:47:14.23#ibcon#about to read 3, iclass 14, count 0 2006.229.07:47:14.25#ibcon#read 3, iclass 14, count 0 2006.229.07:47:14.25#ibcon#about to read 4, iclass 14, count 0 2006.229.07:47:14.25#ibcon#read 4, iclass 14, count 0 2006.229.07:47:14.25#ibcon#about to read 5, iclass 14, count 0 2006.229.07:47:14.25#ibcon#read 5, iclass 14, count 0 2006.229.07:47:14.25#ibcon#about to read 6, iclass 14, count 0 2006.229.07:47:14.25#ibcon#read 6, iclass 14, count 0 2006.229.07:47:14.25#ibcon#end of sib2, iclass 14, count 0 2006.229.07:47:14.25#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:47:14.25#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:47:14.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:47:14.25#ibcon#*before write, iclass 14, count 0 2006.229.07:47:14.25#ibcon#enter sib2, iclass 14, count 0 2006.229.07:47:14.25#ibcon#flushed, iclass 14, count 0 2006.229.07:47:14.25#ibcon#about to write, iclass 14, count 0 2006.229.07:47:14.25#ibcon#wrote, iclass 14, count 0 2006.229.07:47:14.25#ibcon#about to read 3, iclass 14, count 0 2006.229.07:47:14.29#ibcon#read 3, iclass 14, count 0 2006.229.07:47:14.29#ibcon#about to read 4, iclass 14, count 0 2006.229.07:47:14.29#ibcon#read 4, iclass 14, count 0 2006.229.07:47:14.29#ibcon#about to read 5, iclass 14, count 0 2006.229.07:47:14.29#ibcon#read 5, iclass 14, count 0 2006.229.07:47:14.29#ibcon#about to read 6, iclass 14, count 0 2006.229.07:47:14.29#ibcon#read 6, iclass 14, count 0 2006.229.07:47:14.29#ibcon#end of sib2, iclass 14, count 0 2006.229.07:47:14.29#ibcon#*after write, iclass 14, count 0 2006.229.07:47:14.29#ibcon#*before return 0, iclass 14, count 0 2006.229.07:47:14.29#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:14.29#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.07:47:14.29#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:47:14.29#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:47:14.29$vck44/vb=8,4 2006.229.07:47:14.29#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.07:47:14.29#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.07:47:14.29#ibcon#ireg 11 cls_cnt 2 2006.229.07:47:14.29#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:14.35#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:14.35#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:14.35#ibcon#enter wrdev, iclass 16, count 2 2006.229.07:47:14.35#ibcon#first serial, iclass 16, count 2 2006.229.07:47:14.35#ibcon#enter sib2, iclass 16, count 2 2006.229.07:47:14.35#ibcon#flushed, iclass 16, count 2 2006.229.07:47:14.35#ibcon#about to write, iclass 16, count 2 2006.229.07:47:14.35#ibcon#wrote, iclass 16, count 2 2006.229.07:47:14.35#ibcon#about to read 3, iclass 16, count 2 2006.229.07:47:14.37#ibcon#read 3, iclass 16, count 2 2006.229.07:47:14.37#ibcon#about to read 4, iclass 16, count 2 2006.229.07:47:14.37#ibcon#read 4, iclass 16, count 2 2006.229.07:47:14.37#ibcon#about to read 5, iclass 16, count 2 2006.229.07:47:14.37#ibcon#read 5, iclass 16, count 2 2006.229.07:47:14.37#ibcon#about to read 6, iclass 16, count 2 2006.229.07:47:14.37#ibcon#read 6, iclass 16, count 2 2006.229.07:47:14.37#ibcon#end of sib2, iclass 16, count 2 2006.229.07:47:14.37#ibcon#*mode == 0, iclass 16, count 2 2006.229.07:47:14.37#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.07:47:14.37#ibcon#[27=AT08-04\r\n] 2006.229.07:47:14.37#ibcon#*before write, iclass 16, count 2 2006.229.07:47:14.37#ibcon#enter sib2, iclass 16, count 2 2006.229.07:47:14.37#ibcon#flushed, iclass 16, count 2 2006.229.07:47:14.37#ibcon#about to write, iclass 16, count 2 2006.229.07:47:14.37#ibcon#wrote, iclass 16, count 2 2006.229.07:47:14.37#ibcon#about to read 3, iclass 16, count 2 2006.229.07:47:14.40#ibcon#read 3, iclass 16, count 2 2006.229.07:47:14.40#ibcon#about to read 4, iclass 16, count 2 2006.229.07:47:14.40#ibcon#read 4, iclass 16, count 2 2006.229.07:47:14.40#ibcon#about to read 5, iclass 16, count 2 2006.229.07:47:14.40#ibcon#read 5, iclass 16, count 2 2006.229.07:47:14.40#ibcon#about to read 6, iclass 16, count 2 2006.229.07:47:14.40#ibcon#read 6, iclass 16, count 2 2006.229.07:47:14.40#ibcon#end of sib2, iclass 16, count 2 2006.229.07:47:14.40#ibcon#*after write, iclass 16, count 2 2006.229.07:47:14.40#ibcon#*before return 0, iclass 16, count 2 2006.229.07:47:14.40#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:14.40#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.07:47:14.40#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.07:47:14.40#ibcon#ireg 7 cls_cnt 0 2006.229.07:47:14.40#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:14.52#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:14.52#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:14.52#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:47:14.52#ibcon#first serial, iclass 16, count 0 2006.229.07:47:14.52#ibcon#enter sib2, iclass 16, count 0 2006.229.07:47:14.52#ibcon#flushed, iclass 16, count 0 2006.229.07:47:14.52#ibcon#about to write, iclass 16, count 0 2006.229.07:47:14.52#ibcon#wrote, iclass 16, count 0 2006.229.07:47:14.52#ibcon#about to read 3, iclass 16, count 0 2006.229.07:47:14.54#ibcon#read 3, iclass 16, count 0 2006.229.07:47:14.54#ibcon#about to read 4, iclass 16, count 0 2006.229.07:47:14.54#ibcon#read 4, iclass 16, count 0 2006.229.07:47:14.54#ibcon#about to read 5, iclass 16, count 0 2006.229.07:47:14.54#ibcon#read 5, iclass 16, count 0 2006.229.07:47:14.54#ibcon#about to read 6, iclass 16, count 0 2006.229.07:47:14.54#ibcon#read 6, iclass 16, count 0 2006.229.07:47:14.54#ibcon#end of sib2, iclass 16, count 0 2006.229.07:47:14.54#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:47:14.54#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:47:14.54#ibcon#[27=USB\r\n] 2006.229.07:47:14.54#ibcon#*before write, iclass 16, count 0 2006.229.07:47:14.54#ibcon#enter sib2, iclass 16, count 0 2006.229.07:47:14.54#ibcon#flushed, iclass 16, count 0 2006.229.07:47:14.54#ibcon#about to write, iclass 16, count 0 2006.229.07:47:14.54#ibcon#wrote, iclass 16, count 0 2006.229.07:47:14.54#ibcon#about to read 3, iclass 16, count 0 2006.229.07:47:14.57#ibcon#read 3, iclass 16, count 0 2006.229.07:47:14.57#ibcon#about to read 4, iclass 16, count 0 2006.229.07:47:14.57#ibcon#read 4, iclass 16, count 0 2006.229.07:47:14.57#ibcon#about to read 5, iclass 16, count 0 2006.229.07:47:14.57#ibcon#read 5, iclass 16, count 0 2006.229.07:47:14.57#ibcon#about to read 6, iclass 16, count 0 2006.229.07:47:14.57#ibcon#read 6, iclass 16, count 0 2006.229.07:47:14.57#ibcon#end of sib2, iclass 16, count 0 2006.229.07:47:14.57#ibcon#*after write, iclass 16, count 0 2006.229.07:47:14.57#ibcon#*before return 0, iclass 16, count 0 2006.229.07:47:14.57#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:14.57#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.07:47:14.57#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:47:14.57#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:47:14.57$vck44/vabw=wide 2006.229.07:47:14.57#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.07:47:14.57#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.07:47:14.57#ibcon#ireg 8 cls_cnt 0 2006.229.07:47:14.57#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:14.57#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:14.57#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:14.57#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:47:14.57#ibcon#first serial, iclass 18, count 0 2006.229.07:47:14.57#ibcon#enter sib2, iclass 18, count 0 2006.229.07:47:14.57#ibcon#flushed, iclass 18, count 0 2006.229.07:47:14.57#ibcon#about to write, iclass 18, count 0 2006.229.07:47:14.57#ibcon#wrote, iclass 18, count 0 2006.229.07:47:14.57#ibcon#about to read 3, iclass 18, count 0 2006.229.07:47:14.59#ibcon#read 3, iclass 18, count 0 2006.229.07:47:14.59#ibcon#about to read 4, iclass 18, count 0 2006.229.07:47:14.59#ibcon#read 4, iclass 18, count 0 2006.229.07:47:14.59#ibcon#about to read 5, iclass 18, count 0 2006.229.07:47:14.59#ibcon#read 5, iclass 18, count 0 2006.229.07:47:14.59#ibcon#about to read 6, iclass 18, count 0 2006.229.07:47:14.59#ibcon#read 6, iclass 18, count 0 2006.229.07:47:14.59#ibcon#end of sib2, iclass 18, count 0 2006.229.07:47:14.59#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:47:14.59#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:47:14.59#ibcon#[25=BW32\r\n] 2006.229.07:47:14.59#ibcon#*before write, iclass 18, count 0 2006.229.07:47:14.59#ibcon#enter sib2, iclass 18, count 0 2006.229.07:47:14.59#ibcon#flushed, iclass 18, count 0 2006.229.07:47:14.59#ibcon#about to write, iclass 18, count 0 2006.229.07:47:14.59#ibcon#wrote, iclass 18, count 0 2006.229.07:47:14.59#ibcon#about to read 3, iclass 18, count 0 2006.229.07:47:14.62#ibcon#read 3, iclass 18, count 0 2006.229.07:47:14.62#ibcon#about to read 4, iclass 18, count 0 2006.229.07:47:14.62#ibcon#read 4, iclass 18, count 0 2006.229.07:47:14.62#ibcon#about to read 5, iclass 18, count 0 2006.229.07:47:14.62#ibcon#read 5, iclass 18, count 0 2006.229.07:47:14.62#ibcon#about to read 6, iclass 18, count 0 2006.229.07:47:14.62#ibcon#read 6, iclass 18, count 0 2006.229.07:47:14.62#ibcon#end of sib2, iclass 18, count 0 2006.229.07:47:14.62#ibcon#*after write, iclass 18, count 0 2006.229.07:47:14.62#ibcon#*before return 0, iclass 18, count 0 2006.229.07:47:14.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:14.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.07:47:14.62#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:47:14.62#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:47:14.62$vck44/vbbw=wide 2006.229.07:47:14.62#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:47:14.62#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:47:14.62#ibcon#ireg 8 cls_cnt 0 2006.229.07:47:14.62#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:47:14.69#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:47:14.69#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:47:14.69#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:47:14.69#ibcon#first serial, iclass 20, count 0 2006.229.07:47:14.69#ibcon#enter sib2, iclass 20, count 0 2006.229.07:47:14.69#ibcon#flushed, iclass 20, count 0 2006.229.07:47:14.69#ibcon#about to write, iclass 20, count 0 2006.229.07:47:14.69#ibcon#wrote, iclass 20, count 0 2006.229.07:47:14.69#ibcon#about to read 3, iclass 20, count 0 2006.229.07:47:14.71#ibcon#read 3, iclass 20, count 0 2006.229.07:47:14.71#ibcon#about to read 4, iclass 20, count 0 2006.229.07:47:14.71#ibcon#read 4, iclass 20, count 0 2006.229.07:47:14.71#ibcon#about to read 5, iclass 20, count 0 2006.229.07:47:14.71#ibcon#read 5, iclass 20, count 0 2006.229.07:47:14.71#ibcon#about to read 6, iclass 20, count 0 2006.229.07:47:14.71#ibcon#read 6, iclass 20, count 0 2006.229.07:47:14.71#ibcon#end of sib2, iclass 20, count 0 2006.229.07:47:14.71#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:47:14.71#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:47:14.71#ibcon#[27=BW32\r\n] 2006.229.07:47:14.71#ibcon#*before write, iclass 20, count 0 2006.229.07:47:14.71#ibcon#enter sib2, iclass 20, count 0 2006.229.07:47:14.71#ibcon#flushed, iclass 20, count 0 2006.229.07:47:14.71#ibcon#about to write, iclass 20, count 0 2006.229.07:47:14.71#ibcon#wrote, iclass 20, count 0 2006.229.07:47:14.71#ibcon#about to read 3, iclass 20, count 0 2006.229.07:47:14.74#ibcon#read 3, iclass 20, count 0 2006.229.07:47:14.74#ibcon#about to read 4, iclass 20, count 0 2006.229.07:47:14.74#ibcon#read 4, iclass 20, count 0 2006.229.07:47:14.74#ibcon#about to read 5, iclass 20, count 0 2006.229.07:47:14.74#ibcon#read 5, iclass 20, count 0 2006.229.07:47:14.74#ibcon#about to read 6, iclass 20, count 0 2006.229.07:47:14.74#ibcon#read 6, iclass 20, count 0 2006.229.07:47:14.74#ibcon#end of sib2, iclass 20, count 0 2006.229.07:47:14.74#ibcon#*after write, iclass 20, count 0 2006.229.07:47:14.74#ibcon#*before return 0, iclass 20, count 0 2006.229.07:47:14.74#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:47:14.74#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:47:14.74#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:47:14.74#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:47:14.74$setupk4/ifdk4 2006.229.07:47:14.74$ifdk4/lo= 2006.229.07:47:14.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:47:14.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:47:14.74$ifdk4/patch= 2006.229.07:47:14.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:47:14.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:47:14.74$setupk4/!*+20s 2006.229.07:47:21.01#abcon#<5=/06 2.2 4.7 29.94 941000.6\r\n> 2006.229.07:47:21.03#abcon#{5=INTERFACE CLEAR} 2006.229.07:47:21.09#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:47:29.25$setupk4/"tpicd 2006.229.07:47:29.25$setupk4/echo=off 2006.229.07:47:29.25$setupk4/xlog=off 2006.229.07:47:29.25:!2006.229.07:50:15 2006.229.07:48:12.13#trakl#Source acquired 2006.229.07:48:13.13#flagr#flagr/antenna,acquired 2006.229.07:50:15.00:preob 2006.229.07:50:15.13/onsource/TRACKING 2006.229.07:50:15.13:!2006.229.07:50:25 2006.229.07:50:25.00:"tape 2006.229.07:50:25.00:"st=record 2006.229.07:50:25.00:data_valid=on 2006.229.07:50:25.00:midob 2006.229.07:50:25.14/onsource/TRACKING 2006.229.07:50:25.14/wx/29.92,1000.5,93 2006.229.07:50:25.22/cable/+6.3972E-03 2006.229.07:50:26.31/va/01,08,usb,yes,39,42 2006.229.07:50:26.31/va/02,07,usb,yes,42,43 2006.229.07:50:26.31/va/03,06,usb,yes,52,55 2006.229.07:50:26.31/va/04,07,usb,yes,44,46 2006.229.07:50:26.31/va/05,04,usb,yes,39,40 2006.229.07:50:26.31/va/06,04,usb,yes,44,43 2006.229.07:50:26.31/va/07,05,usb,yes,39,40 2006.229.07:50:26.31/va/08,06,usb,yes,29,35 2006.229.07:50:26.54/valo/01,524.99,yes,locked 2006.229.07:50:26.54/valo/02,534.99,yes,locked 2006.229.07:50:26.54/valo/03,564.99,yes,locked 2006.229.07:50:26.54/valo/04,624.99,yes,locked 2006.229.07:50:26.54/valo/05,734.99,yes,locked 2006.229.07:50:26.54/valo/06,814.99,yes,locked 2006.229.07:50:26.54/valo/07,864.99,yes,locked 2006.229.07:50:26.54/valo/08,884.99,yes,locked 2006.229.07:50:27.63/vb/01,04,usb,yes,36,34 2006.229.07:50:27.63/vb/02,04,usb,yes,39,39 2006.229.07:50:27.63/vb/03,04,usb,yes,36,39 2006.229.07:50:27.63/vb/04,04,usb,yes,41,39 2006.229.07:50:27.63/vb/05,04,usb,yes,32,35 2006.229.07:50:27.63/vb/06,04,usb,yes,38,33 2006.229.07:50:27.63/vb/07,04,usb,yes,37,37 2006.229.07:50:27.63/vb/08,04,usb,yes,34,38 2006.229.07:50:27.86/vblo/01,629.99,yes,locked 2006.229.07:50:27.86/vblo/02,634.99,yes,locked 2006.229.07:50:27.86/vblo/03,649.99,yes,locked 2006.229.07:50:27.86/vblo/04,679.99,yes,locked 2006.229.07:50:27.86/vblo/05,709.99,yes,locked 2006.229.07:50:27.86/vblo/06,719.99,yes,locked 2006.229.07:50:27.86/vblo/07,734.99,yes,locked 2006.229.07:50:27.86/vblo/08,744.99,yes,locked 2006.229.07:50:28.01/vabw/8 2006.229.07:50:28.16/vbbw/8 2006.229.07:50:28.25/xfe/off,on,13.0 2006.229.07:50:28.62/ifatt/23,28,28,28 2006.229.07:50:29.07/fmout-gps/S +4.55E-07 2006.229.07:50:29.11:!2006.229.07:58:35 2006.229.07:58:35.00:data_valid=off 2006.229.07:58:35.00:"et 2006.229.07:58:35.00:!+3s 2006.229.07:58:38.01:"tape 2006.229.07:58:38.01:postob 2006.229.07:58:38.15/cable/+6.3973E-03 2006.229.07:58:38.15/wx/29.80,1000.4,91 2006.229.07:58:39.08/fmout-gps/S +4.58E-07 2006.229.07:58:39.08:scan_name=229-0800,jd0608,50 2006.229.07:58:39.08:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.07:58:40.14#flagr#flagr/antenna,new-source 2006.229.07:58:40.14:checkk5 2006.229.07:58:40.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.07:58:40.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.07:58:41.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.07:58:42.08/chk_autoobs//k5ts4/ autoobs is running! 2006.229.07:58:42.47/chk_obsdata//k5ts1/T2290750??a.dat file size is correct (nominal:1960MB, actual:1956MB). 2006.229.07:58:42.87/chk_obsdata//k5ts2/T2290750??b.dat file size is correct (nominal:1960MB, actual:1956MB). 2006.229.07:58:43.28/chk_obsdata//k5ts3/T2290750??c.dat file size is correct (nominal:1960MB, actual:1956MB). 2006.229.07:58:43.68/chk_obsdata//k5ts4/T2290750??d.dat file size is correct (nominal:1960MB, actual:1956MB). 2006.229.07:58:44.39/k5log//k5ts1_log_newline 2006.229.07:58:45.10/k5log//k5ts2_log_newline 2006.229.07:58:45.80/k5log//k5ts3_log_newline 2006.229.07:58:46.52/k5log//k5ts4_log_newline 2006.229.07:58:46.54/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.07:58:46.54:setupk4=1 2006.229.07:58:46.54$setupk4/echo=on 2006.229.07:58:46.54$setupk4/pcalon 2006.229.07:58:46.54$pcalon/"no phase cal control is implemented here 2006.229.07:58:46.54$setupk4/"tpicd=stop 2006.229.07:58:46.54$setupk4/"rec=synch_on 2006.229.07:58:46.54$setupk4/"rec_mode=128 2006.229.07:58:46.54$setupk4/!* 2006.229.07:58:46.54$setupk4/recpk4 2006.229.07:58:46.54$recpk4/recpatch= 2006.229.07:58:46.55$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.07:58:46.55$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.07:58:46.55$setupk4/vck44 2006.229.07:58:46.55$vck44/valo=1,524.99 2006.229.07:58:46.55#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.07:58:46.55#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.07:58:46.55#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:46.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:46.55#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:46.55#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:46.55#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:58:46.55#ibcon#first serial, iclass 40, count 0 2006.229.07:58:46.55#ibcon#enter sib2, iclass 40, count 0 2006.229.07:58:46.55#ibcon#flushed, iclass 40, count 0 2006.229.07:58:46.55#ibcon#about to write, iclass 40, count 0 2006.229.07:58:46.55#ibcon#wrote, iclass 40, count 0 2006.229.07:58:46.55#ibcon#about to read 3, iclass 40, count 0 2006.229.07:58:46.57#ibcon#read 3, iclass 40, count 0 2006.229.07:58:46.57#ibcon#about to read 4, iclass 40, count 0 2006.229.07:58:46.57#ibcon#read 4, iclass 40, count 0 2006.229.07:58:46.57#ibcon#about to read 5, iclass 40, count 0 2006.229.07:58:46.57#ibcon#read 5, iclass 40, count 0 2006.229.07:58:46.57#ibcon#about to read 6, iclass 40, count 0 2006.229.07:58:46.57#ibcon#read 6, iclass 40, count 0 2006.229.07:58:46.57#ibcon#end of sib2, iclass 40, count 0 2006.229.07:58:46.57#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:58:46.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:58:46.57#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.07:58:46.57#ibcon#*before write, iclass 40, count 0 2006.229.07:58:46.57#ibcon#enter sib2, iclass 40, count 0 2006.229.07:58:46.57#ibcon#flushed, iclass 40, count 0 2006.229.07:58:46.57#ibcon#about to write, iclass 40, count 0 2006.229.07:58:46.57#ibcon#wrote, iclass 40, count 0 2006.229.07:58:46.57#ibcon#about to read 3, iclass 40, count 0 2006.229.07:58:46.62#ibcon#read 3, iclass 40, count 0 2006.229.07:58:46.62#ibcon#about to read 4, iclass 40, count 0 2006.229.07:58:46.62#ibcon#read 4, iclass 40, count 0 2006.229.07:58:46.62#ibcon#about to read 5, iclass 40, count 0 2006.229.07:58:46.62#ibcon#read 5, iclass 40, count 0 2006.229.07:58:46.62#ibcon#about to read 6, iclass 40, count 0 2006.229.07:58:46.62#ibcon#read 6, iclass 40, count 0 2006.229.07:58:46.62#ibcon#end of sib2, iclass 40, count 0 2006.229.07:58:46.62#ibcon#*after write, iclass 40, count 0 2006.229.07:58:46.62#ibcon#*before return 0, iclass 40, count 0 2006.229.07:58:46.62#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:46.62#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:46.62#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:58:46.62#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:58:46.62$vck44/va=1,8 2006.229.07:58:46.62#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.07:58:46.62#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.07:58:46.62#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:46.62#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:46.62#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:46.62#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:46.62#ibcon#enter wrdev, iclass 4, count 2 2006.229.07:58:46.62#ibcon#first serial, iclass 4, count 2 2006.229.07:58:46.62#ibcon#enter sib2, iclass 4, count 2 2006.229.07:58:46.62#ibcon#flushed, iclass 4, count 2 2006.229.07:58:46.62#ibcon#about to write, iclass 4, count 2 2006.229.07:58:46.62#ibcon#wrote, iclass 4, count 2 2006.229.07:58:46.62#ibcon#about to read 3, iclass 4, count 2 2006.229.07:58:46.64#ibcon#read 3, iclass 4, count 2 2006.229.07:58:46.64#ibcon#about to read 4, iclass 4, count 2 2006.229.07:58:46.64#ibcon#read 4, iclass 4, count 2 2006.229.07:58:46.64#ibcon#about to read 5, iclass 4, count 2 2006.229.07:58:46.64#ibcon#read 5, iclass 4, count 2 2006.229.07:58:46.64#ibcon#about to read 6, iclass 4, count 2 2006.229.07:58:46.64#ibcon#read 6, iclass 4, count 2 2006.229.07:58:46.64#ibcon#end of sib2, iclass 4, count 2 2006.229.07:58:46.64#ibcon#*mode == 0, iclass 4, count 2 2006.229.07:58:46.64#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.07:58:46.64#ibcon#[25=AT01-08\r\n] 2006.229.07:58:46.64#ibcon#*before write, iclass 4, count 2 2006.229.07:58:46.64#ibcon#enter sib2, iclass 4, count 2 2006.229.07:58:46.64#ibcon#flushed, iclass 4, count 2 2006.229.07:58:46.64#ibcon#about to write, iclass 4, count 2 2006.229.07:58:46.64#ibcon#wrote, iclass 4, count 2 2006.229.07:58:46.64#ibcon#about to read 3, iclass 4, count 2 2006.229.07:58:46.67#ibcon#read 3, iclass 4, count 2 2006.229.07:58:46.67#ibcon#about to read 4, iclass 4, count 2 2006.229.07:58:46.67#ibcon#read 4, iclass 4, count 2 2006.229.07:58:46.67#ibcon#about to read 5, iclass 4, count 2 2006.229.07:58:46.67#ibcon#read 5, iclass 4, count 2 2006.229.07:58:46.67#ibcon#about to read 6, iclass 4, count 2 2006.229.07:58:46.67#ibcon#read 6, iclass 4, count 2 2006.229.07:58:46.67#ibcon#end of sib2, iclass 4, count 2 2006.229.07:58:46.67#ibcon#*after write, iclass 4, count 2 2006.229.07:58:46.67#ibcon#*before return 0, iclass 4, count 2 2006.229.07:58:46.67#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:46.67#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:46.67#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.07:58:46.67#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:46.67#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:46.79#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:46.79#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:46.79#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:58:46.79#ibcon#first serial, iclass 4, count 0 2006.229.07:58:46.79#ibcon#enter sib2, iclass 4, count 0 2006.229.07:58:46.79#ibcon#flushed, iclass 4, count 0 2006.229.07:58:46.79#ibcon#about to write, iclass 4, count 0 2006.229.07:58:46.79#ibcon#wrote, iclass 4, count 0 2006.229.07:58:46.79#ibcon#about to read 3, iclass 4, count 0 2006.229.07:58:46.81#ibcon#read 3, iclass 4, count 0 2006.229.07:58:46.81#ibcon#about to read 4, iclass 4, count 0 2006.229.07:58:46.81#ibcon#read 4, iclass 4, count 0 2006.229.07:58:46.81#ibcon#about to read 5, iclass 4, count 0 2006.229.07:58:46.81#ibcon#read 5, iclass 4, count 0 2006.229.07:58:46.81#ibcon#about to read 6, iclass 4, count 0 2006.229.07:58:46.81#ibcon#read 6, iclass 4, count 0 2006.229.07:58:46.81#ibcon#end of sib2, iclass 4, count 0 2006.229.07:58:46.81#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:58:46.81#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:58:46.81#ibcon#[25=USB\r\n] 2006.229.07:58:46.81#ibcon#*before write, iclass 4, count 0 2006.229.07:58:46.81#ibcon#enter sib2, iclass 4, count 0 2006.229.07:58:46.81#ibcon#flushed, iclass 4, count 0 2006.229.07:58:46.81#ibcon#about to write, iclass 4, count 0 2006.229.07:58:46.81#ibcon#wrote, iclass 4, count 0 2006.229.07:58:46.81#ibcon#about to read 3, iclass 4, count 0 2006.229.07:58:46.84#ibcon#read 3, iclass 4, count 0 2006.229.07:58:46.84#ibcon#about to read 4, iclass 4, count 0 2006.229.07:58:46.84#ibcon#read 4, iclass 4, count 0 2006.229.07:58:46.84#ibcon#about to read 5, iclass 4, count 0 2006.229.07:58:46.84#ibcon#read 5, iclass 4, count 0 2006.229.07:58:46.84#ibcon#about to read 6, iclass 4, count 0 2006.229.07:58:46.84#ibcon#read 6, iclass 4, count 0 2006.229.07:58:46.84#ibcon#end of sib2, iclass 4, count 0 2006.229.07:58:46.84#ibcon#*after write, iclass 4, count 0 2006.229.07:58:46.84#ibcon#*before return 0, iclass 4, count 0 2006.229.07:58:46.84#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:46.84#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:46.84#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:58:46.84#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:58:46.84$vck44/valo=2,534.99 2006.229.07:58:46.84#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.07:58:46.84#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.07:58:46.84#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:46.84#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:46.84#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:46.84#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:46.84#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:58:46.84#ibcon#first serial, iclass 6, count 0 2006.229.07:58:46.84#ibcon#enter sib2, iclass 6, count 0 2006.229.07:58:46.84#ibcon#flushed, iclass 6, count 0 2006.229.07:58:46.84#ibcon#about to write, iclass 6, count 0 2006.229.07:58:46.84#ibcon#wrote, iclass 6, count 0 2006.229.07:58:46.84#ibcon#about to read 3, iclass 6, count 0 2006.229.07:58:46.86#ibcon#read 3, iclass 6, count 0 2006.229.07:58:46.86#ibcon#about to read 4, iclass 6, count 0 2006.229.07:58:46.86#ibcon#read 4, iclass 6, count 0 2006.229.07:58:46.86#ibcon#about to read 5, iclass 6, count 0 2006.229.07:58:46.86#ibcon#read 5, iclass 6, count 0 2006.229.07:58:46.86#ibcon#about to read 6, iclass 6, count 0 2006.229.07:58:46.86#ibcon#read 6, iclass 6, count 0 2006.229.07:58:46.86#ibcon#end of sib2, iclass 6, count 0 2006.229.07:58:46.86#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:58:46.86#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:58:46.86#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.07:58:46.86#ibcon#*before write, iclass 6, count 0 2006.229.07:58:46.86#ibcon#enter sib2, iclass 6, count 0 2006.229.07:58:46.86#ibcon#flushed, iclass 6, count 0 2006.229.07:58:46.86#ibcon#about to write, iclass 6, count 0 2006.229.07:58:46.86#ibcon#wrote, iclass 6, count 0 2006.229.07:58:46.86#ibcon#about to read 3, iclass 6, count 0 2006.229.07:58:46.90#ibcon#read 3, iclass 6, count 0 2006.229.07:58:46.90#ibcon#about to read 4, iclass 6, count 0 2006.229.07:58:46.90#ibcon#read 4, iclass 6, count 0 2006.229.07:58:46.90#ibcon#about to read 5, iclass 6, count 0 2006.229.07:58:46.90#ibcon#read 5, iclass 6, count 0 2006.229.07:58:46.90#ibcon#about to read 6, iclass 6, count 0 2006.229.07:58:46.90#ibcon#read 6, iclass 6, count 0 2006.229.07:58:46.90#ibcon#end of sib2, iclass 6, count 0 2006.229.07:58:46.90#ibcon#*after write, iclass 6, count 0 2006.229.07:58:46.90#ibcon#*before return 0, iclass 6, count 0 2006.229.07:58:46.90#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:46.90#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:46.90#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:58:46.90#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:58:46.90$vck44/va=2,7 2006.229.07:58:46.90#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.07:58:46.90#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.07:58:46.90#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:46.90#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:46.96#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:46.96#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:46.96#ibcon#enter wrdev, iclass 10, count 2 2006.229.07:58:46.96#ibcon#first serial, iclass 10, count 2 2006.229.07:58:46.96#ibcon#enter sib2, iclass 10, count 2 2006.229.07:58:46.96#ibcon#flushed, iclass 10, count 2 2006.229.07:58:46.96#ibcon#about to write, iclass 10, count 2 2006.229.07:58:46.96#ibcon#wrote, iclass 10, count 2 2006.229.07:58:46.96#ibcon#about to read 3, iclass 10, count 2 2006.229.07:58:46.98#ibcon#read 3, iclass 10, count 2 2006.229.07:58:46.98#ibcon#about to read 4, iclass 10, count 2 2006.229.07:58:46.98#ibcon#read 4, iclass 10, count 2 2006.229.07:58:46.98#ibcon#about to read 5, iclass 10, count 2 2006.229.07:58:46.98#ibcon#read 5, iclass 10, count 2 2006.229.07:58:46.98#ibcon#about to read 6, iclass 10, count 2 2006.229.07:58:46.98#ibcon#read 6, iclass 10, count 2 2006.229.07:58:46.98#ibcon#end of sib2, iclass 10, count 2 2006.229.07:58:46.98#ibcon#*mode == 0, iclass 10, count 2 2006.229.07:58:46.98#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.07:58:46.98#ibcon#[25=AT02-07\r\n] 2006.229.07:58:46.98#ibcon#*before write, iclass 10, count 2 2006.229.07:58:46.98#ibcon#enter sib2, iclass 10, count 2 2006.229.07:58:46.98#ibcon#flushed, iclass 10, count 2 2006.229.07:58:46.98#ibcon#about to write, iclass 10, count 2 2006.229.07:58:46.98#ibcon#wrote, iclass 10, count 2 2006.229.07:58:46.98#ibcon#about to read 3, iclass 10, count 2 2006.229.07:58:47.01#ibcon#read 3, iclass 10, count 2 2006.229.07:58:47.01#ibcon#about to read 4, iclass 10, count 2 2006.229.07:58:47.01#ibcon#read 4, iclass 10, count 2 2006.229.07:58:47.01#ibcon#about to read 5, iclass 10, count 2 2006.229.07:58:47.01#ibcon#read 5, iclass 10, count 2 2006.229.07:58:47.01#ibcon#about to read 6, iclass 10, count 2 2006.229.07:58:47.01#ibcon#read 6, iclass 10, count 2 2006.229.07:58:47.01#ibcon#end of sib2, iclass 10, count 2 2006.229.07:58:47.01#ibcon#*after write, iclass 10, count 2 2006.229.07:58:47.01#ibcon#*before return 0, iclass 10, count 2 2006.229.07:58:47.01#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:47.01#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:47.01#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.07:58:47.01#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:47.01#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:47.13#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:47.13#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:47.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:58:47.13#ibcon#first serial, iclass 10, count 0 2006.229.07:58:47.13#ibcon#enter sib2, iclass 10, count 0 2006.229.07:58:47.13#ibcon#flushed, iclass 10, count 0 2006.229.07:58:47.13#ibcon#about to write, iclass 10, count 0 2006.229.07:58:47.13#ibcon#wrote, iclass 10, count 0 2006.229.07:58:47.13#ibcon#about to read 3, iclass 10, count 0 2006.229.07:58:47.15#ibcon#read 3, iclass 10, count 0 2006.229.07:58:47.15#ibcon#about to read 4, iclass 10, count 0 2006.229.07:58:47.15#ibcon#read 4, iclass 10, count 0 2006.229.07:58:47.15#ibcon#about to read 5, iclass 10, count 0 2006.229.07:58:47.15#ibcon#read 5, iclass 10, count 0 2006.229.07:58:47.15#ibcon#about to read 6, iclass 10, count 0 2006.229.07:58:47.15#ibcon#read 6, iclass 10, count 0 2006.229.07:58:47.15#ibcon#end of sib2, iclass 10, count 0 2006.229.07:58:47.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:58:47.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:58:47.15#ibcon#[25=USB\r\n] 2006.229.07:58:47.15#ibcon#*before write, iclass 10, count 0 2006.229.07:58:47.15#ibcon#enter sib2, iclass 10, count 0 2006.229.07:58:47.15#ibcon#flushed, iclass 10, count 0 2006.229.07:58:47.15#ibcon#about to write, iclass 10, count 0 2006.229.07:58:47.15#ibcon#wrote, iclass 10, count 0 2006.229.07:58:47.15#ibcon#about to read 3, iclass 10, count 0 2006.229.07:58:47.18#ibcon#read 3, iclass 10, count 0 2006.229.07:58:47.18#ibcon#about to read 4, iclass 10, count 0 2006.229.07:58:47.18#ibcon#read 4, iclass 10, count 0 2006.229.07:58:47.18#ibcon#about to read 5, iclass 10, count 0 2006.229.07:58:47.18#ibcon#read 5, iclass 10, count 0 2006.229.07:58:47.18#ibcon#about to read 6, iclass 10, count 0 2006.229.07:58:47.18#ibcon#read 6, iclass 10, count 0 2006.229.07:58:47.18#ibcon#end of sib2, iclass 10, count 0 2006.229.07:58:47.18#ibcon#*after write, iclass 10, count 0 2006.229.07:58:47.18#ibcon#*before return 0, iclass 10, count 0 2006.229.07:58:47.18#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:47.18#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:47.18#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:58:47.18#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:58:47.18$vck44/valo=3,564.99 2006.229.07:58:47.18#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.07:58:47.18#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.07:58:47.18#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:47.18#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:47.18#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:47.18#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:47.18#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:58:47.18#ibcon#first serial, iclass 12, count 0 2006.229.07:58:47.18#ibcon#enter sib2, iclass 12, count 0 2006.229.07:58:47.18#ibcon#flushed, iclass 12, count 0 2006.229.07:58:47.18#ibcon#about to write, iclass 12, count 0 2006.229.07:58:47.18#ibcon#wrote, iclass 12, count 0 2006.229.07:58:47.18#ibcon#about to read 3, iclass 12, count 0 2006.229.07:58:47.20#ibcon#read 3, iclass 12, count 0 2006.229.07:58:47.20#ibcon#about to read 4, iclass 12, count 0 2006.229.07:58:47.20#ibcon#read 4, iclass 12, count 0 2006.229.07:58:47.20#ibcon#about to read 5, iclass 12, count 0 2006.229.07:58:47.20#ibcon#read 5, iclass 12, count 0 2006.229.07:58:47.20#ibcon#about to read 6, iclass 12, count 0 2006.229.07:58:47.20#ibcon#read 6, iclass 12, count 0 2006.229.07:58:47.20#ibcon#end of sib2, iclass 12, count 0 2006.229.07:58:47.20#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:58:47.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:58:47.20#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.07:58:47.20#ibcon#*before write, iclass 12, count 0 2006.229.07:58:47.20#ibcon#enter sib2, iclass 12, count 0 2006.229.07:58:47.20#ibcon#flushed, iclass 12, count 0 2006.229.07:58:47.20#ibcon#about to write, iclass 12, count 0 2006.229.07:58:47.20#ibcon#wrote, iclass 12, count 0 2006.229.07:58:47.20#ibcon#about to read 3, iclass 12, count 0 2006.229.07:58:47.24#ibcon#read 3, iclass 12, count 0 2006.229.07:58:47.24#ibcon#about to read 4, iclass 12, count 0 2006.229.07:58:47.24#ibcon#read 4, iclass 12, count 0 2006.229.07:58:47.24#ibcon#about to read 5, iclass 12, count 0 2006.229.07:58:47.24#ibcon#read 5, iclass 12, count 0 2006.229.07:58:47.24#ibcon#about to read 6, iclass 12, count 0 2006.229.07:58:47.24#ibcon#read 6, iclass 12, count 0 2006.229.07:58:47.24#ibcon#end of sib2, iclass 12, count 0 2006.229.07:58:47.24#ibcon#*after write, iclass 12, count 0 2006.229.07:58:47.24#ibcon#*before return 0, iclass 12, count 0 2006.229.07:58:47.24#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:47.24#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:47.24#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:58:47.24#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:58:47.24$vck44/va=3,6 2006.229.07:58:47.24#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.07:58:47.24#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.07:58:47.24#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:47.24#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:47.30#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:47.30#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:47.30#ibcon#enter wrdev, iclass 14, count 2 2006.229.07:58:47.30#ibcon#first serial, iclass 14, count 2 2006.229.07:58:47.30#ibcon#enter sib2, iclass 14, count 2 2006.229.07:58:47.30#ibcon#flushed, iclass 14, count 2 2006.229.07:58:47.30#ibcon#about to write, iclass 14, count 2 2006.229.07:58:47.30#ibcon#wrote, iclass 14, count 2 2006.229.07:58:47.30#ibcon#about to read 3, iclass 14, count 2 2006.229.07:58:47.32#ibcon#read 3, iclass 14, count 2 2006.229.07:58:47.32#ibcon#about to read 4, iclass 14, count 2 2006.229.07:58:47.32#ibcon#read 4, iclass 14, count 2 2006.229.07:58:47.32#ibcon#about to read 5, iclass 14, count 2 2006.229.07:58:47.32#ibcon#read 5, iclass 14, count 2 2006.229.07:58:47.32#ibcon#about to read 6, iclass 14, count 2 2006.229.07:58:47.32#ibcon#read 6, iclass 14, count 2 2006.229.07:58:47.32#ibcon#end of sib2, iclass 14, count 2 2006.229.07:58:47.32#ibcon#*mode == 0, iclass 14, count 2 2006.229.07:58:47.32#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.07:58:47.32#ibcon#[25=AT03-06\r\n] 2006.229.07:58:47.32#ibcon#*before write, iclass 14, count 2 2006.229.07:58:47.32#ibcon#enter sib2, iclass 14, count 2 2006.229.07:58:47.32#ibcon#flushed, iclass 14, count 2 2006.229.07:58:47.32#ibcon#about to write, iclass 14, count 2 2006.229.07:58:47.32#ibcon#wrote, iclass 14, count 2 2006.229.07:58:47.32#ibcon#about to read 3, iclass 14, count 2 2006.229.07:58:47.35#ibcon#read 3, iclass 14, count 2 2006.229.07:58:47.35#ibcon#about to read 4, iclass 14, count 2 2006.229.07:58:47.35#ibcon#read 4, iclass 14, count 2 2006.229.07:58:47.35#ibcon#about to read 5, iclass 14, count 2 2006.229.07:58:47.35#ibcon#read 5, iclass 14, count 2 2006.229.07:58:47.35#ibcon#about to read 6, iclass 14, count 2 2006.229.07:58:47.35#ibcon#read 6, iclass 14, count 2 2006.229.07:58:47.35#ibcon#end of sib2, iclass 14, count 2 2006.229.07:58:47.35#ibcon#*after write, iclass 14, count 2 2006.229.07:58:47.35#ibcon#*before return 0, iclass 14, count 2 2006.229.07:58:47.35#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:47.35#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:47.35#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.07:58:47.35#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:47.35#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:47.47#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:47.47#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:47.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:58:47.47#ibcon#first serial, iclass 14, count 0 2006.229.07:58:47.47#ibcon#enter sib2, iclass 14, count 0 2006.229.07:58:47.47#ibcon#flushed, iclass 14, count 0 2006.229.07:58:47.47#ibcon#about to write, iclass 14, count 0 2006.229.07:58:47.47#ibcon#wrote, iclass 14, count 0 2006.229.07:58:47.47#ibcon#about to read 3, iclass 14, count 0 2006.229.07:58:47.49#ibcon#read 3, iclass 14, count 0 2006.229.07:58:47.49#ibcon#about to read 4, iclass 14, count 0 2006.229.07:58:47.49#ibcon#read 4, iclass 14, count 0 2006.229.07:58:47.49#ibcon#about to read 5, iclass 14, count 0 2006.229.07:58:47.49#ibcon#read 5, iclass 14, count 0 2006.229.07:58:47.49#ibcon#about to read 6, iclass 14, count 0 2006.229.07:58:47.49#ibcon#read 6, iclass 14, count 0 2006.229.07:58:47.49#ibcon#end of sib2, iclass 14, count 0 2006.229.07:58:47.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:58:47.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:58:47.49#ibcon#[25=USB\r\n] 2006.229.07:58:47.49#ibcon#*before write, iclass 14, count 0 2006.229.07:58:47.49#ibcon#enter sib2, iclass 14, count 0 2006.229.07:58:47.49#ibcon#flushed, iclass 14, count 0 2006.229.07:58:47.49#ibcon#about to write, iclass 14, count 0 2006.229.07:58:47.49#ibcon#wrote, iclass 14, count 0 2006.229.07:58:47.49#ibcon#about to read 3, iclass 14, count 0 2006.229.07:58:47.52#ibcon#read 3, iclass 14, count 0 2006.229.07:58:47.52#ibcon#about to read 4, iclass 14, count 0 2006.229.07:58:47.52#ibcon#read 4, iclass 14, count 0 2006.229.07:58:47.52#ibcon#about to read 5, iclass 14, count 0 2006.229.07:58:47.52#ibcon#read 5, iclass 14, count 0 2006.229.07:58:47.52#ibcon#about to read 6, iclass 14, count 0 2006.229.07:58:47.52#ibcon#read 6, iclass 14, count 0 2006.229.07:58:47.52#ibcon#end of sib2, iclass 14, count 0 2006.229.07:58:47.52#ibcon#*after write, iclass 14, count 0 2006.229.07:58:47.52#ibcon#*before return 0, iclass 14, count 0 2006.229.07:58:47.52#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:47.52#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:47.52#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:58:47.52#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:58:47.52$vck44/valo=4,624.99 2006.229.07:58:47.52#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.07:58:47.52#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.07:58:47.52#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:47.52#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:47.52#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:47.52#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:47.52#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:58:47.52#ibcon#first serial, iclass 16, count 0 2006.229.07:58:47.52#ibcon#enter sib2, iclass 16, count 0 2006.229.07:58:47.52#ibcon#flushed, iclass 16, count 0 2006.229.07:58:47.52#ibcon#about to write, iclass 16, count 0 2006.229.07:58:47.52#ibcon#wrote, iclass 16, count 0 2006.229.07:58:47.52#ibcon#about to read 3, iclass 16, count 0 2006.229.07:58:47.54#ibcon#read 3, iclass 16, count 0 2006.229.07:58:47.54#ibcon#about to read 4, iclass 16, count 0 2006.229.07:58:47.54#ibcon#read 4, iclass 16, count 0 2006.229.07:58:47.54#ibcon#about to read 5, iclass 16, count 0 2006.229.07:58:47.54#ibcon#read 5, iclass 16, count 0 2006.229.07:58:47.54#ibcon#about to read 6, iclass 16, count 0 2006.229.07:58:47.54#ibcon#read 6, iclass 16, count 0 2006.229.07:58:47.54#ibcon#end of sib2, iclass 16, count 0 2006.229.07:58:47.54#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:58:47.54#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:58:47.54#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.07:58:47.54#ibcon#*before write, iclass 16, count 0 2006.229.07:58:47.54#ibcon#enter sib2, iclass 16, count 0 2006.229.07:58:47.54#ibcon#flushed, iclass 16, count 0 2006.229.07:58:47.54#ibcon#about to write, iclass 16, count 0 2006.229.07:58:47.54#ibcon#wrote, iclass 16, count 0 2006.229.07:58:47.54#ibcon#about to read 3, iclass 16, count 0 2006.229.07:58:47.58#ibcon#read 3, iclass 16, count 0 2006.229.07:58:47.58#ibcon#about to read 4, iclass 16, count 0 2006.229.07:58:47.58#ibcon#read 4, iclass 16, count 0 2006.229.07:58:47.58#ibcon#about to read 5, iclass 16, count 0 2006.229.07:58:47.58#ibcon#read 5, iclass 16, count 0 2006.229.07:58:47.58#ibcon#about to read 6, iclass 16, count 0 2006.229.07:58:47.58#ibcon#read 6, iclass 16, count 0 2006.229.07:58:47.58#ibcon#end of sib2, iclass 16, count 0 2006.229.07:58:47.58#ibcon#*after write, iclass 16, count 0 2006.229.07:58:47.58#ibcon#*before return 0, iclass 16, count 0 2006.229.07:58:47.58#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:47.58#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:47.58#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:58:47.58#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:58:47.58$vck44/va=4,7 2006.229.07:58:47.58#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.07:58:47.58#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.07:58:47.58#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:47.58#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:47.64#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:47.64#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:47.64#ibcon#enter wrdev, iclass 18, count 2 2006.229.07:58:47.64#ibcon#first serial, iclass 18, count 2 2006.229.07:58:47.64#ibcon#enter sib2, iclass 18, count 2 2006.229.07:58:47.64#ibcon#flushed, iclass 18, count 2 2006.229.07:58:47.64#ibcon#about to write, iclass 18, count 2 2006.229.07:58:47.64#ibcon#wrote, iclass 18, count 2 2006.229.07:58:47.64#ibcon#about to read 3, iclass 18, count 2 2006.229.07:58:47.66#ibcon#read 3, iclass 18, count 2 2006.229.07:58:47.66#ibcon#about to read 4, iclass 18, count 2 2006.229.07:58:47.66#ibcon#read 4, iclass 18, count 2 2006.229.07:58:47.66#ibcon#about to read 5, iclass 18, count 2 2006.229.07:58:47.66#ibcon#read 5, iclass 18, count 2 2006.229.07:58:47.66#ibcon#about to read 6, iclass 18, count 2 2006.229.07:58:47.66#ibcon#read 6, iclass 18, count 2 2006.229.07:58:47.66#ibcon#end of sib2, iclass 18, count 2 2006.229.07:58:47.66#ibcon#*mode == 0, iclass 18, count 2 2006.229.07:58:47.66#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.07:58:47.66#ibcon#[25=AT04-07\r\n] 2006.229.07:58:47.66#ibcon#*before write, iclass 18, count 2 2006.229.07:58:47.66#ibcon#enter sib2, iclass 18, count 2 2006.229.07:58:47.66#ibcon#flushed, iclass 18, count 2 2006.229.07:58:47.66#ibcon#about to write, iclass 18, count 2 2006.229.07:58:47.66#ibcon#wrote, iclass 18, count 2 2006.229.07:58:47.66#ibcon#about to read 3, iclass 18, count 2 2006.229.07:58:47.69#ibcon#read 3, iclass 18, count 2 2006.229.07:58:47.69#ibcon#about to read 4, iclass 18, count 2 2006.229.07:58:47.69#ibcon#read 4, iclass 18, count 2 2006.229.07:58:47.69#ibcon#about to read 5, iclass 18, count 2 2006.229.07:58:47.69#ibcon#read 5, iclass 18, count 2 2006.229.07:58:47.69#ibcon#about to read 6, iclass 18, count 2 2006.229.07:58:47.69#ibcon#read 6, iclass 18, count 2 2006.229.07:58:47.69#ibcon#end of sib2, iclass 18, count 2 2006.229.07:58:47.69#ibcon#*after write, iclass 18, count 2 2006.229.07:58:47.69#ibcon#*before return 0, iclass 18, count 2 2006.229.07:58:47.69#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:47.69#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:47.69#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.07:58:47.69#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:47.69#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:47.81#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:47.81#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:47.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:58:47.81#ibcon#first serial, iclass 18, count 0 2006.229.07:58:47.81#ibcon#enter sib2, iclass 18, count 0 2006.229.07:58:47.81#ibcon#flushed, iclass 18, count 0 2006.229.07:58:47.81#ibcon#about to write, iclass 18, count 0 2006.229.07:58:47.81#ibcon#wrote, iclass 18, count 0 2006.229.07:58:47.81#ibcon#about to read 3, iclass 18, count 0 2006.229.07:58:47.83#ibcon#read 3, iclass 18, count 0 2006.229.07:58:47.83#ibcon#about to read 4, iclass 18, count 0 2006.229.07:58:47.83#ibcon#read 4, iclass 18, count 0 2006.229.07:58:47.83#ibcon#about to read 5, iclass 18, count 0 2006.229.07:58:47.83#ibcon#read 5, iclass 18, count 0 2006.229.07:58:47.83#ibcon#about to read 6, iclass 18, count 0 2006.229.07:58:47.83#ibcon#read 6, iclass 18, count 0 2006.229.07:58:47.83#ibcon#end of sib2, iclass 18, count 0 2006.229.07:58:47.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:58:47.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:58:47.83#ibcon#[25=USB\r\n] 2006.229.07:58:47.83#ibcon#*before write, iclass 18, count 0 2006.229.07:58:47.83#ibcon#enter sib2, iclass 18, count 0 2006.229.07:58:47.83#ibcon#flushed, iclass 18, count 0 2006.229.07:58:47.83#ibcon#about to write, iclass 18, count 0 2006.229.07:58:47.83#ibcon#wrote, iclass 18, count 0 2006.229.07:58:47.83#ibcon#about to read 3, iclass 18, count 0 2006.229.07:58:47.86#ibcon#read 3, iclass 18, count 0 2006.229.07:58:47.86#ibcon#about to read 4, iclass 18, count 0 2006.229.07:58:47.86#ibcon#read 4, iclass 18, count 0 2006.229.07:58:47.86#ibcon#about to read 5, iclass 18, count 0 2006.229.07:58:47.86#ibcon#read 5, iclass 18, count 0 2006.229.07:58:47.86#ibcon#about to read 6, iclass 18, count 0 2006.229.07:58:47.86#ibcon#read 6, iclass 18, count 0 2006.229.07:58:47.86#ibcon#end of sib2, iclass 18, count 0 2006.229.07:58:47.86#ibcon#*after write, iclass 18, count 0 2006.229.07:58:47.86#ibcon#*before return 0, iclass 18, count 0 2006.229.07:58:47.86#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:47.86#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:47.86#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:58:47.86#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:58:47.86$vck44/valo=5,734.99 2006.229.07:58:47.86#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:58:47.86#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:58:47.86#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:47.86#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:47.86#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:47.86#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:47.86#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:58:47.86#ibcon#first serial, iclass 20, count 0 2006.229.07:58:47.86#ibcon#enter sib2, iclass 20, count 0 2006.229.07:58:47.86#ibcon#flushed, iclass 20, count 0 2006.229.07:58:47.86#ibcon#about to write, iclass 20, count 0 2006.229.07:58:47.86#ibcon#wrote, iclass 20, count 0 2006.229.07:58:47.86#ibcon#about to read 3, iclass 20, count 0 2006.229.07:58:47.88#ibcon#read 3, iclass 20, count 0 2006.229.07:58:47.88#ibcon#about to read 4, iclass 20, count 0 2006.229.07:58:47.88#ibcon#read 4, iclass 20, count 0 2006.229.07:58:47.88#ibcon#about to read 5, iclass 20, count 0 2006.229.07:58:47.88#ibcon#read 5, iclass 20, count 0 2006.229.07:58:47.88#ibcon#about to read 6, iclass 20, count 0 2006.229.07:58:47.88#ibcon#read 6, iclass 20, count 0 2006.229.07:58:47.88#ibcon#end of sib2, iclass 20, count 0 2006.229.07:58:47.88#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:58:47.88#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:58:47.88#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.07:58:47.88#ibcon#*before write, iclass 20, count 0 2006.229.07:58:47.88#ibcon#enter sib2, iclass 20, count 0 2006.229.07:58:47.88#ibcon#flushed, iclass 20, count 0 2006.229.07:58:47.88#ibcon#about to write, iclass 20, count 0 2006.229.07:58:47.88#ibcon#wrote, iclass 20, count 0 2006.229.07:58:47.88#ibcon#about to read 3, iclass 20, count 0 2006.229.07:58:47.92#ibcon#read 3, iclass 20, count 0 2006.229.07:58:47.92#ibcon#about to read 4, iclass 20, count 0 2006.229.07:58:47.92#ibcon#read 4, iclass 20, count 0 2006.229.07:58:47.92#ibcon#about to read 5, iclass 20, count 0 2006.229.07:58:47.92#ibcon#read 5, iclass 20, count 0 2006.229.07:58:47.92#ibcon#about to read 6, iclass 20, count 0 2006.229.07:58:47.92#ibcon#read 6, iclass 20, count 0 2006.229.07:58:47.92#ibcon#end of sib2, iclass 20, count 0 2006.229.07:58:47.92#ibcon#*after write, iclass 20, count 0 2006.229.07:58:47.92#ibcon#*before return 0, iclass 20, count 0 2006.229.07:58:47.92#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:47.92#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:47.92#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:58:47.92#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:58:47.92$vck44/va=5,4 2006.229.07:58:47.92#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.07:58:47.92#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.07:58:47.92#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:47.92#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:47.98#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:47.98#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:47.98#ibcon#enter wrdev, iclass 22, count 2 2006.229.07:58:47.98#ibcon#first serial, iclass 22, count 2 2006.229.07:58:47.98#ibcon#enter sib2, iclass 22, count 2 2006.229.07:58:47.98#ibcon#flushed, iclass 22, count 2 2006.229.07:58:47.98#ibcon#about to write, iclass 22, count 2 2006.229.07:58:47.98#ibcon#wrote, iclass 22, count 2 2006.229.07:58:47.98#ibcon#about to read 3, iclass 22, count 2 2006.229.07:58:48.00#ibcon#read 3, iclass 22, count 2 2006.229.07:58:48.00#ibcon#about to read 4, iclass 22, count 2 2006.229.07:58:48.00#ibcon#read 4, iclass 22, count 2 2006.229.07:58:48.00#ibcon#about to read 5, iclass 22, count 2 2006.229.07:58:48.00#ibcon#read 5, iclass 22, count 2 2006.229.07:58:48.00#ibcon#about to read 6, iclass 22, count 2 2006.229.07:58:48.00#ibcon#read 6, iclass 22, count 2 2006.229.07:58:48.00#ibcon#end of sib2, iclass 22, count 2 2006.229.07:58:48.00#ibcon#*mode == 0, iclass 22, count 2 2006.229.07:58:48.00#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.07:58:48.00#ibcon#[25=AT05-04\r\n] 2006.229.07:58:48.00#ibcon#*before write, iclass 22, count 2 2006.229.07:58:48.00#ibcon#enter sib2, iclass 22, count 2 2006.229.07:58:48.00#ibcon#flushed, iclass 22, count 2 2006.229.07:58:48.00#ibcon#about to write, iclass 22, count 2 2006.229.07:58:48.00#ibcon#wrote, iclass 22, count 2 2006.229.07:58:48.00#ibcon#about to read 3, iclass 22, count 2 2006.229.07:58:48.03#ibcon#read 3, iclass 22, count 2 2006.229.07:58:48.03#ibcon#about to read 4, iclass 22, count 2 2006.229.07:58:48.03#ibcon#read 4, iclass 22, count 2 2006.229.07:58:48.03#ibcon#about to read 5, iclass 22, count 2 2006.229.07:58:48.03#ibcon#read 5, iclass 22, count 2 2006.229.07:58:48.03#ibcon#about to read 6, iclass 22, count 2 2006.229.07:58:48.03#ibcon#read 6, iclass 22, count 2 2006.229.07:58:48.03#ibcon#end of sib2, iclass 22, count 2 2006.229.07:58:48.03#ibcon#*after write, iclass 22, count 2 2006.229.07:58:48.03#ibcon#*before return 0, iclass 22, count 2 2006.229.07:58:48.03#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:48.03#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:48.03#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.07:58:48.03#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:48.03#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:48.15#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:48.15#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:48.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:58:48.15#ibcon#first serial, iclass 22, count 0 2006.229.07:58:48.15#ibcon#enter sib2, iclass 22, count 0 2006.229.07:58:48.15#ibcon#flushed, iclass 22, count 0 2006.229.07:58:48.15#ibcon#about to write, iclass 22, count 0 2006.229.07:58:48.15#ibcon#wrote, iclass 22, count 0 2006.229.07:58:48.15#ibcon#about to read 3, iclass 22, count 0 2006.229.07:58:48.17#ibcon#read 3, iclass 22, count 0 2006.229.07:58:48.17#ibcon#about to read 4, iclass 22, count 0 2006.229.07:58:48.17#ibcon#read 4, iclass 22, count 0 2006.229.07:58:48.17#ibcon#about to read 5, iclass 22, count 0 2006.229.07:58:48.17#ibcon#read 5, iclass 22, count 0 2006.229.07:58:48.17#ibcon#about to read 6, iclass 22, count 0 2006.229.07:58:48.17#ibcon#read 6, iclass 22, count 0 2006.229.07:58:48.17#ibcon#end of sib2, iclass 22, count 0 2006.229.07:58:48.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:58:48.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:58:48.17#ibcon#[25=USB\r\n] 2006.229.07:58:48.17#ibcon#*before write, iclass 22, count 0 2006.229.07:58:48.17#ibcon#enter sib2, iclass 22, count 0 2006.229.07:58:48.17#ibcon#flushed, iclass 22, count 0 2006.229.07:58:48.17#ibcon#about to write, iclass 22, count 0 2006.229.07:58:48.17#ibcon#wrote, iclass 22, count 0 2006.229.07:58:48.17#ibcon#about to read 3, iclass 22, count 0 2006.229.07:58:48.20#ibcon#read 3, iclass 22, count 0 2006.229.07:58:48.20#ibcon#about to read 4, iclass 22, count 0 2006.229.07:58:48.20#ibcon#read 4, iclass 22, count 0 2006.229.07:58:48.20#ibcon#about to read 5, iclass 22, count 0 2006.229.07:58:48.20#ibcon#read 5, iclass 22, count 0 2006.229.07:58:48.20#ibcon#about to read 6, iclass 22, count 0 2006.229.07:58:48.20#ibcon#read 6, iclass 22, count 0 2006.229.07:58:48.20#ibcon#end of sib2, iclass 22, count 0 2006.229.07:58:48.20#ibcon#*after write, iclass 22, count 0 2006.229.07:58:48.20#ibcon#*before return 0, iclass 22, count 0 2006.229.07:58:48.20#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:48.20#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:48.20#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:58:48.20#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:58:48.20$vck44/valo=6,814.99 2006.229.07:58:48.20#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.07:58:48.20#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.07:58:48.20#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:48.20#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:48.20#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:48.20#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:48.20#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:58:48.20#ibcon#first serial, iclass 24, count 0 2006.229.07:58:48.20#ibcon#enter sib2, iclass 24, count 0 2006.229.07:58:48.20#ibcon#flushed, iclass 24, count 0 2006.229.07:58:48.20#ibcon#about to write, iclass 24, count 0 2006.229.07:58:48.20#ibcon#wrote, iclass 24, count 0 2006.229.07:58:48.20#ibcon#about to read 3, iclass 24, count 0 2006.229.07:58:48.22#ibcon#read 3, iclass 24, count 0 2006.229.07:58:48.22#ibcon#about to read 4, iclass 24, count 0 2006.229.07:58:48.22#ibcon#read 4, iclass 24, count 0 2006.229.07:58:48.22#ibcon#about to read 5, iclass 24, count 0 2006.229.07:58:48.22#ibcon#read 5, iclass 24, count 0 2006.229.07:58:48.22#ibcon#about to read 6, iclass 24, count 0 2006.229.07:58:48.22#ibcon#read 6, iclass 24, count 0 2006.229.07:58:48.22#ibcon#end of sib2, iclass 24, count 0 2006.229.07:58:48.22#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:58:48.22#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:58:48.22#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.07:58:48.22#ibcon#*before write, iclass 24, count 0 2006.229.07:58:48.22#ibcon#enter sib2, iclass 24, count 0 2006.229.07:58:48.22#ibcon#flushed, iclass 24, count 0 2006.229.07:58:48.22#ibcon#about to write, iclass 24, count 0 2006.229.07:58:48.22#ibcon#wrote, iclass 24, count 0 2006.229.07:58:48.22#ibcon#about to read 3, iclass 24, count 0 2006.229.07:58:48.26#ibcon#read 3, iclass 24, count 0 2006.229.07:58:48.26#ibcon#about to read 4, iclass 24, count 0 2006.229.07:58:48.26#ibcon#read 4, iclass 24, count 0 2006.229.07:58:48.26#ibcon#about to read 5, iclass 24, count 0 2006.229.07:58:48.26#ibcon#read 5, iclass 24, count 0 2006.229.07:58:48.26#ibcon#about to read 6, iclass 24, count 0 2006.229.07:58:48.26#ibcon#read 6, iclass 24, count 0 2006.229.07:58:48.26#ibcon#end of sib2, iclass 24, count 0 2006.229.07:58:48.26#ibcon#*after write, iclass 24, count 0 2006.229.07:58:48.26#ibcon#*before return 0, iclass 24, count 0 2006.229.07:58:48.26#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:48.26#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:48.26#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:58:48.26#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:58:48.26$vck44/va=6,4 2006.229.07:58:48.26#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.07:58:48.26#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.07:58:48.26#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:48.26#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:48.32#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:48.32#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:48.32#ibcon#enter wrdev, iclass 26, count 2 2006.229.07:58:48.32#ibcon#first serial, iclass 26, count 2 2006.229.07:58:48.32#ibcon#enter sib2, iclass 26, count 2 2006.229.07:58:48.32#ibcon#flushed, iclass 26, count 2 2006.229.07:58:48.32#ibcon#about to write, iclass 26, count 2 2006.229.07:58:48.32#ibcon#wrote, iclass 26, count 2 2006.229.07:58:48.32#ibcon#about to read 3, iclass 26, count 2 2006.229.07:58:48.34#ibcon#read 3, iclass 26, count 2 2006.229.07:58:48.34#ibcon#about to read 4, iclass 26, count 2 2006.229.07:58:48.34#ibcon#read 4, iclass 26, count 2 2006.229.07:58:48.34#ibcon#about to read 5, iclass 26, count 2 2006.229.07:58:48.34#ibcon#read 5, iclass 26, count 2 2006.229.07:58:48.34#ibcon#about to read 6, iclass 26, count 2 2006.229.07:58:48.34#ibcon#read 6, iclass 26, count 2 2006.229.07:58:48.34#ibcon#end of sib2, iclass 26, count 2 2006.229.07:58:48.34#ibcon#*mode == 0, iclass 26, count 2 2006.229.07:58:48.34#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.07:58:48.34#ibcon#[25=AT06-04\r\n] 2006.229.07:58:48.34#ibcon#*before write, iclass 26, count 2 2006.229.07:58:48.34#ibcon#enter sib2, iclass 26, count 2 2006.229.07:58:48.34#ibcon#flushed, iclass 26, count 2 2006.229.07:58:48.34#ibcon#about to write, iclass 26, count 2 2006.229.07:58:48.34#ibcon#wrote, iclass 26, count 2 2006.229.07:58:48.34#ibcon#about to read 3, iclass 26, count 2 2006.229.07:58:48.37#ibcon#read 3, iclass 26, count 2 2006.229.07:58:48.37#ibcon#about to read 4, iclass 26, count 2 2006.229.07:58:48.37#ibcon#read 4, iclass 26, count 2 2006.229.07:58:48.37#ibcon#about to read 5, iclass 26, count 2 2006.229.07:58:48.37#ibcon#read 5, iclass 26, count 2 2006.229.07:58:48.37#ibcon#about to read 6, iclass 26, count 2 2006.229.07:58:48.37#ibcon#read 6, iclass 26, count 2 2006.229.07:58:48.37#ibcon#end of sib2, iclass 26, count 2 2006.229.07:58:48.37#ibcon#*after write, iclass 26, count 2 2006.229.07:58:48.37#ibcon#*before return 0, iclass 26, count 2 2006.229.07:58:48.37#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:48.37#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:48.37#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.07:58:48.37#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:48.37#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:48.49#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:48.49#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:48.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:58:48.49#ibcon#first serial, iclass 26, count 0 2006.229.07:58:48.49#ibcon#enter sib2, iclass 26, count 0 2006.229.07:58:48.49#ibcon#flushed, iclass 26, count 0 2006.229.07:58:48.49#ibcon#about to write, iclass 26, count 0 2006.229.07:58:48.49#ibcon#wrote, iclass 26, count 0 2006.229.07:58:48.49#ibcon#about to read 3, iclass 26, count 0 2006.229.07:58:48.51#ibcon#read 3, iclass 26, count 0 2006.229.07:58:48.51#ibcon#about to read 4, iclass 26, count 0 2006.229.07:58:48.51#ibcon#read 4, iclass 26, count 0 2006.229.07:58:48.51#ibcon#about to read 5, iclass 26, count 0 2006.229.07:58:48.51#ibcon#read 5, iclass 26, count 0 2006.229.07:58:48.51#ibcon#about to read 6, iclass 26, count 0 2006.229.07:58:48.51#ibcon#read 6, iclass 26, count 0 2006.229.07:58:48.51#ibcon#end of sib2, iclass 26, count 0 2006.229.07:58:48.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:58:48.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:58:48.51#ibcon#[25=USB\r\n] 2006.229.07:58:48.51#ibcon#*before write, iclass 26, count 0 2006.229.07:58:48.51#ibcon#enter sib2, iclass 26, count 0 2006.229.07:58:48.51#ibcon#flushed, iclass 26, count 0 2006.229.07:58:48.51#ibcon#about to write, iclass 26, count 0 2006.229.07:58:48.51#ibcon#wrote, iclass 26, count 0 2006.229.07:58:48.51#ibcon#about to read 3, iclass 26, count 0 2006.229.07:58:48.54#ibcon#read 3, iclass 26, count 0 2006.229.07:58:48.54#ibcon#about to read 4, iclass 26, count 0 2006.229.07:58:48.54#ibcon#read 4, iclass 26, count 0 2006.229.07:58:48.54#ibcon#about to read 5, iclass 26, count 0 2006.229.07:58:48.54#ibcon#read 5, iclass 26, count 0 2006.229.07:58:48.54#ibcon#about to read 6, iclass 26, count 0 2006.229.07:58:48.54#ibcon#read 6, iclass 26, count 0 2006.229.07:58:48.54#ibcon#end of sib2, iclass 26, count 0 2006.229.07:58:48.54#ibcon#*after write, iclass 26, count 0 2006.229.07:58:48.54#ibcon#*before return 0, iclass 26, count 0 2006.229.07:58:48.54#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:48.54#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:48.54#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:58:48.54#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:58:48.54$vck44/valo=7,864.99 2006.229.07:58:48.54#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.07:58:48.54#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.07:58:48.54#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:48.54#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:48.54#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:48.54#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:48.54#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:58:48.54#ibcon#first serial, iclass 28, count 0 2006.229.07:58:48.54#ibcon#enter sib2, iclass 28, count 0 2006.229.07:58:48.54#ibcon#flushed, iclass 28, count 0 2006.229.07:58:48.54#ibcon#about to write, iclass 28, count 0 2006.229.07:58:48.54#ibcon#wrote, iclass 28, count 0 2006.229.07:58:48.54#ibcon#about to read 3, iclass 28, count 0 2006.229.07:58:48.56#ibcon#read 3, iclass 28, count 0 2006.229.07:58:48.56#ibcon#about to read 4, iclass 28, count 0 2006.229.07:58:48.56#ibcon#read 4, iclass 28, count 0 2006.229.07:58:48.56#ibcon#about to read 5, iclass 28, count 0 2006.229.07:58:48.56#ibcon#read 5, iclass 28, count 0 2006.229.07:58:48.56#ibcon#about to read 6, iclass 28, count 0 2006.229.07:58:48.56#ibcon#read 6, iclass 28, count 0 2006.229.07:58:48.56#ibcon#end of sib2, iclass 28, count 0 2006.229.07:58:48.56#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:58:48.56#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:58:48.56#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.07:58:48.56#ibcon#*before write, iclass 28, count 0 2006.229.07:58:48.56#ibcon#enter sib2, iclass 28, count 0 2006.229.07:58:48.56#ibcon#flushed, iclass 28, count 0 2006.229.07:58:48.56#ibcon#about to write, iclass 28, count 0 2006.229.07:58:48.56#ibcon#wrote, iclass 28, count 0 2006.229.07:58:48.56#ibcon#about to read 3, iclass 28, count 0 2006.229.07:58:48.60#ibcon#read 3, iclass 28, count 0 2006.229.07:58:48.60#ibcon#about to read 4, iclass 28, count 0 2006.229.07:58:48.60#ibcon#read 4, iclass 28, count 0 2006.229.07:58:48.60#ibcon#about to read 5, iclass 28, count 0 2006.229.07:58:48.60#ibcon#read 5, iclass 28, count 0 2006.229.07:58:48.60#ibcon#about to read 6, iclass 28, count 0 2006.229.07:58:48.60#ibcon#read 6, iclass 28, count 0 2006.229.07:58:48.60#ibcon#end of sib2, iclass 28, count 0 2006.229.07:58:48.60#ibcon#*after write, iclass 28, count 0 2006.229.07:58:48.60#ibcon#*before return 0, iclass 28, count 0 2006.229.07:58:48.60#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:48.60#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:48.60#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:58:48.60#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:58:48.60$vck44/va=7,5 2006.229.07:58:48.60#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.07:58:48.60#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.07:58:48.60#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:48.60#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:48.66#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:48.66#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:48.66#ibcon#enter wrdev, iclass 30, count 2 2006.229.07:58:48.66#ibcon#first serial, iclass 30, count 2 2006.229.07:58:48.66#ibcon#enter sib2, iclass 30, count 2 2006.229.07:58:48.66#ibcon#flushed, iclass 30, count 2 2006.229.07:58:48.66#ibcon#about to write, iclass 30, count 2 2006.229.07:58:48.66#ibcon#wrote, iclass 30, count 2 2006.229.07:58:48.66#ibcon#about to read 3, iclass 30, count 2 2006.229.07:58:48.68#ibcon#read 3, iclass 30, count 2 2006.229.07:58:48.68#ibcon#about to read 4, iclass 30, count 2 2006.229.07:58:48.68#ibcon#read 4, iclass 30, count 2 2006.229.07:58:48.68#ibcon#about to read 5, iclass 30, count 2 2006.229.07:58:48.68#ibcon#read 5, iclass 30, count 2 2006.229.07:58:48.68#ibcon#about to read 6, iclass 30, count 2 2006.229.07:58:48.68#ibcon#read 6, iclass 30, count 2 2006.229.07:58:48.68#ibcon#end of sib2, iclass 30, count 2 2006.229.07:58:48.68#ibcon#*mode == 0, iclass 30, count 2 2006.229.07:58:48.68#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.07:58:48.68#ibcon#[25=AT07-05\r\n] 2006.229.07:58:48.68#ibcon#*before write, iclass 30, count 2 2006.229.07:58:48.68#ibcon#enter sib2, iclass 30, count 2 2006.229.07:58:48.68#ibcon#flushed, iclass 30, count 2 2006.229.07:58:48.68#ibcon#about to write, iclass 30, count 2 2006.229.07:58:48.68#ibcon#wrote, iclass 30, count 2 2006.229.07:58:48.68#ibcon#about to read 3, iclass 30, count 2 2006.229.07:58:48.71#ibcon#read 3, iclass 30, count 2 2006.229.07:58:48.71#ibcon#about to read 4, iclass 30, count 2 2006.229.07:58:48.71#ibcon#read 4, iclass 30, count 2 2006.229.07:58:48.71#ibcon#about to read 5, iclass 30, count 2 2006.229.07:58:48.71#ibcon#read 5, iclass 30, count 2 2006.229.07:58:48.71#ibcon#about to read 6, iclass 30, count 2 2006.229.07:58:48.71#ibcon#read 6, iclass 30, count 2 2006.229.07:58:48.71#ibcon#end of sib2, iclass 30, count 2 2006.229.07:58:48.71#ibcon#*after write, iclass 30, count 2 2006.229.07:58:48.71#ibcon#*before return 0, iclass 30, count 2 2006.229.07:58:48.71#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:48.71#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:48.71#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.07:58:48.71#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:48.71#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:48.83#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:48.83#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:48.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:58:48.83#ibcon#first serial, iclass 30, count 0 2006.229.07:58:48.83#ibcon#enter sib2, iclass 30, count 0 2006.229.07:58:48.83#ibcon#flushed, iclass 30, count 0 2006.229.07:58:48.83#ibcon#about to write, iclass 30, count 0 2006.229.07:58:48.83#ibcon#wrote, iclass 30, count 0 2006.229.07:58:48.83#ibcon#about to read 3, iclass 30, count 0 2006.229.07:58:48.85#ibcon#read 3, iclass 30, count 0 2006.229.07:58:48.85#ibcon#about to read 4, iclass 30, count 0 2006.229.07:58:48.85#ibcon#read 4, iclass 30, count 0 2006.229.07:58:48.85#ibcon#about to read 5, iclass 30, count 0 2006.229.07:58:48.85#ibcon#read 5, iclass 30, count 0 2006.229.07:58:48.85#ibcon#about to read 6, iclass 30, count 0 2006.229.07:58:48.85#ibcon#read 6, iclass 30, count 0 2006.229.07:58:48.85#ibcon#end of sib2, iclass 30, count 0 2006.229.07:58:48.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:58:48.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:58:48.85#ibcon#[25=USB\r\n] 2006.229.07:58:48.85#ibcon#*before write, iclass 30, count 0 2006.229.07:58:48.85#ibcon#enter sib2, iclass 30, count 0 2006.229.07:58:48.85#ibcon#flushed, iclass 30, count 0 2006.229.07:58:48.85#ibcon#about to write, iclass 30, count 0 2006.229.07:58:48.85#ibcon#wrote, iclass 30, count 0 2006.229.07:58:48.85#ibcon#about to read 3, iclass 30, count 0 2006.229.07:58:48.88#ibcon#read 3, iclass 30, count 0 2006.229.07:58:48.88#ibcon#about to read 4, iclass 30, count 0 2006.229.07:58:48.88#ibcon#read 4, iclass 30, count 0 2006.229.07:58:48.88#ibcon#about to read 5, iclass 30, count 0 2006.229.07:58:48.88#ibcon#read 5, iclass 30, count 0 2006.229.07:58:48.88#ibcon#about to read 6, iclass 30, count 0 2006.229.07:58:48.88#ibcon#read 6, iclass 30, count 0 2006.229.07:58:48.88#ibcon#end of sib2, iclass 30, count 0 2006.229.07:58:48.88#ibcon#*after write, iclass 30, count 0 2006.229.07:58:48.88#ibcon#*before return 0, iclass 30, count 0 2006.229.07:58:48.88#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:48.88#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:48.88#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:58:48.88#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:58:48.88$vck44/valo=8,884.99 2006.229.07:58:48.88#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:58:48.88#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:58:48.88#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:48.88#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:48.88#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:48.88#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:48.88#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:58:48.88#ibcon#first serial, iclass 32, count 0 2006.229.07:58:48.88#ibcon#enter sib2, iclass 32, count 0 2006.229.07:58:48.88#ibcon#flushed, iclass 32, count 0 2006.229.07:58:48.88#ibcon#about to write, iclass 32, count 0 2006.229.07:58:48.88#ibcon#wrote, iclass 32, count 0 2006.229.07:58:48.88#ibcon#about to read 3, iclass 32, count 0 2006.229.07:58:48.90#ibcon#read 3, iclass 32, count 0 2006.229.07:58:48.90#ibcon#about to read 4, iclass 32, count 0 2006.229.07:58:48.90#ibcon#read 4, iclass 32, count 0 2006.229.07:58:48.90#ibcon#about to read 5, iclass 32, count 0 2006.229.07:58:48.90#ibcon#read 5, iclass 32, count 0 2006.229.07:58:48.90#ibcon#about to read 6, iclass 32, count 0 2006.229.07:58:48.90#ibcon#read 6, iclass 32, count 0 2006.229.07:58:48.90#ibcon#end of sib2, iclass 32, count 0 2006.229.07:58:48.90#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:58:48.90#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:58:48.90#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.07:58:48.90#ibcon#*before write, iclass 32, count 0 2006.229.07:58:48.90#ibcon#enter sib2, iclass 32, count 0 2006.229.07:58:48.90#ibcon#flushed, iclass 32, count 0 2006.229.07:58:48.90#ibcon#about to write, iclass 32, count 0 2006.229.07:58:48.90#ibcon#wrote, iclass 32, count 0 2006.229.07:58:48.90#ibcon#about to read 3, iclass 32, count 0 2006.229.07:58:48.94#ibcon#read 3, iclass 32, count 0 2006.229.07:58:48.94#ibcon#about to read 4, iclass 32, count 0 2006.229.07:58:48.94#ibcon#read 4, iclass 32, count 0 2006.229.07:58:48.94#ibcon#about to read 5, iclass 32, count 0 2006.229.07:58:48.94#ibcon#read 5, iclass 32, count 0 2006.229.07:58:48.94#ibcon#about to read 6, iclass 32, count 0 2006.229.07:58:48.94#ibcon#read 6, iclass 32, count 0 2006.229.07:58:48.94#ibcon#end of sib2, iclass 32, count 0 2006.229.07:58:48.94#ibcon#*after write, iclass 32, count 0 2006.229.07:58:48.94#ibcon#*before return 0, iclass 32, count 0 2006.229.07:58:48.94#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:48.94#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:48.94#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:58:48.94#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:58:48.94$vck44/va=8,6 2006.229.07:58:48.94#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.07:58:48.94#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.07:58:48.94#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:48.94#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:58:49.00#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:58:49.00#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:58:49.00#ibcon#enter wrdev, iclass 34, count 2 2006.229.07:58:49.00#ibcon#first serial, iclass 34, count 2 2006.229.07:58:49.00#ibcon#enter sib2, iclass 34, count 2 2006.229.07:58:49.00#ibcon#flushed, iclass 34, count 2 2006.229.07:58:49.00#ibcon#about to write, iclass 34, count 2 2006.229.07:58:49.00#ibcon#wrote, iclass 34, count 2 2006.229.07:58:49.00#ibcon#about to read 3, iclass 34, count 2 2006.229.07:58:49.02#ibcon#read 3, iclass 34, count 2 2006.229.07:58:49.02#ibcon#about to read 4, iclass 34, count 2 2006.229.07:58:49.02#ibcon#read 4, iclass 34, count 2 2006.229.07:58:49.02#ibcon#about to read 5, iclass 34, count 2 2006.229.07:58:49.02#ibcon#read 5, iclass 34, count 2 2006.229.07:58:49.02#ibcon#about to read 6, iclass 34, count 2 2006.229.07:58:49.02#ibcon#read 6, iclass 34, count 2 2006.229.07:58:49.02#ibcon#end of sib2, iclass 34, count 2 2006.229.07:58:49.02#ibcon#*mode == 0, iclass 34, count 2 2006.229.07:58:49.02#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.07:58:49.02#ibcon#[25=AT08-06\r\n] 2006.229.07:58:49.02#ibcon#*before write, iclass 34, count 2 2006.229.07:58:49.02#ibcon#enter sib2, iclass 34, count 2 2006.229.07:58:49.02#ibcon#flushed, iclass 34, count 2 2006.229.07:58:49.02#ibcon#about to write, iclass 34, count 2 2006.229.07:58:49.02#ibcon#wrote, iclass 34, count 2 2006.229.07:58:49.02#ibcon#about to read 3, iclass 34, count 2 2006.229.07:58:49.05#ibcon#read 3, iclass 34, count 2 2006.229.07:58:49.05#ibcon#about to read 4, iclass 34, count 2 2006.229.07:58:49.05#ibcon#read 4, iclass 34, count 2 2006.229.07:58:49.05#ibcon#about to read 5, iclass 34, count 2 2006.229.07:58:49.05#ibcon#read 5, iclass 34, count 2 2006.229.07:58:49.05#ibcon#about to read 6, iclass 34, count 2 2006.229.07:58:49.05#ibcon#read 6, iclass 34, count 2 2006.229.07:58:49.05#ibcon#end of sib2, iclass 34, count 2 2006.229.07:58:49.05#ibcon#*after write, iclass 34, count 2 2006.229.07:58:49.05#ibcon#*before return 0, iclass 34, count 2 2006.229.07:58:49.05#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:58:49.05#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.07:58:49.05#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.07:58:49.05#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:49.05#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:58:49.17#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:58:49.17#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:58:49.17#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:58:49.17#ibcon#first serial, iclass 34, count 0 2006.229.07:58:49.17#ibcon#enter sib2, iclass 34, count 0 2006.229.07:58:49.17#ibcon#flushed, iclass 34, count 0 2006.229.07:58:49.17#ibcon#about to write, iclass 34, count 0 2006.229.07:58:49.17#ibcon#wrote, iclass 34, count 0 2006.229.07:58:49.17#ibcon#about to read 3, iclass 34, count 0 2006.229.07:58:49.19#ibcon#read 3, iclass 34, count 0 2006.229.07:58:49.19#ibcon#about to read 4, iclass 34, count 0 2006.229.07:58:49.19#ibcon#read 4, iclass 34, count 0 2006.229.07:58:49.19#ibcon#about to read 5, iclass 34, count 0 2006.229.07:58:49.19#ibcon#read 5, iclass 34, count 0 2006.229.07:58:49.19#ibcon#about to read 6, iclass 34, count 0 2006.229.07:58:49.19#ibcon#read 6, iclass 34, count 0 2006.229.07:58:49.19#ibcon#end of sib2, iclass 34, count 0 2006.229.07:58:49.19#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:58:49.19#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:58:49.19#ibcon#[25=USB\r\n] 2006.229.07:58:49.19#ibcon#*before write, iclass 34, count 0 2006.229.07:58:49.19#ibcon#enter sib2, iclass 34, count 0 2006.229.07:58:49.19#ibcon#flushed, iclass 34, count 0 2006.229.07:58:49.19#ibcon#about to write, iclass 34, count 0 2006.229.07:58:49.19#ibcon#wrote, iclass 34, count 0 2006.229.07:58:49.19#ibcon#about to read 3, iclass 34, count 0 2006.229.07:58:49.22#ibcon#read 3, iclass 34, count 0 2006.229.07:58:49.22#ibcon#about to read 4, iclass 34, count 0 2006.229.07:58:49.22#ibcon#read 4, iclass 34, count 0 2006.229.07:58:49.22#ibcon#about to read 5, iclass 34, count 0 2006.229.07:58:49.22#ibcon#read 5, iclass 34, count 0 2006.229.07:58:49.22#ibcon#about to read 6, iclass 34, count 0 2006.229.07:58:49.22#ibcon#read 6, iclass 34, count 0 2006.229.07:58:49.22#ibcon#end of sib2, iclass 34, count 0 2006.229.07:58:49.22#ibcon#*after write, iclass 34, count 0 2006.229.07:58:49.22#ibcon#*before return 0, iclass 34, count 0 2006.229.07:58:49.22#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:58:49.22#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.07:58:49.22#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:58:49.22#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:58:49.22$vck44/vblo=1,629.99 2006.229.07:58:49.22#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.07:58:49.22#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.07:58:49.22#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:49.22#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:58:49.22#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:58:49.22#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:58:49.22#ibcon#enter wrdev, iclass 36, count 0 2006.229.07:58:49.22#ibcon#first serial, iclass 36, count 0 2006.229.07:58:49.22#ibcon#enter sib2, iclass 36, count 0 2006.229.07:58:49.22#ibcon#flushed, iclass 36, count 0 2006.229.07:58:49.22#ibcon#about to write, iclass 36, count 0 2006.229.07:58:49.22#ibcon#wrote, iclass 36, count 0 2006.229.07:58:49.22#ibcon#about to read 3, iclass 36, count 0 2006.229.07:58:49.24#ibcon#read 3, iclass 36, count 0 2006.229.07:58:49.24#ibcon#about to read 4, iclass 36, count 0 2006.229.07:58:49.24#ibcon#read 4, iclass 36, count 0 2006.229.07:58:49.24#ibcon#about to read 5, iclass 36, count 0 2006.229.07:58:49.24#ibcon#read 5, iclass 36, count 0 2006.229.07:58:49.24#ibcon#about to read 6, iclass 36, count 0 2006.229.07:58:49.24#ibcon#read 6, iclass 36, count 0 2006.229.07:58:49.24#ibcon#end of sib2, iclass 36, count 0 2006.229.07:58:49.24#ibcon#*mode == 0, iclass 36, count 0 2006.229.07:58:49.24#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.07:58:49.24#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.07:58:49.24#ibcon#*before write, iclass 36, count 0 2006.229.07:58:49.24#ibcon#enter sib2, iclass 36, count 0 2006.229.07:58:49.24#ibcon#flushed, iclass 36, count 0 2006.229.07:58:49.24#ibcon#about to write, iclass 36, count 0 2006.229.07:58:49.24#ibcon#wrote, iclass 36, count 0 2006.229.07:58:49.24#ibcon#about to read 3, iclass 36, count 0 2006.229.07:58:49.28#ibcon#read 3, iclass 36, count 0 2006.229.07:58:49.28#ibcon#about to read 4, iclass 36, count 0 2006.229.07:58:49.28#ibcon#read 4, iclass 36, count 0 2006.229.07:58:49.28#ibcon#about to read 5, iclass 36, count 0 2006.229.07:58:49.28#ibcon#read 5, iclass 36, count 0 2006.229.07:58:49.28#ibcon#about to read 6, iclass 36, count 0 2006.229.07:58:49.28#ibcon#read 6, iclass 36, count 0 2006.229.07:58:49.28#ibcon#end of sib2, iclass 36, count 0 2006.229.07:58:49.28#ibcon#*after write, iclass 36, count 0 2006.229.07:58:49.28#ibcon#*before return 0, iclass 36, count 0 2006.229.07:58:49.28#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:58:49.28#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.07:58:49.28#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.07:58:49.28#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.07:58:49.28$vck44/vb=1,4 2006.229.07:58:49.28#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.07:58:49.28#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.07:58:49.28#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:49.28#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:58:49.28#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:58:49.28#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:58:49.28#ibcon#enter wrdev, iclass 38, count 2 2006.229.07:58:49.28#ibcon#first serial, iclass 38, count 2 2006.229.07:58:49.28#ibcon#enter sib2, iclass 38, count 2 2006.229.07:58:49.28#ibcon#flushed, iclass 38, count 2 2006.229.07:58:49.28#ibcon#about to write, iclass 38, count 2 2006.229.07:58:49.28#ibcon#wrote, iclass 38, count 2 2006.229.07:58:49.28#ibcon#about to read 3, iclass 38, count 2 2006.229.07:58:49.30#ibcon#read 3, iclass 38, count 2 2006.229.07:58:49.30#ibcon#about to read 4, iclass 38, count 2 2006.229.07:58:49.30#ibcon#read 4, iclass 38, count 2 2006.229.07:58:49.30#ibcon#about to read 5, iclass 38, count 2 2006.229.07:58:49.30#ibcon#read 5, iclass 38, count 2 2006.229.07:58:49.30#ibcon#about to read 6, iclass 38, count 2 2006.229.07:58:49.30#ibcon#read 6, iclass 38, count 2 2006.229.07:58:49.30#ibcon#end of sib2, iclass 38, count 2 2006.229.07:58:49.30#ibcon#*mode == 0, iclass 38, count 2 2006.229.07:58:49.30#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.07:58:49.30#ibcon#[27=AT01-04\r\n] 2006.229.07:58:49.30#ibcon#*before write, iclass 38, count 2 2006.229.07:58:49.30#ibcon#enter sib2, iclass 38, count 2 2006.229.07:58:49.30#ibcon#flushed, iclass 38, count 2 2006.229.07:58:49.30#ibcon#about to write, iclass 38, count 2 2006.229.07:58:49.30#ibcon#wrote, iclass 38, count 2 2006.229.07:58:49.30#ibcon#about to read 3, iclass 38, count 2 2006.229.07:58:49.33#ibcon#read 3, iclass 38, count 2 2006.229.07:58:49.33#ibcon#about to read 4, iclass 38, count 2 2006.229.07:58:49.33#ibcon#read 4, iclass 38, count 2 2006.229.07:58:49.33#ibcon#about to read 5, iclass 38, count 2 2006.229.07:58:49.33#ibcon#read 5, iclass 38, count 2 2006.229.07:58:49.33#ibcon#about to read 6, iclass 38, count 2 2006.229.07:58:49.33#ibcon#read 6, iclass 38, count 2 2006.229.07:58:49.33#ibcon#end of sib2, iclass 38, count 2 2006.229.07:58:49.33#ibcon#*after write, iclass 38, count 2 2006.229.07:58:49.33#ibcon#*before return 0, iclass 38, count 2 2006.229.07:58:49.33#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:58:49.33#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.07:58:49.33#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.07:58:49.33#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:49.33#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:58:49.45#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:58:49.45#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:58:49.45#ibcon#enter wrdev, iclass 38, count 0 2006.229.07:58:49.45#ibcon#first serial, iclass 38, count 0 2006.229.07:58:49.45#ibcon#enter sib2, iclass 38, count 0 2006.229.07:58:49.45#ibcon#flushed, iclass 38, count 0 2006.229.07:58:49.45#ibcon#about to write, iclass 38, count 0 2006.229.07:58:49.45#ibcon#wrote, iclass 38, count 0 2006.229.07:58:49.45#ibcon#about to read 3, iclass 38, count 0 2006.229.07:58:49.47#ibcon#read 3, iclass 38, count 0 2006.229.07:58:49.47#ibcon#about to read 4, iclass 38, count 0 2006.229.07:58:49.47#ibcon#read 4, iclass 38, count 0 2006.229.07:58:49.47#ibcon#about to read 5, iclass 38, count 0 2006.229.07:58:49.47#ibcon#read 5, iclass 38, count 0 2006.229.07:58:49.47#ibcon#about to read 6, iclass 38, count 0 2006.229.07:58:49.47#ibcon#read 6, iclass 38, count 0 2006.229.07:58:49.47#ibcon#end of sib2, iclass 38, count 0 2006.229.07:58:49.47#ibcon#*mode == 0, iclass 38, count 0 2006.229.07:58:49.47#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.07:58:49.47#ibcon#[27=USB\r\n] 2006.229.07:58:49.47#ibcon#*before write, iclass 38, count 0 2006.229.07:58:49.47#ibcon#enter sib2, iclass 38, count 0 2006.229.07:58:49.47#ibcon#flushed, iclass 38, count 0 2006.229.07:58:49.47#ibcon#about to write, iclass 38, count 0 2006.229.07:58:49.47#ibcon#wrote, iclass 38, count 0 2006.229.07:58:49.47#ibcon#about to read 3, iclass 38, count 0 2006.229.07:58:49.50#ibcon#read 3, iclass 38, count 0 2006.229.07:58:49.50#ibcon#about to read 4, iclass 38, count 0 2006.229.07:58:49.50#ibcon#read 4, iclass 38, count 0 2006.229.07:58:49.50#ibcon#about to read 5, iclass 38, count 0 2006.229.07:58:49.50#ibcon#read 5, iclass 38, count 0 2006.229.07:58:49.50#ibcon#about to read 6, iclass 38, count 0 2006.229.07:58:49.50#ibcon#read 6, iclass 38, count 0 2006.229.07:58:49.50#ibcon#end of sib2, iclass 38, count 0 2006.229.07:58:49.50#ibcon#*after write, iclass 38, count 0 2006.229.07:58:49.50#ibcon#*before return 0, iclass 38, count 0 2006.229.07:58:49.50#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:58:49.50#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.07:58:49.50#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.07:58:49.50#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.07:58:49.50$vck44/vblo=2,634.99 2006.229.07:58:49.50#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.07:58:49.50#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.07:58:49.50#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:49.50#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:49.50#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:49.50#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:49.50#ibcon#enter wrdev, iclass 40, count 0 2006.229.07:58:49.50#ibcon#first serial, iclass 40, count 0 2006.229.07:58:49.50#ibcon#enter sib2, iclass 40, count 0 2006.229.07:58:49.50#ibcon#flushed, iclass 40, count 0 2006.229.07:58:49.50#ibcon#about to write, iclass 40, count 0 2006.229.07:58:49.50#ibcon#wrote, iclass 40, count 0 2006.229.07:58:49.50#ibcon#about to read 3, iclass 40, count 0 2006.229.07:58:49.52#ibcon#read 3, iclass 40, count 0 2006.229.07:58:49.52#ibcon#about to read 4, iclass 40, count 0 2006.229.07:58:49.52#ibcon#read 4, iclass 40, count 0 2006.229.07:58:49.52#ibcon#about to read 5, iclass 40, count 0 2006.229.07:58:49.52#ibcon#read 5, iclass 40, count 0 2006.229.07:58:49.52#ibcon#about to read 6, iclass 40, count 0 2006.229.07:58:49.52#ibcon#read 6, iclass 40, count 0 2006.229.07:58:49.52#ibcon#end of sib2, iclass 40, count 0 2006.229.07:58:49.52#ibcon#*mode == 0, iclass 40, count 0 2006.229.07:58:49.52#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.07:58:49.52#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.07:58:49.52#ibcon#*before write, iclass 40, count 0 2006.229.07:58:49.52#ibcon#enter sib2, iclass 40, count 0 2006.229.07:58:49.52#ibcon#flushed, iclass 40, count 0 2006.229.07:58:49.52#ibcon#about to write, iclass 40, count 0 2006.229.07:58:49.52#ibcon#wrote, iclass 40, count 0 2006.229.07:58:49.52#ibcon#about to read 3, iclass 40, count 0 2006.229.07:58:49.56#ibcon#read 3, iclass 40, count 0 2006.229.07:58:49.56#ibcon#about to read 4, iclass 40, count 0 2006.229.07:58:49.56#ibcon#read 4, iclass 40, count 0 2006.229.07:58:49.56#ibcon#about to read 5, iclass 40, count 0 2006.229.07:58:49.56#ibcon#read 5, iclass 40, count 0 2006.229.07:58:49.56#ibcon#about to read 6, iclass 40, count 0 2006.229.07:58:49.56#ibcon#read 6, iclass 40, count 0 2006.229.07:58:49.56#ibcon#end of sib2, iclass 40, count 0 2006.229.07:58:49.56#ibcon#*after write, iclass 40, count 0 2006.229.07:58:49.56#ibcon#*before return 0, iclass 40, count 0 2006.229.07:58:49.56#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:49.56#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.07:58:49.56#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.07:58:49.56#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.07:58:49.56$vck44/vb=2,4 2006.229.07:58:49.56#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.07:58:49.56#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.07:58:49.56#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:49.56#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:49.62#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:49.62#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:49.62#ibcon#enter wrdev, iclass 4, count 2 2006.229.07:58:49.62#ibcon#first serial, iclass 4, count 2 2006.229.07:58:49.62#ibcon#enter sib2, iclass 4, count 2 2006.229.07:58:49.62#ibcon#flushed, iclass 4, count 2 2006.229.07:58:49.62#ibcon#about to write, iclass 4, count 2 2006.229.07:58:49.62#ibcon#wrote, iclass 4, count 2 2006.229.07:58:49.62#ibcon#about to read 3, iclass 4, count 2 2006.229.07:58:49.64#ibcon#read 3, iclass 4, count 2 2006.229.07:58:49.64#ibcon#about to read 4, iclass 4, count 2 2006.229.07:58:49.64#ibcon#read 4, iclass 4, count 2 2006.229.07:58:49.64#ibcon#about to read 5, iclass 4, count 2 2006.229.07:58:49.64#ibcon#read 5, iclass 4, count 2 2006.229.07:58:49.64#ibcon#about to read 6, iclass 4, count 2 2006.229.07:58:49.64#ibcon#read 6, iclass 4, count 2 2006.229.07:58:49.64#ibcon#end of sib2, iclass 4, count 2 2006.229.07:58:49.64#ibcon#*mode == 0, iclass 4, count 2 2006.229.07:58:49.64#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.07:58:49.64#ibcon#[27=AT02-04\r\n] 2006.229.07:58:49.64#ibcon#*before write, iclass 4, count 2 2006.229.07:58:49.64#ibcon#enter sib2, iclass 4, count 2 2006.229.07:58:49.64#ibcon#flushed, iclass 4, count 2 2006.229.07:58:49.64#ibcon#about to write, iclass 4, count 2 2006.229.07:58:49.64#ibcon#wrote, iclass 4, count 2 2006.229.07:58:49.64#ibcon#about to read 3, iclass 4, count 2 2006.229.07:58:49.67#ibcon#read 3, iclass 4, count 2 2006.229.07:58:49.67#ibcon#about to read 4, iclass 4, count 2 2006.229.07:58:49.67#ibcon#read 4, iclass 4, count 2 2006.229.07:58:49.67#ibcon#about to read 5, iclass 4, count 2 2006.229.07:58:49.67#ibcon#read 5, iclass 4, count 2 2006.229.07:58:49.67#ibcon#about to read 6, iclass 4, count 2 2006.229.07:58:49.67#ibcon#read 6, iclass 4, count 2 2006.229.07:58:49.67#ibcon#end of sib2, iclass 4, count 2 2006.229.07:58:49.67#ibcon#*after write, iclass 4, count 2 2006.229.07:58:49.67#ibcon#*before return 0, iclass 4, count 2 2006.229.07:58:49.67#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:49.67#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.07:58:49.67#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.07:58:49.67#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:49.67#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:49.79#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:49.79#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:49.79#ibcon#enter wrdev, iclass 4, count 0 2006.229.07:58:49.79#ibcon#first serial, iclass 4, count 0 2006.229.07:58:49.79#ibcon#enter sib2, iclass 4, count 0 2006.229.07:58:49.79#ibcon#flushed, iclass 4, count 0 2006.229.07:58:49.79#ibcon#about to write, iclass 4, count 0 2006.229.07:58:49.79#ibcon#wrote, iclass 4, count 0 2006.229.07:58:49.79#ibcon#about to read 3, iclass 4, count 0 2006.229.07:58:49.81#ibcon#read 3, iclass 4, count 0 2006.229.07:58:49.81#ibcon#about to read 4, iclass 4, count 0 2006.229.07:58:49.81#ibcon#read 4, iclass 4, count 0 2006.229.07:58:49.81#ibcon#about to read 5, iclass 4, count 0 2006.229.07:58:49.81#ibcon#read 5, iclass 4, count 0 2006.229.07:58:49.81#ibcon#about to read 6, iclass 4, count 0 2006.229.07:58:49.81#ibcon#read 6, iclass 4, count 0 2006.229.07:58:49.81#ibcon#end of sib2, iclass 4, count 0 2006.229.07:58:49.81#ibcon#*mode == 0, iclass 4, count 0 2006.229.07:58:49.81#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.07:58:49.81#ibcon#[27=USB\r\n] 2006.229.07:58:49.81#ibcon#*before write, iclass 4, count 0 2006.229.07:58:49.81#ibcon#enter sib2, iclass 4, count 0 2006.229.07:58:49.81#ibcon#flushed, iclass 4, count 0 2006.229.07:58:49.81#ibcon#about to write, iclass 4, count 0 2006.229.07:58:49.81#ibcon#wrote, iclass 4, count 0 2006.229.07:58:49.81#ibcon#about to read 3, iclass 4, count 0 2006.229.07:58:49.84#ibcon#read 3, iclass 4, count 0 2006.229.07:58:49.84#ibcon#about to read 4, iclass 4, count 0 2006.229.07:58:49.84#ibcon#read 4, iclass 4, count 0 2006.229.07:58:49.84#ibcon#about to read 5, iclass 4, count 0 2006.229.07:58:49.84#ibcon#read 5, iclass 4, count 0 2006.229.07:58:49.84#ibcon#about to read 6, iclass 4, count 0 2006.229.07:58:49.84#ibcon#read 6, iclass 4, count 0 2006.229.07:58:49.84#ibcon#end of sib2, iclass 4, count 0 2006.229.07:58:49.84#ibcon#*after write, iclass 4, count 0 2006.229.07:58:49.84#ibcon#*before return 0, iclass 4, count 0 2006.229.07:58:49.84#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:49.84#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.07:58:49.84#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.07:58:49.84#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.07:58:49.84$vck44/vblo=3,649.99 2006.229.07:58:49.84#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.07:58:49.84#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.07:58:49.84#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:49.84#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:49.84#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:49.84#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:49.84#ibcon#enter wrdev, iclass 6, count 0 2006.229.07:58:49.84#ibcon#first serial, iclass 6, count 0 2006.229.07:58:49.84#ibcon#enter sib2, iclass 6, count 0 2006.229.07:58:49.84#ibcon#flushed, iclass 6, count 0 2006.229.07:58:49.84#ibcon#about to write, iclass 6, count 0 2006.229.07:58:49.84#ibcon#wrote, iclass 6, count 0 2006.229.07:58:49.84#ibcon#about to read 3, iclass 6, count 0 2006.229.07:58:49.86#ibcon#read 3, iclass 6, count 0 2006.229.07:58:49.86#ibcon#about to read 4, iclass 6, count 0 2006.229.07:58:49.86#ibcon#read 4, iclass 6, count 0 2006.229.07:58:49.86#ibcon#about to read 5, iclass 6, count 0 2006.229.07:58:49.86#ibcon#read 5, iclass 6, count 0 2006.229.07:58:49.86#ibcon#about to read 6, iclass 6, count 0 2006.229.07:58:49.86#ibcon#read 6, iclass 6, count 0 2006.229.07:58:49.86#ibcon#end of sib2, iclass 6, count 0 2006.229.07:58:49.86#ibcon#*mode == 0, iclass 6, count 0 2006.229.07:58:49.86#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.07:58:49.86#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.07:58:49.86#ibcon#*before write, iclass 6, count 0 2006.229.07:58:49.86#ibcon#enter sib2, iclass 6, count 0 2006.229.07:58:49.86#ibcon#flushed, iclass 6, count 0 2006.229.07:58:49.86#ibcon#about to write, iclass 6, count 0 2006.229.07:58:49.86#ibcon#wrote, iclass 6, count 0 2006.229.07:58:49.86#ibcon#about to read 3, iclass 6, count 0 2006.229.07:58:49.90#ibcon#read 3, iclass 6, count 0 2006.229.07:58:49.90#ibcon#about to read 4, iclass 6, count 0 2006.229.07:58:49.90#ibcon#read 4, iclass 6, count 0 2006.229.07:58:49.90#ibcon#about to read 5, iclass 6, count 0 2006.229.07:58:49.90#ibcon#read 5, iclass 6, count 0 2006.229.07:58:49.90#ibcon#about to read 6, iclass 6, count 0 2006.229.07:58:49.90#ibcon#read 6, iclass 6, count 0 2006.229.07:58:49.90#ibcon#end of sib2, iclass 6, count 0 2006.229.07:58:49.90#ibcon#*after write, iclass 6, count 0 2006.229.07:58:49.90#ibcon#*before return 0, iclass 6, count 0 2006.229.07:58:49.90#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:49.90#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.07:58:49.90#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.07:58:49.90#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.07:58:49.90$vck44/vb=3,4 2006.229.07:58:49.90#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.07:58:49.90#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.07:58:49.90#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:49.90#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:49.96#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:49.96#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:49.96#ibcon#enter wrdev, iclass 10, count 2 2006.229.07:58:49.96#ibcon#first serial, iclass 10, count 2 2006.229.07:58:49.96#ibcon#enter sib2, iclass 10, count 2 2006.229.07:58:49.96#ibcon#flushed, iclass 10, count 2 2006.229.07:58:49.96#ibcon#about to write, iclass 10, count 2 2006.229.07:58:49.96#ibcon#wrote, iclass 10, count 2 2006.229.07:58:49.96#ibcon#about to read 3, iclass 10, count 2 2006.229.07:58:49.98#ibcon#read 3, iclass 10, count 2 2006.229.07:58:49.98#ibcon#about to read 4, iclass 10, count 2 2006.229.07:58:49.98#ibcon#read 4, iclass 10, count 2 2006.229.07:58:49.98#ibcon#about to read 5, iclass 10, count 2 2006.229.07:58:49.98#ibcon#read 5, iclass 10, count 2 2006.229.07:58:49.98#ibcon#about to read 6, iclass 10, count 2 2006.229.07:58:49.98#ibcon#read 6, iclass 10, count 2 2006.229.07:58:49.98#ibcon#end of sib2, iclass 10, count 2 2006.229.07:58:49.98#ibcon#*mode == 0, iclass 10, count 2 2006.229.07:58:49.98#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.07:58:49.98#ibcon#[27=AT03-04\r\n] 2006.229.07:58:49.98#ibcon#*before write, iclass 10, count 2 2006.229.07:58:49.98#ibcon#enter sib2, iclass 10, count 2 2006.229.07:58:49.98#ibcon#flushed, iclass 10, count 2 2006.229.07:58:49.98#ibcon#about to write, iclass 10, count 2 2006.229.07:58:49.98#ibcon#wrote, iclass 10, count 2 2006.229.07:58:49.98#ibcon#about to read 3, iclass 10, count 2 2006.229.07:58:50.01#ibcon#read 3, iclass 10, count 2 2006.229.07:58:50.01#ibcon#about to read 4, iclass 10, count 2 2006.229.07:58:50.01#ibcon#read 4, iclass 10, count 2 2006.229.07:58:50.01#ibcon#about to read 5, iclass 10, count 2 2006.229.07:58:50.01#ibcon#read 5, iclass 10, count 2 2006.229.07:58:50.01#ibcon#about to read 6, iclass 10, count 2 2006.229.07:58:50.01#ibcon#read 6, iclass 10, count 2 2006.229.07:58:50.01#ibcon#end of sib2, iclass 10, count 2 2006.229.07:58:50.01#ibcon#*after write, iclass 10, count 2 2006.229.07:58:50.01#ibcon#*before return 0, iclass 10, count 2 2006.229.07:58:50.01#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:50.01#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.07:58:50.01#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.07:58:50.01#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:50.01#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:50.13#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:50.13#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:50.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.07:58:50.13#ibcon#first serial, iclass 10, count 0 2006.229.07:58:50.13#ibcon#enter sib2, iclass 10, count 0 2006.229.07:58:50.13#ibcon#flushed, iclass 10, count 0 2006.229.07:58:50.13#ibcon#about to write, iclass 10, count 0 2006.229.07:58:50.13#ibcon#wrote, iclass 10, count 0 2006.229.07:58:50.13#ibcon#about to read 3, iclass 10, count 0 2006.229.07:58:50.15#ibcon#read 3, iclass 10, count 0 2006.229.07:58:50.15#ibcon#about to read 4, iclass 10, count 0 2006.229.07:58:50.15#ibcon#read 4, iclass 10, count 0 2006.229.07:58:50.15#ibcon#about to read 5, iclass 10, count 0 2006.229.07:58:50.15#ibcon#read 5, iclass 10, count 0 2006.229.07:58:50.15#ibcon#about to read 6, iclass 10, count 0 2006.229.07:58:50.15#ibcon#read 6, iclass 10, count 0 2006.229.07:58:50.15#ibcon#end of sib2, iclass 10, count 0 2006.229.07:58:50.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.07:58:50.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.07:58:50.15#ibcon#[27=USB\r\n] 2006.229.07:58:50.15#ibcon#*before write, iclass 10, count 0 2006.229.07:58:50.15#ibcon#enter sib2, iclass 10, count 0 2006.229.07:58:50.15#ibcon#flushed, iclass 10, count 0 2006.229.07:58:50.15#ibcon#about to write, iclass 10, count 0 2006.229.07:58:50.15#ibcon#wrote, iclass 10, count 0 2006.229.07:58:50.15#ibcon#about to read 3, iclass 10, count 0 2006.229.07:58:50.18#ibcon#read 3, iclass 10, count 0 2006.229.07:58:50.18#ibcon#about to read 4, iclass 10, count 0 2006.229.07:58:50.18#ibcon#read 4, iclass 10, count 0 2006.229.07:58:50.18#ibcon#about to read 5, iclass 10, count 0 2006.229.07:58:50.18#ibcon#read 5, iclass 10, count 0 2006.229.07:58:50.18#ibcon#about to read 6, iclass 10, count 0 2006.229.07:58:50.18#ibcon#read 6, iclass 10, count 0 2006.229.07:58:50.18#ibcon#end of sib2, iclass 10, count 0 2006.229.07:58:50.18#ibcon#*after write, iclass 10, count 0 2006.229.07:58:50.18#ibcon#*before return 0, iclass 10, count 0 2006.229.07:58:50.18#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:50.18#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.07:58:50.18#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.07:58:50.18#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.07:58:50.18$vck44/vblo=4,679.99 2006.229.07:58:50.18#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.07:58:50.18#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.07:58:50.18#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:50.18#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:50.18#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:50.18#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:50.18#ibcon#enter wrdev, iclass 12, count 0 2006.229.07:58:50.18#ibcon#first serial, iclass 12, count 0 2006.229.07:58:50.18#ibcon#enter sib2, iclass 12, count 0 2006.229.07:58:50.18#ibcon#flushed, iclass 12, count 0 2006.229.07:58:50.18#ibcon#about to write, iclass 12, count 0 2006.229.07:58:50.18#ibcon#wrote, iclass 12, count 0 2006.229.07:58:50.18#ibcon#about to read 3, iclass 12, count 0 2006.229.07:58:50.20#ibcon#read 3, iclass 12, count 0 2006.229.07:58:50.20#ibcon#about to read 4, iclass 12, count 0 2006.229.07:58:50.20#ibcon#read 4, iclass 12, count 0 2006.229.07:58:50.20#ibcon#about to read 5, iclass 12, count 0 2006.229.07:58:50.20#ibcon#read 5, iclass 12, count 0 2006.229.07:58:50.20#ibcon#about to read 6, iclass 12, count 0 2006.229.07:58:50.20#ibcon#read 6, iclass 12, count 0 2006.229.07:58:50.20#ibcon#end of sib2, iclass 12, count 0 2006.229.07:58:50.20#ibcon#*mode == 0, iclass 12, count 0 2006.229.07:58:50.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.07:58:50.20#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.07:58:50.20#ibcon#*before write, iclass 12, count 0 2006.229.07:58:50.20#ibcon#enter sib2, iclass 12, count 0 2006.229.07:58:50.20#ibcon#flushed, iclass 12, count 0 2006.229.07:58:50.20#ibcon#about to write, iclass 12, count 0 2006.229.07:58:50.20#ibcon#wrote, iclass 12, count 0 2006.229.07:58:50.20#ibcon#about to read 3, iclass 12, count 0 2006.229.07:58:50.24#ibcon#read 3, iclass 12, count 0 2006.229.07:58:50.24#ibcon#about to read 4, iclass 12, count 0 2006.229.07:58:50.24#ibcon#read 4, iclass 12, count 0 2006.229.07:58:50.24#ibcon#about to read 5, iclass 12, count 0 2006.229.07:58:50.24#ibcon#read 5, iclass 12, count 0 2006.229.07:58:50.24#ibcon#about to read 6, iclass 12, count 0 2006.229.07:58:50.24#ibcon#read 6, iclass 12, count 0 2006.229.07:58:50.24#ibcon#end of sib2, iclass 12, count 0 2006.229.07:58:50.24#ibcon#*after write, iclass 12, count 0 2006.229.07:58:50.24#ibcon#*before return 0, iclass 12, count 0 2006.229.07:58:50.24#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:50.24#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.07:58:50.24#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.07:58:50.24#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.07:58:50.24$vck44/vb=4,4 2006.229.07:58:50.24#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.07:58:50.24#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.07:58:50.24#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:50.24#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:50.30#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:50.30#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:50.30#ibcon#enter wrdev, iclass 14, count 2 2006.229.07:58:50.30#ibcon#first serial, iclass 14, count 2 2006.229.07:58:50.30#ibcon#enter sib2, iclass 14, count 2 2006.229.07:58:50.30#ibcon#flushed, iclass 14, count 2 2006.229.07:58:50.30#ibcon#about to write, iclass 14, count 2 2006.229.07:58:50.30#ibcon#wrote, iclass 14, count 2 2006.229.07:58:50.30#ibcon#about to read 3, iclass 14, count 2 2006.229.07:58:50.32#ibcon#read 3, iclass 14, count 2 2006.229.07:58:50.32#ibcon#about to read 4, iclass 14, count 2 2006.229.07:58:50.32#ibcon#read 4, iclass 14, count 2 2006.229.07:58:50.32#ibcon#about to read 5, iclass 14, count 2 2006.229.07:58:50.32#ibcon#read 5, iclass 14, count 2 2006.229.07:58:50.32#ibcon#about to read 6, iclass 14, count 2 2006.229.07:58:50.32#ibcon#read 6, iclass 14, count 2 2006.229.07:58:50.32#ibcon#end of sib2, iclass 14, count 2 2006.229.07:58:50.32#ibcon#*mode == 0, iclass 14, count 2 2006.229.07:58:50.32#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.07:58:50.32#ibcon#[27=AT04-04\r\n] 2006.229.07:58:50.32#ibcon#*before write, iclass 14, count 2 2006.229.07:58:50.32#ibcon#enter sib2, iclass 14, count 2 2006.229.07:58:50.32#ibcon#flushed, iclass 14, count 2 2006.229.07:58:50.32#ibcon#about to write, iclass 14, count 2 2006.229.07:58:50.32#ibcon#wrote, iclass 14, count 2 2006.229.07:58:50.32#ibcon#about to read 3, iclass 14, count 2 2006.229.07:58:50.35#ibcon#read 3, iclass 14, count 2 2006.229.07:58:50.35#ibcon#about to read 4, iclass 14, count 2 2006.229.07:58:50.35#ibcon#read 4, iclass 14, count 2 2006.229.07:58:50.35#ibcon#about to read 5, iclass 14, count 2 2006.229.07:58:50.35#ibcon#read 5, iclass 14, count 2 2006.229.07:58:50.35#ibcon#about to read 6, iclass 14, count 2 2006.229.07:58:50.35#ibcon#read 6, iclass 14, count 2 2006.229.07:58:50.35#ibcon#end of sib2, iclass 14, count 2 2006.229.07:58:50.35#ibcon#*after write, iclass 14, count 2 2006.229.07:58:50.35#ibcon#*before return 0, iclass 14, count 2 2006.229.07:58:50.35#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:50.35#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.07:58:50.35#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.07:58:50.35#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:50.35#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:50.47#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:50.47#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:50.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.07:58:50.47#ibcon#first serial, iclass 14, count 0 2006.229.07:58:50.47#ibcon#enter sib2, iclass 14, count 0 2006.229.07:58:50.47#ibcon#flushed, iclass 14, count 0 2006.229.07:58:50.47#ibcon#about to write, iclass 14, count 0 2006.229.07:58:50.47#ibcon#wrote, iclass 14, count 0 2006.229.07:58:50.47#ibcon#about to read 3, iclass 14, count 0 2006.229.07:58:50.49#ibcon#read 3, iclass 14, count 0 2006.229.07:58:50.49#ibcon#about to read 4, iclass 14, count 0 2006.229.07:58:50.49#ibcon#read 4, iclass 14, count 0 2006.229.07:58:50.49#ibcon#about to read 5, iclass 14, count 0 2006.229.07:58:50.49#ibcon#read 5, iclass 14, count 0 2006.229.07:58:50.49#ibcon#about to read 6, iclass 14, count 0 2006.229.07:58:50.49#ibcon#read 6, iclass 14, count 0 2006.229.07:58:50.49#ibcon#end of sib2, iclass 14, count 0 2006.229.07:58:50.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.07:58:50.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.07:58:50.49#ibcon#[27=USB\r\n] 2006.229.07:58:50.49#ibcon#*before write, iclass 14, count 0 2006.229.07:58:50.49#ibcon#enter sib2, iclass 14, count 0 2006.229.07:58:50.49#ibcon#flushed, iclass 14, count 0 2006.229.07:58:50.49#ibcon#about to write, iclass 14, count 0 2006.229.07:58:50.49#ibcon#wrote, iclass 14, count 0 2006.229.07:58:50.49#ibcon#about to read 3, iclass 14, count 0 2006.229.07:58:50.52#ibcon#read 3, iclass 14, count 0 2006.229.07:58:50.52#ibcon#about to read 4, iclass 14, count 0 2006.229.07:58:50.52#ibcon#read 4, iclass 14, count 0 2006.229.07:58:50.52#ibcon#about to read 5, iclass 14, count 0 2006.229.07:58:50.52#ibcon#read 5, iclass 14, count 0 2006.229.07:58:50.52#ibcon#about to read 6, iclass 14, count 0 2006.229.07:58:50.52#ibcon#read 6, iclass 14, count 0 2006.229.07:58:50.52#ibcon#end of sib2, iclass 14, count 0 2006.229.07:58:50.52#ibcon#*after write, iclass 14, count 0 2006.229.07:58:50.52#ibcon#*before return 0, iclass 14, count 0 2006.229.07:58:50.52#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:50.52#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.07:58:50.52#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.07:58:50.52#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.07:58:50.52$vck44/vblo=5,709.99 2006.229.07:58:50.52#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.07:58:50.52#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.07:58:50.52#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:50.52#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:50.52#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:50.52#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:50.52#ibcon#enter wrdev, iclass 16, count 0 2006.229.07:58:50.52#ibcon#first serial, iclass 16, count 0 2006.229.07:58:50.52#ibcon#enter sib2, iclass 16, count 0 2006.229.07:58:50.52#ibcon#flushed, iclass 16, count 0 2006.229.07:58:50.52#ibcon#about to write, iclass 16, count 0 2006.229.07:58:50.52#ibcon#wrote, iclass 16, count 0 2006.229.07:58:50.52#ibcon#about to read 3, iclass 16, count 0 2006.229.07:58:50.54#ibcon#read 3, iclass 16, count 0 2006.229.07:58:50.54#ibcon#about to read 4, iclass 16, count 0 2006.229.07:58:50.54#ibcon#read 4, iclass 16, count 0 2006.229.07:58:50.54#ibcon#about to read 5, iclass 16, count 0 2006.229.07:58:50.54#ibcon#read 5, iclass 16, count 0 2006.229.07:58:50.54#ibcon#about to read 6, iclass 16, count 0 2006.229.07:58:50.54#ibcon#read 6, iclass 16, count 0 2006.229.07:58:50.54#ibcon#end of sib2, iclass 16, count 0 2006.229.07:58:50.54#ibcon#*mode == 0, iclass 16, count 0 2006.229.07:58:50.54#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.07:58:50.54#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.07:58:50.54#ibcon#*before write, iclass 16, count 0 2006.229.07:58:50.54#ibcon#enter sib2, iclass 16, count 0 2006.229.07:58:50.54#ibcon#flushed, iclass 16, count 0 2006.229.07:58:50.54#ibcon#about to write, iclass 16, count 0 2006.229.07:58:50.54#ibcon#wrote, iclass 16, count 0 2006.229.07:58:50.54#ibcon#about to read 3, iclass 16, count 0 2006.229.07:58:50.58#ibcon#read 3, iclass 16, count 0 2006.229.07:58:50.58#ibcon#about to read 4, iclass 16, count 0 2006.229.07:58:50.58#ibcon#read 4, iclass 16, count 0 2006.229.07:58:50.58#ibcon#about to read 5, iclass 16, count 0 2006.229.07:58:50.58#ibcon#read 5, iclass 16, count 0 2006.229.07:58:50.58#ibcon#about to read 6, iclass 16, count 0 2006.229.07:58:50.58#ibcon#read 6, iclass 16, count 0 2006.229.07:58:50.58#ibcon#end of sib2, iclass 16, count 0 2006.229.07:58:50.58#ibcon#*after write, iclass 16, count 0 2006.229.07:58:50.58#ibcon#*before return 0, iclass 16, count 0 2006.229.07:58:50.58#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:50.58#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.07:58:50.58#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.07:58:50.58#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.07:58:50.58$vck44/vb=5,4 2006.229.07:58:50.58#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.07:58:50.58#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.07:58:50.58#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:50.58#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:50.64#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:50.64#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:50.64#ibcon#enter wrdev, iclass 18, count 2 2006.229.07:58:50.64#ibcon#first serial, iclass 18, count 2 2006.229.07:58:50.64#ibcon#enter sib2, iclass 18, count 2 2006.229.07:58:50.64#ibcon#flushed, iclass 18, count 2 2006.229.07:58:50.64#ibcon#about to write, iclass 18, count 2 2006.229.07:58:50.64#ibcon#wrote, iclass 18, count 2 2006.229.07:58:50.64#ibcon#about to read 3, iclass 18, count 2 2006.229.07:58:50.66#ibcon#read 3, iclass 18, count 2 2006.229.07:58:50.66#ibcon#about to read 4, iclass 18, count 2 2006.229.07:58:50.66#ibcon#read 4, iclass 18, count 2 2006.229.07:58:50.66#ibcon#about to read 5, iclass 18, count 2 2006.229.07:58:50.66#ibcon#read 5, iclass 18, count 2 2006.229.07:58:50.66#ibcon#about to read 6, iclass 18, count 2 2006.229.07:58:50.66#ibcon#read 6, iclass 18, count 2 2006.229.07:58:50.66#ibcon#end of sib2, iclass 18, count 2 2006.229.07:58:50.66#ibcon#*mode == 0, iclass 18, count 2 2006.229.07:58:50.66#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.07:58:50.66#ibcon#[27=AT05-04\r\n] 2006.229.07:58:50.66#ibcon#*before write, iclass 18, count 2 2006.229.07:58:50.66#ibcon#enter sib2, iclass 18, count 2 2006.229.07:58:50.66#ibcon#flushed, iclass 18, count 2 2006.229.07:58:50.66#ibcon#about to write, iclass 18, count 2 2006.229.07:58:50.66#ibcon#wrote, iclass 18, count 2 2006.229.07:58:50.66#ibcon#about to read 3, iclass 18, count 2 2006.229.07:58:50.69#ibcon#read 3, iclass 18, count 2 2006.229.07:58:50.69#ibcon#about to read 4, iclass 18, count 2 2006.229.07:58:50.69#ibcon#read 4, iclass 18, count 2 2006.229.07:58:50.69#ibcon#about to read 5, iclass 18, count 2 2006.229.07:58:50.69#ibcon#read 5, iclass 18, count 2 2006.229.07:58:50.69#ibcon#about to read 6, iclass 18, count 2 2006.229.07:58:50.69#ibcon#read 6, iclass 18, count 2 2006.229.07:58:50.69#ibcon#end of sib2, iclass 18, count 2 2006.229.07:58:50.69#ibcon#*after write, iclass 18, count 2 2006.229.07:58:50.69#ibcon#*before return 0, iclass 18, count 2 2006.229.07:58:50.69#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:50.69#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.07:58:50.69#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.07:58:50.69#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:50.69#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:50.81#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:50.81#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:50.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.07:58:50.81#ibcon#first serial, iclass 18, count 0 2006.229.07:58:50.81#ibcon#enter sib2, iclass 18, count 0 2006.229.07:58:50.81#ibcon#flushed, iclass 18, count 0 2006.229.07:58:50.81#ibcon#about to write, iclass 18, count 0 2006.229.07:58:50.81#ibcon#wrote, iclass 18, count 0 2006.229.07:58:50.81#ibcon#about to read 3, iclass 18, count 0 2006.229.07:58:50.83#ibcon#read 3, iclass 18, count 0 2006.229.07:58:50.83#ibcon#about to read 4, iclass 18, count 0 2006.229.07:58:50.83#ibcon#read 4, iclass 18, count 0 2006.229.07:58:50.83#ibcon#about to read 5, iclass 18, count 0 2006.229.07:58:50.83#ibcon#read 5, iclass 18, count 0 2006.229.07:58:50.83#ibcon#about to read 6, iclass 18, count 0 2006.229.07:58:50.83#ibcon#read 6, iclass 18, count 0 2006.229.07:58:50.83#ibcon#end of sib2, iclass 18, count 0 2006.229.07:58:50.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.07:58:50.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.07:58:50.83#ibcon#[27=USB\r\n] 2006.229.07:58:50.83#ibcon#*before write, iclass 18, count 0 2006.229.07:58:50.83#ibcon#enter sib2, iclass 18, count 0 2006.229.07:58:50.83#ibcon#flushed, iclass 18, count 0 2006.229.07:58:50.83#ibcon#about to write, iclass 18, count 0 2006.229.07:58:50.83#ibcon#wrote, iclass 18, count 0 2006.229.07:58:50.83#ibcon#about to read 3, iclass 18, count 0 2006.229.07:58:50.86#ibcon#read 3, iclass 18, count 0 2006.229.07:58:50.86#ibcon#about to read 4, iclass 18, count 0 2006.229.07:58:50.86#ibcon#read 4, iclass 18, count 0 2006.229.07:58:50.86#ibcon#about to read 5, iclass 18, count 0 2006.229.07:58:50.86#ibcon#read 5, iclass 18, count 0 2006.229.07:58:50.86#ibcon#about to read 6, iclass 18, count 0 2006.229.07:58:50.86#ibcon#read 6, iclass 18, count 0 2006.229.07:58:50.86#ibcon#end of sib2, iclass 18, count 0 2006.229.07:58:50.86#ibcon#*after write, iclass 18, count 0 2006.229.07:58:50.86#ibcon#*before return 0, iclass 18, count 0 2006.229.07:58:50.86#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:50.86#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.07:58:50.86#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.07:58:50.86#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.07:58:50.86$vck44/vblo=6,719.99 2006.229.07:58:50.86#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.07:58:50.86#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.07:58:50.86#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:50.86#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:50.86#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:50.86#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:50.86#ibcon#enter wrdev, iclass 20, count 0 2006.229.07:58:50.86#ibcon#first serial, iclass 20, count 0 2006.229.07:58:50.86#ibcon#enter sib2, iclass 20, count 0 2006.229.07:58:50.86#ibcon#flushed, iclass 20, count 0 2006.229.07:58:50.86#ibcon#about to write, iclass 20, count 0 2006.229.07:58:50.86#ibcon#wrote, iclass 20, count 0 2006.229.07:58:50.86#ibcon#about to read 3, iclass 20, count 0 2006.229.07:58:50.88#ibcon#read 3, iclass 20, count 0 2006.229.07:58:50.88#ibcon#about to read 4, iclass 20, count 0 2006.229.07:58:50.88#ibcon#read 4, iclass 20, count 0 2006.229.07:58:50.88#ibcon#about to read 5, iclass 20, count 0 2006.229.07:58:50.88#ibcon#read 5, iclass 20, count 0 2006.229.07:58:50.88#ibcon#about to read 6, iclass 20, count 0 2006.229.07:58:50.88#ibcon#read 6, iclass 20, count 0 2006.229.07:58:50.88#ibcon#end of sib2, iclass 20, count 0 2006.229.07:58:50.88#ibcon#*mode == 0, iclass 20, count 0 2006.229.07:58:50.88#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.07:58:50.88#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.07:58:50.88#ibcon#*before write, iclass 20, count 0 2006.229.07:58:50.88#ibcon#enter sib2, iclass 20, count 0 2006.229.07:58:50.88#ibcon#flushed, iclass 20, count 0 2006.229.07:58:50.88#ibcon#about to write, iclass 20, count 0 2006.229.07:58:50.88#ibcon#wrote, iclass 20, count 0 2006.229.07:58:50.88#ibcon#about to read 3, iclass 20, count 0 2006.229.07:58:50.92#ibcon#read 3, iclass 20, count 0 2006.229.07:58:50.92#ibcon#about to read 4, iclass 20, count 0 2006.229.07:58:50.92#ibcon#read 4, iclass 20, count 0 2006.229.07:58:50.92#ibcon#about to read 5, iclass 20, count 0 2006.229.07:58:50.92#ibcon#read 5, iclass 20, count 0 2006.229.07:58:50.92#ibcon#about to read 6, iclass 20, count 0 2006.229.07:58:50.92#ibcon#read 6, iclass 20, count 0 2006.229.07:58:50.92#ibcon#end of sib2, iclass 20, count 0 2006.229.07:58:50.92#ibcon#*after write, iclass 20, count 0 2006.229.07:58:50.92#ibcon#*before return 0, iclass 20, count 0 2006.229.07:58:50.92#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:50.92#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.07:58:50.92#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.07:58:50.92#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.07:58:50.92$vck44/vb=6,4 2006.229.07:58:50.92#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.07:58:50.92#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.07:58:50.92#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:50.92#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:50.98#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:50.98#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:50.98#ibcon#enter wrdev, iclass 22, count 2 2006.229.07:58:50.98#ibcon#first serial, iclass 22, count 2 2006.229.07:58:50.98#ibcon#enter sib2, iclass 22, count 2 2006.229.07:58:50.98#ibcon#flushed, iclass 22, count 2 2006.229.07:58:50.98#ibcon#about to write, iclass 22, count 2 2006.229.07:58:50.98#ibcon#wrote, iclass 22, count 2 2006.229.07:58:50.98#ibcon#about to read 3, iclass 22, count 2 2006.229.07:58:51.00#ibcon#read 3, iclass 22, count 2 2006.229.07:58:51.00#ibcon#about to read 4, iclass 22, count 2 2006.229.07:58:51.00#ibcon#read 4, iclass 22, count 2 2006.229.07:58:51.00#ibcon#about to read 5, iclass 22, count 2 2006.229.07:58:51.00#ibcon#read 5, iclass 22, count 2 2006.229.07:58:51.00#ibcon#about to read 6, iclass 22, count 2 2006.229.07:58:51.00#ibcon#read 6, iclass 22, count 2 2006.229.07:58:51.00#ibcon#end of sib2, iclass 22, count 2 2006.229.07:58:51.00#ibcon#*mode == 0, iclass 22, count 2 2006.229.07:58:51.00#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.07:58:51.00#ibcon#[27=AT06-04\r\n] 2006.229.07:58:51.00#ibcon#*before write, iclass 22, count 2 2006.229.07:58:51.00#ibcon#enter sib2, iclass 22, count 2 2006.229.07:58:51.00#ibcon#flushed, iclass 22, count 2 2006.229.07:58:51.00#ibcon#about to write, iclass 22, count 2 2006.229.07:58:51.00#ibcon#wrote, iclass 22, count 2 2006.229.07:58:51.00#ibcon#about to read 3, iclass 22, count 2 2006.229.07:58:51.03#ibcon#read 3, iclass 22, count 2 2006.229.07:58:51.03#ibcon#about to read 4, iclass 22, count 2 2006.229.07:58:51.03#ibcon#read 4, iclass 22, count 2 2006.229.07:58:51.03#ibcon#about to read 5, iclass 22, count 2 2006.229.07:58:51.03#ibcon#read 5, iclass 22, count 2 2006.229.07:58:51.03#ibcon#about to read 6, iclass 22, count 2 2006.229.07:58:51.03#ibcon#read 6, iclass 22, count 2 2006.229.07:58:51.03#ibcon#end of sib2, iclass 22, count 2 2006.229.07:58:51.03#ibcon#*after write, iclass 22, count 2 2006.229.07:58:51.03#ibcon#*before return 0, iclass 22, count 2 2006.229.07:58:51.03#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:51.03#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.07:58:51.03#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.07:58:51.03#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:51.03#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:51.15#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:51.15#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:51.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.07:58:51.15#ibcon#first serial, iclass 22, count 0 2006.229.07:58:51.15#ibcon#enter sib2, iclass 22, count 0 2006.229.07:58:51.15#ibcon#flushed, iclass 22, count 0 2006.229.07:58:51.15#ibcon#about to write, iclass 22, count 0 2006.229.07:58:51.15#ibcon#wrote, iclass 22, count 0 2006.229.07:58:51.15#ibcon#about to read 3, iclass 22, count 0 2006.229.07:58:51.17#ibcon#read 3, iclass 22, count 0 2006.229.07:58:51.17#ibcon#about to read 4, iclass 22, count 0 2006.229.07:58:51.17#ibcon#read 4, iclass 22, count 0 2006.229.07:58:51.17#ibcon#about to read 5, iclass 22, count 0 2006.229.07:58:51.17#ibcon#read 5, iclass 22, count 0 2006.229.07:58:51.17#ibcon#about to read 6, iclass 22, count 0 2006.229.07:58:51.17#ibcon#read 6, iclass 22, count 0 2006.229.07:58:51.17#ibcon#end of sib2, iclass 22, count 0 2006.229.07:58:51.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.07:58:51.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.07:58:51.17#ibcon#[27=USB\r\n] 2006.229.07:58:51.17#ibcon#*before write, iclass 22, count 0 2006.229.07:58:51.17#ibcon#enter sib2, iclass 22, count 0 2006.229.07:58:51.17#ibcon#flushed, iclass 22, count 0 2006.229.07:58:51.17#ibcon#about to write, iclass 22, count 0 2006.229.07:58:51.17#ibcon#wrote, iclass 22, count 0 2006.229.07:58:51.17#ibcon#about to read 3, iclass 22, count 0 2006.229.07:58:51.20#ibcon#read 3, iclass 22, count 0 2006.229.07:58:51.20#ibcon#about to read 4, iclass 22, count 0 2006.229.07:58:51.20#ibcon#read 4, iclass 22, count 0 2006.229.07:58:51.20#ibcon#about to read 5, iclass 22, count 0 2006.229.07:58:51.20#ibcon#read 5, iclass 22, count 0 2006.229.07:58:51.20#ibcon#about to read 6, iclass 22, count 0 2006.229.07:58:51.20#ibcon#read 6, iclass 22, count 0 2006.229.07:58:51.20#ibcon#end of sib2, iclass 22, count 0 2006.229.07:58:51.20#ibcon#*after write, iclass 22, count 0 2006.229.07:58:51.20#ibcon#*before return 0, iclass 22, count 0 2006.229.07:58:51.20#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:51.20#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.07:58:51.20#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.07:58:51.20#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.07:58:51.20$vck44/vblo=7,734.99 2006.229.07:58:51.20#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.07:58:51.20#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.07:58:51.20#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:51.20#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:51.20#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:51.20#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:51.20#ibcon#enter wrdev, iclass 24, count 0 2006.229.07:58:51.20#ibcon#first serial, iclass 24, count 0 2006.229.07:58:51.20#ibcon#enter sib2, iclass 24, count 0 2006.229.07:58:51.20#ibcon#flushed, iclass 24, count 0 2006.229.07:58:51.20#ibcon#about to write, iclass 24, count 0 2006.229.07:58:51.20#ibcon#wrote, iclass 24, count 0 2006.229.07:58:51.20#ibcon#about to read 3, iclass 24, count 0 2006.229.07:58:51.22#ibcon#read 3, iclass 24, count 0 2006.229.07:58:51.22#ibcon#about to read 4, iclass 24, count 0 2006.229.07:58:51.22#ibcon#read 4, iclass 24, count 0 2006.229.07:58:51.22#ibcon#about to read 5, iclass 24, count 0 2006.229.07:58:51.22#ibcon#read 5, iclass 24, count 0 2006.229.07:58:51.22#ibcon#about to read 6, iclass 24, count 0 2006.229.07:58:51.22#ibcon#read 6, iclass 24, count 0 2006.229.07:58:51.22#ibcon#end of sib2, iclass 24, count 0 2006.229.07:58:51.22#ibcon#*mode == 0, iclass 24, count 0 2006.229.07:58:51.22#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.07:58:51.22#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.07:58:51.22#ibcon#*before write, iclass 24, count 0 2006.229.07:58:51.22#ibcon#enter sib2, iclass 24, count 0 2006.229.07:58:51.22#ibcon#flushed, iclass 24, count 0 2006.229.07:58:51.22#ibcon#about to write, iclass 24, count 0 2006.229.07:58:51.22#ibcon#wrote, iclass 24, count 0 2006.229.07:58:51.22#ibcon#about to read 3, iclass 24, count 0 2006.229.07:58:51.26#ibcon#read 3, iclass 24, count 0 2006.229.07:58:51.26#ibcon#about to read 4, iclass 24, count 0 2006.229.07:58:51.26#ibcon#read 4, iclass 24, count 0 2006.229.07:58:51.26#ibcon#about to read 5, iclass 24, count 0 2006.229.07:58:51.26#ibcon#read 5, iclass 24, count 0 2006.229.07:58:51.26#ibcon#about to read 6, iclass 24, count 0 2006.229.07:58:51.26#ibcon#read 6, iclass 24, count 0 2006.229.07:58:51.26#ibcon#end of sib2, iclass 24, count 0 2006.229.07:58:51.26#ibcon#*after write, iclass 24, count 0 2006.229.07:58:51.26#ibcon#*before return 0, iclass 24, count 0 2006.229.07:58:51.26#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:51.26#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.07:58:51.26#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.07:58:51.26#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.07:58:51.26$vck44/vb=7,4 2006.229.07:58:51.26#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.07:58:51.26#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.07:58:51.26#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:51.26#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:51.32#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:51.32#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:51.32#ibcon#enter wrdev, iclass 26, count 2 2006.229.07:58:51.32#ibcon#first serial, iclass 26, count 2 2006.229.07:58:51.32#ibcon#enter sib2, iclass 26, count 2 2006.229.07:58:51.32#ibcon#flushed, iclass 26, count 2 2006.229.07:58:51.32#ibcon#about to write, iclass 26, count 2 2006.229.07:58:51.32#ibcon#wrote, iclass 26, count 2 2006.229.07:58:51.32#ibcon#about to read 3, iclass 26, count 2 2006.229.07:58:51.34#ibcon#read 3, iclass 26, count 2 2006.229.07:58:51.34#ibcon#about to read 4, iclass 26, count 2 2006.229.07:58:51.34#ibcon#read 4, iclass 26, count 2 2006.229.07:58:51.34#ibcon#about to read 5, iclass 26, count 2 2006.229.07:58:51.34#ibcon#read 5, iclass 26, count 2 2006.229.07:58:51.34#ibcon#about to read 6, iclass 26, count 2 2006.229.07:58:51.34#ibcon#read 6, iclass 26, count 2 2006.229.07:58:51.34#ibcon#end of sib2, iclass 26, count 2 2006.229.07:58:51.34#ibcon#*mode == 0, iclass 26, count 2 2006.229.07:58:51.34#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.07:58:51.34#ibcon#[27=AT07-04\r\n] 2006.229.07:58:51.34#ibcon#*before write, iclass 26, count 2 2006.229.07:58:51.34#ibcon#enter sib2, iclass 26, count 2 2006.229.07:58:51.34#ibcon#flushed, iclass 26, count 2 2006.229.07:58:51.34#ibcon#about to write, iclass 26, count 2 2006.229.07:58:51.34#ibcon#wrote, iclass 26, count 2 2006.229.07:58:51.34#ibcon#about to read 3, iclass 26, count 2 2006.229.07:58:51.37#ibcon#read 3, iclass 26, count 2 2006.229.07:58:51.37#ibcon#about to read 4, iclass 26, count 2 2006.229.07:58:51.37#ibcon#read 4, iclass 26, count 2 2006.229.07:58:51.37#ibcon#about to read 5, iclass 26, count 2 2006.229.07:58:51.37#ibcon#read 5, iclass 26, count 2 2006.229.07:58:51.37#ibcon#about to read 6, iclass 26, count 2 2006.229.07:58:51.37#ibcon#read 6, iclass 26, count 2 2006.229.07:58:51.37#ibcon#end of sib2, iclass 26, count 2 2006.229.07:58:51.37#ibcon#*after write, iclass 26, count 2 2006.229.07:58:51.37#ibcon#*before return 0, iclass 26, count 2 2006.229.07:58:51.37#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:51.37#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.07:58:51.37#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.07:58:51.37#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:51.37#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:51.49#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:51.49#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:51.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.07:58:51.49#ibcon#first serial, iclass 26, count 0 2006.229.07:58:51.49#ibcon#enter sib2, iclass 26, count 0 2006.229.07:58:51.49#ibcon#flushed, iclass 26, count 0 2006.229.07:58:51.49#ibcon#about to write, iclass 26, count 0 2006.229.07:58:51.49#ibcon#wrote, iclass 26, count 0 2006.229.07:58:51.49#ibcon#about to read 3, iclass 26, count 0 2006.229.07:58:51.51#ibcon#read 3, iclass 26, count 0 2006.229.07:58:51.51#ibcon#about to read 4, iclass 26, count 0 2006.229.07:58:51.51#ibcon#read 4, iclass 26, count 0 2006.229.07:58:51.51#ibcon#about to read 5, iclass 26, count 0 2006.229.07:58:51.51#ibcon#read 5, iclass 26, count 0 2006.229.07:58:51.51#ibcon#about to read 6, iclass 26, count 0 2006.229.07:58:51.51#ibcon#read 6, iclass 26, count 0 2006.229.07:58:51.51#ibcon#end of sib2, iclass 26, count 0 2006.229.07:58:51.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.07:58:51.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.07:58:51.51#ibcon#[27=USB\r\n] 2006.229.07:58:51.51#ibcon#*before write, iclass 26, count 0 2006.229.07:58:51.51#ibcon#enter sib2, iclass 26, count 0 2006.229.07:58:51.51#ibcon#flushed, iclass 26, count 0 2006.229.07:58:51.51#ibcon#about to write, iclass 26, count 0 2006.229.07:58:51.51#ibcon#wrote, iclass 26, count 0 2006.229.07:58:51.51#ibcon#about to read 3, iclass 26, count 0 2006.229.07:58:51.54#ibcon#read 3, iclass 26, count 0 2006.229.07:58:51.54#ibcon#about to read 4, iclass 26, count 0 2006.229.07:58:51.54#ibcon#read 4, iclass 26, count 0 2006.229.07:58:51.54#ibcon#about to read 5, iclass 26, count 0 2006.229.07:58:51.54#ibcon#read 5, iclass 26, count 0 2006.229.07:58:51.54#ibcon#about to read 6, iclass 26, count 0 2006.229.07:58:51.54#ibcon#read 6, iclass 26, count 0 2006.229.07:58:51.54#ibcon#end of sib2, iclass 26, count 0 2006.229.07:58:51.54#ibcon#*after write, iclass 26, count 0 2006.229.07:58:51.54#ibcon#*before return 0, iclass 26, count 0 2006.229.07:58:51.54#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:51.54#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.07:58:51.54#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.07:58:51.54#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.07:58:51.54$vck44/vblo=8,744.99 2006.229.07:58:51.54#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.07:58:51.54#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.07:58:51.54#ibcon#ireg 17 cls_cnt 0 2006.229.07:58:51.54#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:51.54#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:51.54#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:51.54#ibcon#enter wrdev, iclass 28, count 0 2006.229.07:58:51.54#ibcon#first serial, iclass 28, count 0 2006.229.07:58:51.54#ibcon#enter sib2, iclass 28, count 0 2006.229.07:58:51.54#ibcon#flushed, iclass 28, count 0 2006.229.07:58:51.54#ibcon#about to write, iclass 28, count 0 2006.229.07:58:51.54#ibcon#wrote, iclass 28, count 0 2006.229.07:58:51.54#ibcon#about to read 3, iclass 28, count 0 2006.229.07:58:51.56#ibcon#read 3, iclass 28, count 0 2006.229.07:58:51.56#ibcon#about to read 4, iclass 28, count 0 2006.229.07:58:51.56#ibcon#read 4, iclass 28, count 0 2006.229.07:58:51.56#ibcon#about to read 5, iclass 28, count 0 2006.229.07:58:51.56#ibcon#read 5, iclass 28, count 0 2006.229.07:58:51.56#ibcon#about to read 6, iclass 28, count 0 2006.229.07:58:51.56#ibcon#read 6, iclass 28, count 0 2006.229.07:58:51.56#ibcon#end of sib2, iclass 28, count 0 2006.229.07:58:51.56#ibcon#*mode == 0, iclass 28, count 0 2006.229.07:58:51.56#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.07:58:51.56#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.07:58:51.56#ibcon#*before write, iclass 28, count 0 2006.229.07:58:51.56#ibcon#enter sib2, iclass 28, count 0 2006.229.07:58:51.56#ibcon#flushed, iclass 28, count 0 2006.229.07:58:51.56#ibcon#about to write, iclass 28, count 0 2006.229.07:58:51.56#ibcon#wrote, iclass 28, count 0 2006.229.07:58:51.56#ibcon#about to read 3, iclass 28, count 0 2006.229.07:58:51.60#ibcon#read 3, iclass 28, count 0 2006.229.07:58:51.60#ibcon#about to read 4, iclass 28, count 0 2006.229.07:58:51.60#ibcon#read 4, iclass 28, count 0 2006.229.07:58:51.60#ibcon#about to read 5, iclass 28, count 0 2006.229.07:58:51.60#ibcon#read 5, iclass 28, count 0 2006.229.07:58:51.60#ibcon#about to read 6, iclass 28, count 0 2006.229.07:58:51.60#ibcon#read 6, iclass 28, count 0 2006.229.07:58:51.60#ibcon#end of sib2, iclass 28, count 0 2006.229.07:58:51.60#ibcon#*after write, iclass 28, count 0 2006.229.07:58:51.60#ibcon#*before return 0, iclass 28, count 0 2006.229.07:58:51.60#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:51.60#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.07:58:51.60#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.07:58:51.60#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.07:58:51.60$vck44/vb=8,4 2006.229.07:58:51.60#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.07:58:51.60#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.07:58:51.60#ibcon#ireg 11 cls_cnt 2 2006.229.07:58:51.60#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:51.66#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:51.66#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:51.66#ibcon#enter wrdev, iclass 30, count 2 2006.229.07:58:51.66#ibcon#first serial, iclass 30, count 2 2006.229.07:58:51.66#ibcon#enter sib2, iclass 30, count 2 2006.229.07:58:51.66#ibcon#flushed, iclass 30, count 2 2006.229.07:58:51.66#ibcon#about to write, iclass 30, count 2 2006.229.07:58:51.66#ibcon#wrote, iclass 30, count 2 2006.229.07:58:51.66#ibcon#about to read 3, iclass 30, count 2 2006.229.07:58:51.68#ibcon#read 3, iclass 30, count 2 2006.229.07:58:51.68#ibcon#about to read 4, iclass 30, count 2 2006.229.07:58:51.68#ibcon#read 4, iclass 30, count 2 2006.229.07:58:51.68#ibcon#about to read 5, iclass 30, count 2 2006.229.07:58:51.68#ibcon#read 5, iclass 30, count 2 2006.229.07:58:51.68#ibcon#about to read 6, iclass 30, count 2 2006.229.07:58:51.68#ibcon#read 6, iclass 30, count 2 2006.229.07:58:51.68#ibcon#end of sib2, iclass 30, count 2 2006.229.07:58:51.68#ibcon#*mode == 0, iclass 30, count 2 2006.229.07:58:51.68#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.07:58:51.68#ibcon#[27=AT08-04\r\n] 2006.229.07:58:51.68#ibcon#*before write, iclass 30, count 2 2006.229.07:58:51.68#ibcon#enter sib2, iclass 30, count 2 2006.229.07:58:51.68#ibcon#flushed, iclass 30, count 2 2006.229.07:58:51.68#ibcon#about to write, iclass 30, count 2 2006.229.07:58:51.68#ibcon#wrote, iclass 30, count 2 2006.229.07:58:51.68#ibcon#about to read 3, iclass 30, count 2 2006.229.07:58:51.71#ibcon#read 3, iclass 30, count 2 2006.229.07:58:51.71#ibcon#about to read 4, iclass 30, count 2 2006.229.07:58:51.71#ibcon#read 4, iclass 30, count 2 2006.229.07:58:51.71#ibcon#about to read 5, iclass 30, count 2 2006.229.07:58:51.71#ibcon#read 5, iclass 30, count 2 2006.229.07:58:51.71#ibcon#about to read 6, iclass 30, count 2 2006.229.07:58:51.71#ibcon#read 6, iclass 30, count 2 2006.229.07:58:51.71#ibcon#end of sib2, iclass 30, count 2 2006.229.07:58:51.71#ibcon#*after write, iclass 30, count 2 2006.229.07:58:51.71#ibcon#*before return 0, iclass 30, count 2 2006.229.07:58:51.71#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:51.71#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.07:58:51.71#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.07:58:51.71#ibcon#ireg 7 cls_cnt 0 2006.229.07:58:51.71#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:51.83#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:51.83#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:51.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.07:58:51.83#ibcon#first serial, iclass 30, count 0 2006.229.07:58:51.83#ibcon#enter sib2, iclass 30, count 0 2006.229.07:58:51.83#ibcon#flushed, iclass 30, count 0 2006.229.07:58:51.83#ibcon#about to write, iclass 30, count 0 2006.229.07:58:51.83#ibcon#wrote, iclass 30, count 0 2006.229.07:58:51.83#ibcon#about to read 3, iclass 30, count 0 2006.229.07:58:51.85#ibcon#read 3, iclass 30, count 0 2006.229.07:58:51.85#ibcon#about to read 4, iclass 30, count 0 2006.229.07:58:51.85#ibcon#read 4, iclass 30, count 0 2006.229.07:58:51.85#ibcon#about to read 5, iclass 30, count 0 2006.229.07:58:51.85#ibcon#read 5, iclass 30, count 0 2006.229.07:58:51.85#ibcon#about to read 6, iclass 30, count 0 2006.229.07:58:51.85#ibcon#read 6, iclass 30, count 0 2006.229.07:58:51.85#ibcon#end of sib2, iclass 30, count 0 2006.229.07:58:51.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.07:58:51.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.07:58:51.85#ibcon#[27=USB\r\n] 2006.229.07:58:51.85#ibcon#*before write, iclass 30, count 0 2006.229.07:58:51.85#ibcon#enter sib2, iclass 30, count 0 2006.229.07:58:51.85#ibcon#flushed, iclass 30, count 0 2006.229.07:58:51.85#ibcon#about to write, iclass 30, count 0 2006.229.07:58:51.85#ibcon#wrote, iclass 30, count 0 2006.229.07:58:51.85#ibcon#about to read 3, iclass 30, count 0 2006.229.07:58:51.88#ibcon#read 3, iclass 30, count 0 2006.229.07:58:51.88#ibcon#about to read 4, iclass 30, count 0 2006.229.07:58:51.88#ibcon#read 4, iclass 30, count 0 2006.229.07:58:51.88#ibcon#about to read 5, iclass 30, count 0 2006.229.07:58:51.88#ibcon#read 5, iclass 30, count 0 2006.229.07:58:51.88#ibcon#about to read 6, iclass 30, count 0 2006.229.07:58:51.88#ibcon#read 6, iclass 30, count 0 2006.229.07:58:51.88#ibcon#end of sib2, iclass 30, count 0 2006.229.07:58:51.88#ibcon#*after write, iclass 30, count 0 2006.229.07:58:51.88#ibcon#*before return 0, iclass 30, count 0 2006.229.07:58:51.88#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:51.88#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.07:58:51.88#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.07:58:51.88#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.07:58:51.88$vck44/vabw=wide 2006.229.07:58:51.88#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.07:58:51.88#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.07:58:51.88#ibcon#ireg 8 cls_cnt 0 2006.229.07:58:51.88#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:51.88#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:51.88#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:51.88#ibcon#enter wrdev, iclass 32, count 0 2006.229.07:58:51.88#ibcon#first serial, iclass 32, count 0 2006.229.07:58:51.88#ibcon#enter sib2, iclass 32, count 0 2006.229.07:58:51.88#ibcon#flushed, iclass 32, count 0 2006.229.07:58:51.88#ibcon#about to write, iclass 32, count 0 2006.229.07:58:51.88#ibcon#wrote, iclass 32, count 0 2006.229.07:58:51.88#ibcon#about to read 3, iclass 32, count 0 2006.229.07:58:51.90#ibcon#read 3, iclass 32, count 0 2006.229.07:58:51.90#ibcon#about to read 4, iclass 32, count 0 2006.229.07:58:51.90#ibcon#read 4, iclass 32, count 0 2006.229.07:58:51.90#ibcon#about to read 5, iclass 32, count 0 2006.229.07:58:51.90#ibcon#read 5, iclass 32, count 0 2006.229.07:58:51.90#ibcon#about to read 6, iclass 32, count 0 2006.229.07:58:51.90#ibcon#read 6, iclass 32, count 0 2006.229.07:58:51.90#ibcon#end of sib2, iclass 32, count 0 2006.229.07:58:51.90#ibcon#*mode == 0, iclass 32, count 0 2006.229.07:58:51.90#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.07:58:51.90#ibcon#[25=BW32\r\n] 2006.229.07:58:51.90#ibcon#*before write, iclass 32, count 0 2006.229.07:58:51.90#ibcon#enter sib2, iclass 32, count 0 2006.229.07:58:51.90#ibcon#flushed, iclass 32, count 0 2006.229.07:58:51.90#ibcon#about to write, iclass 32, count 0 2006.229.07:58:51.90#ibcon#wrote, iclass 32, count 0 2006.229.07:58:51.90#ibcon#about to read 3, iclass 32, count 0 2006.229.07:58:51.93#ibcon#read 3, iclass 32, count 0 2006.229.07:58:51.93#ibcon#about to read 4, iclass 32, count 0 2006.229.07:58:51.93#ibcon#read 4, iclass 32, count 0 2006.229.07:58:51.93#ibcon#about to read 5, iclass 32, count 0 2006.229.07:58:51.93#ibcon#read 5, iclass 32, count 0 2006.229.07:58:51.93#ibcon#about to read 6, iclass 32, count 0 2006.229.07:58:51.93#ibcon#read 6, iclass 32, count 0 2006.229.07:58:51.93#ibcon#end of sib2, iclass 32, count 0 2006.229.07:58:51.93#ibcon#*after write, iclass 32, count 0 2006.229.07:58:51.93#ibcon#*before return 0, iclass 32, count 0 2006.229.07:58:51.93#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:51.93#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.07:58:51.93#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.07:58:51.93#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.07:58:51.93$vck44/vbbw=wide 2006.229.07:58:51.93#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.07:58:51.93#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.07:58:51.93#ibcon#ireg 8 cls_cnt 0 2006.229.07:58:51.93#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:58:52.00#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:58:52.00#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:58:52.00#ibcon#enter wrdev, iclass 34, count 0 2006.229.07:58:52.00#ibcon#first serial, iclass 34, count 0 2006.229.07:58:52.00#ibcon#enter sib2, iclass 34, count 0 2006.229.07:58:52.00#ibcon#flushed, iclass 34, count 0 2006.229.07:58:52.00#ibcon#about to write, iclass 34, count 0 2006.229.07:58:52.00#ibcon#wrote, iclass 34, count 0 2006.229.07:58:52.00#ibcon#about to read 3, iclass 34, count 0 2006.229.07:58:52.02#ibcon#read 3, iclass 34, count 0 2006.229.07:58:52.02#ibcon#about to read 4, iclass 34, count 0 2006.229.07:58:52.02#ibcon#read 4, iclass 34, count 0 2006.229.07:58:52.02#ibcon#about to read 5, iclass 34, count 0 2006.229.07:58:52.02#ibcon#read 5, iclass 34, count 0 2006.229.07:58:52.02#ibcon#about to read 6, iclass 34, count 0 2006.229.07:58:52.02#ibcon#read 6, iclass 34, count 0 2006.229.07:58:52.02#ibcon#end of sib2, iclass 34, count 0 2006.229.07:58:52.02#ibcon#*mode == 0, iclass 34, count 0 2006.229.07:58:52.02#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.07:58:52.02#ibcon#[27=BW32\r\n] 2006.229.07:58:52.02#ibcon#*before write, iclass 34, count 0 2006.229.07:58:52.02#ibcon#enter sib2, iclass 34, count 0 2006.229.07:58:52.02#ibcon#flushed, iclass 34, count 0 2006.229.07:58:52.02#ibcon#about to write, iclass 34, count 0 2006.229.07:58:52.02#ibcon#wrote, iclass 34, count 0 2006.229.07:58:52.02#ibcon#about to read 3, iclass 34, count 0 2006.229.07:58:52.05#ibcon#read 3, iclass 34, count 0 2006.229.07:58:52.05#ibcon#about to read 4, iclass 34, count 0 2006.229.07:58:52.05#ibcon#read 4, iclass 34, count 0 2006.229.07:58:52.05#ibcon#about to read 5, iclass 34, count 0 2006.229.07:58:52.05#ibcon#read 5, iclass 34, count 0 2006.229.07:58:52.05#ibcon#about to read 6, iclass 34, count 0 2006.229.07:58:52.05#ibcon#read 6, iclass 34, count 0 2006.229.07:58:52.05#ibcon#end of sib2, iclass 34, count 0 2006.229.07:58:52.05#ibcon#*after write, iclass 34, count 0 2006.229.07:58:52.05#ibcon#*before return 0, iclass 34, count 0 2006.229.07:58:52.05#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:58:52.05#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.07:58:52.05#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.07:58:52.05#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.07:58:52.05$setupk4/ifdk4 2006.229.07:58:52.05$ifdk4/lo= 2006.229.07:58:52.05$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.07:58:52.05$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.07:58:52.05$ifdk4/patch= 2006.229.07:58:52.05$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.07:58:52.05$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.07:58:52.05$setupk4/!*+20s 2006.229.07:58:55.53#abcon#<5=/05 3.0 5.8 29.80 911000.5\r\n> 2006.229.07:58:55.55#abcon#{5=INTERFACE CLEAR} 2006.229.07:58:55.61#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:59:05.70#abcon#<5=/05 3.1 5.8 29.79 911000.5\r\n> 2006.229.07:59:05.72#abcon#{5=INTERFACE CLEAR} 2006.229.07:59:05.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.07:59:06.55$setupk4/"tpicd 2006.229.07:59:06.55$setupk4/echo=off 2006.229.07:59:06.55$setupk4/xlog=off 2006.229.07:59:06.55:!2006.229.07:59:55 2006.229.07:59:13.14#trakl#Source acquired 2006.229.07:59:14.14#flagr#flagr/antenna,acquired 2006.229.07:59:55.00:preob 2006.229.07:59:55.14/onsource/TRACKING 2006.229.07:59:55.14:!2006.229.08:00:05 2006.229.08:00:05.00:"tape 2006.229.08:00:05.00:"st=record 2006.229.08:00:05.00:data_valid=on 2006.229.08:00:05.00:midob 2006.229.08:00:05.14/onsource/TRACKING 2006.229.08:00:05.14/wx/29.77,1000.5,91 2006.229.08:00:05.23/cable/+6.3963E-03 2006.229.08:00:06.32/va/01,08,usb,yes,29,31 2006.229.08:00:06.32/va/02,07,usb,yes,31,32 2006.229.08:00:06.32/va/03,06,usb,yes,39,41 2006.229.08:00:06.32/va/04,07,usb,yes,32,34 2006.229.08:00:06.32/va/05,04,usb,yes,29,29 2006.229.08:00:06.32/va/06,04,usb,yes,32,32 2006.229.08:00:06.32/va/07,05,usb,yes,28,29 2006.229.08:00:06.32/va/08,06,usb,yes,20,26 2006.229.08:00:06.55/valo/01,524.99,yes,locked 2006.229.08:00:06.55/valo/02,534.99,yes,locked 2006.229.08:00:06.55/valo/03,564.99,yes,locked 2006.229.08:00:06.55/valo/04,624.99,yes,locked 2006.229.08:00:06.55/valo/05,734.99,yes,locked 2006.229.08:00:06.55/valo/06,814.99,yes,locked 2006.229.08:00:06.55/valo/07,864.99,yes,locked 2006.229.08:00:06.55/valo/08,884.99,yes,locked 2006.229.08:00:07.64/vb/01,04,usb,yes,30,28 2006.229.08:00:07.64/vb/02,04,usb,yes,33,33 2006.229.08:00:07.64/vb/03,04,usb,yes,30,33 2006.229.08:00:07.64/vb/04,04,usb,yes,34,33 2006.229.08:00:07.64/vb/05,04,usb,yes,27,29 2006.229.08:00:07.64/vb/06,04,usb,yes,31,27 2006.229.08:00:07.64/vb/07,04,usb,yes,31,31 2006.229.08:00:07.64/vb/08,04,usb,yes,28,32 2006.229.08:00:07.88/vblo/01,629.99,yes,locked 2006.229.08:00:07.88/vblo/02,634.99,yes,locked 2006.229.08:00:07.88/vblo/03,649.99,yes,locked 2006.229.08:00:07.88/vblo/04,679.99,yes,locked 2006.229.08:00:07.88/vblo/05,709.99,yes,locked 2006.229.08:00:07.88/vblo/06,719.99,yes,locked 2006.229.08:00:07.88/vblo/07,734.99,yes,locked 2006.229.08:00:07.88/vblo/08,744.99,yes,locked 2006.229.08:00:08.03/vabw/8 2006.229.08:00:08.18/vbbw/8 2006.229.08:00:08.27/xfe/off,on,12.7 2006.229.08:00:08.65/ifatt/23,28,28,28 2006.229.08:00:09.08/fmout-gps/S +4.56E-07 2006.229.08:00:09.12:!2006.229.08:00:55 2006.229.08:00:55.00:data_valid=off 2006.229.08:00:55.00:"et 2006.229.08:00:55.00:!+3s 2006.229.08:00:58.02:"tape 2006.229.08:00:58.02:postob 2006.229.08:00:58.11/cable/+6.3979E-03 2006.229.08:00:58.11/wx/29.75,1000.5,91 2006.229.08:00:59.08/fmout-gps/S +4.56E-07 2006.229.08:00:59.08:scan_name=229-0805,jd0608,370 2006.229.08:00:59.08:source=1622-253,162546.89,-252738.3,2000.0,cw 2006.229.08:01:00.14#flagr#flagr/antenna,new-source 2006.229.08:01:00.14:checkk5 2006.229.08:01:00.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:01:00.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:01:01.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:01:01.82/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:01:02.21/chk_obsdata//k5ts1/T2290800??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.08:01:02.60/chk_obsdata//k5ts2/T2290800??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.08:01:03.00/chk_obsdata//k5ts3/T2290800??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.08:01:03.40/chk_obsdata//k5ts4/T2290800??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.08:01:04.13/k5log//k5ts1_log_newline 2006.229.08:01:04.84/k5log//k5ts2_log_newline 2006.229.08:01:05.55/k5log//k5ts3_log_newline 2006.229.08:01:06.26/k5log//k5ts4_log_newline 2006.229.08:01:06.28/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:01:06.28:setupk4=1 2006.229.08:01:06.28$setupk4/echo=on 2006.229.08:01:06.28$setupk4/pcalon 2006.229.08:01:06.28$pcalon/"no phase cal control is implemented here 2006.229.08:01:06.28$setupk4/"tpicd=stop 2006.229.08:01:06.28$setupk4/"rec=synch_on 2006.229.08:01:06.28$setupk4/"rec_mode=128 2006.229.08:01:06.28$setupk4/!* 2006.229.08:01:06.28$setupk4/recpk4 2006.229.08:01:06.28$recpk4/recpatch= 2006.229.08:01:06.29$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:01:06.29$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:01:06.29$setupk4/vck44 2006.229.08:01:06.29$vck44/valo=1,524.99 2006.229.08:01:06.29#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.08:01:06.29#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.08:01:06.29#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:06.29#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:06.29#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:06.29#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:06.29#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:01:06.29#ibcon#first serial, iclass 19, count 0 2006.229.08:01:06.29#ibcon#enter sib2, iclass 19, count 0 2006.229.08:01:06.29#ibcon#flushed, iclass 19, count 0 2006.229.08:01:06.29#ibcon#about to write, iclass 19, count 0 2006.229.08:01:06.29#ibcon#wrote, iclass 19, count 0 2006.229.08:01:06.29#ibcon#about to read 3, iclass 19, count 0 2006.229.08:01:06.31#ibcon#read 3, iclass 19, count 0 2006.229.08:01:06.31#ibcon#about to read 4, iclass 19, count 0 2006.229.08:01:06.31#ibcon#read 4, iclass 19, count 0 2006.229.08:01:06.31#ibcon#about to read 5, iclass 19, count 0 2006.229.08:01:06.31#ibcon#read 5, iclass 19, count 0 2006.229.08:01:06.31#ibcon#about to read 6, iclass 19, count 0 2006.229.08:01:06.31#ibcon#read 6, iclass 19, count 0 2006.229.08:01:06.31#ibcon#end of sib2, iclass 19, count 0 2006.229.08:01:06.31#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:01:06.31#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:01:06.31#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:01:06.31#ibcon#*before write, iclass 19, count 0 2006.229.08:01:06.31#ibcon#enter sib2, iclass 19, count 0 2006.229.08:01:06.31#ibcon#flushed, iclass 19, count 0 2006.229.08:01:06.31#ibcon#about to write, iclass 19, count 0 2006.229.08:01:06.31#ibcon#wrote, iclass 19, count 0 2006.229.08:01:06.31#ibcon#about to read 3, iclass 19, count 0 2006.229.08:01:06.36#ibcon#read 3, iclass 19, count 0 2006.229.08:01:06.36#ibcon#about to read 4, iclass 19, count 0 2006.229.08:01:06.36#ibcon#read 4, iclass 19, count 0 2006.229.08:01:06.36#ibcon#about to read 5, iclass 19, count 0 2006.229.08:01:06.36#ibcon#read 5, iclass 19, count 0 2006.229.08:01:06.36#ibcon#about to read 6, iclass 19, count 0 2006.229.08:01:06.36#ibcon#read 6, iclass 19, count 0 2006.229.08:01:06.36#ibcon#end of sib2, iclass 19, count 0 2006.229.08:01:06.36#ibcon#*after write, iclass 19, count 0 2006.229.08:01:06.36#ibcon#*before return 0, iclass 19, count 0 2006.229.08:01:06.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:06.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:06.36#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:01:06.36#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:01:06.36$vck44/va=1,8 2006.229.08:01:06.36#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.08:01:06.36#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.08:01:06.36#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:06.36#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:06.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:06.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:06.36#ibcon#enter wrdev, iclass 21, count 2 2006.229.08:01:06.36#ibcon#first serial, iclass 21, count 2 2006.229.08:01:06.36#ibcon#enter sib2, iclass 21, count 2 2006.229.08:01:06.36#ibcon#flushed, iclass 21, count 2 2006.229.08:01:06.36#ibcon#about to write, iclass 21, count 2 2006.229.08:01:06.36#ibcon#wrote, iclass 21, count 2 2006.229.08:01:06.36#ibcon#about to read 3, iclass 21, count 2 2006.229.08:01:06.38#ibcon#read 3, iclass 21, count 2 2006.229.08:01:06.38#ibcon#about to read 4, iclass 21, count 2 2006.229.08:01:06.38#ibcon#read 4, iclass 21, count 2 2006.229.08:01:06.38#ibcon#about to read 5, iclass 21, count 2 2006.229.08:01:06.38#ibcon#read 5, iclass 21, count 2 2006.229.08:01:06.38#ibcon#about to read 6, iclass 21, count 2 2006.229.08:01:06.38#ibcon#read 6, iclass 21, count 2 2006.229.08:01:06.38#ibcon#end of sib2, iclass 21, count 2 2006.229.08:01:06.38#ibcon#*mode == 0, iclass 21, count 2 2006.229.08:01:06.38#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.08:01:06.38#ibcon#[25=AT01-08\r\n] 2006.229.08:01:06.38#ibcon#*before write, iclass 21, count 2 2006.229.08:01:06.38#ibcon#enter sib2, iclass 21, count 2 2006.229.08:01:06.38#ibcon#flushed, iclass 21, count 2 2006.229.08:01:06.38#ibcon#about to write, iclass 21, count 2 2006.229.08:01:06.38#ibcon#wrote, iclass 21, count 2 2006.229.08:01:06.38#ibcon#about to read 3, iclass 21, count 2 2006.229.08:01:06.41#ibcon#read 3, iclass 21, count 2 2006.229.08:01:06.41#ibcon#about to read 4, iclass 21, count 2 2006.229.08:01:06.41#ibcon#read 4, iclass 21, count 2 2006.229.08:01:06.41#ibcon#about to read 5, iclass 21, count 2 2006.229.08:01:06.41#ibcon#read 5, iclass 21, count 2 2006.229.08:01:06.41#ibcon#about to read 6, iclass 21, count 2 2006.229.08:01:06.41#ibcon#read 6, iclass 21, count 2 2006.229.08:01:06.41#ibcon#end of sib2, iclass 21, count 2 2006.229.08:01:06.41#ibcon#*after write, iclass 21, count 2 2006.229.08:01:06.41#ibcon#*before return 0, iclass 21, count 2 2006.229.08:01:06.41#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:06.41#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:06.41#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.08:01:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:06.41#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:06.53#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:06.53#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:06.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:01:06.53#ibcon#first serial, iclass 21, count 0 2006.229.08:01:06.53#ibcon#enter sib2, iclass 21, count 0 2006.229.08:01:06.53#ibcon#flushed, iclass 21, count 0 2006.229.08:01:06.53#ibcon#about to write, iclass 21, count 0 2006.229.08:01:06.53#ibcon#wrote, iclass 21, count 0 2006.229.08:01:06.53#ibcon#about to read 3, iclass 21, count 0 2006.229.08:01:06.55#ibcon#read 3, iclass 21, count 0 2006.229.08:01:06.55#ibcon#about to read 4, iclass 21, count 0 2006.229.08:01:06.55#ibcon#read 4, iclass 21, count 0 2006.229.08:01:06.55#ibcon#about to read 5, iclass 21, count 0 2006.229.08:01:06.55#ibcon#read 5, iclass 21, count 0 2006.229.08:01:06.55#ibcon#about to read 6, iclass 21, count 0 2006.229.08:01:06.55#ibcon#read 6, iclass 21, count 0 2006.229.08:01:06.55#ibcon#end of sib2, iclass 21, count 0 2006.229.08:01:06.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:01:06.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:01:06.55#ibcon#[25=USB\r\n] 2006.229.08:01:06.55#ibcon#*before write, iclass 21, count 0 2006.229.08:01:06.55#ibcon#enter sib2, iclass 21, count 0 2006.229.08:01:06.55#ibcon#flushed, iclass 21, count 0 2006.229.08:01:06.55#ibcon#about to write, iclass 21, count 0 2006.229.08:01:06.55#ibcon#wrote, iclass 21, count 0 2006.229.08:01:06.55#ibcon#about to read 3, iclass 21, count 0 2006.229.08:01:06.58#ibcon#read 3, iclass 21, count 0 2006.229.08:01:06.58#ibcon#about to read 4, iclass 21, count 0 2006.229.08:01:06.58#ibcon#read 4, iclass 21, count 0 2006.229.08:01:06.58#ibcon#about to read 5, iclass 21, count 0 2006.229.08:01:06.58#ibcon#read 5, iclass 21, count 0 2006.229.08:01:06.58#ibcon#about to read 6, iclass 21, count 0 2006.229.08:01:06.58#ibcon#read 6, iclass 21, count 0 2006.229.08:01:06.58#ibcon#end of sib2, iclass 21, count 0 2006.229.08:01:06.58#ibcon#*after write, iclass 21, count 0 2006.229.08:01:06.58#ibcon#*before return 0, iclass 21, count 0 2006.229.08:01:06.58#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:06.58#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:06.58#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:01:06.58#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:01:06.58$vck44/valo=2,534.99 2006.229.08:01:06.58#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.08:01:06.58#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.08:01:06.58#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:06.58#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:06.58#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:06.58#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:06.58#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:01:06.58#ibcon#first serial, iclass 23, count 0 2006.229.08:01:06.58#ibcon#enter sib2, iclass 23, count 0 2006.229.08:01:06.58#ibcon#flushed, iclass 23, count 0 2006.229.08:01:06.58#ibcon#about to write, iclass 23, count 0 2006.229.08:01:06.58#ibcon#wrote, iclass 23, count 0 2006.229.08:01:06.58#ibcon#about to read 3, iclass 23, count 0 2006.229.08:01:06.60#ibcon#read 3, iclass 23, count 0 2006.229.08:01:06.60#ibcon#about to read 4, iclass 23, count 0 2006.229.08:01:06.60#ibcon#read 4, iclass 23, count 0 2006.229.08:01:06.60#ibcon#about to read 5, iclass 23, count 0 2006.229.08:01:06.60#ibcon#read 5, iclass 23, count 0 2006.229.08:01:06.60#ibcon#about to read 6, iclass 23, count 0 2006.229.08:01:06.60#ibcon#read 6, iclass 23, count 0 2006.229.08:01:06.60#ibcon#end of sib2, iclass 23, count 0 2006.229.08:01:06.60#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:01:06.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:01:06.60#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:01:06.60#ibcon#*before write, iclass 23, count 0 2006.229.08:01:06.60#ibcon#enter sib2, iclass 23, count 0 2006.229.08:01:06.60#ibcon#flushed, iclass 23, count 0 2006.229.08:01:06.60#ibcon#about to write, iclass 23, count 0 2006.229.08:01:06.60#ibcon#wrote, iclass 23, count 0 2006.229.08:01:06.60#ibcon#about to read 3, iclass 23, count 0 2006.229.08:01:06.64#ibcon#read 3, iclass 23, count 0 2006.229.08:01:06.64#ibcon#about to read 4, iclass 23, count 0 2006.229.08:01:06.64#ibcon#read 4, iclass 23, count 0 2006.229.08:01:06.64#ibcon#about to read 5, iclass 23, count 0 2006.229.08:01:06.64#ibcon#read 5, iclass 23, count 0 2006.229.08:01:06.64#ibcon#about to read 6, iclass 23, count 0 2006.229.08:01:06.64#ibcon#read 6, iclass 23, count 0 2006.229.08:01:06.64#ibcon#end of sib2, iclass 23, count 0 2006.229.08:01:06.64#ibcon#*after write, iclass 23, count 0 2006.229.08:01:06.64#ibcon#*before return 0, iclass 23, count 0 2006.229.08:01:06.64#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:06.64#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:06.64#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:01:06.64#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:01:06.64$vck44/va=2,7 2006.229.08:01:06.64#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.08:01:06.64#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.08:01:06.64#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:06.64#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:06.70#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:06.70#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:06.70#ibcon#enter wrdev, iclass 25, count 2 2006.229.08:01:06.70#ibcon#first serial, iclass 25, count 2 2006.229.08:01:06.70#ibcon#enter sib2, iclass 25, count 2 2006.229.08:01:06.70#ibcon#flushed, iclass 25, count 2 2006.229.08:01:06.70#ibcon#about to write, iclass 25, count 2 2006.229.08:01:06.70#ibcon#wrote, iclass 25, count 2 2006.229.08:01:06.70#ibcon#about to read 3, iclass 25, count 2 2006.229.08:01:06.72#ibcon#read 3, iclass 25, count 2 2006.229.08:01:06.72#ibcon#about to read 4, iclass 25, count 2 2006.229.08:01:06.72#ibcon#read 4, iclass 25, count 2 2006.229.08:01:06.72#ibcon#about to read 5, iclass 25, count 2 2006.229.08:01:06.72#ibcon#read 5, iclass 25, count 2 2006.229.08:01:06.72#ibcon#about to read 6, iclass 25, count 2 2006.229.08:01:06.72#ibcon#read 6, iclass 25, count 2 2006.229.08:01:06.72#ibcon#end of sib2, iclass 25, count 2 2006.229.08:01:06.72#ibcon#*mode == 0, iclass 25, count 2 2006.229.08:01:06.72#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.08:01:06.72#ibcon#[25=AT02-07\r\n] 2006.229.08:01:06.72#ibcon#*before write, iclass 25, count 2 2006.229.08:01:06.72#ibcon#enter sib2, iclass 25, count 2 2006.229.08:01:06.72#ibcon#flushed, iclass 25, count 2 2006.229.08:01:06.72#ibcon#about to write, iclass 25, count 2 2006.229.08:01:06.72#ibcon#wrote, iclass 25, count 2 2006.229.08:01:06.72#ibcon#about to read 3, iclass 25, count 2 2006.229.08:01:06.75#ibcon#read 3, iclass 25, count 2 2006.229.08:01:06.75#ibcon#about to read 4, iclass 25, count 2 2006.229.08:01:06.75#ibcon#read 4, iclass 25, count 2 2006.229.08:01:06.75#ibcon#about to read 5, iclass 25, count 2 2006.229.08:01:06.75#ibcon#read 5, iclass 25, count 2 2006.229.08:01:06.75#ibcon#about to read 6, iclass 25, count 2 2006.229.08:01:06.75#ibcon#read 6, iclass 25, count 2 2006.229.08:01:06.75#ibcon#end of sib2, iclass 25, count 2 2006.229.08:01:06.75#ibcon#*after write, iclass 25, count 2 2006.229.08:01:06.75#ibcon#*before return 0, iclass 25, count 2 2006.229.08:01:06.75#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:06.75#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:06.75#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.08:01:06.75#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:06.75#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:06.87#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:06.87#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:06.87#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:01:06.87#ibcon#first serial, iclass 25, count 0 2006.229.08:01:06.87#ibcon#enter sib2, iclass 25, count 0 2006.229.08:01:06.87#ibcon#flushed, iclass 25, count 0 2006.229.08:01:06.87#ibcon#about to write, iclass 25, count 0 2006.229.08:01:06.87#ibcon#wrote, iclass 25, count 0 2006.229.08:01:06.87#ibcon#about to read 3, iclass 25, count 0 2006.229.08:01:06.89#ibcon#read 3, iclass 25, count 0 2006.229.08:01:06.89#ibcon#about to read 4, iclass 25, count 0 2006.229.08:01:06.89#ibcon#read 4, iclass 25, count 0 2006.229.08:01:06.89#ibcon#about to read 5, iclass 25, count 0 2006.229.08:01:06.89#ibcon#read 5, iclass 25, count 0 2006.229.08:01:06.89#ibcon#about to read 6, iclass 25, count 0 2006.229.08:01:06.89#ibcon#read 6, iclass 25, count 0 2006.229.08:01:06.89#ibcon#end of sib2, iclass 25, count 0 2006.229.08:01:06.89#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:01:06.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:01:06.89#ibcon#[25=USB\r\n] 2006.229.08:01:06.89#ibcon#*before write, iclass 25, count 0 2006.229.08:01:06.89#ibcon#enter sib2, iclass 25, count 0 2006.229.08:01:06.89#ibcon#flushed, iclass 25, count 0 2006.229.08:01:06.89#ibcon#about to write, iclass 25, count 0 2006.229.08:01:06.89#ibcon#wrote, iclass 25, count 0 2006.229.08:01:06.89#ibcon#about to read 3, iclass 25, count 0 2006.229.08:01:06.92#ibcon#read 3, iclass 25, count 0 2006.229.08:01:06.92#ibcon#about to read 4, iclass 25, count 0 2006.229.08:01:06.92#ibcon#read 4, iclass 25, count 0 2006.229.08:01:06.92#ibcon#about to read 5, iclass 25, count 0 2006.229.08:01:06.92#ibcon#read 5, iclass 25, count 0 2006.229.08:01:06.92#ibcon#about to read 6, iclass 25, count 0 2006.229.08:01:06.92#ibcon#read 6, iclass 25, count 0 2006.229.08:01:06.92#ibcon#end of sib2, iclass 25, count 0 2006.229.08:01:06.92#ibcon#*after write, iclass 25, count 0 2006.229.08:01:06.92#ibcon#*before return 0, iclass 25, count 0 2006.229.08:01:06.92#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:06.92#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:06.92#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:01:06.92#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:01:06.92$vck44/valo=3,564.99 2006.229.08:01:06.92#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.08:01:06.92#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.08:01:06.92#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:06.92#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:06.92#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:06.92#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:06.92#ibcon#enter wrdev, iclass 27, count 0 2006.229.08:01:06.92#ibcon#first serial, iclass 27, count 0 2006.229.08:01:06.92#ibcon#enter sib2, iclass 27, count 0 2006.229.08:01:06.92#ibcon#flushed, iclass 27, count 0 2006.229.08:01:06.92#ibcon#about to write, iclass 27, count 0 2006.229.08:01:06.92#ibcon#wrote, iclass 27, count 0 2006.229.08:01:06.92#ibcon#about to read 3, iclass 27, count 0 2006.229.08:01:06.94#ibcon#read 3, iclass 27, count 0 2006.229.08:01:06.94#ibcon#about to read 4, iclass 27, count 0 2006.229.08:01:06.94#ibcon#read 4, iclass 27, count 0 2006.229.08:01:06.94#ibcon#about to read 5, iclass 27, count 0 2006.229.08:01:06.94#ibcon#read 5, iclass 27, count 0 2006.229.08:01:06.94#ibcon#about to read 6, iclass 27, count 0 2006.229.08:01:06.94#ibcon#read 6, iclass 27, count 0 2006.229.08:01:06.94#ibcon#end of sib2, iclass 27, count 0 2006.229.08:01:06.94#ibcon#*mode == 0, iclass 27, count 0 2006.229.08:01:06.94#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.08:01:06.94#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:01:06.94#ibcon#*before write, iclass 27, count 0 2006.229.08:01:06.94#ibcon#enter sib2, iclass 27, count 0 2006.229.08:01:06.94#ibcon#flushed, iclass 27, count 0 2006.229.08:01:06.94#ibcon#about to write, iclass 27, count 0 2006.229.08:01:06.94#ibcon#wrote, iclass 27, count 0 2006.229.08:01:06.94#ibcon#about to read 3, iclass 27, count 0 2006.229.08:01:06.98#ibcon#read 3, iclass 27, count 0 2006.229.08:01:06.98#ibcon#about to read 4, iclass 27, count 0 2006.229.08:01:06.98#ibcon#read 4, iclass 27, count 0 2006.229.08:01:06.98#ibcon#about to read 5, iclass 27, count 0 2006.229.08:01:06.98#ibcon#read 5, iclass 27, count 0 2006.229.08:01:06.98#ibcon#about to read 6, iclass 27, count 0 2006.229.08:01:06.98#ibcon#read 6, iclass 27, count 0 2006.229.08:01:06.98#ibcon#end of sib2, iclass 27, count 0 2006.229.08:01:06.98#ibcon#*after write, iclass 27, count 0 2006.229.08:01:06.98#ibcon#*before return 0, iclass 27, count 0 2006.229.08:01:06.98#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:06.98#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:06.98#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.08:01:06.98#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.08:01:06.98$vck44/va=3,6 2006.229.08:01:06.98#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.08:01:06.98#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.08:01:06.98#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:06.98#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:07.04#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:07.04#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:07.04#ibcon#enter wrdev, iclass 29, count 2 2006.229.08:01:07.04#ibcon#first serial, iclass 29, count 2 2006.229.08:01:07.04#ibcon#enter sib2, iclass 29, count 2 2006.229.08:01:07.04#ibcon#flushed, iclass 29, count 2 2006.229.08:01:07.04#ibcon#about to write, iclass 29, count 2 2006.229.08:01:07.04#ibcon#wrote, iclass 29, count 2 2006.229.08:01:07.04#ibcon#about to read 3, iclass 29, count 2 2006.229.08:01:07.06#ibcon#read 3, iclass 29, count 2 2006.229.08:01:07.06#ibcon#about to read 4, iclass 29, count 2 2006.229.08:01:07.06#ibcon#read 4, iclass 29, count 2 2006.229.08:01:07.06#ibcon#about to read 5, iclass 29, count 2 2006.229.08:01:07.06#ibcon#read 5, iclass 29, count 2 2006.229.08:01:07.06#ibcon#about to read 6, iclass 29, count 2 2006.229.08:01:07.06#ibcon#read 6, iclass 29, count 2 2006.229.08:01:07.06#ibcon#end of sib2, iclass 29, count 2 2006.229.08:01:07.06#ibcon#*mode == 0, iclass 29, count 2 2006.229.08:01:07.06#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.08:01:07.06#ibcon#[25=AT03-06\r\n] 2006.229.08:01:07.06#ibcon#*before write, iclass 29, count 2 2006.229.08:01:07.06#ibcon#enter sib2, iclass 29, count 2 2006.229.08:01:07.06#ibcon#flushed, iclass 29, count 2 2006.229.08:01:07.06#ibcon#about to write, iclass 29, count 2 2006.229.08:01:07.06#ibcon#wrote, iclass 29, count 2 2006.229.08:01:07.06#ibcon#about to read 3, iclass 29, count 2 2006.229.08:01:07.09#ibcon#read 3, iclass 29, count 2 2006.229.08:01:07.09#ibcon#about to read 4, iclass 29, count 2 2006.229.08:01:07.09#ibcon#read 4, iclass 29, count 2 2006.229.08:01:07.09#ibcon#about to read 5, iclass 29, count 2 2006.229.08:01:07.09#ibcon#read 5, iclass 29, count 2 2006.229.08:01:07.09#ibcon#about to read 6, iclass 29, count 2 2006.229.08:01:07.09#ibcon#read 6, iclass 29, count 2 2006.229.08:01:07.09#ibcon#end of sib2, iclass 29, count 2 2006.229.08:01:07.09#ibcon#*after write, iclass 29, count 2 2006.229.08:01:07.09#ibcon#*before return 0, iclass 29, count 2 2006.229.08:01:07.09#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:07.09#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:07.09#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.08:01:07.09#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:07.09#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:07.21#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:07.21#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:07.21#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:01:07.21#ibcon#first serial, iclass 29, count 0 2006.229.08:01:07.21#ibcon#enter sib2, iclass 29, count 0 2006.229.08:01:07.21#ibcon#flushed, iclass 29, count 0 2006.229.08:01:07.21#ibcon#about to write, iclass 29, count 0 2006.229.08:01:07.21#ibcon#wrote, iclass 29, count 0 2006.229.08:01:07.21#ibcon#about to read 3, iclass 29, count 0 2006.229.08:01:07.23#ibcon#read 3, iclass 29, count 0 2006.229.08:01:07.23#ibcon#about to read 4, iclass 29, count 0 2006.229.08:01:07.23#ibcon#read 4, iclass 29, count 0 2006.229.08:01:07.23#ibcon#about to read 5, iclass 29, count 0 2006.229.08:01:07.23#ibcon#read 5, iclass 29, count 0 2006.229.08:01:07.23#ibcon#about to read 6, iclass 29, count 0 2006.229.08:01:07.23#ibcon#read 6, iclass 29, count 0 2006.229.08:01:07.23#ibcon#end of sib2, iclass 29, count 0 2006.229.08:01:07.23#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:01:07.23#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:01:07.23#ibcon#[25=USB\r\n] 2006.229.08:01:07.23#ibcon#*before write, iclass 29, count 0 2006.229.08:01:07.23#ibcon#enter sib2, iclass 29, count 0 2006.229.08:01:07.23#ibcon#flushed, iclass 29, count 0 2006.229.08:01:07.23#ibcon#about to write, iclass 29, count 0 2006.229.08:01:07.23#ibcon#wrote, iclass 29, count 0 2006.229.08:01:07.23#ibcon#about to read 3, iclass 29, count 0 2006.229.08:01:07.26#ibcon#read 3, iclass 29, count 0 2006.229.08:01:07.26#ibcon#about to read 4, iclass 29, count 0 2006.229.08:01:07.26#ibcon#read 4, iclass 29, count 0 2006.229.08:01:07.26#ibcon#about to read 5, iclass 29, count 0 2006.229.08:01:07.26#ibcon#read 5, iclass 29, count 0 2006.229.08:01:07.26#ibcon#about to read 6, iclass 29, count 0 2006.229.08:01:07.26#ibcon#read 6, iclass 29, count 0 2006.229.08:01:07.26#ibcon#end of sib2, iclass 29, count 0 2006.229.08:01:07.26#ibcon#*after write, iclass 29, count 0 2006.229.08:01:07.26#ibcon#*before return 0, iclass 29, count 0 2006.229.08:01:07.26#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:07.26#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:07.26#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:01:07.26#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:01:07.26$vck44/valo=4,624.99 2006.229.08:01:07.26#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.08:01:07.26#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.08:01:07.26#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:07.26#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:07.26#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:07.26#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:07.26#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:01:07.26#ibcon#first serial, iclass 31, count 0 2006.229.08:01:07.26#ibcon#enter sib2, iclass 31, count 0 2006.229.08:01:07.26#ibcon#flushed, iclass 31, count 0 2006.229.08:01:07.26#ibcon#about to write, iclass 31, count 0 2006.229.08:01:07.26#ibcon#wrote, iclass 31, count 0 2006.229.08:01:07.26#ibcon#about to read 3, iclass 31, count 0 2006.229.08:01:07.28#ibcon#read 3, iclass 31, count 0 2006.229.08:01:07.28#ibcon#about to read 4, iclass 31, count 0 2006.229.08:01:07.28#ibcon#read 4, iclass 31, count 0 2006.229.08:01:07.28#ibcon#about to read 5, iclass 31, count 0 2006.229.08:01:07.28#ibcon#read 5, iclass 31, count 0 2006.229.08:01:07.28#ibcon#about to read 6, iclass 31, count 0 2006.229.08:01:07.28#ibcon#read 6, iclass 31, count 0 2006.229.08:01:07.28#ibcon#end of sib2, iclass 31, count 0 2006.229.08:01:07.28#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:01:07.28#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:01:07.28#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:01:07.28#ibcon#*before write, iclass 31, count 0 2006.229.08:01:07.28#ibcon#enter sib2, iclass 31, count 0 2006.229.08:01:07.28#ibcon#flushed, iclass 31, count 0 2006.229.08:01:07.28#ibcon#about to write, iclass 31, count 0 2006.229.08:01:07.28#ibcon#wrote, iclass 31, count 0 2006.229.08:01:07.28#ibcon#about to read 3, iclass 31, count 0 2006.229.08:01:07.32#ibcon#read 3, iclass 31, count 0 2006.229.08:01:07.32#ibcon#about to read 4, iclass 31, count 0 2006.229.08:01:07.32#ibcon#read 4, iclass 31, count 0 2006.229.08:01:07.32#ibcon#about to read 5, iclass 31, count 0 2006.229.08:01:07.32#ibcon#read 5, iclass 31, count 0 2006.229.08:01:07.32#ibcon#about to read 6, iclass 31, count 0 2006.229.08:01:07.32#ibcon#read 6, iclass 31, count 0 2006.229.08:01:07.32#ibcon#end of sib2, iclass 31, count 0 2006.229.08:01:07.32#ibcon#*after write, iclass 31, count 0 2006.229.08:01:07.32#ibcon#*before return 0, iclass 31, count 0 2006.229.08:01:07.32#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:07.32#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:07.32#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:01:07.32#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:01:07.32$vck44/va=4,7 2006.229.08:01:07.32#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.08:01:07.32#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.08:01:07.32#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:07.32#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:07.38#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:07.38#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:07.38#ibcon#enter wrdev, iclass 33, count 2 2006.229.08:01:07.38#ibcon#first serial, iclass 33, count 2 2006.229.08:01:07.38#ibcon#enter sib2, iclass 33, count 2 2006.229.08:01:07.38#ibcon#flushed, iclass 33, count 2 2006.229.08:01:07.38#ibcon#about to write, iclass 33, count 2 2006.229.08:01:07.38#ibcon#wrote, iclass 33, count 2 2006.229.08:01:07.38#ibcon#about to read 3, iclass 33, count 2 2006.229.08:01:07.40#ibcon#read 3, iclass 33, count 2 2006.229.08:01:07.40#ibcon#about to read 4, iclass 33, count 2 2006.229.08:01:07.40#ibcon#read 4, iclass 33, count 2 2006.229.08:01:07.40#ibcon#about to read 5, iclass 33, count 2 2006.229.08:01:07.40#ibcon#read 5, iclass 33, count 2 2006.229.08:01:07.40#ibcon#about to read 6, iclass 33, count 2 2006.229.08:01:07.40#ibcon#read 6, iclass 33, count 2 2006.229.08:01:07.40#ibcon#end of sib2, iclass 33, count 2 2006.229.08:01:07.40#ibcon#*mode == 0, iclass 33, count 2 2006.229.08:01:07.40#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.08:01:07.40#ibcon#[25=AT04-07\r\n] 2006.229.08:01:07.40#ibcon#*before write, iclass 33, count 2 2006.229.08:01:07.40#ibcon#enter sib2, iclass 33, count 2 2006.229.08:01:07.40#ibcon#flushed, iclass 33, count 2 2006.229.08:01:07.40#ibcon#about to write, iclass 33, count 2 2006.229.08:01:07.40#ibcon#wrote, iclass 33, count 2 2006.229.08:01:07.40#ibcon#about to read 3, iclass 33, count 2 2006.229.08:01:07.43#ibcon#read 3, iclass 33, count 2 2006.229.08:01:07.43#ibcon#about to read 4, iclass 33, count 2 2006.229.08:01:07.43#ibcon#read 4, iclass 33, count 2 2006.229.08:01:07.43#ibcon#about to read 5, iclass 33, count 2 2006.229.08:01:07.43#ibcon#read 5, iclass 33, count 2 2006.229.08:01:07.43#ibcon#about to read 6, iclass 33, count 2 2006.229.08:01:07.43#ibcon#read 6, iclass 33, count 2 2006.229.08:01:07.43#ibcon#end of sib2, iclass 33, count 2 2006.229.08:01:07.43#ibcon#*after write, iclass 33, count 2 2006.229.08:01:07.43#ibcon#*before return 0, iclass 33, count 2 2006.229.08:01:07.43#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:07.43#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:07.43#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.08:01:07.43#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:07.43#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:07.55#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:07.55#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:07.55#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:01:07.55#ibcon#first serial, iclass 33, count 0 2006.229.08:01:07.55#ibcon#enter sib2, iclass 33, count 0 2006.229.08:01:07.55#ibcon#flushed, iclass 33, count 0 2006.229.08:01:07.55#ibcon#about to write, iclass 33, count 0 2006.229.08:01:07.55#ibcon#wrote, iclass 33, count 0 2006.229.08:01:07.55#ibcon#about to read 3, iclass 33, count 0 2006.229.08:01:07.57#ibcon#read 3, iclass 33, count 0 2006.229.08:01:07.57#ibcon#about to read 4, iclass 33, count 0 2006.229.08:01:07.57#ibcon#read 4, iclass 33, count 0 2006.229.08:01:07.57#ibcon#about to read 5, iclass 33, count 0 2006.229.08:01:07.57#ibcon#read 5, iclass 33, count 0 2006.229.08:01:07.57#ibcon#about to read 6, iclass 33, count 0 2006.229.08:01:07.57#ibcon#read 6, iclass 33, count 0 2006.229.08:01:07.57#ibcon#end of sib2, iclass 33, count 0 2006.229.08:01:07.57#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:01:07.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:01:07.57#ibcon#[25=USB\r\n] 2006.229.08:01:07.57#ibcon#*before write, iclass 33, count 0 2006.229.08:01:07.57#ibcon#enter sib2, iclass 33, count 0 2006.229.08:01:07.57#ibcon#flushed, iclass 33, count 0 2006.229.08:01:07.57#ibcon#about to write, iclass 33, count 0 2006.229.08:01:07.57#ibcon#wrote, iclass 33, count 0 2006.229.08:01:07.57#ibcon#about to read 3, iclass 33, count 0 2006.229.08:01:07.60#ibcon#read 3, iclass 33, count 0 2006.229.08:01:07.60#ibcon#about to read 4, iclass 33, count 0 2006.229.08:01:07.60#ibcon#read 4, iclass 33, count 0 2006.229.08:01:07.60#ibcon#about to read 5, iclass 33, count 0 2006.229.08:01:07.60#ibcon#read 5, iclass 33, count 0 2006.229.08:01:07.60#ibcon#about to read 6, iclass 33, count 0 2006.229.08:01:07.60#ibcon#read 6, iclass 33, count 0 2006.229.08:01:07.60#ibcon#end of sib2, iclass 33, count 0 2006.229.08:01:07.60#ibcon#*after write, iclass 33, count 0 2006.229.08:01:07.60#ibcon#*before return 0, iclass 33, count 0 2006.229.08:01:07.60#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:07.60#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:07.60#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:01:07.60#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:01:07.60$vck44/valo=5,734.99 2006.229.08:01:07.60#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.08:01:07.60#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.08:01:07.60#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:07.60#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:07.60#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:07.60#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:07.60#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:01:07.60#ibcon#first serial, iclass 35, count 0 2006.229.08:01:07.60#ibcon#enter sib2, iclass 35, count 0 2006.229.08:01:07.60#ibcon#flushed, iclass 35, count 0 2006.229.08:01:07.60#ibcon#about to write, iclass 35, count 0 2006.229.08:01:07.60#ibcon#wrote, iclass 35, count 0 2006.229.08:01:07.60#ibcon#about to read 3, iclass 35, count 0 2006.229.08:01:07.62#ibcon#read 3, iclass 35, count 0 2006.229.08:01:07.62#ibcon#about to read 4, iclass 35, count 0 2006.229.08:01:07.62#ibcon#read 4, iclass 35, count 0 2006.229.08:01:07.62#ibcon#about to read 5, iclass 35, count 0 2006.229.08:01:07.62#ibcon#read 5, iclass 35, count 0 2006.229.08:01:07.62#ibcon#about to read 6, iclass 35, count 0 2006.229.08:01:07.62#ibcon#read 6, iclass 35, count 0 2006.229.08:01:07.62#ibcon#end of sib2, iclass 35, count 0 2006.229.08:01:07.62#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:01:07.62#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:01:07.62#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:01:07.62#ibcon#*before write, iclass 35, count 0 2006.229.08:01:07.62#ibcon#enter sib2, iclass 35, count 0 2006.229.08:01:07.62#ibcon#flushed, iclass 35, count 0 2006.229.08:01:07.62#ibcon#about to write, iclass 35, count 0 2006.229.08:01:07.62#ibcon#wrote, iclass 35, count 0 2006.229.08:01:07.62#ibcon#about to read 3, iclass 35, count 0 2006.229.08:01:07.66#ibcon#read 3, iclass 35, count 0 2006.229.08:01:07.66#ibcon#about to read 4, iclass 35, count 0 2006.229.08:01:07.66#ibcon#read 4, iclass 35, count 0 2006.229.08:01:07.66#ibcon#about to read 5, iclass 35, count 0 2006.229.08:01:07.66#ibcon#read 5, iclass 35, count 0 2006.229.08:01:07.66#ibcon#about to read 6, iclass 35, count 0 2006.229.08:01:07.66#ibcon#read 6, iclass 35, count 0 2006.229.08:01:07.66#ibcon#end of sib2, iclass 35, count 0 2006.229.08:01:07.66#ibcon#*after write, iclass 35, count 0 2006.229.08:01:07.66#ibcon#*before return 0, iclass 35, count 0 2006.229.08:01:07.66#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:07.66#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:07.66#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:01:07.66#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:01:07.66$vck44/va=5,4 2006.229.08:01:07.66#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.08:01:07.66#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.08:01:07.66#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:07.66#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:07.72#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:07.72#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:07.72#ibcon#enter wrdev, iclass 37, count 2 2006.229.08:01:07.72#ibcon#first serial, iclass 37, count 2 2006.229.08:01:07.72#ibcon#enter sib2, iclass 37, count 2 2006.229.08:01:07.72#ibcon#flushed, iclass 37, count 2 2006.229.08:01:07.72#ibcon#about to write, iclass 37, count 2 2006.229.08:01:07.72#ibcon#wrote, iclass 37, count 2 2006.229.08:01:07.72#ibcon#about to read 3, iclass 37, count 2 2006.229.08:01:07.74#ibcon#read 3, iclass 37, count 2 2006.229.08:01:07.74#ibcon#about to read 4, iclass 37, count 2 2006.229.08:01:07.74#ibcon#read 4, iclass 37, count 2 2006.229.08:01:07.74#ibcon#about to read 5, iclass 37, count 2 2006.229.08:01:07.74#ibcon#read 5, iclass 37, count 2 2006.229.08:01:07.74#ibcon#about to read 6, iclass 37, count 2 2006.229.08:01:07.74#ibcon#read 6, iclass 37, count 2 2006.229.08:01:07.74#ibcon#end of sib2, iclass 37, count 2 2006.229.08:01:07.74#ibcon#*mode == 0, iclass 37, count 2 2006.229.08:01:07.74#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.08:01:07.74#ibcon#[25=AT05-04\r\n] 2006.229.08:01:07.74#ibcon#*before write, iclass 37, count 2 2006.229.08:01:07.74#ibcon#enter sib2, iclass 37, count 2 2006.229.08:01:07.74#ibcon#flushed, iclass 37, count 2 2006.229.08:01:07.74#ibcon#about to write, iclass 37, count 2 2006.229.08:01:07.74#ibcon#wrote, iclass 37, count 2 2006.229.08:01:07.74#ibcon#about to read 3, iclass 37, count 2 2006.229.08:01:07.74#abcon#<5=/05 3.3 5.8 29.75 911000.5\r\n> 2006.229.08:01:07.76#abcon#{5=INTERFACE CLEAR} 2006.229.08:01:07.77#ibcon#read 3, iclass 37, count 2 2006.229.08:01:07.77#ibcon#about to read 4, iclass 37, count 2 2006.229.08:01:07.77#ibcon#read 4, iclass 37, count 2 2006.229.08:01:07.77#ibcon#about to read 5, iclass 37, count 2 2006.229.08:01:07.77#ibcon#read 5, iclass 37, count 2 2006.229.08:01:07.77#ibcon#about to read 6, iclass 37, count 2 2006.229.08:01:07.77#ibcon#read 6, iclass 37, count 2 2006.229.08:01:07.77#ibcon#end of sib2, iclass 37, count 2 2006.229.08:01:07.77#ibcon#*after write, iclass 37, count 2 2006.229.08:01:07.77#ibcon#*before return 0, iclass 37, count 2 2006.229.08:01:07.77#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:07.77#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:07.77#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.08:01:07.77#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:07.77#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:07.82#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:01:07.89#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:07.89#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:07.89#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:01:07.89#ibcon#first serial, iclass 37, count 0 2006.229.08:01:07.89#ibcon#enter sib2, iclass 37, count 0 2006.229.08:01:07.89#ibcon#flushed, iclass 37, count 0 2006.229.08:01:07.89#ibcon#about to write, iclass 37, count 0 2006.229.08:01:07.89#ibcon#wrote, iclass 37, count 0 2006.229.08:01:07.89#ibcon#about to read 3, iclass 37, count 0 2006.229.08:01:07.91#ibcon#read 3, iclass 37, count 0 2006.229.08:01:07.91#ibcon#about to read 4, iclass 37, count 0 2006.229.08:01:07.91#ibcon#read 4, iclass 37, count 0 2006.229.08:01:07.91#ibcon#about to read 5, iclass 37, count 0 2006.229.08:01:07.91#ibcon#read 5, iclass 37, count 0 2006.229.08:01:07.91#ibcon#about to read 6, iclass 37, count 0 2006.229.08:01:07.91#ibcon#read 6, iclass 37, count 0 2006.229.08:01:07.91#ibcon#end of sib2, iclass 37, count 0 2006.229.08:01:07.91#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:01:07.91#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:01:07.91#ibcon#[25=USB\r\n] 2006.229.08:01:07.91#ibcon#*before write, iclass 37, count 0 2006.229.08:01:07.91#ibcon#enter sib2, iclass 37, count 0 2006.229.08:01:07.91#ibcon#flushed, iclass 37, count 0 2006.229.08:01:07.91#ibcon#about to write, iclass 37, count 0 2006.229.08:01:07.91#ibcon#wrote, iclass 37, count 0 2006.229.08:01:07.91#ibcon#about to read 3, iclass 37, count 0 2006.229.08:01:07.94#ibcon#read 3, iclass 37, count 0 2006.229.08:01:07.94#ibcon#about to read 4, iclass 37, count 0 2006.229.08:01:07.94#ibcon#read 4, iclass 37, count 0 2006.229.08:01:07.94#ibcon#about to read 5, iclass 37, count 0 2006.229.08:01:07.94#ibcon#read 5, iclass 37, count 0 2006.229.08:01:07.94#ibcon#about to read 6, iclass 37, count 0 2006.229.08:01:07.94#ibcon#read 6, iclass 37, count 0 2006.229.08:01:07.94#ibcon#end of sib2, iclass 37, count 0 2006.229.08:01:07.94#ibcon#*after write, iclass 37, count 0 2006.229.08:01:07.94#ibcon#*before return 0, iclass 37, count 0 2006.229.08:01:07.94#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:07.94#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:07.94#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:01:07.94#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:01:07.94$vck44/valo=6,814.99 2006.229.08:01:07.94#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.08:01:07.94#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.08:01:07.94#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:07.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:07.94#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:07.94#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:07.94#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:01:07.94#ibcon#first serial, iclass 5, count 0 2006.229.08:01:07.94#ibcon#enter sib2, iclass 5, count 0 2006.229.08:01:07.94#ibcon#flushed, iclass 5, count 0 2006.229.08:01:07.94#ibcon#about to write, iclass 5, count 0 2006.229.08:01:07.94#ibcon#wrote, iclass 5, count 0 2006.229.08:01:07.94#ibcon#about to read 3, iclass 5, count 0 2006.229.08:01:07.96#ibcon#read 3, iclass 5, count 0 2006.229.08:01:07.96#ibcon#about to read 4, iclass 5, count 0 2006.229.08:01:07.96#ibcon#read 4, iclass 5, count 0 2006.229.08:01:07.96#ibcon#about to read 5, iclass 5, count 0 2006.229.08:01:07.96#ibcon#read 5, iclass 5, count 0 2006.229.08:01:07.96#ibcon#about to read 6, iclass 5, count 0 2006.229.08:01:07.96#ibcon#read 6, iclass 5, count 0 2006.229.08:01:07.96#ibcon#end of sib2, iclass 5, count 0 2006.229.08:01:07.96#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:01:07.96#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:01:07.96#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:01:07.96#ibcon#*before write, iclass 5, count 0 2006.229.08:01:07.96#ibcon#enter sib2, iclass 5, count 0 2006.229.08:01:07.96#ibcon#flushed, iclass 5, count 0 2006.229.08:01:07.96#ibcon#about to write, iclass 5, count 0 2006.229.08:01:07.96#ibcon#wrote, iclass 5, count 0 2006.229.08:01:07.96#ibcon#about to read 3, iclass 5, count 0 2006.229.08:01:08.00#ibcon#read 3, iclass 5, count 0 2006.229.08:01:08.00#ibcon#about to read 4, iclass 5, count 0 2006.229.08:01:08.00#ibcon#read 4, iclass 5, count 0 2006.229.08:01:08.00#ibcon#about to read 5, iclass 5, count 0 2006.229.08:01:08.00#ibcon#read 5, iclass 5, count 0 2006.229.08:01:08.00#ibcon#about to read 6, iclass 5, count 0 2006.229.08:01:08.00#ibcon#read 6, iclass 5, count 0 2006.229.08:01:08.00#ibcon#end of sib2, iclass 5, count 0 2006.229.08:01:08.00#ibcon#*after write, iclass 5, count 0 2006.229.08:01:08.00#ibcon#*before return 0, iclass 5, count 0 2006.229.08:01:08.00#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:08.00#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:08.00#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:01:08.00#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:01:08.00$vck44/va=6,4 2006.229.08:01:08.00#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.08:01:08.00#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.08:01:08.00#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:08.00#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:08.06#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:08.06#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:08.06#ibcon#enter wrdev, iclass 7, count 2 2006.229.08:01:08.06#ibcon#first serial, iclass 7, count 2 2006.229.08:01:08.06#ibcon#enter sib2, iclass 7, count 2 2006.229.08:01:08.06#ibcon#flushed, iclass 7, count 2 2006.229.08:01:08.06#ibcon#about to write, iclass 7, count 2 2006.229.08:01:08.06#ibcon#wrote, iclass 7, count 2 2006.229.08:01:08.06#ibcon#about to read 3, iclass 7, count 2 2006.229.08:01:08.08#ibcon#read 3, iclass 7, count 2 2006.229.08:01:08.08#ibcon#about to read 4, iclass 7, count 2 2006.229.08:01:08.08#ibcon#read 4, iclass 7, count 2 2006.229.08:01:08.08#ibcon#about to read 5, iclass 7, count 2 2006.229.08:01:08.08#ibcon#read 5, iclass 7, count 2 2006.229.08:01:08.08#ibcon#about to read 6, iclass 7, count 2 2006.229.08:01:08.08#ibcon#read 6, iclass 7, count 2 2006.229.08:01:08.08#ibcon#end of sib2, iclass 7, count 2 2006.229.08:01:08.08#ibcon#*mode == 0, iclass 7, count 2 2006.229.08:01:08.08#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.08:01:08.08#ibcon#[25=AT06-04\r\n] 2006.229.08:01:08.08#ibcon#*before write, iclass 7, count 2 2006.229.08:01:08.08#ibcon#enter sib2, iclass 7, count 2 2006.229.08:01:08.08#ibcon#flushed, iclass 7, count 2 2006.229.08:01:08.08#ibcon#about to write, iclass 7, count 2 2006.229.08:01:08.08#ibcon#wrote, iclass 7, count 2 2006.229.08:01:08.08#ibcon#about to read 3, iclass 7, count 2 2006.229.08:01:08.11#ibcon#read 3, iclass 7, count 2 2006.229.08:01:08.11#ibcon#about to read 4, iclass 7, count 2 2006.229.08:01:08.11#ibcon#read 4, iclass 7, count 2 2006.229.08:01:08.11#ibcon#about to read 5, iclass 7, count 2 2006.229.08:01:08.11#ibcon#read 5, iclass 7, count 2 2006.229.08:01:08.11#ibcon#about to read 6, iclass 7, count 2 2006.229.08:01:08.11#ibcon#read 6, iclass 7, count 2 2006.229.08:01:08.11#ibcon#end of sib2, iclass 7, count 2 2006.229.08:01:08.11#ibcon#*after write, iclass 7, count 2 2006.229.08:01:08.11#ibcon#*before return 0, iclass 7, count 2 2006.229.08:01:08.11#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:08.11#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:08.11#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.08:01:08.11#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:08.11#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:08.23#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:08.23#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:08.23#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:01:08.23#ibcon#first serial, iclass 7, count 0 2006.229.08:01:08.23#ibcon#enter sib2, iclass 7, count 0 2006.229.08:01:08.23#ibcon#flushed, iclass 7, count 0 2006.229.08:01:08.23#ibcon#about to write, iclass 7, count 0 2006.229.08:01:08.23#ibcon#wrote, iclass 7, count 0 2006.229.08:01:08.23#ibcon#about to read 3, iclass 7, count 0 2006.229.08:01:08.25#ibcon#read 3, iclass 7, count 0 2006.229.08:01:08.25#ibcon#about to read 4, iclass 7, count 0 2006.229.08:01:08.25#ibcon#read 4, iclass 7, count 0 2006.229.08:01:08.25#ibcon#about to read 5, iclass 7, count 0 2006.229.08:01:08.25#ibcon#read 5, iclass 7, count 0 2006.229.08:01:08.25#ibcon#about to read 6, iclass 7, count 0 2006.229.08:01:08.25#ibcon#read 6, iclass 7, count 0 2006.229.08:01:08.25#ibcon#end of sib2, iclass 7, count 0 2006.229.08:01:08.25#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:01:08.25#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:01:08.25#ibcon#[25=USB\r\n] 2006.229.08:01:08.25#ibcon#*before write, iclass 7, count 0 2006.229.08:01:08.25#ibcon#enter sib2, iclass 7, count 0 2006.229.08:01:08.25#ibcon#flushed, iclass 7, count 0 2006.229.08:01:08.25#ibcon#about to write, iclass 7, count 0 2006.229.08:01:08.25#ibcon#wrote, iclass 7, count 0 2006.229.08:01:08.25#ibcon#about to read 3, iclass 7, count 0 2006.229.08:01:08.28#ibcon#read 3, iclass 7, count 0 2006.229.08:01:08.28#ibcon#about to read 4, iclass 7, count 0 2006.229.08:01:08.28#ibcon#read 4, iclass 7, count 0 2006.229.08:01:08.28#ibcon#about to read 5, iclass 7, count 0 2006.229.08:01:08.28#ibcon#read 5, iclass 7, count 0 2006.229.08:01:08.28#ibcon#about to read 6, iclass 7, count 0 2006.229.08:01:08.28#ibcon#read 6, iclass 7, count 0 2006.229.08:01:08.28#ibcon#end of sib2, iclass 7, count 0 2006.229.08:01:08.28#ibcon#*after write, iclass 7, count 0 2006.229.08:01:08.28#ibcon#*before return 0, iclass 7, count 0 2006.229.08:01:08.28#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:08.28#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:08.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:01:08.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:01:08.28$vck44/valo=7,864.99 2006.229.08:01:08.28#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.08:01:08.28#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.08:01:08.28#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:08.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:08.28#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:08.28#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:08.28#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:01:08.28#ibcon#first serial, iclass 11, count 0 2006.229.08:01:08.28#ibcon#enter sib2, iclass 11, count 0 2006.229.08:01:08.28#ibcon#flushed, iclass 11, count 0 2006.229.08:01:08.28#ibcon#about to write, iclass 11, count 0 2006.229.08:01:08.28#ibcon#wrote, iclass 11, count 0 2006.229.08:01:08.28#ibcon#about to read 3, iclass 11, count 0 2006.229.08:01:08.30#ibcon#read 3, iclass 11, count 0 2006.229.08:01:08.30#ibcon#about to read 4, iclass 11, count 0 2006.229.08:01:08.30#ibcon#read 4, iclass 11, count 0 2006.229.08:01:08.30#ibcon#about to read 5, iclass 11, count 0 2006.229.08:01:08.30#ibcon#read 5, iclass 11, count 0 2006.229.08:01:08.30#ibcon#about to read 6, iclass 11, count 0 2006.229.08:01:08.30#ibcon#read 6, iclass 11, count 0 2006.229.08:01:08.30#ibcon#end of sib2, iclass 11, count 0 2006.229.08:01:08.30#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:01:08.30#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:01:08.30#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:01:08.30#ibcon#*before write, iclass 11, count 0 2006.229.08:01:08.30#ibcon#enter sib2, iclass 11, count 0 2006.229.08:01:08.30#ibcon#flushed, iclass 11, count 0 2006.229.08:01:08.30#ibcon#about to write, iclass 11, count 0 2006.229.08:01:08.30#ibcon#wrote, iclass 11, count 0 2006.229.08:01:08.30#ibcon#about to read 3, iclass 11, count 0 2006.229.08:01:08.34#ibcon#read 3, iclass 11, count 0 2006.229.08:01:08.34#ibcon#about to read 4, iclass 11, count 0 2006.229.08:01:08.34#ibcon#read 4, iclass 11, count 0 2006.229.08:01:08.34#ibcon#about to read 5, iclass 11, count 0 2006.229.08:01:08.34#ibcon#read 5, iclass 11, count 0 2006.229.08:01:08.34#ibcon#about to read 6, iclass 11, count 0 2006.229.08:01:08.34#ibcon#read 6, iclass 11, count 0 2006.229.08:01:08.34#ibcon#end of sib2, iclass 11, count 0 2006.229.08:01:08.34#ibcon#*after write, iclass 11, count 0 2006.229.08:01:08.34#ibcon#*before return 0, iclass 11, count 0 2006.229.08:01:08.34#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:08.34#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:08.34#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:01:08.34#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:01:08.34$vck44/va=7,5 2006.229.08:01:08.34#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.08:01:08.34#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.08:01:08.34#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:08.34#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:08.40#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:08.40#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:08.40#ibcon#enter wrdev, iclass 13, count 2 2006.229.08:01:08.40#ibcon#first serial, iclass 13, count 2 2006.229.08:01:08.40#ibcon#enter sib2, iclass 13, count 2 2006.229.08:01:08.40#ibcon#flushed, iclass 13, count 2 2006.229.08:01:08.40#ibcon#about to write, iclass 13, count 2 2006.229.08:01:08.40#ibcon#wrote, iclass 13, count 2 2006.229.08:01:08.40#ibcon#about to read 3, iclass 13, count 2 2006.229.08:01:08.42#ibcon#read 3, iclass 13, count 2 2006.229.08:01:08.42#ibcon#about to read 4, iclass 13, count 2 2006.229.08:01:08.42#ibcon#read 4, iclass 13, count 2 2006.229.08:01:08.42#ibcon#about to read 5, iclass 13, count 2 2006.229.08:01:08.42#ibcon#read 5, iclass 13, count 2 2006.229.08:01:08.42#ibcon#about to read 6, iclass 13, count 2 2006.229.08:01:08.42#ibcon#read 6, iclass 13, count 2 2006.229.08:01:08.42#ibcon#end of sib2, iclass 13, count 2 2006.229.08:01:08.42#ibcon#*mode == 0, iclass 13, count 2 2006.229.08:01:08.42#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.08:01:08.42#ibcon#[25=AT07-05\r\n] 2006.229.08:01:08.42#ibcon#*before write, iclass 13, count 2 2006.229.08:01:08.42#ibcon#enter sib2, iclass 13, count 2 2006.229.08:01:08.42#ibcon#flushed, iclass 13, count 2 2006.229.08:01:08.42#ibcon#about to write, iclass 13, count 2 2006.229.08:01:08.42#ibcon#wrote, iclass 13, count 2 2006.229.08:01:08.42#ibcon#about to read 3, iclass 13, count 2 2006.229.08:01:08.45#ibcon#read 3, iclass 13, count 2 2006.229.08:01:08.45#ibcon#about to read 4, iclass 13, count 2 2006.229.08:01:08.45#ibcon#read 4, iclass 13, count 2 2006.229.08:01:08.45#ibcon#about to read 5, iclass 13, count 2 2006.229.08:01:08.45#ibcon#read 5, iclass 13, count 2 2006.229.08:01:08.45#ibcon#about to read 6, iclass 13, count 2 2006.229.08:01:08.45#ibcon#read 6, iclass 13, count 2 2006.229.08:01:08.45#ibcon#end of sib2, iclass 13, count 2 2006.229.08:01:08.45#ibcon#*after write, iclass 13, count 2 2006.229.08:01:08.45#ibcon#*before return 0, iclass 13, count 2 2006.229.08:01:08.45#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:08.45#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:08.45#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.08:01:08.45#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:08.45#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:08.57#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:08.57#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:08.57#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:01:08.57#ibcon#first serial, iclass 13, count 0 2006.229.08:01:08.57#ibcon#enter sib2, iclass 13, count 0 2006.229.08:01:08.57#ibcon#flushed, iclass 13, count 0 2006.229.08:01:08.57#ibcon#about to write, iclass 13, count 0 2006.229.08:01:08.57#ibcon#wrote, iclass 13, count 0 2006.229.08:01:08.57#ibcon#about to read 3, iclass 13, count 0 2006.229.08:01:08.59#ibcon#read 3, iclass 13, count 0 2006.229.08:01:08.59#ibcon#about to read 4, iclass 13, count 0 2006.229.08:01:08.59#ibcon#read 4, iclass 13, count 0 2006.229.08:01:08.59#ibcon#about to read 5, iclass 13, count 0 2006.229.08:01:08.59#ibcon#read 5, iclass 13, count 0 2006.229.08:01:08.59#ibcon#about to read 6, iclass 13, count 0 2006.229.08:01:08.59#ibcon#read 6, iclass 13, count 0 2006.229.08:01:08.59#ibcon#end of sib2, iclass 13, count 0 2006.229.08:01:08.59#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:01:08.59#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:01:08.59#ibcon#[25=USB\r\n] 2006.229.08:01:08.59#ibcon#*before write, iclass 13, count 0 2006.229.08:01:08.59#ibcon#enter sib2, iclass 13, count 0 2006.229.08:01:08.59#ibcon#flushed, iclass 13, count 0 2006.229.08:01:08.59#ibcon#about to write, iclass 13, count 0 2006.229.08:01:08.59#ibcon#wrote, iclass 13, count 0 2006.229.08:01:08.59#ibcon#about to read 3, iclass 13, count 0 2006.229.08:01:08.62#ibcon#read 3, iclass 13, count 0 2006.229.08:01:08.62#ibcon#about to read 4, iclass 13, count 0 2006.229.08:01:08.62#ibcon#read 4, iclass 13, count 0 2006.229.08:01:08.62#ibcon#about to read 5, iclass 13, count 0 2006.229.08:01:08.62#ibcon#read 5, iclass 13, count 0 2006.229.08:01:08.62#ibcon#about to read 6, iclass 13, count 0 2006.229.08:01:08.62#ibcon#read 6, iclass 13, count 0 2006.229.08:01:08.62#ibcon#end of sib2, iclass 13, count 0 2006.229.08:01:08.62#ibcon#*after write, iclass 13, count 0 2006.229.08:01:08.62#ibcon#*before return 0, iclass 13, count 0 2006.229.08:01:08.62#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:08.62#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:08.62#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:01:08.62#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:01:08.62$vck44/valo=8,884.99 2006.229.08:01:08.62#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.08:01:08.62#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.08:01:08.62#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:08.62#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:08.62#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:08.62#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:08.62#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:01:08.62#ibcon#first serial, iclass 15, count 0 2006.229.08:01:08.62#ibcon#enter sib2, iclass 15, count 0 2006.229.08:01:08.62#ibcon#flushed, iclass 15, count 0 2006.229.08:01:08.62#ibcon#about to write, iclass 15, count 0 2006.229.08:01:08.62#ibcon#wrote, iclass 15, count 0 2006.229.08:01:08.62#ibcon#about to read 3, iclass 15, count 0 2006.229.08:01:08.64#ibcon#read 3, iclass 15, count 0 2006.229.08:01:08.64#ibcon#about to read 4, iclass 15, count 0 2006.229.08:01:08.64#ibcon#read 4, iclass 15, count 0 2006.229.08:01:08.64#ibcon#about to read 5, iclass 15, count 0 2006.229.08:01:08.64#ibcon#read 5, iclass 15, count 0 2006.229.08:01:08.64#ibcon#about to read 6, iclass 15, count 0 2006.229.08:01:08.64#ibcon#read 6, iclass 15, count 0 2006.229.08:01:08.64#ibcon#end of sib2, iclass 15, count 0 2006.229.08:01:08.64#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:01:08.64#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:01:08.64#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:01:08.64#ibcon#*before write, iclass 15, count 0 2006.229.08:01:08.64#ibcon#enter sib2, iclass 15, count 0 2006.229.08:01:08.64#ibcon#flushed, iclass 15, count 0 2006.229.08:01:08.64#ibcon#about to write, iclass 15, count 0 2006.229.08:01:08.64#ibcon#wrote, iclass 15, count 0 2006.229.08:01:08.64#ibcon#about to read 3, iclass 15, count 0 2006.229.08:01:08.68#ibcon#read 3, iclass 15, count 0 2006.229.08:01:08.68#ibcon#about to read 4, iclass 15, count 0 2006.229.08:01:08.68#ibcon#read 4, iclass 15, count 0 2006.229.08:01:08.68#ibcon#about to read 5, iclass 15, count 0 2006.229.08:01:08.68#ibcon#read 5, iclass 15, count 0 2006.229.08:01:08.68#ibcon#about to read 6, iclass 15, count 0 2006.229.08:01:08.68#ibcon#read 6, iclass 15, count 0 2006.229.08:01:08.68#ibcon#end of sib2, iclass 15, count 0 2006.229.08:01:08.68#ibcon#*after write, iclass 15, count 0 2006.229.08:01:08.68#ibcon#*before return 0, iclass 15, count 0 2006.229.08:01:08.68#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:08.68#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:08.68#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:01:08.68#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:01:08.68$vck44/va=8,6 2006.229.08:01:08.68#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.08:01:08.68#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.08:01:08.68#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:08.68#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:01:08.74#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:01:08.74#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:01:08.74#ibcon#enter wrdev, iclass 17, count 2 2006.229.08:01:08.74#ibcon#first serial, iclass 17, count 2 2006.229.08:01:08.74#ibcon#enter sib2, iclass 17, count 2 2006.229.08:01:08.74#ibcon#flushed, iclass 17, count 2 2006.229.08:01:08.74#ibcon#about to write, iclass 17, count 2 2006.229.08:01:08.74#ibcon#wrote, iclass 17, count 2 2006.229.08:01:08.74#ibcon#about to read 3, iclass 17, count 2 2006.229.08:01:08.76#ibcon#read 3, iclass 17, count 2 2006.229.08:01:08.76#ibcon#about to read 4, iclass 17, count 2 2006.229.08:01:08.76#ibcon#read 4, iclass 17, count 2 2006.229.08:01:08.76#ibcon#about to read 5, iclass 17, count 2 2006.229.08:01:08.76#ibcon#read 5, iclass 17, count 2 2006.229.08:01:08.76#ibcon#about to read 6, iclass 17, count 2 2006.229.08:01:08.76#ibcon#read 6, iclass 17, count 2 2006.229.08:01:08.76#ibcon#end of sib2, iclass 17, count 2 2006.229.08:01:08.76#ibcon#*mode == 0, iclass 17, count 2 2006.229.08:01:08.76#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.08:01:08.76#ibcon#[25=AT08-06\r\n] 2006.229.08:01:08.76#ibcon#*before write, iclass 17, count 2 2006.229.08:01:08.76#ibcon#enter sib2, iclass 17, count 2 2006.229.08:01:08.76#ibcon#flushed, iclass 17, count 2 2006.229.08:01:08.76#ibcon#about to write, iclass 17, count 2 2006.229.08:01:08.76#ibcon#wrote, iclass 17, count 2 2006.229.08:01:08.76#ibcon#about to read 3, iclass 17, count 2 2006.229.08:01:08.79#ibcon#read 3, iclass 17, count 2 2006.229.08:01:08.79#ibcon#about to read 4, iclass 17, count 2 2006.229.08:01:08.79#ibcon#read 4, iclass 17, count 2 2006.229.08:01:08.79#ibcon#about to read 5, iclass 17, count 2 2006.229.08:01:08.79#ibcon#read 5, iclass 17, count 2 2006.229.08:01:08.79#ibcon#about to read 6, iclass 17, count 2 2006.229.08:01:08.79#ibcon#read 6, iclass 17, count 2 2006.229.08:01:08.79#ibcon#end of sib2, iclass 17, count 2 2006.229.08:01:08.79#ibcon#*after write, iclass 17, count 2 2006.229.08:01:08.79#ibcon#*before return 0, iclass 17, count 2 2006.229.08:01:08.79#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:01:08.79#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:01:08.79#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.08:01:08.79#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:08.79#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:01:08.91#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:01:08.91#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:01:08.91#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:01:08.91#ibcon#first serial, iclass 17, count 0 2006.229.08:01:08.91#ibcon#enter sib2, iclass 17, count 0 2006.229.08:01:08.91#ibcon#flushed, iclass 17, count 0 2006.229.08:01:08.91#ibcon#about to write, iclass 17, count 0 2006.229.08:01:08.91#ibcon#wrote, iclass 17, count 0 2006.229.08:01:08.91#ibcon#about to read 3, iclass 17, count 0 2006.229.08:01:08.93#ibcon#read 3, iclass 17, count 0 2006.229.08:01:08.93#ibcon#about to read 4, iclass 17, count 0 2006.229.08:01:08.93#ibcon#read 4, iclass 17, count 0 2006.229.08:01:08.93#ibcon#about to read 5, iclass 17, count 0 2006.229.08:01:08.93#ibcon#read 5, iclass 17, count 0 2006.229.08:01:08.93#ibcon#about to read 6, iclass 17, count 0 2006.229.08:01:08.93#ibcon#read 6, iclass 17, count 0 2006.229.08:01:08.93#ibcon#end of sib2, iclass 17, count 0 2006.229.08:01:08.93#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:01:08.93#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:01:08.93#ibcon#[25=USB\r\n] 2006.229.08:01:08.93#ibcon#*before write, iclass 17, count 0 2006.229.08:01:08.93#ibcon#enter sib2, iclass 17, count 0 2006.229.08:01:08.93#ibcon#flushed, iclass 17, count 0 2006.229.08:01:08.93#ibcon#about to write, iclass 17, count 0 2006.229.08:01:08.93#ibcon#wrote, iclass 17, count 0 2006.229.08:01:08.93#ibcon#about to read 3, iclass 17, count 0 2006.229.08:01:08.96#ibcon#read 3, iclass 17, count 0 2006.229.08:01:08.96#ibcon#about to read 4, iclass 17, count 0 2006.229.08:01:08.96#ibcon#read 4, iclass 17, count 0 2006.229.08:01:08.96#ibcon#about to read 5, iclass 17, count 0 2006.229.08:01:08.96#ibcon#read 5, iclass 17, count 0 2006.229.08:01:08.96#ibcon#about to read 6, iclass 17, count 0 2006.229.08:01:08.96#ibcon#read 6, iclass 17, count 0 2006.229.08:01:08.96#ibcon#end of sib2, iclass 17, count 0 2006.229.08:01:08.96#ibcon#*after write, iclass 17, count 0 2006.229.08:01:08.96#ibcon#*before return 0, iclass 17, count 0 2006.229.08:01:08.96#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:01:08.96#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:01:08.96#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:01:08.96#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:01:08.96$vck44/vblo=1,629.99 2006.229.08:01:08.96#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.08:01:08.96#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.08:01:08.96#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:08.96#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:08.96#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:08.96#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:08.96#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:01:08.96#ibcon#first serial, iclass 19, count 0 2006.229.08:01:08.96#ibcon#enter sib2, iclass 19, count 0 2006.229.08:01:08.96#ibcon#flushed, iclass 19, count 0 2006.229.08:01:08.96#ibcon#about to write, iclass 19, count 0 2006.229.08:01:08.96#ibcon#wrote, iclass 19, count 0 2006.229.08:01:08.96#ibcon#about to read 3, iclass 19, count 0 2006.229.08:01:08.98#ibcon#read 3, iclass 19, count 0 2006.229.08:01:08.98#ibcon#about to read 4, iclass 19, count 0 2006.229.08:01:08.98#ibcon#read 4, iclass 19, count 0 2006.229.08:01:08.98#ibcon#about to read 5, iclass 19, count 0 2006.229.08:01:08.98#ibcon#read 5, iclass 19, count 0 2006.229.08:01:08.98#ibcon#about to read 6, iclass 19, count 0 2006.229.08:01:08.98#ibcon#read 6, iclass 19, count 0 2006.229.08:01:08.98#ibcon#end of sib2, iclass 19, count 0 2006.229.08:01:08.98#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:01:08.98#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:01:08.98#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:01:08.98#ibcon#*before write, iclass 19, count 0 2006.229.08:01:08.98#ibcon#enter sib2, iclass 19, count 0 2006.229.08:01:08.98#ibcon#flushed, iclass 19, count 0 2006.229.08:01:08.98#ibcon#about to write, iclass 19, count 0 2006.229.08:01:08.98#ibcon#wrote, iclass 19, count 0 2006.229.08:01:08.98#ibcon#about to read 3, iclass 19, count 0 2006.229.08:01:09.02#ibcon#read 3, iclass 19, count 0 2006.229.08:01:09.02#ibcon#about to read 4, iclass 19, count 0 2006.229.08:01:09.02#ibcon#read 4, iclass 19, count 0 2006.229.08:01:09.02#ibcon#about to read 5, iclass 19, count 0 2006.229.08:01:09.02#ibcon#read 5, iclass 19, count 0 2006.229.08:01:09.02#ibcon#about to read 6, iclass 19, count 0 2006.229.08:01:09.02#ibcon#read 6, iclass 19, count 0 2006.229.08:01:09.02#ibcon#end of sib2, iclass 19, count 0 2006.229.08:01:09.02#ibcon#*after write, iclass 19, count 0 2006.229.08:01:09.02#ibcon#*before return 0, iclass 19, count 0 2006.229.08:01:09.02#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:09.02#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:01:09.02#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:01:09.02#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:01:09.02$vck44/vb=1,4 2006.229.08:01:09.02#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.08:01:09.02#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.08:01:09.02#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:09.02#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:09.02#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:09.02#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:09.02#ibcon#enter wrdev, iclass 21, count 2 2006.229.08:01:09.02#ibcon#first serial, iclass 21, count 2 2006.229.08:01:09.02#ibcon#enter sib2, iclass 21, count 2 2006.229.08:01:09.02#ibcon#flushed, iclass 21, count 2 2006.229.08:01:09.02#ibcon#about to write, iclass 21, count 2 2006.229.08:01:09.02#ibcon#wrote, iclass 21, count 2 2006.229.08:01:09.02#ibcon#about to read 3, iclass 21, count 2 2006.229.08:01:09.04#ibcon#read 3, iclass 21, count 2 2006.229.08:01:09.04#ibcon#about to read 4, iclass 21, count 2 2006.229.08:01:09.04#ibcon#read 4, iclass 21, count 2 2006.229.08:01:09.04#ibcon#about to read 5, iclass 21, count 2 2006.229.08:01:09.04#ibcon#read 5, iclass 21, count 2 2006.229.08:01:09.04#ibcon#about to read 6, iclass 21, count 2 2006.229.08:01:09.04#ibcon#read 6, iclass 21, count 2 2006.229.08:01:09.04#ibcon#end of sib2, iclass 21, count 2 2006.229.08:01:09.04#ibcon#*mode == 0, iclass 21, count 2 2006.229.08:01:09.04#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.08:01:09.04#ibcon#[27=AT01-04\r\n] 2006.229.08:01:09.04#ibcon#*before write, iclass 21, count 2 2006.229.08:01:09.04#ibcon#enter sib2, iclass 21, count 2 2006.229.08:01:09.04#ibcon#flushed, iclass 21, count 2 2006.229.08:01:09.04#ibcon#about to write, iclass 21, count 2 2006.229.08:01:09.04#ibcon#wrote, iclass 21, count 2 2006.229.08:01:09.04#ibcon#about to read 3, iclass 21, count 2 2006.229.08:01:09.07#ibcon#read 3, iclass 21, count 2 2006.229.08:01:09.07#ibcon#about to read 4, iclass 21, count 2 2006.229.08:01:09.07#ibcon#read 4, iclass 21, count 2 2006.229.08:01:09.07#ibcon#about to read 5, iclass 21, count 2 2006.229.08:01:09.07#ibcon#read 5, iclass 21, count 2 2006.229.08:01:09.07#ibcon#about to read 6, iclass 21, count 2 2006.229.08:01:09.07#ibcon#read 6, iclass 21, count 2 2006.229.08:01:09.07#ibcon#end of sib2, iclass 21, count 2 2006.229.08:01:09.07#ibcon#*after write, iclass 21, count 2 2006.229.08:01:09.07#ibcon#*before return 0, iclass 21, count 2 2006.229.08:01:09.07#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:09.07#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:01:09.07#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.08:01:09.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:09.07#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:09.19#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:09.19#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:09.19#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:01:09.19#ibcon#first serial, iclass 21, count 0 2006.229.08:01:09.19#ibcon#enter sib2, iclass 21, count 0 2006.229.08:01:09.19#ibcon#flushed, iclass 21, count 0 2006.229.08:01:09.19#ibcon#about to write, iclass 21, count 0 2006.229.08:01:09.19#ibcon#wrote, iclass 21, count 0 2006.229.08:01:09.19#ibcon#about to read 3, iclass 21, count 0 2006.229.08:01:09.21#ibcon#read 3, iclass 21, count 0 2006.229.08:01:09.21#ibcon#about to read 4, iclass 21, count 0 2006.229.08:01:09.21#ibcon#read 4, iclass 21, count 0 2006.229.08:01:09.21#ibcon#about to read 5, iclass 21, count 0 2006.229.08:01:09.21#ibcon#read 5, iclass 21, count 0 2006.229.08:01:09.21#ibcon#about to read 6, iclass 21, count 0 2006.229.08:01:09.21#ibcon#read 6, iclass 21, count 0 2006.229.08:01:09.21#ibcon#end of sib2, iclass 21, count 0 2006.229.08:01:09.21#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:01:09.21#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:01:09.21#ibcon#[27=USB\r\n] 2006.229.08:01:09.21#ibcon#*before write, iclass 21, count 0 2006.229.08:01:09.21#ibcon#enter sib2, iclass 21, count 0 2006.229.08:01:09.21#ibcon#flushed, iclass 21, count 0 2006.229.08:01:09.21#ibcon#about to write, iclass 21, count 0 2006.229.08:01:09.21#ibcon#wrote, iclass 21, count 0 2006.229.08:01:09.21#ibcon#about to read 3, iclass 21, count 0 2006.229.08:01:09.24#ibcon#read 3, iclass 21, count 0 2006.229.08:01:09.24#ibcon#about to read 4, iclass 21, count 0 2006.229.08:01:09.24#ibcon#read 4, iclass 21, count 0 2006.229.08:01:09.24#ibcon#about to read 5, iclass 21, count 0 2006.229.08:01:09.24#ibcon#read 5, iclass 21, count 0 2006.229.08:01:09.24#ibcon#about to read 6, iclass 21, count 0 2006.229.08:01:09.24#ibcon#read 6, iclass 21, count 0 2006.229.08:01:09.24#ibcon#end of sib2, iclass 21, count 0 2006.229.08:01:09.24#ibcon#*after write, iclass 21, count 0 2006.229.08:01:09.24#ibcon#*before return 0, iclass 21, count 0 2006.229.08:01:09.24#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:09.24#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:01:09.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:01:09.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:01:09.24$vck44/vblo=2,634.99 2006.229.08:01:09.24#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.08:01:09.24#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.08:01:09.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:09.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:09.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:09.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:09.24#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:01:09.24#ibcon#first serial, iclass 23, count 0 2006.229.08:01:09.24#ibcon#enter sib2, iclass 23, count 0 2006.229.08:01:09.24#ibcon#flushed, iclass 23, count 0 2006.229.08:01:09.24#ibcon#about to write, iclass 23, count 0 2006.229.08:01:09.24#ibcon#wrote, iclass 23, count 0 2006.229.08:01:09.24#ibcon#about to read 3, iclass 23, count 0 2006.229.08:01:09.26#ibcon#read 3, iclass 23, count 0 2006.229.08:01:09.26#ibcon#about to read 4, iclass 23, count 0 2006.229.08:01:09.26#ibcon#read 4, iclass 23, count 0 2006.229.08:01:09.26#ibcon#about to read 5, iclass 23, count 0 2006.229.08:01:09.26#ibcon#read 5, iclass 23, count 0 2006.229.08:01:09.26#ibcon#about to read 6, iclass 23, count 0 2006.229.08:01:09.26#ibcon#read 6, iclass 23, count 0 2006.229.08:01:09.26#ibcon#end of sib2, iclass 23, count 0 2006.229.08:01:09.26#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:01:09.26#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:01:09.26#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:01:09.26#ibcon#*before write, iclass 23, count 0 2006.229.08:01:09.26#ibcon#enter sib2, iclass 23, count 0 2006.229.08:01:09.26#ibcon#flushed, iclass 23, count 0 2006.229.08:01:09.26#ibcon#about to write, iclass 23, count 0 2006.229.08:01:09.26#ibcon#wrote, iclass 23, count 0 2006.229.08:01:09.26#ibcon#about to read 3, iclass 23, count 0 2006.229.08:01:09.30#ibcon#read 3, iclass 23, count 0 2006.229.08:01:09.30#ibcon#about to read 4, iclass 23, count 0 2006.229.08:01:09.30#ibcon#read 4, iclass 23, count 0 2006.229.08:01:09.30#ibcon#about to read 5, iclass 23, count 0 2006.229.08:01:09.30#ibcon#read 5, iclass 23, count 0 2006.229.08:01:09.30#ibcon#about to read 6, iclass 23, count 0 2006.229.08:01:09.30#ibcon#read 6, iclass 23, count 0 2006.229.08:01:09.30#ibcon#end of sib2, iclass 23, count 0 2006.229.08:01:09.30#ibcon#*after write, iclass 23, count 0 2006.229.08:01:09.30#ibcon#*before return 0, iclass 23, count 0 2006.229.08:01:09.30#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:09.30#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:01:09.30#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:01:09.30#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:01:09.30$vck44/vb=2,4 2006.229.08:01:09.30#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.08:01:09.30#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.08:01:09.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:09.30#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:09.36#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:09.36#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:09.36#ibcon#enter wrdev, iclass 25, count 2 2006.229.08:01:09.36#ibcon#first serial, iclass 25, count 2 2006.229.08:01:09.36#ibcon#enter sib2, iclass 25, count 2 2006.229.08:01:09.36#ibcon#flushed, iclass 25, count 2 2006.229.08:01:09.36#ibcon#about to write, iclass 25, count 2 2006.229.08:01:09.36#ibcon#wrote, iclass 25, count 2 2006.229.08:01:09.36#ibcon#about to read 3, iclass 25, count 2 2006.229.08:01:09.38#ibcon#read 3, iclass 25, count 2 2006.229.08:01:09.38#ibcon#about to read 4, iclass 25, count 2 2006.229.08:01:09.38#ibcon#read 4, iclass 25, count 2 2006.229.08:01:09.38#ibcon#about to read 5, iclass 25, count 2 2006.229.08:01:09.38#ibcon#read 5, iclass 25, count 2 2006.229.08:01:09.38#ibcon#about to read 6, iclass 25, count 2 2006.229.08:01:09.38#ibcon#read 6, iclass 25, count 2 2006.229.08:01:09.38#ibcon#end of sib2, iclass 25, count 2 2006.229.08:01:09.38#ibcon#*mode == 0, iclass 25, count 2 2006.229.08:01:09.38#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.08:01:09.38#ibcon#[27=AT02-04\r\n] 2006.229.08:01:09.38#ibcon#*before write, iclass 25, count 2 2006.229.08:01:09.38#ibcon#enter sib2, iclass 25, count 2 2006.229.08:01:09.38#ibcon#flushed, iclass 25, count 2 2006.229.08:01:09.38#ibcon#about to write, iclass 25, count 2 2006.229.08:01:09.38#ibcon#wrote, iclass 25, count 2 2006.229.08:01:09.38#ibcon#about to read 3, iclass 25, count 2 2006.229.08:01:09.41#ibcon#read 3, iclass 25, count 2 2006.229.08:01:09.41#ibcon#about to read 4, iclass 25, count 2 2006.229.08:01:09.41#ibcon#read 4, iclass 25, count 2 2006.229.08:01:09.41#ibcon#about to read 5, iclass 25, count 2 2006.229.08:01:09.41#ibcon#read 5, iclass 25, count 2 2006.229.08:01:09.41#ibcon#about to read 6, iclass 25, count 2 2006.229.08:01:09.41#ibcon#read 6, iclass 25, count 2 2006.229.08:01:09.41#ibcon#end of sib2, iclass 25, count 2 2006.229.08:01:09.41#ibcon#*after write, iclass 25, count 2 2006.229.08:01:09.41#ibcon#*before return 0, iclass 25, count 2 2006.229.08:01:09.41#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:09.41#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:01:09.41#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.08:01:09.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:09.41#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:09.53#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:09.53#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:09.53#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:01:09.53#ibcon#first serial, iclass 25, count 0 2006.229.08:01:09.53#ibcon#enter sib2, iclass 25, count 0 2006.229.08:01:09.53#ibcon#flushed, iclass 25, count 0 2006.229.08:01:09.53#ibcon#about to write, iclass 25, count 0 2006.229.08:01:09.53#ibcon#wrote, iclass 25, count 0 2006.229.08:01:09.53#ibcon#about to read 3, iclass 25, count 0 2006.229.08:01:09.55#ibcon#read 3, iclass 25, count 0 2006.229.08:01:09.55#ibcon#about to read 4, iclass 25, count 0 2006.229.08:01:09.55#ibcon#read 4, iclass 25, count 0 2006.229.08:01:09.55#ibcon#about to read 5, iclass 25, count 0 2006.229.08:01:09.55#ibcon#read 5, iclass 25, count 0 2006.229.08:01:09.55#ibcon#about to read 6, iclass 25, count 0 2006.229.08:01:09.55#ibcon#read 6, iclass 25, count 0 2006.229.08:01:09.55#ibcon#end of sib2, iclass 25, count 0 2006.229.08:01:09.55#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:01:09.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:01:09.55#ibcon#[27=USB\r\n] 2006.229.08:01:09.55#ibcon#*before write, iclass 25, count 0 2006.229.08:01:09.55#ibcon#enter sib2, iclass 25, count 0 2006.229.08:01:09.55#ibcon#flushed, iclass 25, count 0 2006.229.08:01:09.55#ibcon#about to write, iclass 25, count 0 2006.229.08:01:09.55#ibcon#wrote, iclass 25, count 0 2006.229.08:01:09.55#ibcon#about to read 3, iclass 25, count 0 2006.229.08:01:09.58#ibcon#read 3, iclass 25, count 0 2006.229.08:01:09.58#ibcon#about to read 4, iclass 25, count 0 2006.229.08:01:09.58#ibcon#read 4, iclass 25, count 0 2006.229.08:01:09.58#ibcon#about to read 5, iclass 25, count 0 2006.229.08:01:09.58#ibcon#read 5, iclass 25, count 0 2006.229.08:01:09.58#ibcon#about to read 6, iclass 25, count 0 2006.229.08:01:09.58#ibcon#read 6, iclass 25, count 0 2006.229.08:01:09.58#ibcon#end of sib2, iclass 25, count 0 2006.229.08:01:09.58#ibcon#*after write, iclass 25, count 0 2006.229.08:01:09.58#ibcon#*before return 0, iclass 25, count 0 2006.229.08:01:09.58#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:09.58#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:01:09.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:01:09.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:01:09.58$vck44/vblo=3,649.99 2006.229.08:01:09.58#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.08:01:09.58#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.08:01:09.58#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:09.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:09.58#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:09.58#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:09.58#ibcon#enter wrdev, iclass 27, count 0 2006.229.08:01:09.58#ibcon#first serial, iclass 27, count 0 2006.229.08:01:09.58#ibcon#enter sib2, iclass 27, count 0 2006.229.08:01:09.58#ibcon#flushed, iclass 27, count 0 2006.229.08:01:09.58#ibcon#about to write, iclass 27, count 0 2006.229.08:01:09.58#ibcon#wrote, iclass 27, count 0 2006.229.08:01:09.58#ibcon#about to read 3, iclass 27, count 0 2006.229.08:01:09.60#ibcon#read 3, iclass 27, count 0 2006.229.08:01:09.60#ibcon#about to read 4, iclass 27, count 0 2006.229.08:01:09.60#ibcon#read 4, iclass 27, count 0 2006.229.08:01:09.60#ibcon#about to read 5, iclass 27, count 0 2006.229.08:01:09.60#ibcon#read 5, iclass 27, count 0 2006.229.08:01:09.60#ibcon#about to read 6, iclass 27, count 0 2006.229.08:01:09.60#ibcon#read 6, iclass 27, count 0 2006.229.08:01:09.60#ibcon#end of sib2, iclass 27, count 0 2006.229.08:01:09.60#ibcon#*mode == 0, iclass 27, count 0 2006.229.08:01:09.60#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.08:01:09.60#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:01:09.60#ibcon#*before write, iclass 27, count 0 2006.229.08:01:09.60#ibcon#enter sib2, iclass 27, count 0 2006.229.08:01:09.60#ibcon#flushed, iclass 27, count 0 2006.229.08:01:09.60#ibcon#about to write, iclass 27, count 0 2006.229.08:01:09.60#ibcon#wrote, iclass 27, count 0 2006.229.08:01:09.60#ibcon#about to read 3, iclass 27, count 0 2006.229.08:01:09.64#ibcon#read 3, iclass 27, count 0 2006.229.08:01:09.64#ibcon#about to read 4, iclass 27, count 0 2006.229.08:01:09.64#ibcon#read 4, iclass 27, count 0 2006.229.08:01:09.64#ibcon#about to read 5, iclass 27, count 0 2006.229.08:01:09.64#ibcon#read 5, iclass 27, count 0 2006.229.08:01:09.64#ibcon#about to read 6, iclass 27, count 0 2006.229.08:01:09.64#ibcon#read 6, iclass 27, count 0 2006.229.08:01:09.64#ibcon#end of sib2, iclass 27, count 0 2006.229.08:01:09.64#ibcon#*after write, iclass 27, count 0 2006.229.08:01:09.64#ibcon#*before return 0, iclass 27, count 0 2006.229.08:01:09.64#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:09.64#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:01:09.64#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.08:01:09.64#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.08:01:09.64$vck44/vb=3,4 2006.229.08:01:09.64#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.08:01:09.64#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.08:01:09.64#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:09.64#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:09.70#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:09.70#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:09.70#ibcon#enter wrdev, iclass 29, count 2 2006.229.08:01:09.70#ibcon#first serial, iclass 29, count 2 2006.229.08:01:09.70#ibcon#enter sib2, iclass 29, count 2 2006.229.08:01:09.70#ibcon#flushed, iclass 29, count 2 2006.229.08:01:09.70#ibcon#about to write, iclass 29, count 2 2006.229.08:01:09.70#ibcon#wrote, iclass 29, count 2 2006.229.08:01:09.70#ibcon#about to read 3, iclass 29, count 2 2006.229.08:01:09.72#ibcon#read 3, iclass 29, count 2 2006.229.08:01:09.72#ibcon#about to read 4, iclass 29, count 2 2006.229.08:01:09.72#ibcon#read 4, iclass 29, count 2 2006.229.08:01:09.72#ibcon#about to read 5, iclass 29, count 2 2006.229.08:01:09.72#ibcon#read 5, iclass 29, count 2 2006.229.08:01:09.72#ibcon#about to read 6, iclass 29, count 2 2006.229.08:01:09.72#ibcon#read 6, iclass 29, count 2 2006.229.08:01:09.72#ibcon#end of sib2, iclass 29, count 2 2006.229.08:01:09.72#ibcon#*mode == 0, iclass 29, count 2 2006.229.08:01:09.72#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.08:01:09.72#ibcon#[27=AT03-04\r\n] 2006.229.08:01:09.72#ibcon#*before write, iclass 29, count 2 2006.229.08:01:09.72#ibcon#enter sib2, iclass 29, count 2 2006.229.08:01:09.72#ibcon#flushed, iclass 29, count 2 2006.229.08:01:09.72#ibcon#about to write, iclass 29, count 2 2006.229.08:01:09.72#ibcon#wrote, iclass 29, count 2 2006.229.08:01:09.72#ibcon#about to read 3, iclass 29, count 2 2006.229.08:01:09.75#ibcon#read 3, iclass 29, count 2 2006.229.08:01:09.75#ibcon#about to read 4, iclass 29, count 2 2006.229.08:01:09.75#ibcon#read 4, iclass 29, count 2 2006.229.08:01:09.75#ibcon#about to read 5, iclass 29, count 2 2006.229.08:01:09.75#ibcon#read 5, iclass 29, count 2 2006.229.08:01:09.75#ibcon#about to read 6, iclass 29, count 2 2006.229.08:01:09.75#ibcon#read 6, iclass 29, count 2 2006.229.08:01:09.75#ibcon#end of sib2, iclass 29, count 2 2006.229.08:01:09.75#ibcon#*after write, iclass 29, count 2 2006.229.08:01:09.75#ibcon#*before return 0, iclass 29, count 2 2006.229.08:01:09.75#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:09.75#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:01:09.75#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.08:01:09.75#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:09.75#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:09.87#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:09.87#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:09.87#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:01:09.87#ibcon#first serial, iclass 29, count 0 2006.229.08:01:09.87#ibcon#enter sib2, iclass 29, count 0 2006.229.08:01:09.87#ibcon#flushed, iclass 29, count 0 2006.229.08:01:09.87#ibcon#about to write, iclass 29, count 0 2006.229.08:01:09.87#ibcon#wrote, iclass 29, count 0 2006.229.08:01:09.87#ibcon#about to read 3, iclass 29, count 0 2006.229.08:01:09.89#ibcon#read 3, iclass 29, count 0 2006.229.08:01:09.89#ibcon#about to read 4, iclass 29, count 0 2006.229.08:01:09.89#ibcon#read 4, iclass 29, count 0 2006.229.08:01:09.89#ibcon#about to read 5, iclass 29, count 0 2006.229.08:01:09.89#ibcon#read 5, iclass 29, count 0 2006.229.08:01:09.89#ibcon#about to read 6, iclass 29, count 0 2006.229.08:01:09.89#ibcon#read 6, iclass 29, count 0 2006.229.08:01:09.89#ibcon#end of sib2, iclass 29, count 0 2006.229.08:01:09.89#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:01:09.89#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:01:09.89#ibcon#[27=USB\r\n] 2006.229.08:01:09.89#ibcon#*before write, iclass 29, count 0 2006.229.08:01:09.89#ibcon#enter sib2, iclass 29, count 0 2006.229.08:01:09.89#ibcon#flushed, iclass 29, count 0 2006.229.08:01:09.89#ibcon#about to write, iclass 29, count 0 2006.229.08:01:09.89#ibcon#wrote, iclass 29, count 0 2006.229.08:01:09.89#ibcon#about to read 3, iclass 29, count 0 2006.229.08:01:09.92#ibcon#read 3, iclass 29, count 0 2006.229.08:01:09.92#ibcon#about to read 4, iclass 29, count 0 2006.229.08:01:09.92#ibcon#read 4, iclass 29, count 0 2006.229.08:01:09.92#ibcon#about to read 5, iclass 29, count 0 2006.229.08:01:09.92#ibcon#read 5, iclass 29, count 0 2006.229.08:01:09.92#ibcon#about to read 6, iclass 29, count 0 2006.229.08:01:09.92#ibcon#read 6, iclass 29, count 0 2006.229.08:01:09.92#ibcon#end of sib2, iclass 29, count 0 2006.229.08:01:09.92#ibcon#*after write, iclass 29, count 0 2006.229.08:01:09.92#ibcon#*before return 0, iclass 29, count 0 2006.229.08:01:09.92#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:09.92#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:01:09.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:01:09.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:01:09.92$vck44/vblo=4,679.99 2006.229.08:01:09.92#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.08:01:09.92#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.08:01:09.92#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:09.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:09.92#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:09.92#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:09.92#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:01:09.92#ibcon#first serial, iclass 31, count 0 2006.229.08:01:09.92#ibcon#enter sib2, iclass 31, count 0 2006.229.08:01:09.92#ibcon#flushed, iclass 31, count 0 2006.229.08:01:09.92#ibcon#about to write, iclass 31, count 0 2006.229.08:01:09.92#ibcon#wrote, iclass 31, count 0 2006.229.08:01:09.92#ibcon#about to read 3, iclass 31, count 0 2006.229.08:01:09.94#ibcon#read 3, iclass 31, count 0 2006.229.08:01:09.94#ibcon#about to read 4, iclass 31, count 0 2006.229.08:01:09.94#ibcon#read 4, iclass 31, count 0 2006.229.08:01:09.94#ibcon#about to read 5, iclass 31, count 0 2006.229.08:01:09.94#ibcon#read 5, iclass 31, count 0 2006.229.08:01:09.94#ibcon#about to read 6, iclass 31, count 0 2006.229.08:01:09.94#ibcon#read 6, iclass 31, count 0 2006.229.08:01:09.94#ibcon#end of sib2, iclass 31, count 0 2006.229.08:01:09.94#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:01:09.94#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:01:09.94#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:01:09.94#ibcon#*before write, iclass 31, count 0 2006.229.08:01:09.94#ibcon#enter sib2, iclass 31, count 0 2006.229.08:01:09.94#ibcon#flushed, iclass 31, count 0 2006.229.08:01:09.94#ibcon#about to write, iclass 31, count 0 2006.229.08:01:09.94#ibcon#wrote, iclass 31, count 0 2006.229.08:01:09.94#ibcon#about to read 3, iclass 31, count 0 2006.229.08:01:09.98#ibcon#read 3, iclass 31, count 0 2006.229.08:01:09.98#ibcon#about to read 4, iclass 31, count 0 2006.229.08:01:09.98#ibcon#read 4, iclass 31, count 0 2006.229.08:01:09.98#ibcon#about to read 5, iclass 31, count 0 2006.229.08:01:09.98#ibcon#read 5, iclass 31, count 0 2006.229.08:01:09.98#ibcon#about to read 6, iclass 31, count 0 2006.229.08:01:09.98#ibcon#read 6, iclass 31, count 0 2006.229.08:01:09.98#ibcon#end of sib2, iclass 31, count 0 2006.229.08:01:09.98#ibcon#*after write, iclass 31, count 0 2006.229.08:01:09.98#ibcon#*before return 0, iclass 31, count 0 2006.229.08:01:09.98#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:09.98#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:01:09.98#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:01:09.98#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:01:09.98$vck44/vb=4,4 2006.229.08:01:09.98#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.08:01:09.98#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.08:01:09.98#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:09.98#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:10.04#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:10.04#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:10.04#ibcon#enter wrdev, iclass 33, count 2 2006.229.08:01:10.04#ibcon#first serial, iclass 33, count 2 2006.229.08:01:10.04#ibcon#enter sib2, iclass 33, count 2 2006.229.08:01:10.04#ibcon#flushed, iclass 33, count 2 2006.229.08:01:10.04#ibcon#about to write, iclass 33, count 2 2006.229.08:01:10.04#ibcon#wrote, iclass 33, count 2 2006.229.08:01:10.04#ibcon#about to read 3, iclass 33, count 2 2006.229.08:01:10.06#ibcon#read 3, iclass 33, count 2 2006.229.08:01:10.06#ibcon#about to read 4, iclass 33, count 2 2006.229.08:01:10.06#ibcon#read 4, iclass 33, count 2 2006.229.08:01:10.06#ibcon#about to read 5, iclass 33, count 2 2006.229.08:01:10.06#ibcon#read 5, iclass 33, count 2 2006.229.08:01:10.06#ibcon#about to read 6, iclass 33, count 2 2006.229.08:01:10.06#ibcon#read 6, iclass 33, count 2 2006.229.08:01:10.06#ibcon#end of sib2, iclass 33, count 2 2006.229.08:01:10.06#ibcon#*mode == 0, iclass 33, count 2 2006.229.08:01:10.06#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.08:01:10.06#ibcon#[27=AT04-04\r\n] 2006.229.08:01:10.06#ibcon#*before write, iclass 33, count 2 2006.229.08:01:10.06#ibcon#enter sib2, iclass 33, count 2 2006.229.08:01:10.06#ibcon#flushed, iclass 33, count 2 2006.229.08:01:10.06#ibcon#about to write, iclass 33, count 2 2006.229.08:01:10.06#ibcon#wrote, iclass 33, count 2 2006.229.08:01:10.06#ibcon#about to read 3, iclass 33, count 2 2006.229.08:01:10.09#ibcon#read 3, iclass 33, count 2 2006.229.08:01:10.09#ibcon#about to read 4, iclass 33, count 2 2006.229.08:01:10.09#ibcon#read 4, iclass 33, count 2 2006.229.08:01:10.09#ibcon#about to read 5, iclass 33, count 2 2006.229.08:01:10.09#ibcon#read 5, iclass 33, count 2 2006.229.08:01:10.09#ibcon#about to read 6, iclass 33, count 2 2006.229.08:01:10.09#ibcon#read 6, iclass 33, count 2 2006.229.08:01:10.09#ibcon#end of sib2, iclass 33, count 2 2006.229.08:01:10.09#ibcon#*after write, iclass 33, count 2 2006.229.08:01:10.09#ibcon#*before return 0, iclass 33, count 2 2006.229.08:01:10.09#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:10.09#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:01:10.09#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.08:01:10.09#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:10.09#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:10.21#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:10.21#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:10.21#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:01:10.21#ibcon#first serial, iclass 33, count 0 2006.229.08:01:10.21#ibcon#enter sib2, iclass 33, count 0 2006.229.08:01:10.21#ibcon#flushed, iclass 33, count 0 2006.229.08:01:10.21#ibcon#about to write, iclass 33, count 0 2006.229.08:01:10.21#ibcon#wrote, iclass 33, count 0 2006.229.08:01:10.21#ibcon#about to read 3, iclass 33, count 0 2006.229.08:01:10.23#ibcon#read 3, iclass 33, count 0 2006.229.08:01:10.23#ibcon#about to read 4, iclass 33, count 0 2006.229.08:01:10.23#ibcon#read 4, iclass 33, count 0 2006.229.08:01:10.23#ibcon#about to read 5, iclass 33, count 0 2006.229.08:01:10.23#ibcon#read 5, iclass 33, count 0 2006.229.08:01:10.23#ibcon#about to read 6, iclass 33, count 0 2006.229.08:01:10.23#ibcon#read 6, iclass 33, count 0 2006.229.08:01:10.23#ibcon#end of sib2, iclass 33, count 0 2006.229.08:01:10.23#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:01:10.23#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:01:10.23#ibcon#[27=USB\r\n] 2006.229.08:01:10.23#ibcon#*before write, iclass 33, count 0 2006.229.08:01:10.23#ibcon#enter sib2, iclass 33, count 0 2006.229.08:01:10.23#ibcon#flushed, iclass 33, count 0 2006.229.08:01:10.23#ibcon#about to write, iclass 33, count 0 2006.229.08:01:10.23#ibcon#wrote, iclass 33, count 0 2006.229.08:01:10.23#ibcon#about to read 3, iclass 33, count 0 2006.229.08:01:10.26#ibcon#read 3, iclass 33, count 0 2006.229.08:01:10.26#ibcon#about to read 4, iclass 33, count 0 2006.229.08:01:10.26#ibcon#read 4, iclass 33, count 0 2006.229.08:01:10.26#ibcon#about to read 5, iclass 33, count 0 2006.229.08:01:10.26#ibcon#read 5, iclass 33, count 0 2006.229.08:01:10.26#ibcon#about to read 6, iclass 33, count 0 2006.229.08:01:10.26#ibcon#read 6, iclass 33, count 0 2006.229.08:01:10.26#ibcon#end of sib2, iclass 33, count 0 2006.229.08:01:10.26#ibcon#*after write, iclass 33, count 0 2006.229.08:01:10.26#ibcon#*before return 0, iclass 33, count 0 2006.229.08:01:10.26#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:10.26#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:01:10.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:01:10.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:01:10.26$vck44/vblo=5,709.99 2006.229.08:01:10.26#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.08:01:10.26#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.08:01:10.26#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:10.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:10.26#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:10.26#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:10.26#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:01:10.26#ibcon#first serial, iclass 35, count 0 2006.229.08:01:10.26#ibcon#enter sib2, iclass 35, count 0 2006.229.08:01:10.26#ibcon#flushed, iclass 35, count 0 2006.229.08:01:10.26#ibcon#about to write, iclass 35, count 0 2006.229.08:01:10.26#ibcon#wrote, iclass 35, count 0 2006.229.08:01:10.26#ibcon#about to read 3, iclass 35, count 0 2006.229.08:01:10.28#ibcon#read 3, iclass 35, count 0 2006.229.08:01:10.28#ibcon#about to read 4, iclass 35, count 0 2006.229.08:01:10.28#ibcon#read 4, iclass 35, count 0 2006.229.08:01:10.28#ibcon#about to read 5, iclass 35, count 0 2006.229.08:01:10.28#ibcon#read 5, iclass 35, count 0 2006.229.08:01:10.28#ibcon#about to read 6, iclass 35, count 0 2006.229.08:01:10.28#ibcon#read 6, iclass 35, count 0 2006.229.08:01:10.28#ibcon#end of sib2, iclass 35, count 0 2006.229.08:01:10.28#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:01:10.28#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:01:10.28#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:01:10.28#ibcon#*before write, iclass 35, count 0 2006.229.08:01:10.28#ibcon#enter sib2, iclass 35, count 0 2006.229.08:01:10.28#ibcon#flushed, iclass 35, count 0 2006.229.08:01:10.28#ibcon#about to write, iclass 35, count 0 2006.229.08:01:10.28#ibcon#wrote, iclass 35, count 0 2006.229.08:01:10.28#ibcon#about to read 3, iclass 35, count 0 2006.229.08:01:10.32#ibcon#read 3, iclass 35, count 0 2006.229.08:01:10.32#ibcon#about to read 4, iclass 35, count 0 2006.229.08:01:10.32#ibcon#read 4, iclass 35, count 0 2006.229.08:01:10.32#ibcon#about to read 5, iclass 35, count 0 2006.229.08:01:10.32#ibcon#read 5, iclass 35, count 0 2006.229.08:01:10.32#ibcon#about to read 6, iclass 35, count 0 2006.229.08:01:10.32#ibcon#read 6, iclass 35, count 0 2006.229.08:01:10.32#ibcon#end of sib2, iclass 35, count 0 2006.229.08:01:10.32#ibcon#*after write, iclass 35, count 0 2006.229.08:01:10.32#ibcon#*before return 0, iclass 35, count 0 2006.229.08:01:10.32#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:10.32#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:01:10.32#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:01:10.32#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:01:10.32$vck44/vb=5,4 2006.229.08:01:10.32#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.08:01:10.32#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.08:01:10.32#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:10.32#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:10.38#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:10.38#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:10.38#ibcon#enter wrdev, iclass 37, count 2 2006.229.08:01:10.38#ibcon#first serial, iclass 37, count 2 2006.229.08:01:10.38#ibcon#enter sib2, iclass 37, count 2 2006.229.08:01:10.38#ibcon#flushed, iclass 37, count 2 2006.229.08:01:10.38#ibcon#about to write, iclass 37, count 2 2006.229.08:01:10.38#ibcon#wrote, iclass 37, count 2 2006.229.08:01:10.38#ibcon#about to read 3, iclass 37, count 2 2006.229.08:01:10.40#ibcon#read 3, iclass 37, count 2 2006.229.08:01:10.40#ibcon#about to read 4, iclass 37, count 2 2006.229.08:01:10.40#ibcon#read 4, iclass 37, count 2 2006.229.08:01:10.40#ibcon#about to read 5, iclass 37, count 2 2006.229.08:01:10.40#ibcon#read 5, iclass 37, count 2 2006.229.08:01:10.40#ibcon#about to read 6, iclass 37, count 2 2006.229.08:01:10.40#ibcon#read 6, iclass 37, count 2 2006.229.08:01:10.40#ibcon#end of sib2, iclass 37, count 2 2006.229.08:01:10.40#ibcon#*mode == 0, iclass 37, count 2 2006.229.08:01:10.40#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.08:01:10.40#ibcon#[27=AT05-04\r\n] 2006.229.08:01:10.40#ibcon#*before write, iclass 37, count 2 2006.229.08:01:10.40#ibcon#enter sib2, iclass 37, count 2 2006.229.08:01:10.40#ibcon#flushed, iclass 37, count 2 2006.229.08:01:10.40#ibcon#about to write, iclass 37, count 2 2006.229.08:01:10.40#ibcon#wrote, iclass 37, count 2 2006.229.08:01:10.40#ibcon#about to read 3, iclass 37, count 2 2006.229.08:01:10.43#ibcon#read 3, iclass 37, count 2 2006.229.08:01:10.43#ibcon#about to read 4, iclass 37, count 2 2006.229.08:01:10.43#ibcon#read 4, iclass 37, count 2 2006.229.08:01:10.43#ibcon#about to read 5, iclass 37, count 2 2006.229.08:01:10.43#ibcon#read 5, iclass 37, count 2 2006.229.08:01:10.43#ibcon#about to read 6, iclass 37, count 2 2006.229.08:01:10.43#ibcon#read 6, iclass 37, count 2 2006.229.08:01:10.43#ibcon#end of sib2, iclass 37, count 2 2006.229.08:01:10.43#ibcon#*after write, iclass 37, count 2 2006.229.08:01:10.43#ibcon#*before return 0, iclass 37, count 2 2006.229.08:01:10.43#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:10.43#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:01:10.43#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.08:01:10.43#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:10.43#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:10.55#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:10.55#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:10.55#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:01:10.55#ibcon#first serial, iclass 37, count 0 2006.229.08:01:10.55#ibcon#enter sib2, iclass 37, count 0 2006.229.08:01:10.55#ibcon#flushed, iclass 37, count 0 2006.229.08:01:10.55#ibcon#about to write, iclass 37, count 0 2006.229.08:01:10.55#ibcon#wrote, iclass 37, count 0 2006.229.08:01:10.55#ibcon#about to read 3, iclass 37, count 0 2006.229.08:01:10.57#ibcon#read 3, iclass 37, count 0 2006.229.08:01:10.57#ibcon#about to read 4, iclass 37, count 0 2006.229.08:01:10.57#ibcon#read 4, iclass 37, count 0 2006.229.08:01:10.57#ibcon#about to read 5, iclass 37, count 0 2006.229.08:01:10.57#ibcon#read 5, iclass 37, count 0 2006.229.08:01:10.57#ibcon#about to read 6, iclass 37, count 0 2006.229.08:01:10.57#ibcon#read 6, iclass 37, count 0 2006.229.08:01:10.57#ibcon#end of sib2, iclass 37, count 0 2006.229.08:01:10.57#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:01:10.57#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:01:10.57#ibcon#[27=USB\r\n] 2006.229.08:01:10.57#ibcon#*before write, iclass 37, count 0 2006.229.08:01:10.57#ibcon#enter sib2, iclass 37, count 0 2006.229.08:01:10.57#ibcon#flushed, iclass 37, count 0 2006.229.08:01:10.57#ibcon#about to write, iclass 37, count 0 2006.229.08:01:10.57#ibcon#wrote, iclass 37, count 0 2006.229.08:01:10.57#ibcon#about to read 3, iclass 37, count 0 2006.229.08:01:10.60#ibcon#read 3, iclass 37, count 0 2006.229.08:01:10.60#ibcon#about to read 4, iclass 37, count 0 2006.229.08:01:10.60#ibcon#read 4, iclass 37, count 0 2006.229.08:01:10.60#ibcon#about to read 5, iclass 37, count 0 2006.229.08:01:10.60#ibcon#read 5, iclass 37, count 0 2006.229.08:01:10.60#ibcon#about to read 6, iclass 37, count 0 2006.229.08:01:10.60#ibcon#read 6, iclass 37, count 0 2006.229.08:01:10.60#ibcon#end of sib2, iclass 37, count 0 2006.229.08:01:10.60#ibcon#*after write, iclass 37, count 0 2006.229.08:01:10.60#ibcon#*before return 0, iclass 37, count 0 2006.229.08:01:10.60#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:10.60#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:01:10.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:01:10.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:01:10.60$vck44/vblo=6,719.99 2006.229.08:01:10.60#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.08:01:10.60#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.08:01:10.60#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:10.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:01:10.60#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:01:10.60#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:01:10.60#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:01:10.60#ibcon#first serial, iclass 39, count 0 2006.229.08:01:10.60#ibcon#enter sib2, iclass 39, count 0 2006.229.08:01:10.60#ibcon#flushed, iclass 39, count 0 2006.229.08:01:10.60#ibcon#about to write, iclass 39, count 0 2006.229.08:01:10.60#ibcon#wrote, iclass 39, count 0 2006.229.08:01:10.60#ibcon#about to read 3, iclass 39, count 0 2006.229.08:01:10.62#ibcon#read 3, iclass 39, count 0 2006.229.08:01:10.62#ibcon#about to read 4, iclass 39, count 0 2006.229.08:01:10.62#ibcon#read 4, iclass 39, count 0 2006.229.08:01:10.62#ibcon#about to read 5, iclass 39, count 0 2006.229.08:01:10.62#ibcon#read 5, iclass 39, count 0 2006.229.08:01:10.62#ibcon#about to read 6, iclass 39, count 0 2006.229.08:01:10.62#ibcon#read 6, iclass 39, count 0 2006.229.08:01:10.62#ibcon#end of sib2, iclass 39, count 0 2006.229.08:01:10.62#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:01:10.62#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:01:10.62#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:01:10.62#ibcon#*before write, iclass 39, count 0 2006.229.08:01:10.62#ibcon#enter sib2, iclass 39, count 0 2006.229.08:01:10.62#ibcon#flushed, iclass 39, count 0 2006.229.08:01:10.62#ibcon#about to write, iclass 39, count 0 2006.229.08:01:10.62#ibcon#wrote, iclass 39, count 0 2006.229.08:01:10.62#ibcon#about to read 3, iclass 39, count 0 2006.229.08:01:10.66#ibcon#read 3, iclass 39, count 0 2006.229.08:01:10.66#ibcon#about to read 4, iclass 39, count 0 2006.229.08:01:10.66#ibcon#read 4, iclass 39, count 0 2006.229.08:01:10.66#ibcon#about to read 5, iclass 39, count 0 2006.229.08:01:10.66#ibcon#read 5, iclass 39, count 0 2006.229.08:01:10.66#ibcon#about to read 6, iclass 39, count 0 2006.229.08:01:10.66#ibcon#read 6, iclass 39, count 0 2006.229.08:01:10.66#ibcon#end of sib2, iclass 39, count 0 2006.229.08:01:10.66#ibcon#*after write, iclass 39, count 0 2006.229.08:01:10.66#ibcon#*before return 0, iclass 39, count 0 2006.229.08:01:10.66#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:01:10.66#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:01:10.66#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:01:10.66#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:01:10.66$vck44/vb=6,4 2006.229.08:01:10.66#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.08:01:10.66#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.08:01:10.66#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:10.66#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:01:10.72#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:01:10.72#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:01:10.72#ibcon#enter wrdev, iclass 3, count 2 2006.229.08:01:10.72#ibcon#first serial, iclass 3, count 2 2006.229.08:01:10.72#ibcon#enter sib2, iclass 3, count 2 2006.229.08:01:10.72#ibcon#flushed, iclass 3, count 2 2006.229.08:01:10.72#ibcon#about to write, iclass 3, count 2 2006.229.08:01:10.72#ibcon#wrote, iclass 3, count 2 2006.229.08:01:10.72#ibcon#about to read 3, iclass 3, count 2 2006.229.08:01:10.74#ibcon#read 3, iclass 3, count 2 2006.229.08:01:10.74#ibcon#about to read 4, iclass 3, count 2 2006.229.08:01:10.74#ibcon#read 4, iclass 3, count 2 2006.229.08:01:10.74#ibcon#about to read 5, iclass 3, count 2 2006.229.08:01:10.74#ibcon#read 5, iclass 3, count 2 2006.229.08:01:10.74#ibcon#about to read 6, iclass 3, count 2 2006.229.08:01:10.74#ibcon#read 6, iclass 3, count 2 2006.229.08:01:10.74#ibcon#end of sib2, iclass 3, count 2 2006.229.08:01:10.74#ibcon#*mode == 0, iclass 3, count 2 2006.229.08:01:10.74#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.08:01:10.74#ibcon#[27=AT06-04\r\n] 2006.229.08:01:10.74#ibcon#*before write, iclass 3, count 2 2006.229.08:01:10.74#ibcon#enter sib2, iclass 3, count 2 2006.229.08:01:10.74#ibcon#flushed, iclass 3, count 2 2006.229.08:01:10.74#ibcon#about to write, iclass 3, count 2 2006.229.08:01:10.74#ibcon#wrote, iclass 3, count 2 2006.229.08:01:10.74#ibcon#about to read 3, iclass 3, count 2 2006.229.08:01:10.77#ibcon#read 3, iclass 3, count 2 2006.229.08:01:10.77#ibcon#about to read 4, iclass 3, count 2 2006.229.08:01:10.77#ibcon#read 4, iclass 3, count 2 2006.229.08:01:10.77#ibcon#about to read 5, iclass 3, count 2 2006.229.08:01:10.77#ibcon#read 5, iclass 3, count 2 2006.229.08:01:10.77#ibcon#about to read 6, iclass 3, count 2 2006.229.08:01:10.77#ibcon#read 6, iclass 3, count 2 2006.229.08:01:10.77#ibcon#end of sib2, iclass 3, count 2 2006.229.08:01:10.77#ibcon#*after write, iclass 3, count 2 2006.229.08:01:10.77#ibcon#*before return 0, iclass 3, count 2 2006.229.08:01:10.77#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:01:10.77#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:01:10.77#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.08:01:10.77#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:10.77#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:01:10.89#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:01:10.89#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:01:10.89#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:01:10.89#ibcon#first serial, iclass 3, count 0 2006.229.08:01:10.89#ibcon#enter sib2, iclass 3, count 0 2006.229.08:01:10.89#ibcon#flushed, iclass 3, count 0 2006.229.08:01:10.89#ibcon#about to write, iclass 3, count 0 2006.229.08:01:10.89#ibcon#wrote, iclass 3, count 0 2006.229.08:01:10.89#ibcon#about to read 3, iclass 3, count 0 2006.229.08:01:10.91#ibcon#read 3, iclass 3, count 0 2006.229.08:01:10.91#ibcon#about to read 4, iclass 3, count 0 2006.229.08:01:10.91#ibcon#read 4, iclass 3, count 0 2006.229.08:01:10.91#ibcon#about to read 5, iclass 3, count 0 2006.229.08:01:10.91#ibcon#read 5, iclass 3, count 0 2006.229.08:01:10.91#ibcon#about to read 6, iclass 3, count 0 2006.229.08:01:10.91#ibcon#read 6, iclass 3, count 0 2006.229.08:01:10.91#ibcon#end of sib2, iclass 3, count 0 2006.229.08:01:10.91#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:01:10.91#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:01:10.91#ibcon#[27=USB\r\n] 2006.229.08:01:10.91#ibcon#*before write, iclass 3, count 0 2006.229.08:01:10.91#ibcon#enter sib2, iclass 3, count 0 2006.229.08:01:10.91#ibcon#flushed, iclass 3, count 0 2006.229.08:01:10.91#ibcon#about to write, iclass 3, count 0 2006.229.08:01:10.91#ibcon#wrote, iclass 3, count 0 2006.229.08:01:10.91#ibcon#about to read 3, iclass 3, count 0 2006.229.08:01:10.94#ibcon#read 3, iclass 3, count 0 2006.229.08:01:10.94#ibcon#about to read 4, iclass 3, count 0 2006.229.08:01:10.94#ibcon#read 4, iclass 3, count 0 2006.229.08:01:10.94#ibcon#about to read 5, iclass 3, count 0 2006.229.08:01:10.94#ibcon#read 5, iclass 3, count 0 2006.229.08:01:10.94#ibcon#about to read 6, iclass 3, count 0 2006.229.08:01:10.94#ibcon#read 6, iclass 3, count 0 2006.229.08:01:10.94#ibcon#end of sib2, iclass 3, count 0 2006.229.08:01:10.94#ibcon#*after write, iclass 3, count 0 2006.229.08:01:10.94#ibcon#*before return 0, iclass 3, count 0 2006.229.08:01:10.94#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:01:10.94#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:01:10.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:01:10.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:01:10.94$vck44/vblo=7,734.99 2006.229.08:01:10.94#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.08:01:10.94#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.08:01:10.94#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:10.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:10.94#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:10.94#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:10.94#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:01:10.94#ibcon#first serial, iclass 5, count 0 2006.229.08:01:10.94#ibcon#enter sib2, iclass 5, count 0 2006.229.08:01:10.94#ibcon#flushed, iclass 5, count 0 2006.229.08:01:10.94#ibcon#about to write, iclass 5, count 0 2006.229.08:01:10.94#ibcon#wrote, iclass 5, count 0 2006.229.08:01:10.94#ibcon#about to read 3, iclass 5, count 0 2006.229.08:01:10.96#ibcon#read 3, iclass 5, count 0 2006.229.08:01:10.96#ibcon#about to read 4, iclass 5, count 0 2006.229.08:01:10.96#ibcon#read 4, iclass 5, count 0 2006.229.08:01:10.96#ibcon#about to read 5, iclass 5, count 0 2006.229.08:01:10.96#ibcon#read 5, iclass 5, count 0 2006.229.08:01:10.96#ibcon#about to read 6, iclass 5, count 0 2006.229.08:01:10.96#ibcon#read 6, iclass 5, count 0 2006.229.08:01:10.96#ibcon#end of sib2, iclass 5, count 0 2006.229.08:01:10.96#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:01:10.96#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:01:10.96#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:01:10.96#ibcon#*before write, iclass 5, count 0 2006.229.08:01:10.96#ibcon#enter sib2, iclass 5, count 0 2006.229.08:01:10.96#ibcon#flushed, iclass 5, count 0 2006.229.08:01:10.96#ibcon#about to write, iclass 5, count 0 2006.229.08:01:10.96#ibcon#wrote, iclass 5, count 0 2006.229.08:01:10.96#ibcon#about to read 3, iclass 5, count 0 2006.229.08:01:11.00#ibcon#read 3, iclass 5, count 0 2006.229.08:01:11.00#ibcon#about to read 4, iclass 5, count 0 2006.229.08:01:11.00#ibcon#read 4, iclass 5, count 0 2006.229.08:01:11.00#ibcon#about to read 5, iclass 5, count 0 2006.229.08:01:11.00#ibcon#read 5, iclass 5, count 0 2006.229.08:01:11.00#ibcon#about to read 6, iclass 5, count 0 2006.229.08:01:11.00#ibcon#read 6, iclass 5, count 0 2006.229.08:01:11.00#ibcon#end of sib2, iclass 5, count 0 2006.229.08:01:11.00#ibcon#*after write, iclass 5, count 0 2006.229.08:01:11.00#ibcon#*before return 0, iclass 5, count 0 2006.229.08:01:11.00#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:11.00#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:01:11.00#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:01:11.00#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:01:11.00$vck44/vb=7,4 2006.229.08:01:11.00#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.08:01:11.00#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.08:01:11.00#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:11.00#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:11.06#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:11.06#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:11.06#ibcon#enter wrdev, iclass 7, count 2 2006.229.08:01:11.06#ibcon#first serial, iclass 7, count 2 2006.229.08:01:11.06#ibcon#enter sib2, iclass 7, count 2 2006.229.08:01:11.06#ibcon#flushed, iclass 7, count 2 2006.229.08:01:11.06#ibcon#about to write, iclass 7, count 2 2006.229.08:01:11.06#ibcon#wrote, iclass 7, count 2 2006.229.08:01:11.06#ibcon#about to read 3, iclass 7, count 2 2006.229.08:01:11.08#ibcon#read 3, iclass 7, count 2 2006.229.08:01:11.08#ibcon#about to read 4, iclass 7, count 2 2006.229.08:01:11.08#ibcon#read 4, iclass 7, count 2 2006.229.08:01:11.08#ibcon#about to read 5, iclass 7, count 2 2006.229.08:01:11.08#ibcon#read 5, iclass 7, count 2 2006.229.08:01:11.08#ibcon#about to read 6, iclass 7, count 2 2006.229.08:01:11.08#ibcon#read 6, iclass 7, count 2 2006.229.08:01:11.08#ibcon#end of sib2, iclass 7, count 2 2006.229.08:01:11.08#ibcon#*mode == 0, iclass 7, count 2 2006.229.08:01:11.08#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.08:01:11.08#ibcon#[27=AT07-04\r\n] 2006.229.08:01:11.08#ibcon#*before write, iclass 7, count 2 2006.229.08:01:11.08#ibcon#enter sib2, iclass 7, count 2 2006.229.08:01:11.08#ibcon#flushed, iclass 7, count 2 2006.229.08:01:11.08#ibcon#about to write, iclass 7, count 2 2006.229.08:01:11.08#ibcon#wrote, iclass 7, count 2 2006.229.08:01:11.08#ibcon#about to read 3, iclass 7, count 2 2006.229.08:01:11.11#ibcon#read 3, iclass 7, count 2 2006.229.08:01:11.11#ibcon#about to read 4, iclass 7, count 2 2006.229.08:01:11.11#ibcon#read 4, iclass 7, count 2 2006.229.08:01:11.11#ibcon#about to read 5, iclass 7, count 2 2006.229.08:01:11.11#ibcon#read 5, iclass 7, count 2 2006.229.08:01:11.11#ibcon#about to read 6, iclass 7, count 2 2006.229.08:01:11.11#ibcon#read 6, iclass 7, count 2 2006.229.08:01:11.11#ibcon#end of sib2, iclass 7, count 2 2006.229.08:01:11.11#ibcon#*after write, iclass 7, count 2 2006.229.08:01:11.11#ibcon#*before return 0, iclass 7, count 2 2006.229.08:01:11.11#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:11.11#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:01:11.11#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.08:01:11.11#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:11.11#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:11.23#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:11.23#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:11.23#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:01:11.23#ibcon#first serial, iclass 7, count 0 2006.229.08:01:11.23#ibcon#enter sib2, iclass 7, count 0 2006.229.08:01:11.23#ibcon#flushed, iclass 7, count 0 2006.229.08:01:11.23#ibcon#about to write, iclass 7, count 0 2006.229.08:01:11.23#ibcon#wrote, iclass 7, count 0 2006.229.08:01:11.23#ibcon#about to read 3, iclass 7, count 0 2006.229.08:01:11.25#ibcon#read 3, iclass 7, count 0 2006.229.08:01:11.25#ibcon#about to read 4, iclass 7, count 0 2006.229.08:01:11.25#ibcon#read 4, iclass 7, count 0 2006.229.08:01:11.25#ibcon#about to read 5, iclass 7, count 0 2006.229.08:01:11.25#ibcon#read 5, iclass 7, count 0 2006.229.08:01:11.25#ibcon#about to read 6, iclass 7, count 0 2006.229.08:01:11.25#ibcon#read 6, iclass 7, count 0 2006.229.08:01:11.25#ibcon#end of sib2, iclass 7, count 0 2006.229.08:01:11.25#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:01:11.25#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:01:11.25#ibcon#[27=USB\r\n] 2006.229.08:01:11.25#ibcon#*before write, iclass 7, count 0 2006.229.08:01:11.25#ibcon#enter sib2, iclass 7, count 0 2006.229.08:01:11.25#ibcon#flushed, iclass 7, count 0 2006.229.08:01:11.25#ibcon#about to write, iclass 7, count 0 2006.229.08:01:11.25#ibcon#wrote, iclass 7, count 0 2006.229.08:01:11.25#ibcon#about to read 3, iclass 7, count 0 2006.229.08:01:11.28#ibcon#read 3, iclass 7, count 0 2006.229.08:01:11.28#ibcon#about to read 4, iclass 7, count 0 2006.229.08:01:11.28#ibcon#read 4, iclass 7, count 0 2006.229.08:01:11.28#ibcon#about to read 5, iclass 7, count 0 2006.229.08:01:11.28#ibcon#read 5, iclass 7, count 0 2006.229.08:01:11.28#ibcon#about to read 6, iclass 7, count 0 2006.229.08:01:11.28#ibcon#read 6, iclass 7, count 0 2006.229.08:01:11.28#ibcon#end of sib2, iclass 7, count 0 2006.229.08:01:11.28#ibcon#*after write, iclass 7, count 0 2006.229.08:01:11.28#ibcon#*before return 0, iclass 7, count 0 2006.229.08:01:11.28#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:11.28#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:01:11.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:01:11.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:01:11.28$vck44/vblo=8,744.99 2006.229.08:01:11.28#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.08:01:11.28#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.08:01:11.28#ibcon#ireg 17 cls_cnt 0 2006.229.08:01:11.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:11.28#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:11.28#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:11.28#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:01:11.28#ibcon#first serial, iclass 11, count 0 2006.229.08:01:11.28#ibcon#enter sib2, iclass 11, count 0 2006.229.08:01:11.28#ibcon#flushed, iclass 11, count 0 2006.229.08:01:11.28#ibcon#about to write, iclass 11, count 0 2006.229.08:01:11.28#ibcon#wrote, iclass 11, count 0 2006.229.08:01:11.28#ibcon#about to read 3, iclass 11, count 0 2006.229.08:01:11.30#ibcon#read 3, iclass 11, count 0 2006.229.08:01:11.30#ibcon#about to read 4, iclass 11, count 0 2006.229.08:01:11.30#ibcon#read 4, iclass 11, count 0 2006.229.08:01:11.30#ibcon#about to read 5, iclass 11, count 0 2006.229.08:01:11.30#ibcon#read 5, iclass 11, count 0 2006.229.08:01:11.30#ibcon#about to read 6, iclass 11, count 0 2006.229.08:01:11.30#ibcon#read 6, iclass 11, count 0 2006.229.08:01:11.30#ibcon#end of sib2, iclass 11, count 0 2006.229.08:01:11.30#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:01:11.30#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:01:11.30#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:01:11.30#ibcon#*before write, iclass 11, count 0 2006.229.08:01:11.30#ibcon#enter sib2, iclass 11, count 0 2006.229.08:01:11.30#ibcon#flushed, iclass 11, count 0 2006.229.08:01:11.30#ibcon#about to write, iclass 11, count 0 2006.229.08:01:11.30#ibcon#wrote, iclass 11, count 0 2006.229.08:01:11.30#ibcon#about to read 3, iclass 11, count 0 2006.229.08:01:11.34#ibcon#read 3, iclass 11, count 0 2006.229.08:01:11.34#ibcon#about to read 4, iclass 11, count 0 2006.229.08:01:11.34#ibcon#read 4, iclass 11, count 0 2006.229.08:01:11.34#ibcon#about to read 5, iclass 11, count 0 2006.229.08:01:11.34#ibcon#read 5, iclass 11, count 0 2006.229.08:01:11.34#ibcon#about to read 6, iclass 11, count 0 2006.229.08:01:11.34#ibcon#read 6, iclass 11, count 0 2006.229.08:01:11.34#ibcon#end of sib2, iclass 11, count 0 2006.229.08:01:11.34#ibcon#*after write, iclass 11, count 0 2006.229.08:01:11.34#ibcon#*before return 0, iclass 11, count 0 2006.229.08:01:11.34#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:11.34#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:01:11.34#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:01:11.34#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:01:11.34$vck44/vb=8,4 2006.229.08:01:11.34#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.08:01:11.34#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.08:01:11.34#ibcon#ireg 11 cls_cnt 2 2006.229.08:01:11.34#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:11.40#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:11.40#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:11.40#ibcon#enter wrdev, iclass 13, count 2 2006.229.08:01:11.40#ibcon#first serial, iclass 13, count 2 2006.229.08:01:11.40#ibcon#enter sib2, iclass 13, count 2 2006.229.08:01:11.40#ibcon#flushed, iclass 13, count 2 2006.229.08:01:11.40#ibcon#about to write, iclass 13, count 2 2006.229.08:01:11.40#ibcon#wrote, iclass 13, count 2 2006.229.08:01:11.40#ibcon#about to read 3, iclass 13, count 2 2006.229.08:01:11.42#ibcon#read 3, iclass 13, count 2 2006.229.08:01:11.42#ibcon#about to read 4, iclass 13, count 2 2006.229.08:01:11.42#ibcon#read 4, iclass 13, count 2 2006.229.08:01:11.42#ibcon#about to read 5, iclass 13, count 2 2006.229.08:01:11.42#ibcon#read 5, iclass 13, count 2 2006.229.08:01:11.42#ibcon#about to read 6, iclass 13, count 2 2006.229.08:01:11.42#ibcon#read 6, iclass 13, count 2 2006.229.08:01:11.42#ibcon#end of sib2, iclass 13, count 2 2006.229.08:01:11.42#ibcon#*mode == 0, iclass 13, count 2 2006.229.08:01:11.42#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.08:01:11.42#ibcon#[27=AT08-04\r\n] 2006.229.08:01:11.42#ibcon#*before write, iclass 13, count 2 2006.229.08:01:11.42#ibcon#enter sib2, iclass 13, count 2 2006.229.08:01:11.42#ibcon#flushed, iclass 13, count 2 2006.229.08:01:11.42#ibcon#about to write, iclass 13, count 2 2006.229.08:01:11.42#ibcon#wrote, iclass 13, count 2 2006.229.08:01:11.42#ibcon#about to read 3, iclass 13, count 2 2006.229.08:01:11.45#ibcon#read 3, iclass 13, count 2 2006.229.08:01:11.45#ibcon#about to read 4, iclass 13, count 2 2006.229.08:01:11.45#ibcon#read 4, iclass 13, count 2 2006.229.08:01:11.45#ibcon#about to read 5, iclass 13, count 2 2006.229.08:01:11.45#ibcon#read 5, iclass 13, count 2 2006.229.08:01:11.45#ibcon#about to read 6, iclass 13, count 2 2006.229.08:01:11.45#ibcon#read 6, iclass 13, count 2 2006.229.08:01:11.45#ibcon#end of sib2, iclass 13, count 2 2006.229.08:01:11.45#ibcon#*after write, iclass 13, count 2 2006.229.08:01:11.45#ibcon#*before return 0, iclass 13, count 2 2006.229.08:01:11.45#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:11.45#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:01:11.45#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.08:01:11.45#ibcon#ireg 7 cls_cnt 0 2006.229.08:01:11.45#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:11.57#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:11.57#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:11.57#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:01:11.57#ibcon#first serial, iclass 13, count 0 2006.229.08:01:11.57#ibcon#enter sib2, iclass 13, count 0 2006.229.08:01:11.57#ibcon#flushed, iclass 13, count 0 2006.229.08:01:11.57#ibcon#about to write, iclass 13, count 0 2006.229.08:01:11.57#ibcon#wrote, iclass 13, count 0 2006.229.08:01:11.57#ibcon#about to read 3, iclass 13, count 0 2006.229.08:01:11.59#ibcon#read 3, iclass 13, count 0 2006.229.08:01:11.59#ibcon#about to read 4, iclass 13, count 0 2006.229.08:01:11.59#ibcon#read 4, iclass 13, count 0 2006.229.08:01:11.59#ibcon#about to read 5, iclass 13, count 0 2006.229.08:01:11.59#ibcon#read 5, iclass 13, count 0 2006.229.08:01:11.59#ibcon#about to read 6, iclass 13, count 0 2006.229.08:01:11.59#ibcon#read 6, iclass 13, count 0 2006.229.08:01:11.59#ibcon#end of sib2, iclass 13, count 0 2006.229.08:01:11.59#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:01:11.59#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:01:11.59#ibcon#[27=USB\r\n] 2006.229.08:01:11.59#ibcon#*before write, iclass 13, count 0 2006.229.08:01:11.59#ibcon#enter sib2, iclass 13, count 0 2006.229.08:01:11.59#ibcon#flushed, iclass 13, count 0 2006.229.08:01:11.59#ibcon#about to write, iclass 13, count 0 2006.229.08:01:11.59#ibcon#wrote, iclass 13, count 0 2006.229.08:01:11.59#ibcon#about to read 3, iclass 13, count 0 2006.229.08:01:11.62#ibcon#read 3, iclass 13, count 0 2006.229.08:01:11.62#ibcon#about to read 4, iclass 13, count 0 2006.229.08:01:11.62#ibcon#read 4, iclass 13, count 0 2006.229.08:01:11.62#ibcon#about to read 5, iclass 13, count 0 2006.229.08:01:11.62#ibcon#read 5, iclass 13, count 0 2006.229.08:01:11.62#ibcon#about to read 6, iclass 13, count 0 2006.229.08:01:11.62#ibcon#read 6, iclass 13, count 0 2006.229.08:01:11.62#ibcon#end of sib2, iclass 13, count 0 2006.229.08:01:11.62#ibcon#*after write, iclass 13, count 0 2006.229.08:01:11.62#ibcon#*before return 0, iclass 13, count 0 2006.229.08:01:11.62#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:11.62#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:01:11.62#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:01:11.62#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:01:11.62$vck44/vabw=wide 2006.229.08:01:11.62#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.08:01:11.62#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.08:01:11.62#ibcon#ireg 8 cls_cnt 0 2006.229.08:01:11.62#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:11.62#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:11.62#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:11.62#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:01:11.62#ibcon#first serial, iclass 15, count 0 2006.229.08:01:11.62#ibcon#enter sib2, iclass 15, count 0 2006.229.08:01:11.62#ibcon#flushed, iclass 15, count 0 2006.229.08:01:11.62#ibcon#about to write, iclass 15, count 0 2006.229.08:01:11.62#ibcon#wrote, iclass 15, count 0 2006.229.08:01:11.62#ibcon#about to read 3, iclass 15, count 0 2006.229.08:01:11.64#ibcon#read 3, iclass 15, count 0 2006.229.08:01:11.64#ibcon#about to read 4, iclass 15, count 0 2006.229.08:01:11.64#ibcon#read 4, iclass 15, count 0 2006.229.08:01:11.64#ibcon#about to read 5, iclass 15, count 0 2006.229.08:01:11.64#ibcon#read 5, iclass 15, count 0 2006.229.08:01:11.64#ibcon#about to read 6, iclass 15, count 0 2006.229.08:01:11.64#ibcon#read 6, iclass 15, count 0 2006.229.08:01:11.64#ibcon#end of sib2, iclass 15, count 0 2006.229.08:01:11.64#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:01:11.64#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:01:11.64#ibcon#[25=BW32\r\n] 2006.229.08:01:11.64#ibcon#*before write, iclass 15, count 0 2006.229.08:01:11.64#ibcon#enter sib2, iclass 15, count 0 2006.229.08:01:11.64#ibcon#flushed, iclass 15, count 0 2006.229.08:01:11.64#ibcon#about to write, iclass 15, count 0 2006.229.08:01:11.64#ibcon#wrote, iclass 15, count 0 2006.229.08:01:11.64#ibcon#about to read 3, iclass 15, count 0 2006.229.08:01:11.67#ibcon#read 3, iclass 15, count 0 2006.229.08:01:11.67#ibcon#about to read 4, iclass 15, count 0 2006.229.08:01:11.67#ibcon#read 4, iclass 15, count 0 2006.229.08:01:11.67#ibcon#about to read 5, iclass 15, count 0 2006.229.08:01:11.67#ibcon#read 5, iclass 15, count 0 2006.229.08:01:11.67#ibcon#about to read 6, iclass 15, count 0 2006.229.08:01:11.67#ibcon#read 6, iclass 15, count 0 2006.229.08:01:11.67#ibcon#end of sib2, iclass 15, count 0 2006.229.08:01:11.67#ibcon#*after write, iclass 15, count 0 2006.229.08:01:11.67#ibcon#*before return 0, iclass 15, count 0 2006.229.08:01:11.67#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:11.67#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:01:11.67#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:01:11.67#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:01:11.67$vck44/vbbw=wide 2006.229.08:01:11.67#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.08:01:11.67#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.08:01:11.67#ibcon#ireg 8 cls_cnt 0 2006.229.08:01:11.67#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:01:11.74#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:01:11.74#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:01:11.74#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:01:11.74#ibcon#first serial, iclass 17, count 0 2006.229.08:01:11.74#ibcon#enter sib2, iclass 17, count 0 2006.229.08:01:11.74#ibcon#flushed, iclass 17, count 0 2006.229.08:01:11.74#ibcon#about to write, iclass 17, count 0 2006.229.08:01:11.74#ibcon#wrote, iclass 17, count 0 2006.229.08:01:11.74#ibcon#about to read 3, iclass 17, count 0 2006.229.08:01:11.76#ibcon#read 3, iclass 17, count 0 2006.229.08:01:11.76#ibcon#about to read 4, iclass 17, count 0 2006.229.08:01:11.76#ibcon#read 4, iclass 17, count 0 2006.229.08:01:11.76#ibcon#about to read 5, iclass 17, count 0 2006.229.08:01:11.76#ibcon#read 5, iclass 17, count 0 2006.229.08:01:11.76#ibcon#about to read 6, iclass 17, count 0 2006.229.08:01:11.76#ibcon#read 6, iclass 17, count 0 2006.229.08:01:11.76#ibcon#end of sib2, iclass 17, count 0 2006.229.08:01:11.76#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:01:11.76#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:01:11.76#ibcon#[27=BW32\r\n] 2006.229.08:01:11.76#ibcon#*before write, iclass 17, count 0 2006.229.08:01:11.76#ibcon#enter sib2, iclass 17, count 0 2006.229.08:01:11.76#ibcon#flushed, iclass 17, count 0 2006.229.08:01:11.76#ibcon#about to write, iclass 17, count 0 2006.229.08:01:11.76#ibcon#wrote, iclass 17, count 0 2006.229.08:01:11.76#ibcon#about to read 3, iclass 17, count 0 2006.229.08:01:11.79#ibcon#read 3, iclass 17, count 0 2006.229.08:01:11.79#ibcon#about to read 4, iclass 17, count 0 2006.229.08:01:11.79#ibcon#read 4, iclass 17, count 0 2006.229.08:01:11.79#ibcon#about to read 5, iclass 17, count 0 2006.229.08:01:11.79#ibcon#read 5, iclass 17, count 0 2006.229.08:01:11.79#ibcon#about to read 6, iclass 17, count 0 2006.229.08:01:11.79#ibcon#read 6, iclass 17, count 0 2006.229.08:01:11.79#ibcon#end of sib2, iclass 17, count 0 2006.229.08:01:11.79#ibcon#*after write, iclass 17, count 0 2006.229.08:01:11.79#ibcon#*before return 0, iclass 17, count 0 2006.229.08:01:11.79#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:01:11.79#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:01:11.79#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:01:11.79#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:01:11.79$setupk4/ifdk4 2006.229.08:01:11.79$ifdk4/lo= 2006.229.08:01:11.79$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:01:11.79$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:01:11.79$ifdk4/patch= 2006.229.08:01:11.79$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:01:11.79$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:01:11.79$setupk4/!*+20s 2006.229.08:01:17.91#abcon#<5=/05 3.3 5.8 29.75 911000.5\r\n> 2006.229.08:01:17.93#abcon#{5=INTERFACE CLEAR} 2006.229.08:01:17.99#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:01:26.29$setupk4/"tpicd 2006.229.08:01:26.29$setupk4/echo=off 2006.229.08:01:26.29$setupk4/xlog=off 2006.229.08:01:26.29:!2006.229.08:05:46 2006.229.08:01:30.14#trakl#Source acquired 2006.229.08:01:32.14#flagr#flagr/antenna,acquired 2006.229.08:05:46.02:preob 2006.229.08:05:47.14/onsource/TRACKING 2006.229.08:05:47.14:!2006.229.08:05:56 2006.229.08:05:56.01:"tape 2006.229.08:05:56.02:"st=record 2006.229.08:05:56.02:data_valid=on 2006.229.08:05:56.02:midob 2006.229.08:05:57.13/onsource/TRACKING 2006.229.08:05:57.14/wx/29.68,1000.5,92 2006.229.08:05:57.31/cable/+6.3989E-03 2006.229.08:05:58.40/va/01,08,usb,yes,30,33 2006.229.08:05:58.40/va/02,07,usb,yes,33,33 2006.229.08:05:58.40/va/03,06,usb,yes,41,43 2006.229.08:05:58.40/va/04,07,usb,yes,34,36 2006.229.08:05:58.40/va/05,04,usb,yes,30,31 2006.229.08:05:58.40/va/06,04,usb,yes,34,34 2006.229.08:05:58.40/va/07,05,usb,yes,30,31 2006.229.08:05:58.40/va/08,06,usb,yes,22,27 2006.229.08:05:58.63/valo/01,524.99,yes,locked 2006.229.08:05:58.63/valo/02,534.99,yes,locked 2006.229.08:05:58.63/valo/03,564.99,yes,locked 2006.229.08:05:58.63/valo/04,624.99,yes,locked 2006.229.08:05:58.63/valo/05,734.99,yes,locked 2006.229.08:05:58.63/valo/06,814.99,yes,locked 2006.229.08:05:58.63/valo/07,864.99,yes,locked 2006.229.08:05:58.63/valo/08,884.99,yes,locked 2006.229.08:05:59.72/vb/01,04,usb,yes,31,29 2006.229.08:05:59.72/vb/02,04,usb,yes,34,34 2006.229.08:05:59.72/vb/03,04,usb,yes,31,34 2006.229.08:05:59.72/vb/04,04,usb,yes,35,34 2006.229.08:05:59.72/vb/05,04,usb,yes,27,30 2006.229.08:05:59.72/vb/06,04,usb,yes,32,28 2006.229.08:05:59.72/vb/07,04,usb,yes,32,32 2006.229.08:05:59.72/vb/08,04,usb,yes,29,33 2006.229.08:05:59.95/vblo/01,629.99,yes,locked 2006.229.08:05:59.95/vblo/02,634.99,yes,locked 2006.229.08:05:59.95/vblo/03,649.99,yes,locked 2006.229.08:05:59.95/vblo/04,679.99,yes,locked 2006.229.08:05:59.95/vblo/05,709.99,yes,locked 2006.229.08:05:59.95/vblo/06,719.99,yes,locked 2006.229.08:05:59.95/vblo/07,734.99,yes,locked 2006.229.08:05:59.95/vblo/08,744.99,yes,locked 2006.229.08:06:00.10/vabw/8 2006.229.08:06:00.25/vbbw/8 2006.229.08:06:00.34/xfe/off,on,12.7 2006.229.08:06:00.72/ifatt/23,28,28,28 2006.229.08:06:01.07/fmout-gps/S +4.54E-07 2006.229.08:06:01.12:!2006.229.08:12:06 2006.229.08:12:06.00:data_valid=off 2006.229.08:12:06.01:"et 2006.229.08:12:06.01:!+3s 2006.229.08:12:09.02:"tape 2006.229.08:12:09.03:postob 2006.229.08:12:09.13/cable/+6.3971E-03 2006.229.08:12:09.13/wx/29.58,1000.5,93 2006.229.08:12:09.19/fmout-gps/S +4.51E-07 2006.229.08:12:09.19:scan_name=229-0816,jd0608,40 2006.229.08:12:09.19:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.08:12:10.14#flagr#flagr/antenna,new-source 2006.229.08:12:10.14:checkk5 2006.229.08:12:10.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:12:10.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:12:11.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:12:11.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:12:12.16/chk_obsdata//k5ts1/T2290805??a.dat file size is correct (nominal:1480MB, actual:1476MB). 2006.229.08:12:12.56/chk_obsdata//k5ts2/T2290805??b.dat file size is correct (nominal:1480MB, actual:1476MB). 2006.229.08:12:12.97/chk_obsdata//k5ts3/T2290805??c.dat file size is correct (nominal:1480MB, actual:1476MB). 2006.229.08:12:13.38/chk_obsdata//k5ts4/T2290805??d.dat file size is correct (nominal:1480MB, actual:1476MB). 2006.229.08:12:14.12/k5log//k5ts1_log_newline 2006.229.08:12:14.82/k5log//k5ts2_log_newline 2006.229.08:12:15.54/k5log//k5ts3_log_newline 2006.229.08:12:16.24/k5log//k5ts4_log_newline 2006.229.08:12:16.27/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:12:16.27:setupk4=1 2006.229.08:12:16.27$setupk4/echo=on 2006.229.08:12:16.27$setupk4/pcalon 2006.229.08:12:16.27$pcalon/"no phase cal control is implemented here 2006.229.08:12:16.27$setupk4/"tpicd=stop 2006.229.08:12:16.27$setupk4/"rec=synch_on 2006.229.08:12:16.27$setupk4/"rec_mode=128 2006.229.08:12:16.27$setupk4/!* 2006.229.08:12:16.27$setupk4/recpk4 2006.229.08:12:16.27$recpk4/recpatch= 2006.229.08:12:16.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:12:16.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:12:16.27$setupk4/vck44 2006.229.08:12:16.27$vck44/valo=1,524.99 2006.229.08:12:16.27#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.08:12:16.27#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.08:12:16.27#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:16.27#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:12:16.27#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:12:16.27#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:12:16.27#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:12:16.27#ibcon#first serial, iclass 30, count 0 2006.229.08:12:16.27#ibcon#enter sib2, iclass 30, count 0 2006.229.08:12:16.27#ibcon#flushed, iclass 30, count 0 2006.229.08:12:16.27#ibcon#about to write, iclass 30, count 0 2006.229.08:12:16.27#ibcon#wrote, iclass 30, count 0 2006.229.08:12:16.27#ibcon#about to read 3, iclass 30, count 0 2006.229.08:12:16.29#ibcon#read 3, iclass 30, count 0 2006.229.08:12:16.29#ibcon#about to read 4, iclass 30, count 0 2006.229.08:12:16.29#ibcon#read 4, iclass 30, count 0 2006.229.08:12:16.29#ibcon#about to read 5, iclass 30, count 0 2006.229.08:12:16.29#ibcon#read 5, iclass 30, count 0 2006.229.08:12:16.29#ibcon#about to read 6, iclass 30, count 0 2006.229.08:12:16.29#ibcon#read 6, iclass 30, count 0 2006.229.08:12:16.29#ibcon#end of sib2, iclass 30, count 0 2006.229.08:12:16.29#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:12:16.29#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:12:16.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:12:16.29#ibcon#*before write, iclass 30, count 0 2006.229.08:12:16.29#ibcon#enter sib2, iclass 30, count 0 2006.229.08:12:16.29#ibcon#flushed, iclass 30, count 0 2006.229.08:12:16.29#ibcon#about to write, iclass 30, count 0 2006.229.08:12:16.29#ibcon#wrote, iclass 30, count 0 2006.229.08:12:16.29#ibcon#about to read 3, iclass 30, count 0 2006.229.08:12:16.34#ibcon#read 3, iclass 30, count 0 2006.229.08:12:16.34#ibcon#about to read 4, iclass 30, count 0 2006.229.08:12:16.34#ibcon#read 4, iclass 30, count 0 2006.229.08:12:16.34#ibcon#about to read 5, iclass 30, count 0 2006.229.08:12:16.34#ibcon#read 5, iclass 30, count 0 2006.229.08:12:16.34#ibcon#about to read 6, iclass 30, count 0 2006.229.08:12:16.34#ibcon#read 6, iclass 30, count 0 2006.229.08:12:16.34#ibcon#end of sib2, iclass 30, count 0 2006.229.08:12:16.34#ibcon#*after write, iclass 30, count 0 2006.229.08:12:16.34#ibcon#*before return 0, iclass 30, count 0 2006.229.08:12:16.34#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:12:16.34#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:12:16.34#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:12:16.34#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:12:16.34$vck44/va=1,8 2006.229.08:12:16.34#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.08:12:16.34#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.08:12:16.34#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:16.34#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:12:16.34#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:12:16.34#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:12:16.34#ibcon#enter wrdev, iclass 32, count 2 2006.229.08:12:16.34#ibcon#first serial, iclass 32, count 2 2006.229.08:12:16.34#ibcon#enter sib2, iclass 32, count 2 2006.229.08:12:16.34#ibcon#flushed, iclass 32, count 2 2006.229.08:12:16.34#ibcon#about to write, iclass 32, count 2 2006.229.08:12:16.34#ibcon#wrote, iclass 32, count 2 2006.229.08:12:16.34#ibcon#about to read 3, iclass 32, count 2 2006.229.08:12:16.36#ibcon#read 3, iclass 32, count 2 2006.229.08:12:16.36#ibcon#about to read 4, iclass 32, count 2 2006.229.08:12:16.36#ibcon#read 4, iclass 32, count 2 2006.229.08:12:16.36#ibcon#about to read 5, iclass 32, count 2 2006.229.08:12:16.36#ibcon#read 5, iclass 32, count 2 2006.229.08:12:16.36#ibcon#about to read 6, iclass 32, count 2 2006.229.08:12:16.36#ibcon#read 6, iclass 32, count 2 2006.229.08:12:16.36#ibcon#end of sib2, iclass 32, count 2 2006.229.08:12:16.36#ibcon#*mode == 0, iclass 32, count 2 2006.229.08:12:16.36#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.08:12:16.36#ibcon#[25=AT01-08\r\n] 2006.229.08:12:16.36#ibcon#*before write, iclass 32, count 2 2006.229.08:12:16.36#ibcon#enter sib2, iclass 32, count 2 2006.229.08:12:16.36#ibcon#flushed, iclass 32, count 2 2006.229.08:12:16.36#ibcon#about to write, iclass 32, count 2 2006.229.08:12:16.36#ibcon#wrote, iclass 32, count 2 2006.229.08:12:16.36#ibcon#about to read 3, iclass 32, count 2 2006.229.08:12:16.39#ibcon#read 3, iclass 32, count 2 2006.229.08:12:16.39#ibcon#about to read 4, iclass 32, count 2 2006.229.08:12:16.39#ibcon#read 4, iclass 32, count 2 2006.229.08:12:16.39#ibcon#about to read 5, iclass 32, count 2 2006.229.08:12:16.39#ibcon#read 5, iclass 32, count 2 2006.229.08:12:16.39#ibcon#about to read 6, iclass 32, count 2 2006.229.08:12:16.39#ibcon#read 6, iclass 32, count 2 2006.229.08:12:16.39#ibcon#end of sib2, iclass 32, count 2 2006.229.08:12:16.39#ibcon#*after write, iclass 32, count 2 2006.229.08:12:16.39#ibcon#*before return 0, iclass 32, count 2 2006.229.08:12:16.39#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:12:16.39#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:12:16.39#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.08:12:16.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:16.39#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:12:16.51#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:12:16.51#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:12:16.51#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:12:16.51#ibcon#first serial, iclass 32, count 0 2006.229.08:12:16.51#ibcon#enter sib2, iclass 32, count 0 2006.229.08:12:16.51#ibcon#flushed, iclass 32, count 0 2006.229.08:12:16.51#ibcon#about to write, iclass 32, count 0 2006.229.08:12:16.51#ibcon#wrote, iclass 32, count 0 2006.229.08:12:16.51#ibcon#about to read 3, iclass 32, count 0 2006.229.08:12:16.53#ibcon#read 3, iclass 32, count 0 2006.229.08:12:16.53#ibcon#about to read 4, iclass 32, count 0 2006.229.08:12:16.53#ibcon#read 4, iclass 32, count 0 2006.229.08:12:16.53#ibcon#about to read 5, iclass 32, count 0 2006.229.08:12:16.53#ibcon#read 5, iclass 32, count 0 2006.229.08:12:16.53#ibcon#about to read 6, iclass 32, count 0 2006.229.08:12:16.53#ibcon#read 6, iclass 32, count 0 2006.229.08:12:16.53#ibcon#end of sib2, iclass 32, count 0 2006.229.08:12:16.53#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:12:16.53#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:12:16.53#ibcon#[25=USB\r\n] 2006.229.08:12:16.53#ibcon#*before write, iclass 32, count 0 2006.229.08:12:16.53#ibcon#enter sib2, iclass 32, count 0 2006.229.08:12:16.53#ibcon#flushed, iclass 32, count 0 2006.229.08:12:16.53#ibcon#about to write, iclass 32, count 0 2006.229.08:12:16.53#ibcon#wrote, iclass 32, count 0 2006.229.08:12:16.53#ibcon#about to read 3, iclass 32, count 0 2006.229.08:12:16.56#ibcon#read 3, iclass 32, count 0 2006.229.08:12:16.56#ibcon#about to read 4, iclass 32, count 0 2006.229.08:12:16.56#ibcon#read 4, iclass 32, count 0 2006.229.08:12:16.56#ibcon#about to read 5, iclass 32, count 0 2006.229.08:12:16.56#ibcon#read 5, iclass 32, count 0 2006.229.08:12:16.56#ibcon#about to read 6, iclass 32, count 0 2006.229.08:12:16.56#ibcon#read 6, iclass 32, count 0 2006.229.08:12:16.56#ibcon#end of sib2, iclass 32, count 0 2006.229.08:12:16.56#ibcon#*after write, iclass 32, count 0 2006.229.08:12:16.56#ibcon#*before return 0, iclass 32, count 0 2006.229.08:12:16.56#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:12:16.56#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:12:16.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:12:16.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:12:16.56$vck44/valo=2,534.99 2006.229.08:12:16.56#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:12:16.56#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:12:16.56#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:16.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:16.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:16.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:16.56#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:12:16.56#ibcon#first serial, iclass 34, count 0 2006.229.08:12:16.56#ibcon#enter sib2, iclass 34, count 0 2006.229.08:12:16.56#ibcon#flushed, iclass 34, count 0 2006.229.08:12:16.56#ibcon#about to write, iclass 34, count 0 2006.229.08:12:16.56#ibcon#wrote, iclass 34, count 0 2006.229.08:12:16.56#ibcon#about to read 3, iclass 34, count 0 2006.229.08:12:16.58#ibcon#read 3, iclass 34, count 0 2006.229.08:12:16.58#ibcon#about to read 4, iclass 34, count 0 2006.229.08:12:16.58#ibcon#read 4, iclass 34, count 0 2006.229.08:12:16.58#ibcon#about to read 5, iclass 34, count 0 2006.229.08:12:16.58#ibcon#read 5, iclass 34, count 0 2006.229.08:12:16.58#ibcon#about to read 6, iclass 34, count 0 2006.229.08:12:16.58#ibcon#read 6, iclass 34, count 0 2006.229.08:12:16.58#ibcon#end of sib2, iclass 34, count 0 2006.229.08:12:16.58#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:12:16.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:12:16.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:12:16.58#ibcon#*before write, iclass 34, count 0 2006.229.08:12:16.58#ibcon#enter sib2, iclass 34, count 0 2006.229.08:12:16.58#ibcon#flushed, iclass 34, count 0 2006.229.08:12:16.58#ibcon#about to write, iclass 34, count 0 2006.229.08:12:16.58#ibcon#wrote, iclass 34, count 0 2006.229.08:12:16.58#ibcon#about to read 3, iclass 34, count 0 2006.229.08:12:16.62#ibcon#read 3, iclass 34, count 0 2006.229.08:12:16.62#ibcon#about to read 4, iclass 34, count 0 2006.229.08:12:16.62#ibcon#read 4, iclass 34, count 0 2006.229.08:12:16.62#ibcon#about to read 5, iclass 34, count 0 2006.229.08:12:16.62#ibcon#read 5, iclass 34, count 0 2006.229.08:12:16.62#ibcon#about to read 6, iclass 34, count 0 2006.229.08:12:16.62#ibcon#read 6, iclass 34, count 0 2006.229.08:12:16.62#ibcon#end of sib2, iclass 34, count 0 2006.229.08:12:16.62#ibcon#*after write, iclass 34, count 0 2006.229.08:12:16.62#ibcon#*before return 0, iclass 34, count 0 2006.229.08:12:16.62#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:16.62#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:16.62#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:12:16.62#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:12:16.62$vck44/va=2,7 2006.229.08:12:16.62#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.08:12:16.62#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.08:12:16.62#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:16.62#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:16.68#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:16.68#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:16.68#ibcon#enter wrdev, iclass 36, count 2 2006.229.08:12:16.68#ibcon#first serial, iclass 36, count 2 2006.229.08:12:16.68#ibcon#enter sib2, iclass 36, count 2 2006.229.08:12:16.68#ibcon#flushed, iclass 36, count 2 2006.229.08:12:16.68#ibcon#about to write, iclass 36, count 2 2006.229.08:12:16.68#ibcon#wrote, iclass 36, count 2 2006.229.08:12:16.68#ibcon#about to read 3, iclass 36, count 2 2006.229.08:12:16.70#ibcon#read 3, iclass 36, count 2 2006.229.08:12:16.70#ibcon#about to read 4, iclass 36, count 2 2006.229.08:12:16.70#ibcon#read 4, iclass 36, count 2 2006.229.08:12:16.70#ibcon#about to read 5, iclass 36, count 2 2006.229.08:12:16.70#ibcon#read 5, iclass 36, count 2 2006.229.08:12:16.70#ibcon#about to read 6, iclass 36, count 2 2006.229.08:12:16.70#ibcon#read 6, iclass 36, count 2 2006.229.08:12:16.70#ibcon#end of sib2, iclass 36, count 2 2006.229.08:12:16.70#ibcon#*mode == 0, iclass 36, count 2 2006.229.08:12:16.70#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.08:12:16.70#ibcon#[25=AT02-07\r\n] 2006.229.08:12:16.70#ibcon#*before write, iclass 36, count 2 2006.229.08:12:16.70#ibcon#enter sib2, iclass 36, count 2 2006.229.08:12:16.70#ibcon#flushed, iclass 36, count 2 2006.229.08:12:16.70#ibcon#about to write, iclass 36, count 2 2006.229.08:12:16.70#ibcon#wrote, iclass 36, count 2 2006.229.08:12:16.70#ibcon#about to read 3, iclass 36, count 2 2006.229.08:12:16.73#ibcon#read 3, iclass 36, count 2 2006.229.08:12:16.73#ibcon#about to read 4, iclass 36, count 2 2006.229.08:12:16.73#ibcon#read 4, iclass 36, count 2 2006.229.08:12:16.73#ibcon#about to read 5, iclass 36, count 2 2006.229.08:12:16.73#ibcon#read 5, iclass 36, count 2 2006.229.08:12:16.73#ibcon#about to read 6, iclass 36, count 2 2006.229.08:12:16.73#ibcon#read 6, iclass 36, count 2 2006.229.08:12:16.73#ibcon#end of sib2, iclass 36, count 2 2006.229.08:12:16.73#ibcon#*after write, iclass 36, count 2 2006.229.08:12:16.73#ibcon#*before return 0, iclass 36, count 2 2006.229.08:12:16.73#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:16.73#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:16.73#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.08:12:16.73#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:16.73#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:16.85#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:16.85#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:16.85#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:12:16.85#ibcon#first serial, iclass 36, count 0 2006.229.08:12:16.85#ibcon#enter sib2, iclass 36, count 0 2006.229.08:12:16.85#ibcon#flushed, iclass 36, count 0 2006.229.08:12:16.85#ibcon#about to write, iclass 36, count 0 2006.229.08:12:16.85#ibcon#wrote, iclass 36, count 0 2006.229.08:12:16.85#ibcon#about to read 3, iclass 36, count 0 2006.229.08:12:16.87#ibcon#read 3, iclass 36, count 0 2006.229.08:12:16.87#ibcon#about to read 4, iclass 36, count 0 2006.229.08:12:16.87#ibcon#read 4, iclass 36, count 0 2006.229.08:12:16.87#ibcon#about to read 5, iclass 36, count 0 2006.229.08:12:16.87#ibcon#read 5, iclass 36, count 0 2006.229.08:12:16.87#ibcon#about to read 6, iclass 36, count 0 2006.229.08:12:16.87#ibcon#read 6, iclass 36, count 0 2006.229.08:12:16.87#ibcon#end of sib2, iclass 36, count 0 2006.229.08:12:16.87#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:12:16.87#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:12:16.87#ibcon#[25=USB\r\n] 2006.229.08:12:16.87#ibcon#*before write, iclass 36, count 0 2006.229.08:12:16.87#ibcon#enter sib2, iclass 36, count 0 2006.229.08:12:16.87#ibcon#flushed, iclass 36, count 0 2006.229.08:12:16.87#ibcon#about to write, iclass 36, count 0 2006.229.08:12:16.87#ibcon#wrote, iclass 36, count 0 2006.229.08:12:16.87#ibcon#about to read 3, iclass 36, count 0 2006.229.08:12:16.90#ibcon#read 3, iclass 36, count 0 2006.229.08:12:16.90#ibcon#about to read 4, iclass 36, count 0 2006.229.08:12:16.90#ibcon#read 4, iclass 36, count 0 2006.229.08:12:16.90#ibcon#about to read 5, iclass 36, count 0 2006.229.08:12:16.90#ibcon#read 5, iclass 36, count 0 2006.229.08:12:16.90#ibcon#about to read 6, iclass 36, count 0 2006.229.08:12:16.90#ibcon#read 6, iclass 36, count 0 2006.229.08:12:16.90#ibcon#end of sib2, iclass 36, count 0 2006.229.08:12:16.90#ibcon#*after write, iclass 36, count 0 2006.229.08:12:16.90#ibcon#*before return 0, iclass 36, count 0 2006.229.08:12:16.90#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:16.90#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:16.90#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:12:16.90#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:12:16.90$vck44/valo=3,564.99 2006.229.08:12:16.90#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.08:12:16.90#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.08:12:16.90#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:16.90#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:16.90#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:16.90#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:16.90#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:12:16.90#ibcon#first serial, iclass 38, count 0 2006.229.08:12:16.90#ibcon#enter sib2, iclass 38, count 0 2006.229.08:12:16.90#ibcon#flushed, iclass 38, count 0 2006.229.08:12:16.90#ibcon#about to write, iclass 38, count 0 2006.229.08:12:16.90#ibcon#wrote, iclass 38, count 0 2006.229.08:12:16.90#ibcon#about to read 3, iclass 38, count 0 2006.229.08:12:16.92#ibcon#read 3, iclass 38, count 0 2006.229.08:12:16.92#ibcon#about to read 4, iclass 38, count 0 2006.229.08:12:16.92#ibcon#read 4, iclass 38, count 0 2006.229.08:12:16.92#ibcon#about to read 5, iclass 38, count 0 2006.229.08:12:16.92#ibcon#read 5, iclass 38, count 0 2006.229.08:12:16.92#ibcon#about to read 6, iclass 38, count 0 2006.229.08:12:16.92#ibcon#read 6, iclass 38, count 0 2006.229.08:12:16.92#ibcon#end of sib2, iclass 38, count 0 2006.229.08:12:16.92#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:12:16.92#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:12:16.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:12:16.92#ibcon#*before write, iclass 38, count 0 2006.229.08:12:16.92#ibcon#enter sib2, iclass 38, count 0 2006.229.08:12:16.92#ibcon#flushed, iclass 38, count 0 2006.229.08:12:16.92#ibcon#about to write, iclass 38, count 0 2006.229.08:12:16.92#ibcon#wrote, iclass 38, count 0 2006.229.08:12:16.92#ibcon#about to read 3, iclass 38, count 0 2006.229.08:12:16.96#ibcon#read 3, iclass 38, count 0 2006.229.08:12:16.96#ibcon#about to read 4, iclass 38, count 0 2006.229.08:12:16.96#ibcon#read 4, iclass 38, count 0 2006.229.08:12:16.96#ibcon#about to read 5, iclass 38, count 0 2006.229.08:12:16.96#ibcon#read 5, iclass 38, count 0 2006.229.08:12:16.96#ibcon#about to read 6, iclass 38, count 0 2006.229.08:12:16.96#ibcon#read 6, iclass 38, count 0 2006.229.08:12:16.96#ibcon#end of sib2, iclass 38, count 0 2006.229.08:12:16.96#ibcon#*after write, iclass 38, count 0 2006.229.08:12:16.96#ibcon#*before return 0, iclass 38, count 0 2006.229.08:12:16.96#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:16.96#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:16.96#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:12:16.96#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:12:16.96$vck44/va=3,6 2006.229.08:12:16.96#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.08:12:16.96#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.08:12:16.96#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:16.96#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:17.02#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:17.02#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:17.02#ibcon#enter wrdev, iclass 40, count 2 2006.229.08:12:17.02#ibcon#first serial, iclass 40, count 2 2006.229.08:12:17.02#ibcon#enter sib2, iclass 40, count 2 2006.229.08:12:17.02#ibcon#flushed, iclass 40, count 2 2006.229.08:12:17.02#ibcon#about to write, iclass 40, count 2 2006.229.08:12:17.02#ibcon#wrote, iclass 40, count 2 2006.229.08:12:17.02#ibcon#about to read 3, iclass 40, count 2 2006.229.08:12:17.04#ibcon#read 3, iclass 40, count 2 2006.229.08:12:17.04#ibcon#about to read 4, iclass 40, count 2 2006.229.08:12:17.04#ibcon#read 4, iclass 40, count 2 2006.229.08:12:17.04#ibcon#about to read 5, iclass 40, count 2 2006.229.08:12:17.04#ibcon#read 5, iclass 40, count 2 2006.229.08:12:17.04#ibcon#about to read 6, iclass 40, count 2 2006.229.08:12:17.04#ibcon#read 6, iclass 40, count 2 2006.229.08:12:17.04#ibcon#end of sib2, iclass 40, count 2 2006.229.08:12:17.04#ibcon#*mode == 0, iclass 40, count 2 2006.229.08:12:17.04#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.08:12:17.04#ibcon#[25=AT03-06\r\n] 2006.229.08:12:17.04#ibcon#*before write, iclass 40, count 2 2006.229.08:12:17.04#ibcon#enter sib2, iclass 40, count 2 2006.229.08:12:17.04#ibcon#flushed, iclass 40, count 2 2006.229.08:12:17.04#ibcon#about to write, iclass 40, count 2 2006.229.08:12:17.04#ibcon#wrote, iclass 40, count 2 2006.229.08:12:17.04#ibcon#about to read 3, iclass 40, count 2 2006.229.08:12:17.07#ibcon#read 3, iclass 40, count 2 2006.229.08:12:17.07#ibcon#about to read 4, iclass 40, count 2 2006.229.08:12:17.07#ibcon#read 4, iclass 40, count 2 2006.229.08:12:17.07#ibcon#about to read 5, iclass 40, count 2 2006.229.08:12:17.07#ibcon#read 5, iclass 40, count 2 2006.229.08:12:17.07#ibcon#about to read 6, iclass 40, count 2 2006.229.08:12:17.07#ibcon#read 6, iclass 40, count 2 2006.229.08:12:17.07#ibcon#end of sib2, iclass 40, count 2 2006.229.08:12:17.07#ibcon#*after write, iclass 40, count 2 2006.229.08:12:17.07#ibcon#*before return 0, iclass 40, count 2 2006.229.08:12:17.07#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:17.07#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:17.07#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.08:12:17.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:17.07#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:17.19#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:17.19#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:17.19#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:12:17.19#ibcon#first serial, iclass 40, count 0 2006.229.08:12:17.19#ibcon#enter sib2, iclass 40, count 0 2006.229.08:12:17.19#ibcon#flushed, iclass 40, count 0 2006.229.08:12:17.19#ibcon#about to write, iclass 40, count 0 2006.229.08:12:17.19#ibcon#wrote, iclass 40, count 0 2006.229.08:12:17.19#ibcon#about to read 3, iclass 40, count 0 2006.229.08:12:17.21#ibcon#read 3, iclass 40, count 0 2006.229.08:12:17.21#ibcon#about to read 4, iclass 40, count 0 2006.229.08:12:17.21#ibcon#read 4, iclass 40, count 0 2006.229.08:12:17.21#ibcon#about to read 5, iclass 40, count 0 2006.229.08:12:17.21#ibcon#read 5, iclass 40, count 0 2006.229.08:12:17.21#ibcon#about to read 6, iclass 40, count 0 2006.229.08:12:17.21#ibcon#read 6, iclass 40, count 0 2006.229.08:12:17.21#ibcon#end of sib2, iclass 40, count 0 2006.229.08:12:17.21#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:12:17.21#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:12:17.21#ibcon#[25=USB\r\n] 2006.229.08:12:17.21#ibcon#*before write, iclass 40, count 0 2006.229.08:12:17.21#ibcon#enter sib2, iclass 40, count 0 2006.229.08:12:17.21#ibcon#flushed, iclass 40, count 0 2006.229.08:12:17.21#ibcon#about to write, iclass 40, count 0 2006.229.08:12:17.21#ibcon#wrote, iclass 40, count 0 2006.229.08:12:17.21#ibcon#about to read 3, iclass 40, count 0 2006.229.08:12:17.24#ibcon#read 3, iclass 40, count 0 2006.229.08:12:17.24#ibcon#about to read 4, iclass 40, count 0 2006.229.08:12:17.24#ibcon#read 4, iclass 40, count 0 2006.229.08:12:17.24#ibcon#about to read 5, iclass 40, count 0 2006.229.08:12:17.24#ibcon#read 5, iclass 40, count 0 2006.229.08:12:17.24#ibcon#about to read 6, iclass 40, count 0 2006.229.08:12:17.24#ibcon#read 6, iclass 40, count 0 2006.229.08:12:17.24#ibcon#end of sib2, iclass 40, count 0 2006.229.08:12:17.24#ibcon#*after write, iclass 40, count 0 2006.229.08:12:17.24#ibcon#*before return 0, iclass 40, count 0 2006.229.08:12:17.24#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:17.24#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:17.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:12:17.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:12:17.24$vck44/valo=4,624.99 2006.229.08:12:17.24#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.08:12:17.24#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.08:12:17.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:17.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:17.24#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:17.24#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:17.24#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:12:17.24#ibcon#first serial, iclass 4, count 0 2006.229.08:12:17.24#ibcon#enter sib2, iclass 4, count 0 2006.229.08:12:17.24#ibcon#flushed, iclass 4, count 0 2006.229.08:12:17.24#ibcon#about to write, iclass 4, count 0 2006.229.08:12:17.24#ibcon#wrote, iclass 4, count 0 2006.229.08:12:17.24#ibcon#about to read 3, iclass 4, count 0 2006.229.08:12:17.26#ibcon#read 3, iclass 4, count 0 2006.229.08:12:17.26#ibcon#about to read 4, iclass 4, count 0 2006.229.08:12:17.26#ibcon#read 4, iclass 4, count 0 2006.229.08:12:17.26#ibcon#about to read 5, iclass 4, count 0 2006.229.08:12:17.26#ibcon#read 5, iclass 4, count 0 2006.229.08:12:17.26#ibcon#about to read 6, iclass 4, count 0 2006.229.08:12:17.26#ibcon#read 6, iclass 4, count 0 2006.229.08:12:17.26#ibcon#end of sib2, iclass 4, count 0 2006.229.08:12:17.26#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:12:17.26#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:12:17.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:12:17.26#ibcon#*before write, iclass 4, count 0 2006.229.08:12:17.26#ibcon#enter sib2, iclass 4, count 0 2006.229.08:12:17.26#ibcon#flushed, iclass 4, count 0 2006.229.08:12:17.26#ibcon#about to write, iclass 4, count 0 2006.229.08:12:17.26#ibcon#wrote, iclass 4, count 0 2006.229.08:12:17.26#ibcon#about to read 3, iclass 4, count 0 2006.229.08:12:17.30#ibcon#read 3, iclass 4, count 0 2006.229.08:12:17.30#ibcon#about to read 4, iclass 4, count 0 2006.229.08:12:17.30#ibcon#read 4, iclass 4, count 0 2006.229.08:12:17.30#ibcon#about to read 5, iclass 4, count 0 2006.229.08:12:17.30#ibcon#read 5, iclass 4, count 0 2006.229.08:12:17.30#ibcon#about to read 6, iclass 4, count 0 2006.229.08:12:17.30#ibcon#read 6, iclass 4, count 0 2006.229.08:12:17.30#ibcon#end of sib2, iclass 4, count 0 2006.229.08:12:17.30#ibcon#*after write, iclass 4, count 0 2006.229.08:12:17.30#ibcon#*before return 0, iclass 4, count 0 2006.229.08:12:17.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:17.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:17.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:12:17.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:12:17.30$vck44/va=4,7 2006.229.08:12:17.30#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.08:12:17.30#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.08:12:17.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:17.30#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:17.36#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:17.36#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:17.36#ibcon#enter wrdev, iclass 6, count 2 2006.229.08:12:17.36#ibcon#first serial, iclass 6, count 2 2006.229.08:12:17.36#ibcon#enter sib2, iclass 6, count 2 2006.229.08:12:17.36#ibcon#flushed, iclass 6, count 2 2006.229.08:12:17.36#ibcon#about to write, iclass 6, count 2 2006.229.08:12:17.36#ibcon#wrote, iclass 6, count 2 2006.229.08:12:17.36#ibcon#about to read 3, iclass 6, count 2 2006.229.08:12:17.38#ibcon#read 3, iclass 6, count 2 2006.229.08:12:17.38#ibcon#about to read 4, iclass 6, count 2 2006.229.08:12:17.38#ibcon#read 4, iclass 6, count 2 2006.229.08:12:17.38#ibcon#about to read 5, iclass 6, count 2 2006.229.08:12:17.38#ibcon#read 5, iclass 6, count 2 2006.229.08:12:17.38#ibcon#about to read 6, iclass 6, count 2 2006.229.08:12:17.38#ibcon#read 6, iclass 6, count 2 2006.229.08:12:17.38#ibcon#end of sib2, iclass 6, count 2 2006.229.08:12:17.38#ibcon#*mode == 0, iclass 6, count 2 2006.229.08:12:17.38#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.08:12:17.38#ibcon#[25=AT04-07\r\n] 2006.229.08:12:17.38#ibcon#*before write, iclass 6, count 2 2006.229.08:12:17.38#ibcon#enter sib2, iclass 6, count 2 2006.229.08:12:17.38#ibcon#flushed, iclass 6, count 2 2006.229.08:12:17.38#ibcon#about to write, iclass 6, count 2 2006.229.08:12:17.38#ibcon#wrote, iclass 6, count 2 2006.229.08:12:17.38#ibcon#about to read 3, iclass 6, count 2 2006.229.08:12:17.41#ibcon#read 3, iclass 6, count 2 2006.229.08:12:17.41#ibcon#about to read 4, iclass 6, count 2 2006.229.08:12:17.41#ibcon#read 4, iclass 6, count 2 2006.229.08:12:17.41#ibcon#about to read 5, iclass 6, count 2 2006.229.08:12:17.41#ibcon#read 5, iclass 6, count 2 2006.229.08:12:17.41#ibcon#about to read 6, iclass 6, count 2 2006.229.08:12:17.41#ibcon#read 6, iclass 6, count 2 2006.229.08:12:17.41#ibcon#end of sib2, iclass 6, count 2 2006.229.08:12:17.41#ibcon#*after write, iclass 6, count 2 2006.229.08:12:17.41#ibcon#*before return 0, iclass 6, count 2 2006.229.08:12:17.41#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:17.41#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:17.41#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.08:12:17.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:17.41#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:17.53#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:17.53#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:17.53#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:12:17.53#ibcon#first serial, iclass 6, count 0 2006.229.08:12:17.53#ibcon#enter sib2, iclass 6, count 0 2006.229.08:12:17.53#ibcon#flushed, iclass 6, count 0 2006.229.08:12:17.53#ibcon#about to write, iclass 6, count 0 2006.229.08:12:17.53#ibcon#wrote, iclass 6, count 0 2006.229.08:12:17.53#ibcon#about to read 3, iclass 6, count 0 2006.229.08:12:17.55#ibcon#read 3, iclass 6, count 0 2006.229.08:12:17.55#ibcon#about to read 4, iclass 6, count 0 2006.229.08:12:17.55#ibcon#read 4, iclass 6, count 0 2006.229.08:12:17.55#ibcon#about to read 5, iclass 6, count 0 2006.229.08:12:17.55#ibcon#read 5, iclass 6, count 0 2006.229.08:12:17.55#ibcon#about to read 6, iclass 6, count 0 2006.229.08:12:17.55#ibcon#read 6, iclass 6, count 0 2006.229.08:12:17.55#ibcon#end of sib2, iclass 6, count 0 2006.229.08:12:17.55#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:12:17.55#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:12:17.55#ibcon#[25=USB\r\n] 2006.229.08:12:17.55#ibcon#*before write, iclass 6, count 0 2006.229.08:12:17.55#ibcon#enter sib2, iclass 6, count 0 2006.229.08:12:17.55#ibcon#flushed, iclass 6, count 0 2006.229.08:12:17.55#ibcon#about to write, iclass 6, count 0 2006.229.08:12:17.55#ibcon#wrote, iclass 6, count 0 2006.229.08:12:17.55#ibcon#about to read 3, iclass 6, count 0 2006.229.08:12:17.58#ibcon#read 3, iclass 6, count 0 2006.229.08:12:17.58#ibcon#about to read 4, iclass 6, count 0 2006.229.08:12:17.58#ibcon#read 4, iclass 6, count 0 2006.229.08:12:17.58#ibcon#about to read 5, iclass 6, count 0 2006.229.08:12:17.58#ibcon#read 5, iclass 6, count 0 2006.229.08:12:17.58#ibcon#about to read 6, iclass 6, count 0 2006.229.08:12:17.58#ibcon#read 6, iclass 6, count 0 2006.229.08:12:17.58#ibcon#end of sib2, iclass 6, count 0 2006.229.08:12:17.58#ibcon#*after write, iclass 6, count 0 2006.229.08:12:17.58#ibcon#*before return 0, iclass 6, count 0 2006.229.08:12:17.58#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:17.58#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:17.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:12:17.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:12:17.58$vck44/valo=5,734.99 2006.229.08:12:17.58#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.08:12:17.58#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.08:12:17.58#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:17.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:17.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:17.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:17.58#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:12:17.58#ibcon#first serial, iclass 10, count 0 2006.229.08:12:17.58#ibcon#enter sib2, iclass 10, count 0 2006.229.08:12:17.58#ibcon#flushed, iclass 10, count 0 2006.229.08:12:17.58#ibcon#about to write, iclass 10, count 0 2006.229.08:12:17.58#ibcon#wrote, iclass 10, count 0 2006.229.08:12:17.58#ibcon#about to read 3, iclass 10, count 0 2006.229.08:12:17.60#ibcon#read 3, iclass 10, count 0 2006.229.08:12:17.60#ibcon#about to read 4, iclass 10, count 0 2006.229.08:12:17.60#ibcon#read 4, iclass 10, count 0 2006.229.08:12:17.60#ibcon#about to read 5, iclass 10, count 0 2006.229.08:12:17.60#ibcon#read 5, iclass 10, count 0 2006.229.08:12:17.60#ibcon#about to read 6, iclass 10, count 0 2006.229.08:12:17.60#ibcon#read 6, iclass 10, count 0 2006.229.08:12:17.60#ibcon#end of sib2, iclass 10, count 0 2006.229.08:12:17.60#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:12:17.60#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:12:17.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:12:17.60#ibcon#*before write, iclass 10, count 0 2006.229.08:12:17.60#ibcon#enter sib2, iclass 10, count 0 2006.229.08:12:17.60#ibcon#flushed, iclass 10, count 0 2006.229.08:12:17.60#ibcon#about to write, iclass 10, count 0 2006.229.08:12:17.60#ibcon#wrote, iclass 10, count 0 2006.229.08:12:17.60#ibcon#about to read 3, iclass 10, count 0 2006.229.08:12:17.64#ibcon#read 3, iclass 10, count 0 2006.229.08:12:17.64#ibcon#about to read 4, iclass 10, count 0 2006.229.08:12:17.64#ibcon#read 4, iclass 10, count 0 2006.229.08:12:17.64#ibcon#about to read 5, iclass 10, count 0 2006.229.08:12:17.64#ibcon#read 5, iclass 10, count 0 2006.229.08:12:17.64#ibcon#about to read 6, iclass 10, count 0 2006.229.08:12:17.64#ibcon#read 6, iclass 10, count 0 2006.229.08:12:17.64#ibcon#end of sib2, iclass 10, count 0 2006.229.08:12:17.64#ibcon#*after write, iclass 10, count 0 2006.229.08:12:17.64#ibcon#*before return 0, iclass 10, count 0 2006.229.08:12:17.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:17.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:17.64#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:12:17.64#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:12:17.64$vck44/va=5,4 2006.229.08:12:17.64#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.08:12:17.64#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.08:12:17.64#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:17.64#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:17.70#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:17.70#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:17.70#ibcon#enter wrdev, iclass 12, count 2 2006.229.08:12:17.70#ibcon#first serial, iclass 12, count 2 2006.229.08:12:17.70#ibcon#enter sib2, iclass 12, count 2 2006.229.08:12:17.70#ibcon#flushed, iclass 12, count 2 2006.229.08:12:17.70#ibcon#about to write, iclass 12, count 2 2006.229.08:12:17.70#ibcon#wrote, iclass 12, count 2 2006.229.08:12:17.70#ibcon#about to read 3, iclass 12, count 2 2006.229.08:12:17.72#ibcon#read 3, iclass 12, count 2 2006.229.08:12:17.72#ibcon#about to read 4, iclass 12, count 2 2006.229.08:12:17.72#ibcon#read 4, iclass 12, count 2 2006.229.08:12:17.72#ibcon#about to read 5, iclass 12, count 2 2006.229.08:12:17.72#ibcon#read 5, iclass 12, count 2 2006.229.08:12:17.72#ibcon#about to read 6, iclass 12, count 2 2006.229.08:12:17.72#ibcon#read 6, iclass 12, count 2 2006.229.08:12:17.72#ibcon#end of sib2, iclass 12, count 2 2006.229.08:12:17.72#ibcon#*mode == 0, iclass 12, count 2 2006.229.08:12:17.72#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.08:12:17.72#ibcon#[25=AT05-04\r\n] 2006.229.08:12:17.72#ibcon#*before write, iclass 12, count 2 2006.229.08:12:17.72#ibcon#enter sib2, iclass 12, count 2 2006.229.08:12:17.72#ibcon#flushed, iclass 12, count 2 2006.229.08:12:17.72#ibcon#about to write, iclass 12, count 2 2006.229.08:12:17.72#ibcon#wrote, iclass 12, count 2 2006.229.08:12:17.72#ibcon#about to read 3, iclass 12, count 2 2006.229.08:12:17.75#ibcon#read 3, iclass 12, count 2 2006.229.08:12:17.75#ibcon#about to read 4, iclass 12, count 2 2006.229.08:12:17.75#ibcon#read 4, iclass 12, count 2 2006.229.08:12:17.75#ibcon#about to read 5, iclass 12, count 2 2006.229.08:12:17.75#ibcon#read 5, iclass 12, count 2 2006.229.08:12:17.75#ibcon#about to read 6, iclass 12, count 2 2006.229.08:12:17.75#ibcon#read 6, iclass 12, count 2 2006.229.08:12:17.75#ibcon#end of sib2, iclass 12, count 2 2006.229.08:12:17.75#ibcon#*after write, iclass 12, count 2 2006.229.08:12:17.75#ibcon#*before return 0, iclass 12, count 2 2006.229.08:12:17.75#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:17.75#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:17.75#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.08:12:17.75#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:17.75#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:17.87#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:17.87#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:17.87#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:12:17.87#ibcon#first serial, iclass 12, count 0 2006.229.08:12:17.87#ibcon#enter sib2, iclass 12, count 0 2006.229.08:12:17.87#ibcon#flushed, iclass 12, count 0 2006.229.08:12:17.87#ibcon#about to write, iclass 12, count 0 2006.229.08:12:17.87#ibcon#wrote, iclass 12, count 0 2006.229.08:12:17.87#ibcon#about to read 3, iclass 12, count 0 2006.229.08:12:17.89#ibcon#read 3, iclass 12, count 0 2006.229.08:12:17.89#ibcon#about to read 4, iclass 12, count 0 2006.229.08:12:17.89#ibcon#read 4, iclass 12, count 0 2006.229.08:12:17.89#ibcon#about to read 5, iclass 12, count 0 2006.229.08:12:17.89#ibcon#read 5, iclass 12, count 0 2006.229.08:12:17.89#ibcon#about to read 6, iclass 12, count 0 2006.229.08:12:17.89#ibcon#read 6, iclass 12, count 0 2006.229.08:12:17.89#ibcon#end of sib2, iclass 12, count 0 2006.229.08:12:17.89#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:12:17.89#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:12:17.89#ibcon#[25=USB\r\n] 2006.229.08:12:17.89#ibcon#*before write, iclass 12, count 0 2006.229.08:12:17.89#ibcon#enter sib2, iclass 12, count 0 2006.229.08:12:17.89#ibcon#flushed, iclass 12, count 0 2006.229.08:12:17.89#ibcon#about to write, iclass 12, count 0 2006.229.08:12:17.89#ibcon#wrote, iclass 12, count 0 2006.229.08:12:17.89#ibcon#about to read 3, iclass 12, count 0 2006.229.08:12:17.92#ibcon#read 3, iclass 12, count 0 2006.229.08:12:17.92#ibcon#about to read 4, iclass 12, count 0 2006.229.08:12:17.92#ibcon#read 4, iclass 12, count 0 2006.229.08:12:17.92#ibcon#about to read 5, iclass 12, count 0 2006.229.08:12:17.92#ibcon#read 5, iclass 12, count 0 2006.229.08:12:17.92#ibcon#about to read 6, iclass 12, count 0 2006.229.08:12:17.92#ibcon#read 6, iclass 12, count 0 2006.229.08:12:17.92#ibcon#end of sib2, iclass 12, count 0 2006.229.08:12:17.92#ibcon#*after write, iclass 12, count 0 2006.229.08:12:17.92#ibcon#*before return 0, iclass 12, count 0 2006.229.08:12:17.92#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:17.92#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:17.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:12:17.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:12:17.92$vck44/valo=6,814.99 2006.229.08:12:17.92#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.08:12:17.92#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.08:12:17.92#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:17.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:17.92#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:17.92#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:17.92#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:12:17.92#ibcon#first serial, iclass 14, count 0 2006.229.08:12:17.92#ibcon#enter sib2, iclass 14, count 0 2006.229.08:12:17.92#ibcon#flushed, iclass 14, count 0 2006.229.08:12:17.92#ibcon#about to write, iclass 14, count 0 2006.229.08:12:17.92#ibcon#wrote, iclass 14, count 0 2006.229.08:12:17.92#ibcon#about to read 3, iclass 14, count 0 2006.229.08:12:17.94#ibcon#read 3, iclass 14, count 0 2006.229.08:12:17.94#ibcon#about to read 4, iclass 14, count 0 2006.229.08:12:17.94#ibcon#read 4, iclass 14, count 0 2006.229.08:12:17.94#ibcon#about to read 5, iclass 14, count 0 2006.229.08:12:17.94#ibcon#read 5, iclass 14, count 0 2006.229.08:12:17.94#ibcon#about to read 6, iclass 14, count 0 2006.229.08:12:17.94#ibcon#read 6, iclass 14, count 0 2006.229.08:12:17.94#ibcon#end of sib2, iclass 14, count 0 2006.229.08:12:17.94#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:12:17.94#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:12:17.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:12:17.94#ibcon#*before write, iclass 14, count 0 2006.229.08:12:17.94#ibcon#enter sib2, iclass 14, count 0 2006.229.08:12:17.94#ibcon#flushed, iclass 14, count 0 2006.229.08:12:17.94#ibcon#about to write, iclass 14, count 0 2006.229.08:12:17.94#ibcon#wrote, iclass 14, count 0 2006.229.08:12:17.94#ibcon#about to read 3, iclass 14, count 0 2006.229.08:12:17.98#ibcon#read 3, iclass 14, count 0 2006.229.08:12:17.98#ibcon#about to read 4, iclass 14, count 0 2006.229.08:12:17.98#ibcon#read 4, iclass 14, count 0 2006.229.08:12:17.98#ibcon#about to read 5, iclass 14, count 0 2006.229.08:12:17.98#ibcon#read 5, iclass 14, count 0 2006.229.08:12:17.98#ibcon#about to read 6, iclass 14, count 0 2006.229.08:12:17.98#ibcon#read 6, iclass 14, count 0 2006.229.08:12:17.98#ibcon#end of sib2, iclass 14, count 0 2006.229.08:12:17.98#ibcon#*after write, iclass 14, count 0 2006.229.08:12:17.98#ibcon#*before return 0, iclass 14, count 0 2006.229.08:12:17.98#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:17.98#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:17.98#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:12:17.98#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:12:17.98$vck44/va=6,4 2006.229.08:12:17.98#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.08:12:17.98#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.08:12:17.98#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:17.98#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:18.04#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:18.04#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:18.04#ibcon#enter wrdev, iclass 16, count 2 2006.229.08:12:18.04#ibcon#first serial, iclass 16, count 2 2006.229.08:12:18.04#ibcon#enter sib2, iclass 16, count 2 2006.229.08:12:18.04#ibcon#flushed, iclass 16, count 2 2006.229.08:12:18.04#ibcon#about to write, iclass 16, count 2 2006.229.08:12:18.04#ibcon#wrote, iclass 16, count 2 2006.229.08:12:18.04#ibcon#about to read 3, iclass 16, count 2 2006.229.08:12:18.06#ibcon#read 3, iclass 16, count 2 2006.229.08:12:18.06#ibcon#about to read 4, iclass 16, count 2 2006.229.08:12:18.06#ibcon#read 4, iclass 16, count 2 2006.229.08:12:18.06#ibcon#about to read 5, iclass 16, count 2 2006.229.08:12:18.06#ibcon#read 5, iclass 16, count 2 2006.229.08:12:18.06#ibcon#about to read 6, iclass 16, count 2 2006.229.08:12:18.06#ibcon#read 6, iclass 16, count 2 2006.229.08:12:18.06#ibcon#end of sib2, iclass 16, count 2 2006.229.08:12:18.06#ibcon#*mode == 0, iclass 16, count 2 2006.229.08:12:18.06#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.08:12:18.06#ibcon#[25=AT06-04\r\n] 2006.229.08:12:18.06#ibcon#*before write, iclass 16, count 2 2006.229.08:12:18.06#ibcon#enter sib2, iclass 16, count 2 2006.229.08:12:18.06#ibcon#flushed, iclass 16, count 2 2006.229.08:12:18.06#ibcon#about to write, iclass 16, count 2 2006.229.08:12:18.06#ibcon#wrote, iclass 16, count 2 2006.229.08:12:18.06#ibcon#about to read 3, iclass 16, count 2 2006.229.08:12:18.09#ibcon#read 3, iclass 16, count 2 2006.229.08:12:18.09#ibcon#about to read 4, iclass 16, count 2 2006.229.08:12:18.09#ibcon#read 4, iclass 16, count 2 2006.229.08:12:18.09#ibcon#about to read 5, iclass 16, count 2 2006.229.08:12:18.09#ibcon#read 5, iclass 16, count 2 2006.229.08:12:18.09#ibcon#about to read 6, iclass 16, count 2 2006.229.08:12:18.09#ibcon#read 6, iclass 16, count 2 2006.229.08:12:18.09#ibcon#end of sib2, iclass 16, count 2 2006.229.08:12:18.09#ibcon#*after write, iclass 16, count 2 2006.229.08:12:18.09#ibcon#*before return 0, iclass 16, count 2 2006.229.08:12:18.09#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:18.09#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:18.09#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.08:12:18.09#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:18.09#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:18.21#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:18.21#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:18.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:12:18.21#ibcon#first serial, iclass 16, count 0 2006.229.08:12:18.21#ibcon#enter sib2, iclass 16, count 0 2006.229.08:12:18.21#ibcon#flushed, iclass 16, count 0 2006.229.08:12:18.21#ibcon#about to write, iclass 16, count 0 2006.229.08:12:18.21#ibcon#wrote, iclass 16, count 0 2006.229.08:12:18.21#ibcon#about to read 3, iclass 16, count 0 2006.229.08:12:18.23#ibcon#read 3, iclass 16, count 0 2006.229.08:12:18.23#ibcon#about to read 4, iclass 16, count 0 2006.229.08:12:18.23#ibcon#read 4, iclass 16, count 0 2006.229.08:12:18.23#ibcon#about to read 5, iclass 16, count 0 2006.229.08:12:18.23#ibcon#read 5, iclass 16, count 0 2006.229.08:12:18.23#ibcon#about to read 6, iclass 16, count 0 2006.229.08:12:18.23#ibcon#read 6, iclass 16, count 0 2006.229.08:12:18.23#ibcon#end of sib2, iclass 16, count 0 2006.229.08:12:18.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:12:18.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:12:18.23#ibcon#[25=USB\r\n] 2006.229.08:12:18.23#ibcon#*before write, iclass 16, count 0 2006.229.08:12:18.23#ibcon#enter sib2, iclass 16, count 0 2006.229.08:12:18.23#ibcon#flushed, iclass 16, count 0 2006.229.08:12:18.23#ibcon#about to write, iclass 16, count 0 2006.229.08:12:18.23#ibcon#wrote, iclass 16, count 0 2006.229.08:12:18.23#ibcon#about to read 3, iclass 16, count 0 2006.229.08:12:18.26#ibcon#read 3, iclass 16, count 0 2006.229.08:12:18.26#ibcon#about to read 4, iclass 16, count 0 2006.229.08:12:18.26#ibcon#read 4, iclass 16, count 0 2006.229.08:12:18.26#ibcon#about to read 5, iclass 16, count 0 2006.229.08:12:18.26#ibcon#read 5, iclass 16, count 0 2006.229.08:12:18.26#ibcon#about to read 6, iclass 16, count 0 2006.229.08:12:18.26#ibcon#read 6, iclass 16, count 0 2006.229.08:12:18.26#ibcon#end of sib2, iclass 16, count 0 2006.229.08:12:18.26#ibcon#*after write, iclass 16, count 0 2006.229.08:12:18.26#ibcon#*before return 0, iclass 16, count 0 2006.229.08:12:18.26#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:18.26#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:18.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:12:18.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:12:18.26$vck44/valo=7,864.99 2006.229.08:12:18.26#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.08:12:18.26#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.08:12:18.26#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:18.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:18.26#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:18.26#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:18.26#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:12:18.26#ibcon#first serial, iclass 18, count 0 2006.229.08:12:18.26#ibcon#enter sib2, iclass 18, count 0 2006.229.08:12:18.26#ibcon#flushed, iclass 18, count 0 2006.229.08:12:18.26#ibcon#about to write, iclass 18, count 0 2006.229.08:12:18.26#ibcon#wrote, iclass 18, count 0 2006.229.08:12:18.26#ibcon#about to read 3, iclass 18, count 0 2006.229.08:12:18.28#ibcon#read 3, iclass 18, count 0 2006.229.08:12:18.28#ibcon#about to read 4, iclass 18, count 0 2006.229.08:12:18.28#ibcon#read 4, iclass 18, count 0 2006.229.08:12:18.28#ibcon#about to read 5, iclass 18, count 0 2006.229.08:12:18.28#ibcon#read 5, iclass 18, count 0 2006.229.08:12:18.28#ibcon#about to read 6, iclass 18, count 0 2006.229.08:12:18.28#ibcon#read 6, iclass 18, count 0 2006.229.08:12:18.28#ibcon#end of sib2, iclass 18, count 0 2006.229.08:12:18.28#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:12:18.28#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:12:18.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:12:18.28#ibcon#*before write, iclass 18, count 0 2006.229.08:12:18.28#ibcon#enter sib2, iclass 18, count 0 2006.229.08:12:18.28#ibcon#flushed, iclass 18, count 0 2006.229.08:12:18.28#ibcon#about to write, iclass 18, count 0 2006.229.08:12:18.28#ibcon#wrote, iclass 18, count 0 2006.229.08:12:18.28#ibcon#about to read 3, iclass 18, count 0 2006.229.08:12:18.32#ibcon#read 3, iclass 18, count 0 2006.229.08:12:18.32#ibcon#about to read 4, iclass 18, count 0 2006.229.08:12:18.32#ibcon#read 4, iclass 18, count 0 2006.229.08:12:18.32#ibcon#about to read 5, iclass 18, count 0 2006.229.08:12:18.32#ibcon#read 5, iclass 18, count 0 2006.229.08:12:18.32#ibcon#about to read 6, iclass 18, count 0 2006.229.08:12:18.32#ibcon#read 6, iclass 18, count 0 2006.229.08:12:18.32#ibcon#end of sib2, iclass 18, count 0 2006.229.08:12:18.32#ibcon#*after write, iclass 18, count 0 2006.229.08:12:18.32#ibcon#*before return 0, iclass 18, count 0 2006.229.08:12:18.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:18.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:18.32#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:12:18.32#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:12:18.32$vck44/va=7,5 2006.229.08:12:18.32#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.08:12:18.32#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.08:12:18.32#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:18.32#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:18.38#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:18.38#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:18.38#ibcon#enter wrdev, iclass 20, count 2 2006.229.08:12:18.38#ibcon#first serial, iclass 20, count 2 2006.229.08:12:18.38#ibcon#enter sib2, iclass 20, count 2 2006.229.08:12:18.38#ibcon#flushed, iclass 20, count 2 2006.229.08:12:18.38#ibcon#about to write, iclass 20, count 2 2006.229.08:12:18.38#ibcon#wrote, iclass 20, count 2 2006.229.08:12:18.38#ibcon#about to read 3, iclass 20, count 2 2006.229.08:12:18.40#ibcon#read 3, iclass 20, count 2 2006.229.08:12:18.40#ibcon#about to read 4, iclass 20, count 2 2006.229.08:12:18.40#ibcon#read 4, iclass 20, count 2 2006.229.08:12:18.40#ibcon#about to read 5, iclass 20, count 2 2006.229.08:12:18.40#ibcon#read 5, iclass 20, count 2 2006.229.08:12:18.40#ibcon#about to read 6, iclass 20, count 2 2006.229.08:12:18.40#ibcon#read 6, iclass 20, count 2 2006.229.08:12:18.40#ibcon#end of sib2, iclass 20, count 2 2006.229.08:12:18.40#ibcon#*mode == 0, iclass 20, count 2 2006.229.08:12:18.40#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.08:12:18.40#ibcon#[25=AT07-05\r\n] 2006.229.08:12:18.40#ibcon#*before write, iclass 20, count 2 2006.229.08:12:18.40#ibcon#enter sib2, iclass 20, count 2 2006.229.08:12:18.40#ibcon#flushed, iclass 20, count 2 2006.229.08:12:18.40#ibcon#about to write, iclass 20, count 2 2006.229.08:12:18.40#ibcon#wrote, iclass 20, count 2 2006.229.08:12:18.40#ibcon#about to read 3, iclass 20, count 2 2006.229.08:12:18.43#ibcon#read 3, iclass 20, count 2 2006.229.08:12:18.43#ibcon#about to read 4, iclass 20, count 2 2006.229.08:12:18.43#ibcon#read 4, iclass 20, count 2 2006.229.08:12:18.43#ibcon#about to read 5, iclass 20, count 2 2006.229.08:12:18.43#ibcon#read 5, iclass 20, count 2 2006.229.08:12:18.43#ibcon#about to read 6, iclass 20, count 2 2006.229.08:12:18.43#ibcon#read 6, iclass 20, count 2 2006.229.08:12:18.43#ibcon#end of sib2, iclass 20, count 2 2006.229.08:12:18.43#ibcon#*after write, iclass 20, count 2 2006.229.08:12:18.43#ibcon#*before return 0, iclass 20, count 2 2006.229.08:12:18.43#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:18.43#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:18.43#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.08:12:18.43#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:18.43#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:18.55#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:18.55#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:18.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:12:18.55#ibcon#first serial, iclass 20, count 0 2006.229.08:12:18.55#ibcon#enter sib2, iclass 20, count 0 2006.229.08:12:18.55#ibcon#flushed, iclass 20, count 0 2006.229.08:12:18.55#ibcon#about to write, iclass 20, count 0 2006.229.08:12:18.55#ibcon#wrote, iclass 20, count 0 2006.229.08:12:18.55#ibcon#about to read 3, iclass 20, count 0 2006.229.08:12:18.57#ibcon#read 3, iclass 20, count 0 2006.229.08:12:18.57#ibcon#about to read 4, iclass 20, count 0 2006.229.08:12:18.57#ibcon#read 4, iclass 20, count 0 2006.229.08:12:18.57#ibcon#about to read 5, iclass 20, count 0 2006.229.08:12:18.57#ibcon#read 5, iclass 20, count 0 2006.229.08:12:18.57#ibcon#about to read 6, iclass 20, count 0 2006.229.08:12:18.57#ibcon#read 6, iclass 20, count 0 2006.229.08:12:18.57#ibcon#end of sib2, iclass 20, count 0 2006.229.08:12:18.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:12:18.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:12:18.57#ibcon#[25=USB\r\n] 2006.229.08:12:18.57#ibcon#*before write, iclass 20, count 0 2006.229.08:12:18.57#ibcon#enter sib2, iclass 20, count 0 2006.229.08:12:18.57#ibcon#flushed, iclass 20, count 0 2006.229.08:12:18.57#ibcon#about to write, iclass 20, count 0 2006.229.08:12:18.57#ibcon#wrote, iclass 20, count 0 2006.229.08:12:18.57#ibcon#about to read 3, iclass 20, count 0 2006.229.08:12:18.60#ibcon#read 3, iclass 20, count 0 2006.229.08:12:18.60#ibcon#about to read 4, iclass 20, count 0 2006.229.08:12:18.60#ibcon#read 4, iclass 20, count 0 2006.229.08:12:18.60#ibcon#about to read 5, iclass 20, count 0 2006.229.08:12:18.60#ibcon#read 5, iclass 20, count 0 2006.229.08:12:18.60#ibcon#about to read 6, iclass 20, count 0 2006.229.08:12:18.60#ibcon#read 6, iclass 20, count 0 2006.229.08:12:18.60#ibcon#end of sib2, iclass 20, count 0 2006.229.08:12:18.60#ibcon#*after write, iclass 20, count 0 2006.229.08:12:18.60#ibcon#*before return 0, iclass 20, count 0 2006.229.08:12:18.60#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:18.60#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:18.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:12:18.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:12:18.60$vck44/valo=8,884.99 2006.229.08:12:18.60#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.08:12:18.60#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.08:12:18.60#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:18.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:18.60#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:18.60#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:18.60#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:12:18.60#ibcon#first serial, iclass 22, count 0 2006.229.08:12:18.60#ibcon#enter sib2, iclass 22, count 0 2006.229.08:12:18.60#ibcon#flushed, iclass 22, count 0 2006.229.08:12:18.60#ibcon#about to write, iclass 22, count 0 2006.229.08:12:18.60#ibcon#wrote, iclass 22, count 0 2006.229.08:12:18.60#ibcon#about to read 3, iclass 22, count 0 2006.229.08:12:18.62#ibcon#read 3, iclass 22, count 0 2006.229.08:12:18.62#ibcon#about to read 4, iclass 22, count 0 2006.229.08:12:18.62#ibcon#read 4, iclass 22, count 0 2006.229.08:12:18.62#ibcon#about to read 5, iclass 22, count 0 2006.229.08:12:18.62#ibcon#read 5, iclass 22, count 0 2006.229.08:12:18.62#ibcon#about to read 6, iclass 22, count 0 2006.229.08:12:18.62#ibcon#read 6, iclass 22, count 0 2006.229.08:12:18.62#ibcon#end of sib2, iclass 22, count 0 2006.229.08:12:18.62#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:12:18.62#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:12:18.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:12:18.62#ibcon#*before write, iclass 22, count 0 2006.229.08:12:18.62#ibcon#enter sib2, iclass 22, count 0 2006.229.08:12:18.62#ibcon#flushed, iclass 22, count 0 2006.229.08:12:18.62#ibcon#about to write, iclass 22, count 0 2006.229.08:12:18.62#ibcon#wrote, iclass 22, count 0 2006.229.08:12:18.62#ibcon#about to read 3, iclass 22, count 0 2006.229.08:12:18.66#ibcon#read 3, iclass 22, count 0 2006.229.08:12:18.66#ibcon#about to read 4, iclass 22, count 0 2006.229.08:12:18.66#ibcon#read 4, iclass 22, count 0 2006.229.08:12:18.66#ibcon#about to read 5, iclass 22, count 0 2006.229.08:12:18.66#ibcon#read 5, iclass 22, count 0 2006.229.08:12:18.66#ibcon#about to read 6, iclass 22, count 0 2006.229.08:12:18.66#ibcon#read 6, iclass 22, count 0 2006.229.08:12:18.66#ibcon#end of sib2, iclass 22, count 0 2006.229.08:12:18.66#ibcon#*after write, iclass 22, count 0 2006.229.08:12:18.66#ibcon#*before return 0, iclass 22, count 0 2006.229.08:12:18.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:18.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:18.66#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:12:18.66#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:12:18.66$vck44/va=8,6 2006.229.08:12:18.66#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.08:12:18.66#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.08:12:18.66#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:18.66#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:18.72#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:18.72#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:18.72#ibcon#enter wrdev, iclass 24, count 2 2006.229.08:12:18.72#ibcon#first serial, iclass 24, count 2 2006.229.08:12:18.72#ibcon#enter sib2, iclass 24, count 2 2006.229.08:12:18.72#ibcon#flushed, iclass 24, count 2 2006.229.08:12:18.72#ibcon#about to write, iclass 24, count 2 2006.229.08:12:18.72#ibcon#wrote, iclass 24, count 2 2006.229.08:12:18.72#ibcon#about to read 3, iclass 24, count 2 2006.229.08:12:18.74#ibcon#read 3, iclass 24, count 2 2006.229.08:12:18.74#ibcon#about to read 4, iclass 24, count 2 2006.229.08:12:18.74#ibcon#read 4, iclass 24, count 2 2006.229.08:12:18.74#ibcon#about to read 5, iclass 24, count 2 2006.229.08:12:18.74#ibcon#read 5, iclass 24, count 2 2006.229.08:12:18.74#ibcon#about to read 6, iclass 24, count 2 2006.229.08:12:18.74#ibcon#read 6, iclass 24, count 2 2006.229.08:12:18.74#ibcon#end of sib2, iclass 24, count 2 2006.229.08:12:18.74#ibcon#*mode == 0, iclass 24, count 2 2006.229.08:12:18.74#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.08:12:18.74#ibcon#[25=AT08-06\r\n] 2006.229.08:12:18.74#ibcon#*before write, iclass 24, count 2 2006.229.08:12:18.74#ibcon#enter sib2, iclass 24, count 2 2006.229.08:12:18.74#ibcon#flushed, iclass 24, count 2 2006.229.08:12:18.74#ibcon#about to write, iclass 24, count 2 2006.229.08:12:18.74#ibcon#wrote, iclass 24, count 2 2006.229.08:12:18.74#ibcon#about to read 3, iclass 24, count 2 2006.229.08:12:18.77#ibcon#read 3, iclass 24, count 2 2006.229.08:12:18.77#ibcon#about to read 4, iclass 24, count 2 2006.229.08:12:18.77#ibcon#read 4, iclass 24, count 2 2006.229.08:12:18.77#ibcon#about to read 5, iclass 24, count 2 2006.229.08:12:18.77#ibcon#read 5, iclass 24, count 2 2006.229.08:12:18.77#ibcon#about to read 6, iclass 24, count 2 2006.229.08:12:18.77#ibcon#read 6, iclass 24, count 2 2006.229.08:12:18.77#ibcon#end of sib2, iclass 24, count 2 2006.229.08:12:18.77#ibcon#*after write, iclass 24, count 2 2006.229.08:12:18.77#ibcon#*before return 0, iclass 24, count 2 2006.229.08:12:18.77#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:18.77#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:18.77#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.08:12:18.77#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:18.77#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:18.89#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:18.89#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:18.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:12:18.89#ibcon#first serial, iclass 24, count 0 2006.229.08:12:18.89#ibcon#enter sib2, iclass 24, count 0 2006.229.08:12:18.89#ibcon#flushed, iclass 24, count 0 2006.229.08:12:18.89#ibcon#about to write, iclass 24, count 0 2006.229.08:12:18.89#ibcon#wrote, iclass 24, count 0 2006.229.08:12:18.89#ibcon#about to read 3, iclass 24, count 0 2006.229.08:12:18.91#ibcon#read 3, iclass 24, count 0 2006.229.08:12:18.91#ibcon#about to read 4, iclass 24, count 0 2006.229.08:12:18.91#ibcon#read 4, iclass 24, count 0 2006.229.08:12:18.91#ibcon#about to read 5, iclass 24, count 0 2006.229.08:12:18.91#ibcon#read 5, iclass 24, count 0 2006.229.08:12:18.91#ibcon#about to read 6, iclass 24, count 0 2006.229.08:12:18.91#ibcon#read 6, iclass 24, count 0 2006.229.08:12:18.91#ibcon#end of sib2, iclass 24, count 0 2006.229.08:12:18.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:12:18.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:12:18.91#ibcon#[25=USB\r\n] 2006.229.08:12:18.91#ibcon#*before write, iclass 24, count 0 2006.229.08:12:18.91#ibcon#enter sib2, iclass 24, count 0 2006.229.08:12:18.91#ibcon#flushed, iclass 24, count 0 2006.229.08:12:18.91#ibcon#about to write, iclass 24, count 0 2006.229.08:12:18.91#ibcon#wrote, iclass 24, count 0 2006.229.08:12:18.91#ibcon#about to read 3, iclass 24, count 0 2006.229.08:12:18.94#ibcon#read 3, iclass 24, count 0 2006.229.08:12:18.94#ibcon#about to read 4, iclass 24, count 0 2006.229.08:12:18.94#ibcon#read 4, iclass 24, count 0 2006.229.08:12:18.94#ibcon#about to read 5, iclass 24, count 0 2006.229.08:12:18.94#ibcon#read 5, iclass 24, count 0 2006.229.08:12:18.94#ibcon#about to read 6, iclass 24, count 0 2006.229.08:12:18.94#ibcon#read 6, iclass 24, count 0 2006.229.08:12:18.94#ibcon#end of sib2, iclass 24, count 0 2006.229.08:12:18.94#ibcon#*after write, iclass 24, count 0 2006.229.08:12:18.94#ibcon#*before return 0, iclass 24, count 0 2006.229.08:12:18.94#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:18.94#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:18.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:12:18.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:12:18.94$vck44/vblo=1,629.99 2006.229.08:12:18.94#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.08:12:18.94#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.08:12:18.94#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:18.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:18.94#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:18.94#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:18.94#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:12:18.94#ibcon#first serial, iclass 26, count 0 2006.229.08:12:18.94#ibcon#enter sib2, iclass 26, count 0 2006.229.08:12:18.94#ibcon#flushed, iclass 26, count 0 2006.229.08:12:18.94#ibcon#about to write, iclass 26, count 0 2006.229.08:12:18.94#ibcon#wrote, iclass 26, count 0 2006.229.08:12:18.94#ibcon#about to read 3, iclass 26, count 0 2006.229.08:12:18.96#ibcon#read 3, iclass 26, count 0 2006.229.08:12:18.96#ibcon#about to read 4, iclass 26, count 0 2006.229.08:12:18.96#ibcon#read 4, iclass 26, count 0 2006.229.08:12:18.96#ibcon#about to read 5, iclass 26, count 0 2006.229.08:12:18.96#ibcon#read 5, iclass 26, count 0 2006.229.08:12:18.96#ibcon#about to read 6, iclass 26, count 0 2006.229.08:12:18.96#ibcon#read 6, iclass 26, count 0 2006.229.08:12:18.96#ibcon#end of sib2, iclass 26, count 0 2006.229.08:12:18.96#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:12:18.96#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:12:18.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:12:18.96#ibcon#*before write, iclass 26, count 0 2006.229.08:12:18.96#ibcon#enter sib2, iclass 26, count 0 2006.229.08:12:18.96#ibcon#flushed, iclass 26, count 0 2006.229.08:12:18.96#ibcon#about to write, iclass 26, count 0 2006.229.08:12:18.96#ibcon#wrote, iclass 26, count 0 2006.229.08:12:18.96#ibcon#about to read 3, iclass 26, count 0 2006.229.08:12:19.00#ibcon#read 3, iclass 26, count 0 2006.229.08:12:19.00#ibcon#about to read 4, iclass 26, count 0 2006.229.08:12:19.00#ibcon#read 4, iclass 26, count 0 2006.229.08:12:19.00#ibcon#about to read 5, iclass 26, count 0 2006.229.08:12:19.00#ibcon#read 5, iclass 26, count 0 2006.229.08:12:19.00#ibcon#about to read 6, iclass 26, count 0 2006.229.08:12:19.00#ibcon#read 6, iclass 26, count 0 2006.229.08:12:19.00#ibcon#end of sib2, iclass 26, count 0 2006.229.08:12:19.00#ibcon#*after write, iclass 26, count 0 2006.229.08:12:19.00#ibcon#*before return 0, iclass 26, count 0 2006.229.08:12:19.00#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:19.00#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:19.00#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:12:19.00#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:12:19.00$vck44/vb=1,4 2006.229.08:12:19.00#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.08:12:19.00#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.08:12:19.00#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:19.00#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:12:19.00#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:12:19.00#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:12:19.00#ibcon#enter wrdev, iclass 28, count 2 2006.229.08:12:19.00#ibcon#first serial, iclass 28, count 2 2006.229.08:12:19.00#ibcon#enter sib2, iclass 28, count 2 2006.229.08:12:19.00#ibcon#flushed, iclass 28, count 2 2006.229.08:12:19.00#ibcon#about to write, iclass 28, count 2 2006.229.08:12:19.00#ibcon#wrote, iclass 28, count 2 2006.229.08:12:19.00#ibcon#about to read 3, iclass 28, count 2 2006.229.08:12:19.02#ibcon#read 3, iclass 28, count 2 2006.229.08:12:19.02#ibcon#about to read 4, iclass 28, count 2 2006.229.08:12:19.02#ibcon#read 4, iclass 28, count 2 2006.229.08:12:19.02#ibcon#about to read 5, iclass 28, count 2 2006.229.08:12:19.02#ibcon#read 5, iclass 28, count 2 2006.229.08:12:19.02#ibcon#about to read 6, iclass 28, count 2 2006.229.08:12:19.02#ibcon#read 6, iclass 28, count 2 2006.229.08:12:19.02#ibcon#end of sib2, iclass 28, count 2 2006.229.08:12:19.02#ibcon#*mode == 0, iclass 28, count 2 2006.229.08:12:19.02#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.08:12:19.02#ibcon#[27=AT01-04\r\n] 2006.229.08:12:19.02#ibcon#*before write, iclass 28, count 2 2006.229.08:12:19.02#ibcon#enter sib2, iclass 28, count 2 2006.229.08:12:19.02#ibcon#flushed, iclass 28, count 2 2006.229.08:12:19.02#ibcon#about to write, iclass 28, count 2 2006.229.08:12:19.02#ibcon#wrote, iclass 28, count 2 2006.229.08:12:19.02#ibcon#about to read 3, iclass 28, count 2 2006.229.08:12:19.05#ibcon#read 3, iclass 28, count 2 2006.229.08:12:19.05#ibcon#about to read 4, iclass 28, count 2 2006.229.08:12:19.05#ibcon#read 4, iclass 28, count 2 2006.229.08:12:19.05#ibcon#about to read 5, iclass 28, count 2 2006.229.08:12:19.05#ibcon#read 5, iclass 28, count 2 2006.229.08:12:19.05#ibcon#about to read 6, iclass 28, count 2 2006.229.08:12:19.05#ibcon#read 6, iclass 28, count 2 2006.229.08:12:19.05#ibcon#end of sib2, iclass 28, count 2 2006.229.08:12:19.05#ibcon#*after write, iclass 28, count 2 2006.229.08:12:19.05#ibcon#*before return 0, iclass 28, count 2 2006.229.08:12:19.05#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:12:19.05#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:12:19.05#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.08:12:19.05#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:19.05#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:12:19.08#abcon#<5=/06 3.0 5.3 29.58 931000.6\r\n> 2006.229.08:12:19.10#abcon#{5=INTERFACE CLEAR} 2006.229.08:12:19.16#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:12:19.17#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:12:19.17#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:12:19.17#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:12:19.17#ibcon#first serial, iclass 28, count 0 2006.229.08:12:19.17#ibcon#enter sib2, iclass 28, count 0 2006.229.08:12:19.17#ibcon#flushed, iclass 28, count 0 2006.229.08:12:19.17#ibcon#about to write, iclass 28, count 0 2006.229.08:12:19.17#ibcon#wrote, iclass 28, count 0 2006.229.08:12:19.17#ibcon#about to read 3, iclass 28, count 0 2006.229.08:12:19.19#ibcon#read 3, iclass 28, count 0 2006.229.08:12:19.19#ibcon#about to read 4, iclass 28, count 0 2006.229.08:12:19.19#ibcon#read 4, iclass 28, count 0 2006.229.08:12:19.19#ibcon#about to read 5, iclass 28, count 0 2006.229.08:12:19.19#ibcon#read 5, iclass 28, count 0 2006.229.08:12:19.19#ibcon#about to read 6, iclass 28, count 0 2006.229.08:12:19.19#ibcon#read 6, iclass 28, count 0 2006.229.08:12:19.19#ibcon#end of sib2, iclass 28, count 0 2006.229.08:12:19.19#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:12:19.19#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:12:19.19#ibcon#[27=USB\r\n] 2006.229.08:12:19.19#ibcon#*before write, iclass 28, count 0 2006.229.08:12:19.19#ibcon#enter sib2, iclass 28, count 0 2006.229.08:12:19.19#ibcon#flushed, iclass 28, count 0 2006.229.08:12:19.19#ibcon#about to write, iclass 28, count 0 2006.229.08:12:19.19#ibcon#wrote, iclass 28, count 0 2006.229.08:12:19.19#ibcon#about to read 3, iclass 28, count 0 2006.229.08:12:19.22#ibcon#read 3, iclass 28, count 0 2006.229.08:12:19.22#ibcon#about to read 4, iclass 28, count 0 2006.229.08:12:19.22#ibcon#read 4, iclass 28, count 0 2006.229.08:12:19.22#ibcon#about to read 5, iclass 28, count 0 2006.229.08:12:19.22#ibcon#read 5, iclass 28, count 0 2006.229.08:12:19.22#ibcon#about to read 6, iclass 28, count 0 2006.229.08:12:19.22#ibcon#read 6, iclass 28, count 0 2006.229.08:12:19.22#ibcon#end of sib2, iclass 28, count 0 2006.229.08:12:19.22#ibcon#*after write, iclass 28, count 0 2006.229.08:12:19.22#ibcon#*before return 0, iclass 28, count 0 2006.229.08:12:19.22#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:12:19.22#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:12:19.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:12:19.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:12:19.22$vck44/vblo=2,634.99 2006.229.08:12:19.22#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:12:19.22#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:12:19.22#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:19.22#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:19.22#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:19.22#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:19.22#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:12:19.22#ibcon#first serial, iclass 34, count 0 2006.229.08:12:19.22#ibcon#enter sib2, iclass 34, count 0 2006.229.08:12:19.22#ibcon#flushed, iclass 34, count 0 2006.229.08:12:19.22#ibcon#about to write, iclass 34, count 0 2006.229.08:12:19.22#ibcon#wrote, iclass 34, count 0 2006.229.08:12:19.22#ibcon#about to read 3, iclass 34, count 0 2006.229.08:12:19.24#ibcon#read 3, iclass 34, count 0 2006.229.08:12:19.24#ibcon#about to read 4, iclass 34, count 0 2006.229.08:12:19.24#ibcon#read 4, iclass 34, count 0 2006.229.08:12:19.24#ibcon#about to read 5, iclass 34, count 0 2006.229.08:12:19.24#ibcon#read 5, iclass 34, count 0 2006.229.08:12:19.24#ibcon#about to read 6, iclass 34, count 0 2006.229.08:12:19.24#ibcon#read 6, iclass 34, count 0 2006.229.08:12:19.24#ibcon#end of sib2, iclass 34, count 0 2006.229.08:12:19.24#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:12:19.24#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:12:19.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:12:19.24#ibcon#*before write, iclass 34, count 0 2006.229.08:12:19.24#ibcon#enter sib2, iclass 34, count 0 2006.229.08:12:19.24#ibcon#flushed, iclass 34, count 0 2006.229.08:12:19.24#ibcon#about to write, iclass 34, count 0 2006.229.08:12:19.24#ibcon#wrote, iclass 34, count 0 2006.229.08:12:19.24#ibcon#about to read 3, iclass 34, count 0 2006.229.08:12:19.28#ibcon#read 3, iclass 34, count 0 2006.229.08:12:19.28#ibcon#about to read 4, iclass 34, count 0 2006.229.08:12:19.28#ibcon#read 4, iclass 34, count 0 2006.229.08:12:19.28#ibcon#about to read 5, iclass 34, count 0 2006.229.08:12:19.28#ibcon#read 5, iclass 34, count 0 2006.229.08:12:19.28#ibcon#about to read 6, iclass 34, count 0 2006.229.08:12:19.28#ibcon#read 6, iclass 34, count 0 2006.229.08:12:19.28#ibcon#end of sib2, iclass 34, count 0 2006.229.08:12:19.28#ibcon#*after write, iclass 34, count 0 2006.229.08:12:19.28#ibcon#*before return 0, iclass 34, count 0 2006.229.08:12:19.28#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:19.28#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:12:19.28#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:12:19.28#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:12:19.28$vck44/vb=2,4 2006.229.08:12:19.28#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.08:12:19.28#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.08:12:19.28#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:19.28#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:19.34#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:19.34#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:19.34#ibcon#enter wrdev, iclass 36, count 2 2006.229.08:12:19.34#ibcon#first serial, iclass 36, count 2 2006.229.08:12:19.34#ibcon#enter sib2, iclass 36, count 2 2006.229.08:12:19.34#ibcon#flushed, iclass 36, count 2 2006.229.08:12:19.34#ibcon#about to write, iclass 36, count 2 2006.229.08:12:19.34#ibcon#wrote, iclass 36, count 2 2006.229.08:12:19.34#ibcon#about to read 3, iclass 36, count 2 2006.229.08:12:19.36#ibcon#read 3, iclass 36, count 2 2006.229.08:12:19.36#ibcon#about to read 4, iclass 36, count 2 2006.229.08:12:19.36#ibcon#read 4, iclass 36, count 2 2006.229.08:12:19.36#ibcon#about to read 5, iclass 36, count 2 2006.229.08:12:19.36#ibcon#read 5, iclass 36, count 2 2006.229.08:12:19.36#ibcon#about to read 6, iclass 36, count 2 2006.229.08:12:19.36#ibcon#read 6, iclass 36, count 2 2006.229.08:12:19.36#ibcon#end of sib2, iclass 36, count 2 2006.229.08:12:19.36#ibcon#*mode == 0, iclass 36, count 2 2006.229.08:12:19.36#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.08:12:19.36#ibcon#[27=AT02-04\r\n] 2006.229.08:12:19.36#ibcon#*before write, iclass 36, count 2 2006.229.08:12:19.36#ibcon#enter sib2, iclass 36, count 2 2006.229.08:12:19.36#ibcon#flushed, iclass 36, count 2 2006.229.08:12:19.36#ibcon#about to write, iclass 36, count 2 2006.229.08:12:19.36#ibcon#wrote, iclass 36, count 2 2006.229.08:12:19.36#ibcon#about to read 3, iclass 36, count 2 2006.229.08:12:19.39#ibcon#read 3, iclass 36, count 2 2006.229.08:12:19.39#ibcon#about to read 4, iclass 36, count 2 2006.229.08:12:19.39#ibcon#read 4, iclass 36, count 2 2006.229.08:12:19.39#ibcon#about to read 5, iclass 36, count 2 2006.229.08:12:19.39#ibcon#read 5, iclass 36, count 2 2006.229.08:12:19.39#ibcon#about to read 6, iclass 36, count 2 2006.229.08:12:19.39#ibcon#read 6, iclass 36, count 2 2006.229.08:12:19.39#ibcon#end of sib2, iclass 36, count 2 2006.229.08:12:19.39#ibcon#*after write, iclass 36, count 2 2006.229.08:12:19.39#ibcon#*before return 0, iclass 36, count 2 2006.229.08:12:19.39#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:19.39#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:12:19.39#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.08:12:19.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:19.39#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:19.51#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:19.51#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:19.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:12:19.51#ibcon#first serial, iclass 36, count 0 2006.229.08:12:19.51#ibcon#enter sib2, iclass 36, count 0 2006.229.08:12:19.51#ibcon#flushed, iclass 36, count 0 2006.229.08:12:19.51#ibcon#about to write, iclass 36, count 0 2006.229.08:12:19.51#ibcon#wrote, iclass 36, count 0 2006.229.08:12:19.51#ibcon#about to read 3, iclass 36, count 0 2006.229.08:12:19.53#ibcon#read 3, iclass 36, count 0 2006.229.08:12:19.53#ibcon#about to read 4, iclass 36, count 0 2006.229.08:12:19.53#ibcon#read 4, iclass 36, count 0 2006.229.08:12:19.53#ibcon#about to read 5, iclass 36, count 0 2006.229.08:12:19.53#ibcon#read 5, iclass 36, count 0 2006.229.08:12:19.53#ibcon#about to read 6, iclass 36, count 0 2006.229.08:12:19.53#ibcon#read 6, iclass 36, count 0 2006.229.08:12:19.53#ibcon#end of sib2, iclass 36, count 0 2006.229.08:12:19.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:12:19.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:12:19.53#ibcon#[27=USB\r\n] 2006.229.08:12:19.53#ibcon#*before write, iclass 36, count 0 2006.229.08:12:19.53#ibcon#enter sib2, iclass 36, count 0 2006.229.08:12:19.53#ibcon#flushed, iclass 36, count 0 2006.229.08:12:19.53#ibcon#about to write, iclass 36, count 0 2006.229.08:12:19.53#ibcon#wrote, iclass 36, count 0 2006.229.08:12:19.53#ibcon#about to read 3, iclass 36, count 0 2006.229.08:12:19.56#ibcon#read 3, iclass 36, count 0 2006.229.08:12:19.56#ibcon#about to read 4, iclass 36, count 0 2006.229.08:12:19.56#ibcon#read 4, iclass 36, count 0 2006.229.08:12:19.56#ibcon#about to read 5, iclass 36, count 0 2006.229.08:12:19.56#ibcon#read 5, iclass 36, count 0 2006.229.08:12:19.56#ibcon#about to read 6, iclass 36, count 0 2006.229.08:12:19.56#ibcon#read 6, iclass 36, count 0 2006.229.08:12:19.56#ibcon#end of sib2, iclass 36, count 0 2006.229.08:12:19.56#ibcon#*after write, iclass 36, count 0 2006.229.08:12:19.56#ibcon#*before return 0, iclass 36, count 0 2006.229.08:12:19.56#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:19.56#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:12:19.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:12:19.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:12:19.56$vck44/vblo=3,649.99 2006.229.08:12:19.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.08:12:19.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.08:12:19.56#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:19.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:19.56#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:19.56#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:19.56#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:12:19.56#ibcon#first serial, iclass 38, count 0 2006.229.08:12:19.56#ibcon#enter sib2, iclass 38, count 0 2006.229.08:12:19.56#ibcon#flushed, iclass 38, count 0 2006.229.08:12:19.56#ibcon#about to write, iclass 38, count 0 2006.229.08:12:19.56#ibcon#wrote, iclass 38, count 0 2006.229.08:12:19.56#ibcon#about to read 3, iclass 38, count 0 2006.229.08:12:19.58#ibcon#read 3, iclass 38, count 0 2006.229.08:12:19.58#ibcon#about to read 4, iclass 38, count 0 2006.229.08:12:19.58#ibcon#read 4, iclass 38, count 0 2006.229.08:12:19.58#ibcon#about to read 5, iclass 38, count 0 2006.229.08:12:19.58#ibcon#read 5, iclass 38, count 0 2006.229.08:12:19.58#ibcon#about to read 6, iclass 38, count 0 2006.229.08:12:19.58#ibcon#read 6, iclass 38, count 0 2006.229.08:12:19.58#ibcon#end of sib2, iclass 38, count 0 2006.229.08:12:19.58#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:12:19.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:12:19.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:12:19.58#ibcon#*before write, iclass 38, count 0 2006.229.08:12:19.58#ibcon#enter sib2, iclass 38, count 0 2006.229.08:12:19.58#ibcon#flushed, iclass 38, count 0 2006.229.08:12:19.58#ibcon#about to write, iclass 38, count 0 2006.229.08:12:19.58#ibcon#wrote, iclass 38, count 0 2006.229.08:12:19.58#ibcon#about to read 3, iclass 38, count 0 2006.229.08:12:19.62#ibcon#read 3, iclass 38, count 0 2006.229.08:12:19.62#ibcon#about to read 4, iclass 38, count 0 2006.229.08:12:19.62#ibcon#read 4, iclass 38, count 0 2006.229.08:12:19.62#ibcon#about to read 5, iclass 38, count 0 2006.229.08:12:19.62#ibcon#read 5, iclass 38, count 0 2006.229.08:12:19.62#ibcon#about to read 6, iclass 38, count 0 2006.229.08:12:19.62#ibcon#read 6, iclass 38, count 0 2006.229.08:12:19.62#ibcon#end of sib2, iclass 38, count 0 2006.229.08:12:19.62#ibcon#*after write, iclass 38, count 0 2006.229.08:12:19.62#ibcon#*before return 0, iclass 38, count 0 2006.229.08:12:19.62#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:19.62#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:12:19.62#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:12:19.62#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:12:19.62$vck44/vb=3,4 2006.229.08:12:19.62#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.08:12:19.62#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.08:12:19.62#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:19.62#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:19.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:19.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:19.68#ibcon#enter wrdev, iclass 40, count 2 2006.229.08:12:19.68#ibcon#first serial, iclass 40, count 2 2006.229.08:12:19.68#ibcon#enter sib2, iclass 40, count 2 2006.229.08:12:19.68#ibcon#flushed, iclass 40, count 2 2006.229.08:12:19.68#ibcon#about to write, iclass 40, count 2 2006.229.08:12:19.68#ibcon#wrote, iclass 40, count 2 2006.229.08:12:19.68#ibcon#about to read 3, iclass 40, count 2 2006.229.08:12:19.70#ibcon#read 3, iclass 40, count 2 2006.229.08:12:19.70#ibcon#about to read 4, iclass 40, count 2 2006.229.08:12:19.70#ibcon#read 4, iclass 40, count 2 2006.229.08:12:19.70#ibcon#about to read 5, iclass 40, count 2 2006.229.08:12:19.70#ibcon#read 5, iclass 40, count 2 2006.229.08:12:19.70#ibcon#about to read 6, iclass 40, count 2 2006.229.08:12:19.70#ibcon#read 6, iclass 40, count 2 2006.229.08:12:19.70#ibcon#end of sib2, iclass 40, count 2 2006.229.08:12:19.70#ibcon#*mode == 0, iclass 40, count 2 2006.229.08:12:19.70#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.08:12:19.70#ibcon#[27=AT03-04\r\n] 2006.229.08:12:19.70#ibcon#*before write, iclass 40, count 2 2006.229.08:12:19.70#ibcon#enter sib2, iclass 40, count 2 2006.229.08:12:19.70#ibcon#flushed, iclass 40, count 2 2006.229.08:12:19.70#ibcon#about to write, iclass 40, count 2 2006.229.08:12:19.70#ibcon#wrote, iclass 40, count 2 2006.229.08:12:19.70#ibcon#about to read 3, iclass 40, count 2 2006.229.08:12:19.73#ibcon#read 3, iclass 40, count 2 2006.229.08:12:19.73#ibcon#about to read 4, iclass 40, count 2 2006.229.08:12:19.73#ibcon#read 4, iclass 40, count 2 2006.229.08:12:19.73#ibcon#about to read 5, iclass 40, count 2 2006.229.08:12:19.73#ibcon#read 5, iclass 40, count 2 2006.229.08:12:19.73#ibcon#about to read 6, iclass 40, count 2 2006.229.08:12:19.73#ibcon#read 6, iclass 40, count 2 2006.229.08:12:19.73#ibcon#end of sib2, iclass 40, count 2 2006.229.08:12:19.73#ibcon#*after write, iclass 40, count 2 2006.229.08:12:19.73#ibcon#*before return 0, iclass 40, count 2 2006.229.08:12:19.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:19.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:12:19.73#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.08:12:19.73#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:19.73#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:19.85#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:19.85#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:19.85#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:12:19.85#ibcon#first serial, iclass 40, count 0 2006.229.08:12:19.85#ibcon#enter sib2, iclass 40, count 0 2006.229.08:12:19.85#ibcon#flushed, iclass 40, count 0 2006.229.08:12:19.85#ibcon#about to write, iclass 40, count 0 2006.229.08:12:19.85#ibcon#wrote, iclass 40, count 0 2006.229.08:12:19.85#ibcon#about to read 3, iclass 40, count 0 2006.229.08:12:19.87#ibcon#read 3, iclass 40, count 0 2006.229.08:12:19.87#ibcon#about to read 4, iclass 40, count 0 2006.229.08:12:19.87#ibcon#read 4, iclass 40, count 0 2006.229.08:12:19.87#ibcon#about to read 5, iclass 40, count 0 2006.229.08:12:19.87#ibcon#read 5, iclass 40, count 0 2006.229.08:12:19.87#ibcon#about to read 6, iclass 40, count 0 2006.229.08:12:19.87#ibcon#read 6, iclass 40, count 0 2006.229.08:12:19.87#ibcon#end of sib2, iclass 40, count 0 2006.229.08:12:19.87#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:12:19.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:12:19.87#ibcon#[27=USB\r\n] 2006.229.08:12:19.87#ibcon#*before write, iclass 40, count 0 2006.229.08:12:19.87#ibcon#enter sib2, iclass 40, count 0 2006.229.08:12:19.87#ibcon#flushed, iclass 40, count 0 2006.229.08:12:19.87#ibcon#about to write, iclass 40, count 0 2006.229.08:12:19.87#ibcon#wrote, iclass 40, count 0 2006.229.08:12:19.87#ibcon#about to read 3, iclass 40, count 0 2006.229.08:12:19.90#ibcon#read 3, iclass 40, count 0 2006.229.08:12:19.90#ibcon#about to read 4, iclass 40, count 0 2006.229.08:12:19.90#ibcon#read 4, iclass 40, count 0 2006.229.08:12:19.90#ibcon#about to read 5, iclass 40, count 0 2006.229.08:12:19.90#ibcon#read 5, iclass 40, count 0 2006.229.08:12:19.90#ibcon#about to read 6, iclass 40, count 0 2006.229.08:12:19.90#ibcon#read 6, iclass 40, count 0 2006.229.08:12:19.90#ibcon#end of sib2, iclass 40, count 0 2006.229.08:12:19.90#ibcon#*after write, iclass 40, count 0 2006.229.08:12:19.90#ibcon#*before return 0, iclass 40, count 0 2006.229.08:12:19.90#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:19.90#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:12:19.90#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:12:19.90#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:12:19.90$vck44/vblo=4,679.99 2006.229.08:12:19.90#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.08:12:19.90#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.08:12:19.90#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:19.90#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:19.90#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:19.90#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:19.90#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:12:19.90#ibcon#first serial, iclass 4, count 0 2006.229.08:12:19.90#ibcon#enter sib2, iclass 4, count 0 2006.229.08:12:19.90#ibcon#flushed, iclass 4, count 0 2006.229.08:12:19.90#ibcon#about to write, iclass 4, count 0 2006.229.08:12:19.90#ibcon#wrote, iclass 4, count 0 2006.229.08:12:19.90#ibcon#about to read 3, iclass 4, count 0 2006.229.08:12:19.92#ibcon#read 3, iclass 4, count 0 2006.229.08:12:19.92#ibcon#about to read 4, iclass 4, count 0 2006.229.08:12:19.92#ibcon#read 4, iclass 4, count 0 2006.229.08:12:19.92#ibcon#about to read 5, iclass 4, count 0 2006.229.08:12:19.92#ibcon#read 5, iclass 4, count 0 2006.229.08:12:19.92#ibcon#about to read 6, iclass 4, count 0 2006.229.08:12:19.92#ibcon#read 6, iclass 4, count 0 2006.229.08:12:19.92#ibcon#end of sib2, iclass 4, count 0 2006.229.08:12:19.92#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:12:19.92#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:12:19.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:12:19.92#ibcon#*before write, iclass 4, count 0 2006.229.08:12:19.92#ibcon#enter sib2, iclass 4, count 0 2006.229.08:12:19.92#ibcon#flushed, iclass 4, count 0 2006.229.08:12:19.92#ibcon#about to write, iclass 4, count 0 2006.229.08:12:19.92#ibcon#wrote, iclass 4, count 0 2006.229.08:12:19.92#ibcon#about to read 3, iclass 4, count 0 2006.229.08:12:19.96#ibcon#read 3, iclass 4, count 0 2006.229.08:12:19.96#ibcon#about to read 4, iclass 4, count 0 2006.229.08:12:19.96#ibcon#read 4, iclass 4, count 0 2006.229.08:12:19.96#ibcon#about to read 5, iclass 4, count 0 2006.229.08:12:19.96#ibcon#read 5, iclass 4, count 0 2006.229.08:12:19.96#ibcon#about to read 6, iclass 4, count 0 2006.229.08:12:19.96#ibcon#read 6, iclass 4, count 0 2006.229.08:12:19.96#ibcon#end of sib2, iclass 4, count 0 2006.229.08:12:19.96#ibcon#*after write, iclass 4, count 0 2006.229.08:12:19.96#ibcon#*before return 0, iclass 4, count 0 2006.229.08:12:19.96#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:19.96#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:12:19.96#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:12:19.96#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:12:19.96$vck44/vb=4,4 2006.229.08:12:19.96#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.08:12:19.96#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.08:12:19.96#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:19.96#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:20.02#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:20.02#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:20.02#ibcon#enter wrdev, iclass 6, count 2 2006.229.08:12:20.02#ibcon#first serial, iclass 6, count 2 2006.229.08:12:20.02#ibcon#enter sib2, iclass 6, count 2 2006.229.08:12:20.02#ibcon#flushed, iclass 6, count 2 2006.229.08:12:20.02#ibcon#about to write, iclass 6, count 2 2006.229.08:12:20.02#ibcon#wrote, iclass 6, count 2 2006.229.08:12:20.02#ibcon#about to read 3, iclass 6, count 2 2006.229.08:12:20.04#ibcon#read 3, iclass 6, count 2 2006.229.08:12:20.04#ibcon#about to read 4, iclass 6, count 2 2006.229.08:12:20.04#ibcon#read 4, iclass 6, count 2 2006.229.08:12:20.04#ibcon#about to read 5, iclass 6, count 2 2006.229.08:12:20.04#ibcon#read 5, iclass 6, count 2 2006.229.08:12:20.04#ibcon#about to read 6, iclass 6, count 2 2006.229.08:12:20.04#ibcon#read 6, iclass 6, count 2 2006.229.08:12:20.04#ibcon#end of sib2, iclass 6, count 2 2006.229.08:12:20.04#ibcon#*mode == 0, iclass 6, count 2 2006.229.08:12:20.04#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.08:12:20.04#ibcon#[27=AT04-04\r\n] 2006.229.08:12:20.04#ibcon#*before write, iclass 6, count 2 2006.229.08:12:20.04#ibcon#enter sib2, iclass 6, count 2 2006.229.08:12:20.04#ibcon#flushed, iclass 6, count 2 2006.229.08:12:20.04#ibcon#about to write, iclass 6, count 2 2006.229.08:12:20.04#ibcon#wrote, iclass 6, count 2 2006.229.08:12:20.04#ibcon#about to read 3, iclass 6, count 2 2006.229.08:12:20.07#ibcon#read 3, iclass 6, count 2 2006.229.08:12:20.07#ibcon#about to read 4, iclass 6, count 2 2006.229.08:12:20.07#ibcon#read 4, iclass 6, count 2 2006.229.08:12:20.07#ibcon#about to read 5, iclass 6, count 2 2006.229.08:12:20.07#ibcon#read 5, iclass 6, count 2 2006.229.08:12:20.07#ibcon#about to read 6, iclass 6, count 2 2006.229.08:12:20.07#ibcon#read 6, iclass 6, count 2 2006.229.08:12:20.07#ibcon#end of sib2, iclass 6, count 2 2006.229.08:12:20.07#ibcon#*after write, iclass 6, count 2 2006.229.08:12:20.07#ibcon#*before return 0, iclass 6, count 2 2006.229.08:12:20.07#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:20.07#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:12:20.07#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.08:12:20.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:20.07#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:20.19#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:20.19#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:20.19#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:12:20.19#ibcon#first serial, iclass 6, count 0 2006.229.08:12:20.19#ibcon#enter sib2, iclass 6, count 0 2006.229.08:12:20.19#ibcon#flushed, iclass 6, count 0 2006.229.08:12:20.19#ibcon#about to write, iclass 6, count 0 2006.229.08:12:20.19#ibcon#wrote, iclass 6, count 0 2006.229.08:12:20.19#ibcon#about to read 3, iclass 6, count 0 2006.229.08:12:20.21#ibcon#read 3, iclass 6, count 0 2006.229.08:12:20.21#ibcon#about to read 4, iclass 6, count 0 2006.229.08:12:20.21#ibcon#read 4, iclass 6, count 0 2006.229.08:12:20.21#ibcon#about to read 5, iclass 6, count 0 2006.229.08:12:20.21#ibcon#read 5, iclass 6, count 0 2006.229.08:12:20.21#ibcon#about to read 6, iclass 6, count 0 2006.229.08:12:20.21#ibcon#read 6, iclass 6, count 0 2006.229.08:12:20.21#ibcon#end of sib2, iclass 6, count 0 2006.229.08:12:20.21#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:12:20.21#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:12:20.21#ibcon#[27=USB\r\n] 2006.229.08:12:20.21#ibcon#*before write, iclass 6, count 0 2006.229.08:12:20.21#ibcon#enter sib2, iclass 6, count 0 2006.229.08:12:20.21#ibcon#flushed, iclass 6, count 0 2006.229.08:12:20.21#ibcon#about to write, iclass 6, count 0 2006.229.08:12:20.21#ibcon#wrote, iclass 6, count 0 2006.229.08:12:20.21#ibcon#about to read 3, iclass 6, count 0 2006.229.08:12:20.24#ibcon#read 3, iclass 6, count 0 2006.229.08:12:20.24#ibcon#about to read 4, iclass 6, count 0 2006.229.08:12:20.24#ibcon#read 4, iclass 6, count 0 2006.229.08:12:20.24#ibcon#about to read 5, iclass 6, count 0 2006.229.08:12:20.24#ibcon#read 5, iclass 6, count 0 2006.229.08:12:20.24#ibcon#about to read 6, iclass 6, count 0 2006.229.08:12:20.24#ibcon#read 6, iclass 6, count 0 2006.229.08:12:20.24#ibcon#end of sib2, iclass 6, count 0 2006.229.08:12:20.24#ibcon#*after write, iclass 6, count 0 2006.229.08:12:20.24#ibcon#*before return 0, iclass 6, count 0 2006.229.08:12:20.24#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:20.24#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:12:20.24#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:12:20.24#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:12:20.24$vck44/vblo=5,709.99 2006.229.08:12:20.24#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.08:12:20.24#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.08:12:20.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:20.24#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:20.24#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:20.24#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:20.24#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:12:20.24#ibcon#first serial, iclass 10, count 0 2006.229.08:12:20.24#ibcon#enter sib2, iclass 10, count 0 2006.229.08:12:20.24#ibcon#flushed, iclass 10, count 0 2006.229.08:12:20.24#ibcon#about to write, iclass 10, count 0 2006.229.08:12:20.24#ibcon#wrote, iclass 10, count 0 2006.229.08:12:20.24#ibcon#about to read 3, iclass 10, count 0 2006.229.08:12:20.26#ibcon#read 3, iclass 10, count 0 2006.229.08:12:20.26#ibcon#about to read 4, iclass 10, count 0 2006.229.08:12:20.26#ibcon#read 4, iclass 10, count 0 2006.229.08:12:20.26#ibcon#about to read 5, iclass 10, count 0 2006.229.08:12:20.26#ibcon#read 5, iclass 10, count 0 2006.229.08:12:20.26#ibcon#about to read 6, iclass 10, count 0 2006.229.08:12:20.26#ibcon#read 6, iclass 10, count 0 2006.229.08:12:20.26#ibcon#end of sib2, iclass 10, count 0 2006.229.08:12:20.26#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:12:20.26#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:12:20.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:12:20.26#ibcon#*before write, iclass 10, count 0 2006.229.08:12:20.26#ibcon#enter sib2, iclass 10, count 0 2006.229.08:12:20.26#ibcon#flushed, iclass 10, count 0 2006.229.08:12:20.26#ibcon#about to write, iclass 10, count 0 2006.229.08:12:20.26#ibcon#wrote, iclass 10, count 0 2006.229.08:12:20.26#ibcon#about to read 3, iclass 10, count 0 2006.229.08:12:20.30#ibcon#read 3, iclass 10, count 0 2006.229.08:12:20.30#ibcon#about to read 4, iclass 10, count 0 2006.229.08:12:20.30#ibcon#read 4, iclass 10, count 0 2006.229.08:12:20.30#ibcon#about to read 5, iclass 10, count 0 2006.229.08:12:20.30#ibcon#read 5, iclass 10, count 0 2006.229.08:12:20.30#ibcon#about to read 6, iclass 10, count 0 2006.229.08:12:20.30#ibcon#read 6, iclass 10, count 0 2006.229.08:12:20.30#ibcon#end of sib2, iclass 10, count 0 2006.229.08:12:20.30#ibcon#*after write, iclass 10, count 0 2006.229.08:12:20.30#ibcon#*before return 0, iclass 10, count 0 2006.229.08:12:20.30#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:20.30#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:12:20.30#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:12:20.30#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:12:20.30$vck44/vb=5,4 2006.229.08:12:20.30#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.08:12:20.30#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.08:12:20.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:20.30#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:20.36#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:20.36#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:20.36#ibcon#enter wrdev, iclass 12, count 2 2006.229.08:12:20.36#ibcon#first serial, iclass 12, count 2 2006.229.08:12:20.36#ibcon#enter sib2, iclass 12, count 2 2006.229.08:12:20.36#ibcon#flushed, iclass 12, count 2 2006.229.08:12:20.36#ibcon#about to write, iclass 12, count 2 2006.229.08:12:20.36#ibcon#wrote, iclass 12, count 2 2006.229.08:12:20.36#ibcon#about to read 3, iclass 12, count 2 2006.229.08:12:20.38#ibcon#read 3, iclass 12, count 2 2006.229.08:12:20.38#ibcon#about to read 4, iclass 12, count 2 2006.229.08:12:20.38#ibcon#read 4, iclass 12, count 2 2006.229.08:12:20.38#ibcon#about to read 5, iclass 12, count 2 2006.229.08:12:20.38#ibcon#read 5, iclass 12, count 2 2006.229.08:12:20.38#ibcon#about to read 6, iclass 12, count 2 2006.229.08:12:20.38#ibcon#read 6, iclass 12, count 2 2006.229.08:12:20.38#ibcon#end of sib2, iclass 12, count 2 2006.229.08:12:20.38#ibcon#*mode == 0, iclass 12, count 2 2006.229.08:12:20.38#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.08:12:20.38#ibcon#[27=AT05-04\r\n] 2006.229.08:12:20.38#ibcon#*before write, iclass 12, count 2 2006.229.08:12:20.38#ibcon#enter sib2, iclass 12, count 2 2006.229.08:12:20.38#ibcon#flushed, iclass 12, count 2 2006.229.08:12:20.38#ibcon#about to write, iclass 12, count 2 2006.229.08:12:20.38#ibcon#wrote, iclass 12, count 2 2006.229.08:12:20.38#ibcon#about to read 3, iclass 12, count 2 2006.229.08:12:20.41#ibcon#read 3, iclass 12, count 2 2006.229.08:12:20.41#ibcon#about to read 4, iclass 12, count 2 2006.229.08:12:20.41#ibcon#read 4, iclass 12, count 2 2006.229.08:12:20.41#ibcon#about to read 5, iclass 12, count 2 2006.229.08:12:20.41#ibcon#read 5, iclass 12, count 2 2006.229.08:12:20.41#ibcon#about to read 6, iclass 12, count 2 2006.229.08:12:20.41#ibcon#read 6, iclass 12, count 2 2006.229.08:12:20.41#ibcon#end of sib2, iclass 12, count 2 2006.229.08:12:20.41#ibcon#*after write, iclass 12, count 2 2006.229.08:12:20.41#ibcon#*before return 0, iclass 12, count 2 2006.229.08:12:20.41#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:20.41#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:12:20.41#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.08:12:20.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:20.41#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:20.53#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:20.53#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:20.53#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:12:20.53#ibcon#first serial, iclass 12, count 0 2006.229.08:12:20.53#ibcon#enter sib2, iclass 12, count 0 2006.229.08:12:20.53#ibcon#flushed, iclass 12, count 0 2006.229.08:12:20.53#ibcon#about to write, iclass 12, count 0 2006.229.08:12:20.53#ibcon#wrote, iclass 12, count 0 2006.229.08:12:20.53#ibcon#about to read 3, iclass 12, count 0 2006.229.08:12:20.55#ibcon#read 3, iclass 12, count 0 2006.229.08:12:20.55#ibcon#about to read 4, iclass 12, count 0 2006.229.08:12:20.55#ibcon#read 4, iclass 12, count 0 2006.229.08:12:20.55#ibcon#about to read 5, iclass 12, count 0 2006.229.08:12:20.55#ibcon#read 5, iclass 12, count 0 2006.229.08:12:20.55#ibcon#about to read 6, iclass 12, count 0 2006.229.08:12:20.55#ibcon#read 6, iclass 12, count 0 2006.229.08:12:20.55#ibcon#end of sib2, iclass 12, count 0 2006.229.08:12:20.55#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:12:20.55#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:12:20.55#ibcon#[27=USB\r\n] 2006.229.08:12:20.55#ibcon#*before write, iclass 12, count 0 2006.229.08:12:20.55#ibcon#enter sib2, iclass 12, count 0 2006.229.08:12:20.55#ibcon#flushed, iclass 12, count 0 2006.229.08:12:20.55#ibcon#about to write, iclass 12, count 0 2006.229.08:12:20.55#ibcon#wrote, iclass 12, count 0 2006.229.08:12:20.55#ibcon#about to read 3, iclass 12, count 0 2006.229.08:12:20.58#ibcon#read 3, iclass 12, count 0 2006.229.08:12:20.58#ibcon#about to read 4, iclass 12, count 0 2006.229.08:12:20.58#ibcon#read 4, iclass 12, count 0 2006.229.08:12:20.58#ibcon#about to read 5, iclass 12, count 0 2006.229.08:12:20.58#ibcon#read 5, iclass 12, count 0 2006.229.08:12:20.58#ibcon#about to read 6, iclass 12, count 0 2006.229.08:12:20.58#ibcon#read 6, iclass 12, count 0 2006.229.08:12:20.58#ibcon#end of sib2, iclass 12, count 0 2006.229.08:12:20.58#ibcon#*after write, iclass 12, count 0 2006.229.08:12:20.58#ibcon#*before return 0, iclass 12, count 0 2006.229.08:12:20.58#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:20.58#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:12:20.58#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:12:20.58#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:12:20.58$vck44/vblo=6,719.99 2006.229.08:12:20.58#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.08:12:20.58#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.08:12:20.58#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:20.58#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:20.58#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:20.58#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:20.58#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:12:20.58#ibcon#first serial, iclass 14, count 0 2006.229.08:12:20.58#ibcon#enter sib2, iclass 14, count 0 2006.229.08:12:20.58#ibcon#flushed, iclass 14, count 0 2006.229.08:12:20.58#ibcon#about to write, iclass 14, count 0 2006.229.08:12:20.58#ibcon#wrote, iclass 14, count 0 2006.229.08:12:20.58#ibcon#about to read 3, iclass 14, count 0 2006.229.08:12:20.60#ibcon#read 3, iclass 14, count 0 2006.229.08:12:20.60#ibcon#about to read 4, iclass 14, count 0 2006.229.08:12:20.60#ibcon#read 4, iclass 14, count 0 2006.229.08:12:20.60#ibcon#about to read 5, iclass 14, count 0 2006.229.08:12:20.60#ibcon#read 5, iclass 14, count 0 2006.229.08:12:20.60#ibcon#about to read 6, iclass 14, count 0 2006.229.08:12:20.60#ibcon#read 6, iclass 14, count 0 2006.229.08:12:20.60#ibcon#end of sib2, iclass 14, count 0 2006.229.08:12:20.60#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:12:20.60#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:12:20.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:12:20.60#ibcon#*before write, iclass 14, count 0 2006.229.08:12:20.60#ibcon#enter sib2, iclass 14, count 0 2006.229.08:12:20.60#ibcon#flushed, iclass 14, count 0 2006.229.08:12:20.60#ibcon#about to write, iclass 14, count 0 2006.229.08:12:20.60#ibcon#wrote, iclass 14, count 0 2006.229.08:12:20.60#ibcon#about to read 3, iclass 14, count 0 2006.229.08:12:20.64#ibcon#read 3, iclass 14, count 0 2006.229.08:12:20.64#ibcon#about to read 4, iclass 14, count 0 2006.229.08:12:20.64#ibcon#read 4, iclass 14, count 0 2006.229.08:12:20.64#ibcon#about to read 5, iclass 14, count 0 2006.229.08:12:20.64#ibcon#read 5, iclass 14, count 0 2006.229.08:12:20.64#ibcon#about to read 6, iclass 14, count 0 2006.229.08:12:20.64#ibcon#read 6, iclass 14, count 0 2006.229.08:12:20.64#ibcon#end of sib2, iclass 14, count 0 2006.229.08:12:20.64#ibcon#*after write, iclass 14, count 0 2006.229.08:12:20.64#ibcon#*before return 0, iclass 14, count 0 2006.229.08:12:20.64#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:20.64#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:12:20.64#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:12:20.64#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:12:20.64$vck44/vb=6,4 2006.229.08:12:20.64#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.08:12:20.64#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.08:12:20.64#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:20.64#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:20.70#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:20.70#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:20.70#ibcon#enter wrdev, iclass 16, count 2 2006.229.08:12:20.70#ibcon#first serial, iclass 16, count 2 2006.229.08:12:20.70#ibcon#enter sib2, iclass 16, count 2 2006.229.08:12:20.70#ibcon#flushed, iclass 16, count 2 2006.229.08:12:20.70#ibcon#about to write, iclass 16, count 2 2006.229.08:12:20.70#ibcon#wrote, iclass 16, count 2 2006.229.08:12:20.70#ibcon#about to read 3, iclass 16, count 2 2006.229.08:12:20.72#ibcon#read 3, iclass 16, count 2 2006.229.08:12:20.72#ibcon#about to read 4, iclass 16, count 2 2006.229.08:12:20.72#ibcon#read 4, iclass 16, count 2 2006.229.08:12:20.72#ibcon#about to read 5, iclass 16, count 2 2006.229.08:12:20.72#ibcon#read 5, iclass 16, count 2 2006.229.08:12:20.72#ibcon#about to read 6, iclass 16, count 2 2006.229.08:12:20.72#ibcon#read 6, iclass 16, count 2 2006.229.08:12:20.72#ibcon#end of sib2, iclass 16, count 2 2006.229.08:12:20.72#ibcon#*mode == 0, iclass 16, count 2 2006.229.08:12:20.72#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.08:12:20.72#ibcon#[27=AT06-04\r\n] 2006.229.08:12:20.72#ibcon#*before write, iclass 16, count 2 2006.229.08:12:20.72#ibcon#enter sib2, iclass 16, count 2 2006.229.08:12:20.72#ibcon#flushed, iclass 16, count 2 2006.229.08:12:20.72#ibcon#about to write, iclass 16, count 2 2006.229.08:12:20.72#ibcon#wrote, iclass 16, count 2 2006.229.08:12:20.72#ibcon#about to read 3, iclass 16, count 2 2006.229.08:12:20.75#ibcon#read 3, iclass 16, count 2 2006.229.08:12:20.75#ibcon#about to read 4, iclass 16, count 2 2006.229.08:12:20.75#ibcon#read 4, iclass 16, count 2 2006.229.08:12:20.75#ibcon#about to read 5, iclass 16, count 2 2006.229.08:12:20.75#ibcon#read 5, iclass 16, count 2 2006.229.08:12:20.75#ibcon#about to read 6, iclass 16, count 2 2006.229.08:12:20.75#ibcon#read 6, iclass 16, count 2 2006.229.08:12:20.75#ibcon#end of sib2, iclass 16, count 2 2006.229.08:12:20.75#ibcon#*after write, iclass 16, count 2 2006.229.08:12:20.75#ibcon#*before return 0, iclass 16, count 2 2006.229.08:12:20.75#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:20.75#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:12:20.75#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.08:12:20.75#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:20.75#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:20.87#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:20.87#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:20.87#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:12:20.87#ibcon#first serial, iclass 16, count 0 2006.229.08:12:20.87#ibcon#enter sib2, iclass 16, count 0 2006.229.08:12:20.87#ibcon#flushed, iclass 16, count 0 2006.229.08:12:20.87#ibcon#about to write, iclass 16, count 0 2006.229.08:12:20.87#ibcon#wrote, iclass 16, count 0 2006.229.08:12:20.87#ibcon#about to read 3, iclass 16, count 0 2006.229.08:12:20.89#ibcon#read 3, iclass 16, count 0 2006.229.08:12:20.89#ibcon#about to read 4, iclass 16, count 0 2006.229.08:12:20.89#ibcon#read 4, iclass 16, count 0 2006.229.08:12:20.89#ibcon#about to read 5, iclass 16, count 0 2006.229.08:12:20.89#ibcon#read 5, iclass 16, count 0 2006.229.08:12:20.89#ibcon#about to read 6, iclass 16, count 0 2006.229.08:12:20.89#ibcon#read 6, iclass 16, count 0 2006.229.08:12:20.89#ibcon#end of sib2, iclass 16, count 0 2006.229.08:12:20.89#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:12:20.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:12:20.89#ibcon#[27=USB\r\n] 2006.229.08:12:20.89#ibcon#*before write, iclass 16, count 0 2006.229.08:12:20.89#ibcon#enter sib2, iclass 16, count 0 2006.229.08:12:20.89#ibcon#flushed, iclass 16, count 0 2006.229.08:12:20.89#ibcon#about to write, iclass 16, count 0 2006.229.08:12:20.89#ibcon#wrote, iclass 16, count 0 2006.229.08:12:20.89#ibcon#about to read 3, iclass 16, count 0 2006.229.08:12:20.92#ibcon#read 3, iclass 16, count 0 2006.229.08:12:20.92#ibcon#about to read 4, iclass 16, count 0 2006.229.08:12:20.92#ibcon#read 4, iclass 16, count 0 2006.229.08:12:20.92#ibcon#about to read 5, iclass 16, count 0 2006.229.08:12:20.92#ibcon#read 5, iclass 16, count 0 2006.229.08:12:20.92#ibcon#about to read 6, iclass 16, count 0 2006.229.08:12:20.92#ibcon#read 6, iclass 16, count 0 2006.229.08:12:20.92#ibcon#end of sib2, iclass 16, count 0 2006.229.08:12:20.92#ibcon#*after write, iclass 16, count 0 2006.229.08:12:20.92#ibcon#*before return 0, iclass 16, count 0 2006.229.08:12:20.92#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:20.92#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:12:20.92#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:12:20.92#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:12:20.92$vck44/vblo=7,734.99 2006.229.08:12:20.92#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.08:12:20.92#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.08:12:20.92#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:20.92#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:20.92#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:20.92#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:20.92#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:12:20.92#ibcon#first serial, iclass 18, count 0 2006.229.08:12:20.92#ibcon#enter sib2, iclass 18, count 0 2006.229.08:12:20.92#ibcon#flushed, iclass 18, count 0 2006.229.08:12:20.92#ibcon#about to write, iclass 18, count 0 2006.229.08:12:20.92#ibcon#wrote, iclass 18, count 0 2006.229.08:12:20.92#ibcon#about to read 3, iclass 18, count 0 2006.229.08:12:20.94#ibcon#read 3, iclass 18, count 0 2006.229.08:12:20.94#ibcon#about to read 4, iclass 18, count 0 2006.229.08:12:20.94#ibcon#read 4, iclass 18, count 0 2006.229.08:12:20.94#ibcon#about to read 5, iclass 18, count 0 2006.229.08:12:20.94#ibcon#read 5, iclass 18, count 0 2006.229.08:12:20.94#ibcon#about to read 6, iclass 18, count 0 2006.229.08:12:20.94#ibcon#read 6, iclass 18, count 0 2006.229.08:12:20.94#ibcon#end of sib2, iclass 18, count 0 2006.229.08:12:20.94#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:12:20.94#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:12:20.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:12:20.94#ibcon#*before write, iclass 18, count 0 2006.229.08:12:20.94#ibcon#enter sib2, iclass 18, count 0 2006.229.08:12:20.94#ibcon#flushed, iclass 18, count 0 2006.229.08:12:20.94#ibcon#about to write, iclass 18, count 0 2006.229.08:12:20.94#ibcon#wrote, iclass 18, count 0 2006.229.08:12:20.94#ibcon#about to read 3, iclass 18, count 0 2006.229.08:12:20.98#ibcon#read 3, iclass 18, count 0 2006.229.08:12:20.98#ibcon#about to read 4, iclass 18, count 0 2006.229.08:12:20.98#ibcon#read 4, iclass 18, count 0 2006.229.08:12:20.98#ibcon#about to read 5, iclass 18, count 0 2006.229.08:12:20.98#ibcon#read 5, iclass 18, count 0 2006.229.08:12:20.98#ibcon#about to read 6, iclass 18, count 0 2006.229.08:12:20.98#ibcon#read 6, iclass 18, count 0 2006.229.08:12:20.98#ibcon#end of sib2, iclass 18, count 0 2006.229.08:12:20.98#ibcon#*after write, iclass 18, count 0 2006.229.08:12:20.98#ibcon#*before return 0, iclass 18, count 0 2006.229.08:12:20.98#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:20.98#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:12:20.98#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:12:20.98#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:12:20.98$vck44/vb=7,4 2006.229.08:12:20.98#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.08:12:20.98#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.08:12:20.98#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:20.98#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:21.04#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:21.04#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:21.04#ibcon#enter wrdev, iclass 20, count 2 2006.229.08:12:21.04#ibcon#first serial, iclass 20, count 2 2006.229.08:12:21.04#ibcon#enter sib2, iclass 20, count 2 2006.229.08:12:21.04#ibcon#flushed, iclass 20, count 2 2006.229.08:12:21.04#ibcon#about to write, iclass 20, count 2 2006.229.08:12:21.04#ibcon#wrote, iclass 20, count 2 2006.229.08:12:21.04#ibcon#about to read 3, iclass 20, count 2 2006.229.08:12:21.06#ibcon#read 3, iclass 20, count 2 2006.229.08:12:21.06#ibcon#about to read 4, iclass 20, count 2 2006.229.08:12:21.06#ibcon#read 4, iclass 20, count 2 2006.229.08:12:21.06#ibcon#about to read 5, iclass 20, count 2 2006.229.08:12:21.06#ibcon#read 5, iclass 20, count 2 2006.229.08:12:21.06#ibcon#about to read 6, iclass 20, count 2 2006.229.08:12:21.06#ibcon#read 6, iclass 20, count 2 2006.229.08:12:21.06#ibcon#end of sib2, iclass 20, count 2 2006.229.08:12:21.06#ibcon#*mode == 0, iclass 20, count 2 2006.229.08:12:21.06#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.08:12:21.06#ibcon#[27=AT07-04\r\n] 2006.229.08:12:21.06#ibcon#*before write, iclass 20, count 2 2006.229.08:12:21.06#ibcon#enter sib2, iclass 20, count 2 2006.229.08:12:21.06#ibcon#flushed, iclass 20, count 2 2006.229.08:12:21.06#ibcon#about to write, iclass 20, count 2 2006.229.08:12:21.06#ibcon#wrote, iclass 20, count 2 2006.229.08:12:21.06#ibcon#about to read 3, iclass 20, count 2 2006.229.08:12:21.09#ibcon#read 3, iclass 20, count 2 2006.229.08:12:21.09#ibcon#about to read 4, iclass 20, count 2 2006.229.08:12:21.09#ibcon#read 4, iclass 20, count 2 2006.229.08:12:21.09#ibcon#about to read 5, iclass 20, count 2 2006.229.08:12:21.09#ibcon#read 5, iclass 20, count 2 2006.229.08:12:21.09#ibcon#about to read 6, iclass 20, count 2 2006.229.08:12:21.09#ibcon#read 6, iclass 20, count 2 2006.229.08:12:21.09#ibcon#end of sib2, iclass 20, count 2 2006.229.08:12:21.09#ibcon#*after write, iclass 20, count 2 2006.229.08:12:21.09#ibcon#*before return 0, iclass 20, count 2 2006.229.08:12:21.09#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:21.09#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:12:21.09#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.08:12:21.09#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:21.09#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:21.21#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:21.21#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:21.21#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:12:21.21#ibcon#first serial, iclass 20, count 0 2006.229.08:12:21.21#ibcon#enter sib2, iclass 20, count 0 2006.229.08:12:21.21#ibcon#flushed, iclass 20, count 0 2006.229.08:12:21.21#ibcon#about to write, iclass 20, count 0 2006.229.08:12:21.21#ibcon#wrote, iclass 20, count 0 2006.229.08:12:21.21#ibcon#about to read 3, iclass 20, count 0 2006.229.08:12:21.23#ibcon#read 3, iclass 20, count 0 2006.229.08:12:21.23#ibcon#about to read 4, iclass 20, count 0 2006.229.08:12:21.23#ibcon#read 4, iclass 20, count 0 2006.229.08:12:21.23#ibcon#about to read 5, iclass 20, count 0 2006.229.08:12:21.23#ibcon#read 5, iclass 20, count 0 2006.229.08:12:21.23#ibcon#about to read 6, iclass 20, count 0 2006.229.08:12:21.23#ibcon#read 6, iclass 20, count 0 2006.229.08:12:21.23#ibcon#end of sib2, iclass 20, count 0 2006.229.08:12:21.23#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:12:21.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:12:21.23#ibcon#[27=USB\r\n] 2006.229.08:12:21.23#ibcon#*before write, iclass 20, count 0 2006.229.08:12:21.23#ibcon#enter sib2, iclass 20, count 0 2006.229.08:12:21.23#ibcon#flushed, iclass 20, count 0 2006.229.08:12:21.23#ibcon#about to write, iclass 20, count 0 2006.229.08:12:21.23#ibcon#wrote, iclass 20, count 0 2006.229.08:12:21.23#ibcon#about to read 3, iclass 20, count 0 2006.229.08:12:21.26#ibcon#read 3, iclass 20, count 0 2006.229.08:12:21.26#ibcon#about to read 4, iclass 20, count 0 2006.229.08:12:21.26#ibcon#read 4, iclass 20, count 0 2006.229.08:12:21.26#ibcon#about to read 5, iclass 20, count 0 2006.229.08:12:21.26#ibcon#read 5, iclass 20, count 0 2006.229.08:12:21.26#ibcon#about to read 6, iclass 20, count 0 2006.229.08:12:21.26#ibcon#read 6, iclass 20, count 0 2006.229.08:12:21.26#ibcon#end of sib2, iclass 20, count 0 2006.229.08:12:21.26#ibcon#*after write, iclass 20, count 0 2006.229.08:12:21.26#ibcon#*before return 0, iclass 20, count 0 2006.229.08:12:21.26#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:21.26#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:12:21.26#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:12:21.26#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:12:21.26$vck44/vblo=8,744.99 2006.229.08:12:21.26#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.08:12:21.26#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.08:12:21.26#ibcon#ireg 17 cls_cnt 0 2006.229.08:12:21.26#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:21.26#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:21.26#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:21.26#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:12:21.26#ibcon#first serial, iclass 22, count 0 2006.229.08:12:21.26#ibcon#enter sib2, iclass 22, count 0 2006.229.08:12:21.26#ibcon#flushed, iclass 22, count 0 2006.229.08:12:21.26#ibcon#about to write, iclass 22, count 0 2006.229.08:12:21.26#ibcon#wrote, iclass 22, count 0 2006.229.08:12:21.26#ibcon#about to read 3, iclass 22, count 0 2006.229.08:12:21.28#ibcon#read 3, iclass 22, count 0 2006.229.08:12:21.28#ibcon#about to read 4, iclass 22, count 0 2006.229.08:12:21.28#ibcon#read 4, iclass 22, count 0 2006.229.08:12:21.28#ibcon#about to read 5, iclass 22, count 0 2006.229.08:12:21.28#ibcon#read 5, iclass 22, count 0 2006.229.08:12:21.28#ibcon#about to read 6, iclass 22, count 0 2006.229.08:12:21.28#ibcon#read 6, iclass 22, count 0 2006.229.08:12:21.28#ibcon#end of sib2, iclass 22, count 0 2006.229.08:12:21.28#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:12:21.28#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:12:21.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:12:21.28#ibcon#*before write, iclass 22, count 0 2006.229.08:12:21.28#ibcon#enter sib2, iclass 22, count 0 2006.229.08:12:21.28#ibcon#flushed, iclass 22, count 0 2006.229.08:12:21.28#ibcon#about to write, iclass 22, count 0 2006.229.08:12:21.28#ibcon#wrote, iclass 22, count 0 2006.229.08:12:21.28#ibcon#about to read 3, iclass 22, count 0 2006.229.08:12:21.32#ibcon#read 3, iclass 22, count 0 2006.229.08:12:21.32#ibcon#about to read 4, iclass 22, count 0 2006.229.08:12:21.32#ibcon#read 4, iclass 22, count 0 2006.229.08:12:21.32#ibcon#about to read 5, iclass 22, count 0 2006.229.08:12:21.32#ibcon#read 5, iclass 22, count 0 2006.229.08:12:21.32#ibcon#about to read 6, iclass 22, count 0 2006.229.08:12:21.32#ibcon#read 6, iclass 22, count 0 2006.229.08:12:21.32#ibcon#end of sib2, iclass 22, count 0 2006.229.08:12:21.32#ibcon#*after write, iclass 22, count 0 2006.229.08:12:21.32#ibcon#*before return 0, iclass 22, count 0 2006.229.08:12:21.32#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:21.32#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:12:21.32#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:12:21.32#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:12:21.32$vck44/vb=8,4 2006.229.08:12:21.32#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.08:12:21.32#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.08:12:21.32#ibcon#ireg 11 cls_cnt 2 2006.229.08:12:21.32#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:21.38#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:21.38#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:21.38#ibcon#enter wrdev, iclass 24, count 2 2006.229.08:12:21.38#ibcon#first serial, iclass 24, count 2 2006.229.08:12:21.38#ibcon#enter sib2, iclass 24, count 2 2006.229.08:12:21.38#ibcon#flushed, iclass 24, count 2 2006.229.08:12:21.38#ibcon#about to write, iclass 24, count 2 2006.229.08:12:21.38#ibcon#wrote, iclass 24, count 2 2006.229.08:12:21.38#ibcon#about to read 3, iclass 24, count 2 2006.229.08:12:21.40#ibcon#read 3, iclass 24, count 2 2006.229.08:12:21.40#ibcon#about to read 4, iclass 24, count 2 2006.229.08:12:21.40#ibcon#read 4, iclass 24, count 2 2006.229.08:12:21.40#ibcon#about to read 5, iclass 24, count 2 2006.229.08:12:21.40#ibcon#read 5, iclass 24, count 2 2006.229.08:12:21.40#ibcon#about to read 6, iclass 24, count 2 2006.229.08:12:21.40#ibcon#read 6, iclass 24, count 2 2006.229.08:12:21.40#ibcon#end of sib2, iclass 24, count 2 2006.229.08:12:21.40#ibcon#*mode == 0, iclass 24, count 2 2006.229.08:12:21.40#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.08:12:21.40#ibcon#[27=AT08-04\r\n] 2006.229.08:12:21.40#ibcon#*before write, iclass 24, count 2 2006.229.08:12:21.40#ibcon#enter sib2, iclass 24, count 2 2006.229.08:12:21.40#ibcon#flushed, iclass 24, count 2 2006.229.08:12:21.40#ibcon#about to write, iclass 24, count 2 2006.229.08:12:21.40#ibcon#wrote, iclass 24, count 2 2006.229.08:12:21.40#ibcon#about to read 3, iclass 24, count 2 2006.229.08:12:21.43#ibcon#read 3, iclass 24, count 2 2006.229.08:12:21.43#ibcon#about to read 4, iclass 24, count 2 2006.229.08:12:21.43#ibcon#read 4, iclass 24, count 2 2006.229.08:12:21.43#ibcon#about to read 5, iclass 24, count 2 2006.229.08:12:21.43#ibcon#read 5, iclass 24, count 2 2006.229.08:12:21.43#ibcon#about to read 6, iclass 24, count 2 2006.229.08:12:21.43#ibcon#read 6, iclass 24, count 2 2006.229.08:12:21.43#ibcon#end of sib2, iclass 24, count 2 2006.229.08:12:21.43#ibcon#*after write, iclass 24, count 2 2006.229.08:12:21.43#ibcon#*before return 0, iclass 24, count 2 2006.229.08:12:21.43#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:21.43#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:12:21.43#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.08:12:21.43#ibcon#ireg 7 cls_cnt 0 2006.229.08:12:21.43#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:21.55#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:21.55#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:21.55#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:12:21.55#ibcon#first serial, iclass 24, count 0 2006.229.08:12:21.55#ibcon#enter sib2, iclass 24, count 0 2006.229.08:12:21.55#ibcon#flushed, iclass 24, count 0 2006.229.08:12:21.55#ibcon#about to write, iclass 24, count 0 2006.229.08:12:21.55#ibcon#wrote, iclass 24, count 0 2006.229.08:12:21.55#ibcon#about to read 3, iclass 24, count 0 2006.229.08:12:21.57#ibcon#read 3, iclass 24, count 0 2006.229.08:12:21.57#ibcon#about to read 4, iclass 24, count 0 2006.229.08:12:21.57#ibcon#read 4, iclass 24, count 0 2006.229.08:12:21.57#ibcon#about to read 5, iclass 24, count 0 2006.229.08:12:21.57#ibcon#read 5, iclass 24, count 0 2006.229.08:12:21.57#ibcon#about to read 6, iclass 24, count 0 2006.229.08:12:21.57#ibcon#read 6, iclass 24, count 0 2006.229.08:12:21.57#ibcon#end of sib2, iclass 24, count 0 2006.229.08:12:21.57#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:12:21.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:12:21.57#ibcon#[27=USB\r\n] 2006.229.08:12:21.57#ibcon#*before write, iclass 24, count 0 2006.229.08:12:21.57#ibcon#enter sib2, iclass 24, count 0 2006.229.08:12:21.57#ibcon#flushed, iclass 24, count 0 2006.229.08:12:21.57#ibcon#about to write, iclass 24, count 0 2006.229.08:12:21.57#ibcon#wrote, iclass 24, count 0 2006.229.08:12:21.57#ibcon#about to read 3, iclass 24, count 0 2006.229.08:12:21.60#ibcon#read 3, iclass 24, count 0 2006.229.08:12:21.60#ibcon#about to read 4, iclass 24, count 0 2006.229.08:12:21.60#ibcon#read 4, iclass 24, count 0 2006.229.08:12:21.60#ibcon#about to read 5, iclass 24, count 0 2006.229.08:12:21.60#ibcon#read 5, iclass 24, count 0 2006.229.08:12:21.60#ibcon#about to read 6, iclass 24, count 0 2006.229.08:12:21.60#ibcon#read 6, iclass 24, count 0 2006.229.08:12:21.60#ibcon#end of sib2, iclass 24, count 0 2006.229.08:12:21.60#ibcon#*after write, iclass 24, count 0 2006.229.08:12:21.60#ibcon#*before return 0, iclass 24, count 0 2006.229.08:12:21.60#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:21.60#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:12:21.60#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:12:21.60#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:12:21.60$vck44/vabw=wide 2006.229.08:12:21.60#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.08:12:21.60#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.08:12:21.60#ibcon#ireg 8 cls_cnt 0 2006.229.08:12:21.60#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:21.60#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:21.60#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:21.60#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:12:21.60#ibcon#first serial, iclass 26, count 0 2006.229.08:12:21.60#ibcon#enter sib2, iclass 26, count 0 2006.229.08:12:21.60#ibcon#flushed, iclass 26, count 0 2006.229.08:12:21.60#ibcon#about to write, iclass 26, count 0 2006.229.08:12:21.60#ibcon#wrote, iclass 26, count 0 2006.229.08:12:21.60#ibcon#about to read 3, iclass 26, count 0 2006.229.08:12:21.62#ibcon#read 3, iclass 26, count 0 2006.229.08:12:21.62#ibcon#about to read 4, iclass 26, count 0 2006.229.08:12:21.62#ibcon#read 4, iclass 26, count 0 2006.229.08:12:21.62#ibcon#about to read 5, iclass 26, count 0 2006.229.08:12:21.62#ibcon#read 5, iclass 26, count 0 2006.229.08:12:21.62#ibcon#about to read 6, iclass 26, count 0 2006.229.08:12:21.62#ibcon#read 6, iclass 26, count 0 2006.229.08:12:21.62#ibcon#end of sib2, iclass 26, count 0 2006.229.08:12:21.62#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:12:21.62#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:12:21.62#ibcon#[25=BW32\r\n] 2006.229.08:12:21.62#ibcon#*before write, iclass 26, count 0 2006.229.08:12:21.62#ibcon#enter sib2, iclass 26, count 0 2006.229.08:12:21.62#ibcon#flushed, iclass 26, count 0 2006.229.08:12:21.62#ibcon#about to write, iclass 26, count 0 2006.229.08:12:21.62#ibcon#wrote, iclass 26, count 0 2006.229.08:12:21.62#ibcon#about to read 3, iclass 26, count 0 2006.229.08:12:21.65#ibcon#read 3, iclass 26, count 0 2006.229.08:12:21.65#ibcon#about to read 4, iclass 26, count 0 2006.229.08:12:21.65#ibcon#read 4, iclass 26, count 0 2006.229.08:12:21.65#ibcon#about to read 5, iclass 26, count 0 2006.229.08:12:21.65#ibcon#read 5, iclass 26, count 0 2006.229.08:12:21.65#ibcon#about to read 6, iclass 26, count 0 2006.229.08:12:21.65#ibcon#read 6, iclass 26, count 0 2006.229.08:12:21.65#ibcon#end of sib2, iclass 26, count 0 2006.229.08:12:21.65#ibcon#*after write, iclass 26, count 0 2006.229.08:12:21.65#ibcon#*before return 0, iclass 26, count 0 2006.229.08:12:21.65#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:21.65#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:12:21.65#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:12:21.65#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:12:21.65$vck44/vbbw=wide 2006.229.08:12:21.65#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.08:12:21.65#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.08:12:21.65#ibcon#ireg 8 cls_cnt 0 2006.229.08:12:21.65#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:12:21.72#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:12:21.72#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:12:21.72#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:12:21.72#ibcon#first serial, iclass 28, count 0 2006.229.08:12:21.72#ibcon#enter sib2, iclass 28, count 0 2006.229.08:12:21.72#ibcon#flushed, iclass 28, count 0 2006.229.08:12:21.72#ibcon#about to write, iclass 28, count 0 2006.229.08:12:21.72#ibcon#wrote, iclass 28, count 0 2006.229.08:12:21.72#ibcon#about to read 3, iclass 28, count 0 2006.229.08:12:21.74#ibcon#read 3, iclass 28, count 0 2006.229.08:12:21.74#ibcon#about to read 4, iclass 28, count 0 2006.229.08:12:21.74#ibcon#read 4, iclass 28, count 0 2006.229.08:12:21.74#ibcon#about to read 5, iclass 28, count 0 2006.229.08:12:21.74#ibcon#read 5, iclass 28, count 0 2006.229.08:12:21.74#ibcon#about to read 6, iclass 28, count 0 2006.229.08:12:21.74#ibcon#read 6, iclass 28, count 0 2006.229.08:12:21.74#ibcon#end of sib2, iclass 28, count 0 2006.229.08:12:21.74#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:12:21.74#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:12:21.74#ibcon#[27=BW32\r\n] 2006.229.08:12:21.74#ibcon#*before write, iclass 28, count 0 2006.229.08:12:21.74#ibcon#enter sib2, iclass 28, count 0 2006.229.08:12:21.74#ibcon#flushed, iclass 28, count 0 2006.229.08:12:21.74#ibcon#about to write, iclass 28, count 0 2006.229.08:12:21.74#ibcon#wrote, iclass 28, count 0 2006.229.08:12:21.74#ibcon#about to read 3, iclass 28, count 0 2006.229.08:12:21.77#ibcon#read 3, iclass 28, count 0 2006.229.08:12:21.77#ibcon#about to read 4, iclass 28, count 0 2006.229.08:12:21.77#ibcon#read 4, iclass 28, count 0 2006.229.08:12:21.77#ibcon#about to read 5, iclass 28, count 0 2006.229.08:12:21.77#ibcon#read 5, iclass 28, count 0 2006.229.08:12:21.77#ibcon#about to read 6, iclass 28, count 0 2006.229.08:12:21.77#ibcon#read 6, iclass 28, count 0 2006.229.08:12:21.77#ibcon#end of sib2, iclass 28, count 0 2006.229.08:12:21.77#ibcon#*after write, iclass 28, count 0 2006.229.08:12:21.77#ibcon#*before return 0, iclass 28, count 0 2006.229.08:12:21.77#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:12:21.77#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:12:21.77#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:12:21.77#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:12:21.77$setupk4/ifdk4 2006.229.08:12:21.77$ifdk4/lo= 2006.229.08:12:21.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:12:21.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:12:21.77$ifdk4/patch= 2006.229.08:12:21.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:12:21.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:12:21.77$setupk4/!*+20s 2006.229.08:12:29.14#trakl#Source acquired 2006.229.08:12:29.25#abcon#<5=/06 3.0 5.3 29.58 931000.5\r\n> 2006.229.08:12:29.27#abcon#{5=INTERFACE CLEAR} 2006.229.08:12:29.33#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:12:30.14#flagr#flagr/antenna,acquired 2006.229.08:12:36.28$setupk4/"tpicd 2006.229.08:12:36.28$setupk4/echo=off 2006.229.08:12:36.28$setupk4/xlog=off 2006.229.08:12:36.28:!2006.229.08:16:03 2006.229.08:16:03.00:preob 2006.229.08:16:04.14/onsource/TRACKING 2006.229.08:16:04.14:!2006.229.08:16:13 2006.229.08:16:13.00:"tape 2006.229.08:16:13.00:"st=record 2006.229.08:16:13.00:data_valid=on 2006.229.08:16:13.00:midob 2006.229.08:16:13.14/onsource/TRACKING 2006.229.08:16:13.14/wx/29.55,1000.5,93 2006.229.08:16:13.22/cable/+6.3969E-03 2006.229.08:16:14.31/va/01,08,usb,yes,30,32 2006.229.08:16:14.31/va/02,07,usb,yes,32,33 2006.229.08:16:14.31/va/03,06,usb,yes,40,42 2006.229.08:16:14.31/va/04,07,usb,yes,33,35 2006.229.08:16:14.31/va/05,04,usb,yes,29,30 2006.229.08:16:14.31/va/06,04,usb,yes,33,33 2006.229.08:16:14.31/va/07,05,usb,yes,29,30 2006.229.08:16:14.31/va/08,06,usb,yes,21,26 2006.229.08:16:14.54/valo/01,524.99,yes,locked 2006.229.08:16:14.54/valo/02,534.99,yes,locked 2006.229.08:16:14.54/valo/03,564.99,yes,locked 2006.229.08:16:14.54/valo/04,624.99,yes,locked 2006.229.08:16:14.54/valo/05,734.99,yes,locked 2006.229.08:16:14.54/valo/06,814.99,yes,locked 2006.229.08:16:14.54/valo/07,864.99,yes,locked 2006.229.08:16:14.54/valo/08,884.99,yes,locked 2006.229.08:16:15.63/vb/01,04,usb,yes,31,29 2006.229.08:16:15.63/vb/02,04,usb,yes,34,33 2006.229.08:16:15.63/vb/03,04,usb,yes,31,34 2006.229.08:16:15.63/vb/04,04,usb,yes,35,34 2006.229.08:16:15.63/vb/05,04,usb,yes,27,30 2006.229.08:16:15.63/vb/06,04,usb,yes,32,28 2006.229.08:16:15.63/vb/07,04,usb,yes,32,32 2006.229.08:16:15.63/vb/08,04,usb,yes,29,33 2006.229.08:16:15.86/vblo/01,629.99,yes,locked 2006.229.08:16:15.86/vblo/02,634.99,yes,locked 2006.229.08:16:15.86/vblo/03,649.99,yes,locked 2006.229.08:16:15.86/vblo/04,679.99,yes,locked 2006.229.08:16:15.86/vblo/05,709.99,yes,locked 2006.229.08:16:15.86/vblo/06,719.99,yes,locked 2006.229.08:16:15.86/vblo/07,734.99,yes,locked 2006.229.08:16:15.86/vblo/08,744.99,yes,locked 2006.229.08:16:16.01/vabw/8 2006.229.08:16:16.16/vbbw/8 2006.229.08:16:16.25/xfe/off,on,12.7 2006.229.08:16:16.64/ifatt/23,28,28,28 2006.229.08:16:17.07/fmout-gps/S +4.49E-07 2006.229.08:16:17.11:!2006.229.08:16:53 2006.229.08:16:53.01:data_valid=off 2006.229.08:16:53.01:"et 2006.229.08:16:53.01:!+3s 2006.229.08:16:56.02:"tape 2006.229.08:16:56.02:postob 2006.229.08:16:56.19/cable/+6.3970E-03 2006.229.08:16:56.19/wx/29.54,1000.4,93 2006.229.08:16:56.25/fmout-gps/S +4.49E-07 2006.229.08:16:56.25:scan_name=229-0819,jd0608,220 2006.229.08:16:56.25:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.08:16:58.14#flagr#flagr/antenna,new-source 2006.229.08:16:58.14:checkk5 2006.229.08:16:58.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:16:58.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:16:59.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:16:59.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:17:00.13/chk_obsdata//k5ts1/T2290816??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:17:00.53/chk_obsdata//k5ts2/T2290816??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:17:00.92/chk_obsdata//k5ts3/T2290816??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:17:01.34/chk_obsdata//k5ts4/T2290816??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:17:02.08/k5log//k5ts1_log_newline 2006.229.08:17:02.78/k5log//k5ts2_log_newline 2006.229.08:17:03.51/k5log//k5ts3_log_newline 2006.229.08:17:04.23/k5log//k5ts4_log_newline 2006.229.08:17:04.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:17:04.25:setupk4=1 2006.229.08:17:04.25$setupk4/echo=on 2006.229.08:17:04.25$setupk4/pcalon 2006.229.08:17:04.25$pcalon/"no phase cal control is implemented here 2006.229.08:17:04.25$setupk4/"tpicd=stop 2006.229.08:17:04.25$setupk4/"rec=synch_on 2006.229.08:17:04.25$setupk4/"rec_mode=128 2006.229.08:17:04.25$setupk4/!* 2006.229.08:17:04.25$setupk4/recpk4 2006.229.08:17:04.25$recpk4/recpatch= 2006.229.08:17:04.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:17:04.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:17:04.26$setupk4/vck44 2006.229.08:17:04.26$vck44/valo=1,524.99 2006.229.08:17:04.26#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.08:17:04.26#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.08:17:04.26#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:04.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:04.26#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:04.26#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:04.26#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:17:04.26#ibcon#first serial, iclass 37, count 0 2006.229.08:17:04.26#ibcon#enter sib2, iclass 37, count 0 2006.229.08:17:04.26#ibcon#flushed, iclass 37, count 0 2006.229.08:17:04.26#ibcon#about to write, iclass 37, count 0 2006.229.08:17:04.26#ibcon#wrote, iclass 37, count 0 2006.229.08:17:04.26#ibcon#about to read 3, iclass 37, count 0 2006.229.08:17:04.27#ibcon#read 3, iclass 37, count 0 2006.229.08:17:04.27#ibcon#about to read 4, iclass 37, count 0 2006.229.08:17:04.27#ibcon#read 4, iclass 37, count 0 2006.229.08:17:04.27#ibcon#about to read 5, iclass 37, count 0 2006.229.08:17:04.27#ibcon#read 5, iclass 37, count 0 2006.229.08:17:04.27#ibcon#about to read 6, iclass 37, count 0 2006.229.08:17:04.27#ibcon#read 6, iclass 37, count 0 2006.229.08:17:04.27#ibcon#end of sib2, iclass 37, count 0 2006.229.08:17:04.27#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:17:04.27#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:17:04.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:17:04.27#ibcon#*before write, iclass 37, count 0 2006.229.08:17:04.27#ibcon#enter sib2, iclass 37, count 0 2006.229.08:17:04.27#ibcon#flushed, iclass 37, count 0 2006.229.08:17:04.27#ibcon#about to write, iclass 37, count 0 2006.229.08:17:04.27#ibcon#wrote, iclass 37, count 0 2006.229.08:17:04.27#ibcon#about to read 3, iclass 37, count 0 2006.229.08:17:04.32#ibcon#read 3, iclass 37, count 0 2006.229.08:17:04.32#ibcon#about to read 4, iclass 37, count 0 2006.229.08:17:04.32#ibcon#read 4, iclass 37, count 0 2006.229.08:17:04.32#ibcon#about to read 5, iclass 37, count 0 2006.229.08:17:04.32#ibcon#read 5, iclass 37, count 0 2006.229.08:17:04.32#ibcon#about to read 6, iclass 37, count 0 2006.229.08:17:04.32#ibcon#read 6, iclass 37, count 0 2006.229.08:17:04.32#ibcon#end of sib2, iclass 37, count 0 2006.229.08:17:04.32#ibcon#*after write, iclass 37, count 0 2006.229.08:17:04.32#ibcon#*before return 0, iclass 37, count 0 2006.229.08:17:04.32#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:04.32#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:04.32#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:17:04.32#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:17:04.32$vck44/va=1,8 2006.229.08:17:04.32#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.08:17:04.32#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.08:17:04.32#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:04.32#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:04.32#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:04.32#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:04.32#ibcon#enter wrdev, iclass 39, count 2 2006.229.08:17:04.32#ibcon#first serial, iclass 39, count 2 2006.229.08:17:04.32#ibcon#enter sib2, iclass 39, count 2 2006.229.08:17:04.32#ibcon#flushed, iclass 39, count 2 2006.229.08:17:04.32#ibcon#about to write, iclass 39, count 2 2006.229.08:17:04.32#ibcon#wrote, iclass 39, count 2 2006.229.08:17:04.32#ibcon#about to read 3, iclass 39, count 2 2006.229.08:17:04.34#ibcon#read 3, iclass 39, count 2 2006.229.08:17:04.34#ibcon#about to read 4, iclass 39, count 2 2006.229.08:17:04.34#ibcon#read 4, iclass 39, count 2 2006.229.08:17:04.34#ibcon#about to read 5, iclass 39, count 2 2006.229.08:17:04.34#ibcon#read 5, iclass 39, count 2 2006.229.08:17:04.34#ibcon#about to read 6, iclass 39, count 2 2006.229.08:17:04.34#ibcon#read 6, iclass 39, count 2 2006.229.08:17:04.34#ibcon#end of sib2, iclass 39, count 2 2006.229.08:17:04.34#ibcon#*mode == 0, iclass 39, count 2 2006.229.08:17:04.34#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.08:17:04.34#ibcon#[25=AT01-08\r\n] 2006.229.08:17:04.34#ibcon#*before write, iclass 39, count 2 2006.229.08:17:04.34#ibcon#enter sib2, iclass 39, count 2 2006.229.08:17:04.34#ibcon#flushed, iclass 39, count 2 2006.229.08:17:04.34#ibcon#about to write, iclass 39, count 2 2006.229.08:17:04.34#ibcon#wrote, iclass 39, count 2 2006.229.08:17:04.34#ibcon#about to read 3, iclass 39, count 2 2006.229.08:17:04.37#ibcon#read 3, iclass 39, count 2 2006.229.08:17:04.37#ibcon#about to read 4, iclass 39, count 2 2006.229.08:17:04.37#ibcon#read 4, iclass 39, count 2 2006.229.08:17:04.37#ibcon#about to read 5, iclass 39, count 2 2006.229.08:17:04.37#ibcon#read 5, iclass 39, count 2 2006.229.08:17:04.37#ibcon#about to read 6, iclass 39, count 2 2006.229.08:17:04.37#ibcon#read 6, iclass 39, count 2 2006.229.08:17:04.37#ibcon#end of sib2, iclass 39, count 2 2006.229.08:17:04.37#ibcon#*after write, iclass 39, count 2 2006.229.08:17:04.37#ibcon#*before return 0, iclass 39, count 2 2006.229.08:17:04.37#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:04.37#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:04.37#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.08:17:04.37#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:04.37#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:04.49#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:04.49#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:04.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:17:04.49#ibcon#first serial, iclass 39, count 0 2006.229.08:17:04.49#ibcon#enter sib2, iclass 39, count 0 2006.229.08:17:04.49#ibcon#flushed, iclass 39, count 0 2006.229.08:17:04.49#ibcon#about to write, iclass 39, count 0 2006.229.08:17:04.49#ibcon#wrote, iclass 39, count 0 2006.229.08:17:04.49#ibcon#about to read 3, iclass 39, count 0 2006.229.08:17:04.51#ibcon#read 3, iclass 39, count 0 2006.229.08:17:04.51#ibcon#about to read 4, iclass 39, count 0 2006.229.08:17:04.51#ibcon#read 4, iclass 39, count 0 2006.229.08:17:04.51#ibcon#about to read 5, iclass 39, count 0 2006.229.08:17:04.51#ibcon#read 5, iclass 39, count 0 2006.229.08:17:04.51#ibcon#about to read 6, iclass 39, count 0 2006.229.08:17:04.51#ibcon#read 6, iclass 39, count 0 2006.229.08:17:04.51#ibcon#end of sib2, iclass 39, count 0 2006.229.08:17:04.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:17:04.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:17:04.51#ibcon#[25=USB\r\n] 2006.229.08:17:04.51#ibcon#*before write, iclass 39, count 0 2006.229.08:17:04.51#ibcon#enter sib2, iclass 39, count 0 2006.229.08:17:04.51#ibcon#flushed, iclass 39, count 0 2006.229.08:17:04.51#ibcon#about to write, iclass 39, count 0 2006.229.08:17:04.51#ibcon#wrote, iclass 39, count 0 2006.229.08:17:04.51#ibcon#about to read 3, iclass 39, count 0 2006.229.08:17:04.54#ibcon#read 3, iclass 39, count 0 2006.229.08:17:04.54#ibcon#about to read 4, iclass 39, count 0 2006.229.08:17:04.54#ibcon#read 4, iclass 39, count 0 2006.229.08:17:04.54#ibcon#about to read 5, iclass 39, count 0 2006.229.08:17:04.54#ibcon#read 5, iclass 39, count 0 2006.229.08:17:04.54#ibcon#about to read 6, iclass 39, count 0 2006.229.08:17:04.54#ibcon#read 6, iclass 39, count 0 2006.229.08:17:04.54#ibcon#end of sib2, iclass 39, count 0 2006.229.08:17:04.54#ibcon#*after write, iclass 39, count 0 2006.229.08:17:04.54#ibcon#*before return 0, iclass 39, count 0 2006.229.08:17:04.54#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:04.54#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:04.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:17:04.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:17:04.54$vck44/valo=2,534.99 2006.229.08:17:04.54#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.08:17:04.54#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.08:17:04.54#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:04.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:04.54#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:04.54#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:04.54#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:17:04.54#ibcon#first serial, iclass 3, count 0 2006.229.08:17:04.54#ibcon#enter sib2, iclass 3, count 0 2006.229.08:17:04.54#ibcon#flushed, iclass 3, count 0 2006.229.08:17:04.54#ibcon#about to write, iclass 3, count 0 2006.229.08:17:04.54#ibcon#wrote, iclass 3, count 0 2006.229.08:17:04.54#ibcon#about to read 3, iclass 3, count 0 2006.229.08:17:04.56#ibcon#read 3, iclass 3, count 0 2006.229.08:17:04.56#ibcon#about to read 4, iclass 3, count 0 2006.229.08:17:04.56#ibcon#read 4, iclass 3, count 0 2006.229.08:17:04.56#ibcon#about to read 5, iclass 3, count 0 2006.229.08:17:04.56#ibcon#read 5, iclass 3, count 0 2006.229.08:17:04.56#ibcon#about to read 6, iclass 3, count 0 2006.229.08:17:04.56#ibcon#read 6, iclass 3, count 0 2006.229.08:17:04.56#ibcon#end of sib2, iclass 3, count 0 2006.229.08:17:04.56#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:17:04.56#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:17:04.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:17:04.56#ibcon#*before write, iclass 3, count 0 2006.229.08:17:04.56#ibcon#enter sib2, iclass 3, count 0 2006.229.08:17:04.56#ibcon#flushed, iclass 3, count 0 2006.229.08:17:04.56#ibcon#about to write, iclass 3, count 0 2006.229.08:17:04.56#ibcon#wrote, iclass 3, count 0 2006.229.08:17:04.56#ibcon#about to read 3, iclass 3, count 0 2006.229.08:17:04.60#ibcon#read 3, iclass 3, count 0 2006.229.08:17:04.60#ibcon#about to read 4, iclass 3, count 0 2006.229.08:17:04.60#ibcon#read 4, iclass 3, count 0 2006.229.08:17:04.60#ibcon#about to read 5, iclass 3, count 0 2006.229.08:17:04.60#ibcon#read 5, iclass 3, count 0 2006.229.08:17:04.60#ibcon#about to read 6, iclass 3, count 0 2006.229.08:17:04.60#ibcon#read 6, iclass 3, count 0 2006.229.08:17:04.60#ibcon#end of sib2, iclass 3, count 0 2006.229.08:17:04.60#ibcon#*after write, iclass 3, count 0 2006.229.08:17:04.60#ibcon#*before return 0, iclass 3, count 0 2006.229.08:17:04.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:04.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:04.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:17:04.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:17:04.60$vck44/va=2,7 2006.229.08:17:04.60#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.08:17:04.60#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.08:17:04.60#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:04.60#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:04.66#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:04.66#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:04.66#ibcon#enter wrdev, iclass 5, count 2 2006.229.08:17:04.66#ibcon#first serial, iclass 5, count 2 2006.229.08:17:04.66#ibcon#enter sib2, iclass 5, count 2 2006.229.08:17:04.66#ibcon#flushed, iclass 5, count 2 2006.229.08:17:04.66#ibcon#about to write, iclass 5, count 2 2006.229.08:17:04.66#ibcon#wrote, iclass 5, count 2 2006.229.08:17:04.66#ibcon#about to read 3, iclass 5, count 2 2006.229.08:17:04.68#ibcon#read 3, iclass 5, count 2 2006.229.08:17:04.68#ibcon#about to read 4, iclass 5, count 2 2006.229.08:17:04.68#ibcon#read 4, iclass 5, count 2 2006.229.08:17:04.68#ibcon#about to read 5, iclass 5, count 2 2006.229.08:17:04.68#ibcon#read 5, iclass 5, count 2 2006.229.08:17:04.68#ibcon#about to read 6, iclass 5, count 2 2006.229.08:17:04.68#ibcon#read 6, iclass 5, count 2 2006.229.08:17:04.68#ibcon#end of sib2, iclass 5, count 2 2006.229.08:17:04.68#ibcon#*mode == 0, iclass 5, count 2 2006.229.08:17:04.68#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.08:17:04.68#ibcon#[25=AT02-07\r\n] 2006.229.08:17:04.68#ibcon#*before write, iclass 5, count 2 2006.229.08:17:04.68#ibcon#enter sib2, iclass 5, count 2 2006.229.08:17:04.68#ibcon#flushed, iclass 5, count 2 2006.229.08:17:04.68#ibcon#about to write, iclass 5, count 2 2006.229.08:17:04.68#ibcon#wrote, iclass 5, count 2 2006.229.08:17:04.68#ibcon#about to read 3, iclass 5, count 2 2006.229.08:17:04.71#ibcon#read 3, iclass 5, count 2 2006.229.08:17:04.71#ibcon#about to read 4, iclass 5, count 2 2006.229.08:17:04.71#ibcon#read 4, iclass 5, count 2 2006.229.08:17:04.71#ibcon#about to read 5, iclass 5, count 2 2006.229.08:17:04.71#ibcon#read 5, iclass 5, count 2 2006.229.08:17:04.71#ibcon#about to read 6, iclass 5, count 2 2006.229.08:17:04.71#ibcon#read 6, iclass 5, count 2 2006.229.08:17:04.71#ibcon#end of sib2, iclass 5, count 2 2006.229.08:17:04.71#ibcon#*after write, iclass 5, count 2 2006.229.08:17:04.71#ibcon#*before return 0, iclass 5, count 2 2006.229.08:17:04.71#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:04.71#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:04.71#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.08:17:04.71#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:04.71#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:04.83#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:04.83#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:04.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:17:04.83#ibcon#first serial, iclass 5, count 0 2006.229.08:17:04.83#ibcon#enter sib2, iclass 5, count 0 2006.229.08:17:04.83#ibcon#flushed, iclass 5, count 0 2006.229.08:17:04.83#ibcon#about to write, iclass 5, count 0 2006.229.08:17:04.83#ibcon#wrote, iclass 5, count 0 2006.229.08:17:04.83#ibcon#about to read 3, iclass 5, count 0 2006.229.08:17:04.85#ibcon#read 3, iclass 5, count 0 2006.229.08:17:04.85#ibcon#about to read 4, iclass 5, count 0 2006.229.08:17:04.85#ibcon#read 4, iclass 5, count 0 2006.229.08:17:04.85#ibcon#about to read 5, iclass 5, count 0 2006.229.08:17:04.85#ibcon#read 5, iclass 5, count 0 2006.229.08:17:04.85#ibcon#about to read 6, iclass 5, count 0 2006.229.08:17:04.85#ibcon#read 6, iclass 5, count 0 2006.229.08:17:04.85#ibcon#end of sib2, iclass 5, count 0 2006.229.08:17:04.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:17:04.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:17:04.85#ibcon#[25=USB\r\n] 2006.229.08:17:04.85#ibcon#*before write, iclass 5, count 0 2006.229.08:17:04.85#ibcon#enter sib2, iclass 5, count 0 2006.229.08:17:04.85#ibcon#flushed, iclass 5, count 0 2006.229.08:17:04.85#ibcon#about to write, iclass 5, count 0 2006.229.08:17:04.85#ibcon#wrote, iclass 5, count 0 2006.229.08:17:04.85#ibcon#about to read 3, iclass 5, count 0 2006.229.08:17:04.88#ibcon#read 3, iclass 5, count 0 2006.229.08:17:04.88#ibcon#about to read 4, iclass 5, count 0 2006.229.08:17:04.88#ibcon#read 4, iclass 5, count 0 2006.229.08:17:04.88#ibcon#about to read 5, iclass 5, count 0 2006.229.08:17:04.88#ibcon#read 5, iclass 5, count 0 2006.229.08:17:04.88#ibcon#about to read 6, iclass 5, count 0 2006.229.08:17:04.88#ibcon#read 6, iclass 5, count 0 2006.229.08:17:04.88#ibcon#end of sib2, iclass 5, count 0 2006.229.08:17:04.88#ibcon#*after write, iclass 5, count 0 2006.229.08:17:04.88#ibcon#*before return 0, iclass 5, count 0 2006.229.08:17:04.88#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:04.88#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:04.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:17:04.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:17:04.88$vck44/valo=3,564.99 2006.229.08:17:04.88#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.08:17:04.88#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.08:17:04.88#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:04.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:04.88#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:04.88#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:04.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:17:04.88#ibcon#first serial, iclass 7, count 0 2006.229.08:17:04.88#ibcon#enter sib2, iclass 7, count 0 2006.229.08:17:04.88#ibcon#flushed, iclass 7, count 0 2006.229.08:17:04.88#ibcon#about to write, iclass 7, count 0 2006.229.08:17:04.88#ibcon#wrote, iclass 7, count 0 2006.229.08:17:04.88#ibcon#about to read 3, iclass 7, count 0 2006.229.08:17:04.90#ibcon#read 3, iclass 7, count 0 2006.229.08:17:04.90#ibcon#about to read 4, iclass 7, count 0 2006.229.08:17:04.90#ibcon#read 4, iclass 7, count 0 2006.229.08:17:04.90#ibcon#about to read 5, iclass 7, count 0 2006.229.08:17:04.90#ibcon#read 5, iclass 7, count 0 2006.229.08:17:04.90#ibcon#about to read 6, iclass 7, count 0 2006.229.08:17:04.90#ibcon#read 6, iclass 7, count 0 2006.229.08:17:04.90#ibcon#end of sib2, iclass 7, count 0 2006.229.08:17:04.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:17:04.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:17:04.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:17:04.90#ibcon#*before write, iclass 7, count 0 2006.229.08:17:04.90#ibcon#enter sib2, iclass 7, count 0 2006.229.08:17:04.90#ibcon#flushed, iclass 7, count 0 2006.229.08:17:04.90#ibcon#about to write, iclass 7, count 0 2006.229.08:17:04.90#ibcon#wrote, iclass 7, count 0 2006.229.08:17:04.90#ibcon#about to read 3, iclass 7, count 0 2006.229.08:17:04.94#ibcon#read 3, iclass 7, count 0 2006.229.08:17:04.94#ibcon#about to read 4, iclass 7, count 0 2006.229.08:17:04.94#ibcon#read 4, iclass 7, count 0 2006.229.08:17:04.94#ibcon#about to read 5, iclass 7, count 0 2006.229.08:17:04.94#ibcon#read 5, iclass 7, count 0 2006.229.08:17:04.94#ibcon#about to read 6, iclass 7, count 0 2006.229.08:17:04.94#ibcon#read 6, iclass 7, count 0 2006.229.08:17:04.94#ibcon#end of sib2, iclass 7, count 0 2006.229.08:17:04.94#ibcon#*after write, iclass 7, count 0 2006.229.08:17:04.94#ibcon#*before return 0, iclass 7, count 0 2006.229.08:17:04.94#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:04.94#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:04.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:17:04.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:17:04.94$vck44/va=3,6 2006.229.08:17:04.94#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.08:17:04.94#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.08:17:04.94#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:04.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:05.00#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:05.00#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:05.00#ibcon#enter wrdev, iclass 11, count 2 2006.229.08:17:05.00#ibcon#first serial, iclass 11, count 2 2006.229.08:17:05.00#ibcon#enter sib2, iclass 11, count 2 2006.229.08:17:05.00#ibcon#flushed, iclass 11, count 2 2006.229.08:17:05.00#ibcon#about to write, iclass 11, count 2 2006.229.08:17:05.00#ibcon#wrote, iclass 11, count 2 2006.229.08:17:05.00#ibcon#about to read 3, iclass 11, count 2 2006.229.08:17:05.02#ibcon#read 3, iclass 11, count 2 2006.229.08:17:05.02#ibcon#about to read 4, iclass 11, count 2 2006.229.08:17:05.02#ibcon#read 4, iclass 11, count 2 2006.229.08:17:05.02#ibcon#about to read 5, iclass 11, count 2 2006.229.08:17:05.02#ibcon#read 5, iclass 11, count 2 2006.229.08:17:05.02#ibcon#about to read 6, iclass 11, count 2 2006.229.08:17:05.02#ibcon#read 6, iclass 11, count 2 2006.229.08:17:05.02#ibcon#end of sib2, iclass 11, count 2 2006.229.08:17:05.02#ibcon#*mode == 0, iclass 11, count 2 2006.229.08:17:05.02#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.08:17:05.02#ibcon#[25=AT03-06\r\n] 2006.229.08:17:05.02#ibcon#*before write, iclass 11, count 2 2006.229.08:17:05.02#ibcon#enter sib2, iclass 11, count 2 2006.229.08:17:05.02#ibcon#flushed, iclass 11, count 2 2006.229.08:17:05.02#ibcon#about to write, iclass 11, count 2 2006.229.08:17:05.02#ibcon#wrote, iclass 11, count 2 2006.229.08:17:05.02#ibcon#about to read 3, iclass 11, count 2 2006.229.08:17:05.05#ibcon#read 3, iclass 11, count 2 2006.229.08:17:05.05#ibcon#about to read 4, iclass 11, count 2 2006.229.08:17:05.05#ibcon#read 4, iclass 11, count 2 2006.229.08:17:05.05#ibcon#about to read 5, iclass 11, count 2 2006.229.08:17:05.05#ibcon#read 5, iclass 11, count 2 2006.229.08:17:05.05#ibcon#about to read 6, iclass 11, count 2 2006.229.08:17:05.05#ibcon#read 6, iclass 11, count 2 2006.229.08:17:05.05#ibcon#end of sib2, iclass 11, count 2 2006.229.08:17:05.05#ibcon#*after write, iclass 11, count 2 2006.229.08:17:05.05#ibcon#*before return 0, iclass 11, count 2 2006.229.08:17:05.05#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:05.05#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:05.05#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.08:17:05.05#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:05.05#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:05.17#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:05.17#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:05.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:17:05.17#ibcon#first serial, iclass 11, count 0 2006.229.08:17:05.17#ibcon#enter sib2, iclass 11, count 0 2006.229.08:17:05.17#ibcon#flushed, iclass 11, count 0 2006.229.08:17:05.17#ibcon#about to write, iclass 11, count 0 2006.229.08:17:05.17#ibcon#wrote, iclass 11, count 0 2006.229.08:17:05.17#ibcon#about to read 3, iclass 11, count 0 2006.229.08:17:05.19#ibcon#read 3, iclass 11, count 0 2006.229.08:17:05.19#ibcon#about to read 4, iclass 11, count 0 2006.229.08:17:05.19#ibcon#read 4, iclass 11, count 0 2006.229.08:17:05.19#ibcon#about to read 5, iclass 11, count 0 2006.229.08:17:05.19#ibcon#read 5, iclass 11, count 0 2006.229.08:17:05.19#ibcon#about to read 6, iclass 11, count 0 2006.229.08:17:05.19#ibcon#read 6, iclass 11, count 0 2006.229.08:17:05.19#ibcon#end of sib2, iclass 11, count 0 2006.229.08:17:05.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:17:05.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:17:05.19#ibcon#[25=USB\r\n] 2006.229.08:17:05.19#ibcon#*before write, iclass 11, count 0 2006.229.08:17:05.19#ibcon#enter sib2, iclass 11, count 0 2006.229.08:17:05.19#ibcon#flushed, iclass 11, count 0 2006.229.08:17:05.19#ibcon#about to write, iclass 11, count 0 2006.229.08:17:05.19#ibcon#wrote, iclass 11, count 0 2006.229.08:17:05.19#ibcon#about to read 3, iclass 11, count 0 2006.229.08:17:05.22#ibcon#read 3, iclass 11, count 0 2006.229.08:17:05.22#ibcon#about to read 4, iclass 11, count 0 2006.229.08:17:05.22#ibcon#read 4, iclass 11, count 0 2006.229.08:17:05.22#ibcon#about to read 5, iclass 11, count 0 2006.229.08:17:05.22#ibcon#read 5, iclass 11, count 0 2006.229.08:17:05.22#ibcon#about to read 6, iclass 11, count 0 2006.229.08:17:05.22#ibcon#read 6, iclass 11, count 0 2006.229.08:17:05.22#ibcon#end of sib2, iclass 11, count 0 2006.229.08:17:05.22#ibcon#*after write, iclass 11, count 0 2006.229.08:17:05.22#ibcon#*before return 0, iclass 11, count 0 2006.229.08:17:05.22#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:05.22#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:05.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:17:05.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:17:05.22$vck44/valo=4,624.99 2006.229.08:17:05.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.08:17:05.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.08:17:05.22#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:05.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:05.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:05.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:05.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:17:05.22#ibcon#first serial, iclass 13, count 0 2006.229.08:17:05.22#ibcon#enter sib2, iclass 13, count 0 2006.229.08:17:05.22#ibcon#flushed, iclass 13, count 0 2006.229.08:17:05.22#ibcon#about to write, iclass 13, count 0 2006.229.08:17:05.22#ibcon#wrote, iclass 13, count 0 2006.229.08:17:05.22#ibcon#about to read 3, iclass 13, count 0 2006.229.08:17:05.24#ibcon#read 3, iclass 13, count 0 2006.229.08:17:05.24#ibcon#about to read 4, iclass 13, count 0 2006.229.08:17:05.24#ibcon#read 4, iclass 13, count 0 2006.229.08:17:05.24#ibcon#about to read 5, iclass 13, count 0 2006.229.08:17:05.24#ibcon#read 5, iclass 13, count 0 2006.229.08:17:05.24#ibcon#about to read 6, iclass 13, count 0 2006.229.08:17:05.24#ibcon#read 6, iclass 13, count 0 2006.229.08:17:05.24#ibcon#end of sib2, iclass 13, count 0 2006.229.08:17:05.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:17:05.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:17:05.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:17:05.24#ibcon#*before write, iclass 13, count 0 2006.229.08:17:05.24#ibcon#enter sib2, iclass 13, count 0 2006.229.08:17:05.24#ibcon#flushed, iclass 13, count 0 2006.229.08:17:05.24#ibcon#about to write, iclass 13, count 0 2006.229.08:17:05.24#ibcon#wrote, iclass 13, count 0 2006.229.08:17:05.24#ibcon#about to read 3, iclass 13, count 0 2006.229.08:17:05.28#ibcon#read 3, iclass 13, count 0 2006.229.08:17:05.28#ibcon#about to read 4, iclass 13, count 0 2006.229.08:17:05.28#ibcon#read 4, iclass 13, count 0 2006.229.08:17:05.28#ibcon#about to read 5, iclass 13, count 0 2006.229.08:17:05.28#ibcon#read 5, iclass 13, count 0 2006.229.08:17:05.28#ibcon#about to read 6, iclass 13, count 0 2006.229.08:17:05.28#ibcon#read 6, iclass 13, count 0 2006.229.08:17:05.28#ibcon#end of sib2, iclass 13, count 0 2006.229.08:17:05.28#ibcon#*after write, iclass 13, count 0 2006.229.08:17:05.28#ibcon#*before return 0, iclass 13, count 0 2006.229.08:17:05.28#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:05.28#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:05.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:17:05.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:17:05.28$vck44/va=4,7 2006.229.08:17:05.28#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.08:17:05.28#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.08:17:05.28#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:05.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:05.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:05.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:05.34#ibcon#enter wrdev, iclass 15, count 2 2006.229.08:17:05.34#ibcon#first serial, iclass 15, count 2 2006.229.08:17:05.34#ibcon#enter sib2, iclass 15, count 2 2006.229.08:17:05.34#ibcon#flushed, iclass 15, count 2 2006.229.08:17:05.34#ibcon#about to write, iclass 15, count 2 2006.229.08:17:05.34#ibcon#wrote, iclass 15, count 2 2006.229.08:17:05.34#ibcon#about to read 3, iclass 15, count 2 2006.229.08:17:05.36#ibcon#read 3, iclass 15, count 2 2006.229.08:17:05.36#ibcon#about to read 4, iclass 15, count 2 2006.229.08:17:05.36#ibcon#read 4, iclass 15, count 2 2006.229.08:17:05.36#ibcon#about to read 5, iclass 15, count 2 2006.229.08:17:05.36#ibcon#read 5, iclass 15, count 2 2006.229.08:17:05.36#ibcon#about to read 6, iclass 15, count 2 2006.229.08:17:05.36#ibcon#read 6, iclass 15, count 2 2006.229.08:17:05.36#ibcon#end of sib2, iclass 15, count 2 2006.229.08:17:05.36#ibcon#*mode == 0, iclass 15, count 2 2006.229.08:17:05.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.08:17:05.36#ibcon#[25=AT04-07\r\n] 2006.229.08:17:05.36#ibcon#*before write, iclass 15, count 2 2006.229.08:17:05.36#ibcon#enter sib2, iclass 15, count 2 2006.229.08:17:05.36#ibcon#flushed, iclass 15, count 2 2006.229.08:17:05.36#ibcon#about to write, iclass 15, count 2 2006.229.08:17:05.36#ibcon#wrote, iclass 15, count 2 2006.229.08:17:05.36#ibcon#about to read 3, iclass 15, count 2 2006.229.08:17:05.39#ibcon#read 3, iclass 15, count 2 2006.229.08:17:05.39#ibcon#about to read 4, iclass 15, count 2 2006.229.08:17:05.39#ibcon#read 4, iclass 15, count 2 2006.229.08:17:05.39#ibcon#about to read 5, iclass 15, count 2 2006.229.08:17:05.39#ibcon#read 5, iclass 15, count 2 2006.229.08:17:05.39#ibcon#about to read 6, iclass 15, count 2 2006.229.08:17:05.39#ibcon#read 6, iclass 15, count 2 2006.229.08:17:05.39#ibcon#end of sib2, iclass 15, count 2 2006.229.08:17:05.39#ibcon#*after write, iclass 15, count 2 2006.229.08:17:05.39#ibcon#*before return 0, iclass 15, count 2 2006.229.08:17:05.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:05.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:05.39#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.08:17:05.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:05.39#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:05.51#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:05.51#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:05.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:17:05.51#ibcon#first serial, iclass 15, count 0 2006.229.08:17:05.51#ibcon#enter sib2, iclass 15, count 0 2006.229.08:17:05.51#ibcon#flushed, iclass 15, count 0 2006.229.08:17:05.51#ibcon#about to write, iclass 15, count 0 2006.229.08:17:05.51#ibcon#wrote, iclass 15, count 0 2006.229.08:17:05.51#ibcon#about to read 3, iclass 15, count 0 2006.229.08:17:05.53#ibcon#read 3, iclass 15, count 0 2006.229.08:17:05.53#ibcon#about to read 4, iclass 15, count 0 2006.229.08:17:05.53#ibcon#read 4, iclass 15, count 0 2006.229.08:17:05.53#ibcon#about to read 5, iclass 15, count 0 2006.229.08:17:05.53#ibcon#read 5, iclass 15, count 0 2006.229.08:17:05.53#ibcon#about to read 6, iclass 15, count 0 2006.229.08:17:05.53#ibcon#read 6, iclass 15, count 0 2006.229.08:17:05.53#ibcon#end of sib2, iclass 15, count 0 2006.229.08:17:05.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:17:05.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:17:05.53#ibcon#[25=USB\r\n] 2006.229.08:17:05.53#ibcon#*before write, iclass 15, count 0 2006.229.08:17:05.53#ibcon#enter sib2, iclass 15, count 0 2006.229.08:17:05.53#ibcon#flushed, iclass 15, count 0 2006.229.08:17:05.53#ibcon#about to write, iclass 15, count 0 2006.229.08:17:05.53#ibcon#wrote, iclass 15, count 0 2006.229.08:17:05.53#ibcon#about to read 3, iclass 15, count 0 2006.229.08:17:05.56#ibcon#read 3, iclass 15, count 0 2006.229.08:17:05.56#ibcon#about to read 4, iclass 15, count 0 2006.229.08:17:05.56#ibcon#read 4, iclass 15, count 0 2006.229.08:17:05.56#ibcon#about to read 5, iclass 15, count 0 2006.229.08:17:05.56#ibcon#read 5, iclass 15, count 0 2006.229.08:17:05.56#ibcon#about to read 6, iclass 15, count 0 2006.229.08:17:05.56#ibcon#read 6, iclass 15, count 0 2006.229.08:17:05.56#ibcon#end of sib2, iclass 15, count 0 2006.229.08:17:05.56#ibcon#*after write, iclass 15, count 0 2006.229.08:17:05.56#ibcon#*before return 0, iclass 15, count 0 2006.229.08:17:05.56#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:05.56#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:05.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:17:05.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:17:05.56$vck44/valo=5,734.99 2006.229.08:17:05.56#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.08:17:05.56#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.08:17:05.56#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:05.56#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:05.56#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:05.56#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:05.56#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:17:05.56#ibcon#first serial, iclass 17, count 0 2006.229.08:17:05.56#ibcon#enter sib2, iclass 17, count 0 2006.229.08:17:05.56#ibcon#flushed, iclass 17, count 0 2006.229.08:17:05.56#ibcon#about to write, iclass 17, count 0 2006.229.08:17:05.56#ibcon#wrote, iclass 17, count 0 2006.229.08:17:05.56#ibcon#about to read 3, iclass 17, count 0 2006.229.08:17:05.58#ibcon#read 3, iclass 17, count 0 2006.229.08:17:05.58#ibcon#about to read 4, iclass 17, count 0 2006.229.08:17:05.58#ibcon#read 4, iclass 17, count 0 2006.229.08:17:05.58#ibcon#about to read 5, iclass 17, count 0 2006.229.08:17:05.58#ibcon#read 5, iclass 17, count 0 2006.229.08:17:05.58#ibcon#about to read 6, iclass 17, count 0 2006.229.08:17:05.58#ibcon#read 6, iclass 17, count 0 2006.229.08:17:05.58#ibcon#end of sib2, iclass 17, count 0 2006.229.08:17:05.58#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:17:05.58#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:17:05.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:17:05.58#ibcon#*before write, iclass 17, count 0 2006.229.08:17:05.58#ibcon#enter sib2, iclass 17, count 0 2006.229.08:17:05.58#ibcon#flushed, iclass 17, count 0 2006.229.08:17:05.58#ibcon#about to write, iclass 17, count 0 2006.229.08:17:05.58#ibcon#wrote, iclass 17, count 0 2006.229.08:17:05.58#ibcon#about to read 3, iclass 17, count 0 2006.229.08:17:05.62#ibcon#read 3, iclass 17, count 0 2006.229.08:17:05.62#ibcon#about to read 4, iclass 17, count 0 2006.229.08:17:05.62#ibcon#read 4, iclass 17, count 0 2006.229.08:17:05.62#ibcon#about to read 5, iclass 17, count 0 2006.229.08:17:05.62#ibcon#read 5, iclass 17, count 0 2006.229.08:17:05.62#ibcon#about to read 6, iclass 17, count 0 2006.229.08:17:05.62#ibcon#read 6, iclass 17, count 0 2006.229.08:17:05.62#ibcon#end of sib2, iclass 17, count 0 2006.229.08:17:05.62#ibcon#*after write, iclass 17, count 0 2006.229.08:17:05.62#ibcon#*before return 0, iclass 17, count 0 2006.229.08:17:05.62#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:05.62#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:05.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:17:05.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:17:05.62$vck44/va=5,4 2006.229.08:17:05.62#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.08:17:05.62#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.08:17:05.62#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:05.62#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:05.68#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:05.68#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:05.68#ibcon#enter wrdev, iclass 19, count 2 2006.229.08:17:05.68#ibcon#first serial, iclass 19, count 2 2006.229.08:17:05.68#ibcon#enter sib2, iclass 19, count 2 2006.229.08:17:05.68#ibcon#flushed, iclass 19, count 2 2006.229.08:17:05.68#ibcon#about to write, iclass 19, count 2 2006.229.08:17:05.68#ibcon#wrote, iclass 19, count 2 2006.229.08:17:05.68#ibcon#about to read 3, iclass 19, count 2 2006.229.08:17:05.70#ibcon#read 3, iclass 19, count 2 2006.229.08:17:05.70#ibcon#about to read 4, iclass 19, count 2 2006.229.08:17:05.70#ibcon#read 4, iclass 19, count 2 2006.229.08:17:05.70#ibcon#about to read 5, iclass 19, count 2 2006.229.08:17:05.70#ibcon#read 5, iclass 19, count 2 2006.229.08:17:05.70#ibcon#about to read 6, iclass 19, count 2 2006.229.08:17:05.70#ibcon#read 6, iclass 19, count 2 2006.229.08:17:05.70#ibcon#end of sib2, iclass 19, count 2 2006.229.08:17:05.70#ibcon#*mode == 0, iclass 19, count 2 2006.229.08:17:05.70#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.08:17:05.70#ibcon#[25=AT05-04\r\n] 2006.229.08:17:05.70#ibcon#*before write, iclass 19, count 2 2006.229.08:17:05.70#ibcon#enter sib2, iclass 19, count 2 2006.229.08:17:05.70#ibcon#flushed, iclass 19, count 2 2006.229.08:17:05.70#ibcon#about to write, iclass 19, count 2 2006.229.08:17:05.70#ibcon#wrote, iclass 19, count 2 2006.229.08:17:05.70#ibcon#about to read 3, iclass 19, count 2 2006.229.08:17:05.73#ibcon#read 3, iclass 19, count 2 2006.229.08:17:05.73#ibcon#about to read 4, iclass 19, count 2 2006.229.08:17:05.73#ibcon#read 4, iclass 19, count 2 2006.229.08:17:05.73#ibcon#about to read 5, iclass 19, count 2 2006.229.08:17:05.73#ibcon#read 5, iclass 19, count 2 2006.229.08:17:05.73#ibcon#about to read 6, iclass 19, count 2 2006.229.08:17:05.73#ibcon#read 6, iclass 19, count 2 2006.229.08:17:05.73#ibcon#end of sib2, iclass 19, count 2 2006.229.08:17:05.73#ibcon#*after write, iclass 19, count 2 2006.229.08:17:05.73#ibcon#*before return 0, iclass 19, count 2 2006.229.08:17:05.73#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:05.73#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:05.73#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.08:17:05.73#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:05.73#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:05.85#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:05.85#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:05.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:17:05.85#ibcon#first serial, iclass 19, count 0 2006.229.08:17:05.85#ibcon#enter sib2, iclass 19, count 0 2006.229.08:17:05.85#ibcon#flushed, iclass 19, count 0 2006.229.08:17:05.85#ibcon#about to write, iclass 19, count 0 2006.229.08:17:05.85#ibcon#wrote, iclass 19, count 0 2006.229.08:17:05.85#ibcon#about to read 3, iclass 19, count 0 2006.229.08:17:05.87#ibcon#read 3, iclass 19, count 0 2006.229.08:17:05.87#ibcon#about to read 4, iclass 19, count 0 2006.229.08:17:05.87#ibcon#read 4, iclass 19, count 0 2006.229.08:17:05.87#ibcon#about to read 5, iclass 19, count 0 2006.229.08:17:05.87#ibcon#read 5, iclass 19, count 0 2006.229.08:17:05.87#ibcon#about to read 6, iclass 19, count 0 2006.229.08:17:05.87#ibcon#read 6, iclass 19, count 0 2006.229.08:17:05.87#ibcon#end of sib2, iclass 19, count 0 2006.229.08:17:05.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:17:05.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:17:05.87#ibcon#[25=USB\r\n] 2006.229.08:17:05.87#ibcon#*before write, iclass 19, count 0 2006.229.08:17:05.87#ibcon#enter sib2, iclass 19, count 0 2006.229.08:17:05.87#ibcon#flushed, iclass 19, count 0 2006.229.08:17:05.87#ibcon#about to write, iclass 19, count 0 2006.229.08:17:05.87#ibcon#wrote, iclass 19, count 0 2006.229.08:17:05.87#ibcon#about to read 3, iclass 19, count 0 2006.229.08:17:05.90#ibcon#read 3, iclass 19, count 0 2006.229.08:17:05.90#ibcon#about to read 4, iclass 19, count 0 2006.229.08:17:05.90#ibcon#read 4, iclass 19, count 0 2006.229.08:17:05.90#ibcon#about to read 5, iclass 19, count 0 2006.229.08:17:05.90#ibcon#read 5, iclass 19, count 0 2006.229.08:17:05.90#ibcon#about to read 6, iclass 19, count 0 2006.229.08:17:05.90#ibcon#read 6, iclass 19, count 0 2006.229.08:17:05.90#ibcon#end of sib2, iclass 19, count 0 2006.229.08:17:05.90#ibcon#*after write, iclass 19, count 0 2006.229.08:17:05.90#ibcon#*before return 0, iclass 19, count 0 2006.229.08:17:05.90#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:05.90#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:05.90#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:17:05.90#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:17:05.90$vck44/valo=6,814.99 2006.229.08:17:05.90#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.08:17:05.90#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.08:17:05.90#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:05.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:05.90#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:05.90#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:05.90#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:17:05.90#ibcon#first serial, iclass 21, count 0 2006.229.08:17:05.90#ibcon#enter sib2, iclass 21, count 0 2006.229.08:17:05.90#ibcon#flushed, iclass 21, count 0 2006.229.08:17:05.90#ibcon#about to write, iclass 21, count 0 2006.229.08:17:05.90#ibcon#wrote, iclass 21, count 0 2006.229.08:17:05.90#ibcon#about to read 3, iclass 21, count 0 2006.229.08:17:05.92#ibcon#read 3, iclass 21, count 0 2006.229.08:17:05.92#ibcon#about to read 4, iclass 21, count 0 2006.229.08:17:05.92#ibcon#read 4, iclass 21, count 0 2006.229.08:17:05.92#ibcon#about to read 5, iclass 21, count 0 2006.229.08:17:05.92#ibcon#read 5, iclass 21, count 0 2006.229.08:17:05.92#ibcon#about to read 6, iclass 21, count 0 2006.229.08:17:05.92#ibcon#read 6, iclass 21, count 0 2006.229.08:17:05.92#ibcon#end of sib2, iclass 21, count 0 2006.229.08:17:05.92#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:17:05.92#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:17:05.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:17:05.92#ibcon#*before write, iclass 21, count 0 2006.229.08:17:05.92#ibcon#enter sib2, iclass 21, count 0 2006.229.08:17:05.92#ibcon#flushed, iclass 21, count 0 2006.229.08:17:05.92#ibcon#about to write, iclass 21, count 0 2006.229.08:17:05.92#ibcon#wrote, iclass 21, count 0 2006.229.08:17:05.92#ibcon#about to read 3, iclass 21, count 0 2006.229.08:17:05.96#ibcon#read 3, iclass 21, count 0 2006.229.08:17:05.96#ibcon#about to read 4, iclass 21, count 0 2006.229.08:17:05.96#ibcon#read 4, iclass 21, count 0 2006.229.08:17:05.96#ibcon#about to read 5, iclass 21, count 0 2006.229.08:17:05.96#ibcon#read 5, iclass 21, count 0 2006.229.08:17:05.96#ibcon#about to read 6, iclass 21, count 0 2006.229.08:17:05.96#ibcon#read 6, iclass 21, count 0 2006.229.08:17:05.96#ibcon#end of sib2, iclass 21, count 0 2006.229.08:17:05.96#ibcon#*after write, iclass 21, count 0 2006.229.08:17:05.96#ibcon#*before return 0, iclass 21, count 0 2006.229.08:17:05.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:05.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:05.96#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:17:05.96#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:17:05.96$vck44/va=6,4 2006.229.08:17:05.96#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.08:17:05.96#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.08:17:05.96#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:05.96#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:06.02#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:06.02#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:06.02#ibcon#enter wrdev, iclass 23, count 2 2006.229.08:17:06.02#ibcon#first serial, iclass 23, count 2 2006.229.08:17:06.02#ibcon#enter sib2, iclass 23, count 2 2006.229.08:17:06.02#ibcon#flushed, iclass 23, count 2 2006.229.08:17:06.02#ibcon#about to write, iclass 23, count 2 2006.229.08:17:06.02#ibcon#wrote, iclass 23, count 2 2006.229.08:17:06.02#ibcon#about to read 3, iclass 23, count 2 2006.229.08:17:06.04#ibcon#read 3, iclass 23, count 2 2006.229.08:17:06.04#ibcon#about to read 4, iclass 23, count 2 2006.229.08:17:06.04#ibcon#read 4, iclass 23, count 2 2006.229.08:17:06.04#ibcon#about to read 5, iclass 23, count 2 2006.229.08:17:06.04#ibcon#read 5, iclass 23, count 2 2006.229.08:17:06.04#ibcon#about to read 6, iclass 23, count 2 2006.229.08:17:06.04#ibcon#read 6, iclass 23, count 2 2006.229.08:17:06.04#ibcon#end of sib2, iclass 23, count 2 2006.229.08:17:06.04#ibcon#*mode == 0, iclass 23, count 2 2006.229.08:17:06.04#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.08:17:06.04#ibcon#[25=AT06-04\r\n] 2006.229.08:17:06.04#ibcon#*before write, iclass 23, count 2 2006.229.08:17:06.04#ibcon#enter sib2, iclass 23, count 2 2006.229.08:17:06.04#ibcon#flushed, iclass 23, count 2 2006.229.08:17:06.04#ibcon#about to write, iclass 23, count 2 2006.229.08:17:06.04#ibcon#wrote, iclass 23, count 2 2006.229.08:17:06.04#ibcon#about to read 3, iclass 23, count 2 2006.229.08:17:06.07#ibcon#read 3, iclass 23, count 2 2006.229.08:17:06.07#ibcon#about to read 4, iclass 23, count 2 2006.229.08:17:06.07#ibcon#read 4, iclass 23, count 2 2006.229.08:17:06.07#ibcon#about to read 5, iclass 23, count 2 2006.229.08:17:06.07#ibcon#read 5, iclass 23, count 2 2006.229.08:17:06.07#ibcon#about to read 6, iclass 23, count 2 2006.229.08:17:06.07#ibcon#read 6, iclass 23, count 2 2006.229.08:17:06.07#ibcon#end of sib2, iclass 23, count 2 2006.229.08:17:06.07#ibcon#*after write, iclass 23, count 2 2006.229.08:17:06.07#ibcon#*before return 0, iclass 23, count 2 2006.229.08:17:06.07#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:06.07#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:06.07#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.08:17:06.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:06.07#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:06.19#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:06.19#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:06.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:17:06.19#ibcon#first serial, iclass 23, count 0 2006.229.08:17:06.19#ibcon#enter sib2, iclass 23, count 0 2006.229.08:17:06.19#ibcon#flushed, iclass 23, count 0 2006.229.08:17:06.19#ibcon#about to write, iclass 23, count 0 2006.229.08:17:06.19#ibcon#wrote, iclass 23, count 0 2006.229.08:17:06.19#ibcon#about to read 3, iclass 23, count 0 2006.229.08:17:06.21#ibcon#read 3, iclass 23, count 0 2006.229.08:17:06.21#ibcon#about to read 4, iclass 23, count 0 2006.229.08:17:06.21#ibcon#read 4, iclass 23, count 0 2006.229.08:17:06.21#ibcon#about to read 5, iclass 23, count 0 2006.229.08:17:06.21#ibcon#read 5, iclass 23, count 0 2006.229.08:17:06.21#ibcon#about to read 6, iclass 23, count 0 2006.229.08:17:06.21#ibcon#read 6, iclass 23, count 0 2006.229.08:17:06.21#ibcon#end of sib2, iclass 23, count 0 2006.229.08:17:06.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:17:06.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:17:06.21#ibcon#[25=USB\r\n] 2006.229.08:17:06.21#ibcon#*before write, iclass 23, count 0 2006.229.08:17:06.21#ibcon#enter sib2, iclass 23, count 0 2006.229.08:17:06.21#ibcon#flushed, iclass 23, count 0 2006.229.08:17:06.21#ibcon#about to write, iclass 23, count 0 2006.229.08:17:06.21#ibcon#wrote, iclass 23, count 0 2006.229.08:17:06.21#ibcon#about to read 3, iclass 23, count 0 2006.229.08:17:06.24#ibcon#read 3, iclass 23, count 0 2006.229.08:17:06.24#ibcon#about to read 4, iclass 23, count 0 2006.229.08:17:06.24#ibcon#read 4, iclass 23, count 0 2006.229.08:17:06.24#ibcon#about to read 5, iclass 23, count 0 2006.229.08:17:06.24#ibcon#read 5, iclass 23, count 0 2006.229.08:17:06.24#ibcon#about to read 6, iclass 23, count 0 2006.229.08:17:06.24#ibcon#read 6, iclass 23, count 0 2006.229.08:17:06.24#ibcon#end of sib2, iclass 23, count 0 2006.229.08:17:06.24#ibcon#*after write, iclass 23, count 0 2006.229.08:17:06.24#ibcon#*before return 0, iclass 23, count 0 2006.229.08:17:06.24#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:06.24#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:06.24#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:17:06.24#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:17:06.24$vck44/valo=7,864.99 2006.229.08:17:06.24#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.08:17:06.24#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.08:17:06.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:06.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:06.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:06.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:06.24#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:17:06.24#ibcon#first serial, iclass 25, count 0 2006.229.08:17:06.24#ibcon#enter sib2, iclass 25, count 0 2006.229.08:17:06.24#ibcon#flushed, iclass 25, count 0 2006.229.08:17:06.24#ibcon#about to write, iclass 25, count 0 2006.229.08:17:06.24#ibcon#wrote, iclass 25, count 0 2006.229.08:17:06.24#ibcon#about to read 3, iclass 25, count 0 2006.229.08:17:06.26#ibcon#read 3, iclass 25, count 0 2006.229.08:17:06.26#ibcon#about to read 4, iclass 25, count 0 2006.229.08:17:06.26#ibcon#read 4, iclass 25, count 0 2006.229.08:17:06.26#ibcon#about to read 5, iclass 25, count 0 2006.229.08:17:06.26#ibcon#read 5, iclass 25, count 0 2006.229.08:17:06.26#ibcon#about to read 6, iclass 25, count 0 2006.229.08:17:06.26#ibcon#read 6, iclass 25, count 0 2006.229.08:17:06.26#ibcon#end of sib2, iclass 25, count 0 2006.229.08:17:06.26#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:17:06.26#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:17:06.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:17:06.26#ibcon#*before write, iclass 25, count 0 2006.229.08:17:06.26#ibcon#enter sib2, iclass 25, count 0 2006.229.08:17:06.26#ibcon#flushed, iclass 25, count 0 2006.229.08:17:06.26#ibcon#about to write, iclass 25, count 0 2006.229.08:17:06.26#ibcon#wrote, iclass 25, count 0 2006.229.08:17:06.26#ibcon#about to read 3, iclass 25, count 0 2006.229.08:17:06.30#ibcon#read 3, iclass 25, count 0 2006.229.08:17:06.30#ibcon#about to read 4, iclass 25, count 0 2006.229.08:17:06.30#ibcon#read 4, iclass 25, count 0 2006.229.08:17:06.30#ibcon#about to read 5, iclass 25, count 0 2006.229.08:17:06.30#ibcon#read 5, iclass 25, count 0 2006.229.08:17:06.30#ibcon#about to read 6, iclass 25, count 0 2006.229.08:17:06.30#ibcon#read 6, iclass 25, count 0 2006.229.08:17:06.30#ibcon#end of sib2, iclass 25, count 0 2006.229.08:17:06.30#ibcon#*after write, iclass 25, count 0 2006.229.08:17:06.30#ibcon#*before return 0, iclass 25, count 0 2006.229.08:17:06.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:06.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:06.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:17:06.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:17:06.30$vck44/va=7,5 2006.229.08:17:06.30#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.08:17:06.30#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.08:17:06.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:06.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:06.36#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:06.36#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:06.36#ibcon#enter wrdev, iclass 27, count 2 2006.229.08:17:06.36#ibcon#first serial, iclass 27, count 2 2006.229.08:17:06.36#ibcon#enter sib2, iclass 27, count 2 2006.229.08:17:06.36#ibcon#flushed, iclass 27, count 2 2006.229.08:17:06.36#ibcon#about to write, iclass 27, count 2 2006.229.08:17:06.36#ibcon#wrote, iclass 27, count 2 2006.229.08:17:06.36#ibcon#about to read 3, iclass 27, count 2 2006.229.08:17:06.38#ibcon#read 3, iclass 27, count 2 2006.229.08:17:06.38#ibcon#about to read 4, iclass 27, count 2 2006.229.08:17:06.38#ibcon#read 4, iclass 27, count 2 2006.229.08:17:06.38#ibcon#about to read 5, iclass 27, count 2 2006.229.08:17:06.38#ibcon#read 5, iclass 27, count 2 2006.229.08:17:06.38#ibcon#about to read 6, iclass 27, count 2 2006.229.08:17:06.38#ibcon#read 6, iclass 27, count 2 2006.229.08:17:06.38#ibcon#end of sib2, iclass 27, count 2 2006.229.08:17:06.38#ibcon#*mode == 0, iclass 27, count 2 2006.229.08:17:06.38#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.08:17:06.38#ibcon#[25=AT07-05\r\n] 2006.229.08:17:06.38#ibcon#*before write, iclass 27, count 2 2006.229.08:17:06.38#ibcon#enter sib2, iclass 27, count 2 2006.229.08:17:06.38#ibcon#flushed, iclass 27, count 2 2006.229.08:17:06.38#ibcon#about to write, iclass 27, count 2 2006.229.08:17:06.38#ibcon#wrote, iclass 27, count 2 2006.229.08:17:06.38#ibcon#about to read 3, iclass 27, count 2 2006.229.08:17:06.41#ibcon#read 3, iclass 27, count 2 2006.229.08:17:06.41#ibcon#about to read 4, iclass 27, count 2 2006.229.08:17:06.41#ibcon#read 4, iclass 27, count 2 2006.229.08:17:06.41#ibcon#about to read 5, iclass 27, count 2 2006.229.08:17:06.41#ibcon#read 5, iclass 27, count 2 2006.229.08:17:06.41#ibcon#about to read 6, iclass 27, count 2 2006.229.08:17:06.41#ibcon#read 6, iclass 27, count 2 2006.229.08:17:06.41#ibcon#end of sib2, iclass 27, count 2 2006.229.08:17:06.41#ibcon#*after write, iclass 27, count 2 2006.229.08:17:06.41#ibcon#*before return 0, iclass 27, count 2 2006.229.08:17:06.41#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:06.41#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:06.41#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.08:17:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:06.41#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:06.53#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:06.53#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:06.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.08:17:06.53#ibcon#first serial, iclass 27, count 0 2006.229.08:17:06.53#ibcon#enter sib2, iclass 27, count 0 2006.229.08:17:06.53#ibcon#flushed, iclass 27, count 0 2006.229.08:17:06.53#ibcon#about to write, iclass 27, count 0 2006.229.08:17:06.53#ibcon#wrote, iclass 27, count 0 2006.229.08:17:06.53#ibcon#about to read 3, iclass 27, count 0 2006.229.08:17:06.55#ibcon#read 3, iclass 27, count 0 2006.229.08:17:06.55#ibcon#about to read 4, iclass 27, count 0 2006.229.08:17:06.55#ibcon#read 4, iclass 27, count 0 2006.229.08:17:06.55#ibcon#about to read 5, iclass 27, count 0 2006.229.08:17:06.55#ibcon#read 5, iclass 27, count 0 2006.229.08:17:06.55#ibcon#about to read 6, iclass 27, count 0 2006.229.08:17:06.55#ibcon#read 6, iclass 27, count 0 2006.229.08:17:06.55#ibcon#end of sib2, iclass 27, count 0 2006.229.08:17:06.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.08:17:06.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.08:17:06.55#ibcon#[25=USB\r\n] 2006.229.08:17:06.55#ibcon#*before write, iclass 27, count 0 2006.229.08:17:06.55#ibcon#enter sib2, iclass 27, count 0 2006.229.08:17:06.55#ibcon#flushed, iclass 27, count 0 2006.229.08:17:06.55#ibcon#about to write, iclass 27, count 0 2006.229.08:17:06.55#ibcon#wrote, iclass 27, count 0 2006.229.08:17:06.55#ibcon#about to read 3, iclass 27, count 0 2006.229.08:17:06.58#ibcon#read 3, iclass 27, count 0 2006.229.08:17:06.58#ibcon#about to read 4, iclass 27, count 0 2006.229.08:17:06.58#ibcon#read 4, iclass 27, count 0 2006.229.08:17:06.58#ibcon#about to read 5, iclass 27, count 0 2006.229.08:17:06.58#ibcon#read 5, iclass 27, count 0 2006.229.08:17:06.58#ibcon#about to read 6, iclass 27, count 0 2006.229.08:17:06.58#ibcon#read 6, iclass 27, count 0 2006.229.08:17:06.58#ibcon#end of sib2, iclass 27, count 0 2006.229.08:17:06.58#ibcon#*after write, iclass 27, count 0 2006.229.08:17:06.58#ibcon#*before return 0, iclass 27, count 0 2006.229.08:17:06.58#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:06.58#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:06.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.08:17:06.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.08:17:06.58$vck44/valo=8,884.99 2006.229.08:17:06.58#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.08:17:06.58#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.08:17:06.58#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:06.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:06.58#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:06.58#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:06.58#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:17:06.58#ibcon#first serial, iclass 29, count 0 2006.229.08:17:06.58#ibcon#enter sib2, iclass 29, count 0 2006.229.08:17:06.58#ibcon#flushed, iclass 29, count 0 2006.229.08:17:06.58#ibcon#about to write, iclass 29, count 0 2006.229.08:17:06.58#ibcon#wrote, iclass 29, count 0 2006.229.08:17:06.58#ibcon#about to read 3, iclass 29, count 0 2006.229.08:17:06.60#ibcon#read 3, iclass 29, count 0 2006.229.08:17:06.60#ibcon#about to read 4, iclass 29, count 0 2006.229.08:17:06.60#ibcon#read 4, iclass 29, count 0 2006.229.08:17:06.60#ibcon#about to read 5, iclass 29, count 0 2006.229.08:17:06.60#ibcon#read 5, iclass 29, count 0 2006.229.08:17:06.60#ibcon#about to read 6, iclass 29, count 0 2006.229.08:17:06.60#ibcon#read 6, iclass 29, count 0 2006.229.08:17:06.60#ibcon#end of sib2, iclass 29, count 0 2006.229.08:17:06.60#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:17:06.60#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:17:06.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:17:06.60#ibcon#*before write, iclass 29, count 0 2006.229.08:17:06.60#ibcon#enter sib2, iclass 29, count 0 2006.229.08:17:06.60#ibcon#flushed, iclass 29, count 0 2006.229.08:17:06.60#ibcon#about to write, iclass 29, count 0 2006.229.08:17:06.60#ibcon#wrote, iclass 29, count 0 2006.229.08:17:06.60#ibcon#about to read 3, iclass 29, count 0 2006.229.08:17:06.64#ibcon#read 3, iclass 29, count 0 2006.229.08:17:06.64#ibcon#about to read 4, iclass 29, count 0 2006.229.08:17:06.64#ibcon#read 4, iclass 29, count 0 2006.229.08:17:06.64#ibcon#about to read 5, iclass 29, count 0 2006.229.08:17:06.64#ibcon#read 5, iclass 29, count 0 2006.229.08:17:06.64#ibcon#about to read 6, iclass 29, count 0 2006.229.08:17:06.64#ibcon#read 6, iclass 29, count 0 2006.229.08:17:06.64#ibcon#end of sib2, iclass 29, count 0 2006.229.08:17:06.64#ibcon#*after write, iclass 29, count 0 2006.229.08:17:06.64#ibcon#*before return 0, iclass 29, count 0 2006.229.08:17:06.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:06.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:06.64#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:17:06.64#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:17:06.64$vck44/va=8,6 2006.229.08:17:06.64#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.08:17:06.64#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.08:17:06.64#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:06.64#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:17:06.70#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:17:06.70#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:17:06.70#ibcon#enter wrdev, iclass 31, count 2 2006.229.08:17:06.70#ibcon#first serial, iclass 31, count 2 2006.229.08:17:06.70#ibcon#enter sib2, iclass 31, count 2 2006.229.08:17:06.70#ibcon#flushed, iclass 31, count 2 2006.229.08:17:06.70#ibcon#about to write, iclass 31, count 2 2006.229.08:17:06.70#ibcon#wrote, iclass 31, count 2 2006.229.08:17:06.70#ibcon#about to read 3, iclass 31, count 2 2006.229.08:17:06.72#ibcon#read 3, iclass 31, count 2 2006.229.08:17:06.72#ibcon#about to read 4, iclass 31, count 2 2006.229.08:17:06.72#ibcon#read 4, iclass 31, count 2 2006.229.08:17:06.72#ibcon#about to read 5, iclass 31, count 2 2006.229.08:17:06.72#ibcon#read 5, iclass 31, count 2 2006.229.08:17:06.72#ibcon#about to read 6, iclass 31, count 2 2006.229.08:17:06.72#ibcon#read 6, iclass 31, count 2 2006.229.08:17:06.72#ibcon#end of sib2, iclass 31, count 2 2006.229.08:17:06.72#ibcon#*mode == 0, iclass 31, count 2 2006.229.08:17:06.72#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.08:17:06.72#ibcon#[25=AT08-06\r\n] 2006.229.08:17:06.72#ibcon#*before write, iclass 31, count 2 2006.229.08:17:06.72#ibcon#enter sib2, iclass 31, count 2 2006.229.08:17:06.72#ibcon#flushed, iclass 31, count 2 2006.229.08:17:06.72#ibcon#about to write, iclass 31, count 2 2006.229.08:17:06.72#ibcon#wrote, iclass 31, count 2 2006.229.08:17:06.72#ibcon#about to read 3, iclass 31, count 2 2006.229.08:17:06.75#ibcon#read 3, iclass 31, count 2 2006.229.08:17:06.75#ibcon#about to read 4, iclass 31, count 2 2006.229.08:17:06.75#ibcon#read 4, iclass 31, count 2 2006.229.08:17:06.75#ibcon#about to read 5, iclass 31, count 2 2006.229.08:17:06.75#ibcon#read 5, iclass 31, count 2 2006.229.08:17:06.75#ibcon#about to read 6, iclass 31, count 2 2006.229.08:17:06.75#ibcon#read 6, iclass 31, count 2 2006.229.08:17:06.75#ibcon#end of sib2, iclass 31, count 2 2006.229.08:17:06.75#ibcon#*after write, iclass 31, count 2 2006.229.08:17:06.75#ibcon#*before return 0, iclass 31, count 2 2006.229.08:17:06.75#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:17:06.75#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:17:06.75#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.08:17:06.75#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:06.75#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:17:06.87#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:17:06.87#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:17:06.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:17:06.87#ibcon#first serial, iclass 31, count 0 2006.229.08:17:06.87#ibcon#enter sib2, iclass 31, count 0 2006.229.08:17:06.87#ibcon#flushed, iclass 31, count 0 2006.229.08:17:06.87#ibcon#about to write, iclass 31, count 0 2006.229.08:17:06.87#ibcon#wrote, iclass 31, count 0 2006.229.08:17:06.87#ibcon#about to read 3, iclass 31, count 0 2006.229.08:17:06.89#ibcon#read 3, iclass 31, count 0 2006.229.08:17:06.89#ibcon#about to read 4, iclass 31, count 0 2006.229.08:17:06.89#ibcon#read 4, iclass 31, count 0 2006.229.08:17:06.89#ibcon#about to read 5, iclass 31, count 0 2006.229.08:17:06.89#ibcon#read 5, iclass 31, count 0 2006.229.08:17:06.89#ibcon#about to read 6, iclass 31, count 0 2006.229.08:17:06.89#ibcon#read 6, iclass 31, count 0 2006.229.08:17:06.89#ibcon#end of sib2, iclass 31, count 0 2006.229.08:17:06.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:17:06.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:17:06.89#ibcon#[25=USB\r\n] 2006.229.08:17:06.89#ibcon#*before write, iclass 31, count 0 2006.229.08:17:06.89#ibcon#enter sib2, iclass 31, count 0 2006.229.08:17:06.89#ibcon#flushed, iclass 31, count 0 2006.229.08:17:06.89#ibcon#about to write, iclass 31, count 0 2006.229.08:17:06.89#ibcon#wrote, iclass 31, count 0 2006.229.08:17:06.89#ibcon#about to read 3, iclass 31, count 0 2006.229.08:17:06.92#ibcon#read 3, iclass 31, count 0 2006.229.08:17:06.92#ibcon#about to read 4, iclass 31, count 0 2006.229.08:17:06.92#ibcon#read 4, iclass 31, count 0 2006.229.08:17:06.92#ibcon#about to read 5, iclass 31, count 0 2006.229.08:17:06.92#ibcon#read 5, iclass 31, count 0 2006.229.08:17:06.92#ibcon#about to read 6, iclass 31, count 0 2006.229.08:17:06.92#ibcon#read 6, iclass 31, count 0 2006.229.08:17:06.92#ibcon#end of sib2, iclass 31, count 0 2006.229.08:17:06.92#ibcon#*after write, iclass 31, count 0 2006.229.08:17:06.92#ibcon#*before return 0, iclass 31, count 0 2006.229.08:17:06.92#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:17:06.92#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:17:06.92#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:17:06.92#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:17:06.92$vck44/vblo=1,629.99 2006.229.08:17:06.92#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.08:17:06.92#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.08:17:06.92#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:06.92#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:17:06.92#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:17:06.92#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:17:06.92#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:17:06.92#ibcon#first serial, iclass 33, count 0 2006.229.08:17:06.92#ibcon#enter sib2, iclass 33, count 0 2006.229.08:17:06.92#ibcon#flushed, iclass 33, count 0 2006.229.08:17:06.92#ibcon#about to write, iclass 33, count 0 2006.229.08:17:06.92#ibcon#wrote, iclass 33, count 0 2006.229.08:17:06.92#ibcon#about to read 3, iclass 33, count 0 2006.229.08:17:06.94#ibcon#read 3, iclass 33, count 0 2006.229.08:17:06.94#ibcon#about to read 4, iclass 33, count 0 2006.229.08:17:06.94#ibcon#read 4, iclass 33, count 0 2006.229.08:17:06.94#ibcon#about to read 5, iclass 33, count 0 2006.229.08:17:06.94#ibcon#read 5, iclass 33, count 0 2006.229.08:17:06.94#ibcon#about to read 6, iclass 33, count 0 2006.229.08:17:06.94#ibcon#read 6, iclass 33, count 0 2006.229.08:17:06.94#ibcon#end of sib2, iclass 33, count 0 2006.229.08:17:06.94#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:17:06.94#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:17:06.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:17:06.94#ibcon#*before write, iclass 33, count 0 2006.229.08:17:06.94#ibcon#enter sib2, iclass 33, count 0 2006.229.08:17:06.94#ibcon#flushed, iclass 33, count 0 2006.229.08:17:06.94#ibcon#about to write, iclass 33, count 0 2006.229.08:17:06.94#ibcon#wrote, iclass 33, count 0 2006.229.08:17:06.94#ibcon#about to read 3, iclass 33, count 0 2006.229.08:17:06.98#ibcon#read 3, iclass 33, count 0 2006.229.08:17:06.98#ibcon#about to read 4, iclass 33, count 0 2006.229.08:17:06.98#ibcon#read 4, iclass 33, count 0 2006.229.08:17:06.98#ibcon#about to read 5, iclass 33, count 0 2006.229.08:17:06.98#ibcon#read 5, iclass 33, count 0 2006.229.08:17:06.98#ibcon#about to read 6, iclass 33, count 0 2006.229.08:17:06.98#ibcon#read 6, iclass 33, count 0 2006.229.08:17:06.98#ibcon#end of sib2, iclass 33, count 0 2006.229.08:17:06.98#ibcon#*after write, iclass 33, count 0 2006.229.08:17:06.98#ibcon#*before return 0, iclass 33, count 0 2006.229.08:17:06.98#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:17:06.98#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:17:06.98#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:17:06.98#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:17:06.98$vck44/vb=1,4 2006.229.08:17:06.98#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.08:17:06.98#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.08:17:06.98#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:06.98#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:17:06.98#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:17:06.98#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:17:06.98#ibcon#enter wrdev, iclass 35, count 2 2006.229.08:17:06.98#ibcon#first serial, iclass 35, count 2 2006.229.08:17:06.98#ibcon#enter sib2, iclass 35, count 2 2006.229.08:17:06.98#ibcon#flushed, iclass 35, count 2 2006.229.08:17:06.98#ibcon#about to write, iclass 35, count 2 2006.229.08:17:06.98#ibcon#wrote, iclass 35, count 2 2006.229.08:17:06.98#ibcon#about to read 3, iclass 35, count 2 2006.229.08:17:07.00#ibcon#read 3, iclass 35, count 2 2006.229.08:17:07.00#ibcon#about to read 4, iclass 35, count 2 2006.229.08:17:07.00#ibcon#read 4, iclass 35, count 2 2006.229.08:17:07.00#ibcon#about to read 5, iclass 35, count 2 2006.229.08:17:07.00#ibcon#read 5, iclass 35, count 2 2006.229.08:17:07.00#ibcon#about to read 6, iclass 35, count 2 2006.229.08:17:07.00#ibcon#read 6, iclass 35, count 2 2006.229.08:17:07.00#ibcon#end of sib2, iclass 35, count 2 2006.229.08:17:07.00#ibcon#*mode == 0, iclass 35, count 2 2006.229.08:17:07.00#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.08:17:07.00#ibcon#[27=AT01-04\r\n] 2006.229.08:17:07.00#ibcon#*before write, iclass 35, count 2 2006.229.08:17:07.00#ibcon#enter sib2, iclass 35, count 2 2006.229.08:17:07.00#ibcon#flushed, iclass 35, count 2 2006.229.08:17:07.00#ibcon#about to write, iclass 35, count 2 2006.229.08:17:07.00#ibcon#wrote, iclass 35, count 2 2006.229.08:17:07.00#ibcon#about to read 3, iclass 35, count 2 2006.229.08:17:07.03#ibcon#read 3, iclass 35, count 2 2006.229.08:17:07.03#ibcon#about to read 4, iclass 35, count 2 2006.229.08:17:07.03#ibcon#read 4, iclass 35, count 2 2006.229.08:17:07.03#ibcon#about to read 5, iclass 35, count 2 2006.229.08:17:07.03#ibcon#read 5, iclass 35, count 2 2006.229.08:17:07.03#ibcon#about to read 6, iclass 35, count 2 2006.229.08:17:07.03#ibcon#read 6, iclass 35, count 2 2006.229.08:17:07.03#ibcon#end of sib2, iclass 35, count 2 2006.229.08:17:07.03#ibcon#*after write, iclass 35, count 2 2006.229.08:17:07.03#ibcon#*before return 0, iclass 35, count 2 2006.229.08:17:07.03#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:17:07.03#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:17:07.03#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.08:17:07.03#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:07.03#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:17:07.15#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:17:07.15#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:17:07.15#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:17:07.15#ibcon#first serial, iclass 35, count 0 2006.229.08:17:07.15#ibcon#enter sib2, iclass 35, count 0 2006.229.08:17:07.15#ibcon#flushed, iclass 35, count 0 2006.229.08:17:07.15#ibcon#about to write, iclass 35, count 0 2006.229.08:17:07.15#ibcon#wrote, iclass 35, count 0 2006.229.08:17:07.15#ibcon#about to read 3, iclass 35, count 0 2006.229.08:17:07.17#ibcon#read 3, iclass 35, count 0 2006.229.08:17:07.17#ibcon#about to read 4, iclass 35, count 0 2006.229.08:17:07.17#ibcon#read 4, iclass 35, count 0 2006.229.08:17:07.17#ibcon#about to read 5, iclass 35, count 0 2006.229.08:17:07.17#ibcon#read 5, iclass 35, count 0 2006.229.08:17:07.17#ibcon#about to read 6, iclass 35, count 0 2006.229.08:17:07.17#ibcon#read 6, iclass 35, count 0 2006.229.08:17:07.17#ibcon#end of sib2, iclass 35, count 0 2006.229.08:17:07.17#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:17:07.17#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:17:07.17#ibcon#[27=USB\r\n] 2006.229.08:17:07.17#ibcon#*before write, iclass 35, count 0 2006.229.08:17:07.17#ibcon#enter sib2, iclass 35, count 0 2006.229.08:17:07.17#ibcon#flushed, iclass 35, count 0 2006.229.08:17:07.17#ibcon#about to write, iclass 35, count 0 2006.229.08:17:07.17#ibcon#wrote, iclass 35, count 0 2006.229.08:17:07.17#ibcon#about to read 3, iclass 35, count 0 2006.229.08:17:07.20#ibcon#read 3, iclass 35, count 0 2006.229.08:17:07.20#ibcon#about to read 4, iclass 35, count 0 2006.229.08:17:07.20#ibcon#read 4, iclass 35, count 0 2006.229.08:17:07.20#ibcon#about to read 5, iclass 35, count 0 2006.229.08:17:07.20#ibcon#read 5, iclass 35, count 0 2006.229.08:17:07.20#ibcon#about to read 6, iclass 35, count 0 2006.229.08:17:07.20#ibcon#read 6, iclass 35, count 0 2006.229.08:17:07.20#ibcon#end of sib2, iclass 35, count 0 2006.229.08:17:07.20#ibcon#*after write, iclass 35, count 0 2006.229.08:17:07.20#ibcon#*before return 0, iclass 35, count 0 2006.229.08:17:07.20#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:17:07.20#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:17:07.20#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:17:07.20#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:17:07.20$vck44/vblo=2,634.99 2006.229.08:17:07.20#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.08:17:07.20#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.08:17:07.20#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:07.20#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:07.20#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:07.20#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:07.20#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:17:07.20#ibcon#first serial, iclass 37, count 0 2006.229.08:17:07.20#ibcon#enter sib2, iclass 37, count 0 2006.229.08:17:07.20#ibcon#flushed, iclass 37, count 0 2006.229.08:17:07.20#ibcon#about to write, iclass 37, count 0 2006.229.08:17:07.20#ibcon#wrote, iclass 37, count 0 2006.229.08:17:07.20#ibcon#about to read 3, iclass 37, count 0 2006.229.08:17:07.22#ibcon#read 3, iclass 37, count 0 2006.229.08:17:07.22#ibcon#about to read 4, iclass 37, count 0 2006.229.08:17:07.22#ibcon#read 4, iclass 37, count 0 2006.229.08:17:07.22#ibcon#about to read 5, iclass 37, count 0 2006.229.08:17:07.22#ibcon#read 5, iclass 37, count 0 2006.229.08:17:07.22#ibcon#about to read 6, iclass 37, count 0 2006.229.08:17:07.22#ibcon#read 6, iclass 37, count 0 2006.229.08:17:07.22#ibcon#end of sib2, iclass 37, count 0 2006.229.08:17:07.22#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:17:07.22#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:17:07.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:17:07.22#ibcon#*before write, iclass 37, count 0 2006.229.08:17:07.22#ibcon#enter sib2, iclass 37, count 0 2006.229.08:17:07.22#ibcon#flushed, iclass 37, count 0 2006.229.08:17:07.22#ibcon#about to write, iclass 37, count 0 2006.229.08:17:07.22#ibcon#wrote, iclass 37, count 0 2006.229.08:17:07.22#ibcon#about to read 3, iclass 37, count 0 2006.229.08:17:07.26#ibcon#read 3, iclass 37, count 0 2006.229.08:17:07.26#ibcon#about to read 4, iclass 37, count 0 2006.229.08:17:07.26#ibcon#read 4, iclass 37, count 0 2006.229.08:17:07.26#ibcon#about to read 5, iclass 37, count 0 2006.229.08:17:07.26#ibcon#read 5, iclass 37, count 0 2006.229.08:17:07.26#ibcon#about to read 6, iclass 37, count 0 2006.229.08:17:07.26#ibcon#read 6, iclass 37, count 0 2006.229.08:17:07.26#ibcon#end of sib2, iclass 37, count 0 2006.229.08:17:07.26#ibcon#*after write, iclass 37, count 0 2006.229.08:17:07.26#ibcon#*before return 0, iclass 37, count 0 2006.229.08:17:07.26#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:07.26#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:17:07.26#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:17:07.26#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:17:07.26$vck44/vb=2,4 2006.229.08:17:07.26#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.08:17:07.26#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.08:17:07.26#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:07.26#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:07.32#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:07.32#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:07.32#ibcon#enter wrdev, iclass 39, count 2 2006.229.08:17:07.32#ibcon#first serial, iclass 39, count 2 2006.229.08:17:07.32#ibcon#enter sib2, iclass 39, count 2 2006.229.08:17:07.32#ibcon#flushed, iclass 39, count 2 2006.229.08:17:07.32#ibcon#about to write, iclass 39, count 2 2006.229.08:17:07.32#ibcon#wrote, iclass 39, count 2 2006.229.08:17:07.32#ibcon#about to read 3, iclass 39, count 2 2006.229.08:17:07.34#ibcon#read 3, iclass 39, count 2 2006.229.08:17:07.34#ibcon#about to read 4, iclass 39, count 2 2006.229.08:17:07.34#ibcon#read 4, iclass 39, count 2 2006.229.08:17:07.34#ibcon#about to read 5, iclass 39, count 2 2006.229.08:17:07.34#ibcon#read 5, iclass 39, count 2 2006.229.08:17:07.34#ibcon#about to read 6, iclass 39, count 2 2006.229.08:17:07.34#ibcon#read 6, iclass 39, count 2 2006.229.08:17:07.34#ibcon#end of sib2, iclass 39, count 2 2006.229.08:17:07.34#ibcon#*mode == 0, iclass 39, count 2 2006.229.08:17:07.34#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.08:17:07.34#ibcon#[27=AT02-04\r\n] 2006.229.08:17:07.34#ibcon#*before write, iclass 39, count 2 2006.229.08:17:07.34#ibcon#enter sib2, iclass 39, count 2 2006.229.08:17:07.34#ibcon#flushed, iclass 39, count 2 2006.229.08:17:07.34#ibcon#about to write, iclass 39, count 2 2006.229.08:17:07.34#ibcon#wrote, iclass 39, count 2 2006.229.08:17:07.34#ibcon#about to read 3, iclass 39, count 2 2006.229.08:17:07.37#ibcon#read 3, iclass 39, count 2 2006.229.08:17:07.37#ibcon#about to read 4, iclass 39, count 2 2006.229.08:17:07.37#ibcon#read 4, iclass 39, count 2 2006.229.08:17:07.37#ibcon#about to read 5, iclass 39, count 2 2006.229.08:17:07.37#ibcon#read 5, iclass 39, count 2 2006.229.08:17:07.37#ibcon#about to read 6, iclass 39, count 2 2006.229.08:17:07.37#ibcon#read 6, iclass 39, count 2 2006.229.08:17:07.37#ibcon#end of sib2, iclass 39, count 2 2006.229.08:17:07.37#ibcon#*after write, iclass 39, count 2 2006.229.08:17:07.37#ibcon#*before return 0, iclass 39, count 2 2006.229.08:17:07.37#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:07.37#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:17:07.37#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.08:17:07.37#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:07.37#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:07.49#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:07.49#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:07.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:17:07.49#ibcon#first serial, iclass 39, count 0 2006.229.08:17:07.49#ibcon#enter sib2, iclass 39, count 0 2006.229.08:17:07.49#ibcon#flushed, iclass 39, count 0 2006.229.08:17:07.49#ibcon#about to write, iclass 39, count 0 2006.229.08:17:07.49#ibcon#wrote, iclass 39, count 0 2006.229.08:17:07.49#ibcon#about to read 3, iclass 39, count 0 2006.229.08:17:07.51#ibcon#read 3, iclass 39, count 0 2006.229.08:17:07.51#ibcon#about to read 4, iclass 39, count 0 2006.229.08:17:07.51#ibcon#read 4, iclass 39, count 0 2006.229.08:17:07.51#ibcon#about to read 5, iclass 39, count 0 2006.229.08:17:07.51#ibcon#read 5, iclass 39, count 0 2006.229.08:17:07.51#ibcon#about to read 6, iclass 39, count 0 2006.229.08:17:07.51#ibcon#read 6, iclass 39, count 0 2006.229.08:17:07.51#ibcon#end of sib2, iclass 39, count 0 2006.229.08:17:07.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:17:07.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:17:07.51#ibcon#[27=USB\r\n] 2006.229.08:17:07.51#ibcon#*before write, iclass 39, count 0 2006.229.08:17:07.51#ibcon#enter sib2, iclass 39, count 0 2006.229.08:17:07.51#ibcon#flushed, iclass 39, count 0 2006.229.08:17:07.51#ibcon#about to write, iclass 39, count 0 2006.229.08:17:07.51#ibcon#wrote, iclass 39, count 0 2006.229.08:17:07.51#ibcon#about to read 3, iclass 39, count 0 2006.229.08:17:07.54#ibcon#read 3, iclass 39, count 0 2006.229.08:17:07.54#ibcon#about to read 4, iclass 39, count 0 2006.229.08:17:07.54#ibcon#read 4, iclass 39, count 0 2006.229.08:17:07.54#ibcon#about to read 5, iclass 39, count 0 2006.229.08:17:07.54#ibcon#read 5, iclass 39, count 0 2006.229.08:17:07.54#ibcon#about to read 6, iclass 39, count 0 2006.229.08:17:07.54#ibcon#read 6, iclass 39, count 0 2006.229.08:17:07.54#ibcon#end of sib2, iclass 39, count 0 2006.229.08:17:07.54#ibcon#*after write, iclass 39, count 0 2006.229.08:17:07.54#ibcon#*before return 0, iclass 39, count 0 2006.229.08:17:07.54#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:07.54#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:17:07.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:17:07.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:17:07.54$vck44/vblo=3,649.99 2006.229.08:17:07.54#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.08:17:07.54#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.08:17:07.54#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:07.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:07.54#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:07.54#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:07.54#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:17:07.54#ibcon#first serial, iclass 3, count 0 2006.229.08:17:07.54#ibcon#enter sib2, iclass 3, count 0 2006.229.08:17:07.54#ibcon#flushed, iclass 3, count 0 2006.229.08:17:07.54#ibcon#about to write, iclass 3, count 0 2006.229.08:17:07.54#ibcon#wrote, iclass 3, count 0 2006.229.08:17:07.54#ibcon#about to read 3, iclass 3, count 0 2006.229.08:17:07.56#ibcon#read 3, iclass 3, count 0 2006.229.08:17:07.56#ibcon#about to read 4, iclass 3, count 0 2006.229.08:17:07.56#ibcon#read 4, iclass 3, count 0 2006.229.08:17:07.56#ibcon#about to read 5, iclass 3, count 0 2006.229.08:17:07.56#ibcon#read 5, iclass 3, count 0 2006.229.08:17:07.56#ibcon#about to read 6, iclass 3, count 0 2006.229.08:17:07.56#ibcon#read 6, iclass 3, count 0 2006.229.08:17:07.56#ibcon#end of sib2, iclass 3, count 0 2006.229.08:17:07.56#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:17:07.56#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:17:07.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:17:07.56#ibcon#*before write, iclass 3, count 0 2006.229.08:17:07.56#ibcon#enter sib2, iclass 3, count 0 2006.229.08:17:07.56#ibcon#flushed, iclass 3, count 0 2006.229.08:17:07.56#ibcon#about to write, iclass 3, count 0 2006.229.08:17:07.56#ibcon#wrote, iclass 3, count 0 2006.229.08:17:07.56#ibcon#about to read 3, iclass 3, count 0 2006.229.08:17:07.60#ibcon#read 3, iclass 3, count 0 2006.229.08:17:07.60#ibcon#about to read 4, iclass 3, count 0 2006.229.08:17:07.60#ibcon#read 4, iclass 3, count 0 2006.229.08:17:07.60#ibcon#about to read 5, iclass 3, count 0 2006.229.08:17:07.60#ibcon#read 5, iclass 3, count 0 2006.229.08:17:07.60#ibcon#about to read 6, iclass 3, count 0 2006.229.08:17:07.60#ibcon#read 6, iclass 3, count 0 2006.229.08:17:07.60#ibcon#end of sib2, iclass 3, count 0 2006.229.08:17:07.60#ibcon#*after write, iclass 3, count 0 2006.229.08:17:07.60#ibcon#*before return 0, iclass 3, count 0 2006.229.08:17:07.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:07.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:17:07.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:17:07.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:17:07.60$vck44/vb=3,4 2006.229.08:17:07.60#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.08:17:07.60#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.08:17:07.60#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:07.60#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:07.66#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:07.66#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:07.66#ibcon#enter wrdev, iclass 5, count 2 2006.229.08:17:07.66#ibcon#first serial, iclass 5, count 2 2006.229.08:17:07.66#ibcon#enter sib2, iclass 5, count 2 2006.229.08:17:07.66#ibcon#flushed, iclass 5, count 2 2006.229.08:17:07.66#ibcon#about to write, iclass 5, count 2 2006.229.08:17:07.66#ibcon#wrote, iclass 5, count 2 2006.229.08:17:07.66#ibcon#about to read 3, iclass 5, count 2 2006.229.08:17:07.68#ibcon#read 3, iclass 5, count 2 2006.229.08:17:07.68#ibcon#about to read 4, iclass 5, count 2 2006.229.08:17:07.68#ibcon#read 4, iclass 5, count 2 2006.229.08:17:07.68#ibcon#about to read 5, iclass 5, count 2 2006.229.08:17:07.68#ibcon#read 5, iclass 5, count 2 2006.229.08:17:07.68#ibcon#about to read 6, iclass 5, count 2 2006.229.08:17:07.68#ibcon#read 6, iclass 5, count 2 2006.229.08:17:07.68#ibcon#end of sib2, iclass 5, count 2 2006.229.08:17:07.68#ibcon#*mode == 0, iclass 5, count 2 2006.229.08:17:07.68#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.08:17:07.68#ibcon#[27=AT03-04\r\n] 2006.229.08:17:07.68#ibcon#*before write, iclass 5, count 2 2006.229.08:17:07.68#ibcon#enter sib2, iclass 5, count 2 2006.229.08:17:07.68#ibcon#flushed, iclass 5, count 2 2006.229.08:17:07.68#ibcon#about to write, iclass 5, count 2 2006.229.08:17:07.68#ibcon#wrote, iclass 5, count 2 2006.229.08:17:07.68#ibcon#about to read 3, iclass 5, count 2 2006.229.08:17:07.71#ibcon#read 3, iclass 5, count 2 2006.229.08:17:07.71#ibcon#about to read 4, iclass 5, count 2 2006.229.08:17:07.71#ibcon#read 4, iclass 5, count 2 2006.229.08:17:07.71#ibcon#about to read 5, iclass 5, count 2 2006.229.08:17:07.71#ibcon#read 5, iclass 5, count 2 2006.229.08:17:07.71#ibcon#about to read 6, iclass 5, count 2 2006.229.08:17:07.71#ibcon#read 6, iclass 5, count 2 2006.229.08:17:07.71#ibcon#end of sib2, iclass 5, count 2 2006.229.08:17:07.71#ibcon#*after write, iclass 5, count 2 2006.229.08:17:07.71#ibcon#*before return 0, iclass 5, count 2 2006.229.08:17:07.71#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:07.71#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:17:07.71#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.08:17:07.71#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:07.71#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:07.83#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:07.83#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:07.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:17:07.83#ibcon#first serial, iclass 5, count 0 2006.229.08:17:07.83#ibcon#enter sib2, iclass 5, count 0 2006.229.08:17:07.83#ibcon#flushed, iclass 5, count 0 2006.229.08:17:07.83#ibcon#about to write, iclass 5, count 0 2006.229.08:17:07.83#ibcon#wrote, iclass 5, count 0 2006.229.08:17:07.83#ibcon#about to read 3, iclass 5, count 0 2006.229.08:17:07.85#ibcon#read 3, iclass 5, count 0 2006.229.08:17:07.85#ibcon#about to read 4, iclass 5, count 0 2006.229.08:17:07.85#ibcon#read 4, iclass 5, count 0 2006.229.08:17:07.85#ibcon#about to read 5, iclass 5, count 0 2006.229.08:17:07.85#ibcon#read 5, iclass 5, count 0 2006.229.08:17:07.85#ibcon#about to read 6, iclass 5, count 0 2006.229.08:17:07.85#ibcon#read 6, iclass 5, count 0 2006.229.08:17:07.85#ibcon#end of sib2, iclass 5, count 0 2006.229.08:17:07.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:17:07.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:17:07.85#ibcon#[27=USB\r\n] 2006.229.08:17:07.85#ibcon#*before write, iclass 5, count 0 2006.229.08:17:07.85#ibcon#enter sib2, iclass 5, count 0 2006.229.08:17:07.85#ibcon#flushed, iclass 5, count 0 2006.229.08:17:07.85#ibcon#about to write, iclass 5, count 0 2006.229.08:17:07.85#ibcon#wrote, iclass 5, count 0 2006.229.08:17:07.85#ibcon#about to read 3, iclass 5, count 0 2006.229.08:17:07.88#ibcon#read 3, iclass 5, count 0 2006.229.08:17:07.88#ibcon#about to read 4, iclass 5, count 0 2006.229.08:17:07.88#ibcon#read 4, iclass 5, count 0 2006.229.08:17:07.88#ibcon#about to read 5, iclass 5, count 0 2006.229.08:17:07.88#ibcon#read 5, iclass 5, count 0 2006.229.08:17:07.88#ibcon#about to read 6, iclass 5, count 0 2006.229.08:17:07.88#ibcon#read 6, iclass 5, count 0 2006.229.08:17:07.88#ibcon#end of sib2, iclass 5, count 0 2006.229.08:17:07.88#ibcon#*after write, iclass 5, count 0 2006.229.08:17:07.88#ibcon#*before return 0, iclass 5, count 0 2006.229.08:17:07.88#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:07.88#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:17:07.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:17:07.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:17:07.88$vck44/vblo=4,679.99 2006.229.08:17:07.88#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.08:17:07.88#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.08:17:07.88#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:07.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:07.88#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:07.88#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:07.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:17:07.88#ibcon#first serial, iclass 7, count 0 2006.229.08:17:07.88#ibcon#enter sib2, iclass 7, count 0 2006.229.08:17:07.88#ibcon#flushed, iclass 7, count 0 2006.229.08:17:07.88#ibcon#about to write, iclass 7, count 0 2006.229.08:17:07.88#ibcon#wrote, iclass 7, count 0 2006.229.08:17:07.88#ibcon#about to read 3, iclass 7, count 0 2006.229.08:17:07.90#ibcon#read 3, iclass 7, count 0 2006.229.08:17:07.90#ibcon#about to read 4, iclass 7, count 0 2006.229.08:17:07.90#ibcon#read 4, iclass 7, count 0 2006.229.08:17:07.90#ibcon#about to read 5, iclass 7, count 0 2006.229.08:17:07.90#ibcon#read 5, iclass 7, count 0 2006.229.08:17:07.90#ibcon#about to read 6, iclass 7, count 0 2006.229.08:17:07.90#ibcon#read 6, iclass 7, count 0 2006.229.08:17:07.90#ibcon#end of sib2, iclass 7, count 0 2006.229.08:17:07.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:17:07.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:17:07.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:17:07.90#ibcon#*before write, iclass 7, count 0 2006.229.08:17:07.90#ibcon#enter sib2, iclass 7, count 0 2006.229.08:17:07.90#ibcon#flushed, iclass 7, count 0 2006.229.08:17:07.90#ibcon#about to write, iclass 7, count 0 2006.229.08:17:07.90#ibcon#wrote, iclass 7, count 0 2006.229.08:17:07.90#ibcon#about to read 3, iclass 7, count 0 2006.229.08:17:07.94#ibcon#read 3, iclass 7, count 0 2006.229.08:17:07.94#ibcon#about to read 4, iclass 7, count 0 2006.229.08:17:07.94#ibcon#read 4, iclass 7, count 0 2006.229.08:17:07.94#ibcon#about to read 5, iclass 7, count 0 2006.229.08:17:07.94#ibcon#read 5, iclass 7, count 0 2006.229.08:17:07.94#ibcon#about to read 6, iclass 7, count 0 2006.229.08:17:07.94#ibcon#read 6, iclass 7, count 0 2006.229.08:17:07.94#ibcon#end of sib2, iclass 7, count 0 2006.229.08:17:07.94#ibcon#*after write, iclass 7, count 0 2006.229.08:17:07.94#ibcon#*before return 0, iclass 7, count 0 2006.229.08:17:07.94#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:07.94#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:17:07.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:17:07.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:17:07.94$vck44/vb=4,4 2006.229.08:17:07.94#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.08:17:07.94#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.08:17:07.94#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:07.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:08.00#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:08.00#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:08.00#ibcon#enter wrdev, iclass 11, count 2 2006.229.08:17:08.00#ibcon#first serial, iclass 11, count 2 2006.229.08:17:08.00#ibcon#enter sib2, iclass 11, count 2 2006.229.08:17:08.00#ibcon#flushed, iclass 11, count 2 2006.229.08:17:08.00#ibcon#about to write, iclass 11, count 2 2006.229.08:17:08.00#ibcon#wrote, iclass 11, count 2 2006.229.08:17:08.00#ibcon#about to read 3, iclass 11, count 2 2006.229.08:17:08.02#ibcon#read 3, iclass 11, count 2 2006.229.08:17:08.02#ibcon#about to read 4, iclass 11, count 2 2006.229.08:17:08.02#ibcon#read 4, iclass 11, count 2 2006.229.08:17:08.02#ibcon#about to read 5, iclass 11, count 2 2006.229.08:17:08.02#ibcon#read 5, iclass 11, count 2 2006.229.08:17:08.02#ibcon#about to read 6, iclass 11, count 2 2006.229.08:17:08.02#ibcon#read 6, iclass 11, count 2 2006.229.08:17:08.02#ibcon#end of sib2, iclass 11, count 2 2006.229.08:17:08.02#ibcon#*mode == 0, iclass 11, count 2 2006.229.08:17:08.02#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.08:17:08.02#ibcon#[27=AT04-04\r\n] 2006.229.08:17:08.02#ibcon#*before write, iclass 11, count 2 2006.229.08:17:08.02#ibcon#enter sib2, iclass 11, count 2 2006.229.08:17:08.02#ibcon#flushed, iclass 11, count 2 2006.229.08:17:08.02#ibcon#about to write, iclass 11, count 2 2006.229.08:17:08.02#ibcon#wrote, iclass 11, count 2 2006.229.08:17:08.02#ibcon#about to read 3, iclass 11, count 2 2006.229.08:17:08.05#ibcon#read 3, iclass 11, count 2 2006.229.08:17:08.05#ibcon#about to read 4, iclass 11, count 2 2006.229.08:17:08.05#ibcon#read 4, iclass 11, count 2 2006.229.08:17:08.05#ibcon#about to read 5, iclass 11, count 2 2006.229.08:17:08.05#ibcon#read 5, iclass 11, count 2 2006.229.08:17:08.05#ibcon#about to read 6, iclass 11, count 2 2006.229.08:17:08.05#ibcon#read 6, iclass 11, count 2 2006.229.08:17:08.05#ibcon#end of sib2, iclass 11, count 2 2006.229.08:17:08.05#ibcon#*after write, iclass 11, count 2 2006.229.08:17:08.05#ibcon#*before return 0, iclass 11, count 2 2006.229.08:17:08.05#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:08.05#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:17:08.05#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.08:17:08.05#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:08.05#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:08.17#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:08.17#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:08.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:17:08.17#ibcon#first serial, iclass 11, count 0 2006.229.08:17:08.17#ibcon#enter sib2, iclass 11, count 0 2006.229.08:17:08.17#ibcon#flushed, iclass 11, count 0 2006.229.08:17:08.17#ibcon#about to write, iclass 11, count 0 2006.229.08:17:08.17#ibcon#wrote, iclass 11, count 0 2006.229.08:17:08.17#ibcon#about to read 3, iclass 11, count 0 2006.229.08:17:08.19#ibcon#read 3, iclass 11, count 0 2006.229.08:17:08.19#ibcon#about to read 4, iclass 11, count 0 2006.229.08:17:08.19#ibcon#read 4, iclass 11, count 0 2006.229.08:17:08.19#ibcon#about to read 5, iclass 11, count 0 2006.229.08:17:08.19#ibcon#read 5, iclass 11, count 0 2006.229.08:17:08.19#ibcon#about to read 6, iclass 11, count 0 2006.229.08:17:08.19#ibcon#read 6, iclass 11, count 0 2006.229.08:17:08.19#ibcon#end of sib2, iclass 11, count 0 2006.229.08:17:08.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:17:08.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:17:08.19#ibcon#[27=USB\r\n] 2006.229.08:17:08.19#ibcon#*before write, iclass 11, count 0 2006.229.08:17:08.19#ibcon#enter sib2, iclass 11, count 0 2006.229.08:17:08.19#ibcon#flushed, iclass 11, count 0 2006.229.08:17:08.19#ibcon#about to write, iclass 11, count 0 2006.229.08:17:08.19#ibcon#wrote, iclass 11, count 0 2006.229.08:17:08.19#ibcon#about to read 3, iclass 11, count 0 2006.229.08:17:08.22#ibcon#read 3, iclass 11, count 0 2006.229.08:17:08.22#ibcon#about to read 4, iclass 11, count 0 2006.229.08:17:08.22#ibcon#read 4, iclass 11, count 0 2006.229.08:17:08.22#ibcon#about to read 5, iclass 11, count 0 2006.229.08:17:08.22#ibcon#read 5, iclass 11, count 0 2006.229.08:17:08.22#ibcon#about to read 6, iclass 11, count 0 2006.229.08:17:08.22#ibcon#read 6, iclass 11, count 0 2006.229.08:17:08.22#ibcon#end of sib2, iclass 11, count 0 2006.229.08:17:08.22#ibcon#*after write, iclass 11, count 0 2006.229.08:17:08.22#ibcon#*before return 0, iclass 11, count 0 2006.229.08:17:08.22#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:08.22#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:17:08.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:17:08.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:17:08.22$vck44/vblo=5,709.99 2006.229.08:17:08.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.08:17:08.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.08:17:08.22#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:08.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:08.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:08.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:08.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:17:08.22#ibcon#first serial, iclass 13, count 0 2006.229.08:17:08.22#ibcon#enter sib2, iclass 13, count 0 2006.229.08:17:08.22#ibcon#flushed, iclass 13, count 0 2006.229.08:17:08.22#ibcon#about to write, iclass 13, count 0 2006.229.08:17:08.22#ibcon#wrote, iclass 13, count 0 2006.229.08:17:08.22#ibcon#about to read 3, iclass 13, count 0 2006.229.08:17:08.24#ibcon#read 3, iclass 13, count 0 2006.229.08:17:08.24#ibcon#about to read 4, iclass 13, count 0 2006.229.08:17:08.24#ibcon#read 4, iclass 13, count 0 2006.229.08:17:08.24#ibcon#about to read 5, iclass 13, count 0 2006.229.08:17:08.24#ibcon#read 5, iclass 13, count 0 2006.229.08:17:08.24#ibcon#about to read 6, iclass 13, count 0 2006.229.08:17:08.24#ibcon#read 6, iclass 13, count 0 2006.229.08:17:08.24#ibcon#end of sib2, iclass 13, count 0 2006.229.08:17:08.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:17:08.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:17:08.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:17:08.24#ibcon#*before write, iclass 13, count 0 2006.229.08:17:08.24#ibcon#enter sib2, iclass 13, count 0 2006.229.08:17:08.24#ibcon#flushed, iclass 13, count 0 2006.229.08:17:08.24#ibcon#about to write, iclass 13, count 0 2006.229.08:17:08.24#ibcon#wrote, iclass 13, count 0 2006.229.08:17:08.24#ibcon#about to read 3, iclass 13, count 0 2006.229.08:17:08.28#ibcon#read 3, iclass 13, count 0 2006.229.08:17:08.28#ibcon#about to read 4, iclass 13, count 0 2006.229.08:17:08.28#ibcon#read 4, iclass 13, count 0 2006.229.08:17:08.28#ibcon#about to read 5, iclass 13, count 0 2006.229.08:17:08.28#ibcon#read 5, iclass 13, count 0 2006.229.08:17:08.28#ibcon#about to read 6, iclass 13, count 0 2006.229.08:17:08.28#ibcon#read 6, iclass 13, count 0 2006.229.08:17:08.28#ibcon#end of sib2, iclass 13, count 0 2006.229.08:17:08.28#ibcon#*after write, iclass 13, count 0 2006.229.08:17:08.28#ibcon#*before return 0, iclass 13, count 0 2006.229.08:17:08.28#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:08.28#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:17:08.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:17:08.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:17:08.28$vck44/vb=5,4 2006.229.08:17:08.28#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.08:17:08.28#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.08:17:08.28#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:08.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:08.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:08.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:08.34#ibcon#enter wrdev, iclass 15, count 2 2006.229.08:17:08.34#ibcon#first serial, iclass 15, count 2 2006.229.08:17:08.34#ibcon#enter sib2, iclass 15, count 2 2006.229.08:17:08.34#ibcon#flushed, iclass 15, count 2 2006.229.08:17:08.34#ibcon#about to write, iclass 15, count 2 2006.229.08:17:08.34#ibcon#wrote, iclass 15, count 2 2006.229.08:17:08.34#ibcon#about to read 3, iclass 15, count 2 2006.229.08:17:08.36#ibcon#read 3, iclass 15, count 2 2006.229.08:17:08.36#ibcon#about to read 4, iclass 15, count 2 2006.229.08:17:08.36#ibcon#read 4, iclass 15, count 2 2006.229.08:17:08.36#ibcon#about to read 5, iclass 15, count 2 2006.229.08:17:08.36#ibcon#read 5, iclass 15, count 2 2006.229.08:17:08.36#ibcon#about to read 6, iclass 15, count 2 2006.229.08:17:08.36#ibcon#read 6, iclass 15, count 2 2006.229.08:17:08.36#ibcon#end of sib2, iclass 15, count 2 2006.229.08:17:08.36#ibcon#*mode == 0, iclass 15, count 2 2006.229.08:17:08.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.08:17:08.36#ibcon#[27=AT05-04\r\n] 2006.229.08:17:08.36#ibcon#*before write, iclass 15, count 2 2006.229.08:17:08.36#ibcon#enter sib2, iclass 15, count 2 2006.229.08:17:08.36#ibcon#flushed, iclass 15, count 2 2006.229.08:17:08.36#ibcon#about to write, iclass 15, count 2 2006.229.08:17:08.36#ibcon#wrote, iclass 15, count 2 2006.229.08:17:08.36#ibcon#about to read 3, iclass 15, count 2 2006.229.08:17:08.39#ibcon#read 3, iclass 15, count 2 2006.229.08:17:08.39#ibcon#about to read 4, iclass 15, count 2 2006.229.08:17:08.39#ibcon#read 4, iclass 15, count 2 2006.229.08:17:08.39#ibcon#about to read 5, iclass 15, count 2 2006.229.08:17:08.39#ibcon#read 5, iclass 15, count 2 2006.229.08:17:08.39#ibcon#about to read 6, iclass 15, count 2 2006.229.08:17:08.39#ibcon#read 6, iclass 15, count 2 2006.229.08:17:08.39#ibcon#end of sib2, iclass 15, count 2 2006.229.08:17:08.39#ibcon#*after write, iclass 15, count 2 2006.229.08:17:08.39#ibcon#*before return 0, iclass 15, count 2 2006.229.08:17:08.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:08.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:17:08.39#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.08:17:08.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:08.39#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:08.51#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:08.51#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:08.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:17:08.51#ibcon#first serial, iclass 15, count 0 2006.229.08:17:08.51#ibcon#enter sib2, iclass 15, count 0 2006.229.08:17:08.51#ibcon#flushed, iclass 15, count 0 2006.229.08:17:08.51#ibcon#about to write, iclass 15, count 0 2006.229.08:17:08.51#ibcon#wrote, iclass 15, count 0 2006.229.08:17:08.51#ibcon#about to read 3, iclass 15, count 0 2006.229.08:17:08.53#ibcon#read 3, iclass 15, count 0 2006.229.08:17:08.53#ibcon#about to read 4, iclass 15, count 0 2006.229.08:17:08.53#ibcon#read 4, iclass 15, count 0 2006.229.08:17:08.53#ibcon#about to read 5, iclass 15, count 0 2006.229.08:17:08.53#ibcon#read 5, iclass 15, count 0 2006.229.08:17:08.53#ibcon#about to read 6, iclass 15, count 0 2006.229.08:17:08.53#ibcon#read 6, iclass 15, count 0 2006.229.08:17:08.53#ibcon#end of sib2, iclass 15, count 0 2006.229.08:17:08.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:17:08.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:17:08.53#ibcon#[27=USB\r\n] 2006.229.08:17:08.53#ibcon#*before write, iclass 15, count 0 2006.229.08:17:08.53#ibcon#enter sib2, iclass 15, count 0 2006.229.08:17:08.53#ibcon#flushed, iclass 15, count 0 2006.229.08:17:08.53#ibcon#about to write, iclass 15, count 0 2006.229.08:17:08.53#ibcon#wrote, iclass 15, count 0 2006.229.08:17:08.53#ibcon#about to read 3, iclass 15, count 0 2006.229.08:17:08.56#ibcon#read 3, iclass 15, count 0 2006.229.08:17:08.56#ibcon#about to read 4, iclass 15, count 0 2006.229.08:17:08.56#ibcon#read 4, iclass 15, count 0 2006.229.08:17:08.56#ibcon#about to read 5, iclass 15, count 0 2006.229.08:17:08.56#ibcon#read 5, iclass 15, count 0 2006.229.08:17:08.56#ibcon#about to read 6, iclass 15, count 0 2006.229.08:17:08.56#ibcon#read 6, iclass 15, count 0 2006.229.08:17:08.56#ibcon#end of sib2, iclass 15, count 0 2006.229.08:17:08.56#ibcon#*after write, iclass 15, count 0 2006.229.08:17:08.56#ibcon#*before return 0, iclass 15, count 0 2006.229.08:17:08.56#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:08.56#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:17:08.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:17:08.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:17:08.56$vck44/vblo=6,719.99 2006.229.08:17:08.56#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.08:17:08.56#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.08:17:08.56#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:08.56#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:08.56#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:08.56#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:08.56#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:17:08.56#ibcon#first serial, iclass 17, count 0 2006.229.08:17:08.56#ibcon#enter sib2, iclass 17, count 0 2006.229.08:17:08.56#ibcon#flushed, iclass 17, count 0 2006.229.08:17:08.56#ibcon#about to write, iclass 17, count 0 2006.229.08:17:08.56#ibcon#wrote, iclass 17, count 0 2006.229.08:17:08.56#ibcon#about to read 3, iclass 17, count 0 2006.229.08:17:08.58#ibcon#read 3, iclass 17, count 0 2006.229.08:17:08.58#ibcon#about to read 4, iclass 17, count 0 2006.229.08:17:08.58#ibcon#read 4, iclass 17, count 0 2006.229.08:17:08.58#ibcon#about to read 5, iclass 17, count 0 2006.229.08:17:08.58#ibcon#read 5, iclass 17, count 0 2006.229.08:17:08.58#ibcon#about to read 6, iclass 17, count 0 2006.229.08:17:08.58#ibcon#read 6, iclass 17, count 0 2006.229.08:17:08.58#ibcon#end of sib2, iclass 17, count 0 2006.229.08:17:08.58#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:17:08.58#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:17:08.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:17:08.58#ibcon#*before write, iclass 17, count 0 2006.229.08:17:08.58#ibcon#enter sib2, iclass 17, count 0 2006.229.08:17:08.58#ibcon#flushed, iclass 17, count 0 2006.229.08:17:08.58#ibcon#about to write, iclass 17, count 0 2006.229.08:17:08.58#ibcon#wrote, iclass 17, count 0 2006.229.08:17:08.58#ibcon#about to read 3, iclass 17, count 0 2006.229.08:17:08.62#ibcon#read 3, iclass 17, count 0 2006.229.08:17:08.62#ibcon#about to read 4, iclass 17, count 0 2006.229.08:17:08.62#ibcon#read 4, iclass 17, count 0 2006.229.08:17:08.62#ibcon#about to read 5, iclass 17, count 0 2006.229.08:17:08.62#ibcon#read 5, iclass 17, count 0 2006.229.08:17:08.62#ibcon#about to read 6, iclass 17, count 0 2006.229.08:17:08.62#ibcon#read 6, iclass 17, count 0 2006.229.08:17:08.62#ibcon#end of sib2, iclass 17, count 0 2006.229.08:17:08.62#ibcon#*after write, iclass 17, count 0 2006.229.08:17:08.62#ibcon#*before return 0, iclass 17, count 0 2006.229.08:17:08.62#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:08.62#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:17:08.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:17:08.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:17:08.62$vck44/vb=6,4 2006.229.08:17:08.62#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.08:17:08.62#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.08:17:08.62#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:08.62#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:08.68#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:08.68#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:08.68#ibcon#enter wrdev, iclass 19, count 2 2006.229.08:17:08.68#ibcon#first serial, iclass 19, count 2 2006.229.08:17:08.68#ibcon#enter sib2, iclass 19, count 2 2006.229.08:17:08.68#ibcon#flushed, iclass 19, count 2 2006.229.08:17:08.68#ibcon#about to write, iclass 19, count 2 2006.229.08:17:08.68#ibcon#wrote, iclass 19, count 2 2006.229.08:17:08.68#ibcon#about to read 3, iclass 19, count 2 2006.229.08:17:08.70#ibcon#read 3, iclass 19, count 2 2006.229.08:17:08.70#ibcon#about to read 4, iclass 19, count 2 2006.229.08:17:08.70#ibcon#read 4, iclass 19, count 2 2006.229.08:17:08.70#ibcon#about to read 5, iclass 19, count 2 2006.229.08:17:08.70#ibcon#read 5, iclass 19, count 2 2006.229.08:17:08.70#ibcon#about to read 6, iclass 19, count 2 2006.229.08:17:08.70#ibcon#read 6, iclass 19, count 2 2006.229.08:17:08.70#ibcon#end of sib2, iclass 19, count 2 2006.229.08:17:08.70#ibcon#*mode == 0, iclass 19, count 2 2006.229.08:17:08.70#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.08:17:08.70#ibcon#[27=AT06-04\r\n] 2006.229.08:17:08.70#ibcon#*before write, iclass 19, count 2 2006.229.08:17:08.70#ibcon#enter sib2, iclass 19, count 2 2006.229.08:17:08.70#ibcon#flushed, iclass 19, count 2 2006.229.08:17:08.70#ibcon#about to write, iclass 19, count 2 2006.229.08:17:08.70#ibcon#wrote, iclass 19, count 2 2006.229.08:17:08.70#ibcon#about to read 3, iclass 19, count 2 2006.229.08:17:08.73#ibcon#read 3, iclass 19, count 2 2006.229.08:17:08.73#ibcon#about to read 4, iclass 19, count 2 2006.229.08:17:08.73#ibcon#read 4, iclass 19, count 2 2006.229.08:17:08.73#ibcon#about to read 5, iclass 19, count 2 2006.229.08:17:08.73#ibcon#read 5, iclass 19, count 2 2006.229.08:17:08.73#ibcon#about to read 6, iclass 19, count 2 2006.229.08:17:08.73#ibcon#read 6, iclass 19, count 2 2006.229.08:17:08.73#ibcon#end of sib2, iclass 19, count 2 2006.229.08:17:08.73#ibcon#*after write, iclass 19, count 2 2006.229.08:17:08.73#ibcon#*before return 0, iclass 19, count 2 2006.229.08:17:08.73#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:08.73#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:17:08.73#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.08:17:08.73#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:08.73#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:08.85#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:08.85#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:08.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:17:08.85#ibcon#first serial, iclass 19, count 0 2006.229.08:17:08.85#ibcon#enter sib2, iclass 19, count 0 2006.229.08:17:08.85#ibcon#flushed, iclass 19, count 0 2006.229.08:17:08.85#ibcon#about to write, iclass 19, count 0 2006.229.08:17:08.85#ibcon#wrote, iclass 19, count 0 2006.229.08:17:08.85#ibcon#about to read 3, iclass 19, count 0 2006.229.08:17:08.87#ibcon#read 3, iclass 19, count 0 2006.229.08:17:08.87#ibcon#about to read 4, iclass 19, count 0 2006.229.08:17:08.87#ibcon#read 4, iclass 19, count 0 2006.229.08:17:08.87#ibcon#about to read 5, iclass 19, count 0 2006.229.08:17:08.87#ibcon#read 5, iclass 19, count 0 2006.229.08:17:08.87#ibcon#about to read 6, iclass 19, count 0 2006.229.08:17:08.87#ibcon#read 6, iclass 19, count 0 2006.229.08:17:08.87#ibcon#end of sib2, iclass 19, count 0 2006.229.08:17:08.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:17:08.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:17:08.87#ibcon#[27=USB\r\n] 2006.229.08:17:08.87#ibcon#*before write, iclass 19, count 0 2006.229.08:17:08.87#ibcon#enter sib2, iclass 19, count 0 2006.229.08:17:08.87#ibcon#flushed, iclass 19, count 0 2006.229.08:17:08.87#ibcon#about to write, iclass 19, count 0 2006.229.08:17:08.87#ibcon#wrote, iclass 19, count 0 2006.229.08:17:08.87#ibcon#about to read 3, iclass 19, count 0 2006.229.08:17:08.90#ibcon#read 3, iclass 19, count 0 2006.229.08:17:08.90#ibcon#about to read 4, iclass 19, count 0 2006.229.08:17:08.90#ibcon#read 4, iclass 19, count 0 2006.229.08:17:08.90#ibcon#about to read 5, iclass 19, count 0 2006.229.08:17:08.90#ibcon#read 5, iclass 19, count 0 2006.229.08:17:08.90#ibcon#about to read 6, iclass 19, count 0 2006.229.08:17:08.90#ibcon#read 6, iclass 19, count 0 2006.229.08:17:08.90#ibcon#end of sib2, iclass 19, count 0 2006.229.08:17:08.90#ibcon#*after write, iclass 19, count 0 2006.229.08:17:08.90#ibcon#*before return 0, iclass 19, count 0 2006.229.08:17:08.90#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:08.90#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:17:08.90#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:17:08.90#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:17:08.90$vck44/vblo=7,734.99 2006.229.08:17:08.90#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.08:17:08.90#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.08:17:08.90#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:08.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:08.90#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:08.90#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:08.90#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:17:08.90#ibcon#first serial, iclass 21, count 0 2006.229.08:17:08.90#ibcon#enter sib2, iclass 21, count 0 2006.229.08:17:08.90#ibcon#flushed, iclass 21, count 0 2006.229.08:17:08.90#ibcon#about to write, iclass 21, count 0 2006.229.08:17:08.90#ibcon#wrote, iclass 21, count 0 2006.229.08:17:08.90#ibcon#about to read 3, iclass 21, count 0 2006.229.08:17:08.92#ibcon#read 3, iclass 21, count 0 2006.229.08:17:08.92#ibcon#about to read 4, iclass 21, count 0 2006.229.08:17:08.92#ibcon#read 4, iclass 21, count 0 2006.229.08:17:08.92#ibcon#about to read 5, iclass 21, count 0 2006.229.08:17:08.92#ibcon#read 5, iclass 21, count 0 2006.229.08:17:08.92#ibcon#about to read 6, iclass 21, count 0 2006.229.08:17:08.92#ibcon#read 6, iclass 21, count 0 2006.229.08:17:08.92#ibcon#end of sib2, iclass 21, count 0 2006.229.08:17:08.92#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:17:08.92#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:17:08.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:17:08.92#ibcon#*before write, iclass 21, count 0 2006.229.08:17:08.92#ibcon#enter sib2, iclass 21, count 0 2006.229.08:17:08.92#ibcon#flushed, iclass 21, count 0 2006.229.08:17:08.92#ibcon#about to write, iclass 21, count 0 2006.229.08:17:08.92#ibcon#wrote, iclass 21, count 0 2006.229.08:17:08.92#ibcon#about to read 3, iclass 21, count 0 2006.229.08:17:08.96#ibcon#read 3, iclass 21, count 0 2006.229.08:17:08.96#ibcon#about to read 4, iclass 21, count 0 2006.229.08:17:08.96#ibcon#read 4, iclass 21, count 0 2006.229.08:17:08.96#ibcon#about to read 5, iclass 21, count 0 2006.229.08:17:08.96#ibcon#read 5, iclass 21, count 0 2006.229.08:17:08.96#ibcon#about to read 6, iclass 21, count 0 2006.229.08:17:08.96#ibcon#read 6, iclass 21, count 0 2006.229.08:17:08.96#ibcon#end of sib2, iclass 21, count 0 2006.229.08:17:08.96#ibcon#*after write, iclass 21, count 0 2006.229.08:17:08.96#ibcon#*before return 0, iclass 21, count 0 2006.229.08:17:08.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:08.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:17:08.96#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:17:08.96#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:17:08.96$vck44/vb=7,4 2006.229.08:17:08.96#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.08:17:08.96#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.08:17:08.96#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:08.96#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:09.02#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:09.02#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:09.02#ibcon#enter wrdev, iclass 23, count 2 2006.229.08:17:09.02#ibcon#first serial, iclass 23, count 2 2006.229.08:17:09.02#ibcon#enter sib2, iclass 23, count 2 2006.229.08:17:09.02#ibcon#flushed, iclass 23, count 2 2006.229.08:17:09.02#ibcon#about to write, iclass 23, count 2 2006.229.08:17:09.02#ibcon#wrote, iclass 23, count 2 2006.229.08:17:09.02#ibcon#about to read 3, iclass 23, count 2 2006.229.08:17:09.04#ibcon#read 3, iclass 23, count 2 2006.229.08:17:09.04#ibcon#about to read 4, iclass 23, count 2 2006.229.08:17:09.04#ibcon#read 4, iclass 23, count 2 2006.229.08:17:09.04#ibcon#about to read 5, iclass 23, count 2 2006.229.08:17:09.04#ibcon#read 5, iclass 23, count 2 2006.229.08:17:09.04#ibcon#about to read 6, iclass 23, count 2 2006.229.08:17:09.04#ibcon#read 6, iclass 23, count 2 2006.229.08:17:09.04#ibcon#end of sib2, iclass 23, count 2 2006.229.08:17:09.04#ibcon#*mode == 0, iclass 23, count 2 2006.229.08:17:09.04#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.08:17:09.04#ibcon#[27=AT07-04\r\n] 2006.229.08:17:09.04#ibcon#*before write, iclass 23, count 2 2006.229.08:17:09.04#ibcon#enter sib2, iclass 23, count 2 2006.229.08:17:09.04#ibcon#flushed, iclass 23, count 2 2006.229.08:17:09.04#ibcon#about to write, iclass 23, count 2 2006.229.08:17:09.04#ibcon#wrote, iclass 23, count 2 2006.229.08:17:09.04#ibcon#about to read 3, iclass 23, count 2 2006.229.08:17:09.07#ibcon#read 3, iclass 23, count 2 2006.229.08:17:09.07#ibcon#about to read 4, iclass 23, count 2 2006.229.08:17:09.07#ibcon#read 4, iclass 23, count 2 2006.229.08:17:09.07#ibcon#about to read 5, iclass 23, count 2 2006.229.08:17:09.07#ibcon#read 5, iclass 23, count 2 2006.229.08:17:09.07#ibcon#about to read 6, iclass 23, count 2 2006.229.08:17:09.07#ibcon#read 6, iclass 23, count 2 2006.229.08:17:09.07#ibcon#end of sib2, iclass 23, count 2 2006.229.08:17:09.07#ibcon#*after write, iclass 23, count 2 2006.229.08:17:09.07#ibcon#*before return 0, iclass 23, count 2 2006.229.08:17:09.07#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:09.07#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:17:09.07#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.08:17:09.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:09.07#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:09.19#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:09.19#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:09.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:17:09.19#ibcon#first serial, iclass 23, count 0 2006.229.08:17:09.19#ibcon#enter sib2, iclass 23, count 0 2006.229.08:17:09.19#ibcon#flushed, iclass 23, count 0 2006.229.08:17:09.19#ibcon#about to write, iclass 23, count 0 2006.229.08:17:09.19#ibcon#wrote, iclass 23, count 0 2006.229.08:17:09.19#ibcon#about to read 3, iclass 23, count 0 2006.229.08:17:09.21#ibcon#read 3, iclass 23, count 0 2006.229.08:17:09.21#ibcon#about to read 4, iclass 23, count 0 2006.229.08:17:09.21#ibcon#read 4, iclass 23, count 0 2006.229.08:17:09.21#ibcon#about to read 5, iclass 23, count 0 2006.229.08:17:09.21#ibcon#read 5, iclass 23, count 0 2006.229.08:17:09.21#ibcon#about to read 6, iclass 23, count 0 2006.229.08:17:09.21#ibcon#read 6, iclass 23, count 0 2006.229.08:17:09.21#ibcon#end of sib2, iclass 23, count 0 2006.229.08:17:09.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:17:09.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:17:09.21#ibcon#[27=USB\r\n] 2006.229.08:17:09.21#ibcon#*before write, iclass 23, count 0 2006.229.08:17:09.21#ibcon#enter sib2, iclass 23, count 0 2006.229.08:17:09.21#ibcon#flushed, iclass 23, count 0 2006.229.08:17:09.21#ibcon#about to write, iclass 23, count 0 2006.229.08:17:09.21#ibcon#wrote, iclass 23, count 0 2006.229.08:17:09.21#ibcon#about to read 3, iclass 23, count 0 2006.229.08:17:09.24#ibcon#read 3, iclass 23, count 0 2006.229.08:17:09.24#ibcon#about to read 4, iclass 23, count 0 2006.229.08:17:09.24#ibcon#read 4, iclass 23, count 0 2006.229.08:17:09.24#ibcon#about to read 5, iclass 23, count 0 2006.229.08:17:09.24#ibcon#read 5, iclass 23, count 0 2006.229.08:17:09.24#ibcon#about to read 6, iclass 23, count 0 2006.229.08:17:09.24#ibcon#read 6, iclass 23, count 0 2006.229.08:17:09.24#ibcon#end of sib2, iclass 23, count 0 2006.229.08:17:09.24#ibcon#*after write, iclass 23, count 0 2006.229.08:17:09.24#ibcon#*before return 0, iclass 23, count 0 2006.229.08:17:09.24#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:09.24#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:17:09.24#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:17:09.24#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:17:09.24$vck44/vblo=8,744.99 2006.229.08:17:09.24#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.08:17:09.24#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.08:17:09.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:17:09.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:09.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:09.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:09.24#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:17:09.24#ibcon#first serial, iclass 25, count 0 2006.229.08:17:09.24#ibcon#enter sib2, iclass 25, count 0 2006.229.08:17:09.24#ibcon#flushed, iclass 25, count 0 2006.229.08:17:09.24#ibcon#about to write, iclass 25, count 0 2006.229.08:17:09.24#ibcon#wrote, iclass 25, count 0 2006.229.08:17:09.24#ibcon#about to read 3, iclass 25, count 0 2006.229.08:17:09.26#ibcon#read 3, iclass 25, count 0 2006.229.08:17:09.26#ibcon#about to read 4, iclass 25, count 0 2006.229.08:17:09.26#ibcon#read 4, iclass 25, count 0 2006.229.08:17:09.26#ibcon#about to read 5, iclass 25, count 0 2006.229.08:17:09.26#ibcon#read 5, iclass 25, count 0 2006.229.08:17:09.26#ibcon#about to read 6, iclass 25, count 0 2006.229.08:17:09.26#ibcon#read 6, iclass 25, count 0 2006.229.08:17:09.26#ibcon#end of sib2, iclass 25, count 0 2006.229.08:17:09.26#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:17:09.26#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:17:09.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:17:09.26#ibcon#*before write, iclass 25, count 0 2006.229.08:17:09.26#ibcon#enter sib2, iclass 25, count 0 2006.229.08:17:09.26#ibcon#flushed, iclass 25, count 0 2006.229.08:17:09.26#ibcon#about to write, iclass 25, count 0 2006.229.08:17:09.26#ibcon#wrote, iclass 25, count 0 2006.229.08:17:09.26#ibcon#about to read 3, iclass 25, count 0 2006.229.08:17:09.30#ibcon#read 3, iclass 25, count 0 2006.229.08:17:09.30#ibcon#about to read 4, iclass 25, count 0 2006.229.08:17:09.30#ibcon#read 4, iclass 25, count 0 2006.229.08:17:09.30#ibcon#about to read 5, iclass 25, count 0 2006.229.08:17:09.30#ibcon#read 5, iclass 25, count 0 2006.229.08:17:09.30#ibcon#about to read 6, iclass 25, count 0 2006.229.08:17:09.30#ibcon#read 6, iclass 25, count 0 2006.229.08:17:09.30#ibcon#end of sib2, iclass 25, count 0 2006.229.08:17:09.30#ibcon#*after write, iclass 25, count 0 2006.229.08:17:09.30#ibcon#*before return 0, iclass 25, count 0 2006.229.08:17:09.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:09.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:17:09.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:17:09.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:17:09.30$vck44/vb=8,4 2006.229.08:17:09.30#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.08:17:09.30#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.08:17:09.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:17:09.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:09.36#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:09.36#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:09.36#ibcon#enter wrdev, iclass 27, count 2 2006.229.08:17:09.36#ibcon#first serial, iclass 27, count 2 2006.229.08:17:09.36#ibcon#enter sib2, iclass 27, count 2 2006.229.08:17:09.36#ibcon#flushed, iclass 27, count 2 2006.229.08:17:09.36#ibcon#about to write, iclass 27, count 2 2006.229.08:17:09.36#ibcon#wrote, iclass 27, count 2 2006.229.08:17:09.36#ibcon#about to read 3, iclass 27, count 2 2006.229.08:17:09.38#ibcon#read 3, iclass 27, count 2 2006.229.08:17:09.38#ibcon#about to read 4, iclass 27, count 2 2006.229.08:17:09.38#ibcon#read 4, iclass 27, count 2 2006.229.08:17:09.38#ibcon#about to read 5, iclass 27, count 2 2006.229.08:17:09.38#ibcon#read 5, iclass 27, count 2 2006.229.08:17:09.38#ibcon#about to read 6, iclass 27, count 2 2006.229.08:17:09.38#ibcon#read 6, iclass 27, count 2 2006.229.08:17:09.38#ibcon#end of sib2, iclass 27, count 2 2006.229.08:17:09.38#ibcon#*mode == 0, iclass 27, count 2 2006.229.08:17:09.38#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.08:17:09.38#ibcon#[27=AT08-04\r\n] 2006.229.08:17:09.38#ibcon#*before write, iclass 27, count 2 2006.229.08:17:09.38#ibcon#enter sib2, iclass 27, count 2 2006.229.08:17:09.38#ibcon#flushed, iclass 27, count 2 2006.229.08:17:09.38#ibcon#about to write, iclass 27, count 2 2006.229.08:17:09.38#ibcon#wrote, iclass 27, count 2 2006.229.08:17:09.38#ibcon#about to read 3, iclass 27, count 2 2006.229.08:17:09.41#ibcon#read 3, iclass 27, count 2 2006.229.08:17:09.41#ibcon#about to read 4, iclass 27, count 2 2006.229.08:17:09.41#ibcon#read 4, iclass 27, count 2 2006.229.08:17:09.41#ibcon#about to read 5, iclass 27, count 2 2006.229.08:17:09.41#ibcon#read 5, iclass 27, count 2 2006.229.08:17:09.41#ibcon#about to read 6, iclass 27, count 2 2006.229.08:17:09.41#ibcon#read 6, iclass 27, count 2 2006.229.08:17:09.41#ibcon#end of sib2, iclass 27, count 2 2006.229.08:17:09.41#ibcon#*after write, iclass 27, count 2 2006.229.08:17:09.41#ibcon#*before return 0, iclass 27, count 2 2006.229.08:17:09.41#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:09.41#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:17:09.41#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.08:17:09.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:17:09.41#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:09.53#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:09.53#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:09.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.08:17:09.53#ibcon#first serial, iclass 27, count 0 2006.229.08:17:09.53#ibcon#enter sib2, iclass 27, count 0 2006.229.08:17:09.53#ibcon#flushed, iclass 27, count 0 2006.229.08:17:09.53#ibcon#about to write, iclass 27, count 0 2006.229.08:17:09.53#ibcon#wrote, iclass 27, count 0 2006.229.08:17:09.53#ibcon#about to read 3, iclass 27, count 0 2006.229.08:17:09.55#ibcon#read 3, iclass 27, count 0 2006.229.08:17:09.55#ibcon#about to read 4, iclass 27, count 0 2006.229.08:17:09.55#ibcon#read 4, iclass 27, count 0 2006.229.08:17:09.55#ibcon#about to read 5, iclass 27, count 0 2006.229.08:17:09.55#ibcon#read 5, iclass 27, count 0 2006.229.08:17:09.55#ibcon#about to read 6, iclass 27, count 0 2006.229.08:17:09.55#ibcon#read 6, iclass 27, count 0 2006.229.08:17:09.55#ibcon#end of sib2, iclass 27, count 0 2006.229.08:17:09.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.08:17:09.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.08:17:09.55#ibcon#[27=USB\r\n] 2006.229.08:17:09.55#ibcon#*before write, iclass 27, count 0 2006.229.08:17:09.55#ibcon#enter sib2, iclass 27, count 0 2006.229.08:17:09.55#ibcon#flushed, iclass 27, count 0 2006.229.08:17:09.55#ibcon#about to write, iclass 27, count 0 2006.229.08:17:09.55#ibcon#wrote, iclass 27, count 0 2006.229.08:17:09.55#ibcon#about to read 3, iclass 27, count 0 2006.229.08:17:09.58#ibcon#read 3, iclass 27, count 0 2006.229.08:17:09.58#ibcon#about to read 4, iclass 27, count 0 2006.229.08:17:09.58#ibcon#read 4, iclass 27, count 0 2006.229.08:17:09.58#ibcon#about to read 5, iclass 27, count 0 2006.229.08:17:09.58#ibcon#read 5, iclass 27, count 0 2006.229.08:17:09.58#ibcon#about to read 6, iclass 27, count 0 2006.229.08:17:09.58#ibcon#read 6, iclass 27, count 0 2006.229.08:17:09.58#ibcon#end of sib2, iclass 27, count 0 2006.229.08:17:09.58#ibcon#*after write, iclass 27, count 0 2006.229.08:17:09.58#ibcon#*before return 0, iclass 27, count 0 2006.229.08:17:09.58#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:09.58#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:17:09.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.08:17:09.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.08:17:09.58$vck44/vabw=wide 2006.229.08:17:09.58#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.08:17:09.58#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.08:17:09.58#ibcon#ireg 8 cls_cnt 0 2006.229.08:17:09.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:09.58#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:09.58#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:09.58#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:17:09.58#ibcon#first serial, iclass 29, count 0 2006.229.08:17:09.58#ibcon#enter sib2, iclass 29, count 0 2006.229.08:17:09.58#ibcon#flushed, iclass 29, count 0 2006.229.08:17:09.58#ibcon#about to write, iclass 29, count 0 2006.229.08:17:09.58#ibcon#wrote, iclass 29, count 0 2006.229.08:17:09.58#ibcon#about to read 3, iclass 29, count 0 2006.229.08:17:09.60#ibcon#read 3, iclass 29, count 0 2006.229.08:17:09.60#ibcon#about to read 4, iclass 29, count 0 2006.229.08:17:09.60#ibcon#read 4, iclass 29, count 0 2006.229.08:17:09.60#ibcon#about to read 5, iclass 29, count 0 2006.229.08:17:09.60#ibcon#read 5, iclass 29, count 0 2006.229.08:17:09.60#ibcon#about to read 6, iclass 29, count 0 2006.229.08:17:09.60#ibcon#read 6, iclass 29, count 0 2006.229.08:17:09.60#ibcon#end of sib2, iclass 29, count 0 2006.229.08:17:09.60#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:17:09.60#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:17:09.60#ibcon#[25=BW32\r\n] 2006.229.08:17:09.60#ibcon#*before write, iclass 29, count 0 2006.229.08:17:09.60#ibcon#enter sib2, iclass 29, count 0 2006.229.08:17:09.60#ibcon#flushed, iclass 29, count 0 2006.229.08:17:09.60#ibcon#about to write, iclass 29, count 0 2006.229.08:17:09.60#ibcon#wrote, iclass 29, count 0 2006.229.08:17:09.60#ibcon#about to read 3, iclass 29, count 0 2006.229.08:17:09.63#ibcon#read 3, iclass 29, count 0 2006.229.08:17:09.63#ibcon#about to read 4, iclass 29, count 0 2006.229.08:17:09.63#ibcon#read 4, iclass 29, count 0 2006.229.08:17:09.63#ibcon#about to read 5, iclass 29, count 0 2006.229.08:17:09.63#ibcon#read 5, iclass 29, count 0 2006.229.08:17:09.63#ibcon#about to read 6, iclass 29, count 0 2006.229.08:17:09.63#ibcon#read 6, iclass 29, count 0 2006.229.08:17:09.63#ibcon#end of sib2, iclass 29, count 0 2006.229.08:17:09.63#ibcon#*after write, iclass 29, count 0 2006.229.08:17:09.63#ibcon#*before return 0, iclass 29, count 0 2006.229.08:17:09.63#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:09.63#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:17:09.63#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:17:09.63#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:17:09.63$vck44/vbbw=wide 2006.229.08:17:09.63#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.08:17:09.63#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.08:17:09.63#ibcon#ireg 8 cls_cnt 0 2006.229.08:17:09.63#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:17:09.70#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:17:09.70#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:17:09.70#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:17:09.70#ibcon#first serial, iclass 31, count 0 2006.229.08:17:09.70#ibcon#enter sib2, iclass 31, count 0 2006.229.08:17:09.70#ibcon#flushed, iclass 31, count 0 2006.229.08:17:09.70#ibcon#about to write, iclass 31, count 0 2006.229.08:17:09.70#ibcon#wrote, iclass 31, count 0 2006.229.08:17:09.70#ibcon#about to read 3, iclass 31, count 0 2006.229.08:17:09.72#ibcon#read 3, iclass 31, count 0 2006.229.08:17:09.72#ibcon#about to read 4, iclass 31, count 0 2006.229.08:17:09.72#ibcon#read 4, iclass 31, count 0 2006.229.08:17:09.72#ibcon#about to read 5, iclass 31, count 0 2006.229.08:17:09.72#ibcon#read 5, iclass 31, count 0 2006.229.08:17:09.72#ibcon#about to read 6, iclass 31, count 0 2006.229.08:17:09.72#ibcon#read 6, iclass 31, count 0 2006.229.08:17:09.72#ibcon#end of sib2, iclass 31, count 0 2006.229.08:17:09.72#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:17:09.72#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:17:09.72#ibcon#[27=BW32\r\n] 2006.229.08:17:09.72#ibcon#*before write, iclass 31, count 0 2006.229.08:17:09.72#ibcon#enter sib2, iclass 31, count 0 2006.229.08:17:09.72#ibcon#flushed, iclass 31, count 0 2006.229.08:17:09.72#ibcon#about to write, iclass 31, count 0 2006.229.08:17:09.72#ibcon#wrote, iclass 31, count 0 2006.229.08:17:09.72#ibcon#about to read 3, iclass 31, count 0 2006.229.08:17:09.75#ibcon#read 3, iclass 31, count 0 2006.229.08:17:09.75#ibcon#about to read 4, iclass 31, count 0 2006.229.08:17:09.75#ibcon#read 4, iclass 31, count 0 2006.229.08:17:09.75#ibcon#about to read 5, iclass 31, count 0 2006.229.08:17:09.75#ibcon#read 5, iclass 31, count 0 2006.229.08:17:09.75#ibcon#about to read 6, iclass 31, count 0 2006.229.08:17:09.75#ibcon#read 6, iclass 31, count 0 2006.229.08:17:09.75#ibcon#end of sib2, iclass 31, count 0 2006.229.08:17:09.75#ibcon#*after write, iclass 31, count 0 2006.229.08:17:09.75#ibcon#*before return 0, iclass 31, count 0 2006.229.08:17:09.75#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:17:09.75#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:17:09.75#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:17:09.75#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:17:09.75$setupk4/ifdk4 2006.229.08:17:09.75$ifdk4/lo= 2006.229.08:17:09.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:17:09.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:17:09.75$ifdk4/patch= 2006.229.08:17:09.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:17:09.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:17:09.75$setupk4/!*+20s 2006.229.08:17:14.16#abcon#<5=/06 2.8 5.3 29.54 931000.3\r\n> 2006.229.08:17:14.18#abcon#{5=INTERFACE CLEAR} 2006.229.08:17:14.24#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:17:24.26$setupk4/"tpicd 2006.229.08:17:24.26$setupk4/echo=off 2006.229.08:17:24.26$setupk4/xlog=off 2006.229.08:17:24.26:!2006.229.08:19:08 2006.229.08:17:43.14#trakl#Source acquired 2006.229.08:17:44.14#flagr#flagr/antenna,acquired 2006.229.08:19:08.00:preob 2006.229.08:19:09.14/onsource/TRACKING 2006.229.08:19:09.14:!2006.229.08:19:18 2006.229.08:19:18.00:"tape 2006.229.08:19:18.00:"st=record 2006.229.08:19:18.00:data_valid=on 2006.229.08:19:18.00:midob 2006.229.08:19:18.14/onsource/TRACKING 2006.229.08:19:18.14/wx/29.53,1000.4,93 2006.229.08:19:18.27/cable/+6.3981E-03 2006.229.08:19:19.36/va/01,08,usb,yes,36,39 2006.229.08:19:19.36/va/02,07,usb,yes,39,40 2006.229.08:19:19.36/va/03,06,usb,yes,48,51 2006.229.08:19:19.36/va/04,07,usb,yes,40,42 2006.229.08:19:19.36/va/05,04,usb,yes,36,37 2006.229.08:19:19.36/va/06,04,usb,yes,40,40 2006.229.08:19:19.36/va/07,05,usb,yes,36,36 2006.229.08:19:19.36/va/08,06,usb,yes,26,32 2006.229.08:19:19.59/valo/01,524.99,yes,locked 2006.229.08:19:19.59/valo/02,534.99,yes,locked 2006.229.08:19:19.59/valo/03,564.99,yes,locked 2006.229.08:19:19.59/valo/04,624.99,yes,locked 2006.229.08:19:19.59/valo/05,734.99,yes,locked 2006.229.08:19:19.59/valo/06,814.99,yes,locked 2006.229.08:19:19.59/valo/07,864.99,yes,locked 2006.229.08:19:19.59/valo/08,884.99,yes,locked 2006.229.08:19:20.68/vb/01,04,usb,yes,35,73 2006.229.08:19:20.68/vb/02,04,usb,yes,36,75 2006.229.08:19:20.68/vb/03,04,usb,yes,34,46 2006.229.08:19:20.68/vb/04,04,usb,yes,37,36 2006.229.08:19:20.68/vb/05,04,usb,yes,31,33 2006.229.08:19:20.68/vb/06,04,usb,yes,36,31 2006.229.08:19:20.68/vb/07,04,usb,yes,35,35 2006.229.08:19:20.68/vb/08,04,usb,yes,32,35 2006.229.08:19:20.91/vblo/01,629.99,yes,locked 2006.229.08:19:20.91/vblo/02,634.99,yes,locked 2006.229.08:19:20.91/vblo/03,649.99,yes,locked 2006.229.08:19:20.91/vblo/04,679.99,yes,locked 2006.229.08:19:20.91/vblo/05,709.99,yes,locked 2006.229.08:19:20.91/vblo/06,719.99,yes,locked 2006.229.08:19:20.91/vblo/07,734.99,yes,locked 2006.229.08:19:20.91/vblo/08,744.99,yes,locked 2006.229.08:19:21.06/vabw/8 2006.229.08:19:21.21/vbbw/8 2006.229.08:19:21.30/xfe/off,on,12.5 2006.229.08:19:21.68/ifatt/23,28,28,28 2006.229.08:19:22.07/fmout-gps/S +4.47E-07 2006.229.08:19:22.11:!2006.229.08:22:58 2006.229.08:22:58.01:data_valid=off 2006.229.08:22:58.01:"et 2006.229.08:22:58.01:!+3s 2006.229.08:23:01.02:"tape 2006.229.08:23:01.02:postob 2006.229.08:23:01.11/cable/+6.3976E-03 2006.229.08:23:01.11/wx/29.50,1000.4,94 2006.229.08:23:01.17/fmout-gps/S +4.48E-07 2006.229.08:23:01.17:scan_name=229-0823,jd0608,280 2006.229.08:23:01.17:source=0014+813,001708.47,813508.1,2000.0,neutral 2006.229.08:23:03.13#flagr#flagr/antenna,new-source 2006.229.08:23:03.13:checkk5 2006.229.08:23:03.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:23:03.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:23:04.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:23:04.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:23:05.15/chk_obsdata//k5ts1/T2290819??a.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.08:23:05.55/chk_obsdata//k5ts2/T2290819??b.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.08:23:05.95/chk_obsdata//k5ts3/T2290819??c.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.08:23:06.38/chk_obsdata//k5ts4/T2290819??d.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.08:23:07.11/k5log//k5ts1_log_newline 2006.229.08:23:07.84/k5log//k5ts2_log_newline 2006.229.08:23:08.54/k5log//k5ts3_log_newline 2006.229.08:23:09.28/k5log//k5ts4_log_newline 2006.229.08:23:09.30/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:23:09.30:setupk4=1 2006.229.08:23:09.30$setupk4/echo=on 2006.229.08:23:09.30$setupk4/pcalon 2006.229.08:23:09.30$pcalon/"no phase cal control is implemented here 2006.229.08:23:09.30$setupk4/"tpicd=stop 2006.229.08:23:09.30$setupk4/"rec=synch_on 2006.229.08:23:09.30$setupk4/"rec_mode=128 2006.229.08:23:09.30$setupk4/!* 2006.229.08:23:09.30$setupk4/recpk4 2006.229.08:23:09.30$recpk4/recpatch= 2006.229.08:23:09.30$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:23:09.30$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:23:09.30$setupk4/vck44 2006.229.08:23:09.30$vck44/valo=1,524.99 2006.229.08:23:09.30#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.08:23:09.30#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.08:23:09.30#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:09.30#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:09.30#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:09.30#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:09.30#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:23:09.30#ibcon#first serial, iclass 32, count 0 2006.229.08:23:09.30#ibcon#enter sib2, iclass 32, count 0 2006.229.08:23:09.30#ibcon#flushed, iclass 32, count 0 2006.229.08:23:09.30#ibcon#about to write, iclass 32, count 0 2006.229.08:23:09.30#ibcon#wrote, iclass 32, count 0 2006.229.08:23:09.30#ibcon#about to read 3, iclass 32, count 0 2006.229.08:23:09.32#ibcon#read 3, iclass 32, count 0 2006.229.08:23:09.32#ibcon#about to read 4, iclass 32, count 0 2006.229.08:23:09.32#ibcon#read 4, iclass 32, count 0 2006.229.08:23:09.32#ibcon#about to read 5, iclass 32, count 0 2006.229.08:23:09.32#ibcon#read 5, iclass 32, count 0 2006.229.08:23:09.32#ibcon#about to read 6, iclass 32, count 0 2006.229.08:23:09.32#ibcon#read 6, iclass 32, count 0 2006.229.08:23:09.32#ibcon#end of sib2, iclass 32, count 0 2006.229.08:23:09.32#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:23:09.32#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:23:09.32#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:23:09.32#ibcon#*before write, iclass 32, count 0 2006.229.08:23:09.32#ibcon#enter sib2, iclass 32, count 0 2006.229.08:23:09.32#ibcon#flushed, iclass 32, count 0 2006.229.08:23:09.32#ibcon#about to write, iclass 32, count 0 2006.229.08:23:09.32#ibcon#wrote, iclass 32, count 0 2006.229.08:23:09.32#ibcon#about to read 3, iclass 32, count 0 2006.229.08:23:09.37#ibcon#read 3, iclass 32, count 0 2006.229.08:23:09.37#ibcon#about to read 4, iclass 32, count 0 2006.229.08:23:09.37#ibcon#read 4, iclass 32, count 0 2006.229.08:23:09.37#ibcon#about to read 5, iclass 32, count 0 2006.229.08:23:09.37#ibcon#read 5, iclass 32, count 0 2006.229.08:23:09.37#ibcon#about to read 6, iclass 32, count 0 2006.229.08:23:09.37#ibcon#read 6, iclass 32, count 0 2006.229.08:23:09.37#ibcon#end of sib2, iclass 32, count 0 2006.229.08:23:09.37#ibcon#*after write, iclass 32, count 0 2006.229.08:23:09.37#ibcon#*before return 0, iclass 32, count 0 2006.229.08:23:09.37#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:09.37#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:09.37#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:23:09.37#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:23:09.37$vck44/va=1,8 2006.229.08:23:09.37#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.08:23:09.37#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.08:23:09.37#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:09.37#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:09.37#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:09.37#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:09.37#ibcon#enter wrdev, iclass 34, count 2 2006.229.08:23:09.37#ibcon#first serial, iclass 34, count 2 2006.229.08:23:09.37#ibcon#enter sib2, iclass 34, count 2 2006.229.08:23:09.37#ibcon#flushed, iclass 34, count 2 2006.229.08:23:09.37#ibcon#about to write, iclass 34, count 2 2006.229.08:23:09.37#ibcon#wrote, iclass 34, count 2 2006.229.08:23:09.37#ibcon#about to read 3, iclass 34, count 2 2006.229.08:23:09.39#ibcon#read 3, iclass 34, count 2 2006.229.08:23:09.39#ibcon#about to read 4, iclass 34, count 2 2006.229.08:23:09.39#ibcon#read 4, iclass 34, count 2 2006.229.08:23:09.39#ibcon#about to read 5, iclass 34, count 2 2006.229.08:23:09.39#ibcon#read 5, iclass 34, count 2 2006.229.08:23:09.39#ibcon#about to read 6, iclass 34, count 2 2006.229.08:23:09.39#ibcon#read 6, iclass 34, count 2 2006.229.08:23:09.39#ibcon#end of sib2, iclass 34, count 2 2006.229.08:23:09.39#ibcon#*mode == 0, iclass 34, count 2 2006.229.08:23:09.39#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.08:23:09.39#ibcon#[25=AT01-08\r\n] 2006.229.08:23:09.39#ibcon#*before write, iclass 34, count 2 2006.229.08:23:09.39#ibcon#enter sib2, iclass 34, count 2 2006.229.08:23:09.39#ibcon#flushed, iclass 34, count 2 2006.229.08:23:09.39#ibcon#about to write, iclass 34, count 2 2006.229.08:23:09.39#ibcon#wrote, iclass 34, count 2 2006.229.08:23:09.39#ibcon#about to read 3, iclass 34, count 2 2006.229.08:23:09.42#ibcon#read 3, iclass 34, count 2 2006.229.08:23:09.42#ibcon#about to read 4, iclass 34, count 2 2006.229.08:23:09.42#ibcon#read 4, iclass 34, count 2 2006.229.08:23:09.42#ibcon#about to read 5, iclass 34, count 2 2006.229.08:23:09.42#ibcon#read 5, iclass 34, count 2 2006.229.08:23:09.42#ibcon#about to read 6, iclass 34, count 2 2006.229.08:23:09.42#ibcon#read 6, iclass 34, count 2 2006.229.08:23:09.42#ibcon#end of sib2, iclass 34, count 2 2006.229.08:23:09.42#ibcon#*after write, iclass 34, count 2 2006.229.08:23:09.42#ibcon#*before return 0, iclass 34, count 2 2006.229.08:23:09.42#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:09.42#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:09.42#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.08:23:09.42#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:09.42#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:09.54#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:09.54#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:09.54#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:23:09.54#ibcon#first serial, iclass 34, count 0 2006.229.08:23:09.54#ibcon#enter sib2, iclass 34, count 0 2006.229.08:23:09.54#ibcon#flushed, iclass 34, count 0 2006.229.08:23:09.54#ibcon#about to write, iclass 34, count 0 2006.229.08:23:09.54#ibcon#wrote, iclass 34, count 0 2006.229.08:23:09.54#ibcon#about to read 3, iclass 34, count 0 2006.229.08:23:09.56#ibcon#read 3, iclass 34, count 0 2006.229.08:23:09.56#ibcon#about to read 4, iclass 34, count 0 2006.229.08:23:09.56#ibcon#read 4, iclass 34, count 0 2006.229.08:23:09.56#ibcon#about to read 5, iclass 34, count 0 2006.229.08:23:09.56#ibcon#read 5, iclass 34, count 0 2006.229.08:23:09.56#ibcon#about to read 6, iclass 34, count 0 2006.229.08:23:09.56#ibcon#read 6, iclass 34, count 0 2006.229.08:23:09.56#ibcon#end of sib2, iclass 34, count 0 2006.229.08:23:09.56#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:23:09.56#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:23:09.56#ibcon#[25=USB\r\n] 2006.229.08:23:09.56#ibcon#*before write, iclass 34, count 0 2006.229.08:23:09.56#ibcon#enter sib2, iclass 34, count 0 2006.229.08:23:09.56#ibcon#flushed, iclass 34, count 0 2006.229.08:23:09.56#ibcon#about to write, iclass 34, count 0 2006.229.08:23:09.56#ibcon#wrote, iclass 34, count 0 2006.229.08:23:09.56#ibcon#about to read 3, iclass 34, count 0 2006.229.08:23:09.59#ibcon#read 3, iclass 34, count 0 2006.229.08:23:09.59#ibcon#about to read 4, iclass 34, count 0 2006.229.08:23:09.59#ibcon#read 4, iclass 34, count 0 2006.229.08:23:09.59#ibcon#about to read 5, iclass 34, count 0 2006.229.08:23:09.59#ibcon#read 5, iclass 34, count 0 2006.229.08:23:09.59#ibcon#about to read 6, iclass 34, count 0 2006.229.08:23:09.59#ibcon#read 6, iclass 34, count 0 2006.229.08:23:09.59#ibcon#end of sib2, iclass 34, count 0 2006.229.08:23:09.59#ibcon#*after write, iclass 34, count 0 2006.229.08:23:09.59#ibcon#*before return 0, iclass 34, count 0 2006.229.08:23:09.59#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:09.59#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:09.59#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:23:09.59#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:23:09.59$vck44/valo=2,534.99 2006.229.08:23:09.59#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.08:23:09.59#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.08:23:09.59#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:09.59#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:09.59#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:09.59#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:09.59#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:23:09.59#ibcon#first serial, iclass 36, count 0 2006.229.08:23:09.59#ibcon#enter sib2, iclass 36, count 0 2006.229.08:23:09.59#ibcon#flushed, iclass 36, count 0 2006.229.08:23:09.59#ibcon#about to write, iclass 36, count 0 2006.229.08:23:09.59#ibcon#wrote, iclass 36, count 0 2006.229.08:23:09.59#ibcon#about to read 3, iclass 36, count 0 2006.229.08:23:09.61#ibcon#read 3, iclass 36, count 0 2006.229.08:23:09.61#ibcon#about to read 4, iclass 36, count 0 2006.229.08:23:09.61#ibcon#read 4, iclass 36, count 0 2006.229.08:23:09.61#ibcon#about to read 5, iclass 36, count 0 2006.229.08:23:09.61#ibcon#read 5, iclass 36, count 0 2006.229.08:23:09.61#ibcon#about to read 6, iclass 36, count 0 2006.229.08:23:09.61#ibcon#read 6, iclass 36, count 0 2006.229.08:23:09.61#ibcon#end of sib2, iclass 36, count 0 2006.229.08:23:09.61#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:23:09.61#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:23:09.61#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:23:09.61#ibcon#*before write, iclass 36, count 0 2006.229.08:23:09.61#ibcon#enter sib2, iclass 36, count 0 2006.229.08:23:09.61#ibcon#flushed, iclass 36, count 0 2006.229.08:23:09.61#ibcon#about to write, iclass 36, count 0 2006.229.08:23:09.61#ibcon#wrote, iclass 36, count 0 2006.229.08:23:09.61#ibcon#about to read 3, iclass 36, count 0 2006.229.08:23:09.65#ibcon#read 3, iclass 36, count 0 2006.229.08:23:09.65#ibcon#about to read 4, iclass 36, count 0 2006.229.08:23:09.65#ibcon#read 4, iclass 36, count 0 2006.229.08:23:09.65#ibcon#about to read 5, iclass 36, count 0 2006.229.08:23:09.65#ibcon#read 5, iclass 36, count 0 2006.229.08:23:09.65#ibcon#about to read 6, iclass 36, count 0 2006.229.08:23:09.65#ibcon#read 6, iclass 36, count 0 2006.229.08:23:09.65#ibcon#end of sib2, iclass 36, count 0 2006.229.08:23:09.65#ibcon#*after write, iclass 36, count 0 2006.229.08:23:09.65#ibcon#*before return 0, iclass 36, count 0 2006.229.08:23:09.65#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:09.65#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:09.65#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:23:09.65#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:23:09.65$vck44/va=2,7 2006.229.08:23:09.65#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.08:23:09.65#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.08:23:09.65#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:09.65#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:09.71#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:09.71#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:09.71#ibcon#enter wrdev, iclass 38, count 2 2006.229.08:23:09.71#ibcon#first serial, iclass 38, count 2 2006.229.08:23:09.71#ibcon#enter sib2, iclass 38, count 2 2006.229.08:23:09.71#ibcon#flushed, iclass 38, count 2 2006.229.08:23:09.71#ibcon#about to write, iclass 38, count 2 2006.229.08:23:09.71#ibcon#wrote, iclass 38, count 2 2006.229.08:23:09.71#ibcon#about to read 3, iclass 38, count 2 2006.229.08:23:09.73#ibcon#read 3, iclass 38, count 2 2006.229.08:23:09.73#ibcon#about to read 4, iclass 38, count 2 2006.229.08:23:09.73#ibcon#read 4, iclass 38, count 2 2006.229.08:23:09.73#ibcon#about to read 5, iclass 38, count 2 2006.229.08:23:09.73#ibcon#read 5, iclass 38, count 2 2006.229.08:23:09.73#ibcon#about to read 6, iclass 38, count 2 2006.229.08:23:09.73#ibcon#read 6, iclass 38, count 2 2006.229.08:23:09.73#ibcon#end of sib2, iclass 38, count 2 2006.229.08:23:09.73#ibcon#*mode == 0, iclass 38, count 2 2006.229.08:23:09.73#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.08:23:09.73#ibcon#[25=AT02-07\r\n] 2006.229.08:23:09.73#ibcon#*before write, iclass 38, count 2 2006.229.08:23:09.73#ibcon#enter sib2, iclass 38, count 2 2006.229.08:23:09.73#ibcon#flushed, iclass 38, count 2 2006.229.08:23:09.73#ibcon#about to write, iclass 38, count 2 2006.229.08:23:09.73#ibcon#wrote, iclass 38, count 2 2006.229.08:23:09.73#ibcon#about to read 3, iclass 38, count 2 2006.229.08:23:09.76#ibcon#read 3, iclass 38, count 2 2006.229.08:23:09.76#ibcon#about to read 4, iclass 38, count 2 2006.229.08:23:09.76#ibcon#read 4, iclass 38, count 2 2006.229.08:23:09.76#ibcon#about to read 5, iclass 38, count 2 2006.229.08:23:09.76#ibcon#read 5, iclass 38, count 2 2006.229.08:23:09.76#ibcon#about to read 6, iclass 38, count 2 2006.229.08:23:09.76#ibcon#read 6, iclass 38, count 2 2006.229.08:23:09.76#ibcon#end of sib2, iclass 38, count 2 2006.229.08:23:09.76#ibcon#*after write, iclass 38, count 2 2006.229.08:23:09.76#ibcon#*before return 0, iclass 38, count 2 2006.229.08:23:09.76#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:09.76#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:09.76#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.08:23:09.76#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:09.76#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:09.88#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:09.88#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:09.88#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:23:09.88#ibcon#first serial, iclass 38, count 0 2006.229.08:23:09.88#ibcon#enter sib2, iclass 38, count 0 2006.229.08:23:09.88#ibcon#flushed, iclass 38, count 0 2006.229.08:23:09.88#ibcon#about to write, iclass 38, count 0 2006.229.08:23:09.88#ibcon#wrote, iclass 38, count 0 2006.229.08:23:09.88#ibcon#about to read 3, iclass 38, count 0 2006.229.08:23:09.90#ibcon#read 3, iclass 38, count 0 2006.229.08:23:09.90#ibcon#about to read 4, iclass 38, count 0 2006.229.08:23:09.90#ibcon#read 4, iclass 38, count 0 2006.229.08:23:09.90#ibcon#about to read 5, iclass 38, count 0 2006.229.08:23:09.90#ibcon#read 5, iclass 38, count 0 2006.229.08:23:09.90#ibcon#about to read 6, iclass 38, count 0 2006.229.08:23:09.90#ibcon#read 6, iclass 38, count 0 2006.229.08:23:09.90#ibcon#end of sib2, iclass 38, count 0 2006.229.08:23:09.90#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:23:09.90#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:23:09.90#ibcon#[25=USB\r\n] 2006.229.08:23:09.90#ibcon#*before write, iclass 38, count 0 2006.229.08:23:09.90#ibcon#enter sib2, iclass 38, count 0 2006.229.08:23:09.90#ibcon#flushed, iclass 38, count 0 2006.229.08:23:09.90#ibcon#about to write, iclass 38, count 0 2006.229.08:23:09.90#ibcon#wrote, iclass 38, count 0 2006.229.08:23:09.90#ibcon#about to read 3, iclass 38, count 0 2006.229.08:23:09.93#ibcon#read 3, iclass 38, count 0 2006.229.08:23:09.93#ibcon#about to read 4, iclass 38, count 0 2006.229.08:23:09.93#ibcon#read 4, iclass 38, count 0 2006.229.08:23:09.93#ibcon#about to read 5, iclass 38, count 0 2006.229.08:23:09.93#ibcon#read 5, iclass 38, count 0 2006.229.08:23:09.93#ibcon#about to read 6, iclass 38, count 0 2006.229.08:23:09.93#ibcon#read 6, iclass 38, count 0 2006.229.08:23:09.93#ibcon#end of sib2, iclass 38, count 0 2006.229.08:23:09.93#ibcon#*after write, iclass 38, count 0 2006.229.08:23:09.93#ibcon#*before return 0, iclass 38, count 0 2006.229.08:23:09.93#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:09.93#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:09.93#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:23:09.93#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:23:09.93$vck44/valo=3,564.99 2006.229.08:23:09.93#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.08:23:09.93#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.08:23:09.93#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:09.93#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:09.93#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:09.93#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:09.93#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:23:09.93#ibcon#first serial, iclass 40, count 0 2006.229.08:23:09.93#ibcon#enter sib2, iclass 40, count 0 2006.229.08:23:09.93#ibcon#flushed, iclass 40, count 0 2006.229.08:23:09.93#ibcon#about to write, iclass 40, count 0 2006.229.08:23:09.93#ibcon#wrote, iclass 40, count 0 2006.229.08:23:09.93#ibcon#about to read 3, iclass 40, count 0 2006.229.08:23:09.95#ibcon#read 3, iclass 40, count 0 2006.229.08:23:09.95#ibcon#about to read 4, iclass 40, count 0 2006.229.08:23:09.95#ibcon#read 4, iclass 40, count 0 2006.229.08:23:09.95#ibcon#about to read 5, iclass 40, count 0 2006.229.08:23:09.95#ibcon#read 5, iclass 40, count 0 2006.229.08:23:09.95#ibcon#about to read 6, iclass 40, count 0 2006.229.08:23:09.95#ibcon#read 6, iclass 40, count 0 2006.229.08:23:09.95#ibcon#end of sib2, iclass 40, count 0 2006.229.08:23:09.95#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:23:09.95#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:23:09.95#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:23:09.95#ibcon#*before write, iclass 40, count 0 2006.229.08:23:09.95#ibcon#enter sib2, iclass 40, count 0 2006.229.08:23:09.95#ibcon#flushed, iclass 40, count 0 2006.229.08:23:09.95#ibcon#about to write, iclass 40, count 0 2006.229.08:23:09.95#ibcon#wrote, iclass 40, count 0 2006.229.08:23:09.95#ibcon#about to read 3, iclass 40, count 0 2006.229.08:23:09.99#ibcon#read 3, iclass 40, count 0 2006.229.08:23:09.99#ibcon#about to read 4, iclass 40, count 0 2006.229.08:23:09.99#ibcon#read 4, iclass 40, count 0 2006.229.08:23:09.99#ibcon#about to read 5, iclass 40, count 0 2006.229.08:23:09.99#ibcon#read 5, iclass 40, count 0 2006.229.08:23:09.99#ibcon#about to read 6, iclass 40, count 0 2006.229.08:23:09.99#ibcon#read 6, iclass 40, count 0 2006.229.08:23:09.99#ibcon#end of sib2, iclass 40, count 0 2006.229.08:23:09.99#ibcon#*after write, iclass 40, count 0 2006.229.08:23:09.99#ibcon#*before return 0, iclass 40, count 0 2006.229.08:23:09.99#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:09.99#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:09.99#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:23:09.99#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:23:09.99$vck44/va=3,6 2006.229.08:23:09.99#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.08:23:09.99#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.08:23:09.99#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:09.99#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:10.05#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:10.05#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:10.05#ibcon#enter wrdev, iclass 4, count 2 2006.229.08:23:10.05#ibcon#first serial, iclass 4, count 2 2006.229.08:23:10.05#ibcon#enter sib2, iclass 4, count 2 2006.229.08:23:10.05#ibcon#flushed, iclass 4, count 2 2006.229.08:23:10.05#ibcon#about to write, iclass 4, count 2 2006.229.08:23:10.05#ibcon#wrote, iclass 4, count 2 2006.229.08:23:10.05#ibcon#about to read 3, iclass 4, count 2 2006.229.08:23:10.07#ibcon#read 3, iclass 4, count 2 2006.229.08:23:10.07#ibcon#about to read 4, iclass 4, count 2 2006.229.08:23:10.07#ibcon#read 4, iclass 4, count 2 2006.229.08:23:10.07#ibcon#about to read 5, iclass 4, count 2 2006.229.08:23:10.07#ibcon#read 5, iclass 4, count 2 2006.229.08:23:10.07#ibcon#about to read 6, iclass 4, count 2 2006.229.08:23:10.07#ibcon#read 6, iclass 4, count 2 2006.229.08:23:10.07#ibcon#end of sib2, iclass 4, count 2 2006.229.08:23:10.07#ibcon#*mode == 0, iclass 4, count 2 2006.229.08:23:10.07#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.08:23:10.07#ibcon#[25=AT03-06\r\n] 2006.229.08:23:10.07#ibcon#*before write, iclass 4, count 2 2006.229.08:23:10.07#ibcon#enter sib2, iclass 4, count 2 2006.229.08:23:10.07#ibcon#flushed, iclass 4, count 2 2006.229.08:23:10.07#ibcon#about to write, iclass 4, count 2 2006.229.08:23:10.07#ibcon#wrote, iclass 4, count 2 2006.229.08:23:10.07#ibcon#about to read 3, iclass 4, count 2 2006.229.08:23:10.10#ibcon#read 3, iclass 4, count 2 2006.229.08:23:10.10#ibcon#about to read 4, iclass 4, count 2 2006.229.08:23:10.10#ibcon#read 4, iclass 4, count 2 2006.229.08:23:10.10#ibcon#about to read 5, iclass 4, count 2 2006.229.08:23:10.10#ibcon#read 5, iclass 4, count 2 2006.229.08:23:10.10#ibcon#about to read 6, iclass 4, count 2 2006.229.08:23:10.10#ibcon#read 6, iclass 4, count 2 2006.229.08:23:10.10#ibcon#end of sib2, iclass 4, count 2 2006.229.08:23:10.10#ibcon#*after write, iclass 4, count 2 2006.229.08:23:10.10#ibcon#*before return 0, iclass 4, count 2 2006.229.08:23:10.10#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:10.10#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:10.10#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.08:23:10.10#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:10.10#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:10.11#abcon#<5=/05 2.3 3.9 29.50 941000.4\r\n> 2006.229.08:23:10.13#abcon#{5=INTERFACE CLEAR} 2006.229.08:23:10.19#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:23:10.22#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:10.22#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:10.22#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:23:10.22#ibcon#first serial, iclass 4, count 0 2006.229.08:23:10.22#ibcon#enter sib2, iclass 4, count 0 2006.229.08:23:10.22#ibcon#flushed, iclass 4, count 0 2006.229.08:23:10.22#ibcon#about to write, iclass 4, count 0 2006.229.08:23:10.22#ibcon#wrote, iclass 4, count 0 2006.229.08:23:10.22#ibcon#about to read 3, iclass 4, count 0 2006.229.08:23:10.24#ibcon#read 3, iclass 4, count 0 2006.229.08:23:10.24#ibcon#about to read 4, iclass 4, count 0 2006.229.08:23:10.24#ibcon#read 4, iclass 4, count 0 2006.229.08:23:10.24#ibcon#about to read 5, iclass 4, count 0 2006.229.08:23:10.24#ibcon#read 5, iclass 4, count 0 2006.229.08:23:10.24#ibcon#about to read 6, iclass 4, count 0 2006.229.08:23:10.24#ibcon#read 6, iclass 4, count 0 2006.229.08:23:10.24#ibcon#end of sib2, iclass 4, count 0 2006.229.08:23:10.24#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:23:10.24#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:23:10.24#ibcon#[25=USB\r\n] 2006.229.08:23:10.24#ibcon#*before write, iclass 4, count 0 2006.229.08:23:10.24#ibcon#enter sib2, iclass 4, count 0 2006.229.08:23:10.24#ibcon#flushed, iclass 4, count 0 2006.229.08:23:10.24#ibcon#about to write, iclass 4, count 0 2006.229.08:23:10.24#ibcon#wrote, iclass 4, count 0 2006.229.08:23:10.24#ibcon#about to read 3, iclass 4, count 0 2006.229.08:23:10.27#ibcon#read 3, iclass 4, count 0 2006.229.08:23:10.27#ibcon#about to read 4, iclass 4, count 0 2006.229.08:23:10.27#ibcon#read 4, iclass 4, count 0 2006.229.08:23:10.27#ibcon#about to read 5, iclass 4, count 0 2006.229.08:23:10.27#ibcon#read 5, iclass 4, count 0 2006.229.08:23:10.27#ibcon#about to read 6, iclass 4, count 0 2006.229.08:23:10.27#ibcon#read 6, iclass 4, count 0 2006.229.08:23:10.27#ibcon#end of sib2, iclass 4, count 0 2006.229.08:23:10.27#ibcon#*after write, iclass 4, count 0 2006.229.08:23:10.27#ibcon#*before return 0, iclass 4, count 0 2006.229.08:23:10.27#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:10.27#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:10.27#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:23:10.27#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:23:10.27$vck44/valo=4,624.99 2006.229.08:23:10.27#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.08:23:10.27#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.08:23:10.27#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:10.27#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:10.27#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:10.27#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:10.27#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:23:10.27#ibcon#first serial, iclass 12, count 0 2006.229.08:23:10.27#ibcon#enter sib2, iclass 12, count 0 2006.229.08:23:10.27#ibcon#flushed, iclass 12, count 0 2006.229.08:23:10.27#ibcon#about to write, iclass 12, count 0 2006.229.08:23:10.27#ibcon#wrote, iclass 12, count 0 2006.229.08:23:10.27#ibcon#about to read 3, iclass 12, count 0 2006.229.08:23:10.29#ibcon#read 3, iclass 12, count 0 2006.229.08:23:10.29#ibcon#about to read 4, iclass 12, count 0 2006.229.08:23:10.29#ibcon#read 4, iclass 12, count 0 2006.229.08:23:10.29#ibcon#about to read 5, iclass 12, count 0 2006.229.08:23:10.29#ibcon#read 5, iclass 12, count 0 2006.229.08:23:10.29#ibcon#about to read 6, iclass 12, count 0 2006.229.08:23:10.29#ibcon#read 6, iclass 12, count 0 2006.229.08:23:10.29#ibcon#end of sib2, iclass 12, count 0 2006.229.08:23:10.29#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:23:10.29#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:23:10.29#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:23:10.29#ibcon#*before write, iclass 12, count 0 2006.229.08:23:10.29#ibcon#enter sib2, iclass 12, count 0 2006.229.08:23:10.29#ibcon#flushed, iclass 12, count 0 2006.229.08:23:10.29#ibcon#about to write, iclass 12, count 0 2006.229.08:23:10.29#ibcon#wrote, iclass 12, count 0 2006.229.08:23:10.29#ibcon#about to read 3, iclass 12, count 0 2006.229.08:23:10.33#ibcon#read 3, iclass 12, count 0 2006.229.08:23:10.33#ibcon#about to read 4, iclass 12, count 0 2006.229.08:23:10.33#ibcon#read 4, iclass 12, count 0 2006.229.08:23:10.33#ibcon#about to read 5, iclass 12, count 0 2006.229.08:23:10.33#ibcon#read 5, iclass 12, count 0 2006.229.08:23:10.33#ibcon#about to read 6, iclass 12, count 0 2006.229.08:23:10.33#ibcon#read 6, iclass 12, count 0 2006.229.08:23:10.33#ibcon#end of sib2, iclass 12, count 0 2006.229.08:23:10.33#ibcon#*after write, iclass 12, count 0 2006.229.08:23:10.33#ibcon#*before return 0, iclass 12, count 0 2006.229.08:23:10.33#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:10.33#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:10.33#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:23:10.33#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:23:10.33$vck44/va=4,7 2006.229.08:23:10.33#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.08:23:10.33#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.08:23:10.33#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:10.33#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:10.39#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:10.39#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:10.39#ibcon#enter wrdev, iclass 14, count 2 2006.229.08:23:10.39#ibcon#first serial, iclass 14, count 2 2006.229.08:23:10.39#ibcon#enter sib2, iclass 14, count 2 2006.229.08:23:10.39#ibcon#flushed, iclass 14, count 2 2006.229.08:23:10.39#ibcon#about to write, iclass 14, count 2 2006.229.08:23:10.39#ibcon#wrote, iclass 14, count 2 2006.229.08:23:10.39#ibcon#about to read 3, iclass 14, count 2 2006.229.08:23:10.41#ibcon#read 3, iclass 14, count 2 2006.229.08:23:10.41#ibcon#about to read 4, iclass 14, count 2 2006.229.08:23:10.41#ibcon#read 4, iclass 14, count 2 2006.229.08:23:10.41#ibcon#about to read 5, iclass 14, count 2 2006.229.08:23:10.41#ibcon#read 5, iclass 14, count 2 2006.229.08:23:10.41#ibcon#about to read 6, iclass 14, count 2 2006.229.08:23:10.41#ibcon#read 6, iclass 14, count 2 2006.229.08:23:10.41#ibcon#end of sib2, iclass 14, count 2 2006.229.08:23:10.41#ibcon#*mode == 0, iclass 14, count 2 2006.229.08:23:10.41#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.08:23:10.41#ibcon#[25=AT04-07\r\n] 2006.229.08:23:10.41#ibcon#*before write, iclass 14, count 2 2006.229.08:23:10.41#ibcon#enter sib2, iclass 14, count 2 2006.229.08:23:10.41#ibcon#flushed, iclass 14, count 2 2006.229.08:23:10.41#ibcon#about to write, iclass 14, count 2 2006.229.08:23:10.41#ibcon#wrote, iclass 14, count 2 2006.229.08:23:10.41#ibcon#about to read 3, iclass 14, count 2 2006.229.08:23:10.44#ibcon#read 3, iclass 14, count 2 2006.229.08:23:10.44#ibcon#about to read 4, iclass 14, count 2 2006.229.08:23:10.44#ibcon#read 4, iclass 14, count 2 2006.229.08:23:10.44#ibcon#about to read 5, iclass 14, count 2 2006.229.08:23:10.44#ibcon#read 5, iclass 14, count 2 2006.229.08:23:10.44#ibcon#about to read 6, iclass 14, count 2 2006.229.08:23:10.44#ibcon#read 6, iclass 14, count 2 2006.229.08:23:10.44#ibcon#end of sib2, iclass 14, count 2 2006.229.08:23:10.44#ibcon#*after write, iclass 14, count 2 2006.229.08:23:10.44#ibcon#*before return 0, iclass 14, count 2 2006.229.08:23:10.44#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:10.44#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:10.44#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.08:23:10.44#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:10.44#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:10.56#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:10.56#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:10.56#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:23:10.56#ibcon#first serial, iclass 14, count 0 2006.229.08:23:10.56#ibcon#enter sib2, iclass 14, count 0 2006.229.08:23:10.56#ibcon#flushed, iclass 14, count 0 2006.229.08:23:10.56#ibcon#about to write, iclass 14, count 0 2006.229.08:23:10.56#ibcon#wrote, iclass 14, count 0 2006.229.08:23:10.56#ibcon#about to read 3, iclass 14, count 0 2006.229.08:23:10.58#ibcon#read 3, iclass 14, count 0 2006.229.08:23:10.58#ibcon#about to read 4, iclass 14, count 0 2006.229.08:23:10.58#ibcon#read 4, iclass 14, count 0 2006.229.08:23:10.58#ibcon#about to read 5, iclass 14, count 0 2006.229.08:23:10.58#ibcon#read 5, iclass 14, count 0 2006.229.08:23:10.58#ibcon#about to read 6, iclass 14, count 0 2006.229.08:23:10.58#ibcon#read 6, iclass 14, count 0 2006.229.08:23:10.58#ibcon#end of sib2, iclass 14, count 0 2006.229.08:23:10.58#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:23:10.58#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:23:10.58#ibcon#[25=USB\r\n] 2006.229.08:23:10.58#ibcon#*before write, iclass 14, count 0 2006.229.08:23:10.58#ibcon#enter sib2, iclass 14, count 0 2006.229.08:23:10.58#ibcon#flushed, iclass 14, count 0 2006.229.08:23:10.58#ibcon#about to write, iclass 14, count 0 2006.229.08:23:10.58#ibcon#wrote, iclass 14, count 0 2006.229.08:23:10.58#ibcon#about to read 3, iclass 14, count 0 2006.229.08:23:10.61#ibcon#read 3, iclass 14, count 0 2006.229.08:23:10.61#ibcon#about to read 4, iclass 14, count 0 2006.229.08:23:10.61#ibcon#read 4, iclass 14, count 0 2006.229.08:23:10.61#ibcon#about to read 5, iclass 14, count 0 2006.229.08:23:10.61#ibcon#read 5, iclass 14, count 0 2006.229.08:23:10.61#ibcon#about to read 6, iclass 14, count 0 2006.229.08:23:10.61#ibcon#read 6, iclass 14, count 0 2006.229.08:23:10.61#ibcon#end of sib2, iclass 14, count 0 2006.229.08:23:10.61#ibcon#*after write, iclass 14, count 0 2006.229.08:23:10.61#ibcon#*before return 0, iclass 14, count 0 2006.229.08:23:10.61#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:10.61#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:10.61#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:23:10.61#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:23:10.61$vck44/valo=5,734.99 2006.229.08:23:10.61#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.08:23:10.61#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.08:23:10.61#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:10.61#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:10.61#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:10.61#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:10.61#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:23:10.61#ibcon#first serial, iclass 16, count 0 2006.229.08:23:10.61#ibcon#enter sib2, iclass 16, count 0 2006.229.08:23:10.61#ibcon#flushed, iclass 16, count 0 2006.229.08:23:10.61#ibcon#about to write, iclass 16, count 0 2006.229.08:23:10.61#ibcon#wrote, iclass 16, count 0 2006.229.08:23:10.61#ibcon#about to read 3, iclass 16, count 0 2006.229.08:23:10.63#ibcon#read 3, iclass 16, count 0 2006.229.08:23:10.63#ibcon#about to read 4, iclass 16, count 0 2006.229.08:23:10.63#ibcon#read 4, iclass 16, count 0 2006.229.08:23:10.63#ibcon#about to read 5, iclass 16, count 0 2006.229.08:23:10.63#ibcon#read 5, iclass 16, count 0 2006.229.08:23:10.63#ibcon#about to read 6, iclass 16, count 0 2006.229.08:23:10.63#ibcon#read 6, iclass 16, count 0 2006.229.08:23:10.63#ibcon#end of sib2, iclass 16, count 0 2006.229.08:23:10.63#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:23:10.63#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:23:10.63#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:23:10.63#ibcon#*before write, iclass 16, count 0 2006.229.08:23:10.63#ibcon#enter sib2, iclass 16, count 0 2006.229.08:23:10.63#ibcon#flushed, iclass 16, count 0 2006.229.08:23:10.63#ibcon#about to write, iclass 16, count 0 2006.229.08:23:10.63#ibcon#wrote, iclass 16, count 0 2006.229.08:23:10.63#ibcon#about to read 3, iclass 16, count 0 2006.229.08:23:10.67#ibcon#read 3, iclass 16, count 0 2006.229.08:23:10.67#ibcon#about to read 4, iclass 16, count 0 2006.229.08:23:10.67#ibcon#read 4, iclass 16, count 0 2006.229.08:23:10.67#ibcon#about to read 5, iclass 16, count 0 2006.229.08:23:10.67#ibcon#read 5, iclass 16, count 0 2006.229.08:23:10.67#ibcon#about to read 6, iclass 16, count 0 2006.229.08:23:10.67#ibcon#read 6, iclass 16, count 0 2006.229.08:23:10.67#ibcon#end of sib2, iclass 16, count 0 2006.229.08:23:10.67#ibcon#*after write, iclass 16, count 0 2006.229.08:23:10.67#ibcon#*before return 0, iclass 16, count 0 2006.229.08:23:10.67#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:10.67#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:10.67#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:23:10.67#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:23:10.67$vck44/va=5,4 2006.229.08:23:10.67#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.08:23:10.67#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.08:23:10.67#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:10.67#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:10.73#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:10.73#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:10.73#ibcon#enter wrdev, iclass 18, count 2 2006.229.08:23:10.73#ibcon#first serial, iclass 18, count 2 2006.229.08:23:10.73#ibcon#enter sib2, iclass 18, count 2 2006.229.08:23:10.73#ibcon#flushed, iclass 18, count 2 2006.229.08:23:10.73#ibcon#about to write, iclass 18, count 2 2006.229.08:23:10.73#ibcon#wrote, iclass 18, count 2 2006.229.08:23:10.73#ibcon#about to read 3, iclass 18, count 2 2006.229.08:23:10.75#ibcon#read 3, iclass 18, count 2 2006.229.08:23:10.75#ibcon#about to read 4, iclass 18, count 2 2006.229.08:23:10.75#ibcon#read 4, iclass 18, count 2 2006.229.08:23:10.75#ibcon#about to read 5, iclass 18, count 2 2006.229.08:23:10.75#ibcon#read 5, iclass 18, count 2 2006.229.08:23:10.75#ibcon#about to read 6, iclass 18, count 2 2006.229.08:23:10.75#ibcon#read 6, iclass 18, count 2 2006.229.08:23:10.75#ibcon#end of sib2, iclass 18, count 2 2006.229.08:23:10.75#ibcon#*mode == 0, iclass 18, count 2 2006.229.08:23:10.75#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.08:23:10.75#ibcon#[25=AT05-04\r\n] 2006.229.08:23:10.75#ibcon#*before write, iclass 18, count 2 2006.229.08:23:10.75#ibcon#enter sib2, iclass 18, count 2 2006.229.08:23:10.75#ibcon#flushed, iclass 18, count 2 2006.229.08:23:10.75#ibcon#about to write, iclass 18, count 2 2006.229.08:23:10.75#ibcon#wrote, iclass 18, count 2 2006.229.08:23:10.75#ibcon#about to read 3, iclass 18, count 2 2006.229.08:23:10.78#ibcon#read 3, iclass 18, count 2 2006.229.08:23:10.78#ibcon#about to read 4, iclass 18, count 2 2006.229.08:23:10.78#ibcon#read 4, iclass 18, count 2 2006.229.08:23:10.78#ibcon#about to read 5, iclass 18, count 2 2006.229.08:23:10.78#ibcon#read 5, iclass 18, count 2 2006.229.08:23:10.78#ibcon#about to read 6, iclass 18, count 2 2006.229.08:23:10.78#ibcon#read 6, iclass 18, count 2 2006.229.08:23:10.78#ibcon#end of sib2, iclass 18, count 2 2006.229.08:23:10.78#ibcon#*after write, iclass 18, count 2 2006.229.08:23:10.78#ibcon#*before return 0, iclass 18, count 2 2006.229.08:23:10.78#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:10.78#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:10.78#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.08:23:10.78#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:10.78#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:10.90#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:10.90#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:10.90#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:23:10.90#ibcon#first serial, iclass 18, count 0 2006.229.08:23:10.90#ibcon#enter sib2, iclass 18, count 0 2006.229.08:23:10.90#ibcon#flushed, iclass 18, count 0 2006.229.08:23:10.90#ibcon#about to write, iclass 18, count 0 2006.229.08:23:10.90#ibcon#wrote, iclass 18, count 0 2006.229.08:23:10.90#ibcon#about to read 3, iclass 18, count 0 2006.229.08:23:10.92#ibcon#read 3, iclass 18, count 0 2006.229.08:23:10.92#ibcon#about to read 4, iclass 18, count 0 2006.229.08:23:10.92#ibcon#read 4, iclass 18, count 0 2006.229.08:23:10.92#ibcon#about to read 5, iclass 18, count 0 2006.229.08:23:10.92#ibcon#read 5, iclass 18, count 0 2006.229.08:23:10.92#ibcon#about to read 6, iclass 18, count 0 2006.229.08:23:10.92#ibcon#read 6, iclass 18, count 0 2006.229.08:23:10.92#ibcon#end of sib2, iclass 18, count 0 2006.229.08:23:10.92#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:23:10.92#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:23:10.92#ibcon#[25=USB\r\n] 2006.229.08:23:10.92#ibcon#*before write, iclass 18, count 0 2006.229.08:23:10.92#ibcon#enter sib2, iclass 18, count 0 2006.229.08:23:10.92#ibcon#flushed, iclass 18, count 0 2006.229.08:23:10.92#ibcon#about to write, iclass 18, count 0 2006.229.08:23:10.92#ibcon#wrote, iclass 18, count 0 2006.229.08:23:10.92#ibcon#about to read 3, iclass 18, count 0 2006.229.08:23:10.95#ibcon#read 3, iclass 18, count 0 2006.229.08:23:10.95#ibcon#about to read 4, iclass 18, count 0 2006.229.08:23:10.95#ibcon#read 4, iclass 18, count 0 2006.229.08:23:10.95#ibcon#about to read 5, iclass 18, count 0 2006.229.08:23:10.95#ibcon#read 5, iclass 18, count 0 2006.229.08:23:10.95#ibcon#about to read 6, iclass 18, count 0 2006.229.08:23:10.95#ibcon#read 6, iclass 18, count 0 2006.229.08:23:10.95#ibcon#end of sib2, iclass 18, count 0 2006.229.08:23:10.95#ibcon#*after write, iclass 18, count 0 2006.229.08:23:10.95#ibcon#*before return 0, iclass 18, count 0 2006.229.08:23:10.95#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:10.95#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:10.95#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:23:10.95#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:23:10.95$vck44/valo=6,814.99 2006.229.08:23:10.95#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.08:23:10.95#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.08:23:10.95#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:10.95#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:10.95#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:10.95#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:10.95#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:23:10.95#ibcon#first serial, iclass 20, count 0 2006.229.08:23:10.95#ibcon#enter sib2, iclass 20, count 0 2006.229.08:23:10.95#ibcon#flushed, iclass 20, count 0 2006.229.08:23:10.95#ibcon#about to write, iclass 20, count 0 2006.229.08:23:10.95#ibcon#wrote, iclass 20, count 0 2006.229.08:23:10.95#ibcon#about to read 3, iclass 20, count 0 2006.229.08:23:10.97#ibcon#read 3, iclass 20, count 0 2006.229.08:23:10.97#ibcon#about to read 4, iclass 20, count 0 2006.229.08:23:10.97#ibcon#read 4, iclass 20, count 0 2006.229.08:23:10.97#ibcon#about to read 5, iclass 20, count 0 2006.229.08:23:10.97#ibcon#read 5, iclass 20, count 0 2006.229.08:23:10.97#ibcon#about to read 6, iclass 20, count 0 2006.229.08:23:10.97#ibcon#read 6, iclass 20, count 0 2006.229.08:23:10.97#ibcon#end of sib2, iclass 20, count 0 2006.229.08:23:10.97#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:23:10.97#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:23:10.97#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:23:10.97#ibcon#*before write, iclass 20, count 0 2006.229.08:23:10.97#ibcon#enter sib2, iclass 20, count 0 2006.229.08:23:10.97#ibcon#flushed, iclass 20, count 0 2006.229.08:23:10.97#ibcon#about to write, iclass 20, count 0 2006.229.08:23:10.97#ibcon#wrote, iclass 20, count 0 2006.229.08:23:10.97#ibcon#about to read 3, iclass 20, count 0 2006.229.08:23:11.01#ibcon#read 3, iclass 20, count 0 2006.229.08:23:11.01#ibcon#about to read 4, iclass 20, count 0 2006.229.08:23:11.01#ibcon#read 4, iclass 20, count 0 2006.229.08:23:11.01#ibcon#about to read 5, iclass 20, count 0 2006.229.08:23:11.01#ibcon#read 5, iclass 20, count 0 2006.229.08:23:11.01#ibcon#about to read 6, iclass 20, count 0 2006.229.08:23:11.01#ibcon#read 6, iclass 20, count 0 2006.229.08:23:11.01#ibcon#end of sib2, iclass 20, count 0 2006.229.08:23:11.01#ibcon#*after write, iclass 20, count 0 2006.229.08:23:11.01#ibcon#*before return 0, iclass 20, count 0 2006.229.08:23:11.01#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:11.01#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:11.01#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:23:11.01#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:23:11.01$vck44/va=6,4 2006.229.08:23:11.01#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.08:23:11.01#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.08:23:11.01#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:11.01#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:11.07#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:11.07#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:11.07#ibcon#enter wrdev, iclass 22, count 2 2006.229.08:23:11.07#ibcon#first serial, iclass 22, count 2 2006.229.08:23:11.07#ibcon#enter sib2, iclass 22, count 2 2006.229.08:23:11.07#ibcon#flushed, iclass 22, count 2 2006.229.08:23:11.07#ibcon#about to write, iclass 22, count 2 2006.229.08:23:11.07#ibcon#wrote, iclass 22, count 2 2006.229.08:23:11.07#ibcon#about to read 3, iclass 22, count 2 2006.229.08:23:11.09#ibcon#read 3, iclass 22, count 2 2006.229.08:23:11.09#ibcon#about to read 4, iclass 22, count 2 2006.229.08:23:11.09#ibcon#read 4, iclass 22, count 2 2006.229.08:23:11.09#ibcon#about to read 5, iclass 22, count 2 2006.229.08:23:11.09#ibcon#read 5, iclass 22, count 2 2006.229.08:23:11.09#ibcon#about to read 6, iclass 22, count 2 2006.229.08:23:11.09#ibcon#read 6, iclass 22, count 2 2006.229.08:23:11.09#ibcon#end of sib2, iclass 22, count 2 2006.229.08:23:11.09#ibcon#*mode == 0, iclass 22, count 2 2006.229.08:23:11.09#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.08:23:11.09#ibcon#[25=AT06-04\r\n] 2006.229.08:23:11.09#ibcon#*before write, iclass 22, count 2 2006.229.08:23:11.09#ibcon#enter sib2, iclass 22, count 2 2006.229.08:23:11.09#ibcon#flushed, iclass 22, count 2 2006.229.08:23:11.09#ibcon#about to write, iclass 22, count 2 2006.229.08:23:11.09#ibcon#wrote, iclass 22, count 2 2006.229.08:23:11.09#ibcon#about to read 3, iclass 22, count 2 2006.229.08:23:11.12#ibcon#read 3, iclass 22, count 2 2006.229.08:23:11.12#ibcon#about to read 4, iclass 22, count 2 2006.229.08:23:11.12#ibcon#read 4, iclass 22, count 2 2006.229.08:23:11.12#ibcon#about to read 5, iclass 22, count 2 2006.229.08:23:11.12#ibcon#read 5, iclass 22, count 2 2006.229.08:23:11.12#ibcon#about to read 6, iclass 22, count 2 2006.229.08:23:11.12#ibcon#read 6, iclass 22, count 2 2006.229.08:23:11.12#ibcon#end of sib2, iclass 22, count 2 2006.229.08:23:11.12#ibcon#*after write, iclass 22, count 2 2006.229.08:23:11.12#ibcon#*before return 0, iclass 22, count 2 2006.229.08:23:11.12#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:11.12#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:11.12#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.08:23:11.12#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:11.12#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:11.24#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:11.24#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:11.24#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:23:11.24#ibcon#first serial, iclass 22, count 0 2006.229.08:23:11.24#ibcon#enter sib2, iclass 22, count 0 2006.229.08:23:11.24#ibcon#flushed, iclass 22, count 0 2006.229.08:23:11.24#ibcon#about to write, iclass 22, count 0 2006.229.08:23:11.24#ibcon#wrote, iclass 22, count 0 2006.229.08:23:11.24#ibcon#about to read 3, iclass 22, count 0 2006.229.08:23:11.26#ibcon#read 3, iclass 22, count 0 2006.229.08:23:11.26#ibcon#about to read 4, iclass 22, count 0 2006.229.08:23:11.26#ibcon#read 4, iclass 22, count 0 2006.229.08:23:11.26#ibcon#about to read 5, iclass 22, count 0 2006.229.08:23:11.26#ibcon#read 5, iclass 22, count 0 2006.229.08:23:11.26#ibcon#about to read 6, iclass 22, count 0 2006.229.08:23:11.26#ibcon#read 6, iclass 22, count 0 2006.229.08:23:11.26#ibcon#end of sib2, iclass 22, count 0 2006.229.08:23:11.26#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:23:11.26#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:23:11.26#ibcon#[25=USB\r\n] 2006.229.08:23:11.26#ibcon#*before write, iclass 22, count 0 2006.229.08:23:11.26#ibcon#enter sib2, iclass 22, count 0 2006.229.08:23:11.26#ibcon#flushed, iclass 22, count 0 2006.229.08:23:11.26#ibcon#about to write, iclass 22, count 0 2006.229.08:23:11.26#ibcon#wrote, iclass 22, count 0 2006.229.08:23:11.26#ibcon#about to read 3, iclass 22, count 0 2006.229.08:23:11.29#ibcon#read 3, iclass 22, count 0 2006.229.08:23:11.29#ibcon#about to read 4, iclass 22, count 0 2006.229.08:23:11.29#ibcon#read 4, iclass 22, count 0 2006.229.08:23:11.29#ibcon#about to read 5, iclass 22, count 0 2006.229.08:23:11.29#ibcon#read 5, iclass 22, count 0 2006.229.08:23:11.29#ibcon#about to read 6, iclass 22, count 0 2006.229.08:23:11.29#ibcon#read 6, iclass 22, count 0 2006.229.08:23:11.29#ibcon#end of sib2, iclass 22, count 0 2006.229.08:23:11.29#ibcon#*after write, iclass 22, count 0 2006.229.08:23:11.29#ibcon#*before return 0, iclass 22, count 0 2006.229.08:23:11.29#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:11.29#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:11.29#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:23:11.29#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:23:11.29$vck44/valo=7,864.99 2006.229.08:23:11.29#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.08:23:11.29#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.08:23:11.29#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:11.29#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:11.29#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:11.29#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:11.29#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:23:11.29#ibcon#first serial, iclass 24, count 0 2006.229.08:23:11.29#ibcon#enter sib2, iclass 24, count 0 2006.229.08:23:11.29#ibcon#flushed, iclass 24, count 0 2006.229.08:23:11.29#ibcon#about to write, iclass 24, count 0 2006.229.08:23:11.29#ibcon#wrote, iclass 24, count 0 2006.229.08:23:11.29#ibcon#about to read 3, iclass 24, count 0 2006.229.08:23:11.31#ibcon#read 3, iclass 24, count 0 2006.229.08:23:11.31#ibcon#about to read 4, iclass 24, count 0 2006.229.08:23:11.31#ibcon#read 4, iclass 24, count 0 2006.229.08:23:11.31#ibcon#about to read 5, iclass 24, count 0 2006.229.08:23:11.31#ibcon#read 5, iclass 24, count 0 2006.229.08:23:11.31#ibcon#about to read 6, iclass 24, count 0 2006.229.08:23:11.31#ibcon#read 6, iclass 24, count 0 2006.229.08:23:11.31#ibcon#end of sib2, iclass 24, count 0 2006.229.08:23:11.31#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:23:11.31#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:23:11.31#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:23:11.31#ibcon#*before write, iclass 24, count 0 2006.229.08:23:11.31#ibcon#enter sib2, iclass 24, count 0 2006.229.08:23:11.31#ibcon#flushed, iclass 24, count 0 2006.229.08:23:11.31#ibcon#about to write, iclass 24, count 0 2006.229.08:23:11.31#ibcon#wrote, iclass 24, count 0 2006.229.08:23:11.31#ibcon#about to read 3, iclass 24, count 0 2006.229.08:23:11.35#ibcon#read 3, iclass 24, count 0 2006.229.08:23:11.35#ibcon#about to read 4, iclass 24, count 0 2006.229.08:23:11.35#ibcon#read 4, iclass 24, count 0 2006.229.08:23:11.35#ibcon#about to read 5, iclass 24, count 0 2006.229.08:23:11.35#ibcon#read 5, iclass 24, count 0 2006.229.08:23:11.35#ibcon#about to read 6, iclass 24, count 0 2006.229.08:23:11.35#ibcon#read 6, iclass 24, count 0 2006.229.08:23:11.35#ibcon#end of sib2, iclass 24, count 0 2006.229.08:23:11.35#ibcon#*after write, iclass 24, count 0 2006.229.08:23:11.35#ibcon#*before return 0, iclass 24, count 0 2006.229.08:23:11.35#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:11.35#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:11.35#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:23:11.35#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:23:11.35$vck44/va=7,5 2006.229.08:23:11.35#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.08:23:11.35#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.08:23:11.35#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:11.35#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:11.41#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:11.41#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:11.41#ibcon#enter wrdev, iclass 26, count 2 2006.229.08:23:11.41#ibcon#first serial, iclass 26, count 2 2006.229.08:23:11.41#ibcon#enter sib2, iclass 26, count 2 2006.229.08:23:11.41#ibcon#flushed, iclass 26, count 2 2006.229.08:23:11.41#ibcon#about to write, iclass 26, count 2 2006.229.08:23:11.41#ibcon#wrote, iclass 26, count 2 2006.229.08:23:11.41#ibcon#about to read 3, iclass 26, count 2 2006.229.08:23:11.43#ibcon#read 3, iclass 26, count 2 2006.229.08:23:11.43#ibcon#about to read 4, iclass 26, count 2 2006.229.08:23:11.43#ibcon#read 4, iclass 26, count 2 2006.229.08:23:11.43#ibcon#about to read 5, iclass 26, count 2 2006.229.08:23:11.43#ibcon#read 5, iclass 26, count 2 2006.229.08:23:11.43#ibcon#about to read 6, iclass 26, count 2 2006.229.08:23:11.43#ibcon#read 6, iclass 26, count 2 2006.229.08:23:11.43#ibcon#end of sib2, iclass 26, count 2 2006.229.08:23:11.43#ibcon#*mode == 0, iclass 26, count 2 2006.229.08:23:11.43#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.08:23:11.43#ibcon#[25=AT07-05\r\n] 2006.229.08:23:11.43#ibcon#*before write, iclass 26, count 2 2006.229.08:23:11.43#ibcon#enter sib2, iclass 26, count 2 2006.229.08:23:11.43#ibcon#flushed, iclass 26, count 2 2006.229.08:23:11.43#ibcon#about to write, iclass 26, count 2 2006.229.08:23:11.43#ibcon#wrote, iclass 26, count 2 2006.229.08:23:11.43#ibcon#about to read 3, iclass 26, count 2 2006.229.08:23:11.46#ibcon#read 3, iclass 26, count 2 2006.229.08:23:11.46#ibcon#about to read 4, iclass 26, count 2 2006.229.08:23:11.46#ibcon#read 4, iclass 26, count 2 2006.229.08:23:11.46#ibcon#about to read 5, iclass 26, count 2 2006.229.08:23:11.46#ibcon#read 5, iclass 26, count 2 2006.229.08:23:11.46#ibcon#about to read 6, iclass 26, count 2 2006.229.08:23:11.46#ibcon#read 6, iclass 26, count 2 2006.229.08:23:11.46#ibcon#end of sib2, iclass 26, count 2 2006.229.08:23:11.46#ibcon#*after write, iclass 26, count 2 2006.229.08:23:11.46#ibcon#*before return 0, iclass 26, count 2 2006.229.08:23:11.46#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:11.46#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:11.46#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.08:23:11.46#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:11.46#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:11.58#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:11.58#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:11.58#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:23:11.58#ibcon#first serial, iclass 26, count 0 2006.229.08:23:11.58#ibcon#enter sib2, iclass 26, count 0 2006.229.08:23:11.58#ibcon#flushed, iclass 26, count 0 2006.229.08:23:11.58#ibcon#about to write, iclass 26, count 0 2006.229.08:23:11.58#ibcon#wrote, iclass 26, count 0 2006.229.08:23:11.58#ibcon#about to read 3, iclass 26, count 0 2006.229.08:23:11.60#ibcon#read 3, iclass 26, count 0 2006.229.08:23:11.60#ibcon#about to read 4, iclass 26, count 0 2006.229.08:23:11.60#ibcon#read 4, iclass 26, count 0 2006.229.08:23:11.60#ibcon#about to read 5, iclass 26, count 0 2006.229.08:23:11.60#ibcon#read 5, iclass 26, count 0 2006.229.08:23:11.60#ibcon#about to read 6, iclass 26, count 0 2006.229.08:23:11.60#ibcon#read 6, iclass 26, count 0 2006.229.08:23:11.60#ibcon#end of sib2, iclass 26, count 0 2006.229.08:23:11.60#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:23:11.60#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:23:11.60#ibcon#[25=USB\r\n] 2006.229.08:23:11.60#ibcon#*before write, iclass 26, count 0 2006.229.08:23:11.60#ibcon#enter sib2, iclass 26, count 0 2006.229.08:23:11.60#ibcon#flushed, iclass 26, count 0 2006.229.08:23:11.60#ibcon#about to write, iclass 26, count 0 2006.229.08:23:11.60#ibcon#wrote, iclass 26, count 0 2006.229.08:23:11.60#ibcon#about to read 3, iclass 26, count 0 2006.229.08:23:11.63#ibcon#read 3, iclass 26, count 0 2006.229.08:23:11.63#ibcon#about to read 4, iclass 26, count 0 2006.229.08:23:11.63#ibcon#read 4, iclass 26, count 0 2006.229.08:23:11.63#ibcon#about to read 5, iclass 26, count 0 2006.229.08:23:11.63#ibcon#read 5, iclass 26, count 0 2006.229.08:23:11.63#ibcon#about to read 6, iclass 26, count 0 2006.229.08:23:11.63#ibcon#read 6, iclass 26, count 0 2006.229.08:23:11.63#ibcon#end of sib2, iclass 26, count 0 2006.229.08:23:11.63#ibcon#*after write, iclass 26, count 0 2006.229.08:23:11.63#ibcon#*before return 0, iclass 26, count 0 2006.229.08:23:11.63#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:11.63#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:11.63#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:23:11.63#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:23:11.63$vck44/valo=8,884.99 2006.229.08:23:11.63#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.08:23:11.63#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.08:23:11.63#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:11.63#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:11.63#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:11.63#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:11.63#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:23:11.63#ibcon#first serial, iclass 28, count 0 2006.229.08:23:11.63#ibcon#enter sib2, iclass 28, count 0 2006.229.08:23:11.63#ibcon#flushed, iclass 28, count 0 2006.229.08:23:11.63#ibcon#about to write, iclass 28, count 0 2006.229.08:23:11.63#ibcon#wrote, iclass 28, count 0 2006.229.08:23:11.63#ibcon#about to read 3, iclass 28, count 0 2006.229.08:23:11.65#ibcon#read 3, iclass 28, count 0 2006.229.08:23:11.65#ibcon#about to read 4, iclass 28, count 0 2006.229.08:23:11.65#ibcon#read 4, iclass 28, count 0 2006.229.08:23:11.65#ibcon#about to read 5, iclass 28, count 0 2006.229.08:23:11.65#ibcon#read 5, iclass 28, count 0 2006.229.08:23:11.65#ibcon#about to read 6, iclass 28, count 0 2006.229.08:23:11.65#ibcon#read 6, iclass 28, count 0 2006.229.08:23:11.65#ibcon#end of sib2, iclass 28, count 0 2006.229.08:23:11.65#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:23:11.65#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:23:11.65#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:23:11.65#ibcon#*before write, iclass 28, count 0 2006.229.08:23:11.65#ibcon#enter sib2, iclass 28, count 0 2006.229.08:23:11.65#ibcon#flushed, iclass 28, count 0 2006.229.08:23:11.65#ibcon#about to write, iclass 28, count 0 2006.229.08:23:11.65#ibcon#wrote, iclass 28, count 0 2006.229.08:23:11.65#ibcon#about to read 3, iclass 28, count 0 2006.229.08:23:11.69#ibcon#read 3, iclass 28, count 0 2006.229.08:23:11.69#ibcon#about to read 4, iclass 28, count 0 2006.229.08:23:11.69#ibcon#read 4, iclass 28, count 0 2006.229.08:23:11.69#ibcon#about to read 5, iclass 28, count 0 2006.229.08:23:11.69#ibcon#read 5, iclass 28, count 0 2006.229.08:23:11.69#ibcon#about to read 6, iclass 28, count 0 2006.229.08:23:11.69#ibcon#read 6, iclass 28, count 0 2006.229.08:23:11.69#ibcon#end of sib2, iclass 28, count 0 2006.229.08:23:11.69#ibcon#*after write, iclass 28, count 0 2006.229.08:23:11.69#ibcon#*before return 0, iclass 28, count 0 2006.229.08:23:11.69#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:11.69#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:11.69#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:23:11.69#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:23:11.69$vck44/va=8,6 2006.229.08:23:11.69#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.08:23:11.69#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.08:23:11.69#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:11.69#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:23:11.75#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:23:11.75#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:23:11.75#ibcon#enter wrdev, iclass 30, count 2 2006.229.08:23:11.75#ibcon#first serial, iclass 30, count 2 2006.229.08:23:11.75#ibcon#enter sib2, iclass 30, count 2 2006.229.08:23:11.75#ibcon#flushed, iclass 30, count 2 2006.229.08:23:11.75#ibcon#about to write, iclass 30, count 2 2006.229.08:23:11.75#ibcon#wrote, iclass 30, count 2 2006.229.08:23:11.75#ibcon#about to read 3, iclass 30, count 2 2006.229.08:23:11.77#ibcon#read 3, iclass 30, count 2 2006.229.08:23:11.77#ibcon#about to read 4, iclass 30, count 2 2006.229.08:23:11.77#ibcon#read 4, iclass 30, count 2 2006.229.08:23:11.77#ibcon#about to read 5, iclass 30, count 2 2006.229.08:23:11.77#ibcon#read 5, iclass 30, count 2 2006.229.08:23:11.77#ibcon#about to read 6, iclass 30, count 2 2006.229.08:23:11.77#ibcon#read 6, iclass 30, count 2 2006.229.08:23:11.77#ibcon#end of sib2, iclass 30, count 2 2006.229.08:23:11.77#ibcon#*mode == 0, iclass 30, count 2 2006.229.08:23:11.77#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.08:23:11.77#ibcon#[25=AT08-06\r\n] 2006.229.08:23:11.77#ibcon#*before write, iclass 30, count 2 2006.229.08:23:11.77#ibcon#enter sib2, iclass 30, count 2 2006.229.08:23:11.77#ibcon#flushed, iclass 30, count 2 2006.229.08:23:11.77#ibcon#about to write, iclass 30, count 2 2006.229.08:23:11.77#ibcon#wrote, iclass 30, count 2 2006.229.08:23:11.77#ibcon#about to read 3, iclass 30, count 2 2006.229.08:23:11.80#ibcon#read 3, iclass 30, count 2 2006.229.08:23:11.80#ibcon#about to read 4, iclass 30, count 2 2006.229.08:23:11.80#ibcon#read 4, iclass 30, count 2 2006.229.08:23:11.80#ibcon#about to read 5, iclass 30, count 2 2006.229.08:23:11.80#ibcon#read 5, iclass 30, count 2 2006.229.08:23:11.80#ibcon#about to read 6, iclass 30, count 2 2006.229.08:23:11.80#ibcon#read 6, iclass 30, count 2 2006.229.08:23:11.80#ibcon#end of sib2, iclass 30, count 2 2006.229.08:23:11.80#ibcon#*after write, iclass 30, count 2 2006.229.08:23:11.80#ibcon#*before return 0, iclass 30, count 2 2006.229.08:23:11.80#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:23:11.80#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:23:11.80#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.08:23:11.80#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:11.80#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:23:11.92#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:23:11.92#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:23:11.92#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:23:11.92#ibcon#first serial, iclass 30, count 0 2006.229.08:23:11.92#ibcon#enter sib2, iclass 30, count 0 2006.229.08:23:11.92#ibcon#flushed, iclass 30, count 0 2006.229.08:23:11.92#ibcon#about to write, iclass 30, count 0 2006.229.08:23:11.92#ibcon#wrote, iclass 30, count 0 2006.229.08:23:11.92#ibcon#about to read 3, iclass 30, count 0 2006.229.08:23:11.94#ibcon#read 3, iclass 30, count 0 2006.229.08:23:11.94#ibcon#about to read 4, iclass 30, count 0 2006.229.08:23:11.94#ibcon#read 4, iclass 30, count 0 2006.229.08:23:11.94#ibcon#about to read 5, iclass 30, count 0 2006.229.08:23:11.94#ibcon#read 5, iclass 30, count 0 2006.229.08:23:11.94#ibcon#about to read 6, iclass 30, count 0 2006.229.08:23:11.94#ibcon#read 6, iclass 30, count 0 2006.229.08:23:11.94#ibcon#end of sib2, iclass 30, count 0 2006.229.08:23:11.94#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:23:11.94#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:23:11.94#ibcon#[25=USB\r\n] 2006.229.08:23:11.94#ibcon#*before write, iclass 30, count 0 2006.229.08:23:11.94#ibcon#enter sib2, iclass 30, count 0 2006.229.08:23:11.94#ibcon#flushed, iclass 30, count 0 2006.229.08:23:11.94#ibcon#about to write, iclass 30, count 0 2006.229.08:23:11.94#ibcon#wrote, iclass 30, count 0 2006.229.08:23:11.94#ibcon#about to read 3, iclass 30, count 0 2006.229.08:23:11.97#ibcon#read 3, iclass 30, count 0 2006.229.08:23:11.97#ibcon#about to read 4, iclass 30, count 0 2006.229.08:23:11.97#ibcon#read 4, iclass 30, count 0 2006.229.08:23:11.97#ibcon#about to read 5, iclass 30, count 0 2006.229.08:23:11.97#ibcon#read 5, iclass 30, count 0 2006.229.08:23:11.97#ibcon#about to read 6, iclass 30, count 0 2006.229.08:23:11.97#ibcon#read 6, iclass 30, count 0 2006.229.08:23:11.97#ibcon#end of sib2, iclass 30, count 0 2006.229.08:23:11.97#ibcon#*after write, iclass 30, count 0 2006.229.08:23:11.97#ibcon#*before return 0, iclass 30, count 0 2006.229.08:23:11.97#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:23:11.97#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:23:11.97#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:23:11.97#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:23:11.97$vck44/vblo=1,629.99 2006.229.08:23:11.97#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.08:23:11.97#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.08:23:11.97#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:11.97#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:11.97#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:11.97#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:11.97#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:23:11.97#ibcon#first serial, iclass 32, count 0 2006.229.08:23:11.97#ibcon#enter sib2, iclass 32, count 0 2006.229.08:23:11.97#ibcon#flushed, iclass 32, count 0 2006.229.08:23:11.97#ibcon#about to write, iclass 32, count 0 2006.229.08:23:11.97#ibcon#wrote, iclass 32, count 0 2006.229.08:23:11.97#ibcon#about to read 3, iclass 32, count 0 2006.229.08:23:11.99#ibcon#read 3, iclass 32, count 0 2006.229.08:23:11.99#ibcon#about to read 4, iclass 32, count 0 2006.229.08:23:11.99#ibcon#read 4, iclass 32, count 0 2006.229.08:23:11.99#ibcon#about to read 5, iclass 32, count 0 2006.229.08:23:11.99#ibcon#read 5, iclass 32, count 0 2006.229.08:23:11.99#ibcon#about to read 6, iclass 32, count 0 2006.229.08:23:11.99#ibcon#read 6, iclass 32, count 0 2006.229.08:23:11.99#ibcon#end of sib2, iclass 32, count 0 2006.229.08:23:11.99#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:23:11.99#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:23:11.99#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:23:11.99#ibcon#*before write, iclass 32, count 0 2006.229.08:23:11.99#ibcon#enter sib2, iclass 32, count 0 2006.229.08:23:11.99#ibcon#flushed, iclass 32, count 0 2006.229.08:23:11.99#ibcon#about to write, iclass 32, count 0 2006.229.08:23:11.99#ibcon#wrote, iclass 32, count 0 2006.229.08:23:11.99#ibcon#about to read 3, iclass 32, count 0 2006.229.08:23:12.03#ibcon#read 3, iclass 32, count 0 2006.229.08:23:12.03#ibcon#about to read 4, iclass 32, count 0 2006.229.08:23:12.03#ibcon#read 4, iclass 32, count 0 2006.229.08:23:12.03#ibcon#about to read 5, iclass 32, count 0 2006.229.08:23:12.03#ibcon#read 5, iclass 32, count 0 2006.229.08:23:12.03#ibcon#about to read 6, iclass 32, count 0 2006.229.08:23:12.03#ibcon#read 6, iclass 32, count 0 2006.229.08:23:12.03#ibcon#end of sib2, iclass 32, count 0 2006.229.08:23:12.03#ibcon#*after write, iclass 32, count 0 2006.229.08:23:12.03#ibcon#*before return 0, iclass 32, count 0 2006.229.08:23:12.03#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:12.03#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:23:12.03#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:23:12.03#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:23:12.03$vck44/vb=1,4 2006.229.08:23:12.03#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.08:23:12.03#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.08:23:12.03#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:12.03#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:12.03#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:12.03#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:12.03#ibcon#enter wrdev, iclass 34, count 2 2006.229.08:23:12.03#ibcon#first serial, iclass 34, count 2 2006.229.08:23:12.03#ibcon#enter sib2, iclass 34, count 2 2006.229.08:23:12.03#ibcon#flushed, iclass 34, count 2 2006.229.08:23:12.03#ibcon#about to write, iclass 34, count 2 2006.229.08:23:12.03#ibcon#wrote, iclass 34, count 2 2006.229.08:23:12.03#ibcon#about to read 3, iclass 34, count 2 2006.229.08:23:12.05#ibcon#read 3, iclass 34, count 2 2006.229.08:23:12.05#ibcon#about to read 4, iclass 34, count 2 2006.229.08:23:12.05#ibcon#read 4, iclass 34, count 2 2006.229.08:23:12.05#ibcon#about to read 5, iclass 34, count 2 2006.229.08:23:12.05#ibcon#read 5, iclass 34, count 2 2006.229.08:23:12.05#ibcon#about to read 6, iclass 34, count 2 2006.229.08:23:12.05#ibcon#read 6, iclass 34, count 2 2006.229.08:23:12.05#ibcon#end of sib2, iclass 34, count 2 2006.229.08:23:12.05#ibcon#*mode == 0, iclass 34, count 2 2006.229.08:23:12.05#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.08:23:12.05#ibcon#[27=AT01-04\r\n] 2006.229.08:23:12.05#ibcon#*before write, iclass 34, count 2 2006.229.08:23:12.05#ibcon#enter sib2, iclass 34, count 2 2006.229.08:23:12.05#ibcon#flushed, iclass 34, count 2 2006.229.08:23:12.05#ibcon#about to write, iclass 34, count 2 2006.229.08:23:12.05#ibcon#wrote, iclass 34, count 2 2006.229.08:23:12.05#ibcon#about to read 3, iclass 34, count 2 2006.229.08:23:12.08#ibcon#read 3, iclass 34, count 2 2006.229.08:23:12.08#ibcon#about to read 4, iclass 34, count 2 2006.229.08:23:12.08#ibcon#read 4, iclass 34, count 2 2006.229.08:23:12.08#ibcon#about to read 5, iclass 34, count 2 2006.229.08:23:12.08#ibcon#read 5, iclass 34, count 2 2006.229.08:23:12.08#ibcon#about to read 6, iclass 34, count 2 2006.229.08:23:12.08#ibcon#read 6, iclass 34, count 2 2006.229.08:23:12.08#ibcon#end of sib2, iclass 34, count 2 2006.229.08:23:12.08#ibcon#*after write, iclass 34, count 2 2006.229.08:23:12.08#ibcon#*before return 0, iclass 34, count 2 2006.229.08:23:12.08#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:12.08#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:23:12.08#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.08:23:12.08#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:12.08#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:12.20#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:12.20#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:12.20#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:23:12.20#ibcon#first serial, iclass 34, count 0 2006.229.08:23:12.20#ibcon#enter sib2, iclass 34, count 0 2006.229.08:23:12.20#ibcon#flushed, iclass 34, count 0 2006.229.08:23:12.20#ibcon#about to write, iclass 34, count 0 2006.229.08:23:12.20#ibcon#wrote, iclass 34, count 0 2006.229.08:23:12.20#ibcon#about to read 3, iclass 34, count 0 2006.229.08:23:12.22#ibcon#read 3, iclass 34, count 0 2006.229.08:23:12.22#ibcon#about to read 4, iclass 34, count 0 2006.229.08:23:12.22#ibcon#read 4, iclass 34, count 0 2006.229.08:23:12.22#ibcon#about to read 5, iclass 34, count 0 2006.229.08:23:12.22#ibcon#read 5, iclass 34, count 0 2006.229.08:23:12.22#ibcon#about to read 6, iclass 34, count 0 2006.229.08:23:12.22#ibcon#read 6, iclass 34, count 0 2006.229.08:23:12.22#ibcon#end of sib2, iclass 34, count 0 2006.229.08:23:12.22#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:23:12.22#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:23:12.22#ibcon#[27=USB\r\n] 2006.229.08:23:12.22#ibcon#*before write, iclass 34, count 0 2006.229.08:23:12.22#ibcon#enter sib2, iclass 34, count 0 2006.229.08:23:12.22#ibcon#flushed, iclass 34, count 0 2006.229.08:23:12.22#ibcon#about to write, iclass 34, count 0 2006.229.08:23:12.22#ibcon#wrote, iclass 34, count 0 2006.229.08:23:12.22#ibcon#about to read 3, iclass 34, count 0 2006.229.08:23:12.25#ibcon#read 3, iclass 34, count 0 2006.229.08:23:12.25#ibcon#about to read 4, iclass 34, count 0 2006.229.08:23:12.25#ibcon#read 4, iclass 34, count 0 2006.229.08:23:12.25#ibcon#about to read 5, iclass 34, count 0 2006.229.08:23:12.25#ibcon#read 5, iclass 34, count 0 2006.229.08:23:12.25#ibcon#about to read 6, iclass 34, count 0 2006.229.08:23:12.25#ibcon#read 6, iclass 34, count 0 2006.229.08:23:12.25#ibcon#end of sib2, iclass 34, count 0 2006.229.08:23:12.25#ibcon#*after write, iclass 34, count 0 2006.229.08:23:12.25#ibcon#*before return 0, iclass 34, count 0 2006.229.08:23:12.25#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:12.25#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:23:12.25#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:23:12.25#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:23:12.25$vck44/vblo=2,634.99 2006.229.08:23:12.25#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.08:23:12.25#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.08:23:12.25#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:12.25#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:12.25#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:12.25#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:12.25#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:23:12.25#ibcon#first serial, iclass 36, count 0 2006.229.08:23:12.25#ibcon#enter sib2, iclass 36, count 0 2006.229.08:23:12.25#ibcon#flushed, iclass 36, count 0 2006.229.08:23:12.25#ibcon#about to write, iclass 36, count 0 2006.229.08:23:12.25#ibcon#wrote, iclass 36, count 0 2006.229.08:23:12.25#ibcon#about to read 3, iclass 36, count 0 2006.229.08:23:12.27#ibcon#read 3, iclass 36, count 0 2006.229.08:23:12.27#ibcon#about to read 4, iclass 36, count 0 2006.229.08:23:12.27#ibcon#read 4, iclass 36, count 0 2006.229.08:23:12.27#ibcon#about to read 5, iclass 36, count 0 2006.229.08:23:12.27#ibcon#read 5, iclass 36, count 0 2006.229.08:23:12.27#ibcon#about to read 6, iclass 36, count 0 2006.229.08:23:12.27#ibcon#read 6, iclass 36, count 0 2006.229.08:23:12.27#ibcon#end of sib2, iclass 36, count 0 2006.229.08:23:12.27#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:23:12.27#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:23:12.27#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:23:12.27#ibcon#*before write, iclass 36, count 0 2006.229.08:23:12.27#ibcon#enter sib2, iclass 36, count 0 2006.229.08:23:12.27#ibcon#flushed, iclass 36, count 0 2006.229.08:23:12.27#ibcon#about to write, iclass 36, count 0 2006.229.08:23:12.27#ibcon#wrote, iclass 36, count 0 2006.229.08:23:12.27#ibcon#about to read 3, iclass 36, count 0 2006.229.08:23:12.31#ibcon#read 3, iclass 36, count 0 2006.229.08:23:12.31#ibcon#about to read 4, iclass 36, count 0 2006.229.08:23:12.31#ibcon#read 4, iclass 36, count 0 2006.229.08:23:12.31#ibcon#about to read 5, iclass 36, count 0 2006.229.08:23:12.31#ibcon#read 5, iclass 36, count 0 2006.229.08:23:12.31#ibcon#about to read 6, iclass 36, count 0 2006.229.08:23:12.31#ibcon#read 6, iclass 36, count 0 2006.229.08:23:12.31#ibcon#end of sib2, iclass 36, count 0 2006.229.08:23:12.31#ibcon#*after write, iclass 36, count 0 2006.229.08:23:12.31#ibcon#*before return 0, iclass 36, count 0 2006.229.08:23:12.31#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:12.31#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:23:12.31#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:23:12.31#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:23:12.31$vck44/vb=2,4 2006.229.08:23:12.31#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.08:23:12.31#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.08:23:12.31#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:12.31#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:12.37#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:12.37#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:12.37#ibcon#enter wrdev, iclass 38, count 2 2006.229.08:23:12.37#ibcon#first serial, iclass 38, count 2 2006.229.08:23:12.37#ibcon#enter sib2, iclass 38, count 2 2006.229.08:23:12.37#ibcon#flushed, iclass 38, count 2 2006.229.08:23:12.37#ibcon#about to write, iclass 38, count 2 2006.229.08:23:12.37#ibcon#wrote, iclass 38, count 2 2006.229.08:23:12.37#ibcon#about to read 3, iclass 38, count 2 2006.229.08:23:12.39#ibcon#read 3, iclass 38, count 2 2006.229.08:23:12.39#ibcon#about to read 4, iclass 38, count 2 2006.229.08:23:12.39#ibcon#read 4, iclass 38, count 2 2006.229.08:23:12.39#ibcon#about to read 5, iclass 38, count 2 2006.229.08:23:12.39#ibcon#read 5, iclass 38, count 2 2006.229.08:23:12.39#ibcon#about to read 6, iclass 38, count 2 2006.229.08:23:12.39#ibcon#read 6, iclass 38, count 2 2006.229.08:23:12.39#ibcon#end of sib2, iclass 38, count 2 2006.229.08:23:12.39#ibcon#*mode == 0, iclass 38, count 2 2006.229.08:23:12.39#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.08:23:12.39#ibcon#[27=AT02-04\r\n] 2006.229.08:23:12.39#ibcon#*before write, iclass 38, count 2 2006.229.08:23:12.39#ibcon#enter sib2, iclass 38, count 2 2006.229.08:23:12.39#ibcon#flushed, iclass 38, count 2 2006.229.08:23:12.39#ibcon#about to write, iclass 38, count 2 2006.229.08:23:12.39#ibcon#wrote, iclass 38, count 2 2006.229.08:23:12.39#ibcon#about to read 3, iclass 38, count 2 2006.229.08:23:12.42#ibcon#read 3, iclass 38, count 2 2006.229.08:23:12.42#ibcon#about to read 4, iclass 38, count 2 2006.229.08:23:12.42#ibcon#read 4, iclass 38, count 2 2006.229.08:23:12.42#ibcon#about to read 5, iclass 38, count 2 2006.229.08:23:12.42#ibcon#read 5, iclass 38, count 2 2006.229.08:23:12.42#ibcon#about to read 6, iclass 38, count 2 2006.229.08:23:12.42#ibcon#read 6, iclass 38, count 2 2006.229.08:23:12.42#ibcon#end of sib2, iclass 38, count 2 2006.229.08:23:12.42#ibcon#*after write, iclass 38, count 2 2006.229.08:23:12.42#ibcon#*before return 0, iclass 38, count 2 2006.229.08:23:12.42#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:12.42#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:23:12.42#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.08:23:12.42#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:12.42#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:12.54#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:12.54#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:12.54#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:23:12.54#ibcon#first serial, iclass 38, count 0 2006.229.08:23:12.54#ibcon#enter sib2, iclass 38, count 0 2006.229.08:23:12.54#ibcon#flushed, iclass 38, count 0 2006.229.08:23:12.54#ibcon#about to write, iclass 38, count 0 2006.229.08:23:12.54#ibcon#wrote, iclass 38, count 0 2006.229.08:23:12.54#ibcon#about to read 3, iclass 38, count 0 2006.229.08:23:12.56#ibcon#read 3, iclass 38, count 0 2006.229.08:23:12.56#ibcon#about to read 4, iclass 38, count 0 2006.229.08:23:12.56#ibcon#read 4, iclass 38, count 0 2006.229.08:23:12.56#ibcon#about to read 5, iclass 38, count 0 2006.229.08:23:12.56#ibcon#read 5, iclass 38, count 0 2006.229.08:23:12.56#ibcon#about to read 6, iclass 38, count 0 2006.229.08:23:12.56#ibcon#read 6, iclass 38, count 0 2006.229.08:23:12.56#ibcon#end of sib2, iclass 38, count 0 2006.229.08:23:12.56#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:23:12.56#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:23:12.56#ibcon#[27=USB\r\n] 2006.229.08:23:12.56#ibcon#*before write, iclass 38, count 0 2006.229.08:23:12.56#ibcon#enter sib2, iclass 38, count 0 2006.229.08:23:12.56#ibcon#flushed, iclass 38, count 0 2006.229.08:23:12.56#ibcon#about to write, iclass 38, count 0 2006.229.08:23:12.56#ibcon#wrote, iclass 38, count 0 2006.229.08:23:12.56#ibcon#about to read 3, iclass 38, count 0 2006.229.08:23:12.59#ibcon#read 3, iclass 38, count 0 2006.229.08:23:12.59#ibcon#about to read 4, iclass 38, count 0 2006.229.08:23:12.59#ibcon#read 4, iclass 38, count 0 2006.229.08:23:12.59#ibcon#about to read 5, iclass 38, count 0 2006.229.08:23:12.59#ibcon#read 5, iclass 38, count 0 2006.229.08:23:12.59#ibcon#about to read 6, iclass 38, count 0 2006.229.08:23:12.59#ibcon#read 6, iclass 38, count 0 2006.229.08:23:12.59#ibcon#end of sib2, iclass 38, count 0 2006.229.08:23:12.59#ibcon#*after write, iclass 38, count 0 2006.229.08:23:12.59#ibcon#*before return 0, iclass 38, count 0 2006.229.08:23:12.59#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:12.59#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:23:12.59#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:23:12.59#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:23:12.59$vck44/vblo=3,649.99 2006.229.08:23:12.59#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.08:23:12.59#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.08:23:12.59#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:12.59#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:12.59#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:12.59#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:12.59#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:23:12.59#ibcon#first serial, iclass 40, count 0 2006.229.08:23:12.59#ibcon#enter sib2, iclass 40, count 0 2006.229.08:23:12.59#ibcon#flushed, iclass 40, count 0 2006.229.08:23:12.59#ibcon#about to write, iclass 40, count 0 2006.229.08:23:12.59#ibcon#wrote, iclass 40, count 0 2006.229.08:23:12.59#ibcon#about to read 3, iclass 40, count 0 2006.229.08:23:12.61#ibcon#read 3, iclass 40, count 0 2006.229.08:23:12.61#ibcon#about to read 4, iclass 40, count 0 2006.229.08:23:12.61#ibcon#read 4, iclass 40, count 0 2006.229.08:23:12.61#ibcon#about to read 5, iclass 40, count 0 2006.229.08:23:12.61#ibcon#read 5, iclass 40, count 0 2006.229.08:23:12.61#ibcon#about to read 6, iclass 40, count 0 2006.229.08:23:12.61#ibcon#read 6, iclass 40, count 0 2006.229.08:23:12.61#ibcon#end of sib2, iclass 40, count 0 2006.229.08:23:12.61#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:23:12.61#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:23:12.61#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:23:12.61#ibcon#*before write, iclass 40, count 0 2006.229.08:23:12.61#ibcon#enter sib2, iclass 40, count 0 2006.229.08:23:12.61#ibcon#flushed, iclass 40, count 0 2006.229.08:23:12.61#ibcon#about to write, iclass 40, count 0 2006.229.08:23:12.61#ibcon#wrote, iclass 40, count 0 2006.229.08:23:12.61#ibcon#about to read 3, iclass 40, count 0 2006.229.08:23:12.65#ibcon#read 3, iclass 40, count 0 2006.229.08:23:12.65#ibcon#about to read 4, iclass 40, count 0 2006.229.08:23:12.65#ibcon#read 4, iclass 40, count 0 2006.229.08:23:12.65#ibcon#about to read 5, iclass 40, count 0 2006.229.08:23:12.65#ibcon#read 5, iclass 40, count 0 2006.229.08:23:12.65#ibcon#about to read 6, iclass 40, count 0 2006.229.08:23:12.65#ibcon#read 6, iclass 40, count 0 2006.229.08:23:12.65#ibcon#end of sib2, iclass 40, count 0 2006.229.08:23:12.65#ibcon#*after write, iclass 40, count 0 2006.229.08:23:12.65#ibcon#*before return 0, iclass 40, count 0 2006.229.08:23:12.65#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:12.65#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:23:12.65#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:23:12.65#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:23:12.65$vck44/vb=3,4 2006.229.08:23:12.65#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.08:23:12.65#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.08:23:12.65#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:12.65#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:12.71#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:12.71#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:12.71#ibcon#enter wrdev, iclass 4, count 2 2006.229.08:23:12.71#ibcon#first serial, iclass 4, count 2 2006.229.08:23:12.71#ibcon#enter sib2, iclass 4, count 2 2006.229.08:23:12.71#ibcon#flushed, iclass 4, count 2 2006.229.08:23:12.71#ibcon#about to write, iclass 4, count 2 2006.229.08:23:12.71#ibcon#wrote, iclass 4, count 2 2006.229.08:23:12.71#ibcon#about to read 3, iclass 4, count 2 2006.229.08:23:12.73#ibcon#read 3, iclass 4, count 2 2006.229.08:23:12.73#ibcon#about to read 4, iclass 4, count 2 2006.229.08:23:12.73#ibcon#read 4, iclass 4, count 2 2006.229.08:23:12.73#ibcon#about to read 5, iclass 4, count 2 2006.229.08:23:12.73#ibcon#read 5, iclass 4, count 2 2006.229.08:23:12.73#ibcon#about to read 6, iclass 4, count 2 2006.229.08:23:12.73#ibcon#read 6, iclass 4, count 2 2006.229.08:23:12.73#ibcon#end of sib2, iclass 4, count 2 2006.229.08:23:12.73#ibcon#*mode == 0, iclass 4, count 2 2006.229.08:23:12.73#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.08:23:12.73#ibcon#[27=AT03-04\r\n] 2006.229.08:23:12.73#ibcon#*before write, iclass 4, count 2 2006.229.08:23:12.73#ibcon#enter sib2, iclass 4, count 2 2006.229.08:23:12.73#ibcon#flushed, iclass 4, count 2 2006.229.08:23:12.73#ibcon#about to write, iclass 4, count 2 2006.229.08:23:12.73#ibcon#wrote, iclass 4, count 2 2006.229.08:23:12.73#ibcon#about to read 3, iclass 4, count 2 2006.229.08:23:12.76#ibcon#read 3, iclass 4, count 2 2006.229.08:23:12.76#ibcon#about to read 4, iclass 4, count 2 2006.229.08:23:12.76#ibcon#read 4, iclass 4, count 2 2006.229.08:23:12.76#ibcon#about to read 5, iclass 4, count 2 2006.229.08:23:12.76#ibcon#read 5, iclass 4, count 2 2006.229.08:23:12.76#ibcon#about to read 6, iclass 4, count 2 2006.229.08:23:12.76#ibcon#read 6, iclass 4, count 2 2006.229.08:23:12.76#ibcon#end of sib2, iclass 4, count 2 2006.229.08:23:12.76#ibcon#*after write, iclass 4, count 2 2006.229.08:23:12.76#ibcon#*before return 0, iclass 4, count 2 2006.229.08:23:12.76#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:12.76#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:23:12.76#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.08:23:12.76#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:12.76#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:12.88#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:12.88#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:12.88#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:23:12.88#ibcon#first serial, iclass 4, count 0 2006.229.08:23:12.88#ibcon#enter sib2, iclass 4, count 0 2006.229.08:23:12.88#ibcon#flushed, iclass 4, count 0 2006.229.08:23:12.88#ibcon#about to write, iclass 4, count 0 2006.229.08:23:12.88#ibcon#wrote, iclass 4, count 0 2006.229.08:23:12.88#ibcon#about to read 3, iclass 4, count 0 2006.229.08:23:12.90#ibcon#read 3, iclass 4, count 0 2006.229.08:23:12.90#ibcon#about to read 4, iclass 4, count 0 2006.229.08:23:12.90#ibcon#read 4, iclass 4, count 0 2006.229.08:23:12.90#ibcon#about to read 5, iclass 4, count 0 2006.229.08:23:12.90#ibcon#read 5, iclass 4, count 0 2006.229.08:23:12.90#ibcon#about to read 6, iclass 4, count 0 2006.229.08:23:12.90#ibcon#read 6, iclass 4, count 0 2006.229.08:23:12.90#ibcon#end of sib2, iclass 4, count 0 2006.229.08:23:12.90#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:23:12.90#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:23:12.90#ibcon#[27=USB\r\n] 2006.229.08:23:12.90#ibcon#*before write, iclass 4, count 0 2006.229.08:23:12.90#ibcon#enter sib2, iclass 4, count 0 2006.229.08:23:12.90#ibcon#flushed, iclass 4, count 0 2006.229.08:23:12.90#ibcon#about to write, iclass 4, count 0 2006.229.08:23:12.90#ibcon#wrote, iclass 4, count 0 2006.229.08:23:12.90#ibcon#about to read 3, iclass 4, count 0 2006.229.08:23:12.93#ibcon#read 3, iclass 4, count 0 2006.229.08:23:12.93#ibcon#about to read 4, iclass 4, count 0 2006.229.08:23:12.93#ibcon#read 4, iclass 4, count 0 2006.229.08:23:12.93#ibcon#about to read 5, iclass 4, count 0 2006.229.08:23:12.93#ibcon#read 5, iclass 4, count 0 2006.229.08:23:12.93#ibcon#about to read 6, iclass 4, count 0 2006.229.08:23:12.93#ibcon#read 6, iclass 4, count 0 2006.229.08:23:12.93#ibcon#end of sib2, iclass 4, count 0 2006.229.08:23:12.93#ibcon#*after write, iclass 4, count 0 2006.229.08:23:12.93#ibcon#*before return 0, iclass 4, count 0 2006.229.08:23:12.93#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:12.93#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:23:12.93#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:23:12.93#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:23:12.93$vck44/vblo=4,679.99 2006.229.08:23:12.93#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.08:23:12.93#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.08:23:12.93#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:12.93#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:23:12.93#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:23:12.93#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:23:12.93#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:23:12.93#ibcon#first serial, iclass 6, count 0 2006.229.08:23:12.93#ibcon#enter sib2, iclass 6, count 0 2006.229.08:23:12.93#ibcon#flushed, iclass 6, count 0 2006.229.08:23:12.93#ibcon#about to write, iclass 6, count 0 2006.229.08:23:12.93#ibcon#wrote, iclass 6, count 0 2006.229.08:23:12.93#ibcon#about to read 3, iclass 6, count 0 2006.229.08:23:12.95#ibcon#read 3, iclass 6, count 0 2006.229.08:23:12.95#ibcon#about to read 4, iclass 6, count 0 2006.229.08:23:12.95#ibcon#read 4, iclass 6, count 0 2006.229.08:23:12.95#ibcon#about to read 5, iclass 6, count 0 2006.229.08:23:12.95#ibcon#read 5, iclass 6, count 0 2006.229.08:23:12.95#ibcon#about to read 6, iclass 6, count 0 2006.229.08:23:12.95#ibcon#read 6, iclass 6, count 0 2006.229.08:23:12.95#ibcon#end of sib2, iclass 6, count 0 2006.229.08:23:12.95#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:23:12.95#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:23:12.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:23:12.95#ibcon#*before write, iclass 6, count 0 2006.229.08:23:12.95#ibcon#enter sib2, iclass 6, count 0 2006.229.08:23:12.95#ibcon#flushed, iclass 6, count 0 2006.229.08:23:12.95#ibcon#about to write, iclass 6, count 0 2006.229.08:23:12.95#ibcon#wrote, iclass 6, count 0 2006.229.08:23:12.95#ibcon#about to read 3, iclass 6, count 0 2006.229.08:23:12.99#ibcon#read 3, iclass 6, count 0 2006.229.08:23:12.99#ibcon#about to read 4, iclass 6, count 0 2006.229.08:23:12.99#ibcon#read 4, iclass 6, count 0 2006.229.08:23:12.99#ibcon#about to read 5, iclass 6, count 0 2006.229.08:23:12.99#ibcon#read 5, iclass 6, count 0 2006.229.08:23:12.99#ibcon#about to read 6, iclass 6, count 0 2006.229.08:23:12.99#ibcon#read 6, iclass 6, count 0 2006.229.08:23:12.99#ibcon#end of sib2, iclass 6, count 0 2006.229.08:23:12.99#ibcon#*after write, iclass 6, count 0 2006.229.08:23:12.99#ibcon#*before return 0, iclass 6, count 0 2006.229.08:23:12.99#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:23:12.99#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:23:12.99#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:23:12.99#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:23:12.99$vck44/vb=4,4 2006.229.08:23:12.99#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.08:23:12.99#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.08:23:12.99#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:12.99#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:23:13.05#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:23:13.05#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:23:13.05#ibcon#enter wrdev, iclass 10, count 2 2006.229.08:23:13.05#ibcon#first serial, iclass 10, count 2 2006.229.08:23:13.05#ibcon#enter sib2, iclass 10, count 2 2006.229.08:23:13.05#ibcon#flushed, iclass 10, count 2 2006.229.08:23:13.05#ibcon#about to write, iclass 10, count 2 2006.229.08:23:13.05#ibcon#wrote, iclass 10, count 2 2006.229.08:23:13.05#ibcon#about to read 3, iclass 10, count 2 2006.229.08:23:13.07#ibcon#read 3, iclass 10, count 2 2006.229.08:23:13.07#ibcon#about to read 4, iclass 10, count 2 2006.229.08:23:13.07#ibcon#read 4, iclass 10, count 2 2006.229.08:23:13.07#ibcon#about to read 5, iclass 10, count 2 2006.229.08:23:13.07#ibcon#read 5, iclass 10, count 2 2006.229.08:23:13.07#ibcon#about to read 6, iclass 10, count 2 2006.229.08:23:13.07#ibcon#read 6, iclass 10, count 2 2006.229.08:23:13.07#ibcon#end of sib2, iclass 10, count 2 2006.229.08:23:13.07#ibcon#*mode == 0, iclass 10, count 2 2006.229.08:23:13.07#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.08:23:13.07#ibcon#[27=AT04-04\r\n] 2006.229.08:23:13.07#ibcon#*before write, iclass 10, count 2 2006.229.08:23:13.07#ibcon#enter sib2, iclass 10, count 2 2006.229.08:23:13.07#ibcon#flushed, iclass 10, count 2 2006.229.08:23:13.07#ibcon#about to write, iclass 10, count 2 2006.229.08:23:13.07#ibcon#wrote, iclass 10, count 2 2006.229.08:23:13.07#ibcon#about to read 3, iclass 10, count 2 2006.229.08:23:13.10#ibcon#read 3, iclass 10, count 2 2006.229.08:23:13.10#ibcon#about to read 4, iclass 10, count 2 2006.229.08:23:13.10#ibcon#read 4, iclass 10, count 2 2006.229.08:23:13.10#ibcon#about to read 5, iclass 10, count 2 2006.229.08:23:13.10#ibcon#read 5, iclass 10, count 2 2006.229.08:23:13.10#ibcon#about to read 6, iclass 10, count 2 2006.229.08:23:13.10#ibcon#read 6, iclass 10, count 2 2006.229.08:23:13.10#ibcon#end of sib2, iclass 10, count 2 2006.229.08:23:13.10#ibcon#*after write, iclass 10, count 2 2006.229.08:23:13.10#ibcon#*before return 0, iclass 10, count 2 2006.229.08:23:13.10#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:23:13.10#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:23:13.10#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.08:23:13.10#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:13.10#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:23:13.22#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:23:13.22#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:23:13.22#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:23:13.22#ibcon#first serial, iclass 10, count 0 2006.229.08:23:13.22#ibcon#enter sib2, iclass 10, count 0 2006.229.08:23:13.22#ibcon#flushed, iclass 10, count 0 2006.229.08:23:13.22#ibcon#about to write, iclass 10, count 0 2006.229.08:23:13.22#ibcon#wrote, iclass 10, count 0 2006.229.08:23:13.22#ibcon#about to read 3, iclass 10, count 0 2006.229.08:23:13.24#ibcon#read 3, iclass 10, count 0 2006.229.08:23:13.24#ibcon#about to read 4, iclass 10, count 0 2006.229.08:23:13.24#ibcon#read 4, iclass 10, count 0 2006.229.08:23:13.24#ibcon#about to read 5, iclass 10, count 0 2006.229.08:23:13.24#ibcon#read 5, iclass 10, count 0 2006.229.08:23:13.24#ibcon#about to read 6, iclass 10, count 0 2006.229.08:23:13.24#ibcon#read 6, iclass 10, count 0 2006.229.08:23:13.24#ibcon#end of sib2, iclass 10, count 0 2006.229.08:23:13.24#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:23:13.24#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:23:13.24#ibcon#[27=USB\r\n] 2006.229.08:23:13.24#ibcon#*before write, iclass 10, count 0 2006.229.08:23:13.24#ibcon#enter sib2, iclass 10, count 0 2006.229.08:23:13.24#ibcon#flushed, iclass 10, count 0 2006.229.08:23:13.24#ibcon#about to write, iclass 10, count 0 2006.229.08:23:13.24#ibcon#wrote, iclass 10, count 0 2006.229.08:23:13.24#ibcon#about to read 3, iclass 10, count 0 2006.229.08:23:13.27#ibcon#read 3, iclass 10, count 0 2006.229.08:23:13.27#ibcon#about to read 4, iclass 10, count 0 2006.229.08:23:13.27#ibcon#read 4, iclass 10, count 0 2006.229.08:23:13.27#ibcon#about to read 5, iclass 10, count 0 2006.229.08:23:13.27#ibcon#read 5, iclass 10, count 0 2006.229.08:23:13.27#ibcon#about to read 6, iclass 10, count 0 2006.229.08:23:13.27#ibcon#read 6, iclass 10, count 0 2006.229.08:23:13.27#ibcon#end of sib2, iclass 10, count 0 2006.229.08:23:13.27#ibcon#*after write, iclass 10, count 0 2006.229.08:23:13.27#ibcon#*before return 0, iclass 10, count 0 2006.229.08:23:13.27#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:23:13.27#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:23:13.27#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:23:13.27#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:23:13.27$vck44/vblo=5,709.99 2006.229.08:23:13.27#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.08:23:13.27#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.08:23:13.27#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:13.27#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:13.27#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:13.27#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:13.27#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:23:13.27#ibcon#first serial, iclass 12, count 0 2006.229.08:23:13.27#ibcon#enter sib2, iclass 12, count 0 2006.229.08:23:13.27#ibcon#flushed, iclass 12, count 0 2006.229.08:23:13.27#ibcon#about to write, iclass 12, count 0 2006.229.08:23:13.27#ibcon#wrote, iclass 12, count 0 2006.229.08:23:13.27#ibcon#about to read 3, iclass 12, count 0 2006.229.08:23:13.29#ibcon#read 3, iclass 12, count 0 2006.229.08:23:13.29#ibcon#about to read 4, iclass 12, count 0 2006.229.08:23:13.29#ibcon#read 4, iclass 12, count 0 2006.229.08:23:13.29#ibcon#about to read 5, iclass 12, count 0 2006.229.08:23:13.29#ibcon#read 5, iclass 12, count 0 2006.229.08:23:13.29#ibcon#about to read 6, iclass 12, count 0 2006.229.08:23:13.29#ibcon#read 6, iclass 12, count 0 2006.229.08:23:13.29#ibcon#end of sib2, iclass 12, count 0 2006.229.08:23:13.29#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:23:13.29#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:23:13.29#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:23:13.29#ibcon#*before write, iclass 12, count 0 2006.229.08:23:13.29#ibcon#enter sib2, iclass 12, count 0 2006.229.08:23:13.29#ibcon#flushed, iclass 12, count 0 2006.229.08:23:13.29#ibcon#about to write, iclass 12, count 0 2006.229.08:23:13.29#ibcon#wrote, iclass 12, count 0 2006.229.08:23:13.29#ibcon#about to read 3, iclass 12, count 0 2006.229.08:23:13.33#ibcon#read 3, iclass 12, count 0 2006.229.08:23:13.33#ibcon#about to read 4, iclass 12, count 0 2006.229.08:23:13.33#ibcon#read 4, iclass 12, count 0 2006.229.08:23:13.33#ibcon#about to read 5, iclass 12, count 0 2006.229.08:23:13.33#ibcon#read 5, iclass 12, count 0 2006.229.08:23:13.33#ibcon#about to read 6, iclass 12, count 0 2006.229.08:23:13.33#ibcon#read 6, iclass 12, count 0 2006.229.08:23:13.33#ibcon#end of sib2, iclass 12, count 0 2006.229.08:23:13.33#ibcon#*after write, iclass 12, count 0 2006.229.08:23:13.33#ibcon#*before return 0, iclass 12, count 0 2006.229.08:23:13.33#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:13.33#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:23:13.33#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:23:13.33#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:23:13.33$vck44/vb=5,4 2006.229.08:23:13.33#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.08:23:13.33#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.08:23:13.33#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:13.33#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:13.39#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:13.39#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:13.39#ibcon#enter wrdev, iclass 14, count 2 2006.229.08:23:13.39#ibcon#first serial, iclass 14, count 2 2006.229.08:23:13.39#ibcon#enter sib2, iclass 14, count 2 2006.229.08:23:13.39#ibcon#flushed, iclass 14, count 2 2006.229.08:23:13.39#ibcon#about to write, iclass 14, count 2 2006.229.08:23:13.39#ibcon#wrote, iclass 14, count 2 2006.229.08:23:13.39#ibcon#about to read 3, iclass 14, count 2 2006.229.08:23:13.41#ibcon#read 3, iclass 14, count 2 2006.229.08:23:13.41#ibcon#about to read 4, iclass 14, count 2 2006.229.08:23:13.41#ibcon#read 4, iclass 14, count 2 2006.229.08:23:13.41#ibcon#about to read 5, iclass 14, count 2 2006.229.08:23:13.41#ibcon#read 5, iclass 14, count 2 2006.229.08:23:13.41#ibcon#about to read 6, iclass 14, count 2 2006.229.08:23:13.41#ibcon#read 6, iclass 14, count 2 2006.229.08:23:13.41#ibcon#end of sib2, iclass 14, count 2 2006.229.08:23:13.41#ibcon#*mode == 0, iclass 14, count 2 2006.229.08:23:13.41#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.08:23:13.41#ibcon#[27=AT05-04\r\n] 2006.229.08:23:13.41#ibcon#*before write, iclass 14, count 2 2006.229.08:23:13.41#ibcon#enter sib2, iclass 14, count 2 2006.229.08:23:13.41#ibcon#flushed, iclass 14, count 2 2006.229.08:23:13.41#ibcon#about to write, iclass 14, count 2 2006.229.08:23:13.41#ibcon#wrote, iclass 14, count 2 2006.229.08:23:13.41#ibcon#about to read 3, iclass 14, count 2 2006.229.08:23:13.44#ibcon#read 3, iclass 14, count 2 2006.229.08:23:13.44#ibcon#about to read 4, iclass 14, count 2 2006.229.08:23:13.44#ibcon#read 4, iclass 14, count 2 2006.229.08:23:13.44#ibcon#about to read 5, iclass 14, count 2 2006.229.08:23:13.44#ibcon#read 5, iclass 14, count 2 2006.229.08:23:13.44#ibcon#about to read 6, iclass 14, count 2 2006.229.08:23:13.44#ibcon#read 6, iclass 14, count 2 2006.229.08:23:13.44#ibcon#end of sib2, iclass 14, count 2 2006.229.08:23:13.44#ibcon#*after write, iclass 14, count 2 2006.229.08:23:13.44#ibcon#*before return 0, iclass 14, count 2 2006.229.08:23:13.44#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:13.44#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:23:13.44#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.08:23:13.44#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:13.44#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:13.56#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:13.56#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:13.56#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:23:13.56#ibcon#first serial, iclass 14, count 0 2006.229.08:23:13.56#ibcon#enter sib2, iclass 14, count 0 2006.229.08:23:13.56#ibcon#flushed, iclass 14, count 0 2006.229.08:23:13.56#ibcon#about to write, iclass 14, count 0 2006.229.08:23:13.56#ibcon#wrote, iclass 14, count 0 2006.229.08:23:13.56#ibcon#about to read 3, iclass 14, count 0 2006.229.08:23:13.58#ibcon#read 3, iclass 14, count 0 2006.229.08:23:13.58#ibcon#about to read 4, iclass 14, count 0 2006.229.08:23:13.58#ibcon#read 4, iclass 14, count 0 2006.229.08:23:13.58#ibcon#about to read 5, iclass 14, count 0 2006.229.08:23:13.58#ibcon#read 5, iclass 14, count 0 2006.229.08:23:13.58#ibcon#about to read 6, iclass 14, count 0 2006.229.08:23:13.58#ibcon#read 6, iclass 14, count 0 2006.229.08:23:13.58#ibcon#end of sib2, iclass 14, count 0 2006.229.08:23:13.58#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:23:13.58#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:23:13.58#ibcon#[27=USB\r\n] 2006.229.08:23:13.58#ibcon#*before write, iclass 14, count 0 2006.229.08:23:13.58#ibcon#enter sib2, iclass 14, count 0 2006.229.08:23:13.58#ibcon#flushed, iclass 14, count 0 2006.229.08:23:13.58#ibcon#about to write, iclass 14, count 0 2006.229.08:23:13.58#ibcon#wrote, iclass 14, count 0 2006.229.08:23:13.58#ibcon#about to read 3, iclass 14, count 0 2006.229.08:23:13.61#ibcon#read 3, iclass 14, count 0 2006.229.08:23:13.61#ibcon#about to read 4, iclass 14, count 0 2006.229.08:23:13.61#ibcon#read 4, iclass 14, count 0 2006.229.08:23:13.61#ibcon#about to read 5, iclass 14, count 0 2006.229.08:23:13.61#ibcon#read 5, iclass 14, count 0 2006.229.08:23:13.61#ibcon#about to read 6, iclass 14, count 0 2006.229.08:23:13.61#ibcon#read 6, iclass 14, count 0 2006.229.08:23:13.61#ibcon#end of sib2, iclass 14, count 0 2006.229.08:23:13.61#ibcon#*after write, iclass 14, count 0 2006.229.08:23:13.61#ibcon#*before return 0, iclass 14, count 0 2006.229.08:23:13.61#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:13.61#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:23:13.61#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:23:13.61#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:23:13.61$vck44/vblo=6,719.99 2006.229.08:23:13.61#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.08:23:13.61#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.08:23:13.61#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:13.61#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:13.61#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:13.61#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:13.61#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:23:13.61#ibcon#first serial, iclass 16, count 0 2006.229.08:23:13.61#ibcon#enter sib2, iclass 16, count 0 2006.229.08:23:13.61#ibcon#flushed, iclass 16, count 0 2006.229.08:23:13.61#ibcon#about to write, iclass 16, count 0 2006.229.08:23:13.61#ibcon#wrote, iclass 16, count 0 2006.229.08:23:13.61#ibcon#about to read 3, iclass 16, count 0 2006.229.08:23:13.63#ibcon#read 3, iclass 16, count 0 2006.229.08:23:13.63#ibcon#about to read 4, iclass 16, count 0 2006.229.08:23:13.63#ibcon#read 4, iclass 16, count 0 2006.229.08:23:13.63#ibcon#about to read 5, iclass 16, count 0 2006.229.08:23:13.63#ibcon#read 5, iclass 16, count 0 2006.229.08:23:13.63#ibcon#about to read 6, iclass 16, count 0 2006.229.08:23:13.63#ibcon#read 6, iclass 16, count 0 2006.229.08:23:13.63#ibcon#end of sib2, iclass 16, count 0 2006.229.08:23:13.63#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:23:13.63#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:23:13.63#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:23:13.63#ibcon#*before write, iclass 16, count 0 2006.229.08:23:13.63#ibcon#enter sib2, iclass 16, count 0 2006.229.08:23:13.63#ibcon#flushed, iclass 16, count 0 2006.229.08:23:13.63#ibcon#about to write, iclass 16, count 0 2006.229.08:23:13.63#ibcon#wrote, iclass 16, count 0 2006.229.08:23:13.63#ibcon#about to read 3, iclass 16, count 0 2006.229.08:23:13.67#ibcon#read 3, iclass 16, count 0 2006.229.08:23:13.67#ibcon#about to read 4, iclass 16, count 0 2006.229.08:23:13.67#ibcon#read 4, iclass 16, count 0 2006.229.08:23:13.67#ibcon#about to read 5, iclass 16, count 0 2006.229.08:23:13.67#ibcon#read 5, iclass 16, count 0 2006.229.08:23:13.67#ibcon#about to read 6, iclass 16, count 0 2006.229.08:23:13.67#ibcon#read 6, iclass 16, count 0 2006.229.08:23:13.67#ibcon#end of sib2, iclass 16, count 0 2006.229.08:23:13.67#ibcon#*after write, iclass 16, count 0 2006.229.08:23:13.67#ibcon#*before return 0, iclass 16, count 0 2006.229.08:23:13.67#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:13.67#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:23:13.67#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:23:13.67#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:23:13.67$vck44/vb=6,4 2006.229.08:23:13.67#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.08:23:13.67#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.08:23:13.67#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:13.67#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:13.73#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:13.73#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:13.73#ibcon#enter wrdev, iclass 18, count 2 2006.229.08:23:13.73#ibcon#first serial, iclass 18, count 2 2006.229.08:23:13.73#ibcon#enter sib2, iclass 18, count 2 2006.229.08:23:13.73#ibcon#flushed, iclass 18, count 2 2006.229.08:23:13.73#ibcon#about to write, iclass 18, count 2 2006.229.08:23:13.73#ibcon#wrote, iclass 18, count 2 2006.229.08:23:13.73#ibcon#about to read 3, iclass 18, count 2 2006.229.08:23:13.75#ibcon#read 3, iclass 18, count 2 2006.229.08:23:13.75#ibcon#about to read 4, iclass 18, count 2 2006.229.08:23:13.75#ibcon#read 4, iclass 18, count 2 2006.229.08:23:13.75#ibcon#about to read 5, iclass 18, count 2 2006.229.08:23:13.75#ibcon#read 5, iclass 18, count 2 2006.229.08:23:13.75#ibcon#about to read 6, iclass 18, count 2 2006.229.08:23:13.75#ibcon#read 6, iclass 18, count 2 2006.229.08:23:13.75#ibcon#end of sib2, iclass 18, count 2 2006.229.08:23:13.75#ibcon#*mode == 0, iclass 18, count 2 2006.229.08:23:13.75#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.08:23:13.75#ibcon#[27=AT06-04\r\n] 2006.229.08:23:13.75#ibcon#*before write, iclass 18, count 2 2006.229.08:23:13.75#ibcon#enter sib2, iclass 18, count 2 2006.229.08:23:13.75#ibcon#flushed, iclass 18, count 2 2006.229.08:23:13.75#ibcon#about to write, iclass 18, count 2 2006.229.08:23:13.75#ibcon#wrote, iclass 18, count 2 2006.229.08:23:13.75#ibcon#about to read 3, iclass 18, count 2 2006.229.08:23:13.78#ibcon#read 3, iclass 18, count 2 2006.229.08:23:13.78#ibcon#about to read 4, iclass 18, count 2 2006.229.08:23:13.78#ibcon#read 4, iclass 18, count 2 2006.229.08:23:13.78#ibcon#about to read 5, iclass 18, count 2 2006.229.08:23:13.78#ibcon#read 5, iclass 18, count 2 2006.229.08:23:13.78#ibcon#about to read 6, iclass 18, count 2 2006.229.08:23:13.78#ibcon#read 6, iclass 18, count 2 2006.229.08:23:13.78#ibcon#end of sib2, iclass 18, count 2 2006.229.08:23:13.78#ibcon#*after write, iclass 18, count 2 2006.229.08:23:13.78#ibcon#*before return 0, iclass 18, count 2 2006.229.08:23:13.78#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:13.78#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:23:13.78#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.08:23:13.78#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:13.78#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:13.90#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:13.90#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:13.90#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:23:13.90#ibcon#first serial, iclass 18, count 0 2006.229.08:23:13.90#ibcon#enter sib2, iclass 18, count 0 2006.229.08:23:13.90#ibcon#flushed, iclass 18, count 0 2006.229.08:23:13.90#ibcon#about to write, iclass 18, count 0 2006.229.08:23:13.90#ibcon#wrote, iclass 18, count 0 2006.229.08:23:13.90#ibcon#about to read 3, iclass 18, count 0 2006.229.08:23:13.92#ibcon#read 3, iclass 18, count 0 2006.229.08:23:13.92#ibcon#about to read 4, iclass 18, count 0 2006.229.08:23:13.92#ibcon#read 4, iclass 18, count 0 2006.229.08:23:13.92#ibcon#about to read 5, iclass 18, count 0 2006.229.08:23:13.92#ibcon#read 5, iclass 18, count 0 2006.229.08:23:13.92#ibcon#about to read 6, iclass 18, count 0 2006.229.08:23:13.92#ibcon#read 6, iclass 18, count 0 2006.229.08:23:13.92#ibcon#end of sib2, iclass 18, count 0 2006.229.08:23:13.92#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:23:13.92#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:23:13.92#ibcon#[27=USB\r\n] 2006.229.08:23:13.92#ibcon#*before write, iclass 18, count 0 2006.229.08:23:13.92#ibcon#enter sib2, iclass 18, count 0 2006.229.08:23:13.92#ibcon#flushed, iclass 18, count 0 2006.229.08:23:13.92#ibcon#about to write, iclass 18, count 0 2006.229.08:23:13.92#ibcon#wrote, iclass 18, count 0 2006.229.08:23:13.92#ibcon#about to read 3, iclass 18, count 0 2006.229.08:23:13.95#ibcon#read 3, iclass 18, count 0 2006.229.08:23:13.95#ibcon#about to read 4, iclass 18, count 0 2006.229.08:23:13.95#ibcon#read 4, iclass 18, count 0 2006.229.08:23:13.95#ibcon#about to read 5, iclass 18, count 0 2006.229.08:23:13.95#ibcon#read 5, iclass 18, count 0 2006.229.08:23:13.95#ibcon#about to read 6, iclass 18, count 0 2006.229.08:23:13.95#ibcon#read 6, iclass 18, count 0 2006.229.08:23:13.95#ibcon#end of sib2, iclass 18, count 0 2006.229.08:23:13.95#ibcon#*after write, iclass 18, count 0 2006.229.08:23:13.95#ibcon#*before return 0, iclass 18, count 0 2006.229.08:23:13.95#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:13.95#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:23:13.95#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:23:13.95#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:23:13.95$vck44/vblo=7,734.99 2006.229.08:23:13.95#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.08:23:13.95#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.08:23:13.95#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:13.95#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:13.95#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:13.95#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:13.95#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:23:13.95#ibcon#first serial, iclass 20, count 0 2006.229.08:23:13.95#ibcon#enter sib2, iclass 20, count 0 2006.229.08:23:13.95#ibcon#flushed, iclass 20, count 0 2006.229.08:23:13.95#ibcon#about to write, iclass 20, count 0 2006.229.08:23:13.95#ibcon#wrote, iclass 20, count 0 2006.229.08:23:13.95#ibcon#about to read 3, iclass 20, count 0 2006.229.08:23:13.97#ibcon#read 3, iclass 20, count 0 2006.229.08:23:13.97#ibcon#about to read 4, iclass 20, count 0 2006.229.08:23:13.97#ibcon#read 4, iclass 20, count 0 2006.229.08:23:13.97#ibcon#about to read 5, iclass 20, count 0 2006.229.08:23:13.97#ibcon#read 5, iclass 20, count 0 2006.229.08:23:13.97#ibcon#about to read 6, iclass 20, count 0 2006.229.08:23:13.97#ibcon#read 6, iclass 20, count 0 2006.229.08:23:13.97#ibcon#end of sib2, iclass 20, count 0 2006.229.08:23:13.97#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:23:13.97#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:23:13.97#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:23:13.97#ibcon#*before write, iclass 20, count 0 2006.229.08:23:13.97#ibcon#enter sib2, iclass 20, count 0 2006.229.08:23:13.97#ibcon#flushed, iclass 20, count 0 2006.229.08:23:13.97#ibcon#about to write, iclass 20, count 0 2006.229.08:23:13.97#ibcon#wrote, iclass 20, count 0 2006.229.08:23:13.97#ibcon#about to read 3, iclass 20, count 0 2006.229.08:23:14.01#ibcon#read 3, iclass 20, count 0 2006.229.08:23:14.01#ibcon#about to read 4, iclass 20, count 0 2006.229.08:23:14.01#ibcon#read 4, iclass 20, count 0 2006.229.08:23:14.01#ibcon#about to read 5, iclass 20, count 0 2006.229.08:23:14.01#ibcon#read 5, iclass 20, count 0 2006.229.08:23:14.01#ibcon#about to read 6, iclass 20, count 0 2006.229.08:23:14.01#ibcon#read 6, iclass 20, count 0 2006.229.08:23:14.01#ibcon#end of sib2, iclass 20, count 0 2006.229.08:23:14.01#ibcon#*after write, iclass 20, count 0 2006.229.08:23:14.01#ibcon#*before return 0, iclass 20, count 0 2006.229.08:23:14.01#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:14.01#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:23:14.01#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:23:14.01#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:23:14.01$vck44/vb=7,4 2006.229.08:23:14.01#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.08:23:14.01#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.08:23:14.01#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:14.01#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:14.07#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:14.07#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:14.07#ibcon#enter wrdev, iclass 22, count 2 2006.229.08:23:14.07#ibcon#first serial, iclass 22, count 2 2006.229.08:23:14.07#ibcon#enter sib2, iclass 22, count 2 2006.229.08:23:14.07#ibcon#flushed, iclass 22, count 2 2006.229.08:23:14.07#ibcon#about to write, iclass 22, count 2 2006.229.08:23:14.07#ibcon#wrote, iclass 22, count 2 2006.229.08:23:14.07#ibcon#about to read 3, iclass 22, count 2 2006.229.08:23:14.09#ibcon#read 3, iclass 22, count 2 2006.229.08:23:14.09#ibcon#about to read 4, iclass 22, count 2 2006.229.08:23:14.09#ibcon#read 4, iclass 22, count 2 2006.229.08:23:14.09#ibcon#about to read 5, iclass 22, count 2 2006.229.08:23:14.09#ibcon#read 5, iclass 22, count 2 2006.229.08:23:14.09#ibcon#about to read 6, iclass 22, count 2 2006.229.08:23:14.09#ibcon#read 6, iclass 22, count 2 2006.229.08:23:14.09#ibcon#end of sib2, iclass 22, count 2 2006.229.08:23:14.09#ibcon#*mode == 0, iclass 22, count 2 2006.229.08:23:14.09#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.08:23:14.09#ibcon#[27=AT07-04\r\n] 2006.229.08:23:14.09#ibcon#*before write, iclass 22, count 2 2006.229.08:23:14.09#ibcon#enter sib2, iclass 22, count 2 2006.229.08:23:14.09#ibcon#flushed, iclass 22, count 2 2006.229.08:23:14.09#ibcon#about to write, iclass 22, count 2 2006.229.08:23:14.09#ibcon#wrote, iclass 22, count 2 2006.229.08:23:14.09#ibcon#about to read 3, iclass 22, count 2 2006.229.08:23:14.12#ibcon#read 3, iclass 22, count 2 2006.229.08:23:14.12#ibcon#about to read 4, iclass 22, count 2 2006.229.08:23:14.12#ibcon#read 4, iclass 22, count 2 2006.229.08:23:14.12#ibcon#about to read 5, iclass 22, count 2 2006.229.08:23:14.12#ibcon#read 5, iclass 22, count 2 2006.229.08:23:14.12#ibcon#about to read 6, iclass 22, count 2 2006.229.08:23:14.12#ibcon#read 6, iclass 22, count 2 2006.229.08:23:14.12#ibcon#end of sib2, iclass 22, count 2 2006.229.08:23:14.12#ibcon#*after write, iclass 22, count 2 2006.229.08:23:14.12#ibcon#*before return 0, iclass 22, count 2 2006.229.08:23:14.12#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:14.12#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:23:14.12#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.08:23:14.12#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:14.12#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:14.24#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:14.24#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:14.24#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:23:14.24#ibcon#first serial, iclass 22, count 0 2006.229.08:23:14.24#ibcon#enter sib2, iclass 22, count 0 2006.229.08:23:14.24#ibcon#flushed, iclass 22, count 0 2006.229.08:23:14.24#ibcon#about to write, iclass 22, count 0 2006.229.08:23:14.24#ibcon#wrote, iclass 22, count 0 2006.229.08:23:14.24#ibcon#about to read 3, iclass 22, count 0 2006.229.08:23:14.26#ibcon#read 3, iclass 22, count 0 2006.229.08:23:14.26#ibcon#about to read 4, iclass 22, count 0 2006.229.08:23:14.26#ibcon#read 4, iclass 22, count 0 2006.229.08:23:14.26#ibcon#about to read 5, iclass 22, count 0 2006.229.08:23:14.26#ibcon#read 5, iclass 22, count 0 2006.229.08:23:14.26#ibcon#about to read 6, iclass 22, count 0 2006.229.08:23:14.26#ibcon#read 6, iclass 22, count 0 2006.229.08:23:14.26#ibcon#end of sib2, iclass 22, count 0 2006.229.08:23:14.26#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:23:14.26#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:23:14.26#ibcon#[27=USB\r\n] 2006.229.08:23:14.26#ibcon#*before write, iclass 22, count 0 2006.229.08:23:14.26#ibcon#enter sib2, iclass 22, count 0 2006.229.08:23:14.26#ibcon#flushed, iclass 22, count 0 2006.229.08:23:14.26#ibcon#about to write, iclass 22, count 0 2006.229.08:23:14.26#ibcon#wrote, iclass 22, count 0 2006.229.08:23:14.26#ibcon#about to read 3, iclass 22, count 0 2006.229.08:23:14.29#ibcon#read 3, iclass 22, count 0 2006.229.08:23:14.29#ibcon#about to read 4, iclass 22, count 0 2006.229.08:23:14.29#ibcon#read 4, iclass 22, count 0 2006.229.08:23:14.29#ibcon#about to read 5, iclass 22, count 0 2006.229.08:23:14.29#ibcon#read 5, iclass 22, count 0 2006.229.08:23:14.29#ibcon#about to read 6, iclass 22, count 0 2006.229.08:23:14.29#ibcon#read 6, iclass 22, count 0 2006.229.08:23:14.29#ibcon#end of sib2, iclass 22, count 0 2006.229.08:23:14.29#ibcon#*after write, iclass 22, count 0 2006.229.08:23:14.29#ibcon#*before return 0, iclass 22, count 0 2006.229.08:23:14.29#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:14.29#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:23:14.29#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:23:14.29#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:23:14.29$vck44/vblo=8,744.99 2006.229.08:23:14.29#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.08:23:14.29#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.08:23:14.29#ibcon#ireg 17 cls_cnt 0 2006.229.08:23:14.29#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:14.29#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:14.29#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:14.29#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:23:14.29#ibcon#first serial, iclass 24, count 0 2006.229.08:23:14.29#ibcon#enter sib2, iclass 24, count 0 2006.229.08:23:14.29#ibcon#flushed, iclass 24, count 0 2006.229.08:23:14.29#ibcon#about to write, iclass 24, count 0 2006.229.08:23:14.29#ibcon#wrote, iclass 24, count 0 2006.229.08:23:14.29#ibcon#about to read 3, iclass 24, count 0 2006.229.08:23:14.31#ibcon#read 3, iclass 24, count 0 2006.229.08:23:14.31#ibcon#about to read 4, iclass 24, count 0 2006.229.08:23:14.31#ibcon#read 4, iclass 24, count 0 2006.229.08:23:14.31#ibcon#about to read 5, iclass 24, count 0 2006.229.08:23:14.31#ibcon#read 5, iclass 24, count 0 2006.229.08:23:14.31#ibcon#about to read 6, iclass 24, count 0 2006.229.08:23:14.31#ibcon#read 6, iclass 24, count 0 2006.229.08:23:14.31#ibcon#end of sib2, iclass 24, count 0 2006.229.08:23:14.31#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:23:14.31#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:23:14.31#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:23:14.31#ibcon#*before write, iclass 24, count 0 2006.229.08:23:14.31#ibcon#enter sib2, iclass 24, count 0 2006.229.08:23:14.31#ibcon#flushed, iclass 24, count 0 2006.229.08:23:14.31#ibcon#about to write, iclass 24, count 0 2006.229.08:23:14.31#ibcon#wrote, iclass 24, count 0 2006.229.08:23:14.31#ibcon#about to read 3, iclass 24, count 0 2006.229.08:23:14.35#ibcon#read 3, iclass 24, count 0 2006.229.08:23:14.35#ibcon#about to read 4, iclass 24, count 0 2006.229.08:23:14.35#ibcon#read 4, iclass 24, count 0 2006.229.08:23:14.35#ibcon#about to read 5, iclass 24, count 0 2006.229.08:23:14.35#ibcon#read 5, iclass 24, count 0 2006.229.08:23:14.35#ibcon#about to read 6, iclass 24, count 0 2006.229.08:23:14.35#ibcon#read 6, iclass 24, count 0 2006.229.08:23:14.35#ibcon#end of sib2, iclass 24, count 0 2006.229.08:23:14.35#ibcon#*after write, iclass 24, count 0 2006.229.08:23:14.35#ibcon#*before return 0, iclass 24, count 0 2006.229.08:23:14.35#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:14.35#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:23:14.35#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:23:14.35#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:23:14.35$vck44/vb=8,4 2006.229.08:23:14.35#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.08:23:14.35#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.08:23:14.35#ibcon#ireg 11 cls_cnt 2 2006.229.08:23:14.35#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:14.41#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:14.41#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:14.41#ibcon#enter wrdev, iclass 26, count 2 2006.229.08:23:14.41#ibcon#first serial, iclass 26, count 2 2006.229.08:23:14.41#ibcon#enter sib2, iclass 26, count 2 2006.229.08:23:14.41#ibcon#flushed, iclass 26, count 2 2006.229.08:23:14.41#ibcon#about to write, iclass 26, count 2 2006.229.08:23:14.41#ibcon#wrote, iclass 26, count 2 2006.229.08:23:14.41#ibcon#about to read 3, iclass 26, count 2 2006.229.08:23:14.43#ibcon#read 3, iclass 26, count 2 2006.229.08:23:14.43#ibcon#about to read 4, iclass 26, count 2 2006.229.08:23:14.43#ibcon#read 4, iclass 26, count 2 2006.229.08:23:14.43#ibcon#about to read 5, iclass 26, count 2 2006.229.08:23:14.43#ibcon#read 5, iclass 26, count 2 2006.229.08:23:14.43#ibcon#about to read 6, iclass 26, count 2 2006.229.08:23:14.43#ibcon#read 6, iclass 26, count 2 2006.229.08:23:14.43#ibcon#end of sib2, iclass 26, count 2 2006.229.08:23:14.43#ibcon#*mode == 0, iclass 26, count 2 2006.229.08:23:14.43#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.08:23:14.43#ibcon#[27=AT08-04\r\n] 2006.229.08:23:14.43#ibcon#*before write, iclass 26, count 2 2006.229.08:23:14.43#ibcon#enter sib2, iclass 26, count 2 2006.229.08:23:14.43#ibcon#flushed, iclass 26, count 2 2006.229.08:23:14.43#ibcon#about to write, iclass 26, count 2 2006.229.08:23:14.43#ibcon#wrote, iclass 26, count 2 2006.229.08:23:14.43#ibcon#about to read 3, iclass 26, count 2 2006.229.08:23:14.46#ibcon#read 3, iclass 26, count 2 2006.229.08:23:14.46#ibcon#about to read 4, iclass 26, count 2 2006.229.08:23:14.46#ibcon#read 4, iclass 26, count 2 2006.229.08:23:14.46#ibcon#about to read 5, iclass 26, count 2 2006.229.08:23:14.46#ibcon#read 5, iclass 26, count 2 2006.229.08:23:14.46#ibcon#about to read 6, iclass 26, count 2 2006.229.08:23:14.46#ibcon#read 6, iclass 26, count 2 2006.229.08:23:14.46#ibcon#end of sib2, iclass 26, count 2 2006.229.08:23:14.46#ibcon#*after write, iclass 26, count 2 2006.229.08:23:14.46#ibcon#*before return 0, iclass 26, count 2 2006.229.08:23:14.46#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:14.46#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:23:14.46#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.08:23:14.46#ibcon#ireg 7 cls_cnt 0 2006.229.08:23:14.46#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:14.58#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:14.58#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:14.58#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:23:14.58#ibcon#first serial, iclass 26, count 0 2006.229.08:23:14.58#ibcon#enter sib2, iclass 26, count 0 2006.229.08:23:14.58#ibcon#flushed, iclass 26, count 0 2006.229.08:23:14.58#ibcon#about to write, iclass 26, count 0 2006.229.08:23:14.58#ibcon#wrote, iclass 26, count 0 2006.229.08:23:14.58#ibcon#about to read 3, iclass 26, count 0 2006.229.08:23:14.60#ibcon#read 3, iclass 26, count 0 2006.229.08:23:14.60#ibcon#about to read 4, iclass 26, count 0 2006.229.08:23:14.60#ibcon#read 4, iclass 26, count 0 2006.229.08:23:14.60#ibcon#about to read 5, iclass 26, count 0 2006.229.08:23:14.60#ibcon#read 5, iclass 26, count 0 2006.229.08:23:14.60#ibcon#about to read 6, iclass 26, count 0 2006.229.08:23:14.60#ibcon#read 6, iclass 26, count 0 2006.229.08:23:14.60#ibcon#end of sib2, iclass 26, count 0 2006.229.08:23:14.60#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:23:14.60#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:23:14.60#ibcon#[27=USB\r\n] 2006.229.08:23:14.60#ibcon#*before write, iclass 26, count 0 2006.229.08:23:14.60#ibcon#enter sib2, iclass 26, count 0 2006.229.08:23:14.60#ibcon#flushed, iclass 26, count 0 2006.229.08:23:14.60#ibcon#about to write, iclass 26, count 0 2006.229.08:23:14.60#ibcon#wrote, iclass 26, count 0 2006.229.08:23:14.60#ibcon#about to read 3, iclass 26, count 0 2006.229.08:23:14.63#ibcon#read 3, iclass 26, count 0 2006.229.08:23:14.63#ibcon#about to read 4, iclass 26, count 0 2006.229.08:23:14.63#ibcon#read 4, iclass 26, count 0 2006.229.08:23:14.63#ibcon#about to read 5, iclass 26, count 0 2006.229.08:23:14.63#ibcon#read 5, iclass 26, count 0 2006.229.08:23:14.63#ibcon#about to read 6, iclass 26, count 0 2006.229.08:23:14.63#ibcon#read 6, iclass 26, count 0 2006.229.08:23:14.63#ibcon#end of sib2, iclass 26, count 0 2006.229.08:23:14.63#ibcon#*after write, iclass 26, count 0 2006.229.08:23:14.63#ibcon#*before return 0, iclass 26, count 0 2006.229.08:23:14.63#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:14.63#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:23:14.63#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:23:14.63#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:23:14.63$vck44/vabw=wide 2006.229.08:23:14.63#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.08:23:14.63#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.08:23:14.63#ibcon#ireg 8 cls_cnt 0 2006.229.08:23:14.63#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:14.63#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:14.63#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:14.63#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:23:14.63#ibcon#first serial, iclass 28, count 0 2006.229.08:23:14.63#ibcon#enter sib2, iclass 28, count 0 2006.229.08:23:14.63#ibcon#flushed, iclass 28, count 0 2006.229.08:23:14.63#ibcon#about to write, iclass 28, count 0 2006.229.08:23:14.63#ibcon#wrote, iclass 28, count 0 2006.229.08:23:14.63#ibcon#about to read 3, iclass 28, count 0 2006.229.08:23:14.65#ibcon#read 3, iclass 28, count 0 2006.229.08:23:14.65#ibcon#about to read 4, iclass 28, count 0 2006.229.08:23:14.65#ibcon#read 4, iclass 28, count 0 2006.229.08:23:14.65#ibcon#about to read 5, iclass 28, count 0 2006.229.08:23:14.65#ibcon#read 5, iclass 28, count 0 2006.229.08:23:14.65#ibcon#about to read 6, iclass 28, count 0 2006.229.08:23:14.65#ibcon#read 6, iclass 28, count 0 2006.229.08:23:14.65#ibcon#end of sib2, iclass 28, count 0 2006.229.08:23:14.65#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:23:14.65#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:23:14.65#ibcon#[25=BW32\r\n] 2006.229.08:23:14.65#ibcon#*before write, iclass 28, count 0 2006.229.08:23:14.65#ibcon#enter sib2, iclass 28, count 0 2006.229.08:23:14.65#ibcon#flushed, iclass 28, count 0 2006.229.08:23:14.65#ibcon#about to write, iclass 28, count 0 2006.229.08:23:14.65#ibcon#wrote, iclass 28, count 0 2006.229.08:23:14.65#ibcon#about to read 3, iclass 28, count 0 2006.229.08:23:14.68#ibcon#read 3, iclass 28, count 0 2006.229.08:23:14.68#ibcon#about to read 4, iclass 28, count 0 2006.229.08:23:14.68#ibcon#read 4, iclass 28, count 0 2006.229.08:23:14.68#ibcon#about to read 5, iclass 28, count 0 2006.229.08:23:14.68#ibcon#read 5, iclass 28, count 0 2006.229.08:23:14.68#ibcon#about to read 6, iclass 28, count 0 2006.229.08:23:14.68#ibcon#read 6, iclass 28, count 0 2006.229.08:23:14.68#ibcon#end of sib2, iclass 28, count 0 2006.229.08:23:14.68#ibcon#*after write, iclass 28, count 0 2006.229.08:23:14.68#ibcon#*before return 0, iclass 28, count 0 2006.229.08:23:14.68#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:14.68#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:23:14.68#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:23:14.68#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:23:14.68$vck44/vbbw=wide 2006.229.08:23:14.68#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.08:23:14.68#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.08:23:14.68#ibcon#ireg 8 cls_cnt 0 2006.229.08:23:14.68#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:23:14.75#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:23:14.75#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:23:14.75#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:23:14.75#ibcon#first serial, iclass 30, count 0 2006.229.08:23:14.75#ibcon#enter sib2, iclass 30, count 0 2006.229.08:23:14.75#ibcon#flushed, iclass 30, count 0 2006.229.08:23:14.75#ibcon#about to write, iclass 30, count 0 2006.229.08:23:14.75#ibcon#wrote, iclass 30, count 0 2006.229.08:23:14.75#ibcon#about to read 3, iclass 30, count 0 2006.229.08:23:14.77#ibcon#read 3, iclass 30, count 0 2006.229.08:23:14.77#ibcon#about to read 4, iclass 30, count 0 2006.229.08:23:14.77#ibcon#read 4, iclass 30, count 0 2006.229.08:23:14.77#ibcon#about to read 5, iclass 30, count 0 2006.229.08:23:14.77#ibcon#read 5, iclass 30, count 0 2006.229.08:23:14.77#ibcon#about to read 6, iclass 30, count 0 2006.229.08:23:14.77#ibcon#read 6, iclass 30, count 0 2006.229.08:23:14.77#ibcon#end of sib2, iclass 30, count 0 2006.229.08:23:14.77#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:23:14.77#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:23:14.77#ibcon#[27=BW32\r\n] 2006.229.08:23:14.77#ibcon#*before write, iclass 30, count 0 2006.229.08:23:14.77#ibcon#enter sib2, iclass 30, count 0 2006.229.08:23:14.77#ibcon#flushed, iclass 30, count 0 2006.229.08:23:14.77#ibcon#about to write, iclass 30, count 0 2006.229.08:23:14.77#ibcon#wrote, iclass 30, count 0 2006.229.08:23:14.77#ibcon#about to read 3, iclass 30, count 0 2006.229.08:23:14.80#ibcon#read 3, iclass 30, count 0 2006.229.08:23:14.80#ibcon#about to read 4, iclass 30, count 0 2006.229.08:23:14.80#ibcon#read 4, iclass 30, count 0 2006.229.08:23:14.80#ibcon#about to read 5, iclass 30, count 0 2006.229.08:23:14.80#ibcon#read 5, iclass 30, count 0 2006.229.08:23:14.80#ibcon#about to read 6, iclass 30, count 0 2006.229.08:23:14.80#ibcon#read 6, iclass 30, count 0 2006.229.08:23:14.80#ibcon#end of sib2, iclass 30, count 0 2006.229.08:23:14.80#ibcon#*after write, iclass 30, count 0 2006.229.08:23:14.80#ibcon#*before return 0, iclass 30, count 0 2006.229.08:23:14.80#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:23:14.80#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:23:14.80#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:23:14.80#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:23:14.80$setupk4/ifdk4 2006.229.08:23:14.80$ifdk4/lo= 2006.229.08:23:14.80$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:23:14.80$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:23:14.80$ifdk4/patch= 2006.229.08:23:14.80$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:23:14.80$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:23:14.80$setupk4/!*+20s 2006.229.08:23:20.13#trakl#Source acquired 2006.229.08:23:20.28#abcon#<5=/05 2.2 3.8 29.50 941000.4\r\n> 2006.229.08:23:20.30#abcon#{5=INTERFACE CLEAR} 2006.229.08:23:20.36#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:23:22.13#flagr#flagr/antenna,acquired 2006.229.08:23:29.31$setupk4/"tpicd 2006.229.08:23:29.31$setupk4/echo=off 2006.229.08:23:29.31$setupk4/xlog=off 2006.229.08:23:29.31:!2006.229.08:23:36 2006.229.08:23:36.00:preob 2006.229.08:23:36.13/onsource/TRACKING 2006.229.08:23:36.13:!2006.229.08:23:46 2006.229.08:23:46.00:"tape 2006.229.08:23:46.00:"st=record 2006.229.08:23:46.00:data_valid=on 2006.229.08:23:46.00:midob 2006.229.08:23:46.13/onsource/TRACKING 2006.229.08:23:46.13/wx/29.50,1000.4,94 2006.229.08:23:46.34/cable/+6.3974E-03 2006.229.08:23:47.43/va/01,08,usb,yes,30,32 2006.229.08:23:47.43/va/02,07,usb,yes,32,33 2006.229.08:23:47.43/va/03,06,usb,yes,40,43 2006.229.08:23:47.43/va/04,07,usb,yes,33,35 2006.229.08:23:47.43/va/05,04,usb,yes,30,30 2006.229.08:23:47.43/va/06,04,usb,yes,34,33 2006.229.08:23:47.43/va/07,05,usb,yes,30,30 2006.229.08:23:47.43/va/08,06,usb,yes,21,27 2006.229.08:23:47.66/valo/01,524.99,yes,locked 2006.229.08:23:47.66/valo/02,534.99,yes,locked 2006.229.08:23:47.66/valo/03,564.99,yes,locked 2006.229.08:23:47.66/valo/04,624.99,yes,locked 2006.229.08:23:47.66/valo/05,734.99,yes,locked 2006.229.08:23:47.66/valo/06,814.99,yes,locked 2006.229.08:23:47.66/valo/07,864.99,yes,locked 2006.229.08:23:47.66/valo/08,884.99,yes,locked 2006.229.08:23:48.75/vb/01,04,usb,yes,31,29 2006.229.08:23:48.75/vb/02,04,usb,yes,33,33 2006.229.08:23:48.75/vb/03,04,usb,yes,30,33 2006.229.08:23:48.75/vb/04,04,usb,yes,35,34 2006.229.08:23:48.75/vb/05,04,usb,yes,27,30 2006.229.08:23:48.75/vb/06,04,usb,yes,32,28 2006.229.08:23:48.75/vb/07,04,usb,yes,32,31 2006.229.08:23:48.75/vb/08,04,usb,yes,29,32 2006.229.08:23:48.98/vblo/01,629.99,yes,locked 2006.229.08:23:48.98/vblo/02,634.99,yes,locked 2006.229.08:23:48.98/vblo/03,649.99,yes,locked 2006.229.08:23:48.98/vblo/04,679.99,yes,locked 2006.229.08:23:48.98/vblo/05,709.99,yes,locked 2006.229.08:23:48.98/vblo/06,719.99,yes,locked 2006.229.08:23:48.98/vblo/07,734.99,yes,locked 2006.229.08:23:48.98/vblo/08,744.99,yes,locked 2006.229.08:23:49.13/vabw/8 2006.229.08:23:49.28/vbbw/8 2006.229.08:23:49.37/xfe/off,on,12.7 2006.229.08:23:49.74/ifatt/23,28,28,28 2006.229.08:23:50.07/fmout-gps/S +4.47E-07 2006.229.08:23:50.11:!2006.229.08:28:26 2006.229.08:28:26.01:data_valid=off 2006.229.08:28:26.01:"et 2006.229.08:28:26.02:!+3s 2006.229.08:28:29.03:"tape 2006.229.08:28:29.03:postob 2006.229.08:28:29.14/cable/+6.3988E-03 2006.229.08:28:29.14/wx/29.48,1000.4,94 2006.229.08:28:29.21/fmout-gps/S +4.51E-07 2006.229.08:28:29.21:scan_name=229-0837,jd0608,40 2006.229.08:28:29.22:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.08:28:31.14#flagr#flagr/antenna,new-source 2006.229.08:28:31.14:checkk5 2006.229.08:28:31.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:28:31.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:28:32.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:28:32.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:28:33.10/chk_obsdata//k5ts1/T2290823??a.dat file size is correct (nominal:1120MB, actual:1116MB). 2006.229.08:28:33.50/chk_obsdata//k5ts2/T2290823??b.dat file size is correct (nominal:1120MB, actual:1116MB). 2006.229.08:28:33.91/chk_obsdata//k5ts3/T2290823??c.dat file size is correct (nominal:1120MB, actual:1116MB). 2006.229.08:28:34.31/chk_obsdata//k5ts4/T2290823??d.dat file size is correct (nominal:1120MB, actual:1116MB). 2006.229.08:28:35.03/k5log//k5ts1_log_newline 2006.229.08:28:35.73/k5log//k5ts2_log_newline 2006.229.08:28:36.44/k5log//k5ts3_log_newline 2006.229.08:28:37.16/k5log//k5ts4_log_newline 2006.229.08:28:37.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:28:37.18:setupk4=1 2006.229.08:28:37.18$setupk4/echo=on 2006.229.08:28:37.18$setupk4/pcalon 2006.229.08:28:37.18$pcalon/"no phase cal control is implemented here 2006.229.08:28:37.18$setupk4/"tpicd=stop 2006.229.08:28:37.18$setupk4/"rec=synch_on 2006.229.08:28:37.18$setupk4/"rec_mode=128 2006.229.08:28:37.18$setupk4/!* 2006.229.08:28:37.18$setupk4/recpk4 2006.229.08:28:37.18$recpk4/recpatch= 2006.229.08:28:37.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:28:37.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:28:37.19$setupk4/vck44 2006.229.08:28:37.19$vck44/valo=1,524.99 2006.229.08:28:37.19#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.08:28:37.19#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.08:28:37.19#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:37.19#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:37.19#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:37.19#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:37.19#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:28:37.19#ibcon#first serial, iclass 10, count 0 2006.229.08:28:37.19#ibcon#enter sib2, iclass 10, count 0 2006.229.08:28:37.19#ibcon#flushed, iclass 10, count 0 2006.229.08:28:37.19#ibcon#about to write, iclass 10, count 0 2006.229.08:28:37.19#ibcon#wrote, iclass 10, count 0 2006.229.08:28:37.19#ibcon#about to read 3, iclass 10, count 0 2006.229.08:28:37.20#ibcon#read 3, iclass 10, count 0 2006.229.08:28:37.20#ibcon#about to read 4, iclass 10, count 0 2006.229.08:28:37.20#ibcon#read 4, iclass 10, count 0 2006.229.08:28:37.20#ibcon#about to read 5, iclass 10, count 0 2006.229.08:28:37.20#ibcon#read 5, iclass 10, count 0 2006.229.08:28:37.20#ibcon#about to read 6, iclass 10, count 0 2006.229.08:28:37.20#ibcon#read 6, iclass 10, count 0 2006.229.08:28:37.20#ibcon#end of sib2, iclass 10, count 0 2006.229.08:28:37.20#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:28:37.20#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:28:37.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:28:37.20#ibcon#*before write, iclass 10, count 0 2006.229.08:28:37.20#ibcon#enter sib2, iclass 10, count 0 2006.229.08:28:37.20#ibcon#flushed, iclass 10, count 0 2006.229.08:28:37.20#ibcon#about to write, iclass 10, count 0 2006.229.08:28:37.20#ibcon#wrote, iclass 10, count 0 2006.229.08:28:37.20#ibcon#about to read 3, iclass 10, count 0 2006.229.08:28:37.25#ibcon#read 3, iclass 10, count 0 2006.229.08:28:37.25#ibcon#about to read 4, iclass 10, count 0 2006.229.08:28:37.25#ibcon#read 4, iclass 10, count 0 2006.229.08:28:37.25#ibcon#about to read 5, iclass 10, count 0 2006.229.08:28:37.25#ibcon#read 5, iclass 10, count 0 2006.229.08:28:37.25#ibcon#about to read 6, iclass 10, count 0 2006.229.08:28:37.25#ibcon#read 6, iclass 10, count 0 2006.229.08:28:37.25#ibcon#end of sib2, iclass 10, count 0 2006.229.08:28:37.25#ibcon#*after write, iclass 10, count 0 2006.229.08:28:37.25#ibcon#*before return 0, iclass 10, count 0 2006.229.08:28:37.25#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:37.25#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:37.25#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:28:37.25#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:28:37.25$vck44/va=1,8 2006.229.08:28:37.25#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.08:28:37.25#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.08:28:37.25#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:37.25#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:37.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:37.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:37.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.08:28:37.25#ibcon#first serial, iclass 12, count 2 2006.229.08:28:37.25#ibcon#enter sib2, iclass 12, count 2 2006.229.08:28:37.25#ibcon#flushed, iclass 12, count 2 2006.229.08:28:37.25#ibcon#about to write, iclass 12, count 2 2006.229.08:28:37.25#ibcon#wrote, iclass 12, count 2 2006.229.08:28:37.25#ibcon#about to read 3, iclass 12, count 2 2006.229.08:28:37.27#ibcon#read 3, iclass 12, count 2 2006.229.08:28:37.27#ibcon#about to read 4, iclass 12, count 2 2006.229.08:28:37.27#ibcon#read 4, iclass 12, count 2 2006.229.08:28:37.27#ibcon#about to read 5, iclass 12, count 2 2006.229.08:28:37.27#ibcon#read 5, iclass 12, count 2 2006.229.08:28:37.27#ibcon#about to read 6, iclass 12, count 2 2006.229.08:28:37.27#ibcon#read 6, iclass 12, count 2 2006.229.08:28:37.27#ibcon#end of sib2, iclass 12, count 2 2006.229.08:28:37.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.08:28:37.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.08:28:37.27#ibcon#[25=AT01-08\r\n] 2006.229.08:28:37.27#ibcon#*before write, iclass 12, count 2 2006.229.08:28:37.27#ibcon#enter sib2, iclass 12, count 2 2006.229.08:28:37.27#ibcon#flushed, iclass 12, count 2 2006.229.08:28:37.27#ibcon#about to write, iclass 12, count 2 2006.229.08:28:37.27#ibcon#wrote, iclass 12, count 2 2006.229.08:28:37.27#ibcon#about to read 3, iclass 12, count 2 2006.229.08:28:37.30#ibcon#read 3, iclass 12, count 2 2006.229.08:28:37.30#ibcon#about to read 4, iclass 12, count 2 2006.229.08:28:37.30#ibcon#read 4, iclass 12, count 2 2006.229.08:28:37.30#ibcon#about to read 5, iclass 12, count 2 2006.229.08:28:37.30#ibcon#read 5, iclass 12, count 2 2006.229.08:28:37.30#ibcon#about to read 6, iclass 12, count 2 2006.229.08:28:37.30#ibcon#read 6, iclass 12, count 2 2006.229.08:28:37.30#ibcon#end of sib2, iclass 12, count 2 2006.229.08:28:37.30#ibcon#*after write, iclass 12, count 2 2006.229.08:28:37.30#ibcon#*before return 0, iclass 12, count 2 2006.229.08:28:37.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:37.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:37.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.08:28:37.30#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:37.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:37.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:37.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:37.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:28:37.42#ibcon#first serial, iclass 12, count 0 2006.229.08:28:37.42#ibcon#enter sib2, iclass 12, count 0 2006.229.08:28:37.42#ibcon#flushed, iclass 12, count 0 2006.229.08:28:37.42#ibcon#about to write, iclass 12, count 0 2006.229.08:28:37.42#ibcon#wrote, iclass 12, count 0 2006.229.08:28:37.42#ibcon#about to read 3, iclass 12, count 0 2006.229.08:28:37.44#ibcon#read 3, iclass 12, count 0 2006.229.08:28:37.44#ibcon#about to read 4, iclass 12, count 0 2006.229.08:28:37.44#ibcon#read 4, iclass 12, count 0 2006.229.08:28:37.44#ibcon#about to read 5, iclass 12, count 0 2006.229.08:28:37.44#ibcon#read 5, iclass 12, count 0 2006.229.08:28:37.44#ibcon#about to read 6, iclass 12, count 0 2006.229.08:28:37.44#ibcon#read 6, iclass 12, count 0 2006.229.08:28:37.44#ibcon#end of sib2, iclass 12, count 0 2006.229.08:28:37.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:28:37.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:28:37.44#ibcon#[25=USB\r\n] 2006.229.08:28:37.44#ibcon#*before write, iclass 12, count 0 2006.229.08:28:37.44#ibcon#enter sib2, iclass 12, count 0 2006.229.08:28:37.44#ibcon#flushed, iclass 12, count 0 2006.229.08:28:37.44#ibcon#about to write, iclass 12, count 0 2006.229.08:28:37.44#ibcon#wrote, iclass 12, count 0 2006.229.08:28:37.44#ibcon#about to read 3, iclass 12, count 0 2006.229.08:28:37.47#ibcon#read 3, iclass 12, count 0 2006.229.08:28:37.47#ibcon#about to read 4, iclass 12, count 0 2006.229.08:28:37.47#ibcon#read 4, iclass 12, count 0 2006.229.08:28:37.47#ibcon#about to read 5, iclass 12, count 0 2006.229.08:28:37.47#ibcon#read 5, iclass 12, count 0 2006.229.08:28:37.47#ibcon#about to read 6, iclass 12, count 0 2006.229.08:28:37.47#ibcon#read 6, iclass 12, count 0 2006.229.08:28:37.47#ibcon#end of sib2, iclass 12, count 0 2006.229.08:28:37.47#ibcon#*after write, iclass 12, count 0 2006.229.08:28:37.47#ibcon#*before return 0, iclass 12, count 0 2006.229.08:28:37.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:37.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:37.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:28:37.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:28:37.47$vck44/valo=2,534.99 2006.229.08:28:37.47#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.08:28:37.47#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.08:28:37.47#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:37.47#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:37.47#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:37.47#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:37.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:28:37.47#ibcon#first serial, iclass 14, count 0 2006.229.08:28:37.47#ibcon#enter sib2, iclass 14, count 0 2006.229.08:28:37.47#ibcon#flushed, iclass 14, count 0 2006.229.08:28:37.47#ibcon#about to write, iclass 14, count 0 2006.229.08:28:37.47#ibcon#wrote, iclass 14, count 0 2006.229.08:28:37.47#ibcon#about to read 3, iclass 14, count 0 2006.229.08:28:37.49#ibcon#read 3, iclass 14, count 0 2006.229.08:28:37.49#ibcon#about to read 4, iclass 14, count 0 2006.229.08:28:37.49#ibcon#read 4, iclass 14, count 0 2006.229.08:28:37.49#ibcon#about to read 5, iclass 14, count 0 2006.229.08:28:37.49#ibcon#read 5, iclass 14, count 0 2006.229.08:28:37.49#ibcon#about to read 6, iclass 14, count 0 2006.229.08:28:37.49#ibcon#read 6, iclass 14, count 0 2006.229.08:28:37.49#ibcon#end of sib2, iclass 14, count 0 2006.229.08:28:37.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:28:37.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:28:37.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:28:37.49#ibcon#*before write, iclass 14, count 0 2006.229.08:28:37.49#ibcon#enter sib2, iclass 14, count 0 2006.229.08:28:37.49#ibcon#flushed, iclass 14, count 0 2006.229.08:28:37.49#ibcon#about to write, iclass 14, count 0 2006.229.08:28:37.49#ibcon#wrote, iclass 14, count 0 2006.229.08:28:37.49#ibcon#about to read 3, iclass 14, count 0 2006.229.08:28:37.53#ibcon#read 3, iclass 14, count 0 2006.229.08:28:37.53#ibcon#about to read 4, iclass 14, count 0 2006.229.08:28:37.53#ibcon#read 4, iclass 14, count 0 2006.229.08:28:37.53#ibcon#about to read 5, iclass 14, count 0 2006.229.08:28:37.53#ibcon#read 5, iclass 14, count 0 2006.229.08:28:37.53#ibcon#about to read 6, iclass 14, count 0 2006.229.08:28:37.53#ibcon#read 6, iclass 14, count 0 2006.229.08:28:37.53#ibcon#end of sib2, iclass 14, count 0 2006.229.08:28:37.53#ibcon#*after write, iclass 14, count 0 2006.229.08:28:37.53#ibcon#*before return 0, iclass 14, count 0 2006.229.08:28:37.53#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:37.53#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:37.53#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:28:37.53#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:28:37.53$vck44/va=2,7 2006.229.08:28:37.53#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.08:28:37.53#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.08:28:37.53#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:37.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:37.59#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:37.59#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:37.59#ibcon#enter wrdev, iclass 16, count 2 2006.229.08:28:37.59#ibcon#first serial, iclass 16, count 2 2006.229.08:28:37.59#ibcon#enter sib2, iclass 16, count 2 2006.229.08:28:37.59#ibcon#flushed, iclass 16, count 2 2006.229.08:28:37.59#ibcon#about to write, iclass 16, count 2 2006.229.08:28:37.59#ibcon#wrote, iclass 16, count 2 2006.229.08:28:37.59#ibcon#about to read 3, iclass 16, count 2 2006.229.08:28:37.61#ibcon#read 3, iclass 16, count 2 2006.229.08:28:37.61#ibcon#about to read 4, iclass 16, count 2 2006.229.08:28:37.61#ibcon#read 4, iclass 16, count 2 2006.229.08:28:37.61#ibcon#about to read 5, iclass 16, count 2 2006.229.08:28:37.61#ibcon#read 5, iclass 16, count 2 2006.229.08:28:37.61#ibcon#about to read 6, iclass 16, count 2 2006.229.08:28:37.61#ibcon#read 6, iclass 16, count 2 2006.229.08:28:37.61#ibcon#end of sib2, iclass 16, count 2 2006.229.08:28:37.61#ibcon#*mode == 0, iclass 16, count 2 2006.229.08:28:37.61#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.08:28:37.61#ibcon#[25=AT02-07\r\n] 2006.229.08:28:37.61#ibcon#*before write, iclass 16, count 2 2006.229.08:28:37.61#ibcon#enter sib2, iclass 16, count 2 2006.229.08:28:37.61#ibcon#flushed, iclass 16, count 2 2006.229.08:28:37.61#ibcon#about to write, iclass 16, count 2 2006.229.08:28:37.61#ibcon#wrote, iclass 16, count 2 2006.229.08:28:37.61#ibcon#about to read 3, iclass 16, count 2 2006.229.08:28:37.64#ibcon#read 3, iclass 16, count 2 2006.229.08:28:37.64#ibcon#about to read 4, iclass 16, count 2 2006.229.08:28:37.64#ibcon#read 4, iclass 16, count 2 2006.229.08:28:37.64#ibcon#about to read 5, iclass 16, count 2 2006.229.08:28:37.64#ibcon#read 5, iclass 16, count 2 2006.229.08:28:37.64#ibcon#about to read 6, iclass 16, count 2 2006.229.08:28:37.64#ibcon#read 6, iclass 16, count 2 2006.229.08:28:37.64#ibcon#end of sib2, iclass 16, count 2 2006.229.08:28:37.64#ibcon#*after write, iclass 16, count 2 2006.229.08:28:37.64#ibcon#*before return 0, iclass 16, count 2 2006.229.08:28:37.64#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:37.64#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:37.64#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.08:28:37.64#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:37.64#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:37.76#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:37.76#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:37.76#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:28:37.76#ibcon#first serial, iclass 16, count 0 2006.229.08:28:37.76#ibcon#enter sib2, iclass 16, count 0 2006.229.08:28:37.76#ibcon#flushed, iclass 16, count 0 2006.229.08:28:37.76#ibcon#about to write, iclass 16, count 0 2006.229.08:28:37.76#ibcon#wrote, iclass 16, count 0 2006.229.08:28:37.76#ibcon#about to read 3, iclass 16, count 0 2006.229.08:28:37.78#ibcon#read 3, iclass 16, count 0 2006.229.08:28:37.78#ibcon#about to read 4, iclass 16, count 0 2006.229.08:28:37.78#ibcon#read 4, iclass 16, count 0 2006.229.08:28:37.78#ibcon#about to read 5, iclass 16, count 0 2006.229.08:28:37.78#ibcon#read 5, iclass 16, count 0 2006.229.08:28:37.78#ibcon#about to read 6, iclass 16, count 0 2006.229.08:28:37.78#ibcon#read 6, iclass 16, count 0 2006.229.08:28:37.78#ibcon#end of sib2, iclass 16, count 0 2006.229.08:28:37.78#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:28:37.78#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:28:37.78#ibcon#[25=USB\r\n] 2006.229.08:28:37.78#ibcon#*before write, iclass 16, count 0 2006.229.08:28:37.78#ibcon#enter sib2, iclass 16, count 0 2006.229.08:28:37.78#ibcon#flushed, iclass 16, count 0 2006.229.08:28:37.78#ibcon#about to write, iclass 16, count 0 2006.229.08:28:37.78#ibcon#wrote, iclass 16, count 0 2006.229.08:28:37.78#ibcon#about to read 3, iclass 16, count 0 2006.229.08:28:37.81#ibcon#read 3, iclass 16, count 0 2006.229.08:28:37.81#ibcon#about to read 4, iclass 16, count 0 2006.229.08:28:37.81#ibcon#read 4, iclass 16, count 0 2006.229.08:28:37.81#ibcon#about to read 5, iclass 16, count 0 2006.229.08:28:37.81#ibcon#read 5, iclass 16, count 0 2006.229.08:28:37.81#ibcon#about to read 6, iclass 16, count 0 2006.229.08:28:37.81#ibcon#read 6, iclass 16, count 0 2006.229.08:28:37.81#ibcon#end of sib2, iclass 16, count 0 2006.229.08:28:37.81#ibcon#*after write, iclass 16, count 0 2006.229.08:28:37.81#ibcon#*before return 0, iclass 16, count 0 2006.229.08:28:37.81#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:37.81#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:37.81#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:28:37.81#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:28:37.81$vck44/valo=3,564.99 2006.229.08:28:37.81#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.08:28:37.81#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.08:28:37.81#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:37.81#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:37.81#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:37.81#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:37.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:28:37.81#ibcon#first serial, iclass 18, count 0 2006.229.08:28:37.81#ibcon#enter sib2, iclass 18, count 0 2006.229.08:28:37.81#ibcon#flushed, iclass 18, count 0 2006.229.08:28:37.81#ibcon#about to write, iclass 18, count 0 2006.229.08:28:37.81#ibcon#wrote, iclass 18, count 0 2006.229.08:28:37.81#ibcon#about to read 3, iclass 18, count 0 2006.229.08:28:37.83#ibcon#read 3, iclass 18, count 0 2006.229.08:28:37.83#ibcon#about to read 4, iclass 18, count 0 2006.229.08:28:37.83#ibcon#read 4, iclass 18, count 0 2006.229.08:28:37.83#ibcon#about to read 5, iclass 18, count 0 2006.229.08:28:37.83#ibcon#read 5, iclass 18, count 0 2006.229.08:28:37.83#ibcon#about to read 6, iclass 18, count 0 2006.229.08:28:37.83#ibcon#read 6, iclass 18, count 0 2006.229.08:28:37.83#ibcon#end of sib2, iclass 18, count 0 2006.229.08:28:37.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:28:37.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:28:37.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:28:37.83#ibcon#*before write, iclass 18, count 0 2006.229.08:28:37.83#ibcon#enter sib2, iclass 18, count 0 2006.229.08:28:37.83#ibcon#flushed, iclass 18, count 0 2006.229.08:28:37.83#ibcon#about to write, iclass 18, count 0 2006.229.08:28:37.83#ibcon#wrote, iclass 18, count 0 2006.229.08:28:37.83#ibcon#about to read 3, iclass 18, count 0 2006.229.08:28:37.87#ibcon#read 3, iclass 18, count 0 2006.229.08:28:37.87#ibcon#about to read 4, iclass 18, count 0 2006.229.08:28:37.87#ibcon#read 4, iclass 18, count 0 2006.229.08:28:37.87#ibcon#about to read 5, iclass 18, count 0 2006.229.08:28:37.87#ibcon#read 5, iclass 18, count 0 2006.229.08:28:37.87#ibcon#about to read 6, iclass 18, count 0 2006.229.08:28:37.87#ibcon#read 6, iclass 18, count 0 2006.229.08:28:37.87#ibcon#end of sib2, iclass 18, count 0 2006.229.08:28:37.87#ibcon#*after write, iclass 18, count 0 2006.229.08:28:37.87#ibcon#*before return 0, iclass 18, count 0 2006.229.08:28:37.87#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:37.87#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:37.87#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:28:37.87#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:28:37.87$vck44/va=3,6 2006.229.08:28:37.87#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.08:28:37.87#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.08:28:37.87#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:37.87#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:37.93#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:37.93#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:37.93#ibcon#enter wrdev, iclass 20, count 2 2006.229.08:28:37.93#ibcon#first serial, iclass 20, count 2 2006.229.08:28:37.93#ibcon#enter sib2, iclass 20, count 2 2006.229.08:28:37.93#ibcon#flushed, iclass 20, count 2 2006.229.08:28:37.93#ibcon#about to write, iclass 20, count 2 2006.229.08:28:37.93#ibcon#wrote, iclass 20, count 2 2006.229.08:28:37.93#ibcon#about to read 3, iclass 20, count 2 2006.229.08:28:37.95#ibcon#read 3, iclass 20, count 2 2006.229.08:28:37.95#ibcon#about to read 4, iclass 20, count 2 2006.229.08:28:37.95#ibcon#read 4, iclass 20, count 2 2006.229.08:28:37.95#ibcon#about to read 5, iclass 20, count 2 2006.229.08:28:37.95#ibcon#read 5, iclass 20, count 2 2006.229.08:28:37.95#ibcon#about to read 6, iclass 20, count 2 2006.229.08:28:37.95#ibcon#read 6, iclass 20, count 2 2006.229.08:28:37.95#ibcon#end of sib2, iclass 20, count 2 2006.229.08:28:37.95#ibcon#*mode == 0, iclass 20, count 2 2006.229.08:28:37.95#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.08:28:37.95#ibcon#[25=AT03-06\r\n] 2006.229.08:28:37.95#ibcon#*before write, iclass 20, count 2 2006.229.08:28:37.95#ibcon#enter sib2, iclass 20, count 2 2006.229.08:28:37.95#ibcon#flushed, iclass 20, count 2 2006.229.08:28:37.95#ibcon#about to write, iclass 20, count 2 2006.229.08:28:37.95#ibcon#wrote, iclass 20, count 2 2006.229.08:28:37.95#ibcon#about to read 3, iclass 20, count 2 2006.229.08:28:37.98#ibcon#read 3, iclass 20, count 2 2006.229.08:28:37.98#ibcon#about to read 4, iclass 20, count 2 2006.229.08:28:37.98#ibcon#read 4, iclass 20, count 2 2006.229.08:28:37.98#ibcon#about to read 5, iclass 20, count 2 2006.229.08:28:37.98#ibcon#read 5, iclass 20, count 2 2006.229.08:28:37.98#ibcon#about to read 6, iclass 20, count 2 2006.229.08:28:37.98#ibcon#read 6, iclass 20, count 2 2006.229.08:28:37.98#ibcon#end of sib2, iclass 20, count 2 2006.229.08:28:37.98#ibcon#*after write, iclass 20, count 2 2006.229.08:28:37.98#ibcon#*before return 0, iclass 20, count 2 2006.229.08:28:37.98#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:37.98#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:37.98#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.08:28:37.98#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:37.98#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:38.10#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:38.10#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:38.10#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:28:38.10#ibcon#first serial, iclass 20, count 0 2006.229.08:28:38.10#ibcon#enter sib2, iclass 20, count 0 2006.229.08:28:38.10#ibcon#flushed, iclass 20, count 0 2006.229.08:28:38.10#ibcon#about to write, iclass 20, count 0 2006.229.08:28:38.10#ibcon#wrote, iclass 20, count 0 2006.229.08:28:38.10#ibcon#about to read 3, iclass 20, count 0 2006.229.08:28:38.12#ibcon#read 3, iclass 20, count 0 2006.229.08:28:38.12#ibcon#about to read 4, iclass 20, count 0 2006.229.08:28:38.12#ibcon#read 4, iclass 20, count 0 2006.229.08:28:38.12#ibcon#about to read 5, iclass 20, count 0 2006.229.08:28:38.12#ibcon#read 5, iclass 20, count 0 2006.229.08:28:38.12#ibcon#about to read 6, iclass 20, count 0 2006.229.08:28:38.12#ibcon#read 6, iclass 20, count 0 2006.229.08:28:38.12#ibcon#end of sib2, iclass 20, count 0 2006.229.08:28:38.12#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:28:38.12#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:28:38.12#ibcon#[25=USB\r\n] 2006.229.08:28:38.12#ibcon#*before write, iclass 20, count 0 2006.229.08:28:38.12#ibcon#enter sib2, iclass 20, count 0 2006.229.08:28:38.12#ibcon#flushed, iclass 20, count 0 2006.229.08:28:38.12#ibcon#about to write, iclass 20, count 0 2006.229.08:28:38.12#ibcon#wrote, iclass 20, count 0 2006.229.08:28:38.12#ibcon#about to read 3, iclass 20, count 0 2006.229.08:28:38.15#ibcon#read 3, iclass 20, count 0 2006.229.08:28:38.15#ibcon#about to read 4, iclass 20, count 0 2006.229.08:28:38.15#ibcon#read 4, iclass 20, count 0 2006.229.08:28:38.15#ibcon#about to read 5, iclass 20, count 0 2006.229.08:28:38.15#ibcon#read 5, iclass 20, count 0 2006.229.08:28:38.15#ibcon#about to read 6, iclass 20, count 0 2006.229.08:28:38.15#ibcon#read 6, iclass 20, count 0 2006.229.08:28:38.15#ibcon#end of sib2, iclass 20, count 0 2006.229.08:28:38.15#ibcon#*after write, iclass 20, count 0 2006.229.08:28:38.15#ibcon#*before return 0, iclass 20, count 0 2006.229.08:28:38.15#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:38.15#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:38.15#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:28:38.15#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:28:38.15$vck44/valo=4,624.99 2006.229.08:28:38.15#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.08:28:38.15#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.08:28:38.15#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:38.15#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:38.15#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:38.15#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:38.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:28:38.15#ibcon#first serial, iclass 22, count 0 2006.229.08:28:38.15#ibcon#enter sib2, iclass 22, count 0 2006.229.08:28:38.15#ibcon#flushed, iclass 22, count 0 2006.229.08:28:38.15#ibcon#about to write, iclass 22, count 0 2006.229.08:28:38.15#ibcon#wrote, iclass 22, count 0 2006.229.08:28:38.15#ibcon#about to read 3, iclass 22, count 0 2006.229.08:28:38.17#ibcon#read 3, iclass 22, count 0 2006.229.08:28:38.17#ibcon#about to read 4, iclass 22, count 0 2006.229.08:28:38.17#ibcon#read 4, iclass 22, count 0 2006.229.08:28:38.17#ibcon#about to read 5, iclass 22, count 0 2006.229.08:28:38.17#ibcon#read 5, iclass 22, count 0 2006.229.08:28:38.17#ibcon#about to read 6, iclass 22, count 0 2006.229.08:28:38.17#ibcon#read 6, iclass 22, count 0 2006.229.08:28:38.17#ibcon#end of sib2, iclass 22, count 0 2006.229.08:28:38.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:28:38.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:28:38.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:28:38.17#ibcon#*before write, iclass 22, count 0 2006.229.08:28:38.17#ibcon#enter sib2, iclass 22, count 0 2006.229.08:28:38.17#ibcon#flushed, iclass 22, count 0 2006.229.08:28:38.17#ibcon#about to write, iclass 22, count 0 2006.229.08:28:38.17#ibcon#wrote, iclass 22, count 0 2006.229.08:28:38.17#ibcon#about to read 3, iclass 22, count 0 2006.229.08:28:38.21#ibcon#read 3, iclass 22, count 0 2006.229.08:28:38.21#ibcon#about to read 4, iclass 22, count 0 2006.229.08:28:38.21#ibcon#read 4, iclass 22, count 0 2006.229.08:28:38.21#ibcon#about to read 5, iclass 22, count 0 2006.229.08:28:38.21#ibcon#read 5, iclass 22, count 0 2006.229.08:28:38.21#ibcon#about to read 6, iclass 22, count 0 2006.229.08:28:38.21#ibcon#read 6, iclass 22, count 0 2006.229.08:28:38.21#ibcon#end of sib2, iclass 22, count 0 2006.229.08:28:38.21#ibcon#*after write, iclass 22, count 0 2006.229.08:28:38.21#ibcon#*before return 0, iclass 22, count 0 2006.229.08:28:38.21#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:38.21#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:38.21#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:28:38.21#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:28:38.21$vck44/va=4,7 2006.229.08:28:38.21#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.08:28:38.21#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.08:28:38.21#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:38.21#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:38.27#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:38.27#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:38.27#ibcon#enter wrdev, iclass 24, count 2 2006.229.08:28:38.27#ibcon#first serial, iclass 24, count 2 2006.229.08:28:38.27#ibcon#enter sib2, iclass 24, count 2 2006.229.08:28:38.27#ibcon#flushed, iclass 24, count 2 2006.229.08:28:38.27#ibcon#about to write, iclass 24, count 2 2006.229.08:28:38.27#ibcon#wrote, iclass 24, count 2 2006.229.08:28:38.27#ibcon#about to read 3, iclass 24, count 2 2006.229.08:28:38.29#ibcon#read 3, iclass 24, count 2 2006.229.08:28:38.29#ibcon#about to read 4, iclass 24, count 2 2006.229.08:28:38.29#ibcon#read 4, iclass 24, count 2 2006.229.08:28:38.29#ibcon#about to read 5, iclass 24, count 2 2006.229.08:28:38.29#ibcon#read 5, iclass 24, count 2 2006.229.08:28:38.29#ibcon#about to read 6, iclass 24, count 2 2006.229.08:28:38.29#ibcon#read 6, iclass 24, count 2 2006.229.08:28:38.29#ibcon#end of sib2, iclass 24, count 2 2006.229.08:28:38.29#ibcon#*mode == 0, iclass 24, count 2 2006.229.08:28:38.29#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.08:28:38.29#ibcon#[25=AT04-07\r\n] 2006.229.08:28:38.29#ibcon#*before write, iclass 24, count 2 2006.229.08:28:38.29#ibcon#enter sib2, iclass 24, count 2 2006.229.08:28:38.29#ibcon#flushed, iclass 24, count 2 2006.229.08:28:38.29#ibcon#about to write, iclass 24, count 2 2006.229.08:28:38.29#ibcon#wrote, iclass 24, count 2 2006.229.08:28:38.29#ibcon#about to read 3, iclass 24, count 2 2006.229.08:28:38.32#ibcon#read 3, iclass 24, count 2 2006.229.08:28:38.32#ibcon#about to read 4, iclass 24, count 2 2006.229.08:28:38.32#ibcon#read 4, iclass 24, count 2 2006.229.08:28:38.32#ibcon#about to read 5, iclass 24, count 2 2006.229.08:28:38.32#ibcon#read 5, iclass 24, count 2 2006.229.08:28:38.32#ibcon#about to read 6, iclass 24, count 2 2006.229.08:28:38.32#ibcon#read 6, iclass 24, count 2 2006.229.08:28:38.32#ibcon#end of sib2, iclass 24, count 2 2006.229.08:28:38.32#ibcon#*after write, iclass 24, count 2 2006.229.08:28:38.32#ibcon#*before return 0, iclass 24, count 2 2006.229.08:28:38.32#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:38.32#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:38.32#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.08:28:38.32#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:38.32#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:38.44#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:38.44#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:38.44#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:28:38.44#ibcon#first serial, iclass 24, count 0 2006.229.08:28:38.44#ibcon#enter sib2, iclass 24, count 0 2006.229.08:28:38.44#ibcon#flushed, iclass 24, count 0 2006.229.08:28:38.44#ibcon#about to write, iclass 24, count 0 2006.229.08:28:38.44#ibcon#wrote, iclass 24, count 0 2006.229.08:28:38.44#ibcon#about to read 3, iclass 24, count 0 2006.229.08:28:38.46#ibcon#read 3, iclass 24, count 0 2006.229.08:28:38.46#ibcon#about to read 4, iclass 24, count 0 2006.229.08:28:38.46#ibcon#read 4, iclass 24, count 0 2006.229.08:28:38.46#ibcon#about to read 5, iclass 24, count 0 2006.229.08:28:38.46#ibcon#read 5, iclass 24, count 0 2006.229.08:28:38.46#ibcon#about to read 6, iclass 24, count 0 2006.229.08:28:38.46#ibcon#read 6, iclass 24, count 0 2006.229.08:28:38.46#ibcon#end of sib2, iclass 24, count 0 2006.229.08:28:38.46#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:28:38.46#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:28:38.46#ibcon#[25=USB\r\n] 2006.229.08:28:38.46#ibcon#*before write, iclass 24, count 0 2006.229.08:28:38.46#ibcon#enter sib2, iclass 24, count 0 2006.229.08:28:38.46#ibcon#flushed, iclass 24, count 0 2006.229.08:28:38.46#ibcon#about to write, iclass 24, count 0 2006.229.08:28:38.46#ibcon#wrote, iclass 24, count 0 2006.229.08:28:38.46#ibcon#about to read 3, iclass 24, count 0 2006.229.08:28:38.47#abcon#<5=/05 2.2 3.8 29.48 941000.4\r\n> 2006.229.08:28:38.49#abcon#{5=INTERFACE CLEAR} 2006.229.08:28:38.49#ibcon#read 3, iclass 24, count 0 2006.229.08:28:38.49#ibcon#about to read 4, iclass 24, count 0 2006.229.08:28:38.49#ibcon#read 4, iclass 24, count 0 2006.229.08:28:38.49#ibcon#about to read 5, iclass 24, count 0 2006.229.08:28:38.49#ibcon#read 5, iclass 24, count 0 2006.229.08:28:38.49#ibcon#about to read 6, iclass 24, count 0 2006.229.08:28:38.49#ibcon#read 6, iclass 24, count 0 2006.229.08:28:38.49#ibcon#end of sib2, iclass 24, count 0 2006.229.08:28:38.49#ibcon#*after write, iclass 24, count 0 2006.229.08:28:38.49#ibcon#*before return 0, iclass 24, count 0 2006.229.08:28:38.49#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:38.49#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:38.49#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:28:38.49#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:28:38.49$vck44/valo=5,734.99 2006.229.08:28:38.49#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.08:28:38.49#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.08:28:38.49#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:38.49#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:28:38.49#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:28:38.49#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:28:38.49#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:28:38.49#ibcon#first serial, iclass 29, count 0 2006.229.08:28:38.49#ibcon#enter sib2, iclass 29, count 0 2006.229.08:28:38.49#ibcon#flushed, iclass 29, count 0 2006.229.08:28:38.49#ibcon#about to write, iclass 29, count 0 2006.229.08:28:38.49#ibcon#wrote, iclass 29, count 0 2006.229.08:28:38.49#ibcon#about to read 3, iclass 29, count 0 2006.229.08:28:38.51#ibcon#read 3, iclass 29, count 0 2006.229.08:28:38.51#ibcon#about to read 4, iclass 29, count 0 2006.229.08:28:38.51#ibcon#read 4, iclass 29, count 0 2006.229.08:28:38.51#ibcon#about to read 5, iclass 29, count 0 2006.229.08:28:38.51#ibcon#read 5, iclass 29, count 0 2006.229.08:28:38.51#ibcon#about to read 6, iclass 29, count 0 2006.229.08:28:38.51#ibcon#read 6, iclass 29, count 0 2006.229.08:28:38.51#ibcon#end of sib2, iclass 29, count 0 2006.229.08:28:38.51#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:28:38.51#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:28:38.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:28:38.51#ibcon#*before write, iclass 29, count 0 2006.229.08:28:38.51#ibcon#enter sib2, iclass 29, count 0 2006.229.08:28:38.51#ibcon#flushed, iclass 29, count 0 2006.229.08:28:38.51#ibcon#about to write, iclass 29, count 0 2006.229.08:28:38.51#ibcon#wrote, iclass 29, count 0 2006.229.08:28:38.51#ibcon#about to read 3, iclass 29, count 0 2006.229.08:28:38.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:28:38.55#ibcon#read 3, iclass 29, count 0 2006.229.08:28:38.55#ibcon#about to read 4, iclass 29, count 0 2006.229.08:28:38.55#ibcon#read 4, iclass 29, count 0 2006.229.08:28:38.55#ibcon#about to read 5, iclass 29, count 0 2006.229.08:28:38.55#ibcon#read 5, iclass 29, count 0 2006.229.08:28:38.55#ibcon#about to read 6, iclass 29, count 0 2006.229.08:28:38.55#ibcon#read 6, iclass 29, count 0 2006.229.08:28:38.55#ibcon#end of sib2, iclass 29, count 0 2006.229.08:28:38.55#ibcon#*after write, iclass 29, count 0 2006.229.08:28:38.55#ibcon#*before return 0, iclass 29, count 0 2006.229.08:28:38.55#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:28:38.55#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:28:38.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:28:38.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:28:38.55$vck44/va=5,4 2006.229.08:28:38.55#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.08:28:38.55#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.08:28:38.55#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:38.55#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:38.61#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:38.61#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:38.61#ibcon#enter wrdev, iclass 32, count 2 2006.229.08:28:38.61#ibcon#first serial, iclass 32, count 2 2006.229.08:28:38.61#ibcon#enter sib2, iclass 32, count 2 2006.229.08:28:38.61#ibcon#flushed, iclass 32, count 2 2006.229.08:28:38.61#ibcon#about to write, iclass 32, count 2 2006.229.08:28:38.61#ibcon#wrote, iclass 32, count 2 2006.229.08:28:38.61#ibcon#about to read 3, iclass 32, count 2 2006.229.08:28:38.63#ibcon#read 3, iclass 32, count 2 2006.229.08:28:38.63#ibcon#about to read 4, iclass 32, count 2 2006.229.08:28:38.63#ibcon#read 4, iclass 32, count 2 2006.229.08:28:38.63#ibcon#about to read 5, iclass 32, count 2 2006.229.08:28:38.63#ibcon#read 5, iclass 32, count 2 2006.229.08:28:38.63#ibcon#about to read 6, iclass 32, count 2 2006.229.08:28:38.63#ibcon#read 6, iclass 32, count 2 2006.229.08:28:38.63#ibcon#end of sib2, iclass 32, count 2 2006.229.08:28:38.63#ibcon#*mode == 0, iclass 32, count 2 2006.229.08:28:38.63#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.08:28:38.63#ibcon#[25=AT05-04\r\n] 2006.229.08:28:38.63#ibcon#*before write, iclass 32, count 2 2006.229.08:28:38.63#ibcon#enter sib2, iclass 32, count 2 2006.229.08:28:38.63#ibcon#flushed, iclass 32, count 2 2006.229.08:28:38.63#ibcon#about to write, iclass 32, count 2 2006.229.08:28:38.63#ibcon#wrote, iclass 32, count 2 2006.229.08:28:38.63#ibcon#about to read 3, iclass 32, count 2 2006.229.08:28:38.66#ibcon#read 3, iclass 32, count 2 2006.229.08:28:38.66#ibcon#about to read 4, iclass 32, count 2 2006.229.08:28:38.66#ibcon#read 4, iclass 32, count 2 2006.229.08:28:38.66#ibcon#about to read 5, iclass 32, count 2 2006.229.08:28:38.66#ibcon#read 5, iclass 32, count 2 2006.229.08:28:38.66#ibcon#about to read 6, iclass 32, count 2 2006.229.08:28:38.66#ibcon#read 6, iclass 32, count 2 2006.229.08:28:38.66#ibcon#end of sib2, iclass 32, count 2 2006.229.08:28:38.66#ibcon#*after write, iclass 32, count 2 2006.229.08:28:38.66#ibcon#*before return 0, iclass 32, count 2 2006.229.08:28:38.66#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:38.66#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:38.66#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.08:28:38.66#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:38.66#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:38.78#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:38.78#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:38.78#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:28:38.78#ibcon#first serial, iclass 32, count 0 2006.229.08:28:38.78#ibcon#enter sib2, iclass 32, count 0 2006.229.08:28:38.78#ibcon#flushed, iclass 32, count 0 2006.229.08:28:38.78#ibcon#about to write, iclass 32, count 0 2006.229.08:28:38.78#ibcon#wrote, iclass 32, count 0 2006.229.08:28:38.78#ibcon#about to read 3, iclass 32, count 0 2006.229.08:28:38.80#ibcon#read 3, iclass 32, count 0 2006.229.08:28:38.80#ibcon#about to read 4, iclass 32, count 0 2006.229.08:28:38.80#ibcon#read 4, iclass 32, count 0 2006.229.08:28:38.80#ibcon#about to read 5, iclass 32, count 0 2006.229.08:28:38.80#ibcon#read 5, iclass 32, count 0 2006.229.08:28:38.80#ibcon#about to read 6, iclass 32, count 0 2006.229.08:28:38.80#ibcon#read 6, iclass 32, count 0 2006.229.08:28:38.80#ibcon#end of sib2, iclass 32, count 0 2006.229.08:28:38.80#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:28:38.80#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:28:38.80#ibcon#[25=USB\r\n] 2006.229.08:28:38.80#ibcon#*before write, iclass 32, count 0 2006.229.08:28:38.80#ibcon#enter sib2, iclass 32, count 0 2006.229.08:28:38.80#ibcon#flushed, iclass 32, count 0 2006.229.08:28:38.80#ibcon#about to write, iclass 32, count 0 2006.229.08:28:38.80#ibcon#wrote, iclass 32, count 0 2006.229.08:28:38.80#ibcon#about to read 3, iclass 32, count 0 2006.229.08:28:38.83#ibcon#read 3, iclass 32, count 0 2006.229.08:28:38.83#ibcon#about to read 4, iclass 32, count 0 2006.229.08:28:38.83#ibcon#read 4, iclass 32, count 0 2006.229.08:28:38.83#ibcon#about to read 5, iclass 32, count 0 2006.229.08:28:38.83#ibcon#read 5, iclass 32, count 0 2006.229.08:28:38.83#ibcon#about to read 6, iclass 32, count 0 2006.229.08:28:38.83#ibcon#read 6, iclass 32, count 0 2006.229.08:28:38.83#ibcon#end of sib2, iclass 32, count 0 2006.229.08:28:38.83#ibcon#*after write, iclass 32, count 0 2006.229.08:28:38.83#ibcon#*before return 0, iclass 32, count 0 2006.229.08:28:38.83#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:38.83#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:38.83#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:28:38.83#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:28:38.83$vck44/valo=6,814.99 2006.229.08:28:38.83#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:28:38.83#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:28:38.83#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:38.83#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:38.83#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:38.83#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:38.83#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:28:38.83#ibcon#first serial, iclass 34, count 0 2006.229.08:28:38.83#ibcon#enter sib2, iclass 34, count 0 2006.229.08:28:38.83#ibcon#flushed, iclass 34, count 0 2006.229.08:28:38.83#ibcon#about to write, iclass 34, count 0 2006.229.08:28:38.83#ibcon#wrote, iclass 34, count 0 2006.229.08:28:38.83#ibcon#about to read 3, iclass 34, count 0 2006.229.08:28:38.85#ibcon#read 3, iclass 34, count 0 2006.229.08:28:38.85#ibcon#about to read 4, iclass 34, count 0 2006.229.08:28:38.85#ibcon#read 4, iclass 34, count 0 2006.229.08:28:38.85#ibcon#about to read 5, iclass 34, count 0 2006.229.08:28:38.85#ibcon#read 5, iclass 34, count 0 2006.229.08:28:38.85#ibcon#about to read 6, iclass 34, count 0 2006.229.08:28:38.85#ibcon#read 6, iclass 34, count 0 2006.229.08:28:38.85#ibcon#end of sib2, iclass 34, count 0 2006.229.08:28:38.85#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:28:38.85#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:28:38.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:28:38.85#ibcon#*before write, iclass 34, count 0 2006.229.08:28:38.85#ibcon#enter sib2, iclass 34, count 0 2006.229.08:28:38.85#ibcon#flushed, iclass 34, count 0 2006.229.08:28:38.85#ibcon#about to write, iclass 34, count 0 2006.229.08:28:38.85#ibcon#wrote, iclass 34, count 0 2006.229.08:28:38.85#ibcon#about to read 3, iclass 34, count 0 2006.229.08:28:38.89#ibcon#read 3, iclass 34, count 0 2006.229.08:28:38.89#ibcon#about to read 4, iclass 34, count 0 2006.229.08:28:38.89#ibcon#read 4, iclass 34, count 0 2006.229.08:28:38.89#ibcon#about to read 5, iclass 34, count 0 2006.229.08:28:38.89#ibcon#read 5, iclass 34, count 0 2006.229.08:28:38.89#ibcon#about to read 6, iclass 34, count 0 2006.229.08:28:38.89#ibcon#read 6, iclass 34, count 0 2006.229.08:28:38.89#ibcon#end of sib2, iclass 34, count 0 2006.229.08:28:38.89#ibcon#*after write, iclass 34, count 0 2006.229.08:28:38.89#ibcon#*before return 0, iclass 34, count 0 2006.229.08:28:38.89#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:38.89#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:38.89#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:28:38.89#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:28:38.89$vck44/va=6,4 2006.229.08:28:38.89#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.08:28:38.89#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.08:28:38.89#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:38.89#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:38.95#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:38.95#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:38.95#ibcon#enter wrdev, iclass 36, count 2 2006.229.08:28:38.95#ibcon#first serial, iclass 36, count 2 2006.229.08:28:38.95#ibcon#enter sib2, iclass 36, count 2 2006.229.08:28:38.95#ibcon#flushed, iclass 36, count 2 2006.229.08:28:38.95#ibcon#about to write, iclass 36, count 2 2006.229.08:28:38.95#ibcon#wrote, iclass 36, count 2 2006.229.08:28:38.95#ibcon#about to read 3, iclass 36, count 2 2006.229.08:28:38.97#ibcon#read 3, iclass 36, count 2 2006.229.08:28:38.97#ibcon#about to read 4, iclass 36, count 2 2006.229.08:28:38.97#ibcon#read 4, iclass 36, count 2 2006.229.08:28:38.97#ibcon#about to read 5, iclass 36, count 2 2006.229.08:28:38.97#ibcon#read 5, iclass 36, count 2 2006.229.08:28:38.97#ibcon#about to read 6, iclass 36, count 2 2006.229.08:28:38.97#ibcon#read 6, iclass 36, count 2 2006.229.08:28:38.97#ibcon#end of sib2, iclass 36, count 2 2006.229.08:28:38.97#ibcon#*mode == 0, iclass 36, count 2 2006.229.08:28:38.97#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.08:28:38.97#ibcon#[25=AT06-04\r\n] 2006.229.08:28:38.97#ibcon#*before write, iclass 36, count 2 2006.229.08:28:38.97#ibcon#enter sib2, iclass 36, count 2 2006.229.08:28:38.97#ibcon#flushed, iclass 36, count 2 2006.229.08:28:38.97#ibcon#about to write, iclass 36, count 2 2006.229.08:28:38.97#ibcon#wrote, iclass 36, count 2 2006.229.08:28:38.97#ibcon#about to read 3, iclass 36, count 2 2006.229.08:28:39.00#ibcon#read 3, iclass 36, count 2 2006.229.08:28:39.00#ibcon#about to read 4, iclass 36, count 2 2006.229.08:28:39.00#ibcon#read 4, iclass 36, count 2 2006.229.08:28:39.00#ibcon#about to read 5, iclass 36, count 2 2006.229.08:28:39.00#ibcon#read 5, iclass 36, count 2 2006.229.08:28:39.00#ibcon#about to read 6, iclass 36, count 2 2006.229.08:28:39.00#ibcon#read 6, iclass 36, count 2 2006.229.08:28:39.00#ibcon#end of sib2, iclass 36, count 2 2006.229.08:28:39.00#ibcon#*after write, iclass 36, count 2 2006.229.08:28:39.00#ibcon#*before return 0, iclass 36, count 2 2006.229.08:28:39.00#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:39.00#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:39.00#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.08:28:39.00#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:39.00#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:39.12#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:39.12#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:39.12#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:28:39.12#ibcon#first serial, iclass 36, count 0 2006.229.08:28:39.12#ibcon#enter sib2, iclass 36, count 0 2006.229.08:28:39.12#ibcon#flushed, iclass 36, count 0 2006.229.08:28:39.12#ibcon#about to write, iclass 36, count 0 2006.229.08:28:39.12#ibcon#wrote, iclass 36, count 0 2006.229.08:28:39.12#ibcon#about to read 3, iclass 36, count 0 2006.229.08:28:39.14#ibcon#read 3, iclass 36, count 0 2006.229.08:28:39.14#ibcon#about to read 4, iclass 36, count 0 2006.229.08:28:39.14#ibcon#read 4, iclass 36, count 0 2006.229.08:28:39.14#ibcon#about to read 5, iclass 36, count 0 2006.229.08:28:39.14#ibcon#read 5, iclass 36, count 0 2006.229.08:28:39.14#ibcon#about to read 6, iclass 36, count 0 2006.229.08:28:39.14#ibcon#read 6, iclass 36, count 0 2006.229.08:28:39.14#ibcon#end of sib2, iclass 36, count 0 2006.229.08:28:39.14#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:28:39.14#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:28:39.14#ibcon#[25=USB\r\n] 2006.229.08:28:39.14#ibcon#*before write, iclass 36, count 0 2006.229.08:28:39.14#ibcon#enter sib2, iclass 36, count 0 2006.229.08:28:39.14#ibcon#flushed, iclass 36, count 0 2006.229.08:28:39.14#ibcon#about to write, iclass 36, count 0 2006.229.08:28:39.14#ibcon#wrote, iclass 36, count 0 2006.229.08:28:39.14#ibcon#about to read 3, iclass 36, count 0 2006.229.08:28:39.17#ibcon#read 3, iclass 36, count 0 2006.229.08:28:39.17#ibcon#about to read 4, iclass 36, count 0 2006.229.08:28:39.17#ibcon#read 4, iclass 36, count 0 2006.229.08:28:39.17#ibcon#about to read 5, iclass 36, count 0 2006.229.08:28:39.17#ibcon#read 5, iclass 36, count 0 2006.229.08:28:39.17#ibcon#about to read 6, iclass 36, count 0 2006.229.08:28:39.17#ibcon#read 6, iclass 36, count 0 2006.229.08:28:39.17#ibcon#end of sib2, iclass 36, count 0 2006.229.08:28:39.17#ibcon#*after write, iclass 36, count 0 2006.229.08:28:39.17#ibcon#*before return 0, iclass 36, count 0 2006.229.08:28:39.17#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:39.17#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:39.17#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:28:39.17#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:28:39.17$vck44/valo=7,864.99 2006.229.08:28:39.17#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.08:28:39.17#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.08:28:39.17#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:39.17#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:39.17#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:39.17#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:39.17#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:28:39.17#ibcon#first serial, iclass 38, count 0 2006.229.08:28:39.17#ibcon#enter sib2, iclass 38, count 0 2006.229.08:28:39.17#ibcon#flushed, iclass 38, count 0 2006.229.08:28:39.17#ibcon#about to write, iclass 38, count 0 2006.229.08:28:39.17#ibcon#wrote, iclass 38, count 0 2006.229.08:28:39.17#ibcon#about to read 3, iclass 38, count 0 2006.229.08:28:39.19#ibcon#read 3, iclass 38, count 0 2006.229.08:28:39.19#ibcon#about to read 4, iclass 38, count 0 2006.229.08:28:39.19#ibcon#read 4, iclass 38, count 0 2006.229.08:28:39.19#ibcon#about to read 5, iclass 38, count 0 2006.229.08:28:39.19#ibcon#read 5, iclass 38, count 0 2006.229.08:28:39.19#ibcon#about to read 6, iclass 38, count 0 2006.229.08:28:39.19#ibcon#read 6, iclass 38, count 0 2006.229.08:28:39.19#ibcon#end of sib2, iclass 38, count 0 2006.229.08:28:39.19#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:28:39.19#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:28:39.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:28:39.19#ibcon#*before write, iclass 38, count 0 2006.229.08:28:39.19#ibcon#enter sib2, iclass 38, count 0 2006.229.08:28:39.19#ibcon#flushed, iclass 38, count 0 2006.229.08:28:39.19#ibcon#about to write, iclass 38, count 0 2006.229.08:28:39.19#ibcon#wrote, iclass 38, count 0 2006.229.08:28:39.19#ibcon#about to read 3, iclass 38, count 0 2006.229.08:28:39.23#ibcon#read 3, iclass 38, count 0 2006.229.08:28:39.23#ibcon#about to read 4, iclass 38, count 0 2006.229.08:28:39.23#ibcon#read 4, iclass 38, count 0 2006.229.08:28:39.23#ibcon#about to read 5, iclass 38, count 0 2006.229.08:28:39.23#ibcon#read 5, iclass 38, count 0 2006.229.08:28:39.23#ibcon#about to read 6, iclass 38, count 0 2006.229.08:28:39.23#ibcon#read 6, iclass 38, count 0 2006.229.08:28:39.23#ibcon#end of sib2, iclass 38, count 0 2006.229.08:28:39.23#ibcon#*after write, iclass 38, count 0 2006.229.08:28:39.23#ibcon#*before return 0, iclass 38, count 0 2006.229.08:28:39.23#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:39.23#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:39.23#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:28:39.23#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:28:39.23$vck44/va=7,5 2006.229.08:28:39.23#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.08:28:39.23#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.08:28:39.23#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:39.23#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:39.29#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:39.29#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:39.29#ibcon#enter wrdev, iclass 40, count 2 2006.229.08:28:39.29#ibcon#first serial, iclass 40, count 2 2006.229.08:28:39.29#ibcon#enter sib2, iclass 40, count 2 2006.229.08:28:39.29#ibcon#flushed, iclass 40, count 2 2006.229.08:28:39.29#ibcon#about to write, iclass 40, count 2 2006.229.08:28:39.29#ibcon#wrote, iclass 40, count 2 2006.229.08:28:39.29#ibcon#about to read 3, iclass 40, count 2 2006.229.08:28:39.31#ibcon#read 3, iclass 40, count 2 2006.229.08:28:39.31#ibcon#about to read 4, iclass 40, count 2 2006.229.08:28:39.31#ibcon#read 4, iclass 40, count 2 2006.229.08:28:39.31#ibcon#about to read 5, iclass 40, count 2 2006.229.08:28:39.31#ibcon#read 5, iclass 40, count 2 2006.229.08:28:39.31#ibcon#about to read 6, iclass 40, count 2 2006.229.08:28:39.31#ibcon#read 6, iclass 40, count 2 2006.229.08:28:39.31#ibcon#end of sib2, iclass 40, count 2 2006.229.08:28:39.31#ibcon#*mode == 0, iclass 40, count 2 2006.229.08:28:39.31#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.08:28:39.31#ibcon#[25=AT07-05\r\n] 2006.229.08:28:39.31#ibcon#*before write, iclass 40, count 2 2006.229.08:28:39.31#ibcon#enter sib2, iclass 40, count 2 2006.229.08:28:39.31#ibcon#flushed, iclass 40, count 2 2006.229.08:28:39.31#ibcon#about to write, iclass 40, count 2 2006.229.08:28:39.31#ibcon#wrote, iclass 40, count 2 2006.229.08:28:39.31#ibcon#about to read 3, iclass 40, count 2 2006.229.08:28:39.34#ibcon#read 3, iclass 40, count 2 2006.229.08:28:39.34#ibcon#about to read 4, iclass 40, count 2 2006.229.08:28:39.34#ibcon#read 4, iclass 40, count 2 2006.229.08:28:39.34#ibcon#about to read 5, iclass 40, count 2 2006.229.08:28:39.34#ibcon#read 5, iclass 40, count 2 2006.229.08:28:39.34#ibcon#about to read 6, iclass 40, count 2 2006.229.08:28:39.34#ibcon#read 6, iclass 40, count 2 2006.229.08:28:39.34#ibcon#end of sib2, iclass 40, count 2 2006.229.08:28:39.34#ibcon#*after write, iclass 40, count 2 2006.229.08:28:39.34#ibcon#*before return 0, iclass 40, count 2 2006.229.08:28:39.34#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:39.34#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:39.34#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.08:28:39.34#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:39.34#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:39.46#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:39.46#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:39.46#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:28:39.46#ibcon#first serial, iclass 40, count 0 2006.229.08:28:39.46#ibcon#enter sib2, iclass 40, count 0 2006.229.08:28:39.46#ibcon#flushed, iclass 40, count 0 2006.229.08:28:39.46#ibcon#about to write, iclass 40, count 0 2006.229.08:28:39.46#ibcon#wrote, iclass 40, count 0 2006.229.08:28:39.46#ibcon#about to read 3, iclass 40, count 0 2006.229.08:28:39.48#ibcon#read 3, iclass 40, count 0 2006.229.08:28:39.48#ibcon#about to read 4, iclass 40, count 0 2006.229.08:28:39.48#ibcon#read 4, iclass 40, count 0 2006.229.08:28:39.48#ibcon#about to read 5, iclass 40, count 0 2006.229.08:28:39.48#ibcon#read 5, iclass 40, count 0 2006.229.08:28:39.48#ibcon#about to read 6, iclass 40, count 0 2006.229.08:28:39.48#ibcon#read 6, iclass 40, count 0 2006.229.08:28:39.48#ibcon#end of sib2, iclass 40, count 0 2006.229.08:28:39.48#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:28:39.48#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:28:39.48#ibcon#[25=USB\r\n] 2006.229.08:28:39.48#ibcon#*before write, iclass 40, count 0 2006.229.08:28:39.48#ibcon#enter sib2, iclass 40, count 0 2006.229.08:28:39.48#ibcon#flushed, iclass 40, count 0 2006.229.08:28:39.48#ibcon#about to write, iclass 40, count 0 2006.229.08:28:39.48#ibcon#wrote, iclass 40, count 0 2006.229.08:28:39.48#ibcon#about to read 3, iclass 40, count 0 2006.229.08:28:39.51#ibcon#read 3, iclass 40, count 0 2006.229.08:28:39.51#ibcon#about to read 4, iclass 40, count 0 2006.229.08:28:39.51#ibcon#read 4, iclass 40, count 0 2006.229.08:28:39.51#ibcon#about to read 5, iclass 40, count 0 2006.229.08:28:39.51#ibcon#read 5, iclass 40, count 0 2006.229.08:28:39.51#ibcon#about to read 6, iclass 40, count 0 2006.229.08:28:39.51#ibcon#read 6, iclass 40, count 0 2006.229.08:28:39.51#ibcon#end of sib2, iclass 40, count 0 2006.229.08:28:39.51#ibcon#*after write, iclass 40, count 0 2006.229.08:28:39.51#ibcon#*before return 0, iclass 40, count 0 2006.229.08:28:39.51#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:39.51#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:39.51#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:28:39.51#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:28:39.51$vck44/valo=8,884.99 2006.229.08:28:39.51#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.08:28:39.51#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.08:28:39.51#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:39.51#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:39.51#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:39.51#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:39.51#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:28:39.51#ibcon#first serial, iclass 4, count 0 2006.229.08:28:39.51#ibcon#enter sib2, iclass 4, count 0 2006.229.08:28:39.51#ibcon#flushed, iclass 4, count 0 2006.229.08:28:39.51#ibcon#about to write, iclass 4, count 0 2006.229.08:28:39.51#ibcon#wrote, iclass 4, count 0 2006.229.08:28:39.51#ibcon#about to read 3, iclass 4, count 0 2006.229.08:28:39.53#ibcon#read 3, iclass 4, count 0 2006.229.08:28:39.53#ibcon#about to read 4, iclass 4, count 0 2006.229.08:28:39.53#ibcon#read 4, iclass 4, count 0 2006.229.08:28:39.53#ibcon#about to read 5, iclass 4, count 0 2006.229.08:28:39.53#ibcon#read 5, iclass 4, count 0 2006.229.08:28:39.53#ibcon#about to read 6, iclass 4, count 0 2006.229.08:28:39.53#ibcon#read 6, iclass 4, count 0 2006.229.08:28:39.53#ibcon#end of sib2, iclass 4, count 0 2006.229.08:28:39.53#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:28:39.53#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:28:39.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:28:39.53#ibcon#*before write, iclass 4, count 0 2006.229.08:28:39.53#ibcon#enter sib2, iclass 4, count 0 2006.229.08:28:39.53#ibcon#flushed, iclass 4, count 0 2006.229.08:28:39.53#ibcon#about to write, iclass 4, count 0 2006.229.08:28:39.53#ibcon#wrote, iclass 4, count 0 2006.229.08:28:39.53#ibcon#about to read 3, iclass 4, count 0 2006.229.08:28:39.57#ibcon#read 3, iclass 4, count 0 2006.229.08:28:39.57#ibcon#about to read 4, iclass 4, count 0 2006.229.08:28:39.57#ibcon#read 4, iclass 4, count 0 2006.229.08:28:39.57#ibcon#about to read 5, iclass 4, count 0 2006.229.08:28:39.57#ibcon#read 5, iclass 4, count 0 2006.229.08:28:39.57#ibcon#about to read 6, iclass 4, count 0 2006.229.08:28:39.57#ibcon#read 6, iclass 4, count 0 2006.229.08:28:39.57#ibcon#end of sib2, iclass 4, count 0 2006.229.08:28:39.57#ibcon#*after write, iclass 4, count 0 2006.229.08:28:39.57#ibcon#*before return 0, iclass 4, count 0 2006.229.08:28:39.57#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:39.57#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:39.57#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:28:39.57#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:28:39.57$vck44/va=8,6 2006.229.08:28:39.57#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.08:28:39.57#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.08:28:39.57#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:39.57#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:28:39.63#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:28:39.63#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:28:39.63#ibcon#enter wrdev, iclass 6, count 2 2006.229.08:28:39.63#ibcon#first serial, iclass 6, count 2 2006.229.08:28:39.63#ibcon#enter sib2, iclass 6, count 2 2006.229.08:28:39.63#ibcon#flushed, iclass 6, count 2 2006.229.08:28:39.63#ibcon#about to write, iclass 6, count 2 2006.229.08:28:39.63#ibcon#wrote, iclass 6, count 2 2006.229.08:28:39.63#ibcon#about to read 3, iclass 6, count 2 2006.229.08:28:39.65#ibcon#read 3, iclass 6, count 2 2006.229.08:28:39.65#ibcon#about to read 4, iclass 6, count 2 2006.229.08:28:39.65#ibcon#read 4, iclass 6, count 2 2006.229.08:28:39.65#ibcon#about to read 5, iclass 6, count 2 2006.229.08:28:39.65#ibcon#read 5, iclass 6, count 2 2006.229.08:28:39.65#ibcon#about to read 6, iclass 6, count 2 2006.229.08:28:39.65#ibcon#read 6, iclass 6, count 2 2006.229.08:28:39.65#ibcon#end of sib2, iclass 6, count 2 2006.229.08:28:39.65#ibcon#*mode == 0, iclass 6, count 2 2006.229.08:28:39.65#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.08:28:39.65#ibcon#[25=AT08-06\r\n] 2006.229.08:28:39.65#ibcon#*before write, iclass 6, count 2 2006.229.08:28:39.65#ibcon#enter sib2, iclass 6, count 2 2006.229.08:28:39.65#ibcon#flushed, iclass 6, count 2 2006.229.08:28:39.65#ibcon#about to write, iclass 6, count 2 2006.229.08:28:39.65#ibcon#wrote, iclass 6, count 2 2006.229.08:28:39.65#ibcon#about to read 3, iclass 6, count 2 2006.229.08:28:39.68#ibcon#read 3, iclass 6, count 2 2006.229.08:28:39.68#ibcon#about to read 4, iclass 6, count 2 2006.229.08:28:39.68#ibcon#read 4, iclass 6, count 2 2006.229.08:28:39.68#ibcon#about to read 5, iclass 6, count 2 2006.229.08:28:39.68#ibcon#read 5, iclass 6, count 2 2006.229.08:28:39.68#ibcon#about to read 6, iclass 6, count 2 2006.229.08:28:39.68#ibcon#read 6, iclass 6, count 2 2006.229.08:28:39.68#ibcon#end of sib2, iclass 6, count 2 2006.229.08:28:39.68#ibcon#*after write, iclass 6, count 2 2006.229.08:28:39.68#ibcon#*before return 0, iclass 6, count 2 2006.229.08:28:39.68#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:28:39.68#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:28:39.68#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.08:28:39.68#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:39.68#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:28:39.80#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:28:39.80#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:28:39.80#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:28:39.80#ibcon#first serial, iclass 6, count 0 2006.229.08:28:39.80#ibcon#enter sib2, iclass 6, count 0 2006.229.08:28:39.80#ibcon#flushed, iclass 6, count 0 2006.229.08:28:39.80#ibcon#about to write, iclass 6, count 0 2006.229.08:28:39.80#ibcon#wrote, iclass 6, count 0 2006.229.08:28:39.80#ibcon#about to read 3, iclass 6, count 0 2006.229.08:28:39.82#ibcon#read 3, iclass 6, count 0 2006.229.08:28:39.82#ibcon#about to read 4, iclass 6, count 0 2006.229.08:28:39.82#ibcon#read 4, iclass 6, count 0 2006.229.08:28:39.82#ibcon#about to read 5, iclass 6, count 0 2006.229.08:28:39.82#ibcon#read 5, iclass 6, count 0 2006.229.08:28:39.82#ibcon#about to read 6, iclass 6, count 0 2006.229.08:28:39.82#ibcon#read 6, iclass 6, count 0 2006.229.08:28:39.82#ibcon#end of sib2, iclass 6, count 0 2006.229.08:28:39.82#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:28:39.82#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:28:39.82#ibcon#[25=USB\r\n] 2006.229.08:28:39.82#ibcon#*before write, iclass 6, count 0 2006.229.08:28:39.82#ibcon#enter sib2, iclass 6, count 0 2006.229.08:28:39.82#ibcon#flushed, iclass 6, count 0 2006.229.08:28:39.82#ibcon#about to write, iclass 6, count 0 2006.229.08:28:39.82#ibcon#wrote, iclass 6, count 0 2006.229.08:28:39.82#ibcon#about to read 3, iclass 6, count 0 2006.229.08:28:39.85#ibcon#read 3, iclass 6, count 0 2006.229.08:28:39.85#ibcon#about to read 4, iclass 6, count 0 2006.229.08:28:39.85#ibcon#read 4, iclass 6, count 0 2006.229.08:28:39.85#ibcon#about to read 5, iclass 6, count 0 2006.229.08:28:39.85#ibcon#read 5, iclass 6, count 0 2006.229.08:28:39.85#ibcon#about to read 6, iclass 6, count 0 2006.229.08:28:39.85#ibcon#read 6, iclass 6, count 0 2006.229.08:28:39.85#ibcon#end of sib2, iclass 6, count 0 2006.229.08:28:39.85#ibcon#*after write, iclass 6, count 0 2006.229.08:28:39.85#ibcon#*before return 0, iclass 6, count 0 2006.229.08:28:39.85#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:28:39.85#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:28:39.85#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:28:39.85#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:28:39.85$vck44/vblo=1,629.99 2006.229.08:28:39.85#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.08:28:39.85#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.08:28:39.85#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:39.85#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:39.85#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:39.85#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:39.85#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:28:39.85#ibcon#first serial, iclass 10, count 0 2006.229.08:28:39.85#ibcon#enter sib2, iclass 10, count 0 2006.229.08:28:39.85#ibcon#flushed, iclass 10, count 0 2006.229.08:28:39.85#ibcon#about to write, iclass 10, count 0 2006.229.08:28:39.85#ibcon#wrote, iclass 10, count 0 2006.229.08:28:39.85#ibcon#about to read 3, iclass 10, count 0 2006.229.08:28:39.87#ibcon#read 3, iclass 10, count 0 2006.229.08:28:39.87#ibcon#about to read 4, iclass 10, count 0 2006.229.08:28:39.87#ibcon#read 4, iclass 10, count 0 2006.229.08:28:39.87#ibcon#about to read 5, iclass 10, count 0 2006.229.08:28:39.87#ibcon#read 5, iclass 10, count 0 2006.229.08:28:39.87#ibcon#about to read 6, iclass 10, count 0 2006.229.08:28:39.87#ibcon#read 6, iclass 10, count 0 2006.229.08:28:39.87#ibcon#end of sib2, iclass 10, count 0 2006.229.08:28:39.87#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:28:39.87#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:28:39.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:28:39.87#ibcon#*before write, iclass 10, count 0 2006.229.08:28:39.87#ibcon#enter sib2, iclass 10, count 0 2006.229.08:28:39.87#ibcon#flushed, iclass 10, count 0 2006.229.08:28:39.87#ibcon#about to write, iclass 10, count 0 2006.229.08:28:39.87#ibcon#wrote, iclass 10, count 0 2006.229.08:28:39.87#ibcon#about to read 3, iclass 10, count 0 2006.229.08:28:39.91#ibcon#read 3, iclass 10, count 0 2006.229.08:28:39.91#ibcon#about to read 4, iclass 10, count 0 2006.229.08:28:39.91#ibcon#read 4, iclass 10, count 0 2006.229.08:28:39.91#ibcon#about to read 5, iclass 10, count 0 2006.229.08:28:39.91#ibcon#read 5, iclass 10, count 0 2006.229.08:28:39.91#ibcon#about to read 6, iclass 10, count 0 2006.229.08:28:39.91#ibcon#read 6, iclass 10, count 0 2006.229.08:28:39.91#ibcon#end of sib2, iclass 10, count 0 2006.229.08:28:39.91#ibcon#*after write, iclass 10, count 0 2006.229.08:28:39.91#ibcon#*before return 0, iclass 10, count 0 2006.229.08:28:39.91#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:39.91#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:28:39.91#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:28:39.91#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:28:39.91$vck44/vb=1,4 2006.229.08:28:39.91#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.08:28:39.91#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.08:28:39.91#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:39.91#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:39.91#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:39.91#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:39.91#ibcon#enter wrdev, iclass 12, count 2 2006.229.08:28:39.91#ibcon#first serial, iclass 12, count 2 2006.229.08:28:39.91#ibcon#enter sib2, iclass 12, count 2 2006.229.08:28:39.91#ibcon#flushed, iclass 12, count 2 2006.229.08:28:39.91#ibcon#about to write, iclass 12, count 2 2006.229.08:28:39.91#ibcon#wrote, iclass 12, count 2 2006.229.08:28:39.91#ibcon#about to read 3, iclass 12, count 2 2006.229.08:28:39.93#ibcon#read 3, iclass 12, count 2 2006.229.08:28:39.93#ibcon#about to read 4, iclass 12, count 2 2006.229.08:28:39.93#ibcon#read 4, iclass 12, count 2 2006.229.08:28:39.93#ibcon#about to read 5, iclass 12, count 2 2006.229.08:28:39.93#ibcon#read 5, iclass 12, count 2 2006.229.08:28:39.93#ibcon#about to read 6, iclass 12, count 2 2006.229.08:28:39.93#ibcon#read 6, iclass 12, count 2 2006.229.08:28:39.93#ibcon#end of sib2, iclass 12, count 2 2006.229.08:28:39.93#ibcon#*mode == 0, iclass 12, count 2 2006.229.08:28:39.93#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.08:28:39.93#ibcon#[27=AT01-04\r\n] 2006.229.08:28:39.93#ibcon#*before write, iclass 12, count 2 2006.229.08:28:39.93#ibcon#enter sib2, iclass 12, count 2 2006.229.08:28:39.93#ibcon#flushed, iclass 12, count 2 2006.229.08:28:39.93#ibcon#about to write, iclass 12, count 2 2006.229.08:28:39.93#ibcon#wrote, iclass 12, count 2 2006.229.08:28:39.93#ibcon#about to read 3, iclass 12, count 2 2006.229.08:28:39.96#ibcon#read 3, iclass 12, count 2 2006.229.08:28:39.96#ibcon#about to read 4, iclass 12, count 2 2006.229.08:28:39.96#ibcon#read 4, iclass 12, count 2 2006.229.08:28:39.96#ibcon#about to read 5, iclass 12, count 2 2006.229.08:28:39.96#ibcon#read 5, iclass 12, count 2 2006.229.08:28:39.96#ibcon#about to read 6, iclass 12, count 2 2006.229.08:28:39.96#ibcon#read 6, iclass 12, count 2 2006.229.08:28:39.96#ibcon#end of sib2, iclass 12, count 2 2006.229.08:28:39.96#ibcon#*after write, iclass 12, count 2 2006.229.08:28:39.96#ibcon#*before return 0, iclass 12, count 2 2006.229.08:28:39.96#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:39.96#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:28:39.96#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.08:28:39.96#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:39.96#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:40.08#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:40.08#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:40.08#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:28:40.08#ibcon#first serial, iclass 12, count 0 2006.229.08:28:40.08#ibcon#enter sib2, iclass 12, count 0 2006.229.08:28:40.08#ibcon#flushed, iclass 12, count 0 2006.229.08:28:40.08#ibcon#about to write, iclass 12, count 0 2006.229.08:28:40.08#ibcon#wrote, iclass 12, count 0 2006.229.08:28:40.08#ibcon#about to read 3, iclass 12, count 0 2006.229.08:28:40.10#ibcon#read 3, iclass 12, count 0 2006.229.08:28:40.10#ibcon#about to read 4, iclass 12, count 0 2006.229.08:28:40.10#ibcon#read 4, iclass 12, count 0 2006.229.08:28:40.10#ibcon#about to read 5, iclass 12, count 0 2006.229.08:28:40.10#ibcon#read 5, iclass 12, count 0 2006.229.08:28:40.10#ibcon#about to read 6, iclass 12, count 0 2006.229.08:28:40.10#ibcon#read 6, iclass 12, count 0 2006.229.08:28:40.10#ibcon#end of sib2, iclass 12, count 0 2006.229.08:28:40.10#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:28:40.10#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:28:40.10#ibcon#[27=USB\r\n] 2006.229.08:28:40.10#ibcon#*before write, iclass 12, count 0 2006.229.08:28:40.10#ibcon#enter sib2, iclass 12, count 0 2006.229.08:28:40.10#ibcon#flushed, iclass 12, count 0 2006.229.08:28:40.10#ibcon#about to write, iclass 12, count 0 2006.229.08:28:40.10#ibcon#wrote, iclass 12, count 0 2006.229.08:28:40.10#ibcon#about to read 3, iclass 12, count 0 2006.229.08:28:40.13#ibcon#read 3, iclass 12, count 0 2006.229.08:28:40.13#ibcon#about to read 4, iclass 12, count 0 2006.229.08:28:40.13#ibcon#read 4, iclass 12, count 0 2006.229.08:28:40.13#ibcon#about to read 5, iclass 12, count 0 2006.229.08:28:40.13#ibcon#read 5, iclass 12, count 0 2006.229.08:28:40.13#ibcon#about to read 6, iclass 12, count 0 2006.229.08:28:40.13#ibcon#read 6, iclass 12, count 0 2006.229.08:28:40.13#ibcon#end of sib2, iclass 12, count 0 2006.229.08:28:40.13#ibcon#*after write, iclass 12, count 0 2006.229.08:28:40.13#ibcon#*before return 0, iclass 12, count 0 2006.229.08:28:40.13#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:40.13#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:28:40.13#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:28:40.13#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:28:40.13$vck44/vblo=2,634.99 2006.229.08:28:40.13#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.08:28:40.13#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.08:28:40.13#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:40.13#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:40.13#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:40.13#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:40.13#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:28:40.13#ibcon#first serial, iclass 14, count 0 2006.229.08:28:40.13#ibcon#enter sib2, iclass 14, count 0 2006.229.08:28:40.13#ibcon#flushed, iclass 14, count 0 2006.229.08:28:40.13#ibcon#about to write, iclass 14, count 0 2006.229.08:28:40.13#ibcon#wrote, iclass 14, count 0 2006.229.08:28:40.13#ibcon#about to read 3, iclass 14, count 0 2006.229.08:28:40.15#ibcon#read 3, iclass 14, count 0 2006.229.08:28:40.15#ibcon#about to read 4, iclass 14, count 0 2006.229.08:28:40.15#ibcon#read 4, iclass 14, count 0 2006.229.08:28:40.15#ibcon#about to read 5, iclass 14, count 0 2006.229.08:28:40.15#ibcon#read 5, iclass 14, count 0 2006.229.08:28:40.15#ibcon#about to read 6, iclass 14, count 0 2006.229.08:28:40.15#ibcon#read 6, iclass 14, count 0 2006.229.08:28:40.15#ibcon#end of sib2, iclass 14, count 0 2006.229.08:28:40.15#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:28:40.15#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:28:40.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:28:40.15#ibcon#*before write, iclass 14, count 0 2006.229.08:28:40.15#ibcon#enter sib2, iclass 14, count 0 2006.229.08:28:40.15#ibcon#flushed, iclass 14, count 0 2006.229.08:28:40.15#ibcon#about to write, iclass 14, count 0 2006.229.08:28:40.15#ibcon#wrote, iclass 14, count 0 2006.229.08:28:40.15#ibcon#about to read 3, iclass 14, count 0 2006.229.08:28:40.19#ibcon#read 3, iclass 14, count 0 2006.229.08:28:40.19#ibcon#about to read 4, iclass 14, count 0 2006.229.08:28:40.19#ibcon#read 4, iclass 14, count 0 2006.229.08:28:40.19#ibcon#about to read 5, iclass 14, count 0 2006.229.08:28:40.19#ibcon#read 5, iclass 14, count 0 2006.229.08:28:40.19#ibcon#about to read 6, iclass 14, count 0 2006.229.08:28:40.19#ibcon#read 6, iclass 14, count 0 2006.229.08:28:40.19#ibcon#end of sib2, iclass 14, count 0 2006.229.08:28:40.19#ibcon#*after write, iclass 14, count 0 2006.229.08:28:40.19#ibcon#*before return 0, iclass 14, count 0 2006.229.08:28:40.19#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:40.19#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:28:40.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:28:40.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:28:40.19$vck44/vb=2,4 2006.229.08:28:40.19#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.08:28:40.19#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.08:28:40.19#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:40.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:40.25#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:40.25#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:40.25#ibcon#enter wrdev, iclass 16, count 2 2006.229.08:28:40.25#ibcon#first serial, iclass 16, count 2 2006.229.08:28:40.25#ibcon#enter sib2, iclass 16, count 2 2006.229.08:28:40.25#ibcon#flushed, iclass 16, count 2 2006.229.08:28:40.25#ibcon#about to write, iclass 16, count 2 2006.229.08:28:40.25#ibcon#wrote, iclass 16, count 2 2006.229.08:28:40.25#ibcon#about to read 3, iclass 16, count 2 2006.229.08:28:40.27#ibcon#read 3, iclass 16, count 2 2006.229.08:28:40.27#ibcon#about to read 4, iclass 16, count 2 2006.229.08:28:40.27#ibcon#read 4, iclass 16, count 2 2006.229.08:28:40.27#ibcon#about to read 5, iclass 16, count 2 2006.229.08:28:40.27#ibcon#read 5, iclass 16, count 2 2006.229.08:28:40.27#ibcon#about to read 6, iclass 16, count 2 2006.229.08:28:40.27#ibcon#read 6, iclass 16, count 2 2006.229.08:28:40.27#ibcon#end of sib2, iclass 16, count 2 2006.229.08:28:40.27#ibcon#*mode == 0, iclass 16, count 2 2006.229.08:28:40.27#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.08:28:40.27#ibcon#[27=AT02-04\r\n] 2006.229.08:28:40.27#ibcon#*before write, iclass 16, count 2 2006.229.08:28:40.27#ibcon#enter sib2, iclass 16, count 2 2006.229.08:28:40.27#ibcon#flushed, iclass 16, count 2 2006.229.08:28:40.27#ibcon#about to write, iclass 16, count 2 2006.229.08:28:40.27#ibcon#wrote, iclass 16, count 2 2006.229.08:28:40.27#ibcon#about to read 3, iclass 16, count 2 2006.229.08:28:40.30#ibcon#read 3, iclass 16, count 2 2006.229.08:28:40.30#ibcon#about to read 4, iclass 16, count 2 2006.229.08:28:40.30#ibcon#read 4, iclass 16, count 2 2006.229.08:28:40.30#ibcon#about to read 5, iclass 16, count 2 2006.229.08:28:40.30#ibcon#read 5, iclass 16, count 2 2006.229.08:28:40.30#ibcon#about to read 6, iclass 16, count 2 2006.229.08:28:40.30#ibcon#read 6, iclass 16, count 2 2006.229.08:28:40.30#ibcon#end of sib2, iclass 16, count 2 2006.229.08:28:40.30#ibcon#*after write, iclass 16, count 2 2006.229.08:28:40.30#ibcon#*before return 0, iclass 16, count 2 2006.229.08:28:40.30#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:40.30#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:28:40.30#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.08:28:40.30#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:40.30#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:40.42#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:40.42#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:40.42#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:28:40.42#ibcon#first serial, iclass 16, count 0 2006.229.08:28:40.42#ibcon#enter sib2, iclass 16, count 0 2006.229.08:28:40.42#ibcon#flushed, iclass 16, count 0 2006.229.08:28:40.42#ibcon#about to write, iclass 16, count 0 2006.229.08:28:40.42#ibcon#wrote, iclass 16, count 0 2006.229.08:28:40.42#ibcon#about to read 3, iclass 16, count 0 2006.229.08:28:40.44#ibcon#read 3, iclass 16, count 0 2006.229.08:28:40.44#ibcon#about to read 4, iclass 16, count 0 2006.229.08:28:40.44#ibcon#read 4, iclass 16, count 0 2006.229.08:28:40.44#ibcon#about to read 5, iclass 16, count 0 2006.229.08:28:40.44#ibcon#read 5, iclass 16, count 0 2006.229.08:28:40.44#ibcon#about to read 6, iclass 16, count 0 2006.229.08:28:40.44#ibcon#read 6, iclass 16, count 0 2006.229.08:28:40.44#ibcon#end of sib2, iclass 16, count 0 2006.229.08:28:40.44#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:28:40.44#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:28:40.44#ibcon#[27=USB\r\n] 2006.229.08:28:40.44#ibcon#*before write, iclass 16, count 0 2006.229.08:28:40.44#ibcon#enter sib2, iclass 16, count 0 2006.229.08:28:40.44#ibcon#flushed, iclass 16, count 0 2006.229.08:28:40.44#ibcon#about to write, iclass 16, count 0 2006.229.08:28:40.44#ibcon#wrote, iclass 16, count 0 2006.229.08:28:40.44#ibcon#about to read 3, iclass 16, count 0 2006.229.08:28:40.47#ibcon#read 3, iclass 16, count 0 2006.229.08:28:40.47#ibcon#about to read 4, iclass 16, count 0 2006.229.08:28:40.47#ibcon#read 4, iclass 16, count 0 2006.229.08:28:40.47#ibcon#about to read 5, iclass 16, count 0 2006.229.08:28:40.47#ibcon#read 5, iclass 16, count 0 2006.229.08:28:40.47#ibcon#about to read 6, iclass 16, count 0 2006.229.08:28:40.47#ibcon#read 6, iclass 16, count 0 2006.229.08:28:40.47#ibcon#end of sib2, iclass 16, count 0 2006.229.08:28:40.47#ibcon#*after write, iclass 16, count 0 2006.229.08:28:40.47#ibcon#*before return 0, iclass 16, count 0 2006.229.08:28:40.47#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:40.47#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:28:40.47#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:28:40.47#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:28:40.47$vck44/vblo=3,649.99 2006.229.08:28:40.47#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.08:28:40.47#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.08:28:40.47#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:40.47#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:40.47#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:40.47#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:40.47#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:28:40.47#ibcon#first serial, iclass 18, count 0 2006.229.08:28:40.47#ibcon#enter sib2, iclass 18, count 0 2006.229.08:28:40.47#ibcon#flushed, iclass 18, count 0 2006.229.08:28:40.47#ibcon#about to write, iclass 18, count 0 2006.229.08:28:40.47#ibcon#wrote, iclass 18, count 0 2006.229.08:28:40.47#ibcon#about to read 3, iclass 18, count 0 2006.229.08:28:40.49#ibcon#read 3, iclass 18, count 0 2006.229.08:28:40.49#ibcon#about to read 4, iclass 18, count 0 2006.229.08:28:40.49#ibcon#read 4, iclass 18, count 0 2006.229.08:28:40.49#ibcon#about to read 5, iclass 18, count 0 2006.229.08:28:40.49#ibcon#read 5, iclass 18, count 0 2006.229.08:28:40.49#ibcon#about to read 6, iclass 18, count 0 2006.229.08:28:40.49#ibcon#read 6, iclass 18, count 0 2006.229.08:28:40.49#ibcon#end of sib2, iclass 18, count 0 2006.229.08:28:40.49#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:28:40.49#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:28:40.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:28:40.49#ibcon#*before write, iclass 18, count 0 2006.229.08:28:40.49#ibcon#enter sib2, iclass 18, count 0 2006.229.08:28:40.49#ibcon#flushed, iclass 18, count 0 2006.229.08:28:40.49#ibcon#about to write, iclass 18, count 0 2006.229.08:28:40.49#ibcon#wrote, iclass 18, count 0 2006.229.08:28:40.49#ibcon#about to read 3, iclass 18, count 0 2006.229.08:28:40.53#ibcon#read 3, iclass 18, count 0 2006.229.08:28:40.53#ibcon#about to read 4, iclass 18, count 0 2006.229.08:28:40.53#ibcon#read 4, iclass 18, count 0 2006.229.08:28:40.53#ibcon#about to read 5, iclass 18, count 0 2006.229.08:28:40.53#ibcon#read 5, iclass 18, count 0 2006.229.08:28:40.53#ibcon#about to read 6, iclass 18, count 0 2006.229.08:28:40.53#ibcon#read 6, iclass 18, count 0 2006.229.08:28:40.53#ibcon#end of sib2, iclass 18, count 0 2006.229.08:28:40.53#ibcon#*after write, iclass 18, count 0 2006.229.08:28:40.53#ibcon#*before return 0, iclass 18, count 0 2006.229.08:28:40.53#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:40.53#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:28:40.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:28:40.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:28:40.53$vck44/vb=3,4 2006.229.08:28:40.53#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.08:28:40.53#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.08:28:40.53#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:40.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:40.59#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:40.59#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:40.59#ibcon#enter wrdev, iclass 20, count 2 2006.229.08:28:40.59#ibcon#first serial, iclass 20, count 2 2006.229.08:28:40.59#ibcon#enter sib2, iclass 20, count 2 2006.229.08:28:40.59#ibcon#flushed, iclass 20, count 2 2006.229.08:28:40.59#ibcon#about to write, iclass 20, count 2 2006.229.08:28:40.59#ibcon#wrote, iclass 20, count 2 2006.229.08:28:40.59#ibcon#about to read 3, iclass 20, count 2 2006.229.08:28:40.61#ibcon#read 3, iclass 20, count 2 2006.229.08:28:40.61#ibcon#about to read 4, iclass 20, count 2 2006.229.08:28:40.61#ibcon#read 4, iclass 20, count 2 2006.229.08:28:40.61#ibcon#about to read 5, iclass 20, count 2 2006.229.08:28:40.61#ibcon#read 5, iclass 20, count 2 2006.229.08:28:40.61#ibcon#about to read 6, iclass 20, count 2 2006.229.08:28:40.61#ibcon#read 6, iclass 20, count 2 2006.229.08:28:40.61#ibcon#end of sib2, iclass 20, count 2 2006.229.08:28:40.61#ibcon#*mode == 0, iclass 20, count 2 2006.229.08:28:40.61#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.08:28:40.61#ibcon#[27=AT03-04\r\n] 2006.229.08:28:40.61#ibcon#*before write, iclass 20, count 2 2006.229.08:28:40.61#ibcon#enter sib2, iclass 20, count 2 2006.229.08:28:40.61#ibcon#flushed, iclass 20, count 2 2006.229.08:28:40.61#ibcon#about to write, iclass 20, count 2 2006.229.08:28:40.61#ibcon#wrote, iclass 20, count 2 2006.229.08:28:40.61#ibcon#about to read 3, iclass 20, count 2 2006.229.08:28:40.64#ibcon#read 3, iclass 20, count 2 2006.229.08:28:40.64#ibcon#about to read 4, iclass 20, count 2 2006.229.08:28:40.64#ibcon#read 4, iclass 20, count 2 2006.229.08:28:40.64#ibcon#about to read 5, iclass 20, count 2 2006.229.08:28:40.64#ibcon#read 5, iclass 20, count 2 2006.229.08:28:40.64#ibcon#about to read 6, iclass 20, count 2 2006.229.08:28:40.64#ibcon#read 6, iclass 20, count 2 2006.229.08:28:40.64#ibcon#end of sib2, iclass 20, count 2 2006.229.08:28:40.64#ibcon#*after write, iclass 20, count 2 2006.229.08:28:40.64#ibcon#*before return 0, iclass 20, count 2 2006.229.08:28:40.64#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:40.64#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:28:40.64#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.08:28:40.64#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:40.64#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:40.76#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:40.76#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:40.76#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:28:40.76#ibcon#first serial, iclass 20, count 0 2006.229.08:28:40.76#ibcon#enter sib2, iclass 20, count 0 2006.229.08:28:40.76#ibcon#flushed, iclass 20, count 0 2006.229.08:28:40.76#ibcon#about to write, iclass 20, count 0 2006.229.08:28:40.76#ibcon#wrote, iclass 20, count 0 2006.229.08:28:40.76#ibcon#about to read 3, iclass 20, count 0 2006.229.08:28:40.78#ibcon#read 3, iclass 20, count 0 2006.229.08:28:40.78#ibcon#about to read 4, iclass 20, count 0 2006.229.08:28:40.78#ibcon#read 4, iclass 20, count 0 2006.229.08:28:40.78#ibcon#about to read 5, iclass 20, count 0 2006.229.08:28:40.78#ibcon#read 5, iclass 20, count 0 2006.229.08:28:40.78#ibcon#about to read 6, iclass 20, count 0 2006.229.08:28:40.78#ibcon#read 6, iclass 20, count 0 2006.229.08:28:40.78#ibcon#end of sib2, iclass 20, count 0 2006.229.08:28:40.78#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:28:40.78#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:28:40.78#ibcon#[27=USB\r\n] 2006.229.08:28:40.78#ibcon#*before write, iclass 20, count 0 2006.229.08:28:40.78#ibcon#enter sib2, iclass 20, count 0 2006.229.08:28:40.78#ibcon#flushed, iclass 20, count 0 2006.229.08:28:40.78#ibcon#about to write, iclass 20, count 0 2006.229.08:28:40.78#ibcon#wrote, iclass 20, count 0 2006.229.08:28:40.78#ibcon#about to read 3, iclass 20, count 0 2006.229.08:28:40.81#ibcon#read 3, iclass 20, count 0 2006.229.08:28:40.81#ibcon#about to read 4, iclass 20, count 0 2006.229.08:28:40.81#ibcon#read 4, iclass 20, count 0 2006.229.08:28:40.81#ibcon#about to read 5, iclass 20, count 0 2006.229.08:28:40.81#ibcon#read 5, iclass 20, count 0 2006.229.08:28:40.81#ibcon#about to read 6, iclass 20, count 0 2006.229.08:28:40.81#ibcon#read 6, iclass 20, count 0 2006.229.08:28:40.81#ibcon#end of sib2, iclass 20, count 0 2006.229.08:28:40.81#ibcon#*after write, iclass 20, count 0 2006.229.08:28:40.81#ibcon#*before return 0, iclass 20, count 0 2006.229.08:28:40.81#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:40.81#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:28:40.81#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:28:40.81#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:28:40.81$vck44/vblo=4,679.99 2006.229.08:28:40.81#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.08:28:40.81#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.08:28:40.81#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:40.81#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:40.81#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:40.81#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:40.81#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:28:40.81#ibcon#first serial, iclass 22, count 0 2006.229.08:28:40.81#ibcon#enter sib2, iclass 22, count 0 2006.229.08:28:40.81#ibcon#flushed, iclass 22, count 0 2006.229.08:28:40.81#ibcon#about to write, iclass 22, count 0 2006.229.08:28:40.81#ibcon#wrote, iclass 22, count 0 2006.229.08:28:40.81#ibcon#about to read 3, iclass 22, count 0 2006.229.08:28:40.83#ibcon#read 3, iclass 22, count 0 2006.229.08:28:40.83#ibcon#about to read 4, iclass 22, count 0 2006.229.08:28:40.83#ibcon#read 4, iclass 22, count 0 2006.229.08:28:40.83#ibcon#about to read 5, iclass 22, count 0 2006.229.08:28:40.83#ibcon#read 5, iclass 22, count 0 2006.229.08:28:40.83#ibcon#about to read 6, iclass 22, count 0 2006.229.08:28:40.83#ibcon#read 6, iclass 22, count 0 2006.229.08:28:40.83#ibcon#end of sib2, iclass 22, count 0 2006.229.08:28:40.83#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:28:40.83#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:28:40.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:28:40.83#ibcon#*before write, iclass 22, count 0 2006.229.08:28:40.83#ibcon#enter sib2, iclass 22, count 0 2006.229.08:28:40.83#ibcon#flushed, iclass 22, count 0 2006.229.08:28:40.83#ibcon#about to write, iclass 22, count 0 2006.229.08:28:40.83#ibcon#wrote, iclass 22, count 0 2006.229.08:28:40.83#ibcon#about to read 3, iclass 22, count 0 2006.229.08:28:40.87#ibcon#read 3, iclass 22, count 0 2006.229.08:28:40.87#ibcon#about to read 4, iclass 22, count 0 2006.229.08:28:40.87#ibcon#read 4, iclass 22, count 0 2006.229.08:28:40.87#ibcon#about to read 5, iclass 22, count 0 2006.229.08:28:40.87#ibcon#read 5, iclass 22, count 0 2006.229.08:28:40.87#ibcon#about to read 6, iclass 22, count 0 2006.229.08:28:40.87#ibcon#read 6, iclass 22, count 0 2006.229.08:28:40.87#ibcon#end of sib2, iclass 22, count 0 2006.229.08:28:40.87#ibcon#*after write, iclass 22, count 0 2006.229.08:28:40.87#ibcon#*before return 0, iclass 22, count 0 2006.229.08:28:40.87#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:40.87#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:28:40.87#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:28:40.87#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:28:40.87$vck44/vb=4,4 2006.229.08:28:40.87#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.08:28:40.87#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.08:28:40.87#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:40.87#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:40.93#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:40.93#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:40.93#ibcon#enter wrdev, iclass 24, count 2 2006.229.08:28:40.93#ibcon#first serial, iclass 24, count 2 2006.229.08:28:40.93#ibcon#enter sib2, iclass 24, count 2 2006.229.08:28:40.93#ibcon#flushed, iclass 24, count 2 2006.229.08:28:40.93#ibcon#about to write, iclass 24, count 2 2006.229.08:28:40.93#ibcon#wrote, iclass 24, count 2 2006.229.08:28:40.93#ibcon#about to read 3, iclass 24, count 2 2006.229.08:28:40.95#ibcon#read 3, iclass 24, count 2 2006.229.08:28:40.95#ibcon#about to read 4, iclass 24, count 2 2006.229.08:28:40.95#ibcon#read 4, iclass 24, count 2 2006.229.08:28:40.95#ibcon#about to read 5, iclass 24, count 2 2006.229.08:28:40.95#ibcon#read 5, iclass 24, count 2 2006.229.08:28:40.95#ibcon#about to read 6, iclass 24, count 2 2006.229.08:28:40.95#ibcon#read 6, iclass 24, count 2 2006.229.08:28:40.95#ibcon#end of sib2, iclass 24, count 2 2006.229.08:28:40.95#ibcon#*mode == 0, iclass 24, count 2 2006.229.08:28:40.95#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.08:28:40.95#ibcon#[27=AT04-04\r\n] 2006.229.08:28:40.95#ibcon#*before write, iclass 24, count 2 2006.229.08:28:40.95#ibcon#enter sib2, iclass 24, count 2 2006.229.08:28:40.95#ibcon#flushed, iclass 24, count 2 2006.229.08:28:40.95#ibcon#about to write, iclass 24, count 2 2006.229.08:28:40.95#ibcon#wrote, iclass 24, count 2 2006.229.08:28:40.95#ibcon#about to read 3, iclass 24, count 2 2006.229.08:28:40.98#ibcon#read 3, iclass 24, count 2 2006.229.08:28:40.98#ibcon#about to read 4, iclass 24, count 2 2006.229.08:28:40.98#ibcon#read 4, iclass 24, count 2 2006.229.08:28:40.98#ibcon#about to read 5, iclass 24, count 2 2006.229.08:28:40.98#ibcon#read 5, iclass 24, count 2 2006.229.08:28:40.98#ibcon#about to read 6, iclass 24, count 2 2006.229.08:28:40.98#ibcon#read 6, iclass 24, count 2 2006.229.08:28:40.98#ibcon#end of sib2, iclass 24, count 2 2006.229.08:28:40.98#ibcon#*after write, iclass 24, count 2 2006.229.08:28:40.98#ibcon#*before return 0, iclass 24, count 2 2006.229.08:28:40.98#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:40.98#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:28:40.98#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.08:28:40.98#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:40.98#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:41.10#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:41.10#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:41.10#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:28:41.10#ibcon#first serial, iclass 24, count 0 2006.229.08:28:41.10#ibcon#enter sib2, iclass 24, count 0 2006.229.08:28:41.10#ibcon#flushed, iclass 24, count 0 2006.229.08:28:41.10#ibcon#about to write, iclass 24, count 0 2006.229.08:28:41.10#ibcon#wrote, iclass 24, count 0 2006.229.08:28:41.10#ibcon#about to read 3, iclass 24, count 0 2006.229.08:28:41.12#ibcon#read 3, iclass 24, count 0 2006.229.08:28:41.12#ibcon#about to read 4, iclass 24, count 0 2006.229.08:28:41.12#ibcon#read 4, iclass 24, count 0 2006.229.08:28:41.12#ibcon#about to read 5, iclass 24, count 0 2006.229.08:28:41.12#ibcon#read 5, iclass 24, count 0 2006.229.08:28:41.12#ibcon#about to read 6, iclass 24, count 0 2006.229.08:28:41.12#ibcon#read 6, iclass 24, count 0 2006.229.08:28:41.12#ibcon#end of sib2, iclass 24, count 0 2006.229.08:28:41.12#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:28:41.12#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:28:41.12#ibcon#[27=USB\r\n] 2006.229.08:28:41.12#ibcon#*before write, iclass 24, count 0 2006.229.08:28:41.12#ibcon#enter sib2, iclass 24, count 0 2006.229.08:28:41.12#ibcon#flushed, iclass 24, count 0 2006.229.08:28:41.12#ibcon#about to write, iclass 24, count 0 2006.229.08:28:41.12#ibcon#wrote, iclass 24, count 0 2006.229.08:28:41.12#ibcon#about to read 3, iclass 24, count 0 2006.229.08:28:41.15#ibcon#read 3, iclass 24, count 0 2006.229.08:28:41.15#ibcon#about to read 4, iclass 24, count 0 2006.229.08:28:41.15#ibcon#read 4, iclass 24, count 0 2006.229.08:28:41.15#ibcon#about to read 5, iclass 24, count 0 2006.229.08:28:41.15#ibcon#read 5, iclass 24, count 0 2006.229.08:28:41.15#ibcon#about to read 6, iclass 24, count 0 2006.229.08:28:41.15#ibcon#read 6, iclass 24, count 0 2006.229.08:28:41.15#ibcon#end of sib2, iclass 24, count 0 2006.229.08:28:41.15#ibcon#*after write, iclass 24, count 0 2006.229.08:28:41.15#ibcon#*before return 0, iclass 24, count 0 2006.229.08:28:41.15#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:41.15#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:28:41.15#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:28:41.15#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:28:41.15$vck44/vblo=5,709.99 2006.229.08:28:41.15#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.08:28:41.15#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.08:28:41.15#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:41.15#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:28:41.15#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:28:41.15#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:28:41.15#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:28:41.15#ibcon#first serial, iclass 26, count 0 2006.229.08:28:41.15#ibcon#enter sib2, iclass 26, count 0 2006.229.08:28:41.15#ibcon#flushed, iclass 26, count 0 2006.229.08:28:41.15#ibcon#about to write, iclass 26, count 0 2006.229.08:28:41.15#ibcon#wrote, iclass 26, count 0 2006.229.08:28:41.15#ibcon#about to read 3, iclass 26, count 0 2006.229.08:28:41.17#ibcon#read 3, iclass 26, count 0 2006.229.08:28:41.17#ibcon#about to read 4, iclass 26, count 0 2006.229.08:28:41.17#ibcon#read 4, iclass 26, count 0 2006.229.08:28:41.17#ibcon#about to read 5, iclass 26, count 0 2006.229.08:28:41.17#ibcon#read 5, iclass 26, count 0 2006.229.08:28:41.17#ibcon#about to read 6, iclass 26, count 0 2006.229.08:28:41.17#ibcon#read 6, iclass 26, count 0 2006.229.08:28:41.17#ibcon#end of sib2, iclass 26, count 0 2006.229.08:28:41.17#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:28:41.17#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:28:41.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:28:41.17#ibcon#*before write, iclass 26, count 0 2006.229.08:28:41.17#ibcon#enter sib2, iclass 26, count 0 2006.229.08:28:41.17#ibcon#flushed, iclass 26, count 0 2006.229.08:28:41.17#ibcon#about to write, iclass 26, count 0 2006.229.08:28:41.17#ibcon#wrote, iclass 26, count 0 2006.229.08:28:41.17#ibcon#about to read 3, iclass 26, count 0 2006.229.08:28:41.21#ibcon#read 3, iclass 26, count 0 2006.229.08:28:41.21#ibcon#about to read 4, iclass 26, count 0 2006.229.08:28:41.21#ibcon#read 4, iclass 26, count 0 2006.229.08:28:41.21#ibcon#about to read 5, iclass 26, count 0 2006.229.08:28:41.21#ibcon#read 5, iclass 26, count 0 2006.229.08:28:41.21#ibcon#about to read 6, iclass 26, count 0 2006.229.08:28:41.21#ibcon#read 6, iclass 26, count 0 2006.229.08:28:41.21#ibcon#end of sib2, iclass 26, count 0 2006.229.08:28:41.21#ibcon#*after write, iclass 26, count 0 2006.229.08:28:41.21#ibcon#*before return 0, iclass 26, count 0 2006.229.08:28:41.21#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:28:41.21#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:28:41.21#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:28:41.21#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:28:41.21$vck44/vb=5,4 2006.229.08:28:41.21#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.08:28:41.21#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.08:28:41.21#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:41.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:28:41.27#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:28:41.27#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:28:41.27#ibcon#enter wrdev, iclass 28, count 2 2006.229.08:28:41.27#ibcon#first serial, iclass 28, count 2 2006.229.08:28:41.27#ibcon#enter sib2, iclass 28, count 2 2006.229.08:28:41.27#ibcon#flushed, iclass 28, count 2 2006.229.08:28:41.27#ibcon#about to write, iclass 28, count 2 2006.229.08:28:41.27#ibcon#wrote, iclass 28, count 2 2006.229.08:28:41.27#ibcon#about to read 3, iclass 28, count 2 2006.229.08:28:41.29#ibcon#read 3, iclass 28, count 2 2006.229.08:28:41.29#ibcon#about to read 4, iclass 28, count 2 2006.229.08:28:41.29#ibcon#read 4, iclass 28, count 2 2006.229.08:28:41.29#ibcon#about to read 5, iclass 28, count 2 2006.229.08:28:41.29#ibcon#read 5, iclass 28, count 2 2006.229.08:28:41.29#ibcon#about to read 6, iclass 28, count 2 2006.229.08:28:41.29#ibcon#read 6, iclass 28, count 2 2006.229.08:28:41.29#ibcon#end of sib2, iclass 28, count 2 2006.229.08:28:41.29#ibcon#*mode == 0, iclass 28, count 2 2006.229.08:28:41.29#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.08:28:41.29#ibcon#[27=AT05-04\r\n] 2006.229.08:28:41.29#ibcon#*before write, iclass 28, count 2 2006.229.08:28:41.29#ibcon#enter sib2, iclass 28, count 2 2006.229.08:28:41.29#ibcon#flushed, iclass 28, count 2 2006.229.08:28:41.29#ibcon#about to write, iclass 28, count 2 2006.229.08:28:41.29#ibcon#wrote, iclass 28, count 2 2006.229.08:28:41.29#ibcon#about to read 3, iclass 28, count 2 2006.229.08:28:41.32#ibcon#read 3, iclass 28, count 2 2006.229.08:28:41.32#ibcon#about to read 4, iclass 28, count 2 2006.229.08:28:41.32#ibcon#read 4, iclass 28, count 2 2006.229.08:28:41.32#ibcon#about to read 5, iclass 28, count 2 2006.229.08:28:41.32#ibcon#read 5, iclass 28, count 2 2006.229.08:28:41.32#ibcon#about to read 6, iclass 28, count 2 2006.229.08:28:41.32#ibcon#read 6, iclass 28, count 2 2006.229.08:28:41.32#ibcon#end of sib2, iclass 28, count 2 2006.229.08:28:41.32#ibcon#*after write, iclass 28, count 2 2006.229.08:28:41.32#ibcon#*before return 0, iclass 28, count 2 2006.229.08:28:41.32#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:28:41.32#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:28:41.32#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.08:28:41.32#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:41.32#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:28:41.44#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:28:41.44#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:28:41.44#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:28:41.44#ibcon#first serial, iclass 28, count 0 2006.229.08:28:41.44#ibcon#enter sib2, iclass 28, count 0 2006.229.08:28:41.44#ibcon#flushed, iclass 28, count 0 2006.229.08:28:41.44#ibcon#about to write, iclass 28, count 0 2006.229.08:28:41.44#ibcon#wrote, iclass 28, count 0 2006.229.08:28:41.44#ibcon#about to read 3, iclass 28, count 0 2006.229.08:28:41.46#ibcon#read 3, iclass 28, count 0 2006.229.08:28:41.46#ibcon#about to read 4, iclass 28, count 0 2006.229.08:28:41.46#ibcon#read 4, iclass 28, count 0 2006.229.08:28:41.46#ibcon#about to read 5, iclass 28, count 0 2006.229.08:28:41.46#ibcon#read 5, iclass 28, count 0 2006.229.08:28:41.46#ibcon#about to read 6, iclass 28, count 0 2006.229.08:28:41.46#ibcon#read 6, iclass 28, count 0 2006.229.08:28:41.46#ibcon#end of sib2, iclass 28, count 0 2006.229.08:28:41.46#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:28:41.46#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:28:41.46#ibcon#[27=USB\r\n] 2006.229.08:28:41.46#ibcon#*before write, iclass 28, count 0 2006.229.08:28:41.46#ibcon#enter sib2, iclass 28, count 0 2006.229.08:28:41.46#ibcon#flushed, iclass 28, count 0 2006.229.08:28:41.46#ibcon#about to write, iclass 28, count 0 2006.229.08:28:41.46#ibcon#wrote, iclass 28, count 0 2006.229.08:28:41.46#ibcon#about to read 3, iclass 28, count 0 2006.229.08:28:41.49#ibcon#read 3, iclass 28, count 0 2006.229.08:28:41.49#ibcon#about to read 4, iclass 28, count 0 2006.229.08:28:41.49#ibcon#read 4, iclass 28, count 0 2006.229.08:28:41.49#ibcon#about to read 5, iclass 28, count 0 2006.229.08:28:41.49#ibcon#read 5, iclass 28, count 0 2006.229.08:28:41.49#ibcon#about to read 6, iclass 28, count 0 2006.229.08:28:41.49#ibcon#read 6, iclass 28, count 0 2006.229.08:28:41.49#ibcon#end of sib2, iclass 28, count 0 2006.229.08:28:41.49#ibcon#*after write, iclass 28, count 0 2006.229.08:28:41.49#ibcon#*before return 0, iclass 28, count 0 2006.229.08:28:41.49#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:28:41.49#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:28:41.49#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:28:41.49#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:28:41.49$vck44/vblo=6,719.99 2006.229.08:28:41.49#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.08:28:41.49#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.08:28:41.49#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:41.49#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:28:41.49#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:28:41.49#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:28:41.49#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:28:41.49#ibcon#first serial, iclass 30, count 0 2006.229.08:28:41.49#ibcon#enter sib2, iclass 30, count 0 2006.229.08:28:41.49#ibcon#flushed, iclass 30, count 0 2006.229.08:28:41.49#ibcon#about to write, iclass 30, count 0 2006.229.08:28:41.49#ibcon#wrote, iclass 30, count 0 2006.229.08:28:41.49#ibcon#about to read 3, iclass 30, count 0 2006.229.08:28:41.51#ibcon#read 3, iclass 30, count 0 2006.229.08:28:41.51#ibcon#about to read 4, iclass 30, count 0 2006.229.08:28:41.51#ibcon#read 4, iclass 30, count 0 2006.229.08:28:41.51#ibcon#about to read 5, iclass 30, count 0 2006.229.08:28:41.51#ibcon#read 5, iclass 30, count 0 2006.229.08:28:41.51#ibcon#about to read 6, iclass 30, count 0 2006.229.08:28:41.51#ibcon#read 6, iclass 30, count 0 2006.229.08:28:41.51#ibcon#end of sib2, iclass 30, count 0 2006.229.08:28:41.51#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:28:41.51#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:28:41.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:28:41.51#ibcon#*before write, iclass 30, count 0 2006.229.08:28:41.51#ibcon#enter sib2, iclass 30, count 0 2006.229.08:28:41.51#ibcon#flushed, iclass 30, count 0 2006.229.08:28:41.51#ibcon#about to write, iclass 30, count 0 2006.229.08:28:41.51#ibcon#wrote, iclass 30, count 0 2006.229.08:28:41.51#ibcon#about to read 3, iclass 30, count 0 2006.229.08:28:41.55#ibcon#read 3, iclass 30, count 0 2006.229.08:28:41.55#ibcon#about to read 4, iclass 30, count 0 2006.229.08:28:41.55#ibcon#read 4, iclass 30, count 0 2006.229.08:28:41.55#ibcon#about to read 5, iclass 30, count 0 2006.229.08:28:41.55#ibcon#read 5, iclass 30, count 0 2006.229.08:28:41.55#ibcon#about to read 6, iclass 30, count 0 2006.229.08:28:41.55#ibcon#read 6, iclass 30, count 0 2006.229.08:28:41.55#ibcon#end of sib2, iclass 30, count 0 2006.229.08:28:41.55#ibcon#*after write, iclass 30, count 0 2006.229.08:28:41.55#ibcon#*before return 0, iclass 30, count 0 2006.229.08:28:41.55#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:28:41.55#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:28:41.55#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:28:41.55#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:28:41.55$vck44/vb=6,4 2006.229.08:28:41.55#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.08:28:41.55#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.08:28:41.55#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:41.55#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:41.61#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:41.61#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:41.61#ibcon#enter wrdev, iclass 32, count 2 2006.229.08:28:41.61#ibcon#first serial, iclass 32, count 2 2006.229.08:28:41.61#ibcon#enter sib2, iclass 32, count 2 2006.229.08:28:41.61#ibcon#flushed, iclass 32, count 2 2006.229.08:28:41.61#ibcon#about to write, iclass 32, count 2 2006.229.08:28:41.61#ibcon#wrote, iclass 32, count 2 2006.229.08:28:41.61#ibcon#about to read 3, iclass 32, count 2 2006.229.08:28:41.63#ibcon#read 3, iclass 32, count 2 2006.229.08:28:41.63#ibcon#about to read 4, iclass 32, count 2 2006.229.08:28:41.63#ibcon#read 4, iclass 32, count 2 2006.229.08:28:41.63#ibcon#about to read 5, iclass 32, count 2 2006.229.08:28:41.63#ibcon#read 5, iclass 32, count 2 2006.229.08:28:41.63#ibcon#about to read 6, iclass 32, count 2 2006.229.08:28:41.63#ibcon#read 6, iclass 32, count 2 2006.229.08:28:41.63#ibcon#end of sib2, iclass 32, count 2 2006.229.08:28:41.63#ibcon#*mode == 0, iclass 32, count 2 2006.229.08:28:41.63#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.08:28:41.63#ibcon#[27=AT06-04\r\n] 2006.229.08:28:41.63#ibcon#*before write, iclass 32, count 2 2006.229.08:28:41.63#ibcon#enter sib2, iclass 32, count 2 2006.229.08:28:41.63#ibcon#flushed, iclass 32, count 2 2006.229.08:28:41.63#ibcon#about to write, iclass 32, count 2 2006.229.08:28:41.63#ibcon#wrote, iclass 32, count 2 2006.229.08:28:41.63#ibcon#about to read 3, iclass 32, count 2 2006.229.08:28:41.66#ibcon#read 3, iclass 32, count 2 2006.229.08:28:41.71#ibcon#about to read 4, iclass 32, count 2 2006.229.08:28:41.71#ibcon#read 4, iclass 32, count 2 2006.229.08:28:41.71#ibcon#about to read 5, iclass 32, count 2 2006.229.08:28:41.71#ibcon#read 5, iclass 32, count 2 2006.229.08:28:41.71#ibcon#about to read 6, iclass 32, count 2 2006.229.08:28:41.71#ibcon#read 6, iclass 32, count 2 2006.229.08:28:41.71#ibcon#end of sib2, iclass 32, count 2 2006.229.08:28:41.71#ibcon#*after write, iclass 32, count 2 2006.229.08:28:41.71#ibcon#*before return 0, iclass 32, count 2 2006.229.08:28:41.71#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:41.71#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:28:41.71#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.08:28:41.71#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:41.71#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:41.83#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:41.83#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:41.83#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:28:41.83#ibcon#first serial, iclass 32, count 0 2006.229.08:28:41.83#ibcon#enter sib2, iclass 32, count 0 2006.229.08:28:41.83#ibcon#flushed, iclass 32, count 0 2006.229.08:28:41.83#ibcon#about to write, iclass 32, count 0 2006.229.08:28:41.83#ibcon#wrote, iclass 32, count 0 2006.229.08:28:41.83#ibcon#about to read 3, iclass 32, count 0 2006.229.08:28:41.85#ibcon#read 3, iclass 32, count 0 2006.229.08:28:41.85#ibcon#about to read 4, iclass 32, count 0 2006.229.08:28:41.85#ibcon#read 4, iclass 32, count 0 2006.229.08:28:41.85#ibcon#about to read 5, iclass 32, count 0 2006.229.08:28:41.85#ibcon#read 5, iclass 32, count 0 2006.229.08:28:41.85#ibcon#about to read 6, iclass 32, count 0 2006.229.08:28:41.85#ibcon#read 6, iclass 32, count 0 2006.229.08:28:41.85#ibcon#end of sib2, iclass 32, count 0 2006.229.08:28:41.85#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:28:41.85#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:28:41.85#ibcon#[27=USB\r\n] 2006.229.08:28:41.85#ibcon#*before write, iclass 32, count 0 2006.229.08:28:41.85#ibcon#enter sib2, iclass 32, count 0 2006.229.08:28:41.85#ibcon#flushed, iclass 32, count 0 2006.229.08:28:41.85#ibcon#about to write, iclass 32, count 0 2006.229.08:28:41.85#ibcon#wrote, iclass 32, count 0 2006.229.08:28:41.85#ibcon#about to read 3, iclass 32, count 0 2006.229.08:28:41.88#ibcon#read 3, iclass 32, count 0 2006.229.08:28:41.88#ibcon#about to read 4, iclass 32, count 0 2006.229.08:28:41.88#ibcon#read 4, iclass 32, count 0 2006.229.08:28:41.88#ibcon#about to read 5, iclass 32, count 0 2006.229.08:28:41.88#ibcon#read 5, iclass 32, count 0 2006.229.08:28:41.88#ibcon#about to read 6, iclass 32, count 0 2006.229.08:28:41.88#ibcon#read 6, iclass 32, count 0 2006.229.08:28:41.88#ibcon#end of sib2, iclass 32, count 0 2006.229.08:28:41.88#ibcon#*after write, iclass 32, count 0 2006.229.08:28:41.88#ibcon#*before return 0, iclass 32, count 0 2006.229.08:28:41.88#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:41.88#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:28:41.88#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:28:41.88#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:28:41.88$vck44/vblo=7,734.99 2006.229.08:28:41.88#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:28:41.88#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:28:41.88#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:41.88#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:41.88#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:41.88#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:41.88#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:28:41.88#ibcon#first serial, iclass 34, count 0 2006.229.08:28:41.88#ibcon#enter sib2, iclass 34, count 0 2006.229.08:28:41.88#ibcon#flushed, iclass 34, count 0 2006.229.08:28:41.88#ibcon#about to write, iclass 34, count 0 2006.229.08:28:41.88#ibcon#wrote, iclass 34, count 0 2006.229.08:28:41.88#ibcon#about to read 3, iclass 34, count 0 2006.229.08:28:41.90#ibcon#read 3, iclass 34, count 0 2006.229.08:28:41.90#ibcon#about to read 4, iclass 34, count 0 2006.229.08:28:41.90#ibcon#read 4, iclass 34, count 0 2006.229.08:28:41.90#ibcon#about to read 5, iclass 34, count 0 2006.229.08:28:41.90#ibcon#read 5, iclass 34, count 0 2006.229.08:28:41.90#ibcon#about to read 6, iclass 34, count 0 2006.229.08:28:41.90#ibcon#read 6, iclass 34, count 0 2006.229.08:28:41.90#ibcon#end of sib2, iclass 34, count 0 2006.229.08:28:41.90#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:28:41.90#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:28:41.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:28:41.90#ibcon#*before write, iclass 34, count 0 2006.229.08:28:41.90#ibcon#enter sib2, iclass 34, count 0 2006.229.08:28:41.90#ibcon#flushed, iclass 34, count 0 2006.229.08:28:41.90#ibcon#about to write, iclass 34, count 0 2006.229.08:28:41.90#ibcon#wrote, iclass 34, count 0 2006.229.08:28:41.90#ibcon#about to read 3, iclass 34, count 0 2006.229.08:28:41.94#ibcon#read 3, iclass 34, count 0 2006.229.08:28:41.94#ibcon#about to read 4, iclass 34, count 0 2006.229.08:28:41.94#ibcon#read 4, iclass 34, count 0 2006.229.08:28:41.94#ibcon#about to read 5, iclass 34, count 0 2006.229.08:28:41.94#ibcon#read 5, iclass 34, count 0 2006.229.08:28:41.94#ibcon#about to read 6, iclass 34, count 0 2006.229.08:28:41.94#ibcon#read 6, iclass 34, count 0 2006.229.08:28:41.94#ibcon#end of sib2, iclass 34, count 0 2006.229.08:28:41.94#ibcon#*after write, iclass 34, count 0 2006.229.08:28:41.94#ibcon#*before return 0, iclass 34, count 0 2006.229.08:28:41.94#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:41.94#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:28:41.94#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:28:41.94#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:28:41.94$vck44/vb=7,4 2006.229.08:28:41.94#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.08:28:41.94#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.08:28:41.94#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:41.94#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:42.00#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:42.00#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:42.00#ibcon#enter wrdev, iclass 36, count 2 2006.229.08:28:42.00#ibcon#first serial, iclass 36, count 2 2006.229.08:28:42.00#ibcon#enter sib2, iclass 36, count 2 2006.229.08:28:42.00#ibcon#flushed, iclass 36, count 2 2006.229.08:28:42.00#ibcon#about to write, iclass 36, count 2 2006.229.08:28:42.00#ibcon#wrote, iclass 36, count 2 2006.229.08:28:42.00#ibcon#about to read 3, iclass 36, count 2 2006.229.08:28:42.02#ibcon#read 3, iclass 36, count 2 2006.229.08:28:42.02#ibcon#about to read 4, iclass 36, count 2 2006.229.08:28:42.02#ibcon#read 4, iclass 36, count 2 2006.229.08:28:42.02#ibcon#about to read 5, iclass 36, count 2 2006.229.08:28:42.02#ibcon#read 5, iclass 36, count 2 2006.229.08:28:42.02#ibcon#about to read 6, iclass 36, count 2 2006.229.08:28:42.02#ibcon#read 6, iclass 36, count 2 2006.229.08:28:42.02#ibcon#end of sib2, iclass 36, count 2 2006.229.08:28:42.02#ibcon#*mode == 0, iclass 36, count 2 2006.229.08:28:42.02#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.08:28:42.02#ibcon#[27=AT07-04\r\n] 2006.229.08:28:42.02#ibcon#*before write, iclass 36, count 2 2006.229.08:28:42.02#ibcon#enter sib2, iclass 36, count 2 2006.229.08:28:42.02#ibcon#flushed, iclass 36, count 2 2006.229.08:28:42.02#ibcon#about to write, iclass 36, count 2 2006.229.08:28:42.02#ibcon#wrote, iclass 36, count 2 2006.229.08:28:42.02#ibcon#about to read 3, iclass 36, count 2 2006.229.08:28:42.05#ibcon#read 3, iclass 36, count 2 2006.229.08:28:42.05#ibcon#about to read 4, iclass 36, count 2 2006.229.08:28:42.05#ibcon#read 4, iclass 36, count 2 2006.229.08:28:42.05#ibcon#about to read 5, iclass 36, count 2 2006.229.08:28:42.05#ibcon#read 5, iclass 36, count 2 2006.229.08:28:42.05#ibcon#about to read 6, iclass 36, count 2 2006.229.08:28:42.05#ibcon#read 6, iclass 36, count 2 2006.229.08:28:42.05#ibcon#end of sib2, iclass 36, count 2 2006.229.08:28:42.05#ibcon#*after write, iclass 36, count 2 2006.229.08:28:42.05#ibcon#*before return 0, iclass 36, count 2 2006.229.08:28:42.05#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:42.05#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:28:42.05#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.08:28:42.05#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:42.05#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:42.17#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:42.17#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:42.17#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:28:42.17#ibcon#first serial, iclass 36, count 0 2006.229.08:28:42.17#ibcon#enter sib2, iclass 36, count 0 2006.229.08:28:42.17#ibcon#flushed, iclass 36, count 0 2006.229.08:28:42.17#ibcon#about to write, iclass 36, count 0 2006.229.08:28:42.17#ibcon#wrote, iclass 36, count 0 2006.229.08:28:42.17#ibcon#about to read 3, iclass 36, count 0 2006.229.08:28:42.19#ibcon#read 3, iclass 36, count 0 2006.229.08:28:42.19#ibcon#about to read 4, iclass 36, count 0 2006.229.08:28:42.19#ibcon#read 4, iclass 36, count 0 2006.229.08:28:42.19#ibcon#about to read 5, iclass 36, count 0 2006.229.08:28:42.19#ibcon#read 5, iclass 36, count 0 2006.229.08:28:42.19#ibcon#about to read 6, iclass 36, count 0 2006.229.08:28:42.19#ibcon#read 6, iclass 36, count 0 2006.229.08:28:42.19#ibcon#end of sib2, iclass 36, count 0 2006.229.08:28:42.19#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:28:42.19#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:28:42.19#ibcon#[27=USB\r\n] 2006.229.08:28:42.19#ibcon#*before write, iclass 36, count 0 2006.229.08:28:42.19#ibcon#enter sib2, iclass 36, count 0 2006.229.08:28:42.19#ibcon#flushed, iclass 36, count 0 2006.229.08:28:42.19#ibcon#about to write, iclass 36, count 0 2006.229.08:28:42.19#ibcon#wrote, iclass 36, count 0 2006.229.08:28:42.19#ibcon#about to read 3, iclass 36, count 0 2006.229.08:28:42.22#ibcon#read 3, iclass 36, count 0 2006.229.08:28:42.22#ibcon#about to read 4, iclass 36, count 0 2006.229.08:28:42.22#ibcon#read 4, iclass 36, count 0 2006.229.08:28:42.22#ibcon#about to read 5, iclass 36, count 0 2006.229.08:28:42.22#ibcon#read 5, iclass 36, count 0 2006.229.08:28:42.22#ibcon#about to read 6, iclass 36, count 0 2006.229.08:28:42.22#ibcon#read 6, iclass 36, count 0 2006.229.08:28:42.22#ibcon#end of sib2, iclass 36, count 0 2006.229.08:28:42.22#ibcon#*after write, iclass 36, count 0 2006.229.08:28:42.22#ibcon#*before return 0, iclass 36, count 0 2006.229.08:28:42.22#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:42.22#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:28:42.22#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:28:42.22#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:28:42.22$vck44/vblo=8,744.99 2006.229.08:28:42.22#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.08:28:42.22#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.08:28:42.22#ibcon#ireg 17 cls_cnt 0 2006.229.08:28:42.22#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:42.22#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:42.22#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:42.22#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:28:42.22#ibcon#first serial, iclass 38, count 0 2006.229.08:28:42.22#ibcon#enter sib2, iclass 38, count 0 2006.229.08:28:42.22#ibcon#flushed, iclass 38, count 0 2006.229.08:28:42.22#ibcon#about to write, iclass 38, count 0 2006.229.08:28:42.22#ibcon#wrote, iclass 38, count 0 2006.229.08:28:42.22#ibcon#about to read 3, iclass 38, count 0 2006.229.08:28:42.24#ibcon#read 3, iclass 38, count 0 2006.229.08:28:42.24#ibcon#about to read 4, iclass 38, count 0 2006.229.08:28:42.24#ibcon#read 4, iclass 38, count 0 2006.229.08:28:42.24#ibcon#about to read 5, iclass 38, count 0 2006.229.08:28:42.24#ibcon#read 5, iclass 38, count 0 2006.229.08:28:42.24#ibcon#about to read 6, iclass 38, count 0 2006.229.08:28:42.24#ibcon#read 6, iclass 38, count 0 2006.229.08:28:42.24#ibcon#end of sib2, iclass 38, count 0 2006.229.08:28:42.24#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:28:42.24#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:28:42.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:28:42.24#ibcon#*before write, iclass 38, count 0 2006.229.08:28:42.24#ibcon#enter sib2, iclass 38, count 0 2006.229.08:28:42.24#ibcon#flushed, iclass 38, count 0 2006.229.08:28:42.24#ibcon#about to write, iclass 38, count 0 2006.229.08:28:42.24#ibcon#wrote, iclass 38, count 0 2006.229.08:28:42.24#ibcon#about to read 3, iclass 38, count 0 2006.229.08:28:42.28#ibcon#read 3, iclass 38, count 0 2006.229.08:28:42.28#ibcon#about to read 4, iclass 38, count 0 2006.229.08:28:42.28#ibcon#read 4, iclass 38, count 0 2006.229.08:28:42.28#ibcon#about to read 5, iclass 38, count 0 2006.229.08:28:42.28#ibcon#read 5, iclass 38, count 0 2006.229.08:28:42.28#ibcon#about to read 6, iclass 38, count 0 2006.229.08:28:42.28#ibcon#read 6, iclass 38, count 0 2006.229.08:28:42.28#ibcon#end of sib2, iclass 38, count 0 2006.229.08:28:42.28#ibcon#*after write, iclass 38, count 0 2006.229.08:28:42.28#ibcon#*before return 0, iclass 38, count 0 2006.229.08:28:42.28#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:42.28#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:28:42.28#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:28:42.28#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:28:42.28$vck44/vb=8,4 2006.229.08:28:42.28#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.08:28:42.28#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.08:28:42.28#ibcon#ireg 11 cls_cnt 2 2006.229.08:28:42.28#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:42.34#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:42.34#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:42.34#ibcon#enter wrdev, iclass 40, count 2 2006.229.08:28:42.34#ibcon#first serial, iclass 40, count 2 2006.229.08:28:42.34#ibcon#enter sib2, iclass 40, count 2 2006.229.08:28:42.34#ibcon#flushed, iclass 40, count 2 2006.229.08:28:42.34#ibcon#about to write, iclass 40, count 2 2006.229.08:28:42.34#ibcon#wrote, iclass 40, count 2 2006.229.08:28:42.34#ibcon#about to read 3, iclass 40, count 2 2006.229.08:28:42.36#ibcon#read 3, iclass 40, count 2 2006.229.08:28:42.36#ibcon#about to read 4, iclass 40, count 2 2006.229.08:28:42.36#ibcon#read 4, iclass 40, count 2 2006.229.08:28:42.36#ibcon#about to read 5, iclass 40, count 2 2006.229.08:28:42.36#ibcon#read 5, iclass 40, count 2 2006.229.08:28:42.36#ibcon#about to read 6, iclass 40, count 2 2006.229.08:28:42.36#ibcon#read 6, iclass 40, count 2 2006.229.08:28:42.36#ibcon#end of sib2, iclass 40, count 2 2006.229.08:28:42.36#ibcon#*mode == 0, iclass 40, count 2 2006.229.08:28:42.36#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.08:28:42.36#ibcon#[27=AT08-04\r\n] 2006.229.08:28:42.36#ibcon#*before write, iclass 40, count 2 2006.229.08:28:42.36#ibcon#enter sib2, iclass 40, count 2 2006.229.08:28:42.36#ibcon#flushed, iclass 40, count 2 2006.229.08:28:42.36#ibcon#about to write, iclass 40, count 2 2006.229.08:28:42.36#ibcon#wrote, iclass 40, count 2 2006.229.08:28:42.36#ibcon#about to read 3, iclass 40, count 2 2006.229.08:28:42.39#ibcon#read 3, iclass 40, count 2 2006.229.08:28:42.39#ibcon#about to read 4, iclass 40, count 2 2006.229.08:28:42.39#ibcon#read 4, iclass 40, count 2 2006.229.08:28:42.39#ibcon#about to read 5, iclass 40, count 2 2006.229.08:28:42.39#ibcon#read 5, iclass 40, count 2 2006.229.08:28:42.39#ibcon#about to read 6, iclass 40, count 2 2006.229.08:28:42.39#ibcon#read 6, iclass 40, count 2 2006.229.08:28:42.39#ibcon#end of sib2, iclass 40, count 2 2006.229.08:28:42.39#ibcon#*after write, iclass 40, count 2 2006.229.08:28:42.39#ibcon#*before return 0, iclass 40, count 2 2006.229.08:28:42.39#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:42.39#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:28:42.39#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.08:28:42.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:28:42.39#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:42.51#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:42.51#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:42.51#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:28:42.51#ibcon#first serial, iclass 40, count 0 2006.229.08:28:42.51#ibcon#enter sib2, iclass 40, count 0 2006.229.08:28:42.51#ibcon#flushed, iclass 40, count 0 2006.229.08:28:42.51#ibcon#about to write, iclass 40, count 0 2006.229.08:28:42.51#ibcon#wrote, iclass 40, count 0 2006.229.08:28:42.51#ibcon#about to read 3, iclass 40, count 0 2006.229.08:28:42.53#ibcon#read 3, iclass 40, count 0 2006.229.08:28:42.53#ibcon#about to read 4, iclass 40, count 0 2006.229.08:28:42.53#ibcon#read 4, iclass 40, count 0 2006.229.08:28:42.53#ibcon#about to read 5, iclass 40, count 0 2006.229.08:28:42.53#ibcon#read 5, iclass 40, count 0 2006.229.08:28:42.53#ibcon#about to read 6, iclass 40, count 0 2006.229.08:28:42.53#ibcon#read 6, iclass 40, count 0 2006.229.08:28:42.53#ibcon#end of sib2, iclass 40, count 0 2006.229.08:28:42.53#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:28:42.53#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:28:42.53#ibcon#[27=USB\r\n] 2006.229.08:28:42.53#ibcon#*before write, iclass 40, count 0 2006.229.08:28:42.53#ibcon#enter sib2, iclass 40, count 0 2006.229.08:28:42.53#ibcon#flushed, iclass 40, count 0 2006.229.08:28:42.53#ibcon#about to write, iclass 40, count 0 2006.229.08:28:42.53#ibcon#wrote, iclass 40, count 0 2006.229.08:28:42.53#ibcon#about to read 3, iclass 40, count 0 2006.229.08:28:42.56#ibcon#read 3, iclass 40, count 0 2006.229.08:28:42.56#ibcon#about to read 4, iclass 40, count 0 2006.229.08:28:42.56#ibcon#read 4, iclass 40, count 0 2006.229.08:28:42.56#ibcon#about to read 5, iclass 40, count 0 2006.229.08:28:42.56#ibcon#read 5, iclass 40, count 0 2006.229.08:28:42.56#ibcon#about to read 6, iclass 40, count 0 2006.229.08:28:42.56#ibcon#read 6, iclass 40, count 0 2006.229.08:28:42.56#ibcon#end of sib2, iclass 40, count 0 2006.229.08:28:42.56#ibcon#*after write, iclass 40, count 0 2006.229.08:28:42.56#ibcon#*before return 0, iclass 40, count 0 2006.229.08:28:42.56#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:42.56#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:28:42.56#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:28:42.56#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:28:42.56$vck44/vabw=wide 2006.229.08:28:42.56#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.08:28:42.56#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.08:28:42.56#ibcon#ireg 8 cls_cnt 0 2006.229.08:28:42.56#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:42.56#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:42.56#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:42.56#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:28:42.56#ibcon#first serial, iclass 4, count 0 2006.229.08:28:42.56#ibcon#enter sib2, iclass 4, count 0 2006.229.08:28:42.56#ibcon#flushed, iclass 4, count 0 2006.229.08:28:42.56#ibcon#about to write, iclass 4, count 0 2006.229.08:28:42.56#ibcon#wrote, iclass 4, count 0 2006.229.08:28:42.56#ibcon#about to read 3, iclass 4, count 0 2006.229.08:28:42.58#ibcon#read 3, iclass 4, count 0 2006.229.08:28:42.58#ibcon#about to read 4, iclass 4, count 0 2006.229.08:28:42.58#ibcon#read 4, iclass 4, count 0 2006.229.08:28:42.58#ibcon#about to read 5, iclass 4, count 0 2006.229.08:28:42.58#ibcon#read 5, iclass 4, count 0 2006.229.08:28:42.58#ibcon#about to read 6, iclass 4, count 0 2006.229.08:28:42.58#ibcon#read 6, iclass 4, count 0 2006.229.08:28:42.58#ibcon#end of sib2, iclass 4, count 0 2006.229.08:28:42.58#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:28:42.58#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:28:42.58#ibcon#[25=BW32\r\n] 2006.229.08:28:42.58#ibcon#*before write, iclass 4, count 0 2006.229.08:28:42.58#ibcon#enter sib2, iclass 4, count 0 2006.229.08:28:42.58#ibcon#flushed, iclass 4, count 0 2006.229.08:28:42.58#ibcon#about to write, iclass 4, count 0 2006.229.08:28:42.58#ibcon#wrote, iclass 4, count 0 2006.229.08:28:42.58#ibcon#about to read 3, iclass 4, count 0 2006.229.08:28:42.61#ibcon#read 3, iclass 4, count 0 2006.229.08:28:42.61#ibcon#about to read 4, iclass 4, count 0 2006.229.08:28:42.61#ibcon#read 4, iclass 4, count 0 2006.229.08:28:42.61#ibcon#about to read 5, iclass 4, count 0 2006.229.08:28:42.61#ibcon#read 5, iclass 4, count 0 2006.229.08:28:42.61#ibcon#about to read 6, iclass 4, count 0 2006.229.08:28:42.61#ibcon#read 6, iclass 4, count 0 2006.229.08:28:42.61#ibcon#end of sib2, iclass 4, count 0 2006.229.08:28:42.61#ibcon#*after write, iclass 4, count 0 2006.229.08:28:42.61#ibcon#*before return 0, iclass 4, count 0 2006.229.08:28:42.61#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:42.61#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:28:42.61#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:28:42.61#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:28:42.61$vck44/vbbw=wide 2006.229.08:28:42.61#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.08:28:42.61#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.08:28:42.61#ibcon#ireg 8 cls_cnt 0 2006.229.08:28:42.61#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:28:42.68#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:28:42.68#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:28:42.68#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:28:42.68#ibcon#first serial, iclass 6, count 0 2006.229.08:28:42.68#ibcon#enter sib2, iclass 6, count 0 2006.229.08:28:42.68#ibcon#flushed, iclass 6, count 0 2006.229.08:28:42.68#ibcon#about to write, iclass 6, count 0 2006.229.08:28:42.68#ibcon#wrote, iclass 6, count 0 2006.229.08:28:42.68#ibcon#about to read 3, iclass 6, count 0 2006.229.08:28:42.70#ibcon#read 3, iclass 6, count 0 2006.229.08:28:42.70#ibcon#about to read 4, iclass 6, count 0 2006.229.08:28:42.70#ibcon#read 4, iclass 6, count 0 2006.229.08:28:42.70#ibcon#about to read 5, iclass 6, count 0 2006.229.08:28:42.70#ibcon#read 5, iclass 6, count 0 2006.229.08:28:42.70#ibcon#about to read 6, iclass 6, count 0 2006.229.08:28:42.70#ibcon#read 6, iclass 6, count 0 2006.229.08:28:42.70#ibcon#end of sib2, iclass 6, count 0 2006.229.08:28:42.70#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:28:42.70#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:28:42.70#ibcon#[27=BW32\r\n] 2006.229.08:28:42.70#ibcon#*before write, iclass 6, count 0 2006.229.08:28:42.70#ibcon#enter sib2, iclass 6, count 0 2006.229.08:28:42.70#ibcon#flushed, iclass 6, count 0 2006.229.08:28:42.70#ibcon#about to write, iclass 6, count 0 2006.229.08:28:42.70#ibcon#wrote, iclass 6, count 0 2006.229.08:28:42.70#ibcon#about to read 3, iclass 6, count 0 2006.229.08:28:42.73#ibcon#read 3, iclass 6, count 0 2006.229.08:28:42.73#ibcon#about to read 4, iclass 6, count 0 2006.229.08:28:42.73#ibcon#read 4, iclass 6, count 0 2006.229.08:28:42.73#ibcon#about to read 5, iclass 6, count 0 2006.229.08:28:42.73#ibcon#read 5, iclass 6, count 0 2006.229.08:28:42.73#ibcon#about to read 6, iclass 6, count 0 2006.229.08:28:42.73#ibcon#read 6, iclass 6, count 0 2006.229.08:28:42.73#ibcon#end of sib2, iclass 6, count 0 2006.229.08:28:42.73#ibcon#*after write, iclass 6, count 0 2006.229.08:28:42.73#ibcon#*before return 0, iclass 6, count 0 2006.229.08:28:42.73#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:28:42.73#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:28:42.73#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:28:42.73#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:28:42.73$setupk4/ifdk4 2006.229.08:28:42.73$ifdk4/lo= 2006.229.08:28:42.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:28:42.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:28:42.73$ifdk4/patch= 2006.229.08:28:42.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:28:42.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:28:42.73$setupk4/!*+20s 2006.229.08:28:48.64#abcon#<5=/05 2.2 3.8 29.48 941000.4\r\n> 2006.229.08:28:48.66#abcon#{5=INTERFACE CLEAR} 2006.229.08:28:48.72#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:28:57.19$setupk4/"tpicd 2006.229.08:28:57.19$setupk4/echo=off 2006.229.08:28:57.19$setupk4/xlog=off 2006.229.08:28:57.19:!2006.229.08:37:30 2006.229.08:29:02.14#trakl#Source acquired 2006.229.08:29:02.14#flagr#flagr/antenna,acquired 2006.229.08:37:30.00:preob 2006.229.08:37:30.14/onsource/TRACKING 2006.229.08:37:30.14:!2006.229.08:37:40 2006.229.08:37:40.00:"tape 2006.229.08:37:40.00:"st=record 2006.229.08:37:40.00:data_valid=on 2006.229.08:37:40.00:midob 2006.229.08:37:41.14/onsource/TRACKING 2006.229.08:37:41.14/wx/29.40,1000.5,95 2006.229.08:37:41.31/cable/+6.3969E-03 2006.229.08:37:42.40/va/01,08,usb,yes,36,39 2006.229.08:37:42.40/va/02,07,usb,yes,39,40 2006.229.08:37:42.40/va/03,06,usb,yes,48,51 2006.229.08:37:42.40/va/04,07,usb,yes,40,42 2006.229.08:37:42.40/va/05,04,usb,yes,36,37 2006.229.08:37:42.40/va/06,04,usb,yes,40,40 2006.229.08:37:42.40/va/07,05,usb,yes,36,37 2006.229.08:37:42.40/va/08,06,usb,yes,26,32 2006.229.08:37:42.63/valo/01,524.99,yes,locked 2006.229.08:37:42.63/valo/02,534.99,yes,locked 2006.229.08:37:42.63/valo/03,564.99,yes,locked 2006.229.08:37:42.63/valo/04,624.99,yes,locked 2006.229.08:37:42.63/valo/05,734.99,yes,locked 2006.229.08:37:42.63/valo/06,814.99,yes,locked 2006.229.08:37:42.63/valo/07,864.99,yes,locked 2006.229.08:37:42.63/valo/08,884.99,yes,locked 2006.229.08:37:43.72/vb/01,04,usb,yes,34,33 2006.229.08:37:43.72/vb/02,04,usb,yes,36,37 2006.229.08:37:43.72/vb/03,04,usb,yes,33,37 2006.229.08:37:43.72/vb/04,04,usb,yes,38,37 2006.229.08:37:43.72/vb/05,04,usb,yes,30,33 2006.229.08:37:43.72/vb/06,04,usb,yes,35,31 2006.229.08:37:43.72/vb/07,04,usb,yes,35,35 2006.229.08:37:43.72/vb/08,04,usb,yes,32,36 2006.229.08:37:43.95/vblo/01,629.99,yes,locked 2006.229.08:37:43.95/vblo/02,634.99,yes,locked 2006.229.08:37:43.95/vblo/03,649.99,yes,locked 2006.229.08:37:43.95/vblo/04,679.99,yes,locked 2006.229.08:37:43.95/vblo/05,709.99,yes,locked 2006.229.08:37:43.95/vblo/06,719.99,yes,locked 2006.229.08:37:43.95/vblo/07,734.99,yes,locked 2006.229.08:37:43.95/vblo/08,744.99,yes,locked 2006.229.08:37:44.10/vabw/8 2006.229.08:37:44.25/vbbw/8 2006.229.08:37:44.34/xfe/off,on,13.0 2006.229.08:37:44.71/ifatt/23,28,28,28 2006.229.08:37:45.08/fmout-gps/S +4.57E-07 2006.229.08:37:45.12:!2006.229.08:38:20 2006.229.08:38:20.00:data_valid=off 2006.229.08:38:20.00:"et 2006.229.08:38:20.00:!+3s 2006.229.08:38:23.02:"tape 2006.229.08:38:23.02:postob 2006.229.08:38:23.26/cable/+6.3979E-03 2006.229.08:38:23.26/wx/29.40,1000.5,95 2006.229.08:38:24.08/fmout-gps/S +4.57E-07 2006.229.08:38:24.08:scan_name=229-0839,jd0608,230 2006.229.08:38:24.08:source=1044+719,104827.62,714335.9,2000.0,ccw 2006.229.08:38:25.14#flagr#flagr/antenna,new-source 2006.229.08:38:25.14:checkk5 2006.229.08:38:25.58/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:38:25.98/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:38:26.39/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:38:26.80/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:38:27.18/chk_obsdata//k5ts1/T2290837??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:38:27.58/chk_obsdata//k5ts2/T2290837??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:38:27.98/chk_obsdata//k5ts3/T2290837??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:38:28.38/chk_obsdata//k5ts4/T2290837??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.08:38:29.10/k5log//k5ts1_log_newline 2006.229.08:38:29.80/k5log//k5ts2_log_newline 2006.229.08:38:30.52/k5log//k5ts3_log_newline 2006.229.08:38:31.23/k5log//k5ts4_log_newline 2006.229.08:38:31.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:38:31.25:setupk4=1 2006.229.08:38:31.25$setupk4/echo=on 2006.229.08:38:31.25$setupk4/pcalon 2006.229.08:38:31.25$pcalon/"no phase cal control is implemented here 2006.229.08:38:31.25$setupk4/"tpicd=stop 2006.229.08:38:31.25$setupk4/"rec=synch_on 2006.229.08:38:31.25$setupk4/"rec_mode=128 2006.229.08:38:31.25$setupk4/!* 2006.229.08:38:31.25$setupk4/recpk4 2006.229.08:38:31.25$recpk4/recpatch= 2006.229.08:38:31.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:38:31.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:38:31.25$setupk4/vck44 2006.229.08:38:31.25$vck44/valo=1,524.99 2006.229.08:38:31.25#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.08:38:31.25#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.08:38:31.25#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:31.25#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:31.25#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:31.25#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:31.25#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:38:31.25#ibcon#first serial, iclass 29, count 0 2006.229.08:38:31.25#ibcon#enter sib2, iclass 29, count 0 2006.229.08:38:31.25#ibcon#flushed, iclass 29, count 0 2006.229.08:38:31.25#ibcon#about to write, iclass 29, count 0 2006.229.08:38:31.25#ibcon#wrote, iclass 29, count 0 2006.229.08:38:31.25#ibcon#about to read 3, iclass 29, count 0 2006.229.08:38:31.27#ibcon#read 3, iclass 29, count 0 2006.229.08:38:31.27#ibcon#about to read 4, iclass 29, count 0 2006.229.08:38:31.27#ibcon#read 4, iclass 29, count 0 2006.229.08:38:31.27#ibcon#about to read 5, iclass 29, count 0 2006.229.08:38:31.27#ibcon#read 5, iclass 29, count 0 2006.229.08:38:31.27#ibcon#about to read 6, iclass 29, count 0 2006.229.08:38:31.27#ibcon#read 6, iclass 29, count 0 2006.229.08:38:31.27#ibcon#end of sib2, iclass 29, count 0 2006.229.08:38:31.27#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:38:31.27#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:38:31.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:38:31.27#ibcon#*before write, iclass 29, count 0 2006.229.08:38:31.27#ibcon#enter sib2, iclass 29, count 0 2006.229.08:38:31.27#ibcon#flushed, iclass 29, count 0 2006.229.08:38:31.27#ibcon#about to write, iclass 29, count 0 2006.229.08:38:31.27#ibcon#wrote, iclass 29, count 0 2006.229.08:38:31.27#ibcon#about to read 3, iclass 29, count 0 2006.229.08:38:31.32#ibcon#read 3, iclass 29, count 0 2006.229.08:38:31.32#ibcon#about to read 4, iclass 29, count 0 2006.229.08:38:31.32#ibcon#read 4, iclass 29, count 0 2006.229.08:38:31.32#ibcon#about to read 5, iclass 29, count 0 2006.229.08:38:31.32#ibcon#read 5, iclass 29, count 0 2006.229.08:38:31.32#ibcon#about to read 6, iclass 29, count 0 2006.229.08:38:31.32#ibcon#read 6, iclass 29, count 0 2006.229.08:38:31.32#ibcon#end of sib2, iclass 29, count 0 2006.229.08:38:31.32#ibcon#*after write, iclass 29, count 0 2006.229.08:38:31.32#ibcon#*before return 0, iclass 29, count 0 2006.229.08:38:31.32#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:31.32#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:31.32#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:38:31.32#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:38:31.32$vck44/va=1,8 2006.229.08:38:31.32#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.08:38:31.32#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.08:38:31.32#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:31.32#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:31.32#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:31.32#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:31.32#ibcon#enter wrdev, iclass 31, count 2 2006.229.08:38:31.32#ibcon#first serial, iclass 31, count 2 2006.229.08:38:31.32#ibcon#enter sib2, iclass 31, count 2 2006.229.08:38:31.32#ibcon#flushed, iclass 31, count 2 2006.229.08:38:31.32#ibcon#about to write, iclass 31, count 2 2006.229.08:38:31.32#ibcon#wrote, iclass 31, count 2 2006.229.08:38:31.32#ibcon#about to read 3, iclass 31, count 2 2006.229.08:38:31.34#ibcon#read 3, iclass 31, count 2 2006.229.08:38:31.34#ibcon#about to read 4, iclass 31, count 2 2006.229.08:38:31.34#ibcon#read 4, iclass 31, count 2 2006.229.08:38:31.34#ibcon#about to read 5, iclass 31, count 2 2006.229.08:38:31.34#ibcon#read 5, iclass 31, count 2 2006.229.08:38:31.34#ibcon#about to read 6, iclass 31, count 2 2006.229.08:38:31.34#ibcon#read 6, iclass 31, count 2 2006.229.08:38:31.34#ibcon#end of sib2, iclass 31, count 2 2006.229.08:38:31.34#ibcon#*mode == 0, iclass 31, count 2 2006.229.08:38:31.34#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.08:38:31.34#ibcon#[25=AT01-08\r\n] 2006.229.08:38:31.34#ibcon#*before write, iclass 31, count 2 2006.229.08:38:31.34#ibcon#enter sib2, iclass 31, count 2 2006.229.08:38:31.34#ibcon#flushed, iclass 31, count 2 2006.229.08:38:31.34#ibcon#about to write, iclass 31, count 2 2006.229.08:38:31.34#ibcon#wrote, iclass 31, count 2 2006.229.08:38:31.34#ibcon#about to read 3, iclass 31, count 2 2006.229.08:38:31.37#ibcon#read 3, iclass 31, count 2 2006.229.08:38:31.37#ibcon#about to read 4, iclass 31, count 2 2006.229.08:38:31.37#ibcon#read 4, iclass 31, count 2 2006.229.08:38:31.37#ibcon#about to read 5, iclass 31, count 2 2006.229.08:38:31.37#ibcon#read 5, iclass 31, count 2 2006.229.08:38:31.37#ibcon#about to read 6, iclass 31, count 2 2006.229.08:38:31.37#ibcon#read 6, iclass 31, count 2 2006.229.08:38:31.37#ibcon#end of sib2, iclass 31, count 2 2006.229.08:38:31.37#ibcon#*after write, iclass 31, count 2 2006.229.08:38:31.37#ibcon#*before return 0, iclass 31, count 2 2006.229.08:38:31.37#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:31.37#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:31.37#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.08:38:31.37#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:31.37#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:31.49#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:31.49#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:31.49#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:38:31.49#ibcon#first serial, iclass 31, count 0 2006.229.08:38:31.49#ibcon#enter sib2, iclass 31, count 0 2006.229.08:38:31.49#ibcon#flushed, iclass 31, count 0 2006.229.08:38:31.49#ibcon#about to write, iclass 31, count 0 2006.229.08:38:31.49#ibcon#wrote, iclass 31, count 0 2006.229.08:38:31.49#ibcon#about to read 3, iclass 31, count 0 2006.229.08:38:31.51#ibcon#read 3, iclass 31, count 0 2006.229.08:38:31.51#ibcon#about to read 4, iclass 31, count 0 2006.229.08:38:31.51#ibcon#read 4, iclass 31, count 0 2006.229.08:38:31.51#ibcon#about to read 5, iclass 31, count 0 2006.229.08:38:31.51#ibcon#read 5, iclass 31, count 0 2006.229.08:38:31.51#ibcon#about to read 6, iclass 31, count 0 2006.229.08:38:31.51#ibcon#read 6, iclass 31, count 0 2006.229.08:38:31.51#ibcon#end of sib2, iclass 31, count 0 2006.229.08:38:31.51#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:38:31.51#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:38:31.51#ibcon#[25=USB\r\n] 2006.229.08:38:31.51#ibcon#*before write, iclass 31, count 0 2006.229.08:38:31.51#ibcon#enter sib2, iclass 31, count 0 2006.229.08:38:31.51#ibcon#flushed, iclass 31, count 0 2006.229.08:38:31.51#ibcon#about to write, iclass 31, count 0 2006.229.08:38:31.51#ibcon#wrote, iclass 31, count 0 2006.229.08:38:31.51#ibcon#about to read 3, iclass 31, count 0 2006.229.08:38:31.54#ibcon#read 3, iclass 31, count 0 2006.229.08:38:31.54#ibcon#about to read 4, iclass 31, count 0 2006.229.08:38:31.54#ibcon#read 4, iclass 31, count 0 2006.229.08:38:31.54#ibcon#about to read 5, iclass 31, count 0 2006.229.08:38:31.54#ibcon#read 5, iclass 31, count 0 2006.229.08:38:31.54#ibcon#about to read 6, iclass 31, count 0 2006.229.08:38:31.54#ibcon#read 6, iclass 31, count 0 2006.229.08:38:31.54#ibcon#end of sib2, iclass 31, count 0 2006.229.08:38:31.54#ibcon#*after write, iclass 31, count 0 2006.229.08:38:31.54#ibcon#*before return 0, iclass 31, count 0 2006.229.08:38:31.54#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:31.54#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:31.54#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:38:31.54#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:38:31.54$vck44/valo=2,534.99 2006.229.08:38:31.54#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.08:38:31.54#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.08:38:31.54#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:31.54#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:31.54#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:31.54#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:31.54#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:38:31.54#ibcon#first serial, iclass 33, count 0 2006.229.08:38:31.54#ibcon#enter sib2, iclass 33, count 0 2006.229.08:38:31.54#ibcon#flushed, iclass 33, count 0 2006.229.08:38:31.54#ibcon#about to write, iclass 33, count 0 2006.229.08:38:31.54#ibcon#wrote, iclass 33, count 0 2006.229.08:38:31.54#ibcon#about to read 3, iclass 33, count 0 2006.229.08:38:31.56#ibcon#read 3, iclass 33, count 0 2006.229.08:38:31.56#ibcon#about to read 4, iclass 33, count 0 2006.229.08:38:31.56#ibcon#read 4, iclass 33, count 0 2006.229.08:38:31.56#ibcon#about to read 5, iclass 33, count 0 2006.229.08:38:31.56#ibcon#read 5, iclass 33, count 0 2006.229.08:38:31.56#ibcon#about to read 6, iclass 33, count 0 2006.229.08:38:31.56#ibcon#read 6, iclass 33, count 0 2006.229.08:38:31.56#ibcon#end of sib2, iclass 33, count 0 2006.229.08:38:31.56#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:38:31.56#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:38:31.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:38:31.56#ibcon#*before write, iclass 33, count 0 2006.229.08:38:31.56#ibcon#enter sib2, iclass 33, count 0 2006.229.08:38:31.56#ibcon#flushed, iclass 33, count 0 2006.229.08:38:31.56#ibcon#about to write, iclass 33, count 0 2006.229.08:38:31.56#ibcon#wrote, iclass 33, count 0 2006.229.08:38:31.56#ibcon#about to read 3, iclass 33, count 0 2006.229.08:38:31.60#ibcon#read 3, iclass 33, count 0 2006.229.08:38:31.60#ibcon#about to read 4, iclass 33, count 0 2006.229.08:38:31.60#ibcon#read 4, iclass 33, count 0 2006.229.08:38:31.60#ibcon#about to read 5, iclass 33, count 0 2006.229.08:38:31.60#ibcon#read 5, iclass 33, count 0 2006.229.08:38:31.60#ibcon#about to read 6, iclass 33, count 0 2006.229.08:38:31.60#ibcon#read 6, iclass 33, count 0 2006.229.08:38:31.60#ibcon#end of sib2, iclass 33, count 0 2006.229.08:38:31.60#ibcon#*after write, iclass 33, count 0 2006.229.08:38:31.60#ibcon#*before return 0, iclass 33, count 0 2006.229.08:38:31.60#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:31.60#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:31.60#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:38:31.60#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:38:31.60$vck44/va=2,7 2006.229.08:38:31.60#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.08:38:31.60#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.08:38:31.60#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:31.60#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:31.66#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:31.66#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:31.66#ibcon#enter wrdev, iclass 35, count 2 2006.229.08:38:31.66#ibcon#first serial, iclass 35, count 2 2006.229.08:38:31.66#ibcon#enter sib2, iclass 35, count 2 2006.229.08:38:31.66#ibcon#flushed, iclass 35, count 2 2006.229.08:38:31.66#ibcon#about to write, iclass 35, count 2 2006.229.08:38:31.66#ibcon#wrote, iclass 35, count 2 2006.229.08:38:31.66#ibcon#about to read 3, iclass 35, count 2 2006.229.08:38:31.68#ibcon#read 3, iclass 35, count 2 2006.229.08:38:31.68#ibcon#about to read 4, iclass 35, count 2 2006.229.08:38:31.68#ibcon#read 4, iclass 35, count 2 2006.229.08:38:31.68#ibcon#about to read 5, iclass 35, count 2 2006.229.08:38:31.68#ibcon#read 5, iclass 35, count 2 2006.229.08:38:31.68#ibcon#about to read 6, iclass 35, count 2 2006.229.08:38:31.68#ibcon#read 6, iclass 35, count 2 2006.229.08:38:31.68#ibcon#end of sib2, iclass 35, count 2 2006.229.08:38:31.68#ibcon#*mode == 0, iclass 35, count 2 2006.229.08:38:31.68#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.08:38:31.68#ibcon#[25=AT02-07\r\n] 2006.229.08:38:31.68#ibcon#*before write, iclass 35, count 2 2006.229.08:38:31.68#ibcon#enter sib2, iclass 35, count 2 2006.229.08:38:31.68#ibcon#flushed, iclass 35, count 2 2006.229.08:38:31.68#ibcon#about to write, iclass 35, count 2 2006.229.08:38:31.68#ibcon#wrote, iclass 35, count 2 2006.229.08:38:31.68#ibcon#about to read 3, iclass 35, count 2 2006.229.08:38:31.71#ibcon#read 3, iclass 35, count 2 2006.229.08:38:31.71#ibcon#about to read 4, iclass 35, count 2 2006.229.08:38:31.71#ibcon#read 4, iclass 35, count 2 2006.229.08:38:31.71#ibcon#about to read 5, iclass 35, count 2 2006.229.08:38:31.71#ibcon#read 5, iclass 35, count 2 2006.229.08:38:31.71#ibcon#about to read 6, iclass 35, count 2 2006.229.08:38:31.71#ibcon#read 6, iclass 35, count 2 2006.229.08:38:31.71#ibcon#end of sib2, iclass 35, count 2 2006.229.08:38:31.71#ibcon#*after write, iclass 35, count 2 2006.229.08:38:31.71#ibcon#*before return 0, iclass 35, count 2 2006.229.08:38:31.71#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:31.71#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:31.71#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.08:38:31.71#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:31.71#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:31.83#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:31.83#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:31.83#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:38:31.83#ibcon#first serial, iclass 35, count 0 2006.229.08:38:31.83#ibcon#enter sib2, iclass 35, count 0 2006.229.08:38:31.83#ibcon#flushed, iclass 35, count 0 2006.229.08:38:31.83#ibcon#about to write, iclass 35, count 0 2006.229.08:38:31.83#ibcon#wrote, iclass 35, count 0 2006.229.08:38:31.83#ibcon#about to read 3, iclass 35, count 0 2006.229.08:38:31.85#ibcon#read 3, iclass 35, count 0 2006.229.08:38:31.85#ibcon#about to read 4, iclass 35, count 0 2006.229.08:38:31.85#ibcon#read 4, iclass 35, count 0 2006.229.08:38:31.85#ibcon#about to read 5, iclass 35, count 0 2006.229.08:38:31.85#ibcon#read 5, iclass 35, count 0 2006.229.08:38:31.85#ibcon#about to read 6, iclass 35, count 0 2006.229.08:38:31.85#ibcon#read 6, iclass 35, count 0 2006.229.08:38:31.85#ibcon#end of sib2, iclass 35, count 0 2006.229.08:38:31.85#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:38:31.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:38:31.85#ibcon#[25=USB\r\n] 2006.229.08:38:31.85#ibcon#*before write, iclass 35, count 0 2006.229.08:38:31.85#ibcon#enter sib2, iclass 35, count 0 2006.229.08:38:31.85#ibcon#flushed, iclass 35, count 0 2006.229.08:38:31.85#ibcon#about to write, iclass 35, count 0 2006.229.08:38:31.85#ibcon#wrote, iclass 35, count 0 2006.229.08:38:31.85#ibcon#about to read 3, iclass 35, count 0 2006.229.08:38:31.88#ibcon#read 3, iclass 35, count 0 2006.229.08:38:31.88#ibcon#about to read 4, iclass 35, count 0 2006.229.08:38:31.88#ibcon#read 4, iclass 35, count 0 2006.229.08:38:31.88#ibcon#about to read 5, iclass 35, count 0 2006.229.08:38:31.88#ibcon#read 5, iclass 35, count 0 2006.229.08:38:31.88#ibcon#about to read 6, iclass 35, count 0 2006.229.08:38:31.88#ibcon#read 6, iclass 35, count 0 2006.229.08:38:31.88#ibcon#end of sib2, iclass 35, count 0 2006.229.08:38:31.88#ibcon#*after write, iclass 35, count 0 2006.229.08:38:31.88#ibcon#*before return 0, iclass 35, count 0 2006.229.08:38:31.88#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:31.88#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:31.88#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:38:31.88#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:38:31.88$vck44/valo=3,564.99 2006.229.08:38:31.88#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.08:38:31.88#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.08:38:31.88#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:31.88#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:31.88#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:31.88#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:31.88#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:38:31.88#ibcon#first serial, iclass 37, count 0 2006.229.08:38:31.88#ibcon#enter sib2, iclass 37, count 0 2006.229.08:38:31.88#ibcon#flushed, iclass 37, count 0 2006.229.08:38:31.88#ibcon#about to write, iclass 37, count 0 2006.229.08:38:31.88#ibcon#wrote, iclass 37, count 0 2006.229.08:38:31.88#ibcon#about to read 3, iclass 37, count 0 2006.229.08:38:31.90#ibcon#read 3, iclass 37, count 0 2006.229.08:38:31.90#ibcon#about to read 4, iclass 37, count 0 2006.229.08:38:31.90#ibcon#read 4, iclass 37, count 0 2006.229.08:38:31.90#ibcon#about to read 5, iclass 37, count 0 2006.229.08:38:31.90#ibcon#read 5, iclass 37, count 0 2006.229.08:38:31.90#ibcon#about to read 6, iclass 37, count 0 2006.229.08:38:31.90#ibcon#read 6, iclass 37, count 0 2006.229.08:38:31.90#ibcon#end of sib2, iclass 37, count 0 2006.229.08:38:31.90#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:38:31.90#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:38:31.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:38:31.90#ibcon#*before write, iclass 37, count 0 2006.229.08:38:31.90#ibcon#enter sib2, iclass 37, count 0 2006.229.08:38:31.90#ibcon#flushed, iclass 37, count 0 2006.229.08:38:31.90#ibcon#about to write, iclass 37, count 0 2006.229.08:38:31.90#ibcon#wrote, iclass 37, count 0 2006.229.08:38:31.90#ibcon#about to read 3, iclass 37, count 0 2006.229.08:38:31.94#ibcon#read 3, iclass 37, count 0 2006.229.08:38:31.94#ibcon#about to read 4, iclass 37, count 0 2006.229.08:38:31.94#ibcon#read 4, iclass 37, count 0 2006.229.08:38:31.94#ibcon#about to read 5, iclass 37, count 0 2006.229.08:38:31.94#ibcon#read 5, iclass 37, count 0 2006.229.08:38:31.94#ibcon#about to read 6, iclass 37, count 0 2006.229.08:38:31.94#ibcon#read 6, iclass 37, count 0 2006.229.08:38:31.94#ibcon#end of sib2, iclass 37, count 0 2006.229.08:38:31.94#ibcon#*after write, iclass 37, count 0 2006.229.08:38:31.94#ibcon#*before return 0, iclass 37, count 0 2006.229.08:38:31.94#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:31.94#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:31.94#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:38:31.94#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:38:31.94$vck44/va=3,6 2006.229.08:38:31.94#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.08:38:31.94#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.08:38:31.94#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:31.94#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:32.00#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:32.00#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:32.00#ibcon#enter wrdev, iclass 39, count 2 2006.229.08:38:32.00#ibcon#first serial, iclass 39, count 2 2006.229.08:38:32.00#ibcon#enter sib2, iclass 39, count 2 2006.229.08:38:32.00#ibcon#flushed, iclass 39, count 2 2006.229.08:38:32.00#ibcon#about to write, iclass 39, count 2 2006.229.08:38:32.00#ibcon#wrote, iclass 39, count 2 2006.229.08:38:32.00#ibcon#about to read 3, iclass 39, count 2 2006.229.08:38:32.02#ibcon#read 3, iclass 39, count 2 2006.229.08:38:32.02#ibcon#about to read 4, iclass 39, count 2 2006.229.08:38:32.02#ibcon#read 4, iclass 39, count 2 2006.229.08:38:32.02#ibcon#about to read 5, iclass 39, count 2 2006.229.08:38:32.02#ibcon#read 5, iclass 39, count 2 2006.229.08:38:32.02#ibcon#about to read 6, iclass 39, count 2 2006.229.08:38:32.02#ibcon#read 6, iclass 39, count 2 2006.229.08:38:32.02#ibcon#end of sib2, iclass 39, count 2 2006.229.08:38:32.02#ibcon#*mode == 0, iclass 39, count 2 2006.229.08:38:32.02#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.08:38:32.02#ibcon#[25=AT03-06\r\n] 2006.229.08:38:32.02#ibcon#*before write, iclass 39, count 2 2006.229.08:38:32.02#ibcon#enter sib2, iclass 39, count 2 2006.229.08:38:32.02#ibcon#flushed, iclass 39, count 2 2006.229.08:38:32.02#ibcon#about to write, iclass 39, count 2 2006.229.08:38:32.02#ibcon#wrote, iclass 39, count 2 2006.229.08:38:32.02#ibcon#about to read 3, iclass 39, count 2 2006.229.08:38:32.05#ibcon#read 3, iclass 39, count 2 2006.229.08:38:32.05#ibcon#about to read 4, iclass 39, count 2 2006.229.08:38:32.05#ibcon#read 4, iclass 39, count 2 2006.229.08:38:32.05#ibcon#about to read 5, iclass 39, count 2 2006.229.08:38:32.05#ibcon#read 5, iclass 39, count 2 2006.229.08:38:32.05#ibcon#about to read 6, iclass 39, count 2 2006.229.08:38:32.05#ibcon#read 6, iclass 39, count 2 2006.229.08:38:32.05#ibcon#end of sib2, iclass 39, count 2 2006.229.08:38:32.05#ibcon#*after write, iclass 39, count 2 2006.229.08:38:32.05#ibcon#*before return 0, iclass 39, count 2 2006.229.08:38:32.05#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:32.05#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:32.05#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.08:38:32.05#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:32.05#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:32.17#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:32.17#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:32.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:38:32.17#ibcon#first serial, iclass 39, count 0 2006.229.08:38:32.17#ibcon#enter sib2, iclass 39, count 0 2006.229.08:38:32.17#ibcon#flushed, iclass 39, count 0 2006.229.08:38:32.17#ibcon#about to write, iclass 39, count 0 2006.229.08:38:32.17#ibcon#wrote, iclass 39, count 0 2006.229.08:38:32.17#ibcon#about to read 3, iclass 39, count 0 2006.229.08:38:32.19#ibcon#read 3, iclass 39, count 0 2006.229.08:38:32.19#ibcon#about to read 4, iclass 39, count 0 2006.229.08:38:32.19#ibcon#read 4, iclass 39, count 0 2006.229.08:38:32.19#ibcon#about to read 5, iclass 39, count 0 2006.229.08:38:32.19#ibcon#read 5, iclass 39, count 0 2006.229.08:38:32.19#ibcon#about to read 6, iclass 39, count 0 2006.229.08:38:32.19#ibcon#read 6, iclass 39, count 0 2006.229.08:38:32.19#ibcon#end of sib2, iclass 39, count 0 2006.229.08:38:32.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:38:32.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:38:32.19#ibcon#[25=USB\r\n] 2006.229.08:38:32.19#ibcon#*before write, iclass 39, count 0 2006.229.08:38:32.19#ibcon#enter sib2, iclass 39, count 0 2006.229.08:38:32.19#ibcon#flushed, iclass 39, count 0 2006.229.08:38:32.19#ibcon#about to write, iclass 39, count 0 2006.229.08:38:32.19#ibcon#wrote, iclass 39, count 0 2006.229.08:38:32.19#ibcon#about to read 3, iclass 39, count 0 2006.229.08:38:32.22#ibcon#read 3, iclass 39, count 0 2006.229.08:38:32.22#ibcon#about to read 4, iclass 39, count 0 2006.229.08:38:32.22#ibcon#read 4, iclass 39, count 0 2006.229.08:38:32.22#ibcon#about to read 5, iclass 39, count 0 2006.229.08:38:32.22#ibcon#read 5, iclass 39, count 0 2006.229.08:38:32.22#ibcon#about to read 6, iclass 39, count 0 2006.229.08:38:32.22#ibcon#read 6, iclass 39, count 0 2006.229.08:38:32.22#ibcon#end of sib2, iclass 39, count 0 2006.229.08:38:32.22#ibcon#*after write, iclass 39, count 0 2006.229.08:38:32.22#ibcon#*before return 0, iclass 39, count 0 2006.229.08:38:32.22#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:32.22#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:32.22#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:38:32.22#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:38:32.22$vck44/valo=4,624.99 2006.229.08:38:32.22#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.08:38:32.22#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.08:38:32.22#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:32.22#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:32.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:32.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:32.22#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:38:32.22#ibcon#first serial, iclass 3, count 0 2006.229.08:38:32.22#ibcon#enter sib2, iclass 3, count 0 2006.229.08:38:32.22#ibcon#flushed, iclass 3, count 0 2006.229.08:38:32.22#ibcon#about to write, iclass 3, count 0 2006.229.08:38:32.22#ibcon#wrote, iclass 3, count 0 2006.229.08:38:32.22#ibcon#about to read 3, iclass 3, count 0 2006.229.08:38:32.24#ibcon#read 3, iclass 3, count 0 2006.229.08:38:32.24#ibcon#about to read 4, iclass 3, count 0 2006.229.08:38:32.24#ibcon#read 4, iclass 3, count 0 2006.229.08:38:32.24#ibcon#about to read 5, iclass 3, count 0 2006.229.08:38:32.24#ibcon#read 5, iclass 3, count 0 2006.229.08:38:32.24#ibcon#about to read 6, iclass 3, count 0 2006.229.08:38:32.24#ibcon#read 6, iclass 3, count 0 2006.229.08:38:32.24#ibcon#end of sib2, iclass 3, count 0 2006.229.08:38:32.24#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:38:32.24#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:38:32.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:38:32.24#ibcon#*before write, iclass 3, count 0 2006.229.08:38:32.24#ibcon#enter sib2, iclass 3, count 0 2006.229.08:38:32.24#ibcon#flushed, iclass 3, count 0 2006.229.08:38:32.24#ibcon#about to write, iclass 3, count 0 2006.229.08:38:32.24#ibcon#wrote, iclass 3, count 0 2006.229.08:38:32.24#ibcon#about to read 3, iclass 3, count 0 2006.229.08:38:32.28#ibcon#read 3, iclass 3, count 0 2006.229.08:38:32.28#ibcon#about to read 4, iclass 3, count 0 2006.229.08:38:32.28#ibcon#read 4, iclass 3, count 0 2006.229.08:38:32.28#ibcon#about to read 5, iclass 3, count 0 2006.229.08:38:32.28#ibcon#read 5, iclass 3, count 0 2006.229.08:38:32.28#ibcon#about to read 6, iclass 3, count 0 2006.229.08:38:32.28#ibcon#read 6, iclass 3, count 0 2006.229.08:38:32.28#ibcon#end of sib2, iclass 3, count 0 2006.229.08:38:32.28#ibcon#*after write, iclass 3, count 0 2006.229.08:38:32.28#ibcon#*before return 0, iclass 3, count 0 2006.229.08:38:32.28#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:32.28#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:32.28#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:38:32.28#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:38:32.28$vck44/va=4,7 2006.229.08:38:32.28#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.08:38:32.28#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.08:38:32.28#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:32.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:32.34#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:32.34#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:32.34#ibcon#enter wrdev, iclass 5, count 2 2006.229.08:38:32.34#ibcon#first serial, iclass 5, count 2 2006.229.08:38:32.34#ibcon#enter sib2, iclass 5, count 2 2006.229.08:38:32.34#ibcon#flushed, iclass 5, count 2 2006.229.08:38:32.34#ibcon#about to write, iclass 5, count 2 2006.229.08:38:32.34#ibcon#wrote, iclass 5, count 2 2006.229.08:38:32.34#ibcon#about to read 3, iclass 5, count 2 2006.229.08:38:32.36#ibcon#read 3, iclass 5, count 2 2006.229.08:38:32.36#ibcon#about to read 4, iclass 5, count 2 2006.229.08:38:32.36#ibcon#read 4, iclass 5, count 2 2006.229.08:38:32.36#ibcon#about to read 5, iclass 5, count 2 2006.229.08:38:32.36#ibcon#read 5, iclass 5, count 2 2006.229.08:38:32.36#ibcon#about to read 6, iclass 5, count 2 2006.229.08:38:32.36#ibcon#read 6, iclass 5, count 2 2006.229.08:38:32.36#ibcon#end of sib2, iclass 5, count 2 2006.229.08:38:32.36#ibcon#*mode == 0, iclass 5, count 2 2006.229.08:38:32.36#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.08:38:32.36#ibcon#[25=AT04-07\r\n] 2006.229.08:38:32.36#ibcon#*before write, iclass 5, count 2 2006.229.08:38:32.36#ibcon#enter sib2, iclass 5, count 2 2006.229.08:38:32.36#ibcon#flushed, iclass 5, count 2 2006.229.08:38:32.36#ibcon#about to write, iclass 5, count 2 2006.229.08:38:32.36#ibcon#wrote, iclass 5, count 2 2006.229.08:38:32.36#ibcon#about to read 3, iclass 5, count 2 2006.229.08:38:32.39#ibcon#read 3, iclass 5, count 2 2006.229.08:38:32.39#ibcon#about to read 4, iclass 5, count 2 2006.229.08:38:32.39#ibcon#read 4, iclass 5, count 2 2006.229.08:38:32.39#ibcon#about to read 5, iclass 5, count 2 2006.229.08:38:32.39#ibcon#read 5, iclass 5, count 2 2006.229.08:38:32.39#ibcon#about to read 6, iclass 5, count 2 2006.229.08:38:32.39#ibcon#read 6, iclass 5, count 2 2006.229.08:38:32.39#ibcon#end of sib2, iclass 5, count 2 2006.229.08:38:32.39#ibcon#*after write, iclass 5, count 2 2006.229.08:38:32.39#ibcon#*before return 0, iclass 5, count 2 2006.229.08:38:32.39#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:32.39#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:32.39#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.08:38:32.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:32.39#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:32.51#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:32.51#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:32.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:38:32.51#ibcon#first serial, iclass 5, count 0 2006.229.08:38:32.51#ibcon#enter sib2, iclass 5, count 0 2006.229.08:38:32.51#ibcon#flushed, iclass 5, count 0 2006.229.08:38:32.51#ibcon#about to write, iclass 5, count 0 2006.229.08:38:32.51#ibcon#wrote, iclass 5, count 0 2006.229.08:38:32.51#ibcon#about to read 3, iclass 5, count 0 2006.229.08:38:32.53#ibcon#read 3, iclass 5, count 0 2006.229.08:38:32.53#ibcon#about to read 4, iclass 5, count 0 2006.229.08:38:32.53#ibcon#read 4, iclass 5, count 0 2006.229.08:38:32.53#ibcon#about to read 5, iclass 5, count 0 2006.229.08:38:32.53#ibcon#read 5, iclass 5, count 0 2006.229.08:38:32.53#ibcon#about to read 6, iclass 5, count 0 2006.229.08:38:32.53#ibcon#read 6, iclass 5, count 0 2006.229.08:38:32.53#ibcon#end of sib2, iclass 5, count 0 2006.229.08:38:32.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:38:32.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:38:32.53#ibcon#[25=USB\r\n] 2006.229.08:38:32.53#ibcon#*before write, iclass 5, count 0 2006.229.08:38:32.53#ibcon#enter sib2, iclass 5, count 0 2006.229.08:38:32.53#ibcon#flushed, iclass 5, count 0 2006.229.08:38:32.53#ibcon#about to write, iclass 5, count 0 2006.229.08:38:32.53#ibcon#wrote, iclass 5, count 0 2006.229.08:38:32.53#ibcon#about to read 3, iclass 5, count 0 2006.229.08:38:32.56#ibcon#read 3, iclass 5, count 0 2006.229.08:38:32.56#ibcon#about to read 4, iclass 5, count 0 2006.229.08:38:32.56#ibcon#read 4, iclass 5, count 0 2006.229.08:38:32.56#ibcon#about to read 5, iclass 5, count 0 2006.229.08:38:32.56#ibcon#read 5, iclass 5, count 0 2006.229.08:38:32.56#ibcon#about to read 6, iclass 5, count 0 2006.229.08:38:32.56#ibcon#read 6, iclass 5, count 0 2006.229.08:38:32.56#ibcon#end of sib2, iclass 5, count 0 2006.229.08:38:32.56#ibcon#*after write, iclass 5, count 0 2006.229.08:38:32.56#ibcon#*before return 0, iclass 5, count 0 2006.229.08:38:32.56#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:32.56#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:32.56#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:38:32.56#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:38:32.56$vck44/valo=5,734.99 2006.229.08:38:32.56#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.08:38:32.56#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.08:38:32.56#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:32.56#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:32.56#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:32.56#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:32.56#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:38:32.56#ibcon#first serial, iclass 7, count 0 2006.229.08:38:32.56#ibcon#enter sib2, iclass 7, count 0 2006.229.08:38:32.56#ibcon#flushed, iclass 7, count 0 2006.229.08:38:32.56#ibcon#about to write, iclass 7, count 0 2006.229.08:38:32.56#ibcon#wrote, iclass 7, count 0 2006.229.08:38:32.56#ibcon#about to read 3, iclass 7, count 0 2006.229.08:38:32.58#ibcon#read 3, iclass 7, count 0 2006.229.08:38:32.58#ibcon#about to read 4, iclass 7, count 0 2006.229.08:38:32.58#ibcon#read 4, iclass 7, count 0 2006.229.08:38:32.58#ibcon#about to read 5, iclass 7, count 0 2006.229.08:38:32.58#ibcon#read 5, iclass 7, count 0 2006.229.08:38:32.58#ibcon#about to read 6, iclass 7, count 0 2006.229.08:38:32.58#ibcon#read 6, iclass 7, count 0 2006.229.08:38:32.58#ibcon#end of sib2, iclass 7, count 0 2006.229.08:38:32.58#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:38:32.58#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:38:32.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:38:32.58#ibcon#*before write, iclass 7, count 0 2006.229.08:38:32.58#ibcon#enter sib2, iclass 7, count 0 2006.229.08:38:32.58#ibcon#flushed, iclass 7, count 0 2006.229.08:38:32.58#ibcon#about to write, iclass 7, count 0 2006.229.08:38:32.58#ibcon#wrote, iclass 7, count 0 2006.229.08:38:32.58#ibcon#about to read 3, iclass 7, count 0 2006.229.08:38:32.62#ibcon#read 3, iclass 7, count 0 2006.229.08:38:32.62#ibcon#about to read 4, iclass 7, count 0 2006.229.08:38:32.62#ibcon#read 4, iclass 7, count 0 2006.229.08:38:32.62#ibcon#about to read 5, iclass 7, count 0 2006.229.08:38:32.62#ibcon#read 5, iclass 7, count 0 2006.229.08:38:32.62#ibcon#about to read 6, iclass 7, count 0 2006.229.08:38:32.62#ibcon#read 6, iclass 7, count 0 2006.229.08:38:32.62#ibcon#end of sib2, iclass 7, count 0 2006.229.08:38:32.62#ibcon#*after write, iclass 7, count 0 2006.229.08:38:32.62#ibcon#*before return 0, iclass 7, count 0 2006.229.08:38:32.62#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:32.62#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:32.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:38:32.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:38:32.62$vck44/va=5,4 2006.229.08:38:32.62#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.08:38:32.62#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.08:38:32.62#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:32.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:32.68#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:32.68#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:32.68#ibcon#enter wrdev, iclass 11, count 2 2006.229.08:38:32.68#ibcon#first serial, iclass 11, count 2 2006.229.08:38:32.68#ibcon#enter sib2, iclass 11, count 2 2006.229.08:38:32.68#ibcon#flushed, iclass 11, count 2 2006.229.08:38:32.68#ibcon#about to write, iclass 11, count 2 2006.229.08:38:32.68#ibcon#wrote, iclass 11, count 2 2006.229.08:38:32.68#ibcon#about to read 3, iclass 11, count 2 2006.229.08:38:32.70#ibcon#read 3, iclass 11, count 2 2006.229.08:38:32.70#ibcon#about to read 4, iclass 11, count 2 2006.229.08:38:32.70#ibcon#read 4, iclass 11, count 2 2006.229.08:38:32.70#ibcon#about to read 5, iclass 11, count 2 2006.229.08:38:32.70#ibcon#read 5, iclass 11, count 2 2006.229.08:38:32.70#ibcon#about to read 6, iclass 11, count 2 2006.229.08:38:32.70#ibcon#read 6, iclass 11, count 2 2006.229.08:38:32.70#ibcon#end of sib2, iclass 11, count 2 2006.229.08:38:32.70#ibcon#*mode == 0, iclass 11, count 2 2006.229.08:38:32.70#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.08:38:32.70#ibcon#[25=AT05-04\r\n] 2006.229.08:38:32.70#ibcon#*before write, iclass 11, count 2 2006.229.08:38:32.70#ibcon#enter sib2, iclass 11, count 2 2006.229.08:38:32.70#ibcon#flushed, iclass 11, count 2 2006.229.08:38:32.70#ibcon#about to write, iclass 11, count 2 2006.229.08:38:32.70#ibcon#wrote, iclass 11, count 2 2006.229.08:38:32.70#ibcon#about to read 3, iclass 11, count 2 2006.229.08:38:32.73#ibcon#read 3, iclass 11, count 2 2006.229.08:38:32.73#ibcon#about to read 4, iclass 11, count 2 2006.229.08:38:32.73#ibcon#read 4, iclass 11, count 2 2006.229.08:38:32.73#ibcon#about to read 5, iclass 11, count 2 2006.229.08:38:32.73#ibcon#read 5, iclass 11, count 2 2006.229.08:38:32.73#ibcon#about to read 6, iclass 11, count 2 2006.229.08:38:32.73#ibcon#read 6, iclass 11, count 2 2006.229.08:38:32.73#ibcon#end of sib2, iclass 11, count 2 2006.229.08:38:32.73#ibcon#*after write, iclass 11, count 2 2006.229.08:38:32.73#ibcon#*before return 0, iclass 11, count 2 2006.229.08:38:32.73#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:32.73#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:32.73#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.08:38:32.73#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:32.73#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:32.85#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:32.85#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:32.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:38:32.85#ibcon#first serial, iclass 11, count 0 2006.229.08:38:32.85#ibcon#enter sib2, iclass 11, count 0 2006.229.08:38:32.85#ibcon#flushed, iclass 11, count 0 2006.229.08:38:32.85#ibcon#about to write, iclass 11, count 0 2006.229.08:38:32.85#ibcon#wrote, iclass 11, count 0 2006.229.08:38:32.85#ibcon#about to read 3, iclass 11, count 0 2006.229.08:38:32.87#ibcon#read 3, iclass 11, count 0 2006.229.08:38:32.87#ibcon#about to read 4, iclass 11, count 0 2006.229.08:38:32.87#ibcon#read 4, iclass 11, count 0 2006.229.08:38:32.87#ibcon#about to read 5, iclass 11, count 0 2006.229.08:38:32.87#ibcon#read 5, iclass 11, count 0 2006.229.08:38:32.87#ibcon#about to read 6, iclass 11, count 0 2006.229.08:38:32.87#ibcon#read 6, iclass 11, count 0 2006.229.08:38:32.87#ibcon#end of sib2, iclass 11, count 0 2006.229.08:38:32.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:38:32.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:38:32.87#ibcon#[25=USB\r\n] 2006.229.08:38:32.87#ibcon#*before write, iclass 11, count 0 2006.229.08:38:32.87#ibcon#enter sib2, iclass 11, count 0 2006.229.08:38:32.87#ibcon#flushed, iclass 11, count 0 2006.229.08:38:32.87#ibcon#about to write, iclass 11, count 0 2006.229.08:38:32.87#ibcon#wrote, iclass 11, count 0 2006.229.08:38:32.87#ibcon#about to read 3, iclass 11, count 0 2006.229.08:38:32.90#ibcon#read 3, iclass 11, count 0 2006.229.08:38:32.90#ibcon#about to read 4, iclass 11, count 0 2006.229.08:38:32.90#ibcon#read 4, iclass 11, count 0 2006.229.08:38:32.90#ibcon#about to read 5, iclass 11, count 0 2006.229.08:38:32.90#ibcon#read 5, iclass 11, count 0 2006.229.08:38:32.90#ibcon#about to read 6, iclass 11, count 0 2006.229.08:38:32.90#ibcon#read 6, iclass 11, count 0 2006.229.08:38:32.90#ibcon#end of sib2, iclass 11, count 0 2006.229.08:38:32.90#ibcon#*after write, iclass 11, count 0 2006.229.08:38:32.90#ibcon#*before return 0, iclass 11, count 0 2006.229.08:38:32.90#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:32.90#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:32.90#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:38:32.90#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:38:32.90$vck44/valo=6,814.99 2006.229.08:38:32.90#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.08:38:32.90#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.08:38:32.90#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:32.90#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:32.90#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:32.90#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:32.90#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:38:32.90#ibcon#first serial, iclass 13, count 0 2006.229.08:38:32.90#ibcon#enter sib2, iclass 13, count 0 2006.229.08:38:32.90#ibcon#flushed, iclass 13, count 0 2006.229.08:38:32.90#ibcon#about to write, iclass 13, count 0 2006.229.08:38:32.90#ibcon#wrote, iclass 13, count 0 2006.229.08:38:32.90#ibcon#about to read 3, iclass 13, count 0 2006.229.08:38:32.92#ibcon#read 3, iclass 13, count 0 2006.229.08:38:32.92#ibcon#about to read 4, iclass 13, count 0 2006.229.08:38:32.92#ibcon#read 4, iclass 13, count 0 2006.229.08:38:32.92#ibcon#about to read 5, iclass 13, count 0 2006.229.08:38:32.92#ibcon#read 5, iclass 13, count 0 2006.229.08:38:32.92#ibcon#about to read 6, iclass 13, count 0 2006.229.08:38:32.92#ibcon#read 6, iclass 13, count 0 2006.229.08:38:32.92#ibcon#end of sib2, iclass 13, count 0 2006.229.08:38:32.92#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:38:32.92#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:38:32.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:38:32.92#ibcon#*before write, iclass 13, count 0 2006.229.08:38:32.92#ibcon#enter sib2, iclass 13, count 0 2006.229.08:38:32.92#ibcon#flushed, iclass 13, count 0 2006.229.08:38:32.92#ibcon#about to write, iclass 13, count 0 2006.229.08:38:32.92#ibcon#wrote, iclass 13, count 0 2006.229.08:38:32.92#ibcon#about to read 3, iclass 13, count 0 2006.229.08:38:32.96#ibcon#read 3, iclass 13, count 0 2006.229.08:38:32.96#ibcon#about to read 4, iclass 13, count 0 2006.229.08:38:32.96#ibcon#read 4, iclass 13, count 0 2006.229.08:38:32.96#ibcon#about to read 5, iclass 13, count 0 2006.229.08:38:32.96#ibcon#read 5, iclass 13, count 0 2006.229.08:38:32.96#ibcon#about to read 6, iclass 13, count 0 2006.229.08:38:32.96#ibcon#read 6, iclass 13, count 0 2006.229.08:38:32.96#ibcon#end of sib2, iclass 13, count 0 2006.229.08:38:32.96#ibcon#*after write, iclass 13, count 0 2006.229.08:38:32.96#ibcon#*before return 0, iclass 13, count 0 2006.229.08:38:32.96#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:32.96#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:32.96#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:38:32.96#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:38:32.96$vck44/va=6,4 2006.229.08:38:32.96#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.08:38:32.96#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.08:38:32.96#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:32.96#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:33.02#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:33.02#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:33.02#ibcon#enter wrdev, iclass 15, count 2 2006.229.08:38:33.02#ibcon#first serial, iclass 15, count 2 2006.229.08:38:33.02#ibcon#enter sib2, iclass 15, count 2 2006.229.08:38:33.02#ibcon#flushed, iclass 15, count 2 2006.229.08:38:33.02#ibcon#about to write, iclass 15, count 2 2006.229.08:38:33.02#ibcon#wrote, iclass 15, count 2 2006.229.08:38:33.02#ibcon#about to read 3, iclass 15, count 2 2006.229.08:38:33.04#ibcon#read 3, iclass 15, count 2 2006.229.08:38:33.04#ibcon#about to read 4, iclass 15, count 2 2006.229.08:38:33.04#ibcon#read 4, iclass 15, count 2 2006.229.08:38:33.04#ibcon#about to read 5, iclass 15, count 2 2006.229.08:38:33.04#ibcon#read 5, iclass 15, count 2 2006.229.08:38:33.04#ibcon#about to read 6, iclass 15, count 2 2006.229.08:38:33.04#ibcon#read 6, iclass 15, count 2 2006.229.08:38:33.04#ibcon#end of sib2, iclass 15, count 2 2006.229.08:38:33.04#ibcon#*mode == 0, iclass 15, count 2 2006.229.08:38:33.04#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.08:38:33.04#ibcon#[25=AT06-04\r\n] 2006.229.08:38:33.04#ibcon#*before write, iclass 15, count 2 2006.229.08:38:33.04#ibcon#enter sib2, iclass 15, count 2 2006.229.08:38:33.04#ibcon#flushed, iclass 15, count 2 2006.229.08:38:33.04#ibcon#about to write, iclass 15, count 2 2006.229.08:38:33.04#ibcon#wrote, iclass 15, count 2 2006.229.08:38:33.04#ibcon#about to read 3, iclass 15, count 2 2006.229.08:38:33.07#ibcon#read 3, iclass 15, count 2 2006.229.08:38:33.07#ibcon#about to read 4, iclass 15, count 2 2006.229.08:38:33.07#ibcon#read 4, iclass 15, count 2 2006.229.08:38:33.07#ibcon#about to read 5, iclass 15, count 2 2006.229.08:38:33.07#ibcon#read 5, iclass 15, count 2 2006.229.08:38:33.07#ibcon#about to read 6, iclass 15, count 2 2006.229.08:38:33.07#ibcon#read 6, iclass 15, count 2 2006.229.08:38:33.07#ibcon#end of sib2, iclass 15, count 2 2006.229.08:38:33.07#ibcon#*after write, iclass 15, count 2 2006.229.08:38:33.07#ibcon#*before return 0, iclass 15, count 2 2006.229.08:38:33.07#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:33.07#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:33.07#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.08:38:33.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:33.07#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:33.19#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:33.19#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:33.19#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:38:33.19#ibcon#first serial, iclass 15, count 0 2006.229.08:38:33.19#ibcon#enter sib2, iclass 15, count 0 2006.229.08:38:33.19#ibcon#flushed, iclass 15, count 0 2006.229.08:38:33.19#ibcon#about to write, iclass 15, count 0 2006.229.08:38:33.19#ibcon#wrote, iclass 15, count 0 2006.229.08:38:33.19#ibcon#about to read 3, iclass 15, count 0 2006.229.08:38:33.21#ibcon#read 3, iclass 15, count 0 2006.229.08:38:33.21#ibcon#about to read 4, iclass 15, count 0 2006.229.08:38:33.21#ibcon#read 4, iclass 15, count 0 2006.229.08:38:33.21#ibcon#about to read 5, iclass 15, count 0 2006.229.08:38:33.21#ibcon#read 5, iclass 15, count 0 2006.229.08:38:33.21#ibcon#about to read 6, iclass 15, count 0 2006.229.08:38:33.21#ibcon#read 6, iclass 15, count 0 2006.229.08:38:33.21#ibcon#end of sib2, iclass 15, count 0 2006.229.08:38:33.21#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:38:33.21#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:38:33.21#ibcon#[25=USB\r\n] 2006.229.08:38:33.21#ibcon#*before write, iclass 15, count 0 2006.229.08:38:33.21#ibcon#enter sib2, iclass 15, count 0 2006.229.08:38:33.21#ibcon#flushed, iclass 15, count 0 2006.229.08:38:33.21#ibcon#about to write, iclass 15, count 0 2006.229.08:38:33.21#ibcon#wrote, iclass 15, count 0 2006.229.08:38:33.21#ibcon#about to read 3, iclass 15, count 0 2006.229.08:38:33.24#ibcon#read 3, iclass 15, count 0 2006.229.08:38:33.24#ibcon#about to read 4, iclass 15, count 0 2006.229.08:38:33.24#ibcon#read 4, iclass 15, count 0 2006.229.08:38:33.24#ibcon#about to read 5, iclass 15, count 0 2006.229.08:38:33.24#ibcon#read 5, iclass 15, count 0 2006.229.08:38:33.24#ibcon#about to read 6, iclass 15, count 0 2006.229.08:38:33.24#ibcon#read 6, iclass 15, count 0 2006.229.08:38:33.24#ibcon#end of sib2, iclass 15, count 0 2006.229.08:38:33.24#ibcon#*after write, iclass 15, count 0 2006.229.08:38:33.24#ibcon#*before return 0, iclass 15, count 0 2006.229.08:38:33.24#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:33.24#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:33.24#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:38:33.24#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:38:33.24$vck44/valo=7,864.99 2006.229.08:38:33.24#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.08:38:33.24#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.08:38:33.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:33.24#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:33.24#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:33.24#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:33.24#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:38:33.24#ibcon#first serial, iclass 17, count 0 2006.229.08:38:33.24#ibcon#enter sib2, iclass 17, count 0 2006.229.08:38:33.24#ibcon#flushed, iclass 17, count 0 2006.229.08:38:33.24#ibcon#about to write, iclass 17, count 0 2006.229.08:38:33.24#ibcon#wrote, iclass 17, count 0 2006.229.08:38:33.24#ibcon#about to read 3, iclass 17, count 0 2006.229.08:38:33.26#ibcon#read 3, iclass 17, count 0 2006.229.08:38:33.26#ibcon#about to read 4, iclass 17, count 0 2006.229.08:38:33.26#ibcon#read 4, iclass 17, count 0 2006.229.08:38:33.26#ibcon#about to read 5, iclass 17, count 0 2006.229.08:38:33.26#ibcon#read 5, iclass 17, count 0 2006.229.08:38:33.26#ibcon#about to read 6, iclass 17, count 0 2006.229.08:38:33.26#ibcon#read 6, iclass 17, count 0 2006.229.08:38:33.26#ibcon#end of sib2, iclass 17, count 0 2006.229.08:38:33.26#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:38:33.26#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:38:33.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:38:33.26#ibcon#*before write, iclass 17, count 0 2006.229.08:38:33.26#ibcon#enter sib2, iclass 17, count 0 2006.229.08:38:33.26#ibcon#flushed, iclass 17, count 0 2006.229.08:38:33.26#ibcon#about to write, iclass 17, count 0 2006.229.08:38:33.26#ibcon#wrote, iclass 17, count 0 2006.229.08:38:33.26#ibcon#about to read 3, iclass 17, count 0 2006.229.08:38:33.30#ibcon#read 3, iclass 17, count 0 2006.229.08:38:33.30#ibcon#about to read 4, iclass 17, count 0 2006.229.08:38:33.30#ibcon#read 4, iclass 17, count 0 2006.229.08:38:33.30#ibcon#about to read 5, iclass 17, count 0 2006.229.08:38:33.30#ibcon#read 5, iclass 17, count 0 2006.229.08:38:33.30#ibcon#about to read 6, iclass 17, count 0 2006.229.08:38:33.30#ibcon#read 6, iclass 17, count 0 2006.229.08:38:33.30#ibcon#end of sib2, iclass 17, count 0 2006.229.08:38:33.30#ibcon#*after write, iclass 17, count 0 2006.229.08:38:33.30#ibcon#*before return 0, iclass 17, count 0 2006.229.08:38:33.30#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:33.30#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:33.30#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:38:33.30#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:38:33.30$vck44/va=7,5 2006.229.08:38:33.30#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.08:38:33.30#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.08:38:33.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:33.30#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:33.36#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:33.36#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:33.36#ibcon#enter wrdev, iclass 19, count 2 2006.229.08:38:33.36#ibcon#first serial, iclass 19, count 2 2006.229.08:38:33.36#ibcon#enter sib2, iclass 19, count 2 2006.229.08:38:33.36#ibcon#flushed, iclass 19, count 2 2006.229.08:38:33.36#ibcon#about to write, iclass 19, count 2 2006.229.08:38:33.36#ibcon#wrote, iclass 19, count 2 2006.229.08:38:33.36#ibcon#about to read 3, iclass 19, count 2 2006.229.08:38:33.38#ibcon#read 3, iclass 19, count 2 2006.229.08:38:33.38#ibcon#about to read 4, iclass 19, count 2 2006.229.08:38:33.38#ibcon#read 4, iclass 19, count 2 2006.229.08:38:33.38#ibcon#about to read 5, iclass 19, count 2 2006.229.08:38:33.38#ibcon#read 5, iclass 19, count 2 2006.229.08:38:33.38#ibcon#about to read 6, iclass 19, count 2 2006.229.08:38:33.38#ibcon#read 6, iclass 19, count 2 2006.229.08:38:33.38#ibcon#end of sib2, iclass 19, count 2 2006.229.08:38:33.38#ibcon#*mode == 0, iclass 19, count 2 2006.229.08:38:33.38#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.08:38:33.38#ibcon#[25=AT07-05\r\n] 2006.229.08:38:33.38#ibcon#*before write, iclass 19, count 2 2006.229.08:38:33.38#ibcon#enter sib2, iclass 19, count 2 2006.229.08:38:33.38#ibcon#flushed, iclass 19, count 2 2006.229.08:38:33.38#ibcon#about to write, iclass 19, count 2 2006.229.08:38:33.38#ibcon#wrote, iclass 19, count 2 2006.229.08:38:33.38#ibcon#about to read 3, iclass 19, count 2 2006.229.08:38:33.41#ibcon#read 3, iclass 19, count 2 2006.229.08:38:33.41#ibcon#about to read 4, iclass 19, count 2 2006.229.08:38:33.41#ibcon#read 4, iclass 19, count 2 2006.229.08:38:33.41#ibcon#about to read 5, iclass 19, count 2 2006.229.08:38:33.41#ibcon#read 5, iclass 19, count 2 2006.229.08:38:33.41#ibcon#about to read 6, iclass 19, count 2 2006.229.08:38:33.41#ibcon#read 6, iclass 19, count 2 2006.229.08:38:33.41#ibcon#end of sib2, iclass 19, count 2 2006.229.08:38:33.41#ibcon#*after write, iclass 19, count 2 2006.229.08:38:33.41#ibcon#*before return 0, iclass 19, count 2 2006.229.08:38:33.41#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:33.41#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:33.41#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.08:38:33.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:33.41#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:33.53#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:33.53#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:33.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:38:33.53#ibcon#first serial, iclass 19, count 0 2006.229.08:38:33.53#ibcon#enter sib2, iclass 19, count 0 2006.229.08:38:33.53#ibcon#flushed, iclass 19, count 0 2006.229.08:38:33.53#ibcon#about to write, iclass 19, count 0 2006.229.08:38:33.53#ibcon#wrote, iclass 19, count 0 2006.229.08:38:33.53#ibcon#about to read 3, iclass 19, count 0 2006.229.08:38:33.55#ibcon#read 3, iclass 19, count 0 2006.229.08:38:33.55#ibcon#about to read 4, iclass 19, count 0 2006.229.08:38:33.55#ibcon#read 4, iclass 19, count 0 2006.229.08:38:33.55#ibcon#about to read 5, iclass 19, count 0 2006.229.08:38:33.55#ibcon#read 5, iclass 19, count 0 2006.229.08:38:33.55#ibcon#about to read 6, iclass 19, count 0 2006.229.08:38:33.55#ibcon#read 6, iclass 19, count 0 2006.229.08:38:33.55#ibcon#end of sib2, iclass 19, count 0 2006.229.08:38:33.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:38:33.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:38:33.55#ibcon#[25=USB\r\n] 2006.229.08:38:33.55#ibcon#*before write, iclass 19, count 0 2006.229.08:38:33.55#ibcon#enter sib2, iclass 19, count 0 2006.229.08:38:33.55#ibcon#flushed, iclass 19, count 0 2006.229.08:38:33.55#ibcon#about to write, iclass 19, count 0 2006.229.08:38:33.55#ibcon#wrote, iclass 19, count 0 2006.229.08:38:33.55#ibcon#about to read 3, iclass 19, count 0 2006.229.08:38:33.58#ibcon#read 3, iclass 19, count 0 2006.229.08:38:33.58#ibcon#about to read 4, iclass 19, count 0 2006.229.08:38:33.58#ibcon#read 4, iclass 19, count 0 2006.229.08:38:33.58#ibcon#about to read 5, iclass 19, count 0 2006.229.08:38:33.58#ibcon#read 5, iclass 19, count 0 2006.229.08:38:33.58#ibcon#about to read 6, iclass 19, count 0 2006.229.08:38:33.58#ibcon#read 6, iclass 19, count 0 2006.229.08:38:33.58#ibcon#end of sib2, iclass 19, count 0 2006.229.08:38:33.58#ibcon#*after write, iclass 19, count 0 2006.229.08:38:33.58#ibcon#*before return 0, iclass 19, count 0 2006.229.08:38:33.58#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:33.58#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:33.58#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:38:33.58#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:38:33.58$vck44/valo=8,884.99 2006.229.08:38:33.58#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.08:38:33.58#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.08:38:33.58#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:33.58#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:33.58#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:33.58#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:33.58#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:38:33.58#ibcon#first serial, iclass 21, count 0 2006.229.08:38:33.58#ibcon#enter sib2, iclass 21, count 0 2006.229.08:38:33.58#ibcon#flushed, iclass 21, count 0 2006.229.08:38:33.58#ibcon#about to write, iclass 21, count 0 2006.229.08:38:33.58#ibcon#wrote, iclass 21, count 0 2006.229.08:38:33.58#ibcon#about to read 3, iclass 21, count 0 2006.229.08:38:33.60#ibcon#read 3, iclass 21, count 0 2006.229.08:38:33.60#ibcon#about to read 4, iclass 21, count 0 2006.229.08:38:33.60#ibcon#read 4, iclass 21, count 0 2006.229.08:38:33.60#ibcon#about to read 5, iclass 21, count 0 2006.229.08:38:33.60#ibcon#read 5, iclass 21, count 0 2006.229.08:38:33.60#ibcon#about to read 6, iclass 21, count 0 2006.229.08:38:33.60#ibcon#read 6, iclass 21, count 0 2006.229.08:38:33.60#ibcon#end of sib2, iclass 21, count 0 2006.229.08:38:33.60#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:38:33.60#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:38:33.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:38:33.60#ibcon#*before write, iclass 21, count 0 2006.229.08:38:33.60#ibcon#enter sib2, iclass 21, count 0 2006.229.08:38:33.60#ibcon#flushed, iclass 21, count 0 2006.229.08:38:33.60#ibcon#about to write, iclass 21, count 0 2006.229.08:38:33.60#ibcon#wrote, iclass 21, count 0 2006.229.08:38:33.60#ibcon#about to read 3, iclass 21, count 0 2006.229.08:38:33.64#ibcon#read 3, iclass 21, count 0 2006.229.08:38:33.64#ibcon#about to read 4, iclass 21, count 0 2006.229.08:38:33.64#ibcon#read 4, iclass 21, count 0 2006.229.08:38:33.64#ibcon#about to read 5, iclass 21, count 0 2006.229.08:38:33.64#ibcon#read 5, iclass 21, count 0 2006.229.08:38:33.64#ibcon#about to read 6, iclass 21, count 0 2006.229.08:38:33.64#ibcon#read 6, iclass 21, count 0 2006.229.08:38:33.64#ibcon#end of sib2, iclass 21, count 0 2006.229.08:38:33.64#ibcon#*after write, iclass 21, count 0 2006.229.08:38:33.64#ibcon#*before return 0, iclass 21, count 0 2006.229.08:38:33.64#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:33.64#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:33.64#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:38:33.64#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:38:33.64$vck44/va=8,6 2006.229.08:38:33.64#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.08:38:33.64#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.08:38:33.64#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:33.64#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:38:33.70#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:38:33.70#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:38:33.70#ibcon#enter wrdev, iclass 23, count 2 2006.229.08:38:33.70#ibcon#first serial, iclass 23, count 2 2006.229.08:38:33.70#ibcon#enter sib2, iclass 23, count 2 2006.229.08:38:33.70#ibcon#flushed, iclass 23, count 2 2006.229.08:38:33.70#ibcon#about to write, iclass 23, count 2 2006.229.08:38:33.70#ibcon#wrote, iclass 23, count 2 2006.229.08:38:33.70#ibcon#about to read 3, iclass 23, count 2 2006.229.08:38:33.72#ibcon#read 3, iclass 23, count 2 2006.229.08:38:33.72#ibcon#about to read 4, iclass 23, count 2 2006.229.08:38:33.72#ibcon#read 4, iclass 23, count 2 2006.229.08:38:33.72#ibcon#about to read 5, iclass 23, count 2 2006.229.08:38:33.72#ibcon#read 5, iclass 23, count 2 2006.229.08:38:33.72#ibcon#about to read 6, iclass 23, count 2 2006.229.08:38:33.72#ibcon#read 6, iclass 23, count 2 2006.229.08:38:33.72#ibcon#end of sib2, iclass 23, count 2 2006.229.08:38:33.72#ibcon#*mode == 0, iclass 23, count 2 2006.229.08:38:33.72#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.08:38:33.72#ibcon#[25=AT08-06\r\n] 2006.229.08:38:33.72#ibcon#*before write, iclass 23, count 2 2006.229.08:38:33.72#ibcon#enter sib2, iclass 23, count 2 2006.229.08:38:33.72#ibcon#flushed, iclass 23, count 2 2006.229.08:38:33.72#ibcon#about to write, iclass 23, count 2 2006.229.08:38:33.72#ibcon#wrote, iclass 23, count 2 2006.229.08:38:33.72#ibcon#about to read 3, iclass 23, count 2 2006.229.08:38:33.75#ibcon#read 3, iclass 23, count 2 2006.229.08:38:33.75#ibcon#about to read 4, iclass 23, count 2 2006.229.08:38:33.75#ibcon#read 4, iclass 23, count 2 2006.229.08:38:33.75#ibcon#about to read 5, iclass 23, count 2 2006.229.08:38:33.75#ibcon#read 5, iclass 23, count 2 2006.229.08:38:33.75#ibcon#about to read 6, iclass 23, count 2 2006.229.08:38:33.75#ibcon#read 6, iclass 23, count 2 2006.229.08:38:33.75#ibcon#end of sib2, iclass 23, count 2 2006.229.08:38:33.75#ibcon#*after write, iclass 23, count 2 2006.229.08:38:33.75#ibcon#*before return 0, iclass 23, count 2 2006.229.08:38:33.75#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:38:33.75#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.08:38:33.75#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.08:38:33.75#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:33.75#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:38:33.87#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:38:33.87#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:38:33.87#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:38:33.87#ibcon#first serial, iclass 23, count 0 2006.229.08:38:33.87#ibcon#enter sib2, iclass 23, count 0 2006.229.08:38:33.87#ibcon#flushed, iclass 23, count 0 2006.229.08:38:33.87#ibcon#about to write, iclass 23, count 0 2006.229.08:38:33.87#ibcon#wrote, iclass 23, count 0 2006.229.08:38:33.87#ibcon#about to read 3, iclass 23, count 0 2006.229.08:38:33.89#ibcon#read 3, iclass 23, count 0 2006.229.08:38:33.89#ibcon#about to read 4, iclass 23, count 0 2006.229.08:38:33.89#ibcon#read 4, iclass 23, count 0 2006.229.08:38:33.89#ibcon#about to read 5, iclass 23, count 0 2006.229.08:38:33.89#ibcon#read 5, iclass 23, count 0 2006.229.08:38:33.89#ibcon#about to read 6, iclass 23, count 0 2006.229.08:38:33.89#ibcon#read 6, iclass 23, count 0 2006.229.08:38:33.89#ibcon#end of sib2, iclass 23, count 0 2006.229.08:38:33.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:38:33.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:38:33.89#ibcon#[25=USB\r\n] 2006.229.08:38:33.89#ibcon#*before write, iclass 23, count 0 2006.229.08:38:33.89#ibcon#enter sib2, iclass 23, count 0 2006.229.08:38:33.89#ibcon#flushed, iclass 23, count 0 2006.229.08:38:33.89#ibcon#about to write, iclass 23, count 0 2006.229.08:38:33.89#ibcon#wrote, iclass 23, count 0 2006.229.08:38:33.89#ibcon#about to read 3, iclass 23, count 0 2006.229.08:38:33.92#ibcon#read 3, iclass 23, count 0 2006.229.08:38:33.92#ibcon#about to read 4, iclass 23, count 0 2006.229.08:38:33.92#ibcon#read 4, iclass 23, count 0 2006.229.08:38:33.92#ibcon#about to read 5, iclass 23, count 0 2006.229.08:38:33.92#ibcon#read 5, iclass 23, count 0 2006.229.08:38:33.92#ibcon#about to read 6, iclass 23, count 0 2006.229.08:38:33.92#ibcon#read 6, iclass 23, count 0 2006.229.08:38:33.92#ibcon#end of sib2, iclass 23, count 0 2006.229.08:38:33.92#ibcon#*after write, iclass 23, count 0 2006.229.08:38:33.92#ibcon#*before return 0, iclass 23, count 0 2006.229.08:38:33.92#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:38:33.92#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.08:38:33.92#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:38:33.92#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:38:33.92$vck44/vblo=1,629.99 2006.229.08:38:33.92#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.08:38:33.92#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.08:38:33.92#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:33.92#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:38:33.92#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:38:33.92#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:38:33.92#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:38:33.92#ibcon#first serial, iclass 25, count 0 2006.229.08:38:33.92#ibcon#enter sib2, iclass 25, count 0 2006.229.08:38:33.92#ibcon#flushed, iclass 25, count 0 2006.229.08:38:33.92#ibcon#about to write, iclass 25, count 0 2006.229.08:38:33.92#ibcon#wrote, iclass 25, count 0 2006.229.08:38:33.92#ibcon#about to read 3, iclass 25, count 0 2006.229.08:38:33.94#ibcon#read 3, iclass 25, count 0 2006.229.08:38:33.94#ibcon#about to read 4, iclass 25, count 0 2006.229.08:38:33.94#ibcon#read 4, iclass 25, count 0 2006.229.08:38:33.94#ibcon#about to read 5, iclass 25, count 0 2006.229.08:38:33.94#ibcon#read 5, iclass 25, count 0 2006.229.08:38:33.94#ibcon#about to read 6, iclass 25, count 0 2006.229.08:38:33.94#ibcon#read 6, iclass 25, count 0 2006.229.08:38:33.94#ibcon#end of sib2, iclass 25, count 0 2006.229.08:38:33.94#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:38:33.94#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:38:33.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:38:33.94#ibcon#*before write, iclass 25, count 0 2006.229.08:38:33.94#ibcon#enter sib2, iclass 25, count 0 2006.229.08:38:33.94#ibcon#flushed, iclass 25, count 0 2006.229.08:38:33.94#ibcon#about to write, iclass 25, count 0 2006.229.08:38:33.94#ibcon#wrote, iclass 25, count 0 2006.229.08:38:33.94#ibcon#about to read 3, iclass 25, count 0 2006.229.08:38:33.98#ibcon#read 3, iclass 25, count 0 2006.229.08:38:33.98#ibcon#about to read 4, iclass 25, count 0 2006.229.08:38:33.98#ibcon#read 4, iclass 25, count 0 2006.229.08:38:33.98#ibcon#about to read 5, iclass 25, count 0 2006.229.08:38:33.98#ibcon#read 5, iclass 25, count 0 2006.229.08:38:33.98#ibcon#about to read 6, iclass 25, count 0 2006.229.08:38:33.98#ibcon#read 6, iclass 25, count 0 2006.229.08:38:33.98#ibcon#end of sib2, iclass 25, count 0 2006.229.08:38:33.98#ibcon#*after write, iclass 25, count 0 2006.229.08:38:33.98#ibcon#*before return 0, iclass 25, count 0 2006.229.08:38:33.98#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:38:33.98#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:38:33.98#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:38:33.98#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:38:33.98$vck44/vb=1,4 2006.229.08:38:33.98#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.08:38:33.98#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.08:38:33.98#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:33.98#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:38:33.98#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:38:33.98#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:38:33.98#ibcon#enter wrdev, iclass 27, count 2 2006.229.08:38:33.98#ibcon#first serial, iclass 27, count 2 2006.229.08:38:33.98#ibcon#enter sib2, iclass 27, count 2 2006.229.08:38:33.98#ibcon#flushed, iclass 27, count 2 2006.229.08:38:33.98#ibcon#about to write, iclass 27, count 2 2006.229.08:38:33.98#ibcon#wrote, iclass 27, count 2 2006.229.08:38:33.98#ibcon#about to read 3, iclass 27, count 2 2006.229.08:38:34.00#ibcon#read 3, iclass 27, count 2 2006.229.08:38:34.00#ibcon#about to read 4, iclass 27, count 2 2006.229.08:38:34.00#ibcon#read 4, iclass 27, count 2 2006.229.08:38:34.00#ibcon#about to read 5, iclass 27, count 2 2006.229.08:38:34.00#ibcon#read 5, iclass 27, count 2 2006.229.08:38:34.00#ibcon#about to read 6, iclass 27, count 2 2006.229.08:38:34.00#ibcon#read 6, iclass 27, count 2 2006.229.08:38:34.00#ibcon#end of sib2, iclass 27, count 2 2006.229.08:38:34.00#ibcon#*mode == 0, iclass 27, count 2 2006.229.08:38:34.00#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.08:38:34.00#ibcon#[27=AT01-04\r\n] 2006.229.08:38:34.00#ibcon#*before write, iclass 27, count 2 2006.229.08:38:34.00#ibcon#enter sib2, iclass 27, count 2 2006.229.08:38:34.00#ibcon#flushed, iclass 27, count 2 2006.229.08:38:34.00#ibcon#about to write, iclass 27, count 2 2006.229.08:38:34.00#ibcon#wrote, iclass 27, count 2 2006.229.08:38:34.00#ibcon#about to read 3, iclass 27, count 2 2006.229.08:38:34.03#ibcon#read 3, iclass 27, count 2 2006.229.08:38:34.03#ibcon#about to read 4, iclass 27, count 2 2006.229.08:38:34.03#ibcon#read 4, iclass 27, count 2 2006.229.08:38:34.03#ibcon#about to read 5, iclass 27, count 2 2006.229.08:38:34.03#ibcon#read 5, iclass 27, count 2 2006.229.08:38:34.03#ibcon#about to read 6, iclass 27, count 2 2006.229.08:38:34.03#ibcon#read 6, iclass 27, count 2 2006.229.08:38:34.03#ibcon#end of sib2, iclass 27, count 2 2006.229.08:38:34.03#ibcon#*after write, iclass 27, count 2 2006.229.08:38:34.03#ibcon#*before return 0, iclass 27, count 2 2006.229.08:38:34.03#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:38:34.03#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.08:38:34.03#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.08:38:34.03#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:34.03#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:38:34.15#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:38:34.15#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:38:34.15#ibcon#enter wrdev, iclass 27, count 0 2006.229.08:38:34.15#ibcon#first serial, iclass 27, count 0 2006.229.08:38:34.15#ibcon#enter sib2, iclass 27, count 0 2006.229.08:38:34.15#ibcon#flushed, iclass 27, count 0 2006.229.08:38:34.15#ibcon#about to write, iclass 27, count 0 2006.229.08:38:34.15#ibcon#wrote, iclass 27, count 0 2006.229.08:38:34.15#ibcon#about to read 3, iclass 27, count 0 2006.229.08:38:34.17#ibcon#read 3, iclass 27, count 0 2006.229.08:38:34.17#ibcon#about to read 4, iclass 27, count 0 2006.229.08:38:34.17#ibcon#read 4, iclass 27, count 0 2006.229.08:38:34.17#ibcon#about to read 5, iclass 27, count 0 2006.229.08:38:34.17#ibcon#read 5, iclass 27, count 0 2006.229.08:38:34.17#ibcon#about to read 6, iclass 27, count 0 2006.229.08:38:34.17#ibcon#read 6, iclass 27, count 0 2006.229.08:38:34.17#ibcon#end of sib2, iclass 27, count 0 2006.229.08:38:34.17#ibcon#*mode == 0, iclass 27, count 0 2006.229.08:38:34.17#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.08:38:34.17#ibcon#[27=USB\r\n] 2006.229.08:38:34.17#ibcon#*before write, iclass 27, count 0 2006.229.08:38:34.17#ibcon#enter sib2, iclass 27, count 0 2006.229.08:38:34.17#ibcon#flushed, iclass 27, count 0 2006.229.08:38:34.17#ibcon#about to write, iclass 27, count 0 2006.229.08:38:34.17#ibcon#wrote, iclass 27, count 0 2006.229.08:38:34.17#ibcon#about to read 3, iclass 27, count 0 2006.229.08:38:34.20#ibcon#read 3, iclass 27, count 0 2006.229.08:38:34.20#ibcon#about to read 4, iclass 27, count 0 2006.229.08:38:34.20#ibcon#read 4, iclass 27, count 0 2006.229.08:38:34.20#ibcon#about to read 5, iclass 27, count 0 2006.229.08:38:34.20#ibcon#read 5, iclass 27, count 0 2006.229.08:38:34.20#ibcon#about to read 6, iclass 27, count 0 2006.229.08:38:34.20#ibcon#read 6, iclass 27, count 0 2006.229.08:38:34.20#ibcon#end of sib2, iclass 27, count 0 2006.229.08:38:34.20#ibcon#*after write, iclass 27, count 0 2006.229.08:38:34.20#ibcon#*before return 0, iclass 27, count 0 2006.229.08:38:34.20#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:38:34.20#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.08:38:34.20#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.08:38:34.20#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.08:38:34.20$vck44/vblo=2,634.99 2006.229.08:38:34.20#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.08:38:34.20#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.08:38:34.20#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:34.20#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:34.20#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:34.20#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:34.20#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:38:34.20#ibcon#first serial, iclass 29, count 0 2006.229.08:38:34.20#ibcon#enter sib2, iclass 29, count 0 2006.229.08:38:34.20#ibcon#flushed, iclass 29, count 0 2006.229.08:38:34.20#ibcon#about to write, iclass 29, count 0 2006.229.08:38:34.20#ibcon#wrote, iclass 29, count 0 2006.229.08:38:34.20#ibcon#about to read 3, iclass 29, count 0 2006.229.08:38:34.22#ibcon#read 3, iclass 29, count 0 2006.229.08:38:34.22#ibcon#about to read 4, iclass 29, count 0 2006.229.08:38:34.22#ibcon#read 4, iclass 29, count 0 2006.229.08:38:34.22#ibcon#about to read 5, iclass 29, count 0 2006.229.08:38:34.22#ibcon#read 5, iclass 29, count 0 2006.229.08:38:34.22#ibcon#about to read 6, iclass 29, count 0 2006.229.08:38:34.22#ibcon#read 6, iclass 29, count 0 2006.229.08:38:34.22#ibcon#end of sib2, iclass 29, count 0 2006.229.08:38:34.22#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:38:34.22#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:38:34.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:38:34.22#ibcon#*before write, iclass 29, count 0 2006.229.08:38:34.22#ibcon#enter sib2, iclass 29, count 0 2006.229.08:38:34.22#ibcon#flushed, iclass 29, count 0 2006.229.08:38:34.22#ibcon#about to write, iclass 29, count 0 2006.229.08:38:34.22#ibcon#wrote, iclass 29, count 0 2006.229.08:38:34.22#ibcon#about to read 3, iclass 29, count 0 2006.229.08:38:34.26#ibcon#read 3, iclass 29, count 0 2006.229.08:38:34.26#ibcon#about to read 4, iclass 29, count 0 2006.229.08:38:34.26#ibcon#read 4, iclass 29, count 0 2006.229.08:38:34.26#ibcon#about to read 5, iclass 29, count 0 2006.229.08:38:34.26#ibcon#read 5, iclass 29, count 0 2006.229.08:38:34.26#ibcon#about to read 6, iclass 29, count 0 2006.229.08:38:34.26#ibcon#read 6, iclass 29, count 0 2006.229.08:38:34.26#ibcon#end of sib2, iclass 29, count 0 2006.229.08:38:34.26#ibcon#*after write, iclass 29, count 0 2006.229.08:38:34.26#ibcon#*before return 0, iclass 29, count 0 2006.229.08:38:34.26#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:34.26#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.08:38:34.26#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:38:34.26#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:38:34.26$vck44/vb=2,4 2006.229.08:38:34.26#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.08:38:34.26#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.08:38:34.26#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:34.26#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:34.32#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:34.32#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:34.32#ibcon#enter wrdev, iclass 31, count 2 2006.229.08:38:34.32#ibcon#first serial, iclass 31, count 2 2006.229.08:38:34.32#ibcon#enter sib2, iclass 31, count 2 2006.229.08:38:34.32#ibcon#flushed, iclass 31, count 2 2006.229.08:38:34.32#ibcon#about to write, iclass 31, count 2 2006.229.08:38:34.32#ibcon#wrote, iclass 31, count 2 2006.229.08:38:34.32#ibcon#about to read 3, iclass 31, count 2 2006.229.08:38:34.34#ibcon#read 3, iclass 31, count 2 2006.229.08:38:34.34#ibcon#about to read 4, iclass 31, count 2 2006.229.08:38:34.34#ibcon#read 4, iclass 31, count 2 2006.229.08:38:34.34#ibcon#about to read 5, iclass 31, count 2 2006.229.08:38:34.34#ibcon#read 5, iclass 31, count 2 2006.229.08:38:34.34#ibcon#about to read 6, iclass 31, count 2 2006.229.08:38:34.34#ibcon#read 6, iclass 31, count 2 2006.229.08:38:34.34#ibcon#end of sib2, iclass 31, count 2 2006.229.08:38:34.34#ibcon#*mode == 0, iclass 31, count 2 2006.229.08:38:34.34#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.08:38:34.34#ibcon#[27=AT02-04\r\n] 2006.229.08:38:34.34#ibcon#*before write, iclass 31, count 2 2006.229.08:38:34.34#ibcon#enter sib2, iclass 31, count 2 2006.229.08:38:34.34#ibcon#flushed, iclass 31, count 2 2006.229.08:38:34.34#ibcon#about to write, iclass 31, count 2 2006.229.08:38:34.34#ibcon#wrote, iclass 31, count 2 2006.229.08:38:34.34#ibcon#about to read 3, iclass 31, count 2 2006.229.08:38:34.37#ibcon#read 3, iclass 31, count 2 2006.229.08:38:34.37#ibcon#about to read 4, iclass 31, count 2 2006.229.08:38:34.37#ibcon#read 4, iclass 31, count 2 2006.229.08:38:34.37#ibcon#about to read 5, iclass 31, count 2 2006.229.08:38:34.37#ibcon#read 5, iclass 31, count 2 2006.229.08:38:34.37#ibcon#about to read 6, iclass 31, count 2 2006.229.08:38:34.37#ibcon#read 6, iclass 31, count 2 2006.229.08:38:34.37#ibcon#end of sib2, iclass 31, count 2 2006.229.08:38:34.37#ibcon#*after write, iclass 31, count 2 2006.229.08:38:34.37#ibcon#*before return 0, iclass 31, count 2 2006.229.08:38:34.37#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:34.37#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.08:38:34.37#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.08:38:34.37#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:34.37#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:34.49#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:34.49#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:34.49#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:38:34.49#ibcon#first serial, iclass 31, count 0 2006.229.08:38:34.49#ibcon#enter sib2, iclass 31, count 0 2006.229.08:38:34.49#ibcon#flushed, iclass 31, count 0 2006.229.08:38:34.49#ibcon#about to write, iclass 31, count 0 2006.229.08:38:34.49#ibcon#wrote, iclass 31, count 0 2006.229.08:38:34.49#ibcon#about to read 3, iclass 31, count 0 2006.229.08:38:34.51#ibcon#read 3, iclass 31, count 0 2006.229.08:38:34.51#ibcon#about to read 4, iclass 31, count 0 2006.229.08:38:34.51#ibcon#read 4, iclass 31, count 0 2006.229.08:38:34.51#ibcon#about to read 5, iclass 31, count 0 2006.229.08:38:34.51#ibcon#read 5, iclass 31, count 0 2006.229.08:38:34.51#ibcon#about to read 6, iclass 31, count 0 2006.229.08:38:34.51#ibcon#read 6, iclass 31, count 0 2006.229.08:38:34.51#ibcon#end of sib2, iclass 31, count 0 2006.229.08:38:34.51#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:38:34.51#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:38:34.51#ibcon#[27=USB\r\n] 2006.229.08:38:34.51#ibcon#*before write, iclass 31, count 0 2006.229.08:38:34.51#ibcon#enter sib2, iclass 31, count 0 2006.229.08:38:34.51#ibcon#flushed, iclass 31, count 0 2006.229.08:38:34.51#ibcon#about to write, iclass 31, count 0 2006.229.08:38:34.51#ibcon#wrote, iclass 31, count 0 2006.229.08:38:34.51#ibcon#about to read 3, iclass 31, count 0 2006.229.08:38:34.54#ibcon#read 3, iclass 31, count 0 2006.229.08:38:34.54#ibcon#about to read 4, iclass 31, count 0 2006.229.08:38:34.54#ibcon#read 4, iclass 31, count 0 2006.229.08:38:34.54#ibcon#about to read 5, iclass 31, count 0 2006.229.08:38:34.54#ibcon#read 5, iclass 31, count 0 2006.229.08:38:34.54#ibcon#about to read 6, iclass 31, count 0 2006.229.08:38:34.54#ibcon#read 6, iclass 31, count 0 2006.229.08:38:34.54#ibcon#end of sib2, iclass 31, count 0 2006.229.08:38:34.54#ibcon#*after write, iclass 31, count 0 2006.229.08:38:34.54#ibcon#*before return 0, iclass 31, count 0 2006.229.08:38:34.54#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:34.54#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.08:38:34.54#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:38:34.54#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:38:34.54$vck44/vblo=3,649.99 2006.229.08:38:34.54#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.08:38:34.54#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.08:38:34.54#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:34.54#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:34.54#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:34.54#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:34.54#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:38:34.54#ibcon#first serial, iclass 33, count 0 2006.229.08:38:34.54#ibcon#enter sib2, iclass 33, count 0 2006.229.08:38:34.54#ibcon#flushed, iclass 33, count 0 2006.229.08:38:34.54#ibcon#about to write, iclass 33, count 0 2006.229.08:38:34.54#ibcon#wrote, iclass 33, count 0 2006.229.08:38:34.54#ibcon#about to read 3, iclass 33, count 0 2006.229.08:38:34.56#ibcon#read 3, iclass 33, count 0 2006.229.08:38:34.56#ibcon#about to read 4, iclass 33, count 0 2006.229.08:38:34.56#ibcon#read 4, iclass 33, count 0 2006.229.08:38:34.56#ibcon#about to read 5, iclass 33, count 0 2006.229.08:38:34.56#ibcon#read 5, iclass 33, count 0 2006.229.08:38:34.56#ibcon#about to read 6, iclass 33, count 0 2006.229.08:38:34.56#ibcon#read 6, iclass 33, count 0 2006.229.08:38:34.56#ibcon#end of sib2, iclass 33, count 0 2006.229.08:38:34.56#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:38:34.56#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:38:34.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:38:34.56#ibcon#*before write, iclass 33, count 0 2006.229.08:38:34.56#ibcon#enter sib2, iclass 33, count 0 2006.229.08:38:34.56#ibcon#flushed, iclass 33, count 0 2006.229.08:38:34.56#ibcon#about to write, iclass 33, count 0 2006.229.08:38:34.56#ibcon#wrote, iclass 33, count 0 2006.229.08:38:34.56#ibcon#about to read 3, iclass 33, count 0 2006.229.08:38:34.60#ibcon#read 3, iclass 33, count 0 2006.229.08:38:34.60#ibcon#about to read 4, iclass 33, count 0 2006.229.08:38:34.60#ibcon#read 4, iclass 33, count 0 2006.229.08:38:34.60#ibcon#about to read 5, iclass 33, count 0 2006.229.08:38:34.60#ibcon#read 5, iclass 33, count 0 2006.229.08:38:34.60#ibcon#about to read 6, iclass 33, count 0 2006.229.08:38:34.60#ibcon#read 6, iclass 33, count 0 2006.229.08:38:34.60#ibcon#end of sib2, iclass 33, count 0 2006.229.08:38:34.60#ibcon#*after write, iclass 33, count 0 2006.229.08:38:34.60#ibcon#*before return 0, iclass 33, count 0 2006.229.08:38:34.60#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:34.60#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.08:38:34.60#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:38:34.60#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:38:34.60$vck44/vb=3,4 2006.229.08:38:34.60#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.08:38:34.60#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.08:38:34.60#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:34.60#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:34.66#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:34.66#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:34.66#ibcon#enter wrdev, iclass 35, count 2 2006.229.08:38:34.66#ibcon#first serial, iclass 35, count 2 2006.229.08:38:34.66#ibcon#enter sib2, iclass 35, count 2 2006.229.08:38:34.66#ibcon#flushed, iclass 35, count 2 2006.229.08:38:34.66#ibcon#about to write, iclass 35, count 2 2006.229.08:38:34.66#ibcon#wrote, iclass 35, count 2 2006.229.08:38:34.66#ibcon#about to read 3, iclass 35, count 2 2006.229.08:38:34.68#ibcon#read 3, iclass 35, count 2 2006.229.08:38:34.68#ibcon#about to read 4, iclass 35, count 2 2006.229.08:38:34.68#ibcon#read 4, iclass 35, count 2 2006.229.08:38:34.68#ibcon#about to read 5, iclass 35, count 2 2006.229.08:38:34.68#ibcon#read 5, iclass 35, count 2 2006.229.08:38:34.68#ibcon#about to read 6, iclass 35, count 2 2006.229.08:38:34.68#ibcon#read 6, iclass 35, count 2 2006.229.08:38:34.68#ibcon#end of sib2, iclass 35, count 2 2006.229.08:38:34.68#ibcon#*mode == 0, iclass 35, count 2 2006.229.08:38:34.68#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.08:38:34.68#ibcon#[27=AT03-04\r\n] 2006.229.08:38:34.68#ibcon#*before write, iclass 35, count 2 2006.229.08:38:34.68#ibcon#enter sib2, iclass 35, count 2 2006.229.08:38:34.68#ibcon#flushed, iclass 35, count 2 2006.229.08:38:34.68#ibcon#about to write, iclass 35, count 2 2006.229.08:38:34.68#ibcon#wrote, iclass 35, count 2 2006.229.08:38:34.68#ibcon#about to read 3, iclass 35, count 2 2006.229.08:38:34.71#ibcon#read 3, iclass 35, count 2 2006.229.08:38:34.71#ibcon#about to read 4, iclass 35, count 2 2006.229.08:38:34.71#ibcon#read 4, iclass 35, count 2 2006.229.08:38:34.71#ibcon#about to read 5, iclass 35, count 2 2006.229.08:38:34.71#ibcon#read 5, iclass 35, count 2 2006.229.08:38:34.71#ibcon#about to read 6, iclass 35, count 2 2006.229.08:38:34.71#ibcon#read 6, iclass 35, count 2 2006.229.08:38:34.71#ibcon#end of sib2, iclass 35, count 2 2006.229.08:38:34.71#ibcon#*after write, iclass 35, count 2 2006.229.08:38:34.71#ibcon#*before return 0, iclass 35, count 2 2006.229.08:38:34.71#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:34.71#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.08:38:34.71#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.08:38:34.71#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:34.71#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:34.83#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:34.83#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:34.83#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:38:34.83#ibcon#first serial, iclass 35, count 0 2006.229.08:38:34.83#ibcon#enter sib2, iclass 35, count 0 2006.229.08:38:34.83#ibcon#flushed, iclass 35, count 0 2006.229.08:38:34.83#ibcon#about to write, iclass 35, count 0 2006.229.08:38:34.83#ibcon#wrote, iclass 35, count 0 2006.229.08:38:34.83#ibcon#about to read 3, iclass 35, count 0 2006.229.08:38:34.85#ibcon#read 3, iclass 35, count 0 2006.229.08:38:34.85#ibcon#about to read 4, iclass 35, count 0 2006.229.08:38:34.85#ibcon#read 4, iclass 35, count 0 2006.229.08:38:34.85#ibcon#about to read 5, iclass 35, count 0 2006.229.08:38:34.85#ibcon#read 5, iclass 35, count 0 2006.229.08:38:34.85#ibcon#about to read 6, iclass 35, count 0 2006.229.08:38:34.85#ibcon#read 6, iclass 35, count 0 2006.229.08:38:34.85#ibcon#end of sib2, iclass 35, count 0 2006.229.08:38:34.85#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:38:34.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:38:34.85#ibcon#[27=USB\r\n] 2006.229.08:38:34.85#ibcon#*before write, iclass 35, count 0 2006.229.08:38:34.85#ibcon#enter sib2, iclass 35, count 0 2006.229.08:38:34.85#ibcon#flushed, iclass 35, count 0 2006.229.08:38:34.85#ibcon#about to write, iclass 35, count 0 2006.229.08:38:34.85#ibcon#wrote, iclass 35, count 0 2006.229.08:38:34.85#ibcon#about to read 3, iclass 35, count 0 2006.229.08:38:34.88#ibcon#read 3, iclass 35, count 0 2006.229.08:38:34.88#ibcon#about to read 4, iclass 35, count 0 2006.229.08:38:34.88#ibcon#read 4, iclass 35, count 0 2006.229.08:38:34.88#ibcon#about to read 5, iclass 35, count 0 2006.229.08:38:34.88#ibcon#read 5, iclass 35, count 0 2006.229.08:38:34.88#ibcon#about to read 6, iclass 35, count 0 2006.229.08:38:34.88#ibcon#read 6, iclass 35, count 0 2006.229.08:38:34.88#ibcon#end of sib2, iclass 35, count 0 2006.229.08:38:34.88#ibcon#*after write, iclass 35, count 0 2006.229.08:38:34.88#ibcon#*before return 0, iclass 35, count 0 2006.229.08:38:34.88#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:34.88#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.08:38:34.88#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:38:34.88#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:38:34.88$vck44/vblo=4,679.99 2006.229.08:38:34.88#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.08:38:34.88#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.08:38:34.88#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:34.88#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:34.88#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:34.88#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:34.88#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:38:34.88#ibcon#first serial, iclass 37, count 0 2006.229.08:38:34.88#ibcon#enter sib2, iclass 37, count 0 2006.229.08:38:34.88#ibcon#flushed, iclass 37, count 0 2006.229.08:38:34.88#ibcon#about to write, iclass 37, count 0 2006.229.08:38:34.88#ibcon#wrote, iclass 37, count 0 2006.229.08:38:34.88#ibcon#about to read 3, iclass 37, count 0 2006.229.08:38:34.90#ibcon#read 3, iclass 37, count 0 2006.229.08:38:34.90#ibcon#about to read 4, iclass 37, count 0 2006.229.08:38:34.90#ibcon#read 4, iclass 37, count 0 2006.229.08:38:34.90#ibcon#about to read 5, iclass 37, count 0 2006.229.08:38:34.90#ibcon#read 5, iclass 37, count 0 2006.229.08:38:34.90#ibcon#about to read 6, iclass 37, count 0 2006.229.08:38:34.90#ibcon#read 6, iclass 37, count 0 2006.229.08:38:34.90#ibcon#end of sib2, iclass 37, count 0 2006.229.08:38:34.90#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:38:34.90#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:38:34.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:38:34.90#ibcon#*before write, iclass 37, count 0 2006.229.08:38:34.90#ibcon#enter sib2, iclass 37, count 0 2006.229.08:38:34.90#ibcon#flushed, iclass 37, count 0 2006.229.08:38:34.90#ibcon#about to write, iclass 37, count 0 2006.229.08:38:34.90#ibcon#wrote, iclass 37, count 0 2006.229.08:38:34.90#ibcon#about to read 3, iclass 37, count 0 2006.229.08:38:34.94#ibcon#read 3, iclass 37, count 0 2006.229.08:38:34.94#ibcon#about to read 4, iclass 37, count 0 2006.229.08:38:34.94#ibcon#read 4, iclass 37, count 0 2006.229.08:38:34.94#ibcon#about to read 5, iclass 37, count 0 2006.229.08:38:34.94#ibcon#read 5, iclass 37, count 0 2006.229.08:38:34.94#ibcon#about to read 6, iclass 37, count 0 2006.229.08:38:34.94#ibcon#read 6, iclass 37, count 0 2006.229.08:38:34.94#ibcon#end of sib2, iclass 37, count 0 2006.229.08:38:34.94#ibcon#*after write, iclass 37, count 0 2006.229.08:38:34.94#ibcon#*before return 0, iclass 37, count 0 2006.229.08:38:34.94#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:34.94#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.08:38:34.94#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:38:34.94#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:38:34.94$vck44/vb=4,4 2006.229.08:38:34.94#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.08:38:34.94#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.08:38:34.94#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:34.94#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:35.00#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:35.00#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:35.00#ibcon#enter wrdev, iclass 39, count 2 2006.229.08:38:35.00#ibcon#first serial, iclass 39, count 2 2006.229.08:38:35.00#ibcon#enter sib2, iclass 39, count 2 2006.229.08:38:35.00#ibcon#flushed, iclass 39, count 2 2006.229.08:38:35.00#ibcon#about to write, iclass 39, count 2 2006.229.08:38:35.00#ibcon#wrote, iclass 39, count 2 2006.229.08:38:35.00#ibcon#about to read 3, iclass 39, count 2 2006.229.08:38:35.02#ibcon#read 3, iclass 39, count 2 2006.229.08:38:35.02#ibcon#about to read 4, iclass 39, count 2 2006.229.08:38:35.02#ibcon#read 4, iclass 39, count 2 2006.229.08:38:35.02#ibcon#about to read 5, iclass 39, count 2 2006.229.08:38:35.02#ibcon#read 5, iclass 39, count 2 2006.229.08:38:35.02#ibcon#about to read 6, iclass 39, count 2 2006.229.08:38:35.02#ibcon#read 6, iclass 39, count 2 2006.229.08:38:35.02#ibcon#end of sib2, iclass 39, count 2 2006.229.08:38:35.02#ibcon#*mode == 0, iclass 39, count 2 2006.229.08:38:35.02#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.08:38:35.02#ibcon#[27=AT04-04\r\n] 2006.229.08:38:35.02#ibcon#*before write, iclass 39, count 2 2006.229.08:38:35.02#ibcon#enter sib2, iclass 39, count 2 2006.229.08:38:35.02#ibcon#flushed, iclass 39, count 2 2006.229.08:38:35.02#ibcon#about to write, iclass 39, count 2 2006.229.08:38:35.02#ibcon#wrote, iclass 39, count 2 2006.229.08:38:35.02#ibcon#about to read 3, iclass 39, count 2 2006.229.08:38:35.05#ibcon#read 3, iclass 39, count 2 2006.229.08:38:35.05#ibcon#about to read 4, iclass 39, count 2 2006.229.08:38:35.05#ibcon#read 4, iclass 39, count 2 2006.229.08:38:35.05#ibcon#about to read 5, iclass 39, count 2 2006.229.08:38:35.05#ibcon#read 5, iclass 39, count 2 2006.229.08:38:35.05#ibcon#about to read 6, iclass 39, count 2 2006.229.08:38:35.05#ibcon#read 6, iclass 39, count 2 2006.229.08:38:35.05#ibcon#end of sib2, iclass 39, count 2 2006.229.08:38:35.05#ibcon#*after write, iclass 39, count 2 2006.229.08:38:35.05#ibcon#*before return 0, iclass 39, count 2 2006.229.08:38:35.05#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:35.05#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.08:38:35.05#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.08:38:35.05#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:35.05#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:35.17#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:35.17#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:35.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:38:35.17#ibcon#first serial, iclass 39, count 0 2006.229.08:38:35.17#ibcon#enter sib2, iclass 39, count 0 2006.229.08:38:35.17#ibcon#flushed, iclass 39, count 0 2006.229.08:38:35.17#ibcon#about to write, iclass 39, count 0 2006.229.08:38:35.17#ibcon#wrote, iclass 39, count 0 2006.229.08:38:35.17#ibcon#about to read 3, iclass 39, count 0 2006.229.08:38:35.19#ibcon#read 3, iclass 39, count 0 2006.229.08:38:35.19#ibcon#about to read 4, iclass 39, count 0 2006.229.08:38:35.19#ibcon#read 4, iclass 39, count 0 2006.229.08:38:35.19#ibcon#about to read 5, iclass 39, count 0 2006.229.08:38:35.19#ibcon#read 5, iclass 39, count 0 2006.229.08:38:35.19#ibcon#about to read 6, iclass 39, count 0 2006.229.08:38:35.19#ibcon#read 6, iclass 39, count 0 2006.229.08:38:35.19#ibcon#end of sib2, iclass 39, count 0 2006.229.08:38:35.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:38:35.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:38:35.19#ibcon#[27=USB\r\n] 2006.229.08:38:35.19#ibcon#*before write, iclass 39, count 0 2006.229.08:38:35.19#ibcon#enter sib2, iclass 39, count 0 2006.229.08:38:35.19#ibcon#flushed, iclass 39, count 0 2006.229.08:38:35.19#ibcon#about to write, iclass 39, count 0 2006.229.08:38:35.19#ibcon#wrote, iclass 39, count 0 2006.229.08:38:35.19#ibcon#about to read 3, iclass 39, count 0 2006.229.08:38:35.22#ibcon#read 3, iclass 39, count 0 2006.229.08:38:35.22#ibcon#about to read 4, iclass 39, count 0 2006.229.08:38:35.22#ibcon#read 4, iclass 39, count 0 2006.229.08:38:35.22#ibcon#about to read 5, iclass 39, count 0 2006.229.08:38:35.22#ibcon#read 5, iclass 39, count 0 2006.229.08:38:35.22#ibcon#about to read 6, iclass 39, count 0 2006.229.08:38:35.22#ibcon#read 6, iclass 39, count 0 2006.229.08:38:35.22#ibcon#end of sib2, iclass 39, count 0 2006.229.08:38:35.22#ibcon#*after write, iclass 39, count 0 2006.229.08:38:35.22#ibcon#*before return 0, iclass 39, count 0 2006.229.08:38:35.22#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:35.22#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.08:38:35.22#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:38:35.22#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:38:35.22$vck44/vblo=5,709.99 2006.229.08:38:35.22#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.08:38:35.22#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.08:38:35.22#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:35.22#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:35.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:35.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:35.22#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:38:35.22#ibcon#first serial, iclass 3, count 0 2006.229.08:38:35.22#ibcon#enter sib2, iclass 3, count 0 2006.229.08:38:35.22#ibcon#flushed, iclass 3, count 0 2006.229.08:38:35.22#ibcon#about to write, iclass 3, count 0 2006.229.08:38:35.22#ibcon#wrote, iclass 3, count 0 2006.229.08:38:35.22#ibcon#about to read 3, iclass 3, count 0 2006.229.08:38:35.24#ibcon#read 3, iclass 3, count 0 2006.229.08:38:35.24#ibcon#about to read 4, iclass 3, count 0 2006.229.08:38:35.24#ibcon#read 4, iclass 3, count 0 2006.229.08:38:35.24#ibcon#about to read 5, iclass 3, count 0 2006.229.08:38:35.24#ibcon#read 5, iclass 3, count 0 2006.229.08:38:35.24#ibcon#about to read 6, iclass 3, count 0 2006.229.08:38:35.24#ibcon#read 6, iclass 3, count 0 2006.229.08:38:35.24#ibcon#end of sib2, iclass 3, count 0 2006.229.08:38:35.24#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:38:35.24#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:38:35.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:38:35.24#ibcon#*before write, iclass 3, count 0 2006.229.08:38:35.24#ibcon#enter sib2, iclass 3, count 0 2006.229.08:38:35.24#ibcon#flushed, iclass 3, count 0 2006.229.08:38:35.24#ibcon#about to write, iclass 3, count 0 2006.229.08:38:35.24#ibcon#wrote, iclass 3, count 0 2006.229.08:38:35.24#ibcon#about to read 3, iclass 3, count 0 2006.229.08:38:35.28#ibcon#read 3, iclass 3, count 0 2006.229.08:38:35.28#ibcon#about to read 4, iclass 3, count 0 2006.229.08:38:35.28#ibcon#read 4, iclass 3, count 0 2006.229.08:38:35.28#ibcon#about to read 5, iclass 3, count 0 2006.229.08:38:35.28#ibcon#read 5, iclass 3, count 0 2006.229.08:38:35.28#ibcon#about to read 6, iclass 3, count 0 2006.229.08:38:35.28#ibcon#read 6, iclass 3, count 0 2006.229.08:38:35.28#ibcon#end of sib2, iclass 3, count 0 2006.229.08:38:35.28#ibcon#*after write, iclass 3, count 0 2006.229.08:38:35.28#ibcon#*before return 0, iclass 3, count 0 2006.229.08:38:35.28#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:35.28#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.08:38:35.28#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:38:35.28#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:38:35.28$vck44/vb=5,4 2006.229.08:38:35.28#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.08:38:35.28#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.08:38:35.28#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:35.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:35.34#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:35.34#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:35.34#ibcon#enter wrdev, iclass 5, count 2 2006.229.08:38:35.34#ibcon#first serial, iclass 5, count 2 2006.229.08:38:35.34#ibcon#enter sib2, iclass 5, count 2 2006.229.08:38:35.34#ibcon#flushed, iclass 5, count 2 2006.229.08:38:35.34#ibcon#about to write, iclass 5, count 2 2006.229.08:38:35.34#ibcon#wrote, iclass 5, count 2 2006.229.08:38:35.34#ibcon#about to read 3, iclass 5, count 2 2006.229.08:38:35.36#ibcon#read 3, iclass 5, count 2 2006.229.08:38:35.36#ibcon#about to read 4, iclass 5, count 2 2006.229.08:38:35.36#ibcon#read 4, iclass 5, count 2 2006.229.08:38:35.36#ibcon#about to read 5, iclass 5, count 2 2006.229.08:38:35.36#ibcon#read 5, iclass 5, count 2 2006.229.08:38:35.36#ibcon#about to read 6, iclass 5, count 2 2006.229.08:38:35.36#ibcon#read 6, iclass 5, count 2 2006.229.08:38:35.36#ibcon#end of sib2, iclass 5, count 2 2006.229.08:38:35.36#ibcon#*mode == 0, iclass 5, count 2 2006.229.08:38:35.36#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.08:38:35.36#ibcon#[27=AT05-04\r\n] 2006.229.08:38:35.36#ibcon#*before write, iclass 5, count 2 2006.229.08:38:35.36#ibcon#enter sib2, iclass 5, count 2 2006.229.08:38:35.36#ibcon#flushed, iclass 5, count 2 2006.229.08:38:35.36#ibcon#about to write, iclass 5, count 2 2006.229.08:38:35.36#ibcon#wrote, iclass 5, count 2 2006.229.08:38:35.36#ibcon#about to read 3, iclass 5, count 2 2006.229.08:38:35.39#ibcon#read 3, iclass 5, count 2 2006.229.08:38:35.39#ibcon#about to read 4, iclass 5, count 2 2006.229.08:38:35.39#ibcon#read 4, iclass 5, count 2 2006.229.08:38:35.39#ibcon#about to read 5, iclass 5, count 2 2006.229.08:38:35.39#ibcon#read 5, iclass 5, count 2 2006.229.08:38:35.39#ibcon#about to read 6, iclass 5, count 2 2006.229.08:38:35.39#ibcon#read 6, iclass 5, count 2 2006.229.08:38:35.39#ibcon#end of sib2, iclass 5, count 2 2006.229.08:38:35.39#ibcon#*after write, iclass 5, count 2 2006.229.08:38:35.39#ibcon#*before return 0, iclass 5, count 2 2006.229.08:38:35.39#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:35.39#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.08:38:35.39#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.08:38:35.39#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:35.39#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:35.51#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:35.51#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:35.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:38:35.51#ibcon#first serial, iclass 5, count 0 2006.229.08:38:35.51#ibcon#enter sib2, iclass 5, count 0 2006.229.08:38:35.51#ibcon#flushed, iclass 5, count 0 2006.229.08:38:35.51#ibcon#about to write, iclass 5, count 0 2006.229.08:38:35.51#ibcon#wrote, iclass 5, count 0 2006.229.08:38:35.51#ibcon#about to read 3, iclass 5, count 0 2006.229.08:38:35.53#ibcon#read 3, iclass 5, count 0 2006.229.08:38:35.53#ibcon#about to read 4, iclass 5, count 0 2006.229.08:38:35.53#ibcon#read 4, iclass 5, count 0 2006.229.08:38:35.53#ibcon#about to read 5, iclass 5, count 0 2006.229.08:38:35.53#ibcon#read 5, iclass 5, count 0 2006.229.08:38:35.53#ibcon#about to read 6, iclass 5, count 0 2006.229.08:38:35.53#ibcon#read 6, iclass 5, count 0 2006.229.08:38:35.53#ibcon#end of sib2, iclass 5, count 0 2006.229.08:38:35.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:38:35.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:38:35.53#ibcon#[27=USB\r\n] 2006.229.08:38:35.53#ibcon#*before write, iclass 5, count 0 2006.229.08:38:35.53#ibcon#enter sib2, iclass 5, count 0 2006.229.08:38:35.53#ibcon#flushed, iclass 5, count 0 2006.229.08:38:35.53#ibcon#about to write, iclass 5, count 0 2006.229.08:38:35.53#ibcon#wrote, iclass 5, count 0 2006.229.08:38:35.53#ibcon#about to read 3, iclass 5, count 0 2006.229.08:38:35.56#ibcon#read 3, iclass 5, count 0 2006.229.08:38:35.56#ibcon#about to read 4, iclass 5, count 0 2006.229.08:38:35.56#ibcon#read 4, iclass 5, count 0 2006.229.08:38:35.56#ibcon#about to read 5, iclass 5, count 0 2006.229.08:38:35.56#ibcon#read 5, iclass 5, count 0 2006.229.08:38:35.56#ibcon#about to read 6, iclass 5, count 0 2006.229.08:38:35.56#ibcon#read 6, iclass 5, count 0 2006.229.08:38:35.56#ibcon#end of sib2, iclass 5, count 0 2006.229.08:38:35.56#ibcon#*after write, iclass 5, count 0 2006.229.08:38:35.56#ibcon#*before return 0, iclass 5, count 0 2006.229.08:38:35.56#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:35.56#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.08:38:35.56#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:38:35.56#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:38:35.56$vck44/vblo=6,719.99 2006.229.08:38:35.56#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.08:38:35.56#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.08:38:35.56#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:35.56#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:35.56#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:35.56#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:35.56#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:38:35.56#ibcon#first serial, iclass 7, count 0 2006.229.08:38:35.56#ibcon#enter sib2, iclass 7, count 0 2006.229.08:38:35.56#ibcon#flushed, iclass 7, count 0 2006.229.08:38:35.56#ibcon#about to write, iclass 7, count 0 2006.229.08:38:35.56#ibcon#wrote, iclass 7, count 0 2006.229.08:38:35.56#ibcon#about to read 3, iclass 7, count 0 2006.229.08:38:35.58#ibcon#read 3, iclass 7, count 0 2006.229.08:38:35.58#ibcon#about to read 4, iclass 7, count 0 2006.229.08:38:35.58#ibcon#read 4, iclass 7, count 0 2006.229.08:38:35.58#ibcon#about to read 5, iclass 7, count 0 2006.229.08:38:35.58#ibcon#read 5, iclass 7, count 0 2006.229.08:38:35.58#ibcon#about to read 6, iclass 7, count 0 2006.229.08:38:35.58#ibcon#read 6, iclass 7, count 0 2006.229.08:38:35.58#ibcon#end of sib2, iclass 7, count 0 2006.229.08:38:35.58#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:38:35.58#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:38:35.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:38:35.58#ibcon#*before write, iclass 7, count 0 2006.229.08:38:35.58#ibcon#enter sib2, iclass 7, count 0 2006.229.08:38:35.58#ibcon#flushed, iclass 7, count 0 2006.229.08:38:35.58#ibcon#about to write, iclass 7, count 0 2006.229.08:38:35.58#ibcon#wrote, iclass 7, count 0 2006.229.08:38:35.58#ibcon#about to read 3, iclass 7, count 0 2006.229.08:38:35.62#ibcon#read 3, iclass 7, count 0 2006.229.08:38:35.62#ibcon#about to read 4, iclass 7, count 0 2006.229.08:38:35.62#ibcon#read 4, iclass 7, count 0 2006.229.08:38:35.62#ibcon#about to read 5, iclass 7, count 0 2006.229.08:38:35.62#ibcon#read 5, iclass 7, count 0 2006.229.08:38:35.62#ibcon#about to read 6, iclass 7, count 0 2006.229.08:38:35.62#ibcon#read 6, iclass 7, count 0 2006.229.08:38:35.62#ibcon#end of sib2, iclass 7, count 0 2006.229.08:38:35.62#ibcon#*after write, iclass 7, count 0 2006.229.08:38:35.62#ibcon#*before return 0, iclass 7, count 0 2006.229.08:38:35.62#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:35.62#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.08:38:35.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:38:35.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:38:35.62$vck44/vb=6,4 2006.229.08:38:35.62#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.08:38:35.62#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.08:38:35.62#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:35.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:35.68#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:35.68#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:35.68#ibcon#enter wrdev, iclass 11, count 2 2006.229.08:38:35.68#ibcon#first serial, iclass 11, count 2 2006.229.08:38:35.68#ibcon#enter sib2, iclass 11, count 2 2006.229.08:38:35.68#ibcon#flushed, iclass 11, count 2 2006.229.08:38:35.68#ibcon#about to write, iclass 11, count 2 2006.229.08:38:35.68#ibcon#wrote, iclass 11, count 2 2006.229.08:38:35.68#ibcon#about to read 3, iclass 11, count 2 2006.229.08:38:35.70#ibcon#read 3, iclass 11, count 2 2006.229.08:38:35.70#ibcon#about to read 4, iclass 11, count 2 2006.229.08:38:35.70#ibcon#read 4, iclass 11, count 2 2006.229.08:38:35.70#ibcon#about to read 5, iclass 11, count 2 2006.229.08:38:35.70#ibcon#read 5, iclass 11, count 2 2006.229.08:38:35.70#ibcon#about to read 6, iclass 11, count 2 2006.229.08:38:35.70#ibcon#read 6, iclass 11, count 2 2006.229.08:38:35.70#ibcon#end of sib2, iclass 11, count 2 2006.229.08:38:35.70#ibcon#*mode == 0, iclass 11, count 2 2006.229.08:38:35.70#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.08:38:35.70#ibcon#[27=AT06-04\r\n] 2006.229.08:38:35.70#ibcon#*before write, iclass 11, count 2 2006.229.08:38:35.70#ibcon#enter sib2, iclass 11, count 2 2006.229.08:38:35.70#ibcon#flushed, iclass 11, count 2 2006.229.08:38:35.70#ibcon#about to write, iclass 11, count 2 2006.229.08:38:35.70#ibcon#wrote, iclass 11, count 2 2006.229.08:38:35.70#ibcon#about to read 3, iclass 11, count 2 2006.229.08:38:35.73#ibcon#read 3, iclass 11, count 2 2006.229.08:38:35.73#ibcon#about to read 4, iclass 11, count 2 2006.229.08:38:35.73#ibcon#read 4, iclass 11, count 2 2006.229.08:38:35.73#ibcon#about to read 5, iclass 11, count 2 2006.229.08:38:35.73#ibcon#read 5, iclass 11, count 2 2006.229.08:38:35.73#ibcon#about to read 6, iclass 11, count 2 2006.229.08:38:35.73#ibcon#read 6, iclass 11, count 2 2006.229.08:38:35.73#ibcon#end of sib2, iclass 11, count 2 2006.229.08:38:35.73#ibcon#*after write, iclass 11, count 2 2006.229.08:38:35.73#ibcon#*before return 0, iclass 11, count 2 2006.229.08:38:35.73#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:35.73#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.08:38:35.73#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.08:38:35.73#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:35.73#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:35.85#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:35.85#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:35.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:38:35.85#ibcon#first serial, iclass 11, count 0 2006.229.08:38:35.85#ibcon#enter sib2, iclass 11, count 0 2006.229.08:38:35.85#ibcon#flushed, iclass 11, count 0 2006.229.08:38:35.85#ibcon#about to write, iclass 11, count 0 2006.229.08:38:35.85#ibcon#wrote, iclass 11, count 0 2006.229.08:38:35.85#ibcon#about to read 3, iclass 11, count 0 2006.229.08:38:35.87#ibcon#read 3, iclass 11, count 0 2006.229.08:38:35.87#ibcon#about to read 4, iclass 11, count 0 2006.229.08:38:35.87#ibcon#read 4, iclass 11, count 0 2006.229.08:38:35.87#ibcon#about to read 5, iclass 11, count 0 2006.229.08:38:35.87#ibcon#read 5, iclass 11, count 0 2006.229.08:38:35.87#ibcon#about to read 6, iclass 11, count 0 2006.229.08:38:35.87#ibcon#read 6, iclass 11, count 0 2006.229.08:38:35.87#ibcon#end of sib2, iclass 11, count 0 2006.229.08:38:35.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:38:35.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:38:35.87#ibcon#[27=USB\r\n] 2006.229.08:38:35.87#ibcon#*before write, iclass 11, count 0 2006.229.08:38:35.87#ibcon#enter sib2, iclass 11, count 0 2006.229.08:38:35.87#ibcon#flushed, iclass 11, count 0 2006.229.08:38:35.87#ibcon#about to write, iclass 11, count 0 2006.229.08:38:35.87#ibcon#wrote, iclass 11, count 0 2006.229.08:38:35.87#ibcon#about to read 3, iclass 11, count 0 2006.229.08:38:35.90#ibcon#read 3, iclass 11, count 0 2006.229.08:38:35.90#ibcon#about to read 4, iclass 11, count 0 2006.229.08:38:35.90#ibcon#read 4, iclass 11, count 0 2006.229.08:38:35.90#ibcon#about to read 5, iclass 11, count 0 2006.229.08:38:35.90#ibcon#read 5, iclass 11, count 0 2006.229.08:38:35.90#ibcon#about to read 6, iclass 11, count 0 2006.229.08:38:35.90#ibcon#read 6, iclass 11, count 0 2006.229.08:38:35.90#ibcon#end of sib2, iclass 11, count 0 2006.229.08:38:35.90#ibcon#*after write, iclass 11, count 0 2006.229.08:38:35.90#ibcon#*before return 0, iclass 11, count 0 2006.229.08:38:35.90#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:35.90#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.08:38:35.90#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:38:35.90#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:38:35.90$vck44/vblo=7,734.99 2006.229.08:38:35.90#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.08:38:35.90#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.08:38:35.90#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:35.90#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:35.90#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:35.90#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:35.90#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:38:35.90#ibcon#first serial, iclass 13, count 0 2006.229.08:38:35.90#ibcon#enter sib2, iclass 13, count 0 2006.229.08:38:35.90#ibcon#flushed, iclass 13, count 0 2006.229.08:38:35.90#ibcon#about to write, iclass 13, count 0 2006.229.08:38:35.90#ibcon#wrote, iclass 13, count 0 2006.229.08:38:35.90#ibcon#about to read 3, iclass 13, count 0 2006.229.08:38:35.92#ibcon#read 3, iclass 13, count 0 2006.229.08:38:35.92#ibcon#about to read 4, iclass 13, count 0 2006.229.08:38:35.92#ibcon#read 4, iclass 13, count 0 2006.229.08:38:35.92#ibcon#about to read 5, iclass 13, count 0 2006.229.08:38:35.92#ibcon#read 5, iclass 13, count 0 2006.229.08:38:35.92#ibcon#about to read 6, iclass 13, count 0 2006.229.08:38:35.92#ibcon#read 6, iclass 13, count 0 2006.229.08:38:35.92#ibcon#end of sib2, iclass 13, count 0 2006.229.08:38:35.92#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:38:35.92#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:38:35.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:38:35.92#ibcon#*before write, iclass 13, count 0 2006.229.08:38:35.92#ibcon#enter sib2, iclass 13, count 0 2006.229.08:38:35.92#ibcon#flushed, iclass 13, count 0 2006.229.08:38:35.92#ibcon#about to write, iclass 13, count 0 2006.229.08:38:35.92#ibcon#wrote, iclass 13, count 0 2006.229.08:38:35.92#ibcon#about to read 3, iclass 13, count 0 2006.229.08:38:35.96#ibcon#read 3, iclass 13, count 0 2006.229.08:38:35.96#ibcon#about to read 4, iclass 13, count 0 2006.229.08:38:35.96#ibcon#read 4, iclass 13, count 0 2006.229.08:38:35.96#ibcon#about to read 5, iclass 13, count 0 2006.229.08:38:35.96#ibcon#read 5, iclass 13, count 0 2006.229.08:38:35.96#ibcon#about to read 6, iclass 13, count 0 2006.229.08:38:35.96#ibcon#read 6, iclass 13, count 0 2006.229.08:38:35.96#ibcon#end of sib2, iclass 13, count 0 2006.229.08:38:35.96#ibcon#*after write, iclass 13, count 0 2006.229.08:38:35.96#ibcon#*before return 0, iclass 13, count 0 2006.229.08:38:35.96#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:35.96#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:38:35.96#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:38:35.96#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:38:35.96$vck44/vb=7,4 2006.229.08:38:35.96#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.08:38:35.96#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.08:38:35.96#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:35.96#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:36.02#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:36.02#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:36.02#ibcon#enter wrdev, iclass 15, count 2 2006.229.08:38:36.02#ibcon#first serial, iclass 15, count 2 2006.229.08:38:36.02#ibcon#enter sib2, iclass 15, count 2 2006.229.08:38:36.02#ibcon#flushed, iclass 15, count 2 2006.229.08:38:36.02#ibcon#about to write, iclass 15, count 2 2006.229.08:38:36.02#ibcon#wrote, iclass 15, count 2 2006.229.08:38:36.02#ibcon#about to read 3, iclass 15, count 2 2006.229.08:38:36.04#ibcon#read 3, iclass 15, count 2 2006.229.08:38:36.04#ibcon#about to read 4, iclass 15, count 2 2006.229.08:38:36.04#ibcon#read 4, iclass 15, count 2 2006.229.08:38:36.04#ibcon#about to read 5, iclass 15, count 2 2006.229.08:38:36.04#ibcon#read 5, iclass 15, count 2 2006.229.08:38:36.04#ibcon#about to read 6, iclass 15, count 2 2006.229.08:38:36.04#ibcon#read 6, iclass 15, count 2 2006.229.08:38:36.04#ibcon#end of sib2, iclass 15, count 2 2006.229.08:38:36.04#ibcon#*mode == 0, iclass 15, count 2 2006.229.08:38:36.04#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.08:38:36.04#ibcon#[27=AT07-04\r\n] 2006.229.08:38:36.04#ibcon#*before write, iclass 15, count 2 2006.229.08:38:36.04#ibcon#enter sib2, iclass 15, count 2 2006.229.08:38:36.04#ibcon#flushed, iclass 15, count 2 2006.229.08:38:36.04#ibcon#about to write, iclass 15, count 2 2006.229.08:38:36.04#ibcon#wrote, iclass 15, count 2 2006.229.08:38:36.04#ibcon#about to read 3, iclass 15, count 2 2006.229.08:38:36.07#ibcon#read 3, iclass 15, count 2 2006.229.08:38:36.07#ibcon#about to read 4, iclass 15, count 2 2006.229.08:38:36.07#ibcon#read 4, iclass 15, count 2 2006.229.08:38:36.07#ibcon#about to read 5, iclass 15, count 2 2006.229.08:38:36.07#ibcon#read 5, iclass 15, count 2 2006.229.08:38:36.07#ibcon#about to read 6, iclass 15, count 2 2006.229.08:38:36.07#ibcon#read 6, iclass 15, count 2 2006.229.08:38:36.07#ibcon#end of sib2, iclass 15, count 2 2006.229.08:38:36.07#ibcon#*after write, iclass 15, count 2 2006.229.08:38:36.07#ibcon#*before return 0, iclass 15, count 2 2006.229.08:38:36.07#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:36.07#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.08:38:36.07#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.08:38:36.07#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:36.07#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:36.19#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:36.19#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:36.19#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:38:36.19#ibcon#first serial, iclass 15, count 0 2006.229.08:38:36.19#ibcon#enter sib2, iclass 15, count 0 2006.229.08:38:36.19#ibcon#flushed, iclass 15, count 0 2006.229.08:38:36.19#ibcon#about to write, iclass 15, count 0 2006.229.08:38:36.19#ibcon#wrote, iclass 15, count 0 2006.229.08:38:36.19#ibcon#about to read 3, iclass 15, count 0 2006.229.08:38:36.21#ibcon#read 3, iclass 15, count 0 2006.229.08:38:36.21#ibcon#about to read 4, iclass 15, count 0 2006.229.08:38:36.21#ibcon#read 4, iclass 15, count 0 2006.229.08:38:36.21#ibcon#about to read 5, iclass 15, count 0 2006.229.08:38:36.21#ibcon#read 5, iclass 15, count 0 2006.229.08:38:36.21#ibcon#about to read 6, iclass 15, count 0 2006.229.08:38:36.21#ibcon#read 6, iclass 15, count 0 2006.229.08:38:36.21#ibcon#end of sib2, iclass 15, count 0 2006.229.08:38:36.21#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:38:36.21#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:38:36.21#ibcon#[27=USB\r\n] 2006.229.08:38:36.21#ibcon#*before write, iclass 15, count 0 2006.229.08:38:36.21#ibcon#enter sib2, iclass 15, count 0 2006.229.08:38:36.21#ibcon#flushed, iclass 15, count 0 2006.229.08:38:36.21#ibcon#about to write, iclass 15, count 0 2006.229.08:38:36.21#ibcon#wrote, iclass 15, count 0 2006.229.08:38:36.21#ibcon#about to read 3, iclass 15, count 0 2006.229.08:38:36.24#ibcon#read 3, iclass 15, count 0 2006.229.08:38:36.24#ibcon#about to read 4, iclass 15, count 0 2006.229.08:38:36.24#ibcon#read 4, iclass 15, count 0 2006.229.08:38:36.24#ibcon#about to read 5, iclass 15, count 0 2006.229.08:38:36.24#ibcon#read 5, iclass 15, count 0 2006.229.08:38:36.24#ibcon#about to read 6, iclass 15, count 0 2006.229.08:38:36.24#ibcon#read 6, iclass 15, count 0 2006.229.08:38:36.24#ibcon#end of sib2, iclass 15, count 0 2006.229.08:38:36.24#ibcon#*after write, iclass 15, count 0 2006.229.08:38:36.24#ibcon#*before return 0, iclass 15, count 0 2006.229.08:38:36.24#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:36.24#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.08:38:36.24#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:38:36.24#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:38:36.24$vck44/vblo=8,744.99 2006.229.08:38:36.24#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.08:38:36.24#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.08:38:36.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:38:36.24#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:36.24#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:36.24#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:36.24#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:38:36.24#ibcon#first serial, iclass 17, count 0 2006.229.08:38:36.24#ibcon#enter sib2, iclass 17, count 0 2006.229.08:38:36.24#ibcon#flushed, iclass 17, count 0 2006.229.08:38:36.24#ibcon#about to write, iclass 17, count 0 2006.229.08:38:36.24#ibcon#wrote, iclass 17, count 0 2006.229.08:38:36.24#ibcon#about to read 3, iclass 17, count 0 2006.229.08:38:36.26#ibcon#read 3, iclass 17, count 0 2006.229.08:38:36.26#ibcon#about to read 4, iclass 17, count 0 2006.229.08:38:36.26#ibcon#read 4, iclass 17, count 0 2006.229.08:38:36.26#ibcon#about to read 5, iclass 17, count 0 2006.229.08:38:36.26#ibcon#read 5, iclass 17, count 0 2006.229.08:38:36.26#ibcon#about to read 6, iclass 17, count 0 2006.229.08:38:36.26#ibcon#read 6, iclass 17, count 0 2006.229.08:38:36.26#ibcon#end of sib2, iclass 17, count 0 2006.229.08:38:36.26#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:38:36.26#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:38:36.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:38:36.26#ibcon#*before write, iclass 17, count 0 2006.229.08:38:36.26#ibcon#enter sib2, iclass 17, count 0 2006.229.08:38:36.26#ibcon#flushed, iclass 17, count 0 2006.229.08:38:36.26#ibcon#about to write, iclass 17, count 0 2006.229.08:38:36.26#ibcon#wrote, iclass 17, count 0 2006.229.08:38:36.26#ibcon#about to read 3, iclass 17, count 0 2006.229.08:38:36.30#ibcon#read 3, iclass 17, count 0 2006.229.08:38:36.30#ibcon#about to read 4, iclass 17, count 0 2006.229.08:38:36.30#ibcon#read 4, iclass 17, count 0 2006.229.08:38:36.30#ibcon#about to read 5, iclass 17, count 0 2006.229.08:38:36.30#ibcon#read 5, iclass 17, count 0 2006.229.08:38:36.30#ibcon#about to read 6, iclass 17, count 0 2006.229.08:38:36.30#ibcon#read 6, iclass 17, count 0 2006.229.08:38:36.30#ibcon#end of sib2, iclass 17, count 0 2006.229.08:38:36.30#ibcon#*after write, iclass 17, count 0 2006.229.08:38:36.30#ibcon#*before return 0, iclass 17, count 0 2006.229.08:38:36.30#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:36.30#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.08:38:36.30#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:38:36.30#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:38:36.30$vck44/vb=8,4 2006.229.08:38:36.30#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.08:38:36.30#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.08:38:36.30#ibcon#ireg 11 cls_cnt 2 2006.229.08:38:36.30#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:36.36#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:36.36#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:36.36#ibcon#enter wrdev, iclass 19, count 2 2006.229.08:38:36.36#ibcon#first serial, iclass 19, count 2 2006.229.08:38:36.36#ibcon#enter sib2, iclass 19, count 2 2006.229.08:38:36.36#ibcon#flushed, iclass 19, count 2 2006.229.08:38:36.36#ibcon#about to write, iclass 19, count 2 2006.229.08:38:36.36#ibcon#wrote, iclass 19, count 2 2006.229.08:38:36.36#ibcon#about to read 3, iclass 19, count 2 2006.229.08:38:36.38#ibcon#read 3, iclass 19, count 2 2006.229.08:38:36.38#ibcon#about to read 4, iclass 19, count 2 2006.229.08:38:36.38#ibcon#read 4, iclass 19, count 2 2006.229.08:38:36.38#ibcon#about to read 5, iclass 19, count 2 2006.229.08:38:36.38#ibcon#read 5, iclass 19, count 2 2006.229.08:38:36.38#ibcon#about to read 6, iclass 19, count 2 2006.229.08:38:36.38#ibcon#read 6, iclass 19, count 2 2006.229.08:38:36.38#ibcon#end of sib2, iclass 19, count 2 2006.229.08:38:36.38#ibcon#*mode == 0, iclass 19, count 2 2006.229.08:38:36.38#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.08:38:36.38#ibcon#[27=AT08-04\r\n] 2006.229.08:38:36.38#ibcon#*before write, iclass 19, count 2 2006.229.08:38:36.38#ibcon#enter sib2, iclass 19, count 2 2006.229.08:38:36.38#ibcon#flushed, iclass 19, count 2 2006.229.08:38:36.38#ibcon#about to write, iclass 19, count 2 2006.229.08:38:36.38#ibcon#wrote, iclass 19, count 2 2006.229.08:38:36.38#ibcon#about to read 3, iclass 19, count 2 2006.229.08:38:36.41#ibcon#read 3, iclass 19, count 2 2006.229.08:38:36.41#ibcon#about to read 4, iclass 19, count 2 2006.229.08:38:36.41#ibcon#read 4, iclass 19, count 2 2006.229.08:38:36.41#ibcon#about to read 5, iclass 19, count 2 2006.229.08:38:36.41#ibcon#read 5, iclass 19, count 2 2006.229.08:38:36.41#ibcon#about to read 6, iclass 19, count 2 2006.229.08:38:36.41#ibcon#read 6, iclass 19, count 2 2006.229.08:38:36.41#ibcon#end of sib2, iclass 19, count 2 2006.229.08:38:36.41#ibcon#*after write, iclass 19, count 2 2006.229.08:38:36.41#ibcon#*before return 0, iclass 19, count 2 2006.229.08:38:36.41#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:36.41#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.08:38:36.41#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.08:38:36.41#ibcon#ireg 7 cls_cnt 0 2006.229.08:38:36.41#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:36.53#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:36.53#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:36.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:38:36.53#ibcon#first serial, iclass 19, count 0 2006.229.08:38:36.53#ibcon#enter sib2, iclass 19, count 0 2006.229.08:38:36.53#ibcon#flushed, iclass 19, count 0 2006.229.08:38:36.53#ibcon#about to write, iclass 19, count 0 2006.229.08:38:36.53#ibcon#wrote, iclass 19, count 0 2006.229.08:38:36.53#ibcon#about to read 3, iclass 19, count 0 2006.229.08:38:36.55#ibcon#read 3, iclass 19, count 0 2006.229.08:38:36.55#ibcon#about to read 4, iclass 19, count 0 2006.229.08:38:36.55#ibcon#read 4, iclass 19, count 0 2006.229.08:38:36.55#ibcon#about to read 5, iclass 19, count 0 2006.229.08:38:36.55#ibcon#read 5, iclass 19, count 0 2006.229.08:38:36.55#ibcon#about to read 6, iclass 19, count 0 2006.229.08:38:36.55#ibcon#read 6, iclass 19, count 0 2006.229.08:38:36.55#ibcon#end of sib2, iclass 19, count 0 2006.229.08:38:36.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:38:36.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:38:36.55#ibcon#[27=USB\r\n] 2006.229.08:38:36.55#ibcon#*before write, iclass 19, count 0 2006.229.08:38:36.55#ibcon#enter sib2, iclass 19, count 0 2006.229.08:38:36.55#ibcon#flushed, iclass 19, count 0 2006.229.08:38:36.55#ibcon#about to write, iclass 19, count 0 2006.229.08:38:36.55#ibcon#wrote, iclass 19, count 0 2006.229.08:38:36.55#ibcon#about to read 3, iclass 19, count 0 2006.229.08:38:36.58#ibcon#read 3, iclass 19, count 0 2006.229.08:38:36.58#ibcon#about to read 4, iclass 19, count 0 2006.229.08:38:36.58#ibcon#read 4, iclass 19, count 0 2006.229.08:38:36.58#ibcon#about to read 5, iclass 19, count 0 2006.229.08:38:36.58#ibcon#read 5, iclass 19, count 0 2006.229.08:38:36.58#ibcon#about to read 6, iclass 19, count 0 2006.229.08:38:36.58#ibcon#read 6, iclass 19, count 0 2006.229.08:38:36.58#ibcon#end of sib2, iclass 19, count 0 2006.229.08:38:36.58#ibcon#*after write, iclass 19, count 0 2006.229.08:38:36.58#ibcon#*before return 0, iclass 19, count 0 2006.229.08:38:36.58#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:36.58#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.08:38:36.58#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:38:36.58#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:38:36.58$vck44/vabw=wide 2006.229.08:38:36.58#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.08:38:36.58#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.08:38:36.58#ibcon#ireg 8 cls_cnt 0 2006.229.08:38:36.58#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:36.58#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:36.58#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:36.58#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:38:36.58#ibcon#first serial, iclass 21, count 0 2006.229.08:38:36.58#ibcon#enter sib2, iclass 21, count 0 2006.229.08:38:36.58#ibcon#flushed, iclass 21, count 0 2006.229.08:38:36.58#ibcon#about to write, iclass 21, count 0 2006.229.08:38:36.58#ibcon#wrote, iclass 21, count 0 2006.229.08:38:36.58#ibcon#about to read 3, iclass 21, count 0 2006.229.08:38:36.60#ibcon#read 3, iclass 21, count 0 2006.229.08:38:36.60#ibcon#about to read 4, iclass 21, count 0 2006.229.08:38:36.60#ibcon#read 4, iclass 21, count 0 2006.229.08:38:36.60#ibcon#about to read 5, iclass 21, count 0 2006.229.08:38:36.60#ibcon#read 5, iclass 21, count 0 2006.229.08:38:36.60#ibcon#about to read 6, iclass 21, count 0 2006.229.08:38:36.60#ibcon#read 6, iclass 21, count 0 2006.229.08:38:36.60#ibcon#end of sib2, iclass 21, count 0 2006.229.08:38:36.60#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:38:36.60#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:38:36.60#ibcon#[25=BW32\r\n] 2006.229.08:38:36.60#ibcon#*before write, iclass 21, count 0 2006.229.08:38:36.60#ibcon#enter sib2, iclass 21, count 0 2006.229.08:38:36.60#ibcon#flushed, iclass 21, count 0 2006.229.08:38:36.60#ibcon#about to write, iclass 21, count 0 2006.229.08:38:36.60#ibcon#wrote, iclass 21, count 0 2006.229.08:38:36.60#ibcon#about to read 3, iclass 21, count 0 2006.229.08:38:36.63#ibcon#read 3, iclass 21, count 0 2006.229.08:38:36.63#ibcon#about to read 4, iclass 21, count 0 2006.229.08:38:36.63#ibcon#read 4, iclass 21, count 0 2006.229.08:38:36.63#ibcon#about to read 5, iclass 21, count 0 2006.229.08:38:36.63#ibcon#read 5, iclass 21, count 0 2006.229.08:38:36.63#ibcon#about to read 6, iclass 21, count 0 2006.229.08:38:36.63#ibcon#read 6, iclass 21, count 0 2006.229.08:38:36.63#ibcon#end of sib2, iclass 21, count 0 2006.229.08:38:36.63#ibcon#*after write, iclass 21, count 0 2006.229.08:38:36.63#ibcon#*before return 0, iclass 21, count 0 2006.229.08:38:36.63#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:36.63#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.08:38:36.63#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:38:36.63#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:38:36.63$vck44/vbbw=wide 2006.229.08:38:36.63#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.08:38:36.63#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.08:38:36.63#ibcon#ireg 8 cls_cnt 0 2006.229.08:38:36.63#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:38:36.70#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:38:36.70#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:38:36.70#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:38:36.70#ibcon#first serial, iclass 23, count 0 2006.229.08:38:36.70#ibcon#enter sib2, iclass 23, count 0 2006.229.08:38:36.70#ibcon#flushed, iclass 23, count 0 2006.229.08:38:36.70#ibcon#about to write, iclass 23, count 0 2006.229.08:38:36.70#ibcon#wrote, iclass 23, count 0 2006.229.08:38:36.70#ibcon#about to read 3, iclass 23, count 0 2006.229.08:38:36.72#ibcon#read 3, iclass 23, count 0 2006.229.08:38:36.72#ibcon#about to read 4, iclass 23, count 0 2006.229.08:38:36.72#ibcon#read 4, iclass 23, count 0 2006.229.08:38:36.72#ibcon#about to read 5, iclass 23, count 0 2006.229.08:38:36.72#ibcon#read 5, iclass 23, count 0 2006.229.08:38:36.72#ibcon#about to read 6, iclass 23, count 0 2006.229.08:38:36.72#ibcon#read 6, iclass 23, count 0 2006.229.08:38:36.72#ibcon#end of sib2, iclass 23, count 0 2006.229.08:38:36.72#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:38:36.72#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:38:36.72#ibcon#[27=BW32\r\n] 2006.229.08:38:36.72#ibcon#*before write, iclass 23, count 0 2006.229.08:38:36.72#ibcon#enter sib2, iclass 23, count 0 2006.229.08:38:36.72#ibcon#flushed, iclass 23, count 0 2006.229.08:38:36.72#ibcon#about to write, iclass 23, count 0 2006.229.08:38:36.72#ibcon#wrote, iclass 23, count 0 2006.229.08:38:36.72#ibcon#about to read 3, iclass 23, count 0 2006.229.08:38:36.75#ibcon#read 3, iclass 23, count 0 2006.229.08:38:36.75#ibcon#about to read 4, iclass 23, count 0 2006.229.08:38:36.75#ibcon#read 4, iclass 23, count 0 2006.229.08:38:36.75#ibcon#about to read 5, iclass 23, count 0 2006.229.08:38:36.75#ibcon#read 5, iclass 23, count 0 2006.229.08:38:36.75#ibcon#about to read 6, iclass 23, count 0 2006.229.08:38:36.75#ibcon#read 6, iclass 23, count 0 2006.229.08:38:36.75#ibcon#end of sib2, iclass 23, count 0 2006.229.08:38:36.75#ibcon#*after write, iclass 23, count 0 2006.229.08:38:36.75#ibcon#*before return 0, iclass 23, count 0 2006.229.08:38:36.75#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:38:36.75#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:38:36.75#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:38:36.75#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:38:36.75$setupk4/ifdk4 2006.229.08:38:36.75$ifdk4/lo= 2006.229.08:38:36.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:38:36.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:38:36.75$ifdk4/patch= 2006.229.08:38:36.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:38:36.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:38:36.75$setupk4/!*+20s 2006.229.08:38:38.75#abcon#<5=/05 2.0 3.3 29.39 951000.5\r\n> 2006.229.08:38:38.77#abcon#{5=INTERFACE CLEAR} 2006.229.08:38:38.83#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:38:48.92#abcon#<5=/05 2.0 3.3 29.39 951000.5\r\n> 2006.229.08:38:48.94#abcon#{5=INTERFACE CLEAR} 2006.229.08:38:49.00#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:38:51.26$setupk4/"tpicd 2006.229.08:38:51.26$setupk4/echo=off 2006.229.08:38:51.26$setupk4/xlog=off 2006.229.08:38:51.26:!2006.229.08:39:24 2006.229.08:39:06.13#trakl#Source acquired 2006.229.08:39:08.13#flagr#flagr/antenna,acquired 2006.229.08:39:24.00:preob 2006.229.08:39:24.13/onsource/TRACKING 2006.229.08:39:24.13:!2006.229.08:39:34 2006.229.08:39:34.00:"tape 2006.229.08:39:34.00:"st=record 2006.229.08:39:34.00:data_valid=on 2006.229.08:39:34.00:midob 2006.229.08:39:35.13/onsource/TRACKING 2006.229.08:39:35.13/wx/29.39,1000.5,95 2006.229.08:39:35.26/cable/+6.3998E-03 2006.229.08:39:36.35/va/01,08,usb,yes,29,32 2006.229.08:39:36.35/va/02,07,usb,yes,32,32 2006.229.08:39:36.35/va/03,06,usb,yes,39,42 2006.229.08:39:36.35/va/04,07,usb,yes,33,34 2006.229.08:39:36.35/va/05,04,usb,yes,29,30 2006.229.08:39:36.35/va/06,04,usb,yes,33,32 2006.229.08:39:36.35/va/07,05,usb,yes,29,30 2006.229.08:39:36.35/va/08,06,usb,yes,21,26 2006.229.08:39:36.58/valo/01,524.99,yes,locked 2006.229.08:39:36.58/valo/02,534.99,yes,locked 2006.229.08:39:36.58/valo/03,564.99,yes,locked 2006.229.08:39:36.58/valo/04,624.99,yes,locked 2006.229.08:39:36.58/valo/05,734.99,yes,locked 2006.229.08:39:36.58/valo/06,814.99,yes,locked 2006.229.08:39:36.58/valo/07,864.99,yes,locked 2006.229.08:39:36.58/valo/08,884.99,yes,locked 2006.229.08:39:37.67/vb/01,04,usb,yes,31,29 2006.229.08:39:37.67/vb/02,04,usb,yes,33,33 2006.229.08:39:37.67/vb/03,04,usb,yes,30,33 2006.229.08:39:37.67/vb/04,04,usb,yes,35,33 2006.229.08:39:37.67/vb/05,04,usb,yes,27,29 2006.229.08:39:37.67/vb/06,04,usb,yes,31,27 2006.229.08:39:37.67/vb/07,04,usb,yes,31,31 2006.229.08:39:37.67/vb/08,04,usb,yes,29,32 2006.229.08:39:37.91/vblo/01,629.99,yes,locked 2006.229.08:39:37.91/vblo/02,634.99,yes,locked 2006.229.08:39:37.91/vblo/03,649.99,yes,locked 2006.229.08:39:37.91/vblo/04,679.99,yes,locked 2006.229.08:39:37.91/vblo/05,709.99,yes,locked 2006.229.08:39:37.91/vblo/06,719.99,yes,locked 2006.229.08:39:37.91/vblo/07,734.99,yes,locked 2006.229.08:39:37.91/vblo/08,744.99,yes,locked 2006.229.08:39:38.06/vabw/8 2006.229.08:39:38.21/vbbw/8 2006.229.08:39:38.30/xfe/off,on,13.0 2006.229.08:39:38.68/ifatt/23,28,28,28 2006.229.08:39:39.08/fmout-gps/S +4.57E-07 2006.229.08:39:39.12:!2006.229.08:43:24 2006.229.08:43:24.01:data_valid=off 2006.229.08:43:24.02:"et 2006.229.08:43:24.02:!+3s 2006.229.08:43:27.04:"tape 2006.229.08:43:27.04:postob 2006.229.08:43:27.22/cable/+6.3989E-03 2006.229.08:43:27.22/wx/29.35,1000.5,95 2006.229.08:43:27.28/fmout-gps/S +4.59E-07 2006.229.08:43:27.28:scan_name=229-0847,jd0608,120 2006.229.08:43:27.29:source=3c274,123049.42,122328.0,2000.0,ccw 2006.229.08:43:28.14#flagr#flagr/antenna,new-source 2006.229.08:43:28.15:checkk5 2006.229.08:43:28.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:43:28.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:43:29.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:43:29.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:43:30.10/chk_obsdata//k5ts1/T2290839??a.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.08:43:30.52/chk_obsdata//k5ts2/T2290839??b.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.08:43:30.91/chk_obsdata//k5ts3/T2290839??c.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.08:43:31.29/chk_obsdata//k5ts4/T2290839??d.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.08:43:32.03/k5log//k5ts1_log_newline 2006.229.08:43:32.73/k5log//k5ts2_log_newline 2006.229.08:43:33.44/k5log//k5ts3_log_newline 2006.229.08:43:34.16/k5log//k5ts4_log_newline 2006.229.08:43:34.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:43:34.18:setupk4=1 2006.229.08:43:34.18$setupk4/echo=on 2006.229.08:43:34.18$setupk4/pcalon 2006.229.08:43:34.18$pcalon/"no phase cal control is implemented here 2006.229.08:43:34.18$setupk4/"tpicd=stop 2006.229.08:43:34.18$setupk4/"rec=synch_on 2006.229.08:43:34.18$setupk4/"rec_mode=128 2006.229.08:43:34.18$setupk4/!* 2006.229.08:43:34.18$setupk4/recpk4 2006.229.08:43:34.18$recpk4/recpatch= 2006.229.08:43:34.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:43:34.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:43:34.19$setupk4/vck44 2006.229.08:43:34.19$vck44/valo=1,524.99 2006.229.08:43:34.19#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.08:43:34.19#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.08:43:34.19#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:34.19#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:34.19#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:34.19#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:34.19#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:43:34.19#ibcon#first serial, iclass 40, count 0 2006.229.08:43:34.19#ibcon#enter sib2, iclass 40, count 0 2006.229.08:43:34.19#ibcon#flushed, iclass 40, count 0 2006.229.08:43:34.19#ibcon#about to write, iclass 40, count 0 2006.229.08:43:34.19#ibcon#wrote, iclass 40, count 0 2006.229.08:43:34.19#ibcon#about to read 3, iclass 40, count 0 2006.229.08:43:34.20#ibcon#read 3, iclass 40, count 0 2006.229.08:43:34.20#ibcon#about to read 4, iclass 40, count 0 2006.229.08:43:34.20#ibcon#read 4, iclass 40, count 0 2006.229.08:43:34.20#ibcon#about to read 5, iclass 40, count 0 2006.229.08:43:34.20#ibcon#read 5, iclass 40, count 0 2006.229.08:43:34.20#ibcon#about to read 6, iclass 40, count 0 2006.229.08:43:34.20#ibcon#read 6, iclass 40, count 0 2006.229.08:43:34.20#ibcon#end of sib2, iclass 40, count 0 2006.229.08:43:34.20#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:43:34.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:43:34.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:43:34.20#ibcon#*before write, iclass 40, count 0 2006.229.08:43:34.20#ibcon#enter sib2, iclass 40, count 0 2006.229.08:43:34.20#ibcon#flushed, iclass 40, count 0 2006.229.08:43:34.20#ibcon#about to write, iclass 40, count 0 2006.229.08:43:34.20#ibcon#wrote, iclass 40, count 0 2006.229.08:43:34.20#ibcon#about to read 3, iclass 40, count 0 2006.229.08:43:34.25#ibcon#read 3, iclass 40, count 0 2006.229.08:43:34.25#ibcon#about to read 4, iclass 40, count 0 2006.229.08:43:34.25#ibcon#read 4, iclass 40, count 0 2006.229.08:43:34.25#ibcon#about to read 5, iclass 40, count 0 2006.229.08:43:34.25#ibcon#read 5, iclass 40, count 0 2006.229.08:43:34.25#ibcon#about to read 6, iclass 40, count 0 2006.229.08:43:34.25#ibcon#read 6, iclass 40, count 0 2006.229.08:43:34.25#ibcon#end of sib2, iclass 40, count 0 2006.229.08:43:34.25#ibcon#*after write, iclass 40, count 0 2006.229.08:43:34.25#ibcon#*before return 0, iclass 40, count 0 2006.229.08:43:34.25#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:34.25#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:34.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:43:34.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:43:34.25$vck44/va=1,8 2006.229.08:43:34.25#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.08:43:34.25#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.08:43:34.25#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:34.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:34.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:34.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:34.25#ibcon#enter wrdev, iclass 4, count 2 2006.229.08:43:34.25#ibcon#first serial, iclass 4, count 2 2006.229.08:43:34.25#ibcon#enter sib2, iclass 4, count 2 2006.229.08:43:34.25#ibcon#flushed, iclass 4, count 2 2006.229.08:43:34.25#ibcon#about to write, iclass 4, count 2 2006.229.08:43:34.25#ibcon#wrote, iclass 4, count 2 2006.229.08:43:34.25#ibcon#about to read 3, iclass 4, count 2 2006.229.08:43:34.27#ibcon#read 3, iclass 4, count 2 2006.229.08:43:34.27#ibcon#about to read 4, iclass 4, count 2 2006.229.08:43:34.27#ibcon#read 4, iclass 4, count 2 2006.229.08:43:34.27#ibcon#about to read 5, iclass 4, count 2 2006.229.08:43:34.27#ibcon#read 5, iclass 4, count 2 2006.229.08:43:34.27#ibcon#about to read 6, iclass 4, count 2 2006.229.08:43:34.27#ibcon#read 6, iclass 4, count 2 2006.229.08:43:34.27#ibcon#end of sib2, iclass 4, count 2 2006.229.08:43:34.27#ibcon#*mode == 0, iclass 4, count 2 2006.229.08:43:34.27#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.08:43:34.27#ibcon#[25=AT01-08\r\n] 2006.229.08:43:34.27#ibcon#*before write, iclass 4, count 2 2006.229.08:43:34.27#ibcon#enter sib2, iclass 4, count 2 2006.229.08:43:34.27#ibcon#flushed, iclass 4, count 2 2006.229.08:43:34.27#ibcon#about to write, iclass 4, count 2 2006.229.08:43:34.27#ibcon#wrote, iclass 4, count 2 2006.229.08:43:34.27#ibcon#about to read 3, iclass 4, count 2 2006.229.08:43:34.30#ibcon#read 3, iclass 4, count 2 2006.229.08:43:34.30#ibcon#about to read 4, iclass 4, count 2 2006.229.08:43:34.30#ibcon#read 4, iclass 4, count 2 2006.229.08:43:34.30#ibcon#about to read 5, iclass 4, count 2 2006.229.08:43:34.30#ibcon#read 5, iclass 4, count 2 2006.229.08:43:34.30#ibcon#about to read 6, iclass 4, count 2 2006.229.08:43:34.30#ibcon#read 6, iclass 4, count 2 2006.229.08:43:34.30#ibcon#end of sib2, iclass 4, count 2 2006.229.08:43:34.30#ibcon#*after write, iclass 4, count 2 2006.229.08:43:34.30#ibcon#*before return 0, iclass 4, count 2 2006.229.08:43:34.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:34.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:34.30#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.08:43:34.30#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:34.30#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:34.42#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:34.42#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:34.42#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:43:34.42#ibcon#first serial, iclass 4, count 0 2006.229.08:43:34.42#ibcon#enter sib2, iclass 4, count 0 2006.229.08:43:34.42#ibcon#flushed, iclass 4, count 0 2006.229.08:43:34.42#ibcon#about to write, iclass 4, count 0 2006.229.08:43:34.42#ibcon#wrote, iclass 4, count 0 2006.229.08:43:34.42#ibcon#about to read 3, iclass 4, count 0 2006.229.08:43:34.44#ibcon#read 3, iclass 4, count 0 2006.229.08:43:34.44#ibcon#about to read 4, iclass 4, count 0 2006.229.08:43:34.44#ibcon#read 4, iclass 4, count 0 2006.229.08:43:34.44#ibcon#about to read 5, iclass 4, count 0 2006.229.08:43:34.44#ibcon#read 5, iclass 4, count 0 2006.229.08:43:34.44#ibcon#about to read 6, iclass 4, count 0 2006.229.08:43:34.44#ibcon#read 6, iclass 4, count 0 2006.229.08:43:34.44#ibcon#end of sib2, iclass 4, count 0 2006.229.08:43:34.44#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:43:34.44#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:43:34.44#ibcon#[25=USB\r\n] 2006.229.08:43:34.44#ibcon#*before write, iclass 4, count 0 2006.229.08:43:34.44#ibcon#enter sib2, iclass 4, count 0 2006.229.08:43:34.44#ibcon#flushed, iclass 4, count 0 2006.229.08:43:34.44#ibcon#about to write, iclass 4, count 0 2006.229.08:43:34.44#ibcon#wrote, iclass 4, count 0 2006.229.08:43:34.44#ibcon#about to read 3, iclass 4, count 0 2006.229.08:43:34.47#ibcon#read 3, iclass 4, count 0 2006.229.08:43:34.47#ibcon#about to read 4, iclass 4, count 0 2006.229.08:43:34.47#ibcon#read 4, iclass 4, count 0 2006.229.08:43:34.47#ibcon#about to read 5, iclass 4, count 0 2006.229.08:43:34.47#ibcon#read 5, iclass 4, count 0 2006.229.08:43:34.47#ibcon#about to read 6, iclass 4, count 0 2006.229.08:43:34.47#ibcon#read 6, iclass 4, count 0 2006.229.08:43:34.47#ibcon#end of sib2, iclass 4, count 0 2006.229.08:43:34.47#ibcon#*after write, iclass 4, count 0 2006.229.08:43:34.47#ibcon#*before return 0, iclass 4, count 0 2006.229.08:43:34.47#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:34.47#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:34.47#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:43:34.47#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:43:34.47$vck44/valo=2,534.99 2006.229.08:43:34.47#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.08:43:34.47#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.08:43:34.47#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:34.47#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:34.47#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:34.47#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:34.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:43:34.47#ibcon#first serial, iclass 6, count 0 2006.229.08:43:34.47#ibcon#enter sib2, iclass 6, count 0 2006.229.08:43:34.47#ibcon#flushed, iclass 6, count 0 2006.229.08:43:34.47#ibcon#about to write, iclass 6, count 0 2006.229.08:43:34.47#ibcon#wrote, iclass 6, count 0 2006.229.08:43:34.47#ibcon#about to read 3, iclass 6, count 0 2006.229.08:43:34.49#ibcon#read 3, iclass 6, count 0 2006.229.08:43:34.49#ibcon#about to read 4, iclass 6, count 0 2006.229.08:43:34.49#ibcon#read 4, iclass 6, count 0 2006.229.08:43:34.49#ibcon#about to read 5, iclass 6, count 0 2006.229.08:43:34.49#ibcon#read 5, iclass 6, count 0 2006.229.08:43:34.49#ibcon#about to read 6, iclass 6, count 0 2006.229.08:43:34.49#ibcon#read 6, iclass 6, count 0 2006.229.08:43:34.49#ibcon#end of sib2, iclass 6, count 0 2006.229.08:43:34.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:43:34.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:43:34.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:43:34.49#ibcon#*before write, iclass 6, count 0 2006.229.08:43:34.49#ibcon#enter sib2, iclass 6, count 0 2006.229.08:43:34.49#ibcon#flushed, iclass 6, count 0 2006.229.08:43:34.49#ibcon#about to write, iclass 6, count 0 2006.229.08:43:34.49#ibcon#wrote, iclass 6, count 0 2006.229.08:43:34.49#ibcon#about to read 3, iclass 6, count 0 2006.229.08:43:34.53#ibcon#read 3, iclass 6, count 0 2006.229.08:43:34.53#ibcon#about to read 4, iclass 6, count 0 2006.229.08:43:34.53#ibcon#read 4, iclass 6, count 0 2006.229.08:43:34.53#ibcon#about to read 5, iclass 6, count 0 2006.229.08:43:34.53#ibcon#read 5, iclass 6, count 0 2006.229.08:43:34.53#ibcon#about to read 6, iclass 6, count 0 2006.229.08:43:34.53#ibcon#read 6, iclass 6, count 0 2006.229.08:43:34.53#ibcon#end of sib2, iclass 6, count 0 2006.229.08:43:34.53#ibcon#*after write, iclass 6, count 0 2006.229.08:43:34.53#ibcon#*before return 0, iclass 6, count 0 2006.229.08:43:34.53#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:34.53#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:34.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:43:34.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:43:34.53$vck44/va=2,7 2006.229.08:43:34.53#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.08:43:34.53#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.08:43:34.53#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:34.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:34.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:34.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:34.59#ibcon#enter wrdev, iclass 10, count 2 2006.229.08:43:34.59#ibcon#first serial, iclass 10, count 2 2006.229.08:43:34.59#ibcon#enter sib2, iclass 10, count 2 2006.229.08:43:34.59#ibcon#flushed, iclass 10, count 2 2006.229.08:43:34.59#ibcon#about to write, iclass 10, count 2 2006.229.08:43:34.59#ibcon#wrote, iclass 10, count 2 2006.229.08:43:34.59#ibcon#about to read 3, iclass 10, count 2 2006.229.08:43:34.61#ibcon#read 3, iclass 10, count 2 2006.229.08:43:34.61#ibcon#about to read 4, iclass 10, count 2 2006.229.08:43:34.61#ibcon#read 4, iclass 10, count 2 2006.229.08:43:34.61#ibcon#about to read 5, iclass 10, count 2 2006.229.08:43:34.61#ibcon#read 5, iclass 10, count 2 2006.229.08:43:34.61#ibcon#about to read 6, iclass 10, count 2 2006.229.08:43:34.61#ibcon#read 6, iclass 10, count 2 2006.229.08:43:34.61#ibcon#end of sib2, iclass 10, count 2 2006.229.08:43:34.61#ibcon#*mode == 0, iclass 10, count 2 2006.229.08:43:34.61#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.08:43:34.61#ibcon#[25=AT02-07\r\n] 2006.229.08:43:34.61#ibcon#*before write, iclass 10, count 2 2006.229.08:43:34.61#ibcon#enter sib2, iclass 10, count 2 2006.229.08:43:34.61#ibcon#flushed, iclass 10, count 2 2006.229.08:43:34.61#ibcon#about to write, iclass 10, count 2 2006.229.08:43:34.61#ibcon#wrote, iclass 10, count 2 2006.229.08:43:34.61#ibcon#about to read 3, iclass 10, count 2 2006.229.08:43:34.64#ibcon#read 3, iclass 10, count 2 2006.229.08:43:34.64#ibcon#about to read 4, iclass 10, count 2 2006.229.08:43:34.64#ibcon#read 4, iclass 10, count 2 2006.229.08:43:34.64#ibcon#about to read 5, iclass 10, count 2 2006.229.08:43:34.64#ibcon#read 5, iclass 10, count 2 2006.229.08:43:34.64#ibcon#about to read 6, iclass 10, count 2 2006.229.08:43:34.64#ibcon#read 6, iclass 10, count 2 2006.229.08:43:34.64#ibcon#end of sib2, iclass 10, count 2 2006.229.08:43:34.64#ibcon#*after write, iclass 10, count 2 2006.229.08:43:34.64#ibcon#*before return 0, iclass 10, count 2 2006.229.08:43:34.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:34.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:34.64#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.08:43:34.64#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:34.64#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:34.76#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:34.76#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:34.76#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:43:34.76#ibcon#first serial, iclass 10, count 0 2006.229.08:43:34.76#ibcon#enter sib2, iclass 10, count 0 2006.229.08:43:34.76#ibcon#flushed, iclass 10, count 0 2006.229.08:43:34.76#ibcon#about to write, iclass 10, count 0 2006.229.08:43:34.76#ibcon#wrote, iclass 10, count 0 2006.229.08:43:34.76#ibcon#about to read 3, iclass 10, count 0 2006.229.08:43:34.78#ibcon#read 3, iclass 10, count 0 2006.229.08:43:34.78#ibcon#about to read 4, iclass 10, count 0 2006.229.08:43:34.78#ibcon#read 4, iclass 10, count 0 2006.229.08:43:34.78#ibcon#about to read 5, iclass 10, count 0 2006.229.08:43:34.78#ibcon#read 5, iclass 10, count 0 2006.229.08:43:34.78#ibcon#about to read 6, iclass 10, count 0 2006.229.08:43:34.78#ibcon#read 6, iclass 10, count 0 2006.229.08:43:34.78#ibcon#end of sib2, iclass 10, count 0 2006.229.08:43:34.78#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:43:34.78#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:43:34.78#ibcon#[25=USB\r\n] 2006.229.08:43:34.78#ibcon#*before write, iclass 10, count 0 2006.229.08:43:34.78#ibcon#enter sib2, iclass 10, count 0 2006.229.08:43:34.78#ibcon#flushed, iclass 10, count 0 2006.229.08:43:34.78#ibcon#about to write, iclass 10, count 0 2006.229.08:43:34.78#ibcon#wrote, iclass 10, count 0 2006.229.08:43:34.78#ibcon#about to read 3, iclass 10, count 0 2006.229.08:43:34.81#ibcon#read 3, iclass 10, count 0 2006.229.08:43:34.81#ibcon#about to read 4, iclass 10, count 0 2006.229.08:43:34.81#ibcon#read 4, iclass 10, count 0 2006.229.08:43:34.81#ibcon#about to read 5, iclass 10, count 0 2006.229.08:43:34.81#ibcon#read 5, iclass 10, count 0 2006.229.08:43:34.81#ibcon#about to read 6, iclass 10, count 0 2006.229.08:43:34.81#ibcon#read 6, iclass 10, count 0 2006.229.08:43:34.81#ibcon#end of sib2, iclass 10, count 0 2006.229.08:43:34.81#ibcon#*after write, iclass 10, count 0 2006.229.08:43:34.81#ibcon#*before return 0, iclass 10, count 0 2006.229.08:43:34.81#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:34.81#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:34.81#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:43:34.81#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:43:34.81$vck44/valo=3,564.99 2006.229.08:43:34.81#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.08:43:34.81#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.08:43:34.81#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:34.81#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:34.81#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:34.81#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:34.81#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:43:34.81#ibcon#first serial, iclass 12, count 0 2006.229.08:43:34.81#ibcon#enter sib2, iclass 12, count 0 2006.229.08:43:34.81#ibcon#flushed, iclass 12, count 0 2006.229.08:43:34.81#ibcon#about to write, iclass 12, count 0 2006.229.08:43:34.81#ibcon#wrote, iclass 12, count 0 2006.229.08:43:34.81#ibcon#about to read 3, iclass 12, count 0 2006.229.08:43:34.83#ibcon#read 3, iclass 12, count 0 2006.229.08:43:34.83#ibcon#about to read 4, iclass 12, count 0 2006.229.08:43:34.83#ibcon#read 4, iclass 12, count 0 2006.229.08:43:34.83#ibcon#about to read 5, iclass 12, count 0 2006.229.08:43:34.83#ibcon#read 5, iclass 12, count 0 2006.229.08:43:34.83#ibcon#about to read 6, iclass 12, count 0 2006.229.08:43:34.83#ibcon#read 6, iclass 12, count 0 2006.229.08:43:34.83#ibcon#end of sib2, iclass 12, count 0 2006.229.08:43:34.83#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:43:34.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:43:34.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:43:34.83#ibcon#*before write, iclass 12, count 0 2006.229.08:43:34.83#ibcon#enter sib2, iclass 12, count 0 2006.229.08:43:34.83#ibcon#flushed, iclass 12, count 0 2006.229.08:43:34.83#ibcon#about to write, iclass 12, count 0 2006.229.08:43:34.83#ibcon#wrote, iclass 12, count 0 2006.229.08:43:34.83#ibcon#about to read 3, iclass 12, count 0 2006.229.08:43:34.87#ibcon#read 3, iclass 12, count 0 2006.229.08:43:34.87#ibcon#about to read 4, iclass 12, count 0 2006.229.08:43:34.87#ibcon#read 4, iclass 12, count 0 2006.229.08:43:34.87#ibcon#about to read 5, iclass 12, count 0 2006.229.08:43:34.87#ibcon#read 5, iclass 12, count 0 2006.229.08:43:34.87#ibcon#about to read 6, iclass 12, count 0 2006.229.08:43:34.87#ibcon#read 6, iclass 12, count 0 2006.229.08:43:34.87#ibcon#end of sib2, iclass 12, count 0 2006.229.08:43:34.87#ibcon#*after write, iclass 12, count 0 2006.229.08:43:34.87#ibcon#*before return 0, iclass 12, count 0 2006.229.08:43:34.87#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:34.87#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:34.87#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:43:34.87#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:43:34.87$vck44/va=3,6 2006.229.08:43:34.87#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.08:43:34.87#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.08:43:34.87#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:34.87#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:34.93#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:34.93#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:34.93#ibcon#enter wrdev, iclass 14, count 2 2006.229.08:43:34.93#ibcon#first serial, iclass 14, count 2 2006.229.08:43:34.93#ibcon#enter sib2, iclass 14, count 2 2006.229.08:43:34.93#ibcon#flushed, iclass 14, count 2 2006.229.08:43:34.93#ibcon#about to write, iclass 14, count 2 2006.229.08:43:34.93#ibcon#wrote, iclass 14, count 2 2006.229.08:43:34.93#ibcon#about to read 3, iclass 14, count 2 2006.229.08:43:34.95#ibcon#read 3, iclass 14, count 2 2006.229.08:43:34.95#ibcon#about to read 4, iclass 14, count 2 2006.229.08:43:34.95#ibcon#read 4, iclass 14, count 2 2006.229.08:43:34.95#ibcon#about to read 5, iclass 14, count 2 2006.229.08:43:34.95#ibcon#read 5, iclass 14, count 2 2006.229.08:43:34.95#ibcon#about to read 6, iclass 14, count 2 2006.229.08:43:34.95#ibcon#read 6, iclass 14, count 2 2006.229.08:43:34.95#ibcon#end of sib2, iclass 14, count 2 2006.229.08:43:34.95#ibcon#*mode == 0, iclass 14, count 2 2006.229.08:43:34.95#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.08:43:34.95#ibcon#[25=AT03-06\r\n] 2006.229.08:43:34.95#ibcon#*before write, iclass 14, count 2 2006.229.08:43:34.95#ibcon#enter sib2, iclass 14, count 2 2006.229.08:43:34.95#ibcon#flushed, iclass 14, count 2 2006.229.08:43:34.95#ibcon#about to write, iclass 14, count 2 2006.229.08:43:34.95#ibcon#wrote, iclass 14, count 2 2006.229.08:43:34.95#ibcon#about to read 3, iclass 14, count 2 2006.229.08:43:34.98#ibcon#read 3, iclass 14, count 2 2006.229.08:43:34.98#ibcon#about to read 4, iclass 14, count 2 2006.229.08:43:34.98#ibcon#read 4, iclass 14, count 2 2006.229.08:43:34.98#ibcon#about to read 5, iclass 14, count 2 2006.229.08:43:34.98#ibcon#read 5, iclass 14, count 2 2006.229.08:43:34.98#ibcon#about to read 6, iclass 14, count 2 2006.229.08:43:34.98#ibcon#read 6, iclass 14, count 2 2006.229.08:43:34.98#ibcon#end of sib2, iclass 14, count 2 2006.229.08:43:34.98#ibcon#*after write, iclass 14, count 2 2006.229.08:43:34.98#ibcon#*before return 0, iclass 14, count 2 2006.229.08:43:34.98#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:34.98#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:34.98#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.08:43:34.98#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:34.98#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:35.10#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:35.10#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:35.10#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:43:35.10#ibcon#first serial, iclass 14, count 0 2006.229.08:43:35.10#ibcon#enter sib2, iclass 14, count 0 2006.229.08:43:35.10#ibcon#flushed, iclass 14, count 0 2006.229.08:43:35.10#ibcon#about to write, iclass 14, count 0 2006.229.08:43:35.10#ibcon#wrote, iclass 14, count 0 2006.229.08:43:35.10#ibcon#about to read 3, iclass 14, count 0 2006.229.08:43:35.12#ibcon#read 3, iclass 14, count 0 2006.229.08:43:35.12#ibcon#about to read 4, iclass 14, count 0 2006.229.08:43:35.12#ibcon#read 4, iclass 14, count 0 2006.229.08:43:35.12#ibcon#about to read 5, iclass 14, count 0 2006.229.08:43:35.12#ibcon#read 5, iclass 14, count 0 2006.229.08:43:35.12#ibcon#about to read 6, iclass 14, count 0 2006.229.08:43:35.12#ibcon#read 6, iclass 14, count 0 2006.229.08:43:35.12#ibcon#end of sib2, iclass 14, count 0 2006.229.08:43:35.12#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:43:35.12#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:43:35.12#ibcon#[25=USB\r\n] 2006.229.08:43:35.12#ibcon#*before write, iclass 14, count 0 2006.229.08:43:35.12#ibcon#enter sib2, iclass 14, count 0 2006.229.08:43:35.12#ibcon#flushed, iclass 14, count 0 2006.229.08:43:35.12#ibcon#about to write, iclass 14, count 0 2006.229.08:43:35.12#ibcon#wrote, iclass 14, count 0 2006.229.08:43:35.12#ibcon#about to read 3, iclass 14, count 0 2006.229.08:43:35.15#ibcon#read 3, iclass 14, count 0 2006.229.08:43:35.15#ibcon#about to read 4, iclass 14, count 0 2006.229.08:43:35.15#ibcon#read 4, iclass 14, count 0 2006.229.08:43:35.15#ibcon#about to read 5, iclass 14, count 0 2006.229.08:43:35.15#ibcon#read 5, iclass 14, count 0 2006.229.08:43:35.15#ibcon#about to read 6, iclass 14, count 0 2006.229.08:43:35.15#ibcon#read 6, iclass 14, count 0 2006.229.08:43:35.15#ibcon#end of sib2, iclass 14, count 0 2006.229.08:43:35.15#ibcon#*after write, iclass 14, count 0 2006.229.08:43:35.15#ibcon#*before return 0, iclass 14, count 0 2006.229.08:43:35.15#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:35.15#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:35.15#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:43:35.15#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:43:35.15$vck44/valo=4,624.99 2006.229.08:43:35.15#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.08:43:35.15#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.08:43:35.15#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:35.15#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:35.15#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:35.15#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:35.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:43:35.15#ibcon#first serial, iclass 16, count 0 2006.229.08:43:35.15#ibcon#enter sib2, iclass 16, count 0 2006.229.08:43:35.15#ibcon#flushed, iclass 16, count 0 2006.229.08:43:35.15#ibcon#about to write, iclass 16, count 0 2006.229.08:43:35.15#ibcon#wrote, iclass 16, count 0 2006.229.08:43:35.15#ibcon#about to read 3, iclass 16, count 0 2006.229.08:43:35.17#ibcon#read 3, iclass 16, count 0 2006.229.08:43:35.17#ibcon#about to read 4, iclass 16, count 0 2006.229.08:43:35.17#ibcon#read 4, iclass 16, count 0 2006.229.08:43:35.17#ibcon#about to read 5, iclass 16, count 0 2006.229.08:43:35.17#ibcon#read 5, iclass 16, count 0 2006.229.08:43:35.17#ibcon#about to read 6, iclass 16, count 0 2006.229.08:43:35.17#ibcon#read 6, iclass 16, count 0 2006.229.08:43:35.17#ibcon#end of sib2, iclass 16, count 0 2006.229.08:43:35.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:43:35.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:43:35.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:43:35.17#ibcon#*before write, iclass 16, count 0 2006.229.08:43:35.17#ibcon#enter sib2, iclass 16, count 0 2006.229.08:43:35.17#ibcon#flushed, iclass 16, count 0 2006.229.08:43:35.17#ibcon#about to write, iclass 16, count 0 2006.229.08:43:35.17#ibcon#wrote, iclass 16, count 0 2006.229.08:43:35.17#ibcon#about to read 3, iclass 16, count 0 2006.229.08:43:35.21#ibcon#read 3, iclass 16, count 0 2006.229.08:43:35.21#ibcon#about to read 4, iclass 16, count 0 2006.229.08:43:35.21#ibcon#read 4, iclass 16, count 0 2006.229.08:43:35.21#ibcon#about to read 5, iclass 16, count 0 2006.229.08:43:35.21#ibcon#read 5, iclass 16, count 0 2006.229.08:43:35.21#ibcon#about to read 6, iclass 16, count 0 2006.229.08:43:35.21#ibcon#read 6, iclass 16, count 0 2006.229.08:43:35.21#ibcon#end of sib2, iclass 16, count 0 2006.229.08:43:35.21#ibcon#*after write, iclass 16, count 0 2006.229.08:43:35.21#ibcon#*before return 0, iclass 16, count 0 2006.229.08:43:35.21#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:35.21#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:35.21#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:43:35.21#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:43:35.21$vck44/va=4,7 2006.229.08:43:35.21#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.08:43:35.21#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.08:43:35.21#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:35.21#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:35.27#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:35.27#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:35.27#ibcon#enter wrdev, iclass 18, count 2 2006.229.08:43:35.27#ibcon#first serial, iclass 18, count 2 2006.229.08:43:35.27#ibcon#enter sib2, iclass 18, count 2 2006.229.08:43:35.27#ibcon#flushed, iclass 18, count 2 2006.229.08:43:35.27#ibcon#about to write, iclass 18, count 2 2006.229.08:43:35.27#ibcon#wrote, iclass 18, count 2 2006.229.08:43:35.27#ibcon#about to read 3, iclass 18, count 2 2006.229.08:43:35.29#ibcon#read 3, iclass 18, count 2 2006.229.08:43:35.29#ibcon#about to read 4, iclass 18, count 2 2006.229.08:43:35.29#ibcon#read 4, iclass 18, count 2 2006.229.08:43:35.29#ibcon#about to read 5, iclass 18, count 2 2006.229.08:43:35.29#ibcon#read 5, iclass 18, count 2 2006.229.08:43:35.29#ibcon#about to read 6, iclass 18, count 2 2006.229.08:43:35.29#ibcon#read 6, iclass 18, count 2 2006.229.08:43:35.29#ibcon#end of sib2, iclass 18, count 2 2006.229.08:43:35.29#ibcon#*mode == 0, iclass 18, count 2 2006.229.08:43:35.29#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.08:43:35.29#ibcon#[25=AT04-07\r\n] 2006.229.08:43:35.29#ibcon#*before write, iclass 18, count 2 2006.229.08:43:35.29#ibcon#enter sib2, iclass 18, count 2 2006.229.08:43:35.29#ibcon#flushed, iclass 18, count 2 2006.229.08:43:35.29#ibcon#about to write, iclass 18, count 2 2006.229.08:43:35.29#ibcon#wrote, iclass 18, count 2 2006.229.08:43:35.29#ibcon#about to read 3, iclass 18, count 2 2006.229.08:43:35.32#ibcon#read 3, iclass 18, count 2 2006.229.08:43:35.32#ibcon#about to read 4, iclass 18, count 2 2006.229.08:43:35.32#ibcon#read 4, iclass 18, count 2 2006.229.08:43:35.32#ibcon#about to read 5, iclass 18, count 2 2006.229.08:43:35.32#ibcon#read 5, iclass 18, count 2 2006.229.08:43:35.32#ibcon#about to read 6, iclass 18, count 2 2006.229.08:43:35.32#ibcon#read 6, iclass 18, count 2 2006.229.08:43:35.32#ibcon#end of sib2, iclass 18, count 2 2006.229.08:43:35.32#ibcon#*after write, iclass 18, count 2 2006.229.08:43:35.32#ibcon#*before return 0, iclass 18, count 2 2006.229.08:43:35.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:35.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:35.32#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.08:43:35.32#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:35.32#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:35.44#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:35.44#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:35.44#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:43:35.44#ibcon#first serial, iclass 18, count 0 2006.229.08:43:35.44#ibcon#enter sib2, iclass 18, count 0 2006.229.08:43:35.44#ibcon#flushed, iclass 18, count 0 2006.229.08:43:35.44#ibcon#about to write, iclass 18, count 0 2006.229.08:43:35.44#ibcon#wrote, iclass 18, count 0 2006.229.08:43:35.44#ibcon#about to read 3, iclass 18, count 0 2006.229.08:43:35.46#ibcon#read 3, iclass 18, count 0 2006.229.08:43:35.46#ibcon#about to read 4, iclass 18, count 0 2006.229.08:43:35.46#ibcon#read 4, iclass 18, count 0 2006.229.08:43:35.46#ibcon#about to read 5, iclass 18, count 0 2006.229.08:43:35.46#ibcon#read 5, iclass 18, count 0 2006.229.08:43:35.46#ibcon#about to read 6, iclass 18, count 0 2006.229.08:43:35.46#ibcon#read 6, iclass 18, count 0 2006.229.08:43:35.46#ibcon#end of sib2, iclass 18, count 0 2006.229.08:43:35.46#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:43:35.46#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:43:35.46#ibcon#[25=USB\r\n] 2006.229.08:43:35.46#ibcon#*before write, iclass 18, count 0 2006.229.08:43:35.46#ibcon#enter sib2, iclass 18, count 0 2006.229.08:43:35.46#ibcon#flushed, iclass 18, count 0 2006.229.08:43:35.46#ibcon#about to write, iclass 18, count 0 2006.229.08:43:35.46#ibcon#wrote, iclass 18, count 0 2006.229.08:43:35.46#ibcon#about to read 3, iclass 18, count 0 2006.229.08:43:35.49#ibcon#read 3, iclass 18, count 0 2006.229.08:43:35.49#ibcon#about to read 4, iclass 18, count 0 2006.229.08:43:35.49#ibcon#read 4, iclass 18, count 0 2006.229.08:43:35.49#ibcon#about to read 5, iclass 18, count 0 2006.229.08:43:35.49#ibcon#read 5, iclass 18, count 0 2006.229.08:43:35.49#ibcon#about to read 6, iclass 18, count 0 2006.229.08:43:35.49#ibcon#read 6, iclass 18, count 0 2006.229.08:43:35.49#ibcon#end of sib2, iclass 18, count 0 2006.229.08:43:35.49#ibcon#*after write, iclass 18, count 0 2006.229.08:43:35.49#ibcon#*before return 0, iclass 18, count 0 2006.229.08:43:35.49#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:35.49#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:35.49#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:43:35.49#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:43:35.49$vck44/valo=5,734.99 2006.229.08:43:35.49#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.08:43:35.49#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.08:43:35.49#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:35.49#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:35.49#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:35.49#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:35.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:43:35.49#ibcon#first serial, iclass 20, count 0 2006.229.08:43:35.49#ibcon#enter sib2, iclass 20, count 0 2006.229.08:43:35.49#ibcon#flushed, iclass 20, count 0 2006.229.08:43:35.49#ibcon#about to write, iclass 20, count 0 2006.229.08:43:35.49#ibcon#wrote, iclass 20, count 0 2006.229.08:43:35.49#ibcon#about to read 3, iclass 20, count 0 2006.229.08:43:35.51#ibcon#read 3, iclass 20, count 0 2006.229.08:43:35.51#ibcon#about to read 4, iclass 20, count 0 2006.229.08:43:35.51#ibcon#read 4, iclass 20, count 0 2006.229.08:43:35.51#ibcon#about to read 5, iclass 20, count 0 2006.229.08:43:35.51#ibcon#read 5, iclass 20, count 0 2006.229.08:43:35.51#ibcon#about to read 6, iclass 20, count 0 2006.229.08:43:35.51#ibcon#read 6, iclass 20, count 0 2006.229.08:43:35.51#ibcon#end of sib2, iclass 20, count 0 2006.229.08:43:35.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:43:35.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:43:35.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:43:35.51#ibcon#*before write, iclass 20, count 0 2006.229.08:43:35.51#ibcon#enter sib2, iclass 20, count 0 2006.229.08:43:35.51#ibcon#flushed, iclass 20, count 0 2006.229.08:43:35.51#ibcon#about to write, iclass 20, count 0 2006.229.08:43:35.51#ibcon#wrote, iclass 20, count 0 2006.229.08:43:35.51#ibcon#about to read 3, iclass 20, count 0 2006.229.08:43:35.55#ibcon#read 3, iclass 20, count 0 2006.229.08:43:35.55#ibcon#about to read 4, iclass 20, count 0 2006.229.08:43:35.55#ibcon#read 4, iclass 20, count 0 2006.229.08:43:35.55#ibcon#about to read 5, iclass 20, count 0 2006.229.08:43:35.55#ibcon#read 5, iclass 20, count 0 2006.229.08:43:35.55#ibcon#about to read 6, iclass 20, count 0 2006.229.08:43:35.55#ibcon#read 6, iclass 20, count 0 2006.229.08:43:35.55#ibcon#end of sib2, iclass 20, count 0 2006.229.08:43:35.55#ibcon#*after write, iclass 20, count 0 2006.229.08:43:35.55#ibcon#*before return 0, iclass 20, count 0 2006.229.08:43:35.55#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:35.55#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:35.55#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:43:35.55#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:43:35.55$vck44/va=5,4 2006.229.08:43:35.55#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.08:43:35.55#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.08:43:35.55#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:35.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:35.61#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:35.61#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:35.61#ibcon#enter wrdev, iclass 22, count 2 2006.229.08:43:35.61#ibcon#first serial, iclass 22, count 2 2006.229.08:43:35.61#ibcon#enter sib2, iclass 22, count 2 2006.229.08:43:35.61#ibcon#flushed, iclass 22, count 2 2006.229.08:43:35.61#ibcon#about to write, iclass 22, count 2 2006.229.08:43:35.61#ibcon#wrote, iclass 22, count 2 2006.229.08:43:35.61#ibcon#about to read 3, iclass 22, count 2 2006.229.08:43:35.63#ibcon#read 3, iclass 22, count 2 2006.229.08:43:35.63#ibcon#about to read 4, iclass 22, count 2 2006.229.08:43:35.63#ibcon#read 4, iclass 22, count 2 2006.229.08:43:35.63#ibcon#about to read 5, iclass 22, count 2 2006.229.08:43:35.63#ibcon#read 5, iclass 22, count 2 2006.229.08:43:35.63#ibcon#about to read 6, iclass 22, count 2 2006.229.08:43:35.63#ibcon#read 6, iclass 22, count 2 2006.229.08:43:35.63#ibcon#end of sib2, iclass 22, count 2 2006.229.08:43:35.63#ibcon#*mode == 0, iclass 22, count 2 2006.229.08:43:35.63#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.08:43:35.63#ibcon#[25=AT05-04\r\n] 2006.229.08:43:35.63#ibcon#*before write, iclass 22, count 2 2006.229.08:43:35.63#ibcon#enter sib2, iclass 22, count 2 2006.229.08:43:35.63#ibcon#flushed, iclass 22, count 2 2006.229.08:43:35.63#ibcon#about to write, iclass 22, count 2 2006.229.08:43:35.63#ibcon#wrote, iclass 22, count 2 2006.229.08:43:35.63#ibcon#about to read 3, iclass 22, count 2 2006.229.08:43:35.66#ibcon#read 3, iclass 22, count 2 2006.229.08:43:35.66#ibcon#about to read 4, iclass 22, count 2 2006.229.08:43:35.66#ibcon#read 4, iclass 22, count 2 2006.229.08:43:35.66#ibcon#about to read 5, iclass 22, count 2 2006.229.08:43:35.66#ibcon#read 5, iclass 22, count 2 2006.229.08:43:35.66#ibcon#about to read 6, iclass 22, count 2 2006.229.08:43:35.66#ibcon#read 6, iclass 22, count 2 2006.229.08:43:35.66#ibcon#end of sib2, iclass 22, count 2 2006.229.08:43:35.66#ibcon#*after write, iclass 22, count 2 2006.229.08:43:35.66#ibcon#*before return 0, iclass 22, count 2 2006.229.08:43:35.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:35.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:35.66#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.08:43:35.66#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:35.66#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:35.78#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:35.78#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:35.78#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:43:35.78#ibcon#first serial, iclass 22, count 0 2006.229.08:43:35.78#ibcon#enter sib2, iclass 22, count 0 2006.229.08:43:35.78#ibcon#flushed, iclass 22, count 0 2006.229.08:43:35.78#ibcon#about to write, iclass 22, count 0 2006.229.08:43:35.78#ibcon#wrote, iclass 22, count 0 2006.229.08:43:35.78#ibcon#about to read 3, iclass 22, count 0 2006.229.08:43:35.80#ibcon#read 3, iclass 22, count 0 2006.229.08:43:35.80#ibcon#about to read 4, iclass 22, count 0 2006.229.08:43:35.80#ibcon#read 4, iclass 22, count 0 2006.229.08:43:35.80#ibcon#about to read 5, iclass 22, count 0 2006.229.08:43:35.80#ibcon#read 5, iclass 22, count 0 2006.229.08:43:35.80#ibcon#about to read 6, iclass 22, count 0 2006.229.08:43:35.80#ibcon#read 6, iclass 22, count 0 2006.229.08:43:35.80#ibcon#end of sib2, iclass 22, count 0 2006.229.08:43:35.80#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:43:35.80#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:43:35.80#ibcon#[25=USB\r\n] 2006.229.08:43:35.80#ibcon#*before write, iclass 22, count 0 2006.229.08:43:35.80#ibcon#enter sib2, iclass 22, count 0 2006.229.08:43:35.80#ibcon#flushed, iclass 22, count 0 2006.229.08:43:35.80#ibcon#about to write, iclass 22, count 0 2006.229.08:43:35.80#ibcon#wrote, iclass 22, count 0 2006.229.08:43:35.80#ibcon#about to read 3, iclass 22, count 0 2006.229.08:43:35.83#ibcon#read 3, iclass 22, count 0 2006.229.08:43:35.83#ibcon#about to read 4, iclass 22, count 0 2006.229.08:43:35.83#ibcon#read 4, iclass 22, count 0 2006.229.08:43:35.83#ibcon#about to read 5, iclass 22, count 0 2006.229.08:43:35.83#ibcon#read 5, iclass 22, count 0 2006.229.08:43:35.83#ibcon#about to read 6, iclass 22, count 0 2006.229.08:43:35.83#ibcon#read 6, iclass 22, count 0 2006.229.08:43:35.83#ibcon#end of sib2, iclass 22, count 0 2006.229.08:43:35.83#ibcon#*after write, iclass 22, count 0 2006.229.08:43:35.83#ibcon#*before return 0, iclass 22, count 0 2006.229.08:43:35.83#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:35.83#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:35.83#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:43:35.83#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:43:35.83$vck44/valo=6,814.99 2006.229.08:43:35.83#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.08:43:35.83#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.08:43:35.83#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:35.83#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:35.83#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:35.83#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:35.83#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:43:35.83#ibcon#first serial, iclass 24, count 0 2006.229.08:43:35.83#ibcon#enter sib2, iclass 24, count 0 2006.229.08:43:35.83#ibcon#flushed, iclass 24, count 0 2006.229.08:43:35.83#ibcon#about to write, iclass 24, count 0 2006.229.08:43:35.83#ibcon#wrote, iclass 24, count 0 2006.229.08:43:35.83#ibcon#about to read 3, iclass 24, count 0 2006.229.08:43:35.85#ibcon#read 3, iclass 24, count 0 2006.229.08:43:35.85#ibcon#about to read 4, iclass 24, count 0 2006.229.08:43:35.85#ibcon#read 4, iclass 24, count 0 2006.229.08:43:35.85#ibcon#about to read 5, iclass 24, count 0 2006.229.08:43:35.85#ibcon#read 5, iclass 24, count 0 2006.229.08:43:35.85#ibcon#about to read 6, iclass 24, count 0 2006.229.08:43:35.85#ibcon#read 6, iclass 24, count 0 2006.229.08:43:35.85#ibcon#end of sib2, iclass 24, count 0 2006.229.08:43:35.85#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:43:35.85#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:43:35.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:43:35.85#ibcon#*before write, iclass 24, count 0 2006.229.08:43:35.85#ibcon#enter sib2, iclass 24, count 0 2006.229.08:43:35.85#ibcon#flushed, iclass 24, count 0 2006.229.08:43:35.85#ibcon#about to write, iclass 24, count 0 2006.229.08:43:35.85#ibcon#wrote, iclass 24, count 0 2006.229.08:43:35.85#ibcon#about to read 3, iclass 24, count 0 2006.229.08:43:35.89#ibcon#read 3, iclass 24, count 0 2006.229.08:43:35.89#ibcon#about to read 4, iclass 24, count 0 2006.229.08:43:35.89#ibcon#read 4, iclass 24, count 0 2006.229.08:43:35.89#ibcon#about to read 5, iclass 24, count 0 2006.229.08:43:35.89#ibcon#read 5, iclass 24, count 0 2006.229.08:43:35.89#ibcon#about to read 6, iclass 24, count 0 2006.229.08:43:35.89#ibcon#read 6, iclass 24, count 0 2006.229.08:43:35.89#ibcon#end of sib2, iclass 24, count 0 2006.229.08:43:35.89#ibcon#*after write, iclass 24, count 0 2006.229.08:43:35.89#ibcon#*before return 0, iclass 24, count 0 2006.229.08:43:35.89#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:35.89#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:35.89#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:43:35.89#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:43:35.89$vck44/va=6,4 2006.229.08:43:35.89#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.08:43:35.89#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.08:43:35.89#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:35.89#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:35.95#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:35.95#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:35.95#ibcon#enter wrdev, iclass 26, count 2 2006.229.08:43:35.95#ibcon#first serial, iclass 26, count 2 2006.229.08:43:35.95#ibcon#enter sib2, iclass 26, count 2 2006.229.08:43:35.95#ibcon#flushed, iclass 26, count 2 2006.229.08:43:35.95#ibcon#about to write, iclass 26, count 2 2006.229.08:43:35.95#ibcon#wrote, iclass 26, count 2 2006.229.08:43:35.95#ibcon#about to read 3, iclass 26, count 2 2006.229.08:43:35.97#ibcon#read 3, iclass 26, count 2 2006.229.08:43:35.97#ibcon#about to read 4, iclass 26, count 2 2006.229.08:43:35.97#ibcon#read 4, iclass 26, count 2 2006.229.08:43:35.97#ibcon#about to read 5, iclass 26, count 2 2006.229.08:43:35.97#ibcon#read 5, iclass 26, count 2 2006.229.08:43:35.97#ibcon#about to read 6, iclass 26, count 2 2006.229.08:43:35.97#ibcon#read 6, iclass 26, count 2 2006.229.08:43:35.97#ibcon#end of sib2, iclass 26, count 2 2006.229.08:43:35.97#ibcon#*mode == 0, iclass 26, count 2 2006.229.08:43:35.97#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.08:43:35.97#ibcon#[25=AT06-04\r\n] 2006.229.08:43:35.97#ibcon#*before write, iclass 26, count 2 2006.229.08:43:35.97#ibcon#enter sib2, iclass 26, count 2 2006.229.08:43:35.97#ibcon#flushed, iclass 26, count 2 2006.229.08:43:35.97#ibcon#about to write, iclass 26, count 2 2006.229.08:43:35.97#ibcon#wrote, iclass 26, count 2 2006.229.08:43:35.97#ibcon#about to read 3, iclass 26, count 2 2006.229.08:43:36.00#ibcon#read 3, iclass 26, count 2 2006.229.08:43:36.00#ibcon#about to read 4, iclass 26, count 2 2006.229.08:43:36.00#ibcon#read 4, iclass 26, count 2 2006.229.08:43:36.00#ibcon#about to read 5, iclass 26, count 2 2006.229.08:43:36.00#ibcon#read 5, iclass 26, count 2 2006.229.08:43:36.00#ibcon#about to read 6, iclass 26, count 2 2006.229.08:43:36.00#ibcon#read 6, iclass 26, count 2 2006.229.08:43:36.00#ibcon#end of sib2, iclass 26, count 2 2006.229.08:43:36.00#ibcon#*after write, iclass 26, count 2 2006.229.08:43:36.00#ibcon#*before return 0, iclass 26, count 2 2006.229.08:43:36.00#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:36.00#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:36.00#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.08:43:36.00#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:36.00#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:36.12#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:36.12#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:36.12#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:43:36.12#ibcon#first serial, iclass 26, count 0 2006.229.08:43:36.12#ibcon#enter sib2, iclass 26, count 0 2006.229.08:43:36.12#ibcon#flushed, iclass 26, count 0 2006.229.08:43:36.12#ibcon#about to write, iclass 26, count 0 2006.229.08:43:36.12#ibcon#wrote, iclass 26, count 0 2006.229.08:43:36.12#ibcon#about to read 3, iclass 26, count 0 2006.229.08:43:36.14#ibcon#read 3, iclass 26, count 0 2006.229.08:43:36.14#ibcon#about to read 4, iclass 26, count 0 2006.229.08:43:36.14#ibcon#read 4, iclass 26, count 0 2006.229.08:43:36.14#ibcon#about to read 5, iclass 26, count 0 2006.229.08:43:36.14#ibcon#read 5, iclass 26, count 0 2006.229.08:43:36.14#ibcon#about to read 6, iclass 26, count 0 2006.229.08:43:36.14#ibcon#read 6, iclass 26, count 0 2006.229.08:43:36.14#ibcon#end of sib2, iclass 26, count 0 2006.229.08:43:36.14#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:43:36.14#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:43:36.14#ibcon#[25=USB\r\n] 2006.229.08:43:36.14#ibcon#*before write, iclass 26, count 0 2006.229.08:43:36.14#ibcon#enter sib2, iclass 26, count 0 2006.229.08:43:36.14#ibcon#flushed, iclass 26, count 0 2006.229.08:43:36.14#ibcon#about to write, iclass 26, count 0 2006.229.08:43:36.14#ibcon#wrote, iclass 26, count 0 2006.229.08:43:36.14#ibcon#about to read 3, iclass 26, count 0 2006.229.08:43:36.17#ibcon#read 3, iclass 26, count 0 2006.229.08:43:36.17#ibcon#about to read 4, iclass 26, count 0 2006.229.08:43:36.17#ibcon#read 4, iclass 26, count 0 2006.229.08:43:36.17#ibcon#about to read 5, iclass 26, count 0 2006.229.08:43:36.17#ibcon#read 5, iclass 26, count 0 2006.229.08:43:36.17#ibcon#about to read 6, iclass 26, count 0 2006.229.08:43:36.17#ibcon#read 6, iclass 26, count 0 2006.229.08:43:36.17#ibcon#end of sib2, iclass 26, count 0 2006.229.08:43:36.17#ibcon#*after write, iclass 26, count 0 2006.229.08:43:36.17#ibcon#*before return 0, iclass 26, count 0 2006.229.08:43:36.17#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:36.17#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:36.17#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:43:36.17#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:43:36.17$vck44/valo=7,864.99 2006.229.08:43:36.17#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.08:43:36.17#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.08:43:36.17#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:36.17#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:36.17#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:36.17#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:36.17#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:43:36.17#ibcon#first serial, iclass 28, count 0 2006.229.08:43:36.17#ibcon#enter sib2, iclass 28, count 0 2006.229.08:43:36.17#ibcon#flushed, iclass 28, count 0 2006.229.08:43:36.17#ibcon#about to write, iclass 28, count 0 2006.229.08:43:36.17#ibcon#wrote, iclass 28, count 0 2006.229.08:43:36.17#ibcon#about to read 3, iclass 28, count 0 2006.229.08:43:36.19#ibcon#read 3, iclass 28, count 0 2006.229.08:43:36.19#ibcon#about to read 4, iclass 28, count 0 2006.229.08:43:36.19#ibcon#read 4, iclass 28, count 0 2006.229.08:43:36.19#ibcon#about to read 5, iclass 28, count 0 2006.229.08:43:36.19#ibcon#read 5, iclass 28, count 0 2006.229.08:43:36.19#ibcon#about to read 6, iclass 28, count 0 2006.229.08:43:36.19#ibcon#read 6, iclass 28, count 0 2006.229.08:43:36.19#ibcon#end of sib2, iclass 28, count 0 2006.229.08:43:36.19#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:43:36.19#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:43:36.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:43:36.19#ibcon#*before write, iclass 28, count 0 2006.229.08:43:36.19#ibcon#enter sib2, iclass 28, count 0 2006.229.08:43:36.19#ibcon#flushed, iclass 28, count 0 2006.229.08:43:36.19#ibcon#about to write, iclass 28, count 0 2006.229.08:43:36.19#ibcon#wrote, iclass 28, count 0 2006.229.08:43:36.19#ibcon#about to read 3, iclass 28, count 0 2006.229.08:43:36.23#ibcon#read 3, iclass 28, count 0 2006.229.08:43:36.23#ibcon#about to read 4, iclass 28, count 0 2006.229.08:43:36.23#ibcon#read 4, iclass 28, count 0 2006.229.08:43:36.23#ibcon#about to read 5, iclass 28, count 0 2006.229.08:43:36.23#ibcon#read 5, iclass 28, count 0 2006.229.08:43:36.23#ibcon#about to read 6, iclass 28, count 0 2006.229.08:43:36.23#ibcon#read 6, iclass 28, count 0 2006.229.08:43:36.23#ibcon#end of sib2, iclass 28, count 0 2006.229.08:43:36.23#ibcon#*after write, iclass 28, count 0 2006.229.08:43:36.23#ibcon#*before return 0, iclass 28, count 0 2006.229.08:43:36.23#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:36.23#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:36.23#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:43:36.23#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:43:36.23$vck44/va=7,5 2006.229.08:43:36.23#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.08:43:36.23#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.08:43:36.23#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:36.23#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:36.29#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:36.29#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:36.29#ibcon#enter wrdev, iclass 30, count 2 2006.229.08:43:36.29#ibcon#first serial, iclass 30, count 2 2006.229.08:43:36.29#ibcon#enter sib2, iclass 30, count 2 2006.229.08:43:36.29#ibcon#flushed, iclass 30, count 2 2006.229.08:43:36.29#ibcon#about to write, iclass 30, count 2 2006.229.08:43:36.29#ibcon#wrote, iclass 30, count 2 2006.229.08:43:36.29#ibcon#about to read 3, iclass 30, count 2 2006.229.08:43:36.31#ibcon#read 3, iclass 30, count 2 2006.229.08:43:36.31#ibcon#about to read 4, iclass 30, count 2 2006.229.08:43:36.31#ibcon#read 4, iclass 30, count 2 2006.229.08:43:36.31#ibcon#about to read 5, iclass 30, count 2 2006.229.08:43:36.31#ibcon#read 5, iclass 30, count 2 2006.229.08:43:36.31#ibcon#about to read 6, iclass 30, count 2 2006.229.08:43:36.31#ibcon#read 6, iclass 30, count 2 2006.229.08:43:36.31#ibcon#end of sib2, iclass 30, count 2 2006.229.08:43:36.31#ibcon#*mode == 0, iclass 30, count 2 2006.229.08:43:36.31#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.08:43:36.31#ibcon#[25=AT07-05\r\n] 2006.229.08:43:36.31#ibcon#*before write, iclass 30, count 2 2006.229.08:43:36.31#ibcon#enter sib2, iclass 30, count 2 2006.229.08:43:36.31#ibcon#flushed, iclass 30, count 2 2006.229.08:43:36.31#ibcon#about to write, iclass 30, count 2 2006.229.08:43:36.31#ibcon#wrote, iclass 30, count 2 2006.229.08:43:36.31#ibcon#about to read 3, iclass 30, count 2 2006.229.08:43:36.34#ibcon#read 3, iclass 30, count 2 2006.229.08:43:36.34#ibcon#about to read 4, iclass 30, count 2 2006.229.08:43:36.34#ibcon#read 4, iclass 30, count 2 2006.229.08:43:36.34#ibcon#about to read 5, iclass 30, count 2 2006.229.08:43:36.34#ibcon#read 5, iclass 30, count 2 2006.229.08:43:36.34#ibcon#about to read 6, iclass 30, count 2 2006.229.08:43:36.34#ibcon#read 6, iclass 30, count 2 2006.229.08:43:36.34#ibcon#end of sib2, iclass 30, count 2 2006.229.08:43:36.34#ibcon#*after write, iclass 30, count 2 2006.229.08:43:36.34#ibcon#*before return 0, iclass 30, count 2 2006.229.08:43:36.34#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:36.34#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:36.34#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.08:43:36.34#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:36.34#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:36.46#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:36.46#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:36.46#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:43:36.46#ibcon#first serial, iclass 30, count 0 2006.229.08:43:36.46#ibcon#enter sib2, iclass 30, count 0 2006.229.08:43:36.46#ibcon#flushed, iclass 30, count 0 2006.229.08:43:36.46#ibcon#about to write, iclass 30, count 0 2006.229.08:43:36.46#ibcon#wrote, iclass 30, count 0 2006.229.08:43:36.46#ibcon#about to read 3, iclass 30, count 0 2006.229.08:43:36.48#ibcon#read 3, iclass 30, count 0 2006.229.08:43:36.48#ibcon#about to read 4, iclass 30, count 0 2006.229.08:43:36.48#ibcon#read 4, iclass 30, count 0 2006.229.08:43:36.48#ibcon#about to read 5, iclass 30, count 0 2006.229.08:43:36.48#ibcon#read 5, iclass 30, count 0 2006.229.08:43:36.48#ibcon#about to read 6, iclass 30, count 0 2006.229.08:43:36.48#ibcon#read 6, iclass 30, count 0 2006.229.08:43:36.48#ibcon#end of sib2, iclass 30, count 0 2006.229.08:43:36.48#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:43:36.48#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:43:36.48#ibcon#[25=USB\r\n] 2006.229.08:43:36.48#ibcon#*before write, iclass 30, count 0 2006.229.08:43:36.48#ibcon#enter sib2, iclass 30, count 0 2006.229.08:43:36.48#ibcon#flushed, iclass 30, count 0 2006.229.08:43:36.48#ibcon#about to write, iclass 30, count 0 2006.229.08:43:36.48#ibcon#wrote, iclass 30, count 0 2006.229.08:43:36.48#ibcon#about to read 3, iclass 30, count 0 2006.229.08:43:36.51#ibcon#read 3, iclass 30, count 0 2006.229.08:43:36.51#ibcon#about to read 4, iclass 30, count 0 2006.229.08:43:36.51#ibcon#read 4, iclass 30, count 0 2006.229.08:43:36.51#ibcon#about to read 5, iclass 30, count 0 2006.229.08:43:36.51#ibcon#read 5, iclass 30, count 0 2006.229.08:43:36.51#ibcon#about to read 6, iclass 30, count 0 2006.229.08:43:36.51#ibcon#read 6, iclass 30, count 0 2006.229.08:43:36.51#ibcon#end of sib2, iclass 30, count 0 2006.229.08:43:36.51#ibcon#*after write, iclass 30, count 0 2006.229.08:43:36.51#ibcon#*before return 0, iclass 30, count 0 2006.229.08:43:36.51#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:36.51#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:36.51#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:43:36.51#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:43:36.51$vck44/valo=8,884.99 2006.229.08:43:36.51#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.08:43:36.51#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.08:43:36.51#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:36.51#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:36.51#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:36.51#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:36.51#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:43:36.51#ibcon#first serial, iclass 32, count 0 2006.229.08:43:36.51#ibcon#enter sib2, iclass 32, count 0 2006.229.08:43:36.51#ibcon#flushed, iclass 32, count 0 2006.229.08:43:36.51#ibcon#about to write, iclass 32, count 0 2006.229.08:43:36.51#ibcon#wrote, iclass 32, count 0 2006.229.08:43:36.51#ibcon#about to read 3, iclass 32, count 0 2006.229.08:43:36.53#ibcon#read 3, iclass 32, count 0 2006.229.08:43:36.53#ibcon#about to read 4, iclass 32, count 0 2006.229.08:43:36.53#ibcon#read 4, iclass 32, count 0 2006.229.08:43:36.53#ibcon#about to read 5, iclass 32, count 0 2006.229.08:43:36.53#ibcon#read 5, iclass 32, count 0 2006.229.08:43:36.53#ibcon#about to read 6, iclass 32, count 0 2006.229.08:43:36.53#ibcon#read 6, iclass 32, count 0 2006.229.08:43:36.53#ibcon#end of sib2, iclass 32, count 0 2006.229.08:43:36.53#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:43:36.53#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:43:36.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:43:36.53#ibcon#*before write, iclass 32, count 0 2006.229.08:43:36.53#ibcon#enter sib2, iclass 32, count 0 2006.229.08:43:36.53#ibcon#flushed, iclass 32, count 0 2006.229.08:43:36.53#ibcon#about to write, iclass 32, count 0 2006.229.08:43:36.53#ibcon#wrote, iclass 32, count 0 2006.229.08:43:36.53#ibcon#about to read 3, iclass 32, count 0 2006.229.08:43:36.57#ibcon#read 3, iclass 32, count 0 2006.229.08:43:36.57#ibcon#about to read 4, iclass 32, count 0 2006.229.08:43:36.57#ibcon#read 4, iclass 32, count 0 2006.229.08:43:36.57#ibcon#about to read 5, iclass 32, count 0 2006.229.08:43:36.57#ibcon#read 5, iclass 32, count 0 2006.229.08:43:36.57#ibcon#about to read 6, iclass 32, count 0 2006.229.08:43:36.57#ibcon#read 6, iclass 32, count 0 2006.229.08:43:36.57#ibcon#end of sib2, iclass 32, count 0 2006.229.08:43:36.57#ibcon#*after write, iclass 32, count 0 2006.229.08:43:36.57#ibcon#*before return 0, iclass 32, count 0 2006.229.08:43:36.57#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:36.57#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:36.57#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:43:36.57#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:43:36.57$vck44/va=8,6 2006.229.08:43:36.57#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.08:43:36.57#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.08:43:36.57#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:36.57#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:43:36.63#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:43:36.63#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:43:36.63#ibcon#enter wrdev, iclass 34, count 2 2006.229.08:43:36.63#ibcon#first serial, iclass 34, count 2 2006.229.08:43:36.63#ibcon#enter sib2, iclass 34, count 2 2006.229.08:43:36.63#ibcon#flushed, iclass 34, count 2 2006.229.08:43:36.63#ibcon#about to write, iclass 34, count 2 2006.229.08:43:36.63#ibcon#wrote, iclass 34, count 2 2006.229.08:43:36.63#ibcon#about to read 3, iclass 34, count 2 2006.229.08:43:36.65#ibcon#read 3, iclass 34, count 2 2006.229.08:43:36.65#ibcon#about to read 4, iclass 34, count 2 2006.229.08:43:36.65#ibcon#read 4, iclass 34, count 2 2006.229.08:43:36.65#ibcon#about to read 5, iclass 34, count 2 2006.229.08:43:36.65#ibcon#read 5, iclass 34, count 2 2006.229.08:43:36.65#ibcon#about to read 6, iclass 34, count 2 2006.229.08:43:36.65#ibcon#read 6, iclass 34, count 2 2006.229.08:43:36.65#ibcon#end of sib2, iclass 34, count 2 2006.229.08:43:36.65#ibcon#*mode == 0, iclass 34, count 2 2006.229.08:43:36.65#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.08:43:36.65#ibcon#[25=AT08-06\r\n] 2006.229.08:43:36.65#ibcon#*before write, iclass 34, count 2 2006.229.08:43:36.65#ibcon#enter sib2, iclass 34, count 2 2006.229.08:43:36.65#ibcon#flushed, iclass 34, count 2 2006.229.08:43:36.65#ibcon#about to write, iclass 34, count 2 2006.229.08:43:36.65#ibcon#wrote, iclass 34, count 2 2006.229.08:43:36.65#ibcon#about to read 3, iclass 34, count 2 2006.229.08:43:36.68#ibcon#read 3, iclass 34, count 2 2006.229.08:43:36.68#ibcon#about to read 4, iclass 34, count 2 2006.229.08:43:36.68#ibcon#read 4, iclass 34, count 2 2006.229.08:43:36.68#ibcon#about to read 5, iclass 34, count 2 2006.229.08:43:36.68#ibcon#read 5, iclass 34, count 2 2006.229.08:43:36.68#ibcon#about to read 6, iclass 34, count 2 2006.229.08:43:36.68#ibcon#read 6, iclass 34, count 2 2006.229.08:43:36.68#ibcon#end of sib2, iclass 34, count 2 2006.229.08:43:36.68#ibcon#*after write, iclass 34, count 2 2006.229.08:43:36.68#ibcon#*before return 0, iclass 34, count 2 2006.229.08:43:36.68#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:43:36.68#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.08:43:36.68#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.08:43:36.68#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:36.68#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:43:36.80#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:43:36.80#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:43:36.80#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:43:36.80#ibcon#first serial, iclass 34, count 0 2006.229.08:43:36.80#ibcon#enter sib2, iclass 34, count 0 2006.229.08:43:36.80#ibcon#flushed, iclass 34, count 0 2006.229.08:43:36.80#ibcon#about to write, iclass 34, count 0 2006.229.08:43:36.80#ibcon#wrote, iclass 34, count 0 2006.229.08:43:36.80#ibcon#about to read 3, iclass 34, count 0 2006.229.08:43:36.82#ibcon#read 3, iclass 34, count 0 2006.229.08:43:36.82#ibcon#about to read 4, iclass 34, count 0 2006.229.08:43:36.82#ibcon#read 4, iclass 34, count 0 2006.229.08:43:36.82#ibcon#about to read 5, iclass 34, count 0 2006.229.08:43:36.82#ibcon#read 5, iclass 34, count 0 2006.229.08:43:36.82#ibcon#about to read 6, iclass 34, count 0 2006.229.08:43:36.82#ibcon#read 6, iclass 34, count 0 2006.229.08:43:36.82#ibcon#end of sib2, iclass 34, count 0 2006.229.08:43:36.82#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:43:36.82#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:43:36.82#ibcon#[25=USB\r\n] 2006.229.08:43:36.82#ibcon#*before write, iclass 34, count 0 2006.229.08:43:36.82#ibcon#enter sib2, iclass 34, count 0 2006.229.08:43:36.82#ibcon#flushed, iclass 34, count 0 2006.229.08:43:36.82#ibcon#about to write, iclass 34, count 0 2006.229.08:43:36.82#ibcon#wrote, iclass 34, count 0 2006.229.08:43:36.82#ibcon#about to read 3, iclass 34, count 0 2006.229.08:43:36.85#ibcon#read 3, iclass 34, count 0 2006.229.08:43:36.85#ibcon#about to read 4, iclass 34, count 0 2006.229.08:43:36.85#ibcon#read 4, iclass 34, count 0 2006.229.08:43:36.85#ibcon#about to read 5, iclass 34, count 0 2006.229.08:43:36.85#ibcon#read 5, iclass 34, count 0 2006.229.08:43:36.85#ibcon#about to read 6, iclass 34, count 0 2006.229.08:43:36.85#ibcon#read 6, iclass 34, count 0 2006.229.08:43:36.85#ibcon#end of sib2, iclass 34, count 0 2006.229.08:43:36.85#ibcon#*after write, iclass 34, count 0 2006.229.08:43:36.85#ibcon#*before return 0, iclass 34, count 0 2006.229.08:43:36.85#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:43:36.85#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.08:43:36.85#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:43:36.85#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:43:36.85$vck44/vblo=1,629.99 2006.229.08:43:36.85#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.08:43:36.85#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.08:43:36.85#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:36.85#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:43:36.85#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:43:36.85#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:43:36.85#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:43:36.85#ibcon#first serial, iclass 36, count 0 2006.229.08:43:36.85#ibcon#enter sib2, iclass 36, count 0 2006.229.08:43:36.85#ibcon#flushed, iclass 36, count 0 2006.229.08:43:36.85#ibcon#about to write, iclass 36, count 0 2006.229.08:43:36.85#ibcon#wrote, iclass 36, count 0 2006.229.08:43:36.85#ibcon#about to read 3, iclass 36, count 0 2006.229.08:43:36.87#ibcon#read 3, iclass 36, count 0 2006.229.08:43:36.87#ibcon#about to read 4, iclass 36, count 0 2006.229.08:43:36.87#ibcon#read 4, iclass 36, count 0 2006.229.08:43:36.87#ibcon#about to read 5, iclass 36, count 0 2006.229.08:43:36.87#ibcon#read 5, iclass 36, count 0 2006.229.08:43:36.87#ibcon#about to read 6, iclass 36, count 0 2006.229.08:43:36.87#ibcon#read 6, iclass 36, count 0 2006.229.08:43:36.87#ibcon#end of sib2, iclass 36, count 0 2006.229.08:43:36.87#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:43:36.87#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:43:36.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:43:36.87#ibcon#*before write, iclass 36, count 0 2006.229.08:43:36.87#ibcon#enter sib2, iclass 36, count 0 2006.229.08:43:36.87#ibcon#flushed, iclass 36, count 0 2006.229.08:43:36.87#ibcon#about to write, iclass 36, count 0 2006.229.08:43:36.87#ibcon#wrote, iclass 36, count 0 2006.229.08:43:36.87#ibcon#about to read 3, iclass 36, count 0 2006.229.08:43:36.91#ibcon#read 3, iclass 36, count 0 2006.229.08:43:36.91#ibcon#about to read 4, iclass 36, count 0 2006.229.08:43:36.91#ibcon#read 4, iclass 36, count 0 2006.229.08:43:36.91#ibcon#about to read 5, iclass 36, count 0 2006.229.08:43:36.91#ibcon#read 5, iclass 36, count 0 2006.229.08:43:36.91#ibcon#about to read 6, iclass 36, count 0 2006.229.08:43:36.91#ibcon#read 6, iclass 36, count 0 2006.229.08:43:36.91#ibcon#end of sib2, iclass 36, count 0 2006.229.08:43:36.91#ibcon#*after write, iclass 36, count 0 2006.229.08:43:36.91#ibcon#*before return 0, iclass 36, count 0 2006.229.08:43:36.91#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:43:36.91#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.08:43:36.91#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:43:36.91#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:43:36.91$vck44/vb=1,4 2006.229.08:43:36.91#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.08:43:36.91#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.08:43:36.91#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:36.91#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:43:36.91#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:43:36.91#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:43:36.91#ibcon#enter wrdev, iclass 38, count 2 2006.229.08:43:36.91#ibcon#first serial, iclass 38, count 2 2006.229.08:43:36.91#ibcon#enter sib2, iclass 38, count 2 2006.229.08:43:36.91#ibcon#flushed, iclass 38, count 2 2006.229.08:43:36.91#ibcon#about to write, iclass 38, count 2 2006.229.08:43:36.91#ibcon#wrote, iclass 38, count 2 2006.229.08:43:36.91#ibcon#about to read 3, iclass 38, count 2 2006.229.08:43:36.93#ibcon#read 3, iclass 38, count 2 2006.229.08:43:36.93#ibcon#about to read 4, iclass 38, count 2 2006.229.08:43:36.93#ibcon#read 4, iclass 38, count 2 2006.229.08:43:36.93#ibcon#about to read 5, iclass 38, count 2 2006.229.08:43:36.93#ibcon#read 5, iclass 38, count 2 2006.229.08:43:36.93#ibcon#about to read 6, iclass 38, count 2 2006.229.08:43:36.93#ibcon#read 6, iclass 38, count 2 2006.229.08:43:36.93#ibcon#end of sib2, iclass 38, count 2 2006.229.08:43:36.93#ibcon#*mode == 0, iclass 38, count 2 2006.229.08:43:36.93#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.08:43:36.93#ibcon#[27=AT01-04\r\n] 2006.229.08:43:36.93#ibcon#*before write, iclass 38, count 2 2006.229.08:43:36.93#ibcon#enter sib2, iclass 38, count 2 2006.229.08:43:36.93#ibcon#flushed, iclass 38, count 2 2006.229.08:43:36.93#ibcon#about to write, iclass 38, count 2 2006.229.08:43:36.93#ibcon#wrote, iclass 38, count 2 2006.229.08:43:36.93#ibcon#about to read 3, iclass 38, count 2 2006.229.08:43:36.96#ibcon#read 3, iclass 38, count 2 2006.229.08:43:36.96#ibcon#about to read 4, iclass 38, count 2 2006.229.08:43:36.96#ibcon#read 4, iclass 38, count 2 2006.229.08:43:36.96#ibcon#about to read 5, iclass 38, count 2 2006.229.08:43:36.96#ibcon#read 5, iclass 38, count 2 2006.229.08:43:36.96#ibcon#about to read 6, iclass 38, count 2 2006.229.08:43:36.96#ibcon#read 6, iclass 38, count 2 2006.229.08:43:36.96#ibcon#end of sib2, iclass 38, count 2 2006.229.08:43:36.96#ibcon#*after write, iclass 38, count 2 2006.229.08:43:36.96#ibcon#*before return 0, iclass 38, count 2 2006.229.08:43:36.96#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:43:36.96#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.08:43:36.96#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.08:43:36.96#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:36.96#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:43:37.08#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:43:37.08#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:43:37.08#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:43:37.08#ibcon#first serial, iclass 38, count 0 2006.229.08:43:37.08#ibcon#enter sib2, iclass 38, count 0 2006.229.08:43:37.08#ibcon#flushed, iclass 38, count 0 2006.229.08:43:37.08#ibcon#about to write, iclass 38, count 0 2006.229.08:43:37.08#ibcon#wrote, iclass 38, count 0 2006.229.08:43:37.08#ibcon#about to read 3, iclass 38, count 0 2006.229.08:43:37.10#ibcon#read 3, iclass 38, count 0 2006.229.08:43:37.10#ibcon#about to read 4, iclass 38, count 0 2006.229.08:43:37.10#ibcon#read 4, iclass 38, count 0 2006.229.08:43:37.10#ibcon#about to read 5, iclass 38, count 0 2006.229.08:43:37.10#ibcon#read 5, iclass 38, count 0 2006.229.08:43:37.10#ibcon#about to read 6, iclass 38, count 0 2006.229.08:43:37.10#ibcon#read 6, iclass 38, count 0 2006.229.08:43:37.10#ibcon#end of sib2, iclass 38, count 0 2006.229.08:43:37.10#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:43:37.10#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:43:37.10#ibcon#[27=USB\r\n] 2006.229.08:43:37.10#ibcon#*before write, iclass 38, count 0 2006.229.08:43:37.10#ibcon#enter sib2, iclass 38, count 0 2006.229.08:43:37.10#ibcon#flushed, iclass 38, count 0 2006.229.08:43:37.10#ibcon#about to write, iclass 38, count 0 2006.229.08:43:37.10#ibcon#wrote, iclass 38, count 0 2006.229.08:43:37.10#ibcon#about to read 3, iclass 38, count 0 2006.229.08:43:37.13#ibcon#read 3, iclass 38, count 0 2006.229.08:43:37.13#ibcon#about to read 4, iclass 38, count 0 2006.229.08:43:37.13#ibcon#read 4, iclass 38, count 0 2006.229.08:43:37.13#ibcon#about to read 5, iclass 38, count 0 2006.229.08:43:37.13#ibcon#read 5, iclass 38, count 0 2006.229.08:43:37.13#ibcon#about to read 6, iclass 38, count 0 2006.229.08:43:37.13#ibcon#read 6, iclass 38, count 0 2006.229.08:43:37.13#ibcon#end of sib2, iclass 38, count 0 2006.229.08:43:37.13#ibcon#*after write, iclass 38, count 0 2006.229.08:43:37.13#ibcon#*before return 0, iclass 38, count 0 2006.229.08:43:37.13#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:43:37.13#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.08:43:37.13#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:43:37.13#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:43:37.13$vck44/vblo=2,634.99 2006.229.08:43:37.13#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.08:43:37.13#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.08:43:37.13#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:37.13#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:37.13#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:37.13#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:37.13#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:43:37.13#ibcon#first serial, iclass 40, count 0 2006.229.08:43:37.13#ibcon#enter sib2, iclass 40, count 0 2006.229.08:43:37.13#ibcon#flushed, iclass 40, count 0 2006.229.08:43:37.13#ibcon#about to write, iclass 40, count 0 2006.229.08:43:37.13#ibcon#wrote, iclass 40, count 0 2006.229.08:43:37.13#ibcon#about to read 3, iclass 40, count 0 2006.229.08:43:37.15#ibcon#read 3, iclass 40, count 0 2006.229.08:43:37.15#ibcon#about to read 4, iclass 40, count 0 2006.229.08:43:37.15#ibcon#read 4, iclass 40, count 0 2006.229.08:43:37.15#ibcon#about to read 5, iclass 40, count 0 2006.229.08:43:37.15#ibcon#read 5, iclass 40, count 0 2006.229.08:43:37.15#ibcon#about to read 6, iclass 40, count 0 2006.229.08:43:37.15#ibcon#read 6, iclass 40, count 0 2006.229.08:43:37.15#ibcon#end of sib2, iclass 40, count 0 2006.229.08:43:37.15#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:43:37.15#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:43:37.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:43:37.15#ibcon#*before write, iclass 40, count 0 2006.229.08:43:37.15#ibcon#enter sib2, iclass 40, count 0 2006.229.08:43:37.15#ibcon#flushed, iclass 40, count 0 2006.229.08:43:37.15#ibcon#about to write, iclass 40, count 0 2006.229.08:43:37.15#ibcon#wrote, iclass 40, count 0 2006.229.08:43:37.15#ibcon#about to read 3, iclass 40, count 0 2006.229.08:43:37.19#ibcon#read 3, iclass 40, count 0 2006.229.08:43:37.19#ibcon#about to read 4, iclass 40, count 0 2006.229.08:43:37.19#ibcon#read 4, iclass 40, count 0 2006.229.08:43:37.19#ibcon#about to read 5, iclass 40, count 0 2006.229.08:43:37.19#ibcon#read 5, iclass 40, count 0 2006.229.08:43:37.19#ibcon#about to read 6, iclass 40, count 0 2006.229.08:43:37.19#ibcon#read 6, iclass 40, count 0 2006.229.08:43:37.19#ibcon#end of sib2, iclass 40, count 0 2006.229.08:43:37.19#ibcon#*after write, iclass 40, count 0 2006.229.08:43:37.19#ibcon#*before return 0, iclass 40, count 0 2006.229.08:43:37.19#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:37.19#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.08:43:37.19#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:43:37.19#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:43:37.19$vck44/vb=2,4 2006.229.08:43:37.19#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.08:43:37.19#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.08:43:37.19#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:37.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:37.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:37.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:37.25#ibcon#enter wrdev, iclass 4, count 2 2006.229.08:43:37.25#ibcon#first serial, iclass 4, count 2 2006.229.08:43:37.25#ibcon#enter sib2, iclass 4, count 2 2006.229.08:43:37.25#ibcon#flushed, iclass 4, count 2 2006.229.08:43:37.25#ibcon#about to write, iclass 4, count 2 2006.229.08:43:37.25#ibcon#wrote, iclass 4, count 2 2006.229.08:43:37.25#ibcon#about to read 3, iclass 4, count 2 2006.229.08:43:37.27#ibcon#read 3, iclass 4, count 2 2006.229.08:43:37.27#ibcon#about to read 4, iclass 4, count 2 2006.229.08:43:37.27#ibcon#read 4, iclass 4, count 2 2006.229.08:43:37.27#ibcon#about to read 5, iclass 4, count 2 2006.229.08:43:37.27#ibcon#read 5, iclass 4, count 2 2006.229.08:43:37.27#ibcon#about to read 6, iclass 4, count 2 2006.229.08:43:37.27#ibcon#read 6, iclass 4, count 2 2006.229.08:43:37.27#ibcon#end of sib2, iclass 4, count 2 2006.229.08:43:37.27#ibcon#*mode == 0, iclass 4, count 2 2006.229.08:43:37.27#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.08:43:37.27#ibcon#[27=AT02-04\r\n] 2006.229.08:43:37.27#ibcon#*before write, iclass 4, count 2 2006.229.08:43:37.27#ibcon#enter sib2, iclass 4, count 2 2006.229.08:43:37.27#ibcon#flushed, iclass 4, count 2 2006.229.08:43:37.27#ibcon#about to write, iclass 4, count 2 2006.229.08:43:37.27#ibcon#wrote, iclass 4, count 2 2006.229.08:43:37.27#ibcon#about to read 3, iclass 4, count 2 2006.229.08:43:37.30#ibcon#read 3, iclass 4, count 2 2006.229.08:43:37.30#ibcon#about to read 4, iclass 4, count 2 2006.229.08:43:37.30#ibcon#read 4, iclass 4, count 2 2006.229.08:43:37.30#ibcon#about to read 5, iclass 4, count 2 2006.229.08:43:37.30#ibcon#read 5, iclass 4, count 2 2006.229.08:43:37.30#ibcon#about to read 6, iclass 4, count 2 2006.229.08:43:37.30#ibcon#read 6, iclass 4, count 2 2006.229.08:43:37.30#ibcon#end of sib2, iclass 4, count 2 2006.229.08:43:37.30#ibcon#*after write, iclass 4, count 2 2006.229.08:43:37.30#ibcon#*before return 0, iclass 4, count 2 2006.229.08:43:37.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:37.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.08:43:37.30#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.08:43:37.30#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:37.30#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:37.42#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:37.42#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:37.42#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:43:37.42#ibcon#first serial, iclass 4, count 0 2006.229.08:43:37.42#ibcon#enter sib2, iclass 4, count 0 2006.229.08:43:37.42#ibcon#flushed, iclass 4, count 0 2006.229.08:43:37.42#ibcon#about to write, iclass 4, count 0 2006.229.08:43:37.42#ibcon#wrote, iclass 4, count 0 2006.229.08:43:37.42#ibcon#about to read 3, iclass 4, count 0 2006.229.08:43:37.44#ibcon#read 3, iclass 4, count 0 2006.229.08:43:37.44#ibcon#about to read 4, iclass 4, count 0 2006.229.08:43:37.44#ibcon#read 4, iclass 4, count 0 2006.229.08:43:37.44#ibcon#about to read 5, iclass 4, count 0 2006.229.08:43:37.44#ibcon#read 5, iclass 4, count 0 2006.229.08:43:37.44#ibcon#about to read 6, iclass 4, count 0 2006.229.08:43:37.44#ibcon#read 6, iclass 4, count 0 2006.229.08:43:37.44#ibcon#end of sib2, iclass 4, count 0 2006.229.08:43:37.44#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:43:37.44#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:43:37.44#ibcon#[27=USB\r\n] 2006.229.08:43:37.44#ibcon#*before write, iclass 4, count 0 2006.229.08:43:37.44#ibcon#enter sib2, iclass 4, count 0 2006.229.08:43:37.44#ibcon#flushed, iclass 4, count 0 2006.229.08:43:37.44#ibcon#about to write, iclass 4, count 0 2006.229.08:43:37.44#ibcon#wrote, iclass 4, count 0 2006.229.08:43:37.44#ibcon#about to read 3, iclass 4, count 0 2006.229.08:43:37.47#ibcon#read 3, iclass 4, count 0 2006.229.08:43:37.47#ibcon#about to read 4, iclass 4, count 0 2006.229.08:43:37.47#ibcon#read 4, iclass 4, count 0 2006.229.08:43:37.47#ibcon#about to read 5, iclass 4, count 0 2006.229.08:43:37.47#ibcon#read 5, iclass 4, count 0 2006.229.08:43:37.47#ibcon#about to read 6, iclass 4, count 0 2006.229.08:43:37.47#ibcon#read 6, iclass 4, count 0 2006.229.08:43:37.47#ibcon#end of sib2, iclass 4, count 0 2006.229.08:43:37.47#ibcon#*after write, iclass 4, count 0 2006.229.08:43:37.47#ibcon#*before return 0, iclass 4, count 0 2006.229.08:43:37.47#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:37.47#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.08:43:37.47#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:43:37.47#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:43:37.47$vck44/vblo=3,649.99 2006.229.08:43:37.47#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.08:43:37.47#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.08:43:37.47#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:37.47#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:37.47#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:37.47#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:37.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:43:37.47#ibcon#first serial, iclass 6, count 0 2006.229.08:43:37.47#ibcon#enter sib2, iclass 6, count 0 2006.229.08:43:37.47#ibcon#flushed, iclass 6, count 0 2006.229.08:43:37.47#ibcon#about to write, iclass 6, count 0 2006.229.08:43:37.47#ibcon#wrote, iclass 6, count 0 2006.229.08:43:37.47#ibcon#about to read 3, iclass 6, count 0 2006.229.08:43:37.49#ibcon#read 3, iclass 6, count 0 2006.229.08:43:37.49#ibcon#about to read 4, iclass 6, count 0 2006.229.08:43:37.49#ibcon#read 4, iclass 6, count 0 2006.229.08:43:37.49#ibcon#about to read 5, iclass 6, count 0 2006.229.08:43:37.49#ibcon#read 5, iclass 6, count 0 2006.229.08:43:37.49#ibcon#about to read 6, iclass 6, count 0 2006.229.08:43:37.49#ibcon#read 6, iclass 6, count 0 2006.229.08:43:37.49#ibcon#end of sib2, iclass 6, count 0 2006.229.08:43:37.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:43:37.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:43:37.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:43:37.49#ibcon#*before write, iclass 6, count 0 2006.229.08:43:37.49#ibcon#enter sib2, iclass 6, count 0 2006.229.08:43:37.49#ibcon#flushed, iclass 6, count 0 2006.229.08:43:37.49#ibcon#about to write, iclass 6, count 0 2006.229.08:43:37.49#ibcon#wrote, iclass 6, count 0 2006.229.08:43:37.49#ibcon#about to read 3, iclass 6, count 0 2006.229.08:43:37.53#ibcon#read 3, iclass 6, count 0 2006.229.08:43:37.53#ibcon#about to read 4, iclass 6, count 0 2006.229.08:43:37.53#ibcon#read 4, iclass 6, count 0 2006.229.08:43:37.53#ibcon#about to read 5, iclass 6, count 0 2006.229.08:43:37.53#ibcon#read 5, iclass 6, count 0 2006.229.08:43:37.53#ibcon#about to read 6, iclass 6, count 0 2006.229.08:43:37.53#ibcon#read 6, iclass 6, count 0 2006.229.08:43:37.53#ibcon#end of sib2, iclass 6, count 0 2006.229.08:43:37.53#ibcon#*after write, iclass 6, count 0 2006.229.08:43:37.53#ibcon#*before return 0, iclass 6, count 0 2006.229.08:43:37.53#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:37.53#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:43:37.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:43:37.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:43:37.53$vck44/vb=3,4 2006.229.08:43:37.53#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.08:43:37.53#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.08:43:37.53#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:37.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:37.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:37.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:37.59#ibcon#enter wrdev, iclass 10, count 2 2006.229.08:43:37.59#ibcon#first serial, iclass 10, count 2 2006.229.08:43:37.59#ibcon#enter sib2, iclass 10, count 2 2006.229.08:43:37.59#ibcon#flushed, iclass 10, count 2 2006.229.08:43:37.59#ibcon#about to write, iclass 10, count 2 2006.229.08:43:37.59#ibcon#wrote, iclass 10, count 2 2006.229.08:43:37.59#ibcon#about to read 3, iclass 10, count 2 2006.229.08:43:37.61#ibcon#read 3, iclass 10, count 2 2006.229.08:43:37.61#ibcon#about to read 4, iclass 10, count 2 2006.229.08:43:37.61#ibcon#read 4, iclass 10, count 2 2006.229.08:43:37.61#ibcon#about to read 5, iclass 10, count 2 2006.229.08:43:37.61#ibcon#read 5, iclass 10, count 2 2006.229.08:43:37.61#ibcon#about to read 6, iclass 10, count 2 2006.229.08:43:37.61#ibcon#read 6, iclass 10, count 2 2006.229.08:43:37.61#ibcon#end of sib2, iclass 10, count 2 2006.229.08:43:37.61#ibcon#*mode == 0, iclass 10, count 2 2006.229.08:43:37.61#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.08:43:37.61#ibcon#[27=AT03-04\r\n] 2006.229.08:43:37.61#ibcon#*before write, iclass 10, count 2 2006.229.08:43:37.61#ibcon#enter sib2, iclass 10, count 2 2006.229.08:43:37.61#ibcon#flushed, iclass 10, count 2 2006.229.08:43:37.61#ibcon#about to write, iclass 10, count 2 2006.229.08:43:37.61#ibcon#wrote, iclass 10, count 2 2006.229.08:43:37.61#ibcon#about to read 3, iclass 10, count 2 2006.229.08:43:37.64#ibcon#read 3, iclass 10, count 2 2006.229.08:43:37.64#ibcon#about to read 4, iclass 10, count 2 2006.229.08:43:37.64#ibcon#read 4, iclass 10, count 2 2006.229.08:43:37.64#ibcon#about to read 5, iclass 10, count 2 2006.229.08:43:37.64#ibcon#read 5, iclass 10, count 2 2006.229.08:43:37.64#ibcon#about to read 6, iclass 10, count 2 2006.229.08:43:37.64#ibcon#read 6, iclass 10, count 2 2006.229.08:43:37.64#ibcon#end of sib2, iclass 10, count 2 2006.229.08:43:37.64#ibcon#*after write, iclass 10, count 2 2006.229.08:43:37.64#ibcon#*before return 0, iclass 10, count 2 2006.229.08:43:37.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:37.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.08:43:37.64#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.08:43:37.64#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:37.64#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:37.76#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:37.76#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:37.76#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:43:37.76#ibcon#first serial, iclass 10, count 0 2006.229.08:43:37.76#ibcon#enter sib2, iclass 10, count 0 2006.229.08:43:37.76#ibcon#flushed, iclass 10, count 0 2006.229.08:43:37.76#ibcon#about to write, iclass 10, count 0 2006.229.08:43:37.76#ibcon#wrote, iclass 10, count 0 2006.229.08:43:37.76#ibcon#about to read 3, iclass 10, count 0 2006.229.08:43:37.78#ibcon#read 3, iclass 10, count 0 2006.229.08:43:37.78#ibcon#about to read 4, iclass 10, count 0 2006.229.08:43:37.78#ibcon#read 4, iclass 10, count 0 2006.229.08:43:37.78#ibcon#about to read 5, iclass 10, count 0 2006.229.08:43:37.78#ibcon#read 5, iclass 10, count 0 2006.229.08:43:37.78#ibcon#about to read 6, iclass 10, count 0 2006.229.08:43:37.78#ibcon#read 6, iclass 10, count 0 2006.229.08:43:37.78#ibcon#end of sib2, iclass 10, count 0 2006.229.08:43:37.78#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:43:37.78#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:43:37.78#ibcon#[27=USB\r\n] 2006.229.08:43:37.78#ibcon#*before write, iclass 10, count 0 2006.229.08:43:37.78#ibcon#enter sib2, iclass 10, count 0 2006.229.08:43:37.78#ibcon#flushed, iclass 10, count 0 2006.229.08:43:37.78#ibcon#about to write, iclass 10, count 0 2006.229.08:43:37.78#ibcon#wrote, iclass 10, count 0 2006.229.08:43:37.78#ibcon#about to read 3, iclass 10, count 0 2006.229.08:43:37.81#ibcon#read 3, iclass 10, count 0 2006.229.08:43:37.81#ibcon#about to read 4, iclass 10, count 0 2006.229.08:43:37.81#ibcon#read 4, iclass 10, count 0 2006.229.08:43:37.81#ibcon#about to read 5, iclass 10, count 0 2006.229.08:43:37.81#ibcon#read 5, iclass 10, count 0 2006.229.08:43:37.81#ibcon#about to read 6, iclass 10, count 0 2006.229.08:43:37.81#ibcon#read 6, iclass 10, count 0 2006.229.08:43:37.81#ibcon#end of sib2, iclass 10, count 0 2006.229.08:43:37.81#ibcon#*after write, iclass 10, count 0 2006.229.08:43:37.81#ibcon#*before return 0, iclass 10, count 0 2006.229.08:43:37.81#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:37.81#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.08:43:37.81#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:43:37.81#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:43:37.81$vck44/vblo=4,679.99 2006.229.08:43:37.81#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.08:43:37.81#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.08:43:37.81#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:37.81#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:37.81#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:37.81#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:37.81#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:43:37.81#ibcon#first serial, iclass 12, count 0 2006.229.08:43:37.81#ibcon#enter sib2, iclass 12, count 0 2006.229.08:43:37.81#ibcon#flushed, iclass 12, count 0 2006.229.08:43:37.81#ibcon#about to write, iclass 12, count 0 2006.229.08:43:37.81#ibcon#wrote, iclass 12, count 0 2006.229.08:43:37.81#ibcon#about to read 3, iclass 12, count 0 2006.229.08:43:37.83#ibcon#read 3, iclass 12, count 0 2006.229.08:43:37.83#ibcon#about to read 4, iclass 12, count 0 2006.229.08:43:37.83#ibcon#read 4, iclass 12, count 0 2006.229.08:43:37.83#ibcon#about to read 5, iclass 12, count 0 2006.229.08:43:37.83#ibcon#read 5, iclass 12, count 0 2006.229.08:43:37.83#ibcon#about to read 6, iclass 12, count 0 2006.229.08:43:37.83#ibcon#read 6, iclass 12, count 0 2006.229.08:43:37.83#ibcon#end of sib2, iclass 12, count 0 2006.229.08:43:37.83#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:43:37.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:43:37.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:43:37.83#ibcon#*before write, iclass 12, count 0 2006.229.08:43:37.83#ibcon#enter sib2, iclass 12, count 0 2006.229.08:43:37.83#ibcon#flushed, iclass 12, count 0 2006.229.08:43:37.83#ibcon#about to write, iclass 12, count 0 2006.229.08:43:37.83#ibcon#wrote, iclass 12, count 0 2006.229.08:43:37.83#ibcon#about to read 3, iclass 12, count 0 2006.229.08:43:37.87#ibcon#read 3, iclass 12, count 0 2006.229.08:43:37.87#ibcon#about to read 4, iclass 12, count 0 2006.229.08:43:37.87#ibcon#read 4, iclass 12, count 0 2006.229.08:43:37.87#ibcon#about to read 5, iclass 12, count 0 2006.229.08:43:37.87#ibcon#read 5, iclass 12, count 0 2006.229.08:43:37.87#ibcon#about to read 6, iclass 12, count 0 2006.229.08:43:37.87#ibcon#read 6, iclass 12, count 0 2006.229.08:43:37.87#ibcon#end of sib2, iclass 12, count 0 2006.229.08:43:37.87#ibcon#*after write, iclass 12, count 0 2006.229.08:43:37.87#ibcon#*before return 0, iclass 12, count 0 2006.229.08:43:37.87#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:37.87#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.08:43:37.87#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:43:37.87#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:43:37.87$vck44/vb=4,4 2006.229.08:43:37.87#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.08:43:37.87#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.08:43:37.87#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:37.87#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:37.93#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:37.93#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:37.93#ibcon#enter wrdev, iclass 14, count 2 2006.229.08:43:37.93#ibcon#first serial, iclass 14, count 2 2006.229.08:43:37.93#ibcon#enter sib2, iclass 14, count 2 2006.229.08:43:37.93#ibcon#flushed, iclass 14, count 2 2006.229.08:43:37.93#ibcon#about to write, iclass 14, count 2 2006.229.08:43:37.93#ibcon#wrote, iclass 14, count 2 2006.229.08:43:37.93#ibcon#about to read 3, iclass 14, count 2 2006.229.08:43:37.95#ibcon#read 3, iclass 14, count 2 2006.229.08:43:37.95#ibcon#about to read 4, iclass 14, count 2 2006.229.08:43:37.95#ibcon#read 4, iclass 14, count 2 2006.229.08:43:37.95#ibcon#about to read 5, iclass 14, count 2 2006.229.08:43:37.95#ibcon#read 5, iclass 14, count 2 2006.229.08:43:37.95#ibcon#about to read 6, iclass 14, count 2 2006.229.08:43:37.95#ibcon#read 6, iclass 14, count 2 2006.229.08:43:37.95#ibcon#end of sib2, iclass 14, count 2 2006.229.08:43:37.95#ibcon#*mode == 0, iclass 14, count 2 2006.229.08:43:37.95#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.08:43:37.95#ibcon#[27=AT04-04\r\n] 2006.229.08:43:37.95#ibcon#*before write, iclass 14, count 2 2006.229.08:43:37.95#ibcon#enter sib2, iclass 14, count 2 2006.229.08:43:37.95#ibcon#flushed, iclass 14, count 2 2006.229.08:43:37.95#ibcon#about to write, iclass 14, count 2 2006.229.08:43:37.95#ibcon#wrote, iclass 14, count 2 2006.229.08:43:37.95#ibcon#about to read 3, iclass 14, count 2 2006.229.08:43:37.98#ibcon#read 3, iclass 14, count 2 2006.229.08:43:37.98#ibcon#about to read 4, iclass 14, count 2 2006.229.08:43:37.98#ibcon#read 4, iclass 14, count 2 2006.229.08:43:37.98#ibcon#about to read 5, iclass 14, count 2 2006.229.08:43:37.98#ibcon#read 5, iclass 14, count 2 2006.229.08:43:37.98#ibcon#about to read 6, iclass 14, count 2 2006.229.08:43:37.98#ibcon#read 6, iclass 14, count 2 2006.229.08:43:37.98#ibcon#end of sib2, iclass 14, count 2 2006.229.08:43:37.98#ibcon#*after write, iclass 14, count 2 2006.229.08:43:37.98#ibcon#*before return 0, iclass 14, count 2 2006.229.08:43:37.98#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:37.98#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.08:43:37.98#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.08:43:37.98#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:37.98#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:38.10#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:38.10#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:38.10#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:43:38.10#ibcon#first serial, iclass 14, count 0 2006.229.08:43:38.10#ibcon#enter sib2, iclass 14, count 0 2006.229.08:43:38.10#ibcon#flushed, iclass 14, count 0 2006.229.08:43:38.10#ibcon#about to write, iclass 14, count 0 2006.229.08:43:38.10#ibcon#wrote, iclass 14, count 0 2006.229.08:43:38.10#ibcon#about to read 3, iclass 14, count 0 2006.229.08:43:38.12#ibcon#read 3, iclass 14, count 0 2006.229.08:43:38.12#ibcon#about to read 4, iclass 14, count 0 2006.229.08:43:38.12#ibcon#read 4, iclass 14, count 0 2006.229.08:43:38.12#ibcon#about to read 5, iclass 14, count 0 2006.229.08:43:38.12#ibcon#read 5, iclass 14, count 0 2006.229.08:43:38.12#ibcon#about to read 6, iclass 14, count 0 2006.229.08:43:38.12#ibcon#read 6, iclass 14, count 0 2006.229.08:43:38.12#ibcon#end of sib2, iclass 14, count 0 2006.229.08:43:38.12#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:43:38.12#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:43:38.12#ibcon#[27=USB\r\n] 2006.229.08:43:38.12#ibcon#*before write, iclass 14, count 0 2006.229.08:43:38.12#ibcon#enter sib2, iclass 14, count 0 2006.229.08:43:38.12#ibcon#flushed, iclass 14, count 0 2006.229.08:43:38.12#ibcon#about to write, iclass 14, count 0 2006.229.08:43:38.12#ibcon#wrote, iclass 14, count 0 2006.229.08:43:38.12#ibcon#about to read 3, iclass 14, count 0 2006.229.08:43:38.15#ibcon#read 3, iclass 14, count 0 2006.229.08:43:38.15#ibcon#about to read 4, iclass 14, count 0 2006.229.08:43:38.15#ibcon#read 4, iclass 14, count 0 2006.229.08:43:38.15#ibcon#about to read 5, iclass 14, count 0 2006.229.08:43:38.15#ibcon#read 5, iclass 14, count 0 2006.229.08:43:38.15#ibcon#about to read 6, iclass 14, count 0 2006.229.08:43:38.15#ibcon#read 6, iclass 14, count 0 2006.229.08:43:38.15#ibcon#end of sib2, iclass 14, count 0 2006.229.08:43:38.15#ibcon#*after write, iclass 14, count 0 2006.229.08:43:38.15#ibcon#*before return 0, iclass 14, count 0 2006.229.08:43:38.15#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:38.15#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.08:43:38.15#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:43:38.15#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:43:38.15$vck44/vblo=5,709.99 2006.229.08:43:38.15#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.08:43:38.15#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.08:43:38.15#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:38.15#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:38.15#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:38.15#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:38.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:43:38.15#ibcon#first serial, iclass 16, count 0 2006.229.08:43:38.15#ibcon#enter sib2, iclass 16, count 0 2006.229.08:43:38.15#ibcon#flushed, iclass 16, count 0 2006.229.08:43:38.15#ibcon#about to write, iclass 16, count 0 2006.229.08:43:38.15#ibcon#wrote, iclass 16, count 0 2006.229.08:43:38.15#ibcon#about to read 3, iclass 16, count 0 2006.229.08:43:38.17#ibcon#read 3, iclass 16, count 0 2006.229.08:43:38.17#ibcon#about to read 4, iclass 16, count 0 2006.229.08:43:38.17#ibcon#read 4, iclass 16, count 0 2006.229.08:43:38.17#ibcon#about to read 5, iclass 16, count 0 2006.229.08:43:38.17#ibcon#read 5, iclass 16, count 0 2006.229.08:43:38.17#ibcon#about to read 6, iclass 16, count 0 2006.229.08:43:38.17#ibcon#read 6, iclass 16, count 0 2006.229.08:43:38.17#ibcon#end of sib2, iclass 16, count 0 2006.229.08:43:38.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:43:38.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:43:38.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:43:38.17#ibcon#*before write, iclass 16, count 0 2006.229.08:43:38.17#ibcon#enter sib2, iclass 16, count 0 2006.229.08:43:38.17#ibcon#flushed, iclass 16, count 0 2006.229.08:43:38.17#ibcon#about to write, iclass 16, count 0 2006.229.08:43:38.17#ibcon#wrote, iclass 16, count 0 2006.229.08:43:38.17#ibcon#about to read 3, iclass 16, count 0 2006.229.08:43:38.21#ibcon#read 3, iclass 16, count 0 2006.229.08:43:38.21#ibcon#about to read 4, iclass 16, count 0 2006.229.08:43:38.21#ibcon#read 4, iclass 16, count 0 2006.229.08:43:38.21#ibcon#about to read 5, iclass 16, count 0 2006.229.08:43:38.21#ibcon#read 5, iclass 16, count 0 2006.229.08:43:38.21#ibcon#about to read 6, iclass 16, count 0 2006.229.08:43:38.21#ibcon#read 6, iclass 16, count 0 2006.229.08:43:38.21#ibcon#end of sib2, iclass 16, count 0 2006.229.08:43:38.21#ibcon#*after write, iclass 16, count 0 2006.229.08:43:38.21#ibcon#*before return 0, iclass 16, count 0 2006.229.08:43:38.21#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:38.21#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.08:43:38.21#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:43:38.21#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:43:38.21$vck44/vb=5,4 2006.229.08:43:38.21#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.08:43:38.21#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.08:43:38.21#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:38.21#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:38.27#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:38.27#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:38.27#ibcon#enter wrdev, iclass 18, count 2 2006.229.08:43:38.27#ibcon#first serial, iclass 18, count 2 2006.229.08:43:38.27#ibcon#enter sib2, iclass 18, count 2 2006.229.08:43:38.27#ibcon#flushed, iclass 18, count 2 2006.229.08:43:38.27#ibcon#about to write, iclass 18, count 2 2006.229.08:43:38.27#ibcon#wrote, iclass 18, count 2 2006.229.08:43:38.27#ibcon#about to read 3, iclass 18, count 2 2006.229.08:43:38.29#ibcon#read 3, iclass 18, count 2 2006.229.08:43:38.29#ibcon#about to read 4, iclass 18, count 2 2006.229.08:43:38.29#ibcon#read 4, iclass 18, count 2 2006.229.08:43:38.29#ibcon#about to read 5, iclass 18, count 2 2006.229.08:43:38.29#ibcon#read 5, iclass 18, count 2 2006.229.08:43:38.29#ibcon#about to read 6, iclass 18, count 2 2006.229.08:43:38.29#ibcon#read 6, iclass 18, count 2 2006.229.08:43:38.29#ibcon#end of sib2, iclass 18, count 2 2006.229.08:43:38.29#ibcon#*mode == 0, iclass 18, count 2 2006.229.08:43:38.29#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.08:43:38.29#ibcon#[27=AT05-04\r\n] 2006.229.08:43:38.29#ibcon#*before write, iclass 18, count 2 2006.229.08:43:38.29#ibcon#enter sib2, iclass 18, count 2 2006.229.08:43:38.29#ibcon#flushed, iclass 18, count 2 2006.229.08:43:38.29#ibcon#about to write, iclass 18, count 2 2006.229.08:43:38.29#ibcon#wrote, iclass 18, count 2 2006.229.08:43:38.29#ibcon#about to read 3, iclass 18, count 2 2006.229.08:43:38.32#ibcon#read 3, iclass 18, count 2 2006.229.08:43:38.32#ibcon#about to read 4, iclass 18, count 2 2006.229.08:43:38.32#ibcon#read 4, iclass 18, count 2 2006.229.08:43:38.32#ibcon#about to read 5, iclass 18, count 2 2006.229.08:43:38.32#ibcon#read 5, iclass 18, count 2 2006.229.08:43:38.32#ibcon#about to read 6, iclass 18, count 2 2006.229.08:43:38.32#ibcon#read 6, iclass 18, count 2 2006.229.08:43:38.32#ibcon#end of sib2, iclass 18, count 2 2006.229.08:43:38.32#ibcon#*after write, iclass 18, count 2 2006.229.08:43:38.32#ibcon#*before return 0, iclass 18, count 2 2006.229.08:43:38.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:38.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.08:43:38.32#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.08:43:38.32#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:38.32#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:38.44#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:38.44#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:38.44#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:43:38.44#ibcon#first serial, iclass 18, count 0 2006.229.08:43:38.44#ibcon#enter sib2, iclass 18, count 0 2006.229.08:43:38.44#ibcon#flushed, iclass 18, count 0 2006.229.08:43:38.44#ibcon#about to write, iclass 18, count 0 2006.229.08:43:38.44#ibcon#wrote, iclass 18, count 0 2006.229.08:43:38.44#ibcon#about to read 3, iclass 18, count 0 2006.229.08:43:38.46#ibcon#read 3, iclass 18, count 0 2006.229.08:43:38.46#ibcon#about to read 4, iclass 18, count 0 2006.229.08:43:38.46#ibcon#read 4, iclass 18, count 0 2006.229.08:43:38.46#ibcon#about to read 5, iclass 18, count 0 2006.229.08:43:38.46#ibcon#read 5, iclass 18, count 0 2006.229.08:43:38.46#ibcon#about to read 6, iclass 18, count 0 2006.229.08:43:38.46#ibcon#read 6, iclass 18, count 0 2006.229.08:43:38.46#ibcon#end of sib2, iclass 18, count 0 2006.229.08:43:38.46#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:43:38.46#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:43:38.46#ibcon#[27=USB\r\n] 2006.229.08:43:38.46#ibcon#*before write, iclass 18, count 0 2006.229.08:43:38.46#ibcon#enter sib2, iclass 18, count 0 2006.229.08:43:38.46#ibcon#flushed, iclass 18, count 0 2006.229.08:43:38.46#ibcon#about to write, iclass 18, count 0 2006.229.08:43:38.46#ibcon#wrote, iclass 18, count 0 2006.229.08:43:38.46#ibcon#about to read 3, iclass 18, count 0 2006.229.08:43:38.49#ibcon#read 3, iclass 18, count 0 2006.229.08:43:38.49#ibcon#about to read 4, iclass 18, count 0 2006.229.08:43:38.49#ibcon#read 4, iclass 18, count 0 2006.229.08:43:38.49#ibcon#about to read 5, iclass 18, count 0 2006.229.08:43:38.49#ibcon#read 5, iclass 18, count 0 2006.229.08:43:38.49#ibcon#about to read 6, iclass 18, count 0 2006.229.08:43:38.49#ibcon#read 6, iclass 18, count 0 2006.229.08:43:38.49#ibcon#end of sib2, iclass 18, count 0 2006.229.08:43:38.49#ibcon#*after write, iclass 18, count 0 2006.229.08:43:38.49#ibcon#*before return 0, iclass 18, count 0 2006.229.08:43:38.49#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:38.49#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.08:43:38.49#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:43:38.49#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:43:38.49$vck44/vblo=6,719.99 2006.229.08:43:38.49#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.08:43:38.49#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.08:43:38.49#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:38.49#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:38.49#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:38.49#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:38.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:43:38.49#ibcon#first serial, iclass 20, count 0 2006.229.08:43:38.49#ibcon#enter sib2, iclass 20, count 0 2006.229.08:43:38.49#ibcon#flushed, iclass 20, count 0 2006.229.08:43:38.49#ibcon#about to write, iclass 20, count 0 2006.229.08:43:38.49#ibcon#wrote, iclass 20, count 0 2006.229.08:43:38.49#ibcon#about to read 3, iclass 20, count 0 2006.229.08:43:38.51#ibcon#read 3, iclass 20, count 0 2006.229.08:43:38.51#ibcon#about to read 4, iclass 20, count 0 2006.229.08:43:38.51#ibcon#read 4, iclass 20, count 0 2006.229.08:43:38.51#ibcon#about to read 5, iclass 20, count 0 2006.229.08:43:38.51#ibcon#read 5, iclass 20, count 0 2006.229.08:43:38.51#ibcon#about to read 6, iclass 20, count 0 2006.229.08:43:38.51#ibcon#read 6, iclass 20, count 0 2006.229.08:43:38.51#ibcon#end of sib2, iclass 20, count 0 2006.229.08:43:38.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:43:38.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:43:38.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:43:38.51#ibcon#*before write, iclass 20, count 0 2006.229.08:43:38.51#ibcon#enter sib2, iclass 20, count 0 2006.229.08:43:38.51#ibcon#flushed, iclass 20, count 0 2006.229.08:43:38.51#ibcon#about to write, iclass 20, count 0 2006.229.08:43:38.51#ibcon#wrote, iclass 20, count 0 2006.229.08:43:38.51#ibcon#about to read 3, iclass 20, count 0 2006.229.08:43:38.55#ibcon#read 3, iclass 20, count 0 2006.229.08:43:38.55#ibcon#about to read 4, iclass 20, count 0 2006.229.08:43:38.55#ibcon#read 4, iclass 20, count 0 2006.229.08:43:38.55#ibcon#about to read 5, iclass 20, count 0 2006.229.08:43:38.55#ibcon#read 5, iclass 20, count 0 2006.229.08:43:38.55#ibcon#about to read 6, iclass 20, count 0 2006.229.08:43:38.55#ibcon#read 6, iclass 20, count 0 2006.229.08:43:38.55#ibcon#end of sib2, iclass 20, count 0 2006.229.08:43:38.55#ibcon#*after write, iclass 20, count 0 2006.229.08:43:38.55#ibcon#*before return 0, iclass 20, count 0 2006.229.08:43:38.55#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:38.55#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.08:43:38.55#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:43:38.55#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:43:38.55$vck44/vb=6,4 2006.229.08:43:38.55#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.08:43:38.55#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.08:43:38.55#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:38.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:38.61#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:38.61#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:38.61#ibcon#enter wrdev, iclass 22, count 2 2006.229.08:43:38.61#ibcon#first serial, iclass 22, count 2 2006.229.08:43:38.61#ibcon#enter sib2, iclass 22, count 2 2006.229.08:43:38.61#ibcon#flushed, iclass 22, count 2 2006.229.08:43:38.61#ibcon#about to write, iclass 22, count 2 2006.229.08:43:38.61#ibcon#wrote, iclass 22, count 2 2006.229.08:43:38.61#ibcon#about to read 3, iclass 22, count 2 2006.229.08:43:38.63#ibcon#read 3, iclass 22, count 2 2006.229.08:43:38.63#ibcon#about to read 4, iclass 22, count 2 2006.229.08:43:38.63#ibcon#read 4, iclass 22, count 2 2006.229.08:43:38.63#ibcon#about to read 5, iclass 22, count 2 2006.229.08:43:38.63#ibcon#read 5, iclass 22, count 2 2006.229.08:43:38.63#ibcon#about to read 6, iclass 22, count 2 2006.229.08:43:38.63#ibcon#read 6, iclass 22, count 2 2006.229.08:43:38.63#ibcon#end of sib2, iclass 22, count 2 2006.229.08:43:38.63#ibcon#*mode == 0, iclass 22, count 2 2006.229.08:43:38.63#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.08:43:38.63#ibcon#[27=AT06-04\r\n] 2006.229.08:43:38.63#ibcon#*before write, iclass 22, count 2 2006.229.08:43:38.63#ibcon#enter sib2, iclass 22, count 2 2006.229.08:43:38.63#ibcon#flushed, iclass 22, count 2 2006.229.08:43:38.63#ibcon#about to write, iclass 22, count 2 2006.229.08:43:38.63#ibcon#wrote, iclass 22, count 2 2006.229.08:43:38.63#ibcon#about to read 3, iclass 22, count 2 2006.229.08:43:38.66#ibcon#read 3, iclass 22, count 2 2006.229.08:43:38.66#ibcon#about to read 4, iclass 22, count 2 2006.229.08:43:38.66#ibcon#read 4, iclass 22, count 2 2006.229.08:43:38.66#ibcon#about to read 5, iclass 22, count 2 2006.229.08:43:38.66#ibcon#read 5, iclass 22, count 2 2006.229.08:43:38.66#ibcon#about to read 6, iclass 22, count 2 2006.229.08:43:38.66#ibcon#read 6, iclass 22, count 2 2006.229.08:43:38.66#ibcon#end of sib2, iclass 22, count 2 2006.229.08:43:38.66#ibcon#*after write, iclass 22, count 2 2006.229.08:43:38.66#ibcon#*before return 0, iclass 22, count 2 2006.229.08:43:38.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:38.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.08:43:38.66#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.08:43:38.66#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:38.66#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:38.78#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:38.78#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:38.78#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:43:38.78#ibcon#first serial, iclass 22, count 0 2006.229.08:43:38.78#ibcon#enter sib2, iclass 22, count 0 2006.229.08:43:38.78#ibcon#flushed, iclass 22, count 0 2006.229.08:43:38.78#ibcon#about to write, iclass 22, count 0 2006.229.08:43:38.78#ibcon#wrote, iclass 22, count 0 2006.229.08:43:38.78#ibcon#about to read 3, iclass 22, count 0 2006.229.08:43:38.80#ibcon#read 3, iclass 22, count 0 2006.229.08:43:38.80#ibcon#about to read 4, iclass 22, count 0 2006.229.08:43:38.80#ibcon#read 4, iclass 22, count 0 2006.229.08:43:38.80#ibcon#about to read 5, iclass 22, count 0 2006.229.08:43:38.80#ibcon#read 5, iclass 22, count 0 2006.229.08:43:38.80#ibcon#about to read 6, iclass 22, count 0 2006.229.08:43:38.80#ibcon#read 6, iclass 22, count 0 2006.229.08:43:38.80#ibcon#end of sib2, iclass 22, count 0 2006.229.08:43:38.80#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:43:38.80#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:43:38.80#ibcon#[27=USB\r\n] 2006.229.08:43:38.80#ibcon#*before write, iclass 22, count 0 2006.229.08:43:38.80#ibcon#enter sib2, iclass 22, count 0 2006.229.08:43:38.80#ibcon#flushed, iclass 22, count 0 2006.229.08:43:38.80#ibcon#about to write, iclass 22, count 0 2006.229.08:43:38.80#ibcon#wrote, iclass 22, count 0 2006.229.08:43:38.80#ibcon#about to read 3, iclass 22, count 0 2006.229.08:43:38.83#ibcon#read 3, iclass 22, count 0 2006.229.08:43:38.83#ibcon#about to read 4, iclass 22, count 0 2006.229.08:43:38.83#ibcon#read 4, iclass 22, count 0 2006.229.08:43:38.83#ibcon#about to read 5, iclass 22, count 0 2006.229.08:43:38.83#ibcon#read 5, iclass 22, count 0 2006.229.08:43:38.83#ibcon#about to read 6, iclass 22, count 0 2006.229.08:43:38.83#ibcon#read 6, iclass 22, count 0 2006.229.08:43:38.83#ibcon#end of sib2, iclass 22, count 0 2006.229.08:43:38.83#ibcon#*after write, iclass 22, count 0 2006.229.08:43:38.83#ibcon#*before return 0, iclass 22, count 0 2006.229.08:43:38.83#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:38.83#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.08:43:38.83#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:43:38.83#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:43:38.83$vck44/vblo=7,734.99 2006.229.08:43:38.83#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.08:43:38.83#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.08:43:38.83#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:38.83#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:38.83#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:38.83#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:38.83#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:43:38.83#ibcon#first serial, iclass 24, count 0 2006.229.08:43:38.83#ibcon#enter sib2, iclass 24, count 0 2006.229.08:43:38.83#ibcon#flushed, iclass 24, count 0 2006.229.08:43:38.83#ibcon#about to write, iclass 24, count 0 2006.229.08:43:38.83#ibcon#wrote, iclass 24, count 0 2006.229.08:43:38.83#ibcon#about to read 3, iclass 24, count 0 2006.229.08:43:38.85#ibcon#read 3, iclass 24, count 0 2006.229.08:43:38.85#ibcon#about to read 4, iclass 24, count 0 2006.229.08:43:38.85#ibcon#read 4, iclass 24, count 0 2006.229.08:43:38.85#ibcon#about to read 5, iclass 24, count 0 2006.229.08:43:38.85#ibcon#read 5, iclass 24, count 0 2006.229.08:43:38.85#ibcon#about to read 6, iclass 24, count 0 2006.229.08:43:38.85#ibcon#read 6, iclass 24, count 0 2006.229.08:43:38.85#ibcon#end of sib2, iclass 24, count 0 2006.229.08:43:38.85#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:43:38.85#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:43:38.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:43:38.85#ibcon#*before write, iclass 24, count 0 2006.229.08:43:38.85#ibcon#enter sib2, iclass 24, count 0 2006.229.08:43:38.85#ibcon#flushed, iclass 24, count 0 2006.229.08:43:38.85#ibcon#about to write, iclass 24, count 0 2006.229.08:43:38.85#ibcon#wrote, iclass 24, count 0 2006.229.08:43:38.85#ibcon#about to read 3, iclass 24, count 0 2006.229.08:43:38.89#ibcon#read 3, iclass 24, count 0 2006.229.08:43:38.89#ibcon#about to read 4, iclass 24, count 0 2006.229.08:43:38.89#ibcon#read 4, iclass 24, count 0 2006.229.08:43:38.89#ibcon#about to read 5, iclass 24, count 0 2006.229.08:43:38.89#ibcon#read 5, iclass 24, count 0 2006.229.08:43:38.89#ibcon#about to read 6, iclass 24, count 0 2006.229.08:43:38.89#ibcon#read 6, iclass 24, count 0 2006.229.08:43:38.89#ibcon#end of sib2, iclass 24, count 0 2006.229.08:43:38.89#ibcon#*after write, iclass 24, count 0 2006.229.08:43:38.89#ibcon#*before return 0, iclass 24, count 0 2006.229.08:43:38.89#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:38.89#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.08:43:38.89#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:43:38.89#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:43:38.89$vck44/vb=7,4 2006.229.08:43:38.89#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.08:43:38.89#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.08:43:38.89#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:38.89#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:38.95#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:38.95#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:38.95#ibcon#enter wrdev, iclass 26, count 2 2006.229.08:43:38.95#ibcon#first serial, iclass 26, count 2 2006.229.08:43:38.95#ibcon#enter sib2, iclass 26, count 2 2006.229.08:43:38.95#ibcon#flushed, iclass 26, count 2 2006.229.08:43:38.95#ibcon#about to write, iclass 26, count 2 2006.229.08:43:38.95#ibcon#wrote, iclass 26, count 2 2006.229.08:43:38.95#ibcon#about to read 3, iclass 26, count 2 2006.229.08:43:38.97#ibcon#read 3, iclass 26, count 2 2006.229.08:43:38.97#ibcon#about to read 4, iclass 26, count 2 2006.229.08:43:38.97#ibcon#read 4, iclass 26, count 2 2006.229.08:43:38.97#ibcon#about to read 5, iclass 26, count 2 2006.229.08:43:38.97#ibcon#read 5, iclass 26, count 2 2006.229.08:43:38.97#ibcon#about to read 6, iclass 26, count 2 2006.229.08:43:38.97#ibcon#read 6, iclass 26, count 2 2006.229.08:43:38.97#ibcon#end of sib2, iclass 26, count 2 2006.229.08:43:38.97#ibcon#*mode == 0, iclass 26, count 2 2006.229.08:43:38.97#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.08:43:38.97#ibcon#[27=AT07-04\r\n] 2006.229.08:43:38.97#ibcon#*before write, iclass 26, count 2 2006.229.08:43:38.97#ibcon#enter sib2, iclass 26, count 2 2006.229.08:43:38.97#ibcon#flushed, iclass 26, count 2 2006.229.08:43:38.97#ibcon#about to write, iclass 26, count 2 2006.229.08:43:38.97#ibcon#wrote, iclass 26, count 2 2006.229.08:43:38.97#ibcon#about to read 3, iclass 26, count 2 2006.229.08:43:39.00#ibcon#read 3, iclass 26, count 2 2006.229.08:43:39.00#ibcon#about to read 4, iclass 26, count 2 2006.229.08:43:39.00#ibcon#read 4, iclass 26, count 2 2006.229.08:43:39.00#ibcon#about to read 5, iclass 26, count 2 2006.229.08:43:39.00#ibcon#read 5, iclass 26, count 2 2006.229.08:43:39.00#ibcon#about to read 6, iclass 26, count 2 2006.229.08:43:39.00#ibcon#read 6, iclass 26, count 2 2006.229.08:43:39.00#ibcon#end of sib2, iclass 26, count 2 2006.229.08:43:39.00#ibcon#*after write, iclass 26, count 2 2006.229.08:43:39.00#ibcon#*before return 0, iclass 26, count 2 2006.229.08:43:39.00#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:39.00#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.08:43:39.00#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.08:43:39.00#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:39.00#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:39.12#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:39.12#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:39.12#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:43:39.12#ibcon#first serial, iclass 26, count 0 2006.229.08:43:39.12#ibcon#enter sib2, iclass 26, count 0 2006.229.08:43:39.12#ibcon#flushed, iclass 26, count 0 2006.229.08:43:39.12#ibcon#about to write, iclass 26, count 0 2006.229.08:43:39.12#ibcon#wrote, iclass 26, count 0 2006.229.08:43:39.12#ibcon#about to read 3, iclass 26, count 0 2006.229.08:43:39.14#ibcon#read 3, iclass 26, count 0 2006.229.08:43:39.14#ibcon#about to read 4, iclass 26, count 0 2006.229.08:43:39.14#ibcon#read 4, iclass 26, count 0 2006.229.08:43:39.14#ibcon#about to read 5, iclass 26, count 0 2006.229.08:43:39.14#ibcon#read 5, iclass 26, count 0 2006.229.08:43:39.14#ibcon#about to read 6, iclass 26, count 0 2006.229.08:43:39.14#ibcon#read 6, iclass 26, count 0 2006.229.08:43:39.14#ibcon#end of sib2, iclass 26, count 0 2006.229.08:43:39.14#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:43:39.14#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:43:39.14#ibcon#[27=USB\r\n] 2006.229.08:43:39.14#ibcon#*before write, iclass 26, count 0 2006.229.08:43:39.14#ibcon#enter sib2, iclass 26, count 0 2006.229.08:43:39.14#ibcon#flushed, iclass 26, count 0 2006.229.08:43:39.14#ibcon#about to write, iclass 26, count 0 2006.229.08:43:39.14#ibcon#wrote, iclass 26, count 0 2006.229.08:43:39.14#ibcon#about to read 3, iclass 26, count 0 2006.229.08:43:39.17#ibcon#read 3, iclass 26, count 0 2006.229.08:43:39.17#ibcon#about to read 4, iclass 26, count 0 2006.229.08:43:39.17#ibcon#read 4, iclass 26, count 0 2006.229.08:43:39.17#ibcon#about to read 5, iclass 26, count 0 2006.229.08:43:39.17#ibcon#read 5, iclass 26, count 0 2006.229.08:43:39.17#ibcon#about to read 6, iclass 26, count 0 2006.229.08:43:39.17#ibcon#read 6, iclass 26, count 0 2006.229.08:43:39.17#ibcon#end of sib2, iclass 26, count 0 2006.229.08:43:39.17#ibcon#*after write, iclass 26, count 0 2006.229.08:43:39.17#ibcon#*before return 0, iclass 26, count 0 2006.229.08:43:39.17#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:39.17#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.08:43:39.17#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:43:39.17#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:43:39.17$vck44/vblo=8,744.99 2006.229.08:43:39.17#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.08:43:39.17#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.08:43:39.17#ibcon#ireg 17 cls_cnt 0 2006.229.08:43:39.17#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:39.17#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:39.17#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:39.17#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:43:39.17#ibcon#first serial, iclass 28, count 0 2006.229.08:43:39.17#ibcon#enter sib2, iclass 28, count 0 2006.229.08:43:39.17#ibcon#flushed, iclass 28, count 0 2006.229.08:43:39.17#ibcon#about to write, iclass 28, count 0 2006.229.08:43:39.17#ibcon#wrote, iclass 28, count 0 2006.229.08:43:39.17#ibcon#about to read 3, iclass 28, count 0 2006.229.08:43:39.19#ibcon#read 3, iclass 28, count 0 2006.229.08:43:39.19#ibcon#about to read 4, iclass 28, count 0 2006.229.08:43:39.19#ibcon#read 4, iclass 28, count 0 2006.229.08:43:39.19#ibcon#about to read 5, iclass 28, count 0 2006.229.08:43:39.19#ibcon#read 5, iclass 28, count 0 2006.229.08:43:39.19#ibcon#about to read 6, iclass 28, count 0 2006.229.08:43:39.19#ibcon#read 6, iclass 28, count 0 2006.229.08:43:39.19#ibcon#end of sib2, iclass 28, count 0 2006.229.08:43:39.19#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:43:39.19#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:43:39.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:43:39.19#ibcon#*before write, iclass 28, count 0 2006.229.08:43:39.19#ibcon#enter sib2, iclass 28, count 0 2006.229.08:43:39.19#ibcon#flushed, iclass 28, count 0 2006.229.08:43:39.19#ibcon#about to write, iclass 28, count 0 2006.229.08:43:39.19#ibcon#wrote, iclass 28, count 0 2006.229.08:43:39.19#ibcon#about to read 3, iclass 28, count 0 2006.229.08:43:39.23#ibcon#read 3, iclass 28, count 0 2006.229.08:43:39.23#ibcon#about to read 4, iclass 28, count 0 2006.229.08:43:39.23#ibcon#read 4, iclass 28, count 0 2006.229.08:43:39.23#ibcon#about to read 5, iclass 28, count 0 2006.229.08:43:39.23#ibcon#read 5, iclass 28, count 0 2006.229.08:43:39.23#ibcon#about to read 6, iclass 28, count 0 2006.229.08:43:39.23#ibcon#read 6, iclass 28, count 0 2006.229.08:43:39.23#ibcon#end of sib2, iclass 28, count 0 2006.229.08:43:39.23#ibcon#*after write, iclass 28, count 0 2006.229.08:43:39.23#ibcon#*before return 0, iclass 28, count 0 2006.229.08:43:39.23#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:39.23#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.08:43:39.23#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:43:39.23#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:43:39.23$vck44/vb=8,4 2006.229.08:43:39.23#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.08:43:39.23#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.08:43:39.23#ibcon#ireg 11 cls_cnt 2 2006.229.08:43:39.23#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:39.29#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:39.29#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:39.29#ibcon#enter wrdev, iclass 30, count 2 2006.229.08:43:39.29#ibcon#first serial, iclass 30, count 2 2006.229.08:43:39.29#ibcon#enter sib2, iclass 30, count 2 2006.229.08:43:39.29#ibcon#flushed, iclass 30, count 2 2006.229.08:43:39.29#ibcon#about to write, iclass 30, count 2 2006.229.08:43:39.29#ibcon#wrote, iclass 30, count 2 2006.229.08:43:39.29#ibcon#about to read 3, iclass 30, count 2 2006.229.08:43:39.31#ibcon#read 3, iclass 30, count 2 2006.229.08:43:39.31#ibcon#about to read 4, iclass 30, count 2 2006.229.08:43:39.31#ibcon#read 4, iclass 30, count 2 2006.229.08:43:39.31#ibcon#about to read 5, iclass 30, count 2 2006.229.08:43:39.31#ibcon#read 5, iclass 30, count 2 2006.229.08:43:39.31#ibcon#about to read 6, iclass 30, count 2 2006.229.08:43:39.31#ibcon#read 6, iclass 30, count 2 2006.229.08:43:39.31#ibcon#end of sib2, iclass 30, count 2 2006.229.08:43:39.31#ibcon#*mode == 0, iclass 30, count 2 2006.229.08:43:39.31#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.08:43:39.31#ibcon#[27=AT08-04\r\n] 2006.229.08:43:39.31#ibcon#*before write, iclass 30, count 2 2006.229.08:43:39.31#ibcon#enter sib2, iclass 30, count 2 2006.229.08:43:39.31#ibcon#flushed, iclass 30, count 2 2006.229.08:43:39.31#ibcon#about to write, iclass 30, count 2 2006.229.08:43:39.31#ibcon#wrote, iclass 30, count 2 2006.229.08:43:39.31#ibcon#about to read 3, iclass 30, count 2 2006.229.08:43:39.34#ibcon#read 3, iclass 30, count 2 2006.229.08:43:39.34#ibcon#about to read 4, iclass 30, count 2 2006.229.08:43:39.34#ibcon#read 4, iclass 30, count 2 2006.229.08:43:39.34#ibcon#about to read 5, iclass 30, count 2 2006.229.08:43:39.34#ibcon#read 5, iclass 30, count 2 2006.229.08:43:39.34#ibcon#about to read 6, iclass 30, count 2 2006.229.08:43:39.34#ibcon#read 6, iclass 30, count 2 2006.229.08:43:39.34#ibcon#end of sib2, iclass 30, count 2 2006.229.08:43:39.34#ibcon#*after write, iclass 30, count 2 2006.229.08:43:39.34#ibcon#*before return 0, iclass 30, count 2 2006.229.08:43:39.34#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:39.34#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.08:43:39.34#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.08:43:39.34#ibcon#ireg 7 cls_cnt 0 2006.229.08:43:39.34#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:39.46#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:39.46#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:39.46#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:43:39.46#ibcon#first serial, iclass 30, count 0 2006.229.08:43:39.46#ibcon#enter sib2, iclass 30, count 0 2006.229.08:43:39.46#ibcon#flushed, iclass 30, count 0 2006.229.08:43:39.46#ibcon#about to write, iclass 30, count 0 2006.229.08:43:39.46#ibcon#wrote, iclass 30, count 0 2006.229.08:43:39.46#ibcon#about to read 3, iclass 30, count 0 2006.229.08:43:39.48#ibcon#read 3, iclass 30, count 0 2006.229.08:43:39.48#ibcon#about to read 4, iclass 30, count 0 2006.229.08:43:39.48#ibcon#read 4, iclass 30, count 0 2006.229.08:43:39.48#ibcon#about to read 5, iclass 30, count 0 2006.229.08:43:39.48#ibcon#read 5, iclass 30, count 0 2006.229.08:43:39.48#ibcon#about to read 6, iclass 30, count 0 2006.229.08:43:39.48#ibcon#read 6, iclass 30, count 0 2006.229.08:43:39.48#ibcon#end of sib2, iclass 30, count 0 2006.229.08:43:39.48#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:43:39.48#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:43:39.48#ibcon#[27=USB\r\n] 2006.229.08:43:39.48#ibcon#*before write, iclass 30, count 0 2006.229.08:43:39.48#ibcon#enter sib2, iclass 30, count 0 2006.229.08:43:39.48#ibcon#flushed, iclass 30, count 0 2006.229.08:43:39.48#ibcon#about to write, iclass 30, count 0 2006.229.08:43:39.48#ibcon#wrote, iclass 30, count 0 2006.229.08:43:39.48#ibcon#about to read 3, iclass 30, count 0 2006.229.08:43:39.51#ibcon#read 3, iclass 30, count 0 2006.229.08:43:39.51#ibcon#about to read 4, iclass 30, count 0 2006.229.08:43:39.51#ibcon#read 4, iclass 30, count 0 2006.229.08:43:39.51#ibcon#about to read 5, iclass 30, count 0 2006.229.08:43:39.51#ibcon#read 5, iclass 30, count 0 2006.229.08:43:39.51#ibcon#about to read 6, iclass 30, count 0 2006.229.08:43:39.51#ibcon#read 6, iclass 30, count 0 2006.229.08:43:39.51#ibcon#end of sib2, iclass 30, count 0 2006.229.08:43:39.51#ibcon#*after write, iclass 30, count 0 2006.229.08:43:39.51#ibcon#*before return 0, iclass 30, count 0 2006.229.08:43:39.51#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:39.51#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.08:43:39.51#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:43:39.51#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:43:39.51$vck44/vabw=wide 2006.229.08:43:39.51#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.08:43:39.51#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.08:43:39.51#ibcon#ireg 8 cls_cnt 0 2006.229.08:43:39.51#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:39.51#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:39.51#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:39.51#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:43:39.51#ibcon#first serial, iclass 32, count 0 2006.229.08:43:39.51#ibcon#enter sib2, iclass 32, count 0 2006.229.08:43:39.51#ibcon#flushed, iclass 32, count 0 2006.229.08:43:39.51#ibcon#about to write, iclass 32, count 0 2006.229.08:43:39.51#ibcon#wrote, iclass 32, count 0 2006.229.08:43:39.51#ibcon#about to read 3, iclass 32, count 0 2006.229.08:43:39.53#ibcon#read 3, iclass 32, count 0 2006.229.08:43:39.53#ibcon#about to read 4, iclass 32, count 0 2006.229.08:43:39.53#ibcon#read 4, iclass 32, count 0 2006.229.08:43:39.53#ibcon#about to read 5, iclass 32, count 0 2006.229.08:43:39.53#ibcon#read 5, iclass 32, count 0 2006.229.08:43:39.53#ibcon#about to read 6, iclass 32, count 0 2006.229.08:43:39.53#ibcon#read 6, iclass 32, count 0 2006.229.08:43:39.53#ibcon#end of sib2, iclass 32, count 0 2006.229.08:43:39.53#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:43:39.53#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:43:39.53#ibcon#[25=BW32\r\n] 2006.229.08:43:39.53#ibcon#*before write, iclass 32, count 0 2006.229.08:43:39.53#ibcon#enter sib2, iclass 32, count 0 2006.229.08:43:39.53#ibcon#flushed, iclass 32, count 0 2006.229.08:43:39.53#ibcon#about to write, iclass 32, count 0 2006.229.08:43:39.53#ibcon#wrote, iclass 32, count 0 2006.229.08:43:39.53#ibcon#about to read 3, iclass 32, count 0 2006.229.08:43:39.56#ibcon#read 3, iclass 32, count 0 2006.229.08:43:39.56#ibcon#about to read 4, iclass 32, count 0 2006.229.08:43:39.56#ibcon#read 4, iclass 32, count 0 2006.229.08:43:39.56#ibcon#about to read 5, iclass 32, count 0 2006.229.08:43:39.56#ibcon#read 5, iclass 32, count 0 2006.229.08:43:39.56#ibcon#about to read 6, iclass 32, count 0 2006.229.08:43:39.56#ibcon#read 6, iclass 32, count 0 2006.229.08:43:39.56#ibcon#end of sib2, iclass 32, count 0 2006.229.08:43:39.56#ibcon#*after write, iclass 32, count 0 2006.229.08:43:39.56#ibcon#*before return 0, iclass 32, count 0 2006.229.08:43:39.56#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:39.56#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.08:43:39.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:43:39.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:43:39.56$vck44/vbbw=wide 2006.229.08:43:39.56#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:43:39.56#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:43:39.56#ibcon#ireg 8 cls_cnt 0 2006.229.08:43:39.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:43:39.63#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:43:39.63#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:43:39.63#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:43:39.63#ibcon#first serial, iclass 34, count 0 2006.229.08:43:39.63#ibcon#enter sib2, iclass 34, count 0 2006.229.08:43:39.63#ibcon#flushed, iclass 34, count 0 2006.229.08:43:39.63#ibcon#about to write, iclass 34, count 0 2006.229.08:43:39.63#ibcon#wrote, iclass 34, count 0 2006.229.08:43:39.63#ibcon#about to read 3, iclass 34, count 0 2006.229.08:43:39.65#ibcon#read 3, iclass 34, count 0 2006.229.08:43:39.65#ibcon#about to read 4, iclass 34, count 0 2006.229.08:43:39.65#ibcon#read 4, iclass 34, count 0 2006.229.08:43:39.65#ibcon#about to read 5, iclass 34, count 0 2006.229.08:43:39.65#ibcon#read 5, iclass 34, count 0 2006.229.08:43:39.65#ibcon#about to read 6, iclass 34, count 0 2006.229.08:43:39.65#ibcon#read 6, iclass 34, count 0 2006.229.08:43:39.65#ibcon#end of sib2, iclass 34, count 0 2006.229.08:43:39.65#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:43:39.65#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:43:39.65#ibcon#[27=BW32\r\n] 2006.229.08:43:39.65#ibcon#*before write, iclass 34, count 0 2006.229.08:43:39.65#ibcon#enter sib2, iclass 34, count 0 2006.229.08:43:39.65#ibcon#flushed, iclass 34, count 0 2006.229.08:43:39.65#ibcon#about to write, iclass 34, count 0 2006.229.08:43:39.65#ibcon#wrote, iclass 34, count 0 2006.229.08:43:39.65#ibcon#about to read 3, iclass 34, count 0 2006.229.08:43:39.68#ibcon#read 3, iclass 34, count 0 2006.229.08:43:39.68#ibcon#about to read 4, iclass 34, count 0 2006.229.08:43:39.68#ibcon#read 4, iclass 34, count 0 2006.229.08:43:39.68#ibcon#about to read 5, iclass 34, count 0 2006.229.08:43:39.68#ibcon#read 5, iclass 34, count 0 2006.229.08:43:39.68#ibcon#about to read 6, iclass 34, count 0 2006.229.08:43:39.68#ibcon#read 6, iclass 34, count 0 2006.229.08:43:39.68#ibcon#end of sib2, iclass 34, count 0 2006.229.08:43:39.68#ibcon#*after write, iclass 34, count 0 2006.229.08:43:39.68#ibcon#*before return 0, iclass 34, count 0 2006.229.08:43:39.68#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:43:39.68#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:43:39.68#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:43:39.68#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:43:39.68$setupk4/ifdk4 2006.229.08:43:39.68$ifdk4/lo= 2006.229.08:43:39.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:43:39.69$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:43:39.69$ifdk4/patch= 2006.229.08:43:39.69$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:43:39.69$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:43:39.69$setupk4/!*+20s 2006.229.08:43:43.98#abcon#<5=/05 2.0 3.9 29.35 951000.5\r\n> 2006.229.08:43:44.00#abcon#{5=INTERFACE CLEAR} 2006.229.08:43:44.06#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:43:54.15#abcon#<5=/05 2.1 3.8 29.35 951000.5\r\n> 2006.229.08:43:54.17#abcon#{5=INTERFACE CLEAR} 2006.229.08:43:54.20$setupk4/"tpicd 2006.229.08:43:54.20$setupk4/echo=off 2006.229.08:43:54.20$setupk4/xlog=off 2006.229.08:43:54.20:!2006.229.08:47:00 2006.229.08:44:03.14#trakl#Source acquired 2006.229.08:44:05.14#flagr#flagr/antenna,acquired 2006.229.08:47:00.00:preob 2006.229.08:47:00.14/onsource/TRACKING 2006.229.08:47:00.14:!2006.229.08:47:10 2006.229.08:47:10.00:"tape 2006.229.08:47:10.00:"st=record 2006.229.08:47:10.00:data_valid=on 2006.229.08:47:10.00:midob 2006.229.08:47:11.14/onsource/TRACKING 2006.229.08:47:11.14/wx/29.32,1000.5,95 2006.229.08:47:11.30/cable/+6.3983E-03 2006.229.08:47:12.39/va/01,08,usb,yes,32,34 2006.229.08:47:12.39/va/02,07,usb,yes,34,35 2006.229.08:47:12.39/va/03,06,usb,yes,43,45 2006.229.08:47:12.39/va/04,07,usb,yes,35,37 2006.229.08:47:12.39/va/05,04,usb,yes,32,32 2006.229.08:47:12.39/va/06,04,usb,yes,35,35 2006.229.08:47:12.39/va/07,05,usb,yes,31,32 2006.229.08:47:12.39/va/08,06,usb,yes,23,28 2006.229.08:47:12.62/valo/01,524.99,yes,locked 2006.229.08:47:12.62/valo/02,534.99,yes,locked 2006.229.08:47:12.62/valo/03,564.99,yes,locked 2006.229.08:47:12.62/valo/04,624.99,yes,locked 2006.229.08:47:12.62/valo/05,734.99,yes,locked 2006.229.08:47:12.62/valo/06,814.99,yes,locked 2006.229.08:47:12.62/valo/07,864.99,yes,locked 2006.229.08:47:12.62/valo/08,884.99,yes,locked 2006.229.08:47:13.71/vb/01,04,usb,yes,39,36 2006.229.08:47:13.71/vb/02,04,usb,yes,41,41 2006.229.08:47:13.71/vb/03,04,usb,yes,38,41 2006.229.08:47:13.71/vb/04,04,usb,yes,43,42 2006.229.08:47:13.71/vb/05,04,usb,yes,34,37 2006.229.08:47:13.71/vb/06,04,usb,yes,39,35 2006.229.08:47:13.71/vb/07,04,usb,yes,39,39 2006.229.08:47:13.71/vb/08,04,usb,yes,35,39 2006.229.08:47:13.94/vblo/01,629.99,yes,locked 2006.229.08:47:13.94/vblo/02,634.99,yes,locked 2006.229.08:47:13.94/vblo/03,649.99,yes,locked 2006.229.08:47:13.94/vblo/04,679.99,yes,locked 2006.229.08:47:13.94/vblo/05,709.99,yes,locked 2006.229.08:47:13.94/vblo/06,719.99,yes,locked 2006.229.08:47:13.94/vblo/07,734.99,yes,locked 2006.229.08:47:13.94/vblo/08,744.99,yes,locked 2006.229.08:47:14.09/vabw/8 2006.229.08:47:14.24/vbbw/8 2006.229.08:47:14.33/xfe/off,on,12.2 2006.229.08:47:14.73/ifatt/23,28,28,28 2006.229.08:47:15.07/fmout-gps/S +4.62E-07 2006.229.08:47:15.11:!2006.229.08:49:10 2006.229.08:49:10.01:data_valid=off 2006.229.08:49:10.02:"et 2006.229.08:49:10.02:!+3s 2006.229.08:49:13.03:"tape 2006.229.08:49:13.04:postob 2006.229.08:49:13.10/cable/+6.4008E-03 2006.229.08:49:13.11/wx/29.30,1000.4,95 2006.229.08:49:13.16/fmout-gps/S +4.63E-07 2006.229.08:49:13.16:scan_name=229-0854,jd0608,190 2006.229.08:49:13.16:source=1334-127,133739.78,-125724.7,2000.0,ccw 2006.229.08:49:14.13#flagr#flagr/antenna,new-source 2006.229.08:49:14.14:checkk5 2006.229.08:49:14.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:49:14.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:49:15.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:49:15.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:49:16.12/chk_obsdata//k5ts1/T2290847??a.dat file size is correct (nominal:480MB, actual:480MB). 2006.229.08:49:16.52/chk_obsdata//k5ts2/T2290847??b.dat file size is correct (nominal:480MB, actual:480MB). 2006.229.08:49:16.91/chk_obsdata//k5ts3/T2290847??c.dat file size is correct (nominal:480MB, actual:480MB). 2006.229.08:49:17.38/chk_obsdata//k5ts4/T2290847??d.dat file size is correct (nominal:480MB, actual:480MB). 2006.229.08:49:18.08/k5log//k5ts1_log_newline 2006.229.08:49:18.78/k5log//k5ts2_log_newline 2006.229.08:49:19.49/k5log//k5ts3_log_newline 2006.229.08:49:20.18/k5log//k5ts4_log_newline 2006.229.08:49:20.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:49:20.21:setupk4=1 2006.229.08:49:20.21$setupk4/echo=on 2006.229.08:49:20.21$setupk4/pcalon 2006.229.08:49:20.21$pcalon/"no phase cal control is implemented here 2006.229.08:49:20.21$setupk4/"tpicd=stop 2006.229.08:49:20.21$setupk4/"rec=synch_on 2006.229.08:49:20.21$setupk4/"rec_mode=128 2006.229.08:49:20.21$setupk4/!* 2006.229.08:49:20.21$setupk4/recpk4 2006.229.08:49:20.21$recpk4/recpatch= 2006.229.08:49:20.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:49:20.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:49:20.21$setupk4/vck44 2006.229.08:49:20.21$vck44/valo=1,524.99 2006.229.08:49:20.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.08:49:20.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.08:49:20.21#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:20.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:20.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:20.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:20.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:49:20.21#ibcon#first serial, iclass 31, count 0 2006.229.08:49:20.21#ibcon#enter sib2, iclass 31, count 0 2006.229.08:49:20.21#ibcon#flushed, iclass 31, count 0 2006.229.08:49:20.21#ibcon#about to write, iclass 31, count 0 2006.229.08:49:20.21#ibcon#wrote, iclass 31, count 0 2006.229.08:49:20.21#ibcon#about to read 3, iclass 31, count 0 2006.229.08:49:20.22#ibcon#read 3, iclass 31, count 0 2006.229.08:49:20.22#ibcon#about to read 4, iclass 31, count 0 2006.229.08:49:20.22#ibcon#read 4, iclass 31, count 0 2006.229.08:49:20.22#ibcon#about to read 5, iclass 31, count 0 2006.229.08:49:20.22#ibcon#read 5, iclass 31, count 0 2006.229.08:49:20.22#ibcon#about to read 6, iclass 31, count 0 2006.229.08:49:20.22#ibcon#read 6, iclass 31, count 0 2006.229.08:49:20.22#ibcon#end of sib2, iclass 31, count 0 2006.229.08:49:20.22#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:49:20.22#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:49:20.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:49:20.22#ibcon#*before write, iclass 31, count 0 2006.229.08:49:20.22#ibcon#enter sib2, iclass 31, count 0 2006.229.08:49:20.22#ibcon#flushed, iclass 31, count 0 2006.229.08:49:20.22#ibcon#about to write, iclass 31, count 0 2006.229.08:49:20.22#ibcon#wrote, iclass 31, count 0 2006.229.08:49:20.22#ibcon#about to read 3, iclass 31, count 0 2006.229.08:49:20.27#ibcon#read 3, iclass 31, count 0 2006.229.08:49:20.27#ibcon#about to read 4, iclass 31, count 0 2006.229.08:49:20.27#ibcon#read 4, iclass 31, count 0 2006.229.08:49:20.27#ibcon#about to read 5, iclass 31, count 0 2006.229.08:49:20.27#ibcon#read 5, iclass 31, count 0 2006.229.08:49:20.27#ibcon#about to read 6, iclass 31, count 0 2006.229.08:49:20.27#ibcon#read 6, iclass 31, count 0 2006.229.08:49:20.27#ibcon#end of sib2, iclass 31, count 0 2006.229.08:49:20.27#ibcon#*after write, iclass 31, count 0 2006.229.08:49:20.27#ibcon#*before return 0, iclass 31, count 0 2006.229.08:49:20.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:20.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:20.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:49:20.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:49:20.27$vck44/va=1,8 2006.229.08:49:20.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.08:49:20.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.08:49:20.27#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:20.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:20.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:20.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:20.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.08:49:20.27#ibcon#first serial, iclass 33, count 2 2006.229.08:49:20.27#ibcon#enter sib2, iclass 33, count 2 2006.229.08:49:20.27#ibcon#flushed, iclass 33, count 2 2006.229.08:49:20.27#ibcon#about to write, iclass 33, count 2 2006.229.08:49:20.27#ibcon#wrote, iclass 33, count 2 2006.229.08:49:20.27#ibcon#about to read 3, iclass 33, count 2 2006.229.08:49:20.29#ibcon#read 3, iclass 33, count 2 2006.229.08:49:20.29#ibcon#about to read 4, iclass 33, count 2 2006.229.08:49:20.29#ibcon#read 4, iclass 33, count 2 2006.229.08:49:20.29#ibcon#about to read 5, iclass 33, count 2 2006.229.08:49:20.29#ibcon#read 5, iclass 33, count 2 2006.229.08:49:20.29#ibcon#about to read 6, iclass 33, count 2 2006.229.08:49:20.29#ibcon#read 6, iclass 33, count 2 2006.229.08:49:20.29#ibcon#end of sib2, iclass 33, count 2 2006.229.08:49:20.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.08:49:20.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.08:49:20.29#ibcon#[25=AT01-08\r\n] 2006.229.08:49:20.29#ibcon#*before write, iclass 33, count 2 2006.229.08:49:20.29#ibcon#enter sib2, iclass 33, count 2 2006.229.08:49:20.29#ibcon#flushed, iclass 33, count 2 2006.229.08:49:20.29#ibcon#about to write, iclass 33, count 2 2006.229.08:49:20.29#ibcon#wrote, iclass 33, count 2 2006.229.08:49:20.29#ibcon#about to read 3, iclass 33, count 2 2006.229.08:49:20.32#ibcon#read 3, iclass 33, count 2 2006.229.08:49:20.32#ibcon#about to read 4, iclass 33, count 2 2006.229.08:49:20.32#ibcon#read 4, iclass 33, count 2 2006.229.08:49:20.32#ibcon#about to read 5, iclass 33, count 2 2006.229.08:49:20.32#ibcon#read 5, iclass 33, count 2 2006.229.08:49:20.32#ibcon#about to read 6, iclass 33, count 2 2006.229.08:49:20.32#ibcon#read 6, iclass 33, count 2 2006.229.08:49:20.32#ibcon#end of sib2, iclass 33, count 2 2006.229.08:49:20.32#ibcon#*after write, iclass 33, count 2 2006.229.08:49:20.32#ibcon#*before return 0, iclass 33, count 2 2006.229.08:49:20.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:20.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:20.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.08:49:20.32#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:20.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:20.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:20.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:20.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:49:20.44#ibcon#first serial, iclass 33, count 0 2006.229.08:49:20.44#ibcon#enter sib2, iclass 33, count 0 2006.229.08:49:20.44#ibcon#flushed, iclass 33, count 0 2006.229.08:49:20.44#ibcon#about to write, iclass 33, count 0 2006.229.08:49:20.44#ibcon#wrote, iclass 33, count 0 2006.229.08:49:20.44#ibcon#about to read 3, iclass 33, count 0 2006.229.08:49:20.46#ibcon#read 3, iclass 33, count 0 2006.229.08:49:20.46#ibcon#about to read 4, iclass 33, count 0 2006.229.08:49:20.46#ibcon#read 4, iclass 33, count 0 2006.229.08:49:20.46#ibcon#about to read 5, iclass 33, count 0 2006.229.08:49:20.46#ibcon#read 5, iclass 33, count 0 2006.229.08:49:20.46#ibcon#about to read 6, iclass 33, count 0 2006.229.08:49:20.46#ibcon#read 6, iclass 33, count 0 2006.229.08:49:20.46#ibcon#end of sib2, iclass 33, count 0 2006.229.08:49:20.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:49:20.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:49:20.46#ibcon#[25=USB\r\n] 2006.229.08:49:20.46#ibcon#*before write, iclass 33, count 0 2006.229.08:49:20.46#ibcon#enter sib2, iclass 33, count 0 2006.229.08:49:20.46#ibcon#flushed, iclass 33, count 0 2006.229.08:49:20.46#ibcon#about to write, iclass 33, count 0 2006.229.08:49:20.46#ibcon#wrote, iclass 33, count 0 2006.229.08:49:20.46#ibcon#about to read 3, iclass 33, count 0 2006.229.08:49:20.49#ibcon#read 3, iclass 33, count 0 2006.229.08:49:20.49#ibcon#about to read 4, iclass 33, count 0 2006.229.08:49:20.49#ibcon#read 4, iclass 33, count 0 2006.229.08:49:20.49#ibcon#about to read 5, iclass 33, count 0 2006.229.08:49:20.49#ibcon#read 5, iclass 33, count 0 2006.229.08:49:20.49#ibcon#about to read 6, iclass 33, count 0 2006.229.08:49:20.49#ibcon#read 6, iclass 33, count 0 2006.229.08:49:20.49#ibcon#end of sib2, iclass 33, count 0 2006.229.08:49:20.49#ibcon#*after write, iclass 33, count 0 2006.229.08:49:20.49#ibcon#*before return 0, iclass 33, count 0 2006.229.08:49:20.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:20.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:20.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:49:20.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:49:20.49$vck44/valo=2,534.99 2006.229.08:49:20.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.08:49:20.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.08:49:20.49#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:20.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:20.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:20.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:20.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:49:20.49#ibcon#first serial, iclass 35, count 0 2006.229.08:49:20.49#ibcon#enter sib2, iclass 35, count 0 2006.229.08:49:20.49#ibcon#flushed, iclass 35, count 0 2006.229.08:49:20.49#ibcon#about to write, iclass 35, count 0 2006.229.08:49:20.49#ibcon#wrote, iclass 35, count 0 2006.229.08:49:20.49#ibcon#about to read 3, iclass 35, count 0 2006.229.08:49:20.51#ibcon#read 3, iclass 35, count 0 2006.229.08:49:20.51#ibcon#about to read 4, iclass 35, count 0 2006.229.08:49:20.51#ibcon#read 4, iclass 35, count 0 2006.229.08:49:20.51#ibcon#about to read 5, iclass 35, count 0 2006.229.08:49:20.51#ibcon#read 5, iclass 35, count 0 2006.229.08:49:20.51#ibcon#about to read 6, iclass 35, count 0 2006.229.08:49:20.51#ibcon#read 6, iclass 35, count 0 2006.229.08:49:20.51#ibcon#end of sib2, iclass 35, count 0 2006.229.08:49:20.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:49:20.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:49:20.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:49:20.51#ibcon#*before write, iclass 35, count 0 2006.229.08:49:20.51#ibcon#enter sib2, iclass 35, count 0 2006.229.08:49:20.51#ibcon#flushed, iclass 35, count 0 2006.229.08:49:20.51#ibcon#about to write, iclass 35, count 0 2006.229.08:49:20.51#ibcon#wrote, iclass 35, count 0 2006.229.08:49:20.51#ibcon#about to read 3, iclass 35, count 0 2006.229.08:49:20.55#ibcon#read 3, iclass 35, count 0 2006.229.08:49:20.55#ibcon#about to read 4, iclass 35, count 0 2006.229.08:49:20.55#ibcon#read 4, iclass 35, count 0 2006.229.08:49:20.55#ibcon#about to read 5, iclass 35, count 0 2006.229.08:49:20.55#ibcon#read 5, iclass 35, count 0 2006.229.08:49:20.55#ibcon#about to read 6, iclass 35, count 0 2006.229.08:49:20.55#ibcon#read 6, iclass 35, count 0 2006.229.08:49:20.55#ibcon#end of sib2, iclass 35, count 0 2006.229.08:49:20.55#ibcon#*after write, iclass 35, count 0 2006.229.08:49:20.55#ibcon#*before return 0, iclass 35, count 0 2006.229.08:49:20.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:20.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:20.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:49:20.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:49:20.55$vck44/va=2,7 2006.229.08:49:20.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.08:49:20.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.08:49:20.55#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:20.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:20.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:20.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:20.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.08:49:20.61#ibcon#first serial, iclass 37, count 2 2006.229.08:49:20.61#ibcon#enter sib2, iclass 37, count 2 2006.229.08:49:20.61#ibcon#flushed, iclass 37, count 2 2006.229.08:49:20.61#ibcon#about to write, iclass 37, count 2 2006.229.08:49:20.61#ibcon#wrote, iclass 37, count 2 2006.229.08:49:20.61#ibcon#about to read 3, iclass 37, count 2 2006.229.08:49:20.63#ibcon#read 3, iclass 37, count 2 2006.229.08:49:20.63#ibcon#about to read 4, iclass 37, count 2 2006.229.08:49:20.63#ibcon#read 4, iclass 37, count 2 2006.229.08:49:20.63#ibcon#about to read 5, iclass 37, count 2 2006.229.08:49:20.63#ibcon#read 5, iclass 37, count 2 2006.229.08:49:20.63#ibcon#about to read 6, iclass 37, count 2 2006.229.08:49:20.63#ibcon#read 6, iclass 37, count 2 2006.229.08:49:20.63#ibcon#end of sib2, iclass 37, count 2 2006.229.08:49:20.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.08:49:20.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.08:49:20.63#ibcon#[25=AT02-07\r\n] 2006.229.08:49:20.63#ibcon#*before write, iclass 37, count 2 2006.229.08:49:20.63#ibcon#enter sib2, iclass 37, count 2 2006.229.08:49:20.63#ibcon#flushed, iclass 37, count 2 2006.229.08:49:20.63#ibcon#about to write, iclass 37, count 2 2006.229.08:49:20.63#ibcon#wrote, iclass 37, count 2 2006.229.08:49:20.63#ibcon#about to read 3, iclass 37, count 2 2006.229.08:49:20.66#ibcon#read 3, iclass 37, count 2 2006.229.08:49:20.66#ibcon#about to read 4, iclass 37, count 2 2006.229.08:49:20.66#ibcon#read 4, iclass 37, count 2 2006.229.08:49:20.66#ibcon#about to read 5, iclass 37, count 2 2006.229.08:49:20.66#ibcon#read 5, iclass 37, count 2 2006.229.08:49:20.66#ibcon#about to read 6, iclass 37, count 2 2006.229.08:49:20.66#ibcon#read 6, iclass 37, count 2 2006.229.08:49:20.66#ibcon#end of sib2, iclass 37, count 2 2006.229.08:49:20.66#ibcon#*after write, iclass 37, count 2 2006.229.08:49:20.66#ibcon#*before return 0, iclass 37, count 2 2006.229.08:49:20.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:20.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:20.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.08:49:20.66#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:20.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:20.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:20.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:20.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:49:20.78#ibcon#first serial, iclass 37, count 0 2006.229.08:49:20.78#ibcon#enter sib2, iclass 37, count 0 2006.229.08:49:20.78#ibcon#flushed, iclass 37, count 0 2006.229.08:49:20.78#ibcon#about to write, iclass 37, count 0 2006.229.08:49:20.78#ibcon#wrote, iclass 37, count 0 2006.229.08:49:20.78#ibcon#about to read 3, iclass 37, count 0 2006.229.08:49:20.80#ibcon#read 3, iclass 37, count 0 2006.229.08:49:20.80#ibcon#about to read 4, iclass 37, count 0 2006.229.08:49:20.80#ibcon#read 4, iclass 37, count 0 2006.229.08:49:20.80#ibcon#about to read 5, iclass 37, count 0 2006.229.08:49:20.80#ibcon#read 5, iclass 37, count 0 2006.229.08:49:20.80#ibcon#about to read 6, iclass 37, count 0 2006.229.08:49:20.80#ibcon#read 6, iclass 37, count 0 2006.229.08:49:20.80#ibcon#end of sib2, iclass 37, count 0 2006.229.08:49:20.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:49:20.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:49:20.80#ibcon#[25=USB\r\n] 2006.229.08:49:20.80#ibcon#*before write, iclass 37, count 0 2006.229.08:49:20.80#ibcon#enter sib2, iclass 37, count 0 2006.229.08:49:20.80#ibcon#flushed, iclass 37, count 0 2006.229.08:49:20.80#ibcon#about to write, iclass 37, count 0 2006.229.08:49:20.80#ibcon#wrote, iclass 37, count 0 2006.229.08:49:20.80#ibcon#about to read 3, iclass 37, count 0 2006.229.08:49:20.83#ibcon#read 3, iclass 37, count 0 2006.229.08:49:20.83#ibcon#about to read 4, iclass 37, count 0 2006.229.08:49:20.83#ibcon#read 4, iclass 37, count 0 2006.229.08:49:20.83#ibcon#about to read 5, iclass 37, count 0 2006.229.08:49:20.83#ibcon#read 5, iclass 37, count 0 2006.229.08:49:20.83#ibcon#about to read 6, iclass 37, count 0 2006.229.08:49:20.83#ibcon#read 6, iclass 37, count 0 2006.229.08:49:20.83#ibcon#end of sib2, iclass 37, count 0 2006.229.08:49:20.83#ibcon#*after write, iclass 37, count 0 2006.229.08:49:20.83#ibcon#*before return 0, iclass 37, count 0 2006.229.08:49:20.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:20.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:20.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:49:20.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:49:20.83$vck44/valo=3,564.99 2006.229.08:49:20.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.08:49:20.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.08:49:20.83#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:20.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:20.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:20.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:20.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:49:20.83#ibcon#first serial, iclass 39, count 0 2006.229.08:49:20.83#ibcon#enter sib2, iclass 39, count 0 2006.229.08:49:20.83#ibcon#flushed, iclass 39, count 0 2006.229.08:49:20.83#ibcon#about to write, iclass 39, count 0 2006.229.08:49:20.83#ibcon#wrote, iclass 39, count 0 2006.229.08:49:20.83#ibcon#about to read 3, iclass 39, count 0 2006.229.08:49:20.85#ibcon#read 3, iclass 39, count 0 2006.229.08:49:20.85#ibcon#about to read 4, iclass 39, count 0 2006.229.08:49:20.85#ibcon#read 4, iclass 39, count 0 2006.229.08:49:20.85#ibcon#about to read 5, iclass 39, count 0 2006.229.08:49:20.85#ibcon#read 5, iclass 39, count 0 2006.229.08:49:20.85#ibcon#about to read 6, iclass 39, count 0 2006.229.08:49:20.85#ibcon#read 6, iclass 39, count 0 2006.229.08:49:20.85#ibcon#end of sib2, iclass 39, count 0 2006.229.08:49:20.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:49:20.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:49:20.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:49:20.85#ibcon#*before write, iclass 39, count 0 2006.229.08:49:20.85#ibcon#enter sib2, iclass 39, count 0 2006.229.08:49:20.85#ibcon#flushed, iclass 39, count 0 2006.229.08:49:20.85#ibcon#about to write, iclass 39, count 0 2006.229.08:49:20.85#ibcon#wrote, iclass 39, count 0 2006.229.08:49:20.85#ibcon#about to read 3, iclass 39, count 0 2006.229.08:49:20.89#ibcon#read 3, iclass 39, count 0 2006.229.08:49:20.89#ibcon#about to read 4, iclass 39, count 0 2006.229.08:49:20.89#ibcon#read 4, iclass 39, count 0 2006.229.08:49:20.89#ibcon#about to read 5, iclass 39, count 0 2006.229.08:49:20.89#ibcon#read 5, iclass 39, count 0 2006.229.08:49:20.89#ibcon#about to read 6, iclass 39, count 0 2006.229.08:49:20.89#ibcon#read 6, iclass 39, count 0 2006.229.08:49:20.89#ibcon#end of sib2, iclass 39, count 0 2006.229.08:49:20.89#ibcon#*after write, iclass 39, count 0 2006.229.08:49:20.89#ibcon#*before return 0, iclass 39, count 0 2006.229.08:49:20.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:20.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:20.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:49:20.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:49:20.89$vck44/va=3,6 2006.229.08:49:20.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.08:49:20.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.08:49:20.89#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:20.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:20.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:20.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:20.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.08:49:20.95#ibcon#first serial, iclass 3, count 2 2006.229.08:49:20.95#ibcon#enter sib2, iclass 3, count 2 2006.229.08:49:20.95#ibcon#flushed, iclass 3, count 2 2006.229.08:49:20.95#ibcon#about to write, iclass 3, count 2 2006.229.08:49:20.95#ibcon#wrote, iclass 3, count 2 2006.229.08:49:20.95#ibcon#about to read 3, iclass 3, count 2 2006.229.08:49:20.97#ibcon#read 3, iclass 3, count 2 2006.229.08:49:20.97#ibcon#about to read 4, iclass 3, count 2 2006.229.08:49:20.97#ibcon#read 4, iclass 3, count 2 2006.229.08:49:20.97#ibcon#about to read 5, iclass 3, count 2 2006.229.08:49:20.97#ibcon#read 5, iclass 3, count 2 2006.229.08:49:20.97#ibcon#about to read 6, iclass 3, count 2 2006.229.08:49:20.97#ibcon#read 6, iclass 3, count 2 2006.229.08:49:20.97#ibcon#end of sib2, iclass 3, count 2 2006.229.08:49:20.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.08:49:20.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.08:49:20.97#ibcon#[25=AT03-06\r\n] 2006.229.08:49:20.97#ibcon#*before write, iclass 3, count 2 2006.229.08:49:20.97#ibcon#enter sib2, iclass 3, count 2 2006.229.08:49:20.97#ibcon#flushed, iclass 3, count 2 2006.229.08:49:20.97#ibcon#about to write, iclass 3, count 2 2006.229.08:49:20.97#ibcon#wrote, iclass 3, count 2 2006.229.08:49:20.97#ibcon#about to read 3, iclass 3, count 2 2006.229.08:49:21.00#ibcon#read 3, iclass 3, count 2 2006.229.08:49:21.00#ibcon#about to read 4, iclass 3, count 2 2006.229.08:49:21.00#ibcon#read 4, iclass 3, count 2 2006.229.08:49:21.00#ibcon#about to read 5, iclass 3, count 2 2006.229.08:49:21.00#ibcon#read 5, iclass 3, count 2 2006.229.08:49:21.00#ibcon#about to read 6, iclass 3, count 2 2006.229.08:49:21.00#ibcon#read 6, iclass 3, count 2 2006.229.08:49:21.00#ibcon#end of sib2, iclass 3, count 2 2006.229.08:49:21.00#ibcon#*after write, iclass 3, count 2 2006.229.08:49:21.00#ibcon#*before return 0, iclass 3, count 2 2006.229.08:49:21.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:21.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:21.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.08:49:21.00#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:21.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:21.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:21.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:21.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:49:21.12#ibcon#first serial, iclass 3, count 0 2006.229.08:49:21.12#ibcon#enter sib2, iclass 3, count 0 2006.229.08:49:21.12#ibcon#flushed, iclass 3, count 0 2006.229.08:49:21.12#ibcon#about to write, iclass 3, count 0 2006.229.08:49:21.12#ibcon#wrote, iclass 3, count 0 2006.229.08:49:21.12#ibcon#about to read 3, iclass 3, count 0 2006.229.08:49:21.14#ibcon#read 3, iclass 3, count 0 2006.229.08:49:21.14#ibcon#about to read 4, iclass 3, count 0 2006.229.08:49:21.14#ibcon#read 4, iclass 3, count 0 2006.229.08:49:21.14#ibcon#about to read 5, iclass 3, count 0 2006.229.08:49:21.14#ibcon#read 5, iclass 3, count 0 2006.229.08:49:21.14#ibcon#about to read 6, iclass 3, count 0 2006.229.08:49:21.14#ibcon#read 6, iclass 3, count 0 2006.229.08:49:21.14#ibcon#end of sib2, iclass 3, count 0 2006.229.08:49:21.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:49:21.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:49:21.14#ibcon#[25=USB\r\n] 2006.229.08:49:21.14#ibcon#*before write, iclass 3, count 0 2006.229.08:49:21.14#ibcon#enter sib2, iclass 3, count 0 2006.229.08:49:21.14#ibcon#flushed, iclass 3, count 0 2006.229.08:49:21.14#ibcon#about to write, iclass 3, count 0 2006.229.08:49:21.14#ibcon#wrote, iclass 3, count 0 2006.229.08:49:21.14#ibcon#about to read 3, iclass 3, count 0 2006.229.08:49:21.17#ibcon#read 3, iclass 3, count 0 2006.229.08:49:21.17#ibcon#about to read 4, iclass 3, count 0 2006.229.08:49:21.17#ibcon#read 4, iclass 3, count 0 2006.229.08:49:21.17#ibcon#about to read 5, iclass 3, count 0 2006.229.08:49:21.17#ibcon#read 5, iclass 3, count 0 2006.229.08:49:21.17#ibcon#about to read 6, iclass 3, count 0 2006.229.08:49:21.17#ibcon#read 6, iclass 3, count 0 2006.229.08:49:21.17#ibcon#end of sib2, iclass 3, count 0 2006.229.08:49:21.17#ibcon#*after write, iclass 3, count 0 2006.229.08:49:21.17#ibcon#*before return 0, iclass 3, count 0 2006.229.08:49:21.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:21.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:21.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:49:21.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:49:21.17$vck44/valo=4,624.99 2006.229.08:49:21.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.08:49:21.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.08:49:21.17#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:21.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:21.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:21.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:21.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:49:21.17#ibcon#first serial, iclass 5, count 0 2006.229.08:49:21.17#ibcon#enter sib2, iclass 5, count 0 2006.229.08:49:21.17#ibcon#flushed, iclass 5, count 0 2006.229.08:49:21.17#ibcon#about to write, iclass 5, count 0 2006.229.08:49:21.17#ibcon#wrote, iclass 5, count 0 2006.229.08:49:21.17#ibcon#about to read 3, iclass 5, count 0 2006.229.08:49:21.19#ibcon#read 3, iclass 5, count 0 2006.229.08:49:21.19#ibcon#about to read 4, iclass 5, count 0 2006.229.08:49:21.19#ibcon#read 4, iclass 5, count 0 2006.229.08:49:21.19#ibcon#about to read 5, iclass 5, count 0 2006.229.08:49:21.19#ibcon#read 5, iclass 5, count 0 2006.229.08:49:21.19#ibcon#about to read 6, iclass 5, count 0 2006.229.08:49:21.19#ibcon#read 6, iclass 5, count 0 2006.229.08:49:21.19#ibcon#end of sib2, iclass 5, count 0 2006.229.08:49:21.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:49:21.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:49:21.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:49:21.19#ibcon#*before write, iclass 5, count 0 2006.229.08:49:21.19#ibcon#enter sib2, iclass 5, count 0 2006.229.08:49:21.19#ibcon#flushed, iclass 5, count 0 2006.229.08:49:21.19#ibcon#about to write, iclass 5, count 0 2006.229.08:49:21.19#ibcon#wrote, iclass 5, count 0 2006.229.08:49:21.19#ibcon#about to read 3, iclass 5, count 0 2006.229.08:49:21.23#ibcon#read 3, iclass 5, count 0 2006.229.08:49:21.23#ibcon#about to read 4, iclass 5, count 0 2006.229.08:49:21.23#ibcon#read 4, iclass 5, count 0 2006.229.08:49:21.23#ibcon#about to read 5, iclass 5, count 0 2006.229.08:49:21.23#ibcon#read 5, iclass 5, count 0 2006.229.08:49:21.23#ibcon#about to read 6, iclass 5, count 0 2006.229.08:49:21.23#ibcon#read 6, iclass 5, count 0 2006.229.08:49:21.23#ibcon#end of sib2, iclass 5, count 0 2006.229.08:49:21.23#ibcon#*after write, iclass 5, count 0 2006.229.08:49:21.23#ibcon#*before return 0, iclass 5, count 0 2006.229.08:49:21.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:21.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:21.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:49:21.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:49:21.23$vck44/va=4,7 2006.229.08:49:21.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.08:49:21.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.08:49:21.23#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:21.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:21.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:21.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:21.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.08:49:21.29#ibcon#first serial, iclass 7, count 2 2006.229.08:49:21.29#ibcon#enter sib2, iclass 7, count 2 2006.229.08:49:21.29#ibcon#flushed, iclass 7, count 2 2006.229.08:49:21.29#ibcon#about to write, iclass 7, count 2 2006.229.08:49:21.29#ibcon#wrote, iclass 7, count 2 2006.229.08:49:21.29#ibcon#about to read 3, iclass 7, count 2 2006.229.08:49:21.31#ibcon#read 3, iclass 7, count 2 2006.229.08:49:21.31#ibcon#about to read 4, iclass 7, count 2 2006.229.08:49:21.31#ibcon#read 4, iclass 7, count 2 2006.229.08:49:21.31#ibcon#about to read 5, iclass 7, count 2 2006.229.08:49:21.31#ibcon#read 5, iclass 7, count 2 2006.229.08:49:21.31#ibcon#about to read 6, iclass 7, count 2 2006.229.08:49:21.31#ibcon#read 6, iclass 7, count 2 2006.229.08:49:21.31#ibcon#end of sib2, iclass 7, count 2 2006.229.08:49:21.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.08:49:21.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.08:49:21.31#ibcon#[25=AT04-07\r\n] 2006.229.08:49:21.31#ibcon#*before write, iclass 7, count 2 2006.229.08:49:21.31#ibcon#enter sib2, iclass 7, count 2 2006.229.08:49:21.31#ibcon#flushed, iclass 7, count 2 2006.229.08:49:21.31#ibcon#about to write, iclass 7, count 2 2006.229.08:49:21.31#ibcon#wrote, iclass 7, count 2 2006.229.08:49:21.31#ibcon#about to read 3, iclass 7, count 2 2006.229.08:49:21.34#ibcon#read 3, iclass 7, count 2 2006.229.08:49:21.34#ibcon#about to read 4, iclass 7, count 2 2006.229.08:49:21.34#ibcon#read 4, iclass 7, count 2 2006.229.08:49:21.34#ibcon#about to read 5, iclass 7, count 2 2006.229.08:49:21.34#ibcon#read 5, iclass 7, count 2 2006.229.08:49:21.34#ibcon#about to read 6, iclass 7, count 2 2006.229.08:49:21.34#ibcon#read 6, iclass 7, count 2 2006.229.08:49:21.34#ibcon#end of sib2, iclass 7, count 2 2006.229.08:49:21.34#ibcon#*after write, iclass 7, count 2 2006.229.08:49:21.34#ibcon#*before return 0, iclass 7, count 2 2006.229.08:49:21.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:21.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:21.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.08:49:21.34#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:21.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:21.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:21.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:21.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:49:21.46#ibcon#first serial, iclass 7, count 0 2006.229.08:49:21.46#ibcon#enter sib2, iclass 7, count 0 2006.229.08:49:21.46#ibcon#flushed, iclass 7, count 0 2006.229.08:49:21.46#ibcon#about to write, iclass 7, count 0 2006.229.08:49:21.46#ibcon#wrote, iclass 7, count 0 2006.229.08:49:21.46#ibcon#about to read 3, iclass 7, count 0 2006.229.08:49:21.48#ibcon#read 3, iclass 7, count 0 2006.229.08:49:21.48#ibcon#about to read 4, iclass 7, count 0 2006.229.08:49:21.48#ibcon#read 4, iclass 7, count 0 2006.229.08:49:21.48#ibcon#about to read 5, iclass 7, count 0 2006.229.08:49:21.48#ibcon#read 5, iclass 7, count 0 2006.229.08:49:21.48#ibcon#about to read 6, iclass 7, count 0 2006.229.08:49:21.48#ibcon#read 6, iclass 7, count 0 2006.229.08:49:21.48#ibcon#end of sib2, iclass 7, count 0 2006.229.08:49:21.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:49:21.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:49:21.48#ibcon#[25=USB\r\n] 2006.229.08:49:21.48#ibcon#*before write, iclass 7, count 0 2006.229.08:49:21.48#ibcon#enter sib2, iclass 7, count 0 2006.229.08:49:21.48#ibcon#flushed, iclass 7, count 0 2006.229.08:49:21.48#ibcon#about to write, iclass 7, count 0 2006.229.08:49:21.48#ibcon#wrote, iclass 7, count 0 2006.229.08:49:21.48#ibcon#about to read 3, iclass 7, count 0 2006.229.08:49:21.51#ibcon#read 3, iclass 7, count 0 2006.229.08:49:21.51#ibcon#about to read 4, iclass 7, count 0 2006.229.08:49:21.51#ibcon#read 4, iclass 7, count 0 2006.229.08:49:21.51#ibcon#about to read 5, iclass 7, count 0 2006.229.08:49:21.51#ibcon#read 5, iclass 7, count 0 2006.229.08:49:21.51#ibcon#about to read 6, iclass 7, count 0 2006.229.08:49:21.51#ibcon#read 6, iclass 7, count 0 2006.229.08:49:21.51#ibcon#end of sib2, iclass 7, count 0 2006.229.08:49:21.51#ibcon#*after write, iclass 7, count 0 2006.229.08:49:21.51#ibcon#*before return 0, iclass 7, count 0 2006.229.08:49:21.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:21.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:21.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:49:21.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:49:21.51$vck44/valo=5,734.99 2006.229.08:49:21.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.08:49:21.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.08:49:21.51#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:21.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:21.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:21.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:21.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:49:21.51#ibcon#first serial, iclass 11, count 0 2006.229.08:49:21.51#ibcon#enter sib2, iclass 11, count 0 2006.229.08:49:21.51#ibcon#flushed, iclass 11, count 0 2006.229.08:49:21.51#ibcon#about to write, iclass 11, count 0 2006.229.08:49:21.51#ibcon#wrote, iclass 11, count 0 2006.229.08:49:21.51#ibcon#about to read 3, iclass 11, count 0 2006.229.08:49:21.53#ibcon#read 3, iclass 11, count 0 2006.229.08:49:21.53#ibcon#about to read 4, iclass 11, count 0 2006.229.08:49:21.53#ibcon#read 4, iclass 11, count 0 2006.229.08:49:21.53#ibcon#about to read 5, iclass 11, count 0 2006.229.08:49:21.53#ibcon#read 5, iclass 11, count 0 2006.229.08:49:21.53#ibcon#about to read 6, iclass 11, count 0 2006.229.08:49:21.53#ibcon#read 6, iclass 11, count 0 2006.229.08:49:21.53#ibcon#end of sib2, iclass 11, count 0 2006.229.08:49:21.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:49:21.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:49:21.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:49:21.53#ibcon#*before write, iclass 11, count 0 2006.229.08:49:21.53#ibcon#enter sib2, iclass 11, count 0 2006.229.08:49:21.53#ibcon#flushed, iclass 11, count 0 2006.229.08:49:21.53#ibcon#about to write, iclass 11, count 0 2006.229.08:49:21.53#ibcon#wrote, iclass 11, count 0 2006.229.08:49:21.53#ibcon#about to read 3, iclass 11, count 0 2006.229.08:49:21.57#ibcon#read 3, iclass 11, count 0 2006.229.08:49:21.57#ibcon#about to read 4, iclass 11, count 0 2006.229.08:49:21.57#ibcon#read 4, iclass 11, count 0 2006.229.08:49:21.57#ibcon#about to read 5, iclass 11, count 0 2006.229.08:49:21.57#ibcon#read 5, iclass 11, count 0 2006.229.08:49:21.57#ibcon#about to read 6, iclass 11, count 0 2006.229.08:49:21.57#ibcon#read 6, iclass 11, count 0 2006.229.08:49:21.57#ibcon#end of sib2, iclass 11, count 0 2006.229.08:49:21.57#ibcon#*after write, iclass 11, count 0 2006.229.08:49:21.57#ibcon#*before return 0, iclass 11, count 0 2006.229.08:49:21.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:21.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:21.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:49:21.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:49:21.57$vck44/va=5,4 2006.229.08:49:21.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.08:49:21.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.08:49:21.57#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:21.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:21.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:21.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:21.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.08:49:21.63#ibcon#first serial, iclass 13, count 2 2006.229.08:49:21.63#ibcon#enter sib2, iclass 13, count 2 2006.229.08:49:21.63#ibcon#flushed, iclass 13, count 2 2006.229.08:49:21.63#ibcon#about to write, iclass 13, count 2 2006.229.08:49:21.63#ibcon#wrote, iclass 13, count 2 2006.229.08:49:21.63#ibcon#about to read 3, iclass 13, count 2 2006.229.08:49:21.65#ibcon#read 3, iclass 13, count 2 2006.229.08:49:21.65#ibcon#about to read 4, iclass 13, count 2 2006.229.08:49:21.65#ibcon#read 4, iclass 13, count 2 2006.229.08:49:21.65#ibcon#about to read 5, iclass 13, count 2 2006.229.08:49:21.65#ibcon#read 5, iclass 13, count 2 2006.229.08:49:21.65#ibcon#about to read 6, iclass 13, count 2 2006.229.08:49:21.65#ibcon#read 6, iclass 13, count 2 2006.229.08:49:21.65#ibcon#end of sib2, iclass 13, count 2 2006.229.08:49:21.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.08:49:21.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.08:49:21.65#ibcon#[25=AT05-04\r\n] 2006.229.08:49:21.65#ibcon#*before write, iclass 13, count 2 2006.229.08:49:21.65#ibcon#enter sib2, iclass 13, count 2 2006.229.08:49:21.65#ibcon#flushed, iclass 13, count 2 2006.229.08:49:21.65#ibcon#about to write, iclass 13, count 2 2006.229.08:49:21.65#ibcon#wrote, iclass 13, count 2 2006.229.08:49:21.65#ibcon#about to read 3, iclass 13, count 2 2006.229.08:49:21.68#ibcon#read 3, iclass 13, count 2 2006.229.08:49:21.68#ibcon#about to read 4, iclass 13, count 2 2006.229.08:49:21.68#ibcon#read 4, iclass 13, count 2 2006.229.08:49:21.68#ibcon#about to read 5, iclass 13, count 2 2006.229.08:49:21.68#ibcon#read 5, iclass 13, count 2 2006.229.08:49:21.68#ibcon#about to read 6, iclass 13, count 2 2006.229.08:49:21.68#ibcon#read 6, iclass 13, count 2 2006.229.08:49:21.68#ibcon#end of sib2, iclass 13, count 2 2006.229.08:49:21.68#ibcon#*after write, iclass 13, count 2 2006.229.08:49:21.68#ibcon#*before return 0, iclass 13, count 2 2006.229.08:49:21.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:21.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:21.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.08:49:21.68#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:21.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:21.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:21.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:21.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:49:21.80#ibcon#first serial, iclass 13, count 0 2006.229.08:49:21.80#ibcon#enter sib2, iclass 13, count 0 2006.229.08:49:21.80#ibcon#flushed, iclass 13, count 0 2006.229.08:49:21.80#ibcon#about to write, iclass 13, count 0 2006.229.08:49:21.80#ibcon#wrote, iclass 13, count 0 2006.229.08:49:21.80#ibcon#about to read 3, iclass 13, count 0 2006.229.08:49:21.82#ibcon#read 3, iclass 13, count 0 2006.229.08:49:21.82#ibcon#about to read 4, iclass 13, count 0 2006.229.08:49:21.82#ibcon#read 4, iclass 13, count 0 2006.229.08:49:21.82#ibcon#about to read 5, iclass 13, count 0 2006.229.08:49:21.82#ibcon#read 5, iclass 13, count 0 2006.229.08:49:21.82#ibcon#about to read 6, iclass 13, count 0 2006.229.08:49:21.82#ibcon#read 6, iclass 13, count 0 2006.229.08:49:21.82#ibcon#end of sib2, iclass 13, count 0 2006.229.08:49:21.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:49:21.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:49:21.82#ibcon#[25=USB\r\n] 2006.229.08:49:21.82#ibcon#*before write, iclass 13, count 0 2006.229.08:49:21.82#ibcon#enter sib2, iclass 13, count 0 2006.229.08:49:21.82#ibcon#flushed, iclass 13, count 0 2006.229.08:49:21.82#ibcon#about to write, iclass 13, count 0 2006.229.08:49:21.82#ibcon#wrote, iclass 13, count 0 2006.229.08:49:21.82#ibcon#about to read 3, iclass 13, count 0 2006.229.08:49:21.85#ibcon#read 3, iclass 13, count 0 2006.229.08:49:21.85#ibcon#about to read 4, iclass 13, count 0 2006.229.08:49:21.85#ibcon#read 4, iclass 13, count 0 2006.229.08:49:21.85#ibcon#about to read 5, iclass 13, count 0 2006.229.08:49:21.85#ibcon#read 5, iclass 13, count 0 2006.229.08:49:21.85#ibcon#about to read 6, iclass 13, count 0 2006.229.08:49:21.85#ibcon#read 6, iclass 13, count 0 2006.229.08:49:21.85#ibcon#end of sib2, iclass 13, count 0 2006.229.08:49:21.85#ibcon#*after write, iclass 13, count 0 2006.229.08:49:21.85#ibcon#*before return 0, iclass 13, count 0 2006.229.08:49:21.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:21.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:21.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:49:21.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:49:21.85$vck44/valo=6,814.99 2006.229.08:49:21.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.08:49:21.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.08:49:21.85#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:21.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:21.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:21.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:21.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:49:21.85#ibcon#first serial, iclass 15, count 0 2006.229.08:49:21.85#ibcon#enter sib2, iclass 15, count 0 2006.229.08:49:21.85#ibcon#flushed, iclass 15, count 0 2006.229.08:49:21.85#ibcon#about to write, iclass 15, count 0 2006.229.08:49:21.85#ibcon#wrote, iclass 15, count 0 2006.229.08:49:21.85#ibcon#about to read 3, iclass 15, count 0 2006.229.08:49:21.87#ibcon#read 3, iclass 15, count 0 2006.229.08:49:21.87#ibcon#about to read 4, iclass 15, count 0 2006.229.08:49:21.87#ibcon#read 4, iclass 15, count 0 2006.229.08:49:21.87#ibcon#about to read 5, iclass 15, count 0 2006.229.08:49:21.87#ibcon#read 5, iclass 15, count 0 2006.229.08:49:21.87#ibcon#about to read 6, iclass 15, count 0 2006.229.08:49:21.87#ibcon#read 6, iclass 15, count 0 2006.229.08:49:21.87#ibcon#end of sib2, iclass 15, count 0 2006.229.08:49:21.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:49:21.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:49:21.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:49:21.87#ibcon#*before write, iclass 15, count 0 2006.229.08:49:21.87#ibcon#enter sib2, iclass 15, count 0 2006.229.08:49:21.87#ibcon#flushed, iclass 15, count 0 2006.229.08:49:21.87#ibcon#about to write, iclass 15, count 0 2006.229.08:49:21.87#ibcon#wrote, iclass 15, count 0 2006.229.08:49:21.87#ibcon#about to read 3, iclass 15, count 0 2006.229.08:49:21.91#ibcon#read 3, iclass 15, count 0 2006.229.08:49:21.91#ibcon#about to read 4, iclass 15, count 0 2006.229.08:49:21.91#ibcon#read 4, iclass 15, count 0 2006.229.08:49:21.91#ibcon#about to read 5, iclass 15, count 0 2006.229.08:49:21.91#ibcon#read 5, iclass 15, count 0 2006.229.08:49:21.91#ibcon#about to read 6, iclass 15, count 0 2006.229.08:49:21.91#ibcon#read 6, iclass 15, count 0 2006.229.08:49:21.91#ibcon#end of sib2, iclass 15, count 0 2006.229.08:49:21.91#ibcon#*after write, iclass 15, count 0 2006.229.08:49:21.91#ibcon#*before return 0, iclass 15, count 0 2006.229.08:49:21.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:21.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:21.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:49:21.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:49:21.91$vck44/va=6,4 2006.229.08:49:21.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.08:49:21.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.08:49:21.91#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:21.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:21.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:21.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:21.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.08:49:21.97#ibcon#first serial, iclass 17, count 2 2006.229.08:49:21.97#ibcon#enter sib2, iclass 17, count 2 2006.229.08:49:21.97#ibcon#flushed, iclass 17, count 2 2006.229.08:49:21.97#ibcon#about to write, iclass 17, count 2 2006.229.08:49:21.97#ibcon#wrote, iclass 17, count 2 2006.229.08:49:21.97#ibcon#about to read 3, iclass 17, count 2 2006.229.08:49:21.99#ibcon#read 3, iclass 17, count 2 2006.229.08:49:21.99#ibcon#about to read 4, iclass 17, count 2 2006.229.08:49:21.99#ibcon#read 4, iclass 17, count 2 2006.229.08:49:21.99#ibcon#about to read 5, iclass 17, count 2 2006.229.08:49:21.99#ibcon#read 5, iclass 17, count 2 2006.229.08:49:21.99#ibcon#about to read 6, iclass 17, count 2 2006.229.08:49:21.99#ibcon#read 6, iclass 17, count 2 2006.229.08:49:21.99#ibcon#end of sib2, iclass 17, count 2 2006.229.08:49:21.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.08:49:21.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.08:49:21.99#ibcon#[25=AT06-04\r\n] 2006.229.08:49:21.99#ibcon#*before write, iclass 17, count 2 2006.229.08:49:21.99#ibcon#enter sib2, iclass 17, count 2 2006.229.08:49:21.99#ibcon#flushed, iclass 17, count 2 2006.229.08:49:21.99#ibcon#about to write, iclass 17, count 2 2006.229.08:49:21.99#ibcon#wrote, iclass 17, count 2 2006.229.08:49:21.99#ibcon#about to read 3, iclass 17, count 2 2006.229.08:49:22.02#ibcon#read 3, iclass 17, count 2 2006.229.08:49:22.02#ibcon#about to read 4, iclass 17, count 2 2006.229.08:49:22.02#ibcon#read 4, iclass 17, count 2 2006.229.08:49:22.02#ibcon#about to read 5, iclass 17, count 2 2006.229.08:49:22.02#ibcon#read 5, iclass 17, count 2 2006.229.08:49:22.02#ibcon#about to read 6, iclass 17, count 2 2006.229.08:49:22.02#ibcon#read 6, iclass 17, count 2 2006.229.08:49:22.02#ibcon#end of sib2, iclass 17, count 2 2006.229.08:49:22.02#ibcon#*after write, iclass 17, count 2 2006.229.08:49:22.02#ibcon#*before return 0, iclass 17, count 2 2006.229.08:49:22.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:22.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:22.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.08:49:22.02#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:22.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:22.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:22.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:22.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:49:22.14#ibcon#first serial, iclass 17, count 0 2006.229.08:49:22.14#ibcon#enter sib2, iclass 17, count 0 2006.229.08:49:22.14#ibcon#flushed, iclass 17, count 0 2006.229.08:49:22.14#ibcon#about to write, iclass 17, count 0 2006.229.08:49:22.14#ibcon#wrote, iclass 17, count 0 2006.229.08:49:22.14#ibcon#about to read 3, iclass 17, count 0 2006.229.08:49:22.16#ibcon#read 3, iclass 17, count 0 2006.229.08:49:22.16#ibcon#about to read 4, iclass 17, count 0 2006.229.08:49:22.16#ibcon#read 4, iclass 17, count 0 2006.229.08:49:22.16#ibcon#about to read 5, iclass 17, count 0 2006.229.08:49:22.16#ibcon#read 5, iclass 17, count 0 2006.229.08:49:22.16#ibcon#about to read 6, iclass 17, count 0 2006.229.08:49:22.16#ibcon#read 6, iclass 17, count 0 2006.229.08:49:22.16#ibcon#end of sib2, iclass 17, count 0 2006.229.08:49:22.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:49:22.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:49:22.16#ibcon#[25=USB\r\n] 2006.229.08:49:22.16#ibcon#*before write, iclass 17, count 0 2006.229.08:49:22.16#ibcon#enter sib2, iclass 17, count 0 2006.229.08:49:22.16#ibcon#flushed, iclass 17, count 0 2006.229.08:49:22.16#ibcon#about to write, iclass 17, count 0 2006.229.08:49:22.16#ibcon#wrote, iclass 17, count 0 2006.229.08:49:22.16#ibcon#about to read 3, iclass 17, count 0 2006.229.08:49:22.19#ibcon#read 3, iclass 17, count 0 2006.229.08:49:22.19#ibcon#about to read 4, iclass 17, count 0 2006.229.08:49:22.19#ibcon#read 4, iclass 17, count 0 2006.229.08:49:22.19#ibcon#about to read 5, iclass 17, count 0 2006.229.08:49:22.19#ibcon#read 5, iclass 17, count 0 2006.229.08:49:22.19#ibcon#about to read 6, iclass 17, count 0 2006.229.08:49:22.19#ibcon#read 6, iclass 17, count 0 2006.229.08:49:22.19#ibcon#end of sib2, iclass 17, count 0 2006.229.08:49:22.19#ibcon#*after write, iclass 17, count 0 2006.229.08:49:22.19#ibcon#*before return 0, iclass 17, count 0 2006.229.08:49:22.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:22.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:22.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:49:22.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:49:22.19$vck44/valo=7,864.99 2006.229.08:49:22.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.08:49:22.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.08:49:22.19#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:22.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:22.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:22.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:22.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:49:22.19#ibcon#first serial, iclass 19, count 0 2006.229.08:49:22.19#ibcon#enter sib2, iclass 19, count 0 2006.229.08:49:22.19#ibcon#flushed, iclass 19, count 0 2006.229.08:49:22.19#ibcon#about to write, iclass 19, count 0 2006.229.08:49:22.19#ibcon#wrote, iclass 19, count 0 2006.229.08:49:22.19#ibcon#about to read 3, iclass 19, count 0 2006.229.08:49:22.21#ibcon#read 3, iclass 19, count 0 2006.229.08:49:22.21#ibcon#about to read 4, iclass 19, count 0 2006.229.08:49:22.21#ibcon#read 4, iclass 19, count 0 2006.229.08:49:22.21#ibcon#about to read 5, iclass 19, count 0 2006.229.08:49:22.21#ibcon#read 5, iclass 19, count 0 2006.229.08:49:22.21#ibcon#about to read 6, iclass 19, count 0 2006.229.08:49:22.21#ibcon#read 6, iclass 19, count 0 2006.229.08:49:22.21#ibcon#end of sib2, iclass 19, count 0 2006.229.08:49:22.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:49:22.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:49:22.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:49:22.21#ibcon#*before write, iclass 19, count 0 2006.229.08:49:22.21#ibcon#enter sib2, iclass 19, count 0 2006.229.08:49:22.21#ibcon#flushed, iclass 19, count 0 2006.229.08:49:22.21#ibcon#about to write, iclass 19, count 0 2006.229.08:49:22.21#ibcon#wrote, iclass 19, count 0 2006.229.08:49:22.21#ibcon#about to read 3, iclass 19, count 0 2006.229.08:49:22.25#ibcon#read 3, iclass 19, count 0 2006.229.08:49:22.25#ibcon#about to read 4, iclass 19, count 0 2006.229.08:49:22.25#ibcon#read 4, iclass 19, count 0 2006.229.08:49:22.25#ibcon#about to read 5, iclass 19, count 0 2006.229.08:49:22.25#ibcon#read 5, iclass 19, count 0 2006.229.08:49:22.25#ibcon#about to read 6, iclass 19, count 0 2006.229.08:49:22.25#ibcon#read 6, iclass 19, count 0 2006.229.08:49:22.25#ibcon#end of sib2, iclass 19, count 0 2006.229.08:49:22.25#ibcon#*after write, iclass 19, count 0 2006.229.08:49:22.25#ibcon#*before return 0, iclass 19, count 0 2006.229.08:49:22.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:22.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:22.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:49:22.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:49:22.25$vck44/va=7,5 2006.229.08:49:22.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.08:49:22.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.08:49:22.25#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:22.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:22.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:22.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:22.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.08:49:22.31#ibcon#first serial, iclass 21, count 2 2006.229.08:49:22.31#ibcon#enter sib2, iclass 21, count 2 2006.229.08:49:22.31#ibcon#flushed, iclass 21, count 2 2006.229.08:49:22.31#ibcon#about to write, iclass 21, count 2 2006.229.08:49:22.31#ibcon#wrote, iclass 21, count 2 2006.229.08:49:22.31#ibcon#about to read 3, iclass 21, count 2 2006.229.08:49:22.33#ibcon#read 3, iclass 21, count 2 2006.229.08:49:22.33#ibcon#about to read 4, iclass 21, count 2 2006.229.08:49:22.33#ibcon#read 4, iclass 21, count 2 2006.229.08:49:22.33#ibcon#about to read 5, iclass 21, count 2 2006.229.08:49:22.33#ibcon#read 5, iclass 21, count 2 2006.229.08:49:22.33#ibcon#about to read 6, iclass 21, count 2 2006.229.08:49:22.33#ibcon#read 6, iclass 21, count 2 2006.229.08:49:22.33#ibcon#end of sib2, iclass 21, count 2 2006.229.08:49:22.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.08:49:22.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.08:49:22.33#ibcon#[25=AT07-05\r\n] 2006.229.08:49:22.33#ibcon#*before write, iclass 21, count 2 2006.229.08:49:22.33#ibcon#enter sib2, iclass 21, count 2 2006.229.08:49:22.33#ibcon#flushed, iclass 21, count 2 2006.229.08:49:22.33#ibcon#about to write, iclass 21, count 2 2006.229.08:49:22.33#ibcon#wrote, iclass 21, count 2 2006.229.08:49:22.33#ibcon#about to read 3, iclass 21, count 2 2006.229.08:49:22.36#ibcon#read 3, iclass 21, count 2 2006.229.08:49:22.36#ibcon#about to read 4, iclass 21, count 2 2006.229.08:49:22.36#ibcon#read 4, iclass 21, count 2 2006.229.08:49:22.36#ibcon#about to read 5, iclass 21, count 2 2006.229.08:49:22.36#ibcon#read 5, iclass 21, count 2 2006.229.08:49:22.36#ibcon#about to read 6, iclass 21, count 2 2006.229.08:49:22.36#ibcon#read 6, iclass 21, count 2 2006.229.08:49:22.36#ibcon#end of sib2, iclass 21, count 2 2006.229.08:49:22.36#ibcon#*after write, iclass 21, count 2 2006.229.08:49:22.36#ibcon#*before return 0, iclass 21, count 2 2006.229.08:49:22.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:22.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:22.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.08:49:22.36#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:22.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:22.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:22.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:22.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:49:22.48#ibcon#first serial, iclass 21, count 0 2006.229.08:49:22.48#ibcon#enter sib2, iclass 21, count 0 2006.229.08:49:22.48#ibcon#flushed, iclass 21, count 0 2006.229.08:49:22.48#ibcon#about to write, iclass 21, count 0 2006.229.08:49:22.48#ibcon#wrote, iclass 21, count 0 2006.229.08:49:22.48#ibcon#about to read 3, iclass 21, count 0 2006.229.08:49:22.50#ibcon#read 3, iclass 21, count 0 2006.229.08:49:22.50#ibcon#about to read 4, iclass 21, count 0 2006.229.08:49:22.50#ibcon#read 4, iclass 21, count 0 2006.229.08:49:22.50#ibcon#about to read 5, iclass 21, count 0 2006.229.08:49:22.50#ibcon#read 5, iclass 21, count 0 2006.229.08:49:22.50#ibcon#about to read 6, iclass 21, count 0 2006.229.08:49:22.50#ibcon#read 6, iclass 21, count 0 2006.229.08:49:22.50#ibcon#end of sib2, iclass 21, count 0 2006.229.08:49:22.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:49:22.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:49:22.50#ibcon#[25=USB\r\n] 2006.229.08:49:22.50#ibcon#*before write, iclass 21, count 0 2006.229.08:49:22.50#ibcon#enter sib2, iclass 21, count 0 2006.229.08:49:22.50#ibcon#flushed, iclass 21, count 0 2006.229.08:49:22.50#ibcon#about to write, iclass 21, count 0 2006.229.08:49:22.50#ibcon#wrote, iclass 21, count 0 2006.229.08:49:22.50#ibcon#about to read 3, iclass 21, count 0 2006.229.08:49:22.53#ibcon#read 3, iclass 21, count 0 2006.229.08:49:22.53#ibcon#about to read 4, iclass 21, count 0 2006.229.08:49:22.53#ibcon#read 4, iclass 21, count 0 2006.229.08:49:22.53#ibcon#about to read 5, iclass 21, count 0 2006.229.08:49:22.53#ibcon#read 5, iclass 21, count 0 2006.229.08:49:22.53#ibcon#about to read 6, iclass 21, count 0 2006.229.08:49:22.53#ibcon#read 6, iclass 21, count 0 2006.229.08:49:22.53#ibcon#end of sib2, iclass 21, count 0 2006.229.08:49:22.53#ibcon#*after write, iclass 21, count 0 2006.229.08:49:22.53#ibcon#*before return 0, iclass 21, count 0 2006.229.08:49:22.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:22.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:22.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:49:22.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:49:22.53$vck44/valo=8,884.99 2006.229.08:49:22.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.08:49:22.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.08:49:22.53#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:22.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:22.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:22.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:22.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:49:22.53#ibcon#first serial, iclass 23, count 0 2006.229.08:49:22.53#ibcon#enter sib2, iclass 23, count 0 2006.229.08:49:22.53#ibcon#flushed, iclass 23, count 0 2006.229.08:49:22.53#ibcon#about to write, iclass 23, count 0 2006.229.08:49:22.53#ibcon#wrote, iclass 23, count 0 2006.229.08:49:22.53#ibcon#about to read 3, iclass 23, count 0 2006.229.08:49:22.55#ibcon#read 3, iclass 23, count 0 2006.229.08:49:22.55#ibcon#about to read 4, iclass 23, count 0 2006.229.08:49:22.55#ibcon#read 4, iclass 23, count 0 2006.229.08:49:22.55#ibcon#about to read 5, iclass 23, count 0 2006.229.08:49:22.55#ibcon#read 5, iclass 23, count 0 2006.229.08:49:22.55#ibcon#about to read 6, iclass 23, count 0 2006.229.08:49:22.55#ibcon#read 6, iclass 23, count 0 2006.229.08:49:22.55#ibcon#end of sib2, iclass 23, count 0 2006.229.08:49:22.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:49:22.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:49:22.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:49:22.55#ibcon#*before write, iclass 23, count 0 2006.229.08:49:22.55#ibcon#enter sib2, iclass 23, count 0 2006.229.08:49:22.55#ibcon#flushed, iclass 23, count 0 2006.229.08:49:22.55#ibcon#about to write, iclass 23, count 0 2006.229.08:49:22.55#ibcon#wrote, iclass 23, count 0 2006.229.08:49:22.55#ibcon#about to read 3, iclass 23, count 0 2006.229.08:49:22.59#ibcon#read 3, iclass 23, count 0 2006.229.08:49:22.59#ibcon#about to read 4, iclass 23, count 0 2006.229.08:49:22.59#ibcon#read 4, iclass 23, count 0 2006.229.08:49:22.59#ibcon#about to read 5, iclass 23, count 0 2006.229.08:49:22.59#ibcon#read 5, iclass 23, count 0 2006.229.08:49:22.59#ibcon#about to read 6, iclass 23, count 0 2006.229.08:49:22.59#ibcon#read 6, iclass 23, count 0 2006.229.08:49:22.59#ibcon#end of sib2, iclass 23, count 0 2006.229.08:49:22.59#ibcon#*after write, iclass 23, count 0 2006.229.08:49:22.59#ibcon#*before return 0, iclass 23, count 0 2006.229.08:49:22.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:22.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:22.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:49:22.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:49:22.59$vck44/va=8,6 2006.229.08:49:22.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.08:49:22.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.08:49:22.59#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:22.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:49:22.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:49:22.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:49:22.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.08:49:22.65#ibcon#first serial, iclass 25, count 2 2006.229.08:49:22.65#ibcon#enter sib2, iclass 25, count 2 2006.229.08:49:22.65#ibcon#flushed, iclass 25, count 2 2006.229.08:49:22.65#ibcon#about to write, iclass 25, count 2 2006.229.08:49:22.65#ibcon#wrote, iclass 25, count 2 2006.229.08:49:22.65#ibcon#about to read 3, iclass 25, count 2 2006.229.08:49:22.67#ibcon#read 3, iclass 25, count 2 2006.229.08:49:22.67#ibcon#about to read 4, iclass 25, count 2 2006.229.08:49:22.67#ibcon#read 4, iclass 25, count 2 2006.229.08:49:22.67#ibcon#about to read 5, iclass 25, count 2 2006.229.08:49:22.67#ibcon#read 5, iclass 25, count 2 2006.229.08:49:22.67#ibcon#about to read 6, iclass 25, count 2 2006.229.08:49:22.67#ibcon#read 6, iclass 25, count 2 2006.229.08:49:22.67#ibcon#end of sib2, iclass 25, count 2 2006.229.08:49:22.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.08:49:22.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.08:49:22.67#ibcon#[25=AT08-06\r\n] 2006.229.08:49:22.67#ibcon#*before write, iclass 25, count 2 2006.229.08:49:22.67#ibcon#enter sib2, iclass 25, count 2 2006.229.08:49:22.67#ibcon#flushed, iclass 25, count 2 2006.229.08:49:22.67#ibcon#about to write, iclass 25, count 2 2006.229.08:49:22.67#ibcon#wrote, iclass 25, count 2 2006.229.08:49:22.67#ibcon#about to read 3, iclass 25, count 2 2006.229.08:49:22.70#ibcon#read 3, iclass 25, count 2 2006.229.08:49:22.70#ibcon#about to read 4, iclass 25, count 2 2006.229.08:49:22.70#ibcon#read 4, iclass 25, count 2 2006.229.08:49:22.70#ibcon#about to read 5, iclass 25, count 2 2006.229.08:49:22.70#ibcon#read 5, iclass 25, count 2 2006.229.08:49:22.70#ibcon#about to read 6, iclass 25, count 2 2006.229.08:49:22.70#ibcon#read 6, iclass 25, count 2 2006.229.08:49:22.70#ibcon#end of sib2, iclass 25, count 2 2006.229.08:49:22.70#ibcon#*after write, iclass 25, count 2 2006.229.08:49:22.70#ibcon#*before return 0, iclass 25, count 2 2006.229.08:49:22.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:49:22.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.08:49:22.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.08:49:22.70#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:22.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:49:22.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:49:22.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:49:22.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:49:22.82#ibcon#first serial, iclass 25, count 0 2006.229.08:49:22.82#ibcon#enter sib2, iclass 25, count 0 2006.229.08:49:22.82#ibcon#flushed, iclass 25, count 0 2006.229.08:49:22.82#ibcon#about to write, iclass 25, count 0 2006.229.08:49:22.82#ibcon#wrote, iclass 25, count 0 2006.229.08:49:22.82#ibcon#about to read 3, iclass 25, count 0 2006.229.08:49:22.84#ibcon#read 3, iclass 25, count 0 2006.229.08:49:22.84#ibcon#about to read 4, iclass 25, count 0 2006.229.08:49:22.84#ibcon#read 4, iclass 25, count 0 2006.229.08:49:22.84#ibcon#about to read 5, iclass 25, count 0 2006.229.08:49:22.84#ibcon#read 5, iclass 25, count 0 2006.229.08:49:22.84#ibcon#about to read 6, iclass 25, count 0 2006.229.08:49:22.84#ibcon#read 6, iclass 25, count 0 2006.229.08:49:22.84#ibcon#end of sib2, iclass 25, count 0 2006.229.08:49:22.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:49:22.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:49:22.84#ibcon#[25=USB\r\n] 2006.229.08:49:22.84#ibcon#*before write, iclass 25, count 0 2006.229.08:49:22.84#ibcon#enter sib2, iclass 25, count 0 2006.229.08:49:22.84#ibcon#flushed, iclass 25, count 0 2006.229.08:49:22.84#ibcon#about to write, iclass 25, count 0 2006.229.08:49:22.84#ibcon#wrote, iclass 25, count 0 2006.229.08:49:22.84#ibcon#about to read 3, iclass 25, count 0 2006.229.08:49:22.87#ibcon#read 3, iclass 25, count 0 2006.229.08:49:22.87#ibcon#about to read 4, iclass 25, count 0 2006.229.08:49:22.87#ibcon#read 4, iclass 25, count 0 2006.229.08:49:22.87#ibcon#about to read 5, iclass 25, count 0 2006.229.08:49:22.87#ibcon#read 5, iclass 25, count 0 2006.229.08:49:22.87#ibcon#about to read 6, iclass 25, count 0 2006.229.08:49:22.87#ibcon#read 6, iclass 25, count 0 2006.229.08:49:22.87#ibcon#end of sib2, iclass 25, count 0 2006.229.08:49:22.87#ibcon#*after write, iclass 25, count 0 2006.229.08:49:22.87#ibcon#*before return 0, iclass 25, count 0 2006.229.08:49:22.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:49:22.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.08:49:22.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:49:22.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:49:22.87$vck44/vblo=1,629.99 2006.229.08:49:22.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.08:49:22.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.08:49:22.87#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:22.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:49:22.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:49:22.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:49:22.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.08:49:22.87#ibcon#first serial, iclass 27, count 0 2006.229.08:49:22.87#ibcon#enter sib2, iclass 27, count 0 2006.229.08:49:22.87#ibcon#flushed, iclass 27, count 0 2006.229.08:49:22.87#ibcon#about to write, iclass 27, count 0 2006.229.08:49:22.87#ibcon#wrote, iclass 27, count 0 2006.229.08:49:22.87#ibcon#about to read 3, iclass 27, count 0 2006.229.08:49:22.89#ibcon#read 3, iclass 27, count 0 2006.229.08:49:22.89#ibcon#about to read 4, iclass 27, count 0 2006.229.08:49:22.89#ibcon#read 4, iclass 27, count 0 2006.229.08:49:22.89#ibcon#about to read 5, iclass 27, count 0 2006.229.08:49:22.89#ibcon#read 5, iclass 27, count 0 2006.229.08:49:22.89#ibcon#about to read 6, iclass 27, count 0 2006.229.08:49:22.89#ibcon#read 6, iclass 27, count 0 2006.229.08:49:22.89#ibcon#end of sib2, iclass 27, count 0 2006.229.08:49:22.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.08:49:22.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.08:49:22.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:49:22.89#ibcon#*before write, iclass 27, count 0 2006.229.08:49:22.89#ibcon#enter sib2, iclass 27, count 0 2006.229.08:49:22.89#ibcon#flushed, iclass 27, count 0 2006.229.08:49:22.89#ibcon#about to write, iclass 27, count 0 2006.229.08:49:22.89#ibcon#wrote, iclass 27, count 0 2006.229.08:49:22.89#ibcon#about to read 3, iclass 27, count 0 2006.229.08:49:22.93#ibcon#read 3, iclass 27, count 0 2006.229.08:49:22.93#ibcon#about to read 4, iclass 27, count 0 2006.229.08:49:22.93#ibcon#read 4, iclass 27, count 0 2006.229.08:49:22.93#ibcon#about to read 5, iclass 27, count 0 2006.229.08:49:22.93#ibcon#read 5, iclass 27, count 0 2006.229.08:49:22.93#ibcon#about to read 6, iclass 27, count 0 2006.229.08:49:22.93#ibcon#read 6, iclass 27, count 0 2006.229.08:49:22.93#ibcon#end of sib2, iclass 27, count 0 2006.229.08:49:22.93#ibcon#*after write, iclass 27, count 0 2006.229.08:49:22.93#ibcon#*before return 0, iclass 27, count 0 2006.229.08:49:22.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:49:22.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.08:49:22.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.08:49:22.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.08:49:22.93$vck44/vb=1,4 2006.229.08:49:22.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.08:49:22.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.08:49:22.93#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:22.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:49:22.93#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:49:22.93#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:49:22.93#ibcon#enter wrdev, iclass 29, count 2 2006.229.08:49:22.93#ibcon#first serial, iclass 29, count 2 2006.229.08:49:22.93#ibcon#enter sib2, iclass 29, count 2 2006.229.08:49:22.93#ibcon#flushed, iclass 29, count 2 2006.229.08:49:22.93#ibcon#about to write, iclass 29, count 2 2006.229.08:49:22.93#ibcon#wrote, iclass 29, count 2 2006.229.08:49:22.93#ibcon#about to read 3, iclass 29, count 2 2006.229.08:49:22.95#ibcon#read 3, iclass 29, count 2 2006.229.08:49:22.95#ibcon#about to read 4, iclass 29, count 2 2006.229.08:49:22.95#ibcon#read 4, iclass 29, count 2 2006.229.08:49:22.95#ibcon#about to read 5, iclass 29, count 2 2006.229.08:49:22.95#ibcon#read 5, iclass 29, count 2 2006.229.08:49:22.95#ibcon#about to read 6, iclass 29, count 2 2006.229.08:49:22.95#ibcon#read 6, iclass 29, count 2 2006.229.08:49:22.95#ibcon#end of sib2, iclass 29, count 2 2006.229.08:49:22.95#ibcon#*mode == 0, iclass 29, count 2 2006.229.08:49:22.95#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.08:49:22.95#ibcon#[27=AT01-04\r\n] 2006.229.08:49:22.95#ibcon#*before write, iclass 29, count 2 2006.229.08:49:22.95#ibcon#enter sib2, iclass 29, count 2 2006.229.08:49:22.95#ibcon#flushed, iclass 29, count 2 2006.229.08:49:22.95#ibcon#about to write, iclass 29, count 2 2006.229.08:49:22.95#ibcon#wrote, iclass 29, count 2 2006.229.08:49:22.95#ibcon#about to read 3, iclass 29, count 2 2006.229.08:49:22.98#ibcon#read 3, iclass 29, count 2 2006.229.08:49:22.98#ibcon#about to read 4, iclass 29, count 2 2006.229.08:49:22.98#ibcon#read 4, iclass 29, count 2 2006.229.08:49:22.98#ibcon#about to read 5, iclass 29, count 2 2006.229.08:49:22.98#ibcon#read 5, iclass 29, count 2 2006.229.08:49:22.98#ibcon#about to read 6, iclass 29, count 2 2006.229.08:49:22.98#ibcon#read 6, iclass 29, count 2 2006.229.08:49:22.98#ibcon#end of sib2, iclass 29, count 2 2006.229.08:49:22.98#ibcon#*after write, iclass 29, count 2 2006.229.08:49:22.98#ibcon#*before return 0, iclass 29, count 2 2006.229.08:49:22.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:49:22.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.08:49:22.98#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.08:49:22.98#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:22.98#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:49:23.10#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:49:23.10#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:49:23.10#ibcon#enter wrdev, iclass 29, count 0 2006.229.08:49:23.10#ibcon#first serial, iclass 29, count 0 2006.229.08:49:23.10#ibcon#enter sib2, iclass 29, count 0 2006.229.08:49:23.10#ibcon#flushed, iclass 29, count 0 2006.229.08:49:23.10#ibcon#about to write, iclass 29, count 0 2006.229.08:49:23.10#ibcon#wrote, iclass 29, count 0 2006.229.08:49:23.10#ibcon#about to read 3, iclass 29, count 0 2006.229.08:49:23.12#ibcon#read 3, iclass 29, count 0 2006.229.08:49:23.12#ibcon#about to read 4, iclass 29, count 0 2006.229.08:49:23.12#ibcon#read 4, iclass 29, count 0 2006.229.08:49:23.12#ibcon#about to read 5, iclass 29, count 0 2006.229.08:49:23.12#ibcon#read 5, iclass 29, count 0 2006.229.08:49:23.12#ibcon#about to read 6, iclass 29, count 0 2006.229.08:49:23.12#ibcon#read 6, iclass 29, count 0 2006.229.08:49:23.12#ibcon#end of sib2, iclass 29, count 0 2006.229.08:49:23.12#ibcon#*mode == 0, iclass 29, count 0 2006.229.08:49:23.12#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.08:49:23.12#ibcon#[27=USB\r\n] 2006.229.08:49:23.12#ibcon#*before write, iclass 29, count 0 2006.229.08:49:23.12#ibcon#enter sib2, iclass 29, count 0 2006.229.08:49:23.12#ibcon#flushed, iclass 29, count 0 2006.229.08:49:23.12#ibcon#about to write, iclass 29, count 0 2006.229.08:49:23.12#ibcon#wrote, iclass 29, count 0 2006.229.08:49:23.12#ibcon#about to read 3, iclass 29, count 0 2006.229.08:49:23.15#ibcon#read 3, iclass 29, count 0 2006.229.08:49:23.15#ibcon#about to read 4, iclass 29, count 0 2006.229.08:49:23.15#ibcon#read 4, iclass 29, count 0 2006.229.08:49:23.15#ibcon#about to read 5, iclass 29, count 0 2006.229.08:49:23.15#ibcon#read 5, iclass 29, count 0 2006.229.08:49:23.15#ibcon#about to read 6, iclass 29, count 0 2006.229.08:49:23.15#ibcon#read 6, iclass 29, count 0 2006.229.08:49:23.15#ibcon#end of sib2, iclass 29, count 0 2006.229.08:49:23.15#ibcon#*after write, iclass 29, count 0 2006.229.08:49:23.15#ibcon#*before return 0, iclass 29, count 0 2006.229.08:49:23.15#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:49:23.15#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.08:49:23.15#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.08:49:23.15#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.08:49:23.15$vck44/vblo=2,634.99 2006.229.08:49:23.15#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.08:49:23.15#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.08:49:23.15#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:23.15#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:23.15#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:23.15#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:23.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.08:49:23.15#ibcon#first serial, iclass 31, count 0 2006.229.08:49:23.15#ibcon#enter sib2, iclass 31, count 0 2006.229.08:49:23.15#ibcon#flushed, iclass 31, count 0 2006.229.08:49:23.15#ibcon#about to write, iclass 31, count 0 2006.229.08:49:23.15#ibcon#wrote, iclass 31, count 0 2006.229.08:49:23.15#ibcon#about to read 3, iclass 31, count 0 2006.229.08:49:23.17#ibcon#read 3, iclass 31, count 0 2006.229.08:49:23.17#ibcon#about to read 4, iclass 31, count 0 2006.229.08:49:23.17#ibcon#read 4, iclass 31, count 0 2006.229.08:49:23.17#ibcon#about to read 5, iclass 31, count 0 2006.229.08:49:23.17#ibcon#read 5, iclass 31, count 0 2006.229.08:49:23.17#ibcon#about to read 6, iclass 31, count 0 2006.229.08:49:23.17#ibcon#read 6, iclass 31, count 0 2006.229.08:49:23.17#ibcon#end of sib2, iclass 31, count 0 2006.229.08:49:23.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.08:49:23.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.08:49:23.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:49:23.17#ibcon#*before write, iclass 31, count 0 2006.229.08:49:23.17#ibcon#enter sib2, iclass 31, count 0 2006.229.08:49:23.17#ibcon#flushed, iclass 31, count 0 2006.229.08:49:23.17#ibcon#about to write, iclass 31, count 0 2006.229.08:49:23.17#ibcon#wrote, iclass 31, count 0 2006.229.08:49:23.17#ibcon#about to read 3, iclass 31, count 0 2006.229.08:49:23.21#ibcon#read 3, iclass 31, count 0 2006.229.08:49:23.21#ibcon#about to read 4, iclass 31, count 0 2006.229.08:49:23.21#ibcon#read 4, iclass 31, count 0 2006.229.08:49:23.21#ibcon#about to read 5, iclass 31, count 0 2006.229.08:49:23.21#ibcon#read 5, iclass 31, count 0 2006.229.08:49:23.21#ibcon#about to read 6, iclass 31, count 0 2006.229.08:49:23.21#ibcon#read 6, iclass 31, count 0 2006.229.08:49:23.21#ibcon#end of sib2, iclass 31, count 0 2006.229.08:49:23.21#ibcon#*after write, iclass 31, count 0 2006.229.08:49:23.21#ibcon#*before return 0, iclass 31, count 0 2006.229.08:49:23.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:23.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.08:49:23.21#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.08:49:23.21#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.08:49:23.21$vck44/vb=2,4 2006.229.08:49:23.21#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.08:49:23.21#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.08:49:23.21#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:23.21#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:23.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:23.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:23.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.08:49:23.27#ibcon#first serial, iclass 33, count 2 2006.229.08:49:23.27#ibcon#enter sib2, iclass 33, count 2 2006.229.08:49:23.27#ibcon#flushed, iclass 33, count 2 2006.229.08:49:23.27#ibcon#about to write, iclass 33, count 2 2006.229.08:49:23.27#ibcon#wrote, iclass 33, count 2 2006.229.08:49:23.27#ibcon#about to read 3, iclass 33, count 2 2006.229.08:49:23.29#ibcon#read 3, iclass 33, count 2 2006.229.08:49:23.29#ibcon#about to read 4, iclass 33, count 2 2006.229.08:49:23.29#ibcon#read 4, iclass 33, count 2 2006.229.08:49:23.29#ibcon#about to read 5, iclass 33, count 2 2006.229.08:49:23.29#ibcon#read 5, iclass 33, count 2 2006.229.08:49:23.29#ibcon#about to read 6, iclass 33, count 2 2006.229.08:49:23.29#ibcon#read 6, iclass 33, count 2 2006.229.08:49:23.29#ibcon#end of sib2, iclass 33, count 2 2006.229.08:49:23.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.08:49:23.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.08:49:23.29#ibcon#[27=AT02-04\r\n] 2006.229.08:49:23.29#ibcon#*before write, iclass 33, count 2 2006.229.08:49:23.29#ibcon#enter sib2, iclass 33, count 2 2006.229.08:49:23.29#ibcon#flushed, iclass 33, count 2 2006.229.08:49:23.29#ibcon#about to write, iclass 33, count 2 2006.229.08:49:23.29#ibcon#wrote, iclass 33, count 2 2006.229.08:49:23.29#ibcon#about to read 3, iclass 33, count 2 2006.229.08:49:23.32#ibcon#read 3, iclass 33, count 2 2006.229.08:49:23.32#ibcon#about to read 4, iclass 33, count 2 2006.229.08:49:23.32#ibcon#read 4, iclass 33, count 2 2006.229.08:49:23.32#ibcon#about to read 5, iclass 33, count 2 2006.229.08:49:23.32#ibcon#read 5, iclass 33, count 2 2006.229.08:49:23.32#ibcon#about to read 6, iclass 33, count 2 2006.229.08:49:23.32#ibcon#read 6, iclass 33, count 2 2006.229.08:49:23.32#ibcon#end of sib2, iclass 33, count 2 2006.229.08:49:23.32#ibcon#*after write, iclass 33, count 2 2006.229.08:49:23.32#ibcon#*before return 0, iclass 33, count 2 2006.229.08:49:23.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:23.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.08:49:23.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.08:49:23.32#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:23.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:23.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:23.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:23.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.08:49:23.44#ibcon#first serial, iclass 33, count 0 2006.229.08:49:23.44#ibcon#enter sib2, iclass 33, count 0 2006.229.08:49:23.44#ibcon#flushed, iclass 33, count 0 2006.229.08:49:23.44#ibcon#about to write, iclass 33, count 0 2006.229.08:49:23.44#ibcon#wrote, iclass 33, count 0 2006.229.08:49:23.44#ibcon#about to read 3, iclass 33, count 0 2006.229.08:49:23.46#ibcon#read 3, iclass 33, count 0 2006.229.08:49:23.46#ibcon#about to read 4, iclass 33, count 0 2006.229.08:49:23.46#ibcon#read 4, iclass 33, count 0 2006.229.08:49:23.46#ibcon#about to read 5, iclass 33, count 0 2006.229.08:49:23.46#ibcon#read 5, iclass 33, count 0 2006.229.08:49:23.46#ibcon#about to read 6, iclass 33, count 0 2006.229.08:49:23.46#ibcon#read 6, iclass 33, count 0 2006.229.08:49:23.46#ibcon#end of sib2, iclass 33, count 0 2006.229.08:49:23.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.08:49:23.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.08:49:23.46#ibcon#[27=USB\r\n] 2006.229.08:49:23.46#ibcon#*before write, iclass 33, count 0 2006.229.08:49:23.46#ibcon#enter sib2, iclass 33, count 0 2006.229.08:49:23.46#ibcon#flushed, iclass 33, count 0 2006.229.08:49:23.46#ibcon#about to write, iclass 33, count 0 2006.229.08:49:23.46#ibcon#wrote, iclass 33, count 0 2006.229.08:49:23.46#ibcon#about to read 3, iclass 33, count 0 2006.229.08:49:23.49#ibcon#read 3, iclass 33, count 0 2006.229.08:49:23.49#ibcon#about to read 4, iclass 33, count 0 2006.229.08:49:23.49#ibcon#read 4, iclass 33, count 0 2006.229.08:49:23.49#ibcon#about to read 5, iclass 33, count 0 2006.229.08:49:23.49#ibcon#read 5, iclass 33, count 0 2006.229.08:49:23.49#ibcon#about to read 6, iclass 33, count 0 2006.229.08:49:23.49#ibcon#read 6, iclass 33, count 0 2006.229.08:49:23.49#ibcon#end of sib2, iclass 33, count 0 2006.229.08:49:23.49#ibcon#*after write, iclass 33, count 0 2006.229.08:49:23.49#ibcon#*before return 0, iclass 33, count 0 2006.229.08:49:23.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:23.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.08:49:23.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.08:49:23.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.08:49:23.49$vck44/vblo=3,649.99 2006.229.08:49:23.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.08:49:23.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.08:49:23.49#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:23.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:23.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:23.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:23.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.08:49:23.49#ibcon#first serial, iclass 35, count 0 2006.229.08:49:23.49#ibcon#enter sib2, iclass 35, count 0 2006.229.08:49:23.49#ibcon#flushed, iclass 35, count 0 2006.229.08:49:23.49#ibcon#about to write, iclass 35, count 0 2006.229.08:49:23.49#ibcon#wrote, iclass 35, count 0 2006.229.08:49:23.49#ibcon#about to read 3, iclass 35, count 0 2006.229.08:49:23.51#ibcon#read 3, iclass 35, count 0 2006.229.08:49:23.51#ibcon#about to read 4, iclass 35, count 0 2006.229.08:49:23.51#ibcon#read 4, iclass 35, count 0 2006.229.08:49:23.51#ibcon#about to read 5, iclass 35, count 0 2006.229.08:49:23.51#ibcon#read 5, iclass 35, count 0 2006.229.08:49:23.51#ibcon#about to read 6, iclass 35, count 0 2006.229.08:49:23.51#ibcon#read 6, iclass 35, count 0 2006.229.08:49:23.51#ibcon#end of sib2, iclass 35, count 0 2006.229.08:49:23.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.08:49:23.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.08:49:23.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:49:23.51#ibcon#*before write, iclass 35, count 0 2006.229.08:49:23.51#ibcon#enter sib2, iclass 35, count 0 2006.229.08:49:23.51#ibcon#flushed, iclass 35, count 0 2006.229.08:49:23.51#ibcon#about to write, iclass 35, count 0 2006.229.08:49:23.51#ibcon#wrote, iclass 35, count 0 2006.229.08:49:23.51#ibcon#about to read 3, iclass 35, count 0 2006.229.08:49:23.55#ibcon#read 3, iclass 35, count 0 2006.229.08:49:23.55#ibcon#about to read 4, iclass 35, count 0 2006.229.08:49:23.55#ibcon#read 4, iclass 35, count 0 2006.229.08:49:23.55#ibcon#about to read 5, iclass 35, count 0 2006.229.08:49:23.55#ibcon#read 5, iclass 35, count 0 2006.229.08:49:23.55#ibcon#about to read 6, iclass 35, count 0 2006.229.08:49:23.55#ibcon#read 6, iclass 35, count 0 2006.229.08:49:23.55#ibcon#end of sib2, iclass 35, count 0 2006.229.08:49:23.55#ibcon#*after write, iclass 35, count 0 2006.229.08:49:23.55#ibcon#*before return 0, iclass 35, count 0 2006.229.08:49:23.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:23.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.08:49:23.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.08:49:23.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.08:49:23.55$vck44/vb=3,4 2006.229.08:49:23.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.08:49:23.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.08:49:23.55#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:23.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:23.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:23.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:23.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.08:49:23.61#ibcon#first serial, iclass 37, count 2 2006.229.08:49:23.61#ibcon#enter sib2, iclass 37, count 2 2006.229.08:49:23.61#ibcon#flushed, iclass 37, count 2 2006.229.08:49:23.61#ibcon#about to write, iclass 37, count 2 2006.229.08:49:23.61#ibcon#wrote, iclass 37, count 2 2006.229.08:49:23.61#ibcon#about to read 3, iclass 37, count 2 2006.229.08:49:23.63#ibcon#read 3, iclass 37, count 2 2006.229.08:49:23.63#ibcon#about to read 4, iclass 37, count 2 2006.229.08:49:23.63#ibcon#read 4, iclass 37, count 2 2006.229.08:49:23.63#ibcon#about to read 5, iclass 37, count 2 2006.229.08:49:23.63#ibcon#read 5, iclass 37, count 2 2006.229.08:49:23.63#ibcon#about to read 6, iclass 37, count 2 2006.229.08:49:23.63#ibcon#read 6, iclass 37, count 2 2006.229.08:49:23.63#ibcon#end of sib2, iclass 37, count 2 2006.229.08:49:23.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.08:49:23.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.08:49:23.63#ibcon#[27=AT03-04\r\n] 2006.229.08:49:23.63#ibcon#*before write, iclass 37, count 2 2006.229.08:49:23.63#ibcon#enter sib2, iclass 37, count 2 2006.229.08:49:23.63#ibcon#flushed, iclass 37, count 2 2006.229.08:49:23.63#ibcon#about to write, iclass 37, count 2 2006.229.08:49:23.63#ibcon#wrote, iclass 37, count 2 2006.229.08:49:23.63#ibcon#about to read 3, iclass 37, count 2 2006.229.08:49:23.66#ibcon#read 3, iclass 37, count 2 2006.229.08:49:23.66#ibcon#about to read 4, iclass 37, count 2 2006.229.08:49:23.66#ibcon#read 4, iclass 37, count 2 2006.229.08:49:23.66#ibcon#about to read 5, iclass 37, count 2 2006.229.08:49:23.66#ibcon#read 5, iclass 37, count 2 2006.229.08:49:23.66#ibcon#about to read 6, iclass 37, count 2 2006.229.08:49:23.66#ibcon#read 6, iclass 37, count 2 2006.229.08:49:23.66#ibcon#end of sib2, iclass 37, count 2 2006.229.08:49:23.66#ibcon#*after write, iclass 37, count 2 2006.229.08:49:23.66#ibcon#*before return 0, iclass 37, count 2 2006.229.08:49:23.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:23.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.08:49:23.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.08:49:23.66#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:23.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:23.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:23.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:23.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.08:49:23.78#ibcon#first serial, iclass 37, count 0 2006.229.08:49:23.78#ibcon#enter sib2, iclass 37, count 0 2006.229.08:49:23.78#ibcon#flushed, iclass 37, count 0 2006.229.08:49:23.78#ibcon#about to write, iclass 37, count 0 2006.229.08:49:23.78#ibcon#wrote, iclass 37, count 0 2006.229.08:49:23.78#ibcon#about to read 3, iclass 37, count 0 2006.229.08:49:23.80#ibcon#read 3, iclass 37, count 0 2006.229.08:49:23.80#ibcon#about to read 4, iclass 37, count 0 2006.229.08:49:23.80#ibcon#read 4, iclass 37, count 0 2006.229.08:49:23.80#ibcon#about to read 5, iclass 37, count 0 2006.229.08:49:23.80#ibcon#read 5, iclass 37, count 0 2006.229.08:49:23.80#ibcon#about to read 6, iclass 37, count 0 2006.229.08:49:23.80#ibcon#read 6, iclass 37, count 0 2006.229.08:49:23.80#ibcon#end of sib2, iclass 37, count 0 2006.229.08:49:23.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.08:49:23.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.08:49:23.80#ibcon#[27=USB\r\n] 2006.229.08:49:23.80#ibcon#*before write, iclass 37, count 0 2006.229.08:49:23.80#ibcon#enter sib2, iclass 37, count 0 2006.229.08:49:23.80#ibcon#flushed, iclass 37, count 0 2006.229.08:49:23.80#ibcon#about to write, iclass 37, count 0 2006.229.08:49:23.80#ibcon#wrote, iclass 37, count 0 2006.229.08:49:23.80#ibcon#about to read 3, iclass 37, count 0 2006.229.08:49:23.83#ibcon#read 3, iclass 37, count 0 2006.229.08:49:23.83#ibcon#about to read 4, iclass 37, count 0 2006.229.08:49:23.83#ibcon#read 4, iclass 37, count 0 2006.229.08:49:23.83#ibcon#about to read 5, iclass 37, count 0 2006.229.08:49:23.83#ibcon#read 5, iclass 37, count 0 2006.229.08:49:23.83#ibcon#about to read 6, iclass 37, count 0 2006.229.08:49:23.83#ibcon#read 6, iclass 37, count 0 2006.229.08:49:23.83#ibcon#end of sib2, iclass 37, count 0 2006.229.08:49:23.83#ibcon#*after write, iclass 37, count 0 2006.229.08:49:23.83#ibcon#*before return 0, iclass 37, count 0 2006.229.08:49:23.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:23.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.08:49:23.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.08:49:23.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.08:49:23.83$vck44/vblo=4,679.99 2006.229.08:49:23.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.08:49:23.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.08:49:23.83#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:23.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:23.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:23.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:23.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.08:49:23.83#ibcon#first serial, iclass 39, count 0 2006.229.08:49:23.83#ibcon#enter sib2, iclass 39, count 0 2006.229.08:49:23.83#ibcon#flushed, iclass 39, count 0 2006.229.08:49:23.83#ibcon#about to write, iclass 39, count 0 2006.229.08:49:23.83#ibcon#wrote, iclass 39, count 0 2006.229.08:49:23.83#ibcon#about to read 3, iclass 39, count 0 2006.229.08:49:23.85#ibcon#read 3, iclass 39, count 0 2006.229.08:49:23.85#ibcon#about to read 4, iclass 39, count 0 2006.229.08:49:23.85#ibcon#read 4, iclass 39, count 0 2006.229.08:49:23.85#ibcon#about to read 5, iclass 39, count 0 2006.229.08:49:23.85#ibcon#read 5, iclass 39, count 0 2006.229.08:49:23.85#ibcon#about to read 6, iclass 39, count 0 2006.229.08:49:23.85#ibcon#read 6, iclass 39, count 0 2006.229.08:49:23.85#ibcon#end of sib2, iclass 39, count 0 2006.229.08:49:23.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.08:49:23.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.08:49:23.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:49:23.85#ibcon#*before write, iclass 39, count 0 2006.229.08:49:23.85#ibcon#enter sib2, iclass 39, count 0 2006.229.08:49:23.85#ibcon#flushed, iclass 39, count 0 2006.229.08:49:23.85#ibcon#about to write, iclass 39, count 0 2006.229.08:49:23.85#ibcon#wrote, iclass 39, count 0 2006.229.08:49:23.85#ibcon#about to read 3, iclass 39, count 0 2006.229.08:49:23.89#ibcon#read 3, iclass 39, count 0 2006.229.08:49:23.89#ibcon#about to read 4, iclass 39, count 0 2006.229.08:49:23.89#ibcon#read 4, iclass 39, count 0 2006.229.08:49:23.89#ibcon#about to read 5, iclass 39, count 0 2006.229.08:49:23.89#ibcon#read 5, iclass 39, count 0 2006.229.08:49:23.89#ibcon#about to read 6, iclass 39, count 0 2006.229.08:49:23.89#ibcon#read 6, iclass 39, count 0 2006.229.08:49:23.89#ibcon#end of sib2, iclass 39, count 0 2006.229.08:49:23.89#ibcon#*after write, iclass 39, count 0 2006.229.08:49:23.89#ibcon#*before return 0, iclass 39, count 0 2006.229.08:49:23.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:23.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.08:49:23.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.08:49:23.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.08:49:23.89$vck44/vb=4,4 2006.229.08:49:23.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.08:49:23.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.08:49:23.89#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:23.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:23.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:23.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:23.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.08:49:23.95#ibcon#first serial, iclass 3, count 2 2006.229.08:49:23.95#ibcon#enter sib2, iclass 3, count 2 2006.229.08:49:23.95#ibcon#flushed, iclass 3, count 2 2006.229.08:49:23.95#ibcon#about to write, iclass 3, count 2 2006.229.08:49:23.95#ibcon#wrote, iclass 3, count 2 2006.229.08:49:23.95#ibcon#about to read 3, iclass 3, count 2 2006.229.08:49:23.97#ibcon#read 3, iclass 3, count 2 2006.229.08:49:23.97#ibcon#about to read 4, iclass 3, count 2 2006.229.08:49:23.97#ibcon#read 4, iclass 3, count 2 2006.229.08:49:23.97#ibcon#about to read 5, iclass 3, count 2 2006.229.08:49:23.97#ibcon#read 5, iclass 3, count 2 2006.229.08:49:23.97#ibcon#about to read 6, iclass 3, count 2 2006.229.08:49:23.97#ibcon#read 6, iclass 3, count 2 2006.229.08:49:23.97#ibcon#end of sib2, iclass 3, count 2 2006.229.08:49:23.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.08:49:23.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.08:49:23.97#ibcon#[27=AT04-04\r\n] 2006.229.08:49:23.97#ibcon#*before write, iclass 3, count 2 2006.229.08:49:23.97#ibcon#enter sib2, iclass 3, count 2 2006.229.08:49:23.97#ibcon#flushed, iclass 3, count 2 2006.229.08:49:23.97#ibcon#about to write, iclass 3, count 2 2006.229.08:49:23.97#ibcon#wrote, iclass 3, count 2 2006.229.08:49:23.97#ibcon#about to read 3, iclass 3, count 2 2006.229.08:49:24.00#ibcon#read 3, iclass 3, count 2 2006.229.08:49:24.00#ibcon#about to read 4, iclass 3, count 2 2006.229.08:49:24.00#ibcon#read 4, iclass 3, count 2 2006.229.08:49:24.00#ibcon#about to read 5, iclass 3, count 2 2006.229.08:49:24.00#ibcon#read 5, iclass 3, count 2 2006.229.08:49:24.00#ibcon#about to read 6, iclass 3, count 2 2006.229.08:49:24.00#ibcon#read 6, iclass 3, count 2 2006.229.08:49:24.00#ibcon#end of sib2, iclass 3, count 2 2006.229.08:49:24.00#ibcon#*after write, iclass 3, count 2 2006.229.08:49:24.00#ibcon#*before return 0, iclass 3, count 2 2006.229.08:49:24.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:24.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.08:49:24.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.08:49:24.00#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:24.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:24.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:24.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:24.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.08:49:24.12#ibcon#first serial, iclass 3, count 0 2006.229.08:49:24.12#ibcon#enter sib2, iclass 3, count 0 2006.229.08:49:24.12#ibcon#flushed, iclass 3, count 0 2006.229.08:49:24.12#ibcon#about to write, iclass 3, count 0 2006.229.08:49:24.12#ibcon#wrote, iclass 3, count 0 2006.229.08:49:24.12#ibcon#about to read 3, iclass 3, count 0 2006.229.08:49:24.14#ibcon#read 3, iclass 3, count 0 2006.229.08:49:24.14#ibcon#about to read 4, iclass 3, count 0 2006.229.08:49:24.14#ibcon#read 4, iclass 3, count 0 2006.229.08:49:24.14#ibcon#about to read 5, iclass 3, count 0 2006.229.08:49:24.14#ibcon#read 5, iclass 3, count 0 2006.229.08:49:24.14#ibcon#about to read 6, iclass 3, count 0 2006.229.08:49:24.14#ibcon#read 6, iclass 3, count 0 2006.229.08:49:24.14#ibcon#end of sib2, iclass 3, count 0 2006.229.08:49:24.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.08:49:24.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.08:49:24.14#ibcon#[27=USB\r\n] 2006.229.08:49:24.14#ibcon#*before write, iclass 3, count 0 2006.229.08:49:24.14#ibcon#enter sib2, iclass 3, count 0 2006.229.08:49:24.14#ibcon#flushed, iclass 3, count 0 2006.229.08:49:24.14#ibcon#about to write, iclass 3, count 0 2006.229.08:49:24.14#ibcon#wrote, iclass 3, count 0 2006.229.08:49:24.14#ibcon#about to read 3, iclass 3, count 0 2006.229.08:49:24.17#ibcon#read 3, iclass 3, count 0 2006.229.08:49:24.17#ibcon#about to read 4, iclass 3, count 0 2006.229.08:49:24.17#ibcon#read 4, iclass 3, count 0 2006.229.08:49:24.17#ibcon#about to read 5, iclass 3, count 0 2006.229.08:49:24.17#ibcon#read 5, iclass 3, count 0 2006.229.08:49:24.17#ibcon#about to read 6, iclass 3, count 0 2006.229.08:49:24.17#ibcon#read 6, iclass 3, count 0 2006.229.08:49:24.17#ibcon#end of sib2, iclass 3, count 0 2006.229.08:49:24.17#ibcon#*after write, iclass 3, count 0 2006.229.08:49:24.17#ibcon#*before return 0, iclass 3, count 0 2006.229.08:49:24.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:24.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.08:49:24.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.08:49:24.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.08:49:24.17$vck44/vblo=5,709.99 2006.229.08:49:24.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.08:49:24.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.08:49:24.17#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:24.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:24.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:24.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:24.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.08:49:24.17#ibcon#first serial, iclass 5, count 0 2006.229.08:49:24.17#ibcon#enter sib2, iclass 5, count 0 2006.229.08:49:24.17#ibcon#flushed, iclass 5, count 0 2006.229.08:49:24.17#ibcon#about to write, iclass 5, count 0 2006.229.08:49:24.17#ibcon#wrote, iclass 5, count 0 2006.229.08:49:24.17#ibcon#about to read 3, iclass 5, count 0 2006.229.08:49:24.19#ibcon#read 3, iclass 5, count 0 2006.229.08:49:24.19#ibcon#about to read 4, iclass 5, count 0 2006.229.08:49:24.19#ibcon#read 4, iclass 5, count 0 2006.229.08:49:24.19#ibcon#about to read 5, iclass 5, count 0 2006.229.08:49:24.19#ibcon#read 5, iclass 5, count 0 2006.229.08:49:24.19#ibcon#about to read 6, iclass 5, count 0 2006.229.08:49:24.19#ibcon#read 6, iclass 5, count 0 2006.229.08:49:24.19#ibcon#end of sib2, iclass 5, count 0 2006.229.08:49:24.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.08:49:24.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.08:49:24.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:49:24.19#ibcon#*before write, iclass 5, count 0 2006.229.08:49:24.19#ibcon#enter sib2, iclass 5, count 0 2006.229.08:49:24.19#ibcon#flushed, iclass 5, count 0 2006.229.08:49:24.19#ibcon#about to write, iclass 5, count 0 2006.229.08:49:24.19#ibcon#wrote, iclass 5, count 0 2006.229.08:49:24.19#ibcon#about to read 3, iclass 5, count 0 2006.229.08:49:24.23#ibcon#read 3, iclass 5, count 0 2006.229.08:49:24.23#ibcon#about to read 4, iclass 5, count 0 2006.229.08:49:24.23#ibcon#read 4, iclass 5, count 0 2006.229.08:49:24.23#ibcon#about to read 5, iclass 5, count 0 2006.229.08:49:24.23#ibcon#read 5, iclass 5, count 0 2006.229.08:49:24.23#ibcon#about to read 6, iclass 5, count 0 2006.229.08:49:24.23#ibcon#read 6, iclass 5, count 0 2006.229.08:49:24.23#ibcon#end of sib2, iclass 5, count 0 2006.229.08:49:24.23#ibcon#*after write, iclass 5, count 0 2006.229.08:49:24.23#ibcon#*before return 0, iclass 5, count 0 2006.229.08:49:24.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:24.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.08:49:24.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.08:49:24.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.08:49:24.23$vck44/vb=5,4 2006.229.08:49:24.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.08:49:24.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.08:49:24.23#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:24.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:24.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:24.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:24.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.08:49:24.29#ibcon#first serial, iclass 7, count 2 2006.229.08:49:24.29#ibcon#enter sib2, iclass 7, count 2 2006.229.08:49:24.29#ibcon#flushed, iclass 7, count 2 2006.229.08:49:24.29#ibcon#about to write, iclass 7, count 2 2006.229.08:49:24.29#ibcon#wrote, iclass 7, count 2 2006.229.08:49:24.29#ibcon#about to read 3, iclass 7, count 2 2006.229.08:49:24.31#ibcon#read 3, iclass 7, count 2 2006.229.08:49:24.31#ibcon#about to read 4, iclass 7, count 2 2006.229.08:49:24.31#ibcon#read 4, iclass 7, count 2 2006.229.08:49:24.31#ibcon#about to read 5, iclass 7, count 2 2006.229.08:49:24.31#ibcon#read 5, iclass 7, count 2 2006.229.08:49:24.31#ibcon#about to read 6, iclass 7, count 2 2006.229.08:49:24.31#ibcon#read 6, iclass 7, count 2 2006.229.08:49:24.31#ibcon#end of sib2, iclass 7, count 2 2006.229.08:49:24.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.08:49:24.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.08:49:24.31#ibcon#[27=AT05-04\r\n] 2006.229.08:49:24.31#ibcon#*before write, iclass 7, count 2 2006.229.08:49:24.31#ibcon#enter sib2, iclass 7, count 2 2006.229.08:49:24.31#ibcon#flushed, iclass 7, count 2 2006.229.08:49:24.31#ibcon#about to write, iclass 7, count 2 2006.229.08:49:24.31#ibcon#wrote, iclass 7, count 2 2006.229.08:49:24.31#ibcon#about to read 3, iclass 7, count 2 2006.229.08:49:24.34#ibcon#read 3, iclass 7, count 2 2006.229.08:49:24.34#ibcon#about to read 4, iclass 7, count 2 2006.229.08:49:24.34#ibcon#read 4, iclass 7, count 2 2006.229.08:49:24.34#ibcon#about to read 5, iclass 7, count 2 2006.229.08:49:24.34#ibcon#read 5, iclass 7, count 2 2006.229.08:49:24.34#ibcon#about to read 6, iclass 7, count 2 2006.229.08:49:24.34#ibcon#read 6, iclass 7, count 2 2006.229.08:49:24.34#ibcon#end of sib2, iclass 7, count 2 2006.229.08:49:24.34#ibcon#*after write, iclass 7, count 2 2006.229.08:49:24.34#ibcon#*before return 0, iclass 7, count 2 2006.229.08:49:24.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:24.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.08:49:24.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.08:49:24.34#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:24.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:24.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:24.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:24.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.08:49:24.46#ibcon#first serial, iclass 7, count 0 2006.229.08:49:24.46#ibcon#enter sib2, iclass 7, count 0 2006.229.08:49:24.46#ibcon#flushed, iclass 7, count 0 2006.229.08:49:24.46#ibcon#about to write, iclass 7, count 0 2006.229.08:49:24.46#ibcon#wrote, iclass 7, count 0 2006.229.08:49:24.46#ibcon#about to read 3, iclass 7, count 0 2006.229.08:49:24.48#ibcon#read 3, iclass 7, count 0 2006.229.08:49:24.48#ibcon#about to read 4, iclass 7, count 0 2006.229.08:49:24.48#ibcon#read 4, iclass 7, count 0 2006.229.08:49:24.48#ibcon#about to read 5, iclass 7, count 0 2006.229.08:49:24.48#ibcon#read 5, iclass 7, count 0 2006.229.08:49:24.48#ibcon#about to read 6, iclass 7, count 0 2006.229.08:49:24.48#ibcon#read 6, iclass 7, count 0 2006.229.08:49:24.48#ibcon#end of sib2, iclass 7, count 0 2006.229.08:49:24.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.08:49:24.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.08:49:24.48#ibcon#[27=USB\r\n] 2006.229.08:49:24.48#ibcon#*before write, iclass 7, count 0 2006.229.08:49:24.48#ibcon#enter sib2, iclass 7, count 0 2006.229.08:49:24.48#ibcon#flushed, iclass 7, count 0 2006.229.08:49:24.48#ibcon#about to write, iclass 7, count 0 2006.229.08:49:24.48#ibcon#wrote, iclass 7, count 0 2006.229.08:49:24.48#ibcon#about to read 3, iclass 7, count 0 2006.229.08:49:24.51#ibcon#read 3, iclass 7, count 0 2006.229.08:49:24.51#ibcon#about to read 4, iclass 7, count 0 2006.229.08:49:24.51#ibcon#read 4, iclass 7, count 0 2006.229.08:49:24.51#ibcon#about to read 5, iclass 7, count 0 2006.229.08:49:24.51#ibcon#read 5, iclass 7, count 0 2006.229.08:49:24.51#ibcon#about to read 6, iclass 7, count 0 2006.229.08:49:24.51#ibcon#read 6, iclass 7, count 0 2006.229.08:49:24.51#ibcon#end of sib2, iclass 7, count 0 2006.229.08:49:24.51#ibcon#*after write, iclass 7, count 0 2006.229.08:49:24.51#ibcon#*before return 0, iclass 7, count 0 2006.229.08:49:24.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:24.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.08:49:24.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.08:49:24.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.08:49:24.51$vck44/vblo=6,719.99 2006.229.08:49:24.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.08:49:24.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.08:49:24.51#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:24.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:24.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:24.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:24.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.08:49:24.51#ibcon#first serial, iclass 11, count 0 2006.229.08:49:24.51#ibcon#enter sib2, iclass 11, count 0 2006.229.08:49:24.51#ibcon#flushed, iclass 11, count 0 2006.229.08:49:24.51#ibcon#about to write, iclass 11, count 0 2006.229.08:49:24.51#ibcon#wrote, iclass 11, count 0 2006.229.08:49:24.51#ibcon#about to read 3, iclass 11, count 0 2006.229.08:49:24.53#ibcon#read 3, iclass 11, count 0 2006.229.08:49:24.53#ibcon#about to read 4, iclass 11, count 0 2006.229.08:49:24.53#ibcon#read 4, iclass 11, count 0 2006.229.08:49:24.53#ibcon#about to read 5, iclass 11, count 0 2006.229.08:49:24.53#ibcon#read 5, iclass 11, count 0 2006.229.08:49:24.53#ibcon#about to read 6, iclass 11, count 0 2006.229.08:49:24.53#ibcon#read 6, iclass 11, count 0 2006.229.08:49:24.53#ibcon#end of sib2, iclass 11, count 0 2006.229.08:49:24.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.08:49:24.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.08:49:24.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:49:24.53#ibcon#*before write, iclass 11, count 0 2006.229.08:49:24.53#ibcon#enter sib2, iclass 11, count 0 2006.229.08:49:24.53#ibcon#flushed, iclass 11, count 0 2006.229.08:49:24.53#ibcon#about to write, iclass 11, count 0 2006.229.08:49:24.53#ibcon#wrote, iclass 11, count 0 2006.229.08:49:24.53#ibcon#about to read 3, iclass 11, count 0 2006.229.08:49:24.57#ibcon#read 3, iclass 11, count 0 2006.229.08:49:24.57#ibcon#about to read 4, iclass 11, count 0 2006.229.08:49:24.57#ibcon#read 4, iclass 11, count 0 2006.229.08:49:24.57#ibcon#about to read 5, iclass 11, count 0 2006.229.08:49:24.57#ibcon#read 5, iclass 11, count 0 2006.229.08:49:24.57#ibcon#about to read 6, iclass 11, count 0 2006.229.08:49:24.57#ibcon#read 6, iclass 11, count 0 2006.229.08:49:24.57#ibcon#end of sib2, iclass 11, count 0 2006.229.08:49:24.57#ibcon#*after write, iclass 11, count 0 2006.229.08:49:24.57#ibcon#*before return 0, iclass 11, count 0 2006.229.08:49:24.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:24.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.08:49:24.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.08:49:24.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.08:49:24.57$vck44/vb=6,4 2006.229.08:49:24.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.08:49:24.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.08:49:24.57#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:24.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:24.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:24.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:24.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.08:49:24.63#ibcon#first serial, iclass 13, count 2 2006.229.08:49:24.63#ibcon#enter sib2, iclass 13, count 2 2006.229.08:49:24.63#ibcon#flushed, iclass 13, count 2 2006.229.08:49:24.63#ibcon#about to write, iclass 13, count 2 2006.229.08:49:24.63#ibcon#wrote, iclass 13, count 2 2006.229.08:49:24.63#ibcon#about to read 3, iclass 13, count 2 2006.229.08:49:24.65#ibcon#read 3, iclass 13, count 2 2006.229.08:49:24.65#ibcon#about to read 4, iclass 13, count 2 2006.229.08:49:24.65#ibcon#read 4, iclass 13, count 2 2006.229.08:49:24.65#ibcon#about to read 5, iclass 13, count 2 2006.229.08:49:24.65#ibcon#read 5, iclass 13, count 2 2006.229.08:49:24.65#ibcon#about to read 6, iclass 13, count 2 2006.229.08:49:24.65#ibcon#read 6, iclass 13, count 2 2006.229.08:49:24.65#ibcon#end of sib2, iclass 13, count 2 2006.229.08:49:24.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.08:49:24.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.08:49:24.65#ibcon#[27=AT06-04\r\n] 2006.229.08:49:24.65#ibcon#*before write, iclass 13, count 2 2006.229.08:49:24.65#ibcon#enter sib2, iclass 13, count 2 2006.229.08:49:24.65#ibcon#flushed, iclass 13, count 2 2006.229.08:49:24.65#ibcon#about to write, iclass 13, count 2 2006.229.08:49:24.65#ibcon#wrote, iclass 13, count 2 2006.229.08:49:24.65#ibcon#about to read 3, iclass 13, count 2 2006.229.08:49:24.68#ibcon#read 3, iclass 13, count 2 2006.229.08:49:24.68#ibcon#about to read 4, iclass 13, count 2 2006.229.08:49:24.68#ibcon#read 4, iclass 13, count 2 2006.229.08:49:24.68#ibcon#about to read 5, iclass 13, count 2 2006.229.08:49:24.68#ibcon#read 5, iclass 13, count 2 2006.229.08:49:24.68#ibcon#about to read 6, iclass 13, count 2 2006.229.08:49:24.68#ibcon#read 6, iclass 13, count 2 2006.229.08:49:24.68#ibcon#end of sib2, iclass 13, count 2 2006.229.08:49:24.68#ibcon#*after write, iclass 13, count 2 2006.229.08:49:24.68#ibcon#*before return 0, iclass 13, count 2 2006.229.08:49:24.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:24.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.08:49:24.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.08:49:24.68#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:24.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:24.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:24.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:24.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:49:24.80#ibcon#first serial, iclass 13, count 0 2006.229.08:49:24.80#ibcon#enter sib2, iclass 13, count 0 2006.229.08:49:24.80#ibcon#flushed, iclass 13, count 0 2006.229.08:49:24.80#ibcon#about to write, iclass 13, count 0 2006.229.08:49:24.80#ibcon#wrote, iclass 13, count 0 2006.229.08:49:24.80#ibcon#about to read 3, iclass 13, count 0 2006.229.08:49:24.82#ibcon#read 3, iclass 13, count 0 2006.229.08:49:24.82#ibcon#about to read 4, iclass 13, count 0 2006.229.08:49:24.82#ibcon#read 4, iclass 13, count 0 2006.229.08:49:24.82#ibcon#about to read 5, iclass 13, count 0 2006.229.08:49:24.82#ibcon#read 5, iclass 13, count 0 2006.229.08:49:24.82#ibcon#about to read 6, iclass 13, count 0 2006.229.08:49:24.82#ibcon#read 6, iclass 13, count 0 2006.229.08:49:24.82#ibcon#end of sib2, iclass 13, count 0 2006.229.08:49:24.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:49:24.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:49:24.82#ibcon#[27=USB\r\n] 2006.229.08:49:24.82#ibcon#*before write, iclass 13, count 0 2006.229.08:49:24.82#ibcon#enter sib2, iclass 13, count 0 2006.229.08:49:24.82#ibcon#flushed, iclass 13, count 0 2006.229.08:49:24.82#ibcon#about to write, iclass 13, count 0 2006.229.08:49:24.82#ibcon#wrote, iclass 13, count 0 2006.229.08:49:24.82#ibcon#about to read 3, iclass 13, count 0 2006.229.08:49:24.85#ibcon#read 3, iclass 13, count 0 2006.229.08:49:24.85#ibcon#about to read 4, iclass 13, count 0 2006.229.08:49:24.85#ibcon#read 4, iclass 13, count 0 2006.229.08:49:24.85#ibcon#about to read 5, iclass 13, count 0 2006.229.08:49:24.85#ibcon#read 5, iclass 13, count 0 2006.229.08:49:24.85#ibcon#about to read 6, iclass 13, count 0 2006.229.08:49:24.85#ibcon#read 6, iclass 13, count 0 2006.229.08:49:24.85#ibcon#end of sib2, iclass 13, count 0 2006.229.08:49:24.85#ibcon#*after write, iclass 13, count 0 2006.229.08:49:24.85#ibcon#*before return 0, iclass 13, count 0 2006.229.08:49:24.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:24.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.08:49:24.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:49:24.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:49:24.85$vck44/vblo=7,734.99 2006.229.08:49:24.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.08:49:24.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.08:49:24.85#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:24.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:24.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:24.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:24.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.08:49:24.85#ibcon#first serial, iclass 15, count 0 2006.229.08:49:24.85#ibcon#enter sib2, iclass 15, count 0 2006.229.08:49:24.85#ibcon#flushed, iclass 15, count 0 2006.229.08:49:24.85#ibcon#about to write, iclass 15, count 0 2006.229.08:49:24.85#ibcon#wrote, iclass 15, count 0 2006.229.08:49:24.85#ibcon#about to read 3, iclass 15, count 0 2006.229.08:49:24.87#ibcon#read 3, iclass 15, count 0 2006.229.08:49:24.87#ibcon#about to read 4, iclass 15, count 0 2006.229.08:49:24.87#ibcon#read 4, iclass 15, count 0 2006.229.08:49:24.87#ibcon#about to read 5, iclass 15, count 0 2006.229.08:49:24.87#ibcon#read 5, iclass 15, count 0 2006.229.08:49:24.87#ibcon#about to read 6, iclass 15, count 0 2006.229.08:49:24.87#ibcon#read 6, iclass 15, count 0 2006.229.08:49:24.87#ibcon#end of sib2, iclass 15, count 0 2006.229.08:49:24.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.08:49:24.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.08:49:24.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:49:24.87#ibcon#*before write, iclass 15, count 0 2006.229.08:49:24.87#ibcon#enter sib2, iclass 15, count 0 2006.229.08:49:24.87#ibcon#flushed, iclass 15, count 0 2006.229.08:49:24.87#ibcon#about to write, iclass 15, count 0 2006.229.08:49:24.87#ibcon#wrote, iclass 15, count 0 2006.229.08:49:24.87#ibcon#about to read 3, iclass 15, count 0 2006.229.08:49:24.91#ibcon#read 3, iclass 15, count 0 2006.229.08:49:24.91#ibcon#about to read 4, iclass 15, count 0 2006.229.08:49:24.91#ibcon#read 4, iclass 15, count 0 2006.229.08:49:24.91#ibcon#about to read 5, iclass 15, count 0 2006.229.08:49:24.91#ibcon#read 5, iclass 15, count 0 2006.229.08:49:24.91#ibcon#about to read 6, iclass 15, count 0 2006.229.08:49:24.91#ibcon#read 6, iclass 15, count 0 2006.229.08:49:24.91#ibcon#end of sib2, iclass 15, count 0 2006.229.08:49:24.91#ibcon#*after write, iclass 15, count 0 2006.229.08:49:24.91#ibcon#*before return 0, iclass 15, count 0 2006.229.08:49:24.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:24.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.08:49:24.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.08:49:24.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.08:49:24.91$vck44/vb=7,4 2006.229.08:49:24.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.08:49:24.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.08:49:24.91#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:24.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:24.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:24.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:24.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.08:49:24.97#ibcon#first serial, iclass 17, count 2 2006.229.08:49:24.97#ibcon#enter sib2, iclass 17, count 2 2006.229.08:49:24.97#ibcon#flushed, iclass 17, count 2 2006.229.08:49:24.97#ibcon#about to write, iclass 17, count 2 2006.229.08:49:24.97#ibcon#wrote, iclass 17, count 2 2006.229.08:49:24.97#ibcon#about to read 3, iclass 17, count 2 2006.229.08:49:24.99#ibcon#read 3, iclass 17, count 2 2006.229.08:49:24.99#ibcon#about to read 4, iclass 17, count 2 2006.229.08:49:24.99#ibcon#read 4, iclass 17, count 2 2006.229.08:49:24.99#ibcon#about to read 5, iclass 17, count 2 2006.229.08:49:24.99#ibcon#read 5, iclass 17, count 2 2006.229.08:49:24.99#ibcon#about to read 6, iclass 17, count 2 2006.229.08:49:24.99#ibcon#read 6, iclass 17, count 2 2006.229.08:49:24.99#ibcon#end of sib2, iclass 17, count 2 2006.229.08:49:24.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.08:49:24.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.08:49:24.99#ibcon#[27=AT07-04\r\n] 2006.229.08:49:24.99#ibcon#*before write, iclass 17, count 2 2006.229.08:49:24.99#ibcon#enter sib2, iclass 17, count 2 2006.229.08:49:24.99#ibcon#flushed, iclass 17, count 2 2006.229.08:49:24.99#ibcon#about to write, iclass 17, count 2 2006.229.08:49:24.99#ibcon#wrote, iclass 17, count 2 2006.229.08:49:24.99#ibcon#about to read 3, iclass 17, count 2 2006.229.08:49:25.02#ibcon#read 3, iclass 17, count 2 2006.229.08:49:25.02#ibcon#about to read 4, iclass 17, count 2 2006.229.08:49:25.02#ibcon#read 4, iclass 17, count 2 2006.229.08:49:25.02#ibcon#about to read 5, iclass 17, count 2 2006.229.08:49:25.02#ibcon#read 5, iclass 17, count 2 2006.229.08:49:25.02#ibcon#about to read 6, iclass 17, count 2 2006.229.08:49:25.02#ibcon#read 6, iclass 17, count 2 2006.229.08:49:25.02#ibcon#end of sib2, iclass 17, count 2 2006.229.08:49:25.02#ibcon#*after write, iclass 17, count 2 2006.229.08:49:25.02#ibcon#*before return 0, iclass 17, count 2 2006.229.08:49:25.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:25.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.08:49:25.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.08:49:25.02#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:25.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:25.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:25.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:25.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.08:49:25.14#ibcon#first serial, iclass 17, count 0 2006.229.08:49:25.14#ibcon#enter sib2, iclass 17, count 0 2006.229.08:49:25.14#ibcon#flushed, iclass 17, count 0 2006.229.08:49:25.14#ibcon#about to write, iclass 17, count 0 2006.229.08:49:25.14#ibcon#wrote, iclass 17, count 0 2006.229.08:49:25.14#ibcon#about to read 3, iclass 17, count 0 2006.229.08:49:25.16#ibcon#read 3, iclass 17, count 0 2006.229.08:49:25.16#ibcon#about to read 4, iclass 17, count 0 2006.229.08:49:25.16#ibcon#read 4, iclass 17, count 0 2006.229.08:49:25.16#ibcon#about to read 5, iclass 17, count 0 2006.229.08:49:25.16#ibcon#read 5, iclass 17, count 0 2006.229.08:49:25.16#ibcon#about to read 6, iclass 17, count 0 2006.229.08:49:25.16#ibcon#read 6, iclass 17, count 0 2006.229.08:49:25.16#ibcon#end of sib2, iclass 17, count 0 2006.229.08:49:25.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.08:49:25.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.08:49:25.16#ibcon#[27=USB\r\n] 2006.229.08:49:25.16#ibcon#*before write, iclass 17, count 0 2006.229.08:49:25.16#ibcon#enter sib2, iclass 17, count 0 2006.229.08:49:25.16#ibcon#flushed, iclass 17, count 0 2006.229.08:49:25.16#ibcon#about to write, iclass 17, count 0 2006.229.08:49:25.16#ibcon#wrote, iclass 17, count 0 2006.229.08:49:25.16#ibcon#about to read 3, iclass 17, count 0 2006.229.08:49:25.19#ibcon#read 3, iclass 17, count 0 2006.229.08:49:25.19#ibcon#about to read 4, iclass 17, count 0 2006.229.08:49:25.19#ibcon#read 4, iclass 17, count 0 2006.229.08:49:25.19#ibcon#about to read 5, iclass 17, count 0 2006.229.08:49:25.19#ibcon#read 5, iclass 17, count 0 2006.229.08:49:25.19#ibcon#about to read 6, iclass 17, count 0 2006.229.08:49:25.19#ibcon#read 6, iclass 17, count 0 2006.229.08:49:25.19#ibcon#end of sib2, iclass 17, count 0 2006.229.08:49:25.19#ibcon#*after write, iclass 17, count 0 2006.229.08:49:25.19#ibcon#*before return 0, iclass 17, count 0 2006.229.08:49:25.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:25.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.08:49:25.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.08:49:25.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.08:49:25.19$vck44/vblo=8,744.99 2006.229.08:49:25.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.08:49:25.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.08:49:25.19#ibcon#ireg 17 cls_cnt 0 2006.229.08:49:25.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:25.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:25.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:25.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.08:49:25.19#ibcon#first serial, iclass 19, count 0 2006.229.08:49:25.19#ibcon#enter sib2, iclass 19, count 0 2006.229.08:49:25.19#ibcon#flushed, iclass 19, count 0 2006.229.08:49:25.19#ibcon#about to write, iclass 19, count 0 2006.229.08:49:25.19#ibcon#wrote, iclass 19, count 0 2006.229.08:49:25.19#ibcon#about to read 3, iclass 19, count 0 2006.229.08:49:25.21#ibcon#read 3, iclass 19, count 0 2006.229.08:49:25.21#ibcon#about to read 4, iclass 19, count 0 2006.229.08:49:25.21#ibcon#read 4, iclass 19, count 0 2006.229.08:49:25.21#ibcon#about to read 5, iclass 19, count 0 2006.229.08:49:25.21#ibcon#read 5, iclass 19, count 0 2006.229.08:49:25.21#ibcon#about to read 6, iclass 19, count 0 2006.229.08:49:25.21#ibcon#read 6, iclass 19, count 0 2006.229.08:49:25.21#ibcon#end of sib2, iclass 19, count 0 2006.229.08:49:25.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.08:49:25.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.08:49:25.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:49:25.21#ibcon#*before write, iclass 19, count 0 2006.229.08:49:25.21#ibcon#enter sib2, iclass 19, count 0 2006.229.08:49:25.21#ibcon#flushed, iclass 19, count 0 2006.229.08:49:25.21#ibcon#about to write, iclass 19, count 0 2006.229.08:49:25.21#ibcon#wrote, iclass 19, count 0 2006.229.08:49:25.21#ibcon#about to read 3, iclass 19, count 0 2006.229.08:49:25.25#ibcon#read 3, iclass 19, count 0 2006.229.08:49:25.25#ibcon#about to read 4, iclass 19, count 0 2006.229.08:49:25.25#ibcon#read 4, iclass 19, count 0 2006.229.08:49:25.25#ibcon#about to read 5, iclass 19, count 0 2006.229.08:49:25.25#ibcon#read 5, iclass 19, count 0 2006.229.08:49:25.25#ibcon#about to read 6, iclass 19, count 0 2006.229.08:49:25.25#ibcon#read 6, iclass 19, count 0 2006.229.08:49:25.25#ibcon#end of sib2, iclass 19, count 0 2006.229.08:49:25.25#ibcon#*after write, iclass 19, count 0 2006.229.08:49:25.25#ibcon#*before return 0, iclass 19, count 0 2006.229.08:49:25.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:25.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.08:49:25.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.08:49:25.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.08:49:25.25$vck44/vb=8,4 2006.229.08:49:25.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.08:49:25.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.08:49:25.25#ibcon#ireg 11 cls_cnt 2 2006.229.08:49:25.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:25.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:25.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:25.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.08:49:25.31#ibcon#first serial, iclass 21, count 2 2006.229.08:49:25.31#ibcon#enter sib2, iclass 21, count 2 2006.229.08:49:25.31#ibcon#flushed, iclass 21, count 2 2006.229.08:49:25.31#ibcon#about to write, iclass 21, count 2 2006.229.08:49:25.31#ibcon#wrote, iclass 21, count 2 2006.229.08:49:25.31#ibcon#about to read 3, iclass 21, count 2 2006.229.08:49:25.33#ibcon#read 3, iclass 21, count 2 2006.229.08:49:25.33#ibcon#about to read 4, iclass 21, count 2 2006.229.08:49:25.33#ibcon#read 4, iclass 21, count 2 2006.229.08:49:25.33#ibcon#about to read 5, iclass 21, count 2 2006.229.08:49:25.33#ibcon#read 5, iclass 21, count 2 2006.229.08:49:25.33#ibcon#about to read 6, iclass 21, count 2 2006.229.08:49:25.33#ibcon#read 6, iclass 21, count 2 2006.229.08:49:25.33#ibcon#end of sib2, iclass 21, count 2 2006.229.08:49:25.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.08:49:25.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.08:49:25.33#ibcon#[27=AT08-04\r\n] 2006.229.08:49:25.33#ibcon#*before write, iclass 21, count 2 2006.229.08:49:25.33#ibcon#enter sib2, iclass 21, count 2 2006.229.08:49:25.33#ibcon#flushed, iclass 21, count 2 2006.229.08:49:25.33#ibcon#about to write, iclass 21, count 2 2006.229.08:49:25.33#ibcon#wrote, iclass 21, count 2 2006.229.08:49:25.33#ibcon#about to read 3, iclass 21, count 2 2006.229.08:49:25.36#ibcon#read 3, iclass 21, count 2 2006.229.08:49:25.36#ibcon#about to read 4, iclass 21, count 2 2006.229.08:49:25.36#ibcon#read 4, iclass 21, count 2 2006.229.08:49:25.36#ibcon#about to read 5, iclass 21, count 2 2006.229.08:49:25.36#ibcon#read 5, iclass 21, count 2 2006.229.08:49:25.36#ibcon#about to read 6, iclass 21, count 2 2006.229.08:49:25.36#ibcon#read 6, iclass 21, count 2 2006.229.08:49:25.36#ibcon#end of sib2, iclass 21, count 2 2006.229.08:49:25.36#ibcon#*after write, iclass 21, count 2 2006.229.08:49:25.36#ibcon#*before return 0, iclass 21, count 2 2006.229.08:49:25.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:25.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.08:49:25.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.08:49:25.36#ibcon#ireg 7 cls_cnt 0 2006.229.08:49:25.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:25.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:25.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:25.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.08:49:25.48#ibcon#first serial, iclass 21, count 0 2006.229.08:49:25.48#ibcon#enter sib2, iclass 21, count 0 2006.229.08:49:25.48#ibcon#flushed, iclass 21, count 0 2006.229.08:49:25.48#ibcon#about to write, iclass 21, count 0 2006.229.08:49:25.48#ibcon#wrote, iclass 21, count 0 2006.229.08:49:25.48#ibcon#about to read 3, iclass 21, count 0 2006.229.08:49:25.50#ibcon#read 3, iclass 21, count 0 2006.229.08:49:25.50#ibcon#about to read 4, iclass 21, count 0 2006.229.08:49:25.50#ibcon#read 4, iclass 21, count 0 2006.229.08:49:25.50#ibcon#about to read 5, iclass 21, count 0 2006.229.08:49:25.50#ibcon#read 5, iclass 21, count 0 2006.229.08:49:25.50#ibcon#about to read 6, iclass 21, count 0 2006.229.08:49:25.50#ibcon#read 6, iclass 21, count 0 2006.229.08:49:25.50#ibcon#end of sib2, iclass 21, count 0 2006.229.08:49:25.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.08:49:25.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.08:49:25.50#ibcon#[27=USB\r\n] 2006.229.08:49:25.50#ibcon#*before write, iclass 21, count 0 2006.229.08:49:25.50#ibcon#enter sib2, iclass 21, count 0 2006.229.08:49:25.50#ibcon#flushed, iclass 21, count 0 2006.229.08:49:25.50#ibcon#about to write, iclass 21, count 0 2006.229.08:49:25.50#ibcon#wrote, iclass 21, count 0 2006.229.08:49:25.50#ibcon#about to read 3, iclass 21, count 0 2006.229.08:49:25.53#ibcon#read 3, iclass 21, count 0 2006.229.08:49:25.53#ibcon#about to read 4, iclass 21, count 0 2006.229.08:49:25.53#ibcon#read 4, iclass 21, count 0 2006.229.08:49:25.53#ibcon#about to read 5, iclass 21, count 0 2006.229.08:49:25.53#ibcon#read 5, iclass 21, count 0 2006.229.08:49:25.53#ibcon#about to read 6, iclass 21, count 0 2006.229.08:49:25.53#ibcon#read 6, iclass 21, count 0 2006.229.08:49:25.53#ibcon#end of sib2, iclass 21, count 0 2006.229.08:49:25.53#ibcon#*after write, iclass 21, count 0 2006.229.08:49:25.53#ibcon#*before return 0, iclass 21, count 0 2006.229.08:49:25.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:25.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.08:49:25.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.08:49:25.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.08:49:25.53$vck44/vabw=wide 2006.229.08:49:25.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.08:49:25.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.08:49:25.53#ibcon#ireg 8 cls_cnt 0 2006.229.08:49:25.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:25.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:25.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:25.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.08:49:25.53#ibcon#first serial, iclass 23, count 0 2006.229.08:49:25.53#ibcon#enter sib2, iclass 23, count 0 2006.229.08:49:25.53#ibcon#flushed, iclass 23, count 0 2006.229.08:49:25.53#ibcon#about to write, iclass 23, count 0 2006.229.08:49:25.53#ibcon#wrote, iclass 23, count 0 2006.229.08:49:25.53#ibcon#about to read 3, iclass 23, count 0 2006.229.08:49:25.55#ibcon#read 3, iclass 23, count 0 2006.229.08:49:25.55#ibcon#about to read 4, iclass 23, count 0 2006.229.08:49:25.55#ibcon#read 4, iclass 23, count 0 2006.229.08:49:25.55#ibcon#about to read 5, iclass 23, count 0 2006.229.08:49:25.55#ibcon#read 5, iclass 23, count 0 2006.229.08:49:25.55#ibcon#about to read 6, iclass 23, count 0 2006.229.08:49:25.55#ibcon#read 6, iclass 23, count 0 2006.229.08:49:25.55#ibcon#end of sib2, iclass 23, count 0 2006.229.08:49:25.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.08:49:25.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.08:49:25.55#ibcon#[25=BW32\r\n] 2006.229.08:49:25.55#ibcon#*before write, iclass 23, count 0 2006.229.08:49:25.55#ibcon#enter sib2, iclass 23, count 0 2006.229.08:49:25.55#ibcon#flushed, iclass 23, count 0 2006.229.08:49:25.55#ibcon#about to write, iclass 23, count 0 2006.229.08:49:25.55#ibcon#wrote, iclass 23, count 0 2006.229.08:49:25.55#ibcon#about to read 3, iclass 23, count 0 2006.229.08:49:25.58#ibcon#read 3, iclass 23, count 0 2006.229.08:49:25.58#ibcon#about to read 4, iclass 23, count 0 2006.229.08:49:25.58#ibcon#read 4, iclass 23, count 0 2006.229.08:49:25.58#ibcon#about to read 5, iclass 23, count 0 2006.229.08:49:25.58#ibcon#read 5, iclass 23, count 0 2006.229.08:49:25.58#ibcon#about to read 6, iclass 23, count 0 2006.229.08:49:25.58#ibcon#read 6, iclass 23, count 0 2006.229.08:49:25.58#ibcon#end of sib2, iclass 23, count 0 2006.229.08:49:25.58#ibcon#*after write, iclass 23, count 0 2006.229.08:49:25.58#ibcon#*before return 0, iclass 23, count 0 2006.229.08:49:25.58#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:25.58#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.08:49:25.58#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.08:49:25.58#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.08:49:25.58$vck44/vbbw=wide 2006.229.08:49:25.58#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.08:49:25.58#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.08:49:25.58#ibcon#ireg 8 cls_cnt 0 2006.229.08:49:25.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:49:25.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:49:25.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:49:25.65#ibcon#enter wrdev, iclass 25, count 0 2006.229.08:49:25.65#ibcon#first serial, iclass 25, count 0 2006.229.08:49:25.65#ibcon#enter sib2, iclass 25, count 0 2006.229.08:49:25.65#ibcon#flushed, iclass 25, count 0 2006.229.08:49:25.65#ibcon#about to write, iclass 25, count 0 2006.229.08:49:25.65#ibcon#wrote, iclass 25, count 0 2006.229.08:49:25.65#ibcon#about to read 3, iclass 25, count 0 2006.229.08:49:25.67#ibcon#read 3, iclass 25, count 0 2006.229.08:49:25.67#ibcon#about to read 4, iclass 25, count 0 2006.229.08:49:25.67#ibcon#read 4, iclass 25, count 0 2006.229.08:49:25.67#ibcon#about to read 5, iclass 25, count 0 2006.229.08:49:25.67#ibcon#read 5, iclass 25, count 0 2006.229.08:49:25.67#ibcon#about to read 6, iclass 25, count 0 2006.229.08:49:25.67#ibcon#read 6, iclass 25, count 0 2006.229.08:49:25.67#ibcon#end of sib2, iclass 25, count 0 2006.229.08:49:25.67#ibcon#*mode == 0, iclass 25, count 0 2006.229.08:49:25.67#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.08:49:25.67#ibcon#[27=BW32\r\n] 2006.229.08:49:25.67#ibcon#*before write, iclass 25, count 0 2006.229.08:49:25.67#ibcon#enter sib2, iclass 25, count 0 2006.229.08:49:25.67#ibcon#flushed, iclass 25, count 0 2006.229.08:49:25.67#ibcon#about to write, iclass 25, count 0 2006.229.08:49:25.67#ibcon#wrote, iclass 25, count 0 2006.229.08:49:25.67#ibcon#about to read 3, iclass 25, count 0 2006.229.08:49:25.70#ibcon#read 3, iclass 25, count 0 2006.229.08:49:25.70#ibcon#about to read 4, iclass 25, count 0 2006.229.08:49:25.70#ibcon#read 4, iclass 25, count 0 2006.229.08:49:25.70#ibcon#about to read 5, iclass 25, count 0 2006.229.08:49:25.70#ibcon#read 5, iclass 25, count 0 2006.229.08:49:25.70#ibcon#about to read 6, iclass 25, count 0 2006.229.08:49:25.70#ibcon#read 6, iclass 25, count 0 2006.229.08:49:25.70#ibcon#end of sib2, iclass 25, count 0 2006.229.08:49:25.70#ibcon#*after write, iclass 25, count 0 2006.229.08:49:25.70#ibcon#*before return 0, iclass 25, count 0 2006.229.08:49:25.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:49:25.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.08:49:25.70#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.08:49:25.70#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.08:49:25.70$setupk4/ifdk4 2006.229.08:49:25.70$ifdk4/lo= 2006.229.08:49:25.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:49:25.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:49:25.70$ifdk4/patch= 2006.229.08:49:25.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:49:25.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:49:25.70$setupk4/!*+20s 2006.229.08:49:29.76#abcon#<5=/05 2.4 4.0 29.30 951000.5\r\n> 2006.229.08:49:29.78#abcon#{5=INTERFACE CLEAR} 2006.229.08:49:29.84#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:49:35.13#trakl#Source acquired 2006.229.08:49:37.14#flagr#flagr/antenna,acquired 2006.229.08:49:39.93#abcon#<5=/05 2.4 4.0 29.29 951000.5\r\n> 2006.229.08:49:39.95#abcon#{5=INTERFACE CLEAR} 2006.229.08:49:40.01#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:49:40.22$setupk4/"tpicd 2006.229.08:49:40.22$setupk4/echo=off 2006.229.08:49:40.22$setupk4/xlog=off 2006.229.08:49:40.22:!2006.229.08:54:17 2006.229.08:54:17.00:preob 2006.229.08:54:17.14/onsource/TRACKING 2006.229.08:54:17.14:!2006.229.08:54:27 2006.229.08:54:27.00:"tape 2006.229.08:54:27.00:"st=record 2006.229.08:54:27.00:data_valid=on 2006.229.08:54:27.00:midob 2006.229.08:54:28.14/onsource/TRACKING 2006.229.08:54:28.14/wx/29.26,1000.5,95 2006.229.08:54:28.27/cable/+6.3998E-03 2006.229.08:54:29.36/va/01,08,usb,yes,30,32 2006.229.08:54:29.36/va/02,07,usb,yes,33,33 2006.229.08:54:29.36/va/03,06,usb,yes,40,43 2006.229.08:54:29.36/va/04,07,usb,yes,33,35 2006.229.08:54:29.36/va/05,04,usb,yes,30,30 2006.229.08:54:29.36/va/06,04,usb,yes,34,33 2006.229.08:54:29.36/va/07,05,usb,yes,30,30 2006.229.08:54:29.36/va/08,06,usb,yes,21,27 2006.229.08:54:29.59/valo/01,524.99,yes,locked 2006.229.08:54:29.59/valo/02,534.99,yes,locked 2006.229.08:54:29.59/valo/03,564.99,yes,locked 2006.229.08:54:29.59/valo/04,624.99,yes,locked 2006.229.08:54:29.59/valo/05,734.99,yes,locked 2006.229.08:54:29.59/valo/06,814.99,yes,locked 2006.229.08:54:29.59/valo/07,864.99,yes,locked 2006.229.08:54:29.59/valo/08,884.99,yes,locked 2006.229.08:54:30.68/vb/01,04,usb,yes,31,29 2006.229.08:54:30.68/vb/02,04,usb,yes,34,33 2006.229.08:54:30.68/vb/03,04,usb,yes,31,34 2006.229.08:54:30.68/vb/04,04,usb,yes,35,34 2006.229.08:54:30.68/vb/05,04,usb,yes,27,30 2006.229.08:54:30.68/vb/06,04,usb,yes,32,28 2006.229.08:54:30.68/vb/07,04,usb,yes,32,31 2006.229.08:54:30.68/vb/08,04,usb,yes,29,32 2006.229.08:54:30.92/vblo/01,629.99,yes,locked 2006.229.08:54:30.92/vblo/02,634.99,yes,locked 2006.229.08:54:30.92/vblo/03,649.99,yes,locked 2006.229.08:54:30.92/vblo/04,679.99,yes,locked 2006.229.08:54:30.92/vblo/05,709.99,yes,locked 2006.229.08:54:30.92/vblo/06,719.99,yes,locked 2006.229.08:54:30.92/vblo/07,734.99,yes,locked 2006.229.08:54:30.92/vblo/08,744.99,yes,locked 2006.229.08:54:31.07/vabw/8 2006.229.08:54:31.22/vbbw/8 2006.229.08:54:31.31/xfe/off,on,13.7 2006.229.08:54:31.68/ifatt/23,28,28,28 2006.229.08:54:32.07/fmout-gps/S +4.63E-07 2006.229.08:54:32.11:!2006.229.08:57:37 2006.229.08:57:37.01:data_valid=off 2006.229.08:57:37.01:"et 2006.229.08:57:37.02:!+3s 2006.229.08:57:40.03:"tape 2006.229.08:57:40.03:postob 2006.229.08:57:40.09/cable/+6.4005E-03 2006.229.08:57:40.09/wx/29.23,1000.5,95 2006.229.08:57:40.15/fmout-gps/S +4.62E-07 2006.229.08:57:40.15:scan_name=229-0900,jd0608,40 2006.229.08:57:40.15:source=1424-418,142756.30,-420619.4,2000.0,ccw 2006.229.08:57:42.13#flagr#flagr/antenna,new-source 2006.229.08:57:42.13:checkk5 2006.229.08:57:42.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.08:57:42.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.08:57:43.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.08:57:43.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.08:57:44.12/chk_obsdata//k5ts1/T2290854??a.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.08:57:44.51/chk_obsdata//k5ts2/T2290854??b.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.08:57:44.91/chk_obsdata//k5ts3/T2290854??c.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.08:57:45.33/chk_obsdata//k5ts4/T2290854??d.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.08:57:46.06/k5log//k5ts1_log_newline 2006.229.08:57:46.79/k5log//k5ts2_log_newline 2006.229.08:57:47.50/k5log//k5ts3_log_newline 2006.229.08:57:48.21/k5log//k5ts4_log_newline 2006.229.08:57:48.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.08:57:48.24:setupk4=1 2006.229.08:57:48.24$setupk4/echo=on 2006.229.08:57:48.24$setupk4/pcalon 2006.229.08:57:48.24$pcalon/"no phase cal control is implemented here 2006.229.08:57:48.24$setupk4/"tpicd=stop 2006.229.08:57:48.24$setupk4/"rec=synch_on 2006.229.08:57:48.24$setupk4/"rec_mode=128 2006.229.08:57:48.24$setupk4/!* 2006.229.08:57:48.24$setupk4/recpk4 2006.229.08:57:48.24$recpk4/recpatch= 2006.229.08:57:48.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.08:57:48.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.08:57:48.24$setupk4/vck44 2006.229.08:57:48.24$vck44/valo=1,524.99 2006.229.08:57:48.24#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.08:57:48.24#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.08:57:48.24#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:48.24#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:57:48.24#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:57:48.24#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:57:48.24#ibcon#enter wrdev, iclass 13, count 0 2006.229.08:57:48.24#ibcon#first serial, iclass 13, count 0 2006.229.08:57:48.24#ibcon#enter sib2, iclass 13, count 0 2006.229.08:57:48.24#ibcon#flushed, iclass 13, count 0 2006.229.08:57:48.24#ibcon#about to write, iclass 13, count 0 2006.229.08:57:48.24#ibcon#wrote, iclass 13, count 0 2006.229.08:57:48.24#ibcon#about to read 3, iclass 13, count 0 2006.229.08:57:48.26#ibcon#read 3, iclass 13, count 0 2006.229.08:57:48.26#ibcon#about to read 4, iclass 13, count 0 2006.229.08:57:48.26#ibcon#read 4, iclass 13, count 0 2006.229.08:57:48.26#ibcon#about to read 5, iclass 13, count 0 2006.229.08:57:48.26#ibcon#read 5, iclass 13, count 0 2006.229.08:57:48.26#ibcon#about to read 6, iclass 13, count 0 2006.229.08:57:48.26#ibcon#read 6, iclass 13, count 0 2006.229.08:57:48.26#ibcon#end of sib2, iclass 13, count 0 2006.229.08:57:48.26#ibcon#*mode == 0, iclass 13, count 0 2006.229.08:57:48.26#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.08:57:48.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.08:57:48.26#ibcon#*before write, iclass 13, count 0 2006.229.08:57:48.26#ibcon#enter sib2, iclass 13, count 0 2006.229.08:57:48.26#ibcon#flushed, iclass 13, count 0 2006.229.08:57:48.26#ibcon#about to write, iclass 13, count 0 2006.229.08:57:48.26#ibcon#wrote, iclass 13, count 0 2006.229.08:57:48.26#ibcon#about to read 3, iclass 13, count 0 2006.229.08:57:48.31#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:57:48.31#ibcon#read 3, iclass 13, count 0 2006.229.08:57:48.31#ibcon#about to read 4, iclass 13, count 0 2006.229.08:57:48.31#ibcon#read 4, iclass 13, count 0 2006.229.08:57:48.31#ibcon#about to read 5, iclass 13, count 0 2006.229.08:57:48.31#ibcon#read 5, iclass 13, count 0 2006.229.08:57:48.31#ibcon#about to read 6, iclass 13, count 0 2006.229.08:57:48.31#ibcon#read 6, iclass 13, count 0 2006.229.08:57:48.31#ibcon#end of sib2, iclass 13, count 0 2006.229.08:57:48.31#ibcon#*after write, iclass 13, count 0 2006.229.08:57:48.31#ibcon#*before return 0, iclass 13, count 0 2006.229.08:57:48.31#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:57:48.31#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.08:57:48.31#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.08:57:48.31#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.08:57:48.31$vck44/va=1,8 2006.229.08:57:48.31#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.08:57:48.31#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.08:57:48.31#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:48.31#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:48.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:48.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:48.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.08:57:48.31#ibcon#first serial, iclass 16, count 2 2006.229.08:57:48.31#ibcon#enter sib2, iclass 16, count 2 2006.229.08:57:48.31#ibcon#flushed, iclass 16, count 2 2006.229.08:57:48.31#ibcon#about to write, iclass 16, count 2 2006.229.08:57:48.31#ibcon#wrote, iclass 16, count 2 2006.229.08:57:48.31#ibcon#about to read 3, iclass 16, count 2 2006.229.08:57:48.33#ibcon#read 3, iclass 16, count 2 2006.229.08:57:48.33#ibcon#about to read 4, iclass 16, count 2 2006.229.08:57:48.33#ibcon#read 4, iclass 16, count 2 2006.229.08:57:48.33#ibcon#about to read 5, iclass 16, count 2 2006.229.08:57:48.33#ibcon#read 5, iclass 16, count 2 2006.229.08:57:48.33#ibcon#about to read 6, iclass 16, count 2 2006.229.08:57:48.33#ibcon#read 6, iclass 16, count 2 2006.229.08:57:48.33#ibcon#end of sib2, iclass 16, count 2 2006.229.08:57:48.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.08:57:48.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.08:57:48.33#ibcon#[25=AT01-08\r\n] 2006.229.08:57:48.33#ibcon#*before write, iclass 16, count 2 2006.229.08:57:48.33#ibcon#enter sib2, iclass 16, count 2 2006.229.08:57:48.33#ibcon#flushed, iclass 16, count 2 2006.229.08:57:48.33#ibcon#about to write, iclass 16, count 2 2006.229.08:57:48.33#ibcon#wrote, iclass 16, count 2 2006.229.08:57:48.33#ibcon#about to read 3, iclass 16, count 2 2006.229.08:57:48.36#ibcon#read 3, iclass 16, count 2 2006.229.08:57:48.36#ibcon#about to read 4, iclass 16, count 2 2006.229.08:57:48.36#ibcon#read 4, iclass 16, count 2 2006.229.08:57:48.36#ibcon#about to read 5, iclass 16, count 2 2006.229.08:57:48.36#ibcon#read 5, iclass 16, count 2 2006.229.08:57:48.36#ibcon#about to read 6, iclass 16, count 2 2006.229.08:57:48.36#ibcon#read 6, iclass 16, count 2 2006.229.08:57:48.36#ibcon#end of sib2, iclass 16, count 2 2006.229.08:57:48.36#ibcon#*after write, iclass 16, count 2 2006.229.08:57:48.36#ibcon#*before return 0, iclass 16, count 2 2006.229.08:57:48.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:48.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:48.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.08:57:48.36#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:48.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:48.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:48.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:48.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:57:48.48#ibcon#first serial, iclass 16, count 0 2006.229.08:57:48.48#ibcon#enter sib2, iclass 16, count 0 2006.229.08:57:48.48#ibcon#flushed, iclass 16, count 0 2006.229.08:57:48.48#ibcon#about to write, iclass 16, count 0 2006.229.08:57:48.48#ibcon#wrote, iclass 16, count 0 2006.229.08:57:48.48#ibcon#about to read 3, iclass 16, count 0 2006.229.08:57:48.50#ibcon#read 3, iclass 16, count 0 2006.229.08:57:48.50#ibcon#about to read 4, iclass 16, count 0 2006.229.08:57:48.50#ibcon#read 4, iclass 16, count 0 2006.229.08:57:48.50#ibcon#about to read 5, iclass 16, count 0 2006.229.08:57:48.50#ibcon#read 5, iclass 16, count 0 2006.229.08:57:48.50#ibcon#about to read 6, iclass 16, count 0 2006.229.08:57:48.50#ibcon#read 6, iclass 16, count 0 2006.229.08:57:48.50#ibcon#end of sib2, iclass 16, count 0 2006.229.08:57:48.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:57:48.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:57:48.50#ibcon#[25=USB\r\n] 2006.229.08:57:48.50#ibcon#*before write, iclass 16, count 0 2006.229.08:57:48.50#ibcon#enter sib2, iclass 16, count 0 2006.229.08:57:48.50#ibcon#flushed, iclass 16, count 0 2006.229.08:57:48.50#ibcon#about to write, iclass 16, count 0 2006.229.08:57:48.50#ibcon#wrote, iclass 16, count 0 2006.229.08:57:48.50#ibcon#about to read 3, iclass 16, count 0 2006.229.08:57:48.53#ibcon#read 3, iclass 16, count 0 2006.229.08:57:48.53#ibcon#about to read 4, iclass 16, count 0 2006.229.08:57:48.53#ibcon#read 4, iclass 16, count 0 2006.229.08:57:48.53#ibcon#about to read 5, iclass 16, count 0 2006.229.08:57:48.53#ibcon#read 5, iclass 16, count 0 2006.229.08:57:48.53#ibcon#about to read 6, iclass 16, count 0 2006.229.08:57:48.53#ibcon#read 6, iclass 16, count 0 2006.229.08:57:48.53#ibcon#end of sib2, iclass 16, count 0 2006.229.08:57:48.53#ibcon#*after write, iclass 16, count 0 2006.229.08:57:48.53#ibcon#*before return 0, iclass 16, count 0 2006.229.08:57:48.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:48.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:48.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:57:48.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:57:48.53$vck44/valo=2,534.99 2006.229.08:57:48.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.08:57:48.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.08:57:48.53#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:48.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:48.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:48.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:48.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:57:48.53#ibcon#first serial, iclass 18, count 0 2006.229.08:57:48.53#ibcon#enter sib2, iclass 18, count 0 2006.229.08:57:48.53#ibcon#flushed, iclass 18, count 0 2006.229.08:57:48.53#ibcon#about to write, iclass 18, count 0 2006.229.08:57:48.53#ibcon#wrote, iclass 18, count 0 2006.229.08:57:48.53#ibcon#about to read 3, iclass 18, count 0 2006.229.08:57:48.55#ibcon#read 3, iclass 18, count 0 2006.229.08:57:48.55#ibcon#about to read 4, iclass 18, count 0 2006.229.08:57:48.55#ibcon#read 4, iclass 18, count 0 2006.229.08:57:48.55#ibcon#about to read 5, iclass 18, count 0 2006.229.08:57:48.55#ibcon#read 5, iclass 18, count 0 2006.229.08:57:48.55#ibcon#about to read 6, iclass 18, count 0 2006.229.08:57:48.55#ibcon#read 6, iclass 18, count 0 2006.229.08:57:48.55#ibcon#end of sib2, iclass 18, count 0 2006.229.08:57:48.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:57:48.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:57:48.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.08:57:48.55#ibcon#*before write, iclass 18, count 0 2006.229.08:57:48.55#ibcon#enter sib2, iclass 18, count 0 2006.229.08:57:48.55#ibcon#flushed, iclass 18, count 0 2006.229.08:57:48.55#ibcon#about to write, iclass 18, count 0 2006.229.08:57:48.55#ibcon#wrote, iclass 18, count 0 2006.229.08:57:48.55#ibcon#about to read 3, iclass 18, count 0 2006.229.08:57:48.59#ibcon#read 3, iclass 18, count 0 2006.229.08:57:48.59#ibcon#about to read 4, iclass 18, count 0 2006.229.08:57:48.59#ibcon#read 4, iclass 18, count 0 2006.229.08:57:48.59#ibcon#about to read 5, iclass 18, count 0 2006.229.08:57:48.59#ibcon#read 5, iclass 18, count 0 2006.229.08:57:48.59#ibcon#about to read 6, iclass 18, count 0 2006.229.08:57:48.59#ibcon#read 6, iclass 18, count 0 2006.229.08:57:48.59#ibcon#end of sib2, iclass 18, count 0 2006.229.08:57:48.59#ibcon#*after write, iclass 18, count 0 2006.229.08:57:48.59#ibcon#*before return 0, iclass 18, count 0 2006.229.08:57:48.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:48.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:48.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:57:48.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:57:48.59$vck44/va=2,7 2006.229.08:57:48.59#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.08:57:48.59#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.08:57:48.59#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:48.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:48.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:48.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:48.65#ibcon#enter wrdev, iclass 20, count 2 2006.229.08:57:48.65#ibcon#first serial, iclass 20, count 2 2006.229.08:57:48.65#ibcon#enter sib2, iclass 20, count 2 2006.229.08:57:48.65#ibcon#flushed, iclass 20, count 2 2006.229.08:57:48.65#ibcon#about to write, iclass 20, count 2 2006.229.08:57:48.65#ibcon#wrote, iclass 20, count 2 2006.229.08:57:48.65#ibcon#about to read 3, iclass 20, count 2 2006.229.08:57:48.67#ibcon#read 3, iclass 20, count 2 2006.229.08:57:48.67#ibcon#about to read 4, iclass 20, count 2 2006.229.08:57:48.67#ibcon#read 4, iclass 20, count 2 2006.229.08:57:48.67#ibcon#about to read 5, iclass 20, count 2 2006.229.08:57:48.67#ibcon#read 5, iclass 20, count 2 2006.229.08:57:48.67#ibcon#about to read 6, iclass 20, count 2 2006.229.08:57:48.67#ibcon#read 6, iclass 20, count 2 2006.229.08:57:48.67#ibcon#end of sib2, iclass 20, count 2 2006.229.08:57:48.67#ibcon#*mode == 0, iclass 20, count 2 2006.229.08:57:48.67#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.08:57:48.67#ibcon#[25=AT02-07\r\n] 2006.229.08:57:48.67#ibcon#*before write, iclass 20, count 2 2006.229.08:57:48.67#ibcon#enter sib2, iclass 20, count 2 2006.229.08:57:48.67#ibcon#flushed, iclass 20, count 2 2006.229.08:57:48.67#ibcon#about to write, iclass 20, count 2 2006.229.08:57:48.67#ibcon#wrote, iclass 20, count 2 2006.229.08:57:48.67#ibcon#about to read 3, iclass 20, count 2 2006.229.08:57:48.70#ibcon#read 3, iclass 20, count 2 2006.229.08:57:48.70#ibcon#about to read 4, iclass 20, count 2 2006.229.08:57:48.70#ibcon#read 4, iclass 20, count 2 2006.229.08:57:48.70#ibcon#about to read 5, iclass 20, count 2 2006.229.08:57:48.70#ibcon#read 5, iclass 20, count 2 2006.229.08:57:48.70#ibcon#about to read 6, iclass 20, count 2 2006.229.08:57:48.70#ibcon#read 6, iclass 20, count 2 2006.229.08:57:48.70#ibcon#end of sib2, iclass 20, count 2 2006.229.08:57:48.70#ibcon#*after write, iclass 20, count 2 2006.229.08:57:48.70#ibcon#*before return 0, iclass 20, count 2 2006.229.08:57:48.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:48.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:48.70#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.08:57:48.70#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:48.70#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:48.82#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:48.82#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:48.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:57:48.82#ibcon#first serial, iclass 20, count 0 2006.229.08:57:48.82#ibcon#enter sib2, iclass 20, count 0 2006.229.08:57:48.82#ibcon#flushed, iclass 20, count 0 2006.229.08:57:48.82#ibcon#about to write, iclass 20, count 0 2006.229.08:57:48.82#ibcon#wrote, iclass 20, count 0 2006.229.08:57:48.82#ibcon#about to read 3, iclass 20, count 0 2006.229.08:57:48.84#ibcon#read 3, iclass 20, count 0 2006.229.08:57:48.84#ibcon#about to read 4, iclass 20, count 0 2006.229.08:57:48.84#ibcon#read 4, iclass 20, count 0 2006.229.08:57:48.84#ibcon#about to read 5, iclass 20, count 0 2006.229.08:57:48.84#ibcon#read 5, iclass 20, count 0 2006.229.08:57:48.84#ibcon#about to read 6, iclass 20, count 0 2006.229.08:57:48.84#ibcon#read 6, iclass 20, count 0 2006.229.08:57:48.84#ibcon#end of sib2, iclass 20, count 0 2006.229.08:57:48.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:57:48.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:57:48.84#ibcon#[25=USB\r\n] 2006.229.08:57:48.84#ibcon#*before write, iclass 20, count 0 2006.229.08:57:48.84#ibcon#enter sib2, iclass 20, count 0 2006.229.08:57:48.84#ibcon#flushed, iclass 20, count 0 2006.229.08:57:48.84#ibcon#about to write, iclass 20, count 0 2006.229.08:57:48.84#ibcon#wrote, iclass 20, count 0 2006.229.08:57:48.84#ibcon#about to read 3, iclass 20, count 0 2006.229.08:57:48.87#ibcon#read 3, iclass 20, count 0 2006.229.08:57:48.87#ibcon#about to read 4, iclass 20, count 0 2006.229.08:57:48.87#ibcon#read 4, iclass 20, count 0 2006.229.08:57:48.87#ibcon#about to read 5, iclass 20, count 0 2006.229.08:57:48.87#ibcon#read 5, iclass 20, count 0 2006.229.08:57:48.87#ibcon#about to read 6, iclass 20, count 0 2006.229.08:57:48.87#ibcon#read 6, iclass 20, count 0 2006.229.08:57:48.87#ibcon#end of sib2, iclass 20, count 0 2006.229.08:57:48.87#ibcon#*after write, iclass 20, count 0 2006.229.08:57:48.87#ibcon#*before return 0, iclass 20, count 0 2006.229.08:57:48.87#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:48.87#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:48.87#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:57:48.87#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:57:48.87$vck44/valo=3,564.99 2006.229.08:57:48.87#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.08:57:48.87#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.08:57:48.87#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:48.87#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:48.87#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:48.87#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:48.87#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:57:48.87#ibcon#first serial, iclass 22, count 0 2006.229.08:57:48.87#ibcon#enter sib2, iclass 22, count 0 2006.229.08:57:48.87#ibcon#flushed, iclass 22, count 0 2006.229.08:57:48.87#ibcon#about to write, iclass 22, count 0 2006.229.08:57:48.87#ibcon#wrote, iclass 22, count 0 2006.229.08:57:48.87#ibcon#about to read 3, iclass 22, count 0 2006.229.08:57:48.89#ibcon#read 3, iclass 22, count 0 2006.229.08:57:48.89#ibcon#about to read 4, iclass 22, count 0 2006.229.08:57:48.89#ibcon#read 4, iclass 22, count 0 2006.229.08:57:48.89#ibcon#about to read 5, iclass 22, count 0 2006.229.08:57:48.89#ibcon#read 5, iclass 22, count 0 2006.229.08:57:48.89#ibcon#about to read 6, iclass 22, count 0 2006.229.08:57:48.89#ibcon#read 6, iclass 22, count 0 2006.229.08:57:48.89#ibcon#end of sib2, iclass 22, count 0 2006.229.08:57:48.89#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:57:48.89#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:57:48.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.08:57:48.89#ibcon#*before write, iclass 22, count 0 2006.229.08:57:48.89#ibcon#enter sib2, iclass 22, count 0 2006.229.08:57:48.89#ibcon#flushed, iclass 22, count 0 2006.229.08:57:48.89#ibcon#about to write, iclass 22, count 0 2006.229.08:57:48.89#ibcon#wrote, iclass 22, count 0 2006.229.08:57:48.89#ibcon#about to read 3, iclass 22, count 0 2006.229.08:57:48.93#ibcon#read 3, iclass 22, count 0 2006.229.08:57:48.93#ibcon#about to read 4, iclass 22, count 0 2006.229.08:57:48.93#ibcon#read 4, iclass 22, count 0 2006.229.08:57:48.93#ibcon#about to read 5, iclass 22, count 0 2006.229.08:57:48.93#ibcon#read 5, iclass 22, count 0 2006.229.08:57:48.93#ibcon#about to read 6, iclass 22, count 0 2006.229.08:57:48.93#ibcon#read 6, iclass 22, count 0 2006.229.08:57:48.93#ibcon#end of sib2, iclass 22, count 0 2006.229.08:57:48.93#ibcon#*after write, iclass 22, count 0 2006.229.08:57:48.93#ibcon#*before return 0, iclass 22, count 0 2006.229.08:57:48.93#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:48.93#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:48.93#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:57:48.93#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:57:48.93$vck44/va=3,6 2006.229.08:57:48.93#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.08:57:48.93#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.08:57:48.93#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:48.93#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:48.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:48.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:48.99#ibcon#enter wrdev, iclass 24, count 2 2006.229.08:57:48.99#ibcon#first serial, iclass 24, count 2 2006.229.08:57:48.99#ibcon#enter sib2, iclass 24, count 2 2006.229.08:57:48.99#ibcon#flushed, iclass 24, count 2 2006.229.08:57:48.99#ibcon#about to write, iclass 24, count 2 2006.229.08:57:48.99#ibcon#wrote, iclass 24, count 2 2006.229.08:57:48.99#ibcon#about to read 3, iclass 24, count 2 2006.229.08:57:49.01#ibcon#read 3, iclass 24, count 2 2006.229.08:57:49.01#ibcon#about to read 4, iclass 24, count 2 2006.229.08:57:49.01#ibcon#read 4, iclass 24, count 2 2006.229.08:57:49.01#ibcon#about to read 5, iclass 24, count 2 2006.229.08:57:49.01#ibcon#read 5, iclass 24, count 2 2006.229.08:57:49.01#ibcon#about to read 6, iclass 24, count 2 2006.229.08:57:49.01#ibcon#read 6, iclass 24, count 2 2006.229.08:57:49.01#ibcon#end of sib2, iclass 24, count 2 2006.229.08:57:49.01#ibcon#*mode == 0, iclass 24, count 2 2006.229.08:57:49.01#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.08:57:49.01#ibcon#[25=AT03-06\r\n] 2006.229.08:57:49.01#ibcon#*before write, iclass 24, count 2 2006.229.08:57:49.01#ibcon#enter sib2, iclass 24, count 2 2006.229.08:57:49.01#ibcon#flushed, iclass 24, count 2 2006.229.08:57:49.01#ibcon#about to write, iclass 24, count 2 2006.229.08:57:49.01#ibcon#wrote, iclass 24, count 2 2006.229.08:57:49.01#ibcon#about to read 3, iclass 24, count 2 2006.229.08:57:49.04#ibcon#read 3, iclass 24, count 2 2006.229.08:57:49.04#ibcon#about to read 4, iclass 24, count 2 2006.229.08:57:49.04#ibcon#read 4, iclass 24, count 2 2006.229.08:57:49.04#ibcon#about to read 5, iclass 24, count 2 2006.229.08:57:49.04#ibcon#read 5, iclass 24, count 2 2006.229.08:57:49.04#ibcon#about to read 6, iclass 24, count 2 2006.229.08:57:49.04#ibcon#read 6, iclass 24, count 2 2006.229.08:57:49.04#ibcon#end of sib2, iclass 24, count 2 2006.229.08:57:49.04#ibcon#*after write, iclass 24, count 2 2006.229.08:57:49.04#ibcon#*before return 0, iclass 24, count 2 2006.229.08:57:49.04#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:49.04#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:49.04#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.08:57:49.04#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:49.04#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:49.16#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:49.16#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:49.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:57:49.16#ibcon#first serial, iclass 24, count 0 2006.229.08:57:49.16#ibcon#enter sib2, iclass 24, count 0 2006.229.08:57:49.16#ibcon#flushed, iclass 24, count 0 2006.229.08:57:49.16#ibcon#about to write, iclass 24, count 0 2006.229.08:57:49.16#ibcon#wrote, iclass 24, count 0 2006.229.08:57:49.16#ibcon#about to read 3, iclass 24, count 0 2006.229.08:57:49.18#ibcon#read 3, iclass 24, count 0 2006.229.08:57:49.18#ibcon#about to read 4, iclass 24, count 0 2006.229.08:57:49.18#ibcon#read 4, iclass 24, count 0 2006.229.08:57:49.18#ibcon#about to read 5, iclass 24, count 0 2006.229.08:57:49.18#ibcon#read 5, iclass 24, count 0 2006.229.08:57:49.18#ibcon#about to read 6, iclass 24, count 0 2006.229.08:57:49.18#ibcon#read 6, iclass 24, count 0 2006.229.08:57:49.18#ibcon#end of sib2, iclass 24, count 0 2006.229.08:57:49.18#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:57:49.18#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:57:49.18#ibcon#[25=USB\r\n] 2006.229.08:57:49.18#ibcon#*before write, iclass 24, count 0 2006.229.08:57:49.18#ibcon#enter sib2, iclass 24, count 0 2006.229.08:57:49.18#ibcon#flushed, iclass 24, count 0 2006.229.08:57:49.18#ibcon#about to write, iclass 24, count 0 2006.229.08:57:49.18#ibcon#wrote, iclass 24, count 0 2006.229.08:57:49.18#ibcon#about to read 3, iclass 24, count 0 2006.229.08:57:49.21#ibcon#read 3, iclass 24, count 0 2006.229.08:57:49.21#ibcon#about to read 4, iclass 24, count 0 2006.229.08:57:49.21#ibcon#read 4, iclass 24, count 0 2006.229.08:57:49.21#ibcon#about to read 5, iclass 24, count 0 2006.229.08:57:49.21#ibcon#read 5, iclass 24, count 0 2006.229.08:57:49.21#ibcon#about to read 6, iclass 24, count 0 2006.229.08:57:49.21#ibcon#read 6, iclass 24, count 0 2006.229.08:57:49.21#ibcon#end of sib2, iclass 24, count 0 2006.229.08:57:49.21#ibcon#*after write, iclass 24, count 0 2006.229.08:57:49.21#ibcon#*before return 0, iclass 24, count 0 2006.229.08:57:49.21#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:49.21#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:49.21#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:57:49.21#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:57:49.21$vck44/valo=4,624.99 2006.229.08:57:49.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.08:57:49.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.08:57:49.21#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:49.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:49.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:49.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:49.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:57:49.21#ibcon#first serial, iclass 26, count 0 2006.229.08:57:49.21#ibcon#enter sib2, iclass 26, count 0 2006.229.08:57:49.21#ibcon#flushed, iclass 26, count 0 2006.229.08:57:49.21#ibcon#about to write, iclass 26, count 0 2006.229.08:57:49.21#ibcon#wrote, iclass 26, count 0 2006.229.08:57:49.21#ibcon#about to read 3, iclass 26, count 0 2006.229.08:57:49.23#ibcon#read 3, iclass 26, count 0 2006.229.08:57:49.23#ibcon#about to read 4, iclass 26, count 0 2006.229.08:57:49.23#ibcon#read 4, iclass 26, count 0 2006.229.08:57:49.23#ibcon#about to read 5, iclass 26, count 0 2006.229.08:57:49.23#ibcon#read 5, iclass 26, count 0 2006.229.08:57:49.23#ibcon#about to read 6, iclass 26, count 0 2006.229.08:57:49.23#ibcon#read 6, iclass 26, count 0 2006.229.08:57:49.23#ibcon#end of sib2, iclass 26, count 0 2006.229.08:57:49.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:57:49.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:57:49.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.08:57:49.23#ibcon#*before write, iclass 26, count 0 2006.229.08:57:49.23#ibcon#enter sib2, iclass 26, count 0 2006.229.08:57:49.23#ibcon#flushed, iclass 26, count 0 2006.229.08:57:49.23#ibcon#about to write, iclass 26, count 0 2006.229.08:57:49.23#ibcon#wrote, iclass 26, count 0 2006.229.08:57:49.23#ibcon#about to read 3, iclass 26, count 0 2006.229.08:57:49.27#ibcon#read 3, iclass 26, count 0 2006.229.08:57:49.27#ibcon#about to read 4, iclass 26, count 0 2006.229.08:57:49.27#ibcon#read 4, iclass 26, count 0 2006.229.08:57:49.27#ibcon#about to read 5, iclass 26, count 0 2006.229.08:57:49.27#ibcon#read 5, iclass 26, count 0 2006.229.08:57:49.27#ibcon#about to read 6, iclass 26, count 0 2006.229.08:57:49.27#ibcon#read 6, iclass 26, count 0 2006.229.08:57:49.27#ibcon#end of sib2, iclass 26, count 0 2006.229.08:57:49.27#ibcon#*after write, iclass 26, count 0 2006.229.08:57:49.27#ibcon#*before return 0, iclass 26, count 0 2006.229.08:57:49.27#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:49.27#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:49.27#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:57:49.27#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:57:49.27$vck44/va=4,7 2006.229.08:57:49.27#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.08:57:49.27#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.08:57:49.27#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:49.27#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:49.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:49.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:49.33#ibcon#enter wrdev, iclass 28, count 2 2006.229.08:57:49.33#ibcon#first serial, iclass 28, count 2 2006.229.08:57:49.33#ibcon#enter sib2, iclass 28, count 2 2006.229.08:57:49.33#ibcon#flushed, iclass 28, count 2 2006.229.08:57:49.33#ibcon#about to write, iclass 28, count 2 2006.229.08:57:49.33#ibcon#wrote, iclass 28, count 2 2006.229.08:57:49.33#ibcon#about to read 3, iclass 28, count 2 2006.229.08:57:49.35#ibcon#read 3, iclass 28, count 2 2006.229.08:57:49.35#ibcon#about to read 4, iclass 28, count 2 2006.229.08:57:49.35#ibcon#read 4, iclass 28, count 2 2006.229.08:57:49.35#ibcon#about to read 5, iclass 28, count 2 2006.229.08:57:49.35#ibcon#read 5, iclass 28, count 2 2006.229.08:57:49.35#ibcon#about to read 6, iclass 28, count 2 2006.229.08:57:49.35#ibcon#read 6, iclass 28, count 2 2006.229.08:57:49.35#ibcon#end of sib2, iclass 28, count 2 2006.229.08:57:49.35#ibcon#*mode == 0, iclass 28, count 2 2006.229.08:57:49.35#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.08:57:49.35#ibcon#[25=AT04-07\r\n] 2006.229.08:57:49.35#ibcon#*before write, iclass 28, count 2 2006.229.08:57:49.35#ibcon#enter sib2, iclass 28, count 2 2006.229.08:57:49.35#ibcon#flushed, iclass 28, count 2 2006.229.08:57:49.35#ibcon#about to write, iclass 28, count 2 2006.229.08:57:49.35#ibcon#wrote, iclass 28, count 2 2006.229.08:57:49.35#ibcon#about to read 3, iclass 28, count 2 2006.229.08:57:49.38#ibcon#read 3, iclass 28, count 2 2006.229.08:57:49.38#ibcon#about to read 4, iclass 28, count 2 2006.229.08:57:49.38#ibcon#read 4, iclass 28, count 2 2006.229.08:57:49.38#ibcon#about to read 5, iclass 28, count 2 2006.229.08:57:49.38#ibcon#read 5, iclass 28, count 2 2006.229.08:57:49.38#ibcon#about to read 6, iclass 28, count 2 2006.229.08:57:49.38#ibcon#read 6, iclass 28, count 2 2006.229.08:57:49.38#ibcon#end of sib2, iclass 28, count 2 2006.229.08:57:49.38#ibcon#*after write, iclass 28, count 2 2006.229.08:57:49.38#ibcon#*before return 0, iclass 28, count 2 2006.229.08:57:49.38#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:49.38#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:49.38#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.08:57:49.38#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:49.38#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:49.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:49.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:49.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:57:49.50#ibcon#first serial, iclass 28, count 0 2006.229.08:57:49.50#ibcon#enter sib2, iclass 28, count 0 2006.229.08:57:49.50#ibcon#flushed, iclass 28, count 0 2006.229.08:57:49.50#ibcon#about to write, iclass 28, count 0 2006.229.08:57:49.50#ibcon#wrote, iclass 28, count 0 2006.229.08:57:49.50#ibcon#about to read 3, iclass 28, count 0 2006.229.08:57:49.52#ibcon#read 3, iclass 28, count 0 2006.229.08:57:49.52#ibcon#about to read 4, iclass 28, count 0 2006.229.08:57:49.52#ibcon#read 4, iclass 28, count 0 2006.229.08:57:49.52#ibcon#about to read 5, iclass 28, count 0 2006.229.08:57:49.52#ibcon#read 5, iclass 28, count 0 2006.229.08:57:49.52#ibcon#about to read 6, iclass 28, count 0 2006.229.08:57:49.52#ibcon#read 6, iclass 28, count 0 2006.229.08:57:49.52#ibcon#end of sib2, iclass 28, count 0 2006.229.08:57:49.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:57:49.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:57:49.52#ibcon#[25=USB\r\n] 2006.229.08:57:49.52#ibcon#*before write, iclass 28, count 0 2006.229.08:57:49.52#ibcon#enter sib2, iclass 28, count 0 2006.229.08:57:49.52#ibcon#flushed, iclass 28, count 0 2006.229.08:57:49.52#ibcon#about to write, iclass 28, count 0 2006.229.08:57:49.52#ibcon#wrote, iclass 28, count 0 2006.229.08:57:49.52#ibcon#about to read 3, iclass 28, count 0 2006.229.08:57:49.55#ibcon#read 3, iclass 28, count 0 2006.229.08:57:49.55#ibcon#about to read 4, iclass 28, count 0 2006.229.08:57:49.55#ibcon#read 4, iclass 28, count 0 2006.229.08:57:49.55#ibcon#about to read 5, iclass 28, count 0 2006.229.08:57:49.55#ibcon#read 5, iclass 28, count 0 2006.229.08:57:49.55#ibcon#about to read 6, iclass 28, count 0 2006.229.08:57:49.55#ibcon#read 6, iclass 28, count 0 2006.229.08:57:49.55#ibcon#end of sib2, iclass 28, count 0 2006.229.08:57:49.55#ibcon#*after write, iclass 28, count 0 2006.229.08:57:49.55#ibcon#*before return 0, iclass 28, count 0 2006.229.08:57:49.55#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:49.55#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:49.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:57:49.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:57:49.55$vck44/valo=5,734.99 2006.229.08:57:49.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.08:57:49.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.08:57:49.55#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:49.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:49.55#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:49.55#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:49.55#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:57:49.55#ibcon#first serial, iclass 30, count 0 2006.229.08:57:49.55#ibcon#enter sib2, iclass 30, count 0 2006.229.08:57:49.55#ibcon#flushed, iclass 30, count 0 2006.229.08:57:49.55#ibcon#about to write, iclass 30, count 0 2006.229.08:57:49.55#ibcon#wrote, iclass 30, count 0 2006.229.08:57:49.55#ibcon#about to read 3, iclass 30, count 0 2006.229.08:57:49.57#ibcon#read 3, iclass 30, count 0 2006.229.08:57:49.57#ibcon#about to read 4, iclass 30, count 0 2006.229.08:57:49.57#ibcon#read 4, iclass 30, count 0 2006.229.08:57:49.57#ibcon#about to read 5, iclass 30, count 0 2006.229.08:57:49.57#ibcon#read 5, iclass 30, count 0 2006.229.08:57:49.57#ibcon#about to read 6, iclass 30, count 0 2006.229.08:57:49.57#ibcon#read 6, iclass 30, count 0 2006.229.08:57:49.57#ibcon#end of sib2, iclass 30, count 0 2006.229.08:57:49.57#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:57:49.57#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:57:49.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.08:57:49.57#ibcon#*before write, iclass 30, count 0 2006.229.08:57:49.57#ibcon#enter sib2, iclass 30, count 0 2006.229.08:57:49.57#ibcon#flushed, iclass 30, count 0 2006.229.08:57:49.57#ibcon#about to write, iclass 30, count 0 2006.229.08:57:49.57#ibcon#wrote, iclass 30, count 0 2006.229.08:57:49.57#ibcon#about to read 3, iclass 30, count 0 2006.229.08:57:49.61#ibcon#read 3, iclass 30, count 0 2006.229.08:57:49.61#ibcon#about to read 4, iclass 30, count 0 2006.229.08:57:49.61#ibcon#read 4, iclass 30, count 0 2006.229.08:57:49.61#ibcon#about to read 5, iclass 30, count 0 2006.229.08:57:49.61#ibcon#read 5, iclass 30, count 0 2006.229.08:57:49.61#ibcon#about to read 6, iclass 30, count 0 2006.229.08:57:49.61#ibcon#read 6, iclass 30, count 0 2006.229.08:57:49.61#ibcon#end of sib2, iclass 30, count 0 2006.229.08:57:49.61#ibcon#*after write, iclass 30, count 0 2006.229.08:57:49.61#ibcon#*before return 0, iclass 30, count 0 2006.229.08:57:49.61#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:49.61#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:49.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:57:49.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:57:49.61$vck44/va=5,4 2006.229.08:57:49.61#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.08:57:49.61#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.08:57:49.61#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:49.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:49.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:49.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:49.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.08:57:49.67#ibcon#first serial, iclass 32, count 2 2006.229.08:57:49.67#ibcon#enter sib2, iclass 32, count 2 2006.229.08:57:49.67#ibcon#flushed, iclass 32, count 2 2006.229.08:57:49.67#ibcon#about to write, iclass 32, count 2 2006.229.08:57:49.67#ibcon#wrote, iclass 32, count 2 2006.229.08:57:49.67#ibcon#about to read 3, iclass 32, count 2 2006.229.08:57:49.69#ibcon#read 3, iclass 32, count 2 2006.229.08:57:49.69#ibcon#about to read 4, iclass 32, count 2 2006.229.08:57:49.69#ibcon#read 4, iclass 32, count 2 2006.229.08:57:49.69#ibcon#about to read 5, iclass 32, count 2 2006.229.08:57:49.69#ibcon#read 5, iclass 32, count 2 2006.229.08:57:49.69#ibcon#about to read 6, iclass 32, count 2 2006.229.08:57:49.69#ibcon#read 6, iclass 32, count 2 2006.229.08:57:49.69#ibcon#end of sib2, iclass 32, count 2 2006.229.08:57:49.69#ibcon#*mode == 0, iclass 32, count 2 2006.229.08:57:49.69#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.08:57:49.69#ibcon#[25=AT05-04\r\n] 2006.229.08:57:49.69#ibcon#*before write, iclass 32, count 2 2006.229.08:57:49.69#ibcon#enter sib2, iclass 32, count 2 2006.229.08:57:49.69#ibcon#flushed, iclass 32, count 2 2006.229.08:57:49.69#ibcon#about to write, iclass 32, count 2 2006.229.08:57:49.69#ibcon#wrote, iclass 32, count 2 2006.229.08:57:49.69#ibcon#about to read 3, iclass 32, count 2 2006.229.08:57:49.72#ibcon#read 3, iclass 32, count 2 2006.229.08:57:49.72#ibcon#about to read 4, iclass 32, count 2 2006.229.08:57:49.72#ibcon#read 4, iclass 32, count 2 2006.229.08:57:49.72#ibcon#about to read 5, iclass 32, count 2 2006.229.08:57:49.72#ibcon#read 5, iclass 32, count 2 2006.229.08:57:49.72#ibcon#about to read 6, iclass 32, count 2 2006.229.08:57:49.72#ibcon#read 6, iclass 32, count 2 2006.229.08:57:49.72#ibcon#end of sib2, iclass 32, count 2 2006.229.08:57:49.72#ibcon#*after write, iclass 32, count 2 2006.229.08:57:49.72#ibcon#*before return 0, iclass 32, count 2 2006.229.08:57:49.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:49.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:49.72#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.08:57:49.72#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:49.72#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:49.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:49.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:49.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:57:49.84#ibcon#first serial, iclass 32, count 0 2006.229.08:57:49.84#ibcon#enter sib2, iclass 32, count 0 2006.229.08:57:49.84#ibcon#flushed, iclass 32, count 0 2006.229.08:57:49.84#ibcon#about to write, iclass 32, count 0 2006.229.08:57:49.84#ibcon#wrote, iclass 32, count 0 2006.229.08:57:49.84#ibcon#about to read 3, iclass 32, count 0 2006.229.08:57:49.86#ibcon#read 3, iclass 32, count 0 2006.229.08:57:49.86#ibcon#about to read 4, iclass 32, count 0 2006.229.08:57:49.86#ibcon#read 4, iclass 32, count 0 2006.229.08:57:49.86#ibcon#about to read 5, iclass 32, count 0 2006.229.08:57:49.86#ibcon#read 5, iclass 32, count 0 2006.229.08:57:49.86#ibcon#about to read 6, iclass 32, count 0 2006.229.08:57:49.86#ibcon#read 6, iclass 32, count 0 2006.229.08:57:49.86#ibcon#end of sib2, iclass 32, count 0 2006.229.08:57:49.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:57:49.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:57:49.86#ibcon#[25=USB\r\n] 2006.229.08:57:49.86#ibcon#*before write, iclass 32, count 0 2006.229.08:57:49.86#ibcon#enter sib2, iclass 32, count 0 2006.229.08:57:49.86#ibcon#flushed, iclass 32, count 0 2006.229.08:57:49.86#ibcon#about to write, iclass 32, count 0 2006.229.08:57:49.86#ibcon#wrote, iclass 32, count 0 2006.229.08:57:49.86#ibcon#about to read 3, iclass 32, count 0 2006.229.08:57:49.89#ibcon#read 3, iclass 32, count 0 2006.229.08:57:49.89#ibcon#about to read 4, iclass 32, count 0 2006.229.08:57:49.89#ibcon#read 4, iclass 32, count 0 2006.229.08:57:49.89#ibcon#about to read 5, iclass 32, count 0 2006.229.08:57:49.89#ibcon#read 5, iclass 32, count 0 2006.229.08:57:49.89#ibcon#about to read 6, iclass 32, count 0 2006.229.08:57:49.89#ibcon#read 6, iclass 32, count 0 2006.229.08:57:49.89#ibcon#end of sib2, iclass 32, count 0 2006.229.08:57:49.89#ibcon#*after write, iclass 32, count 0 2006.229.08:57:49.89#ibcon#*before return 0, iclass 32, count 0 2006.229.08:57:49.89#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:49.89#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:49.89#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:57:49.89#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:57:49.89$vck44/valo=6,814.99 2006.229.08:57:49.89#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:57:49.89#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:57:49.89#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:49.89#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:49.89#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:49.89#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:49.89#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:57:49.89#ibcon#first serial, iclass 34, count 0 2006.229.08:57:49.89#ibcon#enter sib2, iclass 34, count 0 2006.229.08:57:49.89#ibcon#flushed, iclass 34, count 0 2006.229.08:57:49.89#ibcon#about to write, iclass 34, count 0 2006.229.08:57:49.89#ibcon#wrote, iclass 34, count 0 2006.229.08:57:49.89#ibcon#about to read 3, iclass 34, count 0 2006.229.08:57:49.91#ibcon#read 3, iclass 34, count 0 2006.229.08:57:49.91#ibcon#about to read 4, iclass 34, count 0 2006.229.08:57:49.91#ibcon#read 4, iclass 34, count 0 2006.229.08:57:49.91#ibcon#about to read 5, iclass 34, count 0 2006.229.08:57:49.91#ibcon#read 5, iclass 34, count 0 2006.229.08:57:49.91#ibcon#about to read 6, iclass 34, count 0 2006.229.08:57:49.91#ibcon#read 6, iclass 34, count 0 2006.229.08:57:49.91#ibcon#end of sib2, iclass 34, count 0 2006.229.08:57:49.91#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:57:49.91#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:57:49.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.08:57:49.91#ibcon#*before write, iclass 34, count 0 2006.229.08:57:49.91#ibcon#enter sib2, iclass 34, count 0 2006.229.08:57:49.91#ibcon#flushed, iclass 34, count 0 2006.229.08:57:49.91#ibcon#about to write, iclass 34, count 0 2006.229.08:57:49.91#ibcon#wrote, iclass 34, count 0 2006.229.08:57:49.91#ibcon#about to read 3, iclass 34, count 0 2006.229.08:57:49.95#ibcon#read 3, iclass 34, count 0 2006.229.08:57:49.95#ibcon#about to read 4, iclass 34, count 0 2006.229.08:57:49.95#ibcon#read 4, iclass 34, count 0 2006.229.08:57:49.95#ibcon#about to read 5, iclass 34, count 0 2006.229.08:57:49.95#ibcon#read 5, iclass 34, count 0 2006.229.08:57:49.95#ibcon#about to read 6, iclass 34, count 0 2006.229.08:57:49.95#ibcon#read 6, iclass 34, count 0 2006.229.08:57:49.95#ibcon#end of sib2, iclass 34, count 0 2006.229.08:57:49.95#ibcon#*after write, iclass 34, count 0 2006.229.08:57:49.95#ibcon#*before return 0, iclass 34, count 0 2006.229.08:57:49.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:49.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:49.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:57:49.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:57:49.95$vck44/va=6,4 2006.229.08:57:49.95#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.08:57:49.95#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.08:57:49.95#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:49.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:50.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:50.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:50.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.08:57:50.01#ibcon#first serial, iclass 36, count 2 2006.229.08:57:50.01#ibcon#enter sib2, iclass 36, count 2 2006.229.08:57:50.01#ibcon#flushed, iclass 36, count 2 2006.229.08:57:50.01#ibcon#about to write, iclass 36, count 2 2006.229.08:57:50.01#ibcon#wrote, iclass 36, count 2 2006.229.08:57:50.01#ibcon#about to read 3, iclass 36, count 2 2006.229.08:57:50.03#ibcon#read 3, iclass 36, count 2 2006.229.08:57:50.03#ibcon#about to read 4, iclass 36, count 2 2006.229.08:57:50.03#ibcon#read 4, iclass 36, count 2 2006.229.08:57:50.03#ibcon#about to read 5, iclass 36, count 2 2006.229.08:57:50.03#ibcon#read 5, iclass 36, count 2 2006.229.08:57:50.03#ibcon#about to read 6, iclass 36, count 2 2006.229.08:57:50.03#ibcon#read 6, iclass 36, count 2 2006.229.08:57:50.03#ibcon#end of sib2, iclass 36, count 2 2006.229.08:57:50.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.08:57:50.03#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.08:57:50.03#ibcon#[25=AT06-04\r\n] 2006.229.08:57:50.03#ibcon#*before write, iclass 36, count 2 2006.229.08:57:50.03#ibcon#enter sib2, iclass 36, count 2 2006.229.08:57:50.03#ibcon#flushed, iclass 36, count 2 2006.229.08:57:50.03#ibcon#about to write, iclass 36, count 2 2006.229.08:57:50.03#ibcon#wrote, iclass 36, count 2 2006.229.08:57:50.03#ibcon#about to read 3, iclass 36, count 2 2006.229.08:57:50.06#ibcon#read 3, iclass 36, count 2 2006.229.08:57:50.06#ibcon#about to read 4, iclass 36, count 2 2006.229.08:57:50.06#ibcon#read 4, iclass 36, count 2 2006.229.08:57:50.06#ibcon#about to read 5, iclass 36, count 2 2006.229.08:57:50.06#ibcon#read 5, iclass 36, count 2 2006.229.08:57:50.06#ibcon#about to read 6, iclass 36, count 2 2006.229.08:57:50.06#ibcon#read 6, iclass 36, count 2 2006.229.08:57:50.06#ibcon#end of sib2, iclass 36, count 2 2006.229.08:57:50.06#ibcon#*after write, iclass 36, count 2 2006.229.08:57:50.06#ibcon#*before return 0, iclass 36, count 2 2006.229.08:57:50.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:50.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:50.06#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.08:57:50.06#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:50.06#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:50.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:50.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:50.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:57:50.18#ibcon#first serial, iclass 36, count 0 2006.229.08:57:50.18#ibcon#enter sib2, iclass 36, count 0 2006.229.08:57:50.18#ibcon#flushed, iclass 36, count 0 2006.229.08:57:50.18#ibcon#about to write, iclass 36, count 0 2006.229.08:57:50.18#ibcon#wrote, iclass 36, count 0 2006.229.08:57:50.18#ibcon#about to read 3, iclass 36, count 0 2006.229.08:57:50.20#ibcon#read 3, iclass 36, count 0 2006.229.08:57:50.20#ibcon#about to read 4, iclass 36, count 0 2006.229.08:57:50.20#ibcon#read 4, iclass 36, count 0 2006.229.08:57:50.20#ibcon#about to read 5, iclass 36, count 0 2006.229.08:57:50.20#ibcon#read 5, iclass 36, count 0 2006.229.08:57:50.20#ibcon#about to read 6, iclass 36, count 0 2006.229.08:57:50.20#ibcon#read 6, iclass 36, count 0 2006.229.08:57:50.20#ibcon#end of sib2, iclass 36, count 0 2006.229.08:57:50.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:57:50.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:57:50.20#ibcon#[25=USB\r\n] 2006.229.08:57:50.20#ibcon#*before write, iclass 36, count 0 2006.229.08:57:50.20#ibcon#enter sib2, iclass 36, count 0 2006.229.08:57:50.20#ibcon#flushed, iclass 36, count 0 2006.229.08:57:50.20#ibcon#about to write, iclass 36, count 0 2006.229.08:57:50.20#ibcon#wrote, iclass 36, count 0 2006.229.08:57:50.20#ibcon#about to read 3, iclass 36, count 0 2006.229.08:57:50.23#ibcon#read 3, iclass 36, count 0 2006.229.08:57:50.23#ibcon#about to read 4, iclass 36, count 0 2006.229.08:57:50.23#ibcon#read 4, iclass 36, count 0 2006.229.08:57:50.23#ibcon#about to read 5, iclass 36, count 0 2006.229.08:57:50.23#ibcon#read 5, iclass 36, count 0 2006.229.08:57:50.23#ibcon#about to read 6, iclass 36, count 0 2006.229.08:57:50.23#ibcon#read 6, iclass 36, count 0 2006.229.08:57:50.23#ibcon#end of sib2, iclass 36, count 0 2006.229.08:57:50.23#ibcon#*after write, iclass 36, count 0 2006.229.08:57:50.23#ibcon#*before return 0, iclass 36, count 0 2006.229.08:57:50.23#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:50.23#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:50.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:57:50.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:57:50.23$vck44/valo=7,864.99 2006.229.08:57:50.23#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.08:57:50.23#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.08:57:50.23#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:50.23#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:50.23#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:50.23#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:50.23#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:57:50.23#ibcon#first serial, iclass 38, count 0 2006.229.08:57:50.23#ibcon#enter sib2, iclass 38, count 0 2006.229.08:57:50.23#ibcon#flushed, iclass 38, count 0 2006.229.08:57:50.23#ibcon#about to write, iclass 38, count 0 2006.229.08:57:50.23#ibcon#wrote, iclass 38, count 0 2006.229.08:57:50.23#ibcon#about to read 3, iclass 38, count 0 2006.229.08:57:50.25#ibcon#read 3, iclass 38, count 0 2006.229.08:57:50.25#ibcon#about to read 4, iclass 38, count 0 2006.229.08:57:50.25#ibcon#read 4, iclass 38, count 0 2006.229.08:57:50.25#ibcon#about to read 5, iclass 38, count 0 2006.229.08:57:50.25#ibcon#read 5, iclass 38, count 0 2006.229.08:57:50.25#ibcon#about to read 6, iclass 38, count 0 2006.229.08:57:50.25#ibcon#read 6, iclass 38, count 0 2006.229.08:57:50.25#ibcon#end of sib2, iclass 38, count 0 2006.229.08:57:50.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:57:50.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:57:50.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.08:57:50.25#ibcon#*before write, iclass 38, count 0 2006.229.08:57:50.25#ibcon#enter sib2, iclass 38, count 0 2006.229.08:57:50.25#ibcon#flushed, iclass 38, count 0 2006.229.08:57:50.25#ibcon#about to write, iclass 38, count 0 2006.229.08:57:50.25#ibcon#wrote, iclass 38, count 0 2006.229.08:57:50.25#ibcon#about to read 3, iclass 38, count 0 2006.229.08:57:50.29#ibcon#read 3, iclass 38, count 0 2006.229.08:57:50.29#ibcon#about to read 4, iclass 38, count 0 2006.229.08:57:50.29#ibcon#read 4, iclass 38, count 0 2006.229.08:57:50.29#ibcon#about to read 5, iclass 38, count 0 2006.229.08:57:50.29#ibcon#read 5, iclass 38, count 0 2006.229.08:57:50.29#ibcon#about to read 6, iclass 38, count 0 2006.229.08:57:50.29#ibcon#read 6, iclass 38, count 0 2006.229.08:57:50.29#ibcon#end of sib2, iclass 38, count 0 2006.229.08:57:50.29#ibcon#*after write, iclass 38, count 0 2006.229.08:57:50.29#ibcon#*before return 0, iclass 38, count 0 2006.229.08:57:50.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:50.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:50.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:57:50.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:57:50.29$vck44/va=7,5 2006.229.08:57:50.29#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.08:57:50.29#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.08:57:50.29#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:50.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:50.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:50.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:50.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.08:57:50.35#ibcon#first serial, iclass 40, count 2 2006.229.08:57:50.35#ibcon#enter sib2, iclass 40, count 2 2006.229.08:57:50.35#ibcon#flushed, iclass 40, count 2 2006.229.08:57:50.35#ibcon#about to write, iclass 40, count 2 2006.229.08:57:50.35#ibcon#wrote, iclass 40, count 2 2006.229.08:57:50.35#ibcon#about to read 3, iclass 40, count 2 2006.229.08:57:50.37#ibcon#read 3, iclass 40, count 2 2006.229.08:57:50.37#ibcon#about to read 4, iclass 40, count 2 2006.229.08:57:50.37#ibcon#read 4, iclass 40, count 2 2006.229.08:57:50.37#ibcon#about to read 5, iclass 40, count 2 2006.229.08:57:50.37#ibcon#read 5, iclass 40, count 2 2006.229.08:57:50.37#ibcon#about to read 6, iclass 40, count 2 2006.229.08:57:50.37#ibcon#read 6, iclass 40, count 2 2006.229.08:57:50.37#ibcon#end of sib2, iclass 40, count 2 2006.229.08:57:50.37#ibcon#*mode == 0, iclass 40, count 2 2006.229.08:57:50.37#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.08:57:50.37#ibcon#[25=AT07-05\r\n] 2006.229.08:57:50.37#ibcon#*before write, iclass 40, count 2 2006.229.08:57:50.37#ibcon#enter sib2, iclass 40, count 2 2006.229.08:57:50.37#ibcon#flushed, iclass 40, count 2 2006.229.08:57:50.37#ibcon#about to write, iclass 40, count 2 2006.229.08:57:50.37#ibcon#wrote, iclass 40, count 2 2006.229.08:57:50.37#ibcon#about to read 3, iclass 40, count 2 2006.229.08:57:50.40#ibcon#read 3, iclass 40, count 2 2006.229.08:57:50.40#ibcon#about to read 4, iclass 40, count 2 2006.229.08:57:50.40#ibcon#read 4, iclass 40, count 2 2006.229.08:57:50.40#ibcon#about to read 5, iclass 40, count 2 2006.229.08:57:50.40#ibcon#read 5, iclass 40, count 2 2006.229.08:57:50.40#ibcon#about to read 6, iclass 40, count 2 2006.229.08:57:50.40#ibcon#read 6, iclass 40, count 2 2006.229.08:57:50.40#ibcon#end of sib2, iclass 40, count 2 2006.229.08:57:50.40#ibcon#*after write, iclass 40, count 2 2006.229.08:57:50.40#ibcon#*before return 0, iclass 40, count 2 2006.229.08:57:50.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:50.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:50.40#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.08:57:50.40#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:50.40#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:50.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:50.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:50.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:57:50.52#ibcon#first serial, iclass 40, count 0 2006.229.08:57:50.52#ibcon#enter sib2, iclass 40, count 0 2006.229.08:57:50.52#ibcon#flushed, iclass 40, count 0 2006.229.08:57:50.52#ibcon#about to write, iclass 40, count 0 2006.229.08:57:50.52#ibcon#wrote, iclass 40, count 0 2006.229.08:57:50.52#ibcon#about to read 3, iclass 40, count 0 2006.229.08:57:50.54#ibcon#read 3, iclass 40, count 0 2006.229.08:57:50.54#ibcon#about to read 4, iclass 40, count 0 2006.229.08:57:50.54#ibcon#read 4, iclass 40, count 0 2006.229.08:57:50.54#ibcon#about to read 5, iclass 40, count 0 2006.229.08:57:50.54#ibcon#read 5, iclass 40, count 0 2006.229.08:57:50.54#ibcon#about to read 6, iclass 40, count 0 2006.229.08:57:50.54#ibcon#read 6, iclass 40, count 0 2006.229.08:57:50.54#ibcon#end of sib2, iclass 40, count 0 2006.229.08:57:50.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:57:50.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:57:50.54#ibcon#[25=USB\r\n] 2006.229.08:57:50.54#ibcon#*before write, iclass 40, count 0 2006.229.08:57:50.54#ibcon#enter sib2, iclass 40, count 0 2006.229.08:57:50.54#ibcon#flushed, iclass 40, count 0 2006.229.08:57:50.54#ibcon#about to write, iclass 40, count 0 2006.229.08:57:50.54#ibcon#wrote, iclass 40, count 0 2006.229.08:57:50.54#ibcon#about to read 3, iclass 40, count 0 2006.229.08:57:50.57#ibcon#read 3, iclass 40, count 0 2006.229.08:57:50.57#ibcon#about to read 4, iclass 40, count 0 2006.229.08:57:50.57#ibcon#read 4, iclass 40, count 0 2006.229.08:57:50.57#ibcon#about to read 5, iclass 40, count 0 2006.229.08:57:50.57#ibcon#read 5, iclass 40, count 0 2006.229.08:57:50.57#ibcon#about to read 6, iclass 40, count 0 2006.229.08:57:50.57#ibcon#read 6, iclass 40, count 0 2006.229.08:57:50.57#ibcon#end of sib2, iclass 40, count 0 2006.229.08:57:50.57#ibcon#*after write, iclass 40, count 0 2006.229.08:57:50.57#ibcon#*before return 0, iclass 40, count 0 2006.229.08:57:50.57#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:50.57#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:50.57#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:57:50.57#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:57:50.57$vck44/valo=8,884.99 2006.229.08:57:50.57#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.08:57:50.57#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.08:57:50.57#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:50.57#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:50.57#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:50.57#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:50.57#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:57:50.57#ibcon#first serial, iclass 4, count 0 2006.229.08:57:50.57#ibcon#enter sib2, iclass 4, count 0 2006.229.08:57:50.57#ibcon#flushed, iclass 4, count 0 2006.229.08:57:50.57#ibcon#about to write, iclass 4, count 0 2006.229.08:57:50.57#ibcon#wrote, iclass 4, count 0 2006.229.08:57:50.57#ibcon#about to read 3, iclass 4, count 0 2006.229.08:57:50.59#ibcon#read 3, iclass 4, count 0 2006.229.08:57:50.59#ibcon#about to read 4, iclass 4, count 0 2006.229.08:57:50.59#ibcon#read 4, iclass 4, count 0 2006.229.08:57:50.59#ibcon#about to read 5, iclass 4, count 0 2006.229.08:57:50.59#ibcon#read 5, iclass 4, count 0 2006.229.08:57:50.59#ibcon#about to read 6, iclass 4, count 0 2006.229.08:57:50.59#ibcon#read 6, iclass 4, count 0 2006.229.08:57:50.59#ibcon#end of sib2, iclass 4, count 0 2006.229.08:57:50.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:57:50.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:57:50.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.08:57:50.59#ibcon#*before write, iclass 4, count 0 2006.229.08:57:50.59#ibcon#enter sib2, iclass 4, count 0 2006.229.08:57:50.59#ibcon#flushed, iclass 4, count 0 2006.229.08:57:50.59#ibcon#about to write, iclass 4, count 0 2006.229.08:57:50.59#ibcon#wrote, iclass 4, count 0 2006.229.08:57:50.59#ibcon#about to read 3, iclass 4, count 0 2006.229.08:57:50.63#ibcon#read 3, iclass 4, count 0 2006.229.08:57:50.63#ibcon#about to read 4, iclass 4, count 0 2006.229.08:57:50.63#ibcon#read 4, iclass 4, count 0 2006.229.08:57:50.63#ibcon#about to read 5, iclass 4, count 0 2006.229.08:57:50.63#ibcon#read 5, iclass 4, count 0 2006.229.08:57:50.63#ibcon#about to read 6, iclass 4, count 0 2006.229.08:57:50.63#ibcon#read 6, iclass 4, count 0 2006.229.08:57:50.63#ibcon#end of sib2, iclass 4, count 0 2006.229.08:57:50.63#ibcon#*after write, iclass 4, count 0 2006.229.08:57:50.63#ibcon#*before return 0, iclass 4, count 0 2006.229.08:57:50.63#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:50.63#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:50.63#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:57:50.63#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:57:50.63$vck44/va=8,6 2006.229.08:57:50.63#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.08:57:50.63#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.08:57:50.63#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:50.63#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:57:50.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:57:50.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:57:50.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.08:57:50.69#ibcon#first serial, iclass 6, count 2 2006.229.08:57:50.69#ibcon#enter sib2, iclass 6, count 2 2006.229.08:57:50.69#ibcon#flushed, iclass 6, count 2 2006.229.08:57:50.69#ibcon#about to write, iclass 6, count 2 2006.229.08:57:50.69#ibcon#wrote, iclass 6, count 2 2006.229.08:57:50.69#ibcon#about to read 3, iclass 6, count 2 2006.229.08:57:50.71#ibcon#read 3, iclass 6, count 2 2006.229.08:57:50.71#ibcon#about to read 4, iclass 6, count 2 2006.229.08:57:50.71#ibcon#read 4, iclass 6, count 2 2006.229.08:57:50.71#ibcon#about to read 5, iclass 6, count 2 2006.229.08:57:50.71#ibcon#read 5, iclass 6, count 2 2006.229.08:57:50.71#ibcon#about to read 6, iclass 6, count 2 2006.229.08:57:50.71#ibcon#read 6, iclass 6, count 2 2006.229.08:57:50.71#ibcon#end of sib2, iclass 6, count 2 2006.229.08:57:50.71#ibcon#*mode == 0, iclass 6, count 2 2006.229.08:57:50.71#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.08:57:50.71#ibcon#[25=AT08-06\r\n] 2006.229.08:57:50.71#ibcon#*before write, iclass 6, count 2 2006.229.08:57:50.71#ibcon#enter sib2, iclass 6, count 2 2006.229.08:57:50.71#ibcon#flushed, iclass 6, count 2 2006.229.08:57:50.71#ibcon#about to write, iclass 6, count 2 2006.229.08:57:50.71#ibcon#wrote, iclass 6, count 2 2006.229.08:57:50.71#ibcon#about to read 3, iclass 6, count 2 2006.229.08:57:50.74#ibcon#read 3, iclass 6, count 2 2006.229.08:57:50.74#ibcon#about to read 4, iclass 6, count 2 2006.229.08:57:50.74#ibcon#read 4, iclass 6, count 2 2006.229.08:57:50.74#ibcon#about to read 5, iclass 6, count 2 2006.229.08:57:50.74#ibcon#read 5, iclass 6, count 2 2006.229.08:57:50.74#ibcon#about to read 6, iclass 6, count 2 2006.229.08:57:50.74#ibcon#read 6, iclass 6, count 2 2006.229.08:57:50.74#ibcon#end of sib2, iclass 6, count 2 2006.229.08:57:50.74#ibcon#*after write, iclass 6, count 2 2006.229.08:57:50.74#ibcon#*before return 0, iclass 6, count 2 2006.229.08:57:50.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:57:50.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.08:57:50.74#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.08:57:50.74#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:50.74#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:57:50.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:57:50.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:57:50.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:57:50.86#ibcon#first serial, iclass 6, count 0 2006.229.08:57:50.86#ibcon#enter sib2, iclass 6, count 0 2006.229.08:57:50.86#ibcon#flushed, iclass 6, count 0 2006.229.08:57:50.86#ibcon#about to write, iclass 6, count 0 2006.229.08:57:50.86#ibcon#wrote, iclass 6, count 0 2006.229.08:57:50.86#ibcon#about to read 3, iclass 6, count 0 2006.229.08:57:50.88#ibcon#read 3, iclass 6, count 0 2006.229.08:57:50.88#ibcon#about to read 4, iclass 6, count 0 2006.229.08:57:50.88#ibcon#read 4, iclass 6, count 0 2006.229.08:57:50.88#ibcon#about to read 5, iclass 6, count 0 2006.229.08:57:50.88#ibcon#read 5, iclass 6, count 0 2006.229.08:57:50.88#ibcon#about to read 6, iclass 6, count 0 2006.229.08:57:50.88#ibcon#read 6, iclass 6, count 0 2006.229.08:57:50.88#ibcon#end of sib2, iclass 6, count 0 2006.229.08:57:50.88#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:57:50.88#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:57:50.88#ibcon#[25=USB\r\n] 2006.229.08:57:50.88#ibcon#*before write, iclass 6, count 0 2006.229.08:57:50.88#ibcon#enter sib2, iclass 6, count 0 2006.229.08:57:50.88#ibcon#flushed, iclass 6, count 0 2006.229.08:57:50.88#ibcon#about to write, iclass 6, count 0 2006.229.08:57:50.88#ibcon#wrote, iclass 6, count 0 2006.229.08:57:50.88#ibcon#about to read 3, iclass 6, count 0 2006.229.08:57:50.91#ibcon#read 3, iclass 6, count 0 2006.229.08:57:50.91#ibcon#about to read 4, iclass 6, count 0 2006.229.08:57:50.91#ibcon#read 4, iclass 6, count 0 2006.229.08:57:50.91#ibcon#about to read 5, iclass 6, count 0 2006.229.08:57:50.91#ibcon#read 5, iclass 6, count 0 2006.229.08:57:50.91#ibcon#about to read 6, iclass 6, count 0 2006.229.08:57:50.91#ibcon#read 6, iclass 6, count 0 2006.229.08:57:50.91#ibcon#end of sib2, iclass 6, count 0 2006.229.08:57:50.91#ibcon#*after write, iclass 6, count 0 2006.229.08:57:50.91#ibcon#*before return 0, iclass 6, count 0 2006.229.08:57:50.91#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:57:50.91#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.08:57:50.91#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:57:50.91#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:57:50.91$vck44/vblo=1,629.99 2006.229.08:57:50.91#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.08:57:50.91#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.08:57:50.91#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:50.91#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:57:50.91#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:57:50.91#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:57:50.91#ibcon#enter wrdev, iclass 10, count 0 2006.229.08:57:50.91#ibcon#first serial, iclass 10, count 0 2006.229.08:57:50.91#ibcon#enter sib2, iclass 10, count 0 2006.229.08:57:50.91#ibcon#flushed, iclass 10, count 0 2006.229.08:57:50.91#ibcon#about to write, iclass 10, count 0 2006.229.08:57:50.91#ibcon#wrote, iclass 10, count 0 2006.229.08:57:50.91#ibcon#about to read 3, iclass 10, count 0 2006.229.08:57:50.93#ibcon#read 3, iclass 10, count 0 2006.229.08:57:50.93#ibcon#about to read 4, iclass 10, count 0 2006.229.08:57:50.93#ibcon#read 4, iclass 10, count 0 2006.229.08:57:50.93#ibcon#about to read 5, iclass 10, count 0 2006.229.08:57:50.93#ibcon#read 5, iclass 10, count 0 2006.229.08:57:50.93#ibcon#about to read 6, iclass 10, count 0 2006.229.08:57:50.93#ibcon#read 6, iclass 10, count 0 2006.229.08:57:50.93#ibcon#end of sib2, iclass 10, count 0 2006.229.08:57:50.93#ibcon#*mode == 0, iclass 10, count 0 2006.229.08:57:50.93#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.08:57:50.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.08:57:50.93#ibcon#*before write, iclass 10, count 0 2006.229.08:57:50.93#ibcon#enter sib2, iclass 10, count 0 2006.229.08:57:50.93#ibcon#flushed, iclass 10, count 0 2006.229.08:57:50.93#ibcon#about to write, iclass 10, count 0 2006.229.08:57:50.93#ibcon#wrote, iclass 10, count 0 2006.229.08:57:50.93#ibcon#about to read 3, iclass 10, count 0 2006.229.08:57:50.97#ibcon#read 3, iclass 10, count 0 2006.229.08:57:50.97#ibcon#about to read 4, iclass 10, count 0 2006.229.08:57:50.97#ibcon#read 4, iclass 10, count 0 2006.229.08:57:50.97#ibcon#about to read 5, iclass 10, count 0 2006.229.08:57:50.97#ibcon#read 5, iclass 10, count 0 2006.229.08:57:50.97#ibcon#about to read 6, iclass 10, count 0 2006.229.08:57:50.97#ibcon#read 6, iclass 10, count 0 2006.229.08:57:50.97#ibcon#end of sib2, iclass 10, count 0 2006.229.08:57:50.97#ibcon#*after write, iclass 10, count 0 2006.229.08:57:50.97#ibcon#*before return 0, iclass 10, count 0 2006.229.08:57:50.97#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:57:50.97#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.08:57:50.97#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.08:57:50.97#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.08:57:50.97$vck44/vb=1,4 2006.229.08:57:50.97#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.08:57:50.97#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.08:57:50.97#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:50.97#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:57:50.97#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:57:50.97#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:57:50.97#ibcon#enter wrdev, iclass 12, count 2 2006.229.08:57:50.97#ibcon#first serial, iclass 12, count 2 2006.229.08:57:50.97#ibcon#enter sib2, iclass 12, count 2 2006.229.08:57:50.97#ibcon#flushed, iclass 12, count 2 2006.229.08:57:50.97#ibcon#about to write, iclass 12, count 2 2006.229.08:57:50.97#ibcon#wrote, iclass 12, count 2 2006.229.08:57:50.97#ibcon#about to read 3, iclass 12, count 2 2006.229.08:57:50.99#ibcon#read 3, iclass 12, count 2 2006.229.08:57:50.99#ibcon#about to read 4, iclass 12, count 2 2006.229.08:57:50.99#ibcon#read 4, iclass 12, count 2 2006.229.08:57:50.99#ibcon#about to read 5, iclass 12, count 2 2006.229.08:57:50.99#ibcon#read 5, iclass 12, count 2 2006.229.08:57:50.99#ibcon#about to read 6, iclass 12, count 2 2006.229.08:57:50.99#ibcon#read 6, iclass 12, count 2 2006.229.08:57:50.99#ibcon#end of sib2, iclass 12, count 2 2006.229.08:57:50.99#ibcon#*mode == 0, iclass 12, count 2 2006.229.08:57:50.99#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.08:57:50.99#ibcon#[27=AT01-04\r\n] 2006.229.08:57:50.99#ibcon#*before write, iclass 12, count 2 2006.229.08:57:50.99#ibcon#enter sib2, iclass 12, count 2 2006.229.08:57:50.99#ibcon#flushed, iclass 12, count 2 2006.229.08:57:50.99#ibcon#about to write, iclass 12, count 2 2006.229.08:57:50.99#ibcon#wrote, iclass 12, count 2 2006.229.08:57:50.99#ibcon#about to read 3, iclass 12, count 2 2006.229.08:57:51.02#ibcon#read 3, iclass 12, count 2 2006.229.08:57:51.02#ibcon#about to read 4, iclass 12, count 2 2006.229.08:57:51.02#ibcon#read 4, iclass 12, count 2 2006.229.08:57:51.02#ibcon#about to read 5, iclass 12, count 2 2006.229.08:57:51.02#ibcon#read 5, iclass 12, count 2 2006.229.08:57:51.02#ibcon#about to read 6, iclass 12, count 2 2006.229.08:57:51.02#ibcon#read 6, iclass 12, count 2 2006.229.08:57:51.02#ibcon#end of sib2, iclass 12, count 2 2006.229.08:57:51.02#ibcon#*after write, iclass 12, count 2 2006.229.08:57:51.02#ibcon#*before return 0, iclass 12, count 2 2006.229.08:57:51.02#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:57:51.02#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.08:57:51.02#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.08:57:51.02#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:51.02#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:57:51.14#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:57:51.14#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:57:51.14#ibcon#enter wrdev, iclass 12, count 0 2006.229.08:57:51.14#ibcon#first serial, iclass 12, count 0 2006.229.08:57:51.14#ibcon#enter sib2, iclass 12, count 0 2006.229.08:57:51.14#ibcon#flushed, iclass 12, count 0 2006.229.08:57:51.14#ibcon#about to write, iclass 12, count 0 2006.229.08:57:51.14#ibcon#wrote, iclass 12, count 0 2006.229.08:57:51.14#ibcon#about to read 3, iclass 12, count 0 2006.229.08:57:51.16#ibcon#read 3, iclass 12, count 0 2006.229.08:57:51.16#ibcon#about to read 4, iclass 12, count 0 2006.229.08:57:51.16#ibcon#read 4, iclass 12, count 0 2006.229.08:57:51.16#ibcon#about to read 5, iclass 12, count 0 2006.229.08:57:51.16#ibcon#read 5, iclass 12, count 0 2006.229.08:57:51.16#ibcon#about to read 6, iclass 12, count 0 2006.229.08:57:51.16#ibcon#read 6, iclass 12, count 0 2006.229.08:57:51.16#ibcon#end of sib2, iclass 12, count 0 2006.229.08:57:51.16#ibcon#*mode == 0, iclass 12, count 0 2006.229.08:57:51.16#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.08:57:51.16#ibcon#[27=USB\r\n] 2006.229.08:57:51.16#ibcon#*before write, iclass 12, count 0 2006.229.08:57:51.16#ibcon#enter sib2, iclass 12, count 0 2006.229.08:57:51.16#ibcon#flushed, iclass 12, count 0 2006.229.08:57:51.16#ibcon#about to write, iclass 12, count 0 2006.229.08:57:51.16#ibcon#wrote, iclass 12, count 0 2006.229.08:57:51.16#ibcon#about to read 3, iclass 12, count 0 2006.229.08:57:51.19#ibcon#read 3, iclass 12, count 0 2006.229.08:57:51.19#ibcon#about to read 4, iclass 12, count 0 2006.229.08:57:51.19#ibcon#read 4, iclass 12, count 0 2006.229.08:57:51.19#ibcon#about to read 5, iclass 12, count 0 2006.229.08:57:51.19#ibcon#read 5, iclass 12, count 0 2006.229.08:57:51.19#ibcon#about to read 6, iclass 12, count 0 2006.229.08:57:51.19#ibcon#read 6, iclass 12, count 0 2006.229.08:57:51.19#ibcon#end of sib2, iclass 12, count 0 2006.229.08:57:51.19#ibcon#*after write, iclass 12, count 0 2006.229.08:57:51.19#ibcon#*before return 0, iclass 12, count 0 2006.229.08:57:51.19#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:57:51.19#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.08:57:51.19#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.08:57:51.19#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.08:57:51.19$vck44/vblo=2,634.99 2006.229.08:57:51.19#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.08:57:51.19#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.08:57:51.19#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:51.19#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:57:51.19#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:57:51.19#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:57:51.19#ibcon#enter wrdev, iclass 14, count 0 2006.229.08:57:51.19#ibcon#first serial, iclass 14, count 0 2006.229.08:57:51.19#ibcon#enter sib2, iclass 14, count 0 2006.229.08:57:51.19#ibcon#flushed, iclass 14, count 0 2006.229.08:57:51.19#ibcon#about to write, iclass 14, count 0 2006.229.08:57:51.19#ibcon#wrote, iclass 14, count 0 2006.229.08:57:51.19#ibcon#about to read 3, iclass 14, count 0 2006.229.08:57:51.21#ibcon#read 3, iclass 14, count 0 2006.229.08:57:51.21#ibcon#about to read 4, iclass 14, count 0 2006.229.08:57:51.21#ibcon#read 4, iclass 14, count 0 2006.229.08:57:51.21#ibcon#about to read 5, iclass 14, count 0 2006.229.08:57:51.21#ibcon#read 5, iclass 14, count 0 2006.229.08:57:51.21#ibcon#about to read 6, iclass 14, count 0 2006.229.08:57:51.21#ibcon#read 6, iclass 14, count 0 2006.229.08:57:51.21#ibcon#end of sib2, iclass 14, count 0 2006.229.08:57:51.21#ibcon#*mode == 0, iclass 14, count 0 2006.229.08:57:51.21#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.08:57:51.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.08:57:51.21#ibcon#*before write, iclass 14, count 0 2006.229.08:57:51.21#ibcon#enter sib2, iclass 14, count 0 2006.229.08:57:51.21#ibcon#flushed, iclass 14, count 0 2006.229.08:57:51.21#ibcon#about to write, iclass 14, count 0 2006.229.08:57:51.21#ibcon#wrote, iclass 14, count 0 2006.229.08:57:51.21#ibcon#about to read 3, iclass 14, count 0 2006.229.08:57:51.25#ibcon#read 3, iclass 14, count 0 2006.229.08:57:51.25#ibcon#about to read 4, iclass 14, count 0 2006.229.08:57:51.25#ibcon#read 4, iclass 14, count 0 2006.229.08:57:51.25#ibcon#about to read 5, iclass 14, count 0 2006.229.08:57:51.25#ibcon#read 5, iclass 14, count 0 2006.229.08:57:51.25#ibcon#about to read 6, iclass 14, count 0 2006.229.08:57:51.25#ibcon#read 6, iclass 14, count 0 2006.229.08:57:51.25#ibcon#end of sib2, iclass 14, count 0 2006.229.08:57:51.25#ibcon#*after write, iclass 14, count 0 2006.229.08:57:51.25#ibcon#*before return 0, iclass 14, count 0 2006.229.08:57:51.25#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:57:51.25#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.08:57:51.25#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.08:57:51.25#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.08:57:51.25$vck44/vb=2,4 2006.229.08:57:51.25#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.08:57:51.25#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.08:57:51.25#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:51.25#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:51.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:51.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:51.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.08:57:51.31#ibcon#first serial, iclass 16, count 2 2006.229.08:57:51.31#ibcon#enter sib2, iclass 16, count 2 2006.229.08:57:51.31#ibcon#flushed, iclass 16, count 2 2006.229.08:57:51.31#ibcon#about to write, iclass 16, count 2 2006.229.08:57:51.31#ibcon#wrote, iclass 16, count 2 2006.229.08:57:51.31#ibcon#about to read 3, iclass 16, count 2 2006.229.08:57:51.33#ibcon#read 3, iclass 16, count 2 2006.229.08:57:51.33#ibcon#about to read 4, iclass 16, count 2 2006.229.08:57:51.33#ibcon#read 4, iclass 16, count 2 2006.229.08:57:51.33#ibcon#about to read 5, iclass 16, count 2 2006.229.08:57:51.33#ibcon#read 5, iclass 16, count 2 2006.229.08:57:51.33#ibcon#about to read 6, iclass 16, count 2 2006.229.08:57:51.33#ibcon#read 6, iclass 16, count 2 2006.229.08:57:51.33#ibcon#end of sib2, iclass 16, count 2 2006.229.08:57:51.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.08:57:51.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.08:57:51.33#ibcon#[27=AT02-04\r\n] 2006.229.08:57:51.33#ibcon#*before write, iclass 16, count 2 2006.229.08:57:51.33#ibcon#enter sib2, iclass 16, count 2 2006.229.08:57:51.33#ibcon#flushed, iclass 16, count 2 2006.229.08:57:51.33#ibcon#about to write, iclass 16, count 2 2006.229.08:57:51.33#ibcon#wrote, iclass 16, count 2 2006.229.08:57:51.33#ibcon#about to read 3, iclass 16, count 2 2006.229.08:57:51.36#ibcon#read 3, iclass 16, count 2 2006.229.08:57:51.36#ibcon#about to read 4, iclass 16, count 2 2006.229.08:57:51.36#ibcon#read 4, iclass 16, count 2 2006.229.08:57:51.36#ibcon#about to read 5, iclass 16, count 2 2006.229.08:57:51.36#ibcon#read 5, iclass 16, count 2 2006.229.08:57:51.36#ibcon#about to read 6, iclass 16, count 2 2006.229.08:57:51.36#ibcon#read 6, iclass 16, count 2 2006.229.08:57:51.36#ibcon#end of sib2, iclass 16, count 2 2006.229.08:57:51.36#ibcon#*after write, iclass 16, count 2 2006.229.08:57:51.36#ibcon#*before return 0, iclass 16, count 2 2006.229.08:57:51.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:51.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.08:57:51.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.08:57:51.36#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:51.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:51.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:51.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:51.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.08:57:51.48#ibcon#first serial, iclass 16, count 0 2006.229.08:57:51.48#ibcon#enter sib2, iclass 16, count 0 2006.229.08:57:51.48#ibcon#flushed, iclass 16, count 0 2006.229.08:57:51.48#ibcon#about to write, iclass 16, count 0 2006.229.08:57:51.48#ibcon#wrote, iclass 16, count 0 2006.229.08:57:51.48#ibcon#about to read 3, iclass 16, count 0 2006.229.08:57:51.50#ibcon#read 3, iclass 16, count 0 2006.229.08:57:51.50#ibcon#about to read 4, iclass 16, count 0 2006.229.08:57:51.50#ibcon#read 4, iclass 16, count 0 2006.229.08:57:51.50#ibcon#about to read 5, iclass 16, count 0 2006.229.08:57:51.50#ibcon#read 5, iclass 16, count 0 2006.229.08:57:51.50#ibcon#about to read 6, iclass 16, count 0 2006.229.08:57:51.50#ibcon#read 6, iclass 16, count 0 2006.229.08:57:51.50#ibcon#end of sib2, iclass 16, count 0 2006.229.08:57:51.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.08:57:51.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.08:57:51.50#ibcon#[27=USB\r\n] 2006.229.08:57:51.50#ibcon#*before write, iclass 16, count 0 2006.229.08:57:51.50#ibcon#enter sib2, iclass 16, count 0 2006.229.08:57:51.50#ibcon#flushed, iclass 16, count 0 2006.229.08:57:51.50#ibcon#about to write, iclass 16, count 0 2006.229.08:57:51.50#ibcon#wrote, iclass 16, count 0 2006.229.08:57:51.50#ibcon#about to read 3, iclass 16, count 0 2006.229.08:57:51.53#ibcon#read 3, iclass 16, count 0 2006.229.08:57:51.53#ibcon#about to read 4, iclass 16, count 0 2006.229.08:57:51.53#ibcon#read 4, iclass 16, count 0 2006.229.08:57:51.53#ibcon#about to read 5, iclass 16, count 0 2006.229.08:57:51.53#ibcon#read 5, iclass 16, count 0 2006.229.08:57:51.53#ibcon#about to read 6, iclass 16, count 0 2006.229.08:57:51.53#ibcon#read 6, iclass 16, count 0 2006.229.08:57:51.53#ibcon#end of sib2, iclass 16, count 0 2006.229.08:57:51.53#ibcon#*after write, iclass 16, count 0 2006.229.08:57:51.53#ibcon#*before return 0, iclass 16, count 0 2006.229.08:57:51.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:51.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.08:57:51.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.08:57:51.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.08:57:51.53$vck44/vblo=3,649.99 2006.229.08:57:51.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.08:57:51.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.08:57:51.53#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:51.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:51.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:51.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:51.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.08:57:51.53#ibcon#first serial, iclass 18, count 0 2006.229.08:57:51.53#ibcon#enter sib2, iclass 18, count 0 2006.229.08:57:51.53#ibcon#flushed, iclass 18, count 0 2006.229.08:57:51.53#ibcon#about to write, iclass 18, count 0 2006.229.08:57:51.53#ibcon#wrote, iclass 18, count 0 2006.229.08:57:51.53#ibcon#about to read 3, iclass 18, count 0 2006.229.08:57:51.55#ibcon#read 3, iclass 18, count 0 2006.229.08:57:51.55#ibcon#about to read 4, iclass 18, count 0 2006.229.08:57:51.55#ibcon#read 4, iclass 18, count 0 2006.229.08:57:51.55#ibcon#about to read 5, iclass 18, count 0 2006.229.08:57:51.55#ibcon#read 5, iclass 18, count 0 2006.229.08:57:51.55#ibcon#about to read 6, iclass 18, count 0 2006.229.08:57:51.55#ibcon#read 6, iclass 18, count 0 2006.229.08:57:51.55#ibcon#end of sib2, iclass 18, count 0 2006.229.08:57:51.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.08:57:51.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.08:57:51.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.08:57:51.55#ibcon#*before write, iclass 18, count 0 2006.229.08:57:51.55#ibcon#enter sib2, iclass 18, count 0 2006.229.08:57:51.55#ibcon#flushed, iclass 18, count 0 2006.229.08:57:51.55#ibcon#about to write, iclass 18, count 0 2006.229.08:57:51.55#ibcon#wrote, iclass 18, count 0 2006.229.08:57:51.55#ibcon#about to read 3, iclass 18, count 0 2006.229.08:57:51.59#ibcon#read 3, iclass 18, count 0 2006.229.08:57:51.59#ibcon#about to read 4, iclass 18, count 0 2006.229.08:57:51.59#ibcon#read 4, iclass 18, count 0 2006.229.08:57:51.59#ibcon#about to read 5, iclass 18, count 0 2006.229.08:57:51.59#ibcon#read 5, iclass 18, count 0 2006.229.08:57:51.59#ibcon#about to read 6, iclass 18, count 0 2006.229.08:57:51.59#ibcon#read 6, iclass 18, count 0 2006.229.08:57:51.59#ibcon#end of sib2, iclass 18, count 0 2006.229.08:57:51.59#ibcon#*after write, iclass 18, count 0 2006.229.08:57:51.59#ibcon#*before return 0, iclass 18, count 0 2006.229.08:57:51.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:51.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.08:57:51.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.08:57:51.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.08:57:51.59$vck44/vb=3,4 2006.229.08:57:51.59#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.08:57:51.59#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.08:57:51.59#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:51.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:51.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:51.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:51.65#ibcon#enter wrdev, iclass 20, count 2 2006.229.08:57:51.65#ibcon#first serial, iclass 20, count 2 2006.229.08:57:51.65#ibcon#enter sib2, iclass 20, count 2 2006.229.08:57:51.65#ibcon#flushed, iclass 20, count 2 2006.229.08:57:51.65#ibcon#about to write, iclass 20, count 2 2006.229.08:57:51.65#ibcon#wrote, iclass 20, count 2 2006.229.08:57:51.65#ibcon#about to read 3, iclass 20, count 2 2006.229.08:57:51.67#ibcon#read 3, iclass 20, count 2 2006.229.08:57:51.67#ibcon#about to read 4, iclass 20, count 2 2006.229.08:57:51.67#ibcon#read 4, iclass 20, count 2 2006.229.08:57:51.67#ibcon#about to read 5, iclass 20, count 2 2006.229.08:57:51.67#ibcon#read 5, iclass 20, count 2 2006.229.08:57:51.67#ibcon#about to read 6, iclass 20, count 2 2006.229.08:57:51.67#ibcon#read 6, iclass 20, count 2 2006.229.08:57:51.67#ibcon#end of sib2, iclass 20, count 2 2006.229.08:57:51.67#ibcon#*mode == 0, iclass 20, count 2 2006.229.08:57:51.67#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.08:57:51.67#ibcon#[27=AT03-04\r\n] 2006.229.08:57:51.67#ibcon#*before write, iclass 20, count 2 2006.229.08:57:51.67#ibcon#enter sib2, iclass 20, count 2 2006.229.08:57:51.67#ibcon#flushed, iclass 20, count 2 2006.229.08:57:51.67#ibcon#about to write, iclass 20, count 2 2006.229.08:57:51.67#ibcon#wrote, iclass 20, count 2 2006.229.08:57:51.67#ibcon#about to read 3, iclass 20, count 2 2006.229.08:57:51.70#ibcon#read 3, iclass 20, count 2 2006.229.08:57:51.70#ibcon#about to read 4, iclass 20, count 2 2006.229.08:57:51.70#ibcon#read 4, iclass 20, count 2 2006.229.08:57:51.70#ibcon#about to read 5, iclass 20, count 2 2006.229.08:57:51.70#ibcon#read 5, iclass 20, count 2 2006.229.08:57:51.70#ibcon#about to read 6, iclass 20, count 2 2006.229.08:57:51.70#ibcon#read 6, iclass 20, count 2 2006.229.08:57:51.70#ibcon#end of sib2, iclass 20, count 2 2006.229.08:57:51.70#ibcon#*after write, iclass 20, count 2 2006.229.08:57:51.70#ibcon#*before return 0, iclass 20, count 2 2006.229.08:57:51.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:51.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.08:57:51.70#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.08:57:51.70#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:51.70#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:51.82#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:51.82#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:51.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.08:57:51.82#ibcon#first serial, iclass 20, count 0 2006.229.08:57:51.82#ibcon#enter sib2, iclass 20, count 0 2006.229.08:57:51.82#ibcon#flushed, iclass 20, count 0 2006.229.08:57:51.82#ibcon#about to write, iclass 20, count 0 2006.229.08:57:51.82#ibcon#wrote, iclass 20, count 0 2006.229.08:57:51.82#ibcon#about to read 3, iclass 20, count 0 2006.229.08:57:51.84#ibcon#read 3, iclass 20, count 0 2006.229.08:57:51.84#ibcon#about to read 4, iclass 20, count 0 2006.229.08:57:51.84#ibcon#read 4, iclass 20, count 0 2006.229.08:57:51.84#ibcon#about to read 5, iclass 20, count 0 2006.229.08:57:51.84#ibcon#read 5, iclass 20, count 0 2006.229.08:57:51.84#ibcon#about to read 6, iclass 20, count 0 2006.229.08:57:51.84#ibcon#read 6, iclass 20, count 0 2006.229.08:57:51.84#ibcon#end of sib2, iclass 20, count 0 2006.229.08:57:51.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.08:57:51.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.08:57:51.84#ibcon#[27=USB\r\n] 2006.229.08:57:51.84#ibcon#*before write, iclass 20, count 0 2006.229.08:57:51.84#ibcon#enter sib2, iclass 20, count 0 2006.229.08:57:51.84#ibcon#flushed, iclass 20, count 0 2006.229.08:57:51.84#ibcon#about to write, iclass 20, count 0 2006.229.08:57:51.84#ibcon#wrote, iclass 20, count 0 2006.229.08:57:51.84#ibcon#about to read 3, iclass 20, count 0 2006.229.08:57:51.87#ibcon#read 3, iclass 20, count 0 2006.229.08:57:51.87#ibcon#about to read 4, iclass 20, count 0 2006.229.08:57:51.87#ibcon#read 4, iclass 20, count 0 2006.229.08:57:51.87#ibcon#about to read 5, iclass 20, count 0 2006.229.08:57:51.87#ibcon#read 5, iclass 20, count 0 2006.229.08:57:51.87#ibcon#about to read 6, iclass 20, count 0 2006.229.08:57:51.87#ibcon#read 6, iclass 20, count 0 2006.229.08:57:51.87#ibcon#end of sib2, iclass 20, count 0 2006.229.08:57:51.87#ibcon#*after write, iclass 20, count 0 2006.229.08:57:51.87#ibcon#*before return 0, iclass 20, count 0 2006.229.08:57:51.87#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:51.87#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.08:57:51.87#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.08:57:51.87#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.08:57:51.87$vck44/vblo=4,679.99 2006.229.08:57:51.87#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.08:57:51.87#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.08:57:51.87#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:51.87#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:51.87#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:51.87#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:51.87#ibcon#enter wrdev, iclass 22, count 0 2006.229.08:57:51.87#ibcon#first serial, iclass 22, count 0 2006.229.08:57:51.87#ibcon#enter sib2, iclass 22, count 0 2006.229.08:57:51.87#ibcon#flushed, iclass 22, count 0 2006.229.08:57:51.87#ibcon#about to write, iclass 22, count 0 2006.229.08:57:51.87#ibcon#wrote, iclass 22, count 0 2006.229.08:57:51.87#ibcon#about to read 3, iclass 22, count 0 2006.229.08:57:51.89#ibcon#read 3, iclass 22, count 0 2006.229.08:57:51.89#ibcon#about to read 4, iclass 22, count 0 2006.229.08:57:51.89#ibcon#read 4, iclass 22, count 0 2006.229.08:57:51.89#ibcon#about to read 5, iclass 22, count 0 2006.229.08:57:51.89#ibcon#read 5, iclass 22, count 0 2006.229.08:57:51.89#ibcon#about to read 6, iclass 22, count 0 2006.229.08:57:51.89#ibcon#read 6, iclass 22, count 0 2006.229.08:57:51.89#ibcon#end of sib2, iclass 22, count 0 2006.229.08:57:51.89#ibcon#*mode == 0, iclass 22, count 0 2006.229.08:57:51.89#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.08:57:51.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.08:57:51.89#ibcon#*before write, iclass 22, count 0 2006.229.08:57:51.89#ibcon#enter sib2, iclass 22, count 0 2006.229.08:57:51.89#ibcon#flushed, iclass 22, count 0 2006.229.08:57:51.89#ibcon#about to write, iclass 22, count 0 2006.229.08:57:51.89#ibcon#wrote, iclass 22, count 0 2006.229.08:57:51.89#ibcon#about to read 3, iclass 22, count 0 2006.229.08:57:51.93#ibcon#read 3, iclass 22, count 0 2006.229.08:57:51.93#ibcon#about to read 4, iclass 22, count 0 2006.229.08:57:51.93#ibcon#read 4, iclass 22, count 0 2006.229.08:57:51.93#ibcon#about to read 5, iclass 22, count 0 2006.229.08:57:51.93#ibcon#read 5, iclass 22, count 0 2006.229.08:57:51.93#ibcon#about to read 6, iclass 22, count 0 2006.229.08:57:51.93#ibcon#read 6, iclass 22, count 0 2006.229.08:57:51.93#ibcon#end of sib2, iclass 22, count 0 2006.229.08:57:51.93#ibcon#*after write, iclass 22, count 0 2006.229.08:57:51.93#ibcon#*before return 0, iclass 22, count 0 2006.229.08:57:51.93#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:51.93#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.08:57:51.93#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.08:57:51.93#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.08:57:51.93$vck44/vb=4,4 2006.229.08:57:51.93#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.08:57:51.93#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.08:57:51.93#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:51.93#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:51.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:51.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:51.99#ibcon#enter wrdev, iclass 24, count 2 2006.229.08:57:51.99#ibcon#first serial, iclass 24, count 2 2006.229.08:57:51.99#ibcon#enter sib2, iclass 24, count 2 2006.229.08:57:51.99#ibcon#flushed, iclass 24, count 2 2006.229.08:57:51.99#ibcon#about to write, iclass 24, count 2 2006.229.08:57:51.99#ibcon#wrote, iclass 24, count 2 2006.229.08:57:51.99#ibcon#about to read 3, iclass 24, count 2 2006.229.08:57:52.01#ibcon#read 3, iclass 24, count 2 2006.229.08:57:52.01#ibcon#about to read 4, iclass 24, count 2 2006.229.08:57:52.01#ibcon#read 4, iclass 24, count 2 2006.229.08:57:52.01#ibcon#about to read 5, iclass 24, count 2 2006.229.08:57:52.01#ibcon#read 5, iclass 24, count 2 2006.229.08:57:52.01#ibcon#about to read 6, iclass 24, count 2 2006.229.08:57:52.01#ibcon#read 6, iclass 24, count 2 2006.229.08:57:52.01#ibcon#end of sib2, iclass 24, count 2 2006.229.08:57:52.01#ibcon#*mode == 0, iclass 24, count 2 2006.229.08:57:52.01#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.08:57:52.01#ibcon#[27=AT04-04\r\n] 2006.229.08:57:52.01#ibcon#*before write, iclass 24, count 2 2006.229.08:57:52.01#ibcon#enter sib2, iclass 24, count 2 2006.229.08:57:52.01#ibcon#flushed, iclass 24, count 2 2006.229.08:57:52.01#ibcon#about to write, iclass 24, count 2 2006.229.08:57:52.01#ibcon#wrote, iclass 24, count 2 2006.229.08:57:52.01#ibcon#about to read 3, iclass 24, count 2 2006.229.08:57:52.04#ibcon#read 3, iclass 24, count 2 2006.229.08:57:52.04#ibcon#about to read 4, iclass 24, count 2 2006.229.08:57:52.04#ibcon#read 4, iclass 24, count 2 2006.229.08:57:52.04#ibcon#about to read 5, iclass 24, count 2 2006.229.08:57:52.04#ibcon#read 5, iclass 24, count 2 2006.229.08:57:52.04#ibcon#about to read 6, iclass 24, count 2 2006.229.08:57:52.04#ibcon#read 6, iclass 24, count 2 2006.229.08:57:52.04#ibcon#end of sib2, iclass 24, count 2 2006.229.08:57:52.04#ibcon#*after write, iclass 24, count 2 2006.229.08:57:52.04#ibcon#*before return 0, iclass 24, count 2 2006.229.08:57:52.04#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:52.04#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.08:57:52.04#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.08:57:52.04#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:52.04#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:52.16#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:52.16#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:52.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.08:57:52.16#ibcon#first serial, iclass 24, count 0 2006.229.08:57:52.16#ibcon#enter sib2, iclass 24, count 0 2006.229.08:57:52.16#ibcon#flushed, iclass 24, count 0 2006.229.08:57:52.16#ibcon#about to write, iclass 24, count 0 2006.229.08:57:52.16#ibcon#wrote, iclass 24, count 0 2006.229.08:57:52.16#ibcon#about to read 3, iclass 24, count 0 2006.229.08:57:52.18#ibcon#read 3, iclass 24, count 0 2006.229.08:57:52.18#ibcon#about to read 4, iclass 24, count 0 2006.229.08:57:52.18#ibcon#read 4, iclass 24, count 0 2006.229.08:57:52.18#ibcon#about to read 5, iclass 24, count 0 2006.229.08:57:52.18#ibcon#read 5, iclass 24, count 0 2006.229.08:57:52.18#ibcon#about to read 6, iclass 24, count 0 2006.229.08:57:52.18#ibcon#read 6, iclass 24, count 0 2006.229.08:57:52.18#ibcon#end of sib2, iclass 24, count 0 2006.229.08:57:52.18#ibcon#*mode == 0, iclass 24, count 0 2006.229.08:57:52.18#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.08:57:52.18#ibcon#[27=USB\r\n] 2006.229.08:57:52.18#ibcon#*before write, iclass 24, count 0 2006.229.08:57:52.18#ibcon#enter sib2, iclass 24, count 0 2006.229.08:57:52.18#ibcon#flushed, iclass 24, count 0 2006.229.08:57:52.18#ibcon#about to write, iclass 24, count 0 2006.229.08:57:52.18#ibcon#wrote, iclass 24, count 0 2006.229.08:57:52.18#ibcon#about to read 3, iclass 24, count 0 2006.229.08:57:52.21#ibcon#read 3, iclass 24, count 0 2006.229.08:57:52.21#ibcon#about to read 4, iclass 24, count 0 2006.229.08:57:52.21#ibcon#read 4, iclass 24, count 0 2006.229.08:57:52.21#ibcon#about to read 5, iclass 24, count 0 2006.229.08:57:52.21#ibcon#read 5, iclass 24, count 0 2006.229.08:57:52.21#ibcon#about to read 6, iclass 24, count 0 2006.229.08:57:52.21#ibcon#read 6, iclass 24, count 0 2006.229.08:57:52.21#ibcon#end of sib2, iclass 24, count 0 2006.229.08:57:52.21#ibcon#*after write, iclass 24, count 0 2006.229.08:57:52.21#ibcon#*before return 0, iclass 24, count 0 2006.229.08:57:52.21#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:52.21#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.08:57:52.21#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.08:57:52.21#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.08:57:52.21$vck44/vblo=5,709.99 2006.229.08:57:52.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.08:57:52.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.08:57:52.21#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:52.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:52.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:52.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:52.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.08:57:52.21#ibcon#first serial, iclass 26, count 0 2006.229.08:57:52.21#ibcon#enter sib2, iclass 26, count 0 2006.229.08:57:52.21#ibcon#flushed, iclass 26, count 0 2006.229.08:57:52.21#ibcon#about to write, iclass 26, count 0 2006.229.08:57:52.21#ibcon#wrote, iclass 26, count 0 2006.229.08:57:52.21#ibcon#about to read 3, iclass 26, count 0 2006.229.08:57:52.23#ibcon#read 3, iclass 26, count 0 2006.229.08:57:52.23#ibcon#about to read 4, iclass 26, count 0 2006.229.08:57:52.23#ibcon#read 4, iclass 26, count 0 2006.229.08:57:52.23#ibcon#about to read 5, iclass 26, count 0 2006.229.08:57:52.23#ibcon#read 5, iclass 26, count 0 2006.229.08:57:52.23#ibcon#about to read 6, iclass 26, count 0 2006.229.08:57:52.23#ibcon#read 6, iclass 26, count 0 2006.229.08:57:52.23#ibcon#end of sib2, iclass 26, count 0 2006.229.08:57:52.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.08:57:52.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.08:57:52.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.08:57:52.23#ibcon#*before write, iclass 26, count 0 2006.229.08:57:52.23#ibcon#enter sib2, iclass 26, count 0 2006.229.08:57:52.23#ibcon#flushed, iclass 26, count 0 2006.229.08:57:52.23#ibcon#about to write, iclass 26, count 0 2006.229.08:57:52.23#ibcon#wrote, iclass 26, count 0 2006.229.08:57:52.23#ibcon#about to read 3, iclass 26, count 0 2006.229.08:57:52.27#ibcon#read 3, iclass 26, count 0 2006.229.08:57:52.27#ibcon#about to read 4, iclass 26, count 0 2006.229.08:57:52.27#ibcon#read 4, iclass 26, count 0 2006.229.08:57:52.27#ibcon#about to read 5, iclass 26, count 0 2006.229.08:57:52.27#ibcon#read 5, iclass 26, count 0 2006.229.08:57:52.27#ibcon#about to read 6, iclass 26, count 0 2006.229.08:57:52.27#ibcon#read 6, iclass 26, count 0 2006.229.08:57:52.27#ibcon#end of sib2, iclass 26, count 0 2006.229.08:57:52.27#ibcon#*after write, iclass 26, count 0 2006.229.08:57:52.27#ibcon#*before return 0, iclass 26, count 0 2006.229.08:57:52.27#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:52.27#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.08:57:52.27#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.08:57:52.27#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.08:57:52.27$vck44/vb=5,4 2006.229.08:57:52.27#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.08:57:52.27#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.08:57:52.27#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:52.27#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:52.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:52.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:52.33#ibcon#enter wrdev, iclass 28, count 2 2006.229.08:57:52.33#ibcon#first serial, iclass 28, count 2 2006.229.08:57:52.33#ibcon#enter sib2, iclass 28, count 2 2006.229.08:57:52.33#ibcon#flushed, iclass 28, count 2 2006.229.08:57:52.33#ibcon#about to write, iclass 28, count 2 2006.229.08:57:52.33#ibcon#wrote, iclass 28, count 2 2006.229.08:57:52.33#ibcon#about to read 3, iclass 28, count 2 2006.229.08:57:52.35#ibcon#read 3, iclass 28, count 2 2006.229.08:57:52.35#ibcon#about to read 4, iclass 28, count 2 2006.229.08:57:52.35#ibcon#read 4, iclass 28, count 2 2006.229.08:57:52.35#ibcon#about to read 5, iclass 28, count 2 2006.229.08:57:52.35#ibcon#read 5, iclass 28, count 2 2006.229.08:57:52.35#ibcon#about to read 6, iclass 28, count 2 2006.229.08:57:52.35#ibcon#read 6, iclass 28, count 2 2006.229.08:57:52.35#ibcon#end of sib2, iclass 28, count 2 2006.229.08:57:52.35#ibcon#*mode == 0, iclass 28, count 2 2006.229.08:57:52.35#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.08:57:52.35#ibcon#[27=AT05-04\r\n] 2006.229.08:57:52.35#ibcon#*before write, iclass 28, count 2 2006.229.08:57:52.35#ibcon#enter sib2, iclass 28, count 2 2006.229.08:57:52.35#ibcon#flushed, iclass 28, count 2 2006.229.08:57:52.35#ibcon#about to write, iclass 28, count 2 2006.229.08:57:52.35#ibcon#wrote, iclass 28, count 2 2006.229.08:57:52.35#ibcon#about to read 3, iclass 28, count 2 2006.229.08:57:52.38#ibcon#read 3, iclass 28, count 2 2006.229.08:57:52.38#ibcon#about to read 4, iclass 28, count 2 2006.229.08:57:52.38#ibcon#read 4, iclass 28, count 2 2006.229.08:57:52.38#ibcon#about to read 5, iclass 28, count 2 2006.229.08:57:52.38#ibcon#read 5, iclass 28, count 2 2006.229.08:57:52.38#ibcon#about to read 6, iclass 28, count 2 2006.229.08:57:52.38#ibcon#read 6, iclass 28, count 2 2006.229.08:57:52.38#ibcon#end of sib2, iclass 28, count 2 2006.229.08:57:52.38#ibcon#*after write, iclass 28, count 2 2006.229.08:57:52.38#ibcon#*before return 0, iclass 28, count 2 2006.229.08:57:52.38#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:52.38#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.08:57:52.38#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.08:57:52.38#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:52.38#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:52.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:52.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:52.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.08:57:52.50#ibcon#first serial, iclass 28, count 0 2006.229.08:57:52.50#ibcon#enter sib2, iclass 28, count 0 2006.229.08:57:52.50#ibcon#flushed, iclass 28, count 0 2006.229.08:57:52.50#ibcon#about to write, iclass 28, count 0 2006.229.08:57:52.50#ibcon#wrote, iclass 28, count 0 2006.229.08:57:52.50#ibcon#about to read 3, iclass 28, count 0 2006.229.08:57:52.52#ibcon#read 3, iclass 28, count 0 2006.229.08:57:52.52#ibcon#about to read 4, iclass 28, count 0 2006.229.08:57:52.52#ibcon#read 4, iclass 28, count 0 2006.229.08:57:52.52#ibcon#about to read 5, iclass 28, count 0 2006.229.08:57:52.52#ibcon#read 5, iclass 28, count 0 2006.229.08:57:52.52#ibcon#about to read 6, iclass 28, count 0 2006.229.08:57:52.52#ibcon#read 6, iclass 28, count 0 2006.229.08:57:52.52#ibcon#end of sib2, iclass 28, count 0 2006.229.08:57:52.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.08:57:52.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.08:57:52.52#ibcon#[27=USB\r\n] 2006.229.08:57:52.52#ibcon#*before write, iclass 28, count 0 2006.229.08:57:52.52#ibcon#enter sib2, iclass 28, count 0 2006.229.08:57:52.52#ibcon#flushed, iclass 28, count 0 2006.229.08:57:52.52#ibcon#about to write, iclass 28, count 0 2006.229.08:57:52.52#ibcon#wrote, iclass 28, count 0 2006.229.08:57:52.52#ibcon#about to read 3, iclass 28, count 0 2006.229.08:57:52.55#ibcon#read 3, iclass 28, count 0 2006.229.08:57:52.55#ibcon#about to read 4, iclass 28, count 0 2006.229.08:57:52.55#ibcon#read 4, iclass 28, count 0 2006.229.08:57:52.55#ibcon#about to read 5, iclass 28, count 0 2006.229.08:57:52.55#ibcon#read 5, iclass 28, count 0 2006.229.08:57:52.55#ibcon#about to read 6, iclass 28, count 0 2006.229.08:57:52.55#ibcon#read 6, iclass 28, count 0 2006.229.08:57:52.55#ibcon#end of sib2, iclass 28, count 0 2006.229.08:57:52.55#ibcon#*after write, iclass 28, count 0 2006.229.08:57:52.55#ibcon#*before return 0, iclass 28, count 0 2006.229.08:57:52.55#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:52.55#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.08:57:52.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.08:57:52.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.08:57:52.55$vck44/vblo=6,719.99 2006.229.08:57:52.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.08:57:52.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.08:57:52.55#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:52.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:52.55#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:52.55#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:52.55#ibcon#enter wrdev, iclass 30, count 0 2006.229.08:57:52.55#ibcon#first serial, iclass 30, count 0 2006.229.08:57:52.55#ibcon#enter sib2, iclass 30, count 0 2006.229.08:57:52.55#ibcon#flushed, iclass 30, count 0 2006.229.08:57:52.55#ibcon#about to write, iclass 30, count 0 2006.229.08:57:52.55#ibcon#wrote, iclass 30, count 0 2006.229.08:57:52.55#ibcon#about to read 3, iclass 30, count 0 2006.229.08:57:52.57#ibcon#read 3, iclass 30, count 0 2006.229.08:57:52.57#ibcon#about to read 4, iclass 30, count 0 2006.229.08:57:52.57#ibcon#read 4, iclass 30, count 0 2006.229.08:57:52.57#ibcon#about to read 5, iclass 30, count 0 2006.229.08:57:52.57#ibcon#read 5, iclass 30, count 0 2006.229.08:57:52.57#ibcon#about to read 6, iclass 30, count 0 2006.229.08:57:52.57#ibcon#read 6, iclass 30, count 0 2006.229.08:57:52.57#ibcon#end of sib2, iclass 30, count 0 2006.229.08:57:52.57#ibcon#*mode == 0, iclass 30, count 0 2006.229.08:57:52.57#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.08:57:52.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.08:57:52.57#ibcon#*before write, iclass 30, count 0 2006.229.08:57:52.57#ibcon#enter sib2, iclass 30, count 0 2006.229.08:57:52.57#ibcon#flushed, iclass 30, count 0 2006.229.08:57:52.57#ibcon#about to write, iclass 30, count 0 2006.229.08:57:52.57#ibcon#wrote, iclass 30, count 0 2006.229.08:57:52.57#ibcon#about to read 3, iclass 30, count 0 2006.229.08:57:52.61#ibcon#read 3, iclass 30, count 0 2006.229.08:57:52.61#ibcon#about to read 4, iclass 30, count 0 2006.229.08:57:52.61#ibcon#read 4, iclass 30, count 0 2006.229.08:57:52.61#ibcon#about to read 5, iclass 30, count 0 2006.229.08:57:52.61#ibcon#read 5, iclass 30, count 0 2006.229.08:57:52.61#ibcon#about to read 6, iclass 30, count 0 2006.229.08:57:52.61#ibcon#read 6, iclass 30, count 0 2006.229.08:57:52.61#ibcon#end of sib2, iclass 30, count 0 2006.229.08:57:52.61#ibcon#*after write, iclass 30, count 0 2006.229.08:57:52.61#ibcon#*before return 0, iclass 30, count 0 2006.229.08:57:52.61#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:52.61#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.08:57:52.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.08:57:52.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.08:57:52.61$vck44/vb=6,4 2006.229.08:57:52.61#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.08:57:52.61#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.08:57:52.61#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:52.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:52.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:52.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:52.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.08:57:52.67#ibcon#first serial, iclass 32, count 2 2006.229.08:57:52.67#ibcon#enter sib2, iclass 32, count 2 2006.229.08:57:52.67#ibcon#flushed, iclass 32, count 2 2006.229.08:57:52.67#ibcon#about to write, iclass 32, count 2 2006.229.08:57:52.67#ibcon#wrote, iclass 32, count 2 2006.229.08:57:52.67#ibcon#about to read 3, iclass 32, count 2 2006.229.08:57:52.69#ibcon#read 3, iclass 32, count 2 2006.229.08:57:52.69#ibcon#about to read 4, iclass 32, count 2 2006.229.08:57:52.69#ibcon#read 4, iclass 32, count 2 2006.229.08:57:52.69#ibcon#about to read 5, iclass 32, count 2 2006.229.08:57:52.69#ibcon#read 5, iclass 32, count 2 2006.229.08:57:52.69#ibcon#about to read 6, iclass 32, count 2 2006.229.08:57:52.69#ibcon#read 6, iclass 32, count 2 2006.229.08:57:52.69#ibcon#end of sib2, iclass 32, count 2 2006.229.08:57:52.69#ibcon#*mode == 0, iclass 32, count 2 2006.229.08:57:52.69#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.08:57:52.69#ibcon#[27=AT06-04\r\n] 2006.229.08:57:52.69#ibcon#*before write, iclass 32, count 2 2006.229.08:57:52.69#ibcon#enter sib2, iclass 32, count 2 2006.229.08:57:52.69#ibcon#flushed, iclass 32, count 2 2006.229.08:57:52.69#ibcon#about to write, iclass 32, count 2 2006.229.08:57:52.69#ibcon#wrote, iclass 32, count 2 2006.229.08:57:52.69#ibcon#about to read 3, iclass 32, count 2 2006.229.08:57:52.72#ibcon#read 3, iclass 32, count 2 2006.229.08:57:52.72#ibcon#about to read 4, iclass 32, count 2 2006.229.08:57:52.72#ibcon#read 4, iclass 32, count 2 2006.229.08:57:52.72#ibcon#about to read 5, iclass 32, count 2 2006.229.08:57:52.72#ibcon#read 5, iclass 32, count 2 2006.229.08:57:52.72#ibcon#about to read 6, iclass 32, count 2 2006.229.08:57:52.72#ibcon#read 6, iclass 32, count 2 2006.229.08:57:52.72#ibcon#end of sib2, iclass 32, count 2 2006.229.08:57:52.72#ibcon#*after write, iclass 32, count 2 2006.229.08:57:52.72#ibcon#*before return 0, iclass 32, count 2 2006.229.08:57:52.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:52.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.08:57:52.72#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.08:57:52.72#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:52.72#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:52.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:52.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:52.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.08:57:52.84#ibcon#first serial, iclass 32, count 0 2006.229.08:57:52.84#ibcon#enter sib2, iclass 32, count 0 2006.229.08:57:52.84#ibcon#flushed, iclass 32, count 0 2006.229.08:57:52.84#ibcon#about to write, iclass 32, count 0 2006.229.08:57:52.84#ibcon#wrote, iclass 32, count 0 2006.229.08:57:52.84#ibcon#about to read 3, iclass 32, count 0 2006.229.08:57:52.86#ibcon#read 3, iclass 32, count 0 2006.229.08:57:52.86#ibcon#about to read 4, iclass 32, count 0 2006.229.08:57:52.86#ibcon#read 4, iclass 32, count 0 2006.229.08:57:52.86#ibcon#about to read 5, iclass 32, count 0 2006.229.08:57:52.86#ibcon#read 5, iclass 32, count 0 2006.229.08:57:52.86#ibcon#about to read 6, iclass 32, count 0 2006.229.08:57:52.86#ibcon#read 6, iclass 32, count 0 2006.229.08:57:52.86#ibcon#end of sib2, iclass 32, count 0 2006.229.08:57:52.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.08:57:52.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.08:57:52.86#ibcon#[27=USB\r\n] 2006.229.08:57:52.86#ibcon#*before write, iclass 32, count 0 2006.229.08:57:52.86#ibcon#enter sib2, iclass 32, count 0 2006.229.08:57:52.86#ibcon#flushed, iclass 32, count 0 2006.229.08:57:52.86#ibcon#about to write, iclass 32, count 0 2006.229.08:57:52.86#ibcon#wrote, iclass 32, count 0 2006.229.08:57:52.86#ibcon#about to read 3, iclass 32, count 0 2006.229.08:57:52.89#ibcon#read 3, iclass 32, count 0 2006.229.08:57:52.89#ibcon#about to read 4, iclass 32, count 0 2006.229.08:57:52.89#ibcon#read 4, iclass 32, count 0 2006.229.08:57:52.89#ibcon#about to read 5, iclass 32, count 0 2006.229.08:57:52.89#ibcon#read 5, iclass 32, count 0 2006.229.08:57:52.89#ibcon#about to read 6, iclass 32, count 0 2006.229.08:57:52.89#ibcon#read 6, iclass 32, count 0 2006.229.08:57:52.89#ibcon#end of sib2, iclass 32, count 0 2006.229.08:57:52.89#ibcon#*after write, iclass 32, count 0 2006.229.08:57:52.89#ibcon#*before return 0, iclass 32, count 0 2006.229.08:57:52.89#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:52.89#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.08:57:52.89#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.08:57:52.89#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.08:57:52.89$vck44/vblo=7,734.99 2006.229.08:57:52.89#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.08:57:52.89#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.08:57:52.89#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:52.89#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:52.89#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:52.89#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:52.89#ibcon#enter wrdev, iclass 34, count 0 2006.229.08:57:52.89#ibcon#first serial, iclass 34, count 0 2006.229.08:57:52.89#ibcon#enter sib2, iclass 34, count 0 2006.229.08:57:52.89#ibcon#flushed, iclass 34, count 0 2006.229.08:57:52.89#ibcon#about to write, iclass 34, count 0 2006.229.08:57:52.89#ibcon#wrote, iclass 34, count 0 2006.229.08:57:52.89#ibcon#about to read 3, iclass 34, count 0 2006.229.08:57:52.91#ibcon#read 3, iclass 34, count 0 2006.229.08:57:52.91#ibcon#about to read 4, iclass 34, count 0 2006.229.08:57:52.91#ibcon#read 4, iclass 34, count 0 2006.229.08:57:52.91#ibcon#about to read 5, iclass 34, count 0 2006.229.08:57:52.91#ibcon#read 5, iclass 34, count 0 2006.229.08:57:52.91#ibcon#about to read 6, iclass 34, count 0 2006.229.08:57:52.91#ibcon#read 6, iclass 34, count 0 2006.229.08:57:52.91#ibcon#end of sib2, iclass 34, count 0 2006.229.08:57:52.91#ibcon#*mode == 0, iclass 34, count 0 2006.229.08:57:52.91#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.08:57:52.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.08:57:52.91#ibcon#*before write, iclass 34, count 0 2006.229.08:57:52.91#ibcon#enter sib2, iclass 34, count 0 2006.229.08:57:52.91#ibcon#flushed, iclass 34, count 0 2006.229.08:57:52.91#ibcon#about to write, iclass 34, count 0 2006.229.08:57:52.91#ibcon#wrote, iclass 34, count 0 2006.229.08:57:52.91#ibcon#about to read 3, iclass 34, count 0 2006.229.08:57:52.95#ibcon#read 3, iclass 34, count 0 2006.229.08:57:52.95#ibcon#about to read 4, iclass 34, count 0 2006.229.08:57:52.95#ibcon#read 4, iclass 34, count 0 2006.229.08:57:52.95#ibcon#about to read 5, iclass 34, count 0 2006.229.08:57:52.95#ibcon#read 5, iclass 34, count 0 2006.229.08:57:52.95#ibcon#about to read 6, iclass 34, count 0 2006.229.08:57:52.95#ibcon#read 6, iclass 34, count 0 2006.229.08:57:52.95#ibcon#end of sib2, iclass 34, count 0 2006.229.08:57:52.95#ibcon#*after write, iclass 34, count 0 2006.229.08:57:52.95#ibcon#*before return 0, iclass 34, count 0 2006.229.08:57:52.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:52.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.08:57:52.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.08:57:52.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.08:57:52.95$vck44/vb=7,4 2006.229.08:57:52.95#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.08:57:52.95#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.08:57:52.95#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:52.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:53.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:53.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:53.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.08:57:53.01#ibcon#first serial, iclass 36, count 2 2006.229.08:57:53.01#ibcon#enter sib2, iclass 36, count 2 2006.229.08:57:53.01#ibcon#flushed, iclass 36, count 2 2006.229.08:57:53.01#ibcon#about to write, iclass 36, count 2 2006.229.08:57:53.01#ibcon#wrote, iclass 36, count 2 2006.229.08:57:53.01#ibcon#about to read 3, iclass 36, count 2 2006.229.08:57:53.03#ibcon#read 3, iclass 36, count 2 2006.229.08:57:53.03#ibcon#about to read 4, iclass 36, count 2 2006.229.08:57:53.03#ibcon#read 4, iclass 36, count 2 2006.229.08:57:53.03#ibcon#about to read 5, iclass 36, count 2 2006.229.08:57:53.03#ibcon#read 5, iclass 36, count 2 2006.229.08:57:53.03#ibcon#about to read 6, iclass 36, count 2 2006.229.08:57:53.03#ibcon#read 6, iclass 36, count 2 2006.229.08:57:53.03#ibcon#end of sib2, iclass 36, count 2 2006.229.08:57:53.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.08:57:53.03#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.08:57:53.03#ibcon#[27=AT07-04\r\n] 2006.229.08:57:53.03#ibcon#*before write, iclass 36, count 2 2006.229.08:57:53.03#ibcon#enter sib2, iclass 36, count 2 2006.229.08:57:53.03#ibcon#flushed, iclass 36, count 2 2006.229.08:57:53.03#ibcon#about to write, iclass 36, count 2 2006.229.08:57:53.03#ibcon#wrote, iclass 36, count 2 2006.229.08:57:53.03#ibcon#about to read 3, iclass 36, count 2 2006.229.08:57:53.06#ibcon#read 3, iclass 36, count 2 2006.229.08:57:53.06#ibcon#about to read 4, iclass 36, count 2 2006.229.08:57:53.06#ibcon#read 4, iclass 36, count 2 2006.229.08:57:53.06#ibcon#about to read 5, iclass 36, count 2 2006.229.08:57:53.06#ibcon#read 5, iclass 36, count 2 2006.229.08:57:53.06#ibcon#about to read 6, iclass 36, count 2 2006.229.08:57:53.06#ibcon#read 6, iclass 36, count 2 2006.229.08:57:53.06#ibcon#end of sib2, iclass 36, count 2 2006.229.08:57:53.06#ibcon#*after write, iclass 36, count 2 2006.229.08:57:53.06#ibcon#*before return 0, iclass 36, count 2 2006.229.08:57:53.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:53.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.08:57:53.06#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.08:57:53.06#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:53.06#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:53.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:53.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:53.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.08:57:53.18#ibcon#first serial, iclass 36, count 0 2006.229.08:57:53.18#ibcon#enter sib2, iclass 36, count 0 2006.229.08:57:53.18#ibcon#flushed, iclass 36, count 0 2006.229.08:57:53.18#ibcon#about to write, iclass 36, count 0 2006.229.08:57:53.18#ibcon#wrote, iclass 36, count 0 2006.229.08:57:53.18#ibcon#about to read 3, iclass 36, count 0 2006.229.08:57:53.20#ibcon#read 3, iclass 36, count 0 2006.229.08:57:53.20#ibcon#about to read 4, iclass 36, count 0 2006.229.08:57:53.20#ibcon#read 4, iclass 36, count 0 2006.229.08:57:53.20#ibcon#about to read 5, iclass 36, count 0 2006.229.08:57:53.20#ibcon#read 5, iclass 36, count 0 2006.229.08:57:53.20#ibcon#about to read 6, iclass 36, count 0 2006.229.08:57:53.20#ibcon#read 6, iclass 36, count 0 2006.229.08:57:53.20#ibcon#end of sib2, iclass 36, count 0 2006.229.08:57:53.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.08:57:53.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.08:57:53.20#ibcon#[27=USB\r\n] 2006.229.08:57:53.20#ibcon#*before write, iclass 36, count 0 2006.229.08:57:53.20#ibcon#enter sib2, iclass 36, count 0 2006.229.08:57:53.20#ibcon#flushed, iclass 36, count 0 2006.229.08:57:53.20#ibcon#about to write, iclass 36, count 0 2006.229.08:57:53.20#ibcon#wrote, iclass 36, count 0 2006.229.08:57:53.20#ibcon#about to read 3, iclass 36, count 0 2006.229.08:57:53.23#ibcon#read 3, iclass 36, count 0 2006.229.08:57:53.23#ibcon#about to read 4, iclass 36, count 0 2006.229.08:57:53.23#ibcon#read 4, iclass 36, count 0 2006.229.08:57:53.23#ibcon#about to read 5, iclass 36, count 0 2006.229.08:57:53.23#ibcon#read 5, iclass 36, count 0 2006.229.08:57:53.23#ibcon#about to read 6, iclass 36, count 0 2006.229.08:57:53.23#ibcon#read 6, iclass 36, count 0 2006.229.08:57:53.23#ibcon#end of sib2, iclass 36, count 0 2006.229.08:57:53.23#ibcon#*after write, iclass 36, count 0 2006.229.08:57:53.23#ibcon#*before return 0, iclass 36, count 0 2006.229.08:57:53.23#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:53.23#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.08:57:53.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.08:57:53.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.08:57:53.23$vck44/vblo=8,744.99 2006.229.08:57:53.23#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.08:57:53.23#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.08:57:53.23#ibcon#ireg 17 cls_cnt 0 2006.229.08:57:53.23#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:53.23#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:53.23#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:53.23#ibcon#enter wrdev, iclass 38, count 0 2006.229.08:57:53.23#ibcon#first serial, iclass 38, count 0 2006.229.08:57:53.23#ibcon#enter sib2, iclass 38, count 0 2006.229.08:57:53.23#ibcon#flushed, iclass 38, count 0 2006.229.08:57:53.23#ibcon#about to write, iclass 38, count 0 2006.229.08:57:53.23#ibcon#wrote, iclass 38, count 0 2006.229.08:57:53.23#ibcon#about to read 3, iclass 38, count 0 2006.229.08:57:53.25#ibcon#read 3, iclass 38, count 0 2006.229.08:57:53.25#ibcon#about to read 4, iclass 38, count 0 2006.229.08:57:53.25#ibcon#read 4, iclass 38, count 0 2006.229.08:57:53.25#ibcon#about to read 5, iclass 38, count 0 2006.229.08:57:53.25#ibcon#read 5, iclass 38, count 0 2006.229.08:57:53.25#ibcon#about to read 6, iclass 38, count 0 2006.229.08:57:53.25#ibcon#read 6, iclass 38, count 0 2006.229.08:57:53.25#ibcon#end of sib2, iclass 38, count 0 2006.229.08:57:53.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.08:57:53.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.08:57:53.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.08:57:53.25#ibcon#*before write, iclass 38, count 0 2006.229.08:57:53.25#ibcon#enter sib2, iclass 38, count 0 2006.229.08:57:53.25#ibcon#flushed, iclass 38, count 0 2006.229.08:57:53.25#ibcon#about to write, iclass 38, count 0 2006.229.08:57:53.25#ibcon#wrote, iclass 38, count 0 2006.229.08:57:53.25#ibcon#about to read 3, iclass 38, count 0 2006.229.08:57:53.29#ibcon#read 3, iclass 38, count 0 2006.229.08:57:53.29#ibcon#about to read 4, iclass 38, count 0 2006.229.08:57:53.29#ibcon#read 4, iclass 38, count 0 2006.229.08:57:53.29#ibcon#about to read 5, iclass 38, count 0 2006.229.08:57:53.29#ibcon#read 5, iclass 38, count 0 2006.229.08:57:53.29#ibcon#about to read 6, iclass 38, count 0 2006.229.08:57:53.29#ibcon#read 6, iclass 38, count 0 2006.229.08:57:53.29#ibcon#end of sib2, iclass 38, count 0 2006.229.08:57:53.29#ibcon#*after write, iclass 38, count 0 2006.229.08:57:53.29#ibcon#*before return 0, iclass 38, count 0 2006.229.08:57:53.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:53.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.08:57:53.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.08:57:53.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.08:57:53.29$vck44/vb=8,4 2006.229.08:57:53.29#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.08:57:53.29#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.08:57:53.29#ibcon#ireg 11 cls_cnt 2 2006.229.08:57:53.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:53.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:53.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:53.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.08:57:53.35#ibcon#first serial, iclass 40, count 2 2006.229.08:57:53.35#ibcon#enter sib2, iclass 40, count 2 2006.229.08:57:53.35#ibcon#flushed, iclass 40, count 2 2006.229.08:57:53.35#ibcon#about to write, iclass 40, count 2 2006.229.08:57:53.35#ibcon#wrote, iclass 40, count 2 2006.229.08:57:53.35#ibcon#about to read 3, iclass 40, count 2 2006.229.08:57:53.37#ibcon#read 3, iclass 40, count 2 2006.229.08:57:53.37#ibcon#about to read 4, iclass 40, count 2 2006.229.08:57:53.37#ibcon#read 4, iclass 40, count 2 2006.229.08:57:53.37#ibcon#about to read 5, iclass 40, count 2 2006.229.08:57:53.37#ibcon#read 5, iclass 40, count 2 2006.229.08:57:53.37#ibcon#about to read 6, iclass 40, count 2 2006.229.08:57:53.37#ibcon#read 6, iclass 40, count 2 2006.229.08:57:53.37#ibcon#end of sib2, iclass 40, count 2 2006.229.08:57:53.37#ibcon#*mode == 0, iclass 40, count 2 2006.229.08:57:53.37#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.08:57:53.37#ibcon#[27=AT08-04\r\n] 2006.229.08:57:53.37#ibcon#*before write, iclass 40, count 2 2006.229.08:57:53.37#ibcon#enter sib2, iclass 40, count 2 2006.229.08:57:53.37#ibcon#flushed, iclass 40, count 2 2006.229.08:57:53.37#ibcon#about to write, iclass 40, count 2 2006.229.08:57:53.37#ibcon#wrote, iclass 40, count 2 2006.229.08:57:53.37#ibcon#about to read 3, iclass 40, count 2 2006.229.08:57:53.40#ibcon#read 3, iclass 40, count 2 2006.229.08:57:53.40#ibcon#about to read 4, iclass 40, count 2 2006.229.08:57:53.40#ibcon#read 4, iclass 40, count 2 2006.229.08:57:53.40#ibcon#about to read 5, iclass 40, count 2 2006.229.08:57:53.40#ibcon#read 5, iclass 40, count 2 2006.229.08:57:53.40#ibcon#about to read 6, iclass 40, count 2 2006.229.08:57:53.40#ibcon#read 6, iclass 40, count 2 2006.229.08:57:53.40#ibcon#end of sib2, iclass 40, count 2 2006.229.08:57:53.40#ibcon#*after write, iclass 40, count 2 2006.229.08:57:53.40#ibcon#*before return 0, iclass 40, count 2 2006.229.08:57:53.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:53.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.08:57:53.40#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.08:57:53.40#ibcon#ireg 7 cls_cnt 0 2006.229.08:57:53.40#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:53.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:53.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:53.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.08:57:53.52#ibcon#first serial, iclass 40, count 0 2006.229.08:57:53.52#ibcon#enter sib2, iclass 40, count 0 2006.229.08:57:53.52#ibcon#flushed, iclass 40, count 0 2006.229.08:57:53.52#ibcon#about to write, iclass 40, count 0 2006.229.08:57:53.52#ibcon#wrote, iclass 40, count 0 2006.229.08:57:53.52#ibcon#about to read 3, iclass 40, count 0 2006.229.08:57:53.54#ibcon#read 3, iclass 40, count 0 2006.229.08:57:53.54#ibcon#about to read 4, iclass 40, count 0 2006.229.08:57:53.54#ibcon#read 4, iclass 40, count 0 2006.229.08:57:53.54#ibcon#about to read 5, iclass 40, count 0 2006.229.08:57:53.54#ibcon#read 5, iclass 40, count 0 2006.229.08:57:53.54#ibcon#about to read 6, iclass 40, count 0 2006.229.08:57:53.54#ibcon#read 6, iclass 40, count 0 2006.229.08:57:53.54#ibcon#end of sib2, iclass 40, count 0 2006.229.08:57:53.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.08:57:53.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.08:57:53.54#ibcon#[27=USB\r\n] 2006.229.08:57:53.54#ibcon#*before write, iclass 40, count 0 2006.229.08:57:53.54#ibcon#enter sib2, iclass 40, count 0 2006.229.08:57:53.54#ibcon#flushed, iclass 40, count 0 2006.229.08:57:53.54#ibcon#about to write, iclass 40, count 0 2006.229.08:57:53.54#ibcon#wrote, iclass 40, count 0 2006.229.08:57:53.54#ibcon#about to read 3, iclass 40, count 0 2006.229.08:57:53.57#ibcon#read 3, iclass 40, count 0 2006.229.08:57:53.57#ibcon#about to read 4, iclass 40, count 0 2006.229.08:57:53.57#ibcon#read 4, iclass 40, count 0 2006.229.08:57:53.57#ibcon#about to read 5, iclass 40, count 0 2006.229.08:57:53.57#ibcon#read 5, iclass 40, count 0 2006.229.08:57:53.57#ibcon#about to read 6, iclass 40, count 0 2006.229.08:57:53.57#ibcon#read 6, iclass 40, count 0 2006.229.08:57:53.57#ibcon#end of sib2, iclass 40, count 0 2006.229.08:57:53.57#ibcon#*after write, iclass 40, count 0 2006.229.08:57:53.57#ibcon#*before return 0, iclass 40, count 0 2006.229.08:57:53.57#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:53.57#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.08:57:53.57#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.08:57:53.57#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.08:57:53.57$vck44/vabw=wide 2006.229.08:57:53.57#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.08:57:53.57#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.08:57:53.57#ibcon#ireg 8 cls_cnt 0 2006.229.08:57:53.57#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:53.57#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:53.57#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:53.57#ibcon#enter wrdev, iclass 4, count 0 2006.229.08:57:53.57#ibcon#first serial, iclass 4, count 0 2006.229.08:57:53.57#ibcon#enter sib2, iclass 4, count 0 2006.229.08:57:53.57#ibcon#flushed, iclass 4, count 0 2006.229.08:57:53.57#ibcon#about to write, iclass 4, count 0 2006.229.08:57:53.57#ibcon#wrote, iclass 4, count 0 2006.229.08:57:53.57#ibcon#about to read 3, iclass 4, count 0 2006.229.08:57:53.59#ibcon#read 3, iclass 4, count 0 2006.229.08:57:53.59#ibcon#about to read 4, iclass 4, count 0 2006.229.08:57:53.59#ibcon#read 4, iclass 4, count 0 2006.229.08:57:53.59#ibcon#about to read 5, iclass 4, count 0 2006.229.08:57:53.59#ibcon#read 5, iclass 4, count 0 2006.229.08:57:53.59#ibcon#about to read 6, iclass 4, count 0 2006.229.08:57:53.59#ibcon#read 6, iclass 4, count 0 2006.229.08:57:53.59#ibcon#end of sib2, iclass 4, count 0 2006.229.08:57:53.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.08:57:53.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.08:57:53.59#ibcon#[25=BW32\r\n] 2006.229.08:57:53.59#ibcon#*before write, iclass 4, count 0 2006.229.08:57:53.59#ibcon#enter sib2, iclass 4, count 0 2006.229.08:57:53.59#ibcon#flushed, iclass 4, count 0 2006.229.08:57:53.59#ibcon#about to write, iclass 4, count 0 2006.229.08:57:53.59#ibcon#wrote, iclass 4, count 0 2006.229.08:57:53.59#ibcon#about to read 3, iclass 4, count 0 2006.229.08:57:53.62#ibcon#read 3, iclass 4, count 0 2006.229.08:57:53.62#ibcon#about to read 4, iclass 4, count 0 2006.229.08:57:53.62#ibcon#read 4, iclass 4, count 0 2006.229.08:57:53.62#ibcon#about to read 5, iclass 4, count 0 2006.229.08:57:53.62#ibcon#read 5, iclass 4, count 0 2006.229.08:57:53.62#ibcon#about to read 6, iclass 4, count 0 2006.229.08:57:53.62#ibcon#read 6, iclass 4, count 0 2006.229.08:57:53.62#ibcon#end of sib2, iclass 4, count 0 2006.229.08:57:53.62#ibcon#*after write, iclass 4, count 0 2006.229.08:57:53.62#ibcon#*before return 0, iclass 4, count 0 2006.229.08:57:53.62#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:53.62#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.08:57:53.62#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.08:57:53.62#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.08:57:53.62$vck44/vbbw=wide 2006.229.08:57:53.62#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.08:57:53.62#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.08:57:53.62#ibcon#ireg 8 cls_cnt 0 2006.229.08:57:53.62#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:57:53.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:57:53.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:57:53.69#ibcon#enter wrdev, iclass 6, count 0 2006.229.08:57:53.69#ibcon#first serial, iclass 6, count 0 2006.229.08:57:53.69#ibcon#enter sib2, iclass 6, count 0 2006.229.08:57:53.69#ibcon#flushed, iclass 6, count 0 2006.229.08:57:53.69#ibcon#about to write, iclass 6, count 0 2006.229.08:57:53.69#ibcon#wrote, iclass 6, count 0 2006.229.08:57:53.69#ibcon#about to read 3, iclass 6, count 0 2006.229.08:57:53.71#ibcon#read 3, iclass 6, count 0 2006.229.08:57:53.71#ibcon#about to read 4, iclass 6, count 0 2006.229.08:57:53.71#ibcon#read 4, iclass 6, count 0 2006.229.08:57:53.71#ibcon#about to read 5, iclass 6, count 0 2006.229.08:57:53.71#ibcon#read 5, iclass 6, count 0 2006.229.08:57:53.71#ibcon#about to read 6, iclass 6, count 0 2006.229.08:57:53.71#ibcon#read 6, iclass 6, count 0 2006.229.08:57:53.71#ibcon#end of sib2, iclass 6, count 0 2006.229.08:57:53.71#ibcon#*mode == 0, iclass 6, count 0 2006.229.08:57:53.71#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.08:57:53.71#ibcon#[27=BW32\r\n] 2006.229.08:57:53.71#ibcon#*before write, iclass 6, count 0 2006.229.08:57:53.71#ibcon#enter sib2, iclass 6, count 0 2006.229.08:57:53.71#ibcon#flushed, iclass 6, count 0 2006.229.08:57:53.71#ibcon#about to write, iclass 6, count 0 2006.229.08:57:53.71#ibcon#wrote, iclass 6, count 0 2006.229.08:57:53.71#ibcon#about to read 3, iclass 6, count 0 2006.229.08:57:53.74#ibcon#read 3, iclass 6, count 0 2006.229.08:57:53.74#ibcon#about to read 4, iclass 6, count 0 2006.229.08:57:53.74#ibcon#read 4, iclass 6, count 0 2006.229.08:57:53.74#ibcon#about to read 5, iclass 6, count 0 2006.229.08:57:53.74#ibcon#read 5, iclass 6, count 0 2006.229.08:57:53.74#ibcon#about to read 6, iclass 6, count 0 2006.229.08:57:53.74#ibcon#read 6, iclass 6, count 0 2006.229.08:57:53.74#ibcon#end of sib2, iclass 6, count 0 2006.229.08:57:53.74#ibcon#*after write, iclass 6, count 0 2006.229.08:57:53.74#ibcon#*before return 0, iclass 6, count 0 2006.229.08:57:53.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:57:53.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.08:57:53.74#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.08:57:53.74#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.08:57:53.74$setupk4/ifdk4 2006.229.08:57:53.74$ifdk4/lo= 2006.229.08:57:53.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.08:57:53.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.08:57:53.74$ifdk4/patch= 2006.229.08:57:53.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.08:57:53.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.08:57:53.74$setupk4/!*+20s 2006.229.08:57:58.40#abcon#<5=/06 2.8 4.3 29.23 951000.5\r\n> 2006.229.08:57:58.42#abcon#{5=INTERFACE CLEAR} 2006.229.08:57:58.48#abcon#[5=S1D000X0/0*\r\n] 2006.229.08:58:01.13#trakl#Source acquired 2006.229.08:58:01.13#flagr#flagr/antenna,acquired 2006.229.08:58:08.25$setupk4/"tpicd 2006.229.08:58:08.25$setupk4/echo=off 2006.229.08:58:08.25$setupk4/xlog=off 2006.229.08:58:08.25:!2006.229.09:00:04 2006.229.09:00:04.00:preob 2006.229.09:00:05.14/onsource/TRACKING 2006.229.09:00:05.14:!2006.229.09:00:14 2006.229.09:00:14.00:"tape 2006.229.09:00:14.00:"st=record 2006.229.09:00:14.00:data_valid=on 2006.229.09:00:14.00:midob 2006.229.09:00:14.14/onsource/TRACKING 2006.229.09:00:14.14/wx/29.22,1000.5,95 2006.229.09:00:14.34/cable/+6.3996E-03 2006.229.09:00:15.43/va/01,08,usb,yes,36,39 2006.229.09:00:15.43/va/02,07,usb,yes,39,40 2006.229.09:00:15.43/va/03,06,usb,yes,48,51 2006.229.09:00:15.43/va/04,07,usb,yes,40,42 2006.229.09:00:15.43/va/05,04,usb,yes,36,37 2006.229.09:00:15.43/va/06,04,usb,yes,40,40 2006.229.09:00:15.43/va/07,05,usb,yes,36,37 2006.229.09:00:15.43/va/08,06,usb,yes,26,32 2006.229.09:00:15.66/valo/01,524.99,yes,locked 2006.229.09:00:15.66/valo/02,534.99,yes,locked 2006.229.09:00:15.66/valo/03,564.99,yes,locked 2006.229.09:00:15.66/valo/04,624.99,yes,locked 2006.229.09:00:15.66/valo/05,734.99,yes,locked 2006.229.09:00:15.66/valo/06,814.99,yes,locked 2006.229.09:00:15.66/valo/07,864.99,yes,locked 2006.229.09:00:15.66/valo/08,884.99,yes,locked 2006.229.09:00:16.75/vb/01,04,usb,yes,37,33 2006.229.09:00:16.75/vb/02,04,usb,yes,43,38 2006.229.09:00:16.75/vb/03,04,usb,yes,34,43 2006.229.09:00:16.75/vb/04,04,usb,yes,39,38 2006.229.09:00:16.75/vb/05,04,usb,yes,32,34 2006.229.09:00:16.75/vb/06,04,usb,yes,36,32 2006.229.09:00:16.75/vb/07,04,usb,yes,36,36 2006.229.09:00:16.75/vb/08,04,usb,yes,33,37 2006.229.09:00:16.99/vblo/01,629.99,yes,locked 2006.229.09:00:16.99/vblo/02,634.99,yes,locked 2006.229.09:00:16.99/vblo/03,649.99,yes,locked 2006.229.09:00:16.99/vblo/04,679.99,yes,locked 2006.229.09:00:16.99/vblo/05,709.99,yes,locked 2006.229.09:00:16.99/vblo/06,719.99,yes,locked 2006.229.09:00:16.99/vblo/07,734.99,yes,locked 2006.229.09:00:16.99/vblo/08,744.99,yes,locked 2006.229.09:00:17.14/vabw/8 2006.229.09:00:17.29/vbbw/8 2006.229.09:00:17.38/xfe/off,on,12.5 2006.229.09:00:17.75/ifatt/23,28,28,28 2006.229.09:00:18.07/fmout-gps/S +4.61E-07 2006.229.09:00:18.11:!2006.229.09:00:54 2006.229.09:00:54.00:data_valid=off 2006.229.09:00:54.00:"et 2006.229.09:00:54.00:!+3s 2006.229.09:00:57.01:"tape 2006.229.09:00:57.01:postob 2006.229.09:00:57.15/cable/+6.3979E-03 2006.229.09:00:57.15/wx/29.22,1000.5,95 2006.229.09:00:58.08/fmout-gps/S +4.61E-07 2006.229.09:00:58.08:scan_name=229-0905,jd0608,360 2006.229.09:00:58.08:source=1622-253,162546.89,-252738.3,2000.0,ccw 2006.229.09:00:59.14#flagr#flagr/antenna,new-source 2006.229.09:00:59.14:checkk5 2006.229.09:00:59.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:00:59.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:01:00.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:01:00.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:01:01.10/chk_obsdata//k5ts1/T2290900??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:01:01.51/chk_obsdata//k5ts2/T2290900??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:01:01.92/chk_obsdata//k5ts3/T2290900??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:01:02.32/chk_obsdata//k5ts4/T2290900??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:01:03.04/k5log//k5ts1_log_newline 2006.229.09:01:03.74/k5log//k5ts2_log_newline 2006.229.09:01:04.45/k5log//k5ts3_log_newline 2006.229.09:01:05.16/k5log//k5ts4_log_newline 2006.229.09:01:05.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:01:05.19:setupk4=1 2006.229.09:01:05.19$setupk4/echo=on 2006.229.09:01:05.19$setupk4/pcalon 2006.229.09:01:05.19$pcalon/"no phase cal control is implemented here 2006.229.09:01:05.19$setupk4/"tpicd=stop 2006.229.09:01:05.19$setupk4/"rec=synch_on 2006.229.09:01:05.19$setupk4/"rec_mode=128 2006.229.09:01:05.19$setupk4/!* 2006.229.09:01:05.19$setupk4/recpk4 2006.229.09:01:05.19$recpk4/recpatch= 2006.229.09:01:05.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:01:05.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:01:05.20$setupk4/vck44 2006.229.09:01:05.20$vck44/valo=1,524.99 2006.229.09:01:05.20#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.09:01:05.20#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.09:01:05.20#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:05.20#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:05.20#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:05.20#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:05.20#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:01:05.20#ibcon#first serial, iclass 17, count 0 2006.229.09:01:05.20#ibcon#enter sib2, iclass 17, count 0 2006.229.09:01:05.20#ibcon#flushed, iclass 17, count 0 2006.229.09:01:05.20#ibcon#about to write, iclass 17, count 0 2006.229.09:01:05.20#ibcon#wrote, iclass 17, count 0 2006.229.09:01:05.20#ibcon#about to read 3, iclass 17, count 0 2006.229.09:01:05.22#ibcon#read 3, iclass 17, count 0 2006.229.09:01:05.22#ibcon#about to read 4, iclass 17, count 0 2006.229.09:01:05.22#ibcon#read 4, iclass 17, count 0 2006.229.09:01:05.22#ibcon#about to read 5, iclass 17, count 0 2006.229.09:01:05.22#ibcon#read 5, iclass 17, count 0 2006.229.09:01:05.22#ibcon#about to read 6, iclass 17, count 0 2006.229.09:01:05.22#ibcon#read 6, iclass 17, count 0 2006.229.09:01:05.22#ibcon#end of sib2, iclass 17, count 0 2006.229.09:01:05.22#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:01:05.22#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:01:05.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:01:05.22#ibcon#*before write, iclass 17, count 0 2006.229.09:01:05.22#ibcon#enter sib2, iclass 17, count 0 2006.229.09:01:05.22#ibcon#flushed, iclass 17, count 0 2006.229.09:01:05.22#ibcon#about to write, iclass 17, count 0 2006.229.09:01:05.22#ibcon#wrote, iclass 17, count 0 2006.229.09:01:05.22#ibcon#about to read 3, iclass 17, count 0 2006.229.09:01:05.27#ibcon#read 3, iclass 17, count 0 2006.229.09:01:05.27#ibcon#about to read 4, iclass 17, count 0 2006.229.09:01:05.27#ibcon#read 4, iclass 17, count 0 2006.229.09:01:05.27#ibcon#about to read 5, iclass 17, count 0 2006.229.09:01:05.27#ibcon#read 5, iclass 17, count 0 2006.229.09:01:05.27#ibcon#about to read 6, iclass 17, count 0 2006.229.09:01:05.27#ibcon#read 6, iclass 17, count 0 2006.229.09:01:05.27#ibcon#end of sib2, iclass 17, count 0 2006.229.09:01:05.27#ibcon#*after write, iclass 17, count 0 2006.229.09:01:05.27#ibcon#*before return 0, iclass 17, count 0 2006.229.09:01:05.27#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:05.27#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:05.27#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:01:05.27#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:01:05.27$vck44/va=1,8 2006.229.09:01:05.27#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.09:01:05.27#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.09:01:05.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:05.27#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:05.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:05.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:05.27#ibcon#enter wrdev, iclass 19, count 2 2006.229.09:01:05.27#ibcon#first serial, iclass 19, count 2 2006.229.09:01:05.27#ibcon#enter sib2, iclass 19, count 2 2006.229.09:01:05.27#ibcon#flushed, iclass 19, count 2 2006.229.09:01:05.27#ibcon#about to write, iclass 19, count 2 2006.229.09:01:05.27#ibcon#wrote, iclass 19, count 2 2006.229.09:01:05.27#ibcon#about to read 3, iclass 19, count 2 2006.229.09:01:05.29#ibcon#read 3, iclass 19, count 2 2006.229.09:01:05.29#ibcon#about to read 4, iclass 19, count 2 2006.229.09:01:05.29#ibcon#read 4, iclass 19, count 2 2006.229.09:01:05.29#ibcon#about to read 5, iclass 19, count 2 2006.229.09:01:05.29#ibcon#read 5, iclass 19, count 2 2006.229.09:01:05.29#ibcon#about to read 6, iclass 19, count 2 2006.229.09:01:05.29#ibcon#read 6, iclass 19, count 2 2006.229.09:01:05.29#ibcon#end of sib2, iclass 19, count 2 2006.229.09:01:05.29#ibcon#*mode == 0, iclass 19, count 2 2006.229.09:01:05.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.09:01:05.29#ibcon#[25=AT01-08\r\n] 2006.229.09:01:05.29#ibcon#*before write, iclass 19, count 2 2006.229.09:01:05.29#ibcon#enter sib2, iclass 19, count 2 2006.229.09:01:05.29#ibcon#flushed, iclass 19, count 2 2006.229.09:01:05.29#ibcon#about to write, iclass 19, count 2 2006.229.09:01:05.29#ibcon#wrote, iclass 19, count 2 2006.229.09:01:05.29#ibcon#about to read 3, iclass 19, count 2 2006.229.09:01:05.32#ibcon#read 3, iclass 19, count 2 2006.229.09:01:05.32#ibcon#about to read 4, iclass 19, count 2 2006.229.09:01:05.32#ibcon#read 4, iclass 19, count 2 2006.229.09:01:05.32#ibcon#about to read 5, iclass 19, count 2 2006.229.09:01:05.32#ibcon#read 5, iclass 19, count 2 2006.229.09:01:05.32#ibcon#about to read 6, iclass 19, count 2 2006.229.09:01:05.32#ibcon#read 6, iclass 19, count 2 2006.229.09:01:05.32#ibcon#end of sib2, iclass 19, count 2 2006.229.09:01:05.32#ibcon#*after write, iclass 19, count 2 2006.229.09:01:05.32#ibcon#*before return 0, iclass 19, count 2 2006.229.09:01:05.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:05.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:05.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.09:01:05.32#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:05.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:05.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:05.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:05.44#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:01:05.44#ibcon#first serial, iclass 19, count 0 2006.229.09:01:05.44#ibcon#enter sib2, iclass 19, count 0 2006.229.09:01:05.44#ibcon#flushed, iclass 19, count 0 2006.229.09:01:05.44#ibcon#about to write, iclass 19, count 0 2006.229.09:01:05.44#ibcon#wrote, iclass 19, count 0 2006.229.09:01:05.44#ibcon#about to read 3, iclass 19, count 0 2006.229.09:01:05.46#ibcon#read 3, iclass 19, count 0 2006.229.09:01:05.46#ibcon#about to read 4, iclass 19, count 0 2006.229.09:01:05.46#ibcon#read 4, iclass 19, count 0 2006.229.09:01:05.46#ibcon#about to read 5, iclass 19, count 0 2006.229.09:01:05.46#ibcon#read 5, iclass 19, count 0 2006.229.09:01:05.46#ibcon#about to read 6, iclass 19, count 0 2006.229.09:01:05.46#ibcon#read 6, iclass 19, count 0 2006.229.09:01:05.46#ibcon#end of sib2, iclass 19, count 0 2006.229.09:01:05.46#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:01:05.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:01:05.46#ibcon#[25=USB\r\n] 2006.229.09:01:05.46#ibcon#*before write, iclass 19, count 0 2006.229.09:01:05.46#ibcon#enter sib2, iclass 19, count 0 2006.229.09:01:05.46#ibcon#flushed, iclass 19, count 0 2006.229.09:01:05.46#ibcon#about to write, iclass 19, count 0 2006.229.09:01:05.46#ibcon#wrote, iclass 19, count 0 2006.229.09:01:05.46#ibcon#about to read 3, iclass 19, count 0 2006.229.09:01:05.49#ibcon#read 3, iclass 19, count 0 2006.229.09:01:05.49#ibcon#about to read 4, iclass 19, count 0 2006.229.09:01:05.49#ibcon#read 4, iclass 19, count 0 2006.229.09:01:05.49#ibcon#about to read 5, iclass 19, count 0 2006.229.09:01:05.49#ibcon#read 5, iclass 19, count 0 2006.229.09:01:05.49#ibcon#about to read 6, iclass 19, count 0 2006.229.09:01:05.49#ibcon#read 6, iclass 19, count 0 2006.229.09:01:05.49#ibcon#end of sib2, iclass 19, count 0 2006.229.09:01:05.49#ibcon#*after write, iclass 19, count 0 2006.229.09:01:05.49#ibcon#*before return 0, iclass 19, count 0 2006.229.09:01:05.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:05.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:05.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:01:05.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:01:05.49$vck44/valo=2,534.99 2006.229.09:01:05.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.09:01:05.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.09:01:05.49#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:05.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:05.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:05.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:05.49#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:01:05.49#ibcon#first serial, iclass 21, count 0 2006.229.09:01:05.49#ibcon#enter sib2, iclass 21, count 0 2006.229.09:01:05.49#ibcon#flushed, iclass 21, count 0 2006.229.09:01:05.49#ibcon#about to write, iclass 21, count 0 2006.229.09:01:05.49#ibcon#wrote, iclass 21, count 0 2006.229.09:01:05.49#ibcon#about to read 3, iclass 21, count 0 2006.229.09:01:05.51#ibcon#read 3, iclass 21, count 0 2006.229.09:01:05.51#ibcon#about to read 4, iclass 21, count 0 2006.229.09:01:05.51#ibcon#read 4, iclass 21, count 0 2006.229.09:01:05.51#ibcon#about to read 5, iclass 21, count 0 2006.229.09:01:05.51#ibcon#read 5, iclass 21, count 0 2006.229.09:01:05.51#ibcon#about to read 6, iclass 21, count 0 2006.229.09:01:05.51#ibcon#read 6, iclass 21, count 0 2006.229.09:01:05.51#ibcon#end of sib2, iclass 21, count 0 2006.229.09:01:05.51#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:01:05.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:01:05.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:01:05.51#ibcon#*before write, iclass 21, count 0 2006.229.09:01:05.51#ibcon#enter sib2, iclass 21, count 0 2006.229.09:01:05.51#ibcon#flushed, iclass 21, count 0 2006.229.09:01:05.51#ibcon#about to write, iclass 21, count 0 2006.229.09:01:05.51#ibcon#wrote, iclass 21, count 0 2006.229.09:01:05.51#ibcon#about to read 3, iclass 21, count 0 2006.229.09:01:05.55#ibcon#read 3, iclass 21, count 0 2006.229.09:01:05.55#ibcon#about to read 4, iclass 21, count 0 2006.229.09:01:05.55#ibcon#read 4, iclass 21, count 0 2006.229.09:01:05.55#ibcon#about to read 5, iclass 21, count 0 2006.229.09:01:05.55#ibcon#read 5, iclass 21, count 0 2006.229.09:01:05.55#ibcon#about to read 6, iclass 21, count 0 2006.229.09:01:05.55#ibcon#read 6, iclass 21, count 0 2006.229.09:01:05.55#ibcon#end of sib2, iclass 21, count 0 2006.229.09:01:05.55#ibcon#*after write, iclass 21, count 0 2006.229.09:01:05.55#ibcon#*before return 0, iclass 21, count 0 2006.229.09:01:05.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:05.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:05.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:01:05.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:01:05.55$vck44/va=2,7 2006.229.09:01:05.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.09:01:05.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.09:01:05.55#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:05.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:05.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:05.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:05.61#ibcon#enter wrdev, iclass 23, count 2 2006.229.09:01:05.61#ibcon#first serial, iclass 23, count 2 2006.229.09:01:05.61#ibcon#enter sib2, iclass 23, count 2 2006.229.09:01:05.61#ibcon#flushed, iclass 23, count 2 2006.229.09:01:05.61#ibcon#about to write, iclass 23, count 2 2006.229.09:01:05.61#ibcon#wrote, iclass 23, count 2 2006.229.09:01:05.61#ibcon#about to read 3, iclass 23, count 2 2006.229.09:01:05.63#ibcon#read 3, iclass 23, count 2 2006.229.09:01:05.63#ibcon#about to read 4, iclass 23, count 2 2006.229.09:01:05.63#ibcon#read 4, iclass 23, count 2 2006.229.09:01:05.63#ibcon#about to read 5, iclass 23, count 2 2006.229.09:01:05.63#ibcon#read 5, iclass 23, count 2 2006.229.09:01:05.63#ibcon#about to read 6, iclass 23, count 2 2006.229.09:01:05.63#ibcon#read 6, iclass 23, count 2 2006.229.09:01:05.63#ibcon#end of sib2, iclass 23, count 2 2006.229.09:01:05.63#ibcon#*mode == 0, iclass 23, count 2 2006.229.09:01:05.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.09:01:05.63#ibcon#[25=AT02-07\r\n] 2006.229.09:01:05.63#ibcon#*before write, iclass 23, count 2 2006.229.09:01:05.63#ibcon#enter sib2, iclass 23, count 2 2006.229.09:01:05.63#ibcon#flushed, iclass 23, count 2 2006.229.09:01:05.63#ibcon#about to write, iclass 23, count 2 2006.229.09:01:05.63#ibcon#wrote, iclass 23, count 2 2006.229.09:01:05.63#ibcon#about to read 3, iclass 23, count 2 2006.229.09:01:05.66#ibcon#read 3, iclass 23, count 2 2006.229.09:01:05.66#ibcon#about to read 4, iclass 23, count 2 2006.229.09:01:05.66#ibcon#read 4, iclass 23, count 2 2006.229.09:01:05.66#ibcon#about to read 5, iclass 23, count 2 2006.229.09:01:05.66#ibcon#read 5, iclass 23, count 2 2006.229.09:01:05.66#ibcon#about to read 6, iclass 23, count 2 2006.229.09:01:05.66#ibcon#read 6, iclass 23, count 2 2006.229.09:01:05.66#ibcon#end of sib2, iclass 23, count 2 2006.229.09:01:05.66#ibcon#*after write, iclass 23, count 2 2006.229.09:01:05.66#ibcon#*before return 0, iclass 23, count 2 2006.229.09:01:05.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:05.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:05.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.09:01:05.66#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:05.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:05.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:05.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:05.78#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:01:05.78#ibcon#first serial, iclass 23, count 0 2006.229.09:01:05.78#ibcon#enter sib2, iclass 23, count 0 2006.229.09:01:05.78#ibcon#flushed, iclass 23, count 0 2006.229.09:01:05.78#ibcon#about to write, iclass 23, count 0 2006.229.09:01:05.78#ibcon#wrote, iclass 23, count 0 2006.229.09:01:05.78#ibcon#about to read 3, iclass 23, count 0 2006.229.09:01:05.80#ibcon#read 3, iclass 23, count 0 2006.229.09:01:05.80#ibcon#about to read 4, iclass 23, count 0 2006.229.09:01:05.80#ibcon#read 4, iclass 23, count 0 2006.229.09:01:05.80#ibcon#about to read 5, iclass 23, count 0 2006.229.09:01:05.80#ibcon#read 5, iclass 23, count 0 2006.229.09:01:05.80#ibcon#about to read 6, iclass 23, count 0 2006.229.09:01:05.80#ibcon#read 6, iclass 23, count 0 2006.229.09:01:05.80#ibcon#end of sib2, iclass 23, count 0 2006.229.09:01:05.80#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:01:05.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:01:05.80#ibcon#[25=USB\r\n] 2006.229.09:01:05.80#ibcon#*before write, iclass 23, count 0 2006.229.09:01:05.80#ibcon#enter sib2, iclass 23, count 0 2006.229.09:01:05.80#ibcon#flushed, iclass 23, count 0 2006.229.09:01:05.80#ibcon#about to write, iclass 23, count 0 2006.229.09:01:05.80#ibcon#wrote, iclass 23, count 0 2006.229.09:01:05.80#ibcon#about to read 3, iclass 23, count 0 2006.229.09:01:05.83#ibcon#read 3, iclass 23, count 0 2006.229.09:01:05.83#ibcon#about to read 4, iclass 23, count 0 2006.229.09:01:05.83#ibcon#read 4, iclass 23, count 0 2006.229.09:01:05.83#ibcon#about to read 5, iclass 23, count 0 2006.229.09:01:05.83#ibcon#read 5, iclass 23, count 0 2006.229.09:01:05.83#ibcon#about to read 6, iclass 23, count 0 2006.229.09:01:05.83#ibcon#read 6, iclass 23, count 0 2006.229.09:01:05.83#ibcon#end of sib2, iclass 23, count 0 2006.229.09:01:05.83#ibcon#*after write, iclass 23, count 0 2006.229.09:01:05.83#ibcon#*before return 0, iclass 23, count 0 2006.229.09:01:05.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:05.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:05.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:01:05.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:01:05.83$vck44/valo=3,564.99 2006.229.09:01:05.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:01:05.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:01:05.83#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:05.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:05.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:05.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:05.83#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:01:05.83#ibcon#first serial, iclass 25, count 0 2006.229.09:01:05.83#ibcon#enter sib2, iclass 25, count 0 2006.229.09:01:05.83#ibcon#flushed, iclass 25, count 0 2006.229.09:01:05.83#ibcon#about to write, iclass 25, count 0 2006.229.09:01:05.83#ibcon#wrote, iclass 25, count 0 2006.229.09:01:05.83#ibcon#about to read 3, iclass 25, count 0 2006.229.09:01:05.85#ibcon#read 3, iclass 25, count 0 2006.229.09:01:05.85#ibcon#about to read 4, iclass 25, count 0 2006.229.09:01:05.85#ibcon#read 4, iclass 25, count 0 2006.229.09:01:05.85#ibcon#about to read 5, iclass 25, count 0 2006.229.09:01:05.85#ibcon#read 5, iclass 25, count 0 2006.229.09:01:05.85#ibcon#about to read 6, iclass 25, count 0 2006.229.09:01:05.85#ibcon#read 6, iclass 25, count 0 2006.229.09:01:05.85#ibcon#end of sib2, iclass 25, count 0 2006.229.09:01:05.85#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:01:05.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:01:05.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:01:05.85#ibcon#*before write, iclass 25, count 0 2006.229.09:01:05.85#ibcon#enter sib2, iclass 25, count 0 2006.229.09:01:05.85#ibcon#flushed, iclass 25, count 0 2006.229.09:01:05.85#ibcon#about to write, iclass 25, count 0 2006.229.09:01:05.85#ibcon#wrote, iclass 25, count 0 2006.229.09:01:05.85#ibcon#about to read 3, iclass 25, count 0 2006.229.09:01:05.89#ibcon#read 3, iclass 25, count 0 2006.229.09:01:05.89#ibcon#about to read 4, iclass 25, count 0 2006.229.09:01:05.89#ibcon#read 4, iclass 25, count 0 2006.229.09:01:05.89#ibcon#about to read 5, iclass 25, count 0 2006.229.09:01:05.89#ibcon#read 5, iclass 25, count 0 2006.229.09:01:05.89#ibcon#about to read 6, iclass 25, count 0 2006.229.09:01:05.89#ibcon#read 6, iclass 25, count 0 2006.229.09:01:05.89#ibcon#end of sib2, iclass 25, count 0 2006.229.09:01:05.89#ibcon#*after write, iclass 25, count 0 2006.229.09:01:05.89#ibcon#*before return 0, iclass 25, count 0 2006.229.09:01:05.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:05.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:05.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:01:05.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:01:05.89$vck44/va=3,6 2006.229.09:01:05.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.09:01:05.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.09:01:05.89#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:05.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:05.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:05.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:05.95#ibcon#enter wrdev, iclass 27, count 2 2006.229.09:01:05.95#ibcon#first serial, iclass 27, count 2 2006.229.09:01:05.95#ibcon#enter sib2, iclass 27, count 2 2006.229.09:01:05.95#ibcon#flushed, iclass 27, count 2 2006.229.09:01:05.95#ibcon#about to write, iclass 27, count 2 2006.229.09:01:05.95#ibcon#wrote, iclass 27, count 2 2006.229.09:01:05.95#ibcon#about to read 3, iclass 27, count 2 2006.229.09:01:05.97#ibcon#read 3, iclass 27, count 2 2006.229.09:01:05.97#ibcon#about to read 4, iclass 27, count 2 2006.229.09:01:05.97#ibcon#read 4, iclass 27, count 2 2006.229.09:01:05.97#ibcon#about to read 5, iclass 27, count 2 2006.229.09:01:05.97#ibcon#read 5, iclass 27, count 2 2006.229.09:01:05.97#ibcon#about to read 6, iclass 27, count 2 2006.229.09:01:05.97#ibcon#read 6, iclass 27, count 2 2006.229.09:01:05.97#ibcon#end of sib2, iclass 27, count 2 2006.229.09:01:05.97#ibcon#*mode == 0, iclass 27, count 2 2006.229.09:01:05.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.09:01:05.97#ibcon#[25=AT03-06\r\n] 2006.229.09:01:05.97#ibcon#*before write, iclass 27, count 2 2006.229.09:01:05.97#ibcon#enter sib2, iclass 27, count 2 2006.229.09:01:05.97#ibcon#flushed, iclass 27, count 2 2006.229.09:01:05.97#ibcon#about to write, iclass 27, count 2 2006.229.09:01:05.97#ibcon#wrote, iclass 27, count 2 2006.229.09:01:05.97#ibcon#about to read 3, iclass 27, count 2 2006.229.09:01:06.00#ibcon#read 3, iclass 27, count 2 2006.229.09:01:06.00#ibcon#about to read 4, iclass 27, count 2 2006.229.09:01:06.00#ibcon#read 4, iclass 27, count 2 2006.229.09:01:06.00#ibcon#about to read 5, iclass 27, count 2 2006.229.09:01:06.00#ibcon#read 5, iclass 27, count 2 2006.229.09:01:06.00#ibcon#about to read 6, iclass 27, count 2 2006.229.09:01:06.00#ibcon#read 6, iclass 27, count 2 2006.229.09:01:06.00#ibcon#end of sib2, iclass 27, count 2 2006.229.09:01:06.00#ibcon#*after write, iclass 27, count 2 2006.229.09:01:06.00#ibcon#*before return 0, iclass 27, count 2 2006.229.09:01:06.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:06.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:06.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.09:01:06.00#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:06.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:06.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:06.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:06.12#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:01:06.12#ibcon#first serial, iclass 27, count 0 2006.229.09:01:06.12#ibcon#enter sib2, iclass 27, count 0 2006.229.09:01:06.12#ibcon#flushed, iclass 27, count 0 2006.229.09:01:06.12#ibcon#about to write, iclass 27, count 0 2006.229.09:01:06.12#ibcon#wrote, iclass 27, count 0 2006.229.09:01:06.12#ibcon#about to read 3, iclass 27, count 0 2006.229.09:01:06.14#ibcon#read 3, iclass 27, count 0 2006.229.09:01:06.14#ibcon#about to read 4, iclass 27, count 0 2006.229.09:01:06.14#ibcon#read 4, iclass 27, count 0 2006.229.09:01:06.14#ibcon#about to read 5, iclass 27, count 0 2006.229.09:01:06.14#ibcon#read 5, iclass 27, count 0 2006.229.09:01:06.14#ibcon#about to read 6, iclass 27, count 0 2006.229.09:01:06.14#ibcon#read 6, iclass 27, count 0 2006.229.09:01:06.14#ibcon#end of sib2, iclass 27, count 0 2006.229.09:01:06.14#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:01:06.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:01:06.14#ibcon#[25=USB\r\n] 2006.229.09:01:06.14#ibcon#*before write, iclass 27, count 0 2006.229.09:01:06.14#ibcon#enter sib2, iclass 27, count 0 2006.229.09:01:06.14#ibcon#flushed, iclass 27, count 0 2006.229.09:01:06.14#ibcon#about to write, iclass 27, count 0 2006.229.09:01:06.14#ibcon#wrote, iclass 27, count 0 2006.229.09:01:06.14#ibcon#about to read 3, iclass 27, count 0 2006.229.09:01:06.17#ibcon#read 3, iclass 27, count 0 2006.229.09:01:06.17#ibcon#about to read 4, iclass 27, count 0 2006.229.09:01:06.17#ibcon#read 4, iclass 27, count 0 2006.229.09:01:06.17#ibcon#about to read 5, iclass 27, count 0 2006.229.09:01:06.17#ibcon#read 5, iclass 27, count 0 2006.229.09:01:06.17#ibcon#about to read 6, iclass 27, count 0 2006.229.09:01:06.17#ibcon#read 6, iclass 27, count 0 2006.229.09:01:06.17#ibcon#end of sib2, iclass 27, count 0 2006.229.09:01:06.17#ibcon#*after write, iclass 27, count 0 2006.229.09:01:06.17#ibcon#*before return 0, iclass 27, count 0 2006.229.09:01:06.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:06.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:06.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:01:06.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:01:06.17$vck44/valo=4,624.99 2006.229.09:01:06.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.09:01:06.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.09:01:06.17#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:06.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:06.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:06.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:06.17#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:01:06.17#ibcon#first serial, iclass 29, count 0 2006.229.09:01:06.17#ibcon#enter sib2, iclass 29, count 0 2006.229.09:01:06.17#ibcon#flushed, iclass 29, count 0 2006.229.09:01:06.17#ibcon#about to write, iclass 29, count 0 2006.229.09:01:06.17#ibcon#wrote, iclass 29, count 0 2006.229.09:01:06.17#ibcon#about to read 3, iclass 29, count 0 2006.229.09:01:06.19#ibcon#read 3, iclass 29, count 0 2006.229.09:01:06.19#ibcon#about to read 4, iclass 29, count 0 2006.229.09:01:06.19#ibcon#read 4, iclass 29, count 0 2006.229.09:01:06.19#ibcon#about to read 5, iclass 29, count 0 2006.229.09:01:06.19#ibcon#read 5, iclass 29, count 0 2006.229.09:01:06.19#ibcon#about to read 6, iclass 29, count 0 2006.229.09:01:06.19#ibcon#read 6, iclass 29, count 0 2006.229.09:01:06.19#ibcon#end of sib2, iclass 29, count 0 2006.229.09:01:06.19#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:01:06.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:01:06.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:01:06.19#ibcon#*before write, iclass 29, count 0 2006.229.09:01:06.19#ibcon#enter sib2, iclass 29, count 0 2006.229.09:01:06.19#ibcon#flushed, iclass 29, count 0 2006.229.09:01:06.19#ibcon#about to write, iclass 29, count 0 2006.229.09:01:06.19#ibcon#wrote, iclass 29, count 0 2006.229.09:01:06.19#ibcon#about to read 3, iclass 29, count 0 2006.229.09:01:06.23#ibcon#read 3, iclass 29, count 0 2006.229.09:01:06.23#ibcon#about to read 4, iclass 29, count 0 2006.229.09:01:06.23#ibcon#read 4, iclass 29, count 0 2006.229.09:01:06.23#ibcon#about to read 5, iclass 29, count 0 2006.229.09:01:06.23#ibcon#read 5, iclass 29, count 0 2006.229.09:01:06.23#ibcon#about to read 6, iclass 29, count 0 2006.229.09:01:06.23#ibcon#read 6, iclass 29, count 0 2006.229.09:01:06.23#ibcon#end of sib2, iclass 29, count 0 2006.229.09:01:06.23#ibcon#*after write, iclass 29, count 0 2006.229.09:01:06.23#ibcon#*before return 0, iclass 29, count 0 2006.229.09:01:06.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:06.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:06.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:01:06.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:01:06.23$vck44/va=4,7 2006.229.09:01:06.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.09:01:06.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.09:01:06.23#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:06.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:06.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:06.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:06.29#ibcon#enter wrdev, iclass 31, count 2 2006.229.09:01:06.29#ibcon#first serial, iclass 31, count 2 2006.229.09:01:06.29#ibcon#enter sib2, iclass 31, count 2 2006.229.09:01:06.29#ibcon#flushed, iclass 31, count 2 2006.229.09:01:06.29#ibcon#about to write, iclass 31, count 2 2006.229.09:01:06.29#ibcon#wrote, iclass 31, count 2 2006.229.09:01:06.29#ibcon#about to read 3, iclass 31, count 2 2006.229.09:01:06.31#ibcon#read 3, iclass 31, count 2 2006.229.09:01:06.31#ibcon#about to read 4, iclass 31, count 2 2006.229.09:01:06.31#ibcon#read 4, iclass 31, count 2 2006.229.09:01:06.31#ibcon#about to read 5, iclass 31, count 2 2006.229.09:01:06.31#ibcon#read 5, iclass 31, count 2 2006.229.09:01:06.31#ibcon#about to read 6, iclass 31, count 2 2006.229.09:01:06.31#ibcon#read 6, iclass 31, count 2 2006.229.09:01:06.31#ibcon#end of sib2, iclass 31, count 2 2006.229.09:01:06.31#ibcon#*mode == 0, iclass 31, count 2 2006.229.09:01:06.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.09:01:06.31#ibcon#[25=AT04-07\r\n] 2006.229.09:01:06.31#ibcon#*before write, iclass 31, count 2 2006.229.09:01:06.31#ibcon#enter sib2, iclass 31, count 2 2006.229.09:01:06.31#ibcon#flushed, iclass 31, count 2 2006.229.09:01:06.31#ibcon#about to write, iclass 31, count 2 2006.229.09:01:06.31#ibcon#wrote, iclass 31, count 2 2006.229.09:01:06.31#ibcon#about to read 3, iclass 31, count 2 2006.229.09:01:06.34#ibcon#read 3, iclass 31, count 2 2006.229.09:01:06.34#ibcon#about to read 4, iclass 31, count 2 2006.229.09:01:06.34#ibcon#read 4, iclass 31, count 2 2006.229.09:01:06.34#ibcon#about to read 5, iclass 31, count 2 2006.229.09:01:06.34#ibcon#read 5, iclass 31, count 2 2006.229.09:01:06.34#ibcon#about to read 6, iclass 31, count 2 2006.229.09:01:06.34#ibcon#read 6, iclass 31, count 2 2006.229.09:01:06.34#ibcon#end of sib2, iclass 31, count 2 2006.229.09:01:06.34#ibcon#*after write, iclass 31, count 2 2006.229.09:01:06.34#ibcon#*before return 0, iclass 31, count 2 2006.229.09:01:06.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:06.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:06.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.09:01:06.34#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:06.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:06.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:06.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:06.46#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:01:06.46#ibcon#first serial, iclass 31, count 0 2006.229.09:01:06.46#ibcon#enter sib2, iclass 31, count 0 2006.229.09:01:06.46#ibcon#flushed, iclass 31, count 0 2006.229.09:01:06.46#ibcon#about to write, iclass 31, count 0 2006.229.09:01:06.46#ibcon#wrote, iclass 31, count 0 2006.229.09:01:06.46#ibcon#about to read 3, iclass 31, count 0 2006.229.09:01:06.48#ibcon#read 3, iclass 31, count 0 2006.229.09:01:06.48#ibcon#about to read 4, iclass 31, count 0 2006.229.09:01:06.48#ibcon#read 4, iclass 31, count 0 2006.229.09:01:06.48#ibcon#about to read 5, iclass 31, count 0 2006.229.09:01:06.48#ibcon#read 5, iclass 31, count 0 2006.229.09:01:06.48#ibcon#about to read 6, iclass 31, count 0 2006.229.09:01:06.48#ibcon#read 6, iclass 31, count 0 2006.229.09:01:06.48#ibcon#end of sib2, iclass 31, count 0 2006.229.09:01:06.48#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:01:06.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:01:06.48#ibcon#[25=USB\r\n] 2006.229.09:01:06.48#ibcon#*before write, iclass 31, count 0 2006.229.09:01:06.48#ibcon#enter sib2, iclass 31, count 0 2006.229.09:01:06.48#ibcon#flushed, iclass 31, count 0 2006.229.09:01:06.48#ibcon#about to write, iclass 31, count 0 2006.229.09:01:06.48#ibcon#wrote, iclass 31, count 0 2006.229.09:01:06.48#ibcon#about to read 3, iclass 31, count 0 2006.229.09:01:06.51#ibcon#read 3, iclass 31, count 0 2006.229.09:01:06.51#ibcon#about to read 4, iclass 31, count 0 2006.229.09:01:06.51#ibcon#read 4, iclass 31, count 0 2006.229.09:01:06.51#ibcon#about to read 5, iclass 31, count 0 2006.229.09:01:06.51#ibcon#read 5, iclass 31, count 0 2006.229.09:01:06.51#ibcon#about to read 6, iclass 31, count 0 2006.229.09:01:06.51#ibcon#read 6, iclass 31, count 0 2006.229.09:01:06.51#ibcon#end of sib2, iclass 31, count 0 2006.229.09:01:06.51#ibcon#*after write, iclass 31, count 0 2006.229.09:01:06.51#ibcon#*before return 0, iclass 31, count 0 2006.229.09:01:06.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:06.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:06.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:01:06.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:01:06.51$vck44/valo=5,734.99 2006.229.09:01:06.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.09:01:06.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.09:01:06.51#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:06.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:06.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:06.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:06.51#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:01:06.51#ibcon#first serial, iclass 33, count 0 2006.229.09:01:06.51#ibcon#enter sib2, iclass 33, count 0 2006.229.09:01:06.51#ibcon#flushed, iclass 33, count 0 2006.229.09:01:06.51#ibcon#about to write, iclass 33, count 0 2006.229.09:01:06.51#ibcon#wrote, iclass 33, count 0 2006.229.09:01:06.51#ibcon#about to read 3, iclass 33, count 0 2006.229.09:01:06.53#ibcon#read 3, iclass 33, count 0 2006.229.09:01:06.53#ibcon#about to read 4, iclass 33, count 0 2006.229.09:01:06.53#ibcon#read 4, iclass 33, count 0 2006.229.09:01:06.53#ibcon#about to read 5, iclass 33, count 0 2006.229.09:01:06.53#ibcon#read 5, iclass 33, count 0 2006.229.09:01:06.53#ibcon#about to read 6, iclass 33, count 0 2006.229.09:01:06.53#ibcon#read 6, iclass 33, count 0 2006.229.09:01:06.53#ibcon#end of sib2, iclass 33, count 0 2006.229.09:01:06.53#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:01:06.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:01:06.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:01:06.53#ibcon#*before write, iclass 33, count 0 2006.229.09:01:06.53#ibcon#enter sib2, iclass 33, count 0 2006.229.09:01:06.53#ibcon#flushed, iclass 33, count 0 2006.229.09:01:06.53#ibcon#about to write, iclass 33, count 0 2006.229.09:01:06.53#ibcon#wrote, iclass 33, count 0 2006.229.09:01:06.53#ibcon#about to read 3, iclass 33, count 0 2006.229.09:01:06.57#ibcon#read 3, iclass 33, count 0 2006.229.09:01:06.57#ibcon#about to read 4, iclass 33, count 0 2006.229.09:01:06.57#ibcon#read 4, iclass 33, count 0 2006.229.09:01:06.57#ibcon#about to read 5, iclass 33, count 0 2006.229.09:01:06.57#ibcon#read 5, iclass 33, count 0 2006.229.09:01:06.57#ibcon#about to read 6, iclass 33, count 0 2006.229.09:01:06.57#ibcon#read 6, iclass 33, count 0 2006.229.09:01:06.57#ibcon#end of sib2, iclass 33, count 0 2006.229.09:01:06.57#ibcon#*after write, iclass 33, count 0 2006.229.09:01:06.57#ibcon#*before return 0, iclass 33, count 0 2006.229.09:01:06.57#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:06.57#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:06.57#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:01:06.57#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:01:06.57$vck44/va=5,4 2006.229.09:01:06.57#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.09:01:06.57#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.09:01:06.57#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:06.57#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:06.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:06.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:06.63#ibcon#enter wrdev, iclass 35, count 2 2006.229.09:01:06.63#ibcon#first serial, iclass 35, count 2 2006.229.09:01:06.63#ibcon#enter sib2, iclass 35, count 2 2006.229.09:01:06.63#ibcon#flushed, iclass 35, count 2 2006.229.09:01:06.63#ibcon#about to write, iclass 35, count 2 2006.229.09:01:06.63#ibcon#wrote, iclass 35, count 2 2006.229.09:01:06.63#ibcon#about to read 3, iclass 35, count 2 2006.229.09:01:06.65#ibcon#read 3, iclass 35, count 2 2006.229.09:01:06.65#ibcon#about to read 4, iclass 35, count 2 2006.229.09:01:06.65#ibcon#read 4, iclass 35, count 2 2006.229.09:01:06.65#ibcon#about to read 5, iclass 35, count 2 2006.229.09:01:06.65#ibcon#read 5, iclass 35, count 2 2006.229.09:01:06.65#ibcon#about to read 6, iclass 35, count 2 2006.229.09:01:06.65#ibcon#read 6, iclass 35, count 2 2006.229.09:01:06.65#ibcon#end of sib2, iclass 35, count 2 2006.229.09:01:06.65#ibcon#*mode == 0, iclass 35, count 2 2006.229.09:01:06.65#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.09:01:06.65#ibcon#[25=AT05-04\r\n] 2006.229.09:01:06.65#ibcon#*before write, iclass 35, count 2 2006.229.09:01:06.65#ibcon#enter sib2, iclass 35, count 2 2006.229.09:01:06.65#ibcon#flushed, iclass 35, count 2 2006.229.09:01:06.65#ibcon#about to write, iclass 35, count 2 2006.229.09:01:06.65#ibcon#wrote, iclass 35, count 2 2006.229.09:01:06.65#ibcon#about to read 3, iclass 35, count 2 2006.229.09:01:06.68#ibcon#read 3, iclass 35, count 2 2006.229.09:01:06.68#ibcon#about to read 4, iclass 35, count 2 2006.229.09:01:06.68#ibcon#read 4, iclass 35, count 2 2006.229.09:01:06.68#ibcon#about to read 5, iclass 35, count 2 2006.229.09:01:06.68#ibcon#read 5, iclass 35, count 2 2006.229.09:01:06.68#ibcon#about to read 6, iclass 35, count 2 2006.229.09:01:06.68#ibcon#read 6, iclass 35, count 2 2006.229.09:01:06.68#ibcon#end of sib2, iclass 35, count 2 2006.229.09:01:06.68#ibcon#*after write, iclass 35, count 2 2006.229.09:01:06.68#ibcon#*before return 0, iclass 35, count 2 2006.229.09:01:06.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:06.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:06.68#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.09:01:06.68#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:06.68#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:06.80#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:06.80#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:06.80#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:01:06.80#ibcon#first serial, iclass 35, count 0 2006.229.09:01:06.80#ibcon#enter sib2, iclass 35, count 0 2006.229.09:01:06.80#ibcon#flushed, iclass 35, count 0 2006.229.09:01:06.80#ibcon#about to write, iclass 35, count 0 2006.229.09:01:06.80#ibcon#wrote, iclass 35, count 0 2006.229.09:01:06.80#ibcon#about to read 3, iclass 35, count 0 2006.229.09:01:06.82#ibcon#read 3, iclass 35, count 0 2006.229.09:01:06.82#ibcon#about to read 4, iclass 35, count 0 2006.229.09:01:06.82#ibcon#read 4, iclass 35, count 0 2006.229.09:01:06.82#ibcon#about to read 5, iclass 35, count 0 2006.229.09:01:06.82#ibcon#read 5, iclass 35, count 0 2006.229.09:01:06.82#ibcon#about to read 6, iclass 35, count 0 2006.229.09:01:06.82#ibcon#read 6, iclass 35, count 0 2006.229.09:01:06.82#ibcon#end of sib2, iclass 35, count 0 2006.229.09:01:06.82#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:01:06.82#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:01:06.82#ibcon#[25=USB\r\n] 2006.229.09:01:06.82#ibcon#*before write, iclass 35, count 0 2006.229.09:01:06.82#ibcon#enter sib2, iclass 35, count 0 2006.229.09:01:06.82#ibcon#flushed, iclass 35, count 0 2006.229.09:01:06.82#ibcon#about to write, iclass 35, count 0 2006.229.09:01:06.82#ibcon#wrote, iclass 35, count 0 2006.229.09:01:06.82#ibcon#about to read 3, iclass 35, count 0 2006.229.09:01:06.85#ibcon#read 3, iclass 35, count 0 2006.229.09:01:06.85#ibcon#about to read 4, iclass 35, count 0 2006.229.09:01:06.85#ibcon#read 4, iclass 35, count 0 2006.229.09:01:06.85#ibcon#about to read 5, iclass 35, count 0 2006.229.09:01:06.85#ibcon#read 5, iclass 35, count 0 2006.229.09:01:06.85#ibcon#about to read 6, iclass 35, count 0 2006.229.09:01:06.85#ibcon#read 6, iclass 35, count 0 2006.229.09:01:06.85#ibcon#end of sib2, iclass 35, count 0 2006.229.09:01:06.85#ibcon#*after write, iclass 35, count 0 2006.229.09:01:06.85#ibcon#*before return 0, iclass 35, count 0 2006.229.09:01:06.85#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:06.85#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:06.85#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:01:06.85#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:01:06.85$vck44/valo=6,814.99 2006.229.09:01:06.85#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.09:01:06.85#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.09:01:06.85#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:06.85#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:06.85#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:06.85#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:06.85#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:01:06.85#ibcon#first serial, iclass 37, count 0 2006.229.09:01:06.85#ibcon#enter sib2, iclass 37, count 0 2006.229.09:01:06.85#ibcon#flushed, iclass 37, count 0 2006.229.09:01:06.85#ibcon#about to write, iclass 37, count 0 2006.229.09:01:06.85#ibcon#wrote, iclass 37, count 0 2006.229.09:01:06.85#ibcon#about to read 3, iclass 37, count 0 2006.229.09:01:06.87#ibcon#read 3, iclass 37, count 0 2006.229.09:01:06.87#ibcon#about to read 4, iclass 37, count 0 2006.229.09:01:06.87#ibcon#read 4, iclass 37, count 0 2006.229.09:01:06.87#ibcon#about to read 5, iclass 37, count 0 2006.229.09:01:06.87#ibcon#read 5, iclass 37, count 0 2006.229.09:01:06.87#ibcon#about to read 6, iclass 37, count 0 2006.229.09:01:06.87#ibcon#read 6, iclass 37, count 0 2006.229.09:01:06.87#ibcon#end of sib2, iclass 37, count 0 2006.229.09:01:06.87#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:01:06.87#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:01:06.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:01:06.87#ibcon#*before write, iclass 37, count 0 2006.229.09:01:06.87#ibcon#enter sib2, iclass 37, count 0 2006.229.09:01:06.87#ibcon#flushed, iclass 37, count 0 2006.229.09:01:06.87#ibcon#about to write, iclass 37, count 0 2006.229.09:01:06.87#ibcon#wrote, iclass 37, count 0 2006.229.09:01:06.87#ibcon#about to read 3, iclass 37, count 0 2006.229.09:01:06.91#ibcon#read 3, iclass 37, count 0 2006.229.09:01:06.91#ibcon#about to read 4, iclass 37, count 0 2006.229.09:01:06.91#ibcon#read 4, iclass 37, count 0 2006.229.09:01:06.91#ibcon#about to read 5, iclass 37, count 0 2006.229.09:01:06.91#ibcon#read 5, iclass 37, count 0 2006.229.09:01:06.91#ibcon#about to read 6, iclass 37, count 0 2006.229.09:01:06.91#ibcon#read 6, iclass 37, count 0 2006.229.09:01:06.91#ibcon#end of sib2, iclass 37, count 0 2006.229.09:01:06.91#ibcon#*after write, iclass 37, count 0 2006.229.09:01:06.91#ibcon#*before return 0, iclass 37, count 0 2006.229.09:01:06.91#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:06.91#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:06.91#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:01:06.91#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:01:06.91$vck44/va=6,4 2006.229.09:01:06.91#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.09:01:06.91#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.09:01:06.91#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:06.91#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:06.97#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:06.97#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:06.97#ibcon#enter wrdev, iclass 39, count 2 2006.229.09:01:06.97#ibcon#first serial, iclass 39, count 2 2006.229.09:01:06.97#ibcon#enter sib2, iclass 39, count 2 2006.229.09:01:06.97#ibcon#flushed, iclass 39, count 2 2006.229.09:01:06.97#ibcon#about to write, iclass 39, count 2 2006.229.09:01:06.97#ibcon#wrote, iclass 39, count 2 2006.229.09:01:06.97#ibcon#about to read 3, iclass 39, count 2 2006.229.09:01:06.99#ibcon#read 3, iclass 39, count 2 2006.229.09:01:06.99#ibcon#about to read 4, iclass 39, count 2 2006.229.09:01:06.99#ibcon#read 4, iclass 39, count 2 2006.229.09:01:06.99#ibcon#about to read 5, iclass 39, count 2 2006.229.09:01:06.99#ibcon#read 5, iclass 39, count 2 2006.229.09:01:06.99#ibcon#about to read 6, iclass 39, count 2 2006.229.09:01:06.99#ibcon#read 6, iclass 39, count 2 2006.229.09:01:06.99#ibcon#end of sib2, iclass 39, count 2 2006.229.09:01:06.99#ibcon#*mode == 0, iclass 39, count 2 2006.229.09:01:06.99#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.09:01:06.99#ibcon#[25=AT06-04\r\n] 2006.229.09:01:06.99#ibcon#*before write, iclass 39, count 2 2006.229.09:01:06.99#ibcon#enter sib2, iclass 39, count 2 2006.229.09:01:06.99#ibcon#flushed, iclass 39, count 2 2006.229.09:01:06.99#ibcon#about to write, iclass 39, count 2 2006.229.09:01:06.99#ibcon#wrote, iclass 39, count 2 2006.229.09:01:06.99#ibcon#about to read 3, iclass 39, count 2 2006.229.09:01:07.02#ibcon#read 3, iclass 39, count 2 2006.229.09:01:07.02#ibcon#about to read 4, iclass 39, count 2 2006.229.09:01:07.02#ibcon#read 4, iclass 39, count 2 2006.229.09:01:07.02#ibcon#about to read 5, iclass 39, count 2 2006.229.09:01:07.02#ibcon#read 5, iclass 39, count 2 2006.229.09:01:07.02#ibcon#about to read 6, iclass 39, count 2 2006.229.09:01:07.02#ibcon#read 6, iclass 39, count 2 2006.229.09:01:07.02#ibcon#end of sib2, iclass 39, count 2 2006.229.09:01:07.02#ibcon#*after write, iclass 39, count 2 2006.229.09:01:07.02#ibcon#*before return 0, iclass 39, count 2 2006.229.09:01:07.02#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:07.02#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:07.02#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.09:01:07.02#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:07.02#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:07.14#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:07.14#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:07.14#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:01:07.14#ibcon#first serial, iclass 39, count 0 2006.229.09:01:07.14#ibcon#enter sib2, iclass 39, count 0 2006.229.09:01:07.14#ibcon#flushed, iclass 39, count 0 2006.229.09:01:07.14#ibcon#about to write, iclass 39, count 0 2006.229.09:01:07.14#ibcon#wrote, iclass 39, count 0 2006.229.09:01:07.14#ibcon#about to read 3, iclass 39, count 0 2006.229.09:01:07.16#ibcon#read 3, iclass 39, count 0 2006.229.09:01:07.16#ibcon#about to read 4, iclass 39, count 0 2006.229.09:01:07.16#ibcon#read 4, iclass 39, count 0 2006.229.09:01:07.16#ibcon#about to read 5, iclass 39, count 0 2006.229.09:01:07.16#ibcon#read 5, iclass 39, count 0 2006.229.09:01:07.16#ibcon#about to read 6, iclass 39, count 0 2006.229.09:01:07.16#ibcon#read 6, iclass 39, count 0 2006.229.09:01:07.16#ibcon#end of sib2, iclass 39, count 0 2006.229.09:01:07.16#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:01:07.16#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:01:07.16#ibcon#[25=USB\r\n] 2006.229.09:01:07.16#ibcon#*before write, iclass 39, count 0 2006.229.09:01:07.16#ibcon#enter sib2, iclass 39, count 0 2006.229.09:01:07.16#ibcon#flushed, iclass 39, count 0 2006.229.09:01:07.16#ibcon#about to write, iclass 39, count 0 2006.229.09:01:07.16#ibcon#wrote, iclass 39, count 0 2006.229.09:01:07.16#ibcon#about to read 3, iclass 39, count 0 2006.229.09:01:07.19#ibcon#read 3, iclass 39, count 0 2006.229.09:01:07.19#ibcon#about to read 4, iclass 39, count 0 2006.229.09:01:07.19#ibcon#read 4, iclass 39, count 0 2006.229.09:01:07.19#ibcon#about to read 5, iclass 39, count 0 2006.229.09:01:07.19#ibcon#read 5, iclass 39, count 0 2006.229.09:01:07.19#ibcon#about to read 6, iclass 39, count 0 2006.229.09:01:07.19#ibcon#read 6, iclass 39, count 0 2006.229.09:01:07.19#ibcon#end of sib2, iclass 39, count 0 2006.229.09:01:07.19#ibcon#*after write, iclass 39, count 0 2006.229.09:01:07.19#ibcon#*before return 0, iclass 39, count 0 2006.229.09:01:07.19#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:07.19#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:07.19#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:01:07.19#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:01:07.19$vck44/valo=7,864.99 2006.229.09:01:07.19#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:01:07.19#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:01:07.19#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:07.19#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:07.19#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:07.19#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:07.19#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:01:07.19#ibcon#first serial, iclass 3, count 0 2006.229.09:01:07.19#ibcon#enter sib2, iclass 3, count 0 2006.229.09:01:07.19#ibcon#flushed, iclass 3, count 0 2006.229.09:01:07.19#ibcon#about to write, iclass 3, count 0 2006.229.09:01:07.19#ibcon#wrote, iclass 3, count 0 2006.229.09:01:07.19#ibcon#about to read 3, iclass 3, count 0 2006.229.09:01:07.21#ibcon#read 3, iclass 3, count 0 2006.229.09:01:07.21#ibcon#about to read 4, iclass 3, count 0 2006.229.09:01:07.21#ibcon#read 4, iclass 3, count 0 2006.229.09:01:07.21#ibcon#about to read 5, iclass 3, count 0 2006.229.09:01:07.21#ibcon#read 5, iclass 3, count 0 2006.229.09:01:07.21#ibcon#about to read 6, iclass 3, count 0 2006.229.09:01:07.21#ibcon#read 6, iclass 3, count 0 2006.229.09:01:07.21#ibcon#end of sib2, iclass 3, count 0 2006.229.09:01:07.21#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:01:07.21#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:01:07.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:01:07.21#ibcon#*before write, iclass 3, count 0 2006.229.09:01:07.21#ibcon#enter sib2, iclass 3, count 0 2006.229.09:01:07.21#ibcon#flushed, iclass 3, count 0 2006.229.09:01:07.21#ibcon#about to write, iclass 3, count 0 2006.229.09:01:07.21#ibcon#wrote, iclass 3, count 0 2006.229.09:01:07.21#ibcon#about to read 3, iclass 3, count 0 2006.229.09:01:07.25#ibcon#read 3, iclass 3, count 0 2006.229.09:01:07.25#ibcon#about to read 4, iclass 3, count 0 2006.229.09:01:07.25#ibcon#read 4, iclass 3, count 0 2006.229.09:01:07.25#ibcon#about to read 5, iclass 3, count 0 2006.229.09:01:07.25#ibcon#read 5, iclass 3, count 0 2006.229.09:01:07.25#ibcon#about to read 6, iclass 3, count 0 2006.229.09:01:07.25#ibcon#read 6, iclass 3, count 0 2006.229.09:01:07.25#ibcon#end of sib2, iclass 3, count 0 2006.229.09:01:07.25#ibcon#*after write, iclass 3, count 0 2006.229.09:01:07.25#ibcon#*before return 0, iclass 3, count 0 2006.229.09:01:07.25#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:07.25#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:07.25#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:01:07.25#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:01:07.25$vck44/va=7,5 2006.229.09:01:07.25#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.09:01:07.25#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.09:01:07.25#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:07.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:07.31#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:07.31#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:07.31#ibcon#enter wrdev, iclass 5, count 2 2006.229.09:01:07.31#ibcon#first serial, iclass 5, count 2 2006.229.09:01:07.31#ibcon#enter sib2, iclass 5, count 2 2006.229.09:01:07.31#ibcon#flushed, iclass 5, count 2 2006.229.09:01:07.31#ibcon#about to write, iclass 5, count 2 2006.229.09:01:07.31#ibcon#wrote, iclass 5, count 2 2006.229.09:01:07.31#ibcon#about to read 3, iclass 5, count 2 2006.229.09:01:07.33#ibcon#read 3, iclass 5, count 2 2006.229.09:01:07.33#ibcon#about to read 4, iclass 5, count 2 2006.229.09:01:07.33#ibcon#read 4, iclass 5, count 2 2006.229.09:01:07.33#ibcon#about to read 5, iclass 5, count 2 2006.229.09:01:07.33#ibcon#read 5, iclass 5, count 2 2006.229.09:01:07.33#ibcon#about to read 6, iclass 5, count 2 2006.229.09:01:07.33#ibcon#read 6, iclass 5, count 2 2006.229.09:01:07.33#ibcon#end of sib2, iclass 5, count 2 2006.229.09:01:07.33#ibcon#*mode == 0, iclass 5, count 2 2006.229.09:01:07.33#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.09:01:07.33#ibcon#[25=AT07-05\r\n] 2006.229.09:01:07.33#ibcon#*before write, iclass 5, count 2 2006.229.09:01:07.33#ibcon#enter sib2, iclass 5, count 2 2006.229.09:01:07.33#ibcon#flushed, iclass 5, count 2 2006.229.09:01:07.33#ibcon#about to write, iclass 5, count 2 2006.229.09:01:07.33#ibcon#wrote, iclass 5, count 2 2006.229.09:01:07.33#ibcon#about to read 3, iclass 5, count 2 2006.229.09:01:07.36#ibcon#read 3, iclass 5, count 2 2006.229.09:01:07.36#ibcon#about to read 4, iclass 5, count 2 2006.229.09:01:07.36#ibcon#read 4, iclass 5, count 2 2006.229.09:01:07.36#ibcon#about to read 5, iclass 5, count 2 2006.229.09:01:07.36#ibcon#read 5, iclass 5, count 2 2006.229.09:01:07.36#ibcon#about to read 6, iclass 5, count 2 2006.229.09:01:07.36#ibcon#read 6, iclass 5, count 2 2006.229.09:01:07.36#ibcon#end of sib2, iclass 5, count 2 2006.229.09:01:07.36#ibcon#*after write, iclass 5, count 2 2006.229.09:01:07.36#ibcon#*before return 0, iclass 5, count 2 2006.229.09:01:07.36#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:07.36#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:07.36#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.09:01:07.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:07.36#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:07.48#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:07.48#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:07.48#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:01:07.48#ibcon#first serial, iclass 5, count 0 2006.229.09:01:07.48#ibcon#enter sib2, iclass 5, count 0 2006.229.09:01:07.48#ibcon#flushed, iclass 5, count 0 2006.229.09:01:07.48#ibcon#about to write, iclass 5, count 0 2006.229.09:01:07.48#ibcon#wrote, iclass 5, count 0 2006.229.09:01:07.48#ibcon#about to read 3, iclass 5, count 0 2006.229.09:01:07.50#ibcon#read 3, iclass 5, count 0 2006.229.09:01:07.50#ibcon#about to read 4, iclass 5, count 0 2006.229.09:01:07.50#ibcon#read 4, iclass 5, count 0 2006.229.09:01:07.50#ibcon#about to read 5, iclass 5, count 0 2006.229.09:01:07.50#ibcon#read 5, iclass 5, count 0 2006.229.09:01:07.50#ibcon#about to read 6, iclass 5, count 0 2006.229.09:01:07.50#ibcon#read 6, iclass 5, count 0 2006.229.09:01:07.50#ibcon#end of sib2, iclass 5, count 0 2006.229.09:01:07.50#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:01:07.50#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:01:07.50#ibcon#[25=USB\r\n] 2006.229.09:01:07.50#ibcon#*before write, iclass 5, count 0 2006.229.09:01:07.50#ibcon#enter sib2, iclass 5, count 0 2006.229.09:01:07.50#ibcon#flushed, iclass 5, count 0 2006.229.09:01:07.50#ibcon#about to write, iclass 5, count 0 2006.229.09:01:07.50#ibcon#wrote, iclass 5, count 0 2006.229.09:01:07.50#ibcon#about to read 3, iclass 5, count 0 2006.229.09:01:07.53#ibcon#read 3, iclass 5, count 0 2006.229.09:01:07.53#ibcon#about to read 4, iclass 5, count 0 2006.229.09:01:07.53#ibcon#read 4, iclass 5, count 0 2006.229.09:01:07.53#ibcon#about to read 5, iclass 5, count 0 2006.229.09:01:07.53#ibcon#read 5, iclass 5, count 0 2006.229.09:01:07.53#ibcon#about to read 6, iclass 5, count 0 2006.229.09:01:07.53#ibcon#read 6, iclass 5, count 0 2006.229.09:01:07.53#ibcon#end of sib2, iclass 5, count 0 2006.229.09:01:07.53#ibcon#*after write, iclass 5, count 0 2006.229.09:01:07.53#ibcon#*before return 0, iclass 5, count 0 2006.229.09:01:07.53#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:07.53#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:07.53#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:01:07.53#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:01:07.53$vck44/valo=8,884.99 2006.229.09:01:07.53#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.09:01:07.53#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.09:01:07.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:07.53#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:07.53#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:07.53#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:07.53#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:01:07.53#ibcon#first serial, iclass 7, count 0 2006.229.09:01:07.53#ibcon#enter sib2, iclass 7, count 0 2006.229.09:01:07.53#ibcon#flushed, iclass 7, count 0 2006.229.09:01:07.53#ibcon#about to write, iclass 7, count 0 2006.229.09:01:07.53#ibcon#wrote, iclass 7, count 0 2006.229.09:01:07.53#ibcon#about to read 3, iclass 7, count 0 2006.229.09:01:07.55#ibcon#read 3, iclass 7, count 0 2006.229.09:01:07.55#ibcon#about to read 4, iclass 7, count 0 2006.229.09:01:07.55#ibcon#read 4, iclass 7, count 0 2006.229.09:01:07.55#ibcon#about to read 5, iclass 7, count 0 2006.229.09:01:07.55#ibcon#read 5, iclass 7, count 0 2006.229.09:01:07.55#ibcon#about to read 6, iclass 7, count 0 2006.229.09:01:07.55#ibcon#read 6, iclass 7, count 0 2006.229.09:01:07.55#ibcon#end of sib2, iclass 7, count 0 2006.229.09:01:07.55#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:01:07.55#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:01:07.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:01:07.55#ibcon#*before write, iclass 7, count 0 2006.229.09:01:07.55#ibcon#enter sib2, iclass 7, count 0 2006.229.09:01:07.55#ibcon#flushed, iclass 7, count 0 2006.229.09:01:07.55#ibcon#about to write, iclass 7, count 0 2006.229.09:01:07.55#ibcon#wrote, iclass 7, count 0 2006.229.09:01:07.55#ibcon#about to read 3, iclass 7, count 0 2006.229.09:01:07.59#ibcon#read 3, iclass 7, count 0 2006.229.09:01:07.59#ibcon#about to read 4, iclass 7, count 0 2006.229.09:01:07.59#ibcon#read 4, iclass 7, count 0 2006.229.09:01:07.59#ibcon#about to read 5, iclass 7, count 0 2006.229.09:01:07.59#ibcon#read 5, iclass 7, count 0 2006.229.09:01:07.59#ibcon#about to read 6, iclass 7, count 0 2006.229.09:01:07.59#ibcon#read 6, iclass 7, count 0 2006.229.09:01:07.59#ibcon#end of sib2, iclass 7, count 0 2006.229.09:01:07.59#ibcon#*after write, iclass 7, count 0 2006.229.09:01:07.59#ibcon#*before return 0, iclass 7, count 0 2006.229.09:01:07.59#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:07.59#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:07.59#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:01:07.59#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:01:07.59$vck44/va=8,6 2006.229.09:01:07.59#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.09:01:07.59#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.09:01:07.59#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:07.59#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:01:07.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:01:07.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:01:07.65#ibcon#enter wrdev, iclass 11, count 2 2006.229.09:01:07.65#ibcon#first serial, iclass 11, count 2 2006.229.09:01:07.65#ibcon#enter sib2, iclass 11, count 2 2006.229.09:01:07.65#ibcon#flushed, iclass 11, count 2 2006.229.09:01:07.65#ibcon#about to write, iclass 11, count 2 2006.229.09:01:07.65#ibcon#wrote, iclass 11, count 2 2006.229.09:01:07.65#ibcon#about to read 3, iclass 11, count 2 2006.229.09:01:07.67#ibcon#read 3, iclass 11, count 2 2006.229.09:01:07.67#ibcon#about to read 4, iclass 11, count 2 2006.229.09:01:07.67#ibcon#read 4, iclass 11, count 2 2006.229.09:01:07.67#ibcon#about to read 5, iclass 11, count 2 2006.229.09:01:07.67#ibcon#read 5, iclass 11, count 2 2006.229.09:01:07.67#ibcon#about to read 6, iclass 11, count 2 2006.229.09:01:07.67#ibcon#read 6, iclass 11, count 2 2006.229.09:01:07.67#ibcon#end of sib2, iclass 11, count 2 2006.229.09:01:07.67#ibcon#*mode == 0, iclass 11, count 2 2006.229.09:01:07.67#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.09:01:07.67#ibcon#[25=AT08-06\r\n] 2006.229.09:01:07.67#ibcon#*before write, iclass 11, count 2 2006.229.09:01:07.67#ibcon#enter sib2, iclass 11, count 2 2006.229.09:01:07.67#ibcon#flushed, iclass 11, count 2 2006.229.09:01:07.67#ibcon#about to write, iclass 11, count 2 2006.229.09:01:07.67#ibcon#wrote, iclass 11, count 2 2006.229.09:01:07.67#ibcon#about to read 3, iclass 11, count 2 2006.229.09:01:07.70#ibcon#read 3, iclass 11, count 2 2006.229.09:01:07.70#ibcon#about to read 4, iclass 11, count 2 2006.229.09:01:07.70#ibcon#read 4, iclass 11, count 2 2006.229.09:01:07.70#ibcon#about to read 5, iclass 11, count 2 2006.229.09:01:07.70#ibcon#read 5, iclass 11, count 2 2006.229.09:01:07.70#ibcon#about to read 6, iclass 11, count 2 2006.229.09:01:07.70#ibcon#read 6, iclass 11, count 2 2006.229.09:01:07.70#ibcon#end of sib2, iclass 11, count 2 2006.229.09:01:07.70#ibcon#*after write, iclass 11, count 2 2006.229.09:01:07.70#ibcon#*before return 0, iclass 11, count 2 2006.229.09:01:07.70#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:01:07.70#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:01:07.70#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.09:01:07.70#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:07.70#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:01:07.82#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:01:07.82#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:01:07.82#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:01:07.82#ibcon#first serial, iclass 11, count 0 2006.229.09:01:07.82#ibcon#enter sib2, iclass 11, count 0 2006.229.09:01:07.82#ibcon#flushed, iclass 11, count 0 2006.229.09:01:07.82#ibcon#about to write, iclass 11, count 0 2006.229.09:01:07.82#ibcon#wrote, iclass 11, count 0 2006.229.09:01:07.82#ibcon#about to read 3, iclass 11, count 0 2006.229.09:01:07.84#ibcon#read 3, iclass 11, count 0 2006.229.09:01:07.84#ibcon#about to read 4, iclass 11, count 0 2006.229.09:01:07.84#ibcon#read 4, iclass 11, count 0 2006.229.09:01:07.84#ibcon#about to read 5, iclass 11, count 0 2006.229.09:01:07.84#ibcon#read 5, iclass 11, count 0 2006.229.09:01:07.84#ibcon#about to read 6, iclass 11, count 0 2006.229.09:01:07.84#ibcon#read 6, iclass 11, count 0 2006.229.09:01:07.84#ibcon#end of sib2, iclass 11, count 0 2006.229.09:01:07.84#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:01:07.84#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:01:07.84#ibcon#[25=USB\r\n] 2006.229.09:01:07.84#ibcon#*before write, iclass 11, count 0 2006.229.09:01:07.84#ibcon#enter sib2, iclass 11, count 0 2006.229.09:01:07.84#ibcon#flushed, iclass 11, count 0 2006.229.09:01:07.84#ibcon#about to write, iclass 11, count 0 2006.229.09:01:07.84#ibcon#wrote, iclass 11, count 0 2006.229.09:01:07.84#ibcon#about to read 3, iclass 11, count 0 2006.229.09:01:07.87#ibcon#read 3, iclass 11, count 0 2006.229.09:01:07.87#ibcon#about to read 4, iclass 11, count 0 2006.229.09:01:07.87#ibcon#read 4, iclass 11, count 0 2006.229.09:01:07.87#ibcon#about to read 5, iclass 11, count 0 2006.229.09:01:07.87#ibcon#read 5, iclass 11, count 0 2006.229.09:01:07.87#ibcon#about to read 6, iclass 11, count 0 2006.229.09:01:07.87#ibcon#read 6, iclass 11, count 0 2006.229.09:01:07.87#ibcon#end of sib2, iclass 11, count 0 2006.229.09:01:07.87#ibcon#*after write, iclass 11, count 0 2006.229.09:01:07.87#ibcon#*before return 0, iclass 11, count 0 2006.229.09:01:07.87#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:01:07.87#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:01:07.87#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:01:07.87#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:01:07.87$vck44/vblo=1,629.99 2006.229.09:01:07.87#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.09:01:07.87#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.09:01:07.87#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:07.87#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:01:07.87#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:01:07.87#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:01:07.87#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:01:07.87#ibcon#first serial, iclass 13, count 0 2006.229.09:01:07.87#ibcon#enter sib2, iclass 13, count 0 2006.229.09:01:07.87#ibcon#flushed, iclass 13, count 0 2006.229.09:01:07.87#ibcon#about to write, iclass 13, count 0 2006.229.09:01:07.87#ibcon#wrote, iclass 13, count 0 2006.229.09:01:07.87#ibcon#about to read 3, iclass 13, count 0 2006.229.09:01:07.89#ibcon#read 3, iclass 13, count 0 2006.229.09:01:07.89#ibcon#about to read 4, iclass 13, count 0 2006.229.09:01:07.89#ibcon#read 4, iclass 13, count 0 2006.229.09:01:07.89#ibcon#about to read 5, iclass 13, count 0 2006.229.09:01:07.89#ibcon#read 5, iclass 13, count 0 2006.229.09:01:07.89#ibcon#about to read 6, iclass 13, count 0 2006.229.09:01:07.89#ibcon#read 6, iclass 13, count 0 2006.229.09:01:07.89#ibcon#end of sib2, iclass 13, count 0 2006.229.09:01:07.89#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:01:07.89#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:01:07.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:01:07.89#ibcon#*before write, iclass 13, count 0 2006.229.09:01:07.89#ibcon#enter sib2, iclass 13, count 0 2006.229.09:01:07.89#ibcon#flushed, iclass 13, count 0 2006.229.09:01:07.89#ibcon#about to write, iclass 13, count 0 2006.229.09:01:07.89#ibcon#wrote, iclass 13, count 0 2006.229.09:01:07.89#ibcon#about to read 3, iclass 13, count 0 2006.229.09:01:07.93#ibcon#read 3, iclass 13, count 0 2006.229.09:01:07.93#ibcon#about to read 4, iclass 13, count 0 2006.229.09:01:07.93#ibcon#read 4, iclass 13, count 0 2006.229.09:01:07.93#ibcon#about to read 5, iclass 13, count 0 2006.229.09:01:07.93#ibcon#read 5, iclass 13, count 0 2006.229.09:01:07.93#ibcon#about to read 6, iclass 13, count 0 2006.229.09:01:07.93#ibcon#read 6, iclass 13, count 0 2006.229.09:01:07.93#ibcon#end of sib2, iclass 13, count 0 2006.229.09:01:07.93#ibcon#*after write, iclass 13, count 0 2006.229.09:01:07.93#ibcon#*before return 0, iclass 13, count 0 2006.229.09:01:07.93#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:01:07.93#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:01:07.93#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:01:07.93#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:01:07.93$vck44/vb=1,4 2006.229.09:01:07.93#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.09:01:07.93#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.09:01:07.93#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:07.93#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:01:07.93#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:01:07.93#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:01:07.93#ibcon#enter wrdev, iclass 15, count 2 2006.229.09:01:07.93#ibcon#first serial, iclass 15, count 2 2006.229.09:01:07.93#ibcon#enter sib2, iclass 15, count 2 2006.229.09:01:07.93#ibcon#flushed, iclass 15, count 2 2006.229.09:01:07.93#ibcon#about to write, iclass 15, count 2 2006.229.09:01:07.93#ibcon#wrote, iclass 15, count 2 2006.229.09:01:07.93#ibcon#about to read 3, iclass 15, count 2 2006.229.09:01:07.95#ibcon#read 3, iclass 15, count 2 2006.229.09:01:07.95#ibcon#about to read 4, iclass 15, count 2 2006.229.09:01:07.95#ibcon#read 4, iclass 15, count 2 2006.229.09:01:07.95#ibcon#about to read 5, iclass 15, count 2 2006.229.09:01:07.95#ibcon#read 5, iclass 15, count 2 2006.229.09:01:07.95#ibcon#about to read 6, iclass 15, count 2 2006.229.09:01:07.95#ibcon#read 6, iclass 15, count 2 2006.229.09:01:07.95#ibcon#end of sib2, iclass 15, count 2 2006.229.09:01:07.95#ibcon#*mode == 0, iclass 15, count 2 2006.229.09:01:07.95#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.09:01:07.95#ibcon#[27=AT01-04\r\n] 2006.229.09:01:07.95#ibcon#*before write, iclass 15, count 2 2006.229.09:01:07.95#ibcon#enter sib2, iclass 15, count 2 2006.229.09:01:07.95#ibcon#flushed, iclass 15, count 2 2006.229.09:01:07.95#ibcon#about to write, iclass 15, count 2 2006.229.09:01:07.95#ibcon#wrote, iclass 15, count 2 2006.229.09:01:07.95#ibcon#about to read 3, iclass 15, count 2 2006.229.09:01:07.98#ibcon#read 3, iclass 15, count 2 2006.229.09:01:07.98#ibcon#about to read 4, iclass 15, count 2 2006.229.09:01:07.98#ibcon#read 4, iclass 15, count 2 2006.229.09:01:07.98#ibcon#about to read 5, iclass 15, count 2 2006.229.09:01:07.98#ibcon#read 5, iclass 15, count 2 2006.229.09:01:07.98#ibcon#about to read 6, iclass 15, count 2 2006.229.09:01:07.98#ibcon#read 6, iclass 15, count 2 2006.229.09:01:07.98#ibcon#end of sib2, iclass 15, count 2 2006.229.09:01:07.98#ibcon#*after write, iclass 15, count 2 2006.229.09:01:07.98#ibcon#*before return 0, iclass 15, count 2 2006.229.09:01:07.98#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:01:07.98#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:01:07.98#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.09:01:07.98#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:07.98#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:01:08.10#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:01:08.10#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:01:08.10#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:01:08.10#ibcon#first serial, iclass 15, count 0 2006.229.09:01:08.10#ibcon#enter sib2, iclass 15, count 0 2006.229.09:01:08.10#ibcon#flushed, iclass 15, count 0 2006.229.09:01:08.10#ibcon#about to write, iclass 15, count 0 2006.229.09:01:08.10#ibcon#wrote, iclass 15, count 0 2006.229.09:01:08.10#ibcon#about to read 3, iclass 15, count 0 2006.229.09:01:08.12#ibcon#read 3, iclass 15, count 0 2006.229.09:01:08.12#ibcon#about to read 4, iclass 15, count 0 2006.229.09:01:08.12#ibcon#read 4, iclass 15, count 0 2006.229.09:01:08.12#ibcon#about to read 5, iclass 15, count 0 2006.229.09:01:08.12#ibcon#read 5, iclass 15, count 0 2006.229.09:01:08.12#ibcon#about to read 6, iclass 15, count 0 2006.229.09:01:08.12#ibcon#read 6, iclass 15, count 0 2006.229.09:01:08.12#ibcon#end of sib2, iclass 15, count 0 2006.229.09:01:08.12#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:01:08.12#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:01:08.12#ibcon#[27=USB\r\n] 2006.229.09:01:08.12#ibcon#*before write, iclass 15, count 0 2006.229.09:01:08.12#ibcon#enter sib2, iclass 15, count 0 2006.229.09:01:08.12#ibcon#flushed, iclass 15, count 0 2006.229.09:01:08.12#ibcon#about to write, iclass 15, count 0 2006.229.09:01:08.12#ibcon#wrote, iclass 15, count 0 2006.229.09:01:08.12#ibcon#about to read 3, iclass 15, count 0 2006.229.09:01:08.15#ibcon#read 3, iclass 15, count 0 2006.229.09:01:08.15#ibcon#about to read 4, iclass 15, count 0 2006.229.09:01:08.15#ibcon#read 4, iclass 15, count 0 2006.229.09:01:08.15#ibcon#about to read 5, iclass 15, count 0 2006.229.09:01:08.15#ibcon#read 5, iclass 15, count 0 2006.229.09:01:08.15#ibcon#about to read 6, iclass 15, count 0 2006.229.09:01:08.15#ibcon#read 6, iclass 15, count 0 2006.229.09:01:08.15#ibcon#end of sib2, iclass 15, count 0 2006.229.09:01:08.15#ibcon#*after write, iclass 15, count 0 2006.229.09:01:08.15#ibcon#*before return 0, iclass 15, count 0 2006.229.09:01:08.15#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:01:08.15#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:01:08.15#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:01:08.15#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:01:08.15$vck44/vblo=2,634.99 2006.229.09:01:08.15#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.09:01:08.15#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.09:01:08.15#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:08.15#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:08.15#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:08.15#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:08.15#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:01:08.15#ibcon#first serial, iclass 17, count 0 2006.229.09:01:08.15#ibcon#enter sib2, iclass 17, count 0 2006.229.09:01:08.15#ibcon#flushed, iclass 17, count 0 2006.229.09:01:08.15#ibcon#about to write, iclass 17, count 0 2006.229.09:01:08.15#ibcon#wrote, iclass 17, count 0 2006.229.09:01:08.15#ibcon#about to read 3, iclass 17, count 0 2006.229.09:01:08.17#ibcon#read 3, iclass 17, count 0 2006.229.09:01:08.17#ibcon#about to read 4, iclass 17, count 0 2006.229.09:01:08.17#ibcon#read 4, iclass 17, count 0 2006.229.09:01:08.17#ibcon#about to read 5, iclass 17, count 0 2006.229.09:01:08.17#ibcon#read 5, iclass 17, count 0 2006.229.09:01:08.17#ibcon#about to read 6, iclass 17, count 0 2006.229.09:01:08.17#ibcon#read 6, iclass 17, count 0 2006.229.09:01:08.17#ibcon#end of sib2, iclass 17, count 0 2006.229.09:01:08.17#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:01:08.17#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:01:08.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:01:08.17#ibcon#*before write, iclass 17, count 0 2006.229.09:01:08.17#ibcon#enter sib2, iclass 17, count 0 2006.229.09:01:08.17#ibcon#flushed, iclass 17, count 0 2006.229.09:01:08.17#ibcon#about to write, iclass 17, count 0 2006.229.09:01:08.17#ibcon#wrote, iclass 17, count 0 2006.229.09:01:08.17#ibcon#about to read 3, iclass 17, count 0 2006.229.09:01:08.21#ibcon#read 3, iclass 17, count 0 2006.229.09:01:08.21#ibcon#about to read 4, iclass 17, count 0 2006.229.09:01:08.21#ibcon#read 4, iclass 17, count 0 2006.229.09:01:08.21#ibcon#about to read 5, iclass 17, count 0 2006.229.09:01:08.21#ibcon#read 5, iclass 17, count 0 2006.229.09:01:08.21#ibcon#about to read 6, iclass 17, count 0 2006.229.09:01:08.21#ibcon#read 6, iclass 17, count 0 2006.229.09:01:08.21#ibcon#end of sib2, iclass 17, count 0 2006.229.09:01:08.21#ibcon#*after write, iclass 17, count 0 2006.229.09:01:08.21#ibcon#*before return 0, iclass 17, count 0 2006.229.09:01:08.21#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:08.21#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:01:08.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:01:08.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:01:08.21$vck44/vb=2,4 2006.229.09:01:08.21#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.09:01:08.21#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.09:01:08.21#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:08.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:08.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:08.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:08.27#ibcon#enter wrdev, iclass 19, count 2 2006.229.09:01:08.27#ibcon#first serial, iclass 19, count 2 2006.229.09:01:08.27#ibcon#enter sib2, iclass 19, count 2 2006.229.09:01:08.27#ibcon#flushed, iclass 19, count 2 2006.229.09:01:08.27#ibcon#about to write, iclass 19, count 2 2006.229.09:01:08.27#ibcon#wrote, iclass 19, count 2 2006.229.09:01:08.27#ibcon#about to read 3, iclass 19, count 2 2006.229.09:01:08.29#ibcon#read 3, iclass 19, count 2 2006.229.09:01:08.29#ibcon#about to read 4, iclass 19, count 2 2006.229.09:01:08.29#ibcon#read 4, iclass 19, count 2 2006.229.09:01:08.29#ibcon#about to read 5, iclass 19, count 2 2006.229.09:01:08.29#ibcon#read 5, iclass 19, count 2 2006.229.09:01:08.29#ibcon#about to read 6, iclass 19, count 2 2006.229.09:01:08.29#ibcon#read 6, iclass 19, count 2 2006.229.09:01:08.29#ibcon#end of sib2, iclass 19, count 2 2006.229.09:01:08.29#ibcon#*mode == 0, iclass 19, count 2 2006.229.09:01:08.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.09:01:08.29#ibcon#[27=AT02-04\r\n] 2006.229.09:01:08.29#ibcon#*before write, iclass 19, count 2 2006.229.09:01:08.29#ibcon#enter sib2, iclass 19, count 2 2006.229.09:01:08.29#ibcon#flushed, iclass 19, count 2 2006.229.09:01:08.29#ibcon#about to write, iclass 19, count 2 2006.229.09:01:08.29#ibcon#wrote, iclass 19, count 2 2006.229.09:01:08.29#ibcon#about to read 3, iclass 19, count 2 2006.229.09:01:08.32#ibcon#read 3, iclass 19, count 2 2006.229.09:01:08.32#ibcon#about to read 4, iclass 19, count 2 2006.229.09:01:08.32#ibcon#read 4, iclass 19, count 2 2006.229.09:01:08.32#ibcon#about to read 5, iclass 19, count 2 2006.229.09:01:08.32#ibcon#read 5, iclass 19, count 2 2006.229.09:01:08.32#ibcon#about to read 6, iclass 19, count 2 2006.229.09:01:08.32#ibcon#read 6, iclass 19, count 2 2006.229.09:01:08.32#ibcon#end of sib2, iclass 19, count 2 2006.229.09:01:08.32#ibcon#*after write, iclass 19, count 2 2006.229.09:01:08.32#ibcon#*before return 0, iclass 19, count 2 2006.229.09:01:08.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:08.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:01:08.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.09:01:08.32#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:08.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:08.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:08.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:08.44#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:01:08.44#ibcon#first serial, iclass 19, count 0 2006.229.09:01:08.44#ibcon#enter sib2, iclass 19, count 0 2006.229.09:01:08.44#ibcon#flushed, iclass 19, count 0 2006.229.09:01:08.44#ibcon#about to write, iclass 19, count 0 2006.229.09:01:08.44#ibcon#wrote, iclass 19, count 0 2006.229.09:01:08.44#ibcon#about to read 3, iclass 19, count 0 2006.229.09:01:08.46#ibcon#read 3, iclass 19, count 0 2006.229.09:01:08.46#ibcon#about to read 4, iclass 19, count 0 2006.229.09:01:08.46#ibcon#read 4, iclass 19, count 0 2006.229.09:01:08.46#ibcon#about to read 5, iclass 19, count 0 2006.229.09:01:08.46#ibcon#read 5, iclass 19, count 0 2006.229.09:01:08.46#ibcon#about to read 6, iclass 19, count 0 2006.229.09:01:08.46#ibcon#read 6, iclass 19, count 0 2006.229.09:01:08.46#ibcon#end of sib2, iclass 19, count 0 2006.229.09:01:08.46#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:01:08.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:01:08.46#ibcon#[27=USB\r\n] 2006.229.09:01:08.46#ibcon#*before write, iclass 19, count 0 2006.229.09:01:08.46#ibcon#enter sib2, iclass 19, count 0 2006.229.09:01:08.46#ibcon#flushed, iclass 19, count 0 2006.229.09:01:08.46#ibcon#about to write, iclass 19, count 0 2006.229.09:01:08.46#ibcon#wrote, iclass 19, count 0 2006.229.09:01:08.46#ibcon#about to read 3, iclass 19, count 0 2006.229.09:01:08.49#ibcon#read 3, iclass 19, count 0 2006.229.09:01:08.49#ibcon#about to read 4, iclass 19, count 0 2006.229.09:01:08.49#ibcon#read 4, iclass 19, count 0 2006.229.09:01:08.49#ibcon#about to read 5, iclass 19, count 0 2006.229.09:01:08.49#ibcon#read 5, iclass 19, count 0 2006.229.09:01:08.49#ibcon#about to read 6, iclass 19, count 0 2006.229.09:01:08.49#ibcon#read 6, iclass 19, count 0 2006.229.09:01:08.49#ibcon#end of sib2, iclass 19, count 0 2006.229.09:01:08.49#ibcon#*after write, iclass 19, count 0 2006.229.09:01:08.49#ibcon#*before return 0, iclass 19, count 0 2006.229.09:01:08.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:08.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:01:08.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:01:08.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:01:08.49$vck44/vblo=3,649.99 2006.229.09:01:08.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.09:01:08.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.09:01:08.49#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:08.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:08.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:08.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:08.49#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:01:08.49#ibcon#first serial, iclass 21, count 0 2006.229.09:01:08.49#ibcon#enter sib2, iclass 21, count 0 2006.229.09:01:08.49#ibcon#flushed, iclass 21, count 0 2006.229.09:01:08.49#ibcon#about to write, iclass 21, count 0 2006.229.09:01:08.49#ibcon#wrote, iclass 21, count 0 2006.229.09:01:08.49#ibcon#about to read 3, iclass 21, count 0 2006.229.09:01:08.51#ibcon#read 3, iclass 21, count 0 2006.229.09:01:08.51#ibcon#about to read 4, iclass 21, count 0 2006.229.09:01:08.51#ibcon#read 4, iclass 21, count 0 2006.229.09:01:08.51#ibcon#about to read 5, iclass 21, count 0 2006.229.09:01:08.51#ibcon#read 5, iclass 21, count 0 2006.229.09:01:08.51#ibcon#about to read 6, iclass 21, count 0 2006.229.09:01:08.51#ibcon#read 6, iclass 21, count 0 2006.229.09:01:08.51#ibcon#end of sib2, iclass 21, count 0 2006.229.09:01:08.51#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:01:08.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:01:08.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:01:08.51#ibcon#*before write, iclass 21, count 0 2006.229.09:01:08.51#ibcon#enter sib2, iclass 21, count 0 2006.229.09:01:08.51#ibcon#flushed, iclass 21, count 0 2006.229.09:01:08.51#ibcon#about to write, iclass 21, count 0 2006.229.09:01:08.51#ibcon#wrote, iclass 21, count 0 2006.229.09:01:08.51#ibcon#about to read 3, iclass 21, count 0 2006.229.09:01:08.55#ibcon#read 3, iclass 21, count 0 2006.229.09:01:08.55#ibcon#about to read 4, iclass 21, count 0 2006.229.09:01:08.55#ibcon#read 4, iclass 21, count 0 2006.229.09:01:08.55#ibcon#about to read 5, iclass 21, count 0 2006.229.09:01:08.55#ibcon#read 5, iclass 21, count 0 2006.229.09:01:08.55#ibcon#about to read 6, iclass 21, count 0 2006.229.09:01:08.55#ibcon#read 6, iclass 21, count 0 2006.229.09:01:08.55#ibcon#end of sib2, iclass 21, count 0 2006.229.09:01:08.55#ibcon#*after write, iclass 21, count 0 2006.229.09:01:08.55#ibcon#*before return 0, iclass 21, count 0 2006.229.09:01:08.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:08.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:01:08.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:01:08.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:01:08.55$vck44/vb=3,4 2006.229.09:01:08.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.09:01:08.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.09:01:08.55#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:08.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:08.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:08.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:08.61#ibcon#enter wrdev, iclass 23, count 2 2006.229.09:01:08.61#ibcon#first serial, iclass 23, count 2 2006.229.09:01:08.61#ibcon#enter sib2, iclass 23, count 2 2006.229.09:01:08.61#ibcon#flushed, iclass 23, count 2 2006.229.09:01:08.61#ibcon#about to write, iclass 23, count 2 2006.229.09:01:08.61#ibcon#wrote, iclass 23, count 2 2006.229.09:01:08.61#ibcon#about to read 3, iclass 23, count 2 2006.229.09:01:08.63#ibcon#read 3, iclass 23, count 2 2006.229.09:01:08.63#ibcon#about to read 4, iclass 23, count 2 2006.229.09:01:08.63#ibcon#read 4, iclass 23, count 2 2006.229.09:01:08.63#ibcon#about to read 5, iclass 23, count 2 2006.229.09:01:08.63#ibcon#read 5, iclass 23, count 2 2006.229.09:01:08.63#ibcon#about to read 6, iclass 23, count 2 2006.229.09:01:08.63#ibcon#read 6, iclass 23, count 2 2006.229.09:01:08.63#ibcon#end of sib2, iclass 23, count 2 2006.229.09:01:08.63#ibcon#*mode == 0, iclass 23, count 2 2006.229.09:01:08.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.09:01:08.63#ibcon#[27=AT03-04\r\n] 2006.229.09:01:08.63#ibcon#*before write, iclass 23, count 2 2006.229.09:01:08.63#ibcon#enter sib2, iclass 23, count 2 2006.229.09:01:08.63#ibcon#flushed, iclass 23, count 2 2006.229.09:01:08.63#ibcon#about to write, iclass 23, count 2 2006.229.09:01:08.63#ibcon#wrote, iclass 23, count 2 2006.229.09:01:08.63#ibcon#about to read 3, iclass 23, count 2 2006.229.09:01:08.66#ibcon#read 3, iclass 23, count 2 2006.229.09:01:08.66#ibcon#about to read 4, iclass 23, count 2 2006.229.09:01:08.66#ibcon#read 4, iclass 23, count 2 2006.229.09:01:08.66#ibcon#about to read 5, iclass 23, count 2 2006.229.09:01:08.66#ibcon#read 5, iclass 23, count 2 2006.229.09:01:08.66#ibcon#about to read 6, iclass 23, count 2 2006.229.09:01:08.66#ibcon#read 6, iclass 23, count 2 2006.229.09:01:08.66#ibcon#end of sib2, iclass 23, count 2 2006.229.09:01:08.66#ibcon#*after write, iclass 23, count 2 2006.229.09:01:08.66#ibcon#*before return 0, iclass 23, count 2 2006.229.09:01:08.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:08.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:01:08.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.09:01:08.66#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:08.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:08.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:08.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:08.78#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:01:08.78#ibcon#first serial, iclass 23, count 0 2006.229.09:01:08.78#ibcon#enter sib2, iclass 23, count 0 2006.229.09:01:08.78#ibcon#flushed, iclass 23, count 0 2006.229.09:01:08.78#ibcon#about to write, iclass 23, count 0 2006.229.09:01:08.78#ibcon#wrote, iclass 23, count 0 2006.229.09:01:08.78#ibcon#about to read 3, iclass 23, count 0 2006.229.09:01:08.80#ibcon#read 3, iclass 23, count 0 2006.229.09:01:08.80#ibcon#about to read 4, iclass 23, count 0 2006.229.09:01:08.80#ibcon#read 4, iclass 23, count 0 2006.229.09:01:08.80#ibcon#about to read 5, iclass 23, count 0 2006.229.09:01:08.80#ibcon#read 5, iclass 23, count 0 2006.229.09:01:08.80#ibcon#about to read 6, iclass 23, count 0 2006.229.09:01:08.80#ibcon#read 6, iclass 23, count 0 2006.229.09:01:08.80#ibcon#end of sib2, iclass 23, count 0 2006.229.09:01:08.80#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:01:08.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:01:08.80#ibcon#[27=USB\r\n] 2006.229.09:01:08.80#ibcon#*before write, iclass 23, count 0 2006.229.09:01:08.80#ibcon#enter sib2, iclass 23, count 0 2006.229.09:01:08.80#ibcon#flushed, iclass 23, count 0 2006.229.09:01:08.80#ibcon#about to write, iclass 23, count 0 2006.229.09:01:08.80#ibcon#wrote, iclass 23, count 0 2006.229.09:01:08.80#ibcon#about to read 3, iclass 23, count 0 2006.229.09:01:08.83#ibcon#read 3, iclass 23, count 0 2006.229.09:01:08.83#ibcon#about to read 4, iclass 23, count 0 2006.229.09:01:08.83#ibcon#read 4, iclass 23, count 0 2006.229.09:01:08.83#ibcon#about to read 5, iclass 23, count 0 2006.229.09:01:08.83#ibcon#read 5, iclass 23, count 0 2006.229.09:01:08.83#ibcon#about to read 6, iclass 23, count 0 2006.229.09:01:08.83#ibcon#read 6, iclass 23, count 0 2006.229.09:01:08.83#ibcon#end of sib2, iclass 23, count 0 2006.229.09:01:08.83#ibcon#*after write, iclass 23, count 0 2006.229.09:01:08.83#ibcon#*before return 0, iclass 23, count 0 2006.229.09:01:08.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:08.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:01:08.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:01:08.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:01:08.83$vck44/vblo=4,679.99 2006.229.09:01:08.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:01:08.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:01:08.83#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:08.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:08.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:08.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:08.83#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:01:08.83#ibcon#first serial, iclass 25, count 0 2006.229.09:01:08.83#ibcon#enter sib2, iclass 25, count 0 2006.229.09:01:08.83#ibcon#flushed, iclass 25, count 0 2006.229.09:01:08.83#ibcon#about to write, iclass 25, count 0 2006.229.09:01:08.83#ibcon#wrote, iclass 25, count 0 2006.229.09:01:08.83#ibcon#about to read 3, iclass 25, count 0 2006.229.09:01:08.85#ibcon#read 3, iclass 25, count 0 2006.229.09:01:08.85#ibcon#about to read 4, iclass 25, count 0 2006.229.09:01:08.85#ibcon#read 4, iclass 25, count 0 2006.229.09:01:08.85#ibcon#about to read 5, iclass 25, count 0 2006.229.09:01:08.85#ibcon#read 5, iclass 25, count 0 2006.229.09:01:08.85#ibcon#about to read 6, iclass 25, count 0 2006.229.09:01:08.85#ibcon#read 6, iclass 25, count 0 2006.229.09:01:08.85#ibcon#end of sib2, iclass 25, count 0 2006.229.09:01:08.85#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:01:08.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:01:08.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:01:08.85#ibcon#*before write, iclass 25, count 0 2006.229.09:01:08.85#ibcon#enter sib2, iclass 25, count 0 2006.229.09:01:08.85#ibcon#flushed, iclass 25, count 0 2006.229.09:01:08.85#ibcon#about to write, iclass 25, count 0 2006.229.09:01:08.85#ibcon#wrote, iclass 25, count 0 2006.229.09:01:08.85#ibcon#about to read 3, iclass 25, count 0 2006.229.09:01:08.89#ibcon#read 3, iclass 25, count 0 2006.229.09:01:08.89#ibcon#about to read 4, iclass 25, count 0 2006.229.09:01:08.89#ibcon#read 4, iclass 25, count 0 2006.229.09:01:08.89#ibcon#about to read 5, iclass 25, count 0 2006.229.09:01:08.89#ibcon#read 5, iclass 25, count 0 2006.229.09:01:08.89#ibcon#about to read 6, iclass 25, count 0 2006.229.09:01:08.89#ibcon#read 6, iclass 25, count 0 2006.229.09:01:08.89#ibcon#end of sib2, iclass 25, count 0 2006.229.09:01:08.89#ibcon#*after write, iclass 25, count 0 2006.229.09:01:08.89#ibcon#*before return 0, iclass 25, count 0 2006.229.09:01:08.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:08.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:01:08.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:01:08.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:01:08.89$vck44/vb=4,4 2006.229.09:01:08.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.09:01:08.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.09:01:08.89#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:08.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:08.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:08.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:08.95#ibcon#enter wrdev, iclass 27, count 2 2006.229.09:01:08.95#ibcon#first serial, iclass 27, count 2 2006.229.09:01:08.95#ibcon#enter sib2, iclass 27, count 2 2006.229.09:01:08.95#ibcon#flushed, iclass 27, count 2 2006.229.09:01:08.95#ibcon#about to write, iclass 27, count 2 2006.229.09:01:08.95#ibcon#wrote, iclass 27, count 2 2006.229.09:01:08.95#ibcon#about to read 3, iclass 27, count 2 2006.229.09:01:08.97#ibcon#read 3, iclass 27, count 2 2006.229.09:01:08.97#ibcon#about to read 4, iclass 27, count 2 2006.229.09:01:08.97#ibcon#read 4, iclass 27, count 2 2006.229.09:01:08.97#ibcon#about to read 5, iclass 27, count 2 2006.229.09:01:08.97#ibcon#read 5, iclass 27, count 2 2006.229.09:01:08.97#ibcon#about to read 6, iclass 27, count 2 2006.229.09:01:08.97#ibcon#read 6, iclass 27, count 2 2006.229.09:01:08.97#ibcon#end of sib2, iclass 27, count 2 2006.229.09:01:08.97#ibcon#*mode == 0, iclass 27, count 2 2006.229.09:01:08.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.09:01:08.97#ibcon#[27=AT04-04\r\n] 2006.229.09:01:08.97#ibcon#*before write, iclass 27, count 2 2006.229.09:01:08.97#ibcon#enter sib2, iclass 27, count 2 2006.229.09:01:08.97#ibcon#flushed, iclass 27, count 2 2006.229.09:01:08.97#ibcon#about to write, iclass 27, count 2 2006.229.09:01:08.97#ibcon#wrote, iclass 27, count 2 2006.229.09:01:08.97#ibcon#about to read 3, iclass 27, count 2 2006.229.09:01:09.00#ibcon#read 3, iclass 27, count 2 2006.229.09:01:09.00#ibcon#about to read 4, iclass 27, count 2 2006.229.09:01:09.00#ibcon#read 4, iclass 27, count 2 2006.229.09:01:09.00#ibcon#about to read 5, iclass 27, count 2 2006.229.09:01:09.00#ibcon#read 5, iclass 27, count 2 2006.229.09:01:09.00#ibcon#about to read 6, iclass 27, count 2 2006.229.09:01:09.00#ibcon#read 6, iclass 27, count 2 2006.229.09:01:09.00#ibcon#end of sib2, iclass 27, count 2 2006.229.09:01:09.00#ibcon#*after write, iclass 27, count 2 2006.229.09:01:09.00#ibcon#*before return 0, iclass 27, count 2 2006.229.09:01:09.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:09.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:01:09.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.09:01:09.00#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:09.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:09.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:09.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:09.12#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:01:09.12#ibcon#first serial, iclass 27, count 0 2006.229.09:01:09.12#ibcon#enter sib2, iclass 27, count 0 2006.229.09:01:09.12#ibcon#flushed, iclass 27, count 0 2006.229.09:01:09.12#ibcon#about to write, iclass 27, count 0 2006.229.09:01:09.12#ibcon#wrote, iclass 27, count 0 2006.229.09:01:09.12#ibcon#about to read 3, iclass 27, count 0 2006.229.09:01:09.14#ibcon#read 3, iclass 27, count 0 2006.229.09:01:09.14#ibcon#about to read 4, iclass 27, count 0 2006.229.09:01:09.14#ibcon#read 4, iclass 27, count 0 2006.229.09:01:09.14#ibcon#about to read 5, iclass 27, count 0 2006.229.09:01:09.14#ibcon#read 5, iclass 27, count 0 2006.229.09:01:09.14#ibcon#about to read 6, iclass 27, count 0 2006.229.09:01:09.14#ibcon#read 6, iclass 27, count 0 2006.229.09:01:09.14#ibcon#end of sib2, iclass 27, count 0 2006.229.09:01:09.14#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:01:09.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:01:09.14#ibcon#[27=USB\r\n] 2006.229.09:01:09.14#ibcon#*before write, iclass 27, count 0 2006.229.09:01:09.14#ibcon#enter sib2, iclass 27, count 0 2006.229.09:01:09.14#ibcon#flushed, iclass 27, count 0 2006.229.09:01:09.14#ibcon#about to write, iclass 27, count 0 2006.229.09:01:09.14#ibcon#wrote, iclass 27, count 0 2006.229.09:01:09.14#ibcon#about to read 3, iclass 27, count 0 2006.229.09:01:09.17#ibcon#read 3, iclass 27, count 0 2006.229.09:01:09.17#ibcon#about to read 4, iclass 27, count 0 2006.229.09:01:09.17#ibcon#read 4, iclass 27, count 0 2006.229.09:01:09.17#ibcon#about to read 5, iclass 27, count 0 2006.229.09:01:09.17#ibcon#read 5, iclass 27, count 0 2006.229.09:01:09.17#ibcon#about to read 6, iclass 27, count 0 2006.229.09:01:09.17#ibcon#read 6, iclass 27, count 0 2006.229.09:01:09.17#ibcon#end of sib2, iclass 27, count 0 2006.229.09:01:09.17#ibcon#*after write, iclass 27, count 0 2006.229.09:01:09.17#ibcon#*before return 0, iclass 27, count 0 2006.229.09:01:09.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:09.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:01:09.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:01:09.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:01:09.17$vck44/vblo=5,709.99 2006.229.09:01:09.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.09:01:09.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.09:01:09.17#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:09.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:09.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:09.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:09.17#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:01:09.17#ibcon#first serial, iclass 29, count 0 2006.229.09:01:09.17#ibcon#enter sib2, iclass 29, count 0 2006.229.09:01:09.17#ibcon#flushed, iclass 29, count 0 2006.229.09:01:09.17#ibcon#about to write, iclass 29, count 0 2006.229.09:01:09.17#ibcon#wrote, iclass 29, count 0 2006.229.09:01:09.17#ibcon#about to read 3, iclass 29, count 0 2006.229.09:01:09.19#ibcon#read 3, iclass 29, count 0 2006.229.09:01:09.19#ibcon#about to read 4, iclass 29, count 0 2006.229.09:01:09.19#ibcon#read 4, iclass 29, count 0 2006.229.09:01:09.19#ibcon#about to read 5, iclass 29, count 0 2006.229.09:01:09.19#ibcon#read 5, iclass 29, count 0 2006.229.09:01:09.19#ibcon#about to read 6, iclass 29, count 0 2006.229.09:01:09.19#ibcon#read 6, iclass 29, count 0 2006.229.09:01:09.19#ibcon#end of sib2, iclass 29, count 0 2006.229.09:01:09.19#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:01:09.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:01:09.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:01:09.19#ibcon#*before write, iclass 29, count 0 2006.229.09:01:09.19#ibcon#enter sib2, iclass 29, count 0 2006.229.09:01:09.19#ibcon#flushed, iclass 29, count 0 2006.229.09:01:09.19#ibcon#about to write, iclass 29, count 0 2006.229.09:01:09.19#ibcon#wrote, iclass 29, count 0 2006.229.09:01:09.19#ibcon#about to read 3, iclass 29, count 0 2006.229.09:01:09.23#ibcon#read 3, iclass 29, count 0 2006.229.09:01:09.23#ibcon#about to read 4, iclass 29, count 0 2006.229.09:01:09.23#ibcon#read 4, iclass 29, count 0 2006.229.09:01:09.23#ibcon#about to read 5, iclass 29, count 0 2006.229.09:01:09.23#ibcon#read 5, iclass 29, count 0 2006.229.09:01:09.23#ibcon#about to read 6, iclass 29, count 0 2006.229.09:01:09.23#ibcon#read 6, iclass 29, count 0 2006.229.09:01:09.23#ibcon#end of sib2, iclass 29, count 0 2006.229.09:01:09.23#ibcon#*after write, iclass 29, count 0 2006.229.09:01:09.23#ibcon#*before return 0, iclass 29, count 0 2006.229.09:01:09.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:09.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:01:09.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:01:09.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:01:09.23$vck44/vb=5,4 2006.229.09:01:09.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.09:01:09.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.09:01:09.23#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:09.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:09.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:09.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:09.29#ibcon#enter wrdev, iclass 31, count 2 2006.229.09:01:09.29#ibcon#first serial, iclass 31, count 2 2006.229.09:01:09.29#ibcon#enter sib2, iclass 31, count 2 2006.229.09:01:09.29#ibcon#flushed, iclass 31, count 2 2006.229.09:01:09.29#ibcon#about to write, iclass 31, count 2 2006.229.09:01:09.29#ibcon#wrote, iclass 31, count 2 2006.229.09:01:09.29#ibcon#about to read 3, iclass 31, count 2 2006.229.09:01:09.31#ibcon#read 3, iclass 31, count 2 2006.229.09:01:09.31#ibcon#about to read 4, iclass 31, count 2 2006.229.09:01:09.31#ibcon#read 4, iclass 31, count 2 2006.229.09:01:09.31#ibcon#about to read 5, iclass 31, count 2 2006.229.09:01:09.31#ibcon#read 5, iclass 31, count 2 2006.229.09:01:09.31#ibcon#about to read 6, iclass 31, count 2 2006.229.09:01:09.31#ibcon#read 6, iclass 31, count 2 2006.229.09:01:09.31#ibcon#end of sib2, iclass 31, count 2 2006.229.09:01:09.31#ibcon#*mode == 0, iclass 31, count 2 2006.229.09:01:09.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.09:01:09.31#ibcon#[27=AT05-04\r\n] 2006.229.09:01:09.31#ibcon#*before write, iclass 31, count 2 2006.229.09:01:09.31#ibcon#enter sib2, iclass 31, count 2 2006.229.09:01:09.31#ibcon#flushed, iclass 31, count 2 2006.229.09:01:09.31#ibcon#about to write, iclass 31, count 2 2006.229.09:01:09.31#ibcon#wrote, iclass 31, count 2 2006.229.09:01:09.31#ibcon#about to read 3, iclass 31, count 2 2006.229.09:01:09.34#ibcon#read 3, iclass 31, count 2 2006.229.09:01:09.34#ibcon#about to read 4, iclass 31, count 2 2006.229.09:01:09.34#ibcon#read 4, iclass 31, count 2 2006.229.09:01:09.34#ibcon#about to read 5, iclass 31, count 2 2006.229.09:01:09.34#ibcon#read 5, iclass 31, count 2 2006.229.09:01:09.34#ibcon#about to read 6, iclass 31, count 2 2006.229.09:01:09.34#ibcon#read 6, iclass 31, count 2 2006.229.09:01:09.34#ibcon#end of sib2, iclass 31, count 2 2006.229.09:01:09.34#ibcon#*after write, iclass 31, count 2 2006.229.09:01:09.34#ibcon#*before return 0, iclass 31, count 2 2006.229.09:01:09.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:09.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:01:09.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.09:01:09.34#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:09.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:09.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:09.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:09.46#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:01:09.46#ibcon#first serial, iclass 31, count 0 2006.229.09:01:09.46#ibcon#enter sib2, iclass 31, count 0 2006.229.09:01:09.46#ibcon#flushed, iclass 31, count 0 2006.229.09:01:09.46#ibcon#about to write, iclass 31, count 0 2006.229.09:01:09.46#ibcon#wrote, iclass 31, count 0 2006.229.09:01:09.46#ibcon#about to read 3, iclass 31, count 0 2006.229.09:01:09.48#ibcon#read 3, iclass 31, count 0 2006.229.09:01:09.48#ibcon#about to read 4, iclass 31, count 0 2006.229.09:01:09.48#ibcon#read 4, iclass 31, count 0 2006.229.09:01:09.48#ibcon#about to read 5, iclass 31, count 0 2006.229.09:01:09.48#ibcon#read 5, iclass 31, count 0 2006.229.09:01:09.48#ibcon#about to read 6, iclass 31, count 0 2006.229.09:01:09.48#ibcon#read 6, iclass 31, count 0 2006.229.09:01:09.48#ibcon#end of sib2, iclass 31, count 0 2006.229.09:01:09.48#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:01:09.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:01:09.48#ibcon#[27=USB\r\n] 2006.229.09:01:09.48#ibcon#*before write, iclass 31, count 0 2006.229.09:01:09.48#ibcon#enter sib2, iclass 31, count 0 2006.229.09:01:09.48#ibcon#flushed, iclass 31, count 0 2006.229.09:01:09.48#ibcon#about to write, iclass 31, count 0 2006.229.09:01:09.48#ibcon#wrote, iclass 31, count 0 2006.229.09:01:09.48#ibcon#about to read 3, iclass 31, count 0 2006.229.09:01:09.51#ibcon#read 3, iclass 31, count 0 2006.229.09:01:09.51#ibcon#about to read 4, iclass 31, count 0 2006.229.09:01:09.51#ibcon#read 4, iclass 31, count 0 2006.229.09:01:09.51#ibcon#about to read 5, iclass 31, count 0 2006.229.09:01:09.51#ibcon#read 5, iclass 31, count 0 2006.229.09:01:09.51#ibcon#about to read 6, iclass 31, count 0 2006.229.09:01:09.51#ibcon#read 6, iclass 31, count 0 2006.229.09:01:09.51#ibcon#end of sib2, iclass 31, count 0 2006.229.09:01:09.51#ibcon#*after write, iclass 31, count 0 2006.229.09:01:09.51#ibcon#*before return 0, iclass 31, count 0 2006.229.09:01:09.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:09.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:01:09.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:01:09.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:01:09.51$vck44/vblo=6,719.99 2006.229.09:01:09.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.09:01:09.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.09:01:09.51#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:09.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:09.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:09.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:09.51#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:01:09.51#ibcon#first serial, iclass 33, count 0 2006.229.09:01:09.51#ibcon#enter sib2, iclass 33, count 0 2006.229.09:01:09.51#ibcon#flushed, iclass 33, count 0 2006.229.09:01:09.51#ibcon#about to write, iclass 33, count 0 2006.229.09:01:09.51#ibcon#wrote, iclass 33, count 0 2006.229.09:01:09.51#ibcon#about to read 3, iclass 33, count 0 2006.229.09:01:09.53#ibcon#read 3, iclass 33, count 0 2006.229.09:01:09.53#ibcon#about to read 4, iclass 33, count 0 2006.229.09:01:09.53#ibcon#read 4, iclass 33, count 0 2006.229.09:01:09.53#ibcon#about to read 5, iclass 33, count 0 2006.229.09:01:09.53#ibcon#read 5, iclass 33, count 0 2006.229.09:01:09.53#ibcon#about to read 6, iclass 33, count 0 2006.229.09:01:09.53#ibcon#read 6, iclass 33, count 0 2006.229.09:01:09.53#ibcon#end of sib2, iclass 33, count 0 2006.229.09:01:09.53#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:01:09.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:01:09.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:01:09.53#ibcon#*before write, iclass 33, count 0 2006.229.09:01:09.53#ibcon#enter sib2, iclass 33, count 0 2006.229.09:01:09.53#ibcon#flushed, iclass 33, count 0 2006.229.09:01:09.53#ibcon#about to write, iclass 33, count 0 2006.229.09:01:09.53#ibcon#wrote, iclass 33, count 0 2006.229.09:01:09.53#ibcon#about to read 3, iclass 33, count 0 2006.229.09:01:09.57#ibcon#read 3, iclass 33, count 0 2006.229.09:01:09.57#ibcon#about to read 4, iclass 33, count 0 2006.229.09:01:09.57#ibcon#read 4, iclass 33, count 0 2006.229.09:01:09.57#ibcon#about to read 5, iclass 33, count 0 2006.229.09:01:09.57#ibcon#read 5, iclass 33, count 0 2006.229.09:01:09.57#ibcon#about to read 6, iclass 33, count 0 2006.229.09:01:09.57#ibcon#read 6, iclass 33, count 0 2006.229.09:01:09.57#ibcon#end of sib2, iclass 33, count 0 2006.229.09:01:09.57#ibcon#*after write, iclass 33, count 0 2006.229.09:01:09.57#ibcon#*before return 0, iclass 33, count 0 2006.229.09:01:09.57#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:09.57#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:01:09.57#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:01:09.57#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:01:09.57$vck44/vb=6,4 2006.229.09:01:09.57#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.09:01:09.57#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.09:01:09.57#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:09.57#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:09.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:09.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:09.63#ibcon#enter wrdev, iclass 35, count 2 2006.229.09:01:09.63#ibcon#first serial, iclass 35, count 2 2006.229.09:01:09.63#ibcon#enter sib2, iclass 35, count 2 2006.229.09:01:09.63#ibcon#flushed, iclass 35, count 2 2006.229.09:01:09.63#ibcon#about to write, iclass 35, count 2 2006.229.09:01:09.63#ibcon#wrote, iclass 35, count 2 2006.229.09:01:09.63#ibcon#about to read 3, iclass 35, count 2 2006.229.09:01:09.65#ibcon#read 3, iclass 35, count 2 2006.229.09:01:09.65#ibcon#about to read 4, iclass 35, count 2 2006.229.09:01:09.65#ibcon#read 4, iclass 35, count 2 2006.229.09:01:09.65#ibcon#about to read 5, iclass 35, count 2 2006.229.09:01:09.65#ibcon#read 5, iclass 35, count 2 2006.229.09:01:09.65#ibcon#about to read 6, iclass 35, count 2 2006.229.09:01:09.65#ibcon#read 6, iclass 35, count 2 2006.229.09:01:09.65#ibcon#end of sib2, iclass 35, count 2 2006.229.09:01:09.65#ibcon#*mode == 0, iclass 35, count 2 2006.229.09:01:09.65#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.09:01:09.65#ibcon#[27=AT06-04\r\n] 2006.229.09:01:09.65#ibcon#*before write, iclass 35, count 2 2006.229.09:01:09.65#ibcon#enter sib2, iclass 35, count 2 2006.229.09:01:09.65#ibcon#flushed, iclass 35, count 2 2006.229.09:01:09.65#ibcon#about to write, iclass 35, count 2 2006.229.09:01:09.65#ibcon#wrote, iclass 35, count 2 2006.229.09:01:09.65#ibcon#about to read 3, iclass 35, count 2 2006.229.09:01:09.68#ibcon#read 3, iclass 35, count 2 2006.229.09:01:09.68#ibcon#about to read 4, iclass 35, count 2 2006.229.09:01:09.68#ibcon#read 4, iclass 35, count 2 2006.229.09:01:09.68#ibcon#about to read 5, iclass 35, count 2 2006.229.09:01:09.68#ibcon#read 5, iclass 35, count 2 2006.229.09:01:09.68#ibcon#about to read 6, iclass 35, count 2 2006.229.09:01:09.68#ibcon#read 6, iclass 35, count 2 2006.229.09:01:09.68#ibcon#end of sib2, iclass 35, count 2 2006.229.09:01:09.68#ibcon#*after write, iclass 35, count 2 2006.229.09:01:09.68#ibcon#*before return 0, iclass 35, count 2 2006.229.09:01:09.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:09.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:01:09.68#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.09:01:09.68#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:09.68#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:09.80#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:09.80#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:09.80#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:01:09.80#ibcon#first serial, iclass 35, count 0 2006.229.09:01:09.80#ibcon#enter sib2, iclass 35, count 0 2006.229.09:01:09.80#ibcon#flushed, iclass 35, count 0 2006.229.09:01:09.80#ibcon#about to write, iclass 35, count 0 2006.229.09:01:09.80#ibcon#wrote, iclass 35, count 0 2006.229.09:01:09.80#ibcon#about to read 3, iclass 35, count 0 2006.229.09:01:09.82#ibcon#read 3, iclass 35, count 0 2006.229.09:01:09.82#ibcon#about to read 4, iclass 35, count 0 2006.229.09:01:09.82#ibcon#read 4, iclass 35, count 0 2006.229.09:01:09.82#ibcon#about to read 5, iclass 35, count 0 2006.229.09:01:09.82#ibcon#read 5, iclass 35, count 0 2006.229.09:01:09.82#ibcon#about to read 6, iclass 35, count 0 2006.229.09:01:09.82#ibcon#read 6, iclass 35, count 0 2006.229.09:01:09.82#ibcon#end of sib2, iclass 35, count 0 2006.229.09:01:09.82#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:01:09.82#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:01:09.82#ibcon#[27=USB\r\n] 2006.229.09:01:09.82#ibcon#*before write, iclass 35, count 0 2006.229.09:01:09.82#ibcon#enter sib2, iclass 35, count 0 2006.229.09:01:09.82#ibcon#flushed, iclass 35, count 0 2006.229.09:01:09.82#ibcon#about to write, iclass 35, count 0 2006.229.09:01:09.82#ibcon#wrote, iclass 35, count 0 2006.229.09:01:09.82#ibcon#about to read 3, iclass 35, count 0 2006.229.09:01:09.85#ibcon#read 3, iclass 35, count 0 2006.229.09:01:09.85#ibcon#about to read 4, iclass 35, count 0 2006.229.09:01:09.85#ibcon#read 4, iclass 35, count 0 2006.229.09:01:09.85#ibcon#about to read 5, iclass 35, count 0 2006.229.09:01:09.85#ibcon#read 5, iclass 35, count 0 2006.229.09:01:09.85#ibcon#about to read 6, iclass 35, count 0 2006.229.09:01:09.85#ibcon#read 6, iclass 35, count 0 2006.229.09:01:09.85#ibcon#end of sib2, iclass 35, count 0 2006.229.09:01:09.85#ibcon#*after write, iclass 35, count 0 2006.229.09:01:09.85#ibcon#*before return 0, iclass 35, count 0 2006.229.09:01:09.85#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:09.85#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:01:09.85#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:01:09.85#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:01:09.85$vck44/vblo=7,734.99 2006.229.09:01:09.85#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.09:01:09.85#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.09:01:09.85#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:09.85#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:09.85#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:09.85#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:09.85#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:01:09.85#ibcon#first serial, iclass 37, count 0 2006.229.09:01:09.85#ibcon#enter sib2, iclass 37, count 0 2006.229.09:01:09.85#ibcon#flushed, iclass 37, count 0 2006.229.09:01:09.85#ibcon#about to write, iclass 37, count 0 2006.229.09:01:09.85#ibcon#wrote, iclass 37, count 0 2006.229.09:01:09.85#ibcon#about to read 3, iclass 37, count 0 2006.229.09:01:09.87#ibcon#read 3, iclass 37, count 0 2006.229.09:01:09.87#ibcon#about to read 4, iclass 37, count 0 2006.229.09:01:09.87#ibcon#read 4, iclass 37, count 0 2006.229.09:01:09.87#ibcon#about to read 5, iclass 37, count 0 2006.229.09:01:09.87#ibcon#read 5, iclass 37, count 0 2006.229.09:01:09.87#ibcon#about to read 6, iclass 37, count 0 2006.229.09:01:09.87#ibcon#read 6, iclass 37, count 0 2006.229.09:01:09.87#ibcon#end of sib2, iclass 37, count 0 2006.229.09:01:09.87#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:01:09.87#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:01:09.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:01:09.87#ibcon#*before write, iclass 37, count 0 2006.229.09:01:09.87#ibcon#enter sib2, iclass 37, count 0 2006.229.09:01:09.87#ibcon#flushed, iclass 37, count 0 2006.229.09:01:09.87#ibcon#about to write, iclass 37, count 0 2006.229.09:01:09.87#ibcon#wrote, iclass 37, count 0 2006.229.09:01:09.87#ibcon#about to read 3, iclass 37, count 0 2006.229.09:01:09.91#ibcon#read 3, iclass 37, count 0 2006.229.09:01:09.91#ibcon#about to read 4, iclass 37, count 0 2006.229.09:01:09.91#ibcon#read 4, iclass 37, count 0 2006.229.09:01:09.91#ibcon#about to read 5, iclass 37, count 0 2006.229.09:01:09.91#ibcon#read 5, iclass 37, count 0 2006.229.09:01:09.91#ibcon#about to read 6, iclass 37, count 0 2006.229.09:01:09.91#ibcon#read 6, iclass 37, count 0 2006.229.09:01:09.91#ibcon#end of sib2, iclass 37, count 0 2006.229.09:01:09.91#ibcon#*after write, iclass 37, count 0 2006.229.09:01:09.91#ibcon#*before return 0, iclass 37, count 0 2006.229.09:01:09.91#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:09.91#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:01:09.91#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:01:09.91#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:01:09.91$vck44/vb=7,4 2006.229.09:01:09.91#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.09:01:09.91#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.09:01:09.91#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:09.91#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:09.97#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:09.97#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:09.97#ibcon#enter wrdev, iclass 39, count 2 2006.229.09:01:09.97#ibcon#first serial, iclass 39, count 2 2006.229.09:01:09.97#ibcon#enter sib2, iclass 39, count 2 2006.229.09:01:09.97#ibcon#flushed, iclass 39, count 2 2006.229.09:01:09.97#ibcon#about to write, iclass 39, count 2 2006.229.09:01:09.97#ibcon#wrote, iclass 39, count 2 2006.229.09:01:09.97#ibcon#about to read 3, iclass 39, count 2 2006.229.09:01:09.99#ibcon#read 3, iclass 39, count 2 2006.229.09:01:09.99#ibcon#about to read 4, iclass 39, count 2 2006.229.09:01:09.99#ibcon#read 4, iclass 39, count 2 2006.229.09:01:09.99#ibcon#about to read 5, iclass 39, count 2 2006.229.09:01:09.99#ibcon#read 5, iclass 39, count 2 2006.229.09:01:09.99#ibcon#about to read 6, iclass 39, count 2 2006.229.09:01:09.99#ibcon#read 6, iclass 39, count 2 2006.229.09:01:09.99#ibcon#end of sib2, iclass 39, count 2 2006.229.09:01:09.99#ibcon#*mode == 0, iclass 39, count 2 2006.229.09:01:09.99#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.09:01:09.99#ibcon#[27=AT07-04\r\n] 2006.229.09:01:09.99#ibcon#*before write, iclass 39, count 2 2006.229.09:01:09.99#ibcon#enter sib2, iclass 39, count 2 2006.229.09:01:09.99#ibcon#flushed, iclass 39, count 2 2006.229.09:01:09.99#ibcon#about to write, iclass 39, count 2 2006.229.09:01:09.99#ibcon#wrote, iclass 39, count 2 2006.229.09:01:09.99#ibcon#about to read 3, iclass 39, count 2 2006.229.09:01:10.02#ibcon#read 3, iclass 39, count 2 2006.229.09:01:10.02#ibcon#about to read 4, iclass 39, count 2 2006.229.09:01:10.02#ibcon#read 4, iclass 39, count 2 2006.229.09:01:10.02#ibcon#about to read 5, iclass 39, count 2 2006.229.09:01:10.02#ibcon#read 5, iclass 39, count 2 2006.229.09:01:10.02#ibcon#about to read 6, iclass 39, count 2 2006.229.09:01:10.02#ibcon#read 6, iclass 39, count 2 2006.229.09:01:10.02#ibcon#end of sib2, iclass 39, count 2 2006.229.09:01:10.02#ibcon#*after write, iclass 39, count 2 2006.229.09:01:10.02#ibcon#*before return 0, iclass 39, count 2 2006.229.09:01:10.02#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:10.02#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:01:10.02#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.09:01:10.02#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:10.02#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:10.14#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:10.14#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:10.14#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:01:10.14#ibcon#first serial, iclass 39, count 0 2006.229.09:01:10.14#ibcon#enter sib2, iclass 39, count 0 2006.229.09:01:10.14#ibcon#flushed, iclass 39, count 0 2006.229.09:01:10.14#ibcon#about to write, iclass 39, count 0 2006.229.09:01:10.14#ibcon#wrote, iclass 39, count 0 2006.229.09:01:10.14#ibcon#about to read 3, iclass 39, count 0 2006.229.09:01:10.16#ibcon#read 3, iclass 39, count 0 2006.229.09:01:10.16#ibcon#about to read 4, iclass 39, count 0 2006.229.09:01:10.16#ibcon#read 4, iclass 39, count 0 2006.229.09:01:10.16#ibcon#about to read 5, iclass 39, count 0 2006.229.09:01:10.16#ibcon#read 5, iclass 39, count 0 2006.229.09:01:10.16#ibcon#about to read 6, iclass 39, count 0 2006.229.09:01:10.16#ibcon#read 6, iclass 39, count 0 2006.229.09:01:10.16#ibcon#end of sib2, iclass 39, count 0 2006.229.09:01:10.16#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:01:10.16#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:01:10.16#ibcon#[27=USB\r\n] 2006.229.09:01:10.16#ibcon#*before write, iclass 39, count 0 2006.229.09:01:10.16#ibcon#enter sib2, iclass 39, count 0 2006.229.09:01:10.16#ibcon#flushed, iclass 39, count 0 2006.229.09:01:10.16#ibcon#about to write, iclass 39, count 0 2006.229.09:01:10.16#ibcon#wrote, iclass 39, count 0 2006.229.09:01:10.16#ibcon#about to read 3, iclass 39, count 0 2006.229.09:01:10.19#ibcon#read 3, iclass 39, count 0 2006.229.09:01:10.19#ibcon#about to read 4, iclass 39, count 0 2006.229.09:01:10.19#ibcon#read 4, iclass 39, count 0 2006.229.09:01:10.19#ibcon#about to read 5, iclass 39, count 0 2006.229.09:01:10.19#ibcon#read 5, iclass 39, count 0 2006.229.09:01:10.19#ibcon#about to read 6, iclass 39, count 0 2006.229.09:01:10.19#ibcon#read 6, iclass 39, count 0 2006.229.09:01:10.19#ibcon#end of sib2, iclass 39, count 0 2006.229.09:01:10.19#ibcon#*after write, iclass 39, count 0 2006.229.09:01:10.19#ibcon#*before return 0, iclass 39, count 0 2006.229.09:01:10.19#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:10.19#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:01:10.19#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:01:10.19#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:01:10.19$vck44/vblo=8,744.99 2006.229.09:01:10.19#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:01:10.19#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:01:10.19#ibcon#ireg 17 cls_cnt 0 2006.229.09:01:10.19#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:10.19#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:10.19#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:10.19#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:01:10.19#ibcon#first serial, iclass 3, count 0 2006.229.09:01:10.19#ibcon#enter sib2, iclass 3, count 0 2006.229.09:01:10.19#ibcon#flushed, iclass 3, count 0 2006.229.09:01:10.19#ibcon#about to write, iclass 3, count 0 2006.229.09:01:10.19#ibcon#wrote, iclass 3, count 0 2006.229.09:01:10.19#ibcon#about to read 3, iclass 3, count 0 2006.229.09:01:10.21#ibcon#read 3, iclass 3, count 0 2006.229.09:01:10.21#ibcon#about to read 4, iclass 3, count 0 2006.229.09:01:10.21#ibcon#read 4, iclass 3, count 0 2006.229.09:01:10.21#ibcon#about to read 5, iclass 3, count 0 2006.229.09:01:10.21#ibcon#read 5, iclass 3, count 0 2006.229.09:01:10.21#ibcon#about to read 6, iclass 3, count 0 2006.229.09:01:10.21#ibcon#read 6, iclass 3, count 0 2006.229.09:01:10.21#ibcon#end of sib2, iclass 3, count 0 2006.229.09:01:10.21#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:01:10.21#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:01:10.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:01:10.21#ibcon#*before write, iclass 3, count 0 2006.229.09:01:10.21#ibcon#enter sib2, iclass 3, count 0 2006.229.09:01:10.21#ibcon#flushed, iclass 3, count 0 2006.229.09:01:10.21#ibcon#about to write, iclass 3, count 0 2006.229.09:01:10.21#ibcon#wrote, iclass 3, count 0 2006.229.09:01:10.21#ibcon#about to read 3, iclass 3, count 0 2006.229.09:01:10.25#ibcon#read 3, iclass 3, count 0 2006.229.09:01:10.25#ibcon#about to read 4, iclass 3, count 0 2006.229.09:01:10.25#ibcon#read 4, iclass 3, count 0 2006.229.09:01:10.25#ibcon#about to read 5, iclass 3, count 0 2006.229.09:01:10.25#ibcon#read 5, iclass 3, count 0 2006.229.09:01:10.25#ibcon#about to read 6, iclass 3, count 0 2006.229.09:01:10.25#ibcon#read 6, iclass 3, count 0 2006.229.09:01:10.25#ibcon#end of sib2, iclass 3, count 0 2006.229.09:01:10.25#ibcon#*after write, iclass 3, count 0 2006.229.09:01:10.25#ibcon#*before return 0, iclass 3, count 0 2006.229.09:01:10.25#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:10.25#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:01:10.25#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:01:10.25#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:01:10.25$vck44/vb=8,4 2006.229.09:01:10.25#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.09:01:10.25#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.09:01:10.25#ibcon#ireg 11 cls_cnt 2 2006.229.09:01:10.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:10.31#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:10.31#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:10.31#ibcon#enter wrdev, iclass 5, count 2 2006.229.09:01:10.31#ibcon#first serial, iclass 5, count 2 2006.229.09:01:10.31#ibcon#enter sib2, iclass 5, count 2 2006.229.09:01:10.31#ibcon#flushed, iclass 5, count 2 2006.229.09:01:10.31#ibcon#about to write, iclass 5, count 2 2006.229.09:01:10.31#ibcon#wrote, iclass 5, count 2 2006.229.09:01:10.31#ibcon#about to read 3, iclass 5, count 2 2006.229.09:01:10.33#ibcon#read 3, iclass 5, count 2 2006.229.09:01:10.33#ibcon#about to read 4, iclass 5, count 2 2006.229.09:01:10.33#ibcon#read 4, iclass 5, count 2 2006.229.09:01:10.33#ibcon#about to read 5, iclass 5, count 2 2006.229.09:01:10.33#ibcon#read 5, iclass 5, count 2 2006.229.09:01:10.33#ibcon#about to read 6, iclass 5, count 2 2006.229.09:01:10.33#ibcon#read 6, iclass 5, count 2 2006.229.09:01:10.33#ibcon#end of sib2, iclass 5, count 2 2006.229.09:01:10.33#ibcon#*mode == 0, iclass 5, count 2 2006.229.09:01:10.33#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.09:01:10.33#ibcon#[27=AT08-04\r\n] 2006.229.09:01:10.33#ibcon#*before write, iclass 5, count 2 2006.229.09:01:10.33#ibcon#enter sib2, iclass 5, count 2 2006.229.09:01:10.33#ibcon#flushed, iclass 5, count 2 2006.229.09:01:10.33#ibcon#about to write, iclass 5, count 2 2006.229.09:01:10.33#ibcon#wrote, iclass 5, count 2 2006.229.09:01:10.33#ibcon#about to read 3, iclass 5, count 2 2006.229.09:01:10.36#ibcon#read 3, iclass 5, count 2 2006.229.09:01:10.36#ibcon#about to read 4, iclass 5, count 2 2006.229.09:01:10.36#ibcon#read 4, iclass 5, count 2 2006.229.09:01:10.36#ibcon#about to read 5, iclass 5, count 2 2006.229.09:01:10.36#ibcon#read 5, iclass 5, count 2 2006.229.09:01:10.36#ibcon#about to read 6, iclass 5, count 2 2006.229.09:01:10.36#ibcon#read 6, iclass 5, count 2 2006.229.09:01:10.36#ibcon#end of sib2, iclass 5, count 2 2006.229.09:01:10.36#ibcon#*after write, iclass 5, count 2 2006.229.09:01:10.36#ibcon#*before return 0, iclass 5, count 2 2006.229.09:01:10.36#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:10.36#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:01:10.36#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.09:01:10.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:01:10.36#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:10.48#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:10.48#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:10.48#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:01:10.48#ibcon#first serial, iclass 5, count 0 2006.229.09:01:10.48#ibcon#enter sib2, iclass 5, count 0 2006.229.09:01:10.48#ibcon#flushed, iclass 5, count 0 2006.229.09:01:10.48#ibcon#about to write, iclass 5, count 0 2006.229.09:01:10.48#ibcon#wrote, iclass 5, count 0 2006.229.09:01:10.48#ibcon#about to read 3, iclass 5, count 0 2006.229.09:01:10.50#ibcon#read 3, iclass 5, count 0 2006.229.09:01:10.50#ibcon#about to read 4, iclass 5, count 0 2006.229.09:01:10.50#ibcon#read 4, iclass 5, count 0 2006.229.09:01:10.50#ibcon#about to read 5, iclass 5, count 0 2006.229.09:01:10.50#ibcon#read 5, iclass 5, count 0 2006.229.09:01:10.50#ibcon#about to read 6, iclass 5, count 0 2006.229.09:01:10.50#ibcon#read 6, iclass 5, count 0 2006.229.09:01:10.50#ibcon#end of sib2, iclass 5, count 0 2006.229.09:01:10.50#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:01:10.50#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:01:10.50#ibcon#[27=USB\r\n] 2006.229.09:01:10.50#ibcon#*before write, iclass 5, count 0 2006.229.09:01:10.50#ibcon#enter sib2, iclass 5, count 0 2006.229.09:01:10.50#ibcon#flushed, iclass 5, count 0 2006.229.09:01:10.50#ibcon#about to write, iclass 5, count 0 2006.229.09:01:10.50#ibcon#wrote, iclass 5, count 0 2006.229.09:01:10.50#ibcon#about to read 3, iclass 5, count 0 2006.229.09:01:10.53#ibcon#read 3, iclass 5, count 0 2006.229.09:01:10.53#ibcon#about to read 4, iclass 5, count 0 2006.229.09:01:10.53#ibcon#read 4, iclass 5, count 0 2006.229.09:01:10.53#ibcon#about to read 5, iclass 5, count 0 2006.229.09:01:10.53#ibcon#read 5, iclass 5, count 0 2006.229.09:01:10.53#ibcon#about to read 6, iclass 5, count 0 2006.229.09:01:10.53#ibcon#read 6, iclass 5, count 0 2006.229.09:01:10.53#ibcon#end of sib2, iclass 5, count 0 2006.229.09:01:10.53#ibcon#*after write, iclass 5, count 0 2006.229.09:01:10.53#ibcon#*before return 0, iclass 5, count 0 2006.229.09:01:10.53#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:10.53#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:01:10.53#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:01:10.53#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:01:10.53$vck44/vabw=wide 2006.229.09:01:10.53#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.09:01:10.53#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.09:01:10.53#ibcon#ireg 8 cls_cnt 0 2006.229.09:01:10.53#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:10.53#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:10.53#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:10.53#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:01:10.53#ibcon#first serial, iclass 7, count 0 2006.229.09:01:10.53#ibcon#enter sib2, iclass 7, count 0 2006.229.09:01:10.53#ibcon#flushed, iclass 7, count 0 2006.229.09:01:10.53#ibcon#about to write, iclass 7, count 0 2006.229.09:01:10.53#ibcon#wrote, iclass 7, count 0 2006.229.09:01:10.53#ibcon#about to read 3, iclass 7, count 0 2006.229.09:01:10.55#ibcon#read 3, iclass 7, count 0 2006.229.09:01:10.55#ibcon#about to read 4, iclass 7, count 0 2006.229.09:01:10.55#ibcon#read 4, iclass 7, count 0 2006.229.09:01:10.55#ibcon#about to read 5, iclass 7, count 0 2006.229.09:01:10.55#ibcon#read 5, iclass 7, count 0 2006.229.09:01:10.55#ibcon#about to read 6, iclass 7, count 0 2006.229.09:01:10.55#ibcon#read 6, iclass 7, count 0 2006.229.09:01:10.55#ibcon#end of sib2, iclass 7, count 0 2006.229.09:01:10.55#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:01:10.55#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:01:10.55#ibcon#[25=BW32\r\n] 2006.229.09:01:10.55#ibcon#*before write, iclass 7, count 0 2006.229.09:01:10.55#ibcon#enter sib2, iclass 7, count 0 2006.229.09:01:10.55#ibcon#flushed, iclass 7, count 0 2006.229.09:01:10.55#ibcon#about to write, iclass 7, count 0 2006.229.09:01:10.55#ibcon#wrote, iclass 7, count 0 2006.229.09:01:10.55#ibcon#about to read 3, iclass 7, count 0 2006.229.09:01:10.58#ibcon#read 3, iclass 7, count 0 2006.229.09:01:10.58#ibcon#about to read 4, iclass 7, count 0 2006.229.09:01:10.58#ibcon#read 4, iclass 7, count 0 2006.229.09:01:10.58#ibcon#about to read 5, iclass 7, count 0 2006.229.09:01:10.58#ibcon#read 5, iclass 7, count 0 2006.229.09:01:10.58#ibcon#about to read 6, iclass 7, count 0 2006.229.09:01:10.58#ibcon#read 6, iclass 7, count 0 2006.229.09:01:10.58#ibcon#end of sib2, iclass 7, count 0 2006.229.09:01:10.58#ibcon#*after write, iclass 7, count 0 2006.229.09:01:10.58#ibcon#*before return 0, iclass 7, count 0 2006.229.09:01:10.58#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:10.58#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:01:10.58#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:01:10.58#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:01:10.58$vck44/vbbw=wide 2006.229.09:01:10.58#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:01:10.58#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:01:10.58#ibcon#ireg 8 cls_cnt 0 2006.229.09:01:10.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:01:10.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:01:10.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:01:10.65#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:01:10.65#ibcon#first serial, iclass 11, count 0 2006.229.09:01:10.65#ibcon#enter sib2, iclass 11, count 0 2006.229.09:01:10.65#ibcon#flushed, iclass 11, count 0 2006.229.09:01:10.65#ibcon#about to write, iclass 11, count 0 2006.229.09:01:10.65#ibcon#wrote, iclass 11, count 0 2006.229.09:01:10.65#ibcon#about to read 3, iclass 11, count 0 2006.229.09:01:10.67#ibcon#read 3, iclass 11, count 0 2006.229.09:01:10.67#ibcon#about to read 4, iclass 11, count 0 2006.229.09:01:10.67#ibcon#read 4, iclass 11, count 0 2006.229.09:01:10.67#ibcon#about to read 5, iclass 11, count 0 2006.229.09:01:10.67#ibcon#read 5, iclass 11, count 0 2006.229.09:01:10.67#ibcon#about to read 6, iclass 11, count 0 2006.229.09:01:10.67#ibcon#read 6, iclass 11, count 0 2006.229.09:01:10.67#ibcon#end of sib2, iclass 11, count 0 2006.229.09:01:10.67#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:01:10.67#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:01:10.67#ibcon#[27=BW32\r\n] 2006.229.09:01:10.67#ibcon#*before write, iclass 11, count 0 2006.229.09:01:10.67#ibcon#enter sib2, iclass 11, count 0 2006.229.09:01:10.67#ibcon#flushed, iclass 11, count 0 2006.229.09:01:10.67#ibcon#about to write, iclass 11, count 0 2006.229.09:01:10.67#ibcon#wrote, iclass 11, count 0 2006.229.09:01:10.67#ibcon#about to read 3, iclass 11, count 0 2006.229.09:01:10.70#ibcon#read 3, iclass 11, count 0 2006.229.09:01:10.70#ibcon#about to read 4, iclass 11, count 0 2006.229.09:01:10.70#ibcon#read 4, iclass 11, count 0 2006.229.09:01:10.70#ibcon#about to read 5, iclass 11, count 0 2006.229.09:01:10.70#ibcon#read 5, iclass 11, count 0 2006.229.09:01:10.70#ibcon#about to read 6, iclass 11, count 0 2006.229.09:01:10.70#ibcon#read 6, iclass 11, count 0 2006.229.09:01:10.70#ibcon#end of sib2, iclass 11, count 0 2006.229.09:01:10.70#ibcon#*after write, iclass 11, count 0 2006.229.09:01:10.70#ibcon#*before return 0, iclass 11, count 0 2006.229.09:01:10.70#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:01:10.70#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:01:10.70#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:01:10.70#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:01:10.70$setupk4/ifdk4 2006.229.09:01:10.70$ifdk4/lo= 2006.229.09:01:10.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:01:10.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:01:10.70$ifdk4/patch= 2006.229.09:01:10.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:01:10.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:01:10.70$setupk4/!*+20s 2006.229.09:01:11.64#abcon#<5=/06 2.3 4.3 29.22 951000.5\r\n> 2006.229.09:01:11.66#abcon#{5=INTERFACE CLEAR} 2006.229.09:01:11.72#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:01:16.14#trakl#Source acquired 2006.229.09:01:18.14#flagr#flagr/antenna,acquired 2006.229.09:01:21.81#abcon#<5=/06 2.3 4.3 29.21 951000.5\r\n> 2006.229.09:01:21.83#abcon#{5=INTERFACE CLEAR} 2006.229.09:01:21.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:01:25.20$setupk4/"tpicd 2006.229.09:01:25.20$setupk4/echo=off 2006.229.09:01:25.20$setupk4/xlog=off 2006.229.09:01:25.20:!2006.229.09:04:51 2006.229.09:04:51.00:preob 2006.229.09:04:52.13/onsource/TRACKING 2006.229.09:04:52.13:!2006.229.09:05:01 2006.229.09:05:01.00:"tape 2006.229.09:05:01.00:"st=record 2006.229.09:05:01.00:data_valid=on 2006.229.09:05:01.00:midob 2006.229.09:05:01.13/onsource/TRACKING 2006.229.09:05:01.13/wx/29.19,1000.6,95 2006.229.09:05:01.18/cable/+6.4007E-03 2006.229.09:05:02.27/va/01,08,usb,yes,30,32 2006.229.09:05:02.27/va/02,07,usb,yes,33,33 2006.229.09:05:02.27/va/03,06,usb,yes,40,43 2006.229.09:05:02.27/va/04,07,usb,yes,33,35 2006.229.09:05:02.27/va/05,04,usb,yes,30,30 2006.229.09:05:02.27/va/06,04,usb,yes,34,33 2006.229.09:05:02.27/va/07,05,usb,yes,30,30 2006.229.09:05:02.27/va/08,06,usb,yes,21,27 2006.229.09:05:02.50/valo/01,524.99,yes,locked 2006.229.09:05:02.50/valo/02,534.99,yes,locked 2006.229.09:05:02.50/valo/03,564.99,yes,locked 2006.229.09:05:02.50/valo/04,624.99,yes,locked 2006.229.09:05:02.50/valo/05,734.99,yes,locked 2006.229.09:05:02.50/valo/06,814.99,yes,locked 2006.229.09:05:02.50/valo/07,864.99,yes,locked 2006.229.09:05:02.50/valo/08,884.99,yes,locked 2006.229.09:05:03.59/vb/01,04,usb,yes,31,29 2006.229.09:05:03.59/vb/02,04,usb,yes,34,34 2006.229.09:05:03.59/vb/03,04,usb,yes,31,34 2006.229.09:05:03.59/vb/04,04,usb,yes,35,34 2006.229.09:05:03.59/vb/05,04,usb,yes,27,30 2006.229.09:05:03.59/vb/06,04,usb,yes,32,28 2006.229.09:05:03.59/vb/07,04,usb,yes,32,32 2006.229.09:05:03.59/vb/08,04,usb,yes,29,33 2006.229.09:05:03.83/vblo/01,629.99,yes,locked 2006.229.09:05:03.83/vblo/02,634.99,yes,locked 2006.229.09:05:03.83/vblo/03,649.99,yes,locked 2006.229.09:05:03.83/vblo/04,679.99,yes,locked 2006.229.09:05:03.83/vblo/05,709.99,yes,locked 2006.229.09:05:03.83/vblo/06,719.99,yes,locked 2006.229.09:05:03.83/vblo/07,734.99,yes,locked 2006.229.09:05:03.83/vblo/08,744.99,yes,locked 2006.229.09:05:03.98/vabw/8 2006.229.09:05:04.13/vbbw/8 2006.229.09:05:04.30/xfe/off,on,13.0 2006.229.09:05:04.67/ifatt/23,28,28,28 2006.229.09:05:05.07/fmout-gps/S +4.57E-07 2006.229.09:05:05.11:!2006.229.09:11:01 2006.229.09:11:01.00:data_valid=off 2006.229.09:11:01.00:"et 2006.229.09:11:01.00:!+3s 2006.229.09:11:04.01:"tape 2006.229.09:11:04.01:postob 2006.229.09:11:04.09/cable/+6.4014E-03 2006.229.09:11:04.09/wx/29.13,1000.6,96 2006.229.09:11:05.08/fmout-gps/S +4.59E-07 2006.229.09:11:05.08:scan_name=229-0915,jd0608,40 2006.229.09:11:05.08:source=1741-038,174358.86,-035004.6,2000.0,ccw 2006.229.09:11:05.14#flagr#flagr/antenna,new-source 2006.229.09:11:06.14:checkk5 2006.229.09:11:06.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:11:06.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:11:07.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:11:07.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:11:08.12/chk_obsdata//k5ts1/T2290905??a.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.09:11:08.53/chk_obsdata//k5ts2/T2290905??b.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.09:11:08.93/chk_obsdata//k5ts3/T2290905??c.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.09:11:09.34/chk_obsdata//k5ts4/T2290905??d.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.09:11:10.06/k5log//k5ts1_log_newline 2006.229.09:11:10.78/k5log//k5ts2_log_newline 2006.229.09:11:11.50/k5log//k5ts3_log_newline 2006.229.09:11:12.21/k5log//k5ts4_log_newline 2006.229.09:11:12.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:11:12.24:setupk4=1 2006.229.09:11:12.24$setupk4/echo=on 2006.229.09:11:12.24$setupk4/pcalon 2006.229.09:11:12.24$pcalon/"no phase cal control is implemented here 2006.229.09:11:12.24$setupk4/"tpicd=stop 2006.229.09:11:12.24$setupk4/"rec=synch_on 2006.229.09:11:12.24$setupk4/"rec_mode=128 2006.229.09:11:12.24$setupk4/!* 2006.229.09:11:12.24$setupk4/recpk4 2006.229.09:11:12.24$recpk4/recpatch= 2006.229.09:11:12.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:11:12.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:11:12.24$setupk4/vck44 2006.229.09:11:12.24$vck44/valo=1,524.99 2006.229.09:11:12.24#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:11:12.24#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:11:12.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:12.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:12.24#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:12.24#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:12.24#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:11:12.24#ibcon#first serial, iclass 40, count 0 2006.229.09:11:12.24#ibcon#enter sib2, iclass 40, count 0 2006.229.09:11:12.24#ibcon#flushed, iclass 40, count 0 2006.229.09:11:12.24#ibcon#about to write, iclass 40, count 0 2006.229.09:11:12.24#ibcon#wrote, iclass 40, count 0 2006.229.09:11:12.24#ibcon#about to read 3, iclass 40, count 0 2006.229.09:11:12.26#ibcon#read 3, iclass 40, count 0 2006.229.09:11:12.26#ibcon#about to read 4, iclass 40, count 0 2006.229.09:11:12.26#ibcon#read 4, iclass 40, count 0 2006.229.09:11:12.26#ibcon#about to read 5, iclass 40, count 0 2006.229.09:11:12.26#ibcon#read 5, iclass 40, count 0 2006.229.09:11:12.26#ibcon#about to read 6, iclass 40, count 0 2006.229.09:11:12.26#ibcon#read 6, iclass 40, count 0 2006.229.09:11:12.26#ibcon#end of sib2, iclass 40, count 0 2006.229.09:11:12.26#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:11:12.26#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:11:12.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:11:12.26#ibcon#*before write, iclass 40, count 0 2006.229.09:11:12.26#ibcon#enter sib2, iclass 40, count 0 2006.229.09:11:12.26#ibcon#flushed, iclass 40, count 0 2006.229.09:11:12.26#ibcon#about to write, iclass 40, count 0 2006.229.09:11:12.26#ibcon#wrote, iclass 40, count 0 2006.229.09:11:12.26#ibcon#about to read 3, iclass 40, count 0 2006.229.09:11:12.31#ibcon#read 3, iclass 40, count 0 2006.229.09:11:12.31#ibcon#about to read 4, iclass 40, count 0 2006.229.09:11:12.31#ibcon#read 4, iclass 40, count 0 2006.229.09:11:12.31#ibcon#about to read 5, iclass 40, count 0 2006.229.09:11:12.31#ibcon#read 5, iclass 40, count 0 2006.229.09:11:12.31#ibcon#about to read 6, iclass 40, count 0 2006.229.09:11:12.31#ibcon#read 6, iclass 40, count 0 2006.229.09:11:12.31#ibcon#end of sib2, iclass 40, count 0 2006.229.09:11:12.31#ibcon#*after write, iclass 40, count 0 2006.229.09:11:12.31#ibcon#*before return 0, iclass 40, count 0 2006.229.09:11:12.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:12.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:12.31#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:11:12.31#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:11:12.31$vck44/va=1,8 2006.229.09:11:12.31#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.09:11:12.31#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.09:11:12.31#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:12.31#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:12.31#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:12.31#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:12.31#ibcon#enter wrdev, iclass 4, count 2 2006.229.09:11:12.31#ibcon#first serial, iclass 4, count 2 2006.229.09:11:12.31#ibcon#enter sib2, iclass 4, count 2 2006.229.09:11:12.31#ibcon#flushed, iclass 4, count 2 2006.229.09:11:12.31#ibcon#about to write, iclass 4, count 2 2006.229.09:11:12.31#ibcon#wrote, iclass 4, count 2 2006.229.09:11:12.31#ibcon#about to read 3, iclass 4, count 2 2006.229.09:11:12.33#ibcon#read 3, iclass 4, count 2 2006.229.09:11:12.33#ibcon#about to read 4, iclass 4, count 2 2006.229.09:11:12.33#ibcon#read 4, iclass 4, count 2 2006.229.09:11:12.33#ibcon#about to read 5, iclass 4, count 2 2006.229.09:11:12.33#ibcon#read 5, iclass 4, count 2 2006.229.09:11:12.33#ibcon#about to read 6, iclass 4, count 2 2006.229.09:11:12.33#ibcon#read 6, iclass 4, count 2 2006.229.09:11:12.33#ibcon#end of sib2, iclass 4, count 2 2006.229.09:11:12.33#ibcon#*mode == 0, iclass 4, count 2 2006.229.09:11:12.33#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.09:11:12.33#ibcon#[25=AT01-08\r\n] 2006.229.09:11:12.33#ibcon#*before write, iclass 4, count 2 2006.229.09:11:12.33#ibcon#enter sib2, iclass 4, count 2 2006.229.09:11:12.33#ibcon#flushed, iclass 4, count 2 2006.229.09:11:12.33#ibcon#about to write, iclass 4, count 2 2006.229.09:11:12.33#ibcon#wrote, iclass 4, count 2 2006.229.09:11:12.33#ibcon#about to read 3, iclass 4, count 2 2006.229.09:11:12.36#ibcon#read 3, iclass 4, count 2 2006.229.09:11:12.36#ibcon#about to read 4, iclass 4, count 2 2006.229.09:11:12.36#ibcon#read 4, iclass 4, count 2 2006.229.09:11:12.36#ibcon#about to read 5, iclass 4, count 2 2006.229.09:11:12.36#ibcon#read 5, iclass 4, count 2 2006.229.09:11:12.36#ibcon#about to read 6, iclass 4, count 2 2006.229.09:11:12.36#ibcon#read 6, iclass 4, count 2 2006.229.09:11:12.36#ibcon#end of sib2, iclass 4, count 2 2006.229.09:11:12.36#ibcon#*after write, iclass 4, count 2 2006.229.09:11:12.36#ibcon#*before return 0, iclass 4, count 2 2006.229.09:11:12.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:12.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:12.36#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.09:11:12.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:12.36#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:12.48#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:12.48#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:12.48#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:11:12.48#ibcon#first serial, iclass 4, count 0 2006.229.09:11:12.48#ibcon#enter sib2, iclass 4, count 0 2006.229.09:11:12.48#ibcon#flushed, iclass 4, count 0 2006.229.09:11:12.48#ibcon#about to write, iclass 4, count 0 2006.229.09:11:12.48#ibcon#wrote, iclass 4, count 0 2006.229.09:11:12.48#ibcon#about to read 3, iclass 4, count 0 2006.229.09:11:12.50#ibcon#read 3, iclass 4, count 0 2006.229.09:11:12.50#ibcon#about to read 4, iclass 4, count 0 2006.229.09:11:12.50#ibcon#read 4, iclass 4, count 0 2006.229.09:11:12.50#ibcon#about to read 5, iclass 4, count 0 2006.229.09:11:12.50#ibcon#read 5, iclass 4, count 0 2006.229.09:11:12.50#ibcon#about to read 6, iclass 4, count 0 2006.229.09:11:12.50#ibcon#read 6, iclass 4, count 0 2006.229.09:11:12.50#ibcon#end of sib2, iclass 4, count 0 2006.229.09:11:12.50#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:11:12.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:11:12.50#ibcon#[25=USB\r\n] 2006.229.09:11:12.50#ibcon#*before write, iclass 4, count 0 2006.229.09:11:12.50#ibcon#enter sib2, iclass 4, count 0 2006.229.09:11:12.50#ibcon#flushed, iclass 4, count 0 2006.229.09:11:12.50#ibcon#about to write, iclass 4, count 0 2006.229.09:11:12.50#ibcon#wrote, iclass 4, count 0 2006.229.09:11:12.50#ibcon#about to read 3, iclass 4, count 0 2006.229.09:11:12.53#ibcon#read 3, iclass 4, count 0 2006.229.09:11:12.53#ibcon#about to read 4, iclass 4, count 0 2006.229.09:11:12.53#ibcon#read 4, iclass 4, count 0 2006.229.09:11:12.53#ibcon#about to read 5, iclass 4, count 0 2006.229.09:11:12.53#ibcon#read 5, iclass 4, count 0 2006.229.09:11:12.53#ibcon#about to read 6, iclass 4, count 0 2006.229.09:11:12.53#ibcon#read 6, iclass 4, count 0 2006.229.09:11:12.53#ibcon#end of sib2, iclass 4, count 0 2006.229.09:11:12.53#ibcon#*after write, iclass 4, count 0 2006.229.09:11:12.53#ibcon#*before return 0, iclass 4, count 0 2006.229.09:11:12.53#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:12.53#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:12.53#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:11:12.53#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:11:12.53$vck44/valo=2,534.99 2006.229.09:11:12.53#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.09:11:12.53#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.09:11:12.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:12.53#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:12.53#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:12.53#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:12.53#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:11:12.53#ibcon#first serial, iclass 6, count 0 2006.229.09:11:12.53#ibcon#enter sib2, iclass 6, count 0 2006.229.09:11:12.53#ibcon#flushed, iclass 6, count 0 2006.229.09:11:12.53#ibcon#about to write, iclass 6, count 0 2006.229.09:11:12.53#ibcon#wrote, iclass 6, count 0 2006.229.09:11:12.53#ibcon#about to read 3, iclass 6, count 0 2006.229.09:11:12.55#ibcon#read 3, iclass 6, count 0 2006.229.09:11:12.55#ibcon#about to read 4, iclass 6, count 0 2006.229.09:11:12.55#ibcon#read 4, iclass 6, count 0 2006.229.09:11:12.55#ibcon#about to read 5, iclass 6, count 0 2006.229.09:11:12.55#ibcon#read 5, iclass 6, count 0 2006.229.09:11:12.55#ibcon#about to read 6, iclass 6, count 0 2006.229.09:11:12.55#ibcon#read 6, iclass 6, count 0 2006.229.09:11:12.55#ibcon#end of sib2, iclass 6, count 0 2006.229.09:11:12.55#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:11:12.55#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:11:12.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:11:12.55#ibcon#*before write, iclass 6, count 0 2006.229.09:11:12.55#ibcon#enter sib2, iclass 6, count 0 2006.229.09:11:12.55#ibcon#flushed, iclass 6, count 0 2006.229.09:11:12.55#ibcon#about to write, iclass 6, count 0 2006.229.09:11:12.55#ibcon#wrote, iclass 6, count 0 2006.229.09:11:12.55#ibcon#about to read 3, iclass 6, count 0 2006.229.09:11:12.59#ibcon#read 3, iclass 6, count 0 2006.229.09:11:12.59#ibcon#about to read 4, iclass 6, count 0 2006.229.09:11:12.59#ibcon#read 4, iclass 6, count 0 2006.229.09:11:12.59#ibcon#about to read 5, iclass 6, count 0 2006.229.09:11:12.59#ibcon#read 5, iclass 6, count 0 2006.229.09:11:12.59#ibcon#about to read 6, iclass 6, count 0 2006.229.09:11:12.59#ibcon#read 6, iclass 6, count 0 2006.229.09:11:12.59#ibcon#end of sib2, iclass 6, count 0 2006.229.09:11:12.59#ibcon#*after write, iclass 6, count 0 2006.229.09:11:12.59#ibcon#*before return 0, iclass 6, count 0 2006.229.09:11:12.59#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:12.59#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:12.59#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:11:12.59#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:11:12.59$vck44/va=2,7 2006.229.09:11:12.59#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.09:11:12.59#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.09:11:12.59#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:12.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:12.65#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:12.65#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:12.65#ibcon#enter wrdev, iclass 10, count 2 2006.229.09:11:12.65#ibcon#first serial, iclass 10, count 2 2006.229.09:11:12.65#ibcon#enter sib2, iclass 10, count 2 2006.229.09:11:12.65#ibcon#flushed, iclass 10, count 2 2006.229.09:11:12.65#ibcon#about to write, iclass 10, count 2 2006.229.09:11:12.65#ibcon#wrote, iclass 10, count 2 2006.229.09:11:12.65#ibcon#about to read 3, iclass 10, count 2 2006.229.09:11:12.67#ibcon#read 3, iclass 10, count 2 2006.229.09:11:12.67#ibcon#about to read 4, iclass 10, count 2 2006.229.09:11:12.67#ibcon#read 4, iclass 10, count 2 2006.229.09:11:12.67#ibcon#about to read 5, iclass 10, count 2 2006.229.09:11:12.67#ibcon#read 5, iclass 10, count 2 2006.229.09:11:12.67#ibcon#about to read 6, iclass 10, count 2 2006.229.09:11:12.67#ibcon#read 6, iclass 10, count 2 2006.229.09:11:12.67#ibcon#end of sib2, iclass 10, count 2 2006.229.09:11:12.67#ibcon#*mode == 0, iclass 10, count 2 2006.229.09:11:12.67#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.09:11:12.67#ibcon#[25=AT02-07\r\n] 2006.229.09:11:12.67#ibcon#*before write, iclass 10, count 2 2006.229.09:11:12.67#ibcon#enter sib2, iclass 10, count 2 2006.229.09:11:12.67#ibcon#flushed, iclass 10, count 2 2006.229.09:11:12.67#ibcon#about to write, iclass 10, count 2 2006.229.09:11:12.67#ibcon#wrote, iclass 10, count 2 2006.229.09:11:12.67#ibcon#about to read 3, iclass 10, count 2 2006.229.09:11:12.70#ibcon#read 3, iclass 10, count 2 2006.229.09:11:12.70#ibcon#about to read 4, iclass 10, count 2 2006.229.09:11:12.70#ibcon#read 4, iclass 10, count 2 2006.229.09:11:12.70#ibcon#about to read 5, iclass 10, count 2 2006.229.09:11:12.70#ibcon#read 5, iclass 10, count 2 2006.229.09:11:12.70#ibcon#about to read 6, iclass 10, count 2 2006.229.09:11:12.70#ibcon#read 6, iclass 10, count 2 2006.229.09:11:12.70#ibcon#end of sib2, iclass 10, count 2 2006.229.09:11:12.70#ibcon#*after write, iclass 10, count 2 2006.229.09:11:12.70#ibcon#*before return 0, iclass 10, count 2 2006.229.09:11:12.70#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:12.70#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:12.70#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.09:11:12.70#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:12.70#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:12.82#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:12.82#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:12.82#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:11:12.82#ibcon#first serial, iclass 10, count 0 2006.229.09:11:12.82#ibcon#enter sib2, iclass 10, count 0 2006.229.09:11:12.82#ibcon#flushed, iclass 10, count 0 2006.229.09:11:12.82#ibcon#about to write, iclass 10, count 0 2006.229.09:11:12.82#ibcon#wrote, iclass 10, count 0 2006.229.09:11:12.82#ibcon#about to read 3, iclass 10, count 0 2006.229.09:11:12.84#ibcon#read 3, iclass 10, count 0 2006.229.09:11:12.84#ibcon#about to read 4, iclass 10, count 0 2006.229.09:11:12.84#ibcon#read 4, iclass 10, count 0 2006.229.09:11:12.84#ibcon#about to read 5, iclass 10, count 0 2006.229.09:11:12.84#ibcon#read 5, iclass 10, count 0 2006.229.09:11:12.84#ibcon#about to read 6, iclass 10, count 0 2006.229.09:11:12.84#ibcon#read 6, iclass 10, count 0 2006.229.09:11:12.84#ibcon#end of sib2, iclass 10, count 0 2006.229.09:11:12.84#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:11:12.84#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:11:12.84#ibcon#[25=USB\r\n] 2006.229.09:11:12.84#ibcon#*before write, iclass 10, count 0 2006.229.09:11:12.84#ibcon#enter sib2, iclass 10, count 0 2006.229.09:11:12.84#ibcon#flushed, iclass 10, count 0 2006.229.09:11:12.84#ibcon#about to write, iclass 10, count 0 2006.229.09:11:12.84#ibcon#wrote, iclass 10, count 0 2006.229.09:11:12.84#ibcon#about to read 3, iclass 10, count 0 2006.229.09:11:12.87#ibcon#read 3, iclass 10, count 0 2006.229.09:11:12.87#ibcon#about to read 4, iclass 10, count 0 2006.229.09:11:12.87#ibcon#read 4, iclass 10, count 0 2006.229.09:11:12.87#ibcon#about to read 5, iclass 10, count 0 2006.229.09:11:12.87#ibcon#read 5, iclass 10, count 0 2006.229.09:11:12.87#ibcon#about to read 6, iclass 10, count 0 2006.229.09:11:12.87#ibcon#read 6, iclass 10, count 0 2006.229.09:11:12.87#ibcon#end of sib2, iclass 10, count 0 2006.229.09:11:12.87#ibcon#*after write, iclass 10, count 0 2006.229.09:11:12.87#ibcon#*before return 0, iclass 10, count 0 2006.229.09:11:12.87#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:12.87#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:12.87#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:11:12.87#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:11:12.87$vck44/valo=3,564.99 2006.229.09:11:12.87#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.09:11:12.87#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.09:11:12.87#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:12.87#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:12.87#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:12.87#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:12.87#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:11:12.87#ibcon#first serial, iclass 12, count 0 2006.229.09:11:12.87#ibcon#enter sib2, iclass 12, count 0 2006.229.09:11:12.87#ibcon#flushed, iclass 12, count 0 2006.229.09:11:12.87#ibcon#about to write, iclass 12, count 0 2006.229.09:11:12.87#ibcon#wrote, iclass 12, count 0 2006.229.09:11:12.87#ibcon#about to read 3, iclass 12, count 0 2006.229.09:11:12.89#ibcon#read 3, iclass 12, count 0 2006.229.09:11:12.89#ibcon#about to read 4, iclass 12, count 0 2006.229.09:11:12.89#ibcon#read 4, iclass 12, count 0 2006.229.09:11:12.89#ibcon#about to read 5, iclass 12, count 0 2006.229.09:11:12.89#ibcon#read 5, iclass 12, count 0 2006.229.09:11:12.89#ibcon#about to read 6, iclass 12, count 0 2006.229.09:11:12.89#ibcon#read 6, iclass 12, count 0 2006.229.09:11:12.89#ibcon#end of sib2, iclass 12, count 0 2006.229.09:11:12.89#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:11:12.89#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:11:12.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:11:12.89#ibcon#*before write, iclass 12, count 0 2006.229.09:11:12.89#ibcon#enter sib2, iclass 12, count 0 2006.229.09:11:12.89#ibcon#flushed, iclass 12, count 0 2006.229.09:11:12.89#ibcon#about to write, iclass 12, count 0 2006.229.09:11:12.89#ibcon#wrote, iclass 12, count 0 2006.229.09:11:12.89#ibcon#about to read 3, iclass 12, count 0 2006.229.09:11:12.93#ibcon#read 3, iclass 12, count 0 2006.229.09:11:12.93#ibcon#about to read 4, iclass 12, count 0 2006.229.09:11:12.93#ibcon#read 4, iclass 12, count 0 2006.229.09:11:12.93#ibcon#about to read 5, iclass 12, count 0 2006.229.09:11:12.93#ibcon#read 5, iclass 12, count 0 2006.229.09:11:12.93#ibcon#about to read 6, iclass 12, count 0 2006.229.09:11:12.93#ibcon#read 6, iclass 12, count 0 2006.229.09:11:12.93#ibcon#end of sib2, iclass 12, count 0 2006.229.09:11:12.93#ibcon#*after write, iclass 12, count 0 2006.229.09:11:12.93#ibcon#*before return 0, iclass 12, count 0 2006.229.09:11:12.93#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:12.93#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:12.93#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:11:12.93#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:11:12.93$vck44/va=3,6 2006.229.09:11:12.93#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:11:12.93#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:11:12.93#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:12.93#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:12.99#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:12.99#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:12.99#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:11:12.99#ibcon#first serial, iclass 14, count 2 2006.229.09:11:12.99#ibcon#enter sib2, iclass 14, count 2 2006.229.09:11:12.99#ibcon#flushed, iclass 14, count 2 2006.229.09:11:12.99#ibcon#about to write, iclass 14, count 2 2006.229.09:11:12.99#ibcon#wrote, iclass 14, count 2 2006.229.09:11:12.99#ibcon#about to read 3, iclass 14, count 2 2006.229.09:11:13.01#ibcon#read 3, iclass 14, count 2 2006.229.09:11:13.01#ibcon#about to read 4, iclass 14, count 2 2006.229.09:11:13.01#ibcon#read 4, iclass 14, count 2 2006.229.09:11:13.01#ibcon#about to read 5, iclass 14, count 2 2006.229.09:11:13.01#ibcon#read 5, iclass 14, count 2 2006.229.09:11:13.01#ibcon#about to read 6, iclass 14, count 2 2006.229.09:11:13.01#ibcon#read 6, iclass 14, count 2 2006.229.09:11:13.01#ibcon#end of sib2, iclass 14, count 2 2006.229.09:11:13.01#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:11:13.01#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:11:13.01#ibcon#[25=AT03-06\r\n] 2006.229.09:11:13.01#ibcon#*before write, iclass 14, count 2 2006.229.09:11:13.01#ibcon#enter sib2, iclass 14, count 2 2006.229.09:11:13.01#ibcon#flushed, iclass 14, count 2 2006.229.09:11:13.01#ibcon#about to write, iclass 14, count 2 2006.229.09:11:13.01#ibcon#wrote, iclass 14, count 2 2006.229.09:11:13.01#ibcon#about to read 3, iclass 14, count 2 2006.229.09:11:13.04#ibcon#read 3, iclass 14, count 2 2006.229.09:11:13.04#ibcon#about to read 4, iclass 14, count 2 2006.229.09:11:13.04#ibcon#read 4, iclass 14, count 2 2006.229.09:11:13.04#ibcon#about to read 5, iclass 14, count 2 2006.229.09:11:13.04#ibcon#read 5, iclass 14, count 2 2006.229.09:11:13.04#ibcon#about to read 6, iclass 14, count 2 2006.229.09:11:13.04#ibcon#read 6, iclass 14, count 2 2006.229.09:11:13.04#ibcon#end of sib2, iclass 14, count 2 2006.229.09:11:13.04#ibcon#*after write, iclass 14, count 2 2006.229.09:11:13.04#ibcon#*before return 0, iclass 14, count 2 2006.229.09:11:13.04#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:13.04#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:13.04#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:11:13.04#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:13.04#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:13.16#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:13.16#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:13.16#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:11:13.16#ibcon#first serial, iclass 14, count 0 2006.229.09:11:13.16#ibcon#enter sib2, iclass 14, count 0 2006.229.09:11:13.16#ibcon#flushed, iclass 14, count 0 2006.229.09:11:13.16#ibcon#about to write, iclass 14, count 0 2006.229.09:11:13.16#ibcon#wrote, iclass 14, count 0 2006.229.09:11:13.16#ibcon#about to read 3, iclass 14, count 0 2006.229.09:11:13.18#ibcon#read 3, iclass 14, count 0 2006.229.09:11:13.18#ibcon#about to read 4, iclass 14, count 0 2006.229.09:11:13.18#ibcon#read 4, iclass 14, count 0 2006.229.09:11:13.18#ibcon#about to read 5, iclass 14, count 0 2006.229.09:11:13.18#ibcon#read 5, iclass 14, count 0 2006.229.09:11:13.18#ibcon#about to read 6, iclass 14, count 0 2006.229.09:11:13.18#ibcon#read 6, iclass 14, count 0 2006.229.09:11:13.18#ibcon#end of sib2, iclass 14, count 0 2006.229.09:11:13.18#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:11:13.18#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:11:13.18#ibcon#[25=USB\r\n] 2006.229.09:11:13.18#ibcon#*before write, iclass 14, count 0 2006.229.09:11:13.18#ibcon#enter sib2, iclass 14, count 0 2006.229.09:11:13.18#ibcon#flushed, iclass 14, count 0 2006.229.09:11:13.18#ibcon#about to write, iclass 14, count 0 2006.229.09:11:13.18#ibcon#wrote, iclass 14, count 0 2006.229.09:11:13.18#ibcon#about to read 3, iclass 14, count 0 2006.229.09:11:13.21#ibcon#read 3, iclass 14, count 0 2006.229.09:11:13.21#ibcon#about to read 4, iclass 14, count 0 2006.229.09:11:13.21#ibcon#read 4, iclass 14, count 0 2006.229.09:11:13.21#ibcon#about to read 5, iclass 14, count 0 2006.229.09:11:13.21#ibcon#read 5, iclass 14, count 0 2006.229.09:11:13.21#ibcon#about to read 6, iclass 14, count 0 2006.229.09:11:13.21#ibcon#read 6, iclass 14, count 0 2006.229.09:11:13.21#ibcon#end of sib2, iclass 14, count 0 2006.229.09:11:13.21#ibcon#*after write, iclass 14, count 0 2006.229.09:11:13.21#ibcon#*before return 0, iclass 14, count 0 2006.229.09:11:13.21#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:13.21#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:13.21#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:11:13.21#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:11:13.21$vck44/valo=4,624.99 2006.229.09:11:13.21#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.09:11:13.21#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.09:11:13.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:13.21#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:13.21#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:13.21#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:13.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:11:13.21#ibcon#first serial, iclass 16, count 0 2006.229.09:11:13.21#ibcon#enter sib2, iclass 16, count 0 2006.229.09:11:13.21#ibcon#flushed, iclass 16, count 0 2006.229.09:11:13.21#ibcon#about to write, iclass 16, count 0 2006.229.09:11:13.21#ibcon#wrote, iclass 16, count 0 2006.229.09:11:13.21#ibcon#about to read 3, iclass 16, count 0 2006.229.09:11:13.23#ibcon#read 3, iclass 16, count 0 2006.229.09:11:13.23#ibcon#about to read 4, iclass 16, count 0 2006.229.09:11:13.23#ibcon#read 4, iclass 16, count 0 2006.229.09:11:13.23#ibcon#about to read 5, iclass 16, count 0 2006.229.09:11:13.23#ibcon#read 5, iclass 16, count 0 2006.229.09:11:13.23#ibcon#about to read 6, iclass 16, count 0 2006.229.09:11:13.23#ibcon#read 6, iclass 16, count 0 2006.229.09:11:13.23#ibcon#end of sib2, iclass 16, count 0 2006.229.09:11:13.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:11:13.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:11:13.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:11:13.23#ibcon#*before write, iclass 16, count 0 2006.229.09:11:13.23#ibcon#enter sib2, iclass 16, count 0 2006.229.09:11:13.23#ibcon#flushed, iclass 16, count 0 2006.229.09:11:13.23#ibcon#about to write, iclass 16, count 0 2006.229.09:11:13.23#ibcon#wrote, iclass 16, count 0 2006.229.09:11:13.23#ibcon#about to read 3, iclass 16, count 0 2006.229.09:11:13.27#ibcon#read 3, iclass 16, count 0 2006.229.09:11:13.27#ibcon#about to read 4, iclass 16, count 0 2006.229.09:11:13.27#ibcon#read 4, iclass 16, count 0 2006.229.09:11:13.27#ibcon#about to read 5, iclass 16, count 0 2006.229.09:11:13.27#ibcon#read 5, iclass 16, count 0 2006.229.09:11:13.27#ibcon#about to read 6, iclass 16, count 0 2006.229.09:11:13.27#ibcon#read 6, iclass 16, count 0 2006.229.09:11:13.27#ibcon#end of sib2, iclass 16, count 0 2006.229.09:11:13.27#ibcon#*after write, iclass 16, count 0 2006.229.09:11:13.27#ibcon#*before return 0, iclass 16, count 0 2006.229.09:11:13.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:13.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:13.27#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:11:13.27#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:11:13.27$vck44/va=4,7 2006.229.09:11:13.27#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.09:11:13.27#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.09:11:13.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:13.27#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:13.33#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:13.33#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:13.33#ibcon#enter wrdev, iclass 18, count 2 2006.229.09:11:13.33#ibcon#first serial, iclass 18, count 2 2006.229.09:11:13.33#ibcon#enter sib2, iclass 18, count 2 2006.229.09:11:13.33#ibcon#flushed, iclass 18, count 2 2006.229.09:11:13.33#ibcon#about to write, iclass 18, count 2 2006.229.09:11:13.33#ibcon#wrote, iclass 18, count 2 2006.229.09:11:13.33#ibcon#about to read 3, iclass 18, count 2 2006.229.09:11:13.35#ibcon#read 3, iclass 18, count 2 2006.229.09:11:13.35#ibcon#about to read 4, iclass 18, count 2 2006.229.09:11:13.35#ibcon#read 4, iclass 18, count 2 2006.229.09:11:13.35#ibcon#about to read 5, iclass 18, count 2 2006.229.09:11:13.35#ibcon#read 5, iclass 18, count 2 2006.229.09:11:13.35#ibcon#about to read 6, iclass 18, count 2 2006.229.09:11:13.35#ibcon#read 6, iclass 18, count 2 2006.229.09:11:13.35#ibcon#end of sib2, iclass 18, count 2 2006.229.09:11:13.35#ibcon#*mode == 0, iclass 18, count 2 2006.229.09:11:13.35#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.09:11:13.35#ibcon#[25=AT04-07\r\n] 2006.229.09:11:13.35#ibcon#*before write, iclass 18, count 2 2006.229.09:11:13.35#ibcon#enter sib2, iclass 18, count 2 2006.229.09:11:13.35#ibcon#flushed, iclass 18, count 2 2006.229.09:11:13.35#ibcon#about to write, iclass 18, count 2 2006.229.09:11:13.35#ibcon#wrote, iclass 18, count 2 2006.229.09:11:13.35#ibcon#about to read 3, iclass 18, count 2 2006.229.09:11:13.38#ibcon#read 3, iclass 18, count 2 2006.229.09:11:13.38#ibcon#about to read 4, iclass 18, count 2 2006.229.09:11:13.38#ibcon#read 4, iclass 18, count 2 2006.229.09:11:13.38#ibcon#about to read 5, iclass 18, count 2 2006.229.09:11:13.38#ibcon#read 5, iclass 18, count 2 2006.229.09:11:13.38#ibcon#about to read 6, iclass 18, count 2 2006.229.09:11:13.38#ibcon#read 6, iclass 18, count 2 2006.229.09:11:13.38#ibcon#end of sib2, iclass 18, count 2 2006.229.09:11:13.38#ibcon#*after write, iclass 18, count 2 2006.229.09:11:13.38#ibcon#*before return 0, iclass 18, count 2 2006.229.09:11:13.38#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:13.38#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:13.38#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.09:11:13.38#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:13.38#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:13.50#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:13.50#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:13.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:11:13.50#ibcon#first serial, iclass 18, count 0 2006.229.09:11:13.50#ibcon#enter sib2, iclass 18, count 0 2006.229.09:11:13.50#ibcon#flushed, iclass 18, count 0 2006.229.09:11:13.50#ibcon#about to write, iclass 18, count 0 2006.229.09:11:13.50#ibcon#wrote, iclass 18, count 0 2006.229.09:11:13.50#ibcon#about to read 3, iclass 18, count 0 2006.229.09:11:13.52#ibcon#read 3, iclass 18, count 0 2006.229.09:11:13.52#ibcon#about to read 4, iclass 18, count 0 2006.229.09:11:13.52#ibcon#read 4, iclass 18, count 0 2006.229.09:11:13.52#ibcon#about to read 5, iclass 18, count 0 2006.229.09:11:13.52#ibcon#read 5, iclass 18, count 0 2006.229.09:11:13.52#ibcon#about to read 6, iclass 18, count 0 2006.229.09:11:13.52#ibcon#read 6, iclass 18, count 0 2006.229.09:11:13.52#ibcon#end of sib2, iclass 18, count 0 2006.229.09:11:13.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:11:13.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:11:13.52#ibcon#[25=USB\r\n] 2006.229.09:11:13.52#ibcon#*before write, iclass 18, count 0 2006.229.09:11:13.52#ibcon#enter sib2, iclass 18, count 0 2006.229.09:11:13.52#ibcon#flushed, iclass 18, count 0 2006.229.09:11:13.52#ibcon#about to write, iclass 18, count 0 2006.229.09:11:13.52#ibcon#wrote, iclass 18, count 0 2006.229.09:11:13.52#ibcon#about to read 3, iclass 18, count 0 2006.229.09:11:13.55#ibcon#read 3, iclass 18, count 0 2006.229.09:11:13.55#ibcon#about to read 4, iclass 18, count 0 2006.229.09:11:13.55#ibcon#read 4, iclass 18, count 0 2006.229.09:11:13.55#ibcon#about to read 5, iclass 18, count 0 2006.229.09:11:13.55#ibcon#read 5, iclass 18, count 0 2006.229.09:11:13.55#ibcon#about to read 6, iclass 18, count 0 2006.229.09:11:13.55#ibcon#read 6, iclass 18, count 0 2006.229.09:11:13.55#ibcon#end of sib2, iclass 18, count 0 2006.229.09:11:13.55#ibcon#*after write, iclass 18, count 0 2006.229.09:11:13.55#ibcon#*before return 0, iclass 18, count 0 2006.229.09:11:13.55#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:13.55#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:13.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:11:13.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:11:13.55$vck44/valo=5,734.99 2006.229.09:11:13.55#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:11:13.55#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:11:13.55#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:13.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:13.55#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:13.55#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:13.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:11:13.55#ibcon#first serial, iclass 20, count 0 2006.229.09:11:13.55#ibcon#enter sib2, iclass 20, count 0 2006.229.09:11:13.55#ibcon#flushed, iclass 20, count 0 2006.229.09:11:13.55#ibcon#about to write, iclass 20, count 0 2006.229.09:11:13.55#ibcon#wrote, iclass 20, count 0 2006.229.09:11:13.55#ibcon#about to read 3, iclass 20, count 0 2006.229.09:11:13.57#ibcon#read 3, iclass 20, count 0 2006.229.09:11:13.57#ibcon#about to read 4, iclass 20, count 0 2006.229.09:11:13.57#ibcon#read 4, iclass 20, count 0 2006.229.09:11:13.57#ibcon#about to read 5, iclass 20, count 0 2006.229.09:11:13.57#ibcon#read 5, iclass 20, count 0 2006.229.09:11:13.57#ibcon#about to read 6, iclass 20, count 0 2006.229.09:11:13.57#ibcon#read 6, iclass 20, count 0 2006.229.09:11:13.57#ibcon#end of sib2, iclass 20, count 0 2006.229.09:11:13.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:11:13.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:11:13.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:11:13.57#ibcon#*before write, iclass 20, count 0 2006.229.09:11:13.57#ibcon#enter sib2, iclass 20, count 0 2006.229.09:11:13.57#ibcon#flushed, iclass 20, count 0 2006.229.09:11:13.57#ibcon#about to write, iclass 20, count 0 2006.229.09:11:13.57#ibcon#wrote, iclass 20, count 0 2006.229.09:11:13.57#ibcon#about to read 3, iclass 20, count 0 2006.229.09:11:13.61#ibcon#read 3, iclass 20, count 0 2006.229.09:11:13.61#ibcon#about to read 4, iclass 20, count 0 2006.229.09:11:13.61#ibcon#read 4, iclass 20, count 0 2006.229.09:11:13.61#ibcon#about to read 5, iclass 20, count 0 2006.229.09:11:13.61#ibcon#read 5, iclass 20, count 0 2006.229.09:11:13.61#ibcon#about to read 6, iclass 20, count 0 2006.229.09:11:13.61#ibcon#read 6, iclass 20, count 0 2006.229.09:11:13.61#ibcon#end of sib2, iclass 20, count 0 2006.229.09:11:13.61#ibcon#*after write, iclass 20, count 0 2006.229.09:11:13.61#ibcon#*before return 0, iclass 20, count 0 2006.229.09:11:13.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:13.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:13.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:11:13.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:11:13.61$vck44/va=5,4 2006.229.09:11:13.61#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.09:11:13.61#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.09:11:13.61#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:13.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:13.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:13.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:13.67#ibcon#enter wrdev, iclass 22, count 2 2006.229.09:11:13.67#ibcon#first serial, iclass 22, count 2 2006.229.09:11:13.67#ibcon#enter sib2, iclass 22, count 2 2006.229.09:11:13.67#ibcon#flushed, iclass 22, count 2 2006.229.09:11:13.67#ibcon#about to write, iclass 22, count 2 2006.229.09:11:13.67#ibcon#wrote, iclass 22, count 2 2006.229.09:11:13.67#ibcon#about to read 3, iclass 22, count 2 2006.229.09:11:13.69#ibcon#read 3, iclass 22, count 2 2006.229.09:11:13.69#ibcon#about to read 4, iclass 22, count 2 2006.229.09:11:13.69#ibcon#read 4, iclass 22, count 2 2006.229.09:11:13.69#ibcon#about to read 5, iclass 22, count 2 2006.229.09:11:13.69#ibcon#read 5, iclass 22, count 2 2006.229.09:11:13.69#ibcon#about to read 6, iclass 22, count 2 2006.229.09:11:13.69#ibcon#read 6, iclass 22, count 2 2006.229.09:11:13.69#ibcon#end of sib2, iclass 22, count 2 2006.229.09:11:13.69#ibcon#*mode == 0, iclass 22, count 2 2006.229.09:11:13.69#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.09:11:13.69#ibcon#[25=AT05-04\r\n] 2006.229.09:11:13.69#ibcon#*before write, iclass 22, count 2 2006.229.09:11:13.69#ibcon#enter sib2, iclass 22, count 2 2006.229.09:11:13.69#ibcon#flushed, iclass 22, count 2 2006.229.09:11:13.69#ibcon#about to write, iclass 22, count 2 2006.229.09:11:13.69#ibcon#wrote, iclass 22, count 2 2006.229.09:11:13.69#ibcon#about to read 3, iclass 22, count 2 2006.229.09:11:13.72#ibcon#read 3, iclass 22, count 2 2006.229.09:11:13.72#ibcon#about to read 4, iclass 22, count 2 2006.229.09:11:13.72#ibcon#read 4, iclass 22, count 2 2006.229.09:11:13.72#ibcon#about to read 5, iclass 22, count 2 2006.229.09:11:13.72#ibcon#read 5, iclass 22, count 2 2006.229.09:11:13.72#ibcon#about to read 6, iclass 22, count 2 2006.229.09:11:13.72#ibcon#read 6, iclass 22, count 2 2006.229.09:11:13.72#ibcon#end of sib2, iclass 22, count 2 2006.229.09:11:13.72#ibcon#*after write, iclass 22, count 2 2006.229.09:11:13.72#ibcon#*before return 0, iclass 22, count 2 2006.229.09:11:13.72#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:13.72#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:13.72#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.09:11:13.72#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:13.72#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:13.84#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:13.84#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:13.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:11:13.84#ibcon#first serial, iclass 22, count 0 2006.229.09:11:13.84#ibcon#enter sib2, iclass 22, count 0 2006.229.09:11:13.84#ibcon#flushed, iclass 22, count 0 2006.229.09:11:13.84#ibcon#about to write, iclass 22, count 0 2006.229.09:11:13.84#ibcon#wrote, iclass 22, count 0 2006.229.09:11:13.84#ibcon#about to read 3, iclass 22, count 0 2006.229.09:11:13.86#ibcon#read 3, iclass 22, count 0 2006.229.09:11:13.86#ibcon#about to read 4, iclass 22, count 0 2006.229.09:11:13.86#ibcon#read 4, iclass 22, count 0 2006.229.09:11:13.86#ibcon#about to read 5, iclass 22, count 0 2006.229.09:11:13.86#ibcon#read 5, iclass 22, count 0 2006.229.09:11:13.86#ibcon#about to read 6, iclass 22, count 0 2006.229.09:11:13.86#ibcon#read 6, iclass 22, count 0 2006.229.09:11:13.86#ibcon#end of sib2, iclass 22, count 0 2006.229.09:11:13.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:11:13.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:11:13.86#ibcon#[25=USB\r\n] 2006.229.09:11:13.86#ibcon#*before write, iclass 22, count 0 2006.229.09:11:13.86#ibcon#enter sib2, iclass 22, count 0 2006.229.09:11:13.86#ibcon#flushed, iclass 22, count 0 2006.229.09:11:13.86#ibcon#about to write, iclass 22, count 0 2006.229.09:11:13.86#ibcon#wrote, iclass 22, count 0 2006.229.09:11:13.86#ibcon#about to read 3, iclass 22, count 0 2006.229.09:11:13.89#ibcon#read 3, iclass 22, count 0 2006.229.09:11:13.89#ibcon#about to read 4, iclass 22, count 0 2006.229.09:11:13.89#ibcon#read 4, iclass 22, count 0 2006.229.09:11:13.89#ibcon#about to read 5, iclass 22, count 0 2006.229.09:11:13.89#ibcon#read 5, iclass 22, count 0 2006.229.09:11:13.89#ibcon#about to read 6, iclass 22, count 0 2006.229.09:11:13.89#ibcon#read 6, iclass 22, count 0 2006.229.09:11:13.89#ibcon#end of sib2, iclass 22, count 0 2006.229.09:11:13.89#ibcon#*after write, iclass 22, count 0 2006.229.09:11:13.89#ibcon#*before return 0, iclass 22, count 0 2006.229.09:11:13.89#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:13.89#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:13.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:11:13.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:11:13.89$vck44/valo=6,814.99 2006.229.09:11:13.89#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:11:13.89#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:11:13.89#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:13.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:13.89#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:13.89#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:13.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:11:13.89#ibcon#first serial, iclass 24, count 0 2006.229.09:11:13.89#ibcon#enter sib2, iclass 24, count 0 2006.229.09:11:13.89#ibcon#flushed, iclass 24, count 0 2006.229.09:11:13.89#ibcon#about to write, iclass 24, count 0 2006.229.09:11:13.89#ibcon#wrote, iclass 24, count 0 2006.229.09:11:13.89#ibcon#about to read 3, iclass 24, count 0 2006.229.09:11:13.91#ibcon#read 3, iclass 24, count 0 2006.229.09:11:13.91#ibcon#about to read 4, iclass 24, count 0 2006.229.09:11:13.91#ibcon#read 4, iclass 24, count 0 2006.229.09:11:13.91#ibcon#about to read 5, iclass 24, count 0 2006.229.09:11:13.91#ibcon#read 5, iclass 24, count 0 2006.229.09:11:13.91#ibcon#about to read 6, iclass 24, count 0 2006.229.09:11:13.91#ibcon#read 6, iclass 24, count 0 2006.229.09:11:13.91#ibcon#end of sib2, iclass 24, count 0 2006.229.09:11:13.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:11:13.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:11:13.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:11:13.91#ibcon#*before write, iclass 24, count 0 2006.229.09:11:13.91#ibcon#enter sib2, iclass 24, count 0 2006.229.09:11:13.91#ibcon#flushed, iclass 24, count 0 2006.229.09:11:13.91#ibcon#about to write, iclass 24, count 0 2006.229.09:11:13.91#ibcon#wrote, iclass 24, count 0 2006.229.09:11:13.91#ibcon#about to read 3, iclass 24, count 0 2006.229.09:11:13.95#ibcon#read 3, iclass 24, count 0 2006.229.09:11:13.95#ibcon#about to read 4, iclass 24, count 0 2006.229.09:11:13.95#ibcon#read 4, iclass 24, count 0 2006.229.09:11:13.95#ibcon#about to read 5, iclass 24, count 0 2006.229.09:11:13.95#ibcon#read 5, iclass 24, count 0 2006.229.09:11:13.95#ibcon#about to read 6, iclass 24, count 0 2006.229.09:11:13.95#ibcon#read 6, iclass 24, count 0 2006.229.09:11:13.95#ibcon#end of sib2, iclass 24, count 0 2006.229.09:11:13.95#ibcon#*after write, iclass 24, count 0 2006.229.09:11:13.95#ibcon#*before return 0, iclass 24, count 0 2006.229.09:11:13.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:13.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:13.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:11:13.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:11:13.95$vck44/va=6,4 2006.229.09:11:13.95#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.09:11:13.95#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.09:11:13.95#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:13.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:14.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:14.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:14.01#ibcon#enter wrdev, iclass 26, count 2 2006.229.09:11:14.01#ibcon#first serial, iclass 26, count 2 2006.229.09:11:14.01#ibcon#enter sib2, iclass 26, count 2 2006.229.09:11:14.01#ibcon#flushed, iclass 26, count 2 2006.229.09:11:14.01#ibcon#about to write, iclass 26, count 2 2006.229.09:11:14.01#ibcon#wrote, iclass 26, count 2 2006.229.09:11:14.01#ibcon#about to read 3, iclass 26, count 2 2006.229.09:11:14.03#ibcon#read 3, iclass 26, count 2 2006.229.09:11:14.03#ibcon#about to read 4, iclass 26, count 2 2006.229.09:11:14.03#ibcon#read 4, iclass 26, count 2 2006.229.09:11:14.03#ibcon#about to read 5, iclass 26, count 2 2006.229.09:11:14.03#ibcon#read 5, iclass 26, count 2 2006.229.09:11:14.03#ibcon#about to read 6, iclass 26, count 2 2006.229.09:11:14.03#ibcon#read 6, iclass 26, count 2 2006.229.09:11:14.03#ibcon#end of sib2, iclass 26, count 2 2006.229.09:11:14.03#ibcon#*mode == 0, iclass 26, count 2 2006.229.09:11:14.03#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.09:11:14.03#ibcon#[25=AT06-04\r\n] 2006.229.09:11:14.03#ibcon#*before write, iclass 26, count 2 2006.229.09:11:14.03#ibcon#enter sib2, iclass 26, count 2 2006.229.09:11:14.03#ibcon#flushed, iclass 26, count 2 2006.229.09:11:14.03#ibcon#about to write, iclass 26, count 2 2006.229.09:11:14.03#ibcon#wrote, iclass 26, count 2 2006.229.09:11:14.03#ibcon#about to read 3, iclass 26, count 2 2006.229.09:11:14.06#ibcon#read 3, iclass 26, count 2 2006.229.09:11:14.06#ibcon#about to read 4, iclass 26, count 2 2006.229.09:11:14.06#ibcon#read 4, iclass 26, count 2 2006.229.09:11:14.06#ibcon#about to read 5, iclass 26, count 2 2006.229.09:11:14.06#ibcon#read 5, iclass 26, count 2 2006.229.09:11:14.06#ibcon#about to read 6, iclass 26, count 2 2006.229.09:11:14.06#ibcon#read 6, iclass 26, count 2 2006.229.09:11:14.06#ibcon#end of sib2, iclass 26, count 2 2006.229.09:11:14.06#ibcon#*after write, iclass 26, count 2 2006.229.09:11:14.06#ibcon#*before return 0, iclass 26, count 2 2006.229.09:11:14.06#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:14.06#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:14.06#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.09:11:14.06#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:14.06#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:14.18#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:14.18#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:14.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:11:14.18#ibcon#first serial, iclass 26, count 0 2006.229.09:11:14.18#ibcon#enter sib2, iclass 26, count 0 2006.229.09:11:14.18#ibcon#flushed, iclass 26, count 0 2006.229.09:11:14.18#ibcon#about to write, iclass 26, count 0 2006.229.09:11:14.18#ibcon#wrote, iclass 26, count 0 2006.229.09:11:14.18#ibcon#about to read 3, iclass 26, count 0 2006.229.09:11:14.20#ibcon#read 3, iclass 26, count 0 2006.229.09:11:14.20#ibcon#about to read 4, iclass 26, count 0 2006.229.09:11:14.20#ibcon#read 4, iclass 26, count 0 2006.229.09:11:14.20#ibcon#about to read 5, iclass 26, count 0 2006.229.09:11:14.20#ibcon#read 5, iclass 26, count 0 2006.229.09:11:14.20#ibcon#about to read 6, iclass 26, count 0 2006.229.09:11:14.20#ibcon#read 6, iclass 26, count 0 2006.229.09:11:14.20#ibcon#end of sib2, iclass 26, count 0 2006.229.09:11:14.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:11:14.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:11:14.20#ibcon#[25=USB\r\n] 2006.229.09:11:14.20#ibcon#*before write, iclass 26, count 0 2006.229.09:11:14.20#ibcon#enter sib2, iclass 26, count 0 2006.229.09:11:14.20#ibcon#flushed, iclass 26, count 0 2006.229.09:11:14.20#ibcon#about to write, iclass 26, count 0 2006.229.09:11:14.20#ibcon#wrote, iclass 26, count 0 2006.229.09:11:14.20#ibcon#about to read 3, iclass 26, count 0 2006.229.09:11:14.23#ibcon#read 3, iclass 26, count 0 2006.229.09:11:14.23#ibcon#about to read 4, iclass 26, count 0 2006.229.09:11:14.23#ibcon#read 4, iclass 26, count 0 2006.229.09:11:14.23#ibcon#about to read 5, iclass 26, count 0 2006.229.09:11:14.23#ibcon#read 5, iclass 26, count 0 2006.229.09:11:14.23#ibcon#about to read 6, iclass 26, count 0 2006.229.09:11:14.23#ibcon#read 6, iclass 26, count 0 2006.229.09:11:14.23#ibcon#end of sib2, iclass 26, count 0 2006.229.09:11:14.23#ibcon#*after write, iclass 26, count 0 2006.229.09:11:14.23#ibcon#*before return 0, iclass 26, count 0 2006.229.09:11:14.23#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:14.23#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:14.23#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:11:14.23#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:11:14.23$vck44/valo=7,864.99 2006.229.09:11:14.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.09:11:14.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.09:11:14.23#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:14.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:14.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:14.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:14.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:11:14.23#ibcon#first serial, iclass 28, count 0 2006.229.09:11:14.23#ibcon#enter sib2, iclass 28, count 0 2006.229.09:11:14.23#ibcon#flushed, iclass 28, count 0 2006.229.09:11:14.23#ibcon#about to write, iclass 28, count 0 2006.229.09:11:14.23#ibcon#wrote, iclass 28, count 0 2006.229.09:11:14.23#ibcon#about to read 3, iclass 28, count 0 2006.229.09:11:14.25#ibcon#read 3, iclass 28, count 0 2006.229.09:11:14.25#ibcon#about to read 4, iclass 28, count 0 2006.229.09:11:14.25#ibcon#read 4, iclass 28, count 0 2006.229.09:11:14.25#ibcon#about to read 5, iclass 28, count 0 2006.229.09:11:14.25#ibcon#read 5, iclass 28, count 0 2006.229.09:11:14.25#ibcon#about to read 6, iclass 28, count 0 2006.229.09:11:14.25#ibcon#read 6, iclass 28, count 0 2006.229.09:11:14.25#ibcon#end of sib2, iclass 28, count 0 2006.229.09:11:14.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:11:14.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:11:14.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:11:14.25#ibcon#*before write, iclass 28, count 0 2006.229.09:11:14.25#ibcon#enter sib2, iclass 28, count 0 2006.229.09:11:14.25#ibcon#flushed, iclass 28, count 0 2006.229.09:11:14.25#ibcon#about to write, iclass 28, count 0 2006.229.09:11:14.25#ibcon#wrote, iclass 28, count 0 2006.229.09:11:14.25#ibcon#about to read 3, iclass 28, count 0 2006.229.09:11:14.29#ibcon#read 3, iclass 28, count 0 2006.229.09:11:14.29#ibcon#about to read 4, iclass 28, count 0 2006.229.09:11:14.29#ibcon#read 4, iclass 28, count 0 2006.229.09:11:14.29#ibcon#about to read 5, iclass 28, count 0 2006.229.09:11:14.29#ibcon#read 5, iclass 28, count 0 2006.229.09:11:14.29#ibcon#about to read 6, iclass 28, count 0 2006.229.09:11:14.29#ibcon#read 6, iclass 28, count 0 2006.229.09:11:14.29#ibcon#end of sib2, iclass 28, count 0 2006.229.09:11:14.29#ibcon#*after write, iclass 28, count 0 2006.229.09:11:14.29#ibcon#*before return 0, iclass 28, count 0 2006.229.09:11:14.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:14.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:14.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:11:14.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:11:14.29$vck44/va=7,5 2006.229.09:11:14.29#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.09:11:14.29#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.09:11:14.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:14.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:14.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:14.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:14.35#ibcon#enter wrdev, iclass 30, count 2 2006.229.09:11:14.35#ibcon#first serial, iclass 30, count 2 2006.229.09:11:14.35#ibcon#enter sib2, iclass 30, count 2 2006.229.09:11:14.35#ibcon#flushed, iclass 30, count 2 2006.229.09:11:14.35#ibcon#about to write, iclass 30, count 2 2006.229.09:11:14.35#ibcon#wrote, iclass 30, count 2 2006.229.09:11:14.35#ibcon#about to read 3, iclass 30, count 2 2006.229.09:11:14.37#ibcon#read 3, iclass 30, count 2 2006.229.09:11:14.37#ibcon#about to read 4, iclass 30, count 2 2006.229.09:11:14.37#ibcon#read 4, iclass 30, count 2 2006.229.09:11:14.37#ibcon#about to read 5, iclass 30, count 2 2006.229.09:11:14.37#ibcon#read 5, iclass 30, count 2 2006.229.09:11:14.37#ibcon#about to read 6, iclass 30, count 2 2006.229.09:11:14.37#ibcon#read 6, iclass 30, count 2 2006.229.09:11:14.37#ibcon#end of sib2, iclass 30, count 2 2006.229.09:11:14.37#ibcon#*mode == 0, iclass 30, count 2 2006.229.09:11:14.37#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.09:11:14.37#ibcon#[25=AT07-05\r\n] 2006.229.09:11:14.37#ibcon#*before write, iclass 30, count 2 2006.229.09:11:14.37#ibcon#enter sib2, iclass 30, count 2 2006.229.09:11:14.37#ibcon#flushed, iclass 30, count 2 2006.229.09:11:14.37#ibcon#about to write, iclass 30, count 2 2006.229.09:11:14.37#ibcon#wrote, iclass 30, count 2 2006.229.09:11:14.37#ibcon#about to read 3, iclass 30, count 2 2006.229.09:11:14.40#ibcon#read 3, iclass 30, count 2 2006.229.09:11:14.40#ibcon#about to read 4, iclass 30, count 2 2006.229.09:11:14.40#ibcon#read 4, iclass 30, count 2 2006.229.09:11:14.40#ibcon#about to read 5, iclass 30, count 2 2006.229.09:11:14.40#ibcon#read 5, iclass 30, count 2 2006.229.09:11:14.40#ibcon#about to read 6, iclass 30, count 2 2006.229.09:11:14.40#ibcon#read 6, iclass 30, count 2 2006.229.09:11:14.40#ibcon#end of sib2, iclass 30, count 2 2006.229.09:11:14.40#ibcon#*after write, iclass 30, count 2 2006.229.09:11:14.40#ibcon#*before return 0, iclass 30, count 2 2006.229.09:11:14.40#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:14.40#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:14.40#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.09:11:14.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:14.40#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:14.52#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:14.52#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:14.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:11:14.52#ibcon#first serial, iclass 30, count 0 2006.229.09:11:14.52#ibcon#enter sib2, iclass 30, count 0 2006.229.09:11:14.52#ibcon#flushed, iclass 30, count 0 2006.229.09:11:14.52#ibcon#about to write, iclass 30, count 0 2006.229.09:11:14.52#ibcon#wrote, iclass 30, count 0 2006.229.09:11:14.52#ibcon#about to read 3, iclass 30, count 0 2006.229.09:11:14.54#ibcon#read 3, iclass 30, count 0 2006.229.09:11:14.54#ibcon#about to read 4, iclass 30, count 0 2006.229.09:11:14.54#ibcon#read 4, iclass 30, count 0 2006.229.09:11:14.54#ibcon#about to read 5, iclass 30, count 0 2006.229.09:11:14.54#ibcon#read 5, iclass 30, count 0 2006.229.09:11:14.54#ibcon#about to read 6, iclass 30, count 0 2006.229.09:11:14.54#ibcon#read 6, iclass 30, count 0 2006.229.09:11:14.54#ibcon#end of sib2, iclass 30, count 0 2006.229.09:11:14.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:11:14.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:11:14.54#ibcon#[25=USB\r\n] 2006.229.09:11:14.54#ibcon#*before write, iclass 30, count 0 2006.229.09:11:14.54#ibcon#enter sib2, iclass 30, count 0 2006.229.09:11:14.54#ibcon#flushed, iclass 30, count 0 2006.229.09:11:14.54#ibcon#about to write, iclass 30, count 0 2006.229.09:11:14.54#ibcon#wrote, iclass 30, count 0 2006.229.09:11:14.54#ibcon#about to read 3, iclass 30, count 0 2006.229.09:11:14.57#ibcon#read 3, iclass 30, count 0 2006.229.09:11:14.57#ibcon#about to read 4, iclass 30, count 0 2006.229.09:11:14.57#ibcon#read 4, iclass 30, count 0 2006.229.09:11:14.57#ibcon#about to read 5, iclass 30, count 0 2006.229.09:11:14.57#ibcon#read 5, iclass 30, count 0 2006.229.09:11:14.57#ibcon#about to read 6, iclass 30, count 0 2006.229.09:11:14.57#ibcon#read 6, iclass 30, count 0 2006.229.09:11:14.57#ibcon#end of sib2, iclass 30, count 0 2006.229.09:11:14.57#ibcon#*after write, iclass 30, count 0 2006.229.09:11:14.57#ibcon#*before return 0, iclass 30, count 0 2006.229.09:11:14.57#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:14.57#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:14.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:11:14.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:11:14.57$vck44/valo=8,884.99 2006.229.09:11:14.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.09:11:14.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.09:11:14.57#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:14.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:14.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:14.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:14.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:11:14.57#ibcon#first serial, iclass 32, count 0 2006.229.09:11:14.57#ibcon#enter sib2, iclass 32, count 0 2006.229.09:11:14.57#ibcon#flushed, iclass 32, count 0 2006.229.09:11:14.57#ibcon#about to write, iclass 32, count 0 2006.229.09:11:14.57#ibcon#wrote, iclass 32, count 0 2006.229.09:11:14.57#ibcon#about to read 3, iclass 32, count 0 2006.229.09:11:14.59#ibcon#read 3, iclass 32, count 0 2006.229.09:11:14.59#ibcon#about to read 4, iclass 32, count 0 2006.229.09:11:14.59#ibcon#read 4, iclass 32, count 0 2006.229.09:11:14.59#ibcon#about to read 5, iclass 32, count 0 2006.229.09:11:14.59#ibcon#read 5, iclass 32, count 0 2006.229.09:11:14.59#ibcon#about to read 6, iclass 32, count 0 2006.229.09:11:14.59#ibcon#read 6, iclass 32, count 0 2006.229.09:11:14.59#ibcon#end of sib2, iclass 32, count 0 2006.229.09:11:14.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:11:14.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:11:14.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:11:14.59#ibcon#*before write, iclass 32, count 0 2006.229.09:11:14.59#ibcon#enter sib2, iclass 32, count 0 2006.229.09:11:14.59#ibcon#flushed, iclass 32, count 0 2006.229.09:11:14.59#ibcon#about to write, iclass 32, count 0 2006.229.09:11:14.59#ibcon#wrote, iclass 32, count 0 2006.229.09:11:14.59#ibcon#about to read 3, iclass 32, count 0 2006.229.09:11:14.63#ibcon#read 3, iclass 32, count 0 2006.229.09:11:14.63#ibcon#about to read 4, iclass 32, count 0 2006.229.09:11:14.63#ibcon#read 4, iclass 32, count 0 2006.229.09:11:14.63#ibcon#about to read 5, iclass 32, count 0 2006.229.09:11:14.63#ibcon#read 5, iclass 32, count 0 2006.229.09:11:14.63#ibcon#about to read 6, iclass 32, count 0 2006.229.09:11:14.63#ibcon#read 6, iclass 32, count 0 2006.229.09:11:14.63#ibcon#end of sib2, iclass 32, count 0 2006.229.09:11:14.63#ibcon#*after write, iclass 32, count 0 2006.229.09:11:14.63#ibcon#*before return 0, iclass 32, count 0 2006.229.09:11:14.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:14.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:14.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:11:14.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:11:14.63$vck44/va=8,6 2006.229.09:11:14.63#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.09:11:14.63#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.09:11:14.63#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:14.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:11:14.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:11:14.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:11:14.69#ibcon#enter wrdev, iclass 34, count 2 2006.229.09:11:14.69#ibcon#first serial, iclass 34, count 2 2006.229.09:11:14.69#ibcon#enter sib2, iclass 34, count 2 2006.229.09:11:14.69#ibcon#flushed, iclass 34, count 2 2006.229.09:11:14.69#ibcon#about to write, iclass 34, count 2 2006.229.09:11:14.69#ibcon#wrote, iclass 34, count 2 2006.229.09:11:14.69#ibcon#about to read 3, iclass 34, count 2 2006.229.09:11:14.71#ibcon#read 3, iclass 34, count 2 2006.229.09:11:14.71#ibcon#about to read 4, iclass 34, count 2 2006.229.09:11:14.71#ibcon#read 4, iclass 34, count 2 2006.229.09:11:14.71#ibcon#about to read 5, iclass 34, count 2 2006.229.09:11:14.71#ibcon#read 5, iclass 34, count 2 2006.229.09:11:14.71#ibcon#about to read 6, iclass 34, count 2 2006.229.09:11:14.71#ibcon#read 6, iclass 34, count 2 2006.229.09:11:14.71#ibcon#end of sib2, iclass 34, count 2 2006.229.09:11:14.71#ibcon#*mode == 0, iclass 34, count 2 2006.229.09:11:14.71#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.09:11:14.71#ibcon#[25=AT08-06\r\n] 2006.229.09:11:14.71#ibcon#*before write, iclass 34, count 2 2006.229.09:11:14.71#ibcon#enter sib2, iclass 34, count 2 2006.229.09:11:14.71#ibcon#flushed, iclass 34, count 2 2006.229.09:11:14.71#ibcon#about to write, iclass 34, count 2 2006.229.09:11:14.71#ibcon#wrote, iclass 34, count 2 2006.229.09:11:14.71#ibcon#about to read 3, iclass 34, count 2 2006.229.09:11:14.74#ibcon#read 3, iclass 34, count 2 2006.229.09:11:14.74#ibcon#about to read 4, iclass 34, count 2 2006.229.09:11:14.74#ibcon#read 4, iclass 34, count 2 2006.229.09:11:14.74#ibcon#about to read 5, iclass 34, count 2 2006.229.09:11:14.74#ibcon#read 5, iclass 34, count 2 2006.229.09:11:14.74#ibcon#about to read 6, iclass 34, count 2 2006.229.09:11:14.74#ibcon#read 6, iclass 34, count 2 2006.229.09:11:14.74#ibcon#end of sib2, iclass 34, count 2 2006.229.09:11:14.74#ibcon#*after write, iclass 34, count 2 2006.229.09:11:14.74#ibcon#*before return 0, iclass 34, count 2 2006.229.09:11:14.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:11:14.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:11:14.74#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.09:11:14.74#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:14.74#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:11:14.86#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:11:14.86#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:11:14.86#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:11:14.86#ibcon#first serial, iclass 34, count 0 2006.229.09:11:14.86#ibcon#enter sib2, iclass 34, count 0 2006.229.09:11:14.86#ibcon#flushed, iclass 34, count 0 2006.229.09:11:14.86#ibcon#about to write, iclass 34, count 0 2006.229.09:11:14.86#ibcon#wrote, iclass 34, count 0 2006.229.09:11:14.86#ibcon#about to read 3, iclass 34, count 0 2006.229.09:11:14.88#ibcon#read 3, iclass 34, count 0 2006.229.09:11:14.88#ibcon#about to read 4, iclass 34, count 0 2006.229.09:11:14.88#ibcon#read 4, iclass 34, count 0 2006.229.09:11:14.88#ibcon#about to read 5, iclass 34, count 0 2006.229.09:11:14.88#ibcon#read 5, iclass 34, count 0 2006.229.09:11:14.88#ibcon#about to read 6, iclass 34, count 0 2006.229.09:11:14.88#ibcon#read 6, iclass 34, count 0 2006.229.09:11:14.88#ibcon#end of sib2, iclass 34, count 0 2006.229.09:11:14.88#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:11:14.88#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:11:14.88#ibcon#[25=USB\r\n] 2006.229.09:11:14.88#ibcon#*before write, iclass 34, count 0 2006.229.09:11:14.88#ibcon#enter sib2, iclass 34, count 0 2006.229.09:11:14.88#ibcon#flushed, iclass 34, count 0 2006.229.09:11:14.88#ibcon#about to write, iclass 34, count 0 2006.229.09:11:14.88#ibcon#wrote, iclass 34, count 0 2006.229.09:11:14.88#ibcon#about to read 3, iclass 34, count 0 2006.229.09:11:14.91#ibcon#read 3, iclass 34, count 0 2006.229.09:11:14.91#ibcon#about to read 4, iclass 34, count 0 2006.229.09:11:14.91#ibcon#read 4, iclass 34, count 0 2006.229.09:11:14.91#ibcon#about to read 5, iclass 34, count 0 2006.229.09:11:14.91#ibcon#read 5, iclass 34, count 0 2006.229.09:11:14.91#ibcon#about to read 6, iclass 34, count 0 2006.229.09:11:14.91#ibcon#read 6, iclass 34, count 0 2006.229.09:11:14.91#ibcon#end of sib2, iclass 34, count 0 2006.229.09:11:14.91#ibcon#*after write, iclass 34, count 0 2006.229.09:11:14.91#ibcon#*before return 0, iclass 34, count 0 2006.229.09:11:14.91#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:11:14.91#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:11:14.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:11:14.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:11:14.91$vck44/vblo=1,629.99 2006.229.09:11:14.91#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.09:11:14.91#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.09:11:14.91#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:14.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:11:14.91#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:11:14.91#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:11:14.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:11:14.91#ibcon#first serial, iclass 36, count 0 2006.229.09:11:14.91#ibcon#enter sib2, iclass 36, count 0 2006.229.09:11:14.91#ibcon#flushed, iclass 36, count 0 2006.229.09:11:14.91#ibcon#about to write, iclass 36, count 0 2006.229.09:11:14.91#ibcon#wrote, iclass 36, count 0 2006.229.09:11:14.91#ibcon#about to read 3, iclass 36, count 0 2006.229.09:11:14.93#ibcon#read 3, iclass 36, count 0 2006.229.09:11:14.93#ibcon#about to read 4, iclass 36, count 0 2006.229.09:11:14.93#ibcon#read 4, iclass 36, count 0 2006.229.09:11:14.93#ibcon#about to read 5, iclass 36, count 0 2006.229.09:11:14.93#ibcon#read 5, iclass 36, count 0 2006.229.09:11:14.93#ibcon#about to read 6, iclass 36, count 0 2006.229.09:11:14.93#ibcon#read 6, iclass 36, count 0 2006.229.09:11:14.93#ibcon#end of sib2, iclass 36, count 0 2006.229.09:11:14.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:11:14.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:11:14.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:11:14.93#ibcon#*before write, iclass 36, count 0 2006.229.09:11:14.93#ibcon#enter sib2, iclass 36, count 0 2006.229.09:11:14.93#ibcon#flushed, iclass 36, count 0 2006.229.09:11:14.93#ibcon#about to write, iclass 36, count 0 2006.229.09:11:14.93#ibcon#wrote, iclass 36, count 0 2006.229.09:11:14.93#ibcon#about to read 3, iclass 36, count 0 2006.229.09:11:14.97#ibcon#read 3, iclass 36, count 0 2006.229.09:11:14.97#ibcon#about to read 4, iclass 36, count 0 2006.229.09:11:14.97#ibcon#read 4, iclass 36, count 0 2006.229.09:11:14.97#ibcon#about to read 5, iclass 36, count 0 2006.229.09:11:14.97#ibcon#read 5, iclass 36, count 0 2006.229.09:11:14.97#ibcon#about to read 6, iclass 36, count 0 2006.229.09:11:14.97#ibcon#read 6, iclass 36, count 0 2006.229.09:11:14.97#ibcon#end of sib2, iclass 36, count 0 2006.229.09:11:14.97#ibcon#*after write, iclass 36, count 0 2006.229.09:11:14.97#ibcon#*before return 0, iclass 36, count 0 2006.229.09:11:14.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:11:14.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:11:14.97#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:11:14.97#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:11:14.97$vck44/vb=1,4 2006.229.09:11:14.97#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.09:11:14.97#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.09:11:14.97#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:14.97#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:11:14.97#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:11:14.97#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:11:14.97#ibcon#enter wrdev, iclass 38, count 2 2006.229.09:11:14.97#ibcon#first serial, iclass 38, count 2 2006.229.09:11:14.97#ibcon#enter sib2, iclass 38, count 2 2006.229.09:11:14.97#ibcon#flushed, iclass 38, count 2 2006.229.09:11:14.97#ibcon#about to write, iclass 38, count 2 2006.229.09:11:14.97#ibcon#wrote, iclass 38, count 2 2006.229.09:11:14.97#ibcon#about to read 3, iclass 38, count 2 2006.229.09:11:14.99#ibcon#read 3, iclass 38, count 2 2006.229.09:11:14.99#ibcon#about to read 4, iclass 38, count 2 2006.229.09:11:14.99#ibcon#read 4, iclass 38, count 2 2006.229.09:11:14.99#ibcon#about to read 5, iclass 38, count 2 2006.229.09:11:14.99#ibcon#read 5, iclass 38, count 2 2006.229.09:11:14.99#ibcon#about to read 6, iclass 38, count 2 2006.229.09:11:14.99#ibcon#read 6, iclass 38, count 2 2006.229.09:11:14.99#ibcon#end of sib2, iclass 38, count 2 2006.229.09:11:14.99#ibcon#*mode == 0, iclass 38, count 2 2006.229.09:11:14.99#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.09:11:14.99#ibcon#[27=AT01-04\r\n] 2006.229.09:11:14.99#ibcon#*before write, iclass 38, count 2 2006.229.09:11:14.99#ibcon#enter sib2, iclass 38, count 2 2006.229.09:11:14.99#ibcon#flushed, iclass 38, count 2 2006.229.09:11:14.99#ibcon#about to write, iclass 38, count 2 2006.229.09:11:14.99#ibcon#wrote, iclass 38, count 2 2006.229.09:11:14.99#ibcon#about to read 3, iclass 38, count 2 2006.229.09:11:15.02#ibcon#read 3, iclass 38, count 2 2006.229.09:11:15.02#ibcon#about to read 4, iclass 38, count 2 2006.229.09:11:15.02#ibcon#read 4, iclass 38, count 2 2006.229.09:11:15.02#ibcon#about to read 5, iclass 38, count 2 2006.229.09:11:15.02#ibcon#read 5, iclass 38, count 2 2006.229.09:11:15.02#ibcon#about to read 6, iclass 38, count 2 2006.229.09:11:15.02#ibcon#read 6, iclass 38, count 2 2006.229.09:11:15.02#ibcon#end of sib2, iclass 38, count 2 2006.229.09:11:15.02#ibcon#*after write, iclass 38, count 2 2006.229.09:11:15.02#ibcon#*before return 0, iclass 38, count 2 2006.229.09:11:15.02#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:11:15.02#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:11:15.02#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.09:11:15.02#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:15.02#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:11:15.14#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:11:15.14#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:11:15.14#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:11:15.14#ibcon#first serial, iclass 38, count 0 2006.229.09:11:15.14#ibcon#enter sib2, iclass 38, count 0 2006.229.09:11:15.14#ibcon#flushed, iclass 38, count 0 2006.229.09:11:15.14#ibcon#about to write, iclass 38, count 0 2006.229.09:11:15.14#ibcon#wrote, iclass 38, count 0 2006.229.09:11:15.14#ibcon#about to read 3, iclass 38, count 0 2006.229.09:11:15.16#ibcon#read 3, iclass 38, count 0 2006.229.09:11:15.16#ibcon#about to read 4, iclass 38, count 0 2006.229.09:11:15.16#ibcon#read 4, iclass 38, count 0 2006.229.09:11:15.16#ibcon#about to read 5, iclass 38, count 0 2006.229.09:11:15.16#ibcon#read 5, iclass 38, count 0 2006.229.09:11:15.16#ibcon#about to read 6, iclass 38, count 0 2006.229.09:11:15.16#ibcon#read 6, iclass 38, count 0 2006.229.09:11:15.16#ibcon#end of sib2, iclass 38, count 0 2006.229.09:11:15.16#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:11:15.16#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:11:15.16#ibcon#[27=USB\r\n] 2006.229.09:11:15.16#ibcon#*before write, iclass 38, count 0 2006.229.09:11:15.16#ibcon#enter sib2, iclass 38, count 0 2006.229.09:11:15.16#ibcon#flushed, iclass 38, count 0 2006.229.09:11:15.16#ibcon#about to write, iclass 38, count 0 2006.229.09:11:15.16#ibcon#wrote, iclass 38, count 0 2006.229.09:11:15.16#ibcon#about to read 3, iclass 38, count 0 2006.229.09:11:15.19#ibcon#read 3, iclass 38, count 0 2006.229.09:11:15.19#ibcon#about to read 4, iclass 38, count 0 2006.229.09:11:15.19#ibcon#read 4, iclass 38, count 0 2006.229.09:11:15.19#ibcon#about to read 5, iclass 38, count 0 2006.229.09:11:15.19#ibcon#read 5, iclass 38, count 0 2006.229.09:11:15.19#ibcon#about to read 6, iclass 38, count 0 2006.229.09:11:15.19#ibcon#read 6, iclass 38, count 0 2006.229.09:11:15.19#ibcon#end of sib2, iclass 38, count 0 2006.229.09:11:15.19#ibcon#*after write, iclass 38, count 0 2006.229.09:11:15.19#ibcon#*before return 0, iclass 38, count 0 2006.229.09:11:15.19#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:11:15.19#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:11:15.19#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:11:15.19#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:11:15.19$vck44/vblo=2,634.99 2006.229.09:11:15.19#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:11:15.19#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:11:15.19#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:15.19#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:15.19#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:15.19#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:15.19#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:11:15.19#ibcon#first serial, iclass 40, count 0 2006.229.09:11:15.19#ibcon#enter sib2, iclass 40, count 0 2006.229.09:11:15.19#ibcon#flushed, iclass 40, count 0 2006.229.09:11:15.19#ibcon#about to write, iclass 40, count 0 2006.229.09:11:15.19#ibcon#wrote, iclass 40, count 0 2006.229.09:11:15.19#ibcon#about to read 3, iclass 40, count 0 2006.229.09:11:15.21#ibcon#read 3, iclass 40, count 0 2006.229.09:11:15.21#ibcon#about to read 4, iclass 40, count 0 2006.229.09:11:15.21#ibcon#read 4, iclass 40, count 0 2006.229.09:11:15.21#ibcon#about to read 5, iclass 40, count 0 2006.229.09:11:15.21#ibcon#read 5, iclass 40, count 0 2006.229.09:11:15.21#ibcon#about to read 6, iclass 40, count 0 2006.229.09:11:15.21#ibcon#read 6, iclass 40, count 0 2006.229.09:11:15.21#ibcon#end of sib2, iclass 40, count 0 2006.229.09:11:15.21#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:11:15.21#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:11:15.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:11:15.21#ibcon#*before write, iclass 40, count 0 2006.229.09:11:15.21#ibcon#enter sib2, iclass 40, count 0 2006.229.09:11:15.21#ibcon#flushed, iclass 40, count 0 2006.229.09:11:15.21#ibcon#about to write, iclass 40, count 0 2006.229.09:11:15.21#ibcon#wrote, iclass 40, count 0 2006.229.09:11:15.21#ibcon#about to read 3, iclass 40, count 0 2006.229.09:11:15.25#ibcon#read 3, iclass 40, count 0 2006.229.09:11:15.25#ibcon#about to read 4, iclass 40, count 0 2006.229.09:11:15.25#ibcon#read 4, iclass 40, count 0 2006.229.09:11:15.25#ibcon#about to read 5, iclass 40, count 0 2006.229.09:11:15.25#ibcon#read 5, iclass 40, count 0 2006.229.09:11:15.25#ibcon#about to read 6, iclass 40, count 0 2006.229.09:11:15.25#ibcon#read 6, iclass 40, count 0 2006.229.09:11:15.25#ibcon#end of sib2, iclass 40, count 0 2006.229.09:11:15.25#ibcon#*after write, iclass 40, count 0 2006.229.09:11:15.25#ibcon#*before return 0, iclass 40, count 0 2006.229.09:11:15.25#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:15.25#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:11:15.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:11:15.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:11:15.25$vck44/vb=2,4 2006.229.09:11:15.25#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.09:11:15.25#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.09:11:15.25#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:15.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:15.31#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:15.31#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:15.31#ibcon#enter wrdev, iclass 4, count 2 2006.229.09:11:15.31#ibcon#first serial, iclass 4, count 2 2006.229.09:11:15.31#ibcon#enter sib2, iclass 4, count 2 2006.229.09:11:15.31#ibcon#flushed, iclass 4, count 2 2006.229.09:11:15.31#ibcon#about to write, iclass 4, count 2 2006.229.09:11:15.31#ibcon#wrote, iclass 4, count 2 2006.229.09:11:15.31#ibcon#about to read 3, iclass 4, count 2 2006.229.09:11:15.33#ibcon#read 3, iclass 4, count 2 2006.229.09:11:15.33#ibcon#about to read 4, iclass 4, count 2 2006.229.09:11:15.33#ibcon#read 4, iclass 4, count 2 2006.229.09:11:15.33#ibcon#about to read 5, iclass 4, count 2 2006.229.09:11:15.33#ibcon#read 5, iclass 4, count 2 2006.229.09:11:15.33#ibcon#about to read 6, iclass 4, count 2 2006.229.09:11:15.33#ibcon#read 6, iclass 4, count 2 2006.229.09:11:15.33#ibcon#end of sib2, iclass 4, count 2 2006.229.09:11:15.33#ibcon#*mode == 0, iclass 4, count 2 2006.229.09:11:15.33#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.09:11:15.33#ibcon#[27=AT02-04\r\n] 2006.229.09:11:15.33#ibcon#*before write, iclass 4, count 2 2006.229.09:11:15.33#ibcon#enter sib2, iclass 4, count 2 2006.229.09:11:15.33#ibcon#flushed, iclass 4, count 2 2006.229.09:11:15.33#ibcon#about to write, iclass 4, count 2 2006.229.09:11:15.33#ibcon#wrote, iclass 4, count 2 2006.229.09:11:15.33#ibcon#about to read 3, iclass 4, count 2 2006.229.09:11:15.36#ibcon#read 3, iclass 4, count 2 2006.229.09:11:15.36#ibcon#about to read 4, iclass 4, count 2 2006.229.09:11:15.36#ibcon#read 4, iclass 4, count 2 2006.229.09:11:15.36#ibcon#about to read 5, iclass 4, count 2 2006.229.09:11:15.36#ibcon#read 5, iclass 4, count 2 2006.229.09:11:15.36#ibcon#about to read 6, iclass 4, count 2 2006.229.09:11:15.36#ibcon#read 6, iclass 4, count 2 2006.229.09:11:15.36#ibcon#end of sib2, iclass 4, count 2 2006.229.09:11:15.36#ibcon#*after write, iclass 4, count 2 2006.229.09:11:15.36#ibcon#*before return 0, iclass 4, count 2 2006.229.09:11:15.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:15.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:11:15.36#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.09:11:15.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:15.36#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:15.48#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:15.48#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:15.48#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:11:15.48#ibcon#first serial, iclass 4, count 0 2006.229.09:11:15.48#ibcon#enter sib2, iclass 4, count 0 2006.229.09:11:15.48#ibcon#flushed, iclass 4, count 0 2006.229.09:11:15.48#ibcon#about to write, iclass 4, count 0 2006.229.09:11:15.48#ibcon#wrote, iclass 4, count 0 2006.229.09:11:15.48#ibcon#about to read 3, iclass 4, count 0 2006.229.09:11:15.50#ibcon#read 3, iclass 4, count 0 2006.229.09:11:15.50#ibcon#about to read 4, iclass 4, count 0 2006.229.09:11:15.50#ibcon#read 4, iclass 4, count 0 2006.229.09:11:15.50#ibcon#about to read 5, iclass 4, count 0 2006.229.09:11:15.50#ibcon#read 5, iclass 4, count 0 2006.229.09:11:15.50#ibcon#about to read 6, iclass 4, count 0 2006.229.09:11:15.50#ibcon#read 6, iclass 4, count 0 2006.229.09:11:15.50#ibcon#end of sib2, iclass 4, count 0 2006.229.09:11:15.50#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:11:15.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:11:15.50#ibcon#[27=USB\r\n] 2006.229.09:11:15.50#ibcon#*before write, iclass 4, count 0 2006.229.09:11:15.50#ibcon#enter sib2, iclass 4, count 0 2006.229.09:11:15.50#ibcon#flushed, iclass 4, count 0 2006.229.09:11:15.50#ibcon#about to write, iclass 4, count 0 2006.229.09:11:15.50#ibcon#wrote, iclass 4, count 0 2006.229.09:11:15.50#ibcon#about to read 3, iclass 4, count 0 2006.229.09:11:15.53#ibcon#read 3, iclass 4, count 0 2006.229.09:11:15.53#ibcon#about to read 4, iclass 4, count 0 2006.229.09:11:15.53#ibcon#read 4, iclass 4, count 0 2006.229.09:11:15.53#ibcon#about to read 5, iclass 4, count 0 2006.229.09:11:15.53#ibcon#read 5, iclass 4, count 0 2006.229.09:11:15.53#ibcon#about to read 6, iclass 4, count 0 2006.229.09:11:15.53#ibcon#read 6, iclass 4, count 0 2006.229.09:11:15.53#ibcon#end of sib2, iclass 4, count 0 2006.229.09:11:15.53#ibcon#*after write, iclass 4, count 0 2006.229.09:11:15.53#ibcon#*before return 0, iclass 4, count 0 2006.229.09:11:15.53#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:15.53#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:11:15.53#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:11:15.53#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:11:15.53$vck44/vblo=3,649.99 2006.229.09:11:15.53#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.09:11:15.53#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.09:11:15.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:15.53#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:15.53#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:15.53#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:15.53#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:11:15.53#ibcon#first serial, iclass 6, count 0 2006.229.09:11:15.53#ibcon#enter sib2, iclass 6, count 0 2006.229.09:11:15.53#ibcon#flushed, iclass 6, count 0 2006.229.09:11:15.53#ibcon#about to write, iclass 6, count 0 2006.229.09:11:15.53#ibcon#wrote, iclass 6, count 0 2006.229.09:11:15.53#ibcon#about to read 3, iclass 6, count 0 2006.229.09:11:15.55#ibcon#read 3, iclass 6, count 0 2006.229.09:11:15.55#ibcon#about to read 4, iclass 6, count 0 2006.229.09:11:15.55#ibcon#read 4, iclass 6, count 0 2006.229.09:11:15.55#ibcon#about to read 5, iclass 6, count 0 2006.229.09:11:15.55#ibcon#read 5, iclass 6, count 0 2006.229.09:11:15.55#ibcon#about to read 6, iclass 6, count 0 2006.229.09:11:15.55#ibcon#read 6, iclass 6, count 0 2006.229.09:11:15.55#ibcon#end of sib2, iclass 6, count 0 2006.229.09:11:15.55#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:11:15.55#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:11:15.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:11:15.55#ibcon#*before write, iclass 6, count 0 2006.229.09:11:15.55#ibcon#enter sib2, iclass 6, count 0 2006.229.09:11:15.55#ibcon#flushed, iclass 6, count 0 2006.229.09:11:15.55#ibcon#about to write, iclass 6, count 0 2006.229.09:11:15.55#ibcon#wrote, iclass 6, count 0 2006.229.09:11:15.55#ibcon#about to read 3, iclass 6, count 0 2006.229.09:11:15.59#ibcon#read 3, iclass 6, count 0 2006.229.09:11:15.59#ibcon#about to read 4, iclass 6, count 0 2006.229.09:11:15.59#ibcon#read 4, iclass 6, count 0 2006.229.09:11:15.59#ibcon#about to read 5, iclass 6, count 0 2006.229.09:11:15.59#ibcon#read 5, iclass 6, count 0 2006.229.09:11:15.59#ibcon#about to read 6, iclass 6, count 0 2006.229.09:11:15.59#ibcon#read 6, iclass 6, count 0 2006.229.09:11:15.59#ibcon#end of sib2, iclass 6, count 0 2006.229.09:11:15.59#ibcon#*after write, iclass 6, count 0 2006.229.09:11:15.59#ibcon#*before return 0, iclass 6, count 0 2006.229.09:11:15.59#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:15.59#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:11:15.59#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:11:15.59#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:11:15.59$vck44/vb=3,4 2006.229.09:11:15.59#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.09:11:15.59#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.09:11:15.59#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:15.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:15.65#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:15.65#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:15.65#ibcon#enter wrdev, iclass 10, count 2 2006.229.09:11:15.65#ibcon#first serial, iclass 10, count 2 2006.229.09:11:15.65#ibcon#enter sib2, iclass 10, count 2 2006.229.09:11:15.65#ibcon#flushed, iclass 10, count 2 2006.229.09:11:15.65#ibcon#about to write, iclass 10, count 2 2006.229.09:11:15.65#ibcon#wrote, iclass 10, count 2 2006.229.09:11:15.65#ibcon#about to read 3, iclass 10, count 2 2006.229.09:11:15.67#ibcon#read 3, iclass 10, count 2 2006.229.09:11:15.67#ibcon#about to read 4, iclass 10, count 2 2006.229.09:11:15.67#ibcon#read 4, iclass 10, count 2 2006.229.09:11:15.67#ibcon#about to read 5, iclass 10, count 2 2006.229.09:11:15.67#ibcon#read 5, iclass 10, count 2 2006.229.09:11:15.67#ibcon#about to read 6, iclass 10, count 2 2006.229.09:11:15.67#ibcon#read 6, iclass 10, count 2 2006.229.09:11:15.67#ibcon#end of sib2, iclass 10, count 2 2006.229.09:11:15.67#ibcon#*mode == 0, iclass 10, count 2 2006.229.09:11:15.67#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.09:11:15.67#ibcon#[27=AT03-04\r\n] 2006.229.09:11:15.67#ibcon#*before write, iclass 10, count 2 2006.229.09:11:15.67#ibcon#enter sib2, iclass 10, count 2 2006.229.09:11:15.67#ibcon#flushed, iclass 10, count 2 2006.229.09:11:15.67#ibcon#about to write, iclass 10, count 2 2006.229.09:11:15.67#ibcon#wrote, iclass 10, count 2 2006.229.09:11:15.67#ibcon#about to read 3, iclass 10, count 2 2006.229.09:11:15.70#ibcon#read 3, iclass 10, count 2 2006.229.09:11:15.70#ibcon#about to read 4, iclass 10, count 2 2006.229.09:11:15.70#ibcon#read 4, iclass 10, count 2 2006.229.09:11:15.70#ibcon#about to read 5, iclass 10, count 2 2006.229.09:11:15.70#ibcon#read 5, iclass 10, count 2 2006.229.09:11:15.70#ibcon#about to read 6, iclass 10, count 2 2006.229.09:11:15.70#ibcon#read 6, iclass 10, count 2 2006.229.09:11:15.70#ibcon#end of sib2, iclass 10, count 2 2006.229.09:11:15.70#ibcon#*after write, iclass 10, count 2 2006.229.09:11:15.70#ibcon#*before return 0, iclass 10, count 2 2006.229.09:11:15.70#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:15.70#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:11:15.70#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.09:11:15.70#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:15.70#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:15.82#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:15.82#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:15.82#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:11:15.82#ibcon#first serial, iclass 10, count 0 2006.229.09:11:15.82#ibcon#enter sib2, iclass 10, count 0 2006.229.09:11:15.82#ibcon#flushed, iclass 10, count 0 2006.229.09:11:15.82#ibcon#about to write, iclass 10, count 0 2006.229.09:11:15.82#ibcon#wrote, iclass 10, count 0 2006.229.09:11:15.82#ibcon#about to read 3, iclass 10, count 0 2006.229.09:11:15.84#ibcon#read 3, iclass 10, count 0 2006.229.09:11:15.84#ibcon#about to read 4, iclass 10, count 0 2006.229.09:11:15.84#ibcon#read 4, iclass 10, count 0 2006.229.09:11:15.84#ibcon#about to read 5, iclass 10, count 0 2006.229.09:11:15.84#ibcon#read 5, iclass 10, count 0 2006.229.09:11:15.84#ibcon#about to read 6, iclass 10, count 0 2006.229.09:11:15.84#ibcon#read 6, iclass 10, count 0 2006.229.09:11:15.84#ibcon#end of sib2, iclass 10, count 0 2006.229.09:11:15.84#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:11:15.84#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:11:15.84#ibcon#[27=USB\r\n] 2006.229.09:11:15.84#ibcon#*before write, iclass 10, count 0 2006.229.09:11:15.84#ibcon#enter sib2, iclass 10, count 0 2006.229.09:11:15.84#ibcon#flushed, iclass 10, count 0 2006.229.09:11:15.84#ibcon#about to write, iclass 10, count 0 2006.229.09:11:15.84#ibcon#wrote, iclass 10, count 0 2006.229.09:11:15.84#ibcon#about to read 3, iclass 10, count 0 2006.229.09:11:15.87#ibcon#read 3, iclass 10, count 0 2006.229.09:11:15.87#ibcon#about to read 4, iclass 10, count 0 2006.229.09:11:15.87#ibcon#read 4, iclass 10, count 0 2006.229.09:11:15.87#ibcon#about to read 5, iclass 10, count 0 2006.229.09:11:15.87#ibcon#read 5, iclass 10, count 0 2006.229.09:11:15.87#ibcon#about to read 6, iclass 10, count 0 2006.229.09:11:15.87#ibcon#read 6, iclass 10, count 0 2006.229.09:11:15.87#ibcon#end of sib2, iclass 10, count 0 2006.229.09:11:15.87#ibcon#*after write, iclass 10, count 0 2006.229.09:11:15.87#ibcon#*before return 0, iclass 10, count 0 2006.229.09:11:15.87#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:15.87#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:11:15.87#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:11:15.87#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:11:15.87$vck44/vblo=4,679.99 2006.229.09:11:15.87#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.09:11:15.87#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.09:11:15.87#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:15.87#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:15.87#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:15.87#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:15.87#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:11:15.87#ibcon#first serial, iclass 12, count 0 2006.229.09:11:15.87#ibcon#enter sib2, iclass 12, count 0 2006.229.09:11:15.87#ibcon#flushed, iclass 12, count 0 2006.229.09:11:15.87#ibcon#about to write, iclass 12, count 0 2006.229.09:11:15.87#ibcon#wrote, iclass 12, count 0 2006.229.09:11:15.87#ibcon#about to read 3, iclass 12, count 0 2006.229.09:11:15.89#ibcon#read 3, iclass 12, count 0 2006.229.09:11:15.89#ibcon#about to read 4, iclass 12, count 0 2006.229.09:11:15.89#ibcon#read 4, iclass 12, count 0 2006.229.09:11:15.89#ibcon#about to read 5, iclass 12, count 0 2006.229.09:11:15.89#ibcon#read 5, iclass 12, count 0 2006.229.09:11:15.89#ibcon#about to read 6, iclass 12, count 0 2006.229.09:11:15.89#ibcon#read 6, iclass 12, count 0 2006.229.09:11:15.89#ibcon#end of sib2, iclass 12, count 0 2006.229.09:11:15.89#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:11:15.89#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:11:15.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:11:15.89#ibcon#*before write, iclass 12, count 0 2006.229.09:11:15.89#ibcon#enter sib2, iclass 12, count 0 2006.229.09:11:15.89#ibcon#flushed, iclass 12, count 0 2006.229.09:11:15.89#ibcon#about to write, iclass 12, count 0 2006.229.09:11:15.89#ibcon#wrote, iclass 12, count 0 2006.229.09:11:15.89#ibcon#about to read 3, iclass 12, count 0 2006.229.09:11:15.93#ibcon#read 3, iclass 12, count 0 2006.229.09:11:15.93#ibcon#about to read 4, iclass 12, count 0 2006.229.09:11:15.93#ibcon#read 4, iclass 12, count 0 2006.229.09:11:15.93#ibcon#about to read 5, iclass 12, count 0 2006.229.09:11:15.93#ibcon#read 5, iclass 12, count 0 2006.229.09:11:15.93#ibcon#about to read 6, iclass 12, count 0 2006.229.09:11:15.93#ibcon#read 6, iclass 12, count 0 2006.229.09:11:15.93#ibcon#end of sib2, iclass 12, count 0 2006.229.09:11:15.93#ibcon#*after write, iclass 12, count 0 2006.229.09:11:15.93#ibcon#*before return 0, iclass 12, count 0 2006.229.09:11:15.93#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:15.93#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:11:15.93#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:11:15.93#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:11:15.93$vck44/vb=4,4 2006.229.09:11:15.93#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:11:15.93#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:11:15.93#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:15.93#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:15.99#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:15.99#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:15.99#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:11:15.99#ibcon#first serial, iclass 14, count 2 2006.229.09:11:15.99#ibcon#enter sib2, iclass 14, count 2 2006.229.09:11:15.99#ibcon#flushed, iclass 14, count 2 2006.229.09:11:15.99#ibcon#about to write, iclass 14, count 2 2006.229.09:11:15.99#ibcon#wrote, iclass 14, count 2 2006.229.09:11:15.99#ibcon#about to read 3, iclass 14, count 2 2006.229.09:11:16.01#ibcon#read 3, iclass 14, count 2 2006.229.09:11:16.01#ibcon#about to read 4, iclass 14, count 2 2006.229.09:11:16.01#ibcon#read 4, iclass 14, count 2 2006.229.09:11:16.01#ibcon#about to read 5, iclass 14, count 2 2006.229.09:11:16.01#ibcon#read 5, iclass 14, count 2 2006.229.09:11:16.01#ibcon#about to read 6, iclass 14, count 2 2006.229.09:11:16.01#ibcon#read 6, iclass 14, count 2 2006.229.09:11:16.01#ibcon#end of sib2, iclass 14, count 2 2006.229.09:11:16.01#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:11:16.01#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:11:16.01#ibcon#[27=AT04-04\r\n] 2006.229.09:11:16.01#ibcon#*before write, iclass 14, count 2 2006.229.09:11:16.01#ibcon#enter sib2, iclass 14, count 2 2006.229.09:11:16.01#ibcon#flushed, iclass 14, count 2 2006.229.09:11:16.01#ibcon#about to write, iclass 14, count 2 2006.229.09:11:16.01#ibcon#wrote, iclass 14, count 2 2006.229.09:11:16.01#ibcon#about to read 3, iclass 14, count 2 2006.229.09:11:16.04#ibcon#read 3, iclass 14, count 2 2006.229.09:11:16.04#ibcon#about to read 4, iclass 14, count 2 2006.229.09:11:16.04#ibcon#read 4, iclass 14, count 2 2006.229.09:11:16.04#ibcon#about to read 5, iclass 14, count 2 2006.229.09:11:16.04#ibcon#read 5, iclass 14, count 2 2006.229.09:11:16.04#ibcon#about to read 6, iclass 14, count 2 2006.229.09:11:16.04#ibcon#read 6, iclass 14, count 2 2006.229.09:11:16.04#ibcon#end of sib2, iclass 14, count 2 2006.229.09:11:16.04#ibcon#*after write, iclass 14, count 2 2006.229.09:11:16.04#ibcon#*before return 0, iclass 14, count 2 2006.229.09:11:16.04#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:16.04#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:11:16.04#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:11:16.04#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:16.04#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:16.16#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:16.16#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:16.16#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:11:16.16#ibcon#first serial, iclass 14, count 0 2006.229.09:11:16.16#ibcon#enter sib2, iclass 14, count 0 2006.229.09:11:16.16#ibcon#flushed, iclass 14, count 0 2006.229.09:11:16.16#ibcon#about to write, iclass 14, count 0 2006.229.09:11:16.16#ibcon#wrote, iclass 14, count 0 2006.229.09:11:16.16#ibcon#about to read 3, iclass 14, count 0 2006.229.09:11:16.18#ibcon#read 3, iclass 14, count 0 2006.229.09:11:16.18#ibcon#about to read 4, iclass 14, count 0 2006.229.09:11:16.18#ibcon#read 4, iclass 14, count 0 2006.229.09:11:16.18#ibcon#about to read 5, iclass 14, count 0 2006.229.09:11:16.18#ibcon#read 5, iclass 14, count 0 2006.229.09:11:16.18#ibcon#about to read 6, iclass 14, count 0 2006.229.09:11:16.18#ibcon#read 6, iclass 14, count 0 2006.229.09:11:16.18#ibcon#end of sib2, iclass 14, count 0 2006.229.09:11:16.18#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:11:16.18#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:11:16.18#ibcon#[27=USB\r\n] 2006.229.09:11:16.18#ibcon#*before write, iclass 14, count 0 2006.229.09:11:16.18#ibcon#enter sib2, iclass 14, count 0 2006.229.09:11:16.18#ibcon#flushed, iclass 14, count 0 2006.229.09:11:16.18#ibcon#about to write, iclass 14, count 0 2006.229.09:11:16.18#ibcon#wrote, iclass 14, count 0 2006.229.09:11:16.18#ibcon#about to read 3, iclass 14, count 0 2006.229.09:11:16.21#ibcon#read 3, iclass 14, count 0 2006.229.09:11:16.21#ibcon#about to read 4, iclass 14, count 0 2006.229.09:11:16.21#ibcon#read 4, iclass 14, count 0 2006.229.09:11:16.21#ibcon#about to read 5, iclass 14, count 0 2006.229.09:11:16.21#ibcon#read 5, iclass 14, count 0 2006.229.09:11:16.21#ibcon#about to read 6, iclass 14, count 0 2006.229.09:11:16.21#ibcon#read 6, iclass 14, count 0 2006.229.09:11:16.21#ibcon#end of sib2, iclass 14, count 0 2006.229.09:11:16.21#ibcon#*after write, iclass 14, count 0 2006.229.09:11:16.21#ibcon#*before return 0, iclass 14, count 0 2006.229.09:11:16.21#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:16.21#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:11:16.21#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:11:16.21#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:11:16.21$vck44/vblo=5,709.99 2006.229.09:11:16.21#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.09:11:16.21#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.09:11:16.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:16.21#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:16.21#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:16.21#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:16.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:11:16.21#ibcon#first serial, iclass 16, count 0 2006.229.09:11:16.21#ibcon#enter sib2, iclass 16, count 0 2006.229.09:11:16.21#ibcon#flushed, iclass 16, count 0 2006.229.09:11:16.21#ibcon#about to write, iclass 16, count 0 2006.229.09:11:16.21#ibcon#wrote, iclass 16, count 0 2006.229.09:11:16.21#ibcon#about to read 3, iclass 16, count 0 2006.229.09:11:16.23#ibcon#read 3, iclass 16, count 0 2006.229.09:11:16.23#ibcon#about to read 4, iclass 16, count 0 2006.229.09:11:16.23#ibcon#read 4, iclass 16, count 0 2006.229.09:11:16.23#ibcon#about to read 5, iclass 16, count 0 2006.229.09:11:16.23#ibcon#read 5, iclass 16, count 0 2006.229.09:11:16.23#ibcon#about to read 6, iclass 16, count 0 2006.229.09:11:16.23#ibcon#read 6, iclass 16, count 0 2006.229.09:11:16.23#ibcon#end of sib2, iclass 16, count 0 2006.229.09:11:16.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:11:16.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:11:16.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:11:16.23#ibcon#*before write, iclass 16, count 0 2006.229.09:11:16.23#ibcon#enter sib2, iclass 16, count 0 2006.229.09:11:16.23#ibcon#flushed, iclass 16, count 0 2006.229.09:11:16.23#ibcon#about to write, iclass 16, count 0 2006.229.09:11:16.23#ibcon#wrote, iclass 16, count 0 2006.229.09:11:16.23#ibcon#about to read 3, iclass 16, count 0 2006.229.09:11:16.27#ibcon#read 3, iclass 16, count 0 2006.229.09:11:16.27#ibcon#about to read 4, iclass 16, count 0 2006.229.09:11:16.27#ibcon#read 4, iclass 16, count 0 2006.229.09:11:16.27#ibcon#about to read 5, iclass 16, count 0 2006.229.09:11:16.27#ibcon#read 5, iclass 16, count 0 2006.229.09:11:16.27#ibcon#about to read 6, iclass 16, count 0 2006.229.09:11:16.27#ibcon#read 6, iclass 16, count 0 2006.229.09:11:16.27#ibcon#end of sib2, iclass 16, count 0 2006.229.09:11:16.27#ibcon#*after write, iclass 16, count 0 2006.229.09:11:16.27#ibcon#*before return 0, iclass 16, count 0 2006.229.09:11:16.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:16.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:11:16.27#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:11:16.27#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:11:16.27$vck44/vb=5,4 2006.229.09:11:16.27#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.09:11:16.27#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.09:11:16.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:16.27#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:16.33#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:16.33#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:16.33#ibcon#enter wrdev, iclass 18, count 2 2006.229.09:11:16.33#ibcon#first serial, iclass 18, count 2 2006.229.09:11:16.33#ibcon#enter sib2, iclass 18, count 2 2006.229.09:11:16.33#ibcon#flushed, iclass 18, count 2 2006.229.09:11:16.33#ibcon#about to write, iclass 18, count 2 2006.229.09:11:16.33#ibcon#wrote, iclass 18, count 2 2006.229.09:11:16.33#ibcon#about to read 3, iclass 18, count 2 2006.229.09:11:16.35#ibcon#read 3, iclass 18, count 2 2006.229.09:11:16.35#ibcon#about to read 4, iclass 18, count 2 2006.229.09:11:16.35#ibcon#read 4, iclass 18, count 2 2006.229.09:11:16.35#ibcon#about to read 5, iclass 18, count 2 2006.229.09:11:16.35#ibcon#read 5, iclass 18, count 2 2006.229.09:11:16.35#ibcon#about to read 6, iclass 18, count 2 2006.229.09:11:16.35#ibcon#read 6, iclass 18, count 2 2006.229.09:11:16.35#ibcon#end of sib2, iclass 18, count 2 2006.229.09:11:16.35#ibcon#*mode == 0, iclass 18, count 2 2006.229.09:11:16.35#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.09:11:16.35#ibcon#[27=AT05-04\r\n] 2006.229.09:11:16.35#ibcon#*before write, iclass 18, count 2 2006.229.09:11:16.35#ibcon#enter sib2, iclass 18, count 2 2006.229.09:11:16.35#ibcon#flushed, iclass 18, count 2 2006.229.09:11:16.35#ibcon#about to write, iclass 18, count 2 2006.229.09:11:16.35#ibcon#wrote, iclass 18, count 2 2006.229.09:11:16.35#ibcon#about to read 3, iclass 18, count 2 2006.229.09:11:16.38#ibcon#read 3, iclass 18, count 2 2006.229.09:11:16.38#ibcon#about to read 4, iclass 18, count 2 2006.229.09:11:16.38#ibcon#read 4, iclass 18, count 2 2006.229.09:11:16.38#ibcon#about to read 5, iclass 18, count 2 2006.229.09:11:16.38#ibcon#read 5, iclass 18, count 2 2006.229.09:11:16.38#ibcon#about to read 6, iclass 18, count 2 2006.229.09:11:16.38#ibcon#read 6, iclass 18, count 2 2006.229.09:11:16.38#ibcon#end of sib2, iclass 18, count 2 2006.229.09:11:16.38#ibcon#*after write, iclass 18, count 2 2006.229.09:11:16.38#ibcon#*before return 0, iclass 18, count 2 2006.229.09:11:16.38#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:16.38#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:11:16.38#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.09:11:16.38#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:16.38#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:16.50#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:16.50#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:16.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:11:16.50#ibcon#first serial, iclass 18, count 0 2006.229.09:11:16.50#ibcon#enter sib2, iclass 18, count 0 2006.229.09:11:16.50#ibcon#flushed, iclass 18, count 0 2006.229.09:11:16.50#ibcon#about to write, iclass 18, count 0 2006.229.09:11:16.50#ibcon#wrote, iclass 18, count 0 2006.229.09:11:16.50#ibcon#about to read 3, iclass 18, count 0 2006.229.09:11:16.52#ibcon#read 3, iclass 18, count 0 2006.229.09:11:16.52#ibcon#about to read 4, iclass 18, count 0 2006.229.09:11:16.52#ibcon#read 4, iclass 18, count 0 2006.229.09:11:16.52#ibcon#about to read 5, iclass 18, count 0 2006.229.09:11:16.52#ibcon#read 5, iclass 18, count 0 2006.229.09:11:16.52#ibcon#about to read 6, iclass 18, count 0 2006.229.09:11:16.52#ibcon#read 6, iclass 18, count 0 2006.229.09:11:16.52#ibcon#end of sib2, iclass 18, count 0 2006.229.09:11:16.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:11:16.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:11:16.52#ibcon#[27=USB\r\n] 2006.229.09:11:16.52#ibcon#*before write, iclass 18, count 0 2006.229.09:11:16.52#ibcon#enter sib2, iclass 18, count 0 2006.229.09:11:16.52#ibcon#flushed, iclass 18, count 0 2006.229.09:11:16.52#ibcon#about to write, iclass 18, count 0 2006.229.09:11:16.52#ibcon#wrote, iclass 18, count 0 2006.229.09:11:16.52#ibcon#about to read 3, iclass 18, count 0 2006.229.09:11:16.55#ibcon#read 3, iclass 18, count 0 2006.229.09:11:16.55#ibcon#about to read 4, iclass 18, count 0 2006.229.09:11:16.55#ibcon#read 4, iclass 18, count 0 2006.229.09:11:16.55#ibcon#about to read 5, iclass 18, count 0 2006.229.09:11:16.55#ibcon#read 5, iclass 18, count 0 2006.229.09:11:16.55#ibcon#about to read 6, iclass 18, count 0 2006.229.09:11:16.55#ibcon#read 6, iclass 18, count 0 2006.229.09:11:16.55#ibcon#end of sib2, iclass 18, count 0 2006.229.09:11:16.55#ibcon#*after write, iclass 18, count 0 2006.229.09:11:16.55#ibcon#*before return 0, iclass 18, count 0 2006.229.09:11:16.55#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:16.55#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:11:16.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:11:16.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:11:16.55$vck44/vblo=6,719.99 2006.229.09:11:16.55#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:11:16.55#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:11:16.55#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:16.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:16.55#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:16.55#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:16.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:11:16.55#ibcon#first serial, iclass 20, count 0 2006.229.09:11:16.55#ibcon#enter sib2, iclass 20, count 0 2006.229.09:11:16.55#ibcon#flushed, iclass 20, count 0 2006.229.09:11:16.55#ibcon#about to write, iclass 20, count 0 2006.229.09:11:16.55#ibcon#wrote, iclass 20, count 0 2006.229.09:11:16.55#ibcon#about to read 3, iclass 20, count 0 2006.229.09:11:16.57#ibcon#read 3, iclass 20, count 0 2006.229.09:11:16.57#ibcon#about to read 4, iclass 20, count 0 2006.229.09:11:16.57#ibcon#read 4, iclass 20, count 0 2006.229.09:11:16.57#ibcon#about to read 5, iclass 20, count 0 2006.229.09:11:16.57#ibcon#read 5, iclass 20, count 0 2006.229.09:11:16.57#ibcon#about to read 6, iclass 20, count 0 2006.229.09:11:16.57#ibcon#read 6, iclass 20, count 0 2006.229.09:11:16.57#ibcon#end of sib2, iclass 20, count 0 2006.229.09:11:16.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:11:16.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:11:16.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:11:16.57#ibcon#*before write, iclass 20, count 0 2006.229.09:11:16.57#ibcon#enter sib2, iclass 20, count 0 2006.229.09:11:16.57#ibcon#flushed, iclass 20, count 0 2006.229.09:11:16.57#ibcon#about to write, iclass 20, count 0 2006.229.09:11:16.57#ibcon#wrote, iclass 20, count 0 2006.229.09:11:16.57#ibcon#about to read 3, iclass 20, count 0 2006.229.09:11:16.61#ibcon#read 3, iclass 20, count 0 2006.229.09:11:16.61#ibcon#about to read 4, iclass 20, count 0 2006.229.09:11:16.61#ibcon#read 4, iclass 20, count 0 2006.229.09:11:16.61#ibcon#about to read 5, iclass 20, count 0 2006.229.09:11:16.61#ibcon#read 5, iclass 20, count 0 2006.229.09:11:16.61#ibcon#about to read 6, iclass 20, count 0 2006.229.09:11:16.61#ibcon#read 6, iclass 20, count 0 2006.229.09:11:16.61#ibcon#end of sib2, iclass 20, count 0 2006.229.09:11:16.61#ibcon#*after write, iclass 20, count 0 2006.229.09:11:16.61#ibcon#*before return 0, iclass 20, count 0 2006.229.09:11:16.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:16.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:11:16.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:11:16.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:11:16.61$vck44/vb=6,4 2006.229.09:11:16.61#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.09:11:16.61#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.09:11:16.61#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:16.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:16.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:16.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:16.67#ibcon#enter wrdev, iclass 22, count 2 2006.229.09:11:16.67#ibcon#first serial, iclass 22, count 2 2006.229.09:11:16.67#ibcon#enter sib2, iclass 22, count 2 2006.229.09:11:16.67#ibcon#flushed, iclass 22, count 2 2006.229.09:11:16.67#ibcon#about to write, iclass 22, count 2 2006.229.09:11:16.67#ibcon#wrote, iclass 22, count 2 2006.229.09:11:16.67#ibcon#about to read 3, iclass 22, count 2 2006.229.09:11:16.69#ibcon#read 3, iclass 22, count 2 2006.229.09:11:16.69#ibcon#about to read 4, iclass 22, count 2 2006.229.09:11:16.69#ibcon#read 4, iclass 22, count 2 2006.229.09:11:16.69#ibcon#about to read 5, iclass 22, count 2 2006.229.09:11:16.69#ibcon#read 5, iclass 22, count 2 2006.229.09:11:16.69#ibcon#about to read 6, iclass 22, count 2 2006.229.09:11:16.69#ibcon#read 6, iclass 22, count 2 2006.229.09:11:16.69#ibcon#end of sib2, iclass 22, count 2 2006.229.09:11:16.69#ibcon#*mode == 0, iclass 22, count 2 2006.229.09:11:16.69#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.09:11:16.69#ibcon#[27=AT06-04\r\n] 2006.229.09:11:16.69#ibcon#*before write, iclass 22, count 2 2006.229.09:11:16.69#ibcon#enter sib2, iclass 22, count 2 2006.229.09:11:16.69#ibcon#flushed, iclass 22, count 2 2006.229.09:11:16.69#ibcon#about to write, iclass 22, count 2 2006.229.09:11:16.69#ibcon#wrote, iclass 22, count 2 2006.229.09:11:16.69#ibcon#about to read 3, iclass 22, count 2 2006.229.09:11:16.72#ibcon#read 3, iclass 22, count 2 2006.229.09:11:16.72#ibcon#about to read 4, iclass 22, count 2 2006.229.09:11:16.72#ibcon#read 4, iclass 22, count 2 2006.229.09:11:16.72#ibcon#about to read 5, iclass 22, count 2 2006.229.09:11:16.72#ibcon#read 5, iclass 22, count 2 2006.229.09:11:16.72#ibcon#about to read 6, iclass 22, count 2 2006.229.09:11:16.72#ibcon#read 6, iclass 22, count 2 2006.229.09:11:16.72#ibcon#end of sib2, iclass 22, count 2 2006.229.09:11:16.72#ibcon#*after write, iclass 22, count 2 2006.229.09:11:16.72#ibcon#*before return 0, iclass 22, count 2 2006.229.09:11:16.72#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:16.72#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:11:16.72#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.09:11:16.72#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:16.72#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:16.84#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:16.84#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:16.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:11:16.84#ibcon#first serial, iclass 22, count 0 2006.229.09:11:16.84#ibcon#enter sib2, iclass 22, count 0 2006.229.09:11:16.84#ibcon#flushed, iclass 22, count 0 2006.229.09:11:16.84#ibcon#about to write, iclass 22, count 0 2006.229.09:11:16.84#ibcon#wrote, iclass 22, count 0 2006.229.09:11:16.84#ibcon#about to read 3, iclass 22, count 0 2006.229.09:11:16.86#ibcon#read 3, iclass 22, count 0 2006.229.09:11:16.86#ibcon#about to read 4, iclass 22, count 0 2006.229.09:11:16.86#ibcon#read 4, iclass 22, count 0 2006.229.09:11:16.86#ibcon#about to read 5, iclass 22, count 0 2006.229.09:11:16.86#ibcon#read 5, iclass 22, count 0 2006.229.09:11:16.86#ibcon#about to read 6, iclass 22, count 0 2006.229.09:11:16.86#ibcon#read 6, iclass 22, count 0 2006.229.09:11:16.86#ibcon#end of sib2, iclass 22, count 0 2006.229.09:11:16.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:11:16.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:11:16.86#ibcon#[27=USB\r\n] 2006.229.09:11:16.86#ibcon#*before write, iclass 22, count 0 2006.229.09:11:16.86#ibcon#enter sib2, iclass 22, count 0 2006.229.09:11:16.86#ibcon#flushed, iclass 22, count 0 2006.229.09:11:16.86#ibcon#about to write, iclass 22, count 0 2006.229.09:11:16.86#ibcon#wrote, iclass 22, count 0 2006.229.09:11:16.86#ibcon#about to read 3, iclass 22, count 0 2006.229.09:11:16.89#ibcon#read 3, iclass 22, count 0 2006.229.09:11:16.89#ibcon#about to read 4, iclass 22, count 0 2006.229.09:11:16.89#ibcon#read 4, iclass 22, count 0 2006.229.09:11:16.89#ibcon#about to read 5, iclass 22, count 0 2006.229.09:11:16.89#ibcon#read 5, iclass 22, count 0 2006.229.09:11:16.89#ibcon#about to read 6, iclass 22, count 0 2006.229.09:11:16.89#ibcon#read 6, iclass 22, count 0 2006.229.09:11:16.89#ibcon#end of sib2, iclass 22, count 0 2006.229.09:11:16.89#ibcon#*after write, iclass 22, count 0 2006.229.09:11:16.89#ibcon#*before return 0, iclass 22, count 0 2006.229.09:11:16.89#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:16.89#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:11:16.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:11:16.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:11:16.89$vck44/vblo=7,734.99 2006.229.09:11:16.89#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:11:16.89#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:11:16.89#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:16.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:16.89#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:16.89#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:16.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:11:16.89#ibcon#first serial, iclass 24, count 0 2006.229.09:11:16.89#ibcon#enter sib2, iclass 24, count 0 2006.229.09:11:16.89#ibcon#flushed, iclass 24, count 0 2006.229.09:11:16.89#ibcon#about to write, iclass 24, count 0 2006.229.09:11:16.89#ibcon#wrote, iclass 24, count 0 2006.229.09:11:16.89#ibcon#about to read 3, iclass 24, count 0 2006.229.09:11:16.91#ibcon#read 3, iclass 24, count 0 2006.229.09:11:16.91#ibcon#about to read 4, iclass 24, count 0 2006.229.09:11:16.91#ibcon#read 4, iclass 24, count 0 2006.229.09:11:16.91#ibcon#about to read 5, iclass 24, count 0 2006.229.09:11:16.91#ibcon#read 5, iclass 24, count 0 2006.229.09:11:16.91#ibcon#about to read 6, iclass 24, count 0 2006.229.09:11:16.91#ibcon#read 6, iclass 24, count 0 2006.229.09:11:16.91#ibcon#end of sib2, iclass 24, count 0 2006.229.09:11:16.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:11:16.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:11:16.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:11:16.91#ibcon#*before write, iclass 24, count 0 2006.229.09:11:16.91#ibcon#enter sib2, iclass 24, count 0 2006.229.09:11:16.91#ibcon#flushed, iclass 24, count 0 2006.229.09:11:16.91#ibcon#about to write, iclass 24, count 0 2006.229.09:11:16.91#ibcon#wrote, iclass 24, count 0 2006.229.09:11:16.91#ibcon#about to read 3, iclass 24, count 0 2006.229.09:11:16.95#ibcon#read 3, iclass 24, count 0 2006.229.09:11:16.95#ibcon#about to read 4, iclass 24, count 0 2006.229.09:11:16.95#ibcon#read 4, iclass 24, count 0 2006.229.09:11:16.95#ibcon#about to read 5, iclass 24, count 0 2006.229.09:11:16.95#ibcon#read 5, iclass 24, count 0 2006.229.09:11:16.95#ibcon#about to read 6, iclass 24, count 0 2006.229.09:11:16.95#ibcon#read 6, iclass 24, count 0 2006.229.09:11:16.95#ibcon#end of sib2, iclass 24, count 0 2006.229.09:11:16.95#ibcon#*after write, iclass 24, count 0 2006.229.09:11:16.95#ibcon#*before return 0, iclass 24, count 0 2006.229.09:11:16.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:16.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:11:16.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:11:16.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:11:16.95$vck44/vb=7,4 2006.229.09:11:16.95#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.09:11:16.95#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.09:11:16.95#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:16.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:17.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:17.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:17.01#ibcon#enter wrdev, iclass 26, count 2 2006.229.09:11:17.01#ibcon#first serial, iclass 26, count 2 2006.229.09:11:17.01#ibcon#enter sib2, iclass 26, count 2 2006.229.09:11:17.01#ibcon#flushed, iclass 26, count 2 2006.229.09:11:17.01#ibcon#about to write, iclass 26, count 2 2006.229.09:11:17.01#ibcon#wrote, iclass 26, count 2 2006.229.09:11:17.01#ibcon#about to read 3, iclass 26, count 2 2006.229.09:11:17.03#ibcon#read 3, iclass 26, count 2 2006.229.09:11:17.03#ibcon#about to read 4, iclass 26, count 2 2006.229.09:11:17.03#ibcon#read 4, iclass 26, count 2 2006.229.09:11:17.03#ibcon#about to read 5, iclass 26, count 2 2006.229.09:11:17.03#ibcon#read 5, iclass 26, count 2 2006.229.09:11:17.03#ibcon#about to read 6, iclass 26, count 2 2006.229.09:11:17.03#ibcon#read 6, iclass 26, count 2 2006.229.09:11:17.03#ibcon#end of sib2, iclass 26, count 2 2006.229.09:11:17.03#ibcon#*mode == 0, iclass 26, count 2 2006.229.09:11:17.03#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.09:11:17.03#ibcon#[27=AT07-04\r\n] 2006.229.09:11:17.03#ibcon#*before write, iclass 26, count 2 2006.229.09:11:17.03#ibcon#enter sib2, iclass 26, count 2 2006.229.09:11:17.03#ibcon#flushed, iclass 26, count 2 2006.229.09:11:17.03#ibcon#about to write, iclass 26, count 2 2006.229.09:11:17.03#ibcon#wrote, iclass 26, count 2 2006.229.09:11:17.03#ibcon#about to read 3, iclass 26, count 2 2006.229.09:11:17.06#ibcon#read 3, iclass 26, count 2 2006.229.09:11:17.06#ibcon#about to read 4, iclass 26, count 2 2006.229.09:11:17.06#ibcon#read 4, iclass 26, count 2 2006.229.09:11:17.06#ibcon#about to read 5, iclass 26, count 2 2006.229.09:11:17.06#ibcon#read 5, iclass 26, count 2 2006.229.09:11:17.06#ibcon#about to read 6, iclass 26, count 2 2006.229.09:11:17.06#ibcon#read 6, iclass 26, count 2 2006.229.09:11:17.06#ibcon#end of sib2, iclass 26, count 2 2006.229.09:11:17.06#ibcon#*after write, iclass 26, count 2 2006.229.09:11:17.06#ibcon#*before return 0, iclass 26, count 2 2006.229.09:11:17.06#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:17.06#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:11:17.06#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.09:11:17.06#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:17.06#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:17.18#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:17.18#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:17.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:11:17.18#ibcon#first serial, iclass 26, count 0 2006.229.09:11:17.18#ibcon#enter sib2, iclass 26, count 0 2006.229.09:11:17.18#ibcon#flushed, iclass 26, count 0 2006.229.09:11:17.18#ibcon#about to write, iclass 26, count 0 2006.229.09:11:17.18#ibcon#wrote, iclass 26, count 0 2006.229.09:11:17.18#ibcon#about to read 3, iclass 26, count 0 2006.229.09:11:17.20#ibcon#read 3, iclass 26, count 0 2006.229.09:11:17.20#ibcon#about to read 4, iclass 26, count 0 2006.229.09:11:17.20#ibcon#read 4, iclass 26, count 0 2006.229.09:11:17.20#ibcon#about to read 5, iclass 26, count 0 2006.229.09:11:17.20#ibcon#read 5, iclass 26, count 0 2006.229.09:11:17.20#ibcon#about to read 6, iclass 26, count 0 2006.229.09:11:17.20#ibcon#read 6, iclass 26, count 0 2006.229.09:11:17.20#ibcon#end of sib2, iclass 26, count 0 2006.229.09:11:17.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:11:17.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:11:17.20#ibcon#[27=USB\r\n] 2006.229.09:11:17.20#ibcon#*before write, iclass 26, count 0 2006.229.09:11:17.20#ibcon#enter sib2, iclass 26, count 0 2006.229.09:11:17.20#ibcon#flushed, iclass 26, count 0 2006.229.09:11:17.20#ibcon#about to write, iclass 26, count 0 2006.229.09:11:17.20#ibcon#wrote, iclass 26, count 0 2006.229.09:11:17.20#ibcon#about to read 3, iclass 26, count 0 2006.229.09:11:17.23#ibcon#read 3, iclass 26, count 0 2006.229.09:11:17.23#ibcon#about to read 4, iclass 26, count 0 2006.229.09:11:17.23#ibcon#read 4, iclass 26, count 0 2006.229.09:11:17.23#ibcon#about to read 5, iclass 26, count 0 2006.229.09:11:17.23#ibcon#read 5, iclass 26, count 0 2006.229.09:11:17.23#ibcon#about to read 6, iclass 26, count 0 2006.229.09:11:17.23#ibcon#read 6, iclass 26, count 0 2006.229.09:11:17.23#ibcon#end of sib2, iclass 26, count 0 2006.229.09:11:17.23#ibcon#*after write, iclass 26, count 0 2006.229.09:11:17.23#ibcon#*before return 0, iclass 26, count 0 2006.229.09:11:17.23#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:17.23#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:11:17.23#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:11:17.23#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:11:17.23$vck44/vblo=8,744.99 2006.229.09:11:17.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.09:11:17.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.09:11:17.23#ibcon#ireg 17 cls_cnt 0 2006.229.09:11:17.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:17.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:17.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:17.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:11:17.23#ibcon#first serial, iclass 28, count 0 2006.229.09:11:17.23#ibcon#enter sib2, iclass 28, count 0 2006.229.09:11:17.23#ibcon#flushed, iclass 28, count 0 2006.229.09:11:17.23#ibcon#about to write, iclass 28, count 0 2006.229.09:11:17.23#ibcon#wrote, iclass 28, count 0 2006.229.09:11:17.23#ibcon#about to read 3, iclass 28, count 0 2006.229.09:11:17.25#ibcon#read 3, iclass 28, count 0 2006.229.09:11:17.25#ibcon#about to read 4, iclass 28, count 0 2006.229.09:11:17.25#ibcon#read 4, iclass 28, count 0 2006.229.09:11:17.25#ibcon#about to read 5, iclass 28, count 0 2006.229.09:11:17.25#ibcon#read 5, iclass 28, count 0 2006.229.09:11:17.25#ibcon#about to read 6, iclass 28, count 0 2006.229.09:11:17.25#ibcon#read 6, iclass 28, count 0 2006.229.09:11:17.25#ibcon#end of sib2, iclass 28, count 0 2006.229.09:11:17.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:11:17.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:11:17.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:11:17.25#ibcon#*before write, iclass 28, count 0 2006.229.09:11:17.25#ibcon#enter sib2, iclass 28, count 0 2006.229.09:11:17.25#ibcon#flushed, iclass 28, count 0 2006.229.09:11:17.25#ibcon#about to write, iclass 28, count 0 2006.229.09:11:17.25#ibcon#wrote, iclass 28, count 0 2006.229.09:11:17.25#ibcon#about to read 3, iclass 28, count 0 2006.229.09:11:17.29#ibcon#read 3, iclass 28, count 0 2006.229.09:11:17.29#ibcon#about to read 4, iclass 28, count 0 2006.229.09:11:17.29#ibcon#read 4, iclass 28, count 0 2006.229.09:11:17.29#ibcon#about to read 5, iclass 28, count 0 2006.229.09:11:17.29#ibcon#read 5, iclass 28, count 0 2006.229.09:11:17.29#ibcon#about to read 6, iclass 28, count 0 2006.229.09:11:17.29#ibcon#read 6, iclass 28, count 0 2006.229.09:11:17.29#ibcon#end of sib2, iclass 28, count 0 2006.229.09:11:17.29#ibcon#*after write, iclass 28, count 0 2006.229.09:11:17.29#ibcon#*before return 0, iclass 28, count 0 2006.229.09:11:17.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:17.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:11:17.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:11:17.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:11:17.29$vck44/vb=8,4 2006.229.09:11:17.29#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.09:11:17.29#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.09:11:17.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:11:17.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:17.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:17.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:17.35#ibcon#enter wrdev, iclass 30, count 2 2006.229.09:11:17.35#ibcon#first serial, iclass 30, count 2 2006.229.09:11:17.35#ibcon#enter sib2, iclass 30, count 2 2006.229.09:11:17.35#ibcon#flushed, iclass 30, count 2 2006.229.09:11:17.35#ibcon#about to write, iclass 30, count 2 2006.229.09:11:17.35#ibcon#wrote, iclass 30, count 2 2006.229.09:11:17.35#ibcon#about to read 3, iclass 30, count 2 2006.229.09:11:17.37#ibcon#read 3, iclass 30, count 2 2006.229.09:11:17.37#ibcon#about to read 4, iclass 30, count 2 2006.229.09:11:17.37#ibcon#read 4, iclass 30, count 2 2006.229.09:11:17.37#ibcon#about to read 5, iclass 30, count 2 2006.229.09:11:17.37#ibcon#read 5, iclass 30, count 2 2006.229.09:11:17.37#ibcon#about to read 6, iclass 30, count 2 2006.229.09:11:17.37#ibcon#read 6, iclass 30, count 2 2006.229.09:11:17.37#ibcon#end of sib2, iclass 30, count 2 2006.229.09:11:17.37#ibcon#*mode == 0, iclass 30, count 2 2006.229.09:11:17.37#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.09:11:17.37#ibcon#[27=AT08-04\r\n] 2006.229.09:11:17.37#ibcon#*before write, iclass 30, count 2 2006.229.09:11:17.37#ibcon#enter sib2, iclass 30, count 2 2006.229.09:11:17.37#ibcon#flushed, iclass 30, count 2 2006.229.09:11:17.37#ibcon#about to write, iclass 30, count 2 2006.229.09:11:17.37#ibcon#wrote, iclass 30, count 2 2006.229.09:11:17.37#ibcon#about to read 3, iclass 30, count 2 2006.229.09:11:17.40#ibcon#read 3, iclass 30, count 2 2006.229.09:11:17.40#ibcon#about to read 4, iclass 30, count 2 2006.229.09:11:17.40#ibcon#read 4, iclass 30, count 2 2006.229.09:11:17.40#ibcon#about to read 5, iclass 30, count 2 2006.229.09:11:17.40#ibcon#read 5, iclass 30, count 2 2006.229.09:11:17.40#ibcon#about to read 6, iclass 30, count 2 2006.229.09:11:17.40#ibcon#read 6, iclass 30, count 2 2006.229.09:11:17.40#ibcon#end of sib2, iclass 30, count 2 2006.229.09:11:17.40#ibcon#*after write, iclass 30, count 2 2006.229.09:11:17.40#ibcon#*before return 0, iclass 30, count 2 2006.229.09:11:17.40#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:17.40#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:11:17.40#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.09:11:17.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:11:17.40#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:17.52#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:17.52#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:17.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:11:17.52#ibcon#first serial, iclass 30, count 0 2006.229.09:11:17.52#ibcon#enter sib2, iclass 30, count 0 2006.229.09:11:17.52#ibcon#flushed, iclass 30, count 0 2006.229.09:11:17.52#ibcon#about to write, iclass 30, count 0 2006.229.09:11:17.52#ibcon#wrote, iclass 30, count 0 2006.229.09:11:17.52#ibcon#about to read 3, iclass 30, count 0 2006.229.09:11:17.54#ibcon#read 3, iclass 30, count 0 2006.229.09:11:17.54#ibcon#about to read 4, iclass 30, count 0 2006.229.09:11:17.54#ibcon#read 4, iclass 30, count 0 2006.229.09:11:17.54#ibcon#about to read 5, iclass 30, count 0 2006.229.09:11:17.54#ibcon#read 5, iclass 30, count 0 2006.229.09:11:17.54#ibcon#about to read 6, iclass 30, count 0 2006.229.09:11:17.54#ibcon#read 6, iclass 30, count 0 2006.229.09:11:17.54#ibcon#end of sib2, iclass 30, count 0 2006.229.09:11:17.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:11:17.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:11:17.54#ibcon#[27=USB\r\n] 2006.229.09:11:17.54#ibcon#*before write, iclass 30, count 0 2006.229.09:11:17.54#ibcon#enter sib2, iclass 30, count 0 2006.229.09:11:17.54#ibcon#flushed, iclass 30, count 0 2006.229.09:11:17.54#ibcon#about to write, iclass 30, count 0 2006.229.09:11:17.54#ibcon#wrote, iclass 30, count 0 2006.229.09:11:17.54#ibcon#about to read 3, iclass 30, count 0 2006.229.09:11:17.57#ibcon#read 3, iclass 30, count 0 2006.229.09:11:17.57#ibcon#about to read 4, iclass 30, count 0 2006.229.09:11:17.57#ibcon#read 4, iclass 30, count 0 2006.229.09:11:17.57#ibcon#about to read 5, iclass 30, count 0 2006.229.09:11:17.57#ibcon#read 5, iclass 30, count 0 2006.229.09:11:17.57#ibcon#about to read 6, iclass 30, count 0 2006.229.09:11:17.57#ibcon#read 6, iclass 30, count 0 2006.229.09:11:17.57#ibcon#end of sib2, iclass 30, count 0 2006.229.09:11:17.57#ibcon#*after write, iclass 30, count 0 2006.229.09:11:17.57#ibcon#*before return 0, iclass 30, count 0 2006.229.09:11:17.57#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:17.57#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:11:17.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:11:17.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:11:17.57$vck44/vabw=wide 2006.229.09:11:17.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.09:11:17.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.09:11:17.57#ibcon#ireg 8 cls_cnt 0 2006.229.09:11:17.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:17.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:17.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:17.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:11:17.57#ibcon#first serial, iclass 32, count 0 2006.229.09:11:17.57#ibcon#enter sib2, iclass 32, count 0 2006.229.09:11:17.57#ibcon#flushed, iclass 32, count 0 2006.229.09:11:17.57#ibcon#about to write, iclass 32, count 0 2006.229.09:11:17.57#ibcon#wrote, iclass 32, count 0 2006.229.09:11:17.57#ibcon#about to read 3, iclass 32, count 0 2006.229.09:11:17.59#ibcon#read 3, iclass 32, count 0 2006.229.09:11:17.59#ibcon#about to read 4, iclass 32, count 0 2006.229.09:11:17.59#ibcon#read 4, iclass 32, count 0 2006.229.09:11:17.59#ibcon#about to read 5, iclass 32, count 0 2006.229.09:11:17.59#ibcon#read 5, iclass 32, count 0 2006.229.09:11:17.59#ibcon#about to read 6, iclass 32, count 0 2006.229.09:11:17.59#ibcon#read 6, iclass 32, count 0 2006.229.09:11:17.59#ibcon#end of sib2, iclass 32, count 0 2006.229.09:11:17.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:11:17.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:11:17.59#ibcon#[25=BW32\r\n] 2006.229.09:11:17.59#ibcon#*before write, iclass 32, count 0 2006.229.09:11:17.59#ibcon#enter sib2, iclass 32, count 0 2006.229.09:11:17.59#ibcon#flushed, iclass 32, count 0 2006.229.09:11:17.59#ibcon#about to write, iclass 32, count 0 2006.229.09:11:17.59#ibcon#wrote, iclass 32, count 0 2006.229.09:11:17.59#ibcon#about to read 3, iclass 32, count 0 2006.229.09:11:17.62#ibcon#read 3, iclass 32, count 0 2006.229.09:11:17.62#ibcon#about to read 4, iclass 32, count 0 2006.229.09:11:17.62#ibcon#read 4, iclass 32, count 0 2006.229.09:11:17.62#ibcon#about to read 5, iclass 32, count 0 2006.229.09:11:17.62#ibcon#read 5, iclass 32, count 0 2006.229.09:11:17.62#ibcon#about to read 6, iclass 32, count 0 2006.229.09:11:17.62#ibcon#read 6, iclass 32, count 0 2006.229.09:11:17.62#ibcon#end of sib2, iclass 32, count 0 2006.229.09:11:17.62#ibcon#*after write, iclass 32, count 0 2006.229.09:11:17.62#ibcon#*before return 0, iclass 32, count 0 2006.229.09:11:17.62#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:17.62#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:11:17.62#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:11:17.62#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:11:17.62$vck44/vbbw=wide 2006.229.09:11:17.62#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.09:11:17.62#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.09:11:17.62#ibcon#ireg 8 cls_cnt 0 2006.229.09:11:17.62#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:11:17.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:11:17.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:11:17.69#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:11:17.69#ibcon#first serial, iclass 34, count 0 2006.229.09:11:17.69#ibcon#enter sib2, iclass 34, count 0 2006.229.09:11:17.69#ibcon#flushed, iclass 34, count 0 2006.229.09:11:17.69#ibcon#about to write, iclass 34, count 0 2006.229.09:11:17.69#ibcon#wrote, iclass 34, count 0 2006.229.09:11:17.69#ibcon#about to read 3, iclass 34, count 0 2006.229.09:11:17.71#ibcon#read 3, iclass 34, count 0 2006.229.09:11:17.71#ibcon#about to read 4, iclass 34, count 0 2006.229.09:11:17.71#ibcon#read 4, iclass 34, count 0 2006.229.09:11:17.71#ibcon#about to read 5, iclass 34, count 0 2006.229.09:11:17.71#ibcon#read 5, iclass 34, count 0 2006.229.09:11:17.71#ibcon#about to read 6, iclass 34, count 0 2006.229.09:11:17.71#ibcon#read 6, iclass 34, count 0 2006.229.09:11:17.71#ibcon#end of sib2, iclass 34, count 0 2006.229.09:11:17.71#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:11:17.71#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:11:17.71#ibcon#[27=BW32\r\n] 2006.229.09:11:17.71#ibcon#*before write, iclass 34, count 0 2006.229.09:11:17.71#ibcon#enter sib2, iclass 34, count 0 2006.229.09:11:17.71#ibcon#flushed, iclass 34, count 0 2006.229.09:11:17.71#ibcon#about to write, iclass 34, count 0 2006.229.09:11:17.71#ibcon#wrote, iclass 34, count 0 2006.229.09:11:17.71#ibcon#about to read 3, iclass 34, count 0 2006.229.09:11:17.74#ibcon#read 3, iclass 34, count 0 2006.229.09:11:17.74#ibcon#about to read 4, iclass 34, count 0 2006.229.09:11:17.74#ibcon#read 4, iclass 34, count 0 2006.229.09:11:17.74#ibcon#about to read 5, iclass 34, count 0 2006.229.09:11:17.74#ibcon#read 5, iclass 34, count 0 2006.229.09:11:17.74#ibcon#about to read 6, iclass 34, count 0 2006.229.09:11:17.74#ibcon#read 6, iclass 34, count 0 2006.229.09:11:17.74#ibcon#end of sib2, iclass 34, count 0 2006.229.09:11:17.74#ibcon#*after write, iclass 34, count 0 2006.229.09:11:17.74#ibcon#*before return 0, iclass 34, count 0 2006.229.09:11:17.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:11:17.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:11:17.74#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:11:17.74#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:11:17.74$setupk4/ifdk4 2006.229.09:11:17.74$ifdk4/lo= 2006.229.09:11:17.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:11:17.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:11:17.74$ifdk4/patch= 2006.229.09:11:17.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:11:17.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:11:17.74$setupk4/!*+20s 2006.229.09:11:22.14#abcon#<5=/05 2.2 3.9 29.12 961000.7\r\n> 2006.229.09:11:22.16#abcon#{5=INTERFACE CLEAR} 2006.229.09:11:22.22#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:11:27.14#trakl#Source acquired 2006.229.09:11:29.14#flagr#flagr/antenna,acquired 2006.229.09:11:32.25$setupk4/"tpicd 2006.229.09:11:32.25$setupk4/echo=off 2006.229.09:11:32.25$setupk4/xlog=off 2006.229.09:11:32.25:!2006.229.09:15:08 2006.229.09:15:08.00:preob 2006.229.09:15:09.14/onsource/TRACKING 2006.229.09:15:09.14:!2006.229.09:15:18 2006.229.09:15:18.00:"tape 2006.229.09:15:18.00:"st=record 2006.229.09:15:18.00:data_valid=on 2006.229.09:15:18.00:midob 2006.229.09:15:18.14/onsource/TRACKING 2006.229.09:15:18.14/wx/29.09,1000.8,96 2006.229.09:15:18.22/cable/+6.4001E-03 2006.229.09:15:19.31/va/01,08,usb,yes,29,32 2006.229.09:15:19.31/va/02,07,usb,yes,32,32 2006.229.09:15:19.31/va/03,06,usb,yes,39,42 2006.229.09:15:19.31/va/04,07,usb,yes,33,34 2006.229.09:15:19.31/va/05,04,usb,yes,29,30 2006.229.09:15:19.31/va/06,04,usb,yes,33,32 2006.229.09:15:19.31/va/07,05,usb,yes,29,29 2006.229.09:15:19.31/va/08,06,usb,yes,21,26 2006.229.09:15:19.54/valo/01,524.99,yes,locked 2006.229.09:15:19.54/valo/02,534.99,yes,locked 2006.229.09:15:19.54/valo/03,564.99,yes,locked 2006.229.09:15:19.54/valo/04,624.99,yes,locked 2006.229.09:15:19.54/valo/05,734.99,yes,locked 2006.229.09:15:19.54/valo/06,814.99,yes,locked 2006.229.09:15:19.54/valo/07,864.99,yes,locked 2006.229.09:15:19.54/valo/08,884.99,yes,locked 2006.229.09:15:20.63/vb/01,04,usb,yes,31,29 2006.229.09:15:20.63/vb/02,04,usb,yes,34,33 2006.229.09:15:20.63/vb/03,04,usb,yes,30,34 2006.229.09:15:20.63/vb/04,04,usb,yes,35,34 2006.229.09:15:20.63/vb/05,04,usb,yes,27,30 2006.229.09:15:20.63/vb/06,04,usb,yes,32,28 2006.229.09:15:20.63/vb/07,04,usb,yes,31,31 2006.229.09:15:20.63/vb/08,04,usb,yes,29,32 2006.229.09:15:20.86/vblo/01,629.99,yes,locked 2006.229.09:15:20.86/vblo/02,634.99,yes,locked 2006.229.09:15:20.86/vblo/03,649.99,yes,locked 2006.229.09:15:20.86/vblo/04,679.99,yes,locked 2006.229.09:15:20.86/vblo/05,709.99,yes,locked 2006.229.09:15:20.86/vblo/06,719.99,yes,locked 2006.229.09:15:20.86/vblo/07,734.99,yes,locked 2006.229.09:15:20.86/vblo/08,744.99,yes,locked 2006.229.09:15:21.01/vabw/8 2006.229.09:15:21.16/vbbw/8 2006.229.09:15:21.31/xfe/off,on,12.2 2006.229.09:15:21.69/ifatt/23,28,28,28 2006.229.09:15:22.08/fmout-gps/S +4.58E-07 2006.229.09:15:22.12:!2006.229.09:15:58 2006.229.09:15:58.00:data_valid=off 2006.229.09:15:58.00:"et 2006.229.09:15:58.00:!+3s 2006.229.09:16:01.02:"tape 2006.229.09:16:01.02:postob 2006.229.09:16:01.09/cable/+6.4011E-03 2006.229.09:16:01.09/wx/29.09,1000.8,96 2006.229.09:16:01.15/fmout-gps/S +4.59E-07 2006.229.09:16:01.15:scan_name=229-0918,jd0608,50 2006.229.09:16:01.15:source=1611+343,161341.06,341247.9,2000.0,ccw 2006.229.09:16:03.14#flagr#flagr/antenna,new-source 2006.229.09:16:03.14:checkk5 2006.229.09:16:03.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:16:03.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:16:04.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:16:04.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:16:05.15/chk_obsdata//k5ts1/T2290915??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:16:05.56/chk_obsdata//k5ts2/T2290915??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:16:05.97/chk_obsdata//k5ts3/T2290915??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:16:06.38/chk_obsdata//k5ts4/T2290915??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:16:07.11/k5log//k5ts1_log_newline 2006.229.09:16:07.82/k5log//k5ts2_log_newline 2006.229.09:16:08.52/k5log//k5ts3_log_newline 2006.229.09:16:09.23/k5log//k5ts4_log_newline 2006.229.09:16:09.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:16:09.26:setupk4=1 2006.229.09:16:09.26$setupk4/echo=on 2006.229.09:16:09.26$setupk4/pcalon 2006.229.09:16:09.26$pcalon/"no phase cal control is implemented here 2006.229.09:16:09.26$setupk4/"tpicd=stop 2006.229.09:16:09.26$setupk4/"rec=synch_on 2006.229.09:16:09.26$setupk4/"rec_mode=128 2006.229.09:16:09.26$setupk4/!* 2006.229.09:16:09.26$setupk4/recpk4 2006.229.09:16:09.26$recpk4/recpatch= 2006.229.09:16:09.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:16:09.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:16:09.27$setupk4/vck44 2006.229.09:16:09.27$vck44/valo=1,524.99 2006.229.09:16:09.27#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:16:09.27#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:16:09.27#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:09.27#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:09.27#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:09.27#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:09.27#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:16:09.27#ibcon#first serial, iclass 11, count 0 2006.229.09:16:09.27#ibcon#enter sib2, iclass 11, count 0 2006.229.09:16:09.27#ibcon#flushed, iclass 11, count 0 2006.229.09:16:09.27#ibcon#about to write, iclass 11, count 0 2006.229.09:16:09.27#ibcon#wrote, iclass 11, count 0 2006.229.09:16:09.27#ibcon#about to read 3, iclass 11, count 0 2006.229.09:16:09.29#ibcon#read 3, iclass 11, count 0 2006.229.09:16:09.29#ibcon#about to read 4, iclass 11, count 0 2006.229.09:16:09.29#ibcon#read 4, iclass 11, count 0 2006.229.09:16:09.29#ibcon#about to read 5, iclass 11, count 0 2006.229.09:16:09.29#ibcon#read 5, iclass 11, count 0 2006.229.09:16:09.29#ibcon#about to read 6, iclass 11, count 0 2006.229.09:16:09.29#ibcon#read 6, iclass 11, count 0 2006.229.09:16:09.29#ibcon#end of sib2, iclass 11, count 0 2006.229.09:16:09.29#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:16:09.29#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:16:09.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:16:09.29#ibcon#*before write, iclass 11, count 0 2006.229.09:16:09.29#ibcon#enter sib2, iclass 11, count 0 2006.229.09:16:09.29#ibcon#flushed, iclass 11, count 0 2006.229.09:16:09.29#ibcon#about to write, iclass 11, count 0 2006.229.09:16:09.29#ibcon#wrote, iclass 11, count 0 2006.229.09:16:09.29#ibcon#about to read 3, iclass 11, count 0 2006.229.09:16:09.33#ibcon#read 3, iclass 11, count 0 2006.229.09:16:09.34#ibcon#about to read 4, iclass 11, count 0 2006.229.09:16:09.34#ibcon#read 4, iclass 11, count 0 2006.229.09:16:09.34#ibcon#about to read 5, iclass 11, count 0 2006.229.09:16:09.34#ibcon#read 5, iclass 11, count 0 2006.229.09:16:09.34#ibcon#about to read 6, iclass 11, count 0 2006.229.09:16:09.34#ibcon#read 6, iclass 11, count 0 2006.229.09:16:09.34#ibcon#end of sib2, iclass 11, count 0 2006.229.09:16:09.34#ibcon#*after write, iclass 11, count 0 2006.229.09:16:09.34#ibcon#*before return 0, iclass 11, count 0 2006.229.09:16:09.34#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:09.34#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:09.34#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:16:09.34#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:16:09.34$vck44/va=1,8 2006.229.09:16:09.34#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.09:16:09.34#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.09:16:09.34#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:09.34#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:09.34#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:09.34#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:09.34#ibcon#enter wrdev, iclass 13, count 2 2006.229.09:16:09.34#ibcon#first serial, iclass 13, count 2 2006.229.09:16:09.34#ibcon#enter sib2, iclass 13, count 2 2006.229.09:16:09.34#ibcon#flushed, iclass 13, count 2 2006.229.09:16:09.34#ibcon#about to write, iclass 13, count 2 2006.229.09:16:09.34#ibcon#wrote, iclass 13, count 2 2006.229.09:16:09.34#ibcon#about to read 3, iclass 13, count 2 2006.229.09:16:09.35#ibcon#read 3, iclass 13, count 2 2006.229.09:16:09.35#ibcon#about to read 4, iclass 13, count 2 2006.229.09:16:09.35#ibcon#read 4, iclass 13, count 2 2006.229.09:16:09.35#ibcon#about to read 5, iclass 13, count 2 2006.229.09:16:09.36#ibcon#read 5, iclass 13, count 2 2006.229.09:16:09.36#ibcon#about to read 6, iclass 13, count 2 2006.229.09:16:09.36#ibcon#read 6, iclass 13, count 2 2006.229.09:16:09.36#ibcon#end of sib2, iclass 13, count 2 2006.229.09:16:09.36#ibcon#*mode == 0, iclass 13, count 2 2006.229.09:16:09.36#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.09:16:09.36#ibcon#[25=AT01-08\r\n] 2006.229.09:16:09.36#ibcon#*before write, iclass 13, count 2 2006.229.09:16:09.36#ibcon#enter sib2, iclass 13, count 2 2006.229.09:16:09.36#ibcon#flushed, iclass 13, count 2 2006.229.09:16:09.36#ibcon#about to write, iclass 13, count 2 2006.229.09:16:09.36#ibcon#wrote, iclass 13, count 2 2006.229.09:16:09.36#ibcon#about to read 3, iclass 13, count 2 2006.229.09:16:09.38#ibcon#read 3, iclass 13, count 2 2006.229.09:16:09.38#ibcon#about to read 4, iclass 13, count 2 2006.229.09:16:09.39#ibcon#read 4, iclass 13, count 2 2006.229.09:16:09.39#ibcon#about to read 5, iclass 13, count 2 2006.229.09:16:09.39#ibcon#read 5, iclass 13, count 2 2006.229.09:16:09.39#ibcon#about to read 6, iclass 13, count 2 2006.229.09:16:09.39#ibcon#read 6, iclass 13, count 2 2006.229.09:16:09.39#ibcon#end of sib2, iclass 13, count 2 2006.229.09:16:09.39#ibcon#*after write, iclass 13, count 2 2006.229.09:16:09.39#ibcon#*before return 0, iclass 13, count 2 2006.229.09:16:09.39#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:09.39#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:09.39#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.09:16:09.39#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:09.39#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:09.50#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:09.51#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:09.51#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:16:09.51#ibcon#first serial, iclass 13, count 0 2006.229.09:16:09.51#ibcon#enter sib2, iclass 13, count 0 2006.229.09:16:09.51#ibcon#flushed, iclass 13, count 0 2006.229.09:16:09.51#ibcon#about to write, iclass 13, count 0 2006.229.09:16:09.51#ibcon#wrote, iclass 13, count 0 2006.229.09:16:09.51#ibcon#about to read 3, iclass 13, count 0 2006.229.09:16:09.52#ibcon#read 3, iclass 13, count 0 2006.229.09:16:09.53#ibcon#about to read 4, iclass 13, count 0 2006.229.09:16:09.53#ibcon#read 4, iclass 13, count 0 2006.229.09:16:09.53#ibcon#about to read 5, iclass 13, count 0 2006.229.09:16:09.53#ibcon#read 5, iclass 13, count 0 2006.229.09:16:09.53#ibcon#about to read 6, iclass 13, count 0 2006.229.09:16:09.53#ibcon#read 6, iclass 13, count 0 2006.229.09:16:09.53#ibcon#end of sib2, iclass 13, count 0 2006.229.09:16:09.53#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:16:09.53#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:16:09.53#ibcon#[25=USB\r\n] 2006.229.09:16:09.53#ibcon#*before write, iclass 13, count 0 2006.229.09:16:09.53#ibcon#enter sib2, iclass 13, count 0 2006.229.09:16:09.53#ibcon#flushed, iclass 13, count 0 2006.229.09:16:09.53#ibcon#about to write, iclass 13, count 0 2006.229.09:16:09.53#ibcon#wrote, iclass 13, count 0 2006.229.09:16:09.53#ibcon#about to read 3, iclass 13, count 0 2006.229.09:16:09.55#ibcon#read 3, iclass 13, count 0 2006.229.09:16:09.56#ibcon#about to read 4, iclass 13, count 0 2006.229.09:16:09.56#ibcon#read 4, iclass 13, count 0 2006.229.09:16:09.56#ibcon#about to read 5, iclass 13, count 0 2006.229.09:16:09.56#ibcon#read 5, iclass 13, count 0 2006.229.09:16:09.56#ibcon#about to read 6, iclass 13, count 0 2006.229.09:16:09.56#ibcon#read 6, iclass 13, count 0 2006.229.09:16:09.56#ibcon#end of sib2, iclass 13, count 0 2006.229.09:16:09.56#ibcon#*after write, iclass 13, count 0 2006.229.09:16:09.56#ibcon#*before return 0, iclass 13, count 0 2006.229.09:16:09.56#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:09.56#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:09.56#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:16:09.56#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:16:09.56$vck44/valo=2,534.99 2006.229.09:16:09.56#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.09:16:09.56#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.09:16:09.56#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:09.56#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:09.56#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:09.56#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:09.56#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:16:09.56#ibcon#first serial, iclass 15, count 0 2006.229.09:16:09.56#ibcon#enter sib2, iclass 15, count 0 2006.229.09:16:09.56#ibcon#flushed, iclass 15, count 0 2006.229.09:16:09.56#ibcon#about to write, iclass 15, count 0 2006.229.09:16:09.56#ibcon#wrote, iclass 15, count 0 2006.229.09:16:09.56#ibcon#about to read 3, iclass 15, count 0 2006.229.09:16:09.57#ibcon#read 3, iclass 15, count 0 2006.229.09:16:09.58#ibcon#about to read 4, iclass 15, count 0 2006.229.09:16:09.58#ibcon#read 4, iclass 15, count 0 2006.229.09:16:09.58#ibcon#about to read 5, iclass 15, count 0 2006.229.09:16:09.58#ibcon#read 5, iclass 15, count 0 2006.229.09:16:09.58#ibcon#about to read 6, iclass 15, count 0 2006.229.09:16:09.58#ibcon#read 6, iclass 15, count 0 2006.229.09:16:09.58#ibcon#end of sib2, iclass 15, count 0 2006.229.09:16:09.58#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:16:09.58#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:16:09.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:16:09.58#ibcon#*before write, iclass 15, count 0 2006.229.09:16:09.58#ibcon#enter sib2, iclass 15, count 0 2006.229.09:16:09.58#ibcon#flushed, iclass 15, count 0 2006.229.09:16:09.58#ibcon#about to write, iclass 15, count 0 2006.229.09:16:09.58#ibcon#wrote, iclass 15, count 0 2006.229.09:16:09.58#ibcon#about to read 3, iclass 15, count 0 2006.229.09:16:09.61#ibcon#read 3, iclass 15, count 0 2006.229.09:16:09.62#ibcon#about to read 4, iclass 15, count 0 2006.229.09:16:09.62#ibcon#read 4, iclass 15, count 0 2006.229.09:16:09.62#ibcon#about to read 5, iclass 15, count 0 2006.229.09:16:09.62#ibcon#read 5, iclass 15, count 0 2006.229.09:16:09.62#ibcon#about to read 6, iclass 15, count 0 2006.229.09:16:09.62#ibcon#read 6, iclass 15, count 0 2006.229.09:16:09.62#ibcon#end of sib2, iclass 15, count 0 2006.229.09:16:09.62#ibcon#*after write, iclass 15, count 0 2006.229.09:16:09.62#ibcon#*before return 0, iclass 15, count 0 2006.229.09:16:09.62#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:09.62#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:09.62#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:16:09.62#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:16:09.62$vck44/va=2,7 2006.229.09:16:09.62#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.09:16:09.62#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.09:16:09.62#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:09.62#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:09.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:09.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:09.68#ibcon#enter wrdev, iclass 17, count 2 2006.229.09:16:09.68#ibcon#first serial, iclass 17, count 2 2006.229.09:16:09.68#ibcon#enter sib2, iclass 17, count 2 2006.229.09:16:09.68#ibcon#flushed, iclass 17, count 2 2006.229.09:16:09.68#ibcon#about to write, iclass 17, count 2 2006.229.09:16:09.68#ibcon#wrote, iclass 17, count 2 2006.229.09:16:09.68#ibcon#about to read 3, iclass 17, count 2 2006.229.09:16:09.69#ibcon#read 3, iclass 17, count 2 2006.229.09:16:09.69#ibcon#about to read 4, iclass 17, count 2 2006.229.09:16:09.70#ibcon#read 4, iclass 17, count 2 2006.229.09:16:09.70#ibcon#about to read 5, iclass 17, count 2 2006.229.09:16:09.70#ibcon#read 5, iclass 17, count 2 2006.229.09:16:09.70#ibcon#about to read 6, iclass 17, count 2 2006.229.09:16:09.70#ibcon#read 6, iclass 17, count 2 2006.229.09:16:09.70#ibcon#end of sib2, iclass 17, count 2 2006.229.09:16:09.70#ibcon#*mode == 0, iclass 17, count 2 2006.229.09:16:09.70#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.09:16:09.70#ibcon#[25=AT02-07\r\n] 2006.229.09:16:09.70#ibcon#*before write, iclass 17, count 2 2006.229.09:16:09.70#ibcon#enter sib2, iclass 17, count 2 2006.229.09:16:09.70#ibcon#flushed, iclass 17, count 2 2006.229.09:16:09.70#ibcon#about to write, iclass 17, count 2 2006.229.09:16:09.70#ibcon#wrote, iclass 17, count 2 2006.229.09:16:09.70#ibcon#about to read 3, iclass 17, count 2 2006.229.09:16:09.72#ibcon#read 3, iclass 17, count 2 2006.229.09:16:09.72#ibcon#about to read 4, iclass 17, count 2 2006.229.09:16:09.73#ibcon#read 4, iclass 17, count 2 2006.229.09:16:09.73#ibcon#about to read 5, iclass 17, count 2 2006.229.09:16:09.73#ibcon#read 5, iclass 17, count 2 2006.229.09:16:09.73#ibcon#about to read 6, iclass 17, count 2 2006.229.09:16:09.73#ibcon#read 6, iclass 17, count 2 2006.229.09:16:09.73#ibcon#end of sib2, iclass 17, count 2 2006.229.09:16:09.73#ibcon#*after write, iclass 17, count 2 2006.229.09:16:09.73#ibcon#*before return 0, iclass 17, count 2 2006.229.09:16:09.73#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:09.73#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:09.73#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.09:16:09.73#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:09.73#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:09.84#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:09.84#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:09.85#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:16:09.85#ibcon#first serial, iclass 17, count 0 2006.229.09:16:09.85#ibcon#enter sib2, iclass 17, count 0 2006.229.09:16:09.85#ibcon#flushed, iclass 17, count 0 2006.229.09:16:09.85#ibcon#about to write, iclass 17, count 0 2006.229.09:16:09.85#ibcon#wrote, iclass 17, count 0 2006.229.09:16:09.85#ibcon#about to read 3, iclass 17, count 0 2006.229.09:16:09.86#ibcon#read 3, iclass 17, count 0 2006.229.09:16:09.86#ibcon#about to read 4, iclass 17, count 0 2006.229.09:16:09.86#ibcon#read 4, iclass 17, count 0 2006.229.09:16:09.86#ibcon#about to read 5, iclass 17, count 0 2006.229.09:16:09.87#ibcon#read 5, iclass 17, count 0 2006.229.09:16:09.87#ibcon#about to read 6, iclass 17, count 0 2006.229.09:16:09.87#ibcon#read 6, iclass 17, count 0 2006.229.09:16:09.87#ibcon#end of sib2, iclass 17, count 0 2006.229.09:16:09.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:16:09.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:16:09.87#ibcon#[25=USB\r\n] 2006.229.09:16:09.87#ibcon#*before write, iclass 17, count 0 2006.229.09:16:09.87#ibcon#enter sib2, iclass 17, count 0 2006.229.09:16:09.87#ibcon#flushed, iclass 17, count 0 2006.229.09:16:09.87#ibcon#about to write, iclass 17, count 0 2006.229.09:16:09.87#ibcon#wrote, iclass 17, count 0 2006.229.09:16:09.87#ibcon#about to read 3, iclass 17, count 0 2006.229.09:16:09.89#ibcon#read 3, iclass 17, count 0 2006.229.09:16:09.89#ibcon#about to read 4, iclass 17, count 0 2006.229.09:16:09.90#ibcon#read 4, iclass 17, count 0 2006.229.09:16:09.90#ibcon#about to read 5, iclass 17, count 0 2006.229.09:16:09.90#ibcon#read 5, iclass 17, count 0 2006.229.09:16:09.90#ibcon#about to read 6, iclass 17, count 0 2006.229.09:16:09.90#ibcon#read 6, iclass 17, count 0 2006.229.09:16:09.90#ibcon#end of sib2, iclass 17, count 0 2006.229.09:16:09.90#ibcon#*after write, iclass 17, count 0 2006.229.09:16:09.90#ibcon#*before return 0, iclass 17, count 0 2006.229.09:16:09.90#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:09.90#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:09.90#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:16:09.90#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:16:09.90$vck44/valo=3,564.99 2006.229.09:16:09.90#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.09:16:09.90#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.09:16:09.90#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:09.90#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:09.90#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:09.90#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:09.90#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:16:09.90#ibcon#first serial, iclass 19, count 0 2006.229.09:16:09.90#ibcon#enter sib2, iclass 19, count 0 2006.229.09:16:09.90#ibcon#flushed, iclass 19, count 0 2006.229.09:16:09.90#ibcon#about to write, iclass 19, count 0 2006.229.09:16:09.90#ibcon#wrote, iclass 19, count 0 2006.229.09:16:09.90#ibcon#about to read 3, iclass 19, count 0 2006.229.09:16:09.91#ibcon#read 3, iclass 19, count 0 2006.229.09:16:09.91#ibcon#about to read 4, iclass 19, count 0 2006.229.09:16:09.92#ibcon#read 4, iclass 19, count 0 2006.229.09:16:09.92#ibcon#about to read 5, iclass 19, count 0 2006.229.09:16:09.92#ibcon#read 5, iclass 19, count 0 2006.229.09:16:09.92#ibcon#about to read 6, iclass 19, count 0 2006.229.09:16:09.92#ibcon#read 6, iclass 19, count 0 2006.229.09:16:09.92#ibcon#end of sib2, iclass 19, count 0 2006.229.09:16:09.92#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:16:09.92#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:16:09.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:16:09.92#ibcon#*before write, iclass 19, count 0 2006.229.09:16:09.92#ibcon#enter sib2, iclass 19, count 0 2006.229.09:16:09.92#ibcon#flushed, iclass 19, count 0 2006.229.09:16:09.92#ibcon#about to write, iclass 19, count 0 2006.229.09:16:09.92#ibcon#wrote, iclass 19, count 0 2006.229.09:16:09.92#ibcon#about to read 3, iclass 19, count 0 2006.229.09:16:09.95#ibcon#read 3, iclass 19, count 0 2006.229.09:16:09.96#ibcon#about to read 4, iclass 19, count 0 2006.229.09:16:09.96#ibcon#read 4, iclass 19, count 0 2006.229.09:16:09.96#ibcon#about to read 5, iclass 19, count 0 2006.229.09:16:09.96#ibcon#read 5, iclass 19, count 0 2006.229.09:16:09.96#ibcon#about to read 6, iclass 19, count 0 2006.229.09:16:09.96#ibcon#read 6, iclass 19, count 0 2006.229.09:16:09.96#ibcon#end of sib2, iclass 19, count 0 2006.229.09:16:09.96#ibcon#*after write, iclass 19, count 0 2006.229.09:16:09.96#ibcon#*before return 0, iclass 19, count 0 2006.229.09:16:09.96#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:09.96#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:09.96#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:16:09.96#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:16:09.96$vck44/va=3,6 2006.229.09:16:09.96#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.09:16:09.96#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.09:16:09.96#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:09.96#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:10.01#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:10.02#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:10.02#ibcon#enter wrdev, iclass 21, count 2 2006.229.09:16:10.02#ibcon#first serial, iclass 21, count 2 2006.229.09:16:10.02#ibcon#enter sib2, iclass 21, count 2 2006.229.09:16:10.02#ibcon#flushed, iclass 21, count 2 2006.229.09:16:10.02#ibcon#about to write, iclass 21, count 2 2006.229.09:16:10.02#ibcon#wrote, iclass 21, count 2 2006.229.09:16:10.02#ibcon#about to read 3, iclass 21, count 2 2006.229.09:16:10.03#ibcon#read 3, iclass 21, count 2 2006.229.09:16:10.03#ibcon#about to read 4, iclass 21, count 2 2006.229.09:16:10.04#ibcon#read 4, iclass 21, count 2 2006.229.09:16:10.04#ibcon#about to read 5, iclass 21, count 2 2006.229.09:16:10.04#ibcon#read 5, iclass 21, count 2 2006.229.09:16:10.04#ibcon#about to read 6, iclass 21, count 2 2006.229.09:16:10.04#ibcon#read 6, iclass 21, count 2 2006.229.09:16:10.04#ibcon#end of sib2, iclass 21, count 2 2006.229.09:16:10.04#ibcon#*mode == 0, iclass 21, count 2 2006.229.09:16:10.04#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.09:16:10.04#ibcon#[25=AT03-06\r\n] 2006.229.09:16:10.04#ibcon#*before write, iclass 21, count 2 2006.229.09:16:10.04#ibcon#enter sib2, iclass 21, count 2 2006.229.09:16:10.04#ibcon#flushed, iclass 21, count 2 2006.229.09:16:10.04#ibcon#about to write, iclass 21, count 2 2006.229.09:16:10.04#ibcon#wrote, iclass 21, count 2 2006.229.09:16:10.04#ibcon#about to read 3, iclass 21, count 2 2006.229.09:16:10.06#ibcon#read 3, iclass 21, count 2 2006.229.09:16:10.06#ibcon#about to read 4, iclass 21, count 2 2006.229.09:16:10.07#ibcon#read 4, iclass 21, count 2 2006.229.09:16:10.07#ibcon#about to read 5, iclass 21, count 2 2006.229.09:16:10.07#ibcon#read 5, iclass 21, count 2 2006.229.09:16:10.07#ibcon#about to read 6, iclass 21, count 2 2006.229.09:16:10.07#ibcon#read 6, iclass 21, count 2 2006.229.09:16:10.07#ibcon#end of sib2, iclass 21, count 2 2006.229.09:16:10.07#ibcon#*after write, iclass 21, count 2 2006.229.09:16:10.07#ibcon#*before return 0, iclass 21, count 2 2006.229.09:16:10.07#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:10.07#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:10.07#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.09:16:10.07#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:10.07#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:10.18#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:10.18#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:10.19#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:16:10.19#ibcon#first serial, iclass 21, count 0 2006.229.09:16:10.19#ibcon#enter sib2, iclass 21, count 0 2006.229.09:16:10.19#ibcon#flushed, iclass 21, count 0 2006.229.09:16:10.19#ibcon#about to write, iclass 21, count 0 2006.229.09:16:10.19#ibcon#wrote, iclass 21, count 0 2006.229.09:16:10.19#ibcon#about to read 3, iclass 21, count 0 2006.229.09:16:10.20#ibcon#read 3, iclass 21, count 0 2006.229.09:16:10.20#ibcon#about to read 4, iclass 21, count 0 2006.229.09:16:10.20#ibcon#read 4, iclass 21, count 0 2006.229.09:16:10.21#ibcon#about to read 5, iclass 21, count 0 2006.229.09:16:10.21#ibcon#read 5, iclass 21, count 0 2006.229.09:16:10.21#ibcon#about to read 6, iclass 21, count 0 2006.229.09:16:10.21#ibcon#read 6, iclass 21, count 0 2006.229.09:16:10.21#ibcon#end of sib2, iclass 21, count 0 2006.229.09:16:10.21#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:16:10.21#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:16:10.21#ibcon#[25=USB\r\n] 2006.229.09:16:10.21#ibcon#*before write, iclass 21, count 0 2006.229.09:16:10.21#ibcon#enter sib2, iclass 21, count 0 2006.229.09:16:10.21#ibcon#flushed, iclass 21, count 0 2006.229.09:16:10.21#ibcon#about to write, iclass 21, count 0 2006.229.09:16:10.21#ibcon#wrote, iclass 21, count 0 2006.229.09:16:10.21#ibcon#about to read 3, iclass 21, count 0 2006.229.09:16:10.23#ibcon#read 3, iclass 21, count 0 2006.229.09:16:10.23#ibcon#about to read 4, iclass 21, count 0 2006.229.09:16:10.23#ibcon#read 4, iclass 21, count 0 2006.229.09:16:10.23#ibcon#about to read 5, iclass 21, count 0 2006.229.09:16:10.24#ibcon#read 5, iclass 21, count 0 2006.229.09:16:10.24#ibcon#about to read 6, iclass 21, count 0 2006.229.09:16:10.24#ibcon#read 6, iclass 21, count 0 2006.229.09:16:10.24#ibcon#end of sib2, iclass 21, count 0 2006.229.09:16:10.24#ibcon#*after write, iclass 21, count 0 2006.229.09:16:10.24#ibcon#*before return 0, iclass 21, count 0 2006.229.09:16:10.24#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:10.24#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:10.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:16:10.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:16:10.24$vck44/valo=4,624.99 2006.229.09:16:10.24#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.09:16:10.24#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.09:16:10.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:10.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:10.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:10.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:10.24#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:16:10.24#ibcon#first serial, iclass 23, count 0 2006.229.09:16:10.24#ibcon#enter sib2, iclass 23, count 0 2006.229.09:16:10.24#ibcon#flushed, iclass 23, count 0 2006.229.09:16:10.24#ibcon#about to write, iclass 23, count 0 2006.229.09:16:10.24#ibcon#wrote, iclass 23, count 0 2006.229.09:16:10.24#ibcon#about to read 3, iclass 23, count 0 2006.229.09:16:10.25#ibcon#read 3, iclass 23, count 0 2006.229.09:16:10.25#ibcon#about to read 4, iclass 23, count 0 2006.229.09:16:10.26#ibcon#read 4, iclass 23, count 0 2006.229.09:16:10.26#ibcon#about to read 5, iclass 23, count 0 2006.229.09:16:10.26#ibcon#read 5, iclass 23, count 0 2006.229.09:16:10.26#ibcon#about to read 6, iclass 23, count 0 2006.229.09:16:10.26#ibcon#read 6, iclass 23, count 0 2006.229.09:16:10.26#ibcon#end of sib2, iclass 23, count 0 2006.229.09:16:10.26#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:16:10.26#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:16:10.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:16:10.26#ibcon#*before write, iclass 23, count 0 2006.229.09:16:10.26#ibcon#enter sib2, iclass 23, count 0 2006.229.09:16:10.26#ibcon#flushed, iclass 23, count 0 2006.229.09:16:10.26#ibcon#about to write, iclass 23, count 0 2006.229.09:16:10.26#ibcon#wrote, iclass 23, count 0 2006.229.09:16:10.26#ibcon#about to read 3, iclass 23, count 0 2006.229.09:16:10.29#ibcon#read 3, iclass 23, count 0 2006.229.09:16:10.29#ibcon#about to read 4, iclass 23, count 0 2006.229.09:16:10.29#ibcon#read 4, iclass 23, count 0 2006.229.09:16:10.29#ibcon#about to read 5, iclass 23, count 0 2006.229.09:16:10.30#ibcon#read 5, iclass 23, count 0 2006.229.09:16:10.30#ibcon#about to read 6, iclass 23, count 0 2006.229.09:16:10.30#ibcon#read 6, iclass 23, count 0 2006.229.09:16:10.30#ibcon#end of sib2, iclass 23, count 0 2006.229.09:16:10.30#ibcon#*after write, iclass 23, count 0 2006.229.09:16:10.30#ibcon#*before return 0, iclass 23, count 0 2006.229.09:16:10.30#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:10.30#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:10.30#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:16:10.30#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:16:10.30$vck44/va=4,7 2006.229.09:16:10.30#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.09:16:10.30#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.09:16:10.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:10.30#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:10.35#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:10.35#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:10.36#ibcon#enter wrdev, iclass 25, count 2 2006.229.09:16:10.36#ibcon#first serial, iclass 25, count 2 2006.229.09:16:10.36#ibcon#enter sib2, iclass 25, count 2 2006.229.09:16:10.36#ibcon#flushed, iclass 25, count 2 2006.229.09:16:10.36#ibcon#about to write, iclass 25, count 2 2006.229.09:16:10.36#ibcon#wrote, iclass 25, count 2 2006.229.09:16:10.36#ibcon#about to read 3, iclass 25, count 2 2006.229.09:16:10.37#ibcon#read 3, iclass 25, count 2 2006.229.09:16:10.37#ibcon#about to read 4, iclass 25, count 2 2006.229.09:16:10.37#ibcon#read 4, iclass 25, count 2 2006.229.09:16:10.38#ibcon#about to read 5, iclass 25, count 2 2006.229.09:16:10.38#ibcon#read 5, iclass 25, count 2 2006.229.09:16:10.38#ibcon#about to read 6, iclass 25, count 2 2006.229.09:16:10.38#ibcon#read 6, iclass 25, count 2 2006.229.09:16:10.38#ibcon#end of sib2, iclass 25, count 2 2006.229.09:16:10.38#ibcon#*mode == 0, iclass 25, count 2 2006.229.09:16:10.38#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.09:16:10.38#ibcon#[25=AT04-07\r\n] 2006.229.09:16:10.38#ibcon#*before write, iclass 25, count 2 2006.229.09:16:10.38#ibcon#enter sib2, iclass 25, count 2 2006.229.09:16:10.38#ibcon#flushed, iclass 25, count 2 2006.229.09:16:10.38#ibcon#about to write, iclass 25, count 2 2006.229.09:16:10.38#ibcon#wrote, iclass 25, count 2 2006.229.09:16:10.38#ibcon#about to read 3, iclass 25, count 2 2006.229.09:16:10.40#ibcon#read 3, iclass 25, count 2 2006.229.09:16:10.41#ibcon#about to read 4, iclass 25, count 2 2006.229.09:16:10.41#ibcon#read 4, iclass 25, count 2 2006.229.09:16:10.41#ibcon#about to read 5, iclass 25, count 2 2006.229.09:16:10.41#ibcon#read 5, iclass 25, count 2 2006.229.09:16:10.41#ibcon#about to read 6, iclass 25, count 2 2006.229.09:16:10.41#ibcon#read 6, iclass 25, count 2 2006.229.09:16:10.41#ibcon#end of sib2, iclass 25, count 2 2006.229.09:16:10.41#ibcon#*after write, iclass 25, count 2 2006.229.09:16:10.41#ibcon#*before return 0, iclass 25, count 2 2006.229.09:16:10.41#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:10.41#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:10.41#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.09:16:10.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:10.41#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:10.52#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:10.53#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:10.53#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:16:10.53#ibcon#first serial, iclass 25, count 0 2006.229.09:16:10.53#ibcon#enter sib2, iclass 25, count 0 2006.229.09:16:10.53#ibcon#flushed, iclass 25, count 0 2006.229.09:16:10.53#ibcon#about to write, iclass 25, count 0 2006.229.09:16:10.53#ibcon#wrote, iclass 25, count 0 2006.229.09:16:10.53#ibcon#about to read 3, iclass 25, count 0 2006.229.09:16:10.55#ibcon#read 3, iclass 25, count 0 2006.229.09:16:10.55#ibcon#about to read 4, iclass 25, count 0 2006.229.09:16:10.55#ibcon#read 4, iclass 25, count 0 2006.229.09:16:10.55#ibcon#about to read 5, iclass 25, count 0 2006.229.09:16:10.55#ibcon#read 5, iclass 25, count 0 2006.229.09:16:10.55#ibcon#about to read 6, iclass 25, count 0 2006.229.09:16:10.55#ibcon#read 6, iclass 25, count 0 2006.229.09:16:10.55#ibcon#end of sib2, iclass 25, count 0 2006.229.09:16:10.55#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:16:10.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:16:10.55#ibcon#[25=USB\r\n] 2006.229.09:16:10.55#ibcon#*before write, iclass 25, count 0 2006.229.09:16:10.55#ibcon#enter sib2, iclass 25, count 0 2006.229.09:16:10.55#ibcon#flushed, iclass 25, count 0 2006.229.09:16:10.55#ibcon#about to write, iclass 25, count 0 2006.229.09:16:10.55#ibcon#wrote, iclass 25, count 0 2006.229.09:16:10.55#ibcon#about to read 3, iclass 25, count 0 2006.229.09:16:10.57#ibcon#read 3, iclass 25, count 0 2006.229.09:16:10.58#ibcon#about to read 4, iclass 25, count 0 2006.229.09:16:10.58#ibcon#read 4, iclass 25, count 0 2006.229.09:16:10.58#ibcon#about to read 5, iclass 25, count 0 2006.229.09:16:10.58#ibcon#read 5, iclass 25, count 0 2006.229.09:16:10.58#ibcon#about to read 6, iclass 25, count 0 2006.229.09:16:10.58#ibcon#read 6, iclass 25, count 0 2006.229.09:16:10.58#ibcon#end of sib2, iclass 25, count 0 2006.229.09:16:10.58#ibcon#*after write, iclass 25, count 0 2006.229.09:16:10.58#ibcon#*before return 0, iclass 25, count 0 2006.229.09:16:10.58#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:10.58#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:10.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:16:10.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:16:10.58$vck44/valo=5,734.99 2006.229.09:16:10.58#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.09:16:10.58#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.09:16:10.58#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:10.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:10.58#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:10.58#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:10.58#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:16:10.58#ibcon#first serial, iclass 27, count 0 2006.229.09:16:10.58#ibcon#enter sib2, iclass 27, count 0 2006.229.09:16:10.58#ibcon#flushed, iclass 27, count 0 2006.229.09:16:10.58#ibcon#about to write, iclass 27, count 0 2006.229.09:16:10.58#ibcon#wrote, iclass 27, count 0 2006.229.09:16:10.58#ibcon#about to read 3, iclass 27, count 0 2006.229.09:16:10.59#ibcon#read 3, iclass 27, count 0 2006.229.09:16:10.60#ibcon#about to read 4, iclass 27, count 0 2006.229.09:16:10.60#ibcon#read 4, iclass 27, count 0 2006.229.09:16:10.60#ibcon#about to read 5, iclass 27, count 0 2006.229.09:16:10.60#ibcon#read 5, iclass 27, count 0 2006.229.09:16:10.60#ibcon#about to read 6, iclass 27, count 0 2006.229.09:16:10.60#ibcon#read 6, iclass 27, count 0 2006.229.09:16:10.60#ibcon#end of sib2, iclass 27, count 0 2006.229.09:16:10.60#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:16:10.60#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:16:10.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:16:10.60#ibcon#*before write, iclass 27, count 0 2006.229.09:16:10.60#ibcon#enter sib2, iclass 27, count 0 2006.229.09:16:10.60#ibcon#flushed, iclass 27, count 0 2006.229.09:16:10.60#ibcon#about to write, iclass 27, count 0 2006.229.09:16:10.60#ibcon#wrote, iclass 27, count 0 2006.229.09:16:10.60#ibcon#about to read 3, iclass 27, count 0 2006.229.09:16:10.63#ibcon#read 3, iclass 27, count 0 2006.229.09:16:10.63#ibcon#about to read 4, iclass 27, count 0 2006.229.09:16:10.64#ibcon#read 4, iclass 27, count 0 2006.229.09:16:10.64#ibcon#about to read 5, iclass 27, count 0 2006.229.09:16:10.64#ibcon#read 5, iclass 27, count 0 2006.229.09:16:10.64#ibcon#about to read 6, iclass 27, count 0 2006.229.09:16:10.64#ibcon#read 6, iclass 27, count 0 2006.229.09:16:10.64#ibcon#end of sib2, iclass 27, count 0 2006.229.09:16:10.64#ibcon#*after write, iclass 27, count 0 2006.229.09:16:10.64#ibcon#*before return 0, iclass 27, count 0 2006.229.09:16:10.64#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:10.64#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:10.64#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:16:10.64#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:16:10.64$vck44/va=5,4 2006.229.09:16:10.64#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.09:16:10.64#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.09:16:10.64#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:10.64#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:10.69#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:10.69#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:10.70#ibcon#enter wrdev, iclass 29, count 2 2006.229.09:16:10.70#ibcon#first serial, iclass 29, count 2 2006.229.09:16:10.70#ibcon#enter sib2, iclass 29, count 2 2006.229.09:16:10.70#ibcon#flushed, iclass 29, count 2 2006.229.09:16:10.70#ibcon#about to write, iclass 29, count 2 2006.229.09:16:10.70#ibcon#wrote, iclass 29, count 2 2006.229.09:16:10.70#ibcon#about to read 3, iclass 29, count 2 2006.229.09:16:10.71#ibcon#read 3, iclass 29, count 2 2006.229.09:16:10.72#ibcon#about to read 4, iclass 29, count 2 2006.229.09:16:10.72#ibcon#read 4, iclass 29, count 2 2006.229.09:16:10.72#ibcon#about to read 5, iclass 29, count 2 2006.229.09:16:10.72#ibcon#read 5, iclass 29, count 2 2006.229.09:16:10.72#ibcon#about to read 6, iclass 29, count 2 2006.229.09:16:10.72#ibcon#read 6, iclass 29, count 2 2006.229.09:16:10.72#ibcon#end of sib2, iclass 29, count 2 2006.229.09:16:10.72#ibcon#*mode == 0, iclass 29, count 2 2006.229.09:16:10.72#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.09:16:10.72#ibcon#[25=AT05-04\r\n] 2006.229.09:16:10.72#ibcon#*before write, iclass 29, count 2 2006.229.09:16:10.72#ibcon#enter sib2, iclass 29, count 2 2006.229.09:16:10.72#ibcon#flushed, iclass 29, count 2 2006.229.09:16:10.72#ibcon#about to write, iclass 29, count 2 2006.229.09:16:10.72#ibcon#wrote, iclass 29, count 2 2006.229.09:16:10.72#ibcon#about to read 3, iclass 29, count 2 2006.229.09:16:10.74#ibcon#read 3, iclass 29, count 2 2006.229.09:16:10.75#ibcon#about to read 4, iclass 29, count 2 2006.229.09:16:10.75#ibcon#read 4, iclass 29, count 2 2006.229.09:16:10.75#ibcon#about to read 5, iclass 29, count 2 2006.229.09:16:10.75#ibcon#read 5, iclass 29, count 2 2006.229.09:16:10.75#ibcon#about to read 6, iclass 29, count 2 2006.229.09:16:10.75#ibcon#read 6, iclass 29, count 2 2006.229.09:16:10.75#ibcon#end of sib2, iclass 29, count 2 2006.229.09:16:10.75#ibcon#*after write, iclass 29, count 2 2006.229.09:16:10.75#ibcon#*before return 0, iclass 29, count 2 2006.229.09:16:10.75#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:10.75#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:10.75#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.09:16:10.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:10.75#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:10.86#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:10.86#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:10.87#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:16:10.87#ibcon#first serial, iclass 29, count 0 2006.229.09:16:10.87#ibcon#enter sib2, iclass 29, count 0 2006.229.09:16:10.87#ibcon#flushed, iclass 29, count 0 2006.229.09:16:10.87#ibcon#about to write, iclass 29, count 0 2006.229.09:16:10.87#ibcon#wrote, iclass 29, count 0 2006.229.09:16:10.87#ibcon#about to read 3, iclass 29, count 0 2006.229.09:16:10.88#ibcon#read 3, iclass 29, count 0 2006.229.09:16:10.88#ibcon#about to read 4, iclass 29, count 0 2006.229.09:16:10.89#ibcon#read 4, iclass 29, count 0 2006.229.09:16:10.89#ibcon#about to read 5, iclass 29, count 0 2006.229.09:16:10.89#ibcon#read 5, iclass 29, count 0 2006.229.09:16:10.89#ibcon#about to read 6, iclass 29, count 0 2006.229.09:16:10.89#ibcon#read 6, iclass 29, count 0 2006.229.09:16:10.89#ibcon#end of sib2, iclass 29, count 0 2006.229.09:16:10.89#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:16:10.89#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:16:10.89#ibcon#[25=USB\r\n] 2006.229.09:16:10.89#ibcon#*before write, iclass 29, count 0 2006.229.09:16:10.89#ibcon#enter sib2, iclass 29, count 0 2006.229.09:16:10.89#ibcon#flushed, iclass 29, count 0 2006.229.09:16:10.89#ibcon#about to write, iclass 29, count 0 2006.229.09:16:10.89#ibcon#wrote, iclass 29, count 0 2006.229.09:16:10.89#ibcon#about to read 3, iclass 29, count 0 2006.229.09:16:10.91#ibcon#read 3, iclass 29, count 0 2006.229.09:16:10.91#ibcon#about to read 4, iclass 29, count 0 2006.229.09:16:10.91#ibcon#read 4, iclass 29, count 0 2006.229.09:16:10.91#ibcon#about to read 5, iclass 29, count 0 2006.229.09:16:10.92#ibcon#read 5, iclass 29, count 0 2006.229.09:16:10.92#ibcon#about to read 6, iclass 29, count 0 2006.229.09:16:10.92#ibcon#read 6, iclass 29, count 0 2006.229.09:16:10.92#ibcon#end of sib2, iclass 29, count 0 2006.229.09:16:10.92#ibcon#*after write, iclass 29, count 0 2006.229.09:16:10.92#ibcon#*before return 0, iclass 29, count 0 2006.229.09:16:10.92#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:10.92#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:10.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:16:10.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:16:10.92$vck44/valo=6,814.99 2006.229.09:16:10.92#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.09:16:10.92#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.09:16:10.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:10.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:10.92#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:10.92#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:10.92#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:16:10.92#ibcon#first serial, iclass 31, count 0 2006.229.09:16:10.92#ibcon#enter sib2, iclass 31, count 0 2006.229.09:16:10.92#ibcon#flushed, iclass 31, count 0 2006.229.09:16:10.92#ibcon#about to write, iclass 31, count 0 2006.229.09:16:10.92#ibcon#wrote, iclass 31, count 0 2006.229.09:16:10.92#ibcon#about to read 3, iclass 31, count 0 2006.229.09:16:10.93#ibcon#read 3, iclass 31, count 0 2006.229.09:16:10.93#ibcon#about to read 4, iclass 31, count 0 2006.229.09:16:10.93#ibcon#read 4, iclass 31, count 0 2006.229.09:16:10.94#ibcon#about to read 5, iclass 31, count 0 2006.229.09:16:10.94#ibcon#read 5, iclass 31, count 0 2006.229.09:16:10.94#ibcon#about to read 6, iclass 31, count 0 2006.229.09:16:10.94#ibcon#read 6, iclass 31, count 0 2006.229.09:16:10.94#ibcon#end of sib2, iclass 31, count 0 2006.229.09:16:10.94#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:16:10.94#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:16:10.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:16:10.94#ibcon#*before write, iclass 31, count 0 2006.229.09:16:10.94#ibcon#enter sib2, iclass 31, count 0 2006.229.09:16:10.94#ibcon#flushed, iclass 31, count 0 2006.229.09:16:10.94#ibcon#about to write, iclass 31, count 0 2006.229.09:16:10.94#ibcon#wrote, iclass 31, count 0 2006.229.09:16:10.94#ibcon#about to read 3, iclass 31, count 0 2006.229.09:16:10.97#ibcon#read 3, iclass 31, count 0 2006.229.09:16:10.97#ibcon#about to read 4, iclass 31, count 0 2006.229.09:16:10.98#ibcon#read 4, iclass 31, count 0 2006.229.09:16:10.98#ibcon#about to read 5, iclass 31, count 0 2006.229.09:16:10.98#ibcon#read 5, iclass 31, count 0 2006.229.09:16:10.98#ibcon#about to read 6, iclass 31, count 0 2006.229.09:16:10.98#ibcon#read 6, iclass 31, count 0 2006.229.09:16:10.98#ibcon#end of sib2, iclass 31, count 0 2006.229.09:16:10.98#ibcon#*after write, iclass 31, count 0 2006.229.09:16:10.98#ibcon#*before return 0, iclass 31, count 0 2006.229.09:16:10.98#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:10.98#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:10.98#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:16:10.98#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:16:10.98$vck44/va=6,4 2006.229.09:16:10.98#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.09:16:10.98#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.09:16:10.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:10.98#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:11.04#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:11.04#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:11.04#ibcon#enter wrdev, iclass 33, count 2 2006.229.09:16:11.04#ibcon#first serial, iclass 33, count 2 2006.229.09:16:11.04#ibcon#enter sib2, iclass 33, count 2 2006.229.09:16:11.04#ibcon#flushed, iclass 33, count 2 2006.229.09:16:11.04#ibcon#about to write, iclass 33, count 2 2006.229.09:16:11.04#ibcon#wrote, iclass 33, count 2 2006.229.09:16:11.04#ibcon#about to read 3, iclass 33, count 2 2006.229.09:16:11.05#ibcon#read 3, iclass 33, count 2 2006.229.09:16:11.05#ibcon#about to read 4, iclass 33, count 2 2006.229.09:16:11.06#ibcon#read 4, iclass 33, count 2 2006.229.09:16:11.06#ibcon#about to read 5, iclass 33, count 2 2006.229.09:16:11.06#ibcon#read 5, iclass 33, count 2 2006.229.09:16:11.06#ibcon#about to read 6, iclass 33, count 2 2006.229.09:16:11.06#ibcon#read 6, iclass 33, count 2 2006.229.09:16:11.06#ibcon#end of sib2, iclass 33, count 2 2006.229.09:16:11.06#ibcon#*mode == 0, iclass 33, count 2 2006.229.09:16:11.06#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.09:16:11.06#ibcon#[25=AT06-04\r\n] 2006.229.09:16:11.06#ibcon#*before write, iclass 33, count 2 2006.229.09:16:11.06#ibcon#enter sib2, iclass 33, count 2 2006.229.09:16:11.06#ibcon#flushed, iclass 33, count 2 2006.229.09:16:11.06#ibcon#about to write, iclass 33, count 2 2006.229.09:16:11.06#ibcon#wrote, iclass 33, count 2 2006.229.09:16:11.06#ibcon#about to read 3, iclass 33, count 2 2006.229.09:16:11.08#ibcon#read 3, iclass 33, count 2 2006.229.09:16:11.09#ibcon#about to read 4, iclass 33, count 2 2006.229.09:16:11.09#ibcon#read 4, iclass 33, count 2 2006.229.09:16:11.09#ibcon#about to read 5, iclass 33, count 2 2006.229.09:16:11.09#ibcon#read 5, iclass 33, count 2 2006.229.09:16:11.09#ibcon#about to read 6, iclass 33, count 2 2006.229.09:16:11.09#ibcon#read 6, iclass 33, count 2 2006.229.09:16:11.09#ibcon#end of sib2, iclass 33, count 2 2006.229.09:16:11.09#ibcon#*after write, iclass 33, count 2 2006.229.09:16:11.09#ibcon#*before return 0, iclass 33, count 2 2006.229.09:16:11.09#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:11.09#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:11.09#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.09:16:11.09#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:11.09#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:11.20#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:11.20#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:11.21#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:16:11.21#ibcon#first serial, iclass 33, count 0 2006.229.09:16:11.21#ibcon#enter sib2, iclass 33, count 0 2006.229.09:16:11.21#ibcon#flushed, iclass 33, count 0 2006.229.09:16:11.21#ibcon#about to write, iclass 33, count 0 2006.229.09:16:11.21#ibcon#wrote, iclass 33, count 0 2006.229.09:16:11.21#ibcon#about to read 3, iclass 33, count 0 2006.229.09:16:11.22#ibcon#read 3, iclass 33, count 0 2006.229.09:16:11.22#ibcon#about to read 4, iclass 33, count 0 2006.229.09:16:11.22#ibcon#read 4, iclass 33, count 0 2006.229.09:16:11.23#ibcon#about to read 5, iclass 33, count 0 2006.229.09:16:11.23#ibcon#read 5, iclass 33, count 0 2006.229.09:16:11.23#ibcon#about to read 6, iclass 33, count 0 2006.229.09:16:11.23#ibcon#read 6, iclass 33, count 0 2006.229.09:16:11.23#ibcon#end of sib2, iclass 33, count 0 2006.229.09:16:11.23#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:16:11.23#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:16:11.23#ibcon#[25=USB\r\n] 2006.229.09:16:11.23#ibcon#*before write, iclass 33, count 0 2006.229.09:16:11.23#ibcon#enter sib2, iclass 33, count 0 2006.229.09:16:11.23#ibcon#flushed, iclass 33, count 0 2006.229.09:16:11.23#ibcon#about to write, iclass 33, count 0 2006.229.09:16:11.23#ibcon#wrote, iclass 33, count 0 2006.229.09:16:11.23#ibcon#about to read 3, iclass 33, count 0 2006.229.09:16:11.25#ibcon#read 3, iclass 33, count 0 2006.229.09:16:11.25#ibcon#about to read 4, iclass 33, count 0 2006.229.09:16:11.25#ibcon#read 4, iclass 33, count 0 2006.229.09:16:11.25#ibcon#about to read 5, iclass 33, count 0 2006.229.09:16:11.26#ibcon#read 5, iclass 33, count 0 2006.229.09:16:11.26#ibcon#about to read 6, iclass 33, count 0 2006.229.09:16:11.26#ibcon#read 6, iclass 33, count 0 2006.229.09:16:11.26#ibcon#end of sib2, iclass 33, count 0 2006.229.09:16:11.26#ibcon#*after write, iclass 33, count 0 2006.229.09:16:11.26#ibcon#*before return 0, iclass 33, count 0 2006.229.09:16:11.26#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:11.26#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:11.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:16:11.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:16:11.26$vck44/valo=7,864.99 2006.229.09:16:11.26#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.09:16:11.26#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.09:16:11.26#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:11.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:11.26#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:11.26#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:11.26#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:16:11.26#ibcon#first serial, iclass 35, count 0 2006.229.09:16:11.26#ibcon#enter sib2, iclass 35, count 0 2006.229.09:16:11.26#ibcon#flushed, iclass 35, count 0 2006.229.09:16:11.26#ibcon#about to write, iclass 35, count 0 2006.229.09:16:11.26#ibcon#wrote, iclass 35, count 0 2006.229.09:16:11.26#ibcon#about to read 3, iclass 35, count 0 2006.229.09:16:11.27#ibcon#read 3, iclass 35, count 0 2006.229.09:16:11.28#ibcon#about to read 4, iclass 35, count 0 2006.229.09:16:11.28#ibcon#read 4, iclass 35, count 0 2006.229.09:16:11.28#ibcon#about to read 5, iclass 35, count 0 2006.229.09:16:11.28#ibcon#read 5, iclass 35, count 0 2006.229.09:16:11.28#ibcon#about to read 6, iclass 35, count 0 2006.229.09:16:11.28#ibcon#read 6, iclass 35, count 0 2006.229.09:16:11.28#ibcon#end of sib2, iclass 35, count 0 2006.229.09:16:11.28#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:16:11.28#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:16:11.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:16:11.28#ibcon#*before write, iclass 35, count 0 2006.229.09:16:11.28#ibcon#enter sib2, iclass 35, count 0 2006.229.09:16:11.28#ibcon#flushed, iclass 35, count 0 2006.229.09:16:11.28#ibcon#about to write, iclass 35, count 0 2006.229.09:16:11.28#ibcon#wrote, iclass 35, count 0 2006.229.09:16:11.28#ibcon#about to read 3, iclass 35, count 0 2006.229.09:16:11.31#ibcon#read 3, iclass 35, count 0 2006.229.09:16:11.32#ibcon#about to read 4, iclass 35, count 0 2006.229.09:16:11.32#ibcon#read 4, iclass 35, count 0 2006.229.09:16:11.32#ibcon#about to read 5, iclass 35, count 0 2006.229.09:16:11.32#ibcon#read 5, iclass 35, count 0 2006.229.09:16:11.32#ibcon#about to read 6, iclass 35, count 0 2006.229.09:16:11.32#ibcon#read 6, iclass 35, count 0 2006.229.09:16:11.32#ibcon#end of sib2, iclass 35, count 0 2006.229.09:16:11.32#ibcon#*after write, iclass 35, count 0 2006.229.09:16:11.32#ibcon#*before return 0, iclass 35, count 0 2006.229.09:16:11.32#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:11.32#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:11.32#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:16:11.32#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:16:11.32$vck44/va=7,5 2006.229.09:16:11.32#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.09:16:11.32#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.09:16:11.32#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:11.32#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:11.37#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:11.37#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:11.38#ibcon#enter wrdev, iclass 37, count 2 2006.229.09:16:11.38#ibcon#first serial, iclass 37, count 2 2006.229.09:16:11.38#ibcon#enter sib2, iclass 37, count 2 2006.229.09:16:11.38#ibcon#flushed, iclass 37, count 2 2006.229.09:16:11.38#ibcon#about to write, iclass 37, count 2 2006.229.09:16:11.38#ibcon#wrote, iclass 37, count 2 2006.229.09:16:11.38#ibcon#about to read 3, iclass 37, count 2 2006.229.09:16:11.39#ibcon#read 3, iclass 37, count 2 2006.229.09:16:11.39#ibcon#about to read 4, iclass 37, count 2 2006.229.09:16:11.40#ibcon#read 4, iclass 37, count 2 2006.229.09:16:11.40#ibcon#about to read 5, iclass 37, count 2 2006.229.09:16:11.40#ibcon#read 5, iclass 37, count 2 2006.229.09:16:11.40#ibcon#about to read 6, iclass 37, count 2 2006.229.09:16:11.40#ibcon#read 6, iclass 37, count 2 2006.229.09:16:11.40#ibcon#end of sib2, iclass 37, count 2 2006.229.09:16:11.40#ibcon#*mode == 0, iclass 37, count 2 2006.229.09:16:11.40#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.09:16:11.40#ibcon#[25=AT07-05\r\n] 2006.229.09:16:11.40#ibcon#*before write, iclass 37, count 2 2006.229.09:16:11.40#ibcon#enter sib2, iclass 37, count 2 2006.229.09:16:11.40#ibcon#flushed, iclass 37, count 2 2006.229.09:16:11.40#ibcon#about to write, iclass 37, count 2 2006.229.09:16:11.40#ibcon#wrote, iclass 37, count 2 2006.229.09:16:11.40#ibcon#about to read 3, iclass 37, count 2 2006.229.09:16:11.42#ibcon#read 3, iclass 37, count 2 2006.229.09:16:11.43#ibcon#about to read 4, iclass 37, count 2 2006.229.09:16:11.43#ibcon#read 4, iclass 37, count 2 2006.229.09:16:11.43#ibcon#about to read 5, iclass 37, count 2 2006.229.09:16:11.43#ibcon#read 5, iclass 37, count 2 2006.229.09:16:11.43#ibcon#about to read 6, iclass 37, count 2 2006.229.09:16:11.43#ibcon#read 6, iclass 37, count 2 2006.229.09:16:11.43#ibcon#end of sib2, iclass 37, count 2 2006.229.09:16:11.43#ibcon#*after write, iclass 37, count 2 2006.229.09:16:11.43#ibcon#*before return 0, iclass 37, count 2 2006.229.09:16:11.43#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:11.43#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:11.43#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.09:16:11.43#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:11.43#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:11.54#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:11.54#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:11.55#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:16:11.55#ibcon#first serial, iclass 37, count 0 2006.229.09:16:11.55#ibcon#enter sib2, iclass 37, count 0 2006.229.09:16:11.55#ibcon#flushed, iclass 37, count 0 2006.229.09:16:11.55#ibcon#about to write, iclass 37, count 0 2006.229.09:16:11.55#ibcon#wrote, iclass 37, count 0 2006.229.09:16:11.55#ibcon#about to read 3, iclass 37, count 0 2006.229.09:16:11.56#ibcon#read 3, iclass 37, count 0 2006.229.09:16:11.57#ibcon#about to read 4, iclass 37, count 0 2006.229.09:16:11.57#ibcon#read 4, iclass 37, count 0 2006.229.09:16:11.57#ibcon#about to read 5, iclass 37, count 0 2006.229.09:16:11.57#ibcon#read 5, iclass 37, count 0 2006.229.09:16:11.57#ibcon#about to read 6, iclass 37, count 0 2006.229.09:16:11.57#ibcon#read 6, iclass 37, count 0 2006.229.09:16:11.57#ibcon#end of sib2, iclass 37, count 0 2006.229.09:16:11.57#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:16:11.57#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:16:11.57#ibcon#[25=USB\r\n] 2006.229.09:16:11.57#ibcon#*before write, iclass 37, count 0 2006.229.09:16:11.57#ibcon#enter sib2, iclass 37, count 0 2006.229.09:16:11.57#ibcon#flushed, iclass 37, count 0 2006.229.09:16:11.57#ibcon#about to write, iclass 37, count 0 2006.229.09:16:11.57#ibcon#wrote, iclass 37, count 0 2006.229.09:16:11.57#ibcon#about to read 3, iclass 37, count 0 2006.229.09:16:11.59#ibcon#read 3, iclass 37, count 0 2006.229.09:16:11.60#ibcon#about to read 4, iclass 37, count 0 2006.229.09:16:11.60#ibcon#read 4, iclass 37, count 0 2006.229.09:16:11.60#ibcon#about to read 5, iclass 37, count 0 2006.229.09:16:11.60#ibcon#read 5, iclass 37, count 0 2006.229.09:16:11.60#ibcon#about to read 6, iclass 37, count 0 2006.229.09:16:11.60#ibcon#read 6, iclass 37, count 0 2006.229.09:16:11.60#ibcon#end of sib2, iclass 37, count 0 2006.229.09:16:11.60#ibcon#*after write, iclass 37, count 0 2006.229.09:16:11.60#ibcon#*before return 0, iclass 37, count 0 2006.229.09:16:11.60#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:11.60#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:11.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:16:11.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:16:11.60$vck44/valo=8,884.99 2006.229.09:16:11.60#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.09:16:11.60#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.09:16:11.60#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:11.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:11.60#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:11.60#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:11.60#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:16:11.60#ibcon#first serial, iclass 39, count 0 2006.229.09:16:11.60#ibcon#enter sib2, iclass 39, count 0 2006.229.09:16:11.60#ibcon#flushed, iclass 39, count 0 2006.229.09:16:11.60#ibcon#about to write, iclass 39, count 0 2006.229.09:16:11.60#ibcon#wrote, iclass 39, count 0 2006.229.09:16:11.60#ibcon#about to read 3, iclass 39, count 0 2006.229.09:16:11.61#ibcon#read 3, iclass 39, count 0 2006.229.09:16:11.62#ibcon#about to read 4, iclass 39, count 0 2006.229.09:16:11.62#ibcon#read 4, iclass 39, count 0 2006.229.09:16:11.62#ibcon#about to read 5, iclass 39, count 0 2006.229.09:16:11.62#ibcon#read 5, iclass 39, count 0 2006.229.09:16:11.62#ibcon#about to read 6, iclass 39, count 0 2006.229.09:16:11.62#ibcon#read 6, iclass 39, count 0 2006.229.09:16:11.62#ibcon#end of sib2, iclass 39, count 0 2006.229.09:16:11.62#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:16:11.62#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:16:11.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:16:11.62#ibcon#*before write, iclass 39, count 0 2006.229.09:16:11.62#ibcon#enter sib2, iclass 39, count 0 2006.229.09:16:11.62#ibcon#flushed, iclass 39, count 0 2006.229.09:16:11.62#ibcon#about to write, iclass 39, count 0 2006.229.09:16:11.62#ibcon#wrote, iclass 39, count 0 2006.229.09:16:11.62#ibcon#about to read 3, iclass 39, count 0 2006.229.09:16:11.65#ibcon#read 3, iclass 39, count 0 2006.229.09:16:11.66#ibcon#about to read 4, iclass 39, count 0 2006.229.09:16:11.66#ibcon#read 4, iclass 39, count 0 2006.229.09:16:11.66#ibcon#about to read 5, iclass 39, count 0 2006.229.09:16:11.66#ibcon#read 5, iclass 39, count 0 2006.229.09:16:11.66#ibcon#about to read 6, iclass 39, count 0 2006.229.09:16:11.66#ibcon#read 6, iclass 39, count 0 2006.229.09:16:11.66#ibcon#end of sib2, iclass 39, count 0 2006.229.09:16:11.66#ibcon#*after write, iclass 39, count 0 2006.229.09:16:11.66#ibcon#*before return 0, iclass 39, count 0 2006.229.09:16:11.66#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:11.66#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:11.66#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:16:11.66#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:16:11.66$vck44/va=8,6 2006.229.09:16:11.66#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.09:16:11.66#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.09:16:11.66#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:11.66#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:16:11.71#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:16:11.71#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:16:11.72#ibcon#enter wrdev, iclass 3, count 2 2006.229.09:16:11.72#ibcon#first serial, iclass 3, count 2 2006.229.09:16:11.72#ibcon#enter sib2, iclass 3, count 2 2006.229.09:16:11.72#ibcon#flushed, iclass 3, count 2 2006.229.09:16:11.72#ibcon#about to write, iclass 3, count 2 2006.229.09:16:11.72#ibcon#wrote, iclass 3, count 2 2006.229.09:16:11.72#ibcon#about to read 3, iclass 3, count 2 2006.229.09:16:11.73#ibcon#read 3, iclass 3, count 2 2006.229.09:16:11.73#ibcon#about to read 4, iclass 3, count 2 2006.229.09:16:11.74#ibcon#read 4, iclass 3, count 2 2006.229.09:16:11.74#ibcon#about to read 5, iclass 3, count 2 2006.229.09:16:11.74#ibcon#read 5, iclass 3, count 2 2006.229.09:16:11.74#ibcon#about to read 6, iclass 3, count 2 2006.229.09:16:11.74#ibcon#read 6, iclass 3, count 2 2006.229.09:16:11.74#ibcon#end of sib2, iclass 3, count 2 2006.229.09:16:11.74#ibcon#*mode == 0, iclass 3, count 2 2006.229.09:16:11.74#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.09:16:11.74#ibcon#[25=AT08-06\r\n] 2006.229.09:16:11.74#ibcon#*before write, iclass 3, count 2 2006.229.09:16:11.74#ibcon#enter sib2, iclass 3, count 2 2006.229.09:16:11.74#ibcon#flushed, iclass 3, count 2 2006.229.09:16:11.74#ibcon#about to write, iclass 3, count 2 2006.229.09:16:11.74#ibcon#wrote, iclass 3, count 2 2006.229.09:16:11.74#ibcon#about to read 3, iclass 3, count 2 2006.229.09:16:11.76#ibcon#read 3, iclass 3, count 2 2006.229.09:16:11.77#ibcon#about to read 4, iclass 3, count 2 2006.229.09:16:11.77#ibcon#read 4, iclass 3, count 2 2006.229.09:16:11.77#ibcon#about to read 5, iclass 3, count 2 2006.229.09:16:11.77#ibcon#read 5, iclass 3, count 2 2006.229.09:16:11.77#ibcon#about to read 6, iclass 3, count 2 2006.229.09:16:11.77#ibcon#read 6, iclass 3, count 2 2006.229.09:16:11.77#ibcon#end of sib2, iclass 3, count 2 2006.229.09:16:11.77#ibcon#*after write, iclass 3, count 2 2006.229.09:16:11.77#ibcon#*before return 0, iclass 3, count 2 2006.229.09:16:11.77#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:16:11.77#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:16:11.77#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.09:16:11.77#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:11.77#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:16:11.88#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:16:11.88#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:16:11.89#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:16:11.89#ibcon#first serial, iclass 3, count 0 2006.229.09:16:11.89#ibcon#enter sib2, iclass 3, count 0 2006.229.09:16:11.89#ibcon#flushed, iclass 3, count 0 2006.229.09:16:11.89#ibcon#about to write, iclass 3, count 0 2006.229.09:16:11.89#ibcon#wrote, iclass 3, count 0 2006.229.09:16:11.89#ibcon#about to read 3, iclass 3, count 0 2006.229.09:16:11.90#ibcon#read 3, iclass 3, count 0 2006.229.09:16:11.90#ibcon#about to read 4, iclass 3, count 0 2006.229.09:16:11.90#ibcon#read 4, iclass 3, count 0 2006.229.09:16:11.91#ibcon#about to read 5, iclass 3, count 0 2006.229.09:16:11.91#ibcon#read 5, iclass 3, count 0 2006.229.09:16:11.91#ibcon#about to read 6, iclass 3, count 0 2006.229.09:16:11.91#ibcon#read 6, iclass 3, count 0 2006.229.09:16:11.91#ibcon#end of sib2, iclass 3, count 0 2006.229.09:16:11.91#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:16:11.91#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:16:11.91#ibcon#[25=USB\r\n] 2006.229.09:16:11.91#ibcon#*before write, iclass 3, count 0 2006.229.09:16:11.91#ibcon#enter sib2, iclass 3, count 0 2006.229.09:16:11.91#ibcon#flushed, iclass 3, count 0 2006.229.09:16:11.91#ibcon#about to write, iclass 3, count 0 2006.229.09:16:11.91#ibcon#wrote, iclass 3, count 0 2006.229.09:16:11.91#ibcon#about to read 3, iclass 3, count 0 2006.229.09:16:11.93#ibcon#read 3, iclass 3, count 0 2006.229.09:16:11.94#ibcon#about to read 4, iclass 3, count 0 2006.229.09:16:11.94#ibcon#read 4, iclass 3, count 0 2006.229.09:16:11.94#ibcon#about to read 5, iclass 3, count 0 2006.229.09:16:11.94#ibcon#read 5, iclass 3, count 0 2006.229.09:16:11.94#ibcon#about to read 6, iclass 3, count 0 2006.229.09:16:11.94#ibcon#read 6, iclass 3, count 0 2006.229.09:16:11.94#ibcon#end of sib2, iclass 3, count 0 2006.229.09:16:11.94#ibcon#*after write, iclass 3, count 0 2006.229.09:16:11.94#ibcon#*before return 0, iclass 3, count 0 2006.229.09:16:11.94#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:16:11.94#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:16:11.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:16:11.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:16:11.94$vck44/vblo=1,629.99 2006.229.09:16:11.94#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.09:16:11.94#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.09:16:11.94#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:11.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:16:11.94#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:16:11.94#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:16:11.94#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:16:11.94#ibcon#first serial, iclass 5, count 0 2006.229.09:16:11.94#ibcon#enter sib2, iclass 5, count 0 2006.229.09:16:11.94#ibcon#flushed, iclass 5, count 0 2006.229.09:16:11.94#ibcon#about to write, iclass 5, count 0 2006.229.09:16:11.94#ibcon#wrote, iclass 5, count 0 2006.229.09:16:11.94#ibcon#about to read 3, iclass 5, count 0 2006.229.09:16:11.95#ibcon#read 3, iclass 5, count 0 2006.229.09:16:11.95#ibcon#about to read 4, iclass 5, count 0 2006.229.09:16:11.96#ibcon#read 4, iclass 5, count 0 2006.229.09:16:11.96#ibcon#about to read 5, iclass 5, count 0 2006.229.09:16:11.96#ibcon#read 5, iclass 5, count 0 2006.229.09:16:11.96#ibcon#about to read 6, iclass 5, count 0 2006.229.09:16:11.96#ibcon#read 6, iclass 5, count 0 2006.229.09:16:11.96#ibcon#end of sib2, iclass 5, count 0 2006.229.09:16:11.96#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:16:11.96#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:16:11.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:16:11.96#ibcon#*before write, iclass 5, count 0 2006.229.09:16:11.96#ibcon#enter sib2, iclass 5, count 0 2006.229.09:16:11.96#ibcon#flushed, iclass 5, count 0 2006.229.09:16:11.96#ibcon#about to write, iclass 5, count 0 2006.229.09:16:11.96#ibcon#wrote, iclass 5, count 0 2006.229.09:16:11.96#ibcon#about to read 3, iclass 5, count 0 2006.229.09:16:11.99#ibcon#read 3, iclass 5, count 0 2006.229.09:16:11.99#ibcon#about to read 4, iclass 5, count 0 2006.229.09:16:11.99#ibcon#read 4, iclass 5, count 0 2006.229.09:16:12.00#ibcon#about to read 5, iclass 5, count 0 2006.229.09:16:12.00#ibcon#read 5, iclass 5, count 0 2006.229.09:16:12.00#ibcon#about to read 6, iclass 5, count 0 2006.229.09:16:12.00#ibcon#read 6, iclass 5, count 0 2006.229.09:16:12.00#ibcon#end of sib2, iclass 5, count 0 2006.229.09:16:12.00#ibcon#*after write, iclass 5, count 0 2006.229.09:16:12.00#ibcon#*before return 0, iclass 5, count 0 2006.229.09:16:12.00#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:16:12.00#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:16:12.00#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:16:12.00#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:16:12.00$vck44/vb=1,4 2006.229.09:16:12.00#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.09:16:12.00#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.09:16:12.00#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:12.00#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:16:12.00#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:16:12.00#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:16:12.00#ibcon#enter wrdev, iclass 7, count 2 2006.229.09:16:12.00#ibcon#first serial, iclass 7, count 2 2006.229.09:16:12.00#ibcon#enter sib2, iclass 7, count 2 2006.229.09:16:12.00#ibcon#flushed, iclass 7, count 2 2006.229.09:16:12.00#ibcon#about to write, iclass 7, count 2 2006.229.09:16:12.00#ibcon#wrote, iclass 7, count 2 2006.229.09:16:12.00#ibcon#about to read 3, iclass 7, count 2 2006.229.09:16:12.01#ibcon#read 3, iclass 7, count 2 2006.229.09:16:12.01#ibcon#about to read 4, iclass 7, count 2 2006.229.09:16:12.02#ibcon#read 4, iclass 7, count 2 2006.229.09:16:12.02#ibcon#about to read 5, iclass 7, count 2 2006.229.09:16:12.02#ibcon#read 5, iclass 7, count 2 2006.229.09:16:12.02#ibcon#about to read 6, iclass 7, count 2 2006.229.09:16:12.02#ibcon#read 6, iclass 7, count 2 2006.229.09:16:12.02#ibcon#end of sib2, iclass 7, count 2 2006.229.09:16:12.02#ibcon#*mode == 0, iclass 7, count 2 2006.229.09:16:12.02#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.09:16:12.02#ibcon#[27=AT01-04\r\n] 2006.229.09:16:12.02#ibcon#*before write, iclass 7, count 2 2006.229.09:16:12.02#ibcon#enter sib2, iclass 7, count 2 2006.229.09:16:12.02#ibcon#flushed, iclass 7, count 2 2006.229.09:16:12.02#ibcon#about to write, iclass 7, count 2 2006.229.09:16:12.02#ibcon#wrote, iclass 7, count 2 2006.229.09:16:12.02#ibcon#about to read 3, iclass 7, count 2 2006.229.09:16:12.04#ibcon#read 3, iclass 7, count 2 2006.229.09:16:12.04#ibcon#about to read 4, iclass 7, count 2 2006.229.09:16:12.05#ibcon#read 4, iclass 7, count 2 2006.229.09:16:12.05#ibcon#about to read 5, iclass 7, count 2 2006.229.09:16:12.05#ibcon#read 5, iclass 7, count 2 2006.229.09:16:12.05#ibcon#about to read 6, iclass 7, count 2 2006.229.09:16:12.05#ibcon#read 6, iclass 7, count 2 2006.229.09:16:12.05#ibcon#end of sib2, iclass 7, count 2 2006.229.09:16:12.05#ibcon#*after write, iclass 7, count 2 2006.229.09:16:12.05#ibcon#*before return 0, iclass 7, count 2 2006.229.09:16:12.05#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:16:12.05#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:16:12.05#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.09:16:12.05#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:12.05#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:16:12.16#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:16:12.16#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:16:12.16#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:16:12.17#ibcon#first serial, iclass 7, count 0 2006.229.09:16:12.17#ibcon#enter sib2, iclass 7, count 0 2006.229.09:16:12.17#ibcon#flushed, iclass 7, count 0 2006.229.09:16:12.17#ibcon#about to write, iclass 7, count 0 2006.229.09:16:12.17#ibcon#wrote, iclass 7, count 0 2006.229.09:16:12.17#ibcon#about to read 3, iclass 7, count 0 2006.229.09:16:12.18#ibcon#read 3, iclass 7, count 0 2006.229.09:16:12.19#ibcon#about to read 4, iclass 7, count 0 2006.229.09:16:12.19#ibcon#read 4, iclass 7, count 0 2006.229.09:16:12.19#ibcon#about to read 5, iclass 7, count 0 2006.229.09:16:12.19#ibcon#read 5, iclass 7, count 0 2006.229.09:16:12.19#ibcon#about to read 6, iclass 7, count 0 2006.229.09:16:12.19#ibcon#read 6, iclass 7, count 0 2006.229.09:16:12.19#ibcon#end of sib2, iclass 7, count 0 2006.229.09:16:12.19#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:16:12.19#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:16:12.19#ibcon#[27=USB\r\n] 2006.229.09:16:12.19#ibcon#*before write, iclass 7, count 0 2006.229.09:16:12.19#ibcon#enter sib2, iclass 7, count 0 2006.229.09:16:12.19#ibcon#flushed, iclass 7, count 0 2006.229.09:16:12.19#ibcon#about to write, iclass 7, count 0 2006.229.09:16:12.19#ibcon#wrote, iclass 7, count 0 2006.229.09:16:12.19#ibcon#about to read 3, iclass 7, count 0 2006.229.09:16:12.21#ibcon#read 3, iclass 7, count 0 2006.229.09:16:12.22#ibcon#about to read 4, iclass 7, count 0 2006.229.09:16:12.22#ibcon#read 4, iclass 7, count 0 2006.229.09:16:12.22#ibcon#about to read 5, iclass 7, count 0 2006.229.09:16:12.22#ibcon#read 5, iclass 7, count 0 2006.229.09:16:12.22#ibcon#about to read 6, iclass 7, count 0 2006.229.09:16:12.22#ibcon#read 6, iclass 7, count 0 2006.229.09:16:12.22#ibcon#end of sib2, iclass 7, count 0 2006.229.09:16:12.22#ibcon#*after write, iclass 7, count 0 2006.229.09:16:12.22#ibcon#*before return 0, iclass 7, count 0 2006.229.09:16:12.22#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:16:12.22#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:16:12.22#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:16:12.22#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:16:12.22$vck44/vblo=2,634.99 2006.229.09:16:12.22#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:16:12.22#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:16:12.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:12.22#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:12.22#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:12.22#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:12.22#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:16:12.22#ibcon#first serial, iclass 11, count 0 2006.229.09:16:12.22#ibcon#enter sib2, iclass 11, count 0 2006.229.09:16:12.22#ibcon#flushed, iclass 11, count 0 2006.229.09:16:12.22#ibcon#about to write, iclass 11, count 0 2006.229.09:16:12.22#ibcon#wrote, iclass 11, count 0 2006.229.09:16:12.22#ibcon#about to read 3, iclass 11, count 0 2006.229.09:16:12.23#ibcon#read 3, iclass 11, count 0 2006.229.09:16:12.23#ibcon#about to read 4, iclass 11, count 0 2006.229.09:16:12.23#ibcon#read 4, iclass 11, count 0 2006.229.09:16:12.24#ibcon#about to read 5, iclass 11, count 0 2006.229.09:16:12.24#ibcon#read 5, iclass 11, count 0 2006.229.09:16:12.24#ibcon#about to read 6, iclass 11, count 0 2006.229.09:16:12.24#ibcon#read 6, iclass 11, count 0 2006.229.09:16:12.24#ibcon#end of sib2, iclass 11, count 0 2006.229.09:16:12.24#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:16:12.24#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:16:12.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:16:12.24#ibcon#*before write, iclass 11, count 0 2006.229.09:16:12.24#ibcon#enter sib2, iclass 11, count 0 2006.229.09:16:12.24#ibcon#flushed, iclass 11, count 0 2006.229.09:16:12.24#ibcon#about to write, iclass 11, count 0 2006.229.09:16:12.24#ibcon#wrote, iclass 11, count 0 2006.229.09:16:12.24#ibcon#about to read 3, iclass 11, count 0 2006.229.09:16:12.27#ibcon#read 3, iclass 11, count 0 2006.229.09:16:12.27#ibcon#about to read 4, iclass 11, count 0 2006.229.09:16:12.28#ibcon#read 4, iclass 11, count 0 2006.229.09:16:12.28#ibcon#about to read 5, iclass 11, count 0 2006.229.09:16:12.28#ibcon#read 5, iclass 11, count 0 2006.229.09:16:12.28#ibcon#about to read 6, iclass 11, count 0 2006.229.09:16:12.28#ibcon#read 6, iclass 11, count 0 2006.229.09:16:12.28#ibcon#end of sib2, iclass 11, count 0 2006.229.09:16:12.28#ibcon#*after write, iclass 11, count 0 2006.229.09:16:12.28#ibcon#*before return 0, iclass 11, count 0 2006.229.09:16:12.28#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:12.28#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:16:12.28#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:16:12.28#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:16:12.28$vck44/vb=2,4 2006.229.09:16:12.28#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.09:16:12.28#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.09:16:12.28#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:12.28#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:12.33#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:12.33#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:12.33#ibcon#enter wrdev, iclass 13, count 2 2006.229.09:16:12.34#ibcon#first serial, iclass 13, count 2 2006.229.09:16:12.34#ibcon#enter sib2, iclass 13, count 2 2006.229.09:16:12.34#ibcon#flushed, iclass 13, count 2 2006.229.09:16:12.34#ibcon#about to write, iclass 13, count 2 2006.229.09:16:12.34#ibcon#wrote, iclass 13, count 2 2006.229.09:16:12.34#ibcon#about to read 3, iclass 13, count 2 2006.229.09:16:12.35#ibcon#read 3, iclass 13, count 2 2006.229.09:16:12.35#ibcon#about to read 4, iclass 13, count 2 2006.229.09:16:12.35#ibcon#read 4, iclass 13, count 2 2006.229.09:16:12.35#ibcon#about to read 5, iclass 13, count 2 2006.229.09:16:12.36#ibcon#read 5, iclass 13, count 2 2006.229.09:16:12.36#ibcon#about to read 6, iclass 13, count 2 2006.229.09:16:12.36#ibcon#read 6, iclass 13, count 2 2006.229.09:16:12.36#ibcon#end of sib2, iclass 13, count 2 2006.229.09:16:12.36#ibcon#*mode == 0, iclass 13, count 2 2006.229.09:16:12.36#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.09:16:12.36#ibcon#[27=AT02-04\r\n] 2006.229.09:16:12.36#ibcon#*before write, iclass 13, count 2 2006.229.09:16:12.36#ibcon#enter sib2, iclass 13, count 2 2006.229.09:16:12.36#ibcon#flushed, iclass 13, count 2 2006.229.09:16:12.36#ibcon#about to write, iclass 13, count 2 2006.229.09:16:12.36#ibcon#wrote, iclass 13, count 2 2006.229.09:16:12.36#ibcon#about to read 3, iclass 13, count 2 2006.229.09:16:12.38#ibcon#read 3, iclass 13, count 2 2006.229.09:16:12.39#ibcon#about to read 4, iclass 13, count 2 2006.229.09:16:12.39#ibcon#read 4, iclass 13, count 2 2006.229.09:16:12.39#ibcon#about to read 5, iclass 13, count 2 2006.229.09:16:12.39#ibcon#read 5, iclass 13, count 2 2006.229.09:16:12.39#ibcon#about to read 6, iclass 13, count 2 2006.229.09:16:12.39#ibcon#read 6, iclass 13, count 2 2006.229.09:16:12.39#ibcon#end of sib2, iclass 13, count 2 2006.229.09:16:12.39#ibcon#*after write, iclass 13, count 2 2006.229.09:16:12.39#ibcon#*before return 0, iclass 13, count 2 2006.229.09:16:12.39#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:12.39#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:16:12.39#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.09:16:12.39#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:12.39#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:12.50#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:12.50#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:12.51#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:16:12.51#ibcon#first serial, iclass 13, count 0 2006.229.09:16:12.51#ibcon#enter sib2, iclass 13, count 0 2006.229.09:16:12.51#ibcon#flushed, iclass 13, count 0 2006.229.09:16:12.51#ibcon#about to write, iclass 13, count 0 2006.229.09:16:12.51#ibcon#wrote, iclass 13, count 0 2006.229.09:16:12.51#ibcon#about to read 3, iclass 13, count 0 2006.229.09:16:12.52#ibcon#read 3, iclass 13, count 0 2006.229.09:16:12.52#ibcon#about to read 4, iclass 13, count 0 2006.229.09:16:12.52#ibcon#read 4, iclass 13, count 0 2006.229.09:16:12.52#ibcon#about to read 5, iclass 13, count 0 2006.229.09:16:12.53#ibcon#read 5, iclass 13, count 0 2006.229.09:16:12.53#ibcon#about to read 6, iclass 13, count 0 2006.229.09:16:12.53#ibcon#read 6, iclass 13, count 0 2006.229.09:16:12.53#ibcon#end of sib2, iclass 13, count 0 2006.229.09:16:12.53#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:16:12.53#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:16:12.53#ibcon#[27=USB\r\n] 2006.229.09:16:12.53#ibcon#*before write, iclass 13, count 0 2006.229.09:16:12.53#ibcon#enter sib2, iclass 13, count 0 2006.229.09:16:12.53#ibcon#flushed, iclass 13, count 0 2006.229.09:16:12.53#ibcon#about to write, iclass 13, count 0 2006.229.09:16:12.53#ibcon#wrote, iclass 13, count 0 2006.229.09:16:12.53#ibcon#about to read 3, iclass 13, count 0 2006.229.09:16:12.55#ibcon#read 3, iclass 13, count 0 2006.229.09:16:12.56#ibcon#about to read 4, iclass 13, count 0 2006.229.09:16:12.56#ibcon#read 4, iclass 13, count 0 2006.229.09:16:12.56#ibcon#about to read 5, iclass 13, count 0 2006.229.09:16:12.56#ibcon#read 5, iclass 13, count 0 2006.229.09:16:12.56#ibcon#about to read 6, iclass 13, count 0 2006.229.09:16:12.56#ibcon#read 6, iclass 13, count 0 2006.229.09:16:12.56#ibcon#end of sib2, iclass 13, count 0 2006.229.09:16:12.56#ibcon#*after write, iclass 13, count 0 2006.229.09:16:12.56#ibcon#*before return 0, iclass 13, count 0 2006.229.09:16:12.56#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:12.56#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:16:12.56#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:16:12.56#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:16:12.56$vck44/vblo=3,649.99 2006.229.09:16:12.56#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.09:16:12.56#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.09:16:12.56#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:12.56#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:12.56#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:12.56#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:12.56#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:16:12.56#ibcon#first serial, iclass 15, count 0 2006.229.09:16:12.56#ibcon#enter sib2, iclass 15, count 0 2006.229.09:16:12.56#ibcon#flushed, iclass 15, count 0 2006.229.09:16:12.56#ibcon#about to write, iclass 15, count 0 2006.229.09:16:12.56#ibcon#wrote, iclass 15, count 0 2006.229.09:16:12.56#ibcon#about to read 3, iclass 15, count 0 2006.229.09:16:12.57#ibcon#read 3, iclass 15, count 0 2006.229.09:16:12.57#ibcon#about to read 4, iclass 15, count 0 2006.229.09:16:12.57#ibcon#read 4, iclass 15, count 0 2006.229.09:16:12.57#ibcon#about to read 5, iclass 15, count 0 2006.229.09:16:12.58#ibcon#read 5, iclass 15, count 0 2006.229.09:16:12.58#ibcon#about to read 6, iclass 15, count 0 2006.229.09:16:12.58#ibcon#read 6, iclass 15, count 0 2006.229.09:16:12.58#ibcon#end of sib2, iclass 15, count 0 2006.229.09:16:12.58#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:16:12.58#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:16:12.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:16:12.58#ibcon#*before write, iclass 15, count 0 2006.229.09:16:12.58#ibcon#enter sib2, iclass 15, count 0 2006.229.09:16:12.58#ibcon#flushed, iclass 15, count 0 2006.229.09:16:12.58#ibcon#about to write, iclass 15, count 0 2006.229.09:16:12.58#ibcon#wrote, iclass 15, count 0 2006.229.09:16:12.58#ibcon#about to read 3, iclass 15, count 0 2006.229.09:16:12.61#ibcon#read 3, iclass 15, count 0 2006.229.09:16:12.62#ibcon#about to read 4, iclass 15, count 0 2006.229.09:16:12.62#ibcon#read 4, iclass 15, count 0 2006.229.09:16:12.62#ibcon#about to read 5, iclass 15, count 0 2006.229.09:16:12.62#ibcon#read 5, iclass 15, count 0 2006.229.09:16:12.62#ibcon#about to read 6, iclass 15, count 0 2006.229.09:16:12.62#ibcon#read 6, iclass 15, count 0 2006.229.09:16:12.62#ibcon#end of sib2, iclass 15, count 0 2006.229.09:16:12.62#ibcon#*after write, iclass 15, count 0 2006.229.09:16:12.62#ibcon#*before return 0, iclass 15, count 0 2006.229.09:16:12.62#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:12.62#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:16:12.62#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:16:12.62#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:16:12.62$vck44/vb=3,4 2006.229.09:16:12.62#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.09:16:12.62#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.09:16:12.62#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:12.62#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:12.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:12.68#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:12.68#ibcon#enter wrdev, iclass 17, count 2 2006.229.09:16:12.68#ibcon#first serial, iclass 17, count 2 2006.229.09:16:12.68#ibcon#enter sib2, iclass 17, count 2 2006.229.09:16:12.68#ibcon#flushed, iclass 17, count 2 2006.229.09:16:12.68#ibcon#about to write, iclass 17, count 2 2006.229.09:16:12.68#ibcon#wrote, iclass 17, count 2 2006.229.09:16:12.68#ibcon#about to read 3, iclass 17, count 2 2006.229.09:16:12.69#ibcon#read 3, iclass 17, count 2 2006.229.09:16:12.70#ibcon#about to read 4, iclass 17, count 2 2006.229.09:16:12.70#ibcon#read 4, iclass 17, count 2 2006.229.09:16:12.70#ibcon#about to read 5, iclass 17, count 2 2006.229.09:16:12.70#ibcon#read 5, iclass 17, count 2 2006.229.09:16:12.70#ibcon#about to read 6, iclass 17, count 2 2006.229.09:16:12.70#ibcon#read 6, iclass 17, count 2 2006.229.09:16:12.70#ibcon#end of sib2, iclass 17, count 2 2006.229.09:16:12.70#ibcon#*mode == 0, iclass 17, count 2 2006.229.09:16:12.70#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.09:16:12.70#ibcon#[27=AT03-04\r\n] 2006.229.09:16:12.70#ibcon#*before write, iclass 17, count 2 2006.229.09:16:12.70#ibcon#enter sib2, iclass 17, count 2 2006.229.09:16:12.70#ibcon#flushed, iclass 17, count 2 2006.229.09:16:12.70#ibcon#about to write, iclass 17, count 2 2006.229.09:16:12.70#ibcon#wrote, iclass 17, count 2 2006.229.09:16:12.70#ibcon#about to read 3, iclass 17, count 2 2006.229.09:16:12.72#ibcon#read 3, iclass 17, count 2 2006.229.09:16:12.73#ibcon#about to read 4, iclass 17, count 2 2006.229.09:16:12.73#ibcon#read 4, iclass 17, count 2 2006.229.09:16:12.73#ibcon#about to read 5, iclass 17, count 2 2006.229.09:16:12.73#ibcon#read 5, iclass 17, count 2 2006.229.09:16:12.73#ibcon#about to read 6, iclass 17, count 2 2006.229.09:16:12.73#ibcon#read 6, iclass 17, count 2 2006.229.09:16:12.73#ibcon#end of sib2, iclass 17, count 2 2006.229.09:16:12.73#ibcon#*after write, iclass 17, count 2 2006.229.09:16:12.73#ibcon#*before return 0, iclass 17, count 2 2006.229.09:16:12.73#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:12.73#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:16:12.73#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.09:16:12.73#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:12.73#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:12.84#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:12.84#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:12.85#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:16:12.85#ibcon#first serial, iclass 17, count 0 2006.229.09:16:12.85#ibcon#enter sib2, iclass 17, count 0 2006.229.09:16:12.85#ibcon#flushed, iclass 17, count 0 2006.229.09:16:12.85#ibcon#about to write, iclass 17, count 0 2006.229.09:16:12.85#ibcon#wrote, iclass 17, count 0 2006.229.09:16:12.85#ibcon#about to read 3, iclass 17, count 0 2006.229.09:16:12.86#ibcon#read 3, iclass 17, count 0 2006.229.09:16:12.86#ibcon#about to read 4, iclass 17, count 0 2006.229.09:16:12.87#ibcon#read 4, iclass 17, count 0 2006.229.09:16:12.87#ibcon#about to read 5, iclass 17, count 0 2006.229.09:16:12.87#ibcon#read 5, iclass 17, count 0 2006.229.09:16:12.87#ibcon#about to read 6, iclass 17, count 0 2006.229.09:16:12.87#ibcon#read 6, iclass 17, count 0 2006.229.09:16:12.87#ibcon#end of sib2, iclass 17, count 0 2006.229.09:16:12.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:16:12.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:16:12.87#ibcon#[27=USB\r\n] 2006.229.09:16:12.87#ibcon#*before write, iclass 17, count 0 2006.229.09:16:12.87#ibcon#enter sib2, iclass 17, count 0 2006.229.09:16:12.87#ibcon#flushed, iclass 17, count 0 2006.229.09:16:12.87#ibcon#about to write, iclass 17, count 0 2006.229.09:16:12.87#ibcon#wrote, iclass 17, count 0 2006.229.09:16:12.87#ibcon#about to read 3, iclass 17, count 0 2006.229.09:16:12.89#ibcon#read 3, iclass 17, count 0 2006.229.09:16:12.90#ibcon#about to read 4, iclass 17, count 0 2006.229.09:16:12.90#ibcon#read 4, iclass 17, count 0 2006.229.09:16:12.90#ibcon#about to read 5, iclass 17, count 0 2006.229.09:16:12.90#ibcon#read 5, iclass 17, count 0 2006.229.09:16:12.90#ibcon#about to read 6, iclass 17, count 0 2006.229.09:16:12.90#ibcon#read 6, iclass 17, count 0 2006.229.09:16:12.90#ibcon#end of sib2, iclass 17, count 0 2006.229.09:16:12.90#ibcon#*after write, iclass 17, count 0 2006.229.09:16:12.90#ibcon#*before return 0, iclass 17, count 0 2006.229.09:16:12.90#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:12.90#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:16:12.90#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:16:12.90#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:16:12.90$vck44/vblo=4,679.99 2006.229.09:16:12.90#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.09:16:12.90#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.09:16:12.90#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:12.90#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:12.90#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:12.90#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:12.90#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:16:12.90#ibcon#first serial, iclass 19, count 0 2006.229.09:16:12.90#ibcon#enter sib2, iclass 19, count 0 2006.229.09:16:12.90#ibcon#flushed, iclass 19, count 0 2006.229.09:16:12.90#ibcon#about to write, iclass 19, count 0 2006.229.09:16:12.90#ibcon#wrote, iclass 19, count 0 2006.229.09:16:12.90#ibcon#about to read 3, iclass 19, count 0 2006.229.09:16:12.91#ibcon#read 3, iclass 19, count 0 2006.229.09:16:12.91#ibcon#about to read 4, iclass 19, count 0 2006.229.09:16:12.92#ibcon#read 4, iclass 19, count 0 2006.229.09:16:12.92#ibcon#about to read 5, iclass 19, count 0 2006.229.09:16:12.92#ibcon#read 5, iclass 19, count 0 2006.229.09:16:12.92#ibcon#about to read 6, iclass 19, count 0 2006.229.09:16:12.92#ibcon#read 6, iclass 19, count 0 2006.229.09:16:12.92#ibcon#end of sib2, iclass 19, count 0 2006.229.09:16:12.92#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:16:12.92#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:16:12.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:16:12.92#ibcon#*before write, iclass 19, count 0 2006.229.09:16:12.92#ibcon#enter sib2, iclass 19, count 0 2006.229.09:16:12.92#ibcon#flushed, iclass 19, count 0 2006.229.09:16:12.92#ibcon#about to write, iclass 19, count 0 2006.229.09:16:12.92#ibcon#wrote, iclass 19, count 0 2006.229.09:16:12.92#ibcon#about to read 3, iclass 19, count 0 2006.229.09:16:12.95#ibcon#read 3, iclass 19, count 0 2006.229.09:16:12.95#ibcon#about to read 4, iclass 19, count 0 2006.229.09:16:12.96#ibcon#read 4, iclass 19, count 0 2006.229.09:16:12.96#ibcon#about to read 5, iclass 19, count 0 2006.229.09:16:12.96#ibcon#read 5, iclass 19, count 0 2006.229.09:16:12.96#ibcon#about to read 6, iclass 19, count 0 2006.229.09:16:12.96#ibcon#read 6, iclass 19, count 0 2006.229.09:16:12.96#ibcon#end of sib2, iclass 19, count 0 2006.229.09:16:12.96#ibcon#*after write, iclass 19, count 0 2006.229.09:16:12.96#ibcon#*before return 0, iclass 19, count 0 2006.229.09:16:12.96#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:12.96#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:16:12.96#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:16:12.96#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:16:12.96$vck44/vb=4,4 2006.229.09:16:12.96#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.09:16:12.96#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.09:16:12.96#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:12.96#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:13.01#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:13.02#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:13.02#ibcon#enter wrdev, iclass 21, count 2 2006.229.09:16:13.02#ibcon#first serial, iclass 21, count 2 2006.229.09:16:13.02#ibcon#enter sib2, iclass 21, count 2 2006.229.09:16:13.02#ibcon#flushed, iclass 21, count 2 2006.229.09:16:13.02#ibcon#about to write, iclass 21, count 2 2006.229.09:16:13.02#ibcon#wrote, iclass 21, count 2 2006.229.09:16:13.02#ibcon#about to read 3, iclass 21, count 2 2006.229.09:16:13.03#ibcon#read 3, iclass 21, count 2 2006.229.09:16:13.03#ibcon#about to read 4, iclass 21, count 2 2006.229.09:16:13.03#ibcon#read 4, iclass 21, count 2 2006.229.09:16:13.03#ibcon#about to read 5, iclass 21, count 2 2006.229.09:16:13.04#ibcon#read 5, iclass 21, count 2 2006.229.09:16:13.04#ibcon#about to read 6, iclass 21, count 2 2006.229.09:16:13.04#ibcon#read 6, iclass 21, count 2 2006.229.09:16:13.04#ibcon#end of sib2, iclass 21, count 2 2006.229.09:16:13.04#ibcon#*mode == 0, iclass 21, count 2 2006.229.09:16:13.04#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.09:16:13.04#ibcon#[27=AT04-04\r\n] 2006.229.09:16:13.04#ibcon#*before write, iclass 21, count 2 2006.229.09:16:13.04#ibcon#enter sib2, iclass 21, count 2 2006.229.09:16:13.04#ibcon#flushed, iclass 21, count 2 2006.229.09:16:13.04#ibcon#about to write, iclass 21, count 2 2006.229.09:16:13.04#ibcon#wrote, iclass 21, count 2 2006.229.09:16:13.04#ibcon#about to read 3, iclass 21, count 2 2006.229.09:16:13.06#ibcon#read 3, iclass 21, count 2 2006.229.09:16:13.06#ibcon#about to read 4, iclass 21, count 2 2006.229.09:16:13.06#ibcon#read 4, iclass 21, count 2 2006.229.09:16:13.07#ibcon#about to read 5, iclass 21, count 2 2006.229.09:16:13.07#ibcon#read 5, iclass 21, count 2 2006.229.09:16:13.07#ibcon#about to read 6, iclass 21, count 2 2006.229.09:16:13.07#ibcon#read 6, iclass 21, count 2 2006.229.09:16:13.07#ibcon#end of sib2, iclass 21, count 2 2006.229.09:16:13.07#ibcon#*after write, iclass 21, count 2 2006.229.09:16:13.07#ibcon#*before return 0, iclass 21, count 2 2006.229.09:16:13.07#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:13.07#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:16:13.07#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.09:16:13.07#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:13.07#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:13.18#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:13.18#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:13.18#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:16:13.19#ibcon#first serial, iclass 21, count 0 2006.229.09:16:13.19#ibcon#enter sib2, iclass 21, count 0 2006.229.09:16:13.19#ibcon#flushed, iclass 21, count 0 2006.229.09:16:13.19#ibcon#about to write, iclass 21, count 0 2006.229.09:16:13.19#ibcon#wrote, iclass 21, count 0 2006.229.09:16:13.19#ibcon#about to read 3, iclass 21, count 0 2006.229.09:16:13.20#ibcon#read 3, iclass 21, count 0 2006.229.09:16:13.20#ibcon#about to read 4, iclass 21, count 0 2006.229.09:16:13.20#ibcon#read 4, iclass 21, count 0 2006.229.09:16:13.21#ibcon#about to read 5, iclass 21, count 0 2006.229.09:16:13.21#ibcon#read 5, iclass 21, count 0 2006.229.09:16:13.21#ibcon#about to read 6, iclass 21, count 0 2006.229.09:16:13.21#ibcon#read 6, iclass 21, count 0 2006.229.09:16:13.21#ibcon#end of sib2, iclass 21, count 0 2006.229.09:16:13.21#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:16:13.21#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:16:13.21#ibcon#[27=USB\r\n] 2006.229.09:16:13.21#ibcon#*before write, iclass 21, count 0 2006.229.09:16:13.21#ibcon#enter sib2, iclass 21, count 0 2006.229.09:16:13.21#ibcon#flushed, iclass 21, count 0 2006.229.09:16:13.21#ibcon#about to write, iclass 21, count 0 2006.229.09:16:13.21#ibcon#wrote, iclass 21, count 0 2006.229.09:16:13.21#ibcon#about to read 3, iclass 21, count 0 2006.229.09:16:13.23#ibcon#read 3, iclass 21, count 0 2006.229.09:16:13.23#ibcon#about to read 4, iclass 21, count 0 2006.229.09:16:13.23#ibcon#read 4, iclass 21, count 0 2006.229.09:16:13.23#ibcon#about to read 5, iclass 21, count 0 2006.229.09:16:13.23#ibcon#read 5, iclass 21, count 0 2006.229.09:16:13.24#ibcon#about to read 6, iclass 21, count 0 2006.229.09:16:13.24#ibcon#read 6, iclass 21, count 0 2006.229.09:16:13.24#ibcon#end of sib2, iclass 21, count 0 2006.229.09:16:13.24#ibcon#*after write, iclass 21, count 0 2006.229.09:16:13.24#ibcon#*before return 0, iclass 21, count 0 2006.229.09:16:13.24#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:13.24#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:16:13.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:16:13.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:16:13.24$vck44/vblo=5,709.99 2006.229.09:16:13.24#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.09:16:13.24#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.09:16:13.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:13.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:13.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:13.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:13.24#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:16:13.24#ibcon#first serial, iclass 23, count 0 2006.229.09:16:13.24#ibcon#enter sib2, iclass 23, count 0 2006.229.09:16:13.24#ibcon#flushed, iclass 23, count 0 2006.229.09:16:13.24#ibcon#about to write, iclass 23, count 0 2006.229.09:16:13.24#ibcon#wrote, iclass 23, count 0 2006.229.09:16:13.24#ibcon#about to read 3, iclass 23, count 0 2006.229.09:16:13.25#ibcon#read 3, iclass 23, count 0 2006.229.09:16:13.26#ibcon#about to read 4, iclass 23, count 0 2006.229.09:16:13.26#ibcon#read 4, iclass 23, count 0 2006.229.09:16:13.26#ibcon#about to read 5, iclass 23, count 0 2006.229.09:16:13.26#ibcon#read 5, iclass 23, count 0 2006.229.09:16:13.26#ibcon#about to read 6, iclass 23, count 0 2006.229.09:16:13.26#ibcon#read 6, iclass 23, count 0 2006.229.09:16:13.26#ibcon#end of sib2, iclass 23, count 0 2006.229.09:16:13.26#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:16:13.26#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:16:13.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:16:13.26#ibcon#*before write, iclass 23, count 0 2006.229.09:16:13.26#ibcon#enter sib2, iclass 23, count 0 2006.229.09:16:13.26#ibcon#flushed, iclass 23, count 0 2006.229.09:16:13.26#ibcon#about to write, iclass 23, count 0 2006.229.09:16:13.26#ibcon#wrote, iclass 23, count 0 2006.229.09:16:13.26#ibcon#about to read 3, iclass 23, count 0 2006.229.09:16:13.29#ibcon#read 3, iclass 23, count 0 2006.229.09:16:13.29#ibcon#about to read 4, iclass 23, count 0 2006.229.09:16:13.30#ibcon#read 4, iclass 23, count 0 2006.229.09:16:13.30#ibcon#about to read 5, iclass 23, count 0 2006.229.09:16:13.30#ibcon#read 5, iclass 23, count 0 2006.229.09:16:13.30#ibcon#about to read 6, iclass 23, count 0 2006.229.09:16:13.30#ibcon#read 6, iclass 23, count 0 2006.229.09:16:13.30#ibcon#end of sib2, iclass 23, count 0 2006.229.09:16:13.30#ibcon#*after write, iclass 23, count 0 2006.229.09:16:13.30#ibcon#*before return 0, iclass 23, count 0 2006.229.09:16:13.30#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:13.30#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:16:13.30#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:16:13.30#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:16:13.30$vck44/vb=5,4 2006.229.09:16:13.30#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.09:16:13.30#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.09:16:13.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:13.30#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:13.35#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:13.35#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:13.35#ibcon#enter wrdev, iclass 25, count 2 2006.229.09:16:13.36#ibcon#first serial, iclass 25, count 2 2006.229.09:16:13.36#ibcon#enter sib2, iclass 25, count 2 2006.229.09:16:13.36#ibcon#flushed, iclass 25, count 2 2006.229.09:16:13.36#ibcon#about to write, iclass 25, count 2 2006.229.09:16:13.36#ibcon#wrote, iclass 25, count 2 2006.229.09:16:13.36#ibcon#about to read 3, iclass 25, count 2 2006.229.09:16:13.37#ibcon#read 3, iclass 25, count 2 2006.229.09:16:13.37#ibcon#about to read 4, iclass 25, count 2 2006.229.09:16:13.37#ibcon#read 4, iclass 25, count 2 2006.229.09:16:13.37#ibcon#about to read 5, iclass 25, count 2 2006.229.09:16:13.38#ibcon#read 5, iclass 25, count 2 2006.229.09:16:13.38#ibcon#about to read 6, iclass 25, count 2 2006.229.09:16:13.38#ibcon#read 6, iclass 25, count 2 2006.229.09:16:13.38#ibcon#end of sib2, iclass 25, count 2 2006.229.09:16:13.38#ibcon#*mode == 0, iclass 25, count 2 2006.229.09:16:13.38#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.09:16:13.38#ibcon#[27=AT05-04\r\n] 2006.229.09:16:13.38#ibcon#*before write, iclass 25, count 2 2006.229.09:16:13.38#ibcon#enter sib2, iclass 25, count 2 2006.229.09:16:13.38#ibcon#flushed, iclass 25, count 2 2006.229.09:16:13.38#ibcon#about to write, iclass 25, count 2 2006.229.09:16:13.38#ibcon#wrote, iclass 25, count 2 2006.229.09:16:13.38#ibcon#about to read 3, iclass 25, count 2 2006.229.09:16:13.40#ibcon#read 3, iclass 25, count 2 2006.229.09:16:13.40#ibcon#about to read 4, iclass 25, count 2 2006.229.09:16:13.40#ibcon#read 4, iclass 25, count 2 2006.229.09:16:13.40#ibcon#about to read 5, iclass 25, count 2 2006.229.09:16:13.40#ibcon#read 5, iclass 25, count 2 2006.229.09:16:13.41#ibcon#about to read 6, iclass 25, count 2 2006.229.09:16:13.41#ibcon#read 6, iclass 25, count 2 2006.229.09:16:13.41#ibcon#end of sib2, iclass 25, count 2 2006.229.09:16:13.41#ibcon#*after write, iclass 25, count 2 2006.229.09:16:13.41#ibcon#*before return 0, iclass 25, count 2 2006.229.09:16:13.41#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:13.41#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:16:13.41#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.09:16:13.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:13.41#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:13.52#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:13.52#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:13.52#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:16:13.53#ibcon#first serial, iclass 25, count 0 2006.229.09:16:13.53#ibcon#enter sib2, iclass 25, count 0 2006.229.09:16:13.53#ibcon#flushed, iclass 25, count 0 2006.229.09:16:13.53#ibcon#about to write, iclass 25, count 0 2006.229.09:16:13.53#ibcon#wrote, iclass 25, count 0 2006.229.09:16:13.53#ibcon#about to read 3, iclass 25, count 0 2006.229.09:16:13.54#ibcon#read 3, iclass 25, count 0 2006.229.09:16:13.54#ibcon#about to read 4, iclass 25, count 0 2006.229.09:16:13.55#ibcon#read 4, iclass 25, count 0 2006.229.09:16:13.55#ibcon#about to read 5, iclass 25, count 0 2006.229.09:16:13.55#ibcon#read 5, iclass 25, count 0 2006.229.09:16:13.55#ibcon#about to read 6, iclass 25, count 0 2006.229.09:16:13.55#ibcon#read 6, iclass 25, count 0 2006.229.09:16:13.55#ibcon#end of sib2, iclass 25, count 0 2006.229.09:16:13.55#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:16:13.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:16:13.55#ibcon#[27=USB\r\n] 2006.229.09:16:13.55#ibcon#*before write, iclass 25, count 0 2006.229.09:16:13.55#ibcon#enter sib2, iclass 25, count 0 2006.229.09:16:13.55#ibcon#flushed, iclass 25, count 0 2006.229.09:16:13.55#ibcon#about to write, iclass 25, count 0 2006.229.09:16:13.55#ibcon#wrote, iclass 25, count 0 2006.229.09:16:13.55#ibcon#about to read 3, iclass 25, count 0 2006.229.09:16:13.57#ibcon#read 3, iclass 25, count 0 2006.229.09:16:13.58#ibcon#about to read 4, iclass 25, count 0 2006.229.09:16:13.58#ibcon#read 4, iclass 25, count 0 2006.229.09:16:13.58#ibcon#about to read 5, iclass 25, count 0 2006.229.09:16:13.58#ibcon#read 5, iclass 25, count 0 2006.229.09:16:13.58#ibcon#about to read 6, iclass 25, count 0 2006.229.09:16:13.58#ibcon#read 6, iclass 25, count 0 2006.229.09:16:13.58#ibcon#end of sib2, iclass 25, count 0 2006.229.09:16:13.58#ibcon#*after write, iclass 25, count 0 2006.229.09:16:13.58#ibcon#*before return 0, iclass 25, count 0 2006.229.09:16:13.58#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:13.58#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:16:13.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:16:13.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:16:13.58$vck44/vblo=6,719.99 2006.229.09:16:13.58#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.09:16:13.58#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.09:16:13.58#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:13.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:13.58#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:13.58#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:13.58#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:16:13.58#ibcon#first serial, iclass 27, count 0 2006.229.09:16:13.58#ibcon#enter sib2, iclass 27, count 0 2006.229.09:16:13.58#ibcon#flushed, iclass 27, count 0 2006.229.09:16:13.58#ibcon#about to write, iclass 27, count 0 2006.229.09:16:13.58#ibcon#wrote, iclass 27, count 0 2006.229.09:16:13.58#ibcon#about to read 3, iclass 27, count 0 2006.229.09:16:13.59#ibcon#read 3, iclass 27, count 0 2006.229.09:16:13.60#ibcon#about to read 4, iclass 27, count 0 2006.229.09:16:13.60#ibcon#read 4, iclass 27, count 0 2006.229.09:16:13.60#ibcon#about to read 5, iclass 27, count 0 2006.229.09:16:13.60#ibcon#read 5, iclass 27, count 0 2006.229.09:16:13.60#ibcon#about to read 6, iclass 27, count 0 2006.229.09:16:13.60#ibcon#read 6, iclass 27, count 0 2006.229.09:16:13.60#ibcon#end of sib2, iclass 27, count 0 2006.229.09:16:13.60#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:16:13.60#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:16:13.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:16:13.60#ibcon#*before write, iclass 27, count 0 2006.229.09:16:13.60#ibcon#enter sib2, iclass 27, count 0 2006.229.09:16:13.60#ibcon#flushed, iclass 27, count 0 2006.229.09:16:13.60#ibcon#about to write, iclass 27, count 0 2006.229.09:16:13.60#ibcon#wrote, iclass 27, count 0 2006.229.09:16:13.60#ibcon#about to read 3, iclass 27, count 0 2006.229.09:16:13.63#ibcon#read 3, iclass 27, count 0 2006.229.09:16:13.64#ibcon#about to read 4, iclass 27, count 0 2006.229.09:16:13.64#ibcon#read 4, iclass 27, count 0 2006.229.09:16:13.64#ibcon#about to read 5, iclass 27, count 0 2006.229.09:16:13.64#ibcon#read 5, iclass 27, count 0 2006.229.09:16:13.64#ibcon#about to read 6, iclass 27, count 0 2006.229.09:16:13.64#ibcon#read 6, iclass 27, count 0 2006.229.09:16:13.64#ibcon#end of sib2, iclass 27, count 0 2006.229.09:16:13.64#ibcon#*after write, iclass 27, count 0 2006.229.09:16:13.64#ibcon#*before return 0, iclass 27, count 0 2006.229.09:16:13.64#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:13.64#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:16:13.64#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:16:13.64#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:16:13.64$vck44/vb=6,4 2006.229.09:16:13.64#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.09:16:13.64#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.09:16:13.64#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:13.64#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:13.69#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:13.69#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:13.69#ibcon#enter wrdev, iclass 29, count 2 2006.229.09:16:13.70#ibcon#first serial, iclass 29, count 2 2006.229.09:16:13.70#ibcon#enter sib2, iclass 29, count 2 2006.229.09:16:13.70#ibcon#flushed, iclass 29, count 2 2006.229.09:16:13.70#ibcon#about to write, iclass 29, count 2 2006.229.09:16:13.70#ibcon#wrote, iclass 29, count 2 2006.229.09:16:13.70#ibcon#about to read 3, iclass 29, count 2 2006.229.09:16:13.71#ibcon#read 3, iclass 29, count 2 2006.229.09:16:13.72#ibcon#about to read 4, iclass 29, count 2 2006.229.09:16:13.72#ibcon#read 4, iclass 29, count 2 2006.229.09:16:13.72#ibcon#about to read 5, iclass 29, count 2 2006.229.09:16:13.72#ibcon#read 5, iclass 29, count 2 2006.229.09:16:13.72#ibcon#about to read 6, iclass 29, count 2 2006.229.09:16:13.72#ibcon#read 6, iclass 29, count 2 2006.229.09:16:13.72#ibcon#end of sib2, iclass 29, count 2 2006.229.09:16:13.72#ibcon#*mode == 0, iclass 29, count 2 2006.229.09:16:13.72#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.09:16:13.72#ibcon#[27=AT06-04\r\n] 2006.229.09:16:13.72#ibcon#*before write, iclass 29, count 2 2006.229.09:16:13.72#ibcon#enter sib2, iclass 29, count 2 2006.229.09:16:13.72#ibcon#flushed, iclass 29, count 2 2006.229.09:16:13.72#ibcon#about to write, iclass 29, count 2 2006.229.09:16:13.72#ibcon#wrote, iclass 29, count 2 2006.229.09:16:13.72#ibcon#about to read 3, iclass 29, count 2 2006.229.09:16:13.74#ibcon#read 3, iclass 29, count 2 2006.229.09:16:13.74#ibcon#about to read 4, iclass 29, count 2 2006.229.09:16:13.75#ibcon#read 4, iclass 29, count 2 2006.229.09:16:13.75#ibcon#about to read 5, iclass 29, count 2 2006.229.09:16:13.75#ibcon#read 5, iclass 29, count 2 2006.229.09:16:13.75#ibcon#about to read 6, iclass 29, count 2 2006.229.09:16:13.75#ibcon#read 6, iclass 29, count 2 2006.229.09:16:13.75#ibcon#end of sib2, iclass 29, count 2 2006.229.09:16:13.75#ibcon#*after write, iclass 29, count 2 2006.229.09:16:13.75#ibcon#*before return 0, iclass 29, count 2 2006.229.09:16:13.75#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:13.75#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:16:13.75#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.09:16:13.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:13.75#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:13.86#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:13.86#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:13.87#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:16:13.87#ibcon#first serial, iclass 29, count 0 2006.229.09:16:13.87#ibcon#enter sib2, iclass 29, count 0 2006.229.09:16:13.87#ibcon#flushed, iclass 29, count 0 2006.229.09:16:13.87#ibcon#about to write, iclass 29, count 0 2006.229.09:16:13.87#ibcon#wrote, iclass 29, count 0 2006.229.09:16:13.87#ibcon#about to read 3, iclass 29, count 0 2006.229.09:16:13.88#ibcon#read 3, iclass 29, count 0 2006.229.09:16:13.88#ibcon#about to read 4, iclass 29, count 0 2006.229.09:16:13.89#ibcon#read 4, iclass 29, count 0 2006.229.09:16:13.89#ibcon#about to read 5, iclass 29, count 0 2006.229.09:16:13.89#ibcon#read 5, iclass 29, count 0 2006.229.09:16:13.89#ibcon#about to read 6, iclass 29, count 0 2006.229.09:16:13.89#ibcon#read 6, iclass 29, count 0 2006.229.09:16:13.89#ibcon#end of sib2, iclass 29, count 0 2006.229.09:16:13.89#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:16:13.89#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:16:13.89#ibcon#[27=USB\r\n] 2006.229.09:16:13.89#ibcon#*before write, iclass 29, count 0 2006.229.09:16:13.89#ibcon#enter sib2, iclass 29, count 0 2006.229.09:16:13.89#ibcon#flushed, iclass 29, count 0 2006.229.09:16:13.89#ibcon#about to write, iclass 29, count 0 2006.229.09:16:13.89#ibcon#wrote, iclass 29, count 0 2006.229.09:16:13.89#ibcon#about to read 3, iclass 29, count 0 2006.229.09:16:13.91#ibcon#read 3, iclass 29, count 0 2006.229.09:16:13.92#ibcon#about to read 4, iclass 29, count 0 2006.229.09:16:13.92#ibcon#read 4, iclass 29, count 0 2006.229.09:16:13.92#ibcon#about to read 5, iclass 29, count 0 2006.229.09:16:13.92#ibcon#read 5, iclass 29, count 0 2006.229.09:16:13.92#ibcon#about to read 6, iclass 29, count 0 2006.229.09:16:13.92#ibcon#read 6, iclass 29, count 0 2006.229.09:16:13.92#ibcon#end of sib2, iclass 29, count 0 2006.229.09:16:13.92#ibcon#*after write, iclass 29, count 0 2006.229.09:16:13.92#ibcon#*before return 0, iclass 29, count 0 2006.229.09:16:13.92#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:13.92#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:16:13.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:16:13.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:16:13.92$vck44/vblo=7,734.99 2006.229.09:16:13.92#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.09:16:13.92#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.09:16:13.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:13.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:13.92#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:13.92#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:13.92#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:16:13.92#ibcon#first serial, iclass 31, count 0 2006.229.09:16:13.92#ibcon#enter sib2, iclass 31, count 0 2006.229.09:16:13.92#ibcon#flushed, iclass 31, count 0 2006.229.09:16:13.92#ibcon#about to write, iclass 31, count 0 2006.229.09:16:13.92#ibcon#wrote, iclass 31, count 0 2006.229.09:16:13.92#ibcon#about to read 3, iclass 31, count 0 2006.229.09:16:13.93#ibcon#read 3, iclass 31, count 0 2006.229.09:16:13.93#ibcon#about to read 4, iclass 31, count 0 2006.229.09:16:13.93#ibcon#read 4, iclass 31, count 0 2006.229.09:16:13.94#ibcon#about to read 5, iclass 31, count 0 2006.229.09:16:13.94#ibcon#read 5, iclass 31, count 0 2006.229.09:16:13.94#ibcon#about to read 6, iclass 31, count 0 2006.229.09:16:13.94#ibcon#read 6, iclass 31, count 0 2006.229.09:16:13.94#ibcon#end of sib2, iclass 31, count 0 2006.229.09:16:13.94#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:16:13.94#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:16:13.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:16:13.94#ibcon#*before write, iclass 31, count 0 2006.229.09:16:13.94#ibcon#enter sib2, iclass 31, count 0 2006.229.09:16:13.94#ibcon#flushed, iclass 31, count 0 2006.229.09:16:13.94#ibcon#about to write, iclass 31, count 0 2006.229.09:16:13.94#ibcon#wrote, iclass 31, count 0 2006.229.09:16:13.94#ibcon#about to read 3, iclass 31, count 0 2006.229.09:16:13.97#ibcon#read 3, iclass 31, count 0 2006.229.09:16:13.98#ibcon#about to read 4, iclass 31, count 0 2006.229.09:16:13.98#ibcon#read 4, iclass 31, count 0 2006.229.09:16:13.98#ibcon#about to read 5, iclass 31, count 0 2006.229.09:16:13.98#ibcon#read 5, iclass 31, count 0 2006.229.09:16:13.98#ibcon#about to read 6, iclass 31, count 0 2006.229.09:16:13.98#ibcon#read 6, iclass 31, count 0 2006.229.09:16:13.98#ibcon#end of sib2, iclass 31, count 0 2006.229.09:16:13.98#ibcon#*after write, iclass 31, count 0 2006.229.09:16:13.98#ibcon#*before return 0, iclass 31, count 0 2006.229.09:16:13.98#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:13.98#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:16:13.98#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:16:13.98#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:16:13.98$vck44/vb=7,4 2006.229.09:16:13.98#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.09:16:13.98#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.09:16:13.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:13.98#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:14.04#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:14.04#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:14.04#ibcon#enter wrdev, iclass 33, count 2 2006.229.09:16:14.04#ibcon#first serial, iclass 33, count 2 2006.229.09:16:14.04#ibcon#enter sib2, iclass 33, count 2 2006.229.09:16:14.04#ibcon#flushed, iclass 33, count 2 2006.229.09:16:14.04#ibcon#about to write, iclass 33, count 2 2006.229.09:16:14.04#ibcon#wrote, iclass 33, count 2 2006.229.09:16:14.04#ibcon#about to read 3, iclass 33, count 2 2006.229.09:16:14.05#ibcon#read 3, iclass 33, count 2 2006.229.09:16:14.05#ibcon#about to read 4, iclass 33, count 2 2006.229.09:16:14.05#ibcon#read 4, iclass 33, count 2 2006.229.09:16:14.05#ibcon#about to read 5, iclass 33, count 2 2006.229.09:16:14.05#ibcon#read 5, iclass 33, count 2 2006.229.09:16:14.06#ibcon#about to read 6, iclass 33, count 2 2006.229.09:16:14.06#ibcon#read 6, iclass 33, count 2 2006.229.09:16:14.06#ibcon#end of sib2, iclass 33, count 2 2006.229.09:16:14.06#ibcon#*mode == 0, iclass 33, count 2 2006.229.09:16:14.06#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.09:16:14.06#ibcon#[27=AT07-04\r\n] 2006.229.09:16:14.06#ibcon#*before write, iclass 33, count 2 2006.229.09:16:14.06#ibcon#enter sib2, iclass 33, count 2 2006.229.09:16:14.06#ibcon#flushed, iclass 33, count 2 2006.229.09:16:14.06#ibcon#about to write, iclass 33, count 2 2006.229.09:16:14.06#ibcon#wrote, iclass 33, count 2 2006.229.09:16:14.06#ibcon#about to read 3, iclass 33, count 2 2006.229.09:16:14.08#ibcon#read 3, iclass 33, count 2 2006.229.09:16:14.08#ibcon#about to read 4, iclass 33, count 2 2006.229.09:16:14.08#ibcon#read 4, iclass 33, count 2 2006.229.09:16:14.09#ibcon#about to read 5, iclass 33, count 2 2006.229.09:16:14.09#ibcon#read 5, iclass 33, count 2 2006.229.09:16:14.09#ibcon#about to read 6, iclass 33, count 2 2006.229.09:16:14.09#ibcon#read 6, iclass 33, count 2 2006.229.09:16:14.09#ibcon#end of sib2, iclass 33, count 2 2006.229.09:16:14.09#ibcon#*after write, iclass 33, count 2 2006.229.09:16:14.09#ibcon#*before return 0, iclass 33, count 2 2006.229.09:16:14.09#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:14.09#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:16:14.09#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.09:16:14.09#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:14.09#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:14.20#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:14.20#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:14.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:16:14.21#ibcon#first serial, iclass 33, count 0 2006.229.09:16:14.21#ibcon#enter sib2, iclass 33, count 0 2006.229.09:16:14.21#ibcon#flushed, iclass 33, count 0 2006.229.09:16:14.21#ibcon#about to write, iclass 33, count 0 2006.229.09:16:14.21#ibcon#wrote, iclass 33, count 0 2006.229.09:16:14.21#ibcon#about to read 3, iclass 33, count 0 2006.229.09:16:14.22#ibcon#read 3, iclass 33, count 0 2006.229.09:16:14.22#ibcon#about to read 4, iclass 33, count 0 2006.229.09:16:14.22#ibcon#read 4, iclass 33, count 0 2006.229.09:16:14.22#ibcon#about to read 5, iclass 33, count 0 2006.229.09:16:14.23#ibcon#read 5, iclass 33, count 0 2006.229.09:16:14.23#ibcon#about to read 6, iclass 33, count 0 2006.229.09:16:14.23#ibcon#read 6, iclass 33, count 0 2006.229.09:16:14.23#ibcon#end of sib2, iclass 33, count 0 2006.229.09:16:14.23#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:16:14.23#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:16:14.23#ibcon#[27=USB\r\n] 2006.229.09:16:14.23#ibcon#*before write, iclass 33, count 0 2006.229.09:16:14.23#ibcon#enter sib2, iclass 33, count 0 2006.229.09:16:14.23#ibcon#flushed, iclass 33, count 0 2006.229.09:16:14.23#ibcon#about to write, iclass 33, count 0 2006.229.09:16:14.23#ibcon#wrote, iclass 33, count 0 2006.229.09:16:14.23#ibcon#about to read 3, iclass 33, count 0 2006.229.09:16:14.25#ibcon#read 3, iclass 33, count 0 2006.229.09:16:14.25#ibcon#about to read 4, iclass 33, count 0 2006.229.09:16:14.25#ibcon#read 4, iclass 33, count 0 2006.229.09:16:14.26#ibcon#about to read 5, iclass 33, count 0 2006.229.09:16:14.26#ibcon#read 5, iclass 33, count 0 2006.229.09:16:14.26#ibcon#about to read 6, iclass 33, count 0 2006.229.09:16:14.26#ibcon#read 6, iclass 33, count 0 2006.229.09:16:14.26#ibcon#end of sib2, iclass 33, count 0 2006.229.09:16:14.26#ibcon#*after write, iclass 33, count 0 2006.229.09:16:14.26#ibcon#*before return 0, iclass 33, count 0 2006.229.09:16:14.26#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:14.26#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:16:14.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:16:14.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:16:14.26$vck44/vblo=8,744.99 2006.229.09:16:14.26#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.09:16:14.26#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.09:16:14.26#ibcon#ireg 17 cls_cnt 0 2006.229.09:16:14.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:14.26#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:14.26#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:14.26#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:16:14.26#ibcon#first serial, iclass 35, count 0 2006.229.09:16:14.26#ibcon#enter sib2, iclass 35, count 0 2006.229.09:16:14.26#ibcon#flushed, iclass 35, count 0 2006.229.09:16:14.26#ibcon#about to write, iclass 35, count 0 2006.229.09:16:14.26#ibcon#wrote, iclass 35, count 0 2006.229.09:16:14.26#ibcon#about to read 3, iclass 35, count 0 2006.229.09:16:14.27#ibcon#read 3, iclass 35, count 0 2006.229.09:16:14.28#ibcon#about to read 4, iclass 35, count 0 2006.229.09:16:14.28#ibcon#read 4, iclass 35, count 0 2006.229.09:16:14.28#ibcon#about to read 5, iclass 35, count 0 2006.229.09:16:14.28#ibcon#read 5, iclass 35, count 0 2006.229.09:16:14.28#ibcon#about to read 6, iclass 35, count 0 2006.229.09:16:14.28#ibcon#read 6, iclass 35, count 0 2006.229.09:16:14.28#ibcon#end of sib2, iclass 35, count 0 2006.229.09:16:14.28#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:16:14.28#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:16:14.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:16:14.28#ibcon#*before write, iclass 35, count 0 2006.229.09:16:14.28#ibcon#enter sib2, iclass 35, count 0 2006.229.09:16:14.28#ibcon#flushed, iclass 35, count 0 2006.229.09:16:14.28#ibcon#about to write, iclass 35, count 0 2006.229.09:16:14.28#ibcon#wrote, iclass 35, count 0 2006.229.09:16:14.28#ibcon#about to read 3, iclass 35, count 0 2006.229.09:16:14.31#ibcon#read 3, iclass 35, count 0 2006.229.09:16:14.31#ibcon#about to read 4, iclass 35, count 0 2006.229.09:16:14.31#ibcon#read 4, iclass 35, count 0 2006.229.09:16:14.31#ibcon#about to read 5, iclass 35, count 0 2006.229.09:16:14.32#ibcon#read 5, iclass 35, count 0 2006.229.09:16:14.32#ibcon#about to read 6, iclass 35, count 0 2006.229.09:16:14.32#ibcon#read 6, iclass 35, count 0 2006.229.09:16:14.32#ibcon#end of sib2, iclass 35, count 0 2006.229.09:16:14.32#ibcon#*after write, iclass 35, count 0 2006.229.09:16:14.32#ibcon#*before return 0, iclass 35, count 0 2006.229.09:16:14.32#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:14.32#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:16:14.32#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:16:14.32#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:16:14.32$vck44/vb=8,4 2006.229.09:16:14.32#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.09:16:14.32#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.09:16:14.32#ibcon#ireg 11 cls_cnt 2 2006.229.09:16:14.32#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:14.37#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:14.37#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:14.37#ibcon#enter wrdev, iclass 37, count 2 2006.229.09:16:14.38#ibcon#first serial, iclass 37, count 2 2006.229.09:16:14.38#ibcon#enter sib2, iclass 37, count 2 2006.229.09:16:14.38#ibcon#flushed, iclass 37, count 2 2006.229.09:16:14.38#ibcon#about to write, iclass 37, count 2 2006.229.09:16:14.38#ibcon#wrote, iclass 37, count 2 2006.229.09:16:14.38#ibcon#about to read 3, iclass 37, count 2 2006.229.09:16:14.39#ibcon#read 3, iclass 37, count 2 2006.229.09:16:14.39#ibcon#about to read 4, iclass 37, count 2 2006.229.09:16:14.39#ibcon#read 4, iclass 37, count 2 2006.229.09:16:14.39#ibcon#about to read 5, iclass 37, count 2 2006.229.09:16:14.40#ibcon#read 5, iclass 37, count 2 2006.229.09:16:14.40#ibcon#about to read 6, iclass 37, count 2 2006.229.09:16:14.40#ibcon#read 6, iclass 37, count 2 2006.229.09:16:14.40#ibcon#end of sib2, iclass 37, count 2 2006.229.09:16:14.40#ibcon#*mode == 0, iclass 37, count 2 2006.229.09:16:14.40#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.09:16:14.40#ibcon#[27=AT08-04\r\n] 2006.229.09:16:14.40#ibcon#*before write, iclass 37, count 2 2006.229.09:16:14.40#ibcon#enter sib2, iclass 37, count 2 2006.229.09:16:14.40#ibcon#flushed, iclass 37, count 2 2006.229.09:16:14.40#ibcon#about to write, iclass 37, count 2 2006.229.09:16:14.40#ibcon#wrote, iclass 37, count 2 2006.229.09:16:14.40#ibcon#about to read 3, iclass 37, count 2 2006.229.09:16:14.42#ibcon#read 3, iclass 37, count 2 2006.229.09:16:14.42#ibcon#about to read 4, iclass 37, count 2 2006.229.09:16:14.42#ibcon#read 4, iclass 37, count 2 2006.229.09:16:14.43#ibcon#about to read 5, iclass 37, count 2 2006.229.09:16:14.43#ibcon#read 5, iclass 37, count 2 2006.229.09:16:14.43#ibcon#about to read 6, iclass 37, count 2 2006.229.09:16:14.43#ibcon#read 6, iclass 37, count 2 2006.229.09:16:14.43#ibcon#end of sib2, iclass 37, count 2 2006.229.09:16:14.43#ibcon#*after write, iclass 37, count 2 2006.229.09:16:14.43#ibcon#*before return 0, iclass 37, count 2 2006.229.09:16:14.43#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:14.43#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:16:14.43#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.09:16:14.43#ibcon#ireg 7 cls_cnt 0 2006.229.09:16:14.43#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:14.54#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:14.54#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:14.55#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:16:14.55#ibcon#first serial, iclass 37, count 0 2006.229.09:16:14.55#ibcon#enter sib2, iclass 37, count 0 2006.229.09:16:14.55#ibcon#flushed, iclass 37, count 0 2006.229.09:16:14.55#ibcon#about to write, iclass 37, count 0 2006.229.09:16:14.55#ibcon#wrote, iclass 37, count 0 2006.229.09:16:14.55#ibcon#about to read 3, iclass 37, count 0 2006.229.09:16:14.56#ibcon#read 3, iclass 37, count 0 2006.229.09:16:14.56#ibcon#about to read 4, iclass 37, count 0 2006.229.09:16:14.57#ibcon#read 4, iclass 37, count 0 2006.229.09:16:14.57#ibcon#about to read 5, iclass 37, count 0 2006.229.09:16:14.57#ibcon#read 5, iclass 37, count 0 2006.229.09:16:14.57#ibcon#about to read 6, iclass 37, count 0 2006.229.09:16:14.57#ibcon#read 6, iclass 37, count 0 2006.229.09:16:14.57#ibcon#end of sib2, iclass 37, count 0 2006.229.09:16:14.57#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:16:14.57#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:16:14.57#ibcon#[27=USB\r\n] 2006.229.09:16:14.57#ibcon#*before write, iclass 37, count 0 2006.229.09:16:14.57#ibcon#enter sib2, iclass 37, count 0 2006.229.09:16:14.57#ibcon#flushed, iclass 37, count 0 2006.229.09:16:14.57#ibcon#about to write, iclass 37, count 0 2006.229.09:16:14.57#ibcon#wrote, iclass 37, count 0 2006.229.09:16:14.57#ibcon#about to read 3, iclass 37, count 0 2006.229.09:16:14.60#ibcon#read 3, iclass 37, count 0 2006.229.09:16:14.60#ibcon#about to read 4, iclass 37, count 0 2006.229.09:16:14.60#ibcon#read 4, iclass 37, count 0 2006.229.09:16:14.60#ibcon#about to read 5, iclass 37, count 0 2006.229.09:16:14.60#ibcon#read 5, iclass 37, count 0 2006.229.09:16:14.60#ibcon#about to read 6, iclass 37, count 0 2006.229.09:16:14.60#ibcon#read 6, iclass 37, count 0 2006.229.09:16:14.60#ibcon#end of sib2, iclass 37, count 0 2006.229.09:16:14.60#ibcon#*after write, iclass 37, count 0 2006.229.09:16:14.60#ibcon#*before return 0, iclass 37, count 0 2006.229.09:16:14.60#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:14.60#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:16:14.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:16:14.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:16:14.60$vck44/vabw=wide 2006.229.09:16:14.60#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.09:16:14.60#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.09:16:14.60#ibcon#ireg 8 cls_cnt 0 2006.229.09:16:14.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:14.60#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:14.60#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:14.60#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:16:14.60#ibcon#first serial, iclass 39, count 0 2006.229.09:16:14.60#ibcon#enter sib2, iclass 39, count 0 2006.229.09:16:14.60#ibcon#flushed, iclass 39, count 0 2006.229.09:16:14.60#ibcon#about to write, iclass 39, count 0 2006.229.09:16:14.60#ibcon#wrote, iclass 39, count 0 2006.229.09:16:14.60#ibcon#about to read 3, iclass 39, count 0 2006.229.09:16:14.61#ibcon#read 3, iclass 39, count 0 2006.229.09:16:14.62#ibcon#about to read 4, iclass 39, count 0 2006.229.09:16:14.62#ibcon#read 4, iclass 39, count 0 2006.229.09:16:14.62#ibcon#about to read 5, iclass 39, count 0 2006.229.09:16:14.62#ibcon#read 5, iclass 39, count 0 2006.229.09:16:14.62#ibcon#about to read 6, iclass 39, count 0 2006.229.09:16:14.62#ibcon#read 6, iclass 39, count 0 2006.229.09:16:14.62#ibcon#end of sib2, iclass 39, count 0 2006.229.09:16:14.62#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:16:14.62#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:16:14.62#ibcon#[25=BW32\r\n] 2006.229.09:16:14.62#ibcon#*before write, iclass 39, count 0 2006.229.09:16:14.62#ibcon#enter sib2, iclass 39, count 0 2006.229.09:16:14.62#ibcon#flushed, iclass 39, count 0 2006.229.09:16:14.62#ibcon#about to write, iclass 39, count 0 2006.229.09:16:14.62#ibcon#wrote, iclass 39, count 0 2006.229.09:16:14.62#ibcon#about to read 3, iclass 39, count 0 2006.229.09:16:14.64#ibcon#read 3, iclass 39, count 0 2006.229.09:16:14.64#ibcon#about to read 4, iclass 39, count 0 2006.229.09:16:14.65#ibcon#read 4, iclass 39, count 0 2006.229.09:16:14.65#ibcon#about to read 5, iclass 39, count 0 2006.229.09:16:14.65#ibcon#read 5, iclass 39, count 0 2006.229.09:16:14.65#ibcon#about to read 6, iclass 39, count 0 2006.229.09:16:14.65#ibcon#read 6, iclass 39, count 0 2006.229.09:16:14.65#ibcon#end of sib2, iclass 39, count 0 2006.229.09:16:14.65#ibcon#*after write, iclass 39, count 0 2006.229.09:16:14.65#ibcon#*before return 0, iclass 39, count 0 2006.229.09:16:14.65#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:14.65#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:16:14.65#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:16:14.65#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:16:14.65$vck44/vbbw=wide 2006.229.09:16:14.65#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:16:14.65#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:16:14.65#ibcon#ireg 8 cls_cnt 0 2006.229.09:16:14.65#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:16:14.71#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:16:14.71#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:16:14.71#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:16:14.72#ibcon#first serial, iclass 3, count 0 2006.229.09:16:14.72#ibcon#enter sib2, iclass 3, count 0 2006.229.09:16:14.72#ibcon#flushed, iclass 3, count 0 2006.229.09:16:14.72#ibcon#about to write, iclass 3, count 0 2006.229.09:16:14.72#ibcon#wrote, iclass 3, count 0 2006.229.09:16:14.72#ibcon#about to read 3, iclass 3, count 0 2006.229.09:16:14.73#ibcon#read 3, iclass 3, count 0 2006.229.09:16:14.74#ibcon#about to read 4, iclass 3, count 0 2006.229.09:16:14.74#ibcon#read 4, iclass 3, count 0 2006.229.09:16:14.74#ibcon#about to read 5, iclass 3, count 0 2006.229.09:16:14.74#ibcon#read 5, iclass 3, count 0 2006.229.09:16:14.74#ibcon#about to read 6, iclass 3, count 0 2006.229.09:16:14.74#ibcon#read 6, iclass 3, count 0 2006.229.09:16:14.74#ibcon#end of sib2, iclass 3, count 0 2006.229.09:16:14.74#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:16:14.74#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:16:14.74#ibcon#[27=BW32\r\n] 2006.229.09:16:14.74#ibcon#*before write, iclass 3, count 0 2006.229.09:16:14.74#ibcon#enter sib2, iclass 3, count 0 2006.229.09:16:14.74#ibcon#flushed, iclass 3, count 0 2006.229.09:16:14.74#ibcon#about to write, iclass 3, count 0 2006.229.09:16:14.74#ibcon#wrote, iclass 3, count 0 2006.229.09:16:14.74#ibcon#about to read 3, iclass 3, count 0 2006.229.09:16:14.76#ibcon#read 3, iclass 3, count 0 2006.229.09:16:14.76#ibcon#about to read 4, iclass 3, count 0 2006.229.09:16:14.77#ibcon#read 4, iclass 3, count 0 2006.229.09:16:14.77#ibcon#about to read 5, iclass 3, count 0 2006.229.09:16:14.77#ibcon#read 5, iclass 3, count 0 2006.229.09:16:14.77#ibcon#about to read 6, iclass 3, count 0 2006.229.09:16:14.77#ibcon#read 6, iclass 3, count 0 2006.229.09:16:14.77#ibcon#end of sib2, iclass 3, count 0 2006.229.09:16:14.77#ibcon#*after write, iclass 3, count 0 2006.229.09:16:14.77#ibcon#*before return 0, iclass 3, count 0 2006.229.09:16:14.77#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:16:14.77#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:16:14.77#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:16:14.77#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:16:14.77$setupk4/ifdk4 2006.229.09:16:14.77$ifdk4/lo= 2006.229.09:16:14.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:16:14.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:16:14.77$ifdk4/patch= 2006.229.09:16:14.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:16:14.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:16:14.77$setupk4/!*+20s 2006.229.09:16:17.30#abcon#<5=/05 2.2 3.9 29.08 961000.8\r\n> 2006.229.09:16:17.32#abcon#{5=INTERFACE CLEAR} 2006.229.09:16:17.38#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:16:27.47#abcon#<5=/05 2.2 3.9 29.08 961000.8\r\n> 2006.229.09:16:27.49#abcon#{5=INTERFACE CLEAR} 2006.229.09:16:27.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:16:29.28$setupk4/"tpicd 2006.229.09:16:29.29$setupk4/echo=off 2006.229.09:16:29.29$setupk4/xlog=off 2006.229.09:16:29.29:!2006.229.09:17:58 2006.229.09:16:30.14#trakl#Source acquired 2006.229.09:16:31.15#flagr#flagr/antenna,acquired 2006.229.09:17:58.02:preob 2006.229.09:17:59.15/onsource/TRACKING 2006.229.09:17:59.15:!2006.229.09:18:08 2006.229.09:18:08.02:"tape 2006.229.09:18:08.02:"st=record 2006.229.09:18:08.02:data_valid=on 2006.229.09:18:08.02:midob 2006.229.09:18:09.15/onsource/TRACKING 2006.229.09:18:09.15/wx/29.08,1000.8,96 2006.229.09:18:09.21/cable/+6.4006E-03 2006.229.09:18:10.30/va/01,08,usb,yes,34,37 2006.229.09:18:10.30/va/02,07,usb,yes,37,37 2006.229.09:18:10.30/va/03,06,usb,yes,46,48 2006.229.09:18:10.30/va/04,07,usb,yes,38,40 2006.229.09:18:10.30/va/05,04,usb,yes,34,35 2006.229.09:18:10.30/va/06,04,usb,yes,38,38 2006.229.09:18:10.30/va/07,05,usb,yes,34,35 2006.229.09:18:10.30/va/08,06,usb,yes,25,31 2006.229.09:18:10.53/valo/01,524.99,yes,locked 2006.229.09:18:10.53/valo/02,534.99,yes,locked 2006.229.09:18:10.53/valo/03,564.99,yes,locked 2006.229.09:18:10.53/valo/04,624.99,yes,locked 2006.229.09:18:10.53/valo/05,734.99,yes,locked 2006.229.09:18:10.53/valo/06,814.99,yes,locked 2006.229.09:18:10.53/valo/07,864.99,yes,locked 2006.229.09:18:10.53/valo/08,884.99,yes,locked 2006.229.09:18:11.62/vb/01,04,usb,yes,31,29 2006.229.09:18:11.62/vb/02,04,usb,yes,34,33 2006.229.09:18:11.62/vb/03,04,usb,yes,31,34 2006.229.09:18:11.62/vb/04,04,usb,yes,35,34 2006.229.09:18:11.62/vb/05,04,usb,yes,27,30 2006.229.09:18:11.62/vb/06,04,usb,yes,32,28 2006.229.09:18:11.62/vb/07,04,usb,yes,32,31 2006.229.09:18:11.62/vb/08,04,usb,yes,29,32 2006.229.09:18:11.86/vblo/01,629.99,yes,locked 2006.229.09:18:11.86/vblo/02,634.99,yes,locked 2006.229.09:18:11.86/vblo/03,649.99,yes,locked 2006.229.09:18:11.86/vblo/04,679.99,yes,locked 2006.229.09:18:11.86/vblo/05,709.99,yes,locked 2006.229.09:18:11.86/vblo/06,719.99,yes,locked 2006.229.09:18:11.86/vblo/07,734.99,yes,locked 2006.229.09:18:11.86/vblo/08,744.99,yes,locked 2006.229.09:18:12.01/vabw/8 2006.229.09:18:12.16/vbbw/8 2006.229.09:18:12.25/xfe/off,on,12.2 2006.229.09:18:12.62/ifatt/23,28,28,28 2006.229.09:18:13.07/fmout-gps/S +4.58E-07 2006.229.09:18:13.12:!2006.229.09:18:58 2006.229.09:18:58.02:data_valid=off 2006.229.09:18:58.02:"et 2006.229.09:18:58.02:!+3s 2006.229.09:19:01.05:"tape 2006.229.09:19:01.06:postob 2006.229.09:19:01.15/cable/+6.4022E-03 2006.229.09:19:01.15/wx/29.07,1000.9,96 2006.229.09:19:01.20/fmout-gps/S +4.59E-07 2006.229.09:19:01.21:scan_name=229-0923,jd0608,190 2006.229.09:19:01.21:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.09:19:03.14#flagr#flagr/antenna,new-source 2006.229.09:19:03.15:checkk5 2006.229.09:19:03.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:19:03.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:19:04.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:19:04.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:19:05.15/chk_obsdata//k5ts1/T2290918??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.09:19:05.54/chk_obsdata//k5ts2/T2290918??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.09:19:05.94/chk_obsdata//k5ts3/T2290918??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.09:19:06.32/chk_obsdata//k5ts4/T2290918??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.09:19:07.04/k5log//k5ts1_log_newline 2006.229.09:19:07.75/k5log//k5ts2_log_newline 2006.229.09:19:08.45/k5log//k5ts3_log_newline 2006.229.09:19:09.16/k5log//k5ts4_log_newline 2006.229.09:19:09.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:19:09.19:setupk4=1 2006.229.09:19:09.19$setupk4/echo=on 2006.229.09:19:09.19$setupk4/pcalon 2006.229.09:19:09.19$pcalon/"no phase cal control is implemented here 2006.229.09:19:09.19$setupk4/"tpicd=stop 2006.229.09:19:09.19$setupk4/"rec=synch_on 2006.229.09:19:09.19$setupk4/"rec_mode=128 2006.229.09:19:09.19$setupk4/!* 2006.229.09:19:09.19$setupk4/recpk4 2006.229.09:19:09.19$recpk4/recpatch= 2006.229.09:19:09.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:19:09.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:19:09.19$setupk4/vck44 2006.229.09:19:09.19$vck44/valo=1,524.99 2006.229.09:19:09.19#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.09:19:09.19#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.09:19:09.19#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:09.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:09.19#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:09.19#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:09.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:19:09.19#ibcon#first serial, iclass 4, count 0 2006.229.09:19:09.19#ibcon#enter sib2, iclass 4, count 0 2006.229.09:19:09.19#ibcon#flushed, iclass 4, count 0 2006.229.09:19:09.19#ibcon#about to write, iclass 4, count 0 2006.229.09:19:09.19#ibcon#wrote, iclass 4, count 0 2006.229.09:19:09.19#ibcon#about to read 3, iclass 4, count 0 2006.229.09:19:09.20#ibcon#read 3, iclass 4, count 0 2006.229.09:19:09.20#ibcon#about to read 4, iclass 4, count 0 2006.229.09:19:09.20#ibcon#read 4, iclass 4, count 0 2006.229.09:19:09.20#ibcon#about to read 5, iclass 4, count 0 2006.229.09:19:09.20#ibcon#read 5, iclass 4, count 0 2006.229.09:19:09.20#ibcon#about to read 6, iclass 4, count 0 2006.229.09:19:09.20#ibcon#read 6, iclass 4, count 0 2006.229.09:19:09.20#ibcon#end of sib2, iclass 4, count 0 2006.229.09:19:09.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:19:09.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:19:09.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:19:09.20#ibcon#*before write, iclass 4, count 0 2006.229.09:19:09.20#ibcon#enter sib2, iclass 4, count 0 2006.229.09:19:09.20#ibcon#flushed, iclass 4, count 0 2006.229.09:19:09.20#ibcon#about to write, iclass 4, count 0 2006.229.09:19:09.20#ibcon#wrote, iclass 4, count 0 2006.229.09:19:09.20#ibcon#about to read 3, iclass 4, count 0 2006.229.09:19:09.25#ibcon#read 3, iclass 4, count 0 2006.229.09:19:09.25#ibcon#about to read 4, iclass 4, count 0 2006.229.09:19:09.25#ibcon#read 4, iclass 4, count 0 2006.229.09:19:09.25#ibcon#about to read 5, iclass 4, count 0 2006.229.09:19:09.25#ibcon#read 5, iclass 4, count 0 2006.229.09:19:09.25#ibcon#about to read 6, iclass 4, count 0 2006.229.09:19:09.25#ibcon#read 6, iclass 4, count 0 2006.229.09:19:09.25#ibcon#end of sib2, iclass 4, count 0 2006.229.09:19:09.25#ibcon#*after write, iclass 4, count 0 2006.229.09:19:09.25#ibcon#*before return 0, iclass 4, count 0 2006.229.09:19:09.25#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:09.25#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:09.25#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:19:09.25#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:19:09.25$vck44/va=1,8 2006.229.09:19:09.25#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.09:19:09.25#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.09:19:09.25#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:09.25#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:09.25#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:09.25#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:09.25#ibcon#enter wrdev, iclass 6, count 2 2006.229.09:19:09.25#ibcon#first serial, iclass 6, count 2 2006.229.09:19:09.25#ibcon#enter sib2, iclass 6, count 2 2006.229.09:19:09.26#ibcon#flushed, iclass 6, count 2 2006.229.09:19:09.26#ibcon#about to write, iclass 6, count 2 2006.229.09:19:09.26#ibcon#wrote, iclass 6, count 2 2006.229.09:19:09.26#ibcon#about to read 3, iclass 6, count 2 2006.229.09:19:09.27#ibcon#read 3, iclass 6, count 2 2006.229.09:19:09.27#ibcon#about to read 4, iclass 6, count 2 2006.229.09:19:09.27#ibcon#read 4, iclass 6, count 2 2006.229.09:19:09.27#ibcon#about to read 5, iclass 6, count 2 2006.229.09:19:09.27#ibcon#read 5, iclass 6, count 2 2006.229.09:19:09.27#ibcon#about to read 6, iclass 6, count 2 2006.229.09:19:09.27#ibcon#read 6, iclass 6, count 2 2006.229.09:19:09.27#ibcon#end of sib2, iclass 6, count 2 2006.229.09:19:09.27#ibcon#*mode == 0, iclass 6, count 2 2006.229.09:19:09.27#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.09:19:09.27#ibcon#[25=AT01-08\r\n] 2006.229.09:19:09.27#ibcon#*before write, iclass 6, count 2 2006.229.09:19:09.27#ibcon#enter sib2, iclass 6, count 2 2006.229.09:19:09.27#ibcon#flushed, iclass 6, count 2 2006.229.09:19:09.27#ibcon#about to write, iclass 6, count 2 2006.229.09:19:09.27#ibcon#wrote, iclass 6, count 2 2006.229.09:19:09.27#ibcon#about to read 3, iclass 6, count 2 2006.229.09:19:09.30#ibcon#read 3, iclass 6, count 2 2006.229.09:19:09.30#ibcon#about to read 4, iclass 6, count 2 2006.229.09:19:09.30#ibcon#read 4, iclass 6, count 2 2006.229.09:19:09.30#ibcon#about to read 5, iclass 6, count 2 2006.229.09:19:09.30#ibcon#read 5, iclass 6, count 2 2006.229.09:19:09.30#ibcon#about to read 6, iclass 6, count 2 2006.229.09:19:09.30#ibcon#read 6, iclass 6, count 2 2006.229.09:19:09.30#ibcon#end of sib2, iclass 6, count 2 2006.229.09:19:09.30#ibcon#*after write, iclass 6, count 2 2006.229.09:19:09.30#ibcon#*before return 0, iclass 6, count 2 2006.229.09:19:09.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:09.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:09.30#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.09:19:09.30#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:09.30#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:09.42#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:09.42#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:09.42#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:19:09.42#ibcon#first serial, iclass 6, count 0 2006.229.09:19:09.42#ibcon#enter sib2, iclass 6, count 0 2006.229.09:19:09.42#ibcon#flushed, iclass 6, count 0 2006.229.09:19:09.42#ibcon#about to write, iclass 6, count 0 2006.229.09:19:09.42#ibcon#wrote, iclass 6, count 0 2006.229.09:19:09.42#ibcon#about to read 3, iclass 6, count 0 2006.229.09:19:09.44#ibcon#read 3, iclass 6, count 0 2006.229.09:19:09.44#ibcon#about to read 4, iclass 6, count 0 2006.229.09:19:09.44#ibcon#read 4, iclass 6, count 0 2006.229.09:19:09.44#ibcon#about to read 5, iclass 6, count 0 2006.229.09:19:09.44#ibcon#read 5, iclass 6, count 0 2006.229.09:19:09.44#ibcon#about to read 6, iclass 6, count 0 2006.229.09:19:09.44#ibcon#read 6, iclass 6, count 0 2006.229.09:19:09.44#ibcon#end of sib2, iclass 6, count 0 2006.229.09:19:09.44#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:19:09.44#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:19:09.44#ibcon#[25=USB\r\n] 2006.229.09:19:09.44#ibcon#*before write, iclass 6, count 0 2006.229.09:19:09.44#ibcon#enter sib2, iclass 6, count 0 2006.229.09:19:09.44#ibcon#flushed, iclass 6, count 0 2006.229.09:19:09.44#ibcon#about to write, iclass 6, count 0 2006.229.09:19:09.44#ibcon#wrote, iclass 6, count 0 2006.229.09:19:09.44#ibcon#about to read 3, iclass 6, count 0 2006.229.09:19:09.47#ibcon#read 3, iclass 6, count 0 2006.229.09:19:09.47#ibcon#about to read 4, iclass 6, count 0 2006.229.09:19:09.47#ibcon#read 4, iclass 6, count 0 2006.229.09:19:09.47#ibcon#about to read 5, iclass 6, count 0 2006.229.09:19:09.47#ibcon#read 5, iclass 6, count 0 2006.229.09:19:09.47#ibcon#about to read 6, iclass 6, count 0 2006.229.09:19:09.47#ibcon#read 6, iclass 6, count 0 2006.229.09:19:09.47#ibcon#end of sib2, iclass 6, count 0 2006.229.09:19:09.47#ibcon#*after write, iclass 6, count 0 2006.229.09:19:09.47#ibcon#*before return 0, iclass 6, count 0 2006.229.09:19:09.47#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:09.47#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:09.47#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:19:09.47#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:19:09.47$vck44/valo=2,534.99 2006.229.09:19:09.47#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.09:19:09.47#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.09:19:09.47#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:09.47#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:09.47#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:09.47#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:09.47#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:19:09.47#ibcon#first serial, iclass 10, count 0 2006.229.09:19:09.47#ibcon#enter sib2, iclass 10, count 0 2006.229.09:19:09.47#ibcon#flushed, iclass 10, count 0 2006.229.09:19:09.47#ibcon#about to write, iclass 10, count 0 2006.229.09:19:09.47#ibcon#wrote, iclass 10, count 0 2006.229.09:19:09.47#ibcon#about to read 3, iclass 10, count 0 2006.229.09:19:09.49#ibcon#read 3, iclass 10, count 0 2006.229.09:19:09.49#ibcon#about to read 4, iclass 10, count 0 2006.229.09:19:09.49#ibcon#read 4, iclass 10, count 0 2006.229.09:19:09.49#ibcon#about to read 5, iclass 10, count 0 2006.229.09:19:09.49#ibcon#read 5, iclass 10, count 0 2006.229.09:19:09.49#ibcon#about to read 6, iclass 10, count 0 2006.229.09:19:09.49#ibcon#read 6, iclass 10, count 0 2006.229.09:19:09.49#ibcon#end of sib2, iclass 10, count 0 2006.229.09:19:09.49#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:19:09.49#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:19:09.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:19:09.49#ibcon#*before write, iclass 10, count 0 2006.229.09:19:09.49#ibcon#enter sib2, iclass 10, count 0 2006.229.09:19:09.49#ibcon#flushed, iclass 10, count 0 2006.229.09:19:09.49#ibcon#about to write, iclass 10, count 0 2006.229.09:19:09.49#ibcon#wrote, iclass 10, count 0 2006.229.09:19:09.49#ibcon#about to read 3, iclass 10, count 0 2006.229.09:19:09.53#ibcon#read 3, iclass 10, count 0 2006.229.09:19:09.53#ibcon#about to read 4, iclass 10, count 0 2006.229.09:19:09.53#ibcon#read 4, iclass 10, count 0 2006.229.09:19:09.53#ibcon#about to read 5, iclass 10, count 0 2006.229.09:19:09.53#ibcon#read 5, iclass 10, count 0 2006.229.09:19:09.53#ibcon#about to read 6, iclass 10, count 0 2006.229.09:19:09.53#ibcon#read 6, iclass 10, count 0 2006.229.09:19:09.53#ibcon#end of sib2, iclass 10, count 0 2006.229.09:19:09.53#ibcon#*after write, iclass 10, count 0 2006.229.09:19:09.53#ibcon#*before return 0, iclass 10, count 0 2006.229.09:19:09.53#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:09.53#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:09.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:19:09.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:19:09.53$vck44/va=2,7 2006.229.09:19:09.53#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.09:19:09.53#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.09:19:09.53#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:09.53#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:09.59#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:09.59#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:09.59#ibcon#enter wrdev, iclass 12, count 2 2006.229.09:19:09.59#ibcon#first serial, iclass 12, count 2 2006.229.09:19:09.59#ibcon#enter sib2, iclass 12, count 2 2006.229.09:19:09.59#ibcon#flushed, iclass 12, count 2 2006.229.09:19:09.59#ibcon#about to write, iclass 12, count 2 2006.229.09:19:09.59#ibcon#wrote, iclass 12, count 2 2006.229.09:19:09.59#ibcon#about to read 3, iclass 12, count 2 2006.229.09:19:09.61#ibcon#read 3, iclass 12, count 2 2006.229.09:19:09.61#ibcon#about to read 4, iclass 12, count 2 2006.229.09:19:09.61#ibcon#read 4, iclass 12, count 2 2006.229.09:19:09.61#ibcon#about to read 5, iclass 12, count 2 2006.229.09:19:09.61#ibcon#read 5, iclass 12, count 2 2006.229.09:19:09.61#ibcon#about to read 6, iclass 12, count 2 2006.229.09:19:09.61#ibcon#read 6, iclass 12, count 2 2006.229.09:19:09.61#ibcon#end of sib2, iclass 12, count 2 2006.229.09:19:09.61#ibcon#*mode == 0, iclass 12, count 2 2006.229.09:19:09.61#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.09:19:09.61#ibcon#[25=AT02-07\r\n] 2006.229.09:19:09.61#ibcon#*before write, iclass 12, count 2 2006.229.09:19:09.61#ibcon#enter sib2, iclass 12, count 2 2006.229.09:19:09.61#ibcon#flushed, iclass 12, count 2 2006.229.09:19:09.61#ibcon#about to write, iclass 12, count 2 2006.229.09:19:09.61#ibcon#wrote, iclass 12, count 2 2006.229.09:19:09.61#ibcon#about to read 3, iclass 12, count 2 2006.229.09:19:09.64#ibcon#read 3, iclass 12, count 2 2006.229.09:19:09.64#ibcon#about to read 4, iclass 12, count 2 2006.229.09:19:09.64#ibcon#read 4, iclass 12, count 2 2006.229.09:19:09.64#ibcon#about to read 5, iclass 12, count 2 2006.229.09:19:09.64#ibcon#read 5, iclass 12, count 2 2006.229.09:19:09.64#ibcon#about to read 6, iclass 12, count 2 2006.229.09:19:09.64#ibcon#read 6, iclass 12, count 2 2006.229.09:19:09.64#ibcon#end of sib2, iclass 12, count 2 2006.229.09:19:09.64#ibcon#*after write, iclass 12, count 2 2006.229.09:19:09.64#ibcon#*before return 0, iclass 12, count 2 2006.229.09:19:09.64#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:09.64#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:09.64#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.09:19:09.64#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:09.64#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:09.76#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:09.76#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:09.76#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:19:09.76#ibcon#first serial, iclass 12, count 0 2006.229.09:19:09.76#ibcon#enter sib2, iclass 12, count 0 2006.229.09:19:09.76#ibcon#flushed, iclass 12, count 0 2006.229.09:19:09.76#ibcon#about to write, iclass 12, count 0 2006.229.09:19:09.76#ibcon#wrote, iclass 12, count 0 2006.229.09:19:09.76#ibcon#about to read 3, iclass 12, count 0 2006.229.09:19:09.78#ibcon#read 3, iclass 12, count 0 2006.229.09:19:09.78#ibcon#about to read 4, iclass 12, count 0 2006.229.09:19:09.78#ibcon#read 4, iclass 12, count 0 2006.229.09:19:09.78#ibcon#about to read 5, iclass 12, count 0 2006.229.09:19:09.78#ibcon#read 5, iclass 12, count 0 2006.229.09:19:09.78#ibcon#about to read 6, iclass 12, count 0 2006.229.09:19:09.78#ibcon#read 6, iclass 12, count 0 2006.229.09:19:09.78#ibcon#end of sib2, iclass 12, count 0 2006.229.09:19:09.78#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:19:09.78#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:19:09.78#ibcon#[25=USB\r\n] 2006.229.09:19:09.78#ibcon#*before write, iclass 12, count 0 2006.229.09:19:09.78#ibcon#enter sib2, iclass 12, count 0 2006.229.09:19:09.78#ibcon#flushed, iclass 12, count 0 2006.229.09:19:09.78#ibcon#about to write, iclass 12, count 0 2006.229.09:19:09.78#ibcon#wrote, iclass 12, count 0 2006.229.09:19:09.78#ibcon#about to read 3, iclass 12, count 0 2006.229.09:19:09.81#ibcon#read 3, iclass 12, count 0 2006.229.09:19:09.81#ibcon#about to read 4, iclass 12, count 0 2006.229.09:19:09.81#ibcon#read 4, iclass 12, count 0 2006.229.09:19:09.81#ibcon#about to read 5, iclass 12, count 0 2006.229.09:19:09.81#ibcon#read 5, iclass 12, count 0 2006.229.09:19:09.81#ibcon#about to read 6, iclass 12, count 0 2006.229.09:19:09.81#ibcon#read 6, iclass 12, count 0 2006.229.09:19:09.81#ibcon#end of sib2, iclass 12, count 0 2006.229.09:19:09.81#ibcon#*after write, iclass 12, count 0 2006.229.09:19:09.81#ibcon#*before return 0, iclass 12, count 0 2006.229.09:19:09.81#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:09.81#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:09.81#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:19:09.81#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:19:09.81$vck44/valo=3,564.99 2006.229.09:19:09.81#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.09:19:09.81#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.09:19:09.81#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:09.81#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:09.81#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:09.81#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:09.81#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:19:09.81#ibcon#first serial, iclass 14, count 0 2006.229.09:19:09.81#ibcon#enter sib2, iclass 14, count 0 2006.229.09:19:09.81#ibcon#flushed, iclass 14, count 0 2006.229.09:19:09.81#ibcon#about to write, iclass 14, count 0 2006.229.09:19:09.81#ibcon#wrote, iclass 14, count 0 2006.229.09:19:09.81#ibcon#about to read 3, iclass 14, count 0 2006.229.09:19:09.83#ibcon#read 3, iclass 14, count 0 2006.229.09:19:09.83#ibcon#about to read 4, iclass 14, count 0 2006.229.09:19:09.83#ibcon#read 4, iclass 14, count 0 2006.229.09:19:09.83#ibcon#about to read 5, iclass 14, count 0 2006.229.09:19:09.83#ibcon#read 5, iclass 14, count 0 2006.229.09:19:09.83#ibcon#about to read 6, iclass 14, count 0 2006.229.09:19:09.83#ibcon#read 6, iclass 14, count 0 2006.229.09:19:09.83#ibcon#end of sib2, iclass 14, count 0 2006.229.09:19:09.83#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:19:09.83#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:19:09.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:19:09.83#ibcon#*before write, iclass 14, count 0 2006.229.09:19:09.83#ibcon#enter sib2, iclass 14, count 0 2006.229.09:19:09.83#ibcon#flushed, iclass 14, count 0 2006.229.09:19:09.83#ibcon#about to write, iclass 14, count 0 2006.229.09:19:09.83#ibcon#wrote, iclass 14, count 0 2006.229.09:19:09.83#ibcon#about to read 3, iclass 14, count 0 2006.229.09:19:09.87#ibcon#read 3, iclass 14, count 0 2006.229.09:19:09.87#ibcon#about to read 4, iclass 14, count 0 2006.229.09:19:09.87#ibcon#read 4, iclass 14, count 0 2006.229.09:19:09.87#ibcon#about to read 5, iclass 14, count 0 2006.229.09:19:09.87#ibcon#read 5, iclass 14, count 0 2006.229.09:19:09.87#ibcon#about to read 6, iclass 14, count 0 2006.229.09:19:09.87#ibcon#read 6, iclass 14, count 0 2006.229.09:19:09.87#ibcon#end of sib2, iclass 14, count 0 2006.229.09:19:09.87#ibcon#*after write, iclass 14, count 0 2006.229.09:19:09.87#ibcon#*before return 0, iclass 14, count 0 2006.229.09:19:09.87#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:09.87#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:09.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:19:09.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:19:09.87$vck44/va=3,6 2006.229.09:19:09.87#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.09:19:09.87#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.09:19:09.87#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:09.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:09.93#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:09.93#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:09.93#ibcon#enter wrdev, iclass 16, count 2 2006.229.09:19:09.93#ibcon#first serial, iclass 16, count 2 2006.229.09:19:09.93#ibcon#enter sib2, iclass 16, count 2 2006.229.09:19:09.93#ibcon#flushed, iclass 16, count 2 2006.229.09:19:09.93#ibcon#about to write, iclass 16, count 2 2006.229.09:19:09.93#ibcon#wrote, iclass 16, count 2 2006.229.09:19:09.93#ibcon#about to read 3, iclass 16, count 2 2006.229.09:19:09.95#ibcon#read 3, iclass 16, count 2 2006.229.09:19:09.95#ibcon#about to read 4, iclass 16, count 2 2006.229.09:19:09.95#ibcon#read 4, iclass 16, count 2 2006.229.09:19:09.95#ibcon#about to read 5, iclass 16, count 2 2006.229.09:19:09.95#ibcon#read 5, iclass 16, count 2 2006.229.09:19:09.95#ibcon#about to read 6, iclass 16, count 2 2006.229.09:19:09.95#ibcon#read 6, iclass 16, count 2 2006.229.09:19:09.95#ibcon#end of sib2, iclass 16, count 2 2006.229.09:19:09.95#ibcon#*mode == 0, iclass 16, count 2 2006.229.09:19:09.95#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.09:19:09.95#ibcon#[25=AT03-06\r\n] 2006.229.09:19:09.95#ibcon#*before write, iclass 16, count 2 2006.229.09:19:09.95#ibcon#enter sib2, iclass 16, count 2 2006.229.09:19:09.95#ibcon#flushed, iclass 16, count 2 2006.229.09:19:09.95#ibcon#about to write, iclass 16, count 2 2006.229.09:19:09.95#ibcon#wrote, iclass 16, count 2 2006.229.09:19:09.95#ibcon#about to read 3, iclass 16, count 2 2006.229.09:19:09.98#ibcon#read 3, iclass 16, count 2 2006.229.09:19:09.98#ibcon#about to read 4, iclass 16, count 2 2006.229.09:19:09.98#ibcon#read 4, iclass 16, count 2 2006.229.09:19:09.98#ibcon#about to read 5, iclass 16, count 2 2006.229.09:19:09.98#ibcon#read 5, iclass 16, count 2 2006.229.09:19:09.98#ibcon#about to read 6, iclass 16, count 2 2006.229.09:19:09.98#ibcon#read 6, iclass 16, count 2 2006.229.09:19:09.98#ibcon#end of sib2, iclass 16, count 2 2006.229.09:19:09.98#ibcon#*after write, iclass 16, count 2 2006.229.09:19:09.98#ibcon#*before return 0, iclass 16, count 2 2006.229.09:19:09.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:09.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:09.98#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.09:19:09.98#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:09.98#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:10.11#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:10.11#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:10.11#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:19:10.11#ibcon#first serial, iclass 16, count 0 2006.229.09:19:10.11#ibcon#enter sib2, iclass 16, count 0 2006.229.09:19:10.11#ibcon#flushed, iclass 16, count 0 2006.229.09:19:10.11#ibcon#about to write, iclass 16, count 0 2006.229.09:19:10.11#ibcon#wrote, iclass 16, count 0 2006.229.09:19:10.11#ibcon#about to read 3, iclass 16, count 0 2006.229.09:19:10.12#ibcon#read 3, iclass 16, count 0 2006.229.09:19:10.12#ibcon#about to read 4, iclass 16, count 0 2006.229.09:19:10.12#ibcon#read 4, iclass 16, count 0 2006.229.09:19:10.12#ibcon#about to read 5, iclass 16, count 0 2006.229.09:19:10.12#ibcon#read 5, iclass 16, count 0 2006.229.09:19:10.12#ibcon#about to read 6, iclass 16, count 0 2006.229.09:19:10.12#ibcon#read 6, iclass 16, count 0 2006.229.09:19:10.12#ibcon#end of sib2, iclass 16, count 0 2006.229.09:19:10.12#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:19:10.12#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:19:10.12#ibcon#[25=USB\r\n] 2006.229.09:19:10.12#ibcon#*before write, iclass 16, count 0 2006.229.09:19:10.12#ibcon#enter sib2, iclass 16, count 0 2006.229.09:19:10.12#ibcon#flushed, iclass 16, count 0 2006.229.09:19:10.12#ibcon#about to write, iclass 16, count 0 2006.229.09:19:10.12#ibcon#wrote, iclass 16, count 0 2006.229.09:19:10.12#ibcon#about to read 3, iclass 16, count 0 2006.229.09:19:10.15#ibcon#read 3, iclass 16, count 0 2006.229.09:19:10.15#ibcon#about to read 4, iclass 16, count 0 2006.229.09:19:10.15#ibcon#read 4, iclass 16, count 0 2006.229.09:19:10.15#ibcon#about to read 5, iclass 16, count 0 2006.229.09:19:10.15#ibcon#read 5, iclass 16, count 0 2006.229.09:19:10.15#ibcon#about to read 6, iclass 16, count 0 2006.229.09:19:10.15#ibcon#read 6, iclass 16, count 0 2006.229.09:19:10.15#ibcon#end of sib2, iclass 16, count 0 2006.229.09:19:10.15#ibcon#*after write, iclass 16, count 0 2006.229.09:19:10.15#ibcon#*before return 0, iclass 16, count 0 2006.229.09:19:10.15#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:10.15#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:10.15#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:19:10.15#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:19:10.15$vck44/valo=4,624.99 2006.229.09:19:10.15#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.09:19:10.15#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.09:19:10.15#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:10.15#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:10.15#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:10.15#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:10.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:19:10.16#ibcon#first serial, iclass 18, count 0 2006.229.09:19:10.16#ibcon#enter sib2, iclass 18, count 0 2006.229.09:19:10.16#ibcon#flushed, iclass 18, count 0 2006.229.09:19:10.16#ibcon#about to write, iclass 18, count 0 2006.229.09:19:10.16#ibcon#wrote, iclass 18, count 0 2006.229.09:19:10.16#ibcon#about to read 3, iclass 18, count 0 2006.229.09:19:10.17#ibcon#read 3, iclass 18, count 0 2006.229.09:19:10.17#ibcon#about to read 4, iclass 18, count 0 2006.229.09:19:10.17#ibcon#read 4, iclass 18, count 0 2006.229.09:19:10.17#ibcon#about to read 5, iclass 18, count 0 2006.229.09:19:10.17#ibcon#read 5, iclass 18, count 0 2006.229.09:19:10.17#ibcon#about to read 6, iclass 18, count 0 2006.229.09:19:10.17#ibcon#read 6, iclass 18, count 0 2006.229.09:19:10.17#ibcon#end of sib2, iclass 18, count 0 2006.229.09:19:10.17#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:19:10.17#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:19:10.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:19:10.17#ibcon#*before write, iclass 18, count 0 2006.229.09:19:10.17#ibcon#enter sib2, iclass 18, count 0 2006.229.09:19:10.17#ibcon#flushed, iclass 18, count 0 2006.229.09:19:10.17#ibcon#about to write, iclass 18, count 0 2006.229.09:19:10.17#ibcon#wrote, iclass 18, count 0 2006.229.09:19:10.17#ibcon#about to read 3, iclass 18, count 0 2006.229.09:19:10.21#ibcon#read 3, iclass 18, count 0 2006.229.09:19:10.21#ibcon#about to read 4, iclass 18, count 0 2006.229.09:19:10.21#ibcon#read 4, iclass 18, count 0 2006.229.09:19:10.21#ibcon#about to read 5, iclass 18, count 0 2006.229.09:19:10.21#ibcon#read 5, iclass 18, count 0 2006.229.09:19:10.21#ibcon#about to read 6, iclass 18, count 0 2006.229.09:19:10.21#ibcon#read 6, iclass 18, count 0 2006.229.09:19:10.21#ibcon#end of sib2, iclass 18, count 0 2006.229.09:19:10.21#ibcon#*after write, iclass 18, count 0 2006.229.09:19:10.21#ibcon#*before return 0, iclass 18, count 0 2006.229.09:19:10.21#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:10.21#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:10.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:19:10.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:19:10.21$vck44/va=4,7 2006.229.09:19:10.21#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.09:19:10.21#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.09:19:10.21#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:10.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:10.27#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:10.27#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:10.27#ibcon#enter wrdev, iclass 20, count 2 2006.229.09:19:10.27#ibcon#first serial, iclass 20, count 2 2006.229.09:19:10.27#ibcon#enter sib2, iclass 20, count 2 2006.229.09:19:10.27#ibcon#flushed, iclass 20, count 2 2006.229.09:19:10.27#ibcon#about to write, iclass 20, count 2 2006.229.09:19:10.27#ibcon#wrote, iclass 20, count 2 2006.229.09:19:10.27#ibcon#about to read 3, iclass 20, count 2 2006.229.09:19:10.28#abcon#<5=/05 2.0 3.9 29.07 961000.9\r\n> 2006.229.09:19:10.29#ibcon#read 3, iclass 20, count 2 2006.229.09:19:10.29#ibcon#about to read 4, iclass 20, count 2 2006.229.09:19:10.29#ibcon#read 4, iclass 20, count 2 2006.229.09:19:10.29#ibcon#about to read 5, iclass 20, count 2 2006.229.09:19:10.29#ibcon#read 5, iclass 20, count 2 2006.229.09:19:10.29#ibcon#about to read 6, iclass 20, count 2 2006.229.09:19:10.29#ibcon#read 6, iclass 20, count 2 2006.229.09:19:10.29#ibcon#end of sib2, iclass 20, count 2 2006.229.09:19:10.29#ibcon#*mode == 0, iclass 20, count 2 2006.229.09:19:10.29#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.09:19:10.29#ibcon#[25=AT04-07\r\n] 2006.229.09:19:10.29#ibcon#*before write, iclass 20, count 2 2006.229.09:19:10.29#ibcon#enter sib2, iclass 20, count 2 2006.229.09:19:10.29#ibcon#flushed, iclass 20, count 2 2006.229.09:19:10.29#ibcon#about to write, iclass 20, count 2 2006.229.09:19:10.29#ibcon#wrote, iclass 20, count 2 2006.229.09:19:10.29#ibcon#about to read 3, iclass 20, count 2 2006.229.09:19:10.30#abcon#{5=INTERFACE CLEAR} 2006.229.09:19:10.32#ibcon#read 3, iclass 20, count 2 2006.229.09:19:10.32#ibcon#about to read 4, iclass 20, count 2 2006.229.09:19:10.32#ibcon#read 4, iclass 20, count 2 2006.229.09:19:10.32#ibcon#about to read 5, iclass 20, count 2 2006.229.09:19:10.32#ibcon#read 5, iclass 20, count 2 2006.229.09:19:10.32#ibcon#about to read 6, iclass 20, count 2 2006.229.09:19:10.32#ibcon#read 6, iclass 20, count 2 2006.229.09:19:10.32#ibcon#end of sib2, iclass 20, count 2 2006.229.09:19:10.32#ibcon#*after write, iclass 20, count 2 2006.229.09:19:10.32#ibcon#*before return 0, iclass 20, count 2 2006.229.09:19:10.32#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:10.32#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:10.32#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.09:19:10.32#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:10.32#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:10.36#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:19:10.44#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:10.44#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:10.44#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:19:10.44#ibcon#first serial, iclass 20, count 0 2006.229.09:19:10.44#ibcon#enter sib2, iclass 20, count 0 2006.229.09:19:10.44#ibcon#flushed, iclass 20, count 0 2006.229.09:19:10.44#ibcon#about to write, iclass 20, count 0 2006.229.09:19:10.44#ibcon#wrote, iclass 20, count 0 2006.229.09:19:10.44#ibcon#about to read 3, iclass 20, count 0 2006.229.09:19:10.46#ibcon#read 3, iclass 20, count 0 2006.229.09:19:10.46#ibcon#about to read 4, iclass 20, count 0 2006.229.09:19:10.46#ibcon#read 4, iclass 20, count 0 2006.229.09:19:10.46#ibcon#about to read 5, iclass 20, count 0 2006.229.09:19:10.46#ibcon#read 5, iclass 20, count 0 2006.229.09:19:10.46#ibcon#about to read 6, iclass 20, count 0 2006.229.09:19:10.46#ibcon#read 6, iclass 20, count 0 2006.229.09:19:10.46#ibcon#end of sib2, iclass 20, count 0 2006.229.09:19:10.46#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:19:10.46#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:19:10.46#ibcon#[25=USB\r\n] 2006.229.09:19:10.46#ibcon#*before write, iclass 20, count 0 2006.229.09:19:10.46#ibcon#enter sib2, iclass 20, count 0 2006.229.09:19:10.46#ibcon#flushed, iclass 20, count 0 2006.229.09:19:10.46#ibcon#about to write, iclass 20, count 0 2006.229.09:19:10.46#ibcon#wrote, iclass 20, count 0 2006.229.09:19:10.46#ibcon#about to read 3, iclass 20, count 0 2006.229.09:19:10.49#ibcon#read 3, iclass 20, count 0 2006.229.09:19:10.49#ibcon#about to read 4, iclass 20, count 0 2006.229.09:19:10.49#ibcon#read 4, iclass 20, count 0 2006.229.09:19:10.49#ibcon#about to read 5, iclass 20, count 0 2006.229.09:19:10.49#ibcon#read 5, iclass 20, count 0 2006.229.09:19:10.49#ibcon#about to read 6, iclass 20, count 0 2006.229.09:19:10.49#ibcon#read 6, iclass 20, count 0 2006.229.09:19:10.49#ibcon#end of sib2, iclass 20, count 0 2006.229.09:19:10.49#ibcon#*after write, iclass 20, count 0 2006.229.09:19:10.49#ibcon#*before return 0, iclass 20, count 0 2006.229.09:19:10.49#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:10.49#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:10.49#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:19:10.49#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:19:10.49$vck44/valo=5,734.99 2006.229.09:19:10.49#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.09:19:10.49#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.09:19:10.49#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:10.49#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:10.49#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:10.49#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:10.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:19:10.49#ibcon#first serial, iclass 26, count 0 2006.229.09:19:10.49#ibcon#enter sib2, iclass 26, count 0 2006.229.09:19:10.49#ibcon#flushed, iclass 26, count 0 2006.229.09:19:10.49#ibcon#about to write, iclass 26, count 0 2006.229.09:19:10.50#ibcon#wrote, iclass 26, count 0 2006.229.09:19:10.50#ibcon#about to read 3, iclass 26, count 0 2006.229.09:19:10.51#ibcon#read 3, iclass 26, count 0 2006.229.09:19:10.51#ibcon#about to read 4, iclass 26, count 0 2006.229.09:19:10.51#ibcon#read 4, iclass 26, count 0 2006.229.09:19:10.51#ibcon#about to read 5, iclass 26, count 0 2006.229.09:19:10.51#ibcon#read 5, iclass 26, count 0 2006.229.09:19:10.51#ibcon#about to read 6, iclass 26, count 0 2006.229.09:19:10.51#ibcon#read 6, iclass 26, count 0 2006.229.09:19:10.51#ibcon#end of sib2, iclass 26, count 0 2006.229.09:19:10.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:19:10.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:19:10.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:19:10.51#ibcon#*before write, iclass 26, count 0 2006.229.09:19:10.51#ibcon#enter sib2, iclass 26, count 0 2006.229.09:19:10.51#ibcon#flushed, iclass 26, count 0 2006.229.09:19:10.51#ibcon#about to write, iclass 26, count 0 2006.229.09:19:10.51#ibcon#wrote, iclass 26, count 0 2006.229.09:19:10.51#ibcon#about to read 3, iclass 26, count 0 2006.229.09:19:10.55#ibcon#read 3, iclass 26, count 0 2006.229.09:19:10.55#ibcon#about to read 4, iclass 26, count 0 2006.229.09:19:10.55#ibcon#read 4, iclass 26, count 0 2006.229.09:19:10.55#ibcon#about to read 5, iclass 26, count 0 2006.229.09:19:10.55#ibcon#read 5, iclass 26, count 0 2006.229.09:19:10.55#ibcon#about to read 6, iclass 26, count 0 2006.229.09:19:10.55#ibcon#read 6, iclass 26, count 0 2006.229.09:19:10.55#ibcon#end of sib2, iclass 26, count 0 2006.229.09:19:10.55#ibcon#*after write, iclass 26, count 0 2006.229.09:19:10.55#ibcon#*before return 0, iclass 26, count 0 2006.229.09:19:10.55#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:10.55#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:10.55#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:19:10.55#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:19:10.55$vck44/va=5,4 2006.229.09:19:10.55#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.09:19:10.55#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.09:19:10.55#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:10.55#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:10.61#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:10.61#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:10.61#ibcon#enter wrdev, iclass 28, count 2 2006.229.09:19:10.61#ibcon#first serial, iclass 28, count 2 2006.229.09:19:10.61#ibcon#enter sib2, iclass 28, count 2 2006.229.09:19:10.61#ibcon#flushed, iclass 28, count 2 2006.229.09:19:10.61#ibcon#about to write, iclass 28, count 2 2006.229.09:19:10.61#ibcon#wrote, iclass 28, count 2 2006.229.09:19:10.61#ibcon#about to read 3, iclass 28, count 2 2006.229.09:19:10.63#ibcon#read 3, iclass 28, count 2 2006.229.09:19:10.63#ibcon#about to read 4, iclass 28, count 2 2006.229.09:19:10.63#ibcon#read 4, iclass 28, count 2 2006.229.09:19:10.63#ibcon#about to read 5, iclass 28, count 2 2006.229.09:19:10.63#ibcon#read 5, iclass 28, count 2 2006.229.09:19:10.63#ibcon#about to read 6, iclass 28, count 2 2006.229.09:19:10.63#ibcon#read 6, iclass 28, count 2 2006.229.09:19:10.63#ibcon#end of sib2, iclass 28, count 2 2006.229.09:19:10.63#ibcon#*mode == 0, iclass 28, count 2 2006.229.09:19:10.63#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.09:19:10.63#ibcon#[25=AT05-04\r\n] 2006.229.09:19:10.63#ibcon#*before write, iclass 28, count 2 2006.229.09:19:10.63#ibcon#enter sib2, iclass 28, count 2 2006.229.09:19:10.63#ibcon#flushed, iclass 28, count 2 2006.229.09:19:10.63#ibcon#about to write, iclass 28, count 2 2006.229.09:19:10.63#ibcon#wrote, iclass 28, count 2 2006.229.09:19:10.63#ibcon#about to read 3, iclass 28, count 2 2006.229.09:19:10.66#ibcon#read 3, iclass 28, count 2 2006.229.09:19:10.66#ibcon#about to read 4, iclass 28, count 2 2006.229.09:19:10.66#ibcon#read 4, iclass 28, count 2 2006.229.09:19:10.66#ibcon#about to read 5, iclass 28, count 2 2006.229.09:19:10.66#ibcon#read 5, iclass 28, count 2 2006.229.09:19:10.66#ibcon#about to read 6, iclass 28, count 2 2006.229.09:19:10.66#ibcon#read 6, iclass 28, count 2 2006.229.09:19:10.66#ibcon#end of sib2, iclass 28, count 2 2006.229.09:19:10.66#ibcon#*after write, iclass 28, count 2 2006.229.09:19:10.66#ibcon#*before return 0, iclass 28, count 2 2006.229.09:19:10.66#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:10.66#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:10.66#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.09:19:10.66#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:10.66#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:10.78#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:10.78#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:10.78#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:19:10.78#ibcon#first serial, iclass 28, count 0 2006.229.09:19:10.78#ibcon#enter sib2, iclass 28, count 0 2006.229.09:19:10.78#ibcon#flushed, iclass 28, count 0 2006.229.09:19:10.78#ibcon#about to write, iclass 28, count 0 2006.229.09:19:10.78#ibcon#wrote, iclass 28, count 0 2006.229.09:19:10.78#ibcon#about to read 3, iclass 28, count 0 2006.229.09:19:10.80#ibcon#read 3, iclass 28, count 0 2006.229.09:19:10.80#ibcon#about to read 4, iclass 28, count 0 2006.229.09:19:10.80#ibcon#read 4, iclass 28, count 0 2006.229.09:19:10.80#ibcon#about to read 5, iclass 28, count 0 2006.229.09:19:10.80#ibcon#read 5, iclass 28, count 0 2006.229.09:19:10.80#ibcon#about to read 6, iclass 28, count 0 2006.229.09:19:10.80#ibcon#read 6, iclass 28, count 0 2006.229.09:19:10.80#ibcon#end of sib2, iclass 28, count 0 2006.229.09:19:10.80#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:19:10.80#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:19:10.80#ibcon#[25=USB\r\n] 2006.229.09:19:10.80#ibcon#*before write, iclass 28, count 0 2006.229.09:19:10.80#ibcon#enter sib2, iclass 28, count 0 2006.229.09:19:10.80#ibcon#flushed, iclass 28, count 0 2006.229.09:19:10.80#ibcon#about to write, iclass 28, count 0 2006.229.09:19:10.80#ibcon#wrote, iclass 28, count 0 2006.229.09:19:10.80#ibcon#about to read 3, iclass 28, count 0 2006.229.09:19:10.83#ibcon#read 3, iclass 28, count 0 2006.229.09:19:10.83#ibcon#about to read 4, iclass 28, count 0 2006.229.09:19:10.83#ibcon#read 4, iclass 28, count 0 2006.229.09:19:10.83#ibcon#about to read 5, iclass 28, count 0 2006.229.09:19:10.83#ibcon#read 5, iclass 28, count 0 2006.229.09:19:10.83#ibcon#about to read 6, iclass 28, count 0 2006.229.09:19:10.83#ibcon#read 6, iclass 28, count 0 2006.229.09:19:10.83#ibcon#end of sib2, iclass 28, count 0 2006.229.09:19:10.83#ibcon#*after write, iclass 28, count 0 2006.229.09:19:10.83#ibcon#*before return 0, iclass 28, count 0 2006.229.09:19:10.83#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:10.83#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:10.83#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:19:10.83#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:19:10.83$vck44/valo=6,814.99 2006.229.09:19:10.83#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.09:19:10.83#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.09:19:10.83#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:10.83#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:10.83#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:10.83#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:10.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:19:10.83#ibcon#first serial, iclass 30, count 0 2006.229.09:19:10.83#ibcon#enter sib2, iclass 30, count 0 2006.229.09:19:10.83#ibcon#flushed, iclass 30, count 0 2006.229.09:19:10.83#ibcon#about to write, iclass 30, count 0 2006.229.09:19:10.83#ibcon#wrote, iclass 30, count 0 2006.229.09:19:10.84#ibcon#about to read 3, iclass 30, count 0 2006.229.09:19:10.85#ibcon#read 3, iclass 30, count 0 2006.229.09:19:10.85#ibcon#about to read 4, iclass 30, count 0 2006.229.09:19:10.85#ibcon#read 4, iclass 30, count 0 2006.229.09:19:10.85#ibcon#about to read 5, iclass 30, count 0 2006.229.09:19:10.85#ibcon#read 5, iclass 30, count 0 2006.229.09:19:10.85#ibcon#about to read 6, iclass 30, count 0 2006.229.09:19:10.85#ibcon#read 6, iclass 30, count 0 2006.229.09:19:10.85#ibcon#end of sib2, iclass 30, count 0 2006.229.09:19:10.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:19:10.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:19:10.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:19:10.85#ibcon#*before write, iclass 30, count 0 2006.229.09:19:10.85#ibcon#enter sib2, iclass 30, count 0 2006.229.09:19:10.85#ibcon#flushed, iclass 30, count 0 2006.229.09:19:10.85#ibcon#about to write, iclass 30, count 0 2006.229.09:19:10.85#ibcon#wrote, iclass 30, count 0 2006.229.09:19:10.85#ibcon#about to read 3, iclass 30, count 0 2006.229.09:19:10.89#ibcon#read 3, iclass 30, count 0 2006.229.09:19:10.89#ibcon#about to read 4, iclass 30, count 0 2006.229.09:19:10.89#ibcon#read 4, iclass 30, count 0 2006.229.09:19:10.89#ibcon#about to read 5, iclass 30, count 0 2006.229.09:19:10.89#ibcon#read 5, iclass 30, count 0 2006.229.09:19:10.89#ibcon#about to read 6, iclass 30, count 0 2006.229.09:19:10.89#ibcon#read 6, iclass 30, count 0 2006.229.09:19:10.89#ibcon#end of sib2, iclass 30, count 0 2006.229.09:19:10.89#ibcon#*after write, iclass 30, count 0 2006.229.09:19:10.89#ibcon#*before return 0, iclass 30, count 0 2006.229.09:19:10.89#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:10.89#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:10.89#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:19:10.89#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:19:10.89$vck44/va=6,4 2006.229.09:19:10.89#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.09:19:10.89#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.09:19:10.89#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:10.89#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:10.95#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:10.95#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:10.95#ibcon#enter wrdev, iclass 32, count 2 2006.229.09:19:10.95#ibcon#first serial, iclass 32, count 2 2006.229.09:19:10.95#ibcon#enter sib2, iclass 32, count 2 2006.229.09:19:10.95#ibcon#flushed, iclass 32, count 2 2006.229.09:19:10.95#ibcon#about to write, iclass 32, count 2 2006.229.09:19:10.95#ibcon#wrote, iclass 32, count 2 2006.229.09:19:10.95#ibcon#about to read 3, iclass 32, count 2 2006.229.09:19:10.97#ibcon#read 3, iclass 32, count 2 2006.229.09:19:10.97#ibcon#about to read 4, iclass 32, count 2 2006.229.09:19:10.97#ibcon#read 4, iclass 32, count 2 2006.229.09:19:10.97#ibcon#about to read 5, iclass 32, count 2 2006.229.09:19:10.97#ibcon#read 5, iclass 32, count 2 2006.229.09:19:10.97#ibcon#about to read 6, iclass 32, count 2 2006.229.09:19:10.97#ibcon#read 6, iclass 32, count 2 2006.229.09:19:10.97#ibcon#end of sib2, iclass 32, count 2 2006.229.09:19:10.97#ibcon#*mode == 0, iclass 32, count 2 2006.229.09:19:10.97#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.09:19:10.97#ibcon#[25=AT06-04\r\n] 2006.229.09:19:10.97#ibcon#*before write, iclass 32, count 2 2006.229.09:19:10.97#ibcon#enter sib2, iclass 32, count 2 2006.229.09:19:10.97#ibcon#flushed, iclass 32, count 2 2006.229.09:19:10.97#ibcon#about to write, iclass 32, count 2 2006.229.09:19:10.97#ibcon#wrote, iclass 32, count 2 2006.229.09:19:10.97#ibcon#about to read 3, iclass 32, count 2 2006.229.09:19:11.00#ibcon#read 3, iclass 32, count 2 2006.229.09:19:11.00#ibcon#about to read 4, iclass 32, count 2 2006.229.09:19:11.00#ibcon#read 4, iclass 32, count 2 2006.229.09:19:11.00#ibcon#about to read 5, iclass 32, count 2 2006.229.09:19:11.00#ibcon#read 5, iclass 32, count 2 2006.229.09:19:11.00#ibcon#about to read 6, iclass 32, count 2 2006.229.09:19:11.00#ibcon#read 6, iclass 32, count 2 2006.229.09:19:11.00#ibcon#end of sib2, iclass 32, count 2 2006.229.09:19:11.00#ibcon#*after write, iclass 32, count 2 2006.229.09:19:11.00#ibcon#*before return 0, iclass 32, count 2 2006.229.09:19:11.00#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:11.00#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:11.00#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.09:19:11.00#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:11.00#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:11.12#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:11.12#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:11.12#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:19:11.12#ibcon#first serial, iclass 32, count 0 2006.229.09:19:11.12#ibcon#enter sib2, iclass 32, count 0 2006.229.09:19:11.12#ibcon#flushed, iclass 32, count 0 2006.229.09:19:11.12#ibcon#about to write, iclass 32, count 0 2006.229.09:19:11.12#ibcon#wrote, iclass 32, count 0 2006.229.09:19:11.12#ibcon#about to read 3, iclass 32, count 0 2006.229.09:19:11.14#ibcon#read 3, iclass 32, count 0 2006.229.09:19:11.14#ibcon#about to read 4, iclass 32, count 0 2006.229.09:19:11.14#ibcon#read 4, iclass 32, count 0 2006.229.09:19:11.14#ibcon#about to read 5, iclass 32, count 0 2006.229.09:19:11.14#ibcon#read 5, iclass 32, count 0 2006.229.09:19:11.14#ibcon#about to read 6, iclass 32, count 0 2006.229.09:19:11.14#ibcon#read 6, iclass 32, count 0 2006.229.09:19:11.14#ibcon#end of sib2, iclass 32, count 0 2006.229.09:19:11.14#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:19:11.14#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:19:11.14#ibcon#[25=USB\r\n] 2006.229.09:19:11.14#ibcon#*before write, iclass 32, count 0 2006.229.09:19:11.14#ibcon#enter sib2, iclass 32, count 0 2006.229.09:19:11.14#ibcon#flushed, iclass 32, count 0 2006.229.09:19:11.14#ibcon#about to write, iclass 32, count 0 2006.229.09:19:11.14#ibcon#wrote, iclass 32, count 0 2006.229.09:19:11.14#ibcon#about to read 3, iclass 32, count 0 2006.229.09:19:11.17#ibcon#read 3, iclass 32, count 0 2006.229.09:19:11.17#ibcon#about to read 4, iclass 32, count 0 2006.229.09:19:11.17#ibcon#read 4, iclass 32, count 0 2006.229.09:19:11.17#ibcon#about to read 5, iclass 32, count 0 2006.229.09:19:11.17#ibcon#read 5, iclass 32, count 0 2006.229.09:19:11.17#ibcon#about to read 6, iclass 32, count 0 2006.229.09:19:11.17#ibcon#read 6, iclass 32, count 0 2006.229.09:19:11.17#ibcon#end of sib2, iclass 32, count 0 2006.229.09:19:11.17#ibcon#*after write, iclass 32, count 0 2006.229.09:19:11.17#ibcon#*before return 0, iclass 32, count 0 2006.229.09:19:11.17#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:11.17#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:11.17#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:19:11.17#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:19:11.17$vck44/valo=7,864.99 2006.229.09:19:11.17#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.09:19:11.17#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.09:19:11.17#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:11.17#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:11.17#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:11.17#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:11.17#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:19:11.17#ibcon#first serial, iclass 34, count 0 2006.229.09:19:11.17#ibcon#enter sib2, iclass 34, count 0 2006.229.09:19:11.17#ibcon#flushed, iclass 34, count 0 2006.229.09:19:11.17#ibcon#about to write, iclass 34, count 0 2006.229.09:19:11.17#ibcon#wrote, iclass 34, count 0 2006.229.09:19:11.18#ibcon#about to read 3, iclass 34, count 0 2006.229.09:19:11.19#ibcon#read 3, iclass 34, count 0 2006.229.09:19:11.19#ibcon#about to read 4, iclass 34, count 0 2006.229.09:19:11.19#ibcon#read 4, iclass 34, count 0 2006.229.09:19:11.19#ibcon#about to read 5, iclass 34, count 0 2006.229.09:19:11.19#ibcon#read 5, iclass 34, count 0 2006.229.09:19:11.19#ibcon#about to read 6, iclass 34, count 0 2006.229.09:19:11.19#ibcon#read 6, iclass 34, count 0 2006.229.09:19:11.19#ibcon#end of sib2, iclass 34, count 0 2006.229.09:19:11.19#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:19:11.19#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:19:11.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:19:11.19#ibcon#*before write, iclass 34, count 0 2006.229.09:19:11.19#ibcon#enter sib2, iclass 34, count 0 2006.229.09:19:11.19#ibcon#flushed, iclass 34, count 0 2006.229.09:19:11.19#ibcon#about to write, iclass 34, count 0 2006.229.09:19:11.19#ibcon#wrote, iclass 34, count 0 2006.229.09:19:11.19#ibcon#about to read 3, iclass 34, count 0 2006.229.09:19:11.23#ibcon#read 3, iclass 34, count 0 2006.229.09:19:11.23#ibcon#about to read 4, iclass 34, count 0 2006.229.09:19:11.23#ibcon#read 4, iclass 34, count 0 2006.229.09:19:11.23#ibcon#about to read 5, iclass 34, count 0 2006.229.09:19:11.23#ibcon#read 5, iclass 34, count 0 2006.229.09:19:11.23#ibcon#about to read 6, iclass 34, count 0 2006.229.09:19:11.23#ibcon#read 6, iclass 34, count 0 2006.229.09:19:11.23#ibcon#end of sib2, iclass 34, count 0 2006.229.09:19:11.23#ibcon#*after write, iclass 34, count 0 2006.229.09:19:11.23#ibcon#*before return 0, iclass 34, count 0 2006.229.09:19:11.23#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:11.23#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:11.23#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:19:11.23#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:19:11.23$vck44/va=7,5 2006.229.09:19:11.23#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.09:19:11.23#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.09:19:11.23#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:11.23#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:11.29#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:11.29#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:11.29#ibcon#enter wrdev, iclass 36, count 2 2006.229.09:19:11.29#ibcon#first serial, iclass 36, count 2 2006.229.09:19:11.29#ibcon#enter sib2, iclass 36, count 2 2006.229.09:19:11.29#ibcon#flushed, iclass 36, count 2 2006.229.09:19:11.29#ibcon#about to write, iclass 36, count 2 2006.229.09:19:11.29#ibcon#wrote, iclass 36, count 2 2006.229.09:19:11.29#ibcon#about to read 3, iclass 36, count 2 2006.229.09:19:11.31#ibcon#read 3, iclass 36, count 2 2006.229.09:19:11.31#ibcon#about to read 4, iclass 36, count 2 2006.229.09:19:11.31#ibcon#read 4, iclass 36, count 2 2006.229.09:19:11.31#ibcon#about to read 5, iclass 36, count 2 2006.229.09:19:11.31#ibcon#read 5, iclass 36, count 2 2006.229.09:19:11.31#ibcon#about to read 6, iclass 36, count 2 2006.229.09:19:11.31#ibcon#read 6, iclass 36, count 2 2006.229.09:19:11.31#ibcon#end of sib2, iclass 36, count 2 2006.229.09:19:11.31#ibcon#*mode == 0, iclass 36, count 2 2006.229.09:19:11.31#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.09:19:11.31#ibcon#[25=AT07-05\r\n] 2006.229.09:19:11.31#ibcon#*before write, iclass 36, count 2 2006.229.09:19:11.31#ibcon#enter sib2, iclass 36, count 2 2006.229.09:19:11.31#ibcon#flushed, iclass 36, count 2 2006.229.09:19:11.31#ibcon#about to write, iclass 36, count 2 2006.229.09:19:11.31#ibcon#wrote, iclass 36, count 2 2006.229.09:19:11.31#ibcon#about to read 3, iclass 36, count 2 2006.229.09:19:11.34#ibcon#read 3, iclass 36, count 2 2006.229.09:19:11.34#ibcon#about to read 4, iclass 36, count 2 2006.229.09:19:11.34#ibcon#read 4, iclass 36, count 2 2006.229.09:19:11.34#ibcon#about to read 5, iclass 36, count 2 2006.229.09:19:11.34#ibcon#read 5, iclass 36, count 2 2006.229.09:19:11.34#ibcon#about to read 6, iclass 36, count 2 2006.229.09:19:11.34#ibcon#read 6, iclass 36, count 2 2006.229.09:19:11.34#ibcon#end of sib2, iclass 36, count 2 2006.229.09:19:11.34#ibcon#*after write, iclass 36, count 2 2006.229.09:19:11.34#ibcon#*before return 0, iclass 36, count 2 2006.229.09:19:11.34#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:11.34#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:11.34#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.09:19:11.34#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:11.34#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:11.46#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:11.46#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:11.46#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:19:11.46#ibcon#first serial, iclass 36, count 0 2006.229.09:19:11.46#ibcon#enter sib2, iclass 36, count 0 2006.229.09:19:11.46#ibcon#flushed, iclass 36, count 0 2006.229.09:19:11.46#ibcon#about to write, iclass 36, count 0 2006.229.09:19:11.46#ibcon#wrote, iclass 36, count 0 2006.229.09:19:11.46#ibcon#about to read 3, iclass 36, count 0 2006.229.09:19:11.48#ibcon#read 3, iclass 36, count 0 2006.229.09:19:11.48#ibcon#about to read 4, iclass 36, count 0 2006.229.09:19:11.48#ibcon#read 4, iclass 36, count 0 2006.229.09:19:11.48#ibcon#about to read 5, iclass 36, count 0 2006.229.09:19:11.48#ibcon#read 5, iclass 36, count 0 2006.229.09:19:11.48#ibcon#about to read 6, iclass 36, count 0 2006.229.09:19:11.48#ibcon#read 6, iclass 36, count 0 2006.229.09:19:11.48#ibcon#end of sib2, iclass 36, count 0 2006.229.09:19:11.48#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:19:11.48#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:19:11.48#ibcon#[25=USB\r\n] 2006.229.09:19:11.48#ibcon#*before write, iclass 36, count 0 2006.229.09:19:11.48#ibcon#enter sib2, iclass 36, count 0 2006.229.09:19:11.48#ibcon#flushed, iclass 36, count 0 2006.229.09:19:11.48#ibcon#about to write, iclass 36, count 0 2006.229.09:19:11.48#ibcon#wrote, iclass 36, count 0 2006.229.09:19:11.48#ibcon#about to read 3, iclass 36, count 0 2006.229.09:19:11.51#ibcon#read 3, iclass 36, count 0 2006.229.09:19:11.51#ibcon#about to read 4, iclass 36, count 0 2006.229.09:19:11.51#ibcon#read 4, iclass 36, count 0 2006.229.09:19:11.51#ibcon#about to read 5, iclass 36, count 0 2006.229.09:19:11.51#ibcon#read 5, iclass 36, count 0 2006.229.09:19:11.51#ibcon#about to read 6, iclass 36, count 0 2006.229.09:19:11.51#ibcon#read 6, iclass 36, count 0 2006.229.09:19:11.51#ibcon#end of sib2, iclass 36, count 0 2006.229.09:19:11.51#ibcon#*after write, iclass 36, count 0 2006.229.09:19:11.51#ibcon#*before return 0, iclass 36, count 0 2006.229.09:19:11.51#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:11.51#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:11.51#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:19:11.51#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:19:11.51$vck44/valo=8,884.99 2006.229.09:19:11.51#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.09:19:11.51#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.09:19:11.51#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:11.51#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:11.51#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:11.51#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:11.51#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:19:11.51#ibcon#first serial, iclass 38, count 0 2006.229.09:19:11.51#ibcon#enter sib2, iclass 38, count 0 2006.229.09:19:11.51#ibcon#flushed, iclass 38, count 0 2006.229.09:19:11.51#ibcon#about to write, iclass 38, count 0 2006.229.09:19:11.52#ibcon#wrote, iclass 38, count 0 2006.229.09:19:11.52#ibcon#about to read 3, iclass 38, count 0 2006.229.09:19:11.53#ibcon#read 3, iclass 38, count 0 2006.229.09:19:11.53#ibcon#about to read 4, iclass 38, count 0 2006.229.09:19:11.53#ibcon#read 4, iclass 38, count 0 2006.229.09:19:11.53#ibcon#about to read 5, iclass 38, count 0 2006.229.09:19:11.53#ibcon#read 5, iclass 38, count 0 2006.229.09:19:11.53#ibcon#about to read 6, iclass 38, count 0 2006.229.09:19:11.53#ibcon#read 6, iclass 38, count 0 2006.229.09:19:11.53#ibcon#end of sib2, iclass 38, count 0 2006.229.09:19:11.53#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:19:11.53#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:19:11.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:19:11.53#ibcon#*before write, iclass 38, count 0 2006.229.09:19:11.53#ibcon#enter sib2, iclass 38, count 0 2006.229.09:19:11.53#ibcon#flushed, iclass 38, count 0 2006.229.09:19:11.53#ibcon#about to write, iclass 38, count 0 2006.229.09:19:11.53#ibcon#wrote, iclass 38, count 0 2006.229.09:19:11.53#ibcon#about to read 3, iclass 38, count 0 2006.229.09:19:11.57#ibcon#read 3, iclass 38, count 0 2006.229.09:19:11.57#ibcon#about to read 4, iclass 38, count 0 2006.229.09:19:11.57#ibcon#read 4, iclass 38, count 0 2006.229.09:19:11.57#ibcon#about to read 5, iclass 38, count 0 2006.229.09:19:11.57#ibcon#read 5, iclass 38, count 0 2006.229.09:19:11.57#ibcon#about to read 6, iclass 38, count 0 2006.229.09:19:11.57#ibcon#read 6, iclass 38, count 0 2006.229.09:19:11.57#ibcon#end of sib2, iclass 38, count 0 2006.229.09:19:11.57#ibcon#*after write, iclass 38, count 0 2006.229.09:19:11.57#ibcon#*before return 0, iclass 38, count 0 2006.229.09:19:11.57#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:11.57#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:11.57#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:19:11.57#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:19:11.57$vck44/va=8,6 2006.229.09:19:11.57#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.09:19:11.57#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.09:19:11.57#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:11.57#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:19:11.63#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:19:11.63#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:19:11.63#ibcon#enter wrdev, iclass 40, count 2 2006.229.09:19:11.63#ibcon#first serial, iclass 40, count 2 2006.229.09:19:11.63#ibcon#enter sib2, iclass 40, count 2 2006.229.09:19:11.63#ibcon#flushed, iclass 40, count 2 2006.229.09:19:11.63#ibcon#about to write, iclass 40, count 2 2006.229.09:19:11.63#ibcon#wrote, iclass 40, count 2 2006.229.09:19:11.63#ibcon#about to read 3, iclass 40, count 2 2006.229.09:19:11.65#ibcon#read 3, iclass 40, count 2 2006.229.09:19:11.65#ibcon#about to read 4, iclass 40, count 2 2006.229.09:19:11.65#ibcon#read 4, iclass 40, count 2 2006.229.09:19:11.65#ibcon#about to read 5, iclass 40, count 2 2006.229.09:19:11.65#ibcon#read 5, iclass 40, count 2 2006.229.09:19:11.65#ibcon#about to read 6, iclass 40, count 2 2006.229.09:19:11.65#ibcon#read 6, iclass 40, count 2 2006.229.09:19:11.65#ibcon#end of sib2, iclass 40, count 2 2006.229.09:19:11.65#ibcon#*mode == 0, iclass 40, count 2 2006.229.09:19:11.65#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.09:19:11.65#ibcon#[25=AT08-06\r\n] 2006.229.09:19:11.65#ibcon#*before write, iclass 40, count 2 2006.229.09:19:11.65#ibcon#enter sib2, iclass 40, count 2 2006.229.09:19:11.65#ibcon#flushed, iclass 40, count 2 2006.229.09:19:11.65#ibcon#about to write, iclass 40, count 2 2006.229.09:19:11.65#ibcon#wrote, iclass 40, count 2 2006.229.09:19:11.65#ibcon#about to read 3, iclass 40, count 2 2006.229.09:19:11.68#ibcon#read 3, iclass 40, count 2 2006.229.09:19:11.68#ibcon#about to read 4, iclass 40, count 2 2006.229.09:19:11.68#ibcon#read 4, iclass 40, count 2 2006.229.09:19:11.68#ibcon#about to read 5, iclass 40, count 2 2006.229.09:19:11.68#ibcon#read 5, iclass 40, count 2 2006.229.09:19:11.68#ibcon#about to read 6, iclass 40, count 2 2006.229.09:19:11.68#ibcon#read 6, iclass 40, count 2 2006.229.09:19:11.68#ibcon#end of sib2, iclass 40, count 2 2006.229.09:19:11.68#ibcon#*after write, iclass 40, count 2 2006.229.09:19:11.68#ibcon#*before return 0, iclass 40, count 2 2006.229.09:19:11.68#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:19:11.68#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:19:11.68#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.09:19:11.68#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:11.68#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:19:11.80#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:19:11.80#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:19:11.80#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:19:11.80#ibcon#first serial, iclass 40, count 0 2006.229.09:19:11.80#ibcon#enter sib2, iclass 40, count 0 2006.229.09:19:11.80#ibcon#flushed, iclass 40, count 0 2006.229.09:19:11.80#ibcon#about to write, iclass 40, count 0 2006.229.09:19:11.80#ibcon#wrote, iclass 40, count 0 2006.229.09:19:11.80#ibcon#about to read 3, iclass 40, count 0 2006.229.09:19:11.82#ibcon#read 3, iclass 40, count 0 2006.229.09:19:11.82#ibcon#about to read 4, iclass 40, count 0 2006.229.09:19:11.82#ibcon#read 4, iclass 40, count 0 2006.229.09:19:11.82#ibcon#about to read 5, iclass 40, count 0 2006.229.09:19:11.82#ibcon#read 5, iclass 40, count 0 2006.229.09:19:11.82#ibcon#about to read 6, iclass 40, count 0 2006.229.09:19:11.82#ibcon#read 6, iclass 40, count 0 2006.229.09:19:11.82#ibcon#end of sib2, iclass 40, count 0 2006.229.09:19:11.82#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:19:11.82#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:19:11.82#ibcon#[25=USB\r\n] 2006.229.09:19:11.82#ibcon#*before write, iclass 40, count 0 2006.229.09:19:11.82#ibcon#enter sib2, iclass 40, count 0 2006.229.09:19:11.82#ibcon#flushed, iclass 40, count 0 2006.229.09:19:11.82#ibcon#about to write, iclass 40, count 0 2006.229.09:19:11.82#ibcon#wrote, iclass 40, count 0 2006.229.09:19:11.82#ibcon#about to read 3, iclass 40, count 0 2006.229.09:19:11.85#ibcon#read 3, iclass 40, count 0 2006.229.09:19:11.85#ibcon#about to read 4, iclass 40, count 0 2006.229.09:19:11.85#ibcon#read 4, iclass 40, count 0 2006.229.09:19:11.85#ibcon#about to read 5, iclass 40, count 0 2006.229.09:19:11.85#ibcon#read 5, iclass 40, count 0 2006.229.09:19:11.85#ibcon#about to read 6, iclass 40, count 0 2006.229.09:19:11.85#ibcon#read 6, iclass 40, count 0 2006.229.09:19:11.85#ibcon#end of sib2, iclass 40, count 0 2006.229.09:19:11.85#ibcon#*after write, iclass 40, count 0 2006.229.09:19:11.85#ibcon#*before return 0, iclass 40, count 0 2006.229.09:19:11.85#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:19:11.85#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:19:11.85#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:19:11.85#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:19:11.85$vck44/vblo=1,629.99 2006.229.09:19:11.85#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.09:19:11.85#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.09:19:11.85#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:11.85#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:11.85#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:11.85#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:11.85#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:19:11.85#ibcon#first serial, iclass 4, count 0 2006.229.09:19:11.85#ibcon#enter sib2, iclass 4, count 0 2006.229.09:19:11.85#ibcon#flushed, iclass 4, count 0 2006.229.09:19:11.85#ibcon#about to write, iclass 4, count 0 2006.229.09:19:11.86#ibcon#wrote, iclass 4, count 0 2006.229.09:19:11.86#ibcon#about to read 3, iclass 4, count 0 2006.229.09:19:11.87#ibcon#read 3, iclass 4, count 0 2006.229.09:19:11.87#ibcon#about to read 4, iclass 4, count 0 2006.229.09:19:11.87#ibcon#read 4, iclass 4, count 0 2006.229.09:19:11.87#ibcon#about to read 5, iclass 4, count 0 2006.229.09:19:11.87#ibcon#read 5, iclass 4, count 0 2006.229.09:19:11.87#ibcon#about to read 6, iclass 4, count 0 2006.229.09:19:11.87#ibcon#read 6, iclass 4, count 0 2006.229.09:19:11.87#ibcon#end of sib2, iclass 4, count 0 2006.229.09:19:11.87#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:19:11.87#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:19:11.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:19:11.87#ibcon#*before write, iclass 4, count 0 2006.229.09:19:11.87#ibcon#enter sib2, iclass 4, count 0 2006.229.09:19:11.87#ibcon#flushed, iclass 4, count 0 2006.229.09:19:11.87#ibcon#about to write, iclass 4, count 0 2006.229.09:19:11.87#ibcon#wrote, iclass 4, count 0 2006.229.09:19:11.87#ibcon#about to read 3, iclass 4, count 0 2006.229.09:19:11.91#ibcon#read 3, iclass 4, count 0 2006.229.09:19:11.91#ibcon#about to read 4, iclass 4, count 0 2006.229.09:19:11.91#ibcon#read 4, iclass 4, count 0 2006.229.09:19:11.91#ibcon#about to read 5, iclass 4, count 0 2006.229.09:19:11.91#ibcon#read 5, iclass 4, count 0 2006.229.09:19:11.91#ibcon#about to read 6, iclass 4, count 0 2006.229.09:19:11.91#ibcon#read 6, iclass 4, count 0 2006.229.09:19:11.91#ibcon#end of sib2, iclass 4, count 0 2006.229.09:19:11.91#ibcon#*after write, iclass 4, count 0 2006.229.09:19:11.91#ibcon#*before return 0, iclass 4, count 0 2006.229.09:19:11.91#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:11.91#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:19:11.91#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:19:11.91#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:19:11.91$vck44/vb=1,4 2006.229.09:19:11.91#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.09:19:11.91#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.09:19:11.91#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:11.91#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:11.91#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:11.91#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:11.91#ibcon#enter wrdev, iclass 6, count 2 2006.229.09:19:11.91#ibcon#first serial, iclass 6, count 2 2006.229.09:19:11.91#ibcon#enter sib2, iclass 6, count 2 2006.229.09:19:11.91#ibcon#flushed, iclass 6, count 2 2006.229.09:19:11.91#ibcon#about to write, iclass 6, count 2 2006.229.09:19:11.91#ibcon#wrote, iclass 6, count 2 2006.229.09:19:11.91#ibcon#about to read 3, iclass 6, count 2 2006.229.09:19:11.93#ibcon#read 3, iclass 6, count 2 2006.229.09:19:11.93#ibcon#about to read 4, iclass 6, count 2 2006.229.09:19:11.93#ibcon#read 4, iclass 6, count 2 2006.229.09:19:11.93#ibcon#about to read 5, iclass 6, count 2 2006.229.09:19:11.93#ibcon#read 5, iclass 6, count 2 2006.229.09:19:11.93#ibcon#about to read 6, iclass 6, count 2 2006.229.09:19:11.93#ibcon#read 6, iclass 6, count 2 2006.229.09:19:11.93#ibcon#end of sib2, iclass 6, count 2 2006.229.09:19:11.93#ibcon#*mode == 0, iclass 6, count 2 2006.229.09:19:11.93#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.09:19:11.93#ibcon#[27=AT01-04\r\n] 2006.229.09:19:11.93#ibcon#*before write, iclass 6, count 2 2006.229.09:19:11.93#ibcon#enter sib2, iclass 6, count 2 2006.229.09:19:11.93#ibcon#flushed, iclass 6, count 2 2006.229.09:19:11.93#ibcon#about to write, iclass 6, count 2 2006.229.09:19:11.93#ibcon#wrote, iclass 6, count 2 2006.229.09:19:11.93#ibcon#about to read 3, iclass 6, count 2 2006.229.09:19:11.96#ibcon#read 3, iclass 6, count 2 2006.229.09:19:11.96#ibcon#about to read 4, iclass 6, count 2 2006.229.09:19:11.96#ibcon#read 4, iclass 6, count 2 2006.229.09:19:11.96#ibcon#about to read 5, iclass 6, count 2 2006.229.09:19:11.96#ibcon#read 5, iclass 6, count 2 2006.229.09:19:11.96#ibcon#about to read 6, iclass 6, count 2 2006.229.09:19:11.96#ibcon#read 6, iclass 6, count 2 2006.229.09:19:11.96#ibcon#end of sib2, iclass 6, count 2 2006.229.09:19:11.96#ibcon#*after write, iclass 6, count 2 2006.229.09:19:11.96#ibcon#*before return 0, iclass 6, count 2 2006.229.09:19:11.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:11.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:19:11.96#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.09:19:11.96#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:11.96#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:12.08#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:12.08#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:12.08#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:19:12.08#ibcon#first serial, iclass 6, count 0 2006.229.09:19:12.08#ibcon#enter sib2, iclass 6, count 0 2006.229.09:19:12.08#ibcon#flushed, iclass 6, count 0 2006.229.09:19:12.08#ibcon#about to write, iclass 6, count 0 2006.229.09:19:12.08#ibcon#wrote, iclass 6, count 0 2006.229.09:19:12.08#ibcon#about to read 3, iclass 6, count 0 2006.229.09:19:12.10#ibcon#read 3, iclass 6, count 0 2006.229.09:19:12.10#ibcon#about to read 4, iclass 6, count 0 2006.229.09:19:12.10#ibcon#read 4, iclass 6, count 0 2006.229.09:19:12.10#ibcon#about to read 5, iclass 6, count 0 2006.229.09:19:12.10#ibcon#read 5, iclass 6, count 0 2006.229.09:19:12.10#ibcon#about to read 6, iclass 6, count 0 2006.229.09:19:12.10#ibcon#read 6, iclass 6, count 0 2006.229.09:19:12.10#ibcon#end of sib2, iclass 6, count 0 2006.229.09:19:12.10#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:19:12.10#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:19:12.10#ibcon#[27=USB\r\n] 2006.229.09:19:12.10#ibcon#*before write, iclass 6, count 0 2006.229.09:19:12.10#ibcon#enter sib2, iclass 6, count 0 2006.229.09:19:12.10#ibcon#flushed, iclass 6, count 0 2006.229.09:19:12.10#ibcon#about to write, iclass 6, count 0 2006.229.09:19:12.10#ibcon#wrote, iclass 6, count 0 2006.229.09:19:12.10#ibcon#about to read 3, iclass 6, count 0 2006.229.09:19:12.13#ibcon#read 3, iclass 6, count 0 2006.229.09:19:12.13#ibcon#about to read 4, iclass 6, count 0 2006.229.09:19:12.13#ibcon#read 4, iclass 6, count 0 2006.229.09:19:12.13#ibcon#about to read 5, iclass 6, count 0 2006.229.09:19:12.13#ibcon#read 5, iclass 6, count 0 2006.229.09:19:12.13#ibcon#about to read 6, iclass 6, count 0 2006.229.09:19:12.13#ibcon#read 6, iclass 6, count 0 2006.229.09:19:12.13#ibcon#end of sib2, iclass 6, count 0 2006.229.09:19:12.13#ibcon#*after write, iclass 6, count 0 2006.229.09:19:12.13#ibcon#*before return 0, iclass 6, count 0 2006.229.09:19:12.13#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:12.13#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:19:12.13#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:19:12.13#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:19:12.13$vck44/vblo=2,634.99 2006.229.09:19:12.13#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.09:19:12.13#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.09:19:12.13#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:12.13#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:12.13#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:12.13#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:12.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:19:12.13#ibcon#first serial, iclass 10, count 0 2006.229.09:19:12.13#ibcon#enter sib2, iclass 10, count 0 2006.229.09:19:12.13#ibcon#flushed, iclass 10, count 0 2006.229.09:19:12.13#ibcon#about to write, iclass 10, count 0 2006.229.09:19:12.14#ibcon#wrote, iclass 10, count 0 2006.229.09:19:12.14#ibcon#about to read 3, iclass 10, count 0 2006.229.09:19:12.15#ibcon#read 3, iclass 10, count 0 2006.229.09:19:12.15#ibcon#about to read 4, iclass 10, count 0 2006.229.09:19:12.15#ibcon#read 4, iclass 10, count 0 2006.229.09:19:12.15#ibcon#about to read 5, iclass 10, count 0 2006.229.09:19:12.15#ibcon#read 5, iclass 10, count 0 2006.229.09:19:12.15#ibcon#about to read 6, iclass 10, count 0 2006.229.09:19:12.15#ibcon#read 6, iclass 10, count 0 2006.229.09:19:12.15#ibcon#end of sib2, iclass 10, count 0 2006.229.09:19:12.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:19:12.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:19:12.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:19:12.15#ibcon#*before write, iclass 10, count 0 2006.229.09:19:12.15#ibcon#enter sib2, iclass 10, count 0 2006.229.09:19:12.15#ibcon#flushed, iclass 10, count 0 2006.229.09:19:12.15#ibcon#about to write, iclass 10, count 0 2006.229.09:19:12.15#ibcon#wrote, iclass 10, count 0 2006.229.09:19:12.15#ibcon#about to read 3, iclass 10, count 0 2006.229.09:19:12.19#ibcon#read 3, iclass 10, count 0 2006.229.09:19:12.19#ibcon#about to read 4, iclass 10, count 0 2006.229.09:19:12.19#ibcon#read 4, iclass 10, count 0 2006.229.09:19:12.19#ibcon#about to read 5, iclass 10, count 0 2006.229.09:19:12.19#ibcon#read 5, iclass 10, count 0 2006.229.09:19:12.19#ibcon#about to read 6, iclass 10, count 0 2006.229.09:19:12.19#ibcon#read 6, iclass 10, count 0 2006.229.09:19:12.19#ibcon#end of sib2, iclass 10, count 0 2006.229.09:19:12.19#ibcon#*after write, iclass 10, count 0 2006.229.09:19:12.19#ibcon#*before return 0, iclass 10, count 0 2006.229.09:19:12.19#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:12.19#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:19:12.19#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:19:12.19#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:19:12.19$vck44/vb=2,4 2006.229.09:19:12.19#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.09:19:12.19#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.09:19:12.19#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:12.19#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:12.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:12.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:12.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.09:19:12.25#ibcon#first serial, iclass 12, count 2 2006.229.09:19:12.25#ibcon#enter sib2, iclass 12, count 2 2006.229.09:19:12.25#ibcon#flushed, iclass 12, count 2 2006.229.09:19:12.25#ibcon#about to write, iclass 12, count 2 2006.229.09:19:12.25#ibcon#wrote, iclass 12, count 2 2006.229.09:19:12.25#ibcon#about to read 3, iclass 12, count 2 2006.229.09:19:12.27#ibcon#read 3, iclass 12, count 2 2006.229.09:19:12.27#ibcon#about to read 4, iclass 12, count 2 2006.229.09:19:12.27#ibcon#read 4, iclass 12, count 2 2006.229.09:19:12.27#ibcon#about to read 5, iclass 12, count 2 2006.229.09:19:12.27#ibcon#read 5, iclass 12, count 2 2006.229.09:19:12.27#ibcon#about to read 6, iclass 12, count 2 2006.229.09:19:12.27#ibcon#read 6, iclass 12, count 2 2006.229.09:19:12.27#ibcon#end of sib2, iclass 12, count 2 2006.229.09:19:12.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.09:19:12.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.09:19:12.27#ibcon#[27=AT02-04\r\n] 2006.229.09:19:12.27#ibcon#*before write, iclass 12, count 2 2006.229.09:19:12.27#ibcon#enter sib2, iclass 12, count 2 2006.229.09:19:12.27#ibcon#flushed, iclass 12, count 2 2006.229.09:19:12.27#ibcon#about to write, iclass 12, count 2 2006.229.09:19:12.27#ibcon#wrote, iclass 12, count 2 2006.229.09:19:12.27#ibcon#about to read 3, iclass 12, count 2 2006.229.09:19:12.30#ibcon#read 3, iclass 12, count 2 2006.229.09:19:12.30#ibcon#about to read 4, iclass 12, count 2 2006.229.09:19:12.30#ibcon#read 4, iclass 12, count 2 2006.229.09:19:12.30#ibcon#about to read 5, iclass 12, count 2 2006.229.09:19:12.30#ibcon#read 5, iclass 12, count 2 2006.229.09:19:12.30#ibcon#about to read 6, iclass 12, count 2 2006.229.09:19:12.30#ibcon#read 6, iclass 12, count 2 2006.229.09:19:12.30#ibcon#end of sib2, iclass 12, count 2 2006.229.09:19:12.30#ibcon#*after write, iclass 12, count 2 2006.229.09:19:12.30#ibcon#*before return 0, iclass 12, count 2 2006.229.09:19:12.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:12.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:19:12.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.09:19:12.30#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:12.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:12.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:12.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:12.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:19:12.42#ibcon#first serial, iclass 12, count 0 2006.229.09:19:12.42#ibcon#enter sib2, iclass 12, count 0 2006.229.09:19:12.42#ibcon#flushed, iclass 12, count 0 2006.229.09:19:12.42#ibcon#about to write, iclass 12, count 0 2006.229.09:19:12.42#ibcon#wrote, iclass 12, count 0 2006.229.09:19:12.42#ibcon#about to read 3, iclass 12, count 0 2006.229.09:19:12.44#ibcon#read 3, iclass 12, count 0 2006.229.09:19:12.44#ibcon#about to read 4, iclass 12, count 0 2006.229.09:19:12.44#ibcon#read 4, iclass 12, count 0 2006.229.09:19:12.44#ibcon#about to read 5, iclass 12, count 0 2006.229.09:19:12.44#ibcon#read 5, iclass 12, count 0 2006.229.09:19:12.44#ibcon#about to read 6, iclass 12, count 0 2006.229.09:19:12.44#ibcon#read 6, iclass 12, count 0 2006.229.09:19:12.44#ibcon#end of sib2, iclass 12, count 0 2006.229.09:19:12.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:19:12.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:19:12.44#ibcon#[27=USB\r\n] 2006.229.09:19:12.44#ibcon#*before write, iclass 12, count 0 2006.229.09:19:12.44#ibcon#enter sib2, iclass 12, count 0 2006.229.09:19:12.44#ibcon#flushed, iclass 12, count 0 2006.229.09:19:12.44#ibcon#about to write, iclass 12, count 0 2006.229.09:19:12.44#ibcon#wrote, iclass 12, count 0 2006.229.09:19:12.44#ibcon#about to read 3, iclass 12, count 0 2006.229.09:19:12.47#ibcon#read 3, iclass 12, count 0 2006.229.09:19:12.47#ibcon#about to read 4, iclass 12, count 0 2006.229.09:19:12.47#ibcon#read 4, iclass 12, count 0 2006.229.09:19:12.47#ibcon#about to read 5, iclass 12, count 0 2006.229.09:19:12.47#ibcon#read 5, iclass 12, count 0 2006.229.09:19:12.47#ibcon#about to read 6, iclass 12, count 0 2006.229.09:19:12.47#ibcon#read 6, iclass 12, count 0 2006.229.09:19:12.47#ibcon#end of sib2, iclass 12, count 0 2006.229.09:19:12.47#ibcon#*after write, iclass 12, count 0 2006.229.09:19:12.47#ibcon#*before return 0, iclass 12, count 0 2006.229.09:19:12.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:12.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:19:12.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:19:12.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:19:12.47$vck44/vblo=3,649.99 2006.229.09:19:12.47#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.09:19:12.47#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.09:19:12.47#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:12.47#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:12.47#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:12.47#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:12.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:19:12.47#ibcon#first serial, iclass 14, count 0 2006.229.09:19:12.47#ibcon#enter sib2, iclass 14, count 0 2006.229.09:19:12.47#ibcon#flushed, iclass 14, count 0 2006.229.09:19:12.47#ibcon#about to write, iclass 14, count 0 2006.229.09:19:12.47#ibcon#wrote, iclass 14, count 0 2006.229.09:19:12.47#ibcon#about to read 3, iclass 14, count 0 2006.229.09:19:12.49#ibcon#read 3, iclass 14, count 0 2006.229.09:19:12.49#ibcon#about to read 4, iclass 14, count 0 2006.229.09:19:12.49#ibcon#read 4, iclass 14, count 0 2006.229.09:19:12.49#ibcon#about to read 5, iclass 14, count 0 2006.229.09:19:12.49#ibcon#read 5, iclass 14, count 0 2006.229.09:19:12.49#ibcon#about to read 6, iclass 14, count 0 2006.229.09:19:12.49#ibcon#read 6, iclass 14, count 0 2006.229.09:19:12.49#ibcon#end of sib2, iclass 14, count 0 2006.229.09:19:12.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:19:12.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:19:12.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:19:12.49#ibcon#*before write, iclass 14, count 0 2006.229.09:19:12.49#ibcon#enter sib2, iclass 14, count 0 2006.229.09:19:12.49#ibcon#flushed, iclass 14, count 0 2006.229.09:19:12.49#ibcon#about to write, iclass 14, count 0 2006.229.09:19:12.49#ibcon#wrote, iclass 14, count 0 2006.229.09:19:12.49#ibcon#about to read 3, iclass 14, count 0 2006.229.09:19:12.53#ibcon#read 3, iclass 14, count 0 2006.229.09:19:12.53#ibcon#about to read 4, iclass 14, count 0 2006.229.09:19:12.53#ibcon#read 4, iclass 14, count 0 2006.229.09:19:12.53#ibcon#about to read 5, iclass 14, count 0 2006.229.09:19:12.53#ibcon#read 5, iclass 14, count 0 2006.229.09:19:12.53#ibcon#about to read 6, iclass 14, count 0 2006.229.09:19:12.53#ibcon#read 6, iclass 14, count 0 2006.229.09:19:12.53#ibcon#end of sib2, iclass 14, count 0 2006.229.09:19:12.53#ibcon#*after write, iclass 14, count 0 2006.229.09:19:12.53#ibcon#*before return 0, iclass 14, count 0 2006.229.09:19:12.53#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:12.53#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:19:12.53#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:19:12.53#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:19:12.53$vck44/vb=3,4 2006.229.09:19:12.53#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.09:19:12.53#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.09:19:12.53#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:12.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:12.59#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:12.59#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:12.59#ibcon#enter wrdev, iclass 16, count 2 2006.229.09:19:12.59#ibcon#first serial, iclass 16, count 2 2006.229.09:19:12.59#ibcon#enter sib2, iclass 16, count 2 2006.229.09:19:12.59#ibcon#flushed, iclass 16, count 2 2006.229.09:19:12.59#ibcon#about to write, iclass 16, count 2 2006.229.09:19:12.59#ibcon#wrote, iclass 16, count 2 2006.229.09:19:12.59#ibcon#about to read 3, iclass 16, count 2 2006.229.09:19:12.61#ibcon#read 3, iclass 16, count 2 2006.229.09:19:12.61#ibcon#about to read 4, iclass 16, count 2 2006.229.09:19:12.61#ibcon#read 4, iclass 16, count 2 2006.229.09:19:12.61#ibcon#about to read 5, iclass 16, count 2 2006.229.09:19:12.61#ibcon#read 5, iclass 16, count 2 2006.229.09:19:12.61#ibcon#about to read 6, iclass 16, count 2 2006.229.09:19:12.61#ibcon#read 6, iclass 16, count 2 2006.229.09:19:12.61#ibcon#end of sib2, iclass 16, count 2 2006.229.09:19:12.61#ibcon#*mode == 0, iclass 16, count 2 2006.229.09:19:12.61#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.09:19:12.61#ibcon#[27=AT03-04\r\n] 2006.229.09:19:12.61#ibcon#*before write, iclass 16, count 2 2006.229.09:19:12.61#ibcon#enter sib2, iclass 16, count 2 2006.229.09:19:12.61#ibcon#flushed, iclass 16, count 2 2006.229.09:19:12.61#ibcon#about to write, iclass 16, count 2 2006.229.09:19:12.61#ibcon#wrote, iclass 16, count 2 2006.229.09:19:12.61#ibcon#about to read 3, iclass 16, count 2 2006.229.09:19:12.64#ibcon#read 3, iclass 16, count 2 2006.229.09:19:12.64#ibcon#about to read 4, iclass 16, count 2 2006.229.09:19:12.64#ibcon#read 4, iclass 16, count 2 2006.229.09:19:12.64#ibcon#about to read 5, iclass 16, count 2 2006.229.09:19:12.64#ibcon#read 5, iclass 16, count 2 2006.229.09:19:12.64#ibcon#about to read 6, iclass 16, count 2 2006.229.09:19:12.64#ibcon#read 6, iclass 16, count 2 2006.229.09:19:12.64#ibcon#end of sib2, iclass 16, count 2 2006.229.09:19:12.64#ibcon#*after write, iclass 16, count 2 2006.229.09:19:12.64#ibcon#*before return 0, iclass 16, count 2 2006.229.09:19:12.64#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:12.64#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:19:12.64#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.09:19:12.64#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:12.64#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:12.76#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:12.76#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:12.76#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:19:12.76#ibcon#first serial, iclass 16, count 0 2006.229.09:19:12.76#ibcon#enter sib2, iclass 16, count 0 2006.229.09:19:12.76#ibcon#flushed, iclass 16, count 0 2006.229.09:19:12.76#ibcon#about to write, iclass 16, count 0 2006.229.09:19:12.76#ibcon#wrote, iclass 16, count 0 2006.229.09:19:12.76#ibcon#about to read 3, iclass 16, count 0 2006.229.09:19:12.78#ibcon#read 3, iclass 16, count 0 2006.229.09:19:12.78#ibcon#about to read 4, iclass 16, count 0 2006.229.09:19:12.78#ibcon#read 4, iclass 16, count 0 2006.229.09:19:12.78#ibcon#about to read 5, iclass 16, count 0 2006.229.09:19:12.78#ibcon#read 5, iclass 16, count 0 2006.229.09:19:12.78#ibcon#about to read 6, iclass 16, count 0 2006.229.09:19:12.78#ibcon#read 6, iclass 16, count 0 2006.229.09:19:12.78#ibcon#end of sib2, iclass 16, count 0 2006.229.09:19:12.78#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:19:12.78#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:19:12.78#ibcon#[27=USB\r\n] 2006.229.09:19:12.78#ibcon#*before write, iclass 16, count 0 2006.229.09:19:12.78#ibcon#enter sib2, iclass 16, count 0 2006.229.09:19:12.78#ibcon#flushed, iclass 16, count 0 2006.229.09:19:12.78#ibcon#about to write, iclass 16, count 0 2006.229.09:19:12.78#ibcon#wrote, iclass 16, count 0 2006.229.09:19:12.78#ibcon#about to read 3, iclass 16, count 0 2006.229.09:19:12.81#ibcon#read 3, iclass 16, count 0 2006.229.09:19:12.81#ibcon#about to read 4, iclass 16, count 0 2006.229.09:19:12.81#ibcon#read 4, iclass 16, count 0 2006.229.09:19:12.81#ibcon#about to read 5, iclass 16, count 0 2006.229.09:19:12.81#ibcon#read 5, iclass 16, count 0 2006.229.09:19:12.81#ibcon#about to read 6, iclass 16, count 0 2006.229.09:19:12.81#ibcon#read 6, iclass 16, count 0 2006.229.09:19:12.81#ibcon#end of sib2, iclass 16, count 0 2006.229.09:19:12.81#ibcon#*after write, iclass 16, count 0 2006.229.09:19:12.81#ibcon#*before return 0, iclass 16, count 0 2006.229.09:19:12.81#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:12.81#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:19:12.81#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:19:12.81#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:19:12.81$vck44/vblo=4,679.99 2006.229.09:19:12.81#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.09:19:12.81#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.09:19:12.81#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:12.81#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:12.81#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:12.81#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:12.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:19:12.82#ibcon#first serial, iclass 18, count 0 2006.229.09:19:12.82#ibcon#enter sib2, iclass 18, count 0 2006.229.09:19:12.82#ibcon#flushed, iclass 18, count 0 2006.229.09:19:12.82#ibcon#about to write, iclass 18, count 0 2006.229.09:19:12.82#ibcon#wrote, iclass 18, count 0 2006.229.09:19:12.82#ibcon#about to read 3, iclass 18, count 0 2006.229.09:19:12.83#ibcon#read 3, iclass 18, count 0 2006.229.09:19:12.83#ibcon#about to read 4, iclass 18, count 0 2006.229.09:19:12.83#ibcon#read 4, iclass 18, count 0 2006.229.09:19:12.83#ibcon#about to read 5, iclass 18, count 0 2006.229.09:19:12.83#ibcon#read 5, iclass 18, count 0 2006.229.09:19:12.83#ibcon#about to read 6, iclass 18, count 0 2006.229.09:19:12.83#ibcon#read 6, iclass 18, count 0 2006.229.09:19:12.83#ibcon#end of sib2, iclass 18, count 0 2006.229.09:19:12.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:19:12.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:19:12.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:19:12.83#ibcon#*before write, iclass 18, count 0 2006.229.09:19:12.83#ibcon#enter sib2, iclass 18, count 0 2006.229.09:19:12.83#ibcon#flushed, iclass 18, count 0 2006.229.09:19:12.83#ibcon#about to write, iclass 18, count 0 2006.229.09:19:12.83#ibcon#wrote, iclass 18, count 0 2006.229.09:19:12.83#ibcon#about to read 3, iclass 18, count 0 2006.229.09:19:12.87#ibcon#read 3, iclass 18, count 0 2006.229.09:19:12.87#ibcon#about to read 4, iclass 18, count 0 2006.229.09:19:12.87#ibcon#read 4, iclass 18, count 0 2006.229.09:19:12.87#ibcon#about to read 5, iclass 18, count 0 2006.229.09:19:12.87#ibcon#read 5, iclass 18, count 0 2006.229.09:19:12.87#ibcon#about to read 6, iclass 18, count 0 2006.229.09:19:12.87#ibcon#read 6, iclass 18, count 0 2006.229.09:19:12.87#ibcon#end of sib2, iclass 18, count 0 2006.229.09:19:12.87#ibcon#*after write, iclass 18, count 0 2006.229.09:19:12.87#ibcon#*before return 0, iclass 18, count 0 2006.229.09:19:12.87#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:12.87#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:19:12.87#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:19:12.87#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:19:12.87$vck44/vb=4,4 2006.229.09:19:12.87#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.09:19:12.87#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.09:19:12.87#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:12.87#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:12.93#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:12.93#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:12.93#ibcon#enter wrdev, iclass 20, count 2 2006.229.09:19:12.93#ibcon#first serial, iclass 20, count 2 2006.229.09:19:12.93#ibcon#enter sib2, iclass 20, count 2 2006.229.09:19:12.93#ibcon#flushed, iclass 20, count 2 2006.229.09:19:12.93#ibcon#about to write, iclass 20, count 2 2006.229.09:19:12.93#ibcon#wrote, iclass 20, count 2 2006.229.09:19:12.93#ibcon#about to read 3, iclass 20, count 2 2006.229.09:19:12.95#ibcon#read 3, iclass 20, count 2 2006.229.09:19:12.95#ibcon#about to read 4, iclass 20, count 2 2006.229.09:19:12.95#ibcon#read 4, iclass 20, count 2 2006.229.09:19:12.95#ibcon#about to read 5, iclass 20, count 2 2006.229.09:19:12.95#ibcon#read 5, iclass 20, count 2 2006.229.09:19:12.95#ibcon#about to read 6, iclass 20, count 2 2006.229.09:19:12.95#ibcon#read 6, iclass 20, count 2 2006.229.09:19:12.95#ibcon#end of sib2, iclass 20, count 2 2006.229.09:19:12.95#ibcon#*mode == 0, iclass 20, count 2 2006.229.09:19:12.95#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.09:19:12.95#ibcon#[27=AT04-04\r\n] 2006.229.09:19:12.95#ibcon#*before write, iclass 20, count 2 2006.229.09:19:12.95#ibcon#enter sib2, iclass 20, count 2 2006.229.09:19:12.95#ibcon#flushed, iclass 20, count 2 2006.229.09:19:12.95#ibcon#about to write, iclass 20, count 2 2006.229.09:19:12.95#ibcon#wrote, iclass 20, count 2 2006.229.09:19:12.95#ibcon#about to read 3, iclass 20, count 2 2006.229.09:19:12.98#ibcon#read 3, iclass 20, count 2 2006.229.09:19:12.98#ibcon#about to read 4, iclass 20, count 2 2006.229.09:19:12.98#ibcon#read 4, iclass 20, count 2 2006.229.09:19:12.98#ibcon#about to read 5, iclass 20, count 2 2006.229.09:19:12.98#ibcon#read 5, iclass 20, count 2 2006.229.09:19:12.98#ibcon#about to read 6, iclass 20, count 2 2006.229.09:19:12.98#ibcon#read 6, iclass 20, count 2 2006.229.09:19:12.98#ibcon#end of sib2, iclass 20, count 2 2006.229.09:19:12.98#ibcon#*after write, iclass 20, count 2 2006.229.09:19:12.98#ibcon#*before return 0, iclass 20, count 2 2006.229.09:19:12.98#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:12.98#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:19:12.98#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.09:19:12.98#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:12.98#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:13.10#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:13.10#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:13.10#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:19:13.10#ibcon#first serial, iclass 20, count 0 2006.229.09:19:13.10#ibcon#enter sib2, iclass 20, count 0 2006.229.09:19:13.10#ibcon#flushed, iclass 20, count 0 2006.229.09:19:13.10#ibcon#about to write, iclass 20, count 0 2006.229.09:19:13.10#ibcon#wrote, iclass 20, count 0 2006.229.09:19:13.10#ibcon#about to read 3, iclass 20, count 0 2006.229.09:19:13.12#ibcon#read 3, iclass 20, count 0 2006.229.09:19:13.12#ibcon#about to read 4, iclass 20, count 0 2006.229.09:19:13.12#ibcon#read 4, iclass 20, count 0 2006.229.09:19:13.12#ibcon#about to read 5, iclass 20, count 0 2006.229.09:19:13.12#ibcon#read 5, iclass 20, count 0 2006.229.09:19:13.12#ibcon#about to read 6, iclass 20, count 0 2006.229.09:19:13.12#ibcon#read 6, iclass 20, count 0 2006.229.09:19:13.12#ibcon#end of sib2, iclass 20, count 0 2006.229.09:19:13.12#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:19:13.12#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:19:13.12#ibcon#[27=USB\r\n] 2006.229.09:19:13.12#ibcon#*before write, iclass 20, count 0 2006.229.09:19:13.12#ibcon#enter sib2, iclass 20, count 0 2006.229.09:19:13.12#ibcon#flushed, iclass 20, count 0 2006.229.09:19:13.12#ibcon#about to write, iclass 20, count 0 2006.229.09:19:13.12#ibcon#wrote, iclass 20, count 0 2006.229.09:19:13.12#ibcon#about to read 3, iclass 20, count 0 2006.229.09:19:13.15#ibcon#read 3, iclass 20, count 0 2006.229.09:19:13.15#ibcon#about to read 4, iclass 20, count 0 2006.229.09:19:13.15#ibcon#read 4, iclass 20, count 0 2006.229.09:19:13.15#ibcon#about to read 5, iclass 20, count 0 2006.229.09:19:13.15#ibcon#read 5, iclass 20, count 0 2006.229.09:19:13.15#ibcon#about to read 6, iclass 20, count 0 2006.229.09:19:13.15#ibcon#read 6, iclass 20, count 0 2006.229.09:19:13.15#ibcon#end of sib2, iclass 20, count 0 2006.229.09:19:13.15#ibcon#*after write, iclass 20, count 0 2006.229.09:19:13.15#ibcon#*before return 0, iclass 20, count 0 2006.229.09:19:13.15#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:13.15#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:19:13.15#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:19:13.15#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:19:13.15$vck44/vblo=5,709.99 2006.229.09:19:13.15#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.09:19:13.15#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.09:19:13.15#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:13.15#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:19:13.15#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:19:13.15#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:19:13.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:19:13.15#ibcon#first serial, iclass 22, count 0 2006.229.09:19:13.15#ibcon#enter sib2, iclass 22, count 0 2006.229.09:19:13.15#ibcon#flushed, iclass 22, count 0 2006.229.09:19:13.15#ibcon#about to write, iclass 22, count 0 2006.229.09:19:13.16#ibcon#wrote, iclass 22, count 0 2006.229.09:19:13.16#ibcon#about to read 3, iclass 22, count 0 2006.229.09:19:13.17#ibcon#read 3, iclass 22, count 0 2006.229.09:19:13.17#ibcon#about to read 4, iclass 22, count 0 2006.229.09:19:13.17#ibcon#read 4, iclass 22, count 0 2006.229.09:19:13.17#ibcon#about to read 5, iclass 22, count 0 2006.229.09:19:13.17#ibcon#read 5, iclass 22, count 0 2006.229.09:19:13.17#ibcon#about to read 6, iclass 22, count 0 2006.229.09:19:13.17#ibcon#read 6, iclass 22, count 0 2006.229.09:19:13.17#ibcon#end of sib2, iclass 22, count 0 2006.229.09:19:13.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:19:13.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:19:13.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:19:13.17#ibcon#*before write, iclass 22, count 0 2006.229.09:19:13.17#ibcon#enter sib2, iclass 22, count 0 2006.229.09:19:13.17#ibcon#flushed, iclass 22, count 0 2006.229.09:19:13.17#ibcon#about to write, iclass 22, count 0 2006.229.09:19:13.17#ibcon#wrote, iclass 22, count 0 2006.229.09:19:13.17#ibcon#about to read 3, iclass 22, count 0 2006.229.09:19:13.21#ibcon#read 3, iclass 22, count 0 2006.229.09:19:13.21#ibcon#about to read 4, iclass 22, count 0 2006.229.09:19:13.21#ibcon#read 4, iclass 22, count 0 2006.229.09:19:13.21#ibcon#about to read 5, iclass 22, count 0 2006.229.09:19:13.21#ibcon#read 5, iclass 22, count 0 2006.229.09:19:13.21#ibcon#about to read 6, iclass 22, count 0 2006.229.09:19:13.21#ibcon#read 6, iclass 22, count 0 2006.229.09:19:13.21#ibcon#end of sib2, iclass 22, count 0 2006.229.09:19:13.21#ibcon#*after write, iclass 22, count 0 2006.229.09:19:13.21#ibcon#*before return 0, iclass 22, count 0 2006.229.09:19:13.21#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:19:13.21#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:19:13.21#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:19:13.21#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:19:13.21$vck44/vb=5,4 2006.229.09:19:13.21#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.09:19:13.21#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.09:19:13.21#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:13.21#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.09:19:13.27#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.09:19:13.27#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.09:19:13.27#ibcon#enter wrdev, iclass 24, count 2 2006.229.09:19:13.27#ibcon#first serial, iclass 24, count 2 2006.229.09:19:13.27#ibcon#enter sib2, iclass 24, count 2 2006.229.09:19:13.27#ibcon#flushed, iclass 24, count 2 2006.229.09:19:13.27#ibcon#about to write, iclass 24, count 2 2006.229.09:19:13.27#ibcon#wrote, iclass 24, count 2 2006.229.09:19:13.27#ibcon#about to read 3, iclass 24, count 2 2006.229.09:19:13.29#ibcon#read 3, iclass 24, count 2 2006.229.09:19:13.29#ibcon#about to read 4, iclass 24, count 2 2006.229.09:19:13.29#ibcon#read 4, iclass 24, count 2 2006.229.09:19:13.29#ibcon#about to read 5, iclass 24, count 2 2006.229.09:19:13.29#ibcon#read 5, iclass 24, count 2 2006.229.09:19:13.29#ibcon#about to read 6, iclass 24, count 2 2006.229.09:19:13.29#ibcon#read 6, iclass 24, count 2 2006.229.09:19:13.29#ibcon#end of sib2, iclass 24, count 2 2006.229.09:19:13.29#ibcon#*mode == 0, iclass 24, count 2 2006.229.09:19:13.29#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.09:19:13.29#ibcon#[27=AT05-04\r\n] 2006.229.09:19:13.29#ibcon#*before write, iclass 24, count 2 2006.229.09:19:13.29#ibcon#enter sib2, iclass 24, count 2 2006.229.09:19:13.29#ibcon#flushed, iclass 24, count 2 2006.229.09:19:13.29#ibcon#about to write, iclass 24, count 2 2006.229.09:19:13.29#ibcon#wrote, iclass 24, count 2 2006.229.09:19:13.29#ibcon#about to read 3, iclass 24, count 2 2006.229.09:19:13.32#ibcon#read 3, iclass 24, count 2 2006.229.09:19:13.32#ibcon#about to read 4, iclass 24, count 2 2006.229.09:19:13.32#ibcon#read 4, iclass 24, count 2 2006.229.09:19:13.32#ibcon#about to read 5, iclass 24, count 2 2006.229.09:19:13.32#ibcon#read 5, iclass 24, count 2 2006.229.09:19:13.32#ibcon#about to read 6, iclass 24, count 2 2006.229.09:19:13.32#ibcon#read 6, iclass 24, count 2 2006.229.09:19:13.32#ibcon#end of sib2, iclass 24, count 2 2006.229.09:19:13.32#ibcon#*after write, iclass 24, count 2 2006.229.09:19:13.32#ibcon#*before return 0, iclass 24, count 2 2006.229.09:19:13.32#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.09:19:13.32#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.09:19:13.32#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.09:19:13.32#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:13.32#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.09:19:13.44#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.09:19:13.44#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.09:19:13.44#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:19:13.44#ibcon#first serial, iclass 24, count 0 2006.229.09:19:13.44#ibcon#enter sib2, iclass 24, count 0 2006.229.09:19:13.44#ibcon#flushed, iclass 24, count 0 2006.229.09:19:13.44#ibcon#about to write, iclass 24, count 0 2006.229.09:19:13.44#ibcon#wrote, iclass 24, count 0 2006.229.09:19:13.44#ibcon#about to read 3, iclass 24, count 0 2006.229.09:19:13.46#ibcon#read 3, iclass 24, count 0 2006.229.09:19:13.46#ibcon#about to read 4, iclass 24, count 0 2006.229.09:19:13.46#ibcon#read 4, iclass 24, count 0 2006.229.09:19:13.46#ibcon#about to read 5, iclass 24, count 0 2006.229.09:19:13.46#ibcon#read 5, iclass 24, count 0 2006.229.09:19:13.46#ibcon#about to read 6, iclass 24, count 0 2006.229.09:19:13.46#ibcon#read 6, iclass 24, count 0 2006.229.09:19:13.46#ibcon#end of sib2, iclass 24, count 0 2006.229.09:19:13.46#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:19:13.46#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:19:13.46#ibcon#[27=USB\r\n] 2006.229.09:19:13.46#ibcon#*before write, iclass 24, count 0 2006.229.09:19:13.46#ibcon#enter sib2, iclass 24, count 0 2006.229.09:19:13.46#ibcon#flushed, iclass 24, count 0 2006.229.09:19:13.46#ibcon#about to write, iclass 24, count 0 2006.229.09:19:13.46#ibcon#wrote, iclass 24, count 0 2006.229.09:19:13.46#ibcon#about to read 3, iclass 24, count 0 2006.229.09:19:13.49#ibcon#read 3, iclass 24, count 0 2006.229.09:19:13.49#ibcon#about to read 4, iclass 24, count 0 2006.229.09:19:13.49#ibcon#read 4, iclass 24, count 0 2006.229.09:19:13.49#ibcon#about to read 5, iclass 24, count 0 2006.229.09:19:13.49#ibcon#read 5, iclass 24, count 0 2006.229.09:19:13.49#ibcon#about to read 6, iclass 24, count 0 2006.229.09:19:13.49#ibcon#read 6, iclass 24, count 0 2006.229.09:19:13.49#ibcon#end of sib2, iclass 24, count 0 2006.229.09:19:13.49#ibcon#*after write, iclass 24, count 0 2006.229.09:19:13.49#ibcon#*before return 0, iclass 24, count 0 2006.229.09:19:13.49#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.09:19:13.49#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.09:19:13.49#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:19:13.49#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:19:13.49$vck44/vblo=6,719.99 2006.229.09:19:13.49#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.09:19:13.49#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.09:19:13.49#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:13.49#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:13.49#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:13.49#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:13.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:19:13.49#ibcon#first serial, iclass 26, count 0 2006.229.09:19:13.49#ibcon#enter sib2, iclass 26, count 0 2006.229.09:19:13.49#ibcon#flushed, iclass 26, count 0 2006.229.09:19:13.49#ibcon#about to write, iclass 26, count 0 2006.229.09:19:13.49#ibcon#wrote, iclass 26, count 0 2006.229.09:19:13.49#ibcon#about to read 3, iclass 26, count 0 2006.229.09:19:13.51#ibcon#read 3, iclass 26, count 0 2006.229.09:19:13.51#ibcon#about to read 4, iclass 26, count 0 2006.229.09:19:13.51#ibcon#read 4, iclass 26, count 0 2006.229.09:19:13.51#ibcon#about to read 5, iclass 26, count 0 2006.229.09:19:13.51#ibcon#read 5, iclass 26, count 0 2006.229.09:19:13.51#ibcon#about to read 6, iclass 26, count 0 2006.229.09:19:13.51#ibcon#read 6, iclass 26, count 0 2006.229.09:19:13.51#ibcon#end of sib2, iclass 26, count 0 2006.229.09:19:13.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:19:13.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:19:13.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:19:13.51#ibcon#*before write, iclass 26, count 0 2006.229.09:19:13.51#ibcon#enter sib2, iclass 26, count 0 2006.229.09:19:13.51#ibcon#flushed, iclass 26, count 0 2006.229.09:19:13.51#ibcon#about to write, iclass 26, count 0 2006.229.09:19:13.51#ibcon#wrote, iclass 26, count 0 2006.229.09:19:13.51#ibcon#about to read 3, iclass 26, count 0 2006.229.09:19:13.55#ibcon#read 3, iclass 26, count 0 2006.229.09:19:13.55#ibcon#about to read 4, iclass 26, count 0 2006.229.09:19:13.55#ibcon#read 4, iclass 26, count 0 2006.229.09:19:13.55#ibcon#about to read 5, iclass 26, count 0 2006.229.09:19:13.55#ibcon#read 5, iclass 26, count 0 2006.229.09:19:13.55#ibcon#about to read 6, iclass 26, count 0 2006.229.09:19:13.55#ibcon#read 6, iclass 26, count 0 2006.229.09:19:13.55#ibcon#end of sib2, iclass 26, count 0 2006.229.09:19:13.55#ibcon#*after write, iclass 26, count 0 2006.229.09:19:13.55#ibcon#*before return 0, iclass 26, count 0 2006.229.09:19:13.55#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:13.55#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:19:13.55#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:19:13.55#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:19:13.55$vck44/vb=6,4 2006.229.09:19:13.55#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.09:19:13.55#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.09:19:13.55#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:13.55#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:13.61#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:13.61#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:13.61#ibcon#enter wrdev, iclass 28, count 2 2006.229.09:19:13.61#ibcon#first serial, iclass 28, count 2 2006.229.09:19:13.61#ibcon#enter sib2, iclass 28, count 2 2006.229.09:19:13.61#ibcon#flushed, iclass 28, count 2 2006.229.09:19:13.61#ibcon#about to write, iclass 28, count 2 2006.229.09:19:13.61#ibcon#wrote, iclass 28, count 2 2006.229.09:19:13.61#ibcon#about to read 3, iclass 28, count 2 2006.229.09:19:13.63#ibcon#read 3, iclass 28, count 2 2006.229.09:19:13.63#ibcon#about to read 4, iclass 28, count 2 2006.229.09:19:13.63#ibcon#read 4, iclass 28, count 2 2006.229.09:19:13.63#ibcon#about to read 5, iclass 28, count 2 2006.229.09:19:13.63#ibcon#read 5, iclass 28, count 2 2006.229.09:19:13.63#ibcon#about to read 6, iclass 28, count 2 2006.229.09:19:13.63#ibcon#read 6, iclass 28, count 2 2006.229.09:19:13.63#ibcon#end of sib2, iclass 28, count 2 2006.229.09:19:13.63#ibcon#*mode == 0, iclass 28, count 2 2006.229.09:19:13.63#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.09:19:13.63#ibcon#[27=AT06-04\r\n] 2006.229.09:19:13.63#ibcon#*before write, iclass 28, count 2 2006.229.09:19:13.63#ibcon#enter sib2, iclass 28, count 2 2006.229.09:19:13.63#ibcon#flushed, iclass 28, count 2 2006.229.09:19:13.63#ibcon#about to write, iclass 28, count 2 2006.229.09:19:13.63#ibcon#wrote, iclass 28, count 2 2006.229.09:19:13.63#ibcon#about to read 3, iclass 28, count 2 2006.229.09:19:13.66#ibcon#read 3, iclass 28, count 2 2006.229.09:19:13.66#ibcon#about to read 4, iclass 28, count 2 2006.229.09:19:13.66#ibcon#read 4, iclass 28, count 2 2006.229.09:19:13.66#ibcon#about to read 5, iclass 28, count 2 2006.229.09:19:13.66#ibcon#read 5, iclass 28, count 2 2006.229.09:19:13.66#ibcon#about to read 6, iclass 28, count 2 2006.229.09:19:13.66#ibcon#read 6, iclass 28, count 2 2006.229.09:19:13.66#ibcon#end of sib2, iclass 28, count 2 2006.229.09:19:13.66#ibcon#*after write, iclass 28, count 2 2006.229.09:19:13.66#ibcon#*before return 0, iclass 28, count 2 2006.229.09:19:13.66#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:13.66#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:19:13.66#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.09:19:13.66#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:13.66#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:13.78#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:13.78#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:13.78#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:19:13.78#ibcon#first serial, iclass 28, count 0 2006.229.09:19:13.78#ibcon#enter sib2, iclass 28, count 0 2006.229.09:19:13.78#ibcon#flushed, iclass 28, count 0 2006.229.09:19:13.78#ibcon#about to write, iclass 28, count 0 2006.229.09:19:13.78#ibcon#wrote, iclass 28, count 0 2006.229.09:19:13.78#ibcon#about to read 3, iclass 28, count 0 2006.229.09:19:13.80#ibcon#read 3, iclass 28, count 0 2006.229.09:19:13.80#ibcon#about to read 4, iclass 28, count 0 2006.229.09:19:13.80#ibcon#read 4, iclass 28, count 0 2006.229.09:19:13.80#ibcon#about to read 5, iclass 28, count 0 2006.229.09:19:13.80#ibcon#read 5, iclass 28, count 0 2006.229.09:19:13.80#ibcon#about to read 6, iclass 28, count 0 2006.229.09:19:13.80#ibcon#read 6, iclass 28, count 0 2006.229.09:19:13.80#ibcon#end of sib2, iclass 28, count 0 2006.229.09:19:13.80#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:19:13.80#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:19:13.80#ibcon#[27=USB\r\n] 2006.229.09:19:13.80#ibcon#*before write, iclass 28, count 0 2006.229.09:19:13.80#ibcon#enter sib2, iclass 28, count 0 2006.229.09:19:13.80#ibcon#flushed, iclass 28, count 0 2006.229.09:19:13.80#ibcon#about to write, iclass 28, count 0 2006.229.09:19:13.80#ibcon#wrote, iclass 28, count 0 2006.229.09:19:13.80#ibcon#about to read 3, iclass 28, count 0 2006.229.09:19:13.83#ibcon#read 3, iclass 28, count 0 2006.229.09:19:13.83#ibcon#about to read 4, iclass 28, count 0 2006.229.09:19:13.83#ibcon#read 4, iclass 28, count 0 2006.229.09:19:13.83#ibcon#about to read 5, iclass 28, count 0 2006.229.09:19:13.83#ibcon#read 5, iclass 28, count 0 2006.229.09:19:13.83#ibcon#about to read 6, iclass 28, count 0 2006.229.09:19:13.83#ibcon#read 6, iclass 28, count 0 2006.229.09:19:13.83#ibcon#end of sib2, iclass 28, count 0 2006.229.09:19:13.83#ibcon#*after write, iclass 28, count 0 2006.229.09:19:13.83#ibcon#*before return 0, iclass 28, count 0 2006.229.09:19:13.83#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:13.83#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:19:13.83#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:19:13.83#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:19:13.83$vck44/vblo=7,734.99 2006.229.09:19:13.83#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.09:19:13.83#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.09:19:13.83#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:13.83#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:13.83#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:13.83#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:13.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:19:13.83#ibcon#first serial, iclass 30, count 0 2006.229.09:19:13.83#ibcon#enter sib2, iclass 30, count 0 2006.229.09:19:13.83#ibcon#flushed, iclass 30, count 0 2006.229.09:19:13.84#ibcon#about to write, iclass 30, count 0 2006.229.09:19:13.84#ibcon#wrote, iclass 30, count 0 2006.229.09:19:13.84#ibcon#about to read 3, iclass 30, count 0 2006.229.09:19:13.85#ibcon#read 3, iclass 30, count 0 2006.229.09:19:13.85#ibcon#about to read 4, iclass 30, count 0 2006.229.09:19:13.85#ibcon#read 4, iclass 30, count 0 2006.229.09:19:13.85#ibcon#about to read 5, iclass 30, count 0 2006.229.09:19:13.85#ibcon#read 5, iclass 30, count 0 2006.229.09:19:13.85#ibcon#about to read 6, iclass 30, count 0 2006.229.09:19:13.85#ibcon#read 6, iclass 30, count 0 2006.229.09:19:13.85#ibcon#end of sib2, iclass 30, count 0 2006.229.09:19:13.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:19:13.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:19:13.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:19:13.85#ibcon#*before write, iclass 30, count 0 2006.229.09:19:13.85#ibcon#enter sib2, iclass 30, count 0 2006.229.09:19:13.85#ibcon#flushed, iclass 30, count 0 2006.229.09:19:13.85#ibcon#about to write, iclass 30, count 0 2006.229.09:19:13.85#ibcon#wrote, iclass 30, count 0 2006.229.09:19:13.85#ibcon#about to read 3, iclass 30, count 0 2006.229.09:19:13.89#ibcon#read 3, iclass 30, count 0 2006.229.09:19:13.89#ibcon#about to read 4, iclass 30, count 0 2006.229.09:19:13.89#ibcon#read 4, iclass 30, count 0 2006.229.09:19:13.89#ibcon#about to read 5, iclass 30, count 0 2006.229.09:19:13.89#ibcon#read 5, iclass 30, count 0 2006.229.09:19:13.89#ibcon#about to read 6, iclass 30, count 0 2006.229.09:19:13.89#ibcon#read 6, iclass 30, count 0 2006.229.09:19:13.89#ibcon#end of sib2, iclass 30, count 0 2006.229.09:19:13.89#ibcon#*after write, iclass 30, count 0 2006.229.09:19:13.89#ibcon#*before return 0, iclass 30, count 0 2006.229.09:19:13.89#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:13.89#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:19:13.89#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:19:13.89#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:19:13.89$vck44/vb=7,4 2006.229.09:19:13.89#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.09:19:13.89#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.09:19:13.89#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:13.89#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:13.95#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:13.95#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:13.95#ibcon#enter wrdev, iclass 32, count 2 2006.229.09:19:13.95#ibcon#first serial, iclass 32, count 2 2006.229.09:19:13.95#ibcon#enter sib2, iclass 32, count 2 2006.229.09:19:13.95#ibcon#flushed, iclass 32, count 2 2006.229.09:19:13.95#ibcon#about to write, iclass 32, count 2 2006.229.09:19:13.95#ibcon#wrote, iclass 32, count 2 2006.229.09:19:13.95#ibcon#about to read 3, iclass 32, count 2 2006.229.09:19:13.97#ibcon#read 3, iclass 32, count 2 2006.229.09:19:13.97#ibcon#about to read 4, iclass 32, count 2 2006.229.09:19:13.97#ibcon#read 4, iclass 32, count 2 2006.229.09:19:13.97#ibcon#about to read 5, iclass 32, count 2 2006.229.09:19:13.97#ibcon#read 5, iclass 32, count 2 2006.229.09:19:13.97#ibcon#about to read 6, iclass 32, count 2 2006.229.09:19:13.97#ibcon#read 6, iclass 32, count 2 2006.229.09:19:13.97#ibcon#end of sib2, iclass 32, count 2 2006.229.09:19:13.97#ibcon#*mode == 0, iclass 32, count 2 2006.229.09:19:13.97#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.09:19:13.97#ibcon#[27=AT07-04\r\n] 2006.229.09:19:13.97#ibcon#*before write, iclass 32, count 2 2006.229.09:19:13.97#ibcon#enter sib2, iclass 32, count 2 2006.229.09:19:13.97#ibcon#flushed, iclass 32, count 2 2006.229.09:19:13.97#ibcon#about to write, iclass 32, count 2 2006.229.09:19:13.97#ibcon#wrote, iclass 32, count 2 2006.229.09:19:13.97#ibcon#about to read 3, iclass 32, count 2 2006.229.09:19:14.00#ibcon#read 3, iclass 32, count 2 2006.229.09:19:14.00#ibcon#about to read 4, iclass 32, count 2 2006.229.09:19:14.00#ibcon#read 4, iclass 32, count 2 2006.229.09:19:14.00#ibcon#about to read 5, iclass 32, count 2 2006.229.09:19:14.00#ibcon#read 5, iclass 32, count 2 2006.229.09:19:14.00#ibcon#about to read 6, iclass 32, count 2 2006.229.09:19:14.00#ibcon#read 6, iclass 32, count 2 2006.229.09:19:14.00#ibcon#end of sib2, iclass 32, count 2 2006.229.09:19:14.00#ibcon#*after write, iclass 32, count 2 2006.229.09:19:14.00#ibcon#*before return 0, iclass 32, count 2 2006.229.09:19:14.00#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:14.00#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:19:14.00#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.09:19:14.00#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:14.00#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:14.12#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:14.12#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:14.12#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:19:14.12#ibcon#first serial, iclass 32, count 0 2006.229.09:19:14.12#ibcon#enter sib2, iclass 32, count 0 2006.229.09:19:14.12#ibcon#flushed, iclass 32, count 0 2006.229.09:19:14.12#ibcon#about to write, iclass 32, count 0 2006.229.09:19:14.12#ibcon#wrote, iclass 32, count 0 2006.229.09:19:14.12#ibcon#about to read 3, iclass 32, count 0 2006.229.09:19:14.14#ibcon#read 3, iclass 32, count 0 2006.229.09:19:14.14#ibcon#about to read 4, iclass 32, count 0 2006.229.09:19:14.14#ibcon#read 4, iclass 32, count 0 2006.229.09:19:14.14#ibcon#about to read 5, iclass 32, count 0 2006.229.09:19:14.14#ibcon#read 5, iclass 32, count 0 2006.229.09:19:14.14#ibcon#about to read 6, iclass 32, count 0 2006.229.09:19:14.14#ibcon#read 6, iclass 32, count 0 2006.229.09:19:14.14#ibcon#end of sib2, iclass 32, count 0 2006.229.09:19:14.14#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:19:14.14#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:19:14.14#ibcon#[27=USB\r\n] 2006.229.09:19:14.14#ibcon#*before write, iclass 32, count 0 2006.229.09:19:14.14#ibcon#enter sib2, iclass 32, count 0 2006.229.09:19:14.14#ibcon#flushed, iclass 32, count 0 2006.229.09:19:14.14#ibcon#about to write, iclass 32, count 0 2006.229.09:19:14.14#ibcon#wrote, iclass 32, count 0 2006.229.09:19:14.14#ibcon#about to read 3, iclass 32, count 0 2006.229.09:19:14.17#ibcon#read 3, iclass 32, count 0 2006.229.09:19:14.17#ibcon#about to read 4, iclass 32, count 0 2006.229.09:19:14.17#ibcon#read 4, iclass 32, count 0 2006.229.09:19:14.17#ibcon#about to read 5, iclass 32, count 0 2006.229.09:19:14.17#ibcon#read 5, iclass 32, count 0 2006.229.09:19:14.17#ibcon#about to read 6, iclass 32, count 0 2006.229.09:19:14.17#ibcon#read 6, iclass 32, count 0 2006.229.09:19:14.17#ibcon#end of sib2, iclass 32, count 0 2006.229.09:19:14.17#ibcon#*after write, iclass 32, count 0 2006.229.09:19:14.17#ibcon#*before return 0, iclass 32, count 0 2006.229.09:19:14.17#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:14.17#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:19:14.17#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:19:14.17#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:19:14.17$vck44/vblo=8,744.99 2006.229.09:19:14.17#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.09:19:14.17#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.09:19:14.17#ibcon#ireg 17 cls_cnt 0 2006.229.09:19:14.17#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:14.17#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:14.17#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:14.17#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:19:14.17#ibcon#first serial, iclass 34, count 0 2006.229.09:19:14.17#ibcon#enter sib2, iclass 34, count 0 2006.229.09:19:14.17#ibcon#flushed, iclass 34, count 0 2006.229.09:19:14.17#ibcon#about to write, iclass 34, count 0 2006.229.09:19:14.17#ibcon#wrote, iclass 34, count 0 2006.229.09:19:14.18#ibcon#about to read 3, iclass 34, count 0 2006.229.09:19:14.19#ibcon#read 3, iclass 34, count 0 2006.229.09:19:14.19#ibcon#about to read 4, iclass 34, count 0 2006.229.09:19:14.19#ibcon#read 4, iclass 34, count 0 2006.229.09:19:14.19#ibcon#about to read 5, iclass 34, count 0 2006.229.09:19:14.19#ibcon#read 5, iclass 34, count 0 2006.229.09:19:14.19#ibcon#about to read 6, iclass 34, count 0 2006.229.09:19:14.19#ibcon#read 6, iclass 34, count 0 2006.229.09:19:14.19#ibcon#end of sib2, iclass 34, count 0 2006.229.09:19:14.19#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:19:14.19#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:19:14.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:19:14.19#ibcon#*before write, iclass 34, count 0 2006.229.09:19:14.19#ibcon#enter sib2, iclass 34, count 0 2006.229.09:19:14.19#ibcon#flushed, iclass 34, count 0 2006.229.09:19:14.19#ibcon#about to write, iclass 34, count 0 2006.229.09:19:14.19#ibcon#wrote, iclass 34, count 0 2006.229.09:19:14.19#ibcon#about to read 3, iclass 34, count 0 2006.229.09:19:14.23#ibcon#read 3, iclass 34, count 0 2006.229.09:19:14.23#ibcon#about to read 4, iclass 34, count 0 2006.229.09:19:14.23#ibcon#read 4, iclass 34, count 0 2006.229.09:19:14.23#ibcon#about to read 5, iclass 34, count 0 2006.229.09:19:14.23#ibcon#read 5, iclass 34, count 0 2006.229.09:19:14.23#ibcon#about to read 6, iclass 34, count 0 2006.229.09:19:14.23#ibcon#read 6, iclass 34, count 0 2006.229.09:19:14.23#ibcon#end of sib2, iclass 34, count 0 2006.229.09:19:14.23#ibcon#*after write, iclass 34, count 0 2006.229.09:19:14.23#ibcon#*before return 0, iclass 34, count 0 2006.229.09:19:14.23#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:14.23#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:19:14.23#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:19:14.23#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:19:14.23$vck44/vb=8,4 2006.229.09:19:14.23#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.09:19:14.23#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.09:19:14.23#ibcon#ireg 11 cls_cnt 2 2006.229.09:19:14.23#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:14.29#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:14.29#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:14.29#ibcon#enter wrdev, iclass 36, count 2 2006.229.09:19:14.29#ibcon#first serial, iclass 36, count 2 2006.229.09:19:14.29#ibcon#enter sib2, iclass 36, count 2 2006.229.09:19:14.29#ibcon#flushed, iclass 36, count 2 2006.229.09:19:14.29#ibcon#about to write, iclass 36, count 2 2006.229.09:19:14.29#ibcon#wrote, iclass 36, count 2 2006.229.09:19:14.29#ibcon#about to read 3, iclass 36, count 2 2006.229.09:19:14.31#ibcon#read 3, iclass 36, count 2 2006.229.09:19:14.31#ibcon#about to read 4, iclass 36, count 2 2006.229.09:19:14.31#ibcon#read 4, iclass 36, count 2 2006.229.09:19:14.31#ibcon#about to read 5, iclass 36, count 2 2006.229.09:19:14.31#ibcon#read 5, iclass 36, count 2 2006.229.09:19:14.31#ibcon#about to read 6, iclass 36, count 2 2006.229.09:19:14.31#ibcon#read 6, iclass 36, count 2 2006.229.09:19:14.31#ibcon#end of sib2, iclass 36, count 2 2006.229.09:19:14.31#ibcon#*mode == 0, iclass 36, count 2 2006.229.09:19:14.31#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.09:19:14.31#ibcon#[27=AT08-04\r\n] 2006.229.09:19:14.31#ibcon#*before write, iclass 36, count 2 2006.229.09:19:14.31#ibcon#enter sib2, iclass 36, count 2 2006.229.09:19:14.31#ibcon#flushed, iclass 36, count 2 2006.229.09:19:14.31#ibcon#about to write, iclass 36, count 2 2006.229.09:19:14.31#ibcon#wrote, iclass 36, count 2 2006.229.09:19:14.31#ibcon#about to read 3, iclass 36, count 2 2006.229.09:19:14.34#ibcon#read 3, iclass 36, count 2 2006.229.09:19:14.34#ibcon#about to read 4, iclass 36, count 2 2006.229.09:19:14.34#ibcon#read 4, iclass 36, count 2 2006.229.09:19:14.34#ibcon#about to read 5, iclass 36, count 2 2006.229.09:19:14.34#ibcon#read 5, iclass 36, count 2 2006.229.09:19:14.34#ibcon#about to read 6, iclass 36, count 2 2006.229.09:19:14.34#ibcon#read 6, iclass 36, count 2 2006.229.09:19:14.34#ibcon#end of sib2, iclass 36, count 2 2006.229.09:19:14.34#ibcon#*after write, iclass 36, count 2 2006.229.09:19:14.34#ibcon#*before return 0, iclass 36, count 2 2006.229.09:19:14.34#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:14.34#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:19:14.34#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.09:19:14.34#ibcon#ireg 7 cls_cnt 0 2006.229.09:19:14.34#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:14.46#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:14.46#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:14.46#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:19:14.46#ibcon#first serial, iclass 36, count 0 2006.229.09:19:14.46#ibcon#enter sib2, iclass 36, count 0 2006.229.09:19:14.46#ibcon#flushed, iclass 36, count 0 2006.229.09:19:14.46#ibcon#about to write, iclass 36, count 0 2006.229.09:19:14.46#ibcon#wrote, iclass 36, count 0 2006.229.09:19:14.46#ibcon#about to read 3, iclass 36, count 0 2006.229.09:19:14.48#ibcon#read 3, iclass 36, count 0 2006.229.09:19:14.48#ibcon#about to read 4, iclass 36, count 0 2006.229.09:19:14.48#ibcon#read 4, iclass 36, count 0 2006.229.09:19:14.48#ibcon#about to read 5, iclass 36, count 0 2006.229.09:19:14.48#ibcon#read 5, iclass 36, count 0 2006.229.09:19:14.48#ibcon#about to read 6, iclass 36, count 0 2006.229.09:19:14.48#ibcon#read 6, iclass 36, count 0 2006.229.09:19:14.48#ibcon#end of sib2, iclass 36, count 0 2006.229.09:19:14.48#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:19:14.48#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:19:14.48#ibcon#[27=USB\r\n] 2006.229.09:19:14.48#ibcon#*before write, iclass 36, count 0 2006.229.09:19:14.48#ibcon#enter sib2, iclass 36, count 0 2006.229.09:19:14.48#ibcon#flushed, iclass 36, count 0 2006.229.09:19:14.48#ibcon#about to write, iclass 36, count 0 2006.229.09:19:14.48#ibcon#wrote, iclass 36, count 0 2006.229.09:19:14.48#ibcon#about to read 3, iclass 36, count 0 2006.229.09:19:14.51#ibcon#read 3, iclass 36, count 0 2006.229.09:19:14.51#ibcon#about to read 4, iclass 36, count 0 2006.229.09:19:14.51#ibcon#read 4, iclass 36, count 0 2006.229.09:19:14.51#ibcon#about to read 5, iclass 36, count 0 2006.229.09:19:14.51#ibcon#read 5, iclass 36, count 0 2006.229.09:19:14.51#ibcon#about to read 6, iclass 36, count 0 2006.229.09:19:14.51#ibcon#read 6, iclass 36, count 0 2006.229.09:19:14.51#ibcon#end of sib2, iclass 36, count 0 2006.229.09:19:14.51#ibcon#*after write, iclass 36, count 0 2006.229.09:19:14.51#ibcon#*before return 0, iclass 36, count 0 2006.229.09:19:14.51#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:14.51#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:19:14.51#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:19:14.51#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:19:14.51$vck44/vabw=wide 2006.229.09:19:14.51#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.09:19:14.51#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.09:19:14.51#ibcon#ireg 8 cls_cnt 0 2006.229.09:19:14.51#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:14.51#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:14.51#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:14.51#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:19:14.51#ibcon#first serial, iclass 38, count 0 2006.229.09:19:14.51#ibcon#enter sib2, iclass 38, count 0 2006.229.09:19:14.51#ibcon#flushed, iclass 38, count 0 2006.229.09:19:14.51#ibcon#about to write, iclass 38, count 0 2006.229.09:19:14.51#ibcon#wrote, iclass 38, count 0 2006.229.09:19:14.52#ibcon#about to read 3, iclass 38, count 0 2006.229.09:19:14.53#ibcon#read 3, iclass 38, count 0 2006.229.09:19:14.53#ibcon#about to read 4, iclass 38, count 0 2006.229.09:19:14.53#ibcon#read 4, iclass 38, count 0 2006.229.09:19:14.53#ibcon#about to read 5, iclass 38, count 0 2006.229.09:19:14.53#ibcon#read 5, iclass 38, count 0 2006.229.09:19:14.53#ibcon#about to read 6, iclass 38, count 0 2006.229.09:19:14.53#ibcon#read 6, iclass 38, count 0 2006.229.09:19:14.53#ibcon#end of sib2, iclass 38, count 0 2006.229.09:19:14.53#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:19:14.53#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:19:14.53#ibcon#[25=BW32\r\n] 2006.229.09:19:14.53#ibcon#*before write, iclass 38, count 0 2006.229.09:19:14.53#ibcon#enter sib2, iclass 38, count 0 2006.229.09:19:14.53#ibcon#flushed, iclass 38, count 0 2006.229.09:19:14.53#ibcon#about to write, iclass 38, count 0 2006.229.09:19:14.53#ibcon#wrote, iclass 38, count 0 2006.229.09:19:14.53#ibcon#about to read 3, iclass 38, count 0 2006.229.09:19:14.56#ibcon#read 3, iclass 38, count 0 2006.229.09:19:14.56#ibcon#about to read 4, iclass 38, count 0 2006.229.09:19:14.56#ibcon#read 4, iclass 38, count 0 2006.229.09:19:14.56#ibcon#about to read 5, iclass 38, count 0 2006.229.09:19:14.56#ibcon#read 5, iclass 38, count 0 2006.229.09:19:14.56#ibcon#about to read 6, iclass 38, count 0 2006.229.09:19:14.56#ibcon#read 6, iclass 38, count 0 2006.229.09:19:14.56#ibcon#end of sib2, iclass 38, count 0 2006.229.09:19:14.56#ibcon#*after write, iclass 38, count 0 2006.229.09:19:14.56#ibcon#*before return 0, iclass 38, count 0 2006.229.09:19:14.56#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:14.56#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:19:14.56#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:19:14.56#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:19:14.56$vck44/vbbw=wide 2006.229.09:19:14.56#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:19:14.56#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:19:14.56#ibcon#ireg 8 cls_cnt 0 2006.229.09:19:14.56#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:19:14.63#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:19:14.63#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:19:14.63#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:19:14.63#ibcon#first serial, iclass 40, count 0 2006.229.09:19:14.63#ibcon#enter sib2, iclass 40, count 0 2006.229.09:19:14.63#ibcon#flushed, iclass 40, count 0 2006.229.09:19:14.63#ibcon#about to write, iclass 40, count 0 2006.229.09:19:14.63#ibcon#wrote, iclass 40, count 0 2006.229.09:19:14.63#ibcon#about to read 3, iclass 40, count 0 2006.229.09:19:14.65#ibcon#read 3, iclass 40, count 0 2006.229.09:19:14.65#ibcon#about to read 4, iclass 40, count 0 2006.229.09:19:14.65#ibcon#read 4, iclass 40, count 0 2006.229.09:19:14.65#ibcon#about to read 5, iclass 40, count 0 2006.229.09:19:14.65#ibcon#read 5, iclass 40, count 0 2006.229.09:19:14.65#ibcon#about to read 6, iclass 40, count 0 2006.229.09:19:14.65#ibcon#read 6, iclass 40, count 0 2006.229.09:19:14.65#ibcon#end of sib2, iclass 40, count 0 2006.229.09:19:14.65#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:19:14.65#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:19:14.65#ibcon#[27=BW32\r\n] 2006.229.09:19:14.65#ibcon#*before write, iclass 40, count 0 2006.229.09:19:14.65#ibcon#enter sib2, iclass 40, count 0 2006.229.09:19:14.65#ibcon#flushed, iclass 40, count 0 2006.229.09:19:14.65#ibcon#about to write, iclass 40, count 0 2006.229.09:19:14.65#ibcon#wrote, iclass 40, count 0 2006.229.09:19:14.65#ibcon#about to read 3, iclass 40, count 0 2006.229.09:19:14.68#ibcon#read 3, iclass 40, count 0 2006.229.09:19:14.68#ibcon#about to read 4, iclass 40, count 0 2006.229.09:19:14.68#ibcon#read 4, iclass 40, count 0 2006.229.09:19:14.68#ibcon#about to read 5, iclass 40, count 0 2006.229.09:19:14.68#ibcon#read 5, iclass 40, count 0 2006.229.09:19:14.68#ibcon#about to read 6, iclass 40, count 0 2006.229.09:19:14.68#ibcon#read 6, iclass 40, count 0 2006.229.09:19:14.68#ibcon#end of sib2, iclass 40, count 0 2006.229.09:19:14.68#ibcon#*after write, iclass 40, count 0 2006.229.09:19:14.68#ibcon#*before return 0, iclass 40, count 0 2006.229.09:19:14.68#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:19:14.68#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:19:14.68#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:19:14.68#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:19:14.68$setupk4/ifdk4 2006.229.09:19:14.68$ifdk4/lo= 2006.229.09:19:14.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:19:14.69$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:19:14.69$ifdk4/patch= 2006.229.09:19:14.69$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:19:14.69$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:19:14.69$setupk4/!*+20s 2006.229.09:19:20.45#abcon#<5=/05 2.0 3.9 29.07 961000.9\r\n> 2006.229.09:19:20.47#abcon#{5=INTERFACE CLEAR} 2006.229.09:19:20.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:19:29.21$setupk4/"tpicd 2006.229.09:19:29.21$setupk4/echo=off 2006.229.09:19:29.21$setupk4/xlog=off 2006.229.09:19:29.21:!2006.229.09:23:30 2006.229.09:20:03.14#trakl#Source acquired 2006.229.09:20:04.14#flagr#flagr/antenna,acquired 2006.229.09:23:30.00:preob 2006.229.09:23:30.14/onsource/TRACKING 2006.229.09:23:30.14:!2006.229.09:23:40 2006.229.09:23:40.00:"tape 2006.229.09:23:40.00:"st=record 2006.229.09:23:40.00:data_valid=on 2006.229.09:23:40.00:midob 2006.229.09:23:40.14/onsource/TRACKING 2006.229.09:23:40.14/wx/29.04,1000.9,96 2006.229.09:23:40.29/cable/+6.3991E-03 2006.229.09:23:41.38/va/01,08,usb,yes,35,38 2006.229.09:23:41.38/va/02,07,usb,yes,38,39 2006.229.09:23:41.38/va/03,06,usb,yes,47,50 2006.229.09:23:41.38/va/04,07,usb,yes,40,42 2006.229.09:23:41.38/va/05,04,usb,yes,35,36 2006.229.09:23:41.38/va/06,04,usb,yes,40,39 2006.229.09:23:41.38/va/07,05,usb,yes,35,36 2006.229.09:23:41.38/va/08,06,usb,yes,26,32 2006.229.09:23:41.61/valo/01,524.99,yes,locked 2006.229.09:23:41.61/valo/02,534.99,yes,locked 2006.229.09:23:41.61/valo/03,564.99,yes,locked 2006.229.09:23:41.61/valo/04,624.99,yes,locked 2006.229.09:23:41.61/valo/05,734.99,yes,locked 2006.229.09:23:41.61/valo/06,814.99,yes,locked 2006.229.09:23:41.61/valo/07,864.99,yes,locked 2006.229.09:23:41.61/valo/08,884.99,yes,locked 2006.229.09:23:42.70/vb/01,04,usb,yes,33,31 2006.229.09:23:42.70/vb/02,04,usb,yes,36,36 2006.229.09:23:42.70/vb/03,04,usb,yes,33,36 2006.229.09:23:42.70/vb/04,04,usb,yes,38,36 2006.229.09:23:42.70/vb/05,04,usb,yes,30,32 2006.229.09:23:42.70/vb/06,04,usb,yes,35,30 2006.229.09:23:42.70/vb/07,04,usb,yes,34,34 2006.229.09:23:42.70/vb/08,04,usb,yes,31,35 2006.229.09:23:42.93/vblo/01,629.99,yes,locked 2006.229.09:23:42.93/vblo/02,634.99,yes,locked 2006.229.09:23:42.93/vblo/03,649.99,yes,locked 2006.229.09:23:42.93/vblo/04,679.99,yes,locked 2006.229.09:23:42.93/vblo/05,709.99,yes,locked 2006.229.09:23:42.93/vblo/06,719.99,yes,locked 2006.229.09:23:42.93/vblo/07,734.99,yes,locked 2006.229.09:23:42.93/vblo/08,744.99,yes,locked 2006.229.09:23:43.08/vabw/8 2006.229.09:23:43.23/vbbw/8 2006.229.09:23:43.32/xfe/off,on,12.2 2006.229.09:23:43.70/ifatt/23,28,28,28 2006.229.09:23:44.07/fmout-gps/S +4.64E-07 2006.229.09:23:44.11:!2006.229.09:26:50 2006.229.09:26:50.00:data_valid=off 2006.229.09:26:50.00:"et 2006.229.09:26:50.00:!+3s 2006.229.09:26:53.01:"tape 2006.229.09:26:53.01:postob 2006.229.09:26:53.17/cable/+6.4004E-03 2006.229.09:26:53.17/wx/29.00,1000.9,97 2006.229.09:26:54.07/fmout-gps/S +4.65E-07 2006.229.09:26:54.07:scan_name=229-0928,jd0608,100 2006.229.09:26:54.07:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.09:26:55.14#flagr#flagr/antenna,new-source 2006.229.09:26:55.14:checkk5 2006.229.09:26:55.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:26:55.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:26:56.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:26:56.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:26:57.10/chk_obsdata//k5ts1/T2290923??a.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.09:26:57.51/chk_obsdata//k5ts2/T2290923??b.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.09:26:57.90/chk_obsdata//k5ts3/T2290923??c.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.09:26:58.32/chk_obsdata//k5ts4/T2290923??d.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.09:26:59.06/k5log//k5ts1_log_newline 2006.229.09:26:59.76/k5log//k5ts2_log_newline 2006.229.09:27:00.49/k5log//k5ts3_log_newline 2006.229.09:27:01.18/k5log//k5ts4_log_newline 2006.229.09:27:01.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:27:01.21:setupk4=1 2006.229.09:27:01.21$setupk4/echo=on 2006.229.09:27:01.21$setupk4/pcalon 2006.229.09:27:01.21$pcalon/"no phase cal control is implemented here 2006.229.09:27:01.21$setupk4/"tpicd=stop 2006.229.09:27:01.21$setupk4/"rec=synch_on 2006.229.09:27:01.21$setupk4/"rec_mode=128 2006.229.09:27:01.21$setupk4/!* 2006.229.09:27:01.21$setupk4/recpk4 2006.229.09:27:01.21$recpk4/recpatch= 2006.229.09:27:01.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:27:01.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:27:01.22$setupk4/vck44 2006.229.09:27:01.22$vck44/valo=1,524.99 2006.229.09:27:01.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.09:27:01.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.09:27:01.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:01.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:01.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:01.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:01.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:27:01.22#ibcon#first serial, iclass 13, count 0 2006.229.09:27:01.22#ibcon#enter sib2, iclass 13, count 0 2006.229.09:27:01.22#ibcon#flushed, iclass 13, count 0 2006.229.09:27:01.22#ibcon#about to write, iclass 13, count 0 2006.229.09:27:01.22#ibcon#wrote, iclass 13, count 0 2006.229.09:27:01.22#ibcon#about to read 3, iclass 13, count 0 2006.229.09:27:01.24#ibcon#read 3, iclass 13, count 0 2006.229.09:27:01.24#ibcon#about to read 4, iclass 13, count 0 2006.229.09:27:01.24#ibcon#read 4, iclass 13, count 0 2006.229.09:27:01.24#ibcon#about to read 5, iclass 13, count 0 2006.229.09:27:01.24#ibcon#read 5, iclass 13, count 0 2006.229.09:27:01.24#ibcon#about to read 6, iclass 13, count 0 2006.229.09:27:01.24#ibcon#read 6, iclass 13, count 0 2006.229.09:27:01.24#ibcon#end of sib2, iclass 13, count 0 2006.229.09:27:01.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:27:01.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:27:01.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:27:01.24#ibcon#*before write, iclass 13, count 0 2006.229.09:27:01.24#ibcon#enter sib2, iclass 13, count 0 2006.229.09:27:01.24#ibcon#flushed, iclass 13, count 0 2006.229.09:27:01.24#ibcon#about to write, iclass 13, count 0 2006.229.09:27:01.24#ibcon#wrote, iclass 13, count 0 2006.229.09:27:01.24#ibcon#about to read 3, iclass 13, count 0 2006.229.09:27:01.29#ibcon#read 3, iclass 13, count 0 2006.229.09:27:01.29#ibcon#about to read 4, iclass 13, count 0 2006.229.09:27:01.29#ibcon#read 4, iclass 13, count 0 2006.229.09:27:01.29#ibcon#about to read 5, iclass 13, count 0 2006.229.09:27:01.29#ibcon#read 5, iclass 13, count 0 2006.229.09:27:01.29#ibcon#about to read 6, iclass 13, count 0 2006.229.09:27:01.29#ibcon#read 6, iclass 13, count 0 2006.229.09:27:01.29#ibcon#end of sib2, iclass 13, count 0 2006.229.09:27:01.29#ibcon#*after write, iclass 13, count 0 2006.229.09:27:01.29#ibcon#*before return 0, iclass 13, count 0 2006.229.09:27:01.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:01.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:01.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:27:01.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:27:01.29$vck44/va=1,8 2006.229.09:27:01.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.09:27:01.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.09:27:01.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:01.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:01.29#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:01.29#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:01.29#ibcon#enter wrdev, iclass 15, count 2 2006.229.09:27:01.29#ibcon#first serial, iclass 15, count 2 2006.229.09:27:01.29#ibcon#enter sib2, iclass 15, count 2 2006.229.09:27:01.29#ibcon#flushed, iclass 15, count 2 2006.229.09:27:01.29#ibcon#about to write, iclass 15, count 2 2006.229.09:27:01.29#ibcon#wrote, iclass 15, count 2 2006.229.09:27:01.29#ibcon#about to read 3, iclass 15, count 2 2006.229.09:27:01.32#ibcon#read 3, iclass 15, count 2 2006.229.09:27:01.32#ibcon#about to read 4, iclass 15, count 2 2006.229.09:27:01.32#ibcon#read 4, iclass 15, count 2 2006.229.09:27:01.32#ibcon#about to read 5, iclass 15, count 2 2006.229.09:27:01.32#ibcon#read 5, iclass 15, count 2 2006.229.09:27:01.32#ibcon#about to read 6, iclass 15, count 2 2006.229.09:27:01.32#ibcon#read 6, iclass 15, count 2 2006.229.09:27:01.32#ibcon#end of sib2, iclass 15, count 2 2006.229.09:27:01.32#ibcon#*mode == 0, iclass 15, count 2 2006.229.09:27:01.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.09:27:01.32#ibcon#[25=AT01-08\r\n] 2006.229.09:27:01.32#ibcon#*before write, iclass 15, count 2 2006.229.09:27:01.32#ibcon#enter sib2, iclass 15, count 2 2006.229.09:27:01.32#ibcon#flushed, iclass 15, count 2 2006.229.09:27:01.32#ibcon#about to write, iclass 15, count 2 2006.229.09:27:01.32#ibcon#wrote, iclass 15, count 2 2006.229.09:27:01.32#ibcon#about to read 3, iclass 15, count 2 2006.229.09:27:01.35#ibcon#read 3, iclass 15, count 2 2006.229.09:27:01.35#ibcon#about to read 4, iclass 15, count 2 2006.229.09:27:01.35#ibcon#read 4, iclass 15, count 2 2006.229.09:27:01.35#ibcon#about to read 5, iclass 15, count 2 2006.229.09:27:01.35#ibcon#read 5, iclass 15, count 2 2006.229.09:27:01.35#ibcon#about to read 6, iclass 15, count 2 2006.229.09:27:01.35#ibcon#read 6, iclass 15, count 2 2006.229.09:27:01.35#ibcon#end of sib2, iclass 15, count 2 2006.229.09:27:01.35#ibcon#*after write, iclass 15, count 2 2006.229.09:27:01.35#ibcon#*before return 0, iclass 15, count 2 2006.229.09:27:01.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:01.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:01.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.09:27:01.35#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:01.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:01.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:01.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:01.47#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:27:01.47#ibcon#first serial, iclass 15, count 0 2006.229.09:27:01.47#ibcon#enter sib2, iclass 15, count 0 2006.229.09:27:01.47#ibcon#flushed, iclass 15, count 0 2006.229.09:27:01.47#ibcon#about to write, iclass 15, count 0 2006.229.09:27:01.47#ibcon#wrote, iclass 15, count 0 2006.229.09:27:01.47#ibcon#about to read 3, iclass 15, count 0 2006.229.09:27:01.49#ibcon#read 3, iclass 15, count 0 2006.229.09:27:01.49#ibcon#about to read 4, iclass 15, count 0 2006.229.09:27:01.49#ibcon#read 4, iclass 15, count 0 2006.229.09:27:01.49#ibcon#about to read 5, iclass 15, count 0 2006.229.09:27:01.49#ibcon#read 5, iclass 15, count 0 2006.229.09:27:01.49#ibcon#about to read 6, iclass 15, count 0 2006.229.09:27:01.49#ibcon#read 6, iclass 15, count 0 2006.229.09:27:01.49#ibcon#end of sib2, iclass 15, count 0 2006.229.09:27:01.49#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:27:01.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:27:01.49#ibcon#[25=USB\r\n] 2006.229.09:27:01.49#ibcon#*before write, iclass 15, count 0 2006.229.09:27:01.49#ibcon#enter sib2, iclass 15, count 0 2006.229.09:27:01.49#ibcon#flushed, iclass 15, count 0 2006.229.09:27:01.49#ibcon#about to write, iclass 15, count 0 2006.229.09:27:01.49#ibcon#wrote, iclass 15, count 0 2006.229.09:27:01.49#ibcon#about to read 3, iclass 15, count 0 2006.229.09:27:01.52#ibcon#read 3, iclass 15, count 0 2006.229.09:27:01.52#ibcon#about to read 4, iclass 15, count 0 2006.229.09:27:01.52#ibcon#read 4, iclass 15, count 0 2006.229.09:27:01.52#ibcon#about to read 5, iclass 15, count 0 2006.229.09:27:01.52#ibcon#read 5, iclass 15, count 0 2006.229.09:27:01.52#ibcon#about to read 6, iclass 15, count 0 2006.229.09:27:01.52#ibcon#read 6, iclass 15, count 0 2006.229.09:27:01.52#ibcon#end of sib2, iclass 15, count 0 2006.229.09:27:01.52#ibcon#*after write, iclass 15, count 0 2006.229.09:27:01.52#ibcon#*before return 0, iclass 15, count 0 2006.229.09:27:01.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:01.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:01.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:27:01.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:27:01.52$vck44/valo=2,534.99 2006.229.09:27:01.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.09:27:01.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.09:27:01.52#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:01.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:01.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:01.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:01.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:27:01.52#ibcon#first serial, iclass 17, count 0 2006.229.09:27:01.52#ibcon#enter sib2, iclass 17, count 0 2006.229.09:27:01.52#ibcon#flushed, iclass 17, count 0 2006.229.09:27:01.52#ibcon#about to write, iclass 17, count 0 2006.229.09:27:01.52#ibcon#wrote, iclass 17, count 0 2006.229.09:27:01.52#ibcon#about to read 3, iclass 17, count 0 2006.229.09:27:01.54#ibcon#read 3, iclass 17, count 0 2006.229.09:27:01.54#ibcon#about to read 4, iclass 17, count 0 2006.229.09:27:01.54#ibcon#read 4, iclass 17, count 0 2006.229.09:27:01.54#ibcon#about to read 5, iclass 17, count 0 2006.229.09:27:01.54#ibcon#read 5, iclass 17, count 0 2006.229.09:27:01.54#ibcon#about to read 6, iclass 17, count 0 2006.229.09:27:01.54#ibcon#read 6, iclass 17, count 0 2006.229.09:27:01.54#ibcon#end of sib2, iclass 17, count 0 2006.229.09:27:01.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:27:01.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:27:01.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:27:01.54#ibcon#*before write, iclass 17, count 0 2006.229.09:27:01.54#ibcon#enter sib2, iclass 17, count 0 2006.229.09:27:01.54#ibcon#flushed, iclass 17, count 0 2006.229.09:27:01.54#ibcon#about to write, iclass 17, count 0 2006.229.09:27:01.54#ibcon#wrote, iclass 17, count 0 2006.229.09:27:01.54#ibcon#about to read 3, iclass 17, count 0 2006.229.09:27:01.58#ibcon#read 3, iclass 17, count 0 2006.229.09:27:01.58#ibcon#about to read 4, iclass 17, count 0 2006.229.09:27:01.58#ibcon#read 4, iclass 17, count 0 2006.229.09:27:01.58#ibcon#about to read 5, iclass 17, count 0 2006.229.09:27:01.58#ibcon#read 5, iclass 17, count 0 2006.229.09:27:01.58#ibcon#about to read 6, iclass 17, count 0 2006.229.09:27:01.58#ibcon#read 6, iclass 17, count 0 2006.229.09:27:01.58#ibcon#end of sib2, iclass 17, count 0 2006.229.09:27:01.58#ibcon#*after write, iclass 17, count 0 2006.229.09:27:01.58#ibcon#*before return 0, iclass 17, count 0 2006.229.09:27:01.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:01.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:01.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:27:01.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:27:01.58$vck44/va=2,7 2006.229.09:27:01.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.09:27:01.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.09:27:01.58#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:01.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:01.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:01.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:01.64#ibcon#enter wrdev, iclass 19, count 2 2006.229.09:27:01.64#ibcon#first serial, iclass 19, count 2 2006.229.09:27:01.64#ibcon#enter sib2, iclass 19, count 2 2006.229.09:27:01.64#ibcon#flushed, iclass 19, count 2 2006.229.09:27:01.64#ibcon#about to write, iclass 19, count 2 2006.229.09:27:01.64#ibcon#wrote, iclass 19, count 2 2006.229.09:27:01.64#ibcon#about to read 3, iclass 19, count 2 2006.229.09:27:01.66#ibcon#read 3, iclass 19, count 2 2006.229.09:27:01.66#ibcon#about to read 4, iclass 19, count 2 2006.229.09:27:01.66#ibcon#read 4, iclass 19, count 2 2006.229.09:27:01.66#ibcon#about to read 5, iclass 19, count 2 2006.229.09:27:01.66#ibcon#read 5, iclass 19, count 2 2006.229.09:27:01.66#ibcon#about to read 6, iclass 19, count 2 2006.229.09:27:01.66#ibcon#read 6, iclass 19, count 2 2006.229.09:27:01.66#ibcon#end of sib2, iclass 19, count 2 2006.229.09:27:01.66#ibcon#*mode == 0, iclass 19, count 2 2006.229.09:27:01.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.09:27:01.66#ibcon#[25=AT02-07\r\n] 2006.229.09:27:01.66#ibcon#*before write, iclass 19, count 2 2006.229.09:27:01.66#ibcon#enter sib2, iclass 19, count 2 2006.229.09:27:01.66#ibcon#flushed, iclass 19, count 2 2006.229.09:27:01.66#ibcon#about to write, iclass 19, count 2 2006.229.09:27:01.66#ibcon#wrote, iclass 19, count 2 2006.229.09:27:01.66#ibcon#about to read 3, iclass 19, count 2 2006.229.09:27:01.69#ibcon#read 3, iclass 19, count 2 2006.229.09:27:01.69#ibcon#about to read 4, iclass 19, count 2 2006.229.09:27:01.69#ibcon#read 4, iclass 19, count 2 2006.229.09:27:01.69#ibcon#about to read 5, iclass 19, count 2 2006.229.09:27:01.69#ibcon#read 5, iclass 19, count 2 2006.229.09:27:01.69#ibcon#about to read 6, iclass 19, count 2 2006.229.09:27:01.69#ibcon#read 6, iclass 19, count 2 2006.229.09:27:01.69#ibcon#end of sib2, iclass 19, count 2 2006.229.09:27:01.69#ibcon#*after write, iclass 19, count 2 2006.229.09:27:01.69#ibcon#*before return 0, iclass 19, count 2 2006.229.09:27:01.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:01.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:01.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.09:27:01.69#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:01.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:01.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:01.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:01.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:27:01.81#ibcon#first serial, iclass 19, count 0 2006.229.09:27:01.81#ibcon#enter sib2, iclass 19, count 0 2006.229.09:27:01.81#ibcon#flushed, iclass 19, count 0 2006.229.09:27:01.81#ibcon#about to write, iclass 19, count 0 2006.229.09:27:01.81#ibcon#wrote, iclass 19, count 0 2006.229.09:27:01.81#ibcon#about to read 3, iclass 19, count 0 2006.229.09:27:01.83#ibcon#read 3, iclass 19, count 0 2006.229.09:27:01.83#ibcon#about to read 4, iclass 19, count 0 2006.229.09:27:01.83#ibcon#read 4, iclass 19, count 0 2006.229.09:27:01.83#ibcon#about to read 5, iclass 19, count 0 2006.229.09:27:01.83#ibcon#read 5, iclass 19, count 0 2006.229.09:27:01.83#ibcon#about to read 6, iclass 19, count 0 2006.229.09:27:01.83#ibcon#read 6, iclass 19, count 0 2006.229.09:27:01.83#ibcon#end of sib2, iclass 19, count 0 2006.229.09:27:01.83#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:27:01.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:27:01.83#ibcon#[25=USB\r\n] 2006.229.09:27:01.83#ibcon#*before write, iclass 19, count 0 2006.229.09:27:01.83#ibcon#enter sib2, iclass 19, count 0 2006.229.09:27:01.83#ibcon#flushed, iclass 19, count 0 2006.229.09:27:01.83#ibcon#about to write, iclass 19, count 0 2006.229.09:27:01.83#ibcon#wrote, iclass 19, count 0 2006.229.09:27:01.83#ibcon#about to read 3, iclass 19, count 0 2006.229.09:27:01.86#ibcon#read 3, iclass 19, count 0 2006.229.09:27:01.86#ibcon#about to read 4, iclass 19, count 0 2006.229.09:27:01.86#ibcon#read 4, iclass 19, count 0 2006.229.09:27:01.86#ibcon#about to read 5, iclass 19, count 0 2006.229.09:27:01.86#ibcon#read 5, iclass 19, count 0 2006.229.09:27:01.86#ibcon#about to read 6, iclass 19, count 0 2006.229.09:27:01.86#ibcon#read 6, iclass 19, count 0 2006.229.09:27:01.86#ibcon#end of sib2, iclass 19, count 0 2006.229.09:27:01.86#ibcon#*after write, iclass 19, count 0 2006.229.09:27:01.86#ibcon#*before return 0, iclass 19, count 0 2006.229.09:27:01.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:01.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:01.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:27:01.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:27:01.86$vck44/valo=3,564.99 2006.229.09:27:01.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.09:27:01.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.09:27:01.86#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:01.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:01.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:01.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:01.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:27:01.86#ibcon#first serial, iclass 21, count 0 2006.229.09:27:01.86#ibcon#enter sib2, iclass 21, count 0 2006.229.09:27:01.86#ibcon#flushed, iclass 21, count 0 2006.229.09:27:01.86#ibcon#about to write, iclass 21, count 0 2006.229.09:27:01.86#ibcon#wrote, iclass 21, count 0 2006.229.09:27:01.86#ibcon#about to read 3, iclass 21, count 0 2006.229.09:27:01.88#ibcon#read 3, iclass 21, count 0 2006.229.09:27:01.88#ibcon#about to read 4, iclass 21, count 0 2006.229.09:27:01.88#ibcon#read 4, iclass 21, count 0 2006.229.09:27:01.88#ibcon#about to read 5, iclass 21, count 0 2006.229.09:27:01.88#ibcon#read 5, iclass 21, count 0 2006.229.09:27:01.88#ibcon#about to read 6, iclass 21, count 0 2006.229.09:27:01.88#ibcon#read 6, iclass 21, count 0 2006.229.09:27:01.88#ibcon#end of sib2, iclass 21, count 0 2006.229.09:27:01.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:27:01.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:27:01.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:27:01.88#ibcon#*before write, iclass 21, count 0 2006.229.09:27:01.88#ibcon#enter sib2, iclass 21, count 0 2006.229.09:27:01.88#ibcon#flushed, iclass 21, count 0 2006.229.09:27:01.88#ibcon#about to write, iclass 21, count 0 2006.229.09:27:01.88#ibcon#wrote, iclass 21, count 0 2006.229.09:27:01.88#ibcon#about to read 3, iclass 21, count 0 2006.229.09:27:01.92#ibcon#read 3, iclass 21, count 0 2006.229.09:27:01.92#ibcon#about to read 4, iclass 21, count 0 2006.229.09:27:01.92#ibcon#read 4, iclass 21, count 0 2006.229.09:27:01.92#ibcon#about to read 5, iclass 21, count 0 2006.229.09:27:01.92#ibcon#read 5, iclass 21, count 0 2006.229.09:27:01.92#ibcon#about to read 6, iclass 21, count 0 2006.229.09:27:01.92#ibcon#read 6, iclass 21, count 0 2006.229.09:27:01.92#ibcon#end of sib2, iclass 21, count 0 2006.229.09:27:01.92#ibcon#*after write, iclass 21, count 0 2006.229.09:27:01.92#ibcon#*before return 0, iclass 21, count 0 2006.229.09:27:01.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:01.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:01.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:27:01.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:27:01.92$vck44/va=3,6 2006.229.09:27:01.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.09:27:01.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.09:27:01.92#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:01.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:01.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:01.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:01.98#ibcon#enter wrdev, iclass 23, count 2 2006.229.09:27:01.98#ibcon#first serial, iclass 23, count 2 2006.229.09:27:01.98#ibcon#enter sib2, iclass 23, count 2 2006.229.09:27:01.98#ibcon#flushed, iclass 23, count 2 2006.229.09:27:01.98#ibcon#about to write, iclass 23, count 2 2006.229.09:27:01.98#ibcon#wrote, iclass 23, count 2 2006.229.09:27:01.98#ibcon#about to read 3, iclass 23, count 2 2006.229.09:27:02.00#ibcon#read 3, iclass 23, count 2 2006.229.09:27:02.00#ibcon#about to read 4, iclass 23, count 2 2006.229.09:27:02.00#ibcon#read 4, iclass 23, count 2 2006.229.09:27:02.00#ibcon#about to read 5, iclass 23, count 2 2006.229.09:27:02.00#ibcon#read 5, iclass 23, count 2 2006.229.09:27:02.00#ibcon#about to read 6, iclass 23, count 2 2006.229.09:27:02.00#ibcon#read 6, iclass 23, count 2 2006.229.09:27:02.00#ibcon#end of sib2, iclass 23, count 2 2006.229.09:27:02.00#ibcon#*mode == 0, iclass 23, count 2 2006.229.09:27:02.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.09:27:02.00#ibcon#[25=AT03-06\r\n] 2006.229.09:27:02.00#ibcon#*before write, iclass 23, count 2 2006.229.09:27:02.00#ibcon#enter sib2, iclass 23, count 2 2006.229.09:27:02.00#ibcon#flushed, iclass 23, count 2 2006.229.09:27:02.00#ibcon#about to write, iclass 23, count 2 2006.229.09:27:02.00#ibcon#wrote, iclass 23, count 2 2006.229.09:27:02.00#ibcon#about to read 3, iclass 23, count 2 2006.229.09:27:02.03#ibcon#read 3, iclass 23, count 2 2006.229.09:27:02.03#ibcon#about to read 4, iclass 23, count 2 2006.229.09:27:02.03#ibcon#read 4, iclass 23, count 2 2006.229.09:27:02.03#ibcon#about to read 5, iclass 23, count 2 2006.229.09:27:02.03#ibcon#read 5, iclass 23, count 2 2006.229.09:27:02.03#ibcon#about to read 6, iclass 23, count 2 2006.229.09:27:02.03#ibcon#read 6, iclass 23, count 2 2006.229.09:27:02.03#ibcon#end of sib2, iclass 23, count 2 2006.229.09:27:02.03#ibcon#*after write, iclass 23, count 2 2006.229.09:27:02.03#ibcon#*before return 0, iclass 23, count 2 2006.229.09:27:02.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:02.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:02.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.09:27:02.03#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:02.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:02.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:02.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:02.15#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:27:02.15#ibcon#first serial, iclass 23, count 0 2006.229.09:27:02.15#ibcon#enter sib2, iclass 23, count 0 2006.229.09:27:02.15#ibcon#flushed, iclass 23, count 0 2006.229.09:27:02.15#ibcon#about to write, iclass 23, count 0 2006.229.09:27:02.15#ibcon#wrote, iclass 23, count 0 2006.229.09:27:02.15#ibcon#about to read 3, iclass 23, count 0 2006.229.09:27:02.17#ibcon#read 3, iclass 23, count 0 2006.229.09:27:02.17#ibcon#about to read 4, iclass 23, count 0 2006.229.09:27:02.17#ibcon#read 4, iclass 23, count 0 2006.229.09:27:02.17#ibcon#about to read 5, iclass 23, count 0 2006.229.09:27:02.17#ibcon#read 5, iclass 23, count 0 2006.229.09:27:02.17#ibcon#about to read 6, iclass 23, count 0 2006.229.09:27:02.17#ibcon#read 6, iclass 23, count 0 2006.229.09:27:02.17#ibcon#end of sib2, iclass 23, count 0 2006.229.09:27:02.17#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:27:02.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:27:02.17#ibcon#[25=USB\r\n] 2006.229.09:27:02.17#ibcon#*before write, iclass 23, count 0 2006.229.09:27:02.17#ibcon#enter sib2, iclass 23, count 0 2006.229.09:27:02.17#ibcon#flushed, iclass 23, count 0 2006.229.09:27:02.17#ibcon#about to write, iclass 23, count 0 2006.229.09:27:02.17#ibcon#wrote, iclass 23, count 0 2006.229.09:27:02.17#ibcon#about to read 3, iclass 23, count 0 2006.229.09:27:02.20#ibcon#read 3, iclass 23, count 0 2006.229.09:27:02.20#ibcon#about to read 4, iclass 23, count 0 2006.229.09:27:02.20#ibcon#read 4, iclass 23, count 0 2006.229.09:27:02.20#ibcon#about to read 5, iclass 23, count 0 2006.229.09:27:02.20#ibcon#read 5, iclass 23, count 0 2006.229.09:27:02.20#ibcon#about to read 6, iclass 23, count 0 2006.229.09:27:02.20#ibcon#read 6, iclass 23, count 0 2006.229.09:27:02.20#ibcon#end of sib2, iclass 23, count 0 2006.229.09:27:02.20#ibcon#*after write, iclass 23, count 0 2006.229.09:27:02.20#ibcon#*before return 0, iclass 23, count 0 2006.229.09:27:02.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:02.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:02.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:27:02.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:27:02.20$vck44/valo=4,624.99 2006.229.09:27:02.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:27:02.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:27:02.20#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:02.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:02.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:02.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:02.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:27:02.20#ibcon#first serial, iclass 25, count 0 2006.229.09:27:02.20#ibcon#enter sib2, iclass 25, count 0 2006.229.09:27:02.20#ibcon#flushed, iclass 25, count 0 2006.229.09:27:02.20#ibcon#about to write, iclass 25, count 0 2006.229.09:27:02.20#ibcon#wrote, iclass 25, count 0 2006.229.09:27:02.20#ibcon#about to read 3, iclass 25, count 0 2006.229.09:27:02.22#ibcon#read 3, iclass 25, count 0 2006.229.09:27:02.22#ibcon#about to read 4, iclass 25, count 0 2006.229.09:27:02.22#ibcon#read 4, iclass 25, count 0 2006.229.09:27:02.22#ibcon#about to read 5, iclass 25, count 0 2006.229.09:27:02.22#ibcon#read 5, iclass 25, count 0 2006.229.09:27:02.22#ibcon#about to read 6, iclass 25, count 0 2006.229.09:27:02.22#ibcon#read 6, iclass 25, count 0 2006.229.09:27:02.22#ibcon#end of sib2, iclass 25, count 0 2006.229.09:27:02.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:27:02.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:27:02.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:27:02.22#ibcon#*before write, iclass 25, count 0 2006.229.09:27:02.22#ibcon#enter sib2, iclass 25, count 0 2006.229.09:27:02.22#ibcon#flushed, iclass 25, count 0 2006.229.09:27:02.22#ibcon#about to write, iclass 25, count 0 2006.229.09:27:02.22#ibcon#wrote, iclass 25, count 0 2006.229.09:27:02.22#ibcon#about to read 3, iclass 25, count 0 2006.229.09:27:02.26#ibcon#read 3, iclass 25, count 0 2006.229.09:27:02.26#ibcon#about to read 4, iclass 25, count 0 2006.229.09:27:02.26#ibcon#read 4, iclass 25, count 0 2006.229.09:27:02.26#ibcon#about to read 5, iclass 25, count 0 2006.229.09:27:02.26#ibcon#read 5, iclass 25, count 0 2006.229.09:27:02.26#ibcon#about to read 6, iclass 25, count 0 2006.229.09:27:02.26#ibcon#read 6, iclass 25, count 0 2006.229.09:27:02.26#ibcon#end of sib2, iclass 25, count 0 2006.229.09:27:02.26#ibcon#*after write, iclass 25, count 0 2006.229.09:27:02.26#ibcon#*before return 0, iclass 25, count 0 2006.229.09:27:02.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:02.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:02.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:27:02.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:27:02.26$vck44/va=4,7 2006.229.09:27:02.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.09:27:02.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.09:27:02.26#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:02.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:02.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:02.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:02.32#ibcon#enter wrdev, iclass 27, count 2 2006.229.09:27:02.32#ibcon#first serial, iclass 27, count 2 2006.229.09:27:02.32#ibcon#enter sib2, iclass 27, count 2 2006.229.09:27:02.32#ibcon#flushed, iclass 27, count 2 2006.229.09:27:02.32#ibcon#about to write, iclass 27, count 2 2006.229.09:27:02.32#ibcon#wrote, iclass 27, count 2 2006.229.09:27:02.32#ibcon#about to read 3, iclass 27, count 2 2006.229.09:27:02.34#ibcon#read 3, iclass 27, count 2 2006.229.09:27:02.34#ibcon#about to read 4, iclass 27, count 2 2006.229.09:27:02.34#ibcon#read 4, iclass 27, count 2 2006.229.09:27:02.34#ibcon#about to read 5, iclass 27, count 2 2006.229.09:27:02.34#ibcon#read 5, iclass 27, count 2 2006.229.09:27:02.34#ibcon#about to read 6, iclass 27, count 2 2006.229.09:27:02.34#ibcon#read 6, iclass 27, count 2 2006.229.09:27:02.34#ibcon#end of sib2, iclass 27, count 2 2006.229.09:27:02.34#ibcon#*mode == 0, iclass 27, count 2 2006.229.09:27:02.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.09:27:02.34#ibcon#[25=AT04-07\r\n] 2006.229.09:27:02.34#ibcon#*before write, iclass 27, count 2 2006.229.09:27:02.34#ibcon#enter sib2, iclass 27, count 2 2006.229.09:27:02.34#ibcon#flushed, iclass 27, count 2 2006.229.09:27:02.34#ibcon#about to write, iclass 27, count 2 2006.229.09:27:02.34#ibcon#wrote, iclass 27, count 2 2006.229.09:27:02.34#ibcon#about to read 3, iclass 27, count 2 2006.229.09:27:02.37#ibcon#read 3, iclass 27, count 2 2006.229.09:27:02.37#ibcon#about to read 4, iclass 27, count 2 2006.229.09:27:02.37#ibcon#read 4, iclass 27, count 2 2006.229.09:27:02.37#ibcon#about to read 5, iclass 27, count 2 2006.229.09:27:02.37#ibcon#read 5, iclass 27, count 2 2006.229.09:27:02.37#ibcon#about to read 6, iclass 27, count 2 2006.229.09:27:02.37#ibcon#read 6, iclass 27, count 2 2006.229.09:27:02.37#ibcon#end of sib2, iclass 27, count 2 2006.229.09:27:02.37#ibcon#*after write, iclass 27, count 2 2006.229.09:27:02.40#ibcon#*before return 0, iclass 27, count 2 2006.229.09:27:02.40#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:02.40#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:02.40#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.09:27:02.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:02.40#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:02.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:02.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:02.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:27:02.51#ibcon#first serial, iclass 27, count 0 2006.229.09:27:02.51#ibcon#enter sib2, iclass 27, count 0 2006.229.09:27:02.51#ibcon#flushed, iclass 27, count 0 2006.229.09:27:02.51#ibcon#about to write, iclass 27, count 0 2006.229.09:27:02.51#ibcon#wrote, iclass 27, count 0 2006.229.09:27:02.51#ibcon#about to read 3, iclass 27, count 0 2006.229.09:27:02.53#ibcon#read 3, iclass 27, count 0 2006.229.09:27:02.53#ibcon#about to read 4, iclass 27, count 0 2006.229.09:27:02.53#ibcon#read 4, iclass 27, count 0 2006.229.09:27:02.53#ibcon#about to read 5, iclass 27, count 0 2006.229.09:27:02.53#ibcon#read 5, iclass 27, count 0 2006.229.09:27:02.53#ibcon#about to read 6, iclass 27, count 0 2006.229.09:27:02.53#ibcon#read 6, iclass 27, count 0 2006.229.09:27:02.53#ibcon#end of sib2, iclass 27, count 0 2006.229.09:27:02.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:27:02.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:27:02.53#ibcon#[25=USB\r\n] 2006.229.09:27:02.53#ibcon#*before write, iclass 27, count 0 2006.229.09:27:02.53#ibcon#enter sib2, iclass 27, count 0 2006.229.09:27:02.53#ibcon#flushed, iclass 27, count 0 2006.229.09:27:02.53#ibcon#about to write, iclass 27, count 0 2006.229.09:27:02.53#ibcon#wrote, iclass 27, count 0 2006.229.09:27:02.53#ibcon#about to read 3, iclass 27, count 0 2006.229.09:27:02.56#ibcon#read 3, iclass 27, count 0 2006.229.09:27:02.56#ibcon#about to read 4, iclass 27, count 0 2006.229.09:27:02.56#ibcon#read 4, iclass 27, count 0 2006.229.09:27:02.56#ibcon#about to read 5, iclass 27, count 0 2006.229.09:27:02.56#ibcon#read 5, iclass 27, count 0 2006.229.09:27:02.56#ibcon#about to read 6, iclass 27, count 0 2006.229.09:27:02.56#ibcon#read 6, iclass 27, count 0 2006.229.09:27:02.56#ibcon#end of sib2, iclass 27, count 0 2006.229.09:27:02.56#ibcon#*after write, iclass 27, count 0 2006.229.09:27:02.56#ibcon#*before return 0, iclass 27, count 0 2006.229.09:27:02.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:02.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:02.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:27:02.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:27:02.56$vck44/valo=5,734.99 2006.229.09:27:02.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.09:27:02.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.09:27:02.56#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:02.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:02.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:02.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:02.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:27:02.56#ibcon#first serial, iclass 29, count 0 2006.229.09:27:02.56#ibcon#enter sib2, iclass 29, count 0 2006.229.09:27:02.56#ibcon#flushed, iclass 29, count 0 2006.229.09:27:02.56#ibcon#about to write, iclass 29, count 0 2006.229.09:27:02.56#ibcon#wrote, iclass 29, count 0 2006.229.09:27:02.56#ibcon#about to read 3, iclass 29, count 0 2006.229.09:27:02.58#ibcon#read 3, iclass 29, count 0 2006.229.09:27:02.58#ibcon#about to read 4, iclass 29, count 0 2006.229.09:27:02.58#ibcon#read 4, iclass 29, count 0 2006.229.09:27:02.58#ibcon#about to read 5, iclass 29, count 0 2006.229.09:27:02.58#ibcon#read 5, iclass 29, count 0 2006.229.09:27:02.58#ibcon#about to read 6, iclass 29, count 0 2006.229.09:27:02.58#ibcon#read 6, iclass 29, count 0 2006.229.09:27:02.58#ibcon#end of sib2, iclass 29, count 0 2006.229.09:27:02.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:27:02.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:27:02.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:27:02.58#ibcon#*before write, iclass 29, count 0 2006.229.09:27:02.58#ibcon#enter sib2, iclass 29, count 0 2006.229.09:27:02.58#ibcon#flushed, iclass 29, count 0 2006.229.09:27:02.58#ibcon#about to write, iclass 29, count 0 2006.229.09:27:02.58#ibcon#wrote, iclass 29, count 0 2006.229.09:27:02.58#ibcon#about to read 3, iclass 29, count 0 2006.229.09:27:02.62#ibcon#read 3, iclass 29, count 0 2006.229.09:27:02.62#ibcon#about to read 4, iclass 29, count 0 2006.229.09:27:02.62#ibcon#read 4, iclass 29, count 0 2006.229.09:27:02.62#ibcon#about to read 5, iclass 29, count 0 2006.229.09:27:02.62#ibcon#read 5, iclass 29, count 0 2006.229.09:27:02.62#ibcon#about to read 6, iclass 29, count 0 2006.229.09:27:02.62#ibcon#read 6, iclass 29, count 0 2006.229.09:27:02.62#ibcon#end of sib2, iclass 29, count 0 2006.229.09:27:02.62#ibcon#*after write, iclass 29, count 0 2006.229.09:27:02.62#ibcon#*before return 0, iclass 29, count 0 2006.229.09:27:02.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:02.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:02.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:27:02.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:27:02.62$vck44/va=5,4 2006.229.09:27:02.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.09:27:02.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.09:27:02.62#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:02.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:02.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:02.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:02.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.09:27:02.68#ibcon#first serial, iclass 31, count 2 2006.229.09:27:02.68#ibcon#enter sib2, iclass 31, count 2 2006.229.09:27:02.68#ibcon#flushed, iclass 31, count 2 2006.229.09:27:02.68#ibcon#about to write, iclass 31, count 2 2006.229.09:27:02.68#ibcon#wrote, iclass 31, count 2 2006.229.09:27:02.68#ibcon#about to read 3, iclass 31, count 2 2006.229.09:27:02.70#ibcon#read 3, iclass 31, count 2 2006.229.09:27:02.70#ibcon#about to read 4, iclass 31, count 2 2006.229.09:27:02.70#ibcon#read 4, iclass 31, count 2 2006.229.09:27:02.70#ibcon#about to read 5, iclass 31, count 2 2006.229.09:27:02.70#ibcon#read 5, iclass 31, count 2 2006.229.09:27:02.70#ibcon#about to read 6, iclass 31, count 2 2006.229.09:27:02.70#ibcon#read 6, iclass 31, count 2 2006.229.09:27:02.70#ibcon#end of sib2, iclass 31, count 2 2006.229.09:27:02.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.09:27:02.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.09:27:02.70#ibcon#[25=AT05-04\r\n] 2006.229.09:27:02.70#ibcon#*before write, iclass 31, count 2 2006.229.09:27:02.70#ibcon#enter sib2, iclass 31, count 2 2006.229.09:27:02.70#ibcon#flushed, iclass 31, count 2 2006.229.09:27:02.70#ibcon#about to write, iclass 31, count 2 2006.229.09:27:02.70#ibcon#wrote, iclass 31, count 2 2006.229.09:27:02.70#ibcon#about to read 3, iclass 31, count 2 2006.229.09:27:02.73#ibcon#read 3, iclass 31, count 2 2006.229.09:27:02.73#ibcon#about to read 4, iclass 31, count 2 2006.229.09:27:02.73#ibcon#read 4, iclass 31, count 2 2006.229.09:27:02.73#ibcon#about to read 5, iclass 31, count 2 2006.229.09:27:02.73#ibcon#read 5, iclass 31, count 2 2006.229.09:27:02.73#ibcon#about to read 6, iclass 31, count 2 2006.229.09:27:02.73#ibcon#read 6, iclass 31, count 2 2006.229.09:27:02.73#ibcon#end of sib2, iclass 31, count 2 2006.229.09:27:02.73#ibcon#*after write, iclass 31, count 2 2006.229.09:27:02.73#ibcon#*before return 0, iclass 31, count 2 2006.229.09:27:02.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:02.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:02.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.09:27:02.73#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:02.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:02.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:02.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:02.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:27:02.85#ibcon#first serial, iclass 31, count 0 2006.229.09:27:02.85#ibcon#enter sib2, iclass 31, count 0 2006.229.09:27:02.85#ibcon#flushed, iclass 31, count 0 2006.229.09:27:02.85#ibcon#about to write, iclass 31, count 0 2006.229.09:27:02.85#ibcon#wrote, iclass 31, count 0 2006.229.09:27:02.85#ibcon#about to read 3, iclass 31, count 0 2006.229.09:27:02.87#ibcon#read 3, iclass 31, count 0 2006.229.09:27:02.87#ibcon#about to read 4, iclass 31, count 0 2006.229.09:27:02.87#ibcon#read 4, iclass 31, count 0 2006.229.09:27:02.87#ibcon#about to read 5, iclass 31, count 0 2006.229.09:27:02.87#ibcon#read 5, iclass 31, count 0 2006.229.09:27:02.87#ibcon#about to read 6, iclass 31, count 0 2006.229.09:27:02.87#ibcon#read 6, iclass 31, count 0 2006.229.09:27:02.87#ibcon#end of sib2, iclass 31, count 0 2006.229.09:27:02.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:27:02.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:27:02.87#ibcon#[25=USB\r\n] 2006.229.09:27:02.87#ibcon#*before write, iclass 31, count 0 2006.229.09:27:02.87#ibcon#enter sib2, iclass 31, count 0 2006.229.09:27:02.87#ibcon#flushed, iclass 31, count 0 2006.229.09:27:02.87#ibcon#about to write, iclass 31, count 0 2006.229.09:27:02.87#ibcon#wrote, iclass 31, count 0 2006.229.09:27:02.87#ibcon#about to read 3, iclass 31, count 0 2006.229.09:27:02.90#ibcon#read 3, iclass 31, count 0 2006.229.09:27:02.90#ibcon#about to read 4, iclass 31, count 0 2006.229.09:27:02.90#ibcon#read 4, iclass 31, count 0 2006.229.09:27:02.90#ibcon#about to read 5, iclass 31, count 0 2006.229.09:27:02.90#ibcon#read 5, iclass 31, count 0 2006.229.09:27:02.90#ibcon#about to read 6, iclass 31, count 0 2006.229.09:27:02.90#ibcon#read 6, iclass 31, count 0 2006.229.09:27:02.90#ibcon#end of sib2, iclass 31, count 0 2006.229.09:27:02.90#ibcon#*after write, iclass 31, count 0 2006.229.09:27:02.90#ibcon#*before return 0, iclass 31, count 0 2006.229.09:27:02.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:02.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:02.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:27:02.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:27:02.90$vck44/valo=6,814.99 2006.229.09:27:02.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.09:27:02.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.09:27:02.90#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:02.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:02.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:02.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:02.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:27:02.90#ibcon#first serial, iclass 33, count 0 2006.229.09:27:02.90#ibcon#enter sib2, iclass 33, count 0 2006.229.09:27:02.90#ibcon#flushed, iclass 33, count 0 2006.229.09:27:02.90#ibcon#about to write, iclass 33, count 0 2006.229.09:27:02.90#ibcon#wrote, iclass 33, count 0 2006.229.09:27:02.90#ibcon#about to read 3, iclass 33, count 0 2006.229.09:27:02.92#ibcon#read 3, iclass 33, count 0 2006.229.09:27:02.92#ibcon#about to read 4, iclass 33, count 0 2006.229.09:27:02.92#ibcon#read 4, iclass 33, count 0 2006.229.09:27:02.92#ibcon#about to read 5, iclass 33, count 0 2006.229.09:27:02.92#ibcon#read 5, iclass 33, count 0 2006.229.09:27:02.92#ibcon#about to read 6, iclass 33, count 0 2006.229.09:27:02.92#ibcon#read 6, iclass 33, count 0 2006.229.09:27:02.92#ibcon#end of sib2, iclass 33, count 0 2006.229.09:27:02.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:27:02.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:27:02.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:27:02.92#ibcon#*before write, iclass 33, count 0 2006.229.09:27:02.92#ibcon#enter sib2, iclass 33, count 0 2006.229.09:27:02.92#ibcon#flushed, iclass 33, count 0 2006.229.09:27:02.92#ibcon#about to write, iclass 33, count 0 2006.229.09:27:02.92#ibcon#wrote, iclass 33, count 0 2006.229.09:27:02.92#ibcon#about to read 3, iclass 33, count 0 2006.229.09:27:02.96#ibcon#read 3, iclass 33, count 0 2006.229.09:27:02.96#ibcon#about to read 4, iclass 33, count 0 2006.229.09:27:02.96#ibcon#read 4, iclass 33, count 0 2006.229.09:27:02.96#ibcon#about to read 5, iclass 33, count 0 2006.229.09:27:02.96#ibcon#read 5, iclass 33, count 0 2006.229.09:27:02.96#ibcon#about to read 6, iclass 33, count 0 2006.229.09:27:02.96#ibcon#read 6, iclass 33, count 0 2006.229.09:27:02.96#ibcon#end of sib2, iclass 33, count 0 2006.229.09:27:02.96#ibcon#*after write, iclass 33, count 0 2006.229.09:27:02.96#ibcon#*before return 0, iclass 33, count 0 2006.229.09:27:02.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:02.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:02.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:27:02.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:27:02.96$vck44/va=6,4 2006.229.09:27:02.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.09:27:02.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.09:27:02.96#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:02.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:03.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:03.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:03.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.09:27:03.02#ibcon#first serial, iclass 35, count 2 2006.229.09:27:03.02#ibcon#enter sib2, iclass 35, count 2 2006.229.09:27:03.02#ibcon#flushed, iclass 35, count 2 2006.229.09:27:03.02#ibcon#about to write, iclass 35, count 2 2006.229.09:27:03.02#ibcon#wrote, iclass 35, count 2 2006.229.09:27:03.02#ibcon#about to read 3, iclass 35, count 2 2006.229.09:27:03.04#ibcon#read 3, iclass 35, count 2 2006.229.09:27:03.04#ibcon#about to read 4, iclass 35, count 2 2006.229.09:27:03.04#ibcon#read 4, iclass 35, count 2 2006.229.09:27:03.04#ibcon#about to read 5, iclass 35, count 2 2006.229.09:27:03.04#ibcon#read 5, iclass 35, count 2 2006.229.09:27:03.04#ibcon#about to read 6, iclass 35, count 2 2006.229.09:27:03.04#ibcon#read 6, iclass 35, count 2 2006.229.09:27:03.04#ibcon#end of sib2, iclass 35, count 2 2006.229.09:27:03.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.09:27:03.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.09:27:03.04#ibcon#[25=AT06-04\r\n] 2006.229.09:27:03.04#ibcon#*before write, iclass 35, count 2 2006.229.09:27:03.04#ibcon#enter sib2, iclass 35, count 2 2006.229.09:27:03.04#ibcon#flushed, iclass 35, count 2 2006.229.09:27:03.04#ibcon#about to write, iclass 35, count 2 2006.229.09:27:03.04#ibcon#wrote, iclass 35, count 2 2006.229.09:27:03.04#ibcon#about to read 3, iclass 35, count 2 2006.229.09:27:03.07#ibcon#read 3, iclass 35, count 2 2006.229.09:27:03.07#ibcon#about to read 4, iclass 35, count 2 2006.229.09:27:03.07#ibcon#read 4, iclass 35, count 2 2006.229.09:27:03.07#ibcon#about to read 5, iclass 35, count 2 2006.229.09:27:03.07#ibcon#read 5, iclass 35, count 2 2006.229.09:27:03.07#ibcon#about to read 6, iclass 35, count 2 2006.229.09:27:03.07#ibcon#read 6, iclass 35, count 2 2006.229.09:27:03.07#ibcon#end of sib2, iclass 35, count 2 2006.229.09:27:03.07#ibcon#*after write, iclass 35, count 2 2006.229.09:27:03.07#ibcon#*before return 0, iclass 35, count 2 2006.229.09:27:03.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:03.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:03.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.09:27:03.07#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:03.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:03.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:03.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:03.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:27:03.19#ibcon#first serial, iclass 35, count 0 2006.229.09:27:03.19#ibcon#enter sib2, iclass 35, count 0 2006.229.09:27:03.19#ibcon#flushed, iclass 35, count 0 2006.229.09:27:03.19#ibcon#about to write, iclass 35, count 0 2006.229.09:27:03.19#ibcon#wrote, iclass 35, count 0 2006.229.09:27:03.19#ibcon#about to read 3, iclass 35, count 0 2006.229.09:27:03.21#ibcon#read 3, iclass 35, count 0 2006.229.09:27:03.21#ibcon#about to read 4, iclass 35, count 0 2006.229.09:27:03.21#ibcon#read 4, iclass 35, count 0 2006.229.09:27:03.21#ibcon#about to read 5, iclass 35, count 0 2006.229.09:27:03.21#ibcon#read 5, iclass 35, count 0 2006.229.09:27:03.21#ibcon#about to read 6, iclass 35, count 0 2006.229.09:27:03.21#ibcon#read 6, iclass 35, count 0 2006.229.09:27:03.21#ibcon#end of sib2, iclass 35, count 0 2006.229.09:27:03.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:27:03.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:27:03.21#ibcon#[25=USB\r\n] 2006.229.09:27:03.21#ibcon#*before write, iclass 35, count 0 2006.229.09:27:03.21#ibcon#enter sib2, iclass 35, count 0 2006.229.09:27:03.21#ibcon#flushed, iclass 35, count 0 2006.229.09:27:03.21#ibcon#about to write, iclass 35, count 0 2006.229.09:27:03.21#ibcon#wrote, iclass 35, count 0 2006.229.09:27:03.21#ibcon#about to read 3, iclass 35, count 0 2006.229.09:27:03.24#ibcon#read 3, iclass 35, count 0 2006.229.09:27:03.24#ibcon#about to read 4, iclass 35, count 0 2006.229.09:27:03.24#ibcon#read 4, iclass 35, count 0 2006.229.09:27:03.24#ibcon#about to read 5, iclass 35, count 0 2006.229.09:27:03.24#ibcon#read 5, iclass 35, count 0 2006.229.09:27:03.24#ibcon#about to read 6, iclass 35, count 0 2006.229.09:27:03.24#ibcon#read 6, iclass 35, count 0 2006.229.09:27:03.24#ibcon#end of sib2, iclass 35, count 0 2006.229.09:27:03.24#ibcon#*after write, iclass 35, count 0 2006.229.09:27:03.24#ibcon#*before return 0, iclass 35, count 0 2006.229.09:27:03.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:03.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:03.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:27:03.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:27:03.24$vck44/valo=7,864.99 2006.229.09:27:03.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.09:27:03.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.09:27:03.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:03.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:03.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:03.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:03.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:27:03.24#ibcon#first serial, iclass 37, count 0 2006.229.09:27:03.24#ibcon#enter sib2, iclass 37, count 0 2006.229.09:27:03.24#ibcon#flushed, iclass 37, count 0 2006.229.09:27:03.24#ibcon#about to write, iclass 37, count 0 2006.229.09:27:03.24#ibcon#wrote, iclass 37, count 0 2006.229.09:27:03.24#ibcon#about to read 3, iclass 37, count 0 2006.229.09:27:03.26#ibcon#read 3, iclass 37, count 0 2006.229.09:27:03.26#ibcon#about to read 4, iclass 37, count 0 2006.229.09:27:03.26#ibcon#read 4, iclass 37, count 0 2006.229.09:27:03.26#ibcon#about to read 5, iclass 37, count 0 2006.229.09:27:03.26#ibcon#read 5, iclass 37, count 0 2006.229.09:27:03.26#ibcon#about to read 6, iclass 37, count 0 2006.229.09:27:03.26#ibcon#read 6, iclass 37, count 0 2006.229.09:27:03.26#ibcon#end of sib2, iclass 37, count 0 2006.229.09:27:03.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:27:03.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:27:03.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:27:03.26#ibcon#*before write, iclass 37, count 0 2006.229.09:27:03.26#ibcon#enter sib2, iclass 37, count 0 2006.229.09:27:03.26#ibcon#flushed, iclass 37, count 0 2006.229.09:27:03.26#ibcon#about to write, iclass 37, count 0 2006.229.09:27:03.26#ibcon#wrote, iclass 37, count 0 2006.229.09:27:03.26#ibcon#about to read 3, iclass 37, count 0 2006.229.09:27:03.30#ibcon#read 3, iclass 37, count 0 2006.229.09:27:03.30#ibcon#about to read 4, iclass 37, count 0 2006.229.09:27:03.30#ibcon#read 4, iclass 37, count 0 2006.229.09:27:03.30#ibcon#about to read 5, iclass 37, count 0 2006.229.09:27:03.30#ibcon#read 5, iclass 37, count 0 2006.229.09:27:03.30#ibcon#about to read 6, iclass 37, count 0 2006.229.09:27:03.30#ibcon#read 6, iclass 37, count 0 2006.229.09:27:03.30#ibcon#end of sib2, iclass 37, count 0 2006.229.09:27:03.30#ibcon#*after write, iclass 37, count 0 2006.229.09:27:03.30#ibcon#*before return 0, iclass 37, count 0 2006.229.09:27:03.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:03.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:03.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:27:03.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:27:03.30$vck44/va=7,5 2006.229.09:27:03.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.09:27:03.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.09:27:03.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:03.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:03.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:03.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:03.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.09:27:03.36#ibcon#first serial, iclass 39, count 2 2006.229.09:27:03.36#ibcon#enter sib2, iclass 39, count 2 2006.229.09:27:03.36#ibcon#flushed, iclass 39, count 2 2006.229.09:27:03.36#ibcon#about to write, iclass 39, count 2 2006.229.09:27:03.36#ibcon#wrote, iclass 39, count 2 2006.229.09:27:03.36#ibcon#about to read 3, iclass 39, count 2 2006.229.09:27:03.38#ibcon#read 3, iclass 39, count 2 2006.229.09:27:03.38#ibcon#about to read 4, iclass 39, count 2 2006.229.09:27:03.38#ibcon#read 4, iclass 39, count 2 2006.229.09:27:03.38#ibcon#about to read 5, iclass 39, count 2 2006.229.09:27:03.38#ibcon#read 5, iclass 39, count 2 2006.229.09:27:03.38#ibcon#about to read 6, iclass 39, count 2 2006.229.09:27:03.38#ibcon#read 6, iclass 39, count 2 2006.229.09:27:03.38#ibcon#end of sib2, iclass 39, count 2 2006.229.09:27:03.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.09:27:03.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.09:27:03.38#ibcon#[25=AT07-05\r\n] 2006.229.09:27:03.38#ibcon#*before write, iclass 39, count 2 2006.229.09:27:03.38#ibcon#enter sib2, iclass 39, count 2 2006.229.09:27:03.38#ibcon#flushed, iclass 39, count 2 2006.229.09:27:03.38#ibcon#about to write, iclass 39, count 2 2006.229.09:27:03.38#ibcon#wrote, iclass 39, count 2 2006.229.09:27:03.38#ibcon#about to read 3, iclass 39, count 2 2006.229.09:27:03.41#ibcon#read 3, iclass 39, count 2 2006.229.09:27:03.41#ibcon#about to read 4, iclass 39, count 2 2006.229.09:27:03.41#ibcon#read 4, iclass 39, count 2 2006.229.09:27:03.41#ibcon#about to read 5, iclass 39, count 2 2006.229.09:27:03.41#ibcon#read 5, iclass 39, count 2 2006.229.09:27:03.41#ibcon#about to read 6, iclass 39, count 2 2006.229.09:27:03.41#ibcon#read 6, iclass 39, count 2 2006.229.09:27:03.41#ibcon#end of sib2, iclass 39, count 2 2006.229.09:27:03.41#ibcon#*after write, iclass 39, count 2 2006.229.09:27:03.41#ibcon#*before return 0, iclass 39, count 2 2006.229.09:27:03.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:03.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:03.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.09:27:03.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:03.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:03.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:03.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:03.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:27:03.53#ibcon#first serial, iclass 39, count 0 2006.229.09:27:03.53#ibcon#enter sib2, iclass 39, count 0 2006.229.09:27:03.53#ibcon#flushed, iclass 39, count 0 2006.229.09:27:03.53#ibcon#about to write, iclass 39, count 0 2006.229.09:27:03.53#ibcon#wrote, iclass 39, count 0 2006.229.09:27:03.53#ibcon#about to read 3, iclass 39, count 0 2006.229.09:27:03.55#ibcon#read 3, iclass 39, count 0 2006.229.09:27:03.55#ibcon#about to read 4, iclass 39, count 0 2006.229.09:27:03.55#ibcon#read 4, iclass 39, count 0 2006.229.09:27:03.55#ibcon#about to read 5, iclass 39, count 0 2006.229.09:27:03.55#ibcon#read 5, iclass 39, count 0 2006.229.09:27:03.55#ibcon#about to read 6, iclass 39, count 0 2006.229.09:27:03.55#ibcon#read 6, iclass 39, count 0 2006.229.09:27:03.55#ibcon#end of sib2, iclass 39, count 0 2006.229.09:27:03.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:27:03.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:27:03.55#ibcon#[25=USB\r\n] 2006.229.09:27:03.55#ibcon#*before write, iclass 39, count 0 2006.229.09:27:03.55#ibcon#enter sib2, iclass 39, count 0 2006.229.09:27:03.55#ibcon#flushed, iclass 39, count 0 2006.229.09:27:03.55#ibcon#about to write, iclass 39, count 0 2006.229.09:27:03.55#ibcon#wrote, iclass 39, count 0 2006.229.09:27:03.55#ibcon#about to read 3, iclass 39, count 0 2006.229.09:27:03.58#ibcon#read 3, iclass 39, count 0 2006.229.09:27:03.58#ibcon#about to read 4, iclass 39, count 0 2006.229.09:27:03.58#ibcon#read 4, iclass 39, count 0 2006.229.09:27:03.58#ibcon#about to read 5, iclass 39, count 0 2006.229.09:27:03.58#ibcon#read 5, iclass 39, count 0 2006.229.09:27:03.58#ibcon#about to read 6, iclass 39, count 0 2006.229.09:27:03.58#ibcon#read 6, iclass 39, count 0 2006.229.09:27:03.58#ibcon#end of sib2, iclass 39, count 0 2006.229.09:27:03.58#ibcon#*after write, iclass 39, count 0 2006.229.09:27:03.58#ibcon#*before return 0, iclass 39, count 0 2006.229.09:27:03.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:03.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:03.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:27:03.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:27:03.58$vck44/valo=8,884.99 2006.229.09:27:03.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:27:03.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:27:03.58#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:03.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:03.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:03.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:03.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:27:03.58#ibcon#first serial, iclass 3, count 0 2006.229.09:27:03.58#ibcon#enter sib2, iclass 3, count 0 2006.229.09:27:03.58#ibcon#flushed, iclass 3, count 0 2006.229.09:27:03.58#ibcon#about to write, iclass 3, count 0 2006.229.09:27:03.58#ibcon#wrote, iclass 3, count 0 2006.229.09:27:03.58#ibcon#about to read 3, iclass 3, count 0 2006.229.09:27:03.60#ibcon#read 3, iclass 3, count 0 2006.229.09:27:03.60#ibcon#about to read 4, iclass 3, count 0 2006.229.09:27:03.60#ibcon#read 4, iclass 3, count 0 2006.229.09:27:03.60#ibcon#about to read 5, iclass 3, count 0 2006.229.09:27:03.60#ibcon#read 5, iclass 3, count 0 2006.229.09:27:03.60#ibcon#about to read 6, iclass 3, count 0 2006.229.09:27:03.60#ibcon#read 6, iclass 3, count 0 2006.229.09:27:03.60#ibcon#end of sib2, iclass 3, count 0 2006.229.09:27:03.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:27:03.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:27:03.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:27:03.60#ibcon#*before write, iclass 3, count 0 2006.229.09:27:03.60#ibcon#enter sib2, iclass 3, count 0 2006.229.09:27:03.60#ibcon#flushed, iclass 3, count 0 2006.229.09:27:03.60#ibcon#about to write, iclass 3, count 0 2006.229.09:27:03.60#ibcon#wrote, iclass 3, count 0 2006.229.09:27:03.60#ibcon#about to read 3, iclass 3, count 0 2006.229.09:27:03.64#ibcon#read 3, iclass 3, count 0 2006.229.09:27:03.64#ibcon#about to read 4, iclass 3, count 0 2006.229.09:27:03.64#ibcon#read 4, iclass 3, count 0 2006.229.09:27:03.64#ibcon#about to read 5, iclass 3, count 0 2006.229.09:27:03.64#ibcon#read 5, iclass 3, count 0 2006.229.09:27:03.64#ibcon#about to read 6, iclass 3, count 0 2006.229.09:27:03.64#ibcon#read 6, iclass 3, count 0 2006.229.09:27:03.64#ibcon#end of sib2, iclass 3, count 0 2006.229.09:27:03.64#ibcon#*after write, iclass 3, count 0 2006.229.09:27:03.64#ibcon#*before return 0, iclass 3, count 0 2006.229.09:27:03.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:03.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:03.64#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:27:03.64#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:27:03.64$vck44/va=8,6 2006.229.09:27:03.64#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.09:27:03.64#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.09:27:03.64#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:03.64#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:27:03.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:27:03.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:27:03.70#ibcon#enter wrdev, iclass 5, count 2 2006.229.09:27:03.70#ibcon#first serial, iclass 5, count 2 2006.229.09:27:03.70#ibcon#enter sib2, iclass 5, count 2 2006.229.09:27:03.70#ibcon#flushed, iclass 5, count 2 2006.229.09:27:03.70#ibcon#about to write, iclass 5, count 2 2006.229.09:27:03.70#ibcon#wrote, iclass 5, count 2 2006.229.09:27:03.70#ibcon#about to read 3, iclass 5, count 2 2006.229.09:27:03.72#ibcon#read 3, iclass 5, count 2 2006.229.09:27:03.72#ibcon#about to read 4, iclass 5, count 2 2006.229.09:27:03.72#ibcon#read 4, iclass 5, count 2 2006.229.09:27:03.72#ibcon#about to read 5, iclass 5, count 2 2006.229.09:27:03.72#ibcon#read 5, iclass 5, count 2 2006.229.09:27:03.72#ibcon#about to read 6, iclass 5, count 2 2006.229.09:27:03.72#ibcon#read 6, iclass 5, count 2 2006.229.09:27:03.72#ibcon#end of sib2, iclass 5, count 2 2006.229.09:27:03.72#ibcon#*mode == 0, iclass 5, count 2 2006.229.09:27:03.72#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.09:27:03.72#ibcon#[25=AT08-06\r\n] 2006.229.09:27:03.72#ibcon#*before write, iclass 5, count 2 2006.229.09:27:03.72#ibcon#enter sib2, iclass 5, count 2 2006.229.09:27:03.72#ibcon#flushed, iclass 5, count 2 2006.229.09:27:03.72#ibcon#about to write, iclass 5, count 2 2006.229.09:27:03.72#ibcon#wrote, iclass 5, count 2 2006.229.09:27:03.72#ibcon#about to read 3, iclass 5, count 2 2006.229.09:27:03.75#ibcon#read 3, iclass 5, count 2 2006.229.09:27:03.75#ibcon#about to read 4, iclass 5, count 2 2006.229.09:27:03.75#ibcon#read 4, iclass 5, count 2 2006.229.09:27:03.75#ibcon#about to read 5, iclass 5, count 2 2006.229.09:27:03.75#ibcon#read 5, iclass 5, count 2 2006.229.09:27:03.75#ibcon#about to read 6, iclass 5, count 2 2006.229.09:27:03.75#ibcon#read 6, iclass 5, count 2 2006.229.09:27:03.75#ibcon#end of sib2, iclass 5, count 2 2006.229.09:27:03.75#ibcon#*after write, iclass 5, count 2 2006.229.09:27:03.75#ibcon#*before return 0, iclass 5, count 2 2006.229.09:27:03.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:27:03.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:27:03.75#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.09:27:03.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:03.75#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:27:03.87#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:27:03.87#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:27:03.87#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:27:03.87#ibcon#first serial, iclass 5, count 0 2006.229.09:27:03.87#ibcon#enter sib2, iclass 5, count 0 2006.229.09:27:03.87#ibcon#flushed, iclass 5, count 0 2006.229.09:27:03.87#ibcon#about to write, iclass 5, count 0 2006.229.09:27:03.87#ibcon#wrote, iclass 5, count 0 2006.229.09:27:03.87#ibcon#about to read 3, iclass 5, count 0 2006.229.09:27:03.89#ibcon#read 3, iclass 5, count 0 2006.229.09:27:03.89#ibcon#about to read 4, iclass 5, count 0 2006.229.09:27:03.89#ibcon#read 4, iclass 5, count 0 2006.229.09:27:03.89#ibcon#about to read 5, iclass 5, count 0 2006.229.09:27:03.89#ibcon#read 5, iclass 5, count 0 2006.229.09:27:03.89#ibcon#about to read 6, iclass 5, count 0 2006.229.09:27:03.89#ibcon#read 6, iclass 5, count 0 2006.229.09:27:03.89#ibcon#end of sib2, iclass 5, count 0 2006.229.09:27:03.89#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:27:03.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:27:03.89#ibcon#[25=USB\r\n] 2006.229.09:27:03.89#ibcon#*before write, iclass 5, count 0 2006.229.09:27:03.89#ibcon#enter sib2, iclass 5, count 0 2006.229.09:27:03.89#ibcon#flushed, iclass 5, count 0 2006.229.09:27:03.89#ibcon#about to write, iclass 5, count 0 2006.229.09:27:03.89#ibcon#wrote, iclass 5, count 0 2006.229.09:27:03.89#ibcon#about to read 3, iclass 5, count 0 2006.229.09:27:03.92#ibcon#read 3, iclass 5, count 0 2006.229.09:27:03.92#ibcon#about to read 4, iclass 5, count 0 2006.229.09:27:03.92#ibcon#read 4, iclass 5, count 0 2006.229.09:27:03.92#ibcon#about to read 5, iclass 5, count 0 2006.229.09:27:03.92#ibcon#read 5, iclass 5, count 0 2006.229.09:27:03.92#ibcon#about to read 6, iclass 5, count 0 2006.229.09:27:03.92#ibcon#read 6, iclass 5, count 0 2006.229.09:27:03.92#ibcon#end of sib2, iclass 5, count 0 2006.229.09:27:03.92#ibcon#*after write, iclass 5, count 0 2006.229.09:27:03.92#ibcon#*before return 0, iclass 5, count 0 2006.229.09:27:03.92#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:27:03.92#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:27:03.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:27:03.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:27:03.92$vck44/vblo=1,629.99 2006.229.09:27:03.92#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.09:27:03.92#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.09:27:03.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:03.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:27:03.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:27:03.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:27:03.92#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:27:03.92#ibcon#first serial, iclass 7, count 0 2006.229.09:27:03.92#ibcon#enter sib2, iclass 7, count 0 2006.229.09:27:03.92#ibcon#flushed, iclass 7, count 0 2006.229.09:27:03.92#ibcon#about to write, iclass 7, count 0 2006.229.09:27:03.92#ibcon#wrote, iclass 7, count 0 2006.229.09:27:03.92#ibcon#about to read 3, iclass 7, count 0 2006.229.09:27:03.94#ibcon#read 3, iclass 7, count 0 2006.229.09:27:03.94#ibcon#about to read 4, iclass 7, count 0 2006.229.09:27:03.94#ibcon#read 4, iclass 7, count 0 2006.229.09:27:03.94#ibcon#about to read 5, iclass 7, count 0 2006.229.09:27:03.94#ibcon#read 5, iclass 7, count 0 2006.229.09:27:03.94#ibcon#about to read 6, iclass 7, count 0 2006.229.09:27:03.94#ibcon#read 6, iclass 7, count 0 2006.229.09:27:03.94#ibcon#end of sib2, iclass 7, count 0 2006.229.09:27:03.94#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:27:03.94#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:27:03.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:27:03.94#ibcon#*before write, iclass 7, count 0 2006.229.09:27:03.94#ibcon#enter sib2, iclass 7, count 0 2006.229.09:27:03.94#ibcon#flushed, iclass 7, count 0 2006.229.09:27:03.94#ibcon#about to write, iclass 7, count 0 2006.229.09:27:03.94#ibcon#wrote, iclass 7, count 0 2006.229.09:27:03.94#ibcon#about to read 3, iclass 7, count 0 2006.229.09:27:03.98#ibcon#read 3, iclass 7, count 0 2006.229.09:27:03.98#ibcon#about to read 4, iclass 7, count 0 2006.229.09:27:03.98#ibcon#read 4, iclass 7, count 0 2006.229.09:27:03.98#ibcon#about to read 5, iclass 7, count 0 2006.229.09:27:03.98#ibcon#read 5, iclass 7, count 0 2006.229.09:27:03.98#ibcon#about to read 6, iclass 7, count 0 2006.229.09:27:03.98#ibcon#read 6, iclass 7, count 0 2006.229.09:27:03.98#ibcon#end of sib2, iclass 7, count 0 2006.229.09:27:03.98#ibcon#*after write, iclass 7, count 0 2006.229.09:27:03.98#ibcon#*before return 0, iclass 7, count 0 2006.229.09:27:03.98#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:27:03.98#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:27:03.98#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:27:03.98#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:27:03.98$vck44/vb=1,4 2006.229.09:27:03.98#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.09:27:03.98#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.09:27:03.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:03.98#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:27:03.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:27:03.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:27:03.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.09:27:03.98#ibcon#first serial, iclass 11, count 2 2006.229.09:27:03.98#ibcon#enter sib2, iclass 11, count 2 2006.229.09:27:03.98#ibcon#flushed, iclass 11, count 2 2006.229.09:27:03.98#ibcon#about to write, iclass 11, count 2 2006.229.09:27:03.98#ibcon#wrote, iclass 11, count 2 2006.229.09:27:03.98#ibcon#about to read 3, iclass 11, count 2 2006.229.09:27:04.00#ibcon#read 3, iclass 11, count 2 2006.229.09:27:04.00#ibcon#about to read 4, iclass 11, count 2 2006.229.09:27:04.00#ibcon#read 4, iclass 11, count 2 2006.229.09:27:04.00#ibcon#about to read 5, iclass 11, count 2 2006.229.09:27:04.00#ibcon#read 5, iclass 11, count 2 2006.229.09:27:04.00#ibcon#about to read 6, iclass 11, count 2 2006.229.09:27:04.00#ibcon#read 6, iclass 11, count 2 2006.229.09:27:04.00#ibcon#end of sib2, iclass 11, count 2 2006.229.09:27:04.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.09:27:04.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.09:27:04.00#ibcon#[27=AT01-04\r\n] 2006.229.09:27:04.00#ibcon#*before write, iclass 11, count 2 2006.229.09:27:04.00#ibcon#enter sib2, iclass 11, count 2 2006.229.09:27:04.00#ibcon#flushed, iclass 11, count 2 2006.229.09:27:04.00#ibcon#about to write, iclass 11, count 2 2006.229.09:27:04.00#ibcon#wrote, iclass 11, count 2 2006.229.09:27:04.00#ibcon#about to read 3, iclass 11, count 2 2006.229.09:27:04.03#ibcon#read 3, iclass 11, count 2 2006.229.09:27:04.03#ibcon#about to read 4, iclass 11, count 2 2006.229.09:27:04.03#ibcon#read 4, iclass 11, count 2 2006.229.09:27:04.03#ibcon#about to read 5, iclass 11, count 2 2006.229.09:27:04.03#ibcon#read 5, iclass 11, count 2 2006.229.09:27:04.03#ibcon#about to read 6, iclass 11, count 2 2006.229.09:27:04.03#ibcon#read 6, iclass 11, count 2 2006.229.09:27:04.03#ibcon#end of sib2, iclass 11, count 2 2006.229.09:27:04.03#ibcon#*after write, iclass 11, count 2 2006.229.09:27:04.03#ibcon#*before return 0, iclass 11, count 2 2006.229.09:27:04.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:27:04.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:27:04.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.09:27:04.03#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:04.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:27:04.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:27:04.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:27:04.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:27:04.15#ibcon#first serial, iclass 11, count 0 2006.229.09:27:04.15#ibcon#enter sib2, iclass 11, count 0 2006.229.09:27:04.15#ibcon#flushed, iclass 11, count 0 2006.229.09:27:04.15#ibcon#about to write, iclass 11, count 0 2006.229.09:27:04.15#ibcon#wrote, iclass 11, count 0 2006.229.09:27:04.15#ibcon#about to read 3, iclass 11, count 0 2006.229.09:27:04.17#ibcon#read 3, iclass 11, count 0 2006.229.09:27:04.17#ibcon#about to read 4, iclass 11, count 0 2006.229.09:27:04.17#ibcon#read 4, iclass 11, count 0 2006.229.09:27:04.17#ibcon#about to read 5, iclass 11, count 0 2006.229.09:27:04.17#ibcon#read 5, iclass 11, count 0 2006.229.09:27:04.17#ibcon#about to read 6, iclass 11, count 0 2006.229.09:27:04.17#ibcon#read 6, iclass 11, count 0 2006.229.09:27:04.17#ibcon#end of sib2, iclass 11, count 0 2006.229.09:27:04.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:27:04.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:27:04.17#ibcon#[27=USB\r\n] 2006.229.09:27:04.17#ibcon#*before write, iclass 11, count 0 2006.229.09:27:04.17#ibcon#enter sib2, iclass 11, count 0 2006.229.09:27:04.17#ibcon#flushed, iclass 11, count 0 2006.229.09:27:04.17#ibcon#about to write, iclass 11, count 0 2006.229.09:27:04.17#ibcon#wrote, iclass 11, count 0 2006.229.09:27:04.17#ibcon#about to read 3, iclass 11, count 0 2006.229.09:27:04.20#ibcon#read 3, iclass 11, count 0 2006.229.09:27:04.20#ibcon#about to read 4, iclass 11, count 0 2006.229.09:27:04.20#ibcon#read 4, iclass 11, count 0 2006.229.09:27:04.20#ibcon#about to read 5, iclass 11, count 0 2006.229.09:27:04.20#ibcon#read 5, iclass 11, count 0 2006.229.09:27:04.20#ibcon#about to read 6, iclass 11, count 0 2006.229.09:27:04.20#ibcon#read 6, iclass 11, count 0 2006.229.09:27:04.20#ibcon#end of sib2, iclass 11, count 0 2006.229.09:27:04.20#ibcon#*after write, iclass 11, count 0 2006.229.09:27:04.20#ibcon#*before return 0, iclass 11, count 0 2006.229.09:27:04.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:27:04.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:27:04.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:27:04.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:27:04.20$vck44/vblo=2,634.99 2006.229.09:27:04.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.09:27:04.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.09:27:04.20#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:04.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:04.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:04.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:04.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:27:04.20#ibcon#first serial, iclass 13, count 0 2006.229.09:27:04.20#ibcon#enter sib2, iclass 13, count 0 2006.229.09:27:04.20#ibcon#flushed, iclass 13, count 0 2006.229.09:27:04.20#ibcon#about to write, iclass 13, count 0 2006.229.09:27:04.20#ibcon#wrote, iclass 13, count 0 2006.229.09:27:04.20#ibcon#about to read 3, iclass 13, count 0 2006.229.09:27:04.22#ibcon#read 3, iclass 13, count 0 2006.229.09:27:04.22#ibcon#about to read 4, iclass 13, count 0 2006.229.09:27:04.22#ibcon#read 4, iclass 13, count 0 2006.229.09:27:04.22#ibcon#about to read 5, iclass 13, count 0 2006.229.09:27:04.22#ibcon#read 5, iclass 13, count 0 2006.229.09:27:04.22#ibcon#about to read 6, iclass 13, count 0 2006.229.09:27:04.22#ibcon#read 6, iclass 13, count 0 2006.229.09:27:04.22#ibcon#end of sib2, iclass 13, count 0 2006.229.09:27:04.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:27:04.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:27:04.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:27:04.22#ibcon#*before write, iclass 13, count 0 2006.229.09:27:04.22#ibcon#enter sib2, iclass 13, count 0 2006.229.09:27:04.22#ibcon#flushed, iclass 13, count 0 2006.229.09:27:04.22#ibcon#about to write, iclass 13, count 0 2006.229.09:27:04.22#ibcon#wrote, iclass 13, count 0 2006.229.09:27:04.22#ibcon#about to read 3, iclass 13, count 0 2006.229.09:27:04.26#ibcon#read 3, iclass 13, count 0 2006.229.09:27:04.26#ibcon#about to read 4, iclass 13, count 0 2006.229.09:27:04.26#ibcon#read 4, iclass 13, count 0 2006.229.09:27:04.26#ibcon#about to read 5, iclass 13, count 0 2006.229.09:27:04.26#ibcon#read 5, iclass 13, count 0 2006.229.09:27:04.26#ibcon#about to read 6, iclass 13, count 0 2006.229.09:27:04.26#ibcon#read 6, iclass 13, count 0 2006.229.09:27:04.26#ibcon#end of sib2, iclass 13, count 0 2006.229.09:27:04.26#ibcon#*after write, iclass 13, count 0 2006.229.09:27:04.26#ibcon#*before return 0, iclass 13, count 0 2006.229.09:27:04.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:04.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:27:04.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:27:04.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:27:04.26$vck44/vb=2,4 2006.229.09:27:04.26#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.09:27:04.26#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.09:27:04.26#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:04.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:04.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:04.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:04.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.09:27:04.32#ibcon#first serial, iclass 15, count 2 2006.229.09:27:04.32#ibcon#enter sib2, iclass 15, count 2 2006.229.09:27:04.32#ibcon#flushed, iclass 15, count 2 2006.229.09:27:04.32#ibcon#about to write, iclass 15, count 2 2006.229.09:27:04.32#ibcon#wrote, iclass 15, count 2 2006.229.09:27:04.32#ibcon#about to read 3, iclass 15, count 2 2006.229.09:27:04.34#ibcon#read 3, iclass 15, count 2 2006.229.09:27:04.34#ibcon#about to read 4, iclass 15, count 2 2006.229.09:27:04.34#ibcon#read 4, iclass 15, count 2 2006.229.09:27:04.34#ibcon#about to read 5, iclass 15, count 2 2006.229.09:27:04.34#ibcon#read 5, iclass 15, count 2 2006.229.09:27:04.34#ibcon#about to read 6, iclass 15, count 2 2006.229.09:27:04.34#ibcon#read 6, iclass 15, count 2 2006.229.09:27:04.34#ibcon#end of sib2, iclass 15, count 2 2006.229.09:27:04.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.09:27:04.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.09:27:04.34#ibcon#[27=AT02-04\r\n] 2006.229.09:27:04.34#ibcon#*before write, iclass 15, count 2 2006.229.09:27:04.34#ibcon#enter sib2, iclass 15, count 2 2006.229.09:27:04.34#ibcon#flushed, iclass 15, count 2 2006.229.09:27:04.34#ibcon#about to write, iclass 15, count 2 2006.229.09:27:04.34#ibcon#wrote, iclass 15, count 2 2006.229.09:27:04.34#ibcon#about to read 3, iclass 15, count 2 2006.229.09:27:04.37#ibcon#read 3, iclass 15, count 2 2006.229.09:27:04.37#ibcon#about to read 4, iclass 15, count 2 2006.229.09:27:04.37#ibcon#read 4, iclass 15, count 2 2006.229.09:27:04.37#ibcon#about to read 5, iclass 15, count 2 2006.229.09:27:04.37#ibcon#read 5, iclass 15, count 2 2006.229.09:27:04.37#ibcon#about to read 6, iclass 15, count 2 2006.229.09:27:04.37#ibcon#read 6, iclass 15, count 2 2006.229.09:27:04.37#ibcon#end of sib2, iclass 15, count 2 2006.229.09:27:04.37#ibcon#*after write, iclass 15, count 2 2006.229.09:27:04.37#ibcon#*before return 0, iclass 15, count 2 2006.229.09:27:04.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:04.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:27:04.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.09:27:04.37#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:04.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:04.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:04.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:04.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:27:04.49#ibcon#first serial, iclass 15, count 0 2006.229.09:27:04.49#ibcon#enter sib2, iclass 15, count 0 2006.229.09:27:04.49#ibcon#flushed, iclass 15, count 0 2006.229.09:27:04.49#ibcon#about to write, iclass 15, count 0 2006.229.09:27:04.49#ibcon#wrote, iclass 15, count 0 2006.229.09:27:04.49#ibcon#about to read 3, iclass 15, count 0 2006.229.09:27:04.51#ibcon#read 3, iclass 15, count 0 2006.229.09:27:04.51#ibcon#about to read 4, iclass 15, count 0 2006.229.09:27:04.51#ibcon#read 4, iclass 15, count 0 2006.229.09:27:04.51#ibcon#about to read 5, iclass 15, count 0 2006.229.09:27:04.51#ibcon#read 5, iclass 15, count 0 2006.229.09:27:04.51#ibcon#about to read 6, iclass 15, count 0 2006.229.09:27:04.51#ibcon#read 6, iclass 15, count 0 2006.229.09:27:04.51#ibcon#end of sib2, iclass 15, count 0 2006.229.09:27:04.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:27:04.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:27:04.51#ibcon#[27=USB\r\n] 2006.229.09:27:04.51#ibcon#*before write, iclass 15, count 0 2006.229.09:27:04.51#ibcon#enter sib2, iclass 15, count 0 2006.229.09:27:04.51#ibcon#flushed, iclass 15, count 0 2006.229.09:27:04.51#ibcon#about to write, iclass 15, count 0 2006.229.09:27:04.51#ibcon#wrote, iclass 15, count 0 2006.229.09:27:04.51#ibcon#about to read 3, iclass 15, count 0 2006.229.09:27:04.54#ibcon#read 3, iclass 15, count 0 2006.229.09:27:04.54#ibcon#about to read 4, iclass 15, count 0 2006.229.09:27:04.54#ibcon#read 4, iclass 15, count 0 2006.229.09:27:04.54#ibcon#about to read 5, iclass 15, count 0 2006.229.09:27:04.54#ibcon#read 5, iclass 15, count 0 2006.229.09:27:04.54#ibcon#about to read 6, iclass 15, count 0 2006.229.09:27:04.54#ibcon#read 6, iclass 15, count 0 2006.229.09:27:04.54#ibcon#end of sib2, iclass 15, count 0 2006.229.09:27:04.54#ibcon#*after write, iclass 15, count 0 2006.229.09:27:04.54#ibcon#*before return 0, iclass 15, count 0 2006.229.09:27:04.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:04.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:27:04.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:27:04.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:27:04.54$vck44/vblo=3,649.99 2006.229.09:27:04.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.09:27:04.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.09:27:04.54#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:04.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:04.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:04.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:04.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:27:04.54#ibcon#first serial, iclass 17, count 0 2006.229.09:27:04.54#ibcon#enter sib2, iclass 17, count 0 2006.229.09:27:04.54#ibcon#flushed, iclass 17, count 0 2006.229.09:27:04.54#ibcon#about to write, iclass 17, count 0 2006.229.09:27:04.54#ibcon#wrote, iclass 17, count 0 2006.229.09:27:04.54#ibcon#about to read 3, iclass 17, count 0 2006.229.09:27:04.56#ibcon#read 3, iclass 17, count 0 2006.229.09:27:04.56#ibcon#about to read 4, iclass 17, count 0 2006.229.09:27:04.56#ibcon#read 4, iclass 17, count 0 2006.229.09:27:04.56#ibcon#about to read 5, iclass 17, count 0 2006.229.09:27:04.56#ibcon#read 5, iclass 17, count 0 2006.229.09:27:04.56#ibcon#about to read 6, iclass 17, count 0 2006.229.09:27:04.56#ibcon#read 6, iclass 17, count 0 2006.229.09:27:04.56#ibcon#end of sib2, iclass 17, count 0 2006.229.09:27:04.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:27:04.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:27:04.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:27:04.56#ibcon#*before write, iclass 17, count 0 2006.229.09:27:04.56#ibcon#enter sib2, iclass 17, count 0 2006.229.09:27:04.56#ibcon#flushed, iclass 17, count 0 2006.229.09:27:04.56#ibcon#about to write, iclass 17, count 0 2006.229.09:27:04.56#ibcon#wrote, iclass 17, count 0 2006.229.09:27:04.56#ibcon#about to read 3, iclass 17, count 0 2006.229.09:27:04.60#ibcon#read 3, iclass 17, count 0 2006.229.09:27:04.60#ibcon#about to read 4, iclass 17, count 0 2006.229.09:27:04.60#ibcon#read 4, iclass 17, count 0 2006.229.09:27:04.60#ibcon#about to read 5, iclass 17, count 0 2006.229.09:27:04.60#ibcon#read 5, iclass 17, count 0 2006.229.09:27:04.60#ibcon#about to read 6, iclass 17, count 0 2006.229.09:27:04.60#ibcon#read 6, iclass 17, count 0 2006.229.09:27:04.60#ibcon#end of sib2, iclass 17, count 0 2006.229.09:27:04.60#ibcon#*after write, iclass 17, count 0 2006.229.09:27:04.60#ibcon#*before return 0, iclass 17, count 0 2006.229.09:27:04.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:04.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:27:04.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:27:04.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:27:04.60$vck44/vb=3,4 2006.229.09:27:04.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.09:27:04.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.09:27:04.60#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:04.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:04.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:04.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:04.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.09:27:04.66#ibcon#first serial, iclass 19, count 2 2006.229.09:27:04.66#ibcon#enter sib2, iclass 19, count 2 2006.229.09:27:04.66#ibcon#flushed, iclass 19, count 2 2006.229.09:27:04.66#ibcon#about to write, iclass 19, count 2 2006.229.09:27:04.66#ibcon#wrote, iclass 19, count 2 2006.229.09:27:04.66#ibcon#about to read 3, iclass 19, count 2 2006.229.09:27:04.68#ibcon#read 3, iclass 19, count 2 2006.229.09:27:04.68#ibcon#about to read 4, iclass 19, count 2 2006.229.09:27:04.68#ibcon#read 4, iclass 19, count 2 2006.229.09:27:04.68#ibcon#about to read 5, iclass 19, count 2 2006.229.09:27:04.68#ibcon#read 5, iclass 19, count 2 2006.229.09:27:04.68#ibcon#about to read 6, iclass 19, count 2 2006.229.09:27:04.68#ibcon#read 6, iclass 19, count 2 2006.229.09:27:04.68#ibcon#end of sib2, iclass 19, count 2 2006.229.09:27:04.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.09:27:04.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.09:27:04.68#ibcon#[27=AT03-04\r\n] 2006.229.09:27:04.68#ibcon#*before write, iclass 19, count 2 2006.229.09:27:04.68#ibcon#enter sib2, iclass 19, count 2 2006.229.09:27:04.68#ibcon#flushed, iclass 19, count 2 2006.229.09:27:04.68#ibcon#about to write, iclass 19, count 2 2006.229.09:27:04.68#ibcon#wrote, iclass 19, count 2 2006.229.09:27:04.68#ibcon#about to read 3, iclass 19, count 2 2006.229.09:27:04.71#ibcon#read 3, iclass 19, count 2 2006.229.09:27:04.71#ibcon#about to read 4, iclass 19, count 2 2006.229.09:27:04.71#ibcon#read 4, iclass 19, count 2 2006.229.09:27:04.71#ibcon#about to read 5, iclass 19, count 2 2006.229.09:27:04.71#ibcon#read 5, iclass 19, count 2 2006.229.09:27:04.71#ibcon#about to read 6, iclass 19, count 2 2006.229.09:27:04.71#ibcon#read 6, iclass 19, count 2 2006.229.09:27:04.71#ibcon#end of sib2, iclass 19, count 2 2006.229.09:27:04.71#ibcon#*after write, iclass 19, count 2 2006.229.09:27:04.71#ibcon#*before return 0, iclass 19, count 2 2006.229.09:27:04.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:04.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:27:04.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.09:27:04.71#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:04.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:04.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:04.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:04.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:27:04.83#ibcon#first serial, iclass 19, count 0 2006.229.09:27:04.83#ibcon#enter sib2, iclass 19, count 0 2006.229.09:27:04.83#ibcon#flushed, iclass 19, count 0 2006.229.09:27:04.83#ibcon#about to write, iclass 19, count 0 2006.229.09:27:04.83#ibcon#wrote, iclass 19, count 0 2006.229.09:27:04.83#ibcon#about to read 3, iclass 19, count 0 2006.229.09:27:04.85#ibcon#read 3, iclass 19, count 0 2006.229.09:27:04.85#ibcon#about to read 4, iclass 19, count 0 2006.229.09:27:04.85#ibcon#read 4, iclass 19, count 0 2006.229.09:27:04.85#ibcon#about to read 5, iclass 19, count 0 2006.229.09:27:04.85#ibcon#read 5, iclass 19, count 0 2006.229.09:27:04.85#ibcon#about to read 6, iclass 19, count 0 2006.229.09:27:04.85#ibcon#read 6, iclass 19, count 0 2006.229.09:27:04.85#ibcon#end of sib2, iclass 19, count 0 2006.229.09:27:04.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:27:04.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:27:04.85#ibcon#[27=USB\r\n] 2006.229.09:27:04.85#ibcon#*before write, iclass 19, count 0 2006.229.09:27:04.85#ibcon#enter sib2, iclass 19, count 0 2006.229.09:27:04.85#ibcon#flushed, iclass 19, count 0 2006.229.09:27:04.85#ibcon#about to write, iclass 19, count 0 2006.229.09:27:04.85#ibcon#wrote, iclass 19, count 0 2006.229.09:27:04.85#ibcon#about to read 3, iclass 19, count 0 2006.229.09:27:04.88#ibcon#read 3, iclass 19, count 0 2006.229.09:27:04.88#ibcon#about to read 4, iclass 19, count 0 2006.229.09:27:04.88#ibcon#read 4, iclass 19, count 0 2006.229.09:27:04.88#ibcon#about to read 5, iclass 19, count 0 2006.229.09:27:04.88#ibcon#read 5, iclass 19, count 0 2006.229.09:27:04.88#ibcon#about to read 6, iclass 19, count 0 2006.229.09:27:04.88#ibcon#read 6, iclass 19, count 0 2006.229.09:27:04.88#ibcon#end of sib2, iclass 19, count 0 2006.229.09:27:04.88#ibcon#*after write, iclass 19, count 0 2006.229.09:27:04.88#ibcon#*before return 0, iclass 19, count 0 2006.229.09:27:04.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:04.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:27:04.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:27:04.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:27:04.88$vck44/vblo=4,679.99 2006.229.09:27:04.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.09:27:04.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.09:27:04.88#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:04.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:04.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:04.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:04.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:27:04.88#ibcon#first serial, iclass 21, count 0 2006.229.09:27:04.88#ibcon#enter sib2, iclass 21, count 0 2006.229.09:27:04.88#ibcon#flushed, iclass 21, count 0 2006.229.09:27:04.88#ibcon#about to write, iclass 21, count 0 2006.229.09:27:04.88#ibcon#wrote, iclass 21, count 0 2006.229.09:27:04.88#ibcon#about to read 3, iclass 21, count 0 2006.229.09:27:04.90#ibcon#read 3, iclass 21, count 0 2006.229.09:27:04.90#ibcon#about to read 4, iclass 21, count 0 2006.229.09:27:04.90#ibcon#read 4, iclass 21, count 0 2006.229.09:27:04.90#ibcon#about to read 5, iclass 21, count 0 2006.229.09:27:04.90#ibcon#read 5, iclass 21, count 0 2006.229.09:27:04.90#ibcon#about to read 6, iclass 21, count 0 2006.229.09:27:04.90#ibcon#read 6, iclass 21, count 0 2006.229.09:27:04.90#ibcon#end of sib2, iclass 21, count 0 2006.229.09:27:04.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:27:04.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:27:04.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:27:04.90#ibcon#*before write, iclass 21, count 0 2006.229.09:27:04.90#ibcon#enter sib2, iclass 21, count 0 2006.229.09:27:04.90#ibcon#flushed, iclass 21, count 0 2006.229.09:27:04.90#ibcon#about to write, iclass 21, count 0 2006.229.09:27:04.90#ibcon#wrote, iclass 21, count 0 2006.229.09:27:04.90#ibcon#about to read 3, iclass 21, count 0 2006.229.09:27:04.94#ibcon#read 3, iclass 21, count 0 2006.229.09:27:04.94#ibcon#about to read 4, iclass 21, count 0 2006.229.09:27:04.94#ibcon#read 4, iclass 21, count 0 2006.229.09:27:04.94#ibcon#about to read 5, iclass 21, count 0 2006.229.09:27:04.94#ibcon#read 5, iclass 21, count 0 2006.229.09:27:04.94#ibcon#about to read 6, iclass 21, count 0 2006.229.09:27:04.94#ibcon#read 6, iclass 21, count 0 2006.229.09:27:04.94#ibcon#end of sib2, iclass 21, count 0 2006.229.09:27:04.94#ibcon#*after write, iclass 21, count 0 2006.229.09:27:04.94#ibcon#*before return 0, iclass 21, count 0 2006.229.09:27:04.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:04.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:27:04.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:27:04.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:27:04.94$vck44/vb=4,4 2006.229.09:27:04.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.09:27:04.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.09:27:04.94#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:04.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:05.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:05.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:05.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.09:27:05.00#ibcon#first serial, iclass 23, count 2 2006.229.09:27:05.00#ibcon#enter sib2, iclass 23, count 2 2006.229.09:27:05.00#ibcon#flushed, iclass 23, count 2 2006.229.09:27:05.00#ibcon#about to write, iclass 23, count 2 2006.229.09:27:05.00#ibcon#wrote, iclass 23, count 2 2006.229.09:27:05.00#ibcon#about to read 3, iclass 23, count 2 2006.229.09:27:05.02#ibcon#read 3, iclass 23, count 2 2006.229.09:27:05.02#ibcon#about to read 4, iclass 23, count 2 2006.229.09:27:05.02#ibcon#read 4, iclass 23, count 2 2006.229.09:27:05.02#ibcon#about to read 5, iclass 23, count 2 2006.229.09:27:05.02#ibcon#read 5, iclass 23, count 2 2006.229.09:27:05.02#ibcon#about to read 6, iclass 23, count 2 2006.229.09:27:05.02#ibcon#read 6, iclass 23, count 2 2006.229.09:27:05.02#ibcon#end of sib2, iclass 23, count 2 2006.229.09:27:05.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.09:27:05.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.09:27:05.02#ibcon#[27=AT04-04\r\n] 2006.229.09:27:05.02#ibcon#*before write, iclass 23, count 2 2006.229.09:27:05.02#ibcon#enter sib2, iclass 23, count 2 2006.229.09:27:05.02#ibcon#flushed, iclass 23, count 2 2006.229.09:27:05.02#ibcon#about to write, iclass 23, count 2 2006.229.09:27:05.02#ibcon#wrote, iclass 23, count 2 2006.229.09:27:05.02#ibcon#about to read 3, iclass 23, count 2 2006.229.09:27:05.05#ibcon#read 3, iclass 23, count 2 2006.229.09:27:05.05#ibcon#about to read 4, iclass 23, count 2 2006.229.09:27:05.05#ibcon#read 4, iclass 23, count 2 2006.229.09:27:05.05#ibcon#about to read 5, iclass 23, count 2 2006.229.09:27:05.05#ibcon#read 5, iclass 23, count 2 2006.229.09:27:05.05#ibcon#about to read 6, iclass 23, count 2 2006.229.09:27:05.05#ibcon#read 6, iclass 23, count 2 2006.229.09:27:05.05#ibcon#end of sib2, iclass 23, count 2 2006.229.09:27:05.05#ibcon#*after write, iclass 23, count 2 2006.229.09:27:05.05#ibcon#*before return 0, iclass 23, count 2 2006.229.09:27:05.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:05.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:27:05.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.09:27:05.05#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:05.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:05.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:05.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:05.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:27:05.17#ibcon#first serial, iclass 23, count 0 2006.229.09:27:05.17#ibcon#enter sib2, iclass 23, count 0 2006.229.09:27:05.17#ibcon#flushed, iclass 23, count 0 2006.229.09:27:05.17#ibcon#about to write, iclass 23, count 0 2006.229.09:27:05.17#ibcon#wrote, iclass 23, count 0 2006.229.09:27:05.17#ibcon#about to read 3, iclass 23, count 0 2006.229.09:27:05.19#ibcon#read 3, iclass 23, count 0 2006.229.09:27:05.19#ibcon#about to read 4, iclass 23, count 0 2006.229.09:27:05.19#ibcon#read 4, iclass 23, count 0 2006.229.09:27:05.19#ibcon#about to read 5, iclass 23, count 0 2006.229.09:27:05.19#ibcon#read 5, iclass 23, count 0 2006.229.09:27:05.19#ibcon#about to read 6, iclass 23, count 0 2006.229.09:27:05.19#ibcon#read 6, iclass 23, count 0 2006.229.09:27:05.19#ibcon#end of sib2, iclass 23, count 0 2006.229.09:27:05.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:27:05.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:27:05.19#ibcon#[27=USB\r\n] 2006.229.09:27:05.19#ibcon#*before write, iclass 23, count 0 2006.229.09:27:05.19#ibcon#enter sib2, iclass 23, count 0 2006.229.09:27:05.19#ibcon#flushed, iclass 23, count 0 2006.229.09:27:05.19#ibcon#about to write, iclass 23, count 0 2006.229.09:27:05.19#ibcon#wrote, iclass 23, count 0 2006.229.09:27:05.19#ibcon#about to read 3, iclass 23, count 0 2006.229.09:27:05.22#ibcon#read 3, iclass 23, count 0 2006.229.09:27:05.22#ibcon#about to read 4, iclass 23, count 0 2006.229.09:27:05.22#ibcon#read 4, iclass 23, count 0 2006.229.09:27:05.22#ibcon#about to read 5, iclass 23, count 0 2006.229.09:27:05.22#ibcon#read 5, iclass 23, count 0 2006.229.09:27:05.22#ibcon#about to read 6, iclass 23, count 0 2006.229.09:27:05.22#ibcon#read 6, iclass 23, count 0 2006.229.09:27:05.22#ibcon#end of sib2, iclass 23, count 0 2006.229.09:27:05.22#ibcon#*after write, iclass 23, count 0 2006.229.09:27:05.22#ibcon#*before return 0, iclass 23, count 0 2006.229.09:27:05.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:05.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:27:05.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:27:05.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:27:05.22$vck44/vblo=5,709.99 2006.229.09:27:05.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:27:05.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:27:05.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:05.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:05.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:05.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:05.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:27:05.22#ibcon#first serial, iclass 25, count 0 2006.229.09:27:05.22#ibcon#enter sib2, iclass 25, count 0 2006.229.09:27:05.22#ibcon#flushed, iclass 25, count 0 2006.229.09:27:05.22#ibcon#about to write, iclass 25, count 0 2006.229.09:27:05.22#ibcon#wrote, iclass 25, count 0 2006.229.09:27:05.22#ibcon#about to read 3, iclass 25, count 0 2006.229.09:27:05.24#ibcon#read 3, iclass 25, count 0 2006.229.09:27:05.24#ibcon#about to read 4, iclass 25, count 0 2006.229.09:27:05.24#ibcon#read 4, iclass 25, count 0 2006.229.09:27:05.24#ibcon#about to read 5, iclass 25, count 0 2006.229.09:27:05.24#ibcon#read 5, iclass 25, count 0 2006.229.09:27:05.24#ibcon#about to read 6, iclass 25, count 0 2006.229.09:27:05.24#ibcon#read 6, iclass 25, count 0 2006.229.09:27:05.24#ibcon#end of sib2, iclass 25, count 0 2006.229.09:27:05.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:27:05.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:27:05.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:27:05.24#ibcon#*before write, iclass 25, count 0 2006.229.09:27:05.24#ibcon#enter sib2, iclass 25, count 0 2006.229.09:27:05.24#ibcon#flushed, iclass 25, count 0 2006.229.09:27:05.24#ibcon#about to write, iclass 25, count 0 2006.229.09:27:05.24#ibcon#wrote, iclass 25, count 0 2006.229.09:27:05.24#ibcon#about to read 3, iclass 25, count 0 2006.229.09:27:05.28#ibcon#read 3, iclass 25, count 0 2006.229.09:27:05.28#ibcon#about to read 4, iclass 25, count 0 2006.229.09:27:05.28#ibcon#read 4, iclass 25, count 0 2006.229.09:27:05.28#ibcon#about to read 5, iclass 25, count 0 2006.229.09:27:05.28#ibcon#read 5, iclass 25, count 0 2006.229.09:27:05.28#ibcon#about to read 6, iclass 25, count 0 2006.229.09:27:05.28#ibcon#read 6, iclass 25, count 0 2006.229.09:27:05.28#ibcon#end of sib2, iclass 25, count 0 2006.229.09:27:05.28#ibcon#*after write, iclass 25, count 0 2006.229.09:27:05.28#ibcon#*before return 0, iclass 25, count 0 2006.229.09:27:05.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:05.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:27:05.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:27:05.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:27:05.28$vck44/vb=5,4 2006.229.09:27:05.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.09:27:05.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.09:27:05.28#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:05.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:05.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:05.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:05.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.09:27:05.34#ibcon#first serial, iclass 27, count 2 2006.229.09:27:05.34#ibcon#enter sib2, iclass 27, count 2 2006.229.09:27:05.34#ibcon#flushed, iclass 27, count 2 2006.229.09:27:05.34#ibcon#about to write, iclass 27, count 2 2006.229.09:27:05.34#ibcon#wrote, iclass 27, count 2 2006.229.09:27:05.34#ibcon#about to read 3, iclass 27, count 2 2006.229.09:27:05.36#ibcon#read 3, iclass 27, count 2 2006.229.09:27:05.36#ibcon#about to read 4, iclass 27, count 2 2006.229.09:27:05.36#ibcon#read 4, iclass 27, count 2 2006.229.09:27:05.36#ibcon#about to read 5, iclass 27, count 2 2006.229.09:27:05.36#ibcon#read 5, iclass 27, count 2 2006.229.09:27:05.36#ibcon#about to read 6, iclass 27, count 2 2006.229.09:27:05.36#ibcon#read 6, iclass 27, count 2 2006.229.09:27:05.36#ibcon#end of sib2, iclass 27, count 2 2006.229.09:27:05.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.09:27:05.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.09:27:05.36#ibcon#[27=AT05-04\r\n] 2006.229.09:27:05.36#ibcon#*before write, iclass 27, count 2 2006.229.09:27:05.36#ibcon#enter sib2, iclass 27, count 2 2006.229.09:27:05.36#ibcon#flushed, iclass 27, count 2 2006.229.09:27:05.36#ibcon#about to write, iclass 27, count 2 2006.229.09:27:05.36#ibcon#wrote, iclass 27, count 2 2006.229.09:27:05.36#ibcon#about to read 3, iclass 27, count 2 2006.229.09:27:05.39#ibcon#read 3, iclass 27, count 2 2006.229.09:27:05.39#ibcon#about to read 4, iclass 27, count 2 2006.229.09:27:05.39#ibcon#read 4, iclass 27, count 2 2006.229.09:27:05.39#ibcon#about to read 5, iclass 27, count 2 2006.229.09:27:05.39#ibcon#read 5, iclass 27, count 2 2006.229.09:27:05.39#ibcon#about to read 6, iclass 27, count 2 2006.229.09:27:05.39#ibcon#read 6, iclass 27, count 2 2006.229.09:27:05.39#ibcon#end of sib2, iclass 27, count 2 2006.229.09:27:05.39#ibcon#*after write, iclass 27, count 2 2006.229.09:27:05.39#ibcon#*before return 0, iclass 27, count 2 2006.229.09:27:05.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:05.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:27:05.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.09:27:05.39#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:05.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:05.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:05.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:05.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:27:05.51#ibcon#first serial, iclass 27, count 0 2006.229.09:27:05.51#ibcon#enter sib2, iclass 27, count 0 2006.229.09:27:05.51#ibcon#flushed, iclass 27, count 0 2006.229.09:27:05.51#ibcon#about to write, iclass 27, count 0 2006.229.09:27:05.51#ibcon#wrote, iclass 27, count 0 2006.229.09:27:05.51#ibcon#about to read 3, iclass 27, count 0 2006.229.09:27:05.53#ibcon#read 3, iclass 27, count 0 2006.229.09:27:05.53#ibcon#about to read 4, iclass 27, count 0 2006.229.09:27:05.53#ibcon#read 4, iclass 27, count 0 2006.229.09:27:05.53#ibcon#about to read 5, iclass 27, count 0 2006.229.09:27:05.53#ibcon#read 5, iclass 27, count 0 2006.229.09:27:05.53#ibcon#about to read 6, iclass 27, count 0 2006.229.09:27:05.53#ibcon#read 6, iclass 27, count 0 2006.229.09:27:05.53#ibcon#end of sib2, iclass 27, count 0 2006.229.09:27:05.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:27:05.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:27:05.53#ibcon#[27=USB\r\n] 2006.229.09:27:05.53#ibcon#*before write, iclass 27, count 0 2006.229.09:27:05.53#ibcon#enter sib2, iclass 27, count 0 2006.229.09:27:05.53#ibcon#flushed, iclass 27, count 0 2006.229.09:27:05.53#ibcon#about to write, iclass 27, count 0 2006.229.09:27:05.53#ibcon#wrote, iclass 27, count 0 2006.229.09:27:05.53#ibcon#about to read 3, iclass 27, count 0 2006.229.09:27:05.56#ibcon#read 3, iclass 27, count 0 2006.229.09:27:05.56#ibcon#about to read 4, iclass 27, count 0 2006.229.09:27:05.56#ibcon#read 4, iclass 27, count 0 2006.229.09:27:05.56#ibcon#about to read 5, iclass 27, count 0 2006.229.09:27:05.56#ibcon#read 5, iclass 27, count 0 2006.229.09:27:05.56#ibcon#about to read 6, iclass 27, count 0 2006.229.09:27:05.56#ibcon#read 6, iclass 27, count 0 2006.229.09:27:05.56#ibcon#end of sib2, iclass 27, count 0 2006.229.09:27:05.56#ibcon#*after write, iclass 27, count 0 2006.229.09:27:05.56#ibcon#*before return 0, iclass 27, count 0 2006.229.09:27:05.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:05.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:27:05.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:27:05.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:27:05.56$vck44/vblo=6,719.99 2006.229.09:27:05.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.09:27:05.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.09:27:05.56#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:05.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:05.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:05.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:05.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:27:05.56#ibcon#first serial, iclass 29, count 0 2006.229.09:27:05.56#ibcon#enter sib2, iclass 29, count 0 2006.229.09:27:05.56#ibcon#flushed, iclass 29, count 0 2006.229.09:27:05.56#ibcon#about to write, iclass 29, count 0 2006.229.09:27:05.56#ibcon#wrote, iclass 29, count 0 2006.229.09:27:05.56#ibcon#about to read 3, iclass 29, count 0 2006.229.09:27:05.58#ibcon#read 3, iclass 29, count 0 2006.229.09:27:05.58#ibcon#about to read 4, iclass 29, count 0 2006.229.09:27:05.58#ibcon#read 4, iclass 29, count 0 2006.229.09:27:05.58#ibcon#about to read 5, iclass 29, count 0 2006.229.09:27:05.58#ibcon#read 5, iclass 29, count 0 2006.229.09:27:05.58#ibcon#about to read 6, iclass 29, count 0 2006.229.09:27:05.58#ibcon#read 6, iclass 29, count 0 2006.229.09:27:05.58#ibcon#end of sib2, iclass 29, count 0 2006.229.09:27:05.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:27:05.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:27:05.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:27:05.58#ibcon#*before write, iclass 29, count 0 2006.229.09:27:05.58#ibcon#enter sib2, iclass 29, count 0 2006.229.09:27:05.58#ibcon#flushed, iclass 29, count 0 2006.229.09:27:05.58#ibcon#about to write, iclass 29, count 0 2006.229.09:27:05.58#ibcon#wrote, iclass 29, count 0 2006.229.09:27:05.58#ibcon#about to read 3, iclass 29, count 0 2006.229.09:27:05.62#ibcon#read 3, iclass 29, count 0 2006.229.09:27:05.62#ibcon#about to read 4, iclass 29, count 0 2006.229.09:27:05.62#ibcon#read 4, iclass 29, count 0 2006.229.09:27:05.62#ibcon#about to read 5, iclass 29, count 0 2006.229.09:27:05.62#ibcon#read 5, iclass 29, count 0 2006.229.09:27:05.62#ibcon#about to read 6, iclass 29, count 0 2006.229.09:27:05.62#ibcon#read 6, iclass 29, count 0 2006.229.09:27:05.62#ibcon#end of sib2, iclass 29, count 0 2006.229.09:27:05.62#ibcon#*after write, iclass 29, count 0 2006.229.09:27:05.62#ibcon#*before return 0, iclass 29, count 0 2006.229.09:27:05.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:05.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:27:05.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:27:05.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:27:05.62$vck44/vb=6,4 2006.229.09:27:05.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.09:27:05.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.09:27:05.62#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:05.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:05.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:05.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:05.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.09:27:05.68#ibcon#first serial, iclass 31, count 2 2006.229.09:27:05.68#ibcon#enter sib2, iclass 31, count 2 2006.229.09:27:05.68#ibcon#flushed, iclass 31, count 2 2006.229.09:27:05.68#ibcon#about to write, iclass 31, count 2 2006.229.09:27:05.68#ibcon#wrote, iclass 31, count 2 2006.229.09:27:05.68#ibcon#about to read 3, iclass 31, count 2 2006.229.09:27:05.70#ibcon#read 3, iclass 31, count 2 2006.229.09:27:05.70#ibcon#about to read 4, iclass 31, count 2 2006.229.09:27:05.70#ibcon#read 4, iclass 31, count 2 2006.229.09:27:05.70#ibcon#about to read 5, iclass 31, count 2 2006.229.09:27:05.70#ibcon#read 5, iclass 31, count 2 2006.229.09:27:05.70#ibcon#about to read 6, iclass 31, count 2 2006.229.09:27:05.70#ibcon#read 6, iclass 31, count 2 2006.229.09:27:05.70#ibcon#end of sib2, iclass 31, count 2 2006.229.09:27:05.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.09:27:05.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.09:27:05.70#ibcon#[27=AT06-04\r\n] 2006.229.09:27:05.70#ibcon#*before write, iclass 31, count 2 2006.229.09:27:05.70#ibcon#enter sib2, iclass 31, count 2 2006.229.09:27:05.70#ibcon#flushed, iclass 31, count 2 2006.229.09:27:05.70#ibcon#about to write, iclass 31, count 2 2006.229.09:27:05.70#ibcon#wrote, iclass 31, count 2 2006.229.09:27:05.70#ibcon#about to read 3, iclass 31, count 2 2006.229.09:27:05.73#ibcon#read 3, iclass 31, count 2 2006.229.09:27:05.73#ibcon#about to read 4, iclass 31, count 2 2006.229.09:27:05.73#ibcon#read 4, iclass 31, count 2 2006.229.09:27:05.73#ibcon#about to read 5, iclass 31, count 2 2006.229.09:27:05.73#ibcon#read 5, iclass 31, count 2 2006.229.09:27:05.73#ibcon#about to read 6, iclass 31, count 2 2006.229.09:27:05.73#ibcon#read 6, iclass 31, count 2 2006.229.09:27:05.73#ibcon#end of sib2, iclass 31, count 2 2006.229.09:27:05.73#ibcon#*after write, iclass 31, count 2 2006.229.09:27:05.73#ibcon#*before return 0, iclass 31, count 2 2006.229.09:27:05.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:05.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:27:05.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.09:27:05.73#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:05.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:05.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:05.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:05.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:27:05.85#ibcon#first serial, iclass 31, count 0 2006.229.09:27:05.85#ibcon#enter sib2, iclass 31, count 0 2006.229.09:27:05.85#ibcon#flushed, iclass 31, count 0 2006.229.09:27:05.85#ibcon#about to write, iclass 31, count 0 2006.229.09:27:05.85#ibcon#wrote, iclass 31, count 0 2006.229.09:27:05.85#ibcon#about to read 3, iclass 31, count 0 2006.229.09:27:05.87#ibcon#read 3, iclass 31, count 0 2006.229.09:27:05.87#ibcon#about to read 4, iclass 31, count 0 2006.229.09:27:05.87#ibcon#read 4, iclass 31, count 0 2006.229.09:27:05.87#ibcon#about to read 5, iclass 31, count 0 2006.229.09:27:05.87#ibcon#read 5, iclass 31, count 0 2006.229.09:27:05.87#ibcon#about to read 6, iclass 31, count 0 2006.229.09:27:05.87#ibcon#read 6, iclass 31, count 0 2006.229.09:27:05.87#ibcon#end of sib2, iclass 31, count 0 2006.229.09:27:05.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:27:05.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:27:05.87#ibcon#[27=USB\r\n] 2006.229.09:27:05.87#ibcon#*before write, iclass 31, count 0 2006.229.09:27:05.87#ibcon#enter sib2, iclass 31, count 0 2006.229.09:27:05.87#ibcon#flushed, iclass 31, count 0 2006.229.09:27:05.87#ibcon#about to write, iclass 31, count 0 2006.229.09:27:05.87#ibcon#wrote, iclass 31, count 0 2006.229.09:27:05.87#ibcon#about to read 3, iclass 31, count 0 2006.229.09:27:05.90#ibcon#read 3, iclass 31, count 0 2006.229.09:27:05.90#ibcon#about to read 4, iclass 31, count 0 2006.229.09:27:05.90#ibcon#read 4, iclass 31, count 0 2006.229.09:27:05.90#ibcon#about to read 5, iclass 31, count 0 2006.229.09:27:05.90#ibcon#read 5, iclass 31, count 0 2006.229.09:27:05.90#ibcon#about to read 6, iclass 31, count 0 2006.229.09:27:05.90#ibcon#read 6, iclass 31, count 0 2006.229.09:27:05.90#ibcon#end of sib2, iclass 31, count 0 2006.229.09:27:05.90#ibcon#*after write, iclass 31, count 0 2006.229.09:27:05.90#ibcon#*before return 0, iclass 31, count 0 2006.229.09:27:05.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:05.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:27:05.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:27:05.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:27:05.90$vck44/vblo=7,734.99 2006.229.09:27:05.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.09:27:05.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.09:27:05.90#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:05.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:05.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:05.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:05.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:27:05.90#ibcon#first serial, iclass 33, count 0 2006.229.09:27:05.90#ibcon#enter sib2, iclass 33, count 0 2006.229.09:27:05.90#ibcon#flushed, iclass 33, count 0 2006.229.09:27:05.90#ibcon#about to write, iclass 33, count 0 2006.229.09:27:05.90#ibcon#wrote, iclass 33, count 0 2006.229.09:27:05.90#ibcon#about to read 3, iclass 33, count 0 2006.229.09:27:05.92#ibcon#read 3, iclass 33, count 0 2006.229.09:27:05.92#ibcon#about to read 4, iclass 33, count 0 2006.229.09:27:05.92#ibcon#read 4, iclass 33, count 0 2006.229.09:27:05.92#ibcon#about to read 5, iclass 33, count 0 2006.229.09:27:05.92#ibcon#read 5, iclass 33, count 0 2006.229.09:27:05.92#ibcon#about to read 6, iclass 33, count 0 2006.229.09:27:05.92#ibcon#read 6, iclass 33, count 0 2006.229.09:27:05.92#ibcon#end of sib2, iclass 33, count 0 2006.229.09:27:05.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:27:05.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:27:05.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:27:05.92#ibcon#*before write, iclass 33, count 0 2006.229.09:27:05.92#ibcon#enter sib2, iclass 33, count 0 2006.229.09:27:05.92#ibcon#flushed, iclass 33, count 0 2006.229.09:27:05.92#ibcon#about to write, iclass 33, count 0 2006.229.09:27:05.92#ibcon#wrote, iclass 33, count 0 2006.229.09:27:05.92#ibcon#about to read 3, iclass 33, count 0 2006.229.09:27:05.96#ibcon#read 3, iclass 33, count 0 2006.229.09:27:05.96#ibcon#about to read 4, iclass 33, count 0 2006.229.09:27:05.96#ibcon#read 4, iclass 33, count 0 2006.229.09:27:05.96#ibcon#about to read 5, iclass 33, count 0 2006.229.09:27:05.96#ibcon#read 5, iclass 33, count 0 2006.229.09:27:05.96#ibcon#about to read 6, iclass 33, count 0 2006.229.09:27:05.96#ibcon#read 6, iclass 33, count 0 2006.229.09:27:05.96#ibcon#end of sib2, iclass 33, count 0 2006.229.09:27:05.96#ibcon#*after write, iclass 33, count 0 2006.229.09:27:05.96#ibcon#*before return 0, iclass 33, count 0 2006.229.09:27:05.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:05.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:27:05.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:27:05.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:27:05.96$vck44/vb=7,4 2006.229.09:27:05.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.09:27:05.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.09:27:05.96#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:05.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:06.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:06.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:06.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.09:27:06.02#ibcon#first serial, iclass 35, count 2 2006.229.09:27:06.02#ibcon#enter sib2, iclass 35, count 2 2006.229.09:27:06.02#ibcon#flushed, iclass 35, count 2 2006.229.09:27:06.02#ibcon#about to write, iclass 35, count 2 2006.229.09:27:06.02#ibcon#wrote, iclass 35, count 2 2006.229.09:27:06.02#ibcon#about to read 3, iclass 35, count 2 2006.229.09:27:06.04#ibcon#read 3, iclass 35, count 2 2006.229.09:27:06.04#ibcon#about to read 4, iclass 35, count 2 2006.229.09:27:06.04#ibcon#read 4, iclass 35, count 2 2006.229.09:27:06.04#ibcon#about to read 5, iclass 35, count 2 2006.229.09:27:06.04#ibcon#read 5, iclass 35, count 2 2006.229.09:27:06.04#ibcon#about to read 6, iclass 35, count 2 2006.229.09:27:06.04#ibcon#read 6, iclass 35, count 2 2006.229.09:27:06.04#ibcon#end of sib2, iclass 35, count 2 2006.229.09:27:06.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.09:27:06.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.09:27:06.04#ibcon#[27=AT07-04\r\n] 2006.229.09:27:06.04#ibcon#*before write, iclass 35, count 2 2006.229.09:27:06.04#ibcon#enter sib2, iclass 35, count 2 2006.229.09:27:06.04#ibcon#flushed, iclass 35, count 2 2006.229.09:27:06.04#ibcon#about to write, iclass 35, count 2 2006.229.09:27:06.04#ibcon#wrote, iclass 35, count 2 2006.229.09:27:06.04#ibcon#about to read 3, iclass 35, count 2 2006.229.09:27:06.07#ibcon#read 3, iclass 35, count 2 2006.229.09:27:06.07#ibcon#about to read 4, iclass 35, count 2 2006.229.09:27:06.07#ibcon#read 4, iclass 35, count 2 2006.229.09:27:06.07#ibcon#about to read 5, iclass 35, count 2 2006.229.09:27:06.07#ibcon#read 5, iclass 35, count 2 2006.229.09:27:06.07#ibcon#about to read 6, iclass 35, count 2 2006.229.09:27:06.07#ibcon#read 6, iclass 35, count 2 2006.229.09:27:06.07#ibcon#end of sib2, iclass 35, count 2 2006.229.09:27:06.07#ibcon#*after write, iclass 35, count 2 2006.229.09:27:06.07#ibcon#*before return 0, iclass 35, count 2 2006.229.09:27:06.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:06.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:27:06.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.09:27:06.07#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:06.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:06.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:06.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:06.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:27:06.19#ibcon#first serial, iclass 35, count 0 2006.229.09:27:06.19#ibcon#enter sib2, iclass 35, count 0 2006.229.09:27:06.19#ibcon#flushed, iclass 35, count 0 2006.229.09:27:06.19#ibcon#about to write, iclass 35, count 0 2006.229.09:27:06.19#ibcon#wrote, iclass 35, count 0 2006.229.09:27:06.19#ibcon#about to read 3, iclass 35, count 0 2006.229.09:27:06.21#ibcon#read 3, iclass 35, count 0 2006.229.09:27:06.21#ibcon#about to read 4, iclass 35, count 0 2006.229.09:27:06.21#ibcon#read 4, iclass 35, count 0 2006.229.09:27:06.21#ibcon#about to read 5, iclass 35, count 0 2006.229.09:27:06.21#ibcon#read 5, iclass 35, count 0 2006.229.09:27:06.21#ibcon#about to read 6, iclass 35, count 0 2006.229.09:27:06.21#ibcon#read 6, iclass 35, count 0 2006.229.09:27:06.21#ibcon#end of sib2, iclass 35, count 0 2006.229.09:27:06.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:27:06.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:27:06.21#ibcon#[27=USB\r\n] 2006.229.09:27:06.21#ibcon#*before write, iclass 35, count 0 2006.229.09:27:06.21#ibcon#enter sib2, iclass 35, count 0 2006.229.09:27:06.21#ibcon#flushed, iclass 35, count 0 2006.229.09:27:06.21#ibcon#about to write, iclass 35, count 0 2006.229.09:27:06.21#ibcon#wrote, iclass 35, count 0 2006.229.09:27:06.21#ibcon#about to read 3, iclass 35, count 0 2006.229.09:27:06.24#ibcon#read 3, iclass 35, count 0 2006.229.09:27:06.24#ibcon#about to read 4, iclass 35, count 0 2006.229.09:27:06.24#ibcon#read 4, iclass 35, count 0 2006.229.09:27:06.24#ibcon#about to read 5, iclass 35, count 0 2006.229.09:27:06.24#ibcon#read 5, iclass 35, count 0 2006.229.09:27:06.24#ibcon#about to read 6, iclass 35, count 0 2006.229.09:27:06.24#ibcon#read 6, iclass 35, count 0 2006.229.09:27:06.24#ibcon#end of sib2, iclass 35, count 0 2006.229.09:27:06.24#ibcon#*after write, iclass 35, count 0 2006.229.09:27:06.24#ibcon#*before return 0, iclass 35, count 0 2006.229.09:27:06.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:06.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:27:06.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:27:06.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:27:06.24$vck44/vblo=8,744.99 2006.229.09:27:06.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.09:27:06.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.09:27:06.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:27:06.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:06.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:06.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:06.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:27:06.24#ibcon#first serial, iclass 37, count 0 2006.229.09:27:06.24#ibcon#enter sib2, iclass 37, count 0 2006.229.09:27:06.24#ibcon#flushed, iclass 37, count 0 2006.229.09:27:06.24#ibcon#about to write, iclass 37, count 0 2006.229.09:27:06.24#ibcon#wrote, iclass 37, count 0 2006.229.09:27:06.24#ibcon#about to read 3, iclass 37, count 0 2006.229.09:27:06.26#ibcon#read 3, iclass 37, count 0 2006.229.09:27:06.26#ibcon#about to read 4, iclass 37, count 0 2006.229.09:27:06.26#ibcon#read 4, iclass 37, count 0 2006.229.09:27:06.26#ibcon#about to read 5, iclass 37, count 0 2006.229.09:27:06.26#ibcon#read 5, iclass 37, count 0 2006.229.09:27:06.26#ibcon#about to read 6, iclass 37, count 0 2006.229.09:27:06.26#ibcon#read 6, iclass 37, count 0 2006.229.09:27:06.26#ibcon#end of sib2, iclass 37, count 0 2006.229.09:27:06.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:27:06.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:27:06.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:27:06.26#ibcon#*before write, iclass 37, count 0 2006.229.09:27:06.26#ibcon#enter sib2, iclass 37, count 0 2006.229.09:27:06.26#ibcon#flushed, iclass 37, count 0 2006.229.09:27:06.26#ibcon#about to write, iclass 37, count 0 2006.229.09:27:06.26#ibcon#wrote, iclass 37, count 0 2006.229.09:27:06.26#ibcon#about to read 3, iclass 37, count 0 2006.229.09:27:06.30#ibcon#read 3, iclass 37, count 0 2006.229.09:27:06.30#ibcon#about to read 4, iclass 37, count 0 2006.229.09:27:06.30#ibcon#read 4, iclass 37, count 0 2006.229.09:27:06.30#ibcon#about to read 5, iclass 37, count 0 2006.229.09:27:06.30#ibcon#read 5, iclass 37, count 0 2006.229.09:27:06.30#ibcon#about to read 6, iclass 37, count 0 2006.229.09:27:06.30#ibcon#read 6, iclass 37, count 0 2006.229.09:27:06.30#ibcon#end of sib2, iclass 37, count 0 2006.229.09:27:06.30#ibcon#*after write, iclass 37, count 0 2006.229.09:27:06.30#ibcon#*before return 0, iclass 37, count 0 2006.229.09:27:06.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:06.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:27:06.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:27:06.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:27:06.30$vck44/vb=8,4 2006.229.09:27:06.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.09:27:06.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.09:27:06.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:27:06.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:06.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:06.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:06.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.09:27:06.36#ibcon#first serial, iclass 39, count 2 2006.229.09:27:06.36#ibcon#enter sib2, iclass 39, count 2 2006.229.09:27:06.36#ibcon#flushed, iclass 39, count 2 2006.229.09:27:06.36#ibcon#about to write, iclass 39, count 2 2006.229.09:27:06.36#ibcon#wrote, iclass 39, count 2 2006.229.09:27:06.36#ibcon#about to read 3, iclass 39, count 2 2006.229.09:27:06.38#ibcon#read 3, iclass 39, count 2 2006.229.09:27:06.38#ibcon#about to read 4, iclass 39, count 2 2006.229.09:27:06.38#ibcon#read 4, iclass 39, count 2 2006.229.09:27:06.38#ibcon#about to read 5, iclass 39, count 2 2006.229.09:27:06.38#ibcon#read 5, iclass 39, count 2 2006.229.09:27:06.38#ibcon#about to read 6, iclass 39, count 2 2006.229.09:27:06.38#ibcon#read 6, iclass 39, count 2 2006.229.09:27:06.38#ibcon#end of sib2, iclass 39, count 2 2006.229.09:27:06.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.09:27:06.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.09:27:06.38#ibcon#[27=AT08-04\r\n] 2006.229.09:27:06.38#ibcon#*before write, iclass 39, count 2 2006.229.09:27:06.38#ibcon#enter sib2, iclass 39, count 2 2006.229.09:27:06.38#ibcon#flushed, iclass 39, count 2 2006.229.09:27:06.38#ibcon#about to write, iclass 39, count 2 2006.229.09:27:06.38#ibcon#wrote, iclass 39, count 2 2006.229.09:27:06.38#ibcon#about to read 3, iclass 39, count 2 2006.229.09:27:06.41#ibcon#read 3, iclass 39, count 2 2006.229.09:27:06.41#ibcon#about to read 4, iclass 39, count 2 2006.229.09:27:06.41#ibcon#read 4, iclass 39, count 2 2006.229.09:27:06.41#ibcon#about to read 5, iclass 39, count 2 2006.229.09:27:06.41#ibcon#read 5, iclass 39, count 2 2006.229.09:27:06.41#ibcon#about to read 6, iclass 39, count 2 2006.229.09:27:06.41#ibcon#read 6, iclass 39, count 2 2006.229.09:27:06.41#ibcon#end of sib2, iclass 39, count 2 2006.229.09:27:06.41#ibcon#*after write, iclass 39, count 2 2006.229.09:27:06.41#ibcon#*before return 0, iclass 39, count 2 2006.229.09:27:06.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:06.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:27:06.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.09:27:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:27:06.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:06.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:06.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:06.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:27:06.53#ibcon#first serial, iclass 39, count 0 2006.229.09:27:06.53#ibcon#enter sib2, iclass 39, count 0 2006.229.09:27:06.53#ibcon#flushed, iclass 39, count 0 2006.229.09:27:06.53#ibcon#about to write, iclass 39, count 0 2006.229.09:27:06.53#ibcon#wrote, iclass 39, count 0 2006.229.09:27:06.53#ibcon#about to read 3, iclass 39, count 0 2006.229.09:27:06.55#ibcon#read 3, iclass 39, count 0 2006.229.09:27:06.55#ibcon#about to read 4, iclass 39, count 0 2006.229.09:27:06.55#ibcon#read 4, iclass 39, count 0 2006.229.09:27:06.55#ibcon#about to read 5, iclass 39, count 0 2006.229.09:27:06.55#ibcon#read 5, iclass 39, count 0 2006.229.09:27:06.55#ibcon#about to read 6, iclass 39, count 0 2006.229.09:27:06.55#ibcon#read 6, iclass 39, count 0 2006.229.09:27:06.55#ibcon#end of sib2, iclass 39, count 0 2006.229.09:27:06.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:27:06.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:27:06.55#ibcon#[27=USB\r\n] 2006.229.09:27:06.55#ibcon#*before write, iclass 39, count 0 2006.229.09:27:06.55#ibcon#enter sib2, iclass 39, count 0 2006.229.09:27:06.55#ibcon#flushed, iclass 39, count 0 2006.229.09:27:06.55#ibcon#about to write, iclass 39, count 0 2006.229.09:27:06.55#ibcon#wrote, iclass 39, count 0 2006.229.09:27:06.55#ibcon#about to read 3, iclass 39, count 0 2006.229.09:27:06.58#ibcon#read 3, iclass 39, count 0 2006.229.09:27:06.58#ibcon#about to read 4, iclass 39, count 0 2006.229.09:27:06.58#ibcon#read 4, iclass 39, count 0 2006.229.09:27:06.58#ibcon#about to read 5, iclass 39, count 0 2006.229.09:27:06.58#ibcon#read 5, iclass 39, count 0 2006.229.09:27:06.58#ibcon#about to read 6, iclass 39, count 0 2006.229.09:27:06.58#ibcon#read 6, iclass 39, count 0 2006.229.09:27:06.58#ibcon#end of sib2, iclass 39, count 0 2006.229.09:27:06.58#ibcon#*after write, iclass 39, count 0 2006.229.09:27:06.58#ibcon#*before return 0, iclass 39, count 0 2006.229.09:27:06.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:06.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:27:06.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:27:06.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:27:06.58$vck44/vabw=wide 2006.229.09:27:06.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:27:06.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:27:06.58#ibcon#ireg 8 cls_cnt 0 2006.229.09:27:06.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:06.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:06.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:06.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:27:06.58#ibcon#first serial, iclass 3, count 0 2006.229.09:27:06.58#ibcon#enter sib2, iclass 3, count 0 2006.229.09:27:06.58#ibcon#flushed, iclass 3, count 0 2006.229.09:27:06.58#ibcon#about to write, iclass 3, count 0 2006.229.09:27:06.58#ibcon#wrote, iclass 3, count 0 2006.229.09:27:06.58#ibcon#about to read 3, iclass 3, count 0 2006.229.09:27:06.60#ibcon#read 3, iclass 3, count 0 2006.229.09:27:06.60#ibcon#about to read 4, iclass 3, count 0 2006.229.09:27:06.60#ibcon#read 4, iclass 3, count 0 2006.229.09:27:06.60#ibcon#about to read 5, iclass 3, count 0 2006.229.09:27:06.60#ibcon#read 5, iclass 3, count 0 2006.229.09:27:06.60#ibcon#about to read 6, iclass 3, count 0 2006.229.09:27:06.60#ibcon#read 6, iclass 3, count 0 2006.229.09:27:06.60#ibcon#end of sib2, iclass 3, count 0 2006.229.09:27:06.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:27:06.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:27:06.60#ibcon#[25=BW32\r\n] 2006.229.09:27:06.60#ibcon#*before write, iclass 3, count 0 2006.229.09:27:06.60#ibcon#enter sib2, iclass 3, count 0 2006.229.09:27:06.60#ibcon#flushed, iclass 3, count 0 2006.229.09:27:06.60#ibcon#about to write, iclass 3, count 0 2006.229.09:27:06.60#ibcon#wrote, iclass 3, count 0 2006.229.09:27:06.60#ibcon#about to read 3, iclass 3, count 0 2006.229.09:27:06.63#ibcon#read 3, iclass 3, count 0 2006.229.09:27:06.63#ibcon#about to read 4, iclass 3, count 0 2006.229.09:27:06.63#ibcon#read 4, iclass 3, count 0 2006.229.09:27:06.63#ibcon#about to read 5, iclass 3, count 0 2006.229.09:27:06.63#ibcon#read 5, iclass 3, count 0 2006.229.09:27:06.63#ibcon#about to read 6, iclass 3, count 0 2006.229.09:27:06.63#ibcon#read 6, iclass 3, count 0 2006.229.09:27:06.63#ibcon#end of sib2, iclass 3, count 0 2006.229.09:27:06.63#ibcon#*after write, iclass 3, count 0 2006.229.09:27:06.63#ibcon#*before return 0, iclass 3, count 0 2006.229.09:27:06.63#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:06.63#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:27:06.63#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:27:06.63#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:27:06.63$vck44/vbbw=wide 2006.229.09:27:06.63#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.09:27:06.63#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.09:27:06.63#ibcon#ireg 8 cls_cnt 0 2006.229.09:27:06.63#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:27:06.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:27:06.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:27:06.70#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:27:06.70#ibcon#first serial, iclass 5, count 0 2006.229.09:27:06.70#ibcon#enter sib2, iclass 5, count 0 2006.229.09:27:06.70#ibcon#flushed, iclass 5, count 0 2006.229.09:27:06.70#ibcon#about to write, iclass 5, count 0 2006.229.09:27:06.70#ibcon#wrote, iclass 5, count 0 2006.229.09:27:06.70#ibcon#about to read 3, iclass 5, count 0 2006.229.09:27:06.72#ibcon#read 3, iclass 5, count 0 2006.229.09:27:06.72#ibcon#about to read 4, iclass 5, count 0 2006.229.09:27:06.72#ibcon#read 4, iclass 5, count 0 2006.229.09:27:06.72#ibcon#about to read 5, iclass 5, count 0 2006.229.09:27:06.72#ibcon#read 5, iclass 5, count 0 2006.229.09:27:06.72#ibcon#about to read 6, iclass 5, count 0 2006.229.09:27:06.72#ibcon#read 6, iclass 5, count 0 2006.229.09:27:06.72#ibcon#end of sib2, iclass 5, count 0 2006.229.09:27:06.72#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:27:06.72#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:27:06.72#ibcon#[27=BW32\r\n] 2006.229.09:27:06.72#ibcon#*before write, iclass 5, count 0 2006.229.09:27:06.72#ibcon#enter sib2, iclass 5, count 0 2006.229.09:27:06.72#ibcon#flushed, iclass 5, count 0 2006.229.09:27:06.72#ibcon#about to write, iclass 5, count 0 2006.229.09:27:06.72#ibcon#wrote, iclass 5, count 0 2006.229.09:27:06.72#ibcon#about to read 3, iclass 5, count 0 2006.229.09:27:06.75#ibcon#read 3, iclass 5, count 0 2006.229.09:27:06.75#ibcon#about to read 4, iclass 5, count 0 2006.229.09:27:06.75#ibcon#read 4, iclass 5, count 0 2006.229.09:27:06.75#ibcon#about to read 5, iclass 5, count 0 2006.229.09:27:06.75#ibcon#read 5, iclass 5, count 0 2006.229.09:27:06.75#ibcon#about to read 6, iclass 5, count 0 2006.229.09:27:06.75#ibcon#read 6, iclass 5, count 0 2006.229.09:27:06.75#ibcon#end of sib2, iclass 5, count 0 2006.229.09:27:06.75#ibcon#*after write, iclass 5, count 0 2006.229.09:27:06.75#ibcon#*before return 0, iclass 5, count 0 2006.229.09:27:06.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:27:06.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:27:06.75#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:27:06.75#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:27:06.75$setupk4/ifdk4 2006.229.09:27:06.75$ifdk4/lo= 2006.229.09:27:06.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:27:06.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:27:06.75$ifdk4/patch= 2006.229.09:27:06.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:27:06.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:27:06.75$setupk4/!*+20s 2006.229.09:27:08.39#abcon#<5=/05 1.5 2.9 29.00 971000.9\r\n> 2006.229.09:27:08.41#abcon#{5=INTERFACE CLEAR} 2006.229.09:27:08.47#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:27:18.56#abcon#<5=/05 1.6 2.9 29.00 971000.9\r\n> 2006.229.09:27:18.58#abcon#{5=INTERFACE CLEAR} 2006.229.09:27:18.64#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:27:21.22$setupk4/"tpicd 2006.229.09:27:21.22$setupk4/echo=off 2006.229.09:27:21.22$setupk4/xlog=off 2006.229.09:27:21.22:!2006.229.09:28:09 2006.229.09:27:23.14#trakl#Source acquired 2006.229.09:27:23.14#flagr#flagr/antenna,acquired 2006.229.09:28:09.00:preob 2006.229.09:28:09.14/onsource/TRACKING 2006.229.09:28:09.14:!2006.229.09:28:19 2006.229.09:28:19.00:"tape 2006.229.09:28:19.00:"st=record 2006.229.09:28:19.00:data_valid=on 2006.229.09:28:19.00:midob 2006.229.09:28:20.14/onsource/TRACKING 2006.229.09:28:20.14/wx/28.98,1001.0,96 2006.229.09:28:20.38/cable/+6.3998E-03 2006.229.09:28:21.47/va/01,08,usb,yes,33,36 2006.229.09:28:21.47/va/02,07,usb,yes,36,37 2006.229.09:28:21.47/va/03,06,usb,yes,45,47 2006.229.09:28:21.47/va/04,07,usb,yes,37,39 2006.229.09:28:21.47/va/05,04,usb,yes,33,34 2006.229.09:28:21.47/va/06,04,usb,yes,37,37 2006.229.09:28:21.47/va/07,05,usb,yes,33,34 2006.229.09:28:21.47/va/08,06,usb,yes,24,30 2006.229.09:28:21.70/valo/01,524.99,yes,locked 2006.229.09:28:21.70/valo/02,534.99,yes,locked 2006.229.09:28:21.70/valo/03,564.99,yes,locked 2006.229.09:28:21.70/valo/04,624.99,yes,locked 2006.229.09:28:21.70/valo/05,734.99,yes,locked 2006.229.09:28:21.70/valo/06,814.99,yes,locked 2006.229.09:28:21.70/valo/07,864.99,yes,locked 2006.229.09:28:21.70/valo/08,884.99,yes,locked 2006.229.09:28:22.79/vb/01,04,usb,yes,32,30 2006.229.09:28:22.79/vb/02,04,usb,yes,35,34 2006.229.09:28:22.79/vb/03,04,usb,yes,31,35 2006.229.09:28:22.79/vb/04,04,usb,yes,36,35 2006.229.09:28:22.79/vb/05,04,usb,yes,28,31 2006.229.09:28:22.79/vb/06,04,usb,yes,33,29 2006.229.09:28:22.79/vb/07,04,usb,yes,33,33 2006.229.09:28:22.79/vb/08,04,usb,yes,30,34 2006.229.09:28:23.03/vblo/01,629.99,yes,locked 2006.229.09:28:23.03/vblo/02,634.99,yes,locked 2006.229.09:28:23.03/vblo/03,649.99,yes,locked 2006.229.09:28:23.03/vblo/04,679.99,yes,locked 2006.229.09:28:23.03/vblo/05,709.99,yes,locked 2006.229.09:28:23.03/vblo/06,719.99,yes,locked 2006.229.09:28:23.03/vblo/07,734.99,yes,locked 2006.229.09:28:23.03/vblo/08,744.99,yes,locked 2006.229.09:28:23.18/vabw/8 2006.229.09:28:23.33/vbbw/8 2006.229.09:28:23.42/xfe/off,on,12.2 2006.229.09:28:23.80/ifatt/23,28,28,28 2006.229.09:28:24.07/fmout-gps/S +4.63E-07 2006.229.09:28:24.11:!2006.229.09:29:59 2006.229.09:29:59.01:data_valid=off 2006.229.09:29:59.02:"et 2006.229.09:29:59.02:!+3s 2006.229.09:30:02.03:"tape 2006.229.09:30:02.03:postob 2006.229.09:30:02.17/cable/+6.3985E-03 2006.229.09:30:02.18/wx/28.97,1001.0,97 2006.229.09:30:02.24/fmout-gps/S +4.62E-07 2006.229.09:30:02.25:scan_name=229-0937,jd0608,230 2006.229.09:30:02.25:source=1958-179,200057.09,-174857.7,2000.0,cw 2006.229.09:30:04.13#flagr#flagr/antenna,new-source 2006.229.09:30:04.14:checkk5 2006.229.09:30:04.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:30:04.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:30:05.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:30:05.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:30:06.13/chk_obsdata//k5ts1/T2290928??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.09:30:06.53/chk_obsdata//k5ts2/T2290928??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.09:30:06.93/chk_obsdata//k5ts3/T2290928??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.09:30:07.33/chk_obsdata//k5ts4/T2290928??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.09:30:08.06/k5log//k5ts1_log_newline 2006.229.09:30:08.80/k5log//k5ts2_log_newline 2006.229.09:30:09.52/k5log//k5ts3_log_newline 2006.229.09:30:10.23/k5log//k5ts4_log_newline 2006.229.09:30:10.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:30:10.26:setupk4=1 2006.229.09:30:10.26$setupk4/echo=on 2006.229.09:30:10.26$setupk4/pcalon 2006.229.09:30:10.26$pcalon/"no phase cal control is implemented here 2006.229.09:30:10.26$setupk4/"tpicd=stop 2006.229.09:30:10.26$setupk4/"rec=synch_on 2006.229.09:30:10.26$setupk4/"rec_mode=128 2006.229.09:30:10.26$setupk4/!* 2006.229.09:30:10.26$setupk4/recpk4 2006.229.09:30:10.26$recpk4/recpatch= 2006.229.09:30:10.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:30:10.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:30:10.26$setupk4/vck44 2006.229.09:30:10.26$vck44/valo=1,524.99 2006.229.09:30:10.26#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.09:30:10.26#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.09:30:10.26#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:10.26#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:10.26#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:10.26#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:10.26#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:30:10.26#ibcon#first serial, iclass 12, count 0 2006.229.09:30:10.26#ibcon#enter sib2, iclass 12, count 0 2006.229.09:30:10.26#ibcon#flushed, iclass 12, count 0 2006.229.09:30:10.26#ibcon#about to write, iclass 12, count 0 2006.229.09:30:10.26#ibcon#wrote, iclass 12, count 0 2006.229.09:30:10.26#ibcon#about to read 3, iclass 12, count 0 2006.229.09:30:10.28#ibcon#read 3, iclass 12, count 0 2006.229.09:30:10.28#ibcon#about to read 4, iclass 12, count 0 2006.229.09:30:10.28#ibcon#read 4, iclass 12, count 0 2006.229.09:30:10.28#ibcon#about to read 5, iclass 12, count 0 2006.229.09:30:10.28#ibcon#read 5, iclass 12, count 0 2006.229.09:30:10.28#ibcon#about to read 6, iclass 12, count 0 2006.229.09:30:10.28#ibcon#read 6, iclass 12, count 0 2006.229.09:30:10.28#ibcon#end of sib2, iclass 12, count 0 2006.229.09:30:10.28#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:30:10.28#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:30:10.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:30:10.28#ibcon#*before write, iclass 12, count 0 2006.229.09:30:10.28#ibcon#enter sib2, iclass 12, count 0 2006.229.09:30:10.28#ibcon#flushed, iclass 12, count 0 2006.229.09:30:10.28#ibcon#about to write, iclass 12, count 0 2006.229.09:30:10.28#ibcon#wrote, iclass 12, count 0 2006.229.09:30:10.28#ibcon#about to read 3, iclass 12, count 0 2006.229.09:30:10.33#ibcon#read 3, iclass 12, count 0 2006.229.09:30:10.33#ibcon#about to read 4, iclass 12, count 0 2006.229.09:30:10.33#ibcon#read 4, iclass 12, count 0 2006.229.09:30:10.33#ibcon#about to read 5, iclass 12, count 0 2006.229.09:30:10.33#ibcon#read 5, iclass 12, count 0 2006.229.09:30:10.33#ibcon#about to read 6, iclass 12, count 0 2006.229.09:30:10.33#ibcon#read 6, iclass 12, count 0 2006.229.09:30:10.33#ibcon#end of sib2, iclass 12, count 0 2006.229.09:30:10.33#ibcon#*after write, iclass 12, count 0 2006.229.09:30:10.33#ibcon#*before return 0, iclass 12, count 0 2006.229.09:30:10.33#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:10.33#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:10.33#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:30:10.33#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:30:10.33$vck44/va=1,8 2006.229.09:30:10.33#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:30:10.33#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:30:10.33#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:10.33#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:10.33#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:10.33#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:10.33#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:30:10.33#ibcon#first serial, iclass 14, count 2 2006.229.09:30:10.33#ibcon#enter sib2, iclass 14, count 2 2006.229.09:30:10.33#ibcon#flushed, iclass 14, count 2 2006.229.09:30:10.33#ibcon#about to write, iclass 14, count 2 2006.229.09:30:10.33#ibcon#wrote, iclass 14, count 2 2006.229.09:30:10.33#ibcon#about to read 3, iclass 14, count 2 2006.229.09:30:10.35#ibcon#read 3, iclass 14, count 2 2006.229.09:30:10.35#ibcon#about to read 4, iclass 14, count 2 2006.229.09:30:10.35#ibcon#read 4, iclass 14, count 2 2006.229.09:30:10.35#ibcon#about to read 5, iclass 14, count 2 2006.229.09:30:10.35#ibcon#read 5, iclass 14, count 2 2006.229.09:30:10.35#ibcon#about to read 6, iclass 14, count 2 2006.229.09:30:10.35#ibcon#read 6, iclass 14, count 2 2006.229.09:30:10.35#ibcon#end of sib2, iclass 14, count 2 2006.229.09:30:10.35#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:30:10.35#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:30:10.35#ibcon#[25=AT01-08\r\n] 2006.229.09:30:10.35#ibcon#*before write, iclass 14, count 2 2006.229.09:30:10.35#ibcon#enter sib2, iclass 14, count 2 2006.229.09:30:10.35#ibcon#flushed, iclass 14, count 2 2006.229.09:30:10.35#ibcon#about to write, iclass 14, count 2 2006.229.09:30:10.35#ibcon#wrote, iclass 14, count 2 2006.229.09:30:10.35#ibcon#about to read 3, iclass 14, count 2 2006.229.09:30:10.38#ibcon#read 3, iclass 14, count 2 2006.229.09:30:10.38#ibcon#about to read 4, iclass 14, count 2 2006.229.09:30:10.38#ibcon#read 4, iclass 14, count 2 2006.229.09:30:10.38#ibcon#about to read 5, iclass 14, count 2 2006.229.09:30:10.38#ibcon#read 5, iclass 14, count 2 2006.229.09:30:10.38#ibcon#about to read 6, iclass 14, count 2 2006.229.09:30:10.38#ibcon#read 6, iclass 14, count 2 2006.229.09:30:10.38#ibcon#end of sib2, iclass 14, count 2 2006.229.09:30:10.38#ibcon#*after write, iclass 14, count 2 2006.229.09:30:10.38#ibcon#*before return 0, iclass 14, count 2 2006.229.09:30:10.38#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:10.38#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:10.38#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:30:10.38#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:10.38#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:10.50#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:10.50#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:10.50#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:30:10.50#ibcon#first serial, iclass 14, count 0 2006.229.09:30:10.50#ibcon#enter sib2, iclass 14, count 0 2006.229.09:30:10.50#ibcon#flushed, iclass 14, count 0 2006.229.09:30:10.50#ibcon#about to write, iclass 14, count 0 2006.229.09:30:10.50#ibcon#wrote, iclass 14, count 0 2006.229.09:30:10.50#ibcon#about to read 3, iclass 14, count 0 2006.229.09:30:10.52#ibcon#read 3, iclass 14, count 0 2006.229.09:30:10.52#ibcon#about to read 4, iclass 14, count 0 2006.229.09:30:10.52#ibcon#read 4, iclass 14, count 0 2006.229.09:30:10.52#ibcon#about to read 5, iclass 14, count 0 2006.229.09:30:10.52#ibcon#read 5, iclass 14, count 0 2006.229.09:30:10.52#ibcon#about to read 6, iclass 14, count 0 2006.229.09:30:10.52#ibcon#read 6, iclass 14, count 0 2006.229.09:30:10.52#ibcon#end of sib2, iclass 14, count 0 2006.229.09:30:10.52#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:30:10.52#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:30:10.52#ibcon#[25=USB\r\n] 2006.229.09:30:10.52#ibcon#*before write, iclass 14, count 0 2006.229.09:30:10.52#ibcon#enter sib2, iclass 14, count 0 2006.229.09:30:10.52#ibcon#flushed, iclass 14, count 0 2006.229.09:30:10.52#ibcon#about to write, iclass 14, count 0 2006.229.09:30:10.52#ibcon#wrote, iclass 14, count 0 2006.229.09:30:10.52#ibcon#about to read 3, iclass 14, count 0 2006.229.09:30:10.55#ibcon#read 3, iclass 14, count 0 2006.229.09:30:10.55#ibcon#about to read 4, iclass 14, count 0 2006.229.09:30:10.55#ibcon#read 4, iclass 14, count 0 2006.229.09:30:10.55#ibcon#about to read 5, iclass 14, count 0 2006.229.09:30:10.55#ibcon#read 5, iclass 14, count 0 2006.229.09:30:10.55#ibcon#about to read 6, iclass 14, count 0 2006.229.09:30:10.55#ibcon#read 6, iclass 14, count 0 2006.229.09:30:10.55#ibcon#end of sib2, iclass 14, count 0 2006.229.09:30:10.55#ibcon#*after write, iclass 14, count 0 2006.229.09:30:10.55#ibcon#*before return 0, iclass 14, count 0 2006.229.09:30:10.55#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:10.55#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:10.55#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:30:10.55#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:30:10.55$vck44/valo=2,534.99 2006.229.09:30:10.55#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.09:30:10.55#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.09:30:10.55#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:10.55#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:10.55#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:10.55#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:10.55#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:30:10.55#ibcon#first serial, iclass 16, count 0 2006.229.09:30:10.55#ibcon#enter sib2, iclass 16, count 0 2006.229.09:30:10.55#ibcon#flushed, iclass 16, count 0 2006.229.09:30:10.55#ibcon#about to write, iclass 16, count 0 2006.229.09:30:10.55#ibcon#wrote, iclass 16, count 0 2006.229.09:30:10.55#ibcon#about to read 3, iclass 16, count 0 2006.229.09:30:10.57#ibcon#read 3, iclass 16, count 0 2006.229.09:30:10.57#ibcon#about to read 4, iclass 16, count 0 2006.229.09:30:10.57#ibcon#read 4, iclass 16, count 0 2006.229.09:30:10.57#ibcon#about to read 5, iclass 16, count 0 2006.229.09:30:10.57#ibcon#read 5, iclass 16, count 0 2006.229.09:30:10.57#ibcon#about to read 6, iclass 16, count 0 2006.229.09:30:10.57#ibcon#read 6, iclass 16, count 0 2006.229.09:30:10.57#ibcon#end of sib2, iclass 16, count 0 2006.229.09:30:10.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:30:10.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:30:10.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:30:10.57#ibcon#*before write, iclass 16, count 0 2006.229.09:30:10.57#ibcon#enter sib2, iclass 16, count 0 2006.229.09:30:10.57#ibcon#flushed, iclass 16, count 0 2006.229.09:30:10.57#ibcon#about to write, iclass 16, count 0 2006.229.09:30:10.57#ibcon#wrote, iclass 16, count 0 2006.229.09:30:10.57#ibcon#about to read 3, iclass 16, count 0 2006.229.09:30:10.61#ibcon#read 3, iclass 16, count 0 2006.229.09:30:10.61#ibcon#about to read 4, iclass 16, count 0 2006.229.09:30:10.61#ibcon#read 4, iclass 16, count 0 2006.229.09:30:10.61#ibcon#about to read 5, iclass 16, count 0 2006.229.09:30:10.61#ibcon#read 5, iclass 16, count 0 2006.229.09:30:10.61#ibcon#about to read 6, iclass 16, count 0 2006.229.09:30:10.61#ibcon#read 6, iclass 16, count 0 2006.229.09:30:10.61#ibcon#end of sib2, iclass 16, count 0 2006.229.09:30:10.61#ibcon#*after write, iclass 16, count 0 2006.229.09:30:10.61#ibcon#*before return 0, iclass 16, count 0 2006.229.09:30:10.61#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:10.61#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:10.61#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:30:10.61#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:30:10.61$vck44/va=2,7 2006.229.09:30:10.61#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.09:30:10.61#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.09:30:10.61#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:10.61#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:10.67#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:10.67#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:10.67#ibcon#enter wrdev, iclass 18, count 2 2006.229.09:30:10.67#ibcon#first serial, iclass 18, count 2 2006.229.09:30:10.67#ibcon#enter sib2, iclass 18, count 2 2006.229.09:30:10.67#ibcon#flushed, iclass 18, count 2 2006.229.09:30:10.67#ibcon#about to write, iclass 18, count 2 2006.229.09:30:10.67#ibcon#wrote, iclass 18, count 2 2006.229.09:30:10.67#ibcon#about to read 3, iclass 18, count 2 2006.229.09:30:10.69#ibcon#read 3, iclass 18, count 2 2006.229.09:30:10.69#ibcon#about to read 4, iclass 18, count 2 2006.229.09:30:10.69#ibcon#read 4, iclass 18, count 2 2006.229.09:30:10.69#ibcon#about to read 5, iclass 18, count 2 2006.229.09:30:10.69#ibcon#read 5, iclass 18, count 2 2006.229.09:30:10.69#ibcon#about to read 6, iclass 18, count 2 2006.229.09:30:10.69#ibcon#read 6, iclass 18, count 2 2006.229.09:30:10.69#ibcon#end of sib2, iclass 18, count 2 2006.229.09:30:10.69#ibcon#*mode == 0, iclass 18, count 2 2006.229.09:30:10.69#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.09:30:10.69#ibcon#[25=AT02-07\r\n] 2006.229.09:30:10.69#ibcon#*before write, iclass 18, count 2 2006.229.09:30:10.69#ibcon#enter sib2, iclass 18, count 2 2006.229.09:30:10.69#ibcon#flushed, iclass 18, count 2 2006.229.09:30:10.69#ibcon#about to write, iclass 18, count 2 2006.229.09:30:10.69#ibcon#wrote, iclass 18, count 2 2006.229.09:30:10.69#ibcon#about to read 3, iclass 18, count 2 2006.229.09:30:10.72#ibcon#read 3, iclass 18, count 2 2006.229.09:30:10.72#ibcon#about to read 4, iclass 18, count 2 2006.229.09:30:10.72#ibcon#read 4, iclass 18, count 2 2006.229.09:30:10.72#ibcon#about to read 5, iclass 18, count 2 2006.229.09:30:10.72#ibcon#read 5, iclass 18, count 2 2006.229.09:30:10.72#ibcon#about to read 6, iclass 18, count 2 2006.229.09:30:10.72#ibcon#read 6, iclass 18, count 2 2006.229.09:30:10.72#ibcon#end of sib2, iclass 18, count 2 2006.229.09:30:10.72#ibcon#*after write, iclass 18, count 2 2006.229.09:30:10.72#ibcon#*before return 0, iclass 18, count 2 2006.229.09:30:10.72#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:10.72#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:10.72#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.09:30:10.72#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:10.72#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:10.84#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:10.84#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:10.84#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:30:10.84#ibcon#first serial, iclass 18, count 0 2006.229.09:30:10.84#ibcon#enter sib2, iclass 18, count 0 2006.229.09:30:10.84#ibcon#flushed, iclass 18, count 0 2006.229.09:30:10.84#ibcon#about to write, iclass 18, count 0 2006.229.09:30:10.84#ibcon#wrote, iclass 18, count 0 2006.229.09:30:10.84#ibcon#about to read 3, iclass 18, count 0 2006.229.09:30:10.86#ibcon#read 3, iclass 18, count 0 2006.229.09:30:10.86#ibcon#about to read 4, iclass 18, count 0 2006.229.09:30:10.86#ibcon#read 4, iclass 18, count 0 2006.229.09:30:10.86#ibcon#about to read 5, iclass 18, count 0 2006.229.09:30:10.86#ibcon#read 5, iclass 18, count 0 2006.229.09:30:10.86#ibcon#about to read 6, iclass 18, count 0 2006.229.09:30:10.86#ibcon#read 6, iclass 18, count 0 2006.229.09:30:10.86#ibcon#end of sib2, iclass 18, count 0 2006.229.09:30:10.86#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:30:10.86#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:30:10.86#ibcon#[25=USB\r\n] 2006.229.09:30:10.86#ibcon#*before write, iclass 18, count 0 2006.229.09:30:10.86#ibcon#enter sib2, iclass 18, count 0 2006.229.09:30:10.86#ibcon#flushed, iclass 18, count 0 2006.229.09:30:10.86#ibcon#about to write, iclass 18, count 0 2006.229.09:30:10.86#ibcon#wrote, iclass 18, count 0 2006.229.09:30:10.86#ibcon#about to read 3, iclass 18, count 0 2006.229.09:30:10.89#ibcon#read 3, iclass 18, count 0 2006.229.09:30:10.89#ibcon#about to read 4, iclass 18, count 0 2006.229.09:30:10.89#ibcon#read 4, iclass 18, count 0 2006.229.09:30:10.89#ibcon#about to read 5, iclass 18, count 0 2006.229.09:30:10.89#ibcon#read 5, iclass 18, count 0 2006.229.09:30:10.89#ibcon#about to read 6, iclass 18, count 0 2006.229.09:30:10.89#ibcon#read 6, iclass 18, count 0 2006.229.09:30:10.89#ibcon#end of sib2, iclass 18, count 0 2006.229.09:30:10.89#ibcon#*after write, iclass 18, count 0 2006.229.09:30:10.89#ibcon#*before return 0, iclass 18, count 0 2006.229.09:30:10.89#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:10.89#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:10.89#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:30:10.89#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:30:10.89$vck44/valo=3,564.99 2006.229.09:30:10.89#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:30:10.89#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:30:10.89#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:10.89#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:10.89#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:10.89#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:10.89#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:30:10.89#ibcon#first serial, iclass 20, count 0 2006.229.09:30:10.89#ibcon#enter sib2, iclass 20, count 0 2006.229.09:30:10.89#ibcon#flushed, iclass 20, count 0 2006.229.09:30:10.89#ibcon#about to write, iclass 20, count 0 2006.229.09:30:10.89#ibcon#wrote, iclass 20, count 0 2006.229.09:30:10.89#ibcon#about to read 3, iclass 20, count 0 2006.229.09:30:10.91#ibcon#read 3, iclass 20, count 0 2006.229.09:30:10.91#ibcon#about to read 4, iclass 20, count 0 2006.229.09:30:10.91#ibcon#read 4, iclass 20, count 0 2006.229.09:30:10.91#ibcon#about to read 5, iclass 20, count 0 2006.229.09:30:10.91#ibcon#read 5, iclass 20, count 0 2006.229.09:30:10.91#ibcon#about to read 6, iclass 20, count 0 2006.229.09:30:10.91#ibcon#read 6, iclass 20, count 0 2006.229.09:30:10.91#ibcon#end of sib2, iclass 20, count 0 2006.229.09:30:10.91#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:30:10.91#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:30:10.91#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:30:10.91#ibcon#*before write, iclass 20, count 0 2006.229.09:30:10.91#ibcon#enter sib2, iclass 20, count 0 2006.229.09:30:10.91#ibcon#flushed, iclass 20, count 0 2006.229.09:30:10.91#ibcon#about to write, iclass 20, count 0 2006.229.09:30:10.91#ibcon#wrote, iclass 20, count 0 2006.229.09:30:10.91#ibcon#about to read 3, iclass 20, count 0 2006.229.09:30:10.95#ibcon#read 3, iclass 20, count 0 2006.229.09:30:10.95#ibcon#about to read 4, iclass 20, count 0 2006.229.09:30:10.95#ibcon#read 4, iclass 20, count 0 2006.229.09:30:10.95#ibcon#about to read 5, iclass 20, count 0 2006.229.09:30:10.95#ibcon#read 5, iclass 20, count 0 2006.229.09:30:10.95#ibcon#about to read 6, iclass 20, count 0 2006.229.09:30:10.95#ibcon#read 6, iclass 20, count 0 2006.229.09:30:10.95#ibcon#end of sib2, iclass 20, count 0 2006.229.09:30:10.95#ibcon#*after write, iclass 20, count 0 2006.229.09:30:10.95#ibcon#*before return 0, iclass 20, count 0 2006.229.09:30:10.95#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:10.95#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:10.95#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:30:10.95#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:30:10.95$vck44/va=3,6 2006.229.09:30:10.95#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.09:30:10.95#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.09:30:10.95#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:10.95#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:11.01#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:11.01#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:11.01#ibcon#enter wrdev, iclass 22, count 2 2006.229.09:30:11.01#ibcon#first serial, iclass 22, count 2 2006.229.09:30:11.01#ibcon#enter sib2, iclass 22, count 2 2006.229.09:30:11.01#ibcon#flushed, iclass 22, count 2 2006.229.09:30:11.01#ibcon#about to write, iclass 22, count 2 2006.229.09:30:11.01#ibcon#wrote, iclass 22, count 2 2006.229.09:30:11.01#ibcon#about to read 3, iclass 22, count 2 2006.229.09:30:11.03#ibcon#read 3, iclass 22, count 2 2006.229.09:30:11.03#ibcon#about to read 4, iclass 22, count 2 2006.229.09:30:11.03#ibcon#read 4, iclass 22, count 2 2006.229.09:30:11.03#ibcon#about to read 5, iclass 22, count 2 2006.229.09:30:11.03#ibcon#read 5, iclass 22, count 2 2006.229.09:30:11.03#ibcon#about to read 6, iclass 22, count 2 2006.229.09:30:11.03#ibcon#read 6, iclass 22, count 2 2006.229.09:30:11.03#ibcon#end of sib2, iclass 22, count 2 2006.229.09:30:11.03#ibcon#*mode == 0, iclass 22, count 2 2006.229.09:30:11.03#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.09:30:11.03#ibcon#[25=AT03-06\r\n] 2006.229.09:30:11.03#ibcon#*before write, iclass 22, count 2 2006.229.09:30:11.03#ibcon#enter sib2, iclass 22, count 2 2006.229.09:30:11.03#ibcon#flushed, iclass 22, count 2 2006.229.09:30:11.03#ibcon#about to write, iclass 22, count 2 2006.229.09:30:11.03#ibcon#wrote, iclass 22, count 2 2006.229.09:30:11.03#ibcon#about to read 3, iclass 22, count 2 2006.229.09:30:11.06#ibcon#read 3, iclass 22, count 2 2006.229.09:30:11.06#ibcon#about to read 4, iclass 22, count 2 2006.229.09:30:11.06#ibcon#read 4, iclass 22, count 2 2006.229.09:30:11.06#ibcon#about to read 5, iclass 22, count 2 2006.229.09:30:11.06#ibcon#read 5, iclass 22, count 2 2006.229.09:30:11.06#ibcon#about to read 6, iclass 22, count 2 2006.229.09:30:11.06#ibcon#read 6, iclass 22, count 2 2006.229.09:30:11.06#ibcon#end of sib2, iclass 22, count 2 2006.229.09:30:11.06#ibcon#*after write, iclass 22, count 2 2006.229.09:30:11.06#ibcon#*before return 0, iclass 22, count 2 2006.229.09:30:11.06#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:11.06#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:11.06#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.09:30:11.06#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:11.06#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:11.18#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:11.18#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:11.18#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:30:11.18#ibcon#first serial, iclass 22, count 0 2006.229.09:30:11.18#ibcon#enter sib2, iclass 22, count 0 2006.229.09:30:11.18#ibcon#flushed, iclass 22, count 0 2006.229.09:30:11.18#ibcon#about to write, iclass 22, count 0 2006.229.09:30:11.18#ibcon#wrote, iclass 22, count 0 2006.229.09:30:11.18#ibcon#about to read 3, iclass 22, count 0 2006.229.09:30:11.20#ibcon#read 3, iclass 22, count 0 2006.229.09:30:11.20#ibcon#about to read 4, iclass 22, count 0 2006.229.09:30:11.20#ibcon#read 4, iclass 22, count 0 2006.229.09:30:11.20#ibcon#about to read 5, iclass 22, count 0 2006.229.09:30:11.20#ibcon#read 5, iclass 22, count 0 2006.229.09:30:11.20#ibcon#about to read 6, iclass 22, count 0 2006.229.09:30:11.20#ibcon#read 6, iclass 22, count 0 2006.229.09:30:11.20#ibcon#end of sib2, iclass 22, count 0 2006.229.09:30:11.20#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:30:11.20#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:30:11.20#ibcon#[25=USB\r\n] 2006.229.09:30:11.20#ibcon#*before write, iclass 22, count 0 2006.229.09:30:11.20#ibcon#enter sib2, iclass 22, count 0 2006.229.09:30:11.20#ibcon#flushed, iclass 22, count 0 2006.229.09:30:11.20#ibcon#about to write, iclass 22, count 0 2006.229.09:30:11.20#ibcon#wrote, iclass 22, count 0 2006.229.09:30:11.20#ibcon#about to read 3, iclass 22, count 0 2006.229.09:30:11.23#ibcon#read 3, iclass 22, count 0 2006.229.09:30:11.23#ibcon#about to read 4, iclass 22, count 0 2006.229.09:30:11.23#ibcon#read 4, iclass 22, count 0 2006.229.09:30:11.23#ibcon#about to read 5, iclass 22, count 0 2006.229.09:30:11.23#ibcon#read 5, iclass 22, count 0 2006.229.09:30:11.23#ibcon#about to read 6, iclass 22, count 0 2006.229.09:30:11.23#ibcon#read 6, iclass 22, count 0 2006.229.09:30:11.23#ibcon#end of sib2, iclass 22, count 0 2006.229.09:30:11.23#ibcon#*after write, iclass 22, count 0 2006.229.09:30:11.23#ibcon#*before return 0, iclass 22, count 0 2006.229.09:30:11.23#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:11.23#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:11.23#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:30:11.23#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:30:11.23$vck44/valo=4,624.99 2006.229.09:30:11.23#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:30:11.23#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:30:11.23#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:11.23#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:11.23#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:11.23#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:11.23#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:30:11.23#ibcon#first serial, iclass 24, count 0 2006.229.09:30:11.23#ibcon#enter sib2, iclass 24, count 0 2006.229.09:30:11.23#ibcon#flushed, iclass 24, count 0 2006.229.09:30:11.23#ibcon#about to write, iclass 24, count 0 2006.229.09:30:11.23#ibcon#wrote, iclass 24, count 0 2006.229.09:30:11.23#ibcon#about to read 3, iclass 24, count 0 2006.229.09:30:11.25#ibcon#read 3, iclass 24, count 0 2006.229.09:30:11.25#ibcon#about to read 4, iclass 24, count 0 2006.229.09:30:11.25#ibcon#read 4, iclass 24, count 0 2006.229.09:30:11.25#ibcon#about to read 5, iclass 24, count 0 2006.229.09:30:11.25#ibcon#read 5, iclass 24, count 0 2006.229.09:30:11.25#ibcon#about to read 6, iclass 24, count 0 2006.229.09:30:11.25#ibcon#read 6, iclass 24, count 0 2006.229.09:30:11.25#ibcon#end of sib2, iclass 24, count 0 2006.229.09:30:11.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:30:11.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:30:11.25#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:30:11.25#ibcon#*before write, iclass 24, count 0 2006.229.09:30:11.25#ibcon#enter sib2, iclass 24, count 0 2006.229.09:30:11.25#ibcon#flushed, iclass 24, count 0 2006.229.09:30:11.25#ibcon#about to write, iclass 24, count 0 2006.229.09:30:11.25#ibcon#wrote, iclass 24, count 0 2006.229.09:30:11.25#ibcon#about to read 3, iclass 24, count 0 2006.229.09:30:11.29#ibcon#read 3, iclass 24, count 0 2006.229.09:30:11.29#ibcon#about to read 4, iclass 24, count 0 2006.229.09:30:11.29#ibcon#read 4, iclass 24, count 0 2006.229.09:30:11.29#ibcon#about to read 5, iclass 24, count 0 2006.229.09:30:11.29#ibcon#read 5, iclass 24, count 0 2006.229.09:30:11.29#ibcon#about to read 6, iclass 24, count 0 2006.229.09:30:11.29#ibcon#read 6, iclass 24, count 0 2006.229.09:30:11.29#ibcon#end of sib2, iclass 24, count 0 2006.229.09:30:11.29#ibcon#*after write, iclass 24, count 0 2006.229.09:30:11.29#ibcon#*before return 0, iclass 24, count 0 2006.229.09:30:11.29#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:11.29#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:11.29#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:30:11.29#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:30:11.29$vck44/va=4,7 2006.229.09:30:11.29#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.09:30:11.29#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.09:30:11.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:11.29#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:11.35#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:11.35#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:11.35#ibcon#enter wrdev, iclass 26, count 2 2006.229.09:30:11.35#ibcon#first serial, iclass 26, count 2 2006.229.09:30:11.35#ibcon#enter sib2, iclass 26, count 2 2006.229.09:30:11.35#ibcon#flushed, iclass 26, count 2 2006.229.09:30:11.35#ibcon#about to write, iclass 26, count 2 2006.229.09:30:11.35#ibcon#wrote, iclass 26, count 2 2006.229.09:30:11.35#ibcon#about to read 3, iclass 26, count 2 2006.229.09:30:11.37#ibcon#read 3, iclass 26, count 2 2006.229.09:30:11.37#ibcon#about to read 4, iclass 26, count 2 2006.229.09:30:11.37#ibcon#read 4, iclass 26, count 2 2006.229.09:30:11.37#ibcon#about to read 5, iclass 26, count 2 2006.229.09:30:11.37#ibcon#read 5, iclass 26, count 2 2006.229.09:30:11.37#ibcon#about to read 6, iclass 26, count 2 2006.229.09:30:11.37#ibcon#read 6, iclass 26, count 2 2006.229.09:30:11.37#ibcon#end of sib2, iclass 26, count 2 2006.229.09:30:11.37#ibcon#*mode == 0, iclass 26, count 2 2006.229.09:30:11.37#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.09:30:11.37#ibcon#[25=AT04-07\r\n] 2006.229.09:30:11.37#ibcon#*before write, iclass 26, count 2 2006.229.09:30:11.37#ibcon#enter sib2, iclass 26, count 2 2006.229.09:30:11.37#ibcon#flushed, iclass 26, count 2 2006.229.09:30:11.37#ibcon#about to write, iclass 26, count 2 2006.229.09:30:11.37#ibcon#wrote, iclass 26, count 2 2006.229.09:30:11.37#ibcon#about to read 3, iclass 26, count 2 2006.229.09:30:11.40#ibcon#read 3, iclass 26, count 2 2006.229.09:30:11.40#ibcon#about to read 4, iclass 26, count 2 2006.229.09:30:11.40#ibcon#read 4, iclass 26, count 2 2006.229.09:30:11.40#ibcon#about to read 5, iclass 26, count 2 2006.229.09:30:11.40#ibcon#read 5, iclass 26, count 2 2006.229.09:30:11.40#ibcon#about to read 6, iclass 26, count 2 2006.229.09:30:11.40#ibcon#read 6, iclass 26, count 2 2006.229.09:30:11.40#ibcon#end of sib2, iclass 26, count 2 2006.229.09:30:11.40#ibcon#*after write, iclass 26, count 2 2006.229.09:30:11.40#ibcon#*before return 0, iclass 26, count 2 2006.229.09:30:11.40#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:11.40#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:11.40#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.09:30:11.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:11.40#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:11.45#abcon#<5=/05 1.8 2.9 28.97 961001.0\r\n> 2006.229.09:30:11.47#abcon#{5=INTERFACE CLEAR} 2006.229.09:30:11.52#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:11.52#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:11.52#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:30:11.52#ibcon#first serial, iclass 26, count 0 2006.229.09:30:11.52#ibcon#enter sib2, iclass 26, count 0 2006.229.09:30:11.52#ibcon#flushed, iclass 26, count 0 2006.229.09:30:11.52#ibcon#about to write, iclass 26, count 0 2006.229.09:30:11.52#ibcon#wrote, iclass 26, count 0 2006.229.09:30:11.52#ibcon#about to read 3, iclass 26, count 0 2006.229.09:30:11.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:30:11.54#ibcon#read 3, iclass 26, count 0 2006.229.09:30:11.54#ibcon#about to read 4, iclass 26, count 0 2006.229.09:30:11.54#ibcon#read 4, iclass 26, count 0 2006.229.09:30:11.54#ibcon#about to read 5, iclass 26, count 0 2006.229.09:30:11.54#ibcon#read 5, iclass 26, count 0 2006.229.09:30:11.54#ibcon#about to read 6, iclass 26, count 0 2006.229.09:30:11.54#ibcon#read 6, iclass 26, count 0 2006.229.09:30:11.54#ibcon#end of sib2, iclass 26, count 0 2006.229.09:30:11.54#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:30:11.54#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:30:11.54#ibcon#[25=USB\r\n] 2006.229.09:30:11.54#ibcon#*before write, iclass 26, count 0 2006.229.09:30:11.54#ibcon#enter sib2, iclass 26, count 0 2006.229.09:30:11.54#ibcon#flushed, iclass 26, count 0 2006.229.09:30:11.54#ibcon#about to write, iclass 26, count 0 2006.229.09:30:11.54#ibcon#wrote, iclass 26, count 0 2006.229.09:30:11.54#ibcon#about to read 3, iclass 26, count 0 2006.229.09:30:11.57#ibcon#read 3, iclass 26, count 0 2006.229.09:30:11.57#ibcon#about to read 4, iclass 26, count 0 2006.229.09:30:11.57#ibcon#read 4, iclass 26, count 0 2006.229.09:30:11.57#ibcon#about to read 5, iclass 26, count 0 2006.229.09:30:11.57#ibcon#read 5, iclass 26, count 0 2006.229.09:30:11.57#ibcon#about to read 6, iclass 26, count 0 2006.229.09:30:11.57#ibcon#read 6, iclass 26, count 0 2006.229.09:30:11.57#ibcon#end of sib2, iclass 26, count 0 2006.229.09:30:11.57#ibcon#*after write, iclass 26, count 0 2006.229.09:30:11.57#ibcon#*before return 0, iclass 26, count 0 2006.229.09:30:11.57#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:11.57#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:11.57#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:30:11.57#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:30:11.57$vck44/valo=5,734.99 2006.229.09:30:11.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.09:30:11.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.09:30:11.57#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:11.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:11.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:11.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:11.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:30:11.57#ibcon#first serial, iclass 32, count 0 2006.229.09:30:11.57#ibcon#enter sib2, iclass 32, count 0 2006.229.09:30:11.57#ibcon#flushed, iclass 32, count 0 2006.229.09:30:11.57#ibcon#about to write, iclass 32, count 0 2006.229.09:30:11.57#ibcon#wrote, iclass 32, count 0 2006.229.09:30:11.57#ibcon#about to read 3, iclass 32, count 0 2006.229.09:30:11.59#ibcon#read 3, iclass 32, count 0 2006.229.09:30:11.59#ibcon#about to read 4, iclass 32, count 0 2006.229.09:30:11.59#ibcon#read 4, iclass 32, count 0 2006.229.09:30:11.59#ibcon#about to read 5, iclass 32, count 0 2006.229.09:30:11.59#ibcon#read 5, iclass 32, count 0 2006.229.09:30:11.59#ibcon#about to read 6, iclass 32, count 0 2006.229.09:30:11.59#ibcon#read 6, iclass 32, count 0 2006.229.09:30:11.59#ibcon#end of sib2, iclass 32, count 0 2006.229.09:30:11.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:30:11.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:30:11.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:30:11.59#ibcon#*before write, iclass 32, count 0 2006.229.09:30:11.59#ibcon#enter sib2, iclass 32, count 0 2006.229.09:30:11.59#ibcon#flushed, iclass 32, count 0 2006.229.09:30:11.59#ibcon#about to write, iclass 32, count 0 2006.229.09:30:11.59#ibcon#wrote, iclass 32, count 0 2006.229.09:30:11.59#ibcon#about to read 3, iclass 32, count 0 2006.229.09:30:11.63#ibcon#read 3, iclass 32, count 0 2006.229.09:30:11.63#ibcon#about to read 4, iclass 32, count 0 2006.229.09:30:11.63#ibcon#read 4, iclass 32, count 0 2006.229.09:30:11.63#ibcon#about to read 5, iclass 32, count 0 2006.229.09:30:11.63#ibcon#read 5, iclass 32, count 0 2006.229.09:30:11.63#ibcon#about to read 6, iclass 32, count 0 2006.229.09:30:11.63#ibcon#read 6, iclass 32, count 0 2006.229.09:30:11.63#ibcon#end of sib2, iclass 32, count 0 2006.229.09:30:11.63#ibcon#*after write, iclass 32, count 0 2006.229.09:30:11.63#ibcon#*before return 0, iclass 32, count 0 2006.229.09:30:11.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:11.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:11.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:30:11.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:30:11.63$vck44/va=5,4 2006.229.09:30:11.63#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.09:30:11.63#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.09:30:11.63#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:11.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:11.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:11.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:11.69#ibcon#enter wrdev, iclass 34, count 2 2006.229.09:30:11.69#ibcon#first serial, iclass 34, count 2 2006.229.09:30:11.69#ibcon#enter sib2, iclass 34, count 2 2006.229.09:30:11.69#ibcon#flushed, iclass 34, count 2 2006.229.09:30:11.69#ibcon#about to write, iclass 34, count 2 2006.229.09:30:11.69#ibcon#wrote, iclass 34, count 2 2006.229.09:30:11.69#ibcon#about to read 3, iclass 34, count 2 2006.229.09:30:11.71#ibcon#read 3, iclass 34, count 2 2006.229.09:30:11.71#ibcon#about to read 4, iclass 34, count 2 2006.229.09:30:11.71#ibcon#read 4, iclass 34, count 2 2006.229.09:30:11.71#ibcon#about to read 5, iclass 34, count 2 2006.229.09:30:11.71#ibcon#read 5, iclass 34, count 2 2006.229.09:30:11.71#ibcon#about to read 6, iclass 34, count 2 2006.229.09:30:11.71#ibcon#read 6, iclass 34, count 2 2006.229.09:30:11.71#ibcon#end of sib2, iclass 34, count 2 2006.229.09:30:11.71#ibcon#*mode == 0, iclass 34, count 2 2006.229.09:30:11.71#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.09:30:11.71#ibcon#[25=AT05-04\r\n] 2006.229.09:30:11.71#ibcon#*before write, iclass 34, count 2 2006.229.09:30:11.71#ibcon#enter sib2, iclass 34, count 2 2006.229.09:30:11.71#ibcon#flushed, iclass 34, count 2 2006.229.09:30:11.71#ibcon#about to write, iclass 34, count 2 2006.229.09:30:11.71#ibcon#wrote, iclass 34, count 2 2006.229.09:30:11.71#ibcon#about to read 3, iclass 34, count 2 2006.229.09:30:11.74#ibcon#read 3, iclass 34, count 2 2006.229.09:30:11.74#ibcon#about to read 4, iclass 34, count 2 2006.229.09:30:11.74#ibcon#read 4, iclass 34, count 2 2006.229.09:30:11.74#ibcon#about to read 5, iclass 34, count 2 2006.229.09:30:11.74#ibcon#read 5, iclass 34, count 2 2006.229.09:30:11.74#ibcon#about to read 6, iclass 34, count 2 2006.229.09:30:11.74#ibcon#read 6, iclass 34, count 2 2006.229.09:30:11.74#ibcon#end of sib2, iclass 34, count 2 2006.229.09:30:11.74#ibcon#*after write, iclass 34, count 2 2006.229.09:30:11.74#ibcon#*before return 0, iclass 34, count 2 2006.229.09:30:11.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:11.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:11.74#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.09:30:11.74#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:11.74#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:11.86#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:11.86#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:11.86#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:30:11.86#ibcon#first serial, iclass 34, count 0 2006.229.09:30:11.86#ibcon#enter sib2, iclass 34, count 0 2006.229.09:30:11.86#ibcon#flushed, iclass 34, count 0 2006.229.09:30:11.86#ibcon#about to write, iclass 34, count 0 2006.229.09:30:11.86#ibcon#wrote, iclass 34, count 0 2006.229.09:30:11.86#ibcon#about to read 3, iclass 34, count 0 2006.229.09:30:11.88#ibcon#read 3, iclass 34, count 0 2006.229.09:30:11.88#ibcon#about to read 4, iclass 34, count 0 2006.229.09:30:11.88#ibcon#read 4, iclass 34, count 0 2006.229.09:30:11.88#ibcon#about to read 5, iclass 34, count 0 2006.229.09:30:11.88#ibcon#read 5, iclass 34, count 0 2006.229.09:30:11.88#ibcon#about to read 6, iclass 34, count 0 2006.229.09:30:11.88#ibcon#read 6, iclass 34, count 0 2006.229.09:30:11.88#ibcon#end of sib2, iclass 34, count 0 2006.229.09:30:11.88#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:30:11.88#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:30:11.88#ibcon#[25=USB\r\n] 2006.229.09:30:11.88#ibcon#*before write, iclass 34, count 0 2006.229.09:30:11.88#ibcon#enter sib2, iclass 34, count 0 2006.229.09:30:11.88#ibcon#flushed, iclass 34, count 0 2006.229.09:30:11.88#ibcon#about to write, iclass 34, count 0 2006.229.09:30:11.88#ibcon#wrote, iclass 34, count 0 2006.229.09:30:11.88#ibcon#about to read 3, iclass 34, count 0 2006.229.09:30:11.91#ibcon#read 3, iclass 34, count 0 2006.229.09:30:11.91#ibcon#about to read 4, iclass 34, count 0 2006.229.09:30:11.91#ibcon#read 4, iclass 34, count 0 2006.229.09:30:11.91#ibcon#about to read 5, iclass 34, count 0 2006.229.09:30:11.91#ibcon#read 5, iclass 34, count 0 2006.229.09:30:11.91#ibcon#about to read 6, iclass 34, count 0 2006.229.09:30:11.91#ibcon#read 6, iclass 34, count 0 2006.229.09:30:11.91#ibcon#end of sib2, iclass 34, count 0 2006.229.09:30:11.91#ibcon#*after write, iclass 34, count 0 2006.229.09:30:11.91#ibcon#*before return 0, iclass 34, count 0 2006.229.09:30:11.91#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:11.91#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:11.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:30:11.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:30:11.91$vck44/valo=6,814.99 2006.229.09:30:11.91#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.09:30:11.91#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.09:30:11.91#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:11.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:11.91#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:11.91#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:11.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:30:11.91#ibcon#first serial, iclass 36, count 0 2006.229.09:30:11.91#ibcon#enter sib2, iclass 36, count 0 2006.229.09:30:11.91#ibcon#flushed, iclass 36, count 0 2006.229.09:30:11.91#ibcon#about to write, iclass 36, count 0 2006.229.09:30:11.91#ibcon#wrote, iclass 36, count 0 2006.229.09:30:11.91#ibcon#about to read 3, iclass 36, count 0 2006.229.09:30:11.93#ibcon#read 3, iclass 36, count 0 2006.229.09:30:11.93#ibcon#about to read 4, iclass 36, count 0 2006.229.09:30:11.93#ibcon#read 4, iclass 36, count 0 2006.229.09:30:11.93#ibcon#about to read 5, iclass 36, count 0 2006.229.09:30:11.93#ibcon#read 5, iclass 36, count 0 2006.229.09:30:11.93#ibcon#about to read 6, iclass 36, count 0 2006.229.09:30:11.93#ibcon#read 6, iclass 36, count 0 2006.229.09:30:11.93#ibcon#end of sib2, iclass 36, count 0 2006.229.09:30:11.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:30:11.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:30:11.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:30:11.93#ibcon#*before write, iclass 36, count 0 2006.229.09:30:11.93#ibcon#enter sib2, iclass 36, count 0 2006.229.09:30:11.93#ibcon#flushed, iclass 36, count 0 2006.229.09:30:11.93#ibcon#about to write, iclass 36, count 0 2006.229.09:30:11.93#ibcon#wrote, iclass 36, count 0 2006.229.09:30:11.93#ibcon#about to read 3, iclass 36, count 0 2006.229.09:30:11.97#ibcon#read 3, iclass 36, count 0 2006.229.09:30:11.97#ibcon#about to read 4, iclass 36, count 0 2006.229.09:30:11.97#ibcon#read 4, iclass 36, count 0 2006.229.09:30:11.97#ibcon#about to read 5, iclass 36, count 0 2006.229.09:30:11.97#ibcon#read 5, iclass 36, count 0 2006.229.09:30:11.97#ibcon#about to read 6, iclass 36, count 0 2006.229.09:30:11.97#ibcon#read 6, iclass 36, count 0 2006.229.09:30:11.97#ibcon#end of sib2, iclass 36, count 0 2006.229.09:30:11.97#ibcon#*after write, iclass 36, count 0 2006.229.09:30:11.97#ibcon#*before return 0, iclass 36, count 0 2006.229.09:30:11.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:11.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:11.97#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:30:11.97#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:30:11.97$vck44/va=6,4 2006.229.09:30:11.97#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.09:30:11.97#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.09:30:11.97#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:11.97#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:12.03#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:12.03#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:12.03#ibcon#enter wrdev, iclass 38, count 2 2006.229.09:30:12.03#ibcon#first serial, iclass 38, count 2 2006.229.09:30:12.03#ibcon#enter sib2, iclass 38, count 2 2006.229.09:30:12.03#ibcon#flushed, iclass 38, count 2 2006.229.09:30:12.03#ibcon#about to write, iclass 38, count 2 2006.229.09:30:12.03#ibcon#wrote, iclass 38, count 2 2006.229.09:30:12.03#ibcon#about to read 3, iclass 38, count 2 2006.229.09:30:12.05#ibcon#read 3, iclass 38, count 2 2006.229.09:30:12.05#ibcon#about to read 4, iclass 38, count 2 2006.229.09:30:12.05#ibcon#read 4, iclass 38, count 2 2006.229.09:30:12.05#ibcon#about to read 5, iclass 38, count 2 2006.229.09:30:12.05#ibcon#read 5, iclass 38, count 2 2006.229.09:30:12.05#ibcon#about to read 6, iclass 38, count 2 2006.229.09:30:12.05#ibcon#read 6, iclass 38, count 2 2006.229.09:30:12.05#ibcon#end of sib2, iclass 38, count 2 2006.229.09:30:12.05#ibcon#*mode == 0, iclass 38, count 2 2006.229.09:30:12.05#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.09:30:12.05#ibcon#[25=AT06-04\r\n] 2006.229.09:30:12.05#ibcon#*before write, iclass 38, count 2 2006.229.09:30:12.05#ibcon#enter sib2, iclass 38, count 2 2006.229.09:30:12.05#ibcon#flushed, iclass 38, count 2 2006.229.09:30:12.05#ibcon#about to write, iclass 38, count 2 2006.229.09:30:12.05#ibcon#wrote, iclass 38, count 2 2006.229.09:30:12.05#ibcon#about to read 3, iclass 38, count 2 2006.229.09:30:12.08#ibcon#read 3, iclass 38, count 2 2006.229.09:30:12.08#ibcon#about to read 4, iclass 38, count 2 2006.229.09:30:12.08#ibcon#read 4, iclass 38, count 2 2006.229.09:30:12.08#ibcon#about to read 5, iclass 38, count 2 2006.229.09:30:12.08#ibcon#read 5, iclass 38, count 2 2006.229.09:30:12.08#ibcon#about to read 6, iclass 38, count 2 2006.229.09:30:12.08#ibcon#read 6, iclass 38, count 2 2006.229.09:30:12.08#ibcon#end of sib2, iclass 38, count 2 2006.229.09:30:12.08#ibcon#*after write, iclass 38, count 2 2006.229.09:30:12.08#ibcon#*before return 0, iclass 38, count 2 2006.229.09:30:12.08#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:12.08#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:12.08#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.09:30:12.08#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:12.08#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:12.20#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:12.20#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:12.20#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:30:12.20#ibcon#first serial, iclass 38, count 0 2006.229.09:30:12.20#ibcon#enter sib2, iclass 38, count 0 2006.229.09:30:12.20#ibcon#flushed, iclass 38, count 0 2006.229.09:30:12.20#ibcon#about to write, iclass 38, count 0 2006.229.09:30:12.20#ibcon#wrote, iclass 38, count 0 2006.229.09:30:12.20#ibcon#about to read 3, iclass 38, count 0 2006.229.09:30:12.22#ibcon#read 3, iclass 38, count 0 2006.229.09:30:12.22#ibcon#about to read 4, iclass 38, count 0 2006.229.09:30:12.22#ibcon#read 4, iclass 38, count 0 2006.229.09:30:12.22#ibcon#about to read 5, iclass 38, count 0 2006.229.09:30:12.22#ibcon#read 5, iclass 38, count 0 2006.229.09:30:12.22#ibcon#about to read 6, iclass 38, count 0 2006.229.09:30:12.22#ibcon#read 6, iclass 38, count 0 2006.229.09:30:12.22#ibcon#end of sib2, iclass 38, count 0 2006.229.09:30:12.22#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:30:12.22#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:30:12.22#ibcon#[25=USB\r\n] 2006.229.09:30:12.22#ibcon#*before write, iclass 38, count 0 2006.229.09:30:12.22#ibcon#enter sib2, iclass 38, count 0 2006.229.09:30:12.22#ibcon#flushed, iclass 38, count 0 2006.229.09:30:12.22#ibcon#about to write, iclass 38, count 0 2006.229.09:30:12.22#ibcon#wrote, iclass 38, count 0 2006.229.09:30:12.22#ibcon#about to read 3, iclass 38, count 0 2006.229.09:30:12.25#ibcon#read 3, iclass 38, count 0 2006.229.09:30:12.25#ibcon#about to read 4, iclass 38, count 0 2006.229.09:30:12.25#ibcon#read 4, iclass 38, count 0 2006.229.09:30:12.25#ibcon#about to read 5, iclass 38, count 0 2006.229.09:30:12.25#ibcon#read 5, iclass 38, count 0 2006.229.09:30:12.25#ibcon#about to read 6, iclass 38, count 0 2006.229.09:30:12.25#ibcon#read 6, iclass 38, count 0 2006.229.09:30:12.25#ibcon#end of sib2, iclass 38, count 0 2006.229.09:30:12.25#ibcon#*after write, iclass 38, count 0 2006.229.09:30:12.25#ibcon#*before return 0, iclass 38, count 0 2006.229.09:30:12.25#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:12.25#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:12.25#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:30:12.25#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:30:12.25$vck44/valo=7,864.99 2006.229.09:30:12.25#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:30:12.25#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:30:12.25#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:12.25#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:12.25#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:12.25#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:12.25#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:30:12.25#ibcon#first serial, iclass 40, count 0 2006.229.09:30:12.25#ibcon#enter sib2, iclass 40, count 0 2006.229.09:30:12.25#ibcon#flushed, iclass 40, count 0 2006.229.09:30:12.25#ibcon#about to write, iclass 40, count 0 2006.229.09:30:12.25#ibcon#wrote, iclass 40, count 0 2006.229.09:30:12.25#ibcon#about to read 3, iclass 40, count 0 2006.229.09:30:12.27#ibcon#read 3, iclass 40, count 0 2006.229.09:30:12.27#ibcon#about to read 4, iclass 40, count 0 2006.229.09:30:12.27#ibcon#read 4, iclass 40, count 0 2006.229.09:30:12.27#ibcon#about to read 5, iclass 40, count 0 2006.229.09:30:12.27#ibcon#read 5, iclass 40, count 0 2006.229.09:30:12.27#ibcon#about to read 6, iclass 40, count 0 2006.229.09:30:12.27#ibcon#read 6, iclass 40, count 0 2006.229.09:30:12.27#ibcon#end of sib2, iclass 40, count 0 2006.229.09:30:12.27#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:30:12.27#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:30:12.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:30:12.27#ibcon#*before write, iclass 40, count 0 2006.229.09:30:12.27#ibcon#enter sib2, iclass 40, count 0 2006.229.09:30:12.27#ibcon#flushed, iclass 40, count 0 2006.229.09:30:12.27#ibcon#about to write, iclass 40, count 0 2006.229.09:30:12.27#ibcon#wrote, iclass 40, count 0 2006.229.09:30:12.27#ibcon#about to read 3, iclass 40, count 0 2006.229.09:30:12.31#ibcon#read 3, iclass 40, count 0 2006.229.09:30:12.31#ibcon#about to read 4, iclass 40, count 0 2006.229.09:30:12.31#ibcon#read 4, iclass 40, count 0 2006.229.09:30:12.31#ibcon#about to read 5, iclass 40, count 0 2006.229.09:30:12.31#ibcon#read 5, iclass 40, count 0 2006.229.09:30:12.31#ibcon#about to read 6, iclass 40, count 0 2006.229.09:30:12.31#ibcon#read 6, iclass 40, count 0 2006.229.09:30:12.31#ibcon#end of sib2, iclass 40, count 0 2006.229.09:30:12.31#ibcon#*after write, iclass 40, count 0 2006.229.09:30:12.31#ibcon#*before return 0, iclass 40, count 0 2006.229.09:30:12.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:12.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:12.31#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:30:12.31#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:30:12.31$vck44/va=7,5 2006.229.09:30:12.31#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.09:30:12.31#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.09:30:12.31#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:12.31#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:12.37#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:12.37#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:12.37#ibcon#enter wrdev, iclass 4, count 2 2006.229.09:30:12.37#ibcon#first serial, iclass 4, count 2 2006.229.09:30:12.37#ibcon#enter sib2, iclass 4, count 2 2006.229.09:30:12.37#ibcon#flushed, iclass 4, count 2 2006.229.09:30:12.37#ibcon#about to write, iclass 4, count 2 2006.229.09:30:12.37#ibcon#wrote, iclass 4, count 2 2006.229.09:30:12.37#ibcon#about to read 3, iclass 4, count 2 2006.229.09:30:12.39#ibcon#read 3, iclass 4, count 2 2006.229.09:30:12.39#ibcon#about to read 4, iclass 4, count 2 2006.229.09:30:12.39#ibcon#read 4, iclass 4, count 2 2006.229.09:30:12.39#ibcon#about to read 5, iclass 4, count 2 2006.229.09:30:12.39#ibcon#read 5, iclass 4, count 2 2006.229.09:30:12.39#ibcon#about to read 6, iclass 4, count 2 2006.229.09:30:12.39#ibcon#read 6, iclass 4, count 2 2006.229.09:30:12.39#ibcon#end of sib2, iclass 4, count 2 2006.229.09:30:12.39#ibcon#*mode == 0, iclass 4, count 2 2006.229.09:30:12.39#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.09:30:12.39#ibcon#[25=AT07-05\r\n] 2006.229.09:30:12.39#ibcon#*before write, iclass 4, count 2 2006.229.09:30:12.39#ibcon#enter sib2, iclass 4, count 2 2006.229.09:30:12.39#ibcon#flushed, iclass 4, count 2 2006.229.09:30:12.39#ibcon#about to write, iclass 4, count 2 2006.229.09:30:12.39#ibcon#wrote, iclass 4, count 2 2006.229.09:30:12.39#ibcon#about to read 3, iclass 4, count 2 2006.229.09:30:12.42#ibcon#read 3, iclass 4, count 2 2006.229.09:30:12.42#ibcon#about to read 4, iclass 4, count 2 2006.229.09:30:12.42#ibcon#read 4, iclass 4, count 2 2006.229.09:30:12.42#ibcon#about to read 5, iclass 4, count 2 2006.229.09:30:12.42#ibcon#read 5, iclass 4, count 2 2006.229.09:30:12.42#ibcon#about to read 6, iclass 4, count 2 2006.229.09:30:12.42#ibcon#read 6, iclass 4, count 2 2006.229.09:30:12.42#ibcon#end of sib2, iclass 4, count 2 2006.229.09:30:12.42#ibcon#*after write, iclass 4, count 2 2006.229.09:30:12.42#ibcon#*before return 0, iclass 4, count 2 2006.229.09:30:12.42#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:12.42#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:12.42#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.09:30:12.42#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:12.42#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:12.54#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:12.54#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:12.54#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:30:12.54#ibcon#first serial, iclass 4, count 0 2006.229.09:30:12.54#ibcon#enter sib2, iclass 4, count 0 2006.229.09:30:12.54#ibcon#flushed, iclass 4, count 0 2006.229.09:30:12.54#ibcon#about to write, iclass 4, count 0 2006.229.09:30:12.54#ibcon#wrote, iclass 4, count 0 2006.229.09:30:12.54#ibcon#about to read 3, iclass 4, count 0 2006.229.09:30:12.56#ibcon#read 3, iclass 4, count 0 2006.229.09:30:12.56#ibcon#about to read 4, iclass 4, count 0 2006.229.09:30:12.56#ibcon#read 4, iclass 4, count 0 2006.229.09:30:12.56#ibcon#about to read 5, iclass 4, count 0 2006.229.09:30:12.56#ibcon#read 5, iclass 4, count 0 2006.229.09:30:12.56#ibcon#about to read 6, iclass 4, count 0 2006.229.09:30:12.56#ibcon#read 6, iclass 4, count 0 2006.229.09:30:12.56#ibcon#end of sib2, iclass 4, count 0 2006.229.09:30:12.56#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:30:12.56#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:30:12.56#ibcon#[25=USB\r\n] 2006.229.09:30:12.56#ibcon#*before write, iclass 4, count 0 2006.229.09:30:12.56#ibcon#enter sib2, iclass 4, count 0 2006.229.09:30:12.56#ibcon#flushed, iclass 4, count 0 2006.229.09:30:12.56#ibcon#about to write, iclass 4, count 0 2006.229.09:30:12.56#ibcon#wrote, iclass 4, count 0 2006.229.09:30:12.56#ibcon#about to read 3, iclass 4, count 0 2006.229.09:30:12.59#ibcon#read 3, iclass 4, count 0 2006.229.09:30:12.59#ibcon#about to read 4, iclass 4, count 0 2006.229.09:30:12.59#ibcon#read 4, iclass 4, count 0 2006.229.09:30:12.59#ibcon#about to read 5, iclass 4, count 0 2006.229.09:30:12.59#ibcon#read 5, iclass 4, count 0 2006.229.09:30:12.59#ibcon#about to read 6, iclass 4, count 0 2006.229.09:30:12.59#ibcon#read 6, iclass 4, count 0 2006.229.09:30:12.59#ibcon#end of sib2, iclass 4, count 0 2006.229.09:30:12.59#ibcon#*after write, iclass 4, count 0 2006.229.09:30:12.59#ibcon#*before return 0, iclass 4, count 0 2006.229.09:30:12.59#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:12.59#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:12.59#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:30:12.59#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:30:12.59$vck44/valo=8,884.99 2006.229.09:30:12.59#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.09:30:12.59#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.09:30:12.59#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:12.59#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:12.59#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:12.59#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:12.59#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:30:12.59#ibcon#first serial, iclass 6, count 0 2006.229.09:30:12.59#ibcon#enter sib2, iclass 6, count 0 2006.229.09:30:12.59#ibcon#flushed, iclass 6, count 0 2006.229.09:30:12.59#ibcon#about to write, iclass 6, count 0 2006.229.09:30:12.59#ibcon#wrote, iclass 6, count 0 2006.229.09:30:12.59#ibcon#about to read 3, iclass 6, count 0 2006.229.09:30:12.61#ibcon#read 3, iclass 6, count 0 2006.229.09:30:12.61#ibcon#about to read 4, iclass 6, count 0 2006.229.09:30:12.61#ibcon#read 4, iclass 6, count 0 2006.229.09:30:12.61#ibcon#about to read 5, iclass 6, count 0 2006.229.09:30:12.61#ibcon#read 5, iclass 6, count 0 2006.229.09:30:12.61#ibcon#about to read 6, iclass 6, count 0 2006.229.09:30:12.61#ibcon#read 6, iclass 6, count 0 2006.229.09:30:12.61#ibcon#end of sib2, iclass 6, count 0 2006.229.09:30:12.61#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:30:12.61#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:30:12.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:30:12.61#ibcon#*before write, iclass 6, count 0 2006.229.09:30:12.61#ibcon#enter sib2, iclass 6, count 0 2006.229.09:30:12.61#ibcon#flushed, iclass 6, count 0 2006.229.09:30:12.61#ibcon#about to write, iclass 6, count 0 2006.229.09:30:12.61#ibcon#wrote, iclass 6, count 0 2006.229.09:30:12.61#ibcon#about to read 3, iclass 6, count 0 2006.229.09:30:12.65#ibcon#read 3, iclass 6, count 0 2006.229.09:30:12.65#ibcon#about to read 4, iclass 6, count 0 2006.229.09:30:12.65#ibcon#read 4, iclass 6, count 0 2006.229.09:30:12.65#ibcon#about to read 5, iclass 6, count 0 2006.229.09:30:12.65#ibcon#read 5, iclass 6, count 0 2006.229.09:30:12.65#ibcon#about to read 6, iclass 6, count 0 2006.229.09:30:12.65#ibcon#read 6, iclass 6, count 0 2006.229.09:30:12.65#ibcon#end of sib2, iclass 6, count 0 2006.229.09:30:12.65#ibcon#*after write, iclass 6, count 0 2006.229.09:30:12.65#ibcon#*before return 0, iclass 6, count 0 2006.229.09:30:12.65#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:12.65#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:12.65#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:30:12.65#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:30:12.65$vck44/va=8,6 2006.229.09:30:12.65#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.09:30:12.65#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.09:30:12.65#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:12.65#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:30:12.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:30:12.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:30:12.71#ibcon#enter wrdev, iclass 10, count 2 2006.229.09:30:12.71#ibcon#first serial, iclass 10, count 2 2006.229.09:30:12.71#ibcon#enter sib2, iclass 10, count 2 2006.229.09:30:12.71#ibcon#flushed, iclass 10, count 2 2006.229.09:30:12.71#ibcon#about to write, iclass 10, count 2 2006.229.09:30:12.71#ibcon#wrote, iclass 10, count 2 2006.229.09:30:12.71#ibcon#about to read 3, iclass 10, count 2 2006.229.09:30:12.73#ibcon#read 3, iclass 10, count 2 2006.229.09:30:12.73#ibcon#about to read 4, iclass 10, count 2 2006.229.09:30:12.73#ibcon#read 4, iclass 10, count 2 2006.229.09:30:12.73#ibcon#about to read 5, iclass 10, count 2 2006.229.09:30:12.73#ibcon#read 5, iclass 10, count 2 2006.229.09:30:12.73#ibcon#about to read 6, iclass 10, count 2 2006.229.09:30:12.73#ibcon#read 6, iclass 10, count 2 2006.229.09:30:12.73#ibcon#end of sib2, iclass 10, count 2 2006.229.09:30:12.73#ibcon#*mode == 0, iclass 10, count 2 2006.229.09:30:12.73#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.09:30:12.73#ibcon#[25=AT08-06\r\n] 2006.229.09:30:12.73#ibcon#*before write, iclass 10, count 2 2006.229.09:30:12.73#ibcon#enter sib2, iclass 10, count 2 2006.229.09:30:12.73#ibcon#flushed, iclass 10, count 2 2006.229.09:30:12.73#ibcon#about to write, iclass 10, count 2 2006.229.09:30:12.73#ibcon#wrote, iclass 10, count 2 2006.229.09:30:12.73#ibcon#about to read 3, iclass 10, count 2 2006.229.09:30:12.76#ibcon#read 3, iclass 10, count 2 2006.229.09:30:12.76#ibcon#about to read 4, iclass 10, count 2 2006.229.09:30:12.76#ibcon#read 4, iclass 10, count 2 2006.229.09:30:12.76#ibcon#about to read 5, iclass 10, count 2 2006.229.09:30:12.76#ibcon#read 5, iclass 10, count 2 2006.229.09:30:12.76#ibcon#about to read 6, iclass 10, count 2 2006.229.09:30:12.76#ibcon#read 6, iclass 10, count 2 2006.229.09:30:12.76#ibcon#end of sib2, iclass 10, count 2 2006.229.09:30:12.76#ibcon#*after write, iclass 10, count 2 2006.229.09:30:12.76#ibcon#*before return 0, iclass 10, count 2 2006.229.09:30:12.76#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:30:12.76#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:30:12.76#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.09:30:12.76#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:12.76#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:30:12.88#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:30:12.88#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:30:12.88#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:30:12.88#ibcon#first serial, iclass 10, count 0 2006.229.09:30:12.88#ibcon#enter sib2, iclass 10, count 0 2006.229.09:30:12.88#ibcon#flushed, iclass 10, count 0 2006.229.09:30:12.88#ibcon#about to write, iclass 10, count 0 2006.229.09:30:12.88#ibcon#wrote, iclass 10, count 0 2006.229.09:30:12.88#ibcon#about to read 3, iclass 10, count 0 2006.229.09:30:12.90#ibcon#read 3, iclass 10, count 0 2006.229.09:30:12.90#ibcon#about to read 4, iclass 10, count 0 2006.229.09:30:12.90#ibcon#read 4, iclass 10, count 0 2006.229.09:30:12.90#ibcon#about to read 5, iclass 10, count 0 2006.229.09:30:12.90#ibcon#read 5, iclass 10, count 0 2006.229.09:30:12.90#ibcon#about to read 6, iclass 10, count 0 2006.229.09:30:12.90#ibcon#read 6, iclass 10, count 0 2006.229.09:30:12.90#ibcon#end of sib2, iclass 10, count 0 2006.229.09:30:12.90#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:30:12.90#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:30:12.90#ibcon#[25=USB\r\n] 2006.229.09:30:12.90#ibcon#*before write, iclass 10, count 0 2006.229.09:30:12.90#ibcon#enter sib2, iclass 10, count 0 2006.229.09:30:12.90#ibcon#flushed, iclass 10, count 0 2006.229.09:30:12.90#ibcon#about to write, iclass 10, count 0 2006.229.09:30:12.90#ibcon#wrote, iclass 10, count 0 2006.229.09:30:12.90#ibcon#about to read 3, iclass 10, count 0 2006.229.09:30:12.93#ibcon#read 3, iclass 10, count 0 2006.229.09:30:12.93#ibcon#about to read 4, iclass 10, count 0 2006.229.09:30:12.93#ibcon#read 4, iclass 10, count 0 2006.229.09:30:12.93#ibcon#about to read 5, iclass 10, count 0 2006.229.09:30:12.93#ibcon#read 5, iclass 10, count 0 2006.229.09:30:12.93#ibcon#about to read 6, iclass 10, count 0 2006.229.09:30:12.93#ibcon#read 6, iclass 10, count 0 2006.229.09:30:12.93#ibcon#end of sib2, iclass 10, count 0 2006.229.09:30:12.93#ibcon#*after write, iclass 10, count 0 2006.229.09:30:12.93#ibcon#*before return 0, iclass 10, count 0 2006.229.09:30:12.93#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:30:12.93#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:30:12.93#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:30:12.93#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:30:12.93$vck44/vblo=1,629.99 2006.229.09:30:12.93#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.09:30:12.93#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.09:30:12.93#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:12.93#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:12.93#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:12.93#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:12.93#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:30:12.93#ibcon#first serial, iclass 12, count 0 2006.229.09:30:12.93#ibcon#enter sib2, iclass 12, count 0 2006.229.09:30:12.93#ibcon#flushed, iclass 12, count 0 2006.229.09:30:12.93#ibcon#about to write, iclass 12, count 0 2006.229.09:30:12.93#ibcon#wrote, iclass 12, count 0 2006.229.09:30:12.93#ibcon#about to read 3, iclass 12, count 0 2006.229.09:30:12.95#ibcon#read 3, iclass 12, count 0 2006.229.09:30:12.95#ibcon#about to read 4, iclass 12, count 0 2006.229.09:30:12.95#ibcon#read 4, iclass 12, count 0 2006.229.09:30:12.95#ibcon#about to read 5, iclass 12, count 0 2006.229.09:30:12.95#ibcon#read 5, iclass 12, count 0 2006.229.09:30:12.95#ibcon#about to read 6, iclass 12, count 0 2006.229.09:30:12.95#ibcon#read 6, iclass 12, count 0 2006.229.09:30:12.95#ibcon#end of sib2, iclass 12, count 0 2006.229.09:30:12.95#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:30:12.95#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:30:12.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:30:12.95#ibcon#*before write, iclass 12, count 0 2006.229.09:30:12.95#ibcon#enter sib2, iclass 12, count 0 2006.229.09:30:12.95#ibcon#flushed, iclass 12, count 0 2006.229.09:30:12.95#ibcon#about to write, iclass 12, count 0 2006.229.09:30:12.95#ibcon#wrote, iclass 12, count 0 2006.229.09:30:12.95#ibcon#about to read 3, iclass 12, count 0 2006.229.09:30:12.99#ibcon#read 3, iclass 12, count 0 2006.229.09:30:12.99#ibcon#about to read 4, iclass 12, count 0 2006.229.09:30:12.99#ibcon#read 4, iclass 12, count 0 2006.229.09:30:12.99#ibcon#about to read 5, iclass 12, count 0 2006.229.09:30:12.99#ibcon#read 5, iclass 12, count 0 2006.229.09:30:12.99#ibcon#about to read 6, iclass 12, count 0 2006.229.09:30:12.99#ibcon#read 6, iclass 12, count 0 2006.229.09:30:12.99#ibcon#end of sib2, iclass 12, count 0 2006.229.09:30:12.99#ibcon#*after write, iclass 12, count 0 2006.229.09:30:12.99#ibcon#*before return 0, iclass 12, count 0 2006.229.09:30:12.99#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:12.99#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:30:12.99#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:30:12.99#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:30:12.99$vck44/vb=1,4 2006.229.09:30:12.99#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:30:12.99#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:30:12.99#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:12.99#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:12.99#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:12.99#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:12.99#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:30:12.99#ibcon#first serial, iclass 14, count 2 2006.229.09:30:12.99#ibcon#enter sib2, iclass 14, count 2 2006.229.09:30:12.99#ibcon#flushed, iclass 14, count 2 2006.229.09:30:12.99#ibcon#about to write, iclass 14, count 2 2006.229.09:30:12.99#ibcon#wrote, iclass 14, count 2 2006.229.09:30:12.99#ibcon#about to read 3, iclass 14, count 2 2006.229.09:30:13.01#ibcon#read 3, iclass 14, count 2 2006.229.09:30:13.01#ibcon#about to read 4, iclass 14, count 2 2006.229.09:30:13.01#ibcon#read 4, iclass 14, count 2 2006.229.09:30:13.01#ibcon#about to read 5, iclass 14, count 2 2006.229.09:30:13.01#ibcon#read 5, iclass 14, count 2 2006.229.09:30:13.01#ibcon#about to read 6, iclass 14, count 2 2006.229.09:30:13.01#ibcon#read 6, iclass 14, count 2 2006.229.09:30:13.01#ibcon#end of sib2, iclass 14, count 2 2006.229.09:30:13.01#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:30:13.01#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:30:13.01#ibcon#[27=AT01-04\r\n] 2006.229.09:30:13.01#ibcon#*before write, iclass 14, count 2 2006.229.09:30:13.01#ibcon#enter sib2, iclass 14, count 2 2006.229.09:30:13.01#ibcon#flushed, iclass 14, count 2 2006.229.09:30:13.01#ibcon#about to write, iclass 14, count 2 2006.229.09:30:13.01#ibcon#wrote, iclass 14, count 2 2006.229.09:30:13.01#ibcon#about to read 3, iclass 14, count 2 2006.229.09:30:13.04#ibcon#read 3, iclass 14, count 2 2006.229.09:30:13.04#ibcon#about to read 4, iclass 14, count 2 2006.229.09:30:13.04#ibcon#read 4, iclass 14, count 2 2006.229.09:30:13.04#ibcon#about to read 5, iclass 14, count 2 2006.229.09:30:13.04#ibcon#read 5, iclass 14, count 2 2006.229.09:30:13.04#ibcon#about to read 6, iclass 14, count 2 2006.229.09:30:13.04#ibcon#read 6, iclass 14, count 2 2006.229.09:30:13.04#ibcon#end of sib2, iclass 14, count 2 2006.229.09:30:13.04#ibcon#*after write, iclass 14, count 2 2006.229.09:30:13.04#ibcon#*before return 0, iclass 14, count 2 2006.229.09:30:13.04#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:13.04#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:30:13.04#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:30:13.04#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:13.04#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:13.16#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:13.16#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:13.16#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:30:13.16#ibcon#first serial, iclass 14, count 0 2006.229.09:30:13.16#ibcon#enter sib2, iclass 14, count 0 2006.229.09:30:13.16#ibcon#flushed, iclass 14, count 0 2006.229.09:30:13.16#ibcon#about to write, iclass 14, count 0 2006.229.09:30:13.16#ibcon#wrote, iclass 14, count 0 2006.229.09:30:13.16#ibcon#about to read 3, iclass 14, count 0 2006.229.09:30:13.18#ibcon#read 3, iclass 14, count 0 2006.229.09:30:13.18#ibcon#about to read 4, iclass 14, count 0 2006.229.09:30:13.18#ibcon#read 4, iclass 14, count 0 2006.229.09:30:13.18#ibcon#about to read 5, iclass 14, count 0 2006.229.09:30:13.18#ibcon#read 5, iclass 14, count 0 2006.229.09:30:13.18#ibcon#about to read 6, iclass 14, count 0 2006.229.09:30:13.18#ibcon#read 6, iclass 14, count 0 2006.229.09:30:13.18#ibcon#end of sib2, iclass 14, count 0 2006.229.09:30:13.18#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:30:13.18#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:30:13.18#ibcon#[27=USB\r\n] 2006.229.09:30:13.18#ibcon#*before write, iclass 14, count 0 2006.229.09:30:13.18#ibcon#enter sib2, iclass 14, count 0 2006.229.09:30:13.18#ibcon#flushed, iclass 14, count 0 2006.229.09:30:13.18#ibcon#about to write, iclass 14, count 0 2006.229.09:30:13.18#ibcon#wrote, iclass 14, count 0 2006.229.09:30:13.18#ibcon#about to read 3, iclass 14, count 0 2006.229.09:30:13.21#ibcon#read 3, iclass 14, count 0 2006.229.09:30:13.21#ibcon#about to read 4, iclass 14, count 0 2006.229.09:30:13.21#ibcon#read 4, iclass 14, count 0 2006.229.09:30:13.21#ibcon#about to read 5, iclass 14, count 0 2006.229.09:30:13.21#ibcon#read 5, iclass 14, count 0 2006.229.09:30:13.21#ibcon#about to read 6, iclass 14, count 0 2006.229.09:30:13.21#ibcon#read 6, iclass 14, count 0 2006.229.09:30:13.21#ibcon#end of sib2, iclass 14, count 0 2006.229.09:30:13.21#ibcon#*after write, iclass 14, count 0 2006.229.09:30:13.21#ibcon#*before return 0, iclass 14, count 0 2006.229.09:30:13.21#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:13.21#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:30:13.21#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:30:13.21#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:30:13.21$vck44/vblo=2,634.99 2006.229.09:30:13.21#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.09:30:13.21#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.09:30:13.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:13.21#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:13.21#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:13.21#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:13.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:30:13.21#ibcon#first serial, iclass 16, count 0 2006.229.09:30:13.21#ibcon#enter sib2, iclass 16, count 0 2006.229.09:30:13.21#ibcon#flushed, iclass 16, count 0 2006.229.09:30:13.21#ibcon#about to write, iclass 16, count 0 2006.229.09:30:13.21#ibcon#wrote, iclass 16, count 0 2006.229.09:30:13.21#ibcon#about to read 3, iclass 16, count 0 2006.229.09:30:13.23#ibcon#read 3, iclass 16, count 0 2006.229.09:30:13.23#ibcon#about to read 4, iclass 16, count 0 2006.229.09:30:13.23#ibcon#read 4, iclass 16, count 0 2006.229.09:30:13.23#ibcon#about to read 5, iclass 16, count 0 2006.229.09:30:13.23#ibcon#read 5, iclass 16, count 0 2006.229.09:30:13.23#ibcon#about to read 6, iclass 16, count 0 2006.229.09:30:13.23#ibcon#read 6, iclass 16, count 0 2006.229.09:30:13.23#ibcon#end of sib2, iclass 16, count 0 2006.229.09:30:13.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:30:13.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:30:13.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:30:13.23#ibcon#*before write, iclass 16, count 0 2006.229.09:30:13.23#ibcon#enter sib2, iclass 16, count 0 2006.229.09:30:13.23#ibcon#flushed, iclass 16, count 0 2006.229.09:30:13.23#ibcon#about to write, iclass 16, count 0 2006.229.09:30:13.23#ibcon#wrote, iclass 16, count 0 2006.229.09:30:13.23#ibcon#about to read 3, iclass 16, count 0 2006.229.09:30:13.27#ibcon#read 3, iclass 16, count 0 2006.229.09:30:13.27#ibcon#about to read 4, iclass 16, count 0 2006.229.09:30:13.27#ibcon#read 4, iclass 16, count 0 2006.229.09:30:13.27#ibcon#about to read 5, iclass 16, count 0 2006.229.09:30:13.27#ibcon#read 5, iclass 16, count 0 2006.229.09:30:13.27#ibcon#about to read 6, iclass 16, count 0 2006.229.09:30:13.27#ibcon#read 6, iclass 16, count 0 2006.229.09:30:13.27#ibcon#end of sib2, iclass 16, count 0 2006.229.09:30:13.27#ibcon#*after write, iclass 16, count 0 2006.229.09:30:13.27#ibcon#*before return 0, iclass 16, count 0 2006.229.09:30:13.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:13.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:30:13.27#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:30:13.27#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:30:13.27$vck44/vb=2,4 2006.229.09:30:13.27#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.09:30:13.27#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.09:30:13.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:13.27#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:13.33#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:13.33#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:13.33#ibcon#enter wrdev, iclass 18, count 2 2006.229.09:30:13.33#ibcon#first serial, iclass 18, count 2 2006.229.09:30:13.33#ibcon#enter sib2, iclass 18, count 2 2006.229.09:30:13.33#ibcon#flushed, iclass 18, count 2 2006.229.09:30:13.33#ibcon#about to write, iclass 18, count 2 2006.229.09:30:13.33#ibcon#wrote, iclass 18, count 2 2006.229.09:30:13.33#ibcon#about to read 3, iclass 18, count 2 2006.229.09:30:13.35#ibcon#read 3, iclass 18, count 2 2006.229.09:30:13.35#ibcon#about to read 4, iclass 18, count 2 2006.229.09:30:13.35#ibcon#read 4, iclass 18, count 2 2006.229.09:30:13.35#ibcon#about to read 5, iclass 18, count 2 2006.229.09:30:13.35#ibcon#read 5, iclass 18, count 2 2006.229.09:30:13.35#ibcon#about to read 6, iclass 18, count 2 2006.229.09:30:13.35#ibcon#read 6, iclass 18, count 2 2006.229.09:30:13.35#ibcon#end of sib2, iclass 18, count 2 2006.229.09:30:13.35#ibcon#*mode == 0, iclass 18, count 2 2006.229.09:30:13.35#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.09:30:13.35#ibcon#[27=AT02-04\r\n] 2006.229.09:30:13.35#ibcon#*before write, iclass 18, count 2 2006.229.09:30:13.35#ibcon#enter sib2, iclass 18, count 2 2006.229.09:30:13.35#ibcon#flushed, iclass 18, count 2 2006.229.09:30:13.35#ibcon#about to write, iclass 18, count 2 2006.229.09:30:13.35#ibcon#wrote, iclass 18, count 2 2006.229.09:30:13.35#ibcon#about to read 3, iclass 18, count 2 2006.229.09:30:13.38#ibcon#read 3, iclass 18, count 2 2006.229.09:30:13.38#ibcon#about to read 4, iclass 18, count 2 2006.229.09:30:13.38#ibcon#read 4, iclass 18, count 2 2006.229.09:30:13.38#ibcon#about to read 5, iclass 18, count 2 2006.229.09:30:13.38#ibcon#read 5, iclass 18, count 2 2006.229.09:30:13.38#ibcon#about to read 6, iclass 18, count 2 2006.229.09:30:13.38#ibcon#read 6, iclass 18, count 2 2006.229.09:30:13.38#ibcon#end of sib2, iclass 18, count 2 2006.229.09:30:13.38#ibcon#*after write, iclass 18, count 2 2006.229.09:30:13.38#ibcon#*before return 0, iclass 18, count 2 2006.229.09:30:13.38#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:13.38#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:30:13.38#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.09:30:13.38#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:13.38#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:13.50#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:13.50#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:13.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:30:13.50#ibcon#first serial, iclass 18, count 0 2006.229.09:30:13.50#ibcon#enter sib2, iclass 18, count 0 2006.229.09:30:13.50#ibcon#flushed, iclass 18, count 0 2006.229.09:30:13.50#ibcon#about to write, iclass 18, count 0 2006.229.09:30:13.50#ibcon#wrote, iclass 18, count 0 2006.229.09:30:13.50#ibcon#about to read 3, iclass 18, count 0 2006.229.09:30:13.52#ibcon#read 3, iclass 18, count 0 2006.229.09:30:13.52#ibcon#about to read 4, iclass 18, count 0 2006.229.09:30:13.52#ibcon#read 4, iclass 18, count 0 2006.229.09:30:13.52#ibcon#about to read 5, iclass 18, count 0 2006.229.09:30:13.52#ibcon#read 5, iclass 18, count 0 2006.229.09:30:13.52#ibcon#about to read 6, iclass 18, count 0 2006.229.09:30:13.52#ibcon#read 6, iclass 18, count 0 2006.229.09:30:13.52#ibcon#end of sib2, iclass 18, count 0 2006.229.09:30:13.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:30:13.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:30:13.52#ibcon#[27=USB\r\n] 2006.229.09:30:13.52#ibcon#*before write, iclass 18, count 0 2006.229.09:30:13.52#ibcon#enter sib2, iclass 18, count 0 2006.229.09:30:13.52#ibcon#flushed, iclass 18, count 0 2006.229.09:30:13.52#ibcon#about to write, iclass 18, count 0 2006.229.09:30:13.52#ibcon#wrote, iclass 18, count 0 2006.229.09:30:13.52#ibcon#about to read 3, iclass 18, count 0 2006.229.09:30:13.55#ibcon#read 3, iclass 18, count 0 2006.229.09:30:13.55#ibcon#about to read 4, iclass 18, count 0 2006.229.09:30:13.55#ibcon#read 4, iclass 18, count 0 2006.229.09:30:13.55#ibcon#about to read 5, iclass 18, count 0 2006.229.09:30:13.55#ibcon#read 5, iclass 18, count 0 2006.229.09:30:13.55#ibcon#about to read 6, iclass 18, count 0 2006.229.09:30:13.55#ibcon#read 6, iclass 18, count 0 2006.229.09:30:13.55#ibcon#end of sib2, iclass 18, count 0 2006.229.09:30:13.55#ibcon#*after write, iclass 18, count 0 2006.229.09:30:13.55#ibcon#*before return 0, iclass 18, count 0 2006.229.09:30:13.55#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:13.55#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:30:13.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:30:13.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:30:13.55$vck44/vblo=3,649.99 2006.229.09:30:13.55#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:30:13.55#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:30:13.55#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:13.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:13.55#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:13.55#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:13.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:30:13.55#ibcon#first serial, iclass 20, count 0 2006.229.09:30:13.55#ibcon#enter sib2, iclass 20, count 0 2006.229.09:30:13.55#ibcon#flushed, iclass 20, count 0 2006.229.09:30:13.55#ibcon#about to write, iclass 20, count 0 2006.229.09:30:13.55#ibcon#wrote, iclass 20, count 0 2006.229.09:30:13.55#ibcon#about to read 3, iclass 20, count 0 2006.229.09:30:13.57#ibcon#read 3, iclass 20, count 0 2006.229.09:30:13.57#ibcon#about to read 4, iclass 20, count 0 2006.229.09:30:13.57#ibcon#read 4, iclass 20, count 0 2006.229.09:30:13.57#ibcon#about to read 5, iclass 20, count 0 2006.229.09:30:13.57#ibcon#read 5, iclass 20, count 0 2006.229.09:30:13.57#ibcon#about to read 6, iclass 20, count 0 2006.229.09:30:13.57#ibcon#read 6, iclass 20, count 0 2006.229.09:30:13.57#ibcon#end of sib2, iclass 20, count 0 2006.229.09:30:13.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:30:13.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:30:13.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:30:13.57#ibcon#*before write, iclass 20, count 0 2006.229.09:30:13.57#ibcon#enter sib2, iclass 20, count 0 2006.229.09:30:13.57#ibcon#flushed, iclass 20, count 0 2006.229.09:30:13.57#ibcon#about to write, iclass 20, count 0 2006.229.09:30:13.57#ibcon#wrote, iclass 20, count 0 2006.229.09:30:13.57#ibcon#about to read 3, iclass 20, count 0 2006.229.09:30:13.61#ibcon#read 3, iclass 20, count 0 2006.229.09:30:13.61#ibcon#about to read 4, iclass 20, count 0 2006.229.09:30:13.61#ibcon#read 4, iclass 20, count 0 2006.229.09:30:13.61#ibcon#about to read 5, iclass 20, count 0 2006.229.09:30:13.61#ibcon#read 5, iclass 20, count 0 2006.229.09:30:13.61#ibcon#about to read 6, iclass 20, count 0 2006.229.09:30:13.61#ibcon#read 6, iclass 20, count 0 2006.229.09:30:13.61#ibcon#end of sib2, iclass 20, count 0 2006.229.09:30:13.61#ibcon#*after write, iclass 20, count 0 2006.229.09:30:13.61#ibcon#*before return 0, iclass 20, count 0 2006.229.09:30:13.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:13.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:30:13.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:30:13.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:30:13.61$vck44/vb=3,4 2006.229.09:30:13.61#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.09:30:13.61#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.09:30:13.61#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:13.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:13.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:13.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:13.67#ibcon#enter wrdev, iclass 22, count 2 2006.229.09:30:13.67#ibcon#first serial, iclass 22, count 2 2006.229.09:30:13.67#ibcon#enter sib2, iclass 22, count 2 2006.229.09:30:13.67#ibcon#flushed, iclass 22, count 2 2006.229.09:30:13.67#ibcon#about to write, iclass 22, count 2 2006.229.09:30:13.67#ibcon#wrote, iclass 22, count 2 2006.229.09:30:13.67#ibcon#about to read 3, iclass 22, count 2 2006.229.09:30:13.69#ibcon#read 3, iclass 22, count 2 2006.229.09:30:13.69#ibcon#about to read 4, iclass 22, count 2 2006.229.09:30:13.69#ibcon#read 4, iclass 22, count 2 2006.229.09:30:13.69#ibcon#about to read 5, iclass 22, count 2 2006.229.09:30:13.69#ibcon#read 5, iclass 22, count 2 2006.229.09:30:13.69#ibcon#about to read 6, iclass 22, count 2 2006.229.09:30:13.69#ibcon#read 6, iclass 22, count 2 2006.229.09:30:13.69#ibcon#end of sib2, iclass 22, count 2 2006.229.09:30:13.69#ibcon#*mode == 0, iclass 22, count 2 2006.229.09:30:13.69#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.09:30:13.69#ibcon#[27=AT03-04\r\n] 2006.229.09:30:13.69#ibcon#*before write, iclass 22, count 2 2006.229.09:30:13.69#ibcon#enter sib2, iclass 22, count 2 2006.229.09:30:13.69#ibcon#flushed, iclass 22, count 2 2006.229.09:30:13.69#ibcon#about to write, iclass 22, count 2 2006.229.09:30:13.69#ibcon#wrote, iclass 22, count 2 2006.229.09:30:13.69#ibcon#about to read 3, iclass 22, count 2 2006.229.09:30:13.72#ibcon#read 3, iclass 22, count 2 2006.229.09:30:13.72#ibcon#about to read 4, iclass 22, count 2 2006.229.09:30:13.72#ibcon#read 4, iclass 22, count 2 2006.229.09:30:13.72#ibcon#about to read 5, iclass 22, count 2 2006.229.09:30:13.72#ibcon#read 5, iclass 22, count 2 2006.229.09:30:13.72#ibcon#about to read 6, iclass 22, count 2 2006.229.09:30:13.72#ibcon#read 6, iclass 22, count 2 2006.229.09:30:13.72#ibcon#end of sib2, iclass 22, count 2 2006.229.09:30:13.72#ibcon#*after write, iclass 22, count 2 2006.229.09:30:13.72#ibcon#*before return 0, iclass 22, count 2 2006.229.09:30:13.72#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:13.72#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:30:13.72#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.09:30:13.72#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:13.72#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:13.84#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:13.84#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:13.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:30:13.84#ibcon#first serial, iclass 22, count 0 2006.229.09:30:13.84#ibcon#enter sib2, iclass 22, count 0 2006.229.09:30:13.84#ibcon#flushed, iclass 22, count 0 2006.229.09:30:13.84#ibcon#about to write, iclass 22, count 0 2006.229.09:30:13.84#ibcon#wrote, iclass 22, count 0 2006.229.09:30:13.84#ibcon#about to read 3, iclass 22, count 0 2006.229.09:30:13.86#ibcon#read 3, iclass 22, count 0 2006.229.09:30:13.86#ibcon#about to read 4, iclass 22, count 0 2006.229.09:30:13.86#ibcon#read 4, iclass 22, count 0 2006.229.09:30:13.86#ibcon#about to read 5, iclass 22, count 0 2006.229.09:30:13.86#ibcon#read 5, iclass 22, count 0 2006.229.09:30:13.86#ibcon#about to read 6, iclass 22, count 0 2006.229.09:30:13.86#ibcon#read 6, iclass 22, count 0 2006.229.09:30:13.86#ibcon#end of sib2, iclass 22, count 0 2006.229.09:30:13.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:30:13.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:30:13.86#ibcon#[27=USB\r\n] 2006.229.09:30:13.86#ibcon#*before write, iclass 22, count 0 2006.229.09:30:13.86#ibcon#enter sib2, iclass 22, count 0 2006.229.09:30:13.86#ibcon#flushed, iclass 22, count 0 2006.229.09:30:13.86#ibcon#about to write, iclass 22, count 0 2006.229.09:30:13.86#ibcon#wrote, iclass 22, count 0 2006.229.09:30:13.86#ibcon#about to read 3, iclass 22, count 0 2006.229.09:30:13.89#ibcon#read 3, iclass 22, count 0 2006.229.09:30:13.89#ibcon#about to read 4, iclass 22, count 0 2006.229.09:30:13.89#ibcon#read 4, iclass 22, count 0 2006.229.09:30:13.89#ibcon#about to read 5, iclass 22, count 0 2006.229.09:30:13.89#ibcon#read 5, iclass 22, count 0 2006.229.09:30:13.89#ibcon#about to read 6, iclass 22, count 0 2006.229.09:30:13.89#ibcon#read 6, iclass 22, count 0 2006.229.09:30:13.89#ibcon#end of sib2, iclass 22, count 0 2006.229.09:30:13.89#ibcon#*after write, iclass 22, count 0 2006.229.09:30:13.89#ibcon#*before return 0, iclass 22, count 0 2006.229.09:30:13.89#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:13.89#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:30:13.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:30:13.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:30:13.89$vck44/vblo=4,679.99 2006.229.09:30:13.89#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:30:13.89#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:30:13.89#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:13.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:13.89#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:13.89#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:13.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:30:13.89#ibcon#first serial, iclass 24, count 0 2006.229.09:30:13.89#ibcon#enter sib2, iclass 24, count 0 2006.229.09:30:13.89#ibcon#flushed, iclass 24, count 0 2006.229.09:30:13.89#ibcon#about to write, iclass 24, count 0 2006.229.09:30:13.89#ibcon#wrote, iclass 24, count 0 2006.229.09:30:13.89#ibcon#about to read 3, iclass 24, count 0 2006.229.09:30:13.91#ibcon#read 3, iclass 24, count 0 2006.229.09:30:13.91#ibcon#about to read 4, iclass 24, count 0 2006.229.09:30:13.91#ibcon#read 4, iclass 24, count 0 2006.229.09:30:13.91#ibcon#about to read 5, iclass 24, count 0 2006.229.09:30:13.91#ibcon#read 5, iclass 24, count 0 2006.229.09:30:13.91#ibcon#about to read 6, iclass 24, count 0 2006.229.09:30:13.91#ibcon#read 6, iclass 24, count 0 2006.229.09:30:13.91#ibcon#end of sib2, iclass 24, count 0 2006.229.09:30:13.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:30:13.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:30:13.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:30:13.91#ibcon#*before write, iclass 24, count 0 2006.229.09:30:13.91#ibcon#enter sib2, iclass 24, count 0 2006.229.09:30:13.91#ibcon#flushed, iclass 24, count 0 2006.229.09:30:13.91#ibcon#about to write, iclass 24, count 0 2006.229.09:30:13.91#ibcon#wrote, iclass 24, count 0 2006.229.09:30:13.91#ibcon#about to read 3, iclass 24, count 0 2006.229.09:30:13.95#ibcon#read 3, iclass 24, count 0 2006.229.09:30:13.95#ibcon#about to read 4, iclass 24, count 0 2006.229.09:30:13.95#ibcon#read 4, iclass 24, count 0 2006.229.09:30:13.95#ibcon#about to read 5, iclass 24, count 0 2006.229.09:30:13.95#ibcon#read 5, iclass 24, count 0 2006.229.09:30:13.95#ibcon#about to read 6, iclass 24, count 0 2006.229.09:30:13.95#ibcon#read 6, iclass 24, count 0 2006.229.09:30:13.95#ibcon#end of sib2, iclass 24, count 0 2006.229.09:30:13.95#ibcon#*after write, iclass 24, count 0 2006.229.09:30:13.95#ibcon#*before return 0, iclass 24, count 0 2006.229.09:30:13.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:13.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:30:13.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:30:13.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:30:13.95$vck44/vb=4,4 2006.229.09:30:13.95#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.09:30:13.95#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.09:30:13.95#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:13.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:14.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:14.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:14.01#ibcon#enter wrdev, iclass 26, count 2 2006.229.09:30:14.01#ibcon#first serial, iclass 26, count 2 2006.229.09:30:14.01#ibcon#enter sib2, iclass 26, count 2 2006.229.09:30:14.01#ibcon#flushed, iclass 26, count 2 2006.229.09:30:14.01#ibcon#about to write, iclass 26, count 2 2006.229.09:30:14.01#ibcon#wrote, iclass 26, count 2 2006.229.09:30:14.01#ibcon#about to read 3, iclass 26, count 2 2006.229.09:30:14.03#ibcon#read 3, iclass 26, count 2 2006.229.09:30:14.03#ibcon#about to read 4, iclass 26, count 2 2006.229.09:30:14.03#ibcon#read 4, iclass 26, count 2 2006.229.09:30:14.03#ibcon#about to read 5, iclass 26, count 2 2006.229.09:30:14.03#ibcon#read 5, iclass 26, count 2 2006.229.09:30:14.03#ibcon#about to read 6, iclass 26, count 2 2006.229.09:30:14.03#ibcon#read 6, iclass 26, count 2 2006.229.09:30:14.03#ibcon#end of sib2, iclass 26, count 2 2006.229.09:30:14.03#ibcon#*mode == 0, iclass 26, count 2 2006.229.09:30:14.03#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.09:30:14.03#ibcon#[27=AT04-04\r\n] 2006.229.09:30:14.03#ibcon#*before write, iclass 26, count 2 2006.229.09:30:14.03#ibcon#enter sib2, iclass 26, count 2 2006.229.09:30:14.03#ibcon#flushed, iclass 26, count 2 2006.229.09:30:14.03#ibcon#about to write, iclass 26, count 2 2006.229.09:30:14.03#ibcon#wrote, iclass 26, count 2 2006.229.09:30:14.03#ibcon#about to read 3, iclass 26, count 2 2006.229.09:30:14.06#ibcon#read 3, iclass 26, count 2 2006.229.09:30:14.06#ibcon#about to read 4, iclass 26, count 2 2006.229.09:30:14.06#ibcon#read 4, iclass 26, count 2 2006.229.09:30:14.06#ibcon#about to read 5, iclass 26, count 2 2006.229.09:30:14.06#ibcon#read 5, iclass 26, count 2 2006.229.09:30:14.06#ibcon#about to read 6, iclass 26, count 2 2006.229.09:30:14.06#ibcon#read 6, iclass 26, count 2 2006.229.09:30:14.06#ibcon#end of sib2, iclass 26, count 2 2006.229.09:30:14.06#ibcon#*after write, iclass 26, count 2 2006.229.09:30:14.06#ibcon#*before return 0, iclass 26, count 2 2006.229.09:30:14.06#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:14.06#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:30:14.06#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.09:30:14.06#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:14.06#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:14.18#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:14.18#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:14.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:30:14.18#ibcon#first serial, iclass 26, count 0 2006.229.09:30:14.18#ibcon#enter sib2, iclass 26, count 0 2006.229.09:30:14.18#ibcon#flushed, iclass 26, count 0 2006.229.09:30:14.18#ibcon#about to write, iclass 26, count 0 2006.229.09:30:14.18#ibcon#wrote, iclass 26, count 0 2006.229.09:30:14.18#ibcon#about to read 3, iclass 26, count 0 2006.229.09:30:14.20#ibcon#read 3, iclass 26, count 0 2006.229.09:30:14.20#ibcon#about to read 4, iclass 26, count 0 2006.229.09:30:14.20#ibcon#read 4, iclass 26, count 0 2006.229.09:30:14.20#ibcon#about to read 5, iclass 26, count 0 2006.229.09:30:14.20#ibcon#read 5, iclass 26, count 0 2006.229.09:30:14.20#ibcon#about to read 6, iclass 26, count 0 2006.229.09:30:14.20#ibcon#read 6, iclass 26, count 0 2006.229.09:30:14.20#ibcon#end of sib2, iclass 26, count 0 2006.229.09:30:14.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:30:14.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:30:14.20#ibcon#[27=USB\r\n] 2006.229.09:30:14.20#ibcon#*before write, iclass 26, count 0 2006.229.09:30:14.20#ibcon#enter sib2, iclass 26, count 0 2006.229.09:30:14.20#ibcon#flushed, iclass 26, count 0 2006.229.09:30:14.20#ibcon#about to write, iclass 26, count 0 2006.229.09:30:14.20#ibcon#wrote, iclass 26, count 0 2006.229.09:30:14.20#ibcon#about to read 3, iclass 26, count 0 2006.229.09:30:14.23#ibcon#read 3, iclass 26, count 0 2006.229.09:30:14.23#ibcon#about to read 4, iclass 26, count 0 2006.229.09:30:14.23#ibcon#read 4, iclass 26, count 0 2006.229.09:30:14.23#ibcon#about to read 5, iclass 26, count 0 2006.229.09:30:14.23#ibcon#read 5, iclass 26, count 0 2006.229.09:30:14.23#ibcon#about to read 6, iclass 26, count 0 2006.229.09:30:14.23#ibcon#read 6, iclass 26, count 0 2006.229.09:30:14.23#ibcon#end of sib2, iclass 26, count 0 2006.229.09:30:14.23#ibcon#*after write, iclass 26, count 0 2006.229.09:30:14.23#ibcon#*before return 0, iclass 26, count 0 2006.229.09:30:14.23#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:14.23#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:30:14.23#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:30:14.23#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:30:14.23$vck44/vblo=5,709.99 2006.229.09:30:14.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.09:30:14.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.09:30:14.23#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:14.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:30:14.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:30:14.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:30:14.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:30:14.23#ibcon#first serial, iclass 28, count 0 2006.229.09:30:14.23#ibcon#enter sib2, iclass 28, count 0 2006.229.09:30:14.23#ibcon#flushed, iclass 28, count 0 2006.229.09:30:14.23#ibcon#about to write, iclass 28, count 0 2006.229.09:30:14.23#ibcon#wrote, iclass 28, count 0 2006.229.09:30:14.23#ibcon#about to read 3, iclass 28, count 0 2006.229.09:30:14.25#ibcon#read 3, iclass 28, count 0 2006.229.09:30:14.25#ibcon#about to read 4, iclass 28, count 0 2006.229.09:30:14.25#ibcon#read 4, iclass 28, count 0 2006.229.09:30:14.25#ibcon#about to read 5, iclass 28, count 0 2006.229.09:30:14.25#ibcon#read 5, iclass 28, count 0 2006.229.09:30:14.25#ibcon#about to read 6, iclass 28, count 0 2006.229.09:30:14.25#ibcon#read 6, iclass 28, count 0 2006.229.09:30:14.25#ibcon#end of sib2, iclass 28, count 0 2006.229.09:30:14.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:30:14.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:30:14.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:30:14.25#ibcon#*before write, iclass 28, count 0 2006.229.09:30:14.25#ibcon#enter sib2, iclass 28, count 0 2006.229.09:30:14.25#ibcon#flushed, iclass 28, count 0 2006.229.09:30:14.25#ibcon#about to write, iclass 28, count 0 2006.229.09:30:14.25#ibcon#wrote, iclass 28, count 0 2006.229.09:30:14.25#ibcon#about to read 3, iclass 28, count 0 2006.229.09:30:14.29#ibcon#read 3, iclass 28, count 0 2006.229.09:30:14.29#ibcon#about to read 4, iclass 28, count 0 2006.229.09:30:14.29#ibcon#read 4, iclass 28, count 0 2006.229.09:30:14.29#ibcon#about to read 5, iclass 28, count 0 2006.229.09:30:14.29#ibcon#read 5, iclass 28, count 0 2006.229.09:30:14.29#ibcon#about to read 6, iclass 28, count 0 2006.229.09:30:14.29#ibcon#read 6, iclass 28, count 0 2006.229.09:30:14.29#ibcon#end of sib2, iclass 28, count 0 2006.229.09:30:14.29#ibcon#*after write, iclass 28, count 0 2006.229.09:30:14.29#ibcon#*before return 0, iclass 28, count 0 2006.229.09:30:14.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:30:14.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:30:14.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:30:14.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:30:14.29$vck44/vb=5,4 2006.229.09:30:14.29#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.09:30:14.29#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.09:30:14.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:14.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:30:14.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:30:14.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:30:14.35#ibcon#enter wrdev, iclass 30, count 2 2006.229.09:30:14.35#ibcon#first serial, iclass 30, count 2 2006.229.09:30:14.35#ibcon#enter sib2, iclass 30, count 2 2006.229.09:30:14.35#ibcon#flushed, iclass 30, count 2 2006.229.09:30:14.35#ibcon#about to write, iclass 30, count 2 2006.229.09:30:14.35#ibcon#wrote, iclass 30, count 2 2006.229.09:30:14.35#ibcon#about to read 3, iclass 30, count 2 2006.229.09:30:14.37#ibcon#read 3, iclass 30, count 2 2006.229.09:30:14.37#ibcon#about to read 4, iclass 30, count 2 2006.229.09:30:14.37#ibcon#read 4, iclass 30, count 2 2006.229.09:30:14.37#ibcon#about to read 5, iclass 30, count 2 2006.229.09:30:14.37#ibcon#read 5, iclass 30, count 2 2006.229.09:30:14.37#ibcon#about to read 6, iclass 30, count 2 2006.229.09:30:14.37#ibcon#read 6, iclass 30, count 2 2006.229.09:30:14.37#ibcon#end of sib2, iclass 30, count 2 2006.229.09:30:14.37#ibcon#*mode == 0, iclass 30, count 2 2006.229.09:30:14.37#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.09:30:14.37#ibcon#[27=AT05-04\r\n] 2006.229.09:30:14.37#ibcon#*before write, iclass 30, count 2 2006.229.09:30:14.37#ibcon#enter sib2, iclass 30, count 2 2006.229.09:30:14.37#ibcon#flushed, iclass 30, count 2 2006.229.09:30:14.37#ibcon#about to write, iclass 30, count 2 2006.229.09:30:14.37#ibcon#wrote, iclass 30, count 2 2006.229.09:30:14.37#ibcon#about to read 3, iclass 30, count 2 2006.229.09:30:14.40#ibcon#read 3, iclass 30, count 2 2006.229.09:30:14.40#ibcon#about to read 4, iclass 30, count 2 2006.229.09:30:14.40#ibcon#read 4, iclass 30, count 2 2006.229.09:30:14.40#ibcon#about to read 5, iclass 30, count 2 2006.229.09:30:14.40#ibcon#read 5, iclass 30, count 2 2006.229.09:30:14.40#ibcon#about to read 6, iclass 30, count 2 2006.229.09:30:14.40#ibcon#read 6, iclass 30, count 2 2006.229.09:30:14.40#ibcon#end of sib2, iclass 30, count 2 2006.229.09:30:14.40#ibcon#*after write, iclass 30, count 2 2006.229.09:30:14.40#ibcon#*before return 0, iclass 30, count 2 2006.229.09:30:14.40#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:30:14.40#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:30:14.40#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.09:30:14.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:14.40#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:30:14.52#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:30:14.52#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:30:14.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:30:14.52#ibcon#first serial, iclass 30, count 0 2006.229.09:30:14.52#ibcon#enter sib2, iclass 30, count 0 2006.229.09:30:14.52#ibcon#flushed, iclass 30, count 0 2006.229.09:30:14.52#ibcon#about to write, iclass 30, count 0 2006.229.09:30:14.52#ibcon#wrote, iclass 30, count 0 2006.229.09:30:14.52#ibcon#about to read 3, iclass 30, count 0 2006.229.09:30:14.54#ibcon#read 3, iclass 30, count 0 2006.229.09:30:14.54#ibcon#about to read 4, iclass 30, count 0 2006.229.09:30:14.54#ibcon#read 4, iclass 30, count 0 2006.229.09:30:14.54#ibcon#about to read 5, iclass 30, count 0 2006.229.09:30:14.54#ibcon#read 5, iclass 30, count 0 2006.229.09:30:14.54#ibcon#about to read 6, iclass 30, count 0 2006.229.09:30:14.54#ibcon#read 6, iclass 30, count 0 2006.229.09:30:14.54#ibcon#end of sib2, iclass 30, count 0 2006.229.09:30:14.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:30:14.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:30:14.54#ibcon#[27=USB\r\n] 2006.229.09:30:14.54#ibcon#*before write, iclass 30, count 0 2006.229.09:30:14.54#ibcon#enter sib2, iclass 30, count 0 2006.229.09:30:14.54#ibcon#flushed, iclass 30, count 0 2006.229.09:30:14.54#ibcon#about to write, iclass 30, count 0 2006.229.09:30:14.54#ibcon#wrote, iclass 30, count 0 2006.229.09:30:14.54#ibcon#about to read 3, iclass 30, count 0 2006.229.09:30:14.57#ibcon#read 3, iclass 30, count 0 2006.229.09:30:14.57#ibcon#about to read 4, iclass 30, count 0 2006.229.09:30:14.57#ibcon#read 4, iclass 30, count 0 2006.229.09:30:14.57#ibcon#about to read 5, iclass 30, count 0 2006.229.09:30:14.57#ibcon#read 5, iclass 30, count 0 2006.229.09:30:14.57#ibcon#about to read 6, iclass 30, count 0 2006.229.09:30:14.57#ibcon#read 6, iclass 30, count 0 2006.229.09:30:14.57#ibcon#end of sib2, iclass 30, count 0 2006.229.09:30:14.57#ibcon#*after write, iclass 30, count 0 2006.229.09:30:14.57#ibcon#*before return 0, iclass 30, count 0 2006.229.09:30:14.57#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:30:14.57#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:30:14.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:30:14.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:30:14.57$vck44/vblo=6,719.99 2006.229.09:30:14.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.09:30:14.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.09:30:14.57#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:14.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:14.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:14.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:14.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:30:14.57#ibcon#first serial, iclass 32, count 0 2006.229.09:30:14.57#ibcon#enter sib2, iclass 32, count 0 2006.229.09:30:14.57#ibcon#flushed, iclass 32, count 0 2006.229.09:30:14.57#ibcon#about to write, iclass 32, count 0 2006.229.09:30:14.57#ibcon#wrote, iclass 32, count 0 2006.229.09:30:14.57#ibcon#about to read 3, iclass 32, count 0 2006.229.09:30:14.59#ibcon#read 3, iclass 32, count 0 2006.229.09:30:14.59#ibcon#about to read 4, iclass 32, count 0 2006.229.09:30:14.59#ibcon#read 4, iclass 32, count 0 2006.229.09:30:14.59#ibcon#about to read 5, iclass 32, count 0 2006.229.09:30:14.59#ibcon#read 5, iclass 32, count 0 2006.229.09:30:14.59#ibcon#about to read 6, iclass 32, count 0 2006.229.09:30:14.59#ibcon#read 6, iclass 32, count 0 2006.229.09:30:14.59#ibcon#end of sib2, iclass 32, count 0 2006.229.09:30:14.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:30:14.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:30:14.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:30:14.59#ibcon#*before write, iclass 32, count 0 2006.229.09:30:14.59#ibcon#enter sib2, iclass 32, count 0 2006.229.09:30:14.59#ibcon#flushed, iclass 32, count 0 2006.229.09:30:14.59#ibcon#about to write, iclass 32, count 0 2006.229.09:30:14.59#ibcon#wrote, iclass 32, count 0 2006.229.09:30:14.59#ibcon#about to read 3, iclass 32, count 0 2006.229.09:30:14.63#ibcon#read 3, iclass 32, count 0 2006.229.09:30:14.63#ibcon#about to read 4, iclass 32, count 0 2006.229.09:30:14.63#ibcon#read 4, iclass 32, count 0 2006.229.09:30:14.63#ibcon#about to read 5, iclass 32, count 0 2006.229.09:30:14.63#ibcon#read 5, iclass 32, count 0 2006.229.09:30:14.63#ibcon#about to read 6, iclass 32, count 0 2006.229.09:30:14.63#ibcon#read 6, iclass 32, count 0 2006.229.09:30:14.63#ibcon#end of sib2, iclass 32, count 0 2006.229.09:30:14.63#ibcon#*after write, iclass 32, count 0 2006.229.09:30:14.63#ibcon#*before return 0, iclass 32, count 0 2006.229.09:30:14.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:14.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:30:14.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:30:14.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:30:14.63$vck44/vb=6,4 2006.229.09:30:14.63#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.09:30:14.63#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.09:30:14.63#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:14.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:14.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:14.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:14.69#ibcon#enter wrdev, iclass 34, count 2 2006.229.09:30:14.69#ibcon#first serial, iclass 34, count 2 2006.229.09:30:14.69#ibcon#enter sib2, iclass 34, count 2 2006.229.09:30:14.69#ibcon#flushed, iclass 34, count 2 2006.229.09:30:14.69#ibcon#about to write, iclass 34, count 2 2006.229.09:30:14.69#ibcon#wrote, iclass 34, count 2 2006.229.09:30:14.69#ibcon#about to read 3, iclass 34, count 2 2006.229.09:30:14.71#ibcon#read 3, iclass 34, count 2 2006.229.09:30:14.71#ibcon#about to read 4, iclass 34, count 2 2006.229.09:30:14.71#ibcon#read 4, iclass 34, count 2 2006.229.09:30:14.71#ibcon#about to read 5, iclass 34, count 2 2006.229.09:30:14.71#ibcon#read 5, iclass 34, count 2 2006.229.09:30:14.71#ibcon#about to read 6, iclass 34, count 2 2006.229.09:30:14.71#ibcon#read 6, iclass 34, count 2 2006.229.09:30:14.71#ibcon#end of sib2, iclass 34, count 2 2006.229.09:30:14.71#ibcon#*mode == 0, iclass 34, count 2 2006.229.09:30:14.71#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.09:30:14.71#ibcon#[27=AT06-04\r\n] 2006.229.09:30:14.71#ibcon#*before write, iclass 34, count 2 2006.229.09:30:14.71#ibcon#enter sib2, iclass 34, count 2 2006.229.09:30:14.71#ibcon#flushed, iclass 34, count 2 2006.229.09:30:14.71#ibcon#about to write, iclass 34, count 2 2006.229.09:30:14.71#ibcon#wrote, iclass 34, count 2 2006.229.09:30:14.71#ibcon#about to read 3, iclass 34, count 2 2006.229.09:30:14.74#ibcon#read 3, iclass 34, count 2 2006.229.09:30:14.74#ibcon#about to read 4, iclass 34, count 2 2006.229.09:30:14.74#ibcon#read 4, iclass 34, count 2 2006.229.09:30:14.74#ibcon#about to read 5, iclass 34, count 2 2006.229.09:30:14.74#ibcon#read 5, iclass 34, count 2 2006.229.09:30:14.74#ibcon#about to read 6, iclass 34, count 2 2006.229.09:30:14.74#ibcon#read 6, iclass 34, count 2 2006.229.09:30:14.74#ibcon#end of sib2, iclass 34, count 2 2006.229.09:30:14.74#ibcon#*after write, iclass 34, count 2 2006.229.09:30:14.74#ibcon#*before return 0, iclass 34, count 2 2006.229.09:30:14.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:14.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:30:14.74#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.09:30:14.74#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:14.74#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:14.86#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:14.86#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:14.86#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:30:14.86#ibcon#first serial, iclass 34, count 0 2006.229.09:30:14.86#ibcon#enter sib2, iclass 34, count 0 2006.229.09:30:14.86#ibcon#flushed, iclass 34, count 0 2006.229.09:30:14.86#ibcon#about to write, iclass 34, count 0 2006.229.09:30:14.86#ibcon#wrote, iclass 34, count 0 2006.229.09:30:14.86#ibcon#about to read 3, iclass 34, count 0 2006.229.09:30:14.88#ibcon#read 3, iclass 34, count 0 2006.229.09:30:14.88#ibcon#about to read 4, iclass 34, count 0 2006.229.09:30:14.88#ibcon#read 4, iclass 34, count 0 2006.229.09:30:14.88#ibcon#about to read 5, iclass 34, count 0 2006.229.09:30:14.88#ibcon#read 5, iclass 34, count 0 2006.229.09:30:14.88#ibcon#about to read 6, iclass 34, count 0 2006.229.09:30:14.88#ibcon#read 6, iclass 34, count 0 2006.229.09:30:14.88#ibcon#end of sib2, iclass 34, count 0 2006.229.09:30:14.88#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:30:14.88#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:30:14.88#ibcon#[27=USB\r\n] 2006.229.09:30:14.88#ibcon#*before write, iclass 34, count 0 2006.229.09:30:14.88#ibcon#enter sib2, iclass 34, count 0 2006.229.09:30:14.88#ibcon#flushed, iclass 34, count 0 2006.229.09:30:14.88#ibcon#about to write, iclass 34, count 0 2006.229.09:30:14.88#ibcon#wrote, iclass 34, count 0 2006.229.09:30:14.88#ibcon#about to read 3, iclass 34, count 0 2006.229.09:30:14.91#ibcon#read 3, iclass 34, count 0 2006.229.09:30:14.91#ibcon#about to read 4, iclass 34, count 0 2006.229.09:30:14.91#ibcon#read 4, iclass 34, count 0 2006.229.09:30:14.91#ibcon#about to read 5, iclass 34, count 0 2006.229.09:30:14.91#ibcon#read 5, iclass 34, count 0 2006.229.09:30:14.91#ibcon#about to read 6, iclass 34, count 0 2006.229.09:30:14.91#ibcon#read 6, iclass 34, count 0 2006.229.09:30:14.91#ibcon#end of sib2, iclass 34, count 0 2006.229.09:30:14.91#ibcon#*after write, iclass 34, count 0 2006.229.09:30:14.91#ibcon#*before return 0, iclass 34, count 0 2006.229.09:30:14.91#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:14.91#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:30:14.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:30:14.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:30:14.91$vck44/vblo=7,734.99 2006.229.09:30:14.91#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.09:30:14.91#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.09:30:14.91#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:14.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:14.91#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:14.91#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:14.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:30:14.91#ibcon#first serial, iclass 36, count 0 2006.229.09:30:14.91#ibcon#enter sib2, iclass 36, count 0 2006.229.09:30:14.91#ibcon#flushed, iclass 36, count 0 2006.229.09:30:14.91#ibcon#about to write, iclass 36, count 0 2006.229.09:30:14.91#ibcon#wrote, iclass 36, count 0 2006.229.09:30:14.91#ibcon#about to read 3, iclass 36, count 0 2006.229.09:30:14.93#ibcon#read 3, iclass 36, count 0 2006.229.09:30:14.93#ibcon#about to read 4, iclass 36, count 0 2006.229.09:30:14.93#ibcon#read 4, iclass 36, count 0 2006.229.09:30:14.93#ibcon#about to read 5, iclass 36, count 0 2006.229.09:30:14.93#ibcon#read 5, iclass 36, count 0 2006.229.09:30:14.93#ibcon#about to read 6, iclass 36, count 0 2006.229.09:30:14.93#ibcon#read 6, iclass 36, count 0 2006.229.09:30:14.93#ibcon#end of sib2, iclass 36, count 0 2006.229.09:30:14.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:30:14.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:30:14.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:30:14.93#ibcon#*before write, iclass 36, count 0 2006.229.09:30:14.93#ibcon#enter sib2, iclass 36, count 0 2006.229.09:30:14.93#ibcon#flushed, iclass 36, count 0 2006.229.09:30:14.93#ibcon#about to write, iclass 36, count 0 2006.229.09:30:14.93#ibcon#wrote, iclass 36, count 0 2006.229.09:30:14.93#ibcon#about to read 3, iclass 36, count 0 2006.229.09:30:14.97#ibcon#read 3, iclass 36, count 0 2006.229.09:30:14.97#ibcon#about to read 4, iclass 36, count 0 2006.229.09:30:14.97#ibcon#read 4, iclass 36, count 0 2006.229.09:30:14.97#ibcon#about to read 5, iclass 36, count 0 2006.229.09:30:14.97#ibcon#read 5, iclass 36, count 0 2006.229.09:30:14.97#ibcon#about to read 6, iclass 36, count 0 2006.229.09:30:14.97#ibcon#read 6, iclass 36, count 0 2006.229.09:30:14.97#ibcon#end of sib2, iclass 36, count 0 2006.229.09:30:14.97#ibcon#*after write, iclass 36, count 0 2006.229.09:30:14.97#ibcon#*before return 0, iclass 36, count 0 2006.229.09:30:14.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:14.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:30:14.97#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:30:14.97#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:30:14.97$vck44/vb=7,4 2006.229.09:30:14.97#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.09:30:14.97#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.09:30:14.97#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:14.97#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:15.03#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:15.03#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:15.03#ibcon#enter wrdev, iclass 38, count 2 2006.229.09:30:15.03#ibcon#first serial, iclass 38, count 2 2006.229.09:30:15.03#ibcon#enter sib2, iclass 38, count 2 2006.229.09:30:15.03#ibcon#flushed, iclass 38, count 2 2006.229.09:30:15.03#ibcon#about to write, iclass 38, count 2 2006.229.09:30:15.03#ibcon#wrote, iclass 38, count 2 2006.229.09:30:15.03#ibcon#about to read 3, iclass 38, count 2 2006.229.09:30:15.05#ibcon#read 3, iclass 38, count 2 2006.229.09:30:15.05#ibcon#about to read 4, iclass 38, count 2 2006.229.09:30:15.05#ibcon#read 4, iclass 38, count 2 2006.229.09:30:15.05#ibcon#about to read 5, iclass 38, count 2 2006.229.09:30:15.05#ibcon#read 5, iclass 38, count 2 2006.229.09:30:15.05#ibcon#about to read 6, iclass 38, count 2 2006.229.09:30:15.05#ibcon#read 6, iclass 38, count 2 2006.229.09:30:15.05#ibcon#end of sib2, iclass 38, count 2 2006.229.09:30:15.05#ibcon#*mode == 0, iclass 38, count 2 2006.229.09:30:15.05#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.09:30:15.05#ibcon#[27=AT07-04\r\n] 2006.229.09:30:15.05#ibcon#*before write, iclass 38, count 2 2006.229.09:30:15.05#ibcon#enter sib2, iclass 38, count 2 2006.229.09:30:15.05#ibcon#flushed, iclass 38, count 2 2006.229.09:30:15.05#ibcon#about to write, iclass 38, count 2 2006.229.09:30:15.05#ibcon#wrote, iclass 38, count 2 2006.229.09:30:15.05#ibcon#about to read 3, iclass 38, count 2 2006.229.09:30:15.08#ibcon#read 3, iclass 38, count 2 2006.229.09:30:15.08#ibcon#about to read 4, iclass 38, count 2 2006.229.09:30:15.08#ibcon#read 4, iclass 38, count 2 2006.229.09:30:15.08#ibcon#about to read 5, iclass 38, count 2 2006.229.09:30:15.08#ibcon#read 5, iclass 38, count 2 2006.229.09:30:15.08#ibcon#about to read 6, iclass 38, count 2 2006.229.09:30:15.08#ibcon#read 6, iclass 38, count 2 2006.229.09:30:15.08#ibcon#end of sib2, iclass 38, count 2 2006.229.09:30:15.08#ibcon#*after write, iclass 38, count 2 2006.229.09:30:15.08#ibcon#*before return 0, iclass 38, count 2 2006.229.09:30:15.08#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:15.08#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:30:15.08#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.09:30:15.08#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:15.08#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:15.20#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:15.20#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:15.20#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:30:15.20#ibcon#first serial, iclass 38, count 0 2006.229.09:30:15.20#ibcon#enter sib2, iclass 38, count 0 2006.229.09:30:15.20#ibcon#flushed, iclass 38, count 0 2006.229.09:30:15.20#ibcon#about to write, iclass 38, count 0 2006.229.09:30:15.20#ibcon#wrote, iclass 38, count 0 2006.229.09:30:15.20#ibcon#about to read 3, iclass 38, count 0 2006.229.09:30:15.22#ibcon#read 3, iclass 38, count 0 2006.229.09:30:15.22#ibcon#about to read 4, iclass 38, count 0 2006.229.09:30:15.22#ibcon#read 4, iclass 38, count 0 2006.229.09:30:15.22#ibcon#about to read 5, iclass 38, count 0 2006.229.09:30:15.22#ibcon#read 5, iclass 38, count 0 2006.229.09:30:15.22#ibcon#about to read 6, iclass 38, count 0 2006.229.09:30:15.22#ibcon#read 6, iclass 38, count 0 2006.229.09:30:15.22#ibcon#end of sib2, iclass 38, count 0 2006.229.09:30:15.22#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:30:15.22#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:30:15.22#ibcon#[27=USB\r\n] 2006.229.09:30:15.22#ibcon#*before write, iclass 38, count 0 2006.229.09:30:15.22#ibcon#enter sib2, iclass 38, count 0 2006.229.09:30:15.22#ibcon#flushed, iclass 38, count 0 2006.229.09:30:15.22#ibcon#about to write, iclass 38, count 0 2006.229.09:30:15.22#ibcon#wrote, iclass 38, count 0 2006.229.09:30:15.22#ibcon#about to read 3, iclass 38, count 0 2006.229.09:30:15.25#ibcon#read 3, iclass 38, count 0 2006.229.09:30:15.25#ibcon#about to read 4, iclass 38, count 0 2006.229.09:30:15.25#ibcon#read 4, iclass 38, count 0 2006.229.09:30:15.25#ibcon#about to read 5, iclass 38, count 0 2006.229.09:30:15.25#ibcon#read 5, iclass 38, count 0 2006.229.09:30:15.25#ibcon#about to read 6, iclass 38, count 0 2006.229.09:30:15.25#ibcon#read 6, iclass 38, count 0 2006.229.09:30:15.25#ibcon#end of sib2, iclass 38, count 0 2006.229.09:30:15.25#ibcon#*after write, iclass 38, count 0 2006.229.09:30:15.25#ibcon#*before return 0, iclass 38, count 0 2006.229.09:30:15.25#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:15.25#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:30:15.25#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:30:15.25#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:30:15.25$vck44/vblo=8,744.99 2006.229.09:30:15.25#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:30:15.25#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:30:15.25#ibcon#ireg 17 cls_cnt 0 2006.229.09:30:15.25#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:15.25#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:15.25#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:15.25#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:30:15.25#ibcon#first serial, iclass 40, count 0 2006.229.09:30:15.25#ibcon#enter sib2, iclass 40, count 0 2006.229.09:30:15.25#ibcon#flushed, iclass 40, count 0 2006.229.09:30:15.25#ibcon#about to write, iclass 40, count 0 2006.229.09:30:15.25#ibcon#wrote, iclass 40, count 0 2006.229.09:30:15.25#ibcon#about to read 3, iclass 40, count 0 2006.229.09:30:15.27#ibcon#read 3, iclass 40, count 0 2006.229.09:30:15.27#ibcon#about to read 4, iclass 40, count 0 2006.229.09:30:15.27#ibcon#read 4, iclass 40, count 0 2006.229.09:30:15.27#ibcon#about to read 5, iclass 40, count 0 2006.229.09:30:15.27#ibcon#read 5, iclass 40, count 0 2006.229.09:30:15.27#ibcon#about to read 6, iclass 40, count 0 2006.229.09:30:15.27#ibcon#read 6, iclass 40, count 0 2006.229.09:30:15.27#ibcon#end of sib2, iclass 40, count 0 2006.229.09:30:15.27#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:30:15.27#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:30:15.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:30:15.27#ibcon#*before write, iclass 40, count 0 2006.229.09:30:15.27#ibcon#enter sib2, iclass 40, count 0 2006.229.09:30:15.27#ibcon#flushed, iclass 40, count 0 2006.229.09:30:15.27#ibcon#about to write, iclass 40, count 0 2006.229.09:30:15.27#ibcon#wrote, iclass 40, count 0 2006.229.09:30:15.27#ibcon#about to read 3, iclass 40, count 0 2006.229.09:30:15.31#ibcon#read 3, iclass 40, count 0 2006.229.09:30:15.31#ibcon#about to read 4, iclass 40, count 0 2006.229.09:30:15.31#ibcon#read 4, iclass 40, count 0 2006.229.09:30:15.31#ibcon#about to read 5, iclass 40, count 0 2006.229.09:30:15.31#ibcon#read 5, iclass 40, count 0 2006.229.09:30:15.31#ibcon#about to read 6, iclass 40, count 0 2006.229.09:30:15.31#ibcon#read 6, iclass 40, count 0 2006.229.09:30:15.31#ibcon#end of sib2, iclass 40, count 0 2006.229.09:30:15.31#ibcon#*after write, iclass 40, count 0 2006.229.09:30:15.31#ibcon#*before return 0, iclass 40, count 0 2006.229.09:30:15.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:15.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:30:15.31#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:30:15.31#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:30:15.31$vck44/vb=8,4 2006.229.09:30:15.31#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.09:30:15.31#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.09:30:15.31#ibcon#ireg 11 cls_cnt 2 2006.229.09:30:15.31#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:15.37#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:15.37#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:15.37#ibcon#enter wrdev, iclass 4, count 2 2006.229.09:30:15.37#ibcon#first serial, iclass 4, count 2 2006.229.09:30:15.37#ibcon#enter sib2, iclass 4, count 2 2006.229.09:30:15.37#ibcon#flushed, iclass 4, count 2 2006.229.09:30:15.37#ibcon#about to write, iclass 4, count 2 2006.229.09:30:15.37#ibcon#wrote, iclass 4, count 2 2006.229.09:30:15.37#ibcon#about to read 3, iclass 4, count 2 2006.229.09:30:15.39#ibcon#read 3, iclass 4, count 2 2006.229.09:30:15.39#ibcon#about to read 4, iclass 4, count 2 2006.229.09:30:15.39#ibcon#read 4, iclass 4, count 2 2006.229.09:30:15.39#ibcon#about to read 5, iclass 4, count 2 2006.229.09:30:15.39#ibcon#read 5, iclass 4, count 2 2006.229.09:30:15.39#ibcon#about to read 6, iclass 4, count 2 2006.229.09:30:15.39#ibcon#read 6, iclass 4, count 2 2006.229.09:30:15.39#ibcon#end of sib2, iclass 4, count 2 2006.229.09:30:15.39#ibcon#*mode == 0, iclass 4, count 2 2006.229.09:30:15.39#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.09:30:15.39#ibcon#[27=AT08-04\r\n] 2006.229.09:30:15.39#ibcon#*before write, iclass 4, count 2 2006.229.09:30:15.39#ibcon#enter sib2, iclass 4, count 2 2006.229.09:30:15.39#ibcon#flushed, iclass 4, count 2 2006.229.09:30:15.39#ibcon#about to write, iclass 4, count 2 2006.229.09:30:15.39#ibcon#wrote, iclass 4, count 2 2006.229.09:30:15.39#ibcon#about to read 3, iclass 4, count 2 2006.229.09:30:15.42#ibcon#read 3, iclass 4, count 2 2006.229.09:30:15.42#ibcon#about to read 4, iclass 4, count 2 2006.229.09:30:15.42#ibcon#read 4, iclass 4, count 2 2006.229.09:30:15.42#ibcon#about to read 5, iclass 4, count 2 2006.229.09:30:15.42#ibcon#read 5, iclass 4, count 2 2006.229.09:30:15.42#ibcon#about to read 6, iclass 4, count 2 2006.229.09:30:15.42#ibcon#read 6, iclass 4, count 2 2006.229.09:30:15.42#ibcon#end of sib2, iclass 4, count 2 2006.229.09:30:15.42#ibcon#*after write, iclass 4, count 2 2006.229.09:30:15.42#ibcon#*before return 0, iclass 4, count 2 2006.229.09:30:15.42#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:15.42#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:30:15.42#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.09:30:15.42#ibcon#ireg 7 cls_cnt 0 2006.229.09:30:15.42#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:15.54#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:15.54#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:15.54#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:30:15.54#ibcon#first serial, iclass 4, count 0 2006.229.09:30:15.54#ibcon#enter sib2, iclass 4, count 0 2006.229.09:30:15.54#ibcon#flushed, iclass 4, count 0 2006.229.09:30:15.54#ibcon#about to write, iclass 4, count 0 2006.229.09:30:15.54#ibcon#wrote, iclass 4, count 0 2006.229.09:30:15.54#ibcon#about to read 3, iclass 4, count 0 2006.229.09:30:15.56#ibcon#read 3, iclass 4, count 0 2006.229.09:30:15.56#ibcon#about to read 4, iclass 4, count 0 2006.229.09:30:15.56#ibcon#read 4, iclass 4, count 0 2006.229.09:30:15.56#ibcon#about to read 5, iclass 4, count 0 2006.229.09:30:15.56#ibcon#read 5, iclass 4, count 0 2006.229.09:30:15.56#ibcon#about to read 6, iclass 4, count 0 2006.229.09:30:15.56#ibcon#read 6, iclass 4, count 0 2006.229.09:30:15.56#ibcon#end of sib2, iclass 4, count 0 2006.229.09:30:15.56#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:30:15.56#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:30:15.56#ibcon#[27=USB\r\n] 2006.229.09:30:15.56#ibcon#*before write, iclass 4, count 0 2006.229.09:30:15.56#ibcon#enter sib2, iclass 4, count 0 2006.229.09:30:15.56#ibcon#flushed, iclass 4, count 0 2006.229.09:30:15.56#ibcon#about to write, iclass 4, count 0 2006.229.09:30:15.56#ibcon#wrote, iclass 4, count 0 2006.229.09:30:15.56#ibcon#about to read 3, iclass 4, count 0 2006.229.09:30:15.59#ibcon#read 3, iclass 4, count 0 2006.229.09:30:15.59#ibcon#about to read 4, iclass 4, count 0 2006.229.09:30:15.59#ibcon#read 4, iclass 4, count 0 2006.229.09:30:15.59#ibcon#about to read 5, iclass 4, count 0 2006.229.09:30:15.59#ibcon#read 5, iclass 4, count 0 2006.229.09:30:15.59#ibcon#about to read 6, iclass 4, count 0 2006.229.09:30:15.59#ibcon#read 6, iclass 4, count 0 2006.229.09:30:15.59#ibcon#end of sib2, iclass 4, count 0 2006.229.09:30:15.59#ibcon#*after write, iclass 4, count 0 2006.229.09:30:15.59#ibcon#*before return 0, iclass 4, count 0 2006.229.09:30:15.59#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:15.59#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:30:15.59#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:30:15.59#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:30:15.59$vck44/vabw=wide 2006.229.09:30:15.59#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.09:30:15.59#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.09:30:15.59#ibcon#ireg 8 cls_cnt 0 2006.229.09:30:15.59#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:15.59#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:15.59#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:15.59#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:30:15.59#ibcon#first serial, iclass 6, count 0 2006.229.09:30:15.59#ibcon#enter sib2, iclass 6, count 0 2006.229.09:30:15.59#ibcon#flushed, iclass 6, count 0 2006.229.09:30:15.59#ibcon#about to write, iclass 6, count 0 2006.229.09:30:15.59#ibcon#wrote, iclass 6, count 0 2006.229.09:30:15.59#ibcon#about to read 3, iclass 6, count 0 2006.229.09:30:15.61#ibcon#read 3, iclass 6, count 0 2006.229.09:30:15.61#ibcon#about to read 4, iclass 6, count 0 2006.229.09:30:15.61#ibcon#read 4, iclass 6, count 0 2006.229.09:30:15.61#ibcon#about to read 5, iclass 6, count 0 2006.229.09:30:15.61#ibcon#read 5, iclass 6, count 0 2006.229.09:30:15.61#ibcon#about to read 6, iclass 6, count 0 2006.229.09:30:15.61#ibcon#read 6, iclass 6, count 0 2006.229.09:30:15.61#ibcon#end of sib2, iclass 6, count 0 2006.229.09:30:15.61#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:30:15.61#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:30:15.61#ibcon#[25=BW32\r\n] 2006.229.09:30:15.61#ibcon#*before write, iclass 6, count 0 2006.229.09:30:15.61#ibcon#enter sib2, iclass 6, count 0 2006.229.09:30:15.61#ibcon#flushed, iclass 6, count 0 2006.229.09:30:15.61#ibcon#about to write, iclass 6, count 0 2006.229.09:30:15.61#ibcon#wrote, iclass 6, count 0 2006.229.09:30:15.61#ibcon#about to read 3, iclass 6, count 0 2006.229.09:30:15.64#ibcon#read 3, iclass 6, count 0 2006.229.09:30:15.64#ibcon#about to read 4, iclass 6, count 0 2006.229.09:30:15.64#ibcon#read 4, iclass 6, count 0 2006.229.09:30:15.64#ibcon#about to read 5, iclass 6, count 0 2006.229.09:30:15.64#ibcon#read 5, iclass 6, count 0 2006.229.09:30:15.64#ibcon#about to read 6, iclass 6, count 0 2006.229.09:30:15.64#ibcon#read 6, iclass 6, count 0 2006.229.09:30:15.64#ibcon#end of sib2, iclass 6, count 0 2006.229.09:30:15.64#ibcon#*after write, iclass 6, count 0 2006.229.09:30:15.64#ibcon#*before return 0, iclass 6, count 0 2006.229.09:30:15.64#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:15.64#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:30:15.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:30:15.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:30:15.64$vck44/vbbw=wide 2006.229.09:30:15.64#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.09:30:15.64#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.09:30:15.64#ibcon#ireg 8 cls_cnt 0 2006.229.09:30:15.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:30:15.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:30:15.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:30:15.71#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:30:15.71#ibcon#first serial, iclass 10, count 0 2006.229.09:30:15.71#ibcon#enter sib2, iclass 10, count 0 2006.229.09:30:15.71#ibcon#flushed, iclass 10, count 0 2006.229.09:30:15.71#ibcon#about to write, iclass 10, count 0 2006.229.09:30:15.71#ibcon#wrote, iclass 10, count 0 2006.229.09:30:15.71#ibcon#about to read 3, iclass 10, count 0 2006.229.09:30:15.73#ibcon#read 3, iclass 10, count 0 2006.229.09:30:15.73#ibcon#about to read 4, iclass 10, count 0 2006.229.09:30:15.73#ibcon#read 4, iclass 10, count 0 2006.229.09:30:15.73#ibcon#about to read 5, iclass 10, count 0 2006.229.09:30:15.73#ibcon#read 5, iclass 10, count 0 2006.229.09:30:15.73#ibcon#about to read 6, iclass 10, count 0 2006.229.09:30:15.73#ibcon#read 6, iclass 10, count 0 2006.229.09:30:15.73#ibcon#end of sib2, iclass 10, count 0 2006.229.09:30:15.73#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:30:15.73#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:30:15.73#ibcon#[27=BW32\r\n] 2006.229.09:30:15.73#ibcon#*before write, iclass 10, count 0 2006.229.09:30:15.73#ibcon#enter sib2, iclass 10, count 0 2006.229.09:30:15.73#ibcon#flushed, iclass 10, count 0 2006.229.09:30:15.73#ibcon#about to write, iclass 10, count 0 2006.229.09:30:15.73#ibcon#wrote, iclass 10, count 0 2006.229.09:30:15.73#ibcon#about to read 3, iclass 10, count 0 2006.229.09:30:15.76#ibcon#read 3, iclass 10, count 0 2006.229.09:30:15.76#ibcon#about to read 4, iclass 10, count 0 2006.229.09:30:15.76#ibcon#read 4, iclass 10, count 0 2006.229.09:30:15.76#ibcon#about to read 5, iclass 10, count 0 2006.229.09:30:15.76#ibcon#read 5, iclass 10, count 0 2006.229.09:30:15.76#ibcon#about to read 6, iclass 10, count 0 2006.229.09:30:15.76#ibcon#read 6, iclass 10, count 0 2006.229.09:30:15.76#ibcon#end of sib2, iclass 10, count 0 2006.229.09:30:15.76#ibcon#*after write, iclass 10, count 0 2006.229.09:30:15.76#ibcon#*before return 0, iclass 10, count 0 2006.229.09:30:15.76#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:30:15.76#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:30:15.76#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:30:15.76#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:30:15.76$setupk4/ifdk4 2006.229.09:30:15.76$ifdk4/lo= 2006.229.09:30:15.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:30:15.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:30:15.76$ifdk4/patch= 2006.229.09:30:15.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:30:15.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:30:15.76$setupk4/!*+20s 2006.229.09:30:21.62#abcon#<5=/05 1.8 3.0 28.96 961001.0\r\n> 2006.229.09:30:21.64#abcon#{5=INTERFACE CLEAR} 2006.229.09:30:21.70#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:30:27.13#trakl#Source acquired 2006.229.09:30:29.13#flagr#flagr/antenna,acquired 2006.229.09:30:30.27$setupk4/"tpicd 2006.229.09:30:30.27$setupk4/echo=off 2006.229.09:30:30.27$setupk4/xlog=off 2006.229.09:30:30.27:!2006.229.09:37:16 2006.229.09:37:16.00:preob 2006.229.09:37:16.14/onsource/TRACKING 2006.229.09:37:16.14:!2006.229.09:37:26 2006.229.09:37:26.00:"tape 2006.229.09:37:26.00:"st=record 2006.229.09:37:26.00:data_valid=on 2006.229.09:37:26.00:midob 2006.229.09:37:26.14/onsource/TRACKING 2006.229.09:37:26.14/wx/28.90,1000.9,97 2006.229.09:37:26.26/cable/+6.4015E-03 2006.229.09:37:27.35/va/01,08,usb,yes,33,35 2006.229.09:37:27.35/va/02,07,usb,yes,35,36 2006.229.09:37:27.35/va/03,06,usb,yes,44,46 2006.229.09:37:27.35/va/04,07,usb,yes,36,38 2006.229.09:37:27.35/va/05,04,usb,yes,33,33 2006.229.09:37:27.35/va/06,04,usb,yes,37,36 2006.229.09:37:27.35/va/07,05,usb,yes,32,33 2006.229.09:37:27.35/va/08,06,usb,yes,24,29 2006.229.09:37:27.58/valo/01,524.99,yes,locked 2006.229.09:37:27.58/valo/02,534.99,yes,locked 2006.229.09:37:27.58/valo/03,564.99,yes,locked 2006.229.09:37:27.58/valo/04,624.99,yes,locked 2006.229.09:37:27.58/valo/05,734.99,yes,locked 2006.229.09:37:27.58/valo/06,814.99,yes,locked 2006.229.09:37:27.58/valo/07,864.99,yes,locked 2006.229.09:37:27.58/valo/08,884.99,yes,locked 2006.229.09:37:28.67/vb/01,04,usb,yes,32,29 2006.229.09:37:28.67/vb/02,04,usb,yes,34,34 2006.229.09:37:28.67/vb/03,04,usb,yes,32,34 2006.229.09:37:28.67/vb/04,04,usb,yes,36,35 2006.229.09:37:28.67/vb/05,04,usb,yes,28,30 2006.229.09:37:28.67/vb/06,04,usb,yes,32,28 2006.229.09:37:28.67/vb/07,04,usb,yes,32,32 2006.229.09:37:28.67/vb/08,04,usb,yes,30,33 2006.229.09:37:28.91/vblo/01,629.99,yes,locked 2006.229.09:37:28.91/vblo/02,634.99,yes,locked 2006.229.09:37:28.91/vblo/03,649.99,yes,locked 2006.229.09:37:28.91/vblo/04,679.99,yes,locked 2006.229.09:37:28.91/vblo/05,709.99,yes,locked 2006.229.09:37:28.91/vblo/06,719.99,yes,locked 2006.229.09:37:28.91/vblo/07,734.99,yes,locked 2006.229.09:37:28.91/vblo/08,744.99,yes,locked 2006.229.09:37:29.06/vabw/8 2006.229.09:37:29.21/vbbw/8 2006.229.09:37:29.30/xfe/off,on,12.2 2006.229.09:37:29.67/ifatt/23,28,28,28 2006.229.09:37:30.08/fmout-gps/S +4.59E-07 2006.229.09:37:30.12:!2006.229.09:41:16 2006.229.09:41:16.00:data_valid=off 2006.229.09:41:16.00:"et 2006.229.09:41:16.00:!+3s 2006.229.09:41:19.01:"tape 2006.229.09:41:19.01:postob 2006.229.09:41:19.15/cable/+6.3987E-03 2006.229.09:41:19.15/wx/28.87,1001.0,97 2006.229.09:41:20.08/fmout-gps/S +4.59E-07 2006.229.09:41:20.08:scan_name=229-0944,jd0608,90 2006.229.09:41:20.08:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.09:41:21.14#flagr#flagr/antenna,new-source 2006.229.09:41:21.14:checkk5 2006.229.09:41:21.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:41:21.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:41:22.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:41:22.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:41:23.12/chk_obsdata//k5ts1/T2290937??a.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.09:41:23.51/chk_obsdata//k5ts2/T2290937??b.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.09:41:23.86/chk_obsdata//k5ts3/T2290937??c.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.09:41:24.27/chk_obsdata//k5ts4/T2290937??d.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.09:41:25.07/k5log//k5ts1_log_newline 2006.229.09:41:25.78/k5log//k5ts2_log_newline 2006.229.09:41:26.48/k5log//k5ts3_log_newline 2006.229.09:41:27.18/k5log//k5ts4_log_newline 2006.229.09:41:27.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:41:27.20:setupk4=1 2006.229.09:41:27.20$setupk4/echo=on 2006.229.09:41:27.20$setupk4/pcalon 2006.229.09:41:27.20$pcalon/"no phase cal control is implemented here 2006.229.09:41:27.20$setupk4/"tpicd=stop 2006.229.09:41:27.20$setupk4/"rec=synch_on 2006.229.09:41:27.20$setupk4/"rec_mode=128 2006.229.09:41:27.20$setupk4/!* 2006.229.09:41:27.21$setupk4/recpk4 2006.229.09:41:27.21$recpk4/recpatch= 2006.229.09:41:27.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:41:27.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:41:27.21$setupk4/vck44 2006.229.09:41:27.21$vck44/valo=1,524.99 2006.229.09:41:27.21#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.09:41:27.21#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.09:41:27.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:27.21#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:27.21#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:27.21#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:27.21#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:41:27.21#ibcon#first serial, iclass 27, count 0 2006.229.09:41:27.21#ibcon#enter sib2, iclass 27, count 0 2006.229.09:41:27.21#ibcon#flushed, iclass 27, count 0 2006.229.09:41:27.21#ibcon#about to write, iclass 27, count 0 2006.229.09:41:27.21#ibcon#wrote, iclass 27, count 0 2006.229.09:41:27.21#ibcon#about to read 3, iclass 27, count 0 2006.229.09:41:27.22#ibcon#read 3, iclass 27, count 0 2006.229.09:41:27.22#ibcon#about to read 4, iclass 27, count 0 2006.229.09:41:27.22#ibcon#read 4, iclass 27, count 0 2006.229.09:41:27.22#ibcon#about to read 5, iclass 27, count 0 2006.229.09:41:27.22#ibcon#read 5, iclass 27, count 0 2006.229.09:41:27.22#ibcon#about to read 6, iclass 27, count 0 2006.229.09:41:27.22#ibcon#read 6, iclass 27, count 0 2006.229.09:41:27.22#ibcon#end of sib2, iclass 27, count 0 2006.229.09:41:27.22#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:41:27.22#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:41:27.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:41:27.22#ibcon#*before write, iclass 27, count 0 2006.229.09:41:27.22#ibcon#enter sib2, iclass 27, count 0 2006.229.09:41:27.22#ibcon#flushed, iclass 27, count 0 2006.229.09:41:27.22#ibcon#about to write, iclass 27, count 0 2006.229.09:41:27.22#ibcon#wrote, iclass 27, count 0 2006.229.09:41:27.22#ibcon#about to read 3, iclass 27, count 0 2006.229.09:41:27.27#ibcon#read 3, iclass 27, count 0 2006.229.09:41:27.27#ibcon#about to read 4, iclass 27, count 0 2006.229.09:41:27.27#ibcon#read 4, iclass 27, count 0 2006.229.09:41:27.27#ibcon#about to read 5, iclass 27, count 0 2006.229.09:41:27.27#ibcon#read 5, iclass 27, count 0 2006.229.09:41:27.27#ibcon#about to read 6, iclass 27, count 0 2006.229.09:41:27.27#ibcon#read 6, iclass 27, count 0 2006.229.09:41:27.27#ibcon#end of sib2, iclass 27, count 0 2006.229.09:41:27.27#ibcon#*after write, iclass 27, count 0 2006.229.09:41:27.27#ibcon#*before return 0, iclass 27, count 0 2006.229.09:41:27.27#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:27.27#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:27.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:41:27.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:41:27.27$vck44/va=1,8 2006.229.09:41:27.27#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.09:41:27.27#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.09:41:27.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:27.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:27.27#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:27.27#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:27.27#ibcon#enter wrdev, iclass 29, count 2 2006.229.09:41:27.27#ibcon#first serial, iclass 29, count 2 2006.229.09:41:27.27#ibcon#enter sib2, iclass 29, count 2 2006.229.09:41:27.27#ibcon#flushed, iclass 29, count 2 2006.229.09:41:27.27#ibcon#about to write, iclass 29, count 2 2006.229.09:41:27.27#ibcon#wrote, iclass 29, count 2 2006.229.09:41:27.27#ibcon#about to read 3, iclass 29, count 2 2006.229.09:41:27.29#ibcon#read 3, iclass 29, count 2 2006.229.09:41:27.29#ibcon#about to read 4, iclass 29, count 2 2006.229.09:41:27.29#ibcon#read 4, iclass 29, count 2 2006.229.09:41:27.29#ibcon#about to read 5, iclass 29, count 2 2006.229.09:41:27.29#ibcon#read 5, iclass 29, count 2 2006.229.09:41:27.29#ibcon#about to read 6, iclass 29, count 2 2006.229.09:41:27.29#ibcon#read 6, iclass 29, count 2 2006.229.09:41:27.29#ibcon#end of sib2, iclass 29, count 2 2006.229.09:41:27.29#ibcon#*mode == 0, iclass 29, count 2 2006.229.09:41:27.29#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.09:41:27.29#ibcon#[25=AT01-08\r\n] 2006.229.09:41:27.29#ibcon#*before write, iclass 29, count 2 2006.229.09:41:27.29#ibcon#enter sib2, iclass 29, count 2 2006.229.09:41:27.29#ibcon#flushed, iclass 29, count 2 2006.229.09:41:27.29#ibcon#about to write, iclass 29, count 2 2006.229.09:41:27.29#ibcon#wrote, iclass 29, count 2 2006.229.09:41:27.29#ibcon#about to read 3, iclass 29, count 2 2006.229.09:41:27.32#ibcon#read 3, iclass 29, count 2 2006.229.09:41:27.32#ibcon#about to read 4, iclass 29, count 2 2006.229.09:41:27.32#ibcon#read 4, iclass 29, count 2 2006.229.09:41:27.32#ibcon#about to read 5, iclass 29, count 2 2006.229.09:41:27.32#ibcon#read 5, iclass 29, count 2 2006.229.09:41:27.32#ibcon#about to read 6, iclass 29, count 2 2006.229.09:41:27.32#ibcon#read 6, iclass 29, count 2 2006.229.09:41:27.32#ibcon#end of sib2, iclass 29, count 2 2006.229.09:41:27.32#ibcon#*after write, iclass 29, count 2 2006.229.09:41:27.32#ibcon#*before return 0, iclass 29, count 2 2006.229.09:41:27.32#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:27.32#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:27.32#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.09:41:27.32#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:27.32#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:27.44#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:27.44#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:27.44#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:41:27.44#ibcon#first serial, iclass 29, count 0 2006.229.09:41:27.44#ibcon#enter sib2, iclass 29, count 0 2006.229.09:41:27.44#ibcon#flushed, iclass 29, count 0 2006.229.09:41:27.44#ibcon#about to write, iclass 29, count 0 2006.229.09:41:27.44#ibcon#wrote, iclass 29, count 0 2006.229.09:41:27.44#ibcon#about to read 3, iclass 29, count 0 2006.229.09:41:27.46#ibcon#read 3, iclass 29, count 0 2006.229.09:41:27.46#ibcon#about to read 4, iclass 29, count 0 2006.229.09:41:27.46#ibcon#read 4, iclass 29, count 0 2006.229.09:41:27.46#ibcon#about to read 5, iclass 29, count 0 2006.229.09:41:27.46#ibcon#read 5, iclass 29, count 0 2006.229.09:41:27.46#ibcon#about to read 6, iclass 29, count 0 2006.229.09:41:27.46#ibcon#read 6, iclass 29, count 0 2006.229.09:41:27.46#ibcon#end of sib2, iclass 29, count 0 2006.229.09:41:27.46#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:41:27.46#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:41:27.46#ibcon#[25=USB\r\n] 2006.229.09:41:27.46#ibcon#*before write, iclass 29, count 0 2006.229.09:41:27.46#ibcon#enter sib2, iclass 29, count 0 2006.229.09:41:27.46#ibcon#flushed, iclass 29, count 0 2006.229.09:41:27.46#ibcon#about to write, iclass 29, count 0 2006.229.09:41:27.46#ibcon#wrote, iclass 29, count 0 2006.229.09:41:27.46#ibcon#about to read 3, iclass 29, count 0 2006.229.09:41:27.49#ibcon#read 3, iclass 29, count 0 2006.229.09:41:27.49#ibcon#about to read 4, iclass 29, count 0 2006.229.09:41:27.49#ibcon#read 4, iclass 29, count 0 2006.229.09:41:27.49#ibcon#about to read 5, iclass 29, count 0 2006.229.09:41:27.49#ibcon#read 5, iclass 29, count 0 2006.229.09:41:27.49#ibcon#about to read 6, iclass 29, count 0 2006.229.09:41:27.49#ibcon#read 6, iclass 29, count 0 2006.229.09:41:27.49#ibcon#end of sib2, iclass 29, count 0 2006.229.09:41:27.49#ibcon#*after write, iclass 29, count 0 2006.229.09:41:27.49#ibcon#*before return 0, iclass 29, count 0 2006.229.09:41:27.49#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:27.49#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:27.49#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:41:27.49#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:41:27.49$vck44/valo=2,534.99 2006.229.09:41:27.49#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.09:41:27.49#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.09:41:27.49#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:27.49#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:27.49#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:27.49#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:27.49#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:41:27.49#ibcon#first serial, iclass 31, count 0 2006.229.09:41:27.49#ibcon#enter sib2, iclass 31, count 0 2006.229.09:41:27.49#ibcon#flushed, iclass 31, count 0 2006.229.09:41:27.49#ibcon#about to write, iclass 31, count 0 2006.229.09:41:27.49#ibcon#wrote, iclass 31, count 0 2006.229.09:41:27.49#ibcon#about to read 3, iclass 31, count 0 2006.229.09:41:27.51#ibcon#read 3, iclass 31, count 0 2006.229.09:41:27.51#ibcon#about to read 4, iclass 31, count 0 2006.229.09:41:27.51#ibcon#read 4, iclass 31, count 0 2006.229.09:41:27.51#ibcon#about to read 5, iclass 31, count 0 2006.229.09:41:27.51#ibcon#read 5, iclass 31, count 0 2006.229.09:41:27.51#ibcon#about to read 6, iclass 31, count 0 2006.229.09:41:27.51#ibcon#read 6, iclass 31, count 0 2006.229.09:41:27.51#ibcon#end of sib2, iclass 31, count 0 2006.229.09:41:27.51#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:41:27.51#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:41:27.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:41:27.51#ibcon#*before write, iclass 31, count 0 2006.229.09:41:27.51#ibcon#enter sib2, iclass 31, count 0 2006.229.09:41:27.51#ibcon#flushed, iclass 31, count 0 2006.229.09:41:27.51#ibcon#about to write, iclass 31, count 0 2006.229.09:41:27.51#ibcon#wrote, iclass 31, count 0 2006.229.09:41:27.51#ibcon#about to read 3, iclass 31, count 0 2006.229.09:41:27.55#ibcon#read 3, iclass 31, count 0 2006.229.09:41:27.55#ibcon#about to read 4, iclass 31, count 0 2006.229.09:41:27.55#ibcon#read 4, iclass 31, count 0 2006.229.09:41:27.55#ibcon#about to read 5, iclass 31, count 0 2006.229.09:41:27.55#ibcon#read 5, iclass 31, count 0 2006.229.09:41:27.55#ibcon#about to read 6, iclass 31, count 0 2006.229.09:41:27.55#ibcon#read 6, iclass 31, count 0 2006.229.09:41:27.55#ibcon#end of sib2, iclass 31, count 0 2006.229.09:41:27.55#ibcon#*after write, iclass 31, count 0 2006.229.09:41:27.55#ibcon#*before return 0, iclass 31, count 0 2006.229.09:41:27.55#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:27.55#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:27.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:41:27.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:41:27.55$vck44/va=2,7 2006.229.09:41:27.55#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.09:41:27.55#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.09:41:27.55#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:27.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:27.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:27.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:27.61#ibcon#enter wrdev, iclass 33, count 2 2006.229.09:41:27.61#ibcon#first serial, iclass 33, count 2 2006.229.09:41:27.61#ibcon#enter sib2, iclass 33, count 2 2006.229.09:41:27.61#ibcon#flushed, iclass 33, count 2 2006.229.09:41:27.61#ibcon#about to write, iclass 33, count 2 2006.229.09:41:27.61#ibcon#wrote, iclass 33, count 2 2006.229.09:41:27.61#ibcon#about to read 3, iclass 33, count 2 2006.229.09:41:27.63#ibcon#read 3, iclass 33, count 2 2006.229.09:41:27.63#ibcon#about to read 4, iclass 33, count 2 2006.229.09:41:27.63#ibcon#read 4, iclass 33, count 2 2006.229.09:41:27.63#ibcon#about to read 5, iclass 33, count 2 2006.229.09:41:27.63#ibcon#read 5, iclass 33, count 2 2006.229.09:41:27.63#ibcon#about to read 6, iclass 33, count 2 2006.229.09:41:27.63#ibcon#read 6, iclass 33, count 2 2006.229.09:41:27.63#ibcon#end of sib2, iclass 33, count 2 2006.229.09:41:27.63#ibcon#*mode == 0, iclass 33, count 2 2006.229.09:41:27.63#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.09:41:27.63#ibcon#[25=AT02-07\r\n] 2006.229.09:41:27.63#ibcon#*before write, iclass 33, count 2 2006.229.09:41:27.63#ibcon#enter sib2, iclass 33, count 2 2006.229.09:41:27.63#ibcon#flushed, iclass 33, count 2 2006.229.09:41:27.63#ibcon#about to write, iclass 33, count 2 2006.229.09:41:27.63#ibcon#wrote, iclass 33, count 2 2006.229.09:41:27.63#ibcon#about to read 3, iclass 33, count 2 2006.229.09:41:27.66#ibcon#read 3, iclass 33, count 2 2006.229.09:41:27.66#ibcon#about to read 4, iclass 33, count 2 2006.229.09:41:27.66#ibcon#read 4, iclass 33, count 2 2006.229.09:41:27.66#ibcon#about to read 5, iclass 33, count 2 2006.229.09:41:27.66#ibcon#read 5, iclass 33, count 2 2006.229.09:41:27.66#ibcon#about to read 6, iclass 33, count 2 2006.229.09:41:27.66#ibcon#read 6, iclass 33, count 2 2006.229.09:41:27.66#ibcon#end of sib2, iclass 33, count 2 2006.229.09:41:27.66#ibcon#*after write, iclass 33, count 2 2006.229.09:41:27.66#ibcon#*before return 0, iclass 33, count 2 2006.229.09:41:27.66#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:27.66#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:27.66#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.09:41:27.66#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:27.66#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:27.78#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:27.78#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:27.78#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:41:27.78#ibcon#first serial, iclass 33, count 0 2006.229.09:41:27.78#ibcon#enter sib2, iclass 33, count 0 2006.229.09:41:27.78#ibcon#flushed, iclass 33, count 0 2006.229.09:41:27.78#ibcon#about to write, iclass 33, count 0 2006.229.09:41:27.78#ibcon#wrote, iclass 33, count 0 2006.229.09:41:27.78#ibcon#about to read 3, iclass 33, count 0 2006.229.09:41:27.80#ibcon#read 3, iclass 33, count 0 2006.229.09:41:27.80#ibcon#about to read 4, iclass 33, count 0 2006.229.09:41:27.80#ibcon#read 4, iclass 33, count 0 2006.229.09:41:27.80#ibcon#about to read 5, iclass 33, count 0 2006.229.09:41:27.80#ibcon#read 5, iclass 33, count 0 2006.229.09:41:27.80#ibcon#about to read 6, iclass 33, count 0 2006.229.09:41:27.80#ibcon#read 6, iclass 33, count 0 2006.229.09:41:27.80#ibcon#end of sib2, iclass 33, count 0 2006.229.09:41:27.80#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:41:27.80#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:41:27.80#ibcon#[25=USB\r\n] 2006.229.09:41:27.80#ibcon#*before write, iclass 33, count 0 2006.229.09:41:27.80#ibcon#enter sib2, iclass 33, count 0 2006.229.09:41:27.80#ibcon#flushed, iclass 33, count 0 2006.229.09:41:27.80#ibcon#about to write, iclass 33, count 0 2006.229.09:41:27.80#ibcon#wrote, iclass 33, count 0 2006.229.09:41:27.80#ibcon#about to read 3, iclass 33, count 0 2006.229.09:41:27.83#ibcon#read 3, iclass 33, count 0 2006.229.09:41:27.83#ibcon#about to read 4, iclass 33, count 0 2006.229.09:41:27.83#ibcon#read 4, iclass 33, count 0 2006.229.09:41:27.83#ibcon#about to read 5, iclass 33, count 0 2006.229.09:41:27.83#ibcon#read 5, iclass 33, count 0 2006.229.09:41:27.83#ibcon#about to read 6, iclass 33, count 0 2006.229.09:41:27.83#ibcon#read 6, iclass 33, count 0 2006.229.09:41:27.83#ibcon#end of sib2, iclass 33, count 0 2006.229.09:41:27.83#ibcon#*after write, iclass 33, count 0 2006.229.09:41:27.83#ibcon#*before return 0, iclass 33, count 0 2006.229.09:41:27.83#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:27.83#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:27.83#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:41:27.83#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:41:27.83$vck44/valo=3,564.99 2006.229.09:41:27.83#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.09:41:27.83#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.09:41:27.83#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:27.83#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:27.83#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:27.83#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:27.83#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:41:27.83#ibcon#first serial, iclass 35, count 0 2006.229.09:41:27.83#ibcon#enter sib2, iclass 35, count 0 2006.229.09:41:27.83#ibcon#flushed, iclass 35, count 0 2006.229.09:41:27.83#ibcon#about to write, iclass 35, count 0 2006.229.09:41:27.83#ibcon#wrote, iclass 35, count 0 2006.229.09:41:27.83#ibcon#about to read 3, iclass 35, count 0 2006.229.09:41:27.85#ibcon#read 3, iclass 35, count 0 2006.229.09:41:27.85#ibcon#about to read 4, iclass 35, count 0 2006.229.09:41:27.85#ibcon#read 4, iclass 35, count 0 2006.229.09:41:27.85#ibcon#about to read 5, iclass 35, count 0 2006.229.09:41:27.85#ibcon#read 5, iclass 35, count 0 2006.229.09:41:27.85#ibcon#about to read 6, iclass 35, count 0 2006.229.09:41:27.85#ibcon#read 6, iclass 35, count 0 2006.229.09:41:27.85#ibcon#end of sib2, iclass 35, count 0 2006.229.09:41:27.85#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:41:27.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:41:27.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:41:27.85#ibcon#*before write, iclass 35, count 0 2006.229.09:41:27.85#ibcon#enter sib2, iclass 35, count 0 2006.229.09:41:27.85#ibcon#flushed, iclass 35, count 0 2006.229.09:41:27.85#ibcon#about to write, iclass 35, count 0 2006.229.09:41:27.85#ibcon#wrote, iclass 35, count 0 2006.229.09:41:27.85#ibcon#about to read 3, iclass 35, count 0 2006.229.09:41:27.89#ibcon#read 3, iclass 35, count 0 2006.229.09:41:27.89#ibcon#about to read 4, iclass 35, count 0 2006.229.09:41:27.89#ibcon#read 4, iclass 35, count 0 2006.229.09:41:27.89#ibcon#about to read 5, iclass 35, count 0 2006.229.09:41:27.89#ibcon#read 5, iclass 35, count 0 2006.229.09:41:27.89#ibcon#about to read 6, iclass 35, count 0 2006.229.09:41:27.89#ibcon#read 6, iclass 35, count 0 2006.229.09:41:27.89#ibcon#end of sib2, iclass 35, count 0 2006.229.09:41:27.89#ibcon#*after write, iclass 35, count 0 2006.229.09:41:27.89#ibcon#*before return 0, iclass 35, count 0 2006.229.09:41:27.89#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:27.89#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:27.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:41:27.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:41:27.89$vck44/va=3,6 2006.229.09:41:27.89#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.09:41:27.89#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.09:41:27.89#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:27.89#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:27.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:27.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:27.95#ibcon#enter wrdev, iclass 37, count 2 2006.229.09:41:27.95#ibcon#first serial, iclass 37, count 2 2006.229.09:41:27.95#ibcon#enter sib2, iclass 37, count 2 2006.229.09:41:27.95#ibcon#flushed, iclass 37, count 2 2006.229.09:41:27.95#ibcon#about to write, iclass 37, count 2 2006.229.09:41:27.95#ibcon#wrote, iclass 37, count 2 2006.229.09:41:27.95#ibcon#about to read 3, iclass 37, count 2 2006.229.09:41:27.97#ibcon#read 3, iclass 37, count 2 2006.229.09:41:27.97#ibcon#about to read 4, iclass 37, count 2 2006.229.09:41:27.97#ibcon#read 4, iclass 37, count 2 2006.229.09:41:27.97#ibcon#about to read 5, iclass 37, count 2 2006.229.09:41:27.97#ibcon#read 5, iclass 37, count 2 2006.229.09:41:27.97#ibcon#about to read 6, iclass 37, count 2 2006.229.09:41:27.97#ibcon#read 6, iclass 37, count 2 2006.229.09:41:27.97#ibcon#end of sib2, iclass 37, count 2 2006.229.09:41:27.97#ibcon#*mode == 0, iclass 37, count 2 2006.229.09:41:27.97#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.09:41:27.97#ibcon#[25=AT03-06\r\n] 2006.229.09:41:27.97#ibcon#*before write, iclass 37, count 2 2006.229.09:41:27.97#ibcon#enter sib2, iclass 37, count 2 2006.229.09:41:27.97#ibcon#flushed, iclass 37, count 2 2006.229.09:41:27.97#ibcon#about to write, iclass 37, count 2 2006.229.09:41:27.97#ibcon#wrote, iclass 37, count 2 2006.229.09:41:27.97#ibcon#about to read 3, iclass 37, count 2 2006.229.09:41:28.00#ibcon#read 3, iclass 37, count 2 2006.229.09:41:28.00#ibcon#about to read 4, iclass 37, count 2 2006.229.09:41:28.00#ibcon#read 4, iclass 37, count 2 2006.229.09:41:28.00#ibcon#about to read 5, iclass 37, count 2 2006.229.09:41:28.00#ibcon#read 5, iclass 37, count 2 2006.229.09:41:28.00#ibcon#about to read 6, iclass 37, count 2 2006.229.09:41:28.00#ibcon#read 6, iclass 37, count 2 2006.229.09:41:28.00#ibcon#end of sib2, iclass 37, count 2 2006.229.09:41:28.00#ibcon#*after write, iclass 37, count 2 2006.229.09:41:28.00#ibcon#*before return 0, iclass 37, count 2 2006.229.09:41:28.00#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:28.00#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:28.00#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.09:41:28.00#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:28.00#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:28.12#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:28.12#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:28.12#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:41:28.12#ibcon#first serial, iclass 37, count 0 2006.229.09:41:28.12#ibcon#enter sib2, iclass 37, count 0 2006.229.09:41:28.12#ibcon#flushed, iclass 37, count 0 2006.229.09:41:28.12#ibcon#about to write, iclass 37, count 0 2006.229.09:41:28.12#ibcon#wrote, iclass 37, count 0 2006.229.09:41:28.12#ibcon#about to read 3, iclass 37, count 0 2006.229.09:41:28.14#ibcon#read 3, iclass 37, count 0 2006.229.09:41:28.14#ibcon#about to read 4, iclass 37, count 0 2006.229.09:41:28.14#ibcon#read 4, iclass 37, count 0 2006.229.09:41:28.14#ibcon#about to read 5, iclass 37, count 0 2006.229.09:41:28.14#ibcon#read 5, iclass 37, count 0 2006.229.09:41:28.14#ibcon#about to read 6, iclass 37, count 0 2006.229.09:41:28.14#ibcon#read 6, iclass 37, count 0 2006.229.09:41:28.14#ibcon#end of sib2, iclass 37, count 0 2006.229.09:41:28.14#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:41:28.14#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:41:28.14#ibcon#[25=USB\r\n] 2006.229.09:41:28.14#ibcon#*before write, iclass 37, count 0 2006.229.09:41:28.14#ibcon#enter sib2, iclass 37, count 0 2006.229.09:41:28.14#ibcon#flushed, iclass 37, count 0 2006.229.09:41:28.14#ibcon#about to write, iclass 37, count 0 2006.229.09:41:28.14#ibcon#wrote, iclass 37, count 0 2006.229.09:41:28.14#ibcon#about to read 3, iclass 37, count 0 2006.229.09:41:28.17#ibcon#read 3, iclass 37, count 0 2006.229.09:41:28.17#ibcon#about to read 4, iclass 37, count 0 2006.229.09:41:28.17#ibcon#read 4, iclass 37, count 0 2006.229.09:41:28.17#ibcon#about to read 5, iclass 37, count 0 2006.229.09:41:28.17#ibcon#read 5, iclass 37, count 0 2006.229.09:41:28.17#ibcon#about to read 6, iclass 37, count 0 2006.229.09:41:28.17#ibcon#read 6, iclass 37, count 0 2006.229.09:41:28.17#ibcon#end of sib2, iclass 37, count 0 2006.229.09:41:28.17#ibcon#*after write, iclass 37, count 0 2006.229.09:41:28.17#ibcon#*before return 0, iclass 37, count 0 2006.229.09:41:28.17#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:28.17#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:28.17#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:41:28.17#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:41:28.17$vck44/valo=4,624.99 2006.229.09:41:28.17#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.09:41:28.17#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.09:41:28.17#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:28.17#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:28.17#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:28.17#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:28.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:41:28.17#ibcon#first serial, iclass 39, count 0 2006.229.09:41:28.17#ibcon#enter sib2, iclass 39, count 0 2006.229.09:41:28.17#ibcon#flushed, iclass 39, count 0 2006.229.09:41:28.17#ibcon#about to write, iclass 39, count 0 2006.229.09:41:28.17#ibcon#wrote, iclass 39, count 0 2006.229.09:41:28.17#ibcon#about to read 3, iclass 39, count 0 2006.229.09:41:28.19#ibcon#read 3, iclass 39, count 0 2006.229.09:41:28.19#ibcon#about to read 4, iclass 39, count 0 2006.229.09:41:28.19#ibcon#read 4, iclass 39, count 0 2006.229.09:41:28.19#ibcon#about to read 5, iclass 39, count 0 2006.229.09:41:28.19#ibcon#read 5, iclass 39, count 0 2006.229.09:41:28.19#ibcon#about to read 6, iclass 39, count 0 2006.229.09:41:28.19#ibcon#read 6, iclass 39, count 0 2006.229.09:41:28.19#ibcon#end of sib2, iclass 39, count 0 2006.229.09:41:28.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:41:28.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:41:28.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:41:28.19#ibcon#*before write, iclass 39, count 0 2006.229.09:41:28.19#ibcon#enter sib2, iclass 39, count 0 2006.229.09:41:28.19#ibcon#flushed, iclass 39, count 0 2006.229.09:41:28.19#ibcon#about to write, iclass 39, count 0 2006.229.09:41:28.19#ibcon#wrote, iclass 39, count 0 2006.229.09:41:28.19#ibcon#about to read 3, iclass 39, count 0 2006.229.09:41:28.23#ibcon#read 3, iclass 39, count 0 2006.229.09:41:28.23#ibcon#about to read 4, iclass 39, count 0 2006.229.09:41:28.23#ibcon#read 4, iclass 39, count 0 2006.229.09:41:28.23#ibcon#about to read 5, iclass 39, count 0 2006.229.09:41:28.23#ibcon#read 5, iclass 39, count 0 2006.229.09:41:28.23#ibcon#about to read 6, iclass 39, count 0 2006.229.09:41:28.23#ibcon#read 6, iclass 39, count 0 2006.229.09:41:28.23#ibcon#end of sib2, iclass 39, count 0 2006.229.09:41:28.23#ibcon#*after write, iclass 39, count 0 2006.229.09:41:28.23#ibcon#*before return 0, iclass 39, count 0 2006.229.09:41:28.23#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:28.23#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:28.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:41:28.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:41:28.23$vck44/va=4,7 2006.229.09:41:28.23#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.09:41:28.23#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.09:41:28.23#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:28.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:28.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:28.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:28.29#ibcon#enter wrdev, iclass 3, count 2 2006.229.09:41:28.29#ibcon#first serial, iclass 3, count 2 2006.229.09:41:28.29#ibcon#enter sib2, iclass 3, count 2 2006.229.09:41:28.29#ibcon#flushed, iclass 3, count 2 2006.229.09:41:28.29#ibcon#about to write, iclass 3, count 2 2006.229.09:41:28.29#ibcon#wrote, iclass 3, count 2 2006.229.09:41:28.29#ibcon#about to read 3, iclass 3, count 2 2006.229.09:41:28.31#ibcon#read 3, iclass 3, count 2 2006.229.09:41:28.31#ibcon#about to read 4, iclass 3, count 2 2006.229.09:41:28.31#ibcon#read 4, iclass 3, count 2 2006.229.09:41:28.31#ibcon#about to read 5, iclass 3, count 2 2006.229.09:41:28.31#ibcon#read 5, iclass 3, count 2 2006.229.09:41:28.31#ibcon#about to read 6, iclass 3, count 2 2006.229.09:41:28.31#ibcon#read 6, iclass 3, count 2 2006.229.09:41:28.31#ibcon#end of sib2, iclass 3, count 2 2006.229.09:41:28.31#ibcon#*mode == 0, iclass 3, count 2 2006.229.09:41:28.31#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.09:41:28.31#ibcon#[25=AT04-07\r\n] 2006.229.09:41:28.31#ibcon#*before write, iclass 3, count 2 2006.229.09:41:28.31#ibcon#enter sib2, iclass 3, count 2 2006.229.09:41:28.31#ibcon#flushed, iclass 3, count 2 2006.229.09:41:28.31#ibcon#about to write, iclass 3, count 2 2006.229.09:41:28.31#ibcon#wrote, iclass 3, count 2 2006.229.09:41:28.31#ibcon#about to read 3, iclass 3, count 2 2006.229.09:41:28.34#ibcon#read 3, iclass 3, count 2 2006.229.09:41:28.34#ibcon#about to read 4, iclass 3, count 2 2006.229.09:41:28.34#ibcon#read 4, iclass 3, count 2 2006.229.09:41:28.34#ibcon#about to read 5, iclass 3, count 2 2006.229.09:41:28.34#ibcon#read 5, iclass 3, count 2 2006.229.09:41:28.34#ibcon#about to read 6, iclass 3, count 2 2006.229.09:41:28.34#ibcon#read 6, iclass 3, count 2 2006.229.09:41:28.34#ibcon#end of sib2, iclass 3, count 2 2006.229.09:41:28.34#ibcon#*after write, iclass 3, count 2 2006.229.09:41:28.34#ibcon#*before return 0, iclass 3, count 2 2006.229.09:41:28.34#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:28.34#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:28.34#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.09:41:28.34#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:28.34#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:28.46#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:28.46#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:28.46#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:41:28.46#ibcon#first serial, iclass 3, count 0 2006.229.09:41:28.46#ibcon#enter sib2, iclass 3, count 0 2006.229.09:41:28.46#ibcon#flushed, iclass 3, count 0 2006.229.09:41:28.46#ibcon#about to write, iclass 3, count 0 2006.229.09:41:28.46#ibcon#wrote, iclass 3, count 0 2006.229.09:41:28.46#ibcon#about to read 3, iclass 3, count 0 2006.229.09:41:28.48#ibcon#read 3, iclass 3, count 0 2006.229.09:41:28.48#ibcon#about to read 4, iclass 3, count 0 2006.229.09:41:28.48#ibcon#read 4, iclass 3, count 0 2006.229.09:41:28.48#ibcon#about to read 5, iclass 3, count 0 2006.229.09:41:28.48#ibcon#read 5, iclass 3, count 0 2006.229.09:41:28.48#ibcon#about to read 6, iclass 3, count 0 2006.229.09:41:28.48#ibcon#read 6, iclass 3, count 0 2006.229.09:41:28.48#ibcon#end of sib2, iclass 3, count 0 2006.229.09:41:28.48#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:41:28.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:41:28.48#ibcon#[25=USB\r\n] 2006.229.09:41:28.48#ibcon#*before write, iclass 3, count 0 2006.229.09:41:28.48#ibcon#enter sib2, iclass 3, count 0 2006.229.09:41:28.48#ibcon#flushed, iclass 3, count 0 2006.229.09:41:28.48#ibcon#about to write, iclass 3, count 0 2006.229.09:41:28.48#ibcon#wrote, iclass 3, count 0 2006.229.09:41:28.48#ibcon#about to read 3, iclass 3, count 0 2006.229.09:41:28.51#ibcon#read 3, iclass 3, count 0 2006.229.09:41:28.51#ibcon#about to read 4, iclass 3, count 0 2006.229.09:41:28.51#ibcon#read 4, iclass 3, count 0 2006.229.09:41:28.51#ibcon#about to read 5, iclass 3, count 0 2006.229.09:41:28.51#ibcon#read 5, iclass 3, count 0 2006.229.09:41:28.51#ibcon#about to read 6, iclass 3, count 0 2006.229.09:41:28.51#ibcon#read 6, iclass 3, count 0 2006.229.09:41:28.51#ibcon#end of sib2, iclass 3, count 0 2006.229.09:41:28.51#ibcon#*after write, iclass 3, count 0 2006.229.09:41:28.51#ibcon#*before return 0, iclass 3, count 0 2006.229.09:41:28.51#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:28.51#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:28.51#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:41:28.51#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:41:28.51$vck44/valo=5,734.99 2006.229.09:41:28.51#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.09:41:28.51#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.09:41:28.51#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:28.51#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:41:28.51#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:41:28.51#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:41:28.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:41:28.51#ibcon#first serial, iclass 5, count 0 2006.229.09:41:28.51#ibcon#enter sib2, iclass 5, count 0 2006.229.09:41:28.51#ibcon#flushed, iclass 5, count 0 2006.229.09:41:28.51#ibcon#about to write, iclass 5, count 0 2006.229.09:41:28.51#ibcon#wrote, iclass 5, count 0 2006.229.09:41:28.51#ibcon#about to read 3, iclass 5, count 0 2006.229.09:41:28.53#ibcon#read 3, iclass 5, count 0 2006.229.09:41:28.53#ibcon#about to read 4, iclass 5, count 0 2006.229.09:41:28.53#ibcon#read 4, iclass 5, count 0 2006.229.09:41:28.53#ibcon#about to read 5, iclass 5, count 0 2006.229.09:41:28.53#ibcon#read 5, iclass 5, count 0 2006.229.09:41:28.53#ibcon#about to read 6, iclass 5, count 0 2006.229.09:41:28.53#ibcon#read 6, iclass 5, count 0 2006.229.09:41:28.53#ibcon#end of sib2, iclass 5, count 0 2006.229.09:41:28.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:41:28.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:41:28.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:41:28.53#ibcon#*before write, iclass 5, count 0 2006.229.09:41:28.53#ibcon#enter sib2, iclass 5, count 0 2006.229.09:41:28.53#ibcon#flushed, iclass 5, count 0 2006.229.09:41:28.53#ibcon#about to write, iclass 5, count 0 2006.229.09:41:28.53#ibcon#wrote, iclass 5, count 0 2006.229.09:41:28.53#ibcon#about to read 3, iclass 5, count 0 2006.229.09:41:28.57#ibcon#read 3, iclass 5, count 0 2006.229.09:41:28.57#ibcon#about to read 4, iclass 5, count 0 2006.229.09:41:28.57#ibcon#read 4, iclass 5, count 0 2006.229.09:41:28.57#ibcon#about to read 5, iclass 5, count 0 2006.229.09:41:28.57#ibcon#read 5, iclass 5, count 0 2006.229.09:41:28.57#ibcon#about to read 6, iclass 5, count 0 2006.229.09:41:28.57#ibcon#read 6, iclass 5, count 0 2006.229.09:41:28.57#ibcon#end of sib2, iclass 5, count 0 2006.229.09:41:28.57#ibcon#*after write, iclass 5, count 0 2006.229.09:41:28.57#ibcon#*before return 0, iclass 5, count 0 2006.229.09:41:28.57#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:41:28.57#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:41:28.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:41:28.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:41:28.57$vck44/va=5,4 2006.229.09:41:28.57#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.09:41:28.57#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.09:41:28.57#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:28.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:41:28.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:41:28.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:41:28.63#ibcon#enter wrdev, iclass 7, count 2 2006.229.09:41:28.63#ibcon#first serial, iclass 7, count 2 2006.229.09:41:28.63#ibcon#enter sib2, iclass 7, count 2 2006.229.09:41:28.63#ibcon#flushed, iclass 7, count 2 2006.229.09:41:28.63#ibcon#about to write, iclass 7, count 2 2006.229.09:41:28.63#ibcon#wrote, iclass 7, count 2 2006.229.09:41:28.63#ibcon#about to read 3, iclass 7, count 2 2006.229.09:41:28.65#ibcon#read 3, iclass 7, count 2 2006.229.09:41:28.65#ibcon#about to read 4, iclass 7, count 2 2006.229.09:41:28.65#ibcon#read 4, iclass 7, count 2 2006.229.09:41:28.65#ibcon#about to read 5, iclass 7, count 2 2006.229.09:41:28.65#ibcon#read 5, iclass 7, count 2 2006.229.09:41:28.65#ibcon#about to read 6, iclass 7, count 2 2006.229.09:41:28.65#ibcon#read 6, iclass 7, count 2 2006.229.09:41:28.65#ibcon#end of sib2, iclass 7, count 2 2006.229.09:41:28.65#ibcon#*mode == 0, iclass 7, count 2 2006.229.09:41:28.65#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.09:41:28.65#ibcon#[25=AT05-04\r\n] 2006.229.09:41:28.65#ibcon#*before write, iclass 7, count 2 2006.229.09:41:28.65#ibcon#enter sib2, iclass 7, count 2 2006.229.09:41:28.65#ibcon#flushed, iclass 7, count 2 2006.229.09:41:28.65#ibcon#about to write, iclass 7, count 2 2006.229.09:41:28.65#ibcon#wrote, iclass 7, count 2 2006.229.09:41:28.65#ibcon#about to read 3, iclass 7, count 2 2006.229.09:41:28.68#ibcon#read 3, iclass 7, count 2 2006.229.09:41:28.68#ibcon#about to read 4, iclass 7, count 2 2006.229.09:41:28.68#ibcon#read 4, iclass 7, count 2 2006.229.09:41:28.68#ibcon#about to read 5, iclass 7, count 2 2006.229.09:41:28.68#ibcon#read 5, iclass 7, count 2 2006.229.09:41:28.68#ibcon#about to read 6, iclass 7, count 2 2006.229.09:41:28.68#ibcon#read 6, iclass 7, count 2 2006.229.09:41:28.68#ibcon#end of sib2, iclass 7, count 2 2006.229.09:41:28.68#ibcon#*after write, iclass 7, count 2 2006.229.09:41:28.68#ibcon#*before return 0, iclass 7, count 2 2006.229.09:41:28.68#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:41:28.68#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:41:28.68#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.09:41:28.68#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:28.68#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:41:28.80#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:41:28.80#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:41:28.80#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:41:28.80#ibcon#first serial, iclass 7, count 0 2006.229.09:41:28.80#ibcon#enter sib2, iclass 7, count 0 2006.229.09:41:28.80#ibcon#flushed, iclass 7, count 0 2006.229.09:41:28.80#ibcon#about to write, iclass 7, count 0 2006.229.09:41:28.80#ibcon#wrote, iclass 7, count 0 2006.229.09:41:28.80#ibcon#about to read 3, iclass 7, count 0 2006.229.09:41:28.82#ibcon#read 3, iclass 7, count 0 2006.229.09:41:28.82#ibcon#about to read 4, iclass 7, count 0 2006.229.09:41:28.82#ibcon#read 4, iclass 7, count 0 2006.229.09:41:28.82#ibcon#about to read 5, iclass 7, count 0 2006.229.09:41:28.82#ibcon#read 5, iclass 7, count 0 2006.229.09:41:28.82#ibcon#about to read 6, iclass 7, count 0 2006.229.09:41:28.82#ibcon#read 6, iclass 7, count 0 2006.229.09:41:28.82#ibcon#end of sib2, iclass 7, count 0 2006.229.09:41:28.82#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:41:28.82#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:41:28.82#ibcon#[25=USB\r\n] 2006.229.09:41:28.82#ibcon#*before write, iclass 7, count 0 2006.229.09:41:28.82#ibcon#enter sib2, iclass 7, count 0 2006.229.09:41:28.82#ibcon#flushed, iclass 7, count 0 2006.229.09:41:28.82#ibcon#about to write, iclass 7, count 0 2006.229.09:41:28.82#ibcon#wrote, iclass 7, count 0 2006.229.09:41:28.82#ibcon#about to read 3, iclass 7, count 0 2006.229.09:41:28.85#ibcon#read 3, iclass 7, count 0 2006.229.09:41:28.85#ibcon#about to read 4, iclass 7, count 0 2006.229.09:41:28.85#ibcon#read 4, iclass 7, count 0 2006.229.09:41:28.85#ibcon#about to read 5, iclass 7, count 0 2006.229.09:41:28.85#ibcon#read 5, iclass 7, count 0 2006.229.09:41:28.85#ibcon#about to read 6, iclass 7, count 0 2006.229.09:41:28.85#ibcon#read 6, iclass 7, count 0 2006.229.09:41:28.85#ibcon#end of sib2, iclass 7, count 0 2006.229.09:41:28.85#ibcon#*after write, iclass 7, count 0 2006.229.09:41:28.85#ibcon#*before return 0, iclass 7, count 0 2006.229.09:41:28.85#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:41:28.85#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:41:28.85#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:41:28.85#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:41:28.85$vck44/valo=6,814.99 2006.229.09:41:28.85#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:41:28.85#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:41:28.85#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:28.85#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:28.85#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:28.85#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:28.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:41:28.85#ibcon#first serial, iclass 11, count 0 2006.229.09:41:28.85#ibcon#enter sib2, iclass 11, count 0 2006.229.09:41:28.85#ibcon#flushed, iclass 11, count 0 2006.229.09:41:28.85#ibcon#about to write, iclass 11, count 0 2006.229.09:41:28.85#ibcon#wrote, iclass 11, count 0 2006.229.09:41:28.85#ibcon#about to read 3, iclass 11, count 0 2006.229.09:41:28.87#ibcon#read 3, iclass 11, count 0 2006.229.09:41:28.87#ibcon#about to read 4, iclass 11, count 0 2006.229.09:41:28.87#ibcon#read 4, iclass 11, count 0 2006.229.09:41:28.87#ibcon#about to read 5, iclass 11, count 0 2006.229.09:41:28.87#ibcon#read 5, iclass 11, count 0 2006.229.09:41:28.87#ibcon#about to read 6, iclass 11, count 0 2006.229.09:41:28.87#ibcon#read 6, iclass 11, count 0 2006.229.09:41:28.87#ibcon#end of sib2, iclass 11, count 0 2006.229.09:41:28.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:41:28.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:41:28.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:41:28.87#ibcon#*before write, iclass 11, count 0 2006.229.09:41:28.87#ibcon#enter sib2, iclass 11, count 0 2006.229.09:41:28.87#ibcon#flushed, iclass 11, count 0 2006.229.09:41:28.87#ibcon#about to write, iclass 11, count 0 2006.229.09:41:28.87#ibcon#wrote, iclass 11, count 0 2006.229.09:41:28.87#ibcon#about to read 3, iclass 11, count 0 2006.229.09:41:28.91#ibcon#read 3, iclass 11, count 0 2006.229.09:41:28.91#ibcon#about to read 4, iclass 11, count 0 2006.229.09:41:28.91#ibcon#read 4, iclass 11, count 0 2006.229.09:41:28.91#ibcon#about to read 5, iclass 11, count 0 2006.229.09:41:28.91#ibcon#read 5, iclass 11, count 0 2006.229.09:41:28.91#ibcon#about to read 6, iclass 11, count 0 2006.229.09:41:28.91#ibcon#read 6, iclass 11, count 0 2006.229.09:41:28.91#ibcon#end of sib2, iclass 11, count 0 2006.229.09:41:28.91#ibcon#*after write, iclass 11, count 0 2006.229.09:41:28.91#ibcon#*before return 0, iclass 11, count 0 2006.229.09:41:28.91#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:28.91#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:28.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:41:28.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:41:28.91$vck44/va=6,4 2006.229.09:41:28.91#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.09:41:28.91#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.09:41:28.91#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:28.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:28.97#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:28.97#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:28.97#ibcon#enter wrdev, iclass 13, count 2 2006.229.09:41:28.97#ibcon#first serial, iclass 13, count 2 2006.229.09:41:28.97#ibcon#enter sib2, iclass 13, count 2 2006.229.09:41:28.97#ibcon#flushed, iclass 13, count 2 2006.229.09:41:28.97#ibcon#about to write, iclass 13, count 2 2006.229.09:41:28.97#ibcon#wrote, iclass 13, count 2 2006.229.09:41:28.97#ibcon#about to read 3, iclass 13, count 2 2006.229.09:41:28.99#ibcon#read 3, iclass 13, count 2 2006.229.09:41:28.99#ibcon#about to read 4, iclass 13, count 2 2006.229.09:41:28.99#ibcon#read 4, iclass 13, count 2 2006.229.09:41:28.99#ibcon#about to read 5, iclass 13, count 2 2006.229.09:41:28.99#ibcon#read 5, iclass 13, count 2 2006.229.09:41:28.99#ibcon#about to read 6, iclass 13, count 2 2006.229.09:41:28.99#ibcon#read 6, iclass 13, count 2 2006.229.09:41:28.99#ibcon#end of sib2, iclass 13, count 2 2006.229.09:41:28.99#ibcon#*mode == 0, iclass 13, count 2 2006.229.09:41:28.99#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.09:41:28.99#ibcon#[25=AT06-04\r\n] 2006.229.09:41:28.99#ibcon#*before write, iclass 13, count 2 2006.229.09:41:28.99#ibcon#enter sib2, iclass 13, count 2 2006.229.09:41:28.99#ibcon#flushed, iclass 13, count 2 2006.229.09:41:28.99#ibcon#about to write, iclass 13, count 2 2006.229.09:41:28.99#ibcon#wrote, iclass 13, count 2 2006.229.09:41:28.99#ibcon#about to read 3, iclass 13, count 2 2006.229.09:41:29.02#ibcon#read 3, iclass 13, count 2 2006.229.09:41:30.07#ibcon#about to read 4, iclass 13, count 2 2006.229.09:41:30.07#ibcon#read 4, iclass 13, count 2 2006.229.09:41:30.07#ibcon#about to read 5, iclass 13, count 2 2006.229.09:41:30.07#ibcon#read 5, iclass 13, count 2 2006.229.09:41:30.07#ibcon#about to read 6, iclass 13, count 2 2006.229.09:41:30.07#ibcon#read 6, iclass 13, count 2 2006.229.09:41:30.07#ibcon#end of sib2, iclass 13, count 2 2006.229.09:41:30.07#ibcon#*after write, iclass 13, count 2 2006.229.09:41:30.07#ibcon#*before return 0, iclass 13, count 2 2006.229.09:41:30.07#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:30.07#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:30.07#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.09:41:30.07#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:30.07#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:30.19#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:30.19#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:30.19#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:41:30.19#ibcon#first serial, iclass 13, count 0 2006.229.09:41:30.19#ibcon#enter sib2, iclass 13, count 0 2006.229.09:41:30.19#ibcon#flushed, iclass 13, count 0 2006.229.09:41:30.19#ibcon#about to write, iclass 13, count 0 2006.229.09:41:30.19#ibcon#wrote, iclass 13, count 0 2006.229.09:41:30.19#ibcon#about to read 3, iclass 13, count 0 2006.229.09:41:30.21#ibcon#read 3, iclass 13, count 0 2006.229.09:41:30.21#ibcon#about to read 4, iclass 13, count 0 2006.229.09:41:30.21#ibcon#read 4, iclass 13, count 0 2006.229.09:41:30.21#ibcon#about to read 5, iclass 13, count 0 2006.229.09:41:30.21#ibcon#read 5, iclass 13, count 0 2006.229.09:41:30.21#ibcon#about to read 6, iclass 13, count 0 2006.229.09:41:30.21#ibcon#read 6, iclass 13, count 0 2006.229.09:41:30.21#ibcon#end of sib2, iclass 13, count 0 2006.229.09:41:30.21#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:41:30.21#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:41:30.21#ibcon#[25=USB\r\n] 2006.229.09:41:30.21#ibcon#*before write, iclass 13, count 0 2006.229.09:41:30.21#ibcon#enter sib2, iclass 13, count 0 2006.229.09:41:30.21#ibcon#flushed, iclass 13, count 0 2006.229.09:41:30.21#ibcon#about to write, iclass 13, count 0 2006.229.09:41:30.21#ibcon#wrote, iclass 13, count 0 2006.229.09:41:30.21#ibcon#about to read 3, iclass 13, count 0 2006.229.09:41:30.24#ibcon#read 3, iclass 13, count 0 2006.229.09:41:30.24#ibcon#about to read 4, iclass 13, count 0 2006.229.09:41:30.24#ibcon#read 4, iclass 13, count 0 2006.229.09:41:30.24#ibcon#about to read 5, iclass 13, count 0 2006.229.09:41:30.24#ibcon#read 5, iclass 13, count 0 2006.229.09:41:30.24#ibcon#about to read 6, iclass 13, count 0 2006.229.09:41:30.24#ibcon#read 6, iclass 13, count 0 2006.229.09:41:30.24#ibcon#end of sib2, iclass 13, count 0 2006.229.09:41:30.24#ibcon#*after write, iclass 13, count 0 2006.229.09:41:30.24#ibcon#*before return 0, iclass 13, count 0 2006.229.09:41:30.24#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:30.24#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:30.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:41:30.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:41:30.24$vck44/valo=7,864.99 2006.229.09:41:30.24#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.09:41:30.24#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.09:41:30.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:30.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:30.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:30.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:30.24#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:41:30.24#ibcon#first serial, iclass 15, count 0 2006.229.09:41:30.24#ibcon#enter sib2, iclass 15, count 0 2006.229.09:41:30.24#ibcon#flushed, iclass 15, count 0 2006.229.09:41:30.24#ibcon#about to write, iclass 15, count 0 2006.229.09:41:30.24#ibcon#wrote, iclass 15, count 0 2006.229.09:41:30.24#ibcon#about to read 3, iclass 15, count 0 2006.229.09:41:30.26#ibcon#read 3, iclass 15, count 0 2006.229.09:41:30.26#ibcon#about to read 4, iclass 15, count 0 2006.229.09:41:30.26#ibcon#read 4, iclass 15, count 0 2006.229.09:41:30.26#ibcon#about to read 5, iclass 15, count 0 2006.229.09:41:30.26#ibcon#read 5, iclass 15, count 0 2006.229.09:41:30.26#ibcon#about to read 6, iclass 15, count 0 2006.229.09:41:30.26#ibcon#read 6, iclass 15, count 0 2006.229.09:41:30.26#ibcon#end of sib2, iclass 15, count 0 2006.229.09:41:30.26#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:41:30.26#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:41:30.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:41:30.26#ibcon#*before write, iclass 15, count 0 2006.229.09:41:30.26#ibcon#enter sib2, iclass 15, count 0 2006.229.09:41:30.26#ibcon#flushed, iclass 15, count 0 2006.229.09:41:30.26#ibcon#about to write, iclass 15, count 0 2006.229.09:41:30.26#ibcon#wrote, iclass 15, count 0 2006.229.09:41:30.26#ibcon#about to read 3, iclass 15, count 0 2006.229.09:41:30.30#ibcon#read 3, iclass 15, count 0 2006.229.09:41:30.30#ibcon#about to read 4, iclass 15, count 0 2006.229.09:41:30.30#ibcon#read 4, iclass 15, count 0 2006.229.09:41:30.30#ibcon#about to read 5, iclass 15, count 0 2006.229.09:41:30.30#ibcon#read 5, iclass 15, count 0 2006.229.09:41:30.30#ibcon#about to read 6, iclass 15, count 0 2006.229.09:41:30.30#ibcon#read 6, iclass 15, count 0 2006.229.09:41:30.30#ibcon#end of sib2, iclass 15, count 0 2006.229.09:41:30.30#ibcon#*after write, iclass 15, count 0 2006.229.09:41:30.30#ibcon#*before return 0, iclass 15, count 0 2006.229.09:41:30.30#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:30.30#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:30.30#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:41:30.30#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:41:30.30$vck44/va=7,5 2006.229.09:41:30.30#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.09:41:30.30#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.09:41:30.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:30.30#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:30.36#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:30.36#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:30.36#ibcon#enter wrdev, iclass 17, count 2 2006.229.09:41:30.36#ibcon#first serial, iclass 17, count 2 2006.229.09:41:30.36#ibcon#enter sib2, iclass 17, count 2 2006.229.09:41:30.36#ibcon#flushed, iclass 17, count 2 2006.229.09:41:30.36#ibcon#about to write, iclass 17, count 2 2006.229.09:41:30.36#ibcon#wrote, iclass 17, count 2 2006.229.09:41:30.36#ibcon#about to read 3, iclass 17, count 2 2006.229.09:41:30.38#ibcon#read 3, iclass 17, count 2 2006.229.09:41:30.38#ibcon#about to read 4, iclass 17, count 2 2006.229.09:41:30.38#ibcon#read 4, iclass 17, count 2 2006.229.09:41:30.38#ibcon#about to read 5, iclass 17, count 2 2006.229.09:41:30.38#ibcon#read 5, iclass 17, count 2 2006.229.09:41:30.38#ibcon#about to read 6, iclass 17, count 2 2006.229.09:41:30.38#ibcon#read 6, iclass 17, count 2 2006.229.09:41:30.38#ibcon#end of sib2, iclass 17, count 2 2006.229.09:41:30.38#ibcon#*mode == 0, iclass 17, count 2 2006.229.09:41:30.38#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.09:41:30.38#ibcon#[25=AT07-05\r\n] 2006.229.09:41:30.38#ibcon#*before write, iclass 17, count 2 2006.229.09:41:30.38#ibcon#enter sib2, iclass 17, count 2 2006.229.09:41:30.38#ibcon#flushed, iclass 17, count 2 2006.229.09:41:30.38#ibcon#about to write, iclass 17, count 2 2006.229.09:41:30.38#ibcon#wrote, iclass 17, count 2 2006.229.09:41:30.38#ibcon#about to read 3, iclass 17, count 2 2006.229.09:41:30.41#ibcon#read 3, iclass 17, count 2 2006.229.09:41:30.41#ibcon#about to read 4, iclass 17, count 2 2006.229.09:41:30.41#ibcon#read 4, iclass 17, count 2 2006.229.09:41:30.41#ibcon#about to read 5, iclass 17, count 2 2006.229.09:41:30.41#ibcon#read 5, iclass 17, count 2 2006.229.09:41:30.41#ibcon#about to read 6, iclass 17, count 2 2006.229.09:41:30.41#ibcon#read 6, iclass 17, count 2 2006.229.09:41:30.41#ibcon#end of sib2, iclass 17, count 2 2006.229.09:41:30.41#ibcon#*after write, iclass 17, count 2 2006.229.09:41:30.41#ibcon#*before return 0, iclass 17, count 2 2006.229.09:41:30.41#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:30.41#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:30.41#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.09:41:30.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:30.41#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:30.53#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:30.53#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:30.53#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:41:30.53#ibcon#first serial, iclass 17, count 0 2006.229.09:41:30.53#ibcon#enter sib2, iclass 17, count 0 2006.229.09:41:30.53#ibcon#flushed, iclass 17, count 0 2006.229.09:41:30.53#ibcon#about to write, iclass 17, count 0 2006.229.09:41:30.53#ibcon#wrote, iclass 17, count 0 2006.229.09:41:30.53#ibcon#about to read 3, iclass 17, count 0 2006.229.09:41:30.55#ibcon#read 3, iclass 17, count 0 2006.229.09:41:30.55#ibcon#about to read 4, iclass 17, count 0 2006.229.09:41:30.55#ibcon#read 4, iclass 17, count 0 2006.229.09:41:30.55#ibcon#about to read 5, iclass 17, count 0 2006.229.09:41:30.55#ibcon#read 5, iclass 17, count 0 2006.229.09:41:30.55#ibcon#about to read 6, iclass 17, count 0 2006.229.09:41:30.55#ibcon#read 6, iclass 17, count 0 2006.229.09:41:30.55#ibcon#end of sib2, iclass 17, count 0 2006.229.09:41:30.55#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:41:30.55#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:41:30.55#ibcon#[25=USB\r\n] 2006.229.09:41:30.55#ibcon#*before write, iclass 17, count 0 2006.229.09:41:30.55#ibcon#enter sib2, iclass 17, count 0 2006.229.09:41:30.55#ibcon#flushed, iclass 17, count 0 2006.229.09:41:30.55#ibcon#about to write, iclass 17, count 0 2006.229.09:41:30.55#ibcon#wrote, iclass 17, count 0 2006.229.09:41:30.55#ibcon#about to read 3, iclass 17, count 0 2006.229.09:41:30.58#ibcon#read 3, iclass 17, count 0 2006.229.09:41:30.58#ibcon#about to read 4, iclass 17, count 0 2006.229.09:41:30.58#ibcon#read 4, iclass 17, count 0 2006.229.09:41:30.58#ibcon#about to read 5, iclass 17, count 0 2006.229.09:41:30.58#ibcon#read 5, iclass 17, count 0 2006.229.09:41:30.58#ibcon#about to read 6, iclass 17, count 0 2006.229.09:41:30.58#ibcon#read 6, iclass 17, count 0 2006.229.09:41:30.58#ibcon#end of sib2, iclass 17, count 0 2006.229.09:41:30.58#ibcon#*after write, iclass 17, count 0 2006.229.09:41:30.58#ibcon#*before return 0, iclass 17, count 0 2006.229.09:41:30.58#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:30.58#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:30.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:41:30.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:41:30.58$vck44/valo=8,884.99 2006.229.09:41:30.58#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.09:41:30.58#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.09:41:30.58#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:30.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:30.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:30.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:30.58#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:41:30.58#ibcon#first serial, iclass 19, count 0 2006.229.09:41:30.58#ibcon#enter sib2, iclass 19, count 0 2006.229.09:41:30.58#ibcon#flushed, iclass 19, count 0 2006.229.09:41:30.58#ibcon#about to write, iclass 19, count 0 2006.229.09:41:30.58#ibcon#wrote, iclass 19, count 0 2006.229.09:41:30.58#ibcon#about to read 3, iclass 19, count 0 2006.229.09:41:30.60#ibcon#read 3, iclass 19, count 0 2006.229.09:41:30.60#ibcon#about to read 4, iclass 19, count 0 2006.229.09:41:30.60#ibcon#read 4, iclass 19, count 0 2006.229.09:41:30.60#ibcon#about to read 5, iclass 19, count 0 2006.229.09:41:30.60#ibcon#read 5, iclass 19, count 0 2006.229.09:41:30.60#ibcon#about to read 6, iclass 19, count 0 2006.229.09:41:30.60#ibcon#read 6, iclass 19, count 0 2006.229.09:41:30.60#ibcon#end of sib2, iclass 19, count 0 2006.229.09:41:30.60#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:41:30.60#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:41:30.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:41:30.60#ibcon#*before write, iclass 19, count 0 2006.229.09:41:30.60#ibcon#enter sib2, iclass 19, count 0 2006.229.09:41:30.60#ibcon#flushed, iclass 19, count 0 2006.229.09:41:30.60#ibcon#about to write, iclass 19, count 0 2006.229.09:41:30.60#ibcon#wrote, iclass 19, count 0 2006.229.09:41:30.60#ibcon#about to read 3, iclass 19, count 0 2006.229.09:41:30.64#ibcon#read 3, iclass 19, count 0 2006.229.09:41:30.64#ibcon#about to read 4, iclass 19, count 0 2006.229.09:41:30.64#ibcon#read 4, iclass 19, count 0 2006.229.09:41:30.64#ibcon#about to read 5, iclass 19, count 0 2006.229.09:41:30.64#ibcon#read 5, iclass 19, count 0 2006.229.09:41:30.64#ibcon#about to read 6, iclass 19, count 0 2006.229.09:41:30.64#ibcon#read 6, iclass 19, count 0 2006.229.09:41:30.64#ibcon#end of sib2, iclass 19, count 0 2006.229.09:41:30.64#ibcon#*after write, iclass 19, count 0 2006.229.09:41:30.64#ibcon#*before return 0, iclass 19, count 0 2006.229.09:41:30.64#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:30.64#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:30.64#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:41:30.64#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:41:30.64$vck44/va=8,6 2006.229.09:41:30.64#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.09:41:30.64#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.09:41:30.64#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:30.64#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:30.70#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:30.70#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:30.70#ibcon#enter wrdev, iclass 21, count 2 2006.229.09:41:30.70#ibcon#first serial, iclass 21, count 2 2006.229.09:41:30.70#ibcon#enter sib2, iclass 21, count 2 2006.229.09:41:30.70#ibcon#flushed, iclass 21, count 2 2006.229.09:41:30.70#ibcon#about to write, iclass 21, count 2 2006.229.09:41:30.70#ibcon#wrote, iclass 21, count 2 2006.229.09:41:30.70#ibcon#about to read 3, iclass 21, count 2 2006.229.09:41:30.72#ibcon#read 3, iclass 21, count 2 2006.229.09:41:30.72#ibcon#about to read 4, iclass 21, count 2 2006.229.09:41:30.72#ibcon#read 4, iclass 21, count 2 2006.229.09:41:30.72#ibcon#about to read 5, iclass 21, count 2 2006.229.09:41:30.72#ibcon#read 5, iclass 21, count 2 2006.229.09:41:30.72#ibcon#about to read 6, iclass 21, count 2 2006.229.09:41:30.72#ibcon#read 6, iclass 21, count 2 2006.229.09:41:30.72#ibcon#end of sib2, iclass 21, count 2 2006.229.09:41:30.72#ibcon#*mode == 0, iclass 21, count 2 2006.229.09:41:30.72#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.09:41:30.72#ibcon#[25=AT08-06\r\n] 2006.229.09:41:30.72#ibcon#*before write, iclass 21, count 2 2006.229.09:41:30.72#ibcon#enter sib2, iclass 21, count 2 2006.229.09:41:30.72#ibcon#flushed, iclass 21, count 2 2006.229.09:41:30.72#ibcon#about to write, iclass 21, count 2 2006.229.09:41:30.72#ibcon#wrote, iclass 21, count 2 2006.229.09:41:30.72#ibcon#about to read 3, iclass 21, count 2 2006.229.09:41:30.75#ibcon#read 3, iclass 21, count 2 2006.229.09:41:30.75#ibcon#about to read 4, iclass 21, count 2 2006.229.09:41:30.75#ibcon#read 4, iclass 21, count 2 2006.229.09:41:30.75#ibcon#about to read 5, iclass 21, count 2 2006.229.09:41:30.75#ibcon#read 5, iclass 21, count 2 2006.229.09:41:30.75#ibcon#about to read 6, iclass 21, count 2 2006.229.09:41:30.75#ibcon#read 6, iclass 21, count 2 2006.229.09:41:30.75#ibcon#end of sib2, iclass 21, count 2 2006.229.09:41:30.75#ibcon#*after write, iclass 21, count 2 2006.229.09:41:30.75#ibcon#*before return 0, iclass 21, count 2 2006.229.09:41:30.75#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:30.75#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:30.75#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.09:41:30.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:30.75#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:30.87#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:30.87#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:30.87#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:41:30.87#ibcon#first serial, iclass 21, count 0 2006.229.09:41:30.87#ibcon#enter sib2, iclass 21, count 0 2006.229.09:41:30.87#ibcon#flushed, iclass 21, count 0 2006.229.09:41:30.87#ibcon#about to write, iclass 21, count 0 2006.229.09:41:30.87#ibcon#wrote, iclass 21, count 0 2006.229.09:41:30.87#ibcon#about to read 3, iclass 21, count 0 2006.229.09:41:30.89#ibcon#read 3, iclass 21, count 0 2006.229.09:41:30.89#ibcon#about to read 4, iclass 21, count 0 2006.229.09:41:30.89#ibcon#read 4, iclass 21, count 0 2006.229.09:41:30.89#ibcon#about to read 5, iclass 21, count 0 2006.229.09:41:30.89#ibcon#read 5, iclass 21, count 0 2006.229.09:41:30.89#ibcon#about to read 6, iclass 21, count 0 2006.229.09:41:30.89#ibcon#read 6, iclass 21, count 0 2006.229.09:41:30.89#ibcon#end of sib2, iclass 21, count 0 2006.229.09:41:30.89#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:41:30.89#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:41:30.89#ibcon#[25=USB\r\n] 2006.229.09:41:30.89#ibcon#*before write, iclass 21, count 0 2006.229.09:41:30.89#ibcon#enter sib2, iclass 21, count 0 2006.229.09:41:30.89#ibcon#flushed, iclass 21, count 0 2006.229.09:41:30.89#ibcon#about to write, iclass 21, count 0 2006.229.09:41:30.89#ibcon#wrote, iclass 21, count 0 2006.229.09:41:30.89#ibcon#about to read 3, iclass 21, count 0 2006.229.09:41:30.92#ibcon#read 3, iclass 21, count 0 2006.229.09:41:30.92#ibcon#about to read 4, iclass 21, count 0 2006.229.09:41:30.92#ibcon#read 4, iclass 21, count 0 2006.229.09:41:30.92#ibcon#about to read 5, iclass 21, count 0 2006.229.09:41:30.92#ibcon#read 5, iclass 21, count 0 2006.229.09:41:30.92#ibcon#about to read 6, iclass 21, count 0 2006.229.09:41:30.92#ibcon#read 6, iclass 21, count 0 2006.229.09:41:30.92#ibcon#end of sib2, iclass 21, count 0 2006.229.09:41:30.92#ibcon#*after write, iclass 21, count 0 2006.229.09:41:30.92#ibcon#*before return 0, iclass 21, count 0 2006.229.09:41:30.92#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:30.92#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:30.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:41:30.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:41:30.92$vck44/vblo=1,629.99 2006.229.09:41:30.92#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.09:41:30.92#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.09:41:30.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:30.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:30.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:30.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:30.92#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:41:30.92#ibcon#first serial, iclass 23, count 0 2006.229.09:41:30.92#ibcon#enter sib2, iclass 23, count 0 2006.229.09:41:30.92#ibcon#flushed, iclass 23, count 0 2006.229.09:41:30.92#ibcon#about to write, iclass 23, count 0 2006.229.09:41:30.92#ibcon#wrote, iclass 23, count 0 2006.229.09:41:30.92#ibcon#about to read 3, iclass 23, count 0 2006.229.09:41:30.94#ibcon#read 3, iclass 23, count 0 2006.229.09:41:30.94#ibcon#about to read 4, iclass 23, count 0 2006.229.09:41:30.94#ibcon#read 4, iclass 23, count 0 2006.229.09:41:30.94#ibcon#about to read 5, iclass 23, count 0 2006.229.09:41:30.94#ibcon#read 5, iclass 23, count 0 2006.229.09:41:30.94#ibcon#about to read 6, iclass 23, count 0 2006.229.09:41:30.94#ibcon#read 6, iclass 23, count 0 2006.229.09:41:30.94#ibcon#end of sib2, iclass 23, count 0 2006.229.09:41:30.94#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:41:30.94#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:41:30.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:41:30.94#ibcon#*before write, iclass 23, count 0 2006.229.09:41:30.94#ibcon#enter sib2, iclass 23, count 0 2006.229.09:41:30.94#ibcon#flushed, iclass 23, count 0 2006.229.09:41:30.94#ibcon#about to write, iclass 23, count 0 2006.229.09:41:30.94#ibcon#wrote, iclass 23, count 0 2006.229.09:41:30.94#ibcon#about to read 3, iclass 23, count 0 2006.229.09:41:30.98#ibcon#read 3, iclass 23, count 0 2006.229.09:41:30.98#ibcon#about to read 4, iclass 23, count 0 2006.229.09:41:30.98#ibcon#read 4, iclass 23, count 0 2006.229.09:41:30.98#ibcon#about to read 5, iclass 23, count 0 2006.229.09:41:30.98#ibcon#read 5, iclass 23, count 0 2006.229.09:41:30.98#ibcon#about to read 6, iclass 23, count 0 2006.229.09:41:30.98#ibcon#read 6, iclass 23, count 0 2006.229.09:41:30.98#ibcon#end of sib2, iclass 23, count 0 2006.229.09:41:30.98#ibcon#*after write, iclass 23, count 0 2006.229.09:41:30.98#ibcon#*before return 0, iclass 23, count 0 2006.229.09:41:30.98#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:30.98#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:30.98#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:41:30.98#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:41:30.98$vck44/vb=1,4 2006.229.09:41:30.98#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.09:41:30.98#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.09:41:30.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:30.98#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:41:30.98#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:41:30.98#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:41:30.98#ibcon#enter wrdev, iclass 25, count 2 2006.229.09:41:30.98#ibcon#first serial, iclass 25, count 2 2006.229.09:41:30.98#ibcon#enter sib2, iclass 25, count 2 2006.229.09:41:30.98#ibcon#flushed, iclass 25, count 2 2006.229.09:41:30.98#ibcon#about to write, iclass 25, count 2 2006.229.09:41:30.98#ibcon#wrote, iclass 25, count 2 2006.229.09:41:30.98#ibcon#about to read 3, iclass 25, count 2 2006.229.09:41:31.00#ibcon#read 3, iclass 25, count 2 2006.229.09:41:31.00#ibcon#about to read 4, iclass 25, count 2 2006.229.09:41:31.00#ibcon#read 4, iclass 25, count 2 2006.229.09:41:31.00#ibcon#about to read 5, iclass 25, count 2 2006.229.09:41:31.00#ibcon#read 5, iclass 25, count 2 2006.229.09:41:31.00#ibcon#about to read 6, iclass 25, count 2 2006.229.09:41:31.00#ibcon#read 6, iclass 25, count 2 2006.229.09:41:31.00#ibcon#end of sib2, iclass 25, count 2 2006.229.09:41:31.00#ibcon#*mode == 0, iclass 25, count 2 2006.229.09:41:31.00#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.09:41:31.00#ibcon#[27=AT01-04\r\n] 2006.229.09:41:31.00#ibcon#*before write, iclass 25, count 2 2006.229.09:41:31.00#ibcon#enter sib2, iclass 25, count 2 2006.229.09:41:31.00#ibcon#flushed, iclass 25, count 2 2006.229.09:41:31.00#ibcon#about to write, iclass 25, count 2 2006.229.09:41:31.00#ibcon#wrote, iclass 25, count 2 2006.229.09:41:31.00#ibcon#about to read 3, iclass 25, count 2 2006.229.09:41:31.03#ibcon#read 3, iclass 25, count 2 2006.229.09:41:31.78#ibcon#about to read 4, iclass 25, count 2 2006.229.09:41:31.78#ibcon#read 4, iclass 25, count 2 2006.229.09:41:31.78#ibcon#about to read 5, iclass 25, count 2 2006.229.09:41:31.78#ibcon#read 5, iclass 25, count 2 2006.229.09:41:31.78#ibcon#about to read 6, iclass 25, count 2 2006.229.09:41:31.78#ibcon#read 6, iclass 25, count 2 2006.229.09:41:31.78#ibcon#end of sib2, iclass 25, count 2 2006.229.09:41:31.78#ibcon#*after write, iclass 25, count 2 2006.229.09:41:31.78#ibcon#*before return 0, iclass 25, count 2 2006.229.09:41:31.78#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:41:31.79#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:41:31.79#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.09:41:31.79#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:31.79#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:41:31.90#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:41:31.90#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:41:31.90#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:41:31.90#ibcon#first serial, iclass 25, count 0 2006.229.09:41:31.90#ibcon#enter sib2, iclass 25, count 0 2006.229.09:41:31.90#ibcon#flushed, iclass 25, count 0 2006.229.09:41:31.90#ibcon#about to write, iclass 25, count 0 2006.229.09:41:31.90#ibcon#wrote, iclass 25, count 0 2006.229.09:41:31.90#ibcon#about to read 3, iclass 25, count 0 2006.229.09:41:31.92#ibcon#read 3, iclass 25, count 0 2006.229.09:41:31.92#ibcon#about to read 4, iclass 25, count 0 2006.229.09:41:31.92#ibcon#read 4, iclass 25, count 0 2006.229.09:41:31.92#ibcon#about to read 5, iclass 25, count 0 2006.229.09:41:31.92#ibcon#read 5, iclass 25, count 0 2006.229.09:41:31.92#ibcon#about to read 6, iclass 25, count 0 2006.229.09:41:31.92#ibcon#read 6, iclass 25, count 0 2006.229.09:41:31.92#ibcon#end of sib2, iclass 25, count 0 2006.229.09:41:31.92#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:41:31.92#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:41:31.92#ibcon#[27=USB\r\n] 2006.229.09:41:31.92#ibcon#*before write, iclass 25, count 0 2006.229.09:41:31.92#ibcon#enter sib2, iclass 25, count 0 2006.229.09:41:31.92#ibcon#flushed, iclass 25, count 0 2006.229.09:41:31.92#ibcon#about to write, iclass 25, count 0 2006.229.09:41:31.92#ibcon#wrote, iclass 25, count 0 2006.229.09:41:31.92#ibcon#about to read 3, iclass 25, count 0 2006.229.09:41:31.95#ibcon#read 3, iclass 25, count 0 2006.229.09:41:31.95#ibcon#about to read 4, iclass 25, count 0 2006.229.09:41:31.95#ibcon#read 4, iclass 25, count 0 2006.229.09:41:31.95#ibcon#about to read 5, iclass 25, count 0 2006.229.09:41:31.95#ibcon#read 5, iclass 25, count 0 2006.229.09:41:31.95#ibcon#about to read 6, iclass 25, count 0 2006.229.09:41:31.95#ibcon#read 6, iclass 25, count 0 2006.229.09:41:31.95#ibcon#end of sib2, iclass 25, count 0 2006.229.09:41:31.95#ibcon#*after write, iclass 25, count 0 2006.229.09:41:31.95#ibcon#*before return 0, iclass 25, count 0 2006.229.09:41:31.95#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:41:31.95#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:41:31.95#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:41:31.95#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:41:31.95$vck44/vblo=2,634.99 2006.229.09:41:31.95#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.09:41:31.95#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.09:41:31.95#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:31.95#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:31.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:31.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:31.95#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:41:31.95#ibcon#first serial, iclass 27, count 0 2006.229.09:41:31.95#ibcon#enter sib2, iclass 27, count 0 2006.229.09:41:31.95#ibcon#flushed, iclass 27, count 0 2006.229.09:41:31.95#ibcon#about to write, iclass 27, count 0 2006.229.09:41:31.95#ibcon#wrote, iclass 27, count 0 2006.229.09:41:31.95#ibcon#about to read 3, iclass 27, count 0 2006.229.09:41:31.97#ibcon#read 3, iclass 27, count 0 2006.229.09:41:31.97#ibcon#about to read 4, iclass 27, count 0 2006.229.09:41:31.97#ibcon#read 4, iclass 27, count 0 2006.229.09:41:31.97#ibcon#about to read 5, iclass 27, count 0 2006.229.09:41:31.97#ibcon#read 5, iclass 27, count 0 2006.229.09:41:31.97#ibcon#about to read 6, iclass 27, count 0 2006.229.09:41:31.97#ibcon#read 6, iclass 27, count 0 2006.229.09:41:31.97#ibcon#end of sib2, iclass 27, count 0 2006.229.09:41:31.97#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:41:31.97#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:41:31.97#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:41:31.97#ibcon#*before write, iclass 27, count 0 2006.229.09:41:31.97#ibcon#enter sib2, iclass 27, count 0 2006.229.09:41:31.97#ibcon#flushed, iclass 27, count 0 2006.229.09:41:31.97#ibcon#about to write, iclass 27, count 0 2006.229.09:41:31.97#ibcon#wrote, iclass 27, count 0 2006.229.09:41:31.97#ibcon#about to read 3, iclass 27, count 0 2006.229.09:41:32.01#ibcon#read 3, iclass 27, count 0 2006.229.09:41:32.01#ibcon#about to read 4, iclass 27, count 0 2006.229.09:41:32.01#ibcon#read 4, iclass 27, count 0 2006.229.09:41:32.01#ibcon#about to read 5, iclass 27, count 0 2006.229.09:41:32.01#ibcon#read 5, iclass 27, count 0 2006.229.09:41:32.01#ibcon#about to read 6, iclass 27, count 0 2006.229.09:41:32.01#ibcon#read 6, iclass 27, count 0 2006.229.09:41:32.01#ibcon#end of sib2, iclass 27, count 0 2006.229.09:41:32.01#ibcon#*after write, iclass 27, count 0 2006.229.09:41:32.01#ibcon#*before return 0, iclass 27, count 0 2006.229.09:41:32.01#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:32.01#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:41:32.01#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:41:32.01#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:41:32.01$vck44/vb=2,4 2006.229.09:41:32.01#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.09:41:32.01#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.09:41:32.01#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:32.01#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:32.07#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:32.07#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:32.07#ibcon#enter wrdev, iclass 29, count 2 2006.229.09:41:32.07#ibcon#first serial, iclass 29, count 2 2006.229.09:41:32.07#ibcon#enter sib2, iclass 29, count 2 2006.229.09:41:32.07#ibcon#flushed, iclass 29, count 2 2006.229.09:41:32.07#ibcon#about to write, iclass 29, count 2 2006.229.09:41:32.07#ibcon#wrote, iclass 29, count 2 2006.229.09:41:32.07#ibcon#about to read 3, iclass 29, count 2 2006.229.09:41:32.09#ibcon#read 3, iclass 29, count 2 2006.229.09:41:32.09#ibcon#about to read 4, iclass 29, count 2 2006.229.09:41:32.09#ibcon#read 4, iclass 29, count 2 2006.229.09:41:32.09#ibcon#about to read 5, iclass 29, count 2 2006.229.09:41:32.09#ibcon#read 5, iclass 29, count 2 2006.229.09:41:32.09#ibcon#about to read 6, iclass 29, count 2 2006.229.09:41:32.09#ibcon#read 6, iclass 29, count 2 2006.229.09:41:32.09#ibcon#end of sib2, iclass 29, count 2 2006.229.09:41:32.09#ibcon#*mode == 0, iclass 29, count 2 2006.229.09:41:32.09#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.09:41:32.09#ibcon#[27=AT02-04\r\n] 2006.229.09:41:32.09#ibcon#*before write, iclass 29, count 2 2006.229.09:41:32.09#ibcon#enter sib2, iclass 29, count 2 2006.229.09:41:32.09#ibcon#flushed, iclass 29, count 2 2006.229.09:41:32.09#ibcon#about to write, iclass 29, count 2 2006.229.09:41:32.09#ibcon#wrote, iclass 29, count 2 2006.229.09:41:32.09#ibcon#about to read 3, iclass 29, count 2 2006.229.09:41:32.12#ibcon#read 3, iclass 29, count 2 2006.229.09:41:32.12#ibcon#about to read 4, iclass 29, count 2 2006.229.09:41:32.12#ibcon#read 4, iclass 29, count 2 2006.229.09:41:32.12#ibcon#about to read 5, iclass 29, count 2 2006.229.09:41:32.12#ibcon#read 5, iclass 29, count 2 2006.229.09:41:32.12#ibcon#about to read 6, iclass 29, count 2 2006.229.09:41:32.12#ibcon#read 6, iclass 29, count 2 2006.229.09:41:32.12#ibcon#end of sib2, iclass 29, count 2 2006.229.09:41:32.12#ibcon#*after write, iclass 29, count 2 2006.229.09:41:32.12#ibcon#*before return 0, iclass 29, count 2 2006.229.09:41:32.12#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:32.12#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:41:32.12#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.09:41:32.12#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:32.12#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:32.24#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:32.24#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:32.24#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:41:32.24#ibcon#first serial, iclass 29, count 0 2006.229.09:41:32.24#ibcon#enter sib2, iclass 29, count 0 2006.229.09:41:32.24#ibcon#flushed, iclass 29, count 0 2006.229.09:41:32.24#ibcon#about to write, iclass 29, count 0 2006.229.09:41:32.24#ibcon#wrote, iclass 29, count 0 2006.229.09:41:32.24#ibcon#about to read 3, iclass 29, count 0 2006.229.09:41:32.26#ibcon#read 3, iclass 29, count 0 2006.229.09:41:32.26#ibcon#about to read 4, iclass 29, count 0 2006.229.09:41:32.26#ibcon#read 4, iclass 29, count 0 2006.229.09:41:32.26#ibcon#about to read 5, iclass 29, count 0 2006.229.09:41:32.26#ibcon#read 5, iclass 29, count 0 2006.229.09:41:32.26#ibcon#about to read 6, iclass 29, count 0 2006.229.09:41:32.26#ibcon#read 6, iclass 29, count 0 2006.229.09:41:32.26#ibcon#end of sib2, iclass 29, count 0 2006.229.09:41:32.26#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:41:32.26#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:41:32.26#ibcon#[27=USB\r\n] 2006.229.09:41:32.26#ibcon#*before write, iclass 29, count 0 2006.229.09:41:32.26#ibcon#enter sib2, iclass 29, count 0 2006.229.09:41:32.26#ibcon#flushed, iclass 29, count 0 2006.229.09:41:32.26#ibcon#about to write, iclass 29, count 0 2006.229.09:41:32.26#ibcon#wrote, iclass 29, count 0 2006.229.09:41:32.26#ibcon#about to read 3, iclass 29, count 0 2006.229.09:41:32.29#ibcon#read 3, iclass 29, count 0 2006.229.09:41:32.29#ibcon#about to read 4, iclass 29, count 0 2006.229.09:41:32.29#ibcon#read 4, iclass 29, count 0 2006.229.09:41:32.29#ibcon#about to read 5, iclass 29, count 0 2006.229.09:41:32.29#ibcon#read 5, iclass 29, count 0 2006.229.09:41:32.29#ibcon#about to read 6, iclass 29, count 0 2006.229.09:41:32.29#ibcon#read 6, iclass 29, count 0 2006.229.09:41:32.29#ibcon#end of sib2, iclass 29, count 0 2006.229.09:41:32.29#ibcon#*after write, iclass 29, count 0 2006.229.09:41:32.29#ibcon#*before return 0, iclass 29, count 0 2006.229.09:41:32.29#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:32.29#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:41:32.29#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:41:32.29#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:41:32.29$vck44/vblo=3,649.99 2006.229.09:41:32.29#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.09:41:32.29#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.09:41:32.29#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:32.29#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:32.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:32.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:32.29#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:41:32.29#ibcon#first serial, iclass 31, count 0 2006.229.09:41:32.29#ibcon#enter sib2, iclass 31, count 0 2006.229.09:41:32.29#ibcon#flushed, iclass 31, count 0 2006.229.09:41:32.29#ibcon#about to write, iclass 31, count 0 2006.229.09:41:32.29#ibcon#wrote, iclass 31, count 0 2006.229.09:41:32.29#ibcon#about to read 3, iclass 31, count 0 2006.229.09:41:32.31#ibcon#read 3, iclass 31, count 0 2006.229.09:41:32.31#ibcon#about to read 4, iclass 31, count 0 2006.229.09:41:32.31#ibcon#read 4, iclass 31, count 0 2006.229.09:41:32.31#ibcon#about to read 5, iclass 31, count 0 2006.229.09:41:32.31#ibcon#read 5, iclass 31, count 0 2006.229.09:41:32.31#ibcon#about to read 6, iclass 31, count 0 2006.229.09:41:32.31#ibcon#read 6, iclass 31, count 0 2006.229.09:41:32.31#ibcon#end of sib2, iclass 31, count 0 2006.229.09:41:32.31#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:41:32.31#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:41:32.31#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:41:32.31#ibcon#*before write, iclass 31, count 0 2006.229.09:41:32.31#ibcon#enter sib2, iclass 31, count 0 2006.229.09:41:32.31#ibcon#flushed, iclass 31, count 0 2006.229.09:41:32.31#ibcon#about to write, iclass 31, count 0 2006.229.09:41:32.31#ibcon#wrote, iclass 31, count 0 2006.229.09:41:32.31#ibcon#about to read 3, iclass 31, count 0 2006.229.09:41:32.35#ibcon#read 3, iclass 31, count 0 2006.229.09:41:32.35#ibcon#about to read 4, iclass 31, count 0 2006.229.09:41:32.35#ibcon#read 4, iclass 31, count 0 2006.229.09:41:32.35#ibcon#about to read 5, iclass 31, count 0 2006.229.09:41:32.35#ibcon#read 5, iclass 31, count 0 2006.229.09:41:32.35#ibcon#about to read 6, iclass 31, count 0 2006.229.09:41:32.35#ibcon#read 6, iclass 31, count 0 2006.229.09:41:32.35#ibcon#end of sib2, iclass 31, count 0 2006.229.09:41:32.35#ibcon#*after write, iclass 31, count 0 2006.229.09:41:32.35#ibcon#*before return 0, iclass 31, count 0 2006.229.09:41:32.35#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:32.35#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:41:32.35#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:41:32.35#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:41:32.35$vck44/vb=3,4 2006.229.09:41:32.35#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.09:41:32.35#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.09:41:32.35#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:32.35#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:32.41#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:32.41#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:32.41#ibcon#enter wrdev, iclass 33, count 2 2006.229.09:41:32.41#ibcon#first serial, iclass 33, count 2 2006.229.09:41:32.41#ibcon#enter sib2, iclass 33, count 2 2006.229.09:41:32.41#ibcon#flushed, iclass 33, count 2 2006.229.09:41:32.41#ibcon#about to write, iclass 33, count 2 2006.229.09:41:32.41#ibcon#wrote, iclass 33, count 2 2006.229.09:41:32.41#ibcon#about to read 3, iclass 33, count 2 2006.229.09:41:32.43#ibcon#read 3, iclass 33, count 2 2006.229.09:41:32.43#ibcon#about to read 4, iclass 33, count 2 2006.229.09:41:32.43#ibcon#read 4, iclass 33, count 2 2006.229.09:41:32.43#ibcon#about to read 5, iclass 33, count 2 2006.229.09:41:32.43#ibcon#read 5, iclass 33, count 2 2006.229.09:41:32.43#ibcon#about to read 6, iclass 33, count 2 2006.229.09:41:32.43#ibcon#read 6, iclass 33, count 2 2006.229.09:41:32.43#ibcon#end of sib2, iclass 33, count 2 2006.229.09:41:32.43#ibcon#*mode == 0, iclass 33, count 2 2006.229.09:41:32.43#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.09:41:32.43#ibcon#[27=AT03-04\r\n] 2006.229.09:41:32.43#ibcon#*before write, iclass 33, count 2 2006.229.09:41:32.43#ibcon#enter sib2, iclass 33, count 2 2006.229.09:41:32.43#ibcon#flushed, iclass 33, count 2 2006.229.09:41:32.43#ibcon#about to write, iclass 33, count 2 2006.229.09:41:32.43#ibcon#wrote, iclass 33, count 2 2006.229.09:41:32.43#ibcon#about to read 3, iclass 33, count 2 2006.229.09:41:32.46#ibcon#read 3, iclass 33, count 2 2006.229.09:41:32.46#ibcon#about to read 4, iclass 33, count 2 2006.229.09:41:32.46#ibcon#read 4, iclass 33, count 2 2006.229.09:41:32.46#ibcon#about to read 5, iclass 33, count 2 2006.229.09:41:32.46#ibcon#read 5, iclass 33, count 2 2006.229.09:41:32.46#ibcon#about to read 6, iclass 33, count 2 2006.229.09:41:32.46#ibcon#read 6, iclass 33, count 2 2006.229.09:41:32.46#ibcon#end of sib2, iclass 33, count 2 2006.229.09:41:32.46#ibcon#*after write, iclass 33, count 2 2006.229.09:41:32.46#ibcon#*before return 0, iclass 33, count 2 2006.229.09:41:32.46#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:32.46#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:41:32.46#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.09:41:32.46#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:32.46#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:32.58#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:32.58#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:32.58#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:41:32.58#ibcon#first serial, iclass 33, count 0 2006.229.09:41:32.58#ibcon#enter sib2, iclass 33, count 0 2006.229.09:41:32.58#ibcon#flushed, iclass 33, count 0 2006.229.09:41:32.58#ibcon#about to write, iclass 33, count 0 2006.229.09:41:32.58#ibcon#wrote, iclass 33, count 0 2006.229.09:41:32.58#ibcon#about to read 3, iclass 33, count 0 2006.229.09:41:32.60#ibcon#read 3, iclass 33, count 0 2006.229.09:41:32.60#ibcon#about to read 4, iclass 33, count 0 2006.229.09:41:32.60#ibcon#read 4, iclass 33, count 0 2006.229.09:41:32.60#ibcon#about to read 5, iclass 33, count 0 2006.229.09:41:32.60#ibcon#read 5, iclass 33, count 0 2006.229.09:41:32.60#ibcon#about to read 6, iclass 33, count 0 2006.229.09:41:32.60#ibcon#read 6, iclass 33, count 0 2006.229.09:41:32.60#ibcon#end of sib2, iclass 33, count 0 2006.229.09:41:32.60#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:41:32.60#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:41:32.60#ibcon#[27=USB\r\n] 2006.229.09:41:32.60#ibcon#*before write, iclass 33, count 0 2006.229.09:41:32.60#ibcon#enter sib2, iclass 33, count 0 2006.229.09:41:32.60#ibcon#flushed, iclass 33, count 0 2006.229.09:41:32.60#ibcon#about to write, iclass 33, count 0 2006.229.09:41:32.60#ibcon#wrote, iclass 33, count 0 2006.229.09:41:32.60#ibcon#about to read 3, iclass 33, count 0 2006.229.09:41:32.63#ibcon#read 3, iclass 33, count 0 2006.229.09:41:32.63#ibcon#about to read 4, iclass 33, count 0 2006.229.09:41:32.63#ibcon#read 4, iclass 33, count 0 2006.229.09:41:32.63#ibcon#about to read 5, iclass 33, count 0 2006.229.09:41:32.63#ibcon#read 5, iclass 33, count 0 2006.229.09:41:32.63#ibcon#about to read 6, iclass 33, count 0 2006.229.09:41:32.63#ibcon#read 6, iclass 33, count 0 2006.229.09:41:32.63#ibcon#end of sib2, iclass 33, count 0 2006.229.09:41:32.63#ibcon#*after write, iclass 33, count 0 2006.229.09:41:32.63#ibcon#*before return 0, iclass 33, count 0 2006.229.09:41:32.63#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:32.63#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:41:32.63#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:41:32.63#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:41:32.63$vck44/vblo=4,679.99 2006.229.09:41:32.63#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.09:41:32.63#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.09:41:32.63#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:32.63#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:32.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:32.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:32.63#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:41:32.63#ibcon#first serial, iclass 35, count 0 2006.229.09:41:32.63#ibcon#enter sib2, iclass 35, count 0 2006.229.09:41:32.63#ibcon#flushed, iclass 35, count 0 2006.229.09:41:32.63#ibcon#about to write, iclass 35, count 0 2006.229.09:41:32.63#ibcon#wrote, iclass 35, count 0 2006.229.09:41:32.63#ibcon#about to read 3, iclass 35, count 0 2006.229.09:41:32.65#ibcon#read 3, iclass 35, count 0 2006.229.09:41:32.65#ibcon#about to read 4, iclass 35, count 0 2006.229.09:41:32.65#ibcon#read 4, iclass 35, count 0 2006.229.09:41:32.65#ibcon#about to read 5, iclass 35, count 0 2006.229.09:41:32.65#ibcon#read 5, iclass 35, count 0 2006.229.09:41:32.65#ibcon#about to read 6, iclass 35, count 0 2006.229.09:41:32.65#ibcon#read 6, iclass 35, count 0 2006.229.09:41:32.65#ibcon#end of sib2, iclass 35, count 0 2006.229.09:41:32.65#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:41:32.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:41:32.65#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:41:32.65#ibcon#*before write, iclass 35, count 0 2006.229.09:41:32.65#ibcon#enter sib2, iclass 35, count 0 2006.229.09:41:32.65#ibcon#flushed, iclass 35, count 0 2006.229.09:41:32.65#ibcon#about to write, iclass 35, count 0 2006.229.09:41:32.65#ibcon#wrote, iclass 35, count 0 2006.229.09:41:32.65#ibcon#about to read 3, iclass 35, count 0 2006.229.09:41:32.69#ibcon#read 3, iclass 35, count 0 2006.229.09:41:32.69#ibcon#about to read 4, iclass 35, count 0 2006.229.09:41:32.69#ibcon#read 4, iclass 35, count 0 2006.229.09:41:32.69#ibcon#about to read 5, iclass 35, count 0 2006.229.09:41:32.69#ibcon#read 5, iclass 35, count 0 2006.229.09:41:32.69#ibcon#about to read 6, iclass 35, count 0 2006.229.09:41:32.69#ibcon#read 6, iclass 35, count 0 2006.229.09:41:32.69#ibcon#end of sib2, iclass 35, count 0 2006.229.09:41:32.69#ibcon#*after write, iclass 35, count 0 2006.229.09:41:32.69#ibcon#*before return 0, iclass 35, count 0 2006.229.09:41:32.69#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:32.69#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:41:32.69#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:41:32.69#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:41:32.69$vck44/vb=4,4 2006.229.09:41:32.69#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.09:41:32.69#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.09:41:32.69#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:32.69#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:32.75#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:32.75#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:32.75#ibcon#enter wrdev, iclass 37, count 2 2006.229.09:41:32.75#ibcon#first serial, iclass 37, count 2 2006.229.09:41:32.75#ibcon#enter sib2, iclass 37, count 2 2006.229.09:41:32.75#ibcon#flushed, iclass 37, count 2 2006.229.09:41:32.75#ibcon#about to write, iclass 37, count 2 2006.229.09:41:32.75#ibcon#wrote, iclass 37, count 2 2006.229.09:41:32.75#ibcon#about to read 3, iclass 37, count 2 2006.229.09:41:32.77#ibcon#read 3, iclass 37, count 2 2006.229.09:41:32.77#ibcon#about to read 4, iclass 37, count 2 2006.229.09:41:32.77#ibcon#read 4, iclass 37, count 2 2006.229.09:41:32.77#ibcon#about to read 5, iclass 37, count 2 2006.229.09:41:32.77#ibcon#read 5, iclass 37, count 2 2006.229.09:41:32.77#ibcon#about to read 6, iclass 37, count 2 2006.229.09:41:32.77#ibcon#read 6, iclass 37, count 2 2006.229.09:41:32.77#ibcon#end of sib2, iclass 37, count 2 2006.229.09:41:32.77#ibcon#*mode == 0, iclass 37, count 2 2006.229.09:41:32.77#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.09:41:32.77#ibcon#[27=AT04-04\r\n] 2006.229.09:41:32.77#ibcon#*before write, iclass 37, count 2 2006.229.09:41:32.77#ibcon#enter sib2, iclass 37, count 2 2006.229.09:41:32.77#ibcon#flushed, iclass 37, count 2 2006.229.09:41:32.77#ibcon#about to write, iclass 37, count 2 2006.229.09:41:32.77#ibcon#wrote, iclass 37, count 2 2006.229.09:41:32.77#ibcon#about to read 3, iclass 37, count 2 2006.229.09:41:32.80#ibcon#read 3, iclass 37, count 2 2006.229.09:41:32.80#ibcon#about to read 4, iclass 37, count 2 2006.229.09:41:32.80#ibcon#read 4, iclass 37, count 2 2006.229.09:41:32.80#ibcon#about to read 5, iclass 37, count 2 2006.229.09:41:32.80#ibcon#read 5, iclass 37, count 2 2006.229.09:41:32.80#ibcon#about to read 6, iclass 37, count 2 2006.229.09:41:32.80#ibcon#read 6, iclass 37, count 2 2006.229.09:41:32.80#ibcon#end of sib2, iclass 37, count 2 2006.229.09:41:32.80#ibcon#*after write, iclass 37, count 2 2006.229.09:41:32.80#ibcon#*before return 0, iclass 37, count 2 2006.229.09:41:32.80#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:32.80#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:41:32.80#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.09:41:32.80#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:32.80#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:32.92#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:32.92#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:32.92#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:41:32.92#ibcon#first serial, iclass 37, count 0 2006.229.09:41:32.92#ibcon#enter sib2, iclass 37, count 0 2006.229.09:41:32.92#ibcon#flushed, iclass 37, count 0 2006.229.09:41:32.92#ibcon#about to write, iclass 37, count 0 2006.229.09:41:32.92#ibcon#wrote, iclass 37, count 0 2006.229.09:41:32.92#ibcon#about to read 3, iclass 37, count 0 2006.229.09:41:32.94#ibcon#read 3, iclass 37, count 0 2006.229.09:41:32.94#ibcon#about to read 4, iclass 37, count 0 2006.229.09:41:32.94#ibcon#read 4, iclass 37, count 0 2006.229.09:41:32.94#ibcon#about to read 5, iclass 37, count 0 2006.229.09:41:32.94#ibcon#read 5, iclass 37, count 0 2006.229.09:41:32.94#ibcon#about to read 6, iclass 37, count 0 2006.229.09:41:32.94#ibcon#read 6, iclass 37, count 0 2006.229.09:41:32.94#ibcon#end of sib2, iclass 37, count 0 2006.229.09:41:32.94#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:41:32.94#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:41:32.94#ibcon#[27=USB\r\n] 2006.229.09:41:32.94#ibcon#*before write, iclass 37, count 0 2006.229.09:41:32.94#ibcon#enter sib2, iclass 37, count 0 2006.229.09:41:32.94#ibcon#flushed, iclass 37, count 0 2006.229.09:41:32.94#ibcon#about to write, iclass 37, count 0 2006.229.09:41:32.94#ibcon#wrote, iclass 37, count 0 2006.229.09:41:32.94#ibcon#about to read 3, iclass 37, count 0 2006.229.09:41:32.97#ibcon#read 3, iclass 37, count 0 2006.229.09:41:32.97#ibcon#about to read 4, iclass 37, count 0 2006.229.09:41:32.97#ibcon#read 4, iclass 37, count 0 2006.229.09:41:32.97#ibcon#about to read 5, iclass 37, count 0 2006.229.09:41:32.97#ibcon#read 5, iclass 37, count 0 2006.229.09:41:32.97#ibcon#about to read 6, iclass 37, count 0 2006.229.09:41:32.97#ibcon#read 6, iclass 37, count 0 2006.229.09:41:32.97#ibcon#end of sib2, iclass 37, count 0 2006.229.09:41:32.97#ibcon#*after write, iclass 37, count 0 2006.229.09:41:32.97#ibcon#*before return 0, iclass 37, count 0 2006.229.09:41:32.97#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:32.97#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:41:32.97#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:41:32.97#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:41:32.97$vck44/vblo=5,709.99 2006.229.09:41:32.97#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.09:41:32.97#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.09:41:32.97#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:32.97#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:32.97#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:32.97#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:32.97#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:41:32.97#ibcon#first serial, iclass 39, count 0 2006.229.09:41:32.97#ibcon#enter sib2, iclass 39, count 0 2006.229.09:41:32.97#ibcon#flushed, iclass 39, count 0 2006.229.09:41:32.97#ibcon#about to write, iclass 39, count 0 2006.229.09:41:32.97#ibcon#wrote, iclass 39, count 0 2006.229.09:41:32.97#ibcon#about to read 3, iclass 39, count 0 2006.229.09:41:32.99#ibcon#read 3, iclass 39, count 0 2006.229.09:41:32.99#ibcon#about to read 4, iclass 39, count 0 2006.229.09:41:32.99#ibcon#read 4, iclass 39, count 0 2006.229.09:41:32.99#ibcon#about to read 5, iclass 39, count 0 2006.229.09:41:32.99#ibcon#read 5, iclass 39, count 0 2006.229.09:41:32.99#ibcon#about to read 6, iclass 39, count 0 2006.229.09:41:32.99#ibcon#read 6, iclass 39, count 0 2006.229.09:41:32.99#ibcon#end of sib2, iclass 39, count 0 2006.229.09:41:32.99#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:41:32.99#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:41:32.99#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:41:32.99#ibcon#*before write, iclass 39, count 0 2006.229.09:41:32.99#ibcon#enter sib2, iclass 39, count 0 2006.229.09:41:32.99#ibcon#flushed, iclass 39, count 0 2006.229.09:41:32.99#ibcon#about to write, iclass 39, count 0 2006.229.09:41:32.99#ibcon#wrote, iclass 39, count 0 2006.229.09:41:32.99#ibcon#about to read 3, iclass 39, count 0 2006.229.09:41:33.03#ibcon#read 3, iclass 39, count 0 2006.229.09:41:33.03#ibcon#about to read 4, iclass 39, count 0 2006.229.09:41:33.03#ibcon#read 4, iclass 39, count 0 2006.229.09:41:33.03#ibcon#about to read 5, iclass 39, count 0 2006.229.09:41:33.03#ibcon#read 5, iclass 39, count 0 2006.229.09:41:33.03#ibcon#about to read 6, iclass 39, count 0 2006.229.09:41:33.03#ibcon#read 6, iclass 39, count 0 2006.229.09:41:33.03#ibcon#end of sib2, iclass 39, count 0 2006.229.09:41:33.03#ibcon#*after write, iclass 39, count 0 2006.229.09:41:33.03#ibcon#*before return 0, iclass 39, count 0 2006.229.09:41:33.03#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:33.03#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:41:33.03#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:41:33.03#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:41:33.03$vck44/vb=5,4 2006.229.09:41:33.03#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.09:41:33.03#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.09:41:33.03#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:33.03#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:33.09#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:33.09#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:33.09#ibcon#enter wrdev, iclass 3, count 2 2006.229.09:41:33.09#ibcon#first serial, iclass 3, count 2 2006.229.09:41:33.09#ibcon#enter sib2, iclass 3, count 2 2006.229.09:41:33.09#ibcon#flushed, iclass 3, count 2 2006.229.09:41:33.09#ibcon#about to write, iclass 3, count 2 2006.229.09:41:33.09#ibcon#wrote, iclass 3, count 2 2006.229.09:41:33.09#ibcon#about to read 3, iclass 3, count 2 2006.229.09:41:33.11#ibcon#read 3, iclass 3, count 2 2006.229.09:41:33.11#ibcon#about to read 4, iclass 3, count 2 2006.229.09:41:33.11#ibcon#read 4, iclass 3, count 2 2006.229.09:41:33.11#ibcon#about to read 5, iclass 3, count 2 2006.229.09:41:33.11#ibcon#read 5, iclass 3, count 2 2006.229.09:41:33.11#ibcon#about to read 6, iclass 3, count 2 2006.229.09:41:33.11#ibcon#read 6, iclass 3, count 2 2006.229.09:41:33.11#ibcon#end of sib2, iclass 3, count 2 2006.229.09:41:33.11#ibcon#*mode == 0, iclass 3, count 2 2006.229.09:41:33.11#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.09:41:33.11#ibcon#[27=AT05-04\r\n] 2006.229.09:41:33.11#ibcon#*before write, iclass 3, count 2 2006.229.09:41:33.11#ibcon#enter sib2, iclass 3, count 2 2006.229.09:41:33.11#ibcon#flushed, iclass 3, count 2 2006.229.09:41:33.11#ibcon#about to write, iclass 3, count 2 2006.229.09:41:33.59#ibcon#wrote, iclass 3, count 2 2006.229.09:41:33.59#ibcon#about to read 3, iclass 3, count 2 2006.229.09:41:33.27#abcon#<5=/05 2.0 4.1 28.87 971001.0\r\n> 2006.229.09:41:33.61#abcon#{5=INTERFACE CLEAR} 2006.229.09:41:33.62#ibcon#read 3, iclass 3, count 2 2006.229.09:41:33.62#ibcon#about to read 4, iclass 3, count 2 2006.229.09:41:33.62#ibcon#read 4, iclass 3, count 2 2006.229.09:41:33.62#ibcon#about to read 5, iclass 3, count 2 2006.229.09:41:33.62#ibcon#read 5, iclass 3, count 2 2006.229.09:41:33.62#ibcon#about to read 6, iclass 3, count 2 2006.229.09:41:33.62#ibcon#read 6, iclass 3, count 2 2006.229.09:41:33.62#ibcon#end of sib2, iclass 3, count 2 2006.229.09:41:33.62#ibcon#*after write, iclass 3, count 2 2006.229.09:41:33.62#ibcon#*before return 0, iclass 3, count 2 2006.229.09:41:33.62#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:33.62#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:41:33.62#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.09:41:33.62#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:33.62#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:33.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:41:33.74#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:33.74#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:33.74#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:41:33.74#ibcon#first serial, iclass 3, count 0 2006.229.09:41:33.74#ibcon#enter sib2, iclass 3, count 0 2006.229.09:41:33.74#ibcon#flushed, iclass 3, count 0 2006.229.09:41:33.74#ibcon#about to write, iclass 3, count 0 2006.229.09:41:33.74#ibcon#wrote, iclass 3, count 0 2006.229.09:41:33.74#ibcon#about to read 3, iclass 3, count 0 2006.229.09:41:33.76#ibcon#read 3, iclass 3, count 0 2006.229.09:41:33.76#ibcon#about to read 4, iclass 3, count 0 2006.229.09:41:33.76#ibcon#read 4, iclass 3, count 0 2006.229.09:41:33.76#ibcon#about to read 5, iclass 3, count 0 2006.229.09:41:33.76#ibcon#read 5, iclass 3, count 0 2006.229.09:41:33.76#ibcon#about to read 6, iclass 3, count 0 2006.229.09:41:33.76#ibcon#read 6, iclass 3, count 0 2006.229.09:41:33.76#ibcon#end of sib2, iclass 3, count 0 2006.229.09:41:33.76#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:41:33.76#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:41:33.76#ibcon#[27=USB\r\n] 2006.229.09:41:33.76#ibcon#*before write, iclass 3, count 0 2006.229.09:41:33.76#ibcon#enter sib2, iclass 3, count 0 2006.229.09:41:33.76#ibcon#flushed, iclass 3, count 0 2006.229.09:41:33.76#ibcon#about to write, iclass 3, count 0 2006.229.09:41:33.76#ibcon#wrote, iclass 3, count 0 2006.229.09:41:33.76#ibcon#about to read 3, iclass 3, count 0 2006.229.09:41:33.79#ibcon#read 3, iclass 3, count 0 2006.229.09:41:33.79#ibcon#about to read 4, iclass 3, count 0 2006.229.09:41:33.79#ibcon#read 4, iclass 3, count 0 2006.229.09:41:33.79#ibcon#about to read 5, iclass 3, count 0 2006.229.09:41:33.79#ibcon#read 5, iclass 3, count 0 2006.229.09:41:33.79#ibcon#about to read 6, iclass 3, count 0 2006.229.09:41:33.79#ibcon#read 6, iclass 3, count 0 2006.229.09:41:33.79#ibcon#end of sib2, iclass 3, count 0 2006.229.09:41:33.79#ibcon#*after write, iclass 3, count 0 2006.229.09:41:33.79#ibcon#*before return 0, iclass 3, count 0 2006.229.09:41:33.79#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:33.79#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:41:33.79#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:41:33.79#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:41:33.79$vck44/vblo=6,719.99 2006.229.09:41:33.79#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:41:33.79#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:41:33.79#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:33.79#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:33.79#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:33.79#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:33.79#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:41:33.79#ibcon#first serial, iclass 11, count 0 2006.229.09:41:33.79#ibcon#enter sib2, iclass 11, count 0 2006.229.09:41:33.79#ibcon#flushed, iclass 11, count 0 2006.229.09:41:33.79#ibcon#about to write, iclass 11, count 0 2006.229.09:41:33.79#ibcon#wrote, iclass 11, count 0 2006.229.09:41:33.79#ibcon#about to read 3, iclass 11, count 0 2006.229.09:41:33.81#ibcon#read 3, iclass 11, count 0 2006.229.09:41:33.81#ibcon#about to read 4, iclass 11, count 0 2006.229.09:41:33.81#ibcon#read 4, iclass 11, count 0 2006.229.09:41:33.81#ibcon#about to read 5, iclass 11, count 0 2006.229.09:41:33.81#ibcon#read 5, iclass 11, count 0 2006.229.09:41:33.81#ibcon#about to read 6, iclass 11, count 0 2006.229.09:41:33.81#ibcon#read 6, iclass 11, count 0 2006.229.09:41:33.81#ibcon#end of sib2, iclass 11, count 0 2006.229.09:41:33.81#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:41:33.81#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:41:33.81#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:41:33.81#ibcon#*before write, iclass 11, count 0 2006.229.09:41:33.81#ibcon#enter sib2, iclass 11, count 0 2006.229.09:41:33.81#ibcon#flushed, iclass 11, count 0 2006.229.09:41:33.81#ibcon#about to write, iclass 11, count 0 2006.229.09:41:33.81#ibcon#wrote, iclass 11, count 0 2006.229.09:41:33.81#ibcon#about to read 3, iclass 11, count 0 2006.229.09:41:33.85#ibcon#read 3, iclass 11, count 0 2006.229.09:41:33.85#ibcon#about to read 4, iclass 11, count 0 2006.229.09:41:33.85#ibcon#read 4, iclass 11, count 0 2006.229.09:41:33.85#ibcon#about to read 5, iclass 11, count 0 2006.229.09:41:33.85#ibcon#read 5, iclass 11, count 0 2006.229.09:41:33.85#ibcon#about to read 6, iclass 11, count 0 2006.229.09:41:33.85#ibcon#read 6, iclass 11, count 0 2006.229.09:41:33.85#ibcon#end of sib2, iclass 11, count 0 2006.229.09:41:33.85#ibcon#*after write, iclass 11, count 0 2006.229.09:41:33.85#ibcon#*before return 0, iclass 11, count 0 2006.229.09:41:33.85#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:33.85#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:41:33.85#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:41:33.85#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:41:33.85$vck44/vb=6,4 2006.229.09:41:33.85#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.09:41:33.85#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.09:41:33.85#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:33.85#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:33.91#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:33.91#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:33.91#ibcon#enter wrdev, iclass 13, count 2 2006.229.09:41:33.91#ibcon#first serial, iclass 13, count 2 2006.229.09:41:33.91#ibcon#enter sib2, iclass 13, count 2 2006.229.09:41:33.91#ibcon#flushed, iclass 13, count 2 2006.229.09:41:33.91#ibcon#about to write, iclass 13, count 2 2006.229.09:41:33.91#ibcon#wrote, iclass 13, count 2 2006.229.09:41:33.91#ibcon#about to read 3, iclass 13, count 2 2006.229.09:41:33.93#ibcon#read 3, iclass 13, count 2 2006.229.09:41:33.93#ibcon#about to read 4, iclass 13, count 2 2006.229.09:41:33.93#ibcon#read 4, iclass 13, count 2 2006.229.09:41:33.93#ibcon#about to read 5, iclass 13, count 2 2006.229.09:41:33.93#ibcon#read 5, iclass 13, count 2 2006.229.09:41:33.93#ibcon#about to read 6, iclass 13, count 2 2006.229.09:41:33.93#ibcon#read 6, iclass 13, count 2 2006.229.09:41:33.93#ibcon#end of sib2, iclass 13, count 2 2006.229.09:41:33.93#ibcon#*mode == 0, iclass 13, count 2 2006.229.09:41:33.93#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.09:41:33.93#ibcon#[27=AT06-04\r\n] 2006.229.09:41:33.93#ibcon#*before write, iclass 13, count 2 2006.229.09:41:33.93#ibcon#enter sib2, iclass 13, count 2 2006.229.09:41:33.93#ibcon#flushed, iclass 13, count 2 2006.229.09:41:33.93#ibcon#about to write, iclass 13, count 2 2006.229.09:41:33.93#ibcon#wrote, iclass 13, count 2 2006.229.09:41:33.93#ibcon#about to read 3, iclass 13, count 2 2006.229.09:41:33.96#ibcon#read 3, iclass 13, count 2 2006.229.09:41:33.96#ibcon#about to read 4, iclass 13, count 2 2006.229.09:41:33.96#ibcon#read 4, iclass 13, count 2 2006.229.09:41:33.96#ibcon#about to read 5, iclass 13, count 2 2006.229.09:41:33.96#ibcon#read 5, iclass 13, count 2 2006.229.09:41:33.96#ibcon#about to read 6, iclass 13, count 2 2006.229.09:41:33.96#ibcon#read 6, iclass 13, count 2 2006.229.09:41:33.96#ibcon#end of sib2, iclass 13, count 2 2006.229.09:41:33.96#ibcon#*after write, iclass 13, count 2 2006.229.09:41:33.96#ibcon#*before return 0, iclass 13, count 2 2006.229.09:41:33.96#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:33.96#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:41:33.96#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.09:41:33.96#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:33.96#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:34.08#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:34.08#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:34.08#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:41:34.08#ibcon#first serial, iclass 13, count 0 2006.229.09:41:34.08#ibcon#enter sib2, iclass 13, count 0 2006.229.09:41:34.08#ibcon#flushed, iclass 13, count 0 2006.229.09:41:34.08#ibcon#about to write, iclass 13, count 0 2006.229.09:41:34.08#ibcon#wrote, iclass 13, count 0 2006.229.09:41:34.08#ibcon#about to read 3, iclass 13, count 0 2006.229.09:41:34.10#ibcon#read 3, iclass 13, count 0 2006.229.09:41:34.10#ibcon#about to read 4, iclass 13, count 0 2006.229.09:41:34.10#ibcon#read 4, iclass 13, count 0 2006.229.09:41:34.10#ibcon#about to read 5, iclass 13, count 0 2006.229.09:41:34.10#ibcon#read 5, iclass 13, count 0 2006.229.09:41:34.10#ibcon#about to read 6, iclass 13, count 0 2006.229.09:41:34.10#ibcon#read 6, iclass 13, count 0 2006.229.09:41:34.10#ibcon#end of sib2, iclass 13, count 0 2006.229.09:41:34.10#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:41:34.10#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:41:34.10#ibcon#[27=USB\r\n] 2006.229.09:41:34.10#ibcon#*before write, iclass 13, count 0 2006.229.09:41:34.10#ibcon#enter sib2, iclass 13, count 0 2006.229.09:41:34.10#ibcon#flushed, iclass 13, count 0 2006.229.09:41:34.10#ibcon#about to write, iclass 13, count 0 2006.229.09:41:34.10#ibcon#wrote, iclass 13, count 0 2006.229.09:41:34.10#ibcon#about to read 3, iclass 13, count 0 2006.229.09:41:34.13#ibcon#read 3, iclass 13, count 0 2006.229.09:41:34.13#ibcon#about to read 4, iclass 13, count 0 2006.229.09:41:34.13#ibcon#read 4, iclass 13, count 0 2006.229.09:41:34.13#ibcon#about to read 5, iclass 13, count 0 2006.229.09:41:34.13#ibcon#read 5, iclass 13, count 0 2006.229.09:41:34.13#ibcon#about to read 6, iclass 13, count 0 2006.229.09:41:34.13#ibcon#read 6, iclass 13, count 0 2006.229.09:41:34.13#ibcon#end of sib2, iclass 13, count 0 2006.229.09:41:34.13#ibcon#*after write, iclass 13, count 0 2006.229.09:41:34.13#ibcon#*before return 0, iclass 13, count 0 2006.229.09:41:34.13#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:34.13#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:41:34.13#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:41:34.13#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:41:34.13$vck44/vblo=7,734.99 2006.229.09:41:34.13#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.09:41:34.13#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.09:41:34.13#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:34.13#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:34.13#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:34.13#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:34.13#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:41:34.13#ibcon#first serial, iclass 15, count 0 2006.229.09:41:34.13#ibcon#enter sib2, iclass 15, count 0 2006.229.09:41:34.13#ibcon#flushed, iclass 15, count 0 2006.229.09:41:34.13#ibcon#about to write, iclass 15, count 0 2006.229.09:41:34.13#ibcon#wrote, iclass 15, count 0 2006.229.09:41:34.13#ibcon#about to read 3, iclass 15, count 0 2006.229.09:41:34.15#ibcon#read 3, iclass 15, count 0 2006.229.09:41:34.15#ibcon#about to read 4, iclass 15, count 0 2006.229.09:41:34.15#ibcon#read 4, iclass 15, count 0 2006.229.09:41:34.15#ibcon#about to read 5, iclass 15, count 0 2006.229.09:41:34.15#ibcon#read 5, iclass 15, count 0 2006.229.09:41:34.15#ibcon#about to read 6, iclass 15, count 0 2006.229.09:41:34.15#ibcon#read 6, iclass 15, count 0 2006.229.09:41:34.15#ibcon#end of sib2, iclass 15, count 0 2006.229.09:41:34.15#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:41:34.15#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:41:34.15#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:41:34.15#ibcon#*before write, iclass 15, count 0 2006.229.09:41:34.15#ibcon#enter sib2, iclass 15, count 0 2006.229.09:41:34.15#ibcon#flushed, iclass 15, count 0 2006.229.09:41:34.15#ibcon#about to write, iclass 15, count 0 2006.229.09:41:34.15#ibcon#wrote, iclass 15, count 0 2006.229.09:41:34.15#ibcon#about to read 3, iclass 15, count 0 2006.229.09:41:34.19#ibcon#read 3, iclass 15, count 0 2006.229.09:41:34.19#ibcon#about to read 4, iclass 15, count 0 2006.229.09:41:34.19#ibcon#read 4, iclass 15, count 0 2006.229.09:41:34.19#ibcon#about to read 5, iclass 15, count 0 2006.229.09:41:34.19#ibcon#read 5, iclass 15, count 0 2006.229.09:41:34.19#ibcon#about to read 6, iclass 15, count 0 2006.229.09:41:34.19#ibcon#read 6, iclass 15, count 0 2006.229.09:41:34.19#ibcon#end of sib2, iclass 15, count 0 2006.229.09:41:34.19#ibcon#*after write, iclass 15, count 0 2006.229.09:41:34.19#ibcon#*before return 0, iclass 15, count 0 2006.229.09:41:34.19#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:34.19#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:41:34.19#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:41:34.19#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:41:34.19$vck44/vb=7,4 2006.229.09:41:34.19#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.09:41:34.19#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.09:41:34.19#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:34.19#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:34.25#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:34.25#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:34.25#ibcon#enter wrdev, iclass 17, count 2 2006.229.09:41:34.25#ibcon#first serial, iclass 17, count 2 2006.229.09:41:34.25#ibcon#enter sib2, iclass 17, count 2 2006.229.09:41:34.25#ibcon#flushed, iclass 17, count 2 2006.229.09:41:34.25#ibcon#about to write, iclass 17, count 2 2006.229.09:41:34.25#ibcon#wrote, iclass 17, count 2 2006.229.09:41:34.25#ibcon#about to read 3, iclass 17, count 2 2006.229.09:41:34.27#ibcon#read 3, iclass 17, count 2 2006.229.09:41:34.27#ibcon#about to read 4, iclass 17, count 2 2006.229.09:41:34.27#ibcon#read 4, iclass 17, count 2 2006.229.09:41:34.27#ibcon#about to read 5, iclass 17, count 2 2006.229.09:41:34.27#ibcon#read 5, iclass 17, count 2 2006.229.09:41:34.27#ibcon#about to read 6, iclass 17, count 2 2006.229.09:41:34.27#ibcon#read 6, iclass 17, count 2 2006.229.09:41:34.27#ibcon#end of sib2, iclass 17, count 2 2006.229.09:41:34.27#ibcon#*mode == 0, iclass 17, count 2 2006.229.09:41:34.27#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.09:41:34.27#ibcon#[27=AT07-04\r\n] 2006.229.09:41:34.27#ibcon#*before write, iclass 17, count 2 2006.229.09:41:34.27#ibcon#enter sib2, iclass 17, count 2 2006.229.09:41:34.27#ibcon#flushed, iclass 17, count 2 2006.229.09:41:34.27#ibcon#about to write, iclass 17, count 2 2006.229.09:41:34.27#ibcon#wrote, iclass 17, count 2 2006.229.09:41:34.27#ibcon#about to read 3, iclass 17, count 2 2006.229.09:41:34.30#ibcon#read 3, iclass 17, count 2 2006.229.09:41:34.30#ibcon#about to read 4, iclass 17, count 2 2006.229.09:41:34.30#ibcon#read 4, iclass 17, count 2 2006.229.09:41:34.30#ibcon#about to read 5, iclass 17, count 2 2006.229.09:41:34.30#ibcon#read 5, iclass 17, count 2 2006.229.09:41:34.30#ibcon#about to read 6, iclass 17, count 2 2006.229.09:41:34.30#ibcon#read 6, iclass 17, count 2 2006.229.09:41:34.30#ibcon#end of sib2, iclass 17, count 2 2006.229.09:41:34.30#ibcon#*after write, iclass 17, count 2 2006.229.09:41:34.30#ibcon#*before return 0, iclass 17, count 2 2006.229.09:41:34.30#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:34.30#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:41:34.30#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.09:41:34.30#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:34.30#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:34.42#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:34.42#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:34.42#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:41:34.42#ibcon#first serial, iclass 17, count 0 2006.229.09:41:34.42#ibcon#enter sib2, iclass 17, count 0 2006.229.09:41:34.42#ibcon#flushed, iclass 17, count 0 2006.229.09:41:34.42#ibcon#about to write, iclass 17, count 0 2006.229.09:41:34.42#ibcon#wrote, iclass 17, count 0 2006.229.09:41:34.42#ibcon#about to read 3, iclass 17, count 0 2006.229.09:41:34.44#ibcon#read 3, iclass 17, count 0 2006.229.09:41:34.44#ibcon#about to read 4, iclass 17, count 0 2006.229.09:41:34.44#ibcon#read 4, iclass 17, count 0 2006.229.09:41:34.44#ibcon#about to read 5, iclass 17, count 0 2006.229.09:41:34.44#ibcon#read 5, iclass 17, count 0 2006.229.09:41:34.44#ibcon#about to read 6, iclass 17, count 0 2006.229.09:41:34.44#ibcon#read 6, iclass 17, count 0 2006.229.09:41:34.44#ibcon#end of sib2, iclass 17, count 0 2006.229.09:41:34.44#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:41:34.44#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:41:34.44#ibcon#[27=USB\r\n] 2006.229.09:41:34.44#ibcon#*before write, iclass 17, count 0 2006.229.09:41:34.44#ibcon#enter sib2, iclass 17, count 0 2006.229.09:41:34.44#ibcon#flushed, iclass 17, count 0 2006.229.09:41:34.44#ibcon#about to write, iclass 17, count 0 2006.229.09:41:34.44#ibcon#wrote, iclass 17, count 0 2006.229.09:41:34.44#ibcon#about to read 3, iclass 17, count 0 2006.229.09:41:34.47#ibcon#read 3, iclass 17, count 0 2006.229.09:41:34.47#ibcon#about to read 4, iclass 17, count 0 2006.229.09:41:34.47#ibcon#read 4, iclass 17, count 0 2006.229.09:41:34.47#ibcon#about to read 5, iclass 17, count 0 2006.229.09:41:34.47#ibcon#read 5, iclass 17, count 0 2006.229.09:41:34.47#ibcon#about to read 6, iclass 17, count 0 2006.229.09:41:34.47#ibcon#read 6, iclass 17, count 0 2006.229.09:41:34.47#ibcon#end of sib2, iclass 17, count 0 2006.229.09:41:34.47#ibcon#*after write, iclass 17, count 0 2006.229.09:41:34.47#ibcon#*before return 0, iclass 17, count 0 2006.229.09:41:34.47#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:34.47#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:41:34.47#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:41:34.47#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:41:34.47$vck44/vblo=8,744.99 2006.229.09:41:34.47#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.09:41:34.47#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.09:41:34.47#ibcon#ireg 17 cls_cnt 0 2006.229.09:41:34.47#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:34.47#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:34.47#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:34.47#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:41:34.47#ibcon#first serial, iclass 19, count 0 2006.229.09:41:34.47#ibcon#enter sib2, iclass 19, count 0 2006.229.09:41:34.47#ibcon#flushed, iclass 19, count 0 2006.229.09:41:34.47#ibcon#about to write, iclass 19, count 0 2006.229.09:41:34.47#ibcon#wrote, iclass 19, count 0 2006.229.09:41:34.47#ibcon#about to read 3, iclass 19, count 0 2006.229.09:41:34.49#ibcon#read 3, iclass 19, count 0 2006.229.09:41:34.49#ibcon#about to read 4, iclass 19, count 0 2006.229.09:41:34.49#ibcon#read 4, iclass 19, count 0 2006.229.09:41:34.49#ibcon#about to read 5, iclass 19, count 0 2006.229.09:41:34.49#ibcon#read 5, iclass 19, count 0 2006.229.09:41:34.49#ibcon#about to read 6, iclass 19, count 0 2006.229.09:41:34.49#ibcon#read 6, iclass 19, count 0 2006.229.09:41:34.49#ibcon#end of sib2, iclass 19, count 0 2006.229.09:41:34.49#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:41:34.49#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:41:34.49#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:41:34.49#ibcon#*before write, iclass 19, count 0 2006.229.09:41:34.49#ibcon#enter sib2, iclass 19, count 0 2006.229.09:41:34.49#ibcon#flushed, iclass 19, count 0 2006.229.09:41:34.49#ibcon#about to write, iclass 19, count 0 2006.229.09:41:34.49#ibcon#wrote, iclass 19, count 0 2006.229.09:41:34.49#ibcon#about to read 3, iclass 19, count 0 2006.229.09:41:34.53#ibcon#read 3, iclass 19, count 0 2006.229.09:41:34.53#ibcon#about to read 4, iclass 19, count 0 2006.229.09:41:34.53#ibcon#read 4, iclass 19, count 0 2006.229.09:41:34.53#ibcon#about to read 5, iclass 19, count 0 2006.229.09:41:34.53#ibcon#read 5, iclass 19, count 0 2006.229.09:41:34.53#ibcon#about to read 6, iclass 19, count 0 2006.229.09:41:34.53#ibcon#read 6, iclass 19, count 0 2006.229.09:41:34.53#ibcon#end of sib2, iclass 19, count 0 2006.229.09:41:34.53#ibcon#*after write, iclass 19, count 0 2006.229.09:41:34.53#ibcon#*before return 0, iclass 19, count 0 2006.229.09:41:34.53#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:34.53#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:41:34.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:41:34.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:41:34.53$vck44/vb=8,4 2006.229.09:41:34.53#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.09:41:34.53#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.09:41:34.53#ibcon#ireg 11 cls_cnt 2 2006.229.09:41:34.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:34.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:34.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:34.59#ibcon#enter wrdev, iclass 21, count 2 2006.229.09:41:34.59#ibcon#first serial, iclass 21, count 2 2006.229.09:41:34.59#ibcon#enter sib2, iclass 21, count 2 2006.229.09:41:34.59#ibcon#flushed, iclass 21, count 2 2006.229.09:41:34.59#ibcon#about to write, iclass 21, count 2 2006.229.09:41:34.59#ibcon#wrote, iclass 21, count 2 2006.229.09:41:34.59#ibcon#about to read 3, iclass 21, count 2 2006.229.09:41:34.61#ibcon#read 3, iclass 21, count 2 2006.229.09:41:34.61#ibcon#about to read 4, iclass 21, count 2 2006.229.09:41:34.61#ibcon#read 4, iclass 21, count 2 2006.229.09:41:34.61#ibcon#about to read 5, iclass 21, count 2 2006.229.09:41:34.61#ibcon#read 5, iclass 21, count 2 2006.229.09:41:34.61#ibcon#about to read 6, iclass 21, count 2 2006.229.09:41:34.61#ibcon#read 6, iclass 21, count 2 2006.229.09:41:34.61#ibcon#end of sib2, iclass 21, count 2 2006.229.09:41:34.61#ibcon#*mode == 0, iclass 21, count 2 2006.229.09:41:34.61#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.09:41:34.61#ibcon#[27=AT08-04\r\n] 2006.229.09:41:34.61#ibcon#*before write, iclass 21, count 2 2006.229.09:41:34.61#ibcon#enter sib2, iclass 21, count 2 2006.229.09:41:34.61#ibcon#flushed, iclass 21, count 2 2006.229.09:41:34.61#ibcon#about to write, iclass 21, count 2 2006.229.09:41:34.61#ibcon#wrote, iclass 21, count 2 2006.229.09:41:34.61#ibcon#about to read 3, iclass 21, count 2 2006.229.09:41:34.64#ibcon#read 3, iclass 21, count 2 2006.229.09:41:34.64#ibcon#about to read 4, iclass 21, count 2 2006.229.09:41:34.64#ibcon#read 4, iclass 21, count 2 2006.229.09:41:34.64#ibcon#about to read 5, iclass 21, count 2 2006.229.09:41:34.64#ibcon#read 5, iclass 21, count 2 2006.229.09:41:34.64#ibcon#about to read 6, iclass 21, count 2 2006.229.09:41:34.64#ibcon#read 6, iclass 21, count 2 2006.229.09:41:34.64#ibcon#end of sib2, iclass 21, count 2 2006.229.09:41:34.64#ibcon#*after write, iclass 21, count 2 2006.229.09:41:34.64#ibcon#*before return 0, iclass 21, count 2 2006.229.09:41:34.64#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:34.64#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:41:34.64#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.09:41:34.64#ibcon#ireg 7 cls_cnt 0 2006.229.09:41:34.64#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:34.76#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:34.76#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:34.76#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:41:34.76#ibcon#first serial, iclass 21, count 0 2006.229.09:41:34.76#ibcon#enter sib2, iclass 21, count 0 2006.229.09:41:34.76#ibcon#flushed, iclass 21, count 0 2006.229.09:41:34.76#ibcon#about to write, iclass 21, count 0 2006.229.09:41:34.76#ibcon#wrote, iclass 21, count 0 2006.229.09:41:34.76#ibcon#about to read 3, iclass 21, count 0 2006.229.09:41:34.78#ibcon#read 3, iclass 21, count 0 2006.229.09:41:34.78#ibcon#about to read 4, iclass 21, count 0 2006.229.09:41:34.78#ibcon#read 4, iclass 21, count 0 2006.229.09:41:34.78#ibcon#about to read 5, iclass 21, count 0 2006.229.09:41:34.78#ibcon#read 5, iclass 21, count 0 2006.229.09:41:34.78#ibcon#about to read 6, iclass 21, count 0 2006.229.09:41:34.78#ibcon#read 6, iclass 21, count 0 2006.229.09:41:34.78#ibcon#end of sib2, iclass 21, count 0 2006.229.09:41:34.78#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:41:34.78#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:41:34.78#ibcon#[27=USB\r\n] 2006.229.09:41:34.78#ibcon#*before write, iclass 21, count 0 2006.229.09:41:34.78#ibcon#enter sib2, iclass 21, count 0 2006.229.09:41:34.78#ibcon#flushed, iclass 21, count 0 2006.229.09:41:34.78#ibcon#about to write, iclass 21, count 0 2006.229.09:41:34.78#ibcon#wrote, iclass 21, count 0 2006.229.09:41:34.78#ibcon#about to read 3, iclass 21, count 0 2006.229.09:41:34.81#ibcon#read 3, iclass 21, count 0 2006.229.09:41:34.81#ibcon#about to read 4, iclass 21, count 0 2006.229.09:41:34.81#ibcon#read 4, iclass 21, count 0 2006.229.09:41:34.81#ibcon#about to read 5, iclass 21, count 0 2006.229.09:41:34.81#ibcon#read 5, iclass 21, count 0 2006.229.09:41:34.81#ibcon#about to read 6, iclass 21, count 0 2006.229.09:41:34.81#ibcon#read 6, iclass 21, count 0 2006.229.09:41:34.81#ibcon#end of sib2, iclass 21, count 0 2006.229.09:41:34.81#ibcon#*after write, iclass 21, count 0 2006.229.09:41:34.81#ibcon#*before return 0, iclass 21, count 0 2006.229.09:41:34.81#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:34.81#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:41:34.81#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:41:34.81#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:41:34.81$vck44/vabw=wide 2006.229.09:41:34.81#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.09:41:34.81#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.09:41:34.81#ibcon#ireg 8 cls_cnt 0 2006.229.09:41:34.81#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:34.81#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:34.81#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:34.81#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:41:34.81#ibcon#first serial, iclass 23, count 0 2006.229.09:41:34.81#ibcon#enter sib2, iclass 23, count 0 2006.229.09:41:34.81#ibcon#flushed, iclass 23, count 0 2006.229.09:41:34.81#ibcon#about to write, iclass 23, count 0 2006.229.09:41:34.81#ibcon#wrote, iclass 23, count 0 2006.229.09:41:34.81#ibcon#about to read 3, iclass 23, count 0 2006.229.09:41:34.83#ibcon#read 3, iclass 23, count 0 2006.229.09:41:34.83#ibcon#about to read 4, iclass 23, count 0 2006.229.09:41:34.83#ibcon#read 4, iclass 23, count 0 2006.229.09:41:34.83#ibcon#about to read 5, iclass 23, count 0 2006.229.09:41:34.83#ibcon#read 5, iclass 23, count 0 2006.229.09:41:34.83#ibcon#about to read 6, iclass 23, count 0 2006.229.09:41:34.83#ibcon#read 6, iclass 23, count 0 2006.229.09:41:34.83#ibcon#end of sib2, iclass 23, count 0 2006.229.09:41:34.83#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:41:34.83#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:41:34.83#ibcon#[25=BW32\r\n] 2006.229.09:41:34.83#ibcon#*before write, iclass 23, count 0 2006.229.09:41:34.83#ibcon#enter sib2, iclass 23, count 0 2006.229.09:41:34.83#ibcon#flushed, iclass 23, count 0 2006.229.09:41:34.83#ibcon#about to write, iclass 23, count 0 2006.229.09:41:34.83#ibcon#wrote, iclass 23, count 0 2006.229.09:41:34.83#ibcon#about to read 3, iclass 23, count 0 2006.229.09:41:34.86#ibcon#read 3, iclass 23, count 0 2006.229.09:41:34.86#ibcon#about to read 4, iclass 23, count 0 2006.229.09:41:34.86#ibcon#read 4, iclass 23, count 0 2006.229.09:41:34.86#ibcon#about to read 5, iclass 23, count 0 2006.229.09:41:34.86#ibcon#read 5, iclass 23, count 0 2006.229.09:41:34.86#ibcon#about to read 6, iclass 23, count 0 2006.229.09:41:34.86#ibcon#read 6, iclass 23, count 0 2006.229.09:41:34.86#ibcon#end of sib2, iclass 23, count 0 2006.229.09:41:34.86#ibcon#*after write, iclass 23, count 0 2006.229.09:41:34.86#ibcon#*before return 0, iclass 23, count 0 2006.229.09:41:34.86#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:34.86#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:41:34.86#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:41:34.86#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:41:34.86$vck44/vbbw=wide 2006.229.09:41:34.86#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:41:34.86#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:41:34.86#ibcon#ireg 8 cls_cnt 0 2006.229.09:41:34.86#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:41:34.93#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:41:34.93#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:41:34.93#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:41:34.93#ibcon#first serial, iclass 25, count 0 2006.229.09:41:34.93#ibcon#enter sib2, iclass 25, count 0 2006.229.09:41:34.93#ibcon#flushed, iclass 25, count 0 2006.229.09:41:34.93#ibcon#about to write, iclass 25, count 0 2006.229.09:41:34.93#ibcon#wrote, iclass 25, count 0 2006.229.09:41:34.93#ibcon#about to read 3, iclass 25, count 0 2006.229.09:41:34.95#ibcon#read 3, iclass 25, count 0 2006.229.09:41:34.95#ibcon#about to read 4, iclass 25, count 0 2006.229.09:41:34.95#ibcon#read 4, iclass 25, count 0 2006.229.09:41:34.95#ibcon#about to read 5, iclass 25, count 0 2006.229.09:41:34.95#ibcon#read 5, iclass 25, count 0 2006.229.09:41:34.95#ibcon#about to read 6, iclass 25, count 0 2006.229.09:41:34.95#ibcon#read 6, iclass 25, count 0 2006.229.09:41:34.95#ibcon#end of sib2, iclass 25, count 0 2006.229.09:41:34.95#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:41:34.95#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:41:34.95#ibcon#[27=BW32\r\n] 2006.229.09:41:34.95#ibcon#*before write, iclass 25, count 0 2006.229.09:41:34.95#ibcon#enter sib2, iclass 25, count 0 2006.229.09:41:34.95#ibcon#flushed, iclass 25, count 0 2006.229.09:41:34.95#ibcon#about to write, iclass 25, count 0 2006.229.09:41:34.95#ibcon#wrote, iclass 25, count 0 2006.229.09:41:34.95#ibcon#about to read 3, iclass 25, count 0 2006.229.09:41:34.98#ibcon#read 3, iclass 25, count 0 2006.229.09:41:35.89#ibcon#about to read 4, iclass 25, count 0 2006.229.09:41:35.89#ibcon#read 4, iclass 25, count 0 2006.229.09:41:35.89#ibcon#about to read 5, iclass 25, count 0 2006.229.09:41:35.89#ibcon#read 5, iclass 25, count 0 2006.229.09:41:35.89#ibcon#about to read 6, iclass 25, count 0 2006.229.09:41:35.89#ibcon#read 6, iclass 25, count 0 2006.229.09:41:35.89#ibcon#end of sib2, iclass 25, count 0 2006.229.09:41:35.89#ibcon#*after write, iclass 25, count 0 2006.229.09:41:35.89#ibcon#*before return 0, iclass 25, count 0 2006.229.09:41:35.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:41:35.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:41:35.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:41:35.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:41:35.89$setupk4/ifdk4 2006.229.09:41:35.89$ifdk4/lo= 2006.229.09:41:35.89$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:41:35.89$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:41:35.89$ifdk4/patch= 2006.229.09:41:35.89$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:41:35.89$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:41:35.89$setupk4/!*+20s 2006.229.09:41:41.14#trakl#Source acquired 2006.229.09:41:42.14#flagr#flagr/antenna,acquired 2006.229.09:41:43.81#abcon#<5=/05 2.0 4.1 28.87 971001.0\r\n> 2006.229.09:41:43.83#abcon#{5=INTERFACE CLEAR} 2006.229.09:41:43.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:41:47.21$setupk4/"tpicd 2006.229.09:41:47.21$setupk4/echo=off 2006.229.09:41:47.21$setupk4/xlog=off 2006.229.09:41:47.21:!2006.229.09:44:13 2006.229.09:44:13.00:preob 2006.229.09:44:13.14/onsource/TRACKING 2006.229.09:44:13.14:!2006.229.09:44:23 2006.229.09:44:23.00:"tape 2006.229.09:44:23.00:"st=record 2006.229.09:44:23.00:data_valid=on 2006.229.09:44:23.00:midob 2006.229.09:44:24.14/onsource/TRACKING 2006.229.09:44:24.14/wx/28.85,1001.0,97 2006.229.09:44:24.22/cable/+6.4001E-03 2006.229.09:44:25.31/va/01,08,usb,yes,32,34 2006.229.09:44:25.31/va/02,07,usb,yes,35,35 2006.229.09:44:25.31/va/03,06,usb,yes,43,45 2006.229.09:44:25.31/va/04,07,usb,yes,36,37 2006.229.09:44:25.31/va/05,04,usb,yes,32,32 2006.229.09:44:25.31/va/06,04,usb,yes,36,35 2006.229.09:44:25.31/va/07,05,usb,yes,32,32 2006.229.09:44:25.31/va/08,06,usb,yes,23,28 2006.229.09:44:25.54/valo/01,524.99,yes,locked 2006.229.09:44:25.54/valo/02,534.99,yes,locked 2006.229.09:44:25.54/valo/03,564.99,yes,locked 2006.229.09:44:25.54/valo/04,624.99,yes,locked 2006.229.09:44:25.54/valo/05,734.99,yes,locked 2006.229.09:44:25.54/valo/06,814.99,yes,locked 2006.229.09:44:25.54/valo/07,864.99,yes,locked 2006.229.09:44:25.54/valo/08,884.99,yes,locked 2006.229.09:44:26.63/vb/01,04,usb,yes,32,30 2006.229.09:44:26.63/vb/02,04,usb,yes,34,34 2006.229.09:44:26.63/vb/03,04,usb,yes,31,34 2006.229.09:44:26.63/vb/04,04,usb,yes,36,35 2006.229.09:44:26.63/vb/05,04,usb,yes,28,30 2006.229.09:44:26.63/vb/06,04,usb,yes,33,29 2006.229.09:44:26.63/vb/07,04,usb,yes,32,32 2006.229.09:44:26.63/vb/08,04,usb,yes,30,33 2006.229.09:44:26.87/vblo/01,629.99,yes,locked 2006.229.09:44:26.87/vblo/02,634.99,yes,locked 2006.229.09:44:26.87/vblo/03,649.99,yes,locked 2006.229.09:44:26.87/vblo/04,679.99,yes,locked 2006.229.09:44:26.87/vblo/05,709.99,yes,locked 2006.229.09:44:26.87/vblo/06,719.99,yes,locked 2006.229.09:44:26.87/vblo/07,734.99,yes,locked 2006.229.09:44:26.87/vblo/08,744.99,yes,locked 2006.229.09:44:27.02/vabw/8 2006.229.09:44:27.17/vbbw/8 2006.229.09:44:27.33/xfe/off,on,12.2 2006.229.09:44:27.73/ifatt/23,28,28,28 2006.229.09:44:28.07/fmout-gps/S +4.60E-07 2006.229.09:44:28.11:!2006.229.09:45:53 2006.229.09:45:53.00:data_valid=off 2006.229.09:45:53.00:"et 2006.229.09:45:53.00:!+3s 2006.229.09:45:56.01:"tape 2006.229.09:45:56.01:postob 2006.229.09:45:56.18/cable/+6.4006E-03 2006.229.09:45:56.18/wx/28.84,1001.0,97 2006.229.09:45:57.08/fmout-gps/S +4.61E-07 2006.229.09:45:57.08:scan_name=229-0948,jd0608,210 2006.229.09:45:57.08:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.09:45:57.14#flagr#flagr/antenna,new-source 2006.229.09:45:58.14:checkk5 2006.229.09:45:58.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:45:58.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:45:59.28/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:45:59.68/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:46:00.07/chk_obsdata//k5ts1/T2290944??a.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.09:46:00.46/chk_obsdata//k5ts2/T2290944??b.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.09:46:00.87/chk_obsdata//k5ts3/T2290944??c.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.09:46:01.34/chk_obsdata//k5ts4/T2290944??d.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.09:46:02.06/k5log//k5ts1_log_newline 2006.229.09:46:02.78/k5log//k5ts2_log_newline 2006.229.09:46:03.48/k5log//k5ts3_log_newline 2006.229.09:46:04.19/k5log//k5ts4_log_newline 2006.229.09:46:04.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:46:04.21:setupk4=1 2006.229.09:46:04.21$setupk4/echo=on 2006.229.09:46:04.21$setupk4/pcalon 2006.229.09:46:04.21$pcalon/"no phase cal control is implemented here 2006.229.09:46:04.21$setupk4/"tpicd=stop 2006.229.09:46:04.21$setupk4/"rec=synch_on 2006.229.09:46:04.21$setupk4/"rec_mode=128 2006.229.09:46:04.21$setupk4/!* 2006.229.09:46:04.21$setupk4/recpk4 2006.229.09:46:04.21$recpk4/recpatch= 2006.229.09:46:04.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:46:04.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:46:04.22$setupk4/vck44 2006.229.09:46:04.22$vck44/valo=1,524.99 2006.229.09:46:04.22#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.09:46:04.22#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.09:46:04.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:04.22#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:46:04.22#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:46:04.22#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:46:04.22#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:46:04.22#ibcon#first serial, iclass 26, count 0 2006.229.09:46:04.22#ibcon#enter sib2, iclass 26, count 0 2006.229.09:46:04.22#ibcon#flushed, iclass 26, count 0 2006.229.09:46:04.22#ibcon#about to write, iclass 26, count 0 2006.229.09:46:04.22#ibcon#wrote, iclass 26, count 0 2006.229.09:46:04.22#ibcon#about to read 3, iclass 26, count 0 2006.229.09:46:04.24#ibcon#read 3, iclass 26, count 0 2006.229.09:46:04.24#ibcon#about to read 4, iclass 26, count 0 2006.229.09:46:04.24#ibcon#read 4, iclass 26, count 0 2006.229.09:46:04.24#ibcon#about to read 5, iclass 26, count 0 2006.229.09:46:04.24#ibcon#read 5, iclass 26, count 0 2006.229.09:46:04.24#ibcon#about to read 6, iclass 26, count 0 2006.229.09:46:04.24#ibcon#read 6, iclass 26, count 0 2006.229.09:46:04.24#ibcon#end of sib2, iclass 26, count 0 2006.229.09:46:04.24#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:46:04.24#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:46:04.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:46:04.24#ibcon#*before write, iclass 26, count 0 2006.229.09:46:04.24#ibcon#enter sib2, iclass 26, count 0 2006.229.09:46:04.24#ibcon#flushed, iclass 26, count 0 2006.229.09:46:04.24#ibcon#about to write, iclass 26, count 0 2006.229.09:46:04.24#ibcon#wrote, iclass 26, count 0 2006.229.09:46:04.24#ibcon#about to read 3, iclass 26, count 0 2006.229.09:46:04.29#ibcon#read 3, iclass 26, count 0 2006.229.09:46:04.29#ibcon#about to read 4, iclass 26, count 0 2006.229.09:46:04.29#ibcon#read 4, iclass 26, count 0 2006.229.09:46:04.29#ibcon#about to read 5, iclass 26, count 0 2006.229.09:46:04.29#ibcon#read 5, iclass 26, count 0 2006.229.09:46:04.29#ibcon#about to read 6, iclass 26, count 0 2006.229.09:46:04.29#ibcon#read 6, iclass 26, count 0 2006.229.09:46:04.29#ibcon#end of sib2, iclass 26, count 0 2006.229.09:46:04.29#ibcon#*after write, iclass 26, count 0 2006.229.09:46:04.29#ibcon#*before return 0, iclass 26, count 0 2006.229.09:46:04.29#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:46:04.29#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:46:04.29#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:46:04.29#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:46:04.29$vck44/va=1,8 2006.229.09:46:04.29#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.09:46:04.29#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.09:46:04.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:04.29#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:04.29#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:04.29#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:04.29#ibcon#enter wrdev, iclass 28, count 2 2006.229.09:46:04.29#ibcon#first serial, iclass 28, count 2 2006.229.09:46:04.29#ibcon#enter sib2, iclass 28, count 2 2006.229.09:46:04.29#ibcon#flushed, iclass 28, count 2 2006.229.09:46:04.29#ibcon#about to write, iclass 28, count 2 2006.229.09:46:04.29#ibcon#wrote, iclass 28, count 2 2006.229.09:46:04.29#ibcon#about to read 3, iclass 28, count 2 2006.229.09:46:04.31#ibcon#read 3, iclass 28, count 2 2006.229.09:46:04.31#ibcon#about to read 4, iclass 28, count 2 2006.229.09:46:04.31#ibcon#read 4, iclass 28, count 2 2006.229.09:46:04.31#ibcon#about to read 5, iclass 28, count 2 2006.229.09:46:04.31#ibcon#read 5, iclass 28, count 2 2006.229.09:46:04.31#ibcon#about to read 6, iclass 28, count 2 2006.229.09:46:04.31#ibcon#read 6, iclass 28, count 2 2006.229.09:46:04.31#ibcon#end of sib2, iclass 28, count 2 2006.229.09:46:04.31#ibcon#*mode == 0, iclass 28, count 2 2006.229.09:46:04.31#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.09:46:04.31#ibcon#[25=AT01-08\r\n] 2006.229.09:46:04.31#ibcon#*before write, iclass 28, count 2 2006.229.09:46:04.31#ibcon#enter sib2, iclass 28, count 2 2006.229.09:46:04.31#ibcon#flushed, iclass 28, count 2 2006.229.09:46:04.31#ibcon#about to write, iclass 28, count 2 2006.229.09:46:04.31#ibcon#wrote, iclass 28, count 2 2006.229.09:46:04.31#ibcon#about to read 3, iclass 28, count 2 2006.229.09:46:04.34#ibcon#read 3, iclass 28, count 2 2006.229.09:46:04.34#ibcon#about to read 4, iclass 28, count 2 2006.229.09:46:04.34#ibcon#read 4, iclass 28, count 2 2006.229.09:46:04.34#ibcon#about to read 5, iclass 28, count 2 2006.229.09:46:04.34#ibcon#read 5, iclass 28, count 2 2006.229.09:46:04.34#ibcon#about to read 6, iclass 28, count 2 2006.229.09:46:04.34#ibcon#read 6, iclass 28, count 2 2006.229.09:46:04.34#ibcon#end of sib2, iclass 28, count 2 2006.229.09:46:04.34#ibcon#*after write, iclass 28, count 2 2006.229.09:46:04.34#ibcon#*before return 0, iclass 28, count 2 2006.229.09:46:04.34#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:04.34#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:04.34#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.09:46:04.34#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:04.34#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:04.46#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:04.46#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:04.46#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:46:04.46#ibcon#first serial, iclass 28, count 0 2006.229.09:46:04.46#ibcon#enter sib2, iclass 28, count 0 2006.229.09:46:04.46#ibcon#flushed, iclass 28, count 0 2006.229.09:46:04.46#ibcon#about to write, iclass 28, count 0 2006.229.09:46:04.46#ibcon#wrote, iclass 28, count 0 2006.229.09:46:04.46#ibcon#about to read 3, iclass 28, count 0 2006.229.09:46:04.48#ibcon#read 3, iclass 28, count 0 2006.229.09:46:04.48#ibcon#about to read 4, iclass 28, count 0 2006.229.09:46:04.48#ibcon#read 4, iclass 28, count 0 2006.229.09:46:04.48#ibcon#about to read 5, iclass 28, count 0 2006.229.09:46:04.48#ibcon#read 5, iclass 28, count 0 2006.229.09:46:04.48#ibcon#about to read 6, iclass 28, count 0 2006.229.09:46:04.48#ibcon#read 6, iclass 28, count 0 2006.229.09:46:04.48#ibcon#end of sib2, iclass 28, count 0 2006.229.09:46:04.48#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:46:04.48#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:46:04.48#ibcon#[25=USB\r\n] 2006.229.09:46:04.48#ibcon#*before write, iclass 28, count 0 2006.229.09:46:04.48#ibcon#enter sib2, iclass 28, count 0 2006.229.09:46:04.48#ibcon#flushed, iclass 28, count 0 2006.229.09:46:04.48#ibcon#about to write, iclass 28, count 0 2006.229.09:46:04.48#ibcon#wrote, iclass 28, count 0 2006.229.09:46:04.48#ibcon#about to read 3, iclass 28, count 0 2006.229.09:46:04.51#ibcon#read 3, iclass 28, count 0 2006.229.09:46:04.51#ibcon#about to read 4, iclass 28, count 0 2006.229.09:46:04.51#ibcon#read 4, iclass 28, count 0 2006.229.09:46:04.51#ibcon#about to read 5, iclass 28, count 0 2006.229.09:46:04.51#ibcon#read 5, iclass 28, count 0 2006.229.09:46:04.51#ibcon#about to read 6, iclass 28, count 0 2006.229.09:46:04.51#ibcon#read 6, iclass 28, count 0 2006.229.09:46:04.51#ibcon#end of sib2, iclass 28, count 0 2006.229.09:46:04.51#ibcon#*after write, iclass 28, count 0 2006.229.09:46:04.51#ibcon#*before return 0, iclass 28, count 0 2006.229.09:46:04.51#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:04.51#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:04.51#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:46:04.51#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:46:04.51$vck44/valo=2,534.99 2006.229.09:46:04.51#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.09:46:04.51#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.09:46:04.51#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:04.51#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:04.51#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:04.51#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:04.51#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:46:04.51#ibcon#first serial, iclass 30, count 0 2006.229.09:46:04.51#ibcon#enter sib2, iclass 30, count 0 2006.229.09:46:04.51#ibcon#flushed, iclass 30, count 0 2006.229.09:46:04.51#ibcon#about to write, iclass 30, count 0 2006.229.09:46:04.51#ibcon#wrote, iclass 30, count 0 2006.229.09:46:04.51#ibcon#about to read 3, iclass 30, count 0 2006.229.09:46:04.53#ibcon#read 3, iclass 30, count 0 2006.229.09:46:04.53#ibcon#about to read 4, iclass 30, count 0 2006.229.09:46:04.53#ibcon#read 4, iclass 30, count 0 2006.229.09:46:04.53#ibcon#about to read 5, iclass 30, count 0 2006.229.09:46:04.53#ibcon#read 5, iclass 30, count 0 2006.229.09:46:04.53#ibcon#about to read 6, iclass 30, count 0 2006.229.09:46:04.53#ibcon#read 6, iclass 30, count 0 2006.229.09:46:04.53#ibcon#end of sib2, iclass 30, count 0 2006.229.09:46:04.53#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:46:04.53#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:46:04.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:46:04.53#ibcon#*before write, iclass 30, count 0 2006.229.09:46:04.53#ibcon#enter sib2, iclass 30, count 0 2006.229.09:46:04.53#ibcon#flushed, iclass 30, count 0 2006.229.09:46:04.53#ibcon#about to write, iclass 30, count 0 2006.229.09:46:04.53#ibcon#wrote, iclass 30, count 0 2006.229.09:46:04.53#ibcon#about to read 3, iclass 30, count 0 2006.229.09:46:04.57#ibcon#read 3, iclass 30, count 0 2006.229.09:46:04.57#ibcon#about to read 4, iclass 30, count 0 2006.229.09:46:04.57#ibcon#read 4, iclass 30, count 0 2006.229.09:46:04.57#ibcon#about to read 5, iclass 30, count 0 2006.229.09:46:04.57#ibcon#read 5, iclass 30, count 0 2006.229.09:46:04.57#ibcon#about to read 6, iclass 30, count 0 2006.229.09:46:04.57#ibcon#read 6, iclass 30, count 0 2006.229.09:46:04.57#ibcon#end of sib2, iclass 30, count 0 2006.229.09:46:04.57#ibcon#*after write, iclass 30, count 0 2006.229.09:46:04.57#ibcon#*before return 0, iclass 30, count 0 2006.229.09:46:04.57#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:04.57#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:04.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:46:04.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:46:04.57$vck44/va=2,7 2006.229.09:46:04.57#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.09:46:04.57#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.09:46:04.57#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:04.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:04.63#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:04.63#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:04.63#ibcon#enter wrdev, iclass 32, count 2 2006.229.09:46:04.63#ibcon#first serial, iclass 32, count 2 2006.229.09:46:04.63#ibcon#enter sib2, iclass 32, count 2 2006.229.09:46:04.63#ibcon#flushed, iclass 32, count 2 2006.229.09:46:04.63#ibcon#about to write, iclass 32, count 2 2006.229.09:46:04.63#ibcon#wrote, iclass 32, count 2 2006.229.09:46:04.63#ibcon#about to read 3, iclass 32, count 2 2006.229.09:46:04.65#ibcon#read 3, iclass 32, count 2 2006.229.09:46:04.65#ibcon#about to read 4, iclass 32, count 2 2006.229.09:46:04.65#ibcon#read 4, iclass 32, count 2 2006.229.09:46:04.65#ibcon#about to read 5, iclass 32, count 2 2006.229.09:46:04.65#ibcon#read 5, iclass 32, count 2 2006.229.09:46:04.65#ibcon#about to read 6, iclass 32, count 2 2006.229.09:46:04.65#ibcon#read 6, iclass 32, count 2 2006.229.09:46:04.65#ibcon#end of sib2, iclass 32, count 2 2006.229.09:46:04.65#ibcon#*mode == 0, iclass 32, count 2 2006.229.09:46:04.65#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.09:46:04.65#ibcon#[25=AT02-07\r\n] 2006.229.09:46:04.65#ibcon#*before write, iclass 32, count 2 2006.229.09:46:04.65#ibcon#enter sib2, iclass 32, count 2 2006.229.09:46:04.65#ibcon#flushed, iclass 32, count 2 2006.229.09:46:04.65#ibcon#about to write, iclass 32, count 2 2006.229.09:46:04.65#ibcon#wrote, iclass 32, count 2 2006.229.09:46:04.65#ibcon#about to read 3, iclass 32, count 2 2006.229.09:46:04.68#ibcon#read 3, iclass 32, count 2 2006.229.09:46:04.68#ibcon#about to read 4, iclass 32, count 2 2006.229.09:46:04.68#ibcon#read 4, iclass 32, count 2 2006.229.09:46:04.68#ibcon#about to read 5, iclass 32, count 2 2006.229.09:46:04.68#ibcon#read 5, iclass 32, count 2 2006.229.09:46:04.68#ibcon#about to read 6, iclass 32, count 2 2006.229.09:46:04.68#ibcon#read 6, iclass 32, count 2 2006.229.09:46:04.68#ibcon#end of sib2, iclass 32, count 2 2006.229.09:46:04.68#ibcon#*after write, iclass 32, count 2 2006.229.09:46:04.68#ibcon#*before return 0, iclass 32, count 2 2006.229.09:46:04.68#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:04.68#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:04.68#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.09:46:04.68#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:04.68#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:04.80#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:04.80#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:04.80#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:46:04.80#ibcon#first serial, iclass 32, count 0 2006.229.09:46:04.80#ibcon#enter sib2, iclass 32, count 0 2006.229.09:46:04.80#ibcon#flushed, iclass 32, count 0 2006.229.09:46:04.80#ibcon#about to write, iclass 32, count 0 2006.229.09:46:04.80#ibcon#wrote, iclass 32, count 0 2006.229.09:46:04.80#ibcon#about to read 3, iclass 32, count 0 2006.229.09:46:04.82#ibcon#read 3, iclass 32, count 0 2006.229.09:46:04.82#ibcon#about to read 4, iclass 32, count 0 2006.229.09:46:04.82#ibcon#read 4, iclass 32, count 0 2006.229.09:46:04.82#ibcon#about to read 5, iclass 32, count 0 2006.229.09:46:04.82#ibcon#read 5, iclass 32, count 0 2006.229.09:46:04.82#ibcon#about to read 6, iclass 32, count 0 2006.229.09:46:04.82#ibcon#read 6, iclass 32, count 0 2006.229.09:46:04.82#ibcon#end of sib2, iclass 32, count 0 2006.229.09:46:04.82#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:46:04.82#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:46:04.82#ibcon#[25=USB\r\n] 2006.229.09:46:04.82#ibcon#*before write, iclass 32, count 0 2006.229.09:46:04.82#ibcon#enter sib2, iclass 32, count 0 2006.229.09:46:04.82#ibcon#flushed, iclass 32, count 0 2006.229.09:46:04.82#ibcon#about to write, iclass 32, count 0 2006.229.09:46:04.82#ibcon#wrote, iclass 32, count 0 2006.229.09:46:04.82#ibcon#about to read 3, iclass 32, count 0 2006.229.09:46:04.85#ibcon#read 3, iclass 32, count 0 2006.229.09:46:04.85#ibcon#about to read 4, iclass 32, count 0 2006.229.09:46:04.85#ibcon#read 4, iclass 32, count 0 2006.229.09:46:04.85#ibcon#about to read 5, iclass 32, count 0 2006.229.09:46:04.85#ibcon#read 5, iclass 32, count 0 2006.229.09:46:04.85#ibcon#about to read 6, iclass 32, count 0 2006.229.09:46:04.85#ibcon#read 6, iclass 32, count 0 2006.229.09:46:04.85#ibcon#end of sib2, iclass 32, count 0 2006.229.09:46:04.85#ibcon#*after write, iclass 32, count 0 2006.229.09:46:04.85#ibcon#*before return 0, iclass 32, count 0 2006.229.09:46:04.85#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:04.85#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:04.85#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:46:04.85#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:46:04.85$vck44/valo=3,564.99 2006.229.09:46:04.85#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.09:46:04.85#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.09:46:04.85#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:04.85#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:04.85#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:04.85#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:04.85#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:46:04.85#ibcon#first serial, iclass 34, count 0 2006.229.09:46:04.85#ibcon#enter sib2, iclass 34, count 0 2006.229.09:46:04.85#ibcon#flushed, iclass 34, count 0 2006.229.09:46:04.85#ibcon#about to write, iclass 34, count 0 2006.229.09:46:04.85#ibcon#wrote, iclass 34, count 0 2006.229.09:46:04.85#ibcon#about to read 3, iclass 34, count 0 2006.229.09:46:04.87#ibcon#read 3, iclass 34, count 0 2006.229.09:46:04.87#ibcon#about to read 4, iclass 34, count 0 2006.229.09:46:04.87#ibcon#read 4, iclass 34, count 0 2006.229.09:46:04.87#ibcon#about to read 5, iclass 34, count 0 2006.229.09:46:04.87#ibcon#read 5, iclass 34, count 0 2006.229.09:46:04.87#ibcon#about to read 6, iclass 34, count 0 2006.229.09:46:04.87#ibcon#read 6, iclass 34, count 0 2006.229.09:46:04.87#ibcon#end of sib2, iclass 34, count 0 2006.229.09:46:04.87#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:46:04.87#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:46:04.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:46:04.87#ibcon#*before write, iclass 34, count 0 2006.229.09:46:04.87#ibcon#enter sib2, iclass 34, count 0 2006.229.09:46:04.87#ibcon#flushed, iclass 34, count 0 2006.229.09:46:04.87#ibcon#about to write, iclass 34, count 0 2006.229.09:46:04.87#ibcon#wrote, iclass 34, count 0 2006.229.09:46:04.87#ibcon#about to read 3, iclass 34, count 0 2006.229.09:46:04.91#ibcon#read 3, iclass 34, count 0 2006.229.09:46:04.91#ibcon#about to read 4, iclass 34, count 0 2006.229.09:46:04.91#ibcon#read 4, iclass 34, count 0 2006.229.09:46:04.91#ibcon#about to read 5, iclass 34, count 0 2006.229.09:46:04.91#ibcon#read 5, iclass 34, count 0 2006.229.09:46:04.91#ibcon#about to read 6, iclass 34, count 0 2006.229.09:46:04.91#ibcon#read 6, iclass 34, count 0 2006.229.09:46:04.91#ibcon#end of sib2, iclass 34, count 0 2006.229.09:46:04.91#ibcon#*after write, iclass 34, count 0 2006.229.09:46:04.91#ibcon#*before return 0, iclass 34, count 0 2006.229.09:46:04.91#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:04.91#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:04.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:46:04.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:46:04.91$vck44/va=3,6 2006.229.09:46:04.91#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.09:46:04.91#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.09:46:04.91#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:04.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:04.97#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:04.97#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:04.97#ibcon#enter wrdev, iclass 36, count 2 2006.229.09:46:04.97#ibcon#first serial, iclass 36, count 2 2006.229.09:46:04.97#ibcon#enter sib2, iclass 36, count 2 2006.229.09:46:04.97#ibcon#flushed, iclass 36, count 2 2006.229.09:46:04.97#ibcon#about to write, iclass 36, count 2 2006.229.09:46:04.97#ibcon#wrote, iclass 36, count 2 2006.229.09:46:04.97#ibcon#about to read 3, iclass 36, count 2 2006.229.09:46:04.99#ibcon#read 3, iclass 36, count 2 2006.229.09:46:04.99#ibcon#about to read 4, iclass 36, count 2 2006.229.09:46:04.99#ibcon#read 4, iclass 36, count 2 2006.229.09:46:04.99#ibcon#about to read 5, iclass 36, count 2 2006.229.09:46:04.99#ibcon#read 5, iclass 36, count 2 2006.229.09:46:04.99#ibcon#about to read 6, iclass 36, count 2 2006.229.09:46:04.99#ibcon#read 6, iclass 36, count 2 2006.229.09:46:04.99#ibcon#end of sib2, iclass 36, count 2 2006.229.09:46:04.99#ibcon#*mode == 0, iclass 36, count 2 2006.229.09:46:04.99#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.09:46:04.99#ibcon#[25=AT03-06\r\n] 2006.229.09:46:04.99#ibcon#*before write, iclass 36, count 2 2006.229.09:46:04.99#ibcon#enter sib2, iclass 36, count 2 2006.229.09:46:04.99#ibcon#flushed, iclass 36, count 2 2006.229.09:46:04.99#ibcon#about to write, iclass 36, count 2 2006.229.09:46:04.99#ibcon#wrote, iclass 36, count 2 2006.229.09:46:04.99#ibcon#about to read 3, iclass 36, count 2 2006.229.09:46:05.02#ibcon#read 3, iclass 36, count 2 2006.229.09:46:05.02#ibcon#about to read 4, iclass 36, count 2 2006.229.09:46:05.02#ibcon#read 4, iclass 36, count 2 2006.229.09:46:05.02#ibcon#about to read 5, iclass 36, count 2 2006.229.09:46:05.02#ibcon#read 5, iclass 36, count 2 2006.229.09:46:05.02#ibcon#about to read 6, iclass 36, count 2 2006.229.09:46:05.02#ibcon#read 6, iclass 36, count 2 2006.229.09:46:05.02#ibcon#end of sib2, iclass 36, count 2 2006.229.09:46:05.02#ibcon#*after write, iclass 36, count 2 2006.229.09:46:05.02#ibcon#*before return 0, iclass 36, count 2 2006.229.09:46:05.02#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:05.02#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:05.02#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.09:46:05.02#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:05.02#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:05.14#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:05.14#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:05.14#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:46:05.14#ibcon#first serial, iclass 36, count 0 2006.229.09:46:05.14#ibcon#enter sib2, iclass 36, count 0 2006.229.09:46:05.14#ibcon#flushed, iclass 36, count 0 2006.229.09:46:05.14#ibcon#about to write, iclass 36, count 0 2006.229.09:46:05.14#ibcon#wrote, iclass 36, count 0 2006.229.09:46:05.14#ibcon#about to read 3, iclass 36, count 0 2006.229.09:46:05.16#ibcon#read 3, iclass 36, count 0 2006.229.09:46:05.16#ibcon#about to read 4, iclass 36, count 0 2006.229.09:46:05.16#ibcon#read 4, iclass 36, count 0 2006.229.09:46:05.16#ibcon#about to read 5, iclass 36, count 0 2006.229.09:46:05.16#ibcon#read 5, iclass 36, count 0 2006.229.09:46:05.16#ibcon#about to read 6, iclass 36, count 0 2006.229.09:46:05.16#ibcon#read 6, iclass 36, count 0 2006.229.09:46:05.16#ibcon#end of sib2, iclass 36, count 0 2006.229.09:46:05.16#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:46:05.16#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:46:05.16#ibcon#[25=USB\r\n] 2006.229.09:46:05.16#ibcon#*before write, iclass 36, count 0 2006.229.09:46:05.16#ibcon#enter sib2, iclass 36, count 0 2006.229.09:46:05.16#ibcon#flushed, iclass 36, count 0 2006.229.09:46:05.16#ibcon#about to write, iclass 36, count 0 2006.229.09:46:05.16#ibcon#wrote, iclass 36, count 0 2006.229.09:46:05.16#ibcon#about to read 3, iclass 36, count 0 2006.229.09:46:05.19#ibcon#read 3, iclass 36, count 0 2006.229.09:46:05.19#ibcon#about to read 4, iclass 36, count 0 2006.229.09:46:05.19#ibcon#read 4, iclass 36, count 0 2006.229.09:46:05.19#ibcon#about to read 5, iclass 36, count 0 2006.229.09:46:05.19#ibcon#read 5, iclass 36, count 0 2006.229.09:46:05.19#ibcon#about to read 6, iclass 36, count 0 2006.229.09:46:05.19#ibcon#read 6, iclass 36, count 0 2006.229.09:46:05.19#ibcon#end of sib2, iclass 36, count 0 2006.229.09:46:05.19#ibcon#*after write, iclass 36, count 0 2006.229.09:46:05.19#ibcon#*before return 0, iclass 36, count 0 2006.229.09:46:05.19#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:05.19#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:05.19#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:46:05.19#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:46:05.19$vck44/valo=4,624.99 2006.229.09:46:05.19#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.09:46:05.19#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.09:46:05.19#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:05.19#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:05.19#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:05.19#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:05.19#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:46:05.19#ibcon#first serial, iclass 38, count 0 2006.229.09:46:05.19#ibcon#enter sib2, iclass 38, count 0 2006.229.09:46:05.19#ibcon#flushed, iclass 38, count 0 2006.229.09:46:05.19#ibcon#about to write, iclass 38, count 0 2006.229.09:46:05.19#ibcon#wrote, iclass 38, count 0 2006.229.09:46:05.19#ibcon#about to read 3, iclass 38, count 0 2006.229.09:46:05.21#ibcon#read 3, iclass 38, count 0 2006.229.09:46:05.21#ibcon#about to read 4, iclass 38, count 0 2006.229.09:46:05.21#ibcon#read 4, iclass 38, count 0 2006.229.09:46:05.21#ibcon#about to read 5, iclass 38, count 0 2006.229.09:46:05.21#ibcon#read 5, iclass 38, count 0 2006.229.09:46:05.21#ibcon#about to read 6, iclass 38, count 0 2006.229.09:46:05.21#ibcon#read 6, iclass 38, count 0 2006.229.09:46:05.21#ibcon#end of sib2, iclass 38, count 0 2006.229.09:46:05.21#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:46:05.21#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:46:05.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:46:05.21#ibcon#*before write, iclass 38, count 0 2006.229.09:46:05.21#ibcon#enter sib2, iclass 38, count 0 2006.229.09:46:05.21#ibcon#flushed, iclass 38, count 0 2006.229.09:46:05.21#ibcon#about to write, iclass 38, count 0 2006.229.09:46:05.21#ibcon#wrote, iclass 38, count 0 2006.229.09:46:05.21#ibcon#about to read 3, iclass 38, count 0 2006.229.09:46:05.25#ibcon#read 3, iclass 38, count 0 2006.229.09:46:05.25#ibcon#about to read 4, iclass 38, count 0 2006.229.09:46:05.25#ibcon#read 4, iclass 38, count 0 2006.229.09:46:05.25#ibcon#about to read 5, iclass 38, count 0 2006.229.09:46:05.25#ibcon#read 5, iclass 38, count 0 2006.229.09:46:05.25#ibcon#about to read 6, iclass 38, count 0 2006.229.09:46:05.25#ibcon#read 6, iclass 38, count 0 2006.229.09:46:05.25#ibcon#end of sib2, iclass 38, count 0 2006.229.09:46:05.25#ibcon#*after write, iclass 38, count 0 2006.229.09:46:05.25#ibcon#*before return 0, iclass 38, count 0 2006.229.09:46:05.25#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:05.25#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:05.25#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:46:05.25#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:46:05.25$vck44/va=4,7 2006.229.09:46:05.25#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.09:46:05.25#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.09:46:05.25#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:05.25#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:05.31#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:05.31#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:05.31#ibcon#enter wrdev, iclass 40, count 2 2006.229.09:46:05.31#ibcon#first serial, iclass 40, count 2 2006.229.09:46:05.31#ibcon#enter sib2, iclass 40, count 2 2006.229.09:46:05.31#ibcon#flushed, iclass 40, count 2 2006.229.09:46:05.31#ibcon#about to write, iclass 40, count 2 2006.229.09:46:05.31#ibcon#wrote, iclass 40, count 2 2006.229.09:46:05.31#ibcon#about to read 3, iclass 40, count 2 2006.229.09:46:05.33#ibcon#read 3, iclass 40, count 2 2006.229.09:46:05.33#ibcon#about to read 4, iclass 40, count 2 2006.229.09:46:05.33#ibcon#read 4, iclass 40, count 2 2006.229.09:46:05.33#ibcon#about to read 5, iclass 40, count 2 2006.229.09:46:05.33#ibcon#read 5, iclass 40, count 2 2006.229.09:46:05.33#ibcon#about to read 6, iclass 40, count 2 2006.229.09:46:05.33#ibcon#read 6, iclass 40, count 2 2006.229.09:46:05.33#ibcon#end of sib2, iclass 40, count 2 2006.229.09:46:05.33#ibcon#*mode == 0, iclass 40, count 2 2006.229.09:46:05.33#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.09:46:05.33#ibcon#[25=AT04-07\r\n] 2006.229.09:46:05.33#ibcon#*before write, iclass 40, count 2 2006.229.09:46:05.33#ibcon#enter sib2, iclass 40, count 2 2006.229.09:46:05.33#ibcon#flushed, iclass 40, count 2 2006.229.09:46:05.33#ibcon#about to write, iclass 40, count 2 2006.229.09:46:05.33#ibcon#wrote, iclass 40, count 2 2006.229.09:46:05.33#ibcon#about to read 3, iclass 40, count 2 2006.229.09:46:05.36#ibcon#read 3, iclass 40, count 2 2006.229.09:46:05.36#ibcon#about to read 4, iclass 40, count 2 2006.229.09:46:05.36#ibcon#read 4, iclass 40, count 2 2006.229.09:46:05.36#ibcon#about to read 5, iclass 40, count 2 2006.229.09:46:05.36#ibcon#read 5, iclass 40, count 2 2006.229.09:46:05.36#ibcon#about to read 6, iclass 40, count 2 2006.229.09:46:05.36#ibcon#read 6, iclass 40, count 2 2006.229.09:46:05.36#ibcon#end of sib2, iclass 40, count 2 2006.229.09:46:05.36#ibcon#*after write, iclass 40, count 2 2006.229.09:46:05.36#ibcon#*before return 0, iclass 40, count 2 2006.229.09:46:05.36#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:05.36#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:05.36#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.09:46:05.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:05.36#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:05.48#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:05.48#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:05.48#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:46:05.48#ibcon#first serial, iclass 40, count 0 2006.229.09:46:05.48#ibcon#enter sib2, iclass 40, count 0 2006.229.09:46:05.48#ibcon#flushed, iclass 40, count 0 2006.229.09:46:05.48#ibcon#about to write, iclass 40, count 0 2006.229.09:46:05.48#ibcon#wrote, iclass 40, count 0 2006.229.09:46:05.48#ibcon#about to read 3, iclass 40, count 0 2006.229.09:46:05.50#ibcon#read 3, iclass 40, count 0 2006.229.09:46:05.50#ibcon#about to read 4, iclass 40, count 0 2006.229.09:46:05.50#ibcon#read 4, iclass 40, count 0 2006.229.09:46:05.50#ibcon#about to read 5, iclass 40, count 0 2006.229.09:46:05.50#ibcon#read 5, iclass 40, count 0 2006.229.09:46:05.50#ibcon#about to read 6, iclass 40, count 0 2006.229.09:46:05.50#ibcon#read 6, iclass 40, count 0 2006.229.09:46:05.50#ibcon#end of sib2, iclass 40, count 0 2006.229.09:46:05.50#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:46:05.50#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:46:05.50#ibcon#[25=USB\r\n] 2006.229.09:46:05.50#ibcon#*before write, iclass 40, count 0 2006.229.09:46:05.50#ibcon#enter sib2, iclass 40, count 0 2006.229.09:46:05.50#ibcon#flushed, iclass 40, count 0 2006.229.09:46:05.50#ibcon#about to write, iclass 40, count 0 2006.229.09:46:05.50#ibcon#wrote, iclass 40, count 0 2006.229.09:46:05.50#ibcon#about to read 3, iclass 40, count 0 2006.229.09:46:05.53#ibcon#read 3, iclass 40, count 0 2006.229.09:46:05.53#ibcon#about to read 4, iclass 40, count 0 2006.229.09:46:05.53#ibcon#read 4, iclass 40, count 0 2006.229.09:46:05.53#ibcon#about to read 5, iclass 40, count 0 2006.229.09:46:05.53#ibcon#read 5, iclass 40, count 0 2006.229.09:46:05.53#ibcon#about to read 6, iclass 40, count 0 2006.229.09:46:05.53#ibcon#read 6, iclass 40, count 0 2006.229.09:46:05.53#ibcon#end of sib2, iclass 40, count 0 2006.229.09:46:05.53#ibcon#*after write, iclass 40, count 0 2006.229.09:46:05.53#ibcon#*before return 0, iclass 40, count 0 2006.229.09:46:05.53#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:05.53#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:05.53#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:46:05.53#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:46:05.53$vck44/valo=5,734.99 2006.229.09:46:05.53#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.09:46:05.53#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.09:46:05.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:05.53#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:05.53#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:05.53#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:05.53#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:46:05.53#ibcon#first serial, iclass 4, count 0 2006.229.09:46:05.53#ibcon#enter sib2, iclass 4, count 0 2006.229.09:46:05.53#ibcon#flushed, iclass 4, count 0 2006.229.09:46:05.53#ibcon#about to write, iclass 4, count 0 2006.229.09:46:05.53#ibcon#wrote, iclass 4, count 0 2006.229.09:46:05.53#ibcon#about to read 3, iclass 4, count 0 2006.229.09:46:05.55#ibcon#read 3, iclass 4, count 0 2006.229.09:46:05.55#ibcon#about to read 4, iclass 4, count 0 2006.229.09:46:05.55#ibcon#read 4, iclass 4, count 0 2006.229.09:46:05.55#ibcon#about to read 5, iclass 4, count 0 2006.229.09:46:05.55#ibcon#read 5, iclass 4, count 0 2006.229.09:46:05.55#ibcon#about to read 6, iclass 4, count 0 2006.229.09:46:05.55#ibcon#read 6, iclass 4, count 0 2006.229.09:46:05.55#ibcon#end of sib2, iclass 4, count 0 2006.229.09:46:05.55#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:46:05.55#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:46:05.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:46:05.55#ibcon#*before write, iclass 4, count 0 2006.229.09:46:05.55#ibcon#enter sib2, iclass 4, count 0 2006.229.09:46:05.55#ibcon#flushed, iclass 4, count 0 2006.229.09:46:05.55#ibcon#about to write, iclass 4, count 0 2006.229.09:46:06.66#ibcon#wrote, iclass 4, count 0 2006.229.09:46:06.66#ibcon#about to read 3, iclass 4, count 0 2006.229.09:46:06.70#ibcon#read 3, iclass 4, count 0 2006.229.09:46:06.70#ibcon#about to read 4, iclass 4, count 0 2006.229.09:46:06.70#ibcon#read 4, iclass 4, count 0 2006.229.09:46:06.70#ibcon#about to read 5, iclass 4, count 0 2006.229.09:46:06.70#ibcon#read 5, iclass 4, count 0 2006.229.09:46:06.70#ibcon#about to read 6, iclass 4, count 0 2006.229.09:46:06.70#ibcon#read 6, iclass 4, count 0 2006.229.09:46:06.70#ibcon#end of sib2, iclass 4, count 0 2006.229.09:46:06.70#ibcon#*after write, iclass 4, count 0 2006.229.09:46:06.70#ibcon#*before return 0, iclass 4, count 0 2006.229.09:46:06.70#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:06.70#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:06.70#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:46:06.70#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:46:06.70$vck44/va=5,4 2006.229.09:46:06.70#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.09:46:06.70#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.09:46:06.70#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:06.70#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:06.70#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:06.70#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:06.70#ibcon#enter wrdev, iclass 6, count 2 2006.229.09:46:06.70#ibcon#first serial, iclass 6, count 2 2006.229.09:46:06.70#ibcon#enter sib2, iclass 6, count 2 2006.229.09:46:06.70#ibcon#flushed, iclass 6, count 2 2006.229.09:46:06.70#ibcon#about to write, iclass 6, count 2 2006.229.09:46:06.70#ibcon#wrote, iclass 6, count 2 2006.229.09:46:06.70#ibcon#about to read 3, iclass 6, count 2 2006.229.09:46:06.72#ibcon#read 3, iclass 6, count 2 2006.229.09:46:06.72#ibcon#about to read 4, iclass 6, count 2 2006.229.09:46:06.72#ibcon#read 4, iclass 6, count 2 2006.229.09:46:06.72#ibcon#about to read 5, iclass 6, count 2 2006.229.09:46:06.72#ibcon#read 5, iclass 6, count 2 2006.229.09:46:06.72#ibcon#about to read 6, iclass 6, count 2 2006.229.09:46:06.72#ibcon#read 6, iclass 6, count 2 2006.229.09:46:06.72#ibcon#end of sib2, iclass 6, count 2 2006.229.09:46:06.72#ibcon#*mode == 0, iclass 6, count 2 2006.229.09:46:06.72#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.09:46:06.72#ibcon#[25=AT05-04\r\n] 2006.229.09:46:06.72#ibcon#*before write, iclass 6, count 2 2006.229.09:46:06.72#ibcon#enter sib2, iclass 6, count 2 2006.229.09:46:06.72#ibcon#flushed, iclass 6, count 2 2006.229.09:46:06.72#ibcon#about to write, iclass 6, count 2 2006.229.09:46:06.72#ibcon#wrote, iclass 6, count 2 2006.229.09:46:06.72#ibcon#about to read 3, iclass 6, count 2 2006.229.09:46:06.75#ibcon#read 3, iclass 6, count 2 2006.229.09:46:06.75#ibcon#about to read 4, iclass 6, count 2 2006.229.09:46:06.75#ibcon#read 4, iclass 6, count 2 2006.229.09:46:06.75#ibcon#about to read 5, iclass 6, count 2 2006.229.09:46:06.75#ibcon#read 5, iclass 6, count 2 2006.229.09:46:06.75#ibcon#about to read 6, iclass 6, count 2 2006.229.09:46:06.75#ibcon#read 6, iclass 6, count 2 2006.229.09:46:06.75#ibcon#end of sib2, iclass 6, count 2 2006.229.09:46:06.75#ibcon#*after write, iclass 6, count 2 2006.229.09:46:06.75#ibcon#*before return 0, iclass 6, count 2 2006.229.09:46:06.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:06.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:06.75#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.09:46:06.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:06.75#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:06.87#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:06.87#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:06.87#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:46:06.87#ibcon#first serial, iclass 6, count 0 2006.229.09:46:06.87#ibcon#enter sib2, iclass 6, count 0 2006.229.09:46:06.87#ibcon#flushed, iclass 6, count 0 2006.229.09:46:06.87#ibcon#about to write, iclass 6, count 0 2006.229.09:46:06.87#ibcon#wrote, iclass 6, count 0 2006.229.09:46:06.87#ibcon#about to read 3, iclass 6, count 0 2006.229.09:46:06.89#ibcon#read 3, iclass 6, count 0 2006.229.09:46:06.89#ibcon#about to read 4, iclass 6, count 0 2006.229.09:46:06.89#ibcon#read 4, iclass 6, count 0 2006.229.09:46:06.89#ibcon#about to read 5, iclass 6, count 0 2006.229.09:46:06.89#ibcon#read 5, iclass 6, count 0 2006.229.09:46:06.89#ibcon#about to read 6, iclass 6, count 0 2006.229.09:46:06.89#ibcon#read 6, iclass 6, count 0 2006.229.09:46:06.89#ibcon#end of sib2, iclass 6, count 0 2006.229.09:46:06.89#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:46:06.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:46:06.89#ibcon#[25=USB\r\n] 2006.229.09:46:06.89#ibcon#*before write, iclass 6, count 0 2006.229.09:46:06.89#ibcon#enter sib2, iclass 6, count 0 2006.229.09:46:06.89#ibcon#flushed, iclass 6, count 0 2006.229.09:46:06.89#ibcon#about to write, iclass 6, count 0 2006.229.09:46:06.89#ibcon#wrote, iclass 6, count 0 2006.229.09:46:06.89#ibcon#about to read 3, iclass 6, count 0 2006.229.09:46:06.92#ibcon#read 3, iclass 6, count 0 2006.229.09:46:06.92#ibcon#about to read 4, iclass 6, count 0 2006.229.09:46:06.92#ibcon#read 4, iclass 6, count 0 2006.229.09:46:06.92#ibcon#about to read 5, iclass 6, count 0 2006.229.09:46:06.92#ibcon#read 5, iclass 6, count 0 2006.229.09:46:06.92#ibcon#about to read 6, iclass 6, count 0 2006.229.09:46:06.92#ibcon#read 6, iclass 6, count 0 2006.229.09:46:06.92#ibcon#end of sib2, iclass 6, count 0 2006.229.09:46:06.92#ibcon#*after write, iclass 6, count 0 2006.229.09:46:06.92#ibcon#*before return 0, iclass 6, count 0 2006.229.09:46:06.92#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:06.92#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:06.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:46:06.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:46:06.92$vck44/valo=6,814.99 2006.229.09:46:06.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.09:46:06.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.09:46:06.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:06.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:06.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:06.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:06.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:46:06.92#ibcon#first serial, iclass 10, count 0 2006.229.09:46:06.92#ibcon#enter sib2, iclass 10, count 0 2006.229.09:46:06.92#ibcon#flushed, iclass 10, count 0 2006.229.09:46:06.92#ibcon#about to write, iclass 10, count 0 2006.229.09:46:06.92#ibcon#wrote, iclass 10, count 0 2006.229.09:46:06.92#ibcon#about to read 3, iclass 10, count 0 2006.229.09:46:06.94#ibcon#read 3, iclass 10, count 0 2006.229.09:46:06.94#ibcon#about to read 4, iclass 10, count 0 2006.229.09:46:06.94#ibcon#read 4, iclass 10, count 0 2006.229.09:46:06.94#ibcon#about to read 5, iclass 10, count 0 2006.229.09:46:06.94#ibcon#read 5, iclass 10, count 0 2006.229.09:46:06.94#ibcon#about to read 6, iclass 10, count 0 2006.229.09:46:06.94#ibcon#read 6, iclass 10, count 0 2006.229.09:46:06.94#ibcon#end of sib2, iclass 10, count 0 2006.229.09:46:06.94#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:46:06.94#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:46:06.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:46:06.94#ibcon#*before write, iclass 10, count 0 2006.229.09:46:06.94#ibcon#enter sib2, iclass 10, count 0 2006.229.09:46:06.94#ibcon#flushed, iclass 10, count 0 2006.229.09:46:06.94#ibcon#about to write, iclass 10, count 0 2006.229.09:46:06.94#ibcon#wrote, iclass 10, count 0 2006.229.09:46:06.94#ibcon#about to read 3, iclass 10, count 0 2006.229.09:46:06.98#ibcon#read 3, iclass 10, count 0 2006.229.09:46:06.98#ibcon#about to read 4, iclass 10, count 0 2006.229.09:46:06.98#ibcon#read 4, iclass 10, count 0 2006.229.09:46:06.98#ibcon#about to read 5, iclass 10, count 0 2006.229.09:46:06.98#ibcon#read 5, iclass 10, count 0 2006.229.09:46:06.98#ibcon#about to read 6, iclass 10, count 0 2006.229.09:46:06.98#ibcon#read 6, iclass 10, count 0 2006.229.09:46:06.98#ibcon#end of sib2, iclass 10, count 0 2006.229.09:46:06.98#ibcon#*after write, iclass 10, count 0 2006.229.09:46:06.98#ibcon#*before return 0, iclass 10, count 0 2006.229.09:46:06.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:06.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:06.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:46:06.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:46:06.98$vck44/va=6,4 2006.229.09:46:06.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.09:46:06.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.09:46:06.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:06.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:07.04#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:07.04#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:07.04#ibcon#enter wrdev, iclass 12, count 2 2006.229.09:46:07.04#ibcon#first serial, iclass 12, count 2 2006.229.09:46:07.04#ibcon#enter sib2, iclass 12, count 2 2006.229.09:46:07.04#ibcon#flushed, iclass 12, count 2 2006.229.09:46:07.04#ibcon#about to write, iclass 12, count 2 2006.229.09:46:07.04#ibcon#wrote, iclass 12, count 2 2006.229.09:46:07.04#ibcon#about to read 3, iclass 12, count 2 2006.229.09:46:07.06#ibcon#read 3, iclass 12, count 2 2006.229.09:46:07.06#ibcon#about to read 4, iclass 12, count 2 2006.229.09:46:07.06#ibcon#read 4, iclass 12, count 2 2006.229.09:46:07.06#ibcon#about to read 5, iclass 12, count 2 2006.229.09:46:07.06#ibcon#read 5, iclass 12, count 2 2006.229.09:46:07.06#ibcon#about to read 6, iclass 12, count 2 2006.229.09:46:07.06#ibcon#read 6, iclass 12, count 2 2006.229.09:46:07.06#ibcon#end of sib2, iclass 12, count 2 2006.229.09:46:07.06#ibcon#*mode == 0, iclass 12, count 2 2006.229.09:46:07.06#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.09:46:07.06#ibcon#[25=AT06-04\r\n] 2006.229.09:46:07.06#ibcon#*before write, iclass 12, count 2 2006.229.09:46:07.06#ibcon#enter sib2, iclass 12, count 2 2006.229.09:46:07.06#ibcon#flushed, iclass 12, count 2 2006.229.09:46:07.06#ibcon#about to write, iclass 12, count 2 2006.229.09:46:07.06#ibcon#wrote, iclass 12, count 2 2006.229.09:46:07.06#ibcon#about to read 3, iclass 12, count 2 2006.229.09:46:07.09#ibcon#read 3, iclass 12, count 2 2006.229.09:46:07.09#ibcon#about to read 4, iclass 12, count 2 2006.229.09:46:07.09#ibcon#read 4, iclass 12, count 2 2006.229.09:46:07.09#ibcon#about to read 5, iclass 12, count 2 2006.229.09:46:07.09#ibcon#read 5, iclass 12, count 2 2006.229.09:46:07.09#ibcon#about to read 6, iclass 12, count 2 2006.229.09:46:07.09#ibcon#read 6, iclass 12, count 2 2006.229.09:46:07.09#ibcon#end of sib2, iclass 12, count 2 2006.229.09:46:07.09#ibcon#*after write, iclass 12, count 2 2006.229.09:46:07.09#ibcon#*before return 0, iclass 12, count 2 2006.229.09:46:07.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:07.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:07.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.09:46:07.09#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:07.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:07.21#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:07.21#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:07.21#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:46:07.21#ibcon#first serial, iclass 12, count 0 2006.229.09:46:07.21#ibcon#enter sib2, iclass 12, count 0 2006.229.09:46:07.21#ibcon#flushed, iclass 12, count 0 2006.229.09:46:07.21#ibcon#about to write, iclass 12, count 0 2006.229.09:46:07.21#ibcon#wrote, iclass 12, count 0 2006.229.09:46:07.21#ibcon#about to read 3, iclass 12, count 0 2006.229.09:46:07.23#ibcon#read 3, iclass 12, count 0 2006.229.09:46:07.23#ibcon#about to read 4, iclass 12, count 0 2006.229.09:46:07.23#ibcon#read 4, iclass 12, count 0 2006.229.09:46:07.23#ibcon#about to read 5, iclass 12, count 0 2006.229.09:46:07.23#ibcon#read 5, iclass 12, count 0 2006.229.09:46:07.23#ibcon#about to read 6, iclass 12, count 0 2006.229.09:46:07.23#ibcon#read 6, iclass 12, count 0 2006.229.09:46:07.23#ibcon#end of sib2, iclass 12, count 0 2006.229.09:46:07.23#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:46:07.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:46:07.23#ibcon#[25=USB\r\n] 2006.229.09:46:07.23#ibcon#*before write, iclass 12, count 0 2006.229.09:46:07.23#ibcon#enter sib2, iclass 12, count 0 2006.229.09:46:07.23#ibcon#flushed, iclass 12, count 0 2006.229.09:46:07.23#ibcon#about to write, iclass 12, count 0 2006.229.09:46:07.23#ibcon#wrote, iclass 12, count 0 2006.229.09:46:07.23#ibcon#about to read 3, iclass 12, count 0 2006.229.09:46:07.26#ibcon#read 3, iclass 12, count 0 2006.229.09:46:07.26#ibcon#about to read 4, iclass 12, count 0 2006.229.09:46:07.26#ibcon#read 4, iclass 12, count 0 2006.229.09:46:07.26#ibcon#about to read 5, iclass 12, count 0 2006.229.09:46:07.26#ibcon#read 5, iclass 12, count 0 2006.229.09:46:07.26#ibcon#about to read 6, iclass 12, count 0 2006.229.09:46:07.26#ibcon#read 6, iclass 12, count 0 2006.229.09:46:07.26#ibcon#end of sib2, iclass 12, count 0 2006.229.09:46:07.26#ibcon#*after write, iclass 12, count 0 2006.229.09:46:07.26#ibcon#*before return 0, iclass 12, count 0 2006.229.09:46:07.26#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:07.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:07.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:46:07.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:46:07.26$vck44/valo=7,864.99 2006.229.09:46:07.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.09:46:07.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.09:46:07.26#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:07.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:07.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:07.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:07.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:46:07.26#ibcon#first serial, iclass 14, count 0 2006.229.09:46:07.26#ibcon#enter sib2, iclass 14, count 0 2006.229.09:46:07.26#ibcon#flushed, iclass 14, count 0 2006.229.09:46:07.26#ibcon#about to write, iclass 14, count 0 2006.229.09:46:07.26#ibcon#wrote, iclass 14, count 0 2006.229.09:46:07.26#ibcon#about to read 3, iclass 14, count 0 2006.229.09:46:07.28#ibcon#read 3, iclass 14, count 0 2006.229.09:46:07.28#ibcon#about to read 4, iclass 14, count 0 2006.229.09:46:07.28#ibcon#read 4, iclass 14, count 0 2006.229.09:46:07.28#ibcon#about to read 5, iclass 14, count 0 2006.229.09:46:07.28#ibcon#read 5, iclass 14, count 0 2006.229.09:46:07.28#ibcon#about to read 6, iclass 14, count 0 2006.229.09:46:07.28#ibcon#read 6, iclass 14, count 0 2006.229.09:46:07.28#ibcon#end of sib2, iclass 14, count 0 2006.229.09:46:07.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:46:07.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:46:07.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:46:07.28#ibcon#*before write, iclass 14, count 0 2006.229.09:46:07.28#ibcon#enter sib2, iclass 14, count 0 2006.229.09:46:07.28#ibcon#flushed, iclass 14, count 0 2006.229.09:46:07.28#ibcon#about to write, iclass 14, count 0 2006.229.09:46:07.28#ibcon#wrote, iclass 14, count 0 2006.229.09:46:07.28#ibcon#about to read 3, iclass 14, count 0 2006.229.09:46:07.32#ibcon#read 3, iclass 14, count 0 2006.229.09:46:07.32#ibcon#about to read 4, iclass 14, count 0 2006.229.09:46:07.32#ibcon#read 4, iclass 14, count 0 2006.229.09:46:07.32#ibcon#about to read 5, iclass 14, count 0 2006.229.09:46:07.32#ibcon#read 5, iclass 14, count 0 2006.229.09:46:07.32#ibcon#about to read 6, iclass 14, count 0 2006.229.09:46:07.32#ibcon#read 6, iclass 14, count 0 2006.229.09:46:07.32#ibcon#end of sib2, iclass 14, count 0 2006.229.09:46:07.32#ibcon#*after write, iclass 14, count 0 2006.229.09:46:07.32#ibcon#*before return 0, iclass 14, count 0 2006.229.09:46:07.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:07.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:07.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:46:07.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:46:07.32$vck44/va=7,5 2006.229.09:46:07.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.09:46:07.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.09:46:07.32#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:07.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:07.38#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:07.38#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:07.38#ibcon#enter wrdev, iclass 16, count 2 2006.229.09:46:07.38#ibcon#first serial, iclass 16, count 2 2006.229.09:46:07.38#ibcon#enter sib2, iclass 16, count 2 2006.229.09:46:07.38#ibcon#flushed, iclass 16, count 2 2006.229.09:46:07.38#ibcon#about to write, iclass 16, count 2 2006.229.09:46:07.38#ibcon#wrote, iclass 16, count 2 2006.229.09:46:07.38#ibcon#about to read 3, iclass 16, count 2 2006.229.09:46:07.40#ibcon#read 3, iclass 16, count 2 2006.229.09:46:07.40#ibcon#about to read 4, iclass 16, count 2 2006.229.09:46:07.40#ibcon#read 4, iclass 16, count 2 2006.229.09:46:07.40#ibcon#about to read 5, iclass 16, count 2 2006.229.09:46:07.40#ibcon#read 5, iclass 16, count 2 2006.229.09:46:07.40#ibcon#about to read 6, iclass 16, count 2 2006.229.09:46:07.40#ibcon#read 6, iclass 16, count 2 2006.229.09:46:07.40#ibcon#end of sib2, iclass 16, count 2 2006.229.09:46:07.40#ibcon#*mode == 0, iclass 16, count 2 2006.229.09:46:07.40#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.09:46:07.40#ibcon#[25=AT07-05\r\n] 2006.229.09:46:07.40#ibcon#*before write, iclass 16, count 2 2006.229.09:46:07.40#ibcon#enter sib2, iclass 16, count 2 2006.229.09:46:07.40#ibcon#flushed, iclass 16, count 2 2006.229.09:46:07.40#ibcon#about to write, iclass 16, count 2 2006.229.09:46:07.40#ibcon#wrote, iclass 16, count 2 2006.229.09:46:07.40#ibcon#about to read 3, iclass 16, count 2 2006.229.09:46:07.43#ibcon#read 3, iclass 16, count 2 2006.229.09:46:07.43#ibcon#about to read 4, iclass 16, count 2 2006.229.09:46:07.43#ibcon#read 4, iclass 16, count 2 2006.229.09:46:07.43#ibcon#about to read 5, iclass 16, count 2 2006.229.09:46:07.43#ibcon#read 5, iclass 16, count 2 2006.229.09:46:07.43#ibcon#about to read 6, iclass 16, count 2 2006.229.09:46:07.43#ibcon#read 6, iclass 16, count 2 2006.229.09:46:07.43#ibcon#end of sib2, iclass 16, count 2 2006.229.09:46:07.43#ibcon#*after write, iclass 16, count 2 2006.229.09:46:07.43#ibcon#*before return 0, iclass 16, count 2 2006.229.09:46:07.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:07.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:07.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.09:46:07.43#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:07.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:07.55#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:07.55#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:07.55#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:46:07.55#ibcon#first serial, iclass 16, count 0 2006.229.09:46:07.55#ibcon#enter sib2, iclass 16, count 0 2006.229.09:46:07.55#ibcon#flushed, iclass 16, count 0 2006.229.09:46:07.55#ibcon#about to write, iclass 16, count 0 2006.229.09:46:07.55#ibcon#wrote, iclass 16, count 0 2006.229.09:46:07.55#ibcon#about to read 3, iclass 16, count 0 2006.229.09:46:07.57#ibcon#read 3, iclass 16, count 0 2006.229.09:46:07.57#ibcon#about to read 4, iclass 16, count 0 2006.229.09:46:07.57#ibcon#read 4, iclass 16, count 0 2006.229.09:46:07.57#ibcon#about to read 5, iclass 16, count 0 2006.229.09:46:07.57#ibcon#read 5, iclass 16, count 0 2006.229.09:46:07.57#ibcon#about to read 6, iclass 16, count 0 2006.229.09:46:07.57#ibcon#read 6, iclass 16, count 0 2006.229.09:46:07.57#ibcon#end of sib2, iclass 16, count 0 2006.229.09:46:07.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:46:07.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:46:07.57#ibcon#[25=USB\r\n] 2006.229.09:46:07.57#ibcon#*before write, iclass 16, count 0 2006.229.09:46:07.57#ibcon#enter sib2, iclass 16, count 0 2006.229.09:46:07.57#ibcon#flushed, iclass 16, count 0 2006.229.09:46:07.57#ibcon#about to write, iclass 16, count 0 2006.229.09:46:07.57#ibcon#wrote, iclass 16, count 0 2006.229.09:46:07.57#ibcon#about to read 3, iclass 16, count 0 2006.229.09:46:07.60#ibcon#read 3, iclass 16, count 0 2006.229.09:46:07.60#ibcon#about to read 4, iclass 16, count 0 2006.229.09:46:07.60#ibcon#read 4, iclass 16, count 0 2006.229.09:46:07.60#ibcon#about to read 5, iclass 16, count 0 2006.229.09:46:07.60#ibcon#read 5, iclass 16, count 0 2006.229.09:46:07.60#ibcon#about to read 6, iclass 16, count 0 2006.229.09:46:07.60#ibcon#read 6, iclass 16, count 0 2006.229.09:46:07.60#ibcon#end of sib2, iclass 16, count 0 2006.229.09:46:07.60#ibcon#*after write, iclass 16, count 0 2006.229.09:46:07.60#ibcon#*before return 0, iclass 16, count 0 2006.229.09:46:07.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:07.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:07.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:46:07.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:46:07.60$vck44/valo=8,884.99 2006.229.09:46:07.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.09:46:07.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.09:46:07.60#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:07.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:07.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:07.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:07.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:46:07.60#ibcon#first serial, iclass 18, count 0 2006.229.09:46:07.60#ibcon#enter sib2, iclass 18, count 0 2006.229.09:46:07.60#ibcon#flushed, iclass 18, count 0 2006.229.09:46:07.60#ibcon#about to write, iclass 18, count 0 2006.229.09:46:07.60#ibcon#wrote, iclass 18, count 0 2006.229.09:46:07.60#ibcon#about to read 3, iclass 18, count 0 2006.229.09:46:07.62#ibcon#read 3, iclass 18, count 0 2006.229.09:46:07.62#ibcon#about to read 4, iclass 18, count 0 2006.229.09:46:07.62#ibcon#read 4, iclass 18, count 0 2006.229.09:46:07.62#ibcon#about to read 5, iclass 18, count 0 2006.229.09:46:07.62#ibcon#read 5, iclass 18, count 0 2006.229.09:46:07.62#ibcon#about to read 6, iclass 18, count 0 2006.229.09:46:07.62#ibcon#read 6, iclass 18, count 0 2006.229.09:46:07.62#ibcon#end of sib2, iclass 18, count 0 2006.229.09:46:07.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:46:07.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:46:07.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:46:07.62#ibcon#*before write, iclass 18, count 0 2006.229.09:46:07.62#ibcon#enter sib2, iclass 18, count 0 2006.229.09:46:07.62#ibcon#flushed, iclass 18, count 0 2006.229.09:46:07.62#ibcon#about to write, iclass 18, count 0 2006.229.09:46:07.62#ibcon#wrote, iclass 18, count 0 2006.229.09:46:07.62#ibcon#about to read 3, iclass 18, count 0 2006.229.09:46:07.66#ibcon#read 3, iclass 18, count 0 2006.229.09:46:07.66#ibcon#about to read 4, iclass 18, count 0 2006.229.09:46:07.66#ibcon#read 4, iclass 18, count 0 2006.229.09:46:07.66#ibcon#about to read 5, iclass 18, count 0 2006.229.09:46:07.66#ibcon#read 5, iclass 18, count 0 2006.229.09:46:07.66#ibcon#about to read 6, iclass 18, count 0 2006.229.09:46:07.66#ibcon#read 6, iclass 18, count 0 2006.229.09:46:07.66#ibcon#end of sib2, iclass 18, count 0 2006.229.09:46:07.66#ibcon#*after write, iclass 18, count 0 2006.229.09:46:07.66#ibcon#*before return 0, iclass 18, count 0 2006.229.09:46:07.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:07.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:07.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:46:07.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:46:07.66$vck44/va=8,6 2006.229.09:46:07.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.09:46:07.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.09:46:07.66#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:07.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:07.72#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:07.72#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:07.72#ibcon#enter wrdev, iclass 20, count 2 2006.229.09:46:07.72#ibcon#first serial, iclass 20, count 2 2006.229.09:46:07.72#ibcon#enter sib2, iclass 20, count 2 2006.229.09:46:07.72#ibcon#flushed, iclass 20, count 2 2006.229.09:46:07.72#ibcon#about to write, iclass 20, count 2 2006.229.09:46:07.72#ibcon#wrote, iclass 20, count 2 2006.229.09:46:07.72#ibcon#about to read 3, iclass 20, count 2 2006.229.09:46:07.74#ibcon#read 3, iclass 20, count 2 2006.229.09:46:07.74#ibcon#about to read 4, iclass 20, count 2 2006.229.09:46:07.74#ibcon#read 4, iclass 20, count 2 2006.229.09:46:07.74#ibcon#about to read 5, iclass 20, count 2 2006.229.09:46:07.74#ibcon#read 5, iclass 20, count 2 2006.229.09:46:07.74#ibcon#about to read 6, iclass 20, count 2 2006.229.09:46:07.74#ibcon#read 6, iclass 20, count 2 2006.229.09:46:07.74#ibcon#end of sib2, iclass 20, count 2 2006.229.09:46:07.74#ibcon#*mode == 0, iclass 20, count 2 2006.229.09:46:07.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.09:46:07.74#ibcon#[25=AT08-06\r\n] 2006.229.09:46:07.74#ibcon#*before write, iclass 20, count 2 2006.229.09:46:07.74#ibcon#enter sib2, iclass 20, count 2 2006.229.09:46:07.74#ibcon#flushed, iclass 20, count 2 2006.229.09:46:07.74#ibcon#about to write, iclass 20, count 2 2006.229.09:46:07.74#ibcon#wrote, iclass 20, count 2 2006.229.09:46:07.74#ibcon#about to read 3, iclass 20, count 2 2006.229.09:46:07.77#ibcon#read 3, iclass 20, count 2 2006.229.09:46:07.77#ibcon#about to read 4, iclass 20, count 2 2006.229.09:46:07.77#ibcon#read 4, iclass 20, count 2 2006.229.09:46:07.77#ibcon#about to read 5, iclass 20, count 2 2006.229.09:46:07.77#ibcon#read 5, iclass 20, count 2 2006.229.09:46:07.77#ibcon#about to read 6, iclass 20, count 2 2006.229.09:46:07.77#ibcon#read 6, iclass 20, count 2 2006.229.09:46:07.77#ibcon#end of sib2, iclass 20, count 2 2006.229.09:46:07.77#ibcon#*after write, iclass 20, count 2 2006.229.09:46:07.77#ibcon#*before return 0, iclass 20, count 2 2006.229.09:46:07.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:07.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:07.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.09:46:07.77#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:07.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:07.89#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:07.89#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:07.89#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:46:07.89#ibcon#first serial, iclass 20, count 0 2006.229.09:46:07.89#ibcon#enter sib2, iclass 20, count 0 2006.229.09:46:07.89#ibcon#flushed, iclass 20, count 0 2006.229.09:46:07.89#ibcon#about to write, iclass 20, count 0 2006.229.09:46:08.37#ibcon#wrote, iclass 20, count 0 2006.229.09:46:08.37#ibcon#about to read 3, iclass 20, count 0 2006.229.09:46:08.23#abcon#<5=/05 2.2 4.1 28.84 971001.0\r\n> 2006.229.09:46:08.39#ibcon#read 3, iclass 20, count 0 2006.229.09:46:08.39#ibcon#about to read 4, iclass 20, count 0 2006.229.09:46:08.39#ibcon#read 4, iclass 20, count 0 2006.229.09:46:08.39#ibcon#about to read 5, iclass 20, count 0 2006.229.09:46:08.39#ibcon#read 5, iclass 20, count 0 2006.229.09:46:08.39#ibcon#about to read 6, iclass 20, count 0 2006.229.09:46:08.39#ibcon#read 6, iclass 20, count 0 2006.229.09:46:08.39#ibcon#end of sib2, iclass 20, count 0 2006.229.09:46:08.39#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:46:08.39#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:46:08.39#ibcon#[25=USB\r\n] 2006.229.09:46:08.39#ibcon#*before write, iclass 20, count 0 2006.229.09:46:08.39#ibcon#enter sib2, iclass 20, count 0 2006.229.09:46:08.39#ibcon#flushed, iclass 20, count 0 2006.229.09:46:08.39#ibcon#about to write, iclass 20, count 0 2006.229.09:46:08.39#ibcon#wrote, iclass 20, count 0 2006.229.09:46:08.39#ibcon#about to read 3, iclass 20, count 0 2006.229.09:46:08.39#abcon#{5=INTERFACE CLEAR} 2006.229.09:46:08.42#ibcon#read 3, iclass 20, count 0 2006.229.09:46:08.42#ibcon#about to read 4, iclass 20, count 0 2006.229.09:46:08.42#ibcon#read 4, iclass 20, count 0 2006.229.09:46:08.42#ibcon#about to read 5, iclass 20, count 0 2006.229.09:46:08.42#ibcon#read 5, iclass 20, count 0 2006.229.09:46:08.42#ibcon#about to read 6, iclass 20, count 0 2006.229.09:46:08.42#ibcon#read 6, iclass 20, count 0 2006.229.09:46:08.42#ibcon#end of sib2, iclass 20, count 0 2006.229.09:46:08.42#ibcon#*after write, iclass 20, count 0 2006.229.09:46:08.42#ibcon#*before return 0, iclass 20, count 0 2006.229.09:46:08.42#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:08.42#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:08.42#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:46:08.42#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:46:08.42$vck44/vblo=1,629.99 2006.229.09:46:08.42#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:46:08.42#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:46:08.42#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:08.42#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:46:08.42#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:46:08.42#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:46:08.42#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:46:08.42#ibcon#first serial, iclass 25, count 0 2006.229.09:46:08.42#ibcon#enter sib2, iclass 25, count 0 2006.229.09:46:08.42#ibcon#flushed, iclass 25, count 0 2006.229.09:46:08.42#ibcon#about to write, iclass 25, count 0 2006.229.09:46:08.42#ibcon#wrote, iclass 25, count 0 2006.229.09:46:08.42#ibcon#about to read 3, iclass 25, count 0 2006.229.09:46:08.44#ibcon#read 3, iclass 25, count 0 2006.229.09:46:08.44#ibcon#about to read 4, iclass 25, count 0 2006.229.09:46:08.44#ibcon#read 4, iclass 25, count 0 2006.229.09:46:08.44#ibcon#about to read 5, iclass 25, count 0 2006.229.09:46:08.44#ibcon#read 5, iclass 25, count 0 2006.229.09:46:08.44#ibcon#about to read 6, iclass 25, count 0 2006.229.09:46:08.44#ibcon#read 6, iclass 25, count 0 2006.229.09:46:08.44#ibcon#end of sib2, iclass 25, count 0 2006.229.09:46:08.44#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:46:08.44#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:46:08.44#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:46:08.44#ibcon#*before write, iclass 25, count 0 2006.229.09:46:08.44#ibcon#enter sib2, iclass 25, count 0 2006.229.09:46:08.44#ibcon#flushed, iclass 25, count 0 2006.229.09:46:08.44#ibcon#about to write, iclass 25, count 0 2006.229.09:46:08.44#ibcon#wrote, iclass 25, count 0 2006.229.09:46:08.44#ibcon#about to read 3, iclass 25, count 0 2006.229.09:46:08.45#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:46:08.48#ibcon#read 3, iclass 25, count 0 2006.229.09:46:08.48#ibcon#about to read 4, iclass 25, count 0 2006.229.09:46:08.48#ibcon#read 4, iclass 25, count 0 2006.229.09:46:08.48#ibcon#about to read 5, iclass 25, count 0 2006.229.09:46:08.48#ibcon#read 5, iclass 25, count 0 2006.229.09:46:08.48#ibcon#about to read 6, iclass 25, count 0 2006.229.09:46:08.48#ibcon#read 6, iclass 25, count 0 2006.229.09:46:08.48#ibcon#end of sib2, iclass 25, count 0 2006.229.09:46:08.48#ibcon#*after write, iclass 25, count 0 2006.229.09:46:08.48#ibcon#*before return 0, iclass 25, count 0 2006.229.09:46:08.48#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:46:08.48#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:46:08.48#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:46:08.48#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:46:08.48$vck44/vb=1,4 2006.229.09:46:08.48#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.09:46:08.48#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.09:46:08.48#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:08.48#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:08.48#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:08.48#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:08.48#ibcon#enter wrdev, iclass 28, count 2 2006.229.09:46:08.48#ibcon#first serial, iclass 28, count 2 2006.229.09:46:08.48#ibcon#enter sib2, iclass 28, count 2 2006.229.09:46:08.48#ibcon#flushed, iclass 28, count 2 2006.229.09:46:08.48#ibcon#about to write, iclass 28, count 2 2006.229.09:46:08.48#ibcon#wrote, iclass 28, count 2 2006.229.09:46:08.48#ibcon#about to read 3, iclass 28, count 2 2006.229.09:46:08.50#ibcon#read 3, iclass 28, count 2 2006.229.09:46:08.50#ibcon#about to read 4, iclass 28, count 2 2006.229.09:46:08.50#ibcon#read 4, iclass 28, count 2 2006.229.09:46:08.50#ibcon#about to read 5, iclass 28, count 2 2006.229.09:46:08.50#ibcon#read 5, iclass 28, count 2 2006.229.09:46:08.50#ibcon#about to read 6, iclass 28, count 2 2006.229.09:46:08.50#ibcon#read 6, iclass 28, count 2 2006.229.09:46:08.50#ibcon#end of sib2, iclass 28, count 2 2006.229.09:46:08.50#ibcon#*mode == 0, iclass 28, count 2 2006.229.09:46:08.50#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.09:46:08.50#ibcon#[27=AT01-04\r\n] 2006.229.09:46:08.50#ibcon#*before write, iclass 28, count 2 2006.229.09:46:08.50#ibcon#enter sib2, iclass 28, count 2 2006.229.09:46:08.50#ibcon#flushed, iclass 28, count 2 2006.229.09:46:08.50#ibcon#about to write, iclass 28, count 2 2006.229.09:46:08.50#ibcon#wrote, iclass 28, count 2 2006.229.09:46:08.50#ibcon#about to read 3, iclass 28, count 2 2006.229.09:46:08.53#ibcon#read 3, iclass 28, count 2 2006.229.09:46:08.53#ibcon#about to read 4, iclass 28, count 2 2006.229.09:46:08.53#ibcon#read 4, iclass 28, count 2 2006.229.09:46:08.53#ibcon#about to read 5, iclass 28, count 2 2006.229.09:46:08.53#ibcon#read 5, iclass 28, count 2 2006.229.09:46:08.53#ibcon#about to read 6, iclass 28, count 2 2006.229.09:46:08.53#ibcon#read 6, iclass 28, count 2 2006.229.09:46:08.53#ibcon#end of sib2, iclass 28, count 2 2006.229.09:46:08.53#ibcon#*after write, iclass 28, count 2 2006.229.09:46:08.53#ibcon#*before return 0, iclass 28, count 2 2006.229.09:46:08.53#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:08.53#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.09:46:08.53#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.09:46:08.53#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:08.53#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:08.65#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:08.65#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:08.65#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:46:08.65#ibcon#first serial, iclass 28, count 0 2006.229.09:46:08.65#ibcon#enter sib2, iclass 28, count 0 2006.229.09:46:08.65#ibcon#flushed, iclass 28, count 0 2006.229.09:46:08.65#ibcon#about to write, iclass 28, count 0 2006.229.09:46:08.65#ibcon#wrote, iclass 28, count 0 2006.229.09:46:08.65#ibcon#about to read 3, iclass 28, count 0 2006.229.09:46:08.67#ibcon#read 3, iclass 28, count 0 2006.229.09:46:08.67#ibcon#about to read 4, iclass 28, count 0 2006.229.09:46:08.67#ibcon#read 4, iclass 28, count 0 2006.229.09:46:08.67#ibcon#about to read 5, iclass 28, count 0 2006.229.09:46:08.67#ibcon#read 5, iclass 28, count 0 2006.229.09:46:08.67#ibcon#about to read 6, iclass 28, count 0 2006.229.09:46:08.67#ibcon#read 6, iclass 28, count 0 2006.229.09:46:08.67#ibcon#end of sib2, iclass 28, count 0 2006.229.09:46:08.67#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:46:08.67#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:46:08.67#ibcon#[27=USB\r\n] 2006.229.09:46:08.67#ibcon#*before write, iclass 28, count 0 2006.229.09:46:08.67#ibcon#enter sib2, iclass 28, count 0 2006.229.09:46:08.67#ibcon#flushed, iclass 28, count 0 2006.229.09:46:08.67#ibcon#about to write, iclass 28, count 0 2006.229.09:46:08.67#ibcon#wrote, iclass 28, count 0 2006.229.09:46:08.67#ibcon#about to read 3, iclass 28, count 0 2006.229.09:46:08.70#ibcon#read 3, iclass 28, count 0 2006.229.09:46:08.70#ibcon#about to read 4, iclass 28, count 0 2006.229.09:46:08.70#ibcon#read 4, iclass 28, count 0 2006.229.09:46:08.70#ibcon#about to read 5, iclass 28, count 0 2006.229.09:46:08.70#ibcon#read 5, iclass 28, count 0 2006.229.09:46:08.70#ibcon#about to read 6, iclass 28, count 0 2006.229.09:46:08.70#ibcon#read 6, iclass 28, count 0 2006.229.09:46:08.70#ibcon#end of sib2, iclass 28, count 0 2006.229.09:46:08.70#ibcon#*after write, iclass 28, count 0 2006.229.09:46:08.70#ibcon#*before return 0, iclass 28, count 0 2006.229.09:46:08.70#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:08.70#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.09:46:08.70#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:46:08.70#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:46:08.70$vck44/vblo=2,634.99 2006.229.09:46:08.70#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.09:46:08.70#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.09:46:08.70#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:08.70#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:08.70#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:08.70#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:08.70#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:46:08.70#ibcon#first serial, iclass 30, count 0 2006.229.09:46:08.70#ibcon#enter sib2, iclass 30, count 0 2006.229.09:46:08.70#ibcon#flushed, iclass 30, count 0 2006.229.09:46:08.70#ibcon#about to write, iclass 30, count 0 2006.229.09:46:08.70#ibcon#wrote, iclass 30, count 0 2006.229.09:46:08.70#ibcon#about to read 3, iclass 30, count 0 2006.229.09:46:08.72#ibcon#read 3, iclass 30, count 0 2006.229.09:46:08.72#ibcon#about to read 4, iclass 30, count 0 2006.229.09:46:08.72#ibcon#read 4, iclass 30, count 0 2006.229.09:46:08.72#ibcon#about to read 5, iclass 30, count 0 2006.229.09:46:08.72#ibcon#read 5, iclass 30, count 0 2006.229.09:46:08.72#ibcon#about to read 6, iclass 30, count 0 2006.229.09:46:08.72#ibcon#read 6, iclass 30, count 0 2006.229.09:46:08.72#ibcon#end of sib2, iclass 30, count 0 2006.229.09:46:08.72#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:46:08.72#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:46:08.72#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:46:08.72#ibcon#*before write, iclass 30, count 0 2006.229.09:46:08.72#ibcon#enter sib2, iclass 30, count 0 2006.229.09:46:08.72#ibcon#flushed, iclass 30, count 0 2006.229.09:46:08.72#ibcon#about to write, iclass 30, count 0 2006.229.09:46:08.72#ibcon#wrote, iclass 30, count 0 2006.229.09:46:08.72#ibcon#about to read 3, iclass 30, count 0 2006.229.09:46:08.76#ibcon#read 3, iclass 30, count 0 2006.229.09:46:08.76#ibcon#about to read 4, iclass 30, count 0 2006.229.09:46:08.76#ibcon#read 4, iclass 30, count 0 2006.229.09:46:08.76#ibcon#about to read 5, iclass 30, count 0 2006.229.09:46:08.76#ibcon#read 5, iclass 30, count 0 2006.229.09:46:08.76#ibcon#about to read 6, iclass 30, count 0 2006.229.09:46:08.76#ibcon#read 6, iclass 30, count 0 2006.229.09:46:08.76#ibcon#end of sib2, iclass 30, count 0 2006.229.09:46:08.76#ibcon#*after write, iclass 30, count 0 2006.229.09:46:08.76#ibcon#*before return 0, iclass 30, count 0 2006.229.09:46:08.76#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:08.76#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.09:46:08.76#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:46:08.76#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:46:08.76$vck44/vb=2,4 2006.229.09:46:08.76#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.09:46:08.76#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.09:46:08.76#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:08.76#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:08.82#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:08.82#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:08.82#ibcon#enter wrdev, iclass 32, count 2 2006.229.09:46:08.82#ibcon#first serial, iclass 32, count 2 2006.229.09:46:08.82#ibcon#enter sib2, iclass 32, count 2 2006.229.09:46:08.82#ibcon#flushed, iclass 32, count 2 2006.229.09:46:08.82#ibcon#about to write, iclass 32, count 2 2006.229.09:46:08.82#ibcon#wrote, iclass 32, count 2 2006.229.09:46:08.82#ibcon#about to read 3, iclass 32, count 2 2006.229.09:46:08.84#ibcon#read 3, iclass 32, count 2 2006.229.09:46:08.84#ibcon#about to read 4, iclass 32, count 2 2006.229.09:46:08.84#ibcon#read 4, iclass 32, count 2 2006.229.09:46:08.84#ibcon#about to read 5, iclass 32, count 2 2006.229.09:46:08.84#ibcon#read 5, iclass 32, count 2 2006.229.09:46:08.84#ibcon#about to read 6, iclass 32, count 2 2006.229.09:46:08.84#ibcon#read 6, iclass 32, count 2 2006.229.09:46:08.84#ibcon#end of sib2, iclass 32, count 2 2006.229.09:46:08.84#ibcon#*mode == 0, iclass 32, count 2 2006.229.09:46:08.84#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.09:46:08.84#ibcon#[27=AT02-04\r\n] 2006.229.09:46:08.84#ibcon#*before write, iclass 32, count 2 2006.229.09:46:08.84#ibcon#enter sib2, iclass 32, count 2 2006.229.09:46:08.84#ibcon#flushed, iclass 32, count 2 2006.229.09:46:08.84#ibcon#about to write, iclass 32, count 2 2006.229.09:46:08.84#ibcon#wrote, iclass 32, count 2 2006.229.09:46:08.84#ibcon#about to read 3, iclass 32, count 2 2006.229.09:46:08.87#ibcon#read 3, iclass 32, count 2 2006.229.09:46:08.87#ibcon#about to read 4, iclass 32, count 2 2006.229.09:46:08.87#ibcon#read 4, iclass 32, count 2 2006.229.09:46:08.87#ibcon#about to read 5, iclass 32, count 2 2006.229.09:46:08.87#ibcon#read 5, iclass 32, count 2 2006.229.09:46:08.87#ibcon#about to read 6, iclass 32, count 2 2006.229.09:46:08.87#ibcon#read 6, iclass 32, count 2 2006.229.09:46:08.87#ibcon#end of sib2, iclass 32, count 2 2006.229.09:46:08.87#ibcon#*after write, iclass 32, count 2 2006.229.09:46:08.87#ibcon#*before return 0, iclass 32, count 2 2006.229.09:46:08.87#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:08.87#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.09:46:08.87#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.09:46:08.87#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:08.87#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:08.99#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:08.99#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:08.99#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:46:08.99#ibcon#first serial, iclass 32, count 0 2006.229.09:46:08.99#ibcon#enter sib2, iclass 32, count 0 2006.229.09:46:08.99#ibcon#flushed, iclass 32, count 0 2006.229.09:46:08.99#ibcon#about to write, iclass 32, count 0 2006.229.09:46:08.99#ibcon#wrote, iclass 32, count 0 2006.229.09:46:08.99#ibcon#about to read 3, iclass 32, count 0 2006.229.09:46:09.01#ibcon#read 3, iclass 32, count 0 2006.229.09:46:09.01#ibcon#about to read 4, iclass 32, count 0 2006.229.09:46:09.01#ibcon#read 4, iclass 32, count 0 2006.229.09:46:09.01#ibcon#about to read 5, iclass 32, count 0 2006.229.09:46:09.01#ibcon#read 5, iclass 32, count 0 2006.229.09:46:09.01#ibcon#about to read 6, iclass 32, count 0 2006.229.09:46:09.01#ibcon#read 6, iclass 32, count 0 2006.229.09:46:09.01#ibcon#end of sib2, iclass 32, count 0 2006.229.09:46:09.01#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:46:09.01#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:46:09.01#ibcon#[27=USB\r\n] 2006.229.09:46:09.01#ibcon#*before write, iclass 32, count 0 2006.229.09:46:09.01#ibcon#enter sib2, iclass 32, count 0 2006.229.09:46:09.01#ibcon#flushed, iclass 32, count 0 2006.229.09:46:09.01#ibcon#about to write, iclass 32, count 0 2006.229.09:46:09.01#ibcon#wrote, iclass 32, count 0 2006.229.09:46:09.01#ibcon#about to read 3, iclass 32, count 0 2006.229.09:46:09.04#ibcon#read 3, iclass 32, count 0 2006.229.09:46:09.04#ibcon#about to read 4, iclass 32, count 0 2006.229.09:46:09.04#ibcon#read 4, iclass 32, count 0 2006.229.09:46:09.04#ibcon#about to read 5, iclass 32, count 0 2006.229.09:46:09.04#ibcon#read 5, iclass 32, count 0 2006.229.09:46:09.04#ibcon#about to read 6, iclass 32, count 0 2006.229.09:46:09.04#ibcon#read 6, iclass 32, count 0 2006.229.09:46:09.04#ibcon#end of sib2, iclass 32, count 0 2006.229.09:46:09.04#ibcon#*after write, iclass 32, count 0 2006.229.09:46:09.04#ibcon#*before return 0, iclass 32, count 0 2006.229.09:46:09.04#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:09.04#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.09:46:09.04#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:46:09.04#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:46:09.04$vck44/vblo=3,649.99 2006.229.09:46:09.04#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.09:46:09.04#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.09:46:09.04#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:09.04#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:09.04#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:09.04#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:09.04#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:46:09.04#ibcon#first serial, iclass 34, count 0 2006.229.09:46:09.04#ibcon#enter sib2, iclass 34, count 0 2006.229.09:46:09.04#ibcon#flushed, iclass 34, count 0 2006.229.09:46:09.04#ibcon#about to write, iclass 34, count 0 2006.229.09:46:09.04#ibcon#wrote, iclass 34, count 0 2006.229.09:46:09.04#ibcon#about to read 3, iclass 34, count 0 2006.229.09:46:09.06#ibcon#read 3, iclass 34, count 0 2006.229.09:46:09.06#ibcon#about to read 4, iclass 34, count 0 2006.229.09:46:09.06#ibcon#read 4, iclass 34, count 0 2006.229.09:46:09.06#ibcon#about to read 5, iclass 34, count 0 2006.229.09:46:09.06#ibcon#read 5, iclass 34, count 0 2006.229.09:46:09.06#ibcon#about to read 6, iclass 34, count 0 2006.229.09:46:09.06#ibcon#read 6, iclass 34, count 0 2006.229.09:46:09.06#ibcon#end of sib2, iclass 34, count 0 2006.229.09:46:09.06#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:46:09.06#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:46:09.06#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:46:09.06#ibcon#*before write, iclass 34, count 0 2006.229.09:46:09.06#ibcon#enter sib2, iclass 34, count 0 2006.229.09:46:09.06#ibcon#flushed, iclass 34, count 0 2006.229.09:46:09.06#ibcon#about to write, iclass 34, count 0 2006.229.09:46:09.06#ibcon#wrote, iclass 34, count 0 2006.229.09:46:09.06#ibcon#about to read 3, iclass 34, count 0 2006.229.09:46:09.10#ibcon#read 3, iclass 34, count 0 2006.229.09:46:09.10#ibcon#about to read 4, iclass 34, count 0 2006.229.09:46:09.10#ibcon#read 4, iclass 34, count 0 2006.229.09:46:09.10#ibcon#about to read 5, iclass 34, count 0 2006.229.09:46:09.10#ibcon#read 5, iclass 34, count 0 2006.229.09:46:09.10#ibcon#about to read 6, iclass 34, count 0 2006.229.09:46:09.10#ibcon#read 6, iclass 34, count 0 2006.229.09:46:09.10#ibcon#end of sib2, iclass 34, count 0 2006.229.09:46:09.10#ibcon#*after write, iclass 34, count 0 2006.229.09:46:09.10#ibcon#*before return 0, iclass 34, count 0 2006.229.09:46:09.10#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:09.10#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.09:46:09.10#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:46:09.10#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:46:09.10$vck44/vb=3,4 2006.229.09:46:09.10#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.09:46:09.10#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.09:46:09.10#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:09.10#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:09.16#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:09.16#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:09.16#ibcon#enter wrdev, iclass 36, count 2 2006.229.09:46:09.16#ibcon#first serial, iclass 36, count 2 2006.229.09:46:09.16#ibcon#enter sib2, iclass 36, count 2 2006.229.09:46:09.16#ibcon#flushed, iclass 36, count 2 2006.229.09:46:09.16#ibcon#about to write, iclass 36, count 2 2006.229.09:46:09.16#ibcon#wrote, iclass 36, count 2 2006.229.09:46:09.16#ibcon#about to read 3, iclass 36, count 2 2006.229.09:46:09.18#ibcon#read 3, iclass 36, count 2 2006.229.09:46:09.18#ibcon#about to read 4, iclass 36, count 2 2006.229.09:46:09.18#ibcon#read 4, iclass 36, count 2 2006.229.09:46:09.18#ibcon#about to read 5, iclass 36, count 2 2006.229.09:46:09.18#ibcon#read 5, iclass 36, count 2 2006.229.09:46:09.18#ibcon#about to read 6, iclass 36, count 2 2006.229.09:46:09.18#ibcon#read 6, iclass 36, count 2 2006.229.09:46:09.18#ibcon#end of sib2, iclass 36, count 2 2006.229.09:46:09.18#ibcon#*mode == 0, iclass 36, count 2 2006.229.09:46:09.18#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.09:46:09.18#ibcon#[27=AT03-04\r\n] 2006.229.09:46:09.18#ibcon#*before write, iclass 36, count 2 2006.229.09:46:09.18#ibcon#enter sib2, iclass 36, count 2 2006.229.09:46:09.18#ibcon#flushed, iclass 36, count 2 2006.229.09:46:09.18#ibcon#about to write, iclass 36, count 2 2006.229.09:46:09.18#ibcon#wrote, iclass 36, count 2 2006.229.09:46:09.18#ibcon#about to read 3, iclass 36, count 2 2006.229.09:46:09.21#ibcon#read 3, iclass 36, count 2 2006.229.09:46:09.21#ibcon#about to read 4, iclass 36, count 2 2006.229.09:46:09.21#ibcon#read 4, iclass 36, count 2 2006.229.09:46:09.21#ibcon#about to read 5, iclass 36, count 2 2006.229.09:46:09.21#ibcon#read 5, iclass 36, count 2 2006.229.09:46:09.21#ibcon#about to read 6, iclass 36, count 2 2006.229.09:46:09.21#ibcon#read 6, iclass 36, count 2 2006.229.09:46:09.21#ibcon#end of sib2, iclass 36, count 2 2006.229.09:46:09.21#ibcon#*after write, iclass 36, count 2 2006.229.09:46:09.21#ibcon#*before return 0, iclass 36, count 2 2006.229.09:46:09.21#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:09.21#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.09:46:09.21#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.09:46:09.21#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:09.21#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:09.33#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:09.33#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:09.33#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:46:09.33#ibcon#first serial, iclass 36, count 0 2006.229.09:46:09.33#ibcon#enter sib2, iclass 36, count 0 2006.229.09:46:09.33#ibcon#flushed, iclass 36, count 0 2006.229.09:46:09.33#ibcon#about to write, iclass 36, count 0 2006.229.09:46:09.33#ibcon#wrote, iclass 36, count 0 2006.229.09:46:09.33#ibcon#about to read 3, iclass 36, count 0 2006.229.09:46:09.35#ibcon#read 3, iclass 36, count 0 2006.229.09:46:09.35#ibcon#about to read 4, iclass 36, count 0 2006.229.09:46:09.35#ibcon#read 4, iclass 36, count 0 2006.229.09:46:09.35#ibcon#about to read 5, iclass 36, count 0 2006.229.09:46:09.35#ibcon#read 5, iclass 36, count 0 2006.229.09:46:09.35#ibcon#about to read 6, iclass 36, count 0 2006.229.09:46:09.35#ibcon#read 6, iclass 36, count 0 2006.229.09:46:09.35#ibcon#end of sib2, iclass 36, count 0 2006.229.09:46:09.35#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:46:09.35#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:46:09.35#ibcon#[27=USB\r\n] 2006.229.09:46:09.35#ibcon#*before write, iclass 36, count 0 2006.229.09:46:09.35#ibcon#enter sib2, iclass 36, count 0 2006.229.09:46:09.35#ibcon#flushed, iclass 36, count 0 2006.229.09:46:09.35#ibcon#about to write, iclass 36, count 0 2006.229.09:46:09.35#ibcon#wrote, iclass 36, count 0 2006.229.09:46:09.35#ibcon#about to read 3, iclass 36, count 0 2006.229.09:46:09.38#ibcon#read 3, iclass 36, count 0 2006.229.09:46:09.38#ibcon#about to read 4, iclass 36, count 0 2006.229.09:46:09.38#ibcon#read 4, iclass 36, count 0 2006.229.09:46:09.38#ibcon#about to read 5, iclass 36, count 0 2006.229.09:46:09.38#ibcon#read 5, iclass 36, count 0 2006.229.09:46:09.38#ibcon#about to read 6, iclass 36, count 0 2006.229.09:46:09.38#ibcon#read 6, iclass 36, count 0 2006.229.09:46:09.38#ibcon#end of sib2, iclass 36, count 0 2006.229.09:46:09.38#ibcon#*after write, iclass 36, count 0 2006.229.09:46:09.38#ibcon#*before return 0, iclass 36, count 0 2006.229.09:46:09.38#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:09.38#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.09:46:09.38#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:46:09.38#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:46:09.38$vck44/vblo=4,679.99 2006.229.09:46:09.38#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.09:46:09.38#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.09:46:09.38#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:09.38#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:09.38#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:09.38#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:09.38#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:46:09.38#ibcon#first serial, iclass 38, count 0 2006.229.09:46:09.38#ibcon#enter sib2, iclass 38, count 0 2006.229.09:46:09.38#ibcon#flushed, iclass 38, count 0 2006.229.09:46:09.38#ibcon#about to write, iclass 38, count 0 2006.229.09:46:09.38#ibcon#wrote, iclass 38, count 0 2006.229.09:46:09.38#ibcon#about to read 3, iclass 38, count 0 2006.229.09:46:09.40#ibcon#read 3, iclass 38, count 0 2006.229.09:46:09.40#ibcon#about to read 4, iclass 38, count 0 2006.229.09:46:09.40#ibcon#read 4, iclass 38, count 0 2006.229.09:46:09.40#ibcon#about to read 5, iclass 38, count 0 2006.229.09:46:09.40#ibcon#read 5, iclass 38, count 0 2006.229.09:46:09.40#ibcon#about to read 6, iclass 38, count 0 2006.229.09:46:09.40#ibcon#read 6, iclass 38, count 0 2006.229.09:46:09.40#ibcon#end of sib2, iclass 38, count 0 2006.229.09:46:09.40#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:46:09.40#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:46:09.40#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:46:09.40#ibcon#*before write, iclass 38, count 0 2006.229.09:46:09.40#ibcon#enter sib2, iclass 38, count 0 2006.229.09:46:09.40#ibcon#flushed, iclass 38, count 0 2006.229.09:46:09.40#ibcon#about to write, iclass 38, count 0 2006.229.09:46:09.40#ibcon#wrote, iclass 38, count 0 2006.229.09:46:09.40#ibcon#about to read 3, iclass 38, count 0 2006.229.09:46:09.44#ibcon#read 3, iclass 38, count 0 2006.229.09:46:09.44#ibcon#about to read 4, iclass 38, count 0 2006.229.09:46:09.44#ibcon#read 4, iclass 38, count 0 2006.229.09:46:09.44#ibcon#about to read 5, iclass 38, count 0 2006.229.09:46:09.44#ibcon#read 5, iclass 38, count 0 2006.229.09:46:09.44#ibcon#about to read 6, iclass 38, count 0 2006.229.09:46:09.44#ibcon#read 6, iclass 38, count 0 2006.229.09:46:09.44#ibcon#end of sib2, iclass 38, count 0 2006.229.09:46:09.44#ibcon#*after write, iclass 38, count 0 2006.229.09:46:09.44#ibcon#*before return 0, iclass 38, count 0 2006.229.09:46:09.44#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:09.44#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.09:46:09.44#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:46:09.44#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:46:09.44$vck44/vb=4,4 2006.229.09:46:09.44#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.09:46:09.44#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.09:46:09.44#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:09.44#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:09.50#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:09.50#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:09.50#ibcon#enter wrdev, iclass 40, count 2 2006.229.09:46:09.50#ibcon#first serial, iclass 40, count 2 2006.229.09:46:09.50#ibcon#enter sib2, iclass 40, count 2 2006.229.09:46:09.50#ibcon#flushed, iclass 40, count 2 2006.229.09:46:09.50#ibcon#about to write, iclass 40, count 2 2006.229.09:46:09.50#ibcon#wrote, iclass 40, count 2 2006.229.09:46:09.50#ibcon#about to read 3, iclass 40, count 2 2006.229.09:46:09.52#ibcon#read 3, iclass 40, count 2 2006.229.09:46:09.52#ibcon#about to read 4, iclass 40, count 2 2006.229.09:46:09.52#ibcon#read 4, iclass 40, count 2 2006.229.09:46:09.52#ibcon#about to read 5, iclass 40, count 2 2006.229.09:46:09.52#ibcon#read 5, iclass 40, count 2 2006.229.09:46:09.52#ibcon#about to read 6, iclass 40, count 2 2006.229.09:46:09.52#ibcon#read 6, iclass 40, count 2 2006.229.09:46:09.52#ibcon#end of sib2, iclass 40, count 2 2006.229.09:46:09.52#ibcon#*mode == 0, iclass 40, count 2 2006.229.09:46:09.52#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.09:46:09.52#ibcon#[27=AT04-04\r\n] 2006.229.09:46:09.52#ibcon#*before write, iclass 40, count 2 2006.229.09:46:09.52#ibcon#enter sib2, iclass 40, count 2 2006.229.09:46:09.52#ibcon#flushed, iclass 40, count 2 2006.229.09:46:09.52#ibcon#about to write, iclass 40, count 2 2006.229.09:46:09.52#ibcon#wrote, iclass 40, count 2 2006.229.09:46:09.52#ibcon#about to read 3, iclass 40, count 2 2006.229.09:46:09.55#ibcon#read 3, iclass 40, count 2 2006.229.09:46:09.55#ibcon#about to read 4, iclass 40, count 2 2006.229.09:46:09.55#ibcon#read 4, iclass 40, count 2 2006.229.09:46:09.55#ibcon#about to read 5, iclass 40, count 2 2006.229.09:46:09.55#ibcon#read 5, iclass 40, count 2 2006.229.09:46:09.55#ibcon#about to read 6, iclass 40, count 2 2006.229.09:46:09.55#ibcon#read 6, iclass 40, count 2 2006.229.09:46:09.55#ibcon#end of sib2, iclass 40, count 2 2006.229.09:46:09.55#ibcon#*after write, iclass 40, count 2 2006.229.09:46:09.55#ibcon#*before return 0, iclass 40, count 2 2006.229.09:46:09.55#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:09.55#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.09:46:09.55#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.09:46:09.55#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:09.55#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:09.67#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:09.67#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:09.67#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:46:09.67#ibcon#first serial, iclass 40, count 0 2006.229.09:46:09.67#ibcon#enter sib2, iclass 40, count 0 2006.229.09:46:09.67#ibcon#flushed, iclass 40, count 0 2006.229.09:46:09.67#ibcon#about to write, iclass 40, count 0 2006.229.09:46:09.67#ibcon#wrote, iclass 40, count 0 2006.229.09:46:09.67#ibcon#about to read 3, iclass 40, count 0 2006.229.09:46:09.69#ibcon#read 3, iclass 40, count 0 2006.229.09:46:09.69#ibcon#about to read 4, iclass 40, count 0 2006.229.09:46:09.69#ibcon#read 4, iclass 40, count 0 2006.229.09:46:09.69#ibcon#about to read 5, iclass 40, count 0 2006.229.09:46:09.69#ibcon#read 5, iclass 40, count 0 2006.229.09:46:09.69#ibcon#about to read 6, iclass 40, count 0 2006.229.09:46:09.69#ibcon#read 6, iclass 40, count 0 2006.229.09:46:09.69#ibcon#end of sib2, iclass 40, count 0 2006.229.09:46:09.69#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:46:09.69#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:46:09.69#ibcon#[27=USB\r\n] 2006.229.09:46:09.69#ibcon#*before write, iclass 40, count 0 2006.229.09:46:09.69#ibcon#enter sib2, iclass 40, count 0 2006.229.09:46:09.69#ibcon#flushed, iclass 40, count 0 2006.229.09:46:10.34#ibcon#about to write, iclass 40, count 0 2006.229.09:46:10.34#ibcon#wrote, iclass 40, count 0 2006.229.09:46:10.34#ibcon#about to read 3, iclass 40, count 0 2006.229.09:46:10.37#ibcon#read 3, iclass 40, count 0 2006.229.09:46:10.37#ibcon#about to read 4, iclass 40, count 0 2006.229.09:46:10.37#ibcon#read 4, iclass 40, count 0 2006.229.09:46:10.37#ibcon#about to read 5, iclass 40, count 0 2006.229.09:46:10.37#ibcon#read 5, iclass 40, count 0 2006.229.09:46:10.37#ibcon#about to read 6, iclass 40, count 0 2006.229.09:46:10.37#ibcon#read 6, iclass 40, count 0 2006.229.09:46:10.37#ibcon#end of sib2, iclass 40, count 0 2006.229.09:46:10.37#ibcon#*after write, iclass 40, count 0 2006.229.09:46:10.37#ibcon#*before return 0, iclass 40, count 0 2006.229.09:46:10.37#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:10.37#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.09:46:10.37#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:46:10.37#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:46:10.37$vck44/vblo=5,709.99 2006.229.09:46:10.37#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.09:46:10.37#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.09:46:10.37#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:10.37#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:10.37#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:10.37#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:10.37#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:46:10.37#ibcon#first serial, iclass 4, count 0 2006.229.09:46:10.37#ibcon#enter sib2, iclass 4, count 0 2006.229.09:46:10.37#ibcon#flushed, iclass 4, count 0 2006.229.09:46:10.37#ibcon#about to write, iclass 4, count 0 2006.229.09:46:10.37#ibcon#wrote, iclass 4, count 0 2006.229.09:46:10.37#ibcon#about to read 3, iclass 4, count 0 2006.229.09:46:10.39#ibcon#read 3, iclass 4, count 0 2006.229.09:46:10.39#ibcon#about to read 4, iclass 4, count 0 2006.229.09:46:10.39#ibcon#read 4, iclass 4, count 0 2006.229.09:46:10.39#ibcon#about to read 5, iclass 4, count 0 2006.229.09:46:10.39#ibcon#read 5, iclass 4, count 0 2006.229.09:46:10.39#ibcon#about to read 6, iclass 4, count 0 2006.229.09:46:10.39#ibcon#read 6, iclass 4, count 0 2006.229.09:46:10.39#ibcon#end of sib2, iclass 4, count 0 2006.229.09:46:10.39#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:46:10.39#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:46:10.39#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:46:10.39#ibcon#*before write, iclass 4, count 0 2006.229.09:46:10.39#ibcon#enter sib2, iclass 4, count 0 2006.229.09:46:10.39#ibcon#flushed, iclass 4, count 0 2006.229.09:46:10.39#ibcon#about to write, iclass 4, count 0 2006.229.09:46:10.39#ibcon#wrote, iclass 4, count 0 2006.229.09:46:10.39#ibcon#about to read 3, iclass 4, count 0 2006.229.09:46:10.43#ibcon#read 3, iclass 4, count 0 2006.229.09:46:10.43#ibcon#about to read 4, iclass 4, count 0 2006.229.09:46:10.43#ibcon#read 4, iclass 4, count 0 2006.229.09:46:10.43#ibcon#about to read 5, iclass 4, count 0 2006.229.09:46:10.43#ibcon#read 5, iclass 4, count 0 2006.229.09:46:10.43#ibcon#about to read 6, iclass 4, count 0 2006.229.09:46:10.43#ibcon#read 6, iclass 4, count 0 2006.229.09:46:10.43#ibcon#end of sib2, iclass 4, count 0 2006.229.09:46:10.43#ibcon#*after write, iclass 4, count 0 2006.229.09:46:10.43#ibcon#*before return 0, iclass 4, count 0 2006.229.09:46:10.43#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:10.43#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.09:46:10.43#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:46:10.43#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:46:10.43$vck44/vb=5,4 2006.229.09:46:10.43#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.09:46:10.43#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.09:46:10.43#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:10.43#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:10.49#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:10.49#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:10.49#ibcon#enter wrdev, iclass 6, count 2 2006.229.09:46:10.49#ibcon#first serial, iclass 6, count 2 2006.229.09:46:10.49#ibcon#enter sib2, iclass 6, count 2 2006.229.09:46:10.49#ibcon#flushed, iclass 6, count 2 2006.229.09:46:10.49#ibcon#about to write, iclass 6, count 2 2006.229.09:46:10.49#ibcon#wrote, iclass 6, count 2 2006.229.09:46:10.49#ibcon#about to read 3, iclass 6, count 2 2006.229.09:46:10.51#ibcon#read 3, iclass 6, count 2 2006.229.09:46:10.51#ibcon#about to read 4, iclass 6, count 2 2006.229.09:46:10.51#ibcon#read 4, iclass 6, count 2 2006.229.09:46:10.51#ibcon#about to read 5, iclass 6, count 2 2006.229.09:46:10.51#ibcon#read 5, iclass 6, count 2 2006.229.09:46:10.51#ibcon#about to read 6, iclass 6, count 2 2006.229.09:46:10.51#ibcon#read 6, iclass 6, count 2 2006.229.09:46:10.51#ibcon#end of sib2, iclass 6, count 2 2006.229.09:46:10.51#ibcon#*mode == 0, iclass 6, count 2 2006.229.09:46:10.51#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.09:46:10.51#ibcon#[27=AT05-04\r\n] 2006.229.09:46:10.51#ibcon#*before write, iclass 6, count 2 2006.229.09:46:10.51#ibcon#enter sib2, iclass 6, count 2 2006.229.09:46:10.51#ibcon#flushed, iclass 6, count 2 2006.229.09:46:10.51#ibcon#about to write, iclass 6, count 2 2006.229.09:46:10.51#ibcon#wrote, iclass 6, count 2 2006.229.09:46:10.51#ibcon#about to read 3, iclass 6, count 2 2006.229.09:46:10.54#ibcon#read 3, iclass 6, count 2 2006.229.09:46:10.54#ibcon#about to read 4, iclass 6, count 2 2006.229.09:46:10.54#ibcon#read 4, iclass 6, count 2 2006.229.09:46:10.54#ibcon#about to read 5, iclass 6, count 2 2006.229.09:46:10.54#ibcon#read 5, iclass 6, count 2 2006.229.09:46:10.54#ibcon#about to read 6, iclass 6, count 2 2006.229.09:46:10.54#ibcon#read 6, iclass 6, count 2 2006.229.09:46:10.54#ibcon#end of sib2, iclass 6, count 2 2006.229.09:46:10.54#ibcon#*after write, iclass 6, count 2 2006.229.09:46:10.54#ibcon#*before return 0, iclass 6, count 2 2006.229.09:46:10.54#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:10.54#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.09:46:10.54#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.09:46:10.54#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:10.54#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:10.66#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:10.66#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:10.66#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:46:10.66#ibcon#first serial, iclass 6, count 0 2006.229.09:46:10.66#ibcon#enter sib2, iclass 6, count 0 2006.229.09:46:10.66#ibcon#flushed, iclass 6, count 0 2006.229.09:46:10.66#ibcon#about to write, iclass 6, count 0 2006.229.09:46:10.66#ibcon#wrote, iclass 6, count 0 2006.229.09:46:10.66#ibcon#about to read 3, iclass 6, count 0 2006.229.09:46:10.68#ibcon#read 3, iclass 6, count 0 2006.229.09:46:10.68#ibcon#about to read 4, iclass 6, count 0 2006.229.09:46:10.68#ibcon#read 4, iclass 6, count 0 2006.229.09:46:10.68#ibcon#about to read 5, iclass 6, count 0 2006.229.09:46:10.68#ibcon#read 5, iclass 6, count 0 2006.229.09:46:10.68#ibcon#about to read 6, iclass 6, count 0 2006.229.09:46:10.68#ibcon#read 6, iclass 6, count 0 2006.229.09:46:10.68#ibcon#end of sib2, iclass 6, count 0 2006.229.09:46:10.68#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:46:10.68#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:46:10.68#ibcon#[27=USB\r\n] 2006.229.09:46:10.68#ibcon#*before write, iclass 6, count 0 2006.229.09:46:10.68#ibcon#enter sib2, iclass 6, count 0 2006.229.09:46:10.68#ibcon#flushed, iclass 6, count 0 2006.229.09:46:10.68#ibcon#about to write, iclass 6, count 0 2006.229.09:46:10.68#ibcon#wrote, iclass 6, count 0 2006.229.09:46:10.68#ibcon#about to read 3, iclass 6, count 0 2006.229.09:46:10.71#ibcon#read 3, iclass 6, count 0 2006.229.09:46:10.71#ibcon#about to read 4, iclass 6, count 0 2006.229.09:46:10.71#ibcon#read 4, iclass 6, count 0 2006.229.09:46:10.71#ibcon#about to read 5, iclass 6, count 0 2006.229.09:46:10.71#ibcon#read 5, iclass 6, count 0 2006.229.09:46:10.71#ibcon#about to read 6, iclass 6, count 0 2006.229.09:46:10.71#ibcon#read 6, iclass 6, count 0 2006.229.09:46:10.71#ibcon#end of sib2, iclass 6, count 0 2006.229.09:46:10.71#ibcon#*after write, iclass 6, count 0 2006.229.09:46:10.71#ibcon#*before return 0, iclass 6, count 0 2006.229.09:46:10.71#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:10.71#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.09:46:10.71#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:46:10.71#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:46:10.71$vck44/vblo=6,719.99 2006.229.09:46:10.71#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.09:46:10.71#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.09:46:10.71#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:10.71#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:10.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:10.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:10.71#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:46:10.71#ibcon#first serial, iclass 10, count 0 2006.229.09:46:10.71#ibcon#enter sib2, iclass 10, count 0 2006.229.09:46:10.71#ibcon#flushed, iclass 10, count 0 2006.229.09:46:10.71#ibcon#about to write, iclass 10, count 0 2006.229.09:46:10.71#ibcon#wrote, iclass 10, count 0 2006.229.09:46:10.71#ibcon#about to read 3, iclass 10, count 0 2006.229.09:46:10.73#ibcon#read 3, iclass 10, count 0 2006.229.09:46:10.73#ibcon#about to read 4, iclass 10, count 0 2006.229.09:46:10.73#ibcon#read 4, iclass 10, count 0 2006.229.09:46:10.73#ibcon#about to read 5, iclass 10, count 0 2006.229.09:46:10.73#ibcon#read 5, iclass 10, count 0 2006.229.09:46:10.73#ibcon#about to read 6, iclass 10, count 0 2006.229.09:46:10.73#ibcon#read 6, iclass 10, count 0 2006.229.09:46:10.73#ibcon#end of sib2, iclass 10, count 0 2006.229.09:46:10.73#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:46:10.73#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:46:10.73#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:46:10.73#ibcon#*before write, iclass 10, count 0 2006.229.09:46:10.73#ibcon#enter sib2, iclass 10, count 0 2006.229.09:46:10.73#ibcon#flushed, iclass 10, count 0 2006.229.09:46:10.73#ibcon#about to write, iclass 10, count 0 2006.229.09:46:10.73#ibcon#wrote, iclass 10, count 0 2006.229.09:46:10.73#ibcon#about to read 3, iclass 10, count 0 2006.229.09:46:10.77#ibcon#read 3, iclass 10, count 0 2006.229.09:46:10.77#ibcon#about to read 4, iclass 10, count 0 2006.229.09:46:10.77#ibcon#read 4, iclass 10, count 0 2006.229.09:46:10.77#ibcon#about to read 5, iclass 10, count 0 2006.229.09:46:10.77#ibcon#read 5, iclass 10, count 0 2006.229.09:46:10.77#ibcon#about to read 6, iclass 10, count 0 2006.229.09:46:10.77#ibcon#read 6, iclass 10, count 0 2006.229.09:46:10.77#ibcon#end of sib2, iclass 10, count 0 2006.229.09:46:10.77#ibcon#*after write, iclass 10, count 0 2006.229.09:46:10.77#ibcon#*before return 0, iclass 10, count 0 2006.229.09:46:10.77#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:10.77#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.09:46:10.77#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:46:10.77#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:46:10.77$vck44/vb=6,4 2006.229.09:46:10.77#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.09:46:10.77#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.09:46:10.77#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:10.77#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:10.83#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:10.83#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:10.83#ibcon#enter wrdev, iclass 12, count 2 2006.229.09:46:10.83#ibcon#first serial, iclass 12, count 2 2006.229.09:46:10.83#ibcon#enter sib2, iclass 12, count 2 2006.229.09:46:10.83#ibcon#flushed, iclass 12, count 2 2006.229.09:46:10.83#ibcon#about to write, iclass 12, count 2 2006.229.09:46:10.83#ibcon#wrote, iclass 12, count 2 2006.229.09:46:10.83#ibcon#about to read 3, iclass 12, count 2 2006.229.09:46:10.85#ibcon#read 3, iclass 12, count 2 2006.229.09:46:10.85#ibcon#about to read 4, iclass 12, count 2 2006.229.09:46:10.85#ibcon#read 4, iclass 12, count 2 2006.229.09:46:10.85#ibcon#about to read 5, iclass 12, count 2 2006.229.09:46:10.85#ibcon#read 5, iclass 12, count 2 2006.229.09:46:10.85#ibcon#about to read 6, iclass 12, count 2 2006.229.09:46:10.85#ibcon#read 6, iclass 12, count 2 2006.229.09:46:10.85#ibcon#end of sib2, iclass 12, count 2 2006.229.09:46:10.85#ibcon#*mode == 0, iclass 12, count 2 2006.229.09:46:10.85#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.09:46:10.85#ibcon#[27=AT06-04\r\n] 2006.229.09:46:10.85#ibcon#*before write, iclass 12, count 2 2006.229.09:46:10.85#ibcon#enter sib2, iclass 12, count 2 2006.229.09:46:10.85#ibcon#flushed, iclass 12, count 2 2006.229.09:46:10.85#ibcon#about to write, iclass 12, count 2 2006.229.09:46:10.85#ibcon#wrote, iclass 12, count 2 2006.229.09:46:10.85#ibcon#about to read 3, iclass 12, count 2 2006.229.09:46:10.88#ibcon#read 3, iclass 12, count 2 2006.229.09:46:10.88#ibcon#about to read 4, iclass 12, count 2 2006.229.09:46:10.88#ibcon#read 4, iclass 12, count 2 2006.229.09:46:10.88#ibcon#about to read 5, iclass 12, count 2 2006.229.09:46:10.88#ibcon#read 5, iclass 12, count 2 2006.229.09:46:10.88#ibcon#about to read 6, iclass 12, count 2 2006.229.09:46:10.88#ibcon#read 6, iclass 12, count 2 2006.229.09:46:10.88#ibcon#end of sib2, iclass 12, count 2 2006.229.09:46:10.88#ibcon#*after write, iclass 12, count 2 2006.229.09:46:10.88#ibcon#*before return 0, iclass 12, count 2 2006.229.09:46:10.88#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:10.88#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.09:46:10.88#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.09:46:10.88#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:10.88#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:11.00#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:11.00#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:11.00#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:46:11.00#ibcon#first serial, iclass 12, count 0 2006.229.09:46:11.00#ibcon#enter sib2, iclass 12, count 0 2006.229.09:46:11.00#ibcon#flushed, iclass 12, count 0 2006.229.09:46:11.00#ibcon#about to write, iclass 12, count 0 2006.229.09:46:11.00#ibcon#wrote, iclass 12, count 0 2006.229.09:46:11.00#ibcon#about to read 3, iclass 12, count 0 2006.229.09:46:11.02#ibcon#read 3, iclass 12, count 0 2006.229.09:46:11.02#ibcon#about to read 4, iclass 12, count 0 2006.229.09:46:11.02#ibcon#read 4, iclass 12, count 0 2006.229.09:46:11.02#ibcon#about to read 5, iclass 12, count 0 2006.229.09:46:11.02#ibcon#read 5, iclass 12, count 0 2006.229.09:46:11.02#ibcon#about to read 6, iclass 12, count 0 2006.229.09:46:11.02#ibcon#read 6, iclass 12, count 0 2006.229.09:46:11.02#ibcon#end of sib2, iclass 12, count 0 2006.229.09:46:11.02#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:46:11.02#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:46:11.02#ibcon#[27=USB\r\n] 2006.229.09:46:11.02#ibcon#*before write, iclass 12, count 0 2006.229.09:46:11.02#ibcon#enter sib2, iclass 12, count 0 2006.229.09:46:11.02#ibcon#flushed, iclass 12, count 0 2006.229.09:46:11.02#ibcon#about to write, iclass 12, count 0 2006.229.09:46:11.02#ibcon#wrote, iclass 12, count 0 2006.229.09:46:11.02#ibcon#about to read 3, iclass 12, count 0 2006.229.09:46:11.05#ibcon#read 3, iclass 12, count 0 2006.229.09:46:11.05#ibcon#about to read 4, iclass 12, count 0 2006.229.09:46:11.05#ibcon#read 4, iclass 12, count 0 2006.229.09:46:11.05#ibcon#about to read 5, iclass 12, count 0 2006.229.09:46:11.05#ibcon#read 5, iclass 12, count 0 2006.229.09:46:11.05#ibcon#about to read 6, iclass 12, count 0 2006.229.09:46:11.05#ibcon#read 6, iclass 12, count 0 2006.229.09:46:11.05#ibcon#end of sib2, iclass 12, count 0 2006.229.09:46:11.05#ibcon#*after write, iclass 12, count 0 2006.229.09:46:11.05#ibcon#*before return 0, iclass 12, count 0 2006.229.09:46:11.05#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:11.05#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.09:46:11.05#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:46:11.05#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:46:11.05$vck44/vblo=7,734.99 2006.229.09:46:11.05#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.09:46:11.05#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.09:46:11.05#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:11.05#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:11.05#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:11.05#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:11.05#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:46:11.05#ibcon#first serial, iclass 14, count 0 2006.229.09:46:11.05#ibcon#enter sib2, iclass 14, count 0 2006.229.09:46:11.05#ibcon#flushed, iclass 14, count 0 2006.229.09:46:11.05#ibcon#about to write, iclass 14, count 0 2006.229.09:46:11.05#ibcon#wrote, iclass 14, count 0 2006.229.09:46:11.05#ibcon#about to read 3, iclass 14, count 0 2006.229.09:46:11.07#ibcon#read 3, iclass 14, count 0 2006.229.09:46:11.07#ibcon#about to read 4, iclass 14, count 0 2006.229.09:46:11.07#ibcon#read 4, iclass 14, count 0 2006.229.09:46:11.07#ibcon#about to read 5, iclass 14, count 0 2006.229.09:46:11.07#ibcon#read 5, iclass 14, count 0 2006.229.09:46:11.07#ibcon#about to read 6, iclass 14, count 0 2006.229.09:46:11.07#ibcon#read 6, iclass 14, count 0 2006.229.09:46:11.07#ibcon#end of sib2, iclass 14, count 0 2006.229.09:46:11.07#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:46:11.07#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:46:11.07#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:46:11.07#ibcon#*before write, iclass 14, count 0 2006.229.09:46:11.07#ibcon#enter sib2, iclass 14, count 0 2006.229.09:46:11.07#ibcon#flushed, iclass 14, count 0 2006.229.09:46:11.07#ibcon#about to write, iclass 14, count 0 2006.229.09:46:11.07#ibcon#wrote, iclass 14, count 0 2006.229.09:46:11.07#ibcon#about to read 3, iclass 14, count 0 2006.229.09:46:11.11#ibcon#read 3, iclass 14, count 0 2006.229.09:46:11.11#ibcon#about to read 4, iclass 14, count 0 2006.229.09:46:11.11#ibcon#read 4, iclass 14, count 0 2006.229.09:46:11.11#ibcon#about to read 5, iclass 14, count 0 2006.229.09:46:11.11#ibcon#read 5, iclass 14, count 0 2006.229.09:46:11.11#ibcon#about to read 6, iclass 14, count 0 2006.229.09:46:11.11#ibcon#read 6, iclass 14, count 0 2006.229.09:46:11.11#ibcon#end of sib2, iclass 14, count 0 2006.229.09:46:11.11#ibcon#*after write, iclass 14, count 0 2006.229.09:46:11.11#ibcon#*before return 0, iclass 14, count 0 2006.229.09:46:11.11#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:11.11#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.09:46:11.11#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:46:11.11#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:46:11.11$vck44/vb=7,4 2006.229.09:46:11.11#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.09:46:11.11#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.09:46:11.11#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:11.11#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:11.17#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:11.17#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:11.17#ibcon#enter wrdev, iclass 16, count 2 2006.229.09:46:11.17#ibcon#first serial, iclass 16, count 2 2006.229.09:46:11.17#ibcon#enter sib2, iclass 16, count 2 2006.229.09:46:11.17#ibcon#flushed, iclass 16, count 2 2006.229.09:46:11.17#ibcon#about to write, iclass 16, count 2 2006.229.09:46:11.17#ibcon#wrote, iclass 16, count 2 2006.229.09:46:11.17#ibcon#about to read 3, iclass 16, count 2 2006.229.09:46:11.19#ibcon#read 3, iclass 16, count 2 2006.229.09:46:11.19#ibcon#about to read 4, iclass 16, count 2 2006.229.09:46:11.19#ibcon#read 4, iclass 16, count 2 2006.229.09:46:11.19#ibcon#about to read 5, iclass 16, count 2 2006.229.09:46:11.19#ibcon#read 5, iclass 16, count 2 2006.229.09:46:11.19#ibcon#about to read 6, iclass 16, count 2 2006.229.09:46:11.19#ibcon#read 6, iclass 16, count 2 2006.229.09:46:11.19#ibcon#end of sib2, iclass 16, count 2 2006.229.09:46:11.19#ibcon#*mode == 0, iclass 16, count 2 2006.229.09:46:11.19#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.09:46:11.19#ibcon#[27=AT07-04\r\n] 2006.229.09:46:11.19#ibcon#*before write, iclass 16, count 2 2006.229.09:46:11.19#ibcon#enter sib2, iclass 16, count 2 2006.229.09:46:11.19#ibcon#flushed, iclass 16, count 2 2006.229.09:46:11.19#ibcon#about to write, iclass 16, count 2 2006.229.09:46:11.19#ibcon#wrote, iclass 16, count 2 2006.229.09:46:11.19#ibcon#about to read 3, iclass 16, count 2 2006.229.09:46:11.22#ibcon#read 3, iclass 16, count 2 2006.229.09:46:11.22#ibcon#about to read 4, iclass 16, count 2 2006.229.09:46:11.22#ibcon#read 4, iclass 16, count 2 2006.229.09:46:11.22#ibcon#about to read 5, iclass 16, count 2 2006.229.09:46:11.22#ibcon#read 5, iclass 16, count 2 2006.229.09:46:11.22#ibcon#about to read 6, iclass 16, count 2 2006.229.09:46:11.22#ibcon#read 6, iclass 16, count 2 2006.229.09:46:11.22#ibcon#end of sib2, iclass 16, count 2 2006.229.09:46:11.22#ibcon#*after write, iclass 16, count 2 2006.229.09:46:11.22#ibcon#*before return 0, iclass 16, count 2 2006.229.09:46:11.22#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:11.22#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.09:46:11.22#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.09:46:11.22#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:11.22#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:11.34#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:11.34#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:11.34#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:46:11.34#ibcon#first serial, iclass 16, count 0 2006.229.09:46:11.34#ibcon#enter sib2, iclass 16, count 0 2006.229.09:46:11.34#ibcon#flushed, iclass 16, count 0 2006.229.09:46:11.34#ibcon#about to write, iclass 16, count 0 2006.229.09:46:11.34#ibcon#wrote, iclass 16, count 0 2006.229.09:46:11.34#ibcon#about to read 3, iclass 16, count 0 2006.229.09:46:11.36#ibcon#read 3, iclass 16, count 0 2006.229.09:46:11.36#ibcon#about to read 4, iclass 16, count 0 2006.229.09:46:11.36#ibcon#read 4, iclass 16, count 0 2006.229.09:46:11.36#ibcon#about to read 5, iclass 16, count 0 2006.229.09:46:11.36#ibcon#read 5, iclass 16, count 0 2006.229.09:46:11.36#ibcon#about to read 6, iclass 16, count 0 2006.229.09:46:11.36#ibcon#read 6, iclass 16, count 0 2006.229.09:46:11.36#ibcon#end of sib2, iclass 16, count 0 2006.229.09:46:11.36#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:46:11.36#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:46:11.36#ibcon#[27=USB\r\n] 2006.229.09:46:11.36#ibcon#*before write, iclass 16, count 0 2006.229.09:46:11.36#ibcon#enter sib2, iclass 16, count 0 2006.229.09:46:11.36#ibcon#flushed, iclass 16, count 0 2006.229.09:46:11.36#ibcon#about to write, iclass 16, count 0 2006.229.09:46:11.36#ibcon#wrote, iclass 16, count 0 2006.229.09:46:11.36#ibcon#about to read 3, iclass 16, count 0 2006.229.09:46:11.39#ibcon#read 3, iclass 16, count 0 2006.229.09:46:11.39#ibcon#about to read 4, iclass 16, count 0 2006.229.09:46:11.39#ibcon#read 4, iclass 16, count 0 2006.229.09:46:11.39#ibcon#about to read 5, iclass 16, count 0 2006.229.09:46:11.39#ibcon#read 5, iclass 16, count 0 2006.229.09:46:11.39#ibcon#about to read 6, iclass 16, count 0 2006.229.09:46:11.39#ibcon#read 6, iclass 16, count 0 2006.229.09:46:11.39#ibcon#end of sib2, iclass 16, count 0 2006.229.09:46:11.39#ibcon#*after write, iclass 16, count 0 2006.229.09:46:11.39#ibcon#*before return 0, iclass 16, count 0 2006.229.09:46:11.39#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:11.39#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.09:46:11.39#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:46:11.39#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:46:11.39$vck44/vblo=8,744.99 2006.229.09:46:11.39#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.09:46:11.39#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.09:46:11.39#ibcon#ireg 17 cls_cnt 0 2006.229.09:46:11.39#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:11.39#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:11.39#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:11.39#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:46:11.39#ibcon#first serial, iclass 18, count 0 2006.229.09:46:11.39#ibcon#enter sib2, iclass 18, count 0 2006.229.09:46:11.39#ibcon#flushed, iclass 18, count 0 2006.229.09:46:11.39#ibcon#about to write, iclass 18, count 0 2006.229.09:46:11.39#ibcon#wrote, iclass 18, count 0 2006.229.09:46:11.39#ibcon#about to read 3, iclass 18, count 0 2006.229.09:46:11.41#ibcon#read 3, iclass 18, count 0 2006.229.09:46:11.41#ibcon#about to read 4, iclass 18, count 0 2006.229.09:46:11.41#ibcon#read 4, iclass 18, count 0 2006.229.09:46:11.41#ibcon#about to read 5, iclass 18, count 0 2006.229.09:46:11.41#ibcon#read 5, iclass 18, count 0 2006.229.09:46:11.41#ibcon#about to read 6, iclass 18, count 0 2006.229.09:46:11.41#ibcon#read 6, iclass 18, count 0 2006.229.09:46:11.41#ibcon#end of sib2, iclass 18, count 0 2006.229.09:46:11.41#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:46:11.41#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:46:11.41#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:46:11.41#ibcon#*before write, iclass 18, count 0 2006.229.09:46:11.41#ibcon#enter sib2, iclass 18, count 0 2006.229.09:46:11.41#ibcon#flushed, iclass 18, count 0 2006.229.09:46:11.41#ibcon#about to write, iclass 18, count 0 2006.229.09:46:11.41#ibcon#wrote, iclass 18, count 0 2006.229.09:46:11.41#ibcon#about to read 3, iclass 18, count 0 2006.229.09:46:11.45#ibcon#read 3, iclass 18, count 0 2006.229.09:46:11.45#ibcon#about to read 4, iclass 18, count 0 2006.229.09:46:11.45#ibcon#read 4, iclass 18, count 0 2006.229.09:46:11.45#ibcon#about to read 5, iclass 18, count 0 2006.229.09:46:11.45#ibcon#read 5, iclass 18, count 0 2006.229.09:46:11.45#ibcon#about to read 6, iclass 18, count 0 2006.229.09:46:11.45#ibcon#read 6, iclass 18, count 0 2006.229.09:46:11.45#ibcon#end of sib2, iclass 18, count 0 2006.229.09:46:11.45#ibcon#*after write, iclass 18, count 0 2006.229.09:46:11.45#ibcon#*before return 0, iclass 18, count 0 2006.229.09:46:11.45#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:11.45#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.09:46:11.45#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:46:11.45#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:46:11.45$vck44/vb=8,4 2006.229.09:46:11.45#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.09:46:11.45#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.09:46:11.45#ibcon#ireg 11 cls_cnt 2 2006.229.09:46:11.45#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:11.51#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:11.51#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:11.51#ibcon#enter wrdev, iclass 20, count 2 2006.229.09:46:11.51#ibcon#first serial, iclass 20, count 2 2006.229.09:46:11.51#ibcon#enter sib2, iclass 20, count 2 2006.229.09:46:11.51#ibcon#flushed, iclass 20, count 2 2006.229.09:46:11.51#ibcon#about to write, iclass 20, count 2 2006.229.09:46:11.51#ibcon#wrote, iclass 20, count 2 2006.229.09:46:11.51#ibcon#about to read 3, iclass 20, count 2 2006.229.09:46:11.53#ibcon#read 3, iclass 20, count 2 2006.229.09:46:11.53#ibcon#about to read 4, iclass 20, count 2 2006.229.09:46:11.53#ibcon#read 4, iclass 20, count 2 2006.229.09:46:11.53#ibcon#about to read 5, iclass 20, count 2 2006.229.09:46:11.53#ibcon#read 5, iclass 20, count 2 2006.229.09:46:11.53#ibcon#about to read 6, iclass 20, count 2 2006.229.09:46:11.53#ibcon#read 6, iclass 20, count 2 2006.229.09:46:11.53#ibcon#end of sib2, iclass 20, count 2 2006.229.09:46:11.53#ibcon#*mode == 0, iclass 20, count 2 2006.229.09:46:11.53#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.09:46:11.53#ibcon#[27=AT08-04\r\n] 2006.229.09:46:11.53#ibcon#*before write, iclass 20, count 2 2006.229.09:46:11.53#ibcon#enter sib2, iclass 20, count 2 2006.229.09:46:11.53#ibcon#flushed, iclass 20, count 2 2006.229.09:46:11.53#ibcon#about to write, iclass 20, count 2 2006.229.09:46:11.53#ibcon#wrote, iclass 20, count 2 2006.229.09:46:11.53#ibcon#about to read 3, iclass 20, count 2 2006.229.09:46:11.56#ibcon#read 3, iclass 20, count 2 2006.229.09:46:11.56#ibcon#about to read 4, iclass 20, count 2 2006.229.09:46:11.56#ibcon#read 4, iclass 20, count 2 2006.229.09:46:11.56#ibcon#about to read 5, iclass 20, count 2 2006.229.09:46:11.56#ibcon#read 5, iclass 20, count 2 2006.229.09:46:11.56#ibcon#about to read 6, iclass 20, count 2 2006.229.09:46:11.56#ibcon#read 6, iclass 20, count 2 2006.229.09:46:11.56#ibcon#end of sib2, iclass 20, count 2 2006.229.09:46:11.56#ibcon#*after write, iclass 20, count 2 2006.229.09:46:11.56#ibcon#*before return 0, iclass 20, count 2 2006.229.09:46:11.56#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:11.56#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.09:46:11.56#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.09:46:11.56#ibcon#ireg 7 cls_cnt 0 2006.229.09:46:11.56#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:11.68#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:11.68#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:11.68#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:46:11.68#ibcon#first serial, iclass 20, count 0 2006.229.09:46:11.68#ibcon#enter sib2, iclass 20, count 0 2006.229.09:46:11.68#ibcon#flushed, iclass 20, count 0 2006.229.09:46:11.68#ibcon#about to write, iclass 20, count 0 2006.229.09:46:11.68#ibcon#wrote, iclass 20, count 0 2006.229.09:46:11.68#ibcon#about to read 3, iclass 20, count 0 2006.229.09:46:11.70#ibcon#read 3, iclass 20, count 0 2006.229.09:46:11.70#ibcon#about to read 4, iclass 20, count 0 2006.229.09:46:11.70#ibcon#read 4, iclass 20, count 0 2006.229.09:46:11.70#ibcon#about to read 5, iclass 20, count 0 2006.229.09:46:11.70#ibcon#read 5, iclass 20, count 0 2006.229.09:46:11.70#ibcon#about to read 6, iclass 20, count 0 2006.229.09:46:11.70#ibcon#read 6, iclass 20, count 0 2006.229.09:46:11.70#ibcon#end of sib2, iclass 20, count 0 2006.229.09:46:11.70#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:46:11.70#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:46:11.70#ibcon#[27=USB\r\n] 2006.229.09:46:11.70#ibcon#*before write, iclass 20, count 0 2006.229.09:46:11.70#ibcon#enter sib2, iclass 20, count 0 2006.229.09:46:11.70#ibcon#flushed, iclass 20, count 0 2006.229.09:46:11.70#ibcon#about to write, iclass 20, count 0 2006.229.09:46:11.70#ibcon#wrote, iclass 20, count 0 2006.229.09:46:11.70#ibcon#about to read 3, iclass 20, count 0 2006.229.09:46:11.73#ibcon#read 3, iclass 20, count 0 2006.229.09:46:11.73#ibcon#about to read 4, iclass 20, count 0 2006.229.09:46:11.73#ibcon#read 4, iclass 20, count 0 2006.229.09:46:12.54#ibcon#about to read 5, iclass 20, count 0 2006.229.09:46:12.54#ibcon#read 5, iclass 20, count 0 2006.229.09:46:12.54#ibcon#about to read 6, iclass 20, count 0 2006.229.09:46:12.54#ibcon#read 6, iclass 20, count 0 2006.229.09:46:12.54#ibcon#end of sib2, iclass 20, count 0 2006.229.09:46:12.54#ibcon#*after write, iclass 20, count 0 2006.229.09:46:12.54#ibcon#*before return 0, iclass 20, count 0 2006.229.09:46:12.54#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:12.54#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.09:46:12.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:46:12.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:46:12.55$vck44/vabw=wide 2006.229.09:46:12.55#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.09:46:12.55#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.09:46:12.55#ibcon#ireg 8 cls_cnt 0 2006.229.09:46:12.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:46:12.55#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:46:12.55#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:46:12.55#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:46:12.55#ibcon#first serial, iclass 22, count 0 2006.229.09:46:12.55#ibcon#enter sib2, iclass 22, count 0 2006.229.09:46:12.55#ibcon#flushed, iclass 22, count 0 2006.229.09:46:12.55#ibcon#about to write, iclass 22, count 0 2006.229.09:46:12.55#ibcon#wrote, iclass 22, count 0 2006.229.09:46:12.55#ibcon#about to read 3, iclass 22, count 0 2006.229.09:46:12.57#ibcon#read 3, iclass 22, count 0 2006.229.09:46:12.57#ibcon#about to read 4, iclass 22, count 0 2006.229.09:46:12.57#ibcon#read 4, iclass 22, count 0 2006.229.09:46:12.57#ibcon#about to read 5, iclass 22, count 0 2006.229.09:46:12.57#ibcon#read 5, iclass 22, count 0 2006.229.09:46:12.57#ibcon#about to read 6, iclass 22, count 0 2006.229.09:46:12.57#ibcon#read 6, iclass 22, count 0 2006.229.09:46:12.57#ibcon#end of sib2, iclass 22, count 0 2006.229.09:46:12.57#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:46:12.57#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:46:12.57#ibcon#[25=BW32\r\n] 2006.229.09:46:12.57#ibcon#*before write, iclass 22, count 0 2006.229.09:46:12.57#ibcon#enter sib2, iclass 22, count 0 2006.229.09:46:12.57#ibcon#flushed, iclass 22, count 0 2006.229.09:46:12.57#ibcon#about to write, iclass 22, count 0 2006.229.09:46:12.57#ibcon#wrote, iclass 22, count 0 2006.229.09:46:12.57#ibcon#about to read 3, iclass 22, count 0 2006.229.09:46:12.60#ibcon#read 3, iclass 22, count 0 2006.229.09:46:12.60#ibcon#about to read 4, iclass 22, count 0 2006.229.09:46:12.60#ibcon#read 4, iclass 22, count 0 2006.229.09:46:12.60#ibcon#about to read 5, iclass 22, count 0 2006.229.09:46:12.60#ibcon#read 5, iclass 22, count 0 2006.229.09:46:12.60#ibcon#about to read 6, iclass 22, count 0 2006.229.09:46:12.60#ibcon#read 6, iclass 22, count 0 2006.229.09:46:12.60#ibcon#end of sib2, iclass 22, count 0 2006.229.09:46:12.60#ibcon#*after write, iclass 22, count 0 2006.229.09:46:12.60#ibcon#*before return 0, iclass 22, count 0 2006.229.09:46:12.60#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:46:12.60#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.09:46:12.60#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:46:12.60#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:46:12.60$vck44/vbbw=wide 2006.229.09:46:12.60#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:46:12.60#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:46:12.60#ibcon#ireg 8 cls_cnt 0 2006.229.09:46:12.60#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:46:12.66#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:46:12.66#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:46:12.66#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:46:12.66#ibcon#first serial, iclass 24, count 0 2006.229.09:46:12.66#ibcon#enter sib2, iclass 24, count 0 2006.229.09:46:12.66#ibcon#flushed, iclass 24, count 0 2006.229.09:46:12.66#ibcon#about to write, iclass 24, count 0 2006.229.09:46:12.66#ibcon#wrote, iclass 24, count 0 2006.229.09:46:12.66#ibcon#about to read 3, iclass 24, count 0 2006.229.09:46:12.68#ibcon#read 3, iclass 24, count 0 2006.229.09:46:12.68#ibcon#about to read 4, iclass 24, count 0 2006.229.09:46:12.68#ibcon#read 4, iclass 24, count 0 2006.229.09:46:12.68#ibcon#about to read 5, iclass 24, count 0 2006.229.09:46:12.68#ibcon#read 5, iclass 24, count 0 2006.229.09:46:12.68#ibcon#about to read 6, iclass 24, count 0 2006.229.09:46:12.68#ibcon#read 6, iclass 24, count 0 2006.229.09:46:12.68#ibcon#end of sib2, iclass 24, count 0 2006.229.09:46:12.68#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:46:12.68#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:46:12.68#ibcon#[27=BW32\r\n] 2006.229.09:46:12.68#ibcon#*before write, iclass 24, count 0 2006.229.09:46:12.68#ibcon#enter sib2, iclass 24, count 0 2006.229.09:46:12.68#ibcon#flushed, iclass 24, count 0 2006.229.09:46:12.68#ibcon#about to write, iclass 24, count 0 2006.229.09:46:12.68#ibcon#wrote, iclass 24, count 0 2006.229.09:46:12.68#ibcon#about to read 3, iclass 24, count 0 2006.229.09:46:12.71#ibcon#read 3, iclass 24, count 0 2006.229.09:46:12.71#ibcon#about to read 4, iclass 24, count 0 2006.229.09:46:12.71#ibcon#read 4, iclass 24, count 0 2006.229.09:46:12.71#ibcon#about to read 5, iclass 24, count 0 2006.229.09:46:12.71#ibcon#read 5, iclass 24, count 0 2006.229.09:46:12.71#ibcon#about to read 6, iclass 24, count 0 2006.229.09:46:12.71#ibcon#read 6, iclass 24, count 0 2006.229.09:46:12.71#ibcon#end of sib2, iclass 24, count 0 2006.229.09:46:12.71#ibcon#*after write, iclass 24, count 0 2006.229.09:46:12.71#ibcon#*before return 0, iclass 24, count 0 2006.229.09:46:12.71#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:46:12.71#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:46:12.71#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:46:12.71#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:46:12.71$setupk4/ifdk4 2006.229.09:46:12.71$ifdk4/lo= 2006.229.09:46:12.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:46:12.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:46:12.71$ifdk4/patch= 2006.229.09:46:12.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:46:12.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:46:12.71$setupk4/!*+20s 2006.229.09:46:18.54#abcon#<5=/05 2.2 4.1 28.84 971001.0\r\n> 2006.229.09:46:18.56#abcon#{5=INTERFACE CLEAR} 2006.229.09:46:18.62#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:46:24.22$setupk4/"tpicd 2006.229.09:46:24.22$setupk4/echo=off 2006.229.09:46:24.22$setupk4/xlog=off 2006.229.09:46:24.22:!2006.229.09:48:19 2006.229.09:46:51.13#trakl#Source acquired 2006.229.09:46:51.13#flagr#flagr/antenna,acquired 2006.229.09:48:19.00:preob 2006.229.09:48:19.13/onsource/TRACKING 2006.229.09:48:19.13:!2006.229.09:48:29 2006.229.09:48:29.00:"tape 2006.229.09:48:29.00:"st=record 2006.229.09:48:29.00:data_valid=on 2006.229.09:48:29.00:midob 2006.229.09:48:30.13/onsource/TRACKING 2006.229.09:48:30.13/wx/28.82,1001.0,97 2006.229.09:48:30.18/cable/+6.4030E-03 2006.229.09:48:31.27/va/01,08,usb,yes,31,34 2006.229.09:48:31.27/va/02,07,usb,yes,34,34 2006.229.09:48:31.27/va/03,06,usb,yes,42,44 2006.229.09:48:31.27/va/04,07,usb,yes,35,37 2006.229.09:48:31.27/va/05,04,usb,yes,31,32 2006.229.09:48:31.27/va/06,04,usb,yes,35,35 2006.229.09:48:31.27/va/07,05,usb,yes,31,32 2006.229.09:48:31.27/va/08,06,usb,yes,22,28 2006.229.09:48:31.50/valo/01,524.99,yes,locked 2006.229.09:48:31.50/valo/02,534.99,yes,locked 2006.229.09:48:31.50/valo/03,564.99,yes,locked 2006.229.09:48:31.50/valo/04,624.99,yes,locked 2006.229.09:48:31.50/valo/05,734.99,yes,locked 2006.229.09:48:31.50/valo/06,814.99,yes,locked 2006.229.09:48:31.50/valo/07,864.99,yes,locked 2006.229.09:48:31.50/valo/08,884.99,yes,locked 2006.229.09:48:32.59/vb/01,04,usb,yes,32,29 2006.229.09:48:32.59/vb/02,04,usb,yes,34,34 2006.229.09:48:32.59/vb/03,04,usb,yes,31,34 2006.229.09:48:32.59/vb/04,04,usb,yes,35,34 2006.229.09:48:32.59/vb/05,04,usb,yes,28,30 2006.229.09:48:32.59/vb/06,04,usb,yes,32,28 2006.229.09:48:32.59/vb/07,04,usb,yes,32,32 2006.229.09:48:32.59/vb/08,04,usb,yes,29,33 2006.229.09:48:32.82/vblo/01,629.99,yes,locked 2006.229.09:48:32.82/vblo/02,634.99,yes,locked 2006.229.09:48:32.82/vblo/03,649.99,yes,locked 2006.229.09:48:32.82/vblo/04,679.99,yes,locked 2006.229.09:48:32.82/vblo/05,709.99,yes,locked 2006.229.09:48:32.82/vblo/06,719.99,yes,locked 2006.229.09:48:32.82/vblo/07,734.99,yes,locked 2006.229.09:48:32.82/vblo/08,744.99,yes,locked 2006.229.09:48:32.97/vabw/8 2006.229.09:48:33.12/vbbw/8 2006.229.09:48:33.21/xfe/off,on,12.2 2006.229.09:48:33.58/ifatt/23,28,28,28 2006.229.09:48:34.08/fmout-gps/S +4.59E-07 2006.229.09:48:34.12:!2006.229.09:51:59 2006.229.09:51:59.01:data_valid=off 2006.229.09:51:59.01:"et 2006.229.09:51:59.01:!+3s 2006.229.09:52:02.02:"tape 2006.229.09:52:02.02:postob 2006.229.09:52:02.18/cable/+6.4040E-03 2006.229.09:52:02.18/wx/28.80,1001.0,97 2006.229.09:52:02.24/fmout-gps/S +4.60E-07 2006.229.09:52:02.24:scan_name=229-0954,jd0608,40 2006.229.09:52:02.24:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.09:52:03.14#flagr#flagr/antenna,new-source 2006.229.09:52:03.14:checkk5 2006.229.09:52:03.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:52:03.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:52:04.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:52:04.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:52:05.10/chk_obsdata//k5ts1/T2290948??a.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.09:52:05.52/chk_obsdata//k5ts2/T2290948??b.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.09:52:05.92/chk_obsdata//k5ts3/T2290948??c.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.09:52:06.30/chk_obsdata//k5ts4/T2290948??d.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.09:52:07.04/k5log//k5ts1_log_newline 2006.229.09:52:07.75/k5log//k5ts2_log_newline 2006.229.09:52:08.48/k5log//k5ts3_log_newline 2006.229.09:52:09.21/k5log//k5ts4_log_newline 2006.229.09:52:09.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:52:09.24:setupk4=1 2006.229.09:52:09.24$setupk4/echo=on 2006.229.09:52:09.24$setupk4/pcalon 2006.229.09:52:09.24$pcalon/"no phase cal control is implemented here 2006.229.09:52:09.24$setupk4/"tpicd=stop 2006.229.09:52:09.24$setupk4/"rec=synch_on 2006.229.09:52:09.24$setupk4/"rec_mode=128 2006.229.09:52:09.24$setupk4/!* 2006.229.09:52:09.24$setupk4/recpk4 2006.229.09:52:09.24$recpk4/recpatch= 2006.229.09:52:09.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:52:09.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:52:09.24$setupk4/vck44 2006.229.09:52:09.24$vck44/valo=1,524.99 2006.229.09:52:09.24#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:52:09.24#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:52:09.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:09.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:09.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:09.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:09.24#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:52:09.24#ibcon#first serial, iclass 25, count 0 2006.229.09:52:09.24#ibcon#enter sib2, iclass 25, count 0 2006.229.09:52:09.24#ibcon#flushed, iclass 25, count 0 2006.229.09:52:09.24#ibcon#about to write, iclass 25, count 0 2006.229.09:52:09.24#ibcon#wrote, iclass 25, count 0 2006.229.09:52:09.24#ibcon#about to read 3, iclass 25, count 0 2006.229.09:52:09.26#ibcon#read 3, iclass 25, count 0 2006.229.09:52:09.26#ibcon#about to read 4, iclass 25, count 0 2006.229.09:52:09.26#ibcon#read 4, iclass 25, count 0 2006.229.09:52:09.26#ibcon#about to read 5, iclass 25, count 0 2006.229.09:52:09.26#ibcon#read 5, iclass 25, count 0 2006.229.09:52:09.26#ibcon#about to read 6, iclass 25, count 0 2006.229.09:52:09.26#ibcon#read 6, iclass 25, count 0 2006.229.09:52:09.26#ibcon#end of sib2, iclass 25, count 0 2006.229.09:52:09.26#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:52:09.26#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:52:09.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:52:09.26#ibcon#*before write, iclass 25, count 0 2006.229.09:52:09.26#ibcon#enter sib2, iclass 25, count 0 2006.229.09:52:09.26#ibcon#flushed, iclass 25, count 0 2006.229.09:52:09.26#ibcon#about to write, iclass 25, count 0 2006.229.09:52:09.26#ibcon#wrote, iclass 25, count 0 2006.229.09:52:09.26#ibcon#about to read 3, iclass 25, count 0 2006.229.09:52:09.31#ibcon#read 3, iclass 25, count 0 2006.229.09:52:09.31#ibcon#about to read 4, iclass 25, count 0 2006.229.09:52:09.31#ibcon#read 4, iclass 25, count 0 2006.229.09:52:09.31#ibcon#about to read 5, iclass 25, count 0 2006.229.09:52:09.31#ibcon#read 5, iclass 25, count 0 2006.229.09:52:09.31#ibcon#about to read 6, iclass 25, count 0 2006.229.09:52:09.31#ibcon#read 6, iclass 25, count 0 2006.229.09:52:09.31#ibcon#end of sib2, iclass 25, count 0 2006.229.09:52:09.31#ibcon#*after write, iclass 25, count 0 2006.229.09:52:09.31#ibcon#*before return 0, iclass 25, count 0 2006.229.09:52:09.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:09.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:09.31#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:52:09.31#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:52:09.31$vck44/va=1,8 2006.229.09:52:09.31#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.09:52:09.31#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.09:52:09.31#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:09.31#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:09.31#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:09.31#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:09.31#ibcon#enter wrdev, iclass 27, count 2 2006.229.09:52:09.31#ibcon#first serial, iclass 27, count 2 2006.229.09:52:09.31#ibcon#enter sib2, iclass 27, count 2 2006.229.09:52:09.31#ibcon#flushed, iclass 27, count 2 2006.229.09:52:09.31#ibcon#about to write, iclass 27, count 2 2006.229.09:52:09.31#ibcon#wrote, iclass 27, count 2 2006.229.09:52:09.31#ibcon#about to read 3, iclass 27, count 2 2006.229.09:52:09.33#ibcon#read 3, iclass 27, count 2 2006.229.09:52:09.33#ibcon#about to read 4, iclass 27, count 2 2006.229.09:52:09.33#ibcon#read 4, iclass 27, count 2 2006.229.09:52:09.33#ibcon#about to read 5, iclass 27, count 2 2006.229.09:52:09.33#ibcon#read 5, iclass 27, count 2 2006.229.09:52:09.33#ibcon#about to read 6, iclass 27, count 2 2006.229.09:52:09.33#ibcon#read 6, iclass 27, count 2 2006.229.09:52:09.33#ibcon#end of sib2, iclass 27, count 2 2006.229.09:52:09.33#ibcon#*mode == 0, iclass 27, count 2 2006.229.09:52:09.33#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.09:52:09.33#ibcon#[25=AT01-08\r\n] 2006.229.09:52:09.33#ibcon#*before write, iclass 27, count 2 2006.229.09:52:09.33#ibcon#enter sib2, iclass 27, count 2 2006.229.09:52:09.33#ibcon#flushed, iclass 27, count 2 2006.229.09:52:09.33#ibcon#about to write, iclass 27, count 2 2006.229.09:52:09.33#ibcon#wrote, iclass 27, count 2 2006.229.09:52:09.33#ibcon#about to read 3, iclass 27, count 2 2006.229.09:52:09.36#ibcon#read 3, iclass 27, count 2 2006.229.09:52:09.36#ibcon#about to read 4, iclass 27, count 2 2006.229.09:52:09.36#ibcon#read 4, iclass 27, count 2 2006.229.09:52:09.36#ibcon#about to read 5, iclass 27, count 2 2006.229.09:52:09.36#ibcon#read 5, iclass 27, count 2 2006.229.09:52:09.36#ibcon#about to read 6, iclass 27, count 2 2006.229.09:52:09.36#ibcon#read 6, iclass 27, count 2 2006.229.09:52:09.36#ibcon#end of sib2, iclass 27, count 2 2006.229.09:52:09.36#ibcon#*after write, iclass 27, count 2 2006.229.09:52:09.36#ibcon#*before return 0, iclass 27, count 2 2006.229.09:52:09.36#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:09.36#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:09.36#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.09:52:09.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:09.36#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:09.48#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:09.48#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:09.48#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:52:09.48#ibcon#first serial, iclass 27, count 0 2006.229.09:52:09.48#ibcon#enter sib2, iclass 27, count 0 2006.229.09:52:09.48#ibcon#flushed, iclass 27, count 0 2006.229.09:52:09.48#ibcon#about to write, iclass 27, count 0 2006.229.09:52:09.48#ibcon#wrote, iclass 27, count 0 2006.229.09:52:09.48#ibcon#about to read 3, iclass 27, count 0 2006.229.09:52:09.50#ibcon#read 3, iclass 27, count 0 2006.229.09:52:09.50#ibcon#about to read 4, iclass 27, count 0 2006.229.09:52:09.50#ibcon#read 4, iclass 27, count 0 2006.229.09:52:09.50#ibcon#about to read 5, iclass 27, count 0 2006.229.09:52:09.50#ibcon#read 5, iclass 27, count 0 2006.229.09:52:09.50#ibcon#about to read 6, iclass 27, count 0 2006.229.09:52:09.50#ibcon#read 6, iclass 27, count 0 2006.229.09:52:09.50#ibcon#end of sib2, iclass 27, count 0 2006.229.09:52:09.50#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:52:09.50#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:52:09.50#ibcon#[25=USB\r\n] 2006.229.09:52:09.50#ibcon#*before write, iclass 27, count 0 2006.229.09:52:09.50#ibcon#enter sib2, iclass 27, count 0 2006.229.09:52:09.50#ibcon#flushed, iclass 27, count 0 2006.229.09:52:09.50#ibcon#about to write, iclass 27, count 0 2006.229.09:52:09.50#ibcon#wrote, iclass 27, count 0 2006.229.09:52:09.50#ibcon#about to read 3, iclass 27, count 0 2006.229.09:52:09.53#ibcon#read 3, iclass 27, count 0 2006.229.09:52:09.53#ibcon#about to read 4, iclass 27, count 0 2006.229.09:52:09.53#ibcon#read 4, iclass 27, count 0 2006.229.09:52:09.53#ibcon#about to read 5, iclass 27, count 0 2006.229.09:52:09.53#ibcon#read 5, iclass 27, count 0 2006.229.09:52:09.53#ibcon#about to read 6, iclass 27, count 0 2006.229.09:52:09.53#ibcon#read 6, iclass 27, count 0 2006.229.09:52:09.53#ibcon#end of sib2, iclass 27, count 0 2006.229.09:52:09.53#ibcon#*after write, iclass 27, count 0 2006.229.09:52:09.53#ibcon#*before return 0, iclass 27, count 0 2006.229.09:52:09.53#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:09.53#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:09.53#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:52:09.53#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:52:09.53$vck44/valo=2,534.99 2006.229.09:52:09.53#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.09:52:09.53#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.09:52:09.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:09.53#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:09.53#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:09.53#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:09.53#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:52:09.53#ibcon#first serial, iclass 29, count 0 2006.229.09:52:09.53#ibcon#enter sib2, iclass 29, count 0 2006.229.09:52:09.53#ibcon#flushed, iclass 29, count 0 2006.229.09:52:09.53#ibcon#about to write, iclass 29, count 0 2006.229.09:52:09.53#ibcon#wrote, iclass 29, count 0 2006.229.09:52:09.53#ibcon#about to read 3, iclass 29, count 0 2006.229.09:52:09.55#ibcon#read 3, iclass 29, count 0 2006.229.09:52:09.55#ibcon#about to read 4, iclass 29, count 0 2006.229.09:52:09.55#ibcon#read 4, iclass 29, count 0 2006.229.09:52:09.55#ibcon#about to read 5, iclass 29, count 0 2006.229.09:52:09.55#ibcon#read 5, iclass 29, count 0 2006.229.09:52:09.55#ibcon#about to read 6, iclass 29, count 0 2006.229.09:52:09.55#ibcon#read 6, iclass 29, count 0 2006.229.09:52:09.55#ibcon#end of sib2, iclass 29, count 0 2006.229.09:52:09.55#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:52:09.55#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:52:09.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:52:09.55#ibcon#*before write, iclass 29, count 0 2006.229.09:52:09.55#ibcon#enter sib2, iclass 29, count 0 2006.229.09:52:09.55#ibcon#flushed, iclass 29, count 0 2006.229.09:52:09.55#ibcon#about to write, iclass 29, count 0 2006.229.09:52:09.55#ibcon#wrote, iclass 29, count 0 2006.229.09:52:09.55#ibcon#about to read 3, iclass 29, count 0 2006.229.09:52:09.59#ibcon#read 3, iclass 29, count 0 2006.229.09:52:09.59#ibcon#about to read 4, iclass 29, count 0 2006.229.09:52:09.59#ibcon#read 4, iclass 29, count 0 2006.229.09:52:09.59#ibcon#about to read 5, iclass 29, count 0 2006.229.09:52:09.59#ibcon#read 5, iclass 29, count 0 2006.229.09:52:09.59#ibcon#about to read 6, iclass 29, count 0 2006.229.09:52:09.59#ibcon#read 6, iclass 29, count 0 2006.229.09:52:09.59#ibcon#end of sib2, iclass 29, count 0 2006.229.09:52:09.59#ibcon#*after write, iclass 29, count 0 2006.229.09:52:09.59#ibcon#*before return 0, iclass 29, count 0 2006.229.09:52:09.59#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:09.59#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:09.59#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:52:09.59#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:52:09.59$vck44/va=2,7 2006.229.09:52:09.59#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.09:52:09.59#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.09:52:09.59#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:09.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:09.65#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:09.65#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:09.65#ibcon#enter wrdev, iclass 31, count 2 2006.229.09:52:09.65#ibcon#first serial, iclass 31, count 2 2006.229.09:52:09.65#ibcon#enter sib2, iclass 31, count 2 2006.229.09:52:09.65#ibcon#flushed, iclass 31, count 2 2006.229.09:52:09.65#ibcon#about to write, iclass 31, count 2 2006.229.09:52:09.65#ibcon#wrote, iclass 31, count 2 2006.229.09:52:09.65#ibcon#about to read 3, iclass 31, count 2 2006.229.09:52:09.67#ibcon#read 3, iclass 31, count 2 2006.229.09:52:09.67#ibcon#about to read 4, iclass 31, count 2 2006.229.09:52:09.67#ibcon#read 4, iclass 31, count 2 2006.229.09:52:09.67#ibcon#about to read 5, iclass 31, count 2 2006.229.09:52:09.67#ibcon#read 5, iclass 31, count 2 2006.229.09:52:09.67#ibcon#about to read 6, iclass 31, count 2 2006.229.09:52:09.67#ibcon#read 6, iclass 31, count 2 2006.229.09:52:09.67#ibcon#end of sib2, iclass 31, count 2 2006.229.09:52:09.67#ibcon#*mode == 0, iclass 31, count 2 2006.229.09:52:09.67#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.09:52:09.67#ibcon#[25=AT02-07\r\n] 2006.229.09:52:09.67#ibcon#*before write, iclass 31, count 2 2006.229.09:52:09.67#ibcon#enter sib2, iclass 31, count 2 2006.229.09:52:09.67#ibcon#flushed, iclass 31, count 2 2006.229.09:52:09.67#ibcon#about to write, iclass 31, count 2 2006.229.09:52:09.67#ibcon#wrote, iclass 31, count 2 2006.229.09:52:09.67#ibcon#about to read 3, iclass 31, count 2 2006.229.09:52:09.70#ibcon#read 3, iclass 31, count 2 2006.229.09:52:09.70#ibcon#about to read 4, iclass 31, count 2 2006.229.09:52:09.70#ibcon#read 4, iclass 31, count 2 2006.229.09:52:09.70#ibcon#about to read 5, iclass 31, count 2 2006.229.09:52:09.70#ibcon#read 5, iclass 31, count 2 2006.229.09:52:09.70#ibcon#about to read 6, iclass 31, count 2 2006.229.09:52:09.70#ibcon#read 6, iclass 31, count 2 2006.229.09:52:09.70#ibcon#end of sib2, iclass 31, count 2 2006.229.09:52:09.70#ibcon#*after write, iclass 31, count 2 2006.229.09:52:09.70#ibcon#*before return 0, iclass 31, count 2 2006.229.09:52:09.70#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:09.70#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:09.70#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.09:52:09.70#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:09.70#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:09.82#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:09.82#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:09.82#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:52:09.82#ibcon#first serial, iclass 31, count 0 2006.229.09:52:09.82#ibcon#enter sib2, iclass 31, count 0 2006.229.09:52:09.82#ibcon#flushed, iclass 31, count 0 2006.229.09:52:09.82#ibcon#about to write, iclass 31, count 0 2006.229.09:52:09.82#ibcon#wrote, iclass 31, count 0 2006.229.09:52:09.82#ibcon#about to read 3, iclass 31, count 0 2006.229.09:52:09.84#ibcon#read 3, iclass 31, count 0 2006.229.09:52:09.84#ibcon#about to read 4, iclass 31, count 0 2006.229.09:52:09.84#ibcon#read 4, iclass 31, count 0 2006.229.09:52:09.84#ibcon#about to read 5, iclass 31, count 0 2006.229.09:52:09.84#ibcon#read 5, iclass 31, count 0 2006.229.09:52:09.84#ibcon#about to read 6, iclass 31, count 0 2006.229.09:52:09.84#ibcon#read 6, iclass 31, count 0 2006.229.09:52:09.84#ibcon#end of sib2, iclass 31, count 0 2006.229.09:52:09.84#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:52:09.84#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:52:09.84#ibcon#[25=USB\r\n] 2006.229.09:52:09.84#ibcon#*before write, iclass 31, count 0 2006.229.09:52:09.84#ibcon#enter sib2, iclass 31, count 0 2006.229.09:52:09.84#ibcon#flushed, iclass 31, count 0 2006.229.09:52:09.84#ibcon#about to write, iclass 31, count 0 2006.229.09:52:09.84#ibcon#wrote, iclass 31, count 0 2006.229.09:52:09.84#ibcon#about to read 3, iclass 31, count 0 2006.229.09:52:09.87#ibcon#read 3, iclass 31, count 0 2006.229.09:52:09.87#ibcon#about to read 4, iclass 31, count 0 2006.229.09:52:09.87#ibcon#read 4, iclass 31, count 0 2006.229.09:52:09.87#ibcon#about to read 5, iclass 31, count 0 2006.229.09:52:09.87#ibcon#read 5, iclass 31, count 0 2006.229.09:52:09.87#ibcon#about to read 6, iclass 31, count 0 2006.229.09:52:09.87#ibcon#read 6, iclass 31, count 0 2006.229.09:52:09.87#ibcon#end of sib2, iclass 31, count 0 2006.229.09:52:09.87#ibcon#*after write, iclass 31, count 0 2006.229.09:52:09.87#ibcon#*before return 0, iclass 31, count 0 2006.229.09:52:09.87#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:09.87#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:09.87#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:52:09.87#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:52:09.87$vck44/valo=3,564.99 2006.229.09:52:09.87#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.09:52:09.87#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.09:52:09.87#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:09.87#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:09.87#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:09.87#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:09.87#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:52:09.87#ibcon#first serial, iclass 33, count 0 2006.229.09:52:09.87#ibcon#enter sib2, iclass 33, count 0 2006.229.09:52:09.87#ibcon#flushed, iclass 33, count 0 2006.229.09:52:09.87#ibcon#about to write, iclass 33, count 0 2006.229.09:52:09.87#ibcon#wrote, iclass 33, count 0 2006.229.09:52:09.87#ibcon#about to read 3, iclass 33, count 0 2006.229.09:52:09.89#ibcon#read 3, iclass 33, count 0 2006.229.09:52:09.89#ibcon#about to read 4, iclass 33, count 0 2006.229.09:52:09.89#ibcon#read 4, iclass 33, count 0 2006.229.09:52:09.89#ibcon#about to read 5, iclass 33, count 0 2006.229.09:52:09.89#ibcon#read 5, iclass 33, count 0 2006.229.09:52:09.89#ibcon#about to read 6, iclass 33, count 0 2006.229.09:52:09.89#ibcon#read 6, iclass 33, count 0 2006.229.09:52:09.89#ibcon#end of sib2, iclass 33, count 0 2006.229.09:52:09.89#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:52:09.89#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:52:09.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:52:09.89#ibcon#*before write, iclass 33, count 0 2006.229.09:52:09.89#ibcon#enter sib2, iclass 33, count 0 2006.229.09:52:09.89#ibcon#flushed, iclass 33, count 0 2006.229.09:52:09.89#ibcon#about to write, iclass 33, count 0 2006.229.09:52:09.89#ibcon#wrote, iclass 33, count 0 2006.229.09:52:09.89#ibcon#about to read 3, iclass 33, count 0 2006.229.09:52:09.93#ibcon#read 3, iclass 33, count 0 2006.229.09:52:09.93#ibcon#about to read 4, iclass 33, count 0 2006.229.09:52:09.93#ibcon#read 4, iclass 33, count 0 2006.229.09:52:09.93#ibcon#about to read 5, iclass 33, count 0 2006.229.09:52:09.93#ibcon#read 5, iclass 33, count 0 2006.229.09:52:09.93#ibcon#about to read 6, iclass 33, count 0 2006.229.09:52:09.93#ibcon#read 6, iclass 33, count 0 2006.229.09:52:09.93#ibcon#end of sib2, iclass 33, count 0 2006.229.09:52:09.93#ibcon#*after write, iclass 33, count 0 2006.229.09:52:09.93#ibcon#*before return 0, iclass 33, count 0 2006.229.09:52:09.93#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:09.93#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:09.93#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:52:09.93#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:52:09.93$vck44/va=3,6 2006.229.09:52:09.93#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.09:52:09.93#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.09:52:09.93#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:09.93#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:09.99#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:09.99#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:09.99#ibcon#enter wrdev, iclass 35, count 2 2006.229.09:52:09.99#ibcon#first serial, iclass 35, count 2 2006.229.09:52:09.99#ibcon#enter sib2, iclass 35, count 2 2006.229.09:52:09.99#ibcon#flushed, iclass 35, count 2 2006.229.09:52:09.99#ibcon#about to write, iclass 35, count 2 2006.229.09:52:09.99#ibcon#wrote, iclass 35, count 2 2006.229.09:52:09.99#ibcon#about to read 3, iclass 35, count 2 2006.229.09:52:10.01#ibcon#read 3, iclass 35, count 2 2006.229.09:52:10.01#ibcon#about to read 4, iclass 35, count 2 2006.229.09:52:10.01#ibcon#read 4, iclass 35, count 2 2006.229.09:52:10.01#ibcon#about to read 5, iclass 35, count 2 2006.229.09:52:10.01#ibcon#read 5, iclass 35, count 2 2006.229.09:52:10.01#ibcon#about to read 6, iclass 35, count 2 2006.229.09:52:10.01#ibcon#read 6, iclass 35, count 2 2006.229.09:52:10.01#ibcon#end of sib2, iclass 35, count 2 2006.229.09:52:10.01#ibcon#*mode == 0, iclass 35, count 2 2006.229.09:52:10.01#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.09:52:10.01#ibcon#[25=AT03-06\r\n] 2006.229.09:52:10.01#ibcon#*before write, iclass 35, count 2 2006.229.09:52:10.01#ibcon#enter sib2, iclass 35, count 2 2006.229.09:52:10.01#ibcon#flushed, iclass 35, count 2 2006.229.09:52:10.01#ibcon#about to write, iclass 35, count 2 2006.229.09:52:10.01#ibcon#wrote, iclass 35, count 2 2006.229.09:52:10.01#ibcon#about to read 3, iclass 35, count 2 2006.229.09:52:10.04#ibcon#read 3, iclass 35, count 2 2006.229.09:52:10.04#ibcon#about to read 4, iclass 35, count 2 2006.229.09:52:10.04#ibcon#read 4, iclass 35, count 2 2006.229.09:52:10.04#ibcon#about to read 5, iclass 35, count 2 2006.229.09:52:10.04#ibcon#read 5, iclass 35, count 2 2006.229.09:52:10.04#ibcon#about to read 6, iclass 35, count 2 2006.229.09:52:10.04#ibcon#read 6, iclass 35, count 2 2006.229.09:52:10.04#ibcon#end of sib2, iclass 35, count 2 2006.229.09:52:10.04#ibcon#*after write, iclass 35, count 2 2006.229.09:52:10.04#ibcon#*before return 0, iclass 35, count 2 2006.229.09:52:10.04#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:10.04#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:10.04#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.09:52:10.04#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:10.04#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:10.16#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:10.16#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:10.16#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:52:10.16#ibcon#first serial, iclass 35, count 0 2006.229.09:52:10.16#ibcon#enter sib2, iclass 35, count 0 2006.229.09:52:10.16#ibcon#flushed, iclass 35, count 0 2006.229.09:52:10.16#ibcon#about to write, iclass 35, count 0 2006.229.09:52:10.16#ibcon#wrote, iclass 35, count 0 2006.229.09:52:10.16#ibcon#about to read 3, iclass 35, count 0 2006.229.09:52:10.18#ibcon#read 3, iclass 35, count 0 2006.229.09:52:10.18#ibcon#about to read 4, iclass 35, count 0 2006.229.09:52:10.18#ibcon#read 4, iclass 35, count 0 2006.229.09:52:10.18#ibcon#about to read 5, iclass 35, count 0 2006.229.09:52:10.18#ibcon#read 5, iclass 35, count 0 2006.229.09:52:10.18#ibcon#about to read 6, iclass 35, count 0 2006.229.09:52:10.18#ibcon#read 6, iclass 35, count 0 2006.229.09:52:10.18#ibcon#end of sib2, iclass 35, count 0 2006.229.09:52:10.18#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:52:10.18#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:52:10.18#ibcon#[25=USB\r\n] 2006.229.09:52:10.18#ibcon#*before write, iclass 35, count 0 2006.229.09:52:10.18#ibcon#enter sib2, iclass 35, count 0 2006.229.09:52:10.18#ibcon#flushed, iclass 35, count 0 2006.229.09:52:10.18#ibcon#about to write, iclass 35, count 0 2006.229.09:52:10.18#ibcon#wrote, iclass 35, count 0 2006.229.09:52:10.18#ibcon#about to read 3, iclass 35, count 0 2006.229.09:52:10.21#ibcon#read 3, iclass 35, count 0 2006.229.09:52:10.21#ibcon#about to read 4, iclass 35, count 0 2006.229.09:52:10.21#ibcon#read 4, iclass 35, count 0 2006.229.09:52:10.21#ibcon#about to read 5, iclass 35, count 0 2006.229.09:52:10.21#ibcon#read 5, iclass 35, count 0 2006.229.09:52:10.21#ibcon#about to read 6, iclass 35, count 0 2006.229.09:52:10.21#ibcon#read 6, iclass 35, count 0 2006.229.09:52:10.21#ibcon#end of sib2, iclass 35, count 0 2006.229.09:52:10.21#ibcon#*after write, iclass 35, count 0 2006.229.09:52:10.21#ibcon#*before return 0, iclass 35, count 0 2006.229.09:52:10.21#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:10.21#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:10.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:52:10.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:52:10.21$vck44/valo=4,624.99 2006.229.09:52:10.21#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.09:52:10.21#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.09:52:10.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:10.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:10.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:10.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:10.21#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:52:10.21#ibcon#first serial, iclass 37, count 0 2006.229.09:52:10.21#ibcon#enter sib2, iclass 37, count 0 2006.229.09:52:10.21#ibcon#flushed, iclass 37, count 0 2006.229.09:52:10.21#ibcon#about to write, iclass 37, count 0 2006.229.09:52:10.21#ibcon#wrote, iclass 37, count 0 2006.229.09:52:10.21#ibcon#about to read 3, iclass 37, count 0 2006.229.09:52:10.23#ibcon#read 3, iclass 37, count 0 2006.229.09:52:10.23#ibcon#about to read 4, iclass 37, count 0 2006.229.09:52:10.23#ibcon#read 4, iclass 37, count 0 2006.229.09:52:10.23#ibcon#about to read 5, iclass 37, count 0 2006.229.09:52:10.23#ibcon#read 5, iclass 37, count 0 2006.229.09:52:10.23#ibcon#about to read 6, iclass 37, count 0 2006.229.09:52:10.23#ibcon#read 6, iclass 37, count 0 2006.229.09:52:10.23#ibcon#end of sib2, iclass 37, count 0 2006.229.09:52:10.23#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:52:10.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:52:10.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:52:10.23#ibcon#*before write, iclass 37, count 0 2006.229.09:52:10.23#ibcon#enter sib2, iclass 37, count 0 2006.229.09:52:10.23#ibcon#flushed, iclass 37, count 0 2006.229.09:52:10.23#ibcon#about to write, iclass 37, count 0 2006.229.09:52:10.23#ibcon#wrote, iclass 37, count 0 2006.229.09:52:10.23#ibcon#about to read 3, iclass 37, count 0 2006.229.09:52:10.27#ibcon#read 3, iclass 37, count 0 2006.229.09:52:10.27#ibcon#about to read 4, iclass 37, count 0 2006.229.09:52:10.27#ibcon#read 4, iclass 37, count 0 2006.229.09:52:10.27#ibcon#about to read 5, iclass 37, count 0 2006.229.09:52:10.27#ibcon#read 5, iclass 37, count 0 2006.229.09:52:10.27#ibcon#about to read 6, iclass 37, count 0 2006.229.09:52:10.27#ibcon#read 6, iclass 37, count 0 2006.229.09:52:10.27#ibcon#end of sib2, iclass 37, count 0 2006.229.09:52:10.27#ibcon#*after write, iclass 37, count 0 2006.229.09:52:10.27#ibcon#*before return 0, iclass 37, count 0 2006.229.09:52:10.27#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:10.27#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:10.27#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:52:10.27#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:52:10.27$vck44/va=4,7 2006.229.09:52:10.27#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.09:52:10.27#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.09:52:10.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:10.27#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:10.33#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:10.33#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:10.33#ibcon#enter wrdev, iclass 39, count 2 2006.229.09:52:10.33#ibcon#first serial, iclass 39, count 2 2006.229.09:52:10.33#ibcon#enter sib2, iclass 39, count 2 2006.229.09:52:10.33#ibcon#flushed, iclass 39, count 2 2006.229.09:52:10.33#ibcon#about to write, iclass 39, count 2 2006.229.09:52:10.33#ibcon#wrote, iclass 39, count 2 2006.229.09:52:10.33#ibcon#about to read 3, iclass 39, count 2 2006.229.09:52:10.35#ibcon#read 3, iclass 39, count 2 2006.229.09:52:10.35#ibcon#about to read 4, iclass 39, count 2 2006.229.09:52:10.35#ibcon#read 4, iclass 39, count 2 2006.229.09:52:10.35#ibcon#about to read 5, iclass 39, count 2 2006.229.09:52:10.35#ibcon#read 5, iclass 39, count 2 2006.229.09:52:10.35#ibcon#about to read 6, iclass 39, count 2 2006.229.09:52:10.35#ibcon#read 6, iclass 39, count 2 2006.229.09:52:10.35#ibcon#end of sib2, iclass 39, count 2 2006.229.09:52:10.35#ibcon#*mode == 0, iclass 39, count 2 2006.229.09:52:10.35#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.09:52:10.35#ibcon#[25=AT04-07\r\n] 2006.229.09:52:10.35#ibcon#*before write, iclass 39, count 2 2006.229.09:52:10.35#ibcon#enter sib2, iclass 39, count 2 2006.229.09:52:10.35#ibcon#flushed, iclass 39, count 2 2006.229.09:52:10.35#ibcon#about to write, iclass 39, count 2 2006.229.09:52:10.35#ibcon#wrote, iclass 39, count 2 2006.229.09:52:10.35#ibcon#about to read 3, iclass 39, count 2 2006.229.09:52:10.38#ibcon#read 3, iclass 39, count 2 2006.229.09:52:10.38#ibcon#about to read 4, iclass 39, count 2 2006.229.09:52:10.38#ibcon#read 4, iclass 39, count 2 2006.229.09:52:10.38#ibcon#about to read 5, iclass 39, count 2 2006.229.09:52:10.38#ibcon#read 5, iclass 39, count 2 2006.229.09:52:10.38#ibcon#about to read 6, iclass 39, count 2 2006.229.09:52:10.38#ibcon#read 6, iclass 39, count 2 2006.229.09:52:10.38#ibcon#end of sib2, iclass 39, count 2 2006.229.09:52:10.38#ibcon#*after write, iclass 39, count 2 2006.229.09:52:10.41#ibcon#*before return 0, iclass 39, count 2 2006.229.09:52:10.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:10.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:10.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.09:52:10.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:10.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:10.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:10.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:10.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:52:10.53#ibcon#first serial, iclass 39, count 0 2006.229.09:52:10.53#ibcon#enter sib2, iclass 39, count 0 2006.229.09:52:10.53#ibcon#flushed, iclass 39, count 0 2006.229.09:52:10.53#ibcon#about to write, iclass 39, count 0 2006.229.09:52:10.53#ibcon#wrote, iclass 39, count 0 2006.229.09:52:10.53#ibcon#about to read 3, iclass 39, count 0 2006.229.09:52:10.55#ibcon#read 3, iclass 39, count 0 2006.229.09:52:10.55#ibcon#about to read 4, iclass 39, count 0 2006.229.09:52:10.55#ibcon#read 4, iclass 39, count 0 2006.229.09:52:10.55#ibcon#about to read 5, iclass 39, count 0 2006.229.09:52:10.55#ibcon#read 5, iclass 39, count 0 2006.229.09:52:10.55#ibcon#about to read 6, iclass 39, count 0 2006.229.09:52:10.55#ibcon#read 6, iclass 39, count 0 2006.229.09:52:10.55#ibcon#end of sib2, iclass 39, count 0 2006.229.09:52:10.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:52:10.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:52:10.55#ibcon#[25=USB\r\n] 2006.229.09:52:10.55#ibcon#*before write, iclass 39, count 0 2006.229.09:52:10.55#ibcon#enter sib2, iclass 39, count 0 2006.229.09:52:10.55#ibcon#flushed, iclass 39, count 0 2006.229.09:52:10.55#ibcon#about to write, iclass 39, count 0 2006.229.09:52:10.55#ibcon#wrote, iclass 39, count 0 2006.229.09:52:10.55#ibcon#about to read 3, iclass 39, count 0 2006.229.09:52:10.58#ibcon#read 3, iclass 39, count 0 2006.229.09:52:10.58#ibcon#about to read 4, iclass 39, count 0 2006.229.09:52:10.58#ibcon#read 4, iclass 39, count 0 2006.229.09:52:10.58#ibcon#about to read 5, iclass 39, count 0 2006.229.09:52:10.58#ibcon#read 5, iclass 39, count 0 2006.229.09:52:10.58#ibcon#about to read 6, iclass 39, count 0 2006.229.09:52:10.58#ibcon#read 6, iclass 39, count 0 2006.229.09:52:10.58#ibcon#end of sib2, iclass 39, count 0 2006.229.09:52:10.58#ibcon#*after write, iclass 39, count 0 2006.229.09:52:10.58#ibcon#*before return 0, iclass 39, count 0 2006.229.09:52:10.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:10.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:10.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:52:10.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:52:10.58$vck44/valo=5,734.99 2006.229.09:52:10.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:52:10.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:52:10.58#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:10.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:10.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:10.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:10.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:52:10.58#ibcon#first serial, iclass 3, count 0 2006.229.09:52:10.58#ibcon#enter sib2, iclass 3, count 0 2006.229.09:52:10.58#ibcon#flushed, iclass 3, count 0 2006.229.09:52:10.58#ibcon#about to write, iclass 3, count 0 2006.229.09:52:10.58#ibcon#wrote, iclass 3, count 0 2006.229.09:52:10.58#ibcon#about to read 3, iclass 3, count 0 2006.229.09:52:10.60#ibcon#read 3, iclass 3, count 0 2006.229.09:52:10.60#ibcon#about to read 4, iclass 3, count 0 2006.229.09:52:10.60#ibcon#read 4, iclass 3, count 0 2006.229.09:52:10.60#ibcon#about to read 5, iclass 3, count 0 2006.229.09:52:10.60#ibcon#read 5, iclass 3, count 0 2006.229.09:52:10.60#ibcon#about to read 6, iclass 3, count 0 2006.229.09:52:10.60#ibcon#read 6, iclass 3, count 0 2006.229.09:52:10.60#ibcon#end of sib2, iclass 3, count 0 2006.229.09:52:10.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:52:10.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:52:10.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:52:10.60#ibcon#*before write, iclass 3, count 0 2006.229.09:52:10.60#ibcon#enter sib2, iclass 3, count 0 2006.229.09:52:10.60#ibcon#flushed, iclass 3, count 0 2006.229.09:52:10.60#ibcon#about to write, iclass 3, count 0 2006.229.09:52:10.60#ibcon#wrote, iclass 3, count 0 2006.229.09:52:10.60#ibcon#about to read 3, iclass 3, count 0 2006.229.09:52:10.64#ibcon#read 3, iclass 3, count 0 2006.229.09:52:10.64#ibcon#about to read 4, iclass 3, count 0 2006.229.09:52:10.64#ibcon#read 4, iclass 3, count 0 2006.229.09:52:10.64#ibcon#about to read 5, iclass 3, count 0 2006.229.09:52:10.64#ibcon#read 5, iclass 3, count 0 2006.229.09:52:10.64#ibcon#about to read 6, iclass 3, count 0 2006.229.09:52:10.64#ibcon#read 6, iclass 3, count 0 2006.229.09:52:10.64#ibcon#end of sib2, iclass 3, count 0 2006.229.09:52:10.64#ibcon#*after write, iclass 3, count 0 2006.229.09:52:10.64#ibcon#*before return 0, iclass 3, count 0 2006.229.09:52:10.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:10.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:10.64#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:52:10.64#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:52:10.64$vck44/va=5,4 2006.229.09:52:10.64#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.09:52:10.64#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.09:52:10.64#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:10.64#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:10.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:10.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:10.70#ibcon#enter wrdev, iclass 5, count 2 2006.229.09:52:10.70#ibcon#first serial, iclass 5, count 2 2006.229.09:52:10.70#ibcon#enter sib2, iclass 5, count 2 2006.229.09:52:10.70#ibcon#flushed, iclass 5, count 2 2006.229.09:52:10.70#ibcon#about to write, iclass 5, count 2 2006.229.09:52:10.70#ibcon#wrote, iclass 5, count 2 2006.229.09:52:10.70#ibcon#about to read 3, iclass 5, count 2 2006.229.09:52:10.72#ibcon#read 3, iclass 5, count 2 2006.229.09:52:10.72#ibcon#about to read 4, iclass 5, count 2 2006.229.09:52:10.72#ibcon#read 4, iclass 5, count 2 2006.229.09:52:10.72#ibcon#about to read 5, iclass 5, count 2 2006.229.09:52:10.72#ibcon#read 5, iclass 5, count 2 2006.229.09:52:10.72#ibcon#about to read 6, iclass 5, count 2 2006.229.09:52:10.72#ibcon#read 6, iclass 5, count 2 2006.229.09:52:10.72#ibcon#end of sib2, iclass 5, count 2 2006.229.09:52:10.72#ibcon#*mode == 0, iclass 5, count 2 2006.229.09:52:10.72#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.09:52:10.72#ibcon#[25=AT05-04\r\n] 2006.229.09:52:10.72#ibcon#*before write, iclass 5, count 2 2006.229.09:52:10.72#ibcon#enter sib2, iclass 5, count 2 2006.229.09:52:10.72#ibcon#flushed, iclass 5, count 2 2006.229.09:52:10.72#ibcon#about to write, iclass 5, count 2 2006.229.09:52:10.72#ibcon#wrote, iclass 5, count 2 2006.229.09:52:10.72#ibcon#about to read 3, iclass 5, count 2 2006.229.09:52:10.75#ibcon#read 3, iclass 5, count 2 2006.229.09:52:10.75#ibcon#about to read 4, iclass 5, count 2 2006.229.09:52:10.75#ibcon#read 4, iclass 5, count 2 2006.229.09:52:10.75#ibcon#about to read 5, iclass 5, count 2 2006.229.09:52:10.75#ibcon#read 5, iclass 5, count 2 2006.229.09:52:10.75#ibcon#about to read 6, iclass 5, count 2 2006.229.09:52:10.75#ibcon#read 6, iclass 5, count 2 2006.229.09:52:10.75#ibcon#end of sib2, iclass 5, count 2 2006.229.09:52:10.75#ibcon#*after write, iclass 5, count 2 2006.229.09:52:10.75#ibcon#*before return 0, iclass 5, count 2 2006.229.09:52:10.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:10.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:10.75#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.09:52:10.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:10.75#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:10.87#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:10.87#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:10.87#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:52:10.87#ibcon#first serial, iclass 5, count 0 2006.229.09:52:10.87#ibcon#enter sib2, iclass 5, count 0 2006.229.09:52:10.87#ibcon#flushed, iclass 5, count 0 2006.229.09:52:10.87#ibcon#about to write, iclass 5, count 0 2006.229.09:52:10.87#ibcon#wrote, iclass 5, count 0 2006.229.09:52:10.87#ibcon#about to read 3, iclass 5, count 0 2006.229.09:52:10.89#ibcon#read 3, iclass 5, count 0 2006.229.09:52:10.89#ibcon#about to read 4, iclass 5, count 0 2006.229.09:52:10.89#ibcon#read 4, iclass 5, count 0 2006.229.09:52:10.89#ibcon#about to read 5, iclass 5, count 0 2006.229.09:52:10.89#ibcon#read 5, iclass 5, count 0 2006.229.09:52:10.89#ibcon#about to read 6, iclass 5, count 0 2006.229.09:52:10.89#ibcon#read 6, iclass 5, count 0 2006.229.09:52:10.89#ibcon#end of sib2, iclass 5, count 0 2006.229.09:52:10.89#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:52:10.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:52:10.89#ibcon#[25=USB\r\n] 2006.229.09:52:10.89#ibcon#*before write, iclass 5, count 0 2006.229.09:52:10.89#ibcon#enter sib2, iclass 5, count 0 2006.229.09:52:10.89#ibcon#flushed, iclass 5, count 0 2006.229.09:52:10.89#ibcon#about to write, iclass 5, count 0 2006.229.09:52:10.89#ibcon#wrote, iclass 5, count 0 2006.229.09:52:10.89#ibcon#about to read 3, iclass 5, count 0 2006.229.09:52:10.92#ibcon#read 3, iclass 5, count 0 2006.229.09:52:10.92#ibcon#about to read 4, iclass 5, count 0 2006.229.09:52:10.92#ibcon#read 4, iclass 5, count 0 2006.229.09:52:10.92#ibcon#about to read 5, iclass 5, count 0 2006.229.09:52:10.92#ibcon#read 5, iclass 5, count 0 2006.229.09:52:10.92#ibcon#about to read 6, iclass 5, count 0 2006.229.09:52:10.92#ibcon#read 6, iclass 5, count 0 2006.229.09:52:10.92#ibcon#end of sib2, iclass 5, count 0 2006.229.09:52:10.92#ibcon#*after write, iclass 5, count 0 2006.229.09:52:10.92#ibcon#*before return 0, iclass 5, count 0 2006.229.09:52:10.92#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:10.92#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:10.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:52:10.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:52:10.92$vck44/valo=6,814.99 2006.229.09:52:10.92#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.09:52:10.92#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.09:52:10.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:10.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:10.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:10.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:10.92#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:52:10.92#ibcon#first serial, iclass 7, count 0 2006.229.09:52:10.92#ibcon#enter sib2, iclass 7, count 0 2006.229.09:52:10.92#ibcon#flushed, iclass 7, count 0 2006.229.09:52:10.92#ibcon#about to write, iclass 7, count 0 2006.229.09:52:10.92#ibcon#wrote, iclass 7, count 0 2006.229.09:52:10.92#ibcon#about to read 3, iclass 7, count 0 2006.229.09:52:10.94#ibcon#read 3, iclass 7, count 0 2006.229.09:52:10.94#ibcon#about to read 4, iclass 7, count 0 2006.229.09:52:10.94#ibcon#read 4, iclass 7, count 0 2006.229.09:52:10.94#ibcon#about to read 5, iclass 7, count 0 2006.229.09:52:10.94#ibcon#read 5, iclass 7, count 0 2006.229.09:52:10.94#ibcon#about to read 6, iclass 7, count 0 2006.229.09:52:10.94#ibcon#read 6, iclass 7, count 0 2006.229.09:52:10.94#ibcon#end of sib2, iclass 7, count 0 2006.229.09:52:10.94#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:52:10.94#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:52:10.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:52:10.94#ibcon#*before write, iclass 7, count 0 2006.229.09:52:10.94#ibcon#enter sib2, iclass 7, count 0 2006.229.09:52:10.94#ibcon#flushed, iclass 7, count 0 2006.229.09:52:10.94#ibcon#about to write, iclass 7, count 0 2006.229.09:52:10.94#ibcon#wrote, iclass 7, count 0 2006.229.09:52:10.94#ibcon#about to read 3, iclass 7, count 0 2006.229.09:52:10.98#ibcon#read 3, iclass 7, count 0 2006.229.09:52:10.98#ibcon#about to read 4, iclass 7, count 0 2006.229.09:52:10.98#ibcon#read 4, iclass 7, count 0 2006.229.09:52:10.98#ibcon#about to read 5, iclass 7, count 0 2006.229.09:52:10.98#ibcon#read 5, iclass 7, count 0 2006.229.09:52:10.98#ibcon#about to read 6, iclass 7, count 0 2006.229.09:52:10.98#ibcon#read 6, iclass 7, count 0 2006.229.09:52:10.98#ibcon#end of sib2, iclass 7, count 0 2006.229.09:52:10.98#ibcon#*after write, iclass 7, count 0 2006.229.09:52:10.98#ibcon#*before return 0, iclass 7, count 0 2006.229.09:52:10.98#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:10.98#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:10.98#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:52:10.98#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:52:10.98$vck44/va=6,4 2006.229.09:52:10.98#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.09:52:10.98#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.09:52:10.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:10.98#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:11.04#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:11.04#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:11.04#ibcon#enter wrdev, iclass 11, count 2 2006.229.09:52:11.04#ibcon#first serial, iclass 11, count 2 2006.229.09:52:11.04#ibcon#enter sib2, iclass 11, count 2 2006.229.09:52:11.04#ibcon#flushed, iclass 11, count 2 2006.229.09:52:11.04#ibcon#about to write, iclass 11, count 2 2006.229.09:52:11.04#ibcon#wrote, iclass 11, count 2 2006.229.09:52:11.04#ibcon#about to read 3, iclass 11, count 2 2006.229.09:52:11.06#ibcon#read 3, iclass 11, count 2 2006.229.09:52:11.06#ibcon#about to read 4, iclass 11, count 2 2006.229.09:52:11.06#ibcon#read 4, iclass 11, count 2 2006.229.09:52:11.06#ibcon#about to read 5, iclass 11, count 2 2006.229.09:52:11.06#ibcon#read 5, iclass 11, count 2 2006.229.09:52:11.06#ibcon#about to read 6, iclass 11, count 2 2006.229.09:52:11.06#ibcon#read 6, iclass 11, count 2 2006.229.09:52:11.06#ibcon#end of sib2, iclass 11, count 2 2006.229.09:52:11.06#ibcon#*mode == 0, iclass 11, count 2 2006.229.09:52:11.06#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.09:52:11.06#ibcon#[25=AT06-04\r\n] 2006.229.09:52:11.06#ibcon#*before write, iclass 11, count 2 2006.229.09:52:11.06#ibcon#enter sib2, iclass 11, count 2 2006.229.09:52:11.06#ibcon#flushed, iclass 11, count 2 2006.229.09:52:11.06#ibcon#about to write, iclass 11, count 2 2006.229.09:52:11.06#ibcon#wrote, iclass 11, count 2 2006.229.09:52:11.06#ibcon#about to read 3, iclass 11, count 2 2006.229.09:52:11.09#ibcon#read 3, iclass 11, count 2 2006.229.09:52:11.09#ibcon#about to read 4, iclass 11, count 2 2006.229.09:52:11.09#ibcon#read 4, iclass 11, count 2 2006.229.09:52:11.09#ibcon#about to read 5, iclass 11, count 2 2006.229.09:52:11.09#ibcon#read 5, iclass 11, count 2 2006.229.09:52:11.09#ibcon#about to read 6, iclass 11, count 2 2006.229.09:52:11.09#ibcon#read 6, iclass 11, count 2 2006.229.09:52:11.09#ibcon#end of sib2, iclass 11, count 2 2006.229.09:52:11.09#ibcon#*after write, iclass 11, count 2 2006.229.09:52:11.09#ibcon#*before return 0, iclass 11, count 2 2006.229.09:52:11.09#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:11.09#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:11.09#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.09:52:11.09#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:11.09#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:11.21#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:11.21#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:11.21#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:52:11.21#ibcon#first serial, iclass 11, count 0 2006.229.09:52:11.21#ibcon#enter sib2, iclass 11, count 0 2006.229.09:52:11.21#ibcon#flushed, iclass 11, count 0 2006.229.09:52:11.21#ibcon#about to write, iclass 11, count 0 2006.229.09:52:11.21#ibcon#wrote, iclass 11, count 0 2006.229.09:52:11.21#ibcon#about to read 3, iclass 11, count 0 2006.229.09:52:11.23#ibcon#read 3, iclass 11, count 0 2006.229.09:52:11.23#ibcon#about to read 4, iclass 11, count 0 2006.229.09:52:11.23#ibcon#read 4, iclass 11, count 0 2006.229.09:52:11.23#ibcon#about to read 5, iclass 11, count 0 2006.229.09:52:11.23#ibcon#read 5, iclass 11, count 0 2006.229.09:52:11.23#ibcon#about to read 6, iclass 11, count 0 2006.229.09:52:11.23#ibcon#read 6, iclass 11, count 0 2006.229.09:52:11.23#ibcon#end of sib2, iclass 11, count 0 2006.229.09:52:11.23#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:52:11.23#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:52:11.23#ibcon#[25=USB\r\n] 2006.229.09:52:11.23#ibcon#*before write, iclass 11, count 0 2006.229.09:52:11.23#ibcon#enter sib2, iclass 11, count 0 2006.229.09:52:11.23#ibcon#flushed, iclass 11, count 0 2006.229.09:52:11.23#ibcon#about to write, iclass 11, count 0 2006.229.09:52:11.23#ibcon#wrote, iclass 11, count 0 2006.229.09:52:11.23#ibcon#about to read 3, iclass 11, count 0 2006.229.09:52:11.26#ibcon#read 3, iclass 11, count 0 2006.229.09:52:11.26#ibcon#about to read 4, iclass 11, count 0 2006.229.09:52:11.26#ibcon#read 4, iclass 11, count 0 2006.229.09:52:11.26#ibcon#about to read 5, iclass 11, count 0 2006.229.09:52:11.26#ibcon#read 5, iclass 11, count 0 2006.229.09:52:11.26#ibcon#about to read 6, iclass 11, count 0 2006.229.09:52:11.26#ibcon#read 6, iclass 11, count 0 2006.229.09:52:11.26#ibcon#end of sib2, iclass 11, count 0 2006.229.09:52:11.26#ibcon#*after write, iclass 11, count 0 2006.229.09:52:11.26#ibcon#*before return 0, iclass 11, count 0 2006.229.09:52:11.26#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:11.26#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:11.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:52:11.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:52:11.26$vck44/valo=7,864.99 2006.229.09:52:11.26#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.09:52:11.26#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.09:52:11.26#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:11.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:11.26#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:11.26#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:11.26#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:52:11.26#ibcon#first serial, iclass 13, count 0 2006.229.09:52:11.26#ibcon#enter sib2, iclass 13, count 0 2006.229.09:52:11.26#ibcon#flushed, iclass 13, count 0 2006.229.09:52:11.26#ibcon#about to write, iclass 13, count 0 2006.229.09:52:11.26#ibcon#wrote, iclass 13, count 0 2006.229.09:52:11.26#ibcon#about to read 3, iclass 13, count 0 2006.229.09:52:11.28#ibcon#read 3, iclass 13, count 0 2006.229.09:52:11.28#ibcon#about to read 4, iclass 13, count 0 2006.229.09:52:11.28#ibcon#read 4, iclass 13, count 0 2006.229.09:52:11.28#ibcon#about to read 5, iclass 13, count 0 2006.229.09:52:11.28#ibcon#read 5, iclass 13, count 0 2006.229.09:52:11.28#ibcon#about to read 6, iclass 13, count 0 2006.229.09:52:11.28#ibcon#read 6, iclass 13, count 0 2006.229.09:52:11.28#ibcon#end of sib2, iclass 13, count 0 2006.229.09:52:11.28#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:52:11.28#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:52:11.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:52:11.28#ibcon#*before write, iclass 13, count 0 2006.229.09:52:11.28#ibcon#enter sib2, iclass 13, count 0 2006.229.09:52:11.28#ibcon#flushed, iclass 13, count 0 2006.229.09:52:11.28#ibcon#about to write, iclass 13, count 0 2006.229.09:52:11.28#ibcon#wrote, iclass 13, count 0 2006.229.09:52:11.28#ibcon#about to read 3, iclass 13, count 0 2006.229.09:52:11.32#ibcon#read 3, iclass 13, count 0 2006.229.09:52:11.32#ibcon#about to read 4, iclass 13, count 0 2006.229.09:52:11.32#ibcon#read 4, iclass 13, count 0 2006.229.09:52:11.32#ibcon#about to read 5, iclass 13, count 0 2006.229.09:52:11.32#ibcon#read 5, iclass 13, count 0 2006.229.09:52:11.32#ibcon#about to read 6, iclass 13, count 0 2006.229.09:52:11.32#ibcon#read 6, iclass 13, count 0 2006.229.09:52:11.32#ibcon#end of sib2, iclass 13, count 0 2006.229.09:52:11.32#ibcon#*after write, iclass 13, count 0 2006.229.09:52:11.32#ibcon#*before return 0, iclass 13, count 0 2006.229.09:52:11.32#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:11.32#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:11.32#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:52:11.32#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:52:11.32$vck44/va=7,5 2006.229.09:52:11.32#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.09:52:11.32#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.09:52:11.32#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:11.32#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:11.38#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:11.38#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:11.38#ibcon#enter wrdev, iclass 15, count 2 2006.229.09:52:11.38#ibcon#first serial, iclass 15, count 2 2006.229.09:52:11.38#ibcon#enter sib2, iclass 15, count 2 2006.229.09:52:11.38#ibcon#flushed, iclass 15, count 2 2006.229.09:52:11.38#ibcon#about to write, iclass 15, count 2 2006.229.09:52:11.38#ibcon#wrote, iclass 15, count 2 2006.229.09:52:11.38#ibcon#about to read 3, iclass 15, count 2 2006.229.09:52:11.40#ibcon#read 3, iclass 15, count 2 2006.229.09:52:11.40#ibcon#about to read 4, iclass 15, count 2 2006.229.09:52:11.40#ibcon#read 4, iclass 15, count 2 2006.229.09:52:11.40#ibcon#about to read 5, iclass 15, count 2 2006.229.09:52:11.40#ibcon#read 5, iclass 15, count 2 2006.229.09:52:11.40#ibcon#about to read 6, iclass 15, count 2 2006.229.09:52:11.40#ibcon#read 6, iclass 15, count 2 2006.229.09:52:11.40#ibcon#end of sib2, iclass 15, count 2 2006.229.09:52:11.40#ibcon#*mode == 0, iclass 15, count 2 2006.229.09:52:11.40#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.09:52:11.40#ibcon#[25=AT07-05\r\n] 2006.229.09:52:11.40#ibcon#*before write, iclass 15, count 2 2006.229.09:52:11.40#ibcon#enter sib2, iclass 15, count 2 2006.229.09:52:11.40#ibcon#flushed, iclass 15, count 2 2006.229.09:52:11.40#ibcon#about to write, iclass 15, count 2 2006.229.09:52:11.40#ibcon#wrote, iclass 15, count 2 2006.229.09:52:11.40#ibcon#about to read 3, iclass 15, count 2 2006.229.09:52:11.43#ibcon#read 3, iclass 15, count 2 2006.229.09:52:11.43#ibcon#about to read 4, iclass 15, count 2 2006.229.09:52:11.43#ibcon#read 4, iclass 15, count 2 2006.229.09:52:11.43#ibcon#about to read 5, iclass 15, count 2 2006.229.09:52:11.43#ibcon#read 5, iclass 15, count 2 2006.229.09:52:11.43#ibcon#about to read 6, iclass 15, count 2 2006.229.09:52:11.43#ibcon#read 6, iclass 15, count 2 2006.229.09:52:11.43#ibcon#end of sib2, iclass 15, count 2 2006.229.09:52:11.43#ibcon#*after write, iclass 15, count 2 2006.229.09:52:11.43#ibcon#*before return 0, iclass 15, count 2 2006.229.09:52:11.43#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:11.43#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:11.43#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.09:52:11.43#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:11.43#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:11.55#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:11.55#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:11.55#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:52:11.55#ibcon#first serial, iclass 15, count 0 2006.229.09:52:11.55#ibcon#enter sib2, iclass 15, count 0 2006.229.09:52:11.55#ibcon#flushed, iclass 15, count 0 2006.229.09:52:11.55#ibcon#about to write, iclass 15, count 0 2006.229.09:52:11.55#ibcon#wrote, iclass 15, count 0 2006.229.09:52:11.55#ibcon#about to read 3, iclass 15, count 0 2006.229.09:52:11.57#ibcon#read 3, iclass 15, count 0 2006.229.09:52:11.57#ibcon#about to read 4, iclass 15, count 0 2006.229.09:52:11.57#ibcon#read 4, iclass 15, count 0 2006.229.09:52:11.57#ibcon#about to read 5, iclass 15, count 0 2006.229.09:52:11.57#ibcon#read 5, iclass 15, count 0 2006.229.09:52:11.57#ibcon#about to read 6, iclass 15, count 0 2006.229.09:52:11.57#ibcon#read 6, iclass 15, count 0 2006.229.09:52:11.57#ibcon#end of sib2, iclass 15, count 0 2006.229.09:52:11.57#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:52:11.57#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:52:11.57#ibcon#[25=USB\r\n] 2006.229.09:52:11.57#ibcon#*before write, iclass 15, count 0 2006.229.09:52:11.57#ibcon#enter sib2, iclass 15, count 0 2006.229.09:52:11.57#ibcon#flushed, iclass 15, count 0 2006.229.09:52:11.57#ibcon#about to write, iclass 15, count 0 2006.229.09:52:11.57#ibcon#wrote, iclass 15, count 0 2006.229.09:52:11.57#ibcon#about to read 3, iclass 15, count 0 2006.229.09:52:11.60#ibcon#read 3, iclass 15, count 0 2006.229.09:52:11.60#ibcon#about to read 4, iclass 15, count 0 2006.229.09:52:11.60#ibcon#read 4, iclass 15, count 0 2006.229.09:52:11.60#ibcon#about to read 5, iclass 15, count 0 2006.229.09:52:11.60#ibcon#read 5, iclass 15, count 0 2006.229.09:52:11.60#ibcon#about to read 6, iclass 15, count 0 2006.229.09:52:11.60#ibcon#read 6, iclass 15, count 0 2006.229.09:52:11.60#ibcon#end of sib2, iclass 15, count 0 2006.229.09:52:11.60#ibcon#*after write, iclass 15, count 0 2006.229.09:52:11.60#ibcon#*before return 0, iclass 15, count 0 2006.229.09:52:11.60#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:11.60#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:11.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:52:11.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:52:11.60$vck44/valo=8,884.99 2006.229.09:52:11.60#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.09:52:11.60#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.09:52:11.60#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:11.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:11.60#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:11.60#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:11.60#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:52:11.60#ibcon#first serial, iclass 17, count 0 2006.229.09:52:11.60#ibcon#enter sib2, iclass 17, count 0 2006.229.09:52:11.60#ibcon#flushed, iclass 17, count 0 2006.229.09:52:11.60#ibcon#about to write, iclass 17, count 0 2006.229.09:52:11.60#ibcon#wrote, iclass 17, count 0 2006.229.09:52:11.60#ibcon#about to read 3, iclass 17, count 0 2006.229.09:52:11.62#ibcon#read 3, iclass 17, count 0 2006.229.09:52:11.62#ibcon#about to read 4, iclass 17, count 0 2006.229.09:52:11.62#ibcon#read 4, iclass 17, count 0 2006.229.09:52:11.62#ibcon#about to read 5, iclass 17, count 0 2006.229.09:52:11.62#ibcon#read 5, iclass 17, count 0 2006.229.09:52:11.62#ibcon#about to read 6, iclass 17, count 0 2006.229.09:52:11.62#ibcon#read 6, iclass 17, count 0 2006.229.09:52:11.62#ibcon#end of sib2, iclass 17, count 0 2006.229.09:52:11.62#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:52:11.62#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:52:11.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:52:11.62#ibcon#*before write, iclass 17, count 0 2006.229.09:52:11.62#ibcon#enter sib2, iclass 17, count 0 2006.229.09:52:11.62#ibcon#flushed, iclass 17, count 0 2006.229.09:52:11.62#ibcon#about to write, iclass 17, count 0 2006.229.09:52:11.62#ibcon#wrote, iclass 17, count 0 2006.229.09:52:11.62#ibcon#about to read 3, iclass 17, count 0 2006.229.09:52:11.66#ibcon#read 3, iclass 17, count 0 2006.229.09:52:11.66#ibcon#about to read 4, iclass 17, count 0 2006.229.09:52:11.66#ibcon#read 4, iclass 17, count 0 2006.229.09:52:11.66#ibcon#about to read 5, iclass 17, count 0 2006.229.09:52:11.66#ibcon#read 5, iclass 17, count 0 2006.229.09:52:11.66#ibcon#about to read 6, iclass 17, count 0 2006.229.09:52:11.66#ibcon#read 6, iclass 17, count 0 2006.229.09:52:11.66#ibcon#end of sib2, iclass 17, count 0 2006.229.09:52:11.66#ibcon#*after write, iclass 17, count 0 2006.229.09:52:11.66#ibcon#*before return 0, iclass 17, count 0 2006.229.09:52:11.66#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:11.66#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:11.66#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:52:11.66#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:52:11.66$vck44/va=8,6 2006.229.09:52:11.66#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.09:52:11.66#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.09:52:11.66#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:11.66#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:52:11.72#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:52:11.72#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:52:11.72#ibcon#enter wrdev, iclass 19, count 2 2006.229.09:52:11.72#ibcon#first serial, iclass 19, count 2 2006.229.09:52:11.72#ibcon#enter sib2, iclass 19, count 2 2006.229.09:52:11.72#ibcon#flushed, iclass 19, count 2 2006.229.09:52:11.72#ibcon#about to write, iclass 19, count 2 2006.229.09:52:11.72#ibcon#wrote, iclass 19, count 2 2006.229.09:52:11.72#ibcon#about to read 3, iclass 19, count 2 2006.229.09:52:11.74#ibcon#read 3, iclass 19, count 2 2006.229.09:52:11.74#ibcon#about to read 4, iclass 19, count 2 2006.229.09:52:11.74#ibcon#read 4, iclass 19, count 2 2006.229.09:52:11.74#ibcon#about to read 5, iclass 19, count 2 2006.229.09:52:11.74#ibcon#read 5, iclass 19, count 2 2006.229.09:52:11.74#ibcon#about to read 6, iclass 19, count 2 2006.229.09:52:11.74#ibcon#read 6, iclass 19, count 2 2006.229.09:52:11.74#ibcon#end of sib2, iclass 19, count 2 2006.229.09:52:11.74#ibcon#*mode == 0, iclass 19, count 2 2006.229.09:52:11.74#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.09:52:11.74#ibcon#[25=AT08-06\r\n] 2006.229.09:52:11.74#ibcon#*before write, iclass 19, count 2 2006.229.09:52:11.74#ibcon#enter sib2, iclass 19, count 2 2006.229.09:52:11.74#ibcon#flushed, iclass 19, count 2 2006.229.09:52:11.74#ibcon#about to write, iclass 19, count 2 2006.229.09:52:11.74#ibcon#wrote, iclass 19, count 2 2006.229.09:52:11.74#ibcon#about to read 3, iclass 19, count 2 2006.229.09:52:11.77#ibcon#read 3, iclass 19, count 2 2006.229.09:52:11.77#ibcon#about to read 4, iclass 19, count 2 2006.229.09:52:11.77#ibcon#read 4, iclass 19, count 2 2006.229.09:52:11.77#ibcon#about to read 5, iclass 19, count 2 2006.229.09:52:11.77#ibcon#read 5, iclass 19, count 2 2006.229.09:52:11.77#ibcon#about to read 6, iclass 19, count 2 2006.229.09:52:11.77#ibcon#read 6, iclass 19, count 2 2006.229.09:52:11.77#ibcon#end of sib2, iclass 19, count 2 2006.229.09:52:11.77#ibcon#*after write, iclass 19, count 2 2006.229.09:52:11.77#ibcon#*before return 0, iclass 19, count 2 2006.229.09:52:11.77#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:52:11.77#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.09:52:11.77#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.09:52:11.77#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:11.77#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:52:11.89#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:52:11.89#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:52:11.89#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:52:11.89#ibcon#first serial, iclass 19, count 0 2006.229.09:52:11.89#ibcon#enter sib2, iclass 19, count 0 2006.229.09:52:11.89#ibcon#flushed, iclass 19, count 0 2006.229.09:52:11.89#ibcon#about to write, iclass 19, count 0 2006.229.09:52:11.89#ibcon#wrote, iclass 19, count 0 2006.229.09:52:11.89#ibcon#about to read 3, iclass 19, count 0 2006.229.09:52:11.91#ibcon#read 3, iclass 19, count 0 2006.229.09:52:11.91#ibcon#about to read 4, iclass 19, count 0 2006.229.09:52:11.91#ibcon#read 4, iclass 19, count 0 2006.229.09:52:11.91#ibcon#about to read 5, iclass 19, count 0 2006.229.09:52:11.91#ibcon#read 5, iclass 19, count 0 2006.229.09:52:11.91#ibcon#about to read 6, iclass 19, count 0 2006.229.09:52:11.91#ibcon#read 6, iclass 19, count 0 2006.229.09:52:11.91#ibcon#end of sib2, iclass 19, count 0 2006.229.09:52:11.91#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:52:11.91#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:52:11.91#ibcon#[25=USB\r\n] 2006.229.09:52:11.91#ibcon#*before write, iclass 19, count 0 2006.229.09:52:11.91#ibcon#enter sib2, iclass 19, count 0 2006.229.09:52:11.91#ibcon#flushed, iclass 19, count 0 2006.229.09:52:11.91#ibcon#about to write, iclass 19, count 0 2006.229.09:52:11.91#ibcon#wrote, iclass 19, count 0 2006.229.09:52:11.91#ibcon#about to read 3, iclass 19, count 0 2006.229.09:52:11.94#ibcon#read 3, iclass 19, count 0 2006.229.09:52:11.94#ibcon#about to read 4, iclass 19, count 0 2006.229.09:52:11.94#ibcon#read 4, iclass 19, count 0 2006.229.09:52:11.94#ibcon#about to read 5, iclass 19, count 0 2006.229.09:52:11.94#ibcon#read 5, iclass 19, count 0 2006.229.09:52:11.94#ibcon#about to read 6, iclass 19, count 0 2006.229.09:52:11.94#ibcon#read 6, iclass 19, count 0 2006.229.09:52:11.94#ibcon#end of sib2, iclass 19, count 0 2006.229.09:52:11.94#ibcon#*after write, iclass 19, count 0 2006.229.09:52:11.94#ibcon#*before return 0, iclass 19, count 0 2006.229.09:52:11.94#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:52:11.94#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.09:52:11.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:52:11.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:52:11.94$vck44/vblo=1,629.99 2006.229.09:52:11.94#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.09:52:11.94#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.09:52:11.94#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:11.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:52:11.94#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:52:11.94#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:52:11.94#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:52:11.94#ibcon#first serial, iclass 21, count 0 2006.229.09:52:11.94#ibcon#enter sib2, iclass 21, count 0 2006.229.09:52:11.94#ibcon#flushed, iclass 21, count 0 2006.229.09:52:11.94#ibcon#about to write, iclass 21, count 0 2006.229.09:52:11.94#ibcon#wrote, iclass 21, count 0 2006.229.09:52:11.94#ibcon#about to read 3, iclass 21, count 0 2006.229.09:52:11.96#ibcon#read 3, iclass 21, count 0 2006.229.09:52:11.96#ibcon#about to read 4, iclass 21, count 0 2006.229.09:52:11.96#ibcon#read 4, iclass 21, count 0 2006.229.09:52:11.96#ibcon#about to read 5, iclass 21, count 0 2006.229.09:52:11.96#ibcon#read 5, iclass 21, count 0 2006.229.09:52:11.96#ibcon#about to read 6, iclass 21, count 0 2006.229.09:52:11.96#ibcon#read 6, iclass 21, count 0 2006.229.09:52:11.96#ibcon#end of sib2, iclass 21, count 0 2006.229.09:52:11.96#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:52:11.96#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:52:11.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:52:11.96#ibcon#*before write, iclass 21, count 0 2006.229.09:52:11.96#ibcon#enter sib2, iclass 21, count 0 2006.229.09:52:11.96#ibcon#flushed, iclass 21, count 0 2006.229.09:52:11.96#ibcon#about to write, iclass 21, count 0 2006.229.09:52:11.96#ibcon#wrote, iclass 21, count 0 2006.229.09:52:11.96#ibcon#about to read 3, iclass 21, count 0 2006.229.09:52:12.00#ibcon#read 3, iclass 21, count 0 2006.229.09:52:12.00#ibcon#about to read 4, iclass 21, count 0 2006.229.09:52:12.00#ibcon#read 4, iclass 21, count 0 2006.229.09:52:12.00#ibcon#about to read 5, iclass 21, count 0 2006.229.09:52:12.00#ibcon#read 5, iclass 21, count 0 2006.229.09:52:12.00#ibcon#about to read 6, iclass 21, count 0 2006.229.09:52:12.00#ibcon#read 6, iclass 21, count 0 2006.229.09:52:12.00#ibcon#end of sib2, iclass 21, count 0 2006.229.09:52:12.00#ibcon#*after write, iclass 21, count 0 2006.229.09:52:12.00#ibcon#*before return 0, iclass 21, count 0 2006.229.09:52:12.00#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:52:12.00#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:52:12.00#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:52:12.00#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:52:12.00$vck44/vb=1,4 2006.229.09:52:12.00#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.09:52:12.00#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.09:52:12.00#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:12.00#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:52:12.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:52:12.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:52:12.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.09:52:12.00#ibcon#first serial, iclass 23, count 2 2006.229.09:52:12.00#ibcon#enter sib2, iclass 23, count 2 2006.229.09:52:12.00#ibcon#flushed, iclass 23, count 2 2006.229.09:52:12.00#ibcon#about to write, iclass 23, count 2 2006.229.09:52:12.00#ibcon#wrote, iclass 23, count 2 2006.229.09:52:12.00#ibcon#about to read 3, iclass 23, count 2 2006.229.09:52:12.02#ibcon#read 3, iclass 23, count 2 2006.229.09:52:12.02#ibcon#about to read 4, iclass 23, count 2 2006.229.09:52:12.02#ibcon#read 4, iclass 23, count 2 2006.229.09:52:12.02#ibcon#about to read 5, iclass 23, count 2 2006.229.09:52:12.02#ibcon#read 5, iclass 23, count 2 2006.229.09:52:12.02#ibcon#about to read 6, iclass 23, count 2 2006.229.09:52:12.02#ibcon#read 6, iclass 23, count 2 2006.229.09:52:12.02#ibcon#end of sib2, iclass 23, count 2 2006.229.09:52:12.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.09:52:12.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.09:52:12.02#ibcon#[27=AT01-04\r\n] 2006.229.09:52:12.02#ibcon#*before write, iclass 23, count 2 2006.229.09:52:12.02#ibcon#enter sib2, iclass 23, count 2 2006.229.09:52:12.02#ibcon#flushed, iclass 23, count 2 2006.229.09:52:12.02#ibcon#about to write, iclass 23, count 2 2006.229.09:52:12.02#ibcon#wrote, iclass 23, count 2 2006.229.09:52:12.02#ibcon#about to read 3, iclass 23, count 2 2006.229.09:52:12.05#ibcon#read 3, iclass 23, count 2 2006.229.09:52:12.05#ibcon#about to read 4, iclass 23, count 2 2006.229.09:52:12.05#ibcon#read 4, iclass 23, count 2 2006.229.09:52:12.05#ibcon#about to read 5, iclass 23, count 2 2006.229.09:52:12.05#ibcon#read 5, iclass 23, count 2 2006.229.09:52:12.05#ibcon#about to read 6, iclass 23, count 2 2006.229.09:52:12.05#ibcon#read 6, iclass 23, count 2 2006.229.09:52:12.05#ibcon#end of sib2, iclass 23, count 2 2006.229.09:52:12.05#ibcon#*after write, iclass 23, count 2 2006.229.09:52:12.05#ibcon#*before return 0, iclass 23, count 2 2006.229.09:52:12.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:52:12.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.09:52:12.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.09:52:12.05#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:12.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:52:12.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:52:12.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:52:12.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:52:12.17#ibcon#first serial, iclass 23, count 0 2006.229.09:52:12.17#ibcon#enter sib2, iclass 23, count 0 2006.229.09:52:12.17#ibcon#flushed, iclass 23, count 0 2006.229.09:52:12.17#ibcon#about to write, iclass 23, count 0 2006.229.09:52:12.17#ibcon#wrote, iclass 23, count 0 2006.229.09:52:12.17#ibcon#about to read 3, iclass 23, count 0 2006.229.09:52:12.19#ibcon#read 3, iclass 23, count 0 2006.229.09:52:12.19#ibcon#about to read 4, iclass 23, count 0 2006.229.09:52:12.19#ibcon#read 4, iclass 23, count 0 2006.229.09:52:12.19#ibcon#about to read 5, iclass 23, count 0 2006.229.09:52:12.19#ibcon#read 5, iclass 23, count 0 2006.229.09:52:12.19#ibcon#about to read 6, iclass 23, count 0 2006.229.09:52:12.19#ibcon#read 6, iclass 23, count 0 2006.229.09:52:12.19#ibcon#end of sib2, iclass 23, count 0 2006.229.09:52:12.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:52:12.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:52:12.19#ibcon#[27=USB\r\n] 2006.229.09:52:12.19#ibcon#*before write, iclass 23, count 0 2006.229.09:52:12.19#ibcon#enter sib2, iclass 23, count 0 2006.229.09:52:12.19#ibcon#flushed, iclass 23, count 0 2006.229.09:52:12.19#ibcon#about to write, iclass 23, count 0 2006.229.09:52:12.19#ibcon#wrote, iclass 23, count 0 2006.229.09:52:12.19#ibcon#about to read 3, iclass 23, count 0 2006.229.09:52:12.22#ibcon#read 3, iclass 23, count 0 2006.229.09:52:12.22#ibcon#about to read 4, iclass 23, count 0 2006.229.09:52:12.22#ibcon#read 4, iclass 23, count 0 2006.229.09:52:12.22#ibcon#about to read 5, iclass 23, count 0 2006.229.09:52:12.22#ibcon#read 5, iclass 23, count 0 2006.229.09:52:12.22#ibcon#about to read 6, iclass 23, count 0 2006.229.09:52:12.22#ibcon#read 6, iclass 23, count 0 2006.229.09:52:12.22#ibcon#end of sib2, iclass 23, count 0 2006.229.09:52:12.22#ibcon#*after write, iclass 23, count 0 2006.229.09:52:12.22#ibcon#*before return 0, iclass 23, count 0 2006.229.09:52:12.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:52:12.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.09:52:12.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:52:12.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:52:12.22$vck44/vblo=2,634.99 2006.229.09:52:12.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.09:52:12.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.09:52:12.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:12.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:12.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:12.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:12.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:52:12.22#ibcon#first serial, iclass 25, count 0 2006.229.09:52:12.22#ibcon#enter sib2, iclass 25, count 0 2006.229.09:52:12.22#ibcon#flushed, iclass 25, count 0 2006.229.09:52:12.22#ibcon#about to write, iclass 25, count 0 2006.229.09:52:12.22#ibcon#wrote, iclass 25, count 0 2006.229.09:52:12.22#ibcon#about to read 3, iclass 25, count 0 2006.229.09:52:12.24#ibcon#read 3, iclass 25, count 0 2006.229.09:52:12.24#ibcon#about to read 4, iclass 25, count 0 2006.229.09:52:12.24#ibcon#read 4, iclass 25, count 0 2006.229.09:52:12.24#ibcon#about to read 5, iclass 25, count 0 2006.229.09:52:12.24#ibcon#read 5, iclass 25, count 0 2006.229.09:52:12.24#ibcon#about to read 6, iclass 25, count 0 2006.229.09:52:12.24#ibcon#read 6, iclass 25, count 0 2006.229.09:52:12.24#ibcon#end of sib2, iclass 25, count 0 2006.229.09:52:12.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:52:12.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:52:12.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:52:12.24#ibcon#*before write, iclass 25, count 0 2006.229.09:52:12.24#ibcon#enter sib2, iclass 25, count 0 2006.229.09:52:12.24#ibcon#flushed, iclass 25, count 0 2006.229.09:52:12.24#ibcon#about to write, iclass 25, count 0 2006.229.09:52:12.24#ibcon#wrote, iclass 25, count 0 2006.229.09:52:12.24#ibcon#about to read 3, iclass 25, count 0 2006.229.09:52:12.28#ibcon#read 3, iclass 25, count 0 2006.229.09:52:12.28#ibcon#about to read 4, iclass 25, count 0 2006.229.09:52:12.28#ibcon#read 4, iclass 25, count 0 2006.229.09:52:12.28#ibcon#about to read 5, iclass 25, count 0 2006.229.09:52:12.28#ibcon#read 5, iclass 25, count 0 2006.229.09:52:12.28#ibcon#about to read 6, iclass 25, count 0 2006.229.09:52:12.28#ibcon#read 6, iclass 25, count 0 2006.229.09:52:12.28#ibcon#end of sib2, iclass 25, count 0 2006.229.09:52:12.28#ibcon#*after write, iclass 25, count 0 2006.229.09:52:12.28#ibcon#*before return 0, iclass 25, count 0 2006.229.09:52:12.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:12.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.09:52:12.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:52:12.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:52:12.28$vck44/vb=2,4 2006.229.09:52:12.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.09:52:12.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.09:52:12.28#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:12.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:12.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:12.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:12.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.09:52:12.34#ibcon#first serial, iclass 27, count 2 2006.229.09:52:12.34#ibcon#enter sib2, iclass 27, count 2 2006.229.09:52:12.34#ibcon#flushed, iclass 27, count 2 2006.229.09:52:12.34#ibcon#about to write, iclass 27, count 2 2006.229.09:52:12.34#ibcon#wrote, iclass 27, count 2 2006.229.09:52:12.34#ibcon#about to read 3, iclass 27, count 2 2006.229.09:52:12.36#ibcon#read 3, iclass 27, count 2 2006.229.09:52:12.36#ibcon#about to read 4, iclass 27, count 2 2006.229.09:52:12.36#ibcon#read 4, iclass 27, count 2 2006.229.09:52:12.36#ibcon#about to read 5, iclass 27, count 2 2006.229.09:52:12.36#ibcon#read 5, iclass 27, count 2 2006.229.09:52:12.36#ibcon#about to read 6, iclass 27, count 2 2006.229.09:52:12.36#ibcon#read 6, iclass 27, count 2 2006.229.09:52:12.36#ibcon#end of sib2, iclass 27, count 2 2006.229.09:52:12.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.09:52:12.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.09:52:12.36#ibcon#[27=AT02-04\r\n] 2006.229.09:52:12.36#ibcon#*before write, iclass 27, count 2 2006.229.09:52:12.36#ibcon#enter sib2, iclass 27, count 2 2006.229.09:52:12.36#ibcon#flushed, iclass 27, count 2 2006.229.09:52:12.36#ibcon#about to write, iclass 27, count 2 2006.229.09:52:12.36#ibcon#wrote, iclass 27, count 2 2006.229.09:52:12.36#ibcon#about to read 3, iclass 27, count 2 2006.229.09:52:12.39#ibcon#read 3, iclass 27, count 2 2006.229.09:52:12.39#ibcon#about to read 4, iclass 27, count 2 2006.229.09:52:12.39#ibcon#read 4, iclass 27, count 2 2006.229.09:52:12.39#ibcon#about to read 5, iclass 27, count 2 2006.229.09:52:12.39#ibcon#read 5, iclass 27, count 2 2006.229.09:52:12.39#ibcon#about to read 6, iclass 27, count 2 2006.229.09:52:12.39#ibcon#read 6, iclass 27, count 2 2006.229.09:52:12.39#ibcon#end of sib2, iclass 27, count 2 2006.229.09:52:12.39#ibcon#*after write, iclass 27, count 2 2006.229.09:52:12.39#ibcon#*before return 0, iclass 27, count 2 2006.229.09:52:12.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:12.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.09:52:12.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.09:52:12.39#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:12.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:12.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:12.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:12.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:52:12.51#ibcon#first serial, iclass 27, count 0 2006.229.09:52:12.51#ibcon#enter sib2, iclass 27, count 0 2006.229.09:52:12.51#ibcon#flushed, iclass 27, count 0 2006.229.09:52:12.51#ibcon#about to write, iclass 27, count 0 2006.229.09:52:12.51#ibcon#wrote, iclass 27, count 0 2006.229.09:52:12.51#ibcon#about to read 3, iclass 27, count 0 2006.229.09:52:12.53#ibcon#read 3, iclass 27, count 0 2006.229.09:52:12.53#ibcon#about to read 4, iclass 27, count 0 2006.229.09:52:12.53#ibcon#read 4, iclass 27, count 0 2006.229.09:52:12.53#ibcon#about to read 5, iclass 27, count 0 2006.229.09:52:12.53#ibcon#read 5, iclass 27, count 0 2006.229.09:52:12.53#ibcon#about to read 6, iclass 27, count 0 2006.229.09:52:12.53#ibcon#read 6, iclass 27, count 0 2006.229.09:52:12.53#ibcon#end of sib2, iclass 27, count 0 2006.229.09:52:12.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:52:12.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:52:12.53#ibcon#[27=USB\r\n] 2006.229.09:52:12.53#ibcon#*before write, iclass 27, count 0 2006.229.09:52:12.53#ibcon#enter sib2, iclass 27, count 0 2006.229.09:52:12.53#ibcon#flushed, iclass 27, count 0 2006.229.09:52:12.53#ibcon#about to write, iclass 27, count 0 2006.229.09:52:12.53#ibcon#wrote, iclass 27, count 0 2006.229.09:52:12.53#ibcon#about to read 3, iclass 27, count 0 2006.229.09:52:12.56#ibcon#read 3, iclass 27, count 0 2006.229.09:52:12.56#ibcon#about to read 4, iclass 27, count 0 2006.229.09:52:12.56#ibcon#read 4, iclass 27, count 0 2006.229.09:52:12.56#ibcon#about to read 5, iclass 27, count 0 2006.229.09:52:12.56#ibcon#read 5, iclass 27, count 0 2006.229.09:52:12.56#ibcon#about to read 6, iclass 27, count 0 2006.229.09:52:12.56#ibcon#read 6, iclass 27, count 0 2006.229.09:52:12.56#ibcon#end of sib2, iclass 27, count 0 2006.229.09:52:12.56#ibcon#*after write, iclass 27, count 0 2006.229.09:52:12.56#ibcon#*before return 0, iclass 27, count 0 2006.229.09:52:12.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:12.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.09:52:12.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:52:12.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:52:12.56$vck44/vblo=3,649.99 2006.229.09:52:12.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.09:52:12.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.09:52:12.56#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:12.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:12.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:12.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:12.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:52:12.56#ibcon#first serial, iclass 29, count 0 2006.229.09:52:12.56#ibcon#enter sib2, iclass 29, count 0 2006.229.09:52:12.56#ibcon#flushed, iclass 29, count 0 2006.229.09:52:12.56#ibcon#about to write, iclass 29, count 0 2006.229.09:52:12.56#ibcon#wrote, iclass 29, count 0 2006.229.09:52:12.56#ibcon#about to read 3, iclass 29, count 0 2006.229.09:52:12.58#ibcon#read 3, iclass 29, count 0 2006.229.09:52:12.58#ibcon#about to read 4, iclass 29, count 0 2006.229.09:52:12.58#ibcon#read 4, iclass 29, count 0 2006.229.09:52:12.58#ibcon#about to read 5, iclass 29, count 0 2006.229.09:52:12.58#ibcon#read 5, iclass 29, count 0 2006.229.09:52:12.58#ibcon#about to read 6, iclass 29, count 0 2006.229.09:52:12.58#ibcon#read 6, iclass 29, count 0 2006.229.09:52:12.58#ibcon#end of sib2, iclass 29, count 0 2006.229.09:52:12.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:52:12.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:52:12.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:52:12.58#ibcon#*before write, iclass 29, count 0 2006.229.09:52:12.58#ibcon#enter sib2, iclass 29, count 0 2006.229.09:52:12.58#ibcon#flushed, iclass 29, count 0 2006.229.09:52:12.58#ibcon#about to write, iclass 29, count 0 2006.229.09:52:12.58#ibcon#wrote, iclass 29, count 0 2006.229.09:52:12.58#ibcon#about to read 3, iclass 29, count 0 2006.229.09:52:12.62#ibcon#read 3, iclass 29, count 0 2006.229.09:52:12.62#ibcon#about to read 4, iclass 29, count 0 2006.229.09:52:12.62#ibcon#read 4, iclass 29, count 0 2006.229.09:52:12.62#ibcon#about to read 5, iclass 29, count 0 2006.229.09:52:12.62#ibcon#read 5, iclass 29, count 0 2006.229.09:52:12.62#ibcon#about to read 6, iclass 29, count 0 2006.229.09:52:12.62#ibcon#read 6, iclass 29, count 0 2006.229.09:52:12.62#ibcon#end of sib2, iclass 29, count 0 2006.229.09:52:12.62#ibcon#*after write, iclass 29, count 0 2006.229.09:52:12.62#ibcon#*before return 0, iclass 29, count 0 2006.229.09:52:12.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:12.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.09:52:12.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:52:12.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:52:12.62$vck44/vb=3,4 2006.229.09:52:12.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.09:52:12.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.09:52:12.62#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:12.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:12.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:12.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:12.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.09:52:12.68#ibcon#first serial, iclass 31, count 2 2006.229.09:52:12.68#ibcon#enter sib2, iclass 31, count 2 2006.229.09:52:12.68#ibcon#flushed, iclass 31, count 2 2006.229.09:52:12.68#ibcon#about to write, iclass 31, count 2 2006.229.09:52:12.68#ibcon#wrote, iclass 31, count 2 2006.229.09:52:12.68#ibcon#about to read 3, iclass 31, count 2 2006.229.09:52:12.70#ibcon#read 3, iclass 31, count 2 2006.229.09:52:12.70#ibcon#about to read 4, iclass 31, count 2 2006.229.09:52:12.70#ibcon#read 4, iclass 31, count 2 2006.229.09:52:12.70#ibcon#about to read 5, iclass 31, count 2 2006.229.09:52:12.70#ibcon#read 5, iclass 31, count 2 2006.229.09:52:12.70#ibcon#about to read 6, iclass 31, count 2 2006.229.09:52:12.70#ibcon#read 6, iclass 31, count 2 2006.229.09:52:12.70#ibcon#end of sib2, iclass 31, count 2 2006.229.09:52:12.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.09:52:12.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.09:52:12.70#ibcon#[27=AT03-04\r\n] 2006.229.09:52:12.70#ibcon#*before write, iclass 31, count 2 2006.229.09:52:12.70#ibcon#enter sib2, iclass 31, count 2 2006.229.09:52:12.70#ibcon#flushed, iclass 31, count 2 2006.229.09:52:12.70#ibcon#about to write, iclass 31, count 2 2006.229.09:52:12.70#ibcon#wrote, iclass 31, count 2 2006.229.09:52:12.70#ibcon#about to read 3, iclass 31, count 2 2006.229.09:52:12.73#ibcon#read 3, iclass 31, count 2 2006.229.09:52:12.73#ibcon#about to read 4, iclass 31, count 2 2006.229.09:52:12.73#ibcon#read 4, iclass 31, count 2 2006.229.09:52:12.73#ibcon#about to read 5, iclass 31, count 2 2006.229.09:52:12.73#ibcon#read 5, iclass 31, count 2 2006.229.09:52:12.73#ibcon#about to read 6, iclass 31, count 2 2006.229.09:52:12.73#ibcon#read 6, iclass 31, count 2 2006.229.09:52:12.73#ibcon#end of sib2, iclass 31, count 2 2006.229.09:52:12.73#ibcon#*after write, iclass 31, count 2 2006.229.09:52:12.73#ibcon#*before return 0, iclass 31, count 2 2006.229.09:52:12.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:12.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.09:52:12.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.09:52:12.73#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:12.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:12.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:12.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:12.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:52:12.85#ibcon#first serial, iclass 31, count 0 2006.229.09:52:12.85#ibcon#enter sib2, iclass 31, count 0 2006.229.09:52:12.85#ibcon#flushed, iclass 31, count 0 2006.229.09:52:12.85#ibcon#about to write, iclass 31, count 0 2006.229.09:52:12.85#ibcon#wrote, iclass 31, count 0 2006.229.09:52:12.85#ibcon#about to read 3, iclass 31, count 0 2006.229.09:52:12.87#ibcon#read 3, iclass 31, count 0 2006.229.09:52:12.87#ibcon#about to read 4, iclass 31, count 0 2006.229.09:52:12.87#ibcon#read 4, iclass 31, count 0 2006.229.09:52:12.87#ibcon#about to read 5, iclass 31, count 0 2006.229.09:52:12.87#ibcon#read 5, iclass 31, count 0 2006.229.09:52:12.87#ibcon#about to read 6, iclass 31, count 0 2006.229.09:52:12.87#ibcon#read 6, iclass 31, count 0 2006.229.09:52:12.87#ibcon#end of sib2, iclass 31, count 0 2006.229.09:52:12.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:52:12.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:52:12.87#ibcon#[27=USB\r\n] 2006.229.09:52:12.87#ibcon#*before write, iclass 31, count 0 2006.229.09:52:12.87#ibcon#enter sib2, iclass 31, count 0 2006.229.09:52:12.87#ibcon#flushed, iclass 31, count 0 2006.229.09:52:12.87#ibcon#about to write, iclass 31, count 0 2006.229.09:52:12.87#ibcon#wrote, iclass 31, count 0 2006.229.09:52:12.87#ibcon#about to read 3, iclass 31, count 0 2006.229.09:52:12.90#ibcon#read 3, iclass 31, count 0 2006.229.09:52:12.90#ibcon#about to read 4, iclass 31, count 0 2006.229.09:52:12.90#ibcon#read 4, iclass 31, count 0 2006.229.09:52:12.90#ibcon#about to read 5, iclass 31, count 0 2006.229.09:52:12.90#ibcon#read 5, iclass 31, count 0 2006.229.09:52:12.90#ibcon#about to read 6, iclass 31, count 0 2006.229.09:52:12.90#ibcon#read 6, iclass 31, count 0 2006.229.09:52:12.90#ibcon#end of sib2, iclass 31, count 0 2006.229.09:52:12.90#ibcon#*after write, iclass 31, count 0 2006.229.09:52:12.90#ibcon#*before return 0, iclass 31, count 0 2006.229.09:52:12.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:12.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.09:52:12.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:52:12.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:52:12.90$vck44/vblo=4,679.99 2006.229.09:52:12.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.09:52:12.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.09:52:12.90#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:12.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:12.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:12.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:12.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:52:12.90#ibcon#first serial, iclass 33, count 0 2006.229.09:52:12.90#ibcon#enter sib2, iclass 33, count 0 2006.229.09:52:12.90#ibcon#flushed, iclass 33, count 0 2006.229.09:52:12.90#ibcon#about to write, iclass 33, count 0 2006.229.09:52:12.90#ibcon#wrote, iclass 33, count 0 2006.229.09:52:12.90#ibcon#about to read 3, iclass 33, count 0 2006.229.09:52:12.92#ibcon#read 3, iclass 33, count 0 2006.229.09:52:12.92#ibcon#about to read 4, iclass 33, count 0 2006.229.09:52:12.92#ibcon#read 4, iclass 33, count 0 2006.229.09:52:12.92#ibcon#about to read 5, iclass 33, count 0 2006.229.09:52:12.92#ibcon#read 5, iclass 33, count 0 2006.229.09:52:12.92#ibcon#about to read 6, iclass 33, count 0 2006.229.09:52:12.92#ibcon#read 6, iclass 33, count 0 2006.229.09:52:12.92#ibcon#end of sib2, iclass 33, count 0 2006.229.09:52:12.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:52:12.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:52:12.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:52:12.92#ibcon#*before write, iclass 33, count 0 2006.229.09:52:12.92#ibcon#enter sib2, iclass 33, count 0 2006.229.09:52:12.92#ibcon#flushed, iclass 33, count 0 2006.229.09:52:12.92#ibcon#about to write, iclass 33, count 0 2006.229.09:52:12.92#ibcon#wrote, iclass 33, count 0 2006.229.09:52:12.92#ibcon#about to read 3, iclass 33, count 0 2006.229.09:52:12.96#ibcon#read 3, iclass 33, count 0 2006.229.09:52:12.96#ibcon#about to read 4, iclass 33, count 0 2006.229.09:52:12.96#ibcon#read 4, iclass 33, count 0 2006.229.09:52:12.96#ibcon#about to read 5, iclass 33, count 0 2006.229.09:52:12.96#ibcon#read 5, iclass 33, count 0 2006.229.09:52:12.96#ibcon#about to read 6, iclass 33, count 0 2006.229.09:52:12.96#ibcon#read 6, iclass 33, count 0 2006.229.09:52:12.96#ibcon#end of sib2, iclass 33, count 0 2006.229.09:52:12.96#ibcon#*after write, iclass 33, count 0 2006.229.09:52:12.96#ibcon#*before return 0, iclass 33, count 0 2006.229.09:52:12.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:12.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.09:52:12.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:52:12.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:52:12.96$vck44/vb=4,4 2006.229.09:52:12.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.09:52:12.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.09:52:12.96#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:12.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:13.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:13.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:13.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.09:52:13.02#ibcon#first serial, iclass 35, count 2 2006.229.09:52:13.02#ibcon#enter sib2, iclass 35, count 2 2006.229.09:52:13.02#ibcon#flushed, iclass 35, count 2 2006.229.09:52:13.02#ibcon#about to write, iclass 35, count 2 2006.229.09:52:13.02#ibcon#wrote, iclass 35, count 2 2006.229.09:52:13.02#ibcon#about to read 3, iclass 35, count 2 2006.229.09:52:13.04#ibcon#read 3, iclass 35, count 2 2006.229.09:52:13.04#ibcon#about to read 4, iclass 35, count 2 2006.229.09:52:13.04#ibcon#read 4, iclass 35, count 2 2006.229.09:52:13.04#ibcon#about to read 5, iclass 35, count 2 2006.229.09:52:13.04#ibcon#read 5, iclass 35, count 2 2006.229.09:52:13.04#ibcon#about to read 6, iclass 35, count 2 2006.229.09:52:13.04#ibcon#read 6, iclass 35, count 2 2006.229.09:52:13.04#ibcon#end of sib2, iclass 35, count 2 2006.229.09:52:13.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.09:52:13.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.09:52:13.04#ibcon#[27=AT04-04\r\n] 2006.229.09:52:13.04#ibcon#*before write, iclass 35, count 2 2006.229.09:52:13.04#ibcon#enter sib2, iclass 35, count 2 2006.229.09:52:13.04#ibcon#flushed, iclass 35, count 2 2006.229.09:52:13.04#ibcon#about to write, iclass 35, count 2 2006.229.09:52:13.04#ibcon#wrote, iclass 35, count 2 2006.229.09:52:13.04#ibcon#about to read 3, iclass 35, count 2 2006.229.09:52:13.07#ibcon#read 3, iclass 35, count 2 2006.229.09:52:13.07#ibcon#about to read 4, iclass 35, count 2 2006.229.09:52:13.07#ibcon#read 4, iclass 35, count 2 2006.229.09:52:13.07#ibcon#about to read 5, iclass 35, count 2 2006.229.09:52:13.07#ibcon#read 5, iclass 35, count 2 2006.229.09:52:13.07#ibcon#about to read 6, iclass 35, count 2 2006.229.09:52:13.07#ibcon#read 6, iclass 35, count 2 2006.229.09:52:13.07#ibcon#end of sib2, iclass 35, count 2 2006.229.09:52:13.07#ibcon#*after write, iclass 35, count 2 2006.229.09:52:13.07#ibcon#*before return 0, iclass 35, count 2 2006.229.09:52:13.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:13.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.09:52:13.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.09:52:13.07#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:13.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:13.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:13.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:13.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:52:13.19#ibcon#first serial, iclass 35, count 0 2006.229.09:52:13.19#ibcon#enter sib2, iclass 35, count 0 2006.229.09:52:13.19#ibcon#flushed, iclass 35, count 0 2006.229.09:52:13.19#ibcon#about to write, iclass 35, count 0 2006.229.09:52:13.19#ibcon#wrote, iclass 35, count 0 2006.229.09:52:13.19#ibcon#about to read 3, iclass 35, count 0 2006.229.09:52:13.21#ibcon#read 3, iclass 35, count 0 2006.229.09:52:13.21#ibcon#about to read 4, iclass 35, count 0 2006.229.09:52:13.21#ibcon#read 4, iclass 35, count 0 2006.229.09:52:13.21#ibcon#about to read 5, iclass 35, count 0 2006.229.09:52:13.21#ibcon#read 5, iclass 35, count 0 2006.229.09:52:13.21#ibcon#about to read 6, iclass 35, count 0 2006.229.09:52:13.21#ibcon#read 6, iclass 35, count 0 2006.229.09:52:13.21#ibcon#end of sib2, iclass 35, count 0 2006.229.09:52:13.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:52:13.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:52:13.21#ibcon#[27=USB\r\n] 2006.229.09:52:13.21#ibcon#*before write, iclass 35, count 0 2006.229.09:52:13.21#ibcon#enter sib2, iclass 35, count 0 2006.229.09:52:13.21#ibcon#flushed, iclass 35, count 0 2006.229.09:52:13.21#ibcon#about to write, iclass 35, count 0 2006.229.09:52:13.21#ibcon#wrote, iclass 35, count 0 2006.229.09:52:13.21#ibcon#about to read 3, iclass 35, count 0 2006.229.09:52:13.24#ibcon#read 3, iclass 35, count 0 2006.229.09:52:13.24#ibcon#about to read 4, iclass 35, count 0 2006.229.09:52:13.24#ibcon#read 4, iclass 35, count 0 2006.229.09:52:13.24#ibcon#about to read 5, iclass 35, count 0 2006.229.09:52:13.24#ibcon#read 5, iclass 35, count 0 2006.229.09:52:13.24#ibcon#about to read 6, iclass 35, count 0 2006.229.09:52:13.24#ibcon#read 6, iclass 35, count 0 2006.229.09:52:13.24#ibcon#end of sib2, iclass 35, count 0 2006.229.09:52:13.24#ibcon#*after write, iclass 35, count 0 2006.229.09:52:13.24#ibcon#*before return 0, iclass 35, count 0 2006.229.09:52:13.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:13.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.09:52:13.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:52:13.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:52:13.24$vck44/vblo=5,709.99 2006.229.09:52:13.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.09:52:13.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.09:52:13.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:13.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:13.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:13.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:13.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:52:13.24#ibcon#first serial, iclass 37, count 0 2006.229.09:52:13.24#ibcon#enter sib2, iclass 37, count 0 2006.229.09:52:13.24#ibcon#flushed, iclass 37, count 0 2006.229.09:52:13.24#ibcon#about to write, iclass 37, count 0 2006.229.09:52:13.24#ibcon#wrote, iclass 37, count 0 2006.229.09:52:13.24#ibcon#about to read 3, iclass 37, count 0 2006.229.09:52:13.26#ibcon#read 3, iclass 37, count 0 2006.229.09:52:13.26#ibcon#about to read 4, iclass 37, count 0 2006.229.09:52:13.26#ibcon#read 4, iclass 37, count 0 2006.229.09:52:13.26#ibcon#about to read 5, iclass 37, count 0 2006.229.09:52:13.26#ibcon#read 5, iclass 37, count 0 2006.229.09:52:13.26#ibcon#about to read 6, iclass 37, count 0 2006.229.09:52:13.26#ibcon#read 6, iclass 37, count 0 2006.229.09:52:13.26#ibcon#end of sib2, iclass 37, count 0 2006.229.09:52:13.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:52:13.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:52:13.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:52:13.26#ibcon#*before write, iclass 37, count 0 2006.229.09:52:13.26#ibcon#enter sib2, iclass 37, count 0 2006.229.09:52:13.26#ibcon#flushed, iclass 37, count 0 2006.229.09:52:13.26#ibcon#about to write, iclass 37, count 0 2006.229.09:52:13.26#ibcon#wrote, iclass 37, count 0 2006.229.09:52:13.26#ibcon#about to read 3, iclass 37, count 0 2006.229.09:52:13.30#ibcon#read 3, iclass 37, count 0 2006.229.09:52:13.30#ibcon#about to read 4, iclass 37, count 0 2006.229.09:52:13.30#ibcon#read 4, iclass 37, count 0 2006.229.09:52:13.30#ibcon#about to read 5, iclass 37, count 0 2006.229.09:52:13.30#ibcon#read 5, iclass 37, count 0 2006.229.09:52:13.30#ibcon#about to read 6, iclass 37, count 0 2006.229.09:52:13.30#ibcon#read 6, iclass 37, count 0 2006.229.09:52:13.30#ibcon#end of sib2, iclass 37, count 0 2006.229.09:52:13.30#ibcon#*after write, iclass 37, count 0 2006.229.09:52:13.30#ibcon#*before return 0, iclass 37, count 0 2006.229.09:52:13.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:13.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.09:52:13.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:52:13.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:52:13.30$vck44/vb=5,4 2006.229.09:52:13.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.09:52:13.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.09:52:13.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:13.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:13.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:13.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:13.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.09:52:13.36#ibcon#first serial, iclass 39, count 2 2006.229.09:52:13.36#ibcon#enter sib2, iclass 39, count 2 2006.229.09:52:13.36#ibcon#flushed, iclass 39, count 2 2006.229.09:52:13.36#ibcon#about to write, iclass 39, count 2 2006.229.09:52:13.36#ibcon#wrote, iclass 39, count 2 2006.229.09:52:13.36#ibcon#about to read 3, iclass 39, count 2 2006.229.09:52:13.38#ibcon#read 3, iclass 39, count 2 2006.229.09:52:13.38#ibcon#about to read 4, iclass 39, count 2 2006.229.09:52:13.38#ibcon#read 4, iclass 39, count 2 2006.229.09:52:13.38#ibcon#about to read 5, iclass 39, count 2 2006.229.09:52:13.38#ibcon#read 5, iclass 39, count 2 2006.229.09:52:13.38#ibcon#about to read 6, iclass 39, count 2 2006.229.09:52:13.38#ibcon#read 6, iclass 39, count 2 2006.229.09:52:13.38#ibcon#end of sib2, iclass 39, count 2 2006.229.09:52:13.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.09:52:13.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.09:52:13.38#ibcon#[27=AT05-04\r\n] 2006.229.09:52:13.38#ibcon#*before write, iclass 39, count 2 2006.229.09:52:13.38#ibcon#enter sib2, iclass 39, count 2 2006.229.09:52:13.38#ibcon#flushed, iclass 39, count 2 2006.229.09:52:13.38#ibcon#about to write, iclass 39, count 2 2006.229.09:52:13.38#ibcon#wrote, iclass 39, count 2 2006.229.09:52:13.38#ibcon#about to read 3, iclass 39, count 2 2006.229.09:52:13.41#ibcon#read 3, iclass 39, count 2 2006.229.09:52:13.41#ibcon#about to read 4, iclass 39, count 2 2006.229.09:52:13.41#ibcon#read 4, iclass 39, count 2 2006.229.09:52:13.41#ibcon#about to read 5, iclass 39, count 2 2006.229.09:52:13.41#ibcon#read 5, iclass 39, count 2 2006.229.09:52:13.41#ibcon#about to read 6, iclass 39, count 2 2006.229.09:52:13.41#ibcon#read 6, iclass 39, count 2 2006.229.09:52:13.41#ibcon#end of sib2, iclass 39, count 2 2006.229.09:52:13.41#ibcon#*after write, iclass 39, count 2 2006.229.09:52:13.41#ibcon#*before return 0, iclass 39, count 2 2006.229.09:52:13.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:13.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.09:52:13.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.09:52:13.41#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:13.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:13.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:13.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:13.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:52:13.53#ibcon#first serial, iclass 39, count 0 2006.229.09:52:13.53#ibcon#enter sib2, iclass 39, count 0 2006.229.09:52:13.53#ibcon#flushed, iclass 39, count 0 2006.229.09:52:13.53#ibcon#about to write, iclass 39, count 0 2006.229.09:52:13.53#ibcon#wrote, iclass 39, count 0 2006.229.09:52:13.53#ibcon#about to read 3, iclass 39, count 0 2006.229.09:52:13.55#ibcon#read 3, iclass 39, count 0 2006.229.09:52:13.55#ibcon#about to read 4, iclass 39, count 0 2006.229.09:52:13.55#ibcon#read 4, iclass 39, count 0 2006.229.09:52:13.55#ibcon#about to read 5, iclass 39, count 0 2006.229.09:52:13.55#ibcon#read 5, iclass 39, count 0 2006.229.09:52:13.55#ibcon#about to read 6, iclass 39, count 0 2006.229.09:52:13.55#ibcon#read 6, iclass 39, count 0 2006.229.09:52:13.55#ibcon#end of sib2, iclass 39, count 0 2006.229.09:52:13.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:52:13.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:52:13.55#ibcon#[27=USB\r\n] 2006.229.09:52:13.55#ibcon#*before write, iclass 39, count 0 2006.229.09:52:13.55#ibcon#enter sib2, iclass 39, count 0 2006.229.09:52:13.55#ibcon#flushed, iclass 39, count 0 2006.229.09:52:13.55#ibcon#about to write, iclass 39, count 0 2006.229.09:52:13.55#ibcon#wrote, iclass 39, count 0 2006.229.09:52:13.55#ibcon#about to read 3, iclass 39, count 0 2006.229.09:52:13.58#ibcon#read 3, iclass 39, count 0 2006.229.09:52:13.58#ibcon#about to read 4, iclass 39, count 0 2006.229.09:52:13.58#ibcon#read 4, iclass 39, count 0 2006.229.09:52:13.58#ibcon#about to read 5, iclass 39, count 0 2006.229.09:52:13.58#ibcon#read 5, iclass 39, count 0 2006.229.09:52:13.58#ibcon#about to read 6, iclass 39, count 0 2006.229.09:52:13.58#ibcon#read 6, iclass 39, count 0 2006.229.09:52:13.58#ibcon#end of sib2, iclass 39, count 0 2006.229.09:52:13.58#ibcon#*after write, iclass 39, count 0 2006.229.09:52:13.58#ibcon#*before return 0, iclass 39, count 0 2006.229.09:52:13.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:13.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.09:52:13.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:52:13.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:52:13.58$vck44/vblo=6,719.99 2006.229.09:52:13.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.09:52:13.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.09:52:13.58#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:13.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:13.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:13.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:13.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:52:13.58#ibcon#first serial, iclass 3, count 0 2006.229.09:52:13.58#ibcon#enter sib2, iclass 3, count 0 2006.229.09:52:13.58#ibcon#flushed, iclass 3, count 0 2006.229.09:52:13.58#ibcon#about to write, iclass 3, count 0 2006.229.09:52:13.58#ibcon#wrote, iclass 3, count 0 2006.229.09:52:13.58#ibcon#about to read 3, iclass 3, count 0 2006.229.09:52:13.60#ibcon#read 3, iclass 3, count 0 2006.229.09:52:13.60#ibcon#about to read 4, iclass 3, count 0 2006.229.09:52:13.60#ibcon#read 4, iclass 3, count 0 2006.229.09:52:13.60#ibcon#about to read 5, iclass 3, count 0 2006.229.09:52:13.60#ibcon#read 5, iclass 3, count 0 2006.229.09:52:13.60#ibcon#about to read 6, iclass 3, count 0 2006.229.09:52:13.60#ibcon#read 6, iclass 3, count 0 2006.229.09:52:13.60#ibcon#end of sib2, iclass 3, count 0 2006.229.09:52:13.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:52:13.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:52:13.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:52:13.60#ibcon#*before write, iclass 3, count 0 2006.229.09:52:13.60#ibcon#enter sib2, iclass 3, count 0 2006.229.09:52:13.60#ibcon#flushed, iclass 3, count 0 2006.229.09:52:13.60#ibcon#about to write, iclass 3, count 0 2006.229.09:52:13.60#ibcon#wrote, iclass 3, count 0 2006.229.09:52:13.60#ibcon#about to read 3, iclass 3, count 0 2006.229.09:52:13.64#ibcon#read 3, iclass 3, count 0 2006.229.09:52:13.64#ibcon#about to read 4, iclass 3, count 0 2006.229.09:52:13.64#ibcon#read 4, iclass 3, count 0 2006.229.09:52:13.64#ibcon#about to read 5, iclass 3, count 0 2006.229.09:52:13.64#ibcon#read 5, iclass 3, count 0 2006.229.09:52:13.64#ibcon#about to read 6, iclass 3, count 0 2006.229.09:52:13.64#ibcon#read 6, iclass 3, count 0 2006.229.09:52:13.64#ibcon#end of sib2, iclass 3, count 0 2006.229.09:52:13.64#ibcon#*after write, iclass 3, count 0 2006.229.09:52:13.64#ibcon#*before return 0, iclass 3, count 0 2006.229.09:52:13.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:13.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.09:52:13.64#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:52:13.64#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:52:13.64$vck44/vb=6,4 2006.229.09:52:13.64#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.09:52:13.64#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.09:52:13.64#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:13.64#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:13.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:13.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:13.70#ibcon#enter wrdev, iclass 5, count 2 2006.229.09:52:13.70#ibcon#first serial, iclass 5, count 2 2006.229.09:52:13.70#ibcon#enter sib2, iclass 5, count 2 2006.229.09:52:13.70#ibcon#flushed, iclass 5, count 2 2006.229.09:52:13.70#ibcon#about to write, iclass 5, count 2 2006.229.09:52:13.70#ibcon#wrote, iclass 5, count 2 2006.229.09:52:13.70#ibcon#about to read 3, iclass 5, count 2 2006.229.09:52:13.72#ibcon#read 3, iclass 5, count 2 2006.229.09:52:13.72#ibcon#about to read 4, iclass 5, count 2 2006.229.09:52:13.72#ibcon#read 4, iclass 5, count 2 2006.229.09:52:13.72#ibcon#about to read 5, iclass 5, count 2 2006.229.09:52:13.72#ibcon#read 5, iclass 5, count 2 2006.229.09:52:13.72#ibcon#about to read 6, iclass 5, count 2 2006.229.09:52:13.72#ibcon#read 6, iclass 5, count 2 2006.229.09:52:13.72#ibcon#end of sib2, iclass 5, count 2 2006.229.09:52:13.72#ibcon#*mode == 0, iclass 5, count 2 2006.229.09:52:13.72#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.09:52:13.72#ibcon#[27=AT06-04\r\n] 2006.229.09:52:13.72#ibcon#*before write, iclass 5, count 2 2006.229.09:52:13.72#ibcon#enter sib2, iclass 5, count 2 2006.229.09:52:13.72#ibcon#flushed, iclass 5, count 2 2006.229.09:52:13.72#ibcon#about to write, iclass 5, count 2 2006.229.09:52:13.72#ibcon#wrote, iclass 5, count 2 2006.229.09:52:13.72#ibcon#about to read 3, iclass 5, count 2 2006.229.09:52:13.75#ibcon#read 3, iclass 5, count 2 2006.229.09:52:13.75#ibcon#about to read 4, iclass 5, count 2 2006.229.09:52:13.75#ibcon#read 4, iclass 5, count 2 2006.229.09:52:13.75#ibcon#about to read 5, iclass 5, count 2 2006.229.09:52:13.75#ibcon#read 5, iclass 5, count 2 2006.229.09:52:13.75#ibcon#about to read 6, iclass 5, count 2 2006.229.09:52:13.75#ibcon#read 6, iclass 5, count 2 2006.229.09:52:13.75#ibcon#end of sib2, iclass 5, count 2 2006.229.09:52:13.75#ibcon#*after write, iclass 5, count 2 2006.229.09:52:13.75#ibcon#*before return 0, iclass 5, count 2 2006.229.09:52:13.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:13.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.09:52:13.75#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.09:52:13.75#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:13.75#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:13.87#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:13.87#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:13.87#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:52:13.87#ibcon#first serial, iclass 5, count 0 2006.229.09:52:13.87#ibcon#enter sib2, iclass 5, count 0 2006.229.09:52:13.87#ibcon#flushed, iclass 5, count 0 2006.229.09:52:13.87#ibcon#about to write, iclass 5, count 0 2006.229.09:52:13.87#ibcon#wrote, iclass 5, count 0 2006.229.09:52:13.87#ibcon#about to read 3, iclass 5, count 0 2006.229.09:52:13.89#ibcon#read 3, iclass 5, count 0 2006.229.09:52:13.89#ibcon#about to read 4, iclass 5, count 0 2006.229.09:52:13.89#ibcon#read 4, iclass 5, count 0 2006.229.09:52:13.89#ibcon#about to read 5, iclass 5, count 0 2006.229.09:52:13.89#ibcon#read 5, iclass 5, count 0 2006.229.09:52:13.89#ibcon#about to read 6, iclass 5, count 0 2006.229.09:52:13.89#ibcon#read 6, iclass 5, count 0 2006.229.09:52:13.89#ibcon#end of sib2, iclass 5, count 0 2006.229.09:52:13.89#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:52:13.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:52:13.89#ibcon#[27=USB\r\n] 2006.229.09:52:13.89#ibcon#*before write, iclass 5, count 0 2006.229.09:52:13.89#ibcon#enter sib2, iclass 5, count 0 2006.229.09:52:13.89#ibcon#flushed, iclass 5, count 0 2006.229.09:52:13.89#ibcon#about to write, iclass 5, count 0 2006.229.09:52:13.89#ibcon#wrote, iclass 5, count 0 2006.229.09:52:13.89#ibcon#about to read 3, iclass 5, count 0 2006.229.09:52:13.92#ibcon#read 3, iclass 5, count 0 2006.229.09:52:13.92#ibcon#about to read 4, iclass 5, count 0 2006.229.09:52:13.92#ibcon#read 4, iclass 5, count 0 2006.229.09:52:13.92#ibcon#about to read 5, iclass 5, count 0 2006.229.09:52:13.92#ibcon#read 5, iclass 5, count 0 2006.229.09:52:13.92#ibcon#about to read 6, iclass 5, count 0 2006.229.09:52:13.92#ibcon#read 6, iclass 5, count 0 2006.229.09:52:13.92#ibcon#end of sib2, iclass 5, count 0 2006.229.09:52:13.92#ibcon#*after write, iclass 5, count 0 2006.229.09:52:13.92#ibcon#*before return 0, iclass 5, count 0 2006.229.09:52:13.92#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:13.92#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.09:52:13.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:52:13.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:52:13.92$vck44/vblo=7,734.99 2006.229.09:52:13.92#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.09:52:13.92#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.09:52:13.92#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:13.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:13.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:13.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:13.92#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:52:13.92#ibcon#first serial, iclass 7, count 0 2006.229.09:52:13.92#ibcon#enter sib2, iclass 7, count 0 2006.229.09:52:13.92#ibcon#flushed, iclass 7, count 0 2006.229.09:52:13.92#ibcon#about to write, iclass 7, count 0 2006.229.09:52:13.92#ibcon#wrote, iclass 7, count 0 2006.229.09:52:13.92#ibcon#about to read 3, iclass 7, count 0 2006.229.09:52:13.94#ibcon#read 3, iclass 7, count 0 2006.229.09:52:13.94#ibcon#about to read 4, iclass 7, count 0 2006.229.09:52:13.94#ibcon#read 4, iclass 7, count 0 2006.229.09:52:13.94#ibcon#about to read 5, iclass 7, count 0 2006.229.09:52:13.94#ibcon#read 5, iclass 7, count 0 2006.229.09:52:13.94#ibcon#about to read 6, iclass 7, count 0 2006.229.09:52:13.94#ibcon#read 6, iclass 7, count 0 2006.229.09:52:13.94#ibcon#end of sib2, iclass 7, count 0 2006.229.09:52:13.94#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:52:13.94#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:52:13.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:52:13.94#ibcon#*before write, iclass 7, count 0 2006.229.09:52:13.94#ibcon#enter sib2, iclass 7, count 0 2006.229.09:52:13.94#ibcon#flushed, iclass 7, count 0 2006.229.09:52:13.94#ibcon#about to write, iclass 7, count 0 2006.229.09:52:13.94#ibcon#wrote, iclass 7, count 0 2006.229.09:52:13.94#ibcon#about to read 3, iclass 7, count 0 2006.229.09:52:13.98#ibcon#read 3, iclass 7, count 0 2006.229.09:52:13.98#ibcon#about to read 4, iclass 7, count 0 2006.229.09:52:13.98#ibcon#read 4, iclass 7, count 0 2006.229.09:52:13.98#ibcon#about to read 5, iclass 7, count 0 2006.229.09:52:13.98#ibcon#read 5, iclass 7, count 0 2006.229.09:52:13.98#ibcon#about to read 6, iclass 7, count 0 2006.229.09:52:13.98#ibcon#read 6, iclass 7, count 0 2006.229.09:52:13.98#ibcon#end of sib2, iclass 7, count 0 2006.229.09:52:13.98#ibcon#*after write, iclass 7, count 0 2006.229.09:52:13.98#ibcon#*before return 0, iclass 7, count 0 2006.229.09:52:13.98#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:13.98#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.09:52:13.98#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:52:13.98#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:52:13.98$vck44/vb=7,4 2006.229.09:52:13.98#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.09:52:13.98#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.09:52:13.98#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:13.98#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:14.04#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:14.04#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:14.04#ibcon#enter wrdev, iclass 11, count 2 2006.229.09:52:14.04#ibcon#first serial, iclass 11, count 2 2006.229.09:52:14.04#ibcon#enter sib2, iclass 11, count 2 2006.229.09:52:14.04#ibcon#flushed, iclass 11, count 2 2006.229.09:52:14.04#ibcon#about to write, iclass 11, count 2 2006.229.09:52:14.04#ibcon#wrote, iclass 11, count 2 2006.229.09:52:14.04#ibcon#about to read 3, iclass 11, count 2 2006.229.09:52:14.06#ibcon#read 3, iclass 11, count 2 2006.229.09:52:14.06#ibcon#about to read 4, iclass 11, count 2 2006.229.09:52:14.06#ibcon#read 4, iclass 11, count 2 2006.229.09:52:14.06#ibcon#about to read 5, iclass 11, count 2 2006.229.09:52:14.06#ibcon#read 5, iclass 11, count 2 2006.229.09:52:14.06#ibcon#about to read 6, iclass 11, count 2 2006.229.09:52:14.06#ibcon#read 6, iclass 11, count 2 2006.229.09:52:14.06#ibcon#end of sib2, iclass 11, count 2 2006.229.09:52:14.06#ibcon#*mode == 0, iclass 11, count 2 2006.229.09:52:14.06#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.09:52:14.06#ibcon#[27=AT07-04\r\n] 2006.229.09:52:14.06#ibcon#*before write, iclass 11, count 2 2006.229.09:52:14.06#ibcon#enter sib2, iclass 11, count 2 2006.229.09:52:14.06#ibcon#flushed, iclass 11, count 2 2006.229.09:52:14.06#ibcon#about to write, iclass 11, count 2 2006.229.09:52:14.06#ibcon#wrote, iclass 11, count 2 2006.229.09:52:14.06#ibcon#about to read 3, iclass 11, count 2 2006.229.09:52:14.09#ibcon#read 3, iclass 11, count 2 2006.229.09:52:14.09#ibcon#about to read 4, iclass 11, count 2 2006.229.09:52:14.09#ibcon#read 4, iclass 11, count 2 2006.229.09:52:14.09#ibcon#about to read 5, iclass 11, count 2 2006.229.09:52:14.09#ibcon#read 5, iclass 11, count 2 2006.229.09:52:14.09#ibcon#about to read 6, iclass 11, count 2 2006.229.09:52:14.09#ibcon#read 6, iclass 11, count 2 2006.229.09:52:14.09#ibcon#end of sib2, iclass 11, count 2 2006.229.09:52:14.09#ibcon#*after write, iclass 11, count 2 2006.229.09:52:14.09#ibcon#*before return 0, iclass 11, count 2 2006.229.09:52:14.09#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:14.09#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.09:52:14.09#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.09:52:14.09#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:14.09#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:14.21#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:14.21#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:14.21#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:52:14.21#ibcon#first serial, iclass 11, count 0 2006.229.09:52:14.21#ibcon#enter sib2, iclass 11, count 0 2006.229.09:52:14.21#ibcon#flushed, iclass 11, count 0 2006.229.09:52:14.21#ibcon#about to write, iclass 11, count 0 2006.229.09:52:14.21#ibcon#wrote, iclass 11, count 0 2006.229.09:52:14.21#ibcon#about to read 3, iclass 11, count 0 2006.229.09:52:14.23#ibcon#read 3, iclass 11, count 0 2006.229.09:52:14.23#ibcon#about to read 4, iclass 11, count 0 2006.229.09:52:14.23#ibcon#read 4, iclass 11, count 0 2006.229.09:52:14.23#ibcon#about to read 5, iclass 11, count 0 2006.229.09:52:14.23#ibcon#read 5, iclass 11, count 0 2006.229.09:52:14.23#ibcon#about to read 6, iclass 11, count 0 2006.229.09:52:14.23#ibcon#read 6, iclass 11, count 0 2006.229.09:52:14.23#ibcon#end of sib2, iclass 11, count 0 2006.229.09:52:14.23#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:52:14.23#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:52:14.23#ibcon#[27=USB\r\n] 2006.229.09:52:14.23#ibcon#*before write, iclass 11, count 0 2006.229.09:52:14.23#ibcon#enter sib2, iclass 11, count 0 2006.229.09:52:14.23#ibcon#flushed, iclass 11, count 0 2006.229.09:52:14.23#ibcon#about to write, iclass 11, count 0 2006.229.09:52:14.23#ibcon#wrote, iclass 11, count 0 2006.229.09:52:14.23#ibcon#about to read 3, iclass 11, count 0 2006.229.09:52:14.26#ibcon#read 3, iclass 11, count 0 2006.229.09:52:14.26#ibcon#about to read 4, iclass 11, count 0 2006.229.09:52:14.26#ibcon#read 4, iclass 11, count 0 2006.229.09:52:14.26#ibcon#about to read 5, iclass 11, count 0 2006.229.09:52:14.26#ibcon#read 5, iclass 11, count 0 2006.229.09:52:14.26#ibcon#about to read 6, iclass 11, count 0 2006.229.09:52:14.26#ibcon#read 6, iclass 11, count 0 2006.229.09:52:14.26#ibcon#end of sib2, iclass 11, count 0 2006.229.09:52:14.26#ibcon#*after write, iclass 11, count 0 2006.229.09:52:14.26#ibcon#*before return 0, iclass 11, count 0 2006.229.09:52:14.26#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:14.26#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.09:52:14.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:52:14.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:52:14.26$vck44/vblo=8,744.99 2006.229.09:52:14.26#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.09:52:14.26#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.09:52:14.26#ibcon#ireg 17 cls_cnt 0 2006.229.09:52:14.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:14.26#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:14.26#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:14.26#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:52:14.26#ibcon#first serial, iclass 13, count 0 2006.229.09:52:14.26#ibcon#enter sib2, iclass 13, count 0 2006.229.09:52:14.26#ibcon#flushed, iclass 13, count 0 2006.229.09:52:14.26#ibcon#about to write, iclass 13, count 0 2006.229.09:52:14.26#ibcon#wrote, iclass 13, count 0 2006.229.09:52:14.26#ibcon#about to read 3, iclass 13, count 0 2006.229.09:52:14.28#ibcon#read 3, iclass 13, count 0 2006.229.09:52:14.28#ibcon#about to read 4, iclass 13, count 0 2006.229.09:52:14.28#ibcon#read 4, iclass 13, count 0 2006.229.09:52:14.28#ibcon#about to read 5, iclass 13, count 0 2006.229.09:52:14.28#ibcon#read 5, iclass 13, count 0 2006.229.09:52:14.28#ibcon#about to read 6, iclass 13, count 0 2006.229.09:52:14.28#ibcon#read 6, iclass 13, count 0 2006.229.09:52:14.28#ibcon#end of sib2, iclass 13, count 0 2006.229.09:52:14.28#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:52:14.28#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:52:14.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:52:14.28#ibcon#*before write, iclass 13, count 0 2006.229.09:52:14.28#ibcon#enter sib2, iclass 13, count 0 2006.229.09:52:14.28#ibcon#flushed, iclass 13, count 0 2006.229.09:52:14.28#ibcon#about to write, iclass 13, count 0 2006.229.09:52:14.28#ibcon#wrote, iclass 13, count 0 2006.229.09:52:14.28#ibcon#about to read 3, iclass 13, count 0 2006.229.09:52:14.32#ibcon#read 3, iclass 13, count 0 2006.229.09:52:14.32#ibcon#about to read 4, iclass 13, count 0 2006.229.09:52:14.32#ibcon#read 4, iclass 13, count 0 2006.229.09:52:14.32#ibcon#about to read 5, iclass 13, count 0 2006.229.09:52:14.32#ibcon#read 5, iclass 13, count 0 2006.229.09:52:14.32#ibcon#about to read 6, iclass 13, count 0 2006.229.09:52:14.32#ibcon#read 6, iclass 13, count 0 2006.229.09:52:14.32#ibcon#end of sib2, iclass 13, count 0 2006.229.09:52:14.32#ibcon#*after write, iclass 13, count 0 2006.229.09:52:14.32#ibcon#*before return 0, iclass 13, count 0 2006.229.09:52:14.32#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:14.32#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.09:52:14.32#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:52:14.32#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:52:14.32$vck44/vb=8,4 2006.229.09:52:14.32#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.09:52:14.32#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.09:52:14.32#ibcon#ireg 11 cls_cnt 2 2006.229.09:52:14.32#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:14.38#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:14.38#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:14.38#ibcon#enter wrdev, iclass 15, count 2 2006.229.09:52:14.38#ibcon#first serial, iclass 15, count 2 2006.229.09:52:14.38#ibcon#enter sib2, iclass 15, count 2 2006.229.09:52:14.38#ibcon#flushed, iclass 15, count 2 2006.229.09:52:14.38#ibcon#about to write, iclass 15, count 2 2006.229.09:52:14.38#ibcon#wrote, iclass 15, count 2 2006.229.09:52:14.38#ibcon#about to read 3, iclass 15, count 2 2006.229.09:52:14.40#ibcon#read 3, iclass 15, count 2 2006.229.09:52:14.40#ibcon#about to read 4, iclass 15, count 2 2006.229.09:52:14.40#ibcon#read 4, iclass 15, count 2 2006.229.09:52:14.40#ibcon#about to read 5, iclass 15, count 2 2006.229.09:52:14.40#ibcon#read 5, iclass 15, count 2 2006.229.09:52:14.40#ibcon#about to read 6, iclass 15, count 2 2006.229.09:52:14.40#ibcon#read 6, iclass 15, count 2 2006.229.09:52:14.40#ibcon#end of sib2, iclass 15, count 2 2006.229.09:52:14.40#ibcon#*mode == 0, iclass 15, count 2 2006.229.09:52:14.40#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.09:52:14.40#ibcon#[27=AT08-04\r\n] 2006.229.09:52:14.40#ibcon#*before write, iclass 15, count 2 2006.229.09:52:14.40#ibcon#enter sib2, iclass 15, count 2 2006.229.09:52:14.40#ibcon#flushed, iclass 15, count 2 2006.229.09:52:14.40#ibcon#about to write, iclass 15, count 2 2006.229.09:52:14.40#ibcon#wrote, iclass 15, count 2 2006.229.09:52:14.40#ibcon#about to read 3, iclass 15, count 2 2006.229.09:52:14.43#ibcon#read 3, iclass 15, count 2 2006.229.09:52:14.43#ibcon#about to read 4, iclass 15, count 2 2006.229.09:52:14.43#ibcon#read 4, iclass 15, count 2 2006.229.09:52:14.43#ibcon#about to read 5, iclass 15, count 2 2006.229.09:52:14.43#ibcon#read 5, iclass 15, count 2 2006.229.09:52:14.43#ibcon#about to read 6, iclass 15, count 2 2006.229.09:52:14.43#ibcon#read 6, iclass 15, count 2 2006.229.09:52:14.43#ibcon#end of sib2, iclass 15, count 2 2006.229.09:52:14.43#ibcon#*after write, iclass 15, count 2 2006.229.09:52:14.43#ibcon#*before return 0, iclass 15, count 2 2006.229.09:52:14.43#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:14.43#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.09:52:14.43#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.09:52:14.43#ibcon#ireg 7 cls_cnt 0 2006.229.09:52:14.43#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:14.55#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:14.55#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:14.55#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:52:14.55#ibcon#first serial, iclass 15, count 0 2006.229.09:52:14.55#ibcon#enter sib2, iclass 15, count 0 2006.229.09:52:14.55#ibcon#flushed, iclass 15, count 0 2006.229.09:52:14.55#ibcon#about to write, iclass 15, count 0 2006.229.09:52:14.55#ibcon#wrote, iclass 15, count 0 2006.229.09:52:14.55#ibcon#about to read 3, iclass 15, count 0 2006.229.09:52:14.57#ibcon#read 3, iclass 15, count 0 2006.229.09:52:14.57#ibcon#about to read 4, iclass 15, count 0 2006.229.09:52:14.57#ibcon#read 4, iclass 15, count 0 2006.229.09:52:14.57#ibcon#about to read 5, iclass 15, count 0 2006.229.09:52:14.57#ibcon#read 5, iclass 15, count 0 2006.229.09:52:14.57#ibcon#about to read 6, iclass 15, count 0 2006.229.09:52:14.57#ibcon#read 6, iclass 15, count 0 2006.229.09:52:14.57#ibcon#end of sib2, iclass 15, count 0 2006.229.09:52:14.57#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:52:14.57#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:52:14.57#ibcon#[27=USB\r\n] 2006.229.09:52:14.57#ibcon#*before write, iclass 15, count 0 2006.229.09:52:14.57#ibcon#enter sib2, iclass 15, count 0 2006.229.09:52:14.57#ibcon#flushed, iclass 15, count 0 2006.229.09:52:14.57#ibcon#about to write, iclass 15, count 0 2006.229.09:52:14.57#ibcon#wrote, iclass 15, count 0 2006.229.09:52:14.57#ibcon#about to read 3, iclass 15, count 0 2006.229.09:52:14.60#ibcon#read 3, iclass 15, count 0 2006.229.09:52:14.60#ibcon#about to read 4, iclass 15, count 0 2006.229.09:52:14.60#ibcon#read 4, iclass 15, count 0 2006.229.09:52:14.60#ibcon#about to read 5, iclass 15, count 0 2006.229.09:52:14.60#ibcon#read 5, iclass 15, count 0 2006.229.09:52:14.60#ibcon#about to read 6, iclass 15, count 0 2006.229.09:52:14.60#ibcon#read 6, iclass 15, count 0 2006.229.09:52:14.60#ibcon#end of sib2, iclass 15, count 0 2006.229.09:52:14.60#ibcon#*after write, iclass 15, count 0 2006.229.09:52:14.60#ibcon#*before return 0, iclass 15, count 0 2006.229.09:52:14.60#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:14.60#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.09:52:14.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:52:14.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:52:14.60$vck44/vabw=wide 2006.229.09:52:14.60#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.09:52:14.60#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.09:52:14.60#ibcon#ireg 8 cls_cnt 0 2006.229.09:52:14.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:14.60#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:14.60#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:14.60#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:52:14.60#ibcon#first serial, iclass 17, count 0 2006.229.09:52:14.60#ibcon#enter sib2, iclass 17, count 0 2006.229.09:52:14.60#ibcon#flushed, iclass 17, count 0 2006.229.09:52:14.60#ibcon#about to write, iclass 17, count 0 2006.229.09:52:14.60#ibcon#wrote, iclass 17, count 0 2006.229.09:52:14.60#ibcon#about to read 3, iclass 17, count 0 2006.229.09:52:14.62#ibcon#read 3, iclass 17, count 0 2006.229.09:52:14.62#ibcon#about to read 4, iclass 17, count 0 2006.229.09:52:14.62#ibcon#read 4, iclass 17, count 0 2006.229.09:52:14.62#ibcon#about to read 5, iclass 17, count 0 2006.229.09:52:14.62#ibcon#read 5, iclass 17, count 0 2006.229.09:52:14.62#ibcon#about to read 6, iclass 17, count 0 2006.229.09:52:14.62#ibcon#read 6, iclass 17, count 0 2006.229.09:52:14.62#ibcon#end of sib2, iclass 17, count 0 2006.229.09:52:14.62#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:52:14.62#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:52:14.62#ibcon#[25=BW32\r\n] 2006.229.09:52:14.62#ibcon#*before write, iclass 17, count 0 2006.229.09:52:14.62#ibcon#enter sib2, iclass 17, count 0 2006.229.09:52:14.62#ibcon#flushed, iclass 17, count 0 2006.229.09:52:14.62#ibcon#about to write, iclass 17, count 0 2006.229.09:52:14.62#ibcon#wrote, iclass 17, count 0 2006.229.09:52:14.62#ibcon#about to read 3, iclass 17, count 0 2006.229.09:52:14.65#ibcon#read 3, iclass 17, count 0 2006.229.09:52:14.65#ibcon#about to read 4, iclass 17, count 0 2006.229.09:52:14.65#ibcon#read 4, iclass 17, count 0 2006.229.09:52:14.65#ibcon#about to read 5, iclass 17, count 0 2006.229.09:52:14.65#ibcon#read 5, iclass 17, count 0 2006.229.09:52:14.65#ibcon#about to read 6, iclass 17, count 0 2006.229.09:52:14.65#ibcon#read 6, iclass 17, count 0 2006.229.09:52:14.65#ibcon#end of sib2, iclass 17, count 0 2006.229.09:52:14.65#ibcon#*after write, iclass 17, count 0 2006.229.09:52:14.65#ibcon#*before return 0, iclass 17, count 0 2006.229.09:52:14.65#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:14.65#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.09:52:14.65#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:52:14.65#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:52:14.65$vck44/vbbw=wide 2006.229.09:52:14.65#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:52:14.65#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:52:14.65#ibcon#ireg 8 cls_cnt 0 2006.229.09:52:14.65#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:52:14.66#abcon#<5=/05 2.4 4.1 28.80 971001.0\r\n> 2006.229.09:52:14.68#abcon#{5=INTERFACE CLEAR} 2006.229.09:52:14.72#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:52:14.72#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:52:14.72#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:52:14.72#ibcon#first serial, iclass 20, count 0 2006.229.09:52:14.72#ibcon#enter sib2, iclass 20, count 0 2006.229.09:52:14.72#ibcon#flushed, iclass 20, count 0 2006.229.09:52:14.72#ibcon#about to write, iclass 20, count 0 2006.229.09:52:14.72#ibcon#wrote, iclass 20, count 0 2006.229.09:52:14.72#ibcon#about to read 3, iclass 20, count 0 2006.229.09:52:14.74#ibcon#read 3, iclass 20, count 0 2006.229.09:52:14.74#ibcon#about to read 4, iclass 20, count 0 2006.229.09:52:14.74#ibcon#read 4, iclass 20, count 0 2006.229.09:52:14.74#ibcon#about to read 5, iclass 20, count 0 2006.229.09:52:14.74#ibcon#read 5, iclass 20, count 0 2006.229.09:52:14.74#ibcon#about to read 6, iclass 20, count 0 2006.229.09:52:14.74#ibcon#read 6, iclass 20, count 0 2006.229.09:52:14.74#ibcon#end of sib2, iclass 20, count 0 2006.229.09:52:14.74#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:52:14.74#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:52:14.74#ibcon#[27=BW32\r\n] 2006.229.09:52:14.74#ibcon#*before write, iclass 20, count 0 2006.229.09:52:14.74#ibcon#enter sib2, iclass 20, count 0 2006.229.09:52:14.74#ibcon#flushed, iclass 20, count 0 2006.229.09:52:14.74#ibcon#about to write, iclass 20, count 0 2006.229.09:52:14.74#ibcon#wrote, iclass 20, count 0 2006.229.09:52:14.74#ibcon#about to read 3, iclass 20, count 0 2006.229.09:52:14.74#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:52:14.77#ibcon#read 3, iclass 20, count 0 2006.229.09:52:14.77#ibcon#about to read 4, iclass 20, count 0 2006.229.09:52:14.77#ibcon#read 4, iclass 20, count 0 2006.229.09:52:14.77#ibcon#about to read 5, iclass 20, count 0 2006.229.09:52:14.77#ibcon#read 5, iclass 20, count 0 2006.229.09:52:14.77#ibcon#about to read 6, iclass 20, count 0 2006.229.09:52:14.77#ibcon#read 6, iclass 20, count 0 2006.229.09:52:14.77#ibcon#end of sib2, iclass 20, count 0 2006.229.09:52:14.77#ibcon#*after write, iclass 20, count 0 2006.229.09:52:14.77#ibcon#*before return 0, iclass 20, count 0 2006.229.09:52:14.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:52:14.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:52:14.77#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:52:14.77#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:52:14.77$setupk4/ifdk4 2006.229.09:52:14.77$ifdk4/lo= 2006.229.09:52:14.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:52:14.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:52:14.77$ifdk4/patch= 2006.229.09:52:14.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:52:14.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:52:14.77$setupk4/!*+20s 2006.229.09:52:24.82#abcon#<5=/05 2.4 4.1 28.80 971001.0\r\n> 2006.229.09:52:24.85#abcon#{5=INTERFACE CLEAR} 2006.229.09:52:24.91#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:52:29.25$setupk4/"tpicd 2006.229.09:52:29.25$setupk4/echo=off 2006.229.09:52:29.25$setupk4/xlog=off 2006.229.09:52:29.25:!2006.229.09:54:32 2006.229.09:52:35.13#trakl#Source acquired 2006.229.09:52:35.14#flagr#flagr/antenna,acquired 2006.229.09:54:32.02:preob 2006.229.09:54:33.15/onsource/TRACKING 2006.229.09:54:33.15:!2006.229.09:54:42 2006.229.09:54:42.02:"tape 2006.229.09:54:42.02:"st=record 2006.229.09:54:42.02:data_valid=on 2006.229.09:54:42.02:midob 2006.229.09:54:43.15/onsource/TRACKING 2006.229.09:54:43.15/wx/28.78,1001.0,97 2006.229.09:54:43.22/cable/+6.4017E-03 2006.229.09:54:44.31/va/01,08,usb,yes,29,32 2006.229.09:54:44.31/va/02,07,usb,yes,32,33 2006.229.09:54:44.31/va/03,06,usb,yes,40,42 2006.229.09:54:44.31/va/04,07,usb,yes,33,35 2006.229.09:54:44.31/va/05,04,usb,yes,29,30 2006.229.09:54:44.31/va/06,04,usb,yes,33,33 2006.229.09:54:44.31/va/07,05,usb,yes,29,30 2006.229.09:54:44.31/va/08,06,usb,yes,21,26 2006.229.09:54:44.54/valo/01,524.99,yes,locked 2006.229.09:54:44.54/valo/02,534.99,yes,locked 2006.229.09:54:44.54/valo/03,564.99,yes,locked 2006.229.09:54:44.54/valo/04,624.99,yes,locked 2006.229.09:54:44.54/valo/05,734.99,yes,locked 2006.229.09:54:44.54/valo/06,814.99,yes,locked 2006.229.09:54:44.54/valo/07,864.99,yes,locked 2006.229.09:54:44.54/valo/08,884.99,yes,locked 2006.229.09:54:45.63/vb/01,04,usb,yes,31,29 2006.229.09:54:45.63/vb/02,04,usb,yes,33,33 2006.229.09:54:45.63/vb/03,04,usb,yes,30,33 2006.229.09:54:45.63/vb/04,04,usb,yes,35,34 2006.229.09:54:45.63/vb/05,04,usb,yes,27,29 2006.229.09:54:45.63/vb/06,04,usb,yes,31,28 2006.229.09:54:45.63/vb/07,04,usb,yes,31,31 2006.229.09:54:45.63/vb/08,04,usb,yes,29,32 2006.229.09:54:45.87/vblo/01,629.99,yes,locked 2006.229.09:54:45.87/vblo/02,634.99,yes,locked 2006.229.09:54:45.87/vblo/03,649.99,yes,locked 2006.229.09:54:45.87/vblo/04,679.99,yes,locked 2006.229.09:54:45.87/vblo/05,709.99,yes,locked 2006.229.09:54:45.87/vblo/06,719.99,yes,locked 2006.229.09:54:45.87/vblo/07,734.99,yes,locked 2006.229.09:54:45.87/vblo/08,744.99,yes,locked 2006.229.09:54:46.02/vabw/8 2006.229.09:54:46.17/vbbw/8 2006.229.09:54:46.37/xfe/off,on,12.2 2006.229.09:54:46.75/ifatt/23,28,28,28 2006.229.09:54:47.07/fmout-gps/S +4.62E-07 2006.229.09:54:47.12:!2006.229.09:55:22 2006.229.09:55:22.02:data_valid=off 2006.229.09:55:22.02:"et 2006.229.09:55:22.02:!+3s 2006.229.09:55:25.05:"tape 2006.229.09:55:25.06:postob 2006.229.09:55:25.29/cable/+6.4002E-03 2006.229.09:55:25.30/wx/28.78,1001.1,97 2006.229.09:55:25.35/fmout-gps/S +4.62E-07 2006.229.09:55:25.36:scan_name=229-0957,jd0608,130 2006.229.09:55:25.36:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.09:55:26.14#flagr#flagr/antenna,new-source 2006.229.09:55:26.14:checkk5 2006.229.09:55:26.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:55:26.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:55:27.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:55:27.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:55:28.10/chk_obsdata//k5ts1/T2290954??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:55:28.50/chk_obsdata//k5ts2/T2290954??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:55:28.89/chk_obsdata//k5ts3/T2290954??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:55:29.31/chk_obsdata//k5ts4/T2290954??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.09:55:30.03/k5log//k5ts1_log_newline 2006.229.09:55:30.76/k5log//k5ts2_log_newline 2006.229.09:55:31.49/k5log//k5ts3_log_newline 2006.229.09:55:32.21/k5log//k5ts4_log_newline 2006.229.09:55:32.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:55:32.23:setupk4=1 2006.229.09:55:32.23$setupk4/echo=on 2006.229.09:55:32.23$setupk4/pcalon 2006.229.09:55:32.23$pcalon/"no phase cal control is implemented here 2006.229.09:55:32.23$setupk4/"tpicd=stop 2006.229.09:55:32.23$setupk4/"rec=synch_on 2006.229.09:55:32.23$setupk4/"rec_mode=128 2006.229.09:55:32.23$setupk4/!* 2006.229.09:55:32.23$setupk4/recpk4 2006.229.09:55:32.23$recpk4/recpatch= 2006.229.09:55:32.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:55:32.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:55:32.24$setupk4/vck44 2006.229.09:55:32.24$vck44/valo=1,524.99 2006.229.09:55:32.24#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.09:55:32.24#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.09:55:32.24#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:32.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:32.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:32.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:32.24#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:55:32.24#ibcon#first serial, iclass 32, count 0 2006.229.09:55:32.24#ibcon#enter sib2, iclass 32, count 0 2006.229.09:55:32.24#ibcon#flushed, iclass 32, count 0 2006.229.09:55:32.24#ibcon#about to write, iclass 32, count 0 2006.229.09:55:32.24#ibcon#wrote, iclass 32, count 0 2006.229.09:55:32.24#ibcon#about to read 3, iclass 32, count 0 2006.229.09:55:32.25#ibcon#read 3, iclass 32, count 0 2006.229.09:55:32.25#ibcon#about to read 4, iclass 32, count 0 2006.229.09:55:32.25#ibcon#read 4, iclass 32, count 0 2006.229.09:55:32.25#ibcon#about to read 5, iclass 32, count 0 2006.229.09:55:32.25#ibcon#read 5, iclass 32, count 0 2006.229.09:55:32.25#ibcon#about to read 6, iclass 32, count 0 2006.229.09:55:32.25#ibcon#read 6, iclass 32, count 0 2006.229.09:55:32.25#ibcon#end of sib2, iclass 32, count 0 2006.229.09:55:32.25#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:55:32.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:55:32.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:55:32.25#ibcon#*before write, iclass 32, count 0 2006.229.09:55:32.25#ibcon#enter sib2, iclass 32, count 0 2006.229.09:55:32.25#ibcon#flushed, iclass 32, count 0 2006.229.09:55:32.25#ibcon#about to write, iclass 32, count 0 2006.229.09:55:32.25#ibcon#wrote, iclass 32, count 0 2006.229.09:55:32.25#ibcon#about to read 3, iclass 32, count 0 2006.229.09:55:32.30#ibcon#read 3, iclass 32, count 0 2006.229.09:55:32.30#ibcon#about to read 4, iclass 32, count 0 2006.229.09:55:32.30#ibcon#read 4, iclass 32, count 0 2006.229.09:55:32.30#ibcon#about to read 5, iclass 32, count 0 2006.229.09:55:32.30#ibcon#read 5, iclass 32, count 0 2006.229.09:55:32.30#ibcon#about to read 6, iclass 32, count 0 2006.229.09:55:32.30#ibcon#read 6, iclass 32, count 0 2006.229.09:55:32.30#ibcon#end of sib2, iclass 32, count 0 2006.229.09:55:32.30#ibcon#*after write, iclass 32, count 0 2006.229.09:55:32.30#ibcon#*before return 0, iclass 32, count 0 2006.229.09:55:32.30#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:32.30#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:32.30#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:55:32.30#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:55:32.30$vck44/va=1,8 2006.229.09:55:32.30#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.09:55:32.30#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.09:55:32.30#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:32.30#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:32.30#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:32.30#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:32.30#ibcon#enter wrdev, iclass 34, count 2 2006.229.09:55:32.30#ibcon#first serial, iclass 34, count 2 2006.229.09:55:32.30#ibcon#enter sib2, iclass 34, count 2 2006.229.09:55:32.30#ibcon#flushed, iclass 34, count 2 2006.229.09:55:32.30#ibcon#about to write, iclass 34, count 2 2006.229.09:55:32.31#ibcon#wrote, iclass 34, count 2 2006.229.09:55:32.31#ibcon#about to read 3, iclass 34, count 2 2006.229.09:55:32.32#ibcon#read 3, iclass 34, count 2 2006.229.09:55:32.32#ibcon#about to read 4, iclass 34, count 2 2006.229.09:55:32.32#ibcon#read 4, iclass 34, count 2 2006.229.09:55:32.32#ibcon#about to read 5, iclass 34, count 2 2006.229.09:55:32.32#ibcon#read 5, iclass 34, count 2 2006.229.09:55:32.32#ibcon#about to read 6, iclass 34, count 2 2006.229.09:55:32.32#ibcon#read 6, iclass 34, count 2 2006.229.09:55:32.32#ibcon#end of sib2, iclass 34, count 2 2006.229.09:55:32.32#ibcon#*mode == 0, iclass 34, count 2 2006.229.09:55:32.32#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.09:55:32.32#ibcon#[25=AT01-08\r\n] 2006.229.09:55:32.32#ibcon#*before write, iclass 34, count 2 2006.229.09:55:32.32#ibcon#enter sib2, iclass 34, count 2 2006.229.09:55:32.32#ibcon#flushed, iclass 34, count 2 2006.229.09:55:32.32#ibcon#about to write, iclass 34, count 2 2006.229.09:55:32.32#ibcon#wrote, iclass 34, count 2 2006.229.09:55:32.32#ibcon#about to read 3, iclass 34, count 2 2006.229.09:55:32.35#ibcon#read 3, iclass 34, count 2 2006.229.09:55:32.35#ibcon#about to read 4, iclass 34, count 2 2006.229.09:55:32.35#ibcon#read 4, iclass 34, count 2 2006.229.09:55:32.35#ibcon#about to read 5, iclass 34, count 2 2006.229.09:55:32.35#ibcon#read 5, iclass 34, count 2 2006.229.09:55:32.35#ibcon#about to read 6, iclass 34, count 2 2006.229.09:55:32.35#ibcon#read 6, iclass 34, count 2 2006.229.09:55:32.35#ibcon#end of sib2, iclass 34, count 2 2006.229.09:55:32.35#ibcon#*after write, iclass 34, count 2 2006.229.09:55:32.35#ibcon#*before return 0, iclass 34, count 2 2006.229.09:55:32.35#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:32.35#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:32.35#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.09:55:32.35#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:32.35#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:32.47#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:32.47#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:32.47#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:55:32.47#ibcon#first serial, iclass 34, count 0 2006.229.09:55:32.47#ibcon#enter sib2, iclass 34, count 0 2006.229.09:55:32.47#ibcon#flushed, iclass 34, count 0 2006.229.09:55:32.47#ibcon#about to write, iclass 34, count 0 2006.229.09:55:32.47#ibcon#wrote, iclass 34, count 0 2006.229.09:55:32.47#ibcon#about to read 3, iclass 34, count 0 2006.229.09:55:32.49#ibcon#read 3, iclass 34, count 0 2006.229.09:55:32.49#ibcon#about to read 4, iclass 34, count 0 2006.229.09:55:32.49#ibcon#read 4, iclass 34, count 0 2006.229.09:55:32.49#ibcon#about to read 5, iclass 34, count 0 2006.229.09:55:32.49#ibcon#read 5, iclass 34, count 0 2006.229.09:55:32.49#ibcon#about to read 6, iclass 34, count 0 2006.229.09:55:32.49#ibcon#read 6, iclass 34, count 0 2006.229.09:55:32.49#ibcon#end of sib2, iclass 34, count 0 2006.229.09:55:32.49#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:55:32.49#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:55:32.49#ibcon#[25=USB\r\n] 2006.229.09:55:32.49#ibcon#*before write, iclass 34, count 0 2006.229.09:55:32.49#ibcon#enter sib2, iclass 34, count 0 2006.229.09:55:32.49#ibcon#flushed, iclass 34, count 0 2006.229.09:55:32.49#ibcon#about to write, iclass 34, count 0 2006.229.09:55:32.49#ibcon#wrote, iclass 34, count 0 2006.229.09:55:32.49#ibcon#about to read 3, iclass 34, count 0 2006.229.09:55:32.52#ibcon#read 3, iclass 34, count 0 2006.229.09:55:32.52#ibcon#about to read 4, iclass 34, count 0 2006.229.09:55:32.52#ibcon#read 4, iclass 34, count 0 2006.229.09:55:32.52#ibcon#about to read 5, iclass 34, count 0 2006.229.09:55:32.52#ibcon#read 5, iclass 34, count 0 2006.229.09:55:32.52#ibcon#about to read 6, iclass 34, count 0 2006.229.09:55:32.52#ibcon#read 6, iclass 34, count 0 2006.229.09:55:32.52#ibcon#end of sib2, iclass 34, count 0 2006.229.09:55:32.52#ibcon#*after write, iclass 34, count 0 2006.229.09:55:32.52#ibcon#*before return 0, iclass 34, count 0 2006.229.09:55:32.52#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:32.52#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:32.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:55:32.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:55:32.52$vck44/valo=2,534.99 2006.229.09:55:32.52#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.09:55:32.52#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.09:55:32.52#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:32.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:32.52#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:32.52#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:32.52#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:55:32.52#ibcon#first serial, iclass 36, count 0 2006.229.09:55:32.52#ibcon#enter sib2, iclass 36, count 0 2006.229.09:55:32.52#ibcon#flushed, iclass 36, count 0 2006.229.09:55:32.52#ibcon#about to write, iclass 36, count 0 2006.229.09:55:32.52#ibcon#wrote, iclass 36, count 0 2006.229.09:55:32.53#ibcon#about to read 3, iclass 36, count 0 2006.229.09:55:32.54#ibcon#read 3, iclass 36, count 0 2006.229.09:55:32.54#ibcon#about to read 4, iclass 36, count 0 2006.229.09:55:32.54#ibcon#read 4, iclass 36, count 0 2006.229.09:55:32.54#ibcon#about to read 5, iclass 36, count 0 2006.229.09:55:32.54#ibcon#read 5, iclass 36, count 0 2006.229.09:55:32.54#ibcon#about to read 6, iclass 36, count 0 2006.229.09:55:32.54#ibcon#read 6, iclass 36, count 0 2006.229.09:55:32.54#ibcon#end of sib2, iclass 36, count 0 2006.229.09:55:32.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:55:32.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:55:32.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:55:32.54#ibcon#*before write, iclass 36, count 0 2006.229.09:55:32.54#ibcon#enter sib2, iclass 36, count 0 2006.229.09:55:32.54#ibcon#flushed, iclass 36, count 0 2006.229.09:55:32.54#ibcon#about to write, iclass 36, count 0 2006.229.09:55:32.54#ibcon#wrote, iclass 36, count 0 2006.229.09:55:32.54#ibcon#about to read 3, iclass 36, count 0 2006.229.09:55:32.58#ibcon#read 3, iclass 36, count 0 2006.229.09:55:32.58#ibcon#about to read 4, iclass 36, count 0 2006.229.09:55:32.58#ibcon#read 4, iclass 36, count 0 2006.229.09:55:32.58#ibcon#about to read 5, iclass 36, count 0 2006.229.09:55:32.58#ibcon#read 5, iclass 36, count 0 2006.229.09:55:32.58#ibcon#about to read 6, iclass 36, count 0 2006.229.09:55:32.58#ibcon#read 6, iclass 36, count 0 2006.229.09:55:32.58#ibcon#end of sib2, iclass 36, count 0 2006.229.09:55:32.58#ibcon#*after write, iclass 36, count 0 2006.229.09:55:32.58#ibcon#*before return 0, iclass 36, count 0 2006.229.09:55:32.58#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:32.58#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:32.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:55:32.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:55:32.58$vck44/va=2,7 2006.229.09:55:32.58#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.09:55:32.58#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.09:55:32.58#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:32.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:32.64#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:32.64#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:32.64#ibcon#enter wrdev, iclass 38, count 2 2006.229.09:55:32.64#ibcon#first serial, iclass 38, count 2 2006.229.09:55:32.64#ibcon#enter sib2, iclass 38, count 2 2006.229.09:55:32.64#ibcon#flushed, iclass 38, count 2 2006.229.09:55:32.64#ibcon#about to write, iclass 38, count 2 2006.229.09:55:32.64#ibcon#wrote, iclass 38, count 2 2006.229.09:55:32.64#ibcon#about to read 3, iclass 38, count 2 2006.229.09:55:32.66#ibcon#read 3, iclass 38, count 2 2006.229.09:55:32.66#ibcon#about to read 4, iclass 38, count 2 2006.229.09:55:32.66#ibcon#read 4, iclass 38, count 2 2006.229.09:55:32.66#ibcon#about to read 5, iclass 38, count 2 2006.229.09:55:32.66#ibcon#read 5, iclass 38, count 2 2006.229.09:55:32.66#ibcon#about to read 6, iclass 38, count 2 2006.229.09:55:32.66#ibcon#read 6, iclass 38, count 2 2006.229.09:55:32.66#ibcon#end of sib2, iclass 38, count 2 2006.229.09:55:32.66#ibcon#*mode == 0, iclass 38, count 2 2006.229.09:55:32.66#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.09:55:32.66#ibcon#[25=AT02-07\r\n] 2006.229.09:55:32.66#ibcon#*before write, iclass 38, count 2 2006.229.09:55:32.66#ibcon#enter sib2, iclass 38, count 2 2006.229.09:55:32.66#ibcon#flushed, iclass 38, count 2 2006.229.09:55:32.66#ibcon#about to write, iclass 38, count 2 2006.229.09:55:32.66#ibcon#wrote, iclass 38, count 2 2006.229.09:55:32.66#ibcon#about to read 3, iclass 38, count 2 2006.229.09:55:32.69#ibcon#read 3, iclass 38, count 2 2006.229.09:55:32.69#ibcon#about to read 4, iclass 38, count 2 2006.229.09:55:32.69#ibcon#read 4, iclass 38, count 2 2006.229.09:55:32.69#ibcon#about to read 5, iclass 38, count 2 2006.229.09:55:32.69#ibcon#read 5, iclass 38, count 2 2006.229.09:55:32.69#ibcon#about to read 6, iclass 38, count 2 2006.229.09:55:32.69#ibcon#read 6, iclass 38, count 2 2006.229.09:55:32.69#ibcon#end of sib2, iclass 38, count 2 2006.229.09:55:32.69#ibcon#*after write, iclass 38, count 2 2006.229.09:55:32.69#ibcon#*before return 0, iclass 38, count 2 2006.229.09:55:32.69#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:32.69#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:32.69#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.09:55:32.69#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:32.69#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:32.81#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:32.81#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:32.81#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:55:32.81#ibcon#first serial, iclass 38, count 0 2006.229.09:55:32.81#ibcon#enter sib2, iclass 38, count 0 2006.229.09:55:32.81#ibcon#flushed, iclass 38, count 0 2006.229.09:55:32.81#ibcon#about to write, iclass 38, count 0 2006.229.09:55:32.81#ibcon#wrote, iclass 38, count 0 2006.229.09:55:32.81#ibcon#about to read 3, iclass 38, count 0 2006.229.09:55:32.83#ibcon#read 3, iclass 38, count 0 2006.229.09:55:32.83#ibcon#about to read 4, iclass 38, count 0 2006.229.09:55:32.83#ibcon#read 4, iclass 38, count 0 2006.229.09:55:32.83#ibcon#about to read 5, iclass 38, count 0 2006.229.09:55:32.83#ibcon#read 5, iclass 38, count 0 2006.229.09:55:32.83#ibcon#about to read 6, iclass 38, count 0 2006.229.09:55:32.83#ibcon#read 6, iclass 38, count 0 2006.229.09:55:32.83#ibcon#end of sib2, iclass 38, count 0 2006.229.09:55:32.83#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:55:32.83#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:55:32.83#ibcon#[25=USB\r\n] 2006.229.09:55:32.83#ibcon#*before write, iclass 38, count 0 2006.229.09:55:32.83#ibcon#enter sib2, iclass 38, count 0 2006.229.09:55:32.83#ibcon#flushed, iclass 38, count 0 2006.229.09:55:32.83#ibcon#about to write, iclass 38, count 0 2006.229.09:55:32.83#ibcon#wrote, iclass 38, count 0 2006.229.09:55:32.83#ibcon#about to read 3, iclass 38, count 0 2006.229.09:55:32.86#ibcon#read 3, iclass 38, count 0 2006.229.09:55:32.86#ibcon#about to read 4, iclass 38, count 0 2006.229.09:55:32.86#ibcon#read 4, iclass 38, count 0 2006.229.09:55:32.86#ibcon#about to read 5, iclass 38, count 0 2006.229.09:55:32.86#ibcon#read 5, iclass 38, count 0 2006.229.09:55:32.86#ibcon#about to read 6, iclass 38, count 0 2006.229.09:55:32.86#ibcon#read 6, iclass 38, count 0 2006.229.09:55:32.86#ibcon#end of sib2, iclass 38, count 0 2006.229.09:55:32.86#ibcon#*after write, iclass 38, count 0 2006.229.09:55:32.86#ibcon#*before return 0, iclass 38, count 0 2006.229.09:55:32.86#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:32.86#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:32.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:55:32.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:55:32.86$vck44/valo=3,564.99 2006.229.09:55:32.86#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:55:32.86#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:55:32.86#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:32.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:32.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:32.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:32.86#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:55:32.86#ibcon#first serial, iclass 40, count 0 2006.229.09:55:32.86#ibcon#enter sib2, iclass 40, count 0 2006.229.09:55:32.86#ibcon#flushed, iclass 40, count 0 2006.229.09:55:32.86#ibcon#about to write, iclass 40, count 0 2006.229.09:55:32.86#ibcon#wrote, iclass 40, count 0 2006.229.09:55:32.86#ibcon#about to read 3, iclass 40, count 0 2006.229.09:55:32.88#ibcon#read 3, iclass 40, count 0 2006.229.09:55:32.88#ibcon#about to read 4, iclass 40, count 0 2006.229.09:55:32.88#ibcon#read 4, iclass 40, count 0 2006.229.09:55:32.88#ibcon#about to read 5, iclass 40, count 0 2006.229.09:55:32.88#ibcon#read 5, iclass 40, count 0 2006.229.09:55:32.88#ibcon#about to read 6, iclass 40, count 0 2006.229.09:55:32.88#ibcon#read 6, iclass 40, count 0 2006.229.09:55:32.88#ibcon#end of sib2, iclass 40, count 0 2006.229.09:55:32.88#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:55:32.88#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:55:32.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:55:32.88#ibcon#*before write, iclass 40, count 0 2006.229.09:55:32.88#ibcon#enter sib2, iclass 40, count 0 2006.229.09:55:32.88#ibcon#flushed, iclass 40, count 0 2006.229.09:55:32.88#ibcon#about to write, iclass 40, count 0 2006.229.09:55:32.88#ibcon#wrote, iclass 40, count 0 2006.229.09:55:32.88#ibcon#about to read 3, iclass 40, count 0 2006.229.09:55:32.92#ibcon#read 3, iclass 40, count 0 2006.229.09:55:32.92#ibcon#about to read 4, iclass 40, count 0 2006.229.09:55:32.92#ibcon#read 4, iclass 40, count 0 2006.229.09:55:32.92#ibcon#about to read 5, iclass 40, count 0 2006.229.09:55:32.92#ibcon#read 5, iclass 40, count 0 2006.229.09:55:32.92#ibcon#about to read 6, iclass 40, count 0 2006.229.09:55:32.92#ibcon#read 6, iclass 40, count 0 2006.229.09:55:32.92#ibcon#end of sib2, iclass 40, count 0 2006.229.09:55:32.92#ibcon#*after write, iclass 40, count 0 2006.229.09:55:32.92#ibcon#*before return 0, iclass 40, count 0 2006.229.09:55:32.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:32.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:32.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:55:32.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:55:32.92$vck44/va=3,6 2006.229.09:55:32.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.09:55:32.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.09:55:32.92#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:32.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:32.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:32.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:32.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.09:55:32.98#ibcon#first serial, iclass 4, count 2 2006.229.09:55:32.98#ibcon#enter sib2, iclass 4, count 2 2006.229.09:55:32.98#ibcon#flushed, iclass 4, count 2 2006.229.09:55:32.98#ibcon#about to write, iclass 4, count 2 2006.229.09:55:32.98#ibcon#wrote, iclass 4, count 2 2006.229.09:55:32.98#ibcon#about to read 3, iclass 4, count 2 2006.229.09:55:33.00#ibcon#read 3, iclass 4, count 2 2006.229.09:55:33.00#ibcon#about to read 4, iclass 4, count 2 2006.229.09:55:33.00#ibcon#read 4, iclass 4, count 2 2006.229.09:55:33.00#ibcon#about to read 5, iclass 4, count 2 2006.229.09:55:33.00#ibcon#read 5, iclass 4, count 2 2006.229.09:55:33.00#ibcon#about to read 6, iclass 4, count 2 2006.229.09:55:33.00#ibcon#read 6, iclass 4, count 2 2006.229.09:55:33.00#ibcon#end of sib2, iclass 4, count 2 2006.229.09:55:33.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.09:55:33.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.09:55:33.00#ibcon#[25=AT03-06\r\n] 2006.229.09:55:33.00#ibcon#*before write, iclass 4, count 2 2006.229.09:55:33.00#ibcon#enter sib2, iclass 4, count 2 2006.229.09:55:33.00#ibcon#flushed, iclass 4, count 2 2006.229.09:55:33.00#ibcon#about to write, iclass 4, count 2 2006.229.09:55:33.00#ibcon#wrote, iclass 4, count 2 2006.229.09:55:33.00#ibcon#about to read 3, iclass 4, count 2 2006.229.09:55:33.03#ibcon#read 3, iclass 4, count 2 2006.229.09:55:33.03#ibcon#about to read 4, iclass 4, count 2 2006.229.09:55:33.03#ibcon#read 4, iclass 4, count 2 2006.229.09:55:33.03#ibcon#about to read 5, iclass 4, count 2 2006.229.09:55:33.03#ibcon#read 5, iclass 4, count 2 2006.229.09:55:33.03#ibcon#about to read 6, iclass 4, count 2 2006.229.09:55:33.03#ibcon#read 6, iclass 4, count 2 2006.229.09:55:33.03#ibcon#end of sib2, iclass 4, count 2 2006.229.09:55:33.03#ibcon#*after write, iclass 4, count 2 2006.229.09:55:33.03#ibcon#*before return 0, iclass 4, count 2 2006.229.09:55:33.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:33.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:33.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.09:55:33.03#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:33.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:33.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:33.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:33.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:55:33.15#ibcon#first serial, iclass 4, count 0 2006.229.09:55:33.15#ibcon#enter sib2, iclass 4, count 0 2006.229.09:55:33.15#ibcon#flushed, iclass 4, count 0 2006.229.09:55:33.15#ibcon#about to write, iclass 4, count 0 2006.229.09:55:33.15#ibcon#wrote, iclass 4, count 0 2006.229.09:55:33.15#ibcon#about to read 3, iclass 4, count 0 2006.229.09:55:33.17#ibcon#read 3, iclass 4, count 0 2006.229.09:55:33.17#ibcon#about to read 4, iclass 4, count 0 2006.229.09:55:33.17#ibcon#read 4, iclass 4, count 0 2006.229.09:55:33.17#ibcon#about to read 5, iclass 4, count 0 2006.229.09:55:33.17#ibcon#read 5, iclass 4, count 0 2006.229.09:55:33.17#ibcon#about to read 6, iclass 4, count 0 2006.229.09:55:33.17#ibcon#read 6, iclass 4, count 0 2006.229.09:55:33.17#ibcon#end of sib2, iclass 4, count 0 2006.229.09:55:33.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:55:33.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:55:33.17#ibcon#[25=USB\r\n] 2006.229.09:55:33.17#ibcon#*before write, iclass 4, count 0 2006.229.09:55:33.17#ibcon#enter sib2, iclass 4, count 0 2006.229.09:55:33.17#ibcon#flushed, iclass 4, count 0 2006.229.09:55:33.17#ibcon#about to write, iclass 4, count 0 2006.229.09:55:33.17#ibcon#wrote, iclass 4, count 0 2006.229.09:55:33.17#ibcon#about to read 3, iclass 4, count 0 2006.229.09:55:33.20#ibcon#read 3, iclass 4, count 0 2006.229.09:55:33.20#ibcon#about to read 4, iclass 4, count 0 2006.229.09:55:33.20#ibcon#read 4, iclass 4, count 0 2006.229.09:55:33.20#ibcon#about to read 5, iclass 4, count 0 2006.229.09:55:33.20#ibcon#read 5, iclass 4, count 0 2006.229.09:55:33.20#ibcon#about to read 6, iclass 4, count 0 2006.229.09:55:33.20#ibcon#read 6, iclass 4, count 0 2006.229.09:55:33.20#ibcon#end of sib2, iclass 4, count 0 2006.229.09:55:33.20#ibcon#*after write, iclass 4, count 0 2006.229.09:55:33.20#ibcon#*before return 0, iclass 4, count 0 2006.229.09:55:33.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:33.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:33.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:55:33.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:55:33.20$vck44/valo=4,624.99 2006.229.09:55:33.20#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.09:55:33.20#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.09:55:33.20#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:33.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:33.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:33.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:33.20#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:55:33.20#ibcon#first serial, iclass 6, count 0 2006.229.09:55:33.20#ibcon#enter sib2, iclass 6, count 0 2006.229.09:55:33.20#ibcon#flushed, iclass 6, count 0 2006.229.09:55:33.20#ibcon#about to write, iclass 6, count 0 2006.229.09:55:33.21#ibcon#wrote, iclass 6, count 0 2006.229.09:55:33.21#ibcon#about to read 3, iclass 6, count 0 2006.229.09:55:33.22#ibcon#read 3, iclass 6, count 0 2006.229.09:55:33.22#ibcon#about to read 4, iclass 6, count 0 2006.229.09:55:33.22#ibcon#read 4, iclass 6, count 0 2006.229.09:55:33.22#ibcon#about to read 5, iclass 6, count 0 2006.229.09:55:33.22#ibcon#read 5, iclass 6, count 0 2006.229.09:55:33.22#ibcon#about to read 6, iclass 6, count 0 2006.229.09:55:33.22#ibcon#read 6, iclass 6, count 0 2006.229.09:55:33.22#ibcon#end of sib2, iclass 6, count 0 2006.229.09:55:33.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:55:33.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:55:33.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:55:33.22#ibcon#*before write, iclass 6, count 0 2006.229.09:55:33.22#ibcon#enter sib2, iclass 6, count 0 2006.229.09:55:33.22#ibcon#flushed, iclass 6, count 0 2006.229.09:55:33.22#ibcon#about to write, iclass 6, count 0 2006.229.09:55:33.22#ibcon#wrote, iclass 6, count 0 2006.229.09:55:33.22#ibcon#about to read 3, iclass 6, count 0 2006.229.09:55:33.26#ibcon#read 3, iclass 6, count 0 2006.229.09:55:33.26#ibcon#about to read 4, iclass 6, count 0 2006.229.09:55:33.26#ibcon#read 4, iclass 6, count 0 2006.229.09:55:33.26#ibcon#about to read 5, iclass 6, count 0 2006.229.09:55:33.26#ibcon#read 5, iclass 6, count 0 2006.229.09:55:33.26#ibcon#about to read 6, iclass 6, count 0 2006.229.09:55:33.26#ibcon#read 6, iclass 6, count 0 2006.229.09:55:33.26#ibcon#end of sib2, iclass 6, count 0 2006.229.09:55:33.26#ibcon#*after write, iclass 6, count 0 2006.229.09:55:33.26#ibcon#*before return 0, iclass 6, count 0 2006.229.09:55:33.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:33.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:33.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:55:33.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:55:33.26$vck44/va=4,7 2006.229.09:55:33.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.09:55:33.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.09:55:33.26#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:33.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:33.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:33.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:33.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.09:55:33.32#ibcon#first serial, iclass 10, count 2 2006.229.09:55:33.32#ibcon#enter sib2, iclass 10, count 2 2006.229.09:55:33.32#ibcon#flushed, iclass 10, count 2 2006.229.09:55:33.32#ibcon#about to write, iclass 10, count 2 2006.229.09:55:33.32#ibcon#wrote, iclass 10, count 2 2006.229.09:55:33.32#ibcon#about to read 3, iclass 10, count 2 2006.229.09:55:33.34#ibcon#read 3, iclass 10, count 2 2006.229.09:55:33.34#ibcon#about to read 4, iclass 10, count 2 2006.229.09:55:33.34#ibcon#read 4, iclass 10, count 2 2006.229.09:55:33.34#ibcon#about to read 5, iclass 10, count 2 2006.229.09:55:33.34#ibcon#read 5, iclass 10, count 2 2006.229.09:55:33.34#ibcon#about to read 6, iclass 10, count 2 2006.229.09:55:33.34#ibcon#read 6, iclass 10, count 2 2006.229.09:55:33.34#ibcon#end of sib2, iclass 10, count 2 2006.229.09:55:33.34#ibcon#*mode == 0, iclass 10, count 2 2006.229.09:55:33.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.09:55:33.34#ibcon#[25=AT04-07\r\n] 2006.229.09:55:33.34#ibcon#*before write, iclass 10, count 2 2006.229.09:55:33.34#ibcon#enter sib2, iclass 10, count 2 2006.229.09:55:33.34#ibcon#flushed, iclass 10, count 2 2006.229.09:55:33.34#ibcon#about to write, iclass 10, count 2 2006.229.09:55:33.34#ibcon#wrote, iclass 10, count 2 2006.229.09:55:33.34#ibcon#about to read 3, iclass 10, count 2 2006.229.09:55:33.37#ibcon#read 3, iclass 10, count 2 2006.229.09:55:33.37#ibcon#about to read 4, iclass 10, count 2 2006.229.09:55:33.37#ibcon#read 4, iclass 10, count 2 2006.229.09:55:33.37#ibcon#about to read 5, iclass 10, count 2 2006.229.09:55:33.37#ibcon#read 5, iclass 10, count 2 2006.229.09:55:33.37#ibcon#about to read 6, iclass 10, count 2 2006.229.09:55:33.37#ibcon#read 6, iclass 10, count 2 2006.229.09:55:33.37#ibcon#end of sib2, iclass 10, count 2 2006.229.09:55:33.37#ibcon#*after write, iclass 10, count 2 2006.229.09:55:33.37#ibcon#*before return 0, iclass 10, count 2 2006.229.09:55:33.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:33.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:33.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.09:55:33.37#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:33.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:33.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:33.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:33.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:55:33.49#ibcon#first serial, iclass 10, count 0 2006.229.09:55:33.49#ibcon#enter sib2, iclass 10, count 0 2006.229.09:55:33.49#ibcon#flushed, iclass 10, count 0 2006.229.09:55:33.49#ibcon#about to write, iclass 10, count 0 2006.229.09:55:33.49#ibcon#wrote, iclass 10, count 0 2006.229.09:55:33.49#ibcon#about to read 3, iclass 10, count 0 2006.229.09:55:33.51#ibcon#read 3, iclass 10, count 0 2006.229.09:55:33.51#ibcon#about to read 4, iclass 10, count 0 2006.229.09:55:33.51#ibcon#read 4, iclass 10, count 0 2006.229.09:55:33.51#ibcon#about to read 5, iclass 10, count 0 2006.229.09:55:33.51#ibcon#read 5, iclass 10, count 0 2006.229.09:55:33.51#ibcon#about to read 6, iclass 10, count 0 2006.229.09:55:33.51#ibcon#read 6, iclass 10, count 0 2006.229.09:55:33.51#ibcon#end of sib2, iclass 10, count 0 2006.229.09:55:33.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:55:33.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:55:33.51#ibcon#[25=USB\r\n] 2006.229.09:55:33.51#ibcon#*before write, iclass 10, count 0 2006.229.09:55:33.51#ibcon#enter sib2, iclass 10, count 0 2006.229.09:55:33.51#ibcon#flushed, iclass 10, count 0 2006.229.09:55:33.51#ibcon#about to write, iclass 10, count 0 2006.229.09:55:33.51#ibcon#wrote, iclass 10, count 0 2006.229.09:55:33.51#ibcon#about to read 3, iclass 10, count 0 2006.229.09:55:33.54#ibcon#read 3, iclass 10, count 0 2006.229.09:55:33.54#ibcon#about to read 4, iclass 10, count 0 2006.229.09:55:33.54#ibcon#read 4, iclass 10, count 0 2006.229.09:55:33.54#ibcon#about to read 5, iclass 10, count 0 2006.229.09:55:33.54#ibcon#read 5, iclass 10, count 0 2006.229.09:55:33.54#ibcon#about to read 6, iclass 10, count 0 2006.229.09:55:33.54#ibcon#read 6, iclass 10, count 0 2006.229.09:55:33.54#ibcon#end of sib2, iclass 10, count 0 2006.229.09:55:33.54#ibcon#*after write, iclass 10, count 0 2006.229.09:55:33.54#ibcon#*before return 0, iclass 10, count 0 2006.229.09:55:33.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:33.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:33.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:55:33.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:55:33.54$vck44/valo=5,734.99 2006.229.09:55:33.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.09:55:33.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.09:55:33.54#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:33.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:33.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:33.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:33.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:55:33.54#ibcon#first serial, iclass 12, count 0 2006.229.09:55:33.54#ibcon#enter sib2, iclass 12, count 0 2006.229.09:55:33.54#ibcon#flushed, iclass 12, count 0 2006.229.09:55:33.54#ibcon#about to write, iclass 12, count 0 2006.229.09:55:33.55#ibcon#wrote, iclass 12, count 0 2006.229.09:55:33.55#ibcon#about to read 3, iclass 12, count 0 2006.229.09:55:33.56#ibcon#read 3, iclass 12, count 0 2006.229.09:55:33.56#ibcon#about to read 4, iclass 12, count 0 2006.229.09:55:33.56#ibcon#read 4, iclass 12, count 0 2006.229.09:55:33.56#ibcon#about to read 5, iclass 12, count 0 2006.229.09:55:33.56#ibcon#read 5, iclass 12, count 0 2006.229.09:55:33.56#ibcon#about to read 6, iclass 12, count 0 2006.229.09:55:33.56#ibcon#read 6, iclass 12, count 0 2006.229.09:55:33.56#ibcon#end of sib2, iclass 12, count 0 2006.229.09:55:33.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:55:33.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:55:33.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:55:33.56#ibcon#*before write, iclass 12, count 0 2006.229.09:55:33.56#ibcon#enter sib2, iclass 12, count 0 2006.229.09:55:33.56#ibcon#flushed, iclass 12, count 0 2006.229.09:55:33.56#ibcon#about to write, iclass 12, count 0 2006.229.09:55:33.56#ibcon#wrote, iclass 12, count 0 2006.229.09:55:33.56#ibcon#about to read 3, iclass 12, count 0 2006.229.09:55:33.60#ibcon#read 3, iclass 12, count 0 2006.229.09:55:33.60#ibcon#about to read 4, iclass 12, count 0 2006.229.09:55:33.60#ibcon#read 4, iclass 12, count 0 2006.229.09:55:33.60#ibcon#about to read 5, iclass 12, count 0 2006.229.09:55:33.60#ibcon#read 5, iclass 12, count 0 2006.229.09:55:33.60#ibcon#about to read 6, iclass 12, count 0 2006.229.09:55:33.60#ibcon#read 6, iclass 12, count 0 2006.229.09:55:33.60#ibcon#end of sib2, iclass 12, count 0 2006.229.09:55:33.60#ibcon#*after write, iclass 12, count 0 2006.229.09:55:33.60#ibcon#*before return 0, iclass 12, count 0 2006.229.09:55:33.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:33.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:33.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:55:33.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:55:33.60$vck44/va=5,4 2006.229.09:55:33.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:55:33.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:55:33.60#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:33.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:33.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:33.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:33.66#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:55:33.66#ibcon#first serial, iclass 14, count 2 2006.229.09:55:33.66#ibcon#enter sib2, iclass 14, count 2 2006.229.09:55:33.66#ibcon#flushed, iclass 14, count 2 2006.229.09:55:33.66#ibcon#about to write, iclass 14, count 2 2006.229.09:55:33.66#ibcon#wrote, iclass 14, count 2 2006.229.09:55:33.66#ibcon#about to read 3, iclass 14, count 2 2006.229.09:55:33.68#ibcon#read 3, iclass 14, count 2 2006.229.09:55:33.68#ibcon#about to read 4, iclass 14, count 2 2006.229.09:55:33.68#ibcon#read 4, iclass 14, count 2 2006.229.09:55:33.68#ibcon#about to read 5, iclass 14, count 2 2006.229.09:55:33.68#ibcon#read 5, iclass 14, count 2 2006.229.09:55:33.68#ibcon#about to read 6, iclass 14, count 2 2006.229.09:55:33.68#ibcon#read 6, iclass 14, count 2 2006.229.09:55:33.68#ibcon#end of sib2, iclass 14, count 2 2006.229.09:55:33.68#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:55:33.68#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:55:33.68#ibcon#[25=AT05-04\r\n] 2006.229.09:55:33.68#ibcon#*before write, iclass 14, count 2 2006.229.09:55:33.68#ibcon#enter sib2, iclass 14, count 2 2006.229.09:55:33.68#ibcon#flushed, iclass 14, count 2 2006.229.09:55:33.68#ibcon#about to write, iclass 14, count 2 2006.229.09:55:33.68#ibcon#wrote, iclass 14, count 2 2006.229.09:55:33.68#ibcon#about to read 3, iclass 14, count 2 2006.229.09:55:33.71#ibcon#read 3, iclass 14, count 2 2006.229.09:55:33.71#ibcon#about to read 4, iclass 14, count 2 2006.229.09:55:33.71#ibcon#read 4, iclass 14, count 2 2006.229.09:55:33.71#ibcon#about to read 5, iclass 14, count 2 2006.229.09:55:33.71#ibcon#read 5, iclass 14, count 2 2006.229.09:55:33.71#ibcon#about to read 6, iclass 14, count 2 2006.229.09:55:33.71#ibcon#read 6, iclass 14, count 2 2006.229.09:55:33.71#ibcon#end of sib2, iclass 14, count 2 2006.229.09:55:33.71#ibcon#*after write, iclass 14, count 2 2006.229.09:55:33.71#ibcon#*before return 0, iclass 14, count 2 2006.229.09:55:33.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:33.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:33.71#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:55:33.71#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:33.71#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:33.83#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:33.83#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:33.83#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:55:33.83#ibcon#first serial, iclass 14, count 0 2006.229.09:55:33.83#ibcon#enter sib2, iclass 14, count 0 2006.229.09:55:33.83#ibcon#flushed, iclass 14, count 0 2006.229.09:55:33.83#ibcon#about to write, iclass 14, count 0 2006.229.09:55:33.83#ibcon#wrote, iclass 14, count 0 2006.229.09:55:33.83#ibcon#about to read 3, iclass 14, count 0 2006.229.09:55:33.85#ibcon#read 3, iclass 14, count 0 2006.229.09:55:33.85#ibcon#about to read 4, iclass 14, count 0 2006.229.09:55:33.85#ibcon#read 4, iclass 14, count 0 2006.229.09:55:33.85#ibcon#about to read 5, iclass 14, count 0 2006.229.09:55:33.85#ibcon#read 5, iclass 14, count 0 2006.229.09:55:33.85#ibcon#about to read 6, iclass 14, count 0 2006.229.09:55:33.85#ibcon#read 6, iclass 14, count 0 2006.229.09:55:33.85#ibcon#end of sib2, iclass 14, count 0 2006.229.09:55:33.85#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:55:33.85#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:55:33.85#ibcon#[25=USB\r\n] 2006.229.09:55:33.85#ibcon#*before write, iclass 14, count 0 2006.229.09:55:33.85#ibcon#enter sib2, iclass 14, count 0 2006.229.09:55:33.85#ibcon#flushed, iclass 14, count 0 2006.229.09:55:33.85#ibcon#about to write, iclass 14, count 0 2006.229.09:55:33.85#ibcon#wrote, iclass 14, count 0 2006.229.09:55:33.85#ibcon#about to read 3, iclass 14, count 0 2006.229.09:55:33.88#ibcon#read 3, iclass 14, count 0 2006.229.09:55:33.88#ibcon#about to read 4, iclass 14, count 0 2006.229.09:55:33.88#ibcon#read 4, iclass 14, count 0 2006.229.09:55:33.88#ibcon#about to read 5, iclass 14, count 0 2006.229.09:55:33.88#ibcon#read 5, iclass 14, count 0 2006.229.09:55:33.88#ibcon#about to read 6, iclass 14, count 0 2006.229.09:55:33.88#ibcon#read 6, iclass 14, count 0 2006.229.09:55:33.88#ibcon#end of sib2, iclass 14, count 0 2006.229.09:55:33.88#ibcon#*after write, iclass 14, count 0 2006.229.09:55:33.88#ibcon#*before return 0, iclass 14, count 0 2006.229.09:55:33.88#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:33.88#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:33.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:55:33.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:55:33.88$vck44/valo=6,814.99 2006.229.09:55:33.88#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.09:55:33.88#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.09:55:33.88#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:33.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:33.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:33.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:33.88#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:55:33.88#ibcon#first serial, iclass 16, count 0 2006.229.09:55:33.88#ibcon#enter sib2, iclass 16, count 0 2006.229.09:55:33.88#ibcon#flushed, iclass 16, count 0 2006.229.09:55:33.88#ibcon#about to write, iclass 16, count 0 2006.229.09:55:33.89#ibcon#wrote, iclass 16, count 0 2006.229.09:55:33.89#ibcon#about to read 3, iclass 16, count 0 2006.229.09:55:33.90#ibcon#read 3, iclass 16, count 0 2006.229.09:55:33.90#ibcon#about to read 4, iclass 16, count 0 2006.229.09:55:33.90#ibcon#read 4, iclass 16, count 0 2006.229.09:55:33.90#ibcon#about to read 5, iclass 16, count 0 2006.229.09:55:33.90#ibcon#read 5, iclass 16, count 0 2006.229.09:55:33.90#ibcon#about to read 6, iclass 16, count 0 2006.229.09:55:33.90#ibcon#read 6, iclass 16, count 0 2006.229.09:55:33.90#ibcon#end of sib2, iclass 16, count 0 2006.229.09:55:33.90#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:55:33.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:55:33.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:55:33.90#ibcon#*before write, iclass 16, count 0 2006.229.09:55:33.90#ibcon#enter sib2, iclass 16, count 0 2006.229.09:55:33.90#ibcon#flushed, iclass 16, count 0 2006.229.09:55:33.90#ibcon#about to write, iclass 16, count 0 2006.229.09:55:33.90#ibcon#wrote, iclass 16, count 0 2006.229.09:55:33.90#ibcon#about to read 3, iclass 16, count 0 2006.229.09:55:33.94#ibcon#read 3, iclass 16, count 0 2006.229.09:55:33.94#ibcon#about to read 4, iclass 16, count 0 2006.229.09:55:33.94#ibcon#read 4, iclass 16, count 0 2006.229.09:55:33.94#ibcon#about to read 5, iclass 16, count 0 2006.229.09:55:33.94#ibcon#read 5, iclass 16, count 0 2006.229.09:55:33.94#ibcon#about to read 6, iclass 16, count 0 2006.229.09:55:33.94#ibcon#read 6, iclass 16, count 0 2006.229.09:55:33.94#ibcon#end of sib2, iclass 16, count 0 2006.229.09:55:33.94#ibcon#*after write, iclass 16, count 0 2006.229.09:55:33.94#ibcon#*before return 0, iclass 16, count 0 2006.229.09:55:33.94#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:33.94#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:33.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:55:33.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:55:33.94$vck44/va=6,4 2006.229.09:55:33.94#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.09:55:33.94#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.09:55:33.94#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:33.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:34.00#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:34.00#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:34.00#ibcon#enter wrdev, iclass 18, count 2 2006.229.09:55:34.00#ibcon#first serial, iclass 18, count 2 2006.229.09:55:34.00#ibcon#enter sib2, iclass 18, count 2 2006.229.09:55:34.00#ibcon#flushed, iclass 18, count 2 2006.229.09:55:34.00#ibcon#about to write, iclass 18, count 2 2006.229.09:55:34.00#ibcon#wrote, iclass 18, count 2 2006.229.09:55:34.00#ibcon#about to read 3, iclass 18, count 2 2006.229.09:55:34.02#ibcon#read 3, iclass 18, count 2 2006.229.09:55:34.02#ibcon#about to read 4, iclass 18, count 2 2006.229.09:55:34.02#ibcon#read 4, iclass 18, count 2 2006.229.09:55:34.02#ibcon#about to read 5, iclass 18, count 2 2006.229.09:55:34.02#ibcon#read 5, iclass 18, count 2 2006.229.09:55:34.02#ibcon#about to read 6, iclass 18, count 2 2006.229.09:55:34.02#ibcon#read 6, iclass 18, count 2 2006.229.09:55:34.02#ibcon#end of sib2, iclass 18, count 2 2006.229.09:55:34.02#ibcon#*mode == 0, iclass 18, count 2 2006.229.09:55:34.02#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.09:55:34.02#ibcon#[25=AT06-04\r\n] 2006.229.09:55:34.02#ibcon#*before write, iclass 18, count 2 2006.229.09:55:34.02#ibcon#enter sib2, iclass 18, count 2 2006.229.09:55:34.02#ibcon#flushed, iclass 18, count 2 2006.229.09:55:34.02#ibcon#about to write, iclass 18, count 2 2006.229.09:55:34.02#ibcon#wrote, iclass 18, count 2 2006.229.09:55:34.02#ibcon#about to read 3, iclass 18, count 2 2006.229.09:55:34.05#ibcon#read 3, iclass 18, count 2 2006.229.09:55:34.05#ibcon#about to read 4, iclass 18, count 2 2006.229.09:55:34.05#ibcon#read 4, iclass 18, count 2 2006.229.09:55:34.05#ibcon#about to read 5, iclass 18, count 2 2006.229.09:55:34.05#ibcon#read 5, iclass 18, count 2 2006.229.09:55:34.05#ibcon#about to read 6, iclass 18, count 2 2006.229.09:55:34.05#ibcon#read 6, iclass 18, count 2 2006.229.09:55:34.05#ibcon#end of sib2, iclass 18, count 2 2006.229.09:55:34.05#ibcon#*after write, iclass 18, count 2 2006.229.09:55:34.05#ibcon#*before return 0, iclass 18, count 2 2006.229.09:55:34.05#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:34.05#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:34.05#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.09:55:34.05#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:34.05#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:34.17#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:34.17#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:34.17#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:55:34.17#ibcon#first serial, iclass 18, count 0 2006.229.09:55:34.17#ibcon#enter sib2, iclass 18, count 0 2006.229.09:55:34.17#ibcon#flushed, iclass 18, count 0 2006.229.09:55:34.17#ibcon#about to write, iclass 18, count 0 2006.229.09:55:34.17#ibcon#wrote, iclass 18, count 0 2006.229.09:55:34.17#ibcon#about to read 3, iclass 18, count 0 2006.229.09:55:34.19#ibcon#read 3, iclass 18, count 0 2006.229.09:55:34.19#ibcon#about to read 4, iclass 18, count 0 2006.229.09:55:34.19#ibcon#read 4, iclass 18, count 0 2006.229.09:55:34.19#ibcon#about to read 5, iclass 18, count 0 2006.229.09:55:34.19#ibcon#read 5, iclass 18, count 0 2006.229.09:55:34.19#ibcon#about to read 6, iclass 18, count 0 2006.229.09:55:34.19#ibcon#read 6, iclass 18, count 0 2006.229.09:55:34.19#ibcon#end of sib2, iclass 18, count 0 2006.229.09:55:34.19#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:55:34.19#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:55:34.19#ibcon#[25=USB\r\n] 2006.229.09:55:34.19#ibcon#*before write, iclass 18, count 0 2006.229.09:55:34.19#ibcon#enter sib2, iclass 18, count 0 2006.229.09:55:34.19#ibcon#flushed, iclass 18, count 0 2006.229.09:55:34.19#ibcon#about to write, iclass 18, count 0 2006.229.09:55:34.19#ibcon#wrote, iclass 18, count 0 2006.229.09:55:34.19#ibcon#about to read 3, iclass 18, count 0 2006.229.09:55:34.22#ibcon#read 3, iclass 18, count 0 2006.229.09:55:34.22#ibcon#about to read 4, iclass 18, count 0 2006.229.09:55:34.22#ibcon#read 4, iclass 18, count 0 2006.229.09:55:34.22#ibcon#about to read 5, iclass 18, count 0 2006.229.09:55:34.22#ibcon#read 5, iclass 18, count 0 2006.229.09:55:34.22#ibcon#about to read 6, iclass 18, count 0 2006.229.09:55:34.22#ibcon#read 6, iclass 18, count 0 2006.229.09:55:34.22#ibcon#end of sib2, iclass 18, count 0 2006.229.09:55:34.22#ibcon#*after write, iclass 18, count 0 2006.229.09:55:34.22#ibcon#*before return 0, iclass 18, count 0 2006.229.09:55:34.22#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:34.22#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:34.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:55:34.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:55:34.22$vck44/valo=7,864.99 2006.229.09:55:34.22#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:55:34.22#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:55:34.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:34.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:34.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:34.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:34.22#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:55:34.22#ibcon#first serial, iclass 20, count 0 2006.229.09:55:34.22#ibcon#enter sib2, iclass 20, count 0 2006.229.09:55:34.22#ibcon#flushed, iclass 20, count 0 2006.229.09:55:34.22#ibcon#about to write, iclass 20, count 0 2006.229.09:55:34.23#ibcon#wrote, iclass 20, count 0 2006.229.09:55:34.23#ibcon#about to read 3, iclass 20, count 0 2006.229.09:55:34.24#ibcon#read 3, iclass 20, count 0 2006.229.09:55:34.24#ibcon#about to read 4, iclass 20, count 0 2006.229.09:55:34.24#ibcon#read 4, iclass 20, count 0 2006.229.09:55:34.24#ibcon#about to read 5, iclass 20, count 0 2006.229.09:55:34.24#ibcon#read 5, iclass 20, count 0 2006.229.09:55:34.24#ibcon#about to read 6, iclass 20, count 0 2006.229.09:55:34.24#ibcon#read 6, iclass 20, count 0 2006.229.09:55:34.24#ibcon#end of sib2, iclass 20, count 0 2006.229.09:55:34.24#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:55:34.24#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:55:34.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:55:34.24#ibcon#*before write, iclass 20, count 0 2006.229.09:55:34.24#ibcon#enter sib2, iclass 20, count 0 2006.229.09:55:34.24#ibcon#flushed, iclass 20, count 0 2006.229.09:55:34.24#ibcon#about to write, iclass 20, count 0 2006.229.09:55:34.24#ibcon#wrote, iclass 20, count 0 2006.229.09:55:34.24#ibcon#about to read 3, iclass 20, count 0 2006.229.09:55:34.28#ibcon#read 3, iclass 20, count 0 2006.229.09:55:34.28#ibcon#about to read 4, iclass 20, count 0 2006.229.09:55:34.28#ibcon#read 4, iclass 20, count 0 2006.229.09:55:34.28#ibcon#about to read 5, iclass 20, count 0 2006.229.09:55:34.28#ibcon#read 5, iclass 20, count 0 2006.229.09:55:34.28#ibcon#about to read 6, iclass 20, count 0 2006.229.09:55:34.28#ibcon#read 6, iclass 20, count 0 2006.229.09:55:34.28#ibcon#end of sib2, iclass 20, count 0 2006.229.09:55:34.28#ibcon#*after write, iclass 20, count 0 2006.229.09:55:34.28#ibcon#*before return 0, iclass 20, count 0 2006.229.09:55:34.28#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:34.28#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:34.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:55:34.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:55:34.28$vck44/va=7,5 2006.229.09:55:34.28#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.09:55:34.28#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.09:55:34.28#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:34.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:34.34#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:34.34#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:34.34#ibcon#enter wrdev, iclass 22, count 2 2006.229.09:55:34.34#ibcon#first serial, iclass 22, count 2 2006.229.09:55:34.34#ibcon#enter sib2, iclass 22, count 2 2006.229.09:55:34.34#ibcon#flushed, iclass 22, count 2 2006.229.09:55:34.34#ibcon#about to write, iclass 22, count 2 2006.229.09:55:34.34#ibcon#wrote, iclass 22, count 2 2006.229.09:55:34.34#ibcon#about to read 3, iclass 22, count 2 2006.229.09:55:34.36#ibcon#read 3, iclass 22, count 2 2006.229.09:55:34.36#ibcon#about to read 4, iclass 22, count 2 2006.229.09:55:34.36#ibcon#read 4, iclass 22, count 2 2006.229.09:55:34.36#ibcon#about to read 5, iclass 22, count 2 2006.229.09:55:34.36#ibcon#read 5, iclass 22, count 2 2006.229.09:55:34.36#ibcon#about to read 6, iclass 22, count 2 2006.229.09:55:34.36#ibcon#read 6, iclass 22, count 2 2006.229.09:55:34.36#ibcon#end of sib2, iclass 22, count 2 2006.229.09:55:34.36#ibcon#*mode == 0, iclass 22, count 2 2006.229.09:55:34.36#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.09:55:34.36#ibcon#[25=AT07-05\r\n] 2006.229.09:55:34.36#ibcon#*before write, iclass 22, count 2 2006.229.09:55:34.36#ibcon#enter sib2, iclass 22, count 2 2006.229.09:55:34.36#ibcon#flushed, iclass 22, count 2 2006.229.09:55:34.36#ibcon#about to write, iclass 22, count 2 2006.229.09:55:34.36#ibcon#wrote, iclass 22, count 2 2006.229.09:55:34.36#ibcon#about to read 3, iclass 22, count 2 2006.229.09:55:34.39#ibcon#read 3, iclass 22, count 2 2006.229.09:55:34.39#ibcon#about to read 4, iclass 22, count 2 2006.229.09:55:34.39#ibcon#read 4, iclass 22, count 2 2006.229.09:55:34.39#ibcon#about to read 5, iclass 22, count 2 2006.229.09:55:34.39#ibcon#read 5, iclass 22, count 2 2006.229.09:55:34.39#ibcon#about to read 6, iclass 22, count 2 2006.229.09:55:34.39#ibcon#read 6, iclass 22, count 2 2006.229.09:55:34.39#ibcon#end of sib2, iclass 22, count 2 2006.229.09:55:34.39#ibcon#*after write, iclass 22, count 2 2006.229.09:55:34.39#ibcon#*before return 0, iclass 22, count 2 2006.229.09:55:34.39#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:34.39#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:34.39#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.09:55:34.39#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:34.39#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:34.51#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:34.51#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:34.51#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:55:34.51#ibcon#first serial, iclass 22, count 0 2006.229.09:55:34.51#ibcon#enter sib2, iclass 22, count 0 2006.229.09:55:34.51#ibcon#flushed, iclass 22, count 0 2006.229.09:55:34.51#ibcon#about to write, iclass 22, count 0 2006.229.09:55:34.51#ibcon#wrote, iclass 22, count 0 2006.229.09:55:34.51#ibcon#about to read 3, iclass 22, count 0 2006.229.09:55:34.53#ibcon#read 3, iclass 22, count 0 2006.229.09:55:34.53#ibcon#about to read 4, iclass 22, count 0 2006.229.09:55:34.53#ibcon#read 4, iclass 22, count 0 2006.229.09:55:34.53#ibcon#about to read 5, iclass 22, count 0 2006.229.09:55:34.53#ibcon#read 5, iclass 22, count 0 2006.229.09:55:34.53#ibcon#about to read 6, iclass 22, count 0 2006.229.09:55:34.53#ibcon#read 6, iclass 22, count 0 2006.229.09:55:34.53#ibcon#end of sib2, iclass 22, count 0 2006.229.09:55:34.53#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:55:34.53#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:55:34.53#ibcon#[25=USB\r\n] 2006.229.09:55:34.53#ibcon#*before write, iclass 22, count 0 2006.229.09:55:34.53#ibcon#enter sib2, iclass 22, count 0 2006.229.09:55:34.53#ibcon#flushed, iclass 22, count 0 2006.229.09:55:34.53#ibcon#about to write, iclass 22, count 0 2006.229.09:55:34.53#ibcon#wrote, iclass 22, count 0 2006.229.09:55:34.53#ibcon#about to read 3, iclass 22, count 0 2006.229.09:55:34.56#ibcon#read 3, iclass 22, count 0 2006.229.09:55:34.56#ibcon#about to read 4, iclass 22, count 0 2006.229.09:55:34.56#ibcon#read 4, iclass 22, count 0 2006.229.09:55:34.56#ibcon#about to read 5, iclass 22, count 0 2006.229.09:55:34.56#ibcon#read 5, iclass 22, count 0 2006.229.09:55:34.56#ibcon#about to read 6, iclass 22, count 0 2006.229.09:55:34.56#ibcon#read 6, iclass 22, count 0 2006.229.09:55:34.56#ibcon#end of sib2, iclass 22, count 0 2006.229.09:55:34.56#ibcon#*after write, iclass 22, count 0 2006.229.09:55:34.56#ibcon#*before return 0, iclass 22, count 0 2006.229.09:55:34.56#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:34.56#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:34.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:55:34.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:55:34.56$vck44/valo=8,884.99 2006.229.09:55:34.56#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:55:34.56#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:55:34.56#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:34.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:34.56#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:34.56#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:34.56#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:55:34.56#ibcon#first serial, iclass 24, count 0 2006.229.09:55:34.56#ibcon#enter sib2, iclass 24, count 0 2006.229.09:55:34.56#ibcon#flushed, iclass 24, count 0 2006.229.09:55:34.56#ibcon#about to write, iclass 24, count 0 2006.229.09:55:34.56#ibcon#wrote, iclass 24, count 0 2006.229.09:55:34.57#ibcon#about to read 3, iclass 24, count 0 2006.229.09:55:34.58#ibcon#read 3, iclass 24, count 0 2006.229.09:55:34.58#ibcon#about to read 4, iclass 24, count 0 2006.229.09:55:34.58#ibcon#read 4, iclass 24, count 0 2006.229.09:55:34.58#ibcon#about to read 5, iclass 24, count 0 2006.229.09:55:34.58#ibcon#read 5, iclass 24, count 0 2006.229.09:55:34.58#ibcon#about to read 6, iclass 24, count 0 2006.229.09:55:34.58#ibcon#read 6, iclass 24, count 0 2006.229.09:55:34.58#ibcon#end of sib2, iclass 24, count 0 2006.229.09:55:34.58#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:55:34.58#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:55:34.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:55:34.58#ibcon#*before write, iclass 24, count 0 2006.229.09:55:34.58#ibcon#enter sib2, iclass 24, count 0 2006.229.09:55:34.58#ibcon#flushed, iclass 24, count 0 2006.229.09:55:34.58#ibcon#about to write, iclass 24, count 0 2006.229.09:55:34.58#ibcon#wrote, iclass 24, count 0 2006.229.09:55:34.58#ibcon#about to read 3, iclass 24, count 0 2006.229.09:55:34.62#ibcon#read 3, iclass 24, count 0 2006.229.09:55:34.62#ibcon#about to read 4, iclass 24, count 0 2006.229.09:55:34.62#ibcon#read 4, iclass 24, count 0 2006.229.09:55:34.62#ibcon#about to read 5, iclass 24, count 0 2006.229.09:55:34.62#ibcon#read 5, iclass 24, count 0 2006.229.09:55:34.62#ibcon#about to read 6, iclass 24, count 0 2006.229.09:55:34.62#ibcon#read 6, iclass 24, count 0 2006.229.09:55:34.62#ibcon#end of sib2, iclass 24, count 0 2006.229.09:55:34.62#ibcon#*after write, iclass 24, count 0 2006.229.09:55:34.62#ibcon#*before return 0, iclass 24, count 0 2006.229.09:55:34.62#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:34.62#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:34.62#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:55:34.62#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:55:34.62$vck44/va=8,6 2006.229.09:55:34.62#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.09:55:34.62#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.09:55:34.62#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:34.62#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:55:34.68#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:55:34.68#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:55:34.68#ibcon#enter wrdev, iclass 26, count 2 2006.229.09:55:34.68#ibcon#first serial, iclass 26, count 2 2006.229.09:55:34.68#ibcon#enter sib2, iclass 26, count 2 2006.229.09:55:34.68#ibcon#flushed, iclass 26, count 2 2006.229.09:55:34.68#ibcon#about to write, iclass 26, count 2 2006.229.09:55:34.68#ibcon#wrote, iclass 26, count 2 2006.229.09:55:34.68#ibcon#about to read 3, iclass 26, count 2 2006.229.09:55:34.70#ibcon#read 3, iclass 26, count 2 2006.229.09:55:34.70#ibcon#about to read 4, iclass 26, count 2 2006.229.09:55:34.70#ibcon#read 4, iclass 26, count 2 2006.229.09:55:34.70#ibcon#about to read 5, iclass 26, count 2 2006.229.09:55:34.70#ibcon#read 5, iclass 26, count 2 2006.229.09:55:34.70#ibcon#about to read 6, iclass 26, count 2 2006.229.09:55:34.70#ibcon#read 6, iclass 26, count 2 2006.229.09:55:34.70#ibcon#end of sib2, iclass 26, count 2 2006.229.09:55:34.70#ibcon#*mode == 0, iclass 26, count 2 2006.229.09:55:34.70#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.09:55:34.70#ibcon#[25=AT08-06\r\n] 2006.229.09:55:34.70#ibcon#*before write, iclass 26, count 2 2006.229.09:55:34.70#ibcon#enter sib2, iclass 26, count 2 2006.229.09:55:34.70#ibcon#flushed, iclass 26, count 2 2006.229.09:55:34.70#ibcon#about to write, iclass 26, count 2 2006.229.09:55:34.70#ibcon#wrote, iclass 26, count 2 2006.229.09:55:34.70#ibcon#about to read 3, iclass 26, count 2 2006.229.09:55:34.73#ibcon#read 3, iclass 26, count 2 2006.229.09:55:34.73#ibcon#about to read 4, iclass 26, count 2 2006.229.09:55:34.73#ibcon#read 4, iclass 26, count 2 2006.229.09:55:34.73#ibcon#about to read 5, iclass 26, count 2 2006.229.09:55:34.73#ibcon#read 5, iclass 26, count 2 2006.229.09:55:34.73#ibcon#about to read 6, iclass 26, count 2 2006.229.09:55:34.73#ibcon#read 6, iclass 26, count 2 2006.229.09:55:34.73#ibcon#end of sib2, iclass 26, count 2 2006.229.09:55:34.73#ibcon#*after write, iclass 26, count 2 2006.229.09:55:34.73#ibcon#*before return 0, iclass 26, count 2 2006.229.09:55:34.73#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:55:34.73#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.09:55:34.73#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.09:55:34.73#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:34.73#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:55:34.85#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:55:34.85#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:55:34.85#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:55:34.85#ibcon#first serial, iclass 26, count 0 2006.229.09:55:34.85#ibcon#enter sib2, iclass 26, count 0 2006.229.09:55:34.85#ibcon#flushed, iclass 26, count 0 2006.229.09:55:34.85#ibcon#about to write, iclass 26, count 0 2006.229.09:55:34.85#ibcon#wrote, iclass 26, count 0 2006.229.09:55:34.85#ibcon#about to read 3, iclass 26, count 0 2006.229.09:55:34.87#ibcon#read 3, iclass 26, count 0 2006.229.09:55:34.87#ibcon#about to read 4, iclass 26, count 0 2006.229.09:55:34.87#ibcon#read 4, iclass 26, count 0 2006.229.09:55:34.87#ibcon#about to read 5, iclass 26, count 0 2006.229.09:55:34.87#ibcon#read 5, iclass 26, count 0 2006.229.09:55:34.87#ibcon#about to read 6, iclass 26, count 0 2006.229.09:55:34.87#ibcon#read 6, iclass 26, count 0 2006.229.09:55:34.87#ibcon#end of sib2, iclass 26, count 0 2006.229.09:55:34.87#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:55:34.87#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:55:34.87#ibcon#[25=USB\r\n] 2006.229.09:55:34.87#ibcon#*before write, iclass 26, count 0 2006.229.09:55:34.87#ibcon#enter sib2, iclass 26, count 0 2006.229.09:55:34.87#ibcon#flushed, iclass 26, count 0 2006.229.09:55:34.87#ibcon#about to write, iclass 26, count 0 2006.229.09:55:34.87#ibcon#wrote, iclass 26, count 0 2006.229.09:55:34.87#ibcon#about to read 3, iclass 26, count 0 2006.229.09:55:34.90#ibcon#read 3, iclass 26, count 0 2006.229.09:55:34.90#ibcon#about to read 4, iclass 26, count 0 2006.229.09:55:34.90#ibcon#read 4, iclass 26, count 0 2006.229.09:55:34.90#ibcon#about to read 5, iclass 26, count 0 2006.229.09:55:34.90#ibcon#read 5, iclass 26, count 0 2006.229.09:55:34.90#ibcon#about to read 6, iclass 26, count 0 2006.229.09:55:34.90#ibcon#read 6, iclass 26, count 0 2006.229.09:55:34.90#ibcon#end of sib2, iclass 26, count 0 2006.229.09:55:34.90#ibcon#*after write, iclass 26, count 0 2006.229.09:55:34.90#ibcon#*before return 0, iclass 26, count 0 2006.229.09:55:34.90#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:55:34.90#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.09:55:34.90#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:55:34.90#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:55:34.90$vck44/vblo=1,629.99 2006.229.09:55:34.90#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.09:55:34.90#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.09:55:34.90#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:34.90#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:55:34.90#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:55:34.90#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:55:34.90#ibcon#enter wrdev, iclass 28, count 0 2006.229.09:55:34.90#ibcon#first serial, iclass 28, count 0 2006.229.09:55:34.90#ibcon#enter sib2, iclass 28, count 0 2006.229.09:55:34.90#ibcon#flushed, iclass 28, count 0 2006.229.09:55:34.90#ibcon#about to write, iclass 28, count 0 2006.229.09:55:34.90#ibcon#wrote, iclass 28, count 0 2006.229.09:55:34.90#ibcon#about to read 3, iclass 28, count 0 2006.229.09:55:34.92#ibcon#read 3, iclass 28, count 0 2006.229.09:55:34.92#ibcon#about to read 4, iclass 28, count 0 2006.229.09:55:34.92#ibcon#read 4, iclass 28, count 0 2006.229.09:55:34.92#ibcon#about to read 5, iclass 28, count 0 2006.229.09:55:34.92#ibcon#read 5, iclass 28, count 0 2006.229.09:55:34.92#ibcon#about to read 6, iclass 28, count 0 2006.229.09:55:34.92#ibcon#read 6, iclass 28, count 0 2006.229.09:55:34.92#ibcon#end of sib2, iclass 28, count 0 2006.229.09:55:34.92#ibcon#*mode == 0, iclass 28, count 0 2006.229.09:55:34.92#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.09:55:34.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:55:34.92#ibcon#*before write, iclass 28, count 0 2006.229.09:55:34.92#ibcon#enter sib2, iclass 28, count 0 2006.229.09:55:34.92#ibcon#flushed, iclass 28, count 0 2006.229.09:55:34.92#ibcon#about to write, iclass 28, count 0 2006.229.09:55:34.92#ibcon#wrote, iclass 28, count 0 2006.229.09:55:34.92#ibcon#about to read 3, iclass 28, count 0 2006.229.09:55:34.96#ibcon#read 3, iclass 28, count 0 2006.229.09:55:34.96#ibcon#about to read 4, iclass 28, count 0 2006.229.09:55:34.96#ibcon#read 4, iclass 28, count 0 2006.229.09:55:34.96#ibcon#about to read 5, iclass 28, count 0 2006.229.09:55:34.96#ibcon#read 5, iclass 28, count 0 2006.229.09:55:34.96#ibcon#about to read 6, iclass 28, count 0 2006.229.09:55:34.96#ibcon#read 6, iclass 28, count 0 2006.229.09:55:34.96#ibcon#end of sib2, iclass 28, count 0 2006.229.09:55:34.96#ibcon#*after write, iclass 28, count 0 2006.229.09:55:34.96#ibcon#*before return 0, iclass 28, count 0 2006.229.09:55:34.96#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:55:34.96#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.09:55:34.96#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.09:55:34.96#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.09:55:34.96$vck44/vb=1,4 2006.229.09:55:34.96#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.09:55:34.96#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.09:55:34.96#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:34.96#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:55:34.96#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:55:34.96#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:55:34.96#ibcon#enter wrdev, iclass 30, count 2 2006.229.09:55:34.96#ibcon#first serial, iclass 30, count 2 2006.229.09:55:34.96#ibcon#enter sib2, iclass 30, count 2 2006.229.09:55:34.96#ibcon#flushed, iclass 30, count 2 2006.229.09:55:34.96#ibcon#about to write, iclass 30, count 2 2006.229.09:55:34.96#ibcon#wrote, iclass 30, count 2 2006.229.09:55:34.97#ibcon#about to read 3, iclass 30, count 2 2006.229.09:55:34.98#ibcon#read 3, iclass 30, count 2 2006.229.09:55:34.98#ibcon#about to read 4, iclass 30, count 2 2006.229.09:55:34.98#ibcon#read 4, iclass 30, count 2 2006.229.09:55:34.98#ibcon#about to read 5, iclass 30, count 2 2006.229.09:55:34.98#ibcon#read 5, iclass 30, count 2 2006.229.09:55:34.98#ibcon#about to read 6, iclass 30, count 2 2006.229.09:55:34.98#ibcon#read 6, iclass 30, count 2 2006.229.09:55:34.98#ibcon#end of sib2, iclass 30, count 2 2006.229.09:55:34.98#ibcon#*mode == 0, iclass 30, count 2 2006.229.09:55:34.98#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.09:55:34.98#ibcon#[27=AT01-04\r\n] 2006.229.09:55:34.98#ibcon#*before write, iclass 30, count 2 2006.229.09:55:34.98#ibcon#enter sib2, iclass 30, count 2 2006.229.09:55:34.98#ibcon#flushed, iclass 30, count 2 2006.229.09:55:34.98#ibcon#about to write, iclass 30, count 2 2006.229.09:55:34.98#ibcon#wrote, iclass 30, count 2 2006.229.09:55:34.98#ibcon#about to read 3, iclass 30, count 2 2006.229.09:55:35.01#ibcon#read 3, iclass 30, count 2 2006.229.09:55:35.01#ibcon#about to read 4, iclass 30, count 2 2006.229.09:55:35.01#ibcon#read 4, iclass 30, count 2 2006.229.09:55:35.01#ibcon#about to read 5, iclass 30, count 2 2006.229.09:55:35.01#ibcon#read 5, iclass 30, count 2 2006.229.09:55:35.01#ibcon#about to read 6, iclass 30, count 2 2006.229.09:55:35.01#ibcon#read 6, iclass 30, count 2 2006.229.09:55:35.01#ibcon#end of sib2, iclass 30, count 2 2006.229.09:55:35.01#ibcon#*after write, iclass 30, count 2 2006.229.09:55:35.01#ibcon#*before return 0, iclass 30, count 2 2006.229.09:55:35.01#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:55:35.01#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.09:55:35.01#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.09:55:35.01#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:35.01#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:55:35.13#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:55:35.13#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:55:35.13#ibcon#enter wrdev, iclass 30, count 0 2006.229.09:55:35.13#ibcon#first serial, iclass 30, count 0 2006.229.09:55:35.13#ibcon#enter sib2, iclass 30, count 0 2006.229.09:55:35.13#ibcon#flushed, iclass 30, count 0 2006.229.09:55:35.13#ibcon#about to write, iclass 30, count 0 2006.229.09:55:35.13#ibcon#wrote, iclass 30, count 0 2006.229.09:55:35.14#ibcon#about to read 3, iclass 30, count 0 2006.229.09:55:35.15#ibcon#read 3, iclass 30, count 0 2006.229.09:55:35.15#ibcon#about to read 4, iclass 30, count 0 2006.229.09:55:35.15#ibcon#read 4, iclass 30, count 0 2006.229.09:55:35.15#ibcon#about to read 5, iclass 30, count 0 2006.229.09:55:35.15#ibcon#read 5, iclass 30, count 0 2006.229.09:55:35.15#ibcon#about to read 6, iclass 30, count 0 2006.229.09:55:35.15#ibcon#read 6, iclass 30, count 0 2006.229.09:55:35.15#ibcon#end of sib2, iclass 30, count 0 2006.229.09:55:35.15#ibcon#*mode == 0, iclass 30, count 0 2006.229.09:55:35.15#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.09:55:35.15#ibcon#[27=USB\r\n] 2006.229.09:55:35.15#ibcon#*before write, iclass 30, count 0 2006.229.09:55:35.15#ibcon#enter sib2, iclass 30, count 0 2006.229.09:55:35.15#ibcon#flushed, iclass 30, count 0 2006.229.09:55:35.15#ibcon#about to write, iclass 30, count 0 2006.229.09:55:35.15#ibcon#wrote, iclass 30, count 0 2006.229.09:55:35.15#ibcon#about to read 3, iclass 30, count 0 2006.229.09:55:35.18#ibcon#read 3, iclass 30, count 0 2006.229.09:55:35.18#ibcon#about to read 4, iclass 30, count 0 2006.229.09:55:35.18#ibcon#read 4, iclass 30, count 0 2006.229.09:55:35.18#ibcon#about to read 5, iclass 30, count 0 2006.229.09:55:35.18#ibcon#read 5, iclass 30, count 0 2006.229.09:55:35.18#ibcon#about to read 6, iclass 30, count 0 2006.229.09:55:35.18#ibcon#read 6, iclass 30, count 0 2006.229.09:55:35.18#ibcon#end of sib2, iclass 30, count 0 2006.229.09:55:35.18#ibcon#*after write, iclass 30, count 0 2006.229.09:55:35.18#ibcon#*before return 0, iclass 30, count 0 2006.229.09:55:35.18#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:55:35.18#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.09:55:35.18#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.09:55:35.18#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.09:55:35.18$vck44/vblo=2,634.99 2006.229.09:55:35.18#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.09:55:35.18#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.09:55:35.18#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:35.18#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:35.18#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:35.18#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:35.18#ibcon#enter wrdev, iclass 32, count 0 2006.229.09:55:35.18#ibcon#first serial, iclass 32, count 0 2006.229.09:55:35.18#ibcon#enter sib2, iclass 32, count 0 2006.229.09:55:35.18#ibcon#flushed, iclass 32, count 0 2006.229.09:55:35.19#ibcon#about to write, iclass 32, count 0 2006.229.09:55:35.19#ibcon#wrote, iclass 32, count 0 2006.229.09:55:35.19#ibcon#about to read 3, iclass 32, count 0 2006.229.09:55:35.20#ibcon#read 3, iclass 32, count 0 2006.229.09:55:35.20#ibcon#about to read 4, iclass 32, count 0 2006.229.09:55:35.20#ibcon#read 4, iclass 32, count 0 2006.229.09:55:35.20#ibcon#about to read 5, iclass 32, count 0 2006.229.09:55:35.20#ibcon#read 5, iclass 32, count 0 2006.229.09:55:35.20#ibcon#about to read 6, iclass 32, count 0 2006.229.09:55:35.20#ibcon#read 6, iclass 32, count 0 2006.229.09:55:35.20#ibcon#end of sib2, iclass 32, count 0 2006.229.09:55:35.20#ibcon#*mode == 0, iclass 32, count 0 2006.229.09:55:35.20#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.09:55:35.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:55:35.20#ibcon#*before write, iclass 32, count 0 2006.229.09:55:35.20#ibcon#enter sib2, iclass 32, count 0 2006.229.09:55:35.20#ibcon#flushed, iclass 32, count 0 2006.229.09:55:35.20#ibcon#about to write, iclass 32, count 0 2006.229.09:55:35.20#ibcon#wrote, iclass 32, count 0 2006.229.09:55:35.20#ibcon#about to read 3, iclass 32, count 0 2006.229.09:55:35.24#ibcon#read 3, iclass 32, count 0 2006.229.09:55:35.24#ibcon#about to read 4, iclass 32, count 0 2006.229.09:55:35.24#ibcon#read 4, iclass 32, count 0 2006.229.09:55:35.24#ibcon#about to read 5, iclass 32, count 0 2006.229.09:55:35.24#ibcon#read 5, iclass 32, count 0 2006.229.09:55:35.24#ibcon#about to read 6, iclass 32, count 0 2006.229.09:55:35.24#ibcon#read 6, iclass 32, count 0 2006.229.09:55:35.24#ibcon#end of sib2, iclass 32, count 0 2006.229.09:55:35.24#ibcon#*after write, iclass 32, count 0 2006.229.09:55:35.24#ibcon#*before return 0, iclass 32, count 0 2006.229.09:55:35.24#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:35.24#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.09:55:35.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.09:55:35.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.09:55:35.24$vck44/vb=2,4 2006.229.09:55:35.24#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.09:55:35.24#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.09:55:35.24#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:35.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:35.30#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:35.30#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:35.30#ibcon#enter wrdev, iclass 34, count 2 2006.229.09:55:35.30#ibcon#first serial, iclass 34, count 2 2006.229.09:55:35.30#ibcon#enter sib2, iclass 34, count 2 2006.229.09:55:35.30#ibcon#flushed, iclass 34, count 2 2006.229.09:55:35.30#ibcon#about to write, iclass 34, count 2 2006.229.09:55:35.30#ibcon#wrote, iclass 34, count 2 2006.229.09:55:35.30#ibcon#about to read 3, iclass 34, count 2 2006.229.09:55:35.32#ibcon#read 3, iclass 34, count 2 2006.229.09:55:35.32#ibcon#about to read 4, iclass 34, count 2 2006.229.09:55:35.32#ibcon#read 4, iclass 34, count 2 2006.229.09:55:35.32#ibcon#about to read 5, iclass 34, count 2 2006.229.09:55:35.32#ibcon#read 5, iclass 34, count 2 2006.229.09:55:35.32#ibcon#about to read 6, iclass 34, count 2 2006.229.09:55:35.32#ibcon#read 6, iclass 34, count 2 2006.229.09:55:35.32#ibcon#end of sib2, iclass 34, count 2 2006.229.09:55:35.32#ibcon#*mode == 0, iclass 34, count 2 2006.229.09:55:35.32#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.09:55:35.32#ibcon#[27=AT02-04\r\n] 2006.229.09:55:35.32#ibcon#*before write, iclass 34, count 2 2006.229.09:55:35.32#ibcon#enter sib2, iclass 34, count 2 2006.229.09:55:35.32#ibcon#flushed, iclass 34, count 2 2006.229.09:55:35.32#ibcon#about to write, iclass 34, count 2 2006.229.09:55:35.32#ibcon#wrote, iclass 34, count 2 2006.229.09:55:35.32#ibcon#about to read 3, iclass 34, count 2 2006.229.09:55:35.35#ibcon#read 3, iclass 34, count 2 2006.229.09:55:35.35#ibcon#about to read 4, iclass 34, count 2 2006.229.09:55:35.35#ibcon#read 4, iclass 34, count 2 2006.229.09:55:35.35#ibcon#about to read 5, iclass 34, count 2 2006.229.09:55:35.35#ibcon#read 5, iclass 34, count 2 2006.229.09:55:35.35#ibcon#about to read 6, iclass 34, count 2 2006.229.09:55:35.35#ibcon#read 6, iclass 34, count 2 2006.229.09:55:35.35#ibcon#end of sib2, iclass 34, count 2 2006.229.09:55:35.35#ibcon#*after write, iclass 34, count 2 2006.229.09:55:35.35#ibcon#*before return 0, iclass 34, count 2 2006.229.09:55:35.35#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:35.35#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.09:55:35.35#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.09:55:35.35#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:35.35#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:35.47#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:35.47#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:35.47#ibcon#enter wrdev, iclass 34, count 0 2006.229.09:55:35.47#ibcon#first serial, iclass 34, count 0 2006.229.09:55:35.47#ibcon#enter sib2, iclass 34, count 0 2006.229.09:55:35.47#ibcon#flushed, iclass 34, count 0 2006.229.09:55:35.47#ibcon#about to write, iclass 34, count 0 2006.229.09:55:35.47#ibcon#wrote, iclass 34, count 0 2006.229.09:55:35.47#ibcon#about to read 3, iclass 34, count 0 2006.229.09:55:35.49#ibcon#read 3, iclass 34, count 0 2006.229.09:55:35.49#ibcon#about to read 4, iclass 34, count 0 2006.229.09:55:35.49#ibcon#read 4, iclass 34, count 0 2006.229.09:55:35.49#ibcon#about to read 5, iclass 34, count 0 2006.229.09:55:35.49#ibcon#read 5, iclass 34, count 0 2006.229.09:55:35.49#ibcon#about to read 6, iclass 34, count 0 2006.229.09:55:35.49#ibcon#read 6, iclass 34, count 0 2006.229.09:55:35.49#ibcon#end of sib2, iclass 34, count 0 2006.229.09:55:35.49#ibcon#*mode == 0, iclass 34, count 0 2006.229.09:55:35.49#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.09:55:35.49#ibcon#[27=USB\r\n] 2006.229.09:55:35.49#ibcon#*before write, iclass 34, count 0 2006.229.09:55:35.49#ibcon#enter sib2, iclass 34, count 0 2006.229.09:55:35.49#ibcon#flushed, iclass 34, count 0 2006.229.09:55:35.49#ibcon#about to write, iclass 34, count 0 2006.229.09:55:35.49#ibcon#wrote, iclass 34, count 0 2006.229.09:55:35.49#ibcon#about to read 3, iclass 34, count 0 2006.229.09:55:35.52#ibcon#read 3, iclass 34, count 0 2006.229.09:55:35.52#ibcon#about to read 4, iclass 34, count 0 2006.229.09:55:35.52#ibcon#read 4, iclass 34, count 0 2006.229.09:55:35.52#ibcon#about to read 5, iclass 34, count 0 2006.229.09:55:35.52#ibcon#read 5, iclass 34, count 0 2006.229.09:55:35.52#ibcon#about to read 6, iclass 34, count 0 2006.229.09:55:35.52#ibcon#read 6, iclass 34, count 0 2006.229.09:55:35.52#ibcon#end of sib2, iclass 34, count 0 2006.229.09:55:35.52#ibcon#*after write, iclass 34, count 0 2006.229.09:55:35.52#ibcon#*before return 0, iclass 34, count 0 2006.229.09:55:35.52#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:35.52#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.09:55:35.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.09:55:35.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.09:55:35.52$vck44/vblo=3,649.99 2006.229.09:55:35.52#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.09:55:35.53#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.09:55:35.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:35.53#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:35.53#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:35.53#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:35.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.09:55:35.53#ibcon#first serial, iclass 36, count 0 2006.229.09:55:35.53#ibcon#enter sib2, iclass 36, count 0 2006.229.09:55:35.53#ibcon#flushed, iclass 36, count 0 2006.229.09:55:35.53#ibcon#about to write, iclass 36, count 0 2006.229.09:55:35.53#ibcon#wrote, iclass 36, count 0 2006.229.09:55:35.53#ibcon#about to read 3, iclass 36, count 0 2006.229.09:55:35.54#ibcon#read 3, iclass 36, count 0 2006.229.09:55:35.54#ibcon#about to read 4, iclass 36, count 0 2006.229.09:55:35.54#ibcon#read 4, iclass 36, count 0 2006.229.09:55:35.54#ibcon#about to read 5, iclass 36, count 0 2006.229.09:55:35.54#ibcon#read 5, iclass 36, count 0 2006.229.09:55:35.54#ibcon#about to read 6, iclass 36, count 0 2006.229.09:55:35.54#ibcon#read 6, iclass 36, count 0 2006.229.09:55:35.54#ibcon#end of sib2, iclass 36, count 0 2006.229.09:55:35.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.09:55:35.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.09:55:35.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:55:35.54#ibcon#*before write, iclass 36, count 0 2006.229.09:55:35.54#ibcon#enter sib2, iclass 36, count 0 2006.229.09:55:35.54#ibcon#flushed, iclass 36, count 0 2006.229.09:55:35.54#ibcon#about to write, iclass 36, count 0 2006.229.09:55:35.54#ibcon#wrote, iclass 36, count 0 2006.229.09:55:35.54#ibcon#about to read 3, iclass 36, count 0 2006.229.09:55:35.58#ibcon#read 3, iclass 36, count 0 2006.229.09:55:35.58#ibcon#about to read 4, iclass 36, count 0 2006.229.09:55:35.58#ibcon#read 4, iclass 36, count 0 2006.229.09:55:35.58#ibcon#about to read 5, iclass 36, count 0 2006.229.09:55:35.58#ibcon#read 5, iclass 36, count 0 2006.229.09:55:35.58#ibcon#about to read 6, iclass 36, count 0 2006.229.09:55:35.58#ibcon#read 6, iclass 36, count 0 2006.229.09:55:35.58#ibcon#end of sib2, iclass 36, count 0 2006.229.09:55:35.58#ibcon#*after write, iclass 36, count 0 2006.229.09:55:35.58#ibcon#*before return 0, iclass 36, count 0 2006.229.09:55:35.58#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:35.58#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.09:55:35.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.09:55:35.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.09:55:35.58$vck44/vb=3,4 2006.229.09:55:35.58#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.09:55:35.58#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.09:55:35.58#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:35.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:35.64#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:35.64#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:35.64#ibcon#enter wrdev, iclass 38, count 2 2006.229.09:55:35.64#ibcon#first serial, iclass 38, count 2 2006.229.09:55:35.64#ibcon#enter sib2, iclass 38, count 2 2006.229.09:55:35.64#ibcon#flushed, iclass 38, count 2 2006.229.09:55:35.64#ibcon#about to write, iclass 38, count 2 2006.229.09:55:35.64#ibcon#wrote, iclass 38, count 2 2006.229.09:55:35.64#ibcon#about to read 3, iclass 38, count 2 2006.229.09:55:35.66#ibcon#read 3, iclass 38, count 2 2006.229.09:55:35.66#ibcon#about to read 4, iclass 38, count 2 2006.229.09:55:35.66#ibcon#read 4, iclass 38, count 2 2006.229.09:55:35.66#ibcon#about to read 5, iclass 38, count 2 2006.229.09:55:35.66#ibcon#read 5, iclass 38, count 2 2006.229.09:55:35.66#ibcon#about to read 6, iclass 38, count 2 2006.229.09:55:35.66#ibcon#read 6, iclass 38, count 2 2006.229.09:55:35.66#ibcon#end of sib2, iclass 38, count 2 2006.229.09:55:35.66#ibcon#*mode == 0, iclass 38, count 2 2006.229.09:55:35.66#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.09:55:35.66#ibcon#[27=AT03-04\r\n] 2006.229.09:55:35.66#ibcon#*before write, iclass 38, count 2 2006.229.09:55:35.66#ibcon#enter sib2, iclass 38, count 2 2006.229.09:55:35.66#ibcon#flushed, iclass 38, count 2 2006.229.09:55:35.66#ibcon#about to write, iclass 38, count 2 2006.229.09:55:35.66#ibcon#wrote, iclass 38, count 2 2006.229.09:55:35.66#ibcon#about to read 3, iclass 38, count 2 2006.229.09:55:35.69#ibcon#read 3, iclass 38, count 2 2006.229.09:55:35.69#ibcon#about to read 4, iclass 38, count 2 2006.229.09:55:35.69#ibcon#read 4, iclass 38, count 2 2006.229.09:55:35.69#ibcon#about to read 5, iclass 38, count 2 2006.229.09:55:35.69#ibcon#read 5, iclass 38, count 2 2006.229.09:55:35.69#ibcon#about to read 6, iclass 38, count 2 2006.229.09:55:35.69#ibcon#read 6, iclass 38, count 2 2006.229.09:55:35.69#ibcon#end of sib2, iclass 38, count 2 2006.229.09:55:35.69#ibcon#*after write, iclass 38, count 2 2006.229.09:55:35.69#ibcon#*before return 0, iclass 38, count 2 2006.229.09:55:35.69#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:35.69#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.09:55:35.69#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.09:55:35.69#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:35.69#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:35.81#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:35.81#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:35.81#ibcon#enter wrdev, iclass 38, count 0 2006.229.09:55:35.81#ibcon#first serial, iclass 38, count 0 2006.229.09:55:35.81#ibcon#enter sib2, iclass 38, count 0 2006.229.09:55:35.81#ibcon#flushed, iclass 38, count 0 2006.229.09:55:35.81#ibcon#about to write, iclass 38, count 0 2006.229.09:55:35.81#ibcon#wrote, iclass 38, count 0 2006.229.09:55:35.81#ibcon#about to read 3, iclass 38, count 0 2006.229.09:55:35.83#ibcon#read 3, iclass 38, count 0 2006.229.09:55:35.83#ibcon#about to read 4, iclass 38, count 0 2006.229.09:55:35.83#ibcon#read 4, iclass 38, count 0 2006.229.09:55:35.83#ibcon#about to read 5, iclass 38, count 0 2006.229.09:55:35.83#ibcon#read 5, iclass 38, count 0 2006.229.09:55:35.83#ibcon#about to read 6, iclass 38, count 0 2006.229.09:55:35.83#ibcon#read 6, iclass 38, count 0 2006.229.09:55:35.83#ibcon#end of sib2, iclass 38, count 0 2006.229.09:55:35.83#ibcon#*mode == 0, iclass 38, count 0 2006.229.09:55:35.83#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.09:55:35.83#ibcon#[27=USB\r\n] 2006.229.09:55:35.83#ibcon#*before write, iclass 38, count 0 2006.229.09:55:35.83#ibcon#enter sib2, iclass 38, count 0 2006.229.09:55:35.83#ibcon#flushed, iclass 38, count 0 2006.229.09:55:35.83#ibcon#about to write, iclass 38, count 0 2006.229.09:55:35.83#ibcon#wrote, iclass 38, count 0 2006.229.09:55:35.83#ibcon#about to read 3, iclass 38, count 0 2006.229.09:55:35.86#ibcon#read 3, iclass 38, count 0 2006.229.09:55:35.86#ibcon#about to read 4, iclass 38, count 0 2006.229.09:55:35.86#ibcon#read 4, iclass 38, count 0 2006.229.09:55:35.86#ibcon#about to read 5, iclass 38, count 0 2006.229.09:55:35.86#ibcon#read 5, iclass 38, count 0 2006.229.09:55:35.86#ibcon#about to read 6, iclass 38, count 0 2006.229.09:55:35.86#ibcon#read 6, iclass 38, count 0 2006.229.09:55:35.86#ibcon#end of sib2, iclass 38, count 0 2006.229.09:55:35.86#ibcon#*after write, iclass 38, count 0 2006.229.09:55:35.86#ibcon#*before return 0, iclass 38, count 0 2006.229.09:55:35.86#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:35.86#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.09:55:35.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.09:55:35.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.09:55:35.86$vck44/vblo=4,679.99 2006.229.09:55:35.86#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.09:55:35.86#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.09:55:35.86#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:35.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:35.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:35.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:35.86#ibcon#enter wrdev, iclass 40, count 0 2006.229.09:55:35.86#ibcon#first serial, iclass 40, count 0 2006.229.09:55:35.86#ibcon#enter sib2, iclass 40, count 0 2006.229.09:55:35.86#ibcon#flushed, iclass 40, count 0 2006.229.09:55:35.86#ibcon#about to write, iclass 40, count 0 2006.229.09:55:35.87#ibcon#wrote, iclass 40, count 0 2006.229.09:55:35.87#ibcon#about to read 3, iclass 40, count 0 2006.229.09:55:35.88#ibcon#read 3, iclass 40, count 0 2006.229.09:55:35.88#ibcon#about to read 4, iclass 40, count 0 2006.229.09:55:35.88#ibcon#read 4, iclass 40, count 0 2006.229.09:55:35.88#ibcon#about to read 5, iclass 40, count 0 2006.229.09:55:35.88#ibcon#read 5, iclass 40, count 0 2006.229.09:55:35.88#ibcon#about to read 6, iclass 40, count 0 2006.229.09:55:35.88#ibcon#read 6, iclass 40, count 0 2006.229.09:55:35.88#ibcon#end of sib2, iclass 40, count 0 2006.229.09:55:35.88#ibcon#*mode == 0, iclass 40, count 0 2006.229.09:55:35.88#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.09:55:35.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:55:35.88#ibcon#*before write, iclass 40, count 0 2006.229.09:55:35.88#ibcon#enter sib2, iclass 40, count 0 2006.229.09:55:35.88#ibcon#flushed, iclass 40, count 0 2006.229.09:55:35.88#ibcon#about to write, iclass 40, count 0 2006.229.09:55:35.88#ibcon#wrote, iclass 40, count 0 2006.229.09:55:35.88#ibcon#about to read 3, iclass 40, count 0 2006.229.09:55:35.92#ibcon#read 3, iclass 40, count 0 2006.229.09:55:35.92#ibcon#about to read 4, iclass 40, count 0 2006.229.09:55:35.92#ibcon#read 4, iclass 40, count 0 2006.229.09:55:35.92#ibcon#about to read 5, iclass 40, count 0 2006.229.09:55:35.92#ibcon#read 5, iclass 40, count 0 2006.229.09:55:35.92#ibcon#about to read 6, iclass 40, count 0 2006.229.09:55:35.92#ibcon#read 6, iclass 40, count 0 2006.229.09:55:35.92#ibcon#end of sib2, iclass 40, count 0 2006.229.09:55:35.92#ibcon#*after write, iclass 40, count 0 2006.229.09:55:35.92#ibcon#*before return 0, iclass 40, count 0 2006.229.09:55:35.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:35.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.09:55:35.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.09:55:35.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.09:55:35.92$vck44/vb=4,4 2006.229.09:55:35.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.09:55:35.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.09:55:35.92#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:35.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:35.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:35.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:35.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.09:55:35.98#ibcon#first serial, iclass 4, count 2 2006.229.09:55:35.98#ibcon#enter sib2, iclass 4, count 2 2006.229.09:55:35.98#ibcon#flushed, iclass 4, count 2 2006.229.09:55:35.98#ibcon#about to write, iclass 4, count 2 2006.229.09:55:35.98#ibcon#wrote, iclass 4, count 2 2006.229.09:55:35.98#ibcon#about to read 3, iclass 4, count 2 2006.229.09:55:36.00#ibcon#read 3, iclass 4, count 2 2006.229.09:55:36.00#ibcon#about to read 4, iclass 4, count 2 2006.229.09:55:36.00#ibcon#read 4, iclass 4, count 2 2006.229.09:55:36.00#ibcon#about to read 5, iclass 4, count 2 2006.229.09:55:36.00#ibcon#read 5, iclass 4, count 2 2006.229.09:55:36.00#ibcon#about to read 6, iclass 4, count 2 2006.229.09:55:36.00#ibcon#read 6, iclass 4, count 2 2006.229.09:55:36.00#ibcon#end of sib2, iclass 4, count 2 2006.229.09:55:36.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.09:55:36.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.09:55:36.00#ibcon#[27=AT04-04\r\n] 2006.229.09:55:36.00#ibcon#*before write, iclass 4, count 2 2006.229.09:55:36.00#ibcon#enter sib2, iclass 4, count 2 2006.229.09:55:36.00#ibcon#flushed, iclass 4, count 2 2006.229.09:55:36.00#ibcon#about to write, iclass 4, count 2 2006.229.09:55:36.00#ibcon#wrote, iclass 4, count 2 2006.229.09:55:36.00#ibcon#about to read 3, iclass 4, count 2 2006.229.09:55:36.03#ibcon#read 3, iclass 4, count 2 2006.229.09:55:36.03#ibcon#about to read 4, iclass 4, count 2 2006.229.09:55:36.03#ibcon#read 4, iclass 4, count 2 2006.229.09:55:36.03#ibcon#about to read 5, iclass 4, count 2 2006.229.09:55:36.03#ibcon#read 5, iclass 4, count 2 2006.229.09:55:36.03#ibcon#about to read 6, iclass 4, count 2 2006.229.09:55:36.03#ibcon#read 6, iclass 4, count 2 2006.229.09:55:36.03#ibcon#end of sib2, iclass 4, count 2 2006.229.09:55:36.03#ibcon#*after write, iclass 4, count 2 2006.229.09:55:36.03#ibcon#*before return 0, iclass 4, count 2 2006.229.09:55:36.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:36.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.09:55:36.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.09:55:36.03#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:36.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:36.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:36.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:36.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.09:55:36.15#ibcon#first serial, iclass 4, count 0 2006.229.09:55:36.15#ibcon#enter sib2, iclass 4, count 0 2006.229.09:55:36.15#ibcon#flushed, iclass 4, count 0 2006.229.09:55:36.15#ibcon#about to write, iclass 4, count 0 2006.229.09:55:36.15#ibcon#wrote, iclass 4, count 0 2006.229.09:55:36.15#ibcon#about to read 3, iclass 4, count 0 2006.229.09:55:36.17#ibcon#read 3, iclass 4, count 0 2006.229.09:55:36.17#ibcon#about to read 4, iclass 4, count 0 2006.229.09:55:36.17#ibcon#read 4, iclass 4, count 0 2006.229.09:55:36.17#ibcon#about to read 5, iclass 4, count 0 2006.229.09:55:36.17#ibcon#read 5, iclass 4, count 0 2006.229.09:55:36.17#ibcon#about to read 6, iclass 4, count 0 2006.229.09:55:36.17#ibcon#read 6, iclass 4, count 0 2006.229.09:55:36.17#ibcon#end of sib2, iclass 4, count 0 2006.229.09:55:36.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.09:55:36.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.09:55:36.17#ibcon#[27=USB\r\n] 2006.229.09:55:36.17#ibcon#*before write, iclass 4, count 0 2006.229.09:55:36.17#ibcon#enter sib2, iclass 4, count 0 2006.229.09:55:36.17#ibcon#flushed, iclass 4, count 0 2006.229.09:55:36.17#ibcon#about to write, iclass 4, count 0 2006.229.09:55:36.17#ibcon#wrote, iclass 4, count 0 2006.229.09:55:36.17#ibcon#about to read 3, iclass 4, count 0 2006.229.09:55:36.20#ibcon#read 3, iclass 4, count 0 2006.229.09:55:36.20#ibcon#about to read 4, iclass 4, count 0 2006.229.09:55:36.20#ibcon#read 4, iclass 4, count 0 2006.229.09:55:36.20#ibcon#about to read 5, iclass 4, count 0 2006.229.09:55:36.20#ibcon#read 5, iclass 4, count 0 2006.229.09:55:36.20#ibcon#about to read 6, iclass 4, count 0 2006.229.09:55:36.20#ibcon#read 6, iclass 4, count 0 2006.229.09:55:36.20#ibcon#end of sib2, iclass 4, count 0 2006.229.09:55:36.20#ibcon#*after write, iclass 4, count 0 2006.229.09:55:36.20#ibcon#*before return 0, iclass 4, count 0 2006.229.09:55:36.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:36.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.09:55:36.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.09:55:36.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.09:55:36.20$vck44/vblo=5,709.99 2006.229.09:55:36.20#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.09:55:36.20#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.09:55:36.20#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:36.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:36.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:36.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:36.20#ibcon#enter wrdev, iclass 6, count 0 2006.229.09:55:36.20#ibcon#first serial, iclass 6, count 0 2006.229.09:55:36.20#ibcon#enter sib2, iclass 6, count 0 2006.229.09:55:36.20#ibcon#flushed, iclass 6, count 0 2006.229.09:55:36.20#ibcon#about to write, iclass 6, count 0 2006.229.09:55:36.21#ibcon#wrote, iclass 6, count 0 2006.229.09:55:36.21#ibcon#about to read 3, iclass 6, count 0 2006.229.09:55:36.22#ibcon#read 3, iclass 6, count 0 2006.229.09:55:36.22#ibcon#about to read 4, iclass 6, count 0 2006.229.09:55:36.22#ibcon#read 4, iclass 6, count 0 2006.229.09:55:36.22#ibcon#about to read 5, iclass 6, count 0 2006.229.09:55:36.22#ibcon#read 5, iclass 6, count 0 2006.229.09:55:36.22#ibcon#about to read 6, iclass 6, count 0 2006.229.09:55:36.22#ibcon#read 6, iclass 6, count 0 2006.229.09:55:36.22#ibcon#end of sib2, iclass 6, count 0 2006.229.09:55:36.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.09:55:36.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.09:55:36.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:55:36.22#ibcon#*before write, iclass 6, count 0 2006.229.09:55:36.22#ibcon#enter sib2, iclass 6, count 0 2006.229.09:55:36.22#ibcon#flushed, iclass 6, count 0 2006.229.09:55:36.22#ibcon#about to write, iclass 6, count 0 2006.229.09:55:36.22#ibcon#wrote, iclass 6, count 0 2006.229.09:55:36.22#ibcon#about to read 3, iclass 6, count 0 2006.229.09:55:36.26#ibcon#read 3, iclass 6, count 0 2006.229.09:55:36.26#ibcon#about to read 4, iclass 6, count 0 2006.229.09:55:36.26#ibcon#read 4, iclass 6, count 0 2006.229.09:55:36.26#ibcon#about to read 5, iclass 6, count 0 2006.229.09:55:36.26#ibcon#read 5, iclass 6, count 0 2006.229.09:55:36.26#ibcon#about to read 6, iclass 6, count 0 2006.229.09:55:36.26#ibcon#read 6, iclass 6, count 0 2006.229.09:55:36.26#ibcon#end of sib2, iclass 6, count 0 2006.229.09:55:36.26#ibcon#*after write, iclass 6, count 0 2006.229.09:55:36.26#ibcon#*before return 0, iclass 6, count 0 2006.229.09:55:36.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:36.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.09:55:36.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.09:55:36.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.09:55:36.26$vck44/vb=5,4 2006.229.09:55:36.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.09:55:36.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.09:55:36.26#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:36.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:36.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:36.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:36.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.09:55:36.32#ibcon#first serial, iclass 10, count 2 2006.229.09:55:36.32#ibcon#enter sib2, iclass 10, count 2 2006.229.09:55:36.32#ibcon#flushed, iclass 10, count 2 2006.229.09:55:36.32#ibcon#about to write, iclass 10, count 2 2006.229.09:55:36.32#ibcon#wrote, iclass 10, count 2 2006.229.09:55:36.32#ibcon#about to read 3, iclass 10, count 2 2006.229.09:55:36.34#ibcon#read 3, iclass 10, count 2 2006.229.09:55:36.34#ibcon#about to read 4, iclass 10, count 2 2006.229.09:55:36.34#ibcon#read 4, iclass 10, count 2 2006.229.09:55:36.34#ibcon#about to read 5, iclass 10, count 2 2006.229.09:55:36.34#ibcon#read 5, iclass 10, count 2 2006.229.09:55:36.34#ibcon#about to read 6, iclass 10, count 2 2006.229.09:55:36.34#ibcon#read 6, iclass 10, count 2 2006.229.09:55:36.34#ibcon#end of sib2, iclass 10, count 2 2006.229.09:55:36.34#ibcon#*mode == 0, iclass 10, count 2 2006.229.09:55:36.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.09:55:36.34#ibcon#[27=AT05-04\r\n] 2006.229.09:55:36.34#ibcon#*before write, iclass 10, count 2 2006.229.09:55:36.34#ibcon#enter sib2, iclass 10, count 2 2006.229.09:55:36.34#ibcon#flushed, iclass 10, count 2 2006.229.09:55:36.34#ibcon#about to write, iclass 10, count 2 2006.229.09:55:36.34#ibcon#wrote, iclass 10, count 2 2006.229.09:55:36.34#ibcon#about to read 3, iclass 10, count 2 2006.229.09:55:36.37#ibcon#read 3, iclass 10, count 2 2006.229.09:55:36.37#ibcon#about to read 4, iclass 10, count 2 2006.229.09:55:36.37#ibcon#read 4, iclass 10, count 2 2006.229.09:55:36.37#ibcon#about to read 5, iclass 10, count 2 2006.229.09:55:36.37#ibcon#read 5, iclass 10, count 2 2006.229.09:55:36.37#ibcon#about to read 6, iclass 10, count 2 2006.229.09:55:36.37#ibcon#read 6, iclass 10, count 2 2006.229.09:55:36.37#ibcon#end of sib2, iclass 10, count 2 2006.229.09:55:36.37#ibcon#*after write, iclass 10, count 2 2006.229.09:55:36.37#ibcon#*before return 0, iclass 10, count 2 2006.229.09:55:36.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:36.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.09:55:36.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.09:55:36.37#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:36.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:36.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:36.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:36.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.09:55:36.49#ibcon#first serial, iclass 10, count 0 2006.229.09:55:36.49#ibcon#enter sib2, iclass 10, count 0 2006.229.09:55:36.49#ibcon#flushed, iclass 10, count 0 2006.229.09:55:36.49#ibcon#about to write, iclass 10, count 0 2006.229.09:55:36.49#ibcon#wrote, iclass 10, count 0 2006.229.09:55:36.49#ibcon#about to read 3, iclass 10, count 0 2006.229.09:55:36.51#ibcon#read 3, iclass 10, count 0 2006.229.09:55:36.51#ibcon#about to read 4, iclass 10, count 0 2006.229.09:55:36.51#ibcon#read 4, iclass 10, count 0 2006.229.09:55:36.51#ibcon#about to read 5, iclass 10, count 0 2006.229.09:55:36.51#ibcon#read 5, iclass 10, count 0 2006.229.09:55:36.51#ibcon#about to read 6, iclass 10, count 0 2006.229.09:55:36.51#ibcon#read 6, iclass 10, count 0 2006.229.09:55:36.51#ibcon#end of sib2, iclass 10, count 0 2006.229.09:55:36.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.09:55:36.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.09:55:36.51#ibcon#[27=USB\r\n] 2006.229.09:55:36.51#ibcon#*before write, iclass 10, count 0 2006.229.09:55:36.51#ibcon#enter sib2, iclass 10, count 0 2006.229.09:55:36.51#ibcon#flushed, iclass 10, count 0 2006.229.09:55:36.51#ibcon#about to write, iclass 10, count 0 2006.229.09:55:36.51#ibcon#wrote, iclass 10, count 0 2006.229.09:55:36.51#ibcon#about to read 3, iclass 10, count 0 2006.229.09:55:36.54#ibcon#read 3, iclass 10, count 0 2006.229.09:55:36.54#ibcon#about to read 4, iclass 10, count 0 2006.229.09:55:36.54#ibcon#read 4, iclass 10, count 0 2006.229.09:55:36.54#ibcon#about to read 5, iclass 10, count 0 2006.229.09:55:36.54#ibcon#read 5, iclass 10, count 0 2006.229.09:55:36.54#ibcon#about to read 6, iclass 10, count 0 2006.229.09:55:36.54#ibcon#read 6, iclass 10, count 0 2006.229.09:55:36.54#ibcon#end of sib2, iclass 10, count 0 2006.229.09:55:36.54#ibcon#*after write, iclass 10, count 0 2006.229.09:55:36.54#ibcon#*before return 0, iclass 10, count 0 2006.229.09:55:36.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:36.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.09:55:36.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.09:55:36.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.09:55:36.54$vck44/vblo=6,719.99 2006.229.09:55:36.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.09:55:36.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.09:55:36.54#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:36.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:36.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:36.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:36.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.09:55:36.54#ibcon#first serial, iclass 12, count 0 2006.229.09:55:36.54#ibcon#enter sib2, iclass 12, count 0 2006.229.09:55:36.54#ibcon#flushed, iclass 12, count 0 2006.229.09:55:36.54#ibcon#about to write, iclass 12, count 0 2006.229.09:55:36.55#ibcon#wrote, iclass 12, count 0 2006.229.09:55:36.55#ibcon#about to read 3, iclass 12, count 0 2006.229.09:55:36.56#ibcon#read 3, iclass 12, count 0 2006.229.09:55:36.56#ibcon#about to read 4, iclass 12, count 0 2006.229.09:55:36.56#ibcon#read 4, iclass 12, count 0 2006.229.09:55:36.56#ibcon#about to read 5, iclass 12, count 0 2006.229.09:55:36.56#ibcon#read 5, iclass 12, count 0 2006.229.09:55:36.56#ibcon#about to read 6, iclass 12, count 0 2006.229.09:55:36.56#ibcon#read 6, iclass 12, count 0 2006.229.09:55:36.56#ibcon#end of sib2, iclass 12, count 0 2006.229.09:55:36.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.09:55:36.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.09:55:36.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:55:36.56#ibcon#*before write, iclass 12, count 0 2006.229.09:55:36.56#ibcon#enter sib2, iclass 12, count 0 2006.229.09:55:36.56#ibcon#flushed, iclass 12, count 0 2006.229.09:55:36.56#ibcon#about to write, iclass 12, count 0 2006.229.09:55:36.56#ibcon#wrote, iclass 12, count 0 2006.229.09:55:36.56#ibcon#about to read 3, iclass 12, count 0 2006.229.09:55:36.60#ibcon#read 3, iclass 12, count 0 2006.229.09:55:36.60#ibcon#about to read 4, iclass 12, count 0 2006.229.09:55:36.60#ibcon#read 4, iclass 12, count 0 2006.229.09:55:36.60#ibcon#about to read 5, iclass 12, count 0 2006.229.09:55:36.60#ibcon#read 5, iclass 12, count 0 2006.229.09:55:36.60#ibcon#about to read 6, iclass 12, count 0 2006.229.09:55:36.60#ibcon#read 6, iclass 12, count 0 2006.229.09:55:36.60#ibcon#end of sib2, iclass 12, count 0 2006.229.09:55:36.60#ibcon#*after write, iclass 12, count 0 2006.229.09:55:36.60#ibcon#*before return 0, iclass 12, count 0 2006.229.09:55:36.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:36.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.09:55:36.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.09:55:36.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.09:55:36.60$vck44/vb=6,4 2006.229.09:55:36.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:55:36.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:55:36.60#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:36.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:36.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:36.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:36.66#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:55:36.66#ibcon#first serial, iclass 14, count 2 2006.229.09:55:36.66#ibcon#enter sib2, iclass 14, count 2 2006.229.09:55:36.66#ibcon#flushed, iclass 14, count 2 2006.229.09:55:36.66#ibcon#about to write, iclass 14, count 2 2006.229.09:55:36.66#ibcon#wrote, iclass 14, count 2 2006.229.09:55:36.66#ibcon#about to read 3, iclass 14, count 2 2006.229.09:55:36.68#ibcon#read 3, iclass 14, count 2 2006.229.09:55:36.68#ibcon#about to read 4, iclass 14, count 2 2006.229.09:55:36.68#ibcon#read 4, iclass 14, count 2 2006.229.09:55:36.68#ibcon#about to read 5, iclass 14, count 2 2006.229.09:55:36.68#ibcon#read 5, iclass 14, count 2 2006.229.09:55:36.68#ibcon#about to read 6, iclass 14, count 2 2006.229.09:55:36.68#ibcon#read 6, iclass 14, count 2 2006.229.09:55:36.68#ibcon#end of sib2, iclass 14, count 2 2006.229.09:55:36.68#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:55:36.68#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:55:36.68#ibcon#[27=AT06-04\r\n] 2006.229.09:55:36.68#ibcon#*before write, iclass 14, count 2 2006.229.09:55:36.68#ibcon#enter sib2, iclass 14, count 2 2006.229.09:55:36.68#ibcon#flushed, iclass 14, count 2 2006.229.09:55:36.68#ibcon#about to write, iclass 14, count 2 2006.229.09:55:36.68#ibcon#wrote, iclass 14, count 2 2006.229.09:55:36.68#ibcon#about to read 3, iclass 14, count 2 2006.229.09:55:36.71#ibcon#read 3, iclass 14, count 2 2006.229.09:55:36.71#ibcon#about to read 4, iclass 14, count 2 2006.229.09:55:36.71#ibcon#read 4, iclass 14, count 2 2006.229.09:55:36.71#ibcon#about to read 5, iclass 14, count 2 2006.229.09:55:36.71#ibcon#read 5, iclass 14, count 2 2006.229.09:55:36.71#ibcon#about to read 6, iclass 14, count 2 2006.229.09:55:36.71#ibcon#read 6, iclass 14, count 2 2006.229.09:55:36.71#ibcon#end of sib2, iclass 14, count 2 2006.229.09:55:36.71#ibcon#*after write, iclass 14, count 2 2006.229.09:55:36.71#ibcon#*before return 0, iclass 14, count 2 2006.229.09:55:36.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:36.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:55:36.71#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:55:36.71#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:36.71#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:36.83#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:36.83#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:36.83#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:55:36.83#ibcon#first serial, iclass 14, count 0 2006.229.09:55:36.83#ibcon#enter sib2, iclass 14, count 0 2006.229.09:55:36.83#ibcon#flushed, iclass 14, count 0 2006.229.09:55:36.83#ibcon#about to write, iclass 14, count 0 2006.229.09:55:36.83#ibcon#wrote, iclass 14, count 0 2006.229.09:55:36.83#ibcon#about to read 3, iclass 14, count 0 2006.229.09:55:36.85#ibcon#read 3, iclass 14, count 0 2006.229.09:55:36.85#ibcon#about to read 4, iclass 14, count 0 2006.229.09:55:36.85#ibcon#read 4, iclass 14, count 0 2006.229.09:55:36.85#ibcon#about to read 5, iclass 14, count 0 2006.229.09:55:36.85#ibcon#read 5, iclass 14, count 0 2006.229.09:55:36.85#ibcon#about to read 6, iclass 14, count 0 2006.229.09:55:36.85#ibcon#read 6, iclass 14, count 0 2006.229.09:55:36.85#ibcon#end of sib2, iclass 14, count 0 2006.229.09:55:36.85#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:55:36.85#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:55:36.85#ibcon#[27=USB\r\n] 2006.229.09:55:36.85#ibcon#*before write, iclass 14, count 0 2006.229.09:55:36.85#ibcon#enter sib2, iclass 14, count 0 2006.229.09:55:36.85#ibcon#flushed, iclass 14, count 0 2006.229.09:55:36.85#ibcon#about to write, iclass 14, count 0 2006.229.09:55:36.85#ibcon#wrote, iclass 14, count 0 2006.229.09:55:36.85#ibcon#about to read 3, iclass 14, count 0 2006.229.09:55:36.88#ibcon#read 3, iclass 14, count 0 2006.229.09:55:36.88#ibcon#about to read 4, iclass 14, count 0 2006.229.09:55:36.88#ibcon#read 4, iclass 14, count 0 2006.229.09:55:36.88#ibcon#about to read 5, iclass 14, count 0 2006.229.09:55:36.88#ibcon#read 5, iclass 14, count 0 2006.229.09:55:36.88#ibcon#about to read 6, iclass 14, count 0 2006.229.09:55:36.88#ibcon#read 6, iclass 14, count 0 2006.229.09:55:36.88#ibcon#end of sib2, iclass 14, count 0 2006.229.09:55:36.88#ibcon#*after write, iclass 14, count 0 2006.229.09:55:36.88#ibcon#*before return 0, iclass 14, count 0 2006.229.09:55:36.88#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:36.88#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:55:36.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:55:36.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:55:36.88$vck44/vblo=7,734.99 2006.229.09:55:36.88#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.09:55:36.88#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.09:55:36.88#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:36.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:36.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:36.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:36.88#ibcon#enter wrdev, iclass 16, count 0 2006.229.09:55:36.88#ibcon#first serial, iclass 16, count 0 2006.229.09:55:36.88#ibcon#enter sib2, iclass 16, count 0 2006.229.09:55:36.88#ibcon#flushed, iclass 16, count 0 2006.229.09:55:36.88#ibcon#about to write, iclass 16, count 0 2006.229.09:55:36.88#ibcon#wrote, iclass 16, count 0 2006.229.09:55:36.88#ibcon#about to read 3, iclass 16, count 0 2006.229.09:55:36.90#ibcon#read 3, iclass 16, count 0 2006.229.09:55:36.90#ibcon#about to read 4, iclass 16, count 0 2006.229.09:55:36.90#ibcon#read 4, iclass 16, count 0 2006.229.09:55:36.90#ibcon#about to read 5, iclass 16, count 0 2006.229.09:55:36.90#ibcon#read 5, iclass 16, count 0 2006.229.09:55:36.90#ibcon#about to read 6, iclass 16, count 0 2006.229.09:55:36.90#ibcon#read 6, iclass 16, count 0 2006.229.09:55:36.90#ibcon#end of sib2, iclass 16, count 0 2006.229.09:55:36.90#ibcon#*mode == 0, iclass 16, count 0 2006.229.09:55:36.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.09:55:36.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:55:36.90#ibcon#*before write, iclass 16, count 0 2006.229.09:55:36.90#ibcon#enter sib2, iclass 16, count 0 2006.229.09:55:36.90#ibcon#flushed, iclass 16, count 0 2006.229.09:55:36.90#ibcon#about to write, iclass 16, count 0 2006.229.09:55:36.90#ibcon#wrote, iclass 16, count 0 2006.229.09:55:36.90#ibcon#about to read 3, iclass 16, count 0 2006.229.09:55:36.94#ibcon#read 3, iclass 16, count 0 2006.229.09:55:36.94#ibcon#about to read 4, iclass 16, count 0 2006.229.09:55:36.94#ibcon#read 4, iclass 16, count 0 2006.229.09:55:36.94#ibcon#about to read 5, iclass 16, count 0 2006.229.09:55:36.94#ibcon#read 5, iclass 16, count 0 2006.229.09:55:36.94#ibcon#about to read 6, iclass 16, count 0 2006.229.09:55:36.94#ibcon#read 6, iclass 16, count 0 2006.229.09:55:36.94#ibcon#end of sib2, iclass 16, count 0 2006.229.09:55:36.94#ibcon#*after write, iclass 16, count 0 2006.229.09:55:36.94#ibcon#*before return 0, iclass 16, count 0 2006.229.09:55:36.94#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:36.94#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.09:55:36.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.09:55:36.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.09:55:36.94$vck44/vb=7,4 2006.229.09:55:36.94#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.09:55:36.94#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.09:55:36.94#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:36.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:37.00#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:37.00#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:37.00#ibcon#enter wrdev, iclass 18, count 2 2006.229.09:55:37.00#ibcon#first serial, iclass 18, count 2 2006.229.09:55:37.00#ibcon#enter sib2, iclass 18, count 2 2006.229.09:55:37.00#ibcon#flushed, iclass 18, count 2 2006.229.09:55:37.00#ibcon#about to write, iclass 18, count 2 2006.229.09:55:37.00#ibcon#wrote, iclass 18, count 2 2006.229.09:55:37.00#ibcon#about to read 3, iclass 18, count 2 2006.229.09:55:37.02#ibcon#read 3, iclass 18, count 2 2006.229.09:55:37.02#ibcon#about to read 4, iclass 18, count 2 2006.229.09:55:37.02#ibcon#read 4, iclass 18, count 2 2006.229.09:55:37.02#ibcon#about to read 5, iclass 18, count 2 2006.229.09:55:37.02#ibcon#read 5, iclass 18, count 2 2006.229.09:55:37.02#ibcon#about to read 6, iclass 18, count 2 2006.229.09:55:37.02#ibcon#read 6, iclass 18, count 2 2006.229.09:55:37.02#ibcon#end of sib2, iclass 18, count 2 2006.229.09:55:37.02#ibcon#*mode == 0, iclass 18, count 2 2006.229.09:55:37.02#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.09:55:37.02#ibcon#[27=AT07-04\r\n] 2006.229.09:55:37.02#ibcon#*before write, iclass 18, count 2 2006.229.09:55:37.02#ibcon#enter sib2, iclass 18, count 2 2006.229.09:55:37.02#ibcon#flushed, iclass 18, count 2 2006.229.09:55:37.02#ibcon#about to write, iclass 18, count 2 2006.229.09:55:37.02#ibcon#wrote, iclass 18, count 2 2006.229.09:55:37.02#ibcon#about to read 3, iclass 18, count 2 2006.229.09:55:37.05#ibcon#read 3, iclass 18, count 2 2006.229.09:55:37.05#ibcon#about to read 4, iclass 18, count 2 2006.229.09:55:37.05#ibcon#read 4, iclass 18, count 2 2006.229.09:55:37.05#ibcon#about to read 5, iclass 18, count 2 2006.229.09:55:37.05#ibcon#read 5, iclass 18, count 2 2006.229.09:55:37.05#ibcon#about to read 6, iclass 18, count 2 2006.229.09:55:37.05#ibcon#read 6, iclass 18, count 2 2006.229.09:55:37.05#ibcon#end of sib2, iclass 18, count 2 2006.229.09:55:37.05#ibcon#*after write, iclass 18, count 2 2006.229.09:55:37.05#ibcon#*before return 0, iclass 18, count 2 2006.229.09:55:37.05#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:37.05#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.09:55:37.05#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.09:55:37.05#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:37.05#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:37.17#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:37.17#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:37.17#ibcon#enter wrdev, iclass 18, count 0 2006.229.09:55:37.17#ibcon#first serial, iclass 18, count 0 2006.229.09:55:37.17#ibcon#enter sib2, iclass 18, count 0 2006.229.09:55:37.17#ibcon#flushed, iclass 18, count 0 2006.229.09:55:37.17#ibcon#about to write, iclass 18, count 0 2006.229.09:55:37.17#ibcon#wrote, iclass 18, count 0 2006.229.09:55:37.17#ibcon#about to read 3, iclass 18, count 0 2006.229.09:55:37.19#ibcon#read 3, iclass 18, count 0 2006.229.09:55:37.19#ibcon#about to read 4, iclass 18, count 0 2006.229.09:55:37.19#ibcon#read 4, iclass 18, count 0 2006.229.09:55:37.19#ibcon#about to read 5, iclass 18, count 0 2006.229.09:55:37.19#ibcon#read 5, iclass 18, count 0 2006.229.09:55:37.19#ibcon#about to read 6, iclass 18, count 0 2006.229.09:55:37.19#ibcon#read 6, iclass 18, count 0 2006.229.09:55:37.19#ibcon#end of sib2, iclass 18, count 0 2006.229.09:55:37.19#ibcon#*mode == 0, iclass 18, count 0 2006.229.09:55:37.19#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.09:55:37.19#ibcon#[27=USB\r\n] 2006.229.09:55:37.19#ibcon#*before write, iclass 18, count 0 2006.229.09:55:37.19#ibcon#enter sib2, iclass 18, count 0 2006.229.09:55:37.19#ibcon#flushed, iclass 18, count 0 2006.229.09:55:37.19#ibcon#about to write, iclass 18, count 0 2006.229.09:55:37.19#ibcon#wrote, iclass 18, count 0 2006.229.09:55:37.19#ibcon#about to read 3, iclass 18, count 0 2006.229.09:55:37.22#ibcon#read 3, iclass 18, count 0 2006.229.09:55:37.22#ibcon#about to read 4, iclass 18, count 0 2006.229.09:55:37.22#ibcon#read 4, iclass 18, count 0 2006.229.09:55:37.22#ibcon#about to read 5, iclass 18, count 0 2006.229.09:55:37.22#ibcon#read 5, iclass 18, count 0 2006.229.09:55:37.22#ibcon#about to read 6, iclass 18, count 0 2006.229.09:55:37.22#ibcon#read 6, iclass 18, count 0 2006.229.09:55:37.22#ibcon#end of sib2, iclass 18, count 0 2006.229.09:55:37.22#ibcon#*after write, iclass 18, count 0 2006.229.09:55:37.22#ibcon#*before return 0, iclass 18, count 0 2006.229.09:55:37.22#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:37.22#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.09:55:37.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.09:55:37.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.09:55:37.22$vck44/vblo=8,744.99 2006.229.09:55:37.22#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.09:55:37.22#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.09:55:37.22#ibcon#ireg 17 cls_cnt 0 2006.229.09:55:37.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:37.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:37.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:37.22#ibcon#enter wrdev, iclass 20, count 0 2006.229.09:55:37.22#ibcon#first serial, iclass 20, count 0 2006.229.09:55:37.22#ibcon#enter sib2, iclass 20, count 0 2006.229.09:55:37.22#ibcon#flushed, iclass 20, count 0 2006.229.09:55:37.23#ibcon#about to write, iclass 20, count 0 2006.229.09:55:37.23#ibcon#wrote, iclass 20, count 0 2006.229.09:55:37.23#ibcon#about to read 3, iclass 20, count 0 2006.229.09:55:37.24#ibcon#read 3, iclass 20, count 0 2006.229.09:55:37.24#ibcon#about to read 4, iclass 20, count 0 2006.229.09:55:37.24#ibcon#read 4, iclass 20, count 0 2006.229.09:55:37.24#ibcon#about to read 5, iclass 20, count 0 2006.229.09:55:37.24#ibcon#read 5, iclass 20, count 0 2006.229.09:55:37.24#ibcon#about to read 6, iclass 20, count 0 2006.229.09:55:37.24#ibcon#read 6, iclass 20, count 0 2006.229.09:55:37.24#ibcon#end of sib2, iclass 20, count 0 2006.229.09:55:37.24#ibcon#*mode == 0, iclass 20, count 0 2006.229.09:55:37.24#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.09:55:37.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:55:37.24#ibcon#*before write, iclass 20, count 0 2006.229.09:55:37.24#ibcon#enter sib2, iclass 20, count 0 2006.229.09:55:37.24#ibcon#flushed, iclass 20, count 0 2006.229.09:55:37.24#ibcon#about to write, iclass 20, count 0 2006.229.09:55:37.24#ibcon#wrote, iclass 20, count 0 2006.229.09:55:37.24#ibcon#about to read 3, iclass 20, count 0 2006.229.09:55:37.28#ibcon#read 3, iclass 20, count 0 2006.229.09:55:37.28#ibcon#about to read 4, iclass 20, count 0 2006.229.09:55:37.28#ibcon#read 4, iclass 20, count 0 2006.229.09:55:37.28#ibcon#about to read 5, iclass 20, count 0 2006.229.09:55:37.28#ibcon#read 5, iclass 20, count 0 2006.229.09:55:37.28#ibcon#about to read 6, iclass 20, count 0 2006.229.09:55:37.28#ibcon#read 6, iclass 20, count 0 2006.229.09:55:37.28#ibcon#end of sib2, iclass 20, count 0 2006.229.09:55:37.28#ibcon#*after write, iclass 20, count 0 2006.229.09:55:37.28#ibcon#*before return 0, iclass 20, count 0 2006.229.09:55:37.28#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:37.28#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.09:55:37.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.09:55:37.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.09:55:37.28$vck44/vb=8,4 2006.229.09:55:37.28#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.09:55:37.28#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.09:55:37.28#ibcon#ireg 11 cls_cnt 2 2006.229.09:55:37.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:37.34#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:37.34#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:37.34#ibcon#enter wrdev, iclass 22, count 2 2006.229.09:55:37.34#ibcon#first serial, iclass 22, count 2 2006.229.09:55:37.34#ibcon#enter sib2, iclass 22, count 2 2006.229.09:55:37.34#ibcon#flushed, iclass 22, count 2 2006.229.09:55:37.34#ibcon#about to write, iclass 22, count 2 2006.229.09:55:37.34#ibcon#wrote, iclass 22, count 2 2006.229.09:55:37.34#ibcon#about to read 3, iclass 22, count 2 2006.229.09:55:37.36#ibcon#read 3, iclass 22, count 2 2006.229.09:55:37.36#ibcon#about to read 4, iclass 22, count 2 2006.229.09:55:37.36#ibcon#read 4, iclass 22, count 2 2006.229.09:55:37.36#ibcon#about to read 5, iclass 22, count 2 2006.229.09:55:37.36#ibcon#read 5, iclass 22, count 2 2006.229.09:55:37.36#ibcon#about to read 6, iclass 22, count 2 2006.229.09:55:37.36#ibcon#read 6, iclass 22, count 2 2006.229.09:55:37.36#ibcon#end of sib2, iclass 22, count 2 2006.229.09:55:37.36#ibcon#*mode == 0, iclass 22, count 2 2006.229.09:55:37.36#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.09:55:37.36#ibcon#[27=AT08-04\r\n] 2006.229.09:55:37.36#ibcon#*before write, iclass 22, count 2 2006.229.09:55:37.36#ibcon#enter sib2, iclass 22, count 2 2006.229.09:55:37.36#ibcon#flushed, iclass 22, count 2 2006.229.09:55:37.36#ibcon#about to write, iclass 22, count 2 2006.229.09:55:37.36#ibcon#wrote, iclass 22, count 2 2006.229.09:55:37.36#ibcon#about to read 3, iclass 22, count 2 2006.229.09:55:37.39#ibcon#read 3, iclass 22, count 2 2006.229.09:55:37.39#ibcon#about to read 4, iclass 22, count 2 2006.229.09:55:37.39#ibcon#read 4, iclass 22, count 2 2006.229.09:55:37.39#ibcon#about to read 5, iclass 22, count 2 2006.229.09:55:37.39#ibcon#read 5, iclass 22, count 2 2006.229.09:55:37.39#ibcon#about to read 6, iclass 22, count 2 2006.229.09:55:37.39#ibcon#read 6, iclass 22, count 2 2006.229.09:55:37.39#ibcon#end of sib2, iclass 22, count 2 2006.229.09:55:37.39#ibcon#*after write, iclass 22, count 2 2006.229.09:55:37.39#ibcon#*before return 0, iclass 22, count 2 2006.229.09:55:37.39#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:37.39#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.09:55:37.39#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.09:55:37.39#ibcon#ireg 7 cls_cnt 0 2006.229.09:55:37.39#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:37.51#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:37.51#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:37.51#ibcon#enter wrdev, iclass 22, count 0 2006.229.09:55:37.51#ibcon#first serial, iclass 22, count 0 2006.229.09:55:37.51#ibcon#enter sib2, iclass 22, count 0 2006.229.09:55:37.51#ibcon#flushed, iclass 22, count 0 2006.229.09:55:37.51#ibcon#about to write, iclass 22, count 0 2006.229.09:55:37.51#ibcon#wrote, iclass 22, count 0 2006.229.09:55:37.51#ibcon#about to read 3, iclass 22, count 0 2006.229.09:55:37.53#ibcon#read 3, iclass 22, count 0 2006.229.09:55:37.53#ibcon#about to read 4, iclass 22, count 0 2006.229.09:55:37.53#ibcon#read 4, iclass 22, count 0 2006.229.09:55:37.53#ibcon#about to read 5, iclass 22, count 0 2006.229.09:55:37.53#ibcon#read 5, iclass 22, count 0 2006.229.09:55:37.53#ibcon#about to read 6, iclass 22, count 0 2006.229.09:55:37.53#ibcon#read 6, iclass 22, count 0 2006.229.09:55:37.53#ibcon#end of sib2, iclass 22, count 0 2006.229.09:55:37.53#ibcon#*mode == 0, iclass 22, count 0 2006.229.09:55:37.53#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.09:55:37.53#ibcon#[27=USB\r\n] 2006.229.09:55:37.53#ibcon#*before write, iclass 22, count 0 2006.229.09:55:37.53#ibcon#enter sib2, iclass 22, count 0 2006.229.09:55:37.53#ibcon#flushed, iclass 22, count 0 2006.229.09:55:37.53#ibcon#about to write, iclass 22, count 0 2006.229.09:55:37.53#ibcon#wrote, iclass 22, count 0 2006.229.09:55:37.53#ibcon#about to read 3, iclass 22, count 0 2006.229.09:55:37.56#ibcon#read 3, iclass 22, count 0 2006.229.09:55:37.56#ibcon#about to read 4, iclass 22, count 0 2006.229.09:55:37.56#ibcon#read 4, iclass 22, count 0 2006.229.09:55:37.56#ibcon#about to read 5, iclass 22, count 0 2006.229.09:55:37.56#ibcon#read 5, iclass 22, count 0 2006.229.09:55:37.56#ibcon#about to read 6, iclass 22, count 0 2006.229.09:55:37.56#ibcon#read 6, iclass 22, count 0 2006.229.09:55:37.56#ibcon#end of sib2, iclass 22, count 0 2006.229.09:55:37.56#ibcon#*after write, iclass 22, count 0 2006.229.09:55:37.56#ibcon#*before return 0, iclass 22, count 0 2006.229.09:55:37.56#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:37.56#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.09:55:37.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.09:55:37.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.09:55:37.56$vck44/vabw=wide 2006.229.09:55:37.56#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.09:55:37.56#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.09:55:37.56#ibcon#ireg 8 cls_cnt 0 2006.229.09:55:37.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:37.56#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:37.56#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:37.56#ibcon#enter wrdev, iclass 24, count 0 2006.229.09:55:37.56#ibcon#first serial, iclass 24, count 0 2006.229.09:55:37.57#ibcon#enter sib2, iclass 24, count 0 2006.229.09:55:37.57#ibcon#flushed, iclass 24, count 0 2006.229.09:55:37.57#ibcon#about to write, iclass 24, count 0 2006.229.09:55:37.57#ibcon#wrote, iclass 24, count 0 2006.229.09:55:37.57#ibcon#about to read 3, iclass 24, count 0 2006.229.09:55:37.58#ibcon#read 3, iclass 24, count 0 2006.229.09:55:37.58#ibcon#about to read 4, iclass 24, count 0 2006.229.09:55:37.58#ibcon#read 4, iclass 24, count 0 2006.229.09:55:37.58#ibcon#about to read 5, iclass 24, count 0 2006.229.09:55:37.58#ibcon#read 5, iclass 24, count 0 2006.229.09:55:37.58#ibcon#about to read 6, iclass 24, count 0 2006.229.09:55:37.58#ibcon#read 6, iclass 24, count 0 2006.229.09:55:37.58#ibcon#end of sib2, iclass 24, count 0 2006.229.09:55:37.58#ibcon#*mode == 0, iclass 24, count 0 2006.229.09:55:37.58#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.09:55:37.58#ibcon#[25=BW32\r\n] 2006.229.09:55:37.58#ibcon#*before write, iclass 24, count 0 2006.229.09:55:37.58#ibcon#enter sib2, iclass 24, count 0 2006.229.09:55:37.58#ibcon#flushed, iclass 24, count 0 2006.229.09:55:37.58#ibcon#about to write, iclass 24, count 0 2006.229.09:55:37.58#ibcon#wrote, iclass 24, count 0 2006.229.09:55:37.58#ibcon#about to read 3, iclass 24, count 0 2006.229.09:55:37.61#ibcon#read 3, iclass 24, count 0 2006.229.09:55:37.61#ibcon#about to read 4, iclass 24, count 0 2006.229.09:55:37.61#ibcon#read 4, iclass 24, count 0 2006.229.09:55:37.61#ibcon#about to read 5, iclass 24, count 0 2006.229.09:55:37.61#ibcon#read 5, iclass 24, count 0 2006.229.09:55:37.61#ibcon#about to read 6, iclass 24, count 0 2006.229.09:55:37.61#ibcon#read 6, iclass 24, count 0 2006.229.09:55:37.61#ibcon#end of sib2, iclass 24, count 0 2006.229.09:55:37.61#ibcon#*after write, iclass 24, count 0 2006.229.09:55:37.61#ibcon#*before return 0, iclass 24, count 0 2006.229.09:55:37.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:37.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.09:55:37.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.09:55:37.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.09:55:37.61$vck44/vbbw=wide 2006.229.09:55:37.61#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.09:55:37.61#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.09:55:37.61#ibcon#ireg 8 cls_cnt 0 2006.229.09:55:37.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:55:37.68#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:55:37.68#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:55:37.68#ibcon#enter wrdev, iclass 26, count 0 2006.229.09:55:37.68#ibcon#first serial, iclass 26, count 0 2006.229.09:55:37.68#ibcon#enter sib2, iclass 26, count 0 2006.229.09:55:37.68#ibcon#flushed, iclass 26, count 0 2006.229.09:55:37.68#ibcon#about to write, iclass 26, count 0 2006.229.09:55:37.68#ibcon#wrote, iclass 26, count 0 2006.229.09:55:37.68#ibcon#about to read 3, iclass 26, count 0 2006.229.09:55:37.70#ibcon#read 3, iclass 26, count 0 2006.229.09:55:37.70#ibcon#about to read 4, iclass 26, count 0 2006.229.09:55:37.70#ibcon#read 4, iclass 26, count 0 2006.229.09:55:37.70#ibcon#about to read 5, iclass 26, count 0 2006.229.09:55:37.70#ibcon#read 5, iclass 26, count 0 2006.229.09:55:37.70#ibcon#about to read 6, iclass 26, count 0 2006.229.09:55:37.70#ibcon#read 6, iclass 26, count 0 2006.229.09:55:37.70#ibcon#end of sib2, iclass 26, count 0 2006.229.09:55:37.70#ibcon#*mode == 0, iclass 26, count 0 2006.229.09:55:37.70#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.09:55:37.70#ibcon#[27=BW32\r\n] 2006.229.09:55:37.70#ibcon#*before write, iclass 26, count 0 2006.229.09:55:37.70#ibcon#enter sib2, iclass 26, count 0 2006.229.09:55:37.70#ibcon#flushed, iclass 26, count 0 2006.229.09:55:37.70#ibcon#about to write, iclass 26, count 0 2006.229.09:55:37.70#ibcon#wrote, iclass 26, count 0 2006.229.09:55:37.70#ibcon#about to read 3, iclass 26, count 0 2006.229.09:55:37.73#ibcon#read 3, iclass 26, count 0 2006.229.09:55:37.73#ibcon#about to read 4, iclass 26, count 0 2006.229.09:55:37.73#ibcon#read 4, iclass 26, count 0 2006.229.09:55:37.73#ibcon#about to read 5, iclass 26, count 0 2006.229.09:55:37.73#ibcon#read 5, iclass 26, count 0 2006.229.09:55:37.73#ibcon#about to read 6, iclass 26, count 0 2006.229.09:55:37.73#ibcon#read 6, iclass 26, count 0 2006.229.09:55:37.73#ibcon#end of sib2, iclass 26, count 0 2006.229.09:55:37.73#ibcon#*after write, iclass 26, count 0 2006.229.09:55:37.73#ibcon#*before return 0, iclass 26, count 0 2006.229.09:55:37.73#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:55:37.73#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.09:55:37.73#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.09:55:37.73#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.09:55:37.73$setupk4/ifdk4 2006.229.09:55:37.73$ifdk4/lo= 2006.229.09:55:37.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:55:37.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:55:37.74$ifdk4/patch= 2006.229.09:55:37.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:55:37.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:55:37.74$setupk4/!*+20s 2006.229.09:55:38.05#abcon#<5=/05 2.2 3.8 28.78 971001.1\r\n> 2006.229.09:55:38.07#abcon#{5=INTERFACE CLEAR} 2006.229.09:55:38.13#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:55:48.22#abcon#<5=/05 2.2 3.8 28.78 971001.1\r\n> 2006.229.09:55:48.24#abcon#{5=INTERFACE CLEAR} 2006.229.09:55:48.30#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:55:52.25$setupk4/"tpicd 2006.229.09:55:52.25$setupk4/echo=off 2006.229.09:55:52.25$setupk4/xlog=off 2006.229.09:55:52.25:!2006.229.09:57:16 2006.229.09:56:08.13#trakl#Source acquired 2006.229.09:56:10.13#flagr#flagr/antenna,acquired 2006.229.09:57:16.00:preob 2006.229.09:57:17.14/onsource/TRACKING 2006.229.09:57:17.14:!2006.229.09:57:26 2006.229.09:57:26.00:"tape 2006.229.09:57:26.00:"st=record 2006.229.09:57:26.00:data_valid=on 2006.229.09:57:26.00:midob 2006.229.09:57:26.14/onsource/TRACKING 2006.229.09:57:26.15/wx/28.77,1001.1,97 2006.229.09:57:26.30/cable/+6.4027E-03 2006.229.09:57:27.39/va/01,08,usb,yes,33,35 2006.229.09:57:27.39/va/02,07,usb,yes,36,36 2006.229.09:57:27.39/va/03,06,usb,yes,44,47 2006.229.09:57:27.39/va/04,07,usb,yes,37,38 2006.229.09:57:27.39/va/05,04,usb,yes,33,33 2006.229.09:57:27.39/va/06,04,usb,yes,37,36 2006.229.09:57:27.39/va/07,05,usb,yes,32,33 2006.229.09:57:27.39/va/08,06,usb,yes,24,29 2006.229.09:57:27.62/valo/01,524.99,yes,locked 2006.229.09:57:27.62/valo/02,534.99,yes,locked 2006.229.09:57:27.62/valo/03,564.99,yes,locked 2006.229.09:57:27.62/valo/04,624.99,yes,locked 2006.229.09:57:27.62/valo/05,734.99,yes,locked 2006.229.09:57:27.62/valo/06,814.99,yes,locked 2006.229.09:57:27.62/valo/07,864.99,yes,locked 2006.229.09:57:27.62/valo/08,884.99,yes,locked 2006.229.09:57:28.71/vb/01,04,usb,yes,39,36 2006.229.09:57:28.71/vb/02,04,usb,yes,42,41 2006.229.09:57:28.71/vb/03,04,usb,yes,38,42 2006.229.09:57:28.71/vb/04,04,usb,yes,43,42 2006.229.09:57:28.71/vb/05,04,usb,yes,34,37 2006.229.09:57:28.71/vb/06,04,usb,yes,40,35 2006.229.09:57:28.71/vb/07,04,usb,yes,39,39 2006.229.09:57:28.71/vb/08,04,usb,yes,36,40 2006.229.09:57:28.94/vblo/01,629.99,yes,locked 2006.229.09:57:28.94/vblo/02,634.99,yes,locked 2006.229.09:57:28.94/vblo/03,649.99,yes,locked 2006.229.09:57:28.94/vblo/04,679.99,yes,locked 2006.229.09:57:28.94/vblo/05,709.99,yes,locked 2006.229.09:57:28.94/vblo/06,719.99,yes,locked 2006.229.09:57:28.94/vblo/07,734.99,yes,locked 2006.229.09:57:28.94/vblo/08,744.99,yes,locked 2006.229.09:57:29.09/vabw/8 2006.229.09:57:29.24/vbbw/8 2006.229.09:57:29.33/xfe/off,on,12.2 2006.229.09:57:29.71/ifatt/23,28,28,28 2006.229.09:57:30.07/fmout-gps/S +4.62E-07 2006.229.09:57:30.11:!2006.229.09:59:36 2006.229.09:59:36.01:data_valid=off 2006.229.09:59:36.01:"et 2006.229.09:59:36.01:!+3s 2006.229.09:59:39.02:"tape 2006.229.09:59:39.02:postob 2006.229.09:59:39.14/cable/+6.4030E-03 2006.229.09:59:39.14/wx/28.74,1001.1,98 2006.229.09:59:39.20/fmout-gps/S +4.64E-07 2006.229.09:59:39.20:scan_name=229-1002,jd0608,50 2006.229.09:59:39.20:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.09:59:41.14#flagr#flagr/antenna,new-source 2006.229.09:59:41.14:checkk5 2006.229.09:59:41.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.09:59:41.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.09:59:42.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.09:59:42.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.09:59:43.15/chk_obsdata//k5ts1/T2290957??a.dat file size is correct (nominal:520MB, actual:516MB). 2006.229.09:59:43.56/chk_obsdata//k5ts2/T2290957??b.dat file size is correct (nominal:520MB, actual:516MB). 2006.229.09:59:43.96/chk_obsdata//k5ts3/T2290957??c.dat file size is correct (nominal:520MB, actual:516MB). 2006.229.09:59:44.38/chk_obsdata//k5ts4/T2290957??d.dat file size is correct (nominal:520MB, actual:516MB). 2006.229.09:59:45.11/k5log//k5ts1_log_newline 2006.229.09:59:45.80/k5log//k5ts2_log_newline 2006.229.09:59:46.51/k5log//k5ts3_log_newline 2006.229.09:59:47.22/k5log//k5ts4_log_newline 2006.229.09:59:47.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.09:59:47.24:setupk4=1 2006.229.09:59:47.25$setupk4/echo=on 2006.229.09:59:47.25$setupk4/pcalon 2006.229.09:59:47.25$pcalon/"no phase cal control is implemented here 2006.229.09:59:47.25$setupk4/"tpicd=stop 2006.229.09:59:47.25$setupk4/"rec=synch_on 2006.229.09:59:47.25$setupk4/"rec_mode=128 2006.229.09:59:47.25$setupk4/!* 2006.229.09:59:47.25$setupk4/recpk4 2006.229.09:59:47.25$recpk4/recpatch= 2006.229.09:59:47.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.09:59:47.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.09:59:47.25$setupk4/vck44 2006.229.09:59:47.25$vck44/valo=1,524.99 2006.229.09:59:47.25#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.09:59:47.25#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.09:59:47.25#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:47.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:47.25#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:47.25#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:47.25#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:59:47.25#ibcon#first serial, iclass 23, count 0 2006.229.09:59:47.25#ibcon#enter sib2, iclass 23, count 0 2006.229.09:59:47.25#ibcon#flushed, iclass 23, count 0 2006.229.09:59:47.25#ibcon#about to write, iclass 23, count 0 2006.229.09:59:47.25#ibcon#wrote, iclass 23, count 0 2006.229.09:59:47.25#ibcon#about to read 3, iclass 23, count 0 2006.229.09:59:47.26#ibcon#read 3, iclass 23, count 0 2006.229.09:59:47.26#ibcon#about to read 4, iclass 23, count 0 2006.229.09:59:47.26#ibcon#read 4, iclass 23, count 0 2006.229.09:59:47.26#ibcon#about to read 5, iclass 23, count 0 2006.229.09:59:47.26#ibcon#read 5, iclass 23, count 0 2006.229.09:59:47.26#ibcon#about to read 6, iclass 23, count 0 2006.229.09:59:47.26#ibcon#read 6, iclass 23, count 0 2006.229.09:59:47.26#ibcon#end of sib2, iclass 23, count 0 2006.229.09:59:47.26#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:59:47.26#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:59:47.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.09:59:47.26#ibcon#*before write, iclass 23, count 0 2006.229.09:59:47.26#ibcon#enter sib2, iclass 23, count 0 2006.229.09:59:47.26#ibcon#flushed, iclass 23, count 0 2006.229.09:59:47.26#ibcon#about to write, iclass 23, count 0 2006.229.09:59:47.26#ibcon#wrote, iclass 23, count 0 2006.229.09:59:47.26#ibcon#about to read 3, iclass 23, count 0 2006.229.09:59:47.31#ibcon#read 3, iclass 23, count 0 2006.229.09:59:47.31#ibcon#about to read 4, iclass 23, count 0 2006.229.09:59:47.31#ibcon#read 4, iclass 23, count 0 2006.229.09:59:47.31#ibcon#about to read 5, iclass 23, count 0 2006.229.09:59:47.31#ibcon#read 5, iclass 23, count 0 2006.229.09:59:47.31#ibcon#about to read 6, iclass 23, count 0 2006.229.09:59:47.31#ibcon#read 6, iclass 23, count 0 2006.229.09:59:47.31#ibcon#end of sib2, iclass 23, count 0 2006.229.09:59:47.31#ibcon#*after write, iclass 23, count 0 2006.229.09:59:47.31#ibcon#*before return 0, iclass 23, count 0 2006.229.09:59:47.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:47.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:47.31#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:59:47.31#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:59:47.31$vck44/va=1,8 2006.229.09:59:47.31#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.09:59:47.31#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.09:59:47.31#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:47.31#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:47.31#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:47.31#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:47.31#ibcon#enter wrdev, iclass 25, count 2 2006.229.09:59:47.31#ibcon#first serial, iclass 25, count 2 2006.229.09:59:47.31#ibcon#enter sib2, iclass 25, count 2 2006.229.09:59:47.31#ibcon#flushed, iclass 25, count 2 2006.229.09:59:47.31#ibcon#about to write, iclass 25, count 2 2006.229.09:59:47.31#ibcon#wrote, iclass 25, count 2 2006.229.09:59:47.31#ibcon#about to read 3, iclass 25, count 2 2006.229.09:59:47.33#ibcon#read 3, iclass 25, count 2 2006.229.09:59:47.33#ibcon#about to read 4, iclass 25, count 2 2006.229.09:59:47.33#ibcon#read 4, iclass 25, count 2 2006.229.09:59:47.33#ibcon#about to read 5, iclass 25, count 2 2006.229.09:59:47.33#ibcon#read 5, iclass 25, count 2 2006.229.09:59:47.33#ibcon#about to read 6, iclass 25, count 2 2006.229.09:59:47.33#ibcon#read 6, iclass 25, count 2 2006.229.09:59:47.33#ibcon#end of sib2, iclass 25, count 2 2006.229.09:59:47.33#ibcon#*mode == 0, iclass 25, count 2 2006.229.09:59:47.33#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.09:59:47.33#ibcon#[25=AT01-08\r\n] 2006.229.09:59:47.33#ibcon#*before write, iclass 25, count 2 2006.229.09:59:47.33#ibcon#enter sib2, iclass 25, count 2 2006.229.09:59:47.33#ibcon#flushed, iclass 25, count 2 2006.229.09:59:47.33#ibcon#about to write, iclass 25, count 2 2006.229.09:59:47.33#ibcon#wrote, iclass 25, count 2 2006.229.09:59:47.33#ibcon#about to read 3, iclass 25, count 2 2006.229.09:59:47.36#ibcon#read 3, iclass 25, count 2 2006.229.09:59:47.36#ibcon#about to read 4, iclass 25, count 2 2006.229.09:59:47.36#ibcon#read 4, iclass 25, count 2 2006.229.09:59:47.36#ibcon#about to read 5, iclass 25, count 2 2006.229.09:59:47.36#ibcon#read 5, iclass 25, count 2 2006.229.09:59:47.36#ibcon#about to read 6, iclass 25, count 2 2006.229.09:59:47.36#ibcon#read 6, iclass 25, count 2 2006.229.09:59:47.36#ibcon#end of sib2, iclass 25, count 2 2006.229.09:59:47.36#ibcon#*after write, iclass 25, count 2 2006.229.09:59:47.36#ibcon#*before return 0, iclass 25, count 2 2006.229.09:59:47.36#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:47.36#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:47.36#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.09:59:47.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:47.36#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:47.48#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:47.48#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:47.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:59:47.48#ibcon#first serial, iclass 25, count 0 2006.229.09:59:47.48#ibcon#enter sib2, iclass 25, count 0 2006.229.09:59:47.48#ibcon#flushed, iclass 25, count 0 2006.229.09:59:47.48#ibcon#about to write, iclass 25, count 0 2006.229.09:59:47.48#ibcon#wrote, iclass 25, count 0 2006.229.09:59:47.48#ibcon#about to read 3, iclass 25, count 0 2006.229.09:59:47.50#ibcon#read 3, iclass 25, count 0 2006.229.09:59:47.50#ibcon#about to read 4, iclass 25, count 0 2006.229.09:59:47.50#ibcon#read 4, iclass 25, count 0 2006.229.09:59:47.50#ibcon#about to read 5, iclass 25, count 0 2006.229.09:59:47.50#ibcon#read 5, iclass 25, count 0 2006.229.09:59:47.50#ibcon#about to read 6, iclass 25, count 0 2006.229.09:59:47.50#ibcon#read 6, iclass 25, count 0 2006.229.09:59:47.50#ibcon#end of sib2, iclass 25, count 0 2006.229.09:59:47.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:59:47.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:59:47.50#ibcon#[25=USB\r\n] 2006.229.09:59:47.50#ibcon#*before write, iclass 25, count 0 2006.229.09:59:47.50#ibcon#enter sib2, iclass 25, count 0 2006.229.09:59:47.50#ibcon#flushed, iclass 25, count 0 2006.229.09:59:47.50#ibcon#about to write, iclass 25, count 0 2006.229.09:59:47.50#ibcon#wrote, iclass 25, count 0 2006.229.09:59:47.50#ibcon#about to read 3, iclass 25, count 0 2006.229.09:59:47.53#ibcon#read 3, iclass 25, count 0 2006.229.09:59:47.53#ibcon#about to read 4, iclass 25, count 0 2006.229.09:59:47.53#ibcon#read 4, iclass 25, count 0 2006.229.09:59:47.53#ibcon#about to read 5, iclass 25, count 0 2006.229.09:59:47.53#ibcon#read 5, iclass 25, count 0 2006.229.09:59:47.53#ibcon#about to read 6, iclass 25, count 0 2006.229.09:59:47.53#ibcon#read 6, iclass 25, count 0 2006.229.09:59:47.53#ibcon#end of sib2, iclass 25, count 0 2006.229.09:59:47.53#ibcon#*after write, iclass 25, count 0 2006.229.09:59:47.53#ibcon#*before return 0, iclass 25, count 0 2006.229.09:59:47.53#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:47.53#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:47.53#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:59:47.53#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:59:47.53$vck44/valo=2,534.99 2006.229.09:59:47.53#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.09:59:47.53#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.09:59:47.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:47.53#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:47.53#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:47.53#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:47.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:59:47.53#ibcon#first serial, iclass 27, count 0 2006.229.09:59:47.53#ibcon#enter sib2, iclass 27, count 0 2006.229.09:59:47.53#ibcon#flushed, iclass 27, count 0 2006.229.09:59:47.53#ibcon#about to write, iclass 27, count 0 2006.229.09:59:47.53#ibcon#wrote, iclass 27, count 0 2006.229.09:59:47.53#ibcon#about to read 3, iclass 27, count 0 2006.229.09:59:47.55#ibcon#read 3, iclass 27, count 0 2006.229.09:59:47.55#ibcon#about to read 4, iclass 27, count 0 2006.229.09:59:47.55#ibcon#read 4, iclass 27, count 0 2006.229.09:59:47.55#ibcon#about to read 5, iclass 27, count 0 2006.229.09:59:47.55#ibcon#read 5, iclass 27, count 0 2006.229.09:59:47.55#ibcon#about to read 6, iclass 27, count 0 2006.229.09:59:47.55#ibcon#read 6, iclass 27, count 0 2006.229.09:59:47.55#ibcon#end of sib2, iclass 27, count 0 2006.229.09:59:47.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:59:47.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:59:47.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.09:59:47.55#ibcon#*before write, iclass 27, count 0 2006.229.09:59:47.55#ibcon#enter sib2, iclass 27, count 0 2006.229.09:59:47.55#ibcon#flushed, iclass 27, count 0 2006.229.09:59:47.55#ibcon#about to write, iclass 27, count 0 2006.229.09:59:47.55#ibcon#wrote, iclass 27, count 0 2006.229.09:59:47.55#ibcon#about to read 3, iclass 27, count 0 2006.229.09:59:47.59#ibcon#read 3, iclass 27, count 0 2006.229.09:59:47.59#ibcon#about to read 4, iclass 27, count 0 2006.229.09:59:47.59#ibcon#read 4, iclass 27, count 0 2006.229.09:59:47.59#ibcon#about to read 5, iclass 27, count 0 2006.229.09:59:47.59#ibcon#read 5, iclass 27, count 0 2006.229.09:59:47.59#ibcon#about to read 6, iclass 27, count 0 2006.229.09:59:47.59#ibcon#read 6, iclass 27, count 0 2006.229.09:59:47.59#ibcon#end of sib2, iclass 27, count 0 2006.229.09:59:47.59#ibcon#*after write, iclass 27, count 0 2006.229.09:59:47.59#ibcon#*before return 0, iclass 27, count 0 2006.229.09:59:47.59#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:47.59#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:47.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:59:47.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:59:47.59$vck44/va=2,7 2006.229.09:59:47.59#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.09:59:47.59#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.09:59:47.59#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:47.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:47.65#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:47.65#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:47.65#ibcon#enter wrdev, iclass 29, count 2 2006.229.09:59:47.65#ibcon#first serial, iclass 29, count 2 2006.229.09:59:47.65#ibcon#enter sib2, iclass 29, count 2 2006.229.09:59:47.65#ibcon#flushed, iclass 29, count 2 2006.229.09:59:47.65#ibcon#about to write, iclass 29, count 2 2006.229.09:59:47.65#ibcon#wrote, iclass 29, count 2 2006.229.09:59:47.65#ibcon#about to read 3, iclass 29, count 2 2006.229.09:59:47.67#ibcon#read 3, iclass 29, count 2 2006.229.09:59:47.67#ibcon#about to read 4, iclass 29, count 2 2006.229.09:59:47.67#ibcon#read 4, iclass 29, count 2 2006.229.09:59:47.67#ibcon#about to read 5, iclass 29, count 2 2006.229.09:59:47.67#ibcon#read 5, iclass 29, count 2 2006.229.09:59:47.67#ibcon#about to read 6, iclass 29, count 2 2006.229.09:59:47.67#ibcon#read 6, iclass 29, count 2 2006.229.09:59:47.67#ibcon#end of sib2, iclass 29, count 2 2006.229.09:59:47.67#ibcon#*mode == 0, iclass 29, count 2 2006.229.09:59:47.67#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.09:59:47.67#ibcon#[25=AT02-07\r\n] 2006.229.09:59:47.67#ibcon#*before write, iclass 29, count 2 2006.229.09:59:47.67#ibcon#enter sib2, iclass 29, count 2 2006.229.09:59:47.67#ibcon#flushed, iclass 29, count 2 2006.229.09:59:47.67#ibcon#about to write, iclass 29, count 2 2006.229.09:59:47.67#ibcon#wrote, iclass 29, count 2 2006.229.09:59:47.67#ibcon#about to read 3, iclass 29, count 2 2006.229.09:59:47.70#ibcon#read 3, iclass 29, count 2 2006.229.09:59:47.70#ibcon#about to read 4, iclass 29, count 2 2006.229.09:59:47.70#ibcon#read 4, iclass 29, count 2 2006.229.09:59:47.70#ibcon#about to read 5, iclass 29, count 2 2006.229.09:59:47.70#ibcon#read 5, iclass 29, count 2 2006.229.09:59:47.70#ibcon#about to read 6, iclass 29, count 2 2006.229.09:59:47.70#ibcon#read 6, iclass 29, count 2 2006.229.09:59:47.70#ibcon#end of sib2, iclass 29, count 2 2006.229.09:59:47.70#ibcon#*after write, iclass 29, count 2 2006.229.09:59:47.70#ibcon#*before return 0, iclass 29, count 2 2006.229.09:59:47.70#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:47.70#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:47.70#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.09:59:47.70#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:47.70#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:47.82#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:47.82#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:47.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:59:47.82#ibcon#first serial, iclass 29, count 0 2006.229.09:59:47.82#ibcon#enter sib2, iclass 29, count 0 2006.229.09:59:47.82#ibcon#flushed, iclass 29, count 0 2006.229.09:59:47.82#ibcon#about to write, iclass 29, count 0 2006.229.09:59:47.82#ibcon#wrote, iclass 29, count 0 2006.229.09:59:47.82#ibcon#about to read 3, iclass 29, count 0 2006.229.09:59:47.84#ibcon#read 3, iclass 29, count 0 2006.229.09:59:47.84#ibcon#about to read 4, iclass 29, count 0 2006.229.09:59:47.84#ibcon#read 4, iclass 29, count 0 2006.229.09:59:47.84#ibcon#about to read 5, iclass 29, count 0 2006.229.09:59:47.84#ibcon#read 5, iclass 29, count 0 2006.229.09:59:47.84#ibcon#about to read 6, iclass 29, count 0 2006.229.09:59:47.84#ibcon#read 6, iclass 29, count 0 2006.229.09:59:47.84#ibcon#end of sib2, iclass 29, count 0 2006.229.09:59:47.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:59:47.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:59:47.84#ibcon#[25=USB\r\n] 2006.229.09:59:47.84#ibcon#*before write, iclass 29, count 0 2006.229.09:59:47.84#ibcon#enter sib2, iclass 29, count 0 2006.229.09:59:47.84#ibcon#flushed, iclass 29, count 0 2006.229.09:59:47.84#ibcon#about to write, iclass 29, count 0 2006.229.09:59:47.84#ibcon#wrote, iclass 29, count 0 2006.229.09:59:47.84#ibcon#about to read 3, iclass 29, count 0 2006.229.09:59:47.87#ibcon#read 3, iclass 29, count 0 2006.229.09:59:47.87#ibcon#about to read 4, iclass 29, count 0 2006.229.09:59:47.87#ibcon#read 4, iclass 29, count 0 2006.229.09:59:47.87#ibcon#about to read 5, iclass 29, count 0 2006.229.09:59:47.87#ibcon#read 5, iclass 29, count 0 2006.229.09:59:47.87#ibcon#about to read 6, iclass 29, count 0 2006.229.09:59:47.87#ibcon#read 6, iclass 29, count 0 2006.229.09:59:47.87#ibcon#end of sib2, iclass 29, count 0 2006.229.09:59:47.87#ibcon#*after write, iclass 29, count 0 2006.229.09:59:47.87#ibcon#*before return 0, iclass 29, count 0 2006.229.09:59:47.87#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:47.87#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:47.87#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:59:47.87#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:59:47.87$vck44/valo=3,564.99 2006.229.09:59:47.87#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.09:59:47.87#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.09:59:47.87#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:47.87#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:47.87#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:47.87#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:47.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:59:47.87#ibcon#first serial, iclass 31, count 0 2006.229.09:59:47.87#ibcon#enter sib2, iclass 31, count 0 2006.229.09:59:47.87#ibcon#flushed, iclass 31, count 0 2006.229.09:59:47.87#ibcon#about to write, iclass 31, count 0 2006.229.09:59:47.87#ibcon#wrote, iclass 31, count 0 2006.229.09:59:47.87#ibcon#about to read 3, iclass 31, count 0 2006.229.09:59:47.89#ibcon#read 3, iclass 31, count 0 2006.229.09:59:47.89#ibcon#about to read 4, iclass 31, count 0 2006.229.09:59:47.89#ibcon#read 4, iclass 31, count 0 2006.229.09:59:47.89#ibcon#about to read 5, iclass 31, count 0 2006.229.09:59:47.89#ibcon#read 5, iclass 31, count 0 2006.229.09:59:47.89#ibcon#about to read 6, iclass 31, count 0 2006.229.09:59:47.89#ibcon#read 6, iclass 31, count 0 2006.229.09:59:47.89#ibcon#end of sib2, iclass 31, count 0 2006.229.09:59:47.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:59:47.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:59:47.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.09:59:47.89#ibcon#*before write, iclass 31, count 0 2006.229.09:59:47.89#ibcon#enter sib2, iclass 31, count 0 2006.229.09:59:47.89#ibcon#flushed, iclass 31, count 0 2006.229.09:59:47.89#ibcon#about to write, iclass 31, count 0 2006.229.09:59:47.89#ibcon#wrote, iclass 31, count 0 2006.229.09:59:47.89#ibcon#about to read 3, iclass 31, count 0 2006.229.09:59:47.93#ibcon#read 3, iclass 31, count 0 2006.229.09:59:47.93#ibcon#about to read 4, iclass 31, count 0 2006.229.09:59:47.93#ibcon#read 4, iclass 31, count 0 2006.229.09:59:47.93#ibcon#about to read 5, iclass 31, count 0 2006.229.09:59:47.93#ibcon#read 5, iclass 31, count 0 2006.229.09:59:47.93#ibcon#about to read 6, iclass 31, count 0 2006.229.09:59:47.93#ibcon#read 6, iclass 31, count 0 2006.229.09:59:47.93#ibcon#end of sib2, iclass 31, count 0 2006.229.09:59:47.93#ibcon#*after write, iclass 31, count 0 2006.229.09:59:47.93#ibcon#*before return 0, iclass 31, count 0 2006.229.09:59:47.93#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:47.93#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:47.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:59:47.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:59:47.93$vck44/va=3,6 2006.229.09:59:47.93#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.09:59:47.93#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.09:59:47.93#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:47.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:47.99#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:47.99#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:47.99#ibcon#enter wrdev, iclass 33, count 2 2006.229.09:59:47.99#ibcon#first serial, iclass 33, count 2 2006.229.09:59:47.99#ibcon#enter sib2, iclass 33, count 2 2006.229.09:59:47.99#ibcon#flushed, iclass 33, count 2 2006.229.09:59:47.99#ibcon#about to write, iclass 33, count 2 2006.229.09:59:47.99#ibcon#wrote, iclass 33, count 2 2006.229.09:59:47.99#ibcon#about to read 3, iclass 33, count 2 2006.229.09:59:48.01#ibcon#read 3, iclass 33, count 2 2006.229.09:59:48.01#ibcon#about to read 4, iclass 33, count 2 2006.229.09:59:48.01#ibcon#read 4, iclass 33, count 2 2006.229.09:59:48.01#ibcon#about to read 5, iclass 33, count 2 2006.229.09:59:48.01#ibcon#read 5, iclass 33, count 2 2006.229.09:59:48.01#ibcon#about to read 6, iclass 33, count 2 2006.229.09:59:48.01#ibcon#read 6, iclass 33, count 2 2006.229.09:59:48.01#ibcon#end of sib2, iclass 33, count 2 2006.229.09:59:48.01#ibcon#*mode == 0, iclass 33, count 2 2006.229.09:59:48.01#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.09:59:48.01#ibcon#[25=AT03-06\r\n] 2006.229.09:59:48.01#ibcon#*before write, iclass 33, count 2 2006.229.09:59:48.01#ibcon#enter sib2, iclass 33, count 2 2006.229.09:59:48.01#ibcon#flushed, iclass 33, count 2 2006.229.09:59:48.01#ibcon#about to write, iclass 33, count 2 2006.229.09:59:48.01#ibcon#wrote, iclass 33, count 2 2006.229.09:59:48.01#ibcon#about to read 3, iclass 33, count 2 2006.229.09:59:48.04#ibcon#read 3, iclass 33, count 2 2006.229.09:59:48.04#ibcon#about to read 4, iclass 33, count 2 2006.229.09:59:48.04#ibcon#read 4, iclass 33, count 2 2006.229.09:59:48.04#ibcon#about to read 5, iclass 33, count 2 2006.229.09:59:48.04#ibcon#read 5, iclass 33, count 2 2006.229.09:59:48.04#ibcon#about to read 6, iclass 33, count 2 2006.229.09:59:48.04#ibcon#read 6, iclass 33, count 2 2006.229.09:59:48.04#ibcon#end of sib2, iclass 33, count 2 2006.229.09:59:48.04#ibcon#*after write, iclass 33, count 2 2006.229.09:59:48.04#ibcon#*before return 0, iclass 33, count 2 2006.229.09:59:48.04#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:48.04#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:48.04#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.09:59:48.04#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:48.04#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:48.16#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:48.16#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:48.16#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:59:48.16#ibcon#first serial, iclass 33, count 0 2006.229.09:59:48.16#ibcon#enter sib2, iclass 33, count 0 2006.229.09:59:48.16#ibcon#flushed, iclass 33, count 0 2006.229.09:59:48.16#ibcon#about to write, iclass 33, count 0 2006.229.09:59:48.16#ibcon#wrote, iclass 33, count 0 2006.229.09:59:48.16#ibcon#about to read 3, iclass 33, count 0 2006.229.09:59:48.18#ibcon#read 3, iclass 33, count 0 2006.229.09:59:48.18#ibcon#about to read 4, iclass 33, count 0 2006.229.09:59:48.18#ibcon#read 4, iclass 33, count 0 2006.229.09:59:48.18#ibcon#about to read 5, iclass 33, count 0 2006.229.09:59:48.18#ibcon#read 5, iclass 33, count 0 2006.229.09:59:48.18#ibcon#about to read 6, iclass 33, count 0 2006.229.09:59:48.18#ibcon#read 6, iclass 33, count 0 2006.229.09:59:48.18#ibcon#end of sib2, iclass 33, count 0 2006.229.09:59:48.18#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:59:48.18#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:59:48.18#ibcon#[25=USB\r\n] 2006.229.09:59:48.18#ibcon#*before write, iclass 33, count 0 2006.229.09:59:48.18#ibcon#enter sib2, iclass 33, count 0 2006.229.09:59:48.18#ibcon#flushed, iclass 33, count 0 2006.229.09:59:48.18#ibcon#about to write, iclass 33, count 0 2006.229.09:59:48.18#ibcon#wrote, iclass 33, count 0 2006.229.09:59:48.18#ibcon#about to read 3, iclass 33, count 0 2006.229.09:59:48.21#ibcon#read 3, iclass 33, count 0 2006.229.09:59:48.21#ibcon#about to read 4, iclass 33, count 0 2006.229.09:59:48.21#ibcon#read 4, iclass 33, count 0 2006.229.09:59:48.21#ibcon#about to read 5, iclass 33, count 0 2006.229.09:59:48.21#ibcon#read 5, iclass 33, count 0 2006.229.09:59:48.21#ibcon#about to read 6, iclass 33, count 0 2006.229.09:59:48.21#ibcon#read 6, iclass 33, count 0 2006.229.09:59:48.21#ibcon#end of sib2, iclass 33, count 0 2006.229.09:59:48.21#ibcon#*after write, iclass 33, count 0 2006.229.09:59:48.21#ibcon#*before return 0, iclass 33, count 0 2006.229.09:59:48.21#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:48.21#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:48.21#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:59:48.21#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:59:48.21$vck44/valo=4,624.99 2006.229.09:59:48.21#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.09:59:48.21#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.09:59:48.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:48.21#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:48.21#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:48.21#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:48.21#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:59:48.21#ibcon#first serial, iclass 35, count 0 2006.229.09:59:48.21#ibcon#enter sib2, iclass 35, count 0 2006.229.09:59:48.21#ibcon#flushed, iclass 35, count 0 2006.229.09:59:48.21#ibcon#about to write, iclass 35, count 0 2006.229.09:59:48.21#ibcon#wrote, iclass 35, count 0 2006.229.09:59:48.21#ibcon#about to read 3, iclass 35, count 0 2006.229.09:59:48.23#ibcon#read 3, iclass 35, count 0 2006.229.09:59:48.23#ibcon#about to read 4, iclass 35, count 0 2006.229.09:59:48.23#ibcon#read 4, iclass 35, count 0 2006.229.09:59:48.23#ibcon#about to read 5, iclass 35, count 0 2006.229.09:59:48.23#ibcon#read 5, iclass 35, count 0 2006.229.09:59:48.23#ibcon#about to read 6, iclass 35, count 0 2006.229.09:59:48.23#ibcon#read 6, iclass 35, count 0 2006.229.09:59:48.23#ibcon#end of sib2, iclass 35, count 0 2006.229.09:59:48.23#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:59:48.23#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:59:48.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.09:59:48.23#ibcon#*before write, iclass 35, count 0 2006.229.09:59:48.23#ibcon#enter sib2, iclass 35, count 0 2006.229.09:59:48.23#ibcon#flushed, iclass 35, count 0 2006.229.09:59:48.23#ibcon#about to write, iclass 35, count 0 2006.229.09:59:48.23#ibcon#wrote, iclass 35, count 0 2006.229.09:59:48.23#ibcon#about to read 3, iclass 35, count 0 2006.229.09:59:48.27#ibcon#read 3, iclass 35, count 0 2006.229.09:59:48.27#ibcon#about to read 4, iclass 35, count 0 2006.229.09:59:48.27#ibcon#read 4, iclass 35, count 0 2006.229.09:59:48.27#ibcon#about to read 5, iclass 35, count 0 2006.229.09:59:48.27#ibcon#read 5, iclass 35, count 0 2006.229.09:59:48.27#ibcon#about to read 6, iclass 35, count 0 2006.229.09:59:48.27#ibcon#read 6, iclass 35, count 0 2006.229.09:59:48.27#ibcon#end of sib2, iclass 35, count 0 2006.229.09:59:48.27#ibcon#*after write, iclass 35, count 0 2006.229.09:59:48.27#ibcon#*before return 0, iclass 35, count 0 2006.229.09:59:48.27#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:48.27#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:48.27#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:59:48.27#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:59:48.27$vck44/va=4,7 2006.229.09:59:48.27#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.09:59:48.27#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.09:59:48.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:48.27#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:48.33#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:48.33#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:48.33#ibcon#enter wrdev, iclass 37, count 2 2006.229.09:59:48.33#ibcon#first serial, iclass 37, count 2 2006.229.09:59:48.33#ibcon#enter sib2, iclass 37, count 2 2006.229.09:59:48.33#ibcon#flushed, iclass 37, count 2 2006.229.09:59:48.33#ibcon#about to write, iclass 37, count 2 2006.229.09:59:48.33#ibcon#wrote, iclass 37, count 2 2006.229.09:59:48.33#ibcon#about to read 3, iclass 37, count 2 2006.229.09:59:48.35#ibcon#read 3, iclass 37, count 2 2006.229.09:59:48.35#ibcon#about to read 4, iclass 37, count 2 2006.229.09:59:48.35#ibcon#read 4, iclass 37, count 2 2006.229.09:59:48.35#ibcon#about to read 5, iclass 37, count 2 2006.229.09:59:48.35#ibcon#read 5, iclass 37, count 2 2006.229.09:59:48.35#ibcon#about to read 6, iclass 37, count 2 2006.229.09:59:48.35#ibcon#read 6, iclass 37, count 2 2006.229.09:59:48.35#ibcon#end of sib2, iclass 37, count 2 2006.229.09:59:48.35#ibcon#*mode == 0, iclass 37, count 2 2006.229.09:59:48.35#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.09:59:48.35#ibcon#[25=AT04-07\r\n] 2006.229.09:59:48.35#ibcon#*before write, iclass 37, count 2 2006.229.09:59:48.35#ibcon#enter sib2, iclass 37, count 2 2006.229.09:59:48.35#ibcon#flushed, iclass 37, count 2 2006.229.09:59:48.35#ibcon#about to write, iclass 37, count 2 2006.229.09:59:48.35#ibcon#wrote, iclass 37, count 2 2006.229.09:59:48.35#ibcon#about to read 3, iclass 37, count 2 2006.229.09:59:48.38#ibcon#read 3, iclass 37, count 2 2006.229.09:59:48.38#ibcon#about to read 4, iclass 37, count 2 2006.229.09:59:48.38#ibcon#read 4, iclass 37, count 2 2006.229.09:59:48.38#ibcon#about to read 5, iclass 37, count 2 2006.229.09:59:48.38#ibcon#read 5, iclass 37, count 2 2006.229.09:59:48.38#ibcon#about to read 6, iclass 37, count 2 2006.229.09:59:48.38#ibcon#read 6, iclass 37, count 2 2006.229.09:59:48.38#ibcon#end of sib2, iclass 37, count 2 2006.229.09:59:48.38#ibcon#*after write, iclass 37, count 2 2006.229.09:59:48.38#ibcon#*before return 0, iclass 37, count 2 2006.229.09:59:48.38#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:48.38#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:48.38#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.09:59:48.38#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:48.38#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:48.50#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:48.50#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:48.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:59:48.50#ibcon#first serial, iclass 37, count 0 2006.229.09:59:48.50#ibcon#enter sib2, iclass 37, count 0 2006.229.09:59:48.50#ibcon#flushed, iclass 37, count 0 2006.229.09:59:48.50#ibcon#about to write, iclass 37, count 0 2006.229.09:59:48.50#ibcon#wrote, iclass 37, count 0 2006.229.09:59:48.50#ibcon#about to read 3, iclass 37, count 0 2006.229.09:59:48.52#ibcon#read 3, iclass 37, count 0 2006.229.09:59:48.52#ibcon#about to read 4, iclass 37, count 0 2006.229.09:59:48.52#ibcon#read 4, iclass 37, count 0 2006.229.09:59:48.52#ibcon#about to read 5, iclass 37, count 0 2006.229.09:59:48.52#ibcon#read 5, iclass 37, count 0 2006.229.09:59:48.52#ibcon#about to read 6, iclass 37, count 0 2006.229.09:59:48.52#ibcon#read 6, iclass 37, count 0 2006.229.09:59:48.52#ibcon#end of sib2, iclass 37, count 0 2006.229.09:59:48.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:59:48.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:59:48.52#ibcon#[25=USB\r\n] 2006.229.09:59:48.52#ibcon#*before write, iclass 37, count 0 2006.229.09:59:48.52#ibcon#enter sib2, iclass 37, count 0 2006.229.09:59:48.52#ibcon#flushed, iclass 37, count 0 2006.229.09:59:48.52#ibcon#about to write, iclass 37, count 0 2006.229.09:59:48.52#ibcon#wrote, iclass 37, count 0 2006.229.09:59:48.52#ibcon#about to read 3, iclass 37, count 0 2006.229.09:59:48.55#ibcon#read 3, iclass 37, count 0 2006.229.09:59:48.55#ibcon#about to read 4, iclass 37, count 0 2006.229.09:59:48.55#ibcon#read 4, iclass 37, count 0 2006.229.09:59:48.55#ibcon#about to read 5, iclass 37, count 0 2006.229.09:59:48.55#ibcon#read 5, iclass 37, count 0 2006.229.09:59:48.55#ibcon#about to read 6, iclass 37, count 0 2006.229.09:59:48.55#ibcon#read 6, iclass 37, count 0 2006.229.09:59:48.55#ibcon#end of sib2, iclass 37, count 0 2006.229.09:59:48.55#ibcon#*after write, iclass 37, count 0 2006.229.09:59:48.55#ibcon#*before return 0, iclass 37, count 0 2006.229.09:59:48.55#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:48.55#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:48.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:59:48.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:59:48.55$vck44/valo=5,734.99 2006.229.09:59:48.55#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.09:59:48.55#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.09:59:48.55#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:48.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:48.55#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:48.55#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:48.55#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:59:48.55#ibcon#first serial, iclass 39, count 0 2006.229.09:59:48.55#ibcon#enter sib2, iclass 39, count 0 2006.229.09:59:48.55#ibcon#flushed, iclass 39, count 0 2006.229.09:59:48.55#ibcon#about to write, iclass 39, count 0 2006.229.09:59:48.55#ibcon#wrote, iclass 39, count 0 2006.229.09:59:48.55#ibcon#about to read 3, iclass 39, count 0 2006.229.09:59:48.57#ibcon#read 3, iclass 39, count 0 2006.229.09:59:48.57#ibcon#about to read 4, iclass 39, count 0 2006.229.09:59:48.57#ibcon#read 4, iclass 39, count 0 2006.229.09:59:48.57#ibcon#about to read 5, iclass 39, count 0 2006.229.09:59:48.57#ibcon#read 5, iclass 39, count 0 2006.229.09:59:48.57#ibcon#about to read 6, iclass 39, count 0 2006.229.09:59:48.57#ibcon#read 6, iclass 39, count 0 2006.229.09:59:48.57#ibcon#end of sib2, iclass 39, count 0 2006.229.09:59:48.57#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:59:48.57#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:59:48.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.09:59:48.57#ibcon#*before write, iclass 39, count 0 2006.229.09:59:48.57#ibcon#enter sib2, iclass 39, count 0 2006.229.09:59:48.57#ibcon#flushed, iclass 39, count 0 2006.229.09:59:48.57#ibcon#about to write, iclass 39, count 0 2006.229.09:59:48.57#ibcon#wrote, iclass 39, count 0 2006.229.09:59:48.57#ibcon#about to read 3, iclass 39, count 0 2006.229.09:59:48.61#ibcon#read 3, iclass 39, count 0 2006.229.09:59:48.61#ibcon#about to read 4, iclass 39, count 0 2006.229.09:59:48.61#ibcon#read 4, iclass 39, count 0 2006.229.09:59:48.61#ibcon#about to read 5, iclass 39, count 0 2006.229.09:59:48.61#ibcon#read 5, iclass 39, count 0 2006.229.09:59:48.61#ibcon#about to read 6, iclass 39, count 0 2006.229.09:59:48.61#ibcon#read 6, iclass 39, count 0 2006.229.09:59:48.61#ibcon#end of sib2, iclass 39, count 0 2006.229.09:59:48.61#ibcon#*after write, iclass 39, count 0 2006.229.09:59:48.61#ibcon#*before return 0, iclass 39, count 0 2006.229.09:59:48.61#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:48.61#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:48.61#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:59:48.61#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:59:48.61$vck44/va=5,4 2006.229.09:59:48.61#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.09:59:48.61#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.09:59:48.61#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:48.61#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:48.67#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:48.67#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:48.67#ibcon#enter wrdev, iclass 3, count 2 2006.229.09:59:48.67#ibcon#first serial, iclass 3, count 2 2006.229.09:59:48.67#ibcon#enter sib2, iclass 3, count 2 2006.229.09:59:48.67#ibcon#flushed, iclass 3, count 2 2006.229.09:59:48.67#ibcon#about to write, iclass 3, count 2 2006.229.09:59:48.67#ibcon#wrote, iclass 3, count 2 2006.229.09:59:48.67#ibcon#about to read 3, iclass 3, count 2 2006.229.09:59:48.69#ibcon#read 3, iclass 3, count 2 2006.229.09:59:48.69#ibcon#about to read 4, iclass 3, count 2 2006.229.09:59:48.69#ibcon#read 4, iclass 3, count 2 2006.229.09:59:48.69#ibcon#about to read 5, iclass 3, count 2 2006.229.09:59:48.69#ibcon#read 5, iclass 3, count 2 2006.229.09:59:48.69#ibcon#about to read 6, iclass 3, count 2 2006.229.09:59:48.69#ibcon#read 6, iclass 3, count 2 2006.229.09:59:48.69#ibcon#end of sib2, iclass 3, count 2 2006.229.09:59:48.69#ibcon#*mode == 0, iclass 3, count 2 2006.229.09:59:48.69#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.09:59:48.69#ibcon#[25=AT05-04\r\n] 2006.229.09:59:48.69#ibcon#*before write, iclass 3, count 2 2006.229.09:59:48.69#ibcon#enter sib2, iclass 3, count 2 2006.229.09:59:48.69#ibcon#flushed, iclass 3, count 2 2006.229.09:59:48.69#ibcon#about to write, iclass 3, count 2 2006.229.09:59:48.69#ibcon#wrote, iclass 3, count 2 2006.229.09:59:48.69#ibcon#about to read 3, iclass 3, count 2 2006.229.09:59:48.72#ibcon#read 3, iclass 3, count 2 2006.229.09:59:48.72#ibcon#about to read 4, iclass 3, count 2 2006.229.09:59:48.72#ibcon#read 4, iclass 3, count 2 2006.229.09:59:48.72#ibcon#about to read 5, iclass 3, count 2 2006.229.09:59:48.72#ibcon#read 5, iclass 3, count 2 2006.229.09:59:48.72#ibcon#about to read 6, iclass 3, count 2 2006.229.09:59:48.72#ibcon#read 6, iclass 3, count 2 2006.229.09:59:48.72#ibcon#end of sib2, iclass 3, count 2 2006.229.09:59:48.72#ibcon#*after write, iclass 3, count 2 2006.229.09:59:48.72#ibcon#*before return 0, iclass 3, count 2 2006.229.09:59:48.72#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:48.72#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:48.72#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.09:59:48.72#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:48.72#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:48.84#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:48.84#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:48.84#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:59:48.84#ibcon#first serial, iclass 3, count 0 2006.229.09:59:48.84#ibcon#enter sib2, iclass 3, count 0 2006.229.09:59:48.84#ibcon#flushed, iclass 3, count 0 2006.229.09:59:48.84#ibcon#about to write, iclass 3, count 0 2006.229.09:59:48.84#ibcon#wrote, iclass 3, count 0 2006.229.09:59:48.84#ibcon#about to read 3, iclass 3, count 0 2006.229.09:59:48.86#ibcon#read 3, iclass 3, count 0 2006.229.09:59:48.86#ibcon#about to read 4, iclass 3, count 0 2006.229.09:59:48.86#ibcon#read 4, iclass 3, count 0 2006.229.09:59:48.86#ibcon#about to read 5, iclass 3, count 0 2006.229.09:59:48.86#ibcon#read 5, iclass 3, count 0 2006.229.09:59:48.86#ibcon#about to read 6, iclass 3, count 0 2006.229.09:59:48.86#ibcon#read 6, iclass 3, count 0 2006.229.09:59:48.86#ibcon#end of sib2, iclass 3, count 0 2006.229.09:59:48.86#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:59:48.86#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:59:48.86#ibcon#[25=USB\r\n] 2006.229.09:59:48.86#ibcon#*before write, iclass 3, count 0 2006.229.09:59:48.86#ibcon#enter sib2, iclass 3, count 0 2006.229.09:59:48.86#ibcon#flushed, iclass 3, count 0 2006.229.09:59:48.86#ibcon#about to write, iclass 3, count 0 2006.229.09:59:48.86#ibcon#wrote, iclass 3, count 0 2006.229.09:59:48.86#ibcon#about to read 3, iclass 3, count 0 2006.229.09:59:48.89#ibcon#read 3, iclass 3, count 0 2006.229.09:59:48.89#ibcon#about to read 4, iclass 3, count 0 2006.229.09:59:48.89#ibcon#read 4, iclass 3, count 0 2006.229.09:59:48.89#ibcon#about to read 5, iclass 3, count 0 2006.229.09:59:48.89#ibcon#read 5, iclass 3, count 0 2006.229.09:59:48.89#ibcon#about to read 6, iclass 3, count 0 2006.229.09:59:48.89#ibcon#read 6, iclass 3, count 0 2006.229.09:59:48.89#ibcon#end of sib2, iclass 3, count 0 2006.229.09:59:48.89#ibcon#*after write, iclass 3, count 0 2006.229.09:59:48.89#ibcon#*before return 0, iclass 3, count 0 2006.229.09:59:48.89#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:48.89#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:48.89#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:59:48.89#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:59:48.89$vck44/valo=6,814.99 2006.229.09:59:48.89#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.09:59:48.89#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.09:59:48.89#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:48.89#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:48.89#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:48.89#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:48.89#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:59:48.89#ibcon#first serial, iclass 5, count 0 2006.229.09:59:48.89#ibcon#enter sib2, iclass 5, count 0 2006.229.09:59:48.89#ibcon#flushed, iclass 5, count 0 2006.229.09:59:48.89#ibcon#about to write, iclass 5, count 0 2006.229.09:59:48.89#ibcon#wrote, iclass 5, count 0 2006.229.09:59:48.89#ibcon#about to read 3, iclass 5, count 0 2006.229.09:59:48.91#ibcon#read 3, iclass 5, count 0 2006.229.09:59:48.91#ibcon#about to read 4, iclass 5, count 0 2006.229.09:59:48.91#ibcon#read 4, iclass 5, count 0 2006.229.09:59:48.91#ibcon#about to read 5, iclass 5, count 0 2006.229.09:59:48.91#ibcon#read 5, iclass 5, count 0 2006.229.09:59:48.91#ibcon#about to read 6, iclass 5, count 0 2006.229.09:59:48.91#ibcon#read 6, iclass 5, count 0 2006.229.09:59:48.91#ibcon#end of sib2, iclass 5, count 0 2006.229.09:59:48.91#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:59:48.91#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:59:48.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.09:59:48.91#ibcon#*before write, iclass 5, count 0 2006.229.09:59:48.91#ibcon#enter sib2, iclass 5, count 0 2006.229.09:59:48.91#ibcon#flushed, iclass 5, count 0 2006.229.09:59:48.91#ibcon#about to write, iclass 5, count 0 2006.229.09:59:48.91#ibcon#wrote, iclass 5, count 0 2006.229.09:59:48.91#ibcon#about to read 3, iclass 5, count 0 2006.229.09:59:48.95#ibcon#read 3, iclass 5, count 0 2006.229.09:59:48.95#ibcon#about to read 4, iclass 5, count 0 2006.229.09:59:48.95#ibcon#read 4, iclass 5, count 0 2006.229.09:59:48.95#ibcon#about to read 5, iclass 5, count 0 2006.229.09:59:48.95#ibcon#read 5, iclass 5, count 0 2006.229.09:59:48.95#ibcon#about to read 6, iclass 5, count 0 2006.229.09:59:48.95#ibcon#read 6, iclass 5, count 0 2006.229.09:59:48.95#ibcon#end of sib2, iclass 5, count 0 2006.229.09:59:48.95#ibcon#*after write, iclass 5, count 0 2006.229.09:59:48.95#ibcon#*before return 0, iclass 5, count 0 2006.229.09:59:48.95#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:48.95#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:48.95#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:59:48.95#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:59:48.95$vck44/va=6,4 2006.229.09:59:48.95#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.09:59:48.95#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.09:59:48.95#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:48.95#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:49.01#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:49.01#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:49.01#ibcon#enter wrdev, iclass 7, count 2 2006.229.09:59:49.01#ibcon#first serial, iclass 7, count 2 2006.229.09:59:49.01#ibcon#enter sib2, iclass 7, count 2 2006.229.09:59:49.01#ibcon#flushed, iclass 7, count 2 2006.229.09:59:49.01#ibcon#about to write, iclass 7, count 2 2006.229.09:59:49.01#ibcon#wrote, iclass 7, count 2 2006.229.09:59:49.01#ibcon#about to read 3, iclass 7, count 2 2006.229.09:59:49.03#ibcon#read 3, iclass 7, count 2 2006.229.09:59:49.03#ibcon#about to read 4, iclass 7, count 2 2006.229.09:59:49.03#ibcon#read 4, iclass 7, count 2 2006.229.09:59:49.03#ibcon#about to read 5, iclass 7, count 2 2006.229.09:59:49.03#ibcon#read 5, iclass 7, count 2 2006.229.09:59:49.03#ibcon#about to read 6, iclass 7, count 2 2006.229.09:59:49.03#ibcon#read 6, iclass 7, count 2 2006.229.09:59:49.03#ibcon#end of sib2, iclass 7, count 2 2006.229.09:59:49.03#ibcon#*mode == 0, iclass 7, count 2 2006.229.09:59:49.03#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.09:59:49.03#ibcon#[25=AT06-04\r\n] 2006.229.09:59:49.03#ibcon#*before write, iclass 7, count 2 2006.229.09:59:49.03#ibcon#enter sib2, iclass 7, count 2 2006.229.09:59:49.03#ibcon#flushed, iclass 7, count 2 2006.229.09:59:49.03#ibcon#about to write, iclass 7, count 2 2006.229.09:59:49.03#ibcon#wrote, iclass 7, count 2 2006.229.09:59:49.03#ibcon#about to read 3, iclass 7, count 2 2006.229.09:59:49.06#ibcon#read 3, iclass 7, count 2 2006.229.09:59:49.06#ibcon#about to read 4, iclass 7, count 2 2006.229.09:59:49.06#ibcon#read 4, iclass 7, count 2 2006.229.09:59:49.06#ibcon#about to read 5, iclass 7, count 2 2006.229.09:59:49.06#ibcon#read 5, iclass 7, count 2 2006.229.09:59:49.06#ibcon#about to read 6, iclass 7, count 2 2006.229.09:59:49.06#ibcon#read 6, iclass 7, count 2 2006.229.09:59:49.06#ibcon#end of sib2, iclass 7, count 2 2006.229.09:59:49.06#ibcon#*after write, iclass 7, count 2 2006.229.09:59:49.06#ibcon#*before return 0, iclass 7, count 2 2006.229.09:59:49.06#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:49.06#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:49.06#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.09:59:49.06#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:49.06#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:49.18#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:49.18#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:49.18#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:59:49.18#ibcon#first serial, iclass 7, count 0 2006.229.09:59:49.18#ibcon#enter sib2, iclass 7, count 0 2006.229.09:59:49.18#ibcon#flushed, iclass 7, count 0 2006.229.09:59:49.18#ibcon#about to write, iclass 7, count 0 2006.229.09:59:49.18#ibcon#wrote, iclass 7, count 0 2006.229.09:59:49.18#ibcon#about to read 3, iclass 7, count 0 2006.229.09:59:49.20#ibcon#read 3, iclass 7, count 0 2006.229.09:59:49.20#ibcon#about to read 4, iclass 7, count 0 2006.229.09:59:49.20#ibcon#read 4, iclass 7, count 0 2006.229.09:59:49.20#ibcon#about to read 5, iclass 7, count 0 2006.229.09:59:49.20#ibcon#read 5, iclass 7, count 0 2006.229.09:59:49.20#ibcon#about to read 6, iclass 7, count 0 2006.229.09:59:49.20#ibcon#read 6, iclass 7, count 0 2006.229.09:59:49.20#ibcon#end of sib2, iclass 7, count 0 2006.229.09:59:49.20#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:59:49.20#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:59:49.20#ibcon#[25=USB\r\n] 2006.229.09:59:49.20#ibcon#*before write, iclass 7, count 0 2006.229.09:59:49.20#ibcon#enter sib2, iclass 7, count 0 2006.229.09:59:49.20#ibcon#flushed, iclass 7, count 0 2006.229.09:59:49.20#ibcon#about to write, iclass 7, count 0 2006.229.09:59:49.20#ibcon#wrote, iclass 7, count 0 2006.229.09:59:49.20#ibcon#about to read 3, iclass 7, count 0 2006.229.09:59:49.23#ibcon#read 3, iclass 7, count 0 2006.229.09:59:49.23#ibcon#about to read 4, iclass 7, count 0 2006.229.09:59:49.23#ibcon#read 4, iclass 7, count 0 2006.229.09:59:49.23#ibcon#about to read 5, iclass 7, count 0 2006.229.09:59:49.23#ibcon#read 5, iclass 7, count 0 2006.229.09:59:49.23#ibcon#about to read 6, iclass 7, count 0 2006.229.09:59:49.23#ibcon#read 6, iclass 7, count 0 2006.229.09:59:49.23#ibcon#end of sib2, iclass 7, count 0 2006.229.09:59:49.23#ibcon#*after write, iclass 7, count 0 2006.229.09:59:49.23#ibcon#*before return 0, iclass 7, count 0 2006.229.09:59:49.23#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:49.23#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:49.23#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:59:49.23#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:59:49.23$vck44/valo=7,864.99 2006.229.09:59:49.23#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:59:49.23#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:59:49.23#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:49.23#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:49.23#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:49.23#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:49.23#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:59:49.23#ibcon#first serial, iclass 11, count 0 2006.229.09:59:49.23#ibcon#enter sib2, iclass 11, count 0 2006.229.09:59:49.23#ibcon#flushed, iclass 11, count 0 2006.229.09:59:49.23#ibcon#about to write, iclass 11, count 0 2006.229.09:59:49.23#ibcon#wrote, iclass 11, count 0 2006.229.09:59:49.23#ibcon#about to read 3, iclass 11, count 0 2006.229.09:59:49.25#ibcon#read 3, iclass 11, count 0 2006.229.09:59:49.25#ibcon#about to read 4, iclass 11, count 0 2006.229.09:59:49.25#ibcon#read 4, iclass 11, count 0 2006.229.09:59:49.25#ibcon#about to read 5, iclass 11, count 0 2006.229.09:59:49.25#ibcon#read 5, iclass 11, count 0 2006.229.09:59:49.25#ibcon#about to read 6, iclass 11, count 0 2006.229.09:59:49.25#ibcon#read 6, iclass 11, count 0 2006.229.09:59:49.25#ibcon#end of sib2, iclass 11, count 0 2006.229.09:59:49.25#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:59:49.25#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:59:49.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.09:59:49.25#ibcon#*before write, iclass 11, count 0 2006.229.09:59:49.25#ibcon#enter sib2, iclass 11, count 0 2006.229.09:59:49.25#ibcon#flushed, iclass 11, count 0 2006.229.09:59:49.25#ibcon#about to write, iclass 11, count 0 2006.229.09:59:49.25#ibcon#wrote, iclass 11, count 0 2006.229.09:59:49.25#ibcon#about to read 3, iclass 11, count 0 2006.229.09:59:49.29#ibcon#read 3, iclass 11, count 0 2006.229.09:59:49.29#ibcon#about to read 4, iclass 11, count 0 2006.229.09:59:49.29#ibcon#read 4, iclass 11, count 0 2006.229.09:59:49.29#ibcon#about to read 5, iclass 11, count 0 2006.229.09:59:49.29#ibcon#read 5, iclass 11, count 0 2006.229.09:59:49.29#ibcon#about to read 6, iclass 11, count 0 2006.229.09:59:49.29#ibcon#read 6, iclass 11, count 0 2006.229.09:59:49.29#ibcon#end of sib2, iclass 11, count 0 2006.229.09:59:49.29#ibcon#*after write, iclass 11, count 0 2006.229.09:59:49.29#ibcon#*before return 0, iclass 11, count 0 2006.229.09:59:49.29#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:49.29#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:49.29#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:59:49.29#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:59:49.29$vck44/va=7,5 2006.229.09:59:49.29#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.09:59:49.29#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.09:59:49.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:49.29#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:59:49.35#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:59:49.35#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:59:49.35#ibcon#enter wrdev, iclass 13, count 2 2006.229.09:59:49.35#ibcon#first serial, iclass 13, count 2 2006.229.09:59:49.35#ibcon#enter sib2, iclass 13, count 2 2006.229.09:59:49.35#ibcon#flushed, iclass 13, count 2 2006.229.09:59:49.35#ibcon#about to write, iclass 13, count 2 2006.229.09:59:49.35#ibcon#wrote, iclass 13, count 2 2006.229.09:59:49.35#ibcon#about to read 3, iclass 13, count 2 2006.229.09:59:49.37#ibcon#read 3, iclass 13, count 2 2006.229.09:59:49.37#ibcon#about to read 4, iclass 13, count 2 2006.229.09:59:49.37#ibcon#read 4, iclass 13, count 2 2006.229.09:59:49.37#ibcon#about to read 5, iclass 13, count 2 2006.229.09:59:49.37#ibcon#read 5, iclass 13, count 2 2006.229.09:59:49.37#ibcon#about to read 6, iclass 13, count 2 2006.229.09:59:49.37#ibcon#read 6, iclass 13, count 2 2006.229.09:59:49.37#ibcon#end of sib2, iclass 13, count 2 2006.229.09:59:49.37#ibcon#*mode == 0, iclass 13, count 2 2006.229.09:59:49.37#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.09:59:49.37#ibcon#[25=AT07-05\r\n] 2006.229.09:59:49.37#ibcon#*before write, iclass 13, count 2 2006.229.09:59:49.37#ibcon#enter sib2, iclass 13, count 2 2006.229.09:59:49.37#ibcon#flushed, iclass 13, count 2 2006.229.09:59:49.37#ibcon#about to write, iclass 13, count 2 2006.229.09:59:49.37#ibcon#wrote, iclass 13, count 2 2006.229.09:59:49.37#ibcon#about to read 3, iclass 13, count 2 2006.229.09:59:49.40#ibcon#read 3, iclass 13, count 2 2006.229.09:59:49.40#ibcon#about to read 4, iclass 13, count 2 2006.229.09:59:49.40#ibcon#read 4, iclass 13, count 2 2006.229.09:59:49.40#ibcon#about to read 5, iclass 13, count 2 2006.229.09:59:49.40#ibcon#read 5, iclass 13, count 2 2006.229.09:59:49.40#ibcon#about to read 6, iclass 13, count 2 2006.229.09:59:49.40#ibcon#read 6, iclass 13, count 2 2006.229.09:59:49.40#ibcon#end of sib2, iclass 13, count 2 2006.229.09:59:49.40#ibcon#*after write, iclass 13, count 2 2006.229.09:59:49.40#ibcon#*before return 0, iclass 13, count 2 2006.229.09:59:49.40#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:59:49.40#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.09:59:49.40#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.09:59:49.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:49.40#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:59:49.52#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:59:49.52#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:59:49.52#ibcon#enter wrdev, iclass 13, count 0 2006.229.09:59:49.52#ibcon#first serial, iclass 13, count 0 2006.229.09:59:49.52#ibcon#enter sib2, iclass 13, count 0 2006.229.09:59:49.52#ibcon#flushed, iclass 13, count 0 2006.229.09:59:49.52#ibcon#about to write, iclass 13, count 0 2006.229.09:59:49.52#ibcon#wrote, iclass 13, count 0 2006.229.09:59:49.52#ibcon#about to read 3, iclass 13, count 0 2006.229.09:59:49.54#ibcon#read 3, iclass 13, count 0 2006.229.09:59:49.54#ibcon#about to read 4, iclass 13, count 0 2006.229.09:59:49.54#ibcon#read 4, iclass 13, count 0 2006.229.09:59:49.54#ibcon#about to read 5, iclass 13, count 0 2006.229.09:59:49.54#ibcon#read 5, iclass 13, count 0 2006.229.09:59:49.54#ibcon#about to read 6, iclass 13, count 0 2006.229.09:59:49.54#ibcon#read 6, iclass 13, count 0 2006.229.09:59:49.54#ibcon#end of sib2, iclass 13, count 0 2006.229.09:59:49.54#ibcon#*mode == 0, iclass 13, count 0 2006.229.09:59:49.54#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.09:59:49.54#ibcon#[25=USB\r\n] 2006.229.09:59:49.54#ibcon#*before write, iclass 13, count 0 2006.229.09:59:49.54#ibcon#enter sib2, iclass 13, count 0 2006.229.09:59:49.54#ibcon#flushed, iclass 13, count 0 2006.229.09:59:49.54#ibcon#about to write, iclass 13, count 0 2006.229.09:59:49.54#ibcon#wrote, iclass 13, count 0 2006.229.09:59:49.54#ibcon#about to read 3, iclass 13, count 0 2006.229.09:59:49.57#ibcon#read 3, iclass 13, count 0 2006.229.09:59:49.57#ibcon#about to read 4, iclass 13, count 0 2006.229.09:59:49.57#ibcon#read 4, iclass 13, count 0 2006.229.09:59:49.57#ibcon#about to read 5, iclass 13, count 0 2006.229.09:59:49.57#ibcon#read 5, iclass 13, count 0 2006.229.09:59:49.57#ibcon#about to read 6, iclass 13, count 0 2006.229.09:59:49.57#ibcon#read 6, iclass 13, count 0 2006.229.09:59:49.57#ibcon#end of sib2, iclass 13, count 0 2006.229.09:59:49.57#ibcon#*after write, iclass 13, count 0 2006.229.09:59:49.57#ibcon#*before return 0, iclass 13, count 0 2006.229.09:59:49.57#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:59:49.57#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.09:59:49.57#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.09:59:49.57#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.09:59:49.57$vck44/valo=8,884.99 2006.229.09:59:49.57#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.09:59:49.57#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.09:59:49.57#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:49.57#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:59:49.57#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:59:49.57#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:59:49.57#ibcon#enter wrdev, iclass 15, count 0 2006.229.09:59:49.57#ibcon#first serial, iclass 15, count 0 2006.229.09:59:49.57#ibcon#enter sib2, iclass 15, count 0 2006.229.09:59:49.57#ibcon#flushed, iclass 15, count 0 2006.229.09:59:49.57#ibcon#about to write, iclass 15, count 0 2006.229.09:59:49.57#ibcon#wrote, iclass 15, count 0 2006.229.09:59:49.57#ibcon#about to read 3, iclass 15, count 0 2006.229.09:59:49.59#ibcon#read 3, iclass 15, count 0 2006.229.09:59:49.59#ibcon#about to read 4, iclass 15, count 0 2006.229.09:59:49.59#ibcon#read 4, iclass 15, count 0 2006.229.09:59:49.59#ibcon#about to read 5, iclass 15, count 0 2006.229.09:59:49.59#ibcon#read 5, iclass 15, count 0 2006.229.09:59:49.59#ibcon#about to read 6, iclass 15, count 0 2006.229.09:59:49.59#ibcon#read 6, iclass 15, count 0 2006.229.09:59:49.59#ibcon#end of sib2, iclass 15, count 0 2006.229.09:59:49.59#ibcon#*mode == 0, iclass 15, count 0 2006.229.09:59:49.59#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.09:59:49.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.09:59:49.59#ibcon#*before write, iclass 15, count 0 2006.229.09:59:49.59#ibcon#enter sib2, iclass 15, count 0 2006.229.09:59:49.59#ibcon#flushed, iclass 15, count 0 2006.229.09:59:49.59#ibcon#about to write, iclass 15, count 0 2006.229.09:59:49.59#ibcon#wrote, iclass 15, count 0 2006.229.09:59:49.59#ibcon#about to read 3, iclass 15, count 0 2006.229.09:59:49.63#ibcon#read 3, iclass 15, count 0 2006.229.09:59:49.63#ibcon#about to read 4, iclass 15, count 0 2006.229.09:59:49.63#ibcon#read 4, iclass 15, count 0 2006.229.09:59:49.63#ibcon#about to read 5, iclass 15, count 0 2006.229.09:59:49.63#ibcon#read 5, iclass 15, count 0 2006.229.09:59:49.63#ibcon#about to read 6, iclass 15, count 0 2006.229.09:59:49.63#ibcon#read 6, iclass 15, count 0 2006.229.09:59:49.63#ibcon#end of sib2, iclass 15, count 0 2006.229.09:59:49.63#ibcon#*after write, iclass 15, count 0 2006.229.09:59:49.63#ibcon#*before return 0, iclass 15, count 0 2006.229.09:59:49.63#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:59:49.63#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.09:59:49.63#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.09:59:49.63#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.09:59:49.63$vck44/va=8,6 2006.229.09:59:49.63#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.09:59:49.63#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.09:59:49.63#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:49.63#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:59:49.69#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:59:49.69#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:59:49.69#ibcon#enter wrdev, iclass 17, count 2 2006.229.09:59:49.69#ibcon#first serial, iclass 17, count 2 2006.229.09:59:49.69#ibcon#enter sib2, iclass 17, count 2 2006.229.09:59:49.69#ibcon#flushed, iclass 17, count 2 2006.229.09:59:49.69#ibcon#about to write, iclass 17, count 2 2006.229.09:59:49.69#ibcon#wrote, iclass 17, count 2 2006.229.09:59:49.69#ibcon#about to read 3, iclass 17, count 2 2006.229.09:59:49.71#ibcon#read 3, iclass 17, count 2 2006.229.09:59:49.71#ibcon#about to read 4, iclass 17, count 2 2006.229.09:59:49.71#ibcon#read 4, iclass 17, count 2 2006.229.09:59:49.71#ibcon#about to read 5, iclass 17, count 2 2006.229.09:59:49.71#ibcon#read 5, iclass 17, count 2 2006.229.09:59:49.71#ibcon#about to read 6, iclass 17, count 2 2006.229.09:59:49.71#ibcon#read 6, iclass 17, count 2 2006.229.09:59:49.71#ibcon#end of sib2, iclass 17, count 2 2006.229.09:59:49.71#ibcon#*mode == 0, iclass 17, count 2 2006.229.09:59:49.71#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.09:59:49.71#ibcon#[25=AT08-06\r\n] 2006.229.09:59:49.71#ibcon#*before write, iclass 17, count 2 2006.229.09:59:49.71#ibcon#enter sib2, iclass 17, count 2 2006.229.09:59:49.71#ibcon#flushed, iclass 17, count 2 2006.229.09:59:49.71#ibcon#about to write, iclass 17, count 2 2006.229.09:59:49.71#ibcon#wrote, iclass 17, count 2 2006.229.09:59:49.71#ibcon#about to read 3, iclass 17, count 2 2006.229.09:59:49.74#ibcon#read 3, iclass 17, count 2 2006.229.09:59:49.74#ibcon#about to read 4, iclass 17, count 2 2006.229.09:59:49.74#ibcon#read 4, iclass 17, count 2 2006.229.09:59:49.74#ibcon#about to read 5, iclass 17, count 2 2006.229.09:59:49.74#ibcon#read 5, iclass 17, count 2 2006.229.09:59:49.74#ibcon#about to read 6, iclass 17, count 2 2006.229.09:59:49.74#ibcon#read 6, iclass 17, count 2 2006.229.09:59:49.74#ibcon#end of sib2, iclass 17, count 2 2006.229.09:59:49.74#ibcon#*after write, iclass 17, count 2 2006.229.09:59:49.74#ibcon#*before return 0, iclass 17, count 2 2006.229.09:59:49.74#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:59:49.74#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.09:59:49.74#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.09:59:49.74#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:49.74#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:59:49.86#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:59:49.86#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:59:49.86#ibcon#enter wrdev, iclass 17, count 0 2006.229.09:59:49.86#ibcon#first serial, iclass 17, count 0 2006.229.09:59:49.86#ibcon#enter sib2, iclass 17, count 0 2006.229.09:59:49.86#ibcon#flushed, iclass 17, count 0 2006.229.09:59:49.86#ibcon#about to write, iclass 17, count 0 2006.229.09:59:49.86#ibcon#wrote, iclass 17, count 0 2006.229.09:59:49.86#ibcon#about to read 3, iclass 17, count 0 2006.229.09:59:49.88#ibcon#read 3, iclass 17, count 0 2006.229.09:59:49.88#ibcon#about to read 4, iclass 17, count 0 2006.229.09:59:49.88#ibcon#read 4, iclass 17, count 0 2006.229.09:59:49.88#ibcon#about to read 5, iclass 17, count 0 2006.229.09:59:49.88#ibcon#read 5, iclass 17, count 0 2006.229.09:59:49.88#ibcon#about to read 6, iclass 17, count 0 2006.229.09:59:49.88#ibcon#read 6, iclass 17, count 0 2006.229.09:59:49.88#ibcon#end of sib2, iclass 17, count 0 2006.229.09:59:49.88#ibcon#*mode == 0, iclass 17, count 0 2006.229.09:59:49.88#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.09:59:49.88#ibcon#[25=USB\r\n] 2006.229.09:59:49.88#ibcon#*before write, iclass 17, count 0 2006.229.09:59:49.88#ibcon#enter sib2, iclass 17, count 0 2006.229.09:59:49.88#ibcon#flushed, iclass 17, count 0 2006.229.09:59:49.88#ibcon#about to write, iclass 17, count 0 2006.229.09:59:49.88#ibcon#wrote, iclass 17, count 0 2006.229.09:59:49.88#ibcon#about to read 3, iclass 17, count 0 2006.229.09:59:49.91#ibcon#read 3, iclass 17, count 0 2006.229.09:59:49.91#ibcon#about to read 4, iclass 17, count 0 2006.229.09:59:49.91#ibcon#read 4, iclass 17, count 0 2006.229.09:59:49.91#ibcon#about to read 5, iclass 17, count 0 2006.229.09:59:49.91#ibcon#read 5, iclass 17, count 0 2006.229.09:59:49.91#ibcon#about to read 6, iclass 17, count 0 2006.229.09:59:49.91#ibcon#read 6, iclass 17, count 0 2006.229.09:59:49.91#ibcon#end of sib2, iclass 17, count 0 2006.229.09:59:49.91#ibcon#*after write, iclass 17, count 0 2006.229.09:59:49.91#ibcon#*before return 0, iclass 17, count 0 2006.229.09:59:49.91#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:59:49.91#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.09:59:49.91#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.09:59:49.91#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.09:59:49.91$vck44/vblo=1,629.99 2006.229.09:59:49.91#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.09:59:49.91#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.09:59:49.91#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:49.91#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:49.91#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:49.91#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:49.91#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:59:49.91#ibcon#first serial, iclass 19, count 0 2006.229.09:59:49.91#ibcon#enter sib2, iclass 19, count 0 2006.229.09:59:49.91#ibcon#flushed, iclass 19, count 0 2006.229.09:59:49.91#ibcon#about to write, iclass 19, count 0 2006.229.09:59:49.91#ibcon#wrote, iclass 19, count 0 2006.229.09:59:49.91#ibcon#about to read 3, iclass 19, count 0 2006.229.09:59:49.93#ibcon#read 3, iclass 19, count 0 2006.229.09:59:49.93#ibcon#about to read 4, iclass 19, count 0 2006.229.09:59:49.93#ibcon#read 4, iclass 19, count 0 2006.229.09:59:49.93#ibcon#about to read 5, iclass 19, count 0 2006.229.09:59:49.93#ibcon#read 5, iclass 19, count 0 2006.229.09:59:49.93#ibcon#about to read 6, iclass 19, count 0 2006.229.09:59:49.93#ibcon#read 6, iclass 19, count 0 2006.229.09:59:49.93#ibcon#end of sib2, iclass 19, count 0 2006.229.09:59:49.93#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:59:49.93#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:59:49.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.09:59:49.93#ibcon#*before write, iclass 19, count 0 2006.229.09:59:49.93#ibcon#enter sib2, iclass 19, count 0 2006.229.09:59:49.93#ibcon#flushed, iclass 19, count 0 2006.229.09:59:49.93#ibcon#about to write, iclass 19, count 0 2006.229.09:59:49.93#ibcon#wrote, iclass 19, count 0 2006.229.09:59:49.93#ibcon#about to read 3, iclass 19, count 0 2006.229.09:59:49.97#ibcon#read 3, iclass 19, count 0 2006.229.09:59:49.97#ibcon#about to read 4, iclass 19, count 0 2006.229.09:59:49.97#ibcon#read 4, iclass 19, count 0 2006.229.09:59:49.97#ibcon#about to read 5, iclass 19, count 0 2006.229.09:59:49.97#ibcon#read 5, iclass 19, count 0 2006.229.09:59:49.97#ibcon#about to read 6, iclass 19, count 0 2006.229.09:59:49.97#ibcon#read 6, iclass 19, count 0 2006.229.09:59:49.97#ibcon#end of sib2, iclass 19, count 0 2006.229.09:59:49.97#ibcon#*after write, iclass 19, count 0 2006.229.09:59:49.97#ibcon#*before return 0, iclass 19, count 0 2006.229.09:59:49.97#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:49.97#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:49.97#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:59:49.97#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:59:49.97$vck44/vb=1,4 2006.229.09:59:49.97#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.09:59:49.97#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.09:59:49.97#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:49.97#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:59:49.97#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:59:49.97#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:59:49.97#ibcon#enter wrdev, iclass 21, count 2 2006.229.09:59:49.97#ibcon#first serial, iclass 21, count 2 2006.229.09:59:49.97#ibcon#enter sib2, iclass 21, count 2 2006.229.09:59:49.97#ibcon#flushed, iclass 21, count 2 2006.229.09:59:49.97#ibcon#about to write, iclass 21, count 2 2006.229.09:59:49.97#ibcon#wrote, iclass 21, count 2 2006.229.09:59:49.97#ibcon#about to read 3, iclass 21, count 2 2006.229.09:59:49.99#ibcon#read 3, iclass 21, count 2 2006.229.09:59:49.99#ibcon#about to read 4, iclass 21, count 2 2006.229.09:59:49.99#ibcon#read 4, iclass 21, count 2 2006.229.09:59:49.99#ibcon#about to read 5, iclass 21, count 2 2006.229.09:59:49.99#ibcon#read 5, iclass 21, count 2 2006.229.09:59:49.99#ibcon#about to read 6, iclass 21, count 2 2006.229.09:59:49.99#ibcon#read 6, iclass 21, count 2 2006.229.09:59:49.99#ibcon#end of sib2, iclass 21, count 2 2006.229.09:59:49.99#ibcon#*mode == 0, iclass 21, count 2 2006.229.09:59:49.99#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.09:59:49.99#ibcon#[27=AT01-04\r\n] 2006.229.09:59:49.99#ibcon#*before write, iclass 21, count 2 2006.229.09:59:49.99#ibcon#enter sib2, iclass 21, count 2 2006.229.09:59:49.99#ibcon#flushed, iclass 21, count 2 2006.229.09:59:49.99#ibcon#about to write, iclass 21, count 2 2006.229.09:59:49.99#ibcon#wrote, iclass 21, count 2 2006.229.09:59:49.99#ibcon#about to read 3, iclass 21, count 2 2006.229.09:59:50.02#ibcon#read 3, iclass 21, count 2 2006.229.09:59:50.02#ibcon#about to read 4, iclass 21, count 2 2006.229.09:59:50.02#ibcon#read 4, iclass 21, count 2 2006.229.09:59:50.02#ibcon#about to read 5, iclass 21, count 2 2006.229.09:59:50.02#ibcon#read 5, iclass 21, count 2 2006.229.09:59:50.02#ibcon#about to read 6, iclass 21, count 2 2006.229.09:59:50.02#ibcon#read 6, iclass 21, count 2 2006.229.09:59:50.02#ibcon#end of sib2, iclass 21, count 2 2006.229.09:59:50.02#ibcon#*after write, iclass 21, count 2 2006.229.09:59:50.02#ibcon#*before return 0, iclass 21, count 2 2006.229.09:59:50.02#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:59:50.02#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.09:59:50.02#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.09:59:50.02#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:50.02#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:59:50.14#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:59:50.14#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:59:50.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:59:50.14#ibcon#first serial, iclass 21, count 0 2006.229.09:59:50.14#ibcon#enter sib2, iclass 21, count 0 2006.229.09:59:50.14#ibcon#flushed, iclass 21, count 0 2006.229.09:59:50.14#ibcon#about to write, iclass 21, count 0 2006.229.09:59:50.14#ibcon#wrote, iclass 21, count 0 2006.229.09:59:50.14#ibcon#about to read 3, iclass 21, count 0 2006.229.09:59:50.16#ibcon#read 3, iclass 21, count 0 2006.229.09:59:50.16#ibcon#about to read 4, iclass 21, count 0 2006.229.09:59:50.16#ibcon#read 4, iclass 21, count 0 2006.229.09:59:50.16#ibcon#about to read 5, iclass 21, count 0 2006.229.09:59:50.16#ibcon#read 5, iclass 21, count 0 2006.229.09:59:50.16#ibcon#about to read 6, iclass 21, count 0 2006.229.09:59:50.16#ibcon#read 6, iclass 21, count 0 2006.229.09:59:50.16#ibcon#end of sib2, iclass 21, count 0 2006.229.09:59:50.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:59:50.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:59:50.16#ibcon#[27=USB\r\n] 2006.229.09:59:50.16#ibcon#*before write, iclass 21, count 0 2006.229.09:59:50.16#ibcon#enter sib2, iclass 21, count 0 2006.229.09:59:50.16#ibcon#flushed, iclass 21, count 0 2006.229.09:59:50.16#ibcon#about to write, iclass 21, count 0 2006.229.09:59:50.16#ibcon#wrote, iclass 21, count 0 2006.229.09:59:50.16#ibcon#about to read 3, iclass 21, count 0 2006.229.09:59:50.19#ibcon#read 3, iclass 21, count 0 2006.229.09:59:50.19#ibcon#about to read 4, iclass 21, count 0 2006.229.09:59:50.19#ibcon#read 4, iclass 21, count 0 2006.229.09:59:50.19#ibcon#about to read 5, iclass 21, count 0 2006.229.09:59:50.19#ibcon#read 5, iclass 21, count 0 2006.229.09:59:50.19#ibcon#about to read 6, iclass 21, count 0 2006.229.09:59:50.19#ibcon#read 6, iclass 21, count 0 2006.229.09:59:50.19#ibcon#end of sib2, iclass 21, count 0 2006.229.09:59:50.19#ibcon#*after write, iclass 21, count 0 2006.229.09:59:50.19#ibcon#*before return 0, iclass 21, count 0 2006.229.09:59:50.19#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:59:50.19#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.09:59:50.19#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:59:50.19#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:59:50.19$vck44/vblo=2,634.99 2006.229.09:59:50.19#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.09:59:50.19#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.09:59:50.19#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:50.19#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:50.19#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:50.19#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:50.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.09:59:50.19#ibcon#first serial, iclass 23, count 0 2006.229.09:59:50.19#ibcon#enter sib2, iclass 23, count 0 2006.229.09:59:50.19#ibcon#flushed, iclass 23, count 0 2006.229.09:59:50.19#ibcon#about to write, iclass 23, count 0 2006.229.09:59:50.19#ibcon#wrote, iclass 23, count 0 2006.229.09:59:50.19#ibcon#about to read 3, iclass 23, count 0 2006.229.09:59:50.21#ibcon#read 3, iclass 23, count 0 2006.229.09:59:50.21#ibcon#about to read 4, iclass 23, count 0 2006.229.09:59:50.21#ibcon#read 4, iclass 23, count 0 2006.229.09:59:50.21#ibcon#about to read 5, iclass 23, count 0 2006.229.09:59:50.21#ibcon#read 5, iclass 23, count 0 2006.229.09:59:50.21#ibcon#about to read 6, iclass 23, count 0 2006.229.09:59:50.21#ibcon#read 6, iclass 23, count 0 2006.229.09:59:50.21#ibcon#end of sib2, iclass 23, count 0 2006.229.09:59:50.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.09:59:50.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.09:59:50.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.09:59:50.21#ibcon#*before write, iclass 23, count 0 2006.229.09:59:50.21#ibcon#enter sib2, iclass 23, count 0 2006.229.09:59:50.21#ibcon#flushed, iclass 23, count 0 2006.229.09:59:50.21#ibcon#about to write, iclass 23, count 0 2006.229.09:59:50.21#ibcon#wrote, iclass 23, count 0 2006.229.09:59:50.21#ibcon#about to read 3, iclass 23, count 0 2006.229.09:59:50.25#ibcon#read 3, iclass 23, count 0 2006.229.09:59:50.25#ibcon#about to read 4, iclass 23, count 0 2006.229.09:59:50.25#ibcon#read 4, iclass 23, count 0 2006.229.09:59:50.25#ibcon#about to read 5, iclass 23, count 0 2006.229.09:59:50.25#ibcon#read 5, iclass 23, count 0 2006.229.09:59:50.25#ibcon#about to read 6, iclass 23, count 0 2006.229.09:59:50.25#ibcon#read 6, iclass 23, count 0 2006.229.09:59:50.25#ibcon#end of sib2, iclass 23, count 0 2006.229.09:59:50.25#ibcon#*after write, iclass 23, count 0 2006.229.09:59:50.25#ibcon#*before return 0, iclass 23, count 0 2006.229.09:59:50.25#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:50.25#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.09:59:50.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.09:59:50.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.09:59:50.25$vck44/vb=2,4 2006.229.09:59:50.25#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.09:59:50.25#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.09:59:50.25#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:50.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:50.31#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:50.31#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:50.31#ibcon#enter wrdev, iclass 25, count 2 2006.229.09:59:50.31#ibcon#first serial, iclass 25, count 2 2006.229.09:59:50.31#ibcon#enter sib2, iclass 25, count 2 2006.229.09:59:50.31#ibcon#flushed, iclass 25, count 2 2006.229.09:59:50.31#ibcon#about to write, iclass 25, count 2 2006.229.09:59:50.31#ibcon#wrote, iclass 25, count 2 2006.229.09:59:50.31#ibcon#about to read 3, iclass 25, count 2 2006.229.09:59:50.33#ibcon#read 3, iclass 25, count 2 2006.229.09:59:50.33#ibcon#about to read 4, iclass 25, count 2 2006.229.09:59:50.33#ibcon#read 4, iclass 25, count 2 2006.229.09:59:50.33#ibcon#about to read 5, iclass 25, count 2 2006.229.09:59:50.33#ibcon#read 5, iclass 25, count 2 2006.229.09:59:50.33#ibcon#about to read 6, iclass 25, count 2 2006.229.09:59:50.33#ibcon#read 6, iclass 25, count 2 2006.229.09:59:50.33#ibcon#end of sib2, iclass 25, count 2 2006.229.09:59:50.33#ibcon#*mode == 0, iclass 25, count 2 2006.229.09:59:50.33#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.09:59:50.33#ibcon#[27=AT02-04\r\n] 2006.229.09:59:50.33#ibcon#*before write, iclass 25, count 2 2006.229.09:59:50.33#ibcon#enter sib2, iclass 25, count 2 2006.229.09:59:50.33#ibcon#flushed, iclass 25, count 2 2006.229.09:59:50.33#ibcon#about to write, iclass 25, count 2 2006.229.09:59:50.33#ibcon#wrote, iclass 25, count 2 2006.229.09:59:50.33#ibcon#about to read 3, iclass 25, count 2 2006.229.09:59:50.36#ibcon#read 3, iclass 25, count 2 2006.229.09:59:50.36#ibcon#about to read 4, iclass 25, count 2 2006.229.09:59:50.36#ibcon#read 4, iclass 25, count 2 2006.229.09:59:50.36#ibcon#about to read 5, iclass 25, count 2 2006.229.09:59:50.36#ibcon#read 5, iclass 25, count 2 2006.229.09:59:50.36#ibcon#about to read 6, iclass 25, count 2 2006.229.09:59:50.36#ibcon#read 6, iclass 25, count 2 2006.229.09:59:50.36#ibcon#end of sib2, iclass 25, count 2 2006.229.09:59:50.36#ibcon#*after write, iclass 25, count 2 2006.229.09:59:50.36#ibcon#*before return 0, iclass 25, count 2 2006.229.09:59:50.36#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:50.36#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.09:59:50.36#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.09:59:50.36#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:50.36#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:50.48#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:50.48#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:50.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.09:59:50.48#ibcon#first serial, iclass 25, count 0 2006.229.09:59:50.48#ibcon#enter sib2, iclass 25, count 0 2006.229.09:59:50.48#ibcon#flushed, iclass 25, count 0 2006.229.09:59:50.48#ibcon#about to write, iclass 25, count 0 2006.229.09:59:50.48#ibcon#wrote, iclass 25, count 0 2006.229.09:59:50.48#ibcon#about to read 3, iclass 25, count 0 2006.229.09:59:50.50#ibcon#read 3, iclass 25, count 0 2006.229.09:59:50.50#ibcon#about to read 4, iclass 25, count 0 2006.229.09:59:50.50#ibcon#read 4, iclass 25, count 0 2006.229.09:59:50.50#ibcon#about to read 5, iclass 25, count 0 2006.229.09:59:50.50#ibcon#read 5, iclass 25, count 0 2006.229.09:59:50.50#ibcon#about to read 6, iclass 25, count 0 2006.229.09:59:50.50#ibcon#read 6, iclass 25, count 0 2006.229.09:59:50.50#ibcon#end of sib2, iclass 25, count 0 2006.229.09:59:50.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.09:59:50.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.09:59:50.50#ibcon#[27=USB\r\n] 2006.229.09:59:50.50#ibcon#*before write, iclass 25, count 0 2006.229.09:59:50.50#ibcon#enter sib2, iclass 25, count 0 2006.229.09:59:50.50#ibcon#flushed, iclass 25, count 0 2006.229.09:59:50.50#ibcon#about to write, iclass 25, count 0 2006.229.09:59:50.50#ibcon#wrote, iclass 25, count 0 2006.229.09:59:50.50#ibcon#about to read 3, iclass 25, count 0 2006.229.09:59:50.53#ibcon#read 3, iclass 25, count 0 2006.229.09:59:50.53#ibcon#about to read 4, iclass 25, count 0 2006.229.09:59:50.53#ibcon#read 4, iclass 25, count 0 2006.229.09:59:50.53#ibcon#about to read 5, iclass 25, count 0 2006.229.09:59:50.53#ibcon#read 5, iclass 25, count 0 2006.229.09:59:50.53#ibcon#about to read 6, iclass 25, count 0 2006.229.09:59:50.53#ibcon#read 6, iclass 25, count 0 2006.229.09:59:50.53#ibcon#end of sib2, iclass 25, count 0 2006.229.09:59:50.53#ibcon#*after write, iclass 25, count 0 2006.229.09:59:50.53#ibcon#*before return 0, iclass 25, count 0 2006.229.09:59:50.53#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:50.53#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.09:59:50.53#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.09:59:50.53#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.09:59:50.53$vck44/vblo=3,649.99 2006.229.09:59:50.53#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.09:59:50.53#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.09:59:50.53#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:50.53#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:50.53#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:50.53#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:50.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.09:59:50.53#ibcon#first serial, iclass 27, count 0 2006.229.09:59:50.53#ibcon#enter sib2, iclass 27, count 0 2006.229.09:59:50.53#ibcon#flushed, iclass 27, count 0 2006.229.09:59:50.53#ibcon#about to write, iclass 27, count 0 2006.229.09:59:50.53#ibcon#wrote, iclass 27, count 0 2006.229.09:59:50.53#ibcon#about to read 3, iclass 27, count 0 2006.229.09:59:50.55#ibcon#read 3, iclass 27, count 0 2006.229.09:59:50.55#ibcon#about to read 4, iclass 27, count 0 2006.229.09:59:50.55#ibcon#read 4, iclass 27, count 0 2006.229.09:59:50.55#ibcon#about to read 5, iclass 27, count 0 2006.229.09:59:50.55#ibcon#read 5, iclass 27, count 0 2006.229.09:59:50.55#ibcon#about to read 6, iclass 27, count 0 2006.229.09:59:50.55#ibcon#read 6, iclass 27, count 0 2006.229.09:59:50.55#ibcon#end of sib2, iclass 27, count 0 2006.229.09:59:50.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.09:59:50.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.09:59:50.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.09:59:50.55#ibcon#*before write, iclass 27, count 0 2006.229.09:59:50.55#ibcon#enter sib2, iclass 27, count 0 2006.229.09:59:50.55#ibcon#flushed, iclass 27, count 0 2006.229.09:59:50.55#ibcon#about to write, iclass 27, count 0 2006.229.09:59:50.55#ibcon#wrote, iclass 27, count 0 2006.229.09:59:50.55#ibcon#about to read 3, iclass 27, count 0 2006.229.09:59:50.59#ibcon#read 3, iclass 27, count 0 2006.229.09:59:50.59#ibcon#about to read 4, iclass 27, count 0 2006.229.09:59:50.59#ibcon#read 4, iclass 27, count 0 2006.229.09:59:50.59#ibcon#about to read 5, iclass 27, count 0 2006.229.09:59:50.59#ibcon#read 5, iclass 27, count 0 2006.229.09:59:50.59#ibcon#about to read 6, iclass 27, count 0 2006.229.09:59:50.59#ibcon#read 6, iclass 27, count 0 2006.229.09:59:50.59#ibcon#end of sib2, iclass 27, count 0 2006.229.09:59:50.59#ibcon#*after write, iclass 27, count 0 2006.229.09:59:50.59#ibcon#*before return 0, iclass 27, count 0 2006.229.09:59:50.59#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:50.59#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.09:59:50.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.09:59:50.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.09:59:50.59$vck44/vb=3,4 2006.229.09:59:50.59#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.09:59:50.59#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.09:59:50.59#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:50.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:50.65#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:50.65#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:50.65#ibcon#enter wrdev, iclass 29, count 2 2006.229.09:59:50.65#ibcon#first serial, iclass 29, count 2 2006.229.09:59:50.65#ibcon#enter sib2, iclass 29, count 2 2006.229.09:59:50.65#ibcon#flushed, iclass 29, count 2 2006.229.09:59:50.65#ibcon#about to write, iclass 29, count 2 2006.229.09:59:50.65#ibcon#wrote, iclass 29, count 2 2006.229.09:59:50.65#ibcon#about to read 3, iclass 29, count 2 2006.229.09:59:50.67#ibcon#read 3, iclass 29, count 2 2006.229.09:59:50.67#ibcon#about to read 4, iclass 29, count 2 2006.229.09:59:50.67#ibcon#read 4, iclass 29, count 2 2006.229.09:59:50.67#ibcon#about to read 5, iclass 29, count 2 2006.229.09:59:50.67#ibcon#read 5, iclass 29, count 2 2006.229.09:59:50.67#ibcon#about to read 6, iclass 29, count 2 2006.229.09:59:50.67#ibcon#read 6, iclass 29, count 2 2006.229.09:59:50.67#ibcon#end of sib2, iclass 29, count 2 2006.229.09:59:50.67#ibcon#*mode == 0, iclass 29, count 2 2006.229.09:59:50.67#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.09:59:50.67#ibcon#[27=AT03-04\r\n] 2006.229.09:59:50.67#ibcon#*before write, iclass 29, count 2 2006.229.09:59:50.67#ibcon#enter sib2, iclass 29, count 2 2006.229.09:59:50.67#ibcon#flushed, iclass 29, count 2 2006.229.09:59:50.67#ibcon#about to write, iclass 29, count 2 2006.229.09:59:50.67#ibcon#wrote, iclass 29, count 2 2006.229.09:59:50.67#ibcon#about to read 3, iclass 29, count 2 2006.229.09:59:50.70#ibcon#read 3, iclass 29, count 2 2006.229.09:59:50.70#ibcon#about to read 4, iclass 29, count 2 2006.229.09:59:50.70#ibcon#read 4, iclass 29, count 2 2006.229.09:59:50.70#ibcon#about to read 5, iclass 29, count 2 2006.229.09:59:50.70#ibcon#read 5, iclass 29, count 2 2006.229.09:59:50.70#ibcon#about to read 6, iclass 29, count 2 2006.229.09:59:50.70#ibcon#read 6, iclass 29, count 2 2006.229.09:59:50.70#ibcon#end of sib2, iclass 29, count 2 2006.229.09:59:50.70#ibcon#*after write, iclass 29, count 2 2006.229.09:59:50.70#ibcon#*before return 0, iclass 29, count 2 2006.229.09:59:50.70#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:50.70#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.09:59:50.70#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.09:59:50.70#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:50.70#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:50.82#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:50.82#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:50.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.09:59:50.82#ibcon#first serial, iclass 29, count 0 2006.229.09:59:50.82#ibcon#enter sib2, iclass 29, count 0 2006.229.09:59:50.82#ibcon#flushed, iclass 29, count 0 2006.229.09:59:50.82#ibcon#about to write, iclass 29, count 0 2006.229.09:59:50.82#ibcon#wrote, iclass 29, count 0 2006.229.09:59:50.82#ibcon#about to read 3, iclass 29, count 0 2006.229.09:59:50.84#ibcon#read 3, iclass 29, count 0 2006.229.09:59:50.84#ibcon#about to read 4, iclass 29, count 0 2006.229.09:59:50.84#ibcon#read 4, iclass 29, count 0 2006.229.09:59:50.84#ibcon#about to read 5, iclass 29, count 0 2006.229.09:59:50.84#ibcon#read 5, iclass 29, count 0 2006.229.09:59:50.84#ibcon#about to read 6, iclass 29, count 0 2006.229.09:59:50.84#ibcon#read 6, iclass 29, count 0 2006.229.09:59:50.84#ibcon#end of sib2, iclass 29, count 0 2006.229.09:59:50.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.09:59:50.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.09:59:50.84#ibcon#[27=USB\r\n] 2006.229.09:59:50.84#ibcon#*before write, iclass 29, count 0 2006.229.09:59:50.84#ibcon#enter sib2, iclass 29, count 0 2006.229.09:59:50.84#ibcon#flushed, iclass 29, count 0 2006.229.09:59:50.84#ibcon#about to write, iclass 29, count 0 2006.229.09:59:50.84#ibcon#wrote, iclass 29, count 0 2006.229.09:59:50.84#ibcon#about to read 3, iclass 29, count 0 2006.229.09:59:50.87#ibcon#read 3, iclass 29, count 0 2006.229.09:59:50.87#ibcon#about to read 4, iclass 29, count 0 2006.229.09:59:50.87#ibcon#read 4, iclass 29, count 0 2006.229.09:59:50.87#ibcon#about to read 5, iclass 29, count 0 2006.229.09:59:50.87#ibcon#read 5, iclass 29, count 0 2006.229.09:59:50.87#ibcon#about to read 6, iclass 29, count 0 2006.229.09:59:50.87#ibcon#read 6, iclass 29, count 0 2006.229.09:59:50.87#ibcon#end of sib2, iclass 29, count 0 2006.229.09:59:50.87#ibcon#*after write, iclass 29, count 0 2006.229.09:59:50.87#ibcon#*before return 0, iclass 29, count 0 2006.229.09:59:50.87#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:50.87#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.09:59:50.87#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.09:59:50.87#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.09:59:50.87$vck44/vblo=4,679.99 2006.229.09:59:50.87#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.09:59:50.87#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.09:59:50.87#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:50.87#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:50.87#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:50.87#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:50.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.09:59:50.87#ibcon#first serial, iclass 31, count 0 2006.229.09:59:50.87#ibcon#enter sib2, iclass 31, count 0 2006.229.09:59:50.87#ibcon#flushed, iclass 31, count 0 2006.229.09:59:50.87#ibcon#about to write, iclass 31, count 0 2006.229.09:59:50.87#ibcon#wrote, iclass 31, count 0 2006.229.09:59:50.87#ibcon#about to read 3, iclass 31, count 0 2006.229.09:59:50.89#ibcon#read 3, iclass 31, count 0 2006.229.09:59:50.89#ibcon#about to read 4, iclass 31, count 0 2006.229.09:59:50.89#ibcon#read 4, iclass 31, count 0 2006.229.09:59:50.89#ibcon#about to read 5, iclass 31, count 0 2006.229.09:59:50.89#ibcon#read 5, iclass 31, count 0 2006.229.09:59:50.89#ibcon#about to read 6, iclass 31, count 0 2006.229.09:59:50.89#ibcon#read 6, iclass 31, count 0 2006.229.09:59:50.89#ibcon#end of sib2, iclass 31, count 0 2006.229.09:59:50.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.09:59:50.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.09:59:50.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.09:59:50.89#ibcon#*before write, iclass 31, count 0 2006.229.09:59:50.89#ibcon#enter sib2, iclass 31, count 0 2006.229.09:59:50.89#ibcon#flushed, iclass 31, count 0 2006.229.09:59:50.89#ibcon#about to write, iclass 31, count 0 2006.229.09:59:50.89#ibcon#wrote, iclass 31, count 0 2006.229.09:59:50.89#ibcon#about to read 3, iclass 31, count 0 2006.229.09:59:50.93#ibcon#read 3, iclass 31, count 0 2006.229.09:59:50.93#ibcon#about to read 4, iclass 31, count 0 2006.229.09:59:50.93#ibcon#read 4, iclass 31, count 0 2006.229.09:59:50.93#ibcon#about to read 5, iclass 31, count 0 2006.229.09:59:50.93#ibcon#read 5, iclass 31, count 0 2006.229.09:59:50.93#ibcon#about to read 6, iclass 31, count 0 2006.229.09:59:50.93#ibcon#read 6, iclass 31, count 0 2006.229.09:59:50.93#ibcon#end of sib2, iclass 31, count 0 2006.229.09:59:50.93#ibcon#*after write, iclass 31, count 0 2006.229.09:59:50.93#ibcon#*before return 0, iclass 31, count 0 2006.229.09:59:50.93#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:50.93#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.09:59:50.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.09:59:50.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.09:59:50.93$vck44/vb=4,4 2006.229.09:59:50.93#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.09:59:50.93#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.09:59:50.93#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:50.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:50.99#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:50.99#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:50.99#ibcon#enter wrdev, iclass 33, count 2 2006.229.09:59:50.99#ibcon#first serial, iclass 33, count 2 2006.229.09:59:50.99#ibcon#enter sib2, iclass 33, count 2 2006.229.09:59:50.99#ibcon#flushed, iclass 33, count 2 2006.229.09:59:50.99#ibcon#about to write, iclass 33, count 2 2006.229.09:59:50.99#ibcon#wrote, iclass 33, count 2 2006.229.09:59:50.99#ibcon#about to read 3, iclass 33, count 2 2006.229.09:59:51.01#ibcon#read 3, iclass 33, count 2 2006.229.09:59:51.01#ibcon#about to read 4, iclass 33, count 2 2006.229.09:59:51.01#ibcon#read 4, iclass 33, count 2 2006.229.09:59:51.01#ibcon#about to read 5, iclass 33, count 2 2006.229.09:59:51.01#ibcon#read 5, iclass 33, count 2 2006.229.09:59:51.01#ibcon#about to read 6, iclass 33, count 2 2006.229.09:59:51.01#ibcon#read 6, iclass 33, count 2 2006.229.09:59:51.01#ibcon#end of sib2, iclass 33, count 2 2006.229.09:59:51.01#ibcon#*mode == 0, iclass 33, count 2 2006.229.09:59:51.01#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.09:59:51.01#ibcon#[27=AT04-04\r\n] 2006.229.09:59:51.01#ibcon#*before write, iclass 33, count 2 2006.229.09:59:51.01#ibcon#enter sib2, iclass 33, count 2 2006.229.09:59:51.01#ibcon#flushed, iclass 33, count 2 2006.229.09:59:51.01#ibcon#about to write, iclass 33, count 2 2006.229.09:59:51.01#ibcon#wrote, iclass 33, count 2 2006.229.09:59:51.01#ibcon#about to read 3, iclass 33, count 2 2006.229.09:59:51.04#ibcon#read 3, iclass 33, count 2 2006.229.09:59:51.04#ibcon#about to read 4, iclass 33, count 2 2006.229.09:59:51.04#ibcon#read 4, iclass 33, count 2 2006.229.09:59:51.04#ibcon#about to read 5, iclass 33, count 2 2006.229.09:59:51.04#ibcon#read 5, iclass 33, count 2 2006.229.09:59:51.04#ibcon#about to read 6, iclass 33, count 2 2006.229.09:59:51.04#ibcon#read 6, iclass 33, count 2 2006.229.09:59:51.04#ibcon#end of sib2, iclass 33, count 2 2006.229.09:59:51.04#ibcon#*after write, iclass 33, count 2 2006.229.09:59:51.04#ibcon#*before return 0, iclass 33, count 2 2006.229.09:59:51.04#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:51.04#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.09:59:51.04#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.09:59:51.04#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:51.04#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:51.16#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:51.16#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:51.16#ibcon#enter wrdev, iclass 33, count 0 2006.229.09:59:51.16#ibcon#first serial, iclass 33, count 0 2006.229.09:59:51.16#ibcon#enter sib2, iclass 33, count 0 2006.229.09:59:51.16#ibcon#flushed, iclass 33, count 0 2006.229.09:59:51.16#ibcon#about to write, iclass 33, count 0 2006.229.09:59:51.16#ibcon#wrote, iclass 33, count 0 2006.229.09:59:51.16#ibcon#about to read 3, iclass 33, count 0 2006.229.09:59:51.18#ibcon#read 3, iclass 33, count 0 2006.229.09:59:51.18#ibcon#about to read 4, iclass 33, count 0 2006.229.09:59:51.18#ibcon#read 4, iclass 33, count 0 2006.229.09:59:51.18#ibcon#about to read 5, iclass 33, count 0 2006.229.09:59:51.18#ibcon#read 5, iclass 33, count 0 2006.229.09:59:51.18#ibcon#about to read 6, iclass 33, count 0 2006.229.09:59:51.18#ibcon#read 6, iclass 33, count 0 2006.229.09:59:51.18#ibcon#end of sib2, iclass 33, count 0 2006.229.09:59:51.18#ibcon#*mode == 0, iclass 33, count 0 2006.229.09:59:51.18#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.09:59:51.18#ibcon#[27=USB\r\n] 2006.229.09:59:51.18#ibcon#*before write, iclass 33, count 0 2006.229.09:59:51.18#ibcon#enter sib2, iclass 33, count 0 2006.229.09:59:51.18#ibcon#flushed, iclass 33, count 0 2006.229.09:59:51.18#ibcon#about to write, iclass 33, count 0 2006.229.09:59:51.18#ibcon#wrote, iclass 33, count 0 2006.229.09:59:51.18#ibcon#about to read 3, iclass 33, count 0 2006.229.09:59:51.21#ibcon#read 3, iclass 33, count 0 2006.229.09:59:51.21#ibcon#about to read 4, iclass 33, count 0 2006.229.09:59:51.21#ibcon#read 4, iclass 33, count 0 2006.229.09:59:51.21#ibcon#about to read 5, iclass 33, count 0 2006.229.09:59:51.21#ibcon#read 5, iclass 33, count 0 2006.229.09:59:51.21#ibcon#about to read 6, iclass 33, count 0 2006.229.09:59:51.21#ibcon#read 6, iclass 33, count 0 2006.229.09:59:51.21#ibcon#end of sib2, iclass 33, count 0 2006.229.09:59:51.21#ibcon#*after write, iclass 33, count 0 2006.229.09:59:51.21#ibcon#*before return 0, iclass 33, count 0 2006.229.09:59:51.21#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:51.21#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.09:59:51.21#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.09:59:51.21#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.09:59:51.21$vck44/vblo=5,709.99 2006.229.09:59:51.21#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.09:59:51.21#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.09:59:51.21#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:51.21#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:51.21#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:51.21#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:51.21#ibcon#enter wrdev, iclass 35, count 0 2006.229.09:59:51.21#ibcon#first serial, iclass 35, count 0 2006.229.09:59:51.21#ibcon#enter sib2, iclass 35, count 0 2006.229.09:59:51.21#ibcon#flushed, iclass 35, count 0 2006.229.09:59:51.21#ibcon#about to write, iclass 35, count 0 2006.229.09:59:51.21#ibcon#wrote, iclass 35, count 0 2006.229.09:59:51.21#ibcon#about to read 3, iclass 35, count 0 2006.229.09:59:51.23#ibcon#read 3, iclass 35, count 0 2006.229.09:59:51.23#ibcon#about to read 4, iclass 35, count 0 2006.229.09:59:51.23#ibcon#read 4, iclass 35, count 0 2006.229.09:59:51.23#ibcon#about to read 5, iclass 35, count 0 2006.229.09:59:51.23#ibcon#read 5, iclass 35, count 0 2006.229.09:59:51.23#ibcon#about to read 6, iclass 35, count 0 2006.229.09:59:51.23#ibcon#read 6, iclass 35, count 0 2006.229.09:59:51.23#ibcon#end of sib2, iclass 35, count 0 2006.229.09:59:51.23#ibcon#*mode == 0, iclass 35, count 0 2006.229.09:59:51.23#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.09:59:51.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.09:59:51.23#ibcon#*before write, iclass 35, count 0 2006.229.09:59:51.23#ibcon#enter sib2, iclass 35, count 0 2006.229.09:59:51.23#ibcon#flushed, iclass 35, count 0 2006.229.09:59:51.23#ibcon#about to write, iclass 35, count 0 2006.229.09:59:51.23#ibcon#wrote, iclass 35, count 0 2006.229.09:59:51.23#ibcon#about to read 3, iclass 35, count 0 2006.229.09:59:51.27#ibcon#read 3, iclass 35, count 0 2006.229.09:59:51.27#ibcon#about to read 4, iclass 35, count 0 2006.229.09:59:51.27#ibcon#read 4, iclass 35, count 0 2006.229.09:59:51.27#ibcon#about to read 5, iclass 35, count 0 2006.229.09:59:51.27#ibcon#read 5, iclass 35, count 0 2006.229.09:59:51.27#ibcon#about to read 6, iclass 35, count 0 2006.229.09:59:51.27#ibcon#read 6, iclass 35, count 0 2006.229.09:59:51.27#ibcon#end of sib2, iclass 35, count 0 2006.229.09:59:51.27#ibcon#*after write, iclass 35, count 0 2006.229.09:59:51.27#ibcon#*before return 0, iclass 35, count 0 2006.229.09:59:51.27#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:51.27#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.09:59:51.27#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.09:59:51.27#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.09:59:51.27$vck44/vb=5,4 2006.229.09:59:51.27#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.09:59:51.27#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.09:59:51.27#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:51.27#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:51.33#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:51.33#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:51.33#ibcon#enter wrdev, iclass 37, count 2 2006.229.09:59:51.33#ibcon#first serial, iclass 37, count 2 2006.229.09:59:51.33#ibcon#enter sib2, iclass 37, count 2 2006.229.09:59:51.33#ibcon#flushed, iclass 37, count 2 2006.229.09:59:51.33#ibcon#about to write, iclass 37, count 2 2006.229.09:59:51.33#ibcon#wrote, iclass 37, count 2 2006.229.09:59:51.33#ibcon#about to read 3, iclass 37, count 2 2006.229.09:59:51.35#ibcon#read 3, iclass 37, count 2 2006.229.09:59:51.35#ibcon#about to read 4, iclass 37, count 2 2006.229.09:59:51.35#ibcon#read 4, iclass 37, count 2 2006.229.09:59:51.35#ibcon#about to read 5, iclass 37, count 2 2006.229.09:59:51.35#ibcon#read 5, iclass 37, count 2 2006.229.09:59:51.35#ibcon#about to read 6, iclass 37, count 2 2006.229.09:59:51.35#ibcon#read 6, iclass 37, count 2 2006.229.09:59:51.35#ibcon#end of sib2, iclass 37, count 2 2006.229.09:59:51.35#ibcon#*mode == 0, iclass 37, count 2 2006.229.09:59:51.35#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.09:59:51.35#ibcon#[27=AT05-04\r\n] 2006.229.09:59:51.35#ibcon#*before write, iclass 37, count 2 2006.229.09:59:51.35#ibcon#enter sib2, iclass 37, count 2 2006.229.09:59:51.35#ibcon#flushed, iclass 37, count 2 2006.229.09:59:51.35#ibcon#about to write, iclass 37, count 2 2006.229.09:59:51.35#ibcon#wrote, iclass 37, count 2 2006.229.09:59:51.35#ibcon#about to read 3, iclass 37, count 2 2006.229.09:59:51.38#ibcon#read 3, iclass 37, count 2 2006.229.09:59:51.38#ibcon#about to read 4, iclass 37, count 2 2006.229.09:59:51.38#ibcon#read 4, iclass 37, count 2 2006.229.09:59:51.38#ibcon#about to read 5, iclass 37, count 2 2006.229.09:59:51.38#ibcon#read 5, iclass 37, count 2 2006.229.09:59:51.38#ibcon#about to read 6, iclass 37, count 2 2006.229.09:59:51.38#ibcon#read 6, iclass 37, count 2 2006.229.09:59:51.38#ibcon#end of sib2, iclass 37, count 2 2006.229.09:59:51.38#ibcon#*after write, iclass 37, count 2 2006.229.09:59:51.38#ibcon#*before return 0, iclass 37, count 2 2006.229.09:59:51.38#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:51.38#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.09:59:51.38#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.09:59:51.38#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:51.38#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:51.50#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:51.50#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:51.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.09:59:51.50#ibcon#first serial, iclass 37, count 0 2006.229.09:59:51.50#ibcon#enter sib2, iclass 37, count 0 2006.229.09:59:51.50#ibcon#flushed, iclass 37, count 0 2006.229.09:59:51.50#ibcon#about to write, iclass 37, count 0 2006.229.09:59:51.50#ibcon#wrote, iclass 37, count 0 2006.229.09:59:51.50#ibcon#about to read 3, iclass 37, count 0 2006.229.09:59:51.52#ibcon#read 3, iclass 37, count 0 2006.229.09:59:51.52#ibcon#about to read 4, iclass 37, count 0 2006.229.09:59:51.52#ibcon#read 4, iclass 37, count 0 2006.229.09:59:51.52#ibcon#about to read 5, iclass 37, count 0 2006.229.09:59:51.52#ibcon#read 5, iclass 37, count 0 2006.229.09:59:51.52#ibcon#about to read 6, iclass 37, count 0 2006.229.09:59:51.52#ibcon#read 6, iclass 37, count 0 2006.229.09:59:51.52#ibcon#end of sib2, iclass 37, count 0 2006.229.09:59:51.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.09:59:51.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.09:59:51.52#ibcon#[27=USB\r\n] 2006.229.09:59:51.52#ibcon#*before write, iclass 37, count 0 2006.229.09:59:51.52#ibcon#enter sib2, iclass 37, count 0 2006.229.09:59:51.52#ibcon#flushed, iclass 37, count 0 2006.229.09:59:51.52#ibcon#about to write, iclass 37, count 0 2006.229.09:59:51.52#ibcon#wrote, iclass 37, count 0 2006.229.09:59:51.52#ibcon#about to read 3, iclass 37, count 0 2006.229.09:59:51.55#ibcon#read 3, iclass 37, count 0 2006.229.09:59:51.55#ibcon#about to read 4, iclass 37, count 0 2006.229.09:59:51.55#ibcon#read 4, iclass 37, count 0 2006.229.09:59:51.55#ibcon#about to read 5, iclass 37, count 0 2006.229.09:59:51.55#ibcon#read 5, iclass 37, count 0 2006.229.09:59:51.55#ibcon#about to read 6, iclass 37, count 0 2006.229.09:59:51.55#ibcon#read 6, iclass 37, count 0 2006.229.09:59:51.55#ibcon#end of sib2, iclass 37, count 0 2006.229.09:59:51.55#ibcon#*after write, iclass 37, count 0 2006.229.09:59:51.55#ibcon#*before return 0, iclass 37, count 0 2006.229.09:59:51.55#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:51.55#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.09:59:51.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.09:59:51.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.09:59:51.55$vck44/vblo=6,719.99 2006.229.09:59:51.55#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.09:59:51.55#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.09:59:51.55#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:51.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:51.55#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:51.55#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:51.55#ibcon#enter wrdev, iclass 39, count 0 2006.229.09:59:51.55#ibcon#first serial, iclass 39, count 0 2006.229.09:59:51.55#ibcon#enter sib2, iclass 39, count 0 2006.229.09:59:51.55#ibcon#flushed, iclass 39, count 0 2006.229.09:59:51.55#ibcon#about to write, iclass 39, count 0 2006.229.09:59:51.55#ibcon#wrote, iclass 39, count 0 2006.229.09:59:51.55#ibcon#about to read 3, iclass 39, count 0 2006.229.09:59:51.57#ibcon#read 3, iclass 39, count 0 2006.229.09:59:51.57#ibcon#about to read 4, iclass 39, count 0 2006.229.09:59:51.57#ibcon#read 4, iclass 39, count 0 2006.229.09:59:51.57#ibcon#about to read 5, iclass 39, count 0 2006.229.09:59:51.57#ibcon#read 5, iclass 39, count 0 2006.229.09:59:51.57#ibcon#about to read 6, iclass 39, count 0 2006.229.09:59:51.57#ibcon#read 6, iclass 39, count 0 2006.229.09:59:51.57#ibcon#end of sib2, iclass 39, count 0 2006.229.09:59:51.57#ibcon#*mode == 0, iclass 39, count 0 2006.229.09:59:51.57#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.09:59:51.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.09:59:51.57#ibcon#*before write, iclass 39, count 0 2006.229.09:59:51.57#ibcon#enter sib2, iclass 39, count 0 2006.229.09:59:51.57#ibcon#flushed, iclass 39, count 0 2006.229.09:59:51.57#ibcon#about to write, iclass 39, count 0 2006.229.09:59:51.57#ibcon#wrote, iclass 39, count 0 2006.229.09:59:51.57#ibcon#about to read 3, iclass 39, count 0 2006.229.09:59:51.61#ibcon#read 3, iclass 39, count 0 2006.229.09:59:51.61#ibcon#about to read 4, iclass 39, count 0 2006.229.09:59:51.61#ibcon#read 4, iclass 39, count 0 2006.229.09:59:51.61#ibcon#about to read 5, iclass 39, count 0 2006.229.09:59:51.61#ibcon#read 5, iclass 39, count 0 2006.229.09:59:51.61#ibcon#about to read 6, iclass 39, count 0 2006.229.09:59:51.61#ibcon#read 6, iclass 39, count 0 2006.229.09:59:51.61#ibcon#end of sib2, iclass 39, count 0 2006.229.09:59:51.61#ibcon#*after write, iclass 39, count 0 2006.229.09:59:51.61#ibcon#*before return 0, iclass 39, count 0 2006.229.09:59:51.61#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:51.61#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.09:59:51.61#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.09:59:51.61#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.09:59:51.61$vck44/vb=6,4 2006.229.09:59:51.61#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.09:59:51.61#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.09:59:51.61#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:51.61#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:51.67#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:51.67#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:51.67#ibcon#enter wrdev, iclass 3, count 2 2006.229.09:59:51.67#ibcon#first serial, iclass 3, count 2 2006.229.09:59:51.67#ibcon#enter sib2, iclass 3, count 2 2006.229.09:59:51.67#ibcon#flushed, iclass 3, count 2 2006.229.09:59:51.67#ibcon#about to write, iclass 3, count 2 2006.229.09:59:51.67#ibcon#wrote, iclass 3, count 2 2006.229.09:59:51.67#ibcon#about to read 3, iclass 3, count 2 2006.229.09:59:51.69#ibcon#read 3, iclass 3, count 2 2006.229.09:59:51.69#ibcon#about to read 4, iclass 3, count 2 2006.229.09:59:51.69#ibcon#read 4, iclass 3, count 2 2006.229.09:59:51.69#ibcon#about to read 5, iclass 3, count 2 2006.229.09:59:51.69#ibcon#read 5, iclass 3, count 2 2006.229.09:59:51.69#ibcon#about to read 6, iclass 3, count 2 2006.229.09:59:51.69#ibcon#read 6, iclass 3, count 2 2006.229.09:59:51.69#ibcon#end of sib2, iclass 3, count 2 2006.229.09:59:51.69#ibcon#*mode == 0, iclass 3, count 2 2006.229.09:59:51.69#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.09:59:51.69#ibcon#[27=AT06-04\r\n] 2006.229.09:59:51.69#ibcon#*before write, iclass 3, count 2 2006.229.09:59:51.69#ibcon#enter sib2, iclass 3, count 2 2006.229.09:59:51.69#ibcon#flushed, iclass 3, count 2 2006.229.09:59:51.69#ibcon#about to write, iclass 3, count 2 2006.229.09:59:51.69#ibcon#wrote, iclass 3, count 2 2006.229.09:59:51.69#ibcon#about to read 3, iclass 3, count 2 2006.229.09:59:51.72#ibcon#read 3, iclass 3, count 2 2006.229.09:59:51.72#ibcon#about to read 4, iclass 3, count 2 2006.229.09:59:51.72#ibcon#read 4, iclass 3, count 2 2006.229.09:59:51.72#ibcon#about to read 5, iclass 3, count 2 2006.229.09:59:51.72#ibcon#read 5, iclass 3, count 2 2006.229.09:59:51.72#ibcon#about to read 6, iclass 3, count 2 2006.229.09:59:51.72#ibcon#read 6, iclass 3, count 2 2006.229.09:59:51.72#ibcon#end of sib2, iclass 3, count 2 2006.229.09:59:51.72#ibcon#*after write, iclass 3, count 2 2006.229.09:59:51.72#ibcon#*before return 0, iclass 3, count 2 2006.229.09:59:51.72#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:51.72#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.09:59:51.72#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.09:59:51.72#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:51.72#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:51.84#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:51.84#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:51.84#ibcon#enter wrdev, iclass 3, count 0 2006.229.09:59:51.84#ibcon#first serial, iclass 3, count 0 2006.229.09:59:51.84#ibcon#enter sib2, iclass 3, count 0 2006.229.09:59:51.84#ibcon#flushed, iclass 3, count 0 2006.229.09:59:51.84#ibcon#about to write, iclass 3, count 0 2006.229.09:59:51.84#ibcon#wrote, iclass 3, count 0 2006.229.09:59:51.84#ibcon#about to read 3, iclass 3, count 0 2006.229.09:59:51.86#ibcon#read 3, iclass 3, count 0 2006.229.09:59:51.86#ibcon#about to read 4, iclass 3, count 0 2006.229.09:59:51.86#ibcon#read 4, iclass 3, count 0 2006.229.09:59:51.86#ibcon#about to read 5, iclass 3, count 0 2006.229.09:59:51.86#ibcon#read 5, iclass 3, count 0 2006.229.09:59:51.86#ibcon#about to read 6, iclass 3, count 0 2006.229.09:59:51.86#ibcon#read 6, iclass 3, count 0 2006.229.09:59:51.86#ibcon#end of sib2, iclass 3, count 0 2006.229.09:59:51.86#ibcon#*mode == 0, iclass 3, count 0 2006.229.09:59:51.86#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.09:59:51.86#ibcon#[27=USB\r\n] 2006.229.09:59:51.86#ibcon#*before write, iclass 3, count 0 2006.229.09:59:51.86#ibcon#enter sib2, iclass 3, count 0 2006.229.09:59:51.86#ibcon#flushed, iclass 3, count 0 2006.229.09:59:51.86#ibcon#about to write, iclass 3, count 0 2006.229.09:59:51.86#ibcon#wrote, iclass 3, count 0 2006.229.09:59:51.86#ibcon#about to read 3, iclass 3, count 0 2006.229.09:59:51.89#ibcon#read 3, iclass 3, count 0 2006.229.09:59:51.89#ibcon#about to read 4, iclass 3, count 0 2006.229.09:59:51.89#ibcon#read 4, iclass 3, count 0 2006.229.09:59:51.89#ibcon#about to read 5, iclass 3, count 0 2006.229.09:59:51.89#ibcon#read 5, iclass 3, count 0 2006.229.09:59:51.89#ibcon#about to read 6, iclass 3, count 0 2006.229.09:59:51.89#ibcon#read 6, iclass 3, count 0 2006.229.09:59:51.89#ibcon#end of sib2, iclass 3, count 0 2006.229.09:59:51.89#ibcon#*after write, iclass 3, count 0 2006.229.09:59:51.89#ibcon#*before return 0, iclass 3, count 0 2006.229.09:59:51.89#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:51.89#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.09:59:51.89#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.09:59:51.89#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.09:59:51.89$vck44/vblo=7,734.99 2006.229.09:59:51.89#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.09:59:51.89#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.09:59:51.89#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:51.89#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:51.89#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:51.89#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:51.89#ibcon#enter wrdev, iclass 5, count 0 2006.229.09:59:51.89#ibcon#first serial, iclass 5, count 0 2006.229.09:59:51.89#ibcon#enter sib2, iclass 5, count 0 2006.229.09:59:51.89#ibcon#flushed, iclass 5, count 0 2006.229.09:59:51.89#ibcon#about to write, iclass 5, count 0 2006.229.09:59:51.89#ibcon#wrote, iclass 5, count 0 2006.229.09:59:51.89#ibcon#about to read 3, iclass 5, count 0 2006.229.09:59:51.91#ibcon#read 3, iclass 5, count 0 2006.229.09:59:51.91#ibcon#about to read 4, iclass 5, count 0 2006.229.09:59:51.91#ibcon#read 4, iclass 5, count 0 2006.229.09:59:51.91#ibcon#about to read 5, iclass 5, count 0 2006.229.09:59:51.91#ibcon#read 5, iclass 5, count 0 2006.229.09:59:51.91#ibcon#about to read 6, iclass 5, count 0 2006.229.09:59:51.91#ibcon#read 6, iclass 5, count 0 2006.229.09:59:51.91#ibcon#end of sib2, iclass 5, count 0 2006.229.09:59:51.91#ibcon#*mode == 0, iclass 5, count 0 2006.229.09:59:51.91#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.09:59:51.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.09:59:51.91#ibcon#*before write, iclass 5, count 0 2006.229.09:59:51.91#ibcon#enter sib2, iclass 5, count 0 2006.229.09:59:51.91#ibcon#flushed, iclass 5, count 0 2006.229.09:59:51.91#ibcon#about to write, iclass 5, count 0 2006.229.09:59:51.91#ibcon#wrote, iclass 5, count 0 2006.229.09:59:51.91#ibcon#about to read 3, iclass 5, count 0 2006.229.09:59:51.95#ibcon#read 3, iclass 5, count 0 2006.229.09:59:51.95#ibcon#about to read 4, iclass 5, count 0 2006.229.09:59:51.95#ibcon#read 4, iclass 5, count 0 2006.229.09:59:51.95#ibcon#about to read 5, iclass 5, count 0 2006.229.09:59:51.95#ibcon#read 5, iclass 5, count 0 2006.229.09:59:51.95#ibcon#about to read 6, iclass 5, count 0 2006.229.09:59:51.95#ibcon#read 6, iclass 5, count 0 2006.229.09:59:51.95#ibcon#end of sib2, iclass 5, count 0 2006.229.09:59:51.95#ibcon#*after write, iclass 5, count 0 2006.229.09:59:51.95#ibcon#*before return 0, iclass 5, count 0 2006.229.09:59:51.95#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:51.95#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.09:59:51.95#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.09:59:51.95#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.09:59:51.95$vck44/vb=7,4 2006.229.09:59:51.95#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.09:59:51.95#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.09:59:51.95#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:51.95#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:52.01#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:52.01#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:52.01#ibcon#enter wrdev, iclass 7, count 2 2006.229.09:59:52.01#ibcon#first serial, iclass 7, count 2 2006.229.09:59:52.01#ibcon#enter sib2, iclass 7, count 2 2006.229.09:59:52.01#ibcon#flushed, iclass 7, count 2 2006.229.09:59:52.01#ibcon#about to write, iclass 7, count 2 2006.229.09:59:52.01#ibcon#wrote, iclass 7, count 2 2006.229.09:59:52.01#ibcon#about to read 3, iclass 7, count 2 2006.229.09:59:52.03#ibcon#read 3, iclass 7, count 2 2006.229.09:59:52.03#ibcon#about to read 4, iclass 7, count 2 2006.229.09:59:52.03#ibcon#read 4, iclass 7, count 2 2006.229.09:59:52.03#ibcon#about to read 5, iclass 7, count 2 2006.229.09:59:52.03#ibcon#read 5, iclass 7, count 2 2006.229.09:59:52.03#ibcon#about to read 6, iclass 7, count 2 2006.229.09:59:52.03#ibcon#read 6, iclass 7, count 2 2006.229.09:59:52.03#ibcon#end of sib2, iclass 7, count 2 2006.229.09:59:52.03#ibcon#*mode == 0, iclass 7, count 2 2006.229.09:59:52.03#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.09:59:52.03#ibcon#[27=AT07-04\r\n] 2006.229.09:59:52.03#ibcon#*before write, iclass 7, count 2 2006.229.09:59:52.03#ibcon#enter sib2, iclass 7, count 2 2006.229.09:59:52.03#ibcon#flushed, iclass 7, count 2 2006.229.09:59:52.03#ibcon#about to write, iclass 7, count 2 2006.229.09:59:52.03#ibcon#wrote, iclass 7, count 2 2006.229.09:59:52.03#ibcon#about to read 3, iclass 7, count 2 2006.229.09:59:52.06#ibcon#read 3, iclass 7, count 2 2006.229.09:59:52.06#ibcon#about to read 4, iclass 7, count 2 2006.229.09:59:52.06#ibcon#read 4, iclass 7, count 2 2006.229.09:59:52.06#ibcon#about to read 5, iclass 7, count 2 2006.229.09:59:52.06#ibcon#read 5, iclass 7, count 2 2006.229.09:59:52.06#ibcon#about to read 6, iclass 7, count 2 2006.229.09:59:52.06#ibcon#read 6, iclass 7, count 2 2006.229.09:59:52.06#ibcon#end of sib2, iclass 7, count 2 2006.229.09:59:52.06#ibcon#*after write, iclass 7, count 2 2006.229.09:59:52.06#ibcon#*before return 0, iclass 7, count 2 2006.229.09:59:52.06#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:52.06#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.09:59:52.06#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.09:59:52.06#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:52.06#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:52.18#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:52.18#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:52.18#ibcon#enter wrdev, iclass 7, count 0 2006.229.09:59:52.18#ibcon#first serial, iclass 7, count 0 2006.229.09:59:52.18#ibcon#enter sib2, iclass 7, count 0 2006.229.09:59:52.18#ibcon#flushed, iclass 7, count 0 2006.229.09:59:52.18#ibcon#about to write, iclass 7, count 0 2006.229.09:59:52.18#ibcon#wrote, iclass 7, count 0 2006.229.09:59:52.18#ibcon#about to read 3, iclass 7, count 0 2006.229.09:59:52.20#ibcon#read 3, iclass 7, count 0 2006.229.09:59:52.20#ibcon#about to read 4, iclass 7, count 0 2006.229.09:59:52.20#ibcon#read 4, iclass 7, count 0 2006.229.09:59:52.20#ibcon#about to read 5, iclass 7, count 0 2006.229.09:59:52.20#ibcon#read 5, iclass 7, count 0 2006.229.09:59:52.20#ibcon#about to read 6, iclass 7, count 0 2006.229.09:59:52.20#ibcon#read 6, iclass 7, count 0 2006.229.09:59:52.20#ibcon#end of sib2, iclass 7, count 0 2006.229.09:59:52.20#ibcon#*mode == 0, iclass 7, count 0 2006.229.09:59:52.20#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.09:59:52.20#ibcon#[27=USB\r\n] 2006.229.09:59:52.20#ibcon#*before write, iclass 7, count 0 2006.229.09:59:52.20#ibcon#enter sib2, iclass 7, count 0 2006.229.09:59:52.20#ibcon#flushed, iclass 7, count 0 2006.229.09:59:52.20#ibcon#about to write, iclass 7, count 0 2006.229.09:59:52.20#ibcon#wrote, iclass 7, count 0 2006.229.09:59:52.20#ibcon#about to read 3, iclass 7, count 0 2006.229.09:59:52.23#ibcon#read 3, iclass 7, count 0 2006.229.09:59:52.23#ibcon#about to read 4, iclass 7, count 0 2006.229.09:59:52.23#ibcon#read 4, iclass 7, count 0 2006.229.09:59:52.23#ibcon#about to read 5, iclass 7, count 0 2006.229.09:59:52.23#ibcon#read 5, iclass 7, count 0 2006.229.09:59:52.23#ibcon#about to read 6, iclass 7, count 0 2006.229.09:59:52.23#ibcon#read 6, iclass 7, count 0 2006.229.09:59:52.23#ibcon#end of sib2, iclass 7, count 0 2006.229.09:59:52.23#ibcon#*after write, iclass 7, count 0 2006.229.09:59:52.23#ibcon#*before return 0, iclass 7, count 0 2006.229.09:59:52.23#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:52.23#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.09:59:52.23#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.09:59:52.23#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.09:59:52.23$vck44/vblo=8,744.99 2006.229.09:59:52.23#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.09:59:52.23#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.09:59:52.23#ibcon#ireg 17 cls_cnt 0 2006.229.09:59:52.23#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:52.23#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:52.23#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:52.23#ibcon#enter wrdev, iclass 11, count 0 2006.229.09:59:52.23#ibcon#first serial, iclass 11, count 0 2006.229.09:59:52.23#ibcon#enter sib2, iclass 11, count 0 2006.229.09:59:52.23#ibcon#flushed, iclass 11, count 0 2006.229.09:59:52.23#ibcon#about to write, iclass 11, count 0 2006.229.09:59:52.23#ibcon#wrote, iclass 11, count 0 2006.229.09:59:52.23#ibcon#about to read 3, iclass 11, count 0 2006.229.09:59:52.25#ibcon#read 3, iclass 11, count 0 2006.229.09:59:52.25#ibcon#about to read 4, iclass 11, count 0 2006.229.09:59:52.25#ibcon#read 4, iclass 11, count 0 2006.229.09:59:52.25#ibcon#about to read 5, iclass 11, count 0 2006.229.09:59:52.25#ibcon#read 5, iclass 11, count 0 2006.229.09:59:52.25#ibcon#about to read 6, iclass 11, count 0 2006.229.09:59:52.25#ibcon#read 6, iclass 11, count 0 2006.229.09:59:52.25#ibcon#end of sib2, iclass 11, count 0 2006.229.09:59:52.25#ibcon#*mode == 0, iclass 11, count 0 2006.229.09:59:52.25#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.09:59:52.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.09:59:52.25#ibcon#*before write, iclass 11, count 0 2006.229.09:59:52.25#ibcon#enter sib2, iclass 11, count 0 2006.229.09:59:52.25#ibcon#flushed, iclass 11, count 0 2006.229.09:59:52.25#ibcon#about to write, iclass 11, count 0 2006.229.09:59:52.25#ibcon#wrote, iclass 11, count 0 2006.229.09:59:52.25#ibcon#about to read 3, iclass 11, count 0 2006.229.09:59:52.29#ibcon#read 3, iclass 11, count 0 2006.229.09:59:52.29#ibcon#about to read 4, iclass 11, count 0 2006.229.09:59:52.29#ibcon#read 4, iclass 11, count 0 2006.229.09:59:52.29#ibcon#about to read 5, iclass 11, count 0 2006.229.09:59:52.29#ibcon#read 5, iclass 11, count 0 2006.229.09:59:52.29#ibcon#about to read 6, iclass 11, count 0 2006.229.09:59:52.29#ibcon#read 6, iclass 11, count 0 2006.229.09:59:52.29#ibcon#end of sib2, iclass 11, count 0 2006.229.09:59:52.29#ibcon#*after write, iclass 11, count 0 2006.229.09:59:52.29#ibcon#*before return 0, iclass 11, count 0 2006.229.09:59:52.29#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:52.29#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.09:59:52.29#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.09:59:52.29#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.09:59:52.29$vck44/vb=8,4 2006.229.09:59:52.29#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.09:59:52.29#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.09:59:52.29#ibcon#ireg 11 cls_cnt 2 2006.229.09:59:52.29#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:59:52.30#abcon#<5=/05 1.9 3.3 28.74 971001.1\r\n> 2006.229.09:59:52.32#abcon#{5=INTERFACE CLEAR} 2006.229.09:59:52.35#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:59:52.35#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:59:52.35#ibcon#enter wrdev, iclass 14, count 2 2006.229.09:59:52.35#ibcon#first serial, iclass 14, count 2 2006.229.09:59:52.35#ibcon#enter sib2, iclass 14, count 2 2006.229.09:59:52.35#ibcon#flushed, iclass 14, count 2 2006.229.09:59:52.35#ibcon#about to write, iclass 14, count 2 2006.229.09:59:52.35#ibcon#wrote, iclass 14, count 2 2006.229.09:59:52.35#ibcon#about to read 3, iclass 14, count 2 2006.229.09:59:52.37#ibcon#read 3, iclass 14, count 2 2006.229.09:59:52.37#ibcon#about to read 4, iclass 14, count 2 2006.229.09:59:52.37#ibcon#read 4, iclass 14, count 2 2006.229.09:59:52.37#ibcon#about to read 5, iclass 14, count 2 2006.229.09:59:52.37#ibcon#read 5, iclass 14, count 2 2006.229.09:59:52.37#ibcon#about to read 6, iclass 14, count 2 2006.229.09:59:52.37#ibcon#read 6, iclass 14, count 2 2006.229.09:59:52.37#ibcon#end of sib2, iclass 14, count 2 2006.229.09:59:52.37#ibcon#*mode == 0, iclass 14, count 2 2006.229.09:59:52.37#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.09:59:52.37#ibcon#[27=AT08-04\r\n] 2006.229.09:59:52.37#ibcon#*before write, iclass 14, count 2 2006.229.09:59:52.37#ibcon#enter sib2, iclass 14, count 2 2006.229.09:59:52.37#ibcon#flushed, iclass 14, count 2 2006.229.09:59:52.37#ibcon#about to write, iclass 14, count 2 2006.229.09:59:52.37#ibcon#wrote, iclass 14, count 2 2006.229.09:59:52.37#ibcon#about to read 3, iclass 14, count 2 2006.229.09:59:52.38#abcon#[5=S1D000X0/0*\r\n] 2006.229.09:59:52.40#ibcon#read 3, iclass 14, count 2 2006.229.09:59:52.40#ibcon#about to read 4, iclass 14, count 2 2006.229.09:59:52.40#ibcon#read 4, iclass 14, count 2 2006.229.09:59:52.40#ibcon#about to read 5, iclass 14, count 2 2006.229.09:59:52.40#ibcon#read 5, iclass 14, count 2 2006.229.09:59:52.40#ibcon#about to read 6, iclass 14, count 2 2006.229.09:59:52.40#ibcon#read 6, iclass 14, count 2 2006.229.09:59:52.40#ibcon#end of sib2, iclass 14, count 2 2006.229.09:59:52.40#ibcon#*after write, iclass 14, count 2 2006.229.09:59:52.40#ibcon#*before return 0, iclass 14, count 2 2006.229.09:59:52.40#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:59:52.40#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.09:59:52.40#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.09:59:52.40#ibcon#ireg 7 cls_cnt 0 2006.229.09:59:52.40#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:59:52.52#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:59:52.52#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:59:52.52#ibcon#enter wrdev, iclass 14, count 0 2006.229.09:59:52.52#ibcon#first serial, iclass 14, count 0 2006.229.09:59:52.52#ibcon#enter sib2, iclass 14, count 0 2006.229.09:59:52.52#ibcon#flushed, iclass 14, count 0 2006.229.09:59:52.52#ibcon#about to write, iclass 14, count 0 2006.229.09:59:52.52#ibcon#wrote, iclass 14, count 0 2006.229.09:59:52.52#ibcon#about to read 3, iclass 14, count 0 2006.229.09:59:52.54#ibcon#read 3, iclass 14, count 0 2006.229.09:59:52.54#ibcon#about to read 4, iclass 14, count 0 2006.229.09:59:52.54#ibcon#read 4, iclass 14, count 0 2006.229.09:59:52.54#ibcon#about to read 5, iclass 14, count 0 2006.229.09:59:52.54#ibcon#read 5, iclass 14, count 0 2006.229.09:59:52.54#ibcon#about to read 6, iclass 14, count 0 2006.229.09:59:52.54#ibcon#read 6, iclass 14, count 0 2006.229.09:59:52.54#ibcon#end of sib2, iclass 14, count 0 2006.229.09:59:52.54#ibcon#*mode == 0, iclass 14, count 0 2006.229.09:59:52.54#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.09:59:52.54#ibcon#[27=USB\r\n] 2006.229.09:59:52.54#ibcon#*before write, iclass 14, count 0 2006.229.09:59:52.54#ibcon#enter sib2, iclass 14, count 0 2006.229.09:59:52.54#ibcon#flushed, iclass 14, count 0 2006.229.09:59:52.54#ibcon#about to write, iclass 14, count 0 2006.229.09:59:52.54#ibcon#wrote, iclass 14, count 0 2006.229.09:59:52.54#ibcon#about to read 3, iclass 14, count 0 2006.229.09:59:52.57#ibcon#read 3, iclass 14, count 0 2006.229.09:59:52.57#ibcon#about to read 4, iclass 14, count 0 2006.229.09:59:52.57#ibcon#read 4, iclass 14, count 0 2006.229.09:59:52.57#ibcon#about to read 5, iclass 14, count 0 2006.229.09:59:52.57#ibcon#read 5, iclass 14, count 0 2006.229.09:59:52.57#ibcon#about to read 6, iclass 14, count 0 2006.229.09:59:52.57#ibcon#read 6, iclass 14, count 0 2006.229.09:59:52.57#ibcon#end of sib2, iclass 14, count 0 2006.229.09:59:52.57#ibcon#*after write, iclass 14, count 0 2006.229.09:59:52.57#ibcon#*before return 0, iclass 14, count 0 2006.229.09:59:52.57#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:59:52.57#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.09:59:52.57#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.09:59:52.57#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.09:59:52.57$vck44/vabw=wide 2006.229.09:59:52.57#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.09:59:52.57#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.09:59:52.57#ibcon#ireg 8 cls_cnt 0 2006.229.09:59:52.57#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:52.57#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:52.57#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:52.57#ibcon#enter wrdev, iclass 19, count 0 2006.229.09:59:52.57#ibcon#first serial, iclass 19, count 0 2006.229.09:59:52.57#ibcon#enter sib2, iclass 19, count 0 2006.229.09:59:52.57#ibcon#flushed, iclass 19, count 0 2006.229.09:59:52.57#ibcon#about to write, iclass 19, count 0 2006.229.09:59:52.57#ibcon#wrote, iclass 19, count 0 2006.229.09:59:52.57#ibcon#about to read 3, iclass 19, count 0 2006.229.09:59:52.59#ibcon#read 3, iclass 19, count 0 2006.229.09:59:52.59#ibcon#about to read 4, iclass 19, count 0 2006.229.09:59:52.59#ibcon#read 4, iclass 19, count 0 2006.229.09:59:52.59#ibcon#about to read 5, iclass 19, count 0 2006.229.09:59:52.59#ibcon#read 5, iclass 19, count 0 2006.229.09:59:52.59#ibcon#about to read 6, iclass 19, count 0 2006.229.09:59:52.59#ibcon#read 6, iclass 19, count 0 2006.229.09:59:52.59#ibcon#end of sib2, iclass 19, count 0 2006.229.09:59:52.59#ibcon#*mode == 0, iclass 19, count 0 2006.229.09:59:52.59#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.09:59:52.59#ibcon#[25=BW32\r\n] 2006.229.09:59:52.59#ibcon#*before write, iclass 19, count 0 2006.229.09:59:52.59#ibcon#enter sib2, iclass 19, count 0 2006.229.09:59:52.59#ibcon#flushed, iclass 19, count 0 2006.229.09:59:52.59#ibcon#about to write, iclass 19, count 0 2006.229.09:59:52.59#ibcon#wrote, iclass 19, count 0 2006.229.09:59:52.59#ibcon#about to read 3, iclass 19, count 0 2006.229.09:59:52.62#ibcon#read 3, iclass 19, count 0 2006.229.09:59:52.62#ibcon#about to read 4, iclass 19, count 0 2006.229.09:59:52.62#ibcon#read 4, iclass 19, count 0 2006.229.09:59:52.62#ibcon#about to read 5, iclass 19, count 0 2006.229.09:59:52.62#ibcon#read 5, iclass 19, count 0 2006.229.09:59:52.62#ibcon#about to read 6, iclass 19, count 0 2006.229.09:59:52.62#ibcon#read 6, iclass 19, count 0 2006.229.09:59:52.62#ibcon#end of sib2, iclass 19, count 0 2006.229.09:59:52.62#ibcon#*after write, iclass 19, count 0 2006.229.09:59:52.62#ibcon#*before return 0, iclass 19, count 0 2006.229.09:59:52.62#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:52.62#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.09:59:52.62#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.09:59:52.62#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.09:59:52.62$vck44/vbbw=wide 2006.229.09:59:52.62#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.09:59:52.62#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.09:59:52.62#ibcon#ireg 8 cls_cnt 0 2006.229.09:59:52.62#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:59:52.69#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:59:52.69#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:59:52.69#ibcon#enter wrdev, iclass 21, count 0 2006.229.09:59:52.69#ibcon#first serial, iclass 21, count 0 2006.229.09:59:52.69#ibcon#enter sib2, iclass 21, count 0 2006.229.09:59:52.69#ibcon#flushed, iclass 21, count 0 2006.229.09:59:52.69#ibcon#about to write, iclass 21, count 0 2006.229.09:59:52.69#ibcon#wrote, iclass 21, count 0 2006.229.09:59:52.69#ibcon#about to read 3, iclass 21, count 0 2006.229.09:59:52.71#ibcon#read 3, iclass 21, count 0 2006.229.09:59:52.71#ibcon#about to read 4, iclass 21, count 0 2006.229.09:59:52.71#ibcon#read 4, iclass 21, count 0 2006.229.09:59:52.71#ibcon#about to read 5, iclass 21, count 0 2006.229.09:59:52.71#ibcon#read 5, iclass 21, count 0 2006.229.09:59:52.71#ibcon#about to read 6, iclass 21, count 0 2006.229.09:59:52.71#ibcon#read 6, iclass 21, count 0 2006.229.09:59:52.71#ibcon#end of sib2, iclass 21, count 0 2006.229.09:59:52.71#ibcon#*mode == 0, iclass 21, count 0 2006.229.09:59:52.71#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.09:59:52.71#ibcon#[27=BW32\r\n] 2006.229.09:59:52.71#ibcon#*before write, iclass 21, count 0 2006.229.09:59:52.71#ibcon#enter sib2, iclass 21, count 0 2006.229.09:59:52.71#ibcon#flushed, iclass 21, count 0 2006.229.09:59:52.71#ibcon#about to write, iclass 21, count 0 2006.229.09:59:52.71#ibcon#wrote, iclass 21, count 0 2006.229.09:59:52.71#ibcon#about to read 3, iclass 21, count 0 2006.229.09:59:52.74#ibcon#read 3, iclass 21, count 0 2006.229.09:59:52.74#ibcon#about to read 4, iclass 21, count 0 2006.229.09:59:52.74#ibcon#read 4, iclass 21, count 0 2006.229.09:59:52.74#ibcon#about to read 5, iclass 21, count 0 2006.229.09:59:52.74#ibcon#read 5, iclass 21, count 0 2006.229.09:59:52.74#ibcon#about to read 6, iclass 21, count 0 2006.229.09:59:52.74#ibcon#read 6, iclass 21, count 0 2006.229.09:59:52.74#ibcon#end of sib2, iclass 21, count 0 2006.229.09:59:52.74#ibcon#*after write, iclass 21, count 0 2006.229.09:59:52.74#ibcon#*before return 0, iclass 21, count 0 2006.229.09:59:52.74#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:59:52.74#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.09:59:52.74#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.09:59:52.74#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.09:59:52.74$setupk4/ifdk4 2006.229.09:59:52.74$ifdk4/lo= 2006.229.09:59:52.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.09:59:52.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.09:59:52.74$ifdk4/patch= 2006.229.09:59:52.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.09:59:52.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.09:59:52.74$setupk4/!*+20s 2006.229.10:00:02.47#abcon#<5=/05 1.9 3.3 28.74 971001.1\r\n> 2006.229.10:00:02.49#abcon#{5=INTERFACE CLEAR} 2006.229.10:00:02.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:00:07.26$setupk4/"tpicd 2006.229.10:00:07.26$setupk4/echo=off 2006.229.10:00:07.26$setupk4/xlog=off 2006.229.10:00:07.26:!2006.229.10:02:23 2006.229.10:00:10.14#trakl#Source acquired 2006.229.10:00:12.14#flagr#flagr/antenna,acquired 2006.229.10:02:23.00:preob 2006.229.10:02:23.14/onsource/TRACKING 2006.229.10:02:23.14:!2006.229.10:02:33 2006.229.10:02:33.00:"tape 2006.229.10:02:33.00:"st=record 2006.229.10:02:33.00:data_valid=on 2006.229.10:02:33.00:midob 2006.229.10:02:33.14/onsource/TRACKING 2006.229.10:02:33.14/wx/28.71,1001.2,98 2006.229.10:02:33.25/cable/+6.4029E-03 2006.229.10:02:34.34/va/01,08,usb,yes,29,31 2006.229.10:02:34.34/va/02,07,usb,yes,31,32 2006.229.10:02:34.34/va/03,06,usb,yes,39,41 2006.229.10:02:34.34/va/04,07,usb,yes,32,34 2006.229.10:02:34.34/va/05,04,usb,yes,29,29 2006.229.10:02:34.34/va/06,04,usb,yes,32,32 2006.229.10:02:34.34/va/07,05,usb,yes,29,29 2006.229.10:02:34.34/va/08,06,usb,yes,21,26 2006.229.10:02:34.57/valo/01,524.99,yes,locked 2006.229.10:02:34.57/valo/02,534.99,yes,locked 2006.229.10:02:34.57/valo/03,564.99,yes,locked 2006.229.10:02:34.57/valo/04,624.99,yes,locked 2006.229.10:02:34.57/valo/05,734.99,yes,locked 2006.229.10:02:34.57/valo/06,814.99,yes,locked 2006.229.10:02:34.57/valo/07,864.99,yes,locked 2006.229.10:02:34.57/valo/08,884.99,yes,locked 2006.229.10:02:35.66/vb/01,04,usb,yes,31,29 2006.229.10:02:35.66/vb/02,04,usb,yes,33,33 2006.229.10:02:35.66/vb/03,04,usb,yes,30,33 2006.229.10:02:35.66/vb/04,04,usb,yes,35,33 2006.229.10:02:35.66/vb/05,04,usb,yes,27,29 2006.229.10:02:35.66/vb/06,04,usb,yes,31,27 2006.229.10:02:35.66/vb/07,04,usb,yes,31,31 2006.229.10:02:35.66/vb/08,04,usb,yes,29,32 2006.229.10:02:35.89/vblo/01,629.99,yes,locked 2006.229.10:02:35.89/vblo/02,634.99,yes,locked 2006.229.10:02:35.89/vblo/03,649.99,yes,locked 2006.229.10:02:35.89/vblo/04,679.99,yes,locked 2006.229.10:02:35.89/vblo/05,709.99,yes,locked 2006.229.10:02:35.89/vblo/06,719.99,yes,locked 2006.229.10:02:35.89/vblo/07,734.99,yes,locked 2006.229.10:02:35.89/vblo/08,744.99,yes,locked 2006.229.10:02:36.04/vabw/8 2006.229.10:02:36.19/vbbw/8 2006.229.10:02:36.28/xfe/off,on,12.5 2006.229.10:02:36.65/ifatt/23,28,28,28 2006.229.10:02:37.07/fmout-gps/S +4.64E-07 2006.229.10:02:37.11:!2006.229.10:03:23 2006.229.10:03:23.01:data_valid=off 2006.229.10:03:23.02:"et 2006.229.10:03:23.02:!+3s 2006.229.10:03:26.03:"tape 2006.229.10:03:26.04:postob 2006.229.10:03:26.13/cable/+6.4024E-03 2006.229.10:03:26.14/wx/28.71,1001.2,98 2006.229.10:03:26.19/fmout-gps/S +4.63E-07 2006.229.10:03:26.20:scan_name=229-1008,jd0608,360 2006.229.10:03:26.20:source=1622-253,162546.89,-252738.3,2000.0,cw 2006.229.10:03:27.14#flagr#flagr/antenna,new-source 2006.229.10:03:27.15:checkk5 2006.229.10:03:27.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:03:27.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:03:28.39/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:03:28.81/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:03:29.20/chk_obsdata//k5ts1/T2291002??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:03:29.59/chk_obsdata//k5ts2/T2291002??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:03:29.98/chk_obsdata//k5ts3/T2291002??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:03:30.38/chk_obsdata//k5ts4/T2291002??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:03:31.11/k5log//k5ts1_log_newline 2006.229.10:03:31.81/k5log//k5ts2_log_newline 2006.229.10:03:32.51/k5log//k5ts3_log_newline 2006.229.10:03:33.22/k5log//k5ts4_log_newline 2006.229.10:03:33.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:03:33.24:setupk4=1 2006.229.10:03:33.24$setupk4/echo=on 2006.229.10:03:33.25$setupk4/pcalon 2006.229.10:03:33.25$pcalon/"no phase cal control is implemented here 2006.229.10:03:33.25$setupk4/"tpicd=stop 2006.229.10:03:33.25$setupk4/"rec=synch_on 2006.229.10:03:33.25$setupk4/"rec_mode=128 2006.229.10:03:33.25$setupk4/!* 2006.229.10:03:33.25$setupk4/recpk4 2006.229.10:03:33.25$recpk4/recpatch= 2006.229.10:03:33.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:03:33.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:03:33.25$setupk4/vck44 2006.229.10:03:33.25$vck44/valo=1,524.99 2006.229.10:03:33.25#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:03:33.25#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:03:33.25#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:33.25#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:33.25#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:33.25#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:33.25#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:03:33.25#ibcon#first serial, iclass 38, count 0 2006.229.10:03:33.25#ibcon#enter sib2, iclass 38, count 0 2006.229.10:03:33.25#ibcon#flushed, iclass 38, count 0 2006.229.10:03:33.25#ibcon#about to write, iclass 38, count 0 2006.229.10:03:33.25#ibcon#wrote, iclass 38, count 0 2006.229.10:03:33.25#ibcon#about to read 3, iclass 38, count 0 2006.229.10:03:33.26#ibcon#read 3, iclass 38, count 0 2006.229.10:03:33.26#ibcon#about to read 4, iclass 38, count 0 2006.229.10:03:33.26#ibcon#read 4, iclass 38, count 0 2006.229.10:03:33.26#ibcon#about to read 5, iclass 38, count 0 2006.229.10:03:33.26#ibcon#read 5, iclass 38, count 0 2006.229.10:03:33.26#ibcon#about to read 6, iclass 38, count 0 2006.229.10:03:33.26#ibcon#read 6, iclass 38, count 0 2006.229.10:03:33.26#ibcon#end of sib2, iclass 38, count 0 2006.229.10:03:33.26#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:03:33.26#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:03:33.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:03:33.26#ibcon#*before write, iclass 38, count 0 2006.229.10:03:33.26#ibcon#enter sib2, iclass 38, count 0 2006.229.10:03:33.26#ibcon#flushed, iclass 38, count 0 2006.229.10:03:33.26#ibcon#about to write, iclass 38, count 0 2006.229.10:03:33.26#ibcon#wrote, iclass 38, count 0 2006.229.10:03:33.26#ibcon#about to read 3, iclass 38, count 0 2006.229.10:03:33.31#ibcon#read 3, iclass 38, count 0 2006.229.10:03:33.31#ibcon#about to read 4, iclass 38, count 0 2006.229.10:03:33.31#ibcon#read 4, iclass 38, count 0 2006.229.10:03:33.31#ibcon#about to read 5, iclass 38, count 0 2006.229.10:03:33.31#ibcon#read 5, iclass 38, count 0 2006.229.10:03:33.31#ibcon#about to read 6, iclass 38, count 0 2006.229.10:03:33.31#ibcon#read 6, iclass 38, count 0 2006.229.10:03:33.31#ibcon#end of sib2, iclass 38, count 0 2006.229.10:03:33.31#ibcon#*after write, iclass 38, count 0 2006.229.10:03:33.31#ibcon#*before return 0, iclass 38, count 0 2006.229.10:03:33.31#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:33.31#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:33.31#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:03:33.31#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:03:33.31$vck44/va=1,8 2006.229.10:03:33.31#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.10:03:33.31#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.10:03:33.31#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:33.31#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:03:33.31#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:03:33.31#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:03:33.31#ibcon#enter wrdev, iclass 40, count 2 2006.229.10:03:33.31#ibcon#first serial, iclass 40, count 2 2006.229.10:03:33.31#ibcon#enter sib2, iclass 40, count 2 2006.229.10:03:33.31#ibcon#flushed, iclass 40, count 2 2006.229.10:03:33.31#ibcon#about to write, iclass 40, count 2 2006.229.10:03:33.31#ibcon#wrote, iclass 40, count 2 2006.229.10:03:33.31#ibcon#about to read 3, iclass 40, count 2 2006.229.10:03:33.33#ibcon#read 3, iclass 40, count 2 2006.229.10:03:33.33#ibcon#about to read 4, iclass 40, count 2 2006.229.10:03:33.33#ibcon#read 4, iclass 40, count 2 2006.229.10:03:33.33#ibcon#about to read 5, iclass 40, count 2 2006.229.10:03:33.33#ibcon#read 5, iclass 40, count 2 2006.229.10:03:33.33#ibcon#about to read 6, iclass 40, count 2 2006.229.10:03:33.33#ibcon#read 6, iclass 40, count 2 2006.229.10:03:33.33#ibcon#end of sib2, iclass 40, count 2 2006.229.10:03:33.33#ibcon#*mode == 0, iclass 40, count 2 2006.229.10:03:33.33#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.10:03:33.33#ibcon#[25=AT01-08\r\n] 2006.229.10:03:33.33#ibcon#*before write, iclass 40, count 2 2006.229.10:03:33.33#ibcon#enter sib2, iclass 40, count 2 2006.229.10:03:33.33#ibcon#flushed, iclass 40, count 2 2006.229.10:03:33.33#ibcon#about to write, iclass 40, count 2 2006.229.10:03:33.33#ibcon#wrote, iclass 40, count 2 2006.229.10:03:33.33#ibcon#about to read 3, iclass 40, count 2 2006.229.10:03:33.36#ibcon#read 3, iclass 40, count 2 2006.229.10:03:33.36#ibcon#about to read 4, iclass 40, count 2 2006.229.10:03:33.36#ibcon#read 4, iclass 40, count 2 2006.229.10:03:33.36#ibcon#about to read 5, iclass 40, count 2 2006.229.10:03:33.36#ibcon#read 5, iclass 40, count 2 2006.229.10:03:33.36#ibcon#about to read 6, iclass 40, count 2 2006.229.10:03:33.36#ibcon#read 6, iclass 40, count 2 2006.229.10:03:33.36#ibcon#end of sib2, iclass 40, count 2 2006.229.10:03:33.36#ibcon#*after write, iclass 40, count 2 2006.229.10:03:33.36#ibcon#*before return 0, iclass 40, count 2 2006.229.10:03:33.36#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:03:33.36#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:03:33.36#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.10:03:33.36#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:33.36#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:03:33.48#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:03:33.48#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:03:33.48#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:03:33.48#ibcon#first serial, iclass 40, count 0 2006.229.10:03:33.48#ibcon#enter sib2, iclass 40, count 0 2006.229.10:03:33.48#ibcon#flushed, iclass 40, count 0 2006.229.10:03:33.48#ibcon#about to write, iclass 40, count 0 2006.229.10:03:33.48#ibcon#wrote, iclass 40, count 0 2006.229.10:03:33.48#ibcon#about to read 3, iclass 40, count 0 2006.229.10:03:33.50#ibcon#read 3, iclass 40, count 0 2006.229.10:03:33.50#ibcon#about to read 4, iclass 40, count 0 2006.229.10:03:33.50#ibcon#read 4, iclass 40, count 0 2006.229.10:03:33.50#ibcon#about to read 5, iclass 40, count 0 2006.229.10:03:33.50#ibcon#read 5, iclass 40, count 0 2006.229.10:03:33.50#ibcon#about to read 6, iclass 40, count 0 2006.229.10:03:33.50#ibcon#read 6, iclass 40, count 0 2006.229.10:03:33.50#ibcon#end of sib2, iclass 40, count 0 2006.229.10:03:33.50#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:03:33.50#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:03:33.50#ibcon#[25=USB\r\n] 2006.229.10:03:33.50#ibcon#*before write, iclass 40, count 0 2006.229.10:03:33.50#ibcon#enter sib2, iclass 40, count 0 2006.229.10:03:33.50#ibcon#flushed, iclass 40, count 0 2006.229.10:03:33.50#ibcon#about to write, iclass 40, count 0 2006.229.10:03:33.50#ibcon#wrote, iclass 40, count 0 2006.229.10:03:33.50#ibcon#about to read 3, iclass 40, count 0 2006.229.10:03:33.53#ibcon#read 3, iclass 40, count 0 2006.229.10:03:33.53#ibcon#about to read 4, iclass 40, count 0 2006.229.10:03:33.53#ibcon#read 4, iclass 40, count 0 2006.229.10:03:33.53#ibcon#about to read 5, iclass 40, count 0 2006.229.10:03:33.53#ibcon#read 5, iclass 40, count 0 2006.229.10:03:33.53#ibcon#about to read 6, iclass 40, count 0 2006.229.10:03:33.53#ibcon#read 6, iclass 40, count 0 2006.229.10:03:33.53#ibcon#end of sib2, iclass 40, count 0 2006.229.10:03:33.53#ibcon#*after write, iclass 40, count 0 2006.229.10:03:33.53#ibcon#*before return 0, iclass 40, count 0 2006.229.10:03:33.53#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:03:33.53#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:03:33.53#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:03:33.53#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:03:33.53$vck44/valo=2,534.99 2006.229.10:03:33.53#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.10:03:33.53#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.10:03:33.53#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:33.53#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:03:33.53#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:03:33.53#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:03:33.53#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:03:33.53#ibcon#first serial, iclass 4, count 0 2006.229.10:03:33.53#ibcon#enter sib2, iclass 4, count 0 2006.229.10:03:33.53#ibcon#flushed, iclass 4, count 0 2006.229.10:03:33.53#ibcon#about to write, iclass 4, count 0 2006.229.10:03:33.53#ibcon#wrote, iclass 4, count 0 2006.229.10:03:33.53#ibcon#about to read 3, iclass 4, count 0 2006.229.10:03:33.55#ibcon#read 3, iclass 4, count 0 2006.229.10:03:33.55#ibcon#about to read 4, iclass 4, count 0 2006.229.10:03:33.55#ibcon#read 4, iclass 4, count 0 2006.229.10:03:33.55#ibcon#about to read 5, iclass 4, count 0 2006.229.10:03:33.55#ibcon#read 5, iclass 4, count 0 2006.229.10:03:33.55#ibcon#about to read 6, iclass 4, count 0 2006.229.10:03:33.55#ibcon#read 6, iclass 4, count 0 2006.229.10:03:33.55#ibcon#end of sib2, iclass 4, count 0 2006.229.10:03:33.55#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:03:33.55#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:03:33.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:03:33.55#ibcon#*before write, iclass 4, count 0 2006.229.10:03:33.55#ibcon#enter sib2, iclass 4, count 0 2006.229.10:03:33.55#ibcon#flushed, iclass 4, count 0 2006.229.10:03:33.55#ibcon#about to write, iclass 4, count 0 2006.229.10:03:33.55#ibcon#wrote, iclass 4, count 0 2006.229.10:03:33.55#ibcon#about to read 3, iclass 4, count 0 2006.229.10:03:33.59#ibcon#read 3, iclass 4, count 0 2006.229.10:03:33.59#ibcon#about to read 4, iclass 4, count 0 2006.229.10:03:33.59#ibcon#read 4, iclass 4, count 0 2006.229.10:03:33.59#ibcon#about to read 5, iclass 4, count 0 2006.229.10:03:33.59#ibcon#read 5, iclass 4, count 0 2006.229.10:03:33.59#ibcon#about to read 6, iclass 4, count 0 2006.229.10:03:33.59#ibcon#read 6, iclass 4, count 0 2006.229.10:03:33.59#ibcon#end of sib2, iclass 4, count 0 2006.229.10:03:33.59#ibcon#*after write, iclass 4, count 0 2006.229.10:03:33.59#ibcon#*before return 0, iclass 4, count 0 2006.229.10:03:33.59#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:03:33.59#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:03:33.59#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:03:33.59#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:03:33.59$vck44/va=2,7 2006.229.10:03:33.59#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.10:03:33.59#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.10:03:33.59#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:33.59#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:03:33.65#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:03:33.65#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:03:33.65#ibcon#enter wrdev, iclass 6, count 2 2006.229.10:03:33.65#ibcon#first serial, iclass 6, count 2 2006.229.10:03:33.65#ibcon#enter sib2, iclass 6, count 2 2006.229.10:03:33.65#ibcon#flushed, iclass 6, count 2 2006.229.10:03:33.65#ibcon#about to write, iclass 6, count 2 2006.229.10:03:33.65#ibcon#wrote, iclass 6, count 2 2006.229.10:03:33.65#ibcon#about to read 3, iclass 6, count 2 2006.229.10:03:33.67#ibcon#read 3, iclass 6, count 2 2006.229.10:03:33.67#ibcon#about to read 4, iclass 6, count 2 2006.229.10:03:33.67#ibcon#read 4, iclass 6, count 2 2006.229.10:03:33.67#ibcon#about to read 5, iclass 6, count 2 2006.229.10:03:33.67#ibcon#read 5, iclass 6, count 2 2006.229.10:03:33.67#ibcon#about to read 6, iclass 6, count 2 2006.229.10:03:33.67#ibcon#read 6, iclass 6, count 2 2006.229.10:03:33.67#ibcon#end of sib2, iclass 6, count 2 2006.229.10:03:33.67#ibcon#*mode == 0, iclass 6, count 2 2006.229.10:03:33.67#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.10:03:33.67#ibcon#[25=AT02-07\r\n] 2006.229.10:03:33.67#ibcon#*before write, iclass 6, count 2 2006.229.10:03:33.67#ibcon#enter sib2, iclass 6, count 2 2006.229.10:03:33.67#ibcon#flushed, iclass 6, count 2 2006.229.10:03:33.67#ibcon#about to write, iclass 6, count 2 2006.229.10:03:33.67#ibcon#wrote, iclass 6, count 2 2006.229.10:03:33.67#ibcon#about to read 3, iclass 6, count 2 2006.229.10:03:33.70#ibcon#read 3, iclass 6, count 2 2006.229.10:03:33.70#ibcon#about to read 4, iclass 6, count 2 2006.229.10:03:33.70#ibcon#read 4, iclass 6, count 2 2006.229.10:03:33.70#ibcon#about to read 5, iclass 6, count 2 2006.229.10:03:33.70#ibcon#read 5, iclass 6, count 2 2006.229.10:03:33.70#ibcon#about to read 6, iclass 6, count 2 2006.229.10:03:33.70#ibcon#read 6, iclass 6, count 2 2006.229.10:03:33.70#ibcon#end of sib2, iclass 6, count 2 2006.229.10:03:33.70#ibcon#*after write, iclass 6, count 2 2006.229.10:03:33.70#ibcon#*before return 0, iclass 6, count 2 2006.229.10:03:33.70#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:03:33.70#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:03:33.70#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.10:03:33.70#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:33.70#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:03:33.82#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:03:33.82#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:03:33.82#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:03:33.82#ibcon#first serial, iclass 6, count 0 2006.229.10:03:33.82#ibcon#enter sib2, iclass 6, count 0 2006.229.10:03:33.82#ibcon#flushed, iclass 6, count 0 2006.229.10:03:33.82#ibcon#about to write, iclass 6, count 0 2006.229.10:03:33.82#ibcon#wrote, iclass 6, count 0 2006.229.10:03:33.82#ibcon#about to read 3, iclass 6, count 0 2006.229.10:03:33.84#ibcon#read 3, iclass 6, count 0 2006.229.10:03:33.84#ibcon#about to read 4, iclass 6, count 0 2006.229.10:03:33.84#ibcon#read 4, iclass 6, count 0 2006.229.10:03:33.84#ibcon#about to read 5, iclass 6, count 0 2006.229.10:03:33.84#ibcon#read 5, iclass 6, count 0 2006.229.10:03:33.84#ibcon#about to read 6, iclass 6, count 0 2006.229.10:03:33.84#ibcon#read 6, iclass 6, count 0 2006.229.10:03:33.84#ibcon#end of sib2, iclass 6, count 0 2006.229.10:03:33.84#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:03:33.84#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:03:33.84#ibcon#[25=USB\r\n] 2006.229.10:03:33.84#ibcon#*before write, iclass 6, count 0 2006.229.10:03:33.84#ibcon#enter sib2, iclass 6, count 0 2006.229.10:03:33.84#ibcon#flushed, iclass 6, count 0 2006.229.10:03:33.84#ibcon#about to write, iclass 6, count 0 2006.229.10:03:33.84#ibcon#wrote, iclass 6, count 0 2006.229.10:03:33.84#ibcon#about to read 3, iclass 6, count 0 2006.229.10:03:33.87#ibcon#read 3, iclass 6, count 0 2006.229.10:03:33.87#ibcon#about to read 4, iclass 6, count 0 2006.229.10:03:33.87#ibcon#read 4, iclass 6, count 0 2006.229.10:03:33.87#ibcon#about to read 5, iclass 6, count 0 2006.229.10:03:33.87#ibcon#read 5, iclass 6, count 0 2006.229.10:03:33.87#ibcon#about to read 6, iclass 6, count 0 2006.229.10:03:33.87#ibcon#read 6, iclass 6, count 0 2006.229.10:03:33.87#ibcon#end of sib2, iclass 6, count 0 2006.229.10:03:33.87#ibcon#*after write, iclass 6, count 0 2006.229.10:03:33.87#ibcon#*before return 0, iclass 6, count 0 2006.229.10:03:33.87#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:03:33.87#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:03:33.87#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:03:33.87#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:03:33.87$vck44/valo=3,564.99 2006.229.10:03:33.87#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.10:03:33.87#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.10:03:33.87#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:33.87#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:33.87#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:33.87#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:33.87#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:03:33.87#ibcon#first serial, iclass 10, count 0 2006.229.10:03:33.87#ibcon#enter sib2, iclass 10, count 0 2006.229.10:03:33.87#ibcon#flushed, iclass 10, count 0 2006.229.10:03:33.87#ibcon#about to write, iclass 10, count 0 2006.229.10:03:33.87#ibcon#wrote, iclass 10, count 0 2006.229.10:03:33.87#ibcon#about to read 3, iclass 10, count 0 2006.229.10:03:33.89#ibcon#read 3, iclass 10, count 0 2006.229.10:03:33.89#ibcon#about to read 4, iclass 10, count 0 2006.229.10:03:33.89#ibcon#read 4, iclass 10, count 0 2006.229.10:03:33.89#ibcon#about to read 5, iclass 10, count 0 2006.229.10:03:33.89#ibcon#read 5, iclass 10, count 0 2006.229.10:03:33.89#ibcon#about to read 6, iclass 10, count 0 2006.229.10:03:33.89#ibcon#read 6, iclass 10, count 0 2006.229.10:03:33.89#ibcon#end of sib2, iclass 10, count 0 2006.229.10:03:33.89#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:03:33.89#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:03:33.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:03:33.89#ibcon#*before write, iclass 10, count 0 2006.229.10:03:33.89#ibcon#enter sib2, iclass 10, count 0 2006.229.10:03:33.89#ibcon#flushed, iclass 10, count 0 2006.229.10:03:33.89#ibcon#about to write, iclass 10, count 0 2006.229.10:03:33.89#ibcon#wrote, iclass 10, count 0 2006.229.10:03:33.89#ibcon#about to read 3, iclass 10, count 0 2006.229.10:03:33.93#ibcon#read 3, iclass 10, count 0 2006.229.10:03:33.93#ibcon#about to read 4, iclass 10, count 0 2006.229.10:03:33.93#ibcon#read 4, iclass 10, count 0 2006.229.10:03:33.93#ibcon#about to read 5, iclass 10, count 0 2006.229.10:03:33.93#ibcon#read 5, iclass 10, count 0 2006.229.10:03:33.93#ibcon#about to read 6, iclass 10, count 0 2006.229.10:03:33.93#ibcon#read 6, iclass 10, count 0 2006.229.10:03:33.93#ibcon#end of sib2, iclass 10, count 0 2006.229.10:03:33.93#ibcon#*after write, iclass 10, count 0 2006.229.10:03:33.93#ibcon#*before return 0, iclass 10, count 0 2006.229.10:03:33.93#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:33.93#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:33.93#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:03:33.93#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:03:33.93$vck44/va=3,6 2006.229.10:03:33.93#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.10:03:33.93#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.10:03:33.93#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:33.93#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:33.99#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:33.99#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:33.99#ibcon#enter wrdev, iclass 12, count 2 2006.229.10:03:33.99#ibcon#first serial, iclass 12, count 2 2006.229.10:03:33.99#ibcon#enter sib2, iclass 12, count 2 2006.229.10:03:33.99#ibcon#flushed, iclass 12, count 2 2006.229.10:03:33.99#ibcon#about to write, iclass 12, count 2 2006.229.10:03:33.99#ibcon#wrote, iclass 12, count 2 2006.229.10:03:33.99#ibcon#about to read 3, iclass 12, count 2 2006.229.10:03:34.01#ibcon#read 3, iclass 12, count 2 2006.229.10:03:34.01#ibcon#about to read 4, iclass 12, count 2 2006.229.10:03:34.01#ibcon#read 4, iclass 12, count 2 2006.229.10:03:34.01#ibcon#about to read 5, iclass 12, count 2 2006.229.10:03:34.01#ibcon#read 5, iclass 12, count 2 2006.229.10:03:34.01#ibcon#about to read 6, iclass 12, count 2 2006.229.10:03:34.01#ibcon#read 6, iclass 12, count 2 2006.229.10:03:34.01#ibcon#end of sib2, iclass 12, count 2 2006.229.10:03:34.01#ibcon#*mode == 0, iclass 12, count 2 2006.229.10:03:34.01#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.10:03:34.01#ibcon#[25=AT03-06\r\n] 2006.229.10:03:34.01#ibcon#*before write, iclass 12, count 2 2006.229.10:03:34.01#ibcon#enter sib2, iclass 12, count 2 2006.229.10:03:34.01#ibcon#flushed, iclass 12, count 2 2006.229.10:03:34.01#ibcon#about to write, iclass 12, count 2 2006.229.10:03:34.01#ibcon#wrote, iclass 12, count 2 2006.229.10:03:34.01#ibcon#about to read 3, iclass 12, count 2 2006.229.10:03:34.04#ibcon#read 3, iclass 12, count 2 2006.229.10:03:34.04#ibcon#about to read 4, iclass 12, count 2 2006.229.10:03:34.04#ibcon#read 4, iclass 12, count 2 2006.229.10:03:34.04#ibcon#about to read 5, iclass 12, count 2 2006.229.10:03:34.04#ibcon#read 5, iclass 12, count 2 2006.229.10:03:34.04#ibcon#about to read 6, iclass 12, count 2 2006.229.10:03:34.04#ibcon#read 6, iclass 12, count 2 2006.229.10:03:34.04#ibcon#end of sib2, iclass 12, count 2 2006.229.10:03:34.04#ibcon#*after write, iclass 12, count 2 2006.229.10:03:34.04#ibcon#*before return 0, iclass 12, count 2 2006.229.10:03:34.04#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:34.04#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:34.04#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.10:03:34.04#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:34.04#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:34.16#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:34.16#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:34.16#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:03:34.16#ibcon#first serial, iclass 12, count 0 2006.229.10:03:34.16#ibcon#enter sib2, iclass 12, count 0 2006.229.10:03:34.16#ibcon#flushed, iclass 12, count 0 2006.229.10:03:34.16#ibcon#about to write, iclass 12, count 0 2006.229.10:03:34.16#ibcon#wrote, iclass 12, count 0 2006.229.10:03:34.16#ibcon#about to read 3, iclass 12, count 0 2006.229.10:03:34.18#ibcon#read 3, iclass 12, count 0 2006.229.10:03:34.18#ibcon#about to read 4, iclass 12, count 0 2006.229.10:03:34.18#ibcon#read 4, iclass 12, count 0 2006.229.10:03:34.18#ibcon#about to read 5, iclass 12, count 0 2006.229.10:03:34.18#ibcon#read 5, iclass 12, count 0 2006.229.10:03:34.18#ibcon#about to read 6, iclass 12, count 0 2006.229.10:03:34.18#ibcon#read 6, iclass 12, count 0 2006.229.10:03:34.18#ibcon#end of sib2, iclass 12, count 0 2006.229.10:03:34.18#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:03:34.18#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:03:34.18#ibcon#[25=USB\r\n] 2006.229.10:03:34.18#ibcon#*before write, iclass 12, count 0 2006.229.10:03:34.18#ibcon#enter sib2, iclass 12, count 0 2006.229.10:03:34.18#ibcon#flushed, iclass 12, count 0 2006.229.10:03:34.18#ibcon#about to write, iclass 12, count 0 2006.229.10:03:34.18#ibcon#wrote, iclass 12, count 0 2006.229.10:03:34.18#ibcon#about to read 3, iclass 12, count 0 2006.229.10:03:34.21#ibcon#read 3, iclass 12, count 0 2006.229.10:03:34.21#ibcon#about to read 4, iclass 12, count 0 2006.229.10:03:34.21#ibcon#read 4, iclass 12, count 0 2006.229.10:03:34.21#ibcon#about to read 5, iclass 12, count 0 2006.229.10:03:34.21#ibcon#read 5, iclass 12, count 0 2006.229.10:03:34.21#ibcon#about to read 6, iclass 12, count 0 2006.229.10:03:34.21#ibcon#read 6, iclass 12, count 0 2006.229.10:03:34.21#ibcon#end of sib2, iclass 12, count 0 2006.229.10:03:34.21#ibcon#*after write, iclass 12, count 0 2006.229.10:03:34.21#ibcon#*before return 0, iclass 12, count 0 2006.229.10:03:34.21#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:34.21#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:34.21#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:03:34.21#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:03:34.21$vck44/valo=4,624.99 2006.229.10:03:34.21#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.10:03:34.21#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.10:03:34.21#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:34.21#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:34.21#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:34.21#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:34.21#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:03:34.21#ibcon#first serial, iclass 14, count 0 2006.229.10:03:34.21#ibcon#enter sib2, iclass 14, count 0 2006.229.10:03:34.21#ibcon#flushed, iclass 14, count 0 2006.229.10:03:34.21#ibcon#about to write, iclass 14, count 0 2006.229.10:03:34.21#ibcon#wrote, iclass 14, count 0 2006.229.10:03:34.21#ibcon#about to read 3, iclass 14, count 0 2006.229.10:03:34.23#ibcon#read 3, iclass 14, count 0 2006.229.10:03:34.23#ibcon#about to read 4, iclass 14, count 0 2006.229.10:03:34.23#ibcon#read 4, iclass 14, count 0 2006.229.10:03:34.23#ibcon#about to read 5, iclass 14, count 0 2006.229.10:03:34.23#ibcon#read 5, iclass 14, count 0 2006.229.10:03:34.23#ibcon#about to read 6, iclass 14, count 0 2006.229.10:03:34.23#ibcon#read 6, iclass 14, count 0 2006.229.10:03:34.23#ibcon#end of sib2, iclass 14, count 0 2006.229.10:03:34.23#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:03:34.23#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:03:34.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:03:34.23#ibcon#*before write, iclass 14, count 0 2006.229.10:03:34.23#ibcon#enter sib2, iclass 14, count 0 2006.229.10:03:34.23#ibcon#flushed, iclass 14, count 0 2006.229.10:03:34.23#ibcon#about to write, iclass 14, count 0 2006.229.10:03:34.23#ibcon#wrote, iclass 14, count 0 2006.229.10:03:34.23#ibcon#about to read 3, iclass 14, count 0 2006.229.10:03:34.27#ibcon#read 3, iclass 14, count 0 2006.229.10:03:34.27#ibcon#about to read 4, iclass 14, count 0 2006.229.10:03:34.27#ibcon#read 4, iclass 14, count 0 2006.229.10:03:34.27#ibcon#about to read 5, iclass 14, count 0 2006.229.10:03:34.27#ibcon#read 5, iclass 14, count 0 2006.229.10:03:34.27#ibcon#about to read 6, iclass 14, count 0 2006.229.10:03:34.27#ibcon#read 6, iclass 14, count 0 2006.229.10:03:34.27#ibcon#end of sib2, iclass 14, count 0 2006.229.10:03:34.27#ibcon#*after write, iclass 14, count 0 2006.229.10:03:34.27#ibcon#*before return 0, iclass 14, count 0 2006.229.10:03:34.27#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:34.27#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:34.27#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:03:34.27#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:03:34.27$vck44/va=4,7 2006.229.10:03:34.27#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.10:03:34.27#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.10:03:34.27#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:34.27#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:34.33#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:34.33#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:34.33#ibcon#enter wrdev, iclass 16, count 2 2006.229.10:03:34.33#ibcon#first serial, iclass 16, count 2 2006.229.10:03:34.33#ibcon#enter sib2, iclass 16, count 2 2006.229.10:03:34.33#ibcon#flushed, iclass 16, count 2 2006.229.10:03:34.33#ibcon#about to write, iclass 16, count 2 2006.229.10:03:34.33#ibcon#wrote, iclass 16, count 2 2006.229.10:03:34.33#ibcon#about to read 3, iclass 16, count 2 2006.229.10:03:34.35#ibcon#read 3, iclass 16, count 2 2006.229.10:03:34.35#ibcon#about to read 4, iclass 16, count 2 2006.229.10:03:34.35#ibcon#read 4, iclass 16, count 2 2006.229.10:03:34.35#ibcon#about to read 5, iclass 16, count 2 2006.229.10:03:34.35#ibcon#read 5, iclass 16, count 2 2006.229.10:03:34.35#ibcon#about to read 6, iclass 16, count 2 2006.229.10:03:34.35#ibcon#read 6, iclass 16, count 2 2006.229.10:03:34.35#ibcon#end of sib2, iclass 16, count 2 2006.229.10:03:34.35#ibcon#*mode == 0, iclass 16, count 2 2006.229.10:03:34.35#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.10:03:34.35#ibcon#[25=AT04-07\r\n] 2006.229.10:03:34.35#ibcon#*before write, iclass 16, count 2 2006.229.10:03:34.35#ibcon#enter sib2, iclass 16, count 2 2006.229.10:03:34.35#ibcon#flushed, iclass 16, count 2 2006.229.10:03:34.35#ibcon#about to write, iclass 16, count 2 2006.229.10:03:34.35#ibcon#wrote, iclass 16, count 2 2006.229.10:03:34.35#ibcon#about to read 3, iclass 16, count 2 2006.229.10:03:34.38#ibcon#read 3, iclass 16, count 2 2006.229.10:03:34.38#ibcon#about to read 4, iclass 16, count 2 2006.229.10:03:34.38#ibcon#read 4, iclass 16, count 2 2006.229.10:03:34.38#ibcon#about to read 5, iclass 16, count 2 2006.229.10:03:34.38#ibcon#read 5, iclass 16, count 2 2006.229.10:03:34.38#ibcon#about to read 6, iclass 16, count 2 2006.229.10:03:34.38#ibcon#read 6, iclass 16, count 2 2006.229.10:03:34.38#ibcon#end of sib2, iclass 16, count 2 2006.229.10:03:34.38#ibcon#*after write, iclass 16, count 2 2006.229.10:03:34.38#ibcon#*before return 0, iclass 16, count 2 2006.229.10:03:34.42#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:34.42#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:34.42#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.10:03:34.42#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:34.42#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:34.53#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:34.53#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:34.53#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:03:34.53#ibcon#first serial, iclass 16, count 0 2006.229.10:03:34.53#ibcon#enter sib2, iclass 16, count 0 2006.229.10:03:34.53#ibcon#flushed, iclass 16, count 0 2006.229.10:03:34.53#ibcon#about to write, iclass 16, count 0 2006.229.10:03:34.53#ibcon#wrote, iclass 16, count 0 2006.229.10:03:34.53#ibcon#about to read 3, iclass 16, count 0 2006.229.10:03:34.55#ibcon#read 3, iclass 16, count 0 2006.229.10:03:34.55#ibcon#about to read 4, iclass 16, count 0 2006.229.10:03:34.55#ibcon#read 4, iclass 16, count 0 2006.229.10:03:34.55#ibcon#about to read 5, iclass 16, count 0 2006.229.10:03:34.55#ibcon#read 5, iclass 16, count 0 2006.229.10:03:34.55#ibcon#about to read 6, iclass 16, count 0 2006.229.10:03:34.55#ibcon#read 6, iclass 16, count 0 2006.229.10:03:34.55#ibcon#end of sib2, iclass 16, count 0 2006.229.10:03:34.55#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:03:34.55#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:03:34.55#ibcon#[25=USB\r\n] 2006.229.10:03:34.55#ibcon#*before write, iclass 16, count 0 2006.229.10:03:34.55#ibcon#enter sib2, iclass 16, count 0 2006.229.10:03:34.55#ibcon#flushed, iclass 16, count 0 2006.229.10:03:34.55#ibcon#about to write, iclass 16, count 0 2006.229.10:03:34.55#ibcon#wrote, iclass 16, count 0 2006.229.10:03:34.55#ibcon#about to read 3, iclass 16, count 0 2006.229.10:03:34.58#ibcon#read 3, iclass 16, count 0 2006.229.10:03:34.58#ibcon#about to read 4, iclass 16, count 0 2006.229.10:03:34.58#ibcon#read 4, iclass 16, count 0 2006.229.10:03:34.58#ibcon#about to read 5, iclass 16, count 0 2006.229.10:03:34.58#ibcon#read 5, iclass 16, count 0 2006.229.10:03:34.58#ibcon#about to read 6, iclass 16, count 0 2006.229.10:03:34.58#ibcon#read 6, iclass 16, count 0 2006.229.10:03:34.58#ibcon#end of sib2, iclass 16, count 0 2006.229.10:03:34.58#ibcon#*after write, iclass 16, count 0 2006.229.10:03:34.58#ibcon#*before return 0, iclass 16, count 0 2006.229.10:03:34.58#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:34.58#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:34.58#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:03:34.58#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:03:34.58$vck44/valo=5,734.99 2006.229.10:03:34.58#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.10:03:34.58#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.10:03:34.58#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:34.58#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:34.58#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:34.58#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:34.58#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:03:34.58#ibcon#first serial, iclass 18, count 0 2006.229.10:03:34.58#ibcon#enter sib2, iclass 18, count 0 2006.229.10:03:34.58#ibcon#flushed, iclass 18, count 0 2006.229.10:03:34.58#ibcon#about to write, iclass 18, count 0 2006.229.10:03:34.58#ibcon#wrote, iclass 18, count 0 2006.229.10:03:34.58#ibcon#about to read 3, iclass 18, count 0 2006.229.10:03:34.60#ibcon#read 3, iclass 18, count 0 2006.229.10:03:34.60#ibcon#about to read 4, iclass 18, count 0 2006.229.10:03:34.60#ibcon#read 4, iclass 18, count 0 2006.229.10:03:34.60#ibcon#about to read 5, iclass 18, count 0 2006.229.10:03:34.60#ibcon#read 5, iclass 18, count 0 2006.229.10:03:34.60#ibcon#about to read 6, iclass 18, count 0 2006.229.10:03:34.60#ibcon#read 6, iclass 18, count 0 2006.229.10:03:34.60#ibcon#end of sib2, iclass 18, count 0 2006.229.10:03:34.60#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:03:34.60#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:03:34.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:03:34.60#ibcon#*before write, iclass 18, count 0 2006.229.10:03:34.60#ibcon#enter sib2, iclass 18, count 0 2006.229.10:03:34.60#ibcon#flushed, iclass 18, count 0 2006.229.10:03:34.60#ibcon#about to write, iclass 18, count 0 2006.229.10:03:34.60#ibcon#wrote, iclass 18, count 0 2006.229.10:03:34.60#ibcon#about to read 3, iclass 18, count 0 2006.229.10:03:34.64#ibcon#read 3, iclass 18, count 0 2006.229.10:03:34.64#ibcon#about to read 4, iclass 18, count 0 2006.229.10:03:34.64#ibcon#read 4, iclass 18, count 0 2006.229.10:03:34.64#ibcon#about to read 5, iclass 18, count 0 2006.229.10:03:34.64#ibcon#read 5, iclass 18, count 0 2006.229.10:03:34.64#ibcon#about to read 6, iclass 18, count 0 2006.229.10:03:34.64#ibcon#read 6, iclass 18, count 0 2006.229.10:03:34.64#ibcon#end of sib2, iclass 18, count 0 2006.229.10:03:34.64#ibcon#*after write, iclass 18, count 0 2006.229.10:03:34.64#ibcon#*before return 0, iclass 18, count 0 2006.229.10:03:34.64#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:34.64#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:34.64#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:03:34.64#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:03:34.64$vck44/va=5,4 2006.229.10:03:34.64#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.10:03:34.64#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.10:03:34.64#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:34.64#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:34.70#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:34.70#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:34.70#ibcon#enter wrdev, iclass 20, count 2 2006.229.10:03:34.70#ibcon#first serial, iclass 20, count 2 2006.229.10:03:34.70#ibcon#enter sib2, iclass 20, count 2 2006.229.10:03:34.70#ibcon#flushed, iclass 20, count 2 2006.229.10:03:34.70#ibcon#about to write, iclass 20, count 2 2006.229.10:03:34.70#ibcon#wrote, iclass 20, count 2 2006.229.10:03:34.70#ibcon#about to read 3, iclass 20, count 2 2006.229.10:03:34.72#ibcon#read 3, iclass 20, count 2 2006.229.10:03:34.72#ibcon#about to read 4, iclass 20, count 2 2006.229.10:03:34.72#ibcon#read 4, iclass 20, count 2 2006.229.10:03:34.72#ibcon#about to read 5, iclass 20, count 2 2006.229.10:03:34.72#ibcon#read 5, iclass 20, count 2 2006.229.10:03:34.72#ibcon#about to read 6, iclass 20, count 2 2006.229.10:03:34.72#ibcon#read 6, iclass 20, count 2 2006.229.10:03:34.72#ibcon#end of sib2, iclass 20, count 2 2006.229.10:03:34.72#ibcon#*mode == 0, iclass 20, count 2 2006.229.10:03:34.72#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.10:03:34.72#ibcon#[25=AT05-04\r\n] 2006.229.10:03:34.72#ibcon#*before write, iclass 20, count 2 2006.229.10:03:34.72#ibcon#enter sib2, iclass 20, count 2 2006.229.10:03:34.72#ibcon#flushed, iclass 20, count 2 2006.229.10:03:34.72#ibcon#about to write, iclass 20, count 2 2006.229.10:03:34.72#ibcon#wrote, iclass 20, count 2 2006.229.10:03:34.72#ibcon#about to read 3, iclass 20, count 2 2006.229.10:03:34.75#ibcon#read 3, iclass 20, count 2 2006.229.10:03:34.75#ibcon#about to read 4, iclass 20, count 2 2006.229.10:03:34.75#ibcon#read 4, iclass 20, count 2 2006.229.10:03:34.75#ibcon#about to read 5, iclass 20, count 2 2006.229.10:03:34.75#ibcon#read 5, iclass 20, count 2 2006.229.10:03:34.75#ibcon#about to read 6, iclass 20, count 2 2006.229.10:03:34.75#ibcon#read 6, iclass 20, count 2 2006.229.10:03:34.75#ibcon#end of sib2, iclass 20, count 2 2006.229.10:03:34.75#ibcon#*after write, iclass 20, count 2 2006.229.10:03:34.75#ibcon#*before return 0, iclass 20, count 2 2006.229.10:03:34.75#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:34.75#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:34.75#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.10:03:34.75#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:34.75#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:34.87#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:34.87#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:34.87#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:03:34.87#ibcon#first serial, iclass 20, count 0 2006.229.10:03:34.87#ibcon#enter sib2, iclass 20, count 0 2006.229.10:03:34.87#ibcon#flushed, iclass 20, count 0 2006.229.10:03:34.87#ibcon#about to write, iclass 20, count 0 2006.229.10:03:34.87#ibcon#wrote, iclass 20, count 0 2006.229.10:03:34.87#ibcon#about to read 3, iclass 20, count 0 2006.229.10:03:34.89#ibcon#read 3, iclass 20, count 0 2006.229.10:03:34.89#ibcon#about to read 4, iclass 20, count 0 2006.229.10:03:34.89#ibcon#read 4, iclass 20, count 0 2006.229.10:03:34.89#ibcon#about to read 5, iclass 20, count 0 2006.229.10:03:34.89#ibcon#read 5, iclass 20, count 0 2006.229.10:03:34.89#ibcon#about to read 6, iclass 20, count 0 2006.229.10:03:34.89#ibcon#read 6, iclass 20, count 0 2006.229.10:03:34.89#ibcon#end of sib2, iclass 20, count 0 2006.229.10:03:34.89#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:03:34.89#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:03:34.89#ibcon#[25=USB\r\n] 2006.229.10:03:34.89#ibcon#*before write, iclass 20, count 0 2006.229.10:03:34.89#ibcon#enter sib2, iclass 20, count 0 2006.229.10:03:34.89#ibcon#flushed, iclass 20, count 0 2006.229.10:03:34.89#ibcon#about to write, iclass 20, count 0 2006.229.10:03:34.89#ibcon#wrote, iclass 20, count 0 2006.229.10:03:34.89#ibcon#about to read 3, iclass 20, count 0 2006.229.10:03:34.92#ibcon#read 3, iclass 20, count 0 2006.229.10:03:34.92#ibcon#about to read 4, iclass 20, count 0 2006.229.10:03:34.92#ibcon#read 4, iclass 20, count 0 2006.229.10:03:34.92#ibcon#about to read 5, iclass 20, count 0 2006.229.10:03:34.92#ibcon#read 5, iclass 20, count 0 2006.229.10:03:34.92#ibcon#about to read 6, iclass 20, count 0 2006.229.10:03:34.92#ibcon#read 6, iclass 20, count 0 2006.229.10:03:34.92#ibcon#end of sib2, iclass 20, count 0 2006.229.10:03:34.92#ibcon#*after write, iclass 20, count 0 2006.229.10:03:34.92#ibcon#*before return 0, iclass 20, count 0 2006.229.10:03:34.92#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:34.92#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:34.92#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:03:34.92#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:03:34.92$vck44/valo=6,814.99 2006.229.10:03:34.92#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.10:03:34.92#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.10:03:34.92#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:34.92#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:34.92#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:34.92#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:34.92#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:03:34.92#ibcon#first serial, iclass 22, count 0 2006.229.10:03:34.92#ibcon#enter sib2, iclass 22, count 0 2006.229.10:03:34.92#ibcon#flushed, iclass 22, count 0 2006.229.10:03:34.92#ibcon#about to write, iclass 22, count 0 2006.229.10:03:34.92#ibcon#wrote, iclass 22, count 0 2006.229.10:03:34.92#ibcon#about to read 3, iclass 22, count 0 2006.229.10:03:34.94#ibcon#read 3, iclass 22, count 0 2006.229.10:03:34.94#ibcon#about to read 4, iclass 22, count 0 2006.229.10:03:34.94#ibcon#read 4, iclass 22, count 0 2006.229.10:03:34.94#ibcon#about to read 5, iclass 22, count 0 2006.229.10:03:34.94#ibcon#read 5, iclass 22, count 0 2006.229.10:03:34.94#ibcon#about to read 6, iclass 22, count 0 2006.229.10:03:34.94#ibcon#read 6, iclass 22, count 0 2006.229.10:03:34.94#ibcon#end of sib2, iclass 22, count 0 2006.229.10:03:34.94#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:03:34.94#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:03:34.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:03:34.94#ibcon#*before write, iclass 22, count 0 2006.229.10:03:34.94#ibcon#enter sib2, iclass 22, count 0 2006.229.10:03:34.94#ibcon#flushed, iclass 22, count 0 2006.229.10:03:34.94#ibcon#about to write, iclass 22, count 0 2006.229.10:03:34.94#ibcon#wrote, iclass 22, count 0 2006.229.10:03:34.94#ibcon#about to read 3, iclass 22, count 0 2006.229.10:03:34.98#ibcon#read 3, iclass 22, count 0 2006.229.10:03:34.98#ibcon#about to read 4, iclass 22, count 0 2006.229.10:03:34.98#ibcon#read 4, iclass 22, count 0 2006.229.10:03:34.98#ibcon#about to read 5, iclass 22, count 0 2006.229.10:03:34.98#ibcon#read 5, iclass 22, count 0 2006.229.10:03:34.98#ibcon#about to read 6, iclass 22, count 0 2006.229.10:03:34.98#ibcon#read 6, iclass 22, count 0 2006.229.10:03:34.98#ibcon#end of sib2, iclass 22, count 0 2006.229.10:03:34.98#ibcon#*after write, iclass 22, count 0 2006.229.10:03:34.98#ibcon#*before return 0, iclass 22, count 0 2006.229.10:03:34.98#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:34.98#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:34.98#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:03:34.98#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:03:34.98$vck44/va=6,4 2006.229.10:03:34.98#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.10:03:34.98#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.10:03:34.98#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:34.98#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:35.04#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:35.04#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:35.04#ibcon#enter wrdev, iclass 24, count 2 2006.229.10:03:35.04#ibcon#first serial, iclass 24, count 2 2006.229.10:03:35.04#ibcon#enter sib2, iclass 24, count 2 2006.229.10:03:35.04#ibcon#flushed, iclass 24, count 2 2006.229.10:03:35.04#ibcon#about to write, iclass 24, count 2 2006.229.10:03:35.04#ibcon#wrote, iclass 24, count 2 2006.229.10:03:35.04#ibcon#about to read 3, iclass 24, count 2 2006.229.10:03:35.06#ibcon#read 3, iclass 24, count 2 2006.229.10:03:35.06#ibcon#about to read 4, iclass 24, count 2 2006.229.10:03:35.06#ibcon#read 4, iclass 24, count 2 2006.229.10:03:35.06#ibcon#about to read 5, iclass 24, count 2 2006.229.10:03:35.06#ibcon#read 5, iclass 24, count 2 2006.229.10:03:35.06#ibcon#about to read 6, iclass 24, count 2 2006.229.10:03:35.06#ibcon#read 6, iclass 24, count 2 2006.229.10:03:35.06#ibcon#end of sib2, iclass 24, count 2 2006.229.10:03:35.06#ibcon#*mode == 0, iclass 24, count 2 2006.229.10:03:35.06#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.10:03:35.06#ibcon#[25=AT06-04\r\n] 2006.229.10:03:35.06#ibcon#*before write, iclass 24, count 2 2006.229.10:03:35.06#ibcon#enter sib2, iclass 24, count 2 2006.229.10:03:35.06#ibcon#flushed, iclass 24, count 2 2006.229.10:03:35.06#ibcon#about to write, iclass 24, count 2 2006.229.10:03:35.06#ibcon#wrote, iclass 24, count 2 2006.229.10:03:35.06#ibcon#about to read 3, iclass 24, count 2 2006.229.10:03:35.09#ibcon#read 3, iclass 24, count 2 2006.229.10:03:35.09#ibcon#about to read 4, iclass 24, count 2 2006.229.10:03:35.09#ibcon#read 4, iclass 24, count 2 2006.229.10:03:35.09#ibcon#about to read 5, iclass 24, count 2 2006.229.10:03:35.09#ibcon#read 5, iclass 24, count 2 2006.229.10:03:35.09#ibcon#about to read 6, iclass 24, count 2 2006.229.10:03:35.09#ibcon#read 6, iclass 24, count 2 2006.229.10:03:35.09#ibcon#end of sib2, iclass 24, count 2 2006.229.10:03:35.09#ibcon#*after write, iclass 24, count 2 2006.229.10:03:35.09#ibcon#*before return 0, iclass 24, count 2 2006.229.10:03:35.09#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:35.09#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:35.09#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.10:03:35.09#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:35.09#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:35.21#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:35.21#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:35.21#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:03:35.21#ibcon#first serial, iclass 24, count 0 2006.229.10:03:35.21#ibcon#enter sib2, iclass 24, count 0 2006.229.10:03:35.21#ibcon#flushed, iclass 24, count 0 2006.229.10:03:35.21#ibcon#about to write, iclass 24, count 0 2006.229.10:03:35.21#ibcon#wrote, iclass 24, count 0 2006.229.10:03:35.21#ibcon#about to read 3, iclass 24, count 0 2006.229.10:03:35.23#ibcon#read 3, iclass 24, count 0 2006.229.10:03:35.23#ibcon#about to read 4, iclass 24, count 0 2006.229.10:03:35.23#ibcon#read 4, iclass 24, count 0 2006.229.10:03:35.23#ibcon#about to read 5, iclass 24, count 0 2006.229.10:03:35.23#ibcon#read 5, iclass 24, count 0 2006.229.10:03:35.23#ibcon#about to read 6, iclass 24, count 0 2006.229.10:03:35.23#ibcon#read 6, iclass 24, count 0 2006.229.10:03:35.23#ibcon#end of sib2, iclass 24, count 0 2006.229.10:03:35.23#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:03:35.23#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:03:35.23#ibcon#[25=USB\r\n] 2006.229.10:03:35.23#ibcon#*before write, iclass 24, count 0 2006.229.10:03:35.23#ibcon#enter sib2, iclass 24, count 0 2006.229.10:03:35.23#ibcon#flushed, iclass 24, count 0 2006.229.10:03:35.23#ibcon#about to write, iclass 24, count 0 2006.229.10:03:35.23#ibcon#wrote, iclass 24, count 0 2006.229.10:03:35.23#ibcon#about to read 3, iclass 24, count 0 2006.229.10:03:35.26#ibcon#read 3, iclass 24, count 0 2006.229.10:03:35.26#ibcon#about to read 4, iclass 24, count 0 2006.229.10:03:35.26#ibcon#read 4, iclass 24, count 0 2006.229.10:03:35.26#ibcon#about to read 5, iclass 24, count 0 2006.229.10:03:35.26#ibcon#read 5, iclass 24, count 0 2006.229.10:03:35.26#ibcon#about to read 6, iclass 24, count 0 2006.229.10:03:35.26#ibcon#read 6, iclass 24, count 0 2006.229.10:03:35.26#ibcon#end of sib2, iclass 24, count 0 2006.229.10:03:35.26#ibcon#*after write, iclass 24, count 0 2006.229.10:03:35.26#ibcon#*before return 0, iclass 24, count 0 2006.229.10:03:35.26#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:35.26#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:35.26#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:03:35.26#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:03:35.26$vck44/valo=7,864.99 2006.229.10:03:35.26#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.10:03:35.26#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.10:03:35.26#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:35.26#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:35.26#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:35.26#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:35.26#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:03:35.26#ibcon#first serial, iclass 26, count 0 2006.229.10:03:35.26#ibcon#enter sib2, iclass 26, count 0 2006.229.10:03:35.26#ibcon#flushed, iclass 26, count 0 2006.229.10:03:35.26#ibcon#about to write, iclass 26, count 0 2006.229.10:03:35.26#ibcon#wrote, iclass 26, count 0 2006.229.10:03:35.26#ibcon#about to read 3, iclass 26, count 0 2006.229.10:03:35.28#ibcon#read 3, iclass 26, count 0 2006.229.10:03:35.28#ibcon#about to read 4, iclass 26, count 0 2006.229.10:03:35.28#ibcon#read 4, iclass 26, count 0 2006.229.10:03:35.28#ibcon#about to read 5, iclass 26, count 0 2006.229.10:03:35.28#ibcon#read 5, iclass 26, count 0 2006.229.10:03:35.28#ibcon#about to read 6, iclass 26, count 0 2006.229.10:03:35.28#ibcon#read 6, iclass 26, count 0 2006.229.10:03:35.28#ibcon#end of sib2, iclass 26, count 0 2006.229.10:03:35.28#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:03:35.28#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:03:35.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:03:35.28#ibcon#*before write, iclass 26, count 0 2006.229.10:03:35.28#ibcon#enter sib2, iclass 26, count 0 2006.229.10:03:35.28#ibcon#flushed, iclass 26, count 0 2006.229.10:03:35.28#ibcon#about to write, iclass 26, count 0 2006.229.10:03:35.28#ibcon#wrote, iclass 26, count 0 2006.229.10:03:35.28#ibcon#about to read 3, iclass 26, count 0 2006.229.10:03:35.32#ibcon#read 3, iclass 26, count 0 2006.229.10:03:35.32#ibcon#about to read 4, iclass 26, count 0 2006.229.10:03:35.32#ibcon#read 4, iclass 26, count 0 2006.229.10:03:35.32#ibcon#about to read 5, iclass 26, count 0 2006.229.10:03:35.32#ibcon#read 5, iclass 26, count 0 2006.229.10:03:35.32#ibcon#about to read 6, iclass 26, count 0 2006.229.10:03:35.32#ibcon#read 6, iclass 26, count 0 2006.229.10:03:35.32#ibcon#end of sib2, iclass 26, count 0 2006.229.10:03:35.32#ibcon#*after write, iclass 26, count 0 2006.229.10:03:35.32#ibcon#*before return 0, iclass 26, count 0 2006.229.10:03:35.32#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:35.32#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:35.32#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:03:35.32#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:03:35.32$vck44/va=7,5 2006.229.10:03:35.32#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.10:03:35.32#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.10:03:35.32#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:35.32#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:35.38#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:35.38#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:35.38#ibcon#enter wrdev, iclass 28, count 2 2006.229.10:03:35.38#ibcon#first serial, iclass 28, count 2 2006.229.10:03:35.38#ibcon#enter sib2, iclass 28, count 2 2006.229.10:03:35.38#ibcon#flushed, iclass 28, count 2 2006.229.10:03:35.38#ibcon#about to write, iclass 28, count 2 2006.229.10:03:35.38#ibcon#wrote, iclass 28, count 2 2006.229.10:03:35.38#ibcon#about to read 3, iclass 28, count 2 2006.229.10:03:35.40#ibcon#read 3, iclass 28, count 2 2006.229.10:03:35.40#ibcon#about to read 4, iclass 28, count 2 2006.229.10:03:35.40#ibcon#read 4, iclass 28, count 2 2006.229.10:03:35.40#ibcon#about to read 5, iclass 28, count 2 2006.229.10:03:35.40#ibcon#read 5, iclass 28, count 2 2006.229.10:03:35.40#ibcon#about to read 6, iclass 28, count 2 2006.229.10:03:35.40#ibcon#read 6, iclass 28, count 2 2006.229.10:03:35.40#ibcon#end of sib2, iclass 28, count 2 2006.229.10:03:35.40#ibcon#*mode == 0, iclass 28, count 2 2006.229.10:03:35.40#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.10:03:35.40#ibcon#[25=AT07-05\r\n] 2006.229.10:03:35.40#ibcon#*before write, iclass 28, count 2 2006.229.10:03:35.40#ibcon#enter sib2, iclass 28, count 2 2006.229.10:03:35.40#ibcon#flushed, iclass 28, count 2 2006.229.10:03:35.40#ibcon#about to write, iclass 28, count 2 2006.229.10:03:35.40#ibcon#wrote, iclass 28, count 2 2006.229.10:03:35.40#ibcon#about to read 3, iclass 28, count 2 2006.229.10:03:35.43#ibcon#read 3, iclass 28, count 2 2006.229.10:03:35.43#ibcon#about to read 4, iclass 28, count 2 2006.229.10:03:35.43#ibcon#read 4, iclass 28, count 2 2006.229.10:03:35.43#ibcon#about to read 5, iclass 28, count 2 2006.229.10:03:35.43#ibcon#read 5, iclass 28, count 2 2006.229.10:03:35.43#ibcon#about to read 6, iclass 28, count 2 2006.229.10:03:35.43#ibcon#read 6, iclass 28, count 2 2006.229.10:03:35.43#ibcon#end of sib2, iclass 28, count 2 2006.229.10:03:35.43#ibcon#*after write, iclass 28, count 2 2006.229.10:03:35.43#ibcon#*before return 0, iclass 28, count 2 2006.229.10:03:35.43#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:35.43#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:35.43#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.10:03:35.43#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:35.43#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:35.55#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:35.55#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:35.55#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:03:35.55#ibcon#first serial, iclass 28, count 0 2006.229.10:03:35.55#ibcon#enter sib2, iclass 28, count 0 2006.229.10:03:35.55#ibcon#flushed, iclass 28, count 0 2006.229.10:03:35.55#ibcon#about to write, iclass 28, count 0 2006.229.10:03:35.55#ibcon#wrote, iclass 28, count 0 2006.229.10:03:35.55#ibcon#about to read 3, iclass 28, count 0 2006.229.10:03:35.57#ibcon#read 3, iclass 28, count 0 2006.229.10:03:35.57#ibcon#about to read 4, iclass 28, count 0 2006.229.10:03:35.57#ibcon#read 4, iclass 28, count 0 2006.229.10:03:35.57#ibcon#about to read 5, iclass 28, count 0 2006.229.10:03:35.57#ibcon#read 5, iclass 28, count 0 2006.229.10:03:35.57#ibcon#about to read 6, iclass 28, count 0 2006.229.10:03:35.57#ibcon#read 6, iclass 28, count 0 2006.229.10:03:35.57#ibcon#end of sib2, iclass 28, count 0 2006.229.10:03:35.57#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:03:35.57#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:03:35.57#ibcon#[25=USB\r\n] 2006.229.10:03:35.57#ibcon#*before write, iclass 28, count 0 2006.229.10:03:35.57#ibcon#enter sib2, iclass 28, count 0 2006.229.10:03:35.57#ibcon#flushed, iclass 28, count 0 2006.229.10:03:35.57#ibcon#about to write, iclass 28, count 0 2006.229.10:03:35.57#ibcon#wrote, iclass 28, count 0 2006.229.10:03:35.57#ibcon#about to read 3, iclass 28, count 0 2006.229.10:03:35.60#ibcon#read 3, iclass 28, count 0 2006.229.10:03:35.60#ibcon#about to read 4, iclass 28, count 0 2006.229.10:03:35.60#ibcon#read 4, iclass 28, count 0 2006.229.10:03:35.60#ibcon#about to read 5, iclass 28, count 0 2006.229.10:03:35.60#ibcon#read 5, iclass 28, count 0 2006.229.10:03:35.60#ibcon#about to read 6, iclass 28, count 0 2006.229.10:03:35.60#ibcon#read 6, iclass 28, count 0 2006.229.10:03:35.60#ibcon#end of sib2, iclass 28, count 0 2006.229.10:03:35.60#ibcon#*after write, iclass 28, count 0 2006.229.10:03:35.60#ibcon#*before return 0, iclass 28, count 0 2006.229.10:03:35.60#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:35.60#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:35.60#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:03:35.60#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:03:35.60$vck44/valo=8,884.99 2006.229.10:03:35.60#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:03:35.60#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:03:35.60#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:35.60#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:35.60#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:35.60#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:35.60#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:03:35.60#ibcon#first serial, iclass 30, count 0 2006.229.10:03:35.60#ibcon#enter sib2, iclass 30, count 0 2006.229.10:03:35.60#ibcon#flushed, iclass 30, count 0 2006.229.10:03:35.60#ibcon#about to write, iclass 30, count 0 2006.229.10:03:35.60#ibcon#wrote, iclass 30, count 0 2006.229.10:03:35.60#ibcon#about to read 3, iclass 30, count 0 2006.229.10:03:35.62#ibcon#read 3, iclass 30, count 0 2006.229.10:03:35.62#ibcon#about to read 4, iclass 30, count 0 2006.229.10:03:35.62#ibcon#read 4, iclass 30, count 0 2006.229.10:03:35.62#ibcon#about to read 5, iclass 30, count 0 2006.229.10:03:35.62#ibcon#read 5, iclass 30, count 0 2006.229.10:03:35.62#ibcon#about to read 6, iclass 30, count 0 2006.229.10:03:35.62#ibcon#read 6, iclass 30, count 0 2006.229.10:03:35.62#ibcon#end of sib2, iclass 30, count 0 2006.229.10:03:35.62#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:03:35.62#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:03:35.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:03:35.62#ibcon#*before write, iclass 30, count 0 2006.229.10:03:35.62#ibcon#enter sib2, iclass 30, count 0 2006.229.10:03:35.62#ibcon#flushed, iclass 30, count 0 2006.229.10:03:35.62#ibcon#about to write, iclass 30, count 0 2006.229.10:03:35.62#ibcon#wrote, iclass 30, count 0 2006.229.10:03:35.62#ibcon#about to read 3, iclass 30, count 0 2006.229.10:03:35.66#ibcon#read 3, iclass 30, count 0 2006.229.10:03:35.66#ibcon#about to read 4, iclass 30, count 0 2006.229.10:03:35.66#ibcon#read 4, iclass 30, count 0 2006.229.10:03:35.66#ibcon#about to read 5, iclass 30, count 0 2006.229.10:03:35.66#ibcon#read 5, iclass 30, count 0 2006.229.10:03:35.66#ibcon#about to read 6, iclass 30, count 0 2006.229.10:03:35.66#ibcon#read 6, iclass 30, count 0 2006.229.10:03:35.66#ibcon#end of sib2, iclass 30, count 0 2006.229.10:03:35.66#ibcon#*after write, iclass 30, count 0 2006.229.10:03:35.66#ibcon#*before return 0, iclass 30, count 0 2006.229.10:03:35.66#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:35.66#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:35.66#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:03:35.66#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:03:35.66$vck44/va=8,6 2006.229.10:03:35.66#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.10:03:35.66#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.10:03:35.66#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:35.66#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:35.72#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:35.72#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:35.72#ibcon#enter wrdev, iclass 32, count 2 2006.229.10:03:35.72#ibcon#first serial, iclass 32, count 2 2006.229.10:03:35.72#ibcon#enter sib2, iclass 32, count 2 2006.229.10:03:35.72#ibcon#flushed, iclass 32, count 2 2006.229.10:03:35.72#ibcon#about to write, iclass 32, count 2 2006.229.10:03:35.72#ibcon#wrote, iclass 32, count 2 2006.229.10:03:35.72#ibcon#about to read 3, iclass 32, count 2 2006.229.10:03:35.74#ibcon#read 3, iclass 32, count 2 2006.229.10:03:35.74#ibcon#about to read 4, iclass 32, count 2 2006.229.10:03:35.74#ibcon#read 4, iclass 32, count 2 2006.229.10:03:35.74#ibcon#about to read 5, iclass 32, count 2 2006.229.10:03:35.74#ibcon#read 5, iclass 32, count 2 2006.229.10:03:35.74#ibcon#about to read 6, iclass 32, count 2 2006.229.10:03:35.74#ibcon#read 6, iclass 32, count 2 2006.229.10:03:35.74#ibcon#end of sib2, iclass 32, count 2 2006.229.10:03:35.74#ibcon#*mode == 0, iclass 32, count 2 2006.229.10:03:35.74#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.10:03:35.74#ibcon#[25=AT08-06\r\n] 2006.229.10:03:35.74#ibcon#*before write, iclass 32, count 2 2006.229.10:03:35.74#ibcon#enter sib2, iclass 32, count 2 2006.229.10:03:35.74#ibcon#flushed, iclass 32, count 2 2006.229.10:03:35.74#ibcon#about to write, iclass 32, count 2 2006.229.10:03:35.74#ibcon#wrote, iclass 32, count 2 2006.229.10:03:35.74#ibcon#about to read 3, iclass 32, count 2 2006.229.10:03:35.77#ibcon#read 3, iclass 32, count 2 2006.229.10:03:35.77#ibcon#about to read 4, iclass 32, count 2 2006.229.10:03:35.77#ibcon#read 4, iclass 32, count 2 2006.229.10:03:35.77#ibcon#about to read 5, iclass 32, count 2 2006.229.10:03:35.77#ibcon#read 5, iclass 32, count 2 2006.229.10:03:35.77#ibcon#about to read 6, iclass 32, count 2 2006.229.10:03:35.77#ibcon#read 6, iclass 32, count 2 2006.229.10:03:35.77#ibcon#end of sib2, iclass 32, count 2 2006.229.10:03:35.77#ibcon#*after write, iclass 32, count 2 2006.229.10:03:35.77#ibcon#*before return 0, iclass 32, count 2 2006.229.10:03:35.77#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:35.77#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:35.77#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.10:03:35.77#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:35.77#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:35.89#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:35.89#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:35.89#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:03:35.89#ibcon#first serial, iclass 32, count 0 2006.229.10:03:35.89#ibcon#enter sib2, iclass 32, count 0 2006.229.10:03:35.89#ibcon#flushed, iclass 32, count 0 2006.229.10:03:35.89#ibcon#about to write, iclass 32, count 0 2006.229.10:03:35.89#ibcon#wrote, iclass 32, count 0 2006.229.10:03:35.89#ibcon#about to read 3, iclass 32, count 0 2006.229.10:03:35.91#ibcon#read 3, iclass 32, count 0 2006.229.10:03:35.91#ibcon#about to read 4, iclass 32, count 0 2006.229.10:03:35.91#ibcon#read 4, iclass 32, count 0 2006.229.10:03:35.91#ibcon#about to read 5, iclass 32, count 0 2006.229.10:03:35.91#ibcon#read 5, iclass 32, count 0 2006.229.10:03:35.91#ibcon#about to read 6, iclass 32, count 0 2006.229.10:03:35.91#ibcon#read 6, iclass 32, count 0 2006.229.10:03:35.91#ibcon#end of sib2, iclass 32, count 0 2006.229.10:03:35.91#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:03:35.91#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:03:35.91#ibcon#[25=USB\r\n] 2006.229.10:03:35.91#ibcon#*before write, iclass 32, count 0 2006.229.10:03:35.91#ibcon#enter sib2, iclass 32, count 0 2006.229.10:03:35.91#ibcon#flushed, iclass 32, count 0 2006.229.10:03:35.91#ibcon#about to write, iclass 32, count 0 2006.229.10:03:35.91#ibcon#wrote, iclass 32, count 0 2006.229.10:03:35.91#ibcon#about to read 3, iclass 32, count 0 2006.229.10:03:35.94#ibcon#read 3, iclass 32, count 0 2006.229.10:03:35.94#ibcon#about to read 4, iclass 32, count 0 2006.229.10:03:35.94#ibcon#read 4, iclass 32, count 0 2006.229.10:03:35.94#ibcon#about to read 5, iclass 32, count 0 2006.229.10:03:35.94#ibcon#read 5, iclass 32, count 0 2006.229.10:03:35.94#ibcon#about to read 6, iclass 32, count 0 2006.229.10:03:35.94#ibcon#read 6, iclass 32, count 0 2006.229.10:03:35.94#ibcon#end of sib2, iclass 32, count 0 2006.229.10:03:35.94#ibcon#*after write, iclass 32, count 0 2006.229.10:03:35.94#ibcon#*before return 0, iclass 32, count 0 2006.229.10:03:35.94#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:35.94#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:35.94#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:03:35.94#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:03:35.94$vck44/vblo=1,629.99 2006.229.10:03:35.94#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.10:03:35.94#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.10:03:35.94#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:35.94#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:35.94#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:35.94#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:35.94#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:03:35.94#ibcon#first serial, iclass 34, count 0 2006.229.10:03:35.94#ibcon#enter sib2, iclass 34, count 0 2006.229.10:03:35.94#ibcon#flushed, iclass 34, count 0 2006.229.10:03:35.94#ibcon#about to write, iclass 34, count 0 2006.229.10:03:35.94#ibcon#wrote, iclass 34, count 0 2006.229.10:03:35.94#ibcon#about to read 3, iclass 34, count 0 2006.229.10:03:35.96#ibcon#read 3, iclass 34, count 0 2006.229.10:03:35.96#ibcon#about to read 4, iclass 34, count 0 2006.229.10:03:35.96#ibcon#read 4, iclass 34, count 0 2006.229.10:03:35.96#ibcon#about to read 5, iclass 34, count 0 2006.229.10:03:35.96#ibcon#read 5, iclass 34, count 0 2006.229.10:03:35.96#ibcon#about to read 6, iclass 34, count 0 2006.229.10:03:35.96#ibcon#read 6, iclass 34, count 0 2006.229.10:03:35.96#ibcon#end of sib2, iclass 34, count 0 2006.229.10:03:35.96#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:03:35.96#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:03:35.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:03:35.96#ibcon#*before write, iclass 34, count 0 2006.229.10:03:35.96#ibcon#enter sib2, iclass 34, count 0 2006.229.10:03:35.96#ibcon#flushed, iclass 34, count 0 2006.229.10:03:35.96#ibcon#about to write, iclass 34, count 0 2006.229.10:03:35.96#ibcon#wrote, iclass 34, count 0 2006.229.10:03:35.96#ibcon#about to read 3, iclass 34, count 0 2006.229.10:03:36.00#ibcon#read 3, iclass 34, count 0 2006.229.10:03:36.00#ibcon#about to read 4, iclass 34, count 0 2006.229.10:03:36.00#ibcon#read 4, iclass 34, count 0 2006.229.10:03:36.00#ibcon#about to read 5, iclass 34, count 0 2006.229.10:03:36.00#ibcon#read 5, iclass 34, count 0 2006.229.10:03:36.00#ibcon#about to read 6, iclass 34, count 0 2006.229.10:03:36.00#ibcon#read 6, iclass 34, count 0 2006.229.10:03:36.00#ibcon#end of sib2, iclass 34, count 0 2006.229.10:03:36.00#ibcon#*after write, iclass 34, count 0 2006.229.10:03:36.00#ibcon#*before return 0, iclass 34, count 0 2006.229.10:03:36.00#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:36.00#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:36.00#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:03:36.00#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:03:36.00$vck44/vb=1,4 2006.229.10:03:36.00#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.10:03:36.00#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.10:03:36.00#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:36.00#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:03:36.00#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:03:36.00#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:03:36.00#ibcon#enter wrdev, iclass 36, count 2 2006.229.10:03:36.00#ibcon#first serial, iclass 36, count 2 2006.229.10:03:36.00#ibcon#enter sib2, iclass 36, count 2 2006.229.10:03:36.00#ibcon#flushed, iclass 36, count 2 2006.229.10:03:36.00#ibcon#about to write, iclass 36, count 2 2006.229.10:03:36.00#ibcon#wrote, iclass 36, count 2 2006.229.10:03:36.00#ibcon#about to read 3, iclass 36, count 2 2006.229.10:03:36.02#ibcon#read 3, iclass 36, count 2 2006.229.10:03:36.02#ibcon#about to read 4, iclass 36, count 2 2006.229.10:03:36.02#ibcon#read 4, iclass 36, count 2 2006.229.10:03:36.02#ibcon#about to read 5, iclass 36, count 2 2006.229.10:03:36.02#ibcon#read 5, iclass 36, count 2 2006.229.10:03:36.02#ibcon#about to read 6, iclass 36, count 2 2006.229.10:03:36.02#ibcon#read 6, iclass 36, count 2 2006.229.10:03:36.02#ibcon#end of sib2, iclass 36, count 2 2006.229.10:03:36.02#ibcon#*mode == 0, iclass 36, count 2 2006.229.10:03:36.02#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.10:03:36.02#ibcon#[27=AT01-04\r\n] 2006.229.10:03:36.02#ibcon#*before write, iclass 36, count 2 2006.229.10:03:36.02#ibcon#enter sib2, iclass 36, count 2 2006.229.10:03:36.02#ibcon#flushed, iclass 36, count 2 2006.229.10:03:36.02#ibcon#about to write, iclass 36, count 2 2006.229.10:03:36.02#ibcon#wrote, iclass 36, count 2 2006.229.10:03:36.02#ibcon#about to read 3, iclass 36, count 2 2006.229.10:03:36.05#ibcon#read 3, iclass 36, count 2 2006.229.10:03:36.05#ibcon#about to read 4, iclass 36, count 2 2006.229.10:03:36.05#ibcon#read 4, iclass 36, count 2 2006.229.10:03:36.05#ibcon#about to read 5, iclass 36, count 2 2006.229.10:03:36.05#ibcon#read 5, iclass 36, count 2 2006.229.10:03:36.05#ibcon#about to read 6, iclass 36, count 2 2006.229.10:03:36.05#ibcon#read 6, iclass 36, count 2 2006.229.10:03:36.05#ibcon#end of sib2, iclass 36, count 2 2006.229.10:03:36.05#ibcon#*after write, iclass 36, count 2 2006.229.10:03:36.05#ibcon#*before return 0, iclass 36, count 2 2006.229.10:03:36.05#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:03:36.05#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:03:36.05#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.10:03:36.05#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:36.05#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:03:36.17#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:03:36.17#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:03:36.17#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:03:36.17#ibcon#first serial, iclass 36, count 0 2006.229.10:03:36.17#ibcon#enter sib2, iclass 36, count 0 2006.229.10:03:36.17#ibcon#flushed, iclass 36, count 0 2006.229.10:03:36.17#ibcon#about to write, iclass 36, count 0 2006.229.10:03:36.17#ibcon#wrote, iclass 36, count 0 2006.229.10:03:36.17#ibcon#about to read 3, iclass 36, count 0 2006.229.10:03:36.19#ibcon#read 3, iclass 36, count 0 2006.229.10:03:36.19#ibcon#about to read 4, iclass 36, count 0 2006.229.10:03:36.19#ibcon#read 4, iclass 36, count 0 2006.229.10:03:36.19#ibcon#about to read 5, iclass 36, count 0 2006.229.10:03:36.19#ibcon#read 5, iclass 36, count 0 2006.229.10:03:36.19#ibcon#about to read 6, iclass 36, count 0 2006.229.10:03:36.19#ibcon#read 6, iclass 36, count 0 2006.229.10:03:36.19#ibcon#end of sib2, iclass 36, count 0 2006.229.10:03:36.19#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:03:36.19#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:03:36.19#ibcon#[27=USB\r\n] 2006.229.10:03:36.19#ibcon#*before write, iclass 36, count 0 2006.229.10:03:36.19#ibcon#enter sib2, iclass 36, count 0 2006.229.10:03:36.19#ibcon#flushed, iclass 36, count 0 2006.229.10:03:36.19#ibcon#about to write, iclass 36, count 0 2006.229.10:03:36.19#ibcon#wrote, iclass 36, count 0 2006.229.10:03:36.19#ibcon#about to read 3, iclass 36, count 0 2006.229.10:03:36.22#ibcon#read 3, iclass 36, count 0 2006.229.10:03:36.22#ibcon#about to read 4, iclass 36, count 0 2006.229.10:03:36.22#ibcon#read 4, iclass 36, count 0 2006.229.10:03:36.22#ibcon#about to read 5, iclass 36, count 0 2006.229.10:03:36.22#ibcon#read 5, iclass 36, count 0 2006.229.10:03:36.22#ibcon#about to read 6, iclass 36, count 0 2006.229.10:03:36.22#ibcon#read 6, iclass 36, count 0 2006.229.10:03:36.22#ibcon#end of sib2, iclass 36, count 0 2006.229.10:03:36.22#ibcon#*after write, iclass 36, count 0 2006.229.10:03:36.22#ibcon#*before return 0, iclass 36, count 0 2006.229.10:03:36.22#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:03:36.22#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:03:36.22#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:03:36.22#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:03:36.22$vck44/vblo=2,634.99 2006.229.10:03:36.22#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:03:36.22#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:03:36.22#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:36.22#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:36.22#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:36.22#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:36.22#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:03:36.22#ibcon#first serial, iclass 38, count 0 2006.229.10:03:36.22#ibcon#enter sib2, iclass 38, count 0 2006.229.10:03:36.22#ibcon#flushed, iclass 38, count 0 2006.229.10:03:36.22#ibcon#about to write, iclass 38, count 0 2006.229.10:03:36.22#ibcon#wrote, iclass 38, count 0 2006.229.10:03:36.22#ibcon#about to read 3, iclass 38, count 0 2006.229.10:03:36.24#ibcon#read 3, iclass 38, count 0 2006.229.10:03:36.24#ibcon#about to read 4, iclass 38, count 0 2006.229.10:03:36.24#ibcon#read 4, iclass 38, count 0 2006.229.10:03:36.24#ibcon#about to read 5, iclass 38, count 0 2006.229.10:03:36.24#ibcon#read 5, iclass 38, count 0 2006.229.10:03:36.24#ibcon#about to read 6, iclass 38, count 0 2006.229.10:03:36.24#ibcon#read 6, iclass 38, count 0 2006.229.10:03:36.24#ibcon#end of sib2, iclass 38, count 0 2006.229.10:03:36.24#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:03:36.24#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:03:36.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:03:36.24#ibcon#*before write, iclass 38, count 0 2006.229.10:03:36.24#ibcon#enter sib2, iclass 38, count 0 2006.229.10:03:36.24#ibcon#flushed, iclass 38, count 0 2006.229.10:03:36.24#ibcon#about to write, iclass 38, count 0 2006.229.10:03:36.24#ibcon#wrote, iclass 38, count 0 2006.229.10:03:36.24#ibcon#about to read 3, iclass 38, count 0 2006.229.10:03:36.28#abcon#<5=/05 1.8 3.2 28.71 981001.2\r\n> 2006.229.10:03:36.28#ibcon#read 3, iclass 38, count 0 2006.229.10:03:36.28#ibcon#about to read 4, iclass 38, count 0 2006.229.10:03:36.28#ibcon#read 4, iclass 38, count 0 2006.229.10:03:36.28#ibcon#about to read 5, iclass 38, count 0 2006.229.10:03:36.28#ibcon#read 5, iclass 38, count 0 2006.229.10:03:36.28#ibcon#about to read 6, iclass 38, count 0 2006.229.10:03:36.28#ibcon#read 6, iclass 38, count 0 2006.229.10:03:36.28#ibcon#end of sib2, iclass 38, count 0 2006.229.10:03:36.28#ibcon#*after write, iclass 38, count 0 2006.229.10:03:36.28#ibcon#*before return 0, iclass 38, count 0 2006.229.10:03:36.28#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:36.28#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:03:36.28#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:03:36.28#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:03:36.28$vck44/vb=2,4 2006.229.10:03:36.28#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.10:03:36.28#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.10:03:36.28#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:36.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:03:36.30#abcon#{5=INTERFACE CLEAR} 2006.229.10:03:36.34#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:03:36.34#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:03:36.34#ibcon#enter wrdev, iclass 5, count 2 2006.229.10:03:36.34#ibcon#first serial, iclass 5, count 2 2006.229.10:03:36.34#ibcon#enter sib2, iclass 5, count 2 2006.229.10:03:36.34#ibcon#flushed, iclass 5, count 2 2006.229.10:03:36.34#ibcon#about to write, iclass 5, count 2 2006.229.10:03:36.34#ibcon#wrote, iclass 5, count 2 2006.229.10:03:36.34#ibcon#about to read 3, iclass 5, count 2 2006.229.10:03:36.36#ibcon#read 3, iclass 5, count 2 2006.229.10:03:36.36#ibcon#about to read 4, iclass 5, count 2 2006.229.10:03:36.36#ibcon#read 4, iclass 5, count 2 2006.229.10:03:36.36#ibcon#about to read 5, iclass 5, count 2 2006.229.10:03:36.36#ibcon#read 5, iclass 5, count 2 2006.229.10:03:36.36#ibcon#about to read 6, iclass 5, count 2 2006.229.10:03:36.36#ibcon#read 6, iclass 5, count 2 2006.229.10:03:36.36#ibcon#end of sib2, iclass 5, count 2 2006.229.10:03:36.36#ibcon#*mode == 0, iclass 5, count 2 2006.229.10:03:36.36#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.10:03:36.36#ibcon#[27=AT02-04\r\n] 2006.229.10:03:36.36#ibcon#*before write, iclass 5, count 2 2006.229.10:03:36.36#ibcon#enter sib2, iclass 5, count 2 2006.229.10:03:36.36#ibcon#flushed, iclass 5, count 2 2006.229.10:03:36.36#ibcon#about to write, iclass 5, count 2 2006.229.10:03:36.36#ibcon#wrote, iclass 5, count 2 2006.229.10:03:36.36#ibcon#about to read 3, iclass 5, count 2 2006.229.10:03:36.36#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:03:36.39#ibcon#read 3, iclass 5, count 2 2006.229.10:03:36.39#ibcon#about to read 4, iclass 5, count 2 2006.229.10:03:36.39#ibcon#read 4, iclass 5, count 2 2006.229.10:03:36.39#ibcon#about to read 5, iclass 5, count 2 2006.229.10:03:36.39#ibcon#read 5, iclass 5, count 2 2006.229.10:03:36.39#ibcon#about to read 6, iclass 5, count 2 2006.229.10:03:36.39#ibcon#read 6, iclass 5, count 2 2006.229.10:03:36.39#ibcon#end of sib2, iclass 5, count 2 2006.229.10:03:36.39#ibcon#*after write, iclass 5, count 2 2006.229.10:03:36.39#ibcon#*before return 0, iclass 5, count 2 2006.229.10:03:36.39#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:03:36.39#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:03:36.39#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.10:03:36.39#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:36.39#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:03:36.51#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:03:36.51#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:03:36.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:03:36.51#ibcon#first serial, iclass 5, count 0 2006.229.10:03:36.51#ibcon#enter sib2, iclass 5, count 0 2006.229.10:03:36.51#ibcon#flushed, iclass 5, count 0 2006.229.10:03:36.51#ibcon#about to write, iclass 5, count 0 2006.229.10:03:36.51#ibcon#wrote, iclass 5, count 0 2006.229.10:03:36.51#ibcon#about to read 3, iclass 5, count 0 2006.229.10:03:36.53#ibcon#read 3, iclass 5, count 0 2006.229.10:03:36.53#ibcon#about to read 4, iclass 5, count 0 2006.229.10:03:36.53#ibcon#read 4, iclass 5, count 0 2006.229.10:03:36.53#ibcon#about to read 5, iclass 5, count 0 2006.229.10:03:36.53#ibcon#read 5, iclass 5, count 0 2006.229.10:03:36.53#ibcon#about to read 6, iclass 5, count 0 2006.229.10:03:36.53#ibcon#read 6, iclass 5, count 0 2006.229.10:03:36.53#ibcon#end of sib2, iclass 5, count 0 2006.229.10:03:36.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:03:36.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:03:36.53#ibcon#[27=USB\r\n] 2006.229.10:03:36.53#ibcon#*before write, iclass 5, count 0 2006.229.10:03:36.53#ibcon#enter sib2, iclass 5, count 0 2006.229.10:03:36.53#ibcon#flushed, iclass 5, count 0 2006.229.10:03:36.53#ibcon#about to write, iclass 5, count 0 2006.229.10:03:36.53#ibcon#wrote, iclass 5, count 0 2006.229.10:03:36.53#ibcon#about to read 3, iclass 5, count 0 2006.229.10:03:36.56#ibcon#read 3, iclass 5, count 0 2006.229.10:03:36.56#ibcon#about to read 4, iclass 5, count 0 2006.229.10:03:36.56#ibcon#read 4, iclass 5, count 0 2006.229.10:03:36.56#ibcon#about to read 5, iclass 5, count 0 2006.229.10:03:36.56#ibcon#read 5, iclass 5, count 0 2006.229.10:03:36.56#ibcon#about to read 6, iclass 5, count 0 2006.229.10:03:36.56#ibcon#read 6, iclass 5, count 0 2006.229.10:03:36.56#ibcon#end of sib2, iclass 5, count 0 2006.229.10:03:36.56#ibcon#*after write, iclass 5, count 0 2006.229.10:03:36.56#ibcon#*before return 0, iclass 5, count 0 2006.229.10:03:36.56#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:03:36.56#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:03:36.56#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:03:36.56#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:03:36.56$vck44/vblo=3,649.99 2006.229.10:03:36.56#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.10:03:36.56#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.10:03:36.56#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:36.56#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:36.56#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:36.56#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:36.56#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:03:36.56#ibcon#first serial, iclass 10, count 0 2006.229.10:03:36.56#ibcon#enter sib2, iclass 10, count 0 2006.229.10:03:36.56#ibcon#flushed, iclass 10, count 0 2006.229.10:03:36.56#ibcon#about to write, iclass 10, count 0 2006.229.10:03:36.56#ibcon#wrote, iclass 10, count 0 2006.229.10:03:36.56#ibcon#about to read 3, iclass 10, count 0 2006.229.10:03:36.58#ibcon#read 3, iclass 10, count 0 2006.229.10:03:36.58#ibcon#about to read 4, iclass 10, count 0 2006.229.10:03:36.58#ibcon#read 4, iclass 10, count 0 2006.229.10:03:36.58#ibcon#about to read 5, iclass 10, count 0 2006.229.10:03:36.58#ibcon#read 5, iclass 10, count 0 2006.229.10:03:36.58#ibcon#about to read 6, iclass 10, count 0 2006.229.10:03:36.58#ibcon#read 6, iclass 10, count 0 2006.229.10:03:36.58#ibcon#end of sib2, iclass 10, count 0 2006.229.10:03:36.58#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:03:36.58#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:03:36.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:03:36.58#ibcon#*before write, iclass 10, count 0 2006.229.10:03:36.58#ibcon#enter sib2, iclass 10, count 0 2006.229.10:03:36.58#ibcon#flushed, iclass 10, count 0 2006.229.10:03:36.58#ibcon#about to write, iclass 10, count 0 2006.229.10:03:36.58#ibcon#wrote, iclass 10, count 0 2006.229.10:03:36.58#ibcon#about to read 3, iclass 10, count 0 2006.229.10:03:36.62#ibcon#read 3, iclass 10, count 0 2006.229.10:03:36.62#ibcon#about to read 4, iclass 10, count 0 2006.229.10:03:36.62#ibcon#read 4, iclass 10, count 0 2006.229.10:03:36.62#ibcon#about to read 5, iclass 10, count 0 2006.229.10:03:36.62#ibcon#read 5, iclass 10, count 0 2006.229.10:03:36.62#ibcon#about to read 6, iclass 10, count 0 2006.229.10:03:36.62#ibcon#read 6, iclass 10, count 0 2006.229.10:03:36.62#ibcon#end of sib2, iclass 10, count 0 2006.229.10:03:36.62#ibcon#*after write, iclass 10, count 0 2006.229.10:03:36.62#ibcon#*before return 0, iclass 10, count 0 2006.229.10:03:36.62#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:36.62#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:03:36.62#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:03:36.62#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:03:36.62$vck44/vb=3,4 2006.229.10:03:36.62#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.10:03:36.62#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.10:03:36.62#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:36.62#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:36.68#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:36.68#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:36.68#ibcon#enter wrdev, iclass 12, count 2 2006.229.10:03:36.68#ibcon#first serial, iclass 12, count 2 2006.229.10:03:36.68#ibcon#enter sib2, iclass 12, count 2 2006.229.10:03:36.68#ibcon#flushed, iclass 12, count 2 2006.229.10:03:36.68#ibcon#about to write, iclass 12, count 2 2006.229.10:03:36.68#ibcon#wrote, iclass 12, count 2 2006.229.10:03:36.68#ibcon#about to read 3, iclass 12, count 2 2006.229.10:03:36.70#ibcon#read 3, iclass 12, count 2 2006.229.10:03:36.70#ibcon#about to read 4, iclass 12, count 2 2006.229.10:03:36.70#ibcon#read 4, iclass 12, count 2 2006.229.10:03:36.70#ibcon#about to read 5, iclass 12, count 2 2006.229.10:03:36.70#ibcon#read 5, iclass 12, count 2 2006.229.10:03:36.70#ibcon#about to read 6, iclass 12, count 2 2006.229.10:03:36.70#ibcon#read 6, iclass 12, count 2 2006.229.10:03:36.70#ibcon#end of sib2, iclass 12, count 2 2006.229.10:03:36.70#ibcon#*mode == 0, iclass 12, count 2 2006.229.10:03:36.70#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.10:03:36.70#ibcon#[27=AT03-04\r\n] 2006.229.10:03:36.70#ibcon#*before write, iclass 12, count 2 2006.229.10:03:36.70#ibcon#enter sib2, iclass 12, count 2 2006.229.10:03:36.70#ibcon#flushed, iclass 12, count 2 2006.229.10:03:36.70#ibcon#about to write, iclass 12, count 2 2006.229.10:03:36.70#ibcon#wrote, iclass 12, count 2 2006.229.10:03:36.70#ibcon#about to read 3, iclass 12, count 2 2006.229.10:03:36.73#ibcon#read 3, iclass 12, count 2 2006.229.10:03:36.73#ibcon#about to read 4, iclass 12, count 2 2006.229.10:03:36.73#ibcon#read 4, iclass 12, count 2 2006.229.10:03:36.73#ibcon#about to read 5, iclass 12, count 2 2006.229.10:03:36.73#ibcon#read 5, iclass 12, count 2 2006.229.10:03:36.73#ibcon#about to read 6, iclass 12, count 2 2006.229.10:03:36.73#ibcon#read 6, iclass 12, count 2 2006.229.10:03:36.73#ibcon#end of sib2, iclass 12, count 2 2006.229.10:03:36.73#ibcon#*after write, iclass 12, count 2 2006.229.10:03:36.73#ibcon#*before return 0, iclass 12, count 2 2006.229.10:03:36.73#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:36.73#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:03:36.73#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.10:03:36.73#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:36.73#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:36.85#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:36.85#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:36.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:03:36.85#ibcon#first serial, iclass 12, count 0 2006.229.10:03:36.85#ibcon#enter sib2, iclass 12, count 0 2006.229.10:03:36.85#ibcon#flushed, iclass 12, count 0 2006.229.10:03:36.85#ibcon#about to write, iclass 12, count 0 2006.229.10:03:36.85#ibcon#wrote, iclass 12, count 0 2006.229.10:03:36.85#ibcon#about to read 3, iclass 12, count 0 2006.229.10:03:36.87#ibcon#read 3, iclass 12, count 0 2006.229.10:03:36.87#ibcon#about to read 4, iclass 12, count 0 2006.229.10:03:36.87#ibcon#read 4, iclass 12, count 0 2006.229.10:03:36.87#ibcon#about to read 5, iclass 12, count 0 2006.229.10:03:36.87#ibcon#read 5, iclass 12, count 0 2006.229.10:03:36.87#ibcon#about to read 6, iclass 12, count 0 2006.229.10:03:36.87#ibcon#read 6, iclass 12, count 0 2006.229.10:03:36.87#ibcon#end of sib2, iclass 12, count 0 2006.229.10:03:36.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:03:36.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:03:36.87#ibcon#[27=USB\r\n] 2006.229.10:03:36.87#ibcon#*before write, iclass 12, count 0 2006.229.10:03:36.87#ibcon#enter sib2, iclass 12, count 0 2006.229.10:03:36.87#ibcon#flushed, iclass 12, count 0 2006.229.10:03:36.87#ibcon#about to write, iclass 12, count 0 2006.229.10:03:36.87#ibcon#wrote, iclass 12, count 0 2006.229.10:03:36.87#ibcon#about to read 3, iclass 12, count 0 2006.229.10:03:36.90#ibcon#read 3, iclass 12, count 0 2006.229.10:03:36.90#ibcon#about to read 4, iclass 12, count 0 2006.229.10:03:36.90#ibcon#read 4, iclass 12, count 0 2006.229.10:03:36.90#ibcon#about to read 5, iclass 12, count 0 2006.229.10:03:36.90#ibcon#read 5, iclass 12, count 0 2006.229.10:03:36.90#ibcon#about to read 6, iclass 12, count 0 2006.229.10:03:36.90#ibcon#read 6, iclass 12, count 0 2006.229.10:03:36.90#ibcon#end of sib2, iclass 12, count 0 2006.229.10:03:36.90#ibcon#*after write, iclass 12, count 0 2006.229.10:03:36.90#ibcon#*before return 0, iclass 12, count 0 2006.229.10:03:36.90#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:36.90#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:03:36.90#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:03:36.90#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:03:36.90$vck44/vblo=4,679.99 2006.229.10:03:36.90#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.10:03:36.90#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.10:03:36.90#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:36.90#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:36.90#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:36.90#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:36.90#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:03:36.90#ibcon#first serial, iclass 14, count 0 2006.229.10:03:36.90#ibcon#enter sib2, iclass 14, count 0 2006.229.10:03:36.90#ibcon#flushed, iclass 14, count 0 2006.229.10:03:36.90#ibcon#about to write, iclass 14, count 0 2006.229.10:03:36.90#ibcon#wrote, iclass 14, count 0 2006.229.10:03:36.90#ibcon#about to read 3, iclass 14, count 0 2006.229.10:03:36.92#ibcon#read 3, iclass 14, count 0 2006.229.10:03:36.92#ibcon#about to read 4, iclass 14, count 0 2006.229.10:03:36.92#ibcon#read 4, iclass 14, count 0 2006.229.10:03:36.92#ibcon#about to read 5, iclass 14, count 0 2006.229.10:03:36.92#ibcon#read 5, iclass 14, count 0 2006.229.10:03:36.92#ibcon#about to read 6, iclass 14, count 0 2006.229.10:03:36.92#ibcon#read 6, iclass 14, count 0 2006.229.10:03:36.92#ibcon#end of sib2, iclass 14, count 0 2006.229.10:03:36.92#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:03:36.92#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:03:36.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:03:36.92#ibcon#*before write, iclass 14, count 0 2006.229.10:03:36.92#ibcon#enter sib2, iclass 14, count 0 2006.229.10:03:36.92#ibcon#flushed, iclass 14, count 0 2006.229.10:03:36.92#ibcon#about to write, iclass 14, count 0 2006.229.10:03:36.92#ibcon#wrote, iclass 14, count 0 2006.229.10:03:36.92#ibcon#about to read 3, iclass 14, count 0 2006.229.10:03:36.96#ibcon#read 3, iclass 14, count 0 2006.229.10:03:36.96#ibcon#about to read 4, iclass 14, count 0 2006.229.10:03:36.96#ibcon#read 4, iclass 14, count 0 2006.229.10:03:36.96#ibcon#about to read 5, iclass 14, count 0 2006.229.10:03:36.96#ibcon#read 5, iclass 14, count 0 2006.229.10:03:36.96#ibcon#about to read 6, iclass 14, count 0 2006.229.10:03:36.96#ibcon#read 6, iclass 14, count 0 2006.229.10:03:36.96#ibcon#end of sib2, iclass 14, count 0 2006.229.10:03:36.96#ibcon#*after write, iclass 14, count 0 2006.229.10:03:36.96#ibcon#*before return 0, iclass 14, count 0 2006.229.10:03:36.96#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:36.96#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:03:36.96#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:03:36.96#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:03:36.96$vck44/vb=4,4 2006.229.10:03:36.96#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.10:03:36.96#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.10:03:36.96#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:36.96#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:37.02#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:37.02#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:37.02#ibcon#enter wrdev, iclass 16, count 2 2006.229.10:03:37.02#ibcon#first serial, iclass 16, count 2 2006.229.10:03:37.02#ibcon#enter sib2, iclass 16, count 2 2006.229.10:03:37.02#ibcon#flushed, iclass 16, count 2 2006.229.10:03:37.02#ibcon#about to write, iclass 16, count 2 2006.229.10:03:37.02#ibcon#wrote, iclass 16, count 2 2006.229.10:03:37.02#ibcon#about to read 3, iclass 16, count 2 2006.229.10:03:37.04#ibcon#read 3, iclass 16, count 2 2006.229.10:03:37.04#ibcon#about to read 4, iclass 16, count 2 2006.229.10:03:37.04#ibcon#read 4, iclass 16, count 2 2006.229.10:03:37.04#ibcon#about to read 5, iclass 16, count 2 2006.229.10:03:37.04#ibcon#read 5, iclass 16, count 2 2006.229.10:03:37.04#ibcon#about to read 6, iclass 16, count 2 2006.229.10:03:37.04#ibcon#read 6, iclass 16, count 2 2006.229.10:03:37.04#ibcon#end of sib2, iclass 16, count 2 2006.229.10:03:37.04#ibcon#*mode == 0, iclass 16, count 2 2006.229.10:03:37.04#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.10:03:37.04#ibcon#[27=AT04-04\r\n] 2006.229.10:03:37.04#ibcon#*before write, iclass 16, count 2 2006.229.10:03:37.04#ibcon#enter sib2, iclass 16, count 2 2006.229.10:03:37.04#ibcon#flushed, iclass 16, count 2 2006.229.10:03:37.04#ibcon#about to write, iclass 16, count 2 2006.229.10:03:37.04#ibcon#wrote, iclass 16, count 2 2006.229.10:03:37.04#ibcon#about to read 3, iclass 16, count 2 2006.229.10:03:37.07#ibcon#read 3, iclass 16, count 2 2006.229.10:03:37.07#ibcon#about to read 4, iclass 16, count 2 2006.229.10:03:37.07#ibcon#read 4, iclass 16, count 2 2006.229.10:03:37.07#ibcon#about to read 5, iclass 16, count 2 2006.229.10:03:37.07#ibcon#read 5, iclass 16, count 2 2006.229.10:03:37.07#ibcon#about to read 6, iclass 16, count 2 2006.229.10:03:37.07#ibcon#read 6, iclass 16, count 2 2006.229.10:03:37.07#ibcon#end of sib2, iclass 16, count 2 2006.229.10:03:37.07#ibcon#*after write, iclass 16, count 2 2006.229.10:03:37.07#ibcon#*before return 0, iclass 16, count 2 2006.229.10:03:37.07#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:37.07#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:03:37.07#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.10:03:37.07#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:37.07#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:37.19#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:37.19#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:37.19#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:03:37.19#ibcon#first serial, iclass 16, count 0 2006.229.10:03:37.19#ibcon#enter sib2, iclass 16, count 0 2006.229.10:03:37.19#ibcon#flushed, iclass 16, count 0 2006.229.10:03:37.19#ibcon#about to write, iclass 16, count 0 2006.229.10:03:37.19#ibcon#wrote, iclass 16, count 0 2006.229.10:03:37.19#ibcon#about to read 3, iclass 16, count 0 2006.229.10:03:37.21#ibcon#read 3, iclass 16, count 0 2006.229.10:03:37.21#ibcon#about to read 4, iclass 16, count 0 2006.229.10:03:37.21#ibcon#read 4, iclass 16, count 0 2006.229.10:03:37.21#ibcon#about to read 5, iclass 16, count 0 2006.229.10:03:37.21#ibcon#read 5, iclass 16, count 0 2006.229.10:03:37.21#ibcon#about to read 6, iclass 16, count 0 2006.229.10:03:37.21#ibcon#read 6, iclass 16, count 0 2006.229.10:03:37.21#ibcon#end of sib2, iclass 16, count 0 2006.229.10:03:37.21#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:03:37.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:03:37.21#ibcon#[27=USB\r\n] 2006.229.10:03:37.21#ibcon#*before write, iclass 16, count 0 2006.229.10:03:37.21#ibcon#enter sib2, iclass 16, count 0 2006.229.10:03:37.21#ibcon#flushed, iclass 16, count 0 2006.229.10:03:37.21#ibcon#about to write, iclass 16, count 0 2006.229.10:03:37.21#ibcon#wrote, iclass 16, count 0 2006.229.10:03:37.21#ibcon#about to read 3, iclass 16, count 0 2006.229.10:03:37.24#ibcon#read 3, iclass 16, count 0 2006.229.10:03:37.24#ibcon#about to read 4, iclass 16, count 0 2006.229.10:03:37.24#ibcon#read 4, iclass 16, count 0 2006.229.10:03:37.24#ibcon#about to read 5, iclass 16, count 0 2006.229.10:03:37.24#ibcon#read 5, iclass 16, count 0 2006.229.10:03:37.24#ibcon#about to read 6, iclass 16, count 0 2006.229.10:03:37.24#ibcon#read 6, iclass 16, count 0 2006.229.10:03:37.24#ibcon#end of sib2, iclass 16, count 0 2006.229.10:03:37.24#ibcon#*after write, iclass 16, count 0 2006.229.10:03:37.24#ibcon#*before return 0, iclass 16, count 0 2006.229.10:03:37.24#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:37.24#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:03:37.24#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:03:37.24#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:03:37.24$vck44/vblo=5,709.99 2006.229.10:03:37.24#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.10:03:37.24#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.10:03:37.24#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:37.24#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:37.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:37.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:37.24#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:03:37.24#ibcon#first serial, iclass 18, count 0 2006.229.10:03:37.24#ibcon#enter sib2, iclass 18, count 0 2006.229.10:03:37.24#ibcon#flushed, iclass 18, count 0 2006.229.10:03:37.24#ibcon#about to write, iclass 18, count 0 2006.229.10:03:37.24#ibcon#wrote, iclass 18, count 0 2006.229.10:03:37.24#ibcon#about to read 3, iclass 18, count 0 2006.229.10:03:37.26#ibcon#read 3, iclass 18, count 0 2006.229.10:03:37.26#ibcon#about to read 4, iclass 18, count 0 2006.229.10:03:37.26#ibcon#read 4, iclass 18, count 0 2006.229.10:03:37.26#ibcon#about to read 5, iclass 18, count 0 2006.229.10:03:37.26#ibcon#read 5, iclass 18, count 0 2006.229.10:03:37.26#ibcon#about to read 6, iclass 18, count 0 2006.229.10:03:37.26#ibcon#read 6, iclass 18, count 0 2006.229.10:03:37.26#ibcon#end of sib2, iclass 18, count 0 2006.229.10:03:37.26#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:03:37.26#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:03:37.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:03:37.26#ibcon#*before write, iclass 18, count 0 2006.229.10:03:37.26#ibcon#enter sib2, iclass 18, count 0 2006.229.10:03:37.26#ibcon#flushed, iclass 18, count 0 2006.229.10:03:37.26#ibcon#about to write, iclass 18, count 0 2006.229.10:03:37.26#ibcon#wrote, iclass 18, count 0 2006.229.10:03:37.26#ibcon#about to read 3, iclass 18, count 0 2006.229.10:03:37.30#ibcon#read 3, iclass 18, count 0 2006.229.10:03:37.30#ibcon#about to read 4, iclass 18, count 0 2006.229.10:03:37.30#ibcon#read 4, iclass 18, count 0 2006.229.10:03:37.30#ibcon#about to read 5, iclass 18, count 0 2006.229.10:03:37.30#ibcon#read 5, iclass 18, count 0 2006.229.10:03:37.30#ibcon#about to read 6, iclass 18, count 0 2006.229.10:03:37.30#ibcon#read 6, iclass 18, count 0 2006.229.10:03:37.30#ibcon#end of sib2, iclass 18, count 0 2006.229.10:03:37.30#ibcon#*after write, iclass 18, count 0 2006.229.10:03:37.30#ibcon#*before return 0, iclass 18, count 0 2006.229.10:03:37.30#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:37.30#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:03:37.30#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:03:37.30#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:03:37.30$vck44/vb=5,4 2006.229.10:03:37.30#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.10:03:37.30#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.10:03:37.30#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:37.30#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:37.36#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:37.36#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:37.36#ibcon#enter wrdev, iclass 20, count 2 2006.229.10:03:37.36#ibcon#first serial, iclass 20, count 2 2006.229.10:03:37.36#ibcon#enter sib2, iclass 20, count 2 2006.229.10:03:37.36#ibcon#flushed, iclass 20, count 2 2006.229.10:03:37.36#ibcon#about to write, iclass 20, count 2 2006.229.10:03:37.36#ibcon#wrote, iclass 20, count 2 2006.229.10:03:37.36#ibcon#about to read 3, iclass 20, count 2 2006.229.10:03:37.38#ibcon#read 3, iclass 20, count 2 2006.229.10:03:37.38#ibcon#about to read 4, iclass 20, count 2 2006.229.10:03:37.38#ibcon#read 4, iclass 20, count 2 2006.229.10:03:37.38#ibcon#about to read 5, iclass 20, count 2 2006.229.10:03:37.38#ibcon#read 5, iclass 20, count 2 2006.229.10:03:37.38#ibcon#about to read 6, iclass 20, count 2 2006.229.10:03:37.38#ibcon#read 6, iclass 20, count 2 2006.229.10:03:37.38#ibcon#end of sib2, iclass 20, count 2 2006.229.10:03:37.38#ibcon#*mode == 0, iclass 20, count 2 2006.229.10:03:37.38#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.10:03:37.38#ibcon#[27=AT05-04\r\n] 2006.229.10:03:37.38#ibcon#*before write, iclass 20, count 2 2006.229.10:03:37.38#ibcon#enter sib2, iclass 20, count 2 2006.229.10:03:37.38#ibcon#flushed, iclass 20, count 2 2006.229.10:03:37.38#ibcon#about to write, iclass 20, count 2 2006.229.10:03:37.38#ibcon#wrote, iclass 20, count 2 2006.229.10:03:37.38#ibcon#about to read 3, iclass 20, count 2 2006.229.10:03:37.41#ibcon#read 3, iclass 20, count 2 2006.229.10:03:37.41#ibcon#about to read 4, iclass 20, count 2 2006.229.10:03:37.41#ibcon#read 4, iclass 20, count 2 2006.229.10:03:37.41#ibcon#about to read 5, iclass 20, count 2 2006.229.10:03:37.41#ibcon#read 5, iclass 20, count 2 2006.229.10:03:37.41#ibcon#about to read 6, iclass 20, count 2 2006.229.10:03:37.41#ibcon#read 6, iclass 20, count 2 2006.229.10:03:37.41#ibcon#end of sib2, iclass 20, count 2 2006.229.10:03:37.41#ibcon#*after write, iclass 20, count 2 2006.229.10:03:37.41#ibcon#*before return 0, iclass 20, count 2 2006.229.10:03:37.41#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:37.41#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:03:37.41#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.10:03:37.41#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:37.41#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:37.53#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:37.53#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:37.53#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:03:37.53#ibcon#first serial, iclass 20, count 0 2006.229.10:03:37.53#ibcon#enter sib2, iclass 20, count 0 2006.229.10:03:37.53#ibcon#flushed, iclass 20, count 0 2006.229.10:03:37.53#ibcon#about to write, iclass 20, count 0 2006.229.10:03:37.53#ibcon#wrote, iclass 20, count 0 2006.229.10:03:37.53#ibcon#about to read 3, iclass 20, count 0 2006.229.10:03:37.55#ibcon#read 3, iclass 20, count 0 2006.229.10:03:37.55#ibcon#about to read 4, iclass 20, count 0 2006.229.10:03:37.55#ibcon#read 4, iclass 20, count 0 2006.229.10:03:37.55#ibcon#about to read 5, iclass 20, count 0 2006.229.10:03:37.55#ibcon#read 5, iclass 20, count 0 2006.229.10:03:37.55#ibcon#about to read 6, iclass 20, count 0 2006.229.10:03:37.55#ibcon#read 6, iclass 20, count 0 2006.229.10:03:37.55#ibcon#end of sib2, iclass 20, count 0 2006.229.10:03:37.55#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:03:37.55#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:03:37.55#ibcon#[27=USB\r\n] 2006.229.10:03:37.55#ibcon#*before write, iclass 20, count 0 2006.229.10:03:37.55#ibcon#enter sib2, iclass 20, count 0 2006.229.10:03:37.55#ibcon#flushed, iclass 20, count 0 2006.229.10:03:37.55#ibcon#about to write, iclass 20, count 0 2006.229.10:03:37.55#ibcon#wrote, iclass 20, count 0 2006.229.10:03:37.55#ibcon#about to read 3, iclass 20, count 0 2006.229.10:03:37.58#ibcon#read 3, iclass 20, count 0 2006.229.10:03:37.58#ibcon#about to read 4, iclass 20, count 0 2006.229.10:03:37.58#ibcon#read 4, iclass 20, count 0 2006.229.10:03:37.58#ibcon#about to read 5, iclass 20, count 0 2006.229.10:03:37.58#ibcon#read 5, iclass 20, count 0 2006.229.10:03:37.58#ibcon#about to read 6, iclass 20, count 0 2006.229.10:03:37.58#ibcon#read 6, iclass 20, count 0 2006.229.10:03:37.58#ibcon#end of sib2, iclass 20, count 0 2006.229.10:03:37.58#ibcon#*after write, iclass 20, count 0 2006.229.10:03:37.58#ibcon#*before return 0, iclass 20, count 0 2006.229.10:03:37.58#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:37.58#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:03:37.58#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:03:37.58#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:03:37.58$vck44/vblo=6,719.99 2006.229.10:03:37.58#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.10:03:37.58#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.10:03:37.58#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:37.58#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:37.58#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:37.58#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:37.58#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:03:37.58#ibcon#first serial, iclass 22, count 0 2006.229.10:03:37.58#ibcon#enter sib2, iclass 22, count 0 2006.229.10:03:37.58#ibcon#flushed, iclass 22, count 0 2006.229.10:03:37.58#ibcon#about to write, iclass 22, count 0 2006.229.10:03:37.58#ibcon#wrote, iclass 22, count 0 2006.229.10:03:37.58#ibcon#about to read 3, iclass 22, count 0 2006.229.10:03:37.60#ibcon#read 3, iclass 22, count 0 2006.229.10:03:37.60#ibcon#about to read 4, iclass 22, count 0 2006.229.10:03:37.60#ibcon#read 4, iclass 22, count 0 2006.229.10:03:37.60#ibcon#about to read 5, iclass 22, count 0 2006.229.10:03:37.60#ibcon#read 5, iclass 22, count 0 2006.229.10:03:37.60#ibcon#about to read 6, iclass 22, count 0 2006.229.10:03:37.60#ibcon#read 6, iclass 22, count 0 2006.229.10:03:37.60#ibcon#end of sib2, iclass 22, count 0 2006.229.10:03:37.60#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:03:37.60#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:03:37.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:03:37.60#ibcon#*before write, iclass 22, count 0 2006.229.10:03:37.60#ibcon#enter sib2, iclass 22, count 0 2006.229.10:03:37.60#ibcon#flushed, iclass 22, count 0 2006.229.10:03:37.60#ibcon#about to write, iclass 22, count 0 2006.229.10:03:37.60#ibcon#wrote, iclass 22, count 0 2006.229.10:03:37.60#ibcon#about to read 3, iclass 22, count 0 2006.229.10:03:37.64#ibcon#read 3, iclass 22, count 0 2006.229.10:03:37.64#ibcon#about to read 4, iclass 22, count 0 2006.229.10:03:37.64#ibcon#read 4, iclass 22, count 0 2006.229.10:03:37.64#ibcon#about to read 5, iclass 22, count 0 2006.229.10:03:37.64#ibcon#read 5, iclass 22, count 0 2006.229.10:03:37.64#ibcon#about to read 6, iclass 22, count 0 2006.229.10:03:37.64#ibcon#read 6, iclass 22, count 0 2006.229.10:03:37.64#ibcon#end of sib2, iclass 22, count 0 2006.229.10:03:37.64#ibcon#*after write, iclass 22, count 0 2006.229.10:03:37.64#ibcon#*before return 0, iclass 22, count 0 2006.229.10:03:37.64#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:37.64#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:03:37.64#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:03:37.64#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:03:37.64$vck44/vb=6,4 2006.229.10:03:37.64#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.10:03:37.64#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.10:03:37.64#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:37.64#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:37.70#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:37.70#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:37.70#ibcon#enter wrdev, iclass 24, count 2 2006.229.10:03:37.70#ibcon#first serial, iclass 24, count 2 2006.229.10:03:37.70#ibcon#enter sib2, iclass 24, count 2 2006.229.10:03:37.70#ibcon#flushed, iclass 24, count 2 2006.229.10:03:37.70#ibcon#about to write, iclass 24, count 2 2006.229.10:03:37.70#ibcon#wrote, iclass 24, count 2 2006.229.10:03:37.70#ibcon#about to read 3, iclass 24, count 2 2006.229.10:03:37.72#ibcon#read 3, iclass 24, count 2 2006.229.10:03:37.72#ibcon#about to read 4, iclass 24, count 2 2006.229.10:03:37.72#ibcon#read 4, iclass 24, count 2 2006.229.10:03:37.72#ibcon#about to read 5, iclass 24, count 2 2006.229.10:03:37.72#ibcon#read 5, iclass 24, count 2 2006.229.10:03:37.72#ibcon#about to read 6, iclass 24, count 2 2006.229.10:03:37.72#ibcon#read 6, iclass 24, count 2 2006.229.10:03:37.72#ibcon#end of sib2, iclass 24, count 2 2006.229.10:03:37.72#ibcon#*mode == 0, iclass 24, count 2 2006.229.10:03:37.72#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.10:03:37.72#ibcon#[27=AT06-04\r\n] 2006.229.10:03:37.72#ibcon#*before write, iclass 24, count 2 2006.229.10:03:37.72#ibcon#enter sib2, iclass 24, count 2 2006.229.10:03:37.72#ibcon#flushed, iclass 24, count 2 2006.229.10:03:37.72#ibcon#about to write, iclass 24, count 2 2006.229.10:03:37.72#ibcon#wrote, iclass 24, count 2 2006.229.10:03:37.72#ibcon#about to read 3, iclass 24, count 2 2006.229.10:03:37.75#ibcon#read 3, iclass 24, count 2 2006.229.10:03:37.75#ibcon#about to read 4, iclass 24, count 2 2006.229.10:03:37.75#ibcon#read 4, iclass 24, count 2 2006.229.10:03:37.75#ibcon#about to read 5, iclass 24, count 2 2006.229.10:03:37.75#ibcon#read 5, iclass 24, count 2 2006.229.10:03:37.75#ibcon#about to read 6, iclass 24, count 2 2006.229.10:03:37.75#ibcon#read 6, iclass 24, count 2 2006.229.10:03:37.75#ibcon#end of sib2, iclass 24, count 2 2006.229.10:03:37.75#ibcon#*after write, iclass 24, count 2 2006.229.10:03:37.75#ibcon#*before return 0, iclass 24, count 2 2006.229.10:03:37.75#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:37.75#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:03:37.75#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.10:03:37.75#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:37.75#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:37.87#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:37.87#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:37.87#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:03:37.87#ibcon#first serial, iclass 24, count 0 2006.229.10:03:37.87#ibcon#enter sib2, iclass 24, count 0 2006.229.10:03:37.87#ibcon#flushed, iclass 24, count 0 2006.229.10:03:37.87#ibcon#about to write, iclass 24, count 0 2006.229.10:03:37.87#ibcon#wrote, iclass 24, count 0 2006.229.10:03:37.87#ibcon#about to read 3, iclass 24, count 0 2006.229.10:03:37.89#ibcon#read 3, iclass 24, count 0 2006.229.10:03:37.89#ibcon#about to read 4, iclass 24, count 0 2006.229.10:03:37.89#ibcon#read 4, iclass 24, count 0 2006.229.10:03:37.89#ibcon#about to read 5, iclass 24, count 0 2006.229.10:03:37.89#ibcon#read 5, iclass 24, count 0 2006.229.10:03:37.89#ibcon#about to read 6, iclass 24, count 0 2006.229.10:03:37.89#ibcon#read 6, iclass 24, count 0 2006.229.10:03:37.89#ibcon#end of sib2, iclass 24, count 0 2006.229.10:03:37.89#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:03:37.89#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:03:37.89#ibcon#[27=USB\r\n] 2006.229.10:03:37.89#ibcon#*before write, iclass 24, count 0 2006.229.10:03:37.89#ibcon#enter sib2, iclass 24, count 0 2006.229.10:03:37.89#ibcon#flushed, iclass 24, count 0 2006.229.10:03:37.89#ibcon#about to write, iclass 24, count 0 2006.229.10:03:37.89#ibcon#wrote, iclass 24, count 0 2006.229.10:03:37.89#ibcon#about to read 3, iclass 24, count 0 2006.229.10:03:37.92#ibcon#read 3, iclass 24, count 0 2006.229.10:03:37.92#ibcon#about to read 4, iclass 24, count 0 2006.229.10:03:37.92#ibcon#read 4, iclass 24, count 0 2006.229.10:03:37.92#ibcon#about to read 5, iclass 24, count 0 2006.229.10:03:37.92#ibcon#read 5, iclass 24, count 0 2006.229.10:03:37.92#ibcon#about to read 6, iclass 24, count 0 2006.229.10:03:37.92#ibcon#read 6, iclass 24, count 0 2006.229.10:03:37.92#ibcon#end of sib2, iclass 24, count 0 2006.229.10:03:37.92#ibcon#*after write, iclass 24, count 0 2006.229.10:03:37.92#ibcon#*before return 0, iclass 24, count 0 2006.229.10:03:37.92#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:37.92#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:03:37.92#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:03:37.92#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:03:37.92$vck44/vblo=7,734.99 2006.229.10:03:37.92#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.10:03:37.92#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.10:03:37.92#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:37.92#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:37.92#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:37.92#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:37.92#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:03:37.92#ibcon#first serial, iclass 26, count 0 2006.229.10:03:37.92#ibcon#enter sib2, iclass 26, count 0 2006.229.10:03:37.92#ibcon#flushed, iclass 26, count 0 2006.229.10:03:37.92#ibcon#about to write, iclass 26, count 0 2006.229.10:03:37.92#ibcon#wrote, iclass 26, count 0 2006.229.10:03:37.92#ibcon#about to read 3, iclass 26, count 0 2006.229.10:03:37.94#ibcon#read 3, iclass 26, count 0 2006.229.10:03:37.94#ibcon#about to read 4, iclass 26, count 0 2006.229.10:03:37.94#ibcon#read 4, iclass 26, count 0 2006.229.10:03:37.94#ibcon#about to read 5, iclass 26, count 0 2006.229.10:03:37.94#ibcon#read 5, iclass 26, count 0 2006.229.10:03:37.94#ibcon#about to read 6, iclass 26, count 0 2006.229.10:03:37.94#ibcon#read 6, iclass 26, count 0 2006.229.10:03:37.94#ibcon#end of sib2, iclass 26, count 0 2006.229.10:03:37.94#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:03:37.94#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:03:37.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:03:37.94#ibcon#*before write, iclass 26, count 0 2006.229.10:03:37.94#ibcon#enter sib2, iclass 26, count 0 2006.229.10:03:37.94#ibcon#flushed, iclass 26, count 0 2006.229.10:03:37.94#ibcon#about to write, iclass 26, count 0 2006.229.10:03:37.94#ibcon#wrote, iclass 26, count 0 2006.229.10:03:37.94#ibcon#about to read 3, iclass 26, count 0 2006.229.10:03:37.98#ibcon#read 3, iclass 26, count 0 2006.229.10:03:37.98#ibcon#about to read 4, iclass 26, count 0 2006.229.10:03:37.98#ibcon#read 4, iclass 26, count 0 2006.229.10:03:37.98#ibcon#about to read 5, iclass 26, count 0 2006.229.10:03:37.98#ibcon#read 5, iclass 26, count 0 2006.229.10:03:37.98#ibcon#about to read 6, iclass 26, count 0 2006.229.10:03:37.98#ibcon#read 6, iclass 26, count 0 2006.229.10:03:37.98#ibcon#end of sib2, iclass 26, count 0 2006.229.10:03:37.98#ibcon#*after write, iclass 26, count 0 2006.229.10:03:37.98#ibcon#*before return 0, iclass 26, count 0 2006.229.10:03:37.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:37.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:03:37.98#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:03:37.98#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:03:37.98$vck44/vb=7,4 2006.229.10:03:37.98#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.10:03:37.98#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.10:03:37.98#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:37.98#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:38.04#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:38.04#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:38.04#ibcon#enter wrdev, iclass 28, count 2 2006.229.10:03:38.04#ibcon#first serial, iclass 28, count 2 2006.229.10:03:38.04#ibcon#enter sib2, iclass 28, count 2 2006.229.10:03:38.04#ibcon#flushed, iclass 28, count 2 2006.229.10:03:38.04#ibcon#about to write, iclass 28, count 2 2006.229.10:03:38.04#ibcon#wrote, iclass 28, count 2 2006.229.10:03:38.04#ibcon#about to read 3, iclass 28, count 2 2006.229.10:03:38.06#ibcon#read 3, iclass 28, count 2 2006.229.10:03:38.06#ibcon#about to read 4, iclass 28, count 2 2006.229.10:03:38.06#ibcon#read 4, iclass 28, count 2 2006.229.10:03:38.06#ibcon#about to read 5, iclass 28, count 2 2006.229.10:03:38.06#ibcon#read 5, iclass 28, count 2 2006.229.10:03:38.06#ibcon#about to read 6, iclass 28, count 2 2006.229.10:03:38.06#ibcon#read 6, iclass 28, count 2 2006.229.10:03:38.06#ibcon#end of sib2, iclass 28, count 2 2006.229.10:03:38.06#ibcon#*mode == 0, iclass 28, count 2 2006.229.10:03:38.06#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.10:03:38.06#ibcon#[27=AT07-04\r\n] 2006.229.10:03:38.06#ibcon#*before write, iclass 28, count 2 2006.229.10:03:38.06#ibcon#enter sib2, iclass 28, count 2 2006.229.10:03:38.06#ibcon#flushed, iclass 28, count 2 2006.229.10:03:38.06#ibcon#about to write, iclass 28, count 2 2006.229.10:03:38.06#ibcon#wrote, iclass 28, count 2 2006.229.10:03:38.06#ibcon#about to read 3, iclass 28, count 2 2006.229.10:03:38.09#ibcon#read 3, iclass 28, count 2 2006.229.10:03:38.09#ibcon#about to read 4, iclass 28, count 2 2006.229.10:03:38.09#ibcon#read 4, iclass 28, count 2 2006.229.10:03:38.09#ibcon#about to read 5, iclass 28, count 2 2006.229.10:03:38.09#ibcon#read 5, iclass 28, count 2 2006.229.10:03:38.09#ibcon#about to read 6, iclass 28, count 2 2006.229.10:03:38.09#ibcon#read 6, iclass 28, count 2 2006.229.10:03:38.09#ibcon#end of sib2, iclass 28, count 2 2006.229.10:03:38.09#ibcon#*after write, iclass 28, count 2 2006.229.10:03:38.09#ibcon#*before return 0, iclass 28, count 2 2006.229.10:03:38.09#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:38.09#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:03:38.09#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.10:03:38.09#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:38.09#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:38.21#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:38.21#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:38.21#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:03:38.21#ibcon#first serial, iclass 28, count 0 2006.229.10:03:38.21#ibcon#enter sib2, iclass 28, count 0 2006.229.10:03:38.21#ibcon#flushed, iclass 28, count 0 2006.229.10:03:38.21#ibcon#about to write, iclass 28, count 0 2006.229.10:03:38.21#ibcon#wrote, iclass 28, count 0 2006.229.10:03:38.21#ibcon#about to read 3, iclass 28, count 0 2006.229.10:03:38.23#ibcon#read 3, iclass 28, count 0 2006.229.10:03:38.23#ibcon#about to read 4, iclass 28, count 0 2006.229.10:03:38.23#ibcon#read 4, iclass 28, count 0 2006.229.10:03:38.23#ibcon#about to read 5, iclass 28, count 0 2006.229.10:03:38.23#ibcon#read 5, iclass 28, count 0 2006.229.10:03:38.23#ibcon#about to read 6, iclass 28, count 0 2006.229.10:03:38.23#ibcon#read 6, iclass 28, count 0 2006.229.10:03:38.23#ibcon#end of sib2, iclass 28, count 0 2006.229.10:03:38.23#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:03:38.23#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:03:38.23#ibcon#[27=USB\r\n] 2006.229.10:03:38.23#ibcon#*before write, iclass 28, count 0 2006.229.10:03:38.23#ibcon#enter sib2, iclass 28, count 0 2006.229.10:03:38.23#ibcon#flushed, iclass 28, count 0 2006.229.10:03:38.23#ibcon#about to write, iclass 28, count 0 2006.229.10:03:38.23#ibcon#wrote, iclass 28, count 0 2006.229.10:03:38.23#ibcon#about to read 3, iclass 28, count 0 2006.229.10:03:38.26#ibcon#read 3, iclass 28, count 0 2006.229.10:03:38.26#ibcon#about to read 4, iclass 28, count 0 2006.229.10:03:38.26#ibcon#read 4, iclass 28, count 0 2006.229.10:03:38.26#ibcon#about to read 5, iclass 28, count 0 2006.229.10:03:38.26#ibcon#read 5, iclass 28, count 0 2006.229.10:03:38.26#ibcon#about to read 6, iclass 28, count 0 2006.229.10:03:38.26#ibcon#read 6, iclass 28, count 0 2006.229.10:03:38.26#ibcon#end of sib2, iclass 28, count 0 2006.229.10:03:38.26#ibcon#*after write, iclass 28, count 0 2006.229.10:03:38.26#ibcon#*before return 0, iclass 28, count 0 2006.229.10:03:38.26#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:38.26#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:03:38.26#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:03:38.26#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:03:38.26$vck44/vblo=8,744.99 2006.229.10:03:38.26#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:03:38.26#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:03:38.26#ibcon#ireg 17 cls_cnt 0 2006.229.10:03:38.26#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:38.26#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:38.26#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:38.26#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:03:38.26#ibcon#first serial, iclass 30, count 0 2006.229.10:03:38.26#ibcon#enter sib2, iclass 30, count 0 2006.229.10:03:38.26#ibcon#flushed, iclass 30, count 0 2006.229.10:03:38.26#ibcon#about to write, iclass 30, count 0 2006.229.10:03:38.26#ibcon#wrote, iclass 30, count 0 2006.229.10:03:38.26#ibcon#about to read 3, iclass 30, count 0 2006.229.10:03:38.28#ibcon#read 3, iclass 30, count 0 2006.229.10:03:38.28#ibcon#about to read 4, iclass 30, count 0 2006.229.10:03:38.28#ibcon#read 4, iclass 30, count 0 2006.229.10:03:38.28#ibcon#about to read 5, iclass 30, count 0 2006.229.10:03:38.28#ibcon#read 5, iclass 30, count 0 2006.229.10:03:38.28#ibcon#about to read 6, iclass 30, count 0 2006.229.10:03:38.28#ibcon#read 6, iclass 30, count 0 2006.229.10:03:38.28#ibcon#end of sib2, iclass 30, count 0 2006.229.10:03:38.28#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:03:38.28#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:03:38.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:03:38.28#ibcon#*before write, iclass 30, count 0 2006.229.10:03:38.28#ibcon#enter sib2, iclass 30, count 0 2006.229.10:03:38.28#ibcon#flushed, iclass 30, count 0 2006.229.10:03:38.28#ibcon#about to write, iclass 30, count 0 2006.229.10:03:38.28#ibcon#wrote, iclass 30, count 0 2006.229.10:03:38.28#ibcon#about to read 3, iclass 30, count 0 2006.229.10:03:38.32#ibcon#read 3, iclass 30, count 0 2006.229.10:03:38.32#ibcon#about to read 4, iclass 30, count 0 2006.229.10:03:38.32#ibcon#read 4, iclass 30, count 0 2006.229.10:03:38.32#ibcon#about to read 5, iclass 30, count 0 2006.229.10:03:38.32#ibcon#read 5, iclass 30, count 0 2006.229.10:03:38.32#ibcon#about to read 6, iclass 30, count 0 2006.229.10:03:38.32#ibcon#read 6, iclass 30, count 0 2006.229.10:03:38.32#ibcon#end of sib2, iclass 30, count 0 2006.229.10:03:38.32#ibcon#*after write, iclass 30, count 0 2006.229.10:03:38.32#ibcon#*before return 0, iclass 30, count 0 2006.229.10:03:38.32#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:38.32#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:03:38.32#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:03:38.32#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:03:38.32$vck44/vb=8,4 2006.229.10:03:38.32#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.10:03:38.32#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.10:03:38.32#ibcon#ireg 11 cls_cnt 2 2006.229.10:03:38.32#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:38.38#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:38.38#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:38.38#ibcon#enter wrdev, iclass 32, count 2 2006.229.10:03:38.38#ibcon#first serial, iclass 32, count 2 2006.229.10:03:38.38#ibcon#enter sib2, iclass 32, count 2 2006.229.10:03:38.38#ibcon#flushed, iclass 32, count 2 2006.229.10:03:38.38#ibcon#about to write, iclass 32, count 2 2006.229.10:03:38.38#ibcon#wrote, iclass 32, count 2 2006.229.10:03:38.38#ibcon#about to read 3, iclass 32, count 2 2006.229.10:03:38.40#ibcon#read 3, iclass 32, count 2 2006.229.10:03:38.40#ibcon#about to read 4, iclass 32, count 2 2006.229.10:03:38.40#ibcon#read 4, iclass 32, count 2 2006.229.10:03:38.40#ibcon#about to read 5, iclass 32, count 2 2006.229.10:03:38.40#ibcon#read 5, iclass 32, count 2 2006.229.10:03:38.40#ibcon#about to read 6, iclass 32, count 2 2006.229.10:03:38.40#ibcon#read 6, iclass 32, count 2 2006.229.10:03:38.40#ibcon#end of sib2, iclass 32, count 2 2006.229.10:03:38.40#ibcon#*mode == 0, iclass 32, count 2 2006.229.10:03:38.40#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.10:03:38.40#ibcon#[27=AT08-04\r\n] 2006.229.10:03:38.40#ibcon#*before write, iclass 32, count 2 2006.229.10:03:38.40#ibcon#enter sib2, iclass 32, count 2 2006.229.10:03:38.40#ibcon#flushed, iclass 32, count 2 2006.229.10:03:38.40#ibcon#about to write, iclass 32, count 2 2006.229.10:03:38.40#ibcon#wrote, iclass 32, count 2 2006.229.10:03:38.40#ibcon#about to read 3, iclass 32, count 2 2006.229.10:03:38.43#ibcon#read 3, iclass 32, count 2 2006.229.10:03:38.43#ibcon#about to read 4, iclass 32, count 2 2006.229.10:03:38.43#ibcon#read 4, iclass 32, count 2 2006.229.10:03:38.43#ibcon#about to read 5, iclass 32, count 2 2006.229.10:03:38.43#ibcon#read 5, iclass 32, count 2 2006.229.10:03:38.43#ibcon#about to read 6, iclass 32, count 2 2006.229.10:03:38.43#ibcon#read 6, iclass 32, count 2 2006.229.10:03:38.43#ibcon#end of sib2, iclass 32, count 2 2006.229.10:03:38.43#ibcon#*after write, iclass 32, count 2 2006.229.10:03:38.43#ibcon#*before return 0, iclass 32, count 2 2006.229.10:03:38.43#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:38.43#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:03:38.43#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.10:03:38.43#ibcon#ireg 7 cls_cnt 0 2006.229.10:03:38.43#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:38.55#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:38.55#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:38.55#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:03:38.55#ibcon#first serial, iclass 32, count 0 2006.229.10:03:38.55#ibcon#enter sib2, iclass 32, count 0 2006.229.10:03:38.55#ibcon#flushed, iclass 32, count 0 2006.229.10:03:38.55#ibcon#about to write, iclass 32, count 0 2006.229.10:03:38.55#ibcon#wrote, iclass 32, count 0 2006.229.10:03:38.55#ibcon#about to read 3, iclass 32, count 0 2006.229.10:03:38.57#ibcon#read 3, iclass 32, count 0 2006.229.10:03:38.57#ibcon#about to read 4, iclass 32, count 0 2006.229.10:03:38.57#ibcon#read 4, iclass 32, count 0 2006.229.10:03:38.57#ibcon#about to read 5, iclass 32, count 0 2006.229.10:03:38.57#ibcon#read 5, iclass 32, count 0 2006.229.10:03:38.57#ibcon#about to read 6, iclass 32, count 0 2006.229.10:03:38.57#ibcon#read 6, iclass 32, count 0 2006.229.10:03:38.57#ibcon#end of sib2, iclass 32, count 0 2006.229.10:03:38.57#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:03:38.57#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:03:38.57#ibcon#[27=USB\r\n] 2006.229.10:03:38.57#ibcon#*before write, iclass 32, count 0 2006.229.10:03:38.57#ibcon#enter sib2, iclass 32, count 0 2006.229.10:03:38.57#ibcon#flushed, iclass 32, count 0 2006.229.10:03:38.57#ibcon#about to write, iclass 32, count 0 2006.229.10:03:38.57#ibcon#wrote, iclass 32, count 0 2006.229.10:03:38.57#ibcon#about to read 3, iclass 32, count 0 2006.229.10:03:38.60#ibcon#read 3, iclass 32, count 0 2006.229.10:03:38.60#ibcon#about to read 4, iclass 32, count 0 2006.229.10:03:38.60#ibcon#read 4, iclass 32, count 0 2006.229.10:03:38.60#ibcon#about to read 5, iclass 32, count 0 2006.229.10:03:38.60#ibcon#read 5, iclass 32, count 0 2006.229.10:03:38.60#ibcon#about to read 6, iclass 32, count 0 2006.229.10:03:38.60#ibcon#read 6, iclass 32, count 0 2006.229.10:03:38.60#ibcon#end of sib2, iclass 32, count 0 2006.229.10:03:38.60#ibcon#*after write, iclass 32, count 0 2006.229.10:03:38.60#ibcon#*before return 0, iclass 32, count 0 2006.229.10:03:38.60#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:38.60#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:03:38.60#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:03:38.60#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:03:38.60$vck44/vabw=wide 2006.229.10:03:38.60#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.10:03:38.60#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.10:03:38.60#ibcon#ireg 8 cls_cnt 0 2006.229.10:03:38.60#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:38.60#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:38.60#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:38.60#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:03:38.60#ibcon#first serial, iclass 34, count 0 2006.229.10:03:38.60#ibcon#enter sib2, iclass 34, count 0 2006.229.10:03:38.60#ibcon#flushed, iclass 34, count 0 2006.229.10:03:38.60#ibcon#about to write, iclass 34, count 0 2006.229.10:03:38.60#ibcon#wrote, iclass 34, count 0 2006.229.10:03:38.60#ibcon#about to read 3, iclass 34, count 0 2006.229.10:03:38.62#ibcon#read 3, iclass 34, count 0 2006.229.10:03:38.62#ibcon#about to read 4, iclass 34, count 0 2006.229.10:03:38.62#ibcon#read 4, iclass 34, count 0 2006.229.10:03:38.62#ibcon#about to read 5, iclass 34, count 0 2006.229.10:03:38.62#ibcon#read 5, iclass 34, count 0 2006.229.10:03:38.62#ibcon#about to read 6, iclass 34, count 0 2006.229.10:03:38.62#ibcon#read 6, iclass 34, count 0 2006.229.10:03:38.62#ibcon#end of sib2, iclass 34, count 0 2006.229.10:03:38.62#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:03:38.62#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:03:38.62#ibcon#[25=BW32\r\n] 2006.229.10:03:38.62#ibcon#*before write, iclass 34, count 0 2006.229.10:03:38.62#ibcon#enter sib2, iclass 34, count 0 2006.229.10:03:38.62#ibcon#flushed, iclass 34, count 0 2006.229.10:03:38.62#ibcon#about to write, iclass 34, count 0 2006.229.10:03:38.62#ibcon#wrote, iclass 34, count 0 2006.229.10:03:38.62#ibcon#about to read 3, iclass 34, count 0 2006.229.10:03:38.65#ibcon#read 3, iclass 34, count 0 2006.229.10:03:38.65#ibcon#about to read 4, iclass 34, count 0 2006.229.10:03:38.65#ibcon#read 4, iclass 34, count 0 2006.229.10:03:38.65#ibcon#about to read 5, iclass 34, count 0 2006.229.10:03:38.65#ibcon#read 5, iclass 34, count 0 2006.229.10:03:38.65#ibcon#about to read 6, iclass 34, count 0 2006.229.10:03:38.65#ibcon#read 6, iclass 34, count 0 2006.229.10:03:38.65#ibcon#end of sib2, iclass 34, count 0 2006.229.10:03:38.65#ibcon#*after write, iclass 34, count 0 2006.229.10:03:38.65#ibcon#*before return 0, iclass 34, count 0 2006.229.10:03:38.65#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:38.65#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:03:38.65#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:03:38.65#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:03:38.65$vck44/vbbw=wide 2006.229.10:03:38.65#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:03:38.65#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:03:38.65#ibcon#ireg 8 cls_cnt 0 2006.229.10:03:38.65#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:03:38.72#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:03:38.72#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:03:38.72#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:03:38.72#ibcon#first serial, iclass 36, count 0 2006.229.10:03:38.72#ibcon#enter sib2, iclass 36, count 0 2006.229.10:03:38.72#ibcon#flushed, iclass 36, count 0 2006.229.10:03:38.72#ibcon#about to write, iclass 36, count 0 2006.229.10:03:38.72#ibcon#wrote, iclass 36, count 0 2006.229.10:03:38.72#ibcon#about to read 3, iclass 36, count 0 2006.229.10:03:38.74#ibcon#read 3, iclass 36, count 0 2006.229.10:03:38.74#ibcon#about to read 4, iclass 36, count 0 2006.229.10:03:38.74#ibcon#read 4, iclass 36, count 0 2006.229.10:03:38.74#ibcon#about to read 5, iclass 36, count 0 2006.229.10:03:38.74#ibcon#read 5, iclass 36, count 0 2006.229.10:03:38.74#ibcon#about to read 6, iclass 36, count 0 2006.229.10:03:38.74#ibcon#read 6, iclass 36, count 0 2006.229.10:03:38.74#ibcon#end of sib2, iclass 36, count 0 2006.229.10:03:38.74#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:03:38.74#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:03:38.74#ibcon#[27=BW32\r\n] 2006.229.10:03:38.74#ibcon#*before write, iclass 36, count 0 2006.229.10:03:38.74#ibcon#enter sib2, iclass 36, count 0 2006.229.10:03:38.74#ibcon#flushed, iclass 36, count 0 2006.229.10:03:38.74#ibcon#about to write, iclass 36, count 0 2006.229.10:03:38.74#ibcon#wrote, iclass 36, count 0 2006.229.10:03:38.74#ibcon#about to read 3, iclass 36, count 0 2006.229.10:03:38.77#ibcon#read 3, iclass 36, count 0 2006.229.10:03:38.77#ibcon#about to read 4, iclass 36, count 0 2006.229.10:03:38.77#ibcon#read 4, iclass 36, count 0 2006.229.10:03:38.77#ibcon#about to read 5, iclass 36, count 0 2006.229.10:03:38.77#ibcon#read 5, iclass 36, count 0 2006.229.10:03:38.77#ibcon#about to read 6, iclass 36, count 0 2006.229.10:03:38.77#ibcon#read 6, iclass 36, count 0 2006.229.10:03:38.77#ibcon#end of sib2, iclass 36, count 0 2006.229.10:03:38.77#ibcon#*after write, iclass 36, count 0 2006.229.10:03:38.77#ibcon#*before return 0, iclass 36, count 0 2006.229.10:03:38.77#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:03:38.77#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:03:38.77#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:03:38.77#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:03:38.77$setupk4/ifdk4 2006.229.10:03:38.77$ifdk4/lo= 2006.229.10:03:38.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:03:38.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:03:38.77$ifdk4/patch= 2006.229.10:03:38.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:03:38.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:03:38.77$setupk4/!*+20s 2006.229.10:03:46.45#abcon#<5=/05 1.8 3.2 28.70 981001.2\r\n> 2006.229.10:03:46.47#abcon#{5=INTERFACE CLEAR} 2006.229.10:03:46.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:03:53.26$setupk4/"tpicd 2006.229.10:03:53.26$setupk4/echo=off 2006.229.10:03:53.26$setupk4/xlog=off 2006.229.10:03:53.26:!2006.229.10:08:10 2006.229.10:03:59.13#trakl#Source acquired 2006.229.10:04:01.13#flagr#flagr/antenna,acquired 2006.229.10:08:10.00:preob 2006.229.10:08:11.14/onsource/TRACKING 2006.229.10:08:11.14:!2006.229.10:08:20 2006.229.10:08:20.00:"tape 2006.229.10:08:20.00:"st=record 2006.229.10:08:20.00:data_valid=on 2006.229.10:08:20.00:midob 2006.229.10:08:20.14/onsource/TRACKING 2006.229.10:08:20.14/wx/28.68,1001.2,98 2006.229.10:08:20.34/cable/+6.4036E-03 2006.229.10:08:21.43/va/01,08,usb,yes,30,33 2006.229.10:08:21.43/va/02,07,usb,yes,33,34 2006.229.10:08:21.43/va/03,06,usb,yes,41,43 2006.229.10:08:21.43/va/04,07,usb,yes,34,36 2006.229.10:08:21.43/va/05,04,usb,yes,30,31 2006.229.10:08:21.43/va/06,04,usb,yes,34,34 2006.229.10:08:21.43/va/07,05,usb,yes,30,31 2006.229.10:08:21.43/va/08,06,usb,yes,22,27 2006.229.10:08:21.66/valo/01,524.99,yes,locked 2006.229.10:08:21.66/valo/02,534.99,yes,locked 2006.229.10:08:21.66/valo/03,564.99,yes,locked 2006.229.10:08:21.66/valo/04,624.99,yes,locked 2006.229.10:08:21.66/valo/05,734.99,yes,locked 2006.229.10:08:21.66/valo/06,814.99,yes,locked 2006.229.10:08:21.66/valo/07,864.99,yes,locked 2006.229.10:08:21.66/valo/08,884.99,yes,locked 2006.229.10:08:22.75/vb/01,04,usb,yes,31,29 2006.229.10:08:22.75/vb/02,04,usb,yes,34,34 2006.229.10:08:22.75/vb/03,04,usb,yes,31,34 2006.229.10:08:22.75/vb/04,04,usb,yes,35,34 2006.229.10:08:22.75/vb/05,04,usb,yes,27,30 2006.229.10:08:22.75/vb/06,04,usb,yes,32,28 2006.229.10:08:22.75/vb/07,04,usb,yes,32,32 2006.229.10:08:22.75/vb/08,04,usb,yes,29,33 2006.229.10:08:22.99/vblo/01,629.99,yes,locked 2006.229.10:08:22.99/vblo/02,634.99,yes,locked 2006.229.10:08:22.99/vblo/03,649.99,yes,locked 2006.229.10:08:22.99/vblo/04,679.99,yes,locked 2006.229.10:08:22.99/vblo/05,709.99,yes,locked 2006.229.10:08:22.99/vblo/06,719.99,yes,locked 2006.229.10:08:22.99/vblo/07,734.99,yes,locked 2006.229.10:08:22.99/vblo/08,744.99,yes,locked 2006.229.10:08:23.14/vabw/8 2006.229.10:08:23.29/vbbw/8 2006.229.10:08:23.38/xfe/off,on,12.2 2006.229.10:08:23.76/ifatt/23,28,28,28 2006.229.10:08:24.07/fmout-gps/S +4.58E-07 2006.229.10:08:24.11:!2006.229.10:14:20 2006.229.10:14:20.00:data_valid=off 2006.229.10:14:20.00:"et 2006.229.10:14:20.01:!+3s 2006.229.10:14:23.02:"tape 2006.229.10:14:23.02:postob 2006.229.10:14:23.14/cable/+6.4005E-03 2006.229.10:14:23.14/wx/28.65,1001.3,98 2006.229.10:14:23.20/fmout-gps/S +4.55E-07 2006.229.10:14:23.20:scan_name=229-1018,jd0608,90 2006.229.10:14:23.21:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.10:14:24.14#flagr#flagr/antenna,new-source 2006.229.10:14:24.14:checkk5 2006.229.10:14:24.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:14:24.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:14:25.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:14:25.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:14:26.09/chk_obsdata//k5ts1/T2291008??a.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.10:14:26.49/chk_obsdata//k5ts2/T2291008??b.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.10:14:26.89/chk_obsdata//k5ts3/T2291008??c.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.10:14:27.31/chk_obsdata//k5ts4/T2291008??d.dat file size is correct (nominal:1440MB, actual:1436MB). 2006.229.10:14:28.06/k5log//k5ts1_log_newline 2006.229.10:14:28.76/k5log//k5ts2_log_newline 2006.229.10:14:29.46/k5log//k5ts3_log_newline 2006.229.10:14:30.16/k5log//k5ts4_log_newline 2006.229.10:14:30.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:14:30.19:setupk4=1 2006.229.10:14:30.19$setupk4/echo=on 2006.229.10:14:30.19$setupk4/pcalon 2006.229.10:14:30.19$pcalon/"no phase cal control is implemented here 2006.229.10:14:30.19$setupk4/"tpicd=stop 2006.229.10:14:30.19$setupk4/"rec=synch_on 2006.229.10:14:30.19$setupk4/"rec_mode=128 2006.229.10:14:30.19$setupk4/!* 2006.229.10:14:30.19$setupk4/recpk4 2006.229.10:14:30.19$recpk4/recpatch= 2006.229.10:14:30.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:14:30.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:14:30.20$setupk4/vck44 2006.229.10:14:30.20$vck44/valo=1,524.99 2006.229.10:14:30.20#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.10:14:30.20#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.10:14:30.20#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:30.20#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:30.20#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:30.20#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:30.20#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:14:30.20#ibcon#first serial, iclass 7, count 0 2006.229.10:14:30.20#ibcon#enter sib2, iclass 7, count 0 2006.229.10:14:30.20#ibcon#flushed, iclass 7, count 0 2006.229.10:14:30.20#ibcon#about to write, iclass 7, count 0 2006.229.10:14:30.20#ibcon#wrote, iclass 7, count 0 2006.229.10:14:30.20#ibcon#about to read 3, iclass 7, count 0 2006.229.10:14:30.22#ibcon#read 3, iclass 7, count 0 2006.229.10:14:30.22#ibcon#about to read 4, iclass 7, count 0 2006.229.10:14:30.22#ibcon#read 4, iclass 7, count 0 2006.229.10:14:30.22#ibcon#about to read 5, iclass 7, count 0 2006.229.10:14:30.22#ibcon#read 5, iclass 7, count 0 2006.229.10:14:30.22#ibcon#about to read 6, iclass 7, count 0 2006.229.10:14:30.22#ibcon#read 6, iclass 7, count 0 2006.229.10:14:30.22#ibcon#end of sib2, iclass 7, count 0 2006.229.10:14:30.22#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:14:30.22#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:14:30.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:14:30.22#ibcon#*before write, iclass 7, count 0 2006.229.10:14:30.22#ibcon#enter sib2, iclass 7, count 0 2006.229.10:14:30.22#ibcon#flushed, iclass 7, count 0 2006.229.10:14:30.22#ibcon#about to write, iclass 7, count 0 2006.229.10:14:30.22#ibcon#wrote, iclass 7, count 0 2006.229.10:14:30.22#ibcon#about to read 3, iclass 7, count 0 2006.229.10:14:30.27#ibcon#read 3, iclass 7, count 0 2006.229.10:14:30.27#ibcon#about to read 4, iclass 7, count 0 2006.229.10:14:30.27#ibcon#read 4, iclass 7, count 0 2006.229.10:14:30.27#ibcon#about to read 5, iclass 7, count 0 2006.229.10:14:30.27#ibcon#read 5, iclass 7, count 0 2006.229.10:14:30.27#ibcon#about to read 6, iclass 7, count 0 2006.229.10:14:30.27#ibcon#read 6, iclass 7, count 0 2006.229.10:14:30.27#ibcon#end of sib2, iclass 7, count 0 2006.229.10:14:30.27#ibcon#*after write, iclass 7, count 0 2006.229.10:14:30.27#ibcon#*before return 0, iclass 7, count 0 2006.229.10:14:30.27#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:30.27#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:30.27#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:14:30.27#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:14:30.27$vck44/va=1,8 2006.229.10:14:30.27#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.10:14:30.27#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.10:14:30.27#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:30.27#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:30.27#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:30.27#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:30.27#ibcon#enter wrdev, iclass 11, count 2 2006.229.10:14:30.27#ibcon#first serial, iclass 11, count 2 2006.229.10:14:30.27#ibcon#enter sib2, iclass 11, count 2 2006.229.10:14:30.27#ibcon#flushed, iclass 11, count 2 2006.229.10:14:30.27#ibcon#about to write, iclass 11, count 2 2006.229.10:14:30.27#ibcon#wrote, iclass 11, count 2 2006.229.10:14:30.27#ibcon#about to read 3, iclass 11, count 2 2006.229.10:14:30.29#ibcon#read 3, iclass 11, count 2 2006.229.10:14:30.29#ibcon#about to read 4, iclass 11, count 2 2006.229.10:14:30.29#ibcon#read 4, iclass 11, count 2 2006.229.10:14:30.29#ibcon#about to read 5, iclass 11, count 2 2006.229.10:14:30.29#ibcon#read 5, iclass 11, count 2 2006.229.10:14:30.29#ibcon#about to read 6, iclass 11, count 2 2006.229.10:14:30.29#ibcon#read 6, iclass 11, count 2 2006.229.10:14:30.29#ibcon#end of sib2, iclass 11, count 2 2006.229.10:14:30.29#ibcon#*mode == 0, iclass 11, count 2 2006.229.10:14:30.29#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.10:14:30.29#ibcon#[25=AT01-08\r\n] 2006.229.10:14:30.29#ibcon#*before write, iclass 11, count 2 2006.229.10:14:30.29#ibcon#enter sib2, iclass 11, count 2 2006.229.10:14:30.29#ibcon#flushed, iclass 11, count 2 2006.229.10:14:30.29#ibcon#about to write, iclass 11, count 2 2006.229.10:14:30.29#ibcon#wrote, iclass 11, count 2 2006.229.10:14:30.29#ibcon#about to read 3, iclass 11, count 2 2006.229.10:14:30.32#ibcon#read 3, iclass 11, count 2 2006.229.10:14:30.32#ibcon#about to read 4, iclass 11, count 2 2006.229.10:14:30.32#ibcon#read 4, iclass 11, count 2 2006.229.10:14:30.32#ibcon#about to read 5, iclass 11, count 2 2006.229.10:14:30.32#ibcon#read 5, iclass 11, count 2 2006.229.10:14:30.32#ibcon#about to read 6, iclass 11, count 2 2006.229.10:14:30.32#ibcon#read 6, iclass 11, count 2 2006.229.10:14:30.32#ibcon#end of sib2, iclass 11, count 2 2006.229.10:14:30.32#ibcon#*after write, iclass 11, count 2 2006.229.10:14:30.32#ibcon#*before return 0, iclass 11, count 2 2006.229.10:14:30.32#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:30.32#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:30.32#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.10:14:30.32#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:30.32#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:30.44#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:30.44#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:30.44#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:14:30.44#ibcon#first serial, iclass 11, count 0 2006.229.10:14:30.44#ibcon#enter sib2, iclass 11, count 0 2006.229.10:14:30.44#ibcon#flushed, iclass 11, count 0 2006.229.10:14:30.44#ibcon#about to write, iclass 11, count 0 2006.229.10:14:30.44#ibcon#wrote, iclass 11, count 0 2006.229.10:14:30.44#ibcon#about to read 3, iclass 11, count 0 2006.229.10:14:30.46#ibcon#read 3, iclass 11, count 0 2006.229.10:14:30.46#ibcon#about to read 4, iclass 11, count 0 2006.229.10:14:30.46#ibcon#read 4, iclass 11, count 0 2006.229.10:14:30.46#ibcon#about to read 5, iclass 11, count 0 2006.229.10:14:30.46#ibcon#read 5, iclass 11, count 0 2006.229.10:14:30.46#ibcon#about to read 6, iclass 11, count 0 2006.229.10:14:30.46#ibcon#read 6, iclass 11, count 0 2006.229.10:14:30.46#ibcon#end of sib2, iclass 11, count 0 2006.229.10:14:30.46#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:14:30.46#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:14:30.46#ibcon#[25=USB\r\n] 2006.229.10:14:30.46#ibcon#*before write, iclass 11, count 0 2006.229.10:14:30.46#ibcon#enter sib2, iclass 11, count 0 2006.229.10:14:30.46#ibcon#flushed, iclass 11, count 0 2006.229.10:14:30.46#ibcon#about to write, iclass 11, count 0 2006.229.10:14:30.46#ibcon#wrote, iclass 11, count 0 2006.229.10:14:30.46#ibcon#about to read 3, iclass 11, count 0 2006.229.10:14:30.49#ibcon#read 3, iclass 11, count 0 2006.229.10:14:30.49#ibcon#about to read 4, iclass 11, count 0 2006.229.10:14:30.49#ibcon#read 4, iclass 11, count 0 2006.229.10:14:30.49#ibcon#about to read 5, iclass 11, count 0 2006.229.10:14:30.49#ibcon#read 5, iclass 11, count 0 2006.229.10:14:30.49#ibcon#about to read 6, iclass 11, count 0 2006.229.10:14:30.49#ibcon#read 6, iclass 11, count 0 2006.229.10:14:30.49#ibcon#end of sib2, iclass 11, count 0 2006.229.10:14:30.49#ibcon#*after write, iclass 11, count 0 2006.229.10:14:30.49#ibcon#*before return 0, iclass 11, count 0 2006.229.10:14:30.49#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:30.49#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:30.49#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:14:30.49#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:14:30.49$vck44/valo=2,534.99 2006.229.10:14:30.49#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.10:14:30.49#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.10:14:30.49#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:30.49#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:30.49#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:30.49#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:30.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:14:30.49#ibcon#first serial, iclass 13, count 0 2006.229.10:14:30.49#ibcon#enter sib2, iclass 13, count 0 2006.229.10:14:30.49#ibcon#flushed, iclass 13, count 0 2006.229.10:14:30.49#ibcon#about to write, iclass 13, count 0 2006.229.10:14:30.49#ibcon#wrote, iclass 13, count 0 2006.229.10:14:30.49#ibcon#about to read 3, iclass 13, count 0 2006.229.10:14:30.51#ibcon#read 3, iclass 13, count 0 2006.229.10:14:30.51#ibcon#about to read 4, iclass 13, count 0 2006.229.10:14:30.51#ibcon#read 4, iclass 13, count 0 2006.229.10:14:30.51#ibcon#about to read 5, iclass 13, count 0 2006.229.10:14:30.51#ibcon#read 5, iclass 13, count 0 2006.229.10:14:30.51#ibcon#about to read 6, iclass 13, count 0 2006.229.10:14:30.51#ibcon#read 6, iclass 13, count 0 2006.229.10:14:30.51#ibcon#end of sib2, iclass 13, count 0 2006.229.10:14:30.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:14:30.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:14:30.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:14:30.51#ibcon#*before write, iclass 13, count 0 2006.229.10:14:30.51#ibcon#enter sib2, iclass 13, count 0 2006.229.10:14:30.51#ibcon#flushed, iclass 13, count 0 2006.229.10:14:30.51#ibcon#about to write, iclass 13, count 0 2006.229.10:14:30.51#ibcon#wrote, iclass 13, count 0 2006.229.10:14:30.51#ibcon#about to read 3, iclass 13, count 0 2006.229.10:14:30.55#ibcon#read 3, iclass 13, count 0 2006.229.10:14:30.55#ibcon#about to read 4, iclass 13, count 0 2006.229.10:14:30.55#ibcon#read 4, iclass 13, count 0 2006.229.10:14:30.55#ibcon#about to read 5, iclass 13, count 0 2006.229.10:14:30.55#ibcon#read 5, iclass 13, count 0 2006.229.10:14:30.55#ibcon#about to read 6, iclass 13, count 0 2006.229.10:14:30.55#ibcon#read 6, iclass 13, count 0 2006.229.10:14:30.55#ibcon#end of sib2, iclass 13, count 0 2006.229.10:14:30.55#ibcon#*after write, iclass 13, count 0 2006.229.10:14:30.55#ibcon#*before return 0, iclass 13, count 0 2006.229.10:14:30.55#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:30.55#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:30.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:14:30.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:14:30.55$vck44/va=2,7 2006.229.10:14:30.55#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.10:14:30.55#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.10:14:30.55#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:30.55#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:30.61#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:30.61#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:30.61#ibcon#enter wrdev, iclass 15, count 2 2006.229.10:14:30.61#ibcon#first serial, iclass 15, count 2 2006.229.10:14:30.61#ibcon#enter sib2, iclass 15, count 2 2006.229.10:14:30.61#ibcon#flushed, iclass 15, count 2 2006.229.10:14:30.61#ibcon#about to write, iclass 15, count 2 2006.229.10:14:30.61#ibcon#wrote, iclass 15, count 2 2006.229.10:14:30.61#ibcon#about to read 3, iclass 15, count 2 2006.229.10:14:30.63#ibcon#read 3, iclass 15, count 2 2006.229.10:14:30.63#ibcon#about to read 4, iclass 15, count 2 2006.229.10:14:30.63#ibcon#read 4, iclass 15, count 2 2006.229.10:14:30.63#ibcon#about to read 5, iclass 15, count 2 2006.229.10:14:30.63#ibcon#read 5, iclass 15, count 2 2006.229.10:14:30.63#ibcon#about to read 6, iclass 15, count 2 2006.229.10:14:30.63#ibcon#read 6, iclass 15, count 2 2006.229.10:14:30.63#ibcon#end of sib2, iclass 15, count 2 2006.229.10:14:30.63#ibcon#*mode == 0, iclass 15, count 2 2006.229.10:14:30.63#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.10:14:30.63#ibcon#[25=AT02-07\r\n] 2006.229.10:14:30.63#ibcon#*before write, iclass 15, count 2 2006.229.10:14:30.63#ibcon#enter sib2, iclass 15, count 2 2006.229.10:14:30.63#ibcon#flushed, iclass 15, count 2 2006.229.10:14:30.63#ibcon#about to write, iclass 15, count 2 2006.229.10:14:30.63#ibcon#wrote, iclass 15, count 2 2006.229.10:14:30.63#ibcon#about to read 3, iclass 15, count 2 2006.229.10:14:30.66#ibcon#read 3, iclass 15, count 2 2006.229.10:14:30.66#ibcon#about to read 4, iclass 15, count 2 2006.229.10:14:30.66#ibcon#read 4, iclass 15, count 2 2006.229.10:14:30.66#ibcon#about to read 5, iclass 15, count 2 2006.229.10:14:30.66#ibcon#read 5, iclass 15, count 2 2006.229.10:14:30.66#ibcon#about to read 6, iclass 15, count 2 2006.229.10:14:30.66#ibcon#read 6, iclass 15, count 2 2006.229.10:14:30.66#ibcon#end of sib2, iclass 15, count 2 2006.229.10:14:30.66#ibcon#*after write, iclass 15, count 2 2006.229.10:14:30.66#ibcon#*before return 0, iclass 15, count 2 2006.229.10:14:30.66#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:30.66#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:30.66#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.10:14:30.66#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:30.66#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:30.78#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:30.78#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:30.78#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:14:30.78#ibcon#first serial, iclass 15, count 0 2006.229.10:14:30.78#ibcon#enter sib2, iclass 15, count 0 2006.229.10:14:30.78#ibcon#flushed, iclass 15, count 0 2006.229.10:14:30.78#ibcon#about to write, iclass 15, count 0 2006.229.10:14:30.78#ibcon#wrote, iclass 15, count 0 2006.229.10:14:30.78#ibcon#about to read 3, iclass 15, count 0 2006.229.10:14:30.80#ibcon#read 3, iclass 15, count 0 2006.229.10:14:30.80#ibcon#about to read 4, iclass 15, count 0 2006.229.10:14:30.80#ibcon#read 4, iclass 15, count 0 2006.229.10:14:30.80#ibcon#about to read 5, iclass 15, count 0 2006.229.10:14:30.80#ibcon#read 5, iclass 15, count 0 2006.229.10:14:30.80#ibcon#about to read 6, iclass 15, count 0 2006.229.10:14:30.80#ibcon#read 6, iclass 15, count 0 2006.229.10:14:30.80#ibcon#end of sib2, iclass 15, count 0 2006.229.10:14:30.80#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:14:30.80#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:14:30.80#ibcon#[25=USB\r\n] 2006.229.10:14:30.80#ibcon#*before write, iclass 15, count 0 2006.229.10:14:30.80#ibcon#enter sib2, iclass 15, count 0 2006.229.10:14:30.80#ibcon#flushed, iclass 15, count 0 2006.229.10:14:30.80#ibcon#about to write, iclass 15, count 0 2006.229.10:14:30.80#ibcon#wrote, iclass 15, count 0 2006.229.10:14:30.80#ibcon#about to read 3, iclass 15, count 0 2006.229.10:14:30.83#ibcon#read 3, iclass 15, count 0 2006.229.10:14:30.83#ibcon#about to read 4, iclass 15, count 0 2006.229.10:14:30.83#ibcon#read 4, iclass 15, count 0 2006.229.10:14:30.83#ibcon#about to read 5, iclass 15, count 0 2006.229.10:14:30.83#ibcon#read 5, iclass 15, count 0 2006.229.10:14:30.83#ibcon#about to read 6, iclass 15, count 0 2006.229.10:14:30.83#ibcon#read 6, iclass 15, count 0 2006.229.10:14:30.83#ibcon#end of sib2, iclass 15, count 0 2006.229.10:14:30.83#ibcon#*after write, iclass 15, count 0 2006.229.10:14:30.83#ibcon#*before return 0, iclass 15, count 0 2006.229.10:14:30.83#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:30.83#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:30.83#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:14:30.83#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:14:30.83$vck44/valo=3,564.99 2006.229.10:14:30.83#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.10:14:30.83#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.10:14:30.83#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:30.83#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:30.83#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:30.83#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:30.83#ibcon#enter wrdev, iclass 17, count 0 2006.229.10:14:30.83#ibcon#first serial, iclass 17, count 0 2006.229.10:14:30.83#ibcon#enter sib2, iclass 17, count 0 2006.229.10:14:30.83#ibcon#flushed, iclass 17, count 0 2006.229.10:14:30.83#ibcon#about to write, iclass 17, count 0 2006.229.10:14:30.83#ibcon#wrote, iclass 17, count 0 2006.229.10:14:30.83#ibcon#about to read 3, iclass 17, count 0 2006.229.10:14:30.85#ibcon#read 3, iclass 17, count 0 2006.229.10:14:30.85#ibcon#about to read 4, iclass 17, count 0 2006.229.10:14:30.85#ibcon#read 4, iclass 17, count 0 2006.229.10:14:30.85#ibcon#about to read 5, iclass 17, count 0 2006.229.10:14:30.85#ibcon#read 5, iclass 17, count 0 2006.229.10:14:30.85#ibcon#about to read 6, iclass 17, count 0 2006.229.10:14:30.85#ibcon#read 6, iclass 17, count 0 2006.229.10:14:30.85#ibcon#end of sib2, iclass 17, count 0 2006.229.10:14:30.85#ibcon#*mode == 0, iclass 17, count 0 2006.229.10:14:30.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.10:14:30.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:14:30.85#ibcon#*before write, iclass 17, count 0 2006.229.10:14:30.85#ibcon#enter sib2, iclass 17, count 0 2006.229.10:14:30.85#ibcon#flushed, iclass 17, count 0 2006.229.10:14:30.85#ibcon#about to write, iclass 17, count 0 2006.229.10:14:30.85#ibcon#wrote, iclass 17, count 0 2006.229.10:14:30.85#ibcon#about to read 3, iclass 17, count 0 2006.229.10:14:30.89#ibcon#read 3, iclass 17, count 0 2006.229.10:14:30.89#ibcon#about to read 4, iclass 17, count 0 2006.229.10:14:30.89#ibcon#read 4, iclass 17, count 0 2006.229.10:14:30.89#ibcon#about to read 5, iclass 17, count 0 2006.229.10:14:30.89#ibcon#read 5, iclass 17, count 0 2006.229.10:14:30.89#ibcon#about to read 6, iclass 17, count 0 2006.229.10:14:30.89#ibcon#read 6, iclass 17, count 0 2006.229.10:14:30.89#ibcon#end of sib2, iclass 17, count 0 2006.229.10:14:30.89#ibcon#*after write, iclass 17, count 0 2006.229.10:14:30.89#ibcon#*before return 0, iclass 17, count 0 2006.229.10:14:30.89#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:30.89#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:30.89#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.10:14:30.89#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.10:14:30.89$vck44/va=3,6 2006.229.10:14:30.89#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.10:14:30.89#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.10:14:30.89#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:30.89#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:30.95#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:30.95#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:30.95#ibcon#enter wrdev, iclass 19, count 2 2006.229.10:14:30.95#ibcon#first serial, iclass 19, count 2 2006.229.10:14:30.95#ibcon#enter sib2, iclass 19, count 2 2006.229.10:14:30.95#ibcon#flushed, iclass 19, count 2 2006.229.10:14:30.95#ibcon#about to write, iclass 19, count 2 2006.229.10:14:30.95#ibcon#wrote, iclass 19, count 2 2006.229.10:14:30.95#ibcon#about to read 3, iclass 19, count 2 2006.229.10:14:30.97#ibcon#read 3, iclass 19, count 2 2006.229.10:14:30.97#ibcon#about to read 4, iclass 19, count 2 2006.229.10:14:30.97#ibcon#read 4, iclass 19, count 2 2006.229.10:14:30.97#ibcon#about to read 5, iclass 19, count 2 2006.229.10:14:30.97#ibcon#read 5, iclass 19, count 2 2006.229.10:14:30.97#ibcon#about to read 6, iclass 19, count 2 2006.229.10:14:30.97#ibcon#read 6, iclass 19, count 2 2006.229.10:14:30.97#ibcon#end of sib2, iclass 19, count 2 2006.229.10:14:30.97#ibcon#*mode == 0, iclass 19, count 2 2006.229.10:14:30.97#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.10:14:30.97#ibcon#[25=AT03-06\r\n] 2006.229.10:14:30.97#ibcon#*before write, iclass 19, count 2 2006.229.10:14:30.97#ibcon#enter sib2, iclass 19, count 2 2006.229.10:14:30.97#ibcon#flushed, iclass 19, count 2 2006.229.10:14:30.97#ibcon#about to write, iclass 19, count 2 2006.229.10:14:30.97#ibcon#wrote, iclass 19, count 2 2006.229.10:14:30.97#ibcon#about to read 3, iclass 19, count 2 2006.229.10:14:31.00#ibcon#read 3, iclass 19, count 2 2006.229.10:14:31.00#ibcon#about to read 4, iclass 19, count 2 2006.229.10:14:31.00#ibcon#read 4, iclass 19, count 2 2006.229.10:14:31.00#ibcon#about to read 5, iclass 19, count 2 2006.229.10:14:31.00#ibcon#read 5, iclass 19, count 2 2006.229.10:14:31.00#ibcon#about to read 6, iclass 19, count 2 2006.229.10:14:31.00#ibcon#read 6, iclass 19, count 2 2006.229.10:14:31.00#ibcon#end of sib2, iclass 19, count 2 2006.229.10:14:31.00#ibcon#*after write, iclass 19, count 2 2006.229.10:14:31.00#ibcon#*before return 0, iclass 19, count 2 2006.229.10:14:31.00#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:31.00#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:31.00#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.10:14:31.00#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:31.00#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:31.12#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:31.12#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:31.12#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:14:31.12#ibcon#first serial, iclass 19, count 0 2006.229.10:14:31.12#ibcon#enter sib2, iclass 19, count 0 2006.229.10:14:31.12#ibcon#flushed, iclass 19, count 0 2006.229.10:14:31.12#ibcon#about to write, iclass 19, count 0 2006.229.10:14:31.12#ibcon#wrote, iclass 19, count 0 2006.229.10:14:31.12#ibcon#about to read 3, iclass 19, count 0 2006.229.10:14:31.14#ibcon#read 3, iclass 19, count 0 2006.229.10:14:31.14#ibcon#about to read 4, iclass 19, count 0 2006.229.10:14:31.14#ibcon#read 4, iclass 19, count 0 2006.229.10:14:31.14#ibcon#about to read 5, iclass 19, count 0 2006.229.10:14:31.14#ibcon#read 5, iclass 19, count 0 2006.229.10:14:31.14#ibcon#about to read 6, iclass 19, count 0 2006.229.10:14:31.14#ibcon#read 6, iclass 19, count 0 2006.229.10:14:31.14#ibcon#end of sib2, iclass 19, count 0 2006.229.10:14:31.14#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:14:31.14#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:14:31.14#ibcon#[25=USB\r\n] 2006.229.10:14:31.14#ibcon#*before write, iclass 19, count 0 2006.229.10:14:31.14#ibcon#enter sib2, iclass 19, count 0 2006.229.10:14:31.14#ibcon#flushed, iclass 19, count 0 2006.229.10:14:31.14#ibcon#about to write, iclass 19, count 0 2006.229.10:14:31.14#ibcon#wrote, iclass 19, count 0 2006.229.10:14:31.14#ibcon#about to read 3, iclass 19, count 0 2006.229.10:14:31.17#ibcon#read 3, iclass 19, count 0 2006.229.10:14:31.17#ibcon#about to read 4, iclass 19, count 0 2006.229.10:14:31.17#ibcon#read 4, iclass 19, count 0 2006.229.10:14:31.17#ibcon#about to read 5, iclass 19, count 0 2006.229.10:14:31.17#ibcon#read 5, iclass 19, count 0 2006.229.10:14:31.17#ibcon#about to read 6, iclass 19, count 0 2006.229.10:14:31.17#ibcon#read 6, iclass 19, count 0 2006.229.10:14:31.17#ibcon#end of sib2, iclass 19, count 0 2006.229.10:14:31.17#ibcon#*after write, iclass 19, count 0 2006.229.10:14:31.17#ibcon#*before return 0, iclass 19, count 0 2006.229.10:14:31.17#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:31.17#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:31.17#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:14:31.17#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:14:31.17$vck44/valo=4,624.99 2006.229.10:14:31.17#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.10:14:31.17#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.10:14:31.17#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:31.17#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:31.17#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:31.17#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:31.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:14:31.17#ibcon#first serial, iclass 21, count 0 2006.229.10:14:31.17#ibcon#enter sib2, iclass 21, count 0 2006.229.10:14:31.17#ibcon#flushed, iclass 21, count 0 2006.229.10:14:31.17#ibcon#about to write, iclass 21, count 0 2006.229.10:14:31.17#ibcon#wrote, iclass 21, count 0 2006.229.10:14:31.17#ibcon#about to read 3, iclass 21, count 0 2006.229.10:14:31.19#ibcon#read 3, iclass 21, count 0 2006.229.10:14:31.19#ibcon#about to read 4, iclass 21, count 0 2006.229.10:14:31.19#ibcon#read 4, iclass 21, count 0 2006.229.10:14:31.19#ibcon#about to read 5, iclass 21, count 0 2006.229.10:14:31.19#ibcon#read 5, iclass 21, count 0 2006.229.10:14:31.19#ibcon#about to read 6, iclass 21, count 0 2006.229.10:14:31.19#ibcon#read 6, iclass 21, count 0 2006.229.10:14:31.19#ibcon#end of sib2, iclass 21, count 0 2006.229.10:14:31.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:14:31.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:14:31.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:14:31.19#ibcon#*before write, iclass 21, count 0 2006.229.10:14:31.19#ibcon#enter sib2, iclass 21, count 0 2006.229.10:14:31.19#ibcon#flushed, iclass 21, count 0 2006.229.10:14:31.19#ibcon#about to write, iclass 21, count 0 2006.229.10:14:31.19#ibcon#wrote, iclass 21, count 0 2006.229.10:14:31.19#ibcon#about to read 3, iclass 21, count 0 2006.229.10:14:31.23#ibcon#read 3, iclass 21, count 0 2006.229.10:14:31.23#ibcon#about to read 4, iclass 21, count 0 2006.229.10:14:31.23#ibcon#read 4, iclass 21, count 0 2006.229.10:14:31.23#ibcon#about to read 5, iclass 21, count 0 2006.229.10:14:31.23#ibcon#read 5, iclass 21, count 0 2006.229.10:14:31.23#ibcon#about to read 6, iclass 21, count 0 2006.229.10:14:31.23#ibcon#read 6, iclass 21, count 0 2006.229.10:14:31.23#ibcon#end of sib2, iclass 21, count 0 2006.229.10:14:31.23#ibcon#*after write, iclass 21, count 0 2006.229.10:14:31.23#ibcon#*before return 0, iclass 21, count 0 2006.229.10:14:31.23#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:31.23#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:31.23#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:14:31.23#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:14:31.23$vck44/va=4,7 2006.229.10:14:31.23#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.10:14:31.23#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.10:14:31.23#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:31.23#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:31.29#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:31.29#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:31.29#ibcon#enter wrdev, iclass 23, count 2 2006.229.10:14:31.29#ibcon#first serial, iclass 23, count 2 2006.229.10:14:31.29#ibcon#enter sib2, iclass 23, count 2 2006.229.10:14:31.29#ibcon#flushed, iclass 23, count 2 2006.229.10:14:31.29#ibcon#about to write, iclass 23, count 2 2006.229.10:14:31.29#ibcon#wrote, iclass 23, count 2 2006.229.10:14:31.29#ibcon#about to read 3, iclass 23, count 2 2006.229.10:14:31.31#ibcon#read 3, iclass 23, count 2 2006.229.10:14:31.31#ibcon#about to read 4, iclass 23, count 2 2006.229.10:14:31.31#ibcon#read 4, iclass 23, count 2 2006.229.10:14:31.31#ibcon#about to read 5, iclass 23, count 2 2006.229.10:14:31.31#ibcon#read 5, iclass 23, count 2 2006.229.10:14:31.31#ibcon#about to read 6, iclass 23, count 2 2006.229.10:14:31.31#ibcon#read 6, iclass 23, count 2 2006.229.10:14:31.31#ibcon#end of sib2, iclass 23, count 2 2006.229.10:14:31.31#ibcon#*mode == 0, iclass 23, count 2 2006.229.10:14:31.31#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.10:14:31.31#ibcon#[25=AT04-07\r\n] 2006.229.10:14:31.31#ibcon#*before write, iclass 23, count 2 2006.229.10:14:31.31#ibcon#enter sib2, iclass 23, count 2 2006.229.10:14:31.31#ibcon#flushed, iclass 23, count 2 2006.229.10:14:31.31#ibcon#about to write, iclass 23, count 2 2006.229.10:14:31.31#ibcon#wrote, iclass 23, count 2 2006.229.10:14:31.31#ibcon#about to read 3, iclass 23, count 2 2006.229.10:14:31.34#ibcon#read 3, iclass 23, count 2 2006.229.10:14:31.34#ibcon#about to read 4, iclass 23, count 2 2006.229.10:14:31.34#ibcon#read 4, iclass 23, count 2 2006.229.10:14:31.34#ibcon#about to read 5, iclass 23, count 2 2006.229.10:14:31.34#ibcon#read 5, iclass 23, count 2 2006.229.10:14:31.34#ibcon#about to read 6, iclass 23, count 2 2006.229.10:14:31.34#ibcon#read 6, iclass 23, count 2 2006.229.10:14:31.34#ibcon#end of sib2, iclass 23, count 2 2006.229.10:14:31.34#ibcon#*after write, iclass 23, count 2 2006.229.10:14:31.34#ibcon#*before return 0, iclass 23, count 2 2006.229.10:14:31.34#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:31.34#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:31.34#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.10:14:31.34#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:31.34#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:31.46#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:31.46#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:31.46#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:14:31.46#ibcon#first serial, iclass 23, count 0 2006.229.10:14:31.46#ibcon#enter sib2, iclass 23, count 0 2006.229.10:14:31.46#ibcon#flushed, iclass 23, count 0 2006.229.10:14:31.46#ibcon#about to write, iclass 23, count 0 2006.229.10:14:31.46#ibcon#wrote, iclass 23, count 0 2006.229.10:14:31.46#ibcon#about to read 3, iclass 23, count 0 2006.229.10:14:31.48#ibcon#read 3, iclass 23, count 0 2006.229.10:14:31.48#ibcon#about to read 4, iclass 23, count 0 2006.229.10:14:31.48#ibcon#read 4, iclass 23, count 0 2006.229.10:14:31.48#ibcon#about to read 5, iclass 23, count 0 2006.229.10:14:31.48#ibcon#read 5, iclass 23, count 0 2006.229.10:14:31.48#ibcon#about to read 6, iclass 23, count 0 2006.229.10:14:31.48#ibcon#read 6, iclass 23, count 0 2006.229.10:14:31.48#ibcon#end of sib2, iclass 23, count 0 2006.229.10:14:31.48#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:14:31.48#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:14:31.48#ibcon#[25=USB\r\n] 2006.229.10:14:31.48#ibcon#*before write, iclass 23, count 0 2006.229.10:14:31.48#ibcon#enter sib2, iclass 23, count 0 2006.229.10:14:31.48#ibcon#flushed, iclass 23, count 0 2006.229.10:14:31.48#ibcon#about to write, iclass 23, count 0 2006.229.10:14:31.48#ibcon#wrote, iclass 23, count 0 2006.229.10:14:31.48#ibcon#about to read 3, iclass 23, count 0 2006.229.10:14:31.51#ibcon#read 3, iclass 23, count 0 2006.229.10:14:31.51#ibcon#about to read 4, iclass 23, count 0 2006.229.10:14:31.51#ibcon#read 4, iclass 23, count 0 2006.229.10:14:31.51#ibcon#about to read 5, iclass 23, count 0 2006.229.10:14:31.51#ibcon#read 5, iclass 23, count 0 2006.229.10:14:31.51#ibcon#about to read 6, iclass 23, count 0 2006.229.10:14:31.51#ibcon#read 6, iclass 23, count 0 2006.229.10:14:31.51#ibcon#end of sib2, iclass 23, count 0 2006.229.10:14:31.51#ibcon#*after write, iclass 23, count 0 2006.229.10:14:31.51#ibcon#*before return 0, iclass 23, count 0 2006.229.10:14:31.51#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:31.51#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:31.51#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:14:31.51#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:14:31.51$vck44/valo=5,734.99 2006.229.10:14:31.51#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.10:14:31.51#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.10:14:31.51#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:31.51#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:31.51#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:31.51#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:31.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:14:31.51#ibcon#first serial, iclass 25, count 0 2006.229.10:14:31.51#ibcon#enter sib2, iclass 25, count 0 2006.229.10:14:31.51#ibcon#flushed, iclass 25, count 0 2006.229.10:14:31.51#ibcon#about to write, iclass 25, count 0 2006.229.10:14:31.51#ibcon#wrote, iclass 25, count 0 2006.229.10:14:31.51#ibcon#about to read 3, iclass 25, count 0 2006.229.10:14:31.53#ibcon#read 3, iclass 25, count 0 2006.229.10:14:31.53#ibcon#about to read 4, iclass 25, count 0 2006.229.10:14:31.53#ibcon#read 4, iclass 25, count 0 2006.229.10:14:31.53#ibcon#about to read 5, iclass 25, count 0 2006.229.10:14:31.53#ibcon#read 5, iclass 25, count 0 2006.229.10:14:31.53#ibcon#about to read 6, iclass 25, count 0 2006.229.10:14:31.53#ibcon#read 6, iclass 25, count 0 2006.229.10:14:31.53#ibcon#end of sib2, iclass 25, count 0 2006.229.10:14:31.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:14:31.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:14:31.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:14:31.53#ibcon#*before write, iclass 25, count 0 2006.229.10:14:31.53#ibcon#enter sib2, iclass 25, count 0 2006.229.10:14:31.53#ibcon#flushed, iclass 25, count 0 2006.229.10:14:31.53#ibcon#about to write, iclass 25, count 0 2006.229.10:14:31.53#ibcon#wrote, iclass 25, count 0 2006.229.10:14:31.53#ibcon#about to read 3, iclass 25, count 0 2006.229.10:14:31.57#ibcon#read 3, iclass 25, count 0 2006.229.10:14:31.57#ibcon#about to read 4, iclass 25, count 0 2006.229.10:14:31.57#ibcon#read 4, iclass 25, count 0 2006.229.10:14:31.57#ibcon#about to read 5, iclass 25, count 0 2006.229.10:14:31.57#ibcon#read 5, iclass 25, count 0 2006.229.10:14:31.57#ibcon#about to read 6, iclass 25, count 0 2006.229.10:14:31.57#ibcon#read 6, iclass 25, count 0 2006.229.10:14:31.57#ibcon#end of sib2, iclass 25, count 0 2006.229.10:14:31.57#ibcon#*after write, iclass 25, count 0 2006.229.10:14:31.57#ibcon#*before return 0, iclass 25, count 0 2006.229.10:14:31.57#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:31.57#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:31.57#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:14:31.57#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:14:31.57$vck44/va=5,4 2006.229.10:14:31.57#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.10:14:31.57#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.10:14:31.57#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:31.57#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:31.63#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:31.63#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:31.63#ibcon#enter wrdev, iclass 27, count 2 2006.229.10:14:31.63#ibcon#first serial, iclass 27, count 2 2006.229.10:14:31.63#ibcon#enter sib2, iclass 27, count 2 2006.229.10:14:31.63#ibcon#flushed, iclass 27, count 2 2006.229.10:14:31.63#ibcon#about to write, iclass 27, count 2 2006.229.10:14:31.63#ibcon#wrote, iclass 27, count 2 2006.229.10:14:31.63#ibcon#about to read 3, iclass 27, count 2 2006.229.10:14:31.65#ibcon#read 3, iclass 27, count 2 2006.229.10:14:31.65#ibcon#about to read 4, iclass 27, count 2 2006.229.10:14:31.65#ibcon#read 4, iclass 27, count 2 2006.229.10:14:31.65#ibcon#about to read 5, iclass 27, count 2 2006.229.10:14:31.65#ibcon#read 5, iclass 27, count 2 2006.229.10:14:31.65#ibcon#about to read 6, iclass 27, count 2 2006.229.10:14:31.65#ibcon#read 6, iclass 27, count 2 2006.229.10:14:31.65#ibcon#end of sib2, iclass 27, count 2 2006.229.10:14:31.65#ibcon#*mode == 0, iclass 27, count 2 2006.229.10:14:31.65#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.10:14:31.65#ibcon#[25=AT05-04\r\n] 2006.229.10:14:31.65#ibcon#*before write, iclass 27, count 2 2006.229.10:14:31.65#ibcon#enter sib2, iclass 27, count 2 2006.229.10:14:31.65#ibcon#flushed, iclass 27, count 2 2006.229.10:14:31.65#ibcon#about to write, iclass 27, count 2 2006.229.10:14:31.65#ibcon#wrote, iclass 27, count 2 2006.229.10:14:31.65#ibcon#about to read 3, iclass 27, count 2 2006.229.10:14:31.68#ibcon#read 3, iclass 27, count 2 2006.229.10:14:31.68#ibcon#about to read 4, iclass 27, count 2 2006.229.10:14:31.68#ibcon#read 4, iclass 27, count 2 2006.229.10:14:31.68#ibcon#about to read 5, iclass 27, count 2 2006.229.10:14:31.68#ibcon#read 5, iclass 27, count 2 2006.229.10:14:31.68#ibcon#about to read 6, iclass 27, count 2 2006.229.10:14:31.68#ibcon#read 6, iclass 27, count 2 2006.229.10:14:31.68#ibcon#end of sib2, iclass 27, count 2 2006.229.10:14:31.68#ibcon#*after write, iclass 27, count 2 2006.229.10:14:31.68#ibcon#*before return 0, iclass 27, count 2 2006.229.10:14:31.68#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:31.68#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:31.68#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.10:14:31.68#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:31.68#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:31.80#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:31.80#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:31.80#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:14:31.80#ibcon#first serial, iclass 27, count 0 2006.229.10:14:31.80#ibcon#enter sib2, iclass 27, count 0 2006.229.10:14:31.80#ibcon#flushed, iclass 27, count 0 2006.229.10:14:31.80#ibcon#about to write, iclass 27, count 0 2006.229.10:14:31.80#ibcon#wrote, iclass 27, count 0 2006.229.10:14:31.80#ibcon#about to read 3, iclass 27, count 0 2006.229.10:14:31.82#ibcon#read 3, iclass 27, count 0 2006.229.10:14:31.82#ibcon#about to read 4, iclass 27, count 0 2006.229.10:14:31.82#ibcon#read 4, iclass 27, count 0 2006.229.10:14:31.82#ibcon#about to read 5, iclass 27, count 0 2006.229.10:14:31.82#ibcon#read 5, iclass 27, count 0 2006.229.10:14:31.82#ibcon#about to read 6, iclass 27, count 0 2006.229.10:14:31.82#ibcon#read 6, iclass 27, count 0 2006.229.10:14:31.82#ibcon#end of sib2, iclass 27, count 0 2006.229.10:14:31.82#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:14:31.82#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:14:31.82#ibcon#[25=USB\r\n] 2006.229.10:14:31.82#ibcon#*before write, iclass 27, count 0 2006.229.10:14:31.82#ibcon#enter sib2, iclass 27, count 0 2006.229.10:14:31.82#ibcon#flushed, iclass 27, count 0 2006.229.10:14:31.82#ibcon#about to write, iclass 27, count 0 2006.229.10:14:31.82#ibcon#wrote, iclass 27, count 0 2006.229.10:14:31.82#ibcon#about to read 3, iclass 27, count 0 2006.229.10:14:31.85#ibcon#read 3, iclass 27, count 0 2006.229.10:14:31.85#ibcon#about to read 4, iclass 27, count 0 2006.229.10:14:31.85#ibcon#read 4, iclass 27, count 0 2006.229.10:14:31.85#ibcon#about to read 5, iclass 27, count 0 2006.229.10:14:31.85#ibcon#read 5, iclass 27, count 0 2006.229.10:14:31.85#ibcon#about to read 6, iclass 27, count 0 2006.229.10:14:31.85#ibcon#read 6, iclass 27, count 0 2006.229.10:14:31.85#ibcon#end of sib2, iclass 27, count 0 2006.229.10:14:31.85#ibcon#*after write, iclass 27, count 0 2006.229.10:14:31.85#ibcon#*before return 0, iclass 27, count 0 2006.229.10:14:31.85#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:31.85#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:31.85#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:14:31.85#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:14:31.85$vck44/valo=6,814.99 2006.229.10:14:31.85#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.10:14:31.85#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.10:14:31.85#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:31.85#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:31.85#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:31.85#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:31.85#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:14:31.85#ibcon#first serial, iclass 29, count 0 2006.229.10:14:31.85#ibcon#enter sib2, iclass 29, count 0 2006.229.10:14:31.85#ibcon#flushed, iclass 29, count 0 2006.229.10:14:31.85#ibcon#about to write, iclass 29, count 0 2006.229.10:14:31.85#ibcon#wrote, iclass 29, count 0 2006.229.10:14:31.85#ibcon#about to read 3, iclass 29, count 0 2006.229.10:14:31.87#ibcon#read 3, iclass 29, count 0 2006.229.10:14:31.87#ibcon#about to read 4, iclass 29, count 0 2006.229.10:14:31.87#ibcon#read 4, iclass 29, count 0 2006.229.10:14:31.87#ibcon#about to read 5, iclass 29, count 0 2006.229.10:14:31.87#ibcon#read 5, iclass 29, count 0 2006.229.10:14:31.87#ibcon#about to read 6, iclass 29, count 0 2006.229.10:14:31.87#ibcon#read 6, iclass 29, count 0 2006.229.10:14:31.87#ibcon#end of sib2, iclass 29, count 0 2006.229.10:14:31.87#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:14:31.87#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:14:31.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:14:31.87#ibcon#*before write, iclass 29, count 0 2006.229.10:14:31.87#ibcon#enter sib2, iclass 29, count 0 2006.229.10:14:31.87#ibcon#flushed, iclass 29, count 0 2006.229.10:14:31.87#ibcon#about to write, iclass 29, count 0 2006.229.10:14:31.87#ibcon#wrote, iclass 29, count 0 2006.229.10:14:31.87#ibcon#about to read 3, iclass 29, count 0 2006.229.10:14:31.91#ibcon#read 3, iclass 29, count 0 2006.229.10:14:31.91#ibcon#about to read 4, iclass 29, count 0 2006.229.10:14:31.91#ibcon#read 4, iclass 29, count 0 2006.229.10:14:31.91#ibcon#about to read 5, iclass 29, count 0 2006.229.10:14:31.91#ibcon#read 5, iclass 29, count 0 2006.229.10:14:31.91#ibcon#about to read 6, iclass 29, count 0 2006.229.10:14:31.91#ibcon#read 6, iclass 29, count 0 2006.229.10:14:31.91#ibcon#end of sib2, iclass 29, count 0 2006.229.10:14:31.91#ibcon#*after write, iclass 29, count 0 2006.229.10:14:31.91#ibcon#*before return 0, iclass 29, count 0 2006.229.10:14:31.91#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:31.91#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:31.91#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:14:31.91#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:14:31.91$vck44/va=6,4 2006.229.10:14:31.91#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.10:14:31.91#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.10:14:31.91#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:31.91#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:31.97#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:31.97#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:31.97#ibcon#enter wrdev, iclass 31, count 2 2006.229.10:14:31.97#ibcon#first serial, iclass 31, count 2 2006.229.10:14:31.97#ibcon#enter sib2, iclass 31, count 2 2006.229.10:14:31.97#ibcon#flushed, iclass 31, count 2 2006.229.10:14:31.97#ibcon#about to write, iclass 31, count 2 2006.229.10:14:31.97#ibcon#wrote, iclass 31, count 2 2006.229.10:14:31.97#ibcon#about to read 3, iclass 31, count 2 2006.229.10:14:31.99#ibcon#read 3, iclass 31, count 2 2006.229.10:14:31.99#ibcon#about to read 4, iclass 31, count 2 2006.229.10:14:31.99#ibcon#read 4, iclass 31, count 2 2006.229.10:14:31.99#ibcon#about to read 5, iclass 31, count 2 2006.229.10:14:31.99#ibcon#read 5, iclass 31, count 2 2006.229.10:14:31.99#ibcon#about to read 6, iclass 31, count 2 2006.229.10:14:31.99#ibcon#read 6, iclass 31, count 2 2006.229.10:14:31.99#ibcon#end of sib2, iclass 31, count 2 2006.229.10:14:31.99#ibcon#*mode == 0, iclass 31, count 2 2006.229.10:14:31.99#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.10:14:31.99#ibcon#[25=AT06-04\r\n] 2006.229.10:14:31.99#ibcon#*before write, iclass 31, count 2 2006.229.10:14:31.99#ibcon#enter sib2, iclass 31, count 2 2006.229.10:14:31.99#ibcon#flushed, iclass 31, count 2 2006.229.10:14:31.99#ibcon#about to write, iclass 31, count 2 2006.229.10:14:31.99#ibcon#wrote, iclass 31, count 2 2006.229.10:14:31.99#ibcon#about to read 3, iclass 31, count 2 2006.229.10:14:32.02#ibcon#read 3, iclass 31, count 2 2006.229.10:14:32.02#ibcon#about to read 4, iclass 31, count 2 2006.229.10:14:32.02#ibcon#read 4, iclass 31, count 2 2006.229.10:14:32.02#ibcon#about to read 5, iclass 31, count 2 2006.229.10:14:32.02#ibcon#read 5, iclass 31, count 2 2006.229.10:14:32.02#ibcon#about to read 6, iclass 31, count 2 2006.229.10:14:32.02#ibcon#read 6, iclass 31, count 2 2006.229.10:14:32.02#ibcon#end of sib2, iclass 31, count 2 2006.229.10:14:32.02#ibcon#*after write, iclass 31, count 2 2006.229.10:14:32.02#ibcon#*before return 0, iclass 31, count 2 2006.229.10:14:32.02#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:32.02#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:32.02#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.10:14:32.02#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:32.02#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:32.14#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:32.14#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:32.14#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:14:32.14#ibcon#first serial, iclass 31, count 0 2006.229.10:14:32.14#ibcon#enter sib2, iclass 31, count 0 2006.229.10:14:32.14#ibcon#flushed, iclass 31, count 0 2006.229.10:14:32.14#ibcon#about to write, iclass 31, count 0 2006.229.10:14:32.14#ibcon#wrote, iclass 31, count 0 2006.229.10:14:32.14#ibcon#about to read 3, iclass 31, count 0 2006.229.10:14:32.16#ibcon#read 3, iclass 31, count 0 2006.229.10:14:32.16#ibcon#about to read 4, iclass 31, count 0 2006.229.10:14:32.16#ibcon#read 4, iclass 31, count 0 2006.229.10:14:32.16#ibcon#about to read 5, iclass 31, count 0 2006.229.10:14:32.16#ibcon#read 5, iclass 31, count 0 2006.229.10:14:32.16#ibcon#about to read 6, iclass 31, count 0 2006.229.10:14:32.16#ibcon#read 6, iclass 31, count 0 2006.229.10:14:32.16#ibcon#end of sib2, iclass 31, count 0 2006.229.10:14:32.16#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:14:32.16#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:14:32.16#ibcon#[25=USB\r\n] 2006.229.10:14:32.16#ibcon#*before write, iclass 31, count 0 2006.229.10:14:32.16#ibcon#enter sib2, iclass 31, count 0 2006.229.10:14:32.16#ibcon#flushed, iclass 31, count 0 2006.229.10:14:32.16#ibcon#about to write, iclass 31, count 0 2006.229.10:14:32.16#ibcon#wrote, iclass 31, count 0 2006.229.10:14:32.16#ibcon#about to read 3, iclass 31, count 0 2006.229.10:14:32.19#ibcon#read 3, iclass 31, count 0 2006.229.10:14:32.19#ibcon#about to read 4, iclass 31, count 0 2006.229.10:14:32.19#ibcon#read 4, iclass 31, count 0 2006.229.10:14:32.19#ibcon#about to read 5, iclass 31, count 0 2006.229.10:14:32.19#ibcon#read 5, iclass 31, count 0 2006.229.10:14:32.19#ibcon#about to read 6, iclass 31, count 0 2006.229.10:14:32.19#ibcon#read 6, iclass 31, count 0 2006.229.10:14:32.19#ibcon#end of sib2, iclass 31, count 0 2006.229.10:14:32.19#ibcon#*after write, iclass 31, count 0 2006.229.10:14:32.19#ibcon#*before return 0, iclass 31, count 0 2006.229.10:14:32.19#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:32.19#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:32.19#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:14:32.19#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:14:32.19$vck44/valo=7,864.99 2006.229.10:14:32.19#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.10:14:32.19#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.10:14:32.19#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:32.19#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:32.19#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:32.19#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:32.19#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:14:32.19#ibcon#first serial, iclass 33, count 0 2006.229.10:14:32.19#ibcon#enter sib2, iclass 33, count 0 2006.229.10:14:32.19#ibcon#flushed, iclass 33, count 0 2006.229.10:14:32.19#ibcon#about to write, iclass 33, count 0 2006.229.10:14:32.19#ibcon#wrote, iclass 33, count 0 2006.229.10:14:32.19#ibcon#about to read 3, iclass 33, count 0 2006.229.10:14:32.21#ibcon#read 3, iclass 33, count 0 2006.229.10:14:32.21#ibcon#about to read 4, iclass 33, count 0 2006.229.10:14:32.21#ibcon#read 4, iclass 33, count 0 2006.229.10:14:32.21#ibcon#about to read 5, iclass 33, count 0 2006.229.10:14:32.21#ibcon#read 5, iclass 33, count 0 2006.229.10:14:32.21#ibcon#about to read 6, iclass 33, count 0 2006.229.10:14:32.21#ibcon#read 6, iclass 33, count 0 2006.229.10:14:32.21#ibcon#end of sib2, iclass 33, count 0 2006.229.10:14:32.21#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:14:32.21#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:14:32.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:14:32.21#ibcon#*before write, iclass 33, count 0 2006.229.10:14:32.21#ibcon#enter sib2, iclass 33, count 0 2006.229.10:14:32.21#ibcon#flushed, iclass 33, count 0 2006.229.10:14:32.21#ibcon#about to write, iclass 33, count 0 2006.229.10:14:32.21#ibcon#wrote, iclass 33, count 0 2006.229.10:14:32.21#ibcon#about to read 3, iclass 33, count 0 2006.229.10:14:32.25#ibcon#read 3, iclass 33, count 0 2006.229.10:14:32.25#ibcon#about to read 4, iclass 33, count 0 2006.229.10:14:32.25#ibcon#read 4, iclass 33, count 0 2006.229.10:14:32.25#ibcon#about to read 5, iclass 33, count 0 2006.229.10:14:32.25#ibcon#read 5, iclass 33, count 0 2006.229.10:14:32.25#ibcon#about to read 6, iclass 33, count 0 2006.229.10:14:32.25#ibcon#read 6, iclass 33, count 0 2006.229.10:14:32.25#ibcon#end of sib2, iclass 33, count 0 2006.229.10:14:32.25#ibcon#*after write, iclass 33, count 0 2006.229.10:14:32.25#ibcon#*before return 0, iclass 33, count 0 2006.229.10:14:32.25#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:32.25#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:32.25#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:14:32.25#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:14:32.25$vck44/va=7,5 2006.229.10:14:32.25#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.10:14:32.25#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.10:14:32.25#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:32.25#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:32.31#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:32.31#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:32.31#ibcon#enter wrdev, iclass 35, count 2 2006.229.10:14:32.31#ibcon#first serial, iclass 35, count 2 2006.229.10:14:32.31#ibcon#enter sib2, iclass 35, count 2 2006.229.10:14:32.31#ibcon#flushed, iclass 35, count 2 2006.229.10:14:32.31#ibcon#about to write, iclass 35, count 2 2006.229.10:14:32.31#ibcon#wrote, iclass 35, count 2 2006.229.10:14:32.31#ibcon#about to read 3, iclass 35, count 2 2006.229.10:14:32.33#ibcon#read 3, iclass 35, count 2 2006.229.10:14:32.33#ibcon#about to read 4, iclass 35, count 2 2006.229.10:14:32.33#ibcon#read 4, iclass 35, count 2 2006.229.10:14:32.33#ibcon#about to read 5, iclass 35, count 2 2006.229.10:14:32.33#ibcon#read 5, iclass 35, count 2 2006.229.10:14:32.33#ibcon#about to read 6, iclass 35, count 2 2006.229.10:14:32.33#ibcon#read 6, iclass 35, count 2 2006.229.10:14:32.33#ibcon#end of sib2, iclass 35, count 2 2006.229.10:14:32.33#ibcon#*mode == 0, iclass 35, count 2 2006.229.10:14:32.33#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.10:14:32.33#ibcon#[25=AT07-05\r\n] 2006.229.10:14:32.33#ibcon#*before write, iclass 35, count 2 2006.229.10:14:32.33#ibcon#enter sib2, iclass 35, count 2 2006.229.10:14:32.33#ibcon#flushed, iclass 35, count 2 2006.229.10:14:32.33#ibcon#about to write, iclass 35, count 2 2006.229.10:14:32.33#ibcon#wrote, iclass 35, count 2 2006.229.10:14:32.33#ibcon#about to read 3, iclass 35, count 2 2006.229.10:14:32.36#ibcon#read 3, iclass 35, count 2 2006.229.10:14:32.36#ibcon#about to read 4, iclass 35, count 2 2006.229.10:14:32.36#ibcon#read 4, iclass 35, count 2 2006.229.10:14:32.36#ibcon#about to read 5, iclass 35, count 2 2006.229.10:14:32.36#ibcon#read 5, iclass 35, count 2 2006.229.10:14:32.36#ibcon#about to read 6, iclass 35, count 2 2006.229.10:14:32.36#ibcon#read 6, iclass 35, count 2 2006.229.10:14:32.36#ibcon#end of sib2, iclass 35, count 2 2006.229.10:14:32.36#ibcon#*after write, iclass 35, count 2 2006.229.10:14:32.36#ibcon#*before return 0, iclass 35, count 2 2006.229.10:14:32.36#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:32.36#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:32.36#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.10:14:32.36#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:32.36#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:32.48#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:32.48#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:32.48#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:14:32.48#ibcon#first serial, iclass 35, count 0 2006.229.10:14:32.48#ibcon#enter sib2, iclass 35, count 0 2006.229.10:14:32.48#ibcon#flushed, iclass 35, count 0 2006.229.10:14:32.48#ibcon#about to write, iclass 35, count 0 2006.229.10:14:32.48#ibcon#wrote, iclass 35, count 0 2006.229.10:14:32.48#ibcon#about to read 3, iclass 35, count 0 2006.229.10:14:32.50#ibcon#read 3, iclass 35, count 0 2006.229.10:14:32.50#ibcon#about to read 4, iclass 35, count 0 2006.229.10:14:32.50#ibcon#read 4, iclass 35, count 0 2006.229.10:14:32.50#ibcon#about to read 5, iclass 35, count 0 2006.229.10:14:32.50#ibcon#read 5, iclass 35, count 0 2006.229.10:14:32.50#ibcon#about to read 6, iclass 35, count 0 2006.229.10:14:32.50#ibcon#read 6, iclass 35, count 0 2006.229.10:14:32.50#ibcon#end of sib2, iclass 35, count 0 2006.229.10:14:32.50#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:14:32.50#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:14:32.50#ibcon#[25=USB\r\n] 2006.229.10:14:32.50#ibcon#*before write, iclass 35, count 0 2006.229.10:14:32.50#ibcon#enter sib2, iclass 35, count 0 2006.229.10:14:32.50#ibcon#flushed, iclass 35, count 0 2006.229.10:14:32.50#ibcon#about to write, iclass 35, count 0 2006.229.10:14:32.50#ibcon#wrote, iclass 35, count 0 2006.229.10:14:32.50#ibcon#about to read 3, iclass 35, count 0 2006.229.10:14:32.53#ibcon#read 3, iclass 35, count 0 2006.229.10:14:32.53#ibcon#about to read 4, iclass 35, count 0 2006.229.10:14:32.53#ibcon#read 4, iclass 35, count 0 2006.229.10:14:32.53#ibcon#about to read 5, iclass 35, count 0 2006.229.10:14:32.53#ibcon#read 5, iclass 35, count 0 2006.229.10:14:32.53#ibcon#about to read 6, iclass 35, count 0 2006.229.10:14:32.53#ibcon#read 6, iclass 35, count 0 2006.229.10:14:32.53#ibcon#end of sib2, iclass 35, count 0 2006.229.10:14:32.53#ibcon#*after write, iclass 35, count 0 2006.229.10:14:32.53#ibcon#*before return 0, iclass 35, count 0 2006.229.10:14:32.53#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:32.53#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:32.53#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:14:32.53#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:14:32.53$vck44/valo=8,884.99 2006.229.10:14:32.53#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.10:14:32.53#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.10:14:32.53#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:32.53#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:32.53#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:32.53#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:32.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:14:32.53#ibcon#first serial, iclass 37, count 0 2006.229.10:14:32.53#ibcon#enter sib2, iclass 37, count 0 2006.229.10:14:32.53#ibcon#flushed, iclass 37, count 0 2006.229.10:14:32.53#ibcon#about to write, iclass 37, count 0 2006.229.10:14:32.53#ibcon#wrote, iclass 37, count 0 2006.229.10:14:32.53#ibcon#about to read 3, iclass 37, count 0 2006.229.10:14:32.55#ibcon#read 3, iclass 37, count 0 2006.229.10:14:32.55#ibcon#about to read 4, iclass 37, count 0 2006.229.10:14:32.55#ibcon#read 4, iclass 37, count 0 2006.229.10:14:32.55#ibcon#about to read 5, iclass 37, count 0 2006.229.10:14:32.55#ibcon#read 5, iclass 37, count 0 2006.229.10:14:32.55#ibcon#about to read 6, iclass 37, count 0 2006.229.10:14:32.55#ibcon#read 6, iclass 37, count 0 2006.229.10:14:32.55#ibcon#end of sib2, iclass 37, count 0 2006.229.10:14:32.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:14:32.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:14:32.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:14:32.55#ibcon#*before write, iclass 37, count 0 2006.229.10:14:32.55#ibcon#enter sib2, iclass 37, count 0 2006.229.10:14:32.55#ibcon#flushed, iclass 37, count 0 2006.229.10:14:32.55#ibcon#about to write, iclass 37, count 0 2006.229.10:14:32.55#ibcon#wrote, iclass 37, count 0 2006.229.10:14:32.55#ibcon#about to read 3, iclass 37, count 0 2006.229.10:14:32.59#ibcon#read 3, iclass 37, count 0 2006.229.10:14:32.59#ibcon#about to read 4, iclass 37, count 0 2006.229.10:14:32.59#ibcon#read 4, iclass 37, count 0 2006.229.10:14:32.59#ibcon#about to read 5, iclass 37, count 0 2006.229.10:14:32.59#ibcon#read 5, iclass 37, count 0 2006.229.10:14:32.59#ibcon#about to read 6, iclass 37, count 0 2006.229.10:14:32.59#ibcon#read 6, iclass 37, count 0 2006.229.10:14:32.59#ibcon#end of sib2, iclass 37, count 0 2006.229.10:14:32.59#ibcon#*after write, iclass 37, count 0 2006.229.10:14:32.59#ibcon#*before return 0, iclass 37, count 0 2006.229.10:14:32.59#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:32.59#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:32.59#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:14:32.59#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:14:32.59$vck44/va=8,6 2006.229.10:14:32.59#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.10:14:32.59#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.10:14:32.59#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:32.59#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:14:32.65#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:14:32.65#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:14:32.65#ibcon#enter wrdev, iclass 39, count 2 2006.229.10:14:32.65#ibcon#first serial, iclass 39, count 2 2006.229.10:14:32.65#ibcon#enter sib2, iclass 39, count 2 2006.229.10:14:32.65#ibcon#flushed, iclass 39, count 2 2006.229.10:14:32.65#ibcon#about to write, iclass 39, count 2 2006.229.10:14:32.65#ibcon#wrote, iclass 39, count 2 2006.229.10:14:32.65#ibcon#about to read 3, iclass 39, count 2 2006.229.10:14:32.67#ibcon#read 3, iclass 39, count 2 2006.229.10:14:32.67#ibcon#about to read 4, iclass 39, count 2 2006.229.10:14:32.67#ibcon#read 4, iclass 39, count 2 2006.229.10:14:32.67#ibcon#about to read 5, iclass 39, count 2 2006.229.10:14:32.67#ibcon#read 5, iclass 39, count 2 2006.229.10:14:32.67#ibcon#about to read 6, iclass 39, count 2 2006.229.10:14:32.67#ibcon#read 6, iclass 39, count 2 2006.229.10:14:32.67#ibcon#end of sib2, iclass 39, count 2 2006.229.10:14:32.67#ibcon#*mode == 0, iclass 39, count 2 2006.229.10:14:32.67#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.10:14:32.67#ibcon#[25=AT08-06\r\n] 2006.229.10:14:32.67#ibcon#*before write, iclass 39, count 2 2006.229.10:14:32.67#ibcon#enter sib2, iclass 39, count 2 2006.229.10:14:32.67#ibcon#flushed, iclass 39, count 2 2006.229.10:14:32.67#ibcon#about to write, iclass 39, count 2 2006.229.10:14:32.67#ibcon#wrote, iclass 39, count 2 2006.229.10:14:32.67#ibcon#about to read 3, iclass 39, count 2 2006.229.10:14:32.70#ibcon#read 3, iclass 39, count 2 2006.229.10:14:32.70#ibcon#about to read 4, iclass 39, count 2 2006.229.10:14:32.70#ibcon#read 4, iclass 39, count 2 2006.229.10:14:32.70#ibcon#about to read 5, iclass 39, count 2 2006.229.10:14:32.70#ibcon#read 5, iclass 39, count 2 2006.229.10:14:32.70#ibcon#about to read 6, iclass 39, count 2 2006.229.10:14:32.70#ibcon#read 6, iclass 39, count 2 2006.229.10:14:32.70#ibcon#end of sib2, iclass 39, count 2 2006.229.10:14:32.70#ibcon#*after write, iclass 39, count 2 2006.229.10:14:32.70#ibcon#*before return 0, iclass 39, count 2 2006.229.10:14:32.70#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:14:32.70#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:14:32.70#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.10:14:32.70#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:32.70#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:14:32.82#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:14:32.82#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:14:32.82#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:14:32.82#ibcon#first serial, iclass 39, count 0 2006.229.10:14:32.82#ibcon#enter sib2, iclass 39, count 0 2006.229.10:14:32.82#ibcon#flushed, iclass 39, count 0 2006.229.10:14:32.82#ibcon#about to write, iclass 39, count 0 2006.229.10:14:32.82#ibcon#wrote, iclass 39, count 0 2006.229.10:14:32.82#ibcon#about to read 3, iclass 39, count 0 2006.229.10:14:32.84#ibcon#read 3, iclass 39, count 0 2006.229.10:14:32.84#ibcon#about to read 4, iclass 39, count 0 2006.229.10:14:32.84#ibcon#read 4, iclass 39, count 0 2006.229.10:14:32.84#ibcon#about to read 5, iclass 39, count 0 2006.229.10:14:32.84#ibcon#read 5, iclass 39, count 0 2006.229.10:14:32.84#ibcon#about to read 6, iclass 39, count 0 2006.229.10:14:32.84#ibcon#read 6, iclass 39, count 0 2006.229.10:14:32.84#ibcon#end of sib2, iclass 39, count 0 2006.229.10:14:32.84#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:14:32.84#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:14:32.84#ibcon#[25=USB\r\n] 2006.229.10:14:32.84#ibcon#*before write, iclass 39, count 0 2006.229.10:14:32.84#ibcon#enter sib2, iclass 39, count 0 2006.229.10:14:32.84#ibcon#flushed, iclass 39, count 0 2006.229.10:14:32.84#ibcon#about to write, iclass 39, count 0 2006.229.10:14:32.84#ibcon#wrote, iclass 39, count 0 2006.229.10:14:32.84#ibcon#about to read 3, iclass 39, count 0 2006.229.10:14:32.87#ibcon#read 3, iclass 39, count 0 2006.229.10:14:32.87#ibcon#about to read 4, iclass 39, count 0 2006.229.10:14:32.87#ibcon#read 4, iclass 39, count 0 2006.229.10:14:32.87#ibcon#about to read 5, iclass 39, count 0 2006.229.10:14:32.87#ibcon#read 5, iclass 39, count 0 2006.229.10:14:32.87#ibcon#about to read 6, iclass 39, count 0 2006.229.10:14:32.87#ibcon#read 6, iclass 39, count 0 2006.229.10:14:32.87#ibcon#end of sib2, iclass 39, count 0 2006.229.10:14:32.87#ibcon#*after write, iclass 39, count 0 2006.229.10:14:32.87#ibcon#*before return 0, iclass 39, count 0 2006.229.10:14:32.87#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:14:32.87#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:14:32.87#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:14:32.87#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:14:32.87$vck44/vblo=1,629.99 2006.229.10:14:32.87#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.10:14:32.87#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.10:14:32.87#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:32.87#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:14:32.87#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:14:32.87#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:14:32.87#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:14:32.87#ibcon#first serial, iclass 3, count 0 2006.229.10:14:32.87#ibcon#enter sib2, iclass 3, count 0 2006.229.10:14:32.87#ibcon#flushed, iclass 3, count 0 2006.229.10:14:32.87#ibcon#about to write, iclass 3, count 0 2006.229.10:14:32.87#ibcon#wrote, iclass 3, count 0 2006.229.10:14:32.87#ibcon#about to read 3, iclass 3, count 0 2006.229.10:14:32.89#ibcon#read 3, iclass 3, count 0 2006.229.10:14:32.89#ibcon#about to read 4, iclass 3, count 0 2006.229.10:14:32.89#ibcon#read 4, iclass 3, count 0 2006.229.10:14:32.89#ibcon#about to read 5, iclass 3, count 0 2006.229.10:14:32.89#ibcon#read 5, iclass 3, count 0 2006.229.10:14:32.89#ibcon#about to read 6, iclass 3, count 0 2006.229.10:14:32.89#ibcon#read 6, iclass 3, count 0 2006.229.10:14:32.89#ibcon#end of sib2, iclass 3, count 0 2006.229.10:14:32.89#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:14:32.89#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:14:32.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:14:32.89#ibcon#*before write, iclass 3, count 0 2006.229.10:14:32.89#ibcon#enter sib2, iclass 3, count 0 2006.229.10:14:32.89#ibcon#flushed, iclass 3, count 0 2006.229.10:14:32.89#ibcon#about to write, iclass 3, count 0 2006.229.10:14:32.89#ibcon#wrote, iclass 3, count 0 2006.229.10:14:32.89#ibcon#about to read 3, iclass 3, count 0 2006.229.10:14:32.93#ibcon#read 3, iclass 3, count 0 2006.229.10:14:32.93#ibcon#about to read 4, iclass 3, count 0 2006.229.10:14:32.93#ibcon#read 4, iclass 3, count 0 2006.229.10:14:32.93#ibcon#about to read 5, iclass 3, count 0 2006.229.10:14:32.93#ibcon#read 5, iclass 3, count 0 2006.229.10:14:32.93#ibcon#about to read 6, iclass 3, count 0 2006.229.10:14:32.93#ibcon#read 6, iclass 3, count 0 2006.229.10:14:32.93#ibcon#end of sib2, iclass 3, count 0 2006.229.10:14:32.93#ibcon#*after write, iclass 3, count 0 2006.229.10:14:32.93#ibcon#*before return 0, iclass 3, count 0 2006.229.10:14:32.93#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:14:32.93#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:14:32.93#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:14:32.93#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:14:32.93$vck44/vb=1,4 2006.229.10:14:32.93#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.10:14:32.93#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.10:14:32.93#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:32.93#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:14:32.93#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:14:32.93#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:14:32.93#ibcon#enter wrdev, iclass 5, count 2 2006.229.10:14:32.93#ibcon#first serial, iclass 5, count 2 2006.229.10:14:32.93#ibcon#enter sib2, iclass 5, count 2 2006.229.10:14:32.93#ibcon#flushed, iclass 5, count 2 2006.229.10:14:32.93#ibcon#about to write, iclass 5, count 2 2006.229.10:14:32.93#ibcon#wrote, iclass 5, count 2 2006.229.10:14:32.93#ibcon#about to read 3, iclass 5, count 2 2006.229.10:14:32.95#ibcon#read 3, iclass 5, count 2 2006.229.10:14:32.95#ibcon#about to read 4, iclass 5, count 2 2006.229.10:14:32.95#ibcon#read 4, iclass 5, count 2 2006.229.10:14:32.95#ibcon#about to read 5, iclass 5, count 2 2006.229.10:14:32.95#ibcon#read 5, iclass 5, count 2 2006.229.10:14:32.95#ibcon#about to read 6, iclass 5, count 2 2006.229.10:14:32.95#ibcon#read 6, iclass 5, count 2 2006.229.10:14:32.95#ibcon#end of sib2, iclass 5, count 2 2006.229.10:14:32.95#ibcon#*mode == 0, iclass 5, count 2 2006.229.10:14:32.95#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.10:14:32.95#ibcon#[27=AT01-04\r\n] 2006.229.10:14:32.95#ibcon#*before write, iclass 5, count 2 2006.229.10:14:32.95#ibcon#enter sib2, iclass 5, count 2 2006.229.10:14:32.95#ibcon#flushed, iclass 5, count 2 2006.229.10:14:32.95#ibcon#about to write, iclass 5, count 2 2006.229.10:14:32.95#ibcon#wrote, iclass 5, count 2 2006.229.10:14:32.95#ibcon#about to read 3, iclass 5, count 2 2006.229.10:14:32.98#ibcon#read 3, iclass 5, count 2 2006.229.10:14:32.98#ibcon#about to read 4, iclass 5, count 2 2006.229.10:14:32.98#ibcon#read 4, iclass 5, count 2 2006.229.10:14:32.98#ibcon#about to read 5, iclass 5, count 2 2006.229.10:14:32.98#ibcon#read 5, iclass 5, count 2 2006.229.10:14:32.98#ibcon#about to read 6, iclass 5, count 2 2006.229.10:14:32.98#ibcon#read 6, iclass 5, count 2 2006.229.10:14:32.98#ibcon#end of sib2, iclass 5, count 2 2006.229.10:14:32.98#ibcon#*after write, iclass 5, count 2 2006.229.10:14:32.98#ibcon#*before return 0, iclass 5, count 2 2006.229.10:14:32.98#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:14:32.98#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:14:32.98#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.10:14:32.98#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:32.98#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:14:33.10#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:14:33.10#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:14:33.10#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:14:33.10#ibcon#first serial, iclass 5, count 0 2006.229.10:14:33.10#ibcon#enter sib2, iclass 5, count 0 2006.229.10:14:33.10#ibcon#flushed, iclass 5, count 0 2006.229.10:14:33.10#ibcon#about to write, iclass 5, count 0 2006.229.10:14:33.10#ibcon#wrote, iclass 5, count 0 2006.229.10:14:33.10#ibcon#about to read 3, iclass 5, count 0 2006.229.10:14:33.12#ibcon#read 3, iclass 5, count 0 2006.229.10:14:33.12#ibcon#about to read 4, iclass 5, count 0 2006.229.10:14:33.12#ibcon#read 4, iclass 5, count 0 2006.229.10:14:33.12#ibcon#about to read 5, iclass 5, count 0 2006.229.10:14:33.12#ibcon#read 5, iclass 5, count 0 2006.229.10:14:33.12#ibcon#about to read 6, iclass 5, count 0 2006.229.10:14:33.12#ibcon#read 6, iclass 5, count 0 2006.229.10:14:33.12#ibcon#end of sib2, iclass 5, count 0 2006.229.10:14:33.12#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:14:33.12#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:14:33.12#ibcon#[27=USB\r\n] 2006.229.10:14:33.12#ibcon#*before write, iclass 5, count 0 2006.229.10:14:33.12#ibcon#enter sib2, iclass 5, count 0 2006.229.10:14:33.12#ibcon#flushed, iclass 5, count 0 2006.229.10:14:33.12#ibcon#about to write, iclass 5, count 0 2006.229.10:14:33.12#ibcon#wrote, iclass 5, count 0 2006.229.10:14:33.12#ibcon#about to read 3, iclass 5, count 0 2006.229.10:14:33.15#ibcon#read 3, iclass 5, count 0 2006.229.10:14:33.15#ibcon#about to read 4, iclass 5, count 0 2006.229.10:14:33.15#ibcon#read 4, iclass 5, count 0 2006.229.10:14:33.15#ibcon#about to read 5, iclass 5, count 0 2006.229.10:14:33.15#ibcon#read 5, iclass 5, count 0 2006.229.10:14:33.15#ibcon#about to read 6, iclass 5, count 0 2006.229.10:14:33.15#ibcon#read 6, iclass 5, count 0 2006.229.10:14:33.15#ibcon#end of sib2, iclass 5, count 0 2006.229.10:14:33.15#ibcon#*after write, iclass 5, count 0 2006.229.10:14:33.15#ibcon#*before return 0, iclass 5, count 0 2006.229.10:14:33.15#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:14:33.15#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:14:33.15#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:14:33.15#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:14:33.15$vck44/vblo=2,634.99 2006.229.10:14:33.15#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.10:14:33.15#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.10:14:33.15#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:33.15#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:33.15#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:33.15#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:33.15#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:14:33.15#ibcon#first serial, iclass 7, count 0 2006.229.10:14:33.15#ibcon#enter sib2, iclass 7, count 0 2006.229.10:14:33.15#ibcon#flushed, iclass 7, count 0 2006.229.10:14:33.15#ibcon#about to write, iclass 7, count 0 2006.229.10:14:33.15#ibcon#wrote, iclass 7, count 0 2006.229.10:14:33.15#ibcon#about to read 3, iclass 7, count 0 2006.229.10:14:33.17#ibcon#read 3, iclass 7, count 0 2006.229.10:14:33.17#ibcon#about to read 4, iclass 7, count 0 2006.229.10:14:33.17#ibcon#read 4, iclass 7, count 0 2006.229.10:14:33.17#ibcon#about to read 5, iclass 7, count 0 2006.229.10:14:33.17#ibcon#read 5, iclass 7, count 0 2006.229.10:14:33.17#ibcon#about to read 6, iclass 7, count 0 2006.229.10:14:33.17#ibcon#read 6, iclass 7, count 0 2006.229.10:14:33.17#ibcon#end of sib2, iclass 7, count 0 2006.229.10:14:33.17#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:14:33.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:14:33.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:14:33.17#ibcon#*before write, iclass 7, count 0 2006.229.10:14:33.17#ibcon#enter sib2, iclass 7, count 0 2006.229.10:14:33.17#ibcon#flushed, iclass 7, count 0 2006.229.10:14:33.17#ibcon#about to write, iclass 7, count 0 2006.229.10:14:33.17#ibcon#wrote, iclass 7, count 0 2006.229.10:14:33.17#ibcon#about to read 3, iclass 7, count 0 2006.229.10:14:33.21#ibcon#read 3, iclass 7, count 0 2006.229.10:14:33.21#ibcon#about to read 4, iclass 7, count 0 2006.229.10:14:33.21#ibcon#read 4, iclass 7, count 0 2006.229.10:14:33.21#ibcon#about to read 5, iclass 7, count 0 2006.229.10:14:33.21#ibcon#read 5, iclass 7, count 0 2006.229.10:14:33.21#ibcon#about to read 6, iclass 7, count 0 2006.229.10:14:33.21#ibcon#read 6, iclass 7, count 0 2006.229.10:14:33.21#ibcon#end of sib2, iclass 7, count 0 2006.229.10:14:33.21#ibcon#*after write, iclass 7, count 0 2006.229.10:14:33.21#ibcon#*before return 0, iclass 7, count 0 2006.229.10:14:33.21#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:33.21#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:14:33.21#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:14:33.21#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:14:33.21$vck44/vb=2,4 2006.229.10:14:33.21#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.10:14:33.21#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.10:14:33.21#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:33.21#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:33.27#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:33.27#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:33.27#ibcon#enter wrdev, iclass 11, count 2 2006.229.10:14:33.27#ibcon#first serial, iclass 11, count 2 2006.229.10:14:33.27#ibcon#enter sib2, iclass 11, count 2 2006.229.10:14:33.27#ibcon#flushed, iclass 11, count 2 2006.229.10:14:33.27#ibcon#about to write, iclass 11, count 2 2006.229.10:14:33.27#ibcon#wrote, iclass 11, count 2 2006.229.10:14:33.27#ibcon#about to read 3, iclass 11, count 2 2006.229.10:14:33.29#ibcon#read 3, iclass 11, count 2 2006.229.10:14:33.29#ibcon#about to read 4, iclass 11, count 2 2006.229.10:14:33.29#ibcon#read 4, iclass 11, count 2 2006.229.10:14:33.29#ibcon#about to read 5, iclass 11, count 2 2006.229.10:14:33.29#ibcon#read 5, iclass 11, count 2 2006.229.10:14:33.29#ibcon#about to read 6, iclass 11, count 2 2006.229.10:14:33.29#ibcon#read 6, iclass 11, count 2 2006.229.10:14:33.29#ibcon#end of sib2, iclass 11, count 2 2006.229.10:14:33.29#ibcon#*mode == 0, iclass 11, count 2 2006.229.10:14:33.29#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.10:14:33.29#ibcon#[27=AT02-04\r\n] 2006.229.10:14:33.29#ibcon#*before write, iclass 11, count 2 2006.229.10:14:33.29#ibcon#enter sib2, iclass 11, count 2 2006.229.10:14:33.29#ibcon#flushed, iclass 11, count 2 2006.229.10:14:33.29#ibcon#about to write, iclass 11, count 2 2006.229.10:14:33.29#ibcon#wrote, iclass 11, count 2 2006.229.10:14:33.29#ibcon#about to read 3, iclass 11, count 2 2006.229.10:14:33.32#ibcon#read 3, iclass 11, count 2 2006.229.10:14:33.32#ibcon#about to read 4, iclass 11, count 2 2006.229.10:14:33.32#ibcon#read 4, iclass 11, count 2 2006.229.10:14:33.32#ibcon#about to read 5, iclass 11, count 2 2006.229.10:14:33.32#ibcon#read 5, iclass 11, count 2 2006.229.10:14:33.32#ibcon#about to read 6, iclass 11, count 2 2006.229.10:14:33.32#ibcon#read 6, iclass 11, count 2 2006.229.10:14:33.32#ibcon#end of sib2, iclass 11, count 2 2006.229.10:14:33.32#ibcon#*after write, iclass 11, count 2 2006.229.10:14:33.32#ibcon#*before return 0, iclass 11, count 2 2006.229.10:14:33.32#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:33.32#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:14:33.32#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.10:14:33.32#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:33.32#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:33.44#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:33.44#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:33.44#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:14:33.44#ibcon#first serial, iclass 11, count 0 2006.229.10:14:33.44#ibcon#enter sib2, iclass 11, count 0 2006.229.10:14:33.44#ibcon#flushed, iclass 11, count 0 2006.229.10:14:33.44#ibcon#about to write, iclass 11, count 0 2006.229.10:14:33.44#ibcon#wrote, iclass 11, count 0 2006.229.10:14:33.44#ibcon#about to read 3, iclass 11, count 0 2006.229.10:14:33.46#ibcon#read 3, iclass 11, count 0 2006.229.10:14:33.46#ibcon#about to read 4, iclass 11, count 0 2006.229.10:14:33.46#ibcon#read 4, iclass 11, count 0 2006.229.10:14:33.46#ibcon#about to read 5, iclass 11, count 0 2006.229.10:14:33.46#ibcon#read 5, iclass 11, count 0 2006.229.10:14:33.46#ibcon#about to read 6, iclass 11, count 0 2006.229.10:14:33.46#ibcon#read 6, iclass 11, count 0 2006.229.10:14:33.46#ibcon#end of sib2, iclass 11, count 0 2006.229.10:14:33.46#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:14:33.46#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:14:33.46#ibcon#[27=USB\r\n] 2006.229.10:14:33.46#ibcon#*before write, iclass 11, count 0 2006.229.10:14:33.46#ibcon#enter sib2, iclass 11, count 0 2006.229.10:14:33.46#ibcon#flushed, iclass 11, count 0 2006.229.10:14:33.46#ibcon#about to write, iclass 11, count 0 2006.229.10:14:33.46#ibcon#wrote, iclass 11, count 0 2006.229.10:14:33.46#ibcon#about to read 3, iclass 11, count 0 2006.229.10:14:33.49#ibcon#read 3, iclass 11, count 0 2006.229.10:14:33.49#ibcon#about to read 4, iclass 11, count 0 2006.229.10:14:33.49#ibcon#read 4, iclass 11, count 0 2006.229.10:14:33.49#ibcon#about to read 5, iclass 11, count 0 2006.229.10:14:33.49#ibcon#read 5, iclass 11, count 0 2006.229.10:14:33.49#ibcon#about to read 6, iclass 11, count 0 2006.229.10:14:33.49#ibcon#read 6, iclass 11, count 0 2006.229.10:14:33.49#ibcon#end of sib2, iclass 11, count 0 2006.229.10:14:33.49#ibcon#*after write, iclass 11, count 0 2006.229.10:14:33.49#ibcon#*before return 0, iclass 11, count 0 2006.229.10:14:33.49#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:33.49#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:14:33.49#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:14:33.49#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:14:33.49$vck44/vblo=3,649.99 2006.229.10:14:33.49#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.10:14:33.49#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.10:14:33.49#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:33.49#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:33.49#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:33.49#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:33.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:14:33.49#ibcon#first serial, iclass 13, count 0 2006.229.10:14:33.49#ibcon#enter sib2, iclass 13, count 0 2006.229.10:14:33.49#ibcon#flushed, iclass 13, count 0 2006.229.10:14:33.49#ibcon#about to write, iclass 13, count 0 2006.229.10:14:33.49#ibcon#wrote, iclass 13, count 0 2006.229.10:14:33.49#ibcon#about to read 3, iclass 13, count 0 2006.229.10:14:33.51#ibcon#read 3, iclass 13, count 0 2006.229.10:14:33.51#ibcon#about to read 4, iclass 13, count 0 2006.229.10:14:33.51#ibcon#read 4, iclass 13, count 0 2006.229.10:14:33.51#ibcon#about to read 5, iclass 13, count 0 2006.229.10:14:33.51#ibcon#read 5, iclass 13, count 0 2006.229.10:14:33.51#ibcon#about to read 6, iclass 13, count 0 2006.229.10:14:33.51#ibcon#read 6, iclass 13, count 0 2006.229.10:14:33.51#ibcon#end of sib2, iclass 13, count 0 2006.229.10:14:33.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:14:33.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:14:33.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:14:33.51#ibcon#*before write, iclass 13, count 0 2006.229.10:14:33.51#ibcon#enter sib2, iclass 13, count 0 2006.229.10:14:33.51#ibcon#flushed, iclass 13, count 0 2006.229.10:14:33.51#ibcon#about to write, iclass 13, count 0 2006.229.10:14:33.51#ibcon#wrote, iclass 13, count 0 2006.229.10:14:33.51#ibcon#about to read 3, iclass 13, count 0 2006.229.10:14:33.55#ibcon#read 3, iclass 13, count 0 2006.229.10:14:33.55#ibcon#about to read 4, iclass 13, count 0 2006.229.10:14:33.55#ibcon#read 4, iclass 13, count 0 2006.229.10:14:33.55#ibcon#about to read 5, iclass 13, count 0 2006.229.10:14:33.55#ibcon#read 5, iclass 13, count 0 2006.229.10:14:33.55#ibcon#about to read 6, iclass 13, count 0 2006.229.10:14:33.55#ibcon#read 6, iclass 13, count 0 2006.229.10:14:33.55#ibcon#end of sib2, iclass 13, count 0 2006.229.10:14:33.55#ibcon#*after write, iclass 13, count 0 2006.229.10:14:33.55#ibcon#*before return 0, iclass 13, count 0 2006.229.10:14:33.55#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:33.55#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:14:33.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:14:33.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:14:33.55$vck44/vb=3,4 2006.229.10:14:33.55#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.10:14:33.55#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.10:14:33.55#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:33.55#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:33.61#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:33.61#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:33.61#ibcon#enter wrdev, iclass 15, count 2 2006.229.10:14:33.61#ibcon#first serial, iclass 15, count 2 2006.229.10:14:33.61#ibcon#enter sib2, iclass 15, count 2 2006.229.10:14:33.61#ibcon#flushed, iclass 15, count 2 2006.229.10:14:33.61#ibcon#about to write, iclass 15, count 2 2006.229.10:14:33.61#ibcon#wrote, iclass 15, count 2 2006.229.10:14:33.61#ibcon#about to read 3, iclass 15, count 2 2006.229.10:14:33.63#ibcon#read 3, iclass 15, count 2 2006.229.10:14:33.63#ibcon#about to read 4, iclass 15, count 2 2006.229.10:14:33.63#ibcon#read 4, iclass 15, count 2 2006.229.10:14:33.63#ibcon#about to read 5, iclass 15, count 2 2006.229.10:14:33.63#ibcon#read 5, iclass 15, count 2 2006.229.10:14:33.63#ibcon#about to read 6, iclass 15, count 2 2006.229.10:14:33.63#ibcon#read 6, iclass 15, count 2 2006.229.10:14:33.63#ibcon#end of sib2, iclass 15, count 2 2006.229.10:14:33.63#ibcon#*mode == 0, iclass 15, count 2 2006.229.10:14:33.63#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.10:14:33.63#ibcon#[27=AT03-04\r\n] 2006.229.10:14:33.63#ibcon#*before write, iclass 15, count 2 2006.229.10:14:33.63#ibcon#enter sib2, iclass 15, count 2 2006.229.10:14:33.63#ibcon#flushed, iclass 15, count 2 2006.229.10:14:33.63#ibcon#about to write, iclass 15, count 2 2006.229.10:14:33.63#ibcon#wrote, iclass 15, count 2 2006.229.10:14:33.63#ibcon#about to read 3, iclass 15, count 2 2006.229.10:14:33.66#ibcon#read 3, iclass 15, count 2 2006.229.10:14:33.66#ibcon#about to read 4, iclass 15, count 2 2006.229.10:14:33.66#ibcon#read 4, iclass 15, count 2 2006.229.10:14:33.66#ibcon#about to read 5, iclass 15, count 2 2006.229.10:14:33.66#ibcon#read 5, iclass 15, count 2 2006.229.10:14:33.66#ibcon#about to read 6, iclass 15, count 2 2006.229.10:14:33.66#ibcon#read 6, iclass 15, count 2 2006.229.10:14:33.66#ibcon#end of sib2, iclass 15, count 2 2006.229.10:14:33.66#ibcon#*after write, iclass 15, count 2 2006.229.10:14:33.66#ibcon#*before return 0, iclass 15, count 2 2006.229.10:14:33.66#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:33.66#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:14:33.66#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.10:14:33.66#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:33.66#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:33.78#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:33.78#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:33.78#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:14:33.78#ibcon#first serial, iclass 15, count 0 2006.229.10:14:33.78#ibcon#enter sib2, iclass 15, count 0 2006.229.10:14:33.78#ibcon#flushed, iclass 15, count 0 2006.229.10:14:33.78#ibcon#about to write, iclass 15, count 0 2006.229.10:14:33.78#ibcon#wrote, iclass 15, count 0 2006.229.10:14:33.78#ibcon#about to read 3, iclass 15, count 0 2006.229.10:14:33.80#ibcon#read 3, iclass 15, count 0 2006.229.10:14:33.80#ibcon#about to read 4, iclass 15, count 0 2006.229.10:14:33.80#ibcon#read 4, iclass 15, count 0 2006.229.10:14:33.80#ibcon#about to read 5, iclass 15, count 0 2006.229.10:14:33.80#ibcon#read 5, iclass 15, count 0 2006.229.10:14:33.80#ibcon#about to read 6, iclass 15, count 0 2006.229.10:14:33.80#ibcon#read 6, iclass 15, count 0 2006.229.10:14:33.80#ibcon#end of sib2, iclass 15, count 0 2006.229.10:14:33.80#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:14:33.80#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:14:33.80#ibcon#[27=USB\r\n] 2006.229.10:14:33.80#ibcon#*before write, iclass 15, count 0 2006.229.10:14:33.80#ibcon#enter sib2, iclass 15, count 0 2006.229.10:14:33.80#ibcon#flushed, iclass 15, count 0 2006.229.10:14:33.80#ibcon#about to write, iclass 15, count 0 2006.229.10:14:33.80#ibcon#wrote, iclass 15, count 0 2006.229.10:14:33.80#ibcon#about to read 3, iclass 15, count 0 2006.229.10:14:33.83#ibcon#read 3, iclass 15, count 0 2006.229.10:14:33.83#ibcon#about to read 4, iclass 15, count 0 2006.229.10:14:33.83#ibcon#read 4, iclass 15, count 0 2006.229.10:14:33.83#ibcon#about to read 5, iclass 15, count 0 2006.229.10:14:33.83#ibcon#read 5, iclass 15, count 0 2006.229.10:14:33.83#ibcon#about to read 6, iclass 15, count 0 2006.229.10:14:33.83#ibcon#read 6, iclass 15, count 0 2006.229.10:14:33.83#ibcon#end of sib2, iclass 15, count 0 2006.229.10:14:33.83#ibcon#*after write, iclass 15, count 0 2006.229.10:14:33.83#ibcon#*before return 0, iclass 15, count 0 2006.229.10:14:33.83#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:33.83#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:14:33.83#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:14:33.83#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:14:33.83$vck44/vblo=4,679.99 2006.229.10:14:33.83#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.10:14:33.83#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.10:14:33.83#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:33.83#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:33.83#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:33.83#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:33.83#ibcon#enter wrdev, iclass 17, count 0 2006.229.10:14:33.83#ibcon#first serial, iclass 17, count 0 2006.229.10:14:33.83#ibcon#enter sib2, iclass 17, count 0 2006.229.10:14:33.83#ibcon#flushed, iclass 17, count 0 2006.229.10:14:33.83#ibcon#about to write, iclass 17, count 0 2006.229.10:14:33.83#ibcon#wrote, iclass 17, count 0 2006.229.10:14:33.83#ibcon#about to read 3, iclass 17, count 0 2006.229.10:14:33.85#ibcon#read 3, iclass 17, count 0 2006.229.10:14:33.85#ibcon#about to read 4, iclass 17, count 0 2006.229.10:14:33.85#ibcon#read 4, iclass 17, count 0 2006.229.10:14:33.85#ibcon#about to read 5, iclass 17, count 0 2006.229.10:14:33.85#ibcon#read 5, iclass 17, count 0 2006.229.10:14:33.85#ibcon#about to read 6, iclass 17, count 0 2006.229.10:14:33.85#ibcon#read 6, iclass 17, count 0 2006.229.10:14:33.85#ibcon#end of sib2, iclass 17, count 0 2006.229.10:14:33.85#ibcon#*mode == 0, iclass 17, count 0 2006.229.10:14:33.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.10:14:33.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:14:33.85#ibcon#*before write, iclass 17, count 0 2006.229.10:14:33.85#ibcon#enter sib2, iclass 17, count 0 2006.229.10:14:33.85#ibcon#flushed, iclass 17, count 0 2006.229.10:14:33.85#ibcon#about to write, iclass 17, count 0 2006.229.10:14:33.85#ibcon#wrote, iclass 17, count 0 2006.229.10:14:33.85#ibcon#about to read 3, iclass 17, count 0 2006.229.10:14:33.89#ibcon#read 3, iclass 17, count 0 2006.229.10:14:33.89#ibcon#about to read 4, iclass 17, count 0 2006.229.10:14:33.89#ibcon#read 4, iclass 17, count 0 2006.229.10:14:33.89#ibcon#about to read 5, iclass 17, count 0 2006.229.10:14:33.89#ibcon#read 5, iclass 17, count 0 2006.229.10:14:33.89#ibcon#about to read 6, iclass 17, count 0 2006.229.10:14:33.89#ibcon#read 6, iclass 17, count 0 2006.229.10:14:33.89#ibcon#end of sib2, iclass 17, count 0 2006.229.10:14:33.89#ibcon#*after write, iclass 17, count 0 2006.229.10:14:33.89#ibcon#*before return 0, iclass 17, count 0 2006.229.10:14:33.89#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:33.89#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:14:33.89#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.10:14:33.89#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.10:14:33.89$vck44/vb=4,4 2006.229.10:14:33.89#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.10:14:33.89#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.10:14:33.89#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:33.89#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:33.95#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:33.95#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:33.95#ibcon#enter wrdev, iclass 19, count 2 2006.229.10:14:33.95#ibcon#first serial, iclass 19, count 2 2006.229.10:14:33.95#ibcon#enter sib2, iclass 19, count 2 2006.229.10:14:33.95#ibcon#flushed, iclass 19, count 2 2006.229.10:14:33.95#ibcon#about to write, iclass 19, count 2 2006.229.10:14:33.95#ibcon#wrote, iclass 19, count 2 2006.229.10:14:33.95#ibcon#about to read 3, iclass 19, count 2 2006.229.10:14:33.97#ibcon#read 3, iclass 19, count 2 2006.229.10:14:33.97#ibcon#about to read 4, iclass 19, count 2 2006.229.10:14:33.97#ibcon#read 4, iclass 19, count 2 2006.229.10:14:33.97#ibcon#about to read 5, iclass 19, count 2 2006.229.10:14:33.97#ibcon#read 5, iclass 19, count 2 2006.229.10:14:33.97#ibcon#about to read 6, iclass 19, count 2 2006.229.10:14:33.97#ibcon#read 6, iclass 19, count 2 2006.229.10:14:33.97#ibcon#end of sib2, iclass 19, count 2 2006.229.10:14:33.97#ibcon#*mode == 0, iclass 19, count 2 2006.229.10:14:33.97#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.10:14:33.97#ibcon#[27=AT04-04\r\n] 2006.229.10:14:33.97#ibcon#*before write, iclass 19, count 2 2006.229.10:14:33.97#ibcon#enter sib2, iclass 19, count 2 2006.229.10:14:33.97#ibcon#flushed, iclass 19, count 2 2006.229.10:14:33.97#ibcon#about to write, iclass 19, count 2 2006.229.10:14:33.97#ibcon#wrote, iclass 19, count 2 2006.229.10:14:33.97#ibcon#about to read 3, iclass 19, count 2 2006.229.10:14:34.00#ibcon#read 3, iclass 19, count 2 2006.229.10:14:34.00#ibcon#about to read 4, iclass 19, count 2 2006.229.10:14:34.00#ibcon#read 4, iclass 19, count 2 2006.229.10:14:34.00#ibcon#about to read 5, iclass 19, count 2 2006.229.10:14:34.00#ibcon#read 5, iclass 19, count 2 2006.229.10:14:34.00#ibcon#about to read 6, iclass 19, count 2 2006.229.10:14:34.00#ibcon#read 6, iclass 19, count 2 2006.229.10:14:34.00#ibcon#end of sib2, iclass 19, count 2 2006.229.10:14:34.00#ibcon#*after write, iclass 19, count 2 2006.229.10:14:34.00#ibcon#*before return 0, iclass 19, count 2 2006.229.10:14:34.00#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:34.00#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:14:34.00#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.10:14:34.00#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:34.00#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:34.12#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:34.12#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:34.12#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:14:34.12#ibcon#first serial, iclass 19, count 0 2006.229.10:14:34.12#ibcon#enter sib2, iclass 19, count 0 2006.229.10:14:34.12#ibcon#flushed, iclass 19, count 0 2006.229.10:14:34.12#ibcon#about to write, iclass 19, count 0 2006.229.10:14:34.12#ibcon#wrote, iclass 19, count 0 2006.229.10:14:34.12#ibcon#about to read 3, iclass 19, count 0 2006.229.10:14:34.14#ibcon#read 3, iclass 19, count 0 2006.229.10:14:34.14#ibcon#about to read 4, iclass 19, count 0 2006.229.10:14:34.14#ibcon#read 4, iclass 19, count 0 2006.229.10:14:34.14#ibcon#about to read 5, iclass 19, count 0 2006.229.10:14:34.14#ibcon#read 5, iclass 19, count 0 2006.229.10:14:34.14#ibcon#about to read 6, iclass 19, count 0 2006.229.10:14:34.14#ibcon#read 6, iclass 19, count 0 2006.229.10:14:34.14#ibcon#end of sib2, iclass 19, count 0 2006.229.10:14:34.14#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:14:34.14#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:14:34.14#ibcon#[27=USB\r\n] 2006.229.10:14:34.14#ibcon#*before write, iclass 19, count 0 2006.229.10:14:34.14#ibcon#enter sib2, iclass 19, count 0 2006.229.10:14:34.14#ibcon#flushed, iclass 19, count 0 2006.229.10:14:34.14#ibcon#about to write, iclass 19, count 0 2006.229.10:14:34.14#ibcon#wrote, iclass 19, count 0 2006.229.10:14:34.14#ibcon#about to read 3, iclass 19, count 0 2006.229.10:14:34.17#ibcon#read 3, iclass 19, count 0 2006.229.10:14:34.17#ibcon#about to read 4, iclass 19, count 0 2006.229.10:14:34.17#ibcon#read 4, iclass 19, count 0 2006.229.10:14:34.17#ibcon#about to read 5, iclass 19, count 0 2006.229.10:14:34.17#ibcon#read 5, iclass 19, count 0 2006.229.10:14:34.17#ibcon#about to read 6, iclass 19, count 0 2006.229.10:14:34.17#ibcon#read 6, iclass 19, count 0 2006.229.10:14:34.17#ibcon#end of sib2, iclass 19, count 0 2006.229.10:14:34.17#ibcon#*after write, iclass 19, count 0 2006.229.10:14:34.17#ibcon#*before return 0, iclass 19, count 0 2006.229.10:14:34.17#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:34.17#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:14:34.17#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:14:34.17#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:14:34.17$vck44/vblo=5,709.99 2006.229.10:14:34.17#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.10:14:34.17#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.10:14:34.17#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:34.17#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:34.17#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:34.17#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:34.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:14:34.17#ibcon#first serial, iclass 21, count 0 2006.229.10:14:34.17#ibcon#enter sib2, iclass 21, count 0 2006.229.10:14:34.17#ibcon#flushed, iclass 21, count 0 2006.229.10:14:34.17#ibcon#about to write, iclass 21, count 0 2006.229.10:14:34.17#ibcon#wrote, iclass 21, count 0 2006.229.10:14:34.17#ibcon#about to read 3, iclass 21, count 0 2006.229.10:14:34.19#ibcon#read 3, iclass 21, count 0 2006.229.10:14:34.19#ibcon#about to read 4, iclass 21, count 0 2006.229.10:14:34.19#ibcon#read 4, iclass 21, count 0 2006.229.10:14:34.19#ibcon#about to read 5, iclass 21, count 0 2006.229.10:14:34.19#ibcon#read 5, iclass 21, count 0 2006.229.10:14:34.19#ibcon#about to read 6, iclass 21, count 0 2006.229.10:14:34.19#ibcon#read 6, iclass 21, count 0 2006.229.10:14:34.19#ibcon#end of sib2, iclass 21, count 0 2006.229.10:14:34.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:14:34.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:14:34.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:14:34.19#ibcon#*before write, iclass 21, count 0 2006.229.10:14:34.19#ibcon#enter sib2, iclass 21, count 0 2006.229.10:14:34.19#ibcon#flushed, iclass 21, count 0 2006.229.10:14:34.19#ibcon#about to write, iclass 21, count 0 2006.229.10:14:34.19#ibcon#wrote, iclass 21, count 0 2006.229.10:14:34.19#ibcon#about to read 3, iclass 21, count 0 2006.229.10:14:34.23#ibcon#read 3, iclass 21, count 0 2006.229.10:14:34.23#ibcon#about to read 4, iclass 21, count 0 2006.229.10:14:34.23#ibcon#read 4, iclass 21, count 0 2006.229.10:14:34.23#ibcon#about to read 5, iclass 21, count 0 2006.229.10:14:34.23#ibcon#read 5, iclass 21, count 0 2006.229.10:14:34.23#ibcon#about to read 6, iclass 21, count 0 2006.229.10:14:34.23#ibcon#read 6, iclass 21, count 0 2006.229.10:14:34.23#ibcon#end of sib2, iclass 21, count 0 2006.229.10:14:34.23#ibcon#*after write, iclass 21, count 0 2006.229.10:14:34.23#ibcon#*before return 0, iclass 21, count 0 2006.229.10:14:34.23#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:34.23#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:14:34.23#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:14:34.23#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:14:34.23$vck44/vb=5,4 2006.229.10:14:34.23#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.10:14:34.23#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.10:14:34.23#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:34.23#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:34.29#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:34.29#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:34.29#ibcon#enter wrdev, iclass 23, count 2 2006.229.10:14:34.29#ibcon#first serial, iclass 23, count 2 2006.229.10:14:34.29#ibcon#enter sib2, iclass 23, count 2 2006.229.10:14:34.29#ibcon#flushed, iclass 23, count 2 2006.229.10:14:34.29#ibcon#about to write, iclass 23, count 2 2006.229.10:14:34.29#ibcon#wrote, iclass 23, count 2 2006.229.10:14:34.29#ibcon#about to read 3, iclass 23, count 2 2006.229.10:14:34.31#ibcon#read 3, iclass 23, count 2 2006.229.10:14:34.31#ibcon#about to read 4, iclass 23, count 2 2006.229.10:14:34.31#ibcon#read 4, iclass 23, count 2 2006.229.10:14:34.31#ibcon#about to read 5, iclass 23, count 2 2006.229.10:14:34.31#ibcon#read 5, iclass 23, count 2 2006.229.10:14:34.31#ibcon#about to read 6, iclass 23, count 2 2006.229.10:14:34.31#ibcon#read 6, iclass 23, count 2 2006.229.10:14:34.31#ibcon#end of sib2, iclass 23, count 2 2006.229.10:14:34.31#ibcon#*mode == 0, iclass 23, count 2 2006.229.10:14:34.31#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.10:14:34.31#ibcon#[27=AT05-04\r\n] 2006.229.10:14:34.31#ibcon#*before write, iclass 23, count 2 2006.229.10:14:34.31#ibcon#enter sib2, iclass 23, count 2 2006.229.10:14:34.31#ibcon#flushed, iclass 23, count 2 2006.229.10:14:34.31#ibcon#about to write, iclass 23, count 2 2006.229.10:14:34.31#ibcon#wrote, iclass 23, count 2 2006.229.10:14:34.31#ibcon#about to read 3, iclass 23, count 2 2006.229.10:14:34.34#ibcon#read 3, iclass 23, count 2 2006.229.10:14:34.34#ibcon#about to read 4, iclass 23, count 2 2006.229.10:14:34.34#ibcon#read 4, iclass 23, count 2 2006.229.10:14:34.34#ibcon#about to read 5, iclass 23, count 2 2006.229.10:14:34.34#ibcon#read 5, iclass 23, count 2 2006.229.10:14:34.34#ibcon#about to read 6, iclass 23, count 2 2006.229.10:14:34.34#ibcon#read 6, iclass 23, count 2 2006.229.10:14:34.34#ibcon#end of sib2, iclass 23, count 2 2006.229.10:14:34.34#ibcon#*after write, iclass 23, count 2 2006.229.10:14:34.34#ibcon#*before return 0, iclass 23, count 2 2006.229.10:14:34.34#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:34.34#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:14:34.34#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.10:14:34.34#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:34.34#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:34.46#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:34.46#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:34.46#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:14:34.46#ibcon#first serial, iclass 23, count 0 2006.229.10:14:34.46#ibcon#enter sib2, iclass 23, count 0 2006.229.10:14:34.46#ibcon#flushed, iclass 23, count 0 2006.229.10:14:34.46#ibcon#about to write, iclass 23, count 0 2006.229.10:14:34.46#ibcon#wrote, iclass 23, count 0 2006.229.10:14:34.46#ibcon#about to read 3, iclass 23, count 0 2006.229.10:14:34.48#ibcon#read 3, iclass 23, count 0 2006.229.10:14:34.48#ibcon#about to read 4, iclass 23, count 0 2006.229.10:14:34.48#ibcon#read 4, iclass 23, count 0 2006.229.10:14:34.48#ibcon#about to read 5, iclass 23, count 0 2006.229.10:14:34.48#ibcon#read 5, iclass 23, count 0 2006.229.10:14:34.48#ibcon#about to read 6, iclass 23, count 0 2006.229.10:14:34.48#ibcon#read 6, iclass 23, count 0 2006.229.10:14:34.48#ibcon#end of sib2, iclass 23, count 0 2006.229.10:14:34.48#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:14:34.48#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:14:34.48#ibcon#[27=USB\r\n] 2006.229.10:14:34.48#ibcon#*before write, iclass 23, count 0 2006.229.10:14:34.48#ibcon#enter sib2, iclass 23, count 0 2006.229.10:14:34.48#ibcon#flushed, iclass 23, count 0 2006.229.10:14:34.48#ibcon#about to write, iclass 23, count 0 2006.229.10:14:34.48#ibcon#wrote, iclass 23, count 0 2006.229.10:14:34.48#ibcon#about to read 3, iclass 23, count 0 2006.229.10:14:34.51#ibcon#read 3, iclass 23, count 0 2006.229.10:14:34.51#ibcon#about to read 4, iclass 23, count 0 2006.229.10:14:34.51#ibcon#read 4, iclass 23, count 0 2006.229.10:14:34.51#ibcon#about to read 5, iclass 23, count 0 2006.229.10:14:34.51#ibcon#read 5, iclass 23, count 0 2006.229.10:14:34.51#ibcon#about to read 6, iclass 23, count 0 2006.229.10:14:34.51#ibcon#read 6, iclass 23, count 0 2006.229.10:14:34.51#ibcon#end of sib2, iclass 23, count 0 2006.229.10:14:34.51#ibcon#*after write, iclass 23, count 0 2006.229.10:14:34.51#ibcon#*before return 0, iclass 23, count 0 2006.229.10:14:34.51#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:34.51#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:14:34.51#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:14:34.51#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:14:34.51$vck44/vblo=6,719.99 2006.229.10:14:34.51#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.10:14:34.51#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.10:14:34.51#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:34.51#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:34.51#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:34.51#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:34.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:14:34.51#ibcon#first serial, iclass 25, count 0 2006.229.10:14:34.51#ibcon#enter sib2, iclass 25, count 0 2006.229.10:14:34.51#ibcon#flushed, iclass 25, count 0 2006.229.10:14:34.51#ibcon#about to write, iclass 25, count 0 2006.229.10:14:34.51#ibcon#wrote, iclass 25, count 0 2006.229.10:14:34.51#ibcon#about to read 3, iclass 25, count 0 2006.229.10:14:34.53#ibcon#read 3, iclass 25, count 0 2006.229.10:14:34.53#ibcon#about to read 4, iclass 25, count 0 2006.229.10:14:34.53#ibcon#read 4, iclass 25, count 0 2006.229.10:14:34.53#ibcon#about to read 5, iclass 25, count 0 2006.229.10:14:34.53#ibcon#read 5, iclass 25, count 0 2006.229.10:14:34.53#ibcon#about to read 6, iclass 25, count 0 2006.229.10:14:34.53#ibcon#read 6, iclass 25, count 0 2006.229.10:14:34.53#ibcon#end of sib2, iclass 25, count 0 2006.229.10:14:34.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:14:34.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:14:34.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:14:34.53#ibcon#*before write, iclass 25, count 0 2006.229.10:14:34.53#ibcon#enter sib2, iclass 25, count 0 2006.229.10:14:34.53#ibcon#flushed, iclass 25, count 0 2006.229.10:14:34.53#ibcon#about to write, iclass 25, count 0 2006.229.10:14:34.53#ibcon#wrote, iclass 25, count 0 2006.229.10:14:34.53#ibcon#about to read 3, iclass 25, count 0 2006.229.10:14:34.57#ibcon#read 3, iclass 25, count 0 2006.229.10:14:34.57#ibcon#about to read 4, iclass 25, count 0 2006.229.10:14:34.57#ibcon#read 4, iclass 25, count 0 2006.229.10:14:34.57#ibcon#about to read 5, iclass 25, count 0 2006.229.10:14:34.57#ibcon#read 5, iclass 25, count 0 2006.229.10:14:34.57#ibcon#about to read 6, iclass 25, count 0 2006.229.10:14:34.57#ibcon#read 6, iclass 25, count 0 2006.229.10:14:34.57#ibcon#end of sib2, iclass 25, count 0 2006.229.10:14:34.57#ibcon#*after write, iclass 25, count 0 2006.229.10:14:34.57#ibcon#*before return 0, iclass 25, count 0 2006.229.10:14:34.57#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:34.57#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:14:34.57#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:14:34.57#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:14:34.57$vck44/vb=6,4 2006.229.10:14:34.57#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.10:14:34.57#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.10:14:34.57#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:34.57#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:34.63#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:34.63#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:34.63#ibcon#enter wrdev, iclass 27, count 2 2006.229.10:14:34.63#ibcon#first serial, iclass 27, count 2 2006.229.10:14:34.63#ibcon#enter sib2, iclass 27, count 2 2006.229.10:14:34.63#ibcon#flushed, iclass 27, count 2 2006.229.10:14:34.63#ibcon#about to write, iclass 27, count 2 2006.229.10:14:34.63#ibcon#wrote, iclass 27, count 2 2006.229.10:14:34.63#ibcon#about to read 3, iclass 27, count 2 2006.229.10:14:34.65#ibcon#read 3, iclass 27, count 2 2006.229.10:14:34.65#ibcon#about to read 4, iclass 27, count 2 2006.229.10:14:34.65#ibcon#read 4, iclass 27, count 2 2006.229.10:14:34.65#ibcon#about to read 5, iclass 27, count 2 2006.229.10:14:34.65#ibcon#read 5, iclass 27, count 2 2006.229.10:14:34.65#ibcon#about to read 6, iclass 27, count 2 2006.229.10:14:34.65#ibcon#read 6, iclass 27, count 2 2006.229.10:14:34.65#ibcon#end of sib2, iclass 27, count 2 2006.229.10:14:34.65#ibcon#*mode == 0, iclass 27, count 2 2006.229.10:14:34.65#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.10:14:34.65#ibcon#[27=AT06-04\r\n] 2006.229.10:14:34.65#ibcon#*before write, iclass 27, count 2 2006.229.10:14:34.65#ibcon#enter sib2, iclass 27, count 2 2006.229.10:14:34.65#ibcon#flushed, iclass 27, count 2 2006.229.10:14:34.65#ibcon#about to write, iclass 27, count 2 2006.229.10:14:34.65#ibcon#wrote, iclass 27, count 2 2006.229.10:14:34.65#ibcon#about to read 3, iclass 27, count 2 2006.229.10:14:34.68#ibcon#read 3, iclass 27, count 2 2006.229.10:14:34.68#ibcon#about to read 4, iclass 27, count 2 2006.229.10:14:34.68#ibcon#read 4, iclass 27, count 2 2006.229.10:14:34.68#ibcon#about to read 5, iclass 27, count 2 2006.229.10:14:34.68#ibcon#read 5, iclass 27, count 2 2006.229.10:14:34.68#ibcon#about to read 6, iclass 27, count 2 2006.229.10:14:34.68#ibcon#read 6, iclass 27, count 2 2006.229.10:14:34.68#ibcon#end of sib2, iclass 27, count 2 2006.229.10:14:34.68#ibcon#*after write, iclass 27, count 2 2006.229.10:14:34.68#ibcon#*before return 0, iclass 27, count 2 2006.229.10:14:34.68#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:34.68#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:14:34.68#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.10:14:34.68#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:34.68#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:34.80#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:34.80#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:34.80#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:14:34.80#ibcon#first serial, iclass 27, count 0 2006.229.10:14:34.80#ibcon#enter sib2, iclass 27, count 0 2006.229.10:14:34.80#ibcon#flushed, iclass 27, count 0 2006.229.10:14:34.80#ibcon#about to write, iclass 27, count 0 2006.229.10:14:34.80#ibcon#wrote, iclass 27, count 0 2006.229.10:14:34.80#ibcon#about to read 3, iclass 27, count 0 2006.229.10:14:34.82#ibcon#read 3, iclass 27, count 0 2006.229.10:14:34.82#ibcon#about to read 4, iclass 27, count 0 2006.229.10:14:34.82#ibcon#read 4, iclass 27, count 0 2006.229.10:14:34.82#ibcon#about to read 5, iclass 27, count 0 2006.229.10:14:34.82#ibcon#read 5, iclass 27, count 0 2006.229.10:14:34.82#ibcon#about to read 6, iclass 27, count 0 2006.229.10:14:34.82#ibcon#read 6, iclass 27, count 0 2006.229.10:14:34.82#ibcon#end of sib2, iclass 27, count 0 2006.229.10:14:34.82#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:14:34.82#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:14:34.82#ibcon#[27=USB\r\n] 2006.229.10:14:34.82#ibcon#*before write, iclass 27, count 0 2006.229.10:14:34.82#ibcon#enter sib2, iclass 27, count 0 2006.229.10:14:34.82#ibcon#flushed, iclass 27, count 0 2006.229.10:14:34.82#ibcon#about to write, iclass 27, count 0 2006.229.10:14:34.82#ibcon#wrote, iclass 27, count 0 2006.229.10:14:34.82#ibcon#about to read 3, iclass 27, count 0 2006.229.10:14:34.85#ibcon#read 3, iclass 27, count 0 2006.229.10:14:34.85#ibcon#about to read 4, iclass 27, count 0 2006.229.10:14:34.85#ibcon#read 4, iclass 27, count 0 2006.229.10:14:34.85#ibcon#about to read 5, iclass 27, count 0 2006.229.10:14:34.85#ibcon#read 5, iclass 27, count 0 2006.229.10:14:34.85#ibcon#about to read 6, iclass 27, count 0 2006.229.10:14:34.85#ibcon#read 6, iclass 27, count 0 2006.229.10:14:34.85#ibcon#end of sib2, iclass 27, count 0 2006.229.10:14:34.85#ibcon#*after write, iclass 27, count 0 2006.229.10:14:34.85#ibcon#*before return 0, iclass 27, count 0 2006.229.10:14:34.85#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:34.85#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:14:34.85#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:14:34.85#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:14:34.85$vck44/vblo=7,734.99 2006.229.10:14:34.85#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.10:14:34.85#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.10:14:34.85#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:34.85#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:34.85#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:34.85#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:34.85#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:14:34.85#ibcon#first serial, iclass 29, count 0 2006.229.10:14:34.85#ibcon#enter sib2, iclass 29, count 0 2006.229.10:14:34.85#ibcon#flushed, iclass 29, count 0 2006.229.10:14:34.85#ibcon#about to write, iclass 29, count 0 2006.229.10:14:34.85#ibcon#wrote, iclass 29, count 0 2006.229.10:14:34.85#ibcon#about to read 3, iclass 29, count 0 2006.229.10:14:34.87#ibcon#read 3, iclass 29, count 0 2006.229.10:14:34.87#ibcon#about to read 4, iclass 29, count 0 2006.229.10:14:34.87#ibcon#read 4, iclass 29, count 0 2006.229.10:14:34.87#ibcon#about to read 5, iclass 29, count 0 2006.229.10:14:34.87#ibcon#read 5, iclass 29, count 0 2006.229.10:14:34.87#ibcon#about to read 6, iclass 29, count 0 2006.229.10:14:34.87#ibcon#read 6, iclass 29, count 0 2006.229.10:14:34.87#ibcon#end of sib2, iclass 29, count 0 2006.229.10:14:34.87#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:14:34.87#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:14:34.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:14:34.87#ibcon#*before write, iclass 29, count 0 2006.229.10:14:34.87#ibcon#enter sib2, iclass 29, count 0 2006.229.10:14:34.87#ibcon#flushed, iclass 29, count 0 2006.229.10:14:34.87#ibcon#about to write, iclass 29, count 0 2006.229.10:14:34.87#ibcon#wrote, iclass 29, count 0 2006.229.10:14:34.87#ibcon#about to read 3, iclass 29, count 0 2006.229.10:14:34.91#ibcon#read 3, iclass 29, count 0 2006.229.10:14:34.91#ibcon#about to read 4, iclass 29, count 0 2006.229.10:14:34.91#ibcon#read 4, iclass 29, count 0 2006.229.10:14:34.91#ibcon#about to read 5, iclass 29, count 0 2006.229.10:14:34.91#ibcon#read 5, iclass 29, count 0 2006.229.10:14:34.91#ibcon#about to read 6, iclass 29, count 0 2006.229.10:14:34.91#ibcon#read 6, iclass 29, count 0 2006.229.10:14:34.91#ibcon#end of sib2, iclass 29, count 0 2006.229.10:14:34.91#ibcon#*after write, iclass 29, count 0 2006.229.10:14:34.91#ibcon#*before return 0, iclass 29, count 0 2006.229.10:14:34.91#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:34.91#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:14:34.91#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:14:34.91#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:14:34.91$vck44/vb=7,4 2006.229.10:14:34.91#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.10:14:34.91#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.10:14:34.91#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:34.91#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:34.97#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:34.97#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:34.97#ibcon#enter wrdev, iclass 31, count 2 2006.229.10:14:34.97#ibcon#first serial, iclass 31, count 2 2006.229.10:14:34.97#ibcon#enter sib2, iclass 31, count 2 2006.229.10:14:34.97#ibcon#flushed, iclass 31, count 2 2006.229.10:14:34.97#ibcon#about to write, iclass 31, count 2 2006.229.10:14:34.97#ibcon#wrote, iclass 31, count 2 2006.229.10:14:34.97#ibcon#about to read 3, iclass 31, count 2 2006.229.10:14:34.99#ibcon#read 3, iclass 31, count 2 2006.229.10:14:34.99#ibcon#about to read 4, iclass 31, count 2 2006.229.10:14:34.99#ibcon#read 4, iclass 31, count 2 2006.229.10:14:34.99#ibcon#about to read 5, iclass 31, count 2 2006.229.10:14:34.99#ibcon#read 5, iclass 31, count 2 2006.229.10:14:34.99#ibcon#about to read 6, iclass 31, count 2 2006.229.10:14:34.99#ibcon#read 6, iclass 31, count 2 2006.229.10:14:34.99#ibcon#end of sib2, iclass 31, count 2 2006.229.10:14:34.99#ibcon#*mode == 0, iclass 31, count 2 2006.229.10:14:34.99#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.10:14:34.99#ibcon#[27=AT07-04\r\n] 2006.229.10:14:34.99#ibcon#*before write, iclass 31, count 2 2006.229.10:14:34.99#ibcon#enter sib2, iclass 31, count 2 2006.229.10:14:34.99#ibcon#flushed, iclass 31, count 2 2006.229.10:14:34.99#ibcon#about to write, iclass 31, count 2 2006.229.10:14:34.99#ibcon#wrote, iclass 31, count 2 2006.229.10:14:34.99#ibcon#about to read 3, iclass 31, count 2 2006.229.10:14:35.02#ibcon#read 3, iclass 31, count 2 2006.229.10:14:35.02#ibcon#about to read 4, iclass 31, count 2 2006.229.10:14:35.02#ibcon#read 4, iclass 31, count 2 2006.229.10:14:35.02#ibcon#about to read 5, iclass 31, count 2 2006.229.10:14:35.02#ibcon#read 5, iclass 31, count 2 2006.229.10:14:35.02#ibcon#about to read 6, iclass 31, count 2 2006.229.10:14:35.02#ibcon#read 6, iclass 31, count 2 2006.229.10:14:35.02#ibcon#end of sib2, iclass 31, count 2 2006.229.10:14:35.02#ibcon#*after write, iclass 31, count 2 2006.229.10:14:35.02#ibcon#*before return 0, iclass 31, count 2 2006.229.10:14:35.02#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:35.02#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:14:35.02#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.10:14:35.02#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:35.02#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:35.14#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:35.14#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:35.14#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:14:35.14#ibcon#first serial, iclass 31, count 0 2006.229.10:14:35.14#ibcon#enter sib2, iclass 31, count 0 2006.229.10:14:35.14#ibcon#flushed, iclass 31, count 0 2006.229.10:14:35.14#ibcon#about to write, iclass 31, count 0 2006.229.10:14:35.14#ibcon#wrote, iclass 31, count 0 2006.229.10:14:35.14#ibcon#about to read 3, iclass 31, count 0 2006.229.10:14:35.16#ibcon#read 3, iclass 31, count 0 2006.229.10:14:35.16#ibcon#about to read 4, iclass 31, count 0 2006.229.10:14:35.16#ibcon#read 4, iclass 31, count 0 2006.229.10:14:35.16#ibcon#about to read 5, iclass 31, count 0 2006.229.10:14:35.16#ibcon#read 5, iclass 31, count 0 2006.229.10:14:35.16#ibcon#about to read 6, iclass 31, count 0 2006.229.10:14:35.16#ibcon#read 6, iclass 31, count 0 2006.229.10:14:35.16#ibcon#end of sib2, iclass 31, count 0 2006.229.10:14:35.16#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:14:35.16#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:14:35.16#ibcon#[27=USB\r\n] 2006.229.10:14:35.16#ibcon#*before write, iclass 31, count 0 2006.229.10:14:35.16#ibcon#enter sib2, iclass 31, count 0 2006.229.10:14:35.16#ibcon#flushed, iclass 31, count 0 2006.229.10:14:35.16#ibcon#about to write, iclass 31, count 0 2006.229.10:14:35.16#ibcon#wrote, iclass 31, count 0 2006.229.10:14:35.16#ibcon#about to read 3, iclass 31, count 0 2006.229.10:14:35.19#ibcon#read 3, iclass 31, count 0 2006.229.10:14:35.19#ibcon#about to read 4, iclass 31, count 0 2006.229.10:14:35.19#ibcon#read 4, iclass 31, count 0 2006.229.10:14:35.19#ibcon#about to read 5, iclass 31, count 0 2006.229.10:14:35.19#ibcon#read 5, iclass 31, count 0 2006.229.10:14:35.19#ibcon#about to read 6, iclass 31, count 0 2006.229.10:14:35.19#ibcon#read 6, iclass 31, count 0 2006.229.10:14:35.19#ibcon#end of sib2, iclass 31, count 0 2006.229.10:14:35.19#ibcon#*after write, iclass 31, count 0 2006.229.10:14:35.19#ibcon#*before return 0, iclass 31, count 0 2006.229.10:14:35.19#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:35.19#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:14:35.19#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:14:35.19#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:14:35.19$vck44/vblo=8,744.99 2006.229.10:14:35.19#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.10:14:35.19#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.10:14:35.19#ibcon#ireg 17 cls_cnt 0 2006.229.10:14:35.19#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:35.19#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:35.19#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:35.19#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:14:35.19#ibcon#first serial, iclass 33, count 0 2006.229.10:14:35.19#ibcon#enter sib2, iclass 33, count 0 2006.229.10:14:35.19#ibcon#flushed, iclass 33, count 0 2006.229.10:14:35.19#ibcon#about to write, iclass 33, count 0 2006.229.10:14:35.19#ibcon#wrote, iclass 33, count 0 2006.229.10:14:35.19#ibcon#about to read 3, iclass 33, count 0 2006.229.10:14:35.21#ibcon#read 3, iclass 33, count 0 2006.229.10:14:35.21#ibcon#about to read 4, iclass 33, count 0 2006.229.10:14:35.21#ibcon#read 4, iclass 33, count 0 2006.229.10:14:35.21#ibcon#about to read 5, iclass 33, count 0 2006.229.10:14:35.21#ibcon#read 5, iclass 33, count 0 2006.229.10:14:35.21#ibcon#about to read 6, iclass 33, count 0 2006.229.10:14:35.21#ibcon#read 6, iclass 33, count 0 2006.229.10:14:35.21#ibcon#end of sib2, iclass 33, count 0 2006.229.10:14:35.21#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:14:35.21#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:14:35.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:14:35.21#ibcon#*before write, iclass 33, count 0 2006.229.10:14:35.21#ibcon#enter sib2, iclass 33, count 0 2006.229.10:14:35.21#ibcon#flushed, iclass 33, count 0 2006.229.10:14:35.21#ibcon#about to write, iclass 33, count 0 2006.229.10:14:35.21#ibcon#wrote, iclass 33, count 0 2006.229.10:14:35.21#ibcon#about to read 3, iclass 33, count 0 2006.229.10:14:35.25#ibcon#read 3, iclass 33, count 0 2006.229.10:14:35.25#ibcon#about to read 4, iclass 33, count 0 2006.229.10:14:35.25#ibcon#read 4, iclass 33, count 0 2006.229.10:14:35.25#ibcon#about to read 5, iclass 33, count 0 2006.229.10:14:35.25#ibcon#read 5, iclass 33, count 0 2006.229.10:14:35.25#ibcon#about to read 6, iclass 33, count 0 2006.229.10:14:35.25#ibcon#read 6, iclass 33, count 0 2006.229.10:14:35.25#ibcon#end of sib2, iclass 33, count 0 2006.229.10:14:35.25#ibcon#*after write, iclass 33, count 0 2006.229.10:14:35.25#ibcon#*before return 0, iclass 33, count 0 2006.229.10:14:35.25#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:35.25#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:14:35.25#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:14:35.25#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:14:35.25$vck44/vb=8,4 2006.229.10:14:35.25#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.10:14:35.25#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.10:14:35.25#ibcon#ireg 11 cls_cnt 2 2006.229.10:14:35.25#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:35.31#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:35.31#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:35.31#ibcon#enter wrdev, iclass 35, count 2 2006.229.10:14:35.31#ibcon#first serial, iclass 35, count 2 2006.229.10:14:35.31#ibcon#enter sib2, iclass 35, count 2 2006.229.10:14:35.31#ibcon#flushed, iclass 35, count 2 2006.229.10:14:35.31#ibcon#about to write, iclass 35, count 2 2006.229.10:14:35.31#ibcon#wrote, iclass 35, count 2 2006.229.10:14:35.31#ibcon#about to read 3, iclass 35, count 2 2006.229.10:14:35.33#ibcon#read 3, iclass 35, count 2 2006.229.10:14:35.33#ibcon#about to read 4, iclass 35, count 2 2006.229.10:14:35.33#ibcon#read 4, iclass 35, count 2 2006.229.10:14:35.33#ibcon#about to read 5, iclass 35, count 2 2006.229.10:14:35.33#ibcon#read 5, iclass 35, count 2 2006.229.10:14:35.33#ibcon#about to read 6, iclass 35, count 2 2006.229.10:14:35.33#ibcon#read 6, iclass 35, count 2 2006.229.10:14:35.33#ibcon#end of sib2, iclass 35, count 2 2006.229.10:14:35.33#ibcon#*mode == 0, iclass 35, count 2 2006.229.10:14:35.33#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.10:14:35.33#ibcon#[27=AT08-04\r\n] 2006.229.10:14:35.33#ibcon#*before write, iclass 35, count 2 2006.229.10:14:35.33#ibcon#enter sib2, iclass 35, count 2 2006.229.10:14:35.33#ibcon#flushed, iclass 35, count 2 2006.229.10:14:35.33#ibcon#about to write, iclass 35, count 2 2006.229.10:14:35.33#ibcon#wrote, iclass 35, count 2 2006.229.10:14:35.33#ibcon#about to read 3, iclass 35, count 2 2006.229.10:14:35.36#ibcon#read 3, iclass 35, count 2 2006.229.10:14:35.36#ibcon#about to read 4, iclass 35, count 2 2006.229.10:14:35.36#ibcon#read 4, iclass 35, count 2 2006.229.10:14:35.36#ibcon#about to read 5, iclass 35, count 2 2006.229.10:14:35.36#ibcon#read 5, iclass 35, count 2 2006.229.10:14:35.36#ibcon#about to read 6, iclass 35, count 2 2006.229.10:14:35.36#ibcon#read 6, iclass 35, count 2 2006.229.10:14:35.36#ibcon#end of sib2, iclass 35, count 2 2006.229.10:14:35.36#ibcon#*after write, iclass 35, count 2 2006.229.10:14:35.36#ibcon#*before return 0, iclass 35, count 2 2006.229.10:14:35.36#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:35.36#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:14:35.36#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.10:14:35.36#ibcon#ireg 7 cls_cnt 0 2006.229.10:14:35.36#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:35.48#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:35.48#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:35.48#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:14:35.48#ibcon#first serial, iclass 35, count 0 2006.229.10:14:35.48#ibcon#enter sib2, iclass 35, count 0 2006.229.10:14:35.48#ibcon#flushed, iclass 35, count 0 2006.229.10:14:35.48#ibcon#about to write, iclass 35, count 0 2006.229.10:14:35.48#ibcon#wrote, iclass 35, count 0 2006.229.10:14:35.48#ibcon#about to read 3, iclass 35, count 0 2006.229.10:14:35.50#ibcon#read 3, iclass 35, count 0 2006.229.10:14:35.50#ibcon#about to read 4, iclass 35, count 0 2006.229.10:14:35.50#ibcon#read 4, iclass 35, count 0 2006.229.10:14:35.50#ibcon#about to read 5, iclass 35, count 0 2006.229.10:14:35.50#ibcon#read 5, iclass 35, count 0 2006.229.10:14:35.50#ibcon#about to read 6, iclass 35, count 0 2006.229.10:14:35.50#ibcon#read 6, iclass 35, count 0 2006.229.10:14:35.50#ibcon#end of sib2, iclass 35, count 0 2006.229.10:14:35.50#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:14:35.50#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:14:35.50#ibcon#[27=USB\r\n] 2006.229.10:14:35.50#ibcon#*before write, iclass 35, count 0 2006.229.10:14:35.50#ibcon#enter sib2, iclass 35, count 0 2006.229.10:14:35.50#ibcon#flushed, iclass 35, count 0 2006.229.10:14:35.50#ibcon#about to write, iclass 35, count 0 2006.229.10:14:35.50#ibcon#wrote, iclass 35, count 0 2006.229.10:14:35.50#ibcon#about to read 3, iclass 35, count 0 2006.229.10:14:35.53#ibcon#read 3, iclass 35, count 0 2006.229.10:14:35.53#ibcon#about to read 4, iclass 35, count 0 2006.229.10:14:35.53#ibcon#read 4, iclass 35, count 0 2006.229.10:14:35.53#ibcon#about to read 5, iclass 35, count 0 2006.229.10:14:35.53#ibcon#read 5, iclass 35, count 0 2006.229.10:14:35.53#ibcon#about to read 6, iclass 35, count 0 2006.229.10:14:35.53#ibcon#read 6, iclass 35, count 0 2006.229.10:14:35.53#ibcon#end of sib2, iclass 35, count 0 2006.229.10:14:35.53#ibcon#*after write, iclass 35, count 0 2006.229.10:14:35.53#ibcon#*before return 0, iclass 35, count 0 2006.229.10:14:35.53#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:35.53#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:14:35.53#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:14:35.53#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:14:35.53$vck44/vabw=wide 2006.229.10:14:35.53#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.10:14:35.53#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.10:14:35.53#ibcon#ireg 8 cls_cnt 0 2006.229.10:14:35.53#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:35.53#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:35.53#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:35.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:14:35.53#ibcon#first serial, iclass 37, count 0 2006.229.10:14:35.53#ibcon#enter sib2, iclass 37, count 0 2006.229.10:14:35.53#ibcon#flushed, iclass 37, count 0 2006.229.10:14:35.53#ibcon#about to write, iclass 37, count 0 2006.229.10:14:35.53#ibcon#wrote, iclass 37, count 0 2006.229.10:14:35.53#ibcon#about to read 3, iclass 37, count 0 2006.229.10:14:35.55#ibcon#read 3, iclass 37, count 0 2006.229.10:14:35.55#ibcon#about to read 4, iclass 37, count 0 2006.229.10:14:35.55#ibcon#read 4, iclass 37, count 0 2006.229.10:14:35.55#ibcon#about to read 5, iclass 37, count 0 2006.229.10:14:35.55#ibcon#read 5, iclass 37, count 0 2006.229.10:14:35.55#ibcon#about to read 6, iclass 37, count 0 2006.229.10:14:35.55#ibcon#read 6, iclass 37, count 0 2006.229.10:14:35.55#ibcon#end of sib2, iclass 37, count 0 2006.229.10:14:35.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:14:35.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:14:35.55#ibcon#[25=BW32\r\n] 2006.229.10:14:35.55#ibcon#*before write, iclass 37, count 0 2006.229.10:14:35.55#ibcon#enter sib2, iclass 37, count 0 2006.229.10:14:35.55#ibcon#flushed, iclass 37, count 0 2006.229.10:14:35.55#ibcon#about to write, iclass 37, count 0 2006.229.10:14:35.55#ibcon#wrote, iclass 37, count 0 2006.229.10:14:35.55#ibcon#about to read 3, iclass 37, count 0 2006.229.10:14:35.58#ibcon#read 3, iclass 37, count 0 2006.229.10:14:35.58#ibcon#about to read 4, iclass 37, count 0 2006.229.10:14:35.58#ibcon#read 4, iclass 37, count 0 2006.229.10:14:35.58#ibcon#about to read 5, iclass 37, count 0 2006.229.10:14:35.58#ibcon#read 5, iclass 37, count 0 2006.229.10:14:35.58#ibcon#about to read 6, iclass 37, count 0 2006.229.10:14:35.58#ibcon#read 6, iclass 37, count 0 2006.229.10:14:35.58#ibcon#end of sib2, iclass 37, count 0 2006.229.10:14:35.58#ibcon#*after write, iclass 37, count 0 2006.229.10:14:35.58#ibcon#*before return 0, iclass 37, count 0 2006.229.10:14:35.58#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:35.58#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:14:35.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:14:35.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:14:35.58$vck44/vbbw=wide 2006.229.10:14:35.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.10:14:35.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.10:14:35.58#ibcon#ireg 8 cls_cnt 0 2006.229.10:14:35.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:14:35.65#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:14:35.65#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:14:35.65#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:14:35.65#ibcon#first serial, iclass 39, count 0 2006.229.10:14:35.65#ibcon#enter sib2, iclass 39, count 0 2006.229.10:14:35.65#ibcon#flushed, iclass 39, count 0 2006.229.10:14:35.65#ibcon#about to write, iclass 39, count 0 2006.229.10:14:35.65#ibcon#wrote, iclass 39, count 0 2006.229.10:14:35.65#ibcon#about to read 3, iclass 39, count 0 2006.229.10:14:35.67#ibcon#read 3, iclass 39, count 0 2006.229.10:14:35.67#ibcon#about to read 4, iclass 39, count 0 2006.229.10:14:35.67#ibcon#read 4, iclass 39, count 0 2006.229.10:14:35.67#ibcon#about to read 5, iclass 39, count 0 2006.229.10:14:35.67#ibcon#read 5, iclass 39, count 0 2006.229.10:14:35.67#ibcon#about to read 6, iclass 39, count 0 2006.229.10:14:35.67#ibcon#read 6, iclass 39, count 0 2006.229.10:14:35.67#ibcon#end of sib2, iclass 39, count 0 2006.229.10:14:35.67#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:14:35.67#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:14:35.67#ibcon#[27=BW32\r\n] 2006.229.10:14:35.67#ibcon#*before write, iclass 39, count 0 2006.229.10:14:35.67#ibcon#enter sib2, iclass 39, count 0 2006.229.10:14:35.67#ibcon#flushed, iclass 39, count 0 2006.229.10:14:35.67#ibcon#about to write, iclass 39, count 0 2006.229.10:14:35.67#ibcon#wrote, iclass 39, count 0 2006.229.10:14:35.67#ibcon#about to read 3, iclass 39, count 0 2006.229.10:14:35.70#ibcon#read 3, iclass 39, count 0 2006.229.10:14:35.70#ibcon#about to read 4, iclass 39, count 0 2006.229.10:14:35.70#ibcon#read 4, iclass 39, count 0 2006.229.10:14:35.70#ibcon#about to read 5, iclass 39, count 0 2006.229.10:14:35.70#ibcon#read 5, iclass 39, count 0 2006.229.10:14:35.70#ibcon#about to read 6, iclass 39, count 0 2006.229.10:14:35.70#ibcon#read 6, iclass 39, count 0 2006.229.10:14:35.70#ibcon#end of sib2, iclass 39, count 0 2006.229.10:14:35.70#ibcon#*after write, iclass 39, count 0 2006.229.10:14:35.70#ibcon#*before return 0, iclass 39, count 0 2006.229.10:14:35.70#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:14:35.70#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:14:35.70#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:14:35.70#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:14:35.70$setupk4/ifdk4 2006.229.10:14:35.70$ifdk4/lo= 2006.229.10:14:35.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:14:35.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:14:35.70$ifdk4/patch= 2006.229.10:14:35.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:14:35.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:14:35.70$setupk4/!*+20s 2006.229.10:14:37.55#abcon#<5=/05 1.5 3.0 28.65 981001.3\r\n> 2006.229.10:14:37.57#abcon#{5=INTERFACE CLEAR} 2006.229.10:14:37.63#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:14:47.72#abcon#<5=/05 1.5 3.0 28.65 981001.3\r\n> 2006.229.10:14:47.74#abcon#{5=INTERFACE CLEAR} 2006.229.10:14:47.80#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:14:50.20$setupk4/"tpicd 2006.229.10:14:50.20$setupk4/echo=off 2006.229.10:14:50.20$setupk4/xlog=off 2006.229.10:14:50.20:!2006.229.10:18:43 2006.229.10:15:05.14#trakl#Source acquired 2006.229.10:15:05.14#flagr#flagr/antenna,acquired 2006.229.10:18:43.00:preob 2006.229.10:18:43.14/onsource/TRACKING 2006.229.10:18:43.14:!2006.229.10:18:53 2006.229.10:18:53.00:"tape 2006.229.10:18:53.00:"st=record 2006.229.10:18:53.00:data_valid=on 2006.229.10:18:53.00:midob 2006.229.10:18:53.14/onsource/TRACKING 2006.229.10:18:53.14/wx/28.63,1001.4,98 2006.229.10:18:53.34/cable/+6.4020E-03 2006.229.10:18:54.43/va/01,08,usb,yes,30,33 2006.229.10:18:54.43/va/02,07,usb,yes,33,33 2006.229.10:18:54.43/va/03,06,usb,yes,41,43 2006.229.10:18:54.43/va/04,07,usb,yes,34,35 2006.229.10:18:54.43/va/05,04,usb,yes,30,31 2006.229.10:18:54.43/va/06,04,usb,yes,34,33 2006.229.10:18:54.43/va/07,05,usb,yes,30,30 2006.229.10:18:54.43/va/08,06,usb,yes,22,27 2006.229.10:18:54.66/valo/01,524.99,yes,locked 2006.229.10:18:54.66/valo/02,534.99,yes,locked 2006.229.10:18:54.66/valo/03,564.99,yes,locked 2006.229.10:18:54.66/valo/04,624.99,yes,locked 2006.229.10:18:54.66/valo/05,734.99,yes,locked 2006.229.10:18:54.66/valo/06,814.99,yes,locked 2006.229.10:18:54.66/valo/07,864.99,yes,locked 2006.229.10:18:54.66/valo/08,884.99,yes,locked 2006.229.10:18:55.75/vb/01,04,usb,yes,31,29 2006.229.10:18:55.75/vb/02,04,usb,yes,33,33 2006.229.10:18:55.75/vb/03,04,usb,yes,30,34 2006.229.10:18:55.75/vb/04,04,usb,yes,35,34 2006.229.10:18:55.75/vb/05,04,usb,yes,27,30 2006.229.10:18:55.75/vb/06,04,usb,yes,32,28 2006.229.10:18:55.75/vb/07,04,usb,yes,32,31 2006.229.10:18:55.75/vb/08,04,usb,yes,29,32 2006.229.10:18:55.99/vblo/01,629.99,yes,locked 2006.229.10:18:55.99/vblo/02,634.99,yes,locked 2006.229.10:18:55.99/vblo/03,649.99,yes,locked 2006.229.10:18:55.99/vblo/04,679.99,yes,locked 2006.229.10:18:55.99/vblo/05,709.99,yes,locked 2006.229.10:18:55.99/vblo/06,719.99,yes,locked 2006.229.10:18:55.99/vblo/07,734.99,yes,locked 2006.229.10:18:55.99/vblo/08,744.99,yes,locked 2006.229.10:18:56.14/vabw/8 2006.229.10:18:56.29/vbbw/8 2006.229.10:18:56.38/xfe/off,on,12.0 2006.229.10:18:56.75/ifatt/23,28,28,28 2006.229.10:18:57.07/fmout-gps/S +4.49E-07 2006.229.10:18:57.11:!2006.229.10:20:23 2006.229.10:20:23.00:data_valid=off 2006.229.10:20:23.00:"et 2006.229.10:20:23.00:!+3s 2006.229.10:20:26.01:"tape 2006.229.10:20:26.01:postob 2006.229.10:20:26.21/cable/+6.4031E-03 2006.229.10:20:26.21/wx/28.62,1001.4,98 2006.229.10:20:27.08/fmout-gps/S +4.47E-07 2006.229.10:20:27.08:scan_name=229-1025,jd0608,170 2006.229.10:20:27.08:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.10:20:27.14#flagr#flagr/antenna,new-source 2006.229.10:20:28.13:checkk5 2006.229.10:20:28.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:20:28.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:20:29.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:20:29.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:20:30.15/chk_obsdata//k5ts1/T2291018??a.dat file size is correct (nominal:360MB, actual:360MB). 2006.229.10:20:30.55/chk_obsdata//k5ts2/T2291018??b.dat file size is correct (nominal:360MB, actual:360MB). 2006.229.10:20:30.96/chk_obsdata//k5ts3/T2291018??c.dat file size is correct (nominal:360MB, actual:360MB). 2006.229.10:20:31.35/chk_obsdata//k5ts4/T2291018??d.dat file size is correct (nominal:360MB, actual:360MB). 2006.229.10:20:32.07/k5log//k5ts1_log_newline 2006.229.10:20:32.79/k5log//k5ts2_log_newline 2006.229.10:20:33.50/k5log//k5ts3_log_newline 2006.229.10:20:34.21/k5log//k5ts4_log_newline 2006.229.10:20:34.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:20:34.24:setupk4=1 2006.229.10:20:34.24$setupk4/echo=on 2006.229.10:20:34.24$setupk4/pcalon 2006.229.10:20:34.24$pcalon/"no phase cal control is implemented here 2006.229.10:20:34.24$setupk4/"tpicd=stop 2006.229.10:20:34.24$setupk4/"rec=synch_on 2006.229.10:20:34.24$setupk4/"rec_mode=128 2006.229.10:20:34.24$setupk4/!* 2006.229.10:20:34.24$setupk4/recpk4 2006.229.10:20:34.24$recpk4/recpatch= 2006.229.10:20:34.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:20:34.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:20:34.24$setupk4/vck44 2006.229.10:20:34.24$vck44/valo=1,524.99 2006.229.10:20:34.24#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.10:20:34.24#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.10:20:34.24#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:34.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:34.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:34.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:34.24#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:20:34.24#ibcon#first serial, iclass 6, count 0 2006.229.10:20:34.24#ibcon#enter sib2, iclass 6, count 0 2006.229.10:20:34.24#ibcon#flushed, iclass 6, count 0 2006.229.10:20:34.24#ibcon#about to write, iclass 6, count 0 2006.229.10:20:34.24#ibcon#wrote, iclass 6, count 0 2006.229.10:20:34.24#ibcon#about to read 3, iclass 6, count 0 2006.229.10:20:34.26#ibcon#read 3, iclass 6, count 0 2006.229.10:20:34.26#ibcon#about to read 4, iclass 6, count 0 2006.229.10:20:34.26#ibcon#read 4, iclass 6, count 0 2006.229.10:20:34.26#ibcon#about to read 5, iclass 6, count 0 2006.229.10:20:34.26#ibcon#read 5, iclass 6, count 0 2006.229.10:20:34.26#ibcon#about to read 6, iclass 6, count 0 2006.229.10:20:34.26#ibcon#read 6, iclass 6, count 0 2006.229.10:20:34.26#ibcon#end of sib2, iclass 6, count 0 2006.229.10:20:34.26#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:20:34.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:20:34.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:20:34.26#ibcon#*before write, iclass 6, count 0 2006.229.10:20:34.26#ibcon#enter sib2, iclass 6, count 0 2006.229.10:20:34.26#ibcon#flushed, iclass 6, count 0 2006.229.10:20:34.26#ibcon#about to write, iclass 6, count 0 2006.229.10:20:34.26#ibcon#wrote, iclass 6, count 0 2006.229.10:20:34.26#ibcon#about to read 3, iclass 6, count 0 2006.229.10:20:34.31#ibcon#read 3, iclass 6, count 0 2006.229.10:20:34.31#ibcon#about to read 4, iclass 6, count 0 2006.229.10:20:34.31#ibcon#read 4, iclass 6, count 0 2006.229.10:20:34.31#ibcon#about to read 5, iclass 6, count 0 2006.229.10:20:34.31#ibcon#read 5, iclass 6, count 0 2006.229.10:20:34.31#ibcon#about to read 6, iclass 6, count 0 2006.229.10:20:34.31#ibcon#read 6, iclass 6, count 0 2006.229.10:20:34.31#ibcon#end of sib2, iclass 6, count 0 2006.229.10:20:34.31#ibcon#*after write, iclass 6, count 0 2006.229.10:20:34.31#ibcon#*before return 0, iclass 6, count 0 2006.229.10:20:34.31#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:34.31#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:34.31#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:20:34.31#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:20:34.31$vck44/va=1,8 2006.229.10:20:34.31#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.10:20:34.31#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.10:20:34.31#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:34.31#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:34.31#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:34.31#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:34.31#ibcon#enter wrdev, iclass 10, count 2 2006.229.10:20:34.31#ibcon#first serial, iclass 10, count 2 2006.229.10:20:34.31#ibcon#enter sib2, iclass 10, count 2 2006.229.10:20:34.31#ibcon#flushed, iclass 10, count 2 2006.229.10:20:34.31#ibcon#about to write, iclass 10, count 2 2006.229.10:20:34.31#ibcon#wrote, iclass 10, count 2 2006.229.10:20:34.31#ibcon#about to read 3, iclass 10, count 2 2006.229.10:20:34.33#ibcon#read 3, iclass 10, count 2 2006.229.10:20:34.33#ibcon#about to read 4, iclass 10, count 2 2006.229.10:20:34.33#ibcon#read 4, iclass 10, count 2 2006.229.10:20:34.33#ibcon#about to read 5, iclass 10, count 2 2006.229.10:20:34.33#ibcon#read 5, iclass 10, count 2 2006.229.10:20:34.33#ibcon#about to read 6, iclass 10, count 2 2006.229.10:20:34.33#ibcon#read 6, iclass 10, count 2 2006.229.10:20:34.33#ibcon#end of sib2, iclass 10, count 2 2006.229.10:20:34.33#ibcon#*mode == 0, iclass 10, count 2 2006.229.10:20:34.33#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.10:20:34.33#ibcon#[25=AT01-08\r\n] 2006.229.10:20:34.33#ibcon#*before write, iclass 10, count 2 2006.229.10:20:34.33#ibcon#enter sib2, iclass 10, count 2 2006.229.10:20:34.33#ibcon#flushed, iclass 10, count 2 2006.229.10:20:34.33#ibcon#about to write, iclass 10, count 2 2006.229.10:20:34.33#ibcon#wrote, iclass 10, count 2 2006.229.10:20:34.33#ibcon#about to read 3, iclass 10, count 2 2006.229.10:20:34.36#ibcon#read 3, iclass 10, count 2 2006.229.10:20:34.36#ibcon#about to read 4, iclass 10, count 2 2006.229.10:20:34.36#ibcon#read 4, iclass 10, count 2 2006.229.10:20:34.36#ibcon#about to read 5, iclass 10, count 2 2006.229.10:20:34.36#ibcon#read 5, iclass 10, count 2 2006.229.10:20:34.36#ibcon#about to read 6, iclass 10, count 2 2006.229.10:20:34.36#ibcon#read 6, iclass 10, count 2 2006.229.10:20:34.36#ibcon#end of sib2, iclass 10, count 2 2006.229.10:20:34.36#ibcon#*after write, iclass 10, count 2 2006.229.10:20:34.36#ibcon#*before return 0, iclass 10, count 2 2006.229.10:20:34.36#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:34.36#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:34.36#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.10:20:34.36#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:34.36#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:34.48#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:34.48#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:34.48#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:20:34.48#ibcon#first serial, iclass 10, count 0 2006.229.10:20:34.48#ibcon#enter sib2, iclass 10, count 0 2006.229.10:20:34.48#ibcon#flushed, iclass 10, count 0 2006.229.10:20:34.48#ibcon#about to write, iclass 10, count 0 2006.229.10:20:34.48#ibcon#wrote, iclass 10, count 0 2006.229.10:20:34.48#ibcon#about to read 3, iclass 10, count 0 2006.229.10:20:34.50#ibcon#read 3, iclass 10, count 0 2006.229.10:20:34.50#ibcon#about to read 4, iclass 10, count 0 2006.229.10:20:34.50#ibcon#read 4, iclass 10, count 0 2006.229.10:20:34.50#ibcon#about to read 5, iclass 10, count 0 2006.229.10:20:34.50#ibcon#read 5, iclass 10, count 0 2006.229.10:20:34.50#ibcon#about to read 6, iclass 10, count 0 2006.229.10:20:34.50#ibcon#read 6, iclass 10, count 0 2006.229.10:20:34.50#ibcon#end of sib2, iclass 10, count 0 2006.229.10:20:34.50#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:20:34.50#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:20:34.50#ibcon#[25=USB\r\n] 2006.229.10:20:34.50#ibcon#*before write, iclass 10, count 0 2006.229.10:20:34.50#ibcon#enter sib2, iclass 10, count 0 2006.229.10:20:34.50#ibcon#flushed, iclass 10, count 0 2006.229.10:20:34.50#ibcon#about to write, iclass 10, count 0 2006.229.10:20:34.50#ibcon#wrote, iclass 10, count 0 2006.229.10:20:34.50#ibcon#about to read 3, iclass 10, count 0 2006.229.10:20:34.53#ibcon#read 3, iclass 10, count 0 2006.229.10:20:34.53#ibcon#about to read 4, iclass 10, count 0 2006.229.10:20:34.53#ibcon#read 4, iclass 10, count 0 2006.229.10:20:34.53#ibcon#about to read 5, iclass 10, count 0 2006.229.10:20:34.53#ibcon#read 5, iclass 10, count 0 2006.229.10:20:34.53#ibcon#about to read 6, iclass 10, count 0 2006.229.10:20:34.53#ibcon#read 6, iclass 10, count 0 2006.229.10:20:34.53#ibcon#end of sib2, iclass 10, count 0 2006.229.10:20:34.53#ibcon#*after write, iclass 10, count 0 2006.229.10:20:34.53#ibcon#*before return 0, iclass 10, count 0 2006.229.10:20:34.53#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:34.53#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:34.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:20:34.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:20:34.53$vck44/valo=2,534.99 2006.229.10:20:34.53#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.10:20:34.53#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.10:20:34.53#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:34.53#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:34.53#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:34.53#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:34.53#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:20:34.53#ibcon#first serial, iclass 12, count 0 2006.229.10:20:34.53#ibcon#enter sib2, iclass 12, count 0 2006.229.10:20:34.53#ibcon#flushed, iclass 12, count 0 2006.229.10:20:34.53#ibcon#about to write, iclass 12, count 0 2006.229.10:20:34.53#ibcon#wrote, iclass 12, count 0 2006.229.10:20:34.53#ibcon#about to read 3, iclass 12, count 0 2006.229.10:20:34.55#ibcon#read 3, iclass 12, count 0 2006.229.10:20:34.55#ibcon#about to read 4, iclass 12, count 0 2006.229.10:20:34.55#ibcon#read 4, iclass 12, count 0 2006.229.10:20:34.55#ibcon#about to read 5, iclass 12, count 0 2006.229.10:20:34.55#ibcon#read 5, iclass 12, count 0 2006.229.10:20:34.55#ibcon#about to read 6, iclass 12, count 0 2006.229.10:20:34.55#ibcon#read 6, iclass 12, count 0 2006.229.10:20:34.55#ibcon#end of sib2, iclass 12, count 0 2006.229.10:20:34.55#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:20:34.55#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:20:34.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:20:34.55#ibcon#*before write, iclass 12, count 0 2006.229.10:20:34.55#ibcon#enter sib2, iclass 12, count 0 2006.229.10:20:34.55#ibcon#flushed, iclass 12, count 0 2006.229.10:20:34.55#ibcon#about to write, iclass 12, count 0 2006.229.10:20:34.55#ibcon#wrote, iclass 12, count 0 2006.229.10:20:34.55#ibcon#about to read 3, iclass 12, count 0 2006.229.10:20:34.59#ibcon#read 3, iclass 12, count 0 2006.229.10:20:34.59#ibcon#about to read 4, iclass 12, count 0 2006.229.10:20:34.59#ibcon#read 4, iclass 12, count 0 2006.229.10:20:34.59#ibcon#about to read 5, iclass 12, count 0 2006.229.10:20:34.59#ibcon#read 5, iclass 12, count 0 2006.229.10:20:34.59#ibcon#about to read 6, iclass 12, count 0 2006.229.10:20:34.59#ibcon#read 6, iclass 12, count 0 2006.229.10:20:34.59#ibcon#end of sib2, iclass 12, count 0 2006.229.10:20:34.59#ibcon#*after write, iclass 12, count 0 2006.229.10:20:34.59#ibcon#*before return 0, iclass 12, count 0 2006.229.10:20:34.59#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:34.59#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:34.59#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:20:34.59#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:20:34.59$vck44/va=2,7 2006.229.10:20:34.59#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.10:20:34.59#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.10:20:34.59#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:34.59#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:34.65#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:34.65#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:34.65#ibcon#enter wrdev, iclass 14, count 2 2006.229.10:20:34.65#ibcon#first serial, iclass 14, count 2 2006.229.10:20:34.65#ibcon#enter sib2, iclass 14, count 2 2006.229.10:20:34.65#ibcon#flushed, iclass 14, count 2 2006.229.10:20:34.65#ibcon#about to write, iclass 14, count 2 2006.229.10:20:34.65#ibcon#wrote, iclass 14, count 2 2006.229.10:20:34.65#ibcon#about to read 3, iclass 14, count 2 2006.229.10:20:34.67#ibcon#read 3, iclass 14, count 2 2006.229.10:20:34.67#ibcon#about to read 4, iclass 14, count 2 2006.229.10:20:34.67#ibcon#read 4, iclass 14, count 2 2006.229.10:20:34.67#ibcon#about to read 5, iclass 14, count 2 2006.229.10:20:34.67#ibcon#read 5, iclass 14, count 2 2006.229.10:20:34.67#ibcon#about to read 6, iclass 14, count 2 2006.229.10:20:34.67#ibcon#read 6, iclass 14, count 2 2006.229.10:20:34.67#ibcon#end of sib2, iclass 14, count 2 2006.229.10:20:34.67#ibcon#*mode == 0, iclass 14, count 2 2006.229.10:20:34.67#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.10:20:34.67#ibcon#[25=AT02-07\r\n] 2006.229.10:20:34.67#ibcon#*before write, iclass 14, count 2 2006.229.10:20:34.67#ibcon#enter sib2, iclass 14, count 2 2006.229.10:20:34.67#ibcon#flushed, iclass 14, count 2 2006.229.10:20:34.67#ibcon#about to write, iclass 14, count 2 2006.229.10:20:34.67#ibcon#wrote, iclass 14, count 2 2006.229.10:20:34.67#ibcon#about to read 3, iclass 14, count 2 2006.229.10:20:34.70#ibcon#read 3, iclass 14, count 2 2006.229.10:20:34.70#ibcon#about to read 4, iclass 14, count 2 2006.229.10:20:34.70#ibcon#read 4, iclass 14, count 2 2006.229.10:20:34.70#ibcon#about to read 5, iclass 14, count 2 2006.229.10:20:34.70#ibcon#read 5, iclass 14, count 2 2006.229.10:20:34.70#ibcon#about to read 6, iclass 14, count 2 2006.229.10:20:34.70#ibcon#read 6, iclass 14, count 2 2006.229.10:20:34.70#ibcon#end of sib2, iclass 14, count 2 2006.229.10:20:34.70#ibcon#*after write, iclass 14, count 2 2006.229.10:20:34.70#ibcon#*before return 0, iclass 14, count 2 2006.229.10:20:34.70#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:34.70#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:34.70#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.10:20:34.70#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:34.70#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:34.82#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:34.82#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:34.82#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:20:34.82#ibcon#first serial, iclass 14, count 0 2006.229.10:20:34.82#ibcon#enter sib2, iclass 14, count 0 2006.229.10:20:34.82#ibcon#flushed, iclass 14, count 0 2006.229.10:20:34.82#ibcon#about to write, iclass 14, count 0 2006.229.10:20:34.82#ibcon#wrote, iclass 14, count 0 2006.229.10:20:34.82#ibcon#about to read 3, iclass 14, count 0 2006.229.10:20:34.84#ibcon#read 3, iclass 14, count 0 2006.229.10:20:34.84#ibcon#about to read 4, iclass 14, count 0 2006.229.10:20:34.84#ibcon#read 4, iclass 14, count 0 2006.229.10:20:34.84#ibcon#about to read 5, iclass 14, count 0 2006.229.10:20:34.84#ibcon#read 5, iclass 14, count 0 2006.229.10:20:34.84#ibcon#about to read 6, iclass 14, count 0 2006.229.10:20:34.84#ibcon#read 6, iclass 14, count 0 2006.229.10:20:34.84#ibcon#end of sib2, iclass 14, count 0 2006.229.10:20:34.84#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:20:34.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:20:34.84#ibcon#[25=USB\r\n] 2006.229.10:20:34.84#ibcon#*before write, iclass 14, count 0 2006.229.10:20:34.84#ibcon#enter sib2, iclass 14, count 0 2006.229.10:20:34.84#ibcon#flushed, iclass 14, count 0 2006.229.10:20:34.84#ibcon#about to write, iclass 14, count 0 2006.229.10:20:34.84#ibcon#wrote, iclass 14, count 0 2006.229.10:20:34.84#ibcon#about to read 3, iclass 14, count 0 2006.229.10:20:34.87#ibcon#read 3, iclass 14, count 0 2006.229.10:20:34.87#ibcon#about to read 4, iclass 14, count 0 2006.229.10:20:34.87#ibcon#read 4, iclass 14, count 0 2006.229.10:20:34.87#ibcon#about to read 5, iclass 14, count 0 2006.229.10:20:34.87#ibcon#read 5, iclass 14, count 0 2006.229.10:20:34.87#ibcon#about to read 6, iclass 14, count 0 2006.229.10:20:34.87#ibcon#read 6, iclass 14, count 0 2006.229.10:20:34.87#ibcon#end of sib2, iclass 14, count 0 2006.229.10:20:34.87#ibcon#*after write, iclass 14, count 0 2006.229.10:20:34.87#ibcon#*before return 0, iclass 14, count 0 2006.229.10:20:34.87#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:34.87#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:34.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:20:34.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:20:34.87$vck44/valo=3,564.99 2006.229.10:20:34.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.10:20:34.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.10:20:34.87#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:34.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:34.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:34.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:34.87#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:20:34.87#ibcon#first serial, iclass 16, count 0 2006.229.10:20:34.87#ibcon#enter sib2, iclass 16, count 0 2006.229.10:20:34.87#ibcon#flushed, iclass 16, count 0 2006.229.10:20:34.87#ibcon#about to write, iclass 16, count 0 2006.229.10:20:34.87#ibcon#wrote, iclass 16, count 0 2006.229.10:20:34.87#ibcon#about to read 3, iclass 16, count 0 2006.229.10:20:34.89#ibcon#read 3, iclass 16, count 0 2006.229.10:20:34.89#ibcon#about to read 4, iclass 16, count 0 2006.229.10:20:34.89#ibcon#read 4, iclass 16, count 0 2006.229.10:20:34.89#ibcon#about to read 5, iclass 16, count 0 2006.229.10:20:34.89#ibcon#read 5, iclass 16, count 0 2006.229.10:20:34.89#ibcon#about to read 6, iclass 16, count 0 2006.229.10:20:34.89#ibcon#read 6, iclass 16, count 0 2006.229.10:20:34.89#ibcon#end of sib2, iclass 16, count 0 2006.229.10:20:34.89#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:20:34.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:20:34.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:20:34.89#ibcon#*before write, iclass 16, count 0 2006.229.10:20:34.89#ibcon#enter sib2, iclass 16, count 0 2006.229.10:20:34.89#ibcon#flushed, iclass 16, count 0 2006.229.10:20:34.89#ibcon#about to write, iclass 16, count 0 2006.229.10:20:34.89#ibcon#wrote, iclass 16, count 0 2006.229.10:20:34.89#ibcon#about to read 3, iclass 16, count 0 2006.229.10:20:34.93#ibcon#read 3, iclass 16, count 0 2006.229.10:20:34.93#ibcon#about to read 4, iclass 16, count 0 2006.229.10:20:34.93#ibcon#read 4, iclass 16, count 0 2006.229.10:20:34.93#ibcon#about to read 5, iclass 16, count 0 2006.229.10:20:34.93#ibcon#read 5, iclass 16, count 0 2006.229.10:20:34.93#ibcon#about to read 6, iclass 16, count 0 2006.229.10:20:34.93#ibcon#read 6, iclass 16, count 0 2006.229.10:20:34.93#ibcon#end of sib2, iclass 16, count 0 2006.229.10:20:34.93#ibcon#*after write, iclass 16, count 0 2006.229.10:20:34.93#ibcon#*before return 0, iclass 16, count 0 2006.229.10:20:34.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:34.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:34.93#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:20:34.93#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:20:34.93$vck44/va=3,6 2006.229.10:20:34.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.10:20:34.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.10:20:34.93#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:34.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:34.99#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:34.99#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:34.99#ibcon#enter wrdev, iclass 18, count 2 2006.229.10:20:34.99#ibcon#first serial, iclass 18, count 2 2006.229.10:20:34.99#ibcon#enter sib2, iclass 18, count 2 2006.229.10:20:34.99#ibcon#flushed, iclass 18, count 2 2006.229.10:20:34.99#ibcon#about to write, iclass 18, count 2 2006.229.10:20:34.99#ibcon#wrote, iclass 18, count 2 2006.229.10:20:34.99#ibcon#about to read 3, iclass 18, count 2 2006.229.10:20:35.01#ibcon#read 3, iclass 18, count 2 2006.229.10:20:35.01#ibcon#about to read 4, iclass 18, count 2 2006.229.10:20:35.01#ibcon#read 4, iclass 18, count 2 2006.229.10:20:35.01#ibcon#about to read 5, iclass 18, count 2 2006.229.10:20:35.01#ibcon#read 5, iclass 18, count 2 2006.229.10:20:35.01#ibcon#about to read 6, iclass 18, count 2 2006.229.10:20:35.01#ibcon#read 6, iclass 18, count 2 2006.229.10:20:35.01#ibcon#end of sib2, iclass 18, count 2 2006.229.10:20:35.01#ibcon#*mode == 0, iclass 18, count 2 2006.229.10:20:35.01#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.10:20:35.01#ibcon#[25=AT03-06\r\n] 2006.229.10:20:35.01#ibcon#*before write, iclass 18, count 2 2006.229.10:20:35.01#ibcon#enter sib2, iclass 18, count 2 2006.229.10:20:35.01#ibcon#flushed, iclass 18, count 2 2006.229.10:20:35.01#ibcon#about to write, iclass 18, count 2 2006.229.10:20:35.01#ibcon#wrote, iclass 18, count 2 2006.229.10:20:35.01#ibcon#about to read 3, iclass 18, count 2 2006.229.10:20:35.04#ibcon#read 3, iclass 18, count 2 2006.229.10:20:35.04#ibcon#about to read 4, iclass 18, count 2 2006.229.10:20:35.04#ibcon#read 4, iclass 18, count 2 2006.229.10:20:35.04#ibcon#about to read 5, iclass 18, count 2 2006.229.10:20:35.04#ibcon#read 5, iclass 18, count 2 2006.229.10:20:35.04#ibcon#about to read 6, iclass 18, count 2 2006.229.10:20:35.04#ibcon#read 6, iclass 18, count 2 2006.229.10:20:35.04#ibcon#end of sib2, iclass 18, count 2 2006.229.10:20:35.04#ibcon#*after write, iclass 18, count 2 2006.229.10:20:35.04#ibcon#*before return 0, iclass 18, count 2 2006.229.10:20:35.04#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:35.04#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:35.04#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.10:20:35.04#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:35.04#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:35.16#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:35.16#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:35.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:20:35.16#ibcon#first serial, iclass 18, count 0 2006.229.10:20:35.16#ibcon#enter sib2, iclass 18, count 0 2006.229.10:20:35.16#ibcon#flushed, iclass 18, count 0 2006.229.10:20:35.16#ibcon#about to write, iclass 18, count 0 2006.229.10:20:35.16#ibcon#wrote, iclass 18, count 0 2006.229.10:20:35.16#ibcon#about to read 3, iclass 18, count 0 2006.229.10:20:35.18#ibcon#read 3, iclass 18, count 0 2006.229.10:20:35.18#ibcon#about to read 4, iclass 18, count 0 2006.229.10:20:35.18#ibcon#read 4, iclass 18, count 0 2006.229.10:20:35.18#ibcon#about to read 5, iclass 18, count 0 2006.229.10:20:35.18#ibcon#read 5, iclass 18, count 0 2006.229.10:20:35.18#ibcon#about to read 6, iclass 18, count 0 2006.229.10:20:35.18#ibcon#read 6, iclass 18, count 0 2006.229.10:20:35.18#ibcon#end of sib2, iclass 18, count 0 2006.229.10:20:35.18#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:20:35.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:20:35.18#ibcon#[25=USB\r\n] 2006.229.10:20:35.18#ibcon#*before write, iclass 18, count 0 2006.229.10:20:35.18#ibcon#enter sib2, iclass 18, count 0 2006.229.10:20:35.18#ibcon#flushed, iclass 18, count 0 2006.229.10:20:35.18#ibcon#about to write, iclass 18, count 0 2006.229.10:20:35.18#ibcon#wrote, iclass 18, count 0 2006.229.10:20:35.18#ibcon#about to read 3, iclass 18, count 0 2006.229.10:20:35.21#ibcon#read 3, iclass 18, count 0 2006.229.10:20:35.21#ibcon#about to read 4, iclass 18, count 0 2006.229.10:20:35.21#ibcon#read 4, iclass 18, count 0 2006.229.10:20:35.21#ibcon#about to read 5, iclass 18, count 0 2006.229.10:20:35.21#ibcon#read 5, iclass 18, count 0 2006.229.10:20:35.21#ibcon#about to read 6, iclass 18, count 0 2006.229.10:20:35.21#ibcon#read 6, iclass 18, count 0 2006.229.10:20:35.21#ibcon#end of sib2, iclass 18, count 0 2006.229.10:20:35.21#ibcon#*after write, iclass 18, count 0 2006.229.10:20:35.21#ibcon#*before return 0, iclass 18, count 0 2006.229.10:20:35.21#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:35.21#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:35.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:20:35.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:20:35.21$vck44/valo=4,624.99 2006.229.10:20:35.21#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.10:20:35.21#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.10:20:35.21#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:35.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:35.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:35.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:35.21#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:20:35.21#ibcon#first serial, iclass 20, count 0 2006.229.10:20:35.21#ibcon#enter sib2, iclass 20, count 0 2006.229.10:20:35.21#ibcon#flushed, iclass 20, count 0 2006.229.10:20:35.21#ibcon#about to write, iclass 20, count 0 2006.229.10:20:35.21#ibcon#wrote, iclass 20, count 0 2006.229.10:20:35.21#ibcon#about to read 3, iclass 20, count 0 2006.229.10:20:35.23#ibcon#read 3, iclass 20, count 0 2006.229.10:20:35.23#ibcon#about to read 4, iclass 20, count 0 2006.229.10:20:35.23#ibcon#read 4, iclass 20, count 0 2006.229.10:20:35.23#ibcon#about to read 5, iclass 20, count 0 2006.229.10:20:35.23#ibcon#read 5, iclass 20, count 0 2006.229.10:20:35.23#ibcon#about to read 6, iclass 20, count 0 2006.229.10:20:35.23#ibcon#read 6, iclass 20, count 0 2006.229.10:20:35.23#ibcon#end of sib2, iclass 20, count 0 2006.229.10:20:35.23#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:20:35.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:20:35.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:20:35.23#ibcon#*before write, iclass 20, count 0 2006.229.10:20:35.23#ibcon#enter sib2, iclass 20, count 0 2006.229.10:20:35.23#ibcon#flushed, iclass 20, count 0 2006.229.10:20:35.23#ibcon#about to write, iclass 20, count 0 2006.229.10:20:35.23#ibcon#wrote, iclass 20, count 0 2006.229.10:20:35.23#ibcon#about to read 3, iclass 20, count 0 2006.229.10:20:35.27#ibcon#read 3, iclass 20, count 0 2006.229.10:20:35.27#ibcon#about to read 4, iclass 20, count 0 2006.229.10:20:35.27#ibcon#read 4, iclass 20, count 0 2006.229.10:20:35.27#ibcon#about to read 5, iclass 20, count 0 2006.229.10:20:35.27#ibcon#read 5, iclass 20, count 0 2006.229.10:20:35.27#ibcon#about to read 6, iclass 20, count 0 2006.229.10:20:35.27#ibcon#read 6, iclass 20, count 0 2006.229.10:20:35.27#ibcon#end of sib2, iclass 20, count 0 2006.229.10:20:35.27#ibcon#*after write, iclass 20, count 0 2006.229.10:20:35.27#ibcon#*before return 0, iclass 20, count 0 2006.229.10:20:35.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:35.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:35.27#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:20:35.27#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:20:35.27$vck44/va=4,7 2006.229.10:20:35.27#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.10:20:35.27#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.10:20:35.27#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:35.27#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:35.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:35.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:35.33#ibcon#enter wrdev, iclass 22, count 2 2006.229.10:20:35.33#ibcon#first serial, iclass 22, count 2 2006.229.10:20:35.33#ibcon#enter sib2, iclass 22, count 2 2006.229.10:20:35.33#ibcon#flushed, iclass 22, count 2 2006.229.10:20:35.33#ibcon#about to write, iclass 22, count 2 2006.229.10:20:35.33#ibcon#wrote, iclass 22, count 2 2006.229.10:20:35.33#ibcon#about to read 3, iclass 22, count 2 2006.229.10:20:35.35#ibcon#read 3, iclass 22, count 2 2006.229.10:20:35.35#ibcon#about to read 4, iclass 22, count 2 2006.229.10:20:35.35#ibcon#read 4, iclass 22, count 2 2006.229.10:20:35.35#ibcon#about to read 5, iclass 22, count 2 2006.229.10:20:35.35#ibcon#read 5, iclass 22, count 2 2006.229.10:20:35.35#ibcon#about to read 6, iclass 22, count 2 2006.229.10:20:35.35#ibcon#read 6, iclass 22, count 2 2006.229.10:20:35.35#ibcon#end of sib2, iclass 22, count 2 2006.229.10:20:35.35#ibcon#*mode == 0, iclass 22, count 2 2006.229.10:20:35.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.10:20:35.35#ibcon#[25=AT04-07\r\n] 2006.229.10:20:35.35#ibcon#*before write, iclass 22, count 2 2006.229.10:20:35.35#ibcon#enter sib2, iclass 22, count 2 2006.229.10:20:35.35#ibcon#flushed, iclass 22, count 2 2006.229.10:20:35.35#ibcon#about to write, iclass 22, count 2 2006.229.10:20:35.35#ibcon#wrote, iclass 22, count 2 2006.229.10:20:35.35#ibcon#about to read 3, iclass 22, count 2 2006.229.10:20:35.38#ibcon#read 3, iclass 22, count 2 2006.229.10:20:35.38#ibcon#about to read 4, iclass 22, count 2 2006.229.10:20:35.38#ibcon#read 4, iclass 22, count 2 2006.229.10:20:35.38#ibcon#about to read 5, iclass 22, count 2 2006.229.10:20:35.38#ibcon#read 5, iclass 22, count 2 2006.229.10:20:35.38#ibcon#about to read 6, iclass 22, count 2 2006.229.10:20:35.38#ibcon#read 6, iclass 22, count 2 2006.229.10:20:35.38#ibcon#end of sib2, iclass 22, count 2 2006.229.10:20:35.38#ibcon#*after write, iclass 22, count 2 2006.229.10:20:35.38#ibcon#*before return 0, iclass 22, count 2 2006.229.10:20:35.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:35.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:35.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.10:20:35.38#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:35.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:35.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:35.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:35.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:20:35.50#ibcon#first serial, iclass 22, count 0 2006.229.10:20:35.50#ibcon#enter sib2, iclass 22, count 0 2006.229.10:20:35.50#ibcon#flushed, iclass 22, count 0 2006.229.10:20:35.50#ibcon#about to write, iclass 22, count 0 2006.229.10:20:35.50#ibcon#wrote, iclass 22, count 0 2006.229.10:20:35.50#ibcon#about to read 3, iclass 22, count 0 2006.229.10:20:35.52#ibcon#read 3, iclass 22, count 0 2006.229.10:20:35.52#ibcon#about to read 4, iclass 22, count 0 2006.229.10:20:35.52#ibcon#read 4, iclass 22, count 0 2006.229.10:20:35.52#ibcon#about to read 5, iclass 22, count 0 2006.229.10:20:35.52#ibcon#read 5, iclass 22, count 0 2006.229.10:20:35.52#ibcon#about to read 6, iclass 22, count 0 2006.229.10:20:35.52#ibcon#read 6, iclass 22, count 0 2006.229.10:20:35.52#ibcon#end of sib2, iclass 22, count 0 2006.229.10:20:35.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:20:35.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:20:35.52#ibcon#[25=USB\r\n] 2006.229.10:20:35.52#ibcon#*before write, iclass 22, count 0 2006.229.10:20:35.52#ibcon#enter sib2, iclass 22, count 0 2006.229.10:20:35.52#ibcon#flushed, iclass 22, count 0 2006.229.10:20:35.52#ibcon#about to write, iclass 22, count 0 2006.229.10:20:35.52#ibcon#wrote, iclass 22, count 0 2006.229.10:20:35.52#ibcon#about to read 3, iclass 22, count 0 2006.229.10:20:35.55#ibcon#read 3, iclass 22, count 0 2006.229.10:20:35.55#ibcon#about to read 4, iclass 22, count 0 2006.229.10:20:35.55#ibcon#read 4, iclass 22, count 0 2006.229.10:20:35.55#ibcon#about to read 5, iclass 22, count 0 2006.229.10:20:35.55#ibcon#read 5, iclass 22, count 0 2006.229.10:20:35.55#ibcon#about to read 6, iclass 22, count 0 2006.229.10:20:35.55#ibcon#read 6, iclass 22, count 0 2006.229.10:20:35.55#ibcon#end of sib2, iclass 22, count 0 2006.229.10:20:35.55#ibcon#*after write, iclass 22, count 0 2006.229.10:20:35.55#ibcon#*before return 0, iclass 22, count 0 2006.229.10:20:35.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:35.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:35.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:20:35.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:20:35.55$vck44/valo=5,734.99 2006.229.10:20:35.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.10:20:35.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.10:20:35.55#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:35.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:35.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:35.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:35.55#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:20:35.55#ibcon#first serial, iclass 24, count 0 2006.229.10:20:35.55#ibcon#enter sib2, iclass 24, count 0 2006.229.10:20:35.55#ibcon#flushed, iclass 24, count 0 2006.229.10:20:35.55#ibcon#about to write, iclass 24, count 0 2006.229.10:20:35.55#ibcon#wrote, iclass 24, count 0 2006.229.10:20:35.55#ibcon#about to read 3, iclass 24, count 0 2006.229.10:20:35.57#ibcon#read 3, iclass 24, count 0 2006.229.10:20:35.57#ibcon#about to read 4, iclass 24, count 0 2006.229.10:20:35.57#ibcon#read 4, iclass 24, count 0 2006.229.10:20:35.57#ibcon#about to read 5, iclass 24, count 0 2006.229.10:20:35.57#ibcon#read 5, iclass 24, count 0 2006.229.10:20:35.57#ibcon#about to read 6, iclass 24, count 0 2006.229.10:20:35.57#ibcon#read 6, iclass 24, count 0 2006.229.10:20:35.57#ibcon#end of sib2, iclass 24, count 0 2006.229.10:20:35.57#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:20:35.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:20:35.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:20:35.57#ibcon#*before write, iclass 24, count 0 2006.229.10:20:35.57#ibcon#enter sib2, iclass 24, count 0 2006.229.10:20:35.57#ibcon#flushed, iclass 24, count 0 2006.229.10:20:35.57#ibcon#about to write, iclass 24, count 0 2006.229.10:20:35.57#ibcon#wrote, iclass 24, count 0 2006.229.10:20:35.57#ibcon#about to read 3, iclass 24, count 0 2006.229.10:20:35.61#ibcon#read 3, iclass 24, count 0 2006.229.10:20:35.61#ibcon#about to read 4, iclass 24, count 0 2006.229.10:20:35.61#ibcon#read 4, iclass 24, count 0 2006.229.10:20:35.61#ibcon#about to read 5, iclass 24, count 0 2006.229.10:20:35.61#ibcon#read 5, iclass 24, count 0 2006.229.10:20:35.61#ibcon#about to read 6, iclass 24, count 0 2006.229.10:20:35.61#ibcon#read 6, iclass 24, count 0 2006.229.10:20:35.61#ibcon#end of sib2, iclass 24, count 0 2006.229.10:20:35.61#ibcon#*after write, iclass 24, count 0 2006.229.10:20:35.61#ibcon#*before return 0, iclass 24, count 0 2006.229.10:20:35.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:35.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:35.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:20:35.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:20:35.61$vck44/va=5,4 2006.229.10:20:35.61#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.10:20:35.61#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.10:20:35.61#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:35.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:35.67#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:35.67#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:35.67#ibcon#enter wrdev, iclass 26, count 2 2006.229.10:20:35.67#ibcon#first serial, iclass 26, count 2 2006.229.10:20:35.67#ibcon#enter sib2, iclass 26, count 2 2006.229.10:20:35.67#ibcon#flushed, iclass 26, count 2 2006.229.10:20:35.67#ibcon#about to write, iclass 26, count 2 2006.229.10:20:35.67#ibcon#wrote, iclass 26, count 2 2006.229.10:20:35.67#ibcon#about to read 3, iclass 26, count 2 2006.229.10:20:35.69#ibcon#read 3, iclass 26, count 2 2006.229.10:20:35.69#ibcon#about to read 4, iclass 26, count 2 2006.229.10:20:35.69#ibcon#read 4, iclass 26, count 2 2006.229.10:20:35.69#ibcon#about to read 5, iclass 26, count 2 2006.229.10:20:35.69#ibcon#read 5, iclass 26, count 2 2006.229.10:20:35.69#ibcon#about to read 6, iclass 26, count 2 2006.229.10:20:35.69#ibcon#read 6, iclass 26, count 2 2006.229.10:20:35.69#ibcon#end of sib2, iclass 26, count 2 2006.229.10:20:35.69#ibcon#*mode == 0, iclass 26, count 2 2006.229.10:20:35.69#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.10:20:35.69#ibcon#[25=AT05-04\r\n] 2006.229.10:20:35.69#ibcon#*before write, iclass 26, count 2 2006.229.10:20:35.69#ibcon#enter sib2, iclass 26, count 2 2006.229.10:20:35.69#ibcon#flushed, iclass 26, count 2 2006.229.10:20:35.69#ibcon#about to write, iclass 26, count 2 2006.229.10:20:35.69#ibcon#wrote, iclass 26, count 2 2006.229.10:20:35.69#ibcon#about to read 3, iclass 26, count 2 2006.229.10:20:35.72#ibcon#read 3, iclass 26, count 2 2006.229.10:20:35.72#ibcon#about to read 4, iclass 26, count 2 2006.229.10:20:35.72#ibcon#read 4, iclass 26, count 2 2006.229.10:20:35.72#ibcon#about to read 5, iclass 26, count 2 2006.229.10:20:35.72#ibcon#read 5, iclass 26, count 2 2006.229.10:20:35.72#ibcon#about to read 6, iclass 26, count 2 2006.229.10:20:35.72#ibcon#read 6, iclass 26, count 2 2006.229.10:20:35.72#ibcon#end of sib2, iclass 26, count 2 2006.229.10:20:35.72#ibcon#*after write, iclass 26, count 2 2006.229.10:20:35.72#ibcon#*before return 0, iclass 26, count 2 2006.229.10:20:35.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:35.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:35.72#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.10:20:35.72#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:35.72#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:35.84#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:35.84#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:35.84#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:20:35.84#ibcon#first serial, iclass 26, count 0 2006.229.10:20:35.84#ibcon#enter sib2, iclass 26, count 0 2006.229.10:20:35.84#ibcon#flushed, iclass 26, count 0 2006.229.10:20:35.84#ibcon#about to write, iclass 26, count 0 2006.229.10:20:35.84#ibcon#wrote, iclass 26, count 0 2006.229.10:20:35.84#ibcon#about to read 3, iclass 26, count 0 2006.229.10:20:35.86#ibcon#read 3, iclass 26, count 0 2006.229.10:20:35.86#ibcon#about to read 4, iclass 26, count 0 2006.229.10:20:35.86#ibcon#read 4, iclass 26, count 0 2006.229.10:20:35.86#ibcon#about to read 5, iclass 26, count 0 2006.229.10:20:35.86#ibcon#read 5, iclass 26, count 0 2006.229.10:20:35.86#ibcon#about to read 6, iclass 26, count 0 2006.229.10:20:35.86#ibcon#read 6, iclass 26, count 0 2006.229.10:20:35.86#ibcon#end of sib2, iclass 26, count 0 2006.229.10:20:35.86#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:20:35.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:20:35.86#ibcon#[25=USB\r\n] 2006.229.10:20:35.86#ibcon#*before write, iclass 26, count 0 2006.229.10:20:35.86#ibcon#enter sib2, iclass 26, count 0 2006.229.10:20:35.86#ibcon#flushed, iclass 26, count 0 2006.229.10:20:35.86#ibcon#about to write, iclass 26, count 0 2006.229.10:20:35.86#ibcon#wrote, iclass 26, count 0 2006.229.10:20:35.86#ibcon#about to read 3, iclass 26, count 0 2006.229.10:20:35.89#ibcon#read 3, iclass 26, count 0 2006.229.10:20:35.89#ibcon#about to read 4, iclass 26, count 0 2006.229.10:20:35.89#ibcon#read 4, iclass 26, count 0 2006.229.10:20:35.89#ibcon#about to read 5, iclass 26, count 0 2006.229.10:20:35.89#ibcon#read 5, iclass 26, count 0 2006.229.10:20:35.89#ibcon#about to read 6, iclass 26, count 0 2006.229.10:20:35.89#ibcon#read 6, iclass 26, count 0 2006.229.10:20:35.89#ibcon#end of sib2, iclass 26, count 0 2006.229.10:20:35.89#ibcon#*after write, iclass 26, count 0 2006.229.10:20:35.89#ibcon#*before return 0, iclass 26, count 0 2006.229.10:20:35.89#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:35.89#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:35.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:20:35.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:20:35.89$vck44/valo=6,814.99 2006.229.10:20:35.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.10:20:35.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.10:20:35.89#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:35.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:35.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:35.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:35.89#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:20:35.89#ibcon#first serial, iclass 28, count 0 2006.229.10:20:35.89#ibcon#enter sib2, iclass 28, count 0 2006.229.10:20:35.89#ibcon#flushed, iclass 28, count 0 2006.229.10:20:35.89#ibcon#about to write, iclass 28, count 0 2006.229.10:20:35.89#ibcon#wrote, iclass 28, count 0 2006.229.10:20:35.89#ibcon#about to read 3, iclass 28, count 0 2006.229.10:20:35.91#ibcon#read 3, iclass 28, count 0 2006.229.10:20:35.91#ibcon#about to read 4, iclass 28, count 0 2006.229.10:20:35.91#ibcon#read 4, iclass 28, count 0 2006.229.10:20:35.91#ibcon#about to read 5, iclass 28, count 0 2006.229.10:20:35.91#ibcon#read 5, iclass 28, count 0 2006.229.10:20:35.91#ibcon#about to read 6, iclass 28, count 0 2006.229.10:20:35.91#ibcon#read 6, iclass 28, count 0 2006.229.10:20:35.91#ibcon#end of sib2, iclass 28, count 0 2006.229.10:20:35.91#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:20:35.91#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:20:35.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:20:35.91#ibcon#*before write, iclass 28, count 0 2006.229.10:20:35.91#ibcon#enter sib2, iclass 28, count 0 2006.229.10:20:35.91#ibcon#flushed, iclass 28, count 0 2006.229.10:20:35.91#ibcon#about to write, iclass 28, count 0 2006.229.10:20:35.91#ibcon#wrote, iclass 28, count 0 2006.229.10:20:35.91#ibcon#about to read 3, iclass 28, count 0 2006.229.10:20:35.95#ibcon#read 3, iclass 28, count 0 2006.229.10:20:35.95#ibcon#about to read 4, iclass 28, count 0 2006.229.10:20:35.95#ibcon#read 4, iclass 28, count 0 2006.229.10:20:35.95#ibcon#about to read 5, iclass 28, count 0 2006.229.10:20:35.95#ibcon#read 5, iclass 28, count 0 2006.229.10:20:35.95#ibcon#about to read 6, iclass 28, count 0 2006.229.10:20:35.95#ibcon#read 6, iclass 28, count 0 2006.229.10:20:35.95#ibcon#end of sib2, iclass 28, count 0 2006.229.10:20:35.95#ibcon#*after write, iclass 28, count 0 2006.229.10:20:35.95#ibcon#*before return 0, iclass 28, count 0 2006.229.10:20:35.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:35.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:35.95#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:20:35.95#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:20:35.95$vck44/va=6,4 2006.229.10:20:35.95#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.10:20:35.95#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.10:20:35.95#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:35.95#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:36.01#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:36.01#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:36.01#ibcon#enter wrdev, iclass 30, count 2 2006.229.10:20:36.01#ibcon#first serial, iclass 30, count 2 2006.229.10:20:36.01#ibcon#enter sib2, iclass 30, count 2 2006.229.10:20:36.01#ibcon#flushed, iclass 30, count 2 2006.229.10:20:36.01#ibcon#about to write, iclass 30, count 2 2006.229.10:20:36.01#ibcon#wrote, iclass 30, count 2 2006.229.10:20:36.01#ibcon#about to read 3, iclass 30, count 2 2006.229.10:20:36.03#ibcon#read 3, iclass 30, count 2 2006.229.10:20:36.03#ibcon#about to read 4, iclass 30, count 2 2006.229.10:20:36.03#ibcon#read 4, iclass 30, count 2 2006.229.10:20:36.03#ibcon#about to read 5, iclass 30, count 2 2006.229.10:20:36.03#ibcon#read 5, iclass 30, count 2 2006.229.10:20:36.03#ibcon#about to read 6, iclass 30, count 2 2006.229.10:20:36.03#ibcon#read 6, iclass 30, count 2 2006.229.10:20:36.03#ibcon#end of sib2, iclass 30, count 2 2006.229.10:20:36.03#ibcon#*mode == 0, iclass 30, count 2 2006.229.10:20:36.03#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.10:20:36.03#ibcon#[25=AT06-04\r\n] 2006.229.10:20:36.03#ibcon#*before write, iclass 30, count 2 2006.229.10:20:36.03#ibcon#enter sib2, iclass 30, count 2 2006.229.10:20:36.03#ibcon#flushed, iclass 30, count 2 2006.229.10:20:36.03#ibcon#about to write, iclass 30, count 2 2006.229.10:20:36.03#ibcon#wrote, iclass 30, count 2 2006.229.10:20:36.03#ibcon#about to read 3, iclass 30, count 2 2006.229.10:20:36.06#ibcon#read 3, iclass 30, count 2 2006.229.10:20:36.06#ibcon#about to read 4, iclass 30, count 2 2006.229.10:20:36.06#ibcon#read 4, iclass 30, count 2 2006.229.10:20:36.06#ibcon#about to read 5, iclass 30, count 2 2006.229.10:20:36.06#ibcon#read 5, iclass 30, count 2 2006.229.10:20:36.06#ibcon#about to read 6, iclass 30, count 2 2006.229.10:20:36.06#ibcon#read 6, iclass 30, count 2 2006.229.10:20:36.06#ibcon#end of sib2, iclass 30, count 2 2006.229.10:20:36.06#ibcon#*after write, iclass 30, count 2 2006.229.10:20:36.06#ibcon#*before return 0, iclass 30, count 2 2006.229.10:20:36.06#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:36.06#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:36.06#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.10:20:36.06#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:36.06#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:36.18#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:36.18#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:36.18#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:20:36.18#ibcon#first serial, iclass 30, count 0 2006.229.10:20:36.18#ibcon#enter sib2, iclass 30, count 0 2006.229.10:20:36.18#ibcon#flushed, iclass 30, count 0 2006.229.10:20:36.18#ibcon#about to write, iclass 30, count 0 2006.229.10:20:36.18#ibcon#wrote, iclass 30, count 0 2006.229.10:20:36.18#ibcon#about to read 3, iclass 30, count 0 2006.229.10:20:36.20#ibcon#read 3, iclass 30, count 0 2006.229.10:20:36.20#ibcon#about to read 4, iclass 30, count 0 2006.229.10:20:36.20#ibcon#read 4, iclass 30, count 0 2006.229.10:20:36.20#ibcon#about to read 5, iclass 30, count 0 2006.229.10:20:36.20#ibcon#read 5, iclass 30, count 0 2006.229.10:20:36.20#ibcon#about to read 6, iclass 30, count 0 2006.229.10:20:36.20#ibcon#read 6, iclass 30, count 0 2006.229.10:20:36.20#ibcon#end of sib2, iclass 30, count 0 2006.229.10:20:36.20#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:20:36.20#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:20:36.20#ibcon#[25=USB\r\n] 2006.229.10:20:36.20#ibcon#*before write, iclass 30, count 0 2006.229.10:20:36.20#ibcon#enter sib2, iclass 30, count 0 2006.229.10:20:36.20#ibcon#flushed, iclass 30, count 0 2006.229.10:20:36.20#ibcon#about to write, iclass 30, count 0 2006.229.10:20:36.20#ibcon#wrote, iclass 30, count 0 2006.229.10:20:36.20#ibcon#about to read 3, iclass 30, count 0 2006.229.10:20:36.23#ibcon#read 3, iclass 30, count 0 2006.229.10:20:36.23#ibcon#about to read 4, iclass 30, count 0 2006.229.10:20:36.23#ibcon#read 4, iclass 30, count 0 2006.229.10:20:36.23#ibcon#about to read 5, iclass 30, count 0 2006.229.10:20:36.23#ibcon#read 5, iclass 30, count 0 2006.229.10:20:36.23#ibcon#about to read 6, iclass 30, count 0 2006.229.10:20:36.23#ibcon#read 6, iclass 30, count 0 2006.229.10:20:36.23#ibcon#end of sib2, iclass 30, count 0 2006.229.10:20:36.23#ibcon#*after write, iclass 30, count 0 2006.229.10:20:36.23#ibcon#*before return 0, iclass 30, count 0 2006.229.10:20:36.23#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:36.23#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:36.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:20:36.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:20:36.23$vck44/valo=7,864.99 2006.229.10:20:36.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.10:20:36.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.10:20:36.23#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:36.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:36.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:36.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:36.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:20:36.23#ibcon#first serial, iclass 32, count 0 2006.229.10:20:36.23#ibcon#enter sib2, iclass 32, count 0 2006.229.10:20:36.23#ibcon#flushed, iclass 32, count 0 2006.229.10:20:36.23#ibcon#about to write, iclass 32, count 0 2006.229.10:20:36.23#ibcon#wrote, iclass 32, count 0 2006.229.10:20:36.23#ibcon#about to read 3, iclass 32, count 0 2006.229.10:20:36.25#ibcon#read 3, iclass 32, count 0 2006.229.10:20:36.25#ibcon#about to read 4, iclass 32, count 0 2006.229.10:20:36.25#ibcon#read 4, iclass 32, count 0 2006.229.10:20:36.25#ibcon#about to read 5, iclass 32, count 0 2006.229.10:20:36.25#ibcon#read 5, iclass 32, count 0 2006.229.10:20:36.25#ibcon#about to read 6, iclass 32, count 0 2006.229.10:20:36.25#ibcon#read 6, iclass 32, count 0 2006.229.10:20:36.25#ibcon#end of sib2, iclass 32, count 0 2006.229.10:20:36.25#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:20:36.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:20:36.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:20:36.25#ibcon#*before write, iclass 32, count 0 2006.229.10:20:36.25#ibcon#enter sib2, iclass 32, count 0 2006.229.10:20:36.25#ibcon#flushed, iclass 32, count 0 2006.229.10:20:36.25#ibcon#about to write, iclass 32, count 0 2006.229.10:20:36.25#ibcon#wrote, iclass 32, count 0 2006.229.10:20:36.25#ibcon#about to read 3, iclass 32, count 0 2006.229.10:20:36.29#ibcon#read 3, iclass 32, count 0 2006.229.10:20:36.29#ibcon#about to read 4, iclass 32, count 0 2006.229.10:20:36.29#ibcon#read 4, iclass 32, count 0 2006.229.10:20:36.29#ibcon#about to read 5, iclass 32, count 0 2006.229.10:20:36.29#ibcon#read 5, iclass 32, count 0 2006.229.10:20:36.29#ibcon#about to read 6, iclass 32, count 0 2006.229.10:20:36.29#ibcon#read 6, iclass 32, count 0 2006.229.10:20:36.29#ibcon#end of sib2, iclass 32, count 0 2006.229.10:20:36.29#ibcon#*after write, iclass 32, count 0 2006.229.10:20:36.29#ibcon#*before return 0, iclass 32, count 0 2006.229.10:20:36.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:36.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:36.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:20:36.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:20:36.29$vck44/va=7,5 2006.229.10:20:36.29#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.10:20:36.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.10:20:36.29#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:36.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:36.35#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:36.35#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:36.35#ibcon#enter wrdev, iclass 34, count 2 2006.229.10:20:36.35#ibcon#first serial, iclass 34, count 2 2006.229.10:20:36.35#ibcon#enter sib2, iclass 34, count 2 2006.229.10:20:36.35#ibcon#flushed, iclass 34, count 2 2006.229.10:20:36.35#ibcon#about to write, iclass 34, count 2 2006.229.10:20:36.35#ibcon#wrote, iclass 34, count 2 2006.229.10:20:36.35#ibcon#about to read 3, iclass 34, count 2 2006.229.10:20:36.37#ibcon#read 3, iclass 34, count 2 2006.229.10:20:36.37#ibcon#about to read 4, iclass 34, count 2 2006.229.10:20:36.37#ibcon#read 4, iclass 34, count 2 2006.229.10:20:36.37#ibcon#about to read 5, iclass 34, count 2 2006.229.10:20:36.37#ibcon#read 5, iclass 34, count 2 2006.229.10:20:36.37#ibcon#about to read 6, iclass 34, count 2 2006.229.10:20:36.37#ibcon#read 6, iclass 34, count 2 2006.229.10:20:36.37#ibcon#end of sib2, iclass 34, count 2 2006.229.10:20:36.37#ibcon#*mode == 0, iclass 34, count 2 2006.229.10:20:36.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.10:20:36.37#ibcon#[25=AT07-05\r\n] 2006.229.10:20:36.37#ibcon#*before write, iclass 34, count 2 2006.229.10:20:36.37#ibcon#enter sib2, iclass 34, count 2 2006.229.10:20:36.37#ibcon#flushed, iclass 34, count 2 2006.229.10:20:36.37#ibcon#about to write, iclass 34, count 2 2006.229.10:20:36.37#ibcon#wrote, iclass 34, count 2 2006.229.10:20:36.37#ibcon#about to read 3, iclass 34, count 2 2006.229.10:20:36.40#ibcon#read 3, iclass 34, count 2 2006.229.10:20:36.40#ibcon#about to read 4, iclass 34, count 2 2006.229.10:20:36.40#ibcon#read 4, iclass 34, count 2 2006.229.10:20:36.40#ibcon#about to read 5, iclass 34, count 2 2006.229.10:20:36.40#ibcon#read 5, iclass 34, count 2 2006.229.10:20:36.40#ibcon#about to read 6, iclass 34, count 2 2006.229.10:20:36.40#ibcon#read 6, iclass 34, count 2 2006.229.10:20:36.40#ibcon#end of sib2, iclass 34, count 2 2006.229.10:20:36.40#ibcon#*after write, iclass 34, count 2 2006.229.10:20:36.40#ibcon#*before return 0, iclass 34, count 2 2006.229.10:20:36.40#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:36.40#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:36.40#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.10:20:36.40#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:36.40#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:36.52#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:36.52#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:36.52#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:20:36.52#ibcon#first serial, iclass 34, count 0 2006.229.10:20:36.52#ibcon#enter sib2, iclass 34, count 0 2006.229.10:20:36.52#ibcon#flushed, iclass 34, count 0 2006.229.10:20:36.52#ibcon#about to write, iclass 34, count 0 2006.229.10:20:36.52#ibcon#wrote, iclass 34, count 0 2006.229.10:20:36.52#ibcon#about to read 3, iclass 34, count 0 2006.229.10:20:36.54#ibcon#read 3, iclass 34, count 0 2006.229.10:20:36.54#ibcon#about to read 4, iclass 34, count 0 2006.229.10:20:36.54#ibcon#read 4, iclass 34, count 0 2006.229.10:20:36.54#ibcon#about to read 5, iclass 34, count 0 2006.229.10:20:36.54#ibcon#read 5, iclass 34, count 0 2006.229.10:20:36.54#ibcon#about to read 6, iclass 34, count 0 2006.229.10:20:36.54#ibcon#read 6, iclass 34, count 0 2006.229.10:20:36.54#ibcon#end of sib2, iclass 34, count 0 2006.229.10:20:36.54#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:20:36.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:20:36.54#ibcon#[25=USB\r\n] 2006.229.10:20:36.54#ibcon#*before write, iclass 34, count 0 2006.229.10:20:36.54#ibcon#enter sib2, iclass 34, count 0 2006.229.10:20:36.54#ibcon#flushed, iclass 34, count 0 2006.229.10:20:36.54#ibcon#about to write, iclass 34, count 0 2006.229.10:20:36.54#ibcon#wrote, iclass 34, count 0 2006.229.10:20:36.54#ibcon#about to read 3, iclass 34, count 0 2006.229.10:20:36.57#ibcon#read 3, iclass 34, count 0 2006.229.10:20:36.57#ibcon#about to read 4, iclass 34, count 0 2006.229.10:20:36.57#ibcon#read 4, iclass 34, count 0 2006.229.10:20:36.57#ibcon#about to read 5, iclass 34, count 0 2006.229.10:20:36.57#ibcon#read 5, iclass 34, count 0 2006.229.10:20:36.57#ibcon#about to read 6, iclass 34, count 0 2006.229.10:20:36.57#ibcon#read 6, iclass 34, count 0 2006.229.10:20:36.57#ibcon#end of sib2, iclass 34, count 0 2006.229.10:20:36.57#ibcon#*after write, iclass 34, count 0 2006.229.10:20:36.57#ibcon#*before return 0, iclass 34, count 0 2006.229.10:20:36.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:36.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:36.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:20:36.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:20:36.57$vck44/valo=8,884.99 2006.229.10:20:36.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:20:36.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:20:36.57#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:36.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:36.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:36.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:36.57#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:20:36.57#ibcon#first serial, iclass 36, count 0 2006.229.10:20:36.57#ibcon#enter sib2, iclass 36, count 0 2006.229.10:20:36.57#ibcon#flushed, iclass 36, count 0 2006.229.10:20:36.57#ibcon#about to write, iclass 36, count 0 2006.229.10:20:36.57#ibcon#wrote, iclass 36, count 0 2006.229.10:20:36.57#ibcon#about to read 3, iclass 36, count 0 2006.229.10:20:36.59#ibcon#read 3, iclass 36, count 0 2006.229.10:20:36.59#ibcon#about to read 4, iclass 36, count 0 2006.229.10:20:36.59#ibcon#read 4, iclass 36, count 0 2006.229.10:20:36.59#ibcon#about to read 5, iclass 36, count 0 2006.229.10:20:36.59#ibcon#read 5, iclass 36, count 0 2006.229.10:20:36.59#ibcon#about to read 6, iclass 36, count 0 2006.229.10:20:36.59#ibcon#read 6, iclass 36, count 0 2006.229.10:20:36.59#ibcon#end of sib2, iclass 36, count 0 2006.229.10:20:36.59#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:20:36.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:20:36.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:20:36.59#ibcon#*before write, iclass 36, count 0 2006.229.10:20:36.59#ibcon#enter sib2, iclass 36, count 0 2006.229.10:20:36.59#ibcon#flushed, iclass 36, count 0 2006.229.10:20:36.59#ibcon#about to write, iclass 36, count 0 2006.229.10:20:36.59#ibcon#wrote, iclass 36, count 0 2006.229.10:20:36.59#ibcon#about to read 3, iclass 36, count 0 2006.229.10:20:36.63#ibcon#read 3, iclass 36, count 0 2006.229.10:20:36.63#ibcon#about to read 4, iclass 36, count 0 2006.229.10:20:36.63#ibcon#read 4, iclass 36, count 0 2006.229.10:20:36.63#ibcon#about to read 5, iclass 36, count 0 2006.229.10:20:36.63#ibcon#read 5, iclass 36, count 0 2006.229.10:20:36.63#ibcon#about to read 6, iclass 36, count 0 2006.229.10:20:36.63#ibcon#read 6, iclass 36, count 0 2006.229.10:20:36.63#ibcon#end of sib2, iclass 36, count 0 2006.229.10:20:36.63#ibcon#*after write, iclass 36, count 0 2006.229.10:20:36.63#ibcon#*before return 0, iclass 36, count 0 2006.229.10:20:36.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:36.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:36.63#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:20:36.63#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:20:36.63$vck44/va=8,6 2006.229.10:20:36.63#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.10:20:36.63#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.10:20:36.63#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:36.63#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:20:36.69#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:20:36.69#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:20:36.69#ibcon#enter wrdev, iclass 38, count 2 2006.229.10:20:36.69#ibcon#first serial, iclass 38, count 2 2006.229.10:20:36.69#ibcon#enter sib2, iclass 38, count 2 2006.229.10:20:36.69#ibcon#flushed, iclass 38, count 2 2006.229.10:20:36.69#ibcon#about to write, iclass 38, count 2 2006.229.10:20:36.69#ibcon#wrote, iclass 38, count 2 2006.229.10:20:36.69#ibcon#about to read 3, iclass 38, count 2 2006.229.10:20:36.71#ibcon#read 3, iclass 38, count 2 2006.229.10:20:36.71#ibcon#about to read 4, iclass 38, count 2 2006.229.10:20:36.71#ibcon#read 4, iclass 38, count 2 2006.229.10:20:36.71#ibcon#about to read 5, iclass 38, count 2 2006.229.10:20:36.71#ibcon#read 5, iclass 38, count 2 2006.229.10:20:36.71#ibcon#about to read 6, iclass 38, count 2 2006.229.10:20:36.71#ibcon#read 6, iclass 38, count 2 2006.229.10:20:36.71#ibcon#end of sib2, iclass 38, count 2 2006.229.10:20:36.71#ibcon#*mode == 0, iclass 38, count 2 2006.229.10:20:36.71#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.10:20:36.71#ibcon#[25=AT08-06\r\n] 2006.229.10:20:36.71#ibcon#*before write, iclass 38, count 2 2006.229.10:20:36.71#ibcon#enter sib2, iclass 38, count 2 2006.229.10:20:36.71#ibcon#flushed, iclass 38, count 2 2006.229.10:20:36.71#ibcon#about to write, iclass 38, count 2 2006.229.10:20:36.71#ibcon#wrote, iclass 38, count 2 2006.229.10:20:36.71#ibcon#about to read 3, iclass 38, count 2 2006.229.10:20:36.74#ibcon#read 3, iclass 38, count 2 2006.229.10:20:36.74#ibcon#about to read 4, iclass 38, count 2 2006.229.10:20:36.74#ibcon#read 4, iclass 38, count 2 2006.229.10:20:36.74#ibcon#about to read 5, iclass 38, count 2 2006.229.10:20:36.74#ibcon#read 5, iclass 38, count 2 2006.229.10:20:36.74#ibcon#about to read 6, iclass 38, count 2 2006.229.10:20:36.74#ibcon#read 6, iclass 38, count 2 2006.229.10:20:36.74#ibcon#end of sib2, iclass 38, count 2 2006.229.10:20:36.74#ibcon#*after write, iclass 38, count 2 2006.229.10:20:36.74#ibcon#*before return 0, iclass 38, count 2 2006.229.10:20:36.74#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:20:36.74#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:20:36.74#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.10:20:36.74#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:36.74#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:20:36.86#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:20:36.86#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:20:36.86#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:20:36.86#ibcon#first serial, iclass 38, count 0 2006.229.10:20:36.86#ibcon#enter sib2, iclass 38, count 0 2006.229.10:20:36.86#ibcon#flushed, iclass 38, count 0 2006.229.10:20:36.86#ibcon#about to write, iclass 38, count 0 2006.229.10:20:36.86#ibcon#wrote, iclass 38, count 0 2006.229.10:20:36.86#ibcon#about to read 3, iclass 38, count 0 2006.229.10:20:36.88#ibcon#read 3, iclass 38, count 0 2006.229.10:20:36.88#ibcon#about to read 4, iclass 38, count 0 2006.229.10:20:36.88#ibcon#read 4, iclass 38, count 0 2006.229.10:20:36.88#ibcon#about to read 5, iclass 38, count 0 2006.229.10:20:36.88#ibcon#read 5, iclass 38, count 0 2006.229.10:20:36.88#ibcon#about to read 6, iclass 38, count 0 2006.229.10:20:36.88#ibcon#read 6, iclass 38, count 0 2006.229.10:20:36.88#ibcon#end of sib2, iclass 38, count 0 2006.229.10:20:36.88#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:20:36.88#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:20:36.88#ibcon#[25=USB\r\n] 2006.229.10:20:36.88#ibcon#*before write, iclass 38, count 0 2006.229.10:20:36.88#ibcon#enter sib2, iclass 38, count 0 2006.229.10:20:36.88#ibcon#flushed, iclass 38, count 0 2006.229.10:20:36.88#ibcon#about to write, iclass 38, count 0 2006.229.10:20:36.88#ibcon#wrote, iclass 38, count 0 2006.229.10:20:36.88#ibcon#about to read 3, iclass 38, count 0 2006.229.10:20:36.91#ibcon#read 3, iclass 38, count 0 2006.229.10:20:36.91#ibcon#about to read 4, iclass 38, count 0 2006.229.10:20:36.91#ibcon#read 4, iclass 38, count 0 2006.229.10:20:36.91#ibcon#about to read 5, iclass 38, count 0 2006.229.10:20:36.91#ibcon#read 5, iclass 38, count 0 2006.229.10:20:36.91#ibcon#about to read 6, iclass 38, count 0 2006.229.10:20:36.91#ibcon#read 6, iclass 38, count 0 2006.229.10:20:36.91#ibcon#end of sib2, iclass 38, count 0 2006.229.10:20:36.91#ibcon#*after write, iclass 38, count 0 2006.229.10:20:36.91#ibcon#*before return 0, iclass 38, count 0 2006.229.10:20:36.91#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:20:36.91#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:20:36.91#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:20:36.91#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:20:36.91$vck44/vblo=1,629.99 2006.229.10:20:36.91#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.10:20:36.91#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.10:20:36.91#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:36.91#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:20:36.91#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:20:36.91#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:20:36.91#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:20:36.91#ibcon#first serial, iclass 40, count 0 2006.229.10:20:36.91#ibcon#enter sib2, iclass 40, count 0 2006.229.10:20:36.91#ibcon#flushed, iclass 40, count 0 2006.229.10:20:36.91#ibcon#about to write, iclass 40, count 0 2006.229.10:20:36.91#ibcon#wrote, iclass 40, count 0 2006.229.10:20:36.91#ibcon#about to read 3, iclass 40, count 0 2006.229.10:20:36.93#ibcon#read 3, iclass 40, count 0 2006.229.10:20:36.93#ibcon#about to read 4, iclass 40, count 0 2006.229.10:20:36.93#ibcon#read 4, iclass 40, count 0 2006.229.10:20:36.93#ibcon#about to read 5, iclass 40, count 0 2006.229.10:20:36.93#ibcon#read 5, iclass 40, count 0 2006.229.10:20:36.93#ibcon#about to read 6, iclass 40, count 0 2006.229.10:20:36.93#ibcon#read 6, iclass 40, count 0 2006.229.10:20:36.93#ibcon#end of sib2, iclass 40, count 0 2006.229.10:20:36.93#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:20:36.93#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:20:36.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:20:36.93#ibcon#*before write, iclass 40, count 0 2006.229.10:20:36.93#ibcon#enter sib2, iclass 40, count 0 2006.229.10:20:36.93#ibcon#flushed, iclass 40, count 0 2006.229.10:20:36.93#ibcon#about to write, iclass 40, count 0 2006.229.10:20:36.93#ibcon#wrote, iclass 40, count 0 2006.229.10:20:36.93#ibcon#about to read 3, iclass 40, count 0 2006.229.10:20:36.97#ibcon#read 3, iclass 40, count 0 2006.229.10:20:36.97#ibcon#about to read 4, iclass 40, count 0 2006.229.10:20:36.97#ibcon#read 4, iclass 40, count 0 2006.229.10:20:36.97#ibcon#about to read 5, iclass 40, count 0 2006.229.10:20:36.97#ibcon#read 5, iclass 40, count 0 2006.229.10:20:36.97#ibcon#about to read 6, iclass 40, count 0 2006.229.10:20:36.97#ibcon#read 6, iclass 40, count 0 2006.229.10:20:36.97#ibcon#end of sib2, iclass 40, count 0 2006.229.10:20:36.97#ibcon#*after write, iclass 40, count 0 2006.229.10:20:36.97#ibcon#*before return 0, iclass 40, count 0 2006.229.10:20:36.97#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:20:36.97#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:20:36.97#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:20:36.97#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:20:36.97$vck44/vb=1,4 2006.229.10:20:36.97#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.10:20:36.97#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.10:20:36.97#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:36.97#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:20:36.97#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:20:36.97#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:20:36.97#ibcon#enter wrdev, iclass 4, count 2 2006.229.10:20:36.97#ibcon#first serial, iclass 4, count 2 2006.229.10:20:36.97#ibcon#enter sib2, iclass 4, count 2 2006.229.10:20:36.97#ibcon#flushed, iclass 4, count 2 2006.229.10:20:36.97#ibcon#about to write, iclass 4, count 2 2006.229.10:20:36.97#ibcon#wrote, iclass 4, count 2 2006.229.10:20:36.97#ibcon#about to read 3, iclass 4, count 2 2006.229.10:20:36.99#ibcon#read 3, iclass 4, count 2 2006.229.10:20:36.99#ibcon#about to read 4, iclass 4, count 2 2006.229.10:20:36.99#ibcon#read 4, iclass 4, count 2 2006.229.10:20:36.99#ibcon#about to read 5, iclass 4, count 2 2006.229.10:20:36.99#ibcon#read 5, iclass 4, count 2 2006.229.10:20:36.99#ibcon#about to read 6, iclass 4, count 2 2006.229.10:20:36.99#ibcon#read 6, iclass 4, count 2 2006.229.10:20:36.99#ibcon#end of sib2, iclass 4, count 2 2006.229.10:20:36.99#ibcon#*mode == 0, iclass 4, count 2 2006.229.10:20:36.99#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.10:20:36.99#ibcon#[27=AT01-04\r\n] 2006.229.10:20:36.99#ibcon#*before write, iclass 4, count 2 2006.229.10:20:36.99#ibcon#enter sib2, iclass 4, count 2 2006.229.10:20:36.99#ibcon#flushed, iclass 4, count 2 2006.229.10:20:36.99#ibcon#about to write, iclass 4, count 2 2006.229.10:20:36.99#ibcon#wrote, iclass 4, count 2 2006.229.10:20:36.99#ibcon#about to read 3, iclass 4, count 2 2006.229.10:20:37.02#ibcon#read 3, iclass 4, count 2 2006.229.10:20:37.02#ibcon#about to read 4, iclass 4, count 2 2006.229.10:20:37.02#ibcon#read 4, iclass 4, count 2 2006.229.10:20:37.02#ibcon#about to read 5, iclass 4, count 2 2006.229.10:20:37.02#ibcon#read 5, iclass 4, count 2 2006.229.10:20:37.02#ibcon#about to read 6, iclass 4, count 2 2006.229.10:20:37.02#ibcon#read 6, iclass 4, count 2 2006.229.10:20:37.02#ibcon#end of sib2, iclass 4, count 2 2006.229.10:20:37.02#ibcon#*after write, iclass 4, count 2 2006.229.10:20:37.02#ibcon#*before return 0, iclass 4, count 2 2006.229.10:20:37.02#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:20:37.02#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:20:37.02#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.10:20:37.02#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:37.02#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:20:37.14#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:20:37.14#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:20:37.14#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:20:37.14#ibcon#first serial, iclass 4, count 0 2006.229.10:20:37.14#ibcon#enter sib2, iclass 4, count 0 2006.229.10:20:37.14#ibcon#flushed, iclass 4, count 0 2006.229.10:20:37.14#ibcon#about to write, iclass 4, count 0 2006.229.10:20:37.14#ibcon#wrote, iclass 4, count 0 2006.229.10:20:37.14#ibcon#about to read 3, iclass 4, count 0 2006.229.10:20:37.16#ibcon#read 3, iclass 4, count 0 2006.229.10:20:37.16#ibcon#about to read 4, iclass 4, count 0 2006.229.10:20:37.16#ibcon#read 4, iclass 4, count 0 2006.229.10:20:37.16#ibcon#about to read 5, iclass 4, count 0 2006.229.10:20:37.16#ibcon#read 5, iclass 4, count 0 2006.229.10:20:37.16#ibcon#about to read 6, iclass 4, count 0 2006.229.10:20:37.16#ibcon#read 6, iclass 4, count 0 2006.229.10:20:37.16#ibcon#end of sib2, iclass 4, count 0 2006.229.10:20:37.16#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:20:37.16#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:20:37.16#ibcon#[27=USB\r\n] 2006.229.10:20:37.16#ibcon#*before write, iclass 4, count 0 2006.229.10:20:37.16#ibcon#enter sib2, iclass 4, count 0 2006.229.10:20:37.16#ibcon#flushed, iclass 4, count 0 2006.229.10:20:37.16#ibcon#about to write, iclass 4, count 0 2006.229.10:20:37.16#ibcon#wrote, iclass 4, count 0 2006.229.10:20:37.16#ibcon#about to read 3, iclass 4, count 0 2006.229.10:20:37.19#ibcon#read 3, iclass 4, count 0 2006.229.10:20:37.19#ibcon#about to read 4, iclass 4, count 0 2006.229.10:20:37.19#ibcon#read 4, iclass 4, count 0 2006.229.10:20:37.19#ibcon#about to read 5, iclass 4, count 0 2006.229.10:20:37.19#ibcon#read 5, iclass 4, count 0 2006.229.10:20:37.19#ibcon#about to read 6, iclass 4, count 0 2006.229.10:20:37.19#ibcon#read 6, iclass 4, count 0 2006.229.10:20:37.19#ibcon#end of sib2, iclass 4, count 0 2006.229.10:20:37.19#ibcon#*after write, iclass 4, count 0 2006.229.10:20:37.19#ibcon#*before return 0, iclass 4, count 0 2006.229.10:20:37.19#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:20:37.19#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:20:37.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:20:37.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:20:37.19$vck44/vblo=2,634.99 2006.229.10:20:37.19#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.10:20:37.19#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.10:20:37.19#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:37.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:37.19#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:37.19#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:37.19#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:20:37.19#ibcon#first serial, iclass 6, count 0 2006.229.10:20:37.19#ibcon#enter sib2, iclass 6, count 0 2006.229.10:20:37.19#ibcon#flushed, iclass 6, count 0 2006.229.10:20:37.19#ibcon#about to write, iclass 6, count 0 2006.229.10:20:37.19#ibcon#wrote, iclass 6, count 0 2006.229.10:20:37.19#ibcon#about to read 3, iclass 6, count 0 2006.229.10:20:37.21#ibcon#read 3, iclass 6, count 0 2006.229.10:20:37.21#ibcon#about to read 4, iclass 6, count 0 2006.229.10:20:37.21#ibcon#read 4, iclass 6, count 0 2006.229.10:20:37.21#ibcon#about to read 5, iclass 6, count 0 2006.229.10:20:37.21#ibcon#read 5, iclass 6, count 0 2006.229.10:20:37.21#ibcon#about to read 6, iclass 6, count 0 2006.229.10:20:37.21#ibcon#read 6, iclass 6, count 0 2006.229.10:20:37.21#ibcon#end of sib2, iclass 6, count 0 2006.229.10:20:37.21#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:20:37.21#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:20:37.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:20:37.21#ibcon#*before write, iclass 6, count 0 2006.229.10:20:37.21#ibcon#enter sib2, iclass 6, count 0 2006.229.10:20:37.21#ibcon#flushed, iclass 6, count 0 2006.229.10:20:37.21#ibcon#about to write, iclass 6, count 0 2006.229.10:20:37.21#ibcon#wrote, iclass 6, count 0 2006.229.10:20:37.21#ibcon#about to read 3, iclass 6, count 0 2006.229.10:20:37.25#ibcon#read 3, iclass 6, count 0 2006.229.10:20:37.25#ibcon#about to read 4, iclass 6, count 0 2006.229.10:20:37.25#ibcon#read 4, iclass 6, count 0 2006.229.10:20:37.25#ibcon#about to read 5, iclass 6, count 0 2006.229.10:20:37.25#ibcon#read 5, iclass 6, count 0 2006.229.10:20:37.25#ibcon#about to read 6, iclass 6, count 0 2006.229.10:20:37.25#ibcon#read 6, iclass 6, count 0 2006.229.10:20:37.25#ibcon#end of sib2, iclass 6, count 0 2006.229.10:20:37.25#ibcon#*after write, iclass 6, count 0 2006.229.10:20:37.25#ibcon#*before return 0, iclass 6, count 0 2006.229.10:20:37.25#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:37.25#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:20:37.25#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:20:37.25#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:20:37.25$vck44/vb=2,4 2006.229.10:20:37.25#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.10:20:37.25#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.10:20:37.25#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:37.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:37.31#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:37.31#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:37.31#ibcon#enter wrdev, iclass 10, count 2 2006.229.10:20:37.31#ibcon#first serial, iclass 10, count 2 2006.229.10:20:37.31#ibcon#enter sib2, iclass 10, count 2 2006.229.10:20:37.31#ibcon#flushed, iclass 10, count 2 2006.229.10:20:37.31#ibcon#about to write, iclass 10, count 2 2006.229.10:20:37.31#ibcon#wrote, iclass 10, count 2 2006.229.10:20:37.31#ibcon#about to read 3, iclass 10, count 2 2006.229.10:20:37.33#ibcon#read 3, iclass 10, count 2 2006.229.10:20:37.33#ibcon#about to read 4, iclass 10, count 2 2006.229.10:20:37.33#ibcon#read 4, iclass 10, count 2 2006.229.10:20:37.33#ibcon#about to read 5, iclass 10, count 2 2006.229.10:20:37.33#ibcon#read 5, iclass 10, count 2 2006.229.10:20:37.33#ibcon#about to read 6, iclass 10, count 2 2006.229.10:20:37.33#ibcon#read 6, iclass 10, count 2 2006.229.10:20:37.33#ibcon#end of sib2, iclass 10, count 2 2006.229.10:20:37.33#ibcon#*mode == 0, iclass 10, count 2 2006.229.10:20:37.33#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.10:20:37.33#ibcon#[27=AT02-04\r\n] 2006.229.10:20:37.33#ibcon#*before write, iclass 10, count 2 2006.229.10:20:37.33#ibcon#enter sib2, iclass 10, count 2 2006.229.10:20:37.33#ibcon#flushed, iclass 10, count 2 2006.229.10:20:37.33#ibcon#about to write, iclass 10, count 2 2006.229.10:20:37.33#ibcon#wrote, iclass 10, count 2 2006.229.10:20:37.33#ibcon#about to read 3, iclass 10, count 2 2006.229.10:20:37.36#ibcon#read 3, iclass 10, count 2 2006.229.10:20:37.36#ibcon#about to read 4, iclass 10, count 2 2006.229.10:20:37.36#ibcon#read 4, iclass 10, count 2 2006.229.10:20:37.36#ibcon#about to read 5, iclass 10, count 2 2006.229.10:20:37.36#ibcon#read 5, iclass 10, count 2 2006.229.10:20:37.36#ibcon#about to read 6, iclass 10, count 2 2006.229.10:20:37.36#ibcon#read 6, iclass 10, count 2 2006.229.10:20:37.36#ibcon#end of sib2, iclass 10, count 2 2006.229.10:20:37.36#ibcon#*after write, iclass 10, count 2 2006.229.10:20:37.36#ibcon#*before return 0, iclass 10, count 2 2006.229.10:20:37.36#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:37.36#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:20:37.36#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.10:20:37.36#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:37.36#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:37.48#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:37.48#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:37.48#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:20:37.48#ibcon#first serial, iclass 10, count 0 2006.229.10:20:37.48#ibcon#enter sib2, iclass 10, count 0 2006.229.10:20:37.48#ibcon#flushed, iclass 10, count 0 2006.229.10:20:37.48#ibcon#about to write, iclass 10, count 0 2006.229.10:20:37.48#ibcon#wrote, iclass 10, count 0 2006.229.10:20:37.48#ibcon#about to read 3, iclass 10, count 0 2006.229.10:20:37.50#ibcon#read 3, iclass 10, count 0 2006.229.10:20:37.50#ibcon#about to read 4, iclass 10, count 0 2006.229.10:20:37.50#ibcon#read 4, iclass 10, count 0 2006.229.10:20:37.50#ibcon#about to read 5, iclass 10, count 0 2006.229.10:20:37.50#ibcon#read 5, iclass 10, count 0 2006.229.10:20:37.50#ibcon#about to read 6, iclass 10, count 0 2006.229.10:20:37.50#ibcon#read 6, iclass 10, count 0 2006.229.10:20:37.50#ibcon#end of sib2, iclass 10, count 0 2006.229.10:20:37.50#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:20:37.50#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:20:37.50#ibcon#[27=USB\r\n] 2006.229.10:20:37.50#ibcon#*before write, iclass 10, count 0 2006.229.10:20:37.50#ibcon#enter sib2, iclass 10, count 0 2006.229.10:20:37.50#ibcon#flushed, iclass 10, count 0 2006.229.10:20:37.50#ibcon#about to write, iclass 10, count 0 2006.229.10:20:37.50#ibcon#wrote, iclass 10, count 0 2006.229.10:20:37.50#ibcon#about to read 3, iclass 10, count 0 2006.229.10:20:37.53#ibcon#read 3, iclass 10, count 0 2006.229.10:20:37.53#ibcon#about to read 4, iclass 10, count 0 2006.229.10:20:37.53#ibcon#read 4, iclass 10, count 0 2006.229.10:20:37.53#ibcon#about to read 5, iclass 10, count 0 2006.229.10:20:37.53#ibcon#read 5, iclass 10, count 0 2006.229.10:20:37.53#ibcon#about to read 6, iclass 10, count 0 2006.229.10:20:37.53#ibcon#read 6, iclass 10, count 0 2006.229.10:20:37.53#ibcon#end of sib2, iclass 10, count 0 2006.229.10:20:37.53#ibcon#*after write, iclass 10, count 0 2006.229.10:20:37.53#ibcon#*before return 0, iclass 10, count 0 2006.229.10:20:37.53#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:37.53#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:20:37.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:20:37.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:20:37.53$vck44/vblo=3,649.99 2006.229.10:20:37.53#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.10:20:37.53#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.10:20:37.53#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:37.53#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:37.53#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:37.53#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:37.53#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:20:37.53#ibcon#first serial, iclass 12, count 0 2006.229.10:20:37.53#ibcon#enter sib2, iclass 12, count 0 2006.229.10:20:37.53#ibcon#flushed, iclass 12, count 0 2006.229.10:20:37.53#ibcon#about to write, iclass 12, count 0 2006.229.10:20:37.53#ibcon#wrote, iclass 12, count 0 2006.229.10:20:37.53#ibcon#about to read 3, iclass 12, count 0 2006.229.10:20:37.55#ibcon#read 3, iclass 12, count 0 2006.229.10:20:37.55#ibcon#about to read 4, iclass 12, count 0 2006.229.10:20:37.55#ibcon#read 4, iclass 12, count 0 2006.229.10:20:37.55#ibcon#about to read 5, iclass 12, count 0 2006.229.10:20:37.55#ibcon#read 5, iclass 12, count 0 2006.229.10:20:37.55#ibcon#about to read 6, iclass 12, count 0 2006.229.10:20:37.55#ibcon#read 6, iclass 12, count 0 2006.229.10:20:37.55#ibcon#end of sib2, iclass 12, count 0 2006.229.10:20:37.55#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:20:37.55#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:20:37.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:20:37.55#ibcon#*before write, iclass 12, count 0 2006.229.10:20:37.55#ibcon#enter sib2, iclass 12, count 0 2006.229.10:20:37.55#ibcon#flushed, iclass 12, count 0 2006.229.10:20:37.55#ibcon#about to write, iclass 12, count 0 2006.229.10:20:37.55#ibcon#wrote, iclass 12, count 0 2006.229.10:20:37.55#ibcon#about to read 3, iclass 12, count 0 2006.229.10:20:37.59#ibcon#read 3, iclass 12, count 0 2006.229.10:20:37.59#ibcon#about to read 4, iclass 12, count 0 2006.229.10:20:37.59#ibcon#read 4, iclass 12, count 0 2006.229.10:20:37.59#ibcon#about to read 5, iclass 12, count 0 2006.229.10:20:37.59#ibcon#read 5, iclass 12, count 0 2006.229.10:20:37.59#ibcon#about to read 6, iclass 12, count 0 2006.229.10:20:37.59#ibcon#read 6, iclass 12, count 0 2006.229.10:20:37.59#ibcon#end of sib2, iclass 12, count 0 2006.229.10:20:37.59#ibcon#*after write, iclass 12, count 0 2006.229.10:20:37.59#ibcon#*before return 0, iclass 12, count 0 2006.229.10:20:37.59#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:37.59#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:20:37.59#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:20:37.59#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:20:37.59$vck44/vb=3,4 2006.229.10:20:37.59#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.10:20:37.59#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.10:20:37.59#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:37.59#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:37.65#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:37.65#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:37.65#ibcon#enter wrdev, iclass 14, count 2 2006.229.10:20:37.65#ibcon#first serial, iclass 14, count 2 2006.229.10:20:37.65#ibcon#enter sib2, iclass 14, count 2 2006.229.10:20:37.65#ibcon#flushed, iclass 14, count 2 2006.229.10:20:37.65#ibcon#about to write, iclass 14, count 2 2006.229.10:20:37.65#ibcon#wrote, iclass 14, count 2 2006.229.10:20:37.65#ibcon#about to read 3, iclass 14, count 2 2006.229.10:20:37.67#ibcon#read 3, iclass 14, count 2 2006.229.10:20:37.67#ibcon#about to read 4, iclass 14, count 2 2006.229.10:20:37.67#ibcon#read 4, iclass 14, count 2 2006.229.10:20:37.67#ibcon#about to read 5, iclass 14, count 2 2006.229.10:20:37.67#ibcon#read 5, iclass 14, count 2 2006.229.10:20:37.67#ibcon#about to read 6, iclass 14, count 2 2006.229.10:20:37.67#ibcon#read 6, iclass 14, count 2 2006.229.10:20:37.67#ibcon#end of sib2, iclass 14, count 2 2006.229.10:20:37.67#ibcon#*mode == 0, iclass 14, count 2 2006.229.10:20:37.67#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.10:20:37.67#ibcon#[27=AT03-04\r\n] 2006.229.10:20:37.67#ibcon#*before write, iclass 14, count 2 2006.229.10:20:37.67#ibcon#enter sib2, iclass 14, count 2 2006.229.10:20:37.67#ibcon#flushed, iclass 14, count 2 2006.229.10:20:37.67#ibcon#about to write, iclass 14, count 2 2006.229.10:20:37.67#ibcon#wrote, iclass 14, count 2 2006.229.10:20:37.67#ibcon#about to read 3, iclass 14, count 2 2006.229.10:20:37.70#ibcon#read 3, iclass 14, count 2 2006.229.10:20:37.70#ibcon#about to read 4, iclass 14, count 2 2006.229.10:20:37.70#ibcon#read 4, iclass 14, count 2 2006.229.10:20:37.70#ibcon#about to read 5, iclass 14, count 2 2006.229.10:20:37.70#ibcon#read 5, iclass 14, count 2 2006.229.10:20:37.70#ibcon#about to read 6, iclass 14, count 2 2006.229.10:20:37.70#ibcon#read 6, iclass 14, count 2 2006.229.10:20:37.70#ibcon#end of sib2, iclass 14, count 2 2006.229.10:20:37.70#ibcon#*after write, iclass 14, count 2 2006.229.10:20:37.70#ibcon#*before return 0, iclass 14, count 2 2006.229.10:20:37.70#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:37.70#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:20:37.70#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.10:20:37.70#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:37.70#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:37.82#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:37.82#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:37.82#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:20:37.82#ibcon#first serial, iclass 14, count 0 2006.229.10:20:37.82#ibcon#enter sib2, iclass 14, count 0 2006.229.10:20:37.82#ibcon#flushed, iclass 14, count 0 2006.229.10:20:37.82#ibcon#about to write, iclass 14, count 0 2006.229.10:20:37.82#ibcon#wrote, iclass 14, count 0 2006.229.10:20:37.82#ibcon#about to read 3, iclass 14, count 0 2006.229.10:20:37.84#ibcon#read 3, iclass 14, count 0 2006.229.10:20:37.84#ibcon#about to read 4, iclass 14, count 0 2006.229.10:20:37.84#ibcon#read 4, iclass 14, count 0 2006.229.10:20:37.84#ibcon#about to read 5, iclass 14, count 0 2006.229.10:20:37.84#ibcon#read 5, iclass 14, count 0 2006.229.10:20:37.84#ibcon#about to read 6, iclass 14, count 0 2006.229.10:20:37.84#ibcon#read 6, iclass 14, count 0 2006.229.10:20:37.84#ibcon#end of sib2, iclass 14, count 0 2006.229.10:20:37.84#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:20:37.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:20:37.84#ibcon#[27=USB\r\n] 2006.229.10:20:37.84#ibcon#*before write, iclass 14, count 0 2006.229.10:20:37.84#ibcon#enter sib2, iclass 14, count 0 2006.229.10:20:37.84#ibcon#flushed, iclass 14, count 0 2006.229.10:20:37.84#ibcon#about to write, iclass 14, count 0 2006.229.10:20:37.84#ibcon#wrote, iclass 14, count 0 2006.229.10:20:37.84#ibcon#about to read 3, iclass 14, count 0 2006.229.10:20:37.87#ibcon#read 3, iclass 14, count 0 2006.229.10:20:37.87#ibcon#about to read 4, iclass 14, count 0 2006.229.10:20:37.87#ibcon#read 4, iclass 14, count 0 2006.229.10:20:37.87#ibcon#about to read 5, iclass 14, count 0 2006.229.10:20:37.87#ibcon#read 5, iclass 14, count 0 2006.229.10:20:37.87#ibcon#about to read 6, iclass 14, count 0 2006.229.10:20:37.87#ibcon#read 6, iclass 14, count 0 2006.229.10:20:37.87#ibcon#end of sib2, iclass 14, count 0 2006.229.10:20:37.87#ibcon#*after write, iclass 14, count 0 2006.229.10:20:37.87#ibcon#*before return 0, iclass 14, count 0 2006.229.10:20:37.87#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:37.87#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:20:37.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:20:37.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:20:37.87$vck44/vblo=4,679.99 2006.229.10:20:37.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.10:20:37.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.10:20:37.87#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:37.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:37.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:37.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:37.87#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:20:37.87#ibcon#first serial, iclass 16, count 0 2006.229.10:20:37.87#ibcon#enter sib2, iclass 16, count 0 2006.229.10:20:37.87#ibcon#flushed, iclass 16, count 0 2006.229.10:20:37.87#ibcon#about to write, iclass 16, count 0 2006.229.10:20:37.87#ibcon#wrote, iclass 16, count 0 2006.229.10:20:37.87#ibcon#about to read 3, iclass 16, count 0 2006.229.10:20:37.89#ibcon#read 3, iclass 16, count 0 2006.229.10:20:37.89#ibcon#about to read 4, iclass 16, count 0 2006.229.10:20:37.89#ibcon#read 4, iclass 16, count 0 2006.229.10:20:37.89#ibcon#about to read 5, iclass 16, count 0 2006.229.10:20:37.89#ibcon#read 5, iclass 16, count 0 2006.229.10:20:37.89#ibcon#about to read 6, iclass 16, count 0 2006.229.10:20:37.89#ibcon#read 6, iclass 16, count 0 2006.229.10:20:37.89#ibcon#end of sib2, iclass 16, count 0 2006.229.10:20:37.89#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:20:37.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:20:37.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:20:37.89#ibcon#*before write, iclass 16, count 0 2006.229.10:20:37.89#ibcon#enter sib2, iclass 16, count 0 2006.229.10:20:37.89#ibcon#flushed, iclass 16, count 0 2006.229.10:20:37.89#ibcon#about to write, iclass 16, count 0 2006.229.10:20:37.89#ibcon#wrote, iclass 16, count 0 2006.229.10:20:37.89#ibcon#about to read 3, iclass 16, count 0 2006.229.10:20:37.93#ibcon#read 3, iclass 16, count 0 2006.229.10:20:37.93#ibcon#about to read 4, iclass 16, count 0 2006.229.10:20:37.93#ibcon#read 4, iclass 16, count 0 2006.229.10:20:37.93#ibcon#about to read 5, iclass 16, count 0 2006.229.10:20:37.93#ibcon#read 5, iclass 16, count 0 2006.229.10:20:37.93#ibcon#about to read 6, iclass 16, count 0 2006.229.10:20:37.93#ibcon#read 6, iclass 16, count 0 2006.229.10:20:37.93#ibcon#end of sib2, iclass 16, count 0 2006.229.10:20:37.93#ibcon#*after write, iclass 16, count 0 2006.229.10:20:37.93#ibcon#*before return 0, iclass 16, count 0 2006.229.10:20:37.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:37.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:20:37.93#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:20:37.93#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:20:37.93$vck44/vb=4,4 2006.229.10:20:37.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.10:20:37.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.10:20:37.93#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:37.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:37.99#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:37.99#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:37.99#ibcon#enter wrdev, iclass 18, count 2 2006.229.10:20:37.99#ibcon#first serial, iclass 18, count 2 2006.229.10:20:37.99#ibcon#enter sib2, iclass 18, count 2 2006.229.10:20:37.99#ibcon#flushed, iclass 18, count 2 2006.229.10:20:37.99#ibcon#about to write, iclass 18, count 2 2006.229.10:20:37.99#ibcon#wrote, iclass 18, count 2 2006.229.10:20:37.99#ibcon#about to read 3, iclass 18, count 2 2006.229.10:20:38.01#ibcon#read 3, iclass 18, count 2 2006.229.10:20:38.01#ibcon#about to read 4, iclass 18, count 2 2006.229.10:20:38.01#ibcon#read 4, iclass 18, count 2 2006.229.10:20:38.01#ibcon#about to read 5, iclass 18, count 2 2006.229.10:20:38.01#ibcon#read 5, iclass 18, count 2 2006.229.10:20:38.01#ibcon#about to read 6, iclass 18, count 2 2006.229.10:20:38.01#ibcon#read 6, iclass 18, count 2 2006.229.10:20:38.01#ibcon#end of sib2, iclass 18, count 2 2006.229.10:20:38.01#ibcon#*mode == 0, iclass 18, count 2 2006.229.10:20:38.01#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.10:20:38.01#ibcon#[27=AT04-04\r\n] 2006.229.10:20:38.01#ibcon#*before write, iclass 18, count 2 2006.229.10:20:38.01#ibcon#enter sib2, iclass 18, count 2 2006.229.10:20:38.01#ibcon#flushed, iclass 18, count 2 2006.229.10:20:38.01#ibcon#about to write, iclass 18, count 2 2006.229.10:20:38.01#ibcon#wrote, iclass 18, count 2 2006.229.10:20:38.01#ibcon#about to read 3, iclass 18, count 2 2006.229.10:20:38.04#ibcon#read 3, iclass 18, count 2 2006.229.10:20:38.04#ibcon#about to read 4, iclass 18, count 2 2006.229.10:20:38.04#ibcon#read 4, iclass 18, count 2 2006.229.10:20:38.04#ibcon#about to read 5, iclass 18, count 2 2006.229.10:20:38.04#ibcon#read 5, iclass 18, count 2 2006.229.10:20:38.04#ibcon#about to read 6, iclass 18, count 2 2006.229.10:20:38.04#ibcon#read 6, iclass 18, count 2 2006.229.10:20:38.04#ibcon#end of sib2, iclass 18, count 2 2006.229.10:20:38.04#ibcon#*after write, iclass 18, count 2 2006.229.10:20:38.04#ibcon#*before return 0, iclass 18, count 2 2006.229.10:20:38.04#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:38.04#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:20:38.04#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.10:20:38.04#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:38.04#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:38.16#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:38.16#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:38.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:20:38.16#ibcon#first serial, iclass 18, count 0 2006.229.10:20:38.16#ibcon#enter sib2, iclass 18, count 0 2006.229.10:20:38.16#ibcon#flushed, iclass 18, count 0 2006.229.10:20:38.16#ibcon#about to write, iclass 18, count 0 2006.229.10:20:38.16#ibcon#wrote, iclass 18, count 0 2006.229.10:20:38.16#ibcon#about to read 3, iclass 18, count 0 2006.229.10:20:38.18#ibcon#read 3, iclass 18, count 0 2006.229.10:20:38.18#ibcon#about to read 4, iclass 18, count 0 2006.229.10:20:38.18#ibcon#read 4, iclass 18, count 0 2006.229.10:20:38.18#ibcon#about to read 5, iclass 18, count 0 2006.229.10:20:38.18#ibcon#read 5, iclass 18, count 0 2006.229.10:20:38.18#ibcon#about to read 6, iclass 18, count 0 2006.229.10:20:38.18#ibcon#read 6, iclass 18, count 0 2006.229.10:20:38.18#ibcon#end of sib2, iclass 18, count 0 2006.229.10:20:38.18#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:20:38.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:20:38.18#ibcon#[27=USB\r\n] 2006.229.10:20:38.18#ibcon#*before write, iclass 18, count 0 2006.229.10:20:38.18#ibcon#enter sib2, iclass 18, count 0 2006.229.10:20:38.18#ibcon#flushed, iclass 18, count 0 2006.229.10:20:38.18#ibcon#about to write, iclass 18, count 0 2006.229.10:20:38.18#ibcon#wrote, iclass 18, count 0 2006.229.10:20:38.18#ibcon#about to read 3, iclass 18, count 0 2006.229.10:20:38.21#ibcon#read 3, iclass 18, count 0 2006.229.10:20:38.21#ibcon#about to read 4, iclass 18, count 0 2006.229.10:20:38.21#ibcon#read 4, iclass 18, count 0 2006.229.10:20:38.21#ibcon#about to read 5, iclass 18, count 0 2006.229.10:20:38.21#ibcon#read 5, iclass 18, count 0 2006.229.10:20:38.21#ibcon#about to read 6, iclass 18, count 0 2006.229.10:20:38.21#ibcon#read 6, iclass 18, count 0 2006.229.10:20:38.21#ibcon#end of sib2, iclass 18, count 0 2006.229.10:20:38.21#ibcon#*after write, iclass 18, count 0 2006.229.10:20:38.21#ibcon#*before return 0, iclass 18, count 0 2006.229.10:20:38.21#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:38.21#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:20:38.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:20:38.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:20:38.21$vck44/vblo=5,709.99 2006.229.10:20:38.21#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.10:20:38.21#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.10:20:38.21#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:38.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:38.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:38.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:38.21#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:20:38.21#ibcon#first serial, iclass 20, count 0 2006.229.10:20:38.21#ibcon#enter sib2, iclass 20, count 0 2006.229.10:20:38.21#ibcon#flushed, iclass 20, count 0 2006.229.10:20:38.21#ibcon#about to write, iclass 20, count 0 2006.229.10:20:38.21#ibcon#wrote, iclass 20, count 0 2006.229.10:20:38.21#ibcon#about to read 3, iclass 20, count 0 2006.229.10:20:38.23#ibcon#read 3, iclass 20, count 0 2006.229.10:20:38.23#ibcon#about to read 4, iclass 20, count 0 2006.229.10:20:38.23#ibcon#read 4, iclass 20, count 0 2006.229.10:20:38.23#ibcon#about to read 5, iclass 20, count 0 2006.229.10:20:38.23#ibcon#read 5, iclass 20, count 0 2006.229.10:20:38.23#ibcon#about to read 6, iclass 20, count 0 2006.229.10:20:38.23#ibcon#read 6, iclass 20, count 0 2006.229.10:20:38.23#ibcon#end of sib2, iclass 20, count 0 2006.229.10:20:38.23#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:20:38.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:20:38.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:20:38.23#ibcon#*before write, iclass 20, count 0 2006.229.10:20:38.23#ibcon#enter sib2, iclass 20, count 0 2006.229.10:20:38.23#ibcon#flushed, iclass 20, count 0 2006.229.10:20:38.23#ibcon#about to write, iclass 20, count 0 2006.229.10:20:38.23#ibcon#wrote, iclass 20, count 0 2006.229.10:20:38.23#ibcon#about to read 3, iclass 20, count 0 2006.229.10:20:38.27#ibcon#read 3, iclass 20, count 0 2006.229.10:20:38.27#ibcon#about to read 4, iclass 20, count 0 2006.229.10:20:38.27#ibcon#read 4, iclass 20, count 0 2006.229.10:20:38.27#ibcon#about to read 5, iclass 20, count 0 2006.229.10:20:38.27#ibcon#read 5, iclass 20, count 0 2006.229.10:20:38.27#ibcon#about to read 6, iclass 20, count 0 2006.229.10:20:38.27#ibcon#read 6, iclass 20, count 0 2006.229.10:20:38.27#ibcon#end of sib2, iclass 20, count 0 2006.229.10:20:38.27#ibcon#*after write, iclass 20, count 0 2006.229.10:20:38.27#ibcon#*before return 0, iclass 20, count 0 2006.229.10:20:38.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:38.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:20:38.27#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:20:38.27#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:20:38.27$vck44/vb=5,4 2006.229.10:20:38.27#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.10:20:38.27#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.10:20:38.27#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:38.27#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:38.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:38.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:38.33#ibcon#enter wrdev, iclass 22, count 2 2006.229.10:20:38.33#ibcon#first serial, iclass 22, count 2 2006.229.10:20:38.33#ibcon#enter sib2, iclass 22, count 2 2006.229.10:20:38.33#ibcon#flushed, iclass 22, count 2 2006.229.10:20:38.33#ibcon#about to write, iclass 22, count 2 2006.229.10:20:38.33#ibcon#wrote, iclass 22, count 2 2006.229.10:20:38.33#ibcon#about to read 3, iclass 22, count 2 2006.229.10:20:38.35#ibcon#read 3, iclass 22, count 2 2006.229.10:20:38.35#ibcon#about to read 4, iclass 22, count 2 2006.229.10:20:38.35#ibcon#read 4, iclass 22, count 2 2006.229.10:20:38.35#ibcon#about to read 5, iclass 22, count 2 2006.229.10:20:38.35#ibcon#read 5, iclass 22, count 2 2006.229.10:20:38.35#ibcon#about to read 6, iclass 22, count 2 2006.229.10:20:38.35#ibcon#read 6, iclass 22, count 2 2006.229.10:20:38.35#ibcon#end of sib2, iclass 22, count 2 2006.229.10:20:38.35#ibcon#*mode == 0, iclass 22, count 2 2006.229.10:20:38.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.10:20:38.35#ibcon#[27=AT05-04\r\n] 2006.229.10:20:38.35#ibcon#*before write, iclass 22, count 2 2006.229.10:20:38.35#ibcon#enter sib2, iclass 22, count 2 2006.229.10:20:38.35#ibcon#flushed, iclass 22, count 2 2006.229.10:20:38.35#ibcon#about to write, iclass 22, count 2 2006.229.10:20:38.35#ibcon#wrote, iclass 22, count 2 2006.229.10:20:38.35#ibcon#about to read 3, iclass 22, count 2 2006.229.10:20:38.38#ibcon#read 3, iclass 22, count 2 2006.229.10:20:38.38#ibcon#about to read 4, iclass 22, count 2 2006.229.10:20:38.38#ibcon#read 4, iclass 22, count 2 2006.229.10:20:38.38#ibcon#about to read 5, iclass 22, count 2 2006.229.10:20:38.38#ibcon#read 5, iclass 22, count 2 2006.229.10:20:38.38#ibcon#about to read 6, iclass 22, count 2 2006.229.10:20:38.38#ibcon#read 6, iclass 22, count 2 2006.229.10:20:38.38#ibcon#end of sib2, iclass 22, count 2 2006.229.10:20:38.38#ibcon#*after write, iclass 22, count 2 2006.229.10:20:38.38#ibcon#*before return 0, iclass 22, count 2 2006.229.10:20:38.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:38.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:20:38.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.10:20:38.38#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:38.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:38.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:38.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:38.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:20:38.50#ibcon#first serial, iclass 22, count 0 2006.229.10:20:38.50#ibcon#enter sib2, iclass 22, count 0 2006.229.10:20:38.50#ibcon#flushed, iclass 22, count 0 2006.229.10:20:38.50#ibcon#about to write, iclass 22, count 0 2006.229.10:20:38.50#ibcon#wrote, iclass 22, count 0 2006.229.10:20:38.50#ibcon#about to read 3, iclass 22, count 0 2006.229.10:20:38.52#ibcon#read 3, iclass 22, count 0 2006.229.10:20:38.52#ibcon#about to read 4, iclass 22, count 0 2006.229.10:20:38.52#ibcon#read 4, iclass 22, count 0 2006.229.10:20:38.52#ibcon#about to read 5, iclass 22, count 0 2006.229.10:20:38.52#ibcon#read 5, iclass 22, count 0 2006.229.10:20:38.52#ibcon#about to read 6, iclass 22, count 0 2006.229.10:20:38.52#ibcon#read 6, iclass 22, count 0 2006.229.10:20:38.52#ibcon#end of sib2, iclass 22, count 0 2006.229.10:20:38.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:20:38.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:20:38.52#ibcon#[27=USB\r\n] 2006.229.10:20:38.52#ibcon#*before write, iclass 22, count 0 2006.229.10:20:38.52#ibcon#enter sib2, iclass 22, count 0 2006.229.10:20:38.52#ibcon#flushed, iclass 22, count 0 2006.229.10:20:38.52#ibcon#about to write, iclass 22, count 0 2006.229.10:20:38.52#ibcon#wrote, iclass 22, count 0 2006.229.10:20:38.52#ibcon#about to read 3, iclass 22, count 0 2006.229.10:20:38.55#ibcon#read 3, iclass 22, count 0 2006.229.10:20:38.55#ibcon#about to read 4, iclass 22, count 0 2006.229.10:20:38.55#ibcon#read 4, iclass 22, count 0 2006.229.10:20:38.55#ibcon#about to read 5, iclass 22, count 0 2006.229.10:20:38.55#ibcon#read 5, iclass 22, count 0 2006.229.10:20:38.55#ibcon#about to read 6, iclass 22, count 0 2006.229.10:20:38.55#ibcon#read 6, iclass 22, count 0 2006.229.10:20:38.55#ibcon#end of sib2, iclass 22, count 0 2006.229.10:20:38.55#ibcon#*after write, iclass 22, count 0 2006.229.10:20:38.55#ibcon#*before return 0, iclass 22, count 0 2006.229.10:20:38.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:38.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:20:38.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:20:38.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:20:38.55$vck44/vblo=6,719.99 2006.229.10:20:38.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.10:20:38.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.10:20:38.55#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:38.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:38.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:38.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:38.55#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:20:38.55#ibcon#first serial, iclass 24, count 0 2006.229.10:20:38.55#ibcon#enter sib2, iclass 24, count 0 2006.229.10:20:38.55#ibcon#flushed, iclass 24, count 0 2006.229.10:20:38.55#ibcon#about to write, iclass 24, count 0 2006.229.10:20:38.55#ibcon#wrote, iclass 24, count 0 2006.229.10:20:38.55#ibcon#about to read 3, iclass 24, count 0 2006.229.10:20:38.57#ibcon#read 3, iclass 24, count 0 2006.229.10:20:38.57#ibcon#about to read 4, iclass 24, count 0 2006.229.10:20:38.57#ibcon#read 4, iclass 24, count 0 2006.229.10:20:38.57#ibcon#about to read 5, iclass 24, count 0 2006.229.10:20:38.57#ibcon#read 5, iclass 24, count 0 2006.229.10:20:38.57#ibcon#about to read 6, iclass 24, count 0 2006.229.10:20:38.57#ibcon#read 6, iclass 24, count 0 2006.229.10:20:38.57#ibcon#end of sib2, iclass 24, count 0 2006.229.10:20:38.57#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:20:38.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:20:38.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:20:38.57#ibcon#*before write, iclass 24, count 0 2006.229.10:20:38.57#ibcon#enter sib2, iclass 24, count 0 2006.229.10:20:38.57#ibcon#flushed, iclass 24, count 0 2006.229.10:20:38.57#ibcon#about to write, iclass 24, count 0 2006.229.10:20:38.57#ibcon#wrote, iclass 24, count 0 2006.229.10:20:38.57#ibcon#about to read 3, iclass 24, count 0 2006.229.10:20:38.61#ibcon#read 3, iclass 24, count 0 2006.229.10:20:38.61#ibcon#about to read 4, iclass 24, count 0 2006.229.10:20:38.61#ibcon#read 4, iclass 24, count 0 2006.229.10:20:38.61#ibcon#about to read 5, iclass 24, count 0 2006.229.10:20:38.61#ibcon#read 5, iclass 24, count 0 2006.229.10:20:38.61#ibcon#about to read 6, iclass 24, count 0 2006.229.10:20:38.61#ibcon#read 6, iclass 24, count 0 2006.229.10:20:38.61#ibcon#end of sib2, iclass 24, count 0 2006.229.10:20:38.61#ibcon#*after write, iclass 24, count 0 2006.229.10:20:38.61#ibcon#*before return 0, iclass 24, count 0 2006.229.10:20:38.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:38.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:20:38.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:20:38.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:20:38.61$vck44/vb=6,4 2006.229.10:20:38.61#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.10:20:38.61#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.10:20:38.61#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:38.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:38.67#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:38.67#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:38.67#ibcon#enter wrdev, iclass 26, count 2 2006.229.10:20:38.67#ibcon#first serial, iclass 26, count 2 2006.229.10:20:38.67#ibcon#enter sib2, iclass 26, count 2 2006.229.10:20:38.67#ibcon#flushed, iclass 26, count 2 2006.229.10:20:38.67#ibcon#about to write, iclass 26, count 2 2006.229.10:20:38.67#ibcon#wrote, iclass 26, count 2 2006.229.10:20:38.67#ibcon#about to read 3, iclass 26, count 2 2006.229.10:20:38.69#ibcon#read 3, iclass 26, count 2 2006.229.10:20:38.69#ibcon#about to read 4, iclass 26, count 2 2006.229.10:20:38.69#ibcon#read 4, iclass 26, count 2 2006.229.10:20:38.69#ibcon#about to read 5, iclass 26, count 2 2006.229.10:20:38.69#ibcon#read 5, iclass 26, count 2 2006.229.10:20:38.69#ibcon#about to read 6, iclass 26, count 2 2006.229.10:20:38.69#ibcon#read 6, iclass 26, count 2 2006.229.10:20:38.69#ibcon#end of sib2, iclass 26, count 2 2006.229.10:20:38.69#ibcon#*mode == 0, iclass 26, count 2 2006.229.10:20:38.69#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.10:20:38.69#ibcon#[27=AT06-04\r\n] 2006.229.10:20:38.69#ibcon#*before write, iclass 26, count 2 2006.229.10:20:38.69#ibcon#enter sib2, iclass 26, count 2 2006.229.10:20:38.69#ibcon#flushed, iclass 26, count 2 2006.229.10:20:38.69#ibcon#about to write, iclass 26, count 2 2006.229.10:20:38.69#ibcon#wrote, iclass 26, count 2 2006.229.10:20:38.69#ibcon#about to read 3, iclass 26, count 2 2006.229.10:20:38.72#ibcon#read 3, iclass 26, count 2 2006.229.10:20:38.72#ibcon#about to read 4, iclass 26, count 2 2006.229.10:20:38.72#ibcon#read 4, iclass 26, count 2 2006.229.10:20:38.72#ibcon#about to read 5, iclass 26, count 2 2006.229.10:20:38.72#ibcon#read 5, iclass 26, count 2 2006.229.10:20:38.72#ibcon#about to read 6, iclass 26, count 2 2006.229.10:20:38.72#ibcon#read 6, iclass 26, count 2 2006.229.10:20:38.72#ibcon#end of sib2, iclass 26, count 2 2006.229.10:20:38.72#ibcon#*after write, iclass 26, count 2 2006.229.10:20:38.72#ibcon#*before return 0, iclass 26, count 2 2006.229.10:20:38.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:38.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:20:38.72#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.10:20:38.72#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:38.72#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:38.84#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:38.84#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:38.84#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:20:38.84#ibcon#first serial, iclass 26, count 0 2006.229.10:20:38.84#ibcon#enter sib2, iclass 26, count 0 2006.229.10:20:38.84#ibcon#flushed, iclass 26, count 0 2006.229.10:20:38.84#ibcon#about to write, iclass 26, count 0 2006.229.10:20:38.84#ibcon#wrote, iclass 26, count 0 2006.229.10:20:38.84#ibcon#about to read 3, iclass 26, count 0 2006.229.10:20:38.86#ibcon#read 3, iclass 26, count 0 2006.229.10:20:38.86#ibcon#about to read 4, iclass 26, count 0 2006.229.10:20:38.86#ibcon#read 4, iclass 26, count 0 2006.229.10:20:38.86#ibcon#about to read 5, iclass 26, count 0 2006.229.10:20:38.86#ibcon#read 5, iclass 26, count 0 2006.229.10:20:38.86#ibcon#about to read 6, iclass 26, count 0 2006.229.10:20:38.86#ibcon#read 6, iclass 26, count 0 2006.229.10:20:38.86#ibcon#end of sib2, iclass 26, count 0 2006.229.10:20:38.86#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:20:38.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:20:38.86#ibcon#[27=USB\r\n] 2006.229.10:20:38.86#ibcon#*before write, iclass 26, count 0 2006.229.10:20:38.86#ibcon#enter sib2, iclass 26, count 0 2006.229.10:20:38.86#ibcon#flushed, iclass 26, count 0 2006.229.10:20:38.86#ibcon#about to write, iclass 26, count 0 2006.229.10:20:38.86#ibcon#wrote, iclass 26, count 0 2006.229.10:20:38.86#ibcon#about to read 3, iclass 26, count 0 2006.229.10:20:38.89#ibcon#read 3, iclass 26, count 0 2006.229.10:20:38.89#ibcon#about to read 4, iclass 26, count 0 2006.229.10:20:38.89#ibcon#read 4, iclass 26, count 0 2006.229.10:20:38.89#ibcon#about to read 5, iclass 26, count 0 2006.229.10:20:38.89#ibcon#read 5, iclass 26, count 0 2006.229.10:20:38.89#ibcon#about to read 6, iclass 26, count 0 2006.229.10:20:38.89#ibcon#read 6, iclass 26, count 0 2006.229.10:20:38.89#ibcon#end of sib2, iclass 26, count 0 2006.229.10:20:38.89#ibcon#*after write, iclass 26, count 0 2006.229.10:20:38.89#ibcon#*before return 0, iclass 26, count 0 2006.229.10:20:38.89#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:38.89#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:20:38.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:20:38.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:20:38.89$vck44/vblo=7,734.99 2006.229.10:20:38.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.10:20:38.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.10:20:38.89#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:38.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:38.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:38.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:38.89#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:20:38.89#ibcon#first serial, iclass 28, count 0 2006.229.10:20:38.89#ibcon#enter sib2, iclass 28, count 0 2006.229.10:20:38.89#ibcon#flushed, iclass 28, count 0 2006.229.10:20:38.89#ibcon#about to write, iclass 28, count 0 2006.229.10:20:38.89#ibcon#wrote, iclass 28, count 0 2006.229.10:20:38.89#ibcon#about to read 3, iclass 28, count 0 2006.229.10:20:38.91#ibcon#read 3, iclass 28, count 0 2006.229.10:20:38.91#ibcon#about to read 4, iclass 28, count 0 2006.229.10:20:38.91#ibcon#read 4, iclass 28, count 0 2006.229.10:20:38.91#ibcon#about to read 5, iclass 28, count 0 2006.229.10:20:38.91#ibcon#read 5, iclass 28, count 0 2006.229.10:20:38.91#ibcon#about to read 6, iclass 28, count 0 2006.229.10:20:38.91#ibcon#read 6, iclass 28, count 0 2006.229.10:20:38.91#ibcon#end of sib2, iclass 28, count 0 2006.229.10:20:38.91#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:20:38.91#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:20:38.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:20:38.91#ibcon#*before write, iclass 28, count 0 2006.229.10:20:38.91#ibcon#enter sib2, iclass 28, count 0 2006.229.10:20:38.91#ibcon#flushed, iclass 28, count 0 2006.229.10:20:38.91#ibcon#about to write, iclass 28, count 0 2006.229.10:20:38.91#ibcon#wrote, iclass 28, count 0 2006.229.10:20:38.91#ibcon#about to read 3, iclass 28, count 0 2006.229.10:20:38.95#ibcon#read 3, iclass 28, count 0 2006.229.10:20:38.95#ibcon#about to read 4, iclass 28, count 0 2006.229.10:20:38.95#ibcon#read 4, iclass 28, count 0 2006.229.10:20:38.95#ibcon#about to read 5, iclass 28, count 0 2006.229.10:20:38.95#ibcon#read 5, iclass 28, count 0 2006.229.10:20:38.95#ibcon#about to read 6, iclass 28, count 0 2006.229.10:20:38.95#ibcon#read 6, iclass 28, count 0 2006.229.10:20:38.95#ibcon#end of sib2, iclass 28, count 0 2006.229.10:20:38.95#ibcon#*after write, iclass 28, count 0 2006.229.10:20:38.95#ibcon#*before return 0, iclass 28, count 0 2006.229.10:20:38.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:38.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:20:38.95#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:20:38.95#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:20:38.95$vck44/vb=7,4 2006.229.10:20:38.95#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.10:20:38.95#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.10:20:38.95#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:38.95#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:39.01#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:39.01#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:39.01#ibcon#enter wrdev, iclass 30, count 2 2006.229.10:20:39.01#ibcon#first serial, iclass 30, count 2 2006.229.10:20:39.01#ibcon#enter sib2, iclass 30, count 2 2006.229.10:20:39.01#ibcon#flushed, iclass 30, count 2 2006.229.10:20:39.01#ibcon#about to write, iclass 30, count 2 2006.229.10:20:39.01#ibcon#wrote, iclass 30, count 2 2006.229.10:20:39.01#ibcon#about to read 3, iclass 30, count 2 2006.229.10:20:39.03#ibcon#read 3, iclass 30, count 2 2006.229.10:20:39.03#ibcon#about to read 4, iclass 30, count 2 2006.229.10:20:39.03#ibcon#read 4, iclass 30, count 2 2006.229.10:20:39.03#ibcon#about to read 5, iclass 30, count 2 2006.229.10:20:39.03#ibcon#read 5, iclass 30, count 2 2006.229.10:20:39.03#ibcon#about to read 6, iclass 30, count 2 2006.229.10:20:39.03#ibcon#read 6, iclass 30, count 2 2006.229.10:20:39.03#ibcon#end of sib2, iclass 30, count 2 2006.229.10:20:39.03#ibcon#*mode == 0, iclass 30, count 2 2006.229.10:20:39.03#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.10:20:39.03#ibcon#[27=AT07-04\r\n] 2006.229.10:20:39.03#ibcon#*before write, iclass 30, count 2 2006.229.10:20:39.03#ibcon#enter sib2, iclass 30, count 2 2006.229.10:20:39.03#ibcon#flushed, iclass 30, count 2 2006.229.10:20:39.03#ibcon#about to write, iclass 30, count 2 2006.229.10:20:39.03#ibcon#wrote, iclass 30, count 2 2006.229.10:20:39.03#ibcon#about to read 3, iclass 30, count 2 2006.229.10:20:39.06#ibcon#read 3, iclass 30, count 2 2006.229.10:20:39.06#ibcon#about to read 4, iclass 30, count 2 2006.229.10:20:39.06#ibcon#read 4, iclass 30, count 2 2006.229.10:20:39.06#ibcon#about to read 5, iclass 30, count 2 2006.229.10:20:39.06#ibcon#read 5, iclass 30, count 2 2006.229.10:20:39.06#ibcon#about to read 6, iclass 30, count 2 2006.229.10:20:39.06#ibcon#read 6, iclass 30, count 2 2006.229.10:20:39.06#ibcon#end of sib2, iclass 30, count 2 2006.229.10:20:39.06#ibcon#*after write, iclass 30, count 2 2006.229.10:20:39.06#ibcon#*before return 0, iclass 30, count 2 2006.229.10:20:39.06#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:39.06#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:20:39.06#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.10:20:39.06#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:39.06#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:39.18#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:39.18#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:39.18#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:20:39.18#ibcon#first serial, iclass 30, count 0 2006.229.10:20:39.18#ibcon#enter sib2, iclass 30, count 0 2006.229.10:20:39.18#ibcon#flushed, iclass 30, count 0 2006.229.10:20:39.18#ibcon#about to write, iclass 30, count 0 2006.229.10:20:39.18#ibcon#wrote, iclass 30, count 0 2006.229.10:20:39.18#ibcon#about to read 3, iclass 30, count 0 2006.229.10:20:39.20#ibcon#read 3, iclass 30, count 0 2006.229.10:20:39.20#ibcon#about to read 4, iclass 30, count 0 2006.229.10:20:39.20#ibcon#read 4, iclass 30, count 0 2006.229.10:20:39.20#ibcon#about to read 5, iclass 30, count 0 2006.229.10:20:39.20#ibcon#read 5, iclass 30, count 0 2006.229.10:20:39.20#ibcon#about to read 6, iclass 30, count 0 2006.229.10:20:39.20#ibcon#read 6, iclass 30, count 0 2006.229.10:20:39.20#ibcon#end of sib2, iclass 30, count 0 2006.229.10:20:39.20#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:20:39.20#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:20:39.20#ibcon#[27=USB\r\n] 2006.229.10:20:39.20#ibcon#*before write, iclass 30, count 0 2006.229.10:20:39.20#ibcon#enter sib2, iclass 30, count 0 2006.229.10:20:39.20#ibcon#flushed, iclass 30, count 0 2006.229.10:20:39.20#ibcon#about to write, iclass 30, count 0 2006.229.10:20:39.20#ibcon#wrote, iclass 30, count 0 2006.229.10:20:39.20#ibcon#about to read 3, iclass 30, count 0 2006.229.10:20:39.23#ibcon#read 3, iclass 30, count 0 2006.229.10:20:39.23#ibcon#about to read 4, iclass 30, count 0 2006.229.10:20:39.23#ibcon#read 4, iclass 30, count 0 2006.229.10:20:39.23#ibcon#about to read 5, iclass 30, count 0 2006.229.10:20:39.23#ibcon#read 5, iclass 30, count 0 2006.229.10:20:39.23#ibcon#about to read 6, iclass 30, count 0 2006.229.10:20:39.23#ibcon#read 6, iclass 30, count 0 2006.229.10:20:39.23#ibcon#end of sib2, iclass 30, count 0 2006.229.10:20:39.23#ibcon#*after write, iclass 30, count 0 2006.229.10:20:39.23#ibcon#*before return 0, iclass 30, count 0 2006.229.10:20:39.23#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:39.23#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:20:39.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:20:39.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:20:39.23$vck44/vblo=8,744.99 2006.229.10:20:39.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.10:20:39.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.10:20:39.23#ibcon#ireg 17 cls_cnt 0 2006.229.10:20:39.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:39.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:39.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:39.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:20:39.23#ibcon#first serial, iclass 32, count 0 2006.229.10:20:39.23#ibcon#enter sib2, iclass 32, count 0 2006.229.10:20:39.23#ibcon#flushed, iclass 32, count 0 2006.229.10:20:39.23#ibcon#about to write, iclass 32, count 0 2006.229.10:20:39.23#ibcon#wrote, iclass 32, count 0 2006.229.10:20:39.23#ibcon#about to read 3, iclass 32, count 0 2006.229.10:20:39.25#ibcon#read 3, iclass 32, count 0 2006.229.10:20:39.25#ibcon#about to read 4, iclass 32, count 0 2006.229.10:20:39.25#ibcon#read 4, iclass 32, count 0 2006.229.10:20:39.25#ibcon#about to read 5, iclass 32, count 0 2006.229.10:20:39.25#ibcon#read 5, iclass 32, count 0 2006.229.10:20:39.25#ibcon#about to read 6, iclass 32, count 0 2006.229.10:20:39.25#ibcon#read 6, iclass 32, count 0 2006.229.10:20:39.25#ibcon#end of sib2, iclass 32, count 0 2006.229.10:20:39.25#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:20:39.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:20:39.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:20:39.25#ibcon#*before write, iclass 32, count 0 2006.229.10:20:39.25#ibcon#enter sib2, iclass 32, count 0 2006.229.10:20:39.25#ibcon#flushed, iclass 32, count 0 2006.229.10:20:39.25#ibcon#about to write, iclass 32, count 0 2006.229.10:20:39.25#ibcon#wrote, iclass 32, count 0 2006.229.10:20:39.25#ibcon#about to read 3, iclass 32, count 0 2006.229.10:20:39.29#ibcon#read 3, iclass 32, count 0 2006.229.10:20:39.29#ibcon#about to read 4, iclass 32, count 0 2006.229.10:20:39.29#ibcon#read 4, iclass 32, count 0 2006.229.10:20:39.29#ibcon#about to read 5, iclass 32, count 0 2006.229.10:20:39.29#ibcon#read 5, iclass 32, count 0 2006.229.10:20:39.29#ibcon#about to read 6, iclass 32, count 0 2006.229.10:20:39.29#ibcon#read 6, iclass 32, count 0 2006.229.10:20:39.29#ibcon#end of sib2, iclass 32, count 0 2006.229.10:20:39.29#ibcon#*after write, iclass 32, count 0 2006.229.10:20:39.29#ibcon#*before return 0, iclass 32, count 0 2006.229.10:20:39.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:39.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:20:39.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:20:39.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:20:39.29$vck44/vb=8,4 2006.229.10:20:39.29#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.10:20:39.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.10:20:39.29#ibcon#ireg 11 cls_cnt 2 2006.229.10:20:39.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:39.35#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:39.35#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:39.35#ibcon#enter wrdev, iclass 34, count 2 2006.229.10:20:39.35#ibcon#first serial, iclass 34, count 2 2006.229.10:20:39.35#ibcon#enter sib2, iclass 34, count 2 2006.229.10:20:39.35#ibcon#flushed, iclass 34, count 2 2006.229.10:20:39.35#ibcon#about to write, iclass 34, count 2 2006.229.10:20:39.35#ibcon#wrote, iclass 34, count 2 2006.229.10:20:39.35#ibcon#about to read 3, iclass 34, count 2 2006.229.10:20:39.37#ibcon#read 3, iclass 34, count 2 2006.229.10:20:39.37#ibcon#about to read 4, iclass 34, count 2 2006.229.10:20:39.37#ibcon#read 4, iclass 34, count 2 2006.229.10:20:39.37#ibcon#about to read 5, iclass 34, count 2 2006.229.10:20:39.37#ibcon#read 5, iclass 34, count 2 2006.229.10:20:39.37#ibcon#about to read 6, iclass 34, count 2 2006.229.10:20:39.37#ibcon#read 6, iclass 34, count 2 2006.229.10:20:39.37#ibcon#end of sib2, iclass 34, count 2 2006.229.10:20:39.37#ibcon#*mode == 0, iclass 34, count 2 2006.229.10:20:39.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.10:20:39.37#ibcon#[27=AT08-04\r\n] 2006.229.10:20:39.37#ibcon#*before write, iclass 34, count 2 2006.229.10:20:39.37#ibcon#enter sib2, iclass 34, count 2 2006.229.10:20:39.37#ibcon#flushed, iclass 34, count 2 2006.229.10:20:39.37#ibcon#about to write, iclass 34, count 2 2006.229.10:20:39.37#ibcon#wrote, iclass 34, count 2 2006.229.10:20:39.37#ibcon#about to read 3, iclass 34, count 2 2006.229.10:20:39.40#ibcon#read 3, iclass 34, count 2 2006.229.10:20:39.40#ibcon#about to read 4, iclass 34, count 2 2006.229.10:20:39.40#ibcon#read 4, iclass 34, count 2 2006.229.10:20:39.40#ibcon#about to read 5, iclass 34, count 2 2006.229.10:20:39.40#ibcon#read 5, iclass 34, count 2 2006.229.10:20:39.40#ibcon#about to read 6, iclass 34, count 2 2006.229.10:20:39.40#ibcon#read 6, iclass 34, count 2 2006.229.10:20:39.40#ibcon#end of sib2, iclass 34, count 2 2006.229.10:20:39.40#ibcon#*after write, iclass 34, count 2 2006.229.10:20:39.40#ibcon#*before return 0, iclass 34, count 2 2006.229.10:20:39.40#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:39.40#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:20:39.40#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.10:20:39.40#ibcon#ireg 7 cls_cnt 0 2006.229.10:20:39.40#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:39.52#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:39.52#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:39.52#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:20:39.52#ibcon#first serial, iclass 34, count 0 2006.229.10:20:39.52#ibcon#enter sib2, iclass 34, count 0 2006.229.10:20:39.52#ibcon#flushed, iclass 34, count 0 2006.229.10:20:39.52#ibcon#about to write, iclass 34, count 0 2006.229.10:20:39.52#ibcon#wrote, iclass 34, count 0 2006.229.10:20:39.52#ibcon#about to read 3, iclass 34, count 0 2006.229.10:20:39.54#ibcon#read 3, iclass 34, count 0 2006.229.10:20:39.54#ibcon#about to read 4, iclass 34, count 0 2006.229.10:20:39.54#ibcon#read 4, iclass 34, count 0 2006.229.10:20:39.54#ibcon#about to read 5, iclass 34, count 0 2006.229.10:20:39.54#ibcon#read 5, iclass 34, count 0 2006.229.10:20:39.54#ibcon#about to read 6, iclass 34, count 0 2006.229.10:20:39.54#ibcon#read 6, iclass 34, count 0 2006.229.10:20:39.54#ibcon#end of sib2, iclass 34, count 0 2006.229.10:20:39.54#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:20:39.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:20:39.54#ibcon#[27=USB\r\n] 2006.229.10:20:39.54#ibcon#*before write, iclass 34, count 0 2006.229.10:20:39.54#ibcon#enter sib2, iclass 34, count 0 2006.229.10:20:39.54#ibcon#flushed, iclass 34, count 0 2006.229.10:20:39.54#ibcon#about to write, iclass 34, count 0 2006.229.10:20:39.54#ibcon#wrote, iclass 34, count 0 2006.229.10:20:39.54#ibcon#about to read 3, iclass 34, count 0 2006.229.10:20:39.57#ibcon#read 3, iclass 34, count 0 2006.229.10:20:39.57#ibcon#about to read 4, iclass 34, count 0 2006.229.10:20:39.57#ibcon#read 4, iclass 34, count 0 2006.229.10:20:39.57#ibcon#about to read 5, iclass 34, count 0 2006.229.10:20:39.57#ibcon#read 5, iclass 34, count 0 2006.229.10:20:39.57#ibcon#about to read 6, iclass 34, count 0 2006.229.10:20:39.57#ibcon#read 6, iclass 34, count 0 2006.229.10:20:39.57#ibcon#end of sib2, iclass 34, count 0 2006.229.10:20:39.57#ibcon#*after write, iclass 34, count 0 2006.229.10:20:39.57#ibcon#*before return 0, iclass 34, count 0 2006.229.10:20:39.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:39.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:20:39.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:20:39.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:20:39.57$vck44/vabw=wide 2006.229.10:20:39.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:20:39.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:20:39.57#ibcon#ireg 8 cls_cnt 0 2006.229.10:20:39.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:39.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:39.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:39.57#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:20:39.57#ibcon#first serial, iclass 36, count 0 2006.229.10:20:39.57#ibcon#enter sib2, iclass 36, count 0 2006.229.10:20:39.57#ibcon#flushed, iclass 36, count 0 2006.229.10:20:39.57#ibcon#about to write, iclass 36, count 0 2006.229.10:20:39.57#ibcon#wrote, iclass 36, count 0 2006.229.10:20:39.57#ibcon#about to read 3, iclass 36, count 0 2006.229.10:20:39.59#ibcon#read 3, iclass 36, count 0 2006.229.10:20:39.59#ibcon#about to read 4, iclass 36, count 0 2006.229.10:20:39.59#ibcon#read 4, iclass 36, count 0 2006.229.10:20:39.59#ibcon#about to read 5, iclass 36, count 0 2006.229.10:20:39.59#ibcon#read 5, iclass 36, count 0 2006.229.10:20:39.59#ibcon#about to read 6, iclass 36, count 0 2006.229.10:20:39.59#ibcon#read 6, iclass 36, count 0 2006.229.10:20:39.59#ibcon#end of sib2, iclass 36, count 0 2006.229.10:20:39.59#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:20:39.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:20:39.59#ibcon#[25=BW32\r\n] 2006.229.10:20:39.59#ibcon#*before write, iclass 36, count 0 2006.229.10:20:39.59#ibcon#enter sib2, iclass 36, count 0 2006.229.10:20:39.59#ibcon#flushed, iclass 36, count 0 2006.229.10:20:39.59#ibcon#about to write, iclass 36, count 0 2006.229.10:20:39.59#ibcon#wrote, iclass 36, count 0 2006.229.10:20:39.59#ibcon#about to read 3, iclass 36, count 0 2006.229.10:20:39.62#ibcon#read 3, iclass 36, count 0 2006.229.10:20:39.62#ibcon#about to read 4, iclass 36, count 0 2006.229.10:20:39.62#ibcon#read 4, iclass 36, count 0 2006.229.10:20:39.62#ibcon#about to read 5, iclass 36, count 0 2006.229.10:20:39.62#ibcon#read 5, iclass 36, count 0 2006.229.10:20:39.62#ibcon#about to read 6, iclass 36, count 0 2006.229.10:20:39.62#ibcon#read 6, iclass 36, count 0 2006.229.10:20:39.62#ibcon#end of sib2, iclass 36, count 0 2006.229.10:20:39.62#ibcon#*after write, iclass 36, count 0 2006.229.10:20:39.62#ibcon#*before return 0, iclass 36, count 0 2006.229.10:20:39.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:39.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:20:39.62#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:20:39.62#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:20:39.62$vck44/vbbw=wide 2006.229.10:20:39.62#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:20:39.62#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:20:39.62#ibcon#ireg 8 cls_cnt 0 2006.229.10:20:39.62#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:20:39.69#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:20:39.69#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:20:39.69#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:20:39.69#ibcon#first serial, iclass 38, count 0 2006.229.10:20:39.69#ibcon#enter sib2, iclass 38, count 0 2006.229.10:20:39.69#ibcon#flushed, iclass 38, count 0 2006.229.10:20:39.69#ibcon#about to write, iclass 38, count 0 2006.229.10:20:39.69#ibcon#wrote, iclass 38, count 0 2006.229.10:20:39.69#ibcon#about to read 3, iclass 38, count 0 2006.229.10:20:39.71#ibcon#read 3, iclass 38, count 0 2006.229.10:20:39.71#ibcon#about to read 4, iclass 38, count 0 2006.229.10:20:39.71#ibcon#read 4, iclass 38, count 0 2006.229.10:20:39.71#ibcon#about to read 5, iclass 38, count 0 2006.229.10:20:39.71#ibcon#read 5, iclass 38, count 0 2006.229.10:20:39.71#ibcon#about to read 6, iclass 38, count 0 2006.229.10:20:39.71#ibcon#read 6, iclass 38, count 0 2006.229.10:20:39.71#ibcon#end of sib2, iclass 38, count 0 2006.229.10:20:39.71#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:20:39.71#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:20:39.71#ibcon#[27=BW32\r\n] 2006.229.10:20:39.71#ibcon#*before write, iclass 38, count 0 2006.229.10:20:39.71#ibcon#enter sib2, iclass 38, count 0 2006.229.10:20:39.71#ibcon#flushed, iclass 38, count 0 2006.229.10:20:39.71#ibcon#about to write, iclass 38, count 0 2006.229.10:20:39.71#ibcon#wrote, iclass 38, count 0 2006.229.10:20:39.71#ibcon#about to read 3, iclass 38, count 0 2006.229.10:20:39.74#ibcon#read 3, iclass 38, count 0 2006.229.10:20:39.74#ibcon#about to read 4, iclass 38, count 0 2006.229.10:20:39.74#ibcon#read 4, iclass 38, count 0 2006.229.10:20:39.74#ibcon#about to read 5, iclass 38, count 0 2006.229.10:20:39.74#ibcon#read 5, iclass 38, count 0 2006.229.10:20:39.74#ibcon#about to read 6, iclass 38, count 0 2006.229.10:20:39.74#ibcon#read 6, iclass 38, count 0 2006.229.10:20:39.74#ibcon#end of sib2, iclass 38, count 0 2006.229.10:20:39.74#ibcon#*after write, iclass 38, count 0 2006.229.10:20:39.74#ibcon#*before return 0, iclass 38, count 0 2006.229.10:20:39.74#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:20:39.74#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:20:39.74#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:20:39.74#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:20:39.74$setupk4/ifdk4 2006.229.10:20:39.74$ifdk4/lo= 2006.229.10:20:39.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:20:39.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:20:39.74$ifdk4/patch= 2006.229.10:20:39.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:20:39.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:20:39.74$setupk4/!*+20s 2006.229.10:20:43.81#abcon#<5=/04 1.2 1.9 28.62 981001.4\r\n> 2006.229.10:20:43.83#abcon#{5=INTERFACE CLEAR} 2006.229.10:20:43.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:20:53.98#abcon#<5=/04 1.2 1.9 28.62 981001.4\r\n> 2006.229.10:20:54.00#abcon#{5=INTERFACE CLEAR} 2006.229.10:20:54.06#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:20:54.25$setupk4/"tpicd 2006.229.10:20:54.25$setupk4/echo=off 2006.229.10:20:54.25$setupk4/xlog=off 2006.229.10:20:54.25:!2006.229.10:25:10 2006.229.10:20:57.13#trakl#Source acquired 2006.229.10:20:57.13#flagr#flagr/antenna,acquired 2006.229.10:25:10.00:preob 2006.229.10:25:10.14/onsource/TRACKING 2006.229.10:25:10.14:!2006.229.10:25:20 2006.229.10:25:20.00:"tape 2006.229.10:25:20.00:"st=record 2006.229.10:25:20.00:data_valid=on 2006.229.10:25:20.00:midob 2006.229.10:25:21.14/onsource/TRACKING 2006.229.10:25:21.14/wx/28.59,1001.5,98 2006.229.10:25:21.31/cable/+6.4018E-03 2006.229.10:25:22.40/va/01,08,usb,yes,31,34 2006.229.10:25:22.40/va/02,07,usb,yes,34,35 2006.229.10:25:22.40/va/03,06,usb,yes,42,45 2006.229.10:25:22.40/va/04,07,usb,yes,35,37 2006.229.10:25:22.40/va/05,04,usb,yes,31,32 2006.229.10:25:22.40/va/06,04,usb,yes,35,35 2006.229.10:25:22.40/va/07,05,usb,yes,31,32 2006.229.10:25:22.40/va/08,06,usb,yes,23,28 2006.229.10:25:22.63/valo/01,524.99,yes,locked 2006.229.10:25:22.63/valo/02,534.99,yes,locked 2006.229.10:25:22.63/valo/03,564.99,yes,locked 2006.229.10:25:22.63/valo/04,624.99,yes,locked 2006.229.10:25:22.63/valo/05,734.99,yes,locked 2006.229.10:25:22.63/valo/06,814.99,yes,locked 2006.229.10:25:22.63/valo/07,864.99,yes,locked 2006.229.10:25:22.63/valo/08,884.99,yes,locked 2006.229.10:25:23.72/vb/01,04,usb,yes,32,30 2006.229.10:25:23.72/vb/02,04,usb,yes,35,34 2006.229.10:25:23.72/vb/03,04,usb,yes,31,35 2006.229.10:25:23.72/vb/04,04,usb,yes,36,35 2006.229.10:25:23.72/vb/05,04,usb,yes,28,31 2006.229.10:25:23.72/vb/06,04,usb,yes,33,29 2006.229.10:25:23.72/vb/07,04,usb,yes,33,33 2006.229.10:25:23.72/vb/08,04,usb,yes,30,34 2006.229.10:25:23.96/vblo/01,629.99,yes,locked 2006.229.10:25:23.96/vblo/02,634.99,yes,locked 2006.229.10:25:23.96/vblo/03,649.99,yes,locked 2006.229.10:25:23.96/vblo/04,679.99,yes,locked 2006.229.10:25:23.96/vblo/05,709.99,yes,locked 2006.229.10:25:23.96/vblo/06,719.99,yes,locked 2006.229.10:25:23.96/vblo/07,734.99,yes,locked 2006.229.10:25:23.96/vblo/08,744.99,yes,locked 2006.229.10:25:24.11/vabw/8 2006.229.10:25:24.26/vbbw/8 2006.229.10:25:24.35/xfe/off,on,12.0 2006.229.10:25:24.73/ifatt/23,28,28,28 2006.229.10:25:25.08/fmout-gps/S +4.48E-07 2006.229.10:25:25.12:!2006.229.10:28:10 2006.229.10:28:10.00:data_valid=off 2006.229.10:28:10.00:"et 2006.229.10:28:10.00:!+3s 2006.229.10:28:13.01:"tape 2006.229.10:28:13.01:postob 2006.229.10:28:13.19/cable/+6.4014E-03 2006.229.10:28:13.19/wx/28.56,1001.5,98 2006.229.10:28:14.08/fmout-gps/S +4.46E-07 2006.229.10:28:14.08:scan_name=229-1033,jd0608,40 2006.229.10:28:14.08:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.10:28:15.14#flagr#flagr/antenna,new-source 2006.229.10:28:15.14:checkk5 2006.229.10:28:15.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:28:15.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:28:16.28/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:28:16.66/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:28:17.04/chk_obsdata//k5ts1/T2291025??a.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.10:28:17.43/chk_obsdata//k5ts2/T2291025??b.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.10:28:17.82/chk_obsdata//k5ts3/T2291025??c.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.10:28:18.22/chk_obsdata//k5ts4/T2291025??d.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.10:28:18.93/k5log//k5ts1_log_newline 2006.229.10:28:19.65/k5log//k5ts2_log_newline 2006.229.10:28:20.36/k5log//k5ts3_log_newline 2006.229.10:28:21.08/k5log//k5ts4_log_newline 2006.229.10:28:21.10/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:28:21.10:setupk4=1 2006.229.10:28:21.10$setupk4/echo=on 2006.229.10:28:21.10$setupk4/pcalon 2006.229.10:28:21.10$pcalon/"no phase cal control is implemented here 2006.229.10:28:21.10$setupk4/"tpicd=stop 2006.229.10:28:21.10$setupk4/"rec=synch_on 2006.229.10:28:21.10$setupk4/"rec_mode=128 2006.229.10:28:21.10$setupk4/!* 2006.229.10:28:21.10$setupk4/recpk4 2006.229.10:28:21.10$recpk4/recpatch= 2006.229.10:28:21.11$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:28:21.11$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:28:21.11$setupk4/vck44 2006.229.10:28:21.11$vck44/valo=1,524.99 2006.229.10:28:21.11#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.10:28:21.11#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.10:28:21.11#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:21.11#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:21.11#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:21.11#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:21.11#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:28:21.11#ibcon#first serial, iclass 5, count 0 2006.229.10:28:21.11#ibcon#enter sib2, iclass 5, count 0 2006.229.10:28:21.11#ibcon#flushed, iclass 5, count 0 2006.229.10:28:21.11#ibcon#about to write, iclass 5, count 0 2006.229.10:28:21.11#ibcon#wrote, iclass 5, count 0 2006.229.10:28:21.11#ibcon#about to read 3, iclass 5, count 0 2006.229.10:28:21.13#ibcon#read 3, iclass 5, count 0 2006.229.10:28:21.13#ibcon#about to read 4, iclass 5, count 0 2006.229.10:28:21.13#ibcon#read 4, iclass 5, count 0 2006.229.10:28:21.13#ibcon#about to read 5, iclass 5, count 0 2006.229.10:28:21.13#ibcon#read 5, iclass 5, count 0 2006.229.10:28:21.13#ibcon#about to read 6, iclass 5, count 0 2006.229.10:28:21.13#ibcon#read 6, iclass 5, count 0 2006.229.10:28:21.13#ibcon#end of sib2, iclass 5, count 0 2006.229.10:28:21.13#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:28:21.13#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:28:21.13#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:28:21.13#ibcon#*before write, iclass 5, count 0 2006.229.10:28:21.13#ibcon#enter sib2, iclass 5, count 0 2006.229.10:28:21.13#ibcon#flushed, iclass 5, count 0 2006.229.10:28:21.13#ibcon#about to write, iclass 5, count 0 2006.229.10:28:21.13#ibcon#wrote, iclass 5, count 0 2006.229.10:28:21.13#ibcon#about to read 3, iclass 5, count 0 2006.229.10:28:21.18#ibcon#read 3, iclass 5, count 0 2006.229.10:28:21.18#ibcon#about to read 4, iclass 5, count 0 2006.229.10:28:21.18#ibcon#read 4, iclass 5, count 0 2006.229.10:28:21.18#ibcon#about to read 5, iclass 5, count 0 2006.229.10:28:21.18#ibcon#read 5, iclass 5, count 0 2006.229.10:28:21.18#ibcon#about to read 6, iclass 5, count 0 2006.229.10:28:21.18#ibcon#read 6, iclass 5, count 0 2006.229.10:28:21.18#ibcon#end of sib2, iclass 5, count 0 2006.229.10:28:21.18#ibcon#*after write, iclass 5, count 0 2006.229.10:28:21.18#ibcon#*before return 0, iclass 5, count 0 2006.229.10:28:21.18#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:21.18#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:21.18#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:28:21.18#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:28:21.18$vck44/va=1,8 2006.229.10:28:21.18#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.10:28:21.18#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.10:28:21.18#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:21.18#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:21.18#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:21.18#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:21.18#ibcon#enter wrdev, iclass 7, count 2 2006.229.10:28:21.18#ibcon#first serial, iclass 7, count 2 2006.229.10:28:21.18#ibcon#enter sib2, iclass 7, count 2 2006.229.10:28:21.18#ibcon#flushed, iclass 7, count 2 2006.229.10:28:21.18#ibcon#about to write, iclass 7, count 2 2006.229.10:28:21.18#ibcon#wrote, iclass 7, count 2 2006.229.10:28:21.18#ibcon#about to read 3, iclass 7, count 2 2006.229.10:28:21.20#ibcon#read 3, iclass 7, count 2 2006.229.10:28:21.20#ibcon#about to read 4, iclass 7, count 2 2006.229.10:28:21.20#ibcon#read 4, iclass 7, count 2 2006.229.10:28:21.20#ibcon#about to read 5, iclass 7, count 2 2006.229.10:28:21.20#ibcon#read 5, iclass 7, count 2 2006.229.10:28:21.20#ibcon#about to read 6, iclass 7, count 2 2006.229.10:28:21.20#ibcon#read 6, iclass 7, count 2 2006.229.10:28:21.20#ibcon#end of sib2, iclass 7, count 2 2006.229.10:28:21.20#ibcon#*mode == 0, iclass 7, count 2 2006.229.10:28:21.20#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.10:28:21.20#ibcon#[25=AT01-08\r\n] 2006.229.10:28:21.20#ibcon#*before write, iclass 7, count 2 2006.229.10:28:21.20#ibcon#enter sib2, iclass 7, count 2 2006.229.10:28:21.20#ibcon#flushed, iclass 7, count 2 2006.229.10:28:21.20#ibcon#about to write, iclass 7, count 2 2006.229.10:28:21.20#ibcon#wrote, iclass 7, count 2 2006.229.10:28:21.20#ibcon#about to read 3, iclass 7, count 2 2006.229.10:28:21.23#ibcon#read 3, iclass 7, count 2 2006.229.10:28:21.23#ibcon#about to read 4, iclass 7, count 2 2006.229.10:28:21.23#ibcon#read 4, iclass 7, count 2 2006.229.10:28:21.23#ibcon#about to read 5, iclass 7, count 2 2006.229.10:28:21.23#ibcon#read 5, iclass 7, count 2 2006.229.10:28:21.23#ibcon#about to read 6, iclass 7, count 2 2006.229.10:28:21.23#ibcon#read 6, iclass 7, count 2 2006.229.10:28:21.23#ibcon#end of sib2, iclass 7, count 2 2006.229.10:28:21.23#ibcon#*after write, iclass 7, count 2 2006.229.10:28:21.23#ibcon#*before return 0, iclass 7, count 2 2006.229.10:28:21.23#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:21.23#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:21.23#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.10:28:21.23#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:21.23#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:21.35#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:21.35#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:21.35#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:28:21.35#ibcon#first serial, iclass 7, count 0 2006.229.10:28:21.35#ibcon#enter sib2, iclass 7, count 0 2006.229.10:28:21.35#ibcon#flushed, iclass 7, count 0 2006.229.10:28:21.35#ibcon#about to write, iclass 7, count 0 2006.229.10:28:21.35#ibcon#wrote, iclass 7, count 0 2006.229.10:28:21.35#ibcon#about to read 3, iclass 7, count 0 2006.229.10:28:21.37#ibcon#read 3, iclass 7, count 0 2006.229.10:28:21.37#ibcon#about to read 4, iclass 7, count 0 2006.229.10:28:21.37#ibcon#read 4, iclass 7, count 0 2006.229.10:28:21.37#ibcon#about to read 5, iclass 7, count 0 2006.229.10:28:21.37#ibcon#read 5, iclass 7, count 0 2006.229.10:28:21.37#ibcon#about to read 6, iclass 7, count 0 2006.229.10:28:21.37#ibcon#read 6, iclass 7, count 0 2006.229.10:28:21.37#ibcon#end of sib2, iclass 7, count 0 2006.229.10:28:21.37#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:28:21.37#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:28:21.37#ibcon#[25=USB\r\n] 2006.229.10:28:21.37#ibcon#*before write, iclass 7, count 0 2006.229.10:28:21.37#ibcon#enter sib2, iclass 7, count 0 2006.229.10:28:21.37#ibcon#flushed, iclass 7, count 0 2006.229.10:28:21.37#ibcon#about to write, iclass 7, count 0 2006.229.10:28:21.37#ibcon#wrote, iclass 7, count 0 2006.229.10:28:21.37#ibcon#about to read 3, iclass 7, count 0 2006.229.10:28:21.40#ibcon#read 3, iclass 7, count 0 2006.229.10:28:21.40#ibcon#about to read 4, iclass 7, count 0 2006.229.10:28:21.40#ibcon#read 4, iclass 7, count 0 2006.229.10:28:21.40#ibcon#about to read 5, iclass 7, count 0 2006.229.10:28:21.40#ibcon#read 5, iclass 7, count 0 2006.229.10:28:21.40#ibcon#about to read 6, iclass 7, count 0 2006.229.10:28:21.40#ibcon#read 6, iclass 7, count 0 2006.229.10:28:21.40#ibcon#end of sib2, iclass 7, count 0 2006.229.10:28:21.40#ibcon#*after write, iclass 7, count 0 2006.229.10:28:21.40#ibcon#*before return 0, iclass 7, count 0 2006.229.10:28:21.40#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:21.40#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:21.40#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:28:21.40#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:28:21.40$vck44/valo=2,534.99 2006.229.10:28:21.40#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.10:28:21.40#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.10:28:21.40#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:21.40#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:21.40#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:21.40#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:21.40#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:28:21.40#ibcon#first serial, iclass 11, count 0 2006.229.10:28:21.40#ibcon#enter sib2, iclass 11, count 0 2006.229.10:28:21.40#ibcon#flushed, iclass 11, count 0 2006.229.10:28:21.40#ibcon#about to write, iclass 11, count 0 2006.229.10:28:21.40#ibcon#wrote, iclass 11, count 0 2006.229.10:28:21.40#ibcon#about to read 3, iclass 11, count 0 2006.229.10:28:21.42#ibcon#read 3, iclass 11, count 0 2006.229.10:28:21.42#ibcon#about to read 4, iclass 11, count 0 2006.229.10:28:21.42#ibcon#read 4, iclass 11, count 0 2006.229.10:28:21.42#ibcon#about to read 5, iclass 11, count 0 2006.229.10:28:21.42#ibcon#read 5, iclass 11, count 0 2006.229.10:28:21.42#ibcon#about to read 6, iclass 11, count 0 2006.229.10:28:21.42#ibcon#read 6, iclass 11, count 0 2006.229.10:28:21.42#ibcon#end of sib2, iclass 11, count 0 2006.229.10:28:21.42#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:28:21.42#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:28:21.42#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:28:21.42#ibcon#*before write, iclass 11, count 0 2006.229.10:28:21.42#ibcon#enter sib2, iclass 11, count 0 2006.229.10:28:21.42#ibcon#flushed, iclass 11, count 0 2006.229.10:28:21.42#ibcon#about to write, iclass 11, count 0 2006.229.10:28:21.42#ibcon#wrote, iclass 11, count 0 2006.229.10:28:21.42#ibcon#about to read 3, iclass 11, count 0 2006.229.10:28:21.46#ibcon#read 3, iclass 11, count 0 2006.229.10:28:21.46#ibcon#about to read 4, iclass 11, count 0 2006.229.10:28:21.46#ibcon#read 4, iclass 11, count 0 2006.229.10:28:21.46#ibcon#about to read 5, iclass 11, count 0 2006.229.10:28:21.46#ibcon#read 5, iclass 11, count 0 2006.229.10:28:21.46#ibcon#about to read 6, iclass 11, count 0 2006.229.10:28:21.46#ibcon#read 6, iclass 11, count 0 2006.229.10:28:21.46#ibcon#end of sib2, iclass 11, count 0 2006.229.10:28:21.46#ibcon#*after write, iclass 11, count 0 2006.229.10:28:21.46#ibcon#*before return 0, iclass 11, count 0 2006.229.10:28:21.46#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:21.46#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:21.46#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:28:21.46#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:28:21.46$vck44/va=2,7 2006.229.10:28:21.46#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.10:28:21.46#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.10:28:21.46#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:21.46#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:21.52#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:21.52#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:21.52#ibcon#enter wrdev, iclass 13, count 2 2006.229.10:28:21.52#ibcon#first serial, iclass 13, count 2 2006.229.10:28:21.52#ibcon#enter sib2, iclass 13, count 2 2006.229.10:28:21.52#ibcon#flushed, iclass 13, count 2 2006.229.10:28:21.52#ibcon#about to write, iclass 13, count 2 2006.229.10:28:21.52#ibcon#wrote, iclass 13, count 2 2006.229.10:28:21.52#ibcon#about to read 3, iclass 13, count 2 2006.229.10:28:21.54#ibcon#read 3, iclass 13, count 2 2006.229.10:28:21.54#ibcon#about to read 4, iclass 13, count 2 2006.229.10:28:21.54#ibcon#read 4, iclass 13, count 2 2006.229.10:28:21.54#ibcon#about to read 5, iclass 13, count 2 2006.229.10:28:21.54#ibcon#read 5, iclass 13, count 2 2006.229.10:28:21.54#ibcon#about to read 6, iclass 13, count 2 2006.229.10:28:21.54#ibcon#read 6, iclass 13, count 2 2006.229.10:28:21.54#ibcon#end of sib2, iclass 13, count 2 2006.229.10:28:21.54#ibcon#*mode == 0, iclass 13, count 2 2006.229.10:28:21.54#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.10:28:21.54#ibcon#[25=AT02-07\r\n] 2006.229.10:28:21.54#ibcon#*before write, iclass 13, count 2 2006.229.10:28:21.54#ibcon#enter sib2, iclass 13, count 2 2006.229.10:28:21.54#ibcon#flushed, iclass 13, count 2 2006.229.10:28:21.54#ibcon#about to write, iclass 13, count 2 2006.229.10:28:21.54#ibcon#wrote, iclass 13, count 2 2006.229.10:28:21.54#ibcon#about to read 3, iclass 13, count 2 2006.229.10:28:21.57#ibcon#read 3, iclass 13, count 2 2006.229.10:28:21.57#ibcon#about to read 4, iclass 13, count 2 2006.229.10:28:21.57#ibcon#read 4, iclass 13, count 2 2006.229.10:28:21.57#ibcon#about to read 5, iclass 13, count 2 2006.229.10:28:21.57#ibcon#read 5, iclass 13, count 2 2006.229.10:28:21.57#ibcon#about to read 6, iclass 13, count 2 2006.229.10:28:21.57#ibcon#read 6, iclass 13, count 2 2006.229.10:28:21.57#ibcon#end of sib2, iclass 13, count 2 2006.229.10:28:21.57#ibcon#*after write, iclass 13, count 2 2006.229.10:28:21.57#ibcon#*before return 0, iclass 13, count 2 2006.229.10:28:21.57#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:21.57#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:21.57#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.10:28:21.57#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:21.57#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:21.64#abcon#<5=/04 1.3 2.2 28.56 981001.5\r\n> 2006.229.10:28:21.66#abcon#{5=INTERFACE CLEAR} 2006.229.10:28:21.69#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:21.69#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:21.69#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:28:21.69#ibcon#first serial, iclass 13, count 0 2006.229.10:28:21.69#ibcon#enter sib2, iclass 13, count 0 2006.229.10:28:21.69#ibcon#flushed, iclass 13, count 0 2006.229.10:28:21.69#ibcon#about to write, iclass 13, count 0 2006.229.10:28:21.69#ibcon#wrote, iclass 13, count 0 2006.229.10:28:21.69#ibcon#about to read 3, iclass 13, count 0 2006.229.10:28:21.71#ibcon#read 3, iclass 13, count 0 2006.229.10:28:21.71#ibcon#about to read 4, iclass 13, count 0 2006.229.10:28:21.71#ibcon#read 4, iclass 13, count 0 2006.229.10:28:21.71#ibcon#about to read 5, iclass 13, count 0 2006.229.10:28:21.71#ibcon#read 5, iclass 13, count 0 2006.229.10:28:21.71#ibcon#about to read 6, iclass 13, count 0 2006.229.10:28:21.71#ibcon#read 6, iclass 13, count 0 2006.229.10:28:21.71#ibcon#end of sib2, iclass 13, count 0 2006.229.10:28:21.71#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:28:21.71#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:28:21.71#ibcon#[25=USB\r\n] 2006.229.10:28:21.71#ibcon#*before write, iclass 13, count 0 2006.229.10:28:21.71#ibcon#enter sib2, iclass 13, count 0 2006.229.10:28:21.71#ibcon#flushed, iclass 13, count 0 2006.229.10:28:21.71#ibcon#about to write, iclass 13, count 0 2006.229.10:28:21.71#ibcon#wrote, iclass 13, count 0 2006.229.10:28:21.71#ibcon#about to read 3, iclass 13, count 0 2006.229.10:28:21.72#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:28:21.74#ibcon#read 3, iclass 13, count 0 2006.229.10:28:21.74#ibcon#about to read 4, iclass 13, count 0 2006.229.10:28:21.74#ibcon#read 4, iclass 13, count 0 2006.229.10:28:21.74#ibcon#about to read 5, iclass 13, count 0 2006.229.10:28:21.74#ibcon#read 5, iclass 13, count 0 2006.229.10:28:21.74#ibcon#about to read 6, iclass 13, count 0 2006.229.10:28:21.74#ibcon#read 6, iclass 13, count 0 2006.229.10:28:21.74#ibcon#end of sib2, iclass 13, count 0 2006.229.10:28:21.74#ibcon#*after write, iclass 13, count 0 2006.229.10:28:21.74#ibcon#*before return 0, iclass 13, count 0 2006.229.10:28:21.74#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:21.74#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:21.74#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:28:21.74#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:28:21.74$vck44/valo=3,564.99 2006.229.10:28:21.74#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.10:28:21.74#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.10:28:21.74#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:21.74#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:21.74#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:21.74#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:21.74#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:28:21.74#ibcon#first serial, iclass 19, count 0 2006.229.10:28:21.74#ibcon#enter sib2, iclass 19, count 0 2006.229.10:28:21.74#ibcon#flushed, iclass 19, count 0 2006.229.10:28:21.74#ibcon#about to write, iclass 19, count 0 2006.229.10:28:21.74#ibcon#wrote, iclass 19, count 0 2006.229.10:28:21.74#ibcon#about to read 3, iclass 19, count 0 2006.229.10:28:21.76#ibcon#read 3, iclass 19, count 0 2006.229.10:28:21.76#ibcon#about to read 4, iclass 19, count 0 2006.229.10:28:21.76#ibcon#read 4, iclass 19, count 0 2006.229.10:28:21.76#ibcon#about to read 5, iclass 19, count 0 2006.229.10:28:21.76#ibcon#read 5, iclass 19, count 0 2006.229.10:28:21.76#ibcon#about to read 6, iclass 19, count 0 2006.229.10:28:21.76#ibcon#read 6, iclass 19, count 0 2006.229.10:28:21.76#ibcon#end of sib2, iclass 19, count 0 2006.229.10:28:21.76#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:28:21.76#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:28:21.76#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:28:21.76#ibcon#*before write, iclass 19, count 0 2006.229.10:28:21.76#ibcon#enter sib2, iclass 19, count 0 2006.229.10:28:21.76#ibcon#flushed, iclass 19, count 0 2006.229.10:28:21.76#ibcon#about to write, iclass 19, count 0 2006.229.10:28:21.76#ibcon#wrote, iclass 19, count 0 2006.229.10:28:21.76#ibcon#about to read 3, iclass 19, count 0 2006.229.10:28:21.80#ibcon#read 3, iclass 19, count 0 2006.229.10:28:21.80#ibcon#about to read 4, iclass 19, count 0 2006.229.10:28:21.80#ibcon#read 4, iclass 19, count 0 2006.229.10:28:21.80#ibcon#about to read 5, iclass 19, count 0 2006.229.10:28:21.80#ibcon#read 5, iclass 19, count 0 2006.229.10:28:21.80#ibcon#about to read 6, iclass 19, count 0 2006.229.10:28:21.80#ibcon#read 6, iclass 19, count 0 2006.229.10:28:21.80#ibcon#end of sib2, iclass 19, count 0 2006.229.10:28:21.80#ibcon#*after write, iclass 19, count 0 2006.229.10:28:21.80#ibcon#*before return 0, iclass 19, count 0 2006.229.10:28:21.80#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:21.80#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:21.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:28:21.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:28:21.80$vck44/va=3,6 2006.229.10:28:21.80#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.10:28:21.80#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.10:28:21.80#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:21.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:21.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:21.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:21.86#ibcon#enter wrdev, iclass 21, count 2 2006.229.10:28:21.86#ibcon#first serial, iclass 21, count 2 2006.229.10:28:21.86#ibcon#enter sib2, iclass 21, count 2 2006.229.10:28:21.86#ibcon#flushed, iclass 21, count 2 2006.229.10:28:21.86#ibcon#about to write, iclass 21, count 2 2006.229.10:28:21.86#ibcon#wrote, iclass 21, count 2 2006.229.10:28:21.86#ibcon#about to read 3, iclass 21, count 2 2006.229.10:28:21.88#ibcon#read 3, iclass 21, count 2 2006.229.10:28:21.88#ibcon#about to read 4, iclass 21, count 2 2006.229.10:28:21.88#ibcon#read 4, iclass 21, count 2 2006.229.10:28:21.88#ibcon#about to read 5, iclass 21, count 2 2006.229.10:28:21.88#ibcon#read 5, iclass 21, count 2 2006.229.10:28:21.88#ibcon#about to read 6, iclass 21, count 2 2006.229.10:28:21.88#ibcon#read 6, iclass 21, count 2 2006.229.10:28:21.88#ibcon#end of sib2, iclass 21, count 2 2006.229.10:28:21.88#ibcon#*mode == 0, iclass 21, count 2 2006.229.10:28:21.88#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.10:28:21.88#ibcon#[25=AT03-06\r\n] 2006.229.10:28:21.88#ibcon#*before write, iclass 21, count 2 2006.229.10:28:21.88#ibcon#enter sib2, iclass 21, count 2 2006.229.10:28:21.88#ibcon#flushed, iclass 21, count 2 2006.229.10:28:21.88#ibcon#about to write, iclass 21, count 2 2006.229.10:28:21.88#ibcon#wrote, iclass 21, count 2 2006.229.10:28:21.88#ibcon#about to read 3, iclass 21, count 2 2006.229.10:28:21.91#ibcon#read 3, iclass 21, count 2 2006.229.10:28:21.91#ibcon#about to read 4, iclass 21, count 2 2006.229.10:28:21.91#ibcon#read 4, iclass 21, count 2 2006.229.10:28:21.91#ibcon#about to read 5, iclass 21, count 2 2006.229.10:28:21.91#ibcon#read 5, iclass 21, count 2 2006.229.10:28:21.91#ibcon#about to read 6, iclass 21, count 2 2006.229.10:28:21.91#ibcon#read 6, iclass 21, count 2 2006.229.10:28:21.91#ibcon#end of sib2, iclass 21, count 2 2006.229.10:28:21.91#ibcon#*after write, iclass 21, count 2 2006.229.10:28:21.91#ibcon#*before return 0, iclass 21, count 2 2006.229.10:28:21.91#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:21.91#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:21.91#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.10:28:21.91#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:21.91#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:22.03#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:22.03#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:22.03#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:28:22.03#ibcon#first serial, iclass 21, count 0 2006.229.10:28:22.03#ibcon#enter sib2, iclass 21, count 0 2006.229.10:28:22.03#ibcon#flushed, iclass 21, count 0 2006.229.10:28:22.03#ibcon#about to write, iclass 21, count 0 2006.229.10:28:22.03#ibcon#wrote, iclass 21, count 0 2006.229.10:28:22.03#ibcon#about to read 3, iclass 21, count 0 2006.229.10:28:22.05#ibcon#read 3, iclass 21, count 0 2006.229.10:28:22.05#ibcon#about to read 4, iclass 21, count 0 2006.229.10:28:22.05#ibcon#read 4, iclass 21, count 0 2006.229.10:28:22.05#ibcon#about to read 5, iclass 21, count 0 2006.229.10:28:22.05#ibcon#read 5, iclass 21, count 0 2006.229.10:28:22.05#ibcon#about to read 6, iclass 21, count 0 2006.229.10:28:22.05#ibcon#read 6, iclass 21, count 0 2006.229.10:28:22.05#ibcon#end of sib2, iclass 21, count 0 2006.229.10:28:22.05#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:28:22.05#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:28:22.05#ibcon#[25=USB\r\n] 2006.229.10:28:22.05#ibcon#*before write, iclass 21, count 0 2006.229.10:28:22.05#ibcon#enter sib2, iclass 21, count 0 2006.229.10:28:22.05#ibcon#flushed, iclass 21, count 0 2006.229.10:28:22.05#ibcon#about to write, iclass 21, count 0 2006.229.10:28:22.05#ibcon#wrote, iclass 21, count 0 2006.229.10:28:22.05#ibcon#about to read 3, iclass 21, count 0 2006.229.10:28:22.08#ibcon#read 3, iclass 21, count 0 2006.229.10:28:22.08#ibcon#about to read 4, iclass 21, count 0 2006.229.10:28:22.08#ibcon#read 4, iclass 21, count 0 2006.229.10:28:22.08#ibcon#about to read 5, iclass 21, count 0 2006.229.10:28:22.08#ibcon#read 5, iclass 21, count 0 2006.229.10:28:22.08#ibcon#about to read 6, iclass 21, count 0 2006.229.10:28:22.08#ibcon#read 6, iclass 21, count 0 2006.229.10:28:22.08#ibcon#end of sib2, iclass 21, count 0 2006.229.10:28:22.08#ibcon#*after write, iclass 21, count 0 2006.229.10:28:22.08#ibcon#*before return 0, iclass 21, count 0 2006.229.10:28:22.08#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:22.08#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:22.08#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:28:22.08#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:28:22.08$vck44/valo=4,624.99 2006.229.10:28:22.08#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.10:28:22.08#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.10:28:22.08#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:22.08#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:22.08#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:22.08#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:22.08#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:28:22.08#ibcon#first serial, iclass 23, count 0 2006.229.10:28:22.08#ibcon#enter sib2, iclass 23, count 0 2006.229.10:28:22.08#ibcon#flushed, iclass 23, count 0 2006.229.10:28:22.08#ibcon#about to write, iclass 23, count 0 2006.229.10:28:22.08#ibcon#wrote, iclass 23, count 0 2006.229.10:28:22.08#ibcon#about to read 3, iclass 23, count 0 2006.229.10:28:22.10#ibcon#read 3, iclass 23, count 0 2006.229.10:28:22.10#ibcon#about to read 4, iclass 23, count 0 2006.229.10:28:22.10#ibcon#read 4, iclass 23, count 0 2006.229.10:28:22.10#ibcon#about to read 5, iclass 23, count 0 2006.229.10:28:22.10#ibcon#read 5, iclass 23, count 0 2006.229.10:28:22.10#ibcon#about to read 6, iclass 23, count 0 2006.229.10:28:22.10#ibcon#read 6, iclass 23, count 0 2006.229.10:28:22.10#ibcon#end of sib2, iclass 23, count 0 2006.229.10:28:22.10#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:28:22.10#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:28:22.10#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:28:22.10#ibcon#*before write, iclass 23, count 0 2006.229.10:28:22.10#ibcon#enter sib2, iclass 23, count 0 2006.229.10:28:22.10#ibcon#flushed, iclass 23, count 0 2006.229.10:28:22.10#ibcon#about to write, iclass 23, count 0 2006.229.10:28:22.10#ibcon#wrote, iclass 23, count 0 2006.229.10:28:22.10#ibcon#about to read 3, iclass 23, count 0 2006.229.10:28:22.14#ibcon#read 3, iclass 23, count 0 2006.229.10:28:22.14#ibcon#about to read 4, iclass 23, count 0 2006.229.10:28:22.14#ibcon#read 4, iclass 23, count 0 2006.229.10:28:22.14#ibcon#about to read 5, iclass 23, count 0 2006.229.10:28:22.14#ibcon#read 5, iclass 23, count 0 2006.229.10:28:22.14#ibcon#about to read 6, iclass 23, count 0 2006.229.10:28:22.14#ibcon#read 6, iclass 23, count 0 2006.229.10:28:22.14#ibcon#end of sib2, iclass 23, count 0 2006.229.10:28:22.14#ibcon#*after write, iclass 23, count 0 2006.229.10:28:22.14#ibcon#*before return 0, iclass 23, count 0 2006.229.10:28:22.14#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:22.14#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:22.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:28:22.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:28:22.14$vck44/va=4,7 2006.229.10:28:22.14#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.10:28:22.14#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.10:28:22.14#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:22.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:22.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:22.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:22.20#ibcon#enter wrdev, iclass 25, count 2 2006.229.10:28:22.20#ibcon#first serial, iclass 25, count 2 2006.229.10:28:22.20#ibcon#enter sib2, iclass 25, count 2 2006.229.10:28:22.20#ibcon#flushed, iclass 25, count 2 2006.229.10:28:22.20#ibcon#about to write, iclass 25, count 2 2006.229.10:28:22.20#ibcon#wrote, iclass 25, count 2 2006.229.10:28:22.20#ibcon#about to read 3, iclass 25, count 2 2006.229.10:28:22.22#ibcon#read 3, iclass 25, count 2 2006.229.10:28:22.22#ibcon#about to read 4, iclass 25, count 2 2006.229.10:28:22.22#ibcon#read 4, iclass 25, count 2 2006.229.10:28:22.22#ibcon#about to read 5, iclass 25, count 2 2006.229.10:28:22.22#ibcon#read 5, iclass 25, count 2 2006.229.10:28:22.22#ibcon#about to read 6, iclass 25, count 2 2006.229.10:28:22.22#ibcon#read 6, iclass 25, count 2 2006.229.10:28:22.22#ibcon#end of sib2, iclass 25, count 2 2006.229.10:28:22.22#ibcon#*mode == 0, iclass 25, count 2 2006.229.10:28:22.22#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.10:28:22.22#ibcon#[25=AT04-07\r\n] 2006.229.10:28:22.22#ibcon#*before write, iclass 25, count 2 2006.229.10:28:22.22#ibcon#enter sib2, iclass 25, count 2 2006.229.10:28:22.22#ibcon#flushed, iclass 25, count 2 2006.229.10:28:22.22#ibcon#about to write, iclass 25, count 2 2006.229.10:28:22.22#ibcon#wrote, iclass 25, count 2 2006.229.10:28:22.22#ibcon#about to read 3, iclass 25, count 2 2006.229.10:28:22.25#ibcon#read 3, iclass 25, count 2 2006.229.10:28:22.25#ibcon#about to read 4, iclass 25, count 2 2006.229.10:28:22.25#ibcon#read 4, iclass 25, count 2 2006.229.10:28:22.25#ibcon#about to read 5, iclass 25, count 2 2006.229.10:28:22.25#ibcon#read 5, iclass 25, count 2 2006.229.10:28:22.25#ibcon#about to read 6, iclass 25, count 2 2006.229.10:28:22.25#ibcon#read 6, iclass 25, count 2 2006.229.10:28:22.25#ibcon#end of sib2, iclass 25, count 2 2006.229.10:28:22.31#ibcon#*after write, iclass 25, count 2 2006.229.10:28:22.31#ibcon#*before return 0, iclass 25, count 2 2006.229.10:28:22.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:22.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:22.31#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.10:28:22.31#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:22.31#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:22.43#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:22.43#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:22.43#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:28:22.43#ibcon#first serial, iclass 25, count 0 2006.229.10:28:22.43#ibcon#enter sib2, iclass 25, count 0 2006.229.10:28:22.43#ibcon#flushed, iclass 25, count 0 2006.229.10:28:22.43#ibcon#about to write, iclass 25, count 0 2006.229.10:28:22.43#ibcon#wrote, iclass 25, count 0 2006.229.10:28:22.43#ibcon#about to read 3, iclass 25, count 0 2006.229.10:28:22.45#ibcon#read 3, iclass 25, count 0 2006.229.10:28:22.45#ibcon#about to read 4, iclass 25, count 0 2006.229.10:28:22.45#ibcon#read 4, iclass 25, count 0 2006.229.10:28:22.45#ibcon#about to read 5, iclass 25, count 0 2006.229.10:28:22.45#ibcon#read 5, iclass 25, count 0 2006.229.10:28:22.45#ibcon#about to read 6, iclass 25, count 0 2006.229.10:28:22.45#ibcon#read 6, iclass 25, count 0 2006.229.10:28:22.45#ibcon#end of sib2, iclass 25, count 0 2006.229.10:28:22.45#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:28:22.45#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:28:22.45#ibcon#[25=USB\r\n] 2006.229.10:28:22.45#ibcon#*before write, iclass 25, count 0 2006.229.10:28:22.45#ibcon#enter sib2, iclass 25, count 0 2006.229.10:28:22.45#ibcon#flushed, iclass 25, count 0 2006.229.10:28:22.45#ibcon#about to write, iclass 25, count 0 2006.229.10:28:22.45#ibcon#wrote, iclass 25, count 0 2006.229.10:28:22.45#ibcon#about to read 3, iclass 25, count 0 2006.229.10:28:22.48#ibcon#read 3, iclass 25, count 0 2006.229.10:28:22.48#ibcon#about to read 4, iclass 25, count 0 2006.229.10:28:22.48#ibcon#read 4, iclass 25, count 0 2006.229.10:28:22.48#ibcon#about to read 5, iclass 25, count 0 2006.229.10:28:22.48#ibcon#read 5, iclass 25, count 0 2006.229.10:28:22.48#ibcon#about to read 6, iclass 25, count 0 2006.229.10:28:22.48#ibcon#read 6, iclass 25, count 0 2006.229.10:28:22.48#ibcon#end of sib2, iclass 25, count 0 2006.229.10:28:22.48#ibcon#*after write, iclass 25, count 0 2006.229.10:28:22.48#ibcon#*before return 0, iclass 25, count 0 2006.229.10:28:22.48#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:22.48#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:22.48#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:28:22.48#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:28:22.48$vck44/valo=5,734.99 2006.229.10:28:22.48#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.10:28:22.48#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.10:28:22.48#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:22.48#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:22.48#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:22.48#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:22.48#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:28:22.48#ibcon#first serial, iclass 27, count 0 2006.229.10:28:22.48#ibcon#enter sib2, iclass 27, count 0 2006.229.10:28:22.48#ibcon#flushed, iclass 27, count 0 2006.229.10:28:22.48#ibcon#about to write, iclass 27, count 0 2006.229.10:28:22.48#ibcon#wrote, iclass 27, count 0 2006.229.10:28:22.48#ibcon#about to read 3, iclass 27, count 0 2006.229.10:28:22.50#ibcon#read 3, iclass 27, count 0 2006.229.10:28:22.50#ibcon#about to read 4, iclass 27, count 0 2006.229.10:28:22.50#ibcon#read 4, iclass 27, count 0 2006.229.10:28:22.50#ibcon#about to read 5, iclass 27, count 0 2006.229.10:28:22.50#ibcon#read 5, iclass 27, count 0 2006.229.10:28:22.50#ibcon#about to read 6, iclass 27, count 0 2006.229.10:28:22.50#ibcon#read 6, iclass 27, count 0 2006.229.10:28:22.50#ibcon#end of sib2, iclass 27, count 0 2006.229.10:28:22.50#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:28:22.50#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:28:22.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:28:22.50#ibcon#*before write, iclass 27, count 0 2006.229.10:28:22.50#ibcon#enter sib2, iclass 27, count 0 2006.229.10:28:22.50#ibcon#flushed, iclass 27, count 0 2006.229.10:28:22.50#ibcon#about to write, iclass 27, count 0 2006.229.10:28:22.50#ibcon#wrote, iclass 27, count 0 2006.229.10:28:22.50#ibcon#about to read 3, iclass 27, count 0 2006.229.10:28:22.54#ibcon#read 3, iclass 27, count 0 2006.229.10:28:22.54#ibcon#about to read 4, iclass 27, count 0 2006.229.10:28:22.54#ibcon#read 4, iclass 27, count 0 2006.229.10:28:22.54#ibcon#about to read 5, iclass 27, count 0 2006.229.10:28:22.54#ibcon#read 5, iclass 27, count 0 2006.229.10:28:22.54#ibcon#about to read 6, iclass 27, count 0 2006.229.10:28:22.54#ibcon#read 6, iclass 27, count 0 2006.229.10:28:22.54#ibcon#end of sib2, iclass 27, count 0 2006.229.10:28:22.54#ibcon#*after write, iclass 27, count 0 2006.229.10:28:22.54#ibcon#*before return 0, iclass 27, count 0 2006.229.10:28:22.54#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:22.54#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:22.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:28:22.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:28:22.54$vck44/va=5,4 2006.229.10:28:22.54#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.10:28:22.54#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.10:28:22.54#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:22.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:22.60#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:22.60#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:22.60#ibcon#enter wrdev, iclass 29, count 2 2006.229.10:28:22.60#ibcon#first serial, iclass 29, count 2 2006.229.10:28:22.60#ibcon#enter sib2, iclass 29, count 2 2006.229.10:28:22.60#ibcon#flushed, iclass 29, count 2 2006.229.10:28:22.60#ibcon#about to write, iclass 29, count 2 2006.229.10:28:22.60#ibcon#wrote, iclass 29, count 2 2006.229.10:28:22.60#ibcon#about to read 3, iclass 29, count 2 2006.229.10:28:22.62#ibcon#read 3, iclass 29, count 2 2006.229.10:28:22.62#ibcon#about to read 4, iclass 29, count 2 2006.229.10:28:22.62#ibcon#read 4, iclass 29, count 2 2006.229.10:28:22.62#ibcon#about to read 5, iclass 29, count 2 2006.229.10:28:22.62#ibcon#read 5, iclass 29, count 2 2006.229.10:28:22.62#ibcon#about to read 6, iclass 29, count 2 2006.229.10:28:22.62#ibcon#read 6, iclass 29, count 2 2006.229.10:28:22.62#ibcon#end of sib2, iclass 29, count 2 2006.229.10:28:22.62#ibcon#*mode == 0, iclass 29, count 2 2006.229.10:28:22.62#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.10:28:22.62#ibcon#[25=AT05-04\r\n] 2006.229.10:28:22.62#ibcon#*before write, iclass 29, count 2 2006.229.10:28:22.62#ibcon#enter sib2, iclass 29, count 2 2006.229.10:28:22.62#ibcon#flushed, iclass 29, count 2 2006.229.10:28:22.62#ibcon#about to write, iclass 29, count 2 2006.229.10:28:22.62#ibcon#wrote, iclass 29, count 2 2006.229.10:28:22.62#ibcon#about to read 3, iclass 29, count 2 2006.229.10:28:22.65#ibcon#read 3, iclass 29, count 2 2006.229.10:28:22.65#ibcon#about to read 4, iclass 29, count 2 2006.229.10:28:22.65#ibcon#read 4, iclass 29, count 2 2006.229.10:28:22.65#ibcon#about to read 5, iclass 29, count 2 2006.229.10:28:22.65#ibcon#read 5, iclass 29, count 2 2006.229.10:28:22.65#ibcon#about to read 6, iclass 29, count 2 2006.229.10:28:22.65#ibcon#read 6, iclass 29, count 2 2006.229.10:28:22.65#ibcon#end of sib2, iclass 29, count 2 2006.229.10:28:22.65#ibcon#*after write, iclass 29, count 2 2006.229.10:28:22.65#ibcon#*before return 0, iclass 29, count 2 2006.229.10:28:22.65#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:22.65#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:22.65#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.10:28:22.65#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:22.65#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:22.77#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:22.77#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:22.77#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:28:22.77#ibcon#first serial, iclass 29, count 0 2006.229.10:28:22.77#ibcon#enter sib2, iclass 29, count 0 2006.229.10:28:22.77#ibcon#flushed, iclass 29, count 0 2006.229.10:28:22.77#ibcon#about to write, iclass 29, count 0 2006.229.10:28:22.77#ibcon#wrote, iclass 29, count 0 2006.229.10:28:22.77#ibcon#about to read 3, iclass 29, count 0 2006.229.10:28:22.79#ibcon#read 3, iclass 29, count 0 2006.229.10:28:22.79#ibcon#about to read 4, iclass 29, count 0 2006.229.10:28:22.79#ibcon#read 4, iclass 29, count 0 2006.229.10:28:22.79#ibcon#about to read 5, iclass 29, count 0 2006.229.10:28:22.79#ibcon#read 5, iclass 29, count 0 2006.229.10:28:22.79#ibcon#about to read 6, iclass 29, count 0 2006.229.10:28:22.79#ibcon#read 6, iclass 29, count 0 2006.229.10:28:22.79#ibcon#end of sib2, iclass 29, count 0 2006.229.10:28:22.79#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:28:22.79#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:28:22.79#ibcon#[25=USB\r\n] 2006.229.10:28:22.79#ibcon#*before write, iclass 29, count 0 2006.229.10:28:22.79#ibcon#enter sib2, iclass 29, count 0 2006.229.10:28:22.79#ibcon#flushed, iclass 29, count 0 2006.229.10:28:22.79#ibcon#about to write, iclass 29, count 0 2006.229.10:28:22.79#ibcon#wrote, iclass 29, count 0 2006.229.10:28:22.79#ibcon#about to read 3, iclass 29, count 0 2006.229.10:28:22.82#ibcon#read 3, iclass 29, count 0 2006.229.10:28:22.82#ibcon#about to read 4, iclass 29, count 0 2006.229.10:28:22.82#ibcon#read 4, iclass 29, count 0 2006.229.10:28:22.82#ibcon#about to read 5, iclass 29, count 0 2006.229.10:28:22.82#ibcon#read 5, iclass 29, count 0 2006.229.10:28:22.82#ibcon#about to read 6, iclass 29, count 0 2006.229.10:28:22.82#ibcon#read 6, iclass 29, count 0 2006.229.10:28:22.82#ibcon#end of sib2, iclass 29, count 0 2006.229.10:28:22.82#ibcon#*after write, iclass 29, count 0 2006.229.10:28:22.82#ibcon#*before return 0, iclass 29, count 0 2006.229.10:28:22.82#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:22.82#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:22.82#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:28:22.82#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:28:22.82$vck44/valo=6,814.99 2006.229.10:28:22.82#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.10:28:22.82#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.10:28:22.82#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:22.82#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:22.82#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:22.82#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:22.82#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:28:22.82#ibcon#first serial, iclass 31, count 0 2006.229.10:28:22.82#ibcon#enter sib2, iclass 31, count 0 2006.229.10:28:22.82#ibcon#flushed, iclass 31, count 0 2006.229.10:28:22.82#ibcon#about to write, iclass 31, count 0 2006.229.10:28:22.82#ibcon#wrote, iclass 31, count 0 2006.229.10:28:22.82#ibcon#about to read 3, iclass 31, count 0 2006.229.10:28:22.84#ibcon#read 3, iclass 31, count 0 2006.229.10:28:22.84#ibcon#about to read 4, iclass 31, count 0 2006.229.10:28:22.84#ibcon#read 4, iclass 31, count 0 2006.229.10:28:22.84#ibcon#about to read 5, iclass 31, count 0 2006.229.10:28:22.84#ibcon#read 5, iclass 31, count 0 2006.229.10:28:22.84#ibcon#about to read 6, iclass 31, count 0 2006.229.10:28:22.84#ibcon#read 6, iclass 31, count 0 2006.229.10:28:22.84#ibcon#end of sib2, iclass 31, count 0 2006.229.10:28:22.84#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:28:22.84#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:28:22.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:28:22.84#ibcon#*before write, iclass 31, count 0 2006.229.10:28:22.84#ibcon#enter sib2, iclass 31, count 0 2006.229.10:28:22.84#ibcon#flushed, iclass 31, count 0 2006.229.10:28:22.84#ibcon#about to write, iclass 31, count 0 2006.229.10:28:22.84#ibcon#wrote, iclass 31, count 0 2006.229.10:28:22.84#ibcon#about to read 3, iclass 31, count 0 2006.229.10:28:22.88#ibcon#read 3, iclass 31, count 0 2006.229.10:28:22.88#ibcon#about to read 4, iclass 31, count 0 2006.229.10:28:22.88#ibcon#read 4, iclass 31, count 0 2006.229.10:28:22.88#ibcon#about to read 5, iclass 31, count 0 2006.229.10:28:22.88#ibcon#read 5, iclass 31, count 0 2006.229.10:28:22.88#ibcon#about to read 6, iclass 31, count 0 2006.229.10:28:22.88#ibcon#read 6, iclass 31, count 0 2006.229.10:28:22.88#ibcon#end of sib2, iclass 31, count 0 2006.229.10:28:22.88#ibcon#*after write, iclass 31, count 0 2006.229.10:28:22.88#ibcon#*before return 0, iclass 31, count 0 2006.229.10:28:22.88#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:22.88#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:22.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:28:22.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:28:22.88$vck44/va=6,4 2006.229.10:28:22.88#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.10:28:22.88#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.10:28:22.88#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:22.88#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:22.94#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:22.94#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:22.94#ibcon#enter wrdev, iclass 33, count 2 2006.229.10:28:22.94#ibcon#first serial, iclass 33, count 2 2006.229.10:28:22.94#ibcon#enter sib2, iclass 33, count 2 2006.229.10:28:22.94#ibcon#flushed, iclass 33, count 2 2006.229.10:28:22.94#ibcon#about to write, iclass 33, count 2 2006.229.10:28:22.94#ibcon#wrote, iclass 33, count 2 2006.229.10:28:22.94#ibcon#about to read 3, iclass 33, count 2 2006.229.10:28:22.96#ibcon#read 3, iclass 33, count 2 2006.229.10:28:22.96#ibcon#about to read 4, iclass 33, count 2 2006.229.10:28:22.96#ibcon#read 4, iclass 33, count 2 2006.229.10:28:22.96#ibcon#about to read 5, iclass 33, count 2 2006.229.10:28:22.96#ibcon#read 5, iclass 33, count 2 2006.229.10:28:22.96#ibcon#about to read 6, iclass 33, count 2 2006.229.10:28:22.96#ibcon#read 6, iclass 33, count 2 2006.229.10:28:22.96#ibcon#end of sib2, iclass 33, count 2 2006.229.10:28:22.96#ibcon#*mode == 0, iclass 33, count 2 2006.229.10:28:22.96#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.10:28:22.96#ibcon#[25=AT06-04\r\n] 2006.229.10:28:22.96#ibcon#*before write, iclass 33, count 2 2006.229.10:28:22.96#ibcon#enter sib2, iclass 33, count 2 2006.229.10:28:22.96#ibcon#flushed, iclass 33, count 2 2006.229.10:28:22.96#ibcon#about to write, iclass 33, count 2 2006.229.10:28:22.96#ibcon#wrote, iclass 33, count 2 2006.229.10:28:22.96#ibcon#about to read 3, iclass 33, count 2 2006.229.10:28:22.99#ibcon#read 3, iclass 33, count 2 2006.229.10:28:22.99#ibcon#about to read 4, iclass 33, count 2 2006.229.10:28:22.99#ibcon#read 4, iclass 33, count 2 2006.229.10:28:22.99#ibcon#about to read 5, iclass 33, count 2 2006.229.10:28:22.99#ibcon#read 5, iclass 33, count 2 2006.229.10:28:22.99#ibcon#about to read 6, iclass 33, count 2 2006.229.10:28:22.99#ibcon#read 6, iclass 33, count 2 2006.229.10:28:22.99#ibcon#end of sib2, iclass 33, count 2 2006.229.10:28:22.99#ibcon#*after write, iclass 33, count 2 2006.229.10:28:22.99#ibcon#*before return 0, iclass 33, count 2 2006.229.10:28:22.99#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:22.99#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:22.99#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.10:28:22.99#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:22.99#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:23.11#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:23.11#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:23.11#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:28:23.11#ibcon#first serial, iclass 33, count 0 2006.229.10:28:23.11#ibcon#enter sib2, iclass 33, count 0 2006.229.10:28:23.11#ibcon#flushed, iclass 33, count 0 2006.229.10:28:23.11#ibcon#about to write, iclass 33, count 0 2006.229.10:28:23.11#ibcon#wrote, iclass 33, count 0 2006.229.10:28:23.11#ibcon#about to read 3, iclass 33, count 0 2006.229.10:28:23.13#ibcon#read 3, iclass 33, count 0 2006.229.10:28:23.13#ibcon#about to read 4, iclass 33, count 0 2006.229.10:28:23.13#ibcon#read 4, iclass 33, count 0 2006.229.10:28:23.13#ibcon#about to read 5, iclass 33, count 0 2006.229.10:28:23.13#ibcon#read 5, iclass 33, count 0 2006.229.10:28:23.13#ibcon#about to read 6, iclass 33, count 0 2006.229.10:28:23.13#ibcon#read 6, iclass 33, count 0 2006.229.10:28:23.13#ibcon#end of sib2, iclass 33, count 0 2006.229.10:28:23.13#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:28:23.13#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:28:23.13#ibcon#[25=USB\r\n] 2006.229.10:28:23.13#ibcon#*before write, iclass 33, count 0 2006.229.10:28:23.13#ibcon#enter sib2, iclass 33, count 0 2006.229.10:28:23.13#ibcon#flushed, iclass 33, count 0 2006.229.10:28:23.13#ibcon#about to write, iclass 33, count 0 2006.229.10:28:23.13#ibcon#wrote, iclass 33, count 0 2006.229.10:28:23.13#ibcon#about to read 3, iclass 33, count 0 2006.229.10:28:23.16#ibcon#read 3, iclass 33, count 0 2006.229.10:28:23.16#ibcon#about to read 4, iclass 33, count 0 2006.229.10:28:23.16#ibcon#read 4, iclass 33, count 0 2006.229.10:28:23.16#ibcon#about to read 5, iclass 33, count 0 2006.229.10:28:23.16#ibcon#read 5, iclass 33, count 0 2006.229.10:28:23.16#ibcon#about to read 6, iclass 33, count 0 2006.229.10:28:23.16#ibcon#read 6, iclass 33, count 0 2006.229.10:28:23.16#ibcon#end of sib2, iclass 33, count 0 2006.229.10:28:23.16#ibcon#*after write, iclass 33, count 0 2006.229.10:28:23.16#ibcon#*before return 0, iclass 33, count 0 2006.229.10:28:23.16#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:23.16#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:23.16#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:28:23.16#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:28:23.16$vck44/valo=7,864.99 2006.229.10:28:23.16#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.10:28:23.16#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.10:28:23.16#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:23.16#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:23.16#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:23.16#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:23.16#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:28:23.16#ibcon#first serial, iclass 35, count 0 2006.229.10:28:23.16#ibcon#enter sib2, iclass 35, count 0 2006.229.10:28:23.16#ibcon#flushed, iclass 35, count 0 2006.229.10:28:23.16#ibcon#about to write, iclass 35, count 0 2006.229.10:28:23.16#ibcon#wrote, iclass 35, count 0 2006.229.10:28:23.16#ibcon#about to read 3, iclass 35, count 0 2006.229.10:28:23.18#ibcon#read 3, iclass 35, count 0 2006.229.10:28:23.18#ibcon#about to read 4, iclass 35, count 0 2006.229.10:28:23.18#ibcon#read 4, iclass 35, count 0 2006.229.10:28:23.18#ibcon#about to read 5, iclass 35, count 0 2006.229.10:28:23.18#ibcon#read 5, iclass 35, count 0 2006.229.10:28:23.18#ibcon#about to read 6, iclass 35, count 0 2006.229.10:28:23.18#ibcon#read 6, iclass 35, count 0 2006.229.10:28:23.18#ibcon#end of sib2, iclass 35, count 0 2006.229.10:28:23.18#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:28:23.18#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:28:23.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:28:23.18#ibcon#*before write, iclass 35, count 0 2006.229.10:28:23.18#ibcon#enter sib2, iclass 35, count 0 2006.229.10:28:23.18#ibcon#flushed, iclass 35, count 0 2006.229.10:28:23.18#ibcon#about to write, iclass 35, count 0 2006.229.10:28:23.18#ibcon#wrote, iclass 35, count 0 2006.229.10:28:23.18#ibcon#about to read 3, iclass 35, count 0 2006.229.10:28:23.22#ibcon#read 3, iclass 35, count 0 2006.229.10:28:23.22#ibcon#about to read 4, iclass 35, count 0 2006.229.10:28:23.22#ibcon#read 4, iclass 35, count 0 2006.229.10:28:23.22#ibcon#about to read 5, iclass 35, count 0 2006.229.10:28:23.22#ibcon#read 5, iclass 35, count 0 2006.229.10:28:23.22#ibcon#about to read 6, iclass 35, count 0 2006.229.10:28:23.22#ibcon#read 6, iclass 35, count 0 2006.229.10:28:23.22#ibcon#end of sib2, iclass 35, count 0 2006.229.10:28:23.22#ibcon#*after write, iclass 35, count 0 2006.229.10:28:23.22#ibcon#*before return 0, iclass 35, count 0 2006.229.10:28:23.22#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:23.22#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:23.22#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:28:23.22#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:28:23.22$vck44/va=7,5 2006.229.10:28:23.22#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.10:28:23.22#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.10:28:23.22#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:23.22#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:23.28#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:23.28#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:23.28#ibcon#enter wrdev, iclass 37, count 2 2006.229.10:28:23.28#ibcon#first serial, iclass 37, count 2 2006.229.10:28:23.28#ibcon#enter sib2, iclass 37, count 2 2006.229.10:28:23.28#ibcon#flushed, iclass 37, count 2 2006.229.10:28:23.28#ibcon#about to write, iclass 37, count 2 2006.229.10:28:23.28#ibcon#wrote, iclass 37, count 2 2006.229.10:28:23.28#ibcon#about to read 3, iclass 37, count 2 2006.229.10:28:23.30#ibcon#read 3, iclass 37, count 2 2006.229.10:28:23.30#ibcon#about to read 4, iclass 37, count 2 2006.229.10:28:23.30#ibcon#read 4, iclass 37, count 2 2006.229.10:28:23.30#ibcon#about to read 5, iclass 37, count 2 2006.229.10:28:23.30#ibcon#read 5, iclass 37, count 2 2006.229.10:28:23.30#ibcon#about to read 6, iclass 37, count 2 2006.229.10:28:23.30#ibcon#read 6, iclass 37, count 2 2006.229.10:28:23.30#ibcon#end of sib2, iclass 37, count 2 2006.229.10:28:23.30#ibcon#*mode == 0, iclass 37, count 2 2006.229.10:28:23.30#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.10:28:23.30#ibcon#[25=AT07-05\r\n] 2006.229.10:28:23.30#ibcon#*before write, iclass 37, count 2 2006.229.10:28:23.30#ibcon#enter sib2, iclass 37, count 2 2006.229.10:28:23.30#ibcon#flushed, iclass 37, count 2 2006.229.10:28:23.30#ibcon#about to write, iclass 37, count 2 2006.229.10:28:23.30#ibcon#wrote, iclass 37, count 2 2006.229.10:28:23.30#ibcon#about to read 3, iclass 37, count 2 2006.229.10:28:23.33#ibcon#read 3, iclass 37, count 2 2006.229.10:28:23.33#ibcon#about to read 4, iclass 37, count 2 2006.229.10:28:23.33#ibcon#read 4, iclass 37, count 2 2006.229.10:28:23.33#ibcon#about to read 5, iclass 37, count 2 2006.229.10:28:23.33#ibcon#read 5, iclass 37, count 2 2006.229.10:28:23.33#ibcon#about to read 6, iclass 37, count 2 2006.229.10:28:23.33#ibcon#read 6, iclass 37, count 2 2006.229.10:28:23.33#ibcon#end of sib2, iclass 37, count 2 2006.229.10:28:23.33#ibcon#*after write, iclass 37, count 2 2006.229.10:28:23.33#ibcon#*before return 0, iclass 37, count 2 2006.229.10:28:23.33#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:23.33#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:23.33#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.10:28:23.33#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:23.33#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:23.45#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:23.45#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:23.45#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:28:23.45#ibcon#first serial, iclass 37, count 0 2006.229.10:28:23.45#ibcon#enter sib2, iclass 37, count 0 2006.229.10:28:23.45#ibcon#flushed, iclass 37, count 0 2006.229.10:28:23.45#ibcon#about to write, iclass 37, count 0 2006.229.10:28:23.45#ibcon#wrote, iclass 37, count 0 2006.229.10:28:23.45#ibcon#about to read 3, iclass 37, count 0 2006.229.10:28:23.47#ibcon#read 3, iclass 37, count 0 2006.229.10:28:23.47#ibcon#about to read 4, iclass 37, count 0 2006.229.10:28:23.47#ibcon#read 4, iclass 37, count 0 2006.229.10:28:23.47#ibcon#about to read 5, iclass 37, count 0 2006.229.10:28:23.47#ibcon#read 5, iclass 37, count 0 2006.229.10:28:23.47#ibcon#about to read 6, iclass 37, count 0 2006.229.10:28:23.47#ibcon#read 6, iclass 37, count 0 2006.229.10:28:23.47#ibcon#end of sib2, iclass 37, count 0 2006.229.10:28:23.47#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:28:23.47#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:28:23.47#ibcon#[25=USB\r\n] 2006.229.10:28:23.47#ibcon#*before write, iclass 37, count 0 2006.229.10:28:23.47#ibcon#enter sib2, iclass 37, count 0 2006.229.10:28:23.47#ibcon#flushed, iclass 37, count 0 2006.229.10:28:23.47#ibcon#about to write, iclass 37, count 0 2006.229.10:28:23.47#ibcon#wrote, iclass 37, count 0 2006.229.10:28:23.47#ibcon#about to read 3, iclass 37, count 0 2006.229.10:28:23.50#ibcon#read 3, iclass 37, count 0 2006.229.10:28:23.50#ibcon#about to read 4, iclass 37, count 0 2006.229.10:28:23.50#ibcon#read 4, iclass 37, count 0 2006.229.10:28:23.50#ibcon#about to read 5, iclass 37, count 0 2006.229.10:28:23.50#ibcon#read 5, iclass 37, count 0 2006.229.10:28:23.50#ibcon#about to read 6, iclass 37, count 0 2006.229.10:28:23.50#ibcon#read 6, iclass 37, count 0 2006.229.10:28:23.50#ibcon#end of sib2, iclass 37, count 0 2006.229.10:28:23.50#ibcon#*after write, iclass 37, count 0 2006.229.10:28:23.50#ibcon#*before return 0, iclass 37, count 0 2006.229.10:28:23.50#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:23.50#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:23.50#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:28:23.50#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:28:23.50$vck44/valo=8,884.99 2006.229.10:28:23.50#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.10:28:23.50#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.10:28:23.50#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:23.50#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:23.50#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:23.50#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:23.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:28:23.50#ibcon#first serial, iclass 39, count 0 2006.229.10:28:23.50#ibcon#enter sib2, iclass 39, count 0 2006.229.10:28:23.50#ibcon#flushed, iclass 39, count 0 2006.229.10:28:23.50#ibcon#about to write, iclass 39, count 0 2006.229.10:28:23.50#ibcon#wrote, iclass 39, count 0 2006.229.10:28:23.50#ibcon#about to read 3, iclass 39, count 0 2006.229.10:28:23.52#ibcon#read 3, iclass 39, count 0 2006.229.10:28:23.52#ibcon#about to read 4, iclass 39, count 0 2006.229.10:28:23.52#ibcon#read 4, iclass 39, count 0 2006.229.10:28:23.52#ibcon#about to read 5, iclass 39, count 0 2006.229.10:28:23.52#ibcon#read 5, iclass 39, count 0 2006.229.10:28:23.52#ibcon#about to read 6, iclass 39, count 0 2006.229.10:28:23.52#ibcon#read 6, iclass 39, count 0 2006.229.10:28:23.52#ibcon#end of sib2, iclass 39, count 0 2006.229.10:28:23.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:28:23.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:28:23.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:28:23.52#ibcon#*before write, iclass 39, count 0 2006.229.10:28:23.52#ibcon#enter sib2, iclass 39, count 0 2006.229.10:28:23.52#ibcon#flushed, iclass 39, count 0 2006.229.10:28:23.52#ibcon#about to write, iclass 39, count 0 2006.229.10:28:23.52#ibcon#wrote, iclass 39, count 0 2006.229.10:28:23.52#ibcon#about to read 3, iclass 39, count 0 2006.229.10:28:23.56#ibcon#read 3, iclass 39, count 0 2006.229.10:28:23.56#ibcon#about to read 4, iclass 39, count 0 2006.229.10:28:23.56#ibcon#read 4, iclass 39, count 0 2006.229.10:28:23.56#ibcon#about to read 5, iclass 39, count 0 2006.229.10:28:23.56#ibcon#read 5, iclass 39, count 0 2006.229.10:28:23.56#ibcon#about to read 6, iclass 39, count 0 2006.229.10:28:23.56#ibcon#read 6, iclass 39, count 0 2006.229.10:28:23.56#ibcon#end of sib2, iclass 39, count 0 2006.229.10:28:23.56#ibcon#*after write, iclass 39, count 0 2006.229.10:28:23.56#ibcon#*before return 0, iclass 39, count 0 2006.229.10:28:23.56#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:23.56#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:23.56#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:28:23.56#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:28:23.56$vck44/va=8,6 2006.229.10:28:23.56#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.10:28:23.56#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.10:28:23.56#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:23.56#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.10:28:23.62#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.10:28:23.62#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.10:28:23.62#ibcon#enter wrdev, iclass 3, count 2 2006.229.10:28:23.62#ibcon#first serial, iclass 3, count 2 2006.229.10:28:23.62#ibcon#enter sib2, iclass 3, count 2 2006.229.10:28:23.62#ibcon#flushed, iclass 3, count 2 2006.229.10:28:23.62#ibcon#about to write, iclass 3, count 2 2006.229.10:28:23.62#ibcon#wrote, iclass 3, count 2 2006.229.10:28:23.62#ibcon#about to read 3, iclass 3, count 2 2006.229.10:28:23.64#ibcon#read 3, iclass 3, count 2 2006.229.10:28:23.64#ibcon#about to read 4, iclass 3, count 2 2006.229.10:28:23.64#ibcon#read 4, iclass 3, count 2 2006.229.10:28:23.64#ibcon#about to read 5, iclass 3, count 2 2006.229.10:28:23.64#ibcon#read 5, iclass 3, count 2 2006.229.10:28:23.64#ibcon#about to read 6, iclass 3, count 2 2006.229.10:28:23.64#ibcon#read 6, iclass 3, count 2 2006.229.10:28:23.64#ibcon#end of sib2, iclass 3, count 2 2006.229.10:28:23.64#ibcon#*mode == 0, iclass 3, count 2 2006.229.10:28:23.64#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.10:28:23.64#ibcon#[25=AT08-06\r\n] 2006.229.10:28:23.64#ibcon#*before write, iclass 3, count 2 2006.229.10:28:23.64#ibcon#enter sib2, iclass 3, count 2 2006.229.10:28:23.64#ibcon#flushed, iclass 3, count 2 2006.229.10:28:23.64#ibcon#about to write, iclass 3, count 2 2006.229.10:28:23.64#ibcon#wrote, iclass 3, count 2 2006.229.10:28:23.64#ibcon#about to read 3, iclass 3, count 2 2006.229.10:28:23.67#ibcon#read 3, iclass 3, count 2 2006.229.10:28:23.67#ibcon#about to read 4, iclass 3, count 2 2006.229.10:28:23.67#ibcon#read 4, iclass 3, count 2 2006.229.10:28:23.67#ibcon#about to read 5, iclass 3, count 2 2006.229.10:28:23.67#ibcon#read 5, iclass 3, count 2 2006.229.10:28:23.67#ibcon#about to read 6, iclass 3, count 2 2006.229.10:28:23.67#ibcon#read 6, iclass 3, count 2 2006.229.10:28:23.67#ibcon#end of sib2, iclass 3, count 2 2006.229.10:28:23.67#ibcon#*after write, iclass 3, count 2 2006.229.10:28:23.67#ibcon#*before return 0, iclass 3, count 2 2006.229.10:28:23.67#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.10:28:23.67#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.10:28:23.67#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.10:28:23.67#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:23.67#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.10:28:23.79#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.10:28:23.79#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.10:28:23.79#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:28:23.79#ibcon#first serial, iclass 3, count 0 2006.229.10:28:23.79#ibcon#enter sib2, iclass 3, count 0 2006.229.10:28:23.79#ibcon#flushed, iclass 3, count 0 2006.229.10:28:23.79#ibcon#about to write, iclass 3, count 0 2006.229.10:28:23.79#ibcon#wrote, iclass 3, count 0 2006.229.10:28:23.79#ibcon#about to read 3, iclass 3, count 0 2006.229.10:28:23.81#ibcon#read 3, iclass 3, count 0 2006.229.10:28:23.81#ibcon#about to read 4, iclass 3, count 0 2006.229.10:28:23.81#ibcon#read 4, iclass 3, count 0 2006.229.10:28:23.81#ibcon#about to read 5, iclass 3, count 0 2006.229.10:28:23.81#ibcon#read 5, iclass 3, count 0 2006.229.10:28:23.81#ibcon#about to read 6, iclass 3, count 0 2006.229.10:28:23.81#ibcon#read 6, iclass 3, count 0 2006.229.10:28:23.81#ibcon#end of sib2, iclass 3, count 0 2006.229.10:28:23.81#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:28:23.81#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:28:23.81#ibcon#[25=USB\r\n] 2006.229.10:28:23.81#ibcon#*before write, iclass 3, count 0 2006.229.10:28:23.81#ibcon#enter sib2, iclass 3, count 0 2006.229.10:28:23.81#ibcon#flushed, iclass 3, count 0 2006.229.10:28:23.81#ibcon#about to write, iclass 3, count 0 2006.229.10:28:23.81#ibcon#wrote, iclass 3, count 0 2006.229.10:28:23.81#ibcon#about to read 3, iclass 3, count 0 2006.229.10:28:23.84#ibcon#read 3, iclass 3, count 0 2006.229.10:28:23.84#ibcon#about to read 4, iclass 3, count 0 2006.229.10:28:23.84#ibcon#read 4, iclass 3, count 0 2006.229.10:28:23.84#ibcon#about to read 5, iclass 3, count 0 2006.229.10:28:23.84#ibcon#read 5, iclass 3, count 0 2006.229.10:28:23.84#ibcon#about to read 6, iclass 3, count 0 2006.229.10:28:23.84#ibcon#read 6, iclass 3, count 0 2006.229.10:28:23.84#ibcon#end of sib2, iclass 3, count 0 2006.229.10:28:23.84#ibcon#*after write, iclass 3, count 0 2006.229.10:28:23.84#ibcon#*before return 0, iclass 3, count 0 2006.229.10:28:23.84#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.10:28:23.84#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.10:28:23.84#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:28:23.84#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:28:23.84$vck44/vblo=1,629.99 2006.229.10:28:23.84#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.10:28:23.84#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.10:28:23.84#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:23.84#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:23.84#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:23.84#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:23.84#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:28:23.84#ibcon#first serial, iclass 5, count 0 2006.229.10:28:23.84#ibcon#enter sib2, iclass 5, count 0 2006.229.10:28:23.84#ibcon#flushed, iclass 5, count 0 2006.229.10:28:23.84#ibcon#about to write, iclass 5, count 0 2006.229.10:28:23.84#ibcon#wrote, iclass 5, count 0 2006.229.10:28:23.84#ibcon#about to read 3, iclass 5, count 0 2006.229.10:28:23.86#ibcon#read 3, iclass 5, count 0 2006.229.10:28:23.86#ibcon#about to read 4, iclass 5, count 0 2006.229.10:28:23.86#ibcon#read 4, iclass 5, count 0 2006.229.10:28:23.86#ibcon#about to read 5, iclass 5, count 0 2006.229.10:28:23.86#ibcon#read 5, iclass 5, count 0 2006.229.10:28:23.86#ibcon#about to read 6, iclass 5, count 0 2006.229.10:28:23.86#ibcon#read 6, iclass 5, count 0 2006.229.10:28:23.86#ibcon#end of sib2, iclass 5, count 0 2006.229.10:28:23.86#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:28:23.86#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:28:23.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:28:23.86#ibcon#*before write, iclass 5, count 0 2006.229.10:28:23.86#ibcon#enter sib2, iclass 5, count 0 2006.229.10:28:23.86#ibcon#flushed, iclass 5, count 0 2006.229.10:28:23.86#ibcon#about to write, iclass 5, count 0 2006.229.10:28:23.86#ibcon#wrote, iclass 5, count 0 2006.229.10:28:23.86#ibcon#about to read 3, iclass 5, count 0 2006.229.10:28:23.90#ibcon#read 3, iclass 5, count 0 2006.229.10:28:23.90#ibcon#about to read 4, iclass 5, count 0 2006.229.10:28:23.90#ibcon#read 4, iclass 5, count 0 2006.229.10:28:23.90#ibcon#about to read 5, iclass 5, count 0 2006.229.10:28:23.90#ibcon#read 5, iclass 5, count 0 2006.229.10:28:23.90#ibcon#about to read 6, iclass 5, count 0 2006.229.10:28:23.90#ibcon#read 6, iclass 5, count 0 2006.229.10:28:23.90#ibcon#end of sib2, iclass 5, count 0 2006.229.10:28:23.90#ibcon#*after write, iclass 5, count 0 2006.229.10:28:23.90#ibcon#*before return 0, iclass 5, count 0 2006.229.10:28:23.90#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:23.90#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.10:28:23.90#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:28:23.90#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:28:23.90$vck44/vb=1,4 2006.229.10:28:23.90#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.10:28:23.90#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.10:28:23.90#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:23.90#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:23.90#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:23.90#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:23.90#ibcon#enter wrdev, iclass 7, count 2 2006.229.10:28:23.90#ibcon#first serial, iclass 7, count 2 2006.229.10:28:23.90#ibcon#enter sib2, iclass 7, count 2 2006.229.10:28:23.90#ibcon#flushed, iclass 7, count 2 2006.229.10:28:23.90#ibcon#about to write, iclass 7, count 2 2006.229.10:28:23.90#ibcon#wrote, iclass 7, count 2 2006.229.10:28:23.90#ibcon#about to read 3, iclass 7, count 2 2006.229.10:28:23.92#ibcon#read 3, iclass 7, count 2 2006.229.10:28:23.92#ibcon#about to read 4, iclass 7, count 2 2006.229.10:28:23.92#ibcon#read 4, iclass 7, count 2 2006.229.10:28:23.92#ibcon#about to read 5, iclass 7, count 2 2006.229.10:28:23.92#ibcon#read 5, iclass 7, count 2 2006.229.10:28:23.92#ibcon#about to read 6, iclass 7, count 2 2006.229.10:28:23.92#ibcon#read 6, iclass 7, count 2 2006.229.10:28:23.92#ibcon#end of sib2, iclass 7, count 2 2006.229.10:28:23.92#ibcon#*mode == 0, iclass 7, count 2 2006.229.10:28:23.92#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.10:28:23.92#ibcon#[27=AT01-04\r\n] 2006.229.10:28:23.92#ibcon#*before write, iclass 7, count 2 2006.229.10:28:23.92#ibcon#enter sib2, iclass 7, count 2 2006.229.10:28:23.92#ibcon#flushed, iclass 7, count 2 2006.229.10:28:23.92#ibcon#about to write, iclass 7, count 2 2006.229.10:28:23.92#ibcon#wrote, iclass 7, count 2 2006.229.10:28:23.92#ibcon#about to read 3, iclass 7, count 2 2006.229.10:28:23.95#ibcon#read 3, iclass 7, count 2 2006.229.10:28:23.95#ibcon#about to read 4, iclass 7, count 2 2006.229.10:28:23.95#ibcon#read 4, iclass 7, count 2 2006.229.10:28:23.95#ibcon#about to read 5, iclass 7, count 2 2006.229.10:28:23.95#ibcon#read 5, iclass 7, count 2 2006.229.10:28:23.95#ibcon#about to read 6, iclass 7, count 2 2006.229.10:28:23.95#ibcon#read 6, iclass 7, count 2 2006.229.10:28:23.95#ibcon#end of sib2, iclass 7, count 2 2006.229.10:28:23.95#ibcon#*after write, iclass 7, count 2 2006.229.10:28:23.95#ibcon#*before return 0, iclass 7, count 2 2006.229.10:28:23.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:23.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.10:28:23.95#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.10:28:23.95#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:23.95#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:24.07#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:24.07#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:24.07#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:28:24.07#ibcon#first serial, iclass 7, count 0 2006.229.10:28:24.07#ibcon#enter sib2, iclass 7, count 0 2006.229.10:28:24.07#ibcon#flushed, iclass 7, count 0 2006.229.10:28:24.07#ibcon#about to write, iclass 7, count 0 2006.229.10:28:24.07#ibcon#wrote, iclass 7, count 0 2006.229.10:28:24.07#ibcon#about to read 3, iclass 7, count 0 2006.229.10:28:24.09#ibcon#read 3, iclass 7, count 0 2006.229.10:28:24.09#ibcon#about to read 4, iclass 7, count 0 2006.229.10:28:24.09#ibcon#read 4, iclass 7, count 0 2006.229.10:28:24.09#ibcon#about to read 5, iclass 7, count 0 2006.229.10:28:24.09#ibcon#read 5, iclass 7, count 0 2006.229.10:28:24.09#ibcon#about to read 6, iclass 7, count 0 2006.229.10:28:24.09#ibcon#read 6, iclass 7, count 0 2006.229.10:28:24.09#ibcon#end of sib2, iclass 7, count 0 2006.229.10:28:24.09#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:28:24.09#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:28:24.09#ibcon#[27=USB\r\n] 2006.229.10:28:24.09#ibcon#*before write, iclass 7, count 0 2006.229.10:28:24.09#ibcon#enter sib2, iclass 7, count 0 2006.229.10:28:24.09#ibcon#flushed, iclass 7, count 0 2006.229.10:28:24.09#ibcon#about to write, iclass 7, count 0 2006.229.10:28:24.09#ibcon#wrote, iclass 7, count 0 2006.229.10:28:24.09#ibcon#about to read 3, iclass 7, count 0 2006.229.10:28:24.12#ibcon#read 3, iclass 7, count 0 2006.229.10:28:24.12#ibcon#about to read 4, iclass 7, count 0 2006.229.10:28:24.12#ibcon#read 4, iclass 7, count 0 2006.229.10:28:24.12#ibcon#about to read 5, iclass 7, count 0 2006.229.10:28:24.12#ibcon#read 5, iclass 7, count 0 2006.229.10:28:24.12#ibcon#about to read 6, iclass 7, count 0 2006.229.10:28:24.12#ibcon#read 6, iclass 7, count 0 2006.229.10:28:24.12#ibcon#end of sib2, iclass 7, count 0 2006.229.10:28:24.12#ibcon#*after write, iclass 7, count 0 2006.229.10:28:24.12#ibcon#*before return 0, iclass 7, count 0 2006.229.10:28:24.12#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:24.12#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.10:28:24.12#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:28:24.12#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:28:24.12$vck44/vblo=2,634.99 2006.229.10:28:24.12#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.10:28:24.12#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.10:28:24.12#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:24.12#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:24.12#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:24.12#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:24.12#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:28:24.12#ibcon#first serial, iclass 11, count 0 2006.229.10:28:24.12#ibcon#enter sib2, iclass 11, count 0 2006.229.10:28:24.12#ibcon#flushed, iclass 11, count 0 2006.229.10:28:24.12#ibcon#about to write, iclass 11, count 0 2006.229.10:28:24.12#ibcon#wrote, iclass 11, count 0 2006.229.10:28:24.12#ibcon#about to read 3, iclass 11, count 0 2006.229.10:28:24.14#ibcon#read 3, iclass 11, count 0 2006.229.10:28:24.14#ibcon#about to read 4, iclass 11, count 0 2006.229.10:28:24.14#ibcon#read 4, iclass 11, count 0 2006.229.10:28:24.14#ibcon#about to read 5, iclass 11, count 0 2006.229.10:28:24.14#ibcon#read 5, iclass 11, count 0 2006.229.10:28:24.14#ibcon#about to read 6, iclass 11, count 0 2006.229.10:28:24.14#ibcon#read 6, iclass 11, count 0 2006.229.10:28:24.14#ibcon#end of sib2, iclass 11, count 0 2006.229.10:28:24.14#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:28:24.14#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:28:24.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:28:24.14#ibcon#*before write, iclass 11, count 0 2006.229.10:28:24.14#ibcon#enter sib2, iclass 11, count 0 2006.229.10:28:24.14#ibcon#flushed, iclass 11, count 0 2006.229.10:28:24.14#ibcon#about to write, iclass 11, count 0 2006.229.10:28:24.14#ibcon#wrote, iclass 11, count 0 2006.229.10:28:24.14#ibcon#about to read 3, iclass 11, count 0 2006.229.10:28:24.18#ibcon#read 3, iclass 11, count 0 2006.229.10:28:24.18#ibcon#about to read 4, iclass 11, count 0 2006.229.10:28:24.18#ibcon#read 4, iclass 11, count 0 2006.229.10:28:24.18#ibcon#about to read 5, iclass 11, count 0 2006.229.10:28:24.18#ibcon#read 5, iclass 11, count 0 2006.229.10:28:24.18#ibcon#about to read 6, iclass 11, count 0 2006.229.10:28:24.18#ibcon#read 6, iclass 11, count 0 2006.229.10:28:24.18#ibcon#end of sib2, iclass 11, count 0 2006.229.10:28:24.18#ibcon#*after write, iclass 11, count 0 2006.229.10:28:24.18#ibcon#*before return 0, iclass 11, count 0 2006.229.10:28:24.18#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:24.18#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.10:28:24.18#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:28:24.18#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:28:24.18$vck44/vb=2,4 2006.229.10:28:24.18#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.10:28:24.18#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.10:28:24.18#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:24.18#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:24.24#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:24.24#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:24.24#ibcon#enter wrdev, iclass 13, count 2 2006.229.10:28:24.24#ibcon#first serial, iclass 13, count 2 2006.229.10:28:24.24#ibcon#enter sib2, iclass 13, count 2 2006.229.10:28:24.24#ibcon#flushed, iclass 13, count 2 2006.229.10:28:24.24#ibcon#about to write, iclass 13, count 2 2006.229.10:28:24.24#ibcon#wrote, iclass 13, count 2 2006.229.10:28:24.24#ibcon#about to read 3, iclass 13, count 2 2006.229.10:28:24.26#ibcon#read 3, iclass 13, count 2 2006.229.10:28:24.26#ibcon#about to read 4, iclass 13, count 2 2006.229.10:28:24.26#ibcon#read 4, iclass 13, count 2 2006.229.10:28:24.26#ibcon#about to read 5, iclass 13, count 2 2006.229.10:28:24.26#ibcon#read 5, iclass 13, count 2 2006.229.10:28:24.26#ibcon#about to read 6, iclass 13, count 2 2006.229.10:28:24.26#ibcon#read 6, iclass 13, count 2 2006.229.10:28:24.26#ibcon#end of sib2, iclass 13, count 2 2006.229.10:28:24.26#ibcon#*mode == 0, iclass 13, count 2 2006.229.10:28:24.26#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.10:28:24.26#ibcon#[27=AT02-04\r\n] 2006.229.10:28:24.26#ibcon#*before write, iclass 13, count 2 2006.229.10:28:24.26#ibcon#enter sib2, iclass 13, count 2 2006.229.10:28:24.26#ibcon#flushed, iclass 13, count 2 2006.229.10:28:24.26#ibcon#about to write, iclass 13, count 2 2006.229.10:28:24.26#ibcon#wrote, iclass 13, count 2 2006.229.10:28:24.26#ibcon#about to read 3, iclass 13, count 2 2006.229.10:28:24.29#ibcon#read 3, iclass 13, count 2 2006.229.10:28:24.29#ibcon#about to read 4, iclass 13, count 2 2006.229.10:28:24.29#ibcon#read 4, iclass 13, count 2 2006.229.10:28:24.29#ibcon#about to read 5, iclass 13, count 2 2006.229.10:28:24.29#ibcon#read 5, iclass 13, count 2 2006.229.10:28:24.29#ibcon#about to read 6, iclass 13, count 2 2006.229.10:28:24.29#ibcon#read 6, iclass 13, count 2 2006.229.10:28:24.29#ibcon#end of sib2, iclass 13, count 2 2006.229.10:28:24.29#ibcon#*after write, iclass 13, count 2 2006.229.10:28:24.29#ibcon#*before return 0, iclass 13, count 2 2006.229.10:28:24.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:24.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:28:24.29#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.10:28:24.29#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:24.29#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:24.41#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:24.41#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:24.41#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:28:24.41#ibcon#first serial, iclass 13, count 0 2006.229.10:28:24.41#ibcon#enter sib2, iclass 13, count 0 2006.229.10:28:24.41#ibcon#flushed, iclass 13, count 0 2006.229.10:28:24.41#ibcon#about to write, iclass 13, count 0 2006.229.10:28:24.41#ibcon#wrote, iclass 13, count 0 2006.229.10:28:24.41#ibcon#about to read 3, iclass 13, count 0 2006.229.10:28:24.43#ibcon#read 3, iclass 13, count 0 2006.229.10:28:24.43#ibcon#about to read 4, iclass 13, count 0 2006.229.10:28:24.43#ibcon#read 4, iclass 13, count 0 2006.229.10:28:24.43#ibcon#about to read 5, iclass 13, count 0 2006.229.10:28:24.43#ibcon#read 5, iclass 13, count 0 2006.229.10:28:24.43#ibcon#about to read 6, iclass 13, count 0 2006.229.10:28:24.43#ibcon#read 6, iclass 13, count 0 2006.229.10:28:24.43#ibcon#end of sib2, iclass 13, count 0 2006.229.10:28:24.43#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:28:24.43#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:28:24.43#ibcon#[27=USB\r\n] 2006.229.10:28:24.43#ibcon#*before write, iclass 13, count 0 2006.229.10:28:24.43#ibcon#enter sib2, iclass 13, count 0 2006.229.10:28:24.43#ibcon#flushed, iclass 13, count 0 2006.229.10:28:24.43#ibcon#about to write, iclass 13, count 0 2006.229.10:28:24.43#ibcon#wrote, iclass 13, count 0 2006.229.10:28:24.43#ibcon#about to read 3, iclass 13, count 0 2006.229.10:28:24.46#ibcon#read 3, iclass 13, count 0 2006.229.10:28:24.46#ibcon#about to read 4, iclass 13, count 0 2006.229.10:28:24.46#ibcon#read 4, iclass 13, count 0 2006.229.10:28:24.46#ibcon#about to read 5, iclass 13, count 0 2006.229.10:28:24.46#ibcon#read 5, iclass 13, count 0 2006.229.10:28:24.46#ibcon#about to read 6, iclass 13, count 0 2006.229.10:28:24.46#ibcon#read 6, iclass 13, count 0 2006.229.10:28:24.46#ibcon#end of sib2, iclass 13, count 0 2006.229.10:28:24.46#ibcon#*after write, iclass 13, count 0 2006.229.10:28:24.46#ibcon#*before return 0, iclass 13, count 0 2006.229.10:28:24.46#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:24.46#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:28:24.46#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:28:24.46#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:28:24.46$vck44/vblo=3,649.99 2006.229.10:28:24.46#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.10:28:24.46#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.10:28:24.46#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:24.46#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:28:24.46#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:28:24.46#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:28:24.46#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:28:24.46#ibcon#first serial, iclass 15, count 0 2006.229.10:28:24.46#ibcon#enter sib2, iclass 15, count 0 2006.229.10:28:24.46#ibcon#flushed, iclass 15, count 0 2006.229.10:28:24.46#ibcon#about to write, iclass 15, count 0 2006.229.10:28:24.46#ibcon#wrote, iclass 15, count 0 2006.229.10:28:24.46#ibcon#about to read 3, iclass 15, count 0 2006.229.10:28:24.48#ibcon#read 3, iclass 15, count 0 2006.229.10:28:24.48#ibcon#about to read 4, iclass 15, count 0 2006.229.10:28:24.48#ibcon#read 4, iclass 15, count 0 2006.229.10:28:24.48#ibcon#about to read 5, iclass 15, count 0 2006.229.10:28:24.48#ibcon#read 5, iclass 15, count 0 2006.229.10:28:24.48#ibcon#about to read 6, iclass 15, count 0 2006.229.10:28:24.48#ibcon#read 6, iclass 15, count 0 2006.229.10:28:24.48#ibcon#end of sib2, iclass 15, count 0 2006.229.10:28:24.48#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:28:24.48#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:28:24.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:28:24.48#ibcon#*before write, iclass 15, count 0 2006.229.10:28:24.48#ibcon#enter sib2, iclass 15, count 0 2006.229.10:28:24.48#ibcon#flushed, iclass 15, count 0 2006.229.10:28:24.48#ibcon#about to write, iclass 15, count 0 2006.229.10:28:24.48#ibcon#wrote, iclass 15, count 0 2006.229.10:28:24.48#ibcon#about to read 3, iclass 15, count 0 2006.229.10:28:24.52#ibcon#read 3, iclass 15, count 0 2006.229.10:28:24.52#ibcon#about to read 4, iclass 15, count 0 2006.229.10:28:24.52#ibcon#read 4, iclass 15, count 0 2006.229.10:28:24.52#ibcon#about to read 5, iclass 15, count 0 2006.229.10:28:24.52#ibcon#read 5, iclass 15, count 0 2006.229.10:28:24.52#ibcon#about to read 6, iclass 15, count 0 2006.229.10:28:24.52#ibcon#read 6, iclass 15, count 0 2006.229.10:28:24.52#ibcon#end of sib2, iclass 15, count 0 2006.229.10:28:24.52#ibcon#*after write, iclass 15, count 0 2006.229.10:28:24.52#ibcon#*before return 0, iclass 15, count 0 2006.229.10:28:24.52#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:28:24.52#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:28:24.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:28:24.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:28:24.52$vck44/vb=3,4 2006.229.10:28:24.52#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.10:28:24.52#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.10:28:24.52#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:24.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.10:28:24.58#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.10:28:24.58#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.10:28:24.58#ibcon#enter wrdev, iclass 17, count 2 2006.229.10:28:24.58#ibcon#first serial, iclass 17, count 2 2006.229.10:28:24.58#ibcon#enter sib2, iclass 17, count 2 2006.229.10:28:24.58#ibcon#flushed, iclass 17, count 2 2006.229.10:28:24.58#ibcon#about to write, iclass 17, count 2 2006.229.10:28:24.58#ibcon#wrote, iclass 17, count 2 2006.229.10:28:24.58#ibcon#about to read 3, iclass 17, count 2 2006.229.10:28:24.60#ibcon#read 3, iclass 17, count 2 2006.229.10:28:24.60#ibcon#about to read 4, iclass 17, count 2 2006.229.10:28:24.60#ibcon#read 4, iclass 17, count 2 2006.229.10:28:24.60#ibcon#about to read 5, iclass 17, count 2 2006.229.10:28:24.60#ibcon#read 5, iclass 17, count 2 2006.229.10:28:24.60#ibcon#about to read 6, iclass 17, count 2 2006.229.10:28:24.60#ibcon#read 6, iclass 17, count 2 2006.229.10:28:24.60#ibcon#end of sib2, iclass 17, count 2 2006.229.10:28:24.60#ibcon#*mode == 0, iclass 17, count 2 2006.229.10:28:24.60#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.10:28:24.60#ibcon#[27=AT03-04\r\n] 2006.229.10:28:24.60#ibcon#*before write, iclass 17, count 2 2006.229.10:28:24.60#ibcon#enter sib2, iclass 17, count 2 2006.229.10:28:24.60#ibcon#flushed, iclass 17, count 2 2006.229.10:28:24.60#ibcon#about to write, iclass 17, count 2 2006.229.10:28:24.60#ibcon#wrote, iclass 17, count 2 2006.229.10:28:24.60#ibcon#about to read 3, iclass 17, count 2 2006.229.10:28:24.63#ibcon#read 3, iclass 17, count 2 2006.229.10:28:24.63#ibcon#about to read 4, iclass 17, count 2 2006.229.10:28:24.63#ibcon#read 4, iclass 17, count 2 2006.229.10:28:24.63#ibcon#about to read 5, iclass 17, count 2 2006.229.10:28:24.63#ibcon#read 5, iclass 17, count 2 2006.229.10:28:24.63#ibcon#about to read 6, iclass 17, count 2 2006.229.10:28:24.63#ibcon#read 6, iclass 17, count 2 2006.229.10:28:24.63#ibcon#end of sib2, iclass 17, count 2 2006.229.10:28:24.63#ibcon#*after write, iclass 17, count 2 2006.229.10:28:24.63#ibcon#*before return 0, iclass 17, count 2 2006.229.10:28:24.63#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.10:28:24.63#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.10:28:24.63#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.10:28:24.63#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:24.63#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.10:28:24.75#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.10:28:24.75#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.10:28:24.75#ibcon#enter wrdev, iclass 17, count 0 2006.229.10:28:24.75#ibcon#first serial, iclass 17, count 0 2006.229.10:28:24.75#ibcon#enter sib2, iclass 17, count 0 2006.229.10:28:24.75#ibcon#flushed, iclass 17, count 0 2006.229.10:28:24.75#ibcon#about to write, iclass 17, count 0 2006.229.10:28:24.75#ibcon#wrote, iclass 17, count 0 2006.229.10:28:24.75#ibcon#about to read 3, iclass 17, count 0 2006.229.10:28:24.77#ibcon#read 3, iclass 17, count 0 2006.229.10:28:24.77#ibcon#about to read 4, iclass 17, count 0 2006.229.10:28:24.77#ibcon#read 4, iclass 17, count 0 2006.229.10:28:24.77#ibcon#about to read 5, iclass 17, count 0 2006.229.10:28:24.77#ibcon#read 5, iclass 17, count 0 2006.229.10:28:24.77#ibcon#about to read 6, iclass 17, count 0 2006.229.10:28:24.77#ibcon#read 6, iclass 17, count 0 2006.229.10:28:24.77#ibcon#end of sib2, iclass 17, count 0 2006.229.10:28:24.77#ibcon#*mode == 0, iclass 17, count 0 2006.229.10:28:24.77#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.10:28:24.77#ibcon#[27=USB\r\n] 2006.229.10:28:24.77#ibcon#*before write, iclass 17, count 0 2006.229.10:28:24.77#ibcon#enter sib2, iclass 17, count 0 2006.229.10:28:24.77#ibcon#flushed, iclass 17, count 0 2006.229.10:28:24.77#ibcon#about to write, iclass 17, count 0 2006.229.10:28:24.77#ibcon#wrote, iclass 17, count 0 2006.229.10:28:24.77#ibcon#about to read 3, iclass 17, count 0 2006.229.10:28:24.80#ibcon#read 3, iclass 17, count 0 2006.229.10:28:24.80#ibcon#about to read 4, iclass 17, count 0 2006.229.10:28:24.80#ibcon#read 4, iclass 17, count 0 2006.229.10:28:24.80#ibcon#about to read 5, iclass 17, count 0 2006.229.10:28:24.80#ibcon#read 5, iclass 17, count 0 2006.229.10:28:24.80#ibcon#about to read 6, iclass 17, count 0 2006.229.10:28:24.80#ibcon#read 6, iclass 17, count 0 2006.229.10:28:24.80#ibcon#end of sib2, iclass 17, count 0 2006.229.10:28:24.80#ibcon#*after write, iclass 17, count 0 2006.229.10:28:24.80#ibcon#*before return 0, iclass 17, count 0 2006.229.10:28:24.80#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.10:28:24.80#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.10:28:24.80#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.10:28:24.80#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.10:28:24.80$vck44/vblo=4,679.99 2006.229.10:28:24.80#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.10:28:24.80#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.10:28:24.80#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:24.80#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:24.80#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:24.80#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:24.80#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:28:24.80#ibcon#first serial, iclass 19, count 0 2006.229.10:28:24.80#ibcon#enter sib2, iclass 19, count 0 2006.229.10:28:24.80#ibcon#flushed, iclass 19, count 0 2006.229.10:28:24.80#ibcon#about to write, iclass 19, count 0 2006.229.10:28:24.80#ibcon#wrote, iclass 19, count 0 2006.229.10:28:24.80#ibcon#about to read 3, iclass 19, count 0 2006.229.10:28:24.82#ibcon#read 3, iclass 19, count 0 2006.229.10:28:24.82#ibcon#about to read 4, iclass 19, count 0 2006.229.10:28:24.82#ibcon#read 4, iclass 19, count 0 2006.229.10:28:24.82#ibcon#about to read 5, iclass 19, count 0 2006.229.10:28:24.82#ibcon#read 5, iclass 19, count 0 2006.229.10:28:24.82#ibcon#about to read 6, iclass 19, count 0 2006.229.10:28:24.82#ibcon#read 6, iclass 19, count 0 2006.229.10:28:24.82#ibcon#end of sib2, iclass 19, count 0 2006.229.10:28:24.82#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:28:24.82#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:28:24.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:28:24.82#ibcon#*before write, iclass 19, count 0 2006.229.10:28:24.82#ibcon#enter sib2, iclass 19, count 0 2006.229.10:28:24.82#ibcon#flushed, iclass 19, count 0 2006.229.10:28:24.82#ibcon#about to write, iclass 19, count 0 2006.229.10:28:24.82#ibcon#wrote, iclass 19, count 0 2006.229.10:28:24.82#ibcon#about to read 3, iclass 19, count 0 2006.229.10:28:24.86#ibcon#read 3, iclass 19, count 0 2006.229.10:28:24.86#ibcon#about to read 4, iclass 19, count 0 2006.229.10:28:24.86#ibcon#read 4, iclass 19, count 0 2006.229.10:28:24.86#ibcon#about to read 5, iclass 19, count 0 2006.229.10:28:24.86#ibcon#read 5, iclass 19, count 0 2006.229.10:28:24.86#ibcon#about to read 6, iclass 19, count 0 2006.229.10:28:24.86#ibcon#read 6, iclass 19, count 0 2006.229.10:28:24.86#ibcon#end of sib2, iclass 19, count 0 2006.229.10:28:24.86#ibcon#*after write, iclass 19, count 0 2006.229.10:28:24.86#ibcon#*before return 0, iclass 19, count 0 2006.229.10:28:24.86#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:24.86#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.10:28:24.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:28:24.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:28:24.86$vck44/vb=4,4 2006.229.10:28:24.86#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.10:28:24.86#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.10:28:24.86#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:24.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:24.92#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:24.92#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:24.92#ibcon#enter wrdev, iclass 21, count 2 2006.229.10:28:24.92#ibcon#first serial, iclass 21, count 2 2006.229.10:28:24.92#ibcon#enter sib2, iclass 21, count 2 2006.229.10:28:24.92#ibcon#flushed, iclass 21, count 2 2006.229.10:28:24.92#ibcon#about to write, iclass 21, count 2 2006.229.10:28:24.92#ibcon#wrote, iclass 21, count 2 2006.229.10:28:24.92#ibcon#about to read 3, iclass 21, count 2 2006.229.10:28:24.94#ibcon#read 3, iclass 21, count 2 2006.229.10:28:24.94#ibcon#about to read 4, iclass 21, count 2 2006.229.10:28:24.94#ibcon#read 4, iclass 21, count 2 2006.229.10:28:24.94#ibcon#about to read 5, iclass 21, count 2 2006.229.10:28:24.94#ibcon#read 5, iclass 21, count 2 2006.229.10:28:24.94#ibcon#about to read 6, iclass 21, count 2 2006.229.10:28:24.94#ibcon#read 6, iclass 21, count 2 2006.229.10:28:24.94#ibcon#end of sib2, iclass 21, count 2 2006.229.10:28:24.94#ibcon#*mode == 0, iclass 21, count 2 2006.229.10:28:24.94#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.10:28:24.94#ibcon#[27=AT04-04\r\n] 2006.229.10:28:24.94#ibcon#*before write, iclass 21, count 2 2006.229.10:28:24.94#ibcon#enter sib2, iclass 21, count 2 2006.229.10:28:24.94#ibcon#flushed, iclass 21, count 2 2006.229.10:28:24.94#ibcon#about to write, iclass 21, count 2 2006.229.10:28:24.94#ibcon#wrote, iclass 21, count 2 2006.229.10:28:24.94#ibcon#about to read 3, iclass 21, count 2 2006.229.10:28:24.97#ibcon#read 3, iclass 21, count 2 2006.229.10:28:24.97#ibcon#about to read 4, iclass 21, count 2 2006.229.10:28:24.97#ibcon#read 4, iclass 21, count 2 2006.229.10:28:24.97#ibcon#about to read 5, iclass 21, count 2 2006.229.10:28:24.97#ibcon#read 5, iclass 21, count 2 2006.229.10:28:24.97#ibcon#about to read 6, iclass 21, count 2 2006.229.10:28:24.97#ibcon#read 6, iclass 21, count 2 2006.229.10:28:24.97#ibcon#end of sib2, iclass 21, count 2 2006.229.10:28:24.97#ibcon#*after write, iclass 21, count 2 2006.229.10:28:24.97#ibcon#*before return 0, iclass 21, count 2 2006.229.10:28:24.97#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:24.97#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.10:28:24.97#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.10:28:24.97#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:24.97#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:25.09#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:25.09#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:25.09#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:28:25.09#ibcon#first serial, iclass 21, count 0 2006.229.10:28:25.09#ibcon#enter sib2, iclass 21, count 0 2006.229.10:28:25.09#ibcon#flushed, iclass 21, count 0 2006.229.10:28:25.09#ibcon#about to write, iclass 21, count 0 2006.229.10:28:25.09#ibcon#wrote, iclass 21, count 0 2006.229.10:28:25.09#ibcon#about to read 3, iclass 21, count 0 2006.229.10:28:25.11#ibcon#read 3, iclass 21, count 0 2006.229.10:28:25.11#ibcon#about to read 4, iclass 21, count 0 2006.229.10:28:25.11#ibcon#read 4, iclass 21, count 0 2006.229.10:28:25.11#ibcon#about to read 5, iclass 21, count 0 2006.229.10:28:25.11#ibcon#read 5, iclass 21, count 0 2006.229.10:28:25.11#ibcon#about to read 6, iclass 21, count 0 2006.229.10:28:25.11#ibcon#read 6, iclass 21, count 0 2006.229.10:28:25.11#ibcon#end of sib2, iclass 21, count 0 2006.229.10:28:25.11#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:28:25.11#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:28:25.11#ibcon#[27=USB\r\n] 2006.229.10:28:25.11#ibcon#*before write, iclass 21, count 0 2006.229.10:28:25.11#ibcon#enter sib2, iclass 21, count 0 2006.229.10:28:25.11#ibcon#flushed, iclass 21, count 0 2006.229.10:28:25.11#ibcon#about to write, iclass 21, count 0 2006.229.10:28:25.11#ibcon#wrote, iclass 21, count 0 2006.229.10:28:25.11#ibcon#about to read 3, iclass 21, count 0 2006.229.10:28:25.14#ibcon#read 3, iclass 21, count 0 2006.229.10:28:25.14#ibcon#about to read 4, iclass 21, count 0 2006.229.10:28:25.14#ibcon#read 4, iclass 21, count 0 2006.229.10:28:25.14#ibcon#about to read 5, iclass 21, count 0 2006.229.10:28:25.14#ibcon#read 5, iclass 21, count 0 2006.229.10:28:25.14#ibcon#about to read 6, iclass 21, count 0 2006.229.10:28:25.14#ibcon#read 6, iclass 21, count 0 2006.229.10:28:25.14#ibcon#end of sib2, iclass 21, count 0 2006.229.10:28:25.14#ibcon#*after write, iclass 21, count 0 2006.229.10:28:25.14#ibcon#*before return 0, iclass 21, count 0 2006.229.10:28:25.14#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:25.14#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.10:28:25.14#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:28:25.14#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:28:25.14$vck44/vblo=5,709.99 2006.229.10:28:25.14#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.10:28:25.14#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.10:28:25.14#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:25.14#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:25.14#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:25.14#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:25.14#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:28:25.14#ibcon#first serial, iclass 23, count 0 2006.229.10:28:25.14#ibcon#enter sib2, iclass 23, count 0 2006.229.10:28:25.14#ibcon#flushed, iclass 23, count 0 2006.229.10:28:25.14#ibcon#about to write, iclass 23, count 0 2006.229.10:28:25.14#ibcon#wrote, iclass 23, count 0 2006.229.10:28:25.14#ibcon#about to read 3, iclass 23, count 0 2006.229.10:28:25.16#ibcon#read 3, iclass 23, count 0 2006.229.10:28:25.16#ibcon#about to read 4, iclass 23, count 0 2006.229.10:28:25.16#ibcon#read 4, iclass 23, count 0 2006.229.10:28:25.16#ibcon#about to read 5, iclass 23, count 0 2006.229.10:28:25.16#ibcon#read 5, iclass 23, count 0 2006.229.10:28:25.16#ibcon#about to read 6, iclass 23, count 0 2006.229.10:28:25.16#ibcon#read 6, iclass 23, count 0 2006.229.10:28:25.16#ibcon#end of sib2, iclass 23, count 0 2006.229.10:28:25.16#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:28:25.16#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:28:25.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:28:25.16#ibcon#*before write, iclass 23, count 0 2006.229.10:28:25.16#ibcon#enter sib2, iclass 23, count 0 2006.229.10:28:25.16#ibcon#flushed, iclass 23, count 0 2006.229.10:28:25.16#ibcon#about to write, iclass 23, count 0 2006.229.10:28:25.16#ibcon#wrote, iclass 23, count 0 2006.229.10:28:25.16#ibcon#about to read 3, iclass 23, count 0 2006.229.10:28:25.20#ibcon#read 3, iclass 23, count 0 2006.229.10:28:25.20#ibcon#about to read 4, iclass 23, count 0 2006.229.10:28:25.20#ibcon#read 4, iclass 23, count 0 2006.229.10:28:25.20#ibcon#about to read 5, iclass 23, count 0 2006.229.10:28:25.20#ibcon#read 5, iclass 23, count 0 2006.229.10:28:25.20#ibcon#about to read 6, iclass 23, count 0 2006.229.10:28:25.20#ibcon#read 6, iclass 23, count 0 2006.229.10:28:25.20#ibcon#end of sib2, iclass 23, count 0 2006.229.10:28:25.20#ibcon#*after write, iclass 23, count 0 2006.229.10:28:25.20#ibcon#*before return 0, iclass 23, count 0 2006.229.10:28:25.20#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:25.20#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.10:28:25.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:28:25.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:28:25.20$vck44/vb=5,4 2006.229.10:28:25.20#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.10:28:25.20#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.10:28:25.20#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:25.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:25.26#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:25.26#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:25.26#ibcon#enter wrdev, iclass 25, count 2 2006.229.10:28:25.26#ibcon#first serial, iclass 25, count 2 2006.229.10:28:25.26#ibcon#enter sib2, iclass 25, count 2 2006.229.10:28:25.26#ibcon#flushed, iclass 25, count 2 2006.229.10:28:25.26#ibcon#about to write, iclass 25, count 2 2006.229.10:28:25.26#ibcon#wrote, iclass 25, count 2 2006.229.10:28:25.26#ibcon#about to read 3, iclass 25, count 2 2006.229.10:28:25.28#ibcon#read 3, iclass 25, count 2 2006.229.10:28:25.28#ibcon#about to read 4, iclass 25, count 2 2006.229.10:28:25.28#ibcon#read 4, iclass 25, count 2 2006.229.10:28:25.28#ibcon#about to read 5, iclass 25, count 2 2006.229.10:28:25.28#ibcon#read 5, iclass 25, count 2 2006.229.10:28:25.28#ibcon#about to read 6, iclass 25, count 2 2006.229.10:28:25.28#ibcon#read 6, iclass 25, count 2 2006.229.10:28:25.28#ibcon#end of sib2, iclass 25, count 2 2006.229.10:28:25.28#ibcon#*mode == 0, iclass 25, count 2 2006.229.10:28:25.28#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.10:28:25.28#ibcon#[27=AT05-04\r\n] 2006.229.10:28:25.28#ibcon#*before write, iclass 25, count 2 2006.229.10:28:25.28#ibcon#enter sib2, iclass 25, count 2 2006.229.10:28:25.28#ibcon#flushed, iclass 25, count 2 2006.229.10:28:25.28#ibcon#about to write, iclass 25, count 2 2006.229.10:28:25.28#ibcon#wrote, iclass 25, count 2 2006.229.10:28:25.28#ibcon#about to read 3, iclass 25, count 2 2006.229.10:28:25.31#ibcon#read 3, iclass 25, count 2 2006.229.10:28:25.31#ibcon#about to read 4, iclass 25, count 2 2006.229.10:28:25.31#ibcon#read 4, iclass 25, count 2 2006.229.10:28:25.31#ibcon#about to read 5, iclass 25, count 2 2006.229.10:28:25.31#ibcon#read 5, iclass 25, count 2 2006.229.10:28:25.31#ibcon#about to read 6, iclass 25, count 2 2006.229.10:28:25.31#ibcon#read 6, iclass 25, count 2 2006.229.10:28:25.31#ibcon#end of sib2, iclass 25, count 2 2006.229.10:28:25.31#ibcon#*after write, iclass 25, count 2 2006.229.10:28:25.31#ibcon#*before return 0, iclass 25, count 2 2006.229.10:28:25.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:25.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.10:28:25.31#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.10:28:25.31#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:25.31#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:25.43#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:25.43#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:25.43#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:28:25.43#ibcon#first serial, iclass 25, count 0 2006.229.10:28:25.43#ibcon#enter sib2, iclass 25, count 0 2006.229.10:28:25.43#ibcon#flushed, iclass 25, count 0 2006.229.10:28:25.43#ibcon#about to write, iclass 25, count 0 2006.229.10:28:25.43#ibcon#wrote, iclass 25, count 0 2006.229.10:28:25.43#ibcon#about to read 3, iclass 25, count 0 2006.229.10:28:25.45#ibcon#read 3, iclass 25, count 0 2006.229.10:28:25.45#ibcon#about to read 4, iclass 25, count 0 2006.229.10:28:25.45#ibcon#read 4, iclass 25, count 0 2006.229.10:28:25.45#ibcon#about to read 5, iclass 25, count 0 2006.229.10:28:25.45#ibcon#read 5, iclass 25, count 0 2006.229.10:28:25.45#ibcon#about to read 6, iclass 25, count 0 2006.229.10:28:25.45#ibcon#read 6, iclass 25, count 0 2006.229.10:28:25.45#ibcon#end of sib2, iclass 25, count 0 2006.229.10:28:25.45#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:28:25.45#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:28:25.45#ibcon#[27=USB\r\n] 2006.229.10:28:25.45#ibcon#*before write, iclass 25, count 0 2006.229.10:28:25.45#ibcon#enter sib2, iclass 25, count 0 2006.229.10:28:25.45#ibcon#flushed, iclass 25, count 0 2006.229.10:28:25.45#ibcon#about to write, iclass 25, count 0 2006.229.10:28:25.45#ibcon#wrote, iclass 25, count 0 2006.229.10:28:25.45#ibcon#about to read 3, iclass 25, count 0 2006.229.10:28:25.48#ibcon#read 3, iclass 25, count 0 2006.229.10:28:25.48#ibcon#about to read 4, iclass 25, count 0 2006.229.10:28:25.48#ibcon#read 4, iclass 25, count 0 2006.229.10:28:25.48#ibcon#about to read 5, iclass 25, count 0 2006.229.10:28:25.48#ibcon#read 5, iclass 25, count 0 2006.229.10:28:25.48#ibcon#about to read 6, iclass 25, count 0 2006.229.10:28:25.48#ibcon#read 6, iclass 25, count 0 2006.229.10:28:25.48#ibcon#end of sib2, iclass 25, count 0 2006.229.10:28:25.48#ibcon#*after write, iclass 25, count 0 2006.229.10:28:25.48#ibcon#*before return 0, iclass 25, count 0 2006.229.10:28:25.48#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:25.48#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.10:28:25.48#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:28:25.48#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:28:25.48$vck44/vblo=6,719.99 2006.229.10:28:25.48#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.10:28:25.48#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.10:28:25.48#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:25.48#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:25.48#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:25.48#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:25.48#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:28:25.48#ibcon#first serial, iclass 27, count 0 2006.229.10:28:25.48#ibcon#enter sib2, iclass 27, count 0 2006.229.10:28:25.48#ibcon#flushed, iclass 27, count 0 2006.229.10:28:25.48#ibcon#about to write, iclass 27, count 0 2006.229.10:28:25.48#ibcon#wrote, iclass 27, count 0 2006.229.10:28:25.48#ibcon#about to read 3, iclass 27, count 0 2006.229.10:28:25.50#ibcon#read 3, iclass 27, count 0 2006.229.10:28:25.50#ibcon#about to read 4, iclass 27, count 0 2006.229.10:28:25.50#ibcon#read 4, iclass 27, count 0 2006.229.10:28:25.50#ibcon#about to read 5, iclass 27, count 0 2006.229.10:28:25.50#ibcon#read 5, iclass 27, count 0 2006.229.10:28:25.50#ibcon#about to read 6, iclass 27, count 0 2006.229.10:28:25.50#ibcon#read 6, iclass 27, count 0 2006.229.10:28:25.50#ibcon#end of sib2, iclass 27, count 0 2006.229.10:28:25.50#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:28:25.50#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:28:25.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:28:25.50#ibcon#*before write, iclass 27, count 0 2006.229.10:28:25.50#ibcon#enter sib2, iclass 27, count 0 2006.229.10:28:25.50#ibcon#flushed, iclass 27, count 0 2006.229.10:28:25.50#ibcon#about to write, iclass 27, count 0 2006.229.10:28:25.50#ibcon#wrote, iclass 27, count 0 2006.229.10:28:25.50#ibcon#about to read 3, iclass 27, count 0 2006.229.10:28:25.54#ibcon#read 3, iclass 27, count 0 2006.229.10:28:25.54#ibcon#about to read 4, iclass 27, count 0 2006.229.10:28:25.54#ibcon#read 4, iclass 27, count 0 2006.229.10:28:25.54#ibcon#about to read 5, iclass 27, count 0 2006.229.10:28:25.54#ibcon#read 5, iclass 27, count 0 2006.229.10:28:25.54#ibcon#about to read 6, iclass 27, count 0 2006.229.10:28:25.54#ibcon#read 6, iclass 27, count 0 2006.229.10:28:25.54#ibcon#end of sib2, iclass 27, count 0 2006.229.10:28:25.54#ibcon#*after write, iclass 27, count 0 2006.229.10:28:25.54#ibcon#*before return 0, iclass 27, count 0 2006.229.10:28:25.54#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:25.54#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.10:28:25.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:28:25.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:28:25.54$vck44/vb=6,4 2006.229.10:28:25.54#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.10:28:25.54#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.10:28:25.54#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:25.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:25.60#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:25.60#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:25.60#ibcon#enter wrdev, iclass 29, count 2 2006.229.10:28:25.60#ibcon#first serial, iclass 29, count 2 2006.229.10:28:25.60#ibcon#enter sib2, iclass 29, count 2 2006.229.10:28:25.60#ibcon#flushed, iclass 29, count 2 2006.229.10:28:25.60#ibcon#about to write, iclass 29, count 2 2006.229.10:28:25.60#ibcon#wrote, iclass 29, count 2 2006.229.10:28:25.60#ibcon#about to read 3, iclass 29, count 2 2006.229.10:28:25.62#ibcon#read 3, iclass 29, count 2 2006.229.10:28:25.62#ibcon#about to read 4, iclass 29, count 2 2006.229.10:28:25.62#ibcon#read 4, iclass 29, count 2 2006.229.10:28:25.62#ibcon#about to read 5, iclass 29, count 2 2006.229.10:28:25.62#ibcon#read 5, iclass 29, count 2 2006.229.10:28:25.62#ibcon#about to read 6, iclass 29, count 2 2006.229.10:28:25.62#ibcon#read 6, iclass 29, count 2 2006.229.10:28:25.62#ibcon#end of sib2, iclass 29, count 2 2006.229.10:28:25.62#ibcon#*mode == 0, iclass 29, count 2 2006.229.10:28:25.62#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.10:28:25.62#ibcon#[27=AT06-04\r\n] 2006.229.10:28:25.62#ibcon#*before write, iclass 29, count 2 2006.229.10:28:25.62#ibcon#enter sib2, iclass 29, count 2 2006.229.10:28:25.62#ibcon#flushed, iclass 29, count 2 2006.229.10:28:25.62#ibcon#about to write, iclass 29, count 2 2006.229.10:28:25.62#ibcon#wrote, iclass 29, count 2 2006.229.10:28:25.62#ibcon#about to read 3, iclass 29, count 2 2006.229.10:28:25.65#ibcon#read 3, iclass 29, count 2 2006.229.10:28:25.65#ibcon#about to read 4, iclass 29, count 2 2006.229.10:28:25.65#ibcon#read 4, iclass 29, count 2 2006.229.10:28:25.65#ibcon#about to read 5, iclass 29, count 2 2006.229.10:28:25.65#ibcon#read 5, iclass 29, count 2 2006.229.10:28:25.65#ibcon#about to read 6, iclass 29, count 2 2006.229.10:28:25.65#ibcon#read 6, iclass 29, count 2 2006.229.10:28:25.65#ibcon#end of sib2, iclass 29, count 2 2006.229.10:28:25.65#ibcon#*after write, iclass 29, count 2 2006.229.10:28:25.65#ibcon#*before return 0, iclass 29, count 2 2006.229.10:28:25.65#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:25.65#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.10:28:25.65#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.10:28:25.65#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:25.65#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:25.77#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:25.77#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:25.77#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:28:25.77#ibcon#first serial, iclass 29, count 0 2006.229.10:28:25.77#ibcon#enter sib2, iclass 29, count 0 2006.229.10:28:25.77#ibcon#flushed, iclass 29, count 0 2006.229.10:28:25.77#ibcon#about to write, iclass 29, count 0 2006.229.10:28:25.77#ibcon#wrote, iclass 29, count 0 2006.229.10:28:25.77#ibcon#about to read 3, iclass 29, count 0 2006.229.10:28:25.79#ibcon#read 3, iclass 29, count 0 2006.229.10:28:25.79#ibcon#about to read 4, iclass 29, count 0 2006.229.10:28:25.79#ibcon#read 4, iclass 29, count 0 2006.229.10:28:25.79#ibcon#about to read 5, iclass 29, count 0 2006.229.10:28:25.79#ibcon#read 5, iclass 29, count 0 2006.229.10:28:25.79#ibcon#about to read 6, iclass 29, count 0 2006.229.10:28:25.79#ibcon#read 6, iclass 29, count 0 2006.229.10:28:25.79#ibcon#end of sib2, iclass 29, count 0 2006.229.10:28:25.79#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:28:25.79#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:28:25.79#ibcon#[27=USB\r\n] 2006.229.10:28:25.79#ibcon#*before write, iclass 29, count 0 2006.229.10:28:25.79#ibcon#enter sib2, iclass 29, count 0 2006.229.10:28:25.79#ibcon#flushed, iclass 29, count 0 2006.229.10:28:25.79#ibcon#about to write, iclass 29, count 0 2006.229.10:28:25.79#ibcon#wrote, iclass 29, count 0 2006.229.10:28:25.79#ibcon#about to read 3, iclass 29, count 0 2006.229.10:28:25.82#ibcon#read 3, iclass 29, count 0 2006.229.10:28:25.82#ibcon#about to read 4, iclass 29, count 0 2006.229.10:28:25.82#ibcon#read 4, iclass 29, count 0 2006.229.10:28:25.82#ibcon#about to read 5, iclass 29, count 0 2006.229.10:28:25.82#ibcon#read 5, iclass 29, count 0 2006.229.10:28:25.82#ibcon#about to read 6, iclass 29, count 0 2006.229.10:28:25.82#ibcon#read 6, iclass 29, count 0 2006.229.10:28:25.82#ibcon#end of sib2, iclass 29, count 0 2006.229.10:28:25.82#ibcon#*after write, iclass 29, count 0 2006.229.10:28:25.82#ibcon#*before return 0, iclass 29, count 0 2006.229.10:28:25.82#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:25.82#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.10:28:25.82#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:28:25.82#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:28:25.82$vck44/vblo=7,734.99 2006.229.10:28:25.82#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.10:28:25.82#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.10:28:25.82#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:25.82#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:25.82#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:25.82#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:25.82#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:28:25.82#ibcon#first serial, iclass 31, count 0 2006.229.10:28:25.82#ibcon#enter sib2, iclass 31, count 0 2006.229.10:28:25.82#ibcon#flushed, iclass 31, count 0 2006.229.10:28:25.82#ibcon#about to write, iclass 31, count 0 2006.229.10:28:25.82#ibcon#wrote, iclass 31, count 0 2006.229.10:28:25.82#ibcon#about to read 3, iclass 31, count 0 2006.229.10:28:25.84#ibcon#read 3, iclass 31, count 0 2006.229.10:28:25.84#ibcon#about to read 4, iclass 31, count 0 2006.229.10:28:25.84#ibcon#read 4, iclass 31, count 0 2006.229.10:28:25.84#ibcon#about to read 5, iclass 31, count 0 2006.229.10:28:25.84#ibcon#read 5, iclass 31, count 0 2006.229.10:28:25.84#ibcon#about to read 6, iclass 31, count 0 2006.229.10:28:25.84#ibcon#read 6, iclass 31, count 0 2006.229.10:28:25.84#ibcon#end of sib2, iclass 31, count 0 2006.229.10:28:25.84#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:28:25.84#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:28:25.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:28:25.84#ibcon#*before write, iclass 31, count 0 2006.229.10:28:25.84#ibcon#enter sib2, iclass 31, count 0 2006.229.10:28:25.84#ibcon#flushed, iclass 31, count 0 2006.229.10:28:25.84#ibcon#about to write, iclass 31, count 0 2006.229.10:28:25.84#ibcon#wrote, iclass 31, count 0 2006.229.10:28:25.84#ibcon#about to read 3, iclass 31, count 0 2006.229.10:28:25.88#ibcon#read 3, iclass 31, count 0 2006.229.10:28:25.88#ibcon#about to read 4, iclass 31, count 0 2006.229.10:28:25.88#ibcon#read 4, iclass 31, count 0 2006.229.10:28:25.88#ibcon#about to read 5, iclass 31, count 0 2006.229.10:28:25.88#ibcon#read 5, iclass 31, count 0 2006.229.10:28:25.88#ibcon#about to read 6, iclass 31, count 0 2006.229.10:28:25.88#ibcon#read 6, iclass 31, count 0 2006.229.10:28:25.88#ibcon#end of sib2, iclass 31, count 0 2006.229.10:28:25.88#ibcon#*after write, iclass 31, count 0 2006.229.10:28:25.88#ibcon#*before return 0, iclass 31, count 0 2006.229.10:28:25.88#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:25.88#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.10:28:25.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:28:25.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:28:25.88$vck44/vb=7,4 2006.229.10:28:25.88#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.10:28:25.88#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.10:28:25.88#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:25.88#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:25.94#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:25.94#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:25.94#ibcon#enter wrdev, iclass 33, count 2 2006.229.10:28:25.94#ibcon#first serial, iclass 33, count 2 2006.229.10:28:25.94#ibcon#enter sib2, iclass 33, count 2 2006.229.10:28:25.94#ibcon#flushed, iclass 33, count 2 2006.229.10:28:25.94#ibcon#about to write, iclass 33, count 2 2006.229.10:28:25.94#ibcon#wrote, iclass 33, count 2 2006.229.10:28:25.94#ibcon#about to read 3, iclass 33, count 2 2006.229.10:28:25.96#ibcon#read 3, iclass 33, count 2 2006.229.10:28:25.96#ibcon#about to read 4, iclass 33, count 2 2006.229.10:28:25.96#ibcon#read 4, iclass 33, count 2 2006.229.10:28:25.96#ibcon#about to read 5, iclass 33, count 2 2006.229.10:28:25.96#ibcon#read 5, iclass 33, count 2 2006.229.10:28:25.96#ibcon#about to read 6, iclass 33, count 2 2006.229.10:28:25.96#ibcon#read 6, iclass 33, count 2 2006.229.10:28:25.96#ibcon#end of sib2, iclass 33, count 2 2006.229.10:28:25.96#ibcon#*mode == 0, iclass 33, count 2 2006.229.10:28:25.96#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.10:28:25.96#ibcon#[27=AT07-04\r\n] 2006.229.10:28:25.96#ibcon#*before write, iclass 33, count 2 2006.229.10:28:25.96#ibcon#enter sib2, iclass 33, count 2 2006.229.10:28:25.96#ibcon#flushed, iclass 33, count 2 2006.229.10:28:25.96#ibcon#about to write, iclass 33, count 2 2006.229.10:28:25.96#ibcon#wrote, iclass 33, count 2 2006.229.10:28:25.96#ibcon#about to read 3, iclass 33, count 2 2006.229.10:28:25.99#ibcon#read 3, iclass 33, count 2 2006.229.10:28:25.99#ibcon#about to read 4, iclass 33, count 2 2006.229.10:28:25.99#ibcon#read 4, iclass 33, count 2 2006.229.10:28:25.99#ibcon#about to read 5, iclass 33, count 2 2006.229.10:28:25.99#ibcon#read 5, iclass 33, count 2 2006.229.10:28:25.99#ibcon#about to read 6, iclass 33, count 2 2006.229.10:28:25.99#ibcon#read 6, iclass 33, count 2 2006.229.10:28:25.99#ibcon#end of sib2, iclass 33, count 2 2006.229.10:28:25.99#ibcon#*after write, iclass 33, count 2 2006.229.10:28:25.99#ibcon#*before return 0, iclass 33, count 2 2006.229.10:28:25.99#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:25.99#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.10:28:25.99#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.10:28:25.99#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:25.99#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:26.11#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:26.11#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:26.11#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:28:26.11#ibcon#first serial, iclass 33, count 0 2006.229.10:28:26.11#ibcon#enter sib2, iclass 33, count 0 2006.229.10:28:26.11#ibcon#flushed, iclass 33, count 0 2006.229.10:28:26.11#ibcon#about to write, iclass 33, count 0 2006.229.10:28:26.11#ibcon#wrote, iclass 33, count 0 2006.229.10:28:26.11#ibcon#about to read 3, iclass 33, count 0 2006.229.10:28:26.13#ibcon#read 3, iclass 33, count 0 2006.229.10:28:26.13#ibcon#about to read 4, iclass 33, count 0 2006.229.10:28:26.13#ibcon#read 4, iclass 33, count 0 2006.229.10:28:26.13#ibcon#about to read 5, iclass 33, count 0 2006.229.10:28:26.13#ibcon#read 5, iclass 33, count 0 2006.229.10:28:26.13#ibcon#about to read 6, iclass 33, count 0 2006.229.10:28:26.13#ibcon#read 6, iclass 33, count 0 2006.229.10:28:26.13#ibcon#end of sib2, iclass 33, count 0 2006.229.10:28:26.13#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:28:26.13#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:28:26.13#ibcon#[27=USB\r\n] 2006.229.10:28:26.13#ibcon#*before write, iclass 33, count 0 2006.229.10:28:26.13#ibcon#enter sib2, iclass 33, count 0 2006.229.10:28:26.13#ibcon#flushed, iclass 33, count 0 2006.229.10:28:26.13#ibcon#about to write, iclass 33, count 0 2006.229.10:28:26.13#ibcon#wrote, iclass 33, count 0 2006.229.10:28:26.13#ibcon#about to read 3, iclass 33, count 0 2006.229.10:28:26.16#ibcon#read 3, iclass 33, count 0 2006.229.10:28:26.16#ibcon#about to read 4, iclass 33, count 0 2006.229.10:28:26.16#ibcon#read 4, iclass 33, count 0 2006.229.10:28:26.16#ibcon#about to read 5, iclass 33, count 0 2006.229.10:28:26.16#ibcon#read 5, iclass 33, count 0 2006.229.10:28:26.16#ibcon#about to read 6, iclass 33, count 0 2006.229.10:28:26.16#ibcon#read 6, iclass 33, count 0 2006.229.10:28:26.16#ibcon#end of sib2, iclass 33, count 0 2006.229.10:28:26.16#ibcon#*after write, iclass 33, count 0 2006.229.10:28:26.16#ibcon#*before return 0, iclass 33, count 0 2006.229.10:28:26.16#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:26.16#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.10:28:26.16#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:28:26.16#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:28:26.16$vck44/vblo=8,744.99 2006.229.10:28:26.16#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.10:28:26.16#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.10:28:26.16#ibcon#ireg 17 cls_cnt 0 2006.229.10:28:26.16#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:26.16#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:26.16#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:26.16#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:28:26.16#ibcon#first serial, iclass 35, count 0 2006.229.10:28:26.16#ibcon#enter sib2, iclass 35, count 0 2006.229.10:28:26.16#ibcon#flushed, iclass 35, count 0 2006.229.10:28:26.16#ibcon#about to write, iclass 35, count 0 2006.229.10:28:26.16#ibcon#wrote, iclass 35, count 0 2006.229.10:28:26.16#ibcon#about to read 3, iclass 35, count 0 2006.229.10:28:26.18#ibcon#read 3, iclass 35, count 0 2006.229.10:28:26.18#ibcon#about to read 4, iclass 35, count 0 2006.229.10:28:26.18#ibcon#read 4, iclass 35, count 0 2006.229.10:28:26.18#ibcon#about to read 5, iclass 35, count 0 2006.229.10:28:26.18#ibcon#read 5, iclass 35, count 0 2006.229.10:28:26.18#ibcon#about to read 6, iclass 35, count 0 2006.229.10:28:26.18#ibcon#read 6, iclass 35, count 0 2006.229.10:28:26.18#ibcon#end of sib2, iclass 35, count 0 2006.229.10:28:26.18#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:28:26.18#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:28:26.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:28:26.18#ibcon#*before write, iclass 35, count 0 2006.229.10:28:26.18#ibcon#enter sib2, iclass 35, count 0 2006.229.10:28:26.18#ibcon#flushed, iclass 35, count 0 2006.229.10:28:26.18#ibcon#about to write, iclass 35, count 0 2006.229.10:28:26.18#ibcon#wrote, iclass 35, count 0 2006.229.10:28:26.18#ibcon#about to read 3, iclass 35, count 0 2006.229.10:28:26.22#ibcon#read 3, iclass 35, count 0 2006.229.10:28:26.22#ibcon#about to read 4, iclass 35, count 0 2006.229.10:28:26.22#ibcon#read 4, iclass 35, count 0 2006.229.10:28:26.22#ibcon#about to read 5, iclass 35, count 0 2006.229.10:28:26.22#ibcon#read 5, iclass 35, count 0 2006.229.10:28:26.22#ibcon#about to read 6, iclass 35, count 0 2006.229.10:28:26.22#ibcon#read 6, iclass 35, count 0 2006.229.10:28:26.22#ibcon#end of sib2, iclass 35, count 0 2006.229.10:28:26.22#ibcon#*after write, iclass 35, count 0 2006.229.10:28:26.22#ibcon#*before return 0, iclass 35, count 0 2006.229.10:28:26.22#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:26.22#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:28:26.22#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:28:26.22#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:28:26.22$vck44/vb=8,4 2006.229.10:28:26.22#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.10:28:26.22#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.10:28:26.22#ibcon#ireg 11 cls_cnt 2 2006.229.10:28:26.22#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:26.28#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:26.28#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:26.28#ibcon#enter wrdev, iclass 37, count 2 2006.229.10:28:26.28#ibcon#first serial, iclass 37, count 2 2006.229.10:28:26.28#ibcon#enter sib2, iclass 37, count 2 2006.229.10:28:26.28#ibcon#flushed, iclass 37, count 2 2006.229.10:28:26.28#ibcon#about to write, iclass 37, count 2 2006.229.10:28:26.28#ibcon#wrote, iclass 37, count 2 2006.229.10:28:26.28#ibcon#about to read 3, iclass 37, count 2 2006.229.10:28:26.30#ibcon#read 3, iclass 37, count 2 2006.229.10:28:26.30#ibcon#about to read 4, iclass 37, count 2 2006.229.10:28:26.30#ibcon#read 4, iclass 37, count 2 2006.229.10:28:26.30#ibcon#about to read 5, iclass 37, count 2 2006.229.10:28:26.30#ibcon#read 5, iclass 37, count 2 2006.229.10:28:26.30#ibcon#about to read 6, iclass 37, count 2 2006.229.10:28:26.30#ibcon#read 6, iclass 37, count 2 2006.229.10:28:26.30#ibcon#end of sib2, iclass 37, count 2 2006.229.10:28:26.30#ibcon#*mode == 0, iclass 37, count 2 2006.229.10:28:26.30#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.10:28:26.30#ibcon#[27=AT08-04\r\n] 2006.229.10:28:26.30#ibcon#*before write, iclass 37, count 2 2006.229.10:28:26.30#ibcon#enter sib2, iclass 37, count 2 2006.229.10:28:26.30#ibcon#flushed, iclass 37, count 2 2006.229.10:28:26.30#ibcon#about to write, iclass 37, count 2 2006.229.10:28:26.30#ibcon#wrote, iclass 37, count 2 2006.229.10:28:26.30#ibcon#about to read 3, iclass 37, count 2 2006.229.10:28:26.33#ibcon#read 3, iclass 37, count 2 2006.229.10:28:26.33#ibcon#about to read 4, iclass 37, count 2 2006.229.10:28:26.33#ibcon#read 4, iclass 37, count 2 2006.229.10:28:26.33#ibcon#about to read 5, iclass 37, count 2 2006.229.10:28:26.33#ibcon#read 5, iclass 37, count 2 2006.229.10:28:26.33#ibcon#about to read 6, iclass 37, count 2 2006.229.10:28:26.33#ibcon#read 6, iclass 37, count 2 2006.229.10:28:26.33#ibcon#end of sib2, iclass 37, count 2 2006.229.10:28:26.33#ibcon#*after write, iclass 37, count 2 2006.229.10:28:26.33#ibcon#*before return 0, iclass 37, count 2 2006.229.10:28:26.33#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:26.33#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.10:28:26.33#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.10:28:26.33#ibcon#ireg 7 cls_cnt 0 2006.229.10:28:26.33#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:26.45#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:26.45#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:26.45#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:28:26.45#ibcon#first serial, iclass 37, count 0 2006.229.10:28:26.45#ibcon#enter sib2, iclass 37, count 0 2006.229.10:28:26.45#ibcon#flushed, iclass 37, count 0 2006.229.10:28:26.45#ibcon#about to write, iclass 37, count 0 2006.229.10:28:26.45#ibcon#wrote, iclass 37, count 0 2006.229.10:28:26.45#ibcon#about to read 3, iclass 37, count 0 2006.229.10:28:26.47#ibcon#read 3, iclass 37, count 0 2006.229.10:28:26.47#ibcon#about to read 4, iclass 37, count 0 2006.229.10:28:26.47#ibcon#read 4, iclass 37, count 0 2006.229.10:28:26.47#ibcon#about to read 5, iclass 37, count 0 2006.229.10:28:26.47#ibcon#read 5, iclass 37, count 0 2006.229.10:28:26.47#ibcon#about to read 6, iclass 37, count 0 2006.229.10:28:26.47#ibcon#read 6, iclass 37, count 0 2006.229.10:28:26.47#ibcon#end of sib2, iclass 37, count 0 2006.229.10:28:26.47#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:28:26.47#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:28:26.47#ibcon#[27=USB\r\n] 2006.229.10:28:26.47#ibcon#*before write, iclass 37, count 0 2006.229.10:28:26.47#ibcon#enter sib2, iclass 37, count 0 2006.229.10:28:26.47#ibcon#flushed, iclass 37, count 0 2006.229.10:28:26.47#ibcon#about to write, iclass 37, count 0 2006.229.10:28:26.47#ibcon#wrote, iclass 37, count 0 2006.229.10:28:26.47#ibcon#about to read 3, iclass 37, count 0 2006.229.10:28:26.50#ibcon#read 3, iclass 37, count 0 2006.229.10:28:26.50#ibcon#about to read 4, iclass 37, count 0 2006.229.10:28:26.50#ibcon#read 4, iclass 37, count 0 2006.229.10:28:26.50#ibcon#about to read 5, iclass 37, count 0 2006.229.10:28:26.50#ibcon#read 5, iclass 37, count 0 2006.229.10:28:26.50#ibcon#about to read 6, iclass 37, count 0 2006.229.10:28:26.50#ibcon#read 6, iclass 37, count 0 2006.229.10:28:26.50#ibcon#end of sib2, iclass 37, count 0 2006.229.10:28:26.50#ibcon#*after write, iclass 37, count 0 2006.229.10:28:26.50#ibcon#*before return 0, iclass 37, count 0 2006.229.10:28:26.50#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:26.50#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.10:28:26.50#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:28:26.50#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:28:26.50$vck44/vabw=wide 2006.229.10:28:26.50#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.10:28:26.50#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.10:28:26.50#ibcon#ireg 8 cls_cnt 0 2006.229.10:28:26.50#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:26.50#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:26.50#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:26.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:28:26.50#ibcon#first serial, iclass 39, count 0 2006.229.10:28:26.50#ibcon#enter sib2, iclass 39, count 0 2006.229.10:28:26.50#ibcon#flushed, iclass 39, count 0 2006.229.10:28:26.50#ibcon#about to write, iclass 39, count 0 2006.229.10:28:26.50#ibcon#wrote, iclass 39, count 0 2006.229.10:28:26.50#ibcon#about to read 3, iclass 39, count 0 2006.229.10:28:26.52#ibcon#read 3, iclass 39, count 0 2006.229.10:28:26.52#ibcon#about to read 4, iclass 39, count 0 2006.229.10:28:26.52#ibcon#read 4, iclass 39, count 0 2006.229.10:28:26.52#ibcon#about to read 5, iclass 39, count 0 2006.229.10:28:26.52#ibcon#read 5, iclass 39, count 0 2006.229.10:28:26.52#ibcon#about to read 6, iclass 39, count 0 2006.229.10:28:26.52#ibcon#read 6, iclass 39, count 0 2006.229.10:28:26.52#ibcon#end of sib2, iclass 39, count 0 2006.229.10:28:26.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:28:26.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:28:26.52#ibcon#[25=BW32\r\n] 2006.229.10:28:26.52#ibcon#*before write, iclass 39, count 0 2006.229.10:28:26.52#ibcon#enter sib2, iclass 39, count 0 2006.229.10:28:26.52#ibcon#flushed, iclass 39, count 0 2006.229.10:28:26.52#ibcon#about to write, iclass 39, count 0 2006.229.10:28:26.52#ibcon#wrote, iclass 39, count 0 2006.229.10:28:26.52#ibcon#about to read 3, iclass 39, count 0 2006.229.10:28:26.55#ibcon#read 3, iclass 39, count 0 2006.229.10:28:26.55#ibcon#about to read 4, iclass 39, count 0 2006.229.10:28:26.55#ibcon#read 4, iclass 39, count 0 2006.229.10:28:26.55#ibcon#about to read 5, iclass 39, count 0 2006.229.10:28:26.55#ibcon#read 5, iclass 39, count 0 2006.229.10:28:26.55#ibcon#about to read 6, iclass 39, count 0 2006.229.10:28:26.55#ibcon#read 6, iclass 39, count 0 2006.229.10:28:26.55#ibcon#end of sib2, iclass 39, count 0 2006.229.10:28:26.55#ibcon#*after write, iclass 39, count 0 2006.229.10:28:26.55#ibcon#*before return 0, iclass 39, count 0 2006.229.10:28:26.55#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:26.55#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.10:28:26.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:28:26.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:28:26.55$vck44/vbbw=wide 2006.229.10:28:26.55#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.10:28:26.55#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.10:28:26.55#ibcon#ireg 8 cls_cnt 0 2006.229.10:28:26.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:28:26.62#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:28:26.62#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:28:26.62#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:28:26.62#ibcon#first serial, iclass 3, count 0 2006.229.10:28:26.62#ibcon#enter sib2, iclass 3, count 0 2006.229.10:28:26.62#ibcon#flushed, iclass 3, count 0 2006.229.10:28:26.62#ibcon#about to write, iclass 3, count 0 2006.229.10:28:26.62#ibcon#wrote, iclass 3, count 0 2006.229.10:28:26.62#ibcon#about to read 3, iclass 3, count 0 2006.229.10:28:26.64#ibcon#read 3, iclass 3, count 0 2006.229.10:28:26.64#ibcon#about to read 4, iclass 3, count 0 2006.229.10:28:26.64#ibcon#read 4, iclass 3, count 0 2006.229.10:28:26.64#ibcon#about to read 5, iclass 3, count 0 2006.229.10:28:26.64#ibcon#read 5, iclass 3, count 0 2006.229.10:28:26.64#ibcon#about to read 6, iclass 3, count 0 2006.229.10:28:26.64#ibcon#read 6, iclass 3, count 0 2006.229.10:28:26.64#ibcon#end of sib2, iclass 3, count 0 2006.229.10:28:26.64#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:28:26.64#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:28:26.64#ibcon#[27=BW32\r\n] 2006.229.10:28:26.64#ibcon#*before write, iclass 3, count 0 2006.229.10:28:26.64#ibcon#enter sib2, iclass 3, count 0 2006.229.10:28:26.64#ibcon#flushed, iclass 3, count 0 2006.229.10:28:26.64#ibcon#about to write, iclass 3, count 0 2006.229.10:28:26.64#ibcon#wrote, iclass 3, count 0 2006.229.10:28:26.64#ibcon#about to read 3, iclass 3, count 0 2006.229.10:28:26.67#ibcon#read 3, iclass 3, count 0 2006.229.10:28:26.67#ibcon#about to read 4, iclass 3, count 0 2006.229.10:28:26.67#ibcon#read 4, iclass 3, count 0 2006.229.10:28:26.67#ibcon#about to read 5, iclass 3, count 0 2006.229.10:28:26.67#ibcon#read 5, iclass 3, count 0 2006.229.10:28:26.67#ibcon#about to read 6, iclass 3, count 0 2006.229.10:28:26.67#ibcon#read 6, iclass 3, count 0 2006.229.10:28:26.67#ibcon#end of sib2, iclass 3, count 0 2006.229.10:28:26.67#ibcon#*after write, iclass 3, count 0 2006.229.10:28:26.67#ibcon#*before return 0, iclass 3, count 0 2006.229.10:28:26.67#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:28:26.67#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:28:26.67#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:28:26.67#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:28:26.67$setupk4/ifdk4 2006.229.10:28:26.67$ifdk4/lo= 2006.229.10:28:26.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:28:26.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:28:26.67$ifdk4/patch= 2006.229.10:28:26.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:28:26.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:28:26.67$setupk4/!*+20s 2006.229.10:28:31.81#abcon#<5=/04 1.3 2.3 28.56 981001.5\r\n> 2006.229.10:28:31.83#abcon#{5=INTERFACE CLEAR} 2006.229.10:28:31.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:28:41.11$setupk4/"tpicd 2006.229.10:28:41.11$setupk4/echo=off 2006.229.10:28:41.11$setupk4/xlog=off 2006.229.10:28:41.11:!2006.229.10:33:41 2006.229.10:28:48.14#trakl#Source acquired 2006.229.10:28:50.14#flagr#flagr/antenna,acquired 2006.229.10:33:41.01:preob 2006.229.10:33:42.14/onsource/TRACKING 2006.229.10:33:42.14:!2006.229.10:33:51 2006.229.10:33:51.00:"tape 2006.229.10:33:51.00:"st=record 2006.229.10:33:51.00:data_valid=on 2006.229.10:33:51.00:midob 2006.229.10:33:51.14/onsource/TRACKING 2006.229.10:33:51.15/wx/28.51,1001.6,98 2006.229.10:33:51.29/cable/+6.4023E-03 2006.229.10:33:52.38/va/01,08,usb,yes,34,37 2006.229.10:33:52.38/va/02,07,usb,yes,37,38 2006.229.10:33:52.38/va/03,06,usb,yes,46,49 2006.229.10:33:52.38/va/04,07,usb,yes,39,40 2006.229.10:33:52.38/va/05,04,usb,yes,34,35 2006.229.10:33:52.38/va/06,04,usb,yes,39,38 2006.229.10:33:52.38/va/07,05,usb,yes,34,35 2006.229.10:33:52.38/va/08,06,usb,yes,25,31 2006.229.10:33:52.61/valo/01,524.99,yes,locked 2006.229.10:33:52.61/valo/02,534.99,yes,locked 2006.229.10:33:52.61/valo/03,564.99,yes,locked 2006.229.10:33:52.61/valo/04,624.99,yes,locked 2006.229.10:33:52.61/valo/05,734.99,yes,locked 2006.229.10:33:52.61/valo/06,814.99,yes,locked 2006.229.10:33:52.61/valo/07,864.99,yes,locked 2006.229.10:33:52.61/valo/08,884.99,yes,locked 2006.229.10:33:53.70/vb/01,04,usb,yes,34,31 2006.229.10:33:53.70/vb/02,04,usb,yes,36,36 2006.229.10:33:53.70/vb/03,04,usb,yes,33,36 2006.229.10:33:53.70/vb/04,04,usb,yes,38,37 2006.229.10:33:53.70/vb/05,04,usb,yes,30,32 2006.229.10:33:53.70/vb/06,04,usb,yes,35,30 2006.229.10:33:53.70/vb/07,04,usb,yes,34,34 2006.229.10:33:53.70/vb/08,04,usb,yes,32,35 2006.229.10:33:53.94/vblo/01,629.99,yes,locked 2006.229.10:33:53.94/vblo/02,634.99,yes,locked 2006.229.10:33:53.94/vblo/03,649.99,yes,locked 2006.229.10:33:53.94/vblo/04,679.99,yes,locked 2006.229.10:33:53.94/vblo/05,709.99,yes,locked 2006.229.10:33:53.94/vblo/06,719.99,yes,locked 2006.229.10:33:53.94/vblo/07,734.99,yes,locked 2006.229.10:33:53.94/vblo/08,744.99,yes,locked 2006.229.10:33:54.09/vabw/8 2006.229.10:33:54.24/vbbw/8 2006.229.10:33:54.33/xfe/off,on,12.0 2006.229.10:33:54.72/ifatt/23,28,28,28 2006.229.10:33:55.07/fmout-gps/S +4.45E-07 2006.229.10:33:55.12:!2006.229.10:34:31 2006.229.10:34:31.01:data_valid=off 2006.229.10:34:31.02:"et 2006.229.10:34:31.02:!+3s 2006.229.10:34:34.04:"tape 2006.229.10:34:34.04:postob 2006.229.10:34:34.26/cable/+6.4024E-03 2006.229.10:34:34.26/wx/28.50,1001.6,98 2006.229.10:34:34.32/fmout-gps/S +4.46E-07 2006.229.10:34:34.32:scan_name=229-1035,jd0608,40 2006.229.10:34:34.32:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.10:34:36.14#flagr#flagr/antenna,new-source 2006.229.10:34:36.15:checkk5 2006.229.10:34:36.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:34:36.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:34:37.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:34:37.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:34:38.09/chk_obsdata//k5ts1/T2291033??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:34:38.49/chk_obsdata//k5ts2/T2291033??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:34:38.90/chk_obsdata//k5ts3/T2291033??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:34:39.30/chk_obsdata//k5ts4/T2291033??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:34:40.02/k5log//k5ts1_log_newline 2006.229.10:34:40.72/k5log//k5ts2_log_newline 2006.229.10:34:41.43/k5log//k5ts3_log_newline 2006.229.10:34:42.13/k5log//k5ts4_log_newline 2006.229.10:34:42.15/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:34:42.15:setupk4=1 2006.229.10:34:42.15$setupk4/echo=on 2006.229.10:34:42.15$setupk4/pcalon 2006.229.10:34:42.15$pcalon/"no phase cal control is implemented here 2006.229.10:34:42.15$setupk4/"tpicd=stop 2006.229.10:34:42.15$setupk4/"rec=synch_on 2006.229.10:34:42.15$setupk4/"rec_mode=128 2006.229.10:34:42.15$setupk4/!* 2006.229.10:34:42.15$setupk4/recpk4 2006.229.10:34:42.15$recpk4/recpatch= 2006.229.10:34:42.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:34:42.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:34:42.16$setupk4/vck44 2006.229.10:34:42.16$vck44/valo=1,524.99 2006.229.10:34:42.16#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.10:34:42.16#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.10:34:42.16#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:42.16#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:42.16#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:42.16#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:42.16#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:34:42.16#ibcon#first serial, iclass 14, count 0 2006.229.10:34:42.16#ibcon#enter sib2, iclass 14, count 0 2006.229.10:34:42.16#ibcon#flushed, iclass 14, count 0 2006.229.10:34:42.16#ibcon#about to write, iclass 14, count 0 2006.229.10:34:42.16#ibcon#wrote, iclass 14, count 0 2006.229.10:34:42.16#ibcon#about to read 3, iclass 14, count 0 2006.229.10:34:42.17#ibcon#read 3, iclass 14, count 0 2006.229.10:34:42.17#ibcon#about to read 4, iclass 14, count 0 2006.229.10:34:42.17#ibcon#read 4, iclass 14, count 0 2006.229.10:34:42.17#ibcon#about to read 5, iclass 14, count 0 2006.229.10:34:42.17#ibcon#read 5, iclass 14, count 0 2006.229.10:34:42.17#ibcon#about to read 6, iclass 14, count 0 2006.229.10:34:42.17#ibcon#read 6, iclass 14, count 0 2006.229.10:34:42.17#ibcon#end of sib2, iclass 14, count 0 2006.229.10:34:42.17#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:34:42.17#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:34:42.17#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:34:42.17#ibcon#*before write, iclass 14, count 0 2006.229.10:34:42.17#ibcon#enter sib2, iclass 14, count 0 2006.229.10:34:42.17#ibcon#flushed, iclass 14, count 0 2006.229.10:34:42.17#ibcon#about to write, iclass 14, count 0 2006.229.10:34:42.17#ibcon#wrote, iclass 14, count 0 2006.229.10:34:42.17#ibcon#about to read 3, iclass 14, count 0 2006.229.10:34:42.22#ibcon#read 3, iclass 14, count 0 2006.229.10:34:42.22#ibcon#about to read 4, iclass 14, count 0 2006.229.10:34:42.22#ibcon#read 4, iclass 14, count 0 2006.229.10:34:42.22#ibcon#about to read 5, iclass 14, count 0 2006.229.10:34:42.22#ibcon#read 5, iclass 14, count 0 2006.229.10:34:42.22#ibcon#about to read 6, iclass 14, count 0 2006.229.10:34:42.22#ibcon#read 6, iclass 14, count 0 2006.229.10:34:42.22#ibcon#end of sib2, iclass 14, count 0 2006.229.10:34:42.22#ibcon#*after write, iclass 14, count 0 2006.229.10:34:42.22#ibcon#*before return 0, iclass 14, count 0 2006.229.10:34:42.22#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:42.22#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:42.22#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:34:42.22#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:34:42.22$vck44/va=1,8 2006.229.10:34:42.22#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.10:34:42.22#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.10:34:42.22#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:42.22#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:42.22#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:42.22#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:42.22#ibcon#enter wrdev, iclass 16, count 2 2006.229.10:34:42.22#ibcon#first serial, iclass 16, count 2 2006.229.10:34:42.22#ibcon#enter sib2, iclass 16, count 2 2006.229.10:34:42.22#ibcon#flushed, iclass 16, count 2 2006.229.10:34:42.22#ibcon#about to write, iclass 16, count 2 2006.229.10:34:42.22#ibcon#wrote, iclass 16, count 2 2006.229.10:34:42.22#ibcon#about to read 3, iclass 16, count 2 2006.229.10:34:42.24#ibcon#read 3, iclass 16, count 2 2006.229.10:34:42.24#ibcon#about to read 4, iclass 16, count 2 2006.229.10:34:42.24#ibcon#read 4, iclass 16, count 2 2006.229.10:34:42.24#ibcon#about to read 5, iclass 16, count 2 2006.229.10:34:42.24#ibcon#read 5, iclass 16, count 2 2006.229.10:34:42.24#ibcon#about to read 6, iclass 16, count 2 2006.229.10:34:42.24#ibcon#read 6, iclass 16, count 2 2006.229.10:34:42.24#ibcon#end of sib2, iclass 16, count 2 2006.229.10:34:42.24#ibcon#*mode == 0, iclass 16, count 2 2006.229.10:34:42.24#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.10:34:42.24#ibcon#[25=AT01-08\r\n] 2006.229.10:34:42.24#ibcon#*before write, iclass 16, count 2 2006.229.10:34:42.24#ibcon#enter sib2, iclass 16, count 2 2006.229.10:34:42.24#ibcon#flushed, iclass 16, count 2 2006.229.10:34:42.24#ibcon#about to write, iclass 16, count 2 2006.229.10:34:42.24#ibcon#wrote, iclass 16, count 2 2006.229.10:34:42.24#ibcon#about to read 3, iclass 16, count 2 2006.229.10:34:42.27#ibcon#read 3, iclass 16, count 2 2006.229.10:34:42.27#ibcon#about to read 4, iclass 16, count 2 2006.229.10:34:42.27#ibcon#read 4, iclass 16, count 2 2006.229.10:34:42.27#ibcon#about to read 5, iclass 16, count 2 2006.229.10:34:42.27#ibcon#read 5, iclass 16, count 2 2006.229.10:34:42.27#ibcon#about to read 6, iclass 16, count 2 2006.229.10:34:42.27#ibcon#read 6, iclass 16, count 2 2006.229.10:34:42.27#ibcon#end of sib2, iclass 16, count 2 2006.229.10:34:42.27#ibcon#*after write, iclass 16, count 2 2006.229.10:34:42.27#ibcon#*before return 0, iclass 16, count 2 2006.229.10:34:42.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:42.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:42.27#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.10:34:42.27#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:42.27#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:42.39#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:42.39#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:42.39#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:34:42.39#ibcon#first serial, iclass 16, count 0 2006.229.10:34:42.39#ibcon#enter sib2, iclass 16, count 0 2006.229.10:34:42.39#ibcon#flushed, iclass 16, count 0 2006.229.10:34:42.39#ibcon#about to write, iclass 16, count 0 2006.229.10:34:42.39#ibcon#wrote, iclass 16, count 0 2006.229.10:34:42.39#ibcon#about to read 3, iclass 16, count 0 2006.229.10:34:42.41#ibcon#read 3, iclass 16, count 0 2006.229.10:34:42.41#ibcon#about to read 4, iclass 16, count 0 2006.229.10:34:42.41#ibcon#read 4, iclass 16, count 0 2006.229.10:34:42.41#ibcon#about to read 5, iclass 16, count 0 2006.229.10:34:42.41#ibcon#read 5, iclass 16, count 0 2006.229.10:34:42.41#ibcon#about to read 6, iclass 16, count 0 2006.229.10:34:42.41#ibcon#read 6, iclass 16, count 0 2006.229.10:34:42.41#ibcon#end of sib2, iclass 16, count 0 2006.229.10:34:42.41#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:34:42.41#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:34:42.41#ibcon#[25=USB\r\n] 2006.229.10:34:42.41#ibcon#*before write, iclass 16, count 0 2006.229.10:34:42.41#ibcon#enter sib2, iclass 16, count 0 2006.229.10:34:42.41#ibcon#flushed, iclass 16, count 0 2006.229.10:34:42.41#ibcon#about to write, iclass 16, count 0 2006.229.10:34:42.41#ibcon#wrote, iclass 16, count 0 2006.229.10:34:42.41#ibcon#about to read 3, iclass 16, count 0 2006.229.10:34:42.44#ibcon#read 3, iclass 16, count 0 2006.229.10:34:42.44#ibcon#about to read 4, iclass 16, count 0 2006.229.10:34:42.44#ibcon#read 4, iclass 16, count 0 2006.229.10:34:42.44#ibcon#about to read 5, iclass 16, count 0 2006.229.10:34:42.44#ibcon#read 5, iclass 16, count 0 2006.229.10:34:42.44#ibcon#about to read 6, iclass 16, count 0 2006.229.10:34:42.44#ibcon#read 6, iclass 16, count 0 2006.229.10:34:42.44#ibcon#end of sib2, iclass 16, count 0 2006.229.10:34:42.44#ibcon#*after write, iclass 16, count 0 2006.229.10:34:42.44#ibcon#*before return 0, iclass 16, count 0 2006.229.10:34:42.44#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:42.44#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:42.44#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:34:42.44#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:34:42.44$vck44/valo=2,534.99 2006.229.10:34:42.44#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.10:34:42.44#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.10:34:42.44#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:42.44#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:42.44#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:42.44#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:42.44#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:34:42.44#ibcon#first serial, iclass 18, count 0 2006.229.10:34:42.44#ibcon#enter sib2, iclass 18, count 0 2006.229.10:34:42.44#ibcon#flushed, iclass 18, count 0 2006.229.10:34:42.44#ibcon#about to write, iclass 18, count 0 2006.229.10:34:42.44#ibcon#wrote, iclass 18, count 0 2006.229.10:34:42.44#ibcon#about to read 3, iclass 18, count 0 2006.229.10:34:42.46#ibcon#read 3, iclass 18, count 0 2006.229.10:34:42.46#ibcon#about to read 4, iclass 18, count 0 2006.229.10:34:42.46#ibcon#read 4, iclass 18, count 0 2006.229.10:34:42.46#ibcon#about to read 5, iclass 18, count 0 2006.229.10:34:42.46#ibcon#read 5, iclass 18, count 0 2006.229.10:34:42.46#ibcon#about to read 6, iclass 18, count 0 2006.229.10:34:42.46#ibcon#read 6, iclass 18, count 0 2006.229.10:34:42.46#ibcon#end of sib2, iclass 18, count 0 2006.229.10:34:42.46#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:34:42.46#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:34:42.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:34:42.46#ibcon#*before write, iclass 18, count 0 2006.229.10:34:42.46#ibcon#enter sib2, iclass 18, count 0 2006.229.10:34:42.46#ibcon#flushed, iclass 18, count 0 2006.229.10:34:42.46#ibcon#about to write, iclass 18, count 0 2006.229.10:34:42.46#ibcon#wrote, iclass 18, count 0 2006.229.10:34:42.46#ibcon#about to read 3, iclass 18, count 0 2006.229.10:34:42.50#ibcon#read 3, iclass 18, count 0 2006.229.10:34:42.50#ibcon#about to read 4, iclass 18, count 0 2006.229.10:34:42.50#ibcon#read 4, iclass 18, count 0 2006.229.10:34:42.50#ibcon#about to read 5, iclass 18, count 0 2006.229.10:34:42.50#ibcon#read 5, iclass 18, count 0 2006.229.10:34:42.50#ibcon#about to read 6, iclass 18, count 0 2006.229.10:34:42.50#ibcon#read 6, iclass 18, count 0 2006.229.10:34:42.50#ibcon#end of sib2, iclass 18, count 0 2006.229.10:34:42.50#ibcon#*after write, iclass 18, count 0 2006.229.10:34:42.50#ibcon#*before return 0, iclass 18, count 0 2006.229.10:34:42.50#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:42.50#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:42.50#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:34:42.50#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:34:42.50$vck44/va=2,7 2006.229.10:34:42.50#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.10:34:42.50#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.10:34:42.50#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:42.50#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:42.56#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:42.56#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:42.56#ibcon#enter wrdev, iclass 20, count 2 2006.229.10:34:42.56#ibcon#first serial, iclass 20, count 2 2006.229.10:34:42.56#ibcon#enter sib2, iclass 20, count 2 2006.229.10:34:42.56#ibcon#flushed, iclass 20, count 2 2006.229.10:34:42.56#ibcon#about to write, iclass 20, count 2 2006.229.10:34:42.56#ibcon#wrote, iclass 20, count 2 2006.229.10:34:42.56#ibcon#about to read 3, iclass 20, count 2 2006.229.10:34:42.58#ibcon#read 3, iclass 20, count 2 2006.229.10:34:42.58#ibcon#about to read 4, iclass 20, count 2 2006.229.10:34:42.58#ibcon#read 4, iclass 20, count 2 2006.229.10:34:42.58#ibcon#about to read 5, iclass 20, count 2 2006.229.10:34:42.58#ibcon#read 5, iclass 20, count 2 2006.229.10:34:42.58#ibcon#about to read 6, iclass 20, count 2 2006.229.10:34:42.58#ibcon#read 6, iclass 20, count 2 2006.229.10:34:42.58#ibcon#end of sib2, iclass 20, count 2 2006.229.10:34:42.58#ibcon#*mode == 0, iclass 20, count 2 2006.229.10:34:42.58#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.10:34:42.58#ibcon#[25=AT02-07\r\n] 2006.229.10:34:42.58#ibcon#*before write, iclass 20, count 2 2006.229.10:34:42.58#ibcon#enter sib2, iclass 20, count 2 2006.229.10:34:42.58#ibcon#flushed, iclass 20, count 2 2006.229.10:34:42.58#ibcon#about to write, iclass 20, count 2 2006.229.10:34:42.58#ibcon#wrote, iclass 20, count 2 2006.229.10:34:42.58#ibcon#about to read 3, iclass 20, count 2 2006.229.10:34:42.61#ibcon#read 3, iclass 20, count 2 2006.229.10:34:42.61#ibcon#about to read 4, iclass 20, count 2 2006.229.10:34:42.61#ibcon#read 4, iclass 20, count 2 2006.229.10:34:42.61#ibcon#about to read 5, iclass 20, count 2 2006.229.10:34:42.61#ibcon#read 5, iclass 20, count 2 2006.229.10:34:42.61#ibcon#about to read 6, iclass 20, count 2 2006.229.10:34:42.61#ibcon#read 6, iclass 20, count 2 2006.229.10:34:42.61#ibcon#end of sib2, iclass 20, count 2 2006.229.10:34:42.61#ibcon#*after write, iclass 20, count 2 2006.229.10:34:42.61#ibcon#*before return 0, iclass 20, count 2 2006.229.10:34:42.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:42.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:42.61#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.10:34:42.61#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:42.61#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:42.73#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:42.73#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:42.73#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:34:42.73#ibcon#first serial, iclass 20, count 0 2006.229.10:34:42.73#ibcon#enter sib2, iclass 20, count 0 2006.229.10:34:42.73#ibcon#flushed, iclass 20, count 0 2006.229.10:34:42.73#ibcon#about to write, iclass 20, count 0 2006.229.10:34:42.73#ibcon#wrote, iclass 20, count 0 2006.229.10:34:42.73#ibcon#about to read 3, iclass 20, count 0 2006.229.10:34:42.75#ibcon#read 3, iclass 20, count 0 2006.229.10:34:42.75#ibcon#about to read 4, iclass 20, count 0 2006.229.10:34:42.75#ibcon#read 4, iclass 20, count 0 2006.229.10:34:42.75#ibcon#about to read 5, iclass 20, count 0 2006.229.10:34:42.75#ibcon#read 5, iclass 20, count 0 2006.229.10:34:42.75#ibcon#about to read 6, iclass 20, count 0 2006.229.10:34:42.75#ibcon#read 6, iclass 20, count 0 2006.229.10:34:42.75#ibcon#end of sib2, iclass 20, count 0 2006.229.10:34:42.75#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:34:42.75#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:34:42.75#ibcon#[25=USB\r\n] 2006.229.10:34:42.75#ibcon#*before write, iclass 20, count 0 2006.229.10:34:42.75#ibcon#enter sib2, iclass 20, count 0 2006.229.10:34:42.75#ibcon#flushed, iclass 20, count 0 2006.229.10:34:42.75#ibcon#about to write, iclass 20, count 0 2006.229.10:34:42.75#ibcon#wrote, iclass 20, count 0 2006.229.10:34:42.75#ibcon#about to read 3, iclass 20, count 0 2006.229.10:34:42.78#ibcon#read 3, iclass 20, count 0 2006.229.10:34:42.78#ibcon#about to read 4, iclass 20, count 0 2006.229.10:34:42.78#ibcon#read 4, iclass 20, count 0 2006.229.10:34:42.78#ibcon#about to read 5, iclass 20, count 0 2006.229.10:34:42.78#ibcon#read 5, iclass 20, count 0 2006.229.10:34:42.78#ibcon#about to read 6, iclass 20, count 0 2006.229.10:34:42.78#ibcon#read 6, iclass 20, count 0 2006.229.10:34:42.78#ibcon#end of sib2, iclass 20, count 0 2006.229.10:34:42.78#ibcon#*after write, iclass 20, count 0 2006.229.10:34:42.78#ibcon#*before return 0, iclass 20, count 0 2006.229.10:34:42.78#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:42.78#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:42.78#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:34:42.78#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:34:42.78$vck44/valo=3,564.99 2006.229.10:34:42.78#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.10:34:42.78#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.10:34:42.78#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:42.78#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:42.78#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:42.78#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:42.78#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:34:42.78#ibcon#first serial, iclass 22, count 0 2006.229.10:34:42.78#ibcon#enter sib2, iclass 22, count 0 2006.229.10:34:42.78#ibcon#flushed, iclass 22, count 0 2006.229.10:34:42.78#ibcon#about to write, iclass 22, count 0 2006.229.10:34:42.78#ibcon#wrote, iclass 22, count 0 2006.229.10:34:42.78#ibcon#about to read 3, iclass 22, count 0 2006.229.10:34:42.80#ibcon#read 3, iclass 22, count 0 2006.229.10:34:42.80#ibcon#about to read 4, iclass 22, count 0 2006.229.10:34:42.80#ibcon#read 4, iclass 22, count 0 2006.229.10:34:42.80#ibcon#about to read 5, iclass 22, count 0 2006.229.10:34:42.80#ibcon#read 5, iclass 22, count 0 2006.229.10:34:42.80#ibcon#about to read 6, iclass 22, count 0 2006.229.10:34:42.80#ibcon#read 6, iclass 22, count 0 2006.229.10:34:42.80#ibcon#end of sib2, iclass 22, count 0 2006.229.10:34:42.80#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:34:42.80#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:34:42.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:34:42.80#ibcon#*before write, iclass 22, count 0 2006.229.10:34:42.80#ibcon#enter sib2, iclass 22, count 0 2006.229.10:34:42.80#ibcon#flushed, iclass 22, count 0 2006.229.10:34:42.80#ibcon#about to write, iclass 22, count 0 2006.229.10:34:42.80#ibcon#wrote, iclass 22, count 0 2006.229.10:34:42.80#ibcon#about to read 3, iclass 22, count 0 2006.229.10:34:42.84#ibcon#read 3, iclass 22, count 0 2006.229.10:34:42.84#ibcon#about to read 4, iclass 22, count 0 2006.229.10:34:42.84#ibcon#read 4, iclass 22, count 0 2006.229.10:34:42.84#ibcon#about to read 5, iclass 22, count 0 2006.229.10:34:42.84#ibcon#read 5, iclass 22, count 0 2006.229.10:34:42.84#ibcon#about to read 6, iclass 22, count 0 2006.229.10:34:42.84#ibcon#read 6, iclass 22, count 0 2006.229.10:34:42.84#ibcon#end of sib2, iclass 22, count 0 2006.229.10:34:42.84#ibcon#*after write, iclass 22, count 0 2006.229.10:34:42.84#ibcon#*before return 0, iclass 22, count 0 2006.229.10:34:42.84#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:42.84#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:42.84#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:34:42.84#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:34:42.84$vck44/va=3,6 2006.229.10:34:42.84#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.10:34:42.84#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.10:34:42.84#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:42.84#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:42.90#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:42.90#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:42.90#ibcon#enter wrdev, iclass 24, count 2 2006.229.10:34:42.90#ibcon#first serial, iclass 24, count 2 2006.229.10:34:42.90#ibcon#enter sib2, iclass 24, count 2 2006.229.10:34:42.90#ibcon#flushed, iclass 24, count 2 2006.229.10:34:42.90#ibcon#about to write, iclass 24, count 2 2006.229.10:34:42.90#ibcon#wrote, iclass 24, count 2 2006.229.10:34:42.90#ibcon#about to read 3, iclass 24, count 2 2006.229.10:34:42.92#ibcon#read 3, iclass 24, count 2 2006.229.10:34:42.92#ibcon#about to read 4, iclass 24, count 2 2006.229.10:34:42.92#ibcon#read 4, iclass 24, count 2 2006.229.10:34:42.92#ibcon#about to read 5, iclass 24, count 2 2006.229.10:34:42.92#ibcon#read 5, iclass 24, count 2 2006.229.10:34:42.92#ibcon#about to read 6, iclass 24, count 2 2006.229.10:34:42.92#ibcon#read 6, iclass 24, count 2 2006.229.10:34:42.92#ibcon#end of sib2, iclass 24, count 2 2006.229.10:34:42.92#ibcon#*mode == 0, iclass 24, count 2 2006.229.10:34:42.92#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.10:34:42.92#ibcon#[25=AT03-06\r\n] 2006.229.10:34:42.92#ibcon#*before write, iclass 24, count 2 2006.229.10:34:42.92#ibcon#enter sib2, iclass 24, count 2 2006.229.10:34:42.92#ibcon#flushed, iclass 24, count 2 2006.229.10:34:42.92#ibcon#about to write, iclass 24, count 2 2006.229.10:34:42.92#ibcon#wrote, iclass 24, count 2 2006.229.10:34:42.92#ibcon#about to read 3, iclass 24, count 2 2006.229.10:34:42.95#ibcon#read 3, iclass 24, count 2 2006.229.10:34:42.95#ibcon#about to read 4, iclass 24, count 2 2006.229.10:34:42.95#ibcon#read 4, iclass 24, count 2 2006.229.10:34:42.95#ibcon#about to read 5, iclass 24, count 2 2006.229.10:34:42.95#ibcon#read 5, iclass 24, count 2 2006.229.10:34:42.95#ibcon#about to read 6, iclass 24, count 2 2006.229.10:34:42.95#ibcon#read 6, iclass 24, count 2 2006.229.10:34:42.95#ibcon#end of sib2, iclass 24, count 2 2006.229.10:34:42.95#ibcon#*after write, iclass 24, count 2 2006.229.10:34:42.95#ibcon#*before return 0, iclass 24, count 2 2006.229.10:34:42.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:42.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:42.95#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.10:34:42.95#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:42.95#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:43.07#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:43.07#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:43.07#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:34:43.07#ibcon#first serial, iclass 24, count 0 2006.229.10:34:43.07#ibcon#enter sib2, iclass 24, count 0 2006.229.10:34:43.07#ibcon#flushed, iclass 24, count 0 2006.229.10:34:43.07#ibcon#about to write, iclass 24, count 0 2006.229.10:34:43.07#ibcon#wrote, iclass 24, count 0 2006.229.10:34:43.07#ibcon#about to read 3, iclass 24, count 0 2006.229.10:34:43.09#ibcon#read 3, iclass 24, count 0 2006.229.10:34:43.09#ibcon#about to read 4, iclass 24, count 0 2006.229.10:34:43.09#ibcon#read 4, iclass 24, count 0 2006.229.10:34:43.09#ibcon#about to read 5, iclass 24, count 0 2006.229.10:34:43.09#ibcon#read 5, iclass 24, count 0 2006.229.10:34:43.09#ibcon#about to read 6, iclass 24, count 0 2006.229.10:34:43.09#ibcon#read 6, iclass 24, count 0 2006.229.10:34:43.09#ibcon#end of sib2, iclass 24, count 0 2006.229.10:34:43.09#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:34:43.09#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:34:43.09#ibcon#[25=USB\r\n] 2006.229.10:34:43.09#ibcon#*before write, iclass 24, count 0 2006.229.10:34:43.09#ibcon#enter sib2, iclass 24, count 0 2006.229.10:34:43.09#ibcon#flushed, iclass 24, count 0 2006.229.10:34:43.09#ibcon#about to write, iclass 24, count 0 2006.229.10:34:43.09#ibcon#wrote, iclass 24, count 0 2006.229.10:34:43.09#ibcon#about to read 3, iclass 24, count 0 2006.229.10:34:43.12#ibcon#read 3, iclass 24, count 0 2006.229.10:34:43.12#ibcon#about to read 4, iclass 24, count 0 2006.229.10:34:43.12#ibcon#read 4, iclass 24, count 0 2006.229.10:34:43.12#ibcon#about to read 5, iclass 24, count 0 2006.229.10:34:43.12#ibcon#read 5, iclass 24, count 0 2006.229.10:34:43.12#ibcon#about to read 6, iclass 24, count 0 2006.229.10:34:43.12#ibcon#read 6, iclass 24, count 0 2006.229.10:34:43.12#ibcon#end of sib2, iclass 24, count 0 2006.229.10:34:43.12#ibcon#*after write, iclass 24, count 0 2006.229.10:34:43.12#ibcon#*before return 0, iclass 24, count 0 2006.229.10:34:43.12#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:43.12#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:43.12#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:34:43.12#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:34:43.12$vck44/valo=4,624.99 2006.229.10:34:43.12#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.10:34:43.12#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.10:34:43.12#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:43.12#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:43.12#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:43.12#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:43.12#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:34:43.12#ibcon#first serial, iclass 26, count 0 2006.229.10:34:43.12#ibcon#enter sib2, iclass 26, count 0 2006.229.10:34:43.12#ibcon#flushed, iclass 26, count 0 2006.229.10:34:43.12#ibcon#about to write, iclass 26, count 0 2006.229.10:34:43.12#ibcon#wrote, iclass 26, count 0 2006.229.10:34:43.12#ibcon#about to read 3, iclass 26, count 0 2006.229.10:34:43.14#ibcon#read 3, iclass 26, count 0 2006.229.10:34:43.14#ibcon#about to read 4, iclass 26, count 0 2006.229.10:34:43.14#ibcon#read 4, iclass 26, count 0 2006.229.10:34:43.14#ibcon#about to read 5, iclass 26, count 0 2006.229.10:34:43.14#ibcon#read 5, iclass 26, count 0 2006.229.10:34:43.14#ibcon#about to read 6, iclass 26, count 0 2006.229.10:34:43.14#ibcon#read 6, iclass 26, count 0 2006.229.10:34:43.14#ibcon#end of sib2, iclass 26, count 0 2006.229.10:34:43.14#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:34:43.14#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:34:43.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:34:43.14#ibcon#*before write, iclass 26, count 0 2006.229.10:34:43.14#ibcon#enter sib2, iclass 26, count 0 2006.229.10:34:43.14#ibcon#flushed, iclass 26, count 0 2006.229.10:34:43.14#ibcon#about to write, iclass 26, count 0 2006.229.10:34:43.14#ibcon#wrote, iclass 26, count 0 2006.229.10:34:43.14#ibcon#about to read 3, iclass 26, count 0 2006.229.10:34:43.18#ibcon#read 3, iclass 26, count 0 2006.229.10:34:43.18#ibcon#about to read 4, iclass 26, count 0 2006.229.10:34:43.18#ibcon#read 4, iclass 26, count 0 2006.229.10:34:43.18#ibcon#about to read 5, iclass 26, count 0 2006.229.10:34:43.18#ibcon#read 5, iclass 26, count 0 2006.229.10:34:43.18#ibcon#about to read 6, iclass 26, count 0 2006.229.10:34:43.18#ibcon#read 6, iclass 26, count 0 2006.229.10:34:43.18#ibcon#end of sib2, iclass 26, count 0 2006.229.10:34:43.18#ibcon#*after write, iclass 26, count 0 2006.229.10:34:43.18#ibcon#*before return 0, iclass 26, count 0 2006.229.10:34:43.18#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:43.18#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:43.18#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:34:43.18#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:34:43.18$vck44/va=4,7 2006.229.10:34:43.18#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.10:34:43.18#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.10:34:43.18#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:43.18#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:43.24#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:43.24#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:43.24#ibcon#enter wrdev, iclass 28, count 2 2006.229.10:34:43.24#ibcon#first serial, iclass 28, count 2 2006.229.10:34:43.24#ibcon#enter sib2, iclass 28, count 2 2006.229.10:34:43.24#ibcon#flushed, iclass 28, count 2 2006.229.10:34:43.24#ibcon#about to write, iclass 28, count 2 2006.229.10:34:43.24#ibcon#wrote, iclass 28, count 2 2006.229.10:34:43.24#ibcon#about to read 3, iclass 28, count 2 2006.229.10:34:43.26#ibcon#read 3, iclass 28, count 2 2006.229.10:34:43.26#ibcon#about to read 4, iclass 28, count 2 2006.229.10:34:43.26#ibcon#read 4, iclass 28, count 2 2006.229.10:34:43.26#ibcon#about to read 5, iclass 28, count 2 2006.229.10:34:43.26#ibcon#read 5, iclass 28, count 2 2006.229.10:34:43.26#ibcon#about to read 6, iclass 28, count 2 2006.229.10:34:43.26#ibcon#read 6, iclass 28, count 2 2006.229.10:34:43.26#ibcon#end of sib2, iclass 28, count 2 2006.229.10:34:43.26#ibcon#*mode == 0, iclass 28, count 2 2006.229.10:34:43.26#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.10:34:43.26#ibcon#[25=AT04-07\r\n] 2006.229.10:34:43.26#ibcon#*before write, iclass 28, count 2 2006.229.10:34:43.26#ibcon#enter sib2, iclass 28, count 2 2006.229.10:34:43.26#ibcon#flushed, iclass 28, count 2 2006.229.10:34:43.26#ibcon#about to write, iclass 28, count 2 2006.229.10:34:43.26#ibcon#wrote, iclass 28, count 2 2006.229.10:34:43.26#ibcon#about to read 3, iclass 28, count 2 2006.229.10:34:43.29#ibcon#read 3, iclass 28, count 2 2006.229.10:34:43.29#ibcon#about to read 4, iclass 28, count 2 2006.229.10:34:43.29#ibcon#read 4, iclass 28, count 2 2006.229.10:34:43.29#ibcon#about to read 5, iclass 28, count 2 2006.229.10:34:43.29#ibcon#read 5, iclass 28, count 2 2006.229.10:34:43.29#ibcon#about to read 6, iclass 28, count 2 2006.229.10:34:43.29#ibcon#read 6, iclass 28, count 2 2006.229.10:34:43.29#ibcon#end of sib2, iclass 28, count 2 2006.229.10:34:43.29#ibcon#*after write, iclass 28, count 2 2006.229.10:34:43.29#ibcon#*before return 0, iclass 28, count 2 2006.229.10:34:43.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:43.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:43.29#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.10:34:43.29#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:43.29#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:43.41#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:43.41#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:43.41#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:34:43.41#ibcon#first serial, iclass 28, count 0 2006.229.10:34:43.41#ibcon#enter sib2, iclass 28, count 0 2006.229.10:34:43.41#ibcon#flushed, iclass 28, count 0 2006.229.10:34:43.41#ibcon#about to write, iclass 28, count 0 2006.229.10:34:43.41#ibcon#wrote, iclass 28, count 0 2006.229.10:34:43.41#ibcon#about to read 3, iclass 28, count 0 2006.229.10:34:43.43#ibcon#read 3, iclass 28, count 0 2006.229.10:34:43.43#ibcon#about to read 4, iclass 28, count 0 2006.229.10:34:43.43#ibcon#read 4, iclass 28, count 0 2006.229.10:34:43.43#ibcon#about to read 5, iclass 28, count 0 2006.229.10:34:43.43#ibcon#read 5, iclass 28, count 0 2006.229.10:34:43.43#ibcon#about to read 6, iclass 28, count 0 2006.229.10:34:43.43#ibcon#read 6, iclass 28, count 0 2006.229.10:34:43.43#ibcon#end of sib2, iclass 28, count 0 2006.229.10:34:43.43#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:34:43.43#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:34:43.43#ibcon#[25=USB\r\n] 2006.229.10:34:43.43#ibcon#*before write, iclass 28, count 0 2006.229.10:34:43.43#ibcon#enter sib2, iclass 28, count 0 2006.229.10:34:43.43#ibcon#flushed, iclass 28, count 0 2006.229.10:34:43.43#ibcon#about to write, iclass 28, count 0 2006.229.10:34:43.43#ibcon#wrote, iclass 28, count 0 2006.229.10:34:43.43#ibcon#about to read 3, iclass 28, count 0 2006.229.10:34:43.46#ibcon#read 3, iclass 28, count 0 2006.229.10:34:43.46#ibcon#about to read 4, iclass 28, count 0 2006.229.10:34:43.46#ibcon#read 4, iclass 28, count 0 2006.229.10:34:43.46#ibcon#about to read 5, iclass 28, count 0 2006.229.10:34:43.46#ibcon#read 5, iclass 28, count 0 2006.229.10:34:43.46#ibcon#about to read 6, iclass 28, count 0 2006.229.10:34:43.46#ibcon#read 6, iclass 28, count 0 2006.229.10:34:43.46#ibcon#end of sib2, iclass 28, count 0 2006.229.10:34:43.46#ibcon#*after write, iclass 28, count 0 2006.229.10:34:43.46#ibcon#*before return 0, iclass 28, count 0 2006.229.10:34:43.46#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:43.46#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:43.46#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:34:43.46#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:34:43.46$vck44/valo=5,734.99 2006.229.10:34:43.46#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:34:43.46#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:34:43.46#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:43.46#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:43.46#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:43.46#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:43.46#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:34:43.46#ibcon#first serial, iclass 30, count 0 2006.229.10:34:43.46#ibcon#enter sib2, iclass 30, count 0 2006.229.10:34:43.46#ibcon#flushed, iclass 30, count 0 2006.229.10:34:43.46#ibcon#about to write, iclass 30, count 0 2006.229.10:34:43.46#ibcon#wrote, iclass 30, count 0 2006.229.10:34:43.46#ibcon#about to read 3, iclass 30, count 0 2006.229.10:34:43.48#ibcon#read 3, iclass 30, count 0 2006.229.10:34:43.48#ibcon#about to read 4, iclass 30, count 0 2006.229.10:34:43.48#ibcon#read 4, iclass 30, count 0 2006.229.10:34:43.48#ibcon#about to read 5, iclass 30, count 0 2006.229.10:34:43.48#ibcon#read 5, iclass 30, count 0 2006.229.10:34:43.48#ibcon#about to read 6, iclass 30, count 0 2006.229.10:34:43.48#ibcon#read 6, iclass 30, count 0 2006.229.10:34:43.48#ibcon#end of sib2, iclass 30, count 0 2006.229.10:34:43.48#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:34:43.48#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:34:43.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:34:43.48#ibcon#*before write, iclass 30, count 0 2006.229.10:34:43.48#ibcon#enter sib2, iclass 30, count 0 2006.229.10:34:43.48#ibcon#flushed, iclass 30, count 0 2006.229.10:34:43.48#ibcon#about to write, iclass 30, count 0 2006.229.10:34:43.48#ibcon#wrote, iclass 30, count 0 2006.229.10:34:43.48#ibcon#about to read 3, iclass 30, count 0 2006.229.10:34:43.52#ibcon#read 3, iclass 30, count 0 2006.229.10:34:43.52#ibcon#about to read 4, iclass 30, count 0 2006.229.10:34:43.52#ibcon#read 4, iclass 30, count 0 2006.229.10:34:43.52#ibcon#about to read 5, iclass 30, count 0 2006.229.10:34:43.52#ibcon#read 5, iclass 30, count 0 2006.229.10:34:43.52#ibcon#about to read 6, iclass 30, count 0 2006.229.10:34:43.52#ibcon#read 6, iclass 30, count 0 2006.229.10:34:43.52#ibcon#end of sib2, iclass 30, count 0 2006.229.10:34:43.52#ibcon#*after write, iclass 30, count 0 2006.229.10:34:43.52#ibcon#*before return 0, iclass 30, count 0 2006.229.10:34:43.52#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:43.52#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:43.52#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:34:43.52#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:34:43.52$vck44/va=5,4 2006.229.10:34:43.52#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.10:34:43.52#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.10:34:43.52#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:43.52#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:43.58#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:43.58#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:43.58#ibcon#enter wrdev, iclass 32, count 2 2006.229.10:34:43.58#ibcon#first serial, iclass 32, count 2 2006.229.10:34:43.58#ibcon#enter sib2, iclass 32, count 2 2006.229.10:34:43.58#ibcon#flushed, iclass 32, count 2 2006.229.10:34:43.58#ibcon#about to write, iclass 32, count 2 2006.229.10:34:43.58#ibcon#wrote, iclass 32, count 2 2006.229.10:34:43.58#ibcon#about to read 3, iclass 32, count 2 2006.229.10:34:43.60#ibcon#read 3, iclass 32, count 2 2006.229.10:34:43.60#ibcon#about to read 4, iclass 32, count 2 2006.229.10:34:43.60#ibcon#read 4, iclass 32, count 2 2006.229.10:34:43.60#ibcon#about to read 5, iclass 32, count 2 2006.229.10:34:43.60#ibcon#read 5, iclass 32, count 2 2006.229.10:34:43.60#ibcon#about to read 6, iclass 32, count 2 2006.229.10:34:43.60#ibcon#read 6, iclass 32, count 2 2006.229.10:34:43.60#ibcon#end of sib2, iclass 32, count 2 2006.229.10:34:43.60#ibcon#*mode == 0, iclass 32, count 2 2006.229.10:34:43.60#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.10:34:43.60#ibcon#[25=AT05-04\r\n] 2006.229.10:34:43.60#ibcon#*before write, iclass 32, count 2 2006.229.10:34:43.60#ibcon#enter sib2, iclass 32, count 2 2006.229.10:34:43.60#ibcon#flushed, iclass 32, count 2 2006.229.10:34:43.60#ibcon#about to write, iclass 32, count 2 2006.229.10:34:43.60#ibcon#wrote, iclass 32, count 2 2006.229.10:34:43.60#ibcon#about to read 3, iclass 32, count 2 2006.229.10:34:43.63#ibcon#read 3, iclass 32, count 2 2006.229.10:34:43.63#ibcon#about to read 4, iclass 32, count 2 2006.229.10:34:43.63#ibcon#read 4, iclass 32, count 2 2006.229.10:34:43.63#ibcon#about to read 5, iclass 32, count 2 2006.229.10:34:43.63#ibcon#read 5, iclass 32, count 2 2006.229.10:34:43.63#ibcon#about to read 6, iclass 32, count 2 2006.229.10:34:43.63#ibcon#read 6, iclass 32, count 2 2006.229.10:34:43.63#ibcon#end of sib2, iclass 32, count 2 2006.229.10:34:43.63#ibcon#*after write, iclass 32, count 2 2006.229.10:34:43.63#ibcon#*before return 0, iclass 32, count 2 2006.229.10:34:43.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:43.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:43.63#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.10:34:43.63#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:43.63#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:43.75#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:43.75#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:43.75#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:34:43.75#ibcon#first serial, iclass 32, count 0 2006.229.10:34:43.75#ibcon#enter sib2, iclass 32, count 0 2006.229.10:34:43.75#ibcon#flushed, iclass 32, count 0 2006.229.10:34:43.75#ibcon#about to write, iclass 32, count 0 2006.229.10:34:43.75#ibcon#wrote, iclass 32, count 0 2006.229.10:34:43.75#ibcon#about to read 3, iclass 32, count 0 2006.229.10:34:43.77#ibcon#read 3, iclass 32, count 0 2006.229.10:34:43.77#ibcon#about to read 4, iclass 32, count 0 2006.229.10:34:43.77#ibcon#read 4, iclass 32, count 0 2006.229.10:34:43.77#ibcon#about to read 5, iclass 32, count 0 2006.229.10:34:43.77#ibcon#read 5, iclass 32, count 0 2006.229.10:34:43.77#ibcon#about to read 6, iclass 32, count 0 2006.229.10:34:43.77#ibcon#read 6, iclass 32, count 0 2006.229.10:34:43.77#ibcon#end of sib2, iclass 32, count 0 2006.229.10:34:43.77#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:34:43.77#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:34:43.77#ibcon#[25=USB\r\n] 2006.229.10:34:43.77#ibcon#*before write, iclass 32, count 0 2006.229.10:34:43.77#ibcon#enter sib2, iclass 32, count 0 2006.229.10:34:43.77#ibcon#flushed, iclass 32, count 0 2006.229.10:34:43.77#ibcon#about to write, iclass 32, count 0 2006.229.10:34:43.77#ibcon#wrote, iclass 32, count 0 2006.229.10:34:43.77#ibcon#about to read 3, iclass 32, count 0 2006.229.10:34:43.80#ibcon#read 3, iclass 32, count 0 2006.229.10:34:43.80#ibcon#about to read 4, iclass 32, count 0 2006.229.10:34:43.80#ibcon#read 4, iclass 32, count 0 2006.229.10:34:43.80#ibcon#about to read 5, iclass 32, count 0 2006.229.10:34:43.80#ibcon#read 5, iclass 32, count 0 2006.229.10:34:43.80#ibcon#about to read 6, iclass 32, count 0 2006.229.10:34:43.80#ibcon#read 6, iclass 32, count 0 2006.229.10:34:43.80#ibcon#end of sib2, iclass 32, count 0 2006.229.10:34:43.80#ibcon#*after write, iclass 32, count 0 2006.229.10:34:43.80#ibcon#*before return 0, iclass 32, count 0 2006.229.10:34:43.80#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:43.80#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:43.80#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:34:43.80#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:34:43.80$vck44/valo=6,814.99 2006.229.10:34:43.80#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.10:34:43.80#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.10:34:43.80#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:43.80#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:43.80#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:43.80#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:43.80#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:34:43.80#ibcon#first serial, iclass 34, count 0 2006.229.10:34:43.80#ibcon#enter sib2, iclass 34, count 0 2006.229.10:34:43.80#ibcon#flushed, iclass 34, count 0 2006.229.10:34:43.80#ibcon#about to write, iclass 34, count 0 2006.229.10:34:43.80#ibcon#wrote, iclass 34, count 0 2006.229.10:34:43.80#ibcon#about to read 3, iclass 34, count 0 2006.229.10:34:43.82#ibcon#read 3, iclass 34, count 0 2006.229.10:34:43.82#ibcon#about to read 4, iclass 34, count 0 2006.229.10:34:43.82#ibcon#read 4, iclass 34, count 0 2006.229.10:34:43.82#ibcon#about to read 5, iclass 34, count 0 2006.229.10:34:43.82#ibcon#read 5, iclass 34, count 0 2006.229.10:34:43.82#ibcon#about to read 6, iclass 34, count 0 2006.229.10:34:43.82#ibcon#read 6, iclass 34, count 0 2006.229.10:34:43.82#ibcon#end of sib2, iclass 34, count 0 2006.229.10:34:43.82#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:34:43.82#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:34:43.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:34:43.82#ibcon#*before write, iclass 34, count 0 2006.229.10:34:43.82#ibcon#enter sib2, iclass 34, count 0 2006.229.10:34:43.82#ibcon#flushed, iclass 34, count 0 2006.229.10:34:43.82#ibcon#about to write, iclass 34, count 0 2006.229.10:34:43.82#ibcon#wrote, iclass 34, count 0 2006.229.10:34:43.82#ibcon#about to read 3, iclass 34, count 0 2006.229.10:34:43.86#ibcon#read 3, iclass 34, count 0 2006.229.10:34:43.86#ibcon#about to read 4, iclass 34, count 0 2006.229.10:34:43.86#ibcon#read 4, iclass 34, count 0 2006.229.10:34:43.86#ibcon#about to read 5, iclass 34, count 0 2006.229.10:34:43.86#ibcon#read 5, iclass 34, count 0 2006.229.10:34:43.86#ibcon#about to read 6, iclass 34, count 0 2006.229.10:34:43.86#ibcon#read 6, iclass 34, count 0 2006.229.10:34:43.86#ibcon#end of sib2, iclass 34, count 0 2006.229.10:34:43.86#ibcon#*after write, iclass 34, count 0 2006.229.10:34:43.86#ibcon#*before return 0, iclass 34, count 0 2006.229.10:34:43.86#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:43.86#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:43.86#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:34:43.86#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:34:43.86$vck44/va=6,4 2006.229.10:34:43.86#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.10:34:43.86#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.10:34:43.86#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:43.86#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:43.92#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:43.92#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:43.92#ibcon#enter wrdev, iclass 36, count 2 2006.229.10:34:43.92#ibcon#first serial, iclass 36, count 2 2006.229.10:34:43.92#ibcon#enter sib2, iclass 36, count 2 2006.229.10:34:43.92#ibcon#flushed, iclass 36, count 2 2006.229.10:34:43.92#ibcon#about to write, iclass 36, count 2 2006.229.10:34:43.92#ibcon#wrote, iclass 36, count 2 2006.229.10:34:43.92#ibcon#about to read 3, iclass 36, count 2 2006.229.10:34:43.94#ibcon#read 3, iclass 36, count 2 2006.229.10:34:43.94#ibcon#about to read 4, iclass 36, count 2 2006.229.10:34:43.94#ibcon#read 4, iclass 36, count 2 2006.229.10:34:43.94#ibcon#about to read 5, iclass 36, count 2 2006.229.10:34:43.94#ibcon#read 5, iclass 36, count 2 2006.229.10:34:43.94#ibcon#about to read 6, iclass 36, count 2 2006.229.10:34:43.94#ibcon#read 6, iclass 36, count 2 2006.229.10:34:43.94#ibcon#end of sib2, iclass 36, count 2 2006.229.10:34:43.94#ibcon#*mode == 0, iclass 36, count 2 2006.229.10:34:43.94#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.10:34:43.94#ibcon#[25=AT06-04\r\n] 2006.229.10:34:43.94#ibcon#*before write, iclass 36, count 2 2006.229.10:34:43.94#ibcon#enter sib2, iclass 36, count 2 2006.229.10:34:43.94#ibcon#flushed, iclass 36, count 2 2006.229.10:34:43.94#ibcon#about to write, iclass 36, count 2 2006.229.10:34:43.94#ibcon#wrote, iclass 36, count 2 2006.229.10:34:43.94#ibcon#about to read 3, iclass 36, count 2 2006.229.10:34:43.97#ibcon#read 3, iclass 36, count 2 2006.229.10:34:43.97#ibcon#about to read 4, iclass 36, count 2 2006.229.10:34:43.97#ibcon#read 4, iclass 36, count 2 2006.229.10:34:43.97#ibcon#about to read 5, iclass 36, count 2 2006.229.10:34:43.97#ibcon#read 5, iclass 36, count 2 2006.229.10:34:43.97#ibcon#about to read 6, iclass 36, count 2 2006.229.10:34:43.97#ibcon#read 6, iclass 36, count 2 2006.229.10:34:43.97#ibcon#end of sib2, iclass 36, count 2 2006.229.10:34:43.97#ibcon#*after write, iclass 36, count 2 2006.229.10:34:43.97#ibcon#*before return 0, iclass 36, count 2 2006.229.10:34:43.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:43.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:43.97#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.10:34:43.97#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:43.97#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:44.09#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:44.09#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:44.09#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:34:44.09#ibcon#first serial, iclass 36, count 0 2006.229.10:34:44.09#ibcon#enter sib2, iclass 36, count 0 2006.229.10:34:44.09#ibcon#flushed, iclass 36, count 0 2006.229.10:34:44.09#ibcon#about to write, iclass 36, count 0 2006.229.10:34:44.09#ibcon#wrote, iclass 36, count 0 2006.229.10:34:44.09#ibcon#about to read 3, iclass 36, count 0 2006.229.10:34:44.11#ibcon#read 3, iclass 36, count 0 2006.229.10:34:44.11#ibcon#about to read 4, iclass 36, count 0 2006.229.10:34:44.11#ibcon#read 4, iclass 36, count 0 2006.229.10:34:44.11#ibcon#about to read 5, iclass 36, count 0 2006.229.10:34:44.11#ibcon#read 5, iclass 36, count 0 2006.229.10:34:44.11#ibcon#about to read 6, iclass 36, count 0 2006.229.10:34:44.11#ibcon#read 6, iclass 36, count 0 2006.229.10:34:44.11#ibcon#end of sib2, iclass 36, count 0 2006.229.10:34:44.11#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:34:44.11#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:34:44.11#ibcon#[25=USB\r\n] 2006.229.10:34:44.11#ibcon#*before write, iclass 36, count 0 2006.229.10:34:44.11#ibcon#enter sib2, iclass 36, count 0 2006.229.10:34:44.11#ibcon#flushed, iclass 36, count 0 2006.229.10:34:44.11#ibcon#about to write, iclass 36, count 0 2006.229.10:34:44.11#ibcon#wrote, iclass 36, count 0 2006.229.10:34:44.11#ibcon#about to read 3, iclass 36, count 0 2006.229.10:34:44.14#ibcon#read 3, iclass 36, count 0 2006.229.10:34:44.14#ibcon#about to read 4, iclass 36, count 0 2006.229.10:34:44.14#ibcon#read 4, iclass 36, count 0 2006.229.10:34:44.14#ibcon#about to read 5, iclass 36, count 0 2006.229.10:34:44.14#ibcon#read 5, iclass 36, count 0 2006.229.10:34:44.14#ibcon#about to read 6, iclass 36, count 0 2006.229.10:34:44.14#ibcon#read 6, iclass 36, count 0 2006.229.10:34:44.14#ibcon#end of sib2, iclass 36, count 0 2006.229.10:34:44.14#ibcon#*after write, iclass 36, count 0 2006.229.10:34:44.14#ibcon#*before return 0, iclass 36, count 0 2006.229.10:34:44.14#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:44.14#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:44.14#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:34:44.14#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:34:44.14$vck44/valo=7,864.99 2006.229.10:34:44.15#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:34:44.15#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:34:44.15#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:44.15#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:44.15#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:44.15#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:44.15#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:34:44.15#ibcon#first serial, iclass 38, count 0 2006.229.10:34:44.15#ibcon#enter sib2, iclass 38, count 0 2006.229.10:34:44.15#ibcon#flushed, iclass 38, count 0 2006.229.10:34:44.15#ibcon#about to write, iclass 38, count 0 2006.229.10:34:44.15#ibcon#wrote, iclass 38, count 0 2006.229.10:34:44.15#ibcon#about to read 3, iclass 38, count 0 2006.229.10:34:44.16#ibcon#read 3, iclass 38, count 0 2006.229.10:34:44.16#ibcon#about to read 4, iclass 38, count 0 2006.229.10:34:44.16#ibcon#read 4, iclass 38, count 0 2006.229.10:34:44.16#ibcon#about to read 5, iclass 38, count 0 2006.229.10:34:44.16#ibcon#read 5, iclass 38, count 0 2006.229.10:34:44.16#ibcon#about to read 6, iclass 38, count 0 2006.229.10:34:44.16#ibcon#read 6, iclass 38, count 0 2006.229.10:34:44.16#ibcon#end of sib2, iclass 38, count 0 2006.229.10:34:44.16#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:34:44.16#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:34:44.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:34:44.16#ibcon#*before write, iclass 38, count 0 2006.229.10:34:44.16#ibcon#enter sib2, iclass 38, count 0 2006.229.10:34:44.16#ibcon#flushed, iclass 38, count 0 2006.229.10:34:44.16#ibcon#about to write, iclass 38, count 0 2006.229.10:34:44.16#ibcon#wrote, iclass 38, count 0 2006.229.10:34:44.16#ibcon#about to read 3, iclass 38, count 0 2006.229.10:34:44.20#ibcon#read 3, iclass 38, count 0 2006.229.10:34:44.20#ibcon#about to read 4, iclass 38, count 0 2006.229.10:34:44.20#ibcon#read 4, iclass 38, count 0 2006.229.10:34:44.20#ibcon#about to read 5, iclass 38, count 0 2006.229.10:34:44.20#ibcon#read 5, iclass 38, count 0 2006.229.10:34:44.20#ibcon#about to read 6, iclass 38, count 0 2006.229.10:34:44.20#ibcon#read 6, iclass 38, count 0 2006.229.10:34:44.20#ibcon#end of sib2, iclass 38, count 0 2006.229.10:34:44.20#ibcon#*after write, iclass 38, count 0 2006.229.10:34:44.20#ibcon#*before return 0, iclass 38, count 0 2006.229.10:34:44.20#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:44.20#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:44.20#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:34:44.20#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:34:44.20$vck44/va=7,5 2006.229.10:34:44.20#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.10:34:44.20#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.10:34:44.20#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:44.20#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:44.26#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:44.26#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:44.26#ibcon#enter wrdev, iclass 40, count 2 2006.229.10:34:44.26#ibcon#first serial, iclass 40, count 2 2006.229.10:34:44.26#ibcon#enter sib2, iclass 40, count 2 2006.229.10:34:44.26#ibcon#flushed, iclass 40, count 2 2006.229.10:34:44.26#ibcon#about to write, iclass 40, count 2 2006.229.10:34:44.26#ibcon#wrote, iclass 40, count 2 2006.229.10:34:44.26#ibcon#about to read 3, iclass 40, count 2 2006.229.10:34:44.28#ibcon#read 3, iclass 40, count 2 2006.229.10:34:44.28#ibcon#about to read 4, iclass 40, count 2 2006.229.10:34:44.28#ibcon#read 4, iclass 40, count 2 2006.229.10:34:44.28#ibcon#about to read 5, iclass 40, count 2 2006.229.10:34:44.28#ibcon#read 5, iclass 40, count 2 2006.229.10:34:44.28#ibcon#about to read 6, iclass 40, count 2 2006.229.10:34:44.28#ibcon#read 6, iclass 40, count 2 2006.229.10:34:44.28#ibcon#end of sib2, iclass 40, count 2 2006.229.10:34:44.28#ibcon#*mode == 0, iclass 40, count 2 2006.229.10:34:44.28#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.10:34:44.28#ibcon#[25=AT07-05\r\n] 2006.229.10:34:44.28#ibcon#*before write, iclass 40, count 2 2006.229.10:34:44.28#ibcon#enter sib2, iclass 40, count 2 2006.229.10:34:44.28#ibcon#flushed, iclass 40, count 2 2006.229.10:34:44.28#ibcon#about to write, iclass 40, count 2 2006.229.10:34:44.28#ibcon#wrote, iclass 40, count 2 2006.229.10:34:44.28#ibcon#about to read 3, iclass 40, count 2 2006.229.10:34:44.31#ibcon#read 3, iclass 40, count 2 2006.229.10:34:44.31#ibcon#about to read 4, iclass 40, count 2 2006.229.10:34:44.31#ibcon#read 4, iclass 40, count 2 2006.229.10:34:44.31#ibcon#about to read 5, iclass 40, count 2 2006.229.10:34:44.31#ibcon#read 5, iclass 40, count 2 2006.229.10:34:44.31#ibcon#about to read 6, iclass 40, count 2 2006.229.10:34:44.31#ibcon#read 6, iclass 40, count 2 2006.229.10:34:44.31#ibcon#end of sib2, iclass 40, count 2 2006.229.10:34:44.31#ibcon#*after write, iclass 40, count 2 2006.229.10:34:44.31#ibcon#*before return 0, iclass 40, count 2 2006.229.10:34:44.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:44.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:44.31#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.10:34:44.31#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:44.31#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:44.43#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:44.43#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:44.43#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:34:44.43#ibcon#first serial, iclass 40, count 0 2006.229.10:34:44.43#ibcon#enter sib2, iclass 40, count 0 2006.229.10:34:44.43#ibcon#flushed, iclass 40, count 0 2006.229.10:34:44.43#ibcon#about to write, iclass 40, count 0 2006.229.10:34:44.43#ibcon#wrote, iclass 40, count 0 2006.229.10:34:44.43#ibcon#about to read 3, iclass 40, count 0 2006.229.10:34:44.45#ibcon#read 3, iclass 40, count 0 2006.229.10:34:44.45#ibcon#about to read 4, iclass 40, count 0 2006.229.10:34:44.45#ibcon#read 4, iclass 40, count 0 2006.229.10:34:44.45#ibcon#about to read 5, iclass 40, count 0 2006.229.10:34:44.45#ibcon#read 5, iclass 40, count 0 2006.229.10:34:44.45#ibcon#about to read 6, iclass 40, count 0 2006.229.10:34:44.45#ibcon#read 6, iclass 40, count 0 2006.229.10:34:44.45#ibcon#end of sib2, iclass 40, count 0 2006.229.10:34:44.45#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:34:44.45#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:34:44.45#ibcon#[25=USB\r\n] 2006.229.10:34:44.45#ibcon#*before write, iclass 40, count 0 2006.229.10:34:44.45#ibcon#enter sib2, iclass 40, count 0 2006.229.10:34:44.45#ibcon#flushed, iclass 40, count 0 2006.229.10:34:44.45#ibcon#about to write, iclass 40, count 0 2006.229.10:34:44.45#ibcon#wrote, iclass 40, count 0 2006.229.10:34:44.45#ibcon#about to read 3, iclass 40, count 0 2006.229.10:34:44.48#ibcon#read 3, iclass 40, count 0 2006.229.10:34:44.48#ibcon#about to read 4, iclass 40, count 0 2006.229.10:34:44.48#ibcon#read 4, iclass 40, count 0 2006.229.10:34:44.48#ibcon#about to read 5, iclass 40, count 0 2006.229.10:34:44.48#ibcon#read 5, iclass 40, count 0 2006.229.10:34:44.48#ibcon#about to read 6, iclass 40, count 0 2006.229.10:34:44.48#ibcon#read 6, iclass 40, count 0 2006.229.10:34:44.48#ibcon#end of sib2, iclass 40, count 0 2006.229.10:34:44.48#ibcon#*after write, iclass 40, count 0 2006.229.10:34:44.48#ibcon#*before return 0, iclass 40, count 0 2006.229.10:34:44.48#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:44.48#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:44.48#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:34:44.48#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:34:44.48$vck44/valo=8,884.99 2006.229.10:34:44.48#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.10:34:44.48#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.10:34:44.48#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:44.48#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:44.48#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:44.48#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:44.48#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:34:44.48#ibcon#first serial, iclass 4, count 0 2006.229.10:34:44.48#ibcon#enter sib2, iclass 4, count 0 2006.229.10:34:44.48#ibcon#flushed, iclass 4, count 0 2006.229.10:34:44.48#ibcon#about to write, iclass 4, count 0 2006.229.10:34:44.48#ibcon#wrote, iclass 4, count 0 2006.229.10:34:44.48#ibcon#about to read 3, iclass 4, count 0 2006.229.10:34:44.50#ibcon#read 3, iclass 4, count 0 2006.229.10:34:44.50#ibcon#about to read 4, iclass 4, count 0 2006.229.10:34:44.50#ibcon#read 4, iclass 4, count 0 2006.229.10:34:44.50#ibcon#about to read 5, iclass 4, count 0 2006.229.10:34:44.50#ibcon#read 5, iclass 4, count 0 2006.229.10:34:44.50#ibcon#about to read 6, iclass 4, count 0 2006.229.10:34:44.50#ibcon#read 6, iclass 4, count 0 2006.229.10:34:44.50#ibcon#end of sib2, iclass 4, count 0 2006.229.10:34:44.50#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:34:44.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:34:44.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:34:44.50#ibcon#*before write, iclass 4, count 0 2006.229.10:34:44.50#ibcon#enter sib2, iclass 4, count 0 2006.229.10:34:44.50#ibcon#flushed, iclass 4, count 0 2006.229.10:34:44.50#ibcon#about to write, iclass 4, count 0 2006.229.10:34:44.50#ibcon#wrote, iclass 4, count 0 2006.229.10:34:44.50#ibcon#about to read 3, iclass 4, count 0 2006.229.10:34:44.54#ibcon#read 3, iclass 4, count 0 2006.229.10:34:44.54#ibcon#about to read 4, iclass 4, count 0 2006.229.10:34:44.54#ibcon#read 4, iclass 4, count 0 2006.229.10:34:44.54#ibcon#about to read 5, iclass 4, count 0 2006.229.10:34:44.54#ibcon#read 5, iclass 4, count 0 2006.229.10:34:44.54#ibcon#about to read 6, iclass 4, count 0 2006.229.10:34:44.54#ibcon#read 6, iclass 4, count 0 2006.229.10:34:44.54#ibcon#end of sib2, iclass 4, count 0 2006.229.10:34:44.54#ibcon#*after write, iclass 4, count 0 2006.229.10:34:44.54#ibcon#*before return 0, iclass 4, count 0 2006.229.10:34:44.54#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:44.54#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:44.54#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:34:44.54#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:34:44.54$vck44/va=8,6 2006.229.10:34:44.54#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.10:34:44.54#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.10:34:44.54#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:44.54#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:34:44.60#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:34:44.60#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:34:44.60#ibcon#enter wrdev, iclass 6, count 2 2006.229.10:34:44.60#ibcon#first serial, iclass 6, count 2 2006.229.10:34:44.60#ibcon#enter sib2, iclass 6, count 2 2006.229.10:34:44.60#ibcon#flushed, iclass 6, count 2 2006.229.10:34:44.60#ibcon#about to write, iclass 6, count 2 2006.229.10:34:44.60#ibcon#wrote, iclass 6, count 2 2006.229.10:34:44.60#ibcon#about to read 3, iclass 6, count 2 2006.229.10:34:44.62#ibcon#read 3, iclass 6, count 2 2006.229.10:34:44.62#ibcon#about to read 4, iclass 6, count 2 2006.229.10:34:44.62#ibcon#read 4, iclass 6, count 2 2006.229.10:34:44.62#ibcon#about to read 5, iclass 6, count 2 2006.229.10:34:44.62#ibcon#read 5, iclass 6, count 2 2006.229.10:34:44.62#ibcon#about to read 6, iclass 6, count 2 2006.229.10:34:44.62#ibcon#read 6, iclass 6, count 2 2006.229.10:34:44.62#ibcon#end of sib2, iclass 6, count 2 2006.229.10:34:44.62#ibcon#*mode == 0, iclass 6, count 2 2006.229.10:34:44.62#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.10:34:44.62#ibcon#[25=AT08-06\r\n] 2006.229.10:34:44.62#ibcon#*before write, iclass 6, count 2 2006.229.10:34:44.62#ibcon#enter sib2, iclass 6, count 2 2006.229.10:34:44.62#ibcon#flushed, iclass 6, count 2 2006.229.10:34:44.62#ibcon#about to write, iclass 6, count 2 2006.229.10:34:44.62#ibcon#wrote, iclass 6, count 2 2006.229.10:34:44.62#ibcon#about to read 3, iclass 6, count 2 2006.229.10:34:44.65#ibcon#read 3, iclass 6, count 2 2006.229.10:34:44.65#ibcon#about to read 4, iclass 6, count 2 2006.229.10:34:44.65#ibcon#read 4, iclass 6, count 2 2006.229.10:34:44.65#ibcon#about to read 5, iclass 6, count 2 2006.229.10:34:44.65#ibcon#read 5, iclass 6, count 2 2006.229.10:34:44.65#ibcon#about to read 6, iclass 6, count 2 2006.229.10:34:44.65#ibcon#read 6, iclass 6, count 2 2006.229.10:34:44.65#ibcon#end of sib2, iclass 6, count 2 2006.229.10:34:44.65#ibcon#*after write, iclass 6, count 2 2006.229.10:34:44.65#ibcon#*before return 0, iclass 6, count 2 2006.229.10:34:44.65#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:34:44.65#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:34:44.65#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.10:34:44.65#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:44.65#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:34:44.77#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:34:44.77#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:34:44.77#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:34:44.77#ibcon#first serial, iclass 6, count 0 2006.229.10:34:44.77#ibcon#enter sib2, iclass 6, count 0 2006.229.10:34:44.77#ibcon#flushed, iclass 6, count 0 2006.229.10:34:44.77#ibcon#about to write, iclass 6, count 0 2006.229.10:34:44.77#ibcon#wrote, iclass 6, count 0 2006.229.10:34:44.77#ibcon#about to read 3, iclass 6, count 0 2006.229.10:34:44.79#ibcon#read 3, iclass 6, count 0 2006.229.10:34:44.79#ibcon#about to read 4, iclass 6, count 0 2006.229.10:34:44.79#ibcon#read 4, iclass 6, count 0 2006.229.10:34:44.79#ibcon#about to read 5, iclass 6, count 0 2006.229.10:34:44.79#ibcon#read 5, iclass 6, count 0 2006.229.10:34:44.79#ibcon#about to read 6, iclass 6, count 0 2006.229.10:34:44.79#ibcon#read 6, iclass 6, count 0 2006.229.10:34:44.79#ibcon#end of sib2, iclass 6, count 0 2006.229.10:34:44.79#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:34:44.79#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:34:44.79#ibcon#[25=USB\r\n] 2006.229.10:34:44.79#ibcon#*before write, iclass 6, count 0 2006.229.10:34:44.79#ibcon#enter sib2, iclass 6, count 0 2006.229.10:34:44.79#ibcon#flushed, iclass 6, count 0 2006.229.10:34:44.79#ibcon#about to write, iclass 6, count 0 2006.229.10:34:44.79#ibcon#wrote, iclass 6, count 0 2006.229.10:34:44.79#ibcon#about to read 3, iclass 6, count 0 2006.229.10:34:44.82#ibcon#read 3, iclass 6, count 0 2006.229.10:34:44.82#ibcon#about to read 4, iclass 6, count 0 2006.229.10:34:44.82#ibcon#read 4, iclass 6, count 0 2006.229.10:34:44.82#ibcon#about to read 5, iclass 6, count 0 2006.229.10:34:44.82#ibcon#read 5, iclass 6, count 0 2006.229.10:34:44.82#ibcon#about to read 6, iclass 6, count 0 2006.229.10:34:44.82#ibcon#read 6, iclass 6, count 0 2006.229.10:34:44.82#ibcon#end of sib2, iclass 6, count 0 2006.229.10:34:44.82#ibcon#*after write, iclass 6, count 0 2006.229.10:34:44.82#ibcon#*before return 0, iclass 6, count 0 2006.229.10:34:44.82#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:34:44.82#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:34:44.82#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:34:44.82#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:34:44.82$vck44/vblo=1,629.99 2006.229.10:34:44.82#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.10:34:44.82#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.10:34:44.82#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:44.82#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:34:44.82#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:34:44.82#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:34:44.82#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:34:44.82#ibcon#first serial, iclass 10, count 0 2006.229.10:34:44.82#ibcon#enter sib2, iclass 10, count 0 2006.229.10:34:44.82#ibcon#flushed, iclass 10, count 0 2006.229.10:34:44.82#ibcon#about to write, iclass 10, count 0 2006.229.10:34:44.82#ibcon#wrote, iclass 10, count 0 2006.229.10:34:44.82#ibcon#about to read 3, iclass 10, count 0 2006.229.10:34:44.84#ibcon#read 3, iclass 10, count 0 2006.229.10:34:44.84#ibcon#about to read 4, iclass 10, count 0 2006.229.10:34:44.84#ibcon#read 4, iclass 10, count 0 2006.229.10:34:44.84#ibcon#about to read 5, iclass 10, count 0 2006.229.10:34:44.84#ibcon#read 5, iclass 10, count 0 2006.229.10:34:44.84#ibcon#about to read 6, iclass 10, count 0 2006.229.10:34:44.84#ibcon#read 6, iclass 10, count 0 2006.229.10:34:44.84#ibcon#end of sib2, iclass 10, count 0 2006.229.10:34:44.84#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:34:44.84#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:34:44.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:34:44.84#ibcon#*before write, iclass 10, count 0 2006.229.10:34:44.84#ibcon#enter sib2, iclass 10, count 0 2006.229.10:34:44.84#ibcon#flushed, iclass 10, count 0 2006.229.10:34:44.84#ibcon#about to write, iclass 10, count 0 2006.229.10:34:44.84#ibcon#wrote, iclass 10, count 0 2006.229.10:34:44.84#ibcon#about to read 3, iclass 10, count 0 2006.229.10:34:44.88#ibcon#read 3, iclass 10, count 0 2006.229.10:34:44.88#ibcon#about to read 4, iclass 10, count 0 2006.229.10:34:44.88#ibcon#read 4, iclass 10, count 0 2006.229.10:34:44.88#ibcon#about to read 5, iclass 10, count 0 2006.229.10:34:44.88#ibcon#read 5, iclass 10, count 0 2006.229.10:34:44.88#ibcon#about to read 6, iclass 10, count 0 2006.229.10:34:44.88#ibcon#read 6, iclass 10, count 0 2006.229.10:34:44.88#ibcon#end of sib2, iclass 10, count 0 2006.229.10:34:44.88#ibcon#*after write, iclass 10, count 0 2006.229.10:34:44.88#ibcon#*before return 0, iclass 10, count 0 2006.229.10:34:44.88#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:34:44.88#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:34:44.88#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:34:44.88#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:34:44.88$vck44/vb=1,4 2006.229.10:34:44.88#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.10:34:44.88#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.10:34:44.88#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:44.88#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:34:44.88#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:34:44.88#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:34:44.88#ibcon#enter wrdev, iclass 12, count 2 2006.229.10:34:44.88#ibcon#first serial, iclass 12, count 2 2006.229.10:34:44.88#ibcon#enter sib2, iclass 12, count 2 2006.229.10:34:44.88#ibcon#flushed, iclass 12, count 2 2006.229.10:34:44.88#ibcon#about to write, iclass 12, count 2 2006.229.10:34:44.88#ibcon#wrote, iclass 12, count 2 2006.229.10:34:44.88#ibcon#about to read 3, iclass 12, count 2 2006.229.10:34:44.90#ibcon#read 3, iclass 12, count 2 2006.229.10:34:44.90#ibcon#about to read 4, iclass 12, count 2 2006.229.10:34:44.90#ibcon#read 4, iclass 12, count 2 2006.229.10:34:44.90#ibcon#about to read 5, iclass 12, count 2 2006.229.10:34:44.90#ibcon#read 5, iclass 12, count 2 2006.229.10:34:44.90#ibcon#about to read 6, iclass 12, count 2 2006.229.10:34:44.90#ibcon#read 6, iclass 12, count 2 2006.229.10:34:44.90#ibcon#end of sib2, iclass 12, count 2 2006.229.10:34:44.90#ibcon#*mode == 0, iclass 12, count 2 2006.229.10:34:44.90#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.10:34:44.90#ibcon#[27=AT01-04\r\n] 2006.229.10:34:44.90#ibcon#*before write, iclass 12, count 2 2006.229.10:34:44.90#ibcon#enter sib2, iclass 12, count 2 2006.229.10:34:44.90#ibcon#flushed, iclass 12, count 2 2006.229.10:34:44.90#ibcon#about to write, iclass 12, count 2 2006.229.10:34:44.90#ibcon#wrote, iclass 12, count 2 2006.229.10:34:44.90#ibcon#about to read 3, iclass 12, count 2 2006.229.10:34:44.93#ibcon#read 3, iclass 12, count 2 2006.229.10:34:44.93#ibcon#about to read 4, iclass 12, count 2 2006.229.10:34:44.93#ibcon#read 4, iclass 12, count 2 2006.229.10:34:44.93#ibcon#about to read 5, iclass 12, count 2 2006.229.10:34:44.93#ibcon#read 5, iclass 12, count 2 2006.229.10:34:44.93#ibcon#about to read 6, iclass 12, count 2 2006.229.10:34:44.93#ibcon#read 6, iclass 12, count 2 2006.229.10:34:44.93#ibcon#end of sib2, iclass 12, count 2 2006.229.10:34:44.93#ibcon#*after write, iclass 12, count 2 2006.229.10:34:44.93#ibcon#*before return 0, iclass 12, count 2 2006.229.10:34:44.93#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:34:44.93#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:34:44.93#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.10:34:44.93#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:44.93#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:34:45.05#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:34:45.05#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:34:45.05#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:34:45.05#ibcon#first serial, iclass 12, count 0 2006.229.10:34:45.05#ibcon#enter sib2, iclass 12, count 0 2006.229.10:34:45.05#ibcon#flushed, iclass 12, count 0 2006.229.10:34:45.05#ibcon#about to write, iclass 12, count 0 2006.229.10:34:45.05#ibcon#wrote, iclass 12, count 0 2006.229.10:34:45.05#ibcon#about to read 3, iclass 12, count 0 2006.229.10:34:45.07#ibcon#read 3, iclass 12, count 0 2006.229.10:34:45.07#ibcon#about to read 4, iclass 12, count 0 2006.229.10:34:45.07#ibcon#read 4, iclass 12, count 0 2006.229.10:34:45.07#ibcon#about to read 5, iclass 12, count 0 2006.229.10:34:45.07#ibcon#read 5, iclass 12, count 0 2006.229.10:34:45.07#ibcon#about to read 6, iclass 12, count 0 2006.229.10:34:45.07#ibcon#read 6, iclass 12, count 0 2006.229.10:34:45.07#ibcon#end of sib2, iclass 12, count 0 2006.229.10:34:45.07#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:34:45.07#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:34:45.07#ibcon#[27=USB\r\n] 2006.229.10:34:45.07#ibcon#*before write, iclass 12, count 0 2006.229.10:34:45.07#ibcon#enter sib2, iclass 12, count 0 2006.229.10:34:45.07#ibcon#flushed, iclass 12, count 0 2006.229.10:34:45.07#ibcon#about to write, iclass 12, count 0 2006.229.10:34:45.07#ibcon#wrote, iclass 12, count 0 2006.229.10:34:45.07#ibcon#about to read 3, iclass 12, count 0 2006.229.10:34:45.10#ibcon#read 3, iclass 12, count 0 2006.229.10:34:45.10#ibcon#about to read 4, iclass 12, count 0 2006.229.10:34:45.10#ibcon#read 4, iclass 12, count 0 2006.229.10:34:45.10#ibcon#about to read 5, iclass 12, count 0 2006.229.10:34:45.10#ibcon#read 5, iclass 12, count 0 2006.229.10:34:45.10#ibcon#about to read 6, iclass 12, count 0 2006.229.10:34:45.10#ibcon#read 6, iclass 12, count 0 2006.229.10:34:45.10#ibcon#end of sib2, iclass 12, count 0 2006.229.10:34:45.10#ibcon#*after write, iclass 12, count 0 2006.229.10:34:45.10#ibcon#*before return 0, iclass 12, count 0 2006.229.10:34:45.10#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:34:45.10#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:34:45.10#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:34:45.10#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:34:45.10$vck44/vblo=2,634.99 2006.229.10:34:45.10#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.10:34:45.10#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.10:34:45.10#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:45.10#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:45.10#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:45.10#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:45.10#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:34:45.10#ibcon#first serial, iclass 14, count 0 2006.229.10:34:45.10#ibcon#enter sib2, iclass 14, count 0 2006.229.10:34:45.10#ibcon#flushed, iclass 14, count 0 2006.229.10:34:45.10#ibcon#about to write, iclass 14, count 0 2006.229.10:34:45.10#ibcon#wrote, iclass 14, count 0 2006.229.10:34:45.10#ibcon#about to read 3, iclass 14, count 0 2006.229.10:34:45.12#ibcon#read 3, iclass 14, count 0 2006.229.10:34:45.12#ibcon#about to read 4, iclass 14, count 0 2006.229.10:34:45.12#ibcon#read 4, iclass 14, count 0 2006.229.10:34:45.12#ibcon#about to read 5, iclass 14, count 0 2006.229.10:34:45.12#ibcon#read 5, iclass 14, count 0 2006.229.10:34:45.12#ibcon#about to read 6, iclass 14, count 0 2006.229.10:34:45.12#ibcon#read 6, iclass 14, count 0 2006.229.10:34:45.12#ibcon#end of sib2, iclass 14, count 0 2006.229.10:34:45.12#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:34:45.12#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:34:45.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:34:45.12#ibcon#*before write, iclass 14, count 0 2006.229.10:34:45.12#ibcon#enter sib2, iclass 14, count 0 2006.229.10:34:45.12#ibcon#flushed, iclass 14, count 0 2006.229.10:34:45.12#ibcon#about to write, iclass 14, count 0 2006.229.10:34:45.12#ibcon#wrote, iclass 14, count 0 2006.229.10:34:45.12#ibcon#about to read 3, iclass 14, count 0 2006.229.10:34:45.16#ibcon#read 3, iclass 14, count 0 2006.229.10:34:45.16#ibcon#about to read 4, iclass 14, count 0 2006.229.10:34:45.16#ibcon#read 4, iclass 14, count 0 2006.229.10:34:45.16#ibcon#about to read 5, iclass 14, count 0 2006.229.10:34:45.16#ibcon#read 5, iclass 14, count 0 2006.229.10:34:45.16#ibcon#about to read 6, iclass 14, count 0 2006.229.10:34:45.16#ibcon#read 6, iclass 14, count 0 2006.229.10:34:45.16#ibcon#end of sib2, iclass 14, count 0 2006.229.10:34:45.16#ibcon#*after write, iclass 14, count 0 2006.229.10:34:45.16#ibcon#*before return 0, iclass 14, count 0 2006.229.10:34:45.16#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:45.16#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:34:45.16#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:34:45.16#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:34:45.16$vck44/vb=2,4 2006.229.10:34:45.16#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.10:34:45.16#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.10:34:45.16#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:45.16#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:45.22#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:45.22#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:45.22#ibcon#enter wrdev, iclass 16, count 2 2006.229.10:34:45.22#ibcon#first serial, iclass 16, count 2 2006.229.10:34:45.22#ibcon#enter sib2, iclass 16, count 2 2006.229.10:34:45.22#ibcon#flushed, iclass 16, count 2 2006.229.10:34:45.22#ibcon#about to write, iclass 16, count 2 2006.229.10:34:45.22#ibcon#wrote, iclass 16, count 2 2006.229.10:34:45.22#ibcon#about to read 3, iclass 16, count 2 2006.229.10:34:45.24#ibcon#read 3, iclass 16, count 2 2006.229.10:34:45.24#ibcon#about to read 4, iclass 16, count 2 2006.229.10:34:45.24#ibcon#read 4, iclass 16, count 2 2006.229.10:34:45.24#ibcon#about to read 5, iclass 16, count 2 2006.229.10:34:45.24#ibcon#read 5, iclass 16, count 2 2006.229.10:34:45.24#ibcon#about to read 6, iclass 16, count 2 2006.229.10:34:45.24#ibcon#read 6, iclass 16, count 2 2006.229.10:34:45.24#ibcon#end of sib2, iclass 16, count 2 2006.229.10:34:45.24#ibcon#*mode == 0, iclass 16, count 2 2006.229.10:34:45.24#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.10:34:45.24#ibcon#[27=AT02-04\r\n] 2006.229.10:34:45.24#ibcon#*before write, iclass 16, count 2 2006.229.10:34:45.24#ibcon#enter sib2, iclass 16, count 2 2006.229.10:34:45.24#ibcon#flushed, iclass 16, count 2 2006.229.10:34:45.24#ibcon#about to write, iclass 16, count 2 2006.229.10:34:45.24#ibcon#wrote, iclass 16, count 2 2006.229.10:34:45.24#ibcon#about to read 3, iclass 16, count 2 2006.229.10:34:45.27#ibcon#read 3, iclass 16, count 2 2006.229.10:34:45.27#ibcon#about to read 4, iclass 16, count 2 2006.229.10:34:45.27#ibcon#read 4, iclass 16, count 2 2006.229.10:34:45.27#ibcon#about to read 5, iclass 16, count 2 2006.229.10:34:45.27#ibcon#read 5, iclass 16, count 2 2006.229.10:34:45.27#ibcon#about to read 6, iclass 16, count 2 2006.229.10:34:45.27#ibcon#read 6, iclass 16, count 2 2006.229.10:34:45.27#ibcon#end of sib2, iclass 16, count 2 2006.229.10:34:45.27#ibcon#*after write, iclass 16, count 2 2006.229.10:34:45.27#ibcon#*before return 0, iclass 16, count 2 2006.229.10:34:45.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:45.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:34:45.27#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.10:34:45.27#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:45.27#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:45.39#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:45.39#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:45.39#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:34:45.39#ibcon#first serial, iclass 16, count 0 2006.229.10:34:45.39#ibcon#enter sib2, iclass 16, count 0 2006.229.10:34:45.39#ibcon#flushed, iclass 16, count 0 2006.229.10:34:45.39#ibcon#about to write, iclass 16, count 0 2006.229.10:34:45.39#ibcon#wrote, iclass 16, count 0 2006.229.10:34:45.39#ibcon#about to read 3, iclass 16, count 0 2006.229.10:34:45.41#ibcon#read 3, iclass 16, count 0 2006.229.10:34:45.41#ibcon#about to read 4, iclass 16, count 0 2006.229.10:34:45.41#ibcon#read 4, iclass 16, count 0 2006.229.10:34:45.41#ibcon#about to read 5, iclass 16, count 0 2006.229.10:34:45.41#ibcon#read 5, iclass 16, count 0 2006.229.10:34:45.41#ibcon#about to read 6, iclass 16, count 0 2006.229.10:34:45.41#ibcon#read 6, iclass 16, count 0 2006.229.10:34:45.41#ibcon#end of sib2, iclass 16, count 0 2006.229.10:34:45.41#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:34:45.41#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:34:45.41#ibcon#[27=USB\r\n] 2006.229.10:34:45.41#ibcon#*before write, iclass 16, count 0 2006.229.10:34:45.41#ibcon#enter sib2, iclass 16, count 0 2006.229.10:34:45.41#ibcon#flushed, iclass 16, count 0 2006.229.10:34:45.41#ibcon#about to write, iclass 16, count 0 2006.229.10:34:45.41#ibcon#wrote, iclass 16, count 0 2006.229.10:34:45.41#ibcon#about to read 3, iclass 16, count 0 2006.229.10:34:45.44#ibcon#read 3, iclass 16, count 0 2006.229.10:34:45.44#ibcon#about to read 4, iclass 16, count 0 2006.229.10:34:45.44#ibcon#read 4, iclass 16, count 0 2006.229.10:34:45.44#ibcon#about to read 5, iclass 16, count 0 2006.229.10:34:45.44#ibcon#read 5, iclass 16, count 0 2006.229.10:34:45.44#ibcon#about to read 6, iclass 16, count 0 2006.229.10:34:45.44#ibcon#read 6, iclass 16, count 0 2006.229.10:34:45.44#ibcon#end of sib2, iclass 16, count 0 2006.229.10:34:45.44#ibcon#*after write, iclass 16, count 0 2006.229.10:34:45.44#ibcon#*before return 0, iclass 16, count 0 2006.229.10:34:45.44#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:45.44#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:34:45.44#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:34:45.44#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:34:45.44$vck44/vblo=3,649.99 2006.229.10:34:45.44#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.10:34:45.44#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.10:34:45.44#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:45.44#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:45.44#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:45.44#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:45.44#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:34:45.44#ibcon#first serial, iclass 18, count 0 2006.229.10:34:45.44#ibcon#enter sib2, iclass 18, count 0 2006.229.10:34:45.44#ibcon#flushed, iclass 18, count 0 2006.229.10:34:45.44#ibcon#about to write, iclass 18, count 0 2006.229.10:34:45.44#ibcon#wrote, iclass 18, count 0 2006.229.10:34:45.44#ibcon#about to read 3, iclass 18, count 0 2006.229.10:34:45.46#ibcon#read 3, iclass 18, count 0 2006.229.10:34:45.46#ibcon#about to read 4, iclass 18, count 0 2006.229.10:34:45.46#ibcon#read 4, iclass 18, count 0 2006.229.10:34:45.46#ibcon#about to read 5, iclass 18, count 0 2006.229.10:34:45.46#ibcon#read 5, iclass 18, count 0 2006.229.10:34:45.46#ibcon#about to read 6, iclass 18, count 0 2006.229.10:34:45.46#ibcon#read 6, iclass 18, count 0 2006.229.10:34:45.46#ibcon#end of sib2, iclass 18, count 0 2006.229.10:34:45.46#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:34:45.46#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:34:45.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:34:45.46#ibcon#*before write, iclass 18, count 0 2006.229.10:34:45.46#ibcon#enter sib2, iclass 18, count 0 2006.229.10:34:45.46#ibcon#flushed, iclass 18, count 0 2006.229.10:34:45.46#ibcon#about to write, iclass 18, count 0 2006.229.10:34:45.46#ibcon#wrote, iclass 18, count 0 2006.229.10:34:45.46#ibcon#about to read 3, iclass 18, count 0 2006.229.10:34:45.50#ibcon#read 3, iclass 18, count 0 2006.229.10:34:45.50#ibcon#about to read 4, iclass 18, count 0 2006.229.10:34:45.50#ibcon#read 4, iclass 18, count 0 2006.229.10:34:45.50#ibcon#about to read 5, iclass 18, count 0 2006.229.10:34:45.50#ibcon#read 5, iclass 18, count 0 2006.229.10:34:45.50#ibcon#about to read 6, iclass 18, count 0 2006.229.10:34:45.50#ibcon#read 6, iclass 18, count 0 2006.229.10:34:45.50#ibcon#end of sib2, iclass 18, count 0 2006.229.10:34:45.50#ibcon#*after write, iclass 18, count 0 2006.229.10:34:45.50#ibcon#*before return 0, iclass 18, count 0 2006.229.10:34:45.50#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:45.50#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:34:45.50#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:34:45.50#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:34:45.50$vck44/vb=3,4 2006.229.10:34:45.50#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.10:34:45.50#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.10:34:45.50#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:45.50#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:45.56#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:45.56#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:45.56#ibcon#enter wrdev, iclass 20, count 2 2006.229.10:34:45.56#ibcon#first serial, iclass 20, count 2 2006.229.10:34:45.56#ibcon#enter sib2, iclass 20, count 2 2006.229.10:34:45.56#ibcon#flushed, iclass 20, count 2 2006.229.10:34:45.56#ibcon#about to write, iclass 20, count 2 2006.229.10:34:45.56#ibcon#wrote, iclass 20, count 2 2006.229.10:34:45.56#ibcon#about to read 3, iclass 20, count 2 2006.229.10:34:45.58#ibcon#read 3, iclass 20, count 2 2006.229.10:34:45.58#ibcon#about to read 4, iclass 20, count 2 2006.229.10:34:45.58#ibcon#read 4, iclass 20, count 2 2006.229.10:34:45.58#ibcon#about to read 5, iclass 20, count 2 2006.229.10:34:45.58#ibcon#read 5, iclass 20, count 2 2006.229.10:34:45.58#ibcon#about to read 6, iclass 20, count 2 2006.229.10:34:45.58#ibcon#read 6, iclass 20, count 2 2006.229.10:34:45.58#ibcon#end of sib2, iclass 20, count 2 2006.229.10:34:45.58#ibcon#*mode == 0, iclass 20, count 2 2006.229.10:34:45.58#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.10:34:45.58#ibcon#[27=AT03-04\r\n] 2006.229.10:34:45.58#ibcon#*before write, iclass 20, count 2 2006.229.10:34:45.58#ibcon#enter sib2, iclass 20, count 2 2006.229.10:34:45.58#ibcon#flushed, iclass 20, count 2 2006.229.10:34:45.58#ibcon#about to write, iclass 20, count 2 2006.229.10:34:45.58#ibcon#wrote, iclass 20, count 2 2006.229.10:34:45.58#ibcon#about to read 3, iclass 20, count 2 2006.229.10:34:45.61#ibcon#read 3, iclass 20, count 2 2006.229.10:34:45.61#ibcon#about to read 4, iclass 20, count 2 2006.229.10:34:45.61#ibcon#read 4, iclass 20, count 2 2006.229.10:34:45.61#ibcon#about to read 5, iclass 20, count 2 2006.229.10:34:45.61#ibcon#read 5, iclass 20, count 2 2006.229.10:34:45.61#ibcon#about to read 6, iclass 20, count 2 2006.229.10:34:45.61#ibcon#read 6, iclass 20, count 2 2006.229.10:34:45.61#ibcon#end of sib2, iclass 20, count 2 2006.229.10:34:45.61#ibcon#*after write, iclass 20, count 2 2006.229.10:34:45.61#ibcon#*before return 0, iclass 20, count 2 2006.229.10:34:45.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:45.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:34:45.61#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.10:34:45.61#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:45.61#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:45.73#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:45.73#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:45.73#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:34:45.73#ibcon#first serial, iclass 20, count 0 2006.229.10:34:45.73#ibcon#enter sib2, iclass 20, count 0 2006.229.10:34:45.73#ibcon#flushed, iclass 20, count 0 2006.229.10:34:45.73#ibcon#about to write, iclass 20, count 0 2006.229.10:34:45.73#ibcon#wrote, iclass 20, count 0 2006.229.10:34:45.73#ibcon#about to read 3, iclass 20, count 0 2006.229.10:34:45.75#ibcon#read 3, iclass 20, count 0 2006.229.10:34:45.75#ibcon#about to read 4, iclass 20, count 0 2006.229.10:34:45.75#ibcon#read 4, iclass 20, count 0 2006.229.10:34:45.75#ibcon#about to read 5, iclass 20, count 0 2006.229.10:34:45.75#ibcon#read 5, iclass 20, count 0 2006.229.10:34:45.75#ibcon#about to read 6, iclass 20, count 0 2006.229.10:34:45.75#ibcon#read 6, iclass 20, count 0 2006.229.10:34:45.75#ibcon#end of sib2, iclass 20, count 0 2006.229.10:34:45.75#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:34:45.75#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:34:45.75#ibcon#[27=USB\r\n] 2006.229.10:34:45.75#ibcon#*before write, iclass 20, count 0 2006.229.10:34:45.75#ibcon#enter sib2, iclass 20, count 0 2006.229.10:34:45.75#ibcon#flushed, iclass 20, count 0 2006.229.10:34:45.75#ibcon#about to write, iclass 20, count 0 2006.229.10:34:45.75#ibcon#wrote, iclass 20, count 0 2006.229.10:34:45.75#ibcon#about to read 3, iclass 20, count 0 2006.229.10:34:45.78#ibcon#read 3, iclass 20, count 0 2006.229.10:34:45.78#ibcon#about to read 4, iclass 20, count 0 2006.229.10:34:45.78#ibcon#read 4, iclass 20, count 0 2006.229.10:34:45.78#ibcon#about to read 5, iclass 20, count 0 2006.229.10:34:45.78#ibcon#read 5, iclass 20, count 0 2006.229.10:34:45.78#ibcon#about to read 6, iclass 20, count 0 2006.229.10:34:45.78#ibcon#read 6, iclass 20, count 0 2006.229.10:34:45.78#ibcon#end of sib2, iclass 20, count 0 2006.229.10:34:45.78#ibcon#*after write, iclass 20, count 0 2006.229.10:34:45.78#ibcon#*before return 0, iclass 20, count 0 2006.229.10:34:45.78#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:45.78#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:34:45.78#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:34:45.78#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:34:45.78$vck44/vblo=4,679.99 2006.229.10:34:45.78#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.10:34:45.78#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.10:34:45.78#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:45.78#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:45.78#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:45.78#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:45.78#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:34:45.78#ibcon#first serial, iclass 22, count 0 2006.229.10:34:45.78#ibcon#enter sib2, iclass 22, count 0 2006.229.10:34:45.78#ibcon#flushed, iclass 22, count 0 2006.229.10:34:45.78#ibcon#about to write, iclass 22, count 0 2006.229.10:34:45.78#ibcon#wrote, iclass 22, count 0 2006.229.10:34:45.78#ibcon#about to read 3, iclass 22, count 0 2006.229.10:34:45.80#ibcon#read 3, iclass 22, count 0 2006.229.10:34:45.80#ibcon#about to read 4, iclass 22, count 0 2006.229.10:34:45.80#ibcon#read 4, iclass 22, count 0 2006.229.10:34:45.80#ibcon#about to read 5, iclass 22, count 0 2006.229.10:34:45.80#ibcon#read 5, iclass 22, count 0 2006.229.10:34:45.80#ibcon#about to read 6, iclass 22, count 0 2006.229.10:34:45.80#ibcon#read 6, iclass 22, count 0 2006.229.10:34:45.80#ibcon#end of sib2, iclass 22, count 0 2006.229.10:34:45.80#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:34:45.80#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:34:45.80#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:34:45.80#ibcon#*before write, iclass 22, count 0 2006.229.10:34:45.80#ibcon#enter sib2, iclass 22, count 0 2006.229.10:34:45.80#ibcon#flushed, iclass 22, count 0 2006.229.10:34:45.80#ibcon#about to write, iclass 22, count 0 2006.229.10:34:45.80#ibcon#wrote, iclass 22, count 0 2006.229.10:34:45.80#ibcon#about to read 3, iclass 22, count 0 2006.229.10:34:45.84#ibcon#read 3, iclass 22, count 0 2006.229.10:34:45.84#ibcon#about to read 4, iclass 22, count 0 2006.229.10:34:45.84#ibcon#read 4, iclass 22, count 0 2006.229.10:34:45.84#ibcon#about to read 5, iclass 22, count 0 2006.229.10:34:45.84#ibcon#read 5, iclass 22, count 0 2006.229.10:34:45.84#ibcon#about to read 6, iclass 22, count 0 2006.229.10:34:45.84#ibcon#read 6, iclass 22, count 0 2006.229.10:34:45.84#ibcon#end of sib2, iclass 22, count 0 2006.229.10:34:45.84#ibcon#*after write, iclass 22, count 0 2006.229.10:34:45.84#ibcon#*before return 0, iclass 22, count 0 2006.229.10:34:45.84#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:45.84#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:34:45.84#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:34:45.84#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:34:45.84$vck44/vb=4,4 2006.229.10:34:45.84#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.10:34:45.84#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.10:34:45.84#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:45.84#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:45.90#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:45.90#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:45.90#ibcon#enter wrdev, iclass 24, count 2 2006.229.10:34:45.90#ibcon#first serial, iclass 24, count 2 2006.229.10:34:45.90#ibcon#enter sib2, iclass 24, count 2 2006.229.10:34:45.90#ibcon#flushed, iclass 24, count 2 2006.229.10:34:45.90#ibcon#about to write, iclass 24, count 2 2006.229.10:34:45.90#ibcon#wrote, iclass 24, count 2 2006.229.10:34:45.90#ibcon#about to read 3, iclass 24, count 2 2006.229.10:34:45.92#ibcon#read 3, iclass 24, count 2 2006.229.10:34:45.92#ibcon#about to read 4, iclass 24, count 2 2006.229.10:34:45.92#ibcon#read 4, iclass 24, count 2 2006.229.10:34:45.92#ibcon#about to read 5, iclass 24, count 2 2006.229.10:34:45.92#ibcon#read 5, iclass 24, count 2 2006.229.10:34:45.92#ibcon#about to read 6, iclass 24, count 2 2006.229.10:34:45.92#ibcon#read 6, iclass 24, count 2 2006.229.10:34:45.92#ibcon#end of sib2, iclass 24, count 2 2006.229.10:34:45.92#ibcon#*mode == 0, iclass 24, count 2 2006.229.10:34:45.92#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.10:34:45.92#ibcon#[27=AT04-04\r\n] 2006.229.10:34:45.92#ibcon#*before write, iclass 24, count 2 2006.229.10:34:45.92#ibcon#enter sib2, iclass 24, count 2 2006.229.10:34:45.92#ibcon#flushed, iclass 24, count 2 2006.229.10:34:45.92#ibcon#about to write, iclass 24, count 2 2006.229.10:34:45.92#ibcon#wrote, iclass 24, count 2 2006.229.10:34:45.92#ibcon#about to read 3, iclass 24, count 2 2006.229.10:34:45.95#ibcon#read 3, iclass 24, count 2 2006.229.10:34:45.95#ibcon#about to read 4, iclass 24, count 2 2006.229.10:34:45.95#ibcon#read 4, iclass 24, count 2 2006.229.10:34:45.95#ibcon#about to read 5, iclass 24, count 2 2006.229.10:34:45.95#ibcon#read 5, iclass 24, count 2 2006.229.10:34:45.95#ibcon#about to read 6, iclass 24, count 2 2006.229.10:34:45.95#ibcon#read 6, iclass 24, count 2 2006.229.10:34:45.95#ibcon#end of sib2, iclass 24, count 2 2006.229.10:34:45.95#ibcon#*after write, iclass 24, count 2 2006.229.10:34:45.95#ibcon#*before return 0, iclass 24, count 2 2006.229.10:34:45.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:45.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:34:45.95#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.10:34:45.95#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:45.95#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:46.07#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:46.07#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:46.07#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:34:46.07#ibcon#first serial, iclass 24, count 0 2006.229.10:34:46.07#ibcon#enter sib2, iclass 24, count 0 2006.229.10:34:46.07#ibcon#flushed, iclass 24, count 0 2006.229.10:34:46.07#ibcon#about to write, iclass 24, count 0 2006.229.10:34:46.07#ibcon#wrote, iclass 24, count 0 2006.229.10:34:46.07#ibcon#about to read 3, iclass 24, count 0 2006.229.10:34:46.09#ibcon#read 3, iclass 24, count 0 2006.229.10:34:46.09#ibcon#about to read 4, iclass 24, count 0 2006.229.10:34:46.09#ibcon#read 4, iclass 24, count 0 2006.229.10:34:46.09#ibcon#about to read 5, iclass 24, count 0 2006.229.10:34:46.09#ibcon#read 5, iclass 24, count 0 2006.229.10:34:46.09#ibcon#about to read 6, iclass 24, count 0 2006.229.10:34:46.09#ibcon#read 6, iclass 24, count 0 2006.229.10:34:46.09#ibcon#end of sib2, iclass 24, count 0 2006.229.10:34:46.09#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:34:46.09#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:34:46.09#ibcon#[27=USB\r\n] 2006.229.10:34:46.09#ibcon#*before write, iclass 24, count 0 2006.229.10:34:46.09#ibcon#enter sib2, iclass 24, count 0 2006.229.10:34:46.09#ibcon#flushed, iclass 24, count 0 2006.229.10:34:46.09#ibcon#about to write, iclass 24, count 0 2006.229.10:34:46.09#ibcon#wrote, iclass 24, count 0 2006.229.10:34:46.09#ibcon#about to read 3, iclass 24, count 0 2006.229.10:34:46.12#ibcon#read 3, iclass 24, count 0 2006.229.10:34:46.12#ibcon#about to read 4, iclass 24, count 0 2006.229.10:34:46.12#ibcon#read 4, iclass 24, count 0 2006.229.10:34:46.12#ibcon#about to read 5, iclass 24, count 0 2006.229.10:34:46.12#ibcon#read 5, iclass 24, count 0 2006.229.10:34:46.12#ibcon#about to read 6, iclass 24, count 0 2006.229.10:34:46.12#ibcon#read 6, iclass 24, count 0 2006.229.10:34:46.12#ibcon#end of sib2, iclass 24, count 0 2006.229.10:34:46.12#ibcon#*after write, iclass 24, count 0 2006.229.10:34:46.12#ibcon#*before return 0, iclass 24, count 0 2006.229.10:34:46.12#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:46.12#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:34:46.12#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:34:46.12#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:34:46.12$vck44/vblo=5,709.99 2006.229.10:34:46.12#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.10:34:46.12#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.10:34:46.12#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:46.12#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:46.12#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:46.12#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:46.12#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:34:46.12#ibcon#first serial, iclass 26, count 0 2006.229.10:34:46.12#ibcon#enter sib2, iclass 26, count 0 2006.229.10:34:46.12#ibcon#flushed, iclass 26, count 0 2006.229.10:34:46.12#ibcon#about to write, iclass 26, count 0 2006.229.10:34:46.12#ibcon#wrote, iclass 26, count 0 2006.229.10:34:46.12#ibcon#about to read 3, iclass 26, count 0 2006.229.10:34:46.14#ibcon#read 3, iclass 26, count 0 2006.229.10:34:46.14#ibcon#about to read 4, iclass 26, count 0 2006.229.10:34:46.14#ibcon#read 4, iclass 26, count 0 2006.229.10:34:46.14#ibcon#about to read 5, iclass 26, count 0 2006.229.10:34:46.14#ibcon#read 5, iclass 26, count 0 2006.229.10:34:46.14#ibcon#about to read 6, iclass 26, count 0 2006.229.10:34:46.14#ibcon#read 6, iclass 26, count 0 2006.229.10:34:46.14#ibcon#end of sib2, iclass 26, count 0 2006.229.10:34:46.14#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:34:46.14#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:34:46.14#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:34:46.14#ibcon#*before write, iclass 26, count 0 2006.229.10:34:46.14#ibcon#enter sib2, iclass 26, count 0 2006.229.10:34:46.14#ibcon#flushed, iclass 26, count 0 2006.229.10:34:46.14#ibcon#about to write, iclass 26, count 0 2006.229.10:34:46.14#ibcon#wrote, iclass 26, count 0 2006.229.10:34:46.14#ibcon#about to read 3, iclass 26, count 0 2006.229.10:34:46.18#ibcon#read 3, iclass 26, count 0 2006.229.10:34:46.18#ibcon#about to read 4, iclass 26, count 0 2006.229.10:34:46.18#ibcon#read 4, iclass 26, count 0 2006.229.10:34:46.18#ibcon#about to read 5, iclass 26, count 0 2006.229.10:34:46.18#ibcon#read 5, iclass 26, count 0 2006.229.10:34:46.18#ibcon#about to read 6, iclass 26, count 0 2006.229.10:34:46.18#ibcon#read 6, iclass 26, count 0 2006.229.10:34:46.18#ibcon#end of sib2, iclass 26, count 0 2006.229.10:34:46.18#ibcon#*after write, iclass 26, count 0 2006.229.10:34:46.18#ibcon#*before return 0, iclass 26, count 0 2006.229.10:34:46.18#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:46.18#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:34:46.18#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:34:46.18#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:34:46.18$vck44/vb=5,4 2006.229.10:34:46.18#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.10:34:46.18#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.10:34:46.18#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:46.18#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:46.24#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:46.24#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:46.24#ibcon#enter wrdev, iclass 28, count 2 2006.229.10:34:46.24#ibcon#first serial, iclass 28, count 2 2006.229.10:34:46.24#ibcon#enter sib2, iclass 28, count 2 2006.229.10:34:46.24#ibcon#flushed, iclass 28, count 2 2006.229.10:34:46.24#ibcon#about to write, iclass 28, count 2 2006.229.10:34:46.24#ibcon#wrote, iclass 28, count 2 2006.229.10:34:46.24#ibcon#about to read 3, iclass 28, count 2 2006.229.10:34:46.26#ibcon#read 3, iclass 28, count 2 2006.229.10:34:46.26#ibcon#about to read 4, iclass 28, count 2 2006.229.10:34:46.26#ibcon#read 4, iclass 28, count 2 2006.229.10:34:46.26#ibcon#about to read 5, iclass 28, count 2 2006.229.10:34:46.26#ibcon#read 5, iclass 28, count 2 2006.229.10:34:46.26#ibcon#about to read 6, iclass 28, count 2 2006.229.10:34:46.26#ibcon#read 6, iclass 28, count 2 2006.229.10:34:46.26#ibcon#end of sib2, iclass 28, count 2 2006.229.10:34:46.26#ibcon#*mode == 0, iclass 28, count 2 2006.229.10:34:46.26#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.10:34:46.26#ibcon#[27=AT05-04\r\n] 2006.229.10:34:46.26#ibcon#*before write, iclass 28, count 2 2006.229.10:34:46.26#ibcon#enter sib2, iclass 28, count 2 2006.229.10:34:46.26#ibcon#flushed, iclass 28, count 2 2006.229.10:34:46.26#ibcon#about to write, iclass 28, count 2 2006.229.10:34:46.26#ibcon#wrote, iclass 28, count 2 2006.229.10:34:46.26#ibcon#about to read 3, iclass 28, count 2 2006.229.10:34:46.29#ibcon#read 3, iclass 28, count 2 2006.229.10:34:46.29#ibcon#about to read 4, iclass 28, count 2 2006.229.10:34:46.29#ibcon#read 4, iclass 28, count 2 2006.229.10:34:46.29#ibcon#about to read 5, iclass 28, count 2 2006.229.10:34:46.29#ibcon#read 5, iclass 28, count 2 2006.229.10:34:46.29#ibcon#about to read 6, iclass 28, count 2 2006.229.10:34:46.29#ibcon#read 6, iclass 28, count 2 2006.229.10:34:46.29#ibcon#end of sib2, iclass 28, count 2 2006.229.10:34:46.29#ibcon#*after write, iclass 28, count 2 2006.229.10:34:46.29#ibcon#*before return 0, iclass 28, count 2 2006.229.10:34:46.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:46.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:34:46.29#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.10:34:46.29#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:46.29#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:46.41#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:46.41#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:46.41#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:34:46.41#ibcon#first serial, iclass 28, count 0 2006.229.10:34:46.41#ibcon#enter sib2, iclass 28, count 0 2006.229.10:34:46.41#ibcon#flushed, iclass 28, count 0 2006.229.10:34:46.41#ibcon#about to write, iclass 28, count 0 2006.229.10:34:46.41#ibcon#wrote, iclass 28, count 0 2006.229.10:34:46.41#ibcon#about to read 3, iclass 28, count 0 2006.229.10:34:46.43#ibcon#read 3, iclass 28, count 0 2006.229.10:34:46.43#ibcon#about to read 4, iclass 28, count 0 2006.229.10:34:46.43#ibcon#read 4, iclass 28, count 0 2006.229.10:34:46.43#ibcon#about to read 5, iclass 28, count 0 2006.229.10:34:46.43#ibcon#read 5, iclass 28, count 0 2006.229.10:34:46.43#ibcon#about to read 6, iclass 28, count 0 2006.229.10:34:46.43#ibcon#read 6, iclass 28, count 0 2006.229.10:34:46.43#ibcon#end of sib2, iclass 28, count 0 2006.229.10:34:46.43#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:34:46.43#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:34:46.43#ibcon#[27=USB\r\n] 2006.229.10:34:46.43#ibcon#*before write, iclass 28, count 0 2006.229.10:34:46.43#ibcon#enter sib2, iclass 28, count 0 2006.229.10:34:46.43#ibcon#flushed, iclass 28, count 0 2006.229.10:34:46.43#ibcon#about to write, iclass 28, count 0 2006.229.10:34:46.43#ibcon#wrote, iclass 28, count 0 2006.229.10:34:46.43#ibcon#about to read 3, iclass 28, count 0 2006.229.10:34:46.46#ibcon#read 3, iclass 28, count 0 2006.229.10:34:46.46#ibcon#about to read 4, iclass 28, count 0 2006.229.10:34:46.46#ibcon#read 4, iclass 28, count 0 2006.229.10:34:46.46#ibcon#about to read 5, iclass 28, count 0 2006.229.10:34:46.46#ibcon#read 5, iclass 28, count 0 2006.229.10:34:46.46#ibcon#about to read 6, iclass 28, count 0 2006.229.10:34:46.46#ibcon#read 6, iclass 28, count 0 2006.229.10:34:46.46#ibcon#end of sib2, iclass 28, count 0 2006.229.10:34:46.46#ibcon#*after write, iclass 28, count 0 2006.229.10:34:46.46#ibcon#*before return 0, iclass 28, count 0 2006.229.10:34:46.46#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:46.46#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:34:46.46#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:34:46.46#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:34:46.46$vck44/vblo=6,719.99 2006.229.10:34:46.46#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:34:46.46#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:34:46.46#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:46.46#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:46.46#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:46.46#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:46.46#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:34:46.46#ibcon#first serial, iclass 30, count 0 2006.229.10:34:46.46#ibcon#enter sib2, iclass 30, count 0 2006.229.10:34:46.46#ibcon#flushed, iclass 30, count 0 2006.229.10:34:46.46#ibcon#about to write, iclass 30, count 0 2006.229.10:34:46.46#ibcon#wrote, iclass 30, count 0 2006.229.10:34:46.46#ibcon#about to read 3, iclass 30, count 0 2006.229.10:34:46.48#ibcon#read 3, iclass 30, count 0 2006.229.10:34:46.48#ibcon#about to read 4, iclass 30, count 0 2006.229.10:34:46.48#ibcon#read 4, iclass 30, count 0 2006.229.10:34:46.48#ibcon#about to read 5, iclass 30, count 0 2006.229.10:34:46.48#ibcon#read 5, iclass 30, count 0 2006.229.10:34:46.48#ibcon#about to read 6, iclass 30, count 0 2006.229.10:34:46.48#ibcon#read 6, iclass 30, count 0 2006.229.10:34:46.48#ibcon#end of sib2, iclass 30, count 0 2006.229.10:34:46.48#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:34:46.48#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:34:46.48#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:34:46.48#ibcon#*before write, iclass 30, count 0 2006.229.10:34:46.48#ibcon#enter sib2, iclass 30, count 0 2006.229.10:34:46.48#ibcon#flushed, iclass 30, count 0 2006.229.10:34:46.48#ibcon#about to write, iclass 30, count 0 2006.229.10:34:46.48#ibcon#wrote, iclass 30, count 0 2006.229.10:34:46.48#ibcon#about to read 3, iclass 30, count 0 2006.229.10:34:46.52#ibcon#read 3, iclass 30, count 0 2006.229.10:34:46.52#ibcon#about to read 4, iclass 30, count 0 2006.229.10:34:46.52#ibcon#read 4, iclass 30, count 0 2006.229.10:34:46.52#ibcon#about to read 5, iclass 30, count 0 2006.229.10:34:46.52#ibcon#read 5, iclass 30, count 0 2006.229.10:34:46.52#ibcon#about to read 6, iclass 30, count 0 2006.229.10:34:46.52#ibcon#read 6, iclass 30, count 0 2006.229.10:34:46.52#ibcon#end of sib2, iclass 30, count 0 2006.229.10:34:46.52#ibcon#*after write, iclass 30, count 0 2006.229.10:34:46.52#ibcon#*before return 0, iclass 30, count 0 2006.229.10:34:46.52#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:46.52#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:34:46.52#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:34:46.52#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:34:46.52$vck44/vb=6,4 2006.229.10:34:46.52#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.10:34:46.52#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.10:34:46.52#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:46.52#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:46.58#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:46.58#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:46.58#ibcon#enter wrdev, iclass 32, count 2 2006.229.10:34:46.58#ibcon#first serial, iclass 32, count 2 2006.229.10:34:46.58#ibcon#enter sib2, iclass 32, count 2 2006.229.10:34:46.58#ibcon#flushed, iclass 32, count 2 2006.229.10:34:46.58#ibcon#about to write, iclass 32, count 2 2006.229.10:34:46.58#ibcon#wrote, iclass 32, count 2 2006.229.10:34:46.58#ibcon#about to read 3, iclass 32, count 2 2006.229.10:34:46.60#ibcon#read 3, iclass 32, count 2 2006.229.10:34:46.60#ibcon#about to read 4, iclass 32, count 2 2006.229.10:34:46.60#ibcon#read 4, iclass 32, count 2 2006.229.10:34:46.60#ibcon#about to read 5, iclass 32, count 2 2006.229.10:34:46.60#ibcon#read 5, iclass 32, count 2 2006.229.10:34:46.60#ibcon#about to read 6, iclass 32, count 2 2006.229.10:34:46.60#ibcon#read 6, iclass 32, count 2 2006.229.10:34:46.60#ibcon#end of sib2, iclass 32, count 2 2006.229.10:34:46.60#ibcon#*mode == 0, iclass 32, count 2 2006.229.10:34:46.60#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.10:34:46.60#ibcon#[27=AT06-04\r\n] 2006.229.10:34:46.60#ibcon#*before write, iclass 32, count 2 2006.229.10:34:46.60#ibcon#enter sib2, iclass 32, count 2 2006.229.10:34:46.60#ibcon#flushed, iclass 32, count 2 2006.229.10:34:46.60#ibcon#about to write, iclass 32, count 2 2006.229.10:34:46.60#ibcon#wrote, iclass 32, count 2 2006.229.10:34:46.60#ibcon#about to read 3, iclass 32, count 2 2006.229.10:34:46.63#ibcon#read 3, iclass 32, count 2 2006.229.10:34:46.63#ibcon#about to read 4, iclass 32, count 2 2006.229.10:34:46.63#ibcon#read 4, iclass 32, count 2 2006.229.10:34:46.63#ibcon#about to read 5, iclass 32, count 2 2006.229.10:34:46.63#ibcon#read 5, iclass 32, count 2 2006.229.10:34:46.63#ibcon#about to read 6, iclass 32, count 2 2006.229.10:34:46.63#ibcon#read 6, iclass 32, count 2 2006.229.10:34:46.63#ibcon#end of sib2, iclass 32, count 2 2006.229.10:34:46.63#ibcon#*after write, iclass 32, count 2 2006.229.10:34:46.63#ibcon#*before return 0, iclass 32, count 2 2006.229.10:34:46.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:46.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:34:46.63#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.10:34:46.63#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:46.63#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:46.75#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:46.75#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:46.75#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:34:46.75#ibcon#first serial, iclass 32, count 0 2006.229.10:34:46.75#ibcon#enter sib2, iclass 32, count 0 2006.229.10:34:46.75#ibcon#flushed, iclass 32, count 0 2006.229.10:34:46.75#ibcon#about to write, iclass 32, count 0 2006.229.10:34:46.75#ibcon#wrote, iclass 32, count 0 2006.229.10:34:46.75#ibcon#about to read 3, iclass 32, count 0 2006.229.10:34:46.77#ibcon#read 3, iclass 32, count 0 2006.229.10:34:46.77#ibcon#about to read 4, iclass 32, count 0 2006.229.10:34:46.77#ibcon#read 4, iclass 32, count 0 2006.229.10:34:46.77#ibcon#about to read 5, iclass 32, count 0 2006.229.10:34:46.77#ibcon#read 5, iclass 32, count 0 2006.229.10:34:46.77#ibcon#about to read 6, iclass 32, count 0 2006.229.10:34:46.77#ibcon#read 6, iclass 32, count 0 2006.229.10:34:46.77#ibcon#end of sib2, iclass 32, count 0 2006.229.10:34:46.77#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:34:46.77#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:34:46.77#ibcon#[27=USB\r\n] 2006.229.10:34:46.77#ibcon#*before write, iclass 32, count 0 2006.229.10:34:46.77#ibcon#enter sib2, iclass 32, count 0 2006.229.10:34:46.77#ibcon#flushed, iclass 32, count 0 2006.229.10:34:46.77#ibcon#about to write, iclass 32, count 0 2006.229.10:34:46.77#ibcon#wrote, iclass 32, count 0 2006.229.10:34:46.77#ibcon#about to read 3, iclass 32, count 0 2006.229.10:34:46.80#ibcon#read 3, iclass 32, count 0 2006.229.10:34:46.80#ibcon#about to read 4, iclass 32, count 0 2006.229.10:34:46.80#ibcon#read 4, iclass 32, count 0 2006.229.10:34:46.80#ibcon#about to read 5, iclass 32, count 0 2006.229.10:34:46.80#ibcon#read 5, iclass 32, count 0 2006.229.10:34:46.80#ibcon#about to read 6, iclass 32, count 0 2006.229.10:34:46.80#ibcon#read 6, iclass 32, count 0 2006.229.10:34:46.80#ibcon#end of sib2, iclass 32, count 0 2006.229.10:34:46.80#ibcon#*after write, iclass 32, count 0 2006.229.10:34:46.80#ibcon#*before return 0, iclass 32, count 0 2006.229.10:34:46.80#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:46.80#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:34:46.80#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:34:46.80#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:34:46.80$vck44/vblo=7,734.99 2006.229.10:34:46.80#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.10:34:46.80#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.10:34:46.80#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:46.80#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:46.80#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:46.80#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:46.80#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:34:46.80#ibcon#first serial, iclass 34, count 0 2006.229.10:34:46.80#ibcon#enter sib2, iclass 34, count 0 2006.229.10:34:46.80#ibcon#flushed, iclass 34, count 0 2006.229.10:34:46.80#ibcon#about to write, iclass 34, count 0 2006.229.10:34:46.80#ibcon#wrote, iclass 34, count 0 2006.229.10:34:46.80#ibcon#about to read 3, iclass 34, count 0 2006.229.10:34:46.82#ibcon#read 3, iclass 34, count 0 2006.229.10:34:46.82#ibcon#about to read 4, iclass 34, count 0 2006.229.10:34:46.82#ibcon#read 4, iclass 34, count 0 2006.229.10:34:46.82#ibcon#about to read 5, iclass 34, count 0 2006.229.10:34:46.82#ibcon#read 5, iclass 34, count 0 2006.229.10:34:46.82#ibcon#about to read 6, iclass 34, count 0 2006.229.10:34:46.82#ibcon#read 6, iclass 34, count 0 2006.229.10:34:46.82#ibcon#end of sib2, iclass 34, count 0 2006.229.10:34:46.82#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:34:46.82#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:34:46.82#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:34:46.82#ibcon#*before write, iclass 34, count 0 2006.229.10:34:46.82#ibcon#enter sib2, iclass 34, count 0 2006.229.10:34:46.82#ibcon#flushed, iclass 34, count 0 2006.229.10:34:46.82#ibcon#about to write, iclass 34, count 0 2006.229.10:34:46.82#ibcon#wrote, iclass 34, count 0 2006.229.10:34:46.82#ibcon#about to read 3, iclass 34, count 0 2006.229.10:34:46.86#ibcon#read 3, iclass 34, count 0 2006.229.10:34:46.86#ibcon#about to read 4, iclass 34, count 0 2006.229.10:34:46.86#ibcon#read 4, iclass 34, count 0 2006.229.10:34:46.86#ibcon#about to read 5, iclass 34, count 0 2006.229.10:34:46.86#ibcon#read 5, iclass 34, count 0 2006.229.10:34:46.86#ibcon#about to read 6, iclass 34, count 0 2006.229.10:34:46.86#ibcon#read 6, iclass 34, count 0 2006.229.10:34:46.86#ibcon#end of sib2, iclass 34, count 0 2006.229.10:34:46.86#ibcon#*after write, iclass 34, count 0 2006.229.10:34:46.86#ibcon#*before return 0, iclass 34, count 0 2006.229.10:34:46.86#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:46.86#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:34:46.86#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:34:46.86#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:34:46.86$vck44/vb=7,4 2006.229.10:34:46.86#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.10:34:46.86#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.10:34:46.86#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:46.86#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:46.92#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:46.92#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:46.92#ibcon#enter wrdev, iclass 36, count 2 2006.229.10:34:46.92#ibcon#first serial, iclass 36, count 2 2006.229.10:34:46.92#ibcon#enter sib2, iclass 36, count 2 2006.229.10:34:46.92#ibcon#flushed, iclass 36, count 2 2006.229.10:34:46.92#ibcon#about to write, iclass 36, count 2 2006.229.10:34:46.92#ibcon#wrote, iclass 36, count 2 2006.229.10:34:46.92#ibcon#about to read 3, iclass 36, count 2 2006.229.10:34:46.94#ibcon#read 3, iclass 36, count 2 2006.229.10:34:46.94#ibcon#about to read 4, iclass 36, count 2 2006.229.10:34:46.94#ibcon#read 4, iclass 36, count 2 2006.229.10:34:46.94#ibcon#about to read 5, iclass 36, count 2 2006.229.10:34:46.94#ibcon#read 5, iclass 36, count 2 2006.229.10:34:46.94#ibcon#about to read 6, iclass 36, count 2 2006.229.10:34:46.94#ibcon#read 6, iclass 36, count 2 2006.229.10:34:46.94#ibcon#end of sib2, iclass 36, count 2 2006.229.10:34:46.94#ibcon#*mode == 0, iclass 36, count 2 2006.229.10:34:46.94#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.10:34:46.94#ibcon#[27=AT07-04\r\n] 2006.229.10:34:46.94#ibcon#*before write, iclass 36, count 2 2006.229.10:34:46.94#ibcon#enter sib2, iclass 36, count 2 2006.229.10:34:46.94#ibcon#flushed, iclass 36, count 2 2006.229.10:34:46.94#ibcon#about to write, iclass 36, count 2 2006.229.10:34:46.94#ibcon#wrote, iclass 36, count 2 2006.229.10:34:46.94#ibcon#about to read 3, iclass 36, count 2 2006.229.10:34:46.97#ibcon#read 3, iclass 36, count 2 2006.229.10:34:46.97#ibcon#about to read 4, iclass 36, count 2 2006.229.10:34:46.97#ibcon#read 4, iclass 36, count 2 2006.229.10:34:46.97#ibcon#about to read 5, iclass 36, count 2 2006.229.10:34:46.97#ibcon#read 5, iclass 36, count 2 2006.229.10:34:46.97#ibcon#about to read 6, iclass 36, count 2 2006.229.10:34:46.97#ibcon#read 6, iclass 36, count 2 2006.229.10:34:46.97#ibcon#end of sib2, iclass 36, count 2 2006.229.10:34:46.97#ibcon#*after write, iclass 36, count 2 2006.229.10:34:46.97#ibcon#*before return 0, iclass 36, count 2 2006.229.10:34:46.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:46.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:34:46.97#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.10:34:46.97#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:46.97#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:47.09#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:47.09#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:47.09#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:34:47.09#ibcon#first serial, iclass 36, count 0 2006.229.10:34:47.09#ibcon#enter sib2, iclass 36, count 0 2006.229.10:34:47.09#ibcon#flushed, iclass 36, count 0 2006.229.10:34:47.09#ibcon#about to write, iclass 36, count 0 2006.229.10:34:47.09#ibcon#wrote, iclass 36, count 0 2006.229.10:34:47.09#ibcon#about to read 3, iclass 36, count 0 2006.229.10:34:47.11#ibcon#read 3, iclass 36, count 0 2006.229.10:34:47.11#ibcon#about to read 4, iclass 36, count 0 2006.229.10:34:47.11#ibcon#read 4, iclass 36, count 0 2006.229.10:34:47.11#ibcon#about to read 5, iclass 36, count 0 2006.229.10:34:47.11#ibcon#read 5, iclass 36, count 0 2006.229.10:34:47.11#ibcon#about to read 6, iclass 36, count 0 2006.229.10:34:47.11#ibcon#read 6, iclass 36, count 0 2006.229.10:34:47.11#ibcon#end of sib2, iclass 36, count 0 2006.229.10:34:47.11#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:34:47.11#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:34:47.11#ibcon#[27=USB\r\n] 2006.229.10:34:47.11#ibcon#*before write, iclass 36, count 0 2006.229.10:34:47.11#ibcon#enter sib2, iclass 36, count 0 2006.229.10:34:47.11#ibcon#flushed, iclass 36, count 0 2006.229.10:34:47.11#ibcon#about to write, iclass 36, count 0 2006.229.10:34:47.11#ibcon#wrote, iclass 36, count 0 2006.229.10:34:47.11#ibcon#about to read 3, iclass 36, count 0 2006.229.10:34:47.14#ibcon#read 3, iclass 36, count 0 2006.229.10:34:47.14#ibcon#about to read 4, iclass 36, count 0 2006.229.10:34:47.14#ibcon#read 4, iclass 36, count 0 2006.229.10:34:47.14#ibcon#about to read 5, iclass 36, count 0 2006.229.10:34:47.14#ibcon#read 5, iclass 36, count 0 2006.229.10:34:47.14#ibcon#about to read 6, iclass 36, count 0 2006.229.10:34:47.14#ibcon#read 6, iclass 36, count 0 2006.229.10:34:47.14#ibcon#end of sib2, iclass 36, count 0 2006.229.10:34:47.14#ibcon#*after write, iclass 36, count 0 2006.229.10:34:47.14#ibcon#*before return 0, iclass 36, count 0 2006.229.10:34:47.14#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:47.14#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:34:47.14#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:34:47.14#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:34:47.14$vck44/vblo=8,744.99 2006.229.10:34:47.14#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:34:47.14#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:34:47.14#ibcon#ireg 17 cls_cnt 0 2006.229.10:34:47.14#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:47.15#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:47.15#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:47.15#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:34:47.15#ibcon#first serial, iclass 38, count 0 2006.229.10:34:47.15#ibcon#enter sib2, iclass 38, count 0 2006.229.10:34:47.15#ibcon#flushed, iclass 38, count 0 2006.229.10:34:47.15#ibcon#about to write, iclass 38, count 0 2006.229.10:34:47.15#ibcon#wrote, iclass 38, count 0 2006.229.10:34:47.15#ibcon#about to read 3, iclass 38, count 0 2006.229.10:34:47.16#ibcon#read 3, iclass 38, count 0 2006.229.10:34:47.16#ibcon#about to read 4, iclass 38, count 0 2006.229.10:34:47.16#ibcon#read 4, iclass 38, count 0 2006.229.10:34:47.16#ibcon#about to read 5, iclass 38, count 0 2006.229.10:34:47.16#ibcon#read 5, iclass 38, count 0 2006.229.10:34:47.16#ibcon#about to read 6, iclass 38, count 0 2006.229.10:34:47.16#ibcon#read 6, iclass 38, count 0 2006.229.10:34:47.16#ibcon#end of sib2, iclass 38, count 0 2006.229.10:34:47.16#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:34:47.16#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:34:47.16#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:34:47.16#ibcon#*before write, iclass 38, count 0 2006.229.10:34:47.16#ibcon#enter sib2, iclass 38, count 0 2006.229.10:34:47.16#ibcon#flushed, iclass 38, count 0 2006.229.10:34:47.16#ibcon#about to write, iclass 38, count 0 2006.229.10:34:47.16#ibcon#wrote, iclass 38, count 0 2006.229.10:34:47.16#ibcon#about to read 3, iclass 38, count 0 2006.229.10:34:47.20#ibcon#read 3, iclass 38, count 0 2006.229.10:34:47.20#ibcon#about to read 4, iclass 38, count 0 2006.229.10:34:47.20#ibcon#read 4, iclass 38, count 0 2006.229.10:34:47.20#ibcon#about to read 5, iclass 38, count 0 2006.229.10:34:47.20#ibcon#read 5, iclass 38, count 0 2006.229.10:34:47.20#ibcon#about to read 6, iclass 38, count 0 2006.229.10:34:47.20#ibcon#read 6, iclass 38, count 0 2006.229.10:34:47.20#ibcon#end of sib2, iclass 38, count 0 2006.229.10:34:47.20#ibcon#*after write, iclass 38, count 0 2006.229.10:34:47.20#ibcon#*before return 0, iclass 38, count 0 2006.229.10:34:47.20#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:47.20#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:34:47.20#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:34:47.20#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:34:47.20$vck44/vb=8,4 2006.229.10:34:47.20#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.10:34:47.20#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.10:34:47.20#ibcon#ireg 11 cls_cnt 2 2006.229.10:34:47.20#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:47.26#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:47.26#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:47.26#ibcon#enter wrdev, iclass 40, count 2 2006.229.10:34:47.26#ibcon#first serial, iclass 40, count 2 2006.229.10:34:47.26#ibcon#enter sib2, iclass 40, count 2 2006.229.10:34:47.26#ibcon#flushed, iclass 40, count 2 2006.229.10:34:47.26#ibcon#about to write, iclass 40, count 2 2006.229.10:34:47.26#ibcon#wrote, iclass 40, count 2 2006.229.10:34:47.26#ibcon#about to read 3, iclass 40, count 2 2006.229.10:34:47.28#ibcon#read 3, iclass 40, count 2 2006.229.10:34:47.28#ibcon#about to read 4, iclass 40, count 2 2006.229.10:34:47.28#ibcon#read 4, iclass 40, count 2 2006.229.10:34:47.28#ibcon#about to read 5, iclass 40, count 2 2006.229.10:34:47.28#ibcon#read 5, iclass 40, count 2 2006.229.10:34:47.28#ibcon#about to read 6, iclass 40, count 2 2006.229.10:34:47.28#ibcon#read 6, iclass 40, count 2 2006.229.10:34:47.28#ibcon#end of sib2, iclass 40, count 2 2006.229.10:34:47.28#ibcon#*mode == 0, iclass 40, count 2 2006.229.10:34:47.28#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.10:34:47.28#ibcon#[27=AT08-04\r\n] 2006.229.10:34:47.28#ibcon#*before write, iclass 40, count 2 2006.229.10:34:47.28#ibcon#enter sib2, iclass 40, count 2 2006.229.10:34:47.28#ibcon#flushed, iclass 40, count 2 2006.229.10:34:47.28#ibcon#about to write, iclass 40, count 2 2006.229.10:34:47.28#ibcon#wrote, iclass 40, count 2 2006.229.10:34:47.28#ibcon#about to read 3, iclass 40, count 2 2006.229.10:34:47.31#ibcon#read 3, iclass 40, count 2 2006.229.10:34:47.31#ibcon#about to read 4, iclass 40, count 2 2006.229.10:34:47.31#ibcon#read 4, iclass 40, count 2 2006.229.10:34:47.31#ibcon#about to read 5, iclass 40, count 2 2006.229.10:34:47.31#ibcon#read 5, iclass 40, count 2 2006.229.10:34:47.31#ibcon#about to read 6, iclass 40, count 2 2006.229.10:34:47.31#ibcon#read 6, iclass 40, count 2 2006.229.10:34:47.31#ibcon#end of sib2, iclass 40, count 2 2006.229.10:34:47.31#ibcon#*after write, iclass 40, count 2 2006.229.10:34:47.31#ibcon#*before return 0, iclass 40, count 2 2006.229.10:34:47.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:47.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:34:47.31#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.10:34:47.31#ibcon#ireg 7 cls_cnt 0 2006.229.10:34:47.31#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:47.43#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:47.43#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:47.43#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:34:47.43#ibcon#first serial, iclass 40, count 0 2006.229.10:34:47.43#ibcon#enter sib2, iclass 40, count 0 2006.229.10:34:47.43#ibcon#flushed, iclass 40, count 0 2006.229.10:34:47.43#ibcon#about to write, iclass 40, count 0 2006.229.10:34:47.43#ibcon#wrote, iclass 40, count 0 2006.229.10:34:47.43#ibcon#about to read 3, iclass 40, count 0 2006.229.10:34:47.45#ibcon#read 3, iclass 40, count 0 2006.229.10:34:47.45#ibcon#about to read 4, iclass 40, count 0 2006.229.10:34:47.45#ibcon#read 4, iclass 40, count 0 2006.229.10:34:47.45#ibcon#about to read 5, iclass 40, count 0 2006.229.10:34:47.45#ibcon#read 5, iclass 40, count 0 2006.229.10:34:47.45#ibcon#about to read 6, iclass 40, count 0 2006.229.10:34:47.45#ibcon#read 6, iclass 40, count 0 2006.229.10:34:47.45#ibcon#end of sib2, iclass 40, count 0 2006.229.10:34:47.45#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:34:47.45#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:34:47.45#ibcon#[27=USB\r\n] 2006.229.10:34:47.45#ibcon#*before write, iclass 40, count 0 2006.229.10:34:47.45#ibcon#enter sib2, iclass 40, count 0 2006.229.10:34:47.45#ibcon#flushed, iclass 40, count 0 2006.229.10:34:47.45#ibcon#about to write, iclass 40, count 0 2006.229.10:34:47.45#ibcon#wrote, iclass 40, count 0 2006.229.10:34:47.45#ibcon#about to read 3, iclass 40, count 0 2006.229.10:34:47.48#ibcon#read 3, iclass 40, count 0 2006.229.10:34:47.48#ibcon#about to read 4, iclass 40, count 0 2006.229.10:34:47.48#ibcon#read 4, iclass 40, count 0 2006.229.10:34:47.48#ibcon#about to read 5, iclass 40, count 0 2006.229.10:34:47.48#ibcon#read 5, iclass 40, count 0 2006.229.10:34:47.48#ibcon#about to read 6, iclass 40, count 0 2006.229.10:34:47.48#ibcon#read 6, iclass 40, count 0 2006.229.10:34:47.48#ibcon#end of sib2, iclass 40, count 0 2006.229.10:34:47.48#ibcon#*after write, iclass 40, count 0 2006.229.10:34:47.48#ibcon#*before return 0, iclass 40, count 0 2006.229.10:34:47.48#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:47.48#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:34:47.48#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:34:47.48#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:34:47.48$vck44/vabw=wide 2006.229.10:34:47.48#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.10:34:47.48#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.10:34:47.48#ibcon#ireg 8 cls_cnt 0 2006.229.10:34:47.48#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:47.48#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:47.48#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:47.48#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:34:47.48#ibcon#first serial, iclass 4, count 0 2006.229.10:34:47.48#ibcon#enter sib2, iclass 4, count 0 2006.229.10:34:47.48#ibcon#flushed, iclass 4, count 0 2006.229.10:34:47.48#ibcon#about to write, iclass 4, count 0 2006.229.10:34:47.48#ibcon#wrote, iclass 4, count 0 2006.229.10:34:47.48#ibcon#about to read 3, iclass 4, count 0 2006.229.10:34:47.50#ibcon#read 3, iclass 4, count 0 2006.229.10:34:47.50#ibcon#about to read 4, iclass 4, count 0 2006.229.10:34:47.50#ibcon#read 4, iclass 4, count 0 2006.229.10:34:47.50#ibcon#about to read 5, iclass 4, count 0 2006.229.10:34:47.50#ibcon#read 5, iclass 4, count 0 2006.229.10:34:47.50#ibcon#about to read 6, iclass 4, count 0 2006.229.10:34:47.50#ibcon#read 6, iclass 4, count 0 2006.229.10:34:47.50#ibcon#end of sib2, iclass 4, count 0 2006.229.10:34:47.50#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:34:47.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:34:47.50#ibcon#[25=BW32\r\n] 2006.229.10:34:47.50#ibcon#*before write, iclass 4, count 0 2006.229.10:34:47.50#ibcon#enter sib2, iclass 4, count 0 2006.229.10:34:47.50#ibcon#flushed, iclass 4, count 0 2006.229.10:34:47.50#ibcon#about to write, iclass 4, count 0 2006.229.10:34:47.50#ibcon#wrote, iclass 4, count 0 2006.229.10:34:47.50#ibcon#about to read 3, iclass 4, count 0 2006.229.10:34:47.53#ibcon#read 3, iclass 4, count 0 2006.229.10:34:47.53#ibcon#about to read 4, iclass 4, count 0 2006.229.10:34:47.53#ibcon#read 4, iclass 4, count 0 2006.229.10:34:47.53#ibcon#about to read 5, iclass 4, count 0 2006.229.10:34:47.53#ibcon#read 5, iclass 4, count 0 2006.229.10:34:47.53#ibcon#about to read 6, iclass 4, count 0 2006.229.10:34:47.53#ibcon#read 6, iclass 4, count 0 2006.229.10:34:47.53#ibcon#end of sib2, iclass 4, count 0 2006.229.10:34:47.53#ibcon#*after write, iclass 4, count 0 2006.229.10:34:47.53#ibcon#*before return 0, iclass 4, count 0 2006.229.10:34:47.53#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:47.53#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:34:47.53#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:34:47.53#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:34:47.53$vck44/vbbw=wide 2006.229.10:34:47.53#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.10:34:47.53#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.10:34:47.53#ibcon#ireg 8 cls_cnt 0 2006.229.10:34:47.53#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:34:47.60#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:34:47.60#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:34:47.60#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:34:47.60#ibcon#first serial, iclass 6, count 0 2006.229.10:34:47.60#ibcon#enter sib2, iclass 6, count 0 2006.229.10:34:47.60#ibcon#flushed, iclass 6, count 0 2006.229.10:34:47.60#ibcon#about to write, iclass 6, count 0 2006.229.10:34:47.60#ibcon#wrote, iclass 6, count 0 2006.229.10:34:47.60#ibcon#about to read 3, iclass 6, count 0 2006.229.10:34:47.62#ibcon#read 3, iclass 6, count 0 2006.229.10:34:47.62#ibcon#about to read 4, iclass 6, count 0 2006.229.10:34:47.62#ibcon#read 4, iclass 6, count 0 2006.229.10:34:47.62#ibcon#about to read 5, iclass 6, count 0 2006.229.10:34:47.62#ibcon#read 5, iclass 6, count 0 2006.229.10:34:47.62#ibcon#about to read 6, iclass 6, count 0 2006.229.10:34:47.62#ibcon#read 6, iclass 6, count 0 2006.229.10:34:47.62#ibcon#end of sib2, iclass 6, count 0 2006.229.10:34:47.62#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:34:47.62#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:34:47.62#ibcon#[27=BW32\r\n] 2006.229.10:34:47.62#ibcon#*before write, iclass 6, count 0 2006.229.10:34:47.62#ibcon#enter sib2, iclass 6, count 0 2006.229.10:34:47.62#ibcon#flushed, iclass 6, count 0 2006.229.10:34:47.62#ibcon#about to write, iclass 6, count 0 2006.229.10:34:47.62#ibcon#wrote, iclass 6, count 0 2006.229.10:34:47.62#ibcon#about to read 3, iclass 6, count 0 2006.229.10:34:47.65#ibcon#read 3, iclass 6, count 0 2006.229.10:34:47.65#ibcon#about to read 4, iclass 6, count 0 2006.229.10:34:47.65#ibcon#read 4, iclass 6, count 0 2006.229.10:34:47.65#ibcon#about to read 5, iclass 6, count 0 2006.229.10:34:47.65#ibcon#read 5, iclass 6, count 0 2006.229.10:34:47.65#ibcon#about to read 6, iclass 6, count 0 2006.229.10:34:47.65#ibcon#read 6, iclass 6, count 0 2006.229.10:34:47.65#ibcon#end of sib2, iclass 6, count 0 2006.229.10:34:47.65#ibcon#*after write, iclass 6, count 0 2006.229.10:34:47.65#ibcon#*before return 0, iclass 6, count 0 2006.229.10:34:47.65#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:34:47.65#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:34:47.65#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:34:47.65#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:34:47.65$setupk4/ifdk4 2006.229.10:34:47.65$ifdk4/lo= 2006.229.10:34:47.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:34:47.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:34:47.65$ifdk4/patch= 2006.229.10:34:47.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:34:47.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:34:47.66$setupk4/!*+20s 2006.229.10:34:48.31#abcon#<5=/03 1.4 2.4 28.49 981001.6\r\n> 2006.229.10:34:48.33#abcon#{5=INTERFACE CLEAR} 2006.229.10:34:48.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:34:58.48#abcon#<5=/03 1.4 2.4 28.49 981001.6\r\n> 2006.229.10:34:58.50#abcon#{5=INTERFACE CLEAR} 2006.229.10:34:58.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:35:02.17$setupk4/"tpicd 2006.229.10:35:02.17$setupk4/echo=off 2006.229.10:35:02.17$setupk4/xlog=off 2006.229.10:35:02.17:!2006.229.10:35:26 2006.229.10:35:08.14#trakl#Source acquired 2006.229.10:35:10.14#flagr#flagr/antenna,acquired 2006.229.10:35:26.00:preob 2006.229.10:35:26.14/onsource/TRACKING 2006.229.10:35:26.14:!2006.229.10:35:36 2006.229.10:35:36.00:"tape 2006.229.10:35:36.00:"st=record 2006.229.10:35:36.00:data_valid=on 2006.229.10:35:36.00:midob 2006.229.10:35:37.14/onsource/TRACKING 2006.229.10:35:37.14/wx/28.49,1001.6,98 2006.229.10:35:37.26/cable/+6.4031E-03 2006.229.10:35:38.35/va/01,08,usb,yes,29,32 2006.229.10:35:38.35/va/02,07,usb,yes,32,32 2006.229.10:35:38.35/va/03,06,usb,yes,39,42 2006.229.10:35:38.35/va/04,07,usb,yes,33,34 2006.229.10:35:38.35/va/05,04,usb,yes,29,30 2006.229.10:35:38.35/va/06,04,usb,yes,33,32 2006.229.10:35:38.35/va/07,05,usb,yes,29,30 2006.229.10:35:38.35/va/08,06,usb,yes,21,26 2006.229.10:35:38.58/valo/01,524.99,yes,locked 2006.229.10:35:38.58/valo/02,534.99,yes,locked 2006.229.10:35:38.58/valo/03,564.99,yes,locked 2006.229.10:35:38.58/valo/04,624.99,yes,locked 2006.229.10:35:38.58/valo/05,734.99,yes,locked 2006.229.10:35:38.58/valo/06,814.99,yes,locked 2006.229.10:35:38.58/valo/07,864.99,yes,locked 2006.229.10:35:38.58/valo/08,884.99,yes,locked 2006.229.10:35:39.67/vb/01,04,usb,yes,31,29 2006.229.10:35:39.67/vb/02,04,usb,yes,33,33 2006.229.10:35:39.67/vb/03,04,usb,yes,30,33 2006.229.10:35:39.67/vb/04,04,usb,yes,35,34 2006.229.10:35:39.67/vb/05,04,usb,yes,27,29 2006.229.10:35:39.67/vb/06,04,usb,yes,31,28 2006.229.10:35:39.67/vb/07,04,usb,yes,31,31 2006.229.10:35:39.67/vb/08,04,usb,yes,29,32 2006.229.10:35:39.90/vblo/01,629.99,yes,locked 2006.229.10:35:39.90/vblo/02,634.99,yes,locked 2006.229.10:35:39.90/vblo/03,649.99,yes,locked 2006.229.10:35:39.90/vblo/04,679.99,yes,locked 2006.229.10:35:39.90/vblo/05,709.99,yes,locked 2006.229.10:35:39.90/vblo/06,719.99,yes,locked 2006.229.10:35:39.90/vblo/07,734.99,yes,locked 2006.229.10:35:39.90/vblo/08,744.99,yes,locked 2006.229.10:35:40.05/vabw/8 2006.229.10:35:40.20/vbbw/8 2006.229.10:35:40.29/xfe/off,on,12.0 2006.229.10:35:40.67/ifatt/23,28,28,28 2006.229.10:35:41.07/fmout-gps/S +4.46E-07 2006.229.10:35:41.11:!2006.229.10:36:16 2006.229.10:36:16.00:data_valid=off 2006.229.10:36:16.00:"et 2006.229.10:36:16.00:!+3s 2006.229.10:36:19.01:"tape 2006.229.10:36:19.01:postob 2006.229.10:36:19.22/cable/+6.4037E-03 2006.229.10:36:19.22/wx/28.48,1001.6,98 2006.229.10:36:20.07/fmout-gps/S +4.47E-07 2006.229.10:36:20.07:scan_name=229-1037,jd0608,40 2006.229.10:36:20.07:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.229.10:36:21.14#flagr#flagr/antenna,new-source 2006.229.10:36:21.14:checkk5 2006.229.10:36:21.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:36:21.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:36:22.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:36:22.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:36:23.11/chk_obsdata//k5ts1/T2291035??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:36:23.53/chk_obsdata//k5ts2/T2291035??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:36:23.93/chk_obsdata//k5ts3/T2291035??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:36:24.37/chk_obsdata//k5ts4/T2291035??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.10:36:25.08/k5log//k5ts1_log_newline 2006.229.10:36:25.79/k5log//k5ts2_log_newline 2006.229.10:36:26.50/k5log//k5ts3_log_newline 2006.229.10:36:27.21/k5log//k5ts4_log_newline 2006.229.10:36:27.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:36:27.23:setupk4=1 2006.229.10:36:27.23$setupk4/echo=on 2006.229.10:36:27.23$setupk4/pcalon 2006.229.10:36:27.23$pcalon/"no phase cal control is implemented here 2006.229.10:36:27.23$setupk4/"tpicd=stop 2006.229.10:36:27.23$setupk4/"rec=synch_on 2006.229.10:36:27.23$setupk4/"rec_mode=128 2006.229.10:36:27.23$setupk4/!* 2006.229.10:36:27.23$setupk4/recpk4 2006.229.10:36:27.23$recpk4/recpatch= 2006.229.10:36:27.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:36:27.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:36:27.24$setupk4/vck44 2006.229.10:36:27.24$vck44/valo=1,524.99 2006.229.10:36:27.24#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.10:36:27.24#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.10:36:27.24#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:27.24#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:36:27.24#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:36:27.24#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:36:27.24#ibcon#enter wrdev, iclass 17, count 0 2006.229.10:36:27.24#ibcon#first serial, iclass 17, count 0 2006.229.10:36:27.24#ibcon#enter sib2, iclass 17, count 0 2006.229.10:36:27.24#ibcon#flushed, iclass 17, count 0 2006.229.10:36:27.24#ibcon#about to write, iclass 17, count 0 2006.229.10:36:27.24#ibcon#wrote, iclass 17, count 0 2006.229.10:36:27.24#ibcon#about to read 3, iclass 17, count 0 2006.229.10:36:27.25#ibcon#read 3, iclass 17, count 0 2006.229.10:36:27.25#ibcon#about to read 4, iclass 17, count 0 2006.229.10:36:27.25#ibcon#read 4, iclass 17, count 0 2006.229.10:36:27.25#ibcon#about to read 5, iclass 17, count 0 2006.229.10:36:27.25#ibcon#read 5, iclass 17, count 0 2006.229.10:36:27.25#ibcon#about to read 6, iclass 17, count 0 2006.229.10:36:27.25#ibcon#read 6, iclass 17, count 0 2006.229.10:36:27.25#ibcon#end of sib2, iclass 17, count 0 2006.229.10:36:27.25#ibcon#*mode == 0, iclass 17, count 0 2006.229.10:36:27.25#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.10:36:27.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:36:27.25#ibcon#*before write, iclass 17, count 0 2006.229.10:36:27.25#ibcon#enter sib2, iclass 17, count 0 2006.229.10:36:27.25#ibcon#flushed, iclass 17, count 0 2006.229.10:36:27.25#ibcon#about to write, iclass 17, count 0 2006.229.10:36:27.25#ibcon#wrote, iclass 17, count 0 2006.229.10:36:27.25#ibcon#about to read 3, iclass 17, count 0 2006.229.10:36:27.30#ibcon#read 3, iclass 17, count 0 2006.229.10:36:27.30#ibcon#about to read 4, iclass 17, count 0 2006.229.10:36:27.30#ibcon#read 4, iclass 17, count 0 2006.229.10:36:27.30#ibcon#about to read 5, iclass 17, count 0 2006.229.10:36:27.30#ibcon#read 5, iclass 17, count 0 2006.229.10:36:27.30#ibcon#about to read 6, iclass 17, count 0 2006.229.10:36:27.30#ibcon#read 6, iclass 17, count 0 2006.229.10:36:27.30#ibcon#end of sib2, iclass 17, count 0 2006.229.10:36:27.30#ibcon#*after write, iclass 17, count 0 2006.229.10:36:27.30#ibcon#*before return 0, iclass 17, count 0 2006.229.10:36:27.30#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:36:27.30#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:36:27.30#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.10:36:27.30#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.10:36:27.30$vck44/va=1,8 2006.229.10:36:27.30#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.10:36:27.30#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.10:36:27.30#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:27.30#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:36:27.30#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:36:27.30#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:36:27.30#ibcon#enter wrdev, iclass 19, count 2 2006.229.10:36:27.30#ibcon#first serial, iclass 19, count 2 2006.229.10:36:27.30#ibcon#enter sib2, iclass 19, count 2 2006.229.10:36:27.30#ibcon#flushed, iclass 19, count 2 2006.229.10:36:27.30#ibcon#about to write, iclass 19, count 2 2006.229.10:36:27.30#ibcon#wrote, iclass 19, count 2 2006.229.10:36:27.30#ibcon#about to read 3, iclass 19, count 2 2006.229.10:36:27.32#ibcon#read 3, iclass 19, count 2 2006.229.10:36:27.32#ibcon#about to read 4, iclass 19, count 2 2006.229.10:36:27.32#ibcon#read 4, iclass 19, count 2 2006.229.10:36:27.32#ibcon#about to read 5, iclass 19, count 2 2006.229.10:36:27.32#ibcon#read 5, iclass 19, count 2 2006.229.10:36:27.32#ibcon#about to read 6, iclass 19, count 2 2006.229.10:36:27.32#ibcon#read 6, iclass 19, count 2 2006.229.10:36:27.32#ibcon#end of sib2, iclass 19, count 2 2006.229.10:36:27.32#ibcon#*mode == 0, iclass 19, count 2 2006.229.10:36:27.32#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.10:36:27.32#ibcon#[25=AT01-08\r\n] 2006.229.10:36:27.32#ibcon#*before write, iclass 19, count 2 2006.229.10:36:27.32#ibcon#enter sib2, iclass 19, count 2 2006.229.10:36:27.32#ibcon#flushed, iclass 19, count 2 2006.229.10:36:27.32#ibcon#about to write, iclass 19, count 2 2006.229.10:36:27.32#ibcon#wrote, iclass 19, count 2 2006.229.10:36:27.32#ibcon#about to read 3, iclass 19, count 2 2006.229.10:36:27.35#ibcon#read 3, iclass 19, count 2 2006.229.10:36:27.35#ibcon#about to read 4, iclass 19, count 2 2006.229.10:36:27.35#ibcon#read 4, iclass 19, count 2 2006.229.10:36:27.35#ibcon#about to read 5, iclass 19, count 2 2006.229.10:36:27.35#ibcon#read 5, iclass 19, count 2 2006.229.10:36:27.35#ibcon#about to read 6, iclass 19, count 2 2006.229.10:36:27.35#ibcon#read 6, iclass 19, count 2 2006.229.10:36:27.35#ibcon#end of sib2, iclass 19, count 2 2006.229.10:36:27.35#ibcon#*after write, iclass 19, count 2 2006.229.10:36:27.35#ibcon#*before return 0, iclass 19, count 2 2006.229.10:36:27.35#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:36:27.35#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:36:27.35#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.10:36:27.35#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:27.35#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:36:27.47#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:36:27.47#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:36:27.47#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:36:27.47#ibcon#first serial, iclass 19, count 0 2006.229.10:36:27.47#ibcon#enter sib2, iclass 19, count 0 2006.229.10:36:27.47#ibcon#flushed, iclass 19, count 0 2006.229.10:36:27.47#ibcon#about to write, iclass 19, count 0 2006.229.10:36:27.47#ibcon#wrote, iclass 19, count 0 2006.229.10:36:27.47#ibcon#about to read 3, iclass 19, count 0 2006.229.10:36:27.49#ibcon#read 3, iclass 19, count 0 2006.229.10:36:27.49#ibcon#about to read 4, iclass 19, count 0 2006.229.10:36:27.49#ibcon#read 4, iclass 19, count 0 2006.229.10:36:27.49#ibcon#about to read 5, iclass 19, count 0 2006.229.10:36:27.49#ibcon#read 5, iclass 19, count 0 2006.229.10:36:27.49#ibcon#about to read 6, iclass 19, count 0 2006.229.10:36:27.49#ibcon#read 6, iclass 19, count 0 2006.229.10:36:27.49#ibcon#end of sib2, iclass 19, count 0 2006.229.10:36:27.49#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:36:27.49#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:36:27.49#ibcon#[25=USB\r\n] 2006.229.10:36:27.49#ibcon#*before write, iclass 19, count 0 2006.229.10:36:27.49#ibcon#enter sib2, iclass 19, count 0 2006.229.10:36:27.49#ibcon#flushed, iclass 19, count 0 2006.229.10:36:27.49#ibcon#about to write, iclass 19, count 0 2006.229.10:36:27.49#ibcon#wrote, iclass 19, count 0 2006.229.10:36:27.49#ibcon#about to read 3, iclass 19, count 0 2006.229.10:36:27.52#ibcon#read 3, iclass 19, count 0 2006.229.10:36:27.52#ibcon#about to read 4, iclass 19, count 0 2006.229.10:36:27.52#ibcon#read 4, iclass 19, count 0 2006.229.10:36:27.52#ibcon#about to read 5, iclass 19, count 0 2006.229.10:36:27.52#ibcon#read 5, iclass 19, count 0 2006.229.10:36:27.52#ibcon#about to read 6, iclass 19, count 0 2006.229.10:36:27.52#ibcon#read 6, iclass 19, count 0 2006.229.10:36:27.52#ibcon#end of sib2, iclass 19, count 0 2006.229.10:36:27.52#ibcon#*after write, iclass 19, count 0 2006.229.10:36:27.52#ibcon#*before return 0, iclass 19, count 0 2006.229.10:36:27.52#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:36:27.52#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:36:27.52#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:36:27.52#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:36:27.52$vck44/valo=2,534.99 2006.229.10:36:27.52#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.10:36:27.52#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.10:36:27.52#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:27.52#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:27.52#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:27.52#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:27.52#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:36:27.52#ibcon#first serial, iclass 21, count 0 2006.229.10:36:27.52#ibcon#enter sib2, iclass 21, count 0 2006.229.10:36:27.52#ibcon#flushed, iclass 21, count 0 2006.229.10:36:27.52#ibcon#about to write, iclass 21, count 0 2006.229.10:36:27.52#ibcon#wrote, iclass 21, count 0 2006.229.10:36:27.52#ibcon#about to read 3, iclass 21, count 0 2006.229.10:36:27.54#ibcon#read 3, iclass 21, count 0 2006.229.10:36:27.54#ibcon#about to read 4, iclass 21, count 0 2006.229.10:36:27.54#ibcon#read 4, iclass 21, count 0 2006.229.10:36:27.54#ibcon#about to read 5, iclass 21, count 0 2006.229.10:36:27.54#ibcon#read 5, iclass 21, count 0 2006.229.10:36:27.54#ibcon#about to read 6, iclass 21, count 0 2006.229.10:36:27.54#ibcon#read 6, iclass 21, count 0 2006.229.10:36:27.54#ibcon#end of sib2, iclass 21, count 0 2006.229.10:36:27.54#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:36:27.54#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:36:27.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:36:27.54#ibcon#*before write, iclass 21, count 0 2006.229.10:36:27.54#ibcon#enter sib2, iclass 21, count 0 2006.229.10:36:27.54#ibcon#flushed, iclass 21, count 0 2006.229.10:36:27.54#ibcon#about to write, iclass 21, count 0 2006.229.10:36:27.54#ibcon#wrote, iclass 21, count 0 2006.229.10:36:27.54#ibcon#about to read 3, iclass 21, count 0 2006.229.10:36:27.58#ibcon#read 3, iclass 21, count 0 2006.229.10:36:27.58#ibcon#about to read 4, iclass 21, count 0 2006.229.10:36:27.58#ibcon#read 4, iclass 21, count 0 2006.229.10:36:27.58#ibcon#about to read 5, iclass 21, count 0 2006.229.10:36:27.58#ibcon#read 5, iclass 21, count 0 2006.229.10:36:27.58#ibcon#about to read 6, iclass 21, count 0 2006.229.10:36:27.58#ibcon#read 6, iclass 21, count 0 2006.229.10:36:27.58#ibcon#end of sib2, iclass 21, count 0 2006.229.10:36:27.58#ibcon#*after write, iclass 21, count 0 2006.229.10:36:27.58#ibcon#*before return 0, iclass 21, count 0 2006.229.10:36:27.58#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:27.58#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:27.58#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:36:27.58#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:36:27.58$vck44/va=2,7 2006.229.10:36:27.58#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.10:36:27.58#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.10:36:27.58#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:27.58#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:27.64#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:27.64#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:27.64#ibcon#enter wrdev, iclass 23, count 2 2006.229.10:36:27.64#ibcon#first serial, iclass 23, count 2 2006.229.10:36:27.64#ibcon#enter sib2, iclass 23, count 2 2006.229.10:36:27.64#ibcon#flushed, iclass 23, count 2 2006.229.10:36:27.64#ibcon#about to write, iclass 23, count 2 2006.229.10:36:27.64#ibcon#wrote, iclass 23, count 2 2006.229.10:36:27.64#ibcon#about to read 3, iclass 23, count 2 2006.229.10:36:27.66#ibcon#read 3, iclass 23, count 2 2006.229.10:36:27.66#ibcon#about to read 4, iclass 23, count 2 2006.229.10:36:27.66#ibcon#read 4, iclass 23, count 2 2006.229.10:36:27.66#ibcon#about to read 5, iclass 23, count 2 2006.229.10:36:27.66#ibcon#read 5, iclass 23, count 2 2006.229.10:36:27.66#ibcon#about to read 6, iclass 23, count 2 2006.229.10:36:27.66#ibcon#read 6, iclass 23, count 2 2006.229.10:36:27.66#ibcon#end of sib2, iclass 23, count 2 2006.229.10:36:27.66#ibcon#*mode == 0, iclass 23, count 2 2006.229.10:36:27.66#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.10:36:27.66#ibcon#[25=AT02-07\r\n] 2006.229.10:36:27.66#ibcon#*before write, iclass 23, count 2 2006.229.10:36:27.66#ibcon#enter sib2, iclass 23, count 2 2006.229.10:36:27.66#ibcon#flushed, iclass 23, count 2 2006.229.10:36:27.66#ibcon#about to write, iclass 23, count 2 2006.229.10:36:27.66#ibcon#wrote, iclass 23, count 2 2006.229.10:36:27.66#ibcon#about to read 3, iclass 23, count 2 2006.229.10:36:27.69#ibcon#read 3, iclass 23, count 2 2006.229.10:36:27.69#ibcon#about to read 4, iclass 23, count 2 2006.229.10:36:27.69#ibcon#read 4, iclass 23, count 2 2006.229.10:36:27.69#ibcon#about to read 5, iclass 23, count 2 2006.229.10:36:27.69#ibcon#read 5, iclass 23, count 2 2006.229.10:36:27.69#ibcon#about to read 6, iclass 23, count 2 2006.229.10:36:27.69#ibcon#read 6, iclass 23, count 2 2006.229.10:36:27.69#ibcon#end of sib2, iclass 23, count 2 2006.229.10:36:27.69#ibcon#*after write, iclass 23, count 2 2006.229.10:36:27.69#ibcon#*before return 0, iclass 23, count 2 2006.229.10:36:27.69#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:27.69#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:27.69#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.10:36:27.69#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:27.69#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:27.81#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:27.81#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:27.81#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:36:27.81#ibcon#first serial, iclass 23, count 0 2006.229.10:36:27.81#ibcon#enter sib2, iclass 23, count 0 2006.229.10:36:27.81#ibcon#flushed, iclass 23, count 0 2006.229.10:36:27.81#ibcon#about to write, iclass 23, count 0 2006.229.10:36:27.81#ibcon#wrote, iclass 23, count 0 2006.229.10:36:27.81#ibcon#about to read 3, iclass 23, count 0 2006.229.10:36:27.83#ibcon#read 3, iclass 23, count 0 2006.229.10:36:27.83#ibcon#about to read 4, iclass 23, count 0 2006.229.10:36:27.83#ibcon#read 4, iclass 23, count 0 2006.229.10:36:27.83#ibcon#about to read 5, iclass 23, count 0 2006.229.10:36:27.83#ibcon#read 5, iclass 23, count 0 2006.229.10:36:27.83#ibcon#about to read 6, iclass 23, count 0 2006.229.10:36:27.83#ibcon#read 6, iclass 23, count 0 2006.229.10:36:27.83#ibcon#end of sib2, iclass 23, count 0 2006.229.10:36:27.83#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:36:27.83#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:36:27.83#ibcon#[25=USB\r\n] 2006.229.10:36:27.83#ibcon#*before write, iclass 23, count 0 2006.229.10:36:27.83#ibcon#enter sib2, iclass 23, count 0 2006.229.10:36:27.83#ibcon#flushed, iclass 23, count 0 2006.229.10:36:27.83#ibcon#about to write, iclass 23, count 0 2006.229.10:36:27.83#ibcon#wrote, iclass 23, count 0 2006.229.10:36:27.83#ibcon#about to read 3, iclass 23, count 0 2006.229.10:36:27.86#ibcon#read 3, iclass 23, count 0 2006.229.10:36:27.86#ibcon#about to read 4, iclass 23, count 0 2006.229.10:36:27.86#ibcon#read 4, iclass 23, count 0 2006.229.10:36:27.86#ibcon#about to read 5, iclass 23, count 0 2006.229.10:36:27.86#ibcon#read 5, iclass 23, count 0 2006.229.10:36:27.86#ibcon#about to read 6, iclass 23, count 0 2006.229.10:36:27.86#ibcon#read 6, iclass 23, count 0 2006.229.10:36:27.86#ibcon#end of sib2, iclass 23, count 0 2006.229.10:36:27.86#ibcon#*after write, iclass 23, count 0 2006.229.10:36:27.86#ibcon#*before return 0, iclass 23, count 0 2006.229.10:36:27.86#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:27.86#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:27.86#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:36:27.86#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:36:27.86$vck44/valo=3,564.99 2006.229.10:36:27.86#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.10:36:27.86#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.10:36:27.86#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:27.86#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:27.86#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:27.86#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:27.86#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:36:27.86#ibcon#first serial, iclass 25, count 0 2006.229.10:36:27.86#ibcon#enter sib2, iclass 25, count 0 2006.229.10:36:27.86#ibcon#flushed, iclass 25, count 0 2006.229.10:36:27.86#ibcon#about to write, iclass 25, count 0 2006.229.10:36:27.86#ibcon#wrote, iclass 25, count 0 2006.229.10:36:27.86#ibcon#about to read 3, iclass 25, count 0 2006.229.10:36:27.88#ibcon#read 3, iclass 25, count 0 2006.229.10:36:27.88#ibcon#about to read 4, iclass 25, count 0 2006.229.10:36:27.88#ibcon#read 4, iclass 25, count 0 2006.229.10:36:27.88#ibcon#about to read 5, iclass 25, count 0 2006.229.10:36:27.88#ibcon#read 5, iclass 25, count 0 2006.229.10:36:27.88#ibcon#about to read 6, iclass 25, count 0 2006.229.10:36:27.88#ibcon#read 6, iclass 25, count 0 2006.229.10:36:27.88#ibcon#end of sib2, iclass 25, count 0 2006.229.10:36:27.88#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:36:27.88#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:36:27.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:36:27.88#ibcon#*before write, iclass 25, count 0 2006.229.10:36:27.88#ibcon#enter sib2, iclass 25, count 0 2006.229.10:36:27.88#ibcon#flushed, iclass 25, count 0 2006.229.10:36:27.88#ibcon#about to write, iclass 25, count 0 2006.229.10:36:27.88#ibcon#wrote, iclass 25, count 0 2006.229.10:36:27.88#ibcon#about to read 3, iclass 25, count 0 2006.229.10:36:27.92#ibcon#read 3, iclass 25, count 0 2006.229.10:36:27.92#ibcon#about to read 4, iclass 25, count 0 2006.229.10:36:27.92#ibcon#read 4, iclass 25, count 0 2006.229.10:36:27.92#ibcon#about to read 5, iclass 25, count 0 2006.229.10:36:27.92#ibcon#read 5, iclass 25, count 0 2006.229.10:36:27.92#ibcon#about to read 6, iclass 25, count 0 2006.229.10:36:27.92#ibcon#read 6, iclass 25, count 0 2006.229.10:36:27.92#ibcon#end of sib2, iclass 25, count 0 2006.229.10:36:27.92#ibcon#*after write, iclass 25, count 0 2006.229.10:36:27.92#ibcon#*before return 0, iclass 25, count 0 2006.229.10:36:27.92#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:27.92#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:27.92#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:36:27.92#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:36:27.92$vck44/va=3,6 2006.229.10:36:27.92#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.10:36:27.92#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.10:36:27.92#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:27.92#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:27.98#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:27.98#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:27.98#ibcon#enter wrdev, iclass 27, count 2 2006.229.10:36:27.98#ibcon#first serial, iclass 27, count 2 2006.229.10:36:27.98#ibcon#enter sib2, iclass 27, count 2 2006.229.10:36:27.98#ibcon#flushed, iclass 27, count 2 2006.229.10:36:27.98#ibcon#about to write, iclass 27, count 2 2006.229.10:36:27.98#ibcon#wrote, iclass 27, count 2 2006.229.10:36:27.98#ibcon#about to read 3, iclass 27, count 2 2006.229.10:36:28.00#ibcon#read 3, iclass 27, count 2 2006.229.10:36:28.00#ibcon#about to read 4, iclass 27, count 2 2006.229.10:36:28.00#ibcon#read 4, iclass 27, count 2 2006.229.10:36:28.00#ibcon#about to read 5, iclass 27, count 2 2006.229.10:36:28.00#ibcon#read 5, iclass 27, count 2 2006.229.10:36:28.00#ibcon#about to read 6, iclass 27, count 2 2006.229.10:36:28.00#ibcon#read 6, iclass 27, count 2 2006.229.10:36:28.00#ibcon#end of sib2, iclass 27, count 2 2006.229.10:36:28.00#ibcon#*mode == 0, iclass 27, count 2 2006.229.10:36:28.00#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.10:36:28.00#ibcon#[25=AT03-06\r\n] 2006.229.10:36:28.00#ibcon#*before write, iclass 27, count 2 2006.229.10:36:28.00#ibcon#enter sib2, iclass 27, count 2 2006.229.10:36:28.00#ibcon#flushed, iclass 27, count 2 2006.229.10:36:28.00#ibcon#about to write, iclass 27, count 2 2006.229.10:36:28.00#ibcon#wrote, iclass 27, count 2 2006.229.10:36:28.00#ibcon#about to read 3, iclass 27, count 2 2006.229.10:36:28.03#ibcon#read 3, iclass 27, count 2 2006.229.10:36:28.03#ibcon#about to read 4, iclass 27, count 2 2006.229.10:36:28.03#ibcon#read 4, iclass 27, count 2 2006.229.10:36:28.03#ibcon#about to read 5, iclass 27, count 2 2006.229.10:36:28.03#ibcon#read 5, iclass 27, count 2 2006.229.10:36:28.03#ibcon#about to read 6, iclass 27, count 2 2006.229.10:36:28.03#ibcon#read 6, iclass 27, count 2 2006.229.10:36:28.03#ibcon#end of sib2, iclass 27, count 2 2006.229.10:36:28.03#ibcon#*after write, iclass 27, count 2 2006.229.10:36:28.03#ibcon#*before return 0, iclass 27, count 2 2006.229.10:36:28.03#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:28.03#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:28.03#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.10:36:28.03#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:28.03#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:28.15#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:28.15#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:28.15#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:36:28.15#ibcon#first serial, iclass 27, count 0 2006.229.10:36:28.15#ibcon#enter sib2, iclass 27, count 0 2006.229.10:36:28.15#ibcon#flushed, iclass 27, count 0 2006.229.10:36:28.15#ibcon#about to write, iclass 27, count 0 2006.229.10:36:28.15#ibcon#wrote, iclass 27, count 0 2006.229.10:36:28.15#ibcon#about to read 3, iclass 27, count 0 2006.229.10:36:28.17#ibcon#read 3, iclass 27, count 0 2006.229.10:36:28.17#ibcon#about to read 4, iclass 27, count 0 2006.229.10:36:28.17#ibcon#read 4, iclass 27, count 0 2006.229.10:36:28.17#ibcon#about to read 5, iclass 27, count 0 2006.229.10:36:28.17#ibcon#read 5, iclass 27, count 0 2006.229.10:36:28.17#ibcon#about to read 6, iclass 27, count 0 2006.229.10:36:28.17#ibcon#read 6, iclass 27, count 0 2006.229.10:36:28.17#ibcon#end of sib2, iclass 27, count 0 2006.229.10:36:28.17#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:36:28.17#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:36:28.17#ibcon#[25=USB\r\n] 2006.229.10:36:28.17#ibcon#*before write, iclass 27, count 0 2006.229.10:36:28.17#ibcon#enter sib2, iclass 27, count 0 2006.229.10:36:28.17#ibcon#flushed, iclass 27, count 0 2006.229.10:36:28.17#ibcon#about to write, iclass 27, count 0 2006.229.10:36:28.17#ibcon#wrote, iclass 27, count 0 2006.229.10:36:28.17#ibcon#about to read 3, iclass 27, count 0 2006.229.10:36:28.20#ibcon#read 3, iclass 27, count 0 2006.229.10:36:28.20#ibcon#about to read 4, iclass 27, count 0 2006.229.10:36:28.20#ibcon#read 4, iclass 27, count 0 2006.229.10:36:28.20#ibcon#about to read 5, iclass 27, count 0 2006.229.10:36:28.20#ibcon#read 5, iclass 27, count 0 2006.229.10:36:28.20#ibcon#about to read 6, iclass 27, count 0 2006.229.10:36:28.20#ibcon#read 6, iclass 27, count 0 2006.229.10:36:28.20#ibcon#end of sib2, iclass 27, count 0 2006.229.10:36:28.20#ibcon#*after write, iclass 27, count 0 2006.229.10:36:28.20#ibcon#*before return 0, iclass 27, count 0 2006.229.10:36:28.20#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:28.20#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:28.20#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:36:28.20#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:36:28.20$vck44/valo=4,624.99 2006.229.10:36:28.20#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.10:36:28.20#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.10:36:28.20#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:28.20#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:28.20#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:28.20#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:28.20#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:36:28.20#ibcon#first serial, iclass 29, count 0 2006.229.10:36:28.20#ibcon#enter sib2, iclass 29, count 0 2006.229.10:36:28.20#ibcon#flushed, iclass 29, count 0 2006.229.10:36:28.20#ibcon#about to write, iclass 29, count 0 2006.229.10:36:28.20#ibcon#wrote, iclass 29, count 0 2006.229.10:36:28.20#ibcon#about to read 3, iclass 29, count 0 2006.229.10:36:28.22#ibcon#read 3, iclass 29, count 0 2006.229.10:36:28.22#ibcon#about to read 4, iclass 29, count 0 2006.229.10:36:28.22#ibcon#read 4, iclass 29, count 0 2006.229.10:36:28.22#ibcon#about to read 5, iclass 29, count 0 2006.229.10:36:28.22#ibcon#read 5, iclass 29, count 0 2006.229.10:36:28.22#ibcon#about to read 6, iclass 29, count 0 2006.229.10:36:28.22#ibcon#read 6, iclass 29, count 0 2006.229.10:36:28.22#ibcon#end of sib2, iclass 29, count 0 2006.229.10:36:28.22#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:36:28.22#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:36:28.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:36:28.22#ibcon#*before write, iclass 29, count 0 2006.229.10:36:28.22#ibcon#enter sib2, iclass 29, count 0 2006.229.10:36:28.22#ibcon#flushed, iclass 29, count 0 2006.229.10:36:28.22#ibcon#about to write, iclass 29, count 0 2006.229.10:36:28.22#ibcon#wrote, iclass 29, count 0 2006.229.10:36:28.22#ibcon#about to read 3, iclass 29, count 0 2006.229.10:36:28.26#ibcon#read 3, iclass 29, count 0 2006.229.10:36:28.26#ibcon#about to read 4, iclass 29, count 0 2006.229.10:36:28.26#ibcon#read 4, iclass 29, count 0 2006.229.10:36:28.26#ibcon#about to read 5, iclass 29, count 0 2006.229.10:36:28.26#ibcon#read 5, iclass 29, count 0 2006.229.10:36:28.26#ibcon#about to read 6, iclass 29, count 0 2006.229.10:36:28.26#ibcon#read 6, iclass 29, count 0 2006.229.10:36:28.26#ibcon#end of sib2, iclass 29, count 0 2006.229.10:36:28.26#ibcon#*after write, iclass 29, count 0 2006.229.10:36:28.26#ibcon#*before return 0, iclass 29, count 0 2006.229.10:36:28.26#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:28.26#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:28.26#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:36:28.26#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:36:28.26$vck44/va=4,7 2006.229.10:36:28.26#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.10:36:28.26#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.10:36:28.26#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:28.26#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:28.32#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:28.32#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:28.32#ibcon#enter wrdev, iclass 31, count 2 2006.229.10:36:28.32#ibcon#first serial, iclass 31, count 2 2006.229.10:36:28.32#ibcon#enter sib2, iclass 31, count 2 2006.229.10:36:28.32#ibcon#flushed, iclass 31, count 2 2006.229.10:36:28.32#ibcon#about to write, iclass 31, count 2 2006.229.10:36:28.32#ibcon#wrote, iclass 31, count 2 2006.229.10:36:28.32#ibcon#about to read 3, iclass 31, count 2 2006.229.10:36:28.34#ibcon#read 3, iclass 31, count 2 2006.229.10:36:28.34#ibcon#about to read 4, iclass 31, count 2 2006.229.10:36:28.34#ibcon#read 4, iclass 31, count 2 2006.229.10:36:28.34#ibcon#about to read 5, iclass 31, count 2 2006.229.10:36:28.34#ibcon#read 5, iclass 31, count 2 2006.229.10:36:28.34#ibcon#about to read 6, iclass 31, count 2 2006.229.10:36:28.34#ibcon#read 6, iclass 31, count 2 2006.229.10:36:28.34#ibcon#end of sib2, iclass 31, count 2 2006.229.10:36:28.34#ibcon#*mode == 0, iclass 31, count 2 2006.229.10:36:28.34#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.10:36:28.34#ibcon#[25=AT04-07\r\n] 2006.229.10:36:28.34#ibcon#*before write, iclass 31, count 2 2006.229.10:36:28.34#ibcon#enter sib2, iclass 31, count 2 2006.229.10:36:28.34#ibcon#flushed, iclass 31, count 2 2006.229.10:36:28.34#ibcon#about to write, iclass 31, count 2 2006.229.10:36:28.34#ibcon#wrote, iclass 31, count 2 2006.229.10:36:28.34#ibcon#about to read 3, iclass 31, count 2 2006.229.10:36:28.37#ibcon#read 3, iclass 31, count 2 2006.229.10:36:28.37#ibcon#about to read 4, iclass 31, count 2 2006.229.10:36:28.37#ibcon#read 4, iclass 31, count 2 2006.229.10:36:28.37#ibcon#about to read 5, iclass 31, count 2 2006.229.10:36:28.37#ibcon#read 5, iclass 31, count 2 2006.229.10:36:28.37#ibcon#about to read 6, iclass 31, count 2 2006.229.10:36:28.37#ibcon#read 6, iclass 31, count 2 2006.229.10:36:28.37#ibcon#end of sib2, iclass 31, count 2 2006.229.10:36:28.37#ibcon#*after write, iclass 31, count 2 2006.229.10:36:28.37#ibcon#*before return 0, iclass 31, count 2 2006.229.10:36:28.37#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:28.37#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:28.37#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.10:36:28.37#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:28.37#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:28.49#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:28.49#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:28.49#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:36:28.49#ibcon#first serial, iclass 31, count 0 2006.229.10:36:28.49#ibcon#enter sib2, iclass 31, count 0 2006.229.10:36:28.49#ibcon#flushed, iclass 31, count 0 2006.229.10:36:28.49#ibcon#about to write, iclass 31, count 0 2006.229.10:36:28.49#ibcon#wrote, iclass 31, count 0 2006.229.10:36:28.49#ibcon#about to read 3, iclass 31, count 0 2006.229.10:36:28.51#ibcon#read 3, iclass 31, count 0 2006.229.10:36:28.51#ibcon#about to read 4, iclass 31, count 0 2006.229.10:36:28.51#ibcon#read 4, iclass 31, count 0 2006.229.10:36:28.51#ibcon#about to read 5, iclass 31, count 0 2006.229.10:36:28.51#ibcon#read 5, iclass 31, count 0 2006.229.10:36:28.51#ibcon#about to read 6, iclass 31, count 0 2006.229.10:36:28.51#ibcon#read 6, iclass 31, count 0 2006.229.10:36:28.51#ibcon#end of sib2, iclass 31, count 0 2006.229.10:36:28.51#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:36:28.51#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:36:28.51#ibcon#[25=USB\r\n] 2006.229.10:36:28.51#ibcon#*before write, iclass 31, count 0 2006.229.10:36:28.51#ibcon#enter sib2, iclass 31, count 0 2006.229.10:36:28.51#ibcon#flushed, iclass 31, count 0 2006.229.10:36:28.51#ibcon#about to write, iclass 31, count 0 2006.229.10:36:28.51#ibcon#wrote, iclass 31, count 0 2006.229.10:36:28.51#ibcon#about to read 3, iclass 31, count 0 2006.229.10:36:28.54#ibcon#read 3, iclass 31, count 0 2006.229.10:36:28.54#ibcon#about to read 4, iclass 31, count 0 2006.229.10:36:28.54#ibcon#read 4, iclass 31, count 0 2006.229.10:36:28.54#ibcon#about to read 5, iclass 31, count 0 2006.229.10:36:28.54#ibcon#read 5, iclass 31, count 0 2006.229.10:36:28.54#ibcon#about to read 6, iclass 31, count 0 2006.229.10:36:28.54#ibcon#read 6, iclass 31, count 0 2006.229.10:36:28.54#ibcon#end of sib2, iclass 31, count 0 2006.229.10:36:28.54#ibcon#*after write, iclass 31, count 0 2006.229.10:36:28.54#ibcon#*before return 0, iclass 31, count 0 2006.229.10:36:28.54#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:28.54#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:28.54#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:36:28.54#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:36:28.54$vck44/valo=5,734.99 2006.229.10:36:28.54#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.10:36:28.54#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.10:36:28.54#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:28.54#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:28.54#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:28.54#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:28.54#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:36:28.54#ibcon#first serial, iclass 33, count 0 2006.229.10:36:28.54#ibcon#enter sib2, iclass 33, count 0 2006.229.10:36:28.54#ibcon#flushed, iclass 33, count 0 2006.229.10:36:28.54#ibcon#about to write, iclass 33, count 0 2006.229.10:36:28.54#ibcon#wrote, iclass 33, count 0 2006.229.10:36:28.54#ibcon#about to read 3, iclass 33, count 0 2006.229.10:36:28.56#ibcon#read 3, iclass 33, count 0 2006.229.10:36:28.56#ibcon#about to read 4, iclass 33, count 0 2006.229.10:36:28.56#ibcon#read 4, iclass 33, count 0 2006.229.10:36:28.56#ibcon#about to read 5, iclass 33, count 0 2006.229.10:36:28.56#ibcon#read 5, iclass 33, count 0 2006.229.10:36:28.56#ibcon#about to read 6, iclass 33, count 0 2006.229.10:36:28.56#ibcon#read 6, iclass 33, count 0 2006.229.10:36:28.56#ibcon#end of sib2, iclass 33, count 0 2006.229.10:36:28.56#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:36:28.56#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:36:28.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:36:28.56#ibcon#*before write, iclass 33, count 0 2006.229.10:36:28.56#ibcon#enter sib2, iclass 33, count 0 2006.229.10:36:28.56#ibcon#flushed, iclass 33, count 0 2006.229.10:36:28.56#ibcon#about to write, iclass 33, count 0 2006.229.10:36:28.56#ibcon#wrote, iclass 33, count 0 2006.229.10:36:28.56#ibcon#about to read 3, iclass 33, count 0 2006.229.10:36:28.60#ibcon#read 3, iclass 33, count 0 2006.229.10:36:28.60#ibcon#about to read 4, iclass 33, count 0 2006.229.10:36:28.60#ibcon#read 4, iclass 33, count 0 2006.229.10:36:28.60#ibcon#about to read 5, iclass 33, count 0 2006.229.10:36:28.60#ibcon#read 5, iclass 33, count 0 2006.229.10:36:28.60#ibcon#about to read 6, iclass 33, count 0 2006.229.10:36:28.60#ibcon#read 6, iclass 33, count 0 2006.229.10:36:28.60#ibcon#end of sib2, iclass 33, count 0 2006.229.10:36:28.60#ibcon#*after write, iclass 33, count 0 2006.229.10:36:28.60#ibcon#*before return 0, iclass 33, count 0 2006.229.10:36:28.60#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:28.60#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:28.60#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:36:28.60#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:36:28.60$vck44/va=5,4 2006.229.10:36:28.60#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.10:36:28.60#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.10:36:28.60#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:28.60#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:28.66#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:28.66#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:28.66#ibcon#enter wrdev, iclass 35, count 2 2006.229.10:36:28.66#ibcon#first serial, iclass 35, count 2 2006.229.10:36:28.66#ibcon#enter sib2, iclass 35, count 2 2006.229.10:36:28.66#ibcon#flushed, iclass 35, count 2 2006.229.10:36:28.66#ibcon#about to write, iclass 35, count 2 2006.229.10:36:28.66#ibcon#wrote, iclass 35, count 2 2006.229.10:36:28.66#ibcon#about to read 3, iclass 35, count 2 2006.229.10:36:28.68#ibcon#read 3, iclass 35, count 2 2006.229.10:36:28.68#ibcon#about to read 4, iclass 35, count 2 2006.229.10:36:28.68#ibcon#read 4, iclass 35, count 2 2006.229.10:36:28.68#ibcon#about to read 5, iclass 35, count 2 2006.229.10:36:28.68#ibcon#read 5, iclass 35, count 2 2006.229.10:36:28.68#ibcon#about to read 6, iclass 35, count 2 2006.229.10:36:28.68#ibcon#read 6, iclass 35, count 2 2006.229.10:36:28.68#ibcon#end of sib2, iclass 35, count 2 2006.229.10:36:28.68#ibcon#*mode == 0, iclass 35, count 2 2006.229.10:36:28.68#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.10:36:28.68#ibcon#[25=AT05-04\r\n] 2006.229.10:36:28.68#ibcon#*before write, iclass 35, count 2 2006.229.10:36:28.68#ibcon#enter sib2, iclass 35, count 2 2006.229.10:36:28.68#ibcon#flushed, iclass 35, count 2 2006.229.10:36:28.68#ibcon#about to write, iclass 35, count 2 2006.229.10:36:28.68#ibcon#wrote, iclass 35, count 2 2006.229.10:36:28.68#ibcon#about to read 3, iclass 35, count 2 2006.229.10:36:28.71#ibcon#read 3, iclass 35, count 2 2006.229.10:36:28.71#ibcon#about to read 4, iclass 35, count 2 2006.229.10:36:28.71#ibcon#read 4, iclass 35, count 2 2006.229.10:36:28.71#ibcon#about to read 5, iclass 35, count 2 2006.229.10:36:28.71#ibcon#read 5, iclass 35, count 2 2006.229.10:36:28.71#ibcon#about to read 6, iclass 35, count 2 2006.229.10:36:28.71#ibcon#read 6, iclass 35, count 2 2006.229.10:36:28.71#ibcon#end of sib2, iclass 35, count 2 2006.229.10:36:28.71#ibcon#*after write, iclass 35, count 2 2006.229.10:36:28.71#ibcon#*before return 0, iclass 35, count 2 2006.229.10:36:28.71#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:28.71#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:28.71#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.10:36:28.71#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:28.71#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:28.83#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:28.83#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:28.83#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:36:28.83#ibcon#first serial, iclass 35, count 0 2006.229.10:36:28.83#ibcon#enter sib2, iclass 35, count 0 2006.229.10:36:28.83#ibcon#flushed, iclass 35, count 0 2006.229.10:36:28.83#ibcon#about to write, iclass 35, count 0 2006.229.10:36:28.83#ibcon#wrote, iclass 35, count 0 2006.229.10:36:28.83#ibcon#about to read 3, iclass 35, count 0 2006.229.10:36:28.85#ibcon#read 3, iclass 35, count 0 2006.229.10:36:28.85#ibcon#about to read 4, iclass 35, count 0 2006.229.10:36:28.85#ibcon#read 4, iclass 35, count 0 2006.229.10:36:28.85#ibcon#about to read 5, iclass 35, count 0 2006.229.10:36:28.85#ibcon#read 5, iclass 35, count 0 2006.229.10:36:28.85#ibcon#about to read 6, iclass 35, count 0 2006.229.10:36:28.85#ibcon#read 6, iclass 35, count 0 2006.229.10:36:28.85#ibcon#end of sib2, iclass 35, count 0 2006.229.10:36:28.85#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:36:28.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:36:28.85#ibcon#[25=USB\r\n] 2006.229.10:36:28.85#ibcon#*before write, iclass 35, count 0 2006.229.10:36:28.85#ibcon#enter sib2, iclass 35, count 0 2006.229.10:36:28.85#ibcon#flushed, iclass 35, count 0 2006.229.10:36:28.85#ibcon#about to write, iclass 35, count 0 2006.229.10:36:28.85#ibcon#wrote, iclass 35, count 0 2006.229.10:36:28.85#ibcon#about to read 3, iclass 35, count 0 2006.229.10:36:28.88#ibcon#read 3, iclass 35, count 0 2006.229.10:36:28.88#ibcon#about to read 4, iclass 35, count 0 2006.229.10:36:28.88#ibcon#read 4, iclass 35, count 0 2006.229.10:36:28.88#ibcon#about to read 5, iclass 35, count 0 2006.229.10:36:28.88#ibcon#read 5, iclass 35, count 0 2006.229.10:36:28.88#ibcon#about to read 6, iclass 35, count 0 2006.229.10:36:28.88#ibcon#read 6, iclass 35, count 0 2006.229.10:36:28.88#ibcon#end of sib2, iclass 35, count 0 2006.229.10:36:28.88#ibcon#*after write, iclass 35, count 0 2006.229.10:36:28.88#ibcon#*before return 0, iclass 35, count 0 2006.229.10:36:28.88#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:28.88#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:28.88#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:36:28.88#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:36:28.88$vck44/valo=6,814.99 2006.229.10:36:28.88#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.10:36:28.88#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.10:36:28.88#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:28.88#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:28.88#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:28.88#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:28.88#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:36:28.88#ibcon#first serial, iclass 37, count 0 2006.229.10:36:28.88#ibcon#enter sib2, iclass 37, count 0 2006.229.10:36:28.88#ibcon#flushed, iclass 37, count 0 2006.229.10:36:28.88#ibcon#about to write, iclass 37, count 0 2006.229.10:36:28.88#ibcon#wrote, iclass 37, count 0 2006.229.10:36:28.88#ibcon#about to read 3, iclass 37, count 0 2006.229.10:36:28.90#ibcon#read 3, iclass 37, count 0 2006.229.10:36:28.90#ibcon#about to read 4, iclass 37, count 0 2006.229.10:36:28.90#ibcon#read 4, iclass 37, count 0 2006.229.10:36:28.90#ibcon#about to read 5, iclass 37, count 0 2006.229.10:36:28.90#ibcon#read 5, iclass 37, count 0 2006.229.10:36:28.90#ibcon#about to read 6, iclass 37, count 0 2006.229.10:36:28.90#ibcon#read 6, iclass 37, count 0 2006.229.10:36:28.90#ibcon#end of sib2, iclass 37, count 0 2006.229.10:36:28.90#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:36:28.90#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:36:28.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:36:28.90#ibcon#*before write, iclass 37, count 0 2006.229.10:36:28.90#ibcon#enter sib2, iclass 37, count 0 2006.229.10:36:28.90#ibcon#flushed, iclass 37, count 0 2006.229.10:36:28.90#ibcon#about to write, iclass 37, count 0 2006.229.10:36:28.90#ibcon#wrote, iclass 37, count 0 2006.229.10:36:28.90#ibcon#about to read 3, iclass 37, count 0 2006.229.10:36:28.94#ibcon#read 3, iclass 37, count 0 2006.229.10:36:28.94#ibcon#about to read 4, iclass 37, count 0 2006.229.10:36:28.94#ibcon#read 4, iclass 37, count 0 2006.229.10:36:28.94#ibcon#about to read 5, iclass 37, count 0 2006.229.10:36:28.94#ibcon#read 5, iclass 37, count 0 2006.229.10:36:28.94#ibcon#about to read 6, iclass 37, count 0 2006.229.10:36:28.94#ibcon#read 6, iclass 37, count 0 2006.229.10:36:28.94#ibcon#end of sib2, iclass 37, count 0 2006.229.10:36:28.94#ibcon#*after write, iclass 37, count 0 2006.229.10:36:28.94#ibcon#*before return 0, iclass 37, count 0 2006.229.10:36:28.94#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:28.94#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:28.94#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:36:28.94#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:36:28.94$vck44/va=6,4 2006.229.10:36:28.94#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.10:36:28.94#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.10:36:28.94#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:28.94#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:29.00#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:29.00#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:29.00#ibcon#enter wrdev, iclass 39, count 2 2006.229.10:36:29.00#ibcon#first serial, iclass 39, count 2 2006.229.10:36:29.00#ibcon#enter sib2, iclass 39, count 2 2006.229.10:36:29.00#ibcon#flushed, iclass 39, count 2 2006.229.10:36:29.00#ibcon#about to write, iclass 39, count 2 2006.229.10:36:29.00#ibcon#wrote, iclass 39, count 2 2006.229.10:36:29.00#ibcon#about to read 3, iclass 39, count 2 2006.229.10:36:29.02#ibcon#read 3, iclass 39, count 2 2006.229.10:36:29.02#ibcon#about to read 4, iclass 39, count 2 2006.229.10:36:29.02#ibcon#read 4, iclass 39, count 2 2006.229.10:36:29.02#ibcon#about to read 5, iclass 39, count 2 2006.229.10:36:29.02#ibcon#read 5, iclass 39, count 2 2006.229.10:36:29.02#ibcon#about to read 6, iclass 39, count 2 2006.229.10:36:29.02#ibcon#read 6, iclass 39, count 2 2006.229.10:36:29.02#ibcon#end of sib2, iclass 39, count 2 2006.229.10:36:29.02#ibcon#*mode == 0, iclass 39, count 2 2006.229.10:36:29.02#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.10:36:29.02#ibcon#[25=AT06-04\r\n] 2006.229.10:36:29.02#ibcon#*before write, iclass 39, count 2 2006.229.10:36:29.02#ibcon#enter sib2, iclass 39, count 2 2006.229.10:36:29.02#ibcon#flushed, iclass 39, count 2 2006.229.10:36:29.02#ibcon#about to write, iclass 39, count 2 2006.229.10:36:29.02#ibcon#wrote, iclass 39, count 2 2006.229.10:36:29.02#ibcon#about to read 3, iclass 39, count 2 2006.229.10:36:29.05#ibcon#read 3, iclass 39, count 2 2006.229.10:36:29.05#ibcon#about to read 4, iclass 39, count 2 2006.229.10:36:29.05#ibcon#read 4, iclass 39, count 2 2006.229.10:36:29.05#ibcon#about to read 5, iclass 39, count 2 2006.229.10:36:29.05#ibcon#read 5, iclass 39, count 2 2006.229.10:36:29.05#ibcon#about to read 6, iclass 39, count 2 2006.229.10:36:29.05#ibcon#read 6, iclass 39, count 2 2006.229.10:36:29.05#ibcon#end of sib2, iclass 39, count 2 2006.229.10:36:29.05#ibcon#*after write, iclass 39, count 2 2006.229.10:36:29.05#ibcon#*before return 0, iclass 39, count 2 2006.229.10:36:29.05#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:29.05#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:29.05#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.10:36:29.05#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:29.05#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:29.17#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:29.17#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:29.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:36:29.17#ibcon#first serial, iclass 39, count 0 2006.229.10:36:29.17#ibcon#enter sib2, iclass 39, count 0 2006.229.10:36:29.17#ibcon#flushed, iclass 39, count 0 2006.229.10:36:29.17#ibcon#about to write, iclass 39, count 0 2006.229.10:36:29.17#ibcon#wrote, iclass 39, count 0 2006.229.10:36:29.17#ibcon#about to read 3, iclass 39, count 0 2006.229.10:36:29.19#ibcon#read 3, iclass 39, count 0 2006.229.10:36:29.19#ibcon#about to read 4, iclass 39, count 0 2006.229.10:36:29.19#ibcon#read 4, iclass 39, count 0 2006.229.10:36:29.19#ibcon#about to read 5, iclass 39, count 0 2006.229.10:36:29.19#ibcon#read 5, iclass 39, count 0 2006.229.10:36:29.19#ibcon#about to read 6, iclass 39, count 0 2006.229.10:36:29.19#ibcon#read 6, iclass 39, count 0 2006.229.10:36:29.19#ibcon#end of sib2, iclass 39, count 0 2006.229.10:36:29.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:36:29.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:36:29.19#ibcon#[25=USB\r\n] 2006.229.10:36:29.19#ibcon#*before write, iclass 39, count 0 2006.229.10:36:29.19#ibcon#enter sib2, iclass 39, count 0 2006.229.10:36:29.19#ibcon#flushed, iclass 39, count 0 2006.229.10:36:29.19#ibcon#about to write, iclass 39, count 0 2006.229.10:36:29.19#ibcon#wrote, iclass 39, count 0 2006.229.10:36:29.19#ibcon#about to read 3, iclass 39, count 0 2006.229.10:36:29.22#ibcon#read 3, iclass 39, count 0 2006.229.10:36:29.22#ibcon#about to read 4, iclass 39, count 0 2006.229.10:36:29.22#ibcon#read 4, iclass 39, count 0 2006.229.10:36:29.22#ibcon#about to read 5, iclass 39, count 0 2006.229.10:36:29.22#ibcon#read 5, iclass 39, count 0 2006.229.10:36:29.22#ibcon#about to read 6, iclass 39, count 0 2006.229.10:36:29.22#ibcon#read 6, iclass 39, count 0 2006.229.10:36:29.22#ibcon#end of sib2, iclass 39, count 0 2006.229.10:36:29.22#ibcon#*after write, iclass 39, count 0 2006.229.10:36:29.22#ibcon#*before return 0, iclass 39, count 0 2006.229.10:36:29.22#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:29.22#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:29.22#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:36:29.22#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:36:29.22$vck44/valo=7,864.99 2006.229.10:36:29.22#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.10:36:29.22#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.10:36:29.22#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:29.22#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:29.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:29.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:29.22#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:36:29.22#ibcon#first serial, iclass 3, count 0 2006.229.10:36:29.22#ibcon#enter sib2, iclass 3, count 0 2006.229.10:36:29.22#ibcon#flushed, iclass 3, count 0 2006.229.10:36:29.22#ibcon#about to write, iclass 3, count 0 2006.229.10:36:29.22#ibcon#wrote, iclass 3, count 0 2006.229.10:36:29.22#ibcon#about to read 3, iclass 3, count 0 2006.229.10:36:29.24#ibcon#read 3, iclass 3, count 0 2006.229.10:36:29.24#ibcon#about to read 4, iclass 3, count 0 2006.229.10:36:29.24#ibcon#read 4, iclass 3, count 0 2006.229.10:36:29.24#ibcon#about to read 5, iclass 3, count 0 2006.229.10:36:29.24#ibcon#read 5, iclass 3, count 0 2006.229.10:36:29.24#ibcon#about to read 6, iclass 3, count 0 2006.229.10:36:29.24#ibcon#read 6, iclass 3, count 0 2006.229.10:36:29.24#ibcon#end of sib2, iclass 3, count 0 2006.229.10:36:29.24#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:36:29.24#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:36:29.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:36:29.24#ibcon#*before write, iclass 3, count 0 2006.229.10:36:29.24#ibcon#enter sib2, iclass 3, count 0 2006.229.10:36:29.24#ibcon#flushed, iclass 3, count 0 2006.229.10:36:29.24#ibcon#about to write, iclass 3, count 0 2006.229.10:36:29.24#ibcon#wrote, iclass 3, count 0 2006.229.10:36:29.24#ibcon#about to read 3, iclass 3, count 0 2006.229.10:36:29.28#ibcon#read 3, iclass 3, count 0 2006.229.10:36:29.28#ibcon#about to read 4, iclass 3, count 0 2006.229.10:36:29.28#ibcon#read 4, iclass 3, count 0 2006.229.10:36:29.28#ibcon#about to read 5, iclass 3, count 0 2006.229.10:36:29.28#ibcon#read 5, iclass 3, count 0 2006.229.10:36:29.28#ibcon#about to read 6, iclass 3, count 0 2006.229.10:36:29.28#ibcon#read 6, iclass 3, count 0 2006.229.10:36:29.28#ibcon#end of sib2, iclass 3, count 0 2006.229.10:36:29.28#ibcon#*after write, iclass 3, count 0 2006.229.10:36:29.28#ibcon#*before return 0, iclass 3, count 0 2006.229.10:36:29.28#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:29.28#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:29.28#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:36:29.28#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:36:29.28$vck44/va=7,5 2006.229.10:36:29.28#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.10:36:29.28#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.10:36:29.28#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:29.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:29.34#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:29.34#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:29.34#ibcon#enter wrdev, iclass 5, count 2 2006.229.10:36:29.34#ibcon#first serial, iclass 5, count 2 2006.229.10:36:29.34#ibcon#enter sib2, iclass 5, count 2 2006.229.10:36:29.34#ibcon#flushed, iclass 5, count 2 2006.229.10:36:29.34#ibcon#about to write, iclass 5, count 2 2006.229.10:36:29.34#ibcon#wrote, iclass 5, count 2 2006.229.10:36:29.34#ibcon#about to read 3, iclass 5, count 2 2006.229.10:36:29.36#ibcon#read 3, iclass 5, count 2 2006.229.10:36:29.36#ibcon#about to read 4, iclass 5, count 2 2006.229.10:36:29.36#ibcon#read 4, iclass 5, count 2 2006.229.10:36:29.36#ibcon#about to read 5, iclass 5, count 2 2006.229.10:36:29.36#ibcon#read 5, iclass 5, count 2 2006.229.10:36:29.36#ibcon#about to read 6, iclass 5, count 2 2006.229.10:36:29.36#ibcon#read 6, iclass 5, count 2 2006.229.10:36:29.36#ibcon#end of sib2, iclass 5, count 2 2006.229.10:36:29.36#ibcon#*mode == 0, iclass 5, count 2 2006.229.10:36:29.36#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.10:36:29.36#ibcon#[25=AT07-05\r\n] 2006.229.10:36:29.36#ibcon#*before write, iclass 5, count 2 2006.229.10:36:29.36#ibcon#enter sib2, iclass 5, count 2 2006.229.10:36:29.36#ibcon#flushed, iclass 5, count 2 2006.229.10:36:29.36#ibcon#about to write, iclass 5, count 2 2006.229.10:36:29.36#ibcon#wrote, iclass 5, count 2 2006.229.10:36:29.36#ibcon#about to read 3, iclass 5, count 2 2006.229.10:36:29.39#ibcon#read 3, iclass 5, count 2 2006.229.10:36:29.39#ibcon#about to read 4, iclass 5, count 2 2006.229.10:36:29.39#ibcon#read 4, iclass 5, count 2 2006.229.10:36:29.39#ibcon#about to read 5, iclass 5, count 2 2006.229.10:36:29.39#ibcon#read 5, iclass 5, count 2 2006.229.10:36:29.39#ibcon#about to read 6, iclass 5, count 2 2006.229.10:36:29.39#ibcon#read 6, iclass 5, count 2 2006.229.10:36:29.39#ibcon#end of sib2, iclass 5, count 2 2006.229.10:36:29.39#ibcon#*after write, iclass 5, count 2 2006.229.10:36:29.39#ibcon#*before return 0, iclass 5, count 2 2006.229.10:36:29.39#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:29.39#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:29.39#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.10:36:29.39#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:29.39#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:29.51#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:29.51#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:29.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:36:29.51#ibcon#first serial, iclass 5, count 0 2006.229.10:36:29.51#ibcon#enter sib2, iclass 5, count 0 2006.229.10:36:29.51#ibcon#flushed, iclass 5, count 0 2006.229.10:36:29.51#ibcon#about to write, iclass 5, count 0 2006.229.10:36:29.51#ibcon#wrote, iclass 5, count 0 2006.229.10:36:29.51#ibcon#about to read 3, iclass 5, count 0 2006.229.10:36:29.53#ibcon#read 3, iclass 5, count 0 2006.229.10:36:29.53#ibcon#about to read 4, iclass 5, count 0 2006.229.10:36:29.53#ibcon#read 4, iclass 5, count 0 2006.229.10:36:29.53#ibcon#about to read 5, iclass 5, count 0 2006.229.10:36:29.53#ibcon#read 5, iclass 5, count 0 2006.229.10:36:29.53#ibcon#about to read 6, iclass 5, count 0 2006.229.10:36:29.53#ibcon#read 6, iclass 5, count 0 2006.229.10:36:29.53#ibcon#end of sib2, iclass 5, count 0 2006.229.10:36:29.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:36:29.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:36:29.53#ibcon#[25=USB\r\n] 2006.229.10:36:29.53#ibcon#*before write, iclass 5, count 0 2006.229.10:36:29.53#ibcon#enter sib2, iclass 5, count 0 2006.229.10:36:29.53#ibcon#flushed, iclass 5, count 0 2006.229.10:36:29.53#ibcon#about to write, iclass 5, count 0 2006.229.10:36:29.53#ibcon#wrote, iclass 5, count 0 2006.229.10:36:29.53#ibcon#about to read 3, iclass 5, count 0 2006.229.10:36:29.56#ibcon#read 3, iclass 5, count 0 2006.229.10:36:29.56#ibcon#about to read 4, iclass 5, count 0 2006.229.10:36:29.56#ibcon#read 4, iclass 5, count 0 2006.229.10:36:29.56#ibcon#about to read 5, iclass 5, count 0 2006.229.10:36:29.56#ibcon#read 5, iclass 5, count 0 2006.229.10:36:29.56#ibcon#about to read 6, iclass 5, count 0 2006.229.10:36:29.56#ibcon#read 6, iclass 5, count 0 2006.229.10:36:29.56#ibcon#end of sib2, iclass 5, count 0 2006.229.10:36:29.56#ibcon#*after write, iclass 5, count 0 2006.229.10:36:29.56#ibcon#*before return 0, iclass 5, count 0 2006.229.10:36:29.56#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:29.56#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:29.56#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:36:29.56#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:36:29.56$vck44/valo=8,884.99 2006.229.10:36:29.56#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.10:36:29.56#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.10:36:29.56#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:29.56#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:29.56#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:29.56#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:29.56#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:36:29.56#ibcon#first serial, iclass 7, count 0 2006.229.10:36:29.56#ibcon#enter sib2, iclass 7, count 0 2006.229.10:36:29.56#ibcon#flushed, iclass 7, count 0 2006.229.10:36:29.56#ibcon#about to write, iclass 7, count 0 2006.229.10:36:29.56#ibcon#wrote, iclass 7, count 0 2006.229.10:36:29.56#ibcon#about to read 3, iclass 7, count 0 2006.229.10:36:29.58#ibcon#read 3, iclass 7, count 0 2006.229.10:36:29.58#ibcon#about to read 4, iclass 7, count 0 2006.229.10:36:29.58#ibcon#read 4, iclass 7, count 0 2006.229.10:36:29.58#ibcon#about to read 5, iclass 7, count 0 2006.229.10:36:29.58#ibcon#read 5, iclass 7, count 0 2006.229.10:36:29.58#ibcon#about to read 6, iclass 7, count 0 2006.229.10:36:29.58#ibcon#read 6, iclass 7, count 0 2006.229.10:36:29.58#ibcon#end of sib2, iclass 7, count 0 2006.229.10:36:29.58#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:36:29.58#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:36:29.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:36:29.58#ibcon#*before write, iclass 7, count 0 2006.229.10:36:29.58#ibcon#enter sib2, iclass 7, count 0 2006.229.10:36:29.58#ibcon#flushed, iclass 7, count 0 2006.229.10:36:29.58#ibcon#about to write, iclass 7, count 0 2006.229.10:36:29.58#ibcon#wrote, iclass 7, count 0 2006.229.10:36:29.58#ibcon#about to read 3, iclass 7, count 0 2006.229.10:36:29.62#ibcon#read 3, iclass 7, count 0 2006.229.10:36:29.62#ibcon#about to read 4, iclass 7, count 0 2006.229.10:36:29.62#ibcon#read 4, iclass 7, count 0 2006.229.10:36:29.62#ibcon#about to read 5, iclass 7, count 0 2006.229.10:36:29.62#ibcon#read 5, iclass 7, count 0 2006.229.10:36:29.62#ibcon#about to read 6, iclass 7, count 0 2006.229.10:36:29.62#ibcon#read 6, iclass 7, count 0 2006.229.10:36:29.62#ibcon#end of sib2, iclass 7, count 0 2006.229.10:36:29.62#ibcon#*after write, iclass 7, count 0 2006.229.10:36:29.62#ibcon#*before return 0, iclass 7, count 0 2006.229.10:36:29.62#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:29.62#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:29.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:36:29.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:36:29.62$vck44/va=8,6 2006.229.10:36:29.62#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.10:36:29.62#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.10:36:29.62#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:29.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:29.68#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:29.68#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:29.68#ibcon#enter wrdev, iclass 11, count 2 2006.229.10:36:29.68#ibcon#first serial, iclass 11, count 2 2006.229.10:36:29.68#ibcon#enter sib2, iclass 11, count 2 2006.229.10:36:29.68#ibcon#flushed, iclass 11, count 2 2006.229.10:36:29.68#ibcon#about to write, iclass 11, count 2 2006.229.10:36:29.68#ibcon#wrote, iclass 11, count 2 2006.229.10:36:29.68#ibcon#about to read 3, iclass 11, count 2 2006.229.10:36:29.70#ibcon#read 3, iclass 11, count 2 2006.229.10:36:29.70#ibcon#about to read 4, iclass 11, count 2 2006.229.10:36:29.70#ibcon#read 4, iclass 11, count 2 2006.229.10:36:29.70#ibcon#about to read 5, iclass 11, count 2 2006.229.10:36:29.70#ibcon#read 5, iclass 11, count 2 2006.229.10:36:29.70#ibcon#about to read 6, iclass 11, count 2 2006.229.10:36:29.70#ibcon#read 6, iclass 11, count 2 2006.229.10:36:29.70#ibcon#end of sib2, iclass 11, count 2 2006.229.10:36:29.70#ibcon#*mode == 0, iclass 11, count 2 2006.229.10:36:29.70#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.10:36:29.70#ibcon#[25=AT08-06\r\n] 2006.229.10:36:29.70#ibcon#*before write, iclass 11, count 2 2006.229.10:36:29.70#ibcon#enter sib2, iclass 11, count 2 2006.229.10:36:29.70#ibcon#flushed, iclass 11, count 2 2006.229.10:36:29.70#ibcon#about to write, iclass 11, count 2 2006.229.10:36:29.70#ibcon#wrote, iclass 11, count 2 2006.229.10:36:29.70#ibcon#about to read 3, iclass 11, count 2 2006.229.10:36:29.73#ibcon#read 3, iclass 11, count 2 2006.229.10:36:29.73#ibcon#about to read 4, iclass 11, count 2 2006.229.10:36:29.73#ibcon#read 4, iclass 11, count 2 2006.229.10:36:29.73#ibcon#about to read 5, iclass 11, count 2 2006.229.10:36:29.73#ibcon#read 5, iclass 11, count 2 2006.229.10:36:29.73#ibcon#about to read 6, iclass 11, count 2 2006.229.10:36:29.73#ibcon#read 6, iclass 11, count 2 2006.229.10:36:29.73#ibcon#end of sib2, iclass 11, count 2 2006.229.10:36:29.73#ibcon#*after write, iclass 11, count 2 2006.229.10:36:29.73#ibcon#*before return 0, iclass 11, count 2 2006.229.10:36:29.73#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:29.73#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:29.73#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.10:36:29.73#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:29.73#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:29.85#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:29.85#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:29.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:36:29.85#ibcon#first serial, iclass 11, count 0 2006.229.10:36:29.85#ibcon#enter sib2, iclass 11, count 0 2006.229.10:36:29.85#ibcon#flushed, iclass 11, count 0 2006.229.10:36:29.85#ibcon#about to write, iclass 11, count 0 2006.229.10:36:29.85#ibcon#wrote, iclass 11, count 0 2006.229.10:36:29.85#ibcon#about to read 3, iclass 11, count 0 2006.229.10:36:29.87#ibcon#read 3, iclass 11, count 0 2006.229.10:36:29.87#ibcon#about to read 4, iclass 11, count 0 2006.229.10:36:29.87#ibcon#read 4, iclass 11, count 0 2006.229.10:36:29.87#ibcon#about to read 5, iclass 11, count 0 2006.229.10:36:29.87#ibcon#read 5, iclass 11, count 0 2006.229.10:36:29.87#ibcon#about to read 6, iclass 11, count 0 2006.229.10:36:29.87#ibcon#read 6, iclass 11, count 0 2006.229.10:36:29.87#ibcon#end of sib2, iclass 11, count 0 2006.229.10:36:29.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:36:29.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:36:29.87#ibcon#[25=USB\r\n] 2006.229.10:36:29.87#ibcon#*before write, iclass 11, count 0 2006.229.10:36:29.87#ibcon#enter sib2, iclass 11, count 0 2006.229.10:36:29.87#ibcon#flushed, iclass 11, count 0 2006.229.10:36:29.87#ibcon#about to write, iclass 11, count 0 2006.229.10:36:29.87#ibcon#wrote, iclass 11, count 0 2006.229.10:36:29.87#ibcon#about to read 3, iclass 11, count 0 2006.229.10:36:29.90#ibcon#read 3, iclass 11, count 0 2006.229.10:36:29.90#ibcon#about to read 4, iclass 11, count 0 2006.229.10:36:29.90#ibcon#read 4, iclass 11, count 0 2006.229.10:36:29.90#ibcon#about to read 5, iclass 11, count 0 2006.229.10:36:29.90#ibcon#read 5, iclass 11, count 0 2006.229.10:36:29.90#ibcon#about to read 6, iclass 11, count 0 2006.229.10:36:29.90#ibcon#read 6, iclass 11, count 0 2006.229.10:36:29.90#ibcon#end of sib2, iclass 11, count 0 2006.229.10:36:29.90#ibcon#*after write, iclass 11, count 0 2006.229.10:36:29.90#ibcon#*before return 0, iclass 11, count 0 2006.229.10:36:29.90#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:29.90#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:29.90#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:36:29.90#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:36:29.90$vck44/vblo=1,629.99 2006.229.10:36:29.90#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.10:36:29.90#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.10:36:29.90#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:29.90#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:29.90#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:29.90#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:29.90#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:36:29.90#ibcon#first serial, iclass 13, count 0 2006.229.10:36:29.90#ibcon#enter sib2, iclass 13, count 0 2006.229.10:36:29.90#ibcon#flushed, iclass 13, count 0 2006.229.10:36:29.90#ibcon#about to write, iclass 13, count 0 2006.229.10:36:29.90#ibcon#wrote, iclass 13, count 0 2006.229.10:36:29.90#ibcon#about to read 3, iclass 13, count 0 2006.229.10:36:29.92#ibcon#read 3, iclass 13, count 0 2006.229.10:36:29.92#ibcon#about to read 4, iclass 13, count 0 2006.229.10:36:29.92#ibcon#read 4, iclass 13, count 0 2006.229.10:36:29.92#ibcon#about to read 5, iclass 13, count 0 2006.229.10:36:29.92#ibcon#read 5, iclass 13, count 0 2006.229.10:36:29.92#ibcon#about to read 6, iclass 13, count 0 2006.229.10:36:29.92#ibcon#read 6, iclass 13, count 0 2006.229.10:36:29.92#ibcon#end of sib2, iclass 13, count 0 2006.229.10:36:29.92#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:36:29.92#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:36:29.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:36:29.92#ibcon#*before write, iclass 13, count 0 2006.229.10:36:29.92#ibcon#enter sib2, iclass 13, count 0 2006.229.10:36:29.92#ibcon#flushed, iclass 13, count 0 2006.229.10:36:29.92#ibcon#about to write, iclass 13, count 0 2006.229.10:36:29.92#ibcon#wrote, iclass 13, count 0 2006.229.10:36:29.92#ibcon#about to read 3, iclass 13, count 0 2006.229.10:36:29.96#ibcon#read 3, iclass 13, count 0 2006.229.10:36:29.96#ibcon#about to read 4, iclass 13, count 0 2006.229.10:36:29.96#ibcon#read 4, iclass 13, count 0 2006.229.10:36:29.96#ibcon#about to read 5, iclass 13, count 0 2006.229.10:36:29.96#ibcon#read 5, iclass 13, count 0 2006.229.10:36:29.96#ibcon#about to read 6, iclass 13, count 0 2006.229.10:36:29.96#ibcon#read 6, iclass 13, count 0 2006.229.10:36:29.96#ibcon#end of sib2, iclass 13, count 0 2006.229.10:36:29.96#ibcon#*after write, iclass 13, count 0 2006.229.10:36:29.96#ibcon#*before return 0, iclass 13, count 0 2006.229.10:36:29.96#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:29.96#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:29.96#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:36:29.96#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:36:29.96$vck44/vb=1,4 2006.229.10:36:29.96#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.10:36:29.96#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.10:36:29.96#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:29.96#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:36:29.96#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:36:29.96#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:36:29.96#ibcon#enter wrdev, iclass 15, count 2 2006.229.10:36:29.96#ibcon#first serial, iclass 15, count 2 2006.229.10:36:29.96#ibcon#enter sib2, iclass 15, count 2 2006.229.10:36:29.96#ibcon#flushed, iclass 15, count 2 2006.229.10:36:29.96#ibcon#about to write, iclass 15, count 2 2006.229.10:36:29.96#ibcon#wrote, iclass 15, count 2 2006.229.10:36:29.96#ibcon#about to read 3, iclass 15, count 2 2006.229.10:36:29.98#ibcon#read 3, iclass 15, count 2 2006.229.10:36:29.98#ibcon#about to read 4, iclass 15, count 2 2006.229.10:36:29.98#ibcon#read 4, iclass 15, count 2 2006.229.10:36:29.98#ibcon#about to read 5, iclass 15, count 2 2006.229.10:36:29.98#ibcon#read 5, iclass 15, count 2 2006.229.10:36:29.98#ibcon#about to read 6, iclass 15, count 2 2006.229.10:36:29.98#ibcon#read 6, iclass 15, count 2 2006.229.10:36:29.98#ibcon#end of sib2, iclass 15, count 2 2006.229.10:36:29.98#ibcon#*mode == 0, iclass 15, count 2 2006.229.10:36:29.98#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.10:36:29.98#ibcon#[27=AT01-04\r\n] 2006.229.10:36:29.98#ibcon#*before write, iclass 15, count 2 2006.229.10:36:29.98#ibcon#enter sib2, iclass 15, count 2 2006.229.10:36:29.98#ibcon#flushed, iclass 15, count 2 2006.229.10:36:29.98#ibcon#about to write, iclass 15, count 2 2006.229.10:36:29.98#ibcon#wrote, iclass 15, count 2 2006.229.10:36:29.98#ibcon#about to read 3, iclass 15, count 2 2006.229.10:36:30.01#abcon#<5=/04 1.4 2.4 28.48 981001.6\r\n> 2006.229.10:36:30.01#ibcon#read 3, iclass 15, count 2 2006.229.10:36:30.01#ibcon#about to read 4, iclass 15, count 2 2006.229.10:36:30.01#ibcon#read 4, iclass 15, count 2 2006.229.10:36:30.01#ibcon#about to read 5, iclass 15, count 2 2006.229.10:36:30.01#ibcon#read 5, iclass 15, count 2 2006.229.10:36:30.01#ibcon#about to read 6, iclass 15, count 2 2006.229.10:36:30.01#ibcon#read 6, iclass 15, count 2 2006.229.10:36:30.01#ibcon#end of sib2, iclass 15, count 2 2006.229.10:36:30.01#ibcon#*after write, iclass 15, count 2 2006.229.10:36:30.01#ibcon#*before return 0, iclass 15, count 2 2006.229.10:36:30.01#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:36:30.01#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:36:30.01#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.10:36:30.01#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:30.01#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:36:30.03#abcon#{5=INTERFACE CLEAR} 2006.229.10:36:30.09#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:36:30.13#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:36:30.13#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:36:30.13#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:36:30.13#ibcon#first serial, iclass 15, count 0 2006.229.10:36:30.13#ibcon#enter sib2, iclass 15, count 0 2006.229.10:36:30.13#ibcon#flushed, iclass 15, count 0 2006.229.10:36:30.13#ibcon#about to write, iclass 15, count 0 2006.229.10:36:30.13#ibcon#wrote, iclass 15, count 0 2006.229.10:36:30.13#ibcon#about to read 3, iclass 15, count 0 2006.229.10:36:30.15#ibcon#read 3, iclass 15, count 0 2006.229.10:36:30.15#ibcon#about to read 4, iclass 15, count 0 2006.229.10:36:30.15#ibcon#read 4, iclass 15, count 0 2006.229.10:36:30.15#ibcon#about to read 5, iclass 15, count 0 2006.229.10:36:30.15#ibcon#read 5, iclass 15, count 0 2006.229.10:36:30.15#ibcon#about to read 6, iclass 15, count 0 2006.229.10:36:30.15#ibcon#read 6, iclass 15, count 0 2006.229.10:36:30.15#ibcon#end of sib2, iclass 15, count 0 2006.229.10:36:30.15#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:36:30.15#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:36:30.15#ibcon#[27=USB\r\n] 2006.229.10:36:30.15#ibcon#*before write, iclass 15, count 0 2006.229.10:36:30.15#ibcon#enter sib2, iclass 15, count 0 2006.229.10:36:30.15#ibcon#flushed, iclass 15, count 0 2006.229.10:36:30.15#ibcon#about to write, iclass 15, count 0 2006.229.10:36:30.15#ibcon#wrote, iclass 15, count 0 2006.229.10:36:30.15#ibcon#about to read 3, iclass 15, count 0 2006.229.10:36:30.18#ibcon#read 3, iclass 15, count 0 2006.229.10:36:30.18#ibcon#about to read 4, iclass 15, count 0 2006.229.10:36:30.18#ibcon#read 4, iclass 15, count 0 2006.229.10:36:30.18#ibcon#about to read 5, iclass 15, count 0 2006.229.10:36:30.18#ibcon#read 5, iclass 15, count 0 2006.229.10:36:30.18#ibcon#about to read 6, iclass 15, count 0 2006.229.10:36:30.18#ibcon#read 6, iclass 15, count 0 2006.229.10:36:30.18#ibcon#end of sib2, iclass 15, count 0 2006.229.10:36:30.18#ibcon#*after write, iclass 15, count 0 2006.229.10:36:30.18#ibcon#*before return 0, iclass 15, count 0 2006.229.10:36:30.18#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:36:30.18#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:36:30.18#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:36:30.18#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:36:30.18$vck44/vblo=2,634.99 2006.229.10:36:30.18#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.10:36:30.18#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.10:36:30.18#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:30.18#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:30.18#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:30.18#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:30.18#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:36:30.18#ibcon#first serial, iclass 21, count 0 2006.229.10:36:30.18#ibcon#enter sib2, iclass 21, count 0 2006.229.10:36:30.18#ibcon#flushed, iclass 21, count 0 2006.229.10:36:30.18#ibcon#about to write, iclass 21, count 0 2006.229.10:36:30.18#ibcon#wrote, iclass 21, count 0 2006.229.10:36:30.18#ibcon#about to read 3, iclass 21, count 0 2006.229.10:36:30.20#ibcon#read 3, iclass 21, count 0 2006.229.10:36:30.20#ibcon#about to read 4, iclass 21, count 0 2006.229.10:36:30.20#ibcon#read 4, iclass 21, count 0 2006.229.10:36:30.20#ibcon#about to read 5, iclass 21, count 0 2006.229.10:36:30.20#ibcon#read 5, iclass 21, count 0 2006.229.10:36:30.20#ibcon#about to read 6, iclass 21, count 0 2006.229.10:36:30.20#ibcon#read 6, iclass 21, count 0 2006.229.10:36:30.20#ibcon#end of sib2, iclass 21, count 0 2006.229.10:36:30.20#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:36:30.20#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:36:30.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:36:30.20#ibcon#*before write, iclass 21, count 0 2006.229.10:36:30.20#ibcon#enter sib2, iclass 21, count 0 2006.229.10:36:30.20#ibcon#flushed, iclass 21, count 0 2006.229.10:36:30.20#ibcon#about to write, iclass 21, count 0 2006.229.10:36:30.20#ibcon#wrote, iclass 21, count 0 2006.229.10:36:30.20#ibcon#about to read 3, iclass 21, count 0 2006.229.10:36:30.24#ibcon#read 3, iclass 21, count 0 2006.229.10:36:30.24#ibcon#about to read 4, iclass 21, count 0 2006.229.10:36:30.24#ibcon#read 4, iclass 21, count 0 2006.229.10:36:30.24#ibcon#about to read 5, iclass 21, count 0 2006.229.10:36:30.24#ibcon#read 5, iclass 21, count 0 2006.229.10:36:30.24#ibcon#about to read 6, iclass 21, count 0 2006.229.10:36:30.24#ibcon#read 6, iclass 21, count 0 2006.229.10:36:30.24#ibcon#end of sib2, iclass 21, count 0 2006.229.10:36:30.24#ibcon#*after write, iclass 21, count 0 2006.229.10:36:30.24#ibcon#*before return 0, iclass 21, count 0 2006.229.10:36:30.24#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:30.24#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:36:30.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:36:30.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:36:30.24$vck44/vb=2,4 2006.229.10:36:30.24#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.10:36:30.24#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.10:36:30.24#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:30.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:30.30#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:30.30#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:30.30#ibcon#enter wrdev, iclass 23, count 2 2006.229.10:36:30.30#ibcon#first serial, iclass 23, count 2 2006.229.10:36:30.30#ibcon#enter sib2, iclass 23, count 2 2006.229.10:36:30.30#ibcon#flushed, iclass 23, count 2 2006.229.10:36:30.30#ibcon#about to write, iclass 23, count 2 2006.229.10:36:30.30#ibcon#wrote, iclass 23, count 2 2006.229.10:36:30.30#ibcon#about to read 3, iclass 23, count 2 2006.229.10:36:30.32#ibcon#read 3, iclass 23, count 2 2006.229.10:36:30.32#ibcon#about to read 4, iclass 23, count 2 2006.229.10:36:30.32#ibcon#read 4, iclass 23, count 2 2006.229.10:36:30.32#ibcon#about to read 5, iclass 23, count 2 2006.229.10:36:30.32#ibcon#read 5, iclass 23, count 2 2006.229.10:36:30.32#ibcon#about to read 6, iclass 23, count 2 2006.229.10:36:30.32#ibcon#read 6, iclass 23, count 2 2006.229.10:36:30.32#ibcon#end of sib2, iclass 23, count 2 2006.229.10:36:30.32#ibcon#*mode == 0, iclass 23, count 2 2006.229.10:36:30.32#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.10:36:30.32#ibcon#[27=AT02-04\r\n] 2006.229.10:36:30.32#ibcon#*before write, iclass 23, count 2 2006.229.10:36:30.32#ibcon#enter sib2, iclass 23, count 2 2006.229.10:36:30.32#ibcon#flushed, iclass 23, count 2 2006.229.10:36:30.32#ibcon#about to write, iclass 23, count 2 2006.229.10:36:30.32#ibcon#wrote, iclass 23, count 2 2006.229.10:36:30.32#ibcon#about to read 3, iclass 23, count 2 2006.229.10:36:30.35#ibcon#read 3, iclass 23, count 2 2006.229.10:36:30.35#ibcon#about to read 4, iclass 23, count 2 2006.229.10:36:30.35#ibcon#read 4, iclass 23, count 2 2006.229.10:36:30.35#ibcon#about to read 5, iclass 23, count 2 2006.229.10:36:30.35#ibcon#read 5, iclass 23, count 2 2006.229.10:36:30.35#ibcon#about to read 6, iclass 23, count 2 2006.229.10:36:30.35#ibcon#read 6, iclass 23, count 2 2006.229.10:36:30.35#ibcon#end of sib2, iclass 23, count 2 2006.229.10:36:30.35#ibcon#*after write, iclass 23, count 2 2006.229.10:36:30.35#ibcon#*before return 0, iclass 23, count 2 2006.229.10:36:30.35#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:30.35#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:36:30.35#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.10:36:30.35#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:30.35#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:30.47#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:30.47#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:30.47#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:36:30.47#ibcon#first serial, iclass 23, count 0 2006.229.10:36:30.47#ibcon#enter sib2, iclass 23, count 0 2006.229.10:36:30.47#ibcon#flushed, iclass 23, count 0 2006.229.10:36:30.47#ibcon#about to write, iclass 23, count 0 2006.229.10:36:30.47#ibcon#wrote, iclass 23, count 0 2006.229.10:36:30.47#ibcon#about to read 3, iclass 23, count 0 2006.229.10:36:30.49#ibcon#read 3, iclass 23, count 0 2006.229.10:36:30.49#ibcon#about to read 4, iclass 23, count 0 2006.229.10:36:30.49#ibcon#read 4, iclass 23, count 0 2006.229.10:36:30.49#ibcon#about to read 5, iclass 23, count 0 2006.229.10:36:30.49#ibcon#read 5, iclass 23, count 0 2006.229.10:36:30.49#ibcon#about to read 6, iclass 23, count 0 2006.229.10:36:30.49#ibcon#read 6, iclass 23, count 0 2006.229.10:36:30.49#ibcon#end of sib2, iclass 23, count 0 2006.229.10:36:30.49#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:36:30.49#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:36:30.49#ibcon#[27=USB\r\n] 2006.229.10:36:30.49#ibcon#*before write, iclass 23, count 0 2006.229.10:36:30.49#ibcon#enter sib2, iclass 23, count 0 2006.229.10:36:30.49#ibcon#flushed, iclass 23, count 0 2006.229.10:36:30.49#ibcon#about to write, iclass 23, count 0 2006.229.10:36:30.49#ibcon#wrote, iclass 23, count 0 2006.229.10:36:30.49#ibcon#about to read 3, iclass 23, count 0 2006.229.10:36:30.52#ibcon#read 3, iclass 23, count 0 2006.229.10:36:30.52#ibcon#about to read 4, iclass 23, count 0 2006.229.10:36:30.52#ibcon#read 4, iclass 23, count 0 2006.229.10:36:30.52#ibcon#about to read 5, iclass 23, count 0 2006.229.10:36:30.52#ibcon#read 5, iclass 23, count 0 2006.229.10:36:30.52#ibcon#about to read 6, iclass 23, count 0 2006.229.10:36:30.52#ibcon#read 6, iclass 23, count 0 2006.229.10:36:30.52#ibcon#end of sib2, iclass 23, count 0 2006.229.10:36:30.52#ibcon#*after write, iclass 23, count 0 2006.229.10:36:30.52#ibcon#*before return 0, iclass 23, count 0 2006.229.10:36:30.52#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:30.52#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:36:30.52#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:36:30.52#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:36:30.52$vck44/vblo=3,649.99 2006.229.10:36:30.52#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.10:36:30.52#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.10:36:30.52#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:30.52#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:30.52#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:30.52#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:30.52#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:36:30.52#ibcon#first serial, iclass 25, count 0 2006.229.10:36:30.52#ibcon#enter sib2, iclass 25, count 0 2006.229.10:36:30.52#ibcon#flushed, iclass 25, count 0 2006.229.10:36:30.52#ibcon#about to write, iclass 25, count 0 2006.229.10:36:30.52#ibcon#wrote, iclass 25, count 0 2006.229.10:36:30.52#ibcon#about to read 3, iclass 25, count 0 2006.229.10:36:30.54#ibcon#read 3, iclass 25, count 0 2006.229.10:36:30.54#ibcon#about to read 4, iclass 25, count 0 2006.229.10:36:30.54#ibcon#read 4, iclass 25, count 0 2006.229.10:36:30.54#ibcon#about to read 5, iclass 25, count 0 2006.229.10:36:30.54#ibcon#read 5, iclass 25, count 0 2006.229.10:36:30.54#ibcon#about to read 6, iclass 25, count 0 2006.229.10:36:30.54#ibcon#read 6, iclass 25, count 0 2006.229.10:36:30.54#ibcon#end of sib2, iclass 25, count 0 2006.229.10:36:30.54#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:36:30.54#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:36:30.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:36:30.54#ibcon#*before write, iclass 25, count 0 2006.229.10:36:30.54#ibcon#enter sib2, iclass 25, count 0 2006.229.10:36:30.54#ibcon#flushed, iclass 25, count 0 2006.229.10:36:30.54#ibcon#about to write, iclass 25, count 0 2006.229.10:36:30.54#ibcon#wrote, iclass 25, count 0 2006.229.10:36:30.54#ibcon#about to read 3, iclass 25, count 0 2006.229.10:36:30.58#ibcon#read 3, iclass 25, count 0 2006.229.10:36:30.58#ibcon#about to read 4, iclass 25, count 0 2006.229.10:36:30.58#ibcon#read 4, iclass 25, count 0 2006.229.10:36:30.58#ibcon#about to read 5, iclass 25, count 0 2006.229.10:36:30.58#ibcon#read 5, iclass 25, count 0 2006.229.10:36:30.58#ibcon#about to read 6, iclass 25, count 0 2006.229.10:36:30.58#ibcon#read 6, iclass 25, count 0 2006.229.10:36:30.58#ibcon#end of sib2, iclass 25, count 0 2006.229.10:36:30.58#ibcon#*after write, iclass 25, count 0 2006.229.10:36:30.58#ibcon#*before return 0, iclass 25, count 0 2006.229.10:36:30.58#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:30.58#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:36:30.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:36:30.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:36:30.58$vck44/vb=3,4 2006.229.10:36:30.58#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.10:36:30.58#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.10:36:30.58#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:30.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:30.64#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:30.64#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:30.64#ibcon#enter wrdev, iclass 27, count 2 2006.229.10:36:30.64#ibcon#first serial, iclass 27, count 2 2006.229.10:36:30.64#ibcon#enter sib2, iclass 27, count 2 2006.229.10:36:30.64#ibcon#flushed, iclass 27, count 2 2006.229.10:36:30.64#ibcon#about to write, iclass 27, count 2 2006.229.10:36:30.64#ibcon#wrote, iclass 27, count 2 2006.229.10:36:30.64#ibcon#about to read 3, iclass 27, count 2 2006.229.10:36:30.66#ibcon#read 3, iclass 27, count 2 2006.229.10:36:30.66#ibcon#about to read 4, iclass 27, count 2 2006.229.10:36:30.66#ibcon#read 4, iclass 27, count 2 2006.229.10:36:30.66#ibcon#about to read 5, iclass 27, count 2 2006.229.10:36:30.66#ibcon#read 5, iclass 27, count 2 2006.229.10:36:30.66#ibcon#about to read 6, iclass 27, count 2 2006.229.10:36:30.66#ibcon#read 6, iclass 27, count 2 2006.229.10:36:30.66#ibcon#end of sib2, iclass 27, count 2 2006.229.10:36:30.66#ibcon#*mode == 0, iclass 27, count 2 2006.229.10:36:30.66#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.10:36:30.66#ibcon#[27=AT03-04\r\n] 2006.229.10:36:30.66#ibcon#*before write, iclass 27, count 2 2006.229.10:36:30.66#ibcon#enter sib2, iclass 27, count 2 2006.229.10:36:30.66#ibcon#flushed, iclass 27, count 2 2006.229.10:36:30.66#ibcon#about to write, iclass 27, count 2 2006.229.10:36:30.66#ibcon#wrote, iclass 27, count 2 2006.229.10:36:30.66#ibcon#about to read 3, iclass 27, count 2 2006.229.10:36:30.69#ibcon#read 3, iclass 27, count 2 2006.229.10:36:30.69#ibcon#about to read 4, iclass 27, count 2 2006.229.10:36:30.69#ibcon#read 4, iclass 27, count 2 2006.229.10:36:30.69#ibcon#about to read 5, iclass 27, count 2 2006.229.10:36:30.69#ibcon#read 5, iclass 27, count 2 2006.229.10:36:30.69#ibcon#about to read 6, iclass 27, count 2 2006.229.10:36:30.69#ibcon#read 6, iclass 27, count 2 2006.229.10:36:30.69#ibcon#end of sib2, iclass 27, count 2 2006.229.10:36:30.69#ibcon#*after write, iclass 27, count 2 2006.229.10:36:30.69#ibcon#*before return 0, iclass 27, count 2 2006.229.10:36:30.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:30.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:36:30.69#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.10:36:30.69#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:30.69#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:30.81#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:30.81#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:30.81#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:36:30.81#ibcon#first serial, iclass 27, count 0 2006.229.10:36:30.81#ibcon#enter sib2, iclass 27, count 0 2006.229.10:36:30.81#ibcon#flushed, iclass 27, count 0 2006.229.10:36:30.81#ibcon#about to write, iclass 27, count 0 2006.229.10:36:30.81#ibcon#wrote, iclass 27, count 0 2006.229.10:36:30.81#ibcon#about to read 3, iclass 27, count 0 2006.229.10:36:30.83#ibcon#read 3, iclass 27, count 0 2006.229.10:36:30.83#ibcon#about to read 4, iclass 27, count 0 2006.229.10:36:30.83#ibcon#read 4, iclass 27, count 0 2006.229.10:36:30.83#ibcon#about to read 5, iclass 27, count 0 2006.229.10:36:30.83#ibcon#read 5, iclass 27, count 0 2006.229.10:36:30.83#ibcon#about to read 6, iclass 27, count 0 2006.229.10:36:30.83#ibcon#read 6, iclass 27, count 0 2006.229.10:36:30.83#ibcon#end of sib2, iclass 27, count 0 2006.229.10:36:30.83#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:36:30.83#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:36:30.83#ibcon#[27=USB\r\n] 2006.229.10:36:30.83#ibcon#*before write, iclass 27, count 0 2006.229.10:36:30.83#ibcon#enter sib2, iclass 27, count 0 2006.229.10:36:30.83#ibcon#flushed, iclass 27, count 0 2006.229.10:36:30.83#ibcon#about to write, iclass 27, count 0 2006.229.10:36:30.83#ibcon#wrote, iclass 27, count 0 2006.229.10:36:30.83#ibcon#about to read 3, iclass 27, count 0 2006.229.10:36:30.86#ibcon#read 3, iclass 27, count 0 2006.229.10:36:30.86#ibcon#about to read 4, iclass 27, count 0 2006.229.10:36:30.86#ibcon#read 4, iclass 27, count 0 2006.229.10:36:30.86#ibcon#about to read 5, iclass 27, count 0 2006.229.10:36:30.86#ibcon#read 5, iclass 27, count 0 2006.229.10:36:30.86#ibcon#about to read 6, iclass 27, count 0 2006.229.10:36:30.86#ibcon#read 6, iclass 27, count 0 2006.229.10:36:30.86#ibcon#end of sib2, iclass 27, count 0 2006.229.10:36:30.86#ibcon#*after write, iclass 27, count 0 2006.229.10:36:30.86#ibcon#*before return 0, iclass 27, count 0 2006.229.10:36:30.86#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:30.86#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:36:30.86#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:36:30.86#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:36:30.86$vck44/vblo=4,679.99 2006.229.10:36:30.86#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.10:36:30.86#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.10:36:30.86#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:30.86#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:30.86#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:30.86#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:30.86#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:36:30.86#ibcon#first serial, iclass 29, count 0 2006.229.10:36:30.86#ibcon#enter sib2, iclass 29, count 0 2006.229.10:36:30.86#ibcon#flushed, iclass 29, count 0 2006.229.10:36:30.86#ibcon#about to write, iclass 29, count 0 2006.229.10:36:30.86#ibcon#wrote, iclass 29, count 0 2006.229.10:36:30.86#ibcon#about to read 3, iclass 29, count 0 2006.229.10:36:30.88#ibcon#read 3, iclass 29, count 0 2006.229.10:36:30.88#ibcon#about to read 4, iclass 29, count 0 2006.229.10:36:30.88#ibcon#read 4, iclass 29, count 0 2006.229.10:36:30.88#ibcon#about to read 5, iclass 29, count 0 2006.229.10:36:30.88#ibcon#read 5, iclass 29, count 0 2006.229.10:36:30.88#ibcon#about to read 6, iclass 29, count 0 2006.229.10:36:30.88#ibcon#read 6, iclass 29, count 0 2006.229.10:36:30.88#ibcon#end of sib2, iclass 29, count 0 2006.229.10:36:30.88#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:36:30.88#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:36:30.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:36:30.88#ibcon#*before write, iclass 29, count 0 2006.229.10:36:30.88#ibcon#enter sib2, iclass 29, count 0 2006.229.10:36:30.88#ibcon#flushed, iclass 29, count 0 2006.229.10:36:30.88#ibcon#about to write, iclass 29, count 0 2006.229.10:36:30.88#ibcon#wrote, iclass 29, count 0 2006.229.10:36:30.88#ibcon#about to read 3, iclass 29, count 0 2006.229.10:36:30.92#ibcon#read 3, iclass 29, count 0 2006.229.10:36:30.92#ibcon#about to read 4, iclass 29, count 0 2006.229.10:36:30.92#ibcon#read 4, iclass 29, count 0 2006.229.10:36:30.92#ibcon#about to read 5, iclass 29, count 0 2006.229.10:36:30.92#ibcon#read 5, iclass 29, count 0 2006.229.10:36:30.92#ibcon#about to read 6, iclass 29, count 0 2006.229.10:36:30.92#ibcon#read 6, iclass 29, count 0 2006.229.10:36:30.92#ibcon#end of sib2, iclass 29, count 0 2006.229.10:36:30.92#ibcon#*after write, iclass 29, count 0 2006.229.10:36:30.92#ibcon#*before return 0, iclass 29, count 0 2006.229.10:36:30.92#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:30.92#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:36:30.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:36:30.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:36:30.92$vck44/vb=4,4 2006.229.10:36:30.92#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.10:36:30.92#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.10:36:30.92#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:30.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:30.98#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:30.98#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:30.98#ibcon#enter wrdev, iclass 31, count 2 2006.229.10:36:30.98#ibcon#first serial, iclass 31, count 2 2006.229.10:36:30.98#ibcon#enter sib2, iclass 31, count 2 2006.229.10:36:30.98#ibcon#flushed, iclass 31, count 2 2006.229.10:36:30.98#ibcon#about to write, iclass 31, count 2 2006.229.10:36:30.98#ibcon#wrote, iclass 31, count 2 2006.229.10:36:30.98#ibcon#about to read 3, iclass 31, count 2 2006.229.10:36:31.00#ibcon#read 3, iclass 31, count 2 2006.229.10:36:31.00#ibcon#about to read 4, iclass 31, count 2 2006.229.10:36:31.00#ibcon#read 4, iclass 31, count 2 2006.229.10:36:31.00#ibcon#about to read 5, iclass 31, count 2 2006.229.10:36:31.00#ibcon#read 5, iclass 31, count 2 2006.229.10:36:31.00#ibcon#about to read 6, iclass 31, count 2 2006.229.10:36:31.00#ibcon#read 6, iclass 31, count 2 2006.229.10:36:31.00#ibcon#end of sib2, iclass 31, count 2 2006.229.10:36:31.00#ibcon#*mode == 0, iclass 31, count 2 2006.229.10:36:31.00#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.10:36:31.00#ibcon#[27=AT04-04\r\n] 2006.229.10:36:31.00#ibcon#*before write, iclass 31, count 2 2006.229.10:36:31.00#ibcon#enter sib2, iclass 31, count 2 2006.229.10:36:31.00#ibcon#flushed, iclass 31, count 2 2006.229.10:36:31.00#ibcon#about to write, iclass 31, count 2 2006.229.10:36:31.00#ibcon#wrote, iclass 31, count 2 2006.229.10:36:31.00#ibcon#about to read 3, iclass 31, count 2 2006.229.10:36:31.03#ibcon#read 3, iclass 31, count 2 2006.229.10:36:31.03#ibcon#about to read 4, iclass 31, count 2 2006.229.10:36:31.03#ibcon#read 4, iclass 31, count 2 2006.229.10:36:31.03#ibcon#about to read 5, iclass 31, count 2 2006.229.10:36:31.03#ibcon#read 5, iclass 31, count 2 2006.229.10:36:31.03#ibcon#about to read 6, iclass 31, count 2 2006.229.10:36:31.03#ibcon#read 6, iclass 31, count 2 2006.229.10:36:31.03#ibcon#end of sib2, iclass 31, count 2 2006.229.10:36:31.03#ibcon#*after write, iclass 31, count 2 2006.229.10:36:31.03#ibcon#*before return 0, iclass 31, count 2 2006.229.10:36:31.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:31.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:36:31.03#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.10:36:31.03#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:31.03#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:31.15#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:31.15#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:31.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:36:31.15#ibcon#first serial, iclass 31, count 0 2006.229.10:36:31.15#ibcon#enter sib2, iclass 31, count 0 2006.229.10:36:31.15#ibcon#flushed, iclass 31, count 0 2006.229.10:36:31.15#ibcon#about to write, iclass 31, count 0 2006.229.10:36:31.15#ibcon#wrote, iclass 31, count 0 2006.229.10:36:31.15#ibcon#about to read 3, iclass 31, count 0 2006.229.10:36:31.17#ibcon#read 3, iclass 31, count 0 2006.229.10:36:31.17#ibcon#about to read 4, iclass 31, count 0 2006.229.10:36:31.17#ibcon#read 4, iclass 31, count 0 2006.229.10:36:31.17#ibcon#about to read 5, iclass 31, count 0 2006.229.10:36:31.17#ibcon#read 5, iclass 31, count 0 2006.229.10:36:31.17#ibcon#about to read 6, iclass 31, count 0 2006.229.10:36:31.17#ibcon#read 6, iclass 31, count 0 2006.229.10:36:31.17#ibcon#end of sib2, iclass 31, count 0 2006.229.10:36:31.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:36:31.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:36:31.17#ibcon#[27=USB\r\n] 2006.229.10:36:31.17#ibcon#*before write, iclass 31, count 0 2006.229.10:36:31.17#ibcon#enter sib2, iclass 31, count 0 2006.229.10:36:31.17#ibcon#flushed, iclass 31, count 0 2006.229.10:36:31.17#ibcon#about to write, iclass 31, count 0 2006.229.10:36:31.17#ibcon#wrote, iclass 31, count 0 2006.229.10:36:31.17#ibcon#about to read 3, iclass 31, count 0 2006.229.10:36:31.20#ibcon#read 3, iclass 31, count 0 2006.229.10:36:31.20#ibcon#about to read 4, iclass 31, count 0 2006.229.10:36:31.20#ibcon#read 4, iclass 31, count 0 2006.229.10:36:31.20#ibcon#about to read 5, iclass 31, count 0 2006.229.10:36:31.20#ibcon#read 5, iclass 31, count 0 2006.229.10:36:31.20#ibcon#about to read 6, iclass 31, count 0 2006.229.10:36:31.20#ibcon#read 6, iclass 31, count 0 2006.229.10:36:31.20#ibcon#end of sib2, iclass 31, count 0 2006.229.10:36:31.20#ibcon#*after write, iclass 31, count 0 2006.229.10:36:31.20#ibcon#*before return 0, iclass 31, count 0 2006.229.10:36:31.20#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:31.20#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:36:31.20#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:36:31.20#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:36:31.20$vck44/vblo=5,709.99 2006.229.10:36:31.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.10:36:31.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.10:36:31.20#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:31.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:31.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:31.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:31.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:36:31.20#ibcon#first serial, iclass 33, count 0 2006.229.10:36:31.20#ibcon#enter sib2, iclass 33, count 0 2006.229.10:36:31.20#ibcon#flushed, iclass 33, count 0 2006.229.10:36:31.20#ibcon#about to write, iclass 33, count 0 2006.229.10:36:31.20#ibcon#wrote, iclass 33, count 0 2006.229.10:36:31.20#ibcon#about to read 3, iclass 33, count 0 2006.229.10:36:31.22#ibcon#read 3, iclass 33, count 0 2006.229.10:36:31.22#ibcon#about to read 4, iclass 33, count 0 2006.229.10:36:31.22#ibcon#read 4, iclass 33, count 0 2006.229.10:36:31.22#ibcon#about to read 5, iclass 33, count 0 2006.229.10:36:31.22#ibcon#read 5, iclass 33, count 0 2006.229.10:36:31.22#ibcon#about to read 6, iclass 33, count 0 2006.229.10:36:31.22#ibcon#read 6, iclass 33, count 0 2006.229.10:36:31.22#ibcon#end of sib2, iclass 33, count 0 2006.229.10:36:31.22#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:36:31.22#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:36:31.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:36:31.22#ibcon#*before write, iclass 33, count 0 2006.229.10:36:31.22#ibcon#enter sib2, iclass 33, count 0 2006.229.10:36:31.22#ibcon#flushed, iclass 33, count 0 2006.229.10:36:31.22#ibcon#about to write, iclass 33, count 0 2006.229.10:36:31.22#ibcon#wrote, iclass 33, count 0 2006.229.10:36:31.22#ibcon#about to read 3, iclass 33, count 0 2006.229.10:36:31.26#ibcon#read 3, iclass 33, count 0 2006.229.10:36:31.26#ibcon#about to read 4, iclass 33, count 0 2006.229.10:36:31.26#ibcon#read 4, iclass 33, count 0 2006.229.10:36:31.26#ibcon#about to read 5, iclass 33, count 0 2006.229.10:36:31.26#ibcon#read 5, iclass 33, count 0 2006.229.10:36:31.26#ibcon#about to read 6, iclass 33, count 0 2006.229.10:36:31.26#ibcon#read 6, iclass 33, count 0 2006.229.10:36:31.26#ibcon#end of sib2, iclass 33, count 0 2006.229.10:36:31.26#ibcon#*after write, iclass 33, count 0 2006.229.10:36:31.26#ibcon#*before return 0, iclass 33, count 0 2006.229.10:36:31.26#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:31.26#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:36:31.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:36:31.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:36:31.26$vck44/vb=5,4 2006.229.10:36:31.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.10:36:31.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.10:36:31.26#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:31.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:31.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:31.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:31.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.10:36:31.32#ibcon#first serial, iclass 35, count 2 2006.229.10:36:31.32#ibcon#enter sib2, iclass 35, count 2 2006.229.10:36:31.32#ibcon#flushed, iclass 35, count 2 2006.229.10:36:31.32#ibcon#about to write, iclass 35, count 2 2006.229.10:36:31.32#ibcon#wrote, iclass 35, count 2 2006.229.10:36:31.32#ibcon#about to read 3, iclass 35, count 2 2006.229.10:36:31.34#ibcon#read 3, iclass 35, count 2 2006.229.10:36:31.34#ibcon#about to read 4, iclass 35, count 2 2006.229.10:36:31.34#ibcon#read 4, iclass 35, count 2 2006.229.10:36:31.34#ibcon#about to read 5, iclass 35, count 2 2006.229.10:36:31.34#ibcon#read 5, iclass 35, count 2 2006.229.10:36:31.34#ibcon#about to read 6, iclass 35, count 2 2006.229.10:36:31.34#ibcon#read 6, iclass 35, count 2 2006.229.10:36:31.34#ibcon#end of sib2, iclass 35, count 2 2006.229.10:36:31.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.10:36:31.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.10:36:31.34#ibcon#[27=AT05-04\r\n] 2006.229.10:36:31.34#ibcon#*before write, iclass 35, count 2 2006.229.10:36:31.34#ibcon#enter sib2, iclass 35, count 2 2006.229.10:36:31.34#ibcon#flushed, iclass 35, count 2 2006.229.10:36:31.34#ibcon#about to write, iclass 35, count 2 2006.229.10:36:31.34#ibcon#wrote, iclass 35, count 2 2006.229.10:36:31.34#ibcon#about to read 3, iclass 35, count 2 2006.229.10:36:31.37#ibcon#read 3, iclass 35, count 2 2006.229.10:36:31.37#ibcon#about to read 4, iclass 35, count 2 2006.229.10:36:31.37#ibcon#read 4, iclass 35, count 2 2006.229.10:36:31.37#ibcon#about to read 5, iclass 35, count 2 2006.229.10:36:31.37#ibcon#read 5, iclass 35, count 2 2006.229.10:36:31.37#ibcon#about to read 6, iclass 35, count 2 2006.229.10:36:31.37#ibcon#read 6, iclass 35, count 2 2006.229.10:36:31.37#ibcon#end of sib2, iclass 35, count 2 2006.229.10:36:31.37#ibcon#*after write, iclass 35, count 2 2006.229.10:36:31.37#ibcon#*before return 0, iclass 35, count 2 2006.229.10:36:31.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:31.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:36:31.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.10:36:31.37#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:31.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:31.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:31.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:31.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:36:31.49#ibcon#first serial, iclass 35, count 0 2006.229.10:36:31.49#ibcon#enter sib2, iclass 35, count 0 2006.229.10:36:31.49#ibcon#flushed, iclass 35, count 0 2006.229.10:36:31.49#ibcon#about to write, iclass 35, count 0 2006.229.10:36:31.49#ibcon#wrote, iclass 35, count 0 2006.229.10:36:31.49#ibcon#about to read 3, iclass 35, count 0 2006.229.10:36:31.51#ibcon#read 3, iclass 35, count 0 2006.229.10:36:31.51#ibcon#about to read 4, iclass 35, count 0 2006.229.10:36:31.51#ibcon#read 4, iclass 35, count 0 2006.229.10:36:31.51#ibcon#about to read 5, iclass 35, count 0 2006.229.10:36:31.51#ibcon#read 5, iclass 35, count 0 2006.229.10:36:31.51#ibcon#about to read 6, iclass 35, count 0 2006.229.10:36:31.51#ibcon#read 6, iclass 35, count 0 2006.229.10:36:31.51#ibcon#end of sib2, iclass 35, count 0 2006.229.10:36:31.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:36:31.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:36:31.51#ibcon#[27=USB\r\n] 2006.229.10:36:31.51#ibcon#*before write, iclass 35, count 0 2006.229.10:36:31.51#ibcon#enter sib2, iclass 35, count 0 2006.229.10:36:31.51#ibcon#flushed, iclass 35, count 0 2006.229.10:36:31.51#ibcon#about to write, iclass 35, count 0 2006.229.10:36:31.51#ibcon#wrote, iclass 35, count 0 2006.229.10:36:31.51#ibcon#about to read 3, iclass 35, count 0 2006.229.10:36:31.54#ibcon#read 3, iclass 35, count 0 2006.229.10:36:31.54#ibcon#about to read 4, iclass 35, count 0 2006.229.10:36:31.54#ibcon#read 4, iclass 35, count 0 2006.229.10:36:31.54#ibcon#about to read 5, iclass 35, count 0 2006.229.10:36:31.54#ibcon#read 5, iclass 35, count 0 2006.229.10:36:31.54#ibcon#about to read 6, iclass 35, count 0 2006.229.10:36:31.54#ibcon#read 6, iclass 35, count 0 2006.229.10:36:31.54#ibcon#end of sib2, iclass 35, count 0 2006.229.10:36:31.54#ibcon#*after write, iclass 35, count 0 2006.229.10:36:31.54#ibcon#*before return 0, iclass 35, count 0 2006.229.10:36:31.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:31.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:36:31.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:36:31.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:36:31.54$vck44/vblo=6,719.99 2006.229.10:36:31.54#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.10:36:31.54#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.10:36:31.54#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:31.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:31.54#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:31.54#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:31.54#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:36:31.54#ibcon#first serial, iclass 37, count 0 2006.229.10:36:31.54#ibcon#enter sib2, iclass 37, count 0 2006.229.10:36:31.54#ibcon#flushed, iclass 37, count 0 2006.229.10:36:31.54#ibcon#about to write, iclass 37, count 0 2006.229.10:36:31.54#ibcon#wrote, iclass 37, count 0 2006.229.10:36:31.54#ibcon#about to read 3, iclass 37, count 0 2006.229.10:36:31.56#ibcon#read 3, iclass 37, count 0 2006.229.10:36:31.56#ibcon#about to read 4, iclass 37, count 0 2006.229.10:36:31.56#ibcon#read 4, iclass 37, count 0 2006.229.10:36:31.56#ibcon#about to read 5, iclass 37, count 0 2006.229.10:36:31.56#ibcon#read 5, iclass 37, count 0 2006.229.10:36:31.56#ibcon#about to read 6, iclass 37, count 0 2006.229.10:36:31.56#ibcon#read 6, iclass 37, count 0 2006.229.10:36:31.56#ibcon#end of sib2, iclass 37, count 0 2006.229.10:36:31.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:36:31.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:36:31.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:36:31.56#ibcon#*before write, iclass 37, count 0 2006.229.10:36:31.56#ibcon#enter sib2, iclass 37, count 0 2006.229.10:36:31.56#ibcon#flushed, iclass 37, count 0 2006.229.10:36:31.56#ibcon#about to write, iclass 37, count 0 2006.229.10:36:31.56#ibcon#wrote, iclass 37, count 0 2006.229.10:36:31.56#ibcon#about to read 3, iclass 37, count 0 2006.229.10:36:31.60#ibcon#read 3, iclass 37, count 0 2006.229.10:36:31.60#ibcon#about to read 4, iclass 37, count 0 2006.229.10:36:31.60#ibcon#read 4, iclass 37, count 0 2006.229.10:36:31.60#ibcon#about to read 5, iclass 37, count 0 2006.229.10:36:31.60#ibcon#read 5, iclass 37, count 0 2006.229.10:36:31.60#ibcon#about to read 6, iclass 37, count 0 2006.229.10:36:31.60#ibcon#read 6, iclass 37, count 0 2006.229.10:36:31.60#ibcon#end of sib2, iclass 37, count 0 2006.229.10:36:31.60#ibcon#*after write, iclass 37, count 0 2006.229.10:36:31.60#ibcon#*before return 0, iclass 37, count 0 2006.229.10:36:31.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:31.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:36:31.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:36:31.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:36:31.60$vck44/vb=6,4 2006.229.10:36:31.60#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.10:36:31.60#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.10:36:31.60#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:31.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:31.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:31.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:31.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.10:36:31.66#ibcon#first serial, iclass 39, count 2 2006.229.10:36:31.66#ibcon#enter sib2, iclass 39, count 2 2006.229.10:36:31.66#ibcon#flushed, iclass 39, count 2 2006.229.10:36:31.66#ibcon#about to write, iclass 39, count 2 2006.229.10:36:31.66#ibcon#wrote, iclass 39, count 2 2006.229.10:36:31.66#ibcon#about to read 3, iclass 39, count 2 2006.229.10:36:31.68#ibcon#read 3, iclass 39, count 2 2006.229.10:36:31.68#ibcon#about to read 4, iclass 39, count 2 2006.229.10:36:31.68#ibcon#read 4, iclass 39, count 2 2006.229.10:36:31.68#ibcon#about to read 5, iclass 39, count 2 2006.229.10:36:31.68#ibcon#read 5, iclass 39, count 2 2006.229.10:36:31.68#ibcon#about to read 6, iclass 39, count 2 2006.229.10:36:31.68#ibcon#read 6, iclass 39, count 2 2006.229.10:36:31.68#ibcon#end of sib2, iclass 39, count 2 2006.229.10:36:31.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.10:36:31.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.10:36:31.68#ibcon#[27=AT06-04\r\n] 2006.229.10:36:31.68#ibcon#*before write, iclass 39, count 2 2006.229.10:36:31.68#ibcon#enter sib2, iclass 39, count 2 2006.229.10:36:31.68#ibcon#flushed, iclass 39, count 2 2006.229.10:36:31.68#ibcon#about to write, iclass 39, count 2 2006.229.10:36:31.68#ibcon#wrote, iclass 39, count 2 2006.229.10:36:31.68#ibcon#about to read 3, iclass 39, count 2 2006.229.10:36:31.71#ibcon#read 3, iclass 39, count 2 2006.229.10:36:31.71#ibcon#about to read 4, iclass 39, count 2 2006.229.10:36:31.71#ibcon#read 4, iclass 39, count 2 2006.229.10:36:31.71#ibcon#about to read 5, iclass 39, count 2 2006.229.10:36:31.71#ibcon#read 5, iclass 39, count 2 2006.229.10:36:31.71#ibcon#about to read 6, iclass 39, count 2 2006.229.10:36:31.71#ibcon#read 6, iclass 39, count 2 2006.229.10:36:31.71#ibcon#end of sib2, iclass 39, count 2 2006.229.10:36:31.71#ibcon#*after write, iclass 39, count 2 2006.229.10:36:31.71#ibcon#*before return 0, iclass 39, count 2 2006.229.10:36:31.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:31.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:36:31.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.10:36:31.71#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:31.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:31.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:31.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:31.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:36:31.83#ibcon#first serial, iclass 39, count 0 2006.229.10:36:31.83#ibcon#enter sib2, iclass 39, count 0 2006.229.10:36:31.83#ibcon#flushed, iclass 39, count 0 2006.229.10:36:31.83#ibcon#about to write, iclass 39, count 0 2006.229.10:36:31.83#ibcon#wrote, iclass 39, count 0 2006.229.10:36:31.83#ibcon#about to read 3, iclass 39, count 0 2006.229.10:36:31.85#ibcon#read 3, iclass 39, count 0 2006.229.10:36:31.85#ibcon#about to read 4, iclass 39, count 0 2006.229.10:36:31.85#ibcon#read 4, iclass 39, count 0 2006.229.10:36:31.85#ibcon#about to read 5, iclass 39, count 0 2006.229.10:36:31.85#ibcon#read 5, iclass 39, count 0 2006.229.10:36:31.85#ibcon#about to read 6, iclass 39, count 0 2006.229.10:36:31.85#ibcon#read 6, iclass 39, count 0 2006.229.10:36:31.85#ibcon#end of sib2, iclass 39, count 0 2006.229.10:36:31.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:36:31.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:36:31.85#ibcon#[27=USB\r\n] 2006.229.10:36:31.85#ibcon#*before write, iclass 39, count 0 2006.229.10:36:31.85#ibcon#enter sib2, iclass 39, count 0 2006.229.10:36:31.85#ibcon#flushed, iclass 39, count 0 2006.229.10:36:31.85#ibcon#about to write, iclass 39, count 0 2006.229.10:36:31.85#ibcon#wrote, iclass 39, count 0 2006.229.10:36:31.85#ibcon#about to read 3, iclass 39, count 0 2006.229.10:36:31.88#ibcon#read 3, iclass 39, count 0 2006.229.10:36:31.88#ibcon#about to read 4, iclass 39, count 0 2006.229.10:36:31.88#ibcon#read 4, iclass 39, count 0 2006.229.10:36:31.88#ibcon#about to read 5, iclass 39, count 0 2006.229.10:36:31.88#ibcon#read 5, iclass 39, count 0 2006.229.10:36:31.88#ibcon#about to read 6, iclass 39, count 0 2006.229.10:36:31.88#ibcon#read 6, iclass 39, count 0 2006.229.10:36:31.88#ibcon#end of sib2, iclass 39, count 0 2006.229.10:36:31.88#ibcon#*after write, iclass 39, count 0 2006.229.10:36:31.88#ibcon#*before return 0, iclass 39, count 0 2006.229.10:36:31.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:31.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:36:31.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:36:31.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:36:31.88$vck44/vblo=7,734.99 2006.229.10:36:31.88#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.10:36:31.88#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.10:36:31.88#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:31.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:31.88#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:31.88#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:31.88#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:36:31.88#ibcon#first serial, iclass 3, count 0 2006.229.10:36:31.88#ibcon#enter sib2, iclass 3, count 0 2006.229.10:36:31.88#ibcon#flushed, iclass 3, count 0 2006.229.10:36:31.88#ibcon#about to write, iclass 3, count 0 2006.229.10:36:31.88#ibcon#wrote, iclass 3, count 0 2006.229.10:36:31.88#ibcon#about to read 3, iclass 3, count 0 2006.229.10:36:31.90#ibcon#read 3, iclass 3, count 0 2006.229.10:36:31.90#ibcon#about to read 4, iclass 3, count 0 2006.229.10:36:31.90#ibcon#read 4, iclass 3, count 0 2006.229.10:36:31.90#ibcon#about to read 5, iclass 3, count 0 2006.229.10:36:31.90#ibcon#read 5, iclass 3, count 0 2006.229.10:36:31.90#ibcon#about to read 6, iclass 3, count 0 2006.229.10:36:31.90#ibcon#read 6, iclass 3, count 0 2006.229.10:36:31.90#ibcon#end of sib2, iclass 3, count 0 2006.229.10:36:31.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:36:31.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:36:31.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:36:31.90#ibcon#*before write, iclass 3, count 0 2006.229.10:36:31.90#ibcon#enter sib2, iclass 3, count 0 2006.229.10:36:31.90#ibcon#flushed, iclass 3, count 0 2006.229.10:36:31.90#ibcon#about to write, iclass 3, count 0 2006.229.10:36:31.90#ibcon#wrote, iclass 3, count 0 2006.229.10:36:31.90#ibcon#about to read 3, iclass 3, count 0 2006.229.10:36:31.94#ibcon#read 3, iclass 3, count 0 2006.229.10:36:31.94#ibcon#about to read 4, iclass 3, count 0 2006.229.10:36:31.94#ibcon#read 4, iclass 3, count 0 2006.229.10:36:31.94#ibcon#about to read 5, iclass 3, count 0 2006.229.10:36:31.94#ibcon#read 5, iclass 3, count 0 2006.229.10:36:31.94#ibcon#about to read 6, iclass 3, count 0 2006.229.10:36:31.94#ibcon#read 6, iclass 3, count 0 2006.229.10:36:31.94#ibcon#end of sib2, iclass 3, count 0 2006.229.10:36:31.94#ibcon#*after write, iclass 3, count 0 2006.229.10:36:31.94#ibcon#*before return 0, iclass 3, count 0 2006.229.10:36:31.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:31.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:36:31.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:36:31.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:36:31.94$vck44/vb=7,4 2006.229.10:36:31.94#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.10:36:31.94#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.10:36:31.94#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:31.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:32.00#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:32.00#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:32.00#ibcon#enter wrdev, iclass 5, count 2 2006.229.10:36:32.00#ibcon#first serial, iclass 5, count 2 2006.229.10:36:32.00#ibcon#enter sib2, iclass 5, count 2 2006.229.10:36:32.00#ibcon#flushed, iclass 5, count 2 2006.229.10:36:32.00#ibcon#about to write, iclass 5, count 2 2006.229.10:36:32.00#ibcon#wrote, iclass 5, count 2 2006.229.10:36:32.00#ibcon#about to read 3, iclass 5, count 2 2006.229.10:36:32.02#ibcon#read 3, iclass 5, count 2 2006.229.10:36:32.02#ibcon#about to read 4, iclass 5, count 2 2006.229.10:36:32.02#ibcon#read 4, iclass 5, count 2 2006.229.10:36:32.02#ibcon#about to read 5, iclass 5, count 2 2006.229.10:36:32.02#ibcon#read 5, iclass 5, count 2 2006.229.10:36:32.02#ibcon#about to read 6, iclass 5, count 2 2006.229.10:36:32.02#ibcon#read 6, iclass 5, count 2 2006.229.10:36:32.02#ibcon#end of sib2, iclass 5, count 2 2006.229.10:36:32.02#ibcon#*mode == 0, iclass 5, count 2 2006.229.10:36:32.02#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.10:36:32.02#ibcon#[27=AT07-04\r\n] 2006.229.10:36:32.02#ibcon#*before write, iclass 5, count 2 2006.229.10:36:32.02#ibcon#enter sib2, iclass 5, count 2 2006.229.10:36:32.02#ibcon#flushed, iclass 5, count 2 2006.229.10:36:32.02#ibcon#about to write, iclass 5, count 2 2006.229.10:36:32.02#ibcon#wrote, iclass 5, count 2 2006.229.10:36:32.02#ibcon#about to read 3, iclass 5, count 2 2006.229.10:36:32.05#ibcon#read 3, iclass 5, count 2 2006.229.10:36:32.05#ibcon#about to read 4, iclass 5, count 2 2006.229.10:36:32.05#ibcon#read 4, iclass 5, count 2 2006.229.10:36:32.05#ibcon#about to read 5, iclass 5, count 2 2006.229.10:36:32.05#ibcon#read 5, iclass 5, count 2 2006.229.10:36:32.05#ibcon#about to read 6, iclass 5, count 2 2006.229.10:36:32.05#ibcon#read 6, iclass 5, count 2 2006.229.10:36:32.05#ibcon#end of sib2, iclass 5, count 2 2006.229.10:36:32.05#ibcon#*after write, iclass 5, count 2 2006.229.10:36:32.05#ibcon#*before return 0, iclass 5, count 2 2006.229.10:36:32.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:32.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:36:32.05#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.10:36:32.05#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:32.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:32.17#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:32.17#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:32.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:36:32.17#ibcon#first serial, iclass 5, count 0 2006.229.10:36:32.17#ibcon#enter sib2, iclass 5, count 0 2006.229.10:36:32.17#ibcon#flushed, iclass 5, count 0 2006.229.10:36:32.17#ibcon#about to write, iclass 5, count 0 2006.229.10:36:32.17#ibcon#wrote, iclass 5, count 0 2006.229.10:36:32.17#ibcon#about to read 3, iclass 5, count 0 2006.229.10:36:32.19#ibcon#read 3, iclass 5, count 0 2006.229.10:36:32.19#ibcon#about to read 4, iclass 5, count 0 2006.229.10:36:32.19#ibcon#read 4, iclass 5, count 0 2006.229.10:36:32.19#ibcon#about to read 5, iclass 5, count 0 2006.229.10:36:32.19#ibcon#read 5, iclass 5, count 0 2006.229.10:36:32.19#ibcon#about to read 6, iclass 5, count 0 2006.229.10:36:32.19#ibcon#read 6, iclass 5, count 0 2006.229.10:36:32.19#ibcon#end of sib2, iclass 5, count 0 2006.229.10:36:32.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:36:32.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:36:32.19#ibcon#[27=USB\r\n] 2006.229.10:36:32.19#ibcon#*before write, iclass 5, count 0 2006.229.10:36:32.19#ibcon#enter sib2, iclass 5, count 0 2006.229.10:36:32.19#ibcon#flushed, iclass 5, count 0 2006.229.10:36:32.19#ibcon#about to write, iclass 5, count 0 2006.229.10:36:32.19#ibcon#wrote, iclass 5, count 0 2006.229.10:36:32.19#ibcon#about to read 3, iclass 5, count 0 2006.229.10:36:32.22#ibcon#read 3, iclass 5, count 0 2006.229.10:36:32.22#ibcon#about to read 4, iclass 5, count 0 2006.229.10:36:32.22#ibcon#read 4, iclass 5, count 0 2006.229.10:36:32.22#ibcon#about to read 5, iclass 5, count 0 2006.229.10:36:32.22#ibcon#read 5, iclass 5, count 0 2006.229.10:36:32.22#ibcon#about to read 6, iclass 5, count 0 2006.229.10:36:32.22#ibcon#read 6, iclass 5, count 0 2006.229.10:36:32.22#ibcon#end of sib2, iclass 5, count 0 2006.229.10:36:32.22#ibcon#*after write, iclass 5, count 0 2006.229.10:36:32.22#ibcon#*before return 0, iclass 5, count 0 2006.229.10:36:32.22#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:32.22#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:36:32.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:36:32.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:36:32.22$vck44/vblo=8,744.99 2006.229.10:36:32.22#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.10:36:32.22#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.10:36:32.22#ibcon#ireg 17 cls_cnt 0 2006.229.10:36:32.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:32.22#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:32.22#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:32.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:36:32.22#ibcon#first serial, iclass 7, count 0 2006.229.10:36:32.22#ibcon#enter sib2, iclass 7, count 0 2006.229.10:36:32.22#ibcon#flushed, iclass 7, count 0 2006.229.10:36:32.22#ibcon#about to write, iclass 7, count 0 2006.229.10:36:32.22#ibcon#wrote, iclass 7, count 0 2006.229.10:36:32.22#ibcon#about to read 3, iclass 7, count 0 2006.229.10:36:32.24#ibcon#read 3, iclass 7, count 0 2006.229.10:36:32.24#ibcon#about to read 4, iclass 7, count 0 2006.229.10:36:32.24#ibcon#read 4, iclass 7, count 0 2006.229.10:36:32.24#ibcon#about to read 5, iclass 7, count 0 2006.229.10:36:32.24#ibcon#read 5, iclass 7, count 0 2006.229.10:36:32.24#ibcon#about to read 6, iclass 7, count 0 2006.229.10:36:32.24#ibcon#read 6, iclass 7, count 0 2006.229.10:36:32.24#ibcon#end of sib2, iclass 7, count 0 2006.229.10:36:32.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:36:32.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:36:32.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:36:32.24#ibcon#*before write, iclass 7, count 0 2006.229.10:36:32.24#ibcon#enter sib2, iclass 7, count 0 2006.229.10:36:32.24#ibcon#flushed, iclass 7, count 0 2006.229.10:36:32.24#ibcon#about to write, iclass 7, count 0 2006.229.10:36:32.24#ibcon#wrote, iclass 7, count 0 2006.229.10:36:32.24#ibcon#about to read 3, iclass 7, count 0 2006.229.10:36:32.28#ibcon#read 3, iclass 7, count 0 2006.229.10:36:32.28#ibcon#about to read 4, iclass 7, count 0 2006.229.10:36:32.28#ibcon#read 4, iclass 7, count 0 2006.229.10:36:32.28#ibcon#about to read 5, iclass 7, count 0 2006.229.10:36:32.28#ibcon#read 5, iclass 7, count 0 2006.229.10:36:32.28#ibcon#about to read 6, iclass 7, count 0 2006.229.10:36:32.28#ibcon#read 6, iclass 7, count 0 2006.229.10:36:32.28#ibcon#end of sib2, iclass 7, count 0 2006.229.10:36:32.28#ibcon#*after write, iclass 7, count 0 2006.229.10:36:32.28#ibcon#*before return 0, iclass 7, count 0 2006.229.10:36:32.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:32.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:36:32.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:36:32.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:36:32.28$vck44/vb=8,4 2006.229.10:36:32.28#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.10:36:32.28#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.10:36:32.28#ibcon#ireg 11 cls_cnt 2 2006.229.10:36:32.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:32.34#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:32.34#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:32.34#ibcon#enter wrdev, iclass 11, count 2 2006.229.10:36:32.34#ibcon#first serial, iclass 11, count 2 2006.229.10:36:32.34#ibcon#enter sib2, iclass 11, count 2 2006.229.10:36:32.34#ibcon#flushed, iclass 11, count 2 2006.229.10:36:32.34#ibcon#about to write, iclass 11, count 2 2006.229.10:36:32.34#ibcon#wrote, iclass 11, count 2 2006.229.10:36:32.34#ibcon#about to read 3, iclass 11, count 2 2006.229.10:36:32.36#ibcon#read 3, iclass 11, count 2 2006.229.10:36:32.36#ibcon#about to read 4, iclass 11, count 2 2006.229.10:36:32.36#ibcon#read 4, iclass 11, count 2 2006.229.10:36:32.36#ibcon#about to read 5, iclass 11, count 2 2006.229.10:36:32.36#ibcon#read 5, iclass 11, count 2 2006.229.10:36:32.36#ibcon#about to read 6, iclass 11, count 2 2006.229.10:36:32.36#ibcon#read 6, iclass 11, count 2 2006.229.10:36:32.36#ibcon#end of sib2, iclass 11, count 2 2006.229.10:36:32.36#ibcon#*mode == 0, iclass 11, count 2 2006.229.10:36:32.36#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.10:36:32.36#ibcon#[27=AT08-04\r\n] 2006.229.10:36:32.36#ibcon#*before write, iclass 11, count 2 2006.229.10:36:32.36#ibcon#enter sib2, iclass 11, count 2 2006.229.10:36:32.36#ibcon#flushed, iclass 11, count 2 2006.229.10:36:32.36#ibcon#about to write, iclass 11, count 2 2006.229.10:36:32.36#ibcon#wrote, iclass 11, count 2 2006.229.10:36:32.36#ibcon#about to read 3, iclass 11, count 2 2006.229.10:36:32.39#ibcon#read 3, iclass 11, count 2 2006.229.10:36:32.39#ibcon#about to read 4, iclass 11, count 2 2006.229.10:36:32.39#ibcon#read 4, iclass 11, count 2 2006.229.10:36:32.39#ibcon#about to read 5, iclass 11, count 2 2006.229.10:36:32.39#ibcon#read 5, iclass 11, count 2 2006.229.10:36:32.39#ibcon#about to read 6, iclass 11, count 2 2006.229.10:36:32.39#ibcon#read 6, iclass 11, count 2 2006.229.10:36:32.39#ibcon#end of sib2, iclass 11, count 2 2006.229.10:36:32.39#ibcon#*after write, iclass 11, count 2 2006.229.10:36:32.39#ibcon#*before return 0, iclass 11, count 2 2006.229.10:36:32.39#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:32.39#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:36:32.39#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.10:36:32.39#ibcon#ireg 7 cls_cnt 0 2006.229.10:36:32.39#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:32.51#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:32.51#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:32.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:36:32.51#ibcon#first serial, iclass 11, count 0 2006.229.10:36:32.51#ibcon#enter sib2, iclass 11, count 0 2006.229.10:36:32.51#ibcon#flushed, iclass 11, count 0 2006.229.10:36:32.51#ibcon#about to write, iclass 11, count 0 2006.229.10:36:32.51#ibcon#wrote, iclass 11, count 0 2006.229.10:36:32.51#ibcon#about to read 3, iclass 11, count 0 2006.229.10:36:32.53#ibcon#read 3, iclass 11, count 0 2006.229.10:36:32.53#ibcon#about to read 4, iclass 11, count 0 2006.229.10:36:32.53#ibcon#read 4, iclass 11, count 0 2006.229.10:36:32.53#ibcon#about to read 5, iclass 11, count 0 2006.229.10:36:32.53#ibcon#read 5, iclass 11, count 0 2006.229.10:36:32.53#ibcon#about to read 6, iclass 11, count 0 2006.229.10:36:32.53#ibcon#read 6, iclass 11, count 0 2006.229.10:36:32.53#ibcon#end of sib2, iclass 11, count 0 2006.229.10:36:32.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:36:32.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:36:32.53#ibcon#[27=USB\r\n] 2006.229.10:36:32.53#ibcon#*before write, iclass 11, count 0 2006.229.10:36:32.53#ibcon#enter sib2, iclass 11, count 0 2006.229.10:36:32.53#ibcon#flushed, iclass 11, count 0 2006.229.10:36:32.53#ibcon#about to write, iclass 11, count 0 2006.229.10:36:32.53#ibcon#wrote, iclass 11, count 0 2006.229.10:36:32.53#ibcon#about to read 3, iclass 11, count 0 2006.229.10:36:32.56#ibcon#read 3, iclass 11, count 0 2006.229.10:36:32.56#ibcon#about to read 4, iclass 11, count 0 2006.229.10:36:32.56#ibcon#read 4, iclass 11, count 0 2006.229.10:36:32.56#ibcon#about to read 5, iclass 11, count 0 2006.229.10:36:32.56#ibcon#read 5, iclass 11, count 0 2006.229.10:36:32.56#ibcon#about to read 6, iclass 11, count 0 2006.229.10:36:32.56#ibcon#read 6, iclass 11, count 0 2006.229.10:36:32.56#ibcon#end of sib2, iclass 11, count 0 2006.229.10:36:32.56#ibcon#*after write, iclass 11, count 0 2006.229.10:36:32.56#ibcon#*before return 0, iclass 11, count 0 2006.229.10:36:32.56#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:32.56#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:36:32.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:36:32.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:36:32.56$vck44/vabw=wide 2006.229.10:36:32.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.10:36:32.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.10:36:32.56#ibcon#ireg 8 cls_cnt 0 2006.229.10:36:32.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:32.56#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:32.56#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:32.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:36:32.56#ibcon#first serial, iclass 13, count 0 2006.229.10:36:32.56#ibcon#enter sib2, iclass 13, count 0 2006.229.10:36:32.56#ibcon#flushed, iclass 13, count 0 2006.229.10:36:32.56#ibcon#about to write, iclass 13, count 0 2006.229.10:36:32.56#ibcon#wrote, iclass 13, count 0 2006.229.10:36:32.56#ibcon#about to read 3, iclass 13, count 0 2006.229.10:36:32.58#ibcon#read 3, iclass 13, count 0 2006.229.10:36:32.58#ibcon#about to read 4, iclass 13, count 0 2006.229.10:36:32.58#ibcon#read 4, iclass 13, count 0 2006.229.10:36:32.58#ibcon#about to read 5, iclass 13, count 0 2006.229.10:36:32.58#ibcon#read 5, iclass 13, count 0 2006.229.10:36:32.58#ibcon#about to read 6, iclass 13, count 0 2006.229.10:36:32.58#ibcon#read 6, iclass 13, count 0 2006.229.10:36:32.58#ibcon#end of sib2, iclass 13, count 0 2006.229.10:36:32.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:36:32.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:36:32.58#ibcon#[25=BW32\r\n] 2006.229.10:36:32.58#ibcon#*before write, iclass 13, count 0 2006.229.10:36:32.58#ibcon#enter sib2, iclass 13, count 0 2006.229.10:36:32.58#ibcon#flushed, iclass 13, count 0 2006.229.10:36:32.58#ibcon#about to write, iclass 13, count 0 2006.229.10:36:32.58#ibcon#wrote, iclass 13, count 0 2006.229.10:36:32.58#ibcon#about to read 3, iclass 13, count 0 2006.229.10:36:32.61#ibcon#read 3, iclass 13, count 0 2006.229.10:36:32.61#ibcon#about to read 4, iclass 13, count 0 2006.229.10:36:32.61#ibcon#read 4, iclass 13, count 0 2006.229.10:36:32.61#ibcon#about to read 5, iclass 13, count 0 2006.229.10:36:32.61#ibcon#read 5, iclass 13, count 0 2006.229.10:36:32.61#ibcon#about to read 6, iclass 13, count 0 2006.229.10:36:32.61#ibcon#read 6, iclass 13, count 0 2006.229.10:36:32.61#ibcon#end of sib2, iclass 13, count 0 2006.229.10:36:32.61#ibcon#*after write, iclass 13, count 0 2006.229.10:36:32.61#ibcon#*before return 0, iclass 13, count 0 2006.229.10:36:32.61#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:32.61#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:36:32.61#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:36:32.61#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:36:32.61$vck44/vbbw=wide 2006.229.10:36:32.61#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.10:36:32.61#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.10:36:32.61#ibcon#ireg 8 cls_cnt 0 2006.229.10:36:32.61#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:36:32.68#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:36:32.68#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:36:32.68#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:36:32.68#ibcon#first serial, iclass 15, count 0 2006.229.10:36:32.68#ibcon#enter sib2, iclass 15, count 0 2006.229.10:36:32.68#ibcon#flushed, iclass 15, count 0 2006.229.10:36:32.68#ibcon#about to write, iclass 15, count 0 2006.229.10:36:32.68#ibcon#wrote, iclass 15, count 0 2006.229.10:36:32.68#ibcon#about to read 3, iclass 15, count 0 2006.229.10:36:32.70#ibcon#read 3, iclass 15, count 0 2006.229.10:36:32.70#ibcon#about to read 4, iclass 15, count 0 2006.229.10:36:32.70#ibcon#read 4, iclass 15, count 0 2006.229.10:36:32.70#ibcon#about to read 5, iclass 15, count 0 2006.229.10:36:32.70#ibcon#read 5, iclass 15, count 0 2006.229.10:36:32.70#ibcon#about to read 6, iclass 15, count 0 2006.229.10:36:32.70#ibcon#read 6, iclass 15, count 0 2006.229.10:36:32.70#ibcon#end of sib2, iclass 15, count 0 2006.229.10:36:32.70#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:36:32.70#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:36:32.70#ibcon#[27=BW32\r\n] 2006.229.10:36:32.70#ibcon#*before write, iclass 15, count 0 2006.229.10:36:32.70#ibcon#enter sib2, iclass 15, count 0 2006.229.10:36:32.70#ibcon#flushed, iclass 15, count 0 2006.229.10:36:32.70#ibcon#about to write, iclass 15, count 0 2006.229.10:36:32.70#ibcon#wrote, iclass 15, count 0 2006.229.10:36:32.70#ibcon#about to read 3, iclass 15, count 0 2006.229.10:36:32.73#ibcon#read 3, iclass 15, count 0 2006.229.10:36:32.73#ibcon#about to read 4, iclass 15, count 0 2006.229.10:36:32.73#ibcon#read 4, iclass 15, count 0 2006.229.10:36:32.73#ibcon#about to read 5, iclass 15, count 0 2006.229.10:36:32.73#ibcon#read 5, iclass 15, count 0 2006.229.10:36:32.73#ibcon#about to read 6, iclass 15, count 0 2006.229.10:36:32.73#ibcon#read 6, iclass 15, count 0 2006.229.10:36:32.73#ibcon#end of sib2, iclass 15, count 0 2006.229.10:36:32.73#ibcon#*after write, iclass 15, count 0 2006.229.10:36:32.73#ibcon#*before return 0, iclass 15, count 0 2006.229.10:36:32.73#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:36:32.73#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.10:36:32.73#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:36:32.73#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:36:32.73$setupk4/ifdk4 2006.229.10:36:32.73$ifdk4/lo= 2006.229.10:36:32.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:36:32.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:36:32.73$ifdk4/patch= 2006.229.10:36:32.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:36:32.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:36:32.74$setupk4/!*+20s 2006.229.10:36:40.18#abcon#<5=/04 1.5 2.4 28.48 981001.6\r\n> 2006.229.10:36:40.20#abcon#{5=INTERFACE CLEAR} 2006.229.10:36:40.26#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:36:47.25$setupk4/"tpicd 2006.229.10:36:47.25$setupk4/echo=off 2006.229.10:36:47.25$setupk4/xlog=off 2006.229.10:36:47.25:!2006.229.10:37:37 2006.229.10:36:51.14#trakl#Source acquired 2006.229.10:36:52.14#flagr#flagr/antenna,acquired 2006.229.10:37:37.00:preob 2006.229.10:37:38.13/onsource/TRACKING 2006.229.10:37:38.13:!2006.229.10:37:47 2006.229.10:37:47.00:"tape 2006.229.10:37:47.00:"st=record 2006.229.10:37:47.00:data_valid=on 2006.229.10:37:47.00:midob 2006.229.10:37:47.13/onsource/TRACKING 2006.229.10:37:47.13/wx/28.47,1001.6,99 2006.229.10:37:47.34/cable/+6.4030E-03 2006.229.10:37:48.43/va/01,08,usb,yes,33,35 2006.229.10:37:48.43/va/02,07,usb,yes,36,36 2006.229.10:37:48.43/va/03,06,usb,yes,44,47 2006.229.10:37:48.43/va/04,07,usb,yes,37,38 2006.229.10:37:48.43/va/05,04,usb,yes,33,33 2006.229.10:37:48.43/va/06,04,usb,yes,37,36 2006.229.10:37:48.43/va/07,05,usb,yes,33,33 2006.229.10:37:48.43/va/08,06,usb,yes,24,29 2006.229.10:37:48.66/valo/01,524.99,yes,locked 2006.229.10:37:48.66/valo/02,534.99,yes,locked 2006.229.10:37:48.66/valo/03,564.99,yes,locked 2006.229.10:37:48.66/valo/04,624.99,yes,locked 2006.229.10:37:48.66/valo/05,734.99,yes,locked 2006.229.10:37:48.66/valo/06,814.99,yes,locked 2006.229.10:37:48.66/valo/07,864.99,yes,locked 2006.229.10:37:48.66/valo/08,884.99,yes,locked 2006.229.10:37:49.75/vb/01,04,usb,yes,33,30 2006.229.10:37:49.75/vb/02,04,usb,yes,35,35 2006.229.10:37:49.75/vb/03,04,usb,yes,32,35 2006.229.10:37:49.75/vb/04,04,usb,yes,37,35 2006.229.10:37:49.75/vb/05,04,usb,yes,29,31 2006.229.10:37:49.75/vb/06,04,usb,yes,33,29 2006.229.10:37:49.75/vb/07,04,usb,yes,33,33 2006.229.10:37:49.75/vb/08,04,usb,yes,30,34 2006.229.10:37:49.99/vblo/01,629.99,yes,locked 2006.229.10:37:49.99/vblo/02,634.99,yes,locked 2006.229.10:37:49.99/vblo/03,649.99,yes,locked 2006.229.10:37:49.99/vblo/04,679.99,yes,locked 2006.229.10:37:49.99/vblo/05,709.99,yes,locked 2006.229.10:37:49.99/vblo/06,719.99,yes,locked 2006.229.10:37:49.99/vblo/07,734.99,yes,locked 2006.229.10:37:49.99/vblo/08,744.99,yes,locked 2006.229.10:37:50.14/vabw/8 2006.229.10:37:50.29/vbbw/8 2006.229.10:37:50.38/xfe/off,on,12.0 2006.229.10:37:50.77/ifatt/23,28,28,28 2006.229.10:37:51.07/fmout-gps/S +4.45E-07 2006.229.10:37:51.11:!2006.229.10:38:27 2006.229.10:38:27.00:data_valid=off 2006.229.10:38:27.00:"et 2006.229.10:38:27.00:!+3s 2006.229.10:38:30.01:"tape 2006.229.10:38:30.01:postob 2006.229.10:38:30.10/cable/+6.4060E-03 2006.229.10:38:30.10/wx/28.46,1001.6,99 2006.229.10:38:31.07/fmout-gps/S +4.47E-07 2006.229.10:38:31.07:scan_name=229-1044,jd0608,150 2006.229.10:38:31.07:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.10:38:32.13#flagr#flagr/antenna,new-source 2006.229.10:38:32.13:checkk5 2006.229.10:38:32.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:38:32.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:38:33.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:38:33.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:38:34.13/chk_obsdata//k5ts1/T2291037??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.10:38:34.54/chk_obsdata//k5ts2/T2291037??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.10:38:34.94/chk_obsdata//k5ts3/T2291037??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.10:38:35.34/chk_obsdata//k5ts4/T2291037??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.10:38:36.08/k5log//k5ts1_log_newline 2006.229.10:38:36.77/k5log//k5ts2_log_newline 2006.229.10:38:37.48/k5log//k5ts3_log_newline 2006.229.10:38:38.20/k5log//k5ts4_log_newline 2006.229.10:38:38.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:38:38.22:setupk4=1 2006.229.10:38:38.22$setupk4/echo=on 2006.229.10:38:38.22$setupk4/pcalon 2006.229.10:38:38.22$pcalon/"no phase cal control is implemented here 2006.229.10:38:38.22$setupk4/"tpicd=stop 2006.229.10:38:38.22$setupk4/"rec=synch_on 2006.229.10:38:38.22$setupk4/"rec_mode=128 2006.229.10:38:38.22$setupk4/!* 2006.229.10:38:38.22$setupk4/recpk4 2006.229.10:38:38.22$recpk4/recpatch= 2006.229.10:38:38.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:38:38.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:38:38.23$setupk4/vck44 2006.229.10:38:38.23$vck44/valo=1,524.99 2006.229.10:38:38.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.10:38:38.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.10:38:38.23#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:38.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:38.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:38.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:38.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:38:38.23#ibcon#first serial, iclass 32, count 0 2006.229.10:38:38.23#ibcon#enter sib2, iclass 32, count 0 2006.229.10:38:38.23#ibcon#flushed, iclass 32, count 0 2006.229.10:38:38.23#ibcon#about to write, iclass 32, count 0 2006.229.10:38:38.23#ibcon#wrote, iclass 32, count 0 2006.229.10:38:38.23#ibcon#about to read 3, iclass 32, count 0 2006.229.10:38:38.24#ibcon#read 3, iclass 32, count 0 2006.229.10:38:38.24#ibcon#about to read 4, iclass 32, count 0 2006.229.10:38:38.24#ibcon#read 4, iclass 32, count 0 2006.229.10:38:38.24#ibcon#about to read 5, iclass 32, count 0 2006.229.10:38:38.24#ibcon#read 5, iclass 32, count 0 2006.229.10:38:38.24#ibcon#about to read 6, iclass 32, count 0 2006.229.10:38:38.24#ibcon#read 6, iclass 32, count 0 2006.229.10:38:38.24#ibcon#end of sib2, iclass 32, count 0 2006.229.10:38:38.24#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:38:38.24#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:38:38.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:38:38.24#ibcon#*before write, iclass 32, count 0 2006.229.10:38:38.24#ibcon#enter sib2, iclass 32, count 0 2006.229.10:38:38.24#ibcon#flushed, iclass 32, count 0 2006.229.10:38:38.24#ibcon#about to write, iclass 32, count 0 2006.229.10:38:38.24#ibcon#wrote, iclass 32, count 0 2006.229.10:38:38.24#ibcon#about to read 3, iclass 32, count 0 2006.229.10:38:38.29#ibcon#read 3, iclass 32, count 0 2006.229.10:38:38.29#ibcon#about to read 4, iclass 32, count 0 2006.229.10:38:38.29#ibcon#read 4, iclass 32, count 0 2006.229.10:38:38.29#ibcon#about to read 5, iclass 32, count 0 2006.229.10:38:38.29#ibcon#read 5, iclass 32, count 0 2006.229.10:38:38.29#ibcon#about to read 6, iclass 32, count 0 2006.229.10:38:38.29#ibcon#read 6, iclass 32, count 0 2006.229.10:38:38.29#ibcon#end of sib2, iclass 32, count 0 2006.229.10:38:38.29#ibcon#*after write, iclass 32, count 0 2006.229.10:38:38.29#ibcon#*before return 0, iclass 32, count 0 2006.229.10:38:38.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:38.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:38.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:38:38.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:38:38.29$vck44/va=1,8 2006.229.10:38:38.29#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.10:38:38.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.10:38:38.29#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:38.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:38.29#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:38.29#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:38.29#ibcon#enter wrdev, iclass 34, count 2 2006.229.10:38:38.29#ibcon#first serial, iclass 34, count 2 2006.229.10:38:38.29#ibcon#enter sib2, iclass 34, count 2 2006.229.10:38:38.29#ibcon#flushed, iclass 34, count 2 2006.229.10:38:38.29#ibcon#about to write, iclass 34, count 2 2006.229.10:38:38.29#ibcon#wrote, iclass 34, count 2 2006.229.10:38:38.29#ibcon#about to read 3, iclass 34, count 2 2006.229.10:38:38.31#ibcon#read 3, iclass 34, count 2 2006.229.10:38:38.31#ibcon#about to read 4, iclass 34, count 2 2006.229.10:38:38.31#ibcon#read 4, iclass 34, count 2 2006.229.10:38:38.31#ibcon#about to read 5, iclass 34, count 2 2006.229.10:38:38.31#ibcon#read 5, iclass 34, count 2 2006.229.10:38:38.31#ibcon#about to read 6, iclass 34, count 2 2006.229.10:38:38.31#ibcon#read 6, iclass 34, count 2 2006.229.10:38:38.31#ibcon#end of sib2, iclass 34, count 2 2006.229.10:38:38.31#ibcon#*mode == 0, iclass 34, count 2 2006.229.10:38:38.31#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.10:38:38.31#ibcon#[25=AT01-08\r\n] 2006.229.10:38:38.31#ibcon#*before write, iclass 34, count 2 2006.229.10:38:38.31#ibcon#enter sib2, iclass 34, count 2 2006.229.10:38:38.31#ibcon#flushed, iclass 34, count 2 2006.229.10:38:38.31#ibcon#about to write, iclass 34, count 2 2006.229.10:38:38.31#ibcon#wrote, iclass 34, count 2 2006.229.10:38:38.31#ibcon#about to read 3, iclass 34, count 2 2006.229.10:38:38.34#ibcon#read 3, iclass 34, count 2 2006.229.10:38:38.34#ibcon#about to read 4, iclass 34, count 2 2006.229.10:38:38.34#ibcon#read 4, iclass 34, count 2 2006.229.10:38:38.34#ibcon#about to read 5, iclass 34, count 2 2006.229.10:38:38.34#ibcon#read 5, iclass 34, count 2 2006.229.10:38:38.34#ibcon#about to read 6, iclass 34, count 2 2006.229.10:38:38.34#ibcon#read 6, iclass 34, count 2 2006.229.10:38:38.34#ibcon#end of sib2, iclass 34, count 2 2006.229.10:38:38.34#ibcon#*after write, iclass 34, count 2 2006.229.10:38:38.34#ibcon#*before return 0, iclass 34, count 2 2006.229.10:38:38.34#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:38.34#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:38.34#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.10:38:38.34#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:38.34#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:38.46#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:38.46#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:38.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:38:38.46#ibcon#first serial, iclass 34, count 0 2006.229.10:38:38.46#ibcon#enter sib2, iclass 34, count 0 2006.229.10:38:38.46#ibcon#flushed, iclass 34, count 0 2006.229.10:38:38.46#ibcon#about to write, iclass 34, count 0 2006.229.10:38:38.46#ibcon#wrote, iclass 34, count 0 2006.229.10:38:38.46#ibcon#about to read 3, iclass 34, count 0 2006.229.10:38:38.48#ibcon#read 3, iclass 34, count 0 2006.229.10:38:38.48#ibcon#about to read 4, iclass 34, count 0 2006.229.10:38:38.48#ibcon#read 4, iclass 34, count 0 2006.229.10:38:38.48#ibcon#about to read 5, iclass 34, count 0 2006.229.10:38:38.48#ibcon#read 5, iclass 34, count 0 2006.229.10:38:38.48#ibcon#about to read 6, iclass 34, count 0 2006.229.10:38:38.48#ibcon#read 6, iclass 34, count 0 2006.229.10:38:38.48#ibcon#end of sib2, iclass 34, count 0 2006.229.10:38:38.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:38:38.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:38:38.48#ibcon#[25=USB\r\n] 2006.229.10:38:38.48#ibcon#*before write, iclass 34, count 0 2006.229.10:38:38.48#ibcon#enter sib2, iclass 34, count 0 2006.229.10:38:38.48#ibcon#flushed, iclass 34, count 0 2006.229.10:38:38.48#ibcon#about to write, iclass 34, count 0 2006.229.10:38:38.48#ibcon#wrote, iclass 34, count 0 2006.229.10:38:38.48#ibcon#about to read 3, iclass 34, count 0 2006.229.10:38:38.51#ibcon#read 3, iclass 34, count 0 2006.229.10:38:38.51#ibcon#about to read 4, iclass 34, count 0 2006.229.10:38:38.51#ibcon#read 4, iclass 34, count 0 2006.229.10:38:38.51#ibcon#about to read 5, iclass 34, count 0 2006.229.10:38:38.51#ibcon#read 5, iclass 34, count 0 2006.229.10:38:38.51#ibcon#about to read 6, iclass 34, count 0 2006.229.10:38:38.51#ibcon#read 6, iclass 34, count 0 2006.229.10:38:38.51#ibcon#end of sib2, iclass 34, count 0 2006.229.10:38:38.51#ibcon#*after write, iclass 34, count 0 2006.229.10:38:38.51#ibcon#*before return 0, iclass 34, count 0 2006.229.10:38:38.51#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:38.51#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:38.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:38:38.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:38:38.51$vck44/valo=2,534.99 2006.229.10:38:38.51#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:38:38.51#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:38:38.51#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:38.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:38.51#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:38.51#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:38.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:38:38.51#ibcon#first serial, iclass 36, count 0 2006.229.10:38:38.51#ibcon#enter sib2, iclass 36, count 0 2006.229.10:38:38.51#ibcon#flushed, iclass 36, count 0 2006.229.10:38:38.51#ibcon#about to write, iclass 36, count 0 2006.229.10:38:38.51#ibcon#wrote, iclass 36, count 0 2006.229.10:38:38.51#ibcon#about to read 3, iclass 36, count 0 2006.229.10:38:38.53#ibcon#read 3, iclass 36, count 0 2006.229.10:38:38.53#ibcon#about to read 4, iclass 36, count 0 2006.229.10:38:38.53#ibcon#read 4, iclass 36, count 0 2006.229.10:38:38.53#ibcon#about to read 5, iclass 36, count 0 2006.229.10:38:38.53#ibcon#read 5, iclass 36, count 0 2006.229.10:38:38.53#ibcon#about to read 6, iclass 36, count 0 2006.229.10:38:38.53#ibcon#read 6, iclass 36, count 0 2006.229.10:38:38.53#ibcon#end of sib2, iclass 36, count 0 2006.229.10:38:38.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:38:38.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:38:38.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:38:38.53#ibcon#*before write, iclass 36, count 0 2006.229.10:38:38.53#ibcon#enter sib2, iclass 36, count 0 2006.229.10:38:38.53#ibcon#flushed, iclass 36, count 0 2006.229.10:38:38.53#ibcon#about to write, iclass 36, count 0 2006.229.10:38:38.53#ibcon#wrote, iclass 36, count 0 2006.229.10:38:38.53#ibcon#about to read 3, iclass 36, count 0 2006.229.10:38:38.57#ibcon#read 3, iclass 36, count 0 2006.229.10:38:38.57#ibcon#about to read 4, iclass 36, count 0 2006.229.10:38:38.57#ibcon#read 4, iclass 36, count 0 2006.229.10:38:38.57#ibcon#about to read 5, iclass 36, count 0 2006.229.10:38:38.57#ibcon#read 5, iclass 36, count 0 2006.229.10:38:38.57#ibcon#about to read 6, iclass 36, count 0 2006.229.10:38:38.57#ibcon#read 6, iclass 36, count 0 2006.229.10:38:38.57#ibcon#end of sib2, iclass 36, count 0 2006.229.10:38:38.57#ibcon#*after write, iclass 36, count 0 2006.229.10:38:38.57#ibcon#*before return 0, iclass 36, count 0 2006.229.10:38:38.57#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:38.57#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:38.57#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:38:38.57#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:38:38.57$vck44/va=2,7 2006.229.10:38:38.57#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.10:38:38.57#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.10:38:38.57#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:38.57#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:38.63#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:38.63#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:38.63#ibcon#enter wrdev, iclass 38, count 2 2006.229.10:38:38.63#ibcon#first serial, iclass 38, count 2 2006.229.10:38:38.63#ibcon#enter sib2, iclass 38, count 2 2006.229.10:38:38.63#ibcon#flushed, iclass 38, count 2 2006.229.10:38:38.63#ibcon#about to write, iclass 38, count 2 2006.229.10:38:38.63#ibcon#wrote, iclass 38, count 2 2006.229.10:38:38.63#ibcon#about to read 3, iclass 38, count 2 2006.229.10:38:38.65#ibcon#read 3, iclass 38, count 2 2006.229.10:38:38.65#ibcon#about to read 4, iclass 38, count 2 2006.229.10:38:38.65#ibcon#read 4, iclass 38, count 2 2006.229.10:38:38.65#ibcon#about to read 5, iclass 38, count 2 2006.229.10:38:38.65#ibcon#read 5, iclass 38, count 2 2006.229.10:38:38.65#ibcon#about to read 6, iclass 38, count 2 2006.229.10:38:38.65#ibcon#read 6, iclass 38, count 2 2006.229.10:38:38.65#ibcon#end of sib2, iclass 38, count 2 2006.229.10:38:38.65#ibcon#*mode == 0, iclass 38, count 2 2006.229.10:38:38.65#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.10:38:38.65#ibcon#[25=AT02-07\r\n] 2006.229.10:38:38.65#ibcon#*before write, iclass 38, count 2 2006.229.10:38:38.65#ibcon#enter sib2, iclass 38, count 2 2006.229.10:38:38.65#ibcon#flushed, iclass 38, count 2 2006.229.10:38:38.65#ibcon#about to write, iclass 38, count 2 2006.229.10:38:38.65#ibcon#wrote, iclass 38, count 2 2006.229.10:38:38.65#ibcon#about to read 3, iclass 38, count 2 2006.229.10:38:38.68#ibcon#read 3, iclass 38, count 2 2006.229.10:38:38.68#ibcon#about to read 4, iclass 38, count 2 2006.229.10:38:38.68#ibcon#read 4, iclass 38, count 2 2006.229.10:38:38.68#ibcon#about to read 5, iclass 38, count 2 2006.229.10:38:38.68#ibcon#read 5, iclass 38, count 2 2006.229.10:38:38.68#ibcon#about to read 6, iclass 38, count 2 2006.229.10:38:38.68#ibcon#read 6, iclass 38, count 2 2006.229.10:38:38.68#ibcon#end of sib2, iclass 38, count 2 2006.229.10:38:38.68#ibcon#*after write, iclass 38, count 2 2006.229.10:38:38.68#ibcon#*before return 0, iclass 38, count 2 2006.229.10:38:38.68#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:38.68#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:38.68#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.10:38:38.68#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:38.68#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:38.80#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:38.80#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:38.80#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:38:38.80#ibcon#first serial, iclass 38, count 0 2006.229.10:38:38.80#ibcon#enter sib2, iclass 38, count 0 2006.229.10:38:38.80#ibcon#flushed, iclass 38, count 0 2006.229.10:38:38.80#ibcon#about to write, iclass 38, count 0 2006.229.10:38:38.80#ibcon#wrote, iclass 38, count 0 2006.229.10:38:38.80#ibcon#about to read 3, iclass 38, count 0 2006.229.10:38:38.82#ibcon#read 3, iclass 38, count 0 2006.229.10:38:38.82#ibcon#about to read 4, iclass 38, count 0 2006.229.10:38:38.82#ibcon#read 4, iclass 38, count 0 2006.229.10:38:38.82#ibcon#about to read 5, iclass 38, count 0 2006.229.10:38:38.82#ibcon#read 5, iclass 38, count 0 2006.229.10:38:38.82#ibcon#about to read 6, iclass 38, count 0 2006.229.10:38:38.82#ibcon#read 6, iclass 38, count 0 2006.229.10:38:38.82#ibcon#end of sib2, iclass 38, count 0 2006.229.10:38:38.82#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:38:38.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:38:38.82#ibcon#[25=USB\r\n] 2006.229.10:38:38.82#ibcon#*before write, iclass 38, count 0 2006.229.10:38:38.82#ibcon#enter sib2, iclass 38, count 0 2006.229.10:38:38.82#ibcon#flushed, iclass 38, count 0 2006.229.10:38:38.82#ibcon#about to write, iclass 38, count 0 2006.229.10:38:38.82#ibcon#wrote, iclass 38, count 0 2006.229.10:38:38.82#ibcon#about to read 3, iclass 38, count 0 2006.229.10:38:38.85#ibcon#read 3, iclass 38, count 0 2006.229.10:38:38.85#ibcon#about to read 4, iclass 38, count 0 2006.229.10:38:38.85#ibcon#read 4, iclass 38, count 0 2006.229.10:38:38.85#ibcon#about to read 5, iclass 38, count 0 2006.229.10:38:38.85#ibcon#read 5, iclass 38, count 0 2006.229.10:38:38.85#ibcon#about to read 6, iclass 38, count 0 2006.229.10:38:38.85#ibcon#read 6, iclass 38, count 0 2006.229.10:38:38.85#ibcon#end of sib2, iclass 38, count 0 2006.229.10:38:38.85#ibcon#*after write, iclass 38, count 0 2006.229.10:38:38.85#ibcon#*before return 0, iclass 38, count 0 2006.229.10:38:38.85#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:38.85#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:38.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:38:38.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:38:38.85$vck44/valo=3,564.99 2006.229.10:38:38.85#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.10:38:38.85#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.10:38:38.85#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:38.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:38.85#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:38.85#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:38.85#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:38:38.85#ibcon#first serial, iclass 40, count 0 2006.229.10:38:38.85#ibcon#enter sib2, iclass 40, count 0 2006.229.10:38:38.85#ibcon#flushed, iclass 40, count 0 2006.229.10:38:38.85#ibcon#about to write, iclass 40, count 0 2006.229.10:38:38.85#ibcon#wrote, iclass 40, count 0 2006.229.10:38:38.85#ibcon#about to read 3, iclass 40, count 0 2006.229.10:38:38.87#ibcon#read 3, iclass 40, count 0 2006.229.10:38:38.87#ibcon#about to read 4, iclass 40, count 0 2006.229.10:38:38.87#ibcon#read 4, iclass 40, count 0 2006.229.10:38:38.87#ibcon#about to read 5, iclass 40, count 0 2006.229.10:38:38.87#ibcon#read 5, iclass 40, count 0 2006.229.10:38:38.87#ibcon#about to read 6, iclass 40, count 0 2006.229.10:38:38.87#ibcon#read 6, iclass 40, count 0 2006.229.10:38:38.87#ibcon#end of sib2, iclass 40, count 0 2006.229.10:38:38.87#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:38:38.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:38:38.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:38:38.87#ibcon#*before write, iclass 40, count 0 2006.229.10:38:38.87#ibcon#enter sib2, iclass 40, count 0 2006.229.10:38:38.87#ibcon#flushed, iclass 40, count 0 2006.229.10:38:38.87#ibcon#about to write, iclass 40, count 0 2006.229.10:38:38.87#ibcon#wrote, iclass 40, count 0 2006.229.10:38:38.87#ibcon#about to read 3, iclass 40, count 0 2006.229.10:38:38.91#ibcon#read 3, iclass 40, count 0 2006.229.10:38:38.91#ibcon#about to read 4, iclass 40, count 0 2006.229.10:38:38.91#ibcon#read 4, iclass 40, count 0 2006.229.10:38:38.91#ibcon#about to read 5, iclass 40, count 0 2006.229.10:38:38.91#ibcon#read 5, iclass 40, count 0 2006.229.10:38:38.91#ibcon#about to read 6, iclass 40, count 0 2006.229.10:38:38.91#ibcon#read 6, iclass 40, count 0 2006.229.10:38:38.91#ibcon#end of sib2, iclass 40, count 0 2006.229.10:38:38.91#ibcon#*after write, iclass 40, count 0 2006.229.10:38:38.91#ibcon#*before return 0, iclass 40, count 0 2006.229.10:38:38.91#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:38.91#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:38.91#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:38:38.91#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:38:38.91$vck44/va=3,6 2006.229.10:38:38.91#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.10:38:38.91#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.10:38:38.91#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:38.91#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:38.97#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:38.97#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:38.97#ibcon#enter wrdev, iclass 4, count 2 2006.229.10:38:38.97#ibcon#first serial, iclass 4, count 2 2006.229.10:38:38.97#ibcon#enter sib2, iclass 4, count 2 2006.229.10:38:38.97#ibcon#flushed, iclass 4, count 2 2006.229.10:38:38.97#ibcon#about to write, iclass 4, count 2 2006.229.10:38:38.97#ibcon#wrote, iclass 4, count 2 2006.229.10:38:38.97#ibcon#about to read 3, iclass 4, count 2 2006.229.10:38:38.99#ibcon#read 3, iclass 4, count 2 2006.229.10:38:38.99#ibcon#about to read 4, iclass 4, count 2 2006.229.10:38:38.99#ibcon#read 4, iclass 4, count 2 2006.229.10:38:38.99#ibcon#about to read 5, iclass 4, count 2 2006.229.10:38:38.99#ibcon#read 5, iclass 4, count 2 2006.229.10:38:38.99#ibcon#about to read 6, iclass 4, count 2 2006.229.10:38:38.99#ibcon#read 6, iclass 4, count 2 2006.229.10:38:38.99#ibcon#end of sib2, iclass 4, count 2 2006.229.10:38:38.99#ibcon#*mode == 0, iclass 4, count 2 2006.229.10:38:38.99#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.10:38:38.99#ibcon#[25=AT03-06\r\n] 2006.229.10:38:38.99#ibcon#*before write, iclass 4, count 2 2006.229.10:38:38.99#ibcon#enter sib2, iclass 4, count 2 2006.229.10:38:38.99#ibcon#flushed, iclass 4, count 2 2006.229.10:38:38.99#ibcon#about to write, iclass 4, count 2 2006.229.10:38:38.99#ibcon#wrote, iclass 4, count 2 2006.229.10:38:38.99#ibcon#about to read 3, iclass 4, count 2 2006.229.10:38:39.02#ibcon#read 3, iclass 4, count 2 2006.229.10:38:39.02#ibcon#about to read 4, iclass 4, count 2 2006.229.10:38:39.02#ibcon#read 4, iclass 4, count 2 2006.229.10:38:39.02#ibcon#about to read 5, iclass 4, count 2 2006.229.10:38:39.02#ibcon#read 5, iclass 4, count 2 2006.229.10:38:39.02#ibcon#about to read 6, iclass 4, count 2 2006.229.10:38:39.02#ibcon#read 6, iclass 4, count 2 2006.229.10:38:39.02#ibcon#end of sib2, iclass 4, count 2 2006.229.10:38:39.02#ibcon#*after write, iclass 4, count 2 2006.229.10:38:39.02#ibcon#*before return 0, iclass 4, count 2 2006.229.10:38:39.02#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:39.02#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:39.02#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.10:38:39.02#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:39.02#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:39.14#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:39.14#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:39.14#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:38:39.14#ibcon#first serial, iclass 4, count 0 2006.229.10:38:39.14#ibcon#enter sib2, iclass 4, count 0 2006.229.10:38:39.14#ibcon#flushed, iclass 4, count 0 2006.229.10:38:39.14#ibcon#about to write, iclass 4, count 0 2006.229.10:38:39.14#ibcon#wrote, iclass 4, count 0 2006.229.10:38:39.14#ibcon#about to read 3, iclass 4, count 0 2006.229.10:38:39.16#ibcon#read 3, iclass 4, count 0 2006.229.10:38:39.16#ibcon#about to read 4, iclass 4, count 0 2006.229.10:38:39.16#ibcon#read 4, iclass 4, count 0 2006.229.10:38:39.16#ibcon#about to read 5, iclass 4, count 0 2006.229.10:38:39.16#ibcon#read 5, iclass 4, count 0 2006.229.10:38:39.16#ibcon#about to read 6, iclass 4, count 0 2006.229.10:38:39.16#ibcon#read 6, iclass 4, count 0 2006.229.10:38:39.16#ibcon#end of sib2, iclass 4, count 0 2006.229.10:38:39.16#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:38:39.16#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:38:39.16#ibcon#[25=USB\r\n] 2006.229.10:38:39.16#ibcon#*before write, iclass 4, count 0 2006.229.10:38:39.16#ibcon#enter sib2, iclass 4, count 0 2006.229.10:38:39.16#ibcon#flushed, iclass 4, count 0 2006.229.10:38:39.16#ibcon#about to write, iclass 4, count 0 2006.229.10:38:39.16#ibcon#wrote, iclass 4, count 0 2006.229.10:38:39.16#ibcon#about to read 3, iclass 4, count 0 2006.229.10:38:39.19#ibcon#read 3, iclass 4, count 0 2006.229.10:38:39.19#ibcon#about to read 4, iclass 4, count 0 2006.229.10:38:39.19#ibcon#read 4, iclass 4, count 0 2006.229.10:38:39.19#ibcon#about to read 5, iclass 4, count 0 2006.229.10:38:39.19#ibcon#read 5, iclass 4, count 0 2006.229.10:38:39.19#ibcon#about to read 6, iclass 4, count 0 2006.229.10:38:39.19#ibcon#read 6, iclass 4, count 0 2006.229.10:38:39.19#ibcon#end of sib2, iclass 4, count 0 2006.229.10:38:39.19#ibcon#*after write, iclass 4, count 0 2006.229.10:38:39.19#ibcon#*before return 0, iclass 4, count 0 2006.229.10:38:39.19#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:39.19#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:39.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:38:39.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:38:39.19$vck44/valo=4,624.99 2006.229.10:38:39.19#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.10:38:39.19#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.10:38:39.19#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:39.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:38:39.19#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:38:39.19#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:38:39.19#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:38:39.19#ibcon#first serial, iclass 6, count 0 2006.229.10:38:39.19#ibcon#enter sib2, iclass 6, count 0 2006.229.10:38:39.19#ibcon#flushed, iclass 6, count 0 2006.229.10:38:39.19#ibcon#about to write, iclass 6, count 0 2006.229.10:38:39.19#ibcon#wrote, iclass 6, count 0 2006.229.10:38:39.19#ibcon#about to read 3, iclass 6, count 0 2006.229.10:38:39.21#ibcon#read 3, iclass 6, count 0 2006.229.10:38:39.21#ibcon#about to read 4, iclass 6, count 0 2006.229.10:38:39.21#ibcon#read 4, iclass 6, count 0 2006.229.10:38:39.21#ibcon#about to read 5, iclass 6, count 0 2006.229.10:38:39.21#ibcon#read 5, iclass 6, count 0 2006.229.10:38:39.21#ibcon#about to read 6, iclass 6, count 0 2006.229.10:38:39.21#ibcon#read 6, iclass 6, count 0 2006.229.10:38:39.21#ibcon#end of sib2, iclass 6, count 0 2006.229.10:38:39.21#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:38:39.21#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:38:39.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:38:39.21#ibcon#*before write, iclass 6, count 0 2006.229.10:38:39.21#ibcon#enter sib2, iclass 6, count 0 2006.229.10:38:39.21#ibcon#flushed, iclass 6, count 0 2006.229.10:38:39.21#ibcon#about to write, iclass 6, count 0 2006.229.10:38:39.21#ibcon#wrote, iclass 6, count 0 2006.229.10:38:39.21#ibcon#about to read 3, iclass 6, count 0 2006.229.10:38:39.25#ibcon#read 3, iclass 6, count 0 2006.229.10:38:39.25#ibcon#about to read 4, iclass 6, count 0 2006.229.10:38:39.25#ibcon#read 4, iclass 6, count 0 2006.229.10:38:39.25#ibcon#about to read 5, iclass 6, count 0 2006.229.10:38:39.25#ibcon#read 5, iclass 6, count 0 2006.229.10:38:39.25#ibcon#about to read 6, iclass 6, count 0 2006.229.10:38:39.25#ibcon#read 6, iclass 6, count 0 2006.229.10:38:39.25#ibcon#end of sib2, iclass 6, count 0 2006.229.10:38:39.25#ibcon#*after write, iclass 6, count 0 2006.229.10:38:39.25#ibcon#*before return 0, iclass 6, count 0 2006.229.10:38:39.25#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:38:39.25#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:38:39.25#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:38:39.25#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:38:39.25$vck44/va=4,7 2006.229.10:38:39.25#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.10:38:39.25#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.10:38:39.25#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:39.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:38:39.31#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:38:39.31#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:38:39.31#ibcon#enter wrdev, iclass 10, count 2 2006.229.10:38:39.31#ibcon#first serial, iclass 10, count 2 2006.229.10:38:39.31#ibcon#enter sib2, iclass 10, count 2 2006.229.10:38:39.31#ibcon#flushed, iclass 10, count 2 2006.229.10:38:39.31#ibcon#about to write, iclass 10, count 2 2006.229.10:38:39.31#ibcon#wrote, iclass 10, count 2 2006.229.10:38:39.31#ibcon#about to read 3, iclass 10, count 2 2006.229.10:38:39.33#ibcon#read 3, iclass 10, count 2 2006.229.10:38:39.33#ibcon#about to read 4, iclass 10, count 2 2006.229.10:38:39.33#ibcon#read 4, iclass 10, count 2 2006.229.10:38:39.33#ibcon#about to read 5, iclass 10, count 2 2006.229.10:38:39.33#ibcon#read 5, iclass 10, count 2 2006.229.10:38:39.33#ibcon#about to read 6, iclass 10, count 2 2006.229.10:38:39.33#ibcon#read 6, iclass 10, count 2 2006.229.10:38:39.33#ibcon#end of sib2, iclass 10, count 2 2006.229.10:38:39.33#ibcon#*mode == 0, iclass 10, count 2 2006.229.10:38:39.33#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.10:38:39.33#ibcon#[25=AT04-07\r\n] 2006.229.10:38:39.33#ibcon#*before write, iclass 10, count 2 2006.229.10:38:39.33#ibcon#enter sib2, iclass 10, count 2 2006.229.10:38:39.33#ibcon#flushed, iclass 10, count 2 2006.229.10:38:39.33#ibcon#about to write, iclass 10, count 2 2006.229.10:38:39.33#ibcon#wrote, iclass 10, count 2 2006.229.10:38:39.33#ibcon#about to read 3, iclass 10, count 2 2006.229.10:38:39.36#ibcon#read 3, iclass 10, count 2 2006.229.10:38:39.36#ibcon#about to read 4, iclass 10, count 2 2006.229.10:38:39.36#ibcon#read 4, iclass 10, count 2 2006.229.10:38:39.36#ibcon#about to read 5, iclass 10, count 2 2006.229.10:38:39.36#ibcon#read 5, iclass 10, count 2 2006.229.10:38:39.36#ibcon#about to read 6, iclass 10, count 2 2006.229.10:38:39.36#ibcon#read 6, iclass 10, count 2 2006.229.10:38:39.36#ibcon#end of sib2, iclass 10, count 2 2006.229.10:38:39.36#ibcon#*after write, iclass 10, count 2 2006.229.10:38:39.36#ibcon#*before return 0, iclass 10, count 2 2006.229.10:38:39.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:38:39.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:38:39.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.10:38:39.37#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:39.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:38:39.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:38:39.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:38:39.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:38:39.49#ibcon#first serial, iclass 10, count 0 2006.229.10:38:39.49#ibcon#enter sib2, iclass 10, count 0 2006.229.10:38:39.49#ibcon#flushed, iclass 10, count 0 2006.229.10:38:39.49#ibcon#about to write, iclass 10, count 0 2006.229.10:38:39.49#ibcon#wrote, iclass 10, count 0 2006.229.10:38:39.49#ibcon#about to read 3, iclass 10, count 0 2006.229.10:38:39.51#ibcon#read 3, iclass 10, count 0 2006.229.10:38:39.51#ibcon#about to read 4, iclass 10, count 0 2006.229.10:38:39.51#ibcon#read 4, iclass 10, count 0 2006.229.10:38:39.51#ibcon#about to read 5, iclass 10, count 0 2006.229.10:38:39.51#ibcon#read 5, iclass 10, count 0 2006.229.10:38:39.51#ibcon#about to read 6, iclass 10, count 0 2006.229.10:38:39.51#ibcon#read 6, iclass 10, count 0 2006.229.10:38:39.51#ibcon#end of sib2, iclass 10, count 0 2006.229.10:38:39.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:38:39.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:38:39.51#ibcon#[25=USB\r\n] 2006.229.10:38:39.51#ibcon#*before write, iclass 10, count 0 2006.229.10:38:39.51#ibcon#enter sib2, iclass 10, count 0 2006.229.10:38:39.51#ibcon#flushed, iclass 10, count 0 2006.229.10:38:39.51#ibcon#about to write, iclass 10, count 0 2006.229.10:38:39.51#ibcon#wrote, iclass 10, count 0 2006.229.10:38:39.51#ibcon#about to read 3, iclass 10, count 0 2006.229.10:38:39.54#ibcon#read 3, iclass 10, count 0 2006.229.10:38:39.54#ibcon#about to read 4, iclass 10, count 0 2006.229.10:38:39.54#ibcon#read 4, iclass 10, count 0 2006.229.10:38:39.54#ibcon#about to read 5, iclass 10, count 0 2006.229.10:38:39.54#ibcon#read 5, iclass 10, count 0 2006.229.10:38:39.54#ibcon#about to read 6, iclass 10, count 0 2006.229.10:38:39.54#ibcon#read 6, iclass 10, count 0 2006.229.10:38:39.54#ibcon#end of sib2, iclass 10, count 0 2006.229.10:38:39.54#ibcon#*after write, iclass 10, count 0 2006.229.10:38:39.54#ibcon#*before return 0, iclass 10, count 0 2006.229.10:38:39.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:38:39.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:38:39.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:38:39.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:38:39.54$vck44/valo=5,734.99 2006.229.10:38:39.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.10:38:39.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.10:38:39.54#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:39.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:38:39.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:38:39.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:38:39.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:38:39.54#ibcon#first serial, iclass 12, count 0 2006.229.10:38:39.54#ibcon#enter sib2, iclass 12, count 0 2006.229.10:38:39.54#ibcon#flushed, iclass 12, count 0 2006.229.10:38:39.54#ibcon#about to write, iclass 12, count 0 2006.229.10:38:39.54#ibcon#wrote, iclass 12, count 0 2006.229.10:38:39.54#ibcon#about to read 3, iclass 12, count 0 2006.229.10:38:39.56#ibcon#read 3, iclass 12, count 0 2006.229.10:38:39.56#ibcon#about to read 4, iclass 12, count 0 2006.229.10:38:39.56#ibcon#read 4, iclass 12, count 0 2006.229.10:38:39.56#ibcon#about to read 5, iclass 12, count 0 2006.229.10:38:39.56#ibcon#read 5, iclass 12, count 0 2006.229.10:38:39.56#ibcon#about to read 6, iclass 12, count 0 2006.229.10:38:39.56#ibcon#read 6, iclass 12, count 0 2006.229.10:38:39.56#ibcon#end of sib2, iclass 12, count 0 2006.229.10:38:39.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:38:39.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:38:39.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:38:39.56#ibcon#*before write, iclass 12, count 0 2006.229.10:38:39.56#ibcon#enter sib2, iclass 12, count 0 2006.229.10:38:39.56#ibcon#flushed, iclass 12, count 0 2006.229.10:38:39.56#ibcon#about to write, iclass 12, count 0 2006.229.10:38:39.56#ibcon#wrote, iclass 12, count 0 2006.229.10:38:39.56#ibcon#about to read 3, iclass 12, count 0 2006.229.10:38:39.60#ibcon#read 3, iclass 12, count 0 2006.229.10:38:39.60#ibcon#about to read 4, iclass 12, count 0 2006.229.10:38:39.60#ibcon#read 4, iclass 12, count 0 2006.229.10:38:39.60#ibcon#about to read 5, iclass 12, count 0 2006.229.10:38:39.60#ibcon#read 5, iclass 12, count 0 2006.229.10:38:39.60#ibcon#about to read 6, iclass 12, count 0 2006.229.10:38:39.60#ibcon#read 6, iclass 12, count 0 2006.229.10:38:39.60#ibcon#end of sib2, iclass 12, count 0 2006.229.10:38:39.60#ibcon#*after write, iclass 12, count 0 2006.229.10:38:39.60#ibcon#*before return 0, iclass 12, count 0 2006.229.10:38:39.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:38:39.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:38:39.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:38:39.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:38:39.60$vck44/va=5,4 2006.229.10:38:39.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.10:38:39.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.10:38:39.60#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:39.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:38:39.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:38:39.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:38:39.66#ibcon#enter wrdev, iclass 14, count 2 2006.229.10:38:39.66#ibcon#first serial, iclass 14, count 2 2006.229.10:38:39.66#ibcon#enter sib2, iclass 14, count 2 2006.229.10:38:39.66#ibcon#flushed, iclass 14, count 2 2006.229.10:38:39.66#ibcon#about to write, iclass 14, count 2 2006.229.10:38:39.66#ibcon#wrote, iclass 14, count 2 2006.229.10:38:39.66#ibcon#about to read 3, iclass 14, count 2 2006.229.10:38:39.68#ibcon#read 3, iclass 14, count 2 2006.229.10:38:39.68#ibcon#about to read 4, iclass 14, count 2 2006.229.10:38:39.68#ibcon#read 4, iclass 14, count 2 2006.229.10:38:39.68#ibcon#about to read 5, iclass 14, count 2 2006.229.10:38:39.68#ibcon#read 5, iclass 14, count 2 2006.229.10:38:39.68#ibcon#about to read 6, iclass 14, count 2 2006.229.10:38:39.68#ibcon#read 6, iclass 14, count 2 2006.229.10:38:39.68#ibcon#end of sib2, iclass 14, count 2 2006.229.10:38:39.68#ibcon#*mode == 0, iclass 14, count 2 2006.229.10:38:39.68#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.10:38:39.68#ibcon#[25=AT05-04\r\n] 2006.229.10:38:39.68#ibcon#*before write, iclass 14, count 2 2006.229.10:38:39.68#ibcon#enter sib2, iclass 14, count 2 2006.229.10:38:39.68#ibcon#flushed, iclass 14, count 2 2006.229.10:38:39.68#ibcon#about to write, iclass 14, count 2 2006.229.10:38:39.68#ibcon#wrote, iclass 14, count 2 2006.229.10:38:39.68#ibcon#about to read 3, iclass 14, count 2 2006.229.10:38:39.71#ibcon#read 3, iclass 14, count 2 2006.229.10:38:39.71#ibcon#about to read 4, iclass 14, count 2 2006.229.10:38:39.71#ibcon#read 4, iclass 14, count 2 2006.229.10:38:39.71#ibcon#about to read 5, iclass 14, count 2 2006.229.10:38:39.71#ibcon#read 5, iclass 14, count 2 2006.229.10:38:39.71#ibcon#about to read 6, iclass 14, count 2 2006.229.10:38:39.71#ibcon#read 6, iclass 14, count 2 2006.229.10:38:39.71#ibcon#end of sib2, iclass 14, count 2 2006.229.10:38:39.71#ibcon#*after write, iclass 14, count 2 2006.229.10:38:39.71#ibcon#*before return 0, iclass 14, count 2 2006.229.10:38:39.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:38:39.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:38:39.71#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.10:38:39.71#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:39.71#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:38:39.83#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:38:39.83#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:38:39.83#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:38:39.83#ibcon#first serial, iclass 14, count 0 2006.229.10:38:39.83#ibcon#enter sib2, iclass 14, count 0 2006.229.10:38:39.83#ibcon#flushed, iclass 14, count 0 2006.229.10:38:39.83#ibcon#about to write, iclass 14, count 0 2006.229.10:38:39.83#ibcon#wrote, iclass 14, count 0 2006.229.10:38:39.83#ibcon#about to read 3, iclass 14, count 0 2006.229.10:38:39.85#ibcon#read 3, iclass 14, count 0 2006.229.10:38:39.85#ibcon#about to read 4, iclass 14, count 0 2006.229.10:38:39.85#ibcon#read 4, iclass 14, count 0 2006.229.10:38:39.85#ibcon#about to read 5, iclass 14, count 0 2006.229.10:38:39.85#ibcon#read 5, iclass 14, count 0 2006.229.10:38:39.85#ibcon#about to read 6, iclass 14, count 0 2006.229.10:38:39.85#ibcon#read 6, iclass 14, count 0 2006.229.10:38:39.85#ibcon#end of sib2, iclass 14, count 0 2006.229.10:38:39.85#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:38:39.85#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:38:39.85#ibcon#[25=USB\r\n] 2006.229.10:38:39.85#ibcon#*before write, iclass 14, count 0 2006.229.10:38:39.85#ibcon#enter sib2, iclass 14, count 0 2006.229.10:38:39.85#ibcon#flushed, iclass 14, count 0 2006.229.10:38:39.85#ibcon#about to write, iclass 14, count 0 2006.229.10:38:39.85#ibcon#wrote, iclass 14, count 0 2006.229.10:38:39.85#ibcon#about to read 3, iclass 14, count 0 2006.229.10:38:39.88#ibcon#read 3, iclass 14, count 0 2006.229.10:38:39.88#ibcon#about to read 4, iclass 14, count 0 2006.229.10:38:39.88#ibcon#read 4, iclass 14, count 0 2006.229.10:38:39.88#ibcon#about to read 5, iclass 14, count 0 2006.229.10:38:39.88#ibcon#read 5, iclass 14, count 0 2006.229.10:38:39.88#ibcon#about to read 6, iclass 14, count 0 2006.229.10:38:39.88#ibcon#read 6, iclass 14, count 0 2006.229.10:38:39.88#ibcon#end of sib2, iclass 14, count 0 2006.229.10:38:39.88#ibcon#*after write, iclass 14, count 0 2006.229.10:38:39.88#ibcon#*before return 0, iclass 14, count 0 2006.229.10:38:39.88#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:38:39.88#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:38:39.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:38:39.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:38:39.88$vck44/valo=6,814.99 2006.229.10:38:39.88#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.10:38:39.88#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.10:38:39.88#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:39.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:39.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:39.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:39.88#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:38:39.88#ibcon#first serial, iclass 16, count 0 2006.229.10:38:39.88#ibcon#enter sib2, iclass 16, count 0 2006.229.10:38:39.88#ibcon#flushed, iclass 16, count 0 2006.229.10:38:39.88#ibcon#about to write, iclass 16, count 0 2006.229.10:38:39.88#ibcon#wrote, iclass 16, count 0 2006.229.10:38:39.88#ibcon#about to read 3, iclass 16, count 0 2006.229.10:38:39.90#ibcon#read 3, iclass 16, count 0 2006.229.10:38:39.90#ibcon#about to read 4, iclass 16, count 0 2006.229.10:38:39.90#ibcon#read 4, iclass 16, count 0 2006.229.10:38:39.90#ibcon#about to read 5, iclass 16, count 0 2006.229.10:38:39.90#ibcon#read 5, iclass 16, count 0 2006.229.10:38:39.90#ibcon#about to read 6, iclass 16, count 0 2006.229.10:38:39.90#ibcon#read 6, iclass 16, count 0 2006.229.10:38:39.90#ibcon#end of sib2, iclass 16, count 0 2006.229.10:38:39.90#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:38:39.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:38:39.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:38:39.90#ibcon#*before write, iclass 16, count 0 2006.229.10:38:39.90#ibcon#enter sib2, iclass 16, count 0 2006.229.10:38:39.90#ibcon#flushed, iclass 16, count 0 2006.229.10:38:39.90#ibcon#about to write, iclass 16, count 0 2006.229.10:38:39.90#ibcon#wrote, iclass 16, count 0 2006.229.10:38:39.90#ibcon#about to read 3, iclass 16, count 0 2006.229.10:38:39.94#ibcon#read 3, iclass 16, count 0 2006.229.10:38:39.94#ibcon#about to read 4, iclass 16, count 0 2006.229.10:38:39.94#ibcon#read 4, iclass 16, count 0 2006.229.10:38:39.94#ibcon#about to read 5, iclass 16, count 0 2006.229.10:38:39.94#ibcon#read 5, iclass 16, count 0 2006.229.10:38:39.94#ibcon#about to read 6, iclass 16, count 0 2006.229.10:38:39.94#ibcon#read 6, iclass 16, count 0 2006.229.10:38:39.94#ibcon#end of sib2, iclass 16, count 0 2006.229.10:38:39.94#ibcon#*after write, iclass 16, count 0 2006.229.10:38:39.94#ibcon#*before return 0, iclass 16, count 0 2006.229.10:38:39.94#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:39.94#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:39.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:38:39.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:38:39.94$vck44/va=6,4 2006.229.10:38:39.94#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.10:38:39.94#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.10:38:39.94#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:39.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:40.00#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:40.00#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:40.00#ibcon#enter wrdev, iclass 18, count 2 2006.229.10:38:40.00#ibcon#first serial, iclass 18, count 2 2006.229.10:38:40.00#ibcon#enter sib2, iclass 18, count 2 2006.229.10:38:40.00#ibcon#flushed, iclass 18, count 2 2006.229.10:38:40.00#ibcon#about to write, iclass 18, count 2 2006.229.10:38:40.00#ibcon#wrote, iclass 18, count 2 2006.229.10:38:40.00#ibcon#about to read 3, iclass 18, count 2 2006.229.10:38:40.02#ibcon#read 3, iclass 18, count 2 2006.229.10:38:40.02#ibcon#about to read 4, iclass 18, count 2 2006.229.10:38:40.02#ibcon#read 4, iclass 18, count 2 2006.229.10:38:40.02#ibcon#about to read 5, iclass 18, count 2 2006.229.10:38:40.02#ibcon#read 5, iclass 18, count 2 2006.229.10:38:40.02#ibcon#about to read 6, iclass 18, count 2 2006.229.10:38:40.02#ibcon#read 6, iclass 18, count 2 2006.229.10:38:40.02#ibcon#end of sib2, iclass 18, count 2 2006.229.10:38:40.02#ibcon#*mode == 0, iclass 18, count 2 2006.229.10:38:40.02#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.10:38:40.02#ibcon#[25=AT06-04\r\n] 2006.229.10:38:40.02#ibcon#*before write, iclass 18, count 2 2006.229.10:38:40.02#ibcon#enter sib2, iclass 18, count 2 2006.229.10:38:40.02#ibcon#flushed, iclass 18, count 2 2006.229.10:38:40.02#ibcon#about to write, iclass 18, count 2 2006.229.10:38:40.02#ibcon#wrote, iclass 18, count 2 2006.229.10:38:40.02#ibcon#about to read 3, iclass 18, count 2 2006.229.10:38:40.05#ibcon#read 3, iclass 18, count 2 2006.229.10:38:40.05#ibcon#about to read 4, iclass 18, count 2 2006.229.10:38:40.05#ibcon#read 4, iclass 18, count 2 2006.229.10:38:40.05#ibcon#about to read 5, iclass 18, count 2 2006.229.10:38:40.05#ibcon#read 5, iclass 18, count 2 2006.229.10:38:40.05#ibcon#about to read 6, iclass 18, count 2 2006.229.10:38:40.05#ibcon#read 6, iclass 18, count 2 2006.229.10:38:40.05#ibcon#end of sib2, iclass 18, count 2 2006.229.10:38:40.05#ibcon#*after write, iclass 18, count 2 2006.229.10:38:40.05#ibcon#*before return 0, iclass 18, count 2 2006.229.10:38:40.05#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:40.05#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:40.05#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.10:38:40.05#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:40.05#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:40.17#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:40.17#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:40.17#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:38:40.17#ibcon#first serial, iclass 18, count 0 2006.229.10:38:40.17#ibcon#enter sib2, iclass 18, count 0 2006.229.10:38:40.17#ibcon#flushed, iclass 18, count 0 2006.229.10:38:40.17#ibcon#about to write, iclass 18, count 0 2006.229.10:38:40.17#ibcon#wrote, iclass 18, count 0 2006.229.10:38:40.17#ibcon#about to read 3, iclass 18, count 0 2006.229.10:38:40.19#ibcon#read 3, iclass 18, count 0 2006.229.10:38:40.19#ibcon#about to read 4, iclass 18, count 0 2006.229.10:38:40.19#ibcon#read 4, iclass 18, count 0 2006.229.10:38:40.19#ibcon#about to read 5, iclass 18, count 0 2006.229.10:38:40.19#ibcon#read 5, iclass 18, count 0 2006.229.10:38:40.19#ibcon#about to read 6, iclass 18, count 0 2006.229.10:38:40.19#ibcon#read 6, iclass 18, count 0 2006.229.10:38:40.19#ibcon#end of sib2, iclass 18, count 0 2006.229.10:38:40.19#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:38:40.19#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:38:40.19#ibcon#[25=USB\r\n] 2006.229.10:38:40.19#ibcon#*before write, iclass 18, count 0 2006.229.10:38:40.19#ibcon#enter sib2, iclass 18, count 0 2006.229.10:38:40.19#ibcon#flushed, iclass 18, count 0 2006.229.10:38:40.19#ibcon#about to write, iclass 18, count 0 2006.229.10:38:40.19#ibcon#wrote, iclass 18, count 0 2006.229.10:38:40.19#ibcon#about to read 3, iclass 18, count 0 2006.229.10:38:40.22#ibcon#read 3, iclass 18, count 0 2006.229.10:38:40.22#ibcon#about to read 4, iclass 18, count 0 2006.229.10:38:40.22#ibcon#read 4, iclass 18, count 0 2006.229.10:38:40.22#ibcon#about to read 5, iclass 18, count 0 2006.229.10:38:40.22#ibcon#read 5, iclass 18, count 0 2006.229.10:38:40.22#ibcon#about to read 6, iclass 18, count 0 2006.229.10:38:40.22#ibcon#read 6, iclass 18, count 0 2006.229.10:38:40.22#ibcon#end of sib2, iclass 18, count 0 2006.229.10:38:40.22#ibcon#*after write, iclass 18, count 0 2006.229.10:38:40.22#ibcon#*before return 0, iclass 18, count 0 2006.229.10:38:40.22#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:40.22#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:40.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:38:40.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:38:40.22$vck44/valo=7,864.99 2006.229.10:38:40.22#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.10:38:40.22#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.10:38:40.22#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:40.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:40.22#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:40.22#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:40.22#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:38:40.22#ibcon#first serial, iclass 20, count 0 2006.229.10:38:40.22#ibcon#enter sib2, iclass 20, count 0 2006.229.10:38:40.22#ibcon#flushed, iclass 20, count 0 2006.229.10:38:40.22#ibcon#about to write, iclass 20, count 0 2006.229.10:38:40.22#ibcon#wrote, iclass 20, count 0 2006.229.10:38:40.22#ibcon#about to read 3, iclass 20, count 0 2006.229.10:38:40.24#ibcon#read 3, iclass 20, count 0 2006.229.10:38:40.24#ibcon#about to read 4, iclass 20, count 0 2006.229.10:38:40.24#ibcon#read 4, iclass 20, count 0 2006.229.10:38:40.24#ibcon#about to read 5, iclass 20, count 0 2006.229.10:38:40.24#ibcon#read 5, iclass 20, count 0 2006.229.10:38:40.24#ibcon#about to read 6, iclass 20, count 0 2006.229.10:38:40.24#ibcon#read 6, iclass 20, count 0 2006.229.10:38:40.24#ibcon#end of sib2, iclass 20, count 0 2006.229.10:38:40.24#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:38:40.24#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:38:40.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:38:40.24#ibcon#*before write, iclass 20, count 0 2006.229.10:38:40.24#ibcon#enter sib2, iclass 20, count 0 2006.229.10:38:40.24#ibcon#flushed, iclass 20, count 0 2006.229.10:38:40.24#ibcon#about to write, iclass 20, count 0 2006.229.10:38:40.24#ibcon#wrote, iclass 20, count 0 2006.229.10:38:40.24#ibcon#about to read 3, iclass 20, count 0 2006.229.10:38:40.28#ibcon#read 3, iclass 20, count 0 2006.229.10:38:40.28#ibcon#about to read 4, iclass 20, count 0 2006.229.10:38:40.28#ibcon#read 4, iclass 20, count 0 2006.229.10:38:40.28#ibcon#about to read 5, iclass 20, count 0 2006.229.10:38:40.28#ibcon#read 5, iclass 20, count 0 2006.229.10:38:40.28#ibcon#about to read 6, iclass 20, count 0 2006.229.10:38:40.28#ibcon#read 6, iclass 20, count 0 2006.229.10:38:40.28#ibcon#end of sib2, iclass 20, count 0 2006.229.10:38:40.28#ibcon#*after write, iclass 20, count 0 2006.229.10:38:40.28#ibcon#*before return 0, iclass 20, count 0 2006.229.10:38:40.28#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:40.28#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:40.28#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:38:40.28#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:38:40.28$vck44/va=7,5 2006.229.10:38:40.28#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.10:38:40.28#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.10:38:40.28#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:40.28#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:40.34#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:40.34#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:40.34#ibcon#enter wrdev, iclass 22, count 2 2006.229.10:38:40.34#ibcon#first serial, iclass 22, count 2 2006.229.10:38:40.34#ibcon#enter sib2, iclass 22, count 2 2006.229.10:38:40.34#ibcon#flushed, iclass 22, count 2 2006.229.10:38:40.34#ibcon#about to write, iclass 22, count 2 2006.229.10:38:40.34#ibcon#wrote, iclass 22, count 2 2006.229.10:38:40.34#ibcon#about to read 3, iclass 22, count 2 2006.229.10:38:40.36#ibcon#read 3, iclass 22, count 2 2006.229.10:38:40.36#ibcon#about to read 4, iclass 22, count 2 2006.229.10:38:40.36#ibcon#read 4, iclass 22, count 2 2006.229.10:38:40.36#ibcon#about to read 5, iclass 22, count 2 2006.229.10:38:40.36#ibcon#read 5, iclass 22, count 2 2006.229.10:38:40.36#ibcon#about to read 6, iclass 22, count 2 2006.229.10:38:40.36#ibcon#read 6, iclass 22, count 2 2006.229.10:38:40.36#ibcon#end of sib2, iclass 22, count 2 2006.229.10:38:40.36#ibcon#*mode == 0, iclass 22, count 2 2006.229.10:38:40.36#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.10:38:40.36#ibcon#[25=AT07-05\r\n] 2006.229.10:38:40.36#ibcon#*before write, iclass 22, count 2 2006.229.10:38:40.36#ibcon#enter sib2, iclass 22, count 2 2006.229.10:38:40.36#ibcon#flushed, iclass 22, count 2 2006.229.10:38:40.36#ibcon#about to write, iclass 22, count 2 2006.229.10:38:40.36#ibcon#wrote, iclass 22, count 2 2006.229.10:38:40.36#ibcon#about to read 3, iclass 22, count 2 2006.229.10:38:40.39#ibcon#read 3, iclass 22, count 2 2006.229.10:38:40.39#ibcon#about to read 4, iclass 22, count 2 2006.229.10:38:40.39#ibcon#read 4, iclass 22, count 2 2006.229.10:38:40.39#ibcon#about to read 5, iclass 22, count 2 2006.229.10:38:40.39#ibcon#read 5, iclass 22, count 2 2006.229.10:38:40.39#ibcon#about to read 6, iclass 22, count 2 2006.229.10:38:40.39#ibcon#read 6, iclass 22, count 2 2006.229.10:38:40.39#ibcon#end of sib2, iclass 22, count 2 2006.229.10:38:40.39#ibcon#*after write, iclass 22, count 2 2006.229.10:38:40.39#ibcon#*before return 0, iclass 22, count 2 2006.229.10:38:40.39#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:40.39#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:40.39#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.10:38:40.39#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:40.39#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:40.51#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:40.51#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:40.51#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:38:40.51#ibcon#first serial, iclass 22, count 0 2006.229.10:38:40.51#ibcon#enter sib2, iclass 22, count 0 2006.229.10:38:40.51#ibcon#flushed, iclass 22, count 0 2006.229.10:38:40.51#ibcon#about to write, iclass 22, count 0 2006.229.10:38:40.51#ibcon#wrote, iclass 22, count 0 2006.229.10:38:40.51#ibcon#about to read 3, iclass 22, count 0 2006.229.10:38:40.53#ibcon#read 3, iclass 22, count 0 2006.229.10:38:40.53#ibcon#about to read 4, iclass 22, count 0 2006.229.10:38:40.53#ibcon#read 4, iclass 22, count 0 2006.229.10:38:40.53#ibcon#about to read 5, iclass 22, count 0 2006.229.10:38:40.53#ibcon#read 5, iclass 22, count 0 2006.229.10:38:40.53#ibcon#about to read 6, iclass 22, count 0 2006.229.10:38:40.53#ibcon#read 6, iclass 22, count 0 2006.229.10:38:40.53#ibcon#end of sib2, iclass 22, count 0 2006.229.10:38:40.53#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:38:40.53#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:38:40.53#ibcon#[25=USB\r\n] 2006.229.10:38:40.53#ibcon#*before write, iclass 22, count 0 2006.229.10:38:40.53#ibcon#enter sib2, iclass 22, count 0 2006.229.10:38:40.53#ibcon#flushed, iclass 22, count 0 2006.229.10:38:40.53#ibcon#about to write, iclass 22, count 0 2006.229.10:38:40.53#ibcon#wrote, iclass 22, count 0 2006.229.10:38:40.53#ibcon#about to read 3, iclass 22, count 0 2006.229.10:38:40.56#ibcon#read 3, iclass 22, count 0 2006.229.10:38:40.56#ibcon#about to read 4, iclass 22, count 0 2006.229.10:38:40.56#ibcon#read 4, iclass 22, count 0 2006.229.10:38:40.56#ibcon#about to read 5, iclass 22, count 0 2006.229.10:38:40.56#ibcon#read 5, iclass 22, count 0 2006.229.10:38:40.56#ibcon#about to read 6, iclass 22, count 0 2006.229.10:38:40.56#ibcon#read 6, iclass 22, count 0 2006.229.10:38:40.56#ibcon#end of sib2, iclass 22, count 0 2006.229.10:38:40.56#ibcon#*after write, iclass 22, count 0 2006.229.10:38:40.56#ibcon#*before return 0, iclass 22, count 0 2006.229.10:38:40.56#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:40.56#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:40.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:38:40.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:38:40.56$vck44/valo=8,884.99 2006.229.10:38:40.56#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.10:38:40.56#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.10:38:40.56#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:40.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:40.56#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:40.56#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:40.56#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:38:40.56#ibcon#first serial, iclass 24, count 0 2006.229.10:38:40.56#ibcon#enter sib2, iclass 24, count 0 2006.229.10:38:40.56#ibcon#flushed, iclass 24, count 0 2006.229.10:38:40.56#ibcon#about to write, iclass 24, count 0 2006.229.10:38:40.56#ibcon#wrote, iclass 24, count 0 2006.229.10:38:40.56#ibcon#about to read 3, iclass 24, count 0 2006.229.10:38:40.58#ibcon#read 3, iclass 24, count 0 2006.229.10:38:40.58#ibcon#about to read 4, iclass 24, count 0 2006.229.10:38:40.58#ibcon#read 4, iclass 24, count 0 2006.229.10:38:40.58#ibcon#about to read 5, iclass 24, count 0 2006.229.10:38:40.58#ibcon#read 5, iclass 24, count 0 2006.229.10:38:40.58#ibcon#about to read 6, iclass 24, count 0 2006.229.10:38:40.58#ibcon#read 6, iclass 24, count 0 2006.229.10:38:40.58#ibcon#end of sib2, iclass 24, count 0 2006.229.10:38:40.58#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:38:40.58#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:38:40.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:38:40.58#ibcon#*before write, iclass 24, count 0 2006.229.10:38:40.58#ibcon#enter sib2, iclass 24, count 0 2006.229.10:38:40.58#ibcon#flushed, iclass 24, count 0 2006.229.10:38:40.58#ibcon#about to write, iclass 24, count 0 2006.229.10:38:40.58#ibcon#wrote, iclass 24, count 0 2006.229.10:38:40.58#ibcon#about to read 3, iclass 24, count 0 2006.229.10:38:40.62#ibcon#read 3, iclass 24, count 0 2006.229.10:38:40.62#ibcon#about to read 4, iclass 24, count 0 2006.229.10:38:40.62#ibcon#read 4, iclass 24, count 0 2006.229.10:38:40.62#ibcon#about to read 5, iclass 24, count 0 2006.229.10:38:40.62#ibcon#read 5, iclass 24, count 0 2006.229.10:38:40.62#ibcon#about to read 6, iclass 24, count 0 2006.229.10:38:40.62#ibcon#read 6, iclass 24, count 0 2006.229.10:38:40.62#ibcon#end of sib2, iclass 24, count 0 2006.229.10:38:40.62#ibcon#*after write, iclass 24, count 0 2006.229.10:38:40.62#ibcon#*before return 0, iclass 24, count 0 2006.229.10:38:40.62#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:40.62#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:40.62#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:38:40.62#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:38:40.62$vck44/va=8,6 2006.229.10:38:40.62#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.10:38:40.62#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.10:38:40.62#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:40.62#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:40.68#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:40.68#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:40.68#ibcon#enter wrdev, iclass 26, count 2 2006.229.10:38:40.68#ibcon#first serial, iclass 26, count 2 2006.229.10:38:40.68#ibcon#enter sib2, iclass 26, count 2 2006.229.10:38:40.68#ibcon#flushed, iclass 26, count 2 2006.229.10:38:40.68#ibcon#about to write, iclass 26, count 2 2006.229.10:38:40.68#ibcon#wrote, iclass 26, count 2 2006.229.10:38:40.68#ibcon#about to read 3, iclass 26, count 2 2006.229.10:38:40.70#ibcon#read 3, iclass 26, count 2 2006.229.10:38:40.70#ibcon#about to read 4, iclass 26, count 2 2006.229.10:38:40.70#ibcon#read 4, iclass 26, count 2 2006.229.10:38:40.70#ibcon#about to read 5, iclass 26, count 2 2006.229.10:38:40.70#ibcon#read 5, iclass 26, count 2 2006.229.10:38:40.70#ibcon#about to read 6, iclass 26, count 2 2006.229.10:38:40.70#ibcon#read 6, iclass 26, count 2 2006.229.10:38:40.70#ibcon#end of sib2, iclass 26, count 2 2006.229.10:38:40.70#ibcon#*mode == 0, iclass 26, count 2 2006.229.10:38:40.70#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.10:38:40.70#ibcon#[25=AT08-06\r\n] 2006.229.10:38:40.70#ibcon#*before write, iclass 26, count 2 2006.229.10:38:40.70#ibcon#enter sib2, iclass 26, count 2 2006.229.10:38:40.70#ibcon#flushed, iclass 26, count 2 2006.229.10:38:40.70#ibcon#about to write, iclass 26, count 2 2006.229.10:38:40.70#ibcon#wrote, iclass 26, count 2 2006.229.10:38:40.70#ibcon#about to read 3, iclass 26, count 2 2006.229.10:38:40.73#ibcon#read 3, iclass 26, count 2 2006.229.10:38:40.73#ibcon#about to read 4, iclass 26, count 2 2006.229.10:38:40.73#ibcon#read 4, iclass 26, count 2 2006.229.10:38:40.73#ibcon#about to read 5, iclass 26, count 2 2006.229.10:38:40.73#ibcon#read 5, iclass 26, count 2 2006.229.10:38:40.73#ibcon#about to read 6, iclass 26, count 2 2006.229.10:38:40.73#ibcon#read 6, iclass 26, count 2 2006.229.10:38:40.73#ibcon#end of sib2, iclass 26, count 2 2006.229.10:38:40.73#ibcon#*after write, iclass 26, count 2 2006.229.10:38:40.73#ibcon#*before return 0, iclass 26, count 2 2006.229.10:38:40.73#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:40.73#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:40.73#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.10:38:40.73#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:40.73#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:40.85#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:40.85#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:40.85#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:38:40.85#ibcon#first serial, iclass 26, count 0 2006.229.10:38:40.85#ibcon#enter sib2, iclass 26, count 0 2006.229.10:38:40.85#ibcon#flushed, iclass 26, count 0 2006.229.10:38:40.85#ibcon#about to write, iclass 26, count 0 2006.229.10:38:40.85#ibcon#wrote, iclass 26, count 0 2006.229.10:38:40.85#ibcon#about to read 3, iclass 26, count 0 2006.229.10:38:40.87#ibcon#read 3, iclass 26, count 0 2006.229.10:38:40.87#ibcon#about to read 4, iclass 26, count 0 2006.229.10:38:40.87#ibcon#read 4, iclass 26, count 0 2006.229.10:38:40.87#ibcon#about to read 5, iclass 26, count 0 2006.229.10:38:40.87#ibcon#read 5, iclass 26, count 0 2006.229.10:38:40.87#ibcon#about to read 6, iclass 26, count 0 2006.229.10:38:40.87#ibcon#read 6, iclass 26, count 0 2006.229.10:38:40.87#ibcon#end of sib2, iclass 26, count 0 2006.229.10:38:40.87#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:38:40.87#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:38:40.87#ibcon#[25=USB\r\n] 2006.229.10:38:40.87#ibcon#*before write, iclass 26, count 0 2006.229.10:38:40.87#ibcon#enter sib2, iclass 26, count 0 2006.229.10:38:40.87#ibcon#flushed, iclass 26, count 0 2006.229.10:38:40.87#ibcon#about to write, iclass 26, count 0 2006.229.10:38:40.87#ibcon#wrote, iclass 26, count 0 2006.229.10:38:40.87#ibcon#about to read 3, iclass 26, count 0 2006.229.10:38:40.90#ibcon#read 3, iclass 26, count 0 2006.229.10:38:40.90#ibcon#about to read 4, iclass 26, count 0 2006.229.10:38:40.90#ibcon#read 4, iclass 26, count 0 2006.229.10:38:40.90#ibcon#about to read 5, iclass 26, count 0 2006.229.10:38:40.90#ibcon#read 5, iclass 26, count 0 2006.229.10:38:40.90#ibcon#about to read 6, iclass 26, count 0 2006.229.10:38:40.90#ibcon#read 6, iclass 26, count 0 2006.229.10:38:40.90#ibcon#end of sib2, iclass 26, count 0 2006.229.10:38:40.90#ibcon#*after write, iclass 26, count 0 2006.229.10:38:40.90#ibcon#*before return 0, iclass 26, count 0 2006.229.10:38:40.90#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:40.90#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:40.90#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:38:40.90#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:38:40.90$vck44/vblo=1,629.99 2006.229.10:38:40.90#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.10:38:40.90#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.10:38:40.90#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:40.90#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:40.90#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:40.90#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:40.90#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:38:40.90#ibcon#first serial, iclass 28, count 0 2006.229.10:38:40.90#ibcon#enter sib2, iclass 28, count 0 2006.229.10:38:40.90#ibcon#flushed, iclass 28, count 0 2006.229.10:38:40.90#ibcon#about to write, iclass 28, count 0 2006.229.10:38:40.90#ibcon#wrote, iclass 28, count 0 2006.229.10:38:40.90#ibcon#about to read 3, iclass 28, count 0 2006.229.10:38:40.92#ibcon#read 3, iclass 28, count 0 2006.229.10:38:40.92#ibcon#about to read 4, iclass 28, count 0 2006.229.10:38:40.92#ibcon#read 4, iclass 28, count 0 2006.229.10:38:40.92#ibcon#about to read 5, iclass 28, count 0 2006.229.10:38:40.92#ibcon#read 5, iclass 28, count 0 2006.229.10:38:40.92#ibcon#about to read 6, iclass 28, count 0 2006.229.10:38:40.92#ibcon#read 6, iclass 28, count 0 2006.229.10:38:40.92#ibcon#end of sib2, iclass 28, count 0 2006.229.10:38:40.92#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:38:40.92#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:38:40.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:38:40.92#ibcon#*before write, iclass 28, count 0 2006.229.10:38:40.92#ibcon#enter sib2, iclass 28, count 0 2006.229.10:38:40.92#ibcon#flushed, iclass 28, count 0 2006.229.10:38:40.92#ibcon#about to write, iclass 28, count 0 2006.229.10:38:40.92#ibcon#wrote, iclass 28, count 0 2006.229.10:38:40.92#ibcon#about to read 3, iclass 28, count 0 2006.229.10:38:40.96#ibcon#read 3, iclass 28, count 0 2006.229.10:38:40.96#ibcon#about to read 4, iclass 28, count 0 2006.229.10:38:40.96#ibcon#read 4, iclass 28, count 0 2006.229.10:38:40.96#ibcon#about to read 5, iclass 28, count 0 2006.229.10:38:40.96#ibcon#read 5, iclass 28, count 0 2006.229.10:38:40.96#ibcon#about to read 6, iclass 28, count 0 2006.229.10:38:40.96#ibcon#read 6, iclass 28, count 0 2006.229.10:38:40.96#ibcon#end of sib2, iclass 28, count 0 2006.229.10:38:40.96#ibcon#*after write, iclass 28, count 0 2006.229.10:38:40.96#ibcon#*before return 0, iclass 28, count 0 2006.229.10:38:40.96#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:40.96#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:40.96#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:38:40.96#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:38:40.96$vck44/vb=1,4 2006.229.10:38:40.96#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.10:38:40.96#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.10:38:40.96#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:40.96#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:38:40.96#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:38:40.96#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:38:40.96#ibcon#enter wrdev, iclass 30, count 2 2006.229.10:38:40.96#ibcon#first serial, iclass 30, count 2 2006.229.10:38:40.96#ibcon#enter sib2, iclass 30, count 2 2006.229.10:38:40.96#ibcon#flushed, iclass 30, count 2 2006.229.10:38:40.96#ibcon#about to write, iclass 30, count 2 2006.229.10:38:40.96#ibcon#wrote, iclass 30, count 2 2006.229.10:38:40.96#ibcon#about to read 3, iclass 30, count 2 2006.229.10:38:40.98#ibcon#read 3, iclass 30, count 2 2006.229.10:38:40.98#ibcon#about to read 4, iclass 30, count 2 2006.229.10:38:40.98#ibcon#read 4, iclass 30, count 2 2006.229.10:38:40.98#ibcon#about to read 5, iclass 30, count 2 2006.229.10:38:40.98#ibcon#read 5, iclass 30, count 2 2006.229.10:38:40.98#ibcon#about to read 6, iclass 30, count 2 2006.229.10:38:40.98#ibcon#read 6, iclass 30, count 2 2006.229.10:38:40.98#ibcon#end of sib2, iclass 30, count 2 2006.229.10:38:40.98#ibcon#*mode == 0, iclass 30, count 2 2006.229.10:38:40.98#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.10:38:40.98#ibcon#[27=AT01-04\r\n] 2006.229.10:38:40.98#ibcon#*before write, iclass 30, count 2 2006.229.10:38:40.98#ibcon#enter sib2, iclass 30, count 2 2006.229.10:38:40.98#ibcon#flushed, iclass 30, count 2 2006.229.10:38:40.98#ibcon#about to write, iclass 30, count 2 2006.229.10:38:40.98#ibcon#wrote, iclass 30, count 2 2006.229.10:38:40.98#ibcon#about to read 3, iclass 30, count 2 2006.229.10:38:41.01#ibcon#read 3, iclass 30, count 2 2006.229.10:38:41.01#ibcon#about to read 4, iclass 30, count 2 2006.229.10:38:41.01#ibcon#read 4, iclass 30, count 2 2006.229.10:38:41.01#ibcon#about to read 5, iclass 30, count 2 2006.229.10:38:41.01#ibcon#read 5, iclass 30, count 2 2006.229.10:38:41.01#ibcon#about to read 6, iclass 30, count 2 2006.229.10:38:41.01#ibcon#read 6, iclass 30, count 2 2006.229.10:38:41.01#ibcon#end of sib2, iclass 30, count 2 2006.229.10:38:41.01#ibcon#*after write, iclass 30, count 2 2006.229.10:38:41.01#ibcon#*before return 0, iclass 30, count 2 2006.229.10:38:41.01#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:38:41.01#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:38:41.01#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.10:38:41.01#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:41.01#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:38:41.13#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:38:41.13#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:38:41.13#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:38:41.13#ibcon#first serial, iclass 30, count 0 2006.229.10:38:41.13#ibcon#enter sib2, iclass 30, count 0 2006.229.10:38:41.13#ibcon#flushed, iclass 30, count 0 2006.229.10:38:41.13#ibcon#about to write, iclass 30, count 0 2006.229.10:38:41.13#ibcon#wrote, iclass 30, count 0 2006.229.10:38:41.13#ibcon#about to read 3, iclass 30, count 0 2006.229.10:38:41.15#ibcon#read 3, iclass 30, count 0 2006.229.10:38:41.15#ibcon#about to read 4, iclass 30, count 0 2006.229.10:38:41.15#ibcon#read 4, iclass 30, count 0 2006.229.10:38:41.15#ibcon#about to read 5, iclass 30, count 0 2006.229.10:38:41.15#ibcon#read 5, iclass 30, count 0 2006.229.10:38:41.15#ibcon#about to read 6, iclass 30, count 0 2006.229.10:38:41.15#ibcon#read 6, iclass 30, count 0 2006.229.10:38:41.15#ibcon#end of sib2, iclass 30, count 0 2006.229.10:38:41.15#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:38:41.15#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:38:41.15#ibcon#[27=USB\r\n] 2006.229.10:38:41.15#ibcon#*before write, iclass 30, count 0 2006.229.10:38:41.15#ibcon#enter sib2, iclass 30, count 0 2006.229.10:38:41.15#ibcon#flushed, iclass 30, count 0 2006.229.10:38:41.15#ibcon#about to write, iclass 30, count 0 2006.229.10:38:41.15#ibcon#wrote, iclass 30, count 0 2006.229.10:38:41.15#ibcon#about to read 3, iclass 30, count 0 2006.229.10:38:41.18#ibcon#read 3, iclass 30, count 0 2006.229.10:38:41.18#ibcon#about to read 4, iclass 30, count 0 2006.229.10:38:41.18#ibcon#read 4, iclass 30, count 0 2006.229.10:38:41.18#ibcon#about to read 5, iclass 30, count 0 2006.229.10:38:41.18#ibcon#read 5, iclass 30, count 0 2006.229.10:38:41.18#ibcon#about to read 6, iclass 30, count 0 2006.229.10:38:41.18#ibcon#read 6, iclass 30, count 0 2006.229.10:38:41.18#ibcon#end of sib2, iclass 30, count 0 2006.229.10:38:41.18#ibcon#*after write, iclass 30, count 0 2006.229.10:38:41.18#ibcon#*before return 0, iclass 30, count 0 2006.229.10:38:41.18#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:38:41.18#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:38:41.18#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:38:41.18#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:38:41.18$vck44/vblo=2,634.99 2006.229.10:38:41.18#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.10:38:41.18#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.10:38:41.18#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:41.18#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:41.18#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:41.18#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:41.18#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:38:41.18#ibcon#first serial, iclass 32, count 0 2006.229.10:38:41.18#ibcon#enter sib2, iclass 32, count 0 2006.229.10:38:41.18#ibcon#flushed, iclass 32, count 0 2006.229.10:38:41.18#ibcon#about to write, iclass 32, count 0 2006.229.10:38:41.18#ibcon#wrote, iclass 32, count 0 2006.229.10:38:41.18#ibcon#about to read 3, iclass 32, count 0 2006.229.10:38:41.20#ibcon#read 3, iclass 32, count 0 2006.229.10:38:41.20#ibcon#about to read 4, iclass 32, count 0 2006.229.10:38:41.20#ibcon#read 4, iclass 32, count 0 2006.229.10:38:41.20#ibcon#about to read 5, iclass 32, count 0 2006.229.10:38:41.20#ibcon#read 5, iclass 32, count 0 2006.229.10:38:41.20#ibcon#about to read 6, iclass 32, count 0 2006.229.10:38:41.20#ibcon#read 6, iclass 32, count 0 2006.229.10:38:41.20#ibcon#end of sib2, iclass 32, count 0 2006.229.10:38:41.20#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:38:41.20#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:38:41.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:38:41.20#ibcon#*before write, iclass 32, count 0 2006.229.10:38:41.20#ibcon#enter sib2, iclass 32, count 0 2006.229.10:38:41.20#ibcon#flushed, iclass 32, count 0 2006.229.10:38:41.20#ibcon#about to write, iclass 32, count 0 2006.229.10:38:41.20#ibcon#wrote, iclass 32, count 0 2006.229.10:38:41.20#ibcon#about to read 3, iclass 32, count 0 2006.229.10:38:41.24#ibcon#read 3, iclass 32, count 0 2006.229.10:38:41.24#ibcon#about to read 4, iclass 32, count 0 2006.229.10:38:41.24#ibcon#read 4, iclass 32, count 0 2006.229.10:38:41.24#ibcon#about to read 5, iclass 32, count 0 2006.229.10:38:41.24#ibcon#read 5, iclass 32, count 0 2006.229.10:38:41.24#ibcon#about to read 6, iclass 32, count 0 2006.229.10:38:41.24#ibcon#read 6, iclass 32, count 0 2006.229.10:38:41.24#ibcon#end of sib2, iclass 32, count 0 2006.229.10:38:41.24#ibcon#*after write, iclass 32, count 0 2006.229.10:38:41.24#ibcon#*before return 0, iclass 32, count 0 2006.229.10:38:41.24#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:41.24#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:38:41.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:38:41.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:38:41.24$vck44/vb=2,4 2006.229.10:38:41.24#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.10:38:41.24#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.10:38:41.24#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:41.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:41.30#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:41.30#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:41.30#ibcon#enter wrdev, iclass 34, count 2 2006.229.10:38:41.30#ibcon#first serial, iclass 34, count 2 2006.229.10:38:41.30#ibcon#enter sib2, iclass 34, count 2 2006.229.10:38:41.30#ibcon#flushed, iclass 34, count 2 2006.229.10:38:41.30#ibcon#about to write, iclass 34, count 2 2006.229.10:38:41.30#ibcon#wrote, iclass 34, count 2 2006.229.10:38:41.30#ibcon#about to read 3, iclass 34, count 2 2006.229.10:38:41.32#ibcon#read 3, iclass 34, count 2 2006.229.10:38:41.32#ibcon#about to read 4, iclass 34, count 2 2006.229.10:38:41.32#ibcon#read 4, iclass 34, count 2 2006.229.10:38:41.32#ibcon#about to read 5, iclass 34, count 2 2006.229.10:38:41.32#ibcon#read 5, iclass 34, count 2 2006.229.10:38:41.32#ibcon#about to read 6, iclass 34, count 2 2006.229.10:38:41.32#ibcon#read 6, iclass 34, count 2 2006.229.10:38:41.32#ibcon#end of sib2, iclass 34, count 2 2006.229.10:38:41.32#ibcon#*mode == 0, iclass 34, count 2 2006.229.10:38:41.32#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.10:38:41.32#ibcon#[27=AT02-04\r\n] 2006.229.10:38:41.32#ibcon#*before write, iclass 34, count 2 2006.229.10:38:41.32#ibcon#enter sib2, iclass 34, count 2 2006.229.10:38:41.32#ibcon#flushed, iclass 34, count 2 2006.229.10:38:41.32#ibcon#about to write, iclass 34, count 2 2006.229.10:38:41.32#ibcon#wrote, iclass 34, count 2 2006.229.10:38:41.32#ibcon#about to read 3, iclass 34, count 2 2006.229.10:38:41.35#ibcon#read 3, iclass 34, count 2 2006.229.10:38:41.35#ibcon#about to read 4, iclass 34, count 2 2006.229.10:38:41.35#ibcon#read 4, iclass 34, count 2 2006.229.10:38:41.35#ibcon#about to read 5, iclass 34, count 2 2006.229.10:38:41.35#ibcon#read 5, iclass 34, count 2 2006.229.10:38:41.35#ibcon#about to read 6, iclass 34, count 2 2006.229.10:38:41.35#ibcon#read 6, iclass 34, count 2 2006.229.10:38:41.35#ibcon#end of sib2, iclass 34, count 2 2006.229.10:38:41.35#ibcon#*after write, iclass 34, count 2 2006.229.10:38:41.35#ibcon#*before return 0, iclass 34, count 2 2006.229.10:38:41.35#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:41.35#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:38:41.35#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.10:38:41.35#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:41.35#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:41.47#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:41.47#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:41.47#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:38:41.47#ibcon#first serial, iclass 34, count 0 2006.229.10:38:41.47#ibcon#enter sib2, iclass 34, count 0 2006.229.10:38:41.47#ibcon#flushed, iclass 34, count 0 2006.229.10:38:41.47#ibcon#about to write, iclass 34, count 0 2006.229.10:38:41.47#ibcon#wrote, iclass 34, count 0 2006.229.10:38:41.47#ibcon#about to read 3, iclass 34, count 0 2006.229.10:38:41.49#ibcon#read 3, iclass 34, count 0 2006.229.10:38:41.49#ibcon#about to read 4, iclass 34, count 0 2006.229.10:38:41.49#ibcon#read 4, iclass 34, count 0 2006.229.10:38:41.49#ibcon#about to read 5, iclass 34, count 0 2006.229.10:38:41.49#ibcon#read 5, iclass 34, count 0 2006.229.10:38:41.49#ibcon#about to read 6, iclass 34, count 0 2006.229.10:38:41.49#ibcon#read 6, iclass 34, count 0 2006.229.10:38:41.49#ibcon#end of sib2, iclass 34, count 0 2006.229.10:38:41.49#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:38:41.49#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:38:41.49#ibcon#[27=USB\r\n] 2006.229.10:38:41.49#ibcon#*before write, iclass 34, count 0 2006.229.10:38:41.49#ibcon#enter sib2, iclass 34, count 0 2006.229.10:38:41.49#ibcon#flushed, iclass 34, count 0 2006.229.10:38:41.49#ibcon#about to write, iclass 34, count 0 2006.229.10:38:41.49#ibcon#wrote, iclass 34, count 0 2006.229.10:38:41.49#ibcon#about to read 3, iclass 34, count 0 2006.229.10:38:41.52#ibcon#read 3, iclass 34, count 0 2006.229.10:38:41.52#ibcon#about to read 4, iclass 34, count 0 2006.229.10:38:41.52#ibcon#read 4, iclass 34, count 0 2006.229.10:38:41.52#ibcon#about to read 5, iclass 34, count 0 2006.229.10:38:41.52#ibcon#read 5, iclass 34, count 0 2006.229.10:38:41.52#ibcon#about to read 6, iclass 34, count 0 2006.229.10:38:41.52#ibcon#read 6, iclass 34, count 0 2006.229.10:38:41.52#ibcon#end of sib2, iclass 34, count 0 2006.229.10:38:41.52#ibcon#*after write, iclass 34, count 0 2006.229.10:38:41.52#ibcon#*before return 0, iclass 34, count 0 2006.229.10:38:41.52#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:41.52#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:38:41.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:38:41.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:38:41.52$vck44/vblo=3,649.99 2006.229.10:38:41.52#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:38:41.52#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:38:41.52#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:41.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:41.52#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:41.52#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:41.52#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:38:41.52#ibcon#first serial, iclass 36, count 0 2006.229.10:38:41.52#ibcon#enter sib2, iclass 36, count 0 2006.229.10:38:41.52#ibcon#flushed, iclass 36, count 0 2006.229.10:38:41.52#ibcon#about to write, iclass 36, count 0 2006.229.10:38:41.52#ibcon#wrote, iclass 36, count 0 2006.229.10:38:41.52#ibcon#about to read 3, iclass 36, count 0 2006.229.10:38:41.54#ibcon#read 3, iclass 36, count 0 2006.229.10:38:41.54#ibcon#about to read 4, iclass 36, count 0 2006.229.10:38:41.54#ibcon#read 4, iclass 36, count 0 2006.229.10:38:41.54#ibcon#about to read 5, iclass 36, count 0 2006.229.10:38:41.54#ibcon#read 5, iclass 36, count 0 2006.229.10:38:41.54#ibcon#about to read 6, iclass 36, count 0 2006.229.10:38:41.54#ibcon#read 6, iclass 36, count 0 2006.229.10:38:41.54#ibcon#end of sib2, iclass 36, count 0 2006.229.10:38:41.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:38:41.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:38:41.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:38:41.54#ibcon#*before write, iclass 36, count 0 2006.229.10:38:41.54#ibcon#enter sib2, iclass 36, count 0 2006.229.10:38:41.54#ibcon#flushed, iclass 36, count 0 2006.229.10:38:41.54#ibcon#about to write, iclass 36, count 0 2006.229.10:38:41.54#ibcon#wrote, iclass 36, count 0 2006.229.10:38:41.54#ibcon#about to read 3, iclass 36, count 0 2006.229.10:38:41.58#ibcon#read 3, iclass 36, count 0 2006.229.10:38:41.58#ibcon#about to read 4, iclass 36, count 0 2006.229.10:38:41.58#ibcon#read 4, iclass 36, count 0 2006.229.10:38:41.58#ibcon#about to read 5, iclass 36, count 0 2006.229.10:38:41.58#ibcon#read 5, iclass 36, count 0 2006.229.10:38:41.58#ibcon#about to read 6, iclass 36, count 0 2006.229.10:38:41.58#ibcon#read 6, iclass 36, count 0 2006.229.10:38:41.58#ibcon#end of sib2, iclass 36, count 0 2006.229.10:38:41.58#ibcon#*after write, iclass 36, count 0 2006.229.10:38:41.58#ibcon#*before return 0, iclass 36, count 0 2006.229.10:38:41.58#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:41.58#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:38:41.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:38:41.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:38:41.58$vck44/vb=3,4 2006.229.10:38:41.58#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.10:38:41.58#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.10:38:41.58#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:41.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:41.64#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:41.64#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:41.64#ibcon#enter wrdev, iclass 38, count 2 2006.229.10:38:41.64#ibcon#first serial, iclass 38, count 2 2006.229.10:38:41.64#ibcon#enter sib2, iclass 38, count 2 2006.229.10:38:41.64#ibcon#flushed, iclass 38, count 2 2006.229.10:38:41.64#ibcon#about to write, iclass 38, count 2 2006.229.10:38:41.64#ibcon#wrote, iclass 38, count 2 2006.229.10:38:41.64#ibcon#about to read 3, iclass 38, count 2 2006.229.10:38:41.66#ibcon#read 3, iclass 38, count 2 2006.229.10:38:41.66#ibcon#about to read 4, iclass 38, count 2 2006.229.10:38:41.66#ibcon#read 4, iclass 38, count 2 2006.229.10:38:41.66#ibcon#about to read 5, iclass 38, count 2 2006.229.10:38:41.66#ibcon#read 5, iclass 38, count 2 2006.229.10:38:41.66#ibcon#about to read 6, iclass 38, count 2 2006.229.10:38:41.66#ibcon#read 6, iclass 38, count 2 2006.229.10:38:41.66#ibcon#end of sib2, iclass 38, count 2 2006.229.10:38:41.66#ibcon#*mode == 0, iclass 38, count 2 2006.229.10:38:41.66#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.10:38:41.66#ibcon#[27=AT03-04\r\n] 2006.229.10:38:41.66#ibcon#*before write, iclass 38, count 2 2006.229.10:38:41.66#ibcon#enter sib2, iclass 38, count 2 2006.229.10:38:41.66#ibcon#flushed, iclass 38, count 2 2006.229.10:38:41.66#ibcon#about to write, iclass 38, count 2 2006.229.10:38:41.66#ibcon#wrote, iclass 38, count 2 2006.229.10:38:41.66#ibcon#about to read 3, iclass 38, count 2 2006.229.10:38:41.69#ibcon#read 3, iclass 38, count 2 2006.229.10:38:41.69#ibcon#about to read 4, iclass 38, count 2 2006.229.10:38:41.69#ibcon#read 4, iclass 38, count 2 2006.229.10:38:41.69#ibcon#about to read 5, iclass 38, count 2 2006.229.10:38:41.69#ibcon#read 5, iclass 38, count 2 2006.229.10:38:41.69#ibcon#about to read 6, iclass 38, count 2 2006.229.10:38:41.69#ibcon#read 6, iclass 38, count 2 2006.229.10:38:41.69#ibcon#end of sib2, iclass 38, count 2 2006.229.10:38:41.69#ibcon#*after write, iclass 38, count 2 2006.229.10:38:41.69#ibcon#*before return 0, iclass 38, count 2 2006.229.10:38:41.69#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:41.69#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:38:41.69#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.10:38:41.69#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:41.69#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:41.81#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:41.81#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:41.81#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:38:41.81#ibcon#first serial, iclass 38, count 0 2006.229.10:38:41.81#ibcon#enter sib2, iclass 38, count 0 2006.229.10:38:41.81#ibcon#flushed, iclass 38, count 0 2006.229.10:38:41.81#ibcon#about to write, iclass 38, count 0 2006.229.10:38:41.81#ibcon#wrote, iclass 38, count 0 2006.229.10:38:41.81#ibcon#about to read 3, iclass 38, count 0 2006.229.10:38:41.83#ibcon#read 3, iclass 38, count 0 2006.229.10:38:41.83#ibcon#about to read 4, iclass 38, count 0 2006.229.10:38:41.83#ibcon#read 4, iclass 38, count 0 2006.229.10:38:41.83#ibcon#about to read 5, iclass 38, count 0 2006.229.10:38:41.83#ibcon#read 5, iclass 38, count 0 2006.229.10:38:41.83#ibcon#about to read 6, iclass 38, count 0 2006.229.10:38:41.83#ibcon#read 6, iclass 38, count 0 2006.229.10:38:41.83#ibcon#end of sib2, iclass 38, count 0 2006.229.10:38:41.83#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:38:41.83#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:38:41.83#ibcon#[27=USB\r\n] 2006.229.10:38:41.83#ibcon#*before write, iclass 38, count 0 2006.229.10:38:41.83#ibcon#enter sib2, iclass 38, count 0 2006.229.10:38:41.83#ibcon#flushed, iclass 38, count 0 2006.229.10:38:41.83#ibcon#about to write, iclass 38, count 0 2006.229.10:38:41.83#ibcon#wrote, iclass 38, count 0 2006.229.10:38:41.83#ibcon#about to read 3, iclass 38, count 0 2006.229.10:38:41.86#ibcon#read 3, iclass 38, count 0 2006.229.10:38:41.86#ibcon#about to read 4, iclass 38, count 0 2006.229.10:38:41.86#ibcon#read 4, iclass 38, count 0 2006.229.10:38:41.86#ibcon#about to read 5, iclass 38, count 0 2006.229.10:38:41.86#ibcon#read 5, iclass 38, count 0 2006.229.10:38:41.86#ibcon#about to read 6, iclass 38, count 0 2006.229.10:38:41.86#ibcon#read 6, iclass 38, count 0 2006.229.10:38:41.86#ibcon#end of sib2, iclass 38, count 0 2006.229.10:38:41.86#ibcon#*after write, iclass 38, count 0 2006.229.10:38:41.86#ibcon#*before return 0, iclass 38, count 0 2006.229.10:38:41.86#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:41.86#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:38:41.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:38:41.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:38:41.86$vck44/vblo=4,679.99 2006.229.10:38:41.86#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.10:38:41.86#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.10:38:41.86#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:41.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:41.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:41.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:41.86#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:38:41.86#ibcon#first serial, iclass 40, count 0 2006.229.10:38:41.86#ibcon#enter sib2, iclass 40, count 0 2006.229.10:38:41.86#ibcon#flushed, iclass 40, count 0 2006.229.10:38:41.86#ibcon#about to write, iclass 40, count 0 2006.229.10:38:41.86#ibcon#wrote, iclass 40, count 0 2006.229.10:38:41.86#ibcon#about to read 3, iclass 40, count 0 2006.229.10:38:41.88#ibcon#read 3, iclass 40, count 0 2006.229.10:38:41.88#ibcon#about to read 4, iclass 40, count 0 2006.229.10:38:41.88#ibcon#read 4, iclass 40, count 0 2006.229.10:38:41.88#ibcon#about to read 5, iclass 40, count 0 2006.229.10:38:41.88#ibcon#read 5, iclass 40, count 0 2006.229.10:38:41.88#ibcon#about to read 6, iclass 40, count 0 2006.229.10:38:41.88#ibcon#read 6, iclass 40, count 0 2006.229.10:38:41.88#ibcon#end of sib2, iclass 40, count 0 2006.229.10:38:41.88#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:38:41.88#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:38:41.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:38:41.88#ibcon#*before write, iclass 40, count 0 2006.229.10:38:41.88#ibcon#enter sib2, iclass 40, count 0 2006.229.10:38:41.88#ibcon#flushed, iclass 40, count 0 2006.229.10:38:41.88#ibcon#about to write, iclass 40, count 0 2006.229.10:38:41.88#ibcon#wrote, iclass 40, count 0 2006.229.10:38:41.88#ibcon#about to read 3, iclass 40, count 0 2006.229.10:38:41.92#ibcon#read 3, iclass 40, count 0 2006.229.10:38:41.92#ibcon#about to read 4, iclass 40, count 0 2006.229.10:38:41.92#ibcon#read 4, iclass 40, count 0 2006.229.10:38:41.92#ibcon#about to read 5, iclass 40, count 0 2006.229.10:38:41.92#ibcon#read 5, iclass 40, count 0 2006.229.10:38:41.92#ibcon#about to read 6, iclass 40, count 0 2006.229.10:38:41.92#ibcon#read 6, iclass 40, count 0 2006.229.10:38:41.92#ibcon#end of sib2, iclass 40, count 0 2006.229.10:38:41.92#ibcon#*after write, iclass 40, count 0 2006.229.10:38:41.92#ibcon#*before return 0, iclass 40, count 0 2006.229.10:38:41.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:41.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:38:41.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:38:41.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:38:41.92$vck44/vb=4,4 2006.229.10:38:41.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.10:38:41.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.10:38:41.92#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:41.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:41.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:41.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:41.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.10:38:41.98#ibcon#first serial, iclass 4, count 2 2006.229.10:38:41.98#ibcon#enter sib2, iclass 4, count 2 2006.229.10:38:41.98#ibcon#flushed, iclass 4, count 2 2006.229.10:38:41.98#ibcon#about to write, iclass 4, count 2 2006.229.10:38:41.98#ibcon#wrote, iclass 4, count 2 2006.229.10:38:41.98#ibcon#about to read 3, iclass 4, count 2 2006.229.10:38:42.00#ibcon#read 3, iclass 4, count 2 2006.229.10:38:42.00#ibcon#about to read 4, iclass 4, count 2 2006.229.10:38:42.00#ibcon#read 4, iclass 4, count 2 2006.229.10:38:42.00#ibcon#about to read 5, iclass 4, count 2 2006.229.10:38:42.00#ibcon#read 5, iclass 4, count 2 2006.229.10:38:42.00#ibcon#about to read 6, iclass 4, count 2 2006.229.10:38:42.00#ibcon#read 6, iclass 4, count 2 2006.229.10:38:42.00#ibcon#end of sib2, iclass 4, count 2 2006.229.10:38:42.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.10:38:42.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.10:38:42.00#ibcon#[27=AT04-04\r\n] 2006.229.10:38:42.00#ibcon#*before write, iclass 4, count 2 2006.229.10:38:42.00#ibcon#enter sib2, iclass 4, count 2 2006.229.10:38:42.00#ibcon#flushed, iclass 4, count 2 2006.229.10:38:42.00#ibcon#about to write, iclass 4, count 2 2006.229.10:38:42.00#ibcon#wrote, iclass 4, count 2 2006.229.10:38:42.00#ibcon#about to read 3, iclass 4, count 2 2006.229.10:38:42.03#ibcon#read 3, iclass 4, count 2 2006.229.10:38:42.03#ibcon#about to read 4, iclass 4, count 2 2006.229.10:38:42.03#ibcon#read 4, iclass 4, count 2 2006.229.10:38:42.03#ibcon#about to read 5, iclass 4, count 2 2006.229.10:38:42.03#ibcon#read 5, iclass 4, count 2 2006.229.10:38:42.03#ibcon#about to read 6, iclass 4, count 2 2006.229.10:38:42.03#ibcon#read 6, iclass 4, count 2 2006.229.10:38:42.03#ibcon#end of sib2, iclass 4, count 2 2006.229.10:38:42.03#ibcon#*after write, iclass 4, count 2 2006.229.10:38:42.03#ibcon#*before return 0, iclass 4, count 2 2006.229.10:38:42.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:42.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:38:42.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.10:38:42.03#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:42.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:42.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:42.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:42.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:38:42.15#ibcon#first serial, iclass 4, count 0 2006.229.10:38:42.15#ibcon#enter sib2, iclass 4, count 0 2006.229.10:38:42.15#ibcon#flushed, iclass 4, count 0 2006.229.10:38:42.15#ibcon#about to write, iclass 4, count 0 2006.229.10:38:42.15#ibcon#wrote, iclass 4, count 0 2006.229.10:38:42.15#ibcon#about to read 3, iclass 4, count 0 2006.229.10:38:42.17#ibcon#read 3, iclass 4, count 0 2006.229.10:38:42.17#ibcon#about to read 4, iclass 4, count 0 2006.229.10:38:42.17#ibcon#read 4, iclass 4, count 0 2006.229.10:38:42.17#ibcon#about to read 5, iclass 4, count 0 2006.229.10:38:42.17#ibcon#read 5, iclass 4, count 0 2006.229.10:38:42.17#ibcon#about to read 6, iclass 4, count 0 2006.229.10:38:42.17#ibcon#read 6, iclass 4, count 0 2006.229.10:38:42.17#ibcon#end of sib2, iclass 4, count 0 2006.229.10:38:42.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:38:42.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:38:42.17#ibcon#[27=USB\r\n] 2006.229.10:38:42.17#ibcon#*before write, iclass 4, count 0 2006.229.10:38:42.17#ibcon#enter sib2, iclass 4, count 0 2006.229.10:38:42.17#ibcon#flushed, iclass 4, count 0 2006.229.10:38:42.17#ibcon#about to write, iclass 4, count 0 2006.229.10:38:42.17#ibcon#wrote, iclass 4, count 0 2006.229.10:38:42.17#ibcon#about to read 3, iclass 4, count 0 2006.229.10:38:42.20#ibcon#read 3, iclass 4, count 0 2006.229.10:38:42.20#ibcon#about to read 4, iclass 4, count 0 2006.229.10:38:42.20#ibcon#read 4, iclass 4, count 0 2006.229.10:38:42.20#ibcon#about to read 5, iclass 4, count 0 2006.229.10:38:42.20#ibcon#read 5, iclass 4, count 0 2006.229.10:38:42.20#ibcon#about to read 6, iclass 4, count 0 2006.229.10:38:42.20#ibcon#read 6, iclass 4, count 0 2006.229.10:38:42.20#ibcon#end of sib2, iclass 4, count 0 2006.229.10:38:42.20#ibcon#*after write, iclass 4, count 0 2006.229.10:38:42.20#ibcon#*before return 0, iclass 4, count 0 2006.229.10:38:42.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:42.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:38:42.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:38:42.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:38:42.20$vck44/vblo=5,709.99 2006.229.10:38:42.20#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.10:38:42.20#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.10:38:42.20#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:42.20#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:38:42.20#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:38:42.20#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:38:42.20#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:38:42.20#ibcon#first serial, iclass 7, count 0 2006.229.10:38:42.20#ibcon#enter sib2, iclass 7, count 0 2006.229.10:38:42.20#ibcon#flushed, iclass 7, count 0 2006.229.10:38:42.20#ibcon#about to write, iclass 7, count 0 2006.229.10:38:42.20#ibcon#wrote, iclass 7, count 0 2006.229.10:38:42.20#ibcon#about to read 3, iclass 7, count 0 2006.229.10:38:42.22#ibcon#read 3, iclass 7, count 0 2006.229.10:38:42.22#ibcon#about to read 4, iclass 7, count 0 2006.229.10:38:42.22#ibcon#read 4, iclass 7, count 0 2006.229.10:38:42.22#ibcon#about to read 5, iclass 7, count 0 2006.229.10:38:42.22#ibcon#read 5, iclass 7, count 0 2006.229.10:38:42.22#ibcon#about to read 6, iclass 7, count 0 2006.229.10:38:42.22#ibcon#read 6, iclass 7, count 0 2006.229.10:38:42.22#ibcon#end of sib2, iclass 7, count 0 2006.229.10:38:42.22#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:38:42.22#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:38:42.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:38:42.22#ibcon#*before write, iclass 7, count 0 2006.229.10:38:42.22#ibcon#enter sib2, iclass 7, count 0 2006.229.10:38:42.22#ibcon#flushed, iclass 7, count 0 2006.229.10:38:42.22#ibcon#about to write, iclass 7, count 0 2006.229.10:38:42.22#ibcon#wrote, iclass 7, count 0 2006.229.10:38:42.22#ibcon#about to read 3, iclass 7, count 0 2006.229.10:38:42.22#abcon#<5=/04 1.5 2.4 28.46 991001.6\r\n> 2006.229.10:38:42.24#abcon#{5=INTERFACE CLEAR} 2006.229.10:38:42.26#ibcon#read 3, iclass 7, count 0 2006.229.10:38:42.26#ibcon#about to read 4, iclass 7, count 0 2006.229.10:38:42.26#ibcon#read 4, iclass 7, count 0 2006.229.10:38:42.26#ibcon#about to read 5, iclass 7, count 0 2006.229.10:38:42.26#ibcon#read 5, iclass 7, count 0 2006.229.10:38:42.26#ibcon#about to read 6, iclass 7, count 0 2006.229.10:38:42.26#ibcon#read 6, iclass 7, count 0 2006.229.10:38:42.26#ibcon#end of sib2, iclass 7, count 0 2006.229.10:38:42.26#ibcon#*after write, iclass 7, count 0 2006.229.10:38:42.26#ibcon#*before return 0, iclass 7, count 0 2006.229.10:38:42.26#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:38:42.26#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:38:42.26#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:38:42.26#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:38:42.26$vck44/vb=5,4 2006.229.10:38:42.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.10:38:42.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.10:38:42.26#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:42.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:38:42.30#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:38:42.32#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:38:42.32#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:38:42.32#ibcon#enter wrdev, iclass 13, count 2 2006.229.10:38:42.32#ibcon#first serial, iclass 13, count 2 2006.229.10:38:42.32#ibcon#enter sib2, iclass 13, count 2 2006.229.10:38:42.32#ibcon#flushed, iclass 13, count 2 2006.229.10:38:42.32#ibcon#about to write, iclass 13, count 2 2006.229.10:38:42.32#ibcon#wrote, iclass 13, count 2 2006.229.10:38:42.32#ibcon#about to read 3, iclass 13, count 2 2006.229.10:38:42.34#ibcon#read 3, iclass 13, count 2 2006.229.10:38:42.34#ibcon#about to read 4, iclass 13, count 2 2006.229.10:38:42.34#ibcon#read 4, iclass 13, count 2 2006.229.10:38:42.34#ibcon#about to read 5, iclass 13, count 2 2006.229.10:38:42.34#ibcon#read 5, iclass 13, count 2 2006.229.10:38:42.34#ibcon#about to read 6, iclass 13, count 2 2006.229.10:38:42.34#ibcon#read 6, iclass 13, count 2 2006.229.10:38:42.34#ibcon#end of sib2, iclass 13, count 2 2006.229.10:38:42.34#ibcon#*mode == 0, iclass 13, count 2 2006.229.10:38:42.34#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.10:38:42.34#ibcon#[27=AT05-04\r\n] 2006.229.10:38:42.34#ibcon#*before write, iclass 13, count 2 2006.229.10:38:42.34#ibcon#enter sib2, iclass 13, count 2 2006.229.10:38:42.34#ibcon#flushed, iclass 13, count 2 2006.229.10:38:42.34#ibcon#about to write, iclass 13, count 2 2006.229.10:38:42.34#ibcon#wrote, iclass 13, count 2 2006.229.10:38:42.34#ibcon#about to read 3, iclass 13, count 2 2006.229.10:38:42.37#ibcon#read 3, iclass 13, count 2 2006.229.10:38:42.37#ibcon#about to read 4, iclass 13, count 2 2006.229.10:38:42.37#ibcon#read 4, iclass 13, count 2 2006.229.10:38:42.37#ibcon#about to read 5, iclass 13, count 2 2006.229.10:38:42.37#ibcon#read 5, iclass 13, count 2 2006.229.10:38:42.37#ibcon#about to read 6, iclass 13, count 2 2006.229.10:38:42.37#ibcon#read 6, iclass 13, count 2 2006.229.10:38:42.37#ibcon#end of sib2, iclass 13, count 2 2006.229.10:38:42.37#ibcon#*after write, iclass 13, count 2 2006.229.10:38:42.37#ibcon#*before return 0, iclass 13, count 2 2006.229.10:38:42.37#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:38:42.37#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.10:38:42.37#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.10:38:42.37#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:42.37#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:38:42.49#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:38:42.49#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:38:42.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:38:42.49#ibcon#first serial, iclass 13, count 0 2006.229.10:38:42.49#ibcon#enter sib2, iclass 13, count 0 2006.229.10:38:42.49#ibcon#flushed, iclass 13, count 0 2006.229.10:38:42.49#ibcon#about to write, iclass 13, count 0 2006.229.10:38:42.49#ibcon#wrote, iclass 13, count 0 2006.229.10:38:42.49#ibcon#about to read 3, iclass 13, count 0 2006.229.10:38:42.51#ibcon#read 3, iclass 13, count 0 2006.229.10:38:42.51#ibcon#about to read 4, iclass 13, count 0 2006.229.10:38:42.51#ibcon#read 4, iclass 13, count 0 2006.229.10:38:42.51#ibcon#about to read 5, iclass 13, count 0 2006.229.10:38:42.51#ibcon#read 5, iclass 13, count 0 2006.229.10:38:42.51#ibcon#about to read 6, iclass 13, count 0 2006.229.10:38:42.51#ibcon#read 6, iclass 13, count 0 2006.229.10:38:42.51#ibcon#end of sib2, iclass 13, count 0 2006.229.10:38:42.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:38:42.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:38:42.51#ibcon#[27=USB\r\n] 2006.229.10:38:42.51#ibcon#*before write, iclass 13, count 0 2006.229.10:38:42.51#ibcon#enter sib2, iclass 13, count 0 2006.229.10:38:42.51#ibcon#flushed, iclass 13, count 0 2006.229.10:38:42.51#ibcon#about to write, iclass 13, count 0 2006.229.10:38:42.51#ibcon#wrote, iclass 13, count 0 2006.229.10:38:42.51#ibcon#about to read 3, iclass 13, count 0 2006.229.10:38:42.54#ibcon#read 3, iclass 13, count 0 2006.229.10:38:42.54#ibcon#about to read 4, iclass 13, count 0 2006.229.10:38:42.54#ibcon#read 4, iclass 13, count 0 2006.229.10:38:42.54#ibcon#about to read 5, iclass 13, count 0 2006.229.10:38:42.54#ibcon#read 5, iclass 13, count 0 2006.229.10:38:42.54#ibcon#about to read 6, iclass 13, count 0 2006.229.10:38:42.54#ibcon#read 6, iclass 13, count 0 2006.229.10:38:42.54#ibcon#end of sib2, iclass 13, count 0 2006.229.10:38:42.54#ibcon#*after write, iclass 13, count 0 2006.229.10:38:42.54#ibcon#*before return 0, iclass 13, count 0 2006.229.10:38:42.54#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:38:42.54#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.10:38:42.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:38:42.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:38:42.54$vck44/vblo=6,719.99 2006.229.10:38:42.54#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.10:38:42.54#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.10:38:42.54#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:42.54#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:42.54#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:42.54#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:42.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:38:42.54#ibcon#first serial, iclass 16, count 0 2006.229.10:38:42.54#ibcon#enter sib2, iclass 16, count 0 2006.229.10:38:42.54#ibcon#flushed, iclass 16, count 0 2006.229.10:38:42.54#ibcon#about to write, iclass 16, count 0 2006.229.10:38:42.54#ibcon#wrote, iclass 16, count 0 2006.229.10:38:42.54#ibcon#about to read 3, iclass 16, count 0 2006.229.10:38:42.56#ibcon#read 3, iclass 16, count 0 2006.229.10:38:42.56#ibcon#about to read 4, iclass 16, count 0 2006.229.10:38:42.56#ibcon#read 4, iclass 16, count 0 2006.229.10:38:42.56#ibcon#about to read 5, iclass 16, count 0 2006.229.10:38:42.56#ibcon#read 5, iclass 16, count 0 2006.229.10:38:42.56#ibcon#about to read 6, iclass 16, count 0 2006.229.10:38:42.56#ibcon#read 6, iclass 16, count 0 2006.229.10:38:42.56#ibcon#end of sib2, iclass 16, count 0 2006.229.10:38:42.56#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:38:42.56#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:38:42.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:38:42.56#ibcon#*before write, iclass 16, count 0 2006.229.10:38:42.56#ibcon#enter sib2, iclass 16, count 0 2006.229.10:38:42.56#ibcon#flushed, iclass 16, count 0 2006.229.10:38:42.56#ibcon#about to write, iclass 16, count 0 2006.229.10:38:42.56#ibcon#wrote, iclass 16, count 0 2006.229.10:38:42.56#ibcon#about to read 3, iclass 16, count 0 2006.229.10:38:42.60#ibcon#read 3, iclass 16, count 0 2006.229.10:38:42.60#ibcon#about to read 4, iclass 16, count 0 2006.229.10:38:42.60#ibcon#read 4, iclass 16, count 0 2006.229.10:38:42.60#ibcon#about to read 5, iclass 16, count 0 2006.229.10:38:42.60#ibcon#read 5, iclass 16, count 0 2006.229.10:38:42.60#ibcon#about to read 6, iclass 16, count 0 2006.229.10:38:42.60#ibcon#read 6, iclass 16, count 0 2006.229.10:38:42.60#ibcon#end of sib2, iclass 16, count 0 2006.229.10:38:42.60#ibcon#*after write, iclass 16, count 0 2006.229.10:38:42.60#ibcon#*before return 0, iclass 16, count 0 2006.229.10:38:42.60#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:42.60#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:38:42.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:38:42.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:38:42.60$vck44/vb=6,4 2006.229.10:38:42.60#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.10:38:42.60#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.10:38:42.60#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:42.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:42.66#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:42.66#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:42.66#ibcon#enter wrdev, iclass 18, count 2 2006.229.10:38:42.66#ibcon#first serial, iclass 18, count 2 2006.229.10:38:42.66#ibcon#enter sib2, iclass 18, count 2 2006.229.10:38:42.66#ibcon#flushed, iclass 18, count 2 2006.229.10:38:42.66#ibcon#about to write, iclass 18, count 2 2006.229.10:38:42.66#ibcon#wrote, iclass 18, count 2 2006.229.10:38:42.66#ibcon#about to read 3, iclass 18, count 2 2006.229.10:38:42.68#ibcon#read 3, iclass 18, count 2 2006.229.10:38:42.68#ibcon#about to read 4, iclass 18, count 2 2006.229.10:38:42.68#ibcon#read 4, iclass 18, count 2 2006.229.10:38:42.68#ibcon#about to read 5, iclass 18, count 2 2006.229.10:38:42.68#ibcon#read 5, iclass 18, count 2 2006.229.10:38:42.68#ibcon#about to read 6, iclass 18, count 2 2006.229.10:38:42.68#ibcon#read 6, iclass 18, count 2 2006.229.10:38:42.68#ibcon#end of sib2, iclass 18, count 2 2006.229.10:38:42.68#ibcon#*mode == 0, iclass 18, count 2 2006.229.10:38:42.68#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.10:38:42.68#ibcon#[27=AT06-04\r\n] 2006.229.10:38:42.68#ibcon#*before write, iclass 18, count 2 2006.229.10:38:42.68#ibcon#enter sib2, iclass 18, count 2 2006.229.10:38:42.68#ibcon#flushed, iclass 18, count 2 2006.229.10:38:42.68#ibcon#about to write, iclass 18, count 2 2006.229.10:38:42.68#ibcon#wrote, iclass 18, count 2 2006.229.10:38:42.68#ibcon#about to read 3, iclass 18, count 2 2006.229.10:38:42.71#ibcon#read 3, iclass 18, count 2 2006.229.10:38:42.71#ibcon#about to read 4, iclass 18, count 2 2006.229.10:38:42.71#ibcon#read 4, iclass 18, count 2 2006.229.10:38:42.71#ibcon#about to read 5, iclass 18, count 2 2006.229.10:38:42.71#ibcon#read 5, iclass 18, count 2 2006.229.10:38:42.71#ibcon#about to read 6, iclass 18, count 2 2006.229.10:38:42.71#ibcon#read 6, iclass 18, count 2 2006.229.10:38:42.71#ibcon#end of sib2, iclass 18, count 2 2006.229.10:38:42.71#ibcon#*after write, iclass 18, count 2 2006.229.10:38:42.71#ibcon#*before return 0, iclass 18, count 2 2006.229.10:38:42.71#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:42.71#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:38:42.71#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.10:38:42.71#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:42.71#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:42.83#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:42.83#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:42.83#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:38:42.83#ibcon#first serial, iclass 18, count 0 2006.229.10:38:42.83#ibcon#enter sib2, iclass 18, count 0 2006.229.10:38:42.83#ibcon#flushed, iclass 18, count 0 2006.229.10:38:42.83#ibcon#about to write, iclass 18, count 0 2006.229.10:38:42.83#ibcon#wrote, iclass 18, count 0 2006.229.10:38:42.83#ibcon#about to read 3, iclass 18, count 0 2006.229.10:38:42.85#ibcon#read 3, iclass 18, count 0 2006.229.10:38:42.85#ibcon#about to read 4, iclass 18, count 0 2006.229.10:38:42.85#ibcon#read 4, iclass 18, count 0 2006.229.10:38:42.85#ibcon#about to read 5, iclass 18, count 0 2006.229.10:38:42.85#ibcon#read 5, iclass 18, count 0 2006.229.10:38:42.85#ibcon#about to read 6, iclass 18, count 0 2006.229.10:38:42.85#ibcon#read 6, iclass 18, count 0 2006.229.10:38:42.85#ibcon#end of sib2, iclass 18, count 0 2006.229.10:38:42.85#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:38:42.85#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:38:42.85#ibcon#[27=USB\r\n] 2006.229.10:38:42.85#ibcon#*before write, iclass 18, count 0 2006.229.10:38:42.85#ibcon#enter sib2, iclass 18, count 0 2006.229.10:38:42.85#ibcon#flushed, iclass 18, count 0 2006.229.10:38:42.85#ibcon#about to write, iclass 18, count 0 2006.229.10:38:42.85#ibcon#wrote, iclass 18, count 0 2006.229.10:38:42.85#ibcon#about to read 3, iclass 18, count 0 2006.229.10:38:42.88#ibcon#read 3, iclass 18, count 0 2006.229.10:38:42.88#ibcon#about to read 4, iclass 18, count 0 2006.229.10:38:42.88#ibcon#read 4, iclass 18, count 0 2006.229.10:38:42.88#ibcon#about to read 5, iclass 18, count 0 2006.229.10:38:42.88#ibcon#read 5, iclass 18, count 0 2006.229.10:38:42.88#ibcon#about to read 6, iclass 18, count 0 2006.229.10:38:42.88#ibcon#read 6, iclass 18, count 0 2006.229.10:38:42.88#ibcon#end of sib2, iclass 18, count 0 2006.229.10:38:42.88#ibcon#*after write, iclass 18, count 0 2006.229.10:38:42.88#ibcon#*before return 0, iclass 18, count 0 2006.229.10:38:42.88#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:42.88#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:38:42.88#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:38:42.88#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:38:42.88$vck44/vblo=7,734.99 2006.229.10:38:42.88#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.10:38:42.88#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.10:38:42.88#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:42.88#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:42.88#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:42.88#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:42.88#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:38:42.88#ibcon#first serial, iclass 20, count 0 2006.229.10:38:42.88#ibcon#enter sib2, iclass 20, count 0 2006.229.10:38:42.88#ibcon#flushed, iclass 20, count 0 2006.229.10:38:42.88#ibcon#about to write, iclass 20, count 0 2006.229.10:38:42.88#ibcon#wrote, iclass 20, count 0 2006.229.10:38:42.88#ibcon#about to read 3, iclass 20, count 0 2006.229.10:38:42.90#ibcon#read 3, iclass 20, count 0 2006.229.10:38:42.90#ibcon#about to read 4, iclass 20, count 0 2006.229.10:38:42.90#ibcon#read 4, iclass 20, count 0 2006.229.10:38:42.90#ibcon#about to read 5, iclass 20, count 0 2006.229.10:38:42.90#ibcon#read 5, iclass 20, count 0 2006.229.10:38:42.90#ibcon#about to read 6, iclass 20, count 0 2006.229.10:38:42.90#ibcon#read 6, iclass 20, count 0 2006.229.10:38:42.90#ibcon#end of sib2, iclass 20, count 0 2006.229.10:38:42.90#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:38:42.90#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:38:42.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:38:42.90#ibcon#*before write, iclass 20, count 0 2006.229.10:38:42.90#ibcon#enter sib2, iclass 20, count 0 2006.229.10:38:42.90#ibcon#flushed, iclass 20, count 0 2006.229.10:38:42.90#ibcon#about to write, iclass 20, count 0 2006.229.10:38:42.90#ibcon#wrote, iclass 20, count 0 2006.229.10:38:42.90#ibcon#about to read 3, iclass 20, count 0 2006.229.10:38:42.94#ibcon#read 3, iclass 20, count 0 2006.229.10:38:42.94#ibcon#about to read 4, iclass 20, count 0 2006.229.10:38:42.94#ibcon#read 4, iclass 20, count 0 2006.229.10:38:42.94#ibcon#about to read 5, iclass 20, count 0 2006.229.10:38:42.94#ibcon#read 5, iclass 20, count 0 2006.229.10:38:42.94#ibcon#about to read 6, iclass 20, count 0 2006.229.10:38:42.94#ibcon#read 6, iclass 20, count 0 2006.229.10:38:42.94#ibcon#end of sib2, iclass 20, count 0 2006.229.10:38:42.94#ibcon#*after write, iclass 20, count 0 2006.229.10:38:42.94#ibcon#*before return 0, iclass 20, count 0 2006.229.10:38:42.94#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:42.94#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:38:42.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:38:42.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:38:42.94$vck44/vb=7,4 2006.229.10:38:42.94#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.10:38:42.94#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.10:38:42.94#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:42.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:43.00#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:43.00#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:43.00#ibcon#enter wrdev, iclass 22, count 2 2006.229.10:38:43.00#ibcon#first serial, iclass 22, count 2 2006.229.10:38:43.00#ibcon#enter sib2, iclass 22, count 2 2006.229.10:38:43.00#ibcon#flushed, iclass 22, count 2 2006.229.10:38:43.00#ibcon#about to write, iclass 22, count 2 2006.229.10:38:43.00#ibcon#wrote, iclass 22, count 2 2006.229.10:38:43.00#ibcon#about to read 3, iclass 22, count 2 2006.229.10:38:43.02#ibcon#read 3, iclass 22, count 2 2006.229.10:38:43.02#ibcon#about to read 4, iclass 22, count 2 2006.229.10:38:43.02#ibcon#read 4, iclass 22, count 2 2006.229.10:38:43.02#ibcon#about to read 5, iclass 22, count 2 2006.229.10:38:43.02#ibcon#read 5, iclass 22, count 2 2006.229.10:38:43.02#ibcon#about to read 6, iclass 22, count 2 2006.229.10:38:43.02#ibcon#read 6, iclass 22, count 2 2006.229.10:38:43.02#ibcon#end of sib2, iclass 22, count 2 2006.229.10:38:43.02#ibcon#*mode == 0, iclass 22, count 2 2006.229.10:38:43.02#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.10:38:43.02#ibcon#[27=AT07-04\r\n] 2006.229.10:38:43.02#ibcon#*before write, iclass 22, count 2 2006.229.10:38:43.02#ibcon#enter sib2, iclass 22, count 2 2006.229.10:38:43.02#ibcon#flushed, iclass 22, count 2 2006.229.10:38:43.02#ibcon#about to write, iclass 22, count 2 2006.229.10:38:43.02#ibcon#wrote, iclass 22, count 2 2006.229.10:38:43.02#ibcon#about to read 3, iclass 22, count 2 2006.229.10:38:43.05#ibcon#read 3, iclass 22, count 2 2006.229.10:38:43.05#ibcon#about to read 4, iclass 22, count 2 2006.229.10:38:43.05#ibcon#read 4, iclass 22, count 2 2006.229.10:38:43.05#ibcon#about to read 5, iclass 22, count 2 2006.229.10:38:43.05#ibcon#read 5, iclass 22, count 2 2006.229.10:38:43.05#ibcon#about to read 6, iclass 22, count 2 2006.229.10:38:43.05#ibcon#read 6, iclass 22, count 2 2006.229.10:38:43.05#ibcon#end of sib2, iclass 22, count 2 2006.229.10:38:43.05#ibcon#*after write, iclass 22, count 2 2006.229.10:38:43.05#ibcon#*before return 0, iclass 22, count 2 2006.229.10:38:43.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:43.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:38:43.05#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.10:38:43.05#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:43.05#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:43.17#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:43.17#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:43.17#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:38:43.17#ibcon#first serial, iclass 22, count 0 2006.229.10:38:43.17#ibcon#enter sib2, iclass 22, count 0 2006.229.10:38:43.17#ibcon#flushed, iclass 22, count 0 2006.229.10:38:43.17#ibcon#about to write, iclass 22, count 0 2006.229.10:38:43.17#ibcon#wrote, iclass 22, count 0 2006.229.10:38:43.17#ibcon#about to read 3, iclass 22, count 0 2006.229.10:38:43.19#ibcon#read 3, iclass 22, count 0 2006.229.10:38:43.19#ibcon#about to read 4, iclass 22, count 0 2006.229.10:38:43.19#ibcon#read 4, iclass 22, count 0 2006.229.10:38:43.19#ibcon#about to read 5, iclass 22, count 0 2006.229.10:38:43.19#ibcon#read 5, iclass 22, count 0 2006.229.10:38:43.19#ibcon#about to read 6, iclass 22, count 0 2006.229.10:38:43.19#ibcon#read 6, iclass 22, count 0 2006.229.10:38:43.19#ibcon#end of sib2, iclass 22, count 0 2006.229.10:38:43.19#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:38:43.19#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:38:43.19#ibcon#[27=USB\r\n] 2006.229.10:38:43.19#ibcon#*before write, iclass 22, count 0 2006.229.10:38:43.19#ibcon#enter sib2, iclass 22, count 0 2006.229.10:38:43.19#ibcon#flushed, iclass 22, count 0 2006.229.10:38:43.19#ibcon#about to write, iclass 22, count 0 2006.229.10:38:43.19#ibcon#wrote, iclass 22, count 0 2006.229.10:38:43.19#ibcon#about to read 3, iclass 22, count 0 2006.229.10:38:43.22#ibcon#read 3, iclass 22, count 0 2006.229.10:38:43.22#ibcon#about to read 4, iclass 22, count 0 2006.229.10:38:43.22#ibcon#read 4, iclass 22, count 0 2006.229.10:38:43.22#ibcon#about to read 5, iclass 22, count 0 2006.229.10:38:43.22#ibcon#read 5, iclass 22, count 0 2006.229.10:38:43.22#ibcon#about to read 6, iclass 22, count 0 2006.229.10:38:43.22#ibcon#read 6, iclass 22, count 0 2006.229.10:38:43.22#ibcon#end of sib2, iclass 22, count 0 2006.229.10:38:43.22#ibcon#*after write, iclass 22, count 0 2006.229.10:38:43.22#ibcon#*before return 0, iclass 22, count 0 2006.229.10:38:43.22#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:43.22#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:38:43.22#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:38:43.22#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:38:43.22$vck44/vblo=8,744.99 2006.229.10:38:43.22#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.10:38:43.22#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.10:38:43.22#ibcon#ireg 17 cls_cnt 0 2006.229.10:38:43.22#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:43.22#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:43.22#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:43.22#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:38:43.22#ibcon#first serial, iclass 24, count 0 2006.229.10:38:43.22#ibcon#enter sib2, iclass 24, count 0 2006.229.10:38:43.22#ibcon#flushed, iclass 24, count 0 2006.229.10:38:43.22#ibcon#about to write, iclass 24, count 0 2006.229.10:38:43.22#ibcon#wrote, iclass 24, count 0 2006.229.10:38:43.22#ibcon#about to read 3, iclass 24, count 0 2006.229.10:38:43.24#ibcon#read 3, iclass 24, count 0 2006.229.10:38:43.24#ibcon#about to read 4, iclass 24, count 0 2006.229.10:38:43.24#ibcon#read 4, iclass 24, count 0 2006.229.10:38:43.24#ibcon#about to read 5, iclass 24, count 0 2006.229.10:38:43.24#ibcon#read 5, iclass 24, count 0 2006.229.10:38:43.24#ibcon#about to read 6, iclass 24, count 0 2006.229.10:38:43.24#ibcon#read 6, iclass 24, count 0 2006.229.10:38:43.24#ibcon#end of sib2, iclass 24, count 0 2006.229.10:38:43.24#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:38:43.24#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:38:43.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:38:43.24#ibcon#*before write, iclass 24, count 0 2006.229.10:38:43.24#ibcon#enter sib2, iclass 24, count 0 2006.229.10:38:43.24#ibcon#flushed, iclass 24, count 0 2006.229.10:38:43.24#ibcon#about to write, iclass 24, count 0 2006.229.10:38:43.24#ibcon#wrote, iclass 24, count 0 2006.229.10:38:43.24#ibcon#about to read 3, iclass 24, count 0 2006.229.10:38:43.28#ibcon#read 3, iclass 24, count 0 2006.229.10:38:43.28#ibcon#about to read 4, iclass 24, count 0 2006.229.10:38:43.28#ibcon#read 4, iclass 24, count 0 2006.229.10:38:43.28#ibcon#about to read 5, iclass 24, count 0 2006.229.10:38:43.28#ibcon#read 5, iclass 24, count 0 2006.229.10:38:43.28#ibcon#about to read 6, iclass 24, count 0 2006.229.10:38:43.28#ibcon#read 6, iclass 24, count 0 2006.229.10:38:43.28#ibcon#end of sib2, iclass 24, count 0 2006.229.10:38:43.28#ibcon#*after write, iclass 24, count 0 2006.229.10:38:43.28#ibcon#*before return 0, iclass 24, count 0 2006.229.10:38:43.28#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:43.28#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:38:43.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:38:43.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:38:43.28$vck44/vb=8,4 2006.229.10:38:43.28#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.10:38:43.28#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.10:38:43.28#ibcon#ireg 11 cls_cnt 2 2006.229.10:38:43.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:43.34#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:43.34#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:43.34#ibcon#enter wrdev, iclass 26, count 2 2006.229.10:38:43.34#ibcon#first serial, iclass 26, count 2 2006.229.10:38:43.34#ibcon#enter sib2, iclass 26, count 2 2006.229.10:38:43.34#ibcon#flushed, iclass 26, count 2 2006.229.10:38:43.34#ibcon#about to write, iclass 26, count 2 2006.229.10:38:43.34#ibcon#wrote, iclass 26, count 2 2006.229.10:38:43.34#ibcon#about to read 3, iclass 26, count 2 2006.229.10:38:43.36#ibcon#read 3, iclass 26, count 2 2006.229.10:38:43.36#ibcon#about to read 4, iclass 26, count 2 2006.229.10:38:43.36#ibcon#read 4, iclass 26, count 2 2006.229.10:38:43.36#ibcon#about to read 5, iclass 26, count 2 2006.229.10:38:43.36#ibcon#read 5, iclass 26, count 2 2006.229.10:38:43.36#ibcon#about to read 6, iclass 26, count 2 2006.229.10:38:43.36#ibcon#read 6, iclass 26, count 2 2006.229.10:38:43.36#ibcon#end of sib2, iclass 26, count 2 2006.229.10:38:43.36#ibcon#*mode == 0, iclass 26, count 2 2006.229.10:38:43.36#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.10:38:43.36#ibcon#[27=AT08-04\r\n] 2006.229.10:38:43.36#ibcon#*before write, iclass 26, count 2 2006.229.10:38:43.36#ibcon#enter sib2, iclass 26, count 2 2006.229.10:38:43.36#ibcon#flushed, iclass 26, count 2 2006.229.10:38:43.36#ibcon#about to write, iclass 26, count 2 2006.229.10:38:43.36#ibcon#wrote, iclass 26, count 2 2006.229.10:38:43.36#ibcon#about to read 3, iclass 26, count 2 2006.229.10:38:43.39#ibcon#read 3, iclass 26, count 2 2006.229.10:38:43.39#ibcon#about to read 4, iclass 26, count 2 2006.229.10:38:43.39#ibcon#read 4, iclass 26, count 2 2006.229.10:38:43.39#ibcon#about to read 5, iclass 26, count 2 2006.229.10:38:43.39#ibcon#read 5, iclass 26, count 2 2006.229.10:38:43.39#ibcon#about to read 6, iclass 26, count 2 2006.229.10:38:43.39#ibcon#read 6, iclass 26, count 2 2006.229.10:38:43.39#ibcon#end of sib2, iclass 26, count 2 2006.229.10:38:43.39#ibcon#*after write, iclass 26, count 2 2006.229.10:38:43.39#ibcon#*before return 0, iclass 26, count 2 2006.229.10:38:43.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:43.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:38:43.39#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.10:38:43.39#ibcon#ireg 7 cls_cnt 0 2006.229.10:38:43.39#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:43.51#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:43.51#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:43.51#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:38:43.51#ibcon#first serial, iclass 26, count 0 2006.229.10:38:43.51#ibcon#enter sib2, iclass 26, count 0 2006.229.10:38:43.51#ibcon#flushed, iclass 26, count 0 2006.229.10:38:43.51#ibcon#about to write, iclass 26, count 0 2006.229.10:38:43.51#ibcon#wrote, iclass 26, count 0 2006.229.10:38:43.51#ibcon#about to read 3, iclass 26, count 0 2006.229.10:38:43.53#ibcon#read 3, iclass 26, count 0 2006.229.10:38:43.53#ibcon#about to read 4, iclass 26, count 0 2006.229.10:38:43.53#ibcon#read 4, iclass 26, count 0 2006.229.10:38:43.53#ibcon#about to read 5, iclass 26, count 0 2006.229.10:38:43.53#ibcon#read 5, iclass 26, count 0 2006.229.10:38:43.53#ibcon#about to read 6, iclass 26, count 0 2006.229.10:38:43.53#ibcon#read 6, iclass 26, count 0 2006.229.10:38:43.53#ibcon#end of sib2, iclass 26, count 0 2006.229.10:38:43.53#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:38:43.53#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:38:43.53#ibcon#[27=USB\r\n] 2006.229.10:38:43.53#ibcon#*before write, iclass 26, count 0 2006.229.10:38:43.53#ibcon#enter sib2, iclass 26, count 0 2006.229.10:38:43.53#ibcon#flushed, iclass 26, count 0 2006.229.10:38:43.53#ibcon#about to write, iclass 26, count 0 2006.229.10:38:43.53#ibcon#wrote, iclass 26, count 0 2006.229.10:38:43.53#ibcon#about to read 3, iclass 26, count 0 2006.229.10:38:43.56#ibcon#read 3, iclass 26, count 0 2006.229.10:38:43.56#ibcon#about to read 4, iclass 26, count 0 2006.229.10:38:43.56#ibcon#read 4, iclass 26, count 0 2006.229.10:38:43.56#ibcon#about to read 5, iclass 26, count 0 2006.229.10:38:43.56#ibcon#read 5, iclass 26, count 0 2006.229.10:38:43.56#ibcon#about to read 6, iclass 26, count 0 2006.229.10:38:43.56#ibcon#read 6, iclass 26, count 0 2006.229.10:38:43.56#ibcon#end of sib2, iclass 26, count 0 2006.229.10:38:43.56#ibcon#*after write, iclass 26, count 0 2006.229.10:38:43.56#ibcon#*before return 0, iclass 26, count 0 2006.229.10:38:43.56#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:43.56#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:38:43.56#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:38:43.56#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:38:43.56$vck44/vabw=wide 2006.229.10:38:43.56#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.10:38:43.56#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.10:38:43.56#ibcon#ireg 8 cls_cnt 0 2006.229.10:38:43.56#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:43.56#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:43.56#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:43.56#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:38:43.56#ibcon#first serial, iclass 28, count 0 2006.229.10:38:43.56#ibcon#enter sib2, iclass 28, count 0 2006.229.10:38:43.56#ibcon#flushed, iclass 28, count 0 2006.229.10:38:43.56#ibcon#about to write, iclass 28, count 0 2006.229.10:38:43.56#ibcon#wrote, iclass 28, count 0 2006.229.10:38:43.56#ibcon#about to read 3, iclass 28, count 0 2006.229.10:38:43.58#ibcon#read 3, iclass 28, count 0 2006.229.10:38:43.58#ibcon#about to read 4, iclass 28, count 0 2006.229.10:38:43.58#ibcon#read 4, iclass 28, count 0 2006.229.10:38:43.58#ibcon#about to read 5, iclass 28, count 0 2006.229.10:38:43.58#ibcon#read 5, iclass 28, count 0 2006.229.10:38:43.58#ibcon#about to read 6, iclass 28, count 0 2006.229.10:38:43.58#ibcon#read 6, iclass 28, count 0 2006.229.10:38:43.58#ibcon#end of sib2, iclass 28, count 0 2006.229.10:38:43.58#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:38:43.58#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:38:43.58#ibcon#[25=BW32\r\n] 2006.229.10:38:43.58#ibcon#*before write, iclass 28, count 0 2006.229.10:38:43.58#ibcon#enter sib2, iclass 28, count 0 2006.229.10:38:43.58#ibcon#flushed, iclass 28, count 0 2006.229.10:38:43.58#ibcon#about to write, iclass 28, count 0 2006.229.10:38:43.58#ibcon#wrote, iclass 28, count 0 2006.229.10:38:43.58#ibcon#about to read 3, iclass 28, count 0 2006.229.10:38:43.61#ibcon#read 3, iclass 28, count 0 2006.229.10:38:43.61#ibcon#about to read 4, iclass 28, count 0 2006.229.10:38:43.61#ibcon#read 4, iclass 28, count 0 2006.229.10:38:43.61#ibcon#about to read 5, iclass 28, count 0 2006.229.10:38:43.61#ibcon#read 5, iclass 28, count 0 2006.229.10:38:43.61#ibcon#about to read 6, iclass 28, count 0 2006.229.10:38:43.61#ibcon#read 6, iclass 28, count 0 2006.229.10:38:43.61#ibcon#end of sib2, iclass 28, count 0 2006.229.10:38:43.61#ibcon#*after write, iclass 28, count 0 2006.229.10:38:43.61#ibcon#*before return 0, iclass 28, count 0 2006.229.10:38:43.61#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:43.61#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:38:43.61#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:38:43.61#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:38:43.61$vck44/vbbw=wide 2006.229.10:38:43.61#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:38:43.61#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:38:43.61#ibcon#ireg 8 cls_cnt 0 2006.229.10:38:43.61#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:38:43.68#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:38:43.68#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:38:43.68#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:38:43.68#ibcon#first serial, iclass 30, count 0 2006.229.10:38:43.68#ibcon#enter sib2, iclass 30, count 0 2006.229.10:38:43.68#ibcon#flushed, iclass 30, count 0 2006.229.10:38:43.68#ibcon#about to write, iclass 30, count 0 2006.229.10:38:43.68#ibcon#wrote, iclass 30, count 0 2006.229.10:38:43.68#ibcon#about to read 3, iclass 30, count 0 2006.229.10:38:43.70#ibcon#read 3, iclass 30, count 0 2006.229.10:38:43.70#ibcon#about to read 4, iclass 30, count 0 2006.229.10:38:43.70#ibcon#read 4, iclass 30, count 0 2006.229.10:38:43.70#ibcon#about to read 5, iclass 30, count 0 2006.229.10:38:43.70#ibcon#read 5, iclass 30, count 0 2006.229.10:38:43.70#ibcon#about to read 6, iclass 30, count 0 2006.229.10:38:43.70#ibcon#read 6, iclass 30, count 0 2006.229.10:38:43.70#ibcon#end of sib2, iclass 30, count 0 2006.229.10:38:43.70#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:38:43.70#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:38:43.70#ibcon#[27=BW32\r\n] 2006.229.10:38:43.70#ibcon#*before write, iclass 30, count 0 2006.229.10:38:43.70#ibcon#enter sib2, iclass 30, count 0 2006.229.10:38:43.70#ibcon#flushed, iclass 30, count 0 2006.229.10:38:43.70#ibcon#about to write, iclass 30, count 0 2006.229.10:38:43.70#ibcon#wrote, iclass 30, count 0 2006.229.10:38:43.70#ibcon#about to read 3, iclass 30, count 0 2006.229.10:38:43.73#ibcon#read 3, iclass 30, count 0 2006.229.10:38:43.73#ibcon#about to read 4, iclass 30, count 0 2006.229.10:38:43.73#ibcon#read 4, iclass 30, count 0 2006.229.10:38:43.73#ibcon#about to read 5, iclass 30, count 0 2006.229.10:38:43.73#ibcon#read 5, iclass 30, count 0 2006.229.10:38:43.73#ibcon#about to read 6, iclass 30, count 0 2006.229.10:38:43.73#ibcon#read 6, iclass 30, count 0 2006.229.10:38:43.73#ibcon#end of sib2, iclass 30, count 0 2006.229.10:38:43.73#ibcon#*after write, iclass 30, count 0 2006.229.10:38:43.73#ibcon#*before return 0, iclass 30, count 0 2006.229.10:38:43.73#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:38:43.73#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:38:43.73#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:38:43.73#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:38:43.73$setupk4/ifdk4 2006.229.10:38:43.73$ifdk4/lo= 2006.229.10:38:43.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:38:43.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:38:43.73$ifdk4/patch= 2006.229.10:38:43.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:38:43.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:38:43.73$setupk4/!*+20s 2006.229.10:38:51.13#trakl#Source acquired 2006.229.10:38:51.13#flagr#flagr/antenna,acquired 2006.229.10:38:52.39#abcon#<5=/04 1.4 2.3 28.46 991001.6\r\n> 2006.229.10:38:52.41#abcon#{5=INTERFACE CLEAR} 2006.229.10:38:52.47#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:38:58.23$setupk4/"tpicd 2006.229.10:38:58.23$setupk4/echo=off 2006.229.10:38:58.23$setupk4/xlog=off 2006.229.10:38:58.23:!2006.229.10:44:14 2006.229.10:44:14.00:preob 2006.229.10:44:14.14/onsource/TRACKING 2006.229.10:44:14.14:!2006.229.10:44:24 2006.229.10:44:24.00:"tape 2006.229.10:44:24.00:"st=record 2006.229.10:44:24.00:data_valid=on 2006.229.10:44:24.00:midob 2006.229.10:44:24.14/onsource/TRACKING 2006.229.10:44:24.14/wx/28.45,1001.7,99 2006.229.10:44:24.27/cable/+6.4038E-03 2006.229.10:44:25.36/va/01,08,usb,yes,34,37 2006.229.10:44:25.36/va/02,07,usb,yes,37,37 2006.229.10:44:25.36/va/03,06,usb,yes,46,48 2006.229.10:44:25.36/va/04,07,usb,yes,38,40 2006.229.10:44:25.36/va/05,04,usb,yes,34,34 2006.229.10:44:25.36/va/06,04,usb,yes,38,38 2006.229.10:44:25.36/va/07,05,usb,yes,34,34 2006.229.10:44:25.36/va/08,06,usb,yes,24,30 2006.229.10:44:25.59/valo/01,524.99,yes,locked 2006.229.10:44:25.59/valo/02,534.99,yes,locked 2006.229.10:44:25.59/valo/03,564.99,yes,locked 2006.229.10:44:25.59/valo/04,624.99,yes,locked 2006.229.10:44:25.59/valo/05,734.99,yes,locked 2006.229.10:44:25.59/valo/06,814.99,yes,locked 2006.229.10:44:25.59/valo/07,864.99,yes,locked 2006.229.10:44:25.59/valo/08,884.99,yes,locked 2006.229.10:44:26.68/vb/01,04,usb,yes,39,36 2006.229.10:44:26.68/vb/02,04,usb,yes,41,41 2006.229.10:44:26.68/vb/03,04,usb,yes,38,41 2006.229.10:44:26.68/vb/04,04,usb,yes,43,42 2006.229.10:44:26.68/vb/05,04,usb,yes,34,37 2006.229.10:44:26.68/vb/06,04,usb,yes,39,35 2006.229.10:44:26.68/vb/07,04,usb,yes,39,39 2006.229.10:44:26.68/vb/08,04,usb,yes,35,40 2006.229.10:44:26.92/vblo/01,629.99,yes,locked 2006.229.10:44:26.92/vblo/02,634.99,yes,locked 2006.229.10:44:26.92/vblo/03,649.99,yes,locked 2006.229.10:44:26.92/vblo/04,679.99,yes,locked 2006.229.10:44:26.92/vblo/05,709.99,yes,locked 2006.229.10:44:26.92/vblo/06,719.99,yes,locked 2006.229.10:44:26.92/vblo/07,734.99,yes,locked 2006.229.10:44:26.92/vblo/08,744.99,yes,locked 2006.229.10:44:27.07/vabw/8 2006.229.10:44:27.22/vbbw/8 2006.229.10:44:27.31/xfe/off,on,12.0 2006.229.10:44:27.69/ifatt/23,28,28,28 2006.229.10:44:28.07/fmout-gps/S +4.40E-07 2006.229.10:44:28.11:!2006.229.10:46:54 2006.229.10:46:54.00:data_valid=off 2006.229.10:46:54.00:"et 2006.229.10:46:54.00:!+3s 2006.229.10:46:57.01:"tape 2006.229.10:46:57.01:postob 2006.229.10:46:57.19/cable/+6.4042E-03 2006.229.10:46:57.19/wx/28.45,1001.7,100 2006.229.10:46:58.08/fmout-gps/S +4.36E-07 2006.229.10:46:58.08:scan_name=229-1051,jd0608,80 2006.229.10:46:58.08:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.10:46:58.13#flagr#flagr/antenna,new-source 2006.229.10:46:59.13:checkk5 2006.229.10:46:59.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:46:59.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:47:00.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:47:00.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:47:01.08/chk_obsdata//k5ts1/T2291044??a.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.10:47:01.46/chk_obsdata//k5ts2/T2291044??b.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.10:47:01.86/chk_obsdata//k5ts3/T2291044??c.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.10:47:02.28/chk_obsdata//k5ts4/T2291044??d.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.10:47:03.00/k5log//k5ts1_log_newline 2006.229.10:47:03.71/k5log//k5ts2_log_newline 2006.229.10:47:04.42/k5log//k5ts3_log_newline 2006.229.10:47:05.12/k5log//k5ts4_log_newline 2006.229.10:47:05.14/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:47:05.14:setupk4=1 2006.229.10:47:05.14$setupk4/echo=on 2006.229.10:47:05.14$setupk4/pcalon 2006.229.10:47:05.14$pcalon/"no phase cal control is implemented here 2006.229.10:47:05.14$setupk4/"tpicd=stop 2006.229.10:47:05.14$setupk4/"rec=synch_on 2006.229.10:47:05.14$setupk4/"rec_mode=128 2006.229.10:47:05.14$setupk4/!* 2006.229.10:47:05.14$setupk4/recpk4 2006.229.10:47:05.14$recpk4/recpatch= 2006.229.10:47:05.14$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:47:05.14$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:47:05.14$setupk4/vck44 2006.229.10:47:05.15$vck44/valo=1,524.99 2006.229.10:47:05.15#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.10:47:05.15#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.10:47:05.15#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:05.15#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:05.15#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:05.15#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:05.15#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:47:05.15#ibcon#first serial, iclass 10, count 0 2006.229.10:47:05.15#ibcon#enter sib2, iclass 10, count 0 2006.229.10:47:05.15#ibcon#flushed, iclass 10, count 0 2006.229.10:47:05.15#ibcon#about to write, iclass 10, count 0 2006.229.10:47:05.15#ibcon#wrote, iclass 10, count 0 2006.229.10:47:05.15#ibcon#about to read 3, iclass 10, count 0 2006.229.10:47:05.16#ibcon#read 3, iclass 10, count 0 2006.229.10:47:05.16#ibcon#about to read 4, iclass 10, count 0 2006.229.10:47:05.16#ibcon#read 4, iclass 10, count 0 2006.229.10:47:05.16#ibcon#about to read 5, iclass 10, count 0 2006.229.10:47:05.16#ibcon#read 5, iclass 10, count 0 2006.229.10:47:05.16#ibcon#about to read 6, iclass 10, count 0 2006.229.10:47:05.16#ibcon#read 6, iclass 10, count 0 2006.229.10:47:05.16#ibcon#end of sib2, iclass 10, count 0 2006.229.10:47:05.16#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:47:05.16#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:47:05.16#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:47:05.16#ibcon#*before write, iclass 10, count 0 2006.229.10:47:05.16#ibcon#enter sib2, iclass 10, count 0 2006.229.10:47:05.16#ibcon#flushed, iclass 10, count 0 2006.229.10:47:05.16#ibcon#about to write, iclass 10, count 0 2006.229.10:47:05.16#ibcon#wrote, iclass 10, count 0 2006.229.10:47:05.16#ibcon#about to read 3, iclass 10, count 0 2006.229.10:47:05.21#ibcon#read 3, iclass 10, count 0 2006.229.10:47:05.21#ibcon#about to read 4, iclass 10, count 0 2006.229.10:47:05.21#ibcon#read 4, iclass 10, count 0 2006.229.10:47:05.21#ibcon#about to read 5, iclass 10, count 0 2006.229.10:47:05.21#ibcon#read 5, iclass 10, count 0 2006.229.10:47:05.21#ibcon#about to read 6, iclass 10, count 0 2006.229.10:47:05.21#ibcon#read 6, iclass 10, count 0 2006.229.10:47:05.21#ibcon#end of sib2, iclass 10, count 0 2006.229.10:47:05.21#ibcon#*after write, iclass 10, count 0 2006.229.10:47:05.21#ibcon#*before return 0, iclass 10, count 0 2006.229.10:47:05.21#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:05.21#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:05.21#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:47:05.21#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:47:05.21$vck44/va=1,8 2006.229.10:47:05.21#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.10:47:05.21#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.10:47:05.21#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:05.21#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:05.21#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:05.21#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:05.21#ibcon#enter wrdev, iclass 12, count 2 2006.229.10:47:05.21#ibcon#first serial, iclass 12, count 2 2006.229.10:47:05.21#ibcon#enter sib2, iclass 12, count 2 2006.229.10:47:05.21#ibcon#flushed, iclass 12, count 2 2006.229.10:47:05.21#ibcon#about to write, iclass 12, count 2 2006.229.10:47:05.21#ibcon#wrote, iclass 12, count 2 2006.229.10:47:05.21#ibcon#about to read 3, iclass 12, count 2 2006.229.10:47:05.23#ibcon#read 3, iclass 12, count 2 2006.229.10:47:05.23#ibcon#about to read 4, iclass 12, count 2 2006.229.10:47:05.23#ibcon#read 4, iclass 12, count 2 2006.229.10:47:05.23#ibcon#about to read 5, iclass 12, count 2 2006.229.10:47:05.23#ibcon#read 5, iclass 12, count 2 2006.229.10:47:05.23#ibcon#about to read 6, iclass 12, count 2 2006.229.10:47:05.23#ibcon#read 6, iclass 12, count 2 2006.229.10:47:05.23#ibcon#end of sib2, iclass 12, count 2 2006.229.10:47:05.23#ibcon#*mode == 0, iclass 12, count 2 2006.229.10:47:05.23#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.10:47:05.23#ibcon#[25=AT01-08\r\n] 2006.229.10:47:05.23#ibcon#*before write, iclass 12, count 2 2006.229.10:47:05.23#ibcon#enter sib2, iclass 12, count 2 2006.229.10:47:05.23#ibcon#flushed, iclass 12, count 2 2006.229.10:47:05.23#ibcon#about to write, iclass 12, count 2 2006.229.10:47:05.23#ibcon#wrote, iclass 12, count 2 2006.229.10:47:05.23#ibcon#about to read 3, iclass 12, count 2 2006.229.10:47:05.26#ibcon#read 3, iclass 12, count 2 2006.229.10:47:05.26#ibcon#about to read 4, iclass 12, count 2 2006.229.10:47:05.26#ibcon#read 4, iclass 12, count 2 2006.229.10:47:05.26#ibcon#about to read 5, iclass 12, count 2 2006.229.10:47:05.26#ibcon#read 5, iclass 12, count 2 2006.229.10:47:05.26#ibcon#about to read 6, iclass 12, count 2 2006.229.10:47:05.26#ibcon#read 6, iclass 12, count 2 2006.229.10:47:05.26#ibcon#end of sib2, iclass 12, count 2 2006.229.10:47:05.26#ibcon#*after write, iclass 12, count 2 2006.229.10:47:05.26#ibcon#*before return 0, iclass 12, count 2 2006.229.10:47:05.26#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:05.26#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:05.26#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.10:47:05.26#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:05.26#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:05.38#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:05.38#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:05.38#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:47:05.38#ibcon#first serial, iclass 12, count 0 2006.229.10:47:05.38#ibcon#enter sib2, iclass 12, count 0 2006.229.10:47:05.38#ibcon#flushed, iclass 12, count 0 2006.229.10:47:05.38#ibcon#about to write, iclass 12, count 0 2006.229.10:47:05.38#ibcon#wrote, iclass 12, count 0 2006.229.10:47:05.38#ibcon#about to read 3, iclass 12, count 0 2006.229.10:47:05.40#ibcon#read 3, iclass 12, count 0 2006.229.10:47:05.40#ibcon#about to read 4, iclass 12, count 0 2006.229.10:47:05.40#ibcon#read 4, iclass 12, count 0 2006.229.10:47:05.40#ibcon#about to read 5, iclass 12, count 0 2006.229.10:47:05.40#ibcon#read 5, iclass 12, count 0 2006.229.10:47:05.40#ibcon#about to read 6, iclass 12, count 0 2006.229.10:47:05.40#ibcon#read 6, iclass 12, count 0 2006.229.10:47:05.40#ibcon#end of sib2, iclass 12, count 0 2006.229.10:47:05.40#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:47:05.40#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:47:05.40#ibcon#[25=USB\r\n] 2006.229.10:47:05.40#ibcon#*before write, iclass 12, count 0 2006.229.10:47:05.40#ibcon#enter sib2, iclass 12, count 0 2006.229.10:47:05.40#ibcon#flushed, iclass 12, count 0 2006.229.10:47:05.40#ibcon#about to write, iclass 12, count 0 2006.229.10:47:05.40#ibcon#wrote, iclass 12, count 0 2006.229.10:47:05.40#ibcon#about to read 3, iclass 12, count 0 2006.229.10:47:05.43#ibcon#read 3, iclass 12, count 0 2006.229.10:47:05.43#ibcon#about to read 4, iclass 12, count 0 2006.229.10:47:05.43#ibcon#read 4, iclass 12, count 0 2006.229.10:47:05.43#ibcon#about to read 5, iclass 12, count 0 2006.229.10:47:05.43#ibcon#read 5, iclass 12, count 0 2006.229.10:47:05.43#ibcon#about to read 6, iclass 12, count 0 2006.229.10:47:05.43#ibcon#read 6, iclass 12, count 0 2006.229.10:47:05.43#ibcon#end of sib2, iclass 12, count 0 2006.229.10:47:05.43#ibcon#*after write, iclass 12, count 0 2006.229.10:47:05.43#ibcon#*before return 0, iclass 12, count 0 2006.229.10:47:05.43#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:05.43#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:05.43#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:47:05.43#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:47:05.43$vck44/valo=2,534.99 2006.229.10:47:05.43#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.10:47:05.43#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.10:47:05.43#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:05.43#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:05.43#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:05.43#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:05.43#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:47:05.43#ibcon#first serial, iclass 14, count 0 2006.229.10:47:05.43#ibcon#enter sib2, iclass 14, count 0 2006.229.10:47:05.43#ibcon#flushed, iclass 14, count 0 2006.229.10:47:05.43#ibcon#about to write, iclass 14, count 0 2006.229.10:47:05.43#ibcon#wrote, iclass 14, count 0 2006.229.10:47:05.43#ibcon#about to read 3, iclass 14, count 0 2006.229.10:47:05.45#ibcon#read 3, iclass 14, count 0 2006.229.10:47:05.45#ibcon#about to read 4, iclass 14, count 0 2006.229.10:47:05.45#ibcon#read 4, iclass 14, count 0 2006.229.10:47:05.45#ibcon#about to read 5, iclass 14, count 0 2006.229.10:47:05.45#ibcon#read 5, iclass 14, count 0 2006.229.10:47:05.45#ibcon#about to read 6, iclass 14, count 0 2006.229.10:47:05.45#ibcon#read 6, iclass 14, count 0 2006.229.10:47:05.45#ibcon#end of sib2, iclass 14, count 0 2006.229.10:47:05.45#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:47:05.45#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:47:05.45#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:47:05.45#ibcon#*before write, iclass 14, count 0 2006.229.10:47:05.45#ibcon#enter sib2, iclass 14, count 0 2006.229.10:47:05.45#ibcon#flushed, iclass 14, count 0 2006.229.10:47:05.45#ibcon#about to write, iclass 14, count 0 2006.229.10:47:05.45#ibcon#wrote, iclass 14, count 0 2006.229.10:47:05.45#ibcon#about to read 3, iclass 14, count 0 2006.229.10:47:05.49#ibcon#read 3, iclass 14, count 0 2006.229.10:47:05.49#ibcon#about to read 4, iclass 14, count 0 2006.229.10:47:05.49#ibcon#read 4, iclass 14, count 0 2006.229.10:47:05.49#ibcon#about to read 5, iclass 14, count 0 2006.229.10:47:05.49#ibcon#read 5, iclass 14, count 0 2006.229.10:47:05.49#ibcon#about to read 6, iclass 14, count 0 2006.229.10:47:05.49#ibcon#read 6, iclass 14, count 0 2006.229.10:47:05.49#ibcon#end of sib2, iclass 14, count 0 2006.229.10:47:05.49#ibcon#*after write, iclass 14, count 0 2006.229.10:47:05.49#ibcon#*before return 0, iclass 14, count 0 2006.229.10:47:05.49#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:05.49#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:05.49#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:47:05.49#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:47:05.49$vck44/va=2,7 2006.229.10:47:05.49#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.10:47:05.49#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.10:47:05.49#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:05.49#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:05.55#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:05.55#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:05.55#ibcon#enter wrdev, iclass 16, count 2 2006.229.10:47:05.55#ibcon#first serial, iclass 16, count 2 2006.229.10:47:05.55#ibcon#enter sib2, iclass 16, count 2 2006.229.10:47:05.55#ibcon#flushed, iclass 16, count 2 2006.229.10:47:05.55#ibcon#about to write, iclass 16, count 2 2006.229.10:47:05.55#ibcon#wrote, iclass 16, count 2 2006.229.10:47:05.55#ibcon#about to read 3, iclass 16, count 2 2006.229.10:47:05.57#ibcon#read 3, iclass 16, count 2 2006.229.10:47:05.57#ibcon#about to read 4, iclass 16, count 2 2006.229.10:47:05.57#ibcon#read 4, iclass 16, count 2 2006.229.10:47:05.57#ibcon#about to read 5, iclass 16, count 2 2006.229.10:47:05.57#ibcon#read 5, iclass 16, count 2 2006.229.10:47:05.57#ibcon#about to read 6, iclass 16, count 2 2006.229.10:47:05.57#ibcon#read 6, iclass 16, count 2 2006.229.10:47:05.57#ibcon#end of sib2, iclass 16, count 2 2006.229.10:47:05.57#ibcon#*mode == 0, iclass 16, count 2 2006.229.10:47:05.57#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.10:47:05.57#ibcon#[25=AT02-07\r\n] 2006.229.10:47:05.57#ibcon#*before write, iclass 16, count 2 2006.229.10:47:05.57#ibcon#enter sib2, iclass 16, count 2 2006.229.10:47:05.57#ibcon#flushed, iclass 16, count 2 2006.229.10:47:05.57#ibcon#about to write, iclass 16, count 2 2006.229.10:47:05.57#ibcon#wrote, iclass 16, count 2 2006.229.10:47:05.57#ibcon#about to read 3, iclass 16, count 2 2006.229.10:47:05.60#ibcon#read 3, iclass 16, count 2 2006.229.10:47:05.60#ibcon#about to read 4, iclass 16, count 2 2006.229.10:47:05.60#ibcon#read 4, iclass 16, count 2 2006.229.10:47:05.60#ibcon#about to read 5, iclass 16, count 2 2006.229.10:47:05.60#ibcon#read 5, iclass 16, count 2 2006.229.10:47:05.60#ibcon#about to read 6, iclass 16, count 2 2006.229.10:47:05.60#ibcon#read 6, iclass 16, count 2 2006.229.10:47:05.60#ibcon#end of sib2, iclass 16, count 2 2006.229.10:47:05.60#ibcon#*after write, iclass 16, count 2 2006.229.10:47:05.60#ibcon#*before return 0, iclass 16, count 2 2006.229.10:47:05.60#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:05.60#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:05.60#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.10:47:05.60#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:05.60#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:05.72#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:05.72#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:05.72#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:47:05.72#ibcon#first serial, iclass 16, count 0 2006.229.10:47:05.72#ibcon#enter sib2, iclass 16, count 0 2006.229.10:47:05.72#ibcon#flushed, iclass 16, count 0 2006.229.10:47:05.72#ibcon#about to write, iclass 16, count 0 2006.229.10:47:05.72#ibcon#wrote, iclass 16, count 0 2006.229.10:47:05.72#ibcon#about to read 3, iclass 16, count 0 2006.229.10:47:05.74#ibcon#read 3, iclass 16, count 0 2006.229.10:47:05.74#ibcon#about to read 4, iclass 16, count 0 2006.229.10:47:05.74#ibcon#read 4, iclass 16, count 0 2006.229.10:47:05.74#ibcon#about to read 5, iclass 16, count 0 2006.229.10:47:05.74#ibcon#read 5, iclass 16, count 0 2006.229.10:47:05.74#ibcon#about to read 6, iclass 16, count 0 2006.229.10:47:05.74#ibcon#read 6, iclass 16, count 0 2006.229.10:47:05.74#ibcon#end of sib2, iclass 16, count 0 2006.229.10:47:05.74#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:47:05.74#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:47:05.74#ibcon#[25=USB\r\n] 2006.229.10:47:05.74#ibcon#*before write, iclass 16, count 0 2006.229.10:47:05.74#ibcon#enter sib2, iclass 16, count 0 2006.229.10:47:05.74#ibcon#flushed, iclass 16, count 0 2006.229.10:47:05.74#ibcon#about to write, iclass 16, count 0 2006.229.10:47:05.74#ibcon#wrote, iclass 16, count 0 2006.229.10:47:05.74#ibcon#about to read 3, iclass 16, count 0 2006.229.10:47:05.77#ibcon#read 3, iclass 16, count 0 2006.229.10:47:05.77#ibcon#about to read 4, iclass 16, count 0 2006.229.10:47:05.77#ibcon#read 4, iclass 16, count 0 2006.229.10:47:05.77#ibcon#about to read 5, iclass 16, count 0 2006.229.10:47:05.77#ibcon#read 5, iclass 16, count 0 2006.229.10:47:05.77#ibcon#about to read 6, iclass 16, count 0 2006.229.10:47:05.77#ibcon#read 6, iclass 16, count 0 2006.229.10:47:05.77#ibcon#end of sib2, iclass 16, count 0 2006.229.10:47:05.77#ibcon#*after write, iclass 16, count 0 2006.229.10:47:05.77#ibcon#*before return 0, iclass 16, count 0 2006.229.10:47:05.77#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:05.77#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:05.77#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:47:05.77#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:47:05.77$vck44/valo=3,564.99 2006.229.10:47:05.77#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.10:47:05.77#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.10:47:05.77#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:05.77#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:05.77#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:05.77#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:05.77#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:47:05.77#ibcon#first serial, iclass 18, count 0 2006.229.10:47:05.77#ibcon#enter sib2, iclass 18, count 0 2006.229.10:47:05.77#ibcon#flushed, iclass 18, count 0 2006.229.10:47:05.77#ibcon#about to write, iclass 18, count 0 2006.229.10:47:05.77#ibcon#wrote, iclass 18, count 0 2006.229.10:47:05.77#ibcon#about to read 3, iclass 18, count 0 2006.229.10:47:05.79#ibcon#read 3, iclass 18, count 0 2006.229.10:47:05.79#ibcon#about to read 4, iclass 18, count 0 2006.229.10:47:05.79#ibcon#read 4, iclass 18, count 0 2006.229.10:47:05.79#ibcon#about to read 5, iclass 18, count 0 2006.229.10:47:05.79#ibcon#read 5, iclass 18, count 0 2006.229.10:47:05.79#ibcon#about to read 6, iclass 18, count 0 2006.229.10:47:05.79#ibcon#read 6, iclass 18, count 0 2006.229.10:47:05.79#ibcon#end of sib2, iclass 18, count 0 2006.229.10:47:05.79#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:47:05.79#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:47:05.79#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:47:05.79#ibcon#*before write, iclass 18, count 0 2006.229.10:47:05.79#ibcon#enter sib2, iclass 18, count 0 2006.229.10:47:05.79#ibcon#flushed, iclass 18, count 0 2006.229.10:47:05.79#ibcon#about to write, iclass 18, count 0 2006.229.10:47:05.79#ibcon#wrote, iclass 18, count 0 2006.229.10:47:05.79#ibcon#about to read 3, iclass 18, count 0 2006.229.10:47:05.83#ibcon#read 3, iclass 18, count 0 2006.229.10:47:05.83#ibcon#about to read 4, iclass 18, count 0 2006.229.10:47:05.83#ibcon#read 4, iclass 18, count 0 2006.229.10:47:05.83#ibcon#about to read 5, iclass 18, count 0 2006.229.10:47:05.83#ibcon#read 5, iclass 18, count 0 2006.229.10:47:05.83#ibcon#about to read 6, iclass 18, count 0 2006.229.10:47:05.83#ibcon#read 6, iclass 18, count 0 2006.229.10:47:05.83#ibcon#end of sib2, iclass 18, count 0 2006.229.10:47:05.83#ibcon#*after write, iclass 18, count 0 2006.229.10:47:05.83#ibcon#*before return 0, iclass 18, count 0 2006.229.10:47:05.83#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:05.83#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:05.83#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:47:05.83#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:47:05.83$vck44/va=3,6 2006.229.10:47:05.83#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.10:47:05.83#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.10:47:05.83#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:05.83#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:05.89#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:05.89#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:05.89#ibcon#enter wrdev, iclass 20, count 2 2006.229.10:47:05.89#ibcon#first serial, iclass 20, count 2 2006.229.10:47:05.89#ibcon#enter sib2, iclass 20, count 2 2006.229.10:47:05.89#ibcon#flushed, iclass 20, count 2 2006.229.10:47:05.89#ibcon#about to write, iclass 20, count 2 2006.229.10:47:05.89#ibcon#wrote, iclass 20, count 2 2006.229.10:47:05.89#ibcon#about to read 3, iclass 20, count 2 2006.229.10:47:05.91#ibcon#read 3, iclass 20, count 2 2006.229.10:47:05.91#ibcon#about to read 4, iclass 20, count 2 2006.229.10:47:05.91#ibcon#read 4, iclass 20, count 2 2006.229.10:47:05.91#ibcon#about to read 5, iclass 20, count 2 2006.229.10:47:05.91#ibcon#read 5, iclass 20, count 2 2006.229.10:47:05.91#ibcon#about to read 6, iclass 20, count 2 2006.229.10:47:05.91#ibcon#read 6, iclass 20, count 2 2006.229.10:47:05.91#ibcon#end of sib2, iclass 20, count 2 2006.229.10:47:05.91#ibcon#*mode == 0, iclass 20, count 2 2006.229.10:47:05.91#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.10:47:05.91#ibcon#[25=AT03-06\r\n] 2006.229.10:47:05.91#ibcon#*before write, iclass 20, count 2 2006.229.10:47:05.91#ibcon#enter sib2, iclass 20, count 2 2006.229.10:47:05.91#ibcon#flushed, iclass 20, count 2 2006.229.10:47:05.91#ibcon#about to write, iclass 20, count 2 2006.229.10:47:05.91#ibcon#wrote, iclass 20, count 2 2006.229.10:47:05.91#ibcon#about to read 3, iclass 20, count 2 2006.229.10:47:05.94#ibcon#read 3, iclass 20, count 2 2006.229.10:47:05.94#ibcon#about to read 4, iclass 20, count 2 2006.229.10:47:05.94#ibcon#read 4, iclass 20, count 2 2006.229.10:47:05.94#ibcon#about to read 5, iclass 20, count 2 2006.229.10:47:05.94#ibcon#read 5, iclass 20, count 2 2006.229.10:47:05.94#ibcon#about to read 6, iclass 20, count 2 2006.229.10:47:05.94#ibcon#read 6, iclass 20, count 2 2006.229.10:47:05.94#ibcon#end of sib2, iclass 20, count 2 2006.229.10:47:05.94#ibcon#*after write, iclass 20, count 2 2006.229.10:47:05.94#ibcon#*before return 0, iclass 20, count 2 2006.229.10:47:05.94#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:05.94#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:05.94#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.10:47:05.94#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:05.94#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:06.06#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:06.06#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:06.06#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:47:06.06#ibcon#first serial, iclass 20, count 0 2006.229.10:47:06.06#ibcon#enter sib2, iclass 20, count 0 2006.229.10:47:06.06#ibcon#flushed, iclass 20, count 0 2006.229.10:47:06.06#ibcon#about to write, iclass 20, count 0 2006.229.10:47:06.06#ibcon#wrote, iclass 20, count 0 2006.229.10:47:06.06#ibcon#about to read 3, iclass 20, count 0 2006.229.10:47:06.08#ibcon#read 3, iclass 20, count 0 2006.229.10:47:06.08#ibcon#about to read 4, iclass 20, count 0 2006.229.10:47:06.08#ibcon#read 4, iclass 20, count 0 2006.229.10:47:06.08#ibcon#about to read 5, iclass 20, count 0 2006.229.10:47:06.08#ibcon#read 5, iclass 20, count 0 2006.229.10:47:06.08#ibcon#about to read 6, iclass 20, count 0 2006.229.10:47:06.08#ibcon#read 6, iclass 20, count 0 2006.229.10:47:06.08#ibcon#end of sib2, iclass 20, count 0 2006.229.10:47:06.08#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:47:06.08#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:47:06.08#ibcon#[25=USB\r\n] 2006.229.10:47:06.08#ibcon#*before write, iclass 20, count 0 2006.229.10:47:06.08#ibcon#enter sib2, iclass 20, count 0 2006.229.10:47:06.08#ibcon#flushed, iclass 20, count 0 2006.229.10:47:06.08#ibcon#about to write, iclass 20, count 0 2006.229.10:47:06.08#ibcon#wrote, iclass 20, count 0 2006.229.10:47:06.08#ibcon#about to read 3, iclass 20, count 0 2006.229.10:47:06.11#ibcon#read 3, iclass 20, count 0 2006.229.10:47:06.11#ibcon#about to read 4, iclass 20, count 0 2006.229.10:47:06.11#ibcon#read 4, iclass 20, count 0 2006.229.10:47:06.11#ibcon#about to read 5, iclass 20, count 0 2006.229.10:47:06.11#ibcon#read 5, iclass 20, count 0 2006.229.10:47:06.11#ibcon#about to read 6, iclass 20, count 0 2006.229.10:47:06.11#ibcon#read 6, iclass 20, count 0 2006.229.10:47:06.11#ibcon#end of sib2, iclass 20, count 0 2006.229.10:47:06.11#ibcon#*after write, iclass 20, count 0 2006.229.10:47:06.11#ibcon#*before return 0, iclass 20, count 0 2006.229.10:47:06.11#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:06.11#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:06.11#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:47:06.11#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:47:06.11$vck44/valo=4,624.99 2006.229.10:47:06.11#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.10:47:06.11#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.10:47:06.11#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:06.11#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:06.11#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:06.11#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:06.11#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:47:06.11#ibcon#first serial, iclass 22, count 0 2006.229.10:47:06.11#ibcon#enter sib2, iclass 22, count 0 2006.229.10:47:06.11#ibcon#flushed, iclass 22, count 0 2006.229.10:47:06.11#ibcon#about to write, iclass 22, count 0 2006.229.10:47:06.11#ibcon#wrote, iclass 22, count 0 2006.229.10:47:06.11#ibcon#about to read 3, iclass 22, count 0 2006.229.10:47:06.13#ibcon#read 3, iclass 22, count 0 2006.229.10:47:06.13#ibcon#about to read 4, iclass 22, count 0 2006.229.10:47:06.13#ibcon#read 4, iclass 22, count 0 2006.229.10:47:06.13#ibcon#about to read 5, iclass 22, count 0 2006.229.10:47:06.13#ibcon#read 5, iclass 22, count 0 2006.229.10:47:06.13#ibcon#about to read 6, iclass 22, count 0 2006.229.10:47:06.13#ibcon#read 6, iclass 22, count 0 2006.229.10:47:06.13#ibcon#end of sib2, iclass 22, count 0 2006.229.10:47:06.13#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:47:06.13#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:47:06.13#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:47:06.13#ibcon#*before write, iclass 22, count 0 2006.229.10:47:06.13#ibcon#enter sib2, iclass 22, count 0 2006.229.10:47:06.13#ibcon#flushed, iclass 22, count 0 2006.229.10:47:06.13#ibcon#about to write, iclass 22, count 0 2006.229.10:47:06.13#ibcon#wrote, iclass 22, count 0 2006.229.10:47:06.13#ibcon#about to read 3, iclass 22, count 0 2006.229.10:47:06.17#ibcon#read 3, iclass 22, count 0 2006.229.10:47:06.17#ibcon#about to read 4, iclass 22, count 0 2006.229.10:47:06.17#ibcon#read 4, iclass 22, count 0 2006.229.10:47:06.17#ibcon#about to read 5, iclass 22, count 0 2006.229.10:47:06.17#ibcon#read 5, iclass 22, count 0 2006.229.10:47:06.17#ibcon#about to read 6, iclass 22, count 0 2006.229.10:47:06.17#ibcon#read 6, iclass 22, count 0 2006.229.10:47:06.17#ibcon#end of sib2, iclass 22, count 0 2006.229.10:47:06.17#ibcon#*after write, iclass 22, count 0 2006.229.10:47:06.17#ibcon#*before return 0, iclass 22, count 0 2006.229.10:47:06.17#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:06.17#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:06.17#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:47:06.17#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:47:06.17$vck44/va=4,7 2006.229.10:47:06.17#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.10:47:06.17#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.10:47:06.17#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:06.17#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:06.23#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:06.23#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:06.23#ibcon#enter wrdev, iclass 24, count 2 2006.229.10:47:06.23#ibcon#first serial, iclass 24, count 2 2006.229.10:47:06.23#ibcon#enter sib2, iclass 24, count 2 2006.229.10:47:06.23#ibcon#flushed, iclass 24, count 2 2006.229.10:47:06.23#ibcon#about to write, iclass 24, count 2 2006.229.10:47:06.23#ibcon#wrote, iclass 24, count 2 2006.229.10:47:06.23#ibcon#about to read 3, iclass 24, count 2 2006.229.10:47:06.25#ibcon#read 3, iclass 24, count 2 2006.229.10:47:06.25#ibcon#about to read 4, iclass 24, count 2 2006.229.10:47:06.25#ibcon#read 4, iclass 24, count 2 2006.229.10:47:06.25#ibcon#about to read 5, iclass 24, count 2 2006.229.10:47:06.25#ibcon#read 5, iclass 24, count 2 2006.229.10:47:06.25#ibcon#about to read 6, iclass 24, count 2 2006.229.10:47:06.25#ibcon#read 6, iclass 24, count 2 2006.229.10:47:06.25#ibcon#end of sib2, iclass 24, count 2 2006.229.10:47:06.25#ibcon#*mode == 0, iclass 24, count 2 2006.229.10:47:06.25#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.10:47:06.25#ibcon#[25=AT04-07\r\n] 2006.229.10:47:06.25#ibcon#*before write, iclass 24, count 2 2006.229.10:47:06.25#ibcon#enter sib2, iclass 24, count 2 2006.229.10:47:06.25#ibcon#flushed, iclass 24, count 2 2006.229.10:47:06.25#ibcon#about to write, iclass 24, count 2 2006.229.10:47:06.25#ibcon#wrote, iclass 24, count 2 2006.229.10:47:06.25#ibcon#about to read 3, iclass 24, count 2 2006.229.10:47:06.28#ibcon#read 3, iclass 24, count 2 2006.229.10:47:06.28#ibcon#about to read 4, iclass 24, count 2 2006.229.10:47:06.28#ibcon#read 4, iclass 24, count 2 2006.229.10:47:06.28#ibcon#about to read 5, iclass 24, count 2 2006.229.10:47:06.28#ibcon#read 5, iclass 24, count 2 2006.229.10:47:06.28#ibcon#about to read 6, iclass 24, count 2 2006.229.10:47:06.28#ibcon#read 6, iclass 24, count 2 2006.229.10:47:06.28#ibcon#end of sib2, iclass 24, count 2 2006.229.10:47:06.28#ibcon#*after write, iclass 24, count 2 2006.229.10:47:06.28#ibcon#*before return 0, iclass 24, count 2 2006.229.10:47:06.28#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:06.28#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:06.28#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.10:47:06.28#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:06.28#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:06.40#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:06.40#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:06.40#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:47:06.40#ibcon#first serial, iclass 24, count 0 2006.229.10:47:06.40#ibcon#enter sib2, iclass 24, count 0 2006.229.10:47:06.40#ibcon#flushed, iclass 24, count 0 2006.229.10:47:06.40#ibcon#about to write, iclass 24, count 0 2006.229.10:47:06.40#ibcon#wrote, iclass 24, count 0 2006.229.10:47:06.40#ibcon#about to read 3, iclass 24, count 0 2006.229.10:47:06.42#ibcon#read 3, iclass 24, count 0 2006.229.10:47:06.42#ibcon#about to read 4, iclass 24, count 0 2006.229.10:47:06.42#ibcon#read 4, iclass 24, count 0 2006.229.10:47:06.42#ibcon#about to read 5, iclass 24, count 0 2006.229.10:47:06.42#ibcon#read 5, iclass 24, count 0 2006.229.10:47:06.42#ibcon#about to read 6, iclass 24, count 0 2006.229.10:47:06.42#ibcon#read 6, iclass 24, count 0 2006.229.10:47:06.42#ibcon#end of sib2, iclass 24, count 0 2006.229.10:47:06.42#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:47:06.42#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:47:06.42#ibcon#[25=USB\r\n] 2006.229.10:47:06.42#ibcon#*before write, iclass 24, count 0 2006.229.10:47:06.42#ibcon#enter sib2, iclass 24, count 0 2006.229.10:47:06.42#ibcon#flushed, iclass 24, count 0 2006.229.10:47:06.42#ibcon#about to write, iclass 24, count 0 2006.229.10:47:06.42#ibcon#wrote, iclass 24, count 0 2006.229.10:47:06.42#ibcon#about to read 3, iclass 24, count 0 2006.229.10:47:06.45#ibcon#read 3, iclass 24, count 0 2006.229.10:47:06.45#ibcon#about to read 4, iclass 24, count 0 2006.229.10:47:06.45#ibcon#read 4, iclass 24, count 0 2006.229.10:47:06.45#ibcon#about to read 5, iclass 24, count 0 2006.229.10:47:06.45#ibcon#read 5, iclass 24, count 0 2006.229.10:47:06.45#ibcon#about to read 6, iclass 24, count 0 2006.229.10:47:06.45#ibcon#read 6, iclass 24, count 0 2006.229.10:47:06.45#ibcon#end of sib2, iclass 24, count 0 2006.229.10:47:06.45#ibcon#*after write, iclass 24, count 0 2006.229.10:47:06.45#ibcon#*before return 0, iclass 24, count 0 2006.229.10:47:06.45#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:06.45#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:06.45#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:47:06.45#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:47:06.45$vck44/valo=5,734.99 2006.229.10:47:06.45#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.10:47:06.45#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.10:47:06.45#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:06.45#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:06.45#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:06.45#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:06.45#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:47:06.45#ibcon#first serial, iclass 26, count 0 2006.229.10:47:06.45#ibcon#enter sib2, iclass 26, count 0 2006.229.10:47:06.45#ibcon#flushed, iclass 26, count 0 2006.229.10:47:06.45#ibcon#about to write, iclass 26, count 0 2006.229.10:47:06.45#ibcon#wrote, iclass 26, count 0 2006.229.10:47:06.45#ibcon#about to read 3, iclass 26, count 0 2006.229.10:47:06.47#ibcon#read 3, iclass 26, count 0 2006.229.10:47:06.47#ibcon#about to read 4, iclass 26, count 0 2006.229.10:47:06.47#ibcon#read 4, iclass 26, count 0 2006.229.10:47:06.47#ibcon#about to read 5, iclass 26, count 0 2006.229.10:47:06.47#ibcon#read 5, iclass 26, count 0 2006.229.10:47:06.47#ibcon#about to read 6, iclass 26, count 0 2006.229.10:47:06.47#ibcon#read 6, iclass 26, count 0 2006.229.10:47:06.47#ibcon#end of sib2, iclass 26, count 0 2006.229.10:47:06.47#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:47:06.47#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:47:06.47#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:47:06.47#ibcon#*before write, iclass 26, count 0 2006.229.10:47:06.47#ibcon#enter sib2, iclass 26, count 0 2006.229.10:47:06.47#ibcon#flushed, iclass 26, count 0 2006.229.10:47:06.47#ibcon#about to write, iclass 26, count 0 2006.229.10:47:06.47#ibcon#wrote, iclass 26, count 0 2006.229.10:47:06.47#ibcon#about to read 3, iclass 26, count 0 2006.229.10:47:06.51#ibcon#read 3, iclass 26, count 0 2006.229.10:47:06.51#ibcon#about to read 4, iclass 26, count 0 2006.229.10:47:06.51#ibcon#read 4, iclass 26, count 0 2006.229.10:47:06.51#ibcon#about to read 5, iclass 26, count 0 2006.229.10:47:06.51#ibcon#read 5, iclass 26, count 0 2006.229.10:47:06.51#ibcon#about to read 6, iclass 26, count 0 2006.229.10:47:06.51#ibcon#read 6, iclass 26, count 0 2006.229.10:47:06.51#ibcon#end of sib2, iclass 26, count 0 2006.229.10:47:06.51#ibcon#*after write, iclass 26, count 0 2006.229.10:47:06.51#ibcon#*before return 0, iclass 26, count 0 2006.229.10:47:06.51#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:06.51#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:06.51#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:47:06.51#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:47:06.51$vck44/va=5,4 2006.229.10:47:06.51#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.10:47:06.51#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.10:47:06.51#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:06.51#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:06.57#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:06.57#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:06.57#ibcon#enter wrdev, iclass 28, count 2 2006.229.10:47:06.57#ibcon#first serial, iclass 28, count 2 2006.229.10:47:06.57#ibcon#enter sib2, iclass 28, count 2 2006.229.10:47:06.57#ibcon#flushed, iclass 28, count 2 2006.229.10:47:06.57#ibcon#about to write, iclass 28, count 2 2006.229.10:47:06.57#ibcon#wrote, iclass 28, count 2 2006.229.10:47:06.57#ibcon#about to read 3, iclass 28, count 2 2006.229.10:47:06.59#ibcon#read 3, iclass 28, count 2 2006.229.10:47:06.59#ibcon#about to read 4, iclass 28, count 2 2006.229.10:47:06.59#ibcon#read 4, iclass 28, count 2 2006.229.10:47:06.59#ibcon#about to read 5, iclass 28, count 2 2006.229.10:47:06.59#ibcon#read 5, iclass 28, count 2 2006.229.10:47:06.59#ibcon#about to read 6, iclass 28, count 2 2006.229.10:47:06.59#ibcon#read 6, iclass 28, count 2 2006.229.10:47:06.59#ibcon#end of sib2, iclass 28, count 2 2006.229.10:47:06.59#ibcon#*mode == 0, iclass 28, count 2 2006.229.10:47:06.59#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.10:47:06.59#ibcon#[25=AT05-04\r\n] 2006.229.10:47:06.59#ibcon#*before write, iclass 28, count 2 2006.229.10:47:06.59#ibcon#enter sib2, iclass 28, count 2 2006.229.10:47:06.59#ibcon#flushed, iclass 28, count 2 2006.229.10:47:06.59#ibcon#about to write, iclass 28, count 2 2006.229.10:47:06.59#ibcon#wrote, iclass 28, count 2 2006.229.10:47:06.59#ibcon#about to read 3, iclass 28, count 2 2006.229.10:47:06.62#ibcon#read 3, iclass 28, count 2 2006.229.10:47:06.62#ibcon#about to read 4, iclass 28, count 2 2006.229.10:47:06.62#ibcon#read 4, iclass 28, count 2 2006.229.10:47:06.62#ibcon#about to read 5, iclass 28, count 2 2006.229.10:47:06.62#ibcon#read 5, iclass 28, count 2 2006.229.10:47:06.62#ibcon#about to read 6, iclass 28, count 2 2006.229.10:47:06.62#ibcon#read 6, iclass 28, count 2 2006.229.10:47:06.62#ibcon#end of sib2, iclass 28, count 2 2006.229.10:47:06.62#ibcon#*after write, iclass 28, count 2 2006.229.10:47:06.62#ibcon#*before return 0, iclass 28, count 2 2006.229.10:47:06.62#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:06.62#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:06.62#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.10:47:06.62#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:06.62#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:06.74#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:06.74#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:06.74#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:47:06.74#ibcon#first serial, iclass 28, count 0 2006.229.10:47:06.74#ibcon#enter sib2, iclass 28, count 0 2006.229.10:47:06.74#ibcon#flushed, iclass 28, count 0 2006.229.10:47:06.74#ibcon#about to write, iclass 28, count 0 2006.229.10:47:06.74#ibcon#wrote, iclass 28, count 0 2006.229.10:47:06.74#ibcon#about to read 3, iclass 28, count 0 2006.229.10:47:06.76#ibcon#read 3, iclass 28, count 0 2006.229.10:47:06.76#ibcon#about to read 4, iclass 28, count 0 2006.229.10:47:06.76#ibcon#read 4, iclass 28, count 0 2006.229.10:47:06.76#ibcon#about to read 5, iclass 28, count 0 2006.229.10:47:06.76#ibcon#read 5, iclass 28, count 0 2006.229.10:47:06.76#ibcon#about to read 6, iclass 28, count 0 2006.229.10:47:06.76#ibcon#read 6, iclass 28, count 0 2006.229.10:47:06.76#ibcon#end of sib2, iclass 28, count 0 2006.229.10:47:06.76#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:47:06.76#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:47:06.76#ibcon#[25=USB\r\n] 2006.229.10:47:06.76#ibcon#*before write, iclass 28, count 0 2006.229.10:47:06.76#ibcon#enter sib2, iclass 28, count 0 2006.229.10:47:06.76#ibcon#flushed, iclass 28, count 0 2006.229.10:47:06.76#ibcon#about to write, iclass 28, count 0 2006.229.10:47:06.76#ibcon#wrote, iclass 28, count 0 2006.229.10:47:06.76#ibcon#about to read 3, iclass 28, count 0 2006.229.10:47:06.79#ibcon#read 3, iclass 28, count 0 2006.229.10:47:06.79#ibcon#about to read 4, iclass 28, count 0 2006.229.10:47:06.79#ibcon#read 4, iclass 28, count 0 2006.229.10:47:06.79#ibcon#about to read 5, iclass 28, count 0 2006.229.10:47:06.79#ibcon#read 5, iclass 28, count 0 2006.229.10:47:06.79#ibcon#about to read 6, iclass 28, count 0 2006.229.10:47:06.79#ibcon#read 6, iclass 28, count 0 2006.229.10:47:06.79#ibcon#end of sib2, iclass 28, count 0 2006.229.10:47:06.79#ibcon#*after write, iclass 28, count 0 2006.229.10:47:06.79#ibcon#*before return 0, iclass 28, count 0 2006.229.10:47:06.79#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:06.79#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:06.79#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:47:06.79#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:47:06.79$vck44/valo=6,814.99 2006.229.10:47:06.79#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:47:06.79#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:47:06.79#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:06.79#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:06.79#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:06.79#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:06.79#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:47:06.79#ibcon#first serial, iclass 30, count 0 2006.229.10:47:06.79#ibcon#enter sib2, iclass 30, count 0 2006.229.10:47:06.79#ibcon#flushed, iclass 30, count 0 2006.229.10:47:06.79#ibcon#about to write, iclass 30, count 0 2006.229.10:47:06.79#ibcon#wrote, iclass 30, count 0 2006.229.10:47:06.79#ibcon#about to read 3, iclass 30, count 0 2006.229.10:47:06.81#ibcon#read 3, iclass 30, count 0 2006.229.10:47:06.81#ibcon#about to read 4, iclass 30, count 0 2006.229.10:47:06.81#ibcon#read 4, iclass 30, count 0 2006.229.10:47:06.81#ibcon#about to read 5, iclass 30, count 0 2006.229.10:47:06.81#ibcon#read 5, iclass 30, count 0 2006.229.10:47:06.81#ibcon#about to read 6, iclass 30, count 0 2006.229.10:47:06.81#ibcon#read 6, iclass 30, count 0 2006.229.10:47:06.81#ibcon#end of sib2, iclass 30, count 0 2006.229.10:47:06.81#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:47:06.81#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:47:06.81#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:47:06.81#ibcon#*before write, iclass 30, count 0 2006.229.10:47:06.81#ibcon#enter sib2, iclass 30, count 0 2006.229.10:47:06.81#ibcon#flushed, iclass 30, count 0 2006.229.10:47:06.81#ibcon#about to write, iclass 30, count 0 2006.229.10:47:06.81#ibcon#wrote, iclass 30, count 0 2006.229.10:47:06.81#ibcon#about to read 3, iclass 30, count 0 2006.229.10:47:06.85#ibcon#read 3, iclass 30, count 0 2006.229.10:47:06.85#ibcon#about to read 4, iclass 30, count 0 2006.229.10:47:06.85#ibcon#read 4, iclass 30, count 0 2006.229.10:47:06.85#ibcon#about to read 5, iclass 30, count 0 2006.229.10:47:06.85#ibcon#read 5, iclass 30, count 0 2006.229.10:47:06.85#ibcon#about to read 6, iclass 30, count 0 2006.229.10:47:06.85#ibcon#read 6, iclass 30, count 0 2006.229.10:47:06.85#ibcon#end of sib2, iclass 30, count 0 2006.229.10:47:06.85#ibcon#*after write, iclass 30, count 0 2006.229.10:47:06.85#ibcon#*before return 0, iclass 30, count 0 2006.229.10:47:06.85#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:06.85#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:06.85#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:47:06.85#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:47:06.85$vck44/va=6,4 2006.229.10:47:06.85#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.10:47:06.85#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.10:47:06.85#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:06.85#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:06.91#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:06.91#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:06.91#ibcon#enter wrdev, iclass 32, count 2 2006.229.10:47:06.91#ibcon#first serial, iclass 32, count 2 2006.229.10:47:06.91#ibcon#enter sib2, iclass 32, count 2 2006.229.10:47:06.91#ibcon#flushed, iclass 32, count 2 2006.229.10:47:06.91#ibcon#about to write, iclass 32, count 2 2006.229.10:47:06.91#ibcon#wrote, iclass 32, count 2 2006.229.10:47:06.91#ibcon#about to read 3, iclass 32, count 2 2006.229.10:47:06.93#ibcon#read 3, iclass 32, count 2 2006.229.10:47:06.93#ibcon#about to read 4, iclass 32, count 2 2006.229.10:47:06.93#ibcon#read 4, iclass 32, count 2 2006.229.10:47:06.93#ibcon#about to read 5, iclass 32, count 2 2006.229.10:47:06.93#ibcon#read 5, iclass 32, count 2 2006.229.10:47:06.93#ibcon#about to read 6, iclass 32, count 2 2006.229.10:47:06.93#ibcon#read 6, iclass 32, count 2 2006.229.10:47:06.93#ibcon#end of sib2, iclass 32, count 2 2006.229.10:47:06.93#ibcon#*mode == 0, iclass 32, count 2 2006.229.10:47:06.93#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.10:47:06.93#ibcon#[25=AT06-04\r\n] 2006.229.10:47:06.93#ibcon#*before write, iclass 32, count 2 2006.229.10:47:06.93#ibcon#enter sib2, iclass 32, count 2 2006.229.10:47:06.93#ibcon#flushed, iclass 32, count 2 2006.229.10:47:06.93#ibcon#about to write, iclass 32, count 2 2006.229.10:47:06.93#ibcon#wrote, iclass 32, count 2 2006.229.10:47:06.93#ibcon#about to read 3, iclass 32, count 2 2006.229.10:47:06.96#ibcon#read 3, iclass 32, count 2 2006.229.10:47:06.96#ibcon#about to read 4, iclass 32, count 2 2006.229.10:47:06.96#ibcon#read 4, iclass 32, count 2 2006.229.10:47:06.96#ibcon#about to read 5, iclass 32, count 2 2006.229.10:47:06.96#ibcon#read 5, iclass 32, count 2 2006.229.10:47:06.96#ibcon#about to read 6, iclass 32, count 2 2006.229.10:47:06.96#ibcon#read 6, iclass 32, count 2 2006.229.10:47:06.96#ibcon#end of sib2, iclass 32, count 2 2006.229.10:47:06.96#ibcon#*after write, iclass 32, count 2 2006.229.10:47:06.96#ibcon#*before return 0, iclass 32, count 2 2006.229.10:47:06.96#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:06.96#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:06.96#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.10:47:06.96#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:06.96#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:07.08#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:07.08#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:07.08#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:47:07.08#ibcon#first serial, iclass 32, count 0 2006.229.10:47:07.08#ibcon#enter sib2, iclass 32, count 0 2006.229.10:47:07.08#ibcon#flushed, iclass 32, count 0 2006.229.10:47:07.08#ibcon#about to write, iclass 32, count 0 2006.229.10:47:07.08#ibcon#wrote, iclass 32, count 0 2006.229.10:47:07.08#ibcon#about to read 3, iclass 32, count 0 2006.229.10:47:07.10#ibcon#read 3, iclass 32, count 0 2006.229.10:47:07.10#ibcon#about to read 4, iclass 32, count 0 2006.229.10:47:07.10#ibcon#read 4, iclass 32, count 0 2006.229.10:47:07.10#ibcon#about to read 5, iclass 32, count 0 2006.229.10:47:07.10#ibcon#read 5, iclass 32, count 0 2006.229.10:47:07.10#ibcon#about to read 6, iclass 32, count 0 2006.229.10:47:07.10#ibcon#read 6, iclass 32, count 0 2006.229.10:47:07.10#ibcon#end of sib2, iclass 32, count 0 2006.229.10:47:07.10#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:47:07.10#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:47:07.10#ibcon#[25=USB\r\n] 2006.229.10:47:07.10#ibcon#*before write, iclass 32, count 0 2006.229.10:47:07.10#ibcon#enter sib2, iclass 32, count 0 2006.229.10:47:07.10#ibcon#flushed, iclass 32, count 0 2006.229.10:47:07.10#ibcon#about to write, iclass 32, count 0 2006.229.10:47:07.10#ibcon#wrote, iclass 32, count 0 2006.229.10:47:07.10#ibcon#about to read 3, iclass 32, count 0 2006.229.10:47:07.13#ibcon#read 3, iclass 32, count 0 2006.229.10:47:07.13#ibcon#about to read 4, iclass 32, count 0 2006.229.10:47:07.13#ibcon#read 4, iclass 32, count 0 2006.229.10:47:07.13#ibcon#about to read 5, iclass 32, count 0 2006.229.10:47:07.13#ibcon#read 5, iclass 32, count 0 2006.229.10:47:07.13#ibcon#about to read 6, iclass 32, count 0 2006.229.10:47:07.13#ibcon#read 6, iclass 32, count 0 2006.229.10:47:07.13#ibcon#end of sib2, iclass 32, count 0 2006.229.10:47:07.13#ibcon#*after write, iclass 32, count 0 2006.229.10:47:07.13#ibcon#*before return 0, iclass 32, count 0 2006.229.10:47:07.13#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:07.13#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:07.13#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:47:07.13#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:47:07.13$vck44/valo=7,864.99 2006.229.10:47:07.13#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.10:47:07.13#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.10:47:07.13#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:07.13#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:07.13#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:07.13#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:07.13#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:47:07.13#ibcon#first serial, iclass 34, count 0 2006.229.10:47:07.13#ibcon#enter sib2, iclass 34, count 0 2006.229.10:47:07.13#ibcon#flushed, iclass 34, count 0 2006.229.10:47:07.13#ibcon#about to write, iclass 34, count 0 2006.229.10:47:07.13#ibcon#wrote, iclass 34, count 0 2006.229.10:47:07.13#ibcon#about to read 3, iclass 34, count 0 2006.229.10:47:07.15#ibcon#read 3, iclass 34, count 0 2006.229.10:47:07.15#ibcon#about to read 4, iclass 34, count 0 2006.229.10:47:07.15#ibcon#read 4, iclass 34, count 0 2006.229.10:47:07.15#ibcon#about to read 5, iclass 34, count 0 2006.229.10:47:07.15#ibcon#read 5, iclass 34, count 0 2006.229.10:47:07.15#ibcon#about to read 6, iclass 34, count 0 2006.229.10:47:07.15#ibcon#read 6, iclass 34, count 0 2006.229.10:47:07.15#ibcon#end of sib2, iclass 34, count 0 2006.229.10:47:07.15#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:47:07.15#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:47:07.15#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:47:07.15#ibcon#*before write, iclass 34, count 0 2006.229.10:47:07.15#ibcon#enter sib2, iclass 34, count 0 2006.229.10:47:07.15#ibcon#flushed, iclass 34, count 0 2006.229.10:47:07.15#ibcon#about to write, iclass 34, count 0 2006.229.10:47:07.15#ibcon#wrote, iclass 34, count 0 2006.229.10:47:07.15#ibcon#about to read 3, iclass 34, count 0 2006.229.10:47:07.19#ibcon#read 3, iclass 34, count 0 2006.229.10:47:07.19#ibcon#about to read 4, iclass 34, count 0 2006.229.10:47:07.19#ibcon#read 4, iclass 34, count 0 2006.229.10:47:07.19#ibcon#about to read 5, iclass 34, count 0 2006.229.10:47:07.19#ibcon#read 5, iclass 34, count 0 2006.229.10:47:07.19#ibcon#about to read 6, iclass 34, count 0 2006.229.10:47:07.19#ibcon#read 6, iclass 34, count 0 2006.229.10:47:07.19#ibcon#end of sib2, iclass 34, count 0 2006.229.10:47:07.19#ibcon#*after write, iclass 34, count 0 2006.229.10:47:07.19#ibcon#*before return 0, iclass 34, count 0 2006.229.10:47:07.19#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:07.19#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:07.19#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:47:07.19#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:47:07.19$vck44/va=7,5 2006.229.10:47:07.19#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.10:47:07.19#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.10:47:07.19#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:07.19#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:07.25#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:07.25#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:07.25#ibcon#enter wrdev, iclass 36, count 2 2006.229.10:47:07.25#ibcon#first serial, iclass 36, count 2 2006.229.10:47:07.25#ibcon#enter sib2, iclass 36, count 2 2006.229.10:47:07.25#ibcon#flushed, iclass 36, count 2 2006.229.10:47:07.25#ibcon#about to write, iclass 36, count 2 2006.229.10:47:07.25#ibcon#wrote, iclass 36, count 2 2006.229.10:47:07.25#ibcon#about to read 3, iclass 36, count 2 2006.229.10:47:07.27#ibcon#read 3, iclass 36, count 2 2006.229.10:47:07.27#ibcon#about to read 4, iclass 36, count 2 2006.229.10:47:07.27#ibcon#read 4, iclass 36, count 2 2006.229.10:47:07.27#ibcon#about to read 5, iclass 36, count 2 2006.229.10:47:07.27#ibcon#read 5, iclass 36, count 2 2006.229.10:47:07.27#ibcon#about to read 6, iclass 36, count 2 2006.229.10:47:07.27#ibcon#read 6, iclass 36, count 2 2006.229.10:47:07.27#ibcon#end of sib2, iclass 36, count 2 2006.229.10:47:07.27#ibcon#*mode == 0, iclass 36, count 2 2006.229.10:47:07.27#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.10:47:07.27#ibcon#[25=AT07-05\r\n] 2006.229.10:47:07.27#ibcon#*before write, iclass 36, count 2 2006.229.10:47:07.27#ibcon#enter sib2, iclass 36, count 2 2006.229.10:47:07.27#ibcon#flushed, iclass 36, count 2 2006.229.10:47:07.27#ibcon#about to write, iclass 36, count 2 2006.229.10:47:07.27#ibcon#wrote, iclass 36, count 2 2006.229.10:47:07.27#ibcon#about to read 3, iclass 36, count 2 2006.229.10:47:07.30#ibcon#read 3, iclass 36, count 2 2006.229.10:47:07.30#ibcon#about to read 4, iclass 36, count 2 2006.229.10:47:07.30#ibcon#read 4, iclass 36, count 2 2006.229.10:47:07.30#ibcon#about to read 5, iclass 36, count 2 2006.229.10:47:07.30#ibcon#read 5, iclass 36, count 2 2006.229.10:47:07.30#ibcon#about to read 6, iclass 36, count 2 2006.229.10:47:07.30#ibcon#read 6, iclass 36, count 2 2006.229.10:47:07.30#ibcon#end of sib2, iclass 36, count 2 2006.229.10:47:07.30#ibcon#*after write, iclass 36, count 2 2006.229.10:47:07.30#ibcon#*before return 0, iclass 36, count 2 2006.229.10:47:07.30#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:07.30#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:07.30#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.10:47:07.30#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:07.30#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:07.42#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:07.42#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:07.42#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:47:07.42#ibcon#first serial, iclass 36, count 0 2006.229.10:47:07.42#ibcon#enter sib2, iclass 36, count 0 2006.229.10:47:07.42#ibcon#flushed, iclass 36, count 0 2006.229.10:47:07.42#ibcon#about to write, iclass 36, count 0 2006.229.10:47:07.42#ibcon#wrote, iclass 36, count 0 2006.229.10:47:07.42#ibcon#about to read 3, iclass 36, count 0 2006.229.10:47:07.44#ibcon#read 3, iclass 36, count 0 2006.229.10:47:07.44#ibcon#about to read 4, iclass 36, count 0 2006.229.10:47:07.44#ibcon#read 4, iclass 36, count 0 2006.229.10:47:07.44#ibcon#about to read 5, iclass 36, count 0 2006.229.10:47:07.44#ibcon#read 5, iclass 36, count 0 2006.229.10:47:07.44#ibcon#about to read 6, iclass 36, count 0 2006.229.10:47:07.44#ibcon#read 6, iclass 36, count 0 2006.229.10:47:07.44#ibcon#end of sib2, iclass 36, count 0 2006.229.10:47:07.44#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:47:07.44#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:47:07.44#ibcon#[25=USB\r\n] 2006.229.10:47:07.44#ibcon#*before write, iclass 36, count 0 2006.229.10:47:07.44#ibcon#enter sib2, iclass 36, count 0 2006.229.10:47:07.44#ibcon#flushed, iclass 36, count 0 2006.229.10:47:07.44#ibcon#about to write, iclass 36, count 0 2006.229.10:47:07.44#ibcon#wrote, iclass 36, count 0 2006.229.10:47:07.44#ibcon#about to read 3, iclass 36, count 0 2006.229.10:47:07.47#ibcon#read 3, iclass 36, count 0 2006.229.10:47:07.47#ibcon#about to read 4, iclass 36, count 0 2006.229.10:47:07.47#ibcon#read 4, iclass 36, count 0 2006.229.10:47:07.47#ibcon#about to read 5, iclass 36, count 0 2006.229.10:47:07.47#ibcon#read 5, iclass 36, count 0 2006.229.10:47:07.47#ibcon#about to read 6, iclass 36, count 0 2006.229.10:47:07.47#ibcon#read 6, iclass 36, count 0 2006.229.10:47:07.47#ibcon#end of sib2, iclass 36, count 0 2006.229.10:47:07.47#ibcon#*after write, iclass 36, count 0 2006.229.10:47:07.47#ibcon#*before return 0, iclass 36, count 0 2006.229.10:47:07.47#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:07.47#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:07.47#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:47:07.47#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:47:07.47$vck44/valo=8,884.99 2006.229.10:47:07.47#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:47:07.47#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:47:07.47#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:07.47#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:07.47#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:07.47#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:07.47#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:47:07.47#ibcon#first serial, iclass 38, count 0 2006.229.10:47:07.47#ibcon#enter sib2, iclass 38, count 0 2006.229.10:47:07.47#ibcon#flushed, iclass 38, count 0 2006.229.10:47:07.47#ibcon#about to write, iclass 38, count 0 2006.229.10:47:07.47#ibcon#wrote, iclass 38, count 0 2006.229.10:47:07.47#ibcon#about to read 3, iclass 38, count 0 2006.229.10:47:07.49#ibcon#read 3, iclass 38, count 0 2006.229.10:47:07.49#ibcon#about to read 4, iclass 38, count 0 2006.229.10:47:07.49#ibcon#read 4, iclass 38, count 0 2006.229.10:47:07.49#ibcon#about to read 5, iclass 38, count 0 2006.229.10:47:07.49#ibcon#read 5, iclass 38, count 0 2006.229.10:47:07.49#ibcon#about to read 6, iclass 38, count 0 2006.229.10:47:07.49#ibcon#read 6, iclass 38, count 0 2006.229.10:47:07.49#ibcon#end of sib2, iclass 38, count 0 2006.229.10:47:07.49#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:47:07.49#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:47:07.49#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:47:07.49#ibcon#*before write, iclass 38, count 0 2006.229.10:47:07.49#ibcon#enter sib2, iclass 38, count 0 2006.229.10:47:07.49#ibcon#flushed, iclass 38, count 0 2006.229.10:47:07.49#ibcon#about to write, iclass 38, count 0 2006.229.10:47:07.49#ibcon#wrote, iclass 38, count 0 2006.229.10:47:07.49#ibcon#about to read 3, iclass 38, count 0 2006.229.10:47:07.53#ibcon#read 3, iclass 38, count 0 2006.229.10:47:07.53#ibcon#about to read 4, iclass 38, count 0 2006.229.10:47:07.53#ibcon#read 4, iclass 38, count 0 2006.229.10:47:07.53#ibcon#about to read 5, iclass 38, count 0 2006.229.10:47:07.53#ibcon#read 5, iclass 38, count 0 2006.229.10:47:07.53#ibcon#about to read 6, iclass 38, count 0 2006.229.10:47:07.53#ibcon#read 6, iclass 38, count 0 2006.229.10:47:07.53#ibcon#end of sib2, iclass 38, count 0 2006.229.10:47:07.53#ibcon#*after write, iclass 38, count 0 2006.229.10:47:07.53#ibcon#*before return 0, iclass 38, count 0 2006.229.10:47:07.53#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:07.53#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:07.53#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:47:07.53#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:47:07.53$vck44/va=8,6 2006.229.10:47:07.53#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.10:47:07.53#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.10:47:07.53#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:07.53#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:47:07.59#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:47:07.59#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:47:07.59#ibcon#enter wrdev, iclass 40, count 2 2006.229.10:47:07.59#ibcon#first serial, iclass 40, count 2 2006.229.10:47:07.59#ibcon#enter sib2, iclass 40, count 2 2006.229.10:47:07.59#ibcon#flushed, iclass 40, count 2 2006.229.10:47:07.59#ibcon#about to write, iclass 40, count 2 2006.229.10:47:07.59#ibcon#wrote, iclass 40, count 2 2006.229.10:47:07.59#ibcon#about to read 3, iclass 40, count 2 2006.229.10:47:07.61#ibcon#read 3, iclass 40, count 2 2006.229.10:47:07.61#ibcon#about to read 4, iclass 40, count 2 2006.229.10:47:07.61#ibcon#read 4, iclass 40, count 2 2006.229.10:47:07.61#ibcon#about to read 5, iclass 40, count 2 2006.229.10:47:07.61#ibcon#read 5, iclass 40, count 2 2006.229.10:47:07.61#ibcon#about to read 6, iclass 40, count 2 2006.229.10:47:07.61#ibcon#read 6, iclass 40, count 2 2006.229.10:47:07.61#ibcon#end of sib2, iclass 40, count 2 2006.229.10:47:07.61#ibcon#*mode == 0, iclass 40, count 2 2006.229.10:47:07.61#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.10:47:07.61#ibcon#[25=AT08-06\r\n] 2006.229.10:47:07.61#ibcon#*before write, iclass 40, count 2 2006.229.10:47:07.61#ibcon#enter sib2, iclass 40, count 2 2006.229.10:47:07.61#ibcon#flushed, iclass 40, count 2 2006.229.10:47:07.61#ibcon#about to write, iclass 40, count 2 2006.229.10:47:07.61#ibcon#wrote, iclass 40, count 2 2006.229.10:47:07.61#ibcon#about to read 3, iclass 40, count 2 2006.229.10:47:07.64#ibcon#read 3, iclass 40, count 2 2006.229.10:47:07.64#ibcon#about to read 4, iclass 40, count 2 2006.229.10:47:07.64#ibcon#read 4, iclass 40, count 2 2006.229.10:47:07.64#ibcon#about to read 5, iclass 40, count 2 2006.229.10:47:07.64#ibcon#read 5, iclass 40, count 2 2006.229.10:47:07.64#ibcon#about to read 6, iclass 40, count 2 2006.229.10:47:07.64#ibcon#read 6, iclass 40, count 2 2006.229.10:47:07.64#ibcon#end of sib2, iclass 40, count 2 2006.229.10:47:07.64#ibcon#*after write, iclass 40, count 2 2006.229.10:47:07.64#ibcon#*before return 0, iclass 40, count 2 2006.229.10:47:07.64#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:47:07.64#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.10:47:07.64#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.10:47:07.64#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:07.64#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:47:07.76#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:47:07.76#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:47:07.76#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:47:07.76#ibcon#first serial, iclass 40, count 0 2006.229.10:47:07.76#ibcon#enter sib2, iclass 40, count 0 2006.229.10:47:07.76#ibcon#flushed, iclass 40, count 0 2006.229.10:47:07.76#ibcon#about to write, iclass 40, count 0 2006.229.10:47:07.76#ibcon#wrote, iclass 40, count 0 2006.229.10:47:07.76#ibcon#about to read 3, iclass 40, count 0 2006.229.10:47:07.78#ibcon#read 3, iclass 40, count 0 2006.229.10:47:07.78#ibcon#about to read 4, iclass 40, count 0 2006.229.10:47:07.78#ibcon#read 4, iclass 40, count 0 2006.229.10:47:07.78#ibcon#about to read 5, iclass 40, count 0 2006.229.10:47:07.78#ibcon#read 5, iclass 40, count 0 2006.229.10:47:07.78#ibcon#about to read 6, iclass 40, count 0 2006.229.10:47:07.78#ibcon#read 6, iclass 40, count 0 2006.229.10:47:07.78#ibcon#end of sib2, iclass 40, count 0 2006.229.10:47:07.78#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:47:07.78#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:47:07.78#ibcon#[25=USB\r\n] 2006.229.10:47:07.78#ibcon#*before write, iclass 40, count 0 2006.229.10:47:07.78#ibcon#enter sib2, iclass 40, count 0 2006.229.10:47:07.78#ibcon#flushed, iclass 40, count 0 2006.229.10:47:07.78#ibcon#about to write, iclass 40, count 0 2006.229.10:47:07.78#ibcon#wrote, iclass 40, count 0 2006.229.10:47:07.78#ibcon#about to read 3, iclass 40, count 0 2006.229.10:47:07.81#ibcon#read 3, iclass 40, count 0 2006.229.10:47:07.81#ibcon#about to read 4, iclass 40, count 0 2006.229.10:47:07.81#ibcon#read 4, iclass 40, count 0 2006.229.10:47:07.81#ibcon#about to read 5, iclass 40, count 0 2006.229.10:47:07.81#ibcon#read 5, iclass 40, count 0 2006.229.10:47:07.81#ibcon#about to read 6, iclass 40, count 0 2006.229.10:47:07.81#ibcon#read 6, iclass 40, count 0 2006.229.10:47:07.81#ibcon#end of sib2, iclass 40, count 0 2006.229.10:47:07.81#ibcon#*after write, iclass 40, count 0 2006.229.10:47:07.81#ibcon#*before return 0, iclass 40, count 0 2006.229.10:47:07.81#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:47:07.81#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.10:47:07.81#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:47:07.81#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:47:07.81$vck44/vblo=1,629.99 2006.229.10:47:07.81#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.10:47:07.81#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.10:47:07.81#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:07.81#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:47:07.81#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:47:07.81#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:47:07.81#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:47:07.81#ibcon#first serial, iclass 4, count 0 2006.229.10:47:07.81#ibcon#enter sib2, iclass 4, count 0 2006.229.10:47:07.81#ibcon#flushed, iclass 4, count 0 2006.229.10:47:07.81#ibcon#about to write, iclass 4, count 0 2006.229.10:47:07.81#ibcon#wrote, iclass 4, count 0 2006.229.10:47:07.81#ibcon#about to read 3, iclass 4, count 0 2006.229.10:47:07.83#ibcon#read 3, iclass 4, count 0 2006.229.10:47:07.83#ibcon#about to read 4, iclass 4, count 0 2006.229.10:47:07.83#ibcon#read 4, iclass 4, count 0 2006.229.10:47:07.83#ibcon#about to read 5, iclass 4, count 0 2006.229.10:47:07.83#ibcon#read 5, iclass 4, count 0 2006.229.10:47:07.83#ibcon#about to read 6, iclass 4, count 0 2006.229.10:47:07.83#ibcon#read 6, iclass 4, count 0 2006.229.10:47:07.83#ibcon#end of sib2, iclass 4, count 0 2006.229.10:47:07.83#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:47:07.83#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:47:07.83#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:47:07.83#ibcon#*before write, iclass 4, count 0 2006.229.10:47:07.83#ibcon#enter sib2, iclass 4, count 0 2006.229.10:47:07.83#ibcon#flushed, iclass 4, count 0 2006.229.10:47:07.83#ibcon#about to write, iclass 4, count 0 2006.229.10:47:07.83#ibcon#wrote, iclass 4, count 0 2006.229.10:47:07.83#ibcon#about to read 3, iclass 4, count 0 2006.229.10:47:07.87#ibcon#read 3, iclass 4, count 0 2006.229.10:47:07.87#ibcon#about to read 4, iclass 4, count 0 2006.229.10:47:07.87#ibcon#read 4, iclass 4, count 0 2006.229.10:47:07.87#ibcon#about to read 5, iclass 4, count 0 2006.229.10:47:07.87#ibcon#read 5, iclass 4, count 0 2006.229.10:47:07.87#ibcon#about to read 6, iclass 4, count 0 2006.229.10:47:07.87#ibcon#read 6, iclass 4, count 0 2006.229.10:47:07.87#ibcon#end of sib2, iclass 4, count 0 2006.229.10:47:07.87#ibcon#*after write, iclass 4, count 0 2006.229.10:47:07.87#ibcon#*before return 0, iclass 4, count 0 2006.229.10:47:07.87#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:47:07.87#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.10:47:07.87#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:47:07.87#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:47:07.87$vck44/vb=1,4 2006.229.10:47:07.87#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.10:47:07.87#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.10:47:07.87#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:07.87#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:47:07.87#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:47:07.87#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:47:07.87#ibcon#enter wrdev, iclass 6, count 2 2006.229.10:47:07.87#ibcon#first serial, iclass 6, count 2 2006.229.10:47:07.87#ibcon#enter sib2, iclass 6, count 2 2006.229.10:47:07.87#ibcon#flushed, iclass 6, count 2 2006.229.10:47:07.87#ibcon#about to write, iclass 6, count 2 2006.229.10:47:07.87#ibcon#wrote, iclass 6, count 2 2006.229.10:47:07.87#ibcon#about to read 3, iclass 6, count 2 2006.229.10:47:07.89#ibcon#read 3, iclass 6, count 2 2006.229.10:47:07.89#ibcon#about to read 4, iclass 6, count 2 2006.229.10:47:07.89#ibcon#read 4, iclass 6, count 2 2006.229.10:47:07.89#ibcon#about to read 5, iclass 6, count 2 2006.229.10:47:07.89#ibcon#read 5, iclass 6, count 2 2006.229.10:47:07.89#ibcon#about to read 6, iclass 6, count 2 2006.229.10:47:07.89#ibcon#read 6, iclass 6, count 2 2006.229.10:47:07.89#ibcon#end of sib2, iclass 6, count 2 2006.229.10:47:07.89#ibcon#*mode == 0, iclass 6, count 2 2006.229.10:47:07.89#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.10:47:07.89#ibcon#[27=AT01-04\r\n] 2006.229.10:47:07.89#ibcon#*before write, iclass 6, count 2 2006.229.10:47:07.89#ibcon#enter sib2, iclass 6, count 2 2006.229.10:47:07.89#ibcon#flushed, iclass 6, count 2 2006.229.10:47:07.89#ibcon#about to write, iclass 6, count 2 2006.229.10:47:07.89#ibcon#wrote, iclass 6, count 2 2006.229.10:47:07.89#ibcon#about to read 3, iclass 6, count 2 2006.229.10:47:07.92#ibcon#read 3, iclass 6, count 2 2006.229.10:47:07.92#ibcon#about to read 4, iclass 6, count 2 2006.229.10:47:07.92#ibcon#read 4, iclass 6, count 2 2006.229.10:47:07.92#ibcon#about to read 5, iclass 6, count 2 2006.229.10:47:07.92#ibcon#read 5, iclass 6, count 2 2006.229.10:47:07.92#ibcon#about to read 6, iclass 6, count 2 2006.229.10:47:07.92#ibcon#read 6, iclass 6, count 2 2006.229.10:47:07.92#ibcon#end of sib2, iclass 6, count 2 2006.229.10:47:07.92#ibcon#*after write, iclass 6, count 2 2006.229.10:47:07.92#ibcon#*before return 0, iclass 6, count 2 2006.229.10:47:07.92#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:47:07.92#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.10:47:07.92#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.10:47:07.92#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:07.92#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:47:08.04#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:47:08.04#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:47:08.04#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:47:08.04#ibcon#first serial, iclass 6, count 0 2006.229.10:47:08.04#ibcon#enter sib2, iclass 6, count 0 2006.229.10:47:08.04#ibcon#flushed, iclass 6, count 0 2006.229.10:47:08.04#ibcon#about to write, iclass 6, count 0 2006.229.10:47:08.04#ibcon#wrote, iclass 6, count 0 2006.229.10:47:08.04#ibcon#about to read 3, iclass 6, count 0 2006.229.10:47:08.06#ibcon#read 3, iclass 6, count 0 2006.229.10:47:08.06#ibcon#about to read 4, iclass 6, count 0 2006.229.10:47:08.06#ibcon#read 4, iclass 6, count 0 2006.229.10:47:08.06#ibcon#about to read 5, iclass 6, count 0 2006.229.10:47:08.06#ibcon#read 5, iclass 6, count 0 2006.229.10:47:08.06#ibcon#about to read 6, iclass 6, count 0 2006.229.10:47:08.06#ibcon#read 6, iclass 6, count 0 2006.229.10:47:08.06#ibcon#end of sib2, iclass 6, count 0 2006.229.10:47:08.06#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:47:08.06#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:47:08.06#ibcon#[27=USB\r\n] 2006.229.10:47:08.06#ibcon#*before write, iclass 6, count 0 2006.229.10:47:08.06#ibcon#enter sib2, iclass 6, count 0 2006.229.10:47:08.06#ibcon#flushed, iclass 6, count 0 2006.229.10:47:08.06#ibcon#about to write, iclass 6, count 0 2006.229.10:47:08.06#ibcon#wrote, iclass 6, count 0 2006.229.10:47:08.06#ibcon#about to read 3, iclass 6, count 0 2006.229.10:47:08.09#ibcon#read 3, iclass 6, count 0 2006.229.10:47:08.09#ibcon#about to read 4, iclass 6, count 0 2006.229.10:47:08.09#ibcon#read 4, iclass 6, count 0 2006.229.10:47:08.09#ibcon#about to read 5, iclass 6, count 0 2006.229.10:47:08.09#ibcon#read 5, iclass 6, count 0 2006.229.10:47:08.09#ibcon#about to read 6, iclass 6, count 0 2006.229.10:47:08.09#ibcon#read 6, iclass 6, count 0 2006.229.10:47:08.09#ibcon#end of sib2, iclass 6, count 0 2006.229.10:47:08.09#ibcon#*after write, iclass 6, count 0 2006.229.10:47:08.09#ibcon#*before return 0, iclass 6, count 0 2006.229.10:47:08.09#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:47:08.09#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.10:47:08.09#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:47:08.09#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:47:08.09$vck44/vblo=2,634.99 2006.229.10:47:08.09#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.10:47:08.09#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.10:47:08.09#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:08.09#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:08.09#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:08.09#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:08.09#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:47:08.09#ibcon#first serial, iclass 10, count 0 2006.229.10:47:08.09#ibcon#enter sib2, iclass 10, count 0 2006.229.10:47:08.09#ibcon#flushed, iclass 10, count 0 2006.229.10:47:08.09#ibcon#about to write, iclass 10, count 0 2006.229.10:47:08.09#ibcon#wrote, iclass 10, count 0 2006.229.10:47:08.09#ibcon#about to read 3, iclass 10, count 0 2006.229.10:47:08.11#ibcon#read 3, iclass 10, count 0 2006.229.10:47:08.11#ibcon#about to read 4, iclass 10, count 0 2006.229.10:47:08.11#ibcon#read 4, iclass 10, count 0 2006.229.10:47:08.11#ibcon#about to read 5, iclass 10, count 0 2006.229.10:47:08.11#ibcon#read 5, iclass 10, count 0 2006.229.10:47:08.11#ibcon#about to read 6, iclass 10, count 0 2006.229.10:47:08.11#ibcon#read 6, iclass 10, count 0 2006.229.10:47:08.11#ibcon#end of sib2, iclass 10, count 0 2006.229.10:47:08.11#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:47:08.11#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:47:08.11#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:47:08.11#ibcon#*before write, iclass 10, count 0 2006.229.10:47:08.11#ibcon#enter sib2, iclass 10, count 0 2006.229.10:47:08.11#ibcon#flushed, iclass 10, count 0 2006.229.10:47:08.11#ibcon#about to write, iclass 10, count 0 2006.229.10:47:08.11#ibcon#wrote, iclass 10, count 0 2006.229.10:47:08.11#ibcon#about to read 3, iclass 10, count 0 2006.229.10:47:08.15#ibcon#read 3, iclass 10, count 0 2006.229.10:47:08.15#ibcon#about to read 4, iclass 10, count 0 2006.229.10:47:08.15#ibcon#read 4, iclass 10, count 0 2006.229.10:47:08.15#ibcon#about to read 5, iclass 10, count 0 2006.229.10:47:08.15#ibcon#read 5, iclass 10, count 0 2006.229.10:47:08.15#ibcon#about to read 6, iclass 10, count 0 2006.229.10:47:08.15#ibcon#read 6, iclass 10, count 0 2006.229.10:47:08.15#ibcon#end of sib2, iclass 10, count 0 2006.229.10:47:08.15#ibcon#*after write, iclass 10, count 0 2006.229.10:47:08.15#ibcon#*before return 0, iclass 10, count 0 2006.229.10:47:08.15#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:08.15#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:47:08.15#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:47:08.15#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:47:08.15$vck44/vb=2,4 2006.229.10:47:08.15#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.10:47:08.15#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.10:47:08.15#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:08.15#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:08.21#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:08.21#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:08.21#ibcon#enter wrdev, iclass 12, count 2 2006.229.10:47:08.21#ibcon#first serial, iclass 12, count 2 2006.229.10:47:08.21#ibcon#enter sib2, iclass 12, count 2 2006.229.10:47:08.21#ibcon#flushed, iclass 12, count 2 2006.229.10:47:08.21#ibcon#about to write, iclass 12, count 2 2006.229.10:47:08.21#ibcon#wrote, iclass 12, count 2 2006.229.10:47:08.21#ibcon#about to read 3, iclass 12, count 2 2006.229.10:47:08.23#ibcon#read 3, iclass 12, count 2 2006.229.10:47:08.23#ibcon#about to read 4, iclass 12, count 2 2006.229.10:47:08.23#ibcon#read 4, iclass 12, count 2 2006.229.10:47:08.23#ibcon#about to read 5, iclass 12, count 2 2006.229.10:47:08.23#ibcon#read 5, iclass 12, count 2 2006.229.10:47:08.23#ibcon#about to read 6, iclass 12, count 2 2006.229.10:47:08.23#ibcon#read 6, iclass 12, count 2 2006.229.10:47:08.23#ibcon#end of sib2, iclass 12, count 2 2006.229.10:47:08.23#ibcon#*mode == 0, iclass 12, count 2 2006.229.10:47:08.23#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.10:47:08.23#ibcon#[27=AT02-04\r\n] 2006.229.10:47:08.23#ibcon#*before write, iclass 12, count 2 2006.229.10:47:08.23#ibcon#enter sib2, iclass 12, count 2 2006.229.10:47:08.23#ibcon#flushed, iclass 12, count 2 2006.229.10:47:08.23#ibcon#about to write, iclass 12, count 2 2006.229.10:47:08.23#ibcon#wrote, iclass 12, count 2 2006.229.10:47:08.23#ibcon#about to read 3, iclass 12, count 2 2006.229.10:47:08.26#ibcon#read 3, iclass 12, count 2 2006.229.10:47:08.26#ibcon#about to read 4, iclass 12, count 2 2006.229.10:47:08.26#ibcon#read 4, iclass 12, count 2 2006.229.10:47:08.26#ibcon#about to read 5, iclass 12, count 2 2006.229.10:47:08.26#ibcon#read 5, iclass 12, count 2 2006.229.10:47:08.26#ibcon#about to read 6, iclass 12, count 2 2006.229.10:47:08.26#ibcon#read 6, iclass 12, count 2 2006.229.10:47:08.26#ibcon#end of sib2, iclass 12, count 2 2006.229.10:47:08.26#ibcon#*after write, iclass 12, count 2 2006.229.10:47:08.26#ibcon#*before return 0, iclass 12, count 2 2006.229.10:47:08.26#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:08.26#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.10:47:08.26#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.10:47:08.26#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:08.26#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:08.38#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:08.38#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:08.38#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:47:08.38#ibcon#first serial, iclass 12, count 0 2006.229.10:47:08.38#ibcon#enter sib2, iclass 12, count 0 2006.229.10:47:08.38#ibcon#flushed, iclass 12, count 0 2006.229.10:47:08.38#ibcon#about to write, iclass 12, count 0 2006.229.10:47:08.38#ibcon#wrote, iclass 12, count 0 2006.229.10:47:08.38#ibcon#about to read 3, iclass 12, count 0 2006.229.10:47:08.40#ibcon#read 3, iclass 12, count 0 2006.229.10:47:08.40#ibcon#about to read 4, iclass 12, count 0 2006.229.10:47:08.40#ibcon#read 4, iclass 12, count 0 2006.229.10:47:08.40#ibcon#about to read 5, iclass 12, count 0 2006.229.10:47:08.40#ibcon#read 5, iclass 12, count 0 2006.229.10:47:08.40#ibcon#about to read 6, iclass 12, count 0 2006.229.10:47:08.40#ibcon#read 6, iclass 12, count 0 2006.229.10:47:08.40#ibcon#end of sib2, iclass 12, count 0 2006.229.10:47:08.40#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:47:08.40#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:47:08.40#ibcon#[27=USB\r\n] 2006.229.10:47:08.40#ibcon#*before write, iclass 12, count 0 2006.229.10:47:08.40#ibcon#enter sib2, iclass 12, count 0 2006.229.10:47:08.40#ibcon#flushed, iclass 12, count 0 2006.229.10:47:08.40#ibcon#about to write, iclass 12, count 0 2006.229.10:47:08.40#ibcon#wrote, iclass 12, count 0 2006.229.10:47:08.40#ibcon#about to read 3, iclass 12, count 0 2006.229.10:47:08.43#ibcon#read 3, iclass 12, count 0 2006.229.10:47:08.43#ibcon#about to read 4, iclass 12, count 0 2006.229.10:47:08.43#ibcon#read 4, iclass 12, count 0 2006.229.10:47:08.43#ibcon#about to read 5, iclass 12, count 0 2006.229.10:47:08.43#ibcon#read 5, iclass 12, count 0 2006.229.10:47:08.43#ibcon#about to read 6, iclass 12, count 0 2006.229.10:47:08.43#ibcon#read 6, iclass 12, count 0 2006.229.10:47:08.43#ibcon#end of sib2, iclass 12, count 0 2006.229.10:47:08.43#ibcon#*after write, iclass 12, count 0 2006.229.10:47:08.43#ibcon#*before return 0, iclass 12, count 0 2006.229.10:47:08.43#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:08.43#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.10:47:08.43#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:47:08.43#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:47:08.43$vck44/vblo=3,649.99 2006.229.10:47:08.43#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.10:47:08.43#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.10:47:08.43#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:08.43#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:08.43#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:08.43#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:08.43#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:47:08.43#ibcon#first serial, iclass 14, count 0 2006.229.10:47:08.43#ibcon#enter sib2, iclass 14, count 0 2006.229.10:47:08.43#ibcon#flushed, iclass 14, count 0 2006.229.10:47:08.43#ibcon#about to write, iclass 14, count 0 2006.229.10:47:08.43#ibcon#wrote, iclass 14, count 0 2006.229.10:47:08.43#ibcon#about to read 3, iclass 14, count 0 2006.229.10:47:08.45#ibcon#read 3, iclass 14, count 0 2006.229.10:47:08.45#ibcon#about to read 4, iclass 14, count 0 2006.229.10:47:08.45#ibcon#read 4, iclass 14, count 0 2006.229.10:47:08.45#ibcon#about to read 5, iclass 14, count 0 2006.229.10:47:08.45#ibcon#read 5, iclass 14, count 0 2006.229.10:47:08.45#ibcon#about to read 6, iclass 14, count 0 2006.229.10:47:08.45#ibcon#read 6, iclass 14, count 0 2006.229.10:47:08.45#ibcon#end of sib2, iclass 14, count 0 2006.229.10:47:08.45#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:47:08.45#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:47:08.45#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:47:08.45#ibcon#*before write, iclass 14, count 0 2006.229.10:47:08.45#ibcon#enter sib2, iclass 14, count 0 2006.229.10:47:08.45#ibcon#flushed, iclass 14, count 0 2006.229.10:47:08.45#ibcon#about to write, iclass 14, count 0 2006.229.10:47:08.45#ibcon#wrote, iclass 14, count 0 2006.229.10:47:08.45#ibcon#about to read 3, iclass 14, count 0 2006.229.10:47:08.49#ibcon#read 3, iclass 14, count 0 2006.229.10:47:08.49#ibcon#about to read 4, iclass 14, count 0 2006.229.10:47:08.49#ibcon#read 4, iclass 14, count 0 2006.229.10:47:08.49#ibcon#about to read 5, iclass 14, count 0 2006.229.10:47:08.49#ibcon#read 5, iclass 14, count 0 2006.229.10:47:08.49#ibcon#about to read 6, iclass 14, count 0 2006.229.10:47:08.49#ibcon#read 6, iclass 14, count 0 2006.229.10:47:08.49#ibcon#end of sib2, iclass 14, count 0 2006.229.10:47:08.49#ibcon#*after write, iclass 14, count 0 2006.229.10:47:08.49#ibcon#*before return 0, iclass 14, count 0 2006.229.10:47:08.49#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:08.49#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.10:47:08.49#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:47:08.49#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:47:08.49$vck44/vb=3,4 2006.229.10:47:08.49#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.10:47:08.49#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.10:47:08.49#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:08.49#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:08.55#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:08.55#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:08.55#ibcon#enter wrdev, iclass 16, count 2 2006.229.10:47:08.55#ibcon#first serial, iclass 16, count 2 2006.229.10:47:08.55#ibcon#enter sib2, iclass 16, count 2 2006.229.10:47:08.55#ibcon#flushed, iclass 16, count 2 2006.229.10:47:08.55#ibcon#about to write, iclass 16, count 2 2006.229.10:47:08.55#ibcon#wrote, iclass 16, count 2 2006.229.10:47:08.55#ibcon#about to read 3, iclass 16, count 2 2006.229.10:47:08.57#ibcon#read 3, iclass 16, count 2 2006.229.10:47:08.57#ibcon#about to read 4, iclass 16, count 2 2006.229.10:47:08.57#ibcon#read 4, iclass 16, count 2 2006.229.10:47:08.57#ibcon#about to read 5, iclass 16, count 2 2006.229.10:47:08.57#ibcon#read 5, iclass 16, count 2 2006.229.10:47:08.57#ibcon#about to read 6, iclass 16, count 2 2006.229.10:47:08.57#ibcon#read 6, iclass 16, count 2 2006.229.10:47:08.57#ibcon#end of sib2, iclass 16, count 2 2006.229.10:47:08.57#ibcon#*mode == 0, iclass 16, count 2 2006.229.10:47:08.57#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.10:47:08.57#ibcon#[27=AT03-04\r\n] 2006.229.10:47:08.57#ibcon#*before write, iclass 16, count 2 2006.229.10:47:08.57#ibcon#enter sib2, iclass 16, count 2 2006.229.10:47:08.57#ibcon#flushed, iclass 16, count 2 2006.229.10:47:08.57#ibcon#about to write, iclass 16, count 2 2006.229.10:47:08.57#ibcon#wrote, iclass 16, count 2 2006.229.10:47:08.57#ibcon#about to read 3, iclass 16, count 2 2006.229.10:47:08.60#ibcon#read 3, iclass 16, count 2 2006.229.10:47:08.60#ibcon#about to read 4, iclass 16, count 2 2006.229.10:47:08.60#ibcon#read 4, iclass 16, count 2 2006.229.10:47:08.60#ibcon#about to read 5, iclass 16, count 2 2006.229.10:47:08.60#ibcon#read 5, iclass 16, count 2 2006.229.10:47:08.60#ibcon#about to read 6, iclass 16, count 2 2006.229.10:47:08.60#ibcon#read 6, iclass 16, count 2 2006.229.10:47:08.60#ibcon#end of sib2, iclass 16, count 2 2006.229.10:47:08.60#ibcon#*after write, iclass 16, count 2 2006.229.10:47:08.60#ibcon#*before return 0, iclass 16, count 2 2006.229.10:47:08.60#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:08.60#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.10:47:08.60#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.10:47:08.60#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:08.60#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:08.72#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:08.72#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:08.72#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:47:08.72#ibcon#first serial, iclass 16, count 0 2006.229.10:47:08.72#ibcon#enter sib2, iclass 16, count 0 2006.229.10:47:08.72#ibcon#flushed, iclass 16, count 0 2006.229.10:47:08.72#ibcon#about to write, iclass 16, count 0 2006.229.10:47:08.72#ibcon#wrote, iclass 16, count 0 2006.229.10:47:08.72#ibcon#about to read 3, iclass 16, count 0 2006.229.10:47:08.74#ibcon#read 3, iclass 16, count 0 2006.229.10:47:08.74#ibcon#about to read 4, iclass 16, count 0 2006.229.10:47:08.74#ibcon#read 4, iclass 16, count 0 2006.229.10:47:08.74#ibcon#about to read 5, iclass 16, count 0 2006.229.10:47:08.74#ibcon#read 5, iclass 16, count 0 2006.229.10:47:08.74#ibcon#about to read 6, iclass 16, count 0 2006.229.10:47:08.74#ibcon#read 6, iclass 16, count 0 2006.229.10:47:08.74#ibcon#end of sib2, iclass 16, count 0 2006.229.10:47:08.74#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:47:08.74#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:47:08.74#ibcon#[27=USB\r\n] 2006.229.10:47:08.74#ibcon#*before write, iclass 16, count 0 2006.229.10:47:08.74#ibcon#enter sib2, iclass 16, count 0 2006.229.10:47:08.74#ibcon#flushed, iclass 16, count 0 2006.229.10:47:08.74#ibcon#about to write, iclass 16, count 0 2006.229.10:47:08.74#ibcon#wrote, iclass 16, count 0 2006.229.10:47:08.74#ibcon#about to read 3, iclass 16, count 0 2006.229.10:47:08.77#ibcon#read 3, iclass 16, count 0 2006.229.10:47:08.77#ibcon#about to read 4, iclass 16, count 0 2006.229.10:47:08.77#ibcon#read 4, iclass 16, count 0 2006.229.10:47:08.77#ibcon#about to read 5, iclass 16, count 0 2006.229.10:47:08.77#ibcon#read 5, iclass 16, count 0 2006.229.10:47:08.77#ibcon#about to read 6, iclass 16, count 0 2006.229.10:47:08.77#ibcon#read 6, iclass 16, count 0 2006.229.10:47:08.77#ibcon#end of sib2, iclass 16, count 0 2006.229.10:47:08.77#ibcon#*after write, iclass 16, count 0 2006.229.10:47:08.77#ibcon#*before return 0, iclass 16, count 0 2006.229.10:47:08.77#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:08.77#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.10:47:08.77#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:47:08.77#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:47:08.77$vck44/vblo=4,679.99 2006.229.10:47:08.77#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.10:47:08.77#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.10:47:08.77#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:08.77#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:08.77#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:08.77#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:08.77#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:47:08.77#ibcon#first serial, iclass 18, count 0 2006.229.10:47:08.77#ibcon#enter sib2, iclass 18, count 0 2006.229.10:47:08.77#ibcon#flushed, iclass 18, count 0 2006.229.10:47:08.77#ibcon#about to write, iclass 18, count 0 2006.229.10:47:08.77#ibcon#wrote, iclass 18, count 0 2006.229.10:47:08.77#ibcon#about to read 3, iclass 18, count 0 2006.229.10:47:08.79#ibcon#read 3, iclass 18, count 0 2006.229.10:47:08.79#ibcon#about to read 4, iclass 18, count 0 2006.229.10:47:08.79#ibcon#read 4, iclass 18, count 0 2006.229.10:47:08.79#ibcon#about to read 5, iclass 18, count 0 2006.229.10:47:08.79#ibcon#read 5, iclass 18, count 0 2006.229.10:47:08.79#ibcon#about to read 6, iclass 18, count 0 2006.229.10:47:08.79#ibcon#read 6, iclass 18, count 0 2006.229.10:47:08.79#ibcon#end of sib2, iclass 18, count 0 2006.229.10:47:08.79#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:47:08.79#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:47:08.79#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:47:08.79#ibcon#*before write, iclass 18, count 0 2006.229.10:47:08.79#ibcon#enter sib2, iclass 18, count 0 2006.229.10:47:08.79#ibcon#flushed, iclass 18, count 0 2006.229.10:47:08.79#ibcon#about to write, iclass 18, count 0 2006.229.10:47:08.79#ibcon#wrote, iclass 18, count 0 2006.229.10:47:08.79#ibcon#about to read 3, iclass 18, count 0 2006.229.10:47:08.83#ibcon#read 3, iclass 18, count 0 2006.229.10:47:08.83#ibcon#about to read 4, iclass 18, count 0 2006.229.10:47:08.83#ibcon#read 4, iclass 18, count 0 2006.229.10:47:08.83#ibcon#about to read 5, iclass 18, count 0 2006.229.10:47:08.83#ibcon#read 5, iclass 18, count 0 2006.229.10:47:08.83#ibcon#about to read 6, iclass 18, count 0 2006.229.10:47:08.83#ibcon#read 6, iclass 18, count 0 2006.229.10:47:08.83#ibcon#end of sib2, iclass 18, count 0 2006.229.10:47:08.83#ibcon#*after write, iclass 18, count 0 2006.229.10:47:08.83#ibcon#*before return 0, iclass 18, count 0 2006.229.10:47:08.83#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:08.83#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.10:47:08.83#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:47:08.83#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:47:08.83$vck44/vb=4,4 2006.229.10:47:08.83#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.10:47:08.83#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.10:47:08.83#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:08.83#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:08.89#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:08.89#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:08.89#ibcon#enter wrdev, iclass 20, count 2 2006.229.10:47:08.89#ibcon#first serial, iclass 20, count 2 2006.229.10:47:08.89#ibcon#enter sib2, iclass 20, count 2 2006.229.10:47:08.89#ibcon#flushed, iclass 20, count 2 2006.229.10:47:08.89#ibcon#about to write, iclass 20, count 2 2006.229.10:47:08.89#ibcon#wrote, iclass 20, count 2 2006.229.10:47:08.89#ibcon#about to read 3, iclass 20, count 2 2006.229.10:47:08.91#ibcon#read 3, iclass 20, count 2 2006.229.10:47:08.91#ibcon#about to read 4, iclass 20, count 2 2006.229.10:47:08.91#ibcon#read 4, iclass 20, count 2 2006.229.10:47:08.91#ibcon#about to read 5, iclass 20, count 2 2006.229.10:47:08.91#ibcon#read 5, iclass 20, count 2 2006.229.10:47:08.91#ibcon#about to read 6, iclass 20, count 2 2006.229.10:47:08.91#ibcon#read 6, iclass 20, count 2 2006.229.10:47:08.91#ibcon#end of sib2, iclass 20, count 2 2006.229.10:47:08.91#ibcon#*mode == 0, iclass 20, count 2 2006.229.10:47:08.91#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.10:47:08.91#ibcon#[27=AT04-04\r\n] 2006.229.10:47:08.91#ibcon#*before write, iclass 20, count 2 2006.229.10:47:08.91#ibcon#enter sib2, iclass 20, count 2 2006.229.10:47:08.91#ibcon#flushed, iclass 20, count 2 2006.229.10:47:08.91#ibcon#about to write, iclass 20, count 2 2006.229.10:47:08.91#ibcon#wrote, iclass 20, count 2 2006.229.10:47:08.91#ibcon#about to read 3, iclass 20, count 2 2006.229.10:47:08.94#ibcon#read 3, iclass 20, count 2 2006.229.10:47:08.94#ibcon#about to read 4, iclass 20, count 2 2006.229.10:47:08.94#ibcon#read 4, iclass 20, count 2 2006.229.10:47:08.94#ibcon#about to read 5, iclass 20, count 2 2006.229.10:47:08.94#ibcon#read 5, iclass 20, count 2 2006.229.10:47:08.94#ibcon#about to read 6, iclass 20, count 2 2006.229.10:47:08.94#ibcon#read 6, iclass 20, count 2 2006.229.10:47:08.94#ibcon#end of sib2, iclass 20, count 2 2006.229.10:47:08.94#ibcon#*after write, iclass 20, count 2 2006.229.10:47:08.94#ibcon#*before return 0, iclass 20, count 2 2006.229.10:47:08.94#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:08.94#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.10:47:08.94#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.10:47:08.94#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:08.94#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:09.06#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:09.06#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:09.06#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:47:09.06#ibcon#first serial, iclass 20, count 0 2006.229.10:47:09.06#ibcon#enter sib2, iclass 20, count 0 2006.229.10:47:09.06#ibcon#flushed, iclass 20, count 0 2006.229.10:47:09.06#ibcon#about to write, iclass 20, count 0 2006.229.10:47:09.06#ibcon#wrote, iclass 20, count 0 2006.229.10:47:09.06#ibcon#about to read 3, iclass 20, count 0 2006.229.10:47:09.08#ibcon#read 3, iclass 20, count 0 2006.229.10:47:09.08#ibcon#about to read 4, iclass 20, count 0 2006.229.10:47:09.08#ibcon#read 4, iclass 20, count 0 2006.229.10:47:09.08#ibcon#about to read 5, iclass 20, count 0 2006.229.10:47:09.08#ibcon#read 5, iclass 20, count 0 2006.229.10:47:09.08#ibcon#about to read 6, iclass 20, count 0 2006.229.10:47:09.08#ibcon#read 6, iclass 20, count 0 2006.229.10:47:09.08#ibcon#end of sib2, iclass 20, count 0 2006.229.10:47:09.08#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:47:09.08#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:47:09.08#ibcon#[27=USB\r\n] 2006.229.10:47:09.08#ibcon#*before write, iclass 20, count 0 2006.229.10:47:09.08#ibcon#enter sib2, iclass 20, count 0 2006.229.10:47:09.08#ibcon#flushed, iclass 20, count 0 2006.229.10:47:09.08#ibcon#about to write, iclass 20, count 0 2006.229.10:47:09.08#ibcon#wrote, iclass 20, count 0 2006.229.10:47:09.08#ibcon#about to read 3, iclass 20, count 0 2006.229.10:47:09.11#ibcon#read 3, iclass 20, count 0 2006.229.10:47:09.11#ibcon#about to read 4, iclass 20, count 0 2006.229.10:47:09.11#ibcon#read 4, iclass 20, count 0 2006.229.10:47:09.11#ibcon#about to read 5, iclass 20, count 0 2006.229.10:47:09.11#ibcon#read 5, iclass 20, count 0 2006.229.10:47:09.11#ibcon#about to read 6, iclass 20, count 0 2006.229.10:47:09.11#ibcon#read 6, iclass 20, count 0 2006.229.10:47:09.11#ibcon#end of sib2, iclass 20, count 0 2006.229.10:47:09.11#ibcon#*after write, iclass 20, count 0 2006.229.10:47:09.11#ibcon#*before return 0, iclass 20, count 0 2006.229.10:47:09.11#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:09.11#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.10:47:09.11#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:47:09.11#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:47:09.11$vck44/vblo=5,709.99 2006.229.10:47:09.11#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.10:47:09.11#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.10:47:09.11#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:09.11#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:09.11#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:09.11#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:09.11#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:47:09.11#ibcon#first serial, iclass 22, count 0 2006.229.10:47:09.11#ibcon#enter sib2, iclass 22, count 0 2006.229.10:47:09.11#ibcon#flushed, iclass 22, count 0 2006.229.10:47:09.11#ibcon#about to write, iclass 22, count 0 2006.229.10:47:09.11#ibcon#wrote, iclass 22, count 0 2006.229.10:47:09.11#ibcon#about to read 3, iclass 22, count 0 2006.229.10:47:09.13#ibcon#read 3, iclass 22, count 0 2006.229.10:47:09.13#ibcon#about to read 4, iclass 22, count 0 2006.229.10:47:09.13#ibcon#read 4, iclass 22, count 0 2006.229.10:47:09.13#ibcon#about to read 5, iclass 22, count 0 2006.229.10:47:09.13#ibcon#read 5, iclass 22, count 0 2006.229.10:47:09.13#ibcon#about to read 6, iclass 22, count 0 2006.229.10:47:09.13#ibcon#read 6, iclass 22, count 0 2006.229.10:47:09.13#ibcon#end of sib2, iclass 22, count 0 2006.229.10:47:09.13#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:47:09.13#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:47:09.13#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:47:09.13#ibcon#*before write, iclass 22, count 0 2006.229.10:47:09.13#ibcon#enter sib2, iclass 22, count 0 2006.229.10:47:09.13#ibcon#flushed, iclass 22, count 0 2006.229.10:47:09.13#ibcon#about to write, iclass 22, count 0 2006.229.10:47:09.13#ibcon#wrote, iclass 22, count 0 2006.229.10:47:09.13#ibcon#about to read 3, iclass 22, count 0 2006.229.10:47:09.17#ibcon#read 3, iclass 22, count 0 2006.229.10:47:09.17#ibcon#about to read 4, iclass 22, count 0 2006.229.10:47:09.17#ibcon#read 4, iclass 22, count 0 2006.229.10:47:09.17#ibcon#about to read 5, iclass 22, count 0 2006.229.10:47:09.17#ibcon#read 5, iclass 22, count 0 2006.229.10:47:09.17#ibcon#about to read 6, iclass 22, count 0 2006.229.10:47:09.17#ibcon#read 6, iclass 22, count 0 2006.229.10:47:09.17#ibcon#end of sib2, iclass 22, count 0 2006.229.10:47:09.17#ibcon#*after write, iclass 22, count 0 2006.229.10:47:09.17#ibcon#*before return 0, iclass 22, count 0 2006.229.10:47:09.17#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:09.17#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.10:47:09.17#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:47:09.17#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:47:09.17$vck44/vb=5,4 2006.229.10:47:09.17#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.10:47:09.17#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.10:47:09.17#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:09.17#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:09.23#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:09.23#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:09.23#ibcon#enter wrdev, iclass 24, count 2 2006.229.10:47:09.23#ibcon#first serial, iclass 24, count 2 2006.229.10:47:09.23#ibcon#enter sib2, iclass 24, count 2 2006.229.10:47:09.23#ibcon#flushed, iclass 24, count 2 2006.229.10:47:09.23#ibcon#about to write, iclass 24, count 2 2006.229.10:47:09.23#ibcon#wrote, iclass 24, count 2 2006.229.10:47:09.23#ibcon#about to read 3, iclass 24, count 2 2006.229.10:47:09.25#ibcon#read 3, iclass 24, count 2 2006.229.10:47:09.25#ibcon#about to read 4, iclass 24, count 2 2006.229.10:47:09.25#ibcon#read 4, iclass 24, count 2 2006.229.10:47:09.25#ibcon#about to read 5, iclass 24, count 2 2006.229.10:47:09.25#ibcon#read 5, iclass 24, count 2 2006.229.10:47:09.25#ibcon#about to read 6, iclass 24, count 2 2006.229.10:47:09.25#ibcon#read 6, iclass 24, count 2 2006.229.10:47:09.25#ibcon#end of sib2, iclass 24, count 2 2006.229.10:47:09.25#ibcon#*mode == 0, iclass 24, count 2 2006.229.10:47:09.25#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.10:47:09.25#ibcon#[27=AT05-04\r\n] 2006.229.10:47:09.25#ibcon#*before write, iclass 24, count 2 2006.229.10:47:09.25#ibcon#enter sib2, iclass 24, count 2 2006.229.10:47:09.25#ibcon#flushed, iclass 24, count 2 2006.229.10:47:09.25#ibcon#about to write, iclass 24, count 2 2006.229.10:47:09.25#ibcon#wrote, iclass 24, count 2 2006.229.10:47:09.25#ibcon#about to read 3, iclass 24, count 2 2006.229.10:47:09.28#ibcon#read 3, iclass 24, count 2 2006.229.10:47:09.28#ibcon#about to read 4, iclass 24, count 2 2006.229.10:47:09.28#ibcon#read 4, iclass 24, count 2 2006.229.10:47:09.28#ibcon#about to read 5, iclass 24, count 2 2006.229.10:47:09.28#ibcon#read 5, iclass 24, count 2 2006.229.10:47:09.28#ibcon#about to read 6, iclass 24, count 2 2006.229.10:47:09.28#ibcon#read 6, iclass 24, count 2 2006.229.10:47:09.28#ibcon#end of sib2, iclass 24, count 2 2006.229.10:47:09.28#ibcon#*after write, iclass 24, count 2 2006.229.10:47:09.28#ibcon#*before return 0, iclass 24, count 2 2006.229.10:47:09.28#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:09.28#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.10:47:09.28#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.10:47:09.28#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:09.28#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:09.40#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:09.40#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:09.40#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:47:09.40#ibcon#first serial, iclass 24, count 0 2006.229.10:47:09.40#ibcon#enter sib2, iclass 24, count 0 2006.229.10:47:09.40#ibcon#flushed, iclass 24, count 0 2006.229.10:47:09.40#ibcon#about to write, iclass 24, count 0 2006.229.10:47:09.40#ibcon#wrote, iclass 24, count 0 2006.229.10:47:09.40#ibcon#about to read 3, iclass 24, count 0 2006.229.10:47:09.42#ibcon#read 3, iclass 24, count 0 2006.229.10:47:09.42#ibcon#about to read 4, iclass 24, count 0 2006.229.10:47:09.42#ibcon#read 4, iclass 24, count 0 2006.229.10:47:09.42#ibcon#about to read 5, iclass 24, count 0 2006.229.10:47:09.42#ibcon#read 5, iclass 24, count 0 2006.229.10:47:09.42#ibcon#about to read 6, iclass 24, count 0 2006.229.10:47:09.42#ibcon#read 6, iclass 24, count 0 2006.229.10:47:09.42#ibcon#end of sib2, iclass 24, count 0 2006.229.10:47:09.42#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:47:09.42#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:47:09.42#ibcon#[27=USB\r\n] 2006.229.10:47:09.42#ibcon#*before write, iclass 24, count 0 2006.229.10:47:09.42#ibcon#enter sib2, iclass 24, count 0 2006.229.10:47:09.42#ibcon#flushed, iclass 24, count 0 2006.229.10:47:09.42#ibcon#about to write, iclass 24, count 0 2006.229.10:47:09.42#ibcon#wrote, iclass 24, count 0 2006.229.10:47:09.42#ibcon#about to read 3, iclass 24, count 0 2006.229.10:47:09.45#ibcon#read 3, iclass 24, count 0 2006.229.10:47:09.45#ibcon#about to read 4, iclass 24, count 0 2006.229.10:47:09.45#ibcon#read 4, iclass 24, count 0 2006.229.10:47:09.45#ibcon#about to read 5, iclass 24, count 0 2006.229.10:47:09.45#ibcon#read 5, iclass 24, count 0 2006.229.10:47:09.45#ibcon#about to read 6, iclass 24, count 0 2006.229.10:47:09.45#ibcon#read 6, iclass 24, count 0 2006.229.10:47:09.45#ibcon#end of sib2, iclass 24, count 0 2006.229.10:47:09.45#ibcon#*after write, iclass 24, count 0 2006.229.10:47:09.45#ibcon#*before return 0, iclass 24, count 0 2006.229.10:47:09.45#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:09.45#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.10:47:09.45#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:47:09.45#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:47:09.45$vck44/vblo=6,719.99 2006.229.10:47:09.45#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.10:47:09.45#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.10:47:09.45#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:09.45#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:09.45#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:09.45#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:09.45#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:47:09.45#ibcon#first serial, iclass 26, count 0 2006.229.10:47:09.45#ibcon#enter sib2, iclass 26, count 0 2006.229.10:47:09.45#ibcon#flushed, iclass 26, count 0 2006.229.10:47:09.45#ibcon#about to write, iclass 26, count 0 2006.229.10:47:09.45#ibcon#wrote, iclass 26, count 0 2006.229.10:47:09.45#ibcon#about to read 3, iclass 26, count 0 2006.229.10:47:09.47#ibcon#read 3, iclass 26, count 0 2006.229.10:47:09.47#ibcon#about to read 4, iclass 26, count 0 2006.229.10:47:09.47#ibcon#read 4, iclass 26, count 0 2006.229.10:47:09.47#ibcon#about to read 5, iclass 26, count 0 2006.229.10:47:09.47#ibcon#read 5, iclass 26, count 0 2006.229.10:47:09.47#ibcon#about to read 6, iclass 26, count 0 2006.229.10:47:09.47#ibcon#read 6, iclass 26, count 0 2006.229.10:47:09.47#ibcon#end of sib2, iclass 26, count 0 2006.229.10:47:09.47#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:47:09.47#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:47:09.47#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:47:09.47#ibcon#*before write, iclass 26, count 0 2006.229.10:47:09.47#ibcon#enter sib2, iclass 26, count 0 2006.229.10:47:09.47#ibcon#flushed, iclass 26, count 0 2006.229.10:47:09.47#ibcon#about to write, iclass 26, count 0 2006.229.10:47:09.47#ibcon#wrote, iclass 26, count 0 2006.229.10:47:09.47#ibcon#about to read 3, iclass 26, count 0 2006.229.10:47:09.51#ibcon#read 3, iclass 26, count 0 2006.229.10:47:09.51#ibcon#about to read 4, iclass 26, count 0 2006.229.10:47:09.51#ibcon#read 4, iclass 26, count 0 2006.229.10:47:09.51#ibcon#about to read 5, iclass 26, count 0 2006.229.10:47:09.51#ibcon#read 5, iclass 26, count 0 2006.229.10:47:09.51#ibcon#about to read 6, iclass 26, count 0 2006.229.10:47:09.51#ibcon#read 6, iclass 26, count 0 2006.229.10:47:09.51#ibcon#end of sib2, iclass 26, count 0 2006.229.10:47:09.51#ibcon#*after write, iclass 26, count 0 2006.229.10:47:09.51#ibcon#*before return 0, iclass 26, count 0 2006.229.10:47:09.51#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:09.51#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.10:47:09.51#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:47:09.51#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:47:09.51$vck44/vb=6,4 2006.229.10:47:09.51#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.10:47:09.51#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.10:47:09.51#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:09.51#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:09.57#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:09.57#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:09.57#ibcon#enter wrdev, iclass 28, count 2 2006.229.10:47:09.57#ibcon#first serial, iclass 28, count 2 2006.229.10:47:09.57#ibcon#enter sib2, iclass 28, count 2 2006.229.10:47:09.57#ibcon#flushed, iclass 28, count 2 2006.229.10:47:09.57#ibcon#about to write, iclass 28, count 2 2006.229.10:47:09.57#ibcon#wrote, iclass 28, count 2 2006.229.10:47:09.57#ibcon#about to read 3, iclass 28, count 2 2006.229.10:47:09.59#ibcon#read 3, iclass 28, count 2 2006.229.10:47:09.59#ibcon#about to read 4, iclass 28, count 2 2006.229.10:47:09.59#ibcon#read 4, iclass 28, count 2 2006.229.10:47:09.59#ibcon#about to read 5, iclass 28, count 2 2006.229.10:47:09.59#ibcon#read 5, iclass 28, count 2 2006.229.10:47:09.59#ibcon#about to read 6, iclass 28, count 2 2006.229.10:47:09.59#ibcon#read 6, iclass 28, count 2 2006.229.10:47:09.59#ibcon#end of sib2, iclass 28, count 2 2006.229.10:47:09.59#ibcon#*mode == 0, iclass 28, count 2 2006.229.10:47:09.59#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.10:47:09.59#ibcon#[27=AT06-04\r\n] 2006.229.10:47:09.59#ibcon#*before write, iclass 28, count 2 2006.229.10:47:09.59#ibcon#enter sib2, iclass 28, count 2 2006.229.10:47:09.59#ibcon#flushed, iclass 28, count 2 2006.229.10:47:09.59#ibcon#about to write, iclass 28, count 2 2006.229.10:47:09.59#ibcon#wrote, iclass 28, count 2 2006.229.10:47:09.59#ibcon#about to read 3, iclass 28, count 2 2006.229.10:47:09.62#ibcon#read 3, iclass 28, count 2 2006.229.10:47:09.62#ibcon#about to read 4, iclass 28, count 2 2006.229.10:47:09.62#ibcon#read 4, iclass 28, count 2 2006.229.10:47:09.62#ibcon#about to read 5, iclass 28, count 2 2006.229.10:47:09.62#ibcon#read 5, iclass 28, count 2 2006.229.10:47:09.62#ibcon#about to read 6, iclass 28, count 2 2006.229.10:47:09.62#ibcon#read 6, iclass 28, count 2 2006.229.10:47:09.62#ibcon#end of sib2, iclass 28, count 2 2006.229.10:47:09.62#ibcon#*after write, iclass 28, count 2 2006.229.10:47:09.62#ibcon#*before return 0, iclass 28, count 2 2006.229.10:47:09.62#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:09.62#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.10:47:09.62#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.10:47:09.62#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:09.62#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:09.74#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:09.74#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:09.74#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:47:09.74#ibcon#first serial, iclass 28, count 0 2006.229.10:47:09.74#ibcon#enter sib2, iclass 28, count 0 2006.229.10:47:09.74#ibcon#flushed, iclass 28, count 0 2006.229.10:47:09.74#ibcon#about to write, iclass 28, count 0 2006.229.10:47:09.74#ibcon#wrote, iclass 28, count 0 2006.229.10:47:09.74#ibcon#about to read 3, iclass 28, count 0 2006.229.10:47:09.76#ibcon#read 3, iclass 28, count 0 2006.229.10:47:09.76#ibcon#about to read 4, iclass 28, count 0 2006.229.10:47:09.76#ibcon#read 4, iclass 28, count 0 2006.229.10:47:09.76#ibcon#about to read 5, iclass 28, count 0 2006.229.10:47:09.76#ibcon#read 5, iclass 28, count 0 2006.229.10:47:09.76#ibcon#about to read 6, iclass 28, count 0 2006.229.10:47:09.76#ibcon#read 6, iclass 28, count 0 2006.229.10:47:09.76#ibcon#end of sib2, iclass 28, count 0 2006.229.10:47:09.76#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:47:09.76#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:47:09.76#ibcon#[27=USB\r\n] 2006.229.10:47:09.76#ibcon#*before write, iclass 28, count 0 2006.229.10:47:09.76#ibcon#enter sib2, iclass 28, count 0 2006.229.10:47:09.76#ibcon#flushed, iclass 28, count 0 2006.229.10:47:09.76#ibcon#about to write, iclass 28, count 0 2006.229.10:47:09.76#ibcon#wrote, iclass 28, count 0 2006.229.10:47:09.76#ibcon#about to read 3, iclass 28, count 0 2006.229.10:47:09.79#ibcon#read 3, iclass 28, count 0 2006.229.10:47:09.79#ibcon#about to read 4, iclass 28, count 0 2006.229.10:47:09.79#ibcon#read 4, iclass 28, count 0 2006.229.10:47:09.79#ibcon#about to read 5, iclass 28, count 0 2006.229.10:47:09.79#ibcon#read 5, iclass 28, count 0 2006.229.10:47:09.79#ibcon#about to read 6, iclass 28, count 0 2006.229.10:47:09.79#ibcon#read 6, iclass 28, count 0 2006.229.10:47:09.79#ibcon#end of sib2, iclass 28, count 0 2006.229.10:47:09.79#ibcon#*after write, iclass 28, count 0 2006.229.10:47:09.79#ibcon#*before return 0, iclass 28, count 0 2006.229.10:47:09.79#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:09.79#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.10:47:09.79#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:47:09.79#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:47:09.79$vck44/vblo=7,734.99 2006.229.10:47:09.79#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.10:47:09.79#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.10:47:09.79#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:09.79#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:09.79#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:09.79#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:09.79#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:47:09.79#ibcon#first serial, iclass 30, count 0 2006.229.10:47:09.79#ibcon#enter sib2, iclass 30, count 0 2006.229.10:47:09.79#ibcon#flushed, iclass 30, count 0 2006.229.10:47:09.79#ibcon#about to write, iclass 30, count 0 2006.229.10:47:09.79#ibcon#wrote, iclass 30, count 0 2006.229.10:47:09.79#ibcon#about to read 3, iclass 30, count 0 2006.229.10:47:09.81#ibcon#read 3, iclass 30, count 0 2006.229.10:47:09.81#ibcon#about to read 4, iclass 30, count 0 2006.229.10:47:09.81#ibcon#read 4, iclass 30, count 0 2006.229.10:47:09.81#ibcon#about to read 5, iclass 30, count 0 2006.229.10:47:09.81#ibcon#read 5, iclass 30, count 0 2006.229.10:47:09.81#ibcon#about to read 6, iclass 30, count 0 2006.229.10:47:09.81#ibcon#read 6, iclass 30, count 0 2006.229.10:47:09.81#ibcon#end of sib2, iclass 30, count 0 2006.229.10:47:09.81#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:47:09.81#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:47:09.81#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:47:09.81#ibcon#*before write, iclass 30, count 0 2006.229.10:47:09.81#ibcon#enter sib2, iclass 30, count 0 2006.229.10:47:09.81#ibcon#flushed, iclass 30, count 0 2006.229.10:47:09.81#ibcon#about to write, iclass 30, count 0 2006.229.10:47:09.81#ibcon#wrote, iclass 30, count 0 2006.229.10:47:09.81#ibcon#about to read 3, iclass 30, count 0 2006.229.10:47:09.85#ibcon#read 3, iclass 30, count 0 2006.229.10:47:09.85#ibcon#about to read 4, iclass 30, count 0 2006.229.10:47:09.85#ibcon#read 4, iclass 30, count 0 2006.229.10:47:09.85#ibcon#about to read 5, iclass 30, count 0 2006.229.10:47:09.85#ibcon#read 5, iclass 30, count 0 2006.229.10:47:09.85#ibcon#about to read 6, iclass 30, count 0 2006.229.10:47:09.85#ibcon#read 6, iclass 30, count 0 2006.229.10:47:09.85#ibcon#end of sib2, iclass 30, count 0 2006.229.10:47:09.85#ibcon#*after write, iclass 30, count 0 2006.229.10:47:09.85#ibcon#*before return 0, iclass 30, count 0 2006.229.10:47:09.85#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:09.85#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.10:47:09.85#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:47:09.85#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:47:09.85$vck44/vb=7,4 2006.229.10:47:09.85#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.10:47:09.85#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.10:47:09.85#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:09.85#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:09.91#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:09.91#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:09.91#ibcon#enter wrdev, iclass 32, count 2 2006.229.10:47:09.91#ibcon#first serial, iclass 32, count 2 2006.229.10:47:09.91#ibcon#enter sib2, iclass 32, count 2 2006.229.10:47:09.91#ibcon#flushed, iclass 32, count 2 2006.229.10:47:09.91#ibcon#about to write, iclass 32, count 2 2006.229.10:47:09.91#ibcon#wrote, iclass 32, count 2 2006.229.10:47:09.91#ibcon#about to read 3, iclass 32, count 2 2006.229.10:47:09.93#ibcon#read 3, iclass 32, count 2 2006.229.10:47:09.93#ibcon#about to read 4, iclass 32, count 2 2006.229.10:47:09.93#ibcon#read 4, iclass 32, count 2 2006.229.10:47:09.93#ibcon#about to read 5, iclass 32, count 2 2006.229.10:47:09.93#ibcon#read 5, iclass 32, count 2 2006.229.10:47:09.93#ibcon#about to read 6, iclass 32, count 2 2006.229.10:47:09.93#ibcon#read 6, iclass 32, count 2 2006.229.10:47:09.93#ibcon#end of sib2, iclass 32, count 2 2006.229.10:47:09.93#ibcon#*mode == 0, iclass 32, count 2 2006.229.10:47:09.93#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.10:47:09.93#ibcon#[27=AT07-04\r\n] 2006.229.10:47:09.93#ibcon#*before write, iclass 32, count 2 2006.229.10:47:09.93#ibcon#enter sib2, iclass 32, count 2 2006.229.10:47:09.93#ibcon#flushed, iclass 32, count 2 2006.229.10:47:09.93#ibcon#about to write, iclass 32, count 2 2006.229.10:47:09.93#ibcon#wrote, iclass 32, count 2 2006.229.10:47:09.93#ibcon#about to read 3, iclass 32, count 2 2006.229.10:47:09.96#ibcon#read 3, iclass 32, count 2 2006.229.10:47:09.96#ibcon#about to read 4, iclass 32, count 2 2006.229.10:47:09.96#ibcon#read 4, iclass 32, count 2 2006.229.10:47:09.96#ibcon#about to read 5, iclass 32, count 2 2006.229.10:47:09.96#ibcon#read 5, iclass 32, count 2 2006.229.10:47:09.96#ibcon#about to read 6, iclass 32, count 2 2006.229.10:47:09.96#ibcon#read 6, iclass 32, count 2 2006.229.10:47:09.96#ibcon#end of sib2, iclass 32, count 2 2006.229.10:47:09.96#ibcon#*after write, iclass 32, count 2 2006.229.10:47:09.96#ibcon#*before return 0, iclass 32, count 2 2006.229.10:47:09.96#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:09.96#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.10:47:09.96#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.10:47:09.96#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:09.96#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:10.08#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:10.08#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:10.08#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:47:10.08#ibcon#first serial, iclass 32, count 0 2006.229.10:47:10.08#ibcon#enter sib2, iclass 32, count 0 2006.229.10:47:10.08#ibcon#flushed, iclass 32, count 0 2006.229.10:47:10.08#ibcon#about to write, iclass 32, count 0 2006.229.10:47:10.08#ibcon#wrote, iclass 32, count 0 2006.229.10:47:10.08#ibcon#about to read 3, iclass 32, count 0 2006.229.10:47:10.10#ibcon#read 3, iclass 32, count 0 2006.229.10:47:10.10#ibcon#about to read 4, iclass 32, count 0 2006.229.10:47:10.10#ibcon#read 4, iclass 32, count 0 2006.229.10:47:10.10#ibcon#about to read 5, iclass 32, count 0 2006.229.10:47:10.10#ibcon#read 5, iclass 32, count 0 2006.229.10:47:10.10#ibcon#about to read 6, iclass 32, count 0 2006.229.10:47:10.10#ibcon#read 6, iclass 32, count 0 2006.229.10:47:10.10#ibcon#end of sib2, iclass 32, count 0 2006.229.10:47:10.10#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:47:10.10#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:47:10.10#ibcon#[27=USB\r\n] 2006.229.10:47:10.10#ibcon#*before write, iclass 32, count 0 2006.229.10:47:10.10#ibcon#enter sib2, iclass 32, count 0 2006.229.10:47:10.10#ibcon#flushed, iclass 32, count 0 2006.229.10:47:10.10#ibcon#about to write, iclass 32, count 0 2006.229.10:47:10.10#ibcon#wrote, iclass 32, count 0 2006.229.10:47:10.10#ibcon#about to read 3, iclass 32, count 0 2006.229.10:47:10.13#ibcon#read 3, iclass 32, count 0 2006.229.10:47:10.13#ibcon#about to read 4, iclass 32, count 0 2006.229.10:47:10.13#ibcon#read 4, iclass 32, count 0 2006.229.10:47:10.13#ibcon#about to read 5, iclass 32, count 0 2006.229.10:47:10.13#ibcon#read 5, iclass 32, count 0 2006.229.10:47:10.13#ibcon#about to read 6, iclass 32, count 0 2006.229.10:47:10.13#ibcon#read 6, iclass 32, count 0 2006.229.10:47:10.13#ibcon#end of sib2, iclass 32, count 0 2006.229.10:47:10.13#ibcon#*after write, iclass 32, count 0 2006.229.10:47:10.13#ibcon#*before return 0, iclass 32, count 0 2006.229.10:47:10.13#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:10.13#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.10:47:10.13#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:47:10.13#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:47:10.13$vck44/vblo=8,744.99 2006.229.10:47:10.13#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.10:47:10.13#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.10:47:10.13#ibcon#ireg 17 cls_cnt 0 2006.229.10:47:10.13#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:10.13#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:10.13#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:10.13#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:47:10.13#ibcon#first serial, iclass 34, count 0 2006.229.10:47:10.13#ibcon#enter sib2, iclass 34, count 0 2006.229.10:47:10.13#ibcon#flushed, iclass 34, count 0 2006.229.10:47:10.13#ibcon#about to write, iclass 34, count 0 2006.229.10:47:10.13#ibcon#wrote, iclass 34, count 0 2006.229.10:47:10.13#ibcon#about to read 3, iclass 34, count 0 2006.229.10:47:10.15#ibcon#read 3, iclass 34, count 0 2006.229.10:47:10.15#ibcon#about to read 4, iclass 34, count 0 2006.229.10:47:10.15#ibcon#read 4, iclass 34, count 0 2006.229.10:47:10.15#ibcon#about to read 5, iclass 34, count 0 2006.229.10:47:10.15#ibcon#read 5, iclass 34, count 0 2006.229.10:47:10.15#ibcon#about to read 6, iclass 34, count 0 2006.229.10:47:10.15#ibcon#read 6, iclass 34, count 0 2006.229.10:47:10.15#ibcon#end of sib2, iclass 34, count 0 2006.229.10:47:10.15#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:47:10.15#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:47:10.15#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:47:10.15#ibcon#*before write, iclass 34, count 0 2006.229.10:47:10.15#ibcon#enter sib2, iclass 34, count 0 2006.229.10:47:10.15#ibcon#flushed, iclass 34, count 0 2006.229.10:47:10.15#ibcon#about to write, iclass 34, count 0 2006.229.10:47:10.15#ibcon#wrote, iclass 34, count 0 2006.229.10:47:10.15#ibcon#about to read 3, iclass 34, count 0 2006.229.10:47:10.19#ibcon#read 3, iclass 34, count 0 2006.229.10:47:10.19#ibcon#about to read 4, iclass 34, count 0 2006.229.10:47:10.19#ibcon#read 4, iclass 34, count 0 2006.229.10:47:10.19#ibcon#about to read 5, iclass 34, count 0 2006.229.10:47:10.19#ibcon#read 5, iclass 34, count 0 2006.229.10:47:10.19#ibcon#about to read 6, iclass 34, count 0 2006.229.10:47:10.19#ibcon#read 6, iclass 34, count 0 2006.229.10:47:10.19#ibcon#end of sib2, iclass 34, count 0 2006.229.10:47:10.19#ibcon#*after write, iclass 34, count 0 2006.229.10:47:10.19#ibcon#*before return 0, iclass 34, count 0 2006.229.10:47:10.19#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:10.19#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.10:47:10.19#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:47:10.19#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:47:10.19$vck44/vb=8,4 2006.229.10:47:10.19#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.10:47:10.19#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.10:47:10.19#ibcon#ireg 11 cls_cnt 2 2006.229.10:47:10.19#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:10.25#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:10.25#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:10.25#ibcon#enter wrdev, iclass 36, count 2 2006.229.10:47:10.25#ibcon#first serial, iclass 36, count 2 2006.229.10:47:10.25#ibcon#enter sib2, iclass 36, count 2 2006.229.10:47:10.25#ibcon#flushed, iclass 36, count 2 2006.229.10:47:10.25#ibcon#about to write, iclass 36, count 2 2006.229.10:47:10.25#ibcon#wrote, iclass 36, count 2 2006.229.10:47:10.25#ibcon#about to read 3, iclass 36, count 2 2006.229.10:47:10.27#ibcon#read 3, iclass 36, count 2 2006.229.10:47:10.27#ibcon#about to read 4, iclass 36, count 2 2006.229.10:47:10.27#ibcon#read 4, iclass 36, count 2 2006.229.10:47:10.27#ibcon#about to read 5, iclass 36, count 2 2006.229.10:47:10.27#ibcon#read 5, iclass 36, count 2 2006.229.10:47:10.27#ibcon#about to read 6, iclass 36, count 2 2006.229.10:47:10.27#ibcon#read 6, iclass 36, count 2 2006.229.10:47:10.27#ibcon#end of sib2, iclass 36, count 2 2006.229.10:47:10.27#ibcon#*mode == 0, iclass 36, count 2 2006.229.10:47:10.27#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.10:47:10.27#ibcon#[27=AT08-04\r\n] 2006.229.10:47:10.27#ibcon#*before write, iclass 36, count 2 2006.229.10:47:10.27#ibcon#enter sib2, iclass 36, count 2 2006.229.10:47:10.27#ibcon#flushed, iclass 36, count 2 2006.229.10:47:10.27#ibcon#about to write, iclass 36, count 2 2006.229.10:47:10.27#ibcon#wrote, iclass 36, count 2 2006.229.10:47:10.27#ibcon#about to read 3, iclass 36, count 2 2006.229.10:47:10.30#ibcon#read 3, iclass 36, count 2 2006.229.10:47:10.30#ibcon#about to read 4, iclass 36, count 2 2006.229.10:47:10.30#ibcon#read 4, iclass 36, count 2 2006.229.10:47:10.30#ibcon#about to read 5, iclass 36, count 2 2006.229.10:47:10.30#ibcon#read 5, iclass 36, count 2 2006.229.10:47:10.30#ibcon#about to read 6, iclass 36, count 2 2006.229.10:47:10.30#ibcon#read 6, iclass 36, count 2 2006.229.10:47:10.30#ibcon#end of sib2, iclass 36, count 2 2006.229.10:47:10.30#ibcon#*after write, iclass 36, count 2 2006.229.10:47:10.30#ibcon#*before return 0, iclass 36, count 2 2006.229.10:47:10.30#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:10.30#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.10:47:10.30#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.10:47:10.30#ibcon#ireg 7 cls_cnt 0 2006.229.10:47:10.30#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:10.42#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:10.42#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:10.42#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:47:10.42#ibcon#first serial, iclass 36, count 0 2006.229.10:47:10.42#ibcon#enter sib2, iclass 36, count 0 2006.229.10:47:10.42#ibcon#flushed, iclass 36, count 0 2006.229.10:47:10.42#ibcon#about to write, iclass 36, count 0 2006.229.10:47:10.42#ibcon#wrote, iclass 36, count 0 2006.229.10:47:10.42#ibcon#about to read 3, iclass 36, count 0 2006.229.10:47:10.44#ibcon#read 3, iclass 36, count 0 2006.229.10:47:10.44#ibcon#about to read 4, iclass 36, count 0 2006.229.10:47:10.44#ibcon#read 4, iclass 36, count 0 2006.229.10:47:10.44#ibcon#about to read 5, iclass 36, count 0 2006.229.10:47:10.44#ibcon#read 5, iclass 36, count 0 2006.229.10:47:10.44#ibcon#about to read 6, iclass 36, count 0 2006.229.10:47:10.44#ibcon#read 6, iclass 36, count 0 2006.229.10:47:10.44#ibcon#end of sib2, iclass 36, count 0 2006.229.10:47:10.44#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:47:10.44#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:47:10.44#ibcon#[27=USB\r\n] 2006.229.10:47:10.44#ibcon#*before write, iclass 36, count 0 2006.229.10:47:10.44#ibcon#enter sib2, iclass 36, count 0 2006.229.10:47:10.44#ibcon#flushed, iclass 36, count 0 2006.229.10:47:10.44#ibcon#about to write, iclass 36, count 0 2006.229.10:47:10.44#ibcon#wrote, iclass 36, count 0 2006.229.10:47:10.44#ibcon#about to read 3, iclass 36, count 0 2006.229.10:47:10.47#ibcon#read 3, iclass 36, count 0 2006.229.10:47:10.47#ibcon#about to read 4, iclass 36, count 0 2006.229.10:47:10.47#ibcon#read 4, iclass 36, count 0 2006.229.10:47:10.47#ibcon#about to read 5, iclass 36, count 0 2006.229.10:47:10.47#ibcon#read 5, iclass 36, count 0 2006.229.10:47:10.47#ibcon#about to read 6, iclass 36, count 0 2006.229.10:47:10.47#ibcon#read 6, iclass 36, count 0 2006.229.10:47:10.47#ibcon#end of sib2, iclass 36, count 0 2006.229.10:47:10.47#ibcon#*after write, iclass 36, count 0 2006.229.10:47:10.47#ibcon#*before return 0, iclass 36, count 0 2006.229.10:47:10.47#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:10.47#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.10:47:10.47#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:47:10.47#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:47:10.47$vck44/vabw=wide 2006.229.10:47:10.47#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.10:47:10.47#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.10:47:10.47#ibcon#ireg 8 cls_cnt 0 2006.229.10:47:10.47#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:10.47#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:10.47#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:10.47#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:47:10.47#ibcon#first serial, iclass 38, count 0 2006.229.10:47:10.47#ibcon#enter sib2, iclass 38, count 0 2006.229.10:47:10.47#ibcon#flushed, iclass 38, count 0 2006.229.10:47:10.47#ibcon#about to write, iclass 38, count 0 2006.229.10:47:10.47#ibcon#wrote, iclass 38, count 0 2006.229.10:47:10.47#ibcon#about to read 3, iclass 38, count 0 2006.229.10:47:10.49#ibcon#read 3, iclass 38, count 0 2006.229.10:47:10.49#ibcon#about to read 4, iclass 38, count 0 2006.229.10:47:10.49#ibcon#read 4, iclass 38, count 0 2006.229.10:47:10.49#ibcon#about to read 5, iclass 38, count 0 2006.229.10:47:10.49#ibcon#read 5, iclass 38, count 0 2006.229.10:47:10.49#ibcon#about to read 6, iclass 38, count 0 2006.229.10:47:10.49#ibcon#read 6, iclass 38, count 0 2006.229.10:47:10.49#ibcon#end of sib2, iclass 38, count 0 2006.229.10:47:10.49#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:47:10.49#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:47:10.49#ibcon#[25=BW32\r\n] 2006.229.10:47:10.49#ibcon#*before write, iclass 38, count 0 2006.229.10:47:10.49#ibcon#enter sib2, iclass 38, count 0 2006.229.10:47:10.49#ibcon#flushed, iclass 38, count 0 2006.229.10:47:10.49#ibcon#about to write, iclass 38, count 0 2006.229.10:47:10.49#ibcon#wrote, iclass 38, count 0 2006.229.10:47:10.49#ibcon#about to read 3, iclass 38, count 0 2006.229.10:47:10.52#ibcon#read 3, iclass 38, count 0 2006.229.10:47:10.52#ibcon#about to read 4, iclass 38, count 0 2006.229.10:47:10.52#ibcon#read 4, iclass 38, count 0 2006.229.10:47:10.52#ibcon#about to read 5, iclass 38, count 0 2006.229.10:47:10.52#ibcon#read 5, iclass 38, count 0 2006.229.10:47:10.52#ibcon#about to read 6, iclass 38, count 0 2006.229.10:47:10.52#ibcon#read 6, iclass 38, count 0 2006.229.10:47:10.52#ibcon#end of sib2, iclass 38, count 0 2006.229.10:47:10.52#ibcon#*after write, iclass 38, count 0 2006.229.10:47:10.52#ibcon#*before return 0, iclass 38, count 0 2006.229.10:47:10.52#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:10.52#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.10:47:10.52#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:47:10.52#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:47:10.52$vck44/vbbw=wide 2006.229.10:47:10.52#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.10:47:10.52#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.10:47:10.52#ibcon#ireg 8 cls_cnt 0 2006.229.10:47:10.52#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:47:10.59#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:47:10.59#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:47:10.59#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:47:10.59#ibcon#first serial, iclass 40, count 0 2006.229.10:47:10.59#ibcon#enter sib2, iclass 40, count 0 2006.229.10:47:10.59#ibcon#flushed, iclass 40, count 0 2006.229.10:47:10.59#ibcon#about to write, iclass 40, count 0 2006.229.10:47:10.59#ibcon#wrote, iclass 40, count 0 2006.229.10:47:10.59#ibcon#about to read 3, iclass 40, count 0 2006.229.10:47:10.61#ibcon#read 3, iclass 40, count 0 2006.229.10:47:10.61#ibcon#about to read 4, iclass 40, count 0 2006.229.10:47:10.61#ibcon#read 4, iclass 40, count 0 2006.229.10:47:10.61#ibcon#about to read 5, iclass 40, count 0 2006.229.10:47:10.61#ibcon#read 5, iclass 40, count 0 2006.229.10:47:10.61#ibcon#about to read 6, iclass 40, count 0 2006.229.10:47:10.61#ibcon#read 6, iclass 40, count 0 2006.229.10:47:10.61#ibcon#end of sib2, iclass 40, count 0 2006.229.10:47:10.61#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:47:10.61#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:47:10.61#ibcon#[27=BW32\r\n] 2006.229.10:47:10.61#ibcon#*before write, iclass 40, count 0 2006.229.10:47:10.61#ibcon#enter sib2, iclass 40, count 0 2006.229.10:47:10.61#ibcon#flushed, iclass 40, count 0 2006.229.10:47:10.61#ibcon#about to write, iclass 40, count 0 2006.229.10:47:10.61#ibcon#wrote, iclass 40, count 0 2006.229.10:47:10.61#ibcon#about to read 3, iclass 40, count 0 2006.229.10:47:10.64#ibcon#read 3, iclass 40, count 0 2006.229.10:47:10.64#ibcon#about to read 4, iclass 40, count 0 2006.229.10:47:10.64#ibcon#read 4, iclass 40, count 0 2006.229.10:47:10.64#ibcon#about to read 5, iclass 40, count 0 2006.229.10:47:10.64#ibcon#read 5, iclass 40, count 0 2006.229.10:47:10.64#ibcon#about to read 6, iclass 40, count 0 2006.229.10:47:10.64#ibcon#read 6, iclass 40, count 0 2006.229.10:47:10.64#ibcon#end of sib2, iclass 40, count 0 2006.229.10:47:10.64#ibcon#*after write, iclass 40, count 0 2006.229.10:47:10.64#ibcon#*before return 0, iclass 40, count 0 2006.229.10:47:10.64#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:47:10.64#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:47:10.64#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:47:10.64#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:47:10.64$setupk4/ifdk4 2006.229.10:47:10.64$ifdk4/lo= 2006.229.10:47:10.64$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:47:10.64$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:47:10.64$ifdk4/patch= 2006.229.10:47:10.64$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:47:10.64$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:47:10.64$setupk4/!*+20s 2006.229.10:47:13.80#abcon#<5=/04 1.6 3.0 28.451001001.7\r\n> 2006.229.10:47:13.82#abcon#{5=INTERFACE CLEAR} 2006.229.10:47:13.88#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:47:23.97#abcon#<5=/04 1.6 3.2 28.451001001.7\r\n> 2006.229.10:47:23.99#abcon#{5=INTERFACE CLEAR} 2006.229.10:47:24.05#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:47:25.15$setupk4/"tpicd 2006.229.10:47:25.15$setupk4/echo=off 2006.229.10:47:25.15$setupk4/xlog=off 2006.229.10:47:25.15:!2006.229.10:51:18 2006.229.10:47:59.13#trakl#Source acquired 2006.229.10:48:01.14#flagr#flagr/antenna,acquired 2006.229.10:51:18.00:preob 2006.229.10:51:18.14/onsource/TRACKING 2006.229.10:51:18.14:!2006.229.10:51:28 2006.229.10:51:28.00:"tape 2006.229.10:51:28.00:"st=record 2006.229.10:51:28.00:data_valid=on 2006.229.10:51:28.00:midob 2006.229.10:51:28.14/onsource/TRACKING 2006.229.10:51:28.14/wx/28.46,1001.8,100 2006.229.10:51:28.25/cable/+6.4029E-03 2006.229.10:51:29.34/va/01,08,usb,yes,30,32 2006.229.10:51:29.34/va/02,07,usb,yes,32,33 2006.229.10:51:29.34/va/03,06,usb,yes,40,42 2006.229.10:51:29.34/va/04,07,usb,yes,33,35 2006.229.10:51:29.34/va/05,04,usb,yes,30,30 2006.229.10:51:29.34/va/06,04,usb,yes,33,33 2006.229.10:51:29.34/va/07,05,usb,yes,29,30 2006.229.10:51:29.34/va/08,06,usb,yes,21,26 2006.229.10:51:29.57/valo/01,524.99,yes,locked 2006.229.10:51:29.57/valo/02,534.99,yes,locked 2006.229.10:51:29.57/valo/03,564.99,yes,locked 2006.229.10:51:29.57/valo/04,624.99,yes,locked 2006.229.10:51:29.57/valo/05,734.99,yes,locked 2006.229.10:51:29.57/valo/06,814.99,yes,locked 2006.229.10:51:29.57/valo/07,864.99,yes,locked 2006.229.10:51:29.57/valo/08,884.99,yes,locked 2006.229.10:51:30.66/vb/01,04,usb,yes,31,29 2006.229.10:51:30.66/vb/02,04,usb,yes,33,33 2006.229.10:51:30.66/vb/03,04,usb,yes,30,33 2006.229.10:51:30.66/vb/04,04,usb,yes,35,33 2006.229.10:51:30.66/vb/05,04,usb,yes,27,29 2006.229.10:51:30.66/vb/06,04,usb,yes,32,28 2006.229.10:51:30.66/vb/07,04,usb,yes,31,31 2006.229.10:51:30.66/vb/08,04,usb,yes,29,32 2006.229.10:51:30.90/vblo/01,629.99,yes,locked 2006.229.10:51:30.90/vblo/02,634.99,yes,locked 2006.229.10:51:30.90/vblo/03,649.99,yes,locked 2006.229.10:51:30.90/vblo/04,679.99,yes,locked 2006.229.10:51:30.90/vblo/05,709.99,yes,locked 2006.229.10:51:30.90/vblo/06,719.99,yes,locked 2006.229.10:51:30.90/vblo/07,734.99,yes,locked 2006.229.10:51:30.90/vblo/08,744.99,yes,locked 2006.229.10:51:31.05/vabw/8 2006.229.10:51:31.20/vbbw/8 2006.229.10:51:31.29/xfe/off,on,12.0 2006.229.10:51:31.69/ifatt/23,28,28,28 2006.229.10:51:32.08/fmout-gps/S +4.35E-07 2006.229.10:51:32.12:!2006.229.10:52:48 2006.229.10:52:48.00:data_valid=off 2006.229.10:52:48.00:"et 2006.229.10:52:48.00:!+3s 2006.229.10:52:51.01:"tape 2006.229.10:52:51.01:postob 2006.229.10:52:51.11/cable/+6.4029E-03 2006.229.10:52:51.11/wx/28.45,1001.8,100 2006.229.10:52:52.08/fmout-gps/S +4.35E-07 2006.229.10:52:52.08:scan_name=229-1055,jd0608,50 2006.229.10:52:52.08:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.10:52:53.14#flagr#flagr/antenna,new-source 2006.229.10:52:53.14:checkk5 2006.229.10:52:53.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:52:53.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:52:54.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:52:54.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:52:55.14/chk_obsdata//k5ts1/T2291051??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.10:52:55.54/chk_obsdata//k5ts2/T2291051??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.10:52:55.95/chk_obsdata//k5ts3/T2291051??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.10:52:56.35/chk_obsdata//k5ts4/T2291051??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.10:52:57.06/k5log//k5ts1_log_newline 2006.229.10:52:57.77/k5log//k5ts2_log_newline 2006.229.10:52:58.49/k5log//k5ts3_log_newline 2006.229.10:52:59.21/k5log//k5ts4_log_newline 2006.229.10:52:59.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:52:59.23:setupk4=1 2006.229.10:52:59.23$setupk4/echo=on 2006.229.10:52:59.23$setupk4/pcalon 2006.229.10:52:59.23$pcalon/"no phase cal control is implemented here 2006.229.10:52:59.23$setupk4/"tpicd=stop 2006.229.10:52:59.24$setupk4/"rec=synch_on 2006.229.10:52:59.24$setupk4/"rec_mode=128 2006.229.10:52:59.24$setupk4/!* 2006.229.10:52:59.24$setupk4/recpk4 2006.229.10:52:59.24$recpk4/recpatch= 2006.229.10:52:59.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:52:59.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:52:59.24$setupk4/vck44 2006.229.10:52:59.24$vck44/valo=1,524.99 2006.229.10:52:59.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.10:52:59.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.10:52:59.24#ibcon#ireg 17 cls_cnt 0 2006.229.10:52:59.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:52:59.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:52:59.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:52:59.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:52:59.24#ibcon#first serial, iclass 37, count 0 2006.229.10:52:59.24#ibcon#enter sib2, iclass 37, count 0 2006.229.10:52:59.24#ibcon#flushed, iclass 37, count 0 2006.229.10:52:59.24#ibcon#about to write, iclass 37, count 0 2006.229.10:52:59.24#ibcon#wrote, iclass 37, count 0 2006.229.10:52:59.24#ibcon#about to read 3, iclass 37, count 0 2006.229.10:52:59.26#ibcon#read 3, iclass 37, count 0 2006.229.10:52:59.26#ibcon#about to read 4, iclass 37, count 0 2006.229.10:52:59.26#ibcon#read 4, iclass 37, count 0 2006.229.10:52:59.26#ibcon#about to read 5, iclass 37, count 0 2006.229.10:52:59.26#ibcon#read 5, iclass 37, count 0 2006.229.10:52:59.26#ibcon#about to read 6, iclass 37, count 0 2006.229.10:52:59.26#ibcon#read 6, iclass 37, count 0 2006.229.10:52:59.26#ibcon#end of sib2, iclass 37, count 0 2006.229.10:52:59.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:52:59.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:52:59.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:52:59.26#ibcon#*before write, iclass 37, count 0 2006.229.10:52:59.26#ibcon#enter sib2, iclass 37, count 0 2006.229.10:52:59.26#ibcon#flushed, iclass 37, count 0 2006.229.10:52:59.26#ibcon#about to write, iclass 37, count 0 2006.229.10:52:59.26#ibcon#wrote, iclass 37, count 0 2006.229.10:52:59.26#ibcon#about to read 3, iclass 37, count 0 2006.229.10:52:59.31#ibcon#read 3, iclass 37, count 0 2006.229.10:52:59.31#ibcon#about to read 4, iclass 37, count 0 2006.229.10:52:59.31#ibcon#read 4, iclass 37, count 0 2006.229.10:52:59.31#ibcon#about to read 5, iclass 37, count 0 2006.229.10:52:59.31#ibcon#read 5, iclass 37, count 0 2006.229.10:52:59.31#ibcon#about to read 6, iclass 37, count 0 2006.229.10:52:59.31#ibcon#read 6, iclass 37, count 0 2006.229.10:52:59.31#ibcon#end of sib2, iclass 37, count 0 2006.229.10:52:59.31#ibcon#*after write, iclass 37, count 0 2006.229.10:52:59.31#ibcon#*before return 0, iclass 37, count 0 2006.229.10:52:59.31#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:52:59.31#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:52:59.31#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:52:59.31#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:52:59.31$vck44/va=1,8 2006.229.10:52:59.31#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.10:52:59.31#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.10:52:59.31#ibcon#ireg 11 cls_cnt 2 2006.229.10:52:59.31#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:52:59.31#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:52:59.31#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:52:59.31#ibcon#enter wrdev, iclass 39, count 2 2006.229.10:52:59.31#ibcon#first serial, iclass 39, count 2 2006.229.10:52:59.31#ibcon#enter sib2, iclass 39, count 2 2006.229.10:52:59.31#ibcon#flushed, iclass 39, count 2 2006.229.10:52:59.31#ibcon#about to write, iclass 39, count 2 2006.229.10:52:59.31#ibcon#wrote, iclass 39, count 2 2006.229.10:52:59.31#ibcon#about to read 3, iclass 39, count 2 2006.229.10:52:59.33#ibcon#read 3, iclass 39, count 2 2006.229.10:52:59.33#ibcon#about to read 4, iclass 39, count 2 2006.229.10:52:59.33#ibcon#read 4, iclass 39, count 2 2006.229.10:52:59.33#ibcon#about to read 5, iclass 39, count 2 2006.229.10:52:59.33#ibcon#read 5, iclass 39, count 2 2006.229.10:52:59.33#ibcon#about to read 6, iclass 39, count 2 2006.229.10:52:59.33#ibcon#read 6, iclass 39, count 2 2006.229.10:52:59.33#ibcon#end of sib2, iclass 39, count 2 2006.229.10:52:59.33#ibcon#*mode == 0, iclass 39, count 2 2006.229.10:52:59.33#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.10:52:59.33#ibcon#[25=AT01-08\r\n] 2006.229.10:52:59.33#ibcon#*before write, iclass 39, count 2 2006.229.10:52:59.33#ibcon#enter sib2, iclass 39, count 2 2006.229.10:52:59.33#ibcon#flushed, iclass 39, count 2 2006.229.10:52:59.33#ibcon#about to write, iclass 39, count 2 2006.229.10:52:59.33#ibcon#wrote, iclass 39, count 2 2006.229.10:52:59.33#ibcon#about to read 3, iclass 39, count 2 2006.229.10:52:59.36#ibcon#read 3, iclass 39, count 2 2006.229.10:52:59.36#ibcon#about to read 4, iclass 39, count 2 2006.229.10:52:59.36#ibcon#read 4, iclass 39, count 2 2006.229.10:52:59.36#ibcon#about to read 5, iclass 39, count 2 2006.229.10:52:59.36#ibcon#read 5, iclass 39, count 2 2006.229.10:52:59.36#ibcon#about to read 6, iclass 39, count 2 2006.229.10:52:59.36#ibcon#read 6, iclass 39, count 2 2006.229.10:52:59.36#ibcon#end of sib2, iclass 39, count 2 2006.229.10:52:59.36#ibcon#*after write, iclass 39, count 2 2006.229.10:52:59.36#ibcon#*before return 0, iclass 39, count 2 2006.229.10:52:59.36#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:52:59.36#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:52:59.36#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.10:52:59.36#ibcon#ireg 7 cls_cnt 0 2006.229.10:52:59.36#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:52:59.48#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:52:59.48#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:52:59.48#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:52:59.48#ibcon#first serial, iclass 39, count 0 2006.229.10:52:59.48#ibcon#enter sib2, iclass 39, count 0 2006.229.10:52:59.48#ibcon#flushed, iclass 39, count 0 2006.229.10:52:59.48#ibcon#about to write, iclass 39, count 0 2006.229.10:52:59.48#ibcon#wrote, iclass 39, count 0 2006.229.10:52:59.48#ibcon#about to read 3, iclass 39, count 0 2006.229.10:52:59.50#ibcon#read 3, iclass 39, count 0 2006.229.10:52:59.50#ibcon#about to read 4, iclass 39, count 0 2006.229.10:52:59.50#ibcon#read 4, iclass 39, count 0 2006.229.10:52:59.50#ibcon#about to read 5, iclass 39, count 0 2006.229.10:52:59.50#ibcon#read 5, iclass 39, count 0 2006.229.10:52:59.50#ibcon#about to read 6, iclass 39, count 0 2006.229.10:52:59.50#ibcon#read 6, iclass 39, count 0 2006.229.10:52:59.50#ibcon#end of sib2, iclass 39, count 0 2006.229.10:52:59.50#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:52:59.50#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:52:59.50#ibcon#[25=USB\r\n] 2006.229.10:52:59.50#ibcon#*before write, iclass 39, count 0 2006.229.10:52:59.50#ibcon#enter sib2, iclass 39, count 0 2006.229.10:52:59.50#ibcon#flushed, iclass 39, count 0 2006.229.10:52:59.50#ibcon#about to write, iclass 39, count 0 2006.229.10:52:59.50#ibcon#wrote, iclass 39, count 0 2006.229.10:52:59.50#ibcon#about to read 3, iclass 39, count 0 2006.229.10:52:59.53#ibcon#read 3, iclass 39, count 0 2006.229.10:52:59.53#ibcon#about to read 4, iclass 39, count 0 2006.229.10:52:59.53#ibcon#read 4, iclass 39, count 0 2006.229.10:52:59.53#ibcon#about to read 5, iclass 39, count 0 2006.229.10:52:59.53#ibcon#read 5, iclass 39, count 0 2006.229.10:52:59.53#ibcon#about to read 6, iclass 39, count 0 2006.229.10:52:59.53#ibcon#read 6, iclass 39, count 0 2006.229.10:52:59.53#ibcon#end of sib2, iclass 39, count 0 2006.229.10:52:59.53#ibcon#*after write, iclass 39, count 0 2006.229.10:52:59.53#ibcon#*before return 0, iclass 39, count 0 2006.229.10:52:59.53#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:52:59.53#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:52:59.53#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:52:59.53#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:52:59.53$vck44/valo=2,534.99 2006.229.10:52:59.53#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.10:52:59.53#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.10:52:59.53#ibcon#ireg 17 cls_cnt 0 2006.229.10:52:59.53#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:52:59.53#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:52:59.53#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:52:59.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:52:59.53#ibcon#first serial, iclass 3, count 0 2006.229.10:52:59.53#ibcon#enter sib2, iclass 3, count 0 2006.229.10:52:59.53#ibcon#flushed, iclass 3, count 0 2006.229.10:52:59.53#ibcon#about to write, iclass 3, count 0 2006.229.10:52:59.53#ibcon#wrote, iclass 3, count 0 2006.229.10:52:59.53#ibcon#about to read 3, iclass 3, count 0 2006.229.10:52:59.55#ibcon#read 3, iclass 3, count 0 2006.229.10:52:59.55#ibcon#about to read 4, iclass 3, count 0 2006.229.10:52:59.55#ibcon#read 4, iclass 3, count 0 2006.229.10:52:59.55#ibcon#about to read 5, iclass 3, count 0 2006.229.10:52:59.55#ibcon#read 5, iclass 3, count 0 2006.229.10:52:59.55#ibcon#about to read 6, iclass 3, count 0 2006.229.10:52:59.55#ibcon#read 6, iclass 3, count 0 2006.229.10:52:59.55#ibcon#end of sib2, iclass 3, count 0 2006.229.10:52:59.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:52:59.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:52:59.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:52:59.55#ibcon#*before write, iclass 3, count 0 2006.229.10:52:59.55#ibcon#enter sib2, iclass 3, count 0 2006.229.10:52:59.55#ibcon#flushed, iclass 3, count 0 2006.229.10:52:59.55#ibcon#about to write, iclass 3, count 0 2006.229.10:52:59.55#ibcon#wrote, iclass 3, count 0 2006.229.10:52:59.55#ibcon#about to read 3, iclass 3, count 0 2006.229.10:52:59.58#abcon#<5=/03 1.8 3.2 28.451001001.8\r\n> 2006.229.10:52:59.59#ibcon#read 3, iclass 3, count 0 2006.229.10:52:59.59#ibcon#about to read 4, iclass 3, count 0 2006.229.10:52:59.59#ibcon#read 4, iclass 3, count 0 2006.229.10:52:59.59#ibcon#about to read 5, iclass 3, count 0 2006.229.10:52:59.59#ibcon#read 5, iclass 3, count 0 2006.229.10:52:59.59#ibcon#about to read 6, iclass 3, count 0 2006.229.10:52:59.59#ibcon#read 6, iclass 3, count 0 2006.229.10:52:59.59#ibcon#end of sib2, iclass 3, count 0 2006.229.10:52:59.59#ibcon#*after write, iclass 3, count 0 2006.229.10:52:59.59#ibcon#*before return 0, iclass 3, count 0 2006.229.10:52:59.59#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:52:59.59#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:52:59.59#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:52:59.59#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:52:59.59$vck44/va=2,7 2006.229.10:52:59.59#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.10:52:59.59#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.10:52:59.59#ibcon#ireg 11 cls_cnt 2 2006.229.10:52:59.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:52:59.60#abcon#{5=INTERFACE CLEAR} 2006.229.10:52:59.65#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:52:59.65#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:52:59.65#ibcon#enter wrdev, iclass 10, count 2 2006.229.10:52:59.65#ibcon#first serial, iclass 10, count 2 2006.229.10:52:59.65#ibcon#enter sib2, iclass 10, count 2 2006.229.10:52:59.65#ibcon#flushed, iclass 10, count 2 2006.229.10:52:59.65#ibcon#about to write, iclass 10, count 2 2006.229.10:52:59.65#ibcon#wrote, iclass 10, count 2 2006.229.10:52:59.65#ibcon#about to read 3, iclass 10, count 2 2006.229.10:52:59.66#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:52:59.67#ibcon#read 3, iclass 10, count 2 2006.229.10:52:59.67#ibcon#about to read 4, iclass 10, count 2 2006.229.10:52:59.67#ibcon#read 4, iclass 10, count 2 2006.229.10:52:59.67#ibcon#about to read 5, iclass 10, count 2 2006.229.10:52:59.67#ibcon#read 5, iclass 10, count 2 2006.229.10:52:59.67#ibcon#about to read 6, iclass 10, count 2 2006.229.10:52:59.67#ibcon#read 6, iclass 10, count 2 2006.229.10:52:59.67#ibcon#end of sib2, iclass 10, count 2 2006.229.10:52:59.67#ibcon#*mode == 0, iclass 10, count 2 2006.229.10:52:59.67#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.10:52:59.67#ibcon#[25=AT02-07\r\n] 2006.229.10:52:59.67#ibcon#*before write, iclass 10, count 2 2006.229.10:52:59.67#ibcon#enter sib2, iclass 10, count 2 2006.229.10:52:59.67#ibcon#flushed, iclass 10, count 2 2006.229.10:52:59.67#ibcon#about to write, iclass 10, count 2 2006.229.10:52:59.67#ibcon#wrote, iclass 10, count 2 2006.229.10:52:59.67#ibcon#about to read 3, iclass 10, count 2 2006.229.10:52:59.70#ibcon#read 3, iclass 10, count 2 2006.229.10:52:59.70#ibcon#about to read 4, iclass 10, count 2 2006.229.10:52:59.70#ibcon#read 4, iclass 10, count 2 2006.229.10:52:59.70#ibcon#about to read 5, iclass 10, count 2 2006.229.10:52:59.70#ibcon#read 5, iclass 10, count 2 2006.229.10:52:59.70#ibcon#about to read 6, iclass 10, count 2 2006.229.10:52:59.70#ibcon#read 6, iclass 10, count 2 2006.229.10:52:59.70#ibcon#end of sib2, iclass 10, count 2 2006.229.10:52:59.70#ibcon#*after write, iclass 10, count 2 2006.229.10:52:59.70#ibcon#*before return 0, iclass 10, count 2 2006.229.10:52:59.70#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:52:59.70#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:52:59.70#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.10:52:59.70#ibcon#ireg 7 cls_cnt 0 2006.229.10:52:59.70#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:52:59.82#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:52:59.82#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:52:59.82#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:52:59.82#ibcon#first serial, iclass 10, count 0 2006.229.10:52:59.82#ibcon#enter sib2, iclass 10, count 0 2006.229.10:52:59.82#ibcon#flushed, iclass 10, count 0 2006.229.10:52:59.82#ibcon#about to write, iclass 10, count 0 2006.229.10:52:59.82#ibcon#wrote, iclass 10, count 0 2006.229.10:52:59.82#ibcon#about to read 3, iclass 10, count 0 2006.229.10:52:59.84#ibcon#read 3, iclass 10, count 0 2006.229.10:52:59.84#ibcon#about to read 4, iclass 10, count 0 2006.229.10:52:59.84#ibcon#read 4, iclass 10, count 0 2006.229.10:52:59.84#ibcon#about to read 5, iclass 10, count 0 2006.229.10:52:59.84#ibcon#read 5, iclass 10, count 0 2006.229.10:52:59.84#ibcon#about to read 6, iclass 10, count 0 2006.229.10:52:59.84#ibcon#read 6, iclass 10, count 0 2006.229.10:52:59.84#ibcon#end of sib2, iclass 10, count 0 2006.229.10:52:59.84#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:52:59.84#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:52:59.84#ibcon#[25=USB\r\n] 2006.229.10:52:59.84#ibcon#*before write, iclass 10, count 0 2006.229.10:52:59.84#ibcon#enter sib2, iclass 10, count 0 2006.229.10:52:59.84#ibcon#flushed, iclass 10, count 0 2006.229.10:52:59.84#ibcon#about to write, iclass 10, count 0 2006.229.10:52:59.84#ibcon#wrote, iclass 10, count 0 2006.229.10:52:59.84#ibcon#about to read 3, iclass 10, count 0 2006.229.10:52:59.87#ibcon#read 3, iclass 10, count 0 2006.229.10:52:59.87#ibcon#about to read 4, iclass 10, count 0 2006.229.10:52:59.87#ibcon#read 4, iclass 10, count 0 2006.229.10:52:59.87#ibcon#about to read 5, iclass 10, count 0 2006.229.10:52:59.87#ibcon#read 5, iclass 10, count 0 2006.229.10:52:59.87#ibcon#about to read 6, iclass 10, count 0 2006.229.10:52:59.87#ibcon#read 6, iclass 10, count 0 2006.229.10:52:59.87#ibcon#end of sib2, iclass 10, count 0 2006.229.10:52:59.87#ibcon#*after write, iclass 10, count 0 2006.229.10:52:59.87#ibcon#*before return 0, iclass 10, count 0 2006.229.10:52:59.87#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:52:59.87#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:52:59.87#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:52:59.87#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:52:59.87$vck44/valo=3,564.99 2006.229.10:52:59.87#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.10:52:59.87#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.10:52:59.87#ibcon#ireg 17 cls_cnt 0 2006.229.10:52:59.87#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:52:59.87#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:52:59.87#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:52:59.87#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:52:59.87#ibcon#first serial, iclass 13, count 0 2006.229.10:52:59.87#ibcon#enter sib2, iclass 13, count 0 2006.229.10:52:59.87#ibcon#flushed, iclass 13, count 0 2006.229.10:52:59.87#ibcon#about to write, iclass 13, count 0 2006.229.10:52:59.87#ibcon#wrote, iclass 13, count 0 2006.229.10:52:59.87#ibcon#about to read 3, iclass 13, count 0 2006.229.10:52:59.89#ibcon#read 3, iclass 13, count 0 2006.229.10:52:59.89#ibcon#about to read 4, iclass 13, count 0 2006.229.10:52:59.89#ibcon#read 4, iclass 13, count 0 2006.229.10:52:59.89#ibcon#about to read 5, iclass 13, count 0 2006.229.10:52:59.89#ibcon#read 5, iclass 13, count 0 2006.229.10:52:59.89#ibcon#about to read 6, iclass 13, count 0 2006.229.10:52:59.89#ibcon#read 6, iclass 13, count 0 2006.229.10:52:59.89#ibcon#end of sib2, iclass 13, count 0 2006.229.10:52:59.89#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:52:59.89#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:52:59.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:52:59.89#ibcon#*before write, iclass 13, count 0 2006.229.10:52:59.89#ibcon#enter sib2, iclass 13, count 0 2006.229.10:52:59.89#ibcon#flushed, iclass 13, count 0 2006.229.10:52:59.89#ibcon#about to write, iclass 13, count 0 2006.229.10:52:59.89#ibcon#wrote, iclass 13, count 0 2006.229.10:52:59.89#ibcon#about to read 3, iclass 13, count 0 2006.229.10:52:59.93#ibcon#read 3, iclass 13, count 0 2006.229.10:52:59.93#ibcon#about to read 4, iclass 13, count 0 2006.229.10:52:59.93#ibcon#read 4, iclass 13, count 0 2006.229.10:52:59.93#ibcon#about to read 5, iclass 13, count 0 2006.229.10:52:59.93#ibcon#read 5, iclass 13, count 0 2006.229.10:52:59.93#ibcon#about to read 6, iclass 13, count 0 2006.229.10:52:59.93#ibcon#read 6, iclass 13, count 0 2006.229.10:52:59.93#ibcon#end of sib2, iclass 13, count 0 2006.229.10:52:59.93#ibcon#*after write, iclass 13, count 0 2006.229.10:52:59.93#ibcon#*before return 0, iclass 13, count 0 2006.229.10:52:59.93#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:52:59.93#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:52:59.93#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:52:59.93#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:52:59.93$vck44/va=3,6 2006.229.10:52:59.93#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.10:52:59.93#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.10:52:59.93#ibcon#ireg 11 cls_cnt 2 2006.229.10:52:59.93#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:52:59.99#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:52:59.99#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:52:59.99#ibcon#enter wrdev, iclass 15, count 2 2006.229.10:52:59.99#ibcon#first serial, iclass 15, count 2 2006.229.10:52:59.99#ibcon#enter sib2, iclass 15, count 2 2006.229.10:52:59.99#ibcon#flushed, iclass 15, count 2 2006.229.10:52:59.99#ibcon#about to write, iclass 15, count 2 2006.229.10:52:59.99#ibcon#wrote, iclass 15, count 2 2006.229.10:52:59.99#ibcon#about to read 3, iclass 15, count 2 2006.229.10:53:00.01#ibcon#read 3, iclass 15, count 2 2006.229.10:53:00.01#ibcon#about to read 4, iclass 15, count 2 2006.229.10:53:00.01#ibcon#read 4, iclass 15, count 2 2006.229.10:53:00.01#ibcon#about to read 5, iclass 15, count 2 2006.229.10:53:00.01#ibcon#read 5, iclass 15, count 2 2006.229.10:53:00.01#ibcon#about to read 6, iclass 15, count 2 2006.229.10:53:00.01#ibcon#read 6, iclass 15, count 2 2006.229.10:53:00.01#ibcon#end of sib2, iclass 15, count 2 2006.229.10:53:00.01#ibcon#*mode == 0, iclass 15, count 2 2006.229.10:53:00.01#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.10:53:00.01#ibcon#[25=AT03-06\r\n] 2006.229.10:53:00.01#ibcon#*before write, iclass 15, count 2 2006.229.10:53:00.01#ibcon#enter sib2, iclass 15, count 2 2006.229.10:53:00.01#ibcon#flushed, iclass 15, count 2 2006.229.10:53:00.01#ibcon#about to write, iclass 15, count 2 2006.229.10:53:00.01#ibcon#wrote, iclass 15, count 2 2006.229.10:53:00.01#ibcon#about to read 3, iclass 15, count 2 2006.229.10:53:00.04#ibcon#read 3, iclass 15, count 2 2006.229.10:53:00.04#ibcon#about to read 4, iclass 15, count 2 2006.229.10:53:00.04#ibcon#read 4, iclass 15, count 2 2006.229.10:53:00.04#ibcon#about to read 5, iclass 15, count 2 2006.229.10:53:00.04#ibcon#read 5, iclass 15, count 2 2006.229.10:53:00.04#ibcon#about to read 6, iclass 15, count 2 2006.229.10:53:00.04#ibcon#read 6, iclass 15, count 2 2006.229.10:53:00.04#ibcon#end of sib2, iclass 15, count 2 2006.229.10:53:00.04#ibcon#*after write, iclass 15, count 2 2006.229.10:53:00.04#ibcon#*before return 0, iclass 15, count 2 2006.229.10:53:00.04#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:00.04#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:00.04#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.10:53:00.04#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:00.04#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:00.16#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:00.16#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:00.16#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:53:00.16#ibcon#first serial, iclass 15, count 0 2006.229.10:53:00.16#ibcon#enter sib2, iclass 15, count 0 2006.229.10:53:00.16#ibcon#flushed, iclass 15, count 0 2006.229.10:53:00.16#ibcon#about to write, iclass 15, count 0 2006.229.10:53:00.16#ibcon#wrote, iclass 15, count 0 2006.229.10:53:00.16#ibcon#about to read 3, iclass 15, count 0 2006.229.10:53:00.18#ibcon#read 3, iclass 15, count 0 2006.229.10:53:00.18#ibcon#about to read 4, iclass 15, count 0 2006.229.10:53:00.18#ibcon#read 4, iclass 15, count 0 2006.229.10:53:00.18#ibcon#about to read 5, iclass 15, count 0 2006.229.10:53:00.18#ibcon#read 5, iclass 15, count 0 2006.229.10:53:00.18#ibcon#about to read 6, iclass 15, count 0 2006.229.10:53:00.18#ibcon#read 6, iclass 15, count 0 2006.229.10:53:00.18#ibcon#end of sib2, iclass 15, count 0 2006.229.10:53:00.18#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:53:00.18#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:53:00.18#ibcon#[25=USB\r\n] 2006.229.10:53:00.18#ibcon#*before write, iclass 15, count 0 2006.229.10:53:00.18#ibcon#enter sib2, iclass 15, count 0 2006.229.10:53:00.18#ibcon#flushed, iclass 15, count 0 2006.229.10:53:00.18#ibcon#about to write, iclass 15, count 0 2006.229.10:53:00.18#ibcon#wrote, iclass 15, count 0 2006.229.10:53:00.18#ibcon#about to read 3, iclass 15, count 0 2006.229.10:53:00.21#ibcon#read 3, iclass 15, count 0 2006.229.10:53:00.21#ibcon#about to read 4, iclass 15, count 0 2006.229.10:53:00.21#ibcon#read 4, iclass 15, count 0 2006.229.10:53:00.21#ibcon#about to read 5, iclass 15, count 0 2006.229.10:53:00.21#ibcon#read 5, iclass 15, count 0 2006.229.10:53:00.21#ibcon#about to read 6, iclass 15, count 0 2006.229.10:53:00.21#ibcon#read 6, iclass 15, count 0 2006.229.10:53:00.21#ibcon#end of sib2, iclass 15, count 0 2006.229.10:53:00.21#ibcon#*after write, iclass 15, count 0 2006.229.10:53:00.21#ibcon#*before return 0, iclass 15, count 0 2006.229.10:53:00.21#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:00.21#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:00.21#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:53:00.21#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:53:00.21$vck44/valo=4,624.99 2006.229.10:53:00.21#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.10:53:00.21#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.10:53:00.21#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:00.21#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:00.21#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:00.21#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:00.21#ibcon#enter wrdev, iclass 17, count 0 2006.229.10:53:00.21#ibcon#first serial, iclass 17, count 0 2006.229.10:53:00.21#ibcon#enter sib2, iclass 17, count 0 2006.229.10:53:00.21#ibcon#flushed, iclass 17, count 0 2006.229.10:53:00.21#ibcon#about to write, iclass 17, count 0 2006.229.10:53:00.21#ibcon#wrote, iclass 17, count 0 2006.229.10:53:00.21#ibcon#about to read 3, iclass 17, count 0 2006.229.10:53:00.23#ibcon#read 3, iclass 17, count 0 2006.229.10:53:00.23#ibcon#about to read 4, iclass 17, count 0 2006.229.10:53:00.23#ibcon#read 4, iclass 17, count 0 2006.229.10:53:00.23#ibcon#about to read 5, iclass 17, count 0 2006.229.10:53:00.23#ibcon#read 5, iclass 17, count 0 2006.229.10:53:00.23#ibcon#about to read 6, iclass 17, count 0 2006.229.10:53:00.23#ibcon#read 6, iclass 17, count 0 2006.229.10:53:00.23#ibcon#end of sib2, iclass 17, count 0 2006.229.10:53:00.23#ibcon#*mode == 0, iclass 17, count 0 2006.229.10:53:00.23#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.10:53:00.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:53:00.23#ibcon#*before write, iclass 17, count 0 2006.229.10:53:00.23#ibcon#enter sib2, iclass 17, count 0 2006.229.10:53:00.23#ibcon#flushed, iclass 17, count 0 2006.229.10:53:00.23#ibcon#about to write, iclass 17, count 0 2006.229.10:53:00.23#ibcon#wrote, iclass 17, count 0 2006.229.10:53:00.23#ibcon#about to read 3, iclass 17, count 0 2006.229.10:53:00.27#ibcon#read 3, iclass 17, count 0 2006.229.10:53:00.27#ibcon#about to read 4, iclass 17, count 0 2006.229.10:53:00.27#ibcon#read 4, iclass 17, count 0 2006.229.10:53:00.27#ibcon#about to read 5, iclass 17, count 0 2006.229.10:53:00.27#ibcon#read 5, iclass 17, count 0 2006.229.10:53:00.27#ibcon#about to read 6, iclass 17, count 0 2006.229.10:53:00.27#ibcon#read 6, iclass 17, count 0 2006.229.10:53:00.27#ibcon#end of sib2, iclass 17, count 0 2006.229.10:53:00.27#ibcon#*after write, iclass 17, count 0 2006.229.10:53:00.27#ibcon#*before return 0, iclass 17, count 0 2006.229.10:53:00.27#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:00.27#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:00.27#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.10:53:00.27#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.10:53:00.27$vck44/va=4,7 2006.229.10:53:00.27#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.10:53:00.27#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.10:53:00.27#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:00.27#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:00.33#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:00.33#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:00.33#ibcon#enter wrdev, iclass 19, count 2 2006.229.10:53:00.33#ibcon#first serial, iclass 19, count 2 2006.229.10:53:00.33#ibcon#enter sib2, iclass 19, count 2 2006.229.10:53:00.33#ibcon#flushed, iclass 19, count 2 2006.229.10:53:00.33#ibcon#about to write, iclass 19, count 2 2006.229.10:53:00.33#ibcon#wrote, iclass 19, count 2 2006.229.10:53:00.33#ibcon#about to read 3, iclass 19, count 2 2006.229.10:53:00.35#ibcon#read 3, iclass 19, count 2 2006.229.10:53:00.35#ibcon#about to read 4, iclass 19, count 2 2006.229.10:53:00.35#ibcon#read 4, iclass 19, count 2 2006.229.10:53:00.35#ibcon#about to read 5, iclass 19, count 2 2006.229.10:53:00.35#ibcon#read 5, iclass 19, count 2 2006.229.10:53:00.35#ibcon#about to read 6, iclass 19, count 2 2006.229.10:53:00.35#ibcon#read 6, iclass 19, count 2 2006.229.10:53:00.35#ibcon#end of sib2, iclass 19, count 2 2006.229.10:53:00.35#ibcon#*mode == 0, iclass 19, count 2 2006.229.10:53:00.35#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.10:53:00.35#ibcon#[25=AT04-07\r\n] 2006.229.10:53:00.35#ibcon#*before write, iclass 19, count 2 2006.229.10:53:00.35#ibcon#enter sib2, iclass 19, count 2 2006.229.10:53:00.35#ibcon#flushed, iclass 19, count 2 2006.229.10:53:00.35#ibcon#about to write, iclass 19, count 2 2006.229.10:53:00.35#ibcon#wrote, iclass 19, count 2 2006.229.10:53:00.35#ibcon#about to read 3, iclass 19, count 2 2006.229.10:53:00.38#ibcon#read 3, iclass 19, count 2 2006.229.10:53:00.38#ibcon#about to read 4, iclass 19, count 2 2006.229.10:53:00.38#ibcon#read 4, iclass 19, count 2 2006.229.10:53:00.38#ibcon#about to read 5, iclass 19, count 2 2006.229.10:53:00.38#ibcon#read 5, iclass 19, count 2 2006.229.10:53:00.38#ibcon#about to read 6, iclass 19, count 2 2006.229.10:53:00.38#ibcon#read 6, iclass 19, count 2 2006.229.10:53:00.41#ibcon#end of sib2, iclass 19, count 2 2006.229.10:53:00.41#ibcon#*after write, iclass 19, count 2 2006.229.10:53:00.41#ibcon#*before return 0, iclass 19, count 2 2006.229.10:53:00.41#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:00.41#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:00.41#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.10:53:00.41#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:00.41#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:00.53#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:00.53#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:00.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:53:00.53#ibcon#first serial, iclass 19, count 0 2006.229.10:53:00.53#ibcon#enter sib2, iclass 19, count 0 2006.229.10:53:00.53#ibcon#flushed, iclass 19, count 0 2006.229.10:53:00.53#ibcon#about to write, iclass 19, count 0 2006.229.10:53:00.53#ibcon#wrote, iclass 19, count 0 2006.229.10:53:00.53#ibcon#about to read 3, iclass 19, count 0 2006.229.10:53:00.55#ibcon#read 3, iclass 19, count 0 2006.229.10:53:00.55#ibcon#about to read 4, iclass 19, count 0 2006.229.10:53:00.55#ibcon#read 4, iclass 19, count 0 2006.229.10:53:00.55#ibcon#about to read 5, iclass 19, count 0 2006.229.10:53:00.55#ibcon#read 5, iclass 19, count 0 2006.229.10:53:00.55#ibcon#about to read 6, iclass 19, count 0 2006.229.10:53:00.55#ibcon#read 6, iclass 19, count 0 2006.229.10:53:00.55#ibcon#end of sib2, iclass 19, count 0 2006.229.10:53:00.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:53:00.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:53:00.55#ibcon#[25=USB\r\n] 2006.229.10:53:00.55#ibcon#*before write, iclass 19, count 0 2006.229.10:53:00.55#ibcon#enter sib2, iclass 19, count 0 2006.229.10:53:00.55#ibcon#flushed, iclass 19, count 0 2006.229.10:53:00.55#ibcon#about to write, iclass 19, count 0 2006.229.10:53:00.55#ibcon#wrote, iclass 19, count 0 2006.229.10:53:00.55#ibcon#about to read 3, iclass 19, count 0 2006.229.10:53:00.58#ibcon#read 3, iclass 19, count 0 2006.229.10:53:00.58#ibcon#about to read 4, iclass 19, count 0 2006.229.10:53:00.58#ibcon#read 4, iclass 19, count 0 2006.229.10:53:00.58#ibcon#about to read 5, iclass 19, count 0 2006.229.10:53:00.58#ibcon#read 5, iclass 19, count 0 2006.229.10:53:00.58#ibcon#about to read 6, iclass 19, count 0 2006.229.10:53:00.58#ibcon#read 6, iclass 19, count 0 2006.229.10:53:00.58#ibcon#end of sib2, iclass 19, count 0 2006.229.10:53:00.58#ibcon#*after write, iclass 19, count 0 2006.229.10:53:00.58#ibcon#*before return 0, iclass 19, count 0 2006.229.10:53:00.58#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:00.58#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:00.58#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:53:00.58#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:53:00.58$vck44/valo=5,734.99 2006.229.10:53:00.58#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.10:53:00.58#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.10:53:00.58#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:00.58#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:00.58#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:00.58#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:00.58#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:53:00.58#ibcon#first serial, iclass 21, count 0 2006.229.10:53:00.58#ibcon#enter sib2, iclass 21, count 0 2006.229.10:53:00.58#ibcon#flushed, iclass 21, count 0 2006.229.10:53:00.58#ibcon#about to write, iclass 21, count 0 2006.229.10:53:00.58#ibcon#wrote, iclass 21, count 0 2006.229.10:53:00.58#ibcon#about to read 3, iclass 21, count 0 2006.229.10:53:00.60#ibcon#read 3, iclass 21, count 0 2006.229.10:53:00.60#ibcon#about to read 4, iclass 21, count 0 2006.229.10:53:00.60#ibcon#read 4, iclass 21, count 0 2006.229.10:53:00.60#ibcon#about to read 5, iclass 21, count 0 2006.229.10:53:00.60#ibcon#read 5, iclass 21, count 0 2006.229.10:53:00.60#ibcon#about to read 6, iclass 21, count 0 2006.229.10:53:00.60#ibcon#read 6, iclass 21, count 0 2006.229.10:53:00.60#ibcon#end of sib2, iclass 21, count 0 2006.229.10:53:00.60#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:53:00.60#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:53:00.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:53:00.60#ibcon#*before write, iclass 21, count 0 2006.229.10:53:00.60#ibcon#enter sib2, iclass 21, count 0 2006.229.10:53:00.60#ibcon#flushed, iclass 21, count 0 2006.229.10:53:00.60#ibcon#about to write, iclass 21, count 0 2006.229.10:53:00.60#ibcon#wrote, iclass 21, count 0 2006.229.10:53:00.60#ibcon#about to read 3, iclass 21, count 0 2006.229.10:53:00.64#ibcon#read 3, iclass 21, count 0 2006.229.10:53:00.64#ibcon#about to read 4, iclass 21, count 0 2006.229.10:53:00.64#ibcon#read 4, iclass 21, count 0 2006.229.10:53:00.64#ibcon#about to read 5, iclass 21, count 0 2006.229.10:53:00.64#ibcon#read 5, iclass 21, count 0 2006.229.10:53:00.64#ibcon#about to read 6, iclass 21, count 0 2006.229.10:53:00.64#ibcon#read 6, iclass 21, count 0 2006.229.10:53:00.64#ibcon#end of sib2, iclass 21, count 0 2006.229.10:53:00.64#ibcon#*after write, iclass 21, count 0 2006.229.10:53:00.64#ibcon#*before return 0, iclass 21, count 0 2006.229.10:53:00.64#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:00.64#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:00.64#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:53:00.64#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:53:00.64$vck44/va=5,4 2006.229.10:53:00.64#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.10:53:00.64#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.10:53:00.64#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:00.64#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:00.70#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:00.70#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:00.70#ibcon#enter wrdev, iclass 23, count 2 2006.229.10:53:00.70#ibcon#first serial, iclass 23, count 2 2006.229.10:53:00.70#ibcon#enter sib2, iclass 23, count 2 2006.229.10:53:00.70#ibcon#flushed, iclass 23, count 2 2006.229.10:53:00.70#ibcon#about to write, iclass 23, count 2 2006.229.10:53:00.70#ibcon#wrote, iclass 23, count 2 2006.229.10:53:00.70#ibcon#about to read 3, iclass 23, count 2 2006.229.10:53:00.72#ibcon#read 3, iclass 23, count 2 2006.229.10:53:00.72#ibcon#about to read 4, iclass 23, count 2 2006.229.10:53:00.72#ibcon#read 4, iclass 23, count 2 2006.229.10:53:00.72#ibcon#about to read 5, iclass 23, count 2 2006.229.10:53:00.72#ibcon#read 5, iclass 23, count 2 2006.229.10:53:00.72#ibcon#about to read 6, iclass 23, count 2 2006.229.10:53:00.72#ibcon#read 6, iclass 23, count 2 2006.229.10:53:00.72#ibcon#end of sib2, iclass 23, count 2 2006.229.10:53:00.72#ibcon#*mode == 0, iclass 23, count 2 2006.229.10:53:00.72#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.10:53:00.72#ibcon#[25=AT05-04\r\n] 2006.229.10:53:00.72#ibcon#*before write, iclass 23, count 2 2006.229.10:53:00.72#ibcon#enter sib2, iclass 23, count 2 2006.229.10:53:00.72#ibcon#flushed, iclass 23, count 2 2006.229.10:53:00.72#ibcon#about to write, iclass 23, count 2 2006.229.10:53:00.72#ibcon#wrote, iclass 23, count 2 2006.229.10:53:00.72#ibcon#about to read 3, iclass 23, count 2 2006.229.10:53:00.75#ibcon#read 3, iclass 23, count 2 2006.229.10:53:00.75#ibcon#about to read 4, iclass 23, count 2 2006.229.10:53:00.75#ibcon#read 4, iclass 23, count 2 2006.229.10:53:00.75#ibcon#about to read 5, iclass 23, count 2 2006.229.10:53:00.75#ibcon#read 5, iclass 23, count 2 2006.229.10:53:00.75#ibcon#about to read 6, iclass 23, count 2 2006.229.10:53:00.75#ibcon#read 6, iclass 23, count 2 2006.229.10:53:00.75#ibcon#end of sib2, iclass 23, count 2 2006.229.10:53:00.75#ibcon#*after write, iclass 23, count 2 2006.229.10:53:00.75#ibcon#*before return 0, iclass 23, count 2 2006.229.10:53:00.75#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:00.75#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:00.75#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.10:53:00.75#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:00.75#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:00.87#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:00.87#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:00.87#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:53:00.87#ibcon#first serial, iclass 23, count 0 2006.229.10:53:00.87#ibcon#enter sib2, iclass 23, count 0 2006.229.10:53:00.87#ibcon#flushed, iclass 23, count 0 2006.229.10:53:00.87#ibcon#about to write, iclass 23, count 0 2006.229.10:53:00.87#ibcon#wrote, iclass 23, count 0 2006.229.10:53:00.87#ibcon#about to read 3, iclass 23, count 0 2006.229.10:53:00.89#ibcon#read 3, iclass 23, count 0 2006.229.10:53:00.89#ibcon#about to read 4, iclass 23, count 0 2006.229.10:53:00.89#ibcon#read 4, iclass 23, count 0 2006.229.10:53:00.89#ibcon#about to read 5, iclass 23, count 0 2006.229.10:53:00.89#ibcon#read 5, iclass 23, count 0 2006.229.10:53:00.89#ibcon#about to read 6, iclass 23, count 0 2006.229.10:53:00.89#ibcon#read 6, iclass 23, count 0 2006.229.10:53:00.89#ibcon#end of sib2, iclass 23, count 0 2006.229.10:53:00.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:53:00.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:53:00.89#ibcon#[25=USB\r\n] 2006.229.10:53:00.89#ibcon#*before write, iclass 23, count 0 2006.229.10:53:00.89#ibcon#enter sib2, iclass 23, count 0 2006.229.10:53:00.89#ibcon#flushed, iclass 23, count 0 2006.229.10:53:00.89#ibcon#about to write, iclass 23, count 0 2006.229.10:53:00.89#ibcon#wrote, iclass 23, count 0 2006.229.10:53:00.89#ibcon#about to read 3, iclass 23, count 0 2006.229.10:53:00.92#ibcon#read 3, iclass 23, count 0 2006.229.10:53:00.92#ibcon#about to read 4, iclass 23, count 0 2006.229.10:53:00.92#ibcon#read 4, iclass 23, count 0 2006.229.10:53:00.92#ibcon#about to read 5, iclass 23, count 0 2006.229.10:53:00.92#ibcon#read 5, iclass 23, count 0 2006.229.10:53:00.92#ibcon#about to read 6, iclass 23, count 0 2006.229.10:53:00.92#ibcon#read 6, iclass 23, count 0 2006.229.10:53:00.92#ibcon#end of sib2, iclass 23, count 0 2006.229.10:53:00.92#ibcon#*after write, iclass 23, count 0 2006.229.10:53:00.92#ibcon#*before return 0, iclass 23, count 0 2006.229.10:53:00.92#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:00.92#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:00.92#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:53:00.92#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:53:00.92$vck44/valo=6,814.99 2006.229.10:53:00.92#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.10:53:00.92#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.10:53:00.92#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:00.92#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:00.92#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:00.92#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:00.92#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:53:00.92#ibcon#first serial, iclass 25, count 0 2006.229.10:53:00.92#ibcon#enter sib2, iclass 25, count 0 2006.229.10:53:00.92#ibcon#flushed, iclass 25, count 0 2006.229.10:53:00.92#ibcon#about to write, iclass 25, count 0 2006.229.10:53:00.92#ibcon#wrote, iclass 25, count 0 2006.229.10:53:00.92#ibcon#about to read 3, iclass 25, count 0 2006.229.10:53:00.94#ibcon#read 3, iclass 25, count 0 2006.229.10:53:00.94#ibcon#about to read 4, iclass 25, count 0 2006.229.10:53:00.94#ibcon#read 4, iclass 25, count 0 2006.229.10:53:00.94#ibcon#about to read 5, iclass 25, count 0 2006.229.10:53:00.94#ibcon#read 5, iclass 25, count 0 2006.229.10:53:00.94#ibcon#about to read 6, iclass 25, count 0 2006.229.10:53:00.94#ibcon#read 6, iclass 25, count 0 2006.229.10:53:00.94#ibcon#end of sib2, iclass 25, count 0 2006.229.10:53:00.94#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:53:00.94#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:53:00.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:53:00.94#ibcon#*before write, iclass 25, count 0 2006.229.10:53:00.94#ibcon#enter sib2, iclass 25, count 0 2006.229.10:53:00.94#ibcon#flushed, iclass 25, count 0 2006.229.10:53:00.94#ibcon#about to write, iclass 25, count 0 2006.229.10:53:00.94#ibcon#wrote, iclass 25, count 0 2006.229.10:53:00.94#ibcon#about to read 3, iclass 25, count 0 2006.229.10:53:00.98#ibcon#read 3, iclass 25, count 0 2006.229.10:53:00.98#ibcon#about to read 4, iclass 25, count 0 2006.229.10:53:00.98#ibcon#read 4, iclass 25, count 0 2006.229.10:53:00.98#ibcon#about to read 5, iclass 25, count 0 2006.229.10:53:00.98#ibcon#read 5, iclass 25, count 0 2006.229.10:53:00.98#ibcon#about to read 6, iclass 25, count 0 2006.229.10:53:00.98#ibcon#read 6, iclass 25, count 0 2006.229.10:53:00.98#ibcon#end of sib2, iclass 25, count 0 2006.229.10:53:00.98#ibcon#*after write, iclass 25, count 0 2006.229.10:53:00.98#ibcon#*before return 0, iclass 25, count 0 2006.229.10:53:00.98#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:00.98#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:00.98#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:53:00.98#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:53:00.98$vck44/va=6,4 2006.229.10:53:00.98#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.10:53:00.98#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.10:53:00.98#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:00.98#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:01.04#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:01.04#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:01.04#ibcon#enter wrdev, iclass 27, count 2 2006.229.10:53:01.04#ibcon#first serial, iclass 27, count 2 2006.229.10:53:01.04#ibcon#enter sib2, iclass 27, count 2 2006.229.10:53:01.04#ibcon#flushed, iclass 27, count 2 2006.229.10:53:01.04#ibcon#about to write, iclass 27, count 2 2006.229.10:53:01.04#ibcon#wrote, iclass 27, count 2 2006.229.10:53:01.04#ibcon#about to read 3, iclass 27, count 2 2006.229.10:53:01.06#ibcon#read 3, iclass 27, count 2 2006.229.10:53:01.06#ibcon#about to read 4, iclass 27, count 2 2006.229.10:53:01.06#ibcon#read 4, iclass 27, count 2 2006.229.10:53:01.06#ibcon#about to read 5, iclass 27, count 2 2006.229.10:53:01.06#ibcon#read 5, iclass 27, count 2 2006.229.10:53:01.06#ibcon#about to read 6, iclass 27, count 2 2006.229.10:53:01.06#ibcon#read 6, iclass 27, count 2 2006.229.10:53:01.06#ibcon#end of sib2, iclass 27, count 2 2006.229.10:53:01.06#ibcon#*mode == 0, iclass 27, count 2 2006.229.10:53:01.06#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.10:53:01.06#ibcon#[25=AT06-04\r\n] 2006.229.10:53:01.06#ibcon#*before write, iclass 27, count 2 2006.229.10:53:01.06#ibcon#enter sib2, iclass 27, count 2 2006.229.10:53:01.06#ibcon#flushed, iclass 27, count 2 2006.229.10:53:01.06#ibcon#about to write, iclass 27, count 2 2006.229.10:53:01.06#ibcon#wrote, iclass 27, count 2 2006.229.10:53:01.06#ibcon#about to read 3, iclass 27, count 2 2006.229.10:53:01.09#ibcon#read 3, iclass 27, count 2 2006.229.10:53:01.09#ibcon#about to read 4, iclass 27, count 2 2006.229.10:53:01.09#ibcon#read 4, iclass 27, count 2 2006.229.10:53:01.09#ibcon#about to read 5, iclass 27, count 2 2006.229.10:53:01.09#ibcon#read 5, iclass 27, count 2 2006.229.10:53:01.09#ibcon#about to read 6, iclass 27, count 2 2006.229.10:53:01.09#ibcon#read 6, iclass 27, count 2 2006.229.10:53:01.09#ibcon#end of sib2, iclass 27, count 2 2006.229.10:53:01.09#ibcon#*after write, iclass 27, count 2 2006.229.10:53:01.09#ibcon#*before return 0, iclass 27, count 2 2006.229.10:53:01.09#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:01.09#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:01.09#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.10:53:01.09#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:01.09#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:01.21#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:01.21#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:01.21#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:53:01.21#ibcon#first serial, iclass 27, count 0 2006.229.10:53:01.21#ibcon#enter sib2, iclass 27, count 0 2006.229.10:53:01.21#ibcon#flushed, iclass 27, count 0 2006.229.10:53:01.21#ibcon#about to write, iclass 27, count 0 2006.229.10:53:01.21#ibcon#wrote, iclass 27, count 0 2006.229.10:53:01.21#ibcon#about to read 3, iclass 27, count 0 2006.229.10:53:01.23#ibcon#read 3, iclass 27, count 0 2006.229.10:53:01.23#ibcon#about to read 4, iclass 27, count 0 2006.229.10:53:01.23#ibcon#read 4, iclass 27, count 0 2006.229.10:53:01.23#ibcon#about to read 5, iclass 27, count 0 2006.229.10:53:01.23#ibcon#read 5, iclass 27, count 0 2006.229.10:53:01.23#ibcon#about to read 6, iclass 27, count 0 2006.229.10:53:01.23#ibcon#read 6, iclass 27, count 0 2006.229.10:53:01.23#ibcon#end of sib2, iclass 27, count 0 2006.229.10:53:01.23#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:53:01.23#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:53:01.23#ibcon#[25=USB\r\n] 2006.229.10:53:01.23#ibcon#*before write, iclass 27, count 0 2006.229.10:53:01.23#ibcon#enter sib2, iclass 27, count 0 2006.229.10:53:01.23#ibcon#flushed, iclass 27, count 0 2006.229.10:53:01.23#ibcon#about to write, iclass 27, count 0 2006.229.10:53:01.23#ibcon#wrote, iclass 27, count 0 2006.229.10:53:01.23#ibcon#about to read 3, iclass 27, count 0 2006.229.10:53:01.26#ibcon#read 3, iclass 27, count 0 2006.229.10:53:01.26#ibcon#about to read 4, iclass 27, count 0 2006.229.10:53:01.26#ibcon#read 4, iclass 27, count 0 2006.229.10:53:01.26#ibcon#about to read 5, iclass 27, count 0 2006.229.10:53:01.26#ibcon#read 5, iclass 27, count 0 2006.229.10:53:01.26#ibcon#about to read 6, iclass 27, count 0 2006.229.10:53:01.26#ibcon#read 6, iclass 27, count 0 2006.229.10:53:01.26#ibcon#end of sib2, iclass 27, count 0 2006.229.10:53:01.26#ibcon#*after write, iclass 27, count 0 2006.229.10:53:01.26#ibcon#*before return 0, iclass 27, count 0 2006.229.10:53:01.26#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:01.26#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:01.26#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:53:01.26#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:53:01.26$vck44/valo=7,864.99 2006.229.10:53:01.26#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.10:53:01.26#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.10:53:01.26#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:01.26#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:01.26#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:01.26#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:01.26#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:53:01.26#ibcon#first serial, iclass 29, count 0 2006.229.10:53:01.26#ibcon#enter sib2, iclass 29, count 0 2006.229.10:53:01.26#ibcon#flushed, iclass 29, count 0 2006.229.10:53:01.26#ibcon#about to write, iclass 29, count 0 2006.229.10:53:01.26#ibcon#wrote, iclass 29, count 0 2006.229.10:53:01.26#ibcon#about to read 3, iclass 29, count 0 2006.229.10:53:01.28#ibcon#read 3, iclass 29, count 0 2006.229.10:53:01.28#ibcon#about to read 4, iclass 29, count 0 2006.229.10:53:01.28#ibcon#read 4, iclass 29, count 0 2006.229.10:53:01.28#ibcon#about to read 5, iclass 29, count 0 2006.229.10:53:01.28#ibcon#read 5, iclass 29, count 0 2006.229.10:53:01.28#ibcon#about to read 6, iclass 29, count 0 2006.229.10:53:01.28#ibcon#read 6, iclass 29, count 0 2006.229.10:53:01.28#ibcon#end of sib2, iclass 29, count 0 2006.229.10:53:01.28#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:53:01.28#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:53:01.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:53:01.28#ibcon#*before write, iclass 29, count 0 2006.229.10:53:01.28#ibcon#enter sib2, iclass 29, count 0 2006.229.10:53:01.28#ibcon#flushed, iclass 29, count 0 2006.229.10:53:01.28#ibcon#about to write, iclass 29, count 0 2006.229.10:53:01.28#ibcon#wrote, iclass 29, count 0 2006.229.10:53:01.28#ibcon#about to read 3, iclass 29, count 0 2006.229.10:53:01.32#ibcon#read 3, iclass 29, count 0 2006.229.10:53:01.32#ibcon#about to read 4, iclass 29, count 0 2006.229.10:53:01.32#ibcon#read 4, iclass 29, count 0 2006.229.10:53:01.32#ibcon#about to read 5, iclass 29, count 0 2006.229.10:53:01.32#ibcon#read 5, iclass 29, count 0 2006.229.10:53:01.32#ibcon#about to read 6, iclass 29, count 0 2006.229.10:53:01.32#ibcon#read 6, iclass 29, count 0 2006.229.10:53:01.32#ibcon#end of sib2, iclass 29, count 0 2006.229.10:53:01.32#ibcon#*after write, iclass 29, count 0 2006.229.10:53:01.32#ibcon#*before return 0, iclass 29, count 0 2006.229.10:53:01.32#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:01.32#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:01.32#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:53:01.32#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:53:01.32$vck44/va=7,5 2006.229.10:53:01.32#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.10:53:01.32#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.10:53:01.32#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:01.32#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:01.38#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:01.38#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:01.38#ibcon#enter wrdev, iclass 31, count 2 2006.229.10:53:01.38#ibcon#first serial, iclass 31, count 2 2006.229.10:53:01.38#ibcon#enter sib2, iclass 31, count 2 2006.229.10:53:01.38#ibcon#flushed, iclass 31, count 2 2006.229.10:53:01.38#ibcon#about to write, iclass 31, count 2 2006.229.10:53:01.38#ibcon#wrote, iclass 31, count 2 2006.229.10:53:01.38#ibcon#about to read 3, iclass 31, count 2 2006.229.10:53:01.40#ibcon#read 3, iclass 31, count 2 2006.229.10:53:01.40#ibcon#about to read 4, iclass 31, count 2 2006.229.10:53:01.40#ibcon#read 4, iclass 31, count 2 2006.229.10:53:01.40#ibcon#about to read 5, iclass 31, count 2 2006.229.10:53:01.40#ibcon#read 5, iclass 31, count 2 2006.229.10:53:01.40#ibcon#about to read 6, iclass 31, count 2 2006.229.10:53:01.40#ibcon#read 6, iclass 31, count 2 2006.229.10:53:01.40#ibcon#end of sib2, iclass 31, count 2 2006.229.10:53:01.40#ibcon#*mode == 0, iclass 31, count 2 2006.229.10:53:01.40#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.10:53:01.40#ibcon#[25=AT07-05\r\n] 2006.229.10:53:01.40#ibcon#*before write, iclass 31, count 2 2006.229.10:53:01.40#ibcon#enter sib2, iclass 31, count 2 2006.229.10:53:01.40#ibcon#flushed, iclass 31, count 2 2006.229.10:53:01.40#ibcon#about to write, iclass 31, count 2 2006.229.10:53:01.40#ibcon#wrote, iclass 31, count 2 2006.229.10:53:01.40#ibcon#about to read 3, iclass 31, count 2 2006.229.10:53:01.43#ibcon#read 3, iclass 31, count 2 2006.229.10:53:01.43#ibcon#about to read 4, iclass 31, count 2 2006.229.10:53:01.43#ibcon#read 4, iclass 31, count 2 2006.229.10:53:01.43#ibcon#about to read 5, iclass 31, count 2 2006.229.10:53:01.43#ibcon#read 5, iclass 31, count 2 2006.229.10:53:01.43#ibcon#about to read 6, iclass 31, count 2 2006.229.10:53:01.43#ibcon#read 6, iclass 31, count 2 2006.229.10:53:01.43#ibcon#end of sib2, iclass 31, count 2 2006.229.10:53:01.43#ibcon#*after write, iclass 31, count 2 2006.229.10:53:01.43#ibcon#*before return 0, iclass 31, count 2 2006.229.10:53:01.43#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:01.43#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:01.43#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.10:53:01.43#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:01.43#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:01.55#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:01.55#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:01.55#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:53:01.55#ibcon#first serial, iclass 31, count 0 2006.229.10:53:01.55#ibcon#enter sib2, iclass 31, count 0 2006.229.10:53:01.55#ibcon#flushed, iclass 31, count 0 2006.229.10:53:01.55#ibcon#about to write, iclass 31, count 0 2006.229.10:53:01.55#ibcon#wrote, iclass 31, count 0 2006.229.10:53:01.55#ibcon#about to read 3, iclass 31, count 0 2006.229.10:53:01.57#ibcon#read 3, iclass 31, count 0 2006.229.10:53:01.57#ibcon#about to read 4, iclass 31, count 0 2006.229.10:53:01.57#ibcon#read 4, iclass 31, count 0 2006.229.10:53:01.57#ibcon#about to read 5, iclass 31, count 0 2006.229.10:53:01.57#ibcon#read 5, iclass 31, count 0 2006.229.10:53:01.57#ibcon#about to read 6, iclass 31, count 0 2006.229.10:53:01.57#ibcon#read 6, iclass 31, count 0 2006.229.10:53:01.57#ibcon#end of sib2, iclass 31, count 0 2006.229.10:53:01.57#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:53:01.57#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:53:01.57#ibcon#[25=USB\r\n] 2006.229.10:53:01.57#ibcon#*before write, iclass 31, count 0 2006.229.10:53:01.57#ibcon#enter sib2, iclass 31, count 0 2006.229.10:53:01.57#ibcon#flushed, iclass 31, count 0 2006.229.10:53:01.57#ibcon#about to write, iclass 31, count 0 2006.229.10:53:01.57#ibcon#wrote, iclass 31, count 0 2006.229.10:53:01.57#ibcon#about to read 3, iclass 31, count 0 2006.229.10:53:01.60#ibcon#read 3, iclass 31, count 0 2006.229.10:53:01.60#ibcon#about to read 4, iclass 31, count 0 2006.229.10:53:01.60#ibcon#read 4, iclass 31, count 0 2006.229.10:53:01.60#ibcon#about to read 5, iclass 31, count 0 2006.229.10:53:01.60#ibcon#read 5, iclass 31, count 0 2006.229.10:53:01.60#ibcon#about to read 6, iclass 31, count 0 2006.229.10:53:01.60#ibcon#read 6, iclass 31, count 0 2006.229.10:53:01.60#ibcon#end of sib2, iclass 31, count 0 2006.229.10:53:01.60#ibcon#*after write, iclass 31, count 0 2006.229.10:53:01.60#ibcon#*before return 0, iclass 31, count 0 2006.229.10:53:01.60#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:01.60#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:01.60#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:53:01.60#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:53:01.60$vck44/valo=8,884.99 2006.229.10:53:01.60#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.10:53:01.60#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.10:53:01.60#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:01.60#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:01.60#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:01.60#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:01.60#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:53:01.60#ibcon#first serial, iclass 33, count 0 2006.229.10:53:01.60#ibcon#enter sib2, iclass 33, count 0 2006.229.10:53:01.60#ibcon#flushed, iclass 33, count 0 2006.229.10:53:01.60#ibcon#about to write, iclass 33, count 0 2006.229.10:53:01.60#ibcon#wrote, iclass 33, count 0 2006.229.10:53:01.60#ibcon#about to read 3, iclass 33, count 0 2006.229.10:53:01.62#ibcon#read 3, iclass 33, count 0 2006.229.10:53:01.62#ibcon#about to read 4, iclass 33, count 0 2006.229.10:53:01.62#ibcon#read 4, iclass 33, count 0 2006.229.10:53:01.62#ibcon#about to read 5, iclass 33, count 0 2006.229.10:53:01.62#ibcon#read 5, iclass 33, count 0 2006.229.10:53:01.62#ibcon#about to read 6, iclass 33, count 0 2006.229.10:53:01.62#ibcon#read 6, iclass 33, count 0 2006.229.10:53:01.62#ibcon#end of sib2, iclass 33, count 0 2006.229.10:53:01.62#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:53:01.62#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:53:01.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:53:01.62#ibcon#*before write, iclass 33, count 0 2006.229.10:53:01.62#ibcon#enter sib2, iclass 33, count 0 2006.229.10:53:01.62#ibcon#flushed, iclass 33, count 0 2006.229.10:53:01.62#ibcon#about to write, iclass 33, count 0 2006.229.10:53:01.62#ibcon#wrote, iclass 33, count 0 2006.229.10:53:01.62#ibcon#about to read 3, iclass 33, count 0 2006.229.10:53:01.66#ibcon#read 3, iclass 33, count 0 2006.229.10:53:01.66#ibcon#about to read 4, iclass 33, count 0 2006.229.10:53:01.66#ibcon#read 4, iclass 33, count 0 2006.229.10:53:01.66#ibcon#about to read 5, iclass 33, count 0 2006.229.10:53:01.66#ibcon#read 5, iclass 33, count 0 2006.229.10:53:01.66#ibcon#about to read 6, iclass 33, count 0 2006.229.10:53:01.66#ibcon#read 6, iclass 33, count 0 2006.229.10:53:01.66#ibcon#end of sib2, iclass 33, count 0 2006.229.10:53:01.66#ibcon#*after write, iclass 33, count 0 2006.229.10:53:01.66#ibcon#*before return 0, iclass 33, count 0 2006.229.10:53:01.66#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:01.66#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:01.66#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:53:01.66#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:53:01.66$vck44/va=8,6 2006.229.10:53:01.66#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.10:53:01.66#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.10:53:01.66#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:01.66#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:53:01.72#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:53:01.72#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:53:01.72#ibcon#enter wrdev, iclass 35, count 2 2006.229.10:53:01.72#ibcon#first serial, iclass 35, count 2 2006.229.10:53:01.72#ibcon#enter sib2, iclass 35, count 2 2006.229.10:53:01.72#ibcon#flushed, iclass 35, count 2 2006.229.10:53:01.72#ibcon#about to write, iclass 35, count 2 2006.229.10:53:01.72#ibcon#wrote, iclass 35, count 2 2006.229.10:53:01.72#ibcon#about to read 3, iclass 35, count 2 2006.229.10:53:01.74#ibcon#read 3, iclass 35, count 2 2006.229.10:53:01.74#ibcon#about to read 4, iclass 35, count 2 2006.229.10:53:01.74#ibcon#read 4, iclass 35, count 2 2006.229.10:53:01.74#ibcon#about to read 5, iclass 35, count 2 2006.229.10:53:01.74#ibcon#read 5, iclass 35, count 2 2006.229.10:53:01.74#ibcon#about to read 6, iclass 35, count 2 2006.229.10:53:01.74#ibcon#read 6, iclass 35, count 2 2006.229.10:53:01.74#ibcon#end of sib2, iclass 35, count 2 2006.229.10:53:01.74#ibcon#*mode == 0, iclass 35, count 2 2006.229.10:53:01.74#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.10:53:01.74#ibcon#[25=AT08-06\r\n] 2006.229.10:53:01.74#ibcon#*before write, iclass 35, count 2 2006.229.10:53:01.74#ibcon#enter sib2, iclass 35, count 2 2006.229.10:53:01.74#ibcon#flushed, iclass 35, count 2 2006.229.10:53:01.74#ibcon#about to write, iclass 35, count 2 2006.229.10:53:01.74#ibcon#wrote, iclass 35, count 2 2006.229.10:53:01.74#ibcon#about to read 3, iclass 35, count 2 2006.229.10:53:01.77#ibcon#read 3, iclass 35, count 2 2006.229.10:53:01.77#ibcon#about to read 4, iclass 35, count 2 2006.229.10:53:01.77#ibcon#read 4, iclass 35, count 2 2006.229.10:53:01.77#ibcon#about to read 5, iclass 35, count 2 2006.229.10:53:01.77#ibcon#read 5, iclass 35, count 2 2006.229.10:53:01.77#ibcon#about to read 6, iclass 35, count 2 2006.229.10:53:01.77#ibcon#read 6, iclass 35, count 2 2006.229.10:53:01.77#ibcon#end of sib2, iclass 35, count 2 2006.229.10:53:01.77#ibcon#*after write, iclass 35, count 2 2006.229.10:53:01.77#ibcon#*before return 0, iclass 35, count 2 2006.229.10:53:01.77#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:53:01.77#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.10:53:01.77#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.10:53:01.77#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:01.77#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:53:01.89#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:53:01.89#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:53:01.89#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:53:01.89#ibcon#first serial, iclass 35, count 0 2006.229.10:53:01.89#ibcon#enter sib2, iclass 35, count 0 2006.229.10:53:01.89#ibcon#flushed, iclass 35, count 0 2006.229.10:53:01.89#ibcon#about to write, iclass 35, count 0 2006.229.10:53:01.89#ibcon#wrote, iclass 35, count 0 2006.229.10:53:01.89#ibcon#about to read 3, iclass 35, count 0 2006.229.10:53:01.91#ibcon#read 3, iclass 35, count 0 2006.229.10:53:01.91#ibcon#about to read 4, iclass 35, count 0 2006.229.10:53:01.91#ibcon#read 4, iclass 35, count 0 2006.229.10:53:01.91#ibcon#about to read 5, iclass 35, count 0 2006.229.10:53:01.91#ibcon#read 5, iclass 35, count 0 2006.229.10:53:01.91#ibcon#about to read 6, iclass 35, count 0 2006.229.10:53:01.91#ibcon#read 6, iclass 35, count 0 2006.229.10:53:01.91#ibcon#end of sib2, iclass 35, count 0 2006.229.10:53:01.91#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:53:01.91#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:53:01.91#ibcon#[25=USB\r\n] 2006.229.10:53:01.91#ibcon#*before write, iclass 35, count 0 2006.229.10:53:01.91#ibcon#enter sib2, iclass 35, count 0 2006.229.10:53:01.91#ibcon#flushed, iclass 35, count 0 2006.229.10:53:01.91#ibcon#about to write, iclass 35, count 0 2006.229.10:53:01.91#ibcon#wrote, iclass 35, count 0 2006.229.10:53:01.91#ibcon#about to read 3, iclass 35, count 0 2006.229.10:53:01.94#ibcon#read 3, iclass 35, count 0 2006.229.10:53:01.94#ibcon#about to read 4, iclass 35, count 0 2006.229.10:53:01.94#ibcon#read 4, iclass 35, count 0 2006.229.10:53:01.94#ibcon#about to read 5, iclass 35, count 0 2006.229.10:53:01.94#ibcon#read 5, iclass 35, count 0 2006.229.10:53:01.94#ibcon#about to read 6, iclass 35, count 0 2006.229.10:53:01.94#ibcon#read 6, iclass 35, count 0 2006.229.10:53:01.94#ibcon#end of sib2, iclass 35, count 0 2006.229.10:53:01.94#ibcon#*after write, iclass 35, count 0 2006.229.10:53:01.94#ibcon#*before return 0, iclass 35, count 0 2006.229.10:53:01.94#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:53:01.94#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.10:53:01.94#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:53:01.94#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:53:01.94$vck44/vblo=1,629.99 2006.229.10:53:01.94#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.10:53:01.94#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.10:53:01.94#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:01.94#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:53:01.94#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:53:01.94#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:53:01.94#ibcon#enter wrdev, iclass 37, count 0 2006.229.10:53:01.94#ibcon#first serial, iclass 37, count 0 2006.229.10:53:01.94#ibcon#enter sib2, iclass 37, count 0 2006.229.10:53:01.94#ibcon#flushed, iclass 37, count 0 2006.229.10:53:01.94#ibcon#about to write, iclass 37, count 0 2006.229.10:53:01.94#ibcon#wrote, iclass 37, count 0 2006.229.10:53:01.94#ibcon#about to read 3, iclass 37, count 0 2006.229.10:53:01.96#ibcon#read 3, iclass 37, count 0 2006.229.10:53:01.96#ibcon#about to read 4, iclass 37, count 0 2006.229.10:53:01.96#ibcon#read 4, iclass 37, count 0 2006.229.10:53:01.96#ibcon#about to read 5, iclass 37, count 0 2006.229.10:53:01.96#ibcon#read 5, iclass 37, count 0 2006.229.10:53:01.96#ibcon#about to read 6, iclass 37, count 0 2006.229.10:53:01.96#ibcon#read 6, iclass 37, count 0 2006.229.10:53:01.96#ibcon#end of sib2, iclass 37, count 0 2006.229.10:53:01.96#ibcon#*mode == 0, iclass 37, count 0 2006.229.10:53:01.96#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.10:53:01.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:53:01.96#ibcon#*before write, iclass 37, count 0 2006.229.10:53:01.96#ibcon#enter sib2, iclass 37, count 0 2006.229.10:53:01.96#ibcon#flushed, iclass 37, count 0 2006.229.10:53:01.96#ibcon#about to write, iclass 37, count 0 2006.229.10:53:01.96#ibcon#wrote, iclass 37, count 0 2006.229.10:53:01.96#ibcon#about to read 3, iclass 37, count 0 2006.229.10:53:02.01#ibcon#read 3, iclass 37, count 0 2006.229.10:53:02.01#ibcon#about to read 4, iclass 37, count 0 2006.229.10:53:02.01#ibcon#read 4, iclass 37, count 0 2006.229.10:53:02.01#ibcon#about to read 5, iclass 37, count 0 2006.229.10:53:02.01#ibcon#read 5, iclass 37, count 0 2006.229.10:53:02.01#ibcon#about to read 6, iclass 37, count 0 2006.229.10:53:02.01#ibcon#read 6, iclass 37, count 0 2006.229.10:53:02.01#ibcon#end of sib2, iclass 37, count 0 2006.229.10:53:02.01#ibcon#*after write, iclass 37, count 0 2006.229.10:53:02.01#ibcon#*before return 0, iclass 37, count 0 2006.229.10:53:02.01#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:53:02.01#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.10:53:02.01#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.10:53:02.01#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.10:53:02.01$vck44/vb=1,4 2006.229.10:53:02.01#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.10:53:02.01#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.10:53:02.01#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:02.01#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:53:02.01#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:53:02.01#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:53:02.01#ibcon#enter wrdev, iclass 39, count 2 2006.229.10:53:02.01#ibcon#first serial, iclass 39, count 2 2006.229.10:53:02.01#ibcon#enter sib2, iclass 39, count 2 2006.229.10:53:02.01#ibcon#flushed, iclass 39, count 2 2006.229.10:53:02.01#ibcon#about to write, iclass 39, count 2 2006.229.10:53:02.01#ibcon#wrote, iclass 39, count 2 2006.229.10:53:02.01#ibcon#about to read 3, iclass 39, count 2 2006.229.10:53:02.03#ibcon#read 3, iclass 39, count 2 2006.229.10:53:02.03#ibcon#about to read 4, iclass 39, count 2 2006.229.10:53:02.03#ibcon#read 4, iclass 39, count 2 2006.229.10:53:02.03#ibcon#about to read 5, iclass 39, count 2 2006.229.10:53:02.03#ibcon#read 5, iclass 39, count 2 2006.229.10:53:02.03#ibcon#about to read 6, iclass 39, count 2 2006.229.10:53:02.03#ibcon#read 6, iclass 39, count 2 2006.229.10:53:02.03#ibcon#end of sib2, iclass 39, count 2 2006.229.10:53:02.03#ibcon#*mode == 0, iclass 39, count 2 2006.229.10:53:02.03#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.10:53:02.03#ibcon#[27=AT01-04\r\n] 2006.229.10:53:02.03#ibcon#*before write, iclass 39, count 2 2006.229.10:53:02.03#ibcon#enter sib2, iclass 39, count 2 2006.229.10:53:02.03#ibcon#flushed, iclass 39, count 2 2006.229.10:53:02.03#ibcon#about to write, iclass 39, count 2 2006.229.10:53:02.03#ibcon#wrote, iclass 39, count 2 2006.229.10:53:02.03#ibcon#about to read 3, iclass 39, count 2 2006.229.10:53:02.06#ibcon#read 3, iclass 39, count 2 2006.229.10:53:02.06#ibcon#about to read 4, iclass 39, count 2 2006.229.10:53:02.06#ibcon#read 4, iclass 39, count 2 2006.229.10:53:02.06#ibcon#about to read 5, iclass 39, count 2 2006.229.10:53:02.06#ibcon#read 5, iclass 39, count 2 2006.229.10:53:02.06#ibcon#about to read 6, iclass 39, count 2 2006.229.10:53:02.06#ibcon#read 6, iclass 39, count 2 2006.229.10:53:02.06#ibcon#end of sib2, iclass 39, count 2 2006.229.10:53:02.06#ibcon#*after write, iclass 39, count 2 2006.229.10:53:02.06#ibcon#*before return 0, iclass 39, count 2 2006.229.10:53:02.06#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:53:02.06#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.10:53:02.06#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.10:53:02.06#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:02.06#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:53:02.18#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:53:02.18#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:53:02.18#ibcon#enter wrdev, iclass 39, count 0 2006.229.10:53:02.18#ibcon#first serial, iclass 39, count 0 2006.229.10:53:02.18#ibcon#enter sib2, iclass 39, count 0 2006.229.10:53:02.18#ibcon#flushed, iclass 39, count 0 2006.229.10:53:02.18#ibcon#about to write, iclass 39, count 0 2006.229.10:53:02.18#ibcon#wrote, iclass 39, count 0 2006.229.10:53:02.18#ibcon#about to read 3, iclass 39, count 0 2006.229.10:53:02.20#ibcon#read 3, iclass 39, count 0 2006.229.10:53:02.20#ibcon#about to read 4, iclass 39, count 0 2006.229.10:53:02.20#ibcon#read 4, iclass 39, count 0 2006.229.10:53:02.20#ibcon#about to read 5, iclass 39, count 0 2006.229.10:53:02.20#ibcon#read 5, iclass 39, count 0 2006.229.10:53:02.20#ibcon#about to read 6, iclass 39, count 0 2006.229.10:53:02.20#ibcon#read 6, iclass 39, count 0 2006.229.10:53:02.20#ibcon#end of sib2, iclass 39, count 0 2006.229.10:53:02.20#ibcon#*mode == 0, iclass 39, count 0 2006.229.10:53:02.20#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.10:53:02.20#ibcon#[27=USB\r\n] 2006.229.10:53:02.20#ibcon#*before write, iclass 39, count 0 2006.229.10:53:02.20#ibcon#enter sib2, iclass 39, count 0 2006.229.10:53:02.20#ibcon#flushed, iclass 39, count 0 2006.229.10:53:02.20#ibcon#about to write, iclass 39, count 0 2006.229.10:53:02.20#ibcon#wrote, iclass 39, count 0 2006.229.10:53:02.20#ibcon#about to read 3, iclass 39, count 0 2006.229.10:53:02.23#ibcon#read 3, iclass 39, count 0 2006.229.10:53:02.23#ibcon#about to read 4, iclass 39, count 0 2006.229.10:53:02.23#ibcon#read 4, iclass 39, count 0 2006.229.10:53:02.23#ibcon#about to read 5, iclass 39, count 0 2006.229.10:53:02.23#ibcon#read 5, iclass 39, count 0 2006.229.10:53:02.23#ibcon#about to read 6, iclass 39, count 0 2006.229.10:53:02.23#ibcon#read 6, iclass 39, count 0 2006.229.10:53:02.23#ibcon#end of sib2, iclass 39, count 0 2006.229.10:53:02.23#ibcon#*after write, iclass 39, count 0 2006.229.10:53:02.23#ibcon#*before return 0, iclass 39, count 0 2006.229.10:53:02.23#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:53:02.23#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.10:53:02.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.10:53:02.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.10:53:02.23$vck44/vblo=2,634.99 2006.229.10:53:02.23#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.10:53:02.23#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.10:53:02.23#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:02.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:53:02.23#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:53:02.23#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:53:02.23#ibcon#enter wrdev, iclass 3, count 0 2006.229.10:53:02.23#ibcon#first serial, iclass 3, count 0 2006.229.10:53:02.23#ibcon#enter sib2, iclass 3, count 0 2006.229.10:53:02.23#ibcon#flushed, iclass 3, count 0 2006.229.10:53:02.23#ibcon#about to write, iclass 3, count 0 2006.229.10:53:02.23#ibcon#wrote, iclass 3, count 0 2006.229.10:53:02.23#ibcon#about to read 3, iclass 3, count 0 2006.229.10:53:02.25#ibcon#read 3, iclass 3, count 0 2006.229.10:53:02.25#ibcon#about to read 4, iclass 3, count 0 2006.229.10:53:02.25#ibcon#read 4, iclass 3, count 0 2006.229.10:53:02.25#ibcon#about to read 5, iclass 3, count 0 2006.229.10:53:02.25#ibcon#read 5, iclass 3, count 0 2006.229.10:53:02.25#ibcon#about to read 6, iclass 3, count 0 2006.229.10:53:02.25#ibcon#read 6, iclass 3, count 0 2006.229.10:53:02.25#ibcon#end of sib2, iclass 3, count 0 2006.229.10:53:02.25#ibcon#*mode == 0, iclass 3, count 0 2006.229.10:53:02.25#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.10:53:02.25#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:53:02.25#ibcon#*before write, iclass 3, count 0 2006.229.10:53:02.25#ibcon#enter sib2, iclass 3, count 0 2006.229.10:53:02.25#ibcon#flushed, iclass 3, count 0 2006.229.10:53:02.25#ibcon#about to write, iclass 3, count 0 2006.229.10:53:02.25#ibcon#wrote, iclass 3, count 0 2006.229.10:53:02.25#ibcon#about to read 3, iclass 3, count 0 2006.229.10:53:02.29#ibcon#read 3, iclass 3, count 0 2006.229.10:53:02.29#ibcon#about to read 4, iclass 3, count 0 2006.229.10:53:02.29#ibcon#read 4, iclass 3, count 0 2006.229.10:53:02.29#ibcon#about to read 5, iclass 3, count 0 2006.229.10:53:02.29#ibcon#read 5, iclass 3, count 0 2006.229.10:53:02.29#ibcon#about to read 6, iclass 3, count 0 2006.229.10:53:02.29#ibcon#read 6, iclass 3, count 0 2006.229.10:53:02.29#ibcon#end of sib2, iclass 3, count 0 2006.229.10:53:02.29#ibcon#*after write, iclass 3, count 0 2006.229.10:53:02.29#ibcon#*before return 0, iclass 3, count 0 2006.229.10:53:02.29#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:53:02.29#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.10:53:02.29#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.10:53:02.29#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.10:53:02.29$vck44/vb=2,4 2006.229.10:53:02.29#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.10:53:02.29#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.10:53:02.29#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:02.29#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:53:02.35#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:53:02.35#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:53:02.35#ibcon#enter wrdev, iclass 5, count 2 2006.229.10:53:02.35#ibcon#first serial, iclass 5, count 2 2006.229.10:53:02.35#ibcon#enter sib2, iclass 5, count 2 2006.229.10:53:02.35#ibcon#flushed, iclass 5, count 2 2006.229.10:53:02.35#ibcon#about to write, iclass 5, count 2 2006.229.10:53:02.35#ibcon#wrote, iclass 5, count 2 2006.229.10:53:02.35#ibcon#about to read 3, iclass 5, count 2 2006.229.10:53:02.37#ibcon#read 3, iclass 5, count 2 2006.229.10:53:02.37#ibcon#about to read 4, iclass 5, count 2 2006.229.10:53:02.37#ibcon#read 4, iclass 5, count 2 2006.229.10:53:02.37#ibcon#about to read 5, iclass 5, count 2 2006.229.10:53:02.37#ibcon#read 5, iclass 5, count 2 2006.229.10:53:02.37#ibcon#about to read 6, iclass 5, count 2 2006.229.10:53:02.37#ibcon#read 6, iclass 5, count 2 2006.229.10:53:02.37#ibcon#end of sib2, iclass 5, count 2 2006.229.10:53:02.37#ibcon#*mode == 0, iclass 5, count 2 2006.229.10:53:02.37#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.10:53:02.37#ibcon#[27=AT02-04\r\n] 2006.229.10:53:02.37#ibcon#*before write, iclass 5, count 2 2006.229.10:53:02.37#ibcon#enter sib2, iclass 5, count 2 2006.229.10:53:02.37#ibcon#flushed, iclass 5, count 2 2006.229.10:53:02.37#ibcon#about to write, iclass 5, count 2 2006.229.10:53:02.37#ibcon#wrote, iclass 5, count 2 2006.229.10:53:02.37#ibcon#about to read 3, iclass 5, count 2 2006.229.10:53:02.40#ibcon#read 3, iclass 5, count 2 2006.229.10:53:02.40#ibcon#about to read 4, iclass 5, count 2 2006.229.10:53:02.40#ibcon#read 4, iclass 5, count 2 2006.229.10:53:02.40#ibcon#about to read 5, iclass 5, count 2 2006.229.10:53:02.40#ibcon#read 5, iclass 5, count 2 2006.229.10:53:02.40#ibcon#about to read 6, iclass 5, count 2 2006.229.10:53:02.40#ibcon#read 6, iclass 5, count 2 2006.229.10:53:02.40#ibcon#end of sib2, iclass 5, count 2 2006.229.10:53:02.40#ibcon#*after write, iclass 5, count 2 2006.229.10:53:02.40#ibcon#*before return 0, iclass 5, count 2 2006.229.10:53:02.40#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:53:02.40#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.10:53:02.40#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.10:53:02.40#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:02.40#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:53:02.52#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:53:02.52#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:53:02.52#ibcon#enter wrdev, iclass 5, count 0 2006.229.10:53:02.52#ibcon#first serial, iclass 5, count 0 2006.229.10:53:02.52#ibcon#enter sib2, iclass 5, count 0 2006.229.10:53:02.52#ibcon#flushed, iclass 5, count 0 2006.229.10:53:02.52#ibcon#about to write, iclass 5, count 0 2006.229.10:53:02.52#ibcon#wrote, iclass 5, count 0 2006.229.10:53:02.52#ibcon#about to read 3, iclass 5, count 0 2006.229.10:53:02.54#ibcon#read 3, iclass 5, count 0 2006.229.10:53:02.54#ibcon#about to read 4, iclass 5, count 0 2006.229.10:53:02.54#ibcon#read 4, iclass 5, count 0 2006.229.10:53:02.54#ibcon#about to read 5, iclass 5, count 0 2006.229.10:53:02.54#ibcon#read 5, iclass 5, count 0 2006.229.10:53:02.54#ibcon#about to read 6, iclass 5, count 0 2006.229.10:53:02.54#ibcon#read 6, iclass 5, count 0 2006.229.10:53:02.54#ibcon#end of sib2, iclass 5, count 0 2006.229.10:53:02.54#ibcon#*mode == 0, iclass 5, count 0 2006.229.10:53:02.54#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.10:53:02.54#ibcon#[27=USB\r\n] 2006.229.10:53:02.54#ibcon#*before write, iclass 5, count 0 2006.229.10:53:02.54#ibcon#enter sib2, iclass 5, count 0 2006.229.10:53:02.54#ibcon#flushed, iclass 5, count 0 2006.229.10:53:02.54#ibcon#about to write, iclass 5, count 0 2006.229.10:53:02.54#ibcon#wrote, iclass 5, count 0 2006.229.10:53:02.54#ibcon#about to read 3, iclass 5, count 0 2006.229.10:53:02.57#ibcon#read 3, iclass 5, count 0 2006.229.10:53:02.57#ibcon#about to read 4, iclass 5, count 0 2006.229.10:53:02.57#ibcon#read 4, iclass 5, count 0 2006.229.10:53:02.57#ibcon#about to read 5, iclass 5, count 0 2006.229.10:53:02.57#ibcon#read 5, iclass 5, count 0 2006.229.10:53:02.57#ibcon#about to read 6, iclass 5, count 0 2006.229.10:53:02.57#ibcon#read 6, iclass 5, count 0 2006.229.10:53:02.57#ibcon#end of sib2, iclass 5, count 0 2006.229.10:53:02.57#ibcon#*after write, iclass 5, count 0 2006.229.10:53:02.57#ibcon#*before return 0, iclass 5, count 0 2006.229.10:53:02.57#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:53:02.57#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.10:53:02.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.10:53:02.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.10:53:02.57$vck44/vblo=3,649.99 2006.229.10:53:02.57#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.10:53:02.57#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.10:53:02.57#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:02.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:53:02.57#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:53:02.57#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:53:02.57#ibcon#enter wrdev, iclass 7, count 0 2006.229.10:53:02.57#ibcon#first serial, iclass 7, count 0 2006.229.10:53:02.57#ibcon#enter sib2, iclass 7, count 0 2006.229.10:53:02.57#ibcon#flushed, iclass 7, count 0 2006.229.10:53:02.57#ibcon#about to write, iclass 7, count 0 2006.229.10:53:02.57#ibcon#wrote, iclass 7, count 0 2006.229.10:53:02.57#ibcon#about to read 3, iclass 7, count 0 2006.229.10:53:02.59#ibcon#read 3, iclass 7, count 0 2006.229.10:53:02.59#ibcon#about to read 4, iclass 7, count 0 2006.229.10:53:02.59#ibcon#read 4, iclass 7, count 0 2006.229.10:53:02.59#ibcon#about to read 5, iclass 7, count 0 2006.229.10:53:02.59#ibcon#read 5, iclass 7, count 0 2006.229.10:53:02.59#ibcon#about to read 6, iclass 7, count 0 2006.229.10:53:02.59#ibcon#read 6, iclass 7, count 0 2006.229.10:53:02.59#ibcon#end of sib2, iclass 7, count 0 2006.229.10:53:02.59#ibcon#*mode == 0, iclass 7, count 0 2006.229.10:53:02.59#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.10:53:02.59#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:53:02.59#ibcon#*before write, iclass 7, count 0 2006.229.10:53:02.59#ibcon#enter sib2, iclass 7, count 0 2006.229.10:53:02.59#ibcon#flushed, iclass 7, count 0 2006.229.10:53:02.59#ibcon#about to write, iclass 7, count 0 2006.229.10:53:02.59#ibcon#wrote, iclass 7, count 0 2006.229.10:53:02.59#ibcon#about to read 3, iclass 7, count 0 2006.229.10:53:02.63#ibcon#read 3, iclass 7, count 0 2006.229.10:53:02.63#ibcon#about to read 4, iclass 7, count 0 2006.229.10:53:02.63#ibcon#read 4, iclass 7, count 0 2006.229.10:53:02.63#ibcon#about to read 5, iclass 7, count 0 2006.229.10:53:02.63#ibcon#read 5, iclass 7, count 0 2006.229.10:53:02.63#ibcon#about to read 6, iclass 7, count 0 2006.229.10:53:02.63#ibcon#read 6, iclass 7, count 0 2006.229.10:53:02.63#ibcon#end of sib2, iclass 7, count 0 2006.229.10:53:02.63#ibcon#*after write, iclass 7, count 0 2006.229.10:53:02.63#ibcon#*before return 0, iclass 7, count 0 2006.229.10:53:02.63#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:53:02.63#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.10:53:02.63#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.10:53:02.63#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.10:53:02.63$vck44/vb=3,4 2006.229.10:53:02.63#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.10:53:02.63#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.10:53:02.63#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:02.63#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:53:02.69#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:53:02.69#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:53:02.69#ibcon#enter wrdev, iclass 11, count 2 2006.229.10:53:02.69#ibcon#first serial, iclass 11, count 2 2006.229.10:53:02.69#ibcon#enter sib2, iclass 11, count 2 2006.229.10:53:02.69#ibcon#flushed, iclass 11, count 2 2006.229.10:53:02.69#ibcon#about to write, iclass 11, count 2 2006.229.10:53:02.69#ibcon#wrote, iclass 11, count 2 2006.229.10:53:02.69#ibcon#about to read 3, iclass 11, count 2 2006.229.10:53:02.71#ibcon#read 3, iclass 11, count 2 2006.229.10:53:02.71#ibcon#about to read 4, iclass 11, count 2 2006.229.10:53:02.71#ibcon#read 4, iclass 11, count 2 2006.229.10:53:02.71#ibcon#about to read 5, iclass 11, count 2 2006.229.10:53:02.71#ibcon#read 5, iclass 11, count 2 2006.229.10:53:02.71#ibcon#about to read 6, iclass 11, count 2 2006.229.10:53:02.71#ibcon#read 6, iclass 11, count 2 2006.229.10:53:02.71#ibcon#end of sib2, iclass 11, count 2 2006.229.10:53:02.71#ibcon#*mode == 0, iclass 11, count 2 2006.229.10:53:02.71#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.10:53:02.71#ibcon#[27=AT03-04\r\n] 2006.229.10:53:02.71#ibcon#*before write, iclass 11, count 2 2006.229.10:53:02.71#ibcon#enter sib2, iclass 11, count 2 2006.229.10:53:02.71#ibcon#flushed, iclass 11, count 2 2006.229.10:53:02.71#ibcon#about to write, iclass 11, count 2 2006.229.10:53:02.71#ibcon#wrote, iclass 11, count 2 2006.229.10:53:02.71#ibcon#about to read 3, iclass 11, count 2 2006.229.10:53:02.74#ibcon#read 3, iclass 11, count 2 2006.229.10:53:02.74#ibcon#about to read 4, iclass 11, count 2 2006.229.10:53:02.74#ibcon#read 4, iclass 11, count 2 2006.229.10:53:02.74#ibcon#about to read 5, iclass 11, count 2 2006.229.10:53:02.74#ibcon#read 5, iclass 11, count 2 2006.229.10:53:02.74#ibcon#about to read 6, iclass 11, count 2 2006.229.10:53:02.74#ibcon#read 6, iclass 11, count 2 2006.229.10:53:02.74#ibcon#end of sib2, iclass 11, count 2 2006.229.10:53:02.74#ibcon#*after write, iclass 11, count 2 2006.229.10:53:02.74#ibcon#*before return 0, iclass 11, count 2 2006.229.10:53:02.74#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:53:02.74#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.10:53:02.74#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.10:53:02.74#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:02.74#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:53:02.86#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:53:02.86#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:53:02.86#ibcon#enter wrdev, iclass 11, count 0 2006.229.10:53:02.86#ibcon#first serial, iclass 11, count 0 2006.229.10:53:02.86#ibcon#enter sib2, iclass 11, count 0 2006.229.10:53:02.86#ibcon#flushed, iclass 11, count 0 2006.229.10:53:02.86#ibcon#about to write, iclass 11, count 0 2006.229.10:53:02.86#ibcon#wrote, iclass 11, count 0 2006.229.10:53:02.86#ibcon#about to read 3, iclass 11, count 0 2006.229.10:53:02.88#ibcon#read 3, iclass 11, count 0 2006.229.10:53:02.88#ibcon#about to read 4, iclass 11, count 0 2006.229.10:53:02.88#ibcon#read 4, iclass 11, count 0 2006.229.10:53:02.88#ibcon#about to read 5, iclass 11, count 0 2006.229.10:53:02.88#ibcon#read 5, iclass 11, count 0 2006.229.10:53:02.88#ibcon#about to read 6, iclass 11, count 0 2006.229.10:53:02.88#ibcon#read 6, iclass 11, count 0 2006.229.10:53:02.88#ibcon#end of sib2, iclass 11, count 0 2006.229.10:53:02.88#ibcon#*mode == 0, iclass 11, count 0 2006.229.10:53:02.88#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.10:53:02.88#ibcon#[27=USB\r\n] 2006.229.10:53:02.88#ibcon#*before write, iclass 11, count 0 2006.229.10:53:02.88#ibcon#enter sib2, iclass 11, count 0 2006.229.10:53:02.88#ibcon#flushed, iclass 11, count 0 2006.229.10:53:02.88#ibcon#about to write, iclass 11, count 0 2006.229.10:53:02.88#ibcon#wrote, iclass 11, count 0 2006.229.10:53:02.88#ibcon#about to read 3, iclass 11, count 0 2006.229.10:53:02.91#ibcon#read 3, iclass 11, count 0 2006.229.10:53:02.91#ibcon#about to read 4, iclass 11, count 0 2006.229.10:53:02.91#ibcon#read 4, iclass 11, count 0 2006.229.10:53:02.91#ibcon#about to read 5, iclass 11, count 0 2006.229.10:53:02.91#ibcon#read 5, iclass 11, count 0 2006.229.10:53:02.91#ibcon#about to read 6, iclass 11, count 0 2006.229.10:53:02.91#ibcon#read 6, iclass 11, count 0 2006.229.10:53:02.91#ibcon#end of sib2, iclass 11, count 0 2006.229.10:53:02.91#ibcon#*after write, iclass 11, count 0 2006.229.10:53:02.91#ibcon#*before return 0, iclass 11, count 0 2006.229.10:53:02.91#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:53:02.91#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.10:53:02.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.10:53:02.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.10:53:02.91$vck44/vblo=4,679.99 2006.229.10:53:02.91#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.10:53:02.91#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.10:53:02.91#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:02.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:53:02.91#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:53:02.91#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:53:02.91#ibcon#enter wrdev, iclass 13, count 0 2006.229.10:53:02.91#ibcon#first serial, iclass 13, count 0 2006.229.10:53:02.91#ibcon#enter sib2, iclass 13, count 0 2006.229.10:53:02.91#ibcon#flushed, iclass 13, count 0 2006.229.10:53:02.91#ibcon#about to write, iclass 13, count 0 2006.229.10:53:02.91#ibcon#wrote, iclass 13, count 0 2006.229.10:53:02.91#ibcon#about to read 3, iclass 13, count 0 2006.229.10:53:02.93#ibcon#read 3, iclass 13, count 0 2006.229.10:53:02.93#ibcon#about to read 4, iclass 13, count 0 2006.229.10:53:02.93#ibcon#read 4, iclass 13, count 0 2006.229.10:53:02.93#ibcon#about to read 5, iclass 13, count 0 2006.229.10:53:02.93#ibcon#read 5, iclass 13, count 0 2006.229.10:53:02.93#ibcon#about to read 6, iclass 13, count 0 2006.229.10:53:02.93#ibcon#read 6, iclass 13, count 0 2006.229.10:53:02.93#ibcon#end of sib2, iclass 13, count 0 2006.229.10:53:02.93#ibcon#*mode == 0, iclass 13, count 0 2006.229.10:53:02.93#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.10:53:02.93#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:53:02.93#ibcon#*before write, iclass 13, count 0 2006.229.10:53:02.93#ibcon#enter sib2, iclass 13, count 0 2006.229.10:53:02.93#ibcon#flushed, iclass 13, count 0 2006.229.10:53:02.93#ibcon#about to write, iclass 13, count 0 2006.229.10:53:02.93#ibcon#wrote, iclass 13, count 0 2006.229.10:53:02.93#ibcon#about to read 3, iclass 13, count 0 2006.229.10:53:02.97#ibcon#read 3, iclass 13, count 0 2006.229.10:53:02.97#ibcon#about to read 4, iclass 13, count 0 2006.229.10:53:02.97#ibcon#read 4, iclass 13, count 0 2006.229.10:53:02.97#ibcon#about to read 5, iclass 13, count 0 2006.229.10:53:02.97#ibcon#read 5, iclass 13, count 0 2006.229.10:53:02.97#ibcon#about to read 6, iclass 13, count 0 2006.229.10:53:02.97#ibcon#read 6, iclass 13, count 0 2006.229.10:53:02.97#ibcon#end of sib2, iclass 13, count 0 2006.229.10:53:02.97#ibcon#*after write, iclass 13, count 0 2006.229.10:53:02.97#ibcon#*before return 0, iclass 13, count 0 2006.229.10:53:02.97#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:53:02.97#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.10:53:02.97#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.10:53:02.97#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.10:53:02.97$vck44/vb=4,4 2006.229.10:53:02.97#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.10:53:02.97#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.10:53:02.97#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:02.97#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:03.03#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:03.03#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:03.03#ibcon#enter wrdev, iclass 15, count 2 2006.229.10:53:03.03#ibcon#first serial, iclass 15, count 2 2006.229.10:53:03.03#ibcon#enter sib2, iclass 15, count 2 2006.229.10:53:03.03#ibcon#flushed, iclass 15, count 2 2006.229.10:53:03.03#ibcon#about to write, iclass 15, count 2 2006.229.10:53:03.03#ibcon#wrote, iclass 15, count 2 2006.229.10:53:03.03#ibcon#about to read 3, iclass 15, count 2 2006.229.10:53:03.05#ibcon#read 3, iclass 15, count 2 2006.229.10:53:03.05#ibcon#about to read 4, iclass 15, count 2 2006.229.10:53:03.05#ibcon#read 4, iclass 15, count 2 2006.229.10:53:03.05#ibcon#about to read 5, iclass 15, count 2 2006.229.10:53:03.05#ibcon#read 5, iclass 15, count 2 2006.229.10:53:03.05#ibcon#about to read 6, iclass 15, count 2 2006.229.10:53:03.05#ibcon#read 6, iclass 15, count 2 2006.229.10:53:03.05#ibcon#end of sib2, iclass 15, count 2 2006.229.10:53:03.05#ibcon#*mode == 0, iclass 15, count 2 2006.229.10:53:03.05#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.10:53:03.05#ibcon#[27=AT04-04\r\n] 2006.229.10:53:03.05#ibcon#*before write, iclass 15, count 2 2006.229.10:53:03.05#ibcon#enter sib2, iclass 15, count 2 2006.229.10:53:03.05#ibcon#flushed, iclass 15, count 2 2006.229.10:53:03.05#ibcon#about to write, iclass 15, count 2 2006.229.10:53:03.05#ibcon#wrote, iclass 15, count 2 2006.229.10:53:03.05#ibcon#about to read 3, iclass 15, count 2 2006.229.10:53:03.08#ibcon#read 3, iclass 15, count 2 2006.229.10:53:03.08#ibcon#about to read 4, iclass 15, count 2 2006.229.10:53:03.08#ibcon#read 4, iclass 15, count 2 2006.229.10:53:03.08#ibcon#about to read 5, iclass 15, count 2 2006.229.10:53:03.08#ibcon#read 5, iclass 15, count 2 2006.229.10:53:03.08#ibcon#about to read 6, iclass 15, count 2 2006.229.10:53:03.08#ibcon#read 6, iclass 15, count 2 2006.229.10:53:03.08#ibcon#end of sib2, iclass 15, count 2 2006.229.10:53:03.08#ibcon#*after write, iclass 15, count 2 2006.229.10:53:03.08#ibcon#*before return 0, iclass 15, count 2 2006.229.10:53:03.08#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:03.08#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.10:53:03.08#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.10:53:03.08#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:03.08#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:03.20#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:03.20#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:03.20#ibcon#enter wrdev, iclass 15, count 0 2006.229.10:53:03.20#ibcon#first serial, iclass 15, count 0 2006.229.10:53:03.20#ibcon#enter sib2, iclass 15, count 0 2006.229.10:53:03.20#ibcon#flushed, iclass 15, count 0 2006.229.10:53:03.20#ibcon#about to write, iclass 15, count 0 2006.229.10:53:03.20#ibcon#wrote, iclass 15, count 0 2006.229.10:53:03.20#ibcon#about to read 3, iclass 15, count 0 2006.229.10:53:03.22#ibcon#read 3, iclass 15, count 0 2006.229.10:53:03.22#ibcon#about to read 4, iclass 15, count 0 2006.229.10:53:03.22#ibcon#read 4, iclass 15, count 0 2006.229.10:53:03.22#ibcon#about to read 5, iclass 15, count 0 2006.229.10:53:03.22#ibcon#read 5, iclass 15, count 0 2006.229.10:53:03.22#ibcon#about to read 6, iclass 15, count 0 2006.229.10:53:03.22#ibcon#read 6, iclass 15, count 0 2006.229.10:53:03.22#ibcon#end of sib2, iclass 15, count 0 2006.229.10:53:03.22#ibcon#*mode == 0, iclass 15, count 0 2006.229.10:53:03.22#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.10:53:03.22#ibcon#[27=USB\r\n] 2006.229.10:53:03.22#ibcon#*before write, iclass 15, count 0 2006.229.10:53:03.22#ibcon#enter sib2, iclass 15, count 0 2006.229.10:53:03.22#ibcon#flushed, iclass 15, count 0 2006.229.10:53:03.22#ibcon#about to write, iclass 15, count 0 2006.229.10:53:03.22#ibcon#wrote, iclass 15, count 0 2006.229.10:53:03.22#ibcon#about to read 3, iclass 15, count 0 2006.229.10:53:03.25#ibcon#read 3, iclass 15, count 0 2006.229.10:53:03.25#ibcon#about to read 4, iclass 15, count 0 2006.229.10:53:03.25#ibcon#read 4, iclass 15, count 0 2006.229.10:53:03.25#ibcon#about to read 5, iclass 15, count 0 2006.229.10:53:03.25#ibcon#read 5, iclass 15, count 0 2006.229.10:53:03.25#ibcon#about to read 6, iclass 15, count 0 2006.229.10:53:03.25#ibcon#read 6, iclass 15, count 0 2006.229.10:53:03.25#ibcon#end of sib2, iclass 15, count 0 2006.229.10:53:03.25#ibcon#*after write, iclass 15, count 0 2006.229.10:53:03.25#ibcon#*before return 0, iclass 15, count 0 2006.229.10:53:03.25#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:03.25#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.10:53:03.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.10:53:03.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.10:53:03.25$vck44/vblo=5,709.99 2006.229.10:53:03.25#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.10:53:03.25#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.10:53:03.25#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:03.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:03.25#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:03.25#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:03.25#ibcon#enter wrdev, iclass 17, count 0 2006.229.10:53:03.25#ibcon#first serial, iclass 17, count 0 2006.229.10:53:03.25#ibcon#enter sib2, iclass 17, count 0 2006.229.10:53:03.25#ibcon#flushed, iclass 17, count 0 2006.229.10:53:03.25#ibcon#about to write, iclass 17, count 0 2006.229.10:53:03.25#ibcon#wrote, iclass 17, count 0 2006.229.10:53:03.25#ibcon#about to read 3, iclass 17, count 0 2006.229.10:53:03.27#ibcon#read 3, iclass 17, count 0 2006.229.10:53:03.27#ibcon#about to read 4, iclass 17, count 0 2006.229.10:53:03.27#ibcon#read 4, iclass 17, count 0 2006.229.10:53:03.27#ibcon#about to read 5, iclass 17, count 0 2006.229.10:53:03.27#ibcon#read 5, iclass 17, count 0 2006.229.10:53:03.27#ibcon#about to read 6, iclass 17, count 0 2006.229.10:53:03.27#ibcon#read 6, iclass 17, count 0 2006.229.10:53:03.27#ibcon#end of sib2, iclass 17, count 0 2006.229.10:53:03.27#ibcon#*mode == 0, iclass 17, count 0 2006.229.10:53:03.27#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.10:53:03.27#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:53:03.27#ibcon#*before write, iclass 17, count 0 2006.229.10:53:03.27#ibcon#enter sib2, iclass 17, count 0 2006.229.10:53:03.27#ibcon#flushed, iclass 17, count 0 2006.229.10:53:03.27#ibcon#about to write, iclass 17, count 0 2006.229.10:53:03.27#ibcon#wrote, iclass 17, count 0 2006.229.10:53:03.27#ibcon#about to read 3, iclass 17, count 0 2006.229.10:53:03.31#ibcon#read 3, iclass 17, count 0 2006.229.10:53:03.31#ibcon#about to read 4, iclass 17, count 0 2006.229.10:53:03.31#ibcon#read 4, iclass 17, count 0 2006.229.10:53:03.31#ibcon#about to read 5, iclass 17, count 0 2006.229.10:53:03.31#ibcon#read 5, iclass 17, count 0 2006.229.10:53:03.31#ibcon#about to read 6, iclass 17, count 0 2006.229.10:53:03.31#ibcon#read 6, iclass 17, count 0 2006.229.10:53:03.31#ibcon#end of sib2, iclass 17, count 0 2006.229.10:53:03.31#ibcon#*after write, iclass 17, count 0 2006.229.10:53:03.31#ibcon#*before return 0, iclass 17, count 0 2006.229.10:53:03.31#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:03.31#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.10:53:03.31#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.10:53:03.31#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.10:53:03.31$vck44/vb=5,4 2006.229.10:53:03.31#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.10:53:03.31#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.10:53:03.31#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:03.31#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:03.37#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:03.37#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:03.37#ibcon#enter wrdev, iclass 19, count 2 2006.229.10:53:03.37#ibcon#first serial, iclass 19, count 2 2006.229.10:53:03.37#ibcon#enter sib2, iclass 19, count 2 2006.229.10:53:03.37#ibcon#flushed, iclass 19, count 2 2006.229.10:53:03.37#ibcon#about to write, iclass 19, count 2 2006.229.10:53:03.37#ibcon#wrote, iclass 19, count 2 2006.229.10:53:03.37#ibcon#about to read 3, iclass 19, count 2 2006.229.10:53:03.39#ibcon#read 3, iclass 19, count 2 2006.229.10:53:03.39#ibcon#about to read 4, iclass 19, count 2 2006.229.10:53:03.39#ibcon#read 4, iclass 19, count 2 2006.229.10:53:03.39#ibcon#about to read 5, iclass 19, count 2 2006.229.10:53:03.39#ibcon#read 5, iclass 19, count 2 2006.229.10:53:03.39#ibcon#about to read 6, iclass 19, count 2 2006.229.10:53:03.39#ibcon#read 6, iclass 19, count 2 2006.229.10:53:03.39#ibcon#end of sib2, iclass 19, count 2 2006.229.10:53:03.39#ibcon#*mode == 0, iclass 19, count 2 2006.229.10:53:03.39#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.10:53:03.39#ibcon#[27=AT05-04\r\n] 2006.229.10:53:03.39#ibcon#*before write, iclass 19, count 2 2006.229.10:53:03.39#ibcon#enter sib2, iclass 19, count 2 2006.229.10:53:03.39#ibcon#flushed, iclass 19, count 2 2006.229.10:53:03.39#ibcon#about to write, iclass 19, count 2 2006.229.10:53:03.39#ibcon#wrote, iclass 19, count 2 2006.229.10:53:03.39#ibcon#about to read 3, iclass 19, count 2 2006.229.10:53:03.42#ibcon#read 3, iclass 19, count 2 2006.229.10:53:03.42#ibcon#about to read 4, iclass 19, count 2 2006.229.10:53:03.42#ibcon#read 4, iclass 19, count 2 2006.229.10:53:03.42#ibcon#about to read 5, iclass 19, count 2 2006.229.10:53:03.42#ibcon#read 5, iclass 19, count 2 2006.229.10:53:03.42#ibcon#about to read 6, iclass 19, count 2 2006.229.10:53:03.42#ibcon#read 6, iclass 19, count 2 2006.229.10:53:03.42#ibcon#end of sib2, iclass 19, count 2 2006.229.10:53:03.42#ibcon#*after write, iclass 19, count 2 2006.229.10:53:03.42#ibcon#*before return 0, iclass 19, count 2 2006.229.10:53:03.42#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:03.42#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.10:53:03.42#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.10:53:03.42#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:03.42#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:03.54#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:03.54#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:03.54#ibcon#enter wrdev, iclass 19, count 0 2006.229.10:53:03.54#ibcon#first serial, iclass 19, count 0 2006.229.10:53:03.54#ibcon#enter sib2, iclass 19, count 0 2006.229.10:53:03.54#ibcon#flushed, iclass 19, count 0 2006.229.10:53:03.54#ibcon#about to write, iclass 19, count 0 2006.229.10:53:03.54#ibcon#wrote, iclass 19, count 0 2006.229.10:53:03.54#ibcon#about to read 3, iclass 19, count 0 2006.229.10:53:03.56#ibcon#read 3, iclass 19, count 0 2006.229.10:53:03.56#ibcon#about to read 4, iclass 19, count 0 2006.229.10:53:03.56#ibcon#read 4, iclass 19, count 0 2006.229.10:53:03.56#ibcon#about to read 5, iclass 19, count 0 2006.229.10:53:03.56#ibcon#read 5, iclass 19, count 0 2006.229.10:53:03.56#ibcon#about to read 6, iclass 19, count 0 2006.229.10:53:03.56#ibcon#read 6, iclass 19, count 0 2006.229.10:53:03.56#ibcon#end of sib2, iclass 19, count 0 2006.229.10:53:03.56#ibcon#*mode == 0, iclass 19, count 0 2006.229.10:53:03.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.10:53:03.56#ibcon#[27=USB\r\n] 2006.229.10:53:03.56#ibcon#*before write, iclass 19, count 0 2006.229.10:53:03.56#ibcon#enter sib2, iclass 19, count 0 2006.229.10:53:03.56#ibcon#flushed, iclass 19, count 0 2006.229.10:53:03.56#ibcon#about to write, iclass 19, count 0 2006.229.10:53:03.56#ibcon#wrote, iclass 19, count 0 2006.229.10:53:03.56#ibcon#about to read 3, iclass 19, count 0 2006.229.10:53:03.59#ibcon#read 3, iclass 19, count 0 2006.229.10:53:03.59#ibcon#about to read 4, iclass 19, count 0 2006.229.10:53:03.59#ibcon#read 4, iclass 19, count 0 2006.229.10:53:03.59#ibcon#about to read 5, iclass 19, count 0 2006.229.10:53:03.59#ibcon#read 5, iclass 19, count 0 2006.229.10:53:03.59#ibcon#about to read 6, iclass 19, count 0 2006.229.10:53:03.59#ibcon#read 6, iclass 19, count 0 2006.229.10:53:03.59#ibcon#end of sib2, iclass 19, count 0 2006.229.10:53:03.59#ibcon#*after write, iclass 19, count 0 2006.229.10:53:03.59#ibcon#*before return 0, iclass 19, count 0 2006.229.10:53:03.59#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:03.59#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.10:53:03.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.10:53:03.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.10:53:03.59$vck44/vblo=6,719.99 2006.229.10:53:03.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.10:53:03.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.10:53:03.59#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:03.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:03.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:03.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:03.59#ibcon#enter wrdev, iclass 21, count 0 2006.229.10:53:03.59#ibcon#first serial, iclass 21, count 0 2006.229.10:53:03.59#ibcon#enter sib2, iclass 21, count 0 2006.229.10:53:03.59#ibcon#flushed, iclass 21, count 0 2006.229.10:53:03.59#ibcon#about to write, iclass 21, count 0 2006.229.10:53:03.59#ibcon#wrote, iclass 21, count 0 2006.229.10:53:03.59#ibcon#about to read 3, iclass 21, count 0 2006.229.10:53:03.61#ibcon#read 3, iclass 21, count 0 2006.229.10:53:03.61#ibcon#about to read 4, iclass 21, count 0 2006.229.10:53:03.61#ibcon#read 4, iclass 21, count 0 2006.229.10:53:03.61#ibcon#about to read 5, iclass 21, count 0 2006.229.10:53:03.61#ibcon#read 5, iclass 21, count 0 2006.229.10:53:03.61#ibcon#about to read 6, iclass 21, count 0 2006.229.10:53:03.61#ibcon#read 6, iclass 21, count 0 2006.229.10:53:03.61#ibcon#end of sib2, iclass 21, count 0 2006.229.10:53:03.61#ibcon#*mode == 0, iclass 21, count 0 2006.229.10:53:03.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.10:53:03.61#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:53:03.61#ibcon#*before write, iclass 21, count 0 2006.229.10:53:03.61#ibcon#enter sib2, iclass 21, count 0 2006.229.10:53:03.61#ibcon#flushed, iclass 21, count 0 2006.229.10:53:03.61#ibcon#about to write, iclass 21, count 0 2006.229.10:53:03.61#ibcon#wrote, iclass 21, count 0 2006.229.10:53:03.61#ibcon#about to read 3, iclass 21, count 0 2006.229.10:53:03.65#ibcon#read 3, iclass 21, count 0 2006.229.10:53:03.65#ibcon#about to read 4, iclass 21, count 0 2006.229.10:53:03.65#ibcon#read 4, iclass 21, count 0 2006.229.10:53:03.65#ibcon#about to read 5, iclass 21, count 0 2006.229.10:53:03.65#ibcon#read 5, iclass 21, count 0 2006.229.10:53:03.65#ibcon#about to read 6, iclass 21, count 0 2006.229.10:53:03.65#ibcon#read 6, iclass 21, count 0 2006.229.10:53:03.65#ibcon#end of sib2, iclass 21, count 0 2006.229.10:53:03.65#ibcon#*after write, iclass 21, count 0 2006.229.10:53:03.65#ibcon#*before return 0, iclass 21, count 0 2006.229.10:53:03.65#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:03.65#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.10:53:03.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.10:53:03.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.10:53:03.65$vck44/vb=6,4 2006.229.10:53:03.65#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.10:53:03.65#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.10:53:03.65#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:03.65#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:03.71#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:03.71#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:03.71#ibcon#enter wrdev, iclass 23, count 2 2006.229.10:53:03.71#ibcon#first serial, iclass 23, count 2 2006.229.10:53:03.71#ibcon#enter sib2, iclass 23, count 2 2006.229.10:53:03.71#ibcon#flushed, iclass 23, count 2 2006.229.10:53:03.71#ibcon#about to write, iclass 23, count 2 2006.229.10:53:03.71#ibcon#wrote, iclass 23, count 2 2006.229.10:53:03.71#ibcon#about to read 3, iclass 23, count 2 2006.229.10:53:03.73#ibcon#read 3, iclass 23, count 2 2006.229.10:53:03.73#ibcon#about to read 4, iclass 23, count 2 2006.229.10:53:03.73#ibcon#read 4, iclass 23, count 2 2006.229.10:53:03.73#ibcon#about to read 5, iclass 23, count 2 2006.229.10:53:03.73#ibcon#read 5, iclass 23, count 2 2006.229.10:53:03.73#ibcon#about to read 6, iclass 23, count 2 2006.229.10:53:03.73#ibcon#read 6, iclass 23, count 2 2006.229.10:53:03.73#ibcon#end of sib2, iclass 23, count 2 2006.229.10:53:03.73#ibcon#*mode == 0, iclass 23, count 2 2006.229.10:53:03.73#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.10:53:03.73#ibcon#[27=AT06-04\r\n] 2006.229.10:53:03.73#ibcon#*before write, iclass 23, count 2 2006.229.10:53:03.73#ibcon#enter sib2, iclass 23, count 2 2006.229.10:53:03.73#ibcon#flushed, iclass 23, count 2 2006.229.10:53:03.73#ibcon#about to write, iclass 23, count 2 2006.229.10:53:03.73#ibcon#wrote, iclass 23, count 2 2006.229.10:53:03.73#ibcon#about to read 3, iclass 23, count 2 2006.229.10:53:03.76#ibcon#read 3, iclass 23, count 2 2006.229.10:53:03.76#ibcon#about to read 4, iclass 23, count 2 2006.229.10:53:03.76#ibcon#read 4, iclass 23, count 2 2006.229.10:53:03.76#ibcon#about to read 5, iclass 23, count 2 2006.229.10:53:03.76#ibcon#read 5, iclass 23, count 2 2006.229.10:53:03.76#ibcon#about to read 6, iclass 23, count 2 2006.229.10:53:03.76#ibcon#read 6, iclass 23, count 2 2006.229.10:53:03.76#ibcon#end of sib2, iclass 23, count 2 2006.229.10:53:03.76#ibcon#*after write, iclass 23, count 2 2006.229.10:53:03.76#ibcon#*before return 0, iclass 23, count 2 2006.229.10:53:03.76#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:03.76#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.10:53:03.76#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.10:53:03.76#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:03.76#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:03.88#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:03.88#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:03.88#ibcon#enter wrdev, iclass 23, count 0 2006.229.10:53:03.88#ibcon#first serial, iclass 23, count 0 2006.229.10:53:03.88#ibcon#enter sib2, iclass 23, count 0 2006.229.10:53:03.88#ibcon#flushed, iclass 23, count 0 2006.229.10:53:03.88#ibcon#about to write, iclass 23, count 0 2006.229.10:53:03.88#ibcon#wrote, iclass 23, count 0 2006.229.10:53:03.88#ibcon#about to read 3, iclass 23, count 0 2006.229.10:53:03.90#ibcon#read 3, iclass 23, count 0 2006.229.10:53:03.90#ibcon#about to read 4, iclass 23, count 0 2006.229.10:53:03.90#ibcon#read 4, iclass 23, count 0 2006.229.10:53:03.90#ibcon#about to read 5, iclass 23, count 0 2006.229.10:53:03.90#ibcon#read 5, iclass 23, count 0 2006.229.10:53:03.90#ibcon#about to read 6, iclass 23, count 0 2006.229.10:53:03.90#ibcon#read 6, iclass 23, count 0 2006.229.10:53:03.90#ibcon#end of sib2, iclass 23, count 0 2006.229.10:53:03.90#ibcon#*mode == 0, iclass 23, count 0 2006.229.10:53:03.90#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.10:53:03.90#ibcon#[27=USB\r\n] 2006.229.10:53:03.90#ibcon#*before write, iclass 23, count 0 2006.229.10:53:03.90#ibcon#enter sib2, iclass 23, count 0 2006.229.10:53:03.90#ibcon#flushed, iclass 23, count 0 2006.229.10:53:03.90#ibcon#about to write, iclass 23, count 0 2006.229.10:53:03.90#ibcon#wrote, iclass 23, count 0 2006.229.10:53:03.90#ibcon#about to read 3, iclass 23, count 0 2006.229.10:53:03.93#ibcon#read 3, iclass 23, count 0 2006.229.10:53:03.93#ibcon#about to read 4, iclass 23, count 0 2006.229.10:53:03.93#ibcon#read 4, iclass 23, count 0 2006.229.10:53:03.93#ibcon#about to read 5, iclass 23, count 0 2006.229.10:53:03.93#ibcon#read 5, iclass 23, count 0 2006.229.10:53:03.93#ibcon#about to read 6, iclass 23, count 0 2006.229.10:53:03.93#ibcon#read 6, iclass 23, count 0 2006.229.10:53:03.93#ibcon#end of sib2, iclass 23, count 0 2006.229.10:53:03.93#ibcon#*after write, iclass 23, count 0 2006.229.10:53:03.93#ibcon#*before return 0, iclass 23, count 0 2006.229.10:53:03.93#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:03.93#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.10:53:03.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.10:53:03.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.10:53:03.93$vck44/vblo=7,734.99 2006.229.10:53:03.93#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.10:53:03.93#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.10:53:03.93#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:03.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:03.93#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:03.93#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:03.93#ibcon#enter wrdev, iclass 25, count 0 2006.229.10:53:03.93#ibcon#first serial, iclass 25, count 0 2006.229.10:53:03.93#ibcon#enter sib2, iclass 25, count 0 2006.229.10:53:03.93#ibcon#flushed, iclass 25, count 0 2006.229.10:53:03.93#ibcon#about to write, iclass 25, count 0 2006.229.10:53:03.93#ibcon#wrote, iclass 25, count 0 2006.229.10:53:03.93#ibcon#about to read 3, iclass 25, count 0 2006.229.10:53:03.95#ibcon#read 3, iclass 25, count 0 2006.229.10:53:03.95#ibcon#about to read 4, iclass 25, count 0 2006.229.10:53:03.95#ibcon#read 4, iclass 25, count 0 2006.229.10:53:03.95#ibcon#about to read 5, iclass 25, count 0 2006.229.10:53:03.95#ibcon#read 5, iclass 25, count 0 2006.229.10:53:03.95#ibcon#about to read 6, iclass 25, count 0 2006.229.10:53:03.95#ibcon#read 6, iclass 25, count 0 2006.229.10:53:03.95#ibcon#end of sib2, iclass 25, count 0 2006.229.10:53:03.95#ibcon#*mode == 0, iclass 25, count 0 2006.229.10:53:03.95#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.10:53:03.95#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:53:03.95#ibcon#*before write, iclass 25, count 0 2006.229.10:53:03.95#ibcon#enter sib2, iclass 25, count 0 2006.229.10:53:03.95#ibcon#flushed, iclass 25, count 0 2006.229.10:53:03.95#ibcon#about to write, iclass 25, count 0 2006.229.10:53:03.95#ibcon#wrote, iclass 25, count 0 2006.229.10:53:03.95#ibcon#about to read 3, iclass 25, count 0 2006.229.10:53:03.99#ibcon#read 3, iclass 25, count 0 2006.229.10:53:03.99#ibcon#about to read 4, iclass 25, count 0 2006.229.10:53:03.99#ibcon#read 4, iclass 25, count 0 2006.229.10:53:03.99#ibcon#about to read 5, iclass 25, count 0 2006.229.10:53:03.99#ibcon#read 5, iclass 25, count 0 2006.229.10:53:03.99#ibcon#about to read 6, iclass 25, count 0 2006.229.10:53:03.99#ibcon#read 6, iclass 25, count 0 2006.229.10:53:03.99#ibcon#end of sib2, iclass 25, count 0 2006.229.10:53:03.99#ibcon#*after write, iclass 25, count 0 2006.229.10:53:03.99#ibcon#*before return 0, iclass 25, count 0 2006.229.10:53:03.99#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:03.99#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.10:53:03.99#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.10:53:03.99#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.10:53:03.99$vck44/vb=7,4 2006.229.10:53:03.99#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.10:53:03.99#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.10:53:03.99#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:03.99#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:04.05#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:04.05#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:04.05#ibcon#enter wrdev, iclass 27, count 2 2006.229.10:53:04.05#ibcon#first serial, iclass 27, count 2 2006.229.10:53:04.05#ibcon#enter sib2, iclass 27, count 2 2006.229.10:53:04.05#ibcon#flushed, iclass 27, count 2 2006.229.10:53:04.05#ibcon#about to write, iclass 27, count 2 2006.229.10:53:04.05#ibcon#wrote, iclass 27, count 2 2006.229.10:53:04.05#ibcon#about to read 3, iclass 27, count 2 2006.229.10:53:04.07#ibcon#read 3, iclass 27, count 2 2006.229.10:53:04.07#ibcon#about to read 4, iclass 27, count 2 2006.229.10:53:04.07#ibcon#read 4, iclass 27, count 2 2006.229.10:53:04.07#ibcon#about to read 5, iclass 27, count 2 2006.229.10:53:04.07#ibcon#read 5, iclass 27, count 2 2006.229.10:53:04.07#ibcon#about to read 6, iclass 27, count 2 2006.229.10:53:04.07#ibcon#read 6, iclass 27, count 2 2006.229.10:53:04.07#ibcon#end of sib2, iclass 27, count 2 2006.229.10:53:04.07#ibcon#*mode == 0, iclass 27, count 2 2006.229.10:53:04.07#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.10:53:04.07#ibcon#[27=AT07-04\r\n] 2006.229.10:53:04.07#ibcon#*before write, iclass 27, count 2 2006.229.10:53:04.07#ibcon#enter sib2, iclass 27, count 2 2006.229.10:53:04.07#ibcon#flushed, iclass 27, count 2 2006.229.10:53:04.07#ibcon#about to write, iclass 27, count 2 2006.229.10:53:04.07#ibcon#wrote, iclass 27, count 2 2006.229.10:53:04.07#ibcon#about to read 3, iclass 27, count 2 2006.229.10:53:04.10#ibcon#read 3, iclass 27, count 2 2006.229.10:53:04.10#ibcon#about to read 4, iclass 27, count 2 2006.229.10:53:04.10#ibcon#read 4, iclass 27, count 2 2006.229.10:53:04.10#ibcon#about to read 5, iclass 27, count 2 2006.229.10:53:04.10#ibcon#read 5, iclass 27, count 2 2006.229.10:53:04.10#ibcon#about to read 6, iclass 27, count 2 2006.229.10:53:04.10#ibcon#read 6, iclass 27, count 2 2006.229.10:53:04.10#ibcon#end of sib2, iclass 27, count 2 2006.229.10:53:04.10#ibcon#*after write, iclass 27, count 2 2006.229.10:53:04.10#ibcon#*before return 0, iclass 27, count 2 2006.229.10:53:04.10#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:04.10#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.10:53:04.10#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.10:53:04.10#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:04.10#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:04.22#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:04.22#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:04.22#ibcon#enter wrdev, iclass 27, count 0 2006.229.10:53:04.22#ibcon#first serial, iclass 27, count 0 2006.229.10:53:04.22#ibcon#enter sib2, iclass 27, count 0 2006.229.10:53:04.22#ibcon#flushed, iclass 27, count 0 2006.229.10:53:04.22#ibcon#about to write, iclass 27, count 0 2006.229.10:53:04.22#ibcon#wrote, iclass 27, count 0 2006.229.10:53:04.22#ibcon#about to read 3, iclass 27, count 0 2006.229.10:53:04.24#ibcon#read 3, iclass 27, count 0 2006.229.10:53:04.24#ibcon#about to read 4, iclass 27, count 0 2006.229.10:53:04.24#ibcon#read 4, iclass 27, count 0 2006.229.10:53:04.24#ibcon#about to read 5, iclass 27, count 0 2006.229.10:53:04.24#ibcon#read 5, iclass 27, count 0 2006.229.10:53:04.24#ibcon#about to read 6, iclass 27, count 0 2006.229.10:53:04.24#ibcon#read 6, iclass 27, count 0 2006.229.10:53:04.24#ibcon#end of sib2, iclass 27, count 0 2006.229.10:53:04.24#ibcon#*mode == 0, iclass 27, count 0 2006.229.10:53:04.24#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.10:53:04.24#ibcon#[27=USB\r\n] 2006.229.10:53:04.24#ibcon#*before write, iclass 27, count 0 2006.229.10:53:04.24#ibcon#enter sib2, iclass 27, count 0 2006.229.10:53:04.24#ibcon#flushed, iclass 27, count 0 2006.229.10:53:04.24#ibcon#about to write, iclass 27, count 0 2006.229.10:53:04.24#ibcon#wrote, iclass 27, count 0 2006.229.10:53:04.24#ibcon#about to read 3, iclass 27, count 0 2006.229.10:53:04.27#ibcon#read 3, iclass 27, count 0 2006.229.10:53:04.27#ibcon#about to read 4, iclass 27, count 0 2006.229.10:53:04.27#ibcon#read 4, iclass 27, count 0 2006.229.10:53:04.27#ibcon#about to read 5, iclass 27, count 0 2006.229.10:53:04.27#ibcon#read 5, iclass 27, count 0 2006.229.10:53:04.27#ibcon#about to read 6, iclass 27, count 0 2006.229.10:53:04.27#ibcon#read 6, iclass 27, count 0 2006.229.10:53:04.27#ibcon#end of sib2, iclass 27, count 0 2006.229.10:53:04.27#ibcon#*after write, iclass 27, count 0 2006.229.10:53:04.27#ibcon#*before return 0, iclass 27, count 0 2006.229.10:53:04.27#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:04.27#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.10:53:04.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.10:53:04.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.10:53:04.27$vck44/vblo=8,744.99 2006.229.10:53:04.27#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.10:53:04.27#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.10:53:04.27#ibcon#ireg 17 cls_cnt 0 2006.229.10:53:04.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:04.27#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:04.27#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:04.27#ibcon#enter wrdev, iclass 29, count 0 2006.229.10:53:04.27#ibcon#first serial, iclass 29, count 0 2006.229.10:53:04.27#ibcon#enter sib2, iclass 29, count 0 2006.229.10:53:04.27#ibcon#flushed, iclass 29, count 0 2006.229.10:53:04.27#ibcon#about to write, iclass 29, count 0 2006.229.10:53:04.27#ibcon#wrote, iclass 29, count 0 2006.229.10:53:04.27#ibcon#about to read 3, iclass 29, count 0 2006.229.10:53:04.29#ibcon#read 3, iclass 29, count 0 2006.229.10:53:04.29#ibcon#about to read 4, iclass 29, count 0 2006.229.10:53:04.29#ibcon#read 4, iclass 29, count 0 2006.229.10:53:04.29#ibcon#about to read 5, iclass 29, count 0 2006.229.10:53:04.29#ibcon#read 5, iclass 29, count 0 2006.229.10:53:04.29#ibcon#about to read 6, iclass 29, count 0 2006.229.10:53:04.29#ibcon#read 6, iclass 29, count 0 2006.229.10:53:04.29#ibcon#end of sib2, iclass 29, count 0 2006.229.10:53:04.29#ibcon#*mode == 0, iclass 29, count 0 2006.229.10:53:04.29#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.10:53:04.29#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:53:04.29#ibcon#*before write, iclass 29, count 0 2006.229.10:53:04.29#ibcon#enter sib2, iclass 29, count 0 2006.229.10:53:04.29#ibcon#flushed, iclass 29, count 0 2006.229.10:53:04.29#ibcon#about to write, iclass 29, count 0 2006.229.10:53:04.29#ibcon#wrote, iclass 29, count 0 2006.229.10:53:04.29#ibcon#about to read 3, iclass 29, count 0 2006.229.10:53:04.33#ibcon#read 3, iclass 29, count 0 2006.229.10:53:04.33#ibcon#about to read 4, iclass 29, count 0 2006.229.10:53:04.33#ibcon#read 4, iclass 29, count 0 2006.229.10:53:04.33#ibcon#about to read 5, iclass 29, count 0 2006.229.10:53:04.33#ibcon#read 5, iclass 29, count 0 2006.229.10:53:04.33#ibcon#about to read 6, iclass 29, count 0 2006.229.10:53:04.33#ibcon#read 6, iclass 29, count 0 2006.229.10:53:04.33#ibcon#end of sib2, iclass 29, count 0 2006.229.10:53:04.33#ibcon#*after write, iclass 29, count 0 2006.229.10:53:04.33#ibcon#*before return 0, iclass 29, count 0 2006.229.10:53:04.33#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:04.33#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.10:53:04.33#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.10:53:04.33#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.10:53:04.33$vck44/vb=8,4 2006.229.10:53:04.33#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.10:53:04.33#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.10:53:04.33#ibcon#ireg 11 cls_cnt 2 2006.229.10:53:04.33#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:04.39#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:04.39#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:04.39#ibcon#enter wrdev, iclass 31, count 2 2006.229.10:53:04.39#ibcon#first serial, iclass 31, count 2 2006.229.10:53:04.39#ibcon#enter sib2, iclass 31, count 2 2006.229.10:53:04.39#ibcon#flushed, iclass 31, count 2 2006.229.10:53:04.39#ibcon#about to write, iclass 31, count 2 2006.229.10:53:04.39#ibcon#wrote, iclass 31, count 2 2006.229.10:53:04.39#ibcon#about to read 3, iclass 31, count 2 2006.229.10:53:04.41#ibcon#read 3, iclass 31, count 2 2006.229.10:53:04.41#ibcon#about to read 4, iclass 31, count 2 2006.229.10:53:04.41#ibcon#read 4, iclass 31, count 2 2006.229.10:53:04.41#ibcon#about to read 5, iclass 31, count 2 2006.229.10:53:04.41#ibcon#read 5, iclass 31, count 2 2006.229.10:53:04.41#ibcon#about to read 6, iclass 31, count 2 2006.229.10:53:04.41#ibcon#read 6, iclass 31, count 2 2006.229.10:53:04.41#ibcon#end of sib2, iclass 31, count 2 2006.229.10:53:04.41#ibcon#*mode == 0, iclass 31, count 2 2006.229.10:53:04.41#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.10:53:04.41#ibcon#[27=AT08-04\r\n] 2006.229.10:53:04.41#ibcon#*before write, iclass 31, count 2 2006.229.10:53:04.41#ibcon#enter sib2, iclass 31, count 2 2006.229.10:53:04.41#ibcon#flushed, iclass 31, count 2 2006.229.10:53:04.41#ibcon#about to write, iclass 31, count 2 2006.229.10:53:04.41#ibcon#wrote, iclass 31, count 2 2006.229.10:53:04.41#ibcon#about to read 3, iclass 31, count 2 2006.229.10:53:04.44#ibcon#read 3, iclass 31, count 2 2006.229.10:53:04.44#ibcon#about to read 4, iclass 31, count 2 2006.229.10:53:04.44#ibcon#read 4, iclass 31, count 2 2006.229.10:53:04.44#ibcon#about to read 5, iclass 31, count 2 2006.229.10:53:04.44#ibcon#read 5, iclass 31, count 2 2006.229.10:53:04.44#ibcon#about to read 6, iclass 31, count 2 2006.229.10:53:04.44#ibcon#read 6, iclass 31, count 2 2006.229.10:53:04.44#ibcon#end of sib2, iclass 31, count 2 2006.229.10:53:04.44#ibcon#*after write, iclass 31, count 2 2006.229.10:53:04.44#ibcon#*before return 0, iclass 31, count 2 2006.229.10:53:04.44#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:04.44#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.10:53:04.44#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.10:53:04.44#ibcon#ireg 7 cls_cnt 0 2006.229.10:53:04.44#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:04.56#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:04.56#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:04.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.10:53:04.56#ibcon#first serial, iclass 31, count 0 2006.229.10:53:04.56#ibcon#enter sib2, iclass 31, count 0 2006.229.10:53:04.56#ibcon#flushed, iclass 31, count 0 2006.229.10:53:04.56#ibcon#about to write, iclass 31, count 0 2006.229.10:53:04.56#ibcon#wrote, iclass 31, count 0 2006.229.10:53:04.56#ibcon#about to read 3, iclass 31, count 0 2006.229.10:53:04.58#ibcon#read 3, iclass 31, count 0 2006.229.10:53:04.58#ibcon#about to read 4, iclass 31, count 0 2006.229.10:53:04.58#ibcon#read 4, iclass 31, count 0 2006.229.10:53:04.58#ibcon#about to read 5, iclass 31, count 0 2006.229.10:53:04.58#ibcon#read 5, iclass 31, count 0 2006.229.10:53:04.58#ibcon#about to read 6, iclass 31, count 0 2006.229.10:53:04.58#ibcon#read 6, iclass 31, count 0 2006.229.10:53:04.58#ibcon#end of sib2, iclass 31, count 0 2006.229.10:53:04.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.10:53:04.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.10:53:04.58#ibcon#[27=USB\r\n] 2006.229.10:53:04.58#ibcon#*before write, iclass 31, count 0 2006.229.10:53:04.58#ibcon#enter sib2, iclass 31, count 0 2006.229.10:53:04.58#ibcon#flushed, iclass 31, count 0 2006.229.10:53:04.58#ibcon#about to write, iclass 31, count 0 2006.229.10:53:04.58#ibcon#wrote, iclass 31, count 0 2006.229.10:53:04.58#ibcon#about to read 3, iclass 31, count 0 2006.229.10:53:04.61#ibcon#read 3, iclass 31, count 0 2006.229.10:53:04.61#ibcon#about to read 4, iclass 31, count 0 2006.229.10:53:04.61#ibcon#read 4, iclass 31, count 0 2006.229.10:53:04.61#ibcon#about to read 5, iclass 31, count 0 2006.229.10:53:04.61#ibcon#read 5, iclass 31, count 0 2006.229.10:53:04.61#ibcon#about to read 6, iclass 31, count 0 2006.229.10:53:04.61#ibcon#read 6, iclass 31, count 0 2006.229.10:53:04.61#ibcon#end of sib2, iclass 31, count 0 2006.229.10:53:04.61#ibcon#*after write, iclass 31, count 0 2006.229.10:53:04.61#ibcon#*before return 0, iclass 31, count 0 2006.229.10:53:04.61#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:04.61#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.10:53:04.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.10:53:04.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.10:53:04.61$vck44/vabw=wide 2006.229.10:53:04.61#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.10:53:04.61#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.10:53:04.61#ibcon#ireg 8 cls_cnt 0 2006.229.10:53:04.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:04.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:04.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:04.61#ibcon#enter wrdev, iclass 33, count 0 2006.229.10:53:04.61#ibcon#first serial, iclass 33, count 0 2006.229.10:53:04.61#ibcon#enter sib2, iclass 33, count 0 2006.229.10:53:04.61#ibcon#flushed, iclass 33, count 0 2006.229.10:53:04.61#ibcon#about to write, iclass 33, count 0 2006.229.10:53:04.61#ibcon#wrote, iclass 33, count 0 2006.229.10:53:04.61#ibcon#about to read 3, iclass 33, count 0 2006.229.10:53:04.63#ibcon#read 3, iclass 33, count 0 2006.229.10:53:04.63#ibcon#about to read 4, iclass 33, count 0 2006.229.10:53:04.63#ibcon#read 4, iclass 33, count 0 2006.229.10:53:04.63#ibcon#about to read 5, iclass 33, count 0 2006.229.10:53:04.63#ibcon#read 5, iclass 33, count 0 2006.229.10:53:04.63#ibcon#about to read 6, iclass 33, count 0 2006.229.10:53:04.63#ibcon#read 6, iclass 33, count 0 2006.229.10:53:04.63#ibcon#end of sib2, iclass 33, count 0 2006.229.10:53:04.63#ibcon#*mode == 0, iclass 33, count 0 2006.229.10:53:04.63#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.10:53:04.63#ibcon#[25=BW32\r\n] 2006.229.10:53:04.63#ibcon#*before write, iclass 33, count 0 2006.229.10:53:04.63#ibcon#enter sib2, iclass 33, count 0 2006.229.10:53:04.63#ibcon#flushed, iclass 33, count 0 2006.229.10:53:04.63#ibcon#about to write, iclass 33, count 0 2006.229.10:53:04.63#ibcon#wrote, iclass 33, count 0 2006.229.10:53:04.63#ibcon#about to read 3, iclass 33, count 0 2006.229.10:53:04.66#ibcon#read 3, iclass 33, count 0 2006.229.10:53:04.66#ibcon#about to read 4, iclass 33, count 0 2006.229.10:53:04.66#ibcon#read 4, iclass 33, count 0 2006.229.10:53:04.66#ibcon#about to read 5, iclass 33, count 0 2006.229.10:53:04.66#ibcon#read 5, iclass 33, count 0 2006.229.10:53:04.66#ibcon#about to read 6, iclass 33, count 0 2006.229.10:53:04.66#ibcon#read 6, iclass 33, count 0 2006.229.10:53:04.66#ibcon#end of sib2, iclass 33, count 0 2006.229.10:53:04.66#ibcon#*after write, iclass 33, count 0 2006.229.10:53:04.66#ibcon#*before return 0, iclass 33, count 0 2006.229.10:53:04.66#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:04.66#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.10:53:04.66#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.10:53:04.66#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.10:53:04.66$vck44/vbbw=wide 2006.229.10:53:04.66#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.10:53:04.66#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.10:53:04.66#ibcon#ireg 8 cls_cnt 0 2006.229.10:53:04.66#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:53:04.73#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:53:04.73#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:53:04.73#ibcon#enter wrdev, iclass 35, count 0 2006.229.10:53:04.73#ibcon#first serial, iclass 35, count 0 2006.229.10:53:04.73#ibcon#enter sib2, iclass 35, count 0 2006.229.10:53:04.73#ibcon#flushed, iclass 35, count 0 2006.229.10:53:04.73#ibcon#about to write, iclass 35, count 0 2006.229.10:53:04.73#ibcon#wrote, iclass 35, count 0 2006.229.10:53:04.73#ibcon#about to read 3, iclass 35, count 0 2006.229.10:53:04.75#ibcon#read 3, iclass 35, count 0 2006.229.10:53:04.75#ibcon#about to read 4, iclass 35, count 0 2006.229.10:53:04.75#ibcon#read 4, iclass 35, count 0 2006.229.10:53:04.75#ibcon#about to read 5, iclass 35, count 0 2006.229.10:53:04.75#ibcon#read 5, iclass 35, count 0 2006.229.10:53:04.75#ibcon#about to read 6, iclass 35, count 0 2006.229.10:53:04.75#ibcon#read 6, iclass 35, count 0 2006.229.10:53:04.75#ibcon#end of sib2, iclass 35, count 0 2006.229.10:53:04.75#ibcon#*mode == 0, iclass 35, count 0 2006.229.10:53:04.75#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.10:53:04.75#ibcon#[27=BW32\r\n] 2006.229.10:53:04.75#ibcon#*before write, iclass 35, count 0 2006.229.10:53:04.75#ibcon#enter sib2, iclass 35, count 0 2006.229.10:53:04.75#ibcon#flushed, iclass 35, count 0 2006.229.10:53:04.75#ibcon#about to write, iclass 35, count 0 2006.229.10:53:04.75#ibcon#wrote, iclass 35, count 0 2006.229.10:53:04.75#ibcon#about to read 3, iclass 35, count 0 2006.229.10:53:04.78#ibcon#read 3, iclass 35, count 0 2006.229.10:53:04.78#ibcon#about to read 4, iclass 35, count 0 2006.229.10:53:04.78#ibcon#read 4, iclass 35, count 0 2006.229.10:53:04.78#ibcon#about to read 5, iclass 35, count 0 2006.229.10:53:04.78#ibcon#read 5, iclass 35, count 0 2006.229.10:53:04.78#ibcon#about to read 6, iclass 35, count 0 2006.229.10:53:04.78#ibcon#read 6, iclass 35, count 0 2006.229.10:53:04.78#ibcon#end of sib2, iclass 35, count 0 2006.229.10:53:04.78#ibcon#*after write, iclass 35, count 0 2006.229.10:53:04.78#ibcon#*before return 0, iclass 35, count 0 2006.229.10:53:04.78#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:53:04.78#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.10:53:04.78#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.10:53:04.78#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.10:53:04.78$setupk4/ifdk4 2006.229.10:53:04.78$ifdk4/lo= 2006.229.10:53:04.78$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:53:04.78$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:53:04.78$ifdk4/patch= 2006.229.10:53:04.78$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:53:04.78$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:53:04.78$setupk4/!*+20s 2006.229.10:53:09.75#abcon#<5=/03 1.8 3.2 28.451001001.8\r\n> 2006.229.10:53:09.77#abcon#{5=INTERFACE CLEAR} 2006.229.10:53:09.83#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:53:19.25$setupk4/"tpicd 2006.229.10:53:19.25$setupk4/echo=off 2006.229.10:53:19.25$setupk4/xlog=off 2006.229.10:53:19.25:!2006.229.10:55:25 2006.229.10:53:52.14#trakl#Source acquired 2006.229.10:53:52.14#flagr#flagr/antenna,acquired 2006.229.10:55:25.00:preob 2006.229.10:55:26.13/onsource/TRACKING 2006.229.10:55:26.13:!2006.229.10:55:35 2006.229.10:55:35.00:"tape 2006.229.10:55:35.00:"st=record 2006.229.10:55:35.00:data_valid=on 2006.229.10:55:35.00:midob 2006.229.10:55:35.13/onsource/TRACKING 2006.229.10:55:35.13/wx/28.44,1001.8,100 2006.229.10:55:35.29/cable/+6.4056E-03 2006.229.10:55:36.38/va/01,08,usb,yes,29,31 2006.229.10:55:36.38/va/02,07,usb,yes,31,32 2006.229.10:55:36.38/va/03,06,usb,yes,39,41 2006.229.10:55:36.38/va/04,07,usb,yes,32,34 2006.229.10:55:36.38/va/05,04,usb,yes,29,29 2006.229.10:55:36.38/va/06,04,usb,yes,32,32 2006.229.10:55:36.38/va/07,05,usb,yes,28,29 2006.229.10:55:36.38/va/08,06,usb,yes,21,26 2006.229.10:55:36.61/valo/01,524.99,yes,locked 2006.229.10:55:36.61/valo/02,534.99,yes,locked 2006.229.10:55:36.61/valo/03,564.99,yes,locked 2006.229.10:55:36.61/valo/04,624.99,yes,locked 2006.229.10:55:36.61/valo/05,734.99,yes,locked 2006.229.10:55:36.61/valo/06,814.99,yes,locked 2006.229.10:55:36.61/valo/07,864.99,yes,locked 2006.229.10:55:36.61/valo/08,884.99,yes,locked 2006.229.10:55:37.70/vb/01,04,usb,yes,30,28 2006.229.10:55:37.70/vb/02,04,usb,yes,33,33 2006.229.10:55:37.70/vb/03,04,usb,yes,30,33 2006.229.10:55:37.70/vb/04,04,usb,yes,34,33 2006.229.10:55:37.70/vb/05,04,usb,yes,27,29 2006.229.10:55:37.70/vb/06,04,usb,yes,31,27 2006.229.10:55:37.70/vb/07,04,usb,yes,31,31 2006.229.10:55:37.70/vb/08,04,usb,yes,28,32 2006.229.10:55:37.93/vblo/01,629.99,yes,locked 2006.229.10:55:37.93/vblo/02,634.99,yes,locked 2006.229.10:55:37.93/vblo/03,649.99,yes,locked 2006.229.10:55:37.93/vblo/04,679.99,yes,locked 2006.229.10:55:37.93/vblo/05,709.99,yes,locked 2006.229.10:55:37.93/vblo/06,719.99,yes,locked 2006.229.10:55:37.93/vblo/07,734.99,yes,locked 2006.229.10:55:37.93/vblo/08,744.99,yes,locked 2006.229.10:55:38.08/vabw/8 2006.229.10:55:38.23/vbbw/8 2006.229.10:55:38.40/xfe/off,on,12.0 2006.229.10:55:38.78/ifatt/23,28,28,28 2006.229.10:55:39.08/fmout-gps/S +4.36E-07 2006.229.10:55:39.12:!2006.229.10:56:25 2006.229.10:56:25.00:data_valid=off 2006.229.10:56:25.00:"et 2006.229.10:56:25.00:!+3s 2006.229.10:56:28.01:"tape 2006.229.10:56:28.01:postob 2006.229.10:56:28.18/cable/+6.4052E-03 2006.229.10:56:28.18/wx/28.43,1001.8,100 2006.229.10:56:29.08/fmout-gps/S +4.35E-07 2006.229.10:56:29.08:scan_name=229-1101,jd0608,240 2006.229.10:56:29.08:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.10:56:30.14#flagr#flagr/antenna,new-source 2006.229.10:56:30.14:checkk5 2006.229.10:56:30.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.10:56:30.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.10:56:31.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.10:56:31.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.10:56:32.15/chk_obsdata//k5ts1/T2291055??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:56:32.57/chk_obsdata//k5ts2/T2291055??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:56:32.96/chk_obsdata//k5ts3/T2291055??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:56:33.37/chk_obsdata//k5ts4/T2291055??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.10:56:34.10/k5log//k5ts1_log_newline 2006.229.10:56:34.82/k5log//k5ts2_log_newline 2006.229.10:56:35.52/k5log//k5ts3_log_newline 2006.229.10:56:36.23/k5log//k5ts4_log_newline 2006.229.10:56:36.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.10:56:36.25:setupk4=1 2006.229.10:56:36.25$setupk4/echo=on 2006.229.10:56:36.25$setupk4/pcalon 2006.229.10:56:36.25$pcalon/"no phase cal control is implemented here 2006.229.10:56:36.25$setupk4/"tpicd=stop 2006.229.10:56:36.25$setupk4/"rec=synch_on 2006.229.10:56:36.25$setupk4/"rec_mode=128 2006.229.10:56:36.25$setupk4/!* 2006.229.10:56:36.25$setupk4/recpk4 2006.229.10:56:36.25$recpk4/recpatch= 2006.229.10:56:36.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.10:56:36.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.10:56:36.26$setupk4/vck44 2006.229.10:56:36.26$vck44/valo=1,524.99 2006.229.10:56:36.26#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.10:56:36.26#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.10:56:36.26#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:36.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:36.26#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:36.26#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:36.26#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:56:36.26#ibcon#first serial, iclass 16, count 0 2006.229.10:56:36.26#ibcon#enter sib2, iclass 16, count 0 2006.229.10:56:36.26#ibcon#flushed, iclass 16, count 0 2006.229.10:56:36.26#ibcon#about to write, iclass 16, count 0 2006.229.10:56:36.26#ibcon#wrote, iclass 16, count 0 2006.229.10:56:36.26#ibcon#about to read 3, iclass 16, count 0 2006.229.10:56:36.28#ibcon#read 3, iclass 16, count 0 2006.229.10:56:36.28#ibcon#about to read 4, iclass 16, count 0 2006.229.10:56:36.28#ibcon#read 4, iclass 16, count 0 2006.229.10:56:36.28#ibcon#about to read 5, iclass 16, count 0 2006.229.10:56:36.28#ibcon#read 5, iclass 16, count 0 2006.229.10:56:36.28#ibcon#about to read 6, iclass 16, count 0 2006.229.10:56:36.28#ibcon#read 6, iclass 16, count 0 2006.229.10:56:36.28#ibcon#end of sib2, iclass 16, count 0 2006.229.10:56:36.28#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:56:36.28#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:56:36.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.10:56:36.28#ibcon#*before write, iclass 16, count 0 2006.229.10:56:36.28#ibcon#enter sib2, iclass 16, count 0 2006.229.10:56:36.28#ibcon#flushed, iclass 16, count 0 2006.229.10:56:36.28#ibcon#about to write, iclass 16, count 0 2006.229.10:56:36.28#ibcon#wrote, iclass 16, count 0 2006.229.10:56:36.28#ibcon#about to read 3, iclass 16, count 0 2006.229.10:56:36.33#ibcon#read 3, iclass 16, count 0 2006.229.10:56:36.33#ibcon#about to read 4, iclass 16, count 0 2006.229.10:56:36.33#ibcon#read 4, iclass 16, count 0 2006.229.10:56:36.33#ibcon#about to read 5, iclass 16, count 0 2006.229.10:56:36.33#ibcon#read 5, iclass 16, count 0 2006.229.10:56:36.33#ibcon#about to read 6, iclass 16, count 0 2006.229.10:56:36.33#ibcon#read 6, iclass 16, count 0 2006.229.10:56:36.33#ibcon#end of sib2, iclass 16, count 0 2006.229.10:56:36.33#ibcon#*after write, iclass 16, count 0 2006.229.10:56:36.33#ibcon#*before return 0, iclass 16, count 0 2006.229.10:56:36.33#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:36.33#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:36.33#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:56:36.33#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:56:36.33$vck44/va=1,8 2006.229.10:56:36.33#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.10:56:36.33#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.10:56:36.33#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:36.33#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:36.33#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:36.33#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:36.33#ibcon#enter wrdev, iclass 18, count 2 2006.229.10:56:36.33#ibcon#first serial, iclass 18, count 2 2006.229.10:56:36.33#ibcon#enter sib2, iclass 18, count 2 2006.229.10:56:36.33#ibcon#flushed, iclass 18, count 2 2006.229.10:56:36.33#ibcon#about to write, iclass 18, count 2 2006.229.10:56:36.33#ibcon#wrote, iclass 18, count 2 2006.229.10:56:36.33#ibcon#about to read 3, iclass 18, count 2 2006.229.10:56:36.35#ibcon#read 3, iclass 18, count 2 2006.229.10:56:36.35#ibcon#about to read 4, iclass 18, count 2 2006.229.10:56:36.35#ibcon#read 4, iclass 18, count 2 2006.229.10:56:36.35#ibcon#about to read 5, iclass 18, count 2 2006.229.10:56:36.35#ibcon#read 5, iclass 18, count 2 2006.229.10:56:36.35#ibcon#about to read 6, iclass 18, count 2 2006.229.10:56:36.35#ibcon#read 6, iclass 18, count 2 2006.229.10:56:36.35#ibcon#end of sib2, iclass 18, count 2 2006.229.10:56:36.35#ibcon#*mode == 0, iclass 18, count 2 2006.229.10:56:36.35#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.10:56:36.35#ibcon#[25=AT01-08\r\n] 2006.229.10:56:36.35#ibcon#*before write, iclass 18, count 2 2006.229.10:56:36.35#ibcon#enter sib2, iclass 18, count 2 2006.229.10:56:36.35#ibcon#flushed, iclass 18, count 2 2006.229.10:56:36.35#ibcon#about to write, iclass 18, count 2 2006.229.10:56:36.35#ibcon#wrote, iclass 18, count 2 2006.229.10:56:36.35#ibcon#about to read 3, iclass 18, count 2 2006.229.10:56:36.38#ibcon#read 3, iclass 18, count 2 2006.229.10:56:36.38#ibcon#about to read 4, iclass 18, count 2 2006.229.10:56:36.38#ibcon#read 4, iclass 18, count 2 2006.229.10:56:36.38#ibcon#about to read 5, iclass 18, count 2 2006.229.10:56:36.38#ibcon#read 5, iclass 18, count 2 2006.229.10:56:36.38#ibcon#about to read 6, iclass 18, count 2 2006.229.10:56:36.38#ibcon#read 6, iclass 18, count 2 2006.229.10:56:36.38#ibcon#end of sib2, iclass 18, count 2 2006.229.10:56:36.38#ibcon#*after write, iclass 18, count 2 2006.229.10:56:36.38#ibcon#*before return 0, iclass 18, count 2 2006.229.10:56:36.38#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:36.38#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:36.38#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.10:56:36.38#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:36.38#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:36.50#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:36.50#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:36.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:56:36.50#ibcon#first serial, iclass 18, count 0 2006.229.10:56:36.50#ibcon#enter sib2, iclass 18, count 0 2006.229.10:56:36.50#ibcon#flushed, iclass 18, count 0 2006.229.10:56:36.50#ibcon#about to write, iclass 18, count 0 2006.229.10:56:36.50#ibcon#wrote, iclass 18, count 0 2006.229.10:56:36.50#ibcon#about to read 3, iclass 18, count 0 2006.229.10:56:36.52#ibcon#read 3, iclass 18, count 0 2006.229.10:56:36.52#ibcon#about to read 4, iclass 18, count 0 2006.229.10:56:36.52#ibcon#read 4, iclass 18, count 0 2006.229.10:56:36.52#ibcon#about to read 5, iclass 18, count 0 2006.229.10:56:36.52#ibcon#read 5, iclass 18, count 0 2006.229.10:56:36.52#ibcon#about to read 6, iclass 18, count 0 2006.229.10:56:36.52#ibcon#read 6, iclass 18, count 0 2006.229.10:56:36.52#ibcon#end of sib2, iclass 18, count 0 2006.229.10:56:36.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:56:36.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:56:36.52#ibcon#[25=USB\r\n] 2006.229.10:56:36.52#ibcon#*before write, iclass 18, count 0 2006.229.10:56:36.52#ibcon#enter sib2, iclass 18, count 0 2006.229.10:56:36.52#ibcon#flushed, iclass 18, count 0 2006.229.10:56:36.52#ibcon#about to write, iclass 18, count 0 2006.229.10:56:36.52#ibcon#wrote, iclass 18, count 0 2006.229.10:56:36.52#ibcon#about to read 3, iclass 18, count 0 2006.229.10:56:36.55#ibcon#read 3, iclass 18, count 0 2006.229.10:56:36.55#ibcon#about to read 4, iclass 18, count 0 2006.229.10:56:36.55#ibcon#read 4, iclass 18, count 0 2006.229.10:56:36.55#ibcon#about to read 5, iclass 18, count 0 2006.229.10:56:36.55#ibcon#read 5, iclass 18, count 0 2006.229.10:56:36.55#ibcon#about to read 6, iclass 18, count 0 2006.229.10:56:36.55#ibcon#read 6, iclass 18, count 0 2006.229.10:56:36.55#ibcon#end of sib2, iclass 18, count 0 2006.229.10:56:36.55#ibcon#*after write, iclass 18, count 0 2006.229.10:56:36.55#ibcon#*before return 0, iclass 18, count 0 2006.229.10:56:36.55#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:36.55#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:36.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:56:36.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:56:36.55$vck44/valo=2,534.99 2006.229.10:56:36.55#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.10:56:36.55#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.10:56:36.55#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:36.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:36.55#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:36.55#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:36.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:56:36.55#ibcon#first serial, iclass 20, count 0 2006.229.10:56:36.55#ibcon#enter sib2, iclass 20, count 0 2006.229.10:56:36.55#ibcon#flushed, iclass 20, count 0 2006.229.10:56:36.55#ibcon#about to write, iclass 20, count 0 2006.229.10:56:36.55#ibcon#wrote, iclass 20, count 0 2006.229.10:56:36.55#ibcon#about to read 3, iclass 20, count 0 2006.229.10:56:36.57#ibcon#read 3, iclass 20, count 0 2006.229.10:56:36.57#ibcon#about to read 4, iclass 20, count 0 2006.229.10:56:36.57#ibcon#read 4, iclass 20, count 0 2006.229.10:56:36.57#ibcon#about to read 5, iclass 20, count 0 2006.229.10:56:36.57#ibcon#read 5, iclass 20, count 0 2006.229.10:56:36.57#ibcon#about to read 6, iclass 20, count 0 2006.229.10:56:36.57#ibcon#read 6, iclass 20, count 0 2006.229.10:56:36.57#ibcon#end of sib2, iclass 20, count 0 2006.229.10:56:36.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:56:36.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:56:36.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.10:56:36.57#ibcon#*before write, iclass 20, count 0 2006.229.10:56:36.57#ibcon#enter sib2, iclass 20, count 0 2006.229.10:56:36.57#ibcon#flushed, iclass 20, count 0 2006.229.10:56:36.57#ibcon#about to write, iclass 20, count 0 2006.229.10:56:36.57#ibcon#wrote, iclass 20, count 0 2006.229.10:56:36.57#ibcon#about to read 3, iclass 20, count 0 2006.229.10:56:36.61#ibcon#read 3, iclass 20, count 0 2006.229.10:56:36.61#ibcon#about to read 4, iclass 20, count 0 2006.229.10:56:36.61#ibcon#read 4, iclass 20, count 0 2006.229.10:56:36.61#ibcon#about to read 5, iclass 20, count 0 2006.229.10:56:36.61#ibcon#read 5, iclass 20, count 0 2006.229.10:56:36.61#ibcon#about to read 6, iclass 20, count 0 2006.229.10:56:36.61#ibcon#read 6, iclass 20, count 0 2006.229.10:56:36.61#ibcon#end of sib2, iclass 20, count 0 2006.229.10:56:36.61#ibcon#*after write, iclass 20, count 0 2006.229.10:56:36.61#ibcon#*before return 0, iclass 20, count 0 2006.229.10:56:36.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:36.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:36.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:56:36.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:56:36.61$vck44/va=2,7 2006.229.10:56:36.61#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.10:56:36.61#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.10:56:36.61#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:36.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:36.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:36.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:36.67#ibcon#enter wrdev, iclass 22, count 2 2006.229.10:56:36.67#ibcon#first serial, iclass 22, count 2 2006.229.10:56:36.67#ibcon#enter sib2, iclass 22, count 2 2006.229.10:56:36.67#ibcon#flushed, iclass 22, count 2 2006.229.10:56:36.67#ibcon#about to write, iclass 22, count 2 2006.229.10:56:36.67#ibcon#wrote, iclass 22, count 2 2006.229.10:56:36.67#ibcon#about to read 3, iclass 22, count 2 2006.229.10:56:36.69#ibcon#read 3, iclass 22, count 2 2006.229.10:56:36.69#ibcon#about to read 4, iclass 22, count 2 2006.229.10:56:36.69#ibcon#read 4, iclass 22, count 2 2006.229.10:56:36.69#ibcon#about to read 5, iclass 22, count 2 2006.229.10:56:36.69#ibcon#read 5, iclass 22, count 2 2006.229.10:56:36.69#ibcon#about to read 6, iclass 22, count 2 2006.229.10:56:36.69#ibcon#read 6, iclass 22, count 2 2006.229.10:56:36.69#ibcon#end of sib2, iclass 22, count 2 2006.229.10:56:36.69#ibcon#*mode == 0, iclass 22, count 2 2006.229.10:56:36.69#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.10:56:36.69#ibcon#[25=AT02-07\r\n] 2006.229.10:56:36.69#ibcon#*before write, iclass 22, count 2 2006.229.10:56:36.69#ibcon#enter sib2, iclass 22, count 2 2006.229.10:56:36.69#ibcon#flushed, iclass 22, count 2 2006.229.10:56:36.69#ibcon#about to write, iclass 22, count 2 2006.229.10:56:36.69#ibcon#wrote, iclass 22, count 2 2006.229.10:56:36.69#ibcon#about to read 3, iclass 22, count 2 2006.229.10:56:36.72#ibcon#read 3, iclass 22, count 2 2006.229.10:56:36.72#ibcon#about to read 4, iclass 22, count 2 2006.229.10:56:36.72#ibcon#read 4, iclass 22, count 2 2006.229.10:56:36.72#ibcon#about to read 5, iclass 22, count 2 2006.229.10:56:36.72#ibcon#read 5, iclass 22, count 2 2006.229.10:56:36.72#ibcon#about to read 6, iclass 22, count 2 2006.229.10:56:36.72#ibcon#read 6, iclass 22, count 2 2006.229.10:56:36.72#ibcon#end of sib2, iclass 22, count 2 2006.229.10:56:36.72#ibcon#*after write, iclass 22, count 2 2006.229.10:56:36.72#ibcon#*before return 0, iclass 22, count 2 2006.229.10:56:36.72#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:36.72#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:36.72#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.10:56:36.72#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:36.72#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:36.84#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:36.84#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:36.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:56:36.84#ibcon#first serial, iclass 22, count 0 2006.229.10:56:36.84#ibcon#enter sib2, iclass 22, count 0 2006.229.10:56:36.84#ibcon#flushed, iclass 22, count 0 2006.229.10:56:36.84#ibcon#about to write, iclass 22, count 0 2006.229.10:56:36.84#ibcon#wrote, iclass 22, count 0 2006.229.10:56:36.84#ibcon#about to read 3, iclass 22, count 0 2006.229.10:56:36.86#ibcon#read 3, iclass 22, count 0 2006.229.10:56:36.86#ibcon#about to read 4, iclass 22, count 0 2006.229.10:56:36.86#ibcon#read 4, iclass 22, count 0 2006.229.10:56:36.86#ibcon#about to read 5, iclass 22, count 0 2006.229.10:56:36.86#ibcon#read 5, iclass 22, count 0 2006.229.10:56:36.86#ibcon#about to read 6, iclass 22, count 0 2006.229.10:56:36.86#ibcon#read 6, iclass 22, count 0 2006.229.10:56:36.86#ibcon#end of sib2, iclass 22, count 0 2006.229.10:56:36.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:56:36.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:56:36.86#ibcon#[25=USB\r\n] 2006.229.10:56:36.86#ibcon#*before write, iclass 22, count 0 2006.229.10:56:36.86#ibcon#enter sib2, iclass 22, count 0 2006.229.10:56:36.86#ibcon#flushed, iclass 22, count 0 2006.229.10:56:36.86#ibcon#about to write, iclass 22, count 0 2006.229.10:56:36.86#ibcon#wrote, iclass 22, count 0 2006.229.10:56:36.86#ibcon#about to read 3, iclass 22, count 0 2006.229.10:56:36.89#ibcon#read 3, iclass 22, count 0 2006.229.10:56:36.89#ibcon#about to read 4, iclass 22, count 0 2006.229.10:56:36.89#ibcon#read 4, iclass 22, count 0 2006.229.10:56:36.89#ibcon#about to read 5, iclass 22, count 0 2006.229.10:56:36.89#ibcon#read 5, iclass 22, count 0 2006.229.10:56:36.89#ibcon#about to read 6, iclass 22, count 0 2006.229.10:56:36.89#ibcon#read 6, iclass 22, count 0 2006.229.10:56:36.89#ibcon#end of sib2, iclass 22, count 0 2006.229.10:56:36.89#ibcon#*after write, iclass 22, count 0 2006.229.10:56:36.89#ibcon#*before return 0, iclass 22, count 0 2006.229.10:56:36.89#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:36.89#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:36.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:56:36.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:56:36.89$vck44/valo=3,564.99 2006.229.10:56:36.89#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.10:56:36.89#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.10:56:36.89#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:36.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:36.89#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:36.89#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:36.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:56:36.89#ibcon#first serial, iclass 24, count 0 2006.229.10:56:36.89#ibcon#enter sib2, iclass 24, count 0 2006.229.10:56:36.89#ibcon#flushed, iclass 24, count 0 2006.229.10:56:36.89#ibcon#about to write, iclass 24, count 0 2006.229.10:56:36.89#ibcon#wrote, iclass 24, count 0 2006.229.10:56:36.89#ibcon#about to read 3, iclass 24, count 0 2006.229.10:56:36.91#ibcon#read 3, iclass 24, count 0 2006.229.10:56:36.91#ibcon#about to read 4, iclass 24, count 0 2006.229.10:56:36.91#ibcon#read 4, iclass 24, count 0 2006.229.10:56:36.91#ibcon#about to read 5, iclass 24, count 0 2006.229.10:56:36.91#ibcon#read 5, iclass 24, count 0 2006.229.10:56:36.91#ibcon#about to read 6, iclass 24, count 0 2006.229.10:56:36.91#ibcon#read 6, iclass 24, count 0 2006.229.10:56:36.91#ibcon#end of sib2, iclass 24, count 0 2006.229.10:56:36.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:56:36.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:56:36.91#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.10:56:36.91#ibcon#*before write, iclass 24, count 0 2006.229.10:56:36.91#ibcon#enter sib2, iclass 24, count 0 2006.229.10:56:36.91#ibcon#flushed, iclass 24, count 0 2006.229.10:56:36.91#ibcon#about to write, iclass 24, count 0 2006.229.10:56:36.91#ibcon#wrote, iclass 24, count 0 2006.229.10:56:36.91#ibcon#about to read 3, iclass 24, count 0 2006.229.10:56:36.95#ibcon#read 3, iclass 24, count 0 2006.229.10:56:36.95#ibcon#about to read 4, iclass 24, count 0 2006.229.10:56:36.95#ibcon#read 4, iclass 24, count 0 2006.229.10:56:36.95#ibcon#about to read 5, iclass 24, count 0 2006.229.10:56:36.95#ibcon#read 5, iclass 24, count 0 2006.229.10:56:36.95#ibcon#about to read 6, iclass 24, count 0 2006.229.10:56:36.95#ibcon#read 6, iclass 24, count 0 2006.229.10:56:36.95#ibcon#end of sib2, iclass 24, count 0 2006.229.10:56:36.95#ibcon#*after write, iclass 24, count 0 2006.229.10:56:36.95#ibcon#*before return 0, iclass 24, count 0 2006.229.10:56:36.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:36.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:36.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:56:36.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:56:36.95$vck44/va=3,6 2006.229.10:56:36.95#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.10:56:36.95#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.10:56:36.95#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:36.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:37.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:37.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:37.01#ibcon#enter wrdev, iclass 26, count 2 2006.229.10:56:37.01#ibcon#first serial, iclass 26, count 2 2006.229.10:56:37.01#ibcon#enter sib2, iclass 26, count 2 2006.229.10:56:37.01#ibcon#flushed, iclass 26, count 2 2006.229.10:56:37.01#ibcon#about to write, iclass 26, count 2 2006.229.10:56:37.01#ibcon#wrote, iclass 26, count 2 2006.229.10:56:37.01#ibcon#about to read 3, iclass 26, count 2 2006.229.10:56:37.03#ibcon#read 3, iclass 26, count 2 2006.229.10:56:37.03#ibcon#about to read 4, iclass 26, count 2 2006.229.10:56:37.03#ibcon#read 4, iclass 26, count 2 2006.229.10:56:37.03#ibcon#about to read 5, iclass 26, count 2 2006.229.10:56:37.03#ibcon#read 5, iclass 26, count 2 2006.229.10:56:37.03#ibcon#about to read 6, iclass 26, count 2 2006.229.10:56:37.03#ibcon#read 6, iclass 26, count 2 2006.229.10:56:37.03#ibcon#end of sib2, iclass 26, count 2 2006.229.10:56:37.03#ibcon#*mode == 0, iclass 26, count 2 2006.229.10:56:37.03#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.10:56:37.03#ibcon#[25=AT03-06\r\n] 2006.229.10:56:37.03#ibcon#*before write, iclass 26, count 2 2006.229.10:56:37.03#ibcon#enter sib2, iclass 26, count 2 2006.229.10:56:37.03#ibcon#flushed, iclass 26, count 2 2006.229.10:56:37.03#ibcon#about to write, iclass 26, count 2 2006.229.10:56:37.03#ibcon#wrote, iclass 26, count 2 2006.229.10:56:37.03#ibcon#about to read 3, iclass 26, count 2 2006.229.10:56:37.06#ibcon#read 3, iclass 26, count 2 2006.229.10:56:37.06#ibcon#about to read 4, iclass 26, count 2 2006.229.10:56:37.06#ibcon#read 4, iclass 26, count 2 2006.229.10:56:37.06#ibcon#about to read 5, iclass 26, count 2 2006.229.10:56:37.06#ibcon#read 5, iclass 26, count 2 2006.229.10:56:37.06#ibcon#about to read 6, iclass 26, count 2 2006.229.10:56:37.06#ibcon#read 6, iclass 26, count 2 2006.229.10:56:37.06#ibcon#end of sib2, iclass 26, count 2 2006.229.10:56:37.06#ibcon#*after write, iclass 26, count 2 2006.229.10:56:37.06#ibcon#*before return 0, iclass 26, count 2 2006.229.10:56:37.06#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:37.06#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:37.06#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.10:56:37.06#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:37.06#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:37.18#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:37.18#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:37.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:56:37.18#ibcon#first serial, iclass 26, count 0 2006.229.10:56:37.18#ibcon#enter sib2, iclass 26, count 0 2006.229.10:56:37.18#ibcon#flushed, iclass 26, count 0 2006.229.10:56:37.18#ibcon#about to write, iclass 26, count 0 2006.229.10:56:37.18#ibcon#wrote, iclass 26, count 0 2006.229.10:56:37.18#ibcon#about to read 3, iclass 26, count 0 2006.229.10:56:37.20#ibcon#read 3, iclass 26, count 0 2006.229.10:56:37.20#ibcon#about to read 4, iclass 26, count 0 2006.229.10:56:37.20#ibcon#read 4, iclass 26, count 0 2006.229.10:56:37.20#ibcon#about to read 5, iclass 26, count 0 2006.229.10:56:37.20#ibcon#read 5, iclass 26, count 0 2006.229.10:56:37.20#ibcon#about to read 6, iclass 26, count 0 2006.229.10:56:37.20#ibcon#read 6, iclass 26, count 0 2006.229.10:56:37.20#ibcon#end of sib2, iclass 26, count 0 2006.229.10:56:37.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:56:37.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:56:37.20#ibcon#[25=USB\r\n] 2006.229.10:56:37.20#ibcon#*before write, iclass 26, count 0 2006.229.10:56:37.20#ibcon#enter sib2, iclass 26, count 0 2006.229.10:56:37.20#ibcon#flushed, iclass 26, count 0 2006.229.10:56:37.20#ibcon#about to write, iclass 26, count 0 2006.229.10:56:37.20#ibcon#wrote, iclass 26, count 0 2006.229.10:56:37.20#ibcon#about to read 3, iclass 26, count 0 2006.229.10:56:37.23#ibcon#read 3, iclass 26, count 0 2006.229.10:56:37.23#ibcon#about to read 4, iclass 26, count 0 2006.229.10:56:37.23#ibcon#read 4, iclass 26, count 0 2006.229.10:56:37.23#ibcon#about to read 5, iclass 26, count 0 2006.229.10:56:37.23#ibcon#read 5, iclass 26, count 0 2006.229.10:56:37.23#ibcon#about to read 6, iclass 26, count 0 2006.229.10:56:37.23#ibcon#read 6, iclass 26, count 0 2006.229.10:56:37.23#ibcon#end of sib2, iclass 26, count 0 2006.229.10:56:37.23#ibcon#*after write, iclass 26, count 0 2006.229.10:56:37.23#ibcon#*before return 0, iclass 26, count 0 2006.229.10:56:37.23#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:37.23#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:37.23#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:56:37.23#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:56:37.23$vck44/valo=4,624.99 2006.229.10:56:37.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.10:56:37.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.10:56:37.23#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:37.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:37.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:37.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:37.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:56:37.23#ibcon#first serial, iclass 28, count 0 2006.229.10:56:37.23#ibcon#enter sib2, iclass 28, count 0 2006.229.10:56:37.23#ibcon#flushed, iclass 28, count 0 2006.229.10:56:37.23#ibcon#about to write, iclass 28, count 0 2006.229.10:56:37.23#ibcon#wrote, iclass 28, count 0 2006.229.10:56:37.23#ibcon#about to read 3, iclass 28, count 0 2006.229.10:56:37.25#ibcon#read 3, iclass 28, count 0 2006.229.10:56:37.25#ibcon#about to read 4, iclass 28, count 0 2006.229.10:56:37.25#ibcon#read 4, iclass 28, count 0 2006.229.10:56:37.25#ibcon#about to read 5, iclass 28, count 0 2006.229.10:56:37.25#ibcon#read 5, iclass 28, count 0 2006.229.10:56:37.25#ibcon#about to read 6, iclass 28, count 0 2006.229.10:56:37.25#ibcon#read 6, iclass 28, count 0 2006.229.10:56:37.25#ibcon#end of sib2, iclass 28, count 0 2006.229.10:56:37.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:56:37.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:56:37.25#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.10:56:37.25#ibcon#*before write, iclass 28, count 0 2006.229.10:56:37.25#ibcon#enter sib2, iclass 28, count 0 2006.229.10:56:37.25#ibcon#flushed, iclass 28, count 0 2006.229.10:56:37.25#ibcon#about to write, iclass 28, count 0 2006.229.10:56:37.25#ibcon#wrote, iclass 28, count 0 2006.229.10:56:37.25#ibcon#about to read 3, iclass 28, count 0 2006.229.10:56:37.29#ibcon#read 3, iclass 28, count 0 2006.229.10:56:37.29#ibcon#about to read 4, iclass 28, count 0 2006.229.10:56:37.29#ibcon#read 4, iclass 28, count 0 2006.229.10:56:37.29#ibcon#about to read 5, iclass 28, count 0 2006.229.10:56:37.29#ibcon#read 5, iclass 28, count 0 2006.229.10:56:37.29#ibcon#about to read 6, iclass 28, count 0 2006.229.10:56:37.29#ibcon#read 6, iclass 28, count 0 2006.229.10:56:37.29#ibcon#end of sib2, iclass 28, count 0 2006.229.10:56:37.29#ibcon#*after write, iclass 28, count 0 2006.229.10:56:37.29#ibcon#*before return 0, iclass 28, count 0 2006.229.10:56:37.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:37.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:37.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:56:37.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:56:37.29$vck44/va=4,7 2006.229.10:56:37.29#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.10:56:37.29#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.10:56:37.29#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:37.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:37.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:37.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:37.35#ibcon#enter wrdev, iclass 30, count 2 2006.229.10:56:37.35#ibcon#first serial, iclass 30, count 2 2006.229.10:56:37.35#ibcon#enter sib2, iclass 30, count 2 2006.229.10:56:37.35#ibcon#flushed, iclass 30, count 2 2006.229.10:56:37.35#ibcon#about to write, iclass 30, count 2 2006.229.10:56:37.35#ibcon#wrote, iclass 30, count 2 2006.229.10:56:37.35#ibcon#about to read 3, iclass 30, count 2 2006.229.10:56:37.37#ibcon#read 3, iclass 30, count 2 2006.229.10:56:37.37#ibcon#about to read 4, iclass 30, count 2 2006.229.10:56:37.37#ibcon#read 4, iclass 30, count 2 2006.229.10:56:37.37#ibcon#about to read 5, iclass 30, count 2 2006.229.10:56:37.37#ibcon#read 5, iclass 30, count 2 2006.229.10:56:37.37#ibcon#about to read 6, iclass 30, count 2 2006.229.10:56:37.37#ibcon#read 6, iclass 30, count 2 2006.229.10:56:37.37#ibcon#end of sib2, iclass 30, count 2 2006.229.10:56:37.37#ibcon#*mode == 0, iclass 30, count 2 2006.229.10:56:37.37#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.10:56:37.37#ibcon#[25=AT04-07\r\n] 2006.229.10:56:37.37#ibcon#*before write, iclass 30, count 2 2006.229.10:56:37.37#ibcon#enter sib2, iclass 30, count 2 2006.229.10:56:37.37#ibcon#flushed, iclass 30, count 2 2006.229.10:56:37.37#ibcon#about to write, iclass 30, count 2 2006.229.10:56:37.37#ibcon#wrote, iclass 30, count 2 2006.229.10:56:37.37#ibcon#about to read 3, iclass 30, count 2 2006.229.10:56:37.40#ibcon#read 3, iclass 30, count 2 2006.229.10:56:37.40#ibcon#about to read 4, iclass 30, count 2 2006.229.10:56:37.40#ibcon#read 4, iclass 30, count 2 2006.229.10:56:37.40#ibcon#about to read 5, iclass 30, count 2 2006.229.10:56:37.40#ibcon#read 5, iclass 30, count 2 2006.229.10:56:37.40#ibcon#about to read 6, iclass 30, count 2 2006.229.10:56:37.40#ibcon#read 6, iclass 30, count 2 2006.229.10:56:37.40#ibcon#end of sib2, iclass 30, count 2 2006.229.10:56:37.40#ibcon#*after write, iclass 30, count 2 2006.229.10:56:37.40#ibcon#*before return 0, iclass 30, count 2 2006.229.10:56:37.40#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:37.40#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:37.40#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.10:56:37.40#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:37.40#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:37.52#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:37.52#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:37.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:56:37.52#ibcon#first serial, iclass 30, count 0 2006.229.10:56:37.52#ibcon#enter sib2, iclass 30, count 0 2006.229.10:56:37.52#ibcon#flushed, iclass 30, count 0 2006.229.10:56:37.52#ibcon#about to write, iclass 30, count 0 2006.229.10:56:37.52#ibcon#wrote, iclass 30, count 0 2006.229.10:56:37.52#ibcon#about to read 3, iclass 30, count 0 2006.229.10:56:37.54#ibcon#read 3, iclass 30, count 0 2006.229.10:56:37.54#ibcon#about to read 4, iclass 30, count 0 2006.229.10:56:37.54#ibcon#read 4, iclass 30, count 0 2006.229.10:56:37.54#ibcon#about to read 5, iclass 30, count 0 2006.229.10:56:37.54#ibcon#read 5, iclass 30, count 0 2006.229.10:56:37.54#ibcon#about to read 6, iclass 30, count 0 2006.229.10:56:37.54#ibcon#read 6, iclass 30, count 0 2006.229.10:56:37.54#ibcon#end of sib2, iclass 30, count 0 2006.229.10:56:37.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:56:37.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:56:37.54#ibcon#[25=USB\r\n] 2006.229.10:56:37.54#ibcon#*before write, iclass 30, count 0 2006.229.10:56:37.54#ibcon#enter sib2, iclass 30, count 0 2006.229.10:56:37.54#ibcon#flushed, iclass 30, count 0 2006.229.10:56:37.54#ibcon#about to write, iclass 30, count 0 2006.229.10:56:37.54#ibcon#wrote, iclass 30, count 0 2006.229.10:56:37.54#ibcon#about to read 3, iclass 30, count 0 2006.229.10:56:37.57#ibcon#read 3, iclass 30, count 0 2006.229.10:56:37.57#ibcon#about to read 4, iclass 30, count 0 2006.229.10:56:37.57#ibcon#read 4, iclass 30, count 0 2006.229.10:56:37.57#ibcon#about to read 5, iclass 30, count 0 2006.229.10:56:37.57#ibcon#read 5, iclass 30, count 0 2006.229.10:56:37.57#ibcon#about to read 6, iclass 30, count 0 2006.229.10:56:37.57#ibcon#read 6, iclass 30, count 0 2006.229.10:56:37.57#ibcon#end of sib2, iclass 30, count 0 2006.229.10:56:37.57#ibcon#*after write, iclass 30, count 0 2006.229.10:56:37.57#ibcon#*before return 0, iclass 30, count 0 2006.229.10:56:37.57#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:37.57#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:37.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:56:37.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:56:37.57$vck44/valo=5,734.99 2006.229.10:56:37.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.10:56:37.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.10:56:37.57#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:37.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:37.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:37.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:37.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:56:37.57#ibcon#first serial, iclass 32, count 0 2006.229.10:56:37.57#ibcon#enter sib2, iclass 32, count 0 2006.229.10:56:37.57#ibcon#flushed, iclass 32, count 0 2006.229.10:56:37.57#ibcon#about to write, iclass 32, count 0 2006.229.10:56:37.57#ibcon#wrote, iclass 32, count 0 2006.229.10:56:37.57#ibcon#about to read 3, iclass 32, count 0 2006.229.10:56:37.59#ibcon#read 3, iclass 32, count 0 2006.229.10:56:37.59#ibcon#about to read 4, iclass 32, count 0 2006.229.10:56:37.59#ibcon#read 4, iclass 32, count 0 2006.229.10:56:37.59#ibcon#about to read 5, iclass 32, count 0 2006.229.10:56:37.59#ibcon#read 5, iclass 32, count 0 2006.229.10:56:37.59#ibcon#about to read 6, iclass 32, count 0 2006.229.10:56:37.59#ibcon#read 6, iclass 32, count 0 2006.229.10:56:37.59#ibcon#end of sib2, iclass 32, count 0 2006.229.10:56:37.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:56:37.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:56:37.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.10:56:37.59#ibcon#*before write, iclass 32, count 0 2006.229.10:56:37.59#ibcon#enter sib2, iclass 32, count 0 2006.229.10:56:37.59#ibcon#flushed, iclass 32, count 0 2006.229.10:56:37.59#ibcon#about to write, iclass 32, count 0 2006.229.10:56:37.59#ibcon#wrote, iclass 32, count 0 2006.229.10:56:37.59#ibcon#about to read 3, iclass 32, count 0 2006.229.10:56:37.63#ibcon#read 3, iclass 32, count 0 2006.229.10:56:37.63#ibcon#about to read 4, iclass 32, count 0 2006.229.10:56:37.63#ibcon#read 4, iclass 32, count 0 2006.229.10:56:37.63#ibcon#about to read 5, iclass 32, count 0 2006.229.10:56:37.63#ibcon#read 5, iclass 32, count 0 2006.229.10:56:37.63#ibcon#about to read 6, iclass 32, count 0 2006.229.10:56:37.63#ibcon#read 6, iclass 32, count 0 2006.229.10:56:37.63#ibcon#end of sib2, iclass 32, count 0 2006.229.10:56:37.63#ibcon#*after write, iclass 32, count 0 2006.229.10:56:37.63#ibcon#*before return 0, iclass 32, count 0 2006.229.10:56:37.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:37.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:37.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:56:37.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:56:37.63$vck44/va=5,4 2006.229.10:56:37.63#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.10:56:37.63#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.10:56:37.63#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:37.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:37.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:37.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:37.69#ibcon#enter wrdev, iclass 34, count 2 2006.229.10:56:37.69#ibcon#first serial, iclass 34, count 2 2006.229.10:56:37.69#ibcon#enter sib2, iclass 34, count 2 2006.229.10:56:37.69#ibcon#flushed, iclass 34, count 2 2006.229.10:56:37.69#ibcon#about to write, iclass 34, count 2 2006.229.10:56:37.69#ibcon#wrote, iclass 34, count 2 2006.229.10:56:37.69#ibcon#about to read 3, iclass 34, count 2 2006.229.10:56:37.71#ibcon#read 3, iclass 34, count 2 2006.229.10:56:37.71#ibcon#about to read 4, iclass 34, count 2 2006.229.10:56:37.71#ibcon#read 4, iclass 34, count 2 2006.229.10:56:37.71#ibcon#about to read 5, iclass 34, count 2 2006.229.10:56:37.71#ibcon#read 5, iclass 34, count 2 2006.229.10:56:37.71#ibcon#about to read 6, iclass 34, count 2 2006.229.10:56:37.71#ibcon#read 6, iclass 34, count 2 2006.229.10:56:37.71#ibcon#end of sib2, iclass 34, count 2 2006.229.10:56:37.71#ibcon#*mode == 0, iclass 34, count 2 2006.229.10:56:37.71#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.10:56:37.71#ibcon#[25=AT05-04\r\n] 2006.229.10:56:37.71#ibcon#*before write, iclass 34, count 2 2006.229.10:56:37.71#ibcon#enter sib2, iclass 34, count 2 2006.229.10:56:37.71#ibcon#flushed, iclass 34, count 2 2006.229.10:56:37.71#ibcon#about to write, iclass 34, count 2 2006.229.10:56:37.71#ibcon#wrote, iclass 34, count 2 2006.229.10:56:37.71#ibcon#about to read 3, iclass 34, count 2 2006.229.10:56:37.74#ibcon#read 3, iclass 34, count 2 2006.229.10:56:37.74#ibcon#about to read 4, iclass 34, count 2 2006.229.10:56:37.74#ibcon#read 4, iclass 34, count 2 2006.229.10:56:37.74#ibcon#about to read 5, iclass 34, count 2 2006.229.10:56:37.74#ibcon#read 5, iclass 34, count 2 2006.229.10:56:37.74#ibcon#about to read 6, iclass 34, count 2 2006.229.10:56:37.74#ibcon#read 6, iclass 34, count 2 2006.229.10:56:37.74#ibcon#end of sib2, iclass 34, count 2 2006.229.10:56:37.74#ibcon#*after write, iclass 34, count 2 2006.229.10:56:37.74#ibcon#*before return 0, iclass 34, count 2 2006.229.10:56:37.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:37.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:37.74#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.10:56:37.74#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:37.74#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:37.86#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:37.86#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:37.86#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:56:37.86#ibcon#first serial, iclass 34, count 0 2006.229.10:56:37.86#ibcon#enter sib2, iclass 34, count 0 2006.229.10:56:37.86#ibcon#flushed, iclass 34, count 0 2006.229.10:56:37.86#ibcon#about to write, iclass 34, count 0 2006.229.10:56:37.86#ibcon#wrote, iclass 34, count 0 2006.229.10:56:37.86#ibcon#about to read 3, iclass 34, count 0 2006.229.10:56:37.88#ibcon#read 3, iclass 34, count 0 2006.229.10:56:37.88#ibcon#about to read 4, iclass 34, count 0 2006.229.10:56:37.88#ibcon#read 4, iclass 34, count 0 2006.229.10:56:37.88#ibcon#about to read 5, iclass 34, count 0 2006.229.10:56:37.88#ibcon#read 5, iclass 34, count 0 2006.229.10:56:37.88#ibcon#about to read 6, iclass 34, count 0 2006.229.10:56:37.88#ibcon#read 6, iclass 34, count 0 2006.229.10:56:37.88#ibcon#end of sib2, iclass 34, count 0 2006.229.10:56:37.88#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:56:37.88#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:56:37.88#ibcon#[25=USB\r\n] 2006.229.10:56:37.88#ibcon#*before write, iclass 34, count 0 2006.229.10:56:37.88#ibcon#enter sib2, iclass 34, count 0 2006.229.10:56:37.88#ibcon#flushed, iclass 34, count 0 2006.229.10:56:37.88#ibcon#about to write, iclass 34, count 0 2006.229.10:56:37.88#ibcon#wrote, iclass 34, count 0 2006.229.10:56:37.88#ibcon#about to read 3, iclass 34, count 0 2006.229.10:56:37.91#ibcon#read 3, iclass 34, count 0 2006.229.10:56:37.91#ibcon#about to read 4, iclass 34, count 0 2006.229.10:56:37.91#ibcon#read 4, iclass 34, count 0 2006.229.10:56:37.91#ibcon#about to read 5, iclass 34, count 0 2006.229.10:56:37.91#ibcon#read 5, iclass 34, count 0 2006.229.10:56:37.91#ibcon#about to read 6, iclass 34, count 0 2006.229.10:56:37.91#ibcon#read 6, iclass 34, count 0 2006.229.10:56:37.91#ibcon#end of sib2, iclass 34, count 0 2006.229.10:56:37.91#ibcon#*after write, iclass 34, count 0 2006.229.10:56:37.91#ibcon#*before return 0, iclass 34, count 0 2006.229.10:56:37.91#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:37.91#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:37.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:56:37.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:56:37.91$vck44/valo=6,814.99 2006.229.10:56:37.91#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:56:37.91#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:56:37.91#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:37.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:37.91#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:37.91#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:37.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:56:37.91#ibcon#first serial, iclass 36, count 0 2006.229.10:56:37.91#ibcon#enter sib2, iclass 36, count 0 2006.229.10:56:37.91#ibcon#flushed, iclass 36, count 0 2006.229.10:56:37.91#ibcon#about to write, iclass 36, count 0 2006.229.10:56:37.91#ibcon#wrote, iclass 36, count 0 2006.229.10:56:37.91#ibcon#about to read 3, iclass 36, count 0 2006.229.10:56:37.93#ibcon#read 3, iclass 36, count 0 2006.229.10:56:37.93#ibcon#about to read 4, iclass 36, count 0 2006.229.10:56:37.93#ibcon#read 4, iclass 36, count 0 2006.229.10:56:37.93#ibcon#about to read 5, iclass 36, count 0 2006.229.10:56:37.93#ibcon#read 5, iclass 36, count 0 2006.229.10:56:37.93#ibcon#about to read 6, iclass 36, count 0 2006.229.10:56:37.93#ibcon#read 6, iclass 36, count 0 2006.229.10:56:37.93#ibcon#end of sib2, iclass 36, count 0 2006.229.10:56:37.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:56:37.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:56:37.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.10:56:37.93#ibcon#*before write, iclass 36, count 0 2006.229.10:56:37.93#ibcon#enter sib2, iclass 36, count 0 2006.229.10:56:37.93#ibcon#flushed, iclass 36, count 0 2006.229.10:56:37.93#ibcon#about to write, iclass 36, count 0 2006.229.10:56:37.93#ibcon#wrote, iclass 36, count 0 2006.229.10:56:37.93#ibcon#about to read 3, iclass 36, count 0 2006.229.10:56:37.97#ibcon#read 3, iclass 36, count 0 2006.229.10:56:37.97#ibcon#about to read 4, iclass 36, count 0 2006.229.10:56:37.97#ibcon#read 4, iclass 36, count 0 2006.229.10:56:37.97#ibcon#about to read 5, iclass 36, count 0 2006.229.10:56:37.97#ibcon#read 5, iclass 36, count 0 2006.229.10:56:37.97#ibcon#about to read 6, iclass 36, count 0 2006.229.10:56:37.97#ibcon#read 6, iclass 36, count 0 2006.229.10:56:37.97#ibcon#end of sib2, iclass 36, count 0 2006.229.10:56:37.97#ibcon#*after write, iclass 36, count 0 2006.229.10:56:37.97#ibcon#*before return 0, iclass 36, count 0 2006.229.10:56:37.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:37.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:37.97#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:56:37.97#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:56:37.97$vck44/va=6,4 2006.229.10:56:37.97#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.10:56:37.97#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.10:56:37.97#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:37.97#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:38.03#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:38.03#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:38.03#ibcon#enter wrdev, iclass 38, count 2 2006.229.10:56:38.03#ibcon#first serial, iclass 38, count 2 2006.229.10:56:38.03#ibcon#enter sib2, iclass 38, count 2 2006.229.10:56:38.03#ibcon#flushed, iclass 38, count 2 2006.229.10:56:38.03#ibcon#about to write, iclass 38, count 2 2006.229.10:56:38.03#ibcon#wrote, iclass 38, count 2 2006.229.10:56:38.03#ibcon#about to read 3, iclass 38, count 2 2006.229.10:56:38.05#ibcon#read 3, iclass 38, count 2 2006.229.10:56:38.05#ibcon#about to read 4, iclass 38, count 2 2006.229.10:56:38.05#ibcon#read 4, iclass 38, count 2 2006.229.10:56:38.05#ibcon#about to read 5, iclass 38, count 2 2006.229.10:56:38.05#ibcon#read 5, iclass 38, count 2 2006.229.10:56:38.05#ibcon#about to read 6, iclass 38, count 2 2006.229.10:56:38.05#ibcon#read 6, iclass 38, count 2 2006.229.10:56:38.05#ibcon#end of sib2, iclass 38, count 2 2006.229.10:56:38.05#ibcon#*mode == 0, iclass 38, count 2 2006.229.10:56:38.05#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.10:56:38.05#ibcon#[25=AT06-04\r\n] 2006.229.10:56:38.05#ibcon#*before write, iclass 38, count 2 2006.229.10:56:38.05#ibcon#enter sib2, iclass 38, count 2 2006.229.10:56:38.05#ibcon#flushed, iclass 38, count 2 2006.229.10:56:38.05#ibcon#about to write, iclass 38, count 2 2006.229.10:56:38.05#ibcon#wrote, iclass 38, count 2 2006.229.10:56:38.05#ibcon#about to read 3, iclass 38, count 2 2006.229.10:56:38.08#ibcon#read 3, iclass 38, count 2 2006.229.10:56:38.08#ibcon#about to read 4, iclass 38, count 2 2006.229.10:56:38.08#ibcon#read 4, iclass 38, count 2 2006.229.10:56:38.08#ibcon#about to read 5, iclass 38, count 2 2006.229.10:56:38.08#ibcon#read 5, iclass 38, count 2 2006.229.10:56:38.08#ibcon#about to read 6, iclass 38, count 2 2006.229.10:56:38.08#ibcon#read 6, iclass 38, count 2 2006.229.10:56:38.08#ibcon#end of sib2, iclass 38, count 2 2006.229.10:56:38.08#ibcon#*after write, iclass 38, count 2 2006.229.10:56:38.08#ibcon#*before return 0, iclass 38, count 2 2006.229.10:56:38.08#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:38.08#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:38.08#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.10:56:38.08#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:38.08#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:38.20#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:38.20#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:38.20#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:56:38.20#ibcon#first serial, iclass 38, count 0 2006.229.10:56:38.20#ibcon#enter sib2, iclass 38, count 0 2006.229.10:56:38.20#ibcon#flushed, iclass 38, count 0 2006.229.10:56:38.20#ibcon#about to write, iclass 38, count 0 2006.229.10:56:38.20#ibcon#wrote, iclass 38, count 0 2006.229.10:56:38.20#ibcon#about to read 3, iclass 38, count 0 2006.229.10:56:38.22#ibcon#read 3, iclass 38, count 0 2006.229.10:56:38.22#ibcon#about to read 4, iclass 38, count 0 2006.229.10:56:38.22#ibcon#read 4, iclass 38, count 0 2006.229.10:56:38.22#ibcon#about to read 5, iclass 38, count 0 2006.229.10:56:38.22#ibcon#read 5, iclass 38, count 0 2006.229.10:56:38.22#ibcon#about to read 6, iclass 38, count 0 2006.229.10:56:38.22#ibcon#read 6, iclass 38, count 0 2006.229.10:56:38.22#ibcon#end of sib2, iclass 38, count 0 2006.229.10:56:38.22#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:56:38.22#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:56:38.22#ibcon#[25=USB\r\n] 2006.229.10:56:38.22#ibcon#*before write, iclass 38, count 0 2006.229.10:56:38.22#ibcon#enter sib2, iclass 38, count 0 2006.229.10:56:38.22#ibcon#flushed, iclass 38, count 0 2006.229.10:56:38.22#ibcon#about to write, iclass 38, count 0 2006.229.10:56:38.22#ibcon#wrote, iclass 38, count 0 2006.229.10:56:38.22#ibcon#about to read 3, iclass 38, count 0 2006.229.10:56:38.25#ibcon#read 3, iclass 38, count 0 2006.229.10:56:38.25#ibcon#about to read 4, iclass 38, count 0 2006.229.10:56:38.25#ibcon#read 4, iclass 38, count 0 2006.229.10:56:38.25#ibcon#about to read 5, iclass 38, count 0 2006.229.10:56:38.25#ibcon#read 5, iclass 38, count 0 2006.229.10:56:38.25#ibcon#about to read 6, iclass 38, count 0 2006.229.10:56:38.25#ibcon#read 6, iclass 38, count 0 2006.229.10:56:38.25#ibcon#end of sib2, iclass 38, count 0 2006.229.10:56:38.25#ibcon#*after write, iclass 38, count 0 2006.229.10:56:38.25#ibcon#*before return 0, iclass 38, count 0 2006.229.10:56:38.25#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:38.25#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:38.25#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:56:38.25#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:56:38.25$vck44/valo=7,864.99 2006.229.10:56:38.25#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.10:56:38.25#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.10:56:38.25#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:38.25#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:38.25#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:38.25#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:38.25#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:56:38.25#ibcon#first serial, iclass 40, count 0 2006.229.10:56:38.25#ibcon#enter sib2, iclass 40, count 0 2006.229.10:56:38.25#ibcon#flushed, iclass 40, count 0 2006.229.10:56:38.25#ibcon#about to write, iclass 40, count 0 2006.229.10:56:38.25#ibcon#wrote, iclass 40, count 0 2006.229.10:56:38.25#ibcon#about to read 3, iclass 40, count 0 2006.229.10:56:38.27#ibcon#read 3, iclass 40, count 0 2006.229.10:56:38.27#ibcon#about to read 4, iclass 40, count 0 2006.229.10:56:38.27#ibcon#read 4, iclass 40, count 0 2006.229.10:56:38.27#ibcon#about to read 5, iclass 40, count 0 2006.229.10:56:38.27#ibcon#read 5, iclass 40, count 0 2006.229.10:56:38.27#ibcon#about to read 6, iclass 40, count 0 2006.229.10:56:38.27#ibcon#read 6, iclass 40, count 0 2006.229.10:56:38.27#ibcon#end of sib2, iclass 40, count 0 2006.229.10:56:38.27#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:56:38.27#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:56:38.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.10:56:38.27#ibcon#*before write, iclass 40, count 0 2006.229.10:56:38.27#ibcon#enter sib2, iclass 40, count 0 2006.229.10:56:38.27#ibcon#flushed, iclass 40, count 0 2006.229.10:56:38.27#ibcon#about to write, iclass 40, count 0 2006.229.10:56:38.27#ibcon#wrote, iclass 40, count 0 2006.229.10:56:38.27#ibcon#about to read 3, iclass 40, count 0 2006.229.10:56:38.31#ibcon#read 3, iclass 40, count 0 2006.229.10:56:38.31#ibcon#about to read 4, iclass 40, count 0 2006.229.10:56:38.31#ibcon#read 4, iclass 40, count 0 2006.229.10:56:38.31#ibcon#about to read 5, iclass 40, count 0 2006.229.10:56:38.31#ibcon#read 5, iclass 40, count 0 2006.229.10:56:38.31#ibcon#about to read 6, iclass 40, count 0 2006.229.10:56:38.31#ibcon#read 6, iclass 40, count 0 2006.229.10:56:38.31#ibcon#end of sib2, iclass 40, count 0 2006.229.10:56:38.31#ibcon#*after write, iclass 40, count 0 2006.229.10:56:38.31#ibcon#*before return 0, iclass 40, count 0 2006.229.10:56:38.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:38.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:38.31#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:56:38.31#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:56:38.31$vck44/va=7,5 2006.229.10:56:38.31#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.10:56:38.31#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.10:56:38.31#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:38.31#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:38.37#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:38.37#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:38.37#ibcon#enter wrdev, iclass 4, count 2 2006.229.10:56:38.37#ibcon#first serial, iclass 4, count 2 2006.229.10:56:38.37#ibcon#enter sib2, iclass 4, count 2 2006.229.10:56:38.37#ibcon#flushed, iclass 4, count 2 2006.229.10:56:38.37#ibcon#about to write, iclass 4, count 2 2006.229.10:56:38.37#ibcon#wrote, iclass 4, count 2 2006.229.10:56:38.37#ibcon#about to read 3, iclass 4, count 2 2006.229.10:56:38.39#ibcon#read 3, iclass 4, count 2 2006.229.10:56:38.39#ibcon#about to read 4, iclass 4, count 2 2006.229.10:56:38.39#ibcon#read 4, iclass 4, count 2 2006.229.10:56:38.39#ibcon#about to read 5, iclass 4, count 2 2006.229.10:56:38.39#ibcon#read 5, iclass 4, count 2 2006.229.10:56:38.39#ibcon#about to read 6, iclass 4, count 2 2006.229.10:56:38.39#ibcon#read 6, iclass 4, count 2 2006.229.10:56:38.39#ibcon#end of sib2, iclass 4, count 2 2006.229.10:56:38.39#ibcon#*mode == 0, iclass 4, count 2 2006.229.10:56:38.39#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.10:56:38.39#ibcon#[25=AT07-05\r\n] 2006.229.10:56:38.39#ibcon#*before write, iclass 4, count 2 2006.229.10:56:38.39#ibcon#enter sib2, iclass 4, count 2 2006.229.10:56:38.39#ibcon#flushed, iclass 4, count 2 2006.229.10:56:38.39#ibcon#about to write, iclass 4, count 2 2006.229.10:56:38.39#ibcon#wrote, iclass 4, count 2 2006.229.10:56:38.39#ibcon#about to read 3, iclass 4, count 2 2006.229.10:56:38.42#ibcon#read 3, iclass 4, count 2 2006.229.10:56:38.42#ibcon#about to read 4, iclass 4, count 2 2006.229.10:56:38.42#ibcon#read 4, iclass 4, count 2 2006.229.10:56:38.42#ibcon#about to read 5, iclass 4, count 2 2006.229.10:56:38.42#ibcon#read 5, iclass 4, count 2 2006.229.10:56:38.42#ibcon#about to read 6, iclass 4, count 2 2006.229.10:56:38.42#ibcon#read 6, iclass 4, count 2 2006.229.10:56:38.42#ibcon#end of sib2, iclass 4, count 2 2006.229.10:56:38.42#ibcon#*after write, iclass 4, count 2 2006.229.10:56:38.42#ibcon#*before return 0, iclass 4, count 2 2006.229.10:56:38.42#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:38.42#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:38.42#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.10:56:38.42#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:38.42#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:38.54#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:38.54#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:38.54#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:56:38.54#ibcon#first serial, iclass 4, count 0 2006.229.10:56:38.54#ibcon#enter sib2, iclass 4, count 0 2006.229.10:56:38.54#ibcon#flushed, iclass 4, count 0 2006.229.10:56:38.54#ibcon#about to write, iclass 4, count 0 2006.229.10:56:38.54#ibcon#wrote, iclass 4, count 0 2006.229.10:56:38.54#ibcon#about to read 3, iclass 4, count 0 2006.229.10:56:38.56#ibcon#read 3, iclass 4, count 0 2006.229.10:56:38.56#ibcon#about to read 4, iclass 4, count 0 2006.229.10:56:38.56#ibcon#read 4, iclass 4, count 0 2006.229.10:56:38.56#ibcon#about to read 5, iclass 4, count 0 2006.229.10:56:38.56#ibcon#read 5, iclass 4, count 0 2006.229.10:56:38.56#ibcon#about to read 6, iclass 4, count 0 2006.229.10:56:38.56#ibcon#read 6, iclass 4, count 0 2006.229.10:56:38.56#ibcon#end of sib2, iclass 4, count 0 2006.229.10:56:38.56#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:56:38.56#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:56:38.56#ibcon#[25=USB\r\n] 2006.229.10:56:38.56#ibcon#*before write, iclass 4, count 0 2006.229.10:56:38.56#ibcon#enter sib2, iclass 4, count 0 2006.229.10:56:38.56#ibcon#flushed, iclass 4, count 0 2006.229.10:56:38.56#ibcon#about to write, iclass 4, count 0 2006.229.10:56:38.56#ibcon#wrote, iclass 4, count 0 2006.229.10:56:38.56#ibcon#about to read 3, iclass 4, count 0 2006.229.10:56:38.59#ibcon#read 3, iclass 4, count 0 2006.229.10:56:38.59#ibcon#about to read 4, iclass 4, count 0 2006.229.10:56:38.59#ibcon#read 4, iclass 4, count 0 2006.229.10:56:38.59#ibcon#about to read 5, iclass 4, count 0 2006.229.10:56:38.59#ibcon#read 5, iclass 4, count 0 2006.229.10:56:38.59#ibcon#about to read 6, iclass 4, count 0 2006.229.10:56:38.59#ibcon#read 6, iclass 4, count 0 2006.229.10:56:38.59#ibcon#end of sib2, iclass 4, count 0 2006.229.10:56:38.59#ibcon#*after write, iclass 4, count 0 2006.229.10:56:38.59#ibcon#*before return 0, iclass 4, count 0 2006.229.10:56:38.59#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:38.59#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:38.59#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:56:38.59#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:56:38.59$vck44/valo=8,884.99 2006.229.10:56:38.59#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.10:56:38.59#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.10:56:38.59#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:38.59#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:38.59#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:38.59#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:38.59#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:56:38.59#ibcon#first serial, iclass 6, count 0 2006.229.10:56:38.59#ibcon#enter sib2, iclass 6, count 0 2006.229.10:56:38.59#ibcon#flushed, iclass 6, count 0 2006.229.10:56:38.59#ibcon#about to write, iclass 6, count 0 2006.229.10:56:38.59#ibcon#wrote, iclass 6, count 0 2006.229.10:56:38.59#ibcon#about to read 3, iclass 6, count 0 2006.229.10:56:38.61#ibcon#read 3, iclass 6, count 0 2006.229.10:56:38.61#ibcon#about to read 4, iclass 6, count 0 2006.229.10:56:38.61#ibcon#read 4, iclass 6, count 0 2006.229.10:56:38.61#ibcon#about to read 5, iclass 6, count 0 2006.229.10:56:38.61#ibcon#read 5, iclass 6, count 0 2006.229.10:56:38.61#ibcon#about to read 6, iclass 6, count 0 2006.229.10:56:38.61#ibcon#read 6, iclass 6, count 0 2006.229.10:56:38.61#ibcon#end of sib2, iclass 6, count 0 2006.229.10:56:38.61#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:56:38.61#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:56:38.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.10:56:38.61#ibcon#*before write, iclass 6, count 0 2006.229.10:56:38.61#ibcon#enter sib2, iclass 6, count 0 2006.229.10:56:38.61#ibcon#flushed, iclass 6, count 0 2006.229.10:56:38.61#ibcon#about to write, iclass 6, count 0 2006.229.10:56:38.61#ibcon#wrote, iclass 6, count 0 2006.229.10:56:38.61#ibcon#about to read 3, iclass 6, count 0 2006.229.10:56:38.65#ibcon#read 3, iclass 6, count 0 2006.229.10:56:38.65#ibcon#about to read 4, iclass 6, count 0 2006.229.10:56:38.65#ibcon#read 4, iclass 6, count 0 2006.229.10:56:38.65#ibcon#about to read 5, iclass 6, count 0 2006.229.10:56:38.65#ibcon#read 5, iclass 6, count 0 2006.229.10:56:38.65#ibcon#about to read 6, iclass 6, count 0 2006.229.10:56:38.65#ibcon#read 6, iclass 6, count 0 2006.229.10:56:38.65#ibcon#end of sib2, iclass 6, count 0 2006.229.10:56:38.65#ibcon#*after write, iclass 6, count 0 2006.229.10:56:38.65#ibcon#*before return 0, iclass 6, count 0 2006.229.10:56:38.65#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:38.65#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:38.65#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:56:38.65#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:56:38.65$vck44/va=8,6 2006.229.10:56:38.65#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.10:56:38.65#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.10:56:38.65#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:38.65#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:56:38.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:56:38.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:56:38.71#ibcon#enter wrdev, iclass 10, count 2 2006.229.10:56:38.71#ibcon#first serial, iclass 10, count 2 2006.229.10:56:38.71#ibcon#enter sib2, iclass 10, count 2 2006.229.10:56:38.71#ibcon#flushed, iclass 10, count 2 2006.229.10:56:38.71#ibcon#about to write, iclass 10, count 2 2006.229.10:56:38.71#ibcon#wrote, iclass 10, count 2 2006.229.10:56:38.71#ibcon#about to read 3, iclass 10, count 2 2006.229.10:56:38.73#ibcon#read 3, iclass 10, count 2 2006.229.10:56:38.73#ibcon#about to read 4, iclass 10, count 2 2006.229.10:56:38.73#ibcon#read 4, iclass 10, count 2 2006.229.10:56:38.73#ibcon#about to read 5, iclass 10, count 2 2006.229.10:56:38.73#ibcon#read 5, iclass 10, count 2 2006.229.10:56:38.73#ibcon#about to read 6, iclass 10, count 2 2006.229.10:56:38.73#ibcon#read 6, iclass 10, count 2 2006.229.10:56:38.73#ibcon#end of sib2, iclass 10, count 2 2006.229.10:56:38.73#ibcon#*mode == 0, iclass 10, count 2 2006.229.10:56:38.73#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.10:56:38.73#ibcon#[25=AT08-06\r\n] 2006.229.10:56:38.73#ibcon#*before write, iclass 10, count 2 2006.229.10:56:38.73#ibcon#enter sib2, iclass 10, count 2 2006.229.10:56:38.73#ibcon#flushed, iclass 10, count 2 2006.229.10:56:38.73#ibcon#about to write, iclass 10, count 2 2006.229.10:56:38.73#ibcon#wrote, iclass 10, count 2 2006.229.10:56:38.73#ibcon#about to read 3, iclass 10, count 2 2006.229.10:56:38.76#ibcon#read 3, iclass 10, count 2 2006.229.10:56:38.76#ibcon#about to read 4, iclass 10, count 2 2006.229.10:56:38.76#ibcon#read 4, iclass 10, count 2 2006.229.10:56:38.76#ibcon#about to read 5, iclass 10, count 2 2006.229.10:56:38.76#ibcon#read 5, iclass 10, count 2 2006.229.10:56:38.76#ibcon#about to read 6, iclass 10, count 2 2006.229.10:56:38.76#ibcon#read 6, iclass 10, count 2 2006.229.10:56:38.76#ibcon#end of sib2, iclass 10, count 2 2006.229.10:56:38.76#ibcon#*after write, iclass 10, count 2 2006.229.10:56:38.76#ibcon#*before return 0, iclass 10, count 2 2006.229.10:56:38.76#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:56:38.76#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.10:56:38.76#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.10:56:38.76#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:38.76#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:56:38.88#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:56:38.88#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:56:38.88#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:56:38.88#ibcon#first serial, iclass 10, count 0 2006.229.10:56:38.88#ibcon#enter sib2, iclass 10, count 0 2006.229.10:56:38.88#ibcon#flushed, iclass 10, count 0 2006.229.10:56:38.88#ibcon#about to write, iclass 10, count 0 2006.229.10:56:38.88#ibcon#wrote, iclass 10, count 0 2006.229.10:56:38.88#ibcon#about to read 3, iclass 10, count 0 2006.229.10:56:38.90#ibcon#read 3, iclass 10, count 0 2006.229.10:56:38.90#ibcon#about to read 4, iclass 10, count 0 2006.229.10:56:38.90#ibcon#read 4, iclass 10, count 0 2006.229.10:56:38.90#ibcon#about to read 5, iclass 10, count 0 2006.229.10:56:38.90#ibcon#read 5, iclass 10, count 0 2006.229.10:56:38.90#ibcon#about to read 6, iclass 10, count 0 2006.229.10:56:38.90#ibcon#read 6, iclass 10, count 0 2006.229.10:56:38.90#ibcon#end of sib2, iclass 10, count 0 2006.229.10:56:38.90#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:56:38.90#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:56:38.90#ibcon#[25=USB\r\n] 2006.229.10:56:38.90#ibcon#*before write, iclass 10, count 0 2006.229.10:56:38.90#ibcon#enter sib2, iclass 10, count 0 2006.229.10:56:38.90#ibcon#flushed, iclass 10, count 0 2006.229.10:56:38.90#ibcon#about to write, iclass 10, count 0 2006.229.10:56:38.90#ibcon#wrote, iclass 10, count 0 2006.229.10:56:38.90#ibcon#about to read 3, iclass 10, count 0 2006.229.10:56:38.93#ibcon#read 3, iclass 10, count 0 2006.229.10:56:38.93#ibcon#about to read 4, iclass 10, count 0 2006.229.10:56:38.93#ibcon#read 4, iclass 10, count 0 2006.229.10:56:38.93#ibcon#about to read 5, iclass 10, count 0 2006.229.10:56:38.93#ibcon#read 5, iclass 10, count 0 2006.229.10:56:38.93#ibcon#about to read 6, iclass 10, count 0 2006.229.10:56:38.93#ibcon#read 6, iclass 10, count 0 2006.229.10:56:38.93#ibcon#end of sib2, iclass 10, count 0 2006.229.10:56:38.93#ibcon#*after write, iclass 10, count 0 2006.229.10:56:38.93#ibcon#*before return 0, iclass 10, count 0 2006.229.10:56:38.93#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:56:38.93#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.10:56:38.93#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:56:38.93#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:56:38.93$vck44/vblo=1,629.99 2006.229.10:56:38.93#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.10:56:38.93#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.10:56:38.93#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:38.93#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:56:38.93#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:56:38.93#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:56:38.93#ibcon#enter wrdev, iclass 12, count 0 2006.229.10:56:38.93#ibcon#first serial, iclass 12, count 0 2006.229.10:56:38.93#ibcon#enter sib2, iclass 12, count 0 2006.229.10:56:38.93#ibcon#flushed, iclass 12, count 0 2006.229.10:56:38.93#ibcon#about to write, iclass 12, count 0 2006.229.10:56:38.93#ibcon#wrote, iclass 12, count 0 2006.229.10:56:38.93#ibcon#about to read 3, iclass 12, count 0 2006.229.10:56:38.95#ibcon#read 3, iclass 12, count 0 2006.229.10:56:38.95#ibcon#about to read 4, iclass 12, count 0 2006.229.10:56:38.95#ibcon#read 4, iclass 12, count 0 2006.229.10:56:38.95#ibcon#about to read 5, iclass 12, count 0 2006.229.10:56:38.95#ibcon#read 5, iclass 12, count 0 2006.229.10:56:38.95#ibcon#about to read 6, iclass 12, count 0 2006.229.10:56:38.95#ibcon#read 6, iclass 12, count 0 2006.229.10:56:38.95#ibcon#end of sib2, iclass 12, count 0 2006.229.10:56:38.95#ibcon#*mode == 0, iclass 12, count 0 2006.229.10:56:38.95#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.10:56:38.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.10:56:38.95#ibcon#*before write, iclass 12, count 0 2006.229.10:56:38.95#ibcon#enter sib2, iclass 12, count 0 2006.229.10:56:38.95#ibcon#flushed, iclass 12, count 0 2006.229.10:56:38.95#ibcon#about to write, iclass 12, count 0 2006.229.10:56:38.95#ibcon#wrote, iclass 12, count 0 2006.229.10:56:38.95#ibcon#about to read 3, iclass 12, count 0 2006.229.10:56:38.99#ibcon#read 3, iclass 12, count 0 2006.229.10:56:38.99#ibcon#about to read 4, iclass 12, count 0 2006.229.10:56:38.99#ibcon#read 4, iclass 12, count 0 2006.229.10:56:38.99#ibcon#about to read 5, iclass 12, count 0 2006.229.10:56:38.99#ibcon#read 5, iclass 12, count 0 2006.229.10:56:38.99#ibcon#about to read 6, iclass 12, count 0 2006.229.10:56:38.99#ibcon#read 6, iclass 12, count 0 2006.229.10:56:38.99#ibcon#end of sib2, iclass 12, count 0 2006.229.10:56:38.99#ibcon#*after write, iclass 12, count 0 2006.229.10:56:38.99#ibcon#*before return 0, iclass 12, count 0 2006.229.10:56:38.99#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:56:38.99#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.10:56:38.99#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.10:56:38.99#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.10:56:38.99$vck44/vb=1,4 2006.229.10:56:38.99#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.10:56:38.99#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.10:56:38.99#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:38.99#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:56:38.99#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:56:38.99#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:56:38.99#ibcon#enter wrdev, iclass 14, count 2 2006.229.10:56:38.99#ibcon#first serial, iclass 14, count 2 2006.229.10:56:38.99#ibcon#enter sib2, iclass 14, count 2 2006.229.10:56:38.99#ibcon#flushed, iclass 14, count 2 2006.229.10:56:38.99#ibcon#about to write, iclass 14, count 2 2006.229.10:56:38.99#ibcon#wrote, iclass 14, count 2 2006.229.10:56:38.99#ibcon#about to read 3, iclass 14, count 2 2006.229.10:56:39.01#ibcon#read 3, iclass 14, count 2 2006.229.10:56:39.01#ibcon#about to read 4, iclass 14, count 2 2006.229.10:56:39.01#ibcon#read 4, iclass 14, count 2 2006.229.10:56:39.01#ibcon#about to read 5, iclass 14, count 2 2006.229.10:56:39.01#ibcon#read 5, iclass 14, count 2 2006.229.10:56:39.01#ibcon#about to read 6, iclass 14, count 2 2006.229.10:56:39.01#ibcon#read 6, iclass 14, count 2 2006.229.10:56:39.01#ibcon#end of sib2, iclass 14, count 2 2006.229.10:56:39.01#ibcon#*mode == 0, iclass 14, count 2 2006.229.10:56:39.01#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.10:56:39.01#ibcon#[27=AT01-04\r\n] 2006.229.10:56:39.01#ibcon#*before write, iclass 14, count 2 2006.229.10:56:39.01#ibcon#enter sib2, iclass 14, count 2 2006.229.10:56:39.01#ibcon#flushed, iclass 14, count 2 2006.229.10:56:39.01#ibcon#about to write, iclass 14, count 2 2006.229.10:56:39.01#ibcon#wrote, iclass 14, count 2 2006.229.10:56:39.01#ibcon#about to read 3, iclass 14, count 2 2006.229.10:56:39.04#ibcon#read 3, iclass 14, count 2 2006.229.10:56:39.04#ibcon#about to read 4, iclass 14, count 2 2006.229.10:56:39.04#ibcon#read 4, iclass 14, count 2 2006.229.10:56:39.04#ibcon#about to read 5, iclass 14, count 2 2006.229.10:56:39.04#ibcon#read 5, iclass 14, count 2 2006.229.10:56:39.04#ibcon#about to read 6, iclass 14, count 2 2006.229.10:56:39.04#ibcon#read 6, iclass 14, count 2 2006.229.10:56:39.04#ibcon#end of sib2, iclass 14, count 2 2006.229.10:56:39.04#ibcon#*after write, iclass 14, count 2 2006.229.10:56:39.04#ibcon#*before return 0, iclass 14, count 2 2006.229.10:56:39.04#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:56:39.04#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.10:56:39.04#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.10:56:39.04#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:39.04#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:56:39.16#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:56:39.16#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:56:39.16#ibcon#enter wrdev, iclass 14, count 0 2006.229.10:56:39.16#ibcon#first serial, iclass 14, count 0 2006.229.10:56:39.16#ibcon#enter sib2, iclass 14, count 0 2006.229.10:56:39.16#ibcon#flushed, iclass 14, count 0 2006.229.10:56:39.16#ibcon#about to write, iclass 14, count 0 2006.229.10:56:39.16#ibcon#wrote, iclass 14, count 0 2006.229.10:56:39.16#ibcon#about to read 3, iclass 14, count 0 2006.229.10:56:39.18#ibcon#read 3, iclass 14, count 0 2006.229.10:56:39.18#ibcon#about to read 4, iclass 14, count 0 2006.229.10:56:39.18#ibcon#read 4, iclass 14, count 0 2006.229.10:56:39.18#ibcon#about to read 5, iclass 14, count 0 2006.229.10:56:39.18#ibcon#read 5, iclass 14, count 0 2006.229.10:56:39.18#ibcon#about to read 6, iclass 14, count 0 2006.229.10:56:39.18#ibcon#read 6, iclass 14, count 0 2006.229.10:56:39.18#ibcon#end of sib2, iclass 14, count 0 2006.229.10:56:39.18#ibcon#*mode == 0, iclass 14, count 0 2006.229.10:56:39.18#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.10:56:39.18#ibcon#[27=USB\r\n] 2006.229.10:56:39.18#ibcon#*before write, iclass 14, count 0 2006.229.10:56:39.18#ibcon#enter sib2, iclass 14, count 0 2006.229.10:56:39.18#ibcon#flushed, iclass 14, count 0 2006.229.10:56:39.18#ibcon#about to write, iclass 14, count 0 2006.229.10:56:39.18#ibcon#wrote, iclass 14, count 0 2006.229.10:56:39.18#ibcon#about to read 3, iclass 14, count 0 2006.229.10:56:39.21#ibcon#read 3, iclass 14, count 0 2006.229.10:56:39.21#ibcon#about to read 4, iclass 14, count 0 2006.229.10:56:39.21#ibcon#read 4, iclass 14, count 0 2006.229.10:56:39.21#ibcon#about to read 5, iclass 14, count 0 2006.229.10:56:39.21#ibcon#read 5, iclass 14, count 0 2006.229.10:56:39.21#ibcon#about to read 6, iclass 14, count 0 2006.229.10:56:39.21#ibcon#read 6, iclass 14, count 0 2006.229.10:56:39.21#ibcon#end of sib2, iclass 14, count 0 2006.229.10:56:39.21#ibcon#*after write, iclass 14, count 0 2006.229.10:56:39.21#ibcon#*before return 0, iclass 14, count 0 2006.229.10:56:39.21#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:56:39.21#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.10:56:39.21#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.10:56:39.21#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.10:56:39.21$vck44/vblo=2,634.99 2006.229.10:56:39.21#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.10:56:39.21#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.10:56:39.21#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:39.21#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:39.21#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:39.21#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:39.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.10:56:39.21#ibcon#first serial, iclass 16, count 0 2006.229.10:56:39.21#ibcon#enter sib2, iclass 16, count 0 2006.229.10:56:39.21#ibcon#flushed, iclass 16, count 0 2006.229.10:56:39.21#ibcon#about to write, iclass 16, count 0 2006.229.10:56:39.21#ibcon#wrote, iclass 16, count 0 2006.229.10:56:39.21#ibcon#about to read 3, iclass 16, count 0 2006.229.10:56:39.23#ibcon#read 3, iclass 16, count 0 2006.229.10:56:39.23#ibcon#about to read 4, iclass 16, count 0 2006.229.10:56:39.23#ibcon#read 4, iclass 16, count 0 2006.229.10:56:39.23#ibcon#about to read 5, iclass 16, count 0 2006.229.10:56:39.23#ibcon#read 5, iclass 16, count 0 2006.229.10:56:39.23#ibcon#about to read 6, iclass 16, count 0 2006.229.10:56:39.23#ibcon#read 6, iclass 16, count 0 2006.229.10:56:39.23#ibcon#end of sib2, iclass 16, count 0 2006.229.10:56:39.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.10:56:39.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.10:56:39.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.10:56:39.23#ibcon#*before write, iclass 16, count 0 2006.229.10:56:39.23#ibcon#enter sib2, iclass 16, count 0 2006.229.10:56:39.23#ibcon#flushed, iclass 16, count 0 2006.229.10:56:39.23#ibcon#about to write, iclass 16, count 0 2006.229.10:56:39.23#ibcon#wrote, iclass 16, count 0 2006.229.10:56:39.23#ibcon#about to read 3, iclass 16, count 0 2006.229.10:56:39.27#ibcon#read 3, iclass 16, count 0 2006.229.10:56:39.27#ibcon#about to read 4, iclass 16, count 0 2006.229.10:56:39.27#ibcon#read 4, iclass 16, count 0 2006.229.10:56:39.27#ibcon#about to read 5, iclass 16, count 0 2006.229.10:56:39.27#ibcon#read 5, iclass 16, count 0 2006.229.10:56:39.27#ibcon#about to read 6, iclass 16, count 0 2006.229.10:56:39.27#ibcon#read 6, iclass 16, count 0 2006.229.10:56:39.27#ibcon#end of sib2, iclass 16, count 0 2006.229.10:56:39.27#ibcon#*after write, iclass 16, count 0 2006.229.10:56:39.27#ibcon#*before return 0, iclass 16, count 0 2006.229.10:56:39.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:39.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.10:56:39.27#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.10:56:39.27#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.10:56:39.27$vck44/vb=2,4 2006.229.10:56:39.27#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.10:56:39.27#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.10:56:39.27#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:39.27#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:39.33#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:39.33#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:39.33#ibcon#enter wrdev, iclass 18, count 2 2006.229.10:56:39.33#ibcon#first serial, iclass 18, count 2 2006.229.10:56:39.33#ibcon#enter sib2, iclass 18, count 2 2006.229.10:56:39.33#ibcon#flushed, iclass 18, count 2 2006.229.10:56:39.33#ibcon#about to write, iclass 18, count 2 2006.229.10:56:39.33#ibcon#wrote, iclass 18, count 2 2006.229.10:56:39.33#ibcon#about to read 3, iclass 18, count 2 2006.229.10:56:39.35#ibcon#read 3, iclass 18, count 2 2006.229.10:56:39.35#ibcon#about to read 4, iclass 18, count 2 2006.229.10:56:39.35#ibcon#read 4, iclass 18, count 2 2006.229.10:56:39.35#ibcon#about to read 5, iclass 18, count 2 2006.229.10:56:39.35#ibcon#read 5, iclass 18, count 2 2006.229.10:56:39.35#ibcon#about to read 6, iclass 18, count 2 2006.229.10:56:39.35#ibcon#read 6, iclass 18, count 2 2006.229.10:56:39.35#ibcon#end of sib2, iclass 18, count 2 2006.229.10:56:39.35#ibcon#*mode == 0, iclass 18, count 2 2006.229.10:56:39.35#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.10:56:39.35#ibcon#[27=AT02-04\r\n] 2006.229.10:56:39.35#ibcon#*before write, iclass 18, count 2 2006.229.10:56:39.35#ibcon#enter sib2, iclass 18, count 2 2006.229.10:56:39.35#ibcon#flushed, iclass 18, count 2 2006.229.10:56:39.35#ibcon#about to write, iclass 18, count 2 2006.229.10:56:39.35#ibcon#wrote, iclass 18, count 2 2006.229.10:56:39.35#ibcon#about to read 3, iclass 18, count 2 2006.229.10:56:39.38#ibcon#read 3, iclass 18, count 2 2006.229.10:56:39.38#ibcon#about to read 4, iclass 18, count 2 2006.229.10:56:39.38#ibcon#read 4, iclass 18, count 2 2006.229.10:56:39.38#ibcon#about to read 5, iclass 18, count 2 2006.229.10:56:39.38#ibcon#read 5, iclass 18, count 2 2006.229.10:56:39.38#ibcon#about to read 6, iclass 18, count 2 2006.229.10:56:39.38#ibcon#read 6, iclass 18, count 2 2006.229.10:56:39.38#ibcon#end of sib2, iclass 18, count 2 2006.229.10:56:39.38#ibcon#*after write, iclass 18, count 2 2006.229.10:56:39.38#ibcon#*before return 0, iclass 18, count 2 2006.229.10:56:39.38#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:39.38#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.10:56:39.38#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.10:56:39.38#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:39.38#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:39.50#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:39.50#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:39.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.10:56:39.50#ibcon#first serial, iclass 18, count 0 2006.229.10:56:39.50#ibcon#enter sib2, iclass 18, count 0 2006.229.10:56:39.50#ibcon#flushed, iclass 18, count 0 2006.229.10:56:39.50#ibcon#about to write, iclass 18, count 0 2006.229.10:56:39.50#ibcon#wrote, iclass 18, count 0 2006.229.10:56:39.50#ibcon#about to read 3, iclass 18, count 0 2006.229.10:56:39.52#ibcon#read 3, iclass 18, count 0 2006.229.10:56:39.52#ibcon#about to read 4, iclass 18, count 0 2006.229.10:56:39.52#ibcon#read 4, iclass 18, count 0 2006.229.10:56:39.52#ibcon#about to read 5, iclass 18, count 0 2006.229.10:56:39.52#ibcon#read 5, iclass 18, count 0 2006.229.10:56:39.52#ibcon#about to read 6, iclass 18, count 0 2006.229.10:56:39.52#ibcon#read 6, iclass 18, count 0 2006.229.10:56:39.52#ibcon#end of sib2, iclass 18, count 0 2006.229.10:56:39.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.10:56:39.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.10:56:39.52#ibcon#[27=USB\r\n] 2006.229.10:56:39.52#ibcon#*before write, iclass 18, count 0 2006.229.10:56:39.52#ibcon#enter sib2, iclass 18, count 0 2006.229.10:56:39.52#ibcon#flushed, iclass 18, count 0 2006.229.10:56:39.52#ibcon#about to write, iclass 18, count 0 2006.229.10:56:39.52#ibcon#wrote, iclass 18, count 0 2006.229.10:56:39.52#ibcon#about to read 3, iclass 18, count 0 2006.229.10:56:39.55#ibcon#read 3, iclass 18, count 0 2006.229.10:56:39.55#ibcon#about to read 4, iclass 18, count 0 2006.229.10:56:39.55#ibcon#read 4, iclass 18, count 0 2006.229.10:56:39.55#ibcon#about to read 5, iclass 18, count 0 2006.229.10:56:39.55#ibcon#read 5, iclass 18, count 0 2006.229.10:56:39.55#ibcon#about to read 6, iclass 18, count 0 2006.229.10:56:39.55#ibcon#read 6, iclass 18, count 0 2006.229.10:56:39.55#ibcon#end of sib2, iclass 18, count 0 2006.229.10:56:39.55#ibcon#*after write, iclass 18, count 0 2006.229.10:56:39.55#ibcon#*before return 0, iclass 18, count 0 2006.229.10:56:39.55#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:39.55#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.10:56:39.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.10:56:39.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.10:56:39.55$vck44/vblo=3,649.99 2006.229.10:56:39.55#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.10:56:39.55#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.10:56:39.55#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:39.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:39.55#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:39.55#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:39.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.10:56:39.55#ibcon#first serial, iclass 20, count 0 2006.229.10:56:39.55#ibcon#enter sib2, iclass 20, count 0 2006.229.10:56:39.55#ibcon#flushed, iclass 20, count 0 2006.229.10:56:39.55#ibcon#about to write, iclass 20, count 0 2006.229.10:56:39.55#ibcon#wrote, iclass 20, count 0 2006.229.10:56:39.55#ibcon#about to read 3, iclass 20, count 0 2006.229.10:56:39.57#ibcon#read 3, iclass 20, count 0 2006.229.10:56:39.57#ibcon#about to read 4, iclass 20, count 0 2006.229.10:56:39.57#ibcon#read 4, iclass 20, count 0 2006.229.10:56:39.57#ibcon#about to read 5, iclass 20, count 0 2006.229.10:56:39.57#ibcon#read 5, iclass 20, count 0 2006.229.10:56:39.57#ibcon#about to read 6, iclass 20, count 0 2006.229.10:56:39.57#ibcon#read 6, iclass 20, count 0 2006.229.10:56:39.57#ibcon#end of sib2, iclass 20, count 0 2006.229.10:56:39.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.10:56:39.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.10:56:39.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.10:56:39.57#ibcon#*before write, iclass 20, count 0 2006.229.10:56:39.57#ibcon#enter sib2, iclass 20, count 0 2006.229.10:56:39.57#ibcon#flushed, iclass 20, count 0 2006.229.10:56:39.57#ibcon#about to write, iclass 20, count 0 2006.229.10:56:39.57#ibcon#wrote, iclass 20, count 0 2006.229.10:56:39.57#ibcon#about to read 3, iclass 20, count 0 2006.229.10:56:39.61#ibcon#read 3, iclass 20, count 0 2006.229.10:56:39.61#ibcon#about to read 4, iclass 20, count 0 2006.229.10:56:39.61#ibcon#read 4, iclass 20, count 0 2006.229.10:56:39.61#ibcon#about to read 5, iclass 20, count 0 2006.229.10:56:39.61#ibcon#read 5, iclass 20, count 0 2006.229.10:56:39.61#ibcon#about to read 6, iclass 20, count 0 2006.229.10:56:39.61#ibcon#read 6, iclass 20, count 0 2006.229.10:56:39.61#ibcon#end of sib2, iclass 20, count 0 2006.229.10:56:39.61#ibcon#*after write, iclass 20, count 0 2006.229.10:56:39.61#ibcon#*before return 0, iclass 20, count 0 2006.229.10:56:39.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:39.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.10:56:39.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.10:56:39.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.10:56:39.61$vck44/vb=3,4 2006.229.10:56:39.61#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.10:56:39.61#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.10:56:39.61#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:39.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:39.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:39.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:39.67#ibcon#enter wrdev, iclass 22, count 2 2006.229.10:56:39.67#ibcon#first serial, iclass 22, count 2 2006.229.10:56:39.67#ibcon#enter sib2, iclass 22, count 2 2006.229.10:56:39.67#ibcon#flushed, iclass 22, count 2 2006.229.10:56:39.67#ibcon#about to write, iclass 22, count 2 2006.229.10:56:39.67#ibcon#wrote, iclass 22, count 2 2006.229.10:56:39.67#ibcon#about to read 3, iclass 22, count 2 2006.229.10:56:39.69#ibcon#read 3, iclass 22, count 2 2006.229.10:56:39.69#ibcon#about to read 4, iclass 22, count 2 2006.229.10:56:39.69#ibcon#read 4, iclass 22, count 2 2006.229.10:56:39.69#ibcon#about to read 5, iclass 22, count 2 2006.229.10:56:39.69#ibcon#read 5, iclass 22, count 2 2006.229.10:56:39.69#ibcon#about to read 6, iclass 22, count 2 2006.229.10:56:39.69#ibcon#read 6, iclass 22, count 2 2006.229.10:56:39.69#ibcon#end of sib2, iclass 22, count 2 2006.229.10:56:39.69#ibcon#*mode == 0, iclass 22, count 2 2006.229.10:56:39.69#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.10:56:39.69#ibcon#[27=AT03-04\r\n] 2006.229.10:56:39.69#ibcon#*before write, iclass 22, count 2 2006.229.10:56:39.69#ibcon#enter sib2, iclass 22, count 2 2006.229.10:56:39.69#ibcon#flushed, iclass 22, count 2 2006.229.10:56:39.69#ibcon#about to write, iclass 22, count 2 2006.229.10:56:39.69#ibcon#wrote, iclass 22, count 2 2006.229.10:56:39.69#ibcon#about to read 3, iclass 22, count 2 2006.229.10:56:39.72#ibcon#read 3, iclass 22, count 2 2006.229.10:56:39.72#ibcon#about to read 4, iclass 22, count 2 2006.229.10:56:39.72#ibcon#read 4, iclass 22, count 2 2006.229.10:56:39.72#ibcon#about to read 5, iclass 22, count 2 2006.229.10:56:39.72#ibcon#read 5, iclass 22, count 2 2006.229.10:56:39.72#ibcon#about to read 6, iclass 22, count 2 2006.229.10:56:39.72#ibcon#read 6, iclass 22, count 2 2006.229.10:56:39.72#ibcon#end of sib2, iclass 22, count 2 2006.229.10:56:39.72#ibcon#*after write, iclass 22, count 2 2006.229.10:56:39.72#ibcon#*before return 0, iclass 22, count 2 2006.229.10:56:39.72#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:39.72#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.10:56:39.72#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.10:56:39.72#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:39.72#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:39.84#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:39.84#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:39.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.10:56:39.84#ibcon#first serial, iclass 22, count 0 2006.229.10:56:39.84#ibcon#enter sib2, iclass 22, count 0 2006.229.10:56:39.84#ibcon#flushed, iclass 22, count 0 2006.229.10:56:39.84#ibcon#about to write, iclass 22, count 0 2006.229.10:56:39.84#ibcon#wrote, iclass 22, count 0 2006.229.10:56:39.84#ibcon#about to read 3, iclass 22, count 0 2006.229.10:56:39.86#ibcon#read 3, iclass 22, count 0 2006.229.10:56:39.86#ibcon#about to read 4, iclass 22, count 0 2006.229.10:56:39.86#ibcon#read 4, iclass 22, count 0 2006.229.10:56:39.86#ibcon#about to read 5, iclass 22, count 0 2006.229.10:56:39.86#ibcon#read 5, iclass 22, count 0 2006.229.10:56:39.86#ibcon#about to read 6, iclass 22, count 0 2006.229.10:56:39.86#ibcon#read 6, iclass 22, count 0 2006.229.10:56:39.86#ibcon#end of sib2, iclass 22, count 0 2006.229.10:56:39.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.10:56:39.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.10:56:39.86#ibcon#[27=USB\r\n] 2006.229.10:56:39.86#ibcon#*before write, iclass 22, count 0 2006.229.10:56:39.86#ibcon#enter sib2, iclass 22, count 0 2006.229.10:56:39.86#ibcon#flushed, iclass 22, count 0 2006.229.10:56:39.86#ibcon#about to write, iclass 22, count 0 2006.229.10:56:39.86#ibcon#wrote, iclass 22, count 0 2006.229.10:56:39.86#ibcon#about to read 3, iclass 22, count 0 2006.229.10:56:39.89#ibcon#read 3, iclass 22, count 0 2006.229.10:56:39.89#ibcon#about to read 4, iclass 22, count 0 2006.229.10:56:39.89#ibcon#read 4, iclass 22, count 0 2006.229.10:56:39.89#ibcon#about to read 5, iclass 22, count 0 2006.229.10:56:39.89#ibcon#read 5, iclass 22, count 0 2006.229.10:56:39.89#ibcon#about to read 6, iclass 22, count 0 2006.229.10:56:39.89#ibcon#read 6, iclass 22, count 0 2006.229.10:56:39.89#ibcon#end of sib2, iclass 22, count 0 2006.229.10:56:39.89#ibcon#*after write, iclass 22, count 0 2006.229.10:56:39.89#ibcon#*before return 0, iclass 22, count 0 2006.229.10:56:39.89#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:39.89#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.10:56:39.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.10:56:39.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.10:56:39.89$vck44/vblo=4,679.99 2006.229.10:56:39.89#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.10:56:39.89#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.10:56:39.89#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:39.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:39.89#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:39.89#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:39.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.10:56:39.89#ibcon#first serial, iclass 24, count 0 2006.229.10:56:39.89#ibcon#enter sib2, iclass 24, count 0 2006.229.10:56:39.89#ibcon#flushed, iclass 24, count 0 2006.229.10:56:39.89#ibcon#about to write, iclass 24, count 0 2006.229.10:56:39.89#ibcon#wrote, iclass 24, count 0 2006.229.10:56:39.89#ibcon#about to read 3, iclass 24, count 0 2006.229.10:56:39.91#ibcon#read 3, iclass 24, count 0 2006.229.10:56:39.91#ibcon#about to read 4, iclass 24, count 0 2006.229.10:56:39.91#ibcon#read 4, iclass 24, count 0 2006.229.10:56:39.91#ibcon#about to read 5, iclass 24, count 0 2006.229.10:56:39.91#ibcon#read 5, iclass 24, count 0 2006.229.10:56:39.91#ibcon#about to read 6, iclass 24, count 0 2006.229.10:56:39.91#ibcon#read 6, iclass 24, count 0 2006.229.10:56:39.91#ibcon#end of sib2, iclass 24, count 0 2006.229.10:56:39.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.10:56:39.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.10:56:39.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.10:56:39.91#ibcon#*before write, iclass 24, count 0 2006.229.10:56:39.91#ibcon#enter sib2, iclass 24, count 0 2006.229.10:56:39.91#ibcon#flushed, iclass 24, count 0 2006.229.10:56:39.91#ibcon#about to write, iclass 24, count 0 2006.229.10:56:39.91#ibcon#wrote, iclass 24, count 0 2006.229.10:56:39.91#ibcon#about to read 3, iclass 24, count 0 2006.229.10:56:39.95#ibcon#read 3, iclass 24, count 0 2006.229.10:56:39.95#ibcon#about to read 4, iclass 24, count 0 2006.229.10:56:39.95#ibcon#read 4, iclass 24, count 0 2006.229.10:56:39.95#ibcon#about to read 5, iclass 24, count 0 2006.229.10:56:39.95#ibcon#read 5, iclass 24, count 0 2006.229.10:56:39.95#ibcon#about to read 6, iclass 24, count 0 2006.229.10:56:39.95#ibcon#read 6, iclass 24, count 0 2006.229.10:56:39.95#ibcon#end of sib2, iclass 24, count 0 2006.229.10:56:39.95#ibcon#*after write, iclass 24, count 0 2006.229.10:56:39.95#ibcon#*before return 0, iclass 24, count 0 2006.229.10:56:39.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:39.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.10:56:39.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.10:56:39.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.10:56:39.95$vck44/vb=4,4 2006.229.10:56:39.95#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.10:56:39.95#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.10:56:39.95#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:39.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:40.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:40.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:40.01#ibcon#enter wrdev, iclass 26, count 2 2006.229.10:56:40.01#ibcon#first serial, iclass 26, count 2 2006.229.10:56:40.01#ibcon#enter sib2, iclass 26, count 2 2006.229.10:56:40.01#ibcon#flushed, iclass 26, count 2 2006.229.10:56:40.01#ibcon#about to write, iclass 26, count 2 2006.229.10:56:40.01#ibcon#wrote, iclass 26, count 2 2006.229.10:56:40.01#ibcon#about to read 3, iclass 26, count 2 2006.229.10:56:40.03#ibcon#read 3, iclass 26, count 2 2006.229.10:56:40.03#ibcon#about to read 4, iclass 26, count 2 2006.229.10:56:40.03#ibcon#read 4, iclass 26, count 2 2006.229.10:56:40.03#ibcon#about to read 5, iclass 26, count 2 2006.229.10:56:40.03#ibcon#read 5, iclass 26, count 2 2006.229.10:56:40.03#ibcon#about to read 6, iclass 26, count 2 2006.229.10:56:40.03#ibcon#read 6, iclass 26, count 2 2006.229.10:56:40.03#ibcon#end of sib2, iclass 26, count 2 2006.229.10:56:40.03#ibcon#*mode == 0, iclass 26, count 2 2006.229.10:56:40.03#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.10:56:40.03#ibcon#[27=AT04-04\r\n] 2006.229.10:56:40.03#ibcon#*before write, iclass 26, count 2 2006.229.10:56:40.03#ibcon#enter sib2, iclass 26, count 2 2006.229.10:56:40.03#ibcon#flushed, iclass 26, count 2 2006.229.10:56:40.03#ibcon#about to write, iclass 26, count 2 2006.229.10:56:40.03#ibcon#wrote, iclass 26, count 2 2006.229.10:56:40.03#ibcon#about to read 3, iclass 26, count 2 2006.229.10:56:40.06#ibcon#read 3, iclass 26, count 2 2006.229.10:56:40.06#ibcon#about to read 4, iclass 26, count 2 2006.229.10:56:40.06#ibcon#read 4, iclass 26, count 2 2006.229.10:56:40.06#ibcon#about to read 5, iclass 26, count 2 2006.229.10:56:40.06#ibcon#read 5, iclass 26, count 2 2006.229.10:56:40.06#ibcon#about to read 6, iclass 26, count 2 2006.229.10:56:40.06#ibcon#read 6, iclass 26, count 2 2006.229.10:56:40.06#ibcon#end of sib2, iclass 26, count 2 2006.229.10:56:40.06#ibcon#*after write, iclass 26, count 2 2006.229.10:56:40.06#ibcon#*before return 0, iclass 26, count 2 2006.229.10:56:40.06#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:40.06#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.10:56:40.06#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.10:56:40.06#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:40.06#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:40.18#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:40.18#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:40.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.10:56:40.18#ibcon#first serial, iclass 26, count 0 2006.229.10:56:40.18#ibcon#enter sib2, iclass 26, count 0 2006.229.10:56:40.18#ibcon#flushed, iclass 26, count 0 2006.229.10:56:40.18#ibcon#about to write, iclass 26, count 0 2006.229.10:56:40.18#ibcon#wrote, iclass 26, count 0 2006.229.10:56:40.18#ibcon#about to read 3, iclass 26, count 0 2006.229.10:56:40.20#ibcon#read 3, iclass 26, count 0 2006.229.10:56:40.20#ibcon#about to read 4, iclass 26, count 0 2006.229.10:56:40.20#ibcon#read 4, iclass 26, count 0 2006.229.10:56:40.20#ibcon#about to read 5, iclass 26, count 0 2006.229.10:56:40.20#ibcon#read 5, iclass 26, count 0 2006.229.10:56:40.20#ibcon#about to read 6, iclass 26, count 0 2006.229.10:56:40.20#ibcon#read 6, iclass 26, count 0 2006.229.10:56:40.20#ibcon#end of sib2, iclass 26, count 0 2006.229.10:56:40.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.10:56:40.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.10:56:40.20#ibcon#[27=USB\r\n] 2006.229.10:56:40.20#ibcon#*before write, iclass 26, count 0 2006.229.10:56:40.20#ibcon#enter sib2, iclass 26, count 0 2006.229.10:56:40.20#ibcon#flushed, iclass 26, count 0 2006.229.10:56:40.20#ibcon#about to write, iclass 26, count 0 2006.229.10:56:40.20#ibcon#wrote, iclass 26, count 0 2006.229.10:56:40.20#ibcon#about to read 3, iclass 26, count 0 2006.229.10:56:40.23#ibcon#read 3, iclass 26, count 0 2006.229.10:56:40.23#ibcon#about to read 4, iclass 26, count 0 2006.229.10:56:40.23#ibcon#read 4, iclass 26, count 0 2006.229.10:56:40.23#ibcon#about to read 5, iclass 26, count 0 2006.229.10:56:40.23#ibcon#read 5, iclass 26, count 0 2006.229.10:56:40.23#ibcon#about to read 6, iclass 26, count 0 2006.229.10:56:40.23#ibcon#read 6, iclass 26, count 0 2006.229.10:56:40.23#ibcon#end of sib2, iclass 26, count 0 2006.229.10:56:40.23#ibcon#*after write, iclass 26, count 0 2006.229.10:56:40.23#ibcon#*before return 0, iclass 26, count 0 2006.229.10:56:40.23#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:40.23#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.10:56:40.23#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.10:56:40.23#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.10:56:40.23$vck44/vblo=5,709.99 2006.229.10:56:40.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.10:56:40.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.10:56:40.23#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:40.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:40.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:40.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:40.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.10:56:40.23#ibcon#first serial, iclass 28, count 0 2006.229.10:56:40.23#ibcon#enter sib2, iclass 28, count 0 2006.229.10:56:40.23#ibcon#flushed, iclass 28, count 0 2006.229.10:56:40.23#ibcon#about to write, iclass 28, count 0 2006.229.10:56:40.23#ibcon#wrote, iclass 28, count 0 2006.229.10:56:40.23#ibcon#about to read 3, iclass 28, count 0 2006.229.10:56:40.25#ibcon#read 3, iclass 28, count 0 2006.229.10:56:40.25#ibcon#about to read 4, iclass 28, count 0 2006.229.10:56:40.25#ibcon#read 4, iclass 28, count 0 2006.229.10:56:40.25#ibcon#about to read 5, iclass 28, count 0 2006.229.10:56:40.25#ibcon#read 5, iclass 28, count 0 2006.229.10:56:40.25#ibcon#about to read 6, iclass 28, count 0 2006.229.10:56:40.25#ibcon#read 6, iclass 28, count 0 2006.229.10:56:40.25#ibcon#end of sib2, iclass 28, count 0 2006.229.10:56:40.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.10:56:40.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.10:56:40.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.10:56:40.25#ibcon#*before write, iclass 28, count 0 2006.229.10:56:40.25#ibcon#enter sib2, iclass 28, count 0 2006.229.10:56:40.25#ibcon#flushed, iclass 28, count 0 2006.229.10:56:40.25#ibcon#about to write, iclass 28, count 0 2006.229.10:56:40.25#ibcon#wrote, iclass 28, count 0 2006.229.10:56:40.25#ibcon#about to read 3, iclass 28, count 0 2006.229.10:56:40.29#ibcon#read 3, iclass 28, count 0 2006.229.10:56:40.29#ibcon#about to read 4, iclass 28, count 0 2006.229.10:56:40.29#ibcon#read 4, iclass 28, count 0 2006.229.10:56:40.29#ibcon#about to read 5, iclass 28, count 0 2006.229.10:56:40.29#ibcon#read 5, iclass 28, count 0 2006.229.10:56:40.29#ibcon#about to read 6, iclass 28, count 0 2006.229.10:56:40.29#ibcon#read 6, iclass 28, count 0 2006.229.10:56:40.29#ibcon#end of sib2, iclass 28, count 0 2006.229.10:56:40.29#ibcon#*after write, iclass 28, count 0 2006.229.10:56:40.29#ibcon#*before return 0, iclass 28, count 0 2006.229.10:56:40.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:40.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.10:56:40.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.10:56:40.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.10:56:40.29$vck44/vb=5,4 2006.229.10:56:40.29#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.10:56:40.29#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.10:56:40.29#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:40.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:40.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:40.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:40.35#ibcon#enter wrdev, iclass 30, count 2 2006.229.10:56:40.35#ibcon#first serial, iclass 30, count 2 2006.229.10:56:40.35#ibcon#enter sib2, iclass 30, count 2 2006.229.10:56:40.35#ibcon#flushed, iclass 30, count 2 2006.229.10:56:40.35#ibcon#about to write, iclass 30, count 2 2006.229.10:56:40.35#ibcon#wrote, iclass 30, count 2 2006.229.10:56:40.35#ibcon#about to read 3, iclass 30, count 2 2006.229.10:56:40.37#ibcon#read 3, iclass 30, count 2 2006.229.10:56:40.37#ibcon#about to read 4, iclass 30, count 2 2006.229.10:56:40.37#ibcon#read 4, iclass 30, count 2 2006.229.10:56:40.37#ibcon#about to read 5, iclass 30, count 2 2006.229.10:56:40.37#ibcon#read 5, iclass 30, count 2 2006.229.10:56:40.37#ibcon#about to read 6, iclass 30, count 2 2006.229.10:56:40.37#ibcon#read 6, iclass 30, count 2 2006.229.10:56:40.37#ibcon#end of sib2, iclass 30, count 2 2006.229.10:56:40.37#ibcon#*mode == 0, iclass 30, count 2 2006.229.10:56:40.37#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.10:56:40.37#ibcon#[27=AT05-04\r\n] 2006.229.10:56:40.37#ibcon#*before write, iclass 30, count 2 2006.229.10:56:40.37#ibcon#enter sib2, iclass 30, count 2 2006.229.10:56:40.37#ibcon#flushed, iclass 30, count 2 2006.229.10:56:40.37#ibcon#about to write, iclass 30, count 2 2006.229.10:56:40.37#ibcon#wrote, iclass 30, count 2 2006.229.10:56:40.37#ibcon#about to read 3, iclass 30, count 2 2006.229.10:56:40.40#ibcon#read 3, iclass 30, count 2 2006.229.10:56:40.40#ibcon#about to read 4, iclass 30, count 2 2006.229.10:56:40.40#ibcon#read 4, iclass 30, count 2 2006.229.10:56:40.40#ibcon#about to read 5, iclass 30, count 2 2006.229.10:56:40.40#ibcon#read 5, iclass 30, count 2 2006.229.10:56:40.40#ibcon#about to read 6, iclass 30, count 2 2006.229.10:56:40.40#ibcon#read 6, iclass 30, count 2 2006.229.10:56:40.40#ibcon#end of sib2, iclass 30, count 2 2006.229.10:56:40.40#ibcon#*after write, iclass 30, count 2 2006.229.10:56:40.40#ibcon#*before return 0, iclass 30, count 2 2006.229.10:56:40.40#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:40.40#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.10:56:40.40#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.10:56:40.40#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:40.40#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:40.52#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:40.52#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:40.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.10:56:40.52#ibcon#first serial, iclass 30, count 0 2006.229.10:56:40.52#ibcon#enter sib2, iclass 30, count 0 2006.229.10:56:40.52#ibcon#flushed, iclass 30, count 0 2006.229.10:56:40.52#ibcon#about to write, iclass 30, count 0 2006.229.10:56:40.52#ibcon#wrote, iclass 30, count 0 2006.229.10:56:40.52#ibcon#about to read 3, iclass 30, count 0 2006.229.10:56:40.54#ibcon#read 3, iclass 30, count 0 2006.229.10:56:40.54#ibcon#about to read 4, iclass 30, count 0 2006.229.10:56:40.54#ibcon#read 4, iclass 30, count 0 2006.229.10:56:40.54#ibcon#about to read 5, iclass 30, count 0 2006.229.10:56:40.54#ibcon#read 5, iclass 30, count 0 2006.229.10:56:40.54#ibcon#about to read 6, iclass 30, count 0 2006.229.10:56:40.54#ibcon#read 6, iclass 30, count 0 2006.229.10:56:40.54#ibcon#end of sib2, iclass 30, count 0 2006.229.10:56:40.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.10:56:40.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.10:56:40.54#ibcon#[27=USB\r\n] 2006.229.10:56:40.54#ibcon#*before write, iclass 30, count 0 2006.229.10:56:40.54#ibcon#enter sib2, iclass 30, count 0 2006.229.10:56:40.54#ibcon#flushed, iclass 30, count 0 2006.229.10:56:40.54#ibcon#about to write, iclass 30, count 0 2006.229.10:56:40.54#ibcon#wrote, iclass 30, count 0 2006.229.10:56:40.54#ibcon#about to read 3, iclass 30, count 0 2006.229.10:56:40.57#ibcon#read 3, iclass 30, count 0 2006.229.10:56:40.57#ibcon#about to read 4, iclass 30, count 0 2006.229.10:56:40.57#ibcon#read 4, iclass 30, count 0 2006.229.10:56:40.57#ibcon#about to read 5, iclass 30, count 0 2006.229.10:56:40.57#ibcon#read 5, iclass 30, count 0 2006.229.10:56:40.57#ibcon#about to read 6, iclass 30, count 0 2006.229.10:56:40.57#ibcon#read 6, iclass 30, count 0 2006.229.10:56:40.57#ibcon#end of sib2, iclass 30, count 0 2006.229.10:56:40.57#ibcon#*after write, iclass 30, count 0 2006.229.10:56:40.57#ibcon#*before return 0, iclass 30, count 0 2006.229.10:56:40.57#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:40.57#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.10:56:40.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.10:56:40.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.10:56:40.57$vck44/vblo=6,719.99 2006.229.10:56:40.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.10:56:40.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.10:56:40.57#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:40.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:40.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:40.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:40.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.10:56:40.57#ibcon#first serial, iclass 32, count 0 2006.229.10:56:40.57#ibcon#enter sib2, iclass 32, count 0 2006.229.10:56:40.57#ibcon#flushed, iclass 32, count 0 2006.229.10:56:40.57#ibcon#about to write, iclass 32, count 0 2006.229.10:56:40.57#ibcon#wrote, iclass 32, count 0 2006.229.10:56:40.57#ibcon#about to read 3, iclass 32, count 0 2006.229.10:56:40.59#ibcon#read 3, iclass 32, count 0 2006.229.10:56:40.59#ibcon#about to read 4, iclass 32, count 0 2006.229.10:56:40.59#ibcon#read 4, iclass 32, count 0 2006.229.10:56:40.59#ibcon#about to read 5, iclass 32, count 0 2006.229.10:56:40.59#ibcon#read 5, iclass 32, count 0 2006.229.10:56:40.59#ibcon#about to read 6, iclass 32, count 0 2006.229.10:56:40.59#ibcon#read 6, iclass 32, count 0 2006.229.10:56:40.59#ibcon#end of sib2, iclass 32, count 0 2006.229.10:56:40.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.10:56:40.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.10:56:40.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.10:56:40.59#ibcon#*before write, iclass 32, count 0 2006.229.10:56:40.59#ibcon#enter sib2, iclass 32, count 0 2006.229.10:56:40.59#ibcon#flushed, iclass 32, count 0 2006.229.10:56:40.59#ibcon#about to write, iclass 32, count 0 2006.229.10:56:40.59#ibcon#wrote, iclass 32, count 0 2006.229.10:56:40.59#ibcon#about to read 3, iclass 32, count 0 2006.229.10:56:40.63#ibcon#read 3, iclass 32, count 0 2006.229.10:56:40.63#ibcon#about to read 4, iclass 32, count 0 2006.229.10:56:40.63#ibcon#read 4, iclass 32, count 0 2006.229.10:56:40.63#ibcon#about to read 5, iclass 32, count 0 2006.229.10:56:40.63#ibcon#read 5, iclass 32, count 0 2006.229.10:56:40.63#ibcon#about to read 6, iclass 32, count 0 2006.229.10:56:40.63#ibcon#read 6, iclass 32, count 0 2006.229.10:56:40.63#ibcon#end of sib2, iclass 32, count 0 2006.229.10:56:40.63#ibcon#*after write, iclass 32, count 0 2006.229.10:56:40.63#ibcon#*before return 0, iclass 32, count 0 2006.229.10:56:40.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:40.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.10:56:40.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.10:56:40.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.10:56:40.63$vck44/vb=6,4 2006.229.10:56:40.63#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.10:56:40.63#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.10:56:40.63#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:40.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:40.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:40.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:40.69#ibcon#enter wrdev, iclass 34, count 2 2006.229.10:56:40.69#ibcon#first serial, iclass 34, count 2 2006.229.10:56:40.69#ibcon#enter sib2, iclass 34, count 2 2006.229.10:56:40.69#ibcon#flushed, iclass 34, count 2 2006.229.10:56:40.69#ibcon#about to write, iclass 34, count 2 2006.229.10:56:40.69#ibcon#wrote, iclass 34, count 2 2006.229.10:56:40.69#ibcon#about to read 3, iclass 34, count 2 2006.229.10:56:40.71#ibcon#read 3, iclass 34, count 2 2006.229.10:56:40.71#ibcon#about to read 4, iclass 34, count 2 2006.229.10:56:40.71#ibcon#read 4, iclass 34, count 2 2006.229.10:56:40.71#ibcon#about to read 5, iclass 34, count 2 2006.229.10:56:40.71#ibcon#read 5, iclass 34, count 2 2006.229.10:56:40.71#ibcon#about to read 6, iclass 34, count 2 2006.229.10:56:40.71#ibcon#read 6, iclass 34, count 2 2006.229.10:56:40.71#ibcon#end of sib2, iclass 34, count 2 2006.229.10:56:40.71#ibcon#*mode == 0, iclass 34, count 2 2006.229.10:56:40.71#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.10:56:40.71#ibcon#[27=AT06-04\r\n] 2006.229.10:56:40.71#ibcon#*before write, iclass 34, count 2 2006.229.10:56:40.71#ibcon#enter sib2, iclass 34, count 2 2006.229.10:56:40.71#ibcon#flushed, iclass 34, count 2 2006.229.10:56:40.71#ibcon#about to write, iclass 34, count 2 2006.229.10:56:40.71#ibcon#wrote, iclass 34, count 2 2006.229.10:56:40.71#ibcon#about to read 3, iclass 34, count 2 2006.229.10:56:40.74#ibcon#read 3, iclass 34, count 2 2006.229.10:56:40.74#ibcon#about to read 4, iclass 34, count 2 2006.229.10:56:40.74#ibcon#read 4, iclass 34, count 2 2006.229.10:56:40.74#ibcon#about to read 5, iclass 34, count 2 2006.229.10:56:40.74#ibcon#read 5, iclass 34, count 2 2006.229.10:56:40.74#ibcon#about to read 6, iclass 34, count 2 2006.229.10:56:40.74#ibcon#read 6, iclass 34, count 2 2006.229.10:56:40.74#ibcon#end of sib2, iclass 34, count 2 2006.229.10:56:40.74#ibcon#*after write, iclass 34, count 2 2006.229.10:56:40.74#ibcon#*before return 0, iclass 34, count 2 2006.229.10:56:40.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:40.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.10:56:40.74#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.10:56:40.74#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:40.74#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:40.86#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:40.86#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:40.86#ibcon#enter wrdev, iclass 34, count 0 2006.229.10:56:40.86#ibcon#first serial, iclass 34, count 0 2006.229.10:56:40.86#ibcon#enter sib2, iclass 34, count 0 2006.229.10:56:40.86#ibcon#flushed, iclass 34, count 0 2006.229.10:56:40.86#ibcon#about to write, iclass 34, count 0 2006.229.10:56:40.86#ibcon#wrote, iclass 34, count 0 2006.229.10:56:40.86#ibcon#about to read 3, iclass 34, count 0 2006.229.10:56:40.88#ibcon#read 3, iclass 34, count 0 2006.229.10:56:40.88#ibcon#about to read 4, iclass 34, count 0 2006.229.10:56:40.88#ibcon#read 4, iclass 34, count 0 2006.229.10:56:40.88#ibcon#about to read 5, iclass 34, count 0 2006.229.10:56:40.88#ibcon#read 5, iclass 34, count 0 2006.229.10:56:40.88#ibcon#about to read 6, iclass 34, count 0 2006.229.10:56:40.88#ibcon#read 6, iclass 34, count 0 2006.229.10:56:40.88#ibcon#end of sib2, iclass 34, count 0 2006.229.10:56:40.88#ibcon#*mode == 0, iclass 34, count 0 2006.229.10:56:40.88#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.10:56:40.88#ibcon#[27=USB\r\n] 2006.229.10:56:40.88#ibcon#*before write, iclass 34, count 0 2006.229.10:56:40.88#ibcon#enter sib2, iclass 34, count 0 2006.229.10:56:40.88#ibcon#flushed, iclass 34, count 0 2006.229.10:56:40.88#ibcon#about to write, iclass 34, count 0 2006.229.10:56:40.88#ibcon#wrote, iclass 34, count 0 2006.229.10:56:40.88#ibcon#about to read 3, iclass 34, count 0 2006.229.10:56:40.91#ibcon#read 3, iclass 34, count 0 2006.229.10:56:40.91#ibcon#about to read 4, iclass 34, count 0 2006.229.10:56:40.91#ibcon#read 4, iclass 34, count 0 2006.229.10:56:40.91#ibcon#about to read 5, iclass 34, count 0 2006.229.10:56:40.91#ibcon#read 5, iclass 34, count 0 2006.229.10:56:40.91#ibcon#about to read 6, iclass 34, count 0 2006.229.10:56:40.91#ibcon#read 6, iclass 34, count 0 2006.229.10:56:40.91#ibcon#end of sib2, iclass 34, count 0 2006.229.10:56:40.91#ibcon#*after write, iclass 34, count 0 2006.229.10:56:40.91#ibcon#*before return 0, iclass 34, count 0 2006.229.10:56:40.91#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:40.91#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.10:56:40.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.10:56:40.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.10:56:40.91$vck44/vblo=7,734.99 2006.229.10:56:40.91#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.10:56:40.91#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.10:56:40.91#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:40.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:40.91#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:40.91#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:40.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.10:56:40.91#ibcon#first serial, iclass 36, count 0 2006.229.10:56:40.91#ibcon#enter sib2, iclass 36, count 0 2006.229.10:56:40.91#ibcon#flushed, iclass 36, count 0 2006.229.10:56:40.91#ibcon#about to write, iclass 36, count 0 2006.229.10:56:40.91#ibcon#wrote, iclass 36, count 0 2006.229.10:56:40.91#ibcon#about to read 3, iclass 36, count 0 2006.229.10:56:40.93#ibcon#read 3, iclass 36, count 0 2006.229.10:56:40.93#ibcon#about to read 4, iclass 36, count 0 2006.229.10:56:40.93#ibcon#read 4, iclass 36, count 0 2006.229.10:56:40.93#ibcon#about to read 5, iclass 36, count 0 2006.229.10:56:40.93#ibcon#read 5, iclass 36, count 0 2006.229.10:56:40.93#ibcon#about to read 6, iclass 36, count 0 2006.229.10:56:40.93#ibcon#read 6, iclass 36, count 0 2006.229.10:56:40.93#ibcon#end of sib2, iclass 36, count 0 2006.229.10:56:40.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.10:56:40.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.10:56:40.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.10:56:40.93#ibcon#*before write, iclass 36, count 0 2006.229.10:56:40.93#ibcon#enter sib2, iclass 36, count 0 2006.229.10:56:40.93#ibcon#flushed, iclass 36, count 0 2006.229.10:56:40.93#ibcon#about to write, iclass 36, count 0 2006.229.10:56:40.93#ibcon#wrote, iclass 36, count 0 2006.229.10:56:40.93#ibcon#about to read 3, iclass 36, count 0 2006.229.10:56:40.97#ibcon#read 3, iclass 36, count 0 2006.229.10:56:40.97#ibcon#about to read 4, iclass 36, count 0 2006.229.10:56:40.97#ibcon#read 4, iclass 36, count 0 2006.229.10:56:40.97#ibcon#about to read 5, iclass 36, count 0 2006.229.10:56:40.97#ibcon#read 5, iclass 36, count 0 2006.229.10:56:40.97#ibcon#about to read 6, iclass 36, count 0 2006.229.10:56:40.97#ibcon#read 6, iclass 36, count 0 2006.229.10:56:40.97#ibcon#end of sib2, iclass 36, count 0 2006.229.10:56:40.97#ibcon#*after write, iclass 36, count 0 2006.229.10:56:40.97#ibcon#*before return 0, iclass 36, count 0 2006.229.10:56:40.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:40.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.10:56:40.97#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.10:56:40.97#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.10:56:40.97$vck44/vb=7,4 2006.229.10:56:40.97#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.10:56:40.97#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.10:56:40.97#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:40.97#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:41.03#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:41.03#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:41.03#ibcon#enter wrdev, iclass 38, count 2 2006.229.10:56:41.03#ibcon#first serial, iclass 38, count 2 2006.229.10:56:41.03#ibcon#enter sib2, iclass 38, count 2 2006.229.10:56:41.03#ibcon#flushed, iclass 38, count 2 2006.229.10:56:41.03#ibcon#about to write, iclass 38, count 2 2006.229.10:56:41.03#ibcon#wrote, iclass 38, count 2 2006.229.10:56:41.03#ibcon#about to read 3, iclass 38, count 2 2006.229.10:56:41.05#ibcon#read 3, iclass 38, count 2 2006.229.10:56:41.05#ibcon#about to read 4, iclass 38, count 2 2006.229.10:56:41.05#ibcon#read 4, iclass 38, count 2 2006.229.10:56:41.05#ibcon#about to read 5, iclass 38, count 2 2006.229.10:56:41.05#ibcon#read 5, iclass 38, count 2 2006.229.10:56:41.05#ibcon#about to read 6, iclass 38, count 2 2006.229.10:56:41.05#ibcon#read 6, iclass 38, count 2 2006.229.10:56:41.05#ibcon#end of sib2, iclass 38, count 2 2006.229.10:56:41.05#ibcon#*mode == 0, iclass 38, count 2 2006.229.10:56:41.05#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.10:56:41.05#ibcon#[27=AT07-04\r\n] 2006.229.10:56:41.05#ibcon#*before write, iclass 38, count 2 2006.229.10:56:41.05#ibcon#enter sib2, iclass 38, count 2 2006.229.10:56:41.05#ibcon#flushed, iclass 38, count 2 2006.229.10:56:41.05#ibcon#about to write, iclass 38, count 2 2006.229.10:56:41.05#ibcon#wrote, iclass 38, count 2 2006.229.10:56:41.05#ibcon#about to read 3, iclass 38, count 2 2006.229.10:56:41.08#ibcon#read 3, iclass 38, count 2 2006.229.10:56:41.08#ibcon#about to read 4, iclass 38, count 2 2006.229.10:56:41.08#ibcon#read 4, iclass 38, count 2 2006.229.10:56:41.08#ibcon#about to read 5, iclass 38, count 2 2006.229.10:56:41.08#ibcon#read 5, iclass 38, count 2 2006.229.10:56:41.08#ibcon#about to read 6, iclass 38, count 2 2006.229.10:56:41.08#ibcon#read 6, iclass 38, count 2 2006.229.10:56:41.08#ibcon#end of sib2, iclass 38, count 2 2006.229.10:56:41.08#ibcon#*after write, iclass 38, count 2 2006.229.10:56:41.08#ibcon#*before return 0, iclass 38, count 2 2006.229.10:56:41.08#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:41.08#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.10:56:41.08#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.10:56:41.08#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:41.08#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:41.20#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:41.20#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:41.20#ibcon#enter wrdev, iclass 38, count 0 2006.229.10:56:41.20#ibcon#first serial, iclass 38, count 0 2006.229.10:56:41.20#ibcon#enter sib2, iclass 38, count 0 2006.229.10:56:41.20#ibcon#flushed, iclass 38, count 0 2006.229.10:56:41.20#ibcon#about to write, iclass 38, count 0 2006.229.10:56:41.20#ibcon#wrote, iclass 38, count 0 2006.229.10:56:41.20#ibcon#about to read 3, iclass 38, count 0 2006.229.10:56:41.22#ibcon#read 3, iclass 38, count 0 2006.229.10:56:41.22#ibcon#about to read 4, iclass 38, count 0 2006.229.10:56:41.22#ibcon#read 4, iclass 38, count 0 2006.229.10:56:41.22#ibcon#about to read 5, iclass 38, count 0 2006.229.10:56:41.22#ibcon#read 5, iclass 38, count 0 2006.229.10:56:41.22#ibcon#about to read 6, iclass 38, count 0 2006.229.10:56:41.22#ibcon#read 6, iclass 38, count 0 2006.229.10:56:41.22#ibcon#end of sib2, iclass 38, count 0 2006.229.10:56:41.22#ibcon#*mode == 0, iclass 38, count 0 2006.229.10:56:41.22#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.10:56:41.22#ibcon#[27=USB\r\n] 2006.229.10:56:41.22#ibcon#*before write, iclass 38, count 0 2006.229.10:56:41.22#ibcon#enter sib2, iclass 38, count 0 2006.229.10:56:41.22#ibcon#flushed, iclass 38, count 0 2006.229.10:56:41.22#ibcon#about to write, iclass 38, count 0 2006.229.10:56:41.22#ibcon#wrote, iclass 38, count 0 2006.229.10:56:41.22#ibcon#about to read 3, iclass 38, count 0 2006.229.10:56:41.25#ibcon#read 3, iclass 38, count 0 2006.229.10:56:41.25#ibcon#about to read 4, iclass 38, count 0 2006.229.10:56:41.25#ibcon#read 4, iclass 38, count 0 2006.229.10:56:41.25#ibcon#about to read 5, iclass 38, count 0 2006.229.10:56:41.25#ibcon#read 5, iclass 38, count 0 2006.229.10:56:41.25#ibcon#about to read 6, iclass 38, count 0 2006.229.10:56:41.25#ibcon#read 6, iclass 38, count 0 2006.229.10:56:41.25#ibcon#end of sib2, iclass 38, count 0 2006.229.10:56:41.25#ibcon#*after write, iclass 38, count 0 2006.229.10:56:41.25#ibcon#*before return 0, iclass 38, count 0 2006.229.10:56:41.25#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:41.25#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.10:56:41.25#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.10:56:41.25#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.10:56:41.25$vck44/vblo=8,744.99 2006.229.10:56:41.25#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.10:56:41.25#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.10:56:41.25#ibcon#ireg 17 cls_cnt 0 2006.229.10:56:41.25#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:41.25#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:41.25#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:41.25#ibcon#enter wrdev, iclass 40, count 0 2006.229.10:56:41.25#ibcon#first serial, iclass 40, count 0 2006.229.10:56:41.25#ibcon#enter sib2, iclass 40, count 0 2006.229.10:56:41.25#ibcon#flushed, iclass 40, count 0 2006.229.10:56:41.25#ibcon#about to write, iclass 40, count 0 2006.229.10:56:41.25#ibcon#wrote, iclass 40, count 0 2006.229.10:56:41.25#ibcon#about to read 3, iclass 40, count 0 2006.229.10:56:41.27#ibcon#read 3, iclass 40, count 0 2006.229.10:56:41.27#ibcon#about to read 4, iclass 40, count 0 2006.229.10:56:41.27#ibcon#read 4, iclass 40, count 0 2006.229.10:56:41.27#ibcon#about to read 5, iclass 40, count 0 2006.229.10:56:41.27#ibcon#read 5, iclass 40, count 0 2006.229.10:56:41.27#ibcon#about to read 6, iclass 40, count 0 2006.229.10:56:41.27#ibcon#read 6, iclass 40, count 0 2006.229.10:56:41.27#ibcon#end of sib2, iclass 40, count 0 2006.229.10:56:41.27#ibcon#*mode == 0, iclass 40, count 0 2006.229.10:56:41.27#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.10:56:41.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.10:56:41.27#ibcon#*before write, iclass 40, count 0 2006.229.10:56:41.27#ibcon#enter sib2, iclass 40, count 0 2006.229.10:56:41.27#ibcon#flushed, iclass 40, count 0 2006.229.10:56:41.27#ibcon#about to write, iclass 40, count 0 2006.229.10:56:41.27#ibcon#wrote, iclass 40, count 0 2006.229.10:56:41.27#ibcon#about to read 3, iclass 40, count 0 2006.229.10:56:41.31#ibcon#read 3, iclass 40, count 0 2006.229.10:56:41.31#ibcon#about to read 4, iclass 40, count 0 2006.229.10:56:41.31#ibcon#read 4, iclass 40, count 0 2006.229.10:56:41.31#ibcon#about to read 5, iclass 40, count 0 2006.229.10:56:41.31#ibcon#read 5, iclass 40, count 0 2006.229.10:56:41.31#ibcon#about to read 6, iclass 40, count 0 2006.229.10:56:41.31#ibcon#read 6, iclass 40, count 0 2006.229.10:56:41.31#ibcon#end of sib2, iclass 40, count 0 2006.229.10:56:41.31#ibcon#*after write, iclass 40, count 0 2006.229.10:56:41.31#ibcon#*before return 0, iclass 40, count 0 2006.229.10:56:41.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:41.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.10:56:41.31#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.10:56:41.31#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.10:56:41.31$vck44/vb=8,4 2006.229.10:56:41.31#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.10:56:41.31#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.10:56:41.31#ibcon#ireg 11 cls_cnt 2 2006.229.10:56:41.31#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:41.37#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:41.37#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:41.37#ibcon#enter wrdev, iclass 4, count 2 2006.229.10:56:41.37#ibcon#first serial, iclass 4, count 2 2006.229.10:56:41.37#ibcon#enter sib2, iclass 4, count 2 2006.229.10:56:41.37#ibcon#flushed, iclass 4, count 2 2006.229.10:56:41.37#ibcon#about to write, iclass 4, count 2 2006.229.10:56:41.37#ibcon#wrote, iclass 4, count 2 2006.229.10:56:41.37#ibcon#about to read 3, iclass 4, count 2 2006.229.10:56:41.39#ibcon#read 3, iclass 4, count 2 2006.229.10:56:41.39#ibcon#about to read 4, iclass 4, count 2 2006.229.10:56:41.39#ibcon#read 4, iclass 4, count 2 2006.229.10:56:41.39#ibcon#about to read 5, iclass 4, count 2 2006.229.10:56:41.39#ibcon#read 5, iclass 4, count 2 2006.229.10:56:41.39#ibcon#about to read 6, iclass 4, count 2 2006.229.10:56:41.39#ibcon#read 6, iclass 4, count 2 2006.229.10:56:41.39#ibcon#end of sib2, iclass 4, count 2 2006.229.10:56:41.39#ibcon#*mode == 0, iclass 4, count 2 2006.229.10:56:41.39#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.10:56:41.39#ibcon#[27=AT08-04\r\n] 2006.229.10:56:41.39#ibcon#*before write, iclass 4, count 2 2006.229.10:56:41.39#ibcon#enter sib2, iclass 4, count 2 2006.229.10:56:41.39#ibcon#flushed, iclass 4, count 2 2006.229.10:56:41.39#ibcon#about to write, iclass 4, count 2 2006.229.10:56:41.39#ibcon#wrote, iclass 4, count 2 2006.229.10:56:41.39#ibcon#about to read 3, iclass 4, count 2 2006.229.10:56:41.42#ibcon#read 3, iclass 4, count 2 2006.229.10:56:41.42#ibcon#about to read 4, iclass 4, count 2 2006.229.10:56:41.42#ibcon#read 4, iclass 4, count 2 2006.229.10:56:41.42#ibcon#about to read 5, iclass 4, count 2 2006.229.10:56:41.42#ibcon#read 5, iclass 4, count 2 2006.229.10:56:41.42#ibcon#about to read 6, iclass 4, count 2 2006.229.10:56:41.42#ibcon#read 6, iclass 4, count 2 2006.229.10:56:41.42#ibcon#end of sib2, iclass 4, count 2 2006.229.10:56:41.42#ibcon#*after write, iclass 4, count 2 2006.229.10:56:41.42#ibcon#*before return 0, iclass 4, count 2 2006.229.10:56:41.42#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:41.42#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.10:56:41.42#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.10:56:41.42#ibcon#ireg 7 cls_cnt 0 2006.229.10:56:41.42#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:41.54#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:41.54#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:41.54#ibcon#enter wrdev, iclass 4, count 0 2006.229.10:56:41.54#ibcon#first serial, iclass 4, count 0 2006.229.10:56:41.54#ibcon#enter sib2, iclass 4, count 0 2006.229.10:56:41.54#ibcon#flushed, iclass 4, count 0 2006.229.10:56:41.54#ibcon#about to write, iclass 4, count 0 2006.229.10:56:41.54#ibcon#wrote, iclass 4, count 0 2006.229.10:56:41.54#ibcon#about to read 3, iclass 4, count 0 2006.229.10:56:41.56#ibcon#read 3, iclass 4, count 0 2006.229.10:56:41.56#ibcon#about to read 4, iclass 4, count 0 2006.229.10:56:41.56#ibcon#read 4, iclass 4, count 0 2006.229.10:56:41.56#ibcon#about to read 5, iclass 4, count 0 2006.229.10:56:41.56#ibcon#read 5, iclass 4, count 0 2006.229.10:56:41.56#ibcon#about to read 6, iclass 4, count 0 2006.229.10:56:41.56#ibcon#read 6, iclass 4, count 0 2006.229.10:56:41.56#ibcon#end of sib2, iclass 4, count 0 2006.229.10:56:41.56#ibcon#*mode == 0, iclass 4, count 0 2006.229.10:56:41.56#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.10:56:41.56#ibcon#[27=USB\r\n] 2006.229.10:56:41.56#ibcon#*before write, iclass 4, count 0 2006.229.10:56:41.56#ibcon#enter sib2, iclass 4, count 0 2006.229.10:56:41.56#ibcon#flushed, iclass 4, count 0 2006.229.10:56:41.56#ibcon#about to write, iclass 4, count 0 2006.229.10:56:41.56#ibcon#wrote, iclass 4, count 0 2006.229.10:56:41.56#ibcon#about to read 3, iclass 4, count 0 2006.229.10:56:41.59#ibcon#read 3, iclass 4, count 0 2006.229.10:56:41.59#ibcon#about to read 4, iclass 4, count 0 2006.229.10:56:41.59#ibcon#read 4, iclass 4, count 0 2006.229.10:56:41.59#ibcon#about to read 5, iclass 4, count 0 2006.229.10:56:41.59#ibcon#read 5, iclass 4, count 0 2006.229.10:56:41.59#ibcon#about to read 6, iclass 4, count 0 2006.229.10:56:41.59#ibcon#read 6, iclass 4, count 0 2006.229.10:56:41.59#ibcon#end of sib2, iclass 4, count 0 2006.229.10:56:41.59#ibcon#*after write, iclass 4, count 0 2006.229.10:56:41.59#ibcon#*before return 0, iclass 4, count 0 2006.229.10:56:41.59#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:41.59#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.10:56:41.59#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.10:56:41.59#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.10:56:41.59$vck44/vabw=wide 2006.229.10:56:41.59#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.10:56:41.59#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.10:56:41.59#ibcon#ireg 8 cls_cnt 0 2006.229.10:56:41.59#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:41.59#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:41.59#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:41.59#ibcon#enter wrdev, iclass 6, count 0 2006.229.10:56:41.59#ibcon#first serial, iclass 6, count 0 2006.229.10:56:41.59#ibcon#enter sib2, iclass 6, count 0 2006.229.10:56:41.59#ibcon#flushed, iclass 6, count 0 2006.229.10:56:41.59#ibcon#about to write, iclass 6, count 0 2006.229.10:56:41.59#ibcon#wrote, iclass 6, count 0 2006.229.10:56:41.59#ibcon#about to read 3, iclass 6, count 0 2006.229.10:56:41.61#ibcon#read 3, iclass 6, count 0 2006.229.10:56:41.61#ibcon#about to read 4, iclass 6, count 0 2006.229.10:56:41.61#ibcon#read 4, iclass 6, count 0 2006.229.10:56:41.61#ibcon#about to read 5, iclass 6, count 0 2006.229.10:56:41.61#ibcon#read 5, iclass 6, count 0 2006.229.10:56:41.61#ibcon#about to read 6, iclass 6, count 0 2006.229.10:56:41.61#ibcon#read 6, iclass 6, count 0 2006.229.10:56:41.61#ibcon#end of sib2, iclass 6, count 0 2006.229.10:56:41.61#ibcon#*mode == 0, iclass 6, count 0 2006.229.10:56:41.61#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.10:56:41.61#ibcon#[25=BW32\r\n] 2006.229.10:56:41.61#ibcon#*before write, iclass 6, count 0 2006.229.10:56:41.61#ibcon#enter sib2, iclass 6, count 0 2006.229.10:56:41.61#ibcon#flushed, iclass 6, count 0 2006.229.10:56:41.61#ibcon#about to write, iclass 6, count 0 2006.229.10:56:41.61#ibcon#wrote, iclass 6, count 0 2006.229.10:56:41.61#ibcon#about to read 3, iclass 6, count 0 2006.229.10:56:41.64#ibcon#read 3, iclass 6, count 0 2006.229.10:56:41.64#ibcon#about to read 4, iclass 6, count 0 2006.229.10:56:41.64#ibcon#read 4, iclass 6, count 0 2006.229.10:56:41.64#ibcon#about to read 5, iclass 6, count 0 2006.229.10:56:41.64#ibcon#read 5, iclass 6, count 0 2006.229.10:56:41.64#ibcon#about to read 6, iclass 6, count 0 2006.229.10:56:41.64#ibcon#read 6, iclass 6, count 0 2006.229.10:56:41.64#ibcon#end of sib2, iclass 6, count 0 2006.229.10:56:41.64#ibcon#*after write, iclass 6, count 0 2006.229.10:56:41.64#ibcon#*before return 0, iclass 6, count 0 2006.229.10:56:41.64#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:41.64#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.10:56:41.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.10:56:41.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.10:56:41.64$vck44/vbbw=wide 2006.229.10:56:41.64#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.10:56:41.64#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.10:56:41.64#ibcon#ireg 8 cls_cnt 0 2006.229.10:56:41.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:56:41.71#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:56:41.71#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:56:41.71#ibcon#enter wrdev, iclass 10, count 0 2006.229.10:56:41.71#ibcon#first serial, iclass 10, count 0 2006.229.10:56:41.71#ibcon#enter sib2, iclass 10, count 0 2006.229.10:56:41.71#ibcon#flushed, iclass 10, count 0 2006.229.10:56:41.71#ibcon#about to write, iclass 10, count 0 2006.229.10:56:41.71#ibcon#wrote, iclass 10, count 0 2006.229.10:56:41.71#ibcon#about to read 3, iclass 10, count 0 2006.229.10:56:41.73#ibcon#read 3, iclass 10, count 0 2006.229.10:56:41.73#ibcon#about to read 4, iclass 10, count 0 2006.229.10:56:41.73#ibcon#read 4, iclass 10, count 0 2006.229.10:56:41.73#ibcon#about to read 5, iclass 10, count 0 2006.229.10:56:41.73#ibcon#read 5, iclass 10, count 0 2006.229.10:56:41.73#ibcon#about to read 6, iclass 10, count 0 2006.229.10:56:41.73#ibcon#read 6, iclass 10, count 0 2006.229.10:56:41.73#ibcon#end of sib2, iclass 10, count 0 2006.229.10:56:41.73#ibcon#*mode == 0, iclass 10, count 0 2006.229.10:56:41.73#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.10:56:41.73#ibcon#[27=BW32\r\n] 2006.229.10:56:41.73#ibcon#*before write, iclass 10, count 0 2006.229.10:56:41.73#ibcon#enter sib2, iclass 10, count 0 2006.229.10:56:41.73#ibcon#flushed, iclass 10, count 0 2006.229.10:56:41.73#ibcon#about to write, iclass 10, count 0 2006.229.10:56:41.73#ibcon#wrote, iclass 10, count 0 2006.229.10:56:41.73#ibcon#about to read 3, iclass 10, count 0 2006.229.10:56:41.76#ibcon#read 3, iclass 10, count 0 2006.229.10:56:41.76#ibcon#about to read 4, iclass 10, count 0 2006.229.10:56:41.76#ibcon#read 4, iclass 10, count 0 2006.229.10:56:41.76#ibcon#about to read 5, iclass 10, count 0 2006.229.10:56:41.76#ibcon#read 5, iclass 10, count 0 2006.229.10:56:41.76#ibcon#about to read 6, iclass 10, count 0 2006.229.10:56:41.76#ibcon#read 6, iclass 10, count 0 2006.229.10:56:41.76#ibcon#end of sib2, iclass 10, count 0 2006.229.10:56:41.76#ibcon#*after write, iclass 10, count 0 2006.229.10:56:41.76#ibcon#*before return 0, iclass 10, count 0 2006.229.10:56:41.76#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:56:41.76#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.10:56:41.76#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.10:56:41.76#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.10:56:41.76$setupk4/ifdk4 2006.229.10:56:41.76$ifdk4/lo= 2006.229.10:56:41.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.10:56:41.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.10:56:41.76$ifdk4/patch= 2006.229.10:56:41.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.10:56:41.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.10:56:41.76$setupk4/!*+20s 2006.229.10:56:43.32#abcon#<5=/03 1.9 3.2 28.431001001.8\r\n> 2006.229.10:56:43.34#abcon#{5=INTERFACE CLEAR} 2006.229.10:56:43.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:56:53.49#abcon#<5=/03 1.9 3.2 28.431001001.8\r\n> 2006.229.10:56:53.51#abcon#{5=INTERFACE CLEAR} 2006.229.10:56:53.57#abcon#[5=S1D000X0/0*\r\n] 2006.229.10:56:56.26$setupk4/"tpicd 2006.229.10:56:56.26$setupk4/echo=off 2006.229.10:56:56.26$setupk4/xlog=off 2006.229.10:56:56.26:!2006.229.11:01:02 2006.229.10:57:00.14#trakl#Source acquired 2006.229.10:57:02.14#flagr#flagr/antenna,acquired 2006.229.11:01:02.00:preob 2006.229.11:01:03.14/onsource/TRACKING 2006.229.11:01:03.14:!2006.229.11:01:12 2006.229.11:01:12.00:"tape 2006.229.11:01:12.00:"st=record 2006.229.11:01:12.00:data_valid=on 2006.229.11:01:12.00:midob 2006.229.11:01:12.14/onsource/TRACKING 2006.229.11:01:12.14/wx/28.40,1001.8,100 2006.229.11:01:12.25/cable/+6.4036E-03 2006.229.11:01:13.34/va/01,08,usb,yes,30,33 2006.229.11:01:13.34/va/02,07,usb,yes,33,33 2006.229.11:01:13.34/va/03,06,usb,yes,41,43 2006.229.11:01:13.34/va/04,07,usb,yes,34,35 2006.229.11:01:13.34/va/05,04,usb,yes,30,31 2006.229.11:01:13.34/va/06,04,usb,yes,34,33 2006.229.11:01:13.34/va/07,05,usb,yes,30,30 2006.229.11:01:13.34/va/08,06,usb,yes,22,27 2006.229.11:01:13.57/valo/01,524.99,yes,locked 2006.229.11:01:13.57/valo/02,534.99,yes,locked 2006.229.11:01:13.57/valo/03,564.99,yes,locked 2006.229.11:01:13.57/valo/04,624.99,yes,locked 2006.229.11:01:13.57/valo/05,734.99,yes,locked 2006.229.11:01:13.57/valo/06,814.99,yes,locked 2006.229.11:01:13.57/valo/07,864.99,yes,locked 2006.229.11:01:13.57/valo/08,884.99,yes,locked 2006.229.11:01:14.66/vb/01,04,usb,yes,31,29 2006.229.11:01:14.66/vb/02,04,usb,yes,34,34 2006.229.11:01:14.66/vb/03,04,usb,yes,31,34 2006.229.11:01:14.66/vb/04,04,usb,yes,35,34 2006.229.11:01:14.66/vb/05,04,usb,yes,27,30 2006.229.11:01:14.66/vb/06,04,usb,yes,32,28 2006.229.11:01:14.66/vb/07,04,usb,yes,32,32 2006.229.11:01:14.66/vb/08,04,usb,yes,29,33 2006.229.11:01:14.90/vblo/01,629.99,yes,locked 2006.229.11:01:14.90/vblo/02,634.99,yes,locked 2006.229.11:01:14.90/vblo/03,649.99,yes,locked 2006.229.11:01:14.90/vblo/04,679.99,yes,locked 2006.229.11:01:14.90/vblo/05,709.99,yes,locked 2006.229.11:01:14.90/vblo/06,719.99,yes,locked 2006.229.11:01:14.90/vblo/07,734.99,yes,locked 2006.229.11:01:14.90/vblo/08,744.99,yes,locked 2006.229.11:01:15.05/vabw/8 2006.229.11:01:15.20/vbbw/8 2006.229.11:01:15.29/xfe/off,on,12.0 2006.229.11:01:15.68/ifatt/23,28,28,28 2006.229.11:01:16.08/fmout-gps/S +4.38E-07 2006.229.11:01:16.12:!2006.229.11:05:12 2006.229.11:05:12.00:data_valid=off 2006.229.11:05:12.00:"et 2006.229.11:05:12.00:!+3s 2006.229.11:05:15.02:"tape 2006.229.11:05:15.02:postob 2006.229.11:05:15.26/cable/+6.4036E-03 2006.229.11:05:15.26/wx/28.36,1001.8,100 2006.229.11:05:16.08/fmout-gps/S +4.38E-07 2006.229.11:05:16.08:scan_name=229-1109,jd0608,80 2006.229.11:05:16.08:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.11:05:16.14#flagr#flagr/antenna,new-source 2006.229.11:05:17.14:checkk5 2006.229.11:05:17.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:05:17.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:05:18.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:05:18.89/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:05:19.30/chk_obsdata//k5ts1/T2291101??a.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.11:05:19.68/chk_obsdata//k5ts2/T2291101??b.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.11:05:20.07/chk_obsdata//k5ts3/T2291101??c.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.11:05:20.47/chk_obsdata//k5ts4/T2291101??d.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.11:05:21.20/k5log//k5ts1_log_newline 2006.229.11:05:21.90/k5log//k5ts2_log_newline 2006.229.11:05:22.62/k5log//k5ts3_log_newline 2006.229.11:05:23.33/k5log//k5ts4_log_newline 2006.229.11:05:23.35/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:05:23.35:setupk4=1 2006.229.11:05:23.36$setupk4/echo=on 2006.229.11:05:23.36$setupk4/pcalon 2006.229.11:05:23.36$pcalon/"no phase cal control is implemented here 2006.229.11:05:23.36$setupk4/"tpicd=stop 2006.229.11:05:23.36$setupk4/"rec=synch_on 2006.229.11:05:23.36$setupk4/"rec_mode=128 2006.229.11:05:23.36$setupk4/!* 2006.229.11:05:23.36$setupk4/recpk4 2006.229.11:05:23.36$recpk4/recpatch= 2006.229.11:05:23.36$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:05:23.36$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:05:23.36$setupk4/vck44 2006.229.11:05:23.36$vck44/valo=1,524.99 2006.229.11:05:23.36#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.11:05:23.36#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.11:05:23.36#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:23.36#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:23.36#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:23.36#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:23.36#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:05:23.36#ibcon#first serial, iclass 5, count 0 2006.229.11:05:23.36#ibcon#enter sib2, iclass 5, count 0 2006.229.11:05:23.36#ibcon#flushed, iclass 5, count 0 2006.229.11:05:23.36#ibcon#about to write, iclass 5, count 0 2006.229.11:05:23.36#ibcon#wrote, iclass 5, count 0 2006.229.11:05:23.36#ibcon#about to read 3, iclass 5, count 0 2006.229.11:05:23.38#ibcon#read 3, iclass 5, count 0 2006.229.11:05:23.38#ibcon#about to read 4, iclass 5, count 0 2006.229.11:05:23.38#ibcon#read 4, iclass 5, count 0 2006.229.11:05:23.38#ibcon#about to read 5, iclass 5, count 0 2006.229.11:05:23.38#ibcon#read 5, iclass 5, count 0 2006.229.11:05:23.38#ibcon#about to read 6, iclass 5, count 0 2006.229.11:05:23.38#ibcon#read 6, iclass 5, count 0 2006.229.11:05:23.38#ibcon#end of sib2, iclass 5, count 0 2006.229.11:05:23.38#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:05:23.38#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:05:23.38#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:05:23.38#ibcon#*before write, iclass 5, count 0 2006.229.11:05:23.38#ibcon#enter sib2, iclass 5, count 0 2006.229.11:05:23.38#ibcon#flushed, iclass 5, count 0 2006.229.11:05:23.38#ibcon#about to write, iclass 5, count 0 2006.229.11:05:23.38#ibcon#wrote, iclass 5, count 0 2006.229.11:05:23.38#ibcon#about to read 3, iclass 5, count 0 2006.229.11:05:23.43#ibcon#read 3, iclass 5, count 0 2006.229.11:05:23.43#ibcon#about to read 4, iclass 5, count 0 2006.229.11:05:23.43#ibcon#read 4, iclass 5, count 0 2006.229.11:05:23.43#ibcon#about to read 5, iclass 5, count 0 2006.229.11:05:23.43#ibcon#read 5, iclass 5, count 0 2006.229.11:05:23.43#ibcon#about to read 6, iclass 5, count 0 2006.229.11:05:23.43#ibcon#read 6, iclass 5, count 0 2006.229.11:05:23.43#ibcon#end of sib2, iclass 5, count 0 2006.229.11:05:23.43#ibcon#*after write, iclass 5, count 0 2006.229.11:05:23.43#ibcon#*before return 0, iclass 5, count 0 2006.229.11:05:23.43#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:23.43#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:23.43#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:05:23.43#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:05:23.43$vck44/va=1,8 2006.229.11:05:23.43#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.11:05:23.43#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.11:05:23.43#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:23.43#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:23.43#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:23.43#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:23.43#ibcon#enter wrdev, iclass 7, count 2 2006.229.11:05:23.43#ibcon#first serial, iclass 7, count 2 2006.229.11:05:23.43#ibcon#enter sib2, iclass 7, count 2 2006.229.11:05:23.43#ibcon#flushed, iclass 7, count 2 2006.229.11:05:23.43#ibcon#about to write, iclass 7, count 2 2006.229.11:05:23.43#ibcon#wrote, iclass 7, count 2 2006.229.11:05:23.43#ibcon#about to read 3, iclass 7, count 2 2006.229.11:05:23.45#ibcon#read 3, iclass 7, count 2 2006.229.11:05:23.45#ibcon#about to read 4, iclass 7, count 2 2006.229.11:05:23.45#ibcon#read 4, iclass 7, count 2 2006.229.11:05:23.45#ibcon#about to read 5, iclass 7, count 2 2006.229.11:05:23.45#ibcon#read 5, iclass 7, count 2 2006.229.11:05:23.45#ibcon#about to read 6, iclass 7, count 2 2006.229.11:05:23.45#ibcon#read 6, iclass 7, count 2 2006.229.11:05:23.45#ibcon#end of sib2, iclass 7, count 2 2006.229.11:05:23.45#ibcon#*mode == 0, iclass 7, count 2 2006.229.11:05:23.45#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.11:05:23.45#ibcon#[25=AT01-08\r\n] 2006.229.11:05:23.45#ibcon#*before write, iclass 7, count 2 2006.229.11:05:23.45#ibcon#enter sib2, iclass 7, count 2 2006.229.11:05:23.45#ibcon#flushed, iclass 7, count 2 2006.229.11:05:23.45#ibcon#about to write, iclass 7, count 2 2006.229.11:05:23.45#ibcon#wrote, iclass 7, count 2 2006.229.11:05:23.45#ibcon#about to read 3, iclass 7, count 2 2006.229.11:05:23.48#ibcon#read 3, iclass 7, count 2 2006.229.11:05:23.48#ibcon#about to read 4, iclass 7, count 2 2006.229.11:05:23.48#ibcon#read 4, iclass 7, count 2 2006.229.11:05:23.48#ibcon#about to read 5, iclass 7, count 2 2006.229.11:05:23.48#ibcon#read 5, iclass 7, count 2 2006.229.11:05:23.48#ibcon#about to read 6, iclass 7, count 2 2006.229.11:05:23.48#ibcon#read 6, iclass 7, count 2 2006.229.11:05:23.48#ibcon#end of sib2, iclass 7, count 2 2006.229.11:05:23.48#ibcon#*after write, iclass 7, count 2 2006.229.11:05:23.48#ibcon#*before return 0, iclass 7, count 2 2006.229.11:05:23.48#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:23.48#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:23.48#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.11:05:23.48#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:23.48#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:23.60#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:23.60#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:23.60#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:05:23.60#ibcon#first serial, iclass 7, count 0 2006.229.11:05:23.60#ibcon#enter sib2, iclass 7, count 0 2006.229.11:05:23.60#ibcon#flushed, iclass 7, count 0 2006.229.11:05:23.60#ibcon#about to write, iclass 7, count 0 2006.229.11:05:23.60#ibcon#wrote, iclass 7, count 0 2006.229.11:05:23.60#ibcon#about to read 3, iclass 7, count 0 2006.229.11:05:23.62#ibcon#read 3, iclass 7, count 0 2006.229.11:05:23.62#ibcon#about to read 4, iclass 7, count 0 2006.229.11:05:23.62#ibcon#read 4, iclass 7, count 0 2006.229.11:05:23.62#ibcon#about to read 5, iclass 7, count 0 2006.229.11:05:23.62#ibcon#read 5, iclass 7, count 0 2006.229.11:05:23.62#ibcon#about to read 6, iclass 7, count 0 2006.229.11:05:23.62#ibcon#read 6, iclass 7, count 0 2006.229.11:05:23.62#ibcon#end of sib2, iclass 7, count 0 2006.229.11:05:23.62#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:05:23.62#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:05:23.62#ibcon#[25=USB\r\n] 2006.229.11:05:23.62#ibcon#*before write, iclass 7, count 0 2006.229.11:05:23.62#ibcon#enter sib2, iclass 7, count 0 2006.229.11:05:23.62#ibcon#flushed, iclass 7, count 0 2006.229.11:05:23.62#ibcon#about to write, iclass 7, count 0 2006.229.11:05:23.62#ibcon#wrote, iclass 7, count 0 2006.229.11:05:23.62#ibcon#about to read 3, iclass 7, count 0 2006.229.11:05:23.65#ibcon#read 3, iclass 7, count 0 2006.229.11:05:23.65#ibcon#about to read 4, iclass 7, count 0 2006.229.11:05:23.65#ibcon#read 4, iclass 7, count 0 2006.229.11:05:23.65#ibcon#about to read 5, iclass 7, count 0 2006.229.11:05:23.65#ibcon#read 5, iclass 7, count 0 2006.229.11:05:23.65#ibcon#about to read 6, iclass 7, count 0 2006.229.11:05:23.65#ibcon#read 6, iclass 7, count 0 2006.229.11:05:23.65#ibcon#end of sib2, iclass 7, count 0 2006.229.11:05:23.65#ibcon#*after write, iclass 7, count 0 2006.229.11:05:23.65#ibcon#*before return 0, iclass 7, count 0 2006.229.11:05:23.65#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:23.65#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:23.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:05:23.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:05:23.65$vck44/valo=2,534.99 2006.229.11:05:23.65#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.11:05:23.65#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.11:05:23.65#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:23.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:23.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:23.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:23.65#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:05:23.65#ibcon#first serial, iclass 11, count 0 2006.229.11:05:23.65#ibcon#enter sib2, iclass 11, count 0 2006.229.11:05:23.65#ibcon#flushed, iclass 11, count 0 2006.229.11:05:23.65#ibcon#about to write, iclass 11, count 0 2006.229.11:05:23.65#ibcon#wrote, iclass 11, count 0 2006.229.11:05:23.65#ibcon#about to read 3, iclass 11, count 0 2006.229.11:05:23.67#ibcon#read 3, iclass 11, count 0 2006.229.11:05:23.67#ibcon#about to read 4, iclass 11, count 0 2006.229.11:05:23.67#ibcon#read 4, iclass 11, count 0 2006.229.11:05:23.67#ibcon#about to read 5, iclass 11, count 0 2006.229.11:05:23.67#ibcon#read 5, iclass 11, count 0 2006.229.11:05:23.67#ibcon#about to read 6, iclass 11, count 0 2006.229.11:05:23.67#ibcon#read 6, iclass 11, count 0 2006.229.11:05:23.67#ibcon#end of sib2, iclass 11, count 0 2006.229.11:05:23.67#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:05:23.67#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:05:23.67#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:05:23.67#ibcon#*before write, iclass 11, count 0 2006.229.11:05:23.67#ibcon#enter sib2, iclass 11, count 0 2006.229.11:05:23.67#ibcon#flushed, iclass 11, count 0 2006.229.11:05:23.67#ibcon#about to write, iclass 11, count 0 2006.229.11:05:23.67#ibcon#wrote, iclass 11, count 0 2006.229.11:05:23.67#ibcon#about to read 3, iclass 11, count 0 2006.229.11:05:23.71#ibcon#read 3, iclass 11, count 0 2006.229.11:05:23.71#ibcon#about to read 4, iclass 11, count 0 2006.229.11:05:23.71#ibcon#read 4, iclass 11, count 0 2006.229.11:05:23.71#ibcon#about to read 5, iclass 11, count 0 2006.229.11:05:23.71#ibcon#read 5, iclass 11, count 0 2006.229.11:05:23.71#ibcon#about to read 6, iclass 11, count 0 2006.229.11:05:23.71#ibcon#read 6, iclass 11, count 0 2006.229.11:05:23.71#ibcon#end of sib2, iclass 11, count 0 2006.229.11:05:23.71#ibcon#*after write, iclass 11, count 0 2006.229.11:05:23.71#ibcon#*before return 0, iclass 11, count 0 2006.229.11:05:23.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:23.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:23.71#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:05:23.71#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:05:23.71$vck44/va=2,7 2006.229.11:05:23.71#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.11:05:23.71#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.11:05:23.71#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:23.71#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:23.77#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:23.77#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:23.77#ibcon#enter wrdev, iclass 13, count 2 2006.229.11:05:23.77#ibcon#first serial, iclass 13, count 2 2006.229.11:05:23.77#ibcon#enter sib2, iclass 13, count 2 2006.229.11:05:23.77#ibcon#flushed, iclass 13, count 2 2006.229.11:05:23.77#ibcon#about to write, iclass 13, count 2 2006.229.11:05:23.77#ibcon#wrote, iclass 13, count 2 2006.229.11:05:23.77#ibcon#about to read 3, iclass 13, count 2 2006.229.11:05:23.79#ibcon#read 3, iclass 13, count 2 2006.229.11:05:23.79#ibcon#about to read 4, iclass 13, count 2 2006.229.11:05:23.79#ibcon#read 4, iclass 13, count 2 2006.229.11:05:23.79#ibcon#about to read 5, iclass 13, count 2 2006.229.11:05:23.79#ibcon#read 5, iclass 13, count 2 2006.229.11:05:23.79#ibcon#about to read 6, iclass 13, count 2 2006.229.11:05:23.79#ibcon#read 6, iclass 13, count 2 2006.229.11:05:23.79#ibcon#end of sib2, iclass 13, count 2 2006.229.11:05:23.79#ibcon#*mode == 0, iclass 13, count 2 2006.229.11:05:23.79#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.11:05:23.79#ibcon#[25=AT02-07\r\n] 2006.229.11:05:23.79#ibcon#*before write, iclass 13, count 2 2006.229.11:05:23.79#ibcon#enter sib2, iclass 13, count 2 2006.229.11:05:23.79#ibcon#flushed, iclass 13, count 2 2006.229.11:05:23.79#ibcon#about to write, iclass 13, count 2 2006.229.11:05:23.79#ibcon#wrote, iclass 13, count 2 2006.229.11:05:23.79#ibcon#about to read 3, iclass 13, count 2 2006.229.11:05:23.82#ibcon#read 3, iclass 13, count 2 2006.229.11:05:23.82#ibcon#about to read 4, iclass 13, count 2 2006.229.11:05:23.82#ibcon#read 4, iclass 13, count 2 2006.229.11:05:23.82#ibcon#about to read 5, iclass 13, count 2 2006.229.11:05:23.82#ibcon#read 5, iclass 13, count 2 2006.229.11:05:23.82#ibcon#about to read 6, iclass 13, count 2 2006.229.11:05:23.82#ibcon#read 6, iclass 13, count 2 2006.229.11:05:23.82#ibcon#end of sib2, iclass 13, count 2 2006.229.11:05:23.82#ibcon#*after write, iclass 13, count 2 2006.229.11:05:23.82#ibcon#*before return 0, iclass 13, count 2 2006.229.11:05:23.82#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:23.82#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:23.82#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.11:05:23.82#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:23.82#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:23.94#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:23.94#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:23.94#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:05:23.94#ibcon#first serial, iclass 13, count 0 2006.229.11:05:23.94#ibcon#enter sib2, iclass 13, count 0 2006.229.11:05:23.94#ibcon#flushed, iclass 13, count 0 2006.229.11:05:23.94#ibcon#about to write, iclass 13, count 0 2006.229.11:05:23.94#ibcon#wrote, iclass 13, count 0 2006.229.11:05:23.94#ibcon#about to read 3, iclass 13, count 0 2006.229.11:05:23.96#ibcon#read 3, iclass 13, count 0 2006.229.11:05:23.96#ibcon#about to read 4, iclass 13, count 0 2006.229.11:05:23.96#ibcon#read 4, iclass 13, count 0 2006.229.11:05:23.96#ibcon#about to read 5, iclass 13, count 0 2006.229.11:05:23.96#ibcon#read 5, iclass 13, count 0 2006.229.11:05:23.96#ibcon#about to read 6, iclass 13, count 0 2006.229.11:05:23.96#ibcon#read 6, iclass 13, count 0 2006.229.11:05:23.96#ibcon#end of sib2, iclass 13, count 0 2006.229.11:05:23.96#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:05:23.96#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:05:23.96#ibcon#[25=USB\r\n] 2006.229.11:05:23.96#ibcon#*before write, iclass 13, count 0 2006.229.11:05:23.96#ibcon#enter sib2, iclass 13, count 0 2006.229.11:05:23.96#ibcon#flushed, iclass 13, count 0 2006.229.11:05:23.96#ibcon#about to write, iclass 13, count 0 2006.229.11:05:23.96#ibcon#wrote, iclass 13, count 0 2006.229.11:05:23.96#ibcon#about to read 3, iclass 13, count 0 2006.229.11:05:23.99#ibcon#read 3, iclass 13, count 0 2006.229.11:05:23.99#ibcon#about to read 4, iclass 13, count 0 2006.229.11:05:23.99#ibcon#read 4, iclass 13, count 0 2006.229.11:05:23.99#ibcon#about to read 5, iclass 13, count 0 2006.229.11:05:23.99#ibcon#read 5, iclass 13, count 0 2006.229.11:05:23.99#ibcon#about to read 6, iclass 13, count 0 2006.229.11:05:23.99#ibcon#read 6, iclass 13, count 0 2006.229.11:05:23.99#ibcon#end of sib2, iclass 13, count 0 2006.229.11:05:23.99#ibcon#*after write, iclass 13, count 0 2006.229.11:05:23.99#ibcon#*before return 0, iclass 13, count 0 2006.229.11:05:23.99#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:23.99#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:23.99#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:05:23.99#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:05:23.99$vck44/valo=3,564.99 2006.229.11:05:23.99#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.11:05:23.99#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.11:05:23.99#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:23.99#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:23.99#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:23.99#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:23.99#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:05:23.99#ibcon#first serial, iclass 15, count 0 2006.229.11:05:23.99#ibcon#enter sib2, iclass 15, count 0 2006.229.11:05:23.99#ibcon#flushed, iclass 15, count 0 2006.229.11:05:23.99#ibcon#about to write, iclass 15, count 0 2006.229.11:05:23.99#ibcon#wrote, iclass 15, count 0 2006.229.11:05:23.99#ibcon#about to read 3, iclass 15, count 0 2006.229.11:05:24.01#ibcon#read 3, iclass 15, count 0 2006.229.11:05:24.01#ibcon#about to read 4, iclass 15, count 0 2006.229.11:05:24.01#ibcon#read 4, iclass 15, count 0 2006.229.11:05:24.01#ibcon#about to read 5, iclass 15, count 0 2006.229.11:05:24.01#ibcon#read 5, iclass 15, count 0 2006.229.11:05:24.01#ibcon#about to read 6, iclass 15, count 0 2006.229.11:05:24.01#ibcon#read 6, iclass 15, count 0 2006.229.11:05:24.01#ibcon#end of sib2, iclass 15, count 0 2006.229.11:05:24.01#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:05:24.01#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:05:24.01#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:05:24.01#ibcon#*before write, iclass 15, count 0 2006.229.11:05:24.01#ibcon#enter sib2, iclass 15, count 0 2006.229.11:05:24.01#ibcon#flushed, iclass 15, count 0 2006.229.11:05:24.01#ibcon#about to write, iclass 15, count 0 2006.229.11:05:24.01#ibcon#wrote, iclass 15, count 0 2006.229.11:05:24.01#ibcon#about to read 3, iclass 15, count 0 2006.229.11:05:24.05#ibcon#read 3, iclass 15, count 0 2006.229.11:05:24.05#ibcon#about to read 4, iclass 15, count 0 2006.229.11:05:24.05#ibcon#read 4, iclass 15, count 0 2006.229.11:05:24.05#ibcon#about to read 5, iclass 15, count 0 2006.229.11:05:24.05#ibcon#read 5, iclass 15, count 0 2006.229.11:05:24.05#ibcon#about to read 6, iclass 15, count 0 2006.229.11:05:24.05#ibcon#read 6, iclass 15, count 0 2006.229.11:05:24.05#ibcon#end of sib2, iclass 15, count 0 2006.229.11:05:24.05#ibcon#*after write, iclass 15, count 0 2006.229.11:05:24.05#ibcon#*before return 0, iclass 15, count 0 2006.229.11:05:24.05#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:24.05#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:24.05#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:05:24.05#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:05:24.05$vck44/va=3,6 2006.229.11:05:24.05#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.11:05:24.05#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.11:05:24.05#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:24.05#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:24.11#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:24.11#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:24.11#ibcon#enter wrdev, iclass 17, count 2 2006.229.11:05:24.11#ibcon#first serial, iclass 17, count 2 2006.229.11:05:24.11#ibcon#enter sib2, iclass 17, count 2 2006.229.11:05:24.11#ibcon#flushed, iclass 17, count 2 2006.229.11:05:24.11#ibcon#about to write, iclass 17, count 2 2006.229.11:05:24.11#ibcon#wrote, iclass 17, count 2 2006.229.11:05:24.11#ibcon#about to read 3, iclass 17, count 2 2006.229.11:05:24.13#ibcon#read 3, iclass 17, count 2 2006.229.11:05:24.13#ibcon#about to read 4, iclass 17, count 2 2006.229.11:05:24.13#ibcon#read 4, iclass 17, count 2 2006.229.11:05:24.13#ibcon#about to read 5, iclass 17, count 2 2006.229.11:05:24.13#ibcon#read 5, iclass 17, count 2 2006.229.11:05:24.13#ibcon#about to read 6, iclass 17, count 2 2006.229.11:05:24.13#ibcon#read 6, iclass 17, count 2 2006.229.11:05:24.13#ibcon#end of sib2, iclass 17, count 2 2006.229.11:05:24.13#ibcon#*mode == 0, iclass 17, count 2 2006.229.11:05:24.13#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.11:05:24.13#ibcon#[25=AT03-06\r\n] 2006.229.11:05:24.13#ibcon#*before write, iclass 17, count 2 2006.229.11:05:24.13#ibcon#enter sib2, iclass 17, count 2 2006.229.11:05:24.13#ibcon#flushed, iclass 17, count 2 2006.229.11:05:24.13#ibcon#about to write, iclass 17, count 2 2006.229.11:05:24.13#ibcon#wrote, iclass 17, count 2 2006.229.11:05:24.13#ibcon#about to read 3, iclass 17, count 2 2006.229.11:05:24.16#ibcon#read 3, iclass 17, count 2 2006.229.11:05:24.16#ibcon#about to read 4, iclass 17, count 2 2006.229.11:05:24.16#ibcon#read 4, iclass 17, count 2 2006.229.11:05:24.16#ibcon#about to read 5, iclass 17, count 2 2006.229.11:05:24.16#ibcon#read 5, iclass 17, count 2 2006.229.11:05:24.16#ibcon#about to read 6, iclass 17, count 2 2006.229.11:05:24.16#ibcon#read 6, iclass 17, count 2 2006.229.11:05:24.16#ibcon#end of sib2, iclass 17, count 2 2006.229.11:05:24.16#ibcon#*after write, iclass 17, count 2 2006.229.11:05:24.16#ibcon#*before return 0, iclass 17, count 2 2006.229.11:05:24.16#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:24.16#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:24.16#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.11:05:24.16#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:24.16#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:24.28#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:24.28#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:24.28#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:05:24.28#ibcon#first serial, iclass 17, count 0 2006.229.11:05:24.28#ibcon#enter sib2, iclass 17, count 0 2006.229.11:05:24.28#ibcon#flushed, iclass 17, count 0 2006.229.11:05:24.28#ibcon#about to write, iclass 17, count 0 2006.229.11:05:24.28#ibcon#wrote, iclass 17, count 0 2006.229.11:05:24.28#ibcon#about to read 3, iclass 17, count 0 2006.229.11:05:24.30#ibcon#read 3, iclass 17, count 0 2006.229.11:05:24.30#ibcon#about to read 4, iclass 17, count 0 2006.229.11:05:24.30#ibcon#read 4, iclass 17, count 0 2006.229.11:05:24.30#ibcon#about to read 5, iclass 17, count 0 2006.229.11:05:24.30#ibcon#read 5, iclass 17, count 0 2006.229.11:05:24.30#ibcon#about to read 6, iclass 17, count 0 2006.229.11:05:24.30#ibcon#read 6, iclass 17, count 0 2006.229.11:05:24.30#ibcon#end of sib2, iclass 17, count 0 2006.229.11:05:24.30#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:05:24.30#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:05:24.30#ibcon#[25=USB\r\n] 2006.229.11:05:24.30#ibcon#*before write, iclass 17, count 0 2006.229.11:05:24.30#ibcon#enter sib2, iclass 17, count 0 2006.229.11:05:24.30#ibcon#flushed, iclass 17, count 0 2006.229.11:05:24.30#ibcon#about to write, iclass 17, count 0 2006.229.11:05:24.30#ibcon#wrote, iclass 17, count 0 2006.229.11:05:24.30#ibcon#about to read 3, iclass 17, count 0 2006.229.11:05:24.33#ibcon#read 3, iclass 17, count 0 2006.229.11:05:24.33#ibcon#about to read 4, iclass 17, count 0 2006.229.11:05:24.33#ibcon#read 4, iclass 17, count 0 2006.229.11:05:24.33#ibcon#about to read 5, iclass 17, count 0 2006.229.11:05:24.33#ibcon#read 5, iclass 17, count 0 2006.229.11:05:24.33#ibcon#about to read 6, iclass 17, count 0 2006.229.11:05:24.33#ibcon#read 6, iclass 17, count 0 2006.229.11:05:24.33#ibcon#end of sib2, iclass 17, count 0 2006.229.11:05:24.33#ibcon#*after write, iclass 17, count 0 2006.229.11:05:24.33#ibcon#*before return 0, iclass 17, count 0 2006.229.11:05:24.33#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:24.33#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:24.33#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:05:24.33#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:05:24.33$vck44/valo=4,624.99 2006.229.11:05:24.33#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.11:05:24.33#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.11:05:24.33#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:24.33#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:24.33#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:24.33#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:24.33#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:05:24.33#ibcon#first serial, iclass 19, count 0 2006.229.11:05:24.33#ibcon#enter sib2, iclass 19, count 0 2006.229.11:05:24.33#ibcon#flushed, iclass 19, count 0 2006.229.11:05:24.33#ibcon#about to write, iclass 19, count 0 2006.229.11:05:24.33#ibcon#wrote, iclass 19, count 0 2006.229.11:05:24.33#ibcon#about to read 3, iclass 19, count 0 2006.229.11:05:24.35#ibcon#read 3, iclass 19, count 0 2006.229.11:05:24.35#ibcon#about to read 4, iclass 19, count 0 2006.229.11:05:24.35#ibcon#read 4, iclass 19, count 0 2006.229.11:05:24.35#ibcon#about to read 5, iclass 19, count 0 2006.229.11:05:24.35#ibcon#read 5, iclass 19, count 0 2006.229.11:05:24.35#ibcon#about to read 6, iclass 19, count 0 2006.229.11:05:24.35#ibcon#read 6, iclass 19, count 0 2006.229.11:05:24.35#ibcon#end of sib2, iclass 19, count 0 2006.229.11:05:24.35#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:05:24.35#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:05:24.35#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:05:24.35#ibcon#*before write, iclass 19, count 0 2006.229.11:05:24.35#ibcon#enter sib2, iclass 19, count 0 2006.229.11:05:24.35#ibcon#flushed, iclass 19, count 0 2006.229.11:05:24.35#ibcon#about to write, iclass 19, count 0 2006.229.11:05:24.35#ibcon#wrote, iclass 19, count 0 2006.229.11:05:24.35#ibcon#about to read 3, iclass 19, count 0 2006.229.11:05:24.39#ibcon#read 3, iclass 19, count 0 2006.229.11:05:24.39#ibcon#about to read 4, iclass 19, count 0 2006.229.11:05:24.39#ibcon#read 4, iclass 19, count 0 2006.229.11:05:24.39#ibcon#about to read 5, iclass 19, count 0 2006.229.11:05:24.39#ibcon#read 5, iclass 19, count 0 2006.229.11:05:24.39#ibcon#about to read 6, iclass 19, count 0 2006.229.11:05:24.39#ibcon#read 6, iclass 19, count 0 2006.229.11:05:24.39#ibcon#end of sib2, iclass 19, count 0 2006.229.11:05:24.39#ibcon#*after write, iclass 19, count 0 2006.229.11:05:24.39#ibcon#*before return 0, iclass 19, count 0 2006.229.11:05:24.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:24.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:24.39#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:05:24.39#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:05:24.39$vck44/va=4,7 2006.229.11:05:24.39#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.11:05:24.39#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.11:05:24.39#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:24.39#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:24.45#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:24.45#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:24.45#ibcon#enter wrdev, iclass 21, count 2 2006.229.11:05:24.45#ibcon#first serial, iclass 21, count 2 2006.229.11:05:24.45#ibcon#enter sib2, iclass 21, count 2 2006.229.11:05:24.45#ibcon#flushed, iclass 21, count 2 2006.229.11:05:24.45#ibcon#about to write, iclass 21, count 2 2006.229.11:05:24.45#ibcon#wrote, iclass 21, count 2 2006.229.11:05:24.45#ibcon#about to read 3, iclass 21, count 2 2006.229.11:05:24.47#ibcon#read 3, iclass 21, count 2 2006.229.11:05:24.47#ibcon#about to read 4, iclass 21, count 2 2006.229.11:05:24.47#ibcon#read 4, iclass 21, count 2 2006.229.11:05:24.47#ibcon#about to read 5, iclass 21, count 2 2006.229.11:05:24.47#ibcon#read 5, iclass 21, count 2 2006.229.11:05:24.47#ibcon#about to read 6, iclass 21, count 2 2006.229.11:05:24.47#ibcon#read 6, iclass 21, count 2 2006.229.11:05:24.47#ibcon#end of sib2, iclass 21, count 2 2006.229.11:05:24.47#ibcon#*mode == 0, iclass 21, count 2 2006.229.11:05:24.47#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.11:05:24.47#ibcon#[25=AT04-07\r\n] 2006.229.11:05:24.47#ibcon#*before write, iclass 21, count 2 2006.229.11:05:24.47#ibcon#enter sib2, iclass 21, count 2 2006.229.11:05:24.47#ibcon#flushed, iclass 21, count 2 2006.229.11:05:24.47#ibcon#about to write, iclass 21, count 2 2006.229.11:05:24.47#ibcon#wrote, iclass 21, count 2 2006.229.11:05:24.47#ibcon#about to read 3, iclass 21, count 2 2006.229.11:05:24.50#ibcon#read 3, iclass 21, count 2 2006.229.11:05:24.50#ibcon#about to read 4, iclass 21, count 2 2006.229.11:05:24.50#ibcon#read 4, iclass 21, count 2 2006.229.11:05:24.50#ibcon#about to read 5, iclass 21, count 2 2006.229.11:05:24.50#ibcon#read 5, iclass 21, count 2 2006.229.11:05:24.50#ibcon#about to read 6, iclass 21, count 2 2006.229.11:05:24.50#ibcon#read 6, iclass 21, count 2 2006.229.11:05:24.50#ibcon#end of sib2, iclass 21, count 2 2006.229.11:05:24.50#ibcon#*after write, iclass 21, count 2 2006.229.11:05:24.50#ibcon#*before return 0, iclass 21, count 2 2006.229.11:05:24.50#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:24.50#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:24.50#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.11:05:24.50#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:24.50#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:24.62#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:24.62#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:24.62#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:05:24.62#ibcon#first serial, iclass 21, count 0 2006.229.11:05:24.62#ibcon#enter sib2, iclass 21, count 0 2006.229.11:05:24.62#ibcon#flushed, iclass 21, count 0 2006.229.11:05:24.62#ibcon#about to write, iclass 21, count 0 2006.229.11:05:24.62#ibcon#wrote, iclass 21, count 0 2006.229.11:05:24.62#ibcon#about to read 3, iclass 21, count 0 2006.229.11:05:24.64#ibcon#read 3, iclass 21, count 0 2006.229.11:05:24.64#ibcon#about to read 4, iclass 21, count 0 2006.229.11:05:24.64#ibcon#read 4, iclass 21, count 0 2006.229.11:05:24.64#ibcon#about to read 5, iclass 21, count 0 2006.229.11:05:24.64#ibcon#read 5, iclass 21, count 0 2006.229.11:05:24.64#ibcon#about to read 6, iclass 21, count 0 2006.229.11:05:24.64#ibcon#read 6, iclass 21, count 0 2006.229.11:05:24.64#ibcon#end of sib2, iclass 21, count 0 2006.229.11:05:24.64#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:05:24.64#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:05:24.64#ibcon#[25=USB\r\n] 2006.229.11:05:24.64#ibcon#*before write, iclass 21, count 0 2006.229.11:05:24.64#ibcon#enter sib2, iclass 21, count 0 2006.229.11:05:24.64#ibcon#flushed, iclass 21, count 0 2006.229.11:05:24.64#ibcon#about to write, iclass 21, count 0 2006.229.11:05:24.64#ibcon#wrote, iclass 21, count 0 2006.229.11:05:24.64#ibcon#about to read 3, iclass 21, count 0 2006.229.11:05:24.67#ibcon#read 3, iclass 21, count 0 2006.229.11:05:24.67#ibcon#about to read 4, iclass 21, count 0 2006.229.11:05:24.67#ibcon#read 4, iclass 21, count 0 2006.229.11:05:24.67#ibcon#about to read 5, iclass 21, count 0 2006.229.11:05:24.67#ibcon#read 5, iclass 21, count 0 2006.229.11:05:24.67#ibcon#about to read 6, iclass 21, count 0 2006.229.11:05:24.67#ibcon#read 6, iclass 21, count 0 2006.229.11:05:24.67#ibcon#end of sib2, iclass 21, count 0 2006.229.11:05:24.67#ibcon#*after write, iclass 21, count 0 2006.229.11:05:24.67#ibcon#*before return 0, iclass 21, count 0 2006.229.11:05:24.67#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:24.67#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:24.67#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:05:24.67#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:05:24.67$vck44/valo=5,734.99 2006.229.11:05:24.67#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.11:05:24.67#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.11:05:24.67#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:24.67#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:24.67#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:24.67#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:24.67#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:05:24.67#ibcon#first serial, iclass 23, count 0 2006.229.11:05:24.67#ibcon#enter sib2, iclass 23, count 0 2006.229.11:05:24.67#ibcon#flushed, iclass 23, count 0 2006.229.11:05:24.67#ibcon#about to write, iclass 23, count 0 2006.229.11:05:24.67#ibcon#wrote, iclass 23, count 0 2006.229.11:05:24.67#ibcon#about to read 3, iclass 23, count 0 2006.229.11:05:24.69#ibcon#read 3, iclass 23, count 0 2006.229.11:05:24.69#ibcon#about to read 4, iclass 23, count 0 2006.229.11:05:24.69#ibcon#read 4, iclass 23, count 0 2006.229.11:05:24.69#ibcon#about to read 5, iclass 23, count 0 2006.229.11:05:24.69#ibcon#read 5, iclass 23, count 0 2006.229.11:05:24.69#ibcon#about to read 6, iclass 23, count 0 2006.229.11:05:24.69#ibcon#read 6, iclass 23, count 0 2006.229.11:05:24.69#ibcon#end of sib2, iclass 23, count 0 2006.229.11:05:24.69#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:05:24.69#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:05:24.69#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:05:24.69#ibcon#*before write, iclass 23, count 0 2006.229.11:05:24.69#ibcon#enter sib2, iclass 23, count 0 2006.229.11:05:24.69#ibcon#flushed, iclass 23, count 0 2006.229.11:05:24.69#ibcon#about to write, iclass 23, count 0 2006.229.11:05:24.69#ibcon#wrote, iclass 23, count 0 2006.229.11:05:24.69#ibcon#about to read 3, iclass 23, count 0 2006.229.11:05:24.73#ibcon#read 3, iclass 23, count 0 2006.229.11:05:24.73#ibcon#about to read 4, iclass 23, count 0 2006.229.11:05:24.73#ibcon#read 4, iclass 23, count 0 2006.229.11:05:24.73#ibcon#about to read 5, iclass 23, count 0 2006.229.11:05:24.73#ibcon#read 5, iclass 23, count 0 2006.229.11:05:24.73#ibcon#about to read 6, iclass 23, count 0 2006.229.11:05:24.73#ibcon#read 6, iclass 23, count 0 2006.229.11:05:24.73#ibcon#end of sib2, iclass 23, count 0 2006.229.11:05:24.73#ibcon#*after write, iclass 23, count 0 2006.229.11:05:24.73#ibcon#*before return 0, iclass 23, count 0 2006.229.11:05:24.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:24.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:24.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:05:24.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:05:24.73$vck44/va=5,4 2006.229.11:05:24.73#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:05:24.73#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:05:24.73#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:24.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:24.79#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:24.79#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:24.79#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:05:24.79#ibcon#first serial, iclass 25, count 2 2006.229.11:05:24.79#ibcon#enter sib2, iclass 25, count 2 2006.229.11:05:24.79#ibcon#flushed, iclass 25, count 2 2006.229.11:05:24.79#ibcon#about to write, iclass 25, count 2 2006.229.11:05:24.79#ibcon#wrote, iclass 25, count 2 2006.229.11:05:24.79#ibcon#about to read 3, iclass 25, count 2 2006.229.11:05:24.81#ibcon#read 3, iclass 25, count 2 2006.229.11:05:24.81#ibcon#about to read 4, iclass 25, count 2 2006.229.11:05:24.81#ibcon#read 4, iclass 25, count 2 2006.229.11:05:24.81#ibcon#about to read 5, iclass 25, count 2 2006.229.11:05:24.81#ibcon#read 5, iclass 25, count 2 2006.229.11:05:24.81#ibcon#about to read 6, iclass 25, count 2 2006.229.11:05:24.81#ibcon#read 6, iclass 25, count 2 2006.229.11:05:24.81#ibcon#end of sib2, iclass 25, count 2 2006.229.11:05:24.81#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:05:24.81#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:05:24.81#ibcon#[25=AT05-04\r\n] 2006.229.11:05:24.81#ibcon#*before write, iclass 25, count 2 2006.229.11:05:24.81#ibcon#enter sib2, iclass 25, count 2 2006.229.11:05:24.81#ibcon#flushed, iclass 25, count 2 2006.229.11:05:24.81#ibcon#about to write, iclass 25, count 2 2006.229.11:05:24.81#ibcon#wrote, iclass 25, count 2 2006.229.11:05:24.81#ibcon#about to read 3, iclass 25, count 2 2006.229.11:05:24.84#ibcon#read 3, iclass 25, count 2 2006.229.11:05:24.84#ibcon#about to read 4, iclass 25, count 2 2006.229.11:05:24.84#ibcon#read 4, iclass 25, count 2 2006.229.11:05:24.84#ibcon#about to read 5, iclass 25, count 2 2006.229.11:05:24.84#ibcon#read 5, iclass 25, count 2 2006.229.11:05:24.84#ibcon#about to read 6, iclass 25, count 2 2006.229.11:05:24.84#ibcon#read 6, iclass 25, count 2 2006.229.11:05:24.84#ibcon#end of sib2, iclass 25, count 2 2006.229.11:05:24.84#ibcon#*after write, iclass 25, count 2 2006.229.11:05:24.84#ibcon#*before return 0, iclass 25, count 2 2006.229.11:05:24.84#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:24.84#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:24.84#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:05:24.84#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:24.84#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:24.96#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:24.96#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:24.96#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:05:24.96#ibcon#first serial, iclass 25, count 0 2006.229.11:05:24.96#ibcon#enter sib2, iclass 25, count 0 2006.229.11:05:24.96#ibcon#flushed, iclass 25, count 0 2006.229.11:05:24.96#ibcon#about to write, iclass 25, count 0 2006.229.11:05:24.96#ibcon#wrote, iclass 25, count 0 2006.229.11:05:24.96#ibcon#about to read 3, iclass 25, count 0 2006.229.11:05:24.98#ibcon#read 3, iclass 25, count 0 2006.229.11:05:24.98#ibcon#about to read 4, iclass 25, count 0 2006.229.11:05:24.98#ibcon#read 4, iclass 25, count 0 2006.229.11:05:24.98#ibcon#about to read 5, iclass 25, count 0 2006.229.11:05:24.98#ibcon#read 5, iclass 25, count 0 2006.229.11:05:24.98#ibcon#about to read 6, iclass 25, count 0 2006.229.11:05:24.98#ibcon#read 6, iclass 25, count 0 2006.229.11:05:24.98#ibcon#end of sib2, iclass 25, count 0 2006.229.11:05:24.98#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:05:24.98#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:05:24.98#ibcon#[25=USB\r\n] 2006.229.11:05:24.98#ibcon#*before write, iclass 25, count 0 2006.229.11:05:24.98#ibcon#enter sib2, iclass 25, count 0 2006.229.11:05:24.98#ibcon#flushed, iclass 25, count 0 2006.229.11:05:24.98#ibcon#about to write, iclass 25, count 0 2006.229.11:05:24.98#ibcon#wrote, iclass 25, count 0 2006.229.11:05:24.98#ibcon#about to read 3, iclass 25, count 0 2006.229.11:05:25.01#ibcon#read 3, iclass 25, count 0 2006.229.11:05:25.01#ibcon#about to read 4, iclass 25, count 0 2006.229.11:05:25.01#ibcon#read 4, iclass 25, count 0 2006.229.11:05:25.01#ibcon#about to read 5, iclass 25, count 0 2006.229.11:05:25.01#ibcon#read 5, iclass 25, count 0 2006.229.11:05:25.01#ibcon#about to read 6, iclass 25, count 0 2006.229.11:05:25.01#ibcon#read 6, iclass 25, count 0 2006.229.11:05:25.01#ibcon#end of sib2, iclass 25, count 0 2006.229.11:05:25.01#ibcon#*after write, iclass 25, count 0 2006.229.11:05:25.01#ibcon#*before return 0, iclass 25, count 0 2006.229.11:05:25.01#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:25.01#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:25.01#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:05:25.01#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:05:25.01$vck44/valo=6,814.99 2006.229.11:05:25.01#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:05:25.01#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:05:25.01#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:25.01#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:25.01#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:25.01#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:25.01#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:05:25.01#ibcon#first serial, iclass 27, count 0 2006.229.11:05:25.01#ibcon#enter sib2, iclass 27, count 0 2006.229.11:05:25.01#ibcon#flushed, iclass 27, count 0 2006.229.11:05:25.01#ibcon#about to write, iclass 27, count 0 2006.229.11:05:25.01#ibcon#wrote, iclass 27, count 0 2006.229.11:05:25.01#ibcon#about to read 3, iclass 27, count 0 2006.229.11:05:25.03#ibcon#read 3, iclass 27, count 0 2006.229.11:05:25.03#ibcon#about to read 4, iclass 27, count 0 2006.229.11:05:25.03#ibcon#read 4, iclass 27, count 0 2006.229.11:05:25.03#ibcon#about to read 5, iclass 27, count 0 2006.229.11:05:25.03#ibcon#read 5, iclass 27, count 0 2006.229.11:05:25.03#ibcon#about to read 6, iclass 27, count 0 2006.229.11:05:25.03#ibcon#read 6, iclass 27, count 0 2006.229.11:05:25.03#ibcon#end of sib2, iclass 27, count 0 2006.229.11:05:25.03#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:05:25.03#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:05:25.03#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:05:25.03#ibcon#*before write, iclass 27, count 0 2006.229.11:05:25.03#ibcon#enter sib2, iclass 27, count 0 2006.229.11:05:25.03#ibcon#flushed, iclass 27, count 0 2006.229.11:05:25.03#ibcon#about to write, iclass 27, count 0 2006.229.11:05:25.03#ibcon#wrote, iclass 27, count 0 2006.229.11:05:25.03#ibcon#about to read 3, iclass 27, count 0 2006.229.11:05:25.07#ibcon#read 3, iclass 27, count 0 2006.229.11:05:25.07#ibcon#about to read 4, iclass 27, count 0 2006.229.11:05:25.07#ibcon#read 4, iclass 27, count 0 2006.229.11:05:25.07#ibcon#about to read 5, iclass 27, count 0 2006.229.11:05:25.07#ibcon#read 5, iclass 27, count 0 2006.229.11:05:25.07#ibcon#about to read 6, iclass 27, count 0 2006.229.11:05:25.07#ibcon#read 6, iclass 27, count 0 2006.229.11:05:25.07#ibcon#end of sib2, iclass 27, count 0 2006.229.11:05:25.07#ibcon#*after write, iclass 27, count 0 2006.229.11:05:25.07#ibcon#*before return 0, iclass 27, count 0 2006.229.11:05:25.07#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:25.07#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:25.07#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:05:25.07#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:05:25.07$vck44/va=6,4 2006.229.11:05:25.07#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.11:05:25.07#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.11:05:25.07#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:25.07#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:25.13#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:25.13#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:25.13#ibcon#enter wrdev, iclass 29, count 2 2006.229.11:05:25.13#ibcon#first serial, iclass 29, count 2 2006.229.11:05:25.13#ibcon#enter sib2, iclass 29, count 2 2006.229.11:05:25.13#ibcon#flushed, iclass 29, count 2 2006.229.11:05:25.13#ibcon#about to write, iclass 29, count 2 2006.229.11:05:25.13#ibcon#wrote, iclass 29, count 2 2006.229.11:05:25.13#ibcon#about to read 3, iclass 29, count 2 2006.229.11:05:25.15#ibcon#read 3, iclass 29, count 2 2006.229.11:05:25.15#ibcon#about to read 4, iclass 29, count 2 2006.229.11:05:25.15#ibcon#read 4, iclass 29, count 2 2006.229.11:05:25.15#ibcon#about to read 5, iclass 29, count 2 2006.229.11:05:25.15#ibcon#read 5, iclass 29, count 2 2006.229.11:05:25.15#ibcon#about to read 6, iclass 29, count 2 2006.229.11:05:25.15#ibcon#read 6, iclass 29, count 2 2006.229.11:05:25.15#ibcon#end of sib2, iclass 29, count 2 2006.229.11:05:25.15#ibcon#*mode == 0, iclass 29, count 2 2006.229.11:05:25.15#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.11:05:25.15#ibcon#[25=AT06-04\r\n] 2006.229.11:05:25.15#ibcon#*before write, iclass 29, count 2 2006.229.11:05:25.15#ibcon#enter sib2, iclass 29, count 2 2006.229.11:05:25.15#ibcon#flushed, iclass 29, count 2 2006.229.11:05:25.15#ibcon#about to write, iclass 29, count 2 2006.229.11:05:25.15#ibcon#wrote, iclass 29, count 2 2006.229.11:05:25.15#ibcon#about to read 3, iclass 29, count 2 2006.229.11:05:25.18#ibcon#read 3, iclass 29, count 2 2006.229.11:05:25.18#ibcon#about to read 4, iclass 29, count 2 2006.229.11:05:25.18#ibcon#read 4, iclass 29, count 2 2006.229.11:05:25.18#ibcon#about to read 5, iclass 29, count 2 2006.229.11:05:25.18#ibcon#read 5, iclass 29, count 2 2006.229.11:05:25.18#ibcon#about to read 6, iclass 29, count 2 2006.229.11:05:25.18#ibcon#read 6, iclass 29, count 2 2006.229.11:05:25.18#ibcon#end of sib2, iclass 29, count 2 2006.229.11:05:25.18#ibcon#*after write, iclass 29, count 2 2006.229.11:05:25.18#ibcon#*before return 0, iclass 29, count 2 2006.229.11:05:25.18#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:25.18#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:25.18#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.11:05:25.18#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:25.18#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:25.30#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:25.30#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:25.30#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:05:25.30#ibcon#first serial, iclass 29, count 0 2006.229.11:05:25.30#ibcon#enter sib2, iclass 29, count 0 2006.229.11:05:25.30#ibcon#flushed, iclass 29, count 0 2006.229.11:05:25.30#ibcon#about to write, iclass 29, count 0 2006.229.11:05:25.30#ibcon#wrote, iclass 29, count 0 2006.229.11:05:25.30#ibcon#about to read 3, iclass 29, count 0 2006.229.11:05:25.32#ibcon#read 3, iclass 29, count 0 2006.229.11:05:25.32#ibcon#about to read 4, iclass 29, count 0 2006.229.11:05:25.32#ibcon#read 4, iclass 29, count 0 2006.229.11:05:25.32#ibcon#about to read 5, iclass 29, count 0 2006.229.11:05:25.32#ibcon#read 5, iclass 29, count 0 2006.229.11:05:25.32#ibcon#about to read 6, iclass 29, count 0 2006.229.11:05:25.32#ibcon#read 6, iclass 29, count 0 2006.229.11:05:25.32#ibcon#end of sib2, iclass 29, count 0 2006.229.11:05:25.32#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:05:25.32#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:05:25.32#ibcon#[25=USB\r\n] 2006.229.11:05:25.32#ibcon#*before write, iclass 29, count 0 2006.229.11:05:25.32#ibcon#enter sib2, iclass 29, count 0 2006.229.11:05:25.32#ibcon#flushed, iclass 29, count 0 2006.229.11:05:25.32#ibcon#about to write, iclass 29, count 0 2006.229.11:05:25.32#ibcon#wrote, iclass 29, count 0 2006.229.11:05:25.32#ibcon#about to read 3, iclass 29, count 0 2006.229.11:05:25.35#ibcon#read 3, iclass 29, count 0 2006.229.11:05:25.35#ibcon#about to read 4, iclass 29, count 0 2006.229.11:05:25.35#ibcon#read 4, iclass 29, count 0 2006.229.11:05:25.35#ibcon#about to read 5, iclass 29, count 0 2006.229.11:05:25.35#ibcon#read 5, iclass 29, count 0 2006.229.11:05:25.35#ibcon#about to read 6, iclass 29, count 0 2006.229.11:05:25.35#ibcon#read 6, iclass 29, count 0 2006.229.11:05:25.35#ibcon#end of sib2, iclass 29, count 0 2006.229.11:05:25.35#ibcon#*after write, iclass 29, count 0 2006.229.11:05:25.35#ibcon#*before return 0, iclass 29, count 0 2006.229.11:05:25.35#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:25.35#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:25.35#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:05:25.35#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:05:25.35$vck44/valo=7,864.99 2006.229.11:05:25.35#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:05:25.35#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:05:25.35#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:25.35#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:25.35#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:25.35#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:25.35#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:05:25.35#ibcon#first serial, iclass 31, count 0 2006.229.11:05:25.35#ibcon#enter sib2, iclass 31, count 0 2006.229.11:05:25.35#ibcon#flushed, iclass 31, count 0 2006.229.11:05:25.35#ibcon#about to write, iclass 31, count 0 2006.229.11:05:25.35#ibcon#wrote, iclass 31, count 0 2006.229.11:05:25.35#ibcon#about to read 3, iclass 31, count 0 2006.229.11:05:25.37#ibcon#read 3, iclass 31, count 0 2006.229.11:05:25.37#ibcon#about to read 4, iclass 31, count 0 2006.229.11:05:25.37#ibcon#read 4, iclass 31, count 0 2006.229.11:05:25.37#ibcon#about to read 5, iclass 31, count 0 2006.229.11:05:25.37#ibcon#read 5, iclass 31, count 0 2006.229.11:05:25.37#ibcon#about to read 6, iclass 31, count 0 2006.229.11:05:25.37#ibcon#read 6, iclass 31, count 0 2006.229.11:05:25.37#ibcon#end of sib2, iclass 31, count 0 2006.229.11:05:25.37#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:05:25.37#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:05:25.37#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:05:25.37#ibcon#*before write, iclass 31, count 0 2006.229.11:05:25.37#ibcon#enter sib2, iclass 31, count 0 2006.229.11:05:25.37#ibcon#flushed, iclass 31, count 0 2006.229.11:05:25.37#ibcon#about to write, iclass 31, count 0 2006.229.11:05:25.37#ibcon#wrote, iclass 31, count 0 2006.229.11:05:25.37#ibcon#about to read 3, iclass 31, count 0 2006.229.11:05:25.41#ibcon#read 3, iclass 31, count 0 2006.229.11:05:25.41#ibcon#about to read 4, iclass 31, count 0 2006.229.11:05:25.41#ibcon#read 4, iclass 31, count 0 2006.229.11:05:25.41#ibcon#about to read 5, iclass 31, count 0 2006.229.11:05:25.41#ibcon#read 5, iclass 31, count 0 2006.229.11:05:25.41#ibcon#about to read 6, iclass 31, count 0 2006.229.11:05:25.41#ibcon#read 6, iclass 31, count 0 2006.229.11:05:25.41#ibcon#end of sib2, iclass 31, count 0 2006.229.11:05:25.41#ibcon#*after write, iclass 31, count 0 2006.229.11:05:25.41#ibcon#*before return 0, iclass 31, count 0 2006.229.11:05:25.41#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:25.41#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:25.41#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:05:25.41#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:05:25.41$vck44/va=7,5 2006.229.11:05:25.41#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.11:05:25.41#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.11:05:25.41#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:25.41#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:25.47#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:25.47#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:25.47#ibcon#enter wrdev, iclass 33, count 2 2006.229.11:05:25.47#ibcon#first serial, iclass 33, count 2 2006.229.11:05:25.47#ibcon#enter sib2, iclass 33, count 2 2006.229.11:05:25.47#ibcon#flushed, iclass 33, count 2 2006.229.11:05:25.47#ibcon#about to write, iclass 33, count 2 2006.229.11:05:25.47#ibcon#wrote, iclass 33, count 2 2006.229.11:05:25.47#ibcon#about to read 3, iclass 33, count 2 2006.229.11:05:25.49#ibcon#read 3, iclass 33, count 2 2006.229.11:05:25.49#ibcon#about to read 4, iclass 33, count 2 2006.229.11:05:25.49#ibcon#read 4, iclass 33, count 2 2006.229.11:05:25.49#ibcon#about to read 5, iclass 33, count 2 2006.229.11:05:25.49#ibcon#read 5, iclass 33, count 2 2006.229.11:05:25.49#ibcon#about to read 6, iclass 33, count 2 2006.229.11:05:25.49#ibcon#read 6, iclass 33, count 2 2006.229.11:05:25.49#ibcon#end of sib2, iclass 33, count 2 2006.229.11:05:25.49#ibcon#*mode == 0, iclass 33, count 2 2006.229.11:05:25.49#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.11:05:25.49#ibcon#[25=AT07-05\r\n] 2006.229.11:05:25.49#ibcon#*before write, iclass 33, count 2 2006.229.11:05:25.49#ibcon#enter sib2, iclass 33, count 2 2006.229.11:05:25.49#ibcon#flushed, iclass 33, count 2 2006.229.11:05:25.49#ibcon#about to write, iclass 33, count 2 2006.229.11:05:25.49#ibcon#wrote, iclass 33, count 2 2006.229.11:05:25.49#ibcon#about to read 3, iclass 33, count 2 2006.229.11:05:25.52#ibcon#read 3, iclass 33, count 2 2006.229.11:05:25.52#ibcon#about to read 4, iclass 33, count 2 2006.229.11:05:25.52#ibcon#read 4, iclass 33, count 2 2006.229.11:05:25.52#ibcon#about to read 5, iclass 33, count 2 2006.229.11:05:25.52#ibcon#read 5, iclass 33, count 2 2006.229.11:05:25.52#ibcon#about to read 6, iclass 33, count 2 2006.229.11:05:25.52#ibcon#read 6, iclass 33, count 2 2006.229.11:05:25.52#ibcon#end of sib2, iclass 33, count 2 2006.229.11:05:25.52#ibcon#*after write, iclass 33, count 2 2006.229.11:05:25.52#ibcon#*before return 0, iclass 33, count 2 2006.229.11:05:25.52#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:25.52#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:25.52#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.11:05:25.52#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:25.52#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:25.64#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:25.64#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:25.64#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:05:25.64#ibcon#first serial, iclass 33, count 0 2006.229.11:05:25.64#ibcon#enter sib2, iclass 33, count 0 2006.229.11:05:25.64#ibcon#flushed, iclass 33, count 0 2006.229.11:05:25.64#ibcon#about to write, iclass 33, count 0 2006.229.11:05:25.64#ibcon#wrote, iclass 33, count 0 2006.229.11:05:25.64#ibcon#about to read 3, iclass 33, count 0 2006.229.11:05:25.66#ibcon#read 3, iclass 33, count 0 2006.229.11:05:25.66#ibcon#about to read 4, iclass 33, count 0 2006.229.11:05:25.66#ibcon#read 4, iclass 33, count 0 2006.229.11:05:25.66#ibcon#about to read 5, iclass 33, count 0 2006.229.11:05:25.66#ibcon#read 5, iclass 33, count 0 2006.229.11:05:25.66#ibcon#about to read 6, iclass 33, count 0 2006.229.11:05:25.66#ibcon#read 6, iclass 33, count 0 2006.229.11:05:25.66#ibcon#end of sib2, iclass 33, count 0 2006.229.11:05:25.66#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:05:25.66#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:05:25.66#ibcon#[25=USB\r\n] 2006.229.11:05:25.66#ibcon#*before write, iclass 33, count 0 2006.229.11:05:25.66#ibcon#enter sib2, iclass 33, count 0 2006.229.11:05:25.66#ibcon#flushed, iclass 33, count 0 2006.229.11:05:25.66#ibcon#about to write, iclass 33, count 0 2006.229.11:05:25.66#ibcon#wrote, iclass 33, count 0 2006.229.11:05:25.66#ibcon#about to read 3, iclass 33, count 0 2006.229.11:05:25.69#ibcon#read 3, iclass 33, count 0 2006.229.11:05:25.69#ibcon#about to read 4, iclass 33, count 0 2006.229.11:05:25.69#ibcon#read 4, iclass 33, count 0 2006.229.11:05:25.69#ibcon#about to read 5, iclass 33, count 0 2006.229.11:05:25.69#ibcon#read 5, iclass 33, count 0 2006.229.11:05:25.69#ibcon#about to read 6, iclass 33, count 0 2006.229.11:05:25.69#ibcon#read 6, iclass 33, count 0 2006.229.11:05:25.69#ibcon#end of sib2, iclass 33, count 0 2006.229.11:05:25.69#ibcon#*after write, iclass 33, count 0 2006.229.11:05:25.69#ibcon#*before return 0, iclass 33, count 0 2006.229.11:05:25.69#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:25.69#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:25.69#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:05:25.69#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:05:25.69$vck44/valo=8,884.99 2006.229.11:05:25.69#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.11:05:25.69#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.11:05:25.69#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:25.69#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:25.69#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:25.69#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:25.69#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:05:25.69#ibcon#first serial, iclass 35, count 0 2006.229.11:05:25.69#ibcon#enter sib2, iclass 35, count 0 2006.229.11:05:25.69#ibcon#flushed, iclass 35, count 0 2006.229.11:05:25.69#ibcon#about to write, iclass 35, count 0 2006.229.11:05:25.69#ibcon#wrote, iclass 35, count 0 2006.229.11:05:25.69#ibcon#about to read 3, iclass 35, count 0 2006.229.11:05:25.71#ibcon#read 3, iclass 35, count 0 2006.229.11:05:25.71#ibcon#about to read 4, iclass 35, count 0 2006.229.11:05:25.71#ibcon#read 4, iclass 35, count 0 2006.229.11:05:25.71#ibcon#about to read 5, iclass 35, count 0 2006.229.11:05:25.71#ibcon#read 5, iclass 35, count 0 2006.229.11:05:25.71#ibcon#about to read 6, iclass 35, count 0 2006.229.11:05:25.71#ibcon#read 6, iclass 35, count 0 2006.229.11:05:25.71#ibcon#end of sib2, iclass 35, count 0 2006.229.11:05:25.71#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:05:25.71#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:05:25.71#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:05:25.71#ibcon#*before write, iclass 35, count 0 2006.229.11:05:25.71#ibcon#enter sib2, iclass 35, count 0 2006.229.11:05:25.71#ibcon#flushed, iclass 35, count 0 2006.229.11:05:25.71#ibcon#about to write, iclass 35, count 0 2006.229.11:05:25.71#ibcon#wrote, iclass 35, count 0 2006.229.11:05:25.71#ibcon#about to read 3, iclass 35, count 0 2006.229.11:05:25.75#ibcon#read 3, iclass 35, count 0 2006.229.11:05:25.75#ibcon#about to read 4, iclass 35, count 0 2006.229.11:05:25.75#ibcon#read 4, iclass 35, count 0 2006.229.11:05:25.75#ibcon#about to read 5, iclass 35, count 0 2006.229.11:05:25.75#ibcon#read 5, iclass 35, count 0 2006.229.11:05:25.75#ibcon#about to read 6, iclass 35, count 0 2006.229.11:05:25.75#ibcon#read 6, iclass 35, count 0 2006.229.11:05:25.75#ibcon#end of sib2, iclass 35, count 0 2006.229.11:05:25.75#ibcon#*after write, iclass 35, count 0 2006.229.11:05:25.75#ibcon#*before return 0, iclass 35, count 0 2006.229.11:05:25.75#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:25.75#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:25.75#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:05:25.75#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:05:25.75$vck44/va=8,6 2006.229.11:05:25.75#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.11:05:25.75#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.11:05:25.75#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:25.75#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:05:25.81#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:05:25.81#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:05:25.81#ibcon#enter wrdev, iclass 37, count 2 2006.229.11:05:25.81#ibcon#first serial, iclass 37, count 2 2006.229.11:05:25.81#ibcon#enter sib2, iclass 37, count 2 2006.229.11:05:25.81#ibcon#flushed, iclass 37, count 2 2006.229.11:05:25.81#ibcon#about to write, iclass 37, count 2 2006.229.11:05:25.81#ibcon#wrote, iclass 37, count 2 2006.229.11:05:25.81#ibcon#about to read 3, iclass 37, count 2 2006.229.11:05:25.83#ibcon#read 3, iclass 37, count 2 2006.229.11:05:25.83#ibcon#about to read 4, iclass 37, count 2 2006.229.11:05:25.83#ibcon#read 4, iclass 37, count 2 2006.229.11:05:25.83#ibcon#about to read 5, iclass 37, count 2 2006.229.11:05:25.83#ibcon#read 5, iclass 37, count 2 2006.229.11:05:25.83#ibcon#about to read 6, iclass 37, count 2 2006.229.11:05:25.83#ibcon#read 6, iclass 37, count 2 2006.229.11:05:25.83#ibcon#end of sib2, iclass 37, count 2 2006.229.11:05:25.83#ibcon#*mode == 0, iclass 37, count 2 2006.229.11:05:25.83#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.11:05:25.83#ibcon#[25=AT08-06\r\n] 2006.229.11:05:25.83#ibcon#*before write, iclass 37, count 2 2006.229.11:05:25.83#ibcon#enter sib2, iclass 37, count 2 2006.229.11:05:25.83#ibcon#flushed, iclass 37, count 2 2006.229.11:05:25.83#ibcon#about to write, iclass 37, count 2 2006.229.11:05:25.83#ibcon#wrote, iclass 37, count 2 2006.229.11:05:25.83#ibcon#about to read 3, iclass 37, count 2 2006.229.11:05:25.86#ibcon#read 3, iclass 37, count 2 2006.229.11:05:25.86#ibcon#about to read 4, iclass 37, count 2 2006.229.11:05:25.86#ibcon#read 4, iclass 37, count 2 2006.229.11:05:25.86#ibcon#about to read 5, iclass 37, count 2 2006.229.11:05:25.86#ibcon#read 5, iclass 37, count 2 2006.229.11:05:25.86#ibcon#about to read 6, iclass 37, count 2 2006.229.11:05:25.86#ibcon#read 6, iclass 37, count 2 2006.229.11:05:25.86#ibcon#end of sib2, iclass 37, count 2 2006.229.11:05:25.86#ibcon#*after write, iclass 37, count 2 2006.229.11:05:25.86#ibcon#*before return 0, iclass 37, count 2 2006.229.11:05:25.86#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:05:25.86#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:05:25.86#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.11:05:25.86#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:25.86#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:05:25.98#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:05:25.98#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:05:25.98#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:05:25.98#ibcon#first serial, iclass 37, count 0 2006.229.11:05:25.98#ibcon#enter sib2, iclass 37, count 0 2006.229.11:05:25.98#ibcon#flushed, iclass 37, count 0 2006.229.11:05:25.98#ibcon#about to write, iclass 37, count 0 2006.229.11:05:25.98#ibcon#wrote, iclass 37, count 0 2006.229.11:05:25.98#ibcon#about to read 3, iclass 37, count 0 2006.229.11:05:26.00#ibcon#read 3, iclass 37, count 0 2006.229.11:05:26.00#ibcon#about to read 4, iclass 37, count 0 2006.229.11:05:26.00#ibcon#read 4, iclass 37, count 0 2006.229.11:05:26.00#ibcon#about to read 5, iclass 37, count 0 2006.229.11:05:26.00#ibcon#read 5, iclass 37, count 0 2006.229.11:05:26.00#ibcon#about to read 6, iclass 37, count 0 2006.229.11:05:26.00#ibcon#read 6, iclass 37, count 0 2006.229.11:05:26.00#ibcon#end of sib2, iclass 37, count 0 2006.229.11:05:26.00#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:05:26.00#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:05:26.00#ibcon#[25=USB\r\n] 2006.229.11:05:26.00#ibcon#*before write, iclass 37, count 0 2006.229.11:05:26.00#ibcon#enter sib2, iclass 37, count 0 2006.229.11:05:26.00#ibcon#flushed, iclass 37, count 0 2006.229.11:05:26.00#ibcon#about to write, iclass 37, count 0 2006.229.11:05:26.00#ibcon#wrote, iclass 37, count 0 2006.229.11:05:26.00#ibcon#about to read 3, iclass 37, count 0 2006.229.11:05:26.03#ibcon#read 3, iclass 37, count 0 2006.229.11:05:26.03#ibcon#about to read 4, iclass 37, count 0 2006.229.11:05:26.03#ibcon#read 4, iclass 37, count 0 2006.229.11:05:26.03#ibcon#about to read 5, iclass 37, count 0 2006.229.11:05:26.03#ibcon#read 5, iclass 37, count 0 2006.229.11:05:26.03#ibcon#about to read 6, iclass 37, count 0 2006.229.11:05:26.03#ibcon#read 6, iclass 37, count 0 2006.229.11:05:26.03#ibcon#end of sib2, iclass 37, count 0 2006.229.11:05:26.03#ibcon#*after write, iclass 37, count 0 2006.229.11:05:26.03#ibcon#*before return 0, iclass 37, count 0 2006.229.11:05:26.03#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:05:26.03#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:05:26.03#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:05:26.03#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:05:26.03$vck44/vblo=1,629.99 2006.229.11:05:26.03#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.11:05:26.03#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.11:05:26.03#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:26.03#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:05:26.03#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:05:26.03#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:05:26.03#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:05:26.03#ibcon#first serial, iclass 39, count 0 2006.229.11:05:26.03#ibcon#enter sib2, iclass 39, count 0 2006.229.11:05:26.03#ibcon#flushed, iclass 39, count 0 2006.229.11:05:26.03#ibcon#about to write, iclass 39, count 0 2006.229.11:05:26.03#ibcon#wrote, iclass 39, count 0 2006.229.11:05:26.03#ibcon#about to read 3, iclass 39, count 0 2006.229.11:05:26.05#ibcon#read 3, iclass 39, count 0 2006.229.11:05:26.05#ibcon#about to read 4, iclass 39, count 0 2006.229.11:05:26.05#ibcon#read 4, iclass 39, count 0 2006.229.11:05:26.05#ibcon#about to read 5, iclass 39, count 0 2006.229.11:05:26.05#ibcon#read 5, iclass 39, count 0 2006.229.11:05:26.05#ibcon#about to read 6, iclass 39, count 0 2006.229.11:05:26.05#ibcon#read 6, iclass 39, count 0 2006.229.11:05:26.05#ibcon#end of sib2, iclass 39, count 0 2006.229.11:05:26.05#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:05:26.05#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:05:26.05#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:05:26.05#ibcon#*before write, iclass 39, count 0 2006.229.11:05:26.05#ibcon#enter sib2, iclass 39, count 0 2006.229.11:05:26.05#ibcon#flushed, iclass 39, count 0 2006.229.11:05:26.05#ibcon#about to write, iclass 39, count 0 2006.229.11:05:26.05#ibcon#wrote, iclass 39, count 0 2006.229.11:05:26.05#ibcon#about to read 3, iclass 39, count 0 2006.229.11:05:26.09#ibcon#read 3, iclass 39, count 0 2006.229.11:05:26.09#ibcon#about to read 4, iclass 39, count 0 2006.229.11:05:26.09#ibcon#read 4, iclass 39, count 0 2006.229.11:05:26.09#ibcon#about to read 5, iclass 39, count 0 2006.229.11:05:26.09#ibcon#read 5, iclass 39, count 0 2006.229.11:05:26.09#ibcon#about to read 6, iclass 39, count 0 2006.229.11:05:26.09#ibcon#read 6, iclass 39, count 0 2006.229.11:05:26.09#ibcon#end of sib2, iclass 39, count 0 2006.229.11:05:26.09#ibcon#*after write, iclass 39, count 0 2006.229.11:05:26.09#ibcon#*before return 0, iclass 39, count 0 2006.229.11:05:26.09#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:05:26.09#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:05:26.09#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:05:26.09#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:05:26.09$vck44/vb=1,4 2006.229.11:05:26.09#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.11:05:26.09#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.11:05:26.09#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:26.09#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:05:26.09#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:05:26.09#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:05:26.09#ibcon#enter wrdev, iclass 3, count 2 2006.229.11:05:26.09#ibcon#first serial, iclass 3, count 2 2006.229.11:05:26.09#ibcon#enter sib2, iclass 3, count 2 2006.229.11:05:26.09#ibcon#flushed, iclass 3, count 2 2006.229.11:05:26.09#ibcon#about to write, iclass 3, count 2 2006.229.11:05:26.09#ibcon#wrote, iclass 3, count 2 2006.229.11:05:26.09#ibcon#about to read 3, iclass 3, count 2 2006.229.11:05:26.11#ibcon#read 3, iclass 3, count 2 2006.229.11:05:26.11#ibcon#about to read 4, iclass 3, count 2 2006.229.11:05:26.11#ibcon#read 4, iclass 3, count 2 2006.229.11:05:26.11#ibcon#about to read 5, iclass 3, count 2 2006.229.11:05:26.11#ibcon#read 5, iclass 3, count 2 2006.229.11:05:26.11#ibcon#about to read 6, iclass 3, count 2 2006.229.11:05:26.11#ibcon#read 6, iclass 3, count 2 2006.229.11:05:26.11#ibcon#end of sib2, iclass 3, count 2 2006.229.11:05:26.11#ibcon#*mode == 0, iclass 3, count 2 2006.229.11:05:26.11#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.11:05:26.11#ibcon#[27=AT01-04\r\n] 2006.229.11:05:26.11#ibcon#*before write, iclass 3, count 2 2006.229.11:05:26.11#ibcon#enter sib2, iclass 3, count 2 2006.229.11:05:26.11#ibcon#flushed, iclass 3, count 2 2006.229.11:05:26.11#ibcon#about to write, iclass 3, count 2 2006.229.11:05:26.11#ibcon#wrote, iclass 3, count 2 2006.229.11:05:26.11#ibcon#about to read 3, iclass 3, count 2 2006.229.11:05:26.14#ibcon#read 3, iclass 3, count 2 2006.229.11:05:26.14#ibcon#about to read 4, iclass 3, count 2 2006.229.11:05:26.14#ibcon#read 4, iclass 3, count 2 2006.229.11:05:26.14#ibcon#about to read 5, iclass 3, count 2 2006.229.11:05:26.14#ibcon#read 5, iclass 3, count 2 2006.229.11:05:26.14#ibcon#about to read 6, iclass 3, count 2 2006.229.11:05:26.14#ibcon#read 6, iclass 3, count 2 2006.229.11:05:26.14#ibcon#end of sib2, iclass 3, count 2 2006.229.11:05:26.14#ibcon#*after write, iclass 3, count 2 2006.229.11:05:26.14#ibcon#*before return 0, iclass 3, count 2 2006.229.11:05:26.14#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:05:26.14#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:05:26.14#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.11:05:26.14#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:26.14#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:05:26.26#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:05:26.26#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:05:26.26#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:05:26.26#ibcon#first serial, iclass 3, count 0 2006.229.11:05:26.26#ibcon#enter sib2, iclass 3, count 0 2006.229.11:05:26.26#ibcon#flushed, iclass 3, count 0 2006.229.11:05:26.26#ibcon#about to write, iclass 3, count 0 2006.229.11:05:26.26#ibcon#wrote, iclass 3, count 0 2006.229.11:05:26.26#ibcon#about to read 3, iclass 3, count 0 2006.229.11:05:26.28#ibcon#read 3, iclass 3, count 0 2006.229.11:05:26.28#ibcon#about to read 4, iclass 3, count 0 2006.229.11:05:26.28#ibcon#read 4, iclass 3, count 0 2006.229.11:05:26.28#ibcon#about to read 5, iclass 3, count 0 2006.229.11:05:26.28#ibcon#read 5, iclass 3, count 0 2006.229.11:05:26.28#ibcon#about to read 6, iclass 3, count 0 2006.229.11:05:26.28#ibcon#read 6, iclass 3, count 0 2006.229.11:05:26.28#ibcon#end of sib2, iclass 3, count 0 2006.229.11:05:26.28#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:05:26.28#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:05:26.28#ibcon#[27=USB\r\n] 2006.229.11:05:26.28#ibcon#*before write, iclass 3, count 0 2006.229.11:05:26.28#ibcon#enter sib2, iclass 3, count 0 2006.229.11:05:26.28#ibcon#flushed, iclass 3, count 0 2006.229.11:05:26.28#ibcon#about to write, iclass 3, count 0 2006.229.11:05:26.28#ibcon#wrote, iclass 3, count 0 2006.229.11:05:26.28#ibcon#about to read 3, iclass 3, count 0 2006.229.11:05:26.31#ibcon#read 3, iclass 3, count 0 2006.229.11:05:26.31#ibcon#about to read 4, iclass 3, count 0 2006.229.11:05:26.31#ibcon#read 4, iclass 3, count 0 2006.229.11:05:26.31#ibcon#about to read 5, iclass 3, count 0 2006.229.11:05:26.31#ibcon#read 5, iclass 3, count 0 2006.229.11:05:26.31#ibcon#about to read 6, iclass 3, count 0 2006.229.11:05:26.31#ibcon#read 6, iclass 3, count 0 2006.229.11:05:26.31#ibcon#end of sib2, iclass 3, count 0 2006.229.11:05:26.31#ibcon#*after write, iclass 3, count 0 2006.229.11:05:26.31#ibcon#*before return 0, iclass 3, count 0 2006.229.11:05:26.31#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:05:26.31#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:05:26.31#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:05:26.31#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:05:26.31$vck44/vblo=2,634.99 2006.229.11:05:26.31#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.11:05:26.31#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.11:05:26.31#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:26.31#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:26.31#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:26.31#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:26.31#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:05:26.31#ibcon#first serial, iclass 5, count 0 2006.229.11:05:26.31#ibcon#enter sib2, iclass 5, count 0 2006.229.11:05:26.31#ibcon#flushed, iclass 5, count 0 2006.229.11:05:26.31#ibcon#about to write, iclass 5, count 0 2006.229.11:05:26.31#ibcon#wrote, iclass 5, count 0 2006.229.11:05:26.31#ibcon#about to read 3, iclass 5, count 0 2006.229.11:05:26.33#ibcon#read 3, iclass 5, count 0 2006.229.11:05:26.33#ibcon#about to read 4, iclass 5, count 0 2006.229.11:05:26.33#ibcon#read 4, iclass 5, count 0 2006.229.11:05:26.33#ibcon#about to read 5, iclass 5, count 0 2006.229.11:05:26.33#ibcon#read 5, iclass 5, count 0 2006.229.11:05:26.33#ibcon#about to read 6, iclass 5, count 0 2006.229.11:05:26.33#ibcon#read 6, iclass 5, count 0 2006.229.11:05:26.33#ibcon#end of sib2, iclass 5, count 0 2006.229.11:05:26.33#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:05:26.33#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:05:26.33#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:05:26.33#ibcon#*before write, iclass 5, count 0 2006.229.11:05:26.33#ibcon#enter sib2, iclass 5, count 0 2006.229.11:05:26.33#ibcon#flushed, iclass 5, count 0 2006.229.11:05:26.33#ibcon#about to write, iclass 5, count 0 2006.229.11:05:26.33#ibcon#wrote, iclass 5, count 0 2006.229.11:05:26.33#ibcon#about to read 3, iclass 5, count 0 2006.229.11:05:26.37#ibcon#read 3, iclass 5, count 0 2006.229.11:05:26.37#ibcon#about to read 4, iclass 5, count 0 2006.229.11:05:26.37#ibcon#read 4, iclass 5, count 0 2006.229.11:05:26.37#ibcon#about to read 5, iclass 5, count 0 2006.229.11:05:26.37#ibcon#read 5, iclass 5, count 0 2006.229.11:05:26.37#ibcon#about to read 6, iclass 5, count 0 2006.229.11:05:26.37#ibcon#read 6, iclass 5, count 0 2006.229.11:05:26.37#ibcon#end of sib2, iclass 5, count 0 2006.229.11:05:26.37#ibcon#*after write, iclass 5, count 0 2006.229.11:05:26.37#ibcon#*before return 0, iclass 5, count 0 2006.229.11:05:26.37#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:26.37#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:05:26.37#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:05:26.37#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:05:26.37$vck44/vb=2,4 2006.229.11:05:26.37#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.11:05:26.37#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.11:05:26.37#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:26.37#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:26.43#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:26.43#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:26.43#ibcon#enter wrdev, iclass 7, count 2 2006.229.11:05:26.43#ibcon#first serial, iclass 7, count 2 2006.229.11:05:26.43#ibcon#enter sib2, iclass 7, count 2 2006.229.11:05:26.43#ibcon#flushed, iclass 7, count 2 2006.229.11:05:26.43#ibcon#about to write, iclass 7, count 2 2006.229.11:05:26.43#ibcon#wrote, iclass 7, count 2 2006.229.11:05:26.43#ibcon#about to read 3, iclass 7, count 2 2006.229.11:05:26.45#ibcon#read 3, iclass 7, count 2 2006.229.11:05:26.45#ibcon#about to read 4, iclass 7, count 2 2006.229.11:05:26.45#ibcon#read 4, iclass 7, count 2 2006.229.11:05:26.45#ibcon#about to read 5, iclass 7, count 2 2006.229.11:05:26.45#ibcon#read 5, iclass 7, count 2 2006.229.11:05:26.45#ibcon#about to read 6, iclass 7, count 2 2006.229.11:05:26.45#ibcon#read 6, iclass 7, count 2 2006.229.11:05:26.45#ibcon#end of sib2, iclass 7, count 2 2006.229.11:05:26.45#ibcon#*mode == 0, iclass 7, count 2 2006.229.11:05:26.45#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.11:05:26.45#ibcon#[27=AT02-04\r\n] 2006.229.11:05:26.45#ibcon#*before write, iclass 7, count 2 2006.229.11:05:26.45#ibcon#enter sib2, iclass 7, count 2 2006.229.11:05:26.45#ibcon#flushed, iclass 7, count 2 2006.229.11:05:26.45#ibcon#about to write, iclass 7, count 2 2006.229.11:05:26.45#ibcon#wrote, iclass 7, count 2 2006.229.11:05:26.45#ibcon#about to read 3, iclass 7, count 2 2006.229.11:05:26.48#ibcon#read 3, iclass 7, count 2 2006.229.11:05:26.48#ibcon#about to read 4, iclass 7, count 2 2006.229.11:05:26.48#ibcon#read 4, iclass 7, count 2 2006.229.11:05:26.48#ibcon#about to read 5, iclass 7, count 2 2006.229.11:05:26.48#ibcon#read 5, iclass 7, count 2 2006.229.11:05:26.48#ibcon#about to read 6, iclass 7, count 2 2006.229.11:05:26.48#ibcon#read 6, iclass 7, count 2 2006.229.11:05:26.48#ibcon#end of sib2, iclass 7, count 2 2006.229.11:05:26.48#ibcon#*after write, iclass 7, count 2 2006.229.11:05:26.48#ibcon#*before return 0, iclass 7, count 2 2006.229.11:05:26.48#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:26.48#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:05:26.48#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.11:05:26.48#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:26.48#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:26.60#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:26.60#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:26.60#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:05:26.60#ibcon#first serial, iclass 7, count 0 2006.229.11:05:26.60#ibcon#enter sib2, iclass 7, count 0 2006.229.11:05:26.60#ibcon#flushed, iclass 7, count 0 2006.229.11:05:26.60#ibcon#about to write, iclass 7, count 0 2006.229.11:05:26.60#ibcon#wrote, iclass 7, count 0 2006.229.11:05:26.60#ibcon#about to read 3, iclass 7, count 0 2006.229.11:05:26.62#ibcon#read 3, iclass 7, count 0 2006.229.11:05:26.62#ibcon#about to read 4, iclass 7, count 0 2006.229.11:05:26.62#ibcon#read 4, iclass 7, count 0 2006.229.11:05:26.62#ibcon#about to read 5, iclass 7, count 0 2006.229.11:05:26.62#ibcon#read 5, iclass 7, count 0 2006.229.11:05:26.62#ibcon#about to read 6, iclass 7, count 0 2006.229.11:05:26.62#ibcon#read 6, iclass 7, count 0 2006.229.11:05:26.62#ibcon#end of sib2, iclass 7, count 0 2006.229.11:05:26.62#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:05:26.62#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:05:26.62#ibcon#[27=USB\r\n] 2006.229.11:05:26.62#ibcon#*before write, iclass 7, count 0 2006.229.11:05:26.62#ibcon#enter sib2, iclass 7, count 0 2006.229.11:05:26.62#ibcon#flushed, iclass 7, count 0 2006.229.11:05:26.62#ibcon#about to write, iclass 7, count 0 2006.229.11:05:26.62#ibcon#wrote, iclass 7, count 0 2006.229.11:05:26.62#ibcon#about to read 3, iclass 7, count 0 2006.229.11:05:26.65#ibcon#read 3, iclass 7, count 0 2006.229.11:05:26.65#ibcon#about to read 4, iclass 7, count 0 2006.229.11:05:26.65#ibcon#read 4, iclass 7, count 0 2006.229.11:05:26.65#ibcon#about to read 5, iclass 7, count 0 2006.229.11:05:26.65#ibcon#read 5, iclass 7, count 0 2006.229.11:05:26.65#ibcon#about to read 6, iclass 7, count 0 2006.229.11:05:26.65#ibcon#read 6, iclass 7, count 0 2006.229.11:05:26.65#ibcon#end of sib2, iclass 7, count 0 2006.229.11:05:26.65#ibcon#*after write, iclass 7, count 0 2006.229.11:05:26.65#ibcon#*before return 0, iclass 7, count 0 2006.229.11:05:26.65#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:26.65#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:05:26.65#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:05:26.65#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:05:26.65$vck44/vblo=3,649.99 2006.229.11:05:26.65#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.11:05:26.65#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.11:05:26.65#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:26.65#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:26.65#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:26.65#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:26.65#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:05:26.65#ibcon#first serial, iclass 11, count 0 2006.229.11:05:26.65#ibcon#enter sib2, iclass 11, count 0 2006.229.11:05:26.65#ibcon#flushed, iclass 11, count 0 2006.229.11:05:26.65#ibcon#about to write, iclass 11, count 0 2006.229.11:05:26.65#ibcon#wrote, iclass 11, count 0 2006.229.11:05:26.65#ibcon#about to read 3, iclass 11, count 0 2006.229.11:05:26.67#ibcon#read 3, iclass 11, count 0 2006.229.11:05:26.67#ibcon#about to read 4, iclass 11, count 0 2006.229.11:05:26.67#ibcon#read 4, iclass 11, count 0 2006.229.11:05:26.67#ibcon#about to read 5, iclass 11, count 0 2006.229.11:05:26.67#ibcon#read 5, iclass 11, count 0 2006.229.11:05:26.67#ibcon#about to read 6, iclass 11, count 0 2006.229.11:05:26.67#ibcon#read 6, iclass 11, count 0 2006.229.11:05:26.67#ibcon#end of sib2, iclass 11, count 0 2006.229.11:05:26.67#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:05:26.67#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:05:26.67#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:05:26.67#ibcon#*before write, iclass 11, count 0 2006.229.11:05:26.67#ibcon#enter sib2, iclass 11, count 0 2006.229.11:05:26.67#ibcon#flushed, iclass 11, count 0 2006.229.11:05:26.67#ibcon#about to write, iclass 11, count 0 2006.229.11:05:26.67#ibcon#wrote, iclass 11, count 0 2006.229.11:05:26.67#ibcon#about to read 3, iclass 11, count 0 2006.229.11:05:26.71#ibcon#read 3, iclass 11, count 0 2006.229.11:05:26.71#ibcon#about to read 4, iclass 11, count 0 2006.229.11:05:26.71#ibcon#read 4, iclass 11, count 0 2006.229.11:05:26.71#ibcon#about to read 5, iclass 11, count 0 2006.229.11:05:26.71#ibcon#read 5, iclass 11, count 0 2006.229.11:05:26.71#ibcon#about to read 6, iclass 11, count 0 2006.229.11:05:26.71#ibcon#read 6, iclass 11, count 0 2006.229.11:05:26.71#ibcon#end of sib2, iclass 11, count 0 2006.229.11:05:26.71#ibcon#*after write, iclass 11, count 0 2006.229.11:05:26.71#ibcon#*before return 0, iclass 11, count 0 2006.229.11:05:26.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:26.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:05:26.71#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:05:26.71#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:05:26.71$vck44/vb=3,4 2006.229.11:05:26.71#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.11:05:26.71#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.11:05:26.71#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:26.71#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:26.77#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:26.77#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:26.77#ibcon#enter wrdev, iclass 13, count 2 2006.229.11:05:26.77#ibcon#first serial, iclass 13, count 2 2006.229.11:05:26.77#ibcon#enter sib2, iclass 13, count 2 2006.229.11:05:26.77#ibcon#flushed, iclass 13, count 2 2006.229.11:05:26.77#ibcon#about to write, iclass 13, count 2 2006.229.11:05:26.77#ibcon#wrote, iclass 13, count 2 2006.229.11:05:26.77#ibcon#about to read 3, iclass 13, count 2 2006.229.11:05:26.79#ibcon#read 3, iclass 13, count 2 2006.229.11:05:26.79#ibcon#about to read 4, iclass 13, count 2 2006.229.11:05:26.79#ibcon#read 4, iclass 13, count 2 2006.229.11:05:26.79#ibcon#about to read 5, iclass 13, count 2 2006.229.11:05:26.79#ibcon#read 5, iclass 13, count 2 2006.229.11:05:26.79#ibcon#about to read 6, iclass 13, count 2 2006.229.11:05:26.79#ibcon#read 6, iclass 13, count 2 2006.229.11:05:26.79#ibcon#end of sib2, iclass 13, count 2 2006.229.11:05:26.79#ibcon#*mode == 0, iclass 13, count 2 2006.229.11:05:26.79#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.11:05:26.79#ibcon#[27=AT03-04\r\n] 2006.229.11:05:26.79#ibcon#*before write, iclass 13, count 2 2006.229.11:05:26.79#ibcon#enter sib2, iclass 13, count 2 2006.229.11:05:26.79#ibcon#flushed, iclass 13, count 2 2006.229.11:05:26.79#ibcon#about to write, iclass 13, count 2 2006.229.11:05:26.79#ibcon#wrote, iclass 13, count 2 2006.229.11:05:26.79#ibcon#about to read 3, iclass 13, count 2 2006.229.11:05:26.82#ibcon#read 3, iclass 13, count 2 2006.229.11:05:26.82#ibcon#about to read 4, iclass 13, count 2 2006.229.11:05:26.82#ibcon#read 4, iclass 13, count 2 2006.229.11:05:26.82#ibcon#about to read 5, iclass 13, count 2 2006.229.11:05:26.82#ibcon#read 5, iclass 13, count 2 2006.229.11:05:26.82#ibcon#about to read 6, iclass 13, count 2 2006.229.11:05:26.82#ibcon#read 6, iclass 13, count 2 2006.229.11:05:26.82#ibcon#end of sib2, iclass 13, count 2 2006.229.11:05:26.82#ibcon#*after write, iclass 13, count 2 2006.229.11:05:26.82#ibcon#*before return 0, iclass 13, count 2 2006.229.11:05:26.82#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:26.82#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:05:26.82#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.11:05:26.82#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:26.82#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:26.94#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:26.94#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:26.94#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:05:26.94#ibcon#first serial, iclass 13, count 0 2006.229.11:05:26.94#ibcon#enter sib2, iclass 13, count 0 2006.229.11:05:26.94#ibcon#flushed, iclass 13, count 0 2006.229.11:05:26.94#ibcon#about to write, iclass 13, count 0 2006.229.11:05:26.94#ibcon#wrote, iclass 13, count 0 2006.229.11:05:26.94#ibcon#about to read 3, iclass 13, count 0 2006.229.11:05:26.96#ibcon#read 3, iclass 13, count 0 2006.229.11:05:26.96#ibcon#about to read 4, iclass 13, count 0 2006.229.11:05:26.96#ibcon#read 4, iclass 13, count 0 2006.229.11:05:26.96#ibcon#about to read 5, iclass 13, count 0 2006.229.11:05:26.96#ibcon#read 5, iclass 13, count 0 2006.229.11:05:26.96#ibcon#about to read 6, iclass 13, count 0 2006.229.11:05:26.96#ibcon#read 6, iclass 13, count 0 2006.229.11:05:26.96#ibcon#end of sib2, iclass 13, count 0 2006.229.11:05:26.96#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:05:26.96#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:05:26.96#ibcon#[27=USB\r\n] 2006.229.11:05:26.96#ibcon#*before write, iclass 13, count 0 2006.229.11:05:26.96#ibcon#enter sib2, iclass 13, count 0 2006.229.11:05:26.96#ibcon#flushed, iclass 13, count 0 2006.229.11:05:26.96#ibcon#about to write, iclass 13, count 0 2006.229.11:05:26.96#ibcon#wrote, iclass 13, count 0 2006.229.11:05:26.96#ibcon#about to read 3, iclass 13, count 0 2006.229.11:05:26.99#ibcon#read 3, iclass 13, count 0 2006.229.11:05:26.99#ibcon#about to read 4, iclass 13, count 0 2006.229.11:05:26.99#ibcon#read 4, iclass 13, count 0 2006.229.11:05:26.99#ibcon#about to read 5, iclass 13, count 0 2006.229.11:05:26.99#ibcon#read 5, iclass 13, count 0 2006.229.11:05:26.99#ibcon#about to read 6, iclass 13, count 0 2006.229.11:05:26.99#ibcon#read 6, iclass 13, count 0 2006.229.11:05:26.99#ibcon#end of sib2, iclass 13, count 0 2006.229.11:05:26.99#ibcon#*after write, iclass 13, count 0 2006.229.11:05:26.99#ibcon#*before return 0, iclass 13, count 0 2006.229.11:05:26.99#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:26.99#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:05:26.99#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:05:26.99#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:05:26.99$vck44/vblo=4,679.99 2006.229.11:05:26.99#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.11:05:26.99#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.11:05:26.99#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:26.99#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:26.99#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:26.99#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:26.99#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:05:26.99#ibcon#first serial, iclass 15, count 0 2006.229.11:05:26.99#ibcon#enter sib2, iclass 15, count 0 2006.229.11:05:26.99#ibcon#flushed, iclass 15, count 0 2006.229.11:05:26.99#ibcon#about to write, iclass 15, count 0 2006.229.11:05:26.99#ibcon#wrote, iclass 15, count 0 2006.229.11:05:26.99#ibcon#about to read 3, iclass 15, count 0 2006.229.11:05:27.01#ibcon#read 3, iclass 15, count 0 2006.229.11:05:27.01#ibcon#about to read 4, iclass 15, count 0 2006.229.11:05:27.01#ibcon#read 4, iclass 15, count 0 2006.229.11:05:27.01#ibcon#about to read 5, iclass 15, count 0 2006.229.11:05:27.01#ibcon#read 5, iclass 15, count 0 2006.229.11:05:27.01#ibcon#about to read 6, iclass 15, count 0 2006.229.11:05:27.01#ibcon#read 6, iclass 15, count 0 2006.229.11:05:27.01#ibcon#end of sib2, iclass 15, count 0 2006.229.11:05:27.01#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:05:27.01#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:05:27.01#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:05:27.01#ibcon#*before write, iclass 15, count 0 2006.229.11:05:27.01#ibcon#enter sib2, iclass 15, count 0 2006.229.11:05:27.01#ibcon#flushed, iclass 15, count 0 2006.229.11:05:27.01#ibcon#about to write, iclass 15, count 0 2006.229.11:05:27.01#ibcon#wrote, iclass 15, count 0 2006.229.11:05:27.01#ibcon#about to read 3, iclass 15, count 0 2006.229.11:05:27.05#ibcon#read 3, iclass 15, count 0 2006.229.11:05:27.05#ibcon#about to read 4, iclass 15, count 0 2006.229.11:05:27.05#ibcon#read 4, iclass 15, count 0 2006.229.11:05:27.05#ibcon#about to read 5, iclass 15, count 0 2006.229.11:05:27.05#ibcon#read 5, iclass 15, count 0 2006.229.11:05:27.05#ibcon#about to read 6, iclass 15, count 0 2006.229.11:05:27.05#ibcon#read 6, iclass 15, count 0 2006.229.11:05:27.05#ibcon#end of sib2, iclass 15, count 0 2006.229.11:05:27.05#ibcon#*after write, iclass 15, count 0 2006.229.11:05:27.05#ibcon#*before return 0, iclass 15, count 0 2006.229.11:05:27.05#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:27.05#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:05:27.05#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:05:27.05#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:05:27.05$vck44/vb=4,4 2006.229.11:05:27.05#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.11:05:27.05#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.11:05:27.05#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:27.05#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:27.11#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:27.11#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:27.11#ibcon#enter wrdev, iclass 17, count 2 2006.229.11:05:27.11#ibcon#first serial, iclass 17, count 2 2006.229.11:05:27.11#ibcon#enter sib2, iclass 17, count 2 2006.229.11:05:27.11#ibcon#flushed, iclass 17, count 2 2006.229.11:05:27.11#ibcon#about to write, iclass 17, count 2 2006.229.11:05:27.11#ibcon#wrote, iclass 17, count 2 2006.229.11:05:27.11#ibcon#about to read 3, iclass 17, count 2 2006.229.11:05:27.13#ibcon#read 3, iclass 17, count 2 2006.229.11:05:27.13#ibcon#about to read 4, iclass 17, count 2 2006.229.11:05:27.13#ibcon#read 4, iclass 17, count 2 2006.229.11:05:27.13#ibcon#about to read 5, iclass 17, count 2 2006.229.11:05:27.13#ibcon#read 5, iclass 17, count 2 2006.229.11:05:27.13#ibcon#about to read 6, iclass 17, count 2 2006.229.11:05:27.13#ibcon#read 6, iclass 17, count 2 2006.229.11:05:27.13#ibcon#end of sib2, iclass 17, count 2 2006.229.11:05:27.13#ibcon#*mode == 0, iclass 17, count 2 2006.229.11:05:27.13#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.11:05:27.13#ibcon#[27=AT04-04\r\n] 2006.229.11:05:27.13#ibcon#*before write, iclass 17, count 2 2006.229.11:05:27.13#ibcon#enter sib2, iclass 17, count 2 2006.229.11:05:27.13#ibcon#flushed, iclass 17, count 2 2006.229.11:05:27.13#ibcon#about to write, iclass 17, count 2 2006.229.11:05:27.13#ibcon#wrote, iclass 17, count 2 2006.229.11:05:27.13#ibcon#about to read 3, iclass 17, count 2 2006.229.11:05:27.16#ibcon#read 3, iclass 17, count 2 2006.229.11:05:27.16#ibcon#about to read 4, iclass 17, count 2 2006.229.11:05:27.16#ibcon#read 4, iclass 17, count 2 2006.229.11:05:27.16#ibcon#about to read 5, iclass 17, count 2 2006.229.11:05:27.16#ibcon#read 5, iclass 17, count 2 2006.229.11:05:27.16#ibcon#about to read 6, iclass 17, count 2 2006.229.11:05:27.16#ibcon#read 6, iclass 17, count 2 2006.229.11:05:27.16#ibcon#end of sib2, iclass 17, count 2 2006.229.11:05:27.16#ibcon#*after write, iclass 17, count 2 2006.229.11:05:27.16#ibcon#*before return 0, iclass 17, count 2 2006.229.11:05:27.16#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:27.16#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:05:27.16#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.11:05:27.16#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:27.16#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:27.28#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:27.28#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:27.28#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:05:27.28#ibcon#first serial, iclass 17, count 0 2006.229.11:05:27.28#ibcon#enter sib2, iclass 17, count 0 2006.229.11:05:27.28#ibcon#flushed, iclass 17, count 0 2006.229.11:05:27.28#ibcon#about to write, iclass 17, count 0 2006.229.11:05:27.28#ibcon#wrote, iclass 17, count 0 2006.229.11:05:27.28#ibcon#about to read 3, iclass 17, count 0 2006.229.11:05:27.30#ibcon#read 3, iclass 17, count 0 2006.229.11:05:27.30#ibcon#about to read 4, iclass 17, count 0 2006.229.11:05:27.30#ibcon#read 4, iclass 17, count 0 2006.229.11:05:27.30#ibcon#about to read 5, iclass 17, count 0 2006.229.11:05:27.30#ibcon#read 5, iclass 17, count 0 2006.229.11:05:27.30#ibcon#about to read 6, iclass 17, count 0 2006.229.11:05:27.30#ibcon#read 6, iclass 17, count 0 2006.229.11:05:27.30#ibcon#end of sib2, iclass 17, count 0 2006.229.11:05:27.30#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:05:27.30#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:05:27.30#ibcon#[27=USB\r\n] 2006.229.11:05:27.30#ibcon#*before write, iclass 17, count 0 2006.229.11:05:27.30#ibcon#enter sib2, iclass 17, count 0 2006.229.11:05:27.30#ibcon#flushed, iclass 17, count 0 2006.229.11:05:27.30#ibcon#about to write, iclass 17, count 0 2006.229.11:05:27.30#ibcon#wrote, iclass 17, count 0 2006.229.11:05:27.30#ibcon#about to read 3, iclass 17, count 0 2006.229.11:05:27.33#ibcon#read 3, iclass 17, count 0 2006.229.11:05:27.33#ibcon#about to read 4, iclass 17, count 0 2006.229.11:05:27.33#ibcon#read 4, iclass 17, count 0 2006.229.11:05:27.33#ibcon#about to read 5, iclass 17, count 0 2006.229.11:05:27.33#ibcon#read 5, iclass 17, count 0 2006.229.11:05:27.33#ibcon#about to read 6, iclass 17, count 0 2006.229.11:05:27.33#ibcon#read 6, iclass 17, count 0 2006.229.11:05:27.33#ibcon#end of sib2, iclass 17, count 0 2006.229.11:05:27.33#ibcon#*after write, iclass 17, count 0 2006.229.11:05:27.33#ibcon#*before return 0, iclass 17, count 0 2006.229.11:05:27.33#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:27.33#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:05:27.33#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:05:27.33#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:05:27.33$vck44/vblo=5,709.99 2006.229.11:05:27.33#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.11:05:27.33#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.11:05:27.33#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:27.33#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:27.33#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:27.33#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:27.33#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:05:27.33#ibcon#first serial, iclass 19, count 0 2006.229.11:05:27.33#ibcon#enter sib2, iclass 19, count 0 2006.229.11:05:27.33#ibcon#flushed, iclass 19, count 0 2006.229.11:05:27.33#ibcon#about to write, iclass 19, count 0 2006.229.11:05:27.33#ibcon#wrote, iclass 19, count 0 2006.229.11:05:27.33#ibcon#about to read 3, iclass 19, count 0 2006.229.11:05:27.35#ibcon#read 3, iclass 19, count 0 2006.229.11:05:27.35#ibcon#about to read 4, iclass 19, count 0 2006.229.11:05:27.35#ibcon#read 4, iclass 19, count 0 2006.229.11:05:27.35#ibcon#about to read 5, iclass 19, count 0 2006.229.11:05:27.35#ibcon#read 5, iclass 19, count 0 2006.229.11:05:27.35#ibcon#about to read 6, iclass 19, count 0 2006.229.11:05:27.35#ibcon#read 6, iclass 19, count 0 2006.229.11:05:27.35#ibcon#end of sib2, iclass 19, count 0 2006.229.11:05:27.35#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:05:27.35#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:05:27.35#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:05:27.35#ibcon#*before write, iclass 19, count 0 2006.229.11:05:27.35#ibcon#enter sib2, iclass 19, count 0 2006.229.11:05:27.35#ibcon#flushed, iclass 19, count 0 2006.229.11:05:27.35#ibcon#about to write, iclass 19, count 0 2006.229.11:05:27.35#ibcon#wrote, iclass 19, count 0 2006.229.11:05:27.35#ibcon#about to read 3, iclass 19, count 0 2006.229.11:05:27.39#ibcon#read 3, iclass 19, count 0 2006.229.11:05:27.39#ibcon#about to read 4, iclass 19, count 0 2006.229.11:05:27.39#ibcon#read 4, iclass 19, count 0 2006.229.11:05:27.39#ibcon#about to read 5, iclass 19, count 0 2006.229.11:05:27.39#ibcon#read 5, iclass 19, count 0 2006.229.11:05:27.39#ibcon#about to read 6, iclass 19, count 0 2006.229.11:05:27.39#ibcon#read 6, iclass 19, count 0 2006.229.11:05:27.39#ibcon#end of sib2, iclass 19, count 0 2006.229.11:05:27.39#ibcon#*after write, iclass 19, count 0 2006.229.11:05:27.39#ibcon#*before return 0, iclass 19, count 0 2006.229.11:05:27.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:27.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:05:27.39#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:05:27.39#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:05:27.39$vck44/vb=5,4 2006.229.11:05:27.39#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.11:05:27.39#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.11:05:27.39#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:27.39#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:27.45#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:27.45#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:27.45#ibcon#enter wrdev, iclass 21, count 2 2006.229.11:05:27.45#ibcon#first serial, iclass 21, count 2 2006.229.11:05:27.45#ibcon#enter sib2, iclass 21, count 2 2006.229.11:05:27.45#ibcon#flushed, iclass 21, count 2 2006.229.11:05:27.45#ibcon#about to write, iclass 21, count 2 2006.229.11:05:27.45#ibcon#wrote, iclass 21, count 2 2006.229.11:05:27.45#ibcon#about to read 3, iclass 21, count 2 2006.229.11:05:27.47#ibcon#read 3, iclass 21, count 2 2006.229.11:05:27.47#ibcon#about to read 4, iclass 21, count 2 2006.229.11:05:27.47#ibcon#read 4, iclass 21, count 2 2006.229.11:05:27.47#ibcon#about to read 5, iclass 21, count 2 2006.229.11:05:27.47#ibcon#read 5, iclass 21, count 2 2006.229.11:05:27.47#ibcon#about to read 6, iclass 21, count 2 2006.229.11:05:27.47#ibcon#read 6, iclass 21, count 2 2006.229.11:05:27.47#ibcon#end of sib2, iclass 21, count 2 2006.229.11:05:27.47#ibcon#*mode == 0, iclass 21, count 2 2006.229.11:05:27.47#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.11:05:27.47#ibcon#[27=AT05-04\r\n] 2006.229.11:05:27.47#ibcon#*before write, iclass 21, count 2 2006.229.11:05:27.47#ibcon#enter sib2, iclass 21, count 2 2006.229.11:05:27.47#ibcon#flushed, iclass 21, count 2 2006.229.11:05:27.47#ibcon#about to write, iclass 21, count 2 2006.229.11:05:27.47#ibcon#wrote, iclass 21, count 2 2006.229.11:05:27.47#ibcon#about to read 3, iclass 21, count 2 2006.229.11:05:27.50#ibcon#read 3, iclass 21, count 2 2006.229.11:05:27.50#ibcon#about to read 4, iclass 21, count 2 2006.229.11:05:27.50#ibcon#read 4, iclass 21, count 2 2006.229.11:05:27.50#ibcon#about to read 5, iclass 21, count 2 2006.229.11:05:27.50#ibcon#read 5, iclass 21, count 2 2006.229.11:05:27.50#ibcon#about to read 6, iclass 21, count 2 2006.229.11:05:27.50#ibcon#read 6, iclass 21, count 2 2006.229.11:05:27.50#ibcon#end of sib2, iclass 21, count 2 2006.229.11:05:27.50#ibcon#*after write, iclass 21, count 2 2006.229.11:05:27.50#ibcon#*before return 0, iclass 21, count 2 2006.229.11:05:27.50#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:27.50#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:05:27.50#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.11:05:27.50#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:27.50#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:27.62#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:27.62#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:27.62#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:05:27.62#ibcon#first serial, iclass 21, count 0 2006.229.11:05:27.62#ibcon#enter sib2, iclass 21, count 0 2006.229.11:05:27.62#ibcon#flushed, iclass 21, count 0 2006.229.11:05:27.62#ibcon#about to write, iclass 21, count 0 2006.229.11:05:27.62#ibcon#wrote, iclass 21, count 0 2006.229.11:05:27.62#ibcon#about to read 3, iclass 21, count 0 2006.229.11:05:27.64#ibcon#read 3, iclass 21, count 0 2006.229.11:05:27.64#ibcon#about to read 4, iclass 21, count 0 2006.229.11:05:27.64#ibcon#read 4, iclass 21, count 0 2006.229.11:05:27.64#ibcon#about to read 5, iclass 21, count 0 2006.229.11:05:27.64#ibcon#read 5, iclass 21, count 0 2006.229.11:05:27.64#ibcon#about to read 6, iclass 21, count 0 2006.229.11:05:27.64#ibcon#read 6, iclass 21, count 0 2006.229.11:05:27.64#ibcon#end of sib2, iclass 21, count 0 2006.229.11:05:27.64#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:05:27.64#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:05:27.64#ibcon#[27=USB\r\n] 2006.229.11:05:27.64#ibcon#*before write, iclass 21, count 0 2006.229.11:05:27.64#ibcon#enter sib2, iclass 21, count 0 2006.229.11:05:27.64#ibcon#flushed, iclass 21, count 0 2006.229.11:05:27.64#ibcon#about to write, iclass 21, count 0 2006.229.11:05:27.64#ibcon#wrote, iclass 21, count 0 2006.229.11:05:27.64#ibcon#about to read 3, iclass 21, count 0 2006.229.11:05:27.67#ibcon#read 3, iclass 21, count 0 2006.229.11:05:27.67#ibcon#about to read 4, iclass 21, count 0 2006.229.11:05:27.67#ibcon#read 4, iclass 21, count 0 2006.229.11:05:27.67#ibcon#about to read 5, iclass 21, count 0 2006.229.11:05:27.67#ibcon#read 5, iclass 21, count 0 2006.229.11:05:27.67#ibcon#about to read 6, iclass 21, count 0 2006.229.11:05:27.67#ibcon#read 6, iclass 21, count 0 2006.229.11:05:27.67#ibcon#end of sib2, iclass 21, count 0 2006.229.11:05:27.67#ibcon#*after write, iclass 21, count 0 2006.229.11:05:27.67#ibcon#*before return 0, iclass 21, count 0 2006.229.11:05:27.67#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:27.67#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:05:27.67#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:05:27.67#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:05:27.67$vck44/vblo=6,719.99 2006.229.11:05:27.67#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.11:05:27.67#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.11:05:27.67#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:27.67#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:27.67#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:27.67#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:27.67#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:05:27.67#ibcon#first serial, iclass 23, count 0 2006.229.11:05:27.67#ibcon#enter sib2, iclass 23, count 0 2006.229.11:05:27.67#ibcon#flushed, iclass 23, count 0 2006.229.11:05:27.67#ibcon#about to write, iclass 23, count 0 2006.229.11:05:27.67#ibcon#wrote, iclass 23, count 0 2006.229.11:05:27.67#ibcon#about to read 3, iclass 23, count 0 2006.229.11:05:27.69#ibcon#read 3, iclass 23, count 0 2006.229.11:05:27.69#ibcon#about to read 4, iclass 23, count 0 2006.229.11:05:27.69#ibcon#read 4, iclass 23, count 0 2006.229.11:05:27.69#ibcon#about to read 5, iclass 23, count 0 2006.229.11:05:27.69#ibcon#read 5, iclass 23, count 0 2006.229.11:05:27.69#ibcon#about to read 6, iclass 23, count 0 2006.229.11:05:27.69#ibcon#read 6, iclass 23, count 0 2006.229.11:05:27.69#ibcon#end of sib2, iclass 23, count 0 2006.229.11:05:27.69#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:05:27.69#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:05:27.69#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:05:27.69#ibcon#*before write, iclass 23, count 0 2006.229.11:05:27.69#ibcon#enter sib2, iclass 23, count 0 2006.229.11:05:27.69#ibcon#flushed, iclass 23, count 0 2006.229.11:05:27.69#ibcon#about to write, iclass 23, count 0 2006.229.11:05:27.69#ibcon#wrote, iclass 23, count 0 2006.229.11:05:27.69#ibcon#about to read 3, iclass 23, count 0 2006.229.11:05:27.73#ibcon#read 3, iclass 23, count 0 2006.229.11:05:27.73#ibcon#about to read 4, iclass 23, count 0 2006.229.11:05:27.73#ibcon#read 4, iclass 23, count 0 2006.229.11:05:27.73#ibcon#about to read 5, iclass 23, count 0 2006.229.11:05:27.73#ibcon#read 5, iclass 23, count 0 2006.229.11:05:27.73#ibcon#about to read 6, iclass 23, count 0 2006.229.11:05:27.73#ibcon#read 6, iclass 23, count 0 2006.229.11:05:27.73#ibcon#end of sib2, iclass 23, count 0 2006.229.11:05:27.73#ibcon#*after write, iclass 23, count 0 2006.229.11:05:27.73#ibcon#*before return 0, iclass 23, count 0 2006.229.11:05:27.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:27.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:05:27.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:05:27.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:05:27.73$vck44/vb=6,4 2006.229.11:05:27.73#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:05:27.73#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:05:27.73#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:27.73#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:27.79#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:27.79#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:27.79#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:05:27.79#ibcon#first serial, iclass 25, count 2 2006.229.11:05:27.79#ibcon#enter sib2, iclass 25, count 2 2006.229.11:05:27.79#ibcon#flushed, iclass 25, count 2 2006.229.11:05:27.79#ibcon#about to write, iclass 25, count 2 2006.229.11:05:27.79#ibcon#wrote, iclass 25, count 2 2006.229.11:05:27.79#ibcon#about to read 3, iclass 25, count 2 2006.229.11:05:27.81#ibcon#read 3, iclass 25, count 2 2006.229.11:05:27.81#ibcon#about to read 4, iclass 25, count 2 2006.229.11:05:27.81#ibcon#read 4, iclass 25, count 2 2006.229.11:05:27.81#ibcon#about to read 5, iclass 25, count 2 2006.229.11:05:27.81#ibcon#read 5, iclass 25, count 2 2006.229.11:05:27.81#ibcon#about to read 6, iclass 25, count 2 2006.229.11:05:27.81#ibcon#read 6, iclass 25, count 2 2006.229.11:05:27.81#ibcon#end of sib2, iclass 25, count 2 2006.229.11:05:27.81#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:05:27.81#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:05:27.81#ibcon#[27=AT06-04\r\n] 2006.229.11:05:27.81#ibcon#*before write, iclass 25, count 2 2006.229.11:05:27.81#ibcon#enter sib2, iclass 25, count 2 2006.229.11:05:27.81#ibcon#flushed, iclass 25, count 2 2006.229.11:05:27.81#ibcon#about to write, iclass 25, count 2 2006.229.11:05:27.81#ibcon#wrote, iclass 25, count 2 2006.229.11:05:27.81#ibcon#about to read 3, iclass 25, count 2 2006.229.11:05:27.84#ibcon#read 3, iclass 25, count 2 2006.229.11:05:27.84#ibcon#about to read 4, iclass 25, count 2 2006.229.11:05:27.84#ibcon#read 4, iclass 25, count 2 2006.229.11:05:27.84#ibcon#about to read 5, iclass 25, count 2 2006.229.11:05:27.84#ibcon#read 5, iclass 25, count 2 2006.229.11:05:27.84#ibcon#about to read 6, iclass 25, count 2 2006.229.11:05:27.84#ibcon#read 6, iclass 25, count 2 2006.229.11:05:27.84#ibcon#end of sib2, iclass 25, count 2 2006.229.11:05:27.84#ibcon#*after write, iclass 25, count 2 2006.229.11:05:27.84#ibcon#*before return 0, iclass 25, count 2 2006.229.11:05:27.84#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:27.84#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:05:27.84#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:05:27.84#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:27.84#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:27.96#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:27.96#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:27.96#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:05:27.96#ibcon#first serial, iclass 25, count 0 2006.229.11:05:27.96#ibcon#enter sib2, iclass 25, count 0 2006.229.11:05:27.96#ibcon#flushed, iclass 25, count 0 2006.229.11:05:27.96#ibcon#about to write, iclass 25, count 0 2006.229.11:05:27.96#ibcon#wrote, iclass 25, count 0 2006.229.11:05:27.96#ibcon#about to read 3, iclass 25, count 0 2006.229.11:05:27.98#ibcon#read 3, iclass 25, count 0 2006.229.11:05:27.98#ibcon#about to read 4, iclass 25, count 0 2006.229.11:05:27.98#ibcon#read 4, iclass 25, count 0 2006.229.11:05:27.98#ibcon#about to read 5, iclass 25, count 0 2006.229.11:05:27.98#ibcon#read 5, iclass 25, count 0 2006.229.11:05:27.98#ibcon#about to read 6, iclass 25, count 0 2006.229.11:05:27.98#ibcon#read 6, iclass 25, count 0 2006.229.11:05:27.98#ibcon#end of sib2, iclass 25, count 0 2006.229.11:05:27.98#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:05:27.98#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:05:27.98#ibcon#[27=USB\r\n] 2006.229.11:05:27.98#ibcon#*before write, iclass 25, count 0 2006.229.11:05:27.98#ibcon#enter sib2, iclass 25, count 0 2006.229.11:05:27.98#ibcon#flushed, iclass 25, count 0 2006.229.11:05:27.98#ibcon#about to write, iclass 25, count 0 2006.229.11:05:27.98#ibcon#wrote, iclass 25, count 0 2006.229.11:05:27.98#ibcon#about to read 3, iclass 25, count 0 2006.229.11:05:28.01#ibcon#read 3, iclass 25, count 0 2006.229.11:05:28.01#ibcon#about to read 4, iclass 25, count 0 2006.229.11:05:28.01#ibcon#read 4, iclass 25, count 0 2006.229.11:05:28.01#ibcon#about to read 5, iclass 25, count 0 2006.229.11:05:28.01#ibcon#read 5, iclass 25, count 0 2006.229.11:05:28.01#ibcon#about to read 6, iclass 25, count 0 2006.229.11:05:28.01#ibcon#read 6, iclass 25, count 0 2006.229.11:05:28.01#ibcon#end of sib2, iclass 25, count 0 2006.229.11:05:28.01#ibcon#*after write, iclass 25, count 0 2006.229.11:05:28.01#ibcon#*before return 0, iclass 25, count 0 2006.229.11:05:28.01#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:28.01#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:05:28.01#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:05:28.01#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:05:28.01$vck44/vblo=7,734.99 2006.229.11:05:28.01#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:05:28.01#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:05:28.01#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:28.01#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:28.01#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:28.01#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:28.01#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:05:28.01#ibcon#first serial, iclass 27, count 0 2006.229.11:05:28.01#ibcon#enter sib2, iclass 27, count 0 2006.229.11:05:28.01#ibcon#flushed, iclass 27, count 0 2006.229.11:05:28.01#ibcon#about to write, iclass 27, count 0 2006.229.11:05:28.01#ibcon#wrote, iclass 27, count 0 2006.229.11:05:28.01#ibcon#about to read 3, iclass 27, count 0 2006.229.11:05:28.03#ibcon#read 3, iclass 27, count 0 2006.229.11:05:28.03#ibcon#about to read 4, iclass 27, count 0 2006.229.11:05:28.03#ibcon#read 4, iclass 27, count 0 2006.229.11:05:28.03#ibcon#about to read 5, iclass 27, count 0 2006.229.11:05:28.03#ibcon#read 5, iclass 27, count 0 2006.229.11:05:28.03#ibcon#about to read 6, iclass 27, count 0 2006.229.11:05:28.03#ibcon#read 6, iclass 27, count 0 2006.229.11:05:28.03#ibcon#end of sib2, iclass 27, count 0 2006.229.11:05:28.03#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:05:28.03#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:05:28.03#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:05:28.03#ibcon#*before write, iclass 27, count 0 2006.229.11:05:28.03#ibcon#enter sib2, iclass 27, count 0 2006.229.11:05:28.03#ibcon#flushed, iclass 27, count 0 2006.229.11:05:28.03#ibcon#about to write, iclass 27, count 0 2006.229.11:05:28.03#ibcon#wrote, iclass 27, count 0 2006.229.11:05:28.03#ibcon#about to read 3, iclass 27, count 0 2006.229.11:05:28.07#ibcon#read 3, iclass 27, count 0 2006.229.11:05:28.07#ibcon#about to read 4, iclass 27, count 0 2006.229.11:05:28.07#ibcon#read 4, iclass 27, count 0 2006.229.11:05:28.07#ibcon#about to read 5, iclass 27, count 0 2006.229.11:05:28.07#ibcon#read 5, iclass 27, count 0 2006.229.11:05:28.07#ibcon#about to read 6, iclass 27, count 0 2006.229.11:05:28.07#ibcon#read 6, iclass 27, count 0 2006.229.11:05:28.07#ibcon#end of sib2, iclass 27, count 0 2006.229.11:05:28.07#ibcon#*after write, iclass 27, count 0 2006.229.11:05:28.07#ibcon#*before return 0, iclass 27, count 0 2006.229.11:05:28.07#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:28.07#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:05:28.07#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:05:28.07#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:05:28.07$vck44/vb=7,4 2006.229.11:05:28.07#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.11:05:28.07#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.11:05:28.07#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:28.07#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:28.13#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:28.13#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:28.13#ibcon#enter wrdev, iclass 29, count 2 2006.229.11:05:28.13#ibcon#first serial, iclass 29, count 2 2006.229.11:05:28.13#ibcon#enter sib2, iclass 29, count 2 2006.229.11:05:28.13#ibcon#flushed, iclass 29, count 2 2006.229.11:05:28.13#ibcon#about to write, iclass 29, count 2 2006.229.11:05:28.13#ibcon#wrote, iclass 29, count 2 2006.229.11:05:28.13#ibcon#about to read 3, iclass 29, count 2 2006.229.11:05:28.15#ibcon#read 3, iclass 29, count 2 2006.229.11:05:28.15#ibcon#about to read 4, iclass 29, count 2 2006.229.11:05:28.15#ibcon#read 4, iclass 29, count 2 2006.229.11:05:28.15#ibcon#about to read 5, iclass 29, count 2 2006.229.11:05:28.15#ibcon#read 5, iclass 29, count 2 2006.229.11:05:28.15#ibcon#about to read 6, iclass 29, count 2 2006.229.11:05:28.15#ibcon#read 6, iclass 29, count 2 2006.229.11:05:28.15#ibcon#end of sib2, iclass 29, count 2 2006.229.11:05:28.15#ibcon#*mode == 0, iclass 29, count 2 2006.229.11:05:28.15#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.11:05:28.15#ibcon#[27=AT07-04\r\n] 2006.229.11:05:28.15#ibcon#*before write, iclass 29, count 2 2006.229.11:05:28.15#ibcon#enter sib2, iclass 29, count 2 2006.229.11:05:28.15#ibcon#flushed, iclass 29, count 2 2006.229.11:05:28.15#ibcon#about to write, iclass 29, count 2 2006.229.11:05:28.15#ibcon#wrote, iclass 29, count 2 2006.229.11:05:28.15#ibcon#about to read 3, iclass 29, count 2 2006.229.11:05:28.18#ibcon#read 3, iclass 29, count 2 2006.229.11:05:28.18#ibcon#about to read 4, iclass 29, count 2 2006.229.11:05:28.18#ibcon#read 4, iclass 29, count 2 2006.229.11:05:28.18#ibcon#about to read 5, iclass 29, count 2 2006.229.11:05:28.18#ibcon#read 5, iclass 29, count 2 2006.229.11:05:28.18#ibcon#about to read 6, iclass 29, count 2 2006.229.11:05:28.18#ibcon#read 6, iclass 29, count 2 2006.229.11:05:28.18#ibcon#end of sib2, iclass 29, count 2 2006.229.11:05:28.18#ibcon#*after write, iclass 29, count 2 2006.229.11:05:28.18#ibcon#*before return 0, iclass 29, count 2 2006.229.11:05:28.18#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:28.18#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:05:28.18#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.11:05:28.18#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:28.18#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:28.30#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:28.30#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:28.30#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:05:28.30#ibcon#first serial, iclass 29, count 0 2006.229.11:05:28.30#ibcon#enter sib2, iclass 29, count 0 2006.229.11:05:28.30#ibcon#flushed, iclass 29, count 0 2006.229.11:05:28.30#ibcon#about to write, iclass 29, count 0 2006.229.11:05:28.30#ibcon#wrote, iclass 29, count 0 2006.229.11:05:28.30#ibcon#about to read 3, iclass 29, count 0 2006.229.11:05:28.32#ibcon#read 3, iclass 29, count 0 2006.229.11:05:28.32#ibcon#about to read 4, iclass 29, count 0 2006.229.11:05:28.32#ibcon#read 4, iclass 29, count 0 2006.229.11:05:28.32#ibcon#about to read 5, iclass 29, count 0 2006.229.11:05:28.32#ibcon#read 5, iclass 29, count 0 2006.229.11:05:28.32#ibcon#about to read 6, iclass 29, count 0 2006.229.11:05:28.32#ibcon#read 6, iclass 29, count 0 2006.229.11:05:28.32#ibcon#end of sib2, iclass 29, count 0 2006.229.11:05:28.32#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:05:28.32#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:05:28.32#ibcon#[27=USB\r\n] 2006.229.11:05:28.32#ibcon#*before write, iclass 29, count 0 2006.229.11:05:28.32#ibcon#enter sib2, iclass 29, count 0 2006.229.11:05:28.32#ibcon#flushed, iclass 29, count 0 2006.229.11:05:28.32#ibcon#about to write, iclass 29, count 0 2006.229.11:05:28.32#ibcon#wrote, iclass 29, count 0 2006.229.11:05:28.32#ibcon#about to read 3, iclass 29, count 0 2006.229.11:05:28.35#ibcon#read 3, iclass 29, count 0 2006.229.11:05:28.35#ibcon#about to read 4, iclass 29, count 0 2006.229.11:05:28.35#ibcon#read 4, iclass 29, count 0 2006.229.11:05:28.35#ibcon#about to read 5, iclass 29, count 0 2006.229.11:05:28.35#ibcon#read 5, iclass 29, count 0 2006.229.11:05:28.35#ibcon#about to read 6, iclass 29, count 0 2006.229.11:05:28.35#ibcon#read 6, iclass 29, count 0 2006.229.11:05:28.35#ibcon#end of sib2, iclass 29, count 0 2006.229.11:05:28.35#ibcon#*after write, iclass 29, count 0 2006.229.11:05:28.35#ibcon#*before return 0, iclass 29, count 0 2006.229.11:05:28.35#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:28.35#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:05:28.35#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:05:28.35#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:05:28.35$vck44/vblo=8,744.99 2006.229.11:05:28.35#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:05:28.35#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:05:28.35#ibcon#ireg 17 cls_cnt 0 2006.229.11:05:28.35#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:28.35#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:28.35#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:28.35#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:05:28.35#ibcon#first serial, iclass 31, count 0 2006.229.11:05:28.35#ibcon#enter sib2, iclass 31, count 0 2006.229.11:05:28.35#ibcon#flushed, iclass 31, count 0 2006.229.11:05:28.35#ibcon#about to write, iclass 31, count 0 2006.229.11:05:28.35#ibcon#wrote, iclass 31, count 0 2006.229.11:05:28.35#ibcon#about to read 3, iclass 31, count 0 2006.229.11:05:28.37#ibcon#read 3, iclass 31, count 0 2006.229.11:05:28.37#ibcon#about to read 4, iclass 31, count 0 2006.229.11:05:28.37#ibcon#read 4, iclass 31, count 0 2006.229.11:05:28.37#ibcon#about to read 5, iclass 31, count 0 2006.229.11:05:28.37#ibcon#read 5, iclass 31, count 0 2006.229.11:05:28.37#ibcon#about to read 6, iclass 31, count 0 2006.229.11:05:28.37#ibcon#read 6, iclass 31, count 0 2006.229.11:05:28.37#ibcon#end of sib2, iclass 31, count 0 2006.229.11:05:28.37#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:05:28.37#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:05:28.37#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:05:28.37#ibcon#*before write, iclass 31, count 0 2006.229.11:05:28.37#ibcon#enter sib2, iclass 31, count 0 2006.229.11:05:28.37#ibcon#flushed, iclass 31, count 0 2006.229.11:05:28.37#ibcon#about to write, iclass 31, count 0 2006.229.11:05:28.37#ibcon#wrote, iclass 31, count 0 2006.229.11:05:28.37#ibcon#about to read 3, iclass 31, count 0 2006.229.11:05:28.41#ibcon#read 3, iclass 31, count 0 2006.229.11:05:28.41#ibcon#about to read 4, iclass 31, count 0 2006.229.11:05:28.41#ibcon#read 4, iclass 31, count 0 2006.229.11:05:28.41#ibcon#about to read 5, iclass 31, count 0 2006.229.11:05:28.41#ibcon#read 5, iclass 31, count 0 2006.229.11:05:28.41#ibcon#about to read 6, iclass 31, count 0 2006.229.11:05:28.41#ibcon#read 6, iclass 31, count 0 2006.229.11:05:28.41#ibcon#end of sib2, iclass 31, count 0 2006.229.11:05:28.41#ibcon#*after write, iclass 31, count 0 2006.229.11:05:28.41#ibcon#*before return 0, iclass 31, count 0 2006.229.11:05:28.41#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:28.41#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:05:28.41#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:05:28.41#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:05:28.41$vck44/vb=8,4 2006.229.11:05:28.41#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.11:05:28.41#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.11:05:28.41#ibcon#ireg 11 cls_cnt 2 2006.229.11:05:28.41#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:28.47#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:28.47#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:28.47#ibcon#enter wrdev, iclass 33, count 2 2006.229.11:05:28.47#ibcon#first serial, iclass 33, count 2 2006.229.11:05:28.47#ibcon#enter sib2, iclass 33, count 2 2006.229.11:05:28.47#ibcon#flushed, iclass 33, count 2 2006.229.11:05:28.47#ibcon#about to write, iclass 33, count 2 2006.229.11:05:28.47#ibcon#wrote, iclass 33, count 2 2006.229.11:05:28.47#ibcon#about to read 3, iclass 33, count 2 2006.229.11:05:28.49#ibcon#read 3, iclass 33, count 2 2006.229.11:05:28.49#ibcon#about to read 4, iclass 33, count 2 2006.229.11:05:28.49#ibcon#read 4, iclass 33, count 2 2006.229.11:05:28.49#ibcon#about to read 5, iclass 33, count 2 2006.229.11:05:28.49#ibcon#read 5, iclass 33, count 2 2006.229.11:05:28.49#ibcon#about to read 6, iclass 33, count 2 2006.229.11:05:28.49#ibcon#read 6, iclass 33, count 2 2006.229.11:05:28.49#ibcon#end of sib2, iclass 33, count 2 2006.229.11:05:28.49#ibcon#*mode == 0, iclass 33, count 2 2006.229.11:05:28.49#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.11:05:28.49#ibcon#[27=AT08-04\r\n] 2006.229.11:05:28.49#ibcon#*before write, iclass 33, count 2 2006.229.11:05:28.49#ibcon#enter sib2, iclass 33, count 2 2006.229.11:05:28.49#ibcon#flushed, iclass 33, count 2 2006.229.11:05:28.49#ibcon#about to write, iclass 33, count 2 2006.229.11:05:28.49#ibcon#wrote, iclass 33, count 2 2006.229.11:05:28.49#ibcon#about to read 3, iclass 33, count 2 2006.229.11:05:28.52#ibcon#read 3, iclass 33, count 2 2006.229.11:05:28.52#ibcon#about to read 4, iclass 33, count 2 2006.229.11:05:28.52#ibcon#read 4, iclass 33, count 2 2006.229.11:05:28.52#ibcon#about to read 5, iclass 33, count 2 2006.229.11:05:28.52#ibcon#read 5, iclass 33, count 2 2006.229.11:05:28.52#ibcon#about to read 6, iclass 33, count 2 2006.229.11:05:28.52#ibcon#read 6, iclass 33, count 2 2006.229.11:05:28.52#ibcon#end of sib2, iclass 33, count 2 2006.229.11:05:28.52#ibcon#*after write, iclass 33, count 2 2006.229.11:05:28.52#ibcon#*before return 0, iclass 33, count 2 2006.229.11:05:28.52#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:28.52#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:05:28.52#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.11:05:28.52#ibcon#ireg 7 cls_cnt 0 2006.229.11:05:28.52#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:28.64#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:28.64#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:28.64#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:05:28.64#ibcon#first serial, iclass 33, count 0 2006.229.11:05:28.64#ibcon#enter sib2, iclass 33, count 0 2006.229.11:05:28.64#ibcon#flushed, iclass 33, count 0 2006.229.11:05:28.64#ibcon#about to write, iclass 33, count 0 2006.229.11:05:28.64#ibcon#wrote, iclass 33, count 0 2006.229.11:05:28.64#ibcon#about to read 3, iclass 33, count 0 2006.229.11:05:28.66#ibcon#read 3, iclass 33, count 0 2006.229.11:05:28.66#ibcon#about to read 4, iclass 33, count 0 2006.229.11:05:28.66#ibcon#read 4, iclass 33, count 0 2006.229.11:05:28.66#ibcon#about to read 5, iclass 33, count 0 2006.229.11:05:28.66#ibcon#read 5, iclass 33, count 0 2006.229.11:05:28.66#ibcon#about to read 6, iclass 33, count 0 2006.229.11:05:28.66#ibcon#read 6, iclass 33, count 0 2006.229.11:05:28.66#ibcon#end of sib2, iclass 33, count 0 2006.229.11:05:28.66#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:05:28.66#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:05:28.66#ibcon#[27=USB\r\n] 2006.229.11:05:28.66#ibcon#*before write, iclass 33, count 0 2006.229.11:05:28.66#ibcon#enter sib2, iclass 33, count 0 2006.229.11:05:28.66#ibcon#flushed, iclass 33, count 0 2006.229.11:05:28.66#ibcon#about to write, iclass 33, count 0 2006.229.11:05:28.66#ibcon#wrote, iclass 33, count 0 2006.229.11:05:28.66#ibcon#about to read 3, iclass 33, count 0 2006.229.11:05:28.69#ibcon#read 3, iclass 33, count 0 2006.229.11:05:28.69#ibcon#about to read 4, iclass 33, count 0 2006.229.11:05:28.69#ibcon#read 4, iclass 33, count 0 2006.229.11:05:28.69#ibcon#about to read 5, iclass 33, count 0 2006.229.11:05:28.69#ibcon#read 5, iclass 33, count 0 2006.229.11:05:28.69#ibcon#about to read 6, iclass 33, count 0 2006.229.11:05:28.69#ibcon#read 6, iclass 33, count 0 2006.229.11:05:28.69#ibcon#end of sib2, iclass 33, count 0 2006.229.11:05:28.69#ibcon#*after write, iclass 33, count 0 2006.229.11:05:28.69#ibcon#*before return 0, iclass 33, count 0 2006.229.11:05:28.69#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:28.69#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:05:28.69#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:05:28.69#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:05:28.69$vck44/vabw=wide 2006.229.11:05:28.69#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.11:05:28.69#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.11:05:28.69#ibcon#ireg 8 cls_cnt 0 2006.229.11:05:28.69#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:28.69#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:28.69#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:28.69#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:05:28.69#ibcon#first serial, iclass 35, count 0 2006.229.11:05:28.69#ibcon#enter sib2, iclass 35, count 0 2006.229.11:05:28.69#ibcon#flushed, iclass 35, count 0 2006.229.11:05:28.69#ibcon#about to write, iclass 35, count 0 2006.229.11:05:28.69#ibcon#wrote, iclass 35, count 0 2006.229.11:05:28.69#ibcon#about to read 3, iclass 35, count 0 2006.229.11:05:28.71#ibcon#read 3, iclass 35, count 0 2006.229.11:05:28.71#ibcon#about to read 4, iclass 35, count 0 2006.229.11:05:28.71#ibcon#read 4, iclass 35, count 0 2006.229.11:05:28.71#ibcon#about to read 5, iclass 35, count 0 2006.229.11:05:28.71#ibcon#read 5, iclass 35, count 0 2006.229.11:05:28.71#ibcon#about to read 6, iclass 35, count 0 2006.229.11:05:28.71#ibcon#read 6, iclass 35, count 0 2006.229.11:05:28.71#ibcon#end of sib2, iclass 35, count 0 2006.229.11:05:28.71#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:05:28.71#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:05:28.71#ibcon#[25=BW32\r\n] 2006.229.11:05:28.71#ibcon#*before write, iclass 35, count 0 2006.229.11:05:28.71#ibcon#enter sib2, iclass 35, count 0 2006.229.11:05:28.71#ibcon#flushed, iclass 35, count 0 2006.229.11:05:28.71#ibcon#about to write, iclass 35, count 0 2006.229.11:05:28.71#ibcon#wrote, iclass 35, count 0 2006.229.11:05:28.71#ibcon#about to read 3, iclass 35, count 0 2006.229.11:05:28.74#ibcon#read 3, iclass 35, count 0 2006.229.11:05:28.74#ibcon#about to read 4, iclass 35, count 0 2006.229.11:05:28.74#ibcon#read 4, iclass 35, count 0 2006.229.11:05:28.74#ibcon#about to read 5, iclass 35, count 0 2006.229.11:05:28.74#ibcon#read 5, iclass 35, count 0 2006.229.11:05:28.74#ibcon#about to read 6, iclass 35, count 0 2006.229.11:05:28.74#ibcon#read 6, iclass 35, count 0 2006.229.11:05:28.74#ibcon#end of sib2, iclass 35, count 0 2006.229.11:05:28.74#ibcon#*after write, iclass 35, count 0 2006.229.11:05:28.74#ibcon#*before return 0, iclass 35, count 0 2006.229.11:05:28.74#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:28.74#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:05:28.74#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:05:28.74#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:05:28.74$vck44/vbbw=wide 2006.229.11:05:28.74#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:05:28.74#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:05:28.74#ibcon#ireg 8 cls_cnt 0 2006.229.11:05:28.74#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:05:28.81#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:05:28.81#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:05:28.81#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:05:28.81#ibcon#first serial, iclass 37, count 0 2006.229.11:05:28.81#ibcon#enter sib2, iclass 37, count 0 2006.229.11:05:28.81#ibcon#flushed, iclass 37, count 0 2006.229.11:05:28.81#ibcon#about to write, iclass 37, count 0 2006.229.11:05:28.81#ibcon#wrote, iclass 37, count 0 2006.229.11:05:28.81#ibcon#about to read 3, iclass 37, count 0 2006.229.11:05:28.83#ibcon#read 3, iclass 37, count 0 2006.229.11:05:28.83#ibcon#about to read 4, iclass 37, count 0 2006.229.11:05:28.83#ibcon#read 4, iclass 37, count 0 2006.229.11:05:28.83#ibcon#about to read 5, iclass 37, count 0 2006.229.11:05:28.83#ibcon#read 5, iclass 37, count 0 2006.229.11:05:28.83#ibcon#about to read 6, iclass 37, count 0 2006.229.11:05:28.83#ibcon#read 6, iclass 37, count 0 2006.229.11:05:28.83#ibcon#end of sib2, iclass 37, count 0 2006.229.11:05:28.83#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:05:28.83#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:05:28.83#ibcon#[27=BW32\r\n] 2006.229.11:05:28.83#ibcon#*before write, iclass 37, count 0 2006.229.11:05:28.83#ibcon#enter sib2, iclass 37, count 0 2006.229.11:05:28.83#ibcon#flushed, iclass 37, count 0 2006.229.11:05:28.83#ibcon#about to write, iclass 37, count 0 2006.229.11:05:28.83#ibcon#wrote, iclass 37, count 0 2006.229.11:05:28.83#ibcon#about to read 3, iclass 37, count 0 2006.229.11:05:28.86#ibcon#read 3, iclass 37, count 0 2006.229.11:05:28.86#ibcon#about to read 4, iclass 37, count 0 2006.229.11:05:28.86#ibcon#read 4, iclass 37, count 0 2006.229.11:05:28.86#ibcon#about to read 5, iclass 37, count 0 2006.229.11:05:28.86#ibcon#read 5, iclass 37, count 0 2006.229.11:05:28.86#ibcon#about to read 6, iclass 37, count 0 2006.229.11:05:28.86#ibcon#read 6, iclass 37, count 0 2006.229.11:05:28.86#ibcon#end of sib2, iclass 37, count 0 2006.229.11:05:28.86#ibcon#*after write, iclass 37, count 0 2006.229.11:05:28.86#ibcon#*before return 0, iclass 37, count 0 2006.229.11:05:28.86#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:05:28.86#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:05:28.86#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:05:28.86#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:05:28.86$setupk4/ifdk4 2006.229.11:05:28.86$ifdk4/lo= 2006.229.11:05:28.86$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:05:28.86$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:05:28.86$ifdk4/patch= 2006.229.11:05:28.86$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:05:28.86$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:05:28.86$setupk4/!*+20s 2006.229.11:05:32.31#abcon#<5=/04 1.9 3.8 28.351001001.8\r\n> 2006.229.11:05:32.33#abcon#{5=INTERFACE CLEAR} 2006.229.11:05:32.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:05:42.48#abcon#<5=/04 1.9 3.9 28.351001001.8\r\n> 2006.229.11:05:42.50#abcon#{5=INTERFACE CLEAR} 2006.229.11:05:42.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:05:43.37$setupk4/"tpicd 2006.229.11:05:43.37$setupk4/echo=off 2006.229.11:05:43.37$setupk4/xlog=off 2006.229.11:05:43.37:!2006.229.11:09:16 2006.229.11:06:40.14#trakl#Source acquired 2006.229.11:06:40.15#flagr#flagr/antenna,acquired 2006.229.11:09:16.02:preob 2006.229.11:09:17.14/onsource/TRACKING 2006.229.11:09:17.14:!2006.229.11:09:26 2006.229.11:09:26.01:"tape 2006.229.11:09:26.01:"st=record 2006.229.11:09:26.02:data_valid=on 2006.229.11:09:26.02:midob 2006.229.11:09:27.14/onsource/TRACKING 2006.229.11:09:27.15/wx/28.31,1001.8,100 2006.229.11:09:27.34/cable/+6.4057E-03 2006.229.11:09:28.43/va/01,08,usb,yes,29,32 2006.229.11:09:28.43/va/02,07,usb,yes,32,32 2006.229.11:09:28.43/va/03,06,usb,yes,40,42 2006.229.11:09:28.43/va/04,07,usb,yes,33,34 2006.229.11:09:28.43/va/05,04,usb,yes,29,30 2006.229.11:09:28.43/va/06,04,usb,yes,33,33 2006.229.11:09:28.43/va/07,05,usb,yes,29,30 2006.229.11:09:28.43/va/08,06,usb,yes,21,26 2006.229.11:09:28.66/valo/01,524.99,yes,locked 2006.229.11:09:28.66/valo/02,534.99,yes,locked 2006.229.11:09:28.66/valo/03,564.99,yes,locked 2006.229.11:09:28.66/valo/04,624.99,yes,locked 2006.229.11:09:28.66/valo/05,734.99,yes,locked 2006.229.11:09:28.66/valo/06,814.99,yes,locked 2006.229.11:09:28.66/valo/07,864.99,yes,locked 2006.229.11:09:28.66/valo/08,884.99,yes,locked 2006.229.11:09:29.75/vb/01,04,usb,yes,31,29 2006.229.11:09:29.75/vb/02,04,usb,yes,33,33 2006.229.11:09:29.75/vb/03,04,usb,yes,30,33 2006.229.11:09:29.75/vb/04,04,usb,yes,34,33 2006.229.11:09:29.75/vb/05,04,usb,yes,27,29 2006.229.11:09:29.75/vb/06,04,usb,yes,31,27 2006.229.11:09:29.75/vb/07,04,usb,yes,31,31 2006.229.11:09:29.75/vb/08,04,usb,yes,29,32 2006.229.11:09:29.99/vblo/01,629.99,yes,locked 2006.229.11:09:29.99/vblo/02,634.99,yes,locked 2006.229.11:09:29.99/vblo/03,649.99,yes,locked 2006.229.11:09:29.99/vblo/04,679.99,yes,locked 2006.229.11:09:29.99/vblo/05,709.99,yes,locked 2006.229.11:09:29.99/vblo/06,719.99,yes,locked 2006.229.11:09:29.99/vblo/07,734.99,yes,locked 2006.229.11:09:29.99/vblo/08,744.99,yes,locked 2006.229.11:09:30.14/vabw/8 2006.229.11:09:30.29/vbbw/8 2006.229.11:09:30.38/xfe/off,on,12.0 2006.229.11:09:30.76/ifatt/23,28,28,28 2006.229.11:09:31.07/fmout-gps/S +4.43E-07 2006.229.11:09:31.12:!2006.229.11:10:46 2006.229.11:10:46.01:data_valid=off 2006.229.11:10:46.02:"et 2006.229.11:10:46.02:!+3s 2006.229.11:10:49.05:"tape 2006.229.11:10:49.05:postob 2006.229.11:10:49.13/cable/+6.4042E-03 2006.229.11:10:49.13/wx/28.29,1001.8,100 2006.229.11:10:49.19/fmout-gps/S +4.48E-07 2006.229.11:10:49.19:scan_name=229-1115,jd0608,210 2006.229.11:10:49.19:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.11:10:51.14#flagr#flagr/antenna,new-source 2006.229.11:10:51.14:checkk5 2006.229.11:10:51.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:10:51.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:10:52.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:10:52.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:10:53.03/chk_obsdata//k5ts1/T2291109??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:10:53.36/chk_obsdata//k5ts2/T2291109??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:10:53.69/chk_obsdata//k5ts3/T2291109??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:10:54.16/chk_obsdata//k5ts4/T2291109??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:10:54.89/k5log//k5ts1_log_newline 2006.229.11:10:55.61/k5log//k5ts2_log_newline 2006.229.11:10:56.34/k5log//k5ts3_log_newline 2006.229.11:10:57.05/k5log//k5ts4_log_newline 2006.229.11:10:57.07/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:10:57.07:setupk4=1 2006.229.11:10:57.07$setupk4/echo=on 2006.229.11:10:57.07$setupk4/pcalon 2006.229.11:10:57.07$pcalon/"no phase cal control is implemented here 2006.229.11:10:57.07$setupk4/"tpicd=stop 2006.229.11:10:57.07$setupk4/"rec=synch_on 2006.229.11:10:57.07$setupk4/"rec_mode=128 2006.229.11:10:57.07$setupk4/!* 2006.229.11:10:57.07$setupk4/recpk4 2006.229.11:10:57.07$recpk4/recpatch= 2006.229.11:10:57.08$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:10:57.08$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:10:57.08$setupk4/vck44 2006.229.11:10:57.08$vck44/valo=1,524.99 2006.229.11:10:57.08#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.11:10:57.08#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.11:10:57.08#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:57.08#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:57.08#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:57.08#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:57.08#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:10:57.08#ibcon#first serial, iclass 26, count 0 2006.229.11:10:57.08#ibcon#enter sib2, iclass 26, count 0 2006.229.11:10:57.08#ibcon#flushed, iclass 26, count 0 2006.229.11:10:57.08#ibcon#about to write, iclass 26, count 0 2006.229.11:10:57.08#ibcon#wrote, iclass 26, count 0 2006.229.11:10:57.08#ibcon#about to read 3, iclass 26, count 0 2006.229.11:10:57.09#ibcon#read 3, iclass 26, count 0 2006.229.11:10:57.09#ibcon#about to read 4, iclass 26, count 0 2006.229.11:10:57.09#ibcon#read 4, iclass 26, count 0 2006.229.11:10:57.09#ibcon#about to read 5, iclass 26, count 0 2006.229.11:10:57.09#ibcon#read 5, iclass 26, count 0 2006.229.11:10:57.09#ibcon#about to read 6, iclass 26, count 0 2006.229.11:10:57.09#ibcon#read 6, iclass 26, count 0 2006.229.11:10:57.09#ibcon#end of sib2, iclass 26, count 0 2006.229.11:10:57.09#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:10:57.09#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:10:57.09#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:10:57.09#ibcon#*before write, iclass 26, count 0 2006.229.11:10:57.09#ibcon#enter sib2, iclass 26, count 0 2006.229.11:10:57.09#ibcon#flushed, iclass 26, count 0 2006.229.11:10:57.09#ibcon#about to write, iclass 26, count 0 2006.229.11:10:57.09#ibcon#wrote, iclass 26, count 0 2006.229.11:10:57.09#ibcon#about to read 3, iclass 26, count 0 2006.229.11:10:57.14#ibcon#read 3, iclass 26, count 0 2006.229.11:10:57.14#ibcon#about to read 4, iclass 26, count 0 2006.229.11:10:57.14#ibcon#read 4, iclass 26, count 0 2006.229.11:10:57.14#ibcon#about to read 5, iclass 26, count 0 2006.229.11:10:57.14#ibcon#read 5, iclass 26, count 0 2006.229.11:10:57.14#ibcon#about to read 6, iclass 26, count 0 2006.229.11:10:57.14#ibcon#read 6, iclass 26, count 0 2006.229.11:10:57.14#ibcon#end of sib2, iclass 26, count 0 2006.229.11:10:57.14#ibcon#*after write, iclass 26, count 0 2006.229.11:10:57.14#ibcon#*before return 0, iclass 26, count 0 2006.229.11:10:57.14#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:57.14#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:57.14#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:10:57.14#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:10:57.14$vck44/va=1,8 2006.229.11:10:57.14#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.11:10:57.14#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.11:10:57.14#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:57.14#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:57.15#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:57.15#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:57.15#ibcon#enter wrdev, iclass 28, count 2 2006.229.11:10:57.15#ibcon#first serial, iclass 28, count 2 2006.229.11:10:57.15#ibcon#enter sib2, iclass 28, count 2 2006.229.11:10:57.15#ibcon#flushed, iclass 28, count 2 2006.229.11:10:57.15#ibcon#about to write, iclass 28, count 2 2006.229.11:10:57.15#ibcon#wrote, iclass 28, count 2 2006.229.11:10:57.15#ibcon#about to read 3, iclass 28, count 2 2006.229.11:10:57.16#ibcon#read 3, iclass 28, count 2 2006.229.11:10:57.16#ibcon#about to read 4, iclass 28, count 2 2006.229.11:10:57.16#ibcon#read 4, iclass 28, count 2 2006.229.11:10:57.16#ibcon#about to read 5, iclass 28, count 2 2006.229.11:10:57.16#ibcon#read 5, iclass 28, count 2 2006.229.11:10:57.16#ibcon#about to read 6, iclass 28, count 2 2006.229.11:10:57.16#ibcon#read 6, iclass 28, count 2 2006.229.11:10:57.16#ibcon#end of sib2, iclass 28, count 2 2006.229.11:10:57.16#ibcon#*mode == 0, iclass 28, count 2 2006.229.11:10:57.16#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.11:10:57.16#ibcon#[25=AT01-08\r\n] 2006.229.11:10:57.16#ibcon#*before write, iclass 28, count 2 2006.229.11:10:57.16#ibcon#enter sib2, iclass 28, count 2 2006.229.11:10:57.16#ibcon#flushed, iclass 28, count 2 2006.229.11:10:57.16#ibcon#about to write, iclass 28, count 2 2006.229.11:10:57.16#ibcon#wrote, iclass 28, count 2 2006.229.11:10:57.16#ibcon#about to read 3, iclass 28, count 2 2006.229.11:10:57.19#ibcon#read 3, iclass 28, count 2 2006.229.11:10:57.19#ibcon#about to read 4, iclass 28, count 2 2006.229.11:10:57.19#ibcon#read 4, iclass 28, count 2 2006.229.11:10:57.19#ibcon#about to read 5, iclass 28, count 2 2006.229.11:10:57.19#ibcon#read 5, iclass 28, count 2 2006.229.11:10:57.19#ibcon#about to read 6, iclass 28, count 2 2006.229.11:10:57.19#ibcon#read 6, iclass 28, count 2 2006.229.11:10:57.19#ibcon#end of sib2, iclass 28, count 2 2006.229.11:10:57.19#ibcon#*after write, iclass 28, count 2 2006.229.11:10:57.19#ibcon#*before return 0, iclass 28, count 2 2006.229.11:10:57.19#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:57.19#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:57.19#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.11:10:57.19#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:57.19#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:57.31#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:57.31#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:57.31#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:10:57.31#ibcon#first serial, iclass 28, count 0 2006.229.11:10:57.31#ibcon#enter sib2, iclass 28, count 0 2006.229.11:10:57.31#ibcon#flushed, iclass 28, count 0 2006.229.11:10:57.31#ibcon#about to write, iclass 28, count 0 2006.229.11:10:57.31#ibcon#wrote, iclass 28, count 0 2006.229.11:10:57.31#ibcon#about to read 3, iclass 28, count 0 2006.229.11:10:57.33#ibcon#read 3, iclass 28, count 0 2006.229.11:10:57.33#ibcon#about to read 4, iclass 28, count 0 2006.229.11:10:57.33#ibcon#read 4, iclass 28, count 0 2006.229.11:10:57.33#ibcon#about to read 5, iclass 28, count 0 2006.229.11:10:57.33#ibcon#read 5, iclass 28, count 0 2006.229.11:10:57.33#ibcon#about to read 6, iclass 28, count 0 2006.229.11:10:57.33#ibcon#read 6, iclass 28, count 0 2006.229.11:10:57.33#ibcon#end of sib2, iclass 28, count 0 2006.229.11:10:57.33#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:10:57.33#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:10:57.33#ibcon#[25=USB\r\n] 2006.229.11:10:57.33#ibcon#*before write, iclass 28, count 0 2006.229.11:10:57.33#ibcon#enter sib2, iclass 28, count 0 2006.229.11:10:57.33#ibcon#flushed, iclass 28, count 0 2006.229.11:10:57.33#ibcon#about to write, iclass 28, count 0 2006.229.11:10:57.33#ibcon#wrote, iclass 28, count 0 2006.229.11:10:57.33#ibcon#about to read 3, iclass 28, count 0 2006.229.11:10:57.36#ibcon#read 3, iclass 28, count 0 2006.229.11:10:57.36#ibcon#about to read 4, iclass 28, count 0 2006.229.11:10:57.36#ibcon#read 4, iclass 28, count 0 2006.229.11:10:57.36#ibcon#about to read 5, iclass 28, count 0 2006.229.11:10:57.36#ibcon#read 5, iclass 28, count 0 2006.229.11:10:57.36#ibcon#about to read 6, iclass 28, count 0 2006.229.11:10:57.36#ibcon#read 6, iclass 28, count 0 2006.229.11:10:57.36#ibcon#end of sib2, iclass 28, count 0 2006.229.11:10:57.36#ibcon#*after write, iclass 28, count 0 2006.229.11:10:57.36#ibcon#*before return 0, iclass 28, count 0 2006.229.11:10:57.36#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:57.36#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:57.36#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:10:57.36#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:10:57.36$vck44/valo=2,534.99 2006.229.11:10:57.36#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.11:10:57.36#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.11:10:57.36#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:57.36#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:10:57.36#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:10:57.36#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:10:57.36#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:10:57.36#ibcon#first serial, iclass 30, count 0 2006.229.11:10:57.36#ibcon#enter sib2, iclass 30, count 0 2006.229.11:10:57.36#ibcon#flushed, iclass 30, count 0 2006.229.11:10:57.36#ibcon#about to write, iclass 30, count 0 2006.229.11:10:57.36#ibcon#wrote, iclass 30, count 0 2006.229.11:10:57.36#ibcon#about to read 3, iclass 30, count 0 2006.229.11:10:57.38#ibcon#read 3, iclass 30, count 0 2006.229.11:10:57.38#ibcon#about to read 4, iclass 30, count 0 2006.229.11:10:57.38#ibcon#read 4, iclass 30, count 0 2006.229.11:10:57.38#ibcon#about to read 5, iclass 30, count 0 2006.229.11:10:57.38#ibcon#read 5, iclass 30, count 0 2006.229.11:10:57.38#ibcon#about to read 6, iclass 30, count 0 2006.229.11:10:57.38#ibcon#read 6, iclass 30, count 0 2006.229.11:10:57.38#ibcon#end of sib2, iclass 30, count 0 2006.229.11:10:57.38#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:10:57.38#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:10:57.38#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:10:57.38#ibcon#*before write, iclass 30, count 0 2006.229.11:10:57.38#ibcon#enter sib2, iclass 30, count 0 2006.229.11:10:57.38#ibcon#flushed, iclass 30, count 0 2006.229.11:10:57.38#ibcon#about to write, iclass 30, count 0 2006.229.11:10:57.38#ibcon#wrote, iclass 30, count 0 2006.229.11:10:57.38#ibcon#about to read 3, iclass 30, count 0 2006.229.11:10:57.42#ibcon#read 3, iclass 30, count 0 2006.229.11:10:57.42#ibcon#about to read 4, iclass 30, count 0 2006.229.11:10:57.42#ibcon#read 4, iclass 30, count 0 2006.229.11:10:57.42#ibcon#about to read 5, iclass 30, count 0 2006.229.11:10:57.42#ibcon#read 5, iclass 30, count 0 2006.229.11:10:57.42#ibcon#about to read 6, iclass 30, count 0 2006.229.11:10:57.42#ibcon#read 6, iclass 30, count 0 2006.229.11:10:57.42#ibcon#end of sib2, iclass 30, count 0 2006.229.11:10:57.42#ibcon#*after write, iclass 30, count 0 2006.229.11:10:57.42#ibcon#*before return 0, iclass 30, count 0 2006.229.11:10:57.42#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:10:57.42#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:10:57.42#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:10:57.42#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:10:57.42$vck44/va=2,7 2006.229.11:10:57.42#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.11:10:57.42#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.11:10:57.42#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:57.42#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:10:57.48#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:10:57.48#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:10:57.48#ibcon#enter wrdev, iclass 32, count 2 2006.229.11:10:57.48#ibcon#first serial, iclass 32, count 2 2006.229.11:10:57.48#ibcon#enter sib2, iclass 32, count 2 2006.229.11:10:57.48#ibcon#flushed, iclass 32, count 2 2006.229.11:10:57.48#ibcon#about to write, iclass 32, count 2 2006.229.11:10:57.48#ibcon#wrote, iclass 32, count 2 2006.229.11:10:57.48#ibcon#about to read 3, iclass 32, count 2 2006.229.11:10:57.50#ibcon#read 3, iclass 32, count 2 2006.229.11:10:57.50#ibcon#about to read 4, iclass 32, count 2 2006.229.11:10:57.50#ibcon#read 4, iclass 32, count 2 2006.229.11:10:57.50#ibcon#about to read 5, iclass 32, count 2 2006.229.11:10:57.50#ibcon#read 5, iclass 32, count 2 2006.229.11:10:57.50#ibcon#about to read 6, iclass 32, count 2 2006.229.11:10:57.50#ibcon#read 6, iclass 32, count 2 2006.229.11:10:57.50#ibcon#end of sib2, iclass 32, count 2 2006.229.11:10:57.50#ibcon#*mode == 0, iclass 32, count 2 2006.229.11:10:57.50#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.11:10:57.50#ibcon#[25=AT02-07\r\n] 2006.229.11:10:57.50#ibcon#*before write, iclass 32, count 2 2006.229.11:10:57.50#ibcon#enter sib2, iclass 32, count 2 2006.229.11:10:57.50#ibcon#flushed, iclass 32, count 2 2006.229.11:10:57.50#ibcon#about to write, iclass 32, count 2 2006.229.11:10:57.50#ibcon#wrote, iclass 32, count 2 2006.229.11:10:57.50#ibcon#about to read 3, iclass 32, count 2 2006.229.11:10:57.53#ibcon#read 3, iclass 32, count 2 2006.229.11:10:57.53#ibcon#about to read 4, iclass 32, count 2 2006.229.11:10:57.53#ibcon#read 4, iclass 32, count 2 2006.229.11:10:57.53#ibcon#about to read 5, iclass 32, count 2 2006.229.11:10:57.53#ibcon#read 5, iclass 32, count 2 2006.229.11:10:57.53#ibcon#about to read 6, iclass 32, count 2 2006.229.11:10:57.53#ibcon#read 6, iclass 32, count 2 2006.229.11:10:57.53#ibcon#end of sib2, iclass 32, count 2 2006.229.11:10:57.53#ibcon#*after write, iclass 32, count 2 2006.229.11:10:57.53#ibcon#*before return 0, iclass 32, count 2 2006.229.11:10:57.53#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:10:57.53#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:10:57.53#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.11:10:57.53#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:57.53#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:10:57.65#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:10:57.65#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:10:57.65#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:10:57.65#ibcon#first serial, iclass 32, count 0 2006.229.11:10:57.65#ibcon#enter sib2, iclass 32, count 0 2006.229.11:10:57.65#ibcon#flushed, iclass 32, count 0 2006.229.11:10:57.65#ibcon#about to write, iclass 32, count 0 2006.229.11:10:57.65#ibcon#wrote, iclass 32, count 0 2006.229.11:10:57.65#ibcon#about to read 3, iclass 32, count 0 2006.229.11:10:57.67#ibcon#read 3, iclass 32, count 0 2006.229.11:10:57.67#ibcon#about to read 4, iclass 32, count 0 2006.229.11:10:57.67#ibcon#read 4, iclass 32, count 0 2006.229.11:10:57.67#ibcon#about to read 5, iclass 32, count 0 2006.229.11:10:57.67#ibcon#read 5, iclass 32, count 0 2006.229.11:10:57.67#ibcon#about to read 6, iclass 32, count 0 2006.229.11:10:57.67#ibcon#read 6, iclass 32, count 0 2006.229.11:10:57.67#ibcon#end of sib2, iclass 32, count 0 2006.229.11:10:57.67#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:10:57.67#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:10:57.67#ibcon#[25=USB\r\n] 2006.229.11:10:57.67#ibcon#*before write, iclass 32, count 0 2006.229.11:10:57.67#ibcon#enter sib2, iclass 32, count 0 2006.229.11:10:57.67#ibcon#flushed, iclass 32, count 0 2006.229.11:10:57.67#ibcon#about to write, iclass 32, count 0 2006.229.11:10:57.67#ibcon#wrote, iclass 32, count 0 2006.229.11:10:57.67#ibcon#about to read 3, iclass 32, count 0 2006.229.11:10:57.70#ibcon#read 3, iclass 32, count 0 2006.229.11:10:57.70#ibcon#about to read 4, iclass 32, count 0 2006.229.11:10:57.70#ibcon#read 4, iclass 32, count 0 2006.229.11:10:57.70#ibcon#about to read 5, iclass 32, count 0 2006.229.11:10:57.70#ibcon#read 5, iclass 32, count 0 2006.229.11:10:57.70#ibcon#about to read 6, iclass 32, count 0 2006.229.11:10:57.70#ibcon#read 6, iclass 32, count 0 2006.229.11:10:57.70#ibcon#end of sib2, iclass 32, count 0 2006.229.11:10:57.70#ibcon#*after write, iclass 32, count 0 2006.229.11:10:57.70#ibcon#*before return 0, iclass 32, count 0 2006.229.11:10:57.70#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:10:57.70#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:10:57.70#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:10:57.70#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:10:57.70$vck44/valo=3,564.99 2006.229.11:10:57.70#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.11:10:57.70#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.11:10:57.70#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:57.70#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:10:57.70#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:10:57.70#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:10:57.70#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:10:57.70#ibcon#first serial, iclass 34, count 0 2006.229.11:10:57.70#ibcon#enter sib2, iclass 34, count 0 2006.229.11:10:57.70#ibcon#flushed, iclass 34, count 0 2006.229.11:10:57.70#ibcon#about to write, iclass 34, count 0 2006.229.11:10:57.70#ibcon#wrote, iclass 34, count 0 2006.229.11:10:57.70#ibcon#about to read 3, iclass 34, count 0 2006.229.11:10:57.72#ibcon#read 3, iclass 34, count 0 2006.229.11:10:57.72#ibcon#about to read 4, iclass 34, count 0 2006.229.11:10:57.72#ibcon#read 4, iclass 34, count 0 2006.229.11:10:57.72#ibcon#about to read 5, iclass 34, count 0 2006.229.11:10:57.72#ibcon#read 5, iclass 34, count 0 2006.229.11:10:57.72#ibcon#about to read 6, iclass 34, count 0 2006.229.11:10:57.72#ibcon#read 6, iclass 34, count 0 2006.229.11:10:57.72#ibcon#end of sib2, iclass 34, count 0 2006.229.11:10:57.72#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:10:57.72#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:10:57.72#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:10:57.72#ibcon#*before write, iclass 34, count 0 2006.229.11:10:57.72#ibcon#enter sib2, iclass 34, count 0 2006.229.11:10:57.72#ibcon#flushed, iclass 34, count 0 2006.229.11:10:57.72#ibcon#about to write, iclass 34, count 0 2006.229.11:10:57.72#ibcon#wrote, iclass 34, count 0 2006.229.11:10:57.72#ibcon#about to read 3, iclass 34, count 0 2006.229.11:10:57.76#ibcon#read 3, iclass 34, count 0 2006.229.11:10:57.76#ibcon#about to read 4, iclass 34, count 0 2006.229.11:10:57.76#ibcon#read 4, iclass 34, count 0 2006.229.11:10:57.76#ibcon#about to read 5, iclass 34, count 0 2006.229.11:10:57.76#ibcon#read 5, iclass 34, count 0 2006.229.11:10:57.76#ibcon#about to read 6, iclass 34, count 0 2006.229.11:10:57.76#ibcon#read 6, iclass 34, count 0 2006.229.11:10:57.76#ibcon#end of sib2, iclass 34, count 0 2006.229.11:10:57.76#ibcon#*after write, iclass 34, count 0 2006.229.11:10:57.76#ibcon#*before return 0, iclass 34, count 0 2006.229.11:10:57.76#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:10:57.76#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:10:57.76#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:10:57.76#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:10:57.76$vck44/va=3,6 2006.229.11:10:57.76#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.11:10:57.76#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.11:10:57.76#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:57.76#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:10:57.82#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:10:57.82#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:10:57.82#ibcon#enter wrdev, iclass 36, count 2 2006.229.11:10:57.82#ibcon#first serial, iclass 36, count 2 2006.229.11:10:57.82#ibcon#enter sib2, iclass 36, count 2 2006.229.11:10:57.82#ibcon#flushed, iclass 36, count 2 2006.229.11:10:57.82#ibcon#about to write, iclass 36, count 2 2006.229.11:10:57.82#ibcon#wrote, iclass 36, count 2 2006.229.11:10:57.82#ibcon#about to read 3, iclass 36, count 2 2006.229.11:10:57.84#ibcon#read 3, iclass 36, count 2 2006.229.11:10:57.84#ibcon#about to read 4, iclass 36, count 2 2006.229.11:10:57.84#ibcon#read 4, iclass 36, count 2 2006.229.11:10:57.84#ibcon#about to read 5, iclass 36, count 2 2006.229.11:10:57.84#ibcon#read 5, iclass 36, count 2 2006.229.11:10:57.84#ibcon#about to read 6, iclass 36, count 2 2006.229.11:10:57.84#ibcon#read 6, iclass 36, count 2 2006.229.11:10:57.84#ibcon#end of sib2, iclass 36, count 2 2006.229.11:10:57.84#ibcon#*mode == 0, iclass 36, count 2 2006.229.11:10:57.84#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.11:10:57.84#ibcon#[25=AT03-06\r\n] 2006.229.11:10:57.84#ibcon#*before write, iclass 36, count 2 2006.229.11:10:57.84#ibcon#enter sib2, iclass 36, count 2 2006.229.11:10:57.84#ibcon#flushed, iclass 36, count 2 2006.229.11:10:57.84#ibcon#about to write, iclass 36, count 2 2006.229.11:10:57.84#ibcon#wrote, iclass 36, count 2 2006.229.11:10:57.84#ibcon#about to read 3, iclass 36, count 2 2006.229.11:10:57.87#ibcon#read 3, iclass 36, count 2 2006.229.11:10:57.87#ibcon#about to read 4, iclass 36, count 2 2006.229.11:10:57.87#ibcon#read 4, iclass 36, count 2 2006.229.11:10:57.87#ibcon#about to read 5, iclass 36, count 2 2006.229.11:10:57.87#ibcon#read 5, iclass 36, count 2 2006.229.11:10:57.87#ibcon#about to read 6, iclass 36, count 2 2006.229.11:10:57.87#ibcon#read 6, iclass 36, count 2 2006.229.11:10:57.87#ibcon#end of sib2, iclass 36, count 2 2006.229.11:10:57.87#ibcon#*after write, iclass 36, count 2 2006.229.11:10:57.87#ibcon#*before return 0, iclass 36, count 2 2006.229.11:10:57.87#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:10:57.87#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:10:57.87#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.11:10:57.87#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:57.87#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:10:57.88#abcon#<5=/04 2.1 3.9 28.291001001.8\r\n> 2006.229.11:10:57.90#abcon#{5=INTERFACE CLEAR} 2006.229.11:10:57.96#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:10:57.99#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:10:57.99#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:10:57.99#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:10:57.99#ibcon#first serial, iclass 36, count 0 2006.229.11:10:57.99#ibcon#enter sib2, iclass 36, count 0 2006.229.11:10:57.99#ibcon#flushed, iclass 36, count 0 2006.229.11:10:57.99#ibcon#about to write, iclass 36, count 0 2006.229.11:10:57.99#ibcon#wrote, iclass 36, count 0 2006.229.11:10:57.99#ibcon#about to read 3, iclass 36, count 0 2006.229.11:10:58.01#ibcon#read 3, iclass 36, count 0 2006.229.11:10:58.01#ibcon#about to read 4, iclass 36, count 0 2006.229.11:10:58.01#ibcon#read 4, iclass 36, count 0 2006.229.11:10:58.01#ibcon#about to read 5, iclass 36, count 0 2006.229.11:10:58.01#ibcon#read 5, iclass 36, count 0 2006.229.11:10:58.01#ibcon#about to read 6, iclass 36, count 0 2006.229.11:10:58.01#ibcon#read 6, iclass 36, count 0 2006.229.11:10:58.01#ibcon#end of sib2, iclass 36, count 0 2006.229.11:10:58.01#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:10:58.01#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:10:58.01#ibcon#[25=USB\r\n] 2006.229.11:10:58.01#ibcon#*before write, iclass 36, count 0 2006.229.11:10:58.01#ibcon#enter sib2, iclass 36, count 0 2006.229.11:10:58.01#ibcon#flushed, iclass 36, count 0 2006.229.11:10:58.01#ibcon#about to write, iclass 36, count 0 2006.229.11:10:58.01#ibcon#wrote, iclass 36, count 0 2006.229.11:10:58.01#ibcon#about to read 3, iclass 36, count 0 2006.229.11:10:58.04#ibcon#read 3, iclass 36, count 0 2006.229.11:10:58.04#ibcon#about to read 4, iclass 36, count 0 2006.229.11:10:58.04#ibcon#read 4, iclass 36, count 0 2006.229.11:10:58.04#ibcon#about to read 5, iclass 36, count 0 2006.229.11:10:58.04#ibcon#read 5, iclass 36, count 0 2006.229.11:10:58.04#ibcon#about to read 6, iclass 36, count 0 2006.229.11:10:58.04#ibcon#read 6, iclass 36, count 0 2006.229.11:10:58.04#ibcon#end of sib2, iclass 36, count 0 2006.229.11:10:58.04#ibcon#*after write, iclass 36, count 0 2006.229.11:10:58.04#ibcon#*before return 0, iclass 36, count 0 2006.229.11:10:58.04#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:10:58.04#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:10:58.04#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:10:58.04#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:10:58.04$vck44/valo=4,624.99 2006.229.11:10:58.04#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.11:10:58.04#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.11:10:58.04#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:58.04#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:10:58.04#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:10:58.04#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:10:58.04#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:10:58.04#ibcon#first serial, iclass 4, count 0 2006.229.11:10:58.04#ibcon#enter sib2, iclass 4, count 0 2006.229.11:10:58.04#ibcon#flushed, iclass 4, count 0 2006.229.11:10:58.04#ibcon#about to write, iclass 4, count 0 2006.229.11:10:58.04#ibcon#wrote, iclass 4, count 0 2006.229.11:10:58.04#ibcon#about to read 3, iclass 4, count 0 2006.229.11:10:58.06#ibcon#read 3, iclass 4, count 0 2006.229.11:10:58.06#ibcon#about to read 4, iclass 4, count 0 2006.229.11:10:58.06#ibcon#read 4, iclass 4, count 0 2006.229.11:10:58.06#ibcon#about to read 5, iclass 4, count 0 2006.229.11:10:58.06#ibcon#read 5, iclass 4, count 0 2006.229.11:10:58.06#ibcon#about to read 6, iclass 4, count 0 2006.229.11:10:58.06#ibcon#read 6, iclass 4, count 0 2006.229.11:10:58.06#ibcon#end of sib2, iclass 4, count 0 2006.229.11:10:58.06#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:10:58.06#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:10:58.06#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:10:58.06#ibcon#*before write, iclass 4, count 0 2006.229.11:10:58.06#ibcon#enter sib2, iclass 4, count 0 2006.229.11:10:58.06#ibcon#flushed, iclass 4, count 0 2006.229.11:10:58.06#ibcon#about to write, iclass 4, count 0 2006.229.11:10:58.06#ibcon#wrote, iclass 4, count 0 2006.229.11:10:58.06#ibcon#about to read 3, iclass 4, count 0 2006.229.11:10:58.10#ibcon#read 3, iclass 4, count 0 2006.229.11:10:58.10#ibcon#about to read 4, iclass 4, count 0 2006.229.11:10:58.10#ibcon#read 4, iclass 4, count 0 2006.229.11:10:58.10#ibcon#about to read 5, iclass 4, count 0 2006.229.11:10:58.10#ibcon#read 5, iclass 4, count 0 2006.229.11:10:58.10#ibcon#about to read 6, iclass 4, count 0 2006.229.11:10:58.10#ibcon#read 6, iclass 4, count 0 2006.229.11:10:58.10#ibcon#end of sib2, iclass 4, count 0 2006.229.11:10:58.10#ibcon#*after write, iclass 4, count 0 2006.229.11:10:58.10#ibcon#*before return 0, iclass 4, count 0 2006.229.11:10:58.10#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:10:58.10#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:10:58.10#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:10:58.10#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:10:58.10$vck44/va=4,7 2006.229.11:10:58.10#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.11:10:58.10#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.11:10:58.10#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:58.10#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:10:58.16#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:10:58.16#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:10:58.16#ibcon#enter wrdev, iclass 6, count 2 2006.229.11:10:58.16#ibcon#first serial, iclass 6, count 2 2006.229.11:10:58.16#ibcon#enter sib2, iclass 6, count 2 2006.229.11:10:58.16#ibcon#flushed, iclass 6, count 2 2006.229.11:10:58.16#ibcon#about to write, iclass 6, count 2 2006.229.11:10:58.16#ibcon#wrote, iclass 6, count 2 2006.229.11:10:58.16#ibcon#about to read 3, iclass 6, count 2 2006.229.11:10:58.18#ibcon#read 3, iclass 6, count 2 2006.229.11:10:58.18#ibcon#about to read 4, iclass 6, count 2 2006.229.11:10:58.18#ibcon#read 4, iclass 6, count 2 2006.229.11:10:58.18#ibcon#about to read 5, iclass 6, count 2 2006.229.11:10:58.18#ibcon#read 5, iclass 6, count 2 2006.229.11:10:58.18#ibcon#about to read 6, iclass 6, count 2 2006.229.11:10:58.18#ibcon#read 6, iclass 6, count 2 2006.229.11:10:58.18#ibcon#end of sib2, iclass 6, count 2 2006.229.11:10:58.18#ibcon#*mode == 0, iclass 6, count 2 2006.229.11:10:58.18#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.11:10:58.18#ibcon#[25=AT04-07\r\n] 2006.229.11:10:58.18#ibcon#*before write, iclass 6, count 2 2006.229.11:10:58.18#ibcon#enter sib2, iclass 6, count 2 2006.229.11:10:58.18#ibcon#flushed, iclass 6, count 2 2006.229.11:10:58.18#ibcon#about to write, iclass 6, count 2 2006.229.11:10:58.18#ibcon#wrote, iclass 6, count 2 2006.229.11:10:58.18#ibcon#about to read 3, iclass 6, count 2 2006.229.11:10:58.21#ibcon#read 3, iclass 6, count 2 2006.229.11:10:58.21#ibcon#about to read 4, iclass 6, count 2 2006.229.11:10:58.21#ibcon#read 4, iclass 6, count 2 2006.229.11:10:58.21#ibcon#about to read 5, iclass 6, count 2 2006.229.11:10:58.21#ibcon#read 5, iclass 6, count 2 2006.229.11:10:58.21#ibcon#about to read 6, iclass 6, count 2 2006.229.11:10:58.21#ibcon#read 6, iclass 6, count 2 2006.229.11:10:58.21#ibcon#end of sib2, iclass 6, count 2 2006.229.11:10:58.21#ibcon#*after write, iclass 6, count 2 2006.229.11:10:58.21#ibcon#*before return 0, iclass 6, count 2 2006.229.11:10:58.21#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:10:58.21#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:10:58.21#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.11:10:58.21#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:58.21#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:10:58.33#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:10:58.33#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:10:58.33#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:10:58.33#ibcon#first serial, iclass 6, count 0 2006.229.11:10:58.33#ibcon#enter sib2, iclass 6, count 0 2006.229.11:10:58.33#ibcon#flushed, iclass 6, count 0 2006.229.11:10:58.33#ibcon#about to write, iclass 6, count 0 2006.229.11:10:58.33#ibcon#wrote, iclass 6, count 0 2006.229.11:10:58.33#ibcon#about to read 3, iclass 6, count 0 2006.229.11:10:58.35#ibcon#read 3, iclass 6, count 0 2006.229.11:10:58.35#ibcon#about to read 4, iclass 6, count 0 2006.229.11:10:58.35#ibcon#read 4, iclass 6, count 0 2006.229.11:10:58.35#ibcon#about to read 5, iclass 6, count 0 2006.229.11:10:58.35#ibcon#read 5, iclass 6, count 0 2006.229.11:10:58.35#ibcon#about to read 6, iclass 6, count 0 2006.229.11:10:58.35#ibcon#read 6, iclass 6, count 0 2006.229.11:10:58.35#ibcon#end of sib2, iclass 6, count 0 2006.229.11:10:58.35#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:10:58.35#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:10:58.35#ibcon#[25=USB\r\n] 2006.229.11:10:58.35#ibcon#*before write, iclass 6, count 0 2006.229.11:10:58.35#ibcon#enter sib2, iclass 6, count 0 2006.229.11:10:58.35#ibcon#flushed, iclass 6, count 0 2006.229.11:10:58.35#ibcon#about to write, iclass 6, count 0 2006.229.11:10:58.35#ibcon#wrote, iclass 6, count 0 2006.229.11:10:58.35#ibcon#about to read 3, iclass 6, count 0 2006.229.11:10:58.38#ibcon#read 3, iclass 6, count 0 2006.229.11:10:58.38#ibcon#about to read 4, iclass 6, count 0 2006.229.11:10:58.38#ibcon#read 4, iclass 6, count 0 2006.229.11:10:58.38#ibcon#about to read 5, iclass 6, count 0 2006.229.11:10:58.38#ibcon#read 5, iclass 6, count 0 2006.229.11:10:58.38#ibcon#about to read 6, iclass 6, count 0 2006.229.11:10:58.38#ibcon#read 6, iclass 6, count 0 2006.229.11:10:58.38#ibcon#end of sib2, iclass 6, count 0 2006.229.11:10:58.38#ibcon#*after write, iclass 6, count 0 2006.229.11:10:58.38#ibcon#*before return 0, iclass 6, count 0 2006.229.11:10:58.38#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:10:58.38#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:10:58.38#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:10:58.38#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:10:58.38$vck44/valo=5,734.99 2006.229.11:10:58.38#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.11:10:58.38#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.11:10:58.38#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:58.38#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:10:58.38#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:10:58.38#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:10:58.38#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:10:58.38#ibcon#first serial, iclass 10, count 0 2006.229.11:10:58.38#ibcon#enter sib2, iclass 10, count 0 2006.229.11:10:58.38#ibcon#flushed, iclass 10, count 0 2006.229.11:10:58.38#ibcon#about to write, iclass 10, count 0 2006.229.11:10:58.38#ibcon#wrote, iclass 10, count 0 2006.229.11:10:58.38#ibcon#about to read 3, iclass 10, count 0 2006.229.11:10:58.40#ibcon#read 3, iclass 10, count 0 2006.229.11:10:58.40#ibcon#about to read 4, iclass 10, count 0 2006.229.11:10:58.40#ibcon#read 4, iclass 10, count 0 2006.229.11:10:58.40#ibcon#about to read 5, iclass 10, count 0 2006.229.11:10:58.40#ibcon#read 5, iclass 10, count 0 2006.229.11:10:58.40#ibcon#about to read 6, iclass 10, count 0 2006.229.11:10:58.40#ibcon#read 6, iclass 10, count 0 2006.229.11:10:58.40#ibcon#end of sib2, iclass 10, count 0 2006.229.11:10:58.40#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:10:58.40#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:10:58.40#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:10:58.40#ibcon#*before write, iclass 10, count 0 2006.229.11:10:58.40#ibcon#enter sib2, iclass 10, count 0 2006.229.11:10:58.40#ibcon#flushed, iclass 10, count 0 2006.229.11:10:58.40#ibcon#about to write, iclass 10, count 0 2006.229.11:10:58.40#ibcon#wrote, iclass 10, count 0 2006.229.11:10:58.40#ibcon#about to read 3, iclass 10, count 0 2006.229.11:10:58.44#ibcon#read 3, iclass 10, count 0 2006.229.11:10:58.44#ibcon#about to read 4, iclass 10, count 0 2006.229.11:10:58.44#ibcon#read 4, iclass 10, count 0 2006.229.11:10:58.44#ibcon#about to read 5, iclass 10, count 0 2006.229.11:10:58.44#ibcon#read 5, iclass 10, count 0 2006.229.11:10:58.44#ibcon#about to read 6, iclass 10, count 0 2006.229.11:10:58.44#ibcon#read 6, iclass 10, count 0 2006.229.11:10:58.44#ibcon#end of sib2, iclass 10, count 0 2006.229.11:10:58.44#ibcon#*after write, iclass 10, count 0 2006.229.11:10:58.44#ibcon#*before return 0, iclass 10, count 0 2006.229.11:10:58.44#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:10:58.44#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:10:58.44#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:10:58.44#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:10:58.44$vck44/va=5,4 2006.229.11:10:58.44#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.11:10:58.44#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.11:10:58.44#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:58.44#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:10:58.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:10:58.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:10:58.50#ibcon#enter wrdev, iclass 12, count 2 2006.229.11:10:58.50#ibcon#first serial, iclass 12, count 2 2006.229.11:10:58.50#ibcon#enter sib2, iclass 12, count 2 2006.229.11:10:58.50#ibcon#flushed, iclass 12, count 2 2006.229.11:10:58.50#ibcon#about to write, iclass 12, count 2 2006.229.11:10:58.50#ibcon#wrote, iclass 12, count 2 2006.229.11:10:58.50#ibcon#about to read 3, iclass 12, count 2 2006.229.11:10:58.52#ibcon#read 3, iclass 12, count 2 2006.229.11:10:58.52#ibcon#about to read 4, iclass 12, count 2 2006.229.11:10:58.52#ibcon#read 4, iclass 12, count 2 2006.229.11:10:58.52#ibcon#about to read 5, iclass 12, count 2 2006.229.11:10:58.52#ibcon#read 5, iclass 12, count 2 2006.229.11:10:58.52#ibcon#about to read 6, iclass 12, count 2 2006.229.11:10:58.52#ibcon#read 6, iclass 12, count 2 2006.229.11:10:58.52#ibcon#end of sib2, iclass 12, count 2 2006.229.11:10:58.52#ibcon#*mode == 0, iclass 12, count 2 2006.229.11:10:58.52#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.11:10:58.52#ibcon#[25=AT05-04\r\n] 2006.229.11:10:58.52#ibcon#*before write, iclass 12, count 2 2006.229.11:10:58.52#ibcon#enter sib2, iclass 12, count 2 2006.229.11:10:58.52#ibcon#flushed, iclass 12, count 2 2006.229.11:10:58.52#ibcon#about to write, iclass 12, count 2 2006.229.11:10:58.52#ibcon#wrote, iclass 12, count 2 2006.229.11:10:58.52#ibcon#about to read 3, iclass 12, count 2 2006.229.11:10:58.55#ibcon#read 3, iclass 12, count 2 2006.229.11:10:58.55#ibcon#about to read 4, iclass 12, count 2 2006.229.11:10:58.55#ibcon#read 4, iclass 12, count 2 2006.229.11:10:58.55#ibcon#about to read 5, iclass 12, count 2 2006.229.11:10:58.55#ibcon#read 5, iclass 12, count 2 2006.229.11:10:58.55#ibcon#about to read 6, iclass 12, count 2 2006.229.11:10:58.55#ibcon#read 6, iclass 12, count 2 2006.229.11:10:58.55#ibcon#end of sib2, iclass 12, count 2 2006.229.11:10:58.55#ibcon#*after write, iclass 12, count 2 2006.229.11:10:58.55#ibcon#*before return 0, iclass 12, count 2 2006.229.11:10:58.55#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:10:58.55#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:10:58.55#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.11:10:58.55#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:58.55#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:10:58.67#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:10:58.67#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:10:58.67#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:10:58.67#ibcon#first serial, iclass 12, count 0 2006.229.11:10:58.67#ibcon#enter sib2, iclass 12, count 0 2006.229.11:10:58.67#ibcon#flushed, iclass 12, count 0 2006.229.11:10:58.67#ibcon#about to write, iclass 12, count 0 2006.229.11:10:58.67#ibcon#wrote, iclass 12, count 0 2006.229.11:10:58.67#ibcon#about to read 3, iclass 12, count 0 2006.229.11:10:58.69#ibcon#read 3, iclass 12, count 0 2006.229.11:10:58.69#ibcon#about to read 4, iclass 12, count 0 2006.229.11:10:58.69#ibcon#read 4, iclass 12, count 0 2006.229.11:10:58.69#ibcon#about to read 5, iclass 12, count 0 2006.229.11:10:58.69#ibcon#read 5, iclass 12, count 0 2006.229.11:10:58.69#ibcon#about to read 6, iclass 12, count 0 2006.229.11:10:58.69#ibcon#read 6, iclass 12, count 0 2006.229.11:10:58.69#ibcon#end of sib2, iclass 12, count 0 2006.229.11:10:58.69#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:10:58.69#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:10:58.69#ibcon#[25=USB\r\n] 2006.229.11:10:58.69#ibcon#*before write, iclass 12, count 0 2006.229.11:10:58.69#ibcon#enter sib2, iclass 12, count 0 2006.229.11:10:58.69#ibcon#flushed, iclass 12, count 0 2006.229.11:10:58.69#ibcon#about to write, iclass 12, count 0 2006.229.11:10:58.69#ibcon#wrote, iclass 12, count 0 2006.229.11:10:58.69#ibcon#about to read 3, iclass 12, count 0 2006.229.11:10:58.72#ibcon#read 3, iclass 12, count 0 2006.229.11:10:58.72#ibcon#about to read 4, iclass 12, count 0 2006.229.11:10:58.72#ibcon#read 4, iclass 12, count 0 2006.229.11:10:58.72#ibcon#about to read 5, iclass 12, count 0 2006.229.11:10:58.72#ibcon#read 5, iclass 12, count 0 2006.229.11:10:58.72#ibcon#about to read 6, iclass 12, count 0 2006.229.11:10:58.72#ibcon#read 6, iclass 12, count 0 2006.229.11:10:58.72#ibcon#end of sib2, iclass 12, count 0 2006.229.11:10:58.72#ibcon#*after write, iclass 12, count 0 2006.229.11:10:58.72#ibcon#*before return 0, iclass 12, count 0 2006.229.11:10:58.72#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:10:58.72#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:10:58.72#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:10:58.72#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:10:58.72$vck44/valo=6,814.99 2006.229.11:10:58.72#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.11:10:58.72#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.11:10:58.72#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:58.72#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:10:58.72#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:10:58.72#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:10:58.72#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:10:58.72#ibcon#first serial, iclass 14, count 0 2006.229.11:10:58.72#ibcon#enter sib2, iclass 14, count 0 2006.229.11:10:58.72#ibcon#flushed, iclass 14, count 0 2006.229.11:10:58.72#ibcon#about to write, iclass 14, count 0 2006.229.11:10:58.72#ibcon#wrote, iclass 14, count 0 2006.229.11:10:58.72#ibcon#about to read 3, iclass 14, count 0 2006.229.11:10:58.74#ibcon#read 3, iclass 14, count 0 2006.229.11:10:58.74#ibcon#about to read 4, iclass 14, count 0 2006.229.11:10:58.74#ibcon#read 4, iclass 14, count 0 2006.229.11:10:58.74#ibcon#about to read 5, iclass 14, count 0 2006.229.11:10:58.74#ibcon#read 5, iclass 14, count 0 2006.229.11:10:58.74#ibcon#about to read 6, iclass 14, count 0 2006.229.11:10:58.74#ibcon#read 6, iclass 14, count 0 2006.229.11:10:58.74#ibcon#end of sib2, iclass 14, count 0 2006.229.11:10:58.74#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:10:58.74#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:10:58.74#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:10:58.74#ibcon#*before write, iclass 14, count 0 2006.229.11:10:58.74#ibcon#enter sib2, iclass 14, count 0 2006.229.11:10:58.74#ibcon#flushed, iclass 14, count 0 2006.229.11:10:58.74#ibcon#about to write, iclass 14, count 0 2006.229.11:10:58.74#ibcon#wrote, iclass 14, count 0 2006.229.11:10:58.74#ibcon#about to read 3, iclass 14, count 0 2006.229.11:10:58.78#ibcon#read 3, iclass 14, count 0 2006.229.11:10:58.78#ibcon#about to read 4, iclass 14, count 0 2006.229.11:10:58.78#ibcon#read 4, iclass 14, count 0 2006.229.11:10:58.78#ibcon#about to read 5, iclass 14, count 0 2006.229.11:10:58.78#ibcon#read 5, iclass 14, count 0 2006.229.11:10:58.78#ibcon#about to read 6, iclass 14, count 0 2006.229.11:10:58.78#ibcon#read 6, iclass 14, count 0 2006.229.11:10:58.78#ibcon#end of sib2, iclass 14, count 0 2006.229.11:10:58.78#ibcon#*after write, iclass 14, count 0 2006.229.11:10:58.78#ibcon#*before return 0, iclass 14, count 0 2006.229.11:10:58.78#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:10:58.78#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:10:58.78#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:10:58.78#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:10:58.78$vck44/va=6,4 2006.229.11:10:58.78#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.11:10:58.78#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.11:10:58.78#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:58.78#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:10:58.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:10:58.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:10:58.84#ibcon#enter wrdev, iclass 16, count 2 2006.229.11:10:58.84#ibcon#first serial, iclass 16, count 2 2006.229.11:10:58.84#ibcon#enter sib2, iclass 16, count 2 2006.229.11:10:58.84#ibcon#flushed, iclass 16, count 2 2006.229.11:10:58.84#ibcon#about to write, iclass 16, count 2 2006.229.11:10:58.84#ibcon#wrote, iclass 16, count 2 2006.229.11:10:58.84#ibcon#about to read 3, iclass 16, count 2 2006.229.11:10:58.86#ibcon#read 3, iclass 16, count 2 2006.229.11:10:58.86#ibcon#about to read 4, iclass 16, count 2 2006.229.11:10:58.86#ibcon#read 4, iclass 16, count 2 2006.229.11:10:58.86#ibcon#about to read 5, iclass 16, count 2 2006.229.11:10:58.86#ibcon#read 5, iclass 16, count 2 2006.229.11:10:58.86#ibcon#about to read 6, iclass 16, count 2 2006.229.11:10:58.86#ibcon#read 6, iclass 16, count 2 2006.229.11:10:58.86#ibcon#end of sib2, iclass 16, count 2 2006.229.11:10:58.86#ibcon#*mode == 0, iclass 16, count 2 2006.229.11:10:58.86#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.11:10:58.86#ibcon#[25=AT06-04\r\n] 2006.229.11:10:58.86#ibcon#*before write, iclass 16, count 2 2006.229.11:10:58.86#ibcon#enter sib2, iclass 16, count 2 2006.229.11:10:58.86#ibcon#flushed, iclass 16, count 2 2006.229.11:10:58.86#ibcon#about to write, iclass 16, count 2 2006.229.11:10:58.86#ibcon#wrote, iclass 16, count 2 2006.229.11:10:58.86#ibcon#about to read 3, iclass 16, count 2 2006.229.11:10:58.89#ibcon#read 3, iclass 16, count 2 2006.229.11:10:58.89#ibcon#about to read 4, iclass 16, count 2 2006.229.11:10:58.89#ibcon#read 4, iclass 16, count 2 2006.229.11:10:58.89#ibcon#about to read 5, iclass 16, count 2 2006.229.11:10:58.89#ibcon#read 5, iclass 16, count 2 2006.229.11:10:58.89#ibcon#about to read 6, iclass 16, count 2 2006.229.11:10:58.89#ibcon#read 6, iclass 16, count 2 2006.229.11:10:58.89#ibcon#end of sib2, iclass 16, count 2 2006.229.11:10:58.89#ibcon#*after write, iclass 16, count 2 2006.229.11:10:58.89#ibcon#*before return 0, iclass 16, count 2 2006.229.11:10:58.89#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:10:58.89#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:10:58.89#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.11:10:58.89#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:58.89#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:10:59.01#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:10:59.01#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:10:59.01#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:10:59.01#ibcon#first serial, iclass 16, count 0 2006.229.11:10:59.01#ibcon#enter sib2, iclass 16, count 0 2006.229.11:10:59.01#ibcon#flushed, iclass 16, count 0 2006.229.11:10:59.01#ibcon#about to write, iclass 16, count 0 2006.229.11:10:59.01#ibcon#wrote, iclass 16, count 0 2006.229.11:10:59.01#ibcon#about to read 3, iclass 16, count 0 2006.229.11:10:59.03#ibcon#read 3, iclass 16, count 0 2006.229.11:10:59.03#ibcon#about to read 4, iclass 16, count 0 2006.229.11:10:59.03#ibcon#read 4, iclass 16, count 0 2006.229.11:10:59.03#ibcon#about to read 5, iclass 16, count 0 2006.229.11:10:59.03#ibcon#read 5, iclass 16, count 0 2006.229.11:10:59.03#ibcon#about to read 6, iclass 16, count 0 2006.229.11:10:59.03#ibcon#read 6, iclass 16, count 0 2006.229.11:10:59.03#ibcon#end of sib2, iclass 16, count 0 2006.229.11:10:59.03#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:10:59.03#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:10:59.03#ibcon#[25=USB\r\n] 2006.229.11:10:59.03#ibcon#*before write, iclass 16, count 0 2006.229.11:10:59.03#ibcon#enter sib2, iclass 16, count 0 2006.229.11:10:59.03#ibcon#flushed, iclass 16, count 0 2006.229.11:10:59.03#ibcon#about to write, iclass 16, count 0 2006.229.11:10:59.03#ibcon#wrote, iclass 16, count 0 2006.229.11:10:59.03#ibcon#about to read 3, iclass 16, count 0 2006.229.11:10:59.06#ibcon#read 3, iclass 16, count 0 2006.229.11:10:59.06#ibcon#about to read 4, iclass 16, count 0 2006.229.11:10:59.06#ibcon#read 4, iclass 16, count 0 2006.229.11:10:59.06#ibcon#about to read 5, iclass 16, count 0 2006.229.11:10:59.06#ibcon#read 5, iclass 16, count 0 2006.229.11:10:59.06#ibcon#about to read 6, iclass 16, count 0 2006.229.11:10:59.06#ibcon#read 6, iclass 16, count 0 2006.229.11:10:59.06#ibcon#end of sib2, iclass 16, count 0 2006.229.11:10:59.06#ibcon#*after write, iclass 16, count 0 2006.229.11:10:59.06#ibcon#*before return 0, iclass 16, count 0 2006.229.11:10:59.06#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:10:59.06#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:10:59.06#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:10:59.06#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:10:59.06$vck44/valo=7,864.99 2006.229.11:10:59.06#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.11:10:59.06#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.11:10:59.06#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:59.06#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:10:59.06#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:10:59.06#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:10:59.06#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:10:59.06#ibcon#first serial, iclass 18, count 0 2006.229.11:10:59.06#ibcon#enter sib2, iclass 18, count 0 2006.229.11:10:59.06#ibcon#flushed, iclass 18, count 0 2006.229.11:10:59.06#ibcon#about to write, iclass 18, count 0 2006.229.11:10:59.06#ibcon#wrote, iclass 18, count 0 2006.229.11:10:59.06#ibcon#about to read 3, iclass 18, count 0 2006.229.11:10:59.08#ibcon#read 3, iclass 18, count 0 2006.229.11:10:59.08#ibcon#about to read 4, iclass 18, count 0 2006.229.11:10:59.08#ibcon#read 4, iclass 18, count 0 2006.229.11:10:59.08#ibcon#about to read 5, iclass 18, count 0 2006.229.11:10:59.08#ibcon#read 5, iclass 18, count 0 2006.229.11:10:59.08#ibcon#about to read 6, iclass 18, count 0 2006.229.11:10:59.08#ibcon#read 6, iclass 18, count 0 2006.229.11:10:59.08#ibcon#end of sib2, iclass 18, count 0 2006.229.11:10:59.08#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:10:59.08#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:10:59.08#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:10:59.08#ibcon#*before write, iclass 18, count 0 2006.229.11:10:59.08#ibcon#enter sib2, iclass 18, count 0 2006.229.11:10:59.08#ibcon#flushed, iclass 18, count 0 2006.229.11:10:59.08#ibcon#about to write, iclass 18, count 0 2006.229.11:10:59.08#ibcon#wrote, iclass 18, count 0 2006.229.11:10:59.08#ibcon#about to read 3, iclass 18, count 0 2006.229.11:10:59.12#ibcon#read 3, iclass 18, count 0 2006.229.11:10:59.12#ibcon#about to read 4, iclass 18, count 0 2006.229.11:10:59.12#ibcon#read 4, iclass 18, count 0 2006.229.11:10:59.12#ibcon#about to read 5, iclass 18, count 0 2006.229.11:10:59.12#ibcon#read 5, iclass 18, count 0 2006.229.11:10:59.12#ibcon#about to read 6, iclass 18, count 0 2006.229.11:10:59.12#ibcon#read 6, iclass 18, count 0 2006.229.11:10:59.12#ibcon#end of sib2, iclass 18, count 0 2006.229.11:10:59.12#ibcon#*after write, iclass 18, count 0 2006.229.11:10:59.12#ibcon#*before return 0, iclass 18, count 0 2006.229.11:10:59.12#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:10:59.12#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:10:59.12#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:10:59.12#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:10:59.12$vck44/va=7,5 2006.229.11:10:59.12#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.11:10:59.12#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.11:10:59.12#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:59.12#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:10:59.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:10:59.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:10:59.18#ibcon#enter wrdev, iclass 20, count 2 2006.229.11:10:59.18#ibcon#first serial, iclass 20, count 2 2006.229.11:10:59.18#ibcon#enter sib2, iclass 20, count 2 2006.229.11:10:59.18#ibcon#flushed, iclass 20, count 2 2006.229.11:10:59.18#ibcon#about to write, iclass 20, count 2 2006.229.11:10:59.18#ibcon#wrote, iclass 20, count 2 2006.229.11:10:59.18#ibcon#about to read 3, iclass 20, count 2 2006.229.11:10:59.20#ibcon#read 3, iclass 20, count 2 2006.229.11:10:59.20#ibcon#about to read 4, iclass 20, count 2 2006.229.11:10:59.20#ibcon#read 4, iclass 20, count 2 2006.229.11:10:59.20#ibcon#about to read 5, iclass 20, count 2 2006.229.11:10:59.20#ibcon#read 5, iclass 20, count 2 2006.229.11:10:59.20#ibcon#about to read 6, iclass 20, count 2 2006.229.11:10:59.20#ibcon#read 6, iclass 20, count 2 2006.229.11:10:59.20#ibcon#end of sib2, iclass 20, count 2 2006.229.11:10:59.20#ibcon#*mode == 0, iclass 20, count 2 2006.229.11:10:59.20#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.11:10:59.20#ibcon#[25=AT07-05\r\n] 2006.229.11:10:59.20#ibcon#*before write, iclass 20, count 2 2006.229.11:10:59.20#ibcon#enter sib2, iclass 20, count 2 2006.229.11:10:59.20#ibcon#flushed, iclass 20, count 2 2006.229.11:10:59.20#ibcon#about to write, iclass 20, count 2 2006.229.11:10:59.20#ibcon#wrote, iclass 20, count 2 2006.229.11:10:59.20#ibcon#about to read 3, iclass 20, count 2 2006.229.11:10:59.23#ibcon#read 3, iclass 20, count 2 2006.229.11:10:59.23#ibcon#about to read 4, iclass 20, count 2 2006.229.11:10:59.23#ibcon#read 4, iclass 20, count 2 2006.229.11:10:59.23#ibcon#about to read 5, iclass 20, count 2 2006.229.11:10:59.23#ibcon#read 5, iclass 20, count 2 2006.229.11:10:59.23#ibcon#about to read 6, iclass 20, count 2 2006.229.11:10:59.23#ibcon#read 6, iclass 20, count 2 2006.229.11:10:59.23#ibcon#end of sib2, iclass 20, count 2 2006.229.11:10:59.23#ibcon#*after write, iclass 20, count 2 2006.229.11:10:59.23#ibcon#*before return 0, iclass 20, count 2 2006.229.11:10:59.23#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:10:59.23#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:10:59.23#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.11:10:59.23#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:59.23#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:10:59.35#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:10:59.35#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:10:59.35#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:10:59.35#ibcon#first serial, iclass 20, count 0 2006.229.11:10:59.35#ibcon#enter sib2, iclass 20, count 0 2006.229.11:10:59.35#ibcon#flushed, iclass 20, count 0 2006.229.11:10:59.35#ibcon#about to write, iclass 20, count 0 2006.229.11:10:59.35#ibcon#wrote, iclass 20, count 0 2006.229.11:10:59.35#ibcon#about to read 3, iclass 20, count 0 2006.229.11:10:59.37#ibcon#read 3, iclass 20, count 0 2006.229.11:10:59.37#ibcon#about to read 4, iclass 20, count 0 2006.229.11:10:59.37#ibcon#read 4, iclass 20, count 0 2006.229.11:10:59.37#ibcon#about to read 5, iclass 20, count 0 2006.229.11:10:59.37#ibcon#read 5, iclass 20, count 0 2006.229.11:10:59.37#ibcon#about to read 6, iclass 20, count 0 2006.229.11:10:59.37#ibcon#read 6, iclass 20, count 0 2006.229.11:10:59.37#ibcon#end of sib2, iclass 20, count 0 2006.229.11:10:59.37#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:10:59.37#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:10:59.37#ibcon#[25=USB\r\n] 2006.229.11:10:59.37#ibcon#*before write, iclass 20, count 0 2006.229.11:10:59.37#ibcon#enter sib2, iclass 20, count 0 2006.229.11:10:59.37#ibcon#flushed, iclass 20, count 0 2006.229.11:10:59.37#ibcon#about to write, iclass 20, count 0 2006.229.11:10:59.37#ibcon#wrote, iclass 20, count 0 2006.229.11:10:59.37#ibcon#about to read 3, iclass 20, count 0 2006.229.11:10:59.40#ibcon#read 3, iclass 20, count 0 2006.229.11:10:59.40#ibcon#about to read 4, iclass 20, count 0 2006.229.11:10:59.40#ibcon#read 4, iclass 20, count 0 2006.229.11:10:59.40#ibcon#about to read 5, iclass 20, count 0 2006.229.11:10:59.40#ibcon#read 5, iclass 20, count 0 2006.229.11:10:59.40#ibcon#about to read 6, iclass 20, count 0 2006.229.11:10:59.40#ibcon#read 6, iclass 20, count 0 2006.229.11:10:59.40#ibcon#end of sib2, iclass 20, count 0 2006.229.11:10:59.40#ibcon#*after write, iclass 20, count 0 2006.229.11:10:59.40#ibcon#*before return 0, iclass 20, count 0 2006.229.11:10:59.40#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:10:59.40#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:10:59.40#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:10:59.40#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:10:59.40$vck44/valo=8,884.99 2006.229.11:10:59.40#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.11:10:59.40#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.11:10:59.40#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:59.40#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:10:59.40#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:10:59.40#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:10:59.40#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:10:59.40#ibcon#first serial, iclass 22, count 0 2006.229.11:10:59.40#ibcon#enter sib2, iclass 22, count 0 2006.229.11:10:59.40#ibcon#flushed, iclass 22, count 0 2006.229.11:10:59.40#ibcon#about to write, iclass 22, count 0 2006.229.11:10:59.40#ibcon#wrote, iclass 22, count 0 2006.229.11:10:59.40#ibcon#about to read 3, iclass 22, count 0 2006.229.11:10:59.42#ibcon#read 3, iclass 22, count 0 2006.229.11:10:59.42#ibcon#about to read 4, iclass 22, count 0 2006.229.11:10:59.42#ibcon#read 4, iclass 22, count 0 2006.229.11:10:59.42#ibcon#about to read 5, iclass 22, count 0 2006.229.11:10:59.42#ibcon#read 5, iclass 22, count 0 2006.229.11:10:59.42#ibcon#about to read 6, iclass 22, count 0 2006.229.11:10:59.42#ibcon#read 6, iclass 22, count 0 2006.229.11:10:59.42#ibcon#end of sib2, iclass 22, count 0 2006.229.11:10:59.42#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:10:59.42#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:10:59.42#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:10:59.42#ibcon#*before write, iclass 22, count 0 2006.229.11:10:59.42#ibcon#enter sib2, iclass 22, count 0 2006.229.11:10:59.42#ibcon#flushed, iclass 22, count 0 2006.229.11:10:59.42#ibcon#about to write, iclass 22, count 0 2006.229.11:10:59.42#ibcon#wrote, iclass 22, count 0 2006.229.11:10:59.42#ibcon#about to read 3, iclass 22, count 0 2006.229.11:10:59.46#ibcon#read 3, iclass 22, count 0 2006.229.11:10:59.46#ibcon#about to read 4, iclass 22, count 0 2006.229.11:10:59.46#ibcon#read 4, iclass 22, count 0 2006.229.11:10:59.46#ibcon#about to read 5, iclass 22, count 0 2006.229.11:10:59.46#ibcon#read 5, iclass 22, count 0 2006.229.11:10:59.46#ibcon#about to read 6, iclass 22, count 0 2006.229.11:10:59.46#ibcon#read 6, iclass 22, count 0 2006.229.11:10:59.46#ibcon#end of sib2, iclass 22, count 0 2006.229.11:10:59.46#ibcon#*after write, iclass 22, count 0 2006.229.11:10:59.46#ibcon#*before return 0, iclass 22, count 0 2006.229.11:10:59.46#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:10:59.46#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:10:59.46#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:10:59.46#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:10:59.46$vck44/va=8,6 2006.229.11:10:59.46#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.11:10:59.46#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.11:10:59.46#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:59.46#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:10:59.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:10:59.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:10:59.52#ibcon#enter wrdev, iclass 24, count 2 2006.229.11:10:59.52#ibcon#first serial, iclass 24, count 2 2006.229.11:10:59.52#ibcon#enter sib2, iclass 24, count 2 2006.229.11:10:59.52#ibcon#flushed, iclass 24, count 2 2006.229.11:10:59.52#ibcon#about to write, iclass 24, count 2 2006.229.11:10:59.52#ibcon#wrote, iclass 24, count 2 2006.229.11:10:59.52#ibcon#about to read 3, iclass 24, count 2 2006.229.11:10:59.54#ibcon#read 3, iclass 24, count 2 2006.229.11:10:59.54#ibcon#about to read 4, iclass 24, count 2 2006.229.11:10:59.54#ibcon#read 4, iclass 24, count 2 2006.229.11:10:59.54#ibcon#about to read 5, iclass 24, count 2 2006.229.11:10:59.54#ibcon#read 5, iclass 24, count 2 2006.229.11:10:59.54#ibcon#about to read 6, iclass 24, count 2 2006.229.11:10:59.54#ibcon#read 6, iclass 24, count 2 2006.229.11:10:59.54#ibcon#end of sib2, iclass 24, count 2 2006.229.11:10:59.54#ibcon#*mode == 0, iclass 24, count 2 2006.229.11:10:59.54#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.11:10:59.54#ibcon#[25=AT08-06\r\n] 2006.229.11:10:59.54#ibcon#*before write, iclass 24, count 2 2006.229.11:10:59.54#ibcon#enter sib2, iclass 24, count 2 2006.229.11:10:59.54#ibcon#flushed, iclass 24, count 2 2006.229.11:10:59.54#ibcon#about to write, iclass 24, count 2 2006.229.11:10:59.54#ibcon#wrote, iclass 24, count 2 2006.229.11:10:59.54#ibcon#about to read 3, iclass 24, count 2 2006.229.11:10:59.57#ibcon#read 3, iclass 24, count 2 2006.229.11:10:59.57#ibcon#about to read 4, iclass 24, count 2 2006.229.11:10:59.57#ibcon#read 4, iclass 24, count 2 2006.229.11:10:59.57#ibcon#about to read 5, iclass 24, count 2 2006.229.11:10:59.57#ibcon#read 5, iclass 24, count 2 2006.229.11:10:59.57#ibcon#about to read 6, iclass 24, count 2 2006.229.11:10:59.57#ibcon#read 6, iclass 24, count 2 2006.229.11:10:59.57#ibcon#end of sib2, iclass 24, count 2 2006.229.11:10:59.57#ibcon#*after write, iclass 24, count 2 2006.229.11:10:59.57#ibcon#*before return 0, iclass 24, count 2 2006.229.11:10:59.57#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:10:59.57#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:10:59.57#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.11:10:59.57#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:59.57#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:10:59.69#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:10:59.69#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:10:59.69#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:10:59.69#ibcon#first serial, iclass 24, count 0 2006.229.11:10:59.69#ibcon#enter sib2, iclass 24, count 0 2006.229.11:10:59.69#ibcon#flushed, iclass 24, count 0 2006.229.11:10:59.69#ibcon#about to write, iclass 24, count 0 2006.229.11:10:59.69#ibcon#wrote, iclass 24, count 0 2006.229.11:10:59.69#ibcon#about to read 3, iclass 24, count 0 2006.229.11:10:59.71#ibcon#read 3, iclass 24, count 0 2006.229.11:10:59.71#ibcon#about to read 4, iclass 24, count 0 2006.229.11:10:59.71#ibcon#read 4, iclass 24, count 0 2006.229.11:10:59.71#ibcon#about to read 5, iclass 24, count 0 2006.229.11:10:59.71#ibcon#read 5, iclass 24, count 0 2006.229.11:10:59.71#ibcon#about to read 6, iclass 24, count 0 2006.229.11:10:59.71#ibcon#read 6, iclass 24, count 0 2006.229.11:10:59.71#ibcon#end of sib2, iclass 24, count 0 2006.229.11:10:59.71#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:10:59.71#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:10:59.71#ibcon#[25=USB\r\n] 2006.229.11:10:59.71#ibcon#*before write, iclass 24, count 0 2006.229.11:10:59.71#ibcon#enter sib2, iclass 24, count 0 2006.229.11:10:59.71#ibcon#flushed, iclass 24, count 0 2006.229.11:10:59.71#ibcon#about to write, iclass 24, count 0 2006.229.11:10:59.71#ibcon#wrote, iclass 24, count 0 2006.229.11:10:59.71#ibcon#about to read 3, iclass 24, count 0 2006.229.11:10:59.74#ibcon#read 3, iclass 24, count 0 2006.229.11:10:59.74#ibcon#about to read 4, iclass 24, count 0 2006.229.11:10:59.74#ibcon#read 4, iclass 24, count 0 2006.229.11:10:59.74#ibcon#about to read 5, iclass 24, count 0 2006.229.11:10:59.74#ibcon#read 5, iclass 24, count 0 2006.229.11:10:59.74#ibcon#about to read 6, iclass 24, count 0 2006.229.11:10:59.74#ibcon#read 6, iclass 24, count 0 2006.229.11:10:59.74#ibcon#end of sib2, iclass 24, count 0 2006.229.11:10:59.74#ibcon#*after write, iclass 24, count 0 2006.229.11:10:59.74#ibcon#*before return 0, iclass 24, count 0 2006.229.11:10:59.74#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:10:59.74#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:10:59.74#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:10:59.74#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:10:59.74$vck44/vblo=1,629.99 2006.229.11:10:59.74#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.11:10:59.74#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.11:10:59.74#ibcon#ireg 17 cls_cnt 0 2006.229.11:10:59.74#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:59.74#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:59.74#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:59.74#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:10:59.74#ibcon#first serial, iclass 26, count 0 2006.229.11:10:59.74#ibcon#enter sib2, iclass 26, count 0 2006.229.11:10:59.74#ibcon#flushed, iclass 26, count 0 2006.229.11:10:59.74#ibcon#about to write, iclass 26, count 0 2006.229.11:10:59.74#ibcon#wrote, iclass 26, count 0 2006.229.11:10:59.74#ibcon#about to read 3, iclass 26, count 0 2006.229.11:10:59.76#ibcon#read 3, iclass 26, count 0 2006.229.11:10:59.76#ibcon#about to read 4, iclass 26, count 0 2006.229.11:10:59.76#ibcon#read 4, iclass 26, count 0 2006.229.11:10:59.76#ibcon#about to read 5, iclass 26, count 0 2006.229.11:10:59.76#ibcon#read 5, iclass 26, count 0 2006.229.11:10:59.76#ibcon#about to read 6, iclass 26, count 0 2006.229.11:10:59.76#ibcon#read 6, iclass 26, count 0 2006.229.11:10:59.76#ibcon#end of sib2, iclass 26, count 0 2006.229.11:10:59.76#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:10:59.76#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:10:59.76#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:10:59.76#ibcon#*before write, iclass 26, count 0 2006.229.11:10:59.76#ibcon#enter sib2, iclass 26, count 0 2006.229.11:10:59.76#ibcon#flushed, iclass 26, count 0 2006.229.11:10:59.76#ibcon#about to write, iclass 26, count 0 2006.229.11:10:59.76#ibcon#wrote, iclass 26, count 0 2006.229.11:10:59.76#ibcon#about to read 3, iclass 26, count 0 2006.229.11:10:59.80#ibcon#read 3, iclass 26, count 0 2006.229.11:10:59.80#ibcon#about to read 4, iclass 26, count 0 2006.229.11:10:59.80#ibcon#read 4, iclass 26, count 0 2006.229.11:10:59.80#ibcon#about to read 5, iclass 26, count 0 2006.229.11:10:59.80#ibcon#read 5, iclass 26, count 0 2006.229.11:10:59.80#ibcon#about to read 6, iclass 26, count 0 2006.229.11:10:59.80#ibcon#read 6, iclass 26, count 0 2006.229.11:10:59.80#ibcon#end of sib2, iclass 26, count 0 2006.229.11:10:59.80#ibcon#*after write, iclass 26, count 0 2006.229.11:10:59.80#ibcon#*before return 0, iclass 26, count 0 2006.229.11:10:59.80#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:59.80#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:10:59.80#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:10:59.80#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:10:59.80$vck44/vb=1,4 2006.229.11:10:59.80#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.11:10:59.80#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.11:10:59.80#ibcon#ireg 11 cls_cnt 2 2006.229.11:10:59.80#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:59.80#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:59.80#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:59.80#ibcon#enter wrdev, iclass 28, count 2 2006.229.11:10:59.80#ibcon#first serial, iclass 28, count 2 2006.229.11:10:59.80#ibcon#enter sib2, iclass 28, count 2 2006.229.11:10:59.80#ibcon#flushed, iclass 28, count 2 2006.229.11:10:59.80#ibcon#about to write, iclass 28, count 2 2006.229.11:10:59.80#ibcon#wrote, iclass 28, count 2 2006.229.11:10:59.80#ibcon#about to read 3, iclass 28, count 2 2006.229.11:10:59.82#ibcon#read 3, iclass 28, count 2 2006.229.11:10:59.82#ibcon#about to read 4, iclass 28, count 2 2006.229.11:10:59.82#ibcon#read 4, iclass 28, count 2 2006.229.11:10:59.82#ibcon#about to read 5, iclass 28, count 2 2006.229.11:10:59.82#ibcon#read 5, iclass 28, count 2 2006.229.11:10:59.82#ibcon#about to read 6, iclass 28, count 2 2006.229.11:10:59.82#ibcon#read 6, iclass 28, count 2 2006.229.11:10:59.82#ibcon#end of sib2, iclass 28, count 2 2006.229.11:10:59.82#ibcon#*mode == 0, iclass 28, count 2 2006.229.11:10:59.82#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.11:10:59.82#ibcon#[27=AT01-04\r\n] 2006.229.11:10:59.82#ibcon#*before write, iclass 28, count 2 2006.229.11:10:59.82#ibcon#enter sib2, iclass 28, count 2 2006.229.11:10:59.82#ibcon#flushed, iclass 28, count 2 2006.229.11:10:59.82#ibcon#about to write, iclass 28, count 2 2006.229.11:10:59.82#ibcon#wrote, iclass 28, count 2 2006.229.11:10:59.82#ibcon#about to read 3, iclass 28, count 2 2006.229.11:10:59.85#ibcon#read 3, iclass 28, count 2 2006.229.11:10:59.85#ibcon#about to read 4, iclass 28, count 2 2006.229.11:10:59.85#ibcon#read 4, iclass 28, count 2 2006.229.11:10:59.85#ibcon#about to read 5, iclass 28, count 2 2006.229.11:10:59.85#ibcon#read 5, iclass 28, count 2 2006.229.11:10:59.85#ibcon#about to read 6, iclass 28, count 2 2006.229.11:10:59.85#ibcon#read 6, iclass 28, count 2 2006.229.11:10:59.85#ibcon#end of sib2, iclass 28, count 2 2006.229.11:10:59.85#ibcon#*after write, iclass 28, count 2 2006.229.11:10:59.85#ibcon#*before return 0, iclass 28, count 2 2006.229.11:10:59.85#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:59.85#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:10:59.85#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.11:10:59.85#ibcon#ireg 7 cls_cnt 0 2006.229.11:10:59.85#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:59.97#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:59.97#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:10:59.97#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:10:59.97#ibcon#first serial, iclass 28, count 0 2006.229.11:10:59.97#ibcon#enter sib2, iclass 28, count 0 2006.229.11:10:59.97#ibcon#flushed, iclass 28, count 0 2006.229.11:10:59.97#ibcon#about to write, iclass 28, count 0 2006.229.11:10:59.97#ibcon#wrote, iclass 28, count 0 2006.229.11:10:59.97#ibcon#about to read 3, iclass 28, count 0 2006.229.11:10:59.99#ibcon#read 3, iclass 28, count 0 2006.229.11:10:59.99#ibcon#about to read 4, iclass 28, count 0 2006.229.11:10:59.99#ibcon#read 4, iclass 28, count 0 2006.229.11:10:59.99#ibcon#about to read 5, iclass 28, count 0 2006.229.11:10:59.99#ibcon#read 5, iclass 28, count 0 2006.229.11:10:59.99#ibcon#about to read 6, iclass 28, count 0 2006.229.11:10:59.99#ibcon#read 6, iclass 28, count 0 2006.229.11:10:59.99#ibcon#end of sib2, iclass 28, count 0 2006.229.11:10:59.99#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:10:59.99#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:10:59.99#ibcon#[27=USB\r\n] 2006.229.11:10:59.99#ibcon#*before write, iclass 28, count 0 2006.229.11:10:59.99#ibcon#enter sib2, iclass 28, count 0 2006.229.11:10:59.99#ibcon#flushed, iclass 28, count 0 2006.229.11:10:59.99#ibcon#about to write, iclass 28, count 0 2006.229.11:10:59.99#ibcon#wrote, iclass 28, count 0 2006.229.11:10:59.99#ibcon#about to read 3, iclass 28, count 0 2006.229.11:11:00.02#ibcon#read 3, iclass 28, count 0 2006.229.11:11:00.02#ibcon#about to read 4, iclass 28, count 0 2006.229.11:11:00.02#ibcon#read 4, iclass 28, count 0 2006.229.11:11:00.02#ibcon#about to read 5, iclass 28, count 0 2006.229.11:11:00.02#ibcon#read 5, iclass 28, count 0 2006.229.11:11:00.02#ibcon#about to read 6, iclass 28, count 0 2006.229.11:11:00.02#ibcon#read 6, iclass 28, count 0 2006.229.11:11:00.02#ibcon#end of sib2, iclass 28, count 0 2006.229.11:11:00.02#ibcon#*after write, iclass 28, count 0 2006.229.11:11:00.02#ibcon#*before return 0, iclass 28, count 0 2006.229.11:11:00.02#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:11:00.02#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:11:00.02#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:11:00.02#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:11:00.02$vck44/vblo=2,634.99 2006.229.11:11:00.02#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.11:11:00.02#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.11:11:00.02#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:00.02#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:11:00.02#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:11:00.02#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:11:00.02#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:11:00.02#ibcon#first serial, iclass 30, count 0 2006.229.11:11:00.02#ibcon#enter sib2, iclass 30, count 0 2006.229.11:11:00.02#ibcon#flushed, iclass 30, count 0 2006.229.11:11:00.02#ibcon#about to write, iclass 30, count 0 2006.229.11:11:00.02#ibcon#wrote, iclass 30, count 0 2006.229.11:11:00.02#ibcon#about to read 3, iclass 30, count 0 2006.229.11:11:00.04#ibcon#read 3, iclass 30, count 0 2006.229.11:11:00.04#ibcon#about to read 4, iclass 30, count 0 2006.229.11:11:00.04#ibcon#read 4, iclass 30, count 0 2006.229.11:11:00.04#ibcon#about to read 5, iclass 30, count 0 2006.229.11:11:00.04#ibcon#read 5, iclass 30, count 0 2006.229.11:11:00.04#ibcon#about to read 6, iclass 30, count 0 2006.229.11:11:00.04#ibcon#read 6, iclass 30, count 0 2006.229.11:11:00.04#ibcon#end of sib2, iclass 30, count 0 2006.229.11:11:00.04#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:11:00.04#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:11:00.04#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:11:00.04#ibcon#*before write, iclass 30, count 0 2006.229.11:11:00.04#ibcon#enter sib2, iclass 30, count 0 2006.229.11:11:00.04#ibcon#flushed, iclass 30, count 0 2006.229.11:11:00.04#ibcon#about to write, iclass 30, count 0 2006.229.11:11:00.04#ibcon#wrote, iclass 30, count 0 2006.229.11:11:00.04#ibcon#about to read 3, iclass 30, count 0 2006.229.11:11:00.08#ibcon#read 3, iclass 30, count 0 2006.229.11:11:00.08#ibcon#about to read 4, iclass 30, count 0 2006.229.11:11:00.08#ibcon#read 4, iclass 30, count 0 2006.229.11:11:00.08#ibcon#about to read 5, iclass 30, count 0 2006.229.11:11:00.08#ibcon#read 5, iclass 30, count 0 2006.229.11:11:00.08#ibcon#about to read 6, iclass 30, count 0 2006.229.11:11:00.08#ibcon#read 6, iclass 30, count 0 2006.229.11:11:00.08#ibcon#end of sib2, iclass 30, count 0 2006.229.11:11:00.08#ibcon#*after write, iclass 30, count 0 2006.229.11:11:00.08#ibcon#*before return 0, iclass 30, count 0 2006.229.11:11:00.08#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:11:00.08#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:11:00.08#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:11:00.08#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:11:00.08$vck44/vb=2,4 2006.229.11:11:00.08#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.11:11:00.08#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.11:11:00.08#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:00.08#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:11:00.14#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:11:00.14#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:11:00.14#ibcon#enter wrdev, iclass 32, count 2 2006.229.11:11:00.14#ibcon#first serial, iclass 32, count 2 2006.229.11:11:00.14#ibcon#enter sib2, iclass 32, count 2 2006.229.11:11:00.14#ibcon#flushed, iclass 32, count 2 2006.229.11:11:00.14#ibcon#about to write, iclass 32, count 2 2006.229.11:11:00.14#ibcon#wrote, iclass 32, count 2 2006.229.11:11:00.14#ibcon#about to read 3, iclass 32, count 2 2006.229.11:11:00.16#ibcon#read 3, iclass 32, count 2 2006.229.11:11:00.16#ibcon#about to read 4, iclass 32, count 2 2006.229.11:11:00.16#ibcon#read 4, iclass 32, count 2 2006.229.11:11:00.16#ibcon#about to read 5, iclass 32, count 2 2006.229.11:11:00.16#ibcon#read 5, iclass 32, count 2 2006.229.11:11:00.16#ibcon#about to read 6, iclass 32, count 2 2006.229.11:11:00.16#ibcon#read 6, iclass 32, count 2 2006.229.11:11:00.16#ibcon#end of sib2, iclass 32, count 2 2006.229.11:11:00.16#ibcon#*mode == 0, iclass 32, count 2 2006.229.11:11:00.16#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.11:11:00.16#ibcon#[27=AT02-04\r\n] 2006.229.11:11:00.16#ibcon#*before write, iclass 32, count 2 2006.229.11:11:00.16#ibcon#enter sib2, iclass 32, count 2 2006.229.11:11:00.16#ibcon#flushed, iclass 32, count 2 2006.229.11:11:00.16#ibcon#about to write, iclass 32, count 2 2006.229.11:11:00.16#ibcon#wrote, iclass 32, count 2 2006.229.11:11:00.16#ibcon#about to read 3, iclass 32, count 2 2006.229.11:11:00.19#ibcon#read 3, iclass 32, count 2 2006.229.11:11:00.19#ibcon#about to read 4, iclass 32, count 2 2006.229.11:11:00.19#ibcon#read 4, iclass 32, count 2 2006.229.11:11:00.19#ibcon#about to read 5, iclass 32, count 2 2006.229.11:11:00.19#ibcon#read 5, iclass 32, count 2 2006.229.11:11:00.19#ibcon#about to read 6, iclass 32, count 2 2006.229.11:11:00.19#ibcon#read 6, iclass 32, count 2 2006.229.11:11:00.19#ibcon#end of sib2, iclass 32, count 2 2006.229.11:11:00.19#ibcon#*after write, iclass 32, count 2 2006.229.11:11:00.19#ibcon#*before return 0, iclass 32, count 2 2006.229.11:11:00.19#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:11:00.19#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:11:00.19#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.11:11:00.19#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:00.19#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:11:00.31#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:11:00.31#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:11:00.31#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:11:00.31#ibcon#first serial, iclass 32, count 0 2006.229.11:11:00.31#ibcon#enter sib2, iclass 32, count 0 2006.229.11:11:00.31#ibcon#flushed, iclass 32, count 0 2006.229.11:11:00.31#ibcon#about to write, iclass 32, count 0 2006.229.11:11:00.31#ibcon#wrote, iclass 32, count 0 2006.229.11:11:00.31#ibcon#about to read 3, iclass 32, count 0 2006.229.11:11:00.33#ibcon#read 3, iclass 32, count 0 2006.229.11:11:00.33#ibcon#about to read 4, iclass 32, count 0 2006.229.11:11:00.33#ibcon#read 4, iclass 32, count 0 2006.229.11:11:00.33#ibcon#about to read 5, iclass 32, count 0 2006.229.11:11:00.33#ibcon#read 5, iclass 32, count 0 2006.229.11:11:00.33#ibcon#about to read 6, iclass 32, count 0 2006.229.11:11:00.33#ibcon#read 6, iclass 32, count 0 2006.229.11:11:00.33#ibcon#end of sib2, iclass 32, count 0 2006.229.11:11:00.33#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:11:00.33#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:11:00.33#ibcon#[27=USB\r\n] 2006.229.11:11:00.33#ibcon#*before write, iclass 32, count 0 2006.229.11:11:00.33#ibcon#enter sib2, iclass 32, count 0 2006.229.11:11:00.33#ibcon#flushed, iclass 32, count 0 2006.229.11:11:00.33#ibcon#about to write, iclass 32, count 0 2006.229.11:11:00.33#ibcon#wrote, iclass 32, count 0 2006.229.11:11:00.33#ibcon#about to read 3, iclass 32, count 0 2006.229.11:11:00.36#ibcon#read 3, iclass 32, count 0 2006.229.11:11:00.36#ibcon#about to read 4, iclass 32, count 0 2006.229.11:11:00.36#ibcon#read 4, iclass 32, count 0 2006.229.11:11:00.36#ibcon#about to read 5, iclass 32, count 0 2006.229.11:11:00.36#ibcon#read 5, iclass 32, count 0 2006.229.11:11:00.36#ibcon#about to read 6, iclass 32, count 0 2006.229.11:11:00.36#ibcon#read 6, iclass 32, count 0 2006.229.11:11:00.36#ibcon#end of sib2, iclass 32, count 0 2006.229.11:11:00.36#ibcon#*after write, iclass 32, count 0 2006.229.11:11:00.36#ibcon#*before return 0, iclass 32, count 0 2006.229.11:11:00.36#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:11:00.36#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:11:00.36#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:11:00.36#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:11:00.36$vck44/vblo=3,649.99 2006.229.11:11:00.36#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.11:11:00.36#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.11:11:00.36#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:00.36#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:11:00.36#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:11:00.36#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:11:00.36#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:11:00.36#ibcon#first serial, iclass 34, count 0 2006.229.11:11:00.36#ibcon#enter sib2, iclass 34, count 0 2006.229.11:11:00.36#ibcon#flushed, iclass 34, count 0 2006.229.11:11:00.36#ibcon#about to write, iclass 34, count 0 2006.229.11:11:00.36#ibcon#wrote, iclass 34, count 0 2006.229.11:11:00.36#ibcon#about to read 3, iclass 34, count 0 2006.229.11:11:00.38#ibcon#read 3, iclass 34, count 0 2006.229.11:11:00.38#ibcon#about to read 4, iclass 34, count 0 2006.229.11:11:00.38#ibcon#read 4, iclass 34, count 0 2006.229.11:11:00.38#ibcon#about to read 5, iclass 34, count 0 2006.229.11:11:00.38#ibcon#read 5, iclass 34, count 0 2006.229.11:11:00.38#ibcon#about to read 6, iclass 34, count 0 2006.229.11:11:00.38#ibcon#read 6, iclass 34, count 0 2006.229.11:11:00.38#ibcon#end of sib2, iclass 34, count 0 2006.229.11:11:00.38#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:11:00.38#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:11:00.38#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:11:00.38#ibcon#*before write, iclass 34, count 0 2006.229.11:11:00.38#ibcon#enter sib2, iclass 34, count 0 2006.229.11:11:00.38#ibcon#flushed, iclass 34, count 0 2006.229.11:11:00.38#ibcon#about to write, iclass 34, count 0 2006.229.11:11:00.38#ibcon#wrote, iclass 34, count 0 2006.229.11:11:00.38#ibcon#about to read 3, iclass 34, count 0 2006.229.11:11:00.42#ibcon#read 3, iclass 34, count 0 2006.229.11:11:00.42#ibcon#about to read 4, iclass 34, count 0 2006.229.11:11:00.42#ibcon#read 4, iclass 34, count 0 2006.229.11:11:00.42#ibcon#about to read 5, iclass 34, count 0 2006.229.11:11:00.42#ibcon#read 5, iclass 34, count 0 2006.229.11:11:00.42#ibcon#about to read 6, iclass 34, count 0 2006.229.11:11:00.42#ibcon#read 6, iclass 34, count 0 2006.229.11:11:00.42#ibcon#end of sib2, iclass 34, count 0 2006.229.11:11:00.42#ibcon#*after write, iclass 34, count 0 2006.229.11:11:00.42#ibcon#*before return 0, iclass 34, count 0 2006.229.11:11:00.42#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:11:00.42#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:11:00.42#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:11:00.42#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:11:00.42$vck44/vb=3,4 2006.229.11:11:00.42#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.11:11:00.42#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.11:11:00.42#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:00.42#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:11:00.48#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:11:00.48#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:11:00.48#ibcon#enter wrdev, iclass 36, count 2 2006.229.11:11:00.48#ibcon#first serial, iclass 36, count 2 2006.229.11:11:00.48#ibcon#enter sib2, iclass 36, count 2 2006.229.11:11:00.48#ibcon#flushed, iclass 36, count 2 2006.229.11:11:00.48#ibcon#about to write, iclass 36, count 2 2006.229.11:11:00.48#ibcon#wrote, iclass 36, count 2 2006.229.11:11:00.48#ibcon#about to read 3, iclass 36, count 2 2006.229.11:11:00.50#ibcon#read 3, iclass 36, count 2 2006.229.11:11:00.50#ibcon#about to read 4, iclass 36, count 2 2006.229.11:11:00.50#ibcon#read 4, iclass 36, count 2 2006.229.11:11:00.50#ibcon#about to read 5, iclass 36, count 2 2006.229.11:11:00.50#ibcon#read 5, iclass 36, count 2 2006.229.11:11:00.50#ibcon#about to read 6, iclass 36, count 2 2006.229.11:11:00.50#ibcon#read 6, iclass 36, count 2 2006.229.11:11:00.50#ibcon#end of sib2, iclass 36, count 2 2006.229.11:11:00.50#ibcon#*mode == 0, iclass 36, count 2 2006.229.11:11:00.50#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.11:11:00.50#ibcon#[27=AT03-04\r\n] 2006.229.11:11:00.50#ibcon#*before write, iclass 36, count 2 2006.229.11:11:00.50#ibcon#enter sib2, iclass 36, count 2 2006.229.11:11:00.50#ibcon#flushed, iclass 36, count 2 2006.229.11:11:00.50#ibcon#about to write, iclass 36, count 2 2006.229.11:11:00.50#ibcon#wrote, iclass 36, count 2 2006.229.11:11:00.50#ibcon#about to read 3, iclass 36, count 2 2006.229.11:11:00.53#ibcon#read 3, iclass 36, count 2 2006.229.11:11:00.53#ibcon#about to read 4, iclass 36, count 2 2006.229.11:11:00.53#ibcon#read 4, iclass 36, count 2 2006.229.11:11:00.53#ibcon#about to read 5, iclass 36, count 2 2006.229.11:11:00.53#ibcon#read 5, iclass 36, count 2 2006.229.11:11:00.53#ibcon#about to read 6, iclass 36, count 2 2006.229.11:11:00.53#ibcon#read 6, iclass 36, count 2 2006.229.11:11:00.53#ibcon#end of sib2, iclass 36, count 2 2006.229.11:11:00.53#ibcon#*after write, iclass 36, count 2 2006.229.11:11:00.53#ibcon#*before return 0, iclass 36, count 2 2006.229.11:11:00.53#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:11:00.53#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:11:00.53#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.11:11:00.53#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:00.53#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:11:00.65#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:11:00.65#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:11:00.65#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:11:00.65#ibcon#first serial, iclass 36, count 0 2006.229.11:11:00.65#ibcon#enter sib2, iclass 36, count 0 2006.229.11:11:00.65#ibcon#flushed, iclass 36, count 0 2006.229.11:11:00.65#ibcon#about to write, iclass 36, count 0 2006.229.11:11:00.65#ibcon#wrote, iclass 36, count 0 2006.229.11:11:00.65#ibcon#about to read 3, iclass 36, count 0 2006.229.11:11:00.67#ibcon#read 3, iclass 36, count 0 2006.229.11:11:00.67#ibcon#about to read 4, iclass 36, count 0 2006.229.11:11:00.67#ibcon#read 4, iclass 36, count 0 2006.229.11:11:00.67#ibcon#about to read 5, iclass 36, count 0 2006.229.11:11:00.67#ibcon#read 5, iclass 36, count 0 2006.229.11:11:00.67#ibcon#about to read 6, iclass 36, count 0 2006.229.11:11:00.67#ibcon#read 6, iclass 36, count 0 2006.229.11:11:00.67#ibcon#end of sib2, iclass 36, count 0 2006.229.11:11:00.67#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:11:00.67#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:11:00.67#ibcon#[27=USB\r\n] 2006.229.11:11:00.67#ibcon#*before write, iclass 36, count 0 2006.229.11:11:00.67#ibcon#enter sib2, iclass 36, count 0 2006.229.11:11:00.67#ibcon#flushed, iclass 36, count 0 2006.229.11:11:00.67#ibcon#about to write, iclass 36, count 0 2006.229.11:11:00.67#ibcon#wrote, iclass 36, count 0 2006.229.11:11:00.67#ibcon#about to read 3, iclass 36, count 0 2006.229.11:11:00.70#ibcon#read 3, iclass 36, count 0 2006.229.11:11:00.70#ibcon#about to read 4, iclass 36, count 0 2006.229.11:11:00.70#ibcon#read 4, iclass 36, count 0 2006.229.11:11:00.70#ibcon#about to read 5, iclass 36, count 0 2006.229.11:11:00.70#ibcon#read 5, iclass 36, count 0 2006.229.11:11:00.70#ibcon#about to read 6, iclass 36, count 0 2006.229.11:11:00.70#ibcon#read 6, iclass 36, count 0 2006.229.11:11:00.70#ibcon#end of sib2, iclass 36, count 0 2006.229.11:11:00.70#ibcon#*after write, iclass 36, count 0 2006.229.11:11:00.70#ibcon#*before return 0, iclass 36, count 0 2006.229.11:11:00.70#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:11:00.70#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:11:00.70#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:11:00.70#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:11:00.70$vck44/vblo=4,679.99 2006.229.11:11:00.70#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.11:11:00.70#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.11:11:00.70#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:00.70#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:11:00.70#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:11:00.70#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:11:00.70#ibcon#enter wrdev, iclass 38, count 0 2006.229.11:11:00.70#ibcon#first serial, iclass 38, count 0 2006.229.11:11:00.70#ibcon#enter sib2, iclass 38, count 0 2006.229.11:11:00.70#ibcon#flushed, iclass 38, count 0 2006.229.11:11:00.70#ibcon#about to write, iclass 38, count 0 2006.229.11:11:00.70#ibcon#wrote, iclass 38, count 0 2006.229.11:11:00.70#ibcon#about to read 3, iclass 38, count 0 2006.229.11:11:00.72#ibcon#read 3, iclass 38, count 0 2006.229.11:11:00.72#ibcon#about to read 4, iclass 38, count 0 2006.229.11:11:00.72#ibcon#read 4, iclass 38, count 0 2006.229.11:11:00.72#ibcon#about to read 5, iclass 38, count 0 2006.229.11:11:00.72#ibcon#read 5, iclass 38, count 0 2006.229.11:11:00.72#ibcon#about to read 6, iclass 38, count 0 2006.229.11:11:00.72#ibcon#read 6, iclass 38, count 0 2006.229.11:11:00.72#ibcon#end of sib2, iclass 38, count 0 2006.229.11:11:00.72#ibcon#*mode == 0, iclass 38, count 0 2006.229.11:11:00.72#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.11:11:00.72#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:11:00.72#ibcon#*before write, iclass 38, count 0 2006.229.11:11:00.72#ibcon#enter sib2, iclass 38, count 0 2006.229.11:11:00.72#ibcon#flushed, iclass 38, count 0 2006.229.11:11:00.72#ibcon#about to write, iclass 38, count 0 2006.229.11:11:00.72#ibcon#wrote, iclass 38, count 0 2006.229.11:11:00.72#ibcon#about to read 3, iclass 38, count 0 2006.229.11:11:00.76#ibcon#read 3, iclass 38, count 0 2006.229.11:11:00.76#ibcon#about to read 4, iclass 38, count 0 2006.229.11:11:00.76#ibcon#read 4, iclass 38, count 0 2006.229.11:11:00.76#ibcon#about to read 5, iclass 38, count 0 2006.229.11:11:00.76#ibcon#read 5, iclass 38, count 0 2006.229.11:11:00.76#ibcon#about to read 6, iclass 38, count 0 2006.229.11:11:00.76#ibcon#read 6, iclass 38, count 0 2006.229.11:11:00.76#ibcon#end of sib2, iclass 38, count 0 2006.229.11:11:00.76#ibcon#*after write, iclass 38, count 0 2006.229.11:11:00.76#ibcon#*before return 0, iclass 38, count 0 2006.229.11:11:00.76#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:11:00.76#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:11:00.76#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.11:11:00.76#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.11:11:00.76$vck44/vb=4,4 2006.229.11:11:00.76#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.11:11:00.76#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.11:11:00.76#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:00.76#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:11:00.82#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:11:00.82#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:11:00.82#ibcon#enter wrdev, iclass 40, count 2 2006.229.11:11:00.82#ibcon#first serial, iclass 40, count 2 2006.229.11:11:00.82#ibcon#enter sib2, iclass 40, count 2 2006.229.11:11:00.82#ibcon#flushed, iclass 40, count 2 2006.229.11:11:00.82#ibcon#about to write, iclass 40, count 2 2006.229.11:11:00.82#ibcon#wrote, iclass 40, count 2 2006.229.11:11:00.82#ibcon#about to read 3, iclass 40, count 2 2006.229.11:11:00.84#ibcon#read 3, iclass 40, count 2 2006.229.11:11:00.84#ibcon#about to read 4, iclass 40, count 2 2006.229.11:11:00.84#ibcon#read 4, iclass 40, count 2 2006.229.11:11:00.84#ibcon#about to read 5, iclass 40, count 2 2006.229.11:11:00.84#ibcon#read 5, iclass 40, count 2 2006.229.11:11:00.84#ibcon#about to read 6, iclass 40, count 2 2006.229.11:11:00.84#ibcon#read 6, iclass 40, count 2 2006.229.11:11:00.84#ibcon#end of sib2, iclass 40, count 2 2006.229.11:11:00.84#ibcon#*mode == 0, iclass 40, count 2 2006.229.11:11:00.84#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.11:11:00.84#ibcon#[27=AT04-04\r\n] 2006.229.11:11:00.84#ibcon#*before write, iclass 40, count 2 2006.229.11:11:00.84#ibcon#enter sib2, iclass 40, count 2 2006.229.11:11:00.84#ibcon#flushed, iclass 40, count 2 2006.229.11:11:00.84#ibcon#about to write, iclass 40, count 2 2006.229.11:11:00.84#ibcon#wrote, iclass 40, count 2 2006.229.11:11:00.84#ibcon#about to read 3, iclass 40, count 2 2006.229.11:11:00.87#ibcon#read 3, iclass 40, count 2 2006.229.11:11:00.87#ibcon#about to read 4, iclass 40, count 2 2006.229.11:11:00.87#ibcon#read 4, iclass 40, count 2 2006.229.11:11:00.87#ibcon#about to read 5, iclass 40, count 2 2006.229.11:11:00.87#ibcon#read 5, iclass 40, count 2 2006.229.11:11:00.87#ibcon#about to read 6, iclass 40, count 2 2006.229.11:11:00.87#ibcon#read 6, iclass 40, count 2 2006.229.11:11:00.87#ibcon#end of sib2, iclass 40, count 2 2006.229.11:11:00.87#ibcon#*after write, iclass 40, count 2 2006.229.11:11:00.87#ibcon#*before return 0, iclass 40, count 2 2006.229.11:11:00.87#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:11:00.87#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:11:00.87#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.11:11:00.87#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:00.87#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:11:00.99#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:11:00.99#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:11:00.99#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:11:00.99#ibcon#first serial, iclass 40, count 0 2006.229.11:11:00.99#ibcon#enter sib2, iclass 40, count 0 2006.229.11:11:00.99#ibcon#flushed, iclass 40, count 0 2006.229.11:11:00.99#ibcon#about to write, iclass 40, count 0 2006.229.11:11:00.99#ibcon#wrote, iclass 40, count 0 2006.229.11:11:00.99#ibcon#about to read 3, iclass 40, count 0 2006.229.11:11:01.01#ibcon#read 3, iclass 40, count 0 2006.229.11:11:01.01#ibcon#about to read 4, iclass 40, count 0 2006.229.11:11:01.01#ibcon#read 4, iclass 40, count 0 2006.229.11:11:01.01#ibcon#about to read 5, iclass 40, count 0 2006.229.11:11:01.01#ibcon#read 5, iclass 40, count 0 2006.229.11:11:01.01#ibcon#about to read 6, iclass 40, count 0 2006.229.11:11:01.01#ibcon#read 6, iclass 40, count 0 2006.229.11:11:01.01#ibcon#end of sib2, iclass 40, count 0 2006.229.11:11:01.01#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:11:01.01#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:11:01.01#ibcon#[27=USB\r\n] 2006.229.11:11:01.01#ibcon#*before write, iclass 40, count 0 2006.229.11:11:01.01#ibcon#enter sib2, iclass 40, count 0 2006.229.11:11:01.01#ibcon#flushed, iclass 40, count 0 2006.229.11:11:01.01#ibcon#about to write, iclass 40, count 0 2006.229.11:11:01.01#ibcon#wrote, iclass 40, count 0 2006.229.11:11:01.01#ibcon#about to read 3, iclass 40, count 0 2006.229.11:11:01.04#ibcon#read 3, iclass 40, count 0 2006.229.11:11:01.04#ibcon#about to read 4, iclass 40, count 0 2006.229.11:11:01.04#ibcon#read 4, iclass 40, count 0 2006.229.11:11:01.04#ibcon#about to read 5, iclass 40, count 0 2006.229.11:11:01.04#ibcon#read 5, iclass 40, count 0 2006.229.11:11:01.04#ibcon#about to read 6, iclass 40, count 0 2006.229.11:11:01.04#ibcon#read 6, iclass 40, count 0 2006.229.11:11:01.04#ibcon#end of sib2, iclass 40, count 0 2006.229.11:11:01.04#ibcon#*after write, iclass 40, count 0 2006.229.11:11:01.04#ibcon#*before return 0, iclass 40, count 0 2006.229.11:11:01.04#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:11:01.04#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:11:01.04#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:11:01.04#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:11:01.04$vck44/vblo=5,709.99 2006.229.11:11:01.04#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.11:11:01.04#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.11:11:01.04#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:01.04#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:11:01.04#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:11:01.04#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:11:01.04#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:11:01.04#ibcon#first serial, iclass 4, count 0 2006.229.11:11:01.04#ibcon#enter sib2, iclass 4, count 0 2006.229.11:11:01.04#ibcon#flushed, iclass 4, count 0 2006.229.11:11:01.04#ibcon#about to write, iclass 4, count 0 2006.229.11:11:01.04#ibcon#wrote, iclass 4, count 0 2006.229.11:11:01.04#ibcon#about to read 3, iclass 4, count 0 2006.229.11:11:01.06#ibcon#read 3, iclass 4, count 0 2006.229.11:11:01.06#ibcon#about to read 4, iclass 4, count 0 2006.229.11:11:01.06#ibcon#read 4, iclass 4, count 0 2006.229.11:11:01.06#ibcon#about to read 5, iclass 4, count 0 2006.229.11:11:01.06#ibcon#read 5, iclass 4, count 0 2006.229.11:11:01.06#ibcon#about to read 6, iclass 4, count 0 2006.229.11:11:01.06#ibcon#read 6, iclass 4, count 0 2006.229.11:11:01.06#ibcon#end of sib2, iclass 4, count 0 2006.229.11:11:01.06#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:11:01.06#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:11:01.06#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:11:01.06#ibcon#*before write, iclass 4, count 0 2006.229.11:11:01.06#ibcon#enter sib2, iclass 4, count 0 2006.229.11:11:01.06#ibcon#flushed, iclass 4, count 0 2006.229.11:11:01.06#ibcon#about to write, iclass 4, count 0 2006.229.11:11:01.06#ibcon#wrote, iclass 4, count 0 2006.229.11:11:01.06#ibcon#about to read 3, iclass 4, count 0 2006.229.11:11:01.10#ibcon#read 3, iclass 4, count 0 2006.229.11:11:01.10#ibcon#about to read 4, iclass 4, count 0 2006.229.11:11:01.10#ibcon#read 4, iclass 4, count 0 2006.229.11:11:01.10#ibcon#about to read 5, iclass 4, count 0 2006.229.11:11:01.10#ibcon#read 5, iclass 4, count 0 2006.229.11:11:01.10#ibcon#about to read 6, iclass 4, count 0 2006.229.11:11:01.10#ibcon#read 6, iclass 4, count 0 2006.229.11:11:01.10#ibcon#end of sib2, iclass 4, count 0 2006.229.11:11:01.10#ibcon#*after write, iclass 4, count 0 2006.229.11:11:01.10#ibcon#*before return 0, iclass 4, count 0 2006.229.11:11:01.10#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:11:01.10#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:11:01.10#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:11:01.10#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:11:01.10$vck44/vb=5,4 2006.229.11:11:01.10#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.11:11:01.10#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.11:11:01.10#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:01.10#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:11:01.16#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:11:01.16#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:11:01.16#ibcon#enter wrdev, iclass 6, count 2 2006.229.11:11:01.16#ibcon#first serial, iclass 6, count 2 2006.229.11:11:01.16#ibcon#enter sib2, iclass 6, count 2 2006.229.11:11:01.16#ibcon#flushed, iclass 6, count 2 2006.229.11:11:01.16#ibcon#about to write, iclass 6, count 2 2006.229.11:11:01.16#ibcon#wrote, iclass 6, count 2 2006.229.11:11:01.16#ibcon#about to read 3, iclass 6, count 2 2006.229.11:11:01.18#ibcon#read 3, iclass 6, count 2 2006.229.11:11:01.18#ibcon#about to read 4, iclass 6, count 2 2006.229.11:11:01.18#ibcon#read 4, iclass 6, count 2 2006.229.11:11:01.18#ibcon#about to read 5, iclass 6, count 2 2006.229.11:11:01.18#ibcon#read 5, iclass 6, count 2 2006.229.11:11:01.18#ibcon#about to read 6, iclass 6, count 2 2006.229.11:11:01.18#ibcon#read 6, iclass 6, count 2 2006.229.11:11:01.18#ibcon#end of sib2, iclass 6, count 2 2006.229.11:11:01.18#ibcon#*mode == 0, iclass 6, count 2 2006.229.11:11:01.18#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.11:11:01.18#ibcon#[27=AT05-04\r\n] 2006.229.11:11:01.18#ibcon#*before write, iclass 6, count 2 2006.229.11:11:01.18#ibcon#enter sib2, iclass 6, count 2 2006.229.11:11:01.18#ibcon#flushed, iclass 6, count 2 2006.229.11:11:01.18#ibcon#about to write, iclass 6, count 2 2006.229.11:11:01.18#ibcon#wrote, iclass 6, count 2 2006.229.11:11:01.18#ibcon#about to read 3, iclass 6, count 2 2006.229.11:11:01.21#ibcon#read 3, iclass 6, count 2 2006.229.11:11:01.21#ibcon#about to read 4, iclass 6, count 2 2006.229.11:11:01.21#ibcon#read 4, iclass 6, count 2 2006.229.11:11:01.21#ibcon#about to read 5, iclass 6, count 2 2006.229.11:11:01.21#ibcon#read 5, iclass 6, count 2 2006.229.11:11:01.21#ibcon#about to read 6, iclass 6, count 2 2006.229.11:11:01.21#ibcon#read 6, iclass 6, count 2 2006.229.11:11:01.21#ibcon#end of sib2, iclass 6, count 2 2006.229.11:11:01.21#ibcon#*after write, iclass 6, count 2 2006.229.11:11:01.21#ibcon#*before return 0, iclass 6, count 2 2006.229.11:11:01.21#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:11:01.21#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:11:01.21#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.11:11:01.21#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:01.21#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:11:01.33#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:11:01.33#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:11:01.33#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:11:01.33#ibcon#first serial, iclass 6, count 0 2006.229.11:11:01.33#ibcon#enter sib2, iclass 6, count 0 2006.229.11:11:01.33#ibcon#flushed, iclass 6, count 0 2006.229.11:11:01.33#ibcon#about to write, iclass 6, count 0 2006.229.11:11:01.33#ibcon#wrote, iclass 6, count 0 2006.229.11:11:01.33#ibcon#about to read 3, iclass 6, count 0 2006.229.11:11:01.35#ibcon#read 3, iclass 6, count 0 2006.229.11:11:01.35#ibcon#about to read 4, iclass 6, count 0 2006.229.11:11:01.35#ibcon#read 4, iclass 6, count 0 2006.229.11:11:01.35#ibcon#about to read 5, iclass 6, count 0 2006.229.11:11:01.35#ibcon#read 5, iclass 6, count 0 2006.229.11:11:01.35#ibcon#about to read 6, iclass 6, count 0 2006.229.11:11:01.35#ibcon#read 6, iclass 6, count 0 2006.229.11:11:01.35#ibcon#end of sib2, iclass 6, count 0 2006.229.11:11:01.35#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:11:01.35#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:11:01.35#ibcon#[27=USB\r\n] 2006.229.11:11:01.35#ibcon#*before write, iclass 6, count 0 2006.229.11:11:01.35#ibcon#enter sib2, iclass 6, count 0 2006.229.11:11:01.35#ibcon#flushed, iclass 6, count 0 2006.229.11:11:01.35#ibcon#about to write, iclass 6, count 0 2006.229.11:11:01.35#ibcon#wrote, iclass 6, count 0 2006.229.11:11:01.35#ibcon#about to read 3, iclass 6, count 0 2006.229.11:11:01.38#ibcon#read 3, iclass 6, count 0 2006.229.11:11:01.38#ibcon#about to read 4, iclass 6, count 0 2006.229.11:11:01.38#ibcon#read 4, iclass 6, count 0 2006.229.11:11:01.38#ibcon#about to read 5, iclass 6, count 0 2006.229.11:11:01.38#ibcon#read 5, iclass 6, count 0 2006.229.11:11:01.38#ibcon#about to read 6, iclass 6, count 0 2006.229.11:11:01.38#ibcon#read 6, iclass 6, count 0 2006.229.11:11:01.38#ibcon#end of sib2, iclass 6, count 0 2006.229.11:11:01.38#ibcon#*after write, iclass 6, count 0 2006.229.11:11:01.38#ibcon#*before return 0, iclass 6, count 0 2006.229.11:11:01.38#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:11:01.38#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:11:01.38#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:11:01.38#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:11:01.38$vck44/vblo=6,719.99 2006.229.11:11:01.38#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.11:11:01.38#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.11:11:01.38#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:01.38#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:11:01.38#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:11:01.38#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:11:01.38#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:11:01.38#ibcon#first serial, iclass 10, count 0 2006.229.11:11:01.38#ibcon#enter sib2, iclass 10, count 0 2006.229.11:11:01.38#ibcon#flushed, iclass 10, count 0 2006.229.11:11:01.38#ibcon#about to write, iclass 10, count 0 2006.229.11:11:01.38#ibcon#wrote, iclass 10, count 0 2006.229.11:11:01.38#ibcon#about to read 3, iclass 10, count 0 2006.229.11:11:01.40#ibcon#read 3, iclass 10, count 0 2006.229.11:11:01.40#ibcon#about to read 4, iclass 10, count 0 2006.229.11:11:01.40#ibcon#read 4, iclass 10, count 0 2006.229.11:11:01.40#ibcon#about to read 5, iclass 10, count 0 2006.229.11:11:01.40#ibcon#read 5, iclass 10, count 0 2006.229.11:11:01.40#ibcon#about to read 6, iclass 10, count 0 2006.229.11:11:01.40#ibcon#read 6, iclass 10, count 0 2006.229.11:11:01.40#ibcon#end of sib2, iclass 10, count 0 2006.229.11:11:01.40#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:11:01.40#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:11:01.40#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:11:01.40#ibcon#*before write, iclass 10, count 0 2006.229.11:11:01.40#ibcon#enter sib2, iclass 10, count 0 2006.229.11:11:01.40#ibcon#flushed, iclass 10, count 0 2006.229.11:11:01.40#ibcon#about to write, iclass 10, count 0 2006.229.11:11:01.40#ibcon#wrote, iclass 10, count 0 2006.229.11:11:01.40#ibcon#about to read 3, iclass 10, count 0 2006.229.11:11:01.44#ibcon#read 3, iclass 10, count 0 2006.229.11:11:01.44#ibcon#about to read 4, iclass 10, count 0 2006.229.11:11:01.44#ibcon#read 4, iclass 10, count 0 2006.229.11:11:01.44#ibcon#about to read 5, iclass 10, count 0 2006.229.11:11:01.44#ibcon#read 5, iclass 10, count 0 2006.229.11:11:01.44#ibcon#about to read 6, iclass 10, count 0 2006.229.11:11:01.44#ibcon#read 6, iclass 10, count 0 2006.229.11:11:01.44#ibcon#end of sib2, iclass 10, count 0 2006.229.11:11:01.44#ibcon#*after write, iclass 10, count 0 2006.229.11:11:01.44#ibcon#*before return 0, iclass 10, count 0 2006.229.11:11:01.44#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:11:01.44#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:11:01.44#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:11:01.44#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:11:01.44$vck44/vb=6,4 2006.229.11:11:01.44#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.11:11:01.44#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.11:11:01.44#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:01.44#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:11:01.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:11:01.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:11:01.50#ibcon#enter wrdev, iclass 12, count 2 2006.229.11:11:01.50#ibcon#first serial, iclass 12, count 2 2006.229.11:11:01.50#ibcon#enter sib2, iclass 12, count 2 2006.229.11:11:01.50#ibcon#flushed, iclass 12, count 2 2006.229.11:11:01.50#ibcon#about to write, iclass 12, count 2 2006.229.11:11:01.50#ibcon#wrote, iclass 12, count 2 2006.229.11:11:01.50#ibcon#about to read 3, iclass 12, count 2 2006.229.11:11:01.52#ibcon#read 3, iclass 12, count 2 2006.229.11:11:01.52#ibcon#about to read 4, iclass 12, count 2 2006.229.11:11:01.52#ibcon#read 4, iclass 12, count 2 2006.229.11:11:01.52#ibcon#about to read 5, iclass 12, count 2 2006.229.11:11:01.52#ibcon#read 5, iclass 12, count 2 2006.229.11:11:01.52#ibcon#about to read 6, iclass 12, count 2 2006.229.11:11:01.52#ibcon#read 6, iclass 12, count 2 2006.229.11:11:01.52#ibcon#end of sib2, iclass 12, count 2 2006.229.11:11:01.52#ibcon#*mode == 0, iclass 12, count 2 2006.229.11:11:01.52#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.11:11:01.52#ibcon#[27=AT06-04\r\n] 2006.229.11:11:01.52#ibcon#*before write, iclass 12, count 2 2006.229.11:11:01.52#ibcon#enter sib2, iclass 12, count 2 2006.229.11:11:01.52#ibcon#flushed, iclass 12, count 2 2006.229.11:11:01.52#ibcon#about to write, iclass 12, count 2 2006.229.11:11:01.52#ibcon#wrote, iclass 12, count 2 2006.229.11:11:01.52#ibcon#about to read 3, iclass 12, count 2 2006.229.11:11:01.55#ibcon#read 3, iclass 12, count 2 2006.229.11:11:01.55#ibcon#about to read 4, iclass 12, count 2 2006.229.11:11:01.55#ibcon#read 4, iclass 12, count 2 2006.229.11:11:01.55#ibcon#about to read 5, iclass 12, count 2 2006.229.11:11:01.55#ibcon#read 5, iclass 12, count 2 2006.229.11:11:01.55#ibcon#about to read 6, iclass 12, count 2 2006.229.11:11:01.55#ibcon#read 6, iclass 12, count 2 2006.229.11:11:01.55#ibcon#end of sib2, iclass 12, count 2 2006.229.11:11:01.55#ibcon#*after write, iclass 12, count 2 2006.229.11:11:01.55#ibcon#*before return 0, iclass 12, count 2 2006.229.11:11:01.55#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:11:01.55#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:11:01.55#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.11:11:01.55#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:01.55#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:11:01.67#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:11:01.67#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:11:01.67#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:11:01.67#ibcon#first serial, iclass 12, count 0 2006.229.11:11:01.67#ibcon#enter sib2, iclass 12, count 0 2006.229.11:11:01.67#ibcon#flushed, iclass 12, count 0 2006.229.11:11:01.67#ibcon#about to write, iclass 12, count 0 2006.229.11:11:01.67#ibcon#wrote, iclass 12, count 0 2006.229.11:11:01.67#ibcon#about to read 3, iclass 12, count 0 2006.229.11:11:01.69#ibcon#read 3, iclass 12, count 0 2006.229.11:11:01.69#ibcon#about to read 4, iclass 12, count 0 2006.229.11:11:01.69#ibcon#read 4, iclass 12, count 0 2006.229.11:11:01.69#ibcon#about to read 5, iclass 12, count 0 2006.229.11:11:01.69#ibcon#read 5, iclass 12, count 0 2006.229.11:11:01.69#ibcon#about to read 6, iclass 12, count 0 2006.229.11:11:01.69#ibcon#read 6, iclass 12, count 0 2006.229.11:11:01.69#ibcon#end of sib2, iclass 12, count 0 2006.229.11:11:01.69#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:11:01.69#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:11:01.69#ibcon#[27=USB\r\n] 2006.229.11:11:01.69#ibcon#*before write, iclass 12, count 0 2006.229.11:11:01.69#ibcon#enter sib2, iclass 12, count 0 2006.229.11:11:01.69#ibcon#flushed, iclass 12, count 0 2006.229.11:11:01.69#ibcon#about to write, iclass 12, count 0 2006.229.11:11:01.69#ibcon#wrote, iclass 12, count 0 2006.229.11:11:01.69#ibcon#about to read 3, iclass 12, count 0 2006.229.11:11:01.72#ibcon#read 3, iclass 12, count 0 2006.229.11:11:01.72#ibcon#about to read 4, iclass 12, count 0 2006.229.11:11:01.72#ibcon#read 4, iclass 12, count 0 2006.229.11:11:01.72#ibcon#about to read 5, iclass 12, count 0 2006.229.11:11:01.72#ibcon#read 5, iclass 12, count 0 2006.229.11:11:01.72#ibcon#about to read 6, iclass 12, count 0 2006.229.11:11:01.72#ibcon#read 6, iclass 12, count 0 2006.229.11:11:01.72#ibcon#end of sib2, iclass 12, count 0 2006.229.11:11:01.72#ibcon#*after write, iclass 12, count 0 2006.229.11:11:01.72#ibcon#*before return 0, iclass 12, count 0 2006.229.11:11:01.72#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:11:01.72#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:11:01.72#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:11:01.72#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:11:01.72$vck44/vblo=7,734.99 2006.229.11:11:01.72#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.11:11:01.72#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.11:11:01.72#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:01.72#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:11:01.72#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:11:01.72#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:11:01.72#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:11:01.72#ibcon#first serial, iclass 14, count 0 2006.229.11:11:01.72#ibcon#enter sib2, iclass 14, count 0 2006.229.11:11:01.72#ibcon#flushed, iclass 14, count 0 2006.229.11:11:01.72#ibcon#about to write, iclass 14, count 0 2006.229.11:11:01.72#ibcon#wrote, iclass 14, count 0 2006.229.11:11:01.72#ibcon#about to read 3, iclass 14, count 0 2006.229.11:11:01.74#ibcon#read 3, iclass 14, count 0 2006.229.11:11:01.74#ibcon#about to read 4, iclass 14, count 0 2006.229.11:11:01.74#ibcon#read 4, iclass 14, count 0 2006.229.11:11:01.74#ibcon#about to read 5, iclass 14, count 0 2006.229.11:11:01.74#ibcon#read 5, iclass 14, count 0 2006.229.11:11:01.74#ibcon#about to read 6, iclass 14, count 0 2006.229.11:11:01.74#ibcon#read 6, iclass 14, count 0 2006.229.11:11:01.74#ibcon#end of sib2, iclass 14, count 0 2006.229.11:11:01.74#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:11:01.74#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:11:01.74#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:11:01.74#ibcon#*before write, iclass 14, count 0 2006.229.11:11:01.74#ibcon#enter sib2, iclass 14, count 0 2006.229.11:11:01.74#ibcon#flushed, iclass 14, count 0 2006.229.11:11:01.74#ibcon#about to write, iclass 14, count 0 2006.229.11:11:01.74#ibcon#wrote, iclass 14, count 0 2006.229.11:11:01.74#ibcon#about to read 3, iclass 14, count 0 2006.229.11:11:01.78#ibcon#read 3, iclass 14, count 0 2006.229.11:11:01.78#ibcon#about to read 4, iclass 14, count 0 2006.229.11:11:01.78#ibcon#read 4, iclass 14, count 0 2006.229.11:11:01.78#ibcon#about to read 5, iclass 14, count 0 2006.229.11:11:01.78#ibcon#read 5, iclass 14, count 0 2006.229.11:11:01.78#ibcon#about to read 6, iclass 14, count 0 2006.229.11:11:01.78#ibcon#read 6, iclass 14, count 0 2006.229.11:11:01.78#ibcon#end of sib2, iclass 14, count 0 2006.229.11:11:01.78#ibcon#*after write, iclass 14, count 0 2006.229.11:11:01.78#ibcon#*before return 0, iclass 14, count 0 2006.229.11:11:01.78#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:11:01.78#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:11:01.78#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:11:01.78#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:11:01.78$vck44/vb=7,4 2006.229.11:11:01.78#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.11:11:01.78#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.11:11:01.78#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:01.78#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:11:01.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:11:01.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:11:01.84#ibcon#enter wrdev, iclass 16, count 2 2006.229.11:11:01.84#ibcon#first serial, iclass 16, count 2 2006.229.11:11:01.84#ibcon#enter sib2, iclass 16, count 2 2006.229.11:11:01.84#ibcon#flushed, iclass 16, count 2 2006.229.11:11:01.84#ibcon#about to write, iclass 16, count 2 2006.229.11:11:01.84#ibcon#wrote, iclass 16, count 2 2006.229.11:11:01.84#ibcon#about to read 3, iclass 16, count 2 2006.229.11:11:01.86#ibcon#read 3, iclass 16, count 2 2006.229.11:11:01.86#ibcon#about to read 4, iclass 16, count 2 2006.229.11:11:01.86#ibcon#read 4, iclass 16, count 2 2006.229.11:11:01.86#ibcon#about to read 5, iclass 16, count 2 2006.229.11:11:01.86#ibcon#read 5, iclass 16, count 2 2006.229.11:11:01.86#ibcon#about to read 6, iclass 16, count 2 2006.229.11:11:01.86#ibcon#read 6, iclass 16, count 2 2006.229.11:11:01.86#ibcon#end of sib2, iclass 16, count 2 2006.229.11:11:01.86#ibcon#*mode == 0, iclass 16, count 2 2006.229.11:11:01.86#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.11:11:01.86#ibcon#[27=AT07-04\r\n] 2006.229.11:11:01.86#ibcon#*before write, iclass 16, count 2 2006.229.11:11:01.86#ibcon#enter sib2, iclass 16, count 2 2006.229.11:11:01.86#ibcon#flushed, iclass 16, count 2 2006.229.11:11:01.86#ibcon#about to write, iclass 16, count 2 2006.229.11:11:01.86#ibcon#wrote, iclass 16, count 2 2006.229.11:11:01.86#ibcon#about to read 3, iclass 16, count 2 2006.229.11:11:01.89#ibcon#read 3, iclass 16, count 2 2006.229.11:11:01.89#ibcon#about to read 4, iclass 16, count 2 2006.229.11:11:01.89#ibcon#read 4, iclass 16, count 2 2006.229.11:11:01.89#ibcon#about to read 5, iclass 16, count 2 2006.229.11:11:01.89#ibcon#read 5, iclass 16, count 2 2006.229.11:11:01.89#ibcon#about to read 6, iclass 16, count 2 2006.229.11:11:01.89#ibcon#read 6, iclass 16, count 2 2006.229.11:11:01.89#ibcon#end of sib2, iclass 16, count 2 2006.229.11:11:01.89#ibcon#*after write, iclass 16, count 2 2006.229.11:11:01.89#ibcon#*before return 0, iclass 16, count 2 2006.229.11:11:01.89#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:11:01.89#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:11:01.89#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.11:11:01.89#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:01.89#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:11:02.01#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:11:02.01#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:11:02.01#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:11:02.01#ibcon#first serial, iclass 16, count 0 2006.229.11:11:02.01#ibcon#enter sib2, iclass 16, count 0 2006.229.11:11:02.01#ibcon#flushed, iclass 16, count 0 2006.229.11:11:02.01#ibcon#about to write, iclass 16, count 0 2006.229.11:11:02.01#ibcon#wrote, iclass 16, count 0 2006.229.11:11:02.01#ibcon#about to read 3, iclass 16, count 0 2006.229.11:11:02.03#ibcon#read 3, iclass 16, count 0 2006.229.11:11:02.03#ibcon#about to read 4, iclass 16, count 0 2006.229.11:11:02.03#ibcon#read 4, iclass 16, count 0 2006.229.11:11:02.03#ibcon#about to read 5, iclass 16, count 0 2006.229.11:11:02.03#ibcon#read 5, iclass 16, count 0 2006.229.11:11:02.03#ibcon#about to read 6, iclass 16, count 0 2006.229.11:11:02.03#ibcon#read 6, iclass 16, count 0 2006.229.11:11:02.03#ibcon#end of sib2, iclass 16, count 0 2006.229.11:11:02.03#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:11:02.03#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:11:02.03#ibcon#[27=USB\r\n] 2006.229.11:11:02.03#ibcon#*before write, iclass 16, count 0 2006.229.11:11:02.03#ibcon#enter sib2, iclass 16, count 0 2006.229.11:11:02.03#ibcon#flushed, iclass 16, count 0 2006.229.11:11:02.03#ibcon#about to write, iclass 16, count 0 2006.229.11:11:02.03#ibcon#wrote, iclass 16, count 0 2006.229.11:11:02.03#ibcon#about to read 3, iclass 16, count 0 2006.229.11:11:02.06#ibcon#read 3, iclass 16, count 0 2006.229.11:11:02.06#ibcon#about to read 4, iclass 16, count 0 2006.229.11:11:02.06#ibcon#read 4, iclass 16, count 0 2006.229.11:11:02.06#ibcon#about to read 5, iclass 16, count 0 2006.229.11:11:02.06#ibcon#read 5, iclass 16, count 0 2006.229.11:11:02.06#ibcon#about to read 6, iclass 16, count 0 2006.229.11:11:02.06#ibcon#read 6, iclass 16, count 0 2006.229.11:11:02.06#ibcon#end of sib2, iclass 16, count 0 2006.229.11:11:02.06#ibcon#*after write, iclass 16, count 0 2006.229.11:11:02.06#ibcon#*before return 0, iclass 16, count 0 2006.229.11:11:02.06#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:11:02.06#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:11:02.06#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:11:02.06#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:11:02.06$vck44/vblo=8,744.99 2006.229.11:11:02.06#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.11:11:02.06#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.11:11:02.06#ibcon#ireg 17 cls_cnt 0 2006.229.11:11:02.06#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:11:02.06#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:11:02.06#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:11:02.06#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:11:02.06#ibcon#first serial, iclass 18, count 0 2006.229.11:11:02.06#ibcon#enter sib2, iclass 18, count 0 2006.229.11:11:02.06#ibcon#flushed, iclass 18, count 0 2006.229.11:11:02.06#ibcon#about to write, iclass 18, count 0 2006.229.11:11:02.06#ibcon#wrote, iclass 18, count 0 2006.229.11:11:02.06#ibcon#about to read 3, iclass 18, count 0 2006.229.11:11:02.08#ibcon#read 3, iclass 18, count 0 2006.229.11:11:02.08#ibcon#about to read 4, iclass 18, count 0 2006.229.11:11:02.08#ibcon#read 4, iclass 18, count 0 2006.229.11:11:02.08#ibcon#about to read 5, iclass 18, count 0 2006.229.11:11:02.08#ibcon#read 5, iclass 18, count 0 2006.229.11:11:02.08#ibcon#about to read 6, iclass 18, count 0 2006.229.11:11:02.08#ibcon#read 6, iclass 18, count 0 2006.229.11:11:02.08#ibcon#end of sib2, iclass 18, count 0 2006.229.11:11:02.08#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:11:02.08#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:11:02.08#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:11:02.08#ibcon#*before write, iclass 18, count 0 2006.229.11:11:02.08#ibcon#enter sib2, iclass 18, count 0 2006.229.11:11:02.08#ibcon#flushed, iclass 18, count 0 2006.229.11:11:02.08#ibcon#about to write, iclass 18, count 0 2006.229.11:11:02.08#ibcon#wrote, iclass 18, count 0 2006.229.11:11:02.08#ibcon#about to read 3, iclass 18, count 0 2006.229.11:11:02.12#ibcon#read 3, iclass 18, count 0 2006.229.11:11:02.12#ibcon#about to read 4, iclass 18, count 0 2006.229.11:11:02.12#ibcon#read 4, iclass 18, count 0 2006.229.11:11:02.12#ibcon#about to read 5, iclass 18, count 0 2006.229.11:11:02.12#ibcon#read 5, iclass 18, count 0 2006.229.11:11:02.12#ibcon#about to read 6, iclass 18, count 0 2006.229.11:11:02.12#ibcon#read 6, iclass 18, count 0 2006.229.11:11:02.12#ibcon#end of sib2, iclass 18, count 0 2006.229.11:11:02.12#ibcon#*after write, iclass 18, count 0 2006.229.11:11:02.12#ibcon#*before return 0, iclass 18, count 0 2006.229.11:11:02.12#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:11:02.12#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:11:02.12#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:11:02.12#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:11:02.12$vck44/vb=8,4 2006.229.11:11:02.12#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.11:11:02.12#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.11:11:02.12#ibcon#ireg 11 cls_cnt 2 2006.229.11:11:02.12#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:11:02.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:11:02.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:11:02.18#ibcon#enter wrdev, iclass 20, count 2 2006.229.11:11:02.18#ibcon#first serial, iclass 20, count 2 2006.229.11:11:02.18#ibcon#enter sib2, iclass 20, count 2 2006.229.11:11:02.18#ibcon#flushed, iclass 20, count 2 2006.229.11:11:02.18#ibcon#about to write, iclass 20, count 2 2006.229.11:11:02.18#ibcon#wrote, iclass 20, count 2 2006.229.11:11:02.18#ibcon#about to read 3, iclass 20, count 2 2006.229.11:11:02.20#ibcon#read 3, iclass 20, count 2 2006.229.11:11:02.20#ibcon#about to read 4, iclass 20, count 2 2006.229.11:11:02.20#ibcon#read 4, iclass 20, count 2 2006.229.11:11:02.20#ibcon#about to read 5, iclass 20, count 2 2006.229.11:11:02.20#ibcon#read 5, iclass 20, count 2 2006.229.11:11:02.20#ibcon#about to read 6, iclass 20, count 2 2006.229.11:11:02.20#ibcon#read 6, iclass 20, count 2 2006.229.11:11:02.20#ibcon#end of sib2, iclass 20, count 2 2006.229.11:11:02.20#ibcon#*mode == 0, iclass 20, count 2 2006.229.11:11:02.20#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.11:11:02.20#ibcon#[27=AT08-04\r\n] 2006.229.11:11:02.20#ibcon#*before write, iclass 20, count 2 2006.229.11:11:02.20#ibcon#enter sib2, iclass 20, count 2 2006.229.11:11:02.20#ibcon#flushed, iclass 20, count 2 2006.229.11:11:02.20#ibcon#about to write, iclass 20, count 2 2006.229.11:11:02.20#ibcon#wrote, iclass 20, count 2 2006.229.11:11:02.20#ibcon#about to read 3, iclass 20, count 2 2006.229.11:11:02.23#ibcon#read 3, iclass 20, count 2 2006.229.11:11:02.23#ibcon#about to read 4, iclass 20, count 2 2006.229.11:11:02.23#ibcon#read 4, iclass 20, count 2 2006.229.11:11:02.23#ibcon#about to read 5, iclass 20, count 2 2006.229.11:11:02.23#ibcon#read 5, iclass 20, count 2 2006.229.11:11:02.23#ibcon#about to read 6, iclass 20, count 2 2006.229.11:11:02.23#ibcon#read 6, iclass 20, count 2 2006.229.11:11:02.23#ibcon#end of sib2, iclass 20, count 2 2006.229.11:11:02.23#ibcon#*after write, iclass 20, count 2 2006.229.11:11:02.23#ibcon#*before return 0, iclass 20, count 2 2006.229.11:11:02.23#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:11:02.23#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:11:02.23#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.11:11:02.23#ibcon#ireg 7 cls_cnt 0 2006.229.11:11:02.23#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:11:02.35#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:11:02.35#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:11:02.35#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:11:02.35#ibcon#first serial, iclass 20, count 0 2006.229.11:11:02.35#ibcon#enter sib2, iclass 20, count 0 2006.229.11:11:02.35#ibcon#flushed, iclass 20, count 0 2006.229.11:11:02.35#ibcon#about to write, iclass 20, count 0 2006.229.11:11:02.35#ibcon#wrote, iclass 20, count 0 2006.229.11:11:02.35#ibcon#about to read 3, iclass 20, count 0 2006.229.11:11:02.37#ibcon#read 3, iclass 20, count 0 2006.229.11:11:02.37#ibcon#about to read 4, iclass 20, count 0 2006.229.11:11:02.37#ibcon#read 4, iclass 20, count 0 2006.229.11:11:02.37#ibcon#about to read 5, iclass 20, count 0 2006.229.11:11:02.37#ibcon#read 5, iclass 20, count 0 2006.229.11:11:02.37#ibcon#about to read 6, iclass 20, count 0 2006.229.11:11:02.37#ibcon#read 6, iclass 20, count 0 2006.229.11:11:02.37#ibcon#end of sib2, iclass 20, count 0 2006.229.11:11:02.37#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:11:02.37#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:11:02.37#ibcon#[27=USB\r\n] 2006.229.11:11:02.37#ibcon#*before write, iclass 20, count 0 2006.229.11:11:02.37#ibcon#enter sib2, iclass 20, count 0 2006.229.11:11:02.37#ibcon#flushed, iclass 20, count 0 2006.229.11:11:02.37#ibcon#about to write, iclass 20, count 0 2006.229.11:11:02.37#ibcon#wrote, iclass 20, count 0 2006.229.11:11:02.37#ibcon#about to read 3, iclass 20, count 0 2006.229.11:11:02.40#ibcon#read 3, iclass 20, count 0 2006.229.11:11:02.40#ibcon#about to read 4, iclass 20, count 0 2006.229.11:11:02.40#ibcon#read 4, iclass 20, count 0 2006.229.11:11:02.40#ibcon#about to read 5, iclass 20, count 0 2006.229.11:11:02.40#ibcon#read 5, iclass 20, count 0 2006.229.11:11:02.40#ibcon#about to read 6, iclass 20, count 0 2006.229.11:11:02.40#ibcon#read 6, iclass 20, count 0 2006.229.11:11:02.40#ibcon#end of sib2, iclass 20, count 0 2006.229.11:11:02.40#ibcon#*after write, iclass 20, count 0 2006.229.11:11:02.40#ibcon#*before return 0, iclass 20, count 0 2006.229.11:11:02.40#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:11:02.40#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:11:02.40#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:11:02.40#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:11:02.40$vck44/vabw=wide 2006.229.11:11:02.40#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.11:11:02.40#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.11:11:02.40#ibcon#ireg 8 cls_cnt 0 2006.229.11:11:02.40#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:11:02.40#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:11:02.40#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:11:02.40#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:11:02.40#ibcon#first serial, iclass 22, count 0 2006.229.11:11:02.40#ibcon#enter sib2, iclass 22, count 0 2006.229.11:11:02.40#ibcon#flushed, iclass 22, count 0 2006.229.11:11:02.40#ibcon#about to write, iclass 22, count 0 2006.229.11:11:02.40#ibcon#wrote, iclass 22, count 0 2006.229.11:11:02.40#ibcon#about to read 3, iclass 22, count 0 2006.229.11:11:02.42#ibcon#read 3, iclass 22, count 0 2006.229.11:11:02.42#ibcon#about to read 4, iclass 22, count 0 2006.229.11:11:02.42#ibcon#read 4, iclass 22, count 0 2006.229.11:11:02.42#ibcon#about to read 5, iclass 22, count 0 2006.229.11:11:02.42#ibcon#read 5, iclass 22, count 0 2006.229.11:11:02.42#ibcon#about to read 6, iclass 22, count 0 2006.229.11:11:02.42#ibcon#read 6, iclass 22, count 0 2006.229.11:11:02.42#ibcon#end of sib2, iclass 22, count 0 2006.229.11:11:02.42#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:11:02.42#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:11:02.42#ibcon#[25=BW32\r\n] 2006.229.11:11:02.42#ibcon#*before write, iclass 22, count 0 2006.229.11:11:02.42#ibcon#enter sib2, iclass 22, count 0 2006.229.11:11:02.42#ibcon#flushed, iclass 22, count 0 2006.229.11:11:02.42#ibcon#about to write, iclass 22, count 0 2006.229.11:11:02.42#ibcon#wrote, iclass 22, count 0 2006.229.11:11:02.42#ibcon#about to read 3, iclass 22, count 0 2006.229.11:11:02.45#ibcon#read 3, iclass 22, count 0 2006.229.11:11:02.45#ibcon#about to read 4, iclass 22, count 0 2006.229.11:11:02.45#ibcon#read 4, iclass 22, count 0 2006.229.11:11:02.45#ibcon#about to read 5, iclass 22, count 0 2006.229.11:11:02.45#ibcon#read 5, iclass 22, count 0 2006.229.11:11:02.45#ibcon#about to read 6, iclass 22, count 0 2006.229.11:11:02.45#ibcon#read 6, iclass 22, count 0 2006.229.11:11:02.45#ibcon#end of sib2, iclass 22, count 0 2006.229.11:11:02.45#ibcon#*after write, iclass 22, count 0 2006.229.11:11:02.45#ibcon#*before return 0, iclass 22, count 0 2006.229.11:11:02.45#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:11:02.45#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:11:02.45#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:11:02.45#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:11:02.45$vck44/vbbw=wide 2006.229.11:11:02.45#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.11:11:02.45#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.11:11:02.45#ibcon#ireg 8 cls_cnt 0 2006.229.11:11:02.45#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:11:02.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:11:02.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:11:02.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:11:02.52#ibcon#first serial, iclass 24, count 0 2006.229.11:11:02.52#ibcon#enter sib2, iclass 24, count 0 2006.229.11:11:02.52#ibcon#flushed, iclass 24, count 0 2006.229.11:11:02.52#ibcon#about to write, iclass 24, count 0 2006.229.11:11:02.52#ibcon#wrote, iclass 24, count 0 2006.229.11:11:02.52#ibcon#about to read 3, iclass 24, count 0 2006.229.11:11:02.54#ibcon#read 3, iclass 24, count 0 2006.229.11:11:02.54#ibcon#about to read 4, iclass 24, count 0 2006.229.11:11:02.54#ibcon#read 4, iclass 24, count 0 2006.229.11:11:02.54#ibcon#about to read 5, iclass 24, count 0 2006.229.11:11:02.54#ibcon#read 5, iclass 24, count 0 2006.229.11:11:02.54#ibcon#about to read 6, iclass 24, count 0 2006.229.11:11:02.54#ibcon#read 6, iclass 24, count 0 2006.229.11:11:02.54#ibcon#end of sib2, iclass 24, count 0 2006.229.11:11:02.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:11:02.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:11:02.54#ibcon#[27=BW32\r\n] 2006.229.11:11:02.54#ibcon#*before write, iclass 24, count 0 2006.229.11:11:02.54#ibcon#enter sib2, iclass 24, count 0 2006.229.11:11:02.54#ibcon#flushed, iclass 24, count 0 2006.229.11:11:02.54#ibcon#about to write, iclass 24, count 0 2006.229.11:11:02.54#ibcon#wrote, iclass 24, count 0 2006.229.11:11:02.54#ibcon#about to read 3, iclass 24, count 0 2006.229.11:11:02.57#ibcon#read 3, iclass 24, count 0 2006.229.11:11:02.57#ibcon#about to read 4, iclass 24, count 0 2006.229.11:11:02.57#ibcon#read 4, iclass 24, count 0 2006.229.11:11:02.57#ibcon#about to read 5, iclass 24, count 0 2006.229.11:11:02.57#ibcon#read 5, iclass 24, count 0 2006.229.11:11:02.57#ibcon#about to read 6, iclass 24, count 0 2006.229.11:11:02.57#ibcon#read 6, iclass 24, count 0 2006.229.11:11:02.57#ibcon#end of sib2, iclass 24, count 0 2006.229.11:11:02.57#ibcon#*after write, iclass 24, count 0 2006.229.11:11:02.57#ibcon#*before return 0, iclass 24, count 0 2006.229.11:11:02.57#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:11:02.57#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:11:02.57#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:11:02.57#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:11:02.57$setupk4/ifdk4 2006.229.11:11:02.57$ifdk4/lo= 2006.229.11:11:02.57$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:11:02.57$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:11:02.57$ifdk4/patch= 2006.229.11:11:02.58$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:11:02.58$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:11:02.58$setupk4/!*+20s 2006.229.11:11:08.05#abcon#<5=/04 2.1 3.9 28.291001001.8\r\n> 2006.229.11:11:08.07#abcon#{5=INTERFACE CLEAR} 2006.229.11:11:08.13#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:11:11.13#trakl#Source acquired 2006.229.11:11:13.14#flagr#flagr/antenna,acquired 2006.229.11:11:17.09$setupk4/"tpicd 2006.229.11:11:17.09$setupk4/echo=off 2006.229.11:11:17.09$setupk4/xlog=off 2006.229.11:11:17.09:!2006.229.11:14:53 2006.229.11:14:53.00:preob 2006.229.11:14:53.14/onsource/TRACKING 2006.229.11:14:53.14:!2006.229.11:15:03 2006.229.11:15:03.00:"tape 2006.229.11:15:03.00:"st=record 2006.229.11:15:03.00:data_valid=on 2006.229.11:15:03.00:midob 2006.229.11:15:04.14/onsource/TRACKING 2006.229.11:15:04.14/wx/28.25,1001.9,100 2006.229.11:15:04.21/cable/+6.4025E-03 2006.229.11:15:05.30/va/01,08,usb,yes,32,34 2006.229.11:15:05.30/va/02,07,usb,yes,34,35 2006.229.11:15:05.30/va/03,06,usb,yes,43,45 2006.229.11:15:05.30/va/04,07,usb,yes,35,37 2006.229.11:15:05.30/va/05,04,usb,yes,32,32 2006.229.11:15:05.30/va/06,04,usb,yes,36,35 2006.229.11:15:05.30/va/07,05,usb,yes,31,32 2006.229.11:15:05.30/va/08,06,usb,yes,23,28 2006.229.11:15:05.53/valo/01,524.99,yes,locked 2006.229.11:15:05.53/valo/02,534.99,yes,locked 2006.229.11:15:05.53/valo/03,564.99,yes,locked 2006.229.11:15:05.53/valo/04,624.99,yes,locked 2006.229.11:15:05.53/valo/05,734.99,yes,locked 2006.229.11:15:05.53/valo/06,814.99,yes,locked 2006.229.11:15:05.53/valo/07,864.99,yes,locked 2006.229.11:15:05.53/valo/08,884.99,yes,locked 2006.229.11:15:06.62/vb/01,04,usb,yes,32,30 2006.229.11:15:06.62/vb/02,04,usb,yes,34,34 2006.229.11:15:06.62/vb/03,04,usb,yes,31,35 2006.229.11:15:06.62/vb/04,04,usb,yes,36,35 2006.229.11:15:06.62/vb/05,04,usb,yes,28,31 2006.229.11:15:06.62/vb/06,04,usb,yes,33,29 2006.229.11:15:06.62/vb/07,04,usb,yes,33,33 2006.229.11:15:06.62/vb/08,04,usb,yes,30,34 2006.229.11:15:06.85/vblo/01,629.99,yes,locked 2006.229.11:15:06.85/vblo/02,634.99,yes,locked 2006.229.11:15:06.85/vblo/03,649.99,yes,locked 2006.229.11:15:06.85/vblo/04,679.99,yes,locked 2006.229.11:15:06.85/vblo/05,709.99,yes,locked 2006.229.11:15:06.85/vblo/06,719.99,yes,locked 2006.229.11:15:06.85/vblo/07,734.99,yes,locked 2006.229.11:15:06.85/vblo/08,744.99,yes,locked 2006.229.11:15:07.00/vabw/8 2006.229.11:15:07.15/vbbw/8 2006.229.11:15:07.24/xfe/off,on,12.0 2006.229.11:15:07.64/ifatt/23,28,28,28 2006.229.11:15:08.07/fmout-gps/S +4.57E-07 2006.229.11:15:08.11:!2006.229.11:18:33 2006.229.11:18:33.00:data_valid=off 2006.229.11:18:33.00:"et 2006.229.11:18:33.00:!+3s 2006.229.11:18:36.01:"tape 2006.229.11:18:36.01:postob 2006.229.11:18:36.17/cable/+6.4041E-03 2006.229.11:18:36.17/wx/28.21,1001.9,100 2006.229.11:18:37.07/fmout-gps/S +4.57E-07 2006.229.11:18:37.07:scan_name=229-1121,jd0608,40 2006.229.11:18:37.07:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.11:18:37.14#flagr#flagr/antenna,new-source 2006.229.11:18:38.14:checkk5 2006.229.11:18:38.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:18:38.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:18:39.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:18:39.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:18:40.18/chk_obsdata//k5ts1/T2291115??a.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.11:18:40.59/chk_obsdata//k5ts2/T2291115??b.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.11:18:41.01/chk_obsdata//k5ts3/T2291115??c.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.11:18:41.40/chk_obsdata//k5ts4/T2291115??d.dat file size is correct (nominal:840MB, actual:840MB). 2006.229.11:18:42.14/k5log//k5ts1_log_newline 2006.229.11:18:42.84/k5log//k5ts2_log_newline 2006.229.11:18:43.55/k5log//k5ts3_log_newline 2006.229.11:18:44.25/k5log//k5ts4_log_newline 2006.229.11:18:44.28/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:18:44.28:setupk4=1 2006.229.11:18:44.28$setupk4/echo=on 2006.229.11:18:44.28$setupk4/pcalon 2006.229.11:18:44.28$pcalon/"no phase cal control is implemented here 2006.229.11:18:44.28$setupk4/"tpicd=stop 2006.229.11:18:44.28$setupk4/"rec=synch_on 2006.229.11:18:44.28$setupk4/"rec_mode=128 2006.229.11:18:44.28$setupk4/!* 2006.229.11:18:44.28$setupk4/recpk4 2006.229.11:18:44.28$recpk4/recpatch= 2006.229.11:18:44.28$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:18:44.29$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:18:44.29$setupk4/vck44 2006.229.11:18:44.29$vck44/valo=1,524.99 2006.229.11:18:44.29#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.11:18:44.29#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.11:18:44.29#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:44.29#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:44.29#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:44.29#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:44.29#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:18:44.29#ibcon#first serial, iclass 29, count 0 2006.229.11:18:44.29#ibcon#enter sib2, iclass 29, count 0 2006.229.11:18:44.29#ibcon#flushed, iclass 29, count 0 2006.229.11:18:44.29#ibcon#about to write, iclass 29, count 0 2006.229.11:18:44.29#ibcon#wrote, iclass 29, count 0 2006.229.11:18:44.29#ibcon#about to read 3, iclass 29, count 0 2006.229.11:18:44.30#ibcon#read 3, iclass 29, count 0 2006.229.11:18:44.30#ibcon#about to read 4, iclass 29, count 0 2006.229.11:18:44.30#ibcon#read 4, iclass 29, count 0 2006.229.11:18:44.30#ibcon#about to read 5, iclass 29, count 0 2006.229.11:18:44.30#ibcon#read 5, iclass 29, count 0 2006.229.11:18:44.30#ibcon#about to read 6, iclass 29, count 0 2006.229.11:18:44.30#ibcon#read 6, iclass 29, count 0 2006.229.11:18:44.30#ibcon#end of sib2, iclass 29, count 0 2006.229.11:18:44.30#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:18:44.30#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:18:44.30#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:18:44.30#ibcon#*before write, iclass 29, count 0 2006.229.11:18:44.30#ibcon#enter sib2, iclass 29, count 0 2006.229.11:18:44.30#ibcon#flushed, iclass 29, count 0 2006.229.11:18:44.30#ibcon#about to write, iclass 29, count 0 2006.229.11:18:44.30#ibcon#wrote, iclass 29, count 0 2006.229.11:18:44.30#ibcon#about to read 3, iclass 29, count 0 2006.229.11:18:44.35#ibcon#read 3, iclass 29, count 0 2006.229.11:18:44.35#ibcon#about to read 4, iclass 29, count 0 2006.229.11:18:44.35#ibcon#read 4, iclass 29, count 0 2006.229.11:18:44.35#ibcon#about to read 5, iclass 29, count 0 2006.229.11:18:44.35#ibcon#read 5, iclass 29, count 0 2006.229.11:18:44.35#ibcon#about to read 6, iclass 29, count 0 2006.229.11:18:44.35#ibcon#read 6, iclass 29, count 0 2006.229.11:18:44.35#ibcon#end of sib2, iclass 29, count 0 2006.229.11:18:44.35#ibcon#*after write, iclass 29, count 0 2006.229.11:18:44.35#ibcon#*before return 0, iclass 29, count 0 2006.229.11:18:44.35#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:44.35#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:44.35#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:18:44.35#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:18:44.35$vck44/va=1,8 2006.229.11:18:44.35#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.11:18:44.35#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.11:18:44.35#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:44.35#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:44.35#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:44.35#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:44.35#ibcon#enter wrdev, iclass 31, count 2 2006.229.11:18:44.35#ibcon#first serial, iclass 31, count 2 2006.229.11:18:44.35#ibcon#enter sib2, iclass 31, count 2 2006.229.11:18:44.35#ibcon#flushed, iclass 31, count 2 2006.229.11:18:44.35#ibcon#about to write, iclass 31, count 2 2006.229.11:18:44.35#ibcon#wrote, iclass 31, count 2 2006.229.11:18:44.35#ibcon#about to read 3, iclass 31, count 2 2006.229.11:18:44.37#ibcon#read 3, iclass 31, count 2 2006.229.11:18:44.37#ibcon#about to read 4, iclass 31, count 2 2006.229.11:18:44.37#ibcon#read 4, iclass 31, count 2 2006.229.11:18:44.37#ibcon#about to read 5, iclass 31, count 2 2006.229.11:18:44.37#ibcon#read 5, iclass 31, count 2 2006.229.11:18:44.37#ibcon#about to read 6, iclass 31, count 2 2006.229.11:18:44.37#ibcon#read 6, iclass 31, count 2 2006.229.11:18:44.37#ibcon#end of sib2, iclass 31, count 2 2006.229.11:18:44.37#ibcon#*mode == 0, iclass 31, count 2 2006.229.11:18:44.37#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.11:18:44.37#ibcon#[25=AT01-08\r\n] 2006.229.11:18:44.37#ibcon#*before write, iclass 31, count 2 2006.229.11:18:44.37#ibcon#enter sib2, iclass 31, count 2 2006.229.11:18:44.37#ibcon#flushed, iclass 31, count 2 2006.229.11:18:44.37#ibcon#about to write, iclass 31, count 2 2006.229.11:18:44.37#ibcon#wrote, iclass 31, count 2 2006.229.11:18:44.37#ibcon#about to read 3, iclass 31, count 2 2006.229.11:18:44.40#ibcon#read 3, iclass 31, count 2 2006.229.11:18:44.40#ibcon#about to read 4, iclass 31, count 2 2006.229.11:18:44.40#ibcon#read 4, iclass 31, count 2 2006.229.11:18:44.40#ibcon#about to read 5, iclass 31, count 2 2006.229.11:18:44.40#ibcon#read 5, iclass 31, count 2 2006.229.11:18:44.40#ibcon#about to read 6, iclass 31, count 2 2006.229.11:18:44.40#ibcon#read 6, iclass 31, count 2 2006.229.11:18:44.40#ibcon#end of sib2, iclass 31, count 2 2006.229.11:18:44.40#ibcon#*after write, iclass 31, count 2 2006.229.11:18:44.40#ibcon#*before return 0, iclass 31, count 2 2006.229.11:18:44.40#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:44.40#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:44.40#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.11:18:44.40#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:44.40#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:44.52#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:44.52#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:44.52#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:18:44.52#ibcon#first serial, iclass 31, count 0 2006.229.11:18:44.52#ibcon#enter sib2, iclass 31, count 0 2006.229.11:18:44.52#ibcon#flushed, iclass 31, count 0 2006.229.11:18:44.52#ibcon#about to write, iclass 31, count 0 2006.229.11:18:44.52#ibcon#wrote, iclass 31, count 0 2006.229.11:18:44.52#ibcon#about to read 3, iclass 31, count 0 2006.229.11:18:44.54#ibcon#read 3, iclass 31, count 0 2006.229.11:18:44.54#ibcon#about to read 4, iclass 31, count 0 2006.229.11:18:44.54#ibcon#read 4, iclass 31, count 0 2006.229.11:18:44.54#ibcon#about to read 5, iclass 31, count 0 2006.229.11:18:44.54#ibcon#read 5, iclass 31, count 0 2006.229.11:18:44.54#ibcon#about to read 6, iclass 31, count 0 2006.229.11:18:44.54#ibcon#read 6, iclass 31, count 0 2006.229.11:18:44.54#ibcon#end of sib2, iclass 31, count 0 2006.229.11:18:44.54#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:18:44.54#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:18:44.54#ibcon#[25=USB\r\n] 2006.229.11:18:44.54#ibcon#*before write, iclass 31, count 0 2006.229.11:18:44.54#ibcon#enter sib2, iclass 31, count 0 2006.229.11:18:44.54#ibcon#flushed, iclass 31, count 0 2006.229.11:18:44.54#ibcon#about to write, iclass 31, count 0 2006.229.11:18:44.54#ibcon#wrote, iclass 31, count 0 2006.229.11:18:44.54#ibcon#about to read 3, iclass 31, count 0 2006.229.11:18:44.57#ibcon#read 3, iclass 31, count 0 2006.229.11:18:44.57#ibcon#about to read 4, iclass 31, count 0 2006.229.11:18:44.57#ibcon#read 4, iclass 31, count 0 2006.229.11:18:44.57#ibcon#about to read 5, iclass 31, count 0 2006.229.11:18:44.57#ibcon#read 5, iclass 31, count 0 2006.229.11:18:44.57#ibcon#about to read 6, iclass 31, count 0 2006.229.11:18:44.57#ibcon#read 6, iclass 31, count 0 2006.229.11:18:44.57#ibcon#end of sib2, iclass 31, count 0 2006.229.11:18:44.57#ibcon#*after write, iclass 31, count 0 2006.229.11:18:44.57#ibcon#*before return 0, iclass 31, count 0 2006.229.11:18:44.57#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:44.57#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:44.57#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:18:44.57#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:18:44.57$vck44/valo=2,534.99 2006.229.11:18:44.57#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.11:18:44.57#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.11:18:44.57#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:44.57#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:44.57#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:44.57#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:44.57#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:18:44.57#ibcon#first serial, iclass 33, count 0 2006.229.11:18:44.57#ibcon#enter sib2, iclass 33, count 0 2006.229.11:18:44.57#ibcon#flushed, iclass 33, count 0 2006.229.11:18:44.57#ibcon#about to write, iclass 33, count 0 2006.229.11:18:44.57#ibcon#wrote, iclass 33, count 0 2006.229.11:18:44.57#ibcon#about to read 3, iclass 33, count 0 2006.229.11:18:44.59#ibcon#read 3, iclass 33, count 0 2006.229.11:18:44.59#ibcon#about to read 4, iclass 33, count 0 2006.229.11:18:44.59#ibcon#read 4, iclass 33, count 0 2006.229.11:18:44.59#ibcon#about to read 5, iclass 33, count 0 2006.229.11:18:44.59#ibcon#read 5, iclass 33, count 0 2006.229.11:18:44.59#ibcon#about to read 6, iclass 33, count 0 2006.229.11:18:44.59#ibcon#read 6, iclass 33, count 0 2006.229.11:18:44.59#ibcon#end of sib2, iclass 33, count 0 2006.229.11:18:44.59#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:18:44.59#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:18:44.59#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:18:44.59#ibcon#*before write, iclass 33, count 0 2006.229.11:18:44.59#ibcon#enter sib2, iclass 33, count 0 2006.229.11:18:44.59#ibcon#flushed, iclass 33, count 0 2006.229.11:18:44.59#ibcon#about to write, iclass 33, count 0 2006.229.11:18:44.59#ibcon#wrote, iclass 33, count 0 2006.229.11:18:44.59#ibcon#about to read 3, iclass 33, count 0 2006.229.11:18:44.63#ibcon#read 3, iclass 33, count 0 2006.229.11:18:44.63#ibcon#about to read 4, iclass 33, count 0 2006.229.11:18:44.63#ibcon#read 4, iclass 33, count 0 2006.229.11:18:44.63#ibcon#about to read 5, iclass 33, count 0 2006.229.11:18:44.63#ibcon#read 5, iclass 33, count 0 2006.229.11:18:44.63#ibcon#about to read 6, iclass 33, count 0 2006.229.11:18:44.63#ibcon#read 6, iclass 33, count 0 2006.229.11:18:44.63#ibcon#end of sib2, iclass 33, count 0 2006.229.11:18:44.63#ibcon#*after write, iclass 33, count 0 2006.229.11:18:44.63#ibcon#*before return 0, iclass 33, count 0 2006.229.11:18:44.63#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:44.63#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:44.63#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:18:44.63#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:18:44.63$vck44/va=2,7 2006.229.11:18:44.63#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.11:18:44.63#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.11:18:44.63#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:44.63#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:44.69#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:44.69#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:44.69#ibcon#enter wrdev, iclass 35, count 2 2006.229.11:18:44.69#ibcon#first serial, iclass 35, count 2 2006.229.11:18:44.69#ibcon#enter sib2, iclass 35, count 2 2006.229.11:18:44.69#ibcon#flushed, iclass 35, count 2 2006.229.11:18:44.69#ibcon#about to write, iclass 35, count 2 2006.229.11:18:44.69#ibcon#wrote, iclass 35, count 2 2006.229.11:18:44.69#ibcon#about to read 3, iclass 35, count 2 2006.229.11:18:44.71#ibcon#read 3, iclass 35, count 2 2006.229.11:18:44.71#ibcon#about to read 4, iclass 35, count 2 2006.229.11:18:44.71#ibcon#read 4, iclass 35, count 2 2006.229.11:18:44.71#ibcon#about to read 5, iclass 35, count 2 2006.229.11:18:44.71#ibcon#read 5, iclass 35, count 2 2006.229.11:18:44.71#ibcon#about to read 6, iclass 35, count 2 2006.229.11:18:44.71#ibcon#read 6, iclass 35, count 2 2006.229.11:18:44.71#ibcon#end of sib2, iclass 35, count 2 2006.229.11:18:44.71#ibcon#*mode == 0, iclass 35, count 2 2006.229.11:18:44.71#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.11:18:44.71#ibcon#[25=AT02-07\r\n] 2006.229.11:18:44.71#ibcon#*before write, iclass 35, count 2 2006.229.11:18:44.71#ibcon#enter sib2, iclass 35, count 2 2006.229.11:18:44.71#ibcon#flushed, iclass 35, count 2 2006.229.11:18:44.71#ibcon#about to write, iclass 35, count 2 2006.229.11:18:44.71#ibcon#wrote, iclass 35, count 2 2006.229.11:18:44.71#ibcon#about to read 3, iclass 35, count 2 2006.229.11:18:44.74#ibcon#read 3, iclass 35, count 2 2006.229.11:18:44.74#ibcon#about to read 4, iclass 35, count 2 2006.229.11:18:44.74#ibcon#read 4, iclass 35, count 2 2006.229.11:18:44.74#ibcon#about to read 5, iclass 35, count 2 2006.229.11:18:44.74#ibcon#read 5, iclass 35, count 2 2006.229.11:18:44.74#ibcon#about to read 6, iclass 35, count 2 2006.229.11:18:44.74#ibcon#read 6, iclass 35, count 2 2006.229.11:18:44.74#ibcon#end of sib2, iclass 35, count 2 2006.229.11:18:44.74#ibcon#*after write, iclass 35, count 2 2006.229.11:18:44.74#ibcon#*before return 0, iclass 35, count 2 2006.229.11:18:44.74#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:44.74#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:44.74#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.11:18:44.74#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:44.74#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:44.86#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:44.86#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:44.86#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:18:44.86#ibcon#first serial, iclass 35, count 0 2006.229.11:18:44.86#ibcon#enter sib2, iclass 35, count 0 2006.229.11:18:44.86#ibcon#flushed, iclass 35, count 0 2006.229.11:18:44.86#ibcon#about to write, iclass 35, count 0 2006.229.11:18:44.86#ibcon#wrote, iclass 35, count 0 2006.229.11:18:44.86#ibcon#about to read 3, iclass 35, count 0 2006.229.11:18:44.88#ibcon#read 3, iclass 35, count 0 2006.229.11:18:44.88#ibcon#about to read 4, iclass 35, count 0 2006.229.11:18:44.88#ibcon#read 4, iclass 35, count 0 2006.229.11:18:44.88#ibcon#about to read 5, iclass 35, count 0 2006.229.11:18:44.88#ibcon#read 5, iclass 35, count 0 2006.229.11:18:44.88#ibcon#about to read 6, iclass 35, count 0 2006.229.11:18:44.88#ibcon#read 6, iclass 35, count 0 2006.229.11:18:44.88#ibcon#end of sib2, iclass 35, count 0 2006.229.11:18:44.88#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:18:44.88#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:18:44.88#ibcon#[25=USB\r\n] 2006.229.11:18:44.88#ibcon#*before write, iclass 35, count 0 2006.229.11:18:44.88#ibcon#enter sib2, iclass 35, count 0 2006.229.11:18:44.88#ibcon#flushed, iclass 35, count 0 2006.229.11:18:44.88#ibcon#about to write, iclass 35, count 0 2006.229.11:18:44.88#ibcon#wrote, iclass 35, count 0 2006.229.11:18:44.88#ibcon#about to read 3, iclass 35, count 0 2006.229.11:18:44.91#ibcon#read 3, iclass 35, count 0 2006.229.11:18:44.91#ibcon#about to read 4, iclass 35, count 0 2006.229.11:18:44.91#ibcon#read 4, iclass 35, count 0 2006.229.11:18:44.91#ibcon#about to read 5, iclass 35, count 0 2006.229.11:18:44.91#ibcon#read 5, iclass 35, count 0 2006.229.11:18:44.91#ibcon#about to read 6, iclass 35, count 0 2006.229.11:18:44.91#ibcon#read 6, iclass 35, count 0 2006.229.11:18:44.91#ibcon#end of sib2, iclass 35, count 0 2006.229.11:18:44.91#ibcon#*after write, iclass 35, count 0 2006.229.11:18:44.91#ibcon#*before return 0, iclass 35, count 0 2006.229.11:18:44.91#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:44.91#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:44.91#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:18:44.91#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:18:44.91$vck44/valo=3,564.99 2006.229.11:18:44.91#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:18:44.91#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:18:44.91#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:44.91#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:44.91#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:44.91#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:44.91#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:18:44.91#ibcon#first serial, iclass 37, count 0 2006.229.11:18:44.91#ibcon#enter sib2, iclass 37, count 0 2006.229.11:18:44.91#ibcon#flushed, iclass 37, count 0 2006.229.11:18:44.91#ibcon#about to write, iclass 37, count 0 2006.229.11:18:44.91#ibcon#wrote, iclass 37, count 0 2006.229.11:18:44.91#ibcon#about to read 3, iclass 37, count 0 2006.229.11:18:44.93#ibcon#read 3, iclass 37, count 0 2006.229.11:18:44.93#ibcon#about to read 4, iclass 37, count 0 2006.229.11:18:44.93#ibcon#read 4, iclass 37, count 0 2006.229.11:18:44.93#ibcon#about to read 5, iclass 37, count 0 2006.229.11:18:44.93#ibcon#read 5, iclass 37, count 0 2006.229.11:18:44.93#ibcon#about to read 6, iclass 37, count 0 2006.229.11:18:44.93#ibcon#read 6, iclass 37, count 0 2006.229.11:18:44.93#ibcon#end of sib2, iclass 37, count 0 2006.229.11:18:44.93#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:18:44.93#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:18:44.93#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:18:44.93#ibcon#*before write, iclass 37, count 0 2006.229.11:18:44.93#ibcon#enter sib2, iclass 37, count 0 2006.229.11:18:44.93#ibcon#flushed, iclass 37, count 0 2006.229.11:18:44.93#ibcon#about to write, iclass 37, count 0 2006.229.11:18:44.93#ibcon#wrote, iclass 37, count 0 2006.229.11:18:44.93#ibcon#about to read 3, iclass 37, count 0 2006.229.11:18:44.97#ibcon#read 3, iclass 37, count 0 2006.229.11:18:44.97#ibcon#about to read 4, iclass 37, count 0 2006.229.11:18:44.97#ibcon#read 4, iclass 37, count 0 2006.229.11:18:44.97#ibcon#about to read 5, iclass 37, count 0 2006.229.11:18:44.97#ibcon#read 5, iclass 37, count 0 2006.229.11:18:44.97#ibcon#about to read 6, iclass 37, count 0 2006.229.11:18:44.97#ibcon#read 6, iclass 37, count 0 2006.229.11:18:44.97#ibcon#end of sib2, iclass 37, count 0 2006.229.11:18:44.97#ibcon#*after write, iclass 37, count 0 2006.229.11:18:44.97#ibcon#*before return 0, iclass 37, count 0 2006.229.11:18:44.97#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:44.97#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:44.97#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:18:44.97#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:18:44.97$vck44/va=3,6 2006.229.11:18:44.97#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.11:18:44.97#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.11:18:44.97#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:44.97#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:45.03#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:45.03#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:45.03#ibcon#enter wrdev, iclass 39, count 2 2006.229.11:18:45.03#ibcon#first serial, iclass 39, count 2 2006.229.11:18:45.03#ibcon#enter sib2, iclass 39, count 2 2006.229.11:18:45.03#ibcon#flushed, iclass 39, count 2 2006.229.11:18:45.03#ibcon#about to write, iclass 39, count 2 2006.229.11:18:45.03#ibcon#wrote, iclass 39, count 2 2006.229.11:18:45.03#ibcon#about to read 3, iclass 39, count 2 2006.229.11:18:45.05#ibcon#read 3, iclass 39, count 2 2006.229.11:18:45.05#ibcon#about to read 4, iclass 39, count 2 2006.229.11:18:45.05#ibcon#read 4, iclass 39, count 2 2006.229.11:18:45.05#ibcon#about to read 5, iclass 39, count 2 2006.229.11:18:45.05#ibcon#read 5, iclass 39, count 2 2006.229.11:18:45.05#ibcon#about to read 6, iclass 39, count 2 2006.229.11:18:45.05#ibcon#read 6, iclass 39, count 2 2006.229.11:18:45.05#ibcon#end of sib2, iclass 39, count 2 2006.229.11:18:45.05#ibcon#*mode == 0, iclass 39, count 2 2006.229.11:18:45.05#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.11:18:45.05#ibcon#[25=AT03-06\r\n] 2006.229.11:18:45.05#ibcon#*before write, iclass 39, count 2 2006.229.11:18:45.05#ibcon#enter sib2, iclass 39, count 2 2006.229.11:18:45.05#ibcon#flushed, iclass 39, count 2 2006.229.11:18:45.05#ibcon#about to write, iclass 39, count 2 2006.229.11:18:45.05#ibcon#wrote, iclass 39, count 2 2006.229.11:18:45.05#ibcon#about to read 3, iclass 39, count 2 2006.229.11:18:45.08#ibcon#read 3, iclass 39, count 2 2006.229.11:18:45.08#ibcon#about to read 4, iclass 39, count 2 2006.229.11:18:45.08#ibcon#read 4, iclass 39, count 2 2006.229.11:18:45.08#ibcon#about to read 5, iclass 39, count 2 2006.229.11:18:45.08#ibcon#read 5, iclass 39, count 2 2006.229.11:18:45.08#ibcon#about to read 6, iclass 39, count 2 2006.229.11:18:45.08#ibcon#read 6, iclass 39, count 2 2006.229.11:18:45.08#ibcon#end of sib2, iclass 39, count 2 2006.229.11:18:45.08#ibcon#*after write, iclass 39, count 2 2006.229.11:18:45.08#ibcon#*before return 0, iclass 39, count 2 2006.229.11:18:45.08#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:45.08#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:45.08#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.11:18:45.08#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:45.08#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:45.20#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:45.20#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:45.20#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:18:45.20#ibcon#first serial, iclass 39, count 0 2006.229.11:18:45.20#ibcon#enter sib2, iclass 39, count 0 2006.229.11:18:45.20#ibcon#flushed, iclass 39, count 0 2006.229.11:18:45.20#ibcon#about to write, iclass 39, count 0 2006.229.11:18:45.20#ibcon#wrote, iclass 39, count 0 2006.229.11:18:45.20#ibcon#about to read 3, iclass 39, count 0 2006.229.11:18:45.22#ibcon#read 3, iclass 39, count 0 2006.229.11:18:45.22#ibcon#about to read 4, iclass 39, count 0 2006.229.11:18:45.22#ibcon#read 4, iclass 39, count 0 2006.229.11:18:45.22#ibcon#about to read 5, iclass 39, count 0 2006.229.11:18:45.22#ibcon#read 5, iclass 39, count 0 2006.229.11:18:45.22#ibcon#about to read 6, iclass 39, count 0 2006.229.11:18:45.22#ibcon#read 6, iclass 39, count 0 2006.229.11:18:45.22#ibcon#end of sib2, iclass 39, count 0 2006.229.11:18:45.22#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:18:45.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:18:45.22#ibcon#[25=USB\r\n] 2006.229.11:18:45.22#ibcon#*before write, iclass 39, count 0 2006.229.11:18:45.22#ibcon#enter sib2, iclass 39, count 0 2006.229.11:18:45.22#ibcon#flushed, iclass 39, count 0 2006.229.11:18:45.22#ibcon#about to write, iclass 39, count 0 2006.229.11:18:45.22#ibcon#wrote, iclass 39, count 0 2006.229.11:18:45.22#ibcon#about to read 3, iclass 39, count 0 2006.229.11:18:45.25#ibcon#read 3, iclass 39, count 0 2006.229.11:18:45.25#ibcon#about to read 4, iclass 39, count 0 2006.229.11:18:45.25#ibcon#read 4, iclass 39, count 0 2006.229.11:18:45.25#ibcon#about to read 5, iclass 39, count 0 2006.229.11:18:45.25#ibcon#read 5, iclass 39, count 0 2006.229.11:18:45.25#ibcon#about to read 6, iclass 39, count 0 2006.229.11:18:45.25#ibcon#read 6, iclass 39, count 0 2006.229.11:18:45.25#ibcon#end of sib2, iclass 39, count 0 2006.229.11:18:45.25#ibcon#*after write, iclass 39, count 0 2006.229.11:18:45.25#ibcon#*before return 0, iclass 39, count 0 2006.229.11:18:45.25#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:45.25#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:45.25#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:18:45.25#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:18:45.25$vck44/valo=4,624.99 2006.229.11:18:45.25#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:18:45.25#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:18:45.25#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:45.25#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:45.25#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:45.25#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:45.25#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:18:45.25#ibcon#first serial, iclass 3, count 0 2006.229.11:18:45.25#ibcon#enter sib2, iclass 3, count 0 2006.229.11:18:45.25#ibcon#flushed, iclass 3, count 0 2006.229.11:18:45.25#ibcon#about to write, iclass 3, count 0 2006.229.11:18:45.25#ibcon#wrote, iclass 3, count 0 2006.229.11:18:45.25#ibcon#about to read 3, iclass 3, count 0 2006.229.11:18:45.27#ibcon#read 3, iclass 3, count 0 2006.229.11:18:45.27#ibcon#about to read 4, iclass 3, count 0 2006.229.11:18:45.27#ibcon#read 4, iclass 3, count 0 2006.229.11:18:45.27#ibcon#about to read 5, iclass 3, count 0 2006.229.11:18:45.27#ibcon#read 5, iclass 3, count 0 2006.229.11:18:45.27#ibcon#about to read 6, iclass 3, count 0 2006.229.11:18:45.27#ibcon#read 6, iclass 3, count 0 2006.229.11:18:45.27#ibcon#end of sib2, iclass 3, count 0 2006.229.11:18:45.27#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:18:45.27#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:18:45.27#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:18:45.27#ibcon#*before write, iclass 3, count 0 2006.229.11:18:45.27#ibcon#enter sib2, iclass 3, count 0 2006.229.11:18:45.27#ibcon#flushed, iclass 3, count 0 2006.229.11:18:45.27#ibcon#about to write, iclass 3, count 0 2006.229.11:18:45.27#ibcon#wrote, iclass 3, count 0 2006.229.11:18:45.27#ibcon#about to read 3, iclass 3, count 0 2006.229.11:18:45.31#ibcon#read 3, iclass 3, count 0 2006.229.11:18:45.31#ibcon#about to read 4, iclass 3, count 0 2006.229.11:18:45.31#ibcon#read 4, iclass 3, count 0 2006.229.11:18:45.31#ibcon#about to read 5, iclass 3, count 0 2006.229.11:18:45.31#ibcon#read 5, iclass 3, count 0 2006.229.11:18:45.31#ibcon#about to read 6, iclass 3, count 0 2006.229.11:18:45.31#ibcon#read 6, iclass 3, count 0 2006.229.11:18:45.31#ibcon#end of sib2, iclass 3, count 0 2006.229.11:18:45.31#ibcon#*after write, iclass 3, count 0 2006.229.11:18:45.31#ibcon#*before return 0, iclass 3, count 0 2006.229.11:18:45.31#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:45.31#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:45.31#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:18:45.31#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:18:45.31$vck44/va=4,7 2006.229.11:18:45.31#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.11:18:45.31#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.11:18:45.31#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:45.31#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:45.37#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:45.37#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:45.37#ibcon#enter wrdev, iclass 5, count 2 2006.229.11:18:45.37#ibcon#first serial, iclass 5, count 2 2006.229.11:18:45.37#ibcon#enter sib2, iclass 5, count 2 2006.229.11:18:45.37#ibcon#flushed, iclass 5, count 2 2006.229.11:18:45.37#ibcon#about to write, iclass 5, count 2 2006.229.11:18:45.37#ibcon#wrote, iclass 5, count 2 2006.229.11:18:45.37#ibcon#about to read 3, iclass 5, count 2 2006.229.11:18:45.39#ibcon#read 3, iclass 5, count 2 2006.229.11:18:45.39#ibcon#about to read 4, iclass 5, count 2 2006.229.11:18:45.39#ibcon#read 4, iclass 5, count 2 2006.229.11:18:45.39#ibcon#about to read 5, iclass 5, count 2 2006.229.11:18:45.39#ibcon#read 5, iclass 5, count 2 2006.229.11:18:45.39#ibcon#about to read 6, iclass 5, count 2 2006.229.11:18:45.39#ibcon#read 6, iclass 5, count 2 2006.229.11:18:45.39#ibcon#end of sib2, iclass 5, count 2 2006.229.11:18:45.39#ibcon#*mode == 0, iclass 5, count 2 2006.229.11:18:45.39#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.11:18:45.39#ibcon#[25=AT04-07\r\n] 2006.229.11:18:45.39#ibcon#*before write, iclass 5, count 2 2006.229.11:18:45.39#ibcon#enter sib2, iclass 5, count 2 2006.229.11:18:45.39#ibcon#flushed, iclass 5, count 2 2006.229.11:18:45.39#ibcon#about to write, iclass 5, count 2 2006.229.11:18:45.39#ibcon#wrote, iclass 5, count 2 2006.229.11:18:45.39#ibcon#about to read 3, iclass 5, count 2 2006.229.11:18:45.42#ibcon#read 3, iclass 5, count 2 2006.229.11:18:45.42#ibcon#about to read 4, iclass 5, count 2 2006.229.11:18:45.42#ibcon#read 4, iclass 5, count 2 2006.229.11:18:45.42#ibcon#about to read 5, iclass 5, count 2 2006.229.11:18:45.42#ibcon#read 5, iclass 5, count 2 2006.229.11:18:45.42#ibcon#about to read 6, iclass 5, count 2 2006.229.11:18:45.42#ibcon#read 6, iclass 5, count 2 2006.229.11:18:45.42#ibcon#end of sib2, iclass 5, count 2 2006.229.11:18:45.42#ibcon#*after write, iclass 5, count 2 2006.229.11:18:45.42#ibcon#*before return 0, iclass 5, count 2 2006.229.11:18:45.46#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:45.46#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:45.46#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.11:18:45.46#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:45.46#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:45.58#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:45.58#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:45.58#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:18:45.58#ibcon#first serial, iclass 5, count 0 2006.229.11:18:45.58#ibcon#enter sib2, iclass 5, count 0 2006.229.11:18:45.58#ibcon#flushed, iclass 5, count 0 2006.229.11:18:45.58#ibcon#about to write, iclass 5, count 0 2006.229.11:18:45.58#ibcon#wrote, iclass 5, count 0 2006.229.11:18:45.58#ibcon#about to read 3, iclass 5, count 0 2006.229.11:18:45.60#ibcon#read 3, iclass 5, count 0 2006.229.11:18:45.60#ibcon#about to read 4, iclass 5, count 0 2006.229.11:18:45.60#ibcon#read 4, iclass 5, count 0 2006.229.11:18:45.60#ibcon#about to read 5, iclass 5, count 0 2006.229.11:18:45.60#ibcon#read 5, iclass 5, count 0 2006.229.11:18:45.60#ibcon#about to read 6, iclass 5, count 0 2006.229.11:18:45.60#ibcon#read 6, iclass 5, count 0 2006.229.11:18:45.60#ibcon#end of sib2, iclass 5, count 0 2006.229.11:18:45.60#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:18:45.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:18:45.60#ibcon#[25=USB\r\n] 2006.229.11:18:45.60#ibcon#*before write, iclass 5, count 0 2006.229.11:18:45.60#ibcon#enter sib2, iclass 5, count 0 2006.229.11:18:45.60#ibcon#flushed, iclass 5, count 0 2006.229.11:18:45.60#ibcon#about to write, iclass 5, count 0 2006.229.11:18:45.60#ibcon#wrote, iclass 5, count 0 2006.229.11:18:45.60#ibcon#about to read 3, iclass 5, count 0 2006.229.11:18:45.63#ibcon#read 3, iclass 5, count 0 2006.229.11:18:45.63#ibcon#about to read 4, iclass 5, count 0 2006.229.11:18:45.63#ibcon#read 4, iclass 5, count 0 2006.229.11:18:45.63#ibcon#about to read 5, iclass 5, count 0 2006.229.11:18:45.63#ibcon#read 5, iclass 5, count 0 2006.229.11:18:45.63#ibcon#about to read 6, iclass 5, count 0 2006.229.11:18:45.63#ibcon#read 6, iclass 5, count 0 2006.229.11:18:45.63#ibcon#end of sib2, iclass 5, count 0 2006.229.11:18:45.63#ibcon#*after write, iclass 5, count 0 2006.229.11:18:45.63#ibcon#*before return 0, iclass 5, count 0 2006.229.11:18:45.63#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:45.63#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:45.63#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:18:45.63#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:18:45.63$vck44/valo=5,734.99 2006.229.11:18:45.63#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.11:18:45.63#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.11:18:45.63#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:45.63#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:45.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:45.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:45.63#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:18:45.63#ibcon#first serial, iclass 7, count 0 2006.229.11:18:45.63#ibcon#enter sib2, iclass 7, count 0 2006.229.11:18:45.63#ibcon#flushed, iclass 7, count 0 2006.229.11:18:45.63#ibcon#about to write, iclass 7, count 0 2006.229.11:18:45.63#ibcon#wrote, iclass 7, count 0 2006.229.11:18:45.63#ibcon#about to read 3, iclass 7, count 0 2006.229.11:18:45.65#ibcon#read 3, iclass 7, count 0 2006.229.11:18:45.65#ibcon#about to read 4, iclass 7, count 0 2006.229.11:18:45.65#ibcon#read 4, iclass 7, count 0 2006.229.11:18:45.65#ibcon#about to read 5, iclass 7, count 0 2006.229.11:18:45.65#ibcon#read 5, iclass 7, count 0 2006.229.11:18:45.65#ibcon#about to read 6, iclass 7, count 0 2006.229.11:18:45.65#ibcon#read 6, iclass 7, count 0 2006.229.11:18:45.65#ibcon#end of sib2, iclass 7, count 0 2006.229.11:18:45.65#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:18:45.65#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:18:45.65#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:18:45.65#ibcon#*before write, iclass 7, count 0 2006.229.11:18:45.65#ibcon#enter sib2, iclass 7, count 0 2006.229.11:18:45.65#ibcon#flushed, iclass 7, count 0 2006.229.11:18:45.65#ibcon#about to write, iclass 7, count 0 2006.229.11:18:45.65#ibcon#wrote, iclass 7, count 0 2006.229.11:18:45.65#ibcon#about to read 3, iclass 7, count 0 2006.229.11:18:45.69#ibcon#read 3, iclass 7, count 0 2006.229.11:18:45.69#ibcon#about to read 4, iclass 7, count 0 2006.229.11:18:45.69#ibcon#read 4, iclass 7, count 0 2006.229.11:18:45.69#ibcon#about to read 5, iclass 7, count 0 2006.229.11:18:45.69#ibcon#read 5, iclass 7, count 0 2006.229.11:18:45.69#ibcon#about to read 6, iclass 7, count 0 2006.229.11:18:45.69#ibcon#read 6, iclass 7, count 0 2006.229.11:18:45.69#ibcon#end of sib2, iclass 7, count 0 2006.229.11:18:45.69#ibcon#*after write, iclass 7, count 0 2006.229.11:18:45.69#ibcon#*before return 0, iclass 7, count 0 2006.229.11:18:45.69#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:45.69#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:45.69#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:18:45.69#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:18:45.69$vck44/va=5,4 2006.229.11:18:45.69#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.11:18:45.69#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.11:18:45.69#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:45.69#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:45.75#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:45.75#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:45.75#ibcon#enter wrdev, iclass 11, count 2 2006.229.11:18:45.75#ibcon#first serial, iclass 11, count 2 2006.229.11:18:45.75#ibcon#enter sib2, iclass 11, count 2 2006.229.11:18:45.75#ibcon#flushed, iclass 11, count 2 2006.229.11:18:45.75#ibcon#about to write, iclass 11, count 2 2006.229.11:18:45.75#ibcon#wrote, iclass 11, count 2 2006.229.11:18:45.75#ibcon#about to read 3, iclass 11, count 2 2006.229.11:18:45.77#ibcon#read 3, iclass 11, count 2 2006.229.11:18:45.77#ibcon#about to read 4, iclass 11, count 2 2006.229.11:18:45.77#ibcon#read 4, iclass 11, count 2 2006.229.11:18:45.77#ibcon#about to read 5, iclass 11, count 2 2006.229.11:18:45.77#ibcon#read 5, iclass 11, count 2 2006.229.11:18:45.77#ibcon#about to read 6, iclass 11, count 2 2006.229.11:18:45.77#ibcon#read 6, iclass 11, count 2 2006.229.11:18:45.77#ibcon#end of sib2, iclass 11, count 2 2006.229.11:18:45.77#ibcon#*mode == 0, iclass 11, count 2 2006.229.11:18:45.77#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.11:18:45.77#ibcon#[25=AT05-04\r\n] 2006.229.11:18:45.77#ibcon#*before write, iclass 11, count 2 2006.229.11:18:45.77#ibcon#enter sib2, iclass 11, count 2 2006.229.11:18:45.77#ibcon#flushed, iclass 11, count 2 2006.229.11:18:45.77#ibcon#about to write, iclass 11, count 2 2006.229.11:18:45.77#ibcon#wrote, iclass 11, count 2 2006.229.11:18:45.77#ibcon#about to read 3, iclass 11, count 2 2006.229.11:18:45.80#ibcon#read 3, iclass 11, count 2 2006.229.11:18:45.80#ibcon#about to read 4, iclass 11, count 2 2006.229.11:18:45.80#ibcon#read 4, iclass 11, count 2 2006.229.11:18:45.80#ibcon#about to read 5, iclass 11, count 2 2006.229.11:18:45.80#ibcon#read 5, iclass 11, count 2 2006.229.11:18:45.80#ibcon#about to read 6, iclass 11, count 2 2006.229.11:18:45.80#ibcon#read 6, iclass 11, count 2 2006.229.11:18:45.80#ibcon#end of sib2, iclass 11, count 2 2006.229.11:18:45.80#ibcon#*after write, iclass 11, count 2 2006.229.11:18:45.80#ibcon#*before return 0, iclass 11, count 2 2006.229.11:18:45.80#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:45.80#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:45.80#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.11:18:45.80#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:45.80#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:45.84#abcon#<5=/04 1.9 3.9 28.211001001.9\r\n> 2006.229.11:18:45.86#abcon#{5=INTERFACE CLEAR} 2006.229.11:18:45.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:18:45.92#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:45.92#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:45.92#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:18:45.92#ibcon#first serial, iclass 11, count 0 2006.229.11:18:45.92#ibcon#enter sib2, iclass 11, count 0 2006.229.11:18:45.92#ibcon#flushed, iclass 11, count 0 2006.229.11:18:45.92#ibcon#about to write, iclass 11, count 0 2006.229.11:18:45.92#ibcon#wrote, iclass 11, count 0 2006.229.11:18:45.92#ibcon#about to read 3, iclass 11, count 0 2006.229.11:18:45.94#ibcon#read 3, iclass 11, count 0 2006.229.11:18:45.94#ibcon#about to read 4, iclass 11, count 0 2006.229.11:18:45.94#ibcon#read 4, iclass 11, count 0 2006.229.11:18:45.94#ibcon#about to read 5, iclass 11, count 0 2006.229.11:18:45.94#ibcon#read 5, iclass 11, count 0 2006.229.11:18:45.94#ibcon#about to read 6, iclass 11, count 0 2006.229.11:18:45.94#ibcon#read 6, iclass 11, count 0 2006.229.11:18:45.94#ibcon#end of sib2, iclass 11, count 0 2006.229.11:18:45.94#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:18:45.94#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:18:45.94#ibcon#[25=USB\r\n] 2006.229.11:18:45.94#ibcon#*before write, iclass 11, count 0 2006.229.11:18:45.94#ibcon#enter sib2, iclass 11, count 0 2006.229.11:18:45.94#ibcon#flushed, iclass 11, count 0 2006.229.11:18:45.94#ibcon#about to write, iclass 11, count 0 2006.229.11:18:45.94#ibcon#wrote, iclass 11, count 0 2006.229.11:18:45.94#ibcon#about to read 3, iclass 11, count 0 2006.229.11:18:45.97#ibcon#read 3, iclass 11, count 0 2006.229.11:18:45.97#ibcon#about to read 4, iclass 11, count 0 2006.229.11:18:45.97#ibcon#read 4, iclass 11, count 0 2006.229.11:18:45.97#ibcon#about to read 5, iclass 11, count 0 2006.229.11:18:45.97#ibcon#read 5, iclass 11, count 0 2006.229.11:18:45.97#ibcon#about to read 6, iclass 11, count 0 2006.229.11:18:45.97#ibcon#read 6, iclass 11, count 0 2006.229.11:18:45.97#ibcon#end of sib2, iclass 11, count 0 2006.229.11:18:45.97#ibcon#*after write, iclass 11, count 0 2006.229.11:18:45.97#ibcon#*before return 0, iclass 11, count 0 2006.229.11:18:45.97#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:45.97#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:45.97#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:18:45.97#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:18:45.97$vck44/valo=6,814.99 2006.229.11:18:45.97#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.11:18:45.97#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.11:18:45.97#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:45.97#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:45.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:45.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:45.97#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:18:45.97#ibcon#first serial, iclass 17, count 0 2006.229.11:18:45.97#ibcon#enter sib2, iclass 17, count 0 2006.229.11:18:45.97#ibcon#flushed, iclass 17, count 0 2006.229.11:18:45.97#ibcon#about to write, iclass 17, count 0 2006.229.11:18:45.97#ibcon#wrote, iclass 17, count 0 2006.229.11:18:45.97#ibcon#about to read 3, iclass 17, count 0 2006.229.11:18:45.99#ibcon#read 3, iclass 17, count 0 2006.229.11:18:45.99#ibcon#about to read 4, iclass 17, count 0 2006.229.11:18:45.99#ibcon#read 4, iclass 17, count 0 2006.229.11:18:45.99#ibcon#about to read 5, iclass 17, count 0 2006.229.11:18:45.99#ibcon#read 5, iclass 17, count 0 2006.229.11:18:45.99#ibcon#about to read 6, iclass 17, count 0 2006.229.11:18:45.99#ibcon#read 6, iclass 17, count 0 2006.229.11:18:45.99#ibcon#end of sib2, iclass 17, count 0 2006.229.11:18:45.99#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:18:45.99#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:18:45.99#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:18:45.99#ibcon#*before write, iclass 17, count 0 2006.229.11:18:45.99#ibcon#enter sib2, iclass 17, count 0 2006.229.11:18:45.99#ibcon#flushed, iclass 17, count 0 2006.229.11:18:45.99#ibcon#about to write, iclass 17, count 0 2006.229.11:18:45.99#ibcon#wrote, iclass 17, count 0 2006.229.11:18:45.99#ibcon#about to read 3, iclass 17, count 0 2006.229.11:18:46.03#ibcon#read 3, iclass 17, count 0 2006.229.11:18:46.03#ibcon#about to read 4, iclass 17, count 0 2006.229.11:18:46.03#ibcon#read 4, iclass 17, count 0 2006.229.11:18:46.03#ibcon#about to read 5, iclass 17, count 0 2006.229.11:18:46.03#ibcon#read 5, iclass 17, count 0 2006.229.11:18:46.03#ibcon#about to read 6, iclass 17, count 0 2006.229.11:18:46.03#ibcon#read 6, iclass 17, count 0 2006.229.11:18:46.03#ibcon#end of sib2, iclass 17, count 0 2006.229.11:18:46.03#ibcon#*after write, iclass 17, count 0 2006.229.11:18:46.03#ibcon#*before return 0, iclass 17, count 0 2006.229.11:18:46.03#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:46.03#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:46.03#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:18:46.03#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:18:46.03$vck44/va=6,4 2006.229.11:18:46.03#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.11:18:46.03#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.11:18:46.03#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:46.03#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:46.09#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:46.09#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:46.09#ibcon#enter wrdev, iclass 19, count 2 2006.229.11:18:46.09#ibcon#first serial, iclass 19, count 2 2006.229.11:18:46.09#ibcon#enter sib2, iclass 19, count 2 2006.229.11:18:46.09#ibcon#flushed, iclass 19, count 2 2006.229.11:18:46.09#ibcon#about to write, iclass 19, count 2 2006.229.11:18:46.09#ibcon#wrote, iclass 19, count 2 2006.229.11:18:46.09#ibcon#about to read 3, iclass 19, count 2 2006.229.11:18:46.11#ibcon#read 3, iclass 19, count 2 2006.229.11:18:46.11#ibcon#about to read 4, iclass 19, count 2 2006.229.11:18:46.11#ibcon#read 4, iclass 19, count 2 2006.229.11:18:46.11#ibcon#about to read 5, iclass 19, count 2 2006.229.11:18:46.11#ibcon#read 5, iclass 19, count 2 2006.229.11:18:46.11#ibcon#about to read 6, iclass 19, count 2 2006.229.11:18:46.11#ibcon#read 6, iclass 19, count 2 2006.229.11:18:46.11#ibcon#end of sib2, iclass 19, count 2 2006.229.11:18:46.11#ibcon#*mode == 0, iclass 19, count 2 2006.229.11:18:46.11#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.11:18:46.11#ibcon#[25=AT06-04\r\n] 2006.229.11:18:46.11#ibcon#*before write, iclass 19, count 2 2006.229.11:18:46.11#ibcon#enter sib2, iclass 19, count 2 2006.229.11:18:46.11#ibcon#flushed, iclass 19, count 2 2006.229.11:18:46.11#ibcon#about to write, iclass 19, count 2 2006.229.11:18:46.11#ibcon#wrote, iclass 19, count 2 2006.229.11:18:46.11#ibcon#about to read 3, iclass 19, count 2 2006.229.11:18:46.14#ibcon#read 3, iclass 19, count 2 2006.229.11:18:46.14#ibcon#about to read 4, iclass 19, count 2 2006.229.11:18:46.14#ibcon#read 4, iclass 19, count 2 2006.229.11:18:46.14#ibcon#about to read 5, iclass 19, count 2 2006.229.11:18:46.14#ibcon#read 5, iclass 19, count 2 2006.229.11:18:46.14#ibcon#about to read 6, iclass 19, count 2 2006.229.11:18:46.14#ibcon#read 6, iclass 19, count 2 2006.229.11:18:46.14#ibcon#end of sib2, iclass 19, count 2 2006.229.11:18:46.14#ibcon#*after write, iclass 19, count 2 2006.229.11:18:46.14#ibcon#*before return 0, iclass 19, count 2 2006.229.11:18:46.14#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:46.14#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:46.14#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.11:18:46.14#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:46.14#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:46.26#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:46.26#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:46.26#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:18:46.26#ibcon#first serial, iclass 19, count 0 2006.229.11:18:46.26#ibcon#enter sib2, iclass 19, count 0 2006.229.11:18:46.26#ibcon#flushed, iclass 19, count 0 2006.229.11:18:46.26#ibcon#about to write, iclass 19, count 0 2006.229.11:18:46.26#ibcon#wrote, iclass 19, count 0 2006.229.11:18:46.26#ibcon#about to read 3, iclass 19, count 0 2006.229.11:18:46.28#ibcon#read 3, iclass 19, count 0 2006.229.11:18:46.28#ibcon#about to read 4, iclass 19, count 0 2006.229.11:18:46.28#ibcon#read 4, iclass 19, count 0 2006.229.11:18:46.28#ibcon#about to read 5, iclass 19, count 0 2006.229.11:18:46.28#ibcon#read 5, iclass 19, count 0 2006.229.11:18:46.28#ibcon#about to read 6, iclass 19, count 0 2006.229.11:18:46.28#ibcon#read 6, iclass 19, count 0 2006.229.11:18:46.28#ibcon#end of sib2, iclass 19, count 0 2006.229.11:18:46.28#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:18:46.28#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:18:46.28#ibcon#[25=USB\r\n] 2006.229.11:18:46.28#ibcon#*before write, iclass 19, count 0 2006.229.11:18:46.28#ibcon#enter sib2, iclass 19, count 0 2006.229.11:18:46.28#ibcon#flushed, iclass 19, count 0 2006.229.11:18:46.28#ibcon#about to write, iclass 19, count 0 2006.229.11:18:46.28#ibcon#wrote, iclass 19, count 0 2006.229.11:18:46.28#ibcon#about to read 3, iclass 19, count 0 2006.229.11:18:46.31#ibcon#read 3, iclass 19, count 0 2006.229.11:18:46.31#ibcon#about to read 4, iclass 19, count 0 2006.229.11:18:46.31#ibcon#read 4, iclass 19, count 0 2006.229.11:18:46.31#ibcon#about to read 5, iclass 19, count 0 2006.229.11:18:46.31#ibcon#read 5, iclass 19, count 0 2006.229.11:18:46.31#ibcon#about to read 6, iclass 19, count 0 2006.229.11:18:46.31#ibcon#read 6, iclass 19, count 0 2006.229.11:18:46.31#ibcon#end of sib2, iclass 19, count 0 2006.229.11:18:46.31#ibcon#*after write, iclass 19, count 0 2006.229.11:18:46.31#ibcon#*before return 0, iclass 19, count 0 2006.229.11:18:46.31#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:46.31#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:46.31#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:18:46.31#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:18:46.31$vck44/valo=7,864.99 2006.229.11:18:46.31#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.11:18:46.31#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.11:18:46.31#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:46.31#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:46.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:46.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:46.31#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:18:46.31#ibcon#first serial, iclass 21, count 0 2006.229.11:18:46.31#ibcon#enter sib2, iclass 21, count 0 2006.229.11:18:46.31#ibcon#flushed, iclass 21, count 0 2006.229.11:18:46.31#ibcon#about to write, iclass 21, count 0 2006.229.11:18:46.31#ibcon#wrote, iclass 21, count 0 2006.229.11:18:46.31#ibcon#about to read 3, iclass 21, count 0 2006.229.11:18:46.33#ibcon#read 3, iclass 21, count 0 2006.229.11:18:46.33#ibcon#about to read 4, iclass 21, count 0 2006.229.11:18:46.33#ibcon#read 4, iclass 21, count 0 2006.229.11:18:46.33#ibcon#about to read 5, iclass 21, count 0 2006.229.11:18:46.33#ibcon#read 5, iclass 21, count 0 2006.229.11:18:46.33#ibcon#about to read 6, iclass 21, count 0 2006.229.11:18:46.33#ibcon#read 6, iclass 21, count 0 2006.229.11:18:46.33#ibcon#end of sib2, iclass 21, count 0 2006.229.11:18:46.33#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:18:46.33#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:18:46.33#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:18:46.33#ibcon#*before write, iclass 21, count 0 2006.229.11:18:46.33#ibcon#enter sib2, iclass 21, count 0 2006.229.11:18:46.33#ibcon#flushed, iclass 21, count 0 2006.229.11:18:46.33#ibcon#about to write, iclass 21, count 0 2006.229.11:18:46.33#ibcon#wrote, iclass 21, count 0 2006.229.11:18:46.33#ibcon#about to read 3, iclass 21, count 0 2006.229.11:18:46.37#ibcon#read 3, iclass 21, count 0 2006.229.11:18:46.37#ibcon#about to read 4, iclass 21, count 0 2006.229.11:18:46.37#ibcon#read 4, iclass 21, count 0 2006.229.11:18:46.37#ibcon#about to read 5, iclass 21, count 0 2006.229.11:18:46.37#ibcon#read 5, iclass 21, count 0 2006.229.11:18:46.37#ibcon#about to read 6, iclass 21, count 0 2006.229.11:18:46.37#ibcon#read 6, iclass 21, count 0 2006.229.11:18:46.37#ibcon#end of sib2, iclass 21, count 0 2006.229.11:18:46.37#ibcon#*after write, iclass 21, count 0 2006.229.11:18:46.37#ibcon#*before return 0, iclass 21, count 0 2006.229.11:18:46.37#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:46.37#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:46.37#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:18:46.37#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:18:46.37$vck44/va=7,5 2006.229.11:18:46.37#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.11:18:46.37#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.11:18:46.37#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:46.37#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:46.43#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:46.43#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:46.43#ibcon#enter wrdev, iclass 23, count 2 2006.229.11:18:46.43#ibcon#first serial, iclass 23, count 2 2006.229.11:18:46.43#ibcon#enter sib2, iclass 23, count 2 2006.229.11:18:46.43#ibcon#flushed, iclass 23, count 2 2006.229.11:18:46.43#ibcon#about to write, iclass 23, count 2 2006.229.11:18:46.43#ibcon#wrote, iclass 23, count 2 2006.229.11:18:46.43#ibcon#about to read 3, iclass 23, count 2 2006.229.11:18:46.45#ibcon#read 3, iclass 23, count 2 2006.229.11:18:46.45#ibcon#about to read 4, iclass 23, count 2 2006.229.11:18:46.45#ibcon#read 4, iclass 23, count 2 2006.229.11:18:46.45#ibcon#about to read 5, iclass 23, count 2 2006.229.11:18:46.45#ibcon#read 5, iclass 23, count 2 2006.229.11:18:46.45#ibcon#about to read 6, iclass 23, count 2 2006.229.11:18:46.45#ibcon#read 6, iclass 23, count 2 2006.229.11:18:46.45#ibcon#end of sib2, iclass 23, count 2 2006.229.11:18:46.45#ibcon#*mode == 0, iclass 23, count 2 2006.229.11:18:46.45#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.11:18:46.45#ibcon#[25=AT07-05\r\n] 2006.229.11:18:46.45#ibcon#*before write, iclass 23, count 2 2006.229.11:18:46.45#ibcon#enter sib2, iclass 23, count 2 2006.229.11:18:46.45#ibcon#flushed, iclass 23, count 2 2006.229.11:18:46.45#ibcon#about to write, iclass 23, count 2 2006.229.11:18:46.45#ibcon#wrote, iclass 23, count 2 2006.229.11:18:46.45#ibcon#about to read 3, iclass 23, count 2 2006.229.11:18:46.48#ibcon#read 3, iclass 23, count 2 2006.229.11:18:46.48#ibcon#about to read 4, iclass 23, count 2 2006.229.11:18:46.48#ibcon#read 4, iclass 23, count 2 2006.229.11:18:46.48#ibcon#about to read 5, iclass 23, count 2 2006.229.11:18:46.48#ibcon#read 5, iclass 23, count 2 2006.229.11:18:46.48#ibcon#about to read 6, iclass 23, count 2 2006.229.11:18:46.48#ibcon#read 6, iclass 23, count 2 2006.229.11:18:46.48#ibcon#end of sib2, iclass 23, count 2 2006.229.11:18:46.48#ibcon#*after write, iclass 23, count 2 2006.229.11:18:46.48#ibcon#*before return 0, iclass 23, count 2 2006.229.11:18:46.48#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:46.48#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:46.48#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.11:18:46.48#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:46.48#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:46.60#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:46.60#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:46.60#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:18:46.60#ibcon#first serial, iclass 23, count 0 2006.229.11:18:46.60#ibcon#enter sib2, iclass 23, count 0 2006.229.11:18:46.60#ibcon#flushed, iclass 23, count 0 2006.229.11:18:46.60#ibcon#about to write, iclass 23, count 0 2006.229.11:18:46.60#ibcon#wrote, iclass 23, count 0 2006.229.11:18:46.60#ibcon#about to read 3, iclass 23, count 0 2006.229.11:18:46.62#ibcon#read 3, iclass 23, count 0 2006.229.11:18:46.62#ibcon#about to read 4, iclass 23, count 0 2006.229.11:18:46.62#ibcon#read 4, iclass 23, count 0 2006.229.11:18:46.62#ibcon#about to read 5, iclass 23, count 0 2006.229.11:18:46.62#ibcon#read 5, iclass 23, count 0 2006.229.11:18:46.62#ibcon#about to read 6, iclass 23, count 0 2006.229.11:18:46.62#ibcon#read 6, iclass 23, count 0 2006.229.11:18:46.62#ibcon#end of sib2, iclass 23, count 0 2006.229.11:18:46.62#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:18:46.62#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:18:46.62#ibcon#[25=USB\r\n] 2006.229.11:18:46.62#ibcon#*before write, iclass 23, count 0 2006.229.11:18:46.62#ibcon#enter sib2, iclass 23, count 0 2006.229.11:18:46.62#ibcon#flushed, iclass 23, count 0 2006.229.11:18:46.62#ibcon#about to write, iclass 23, count 0 2006.229.11:18:46.62#ibcon#wrote, iclass 23, count 0 2006.229.11:18:46.62#ibcon#about to read 3, iclass 23, count 0 2006.229.11:18:46.65#ibcon#read 3, iclass 23, count 0 2006.229.11:18:46.65#ibcon#about to read 4, iclass 23, count 0 2006.229.11:18:46.65#ibcon#read 4, iclass 23, count 0 2006.229.11:18:46.65#ibcon#about to read 5, iclass 23, count 0 2006.229.11:18:46.65#ibcon#read 5, iclass 23, count 0 2006.229.11:18:46.65#ibcon#about to read 6, iclass 23, count 0 2006.229.11:18:46.65#ibcon#read 6, iclass 23, count 0 2006.229.11:18:46.65#ibcon#end of sib2, iclass 23, count 0 2006.229.11:18:46.65#ibcon#*after write, iclass 23, count 0 2006.229.11:18:46.65#ibcon#*before return 0, iclass 23, count 0 2006.229.11:18:46.65#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:46.65#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:46.65#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:18:46.65#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:18:46.65$vck44/valo=8,884.99 2006.229.11:18:46.65#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.11:18:46.65#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.11:18:46.65#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:46.65#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:46.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:46.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:46.65#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:18:46.65#ibcon#first serial, iclass 25, count 0 2006.229.11:18:46.65#ibcon#enter sib2, iclass 25, count 0 2006.229.11:18:46.65#ibcon#flushed, iclass 25, count 0 2006.229.11:18:46.65#ibcon#about to write, iclass 25, count 0 2006.229.11:18:46.65#ibcon#wrote, iclass 25, count 0 2006.229.11:18:46.65#ibcon#about to read 3, iclass 25, count 0 2006.229.11:18:46.67#ibcon#read 3, iclass 25, count 0 2006.229.11:18:46.67#ibcon#about to read 4, iclass 25, count 0 2006.229.11:18:46.67#ibcon#read 4, iclass 25, count 0 2006.229.11:18:46.67#ibcon#about to read 5, iclass 25, count 0 2006.229.11:18:46.67#ibcon#read 5, iclass 25, count 0 2006.229.11:18:46.67#ibcon#about to read 6, iclass 25, count 0 2006.229.11:18:46.67#ibcon#read 6, iclass 25, count 0 2006.229.11:18:46.67#ibcon#end of sib2, iclass 25, count 0 2006.229.11:18:46.67#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:18:46.67#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:18:46.67#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:18:46.67#ibcon#*before write, iclass 25, count 0 2006.229.11:18:46.67#ibcon#enter sib2, iclass 25, count 0 2006.229.11:18:46.67#ibcon#flushed, iclass 25, count 0 2006.229.11:18:46.67#ibcon#about to write, iclass 25, count 0 2006.229.11:18:46.67#ibcon#wrote, iclass 25, count 0 2006.229.11:18:46.67#ibcon#about to read 3, iclass 25, count 0 2006.229.11:18:46.71#ibcon#read 3, iclass 25, count 0 2006.229.11:18:46.71#ibcon#about to read 4, iclass 25, count 0 2006.229.11:18:46.71#ibcon#read 4, iclass 25, count 0 2006.229.11:18:46.71#ibcon#about to read 5, iclass 25, count 0 2006.229.11:18:46.71#ibcon#read 5, iclass 25, count 0 2006.229.11:18:46.71#ibcon#about to read 6, iclass 25, count 0 2006.229.11:18:46.71#ibcon#read 6, iclass 25, count 0 2006.229.11:18:46.71#ibcon#end of sib2, iclass 25, count 0 2006.229.11:18:46.71#ibcon#*after write, iclass 25, count 0 2006.229.11:18:46.71#ibcon#*before return 0, iclass 25, count 0 2006.229.11:18:46.71#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:46.71#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:46.71#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:18:46.71#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:18:46.71$vck44/va=8,6 2006.229.11:18:46.71#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.11:18:46.71#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.11:18:46.71#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:46.71#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:18:46.77#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:18:46.77#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:18:46.77#ibcon#enter wrdev, iclass 27, count 2 2006.229.11:18:46.77#ibcon#first serial, iclass 27, count 2 2006.229.11:18:46.77#ibcon#enter sib2, iclass 27, count 2 2006.229.11:18:46.77#ibcon#flushed, iclass 27, count 2 2006.229.11:18:46.77#ibcon#about to write, iclass 27, count 2 2006.229.11:18:46.77#ibcon#wrote, iclass 27, count 2 2006.229.11:18:46.77#ibcon#about to read 3, iclass 27, count 2 2006.229.11:18:46.79#ibcon#read 3, iclass 27, count 2 2006.229.11:18:46.79#ibcon#about to read 4, iclass 27, count 2 2006.229.11:18:46.79#ibcon#read 4, iclass 27, count 2 2006.229.11:18:46.79#ibcon#about to read 5, iclass 27, count 2 2006.229.11:18:46.79#ibcon#read 5, iclass 27, count 2 2006.229.11:18:46.79#ibcon#about to read 6, iclass 27, count 2 2006.229.11:18:46.79#ibcon#read 6, iclass 27, count 2 2006.229.11:18:46.79#ibcon#end of sib2, iclass 27, count 2 2006.229.11:18:46.79#ibcon#*mode == 0, iclass 27, count 2 2006.229.11:18:46.79#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.11:18:46.79#ibcon#[25=AT08-06\r\n] 2006.229.11:18:46.79#ibcon#*before write, iclass 27, count 2 2006.229.11:18:46.79#ibcon#enter sib2, iclass 27, count 2 2006.229.11:18:46.79#ibcon#flushed, iclass 27, count 2 2006.229.11:18:46.79#ibcon#about to write, iclass 27, count 2 2006.229.11:18:46.79#ibcon#wrote, iclass 27, count 2 2006.229.11:18:46.79#ibcon#about to read 3, iclass 27, count 2 2006.229.11:18:46.82#ibcon#read 3, iclass 27, count 2 2006.229.11:18:46.82#ibcon#about to read 4, iclass 27, count 2 2006.229.11:18:46.82#ibcon#read 4, iclass 27, count 2 2006.229.11:18:46.82#ibcon#about to read 5, iclass 27, count 2 2006.229.11:18:46.82#ibcon#read 5, iclass 27, count 2 2006.229.11:18:46.82#ibcon#about to read 6, iclass 27, count 2 2006.229.11:18:46.82#ibcon#read 6, iclass 27, count 2 2006.229.11:18:46.82#ibcon#end of sib2, iclass 27, count 2 2006.229.11:18:46.82#ibcon#*after write, iclass 27, count 2 2006.229.11:18:46.82#ibcon#*before return 0, iclass 27, count 2 2006.229.11:18:46.82#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:18:46.82#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:18:46.82#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.11:18:46.82#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:46.82#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:18:46.94#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:18:46.94#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:18:46.94#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:18:46.94#ibcon#first serial, iclass 27, count 0 2006.229.11:18:46.94#ibcon#enter sib2, iclass 27, count 0 2006.229.11:18:46.94#ibcon#flushed, iclass 27, count 0 2006.229.11:18:46.94#ibcon#about to write, iclass 27, count 0 2006.229.11:18:46.94#ibcon#wrote, iclass 27, count 0 2006.229.11:18:46.94#ibcon#about to read 3, iclass 27, count 0 2006.229.11:18:46.96#ibcon#read 3, iclass 27, count 0 2006.229.11:18:46.96#ibcon#about to read 4, iclass 27, count 0 2006.229.11:18:46.96#ibcon#read 4, iclass 27, count 0 2006.229.11:18:46.96#ibcon#about to read 5, iclass 27, count 0 2006.229.11:18:46.96#ibcon#read 5, iclass 27, count 0 2006.229.11:18:46.96#ibcon#about to read 6, iclass 27, count 0 2006.229.11:18:46.96#ibcon#read 6, iclass 27, count 0 2006.229.11:18:46.96#ibcon#end of sib2, iclass 27, count 0 2006.229.11:18:46.96#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:18:46.96#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:18:46.96#ibcon#[25=USB\r\n] 2006.229.11:18:46.96#ibcon#*before write, iclass 27, count 0 2006.229.11:18:46.96#ibcon#enter sib2, iclass 27, count 0 2006.229.11:18:46.96#ibcon#flushed, iclass 27, count 0 2006.229.11:18:46.96#ibcon#about to write, iclass 27, count 0 2006.229.11:18:46.96#ibcon#wrote, iclass 27, count 0 2006.229.11:18:46.96#ibcon#about to read 3, iclass 27, count 0 2006.229.11:18:46.99#ibcon#read 3, iclass 27, count 0 2006.229.11:18:46.99#ibcon#about to read 4, iclass 27, count 0 2006.229.11:18:46.99#ibcon#read 4, iclass 27, count 0 2006.229.11:18:46.99#ibcon#about to read 5, iclass 27, count 0 2006.229.11:18:46.99#ibcon#read 5, iclass 27, count 0 2006.229.11:18:46.99#ibcon#about to read 6, iclass 27, count 0 2006.229.11:18:46.99#ibcon#read 6, iclass 27, count 0 2006.229.11:18:46.99#ibcon#end of sib2, iclass 27, count 0 2006.229.11:18:46.99#ibcon#*after write, iclass 27, count 0 2006.229.11:18:46.99#ibcon#*before return 0, iclass 27, count 0 2006.229.11:18:46.99#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:18:46.99#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:18:46.99#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:18:46.99#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:18:46.99$vck44/vblo=1,629.99 2006.229.11:18:46.99#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.11:18:46.99#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.11:18:46.99#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:46.99#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:46.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:46.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:46.99#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:18:46.99#ibcon#first serial, iclass 29, count 0 2006.229.11:18:46.99#ibcon#enter sib2, iclass 29, count 0 2006.229.11:18:46.99#ibcon#flushed, iclass 29, count 0 2006.229.11:18:46.99#ibcon#about to write, iclass 29, count 0 2006.229.11:18:46.99#ibcon#wrote, iclass 29, count 0 2006.229.11:18:46.99#ibcon#about to read 3, iclass 29, count 0 2006.229.11:18:47.01#ibcon#read 3, iclass 29, count 0 2006.229.11:18:47.01#ibcon#about to read 4, iclass 29, count 0 2006.229.11:18:47.01#ibcon#read 4, iclass 29, count 0 2006.229.11:18:47.01#ibcon#about to read 5, iclass 29, count 0 2006.229.11:18:47.01#ibcon#read 5, iclass 29, count 0 2006.229.11:18:47.01#ibcon#about to read 6, iclass 29, count 0 2006.229.11:18:47.01#ibcon#read 6, iclass 29, count 0 2006.229.11:18:47.01#ibcon#end of sib2, iclass 29, count 0 2006.229.11:18:47.01#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:18:47.01#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:18:47.01#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:18:47.01#ibcon#*before write, iclass 29, count 0 2006.229.11:18:47.01#ibcon#enter sib2, iclass 29, count 0 2006.229.11:18:47.01#ibcon#flushed, iclass 29, count 0 2006.229.11:18:47.01#ibcon#about to write, iclass 29, count 0 2006.229.11:18:47.01#ibcon#wrote, iclass 29, count 0 2006.229.11:18:47.01#ibcon#about to read 3, iclass 29, count 0 2006.229.11:18:47.05#ibcon#read 3, iclass 29, count 0 2006.229.11:18:47.05#ibcon#about to read 4, iclass 29, count 0 2006.229.11:18:47.05#ibcon#read 4, iclass 29, count 0 2006.229.11:18:47.05#ibcon#about to read 5, iclass 29, count 0 2006.229.11:18:47.05#ibcon#read 5, iclass 29, count 0 2006.229.11:18:47.05#ibcon#about to read 6, iclass 29, count 0 2006.229.11:18:47.05#ibcon#read 6, iclass 29, count 0 2006.229.11:18:47.05#ibcon#end of sib2, iclass 29, count 0 2006.229.11:18:47.05#ibcon#*after write, iclass 29, count 0 2006.229.11:18:47.05#ibcon#*before return 0, iclass 29, count 0 2006.229.11:18:47.05#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:47.05#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:18:47.05#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:18:47.05#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:18:47.05$vck44/vb=1,4 2006.229.11:18:47.05#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.11:18:47.05#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.11:18:47.05#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:47.05#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:47.05#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:47.05#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:47.05#ibcon#enter wrdev, iclass 31, count 2 2006.229.11:18:47.05#ibcon#first serial, iclass 31, count 2 2006.229.11:18:47.05#ibcon#enter sib2, iclass 31, count 2 2006.229.11:18:47.05#ibcon#flushed, iclass 31, count 2 2006.229.11:18:47.05#ibcon#about to write, iclass 31, count 2 2006.229.11:18:47.05#ibcon#wrote, iclass 31, count 2 2006.229.11:18:47.05#ibcon#about to read 3, iclass 31, count 2 2006.229.11:18:47.07#ibcon#read 3, iclass 31, count 2 2006.229.11:18:47.07#ibcon#about to read 4, iclass 31, count 2 2006.229.11:18:47.07#ibcon#read 4, iclass 31, count 2 2006.229.11:18:47.07#ibcon#about to read 5, iclass 31, count 2 2006.229.11:18:47.07#ibcon#read 5, iclass 31, count 2 2006.229.11:18:47.07#ibcon#about to read 6, iclass 31, count 2 2006.229.11:18:47.07#ibcon#read 6, iclass 31, count 2 2006.229.11:18:47.07#ibcon#end of sib2, iclass 31, count 2 2006.229.11:18:47.07#ibcon#*mode == 0, iclass 31, count 2 2006.229.11:18:47.07#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.11:18:47.07#ibcon#[27=AT01-04\r\n] 2006.229.11:18:47.07#ibcon#*before write, iclass 31, count 2 2006.229.11:18:47.07#ibcon#enter sib2, iclass 31, count 2 2006.229.11:18:47.07#ibcon#flushed, iclass 31, count 2 2006.229.11:18:47.07#ibcon#about to write, iclass 31, count 2 2006.229.11:18:47.07#ibcon#wrote, iclass 31, count 2 2006.229.11:18:47.07#ibcon#about to read 3, iclass 31, count 2 2006.229.11:18:47.10#ibcon#read 3, iclass 31, count 2 2006.229.11:18:47.10#ibcon#about to read 4, iclass 31, count 2 2006.229.11:18:47.10#ibcon#read 4, iclass 31, count 2 2006.229.11:18:47.10#ibcon#about to read 5, iclass 31, count 2 2006.229.11:18:47.10#ibcon#read 5, iclass 31, count 2 2006.229.11:18:47.10#ibcon#about to read 6, iclass 31, count 2 2006.229.11:18:47.10#ibcon#read 6, iclass 31, count 2 2006.229.11:18:47.10#ibcon#end of sib2, iclass 31, count 2 2006.229.11:18:47.10#ibcon#*after write, iclass 31, count 2 2006.229.11:18:47.10#ibcon#*before return 0, iclass 31, count 2 2006.229.11:18:47.10#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:47.10#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:18:47.10#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.11:18:47.10#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:47.10#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:47.22#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:47.22#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:47.22#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:18:47.22#ibcon#first serial, iclass 31, count 0 2006.229.11:18:47.22#ibcon#enter sib2, iclass 31, count 0 2006.229.11:18:47.22#ibcon#flushed, iclass 31, count 0 2006.229.11:18:47.22#ibcon#about to write, iclass 31, count 0 2006.229.11:18:47.22#ibcon#wrote, iclass 31, count 0 2006.229.11:18:47.22#ibcon#about to read 3, iclass 31, count 0 2006.229.11:18:47.24#ibcon#read 3, iclass 31, count 0 2006.229.11:18:47.24#ibcon#about to read 4, iclass 31, count 0 2006.229.11:18:47.24#ibcon#read 4, iclass 31, count 0 2006.229.11:18:47.24#ibcon#about to read 5, iclass 31, count 0 2006.229.11:18:47.24#ibcon#read 5, iclass 31, count 0 2006.229.11:18:47.24#ibcon#about to read 6, iclass 31, count 0 2006.229.11:18:47.24#ibcon#read 6, iclass 31, count 0 2006.229.11:18:47.24#ibcon#end of sib2, iclass 31, count 0 2006.229.11:18:47.24#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:18:47.24#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:18:47.24#ibcon#[27=USB\r\n] 2006.229.11:18:47.24#ibcon#*before write, iclass 31, count 0 2006.229.11:18:47.24#ibcon#enter sib2, iclass 31, count 0 2006.229.11:18:47.24#ibcon#flushed, iclass 31, count 0 2006.229.11:18:47.24#ibcon#about to write, iclass 31, count 0 2006.229.11:18:47.24#ibcon#wrote, iclass 31, count 0 2006.229.11:18:47.24#ibcon#about to read 3, iclass 31, count 0 2006.229.11:18:47.27#ibcon#read 3, iclass 31, count 0 2006.229.11:18:47.27#ibcon#about to read 4, iclass 31, count 0 2006.229.11:18:47.27#ibcon#read 4, iclass 31, count 0 2006.229.11:18:47.27#ibcon#about to read 5, iclass 31, count 0 2006.229.11:18:47.27#ibcon#read 5, iclass 31, count 0 2006.229.11:18:47.27#ibcon#about to read 6, iclass 31, count 0 2006.229.11:18:47.27#ibcon#read 6, iclass 31, count 0 2006.229.11:18:47.27#ibcon#end of sib2, iclass 31, count 0 2006.229.11:18:47.27#ibcon#*after write, iclass 31, count 0 2006.229.11:18:47.27#ibcon#*before return 0, iclass 31, count 0 2006.229.11:18:47.27#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:47.27#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:18:47.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:18:47.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:18:47.27$vck44/vblo=2,634.99 2006.229.11:18:47.27#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.11:18:47.27#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.11:18:47.27#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:47.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:47.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:47.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:47.27#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:18:47.27#ibcon#first serial, iclass 33, count 0 2006.229.11:18:47.27#ibcon#enter sib2, iclass 33, count 0 2006.229.11:18:47.27#ibcon#flushed, iclass 33, count 0 2006.229.11:18:47.27#ibcon#about to write, iclass 33, count 0 2006.229.11:18:47.27#ibcon#wrote, iclass 33, count 0 2006.229.11:18:47.27#ibcon#about to read 3, iclass 33, count 0 2006.229.11:18:47.29#ibcon#read 3, iclass 33, count 0 2006.229.11:18:47.29#ibcon#about to read 4, iclass 33, count 0 2006.229.11:18:47.29#ibcon#read 4, iclass 33, count 0 2006.229.11:18:47.29#ibcon#about to read 5, iclass 33, count 0 2006.229.11:18:47.29#ibcon#read 5, iclass 33, count 0 2006.229.11:18:47.29#ibcon#about to read 6, iclass 33, count 0 2006.229.11:18:47.29#ibcon#read 6, iclass 33, count 0 2006.229.11:18:47.29#ibcon#end of sib2, iclass 33, count 0 2006.229.11:18:47.29#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:18:47.29#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:18:47.29#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:18:47.29#ibcon#*before write, iclass 33, count 0 2006.229.11:18:47.29#ibcon#enter sib2, iclass 33, count 0 2006.229.11:18:47.29#ibcon#flushed, iclass 33, count 0 2006.229.11:18:47.29#ibcon#about to write, iclass 33, count 0 2006.229.11:18:47.29#ibcon#wrote, iclass 33, count 0 2006.229.11:18:47.29#ibcon#about to read 3, iclass 33, count 0 2006.229.11:18:47.33#ibcon#read 3, iclass 33, count 0 2006.229.11:18:47.33#ibcon#about to read 4, iclass 33, count 0 2006.229.11:18:47.33#ibcon#read 4, iclass 33, count 0 2006.229.11:18:47.33#ibcon#about to read 5, iclass 33, count 0 2006.229.11:18:47.33#ibcon#read 5, iclass 33, count 0 2006.229.11:18:47.33#ibcon#about to read 6, iclass 33, count 0 2006.229.11:18:47.33#ibcon#read 6, iclass 33, count 0 2006.229.11:18:47.33#ibcon#end of sib2, iclass 33, count 0 2006.229.11:18:47.33#ibcon#*after write, iclass 33, count 0 2006.229.11:18:47.33#ibcon#*before return 0, iclass 33, count 0 2006.229.11:18:47.33#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:47.33#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:18:47.33#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:18:47.33#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:18:47.33$vck44/vb=2,4 2006.229.11:18:47.33#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.11:18:47.33#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.11:18:47.33#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:47.33#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:47.39#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:47.39#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:47.39#ibcon#enter wrdev, iclass 35, count 2 2006.229.11:18:47.39#ibcon#first serial, iclass 35, count 2 2006.229.11:18:47.39#ibcon#enter sib2, iclass 35, count 2 2006.229.11:18:47.39#ibcon#flushed, iclass 35, count 2 2006.229.11:18:47.39#ibcon#about to write, iclass 35, count 2 2006.229.11:18:47.39#ibcon#wrote, iclass 35, count 2 2006.229.11:18:47.39#ibcon#about to read 3, iclass 35, count 2 2006.229.11:18:47.41#ibcon#read 3, iclass 35, count 2 2006.229.11:18:47.41#ibcon#about to read 4, iclass 35, count 2 2006.229.11:18:47.41#ibcon#read 4, iclass 35, count 2 2006.229.11:18:47.41#ibcon#about to read 5, iclass 35, count 2 2006.229.11:18:47.41#ibcon#read 5, iclass 35, count 2 2006.229.11:18:47.41#ibcon#about to read 6, iclass 35, count 2 2006.229.11:18:47.41#ibcon#read 6, iclass 35, count 2 2006.229.11:18:47.41#ibcon#end of sib2, iclass 35, count 2 2006.229.11:18:47.41#ibcon#*mode == 0, iclass 35, count 2 2006.229.11:18:47.41#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.11:18:47.41#ibcon#[27=AT02-04\r\n] 2006.229.11:18:47.41#ibcon#*before write, iclass 35, count 2 2006.229.11:18:47.41#ibcon#enter sib2, iclass 35, count 2 2006.229.11:18:47.41#ibcon#flushed, iclass 35, count 2 2006.229.11:18:47.41#ibcon#about to write, iclass 35, count 2 2006.229.11:18:47.41#ibcon#wrote, iclass 35, count 2 2006.229.11:18:47.41#ibcon#about to read 3, iclass 35, count 2 2006.229.11:18:47.44#ibcon#read 3, iclass 35, count 2 2006.229.11:18:47.44#ibcon#about to read 4, iclass 35, count 2 2006.229.11:18:47.44#ibcon#read 4, iclass 35, count 2 2006.229.11:18:47.44#ibcon#about to read 5, iclass 35, count 2 2006.229.11:18:47.44#ibcon#read 5, iclass 35, count 2 2006.229.11:18:47.44#ibcon#about to read 6, iclass 35, count 2 2006.229.11:18:47.44#ibcon#read 6, iclass 35, count 2 2006.229.11:18:47.44#ibcon#end of sib2, iclass 35, count 2 2006.229.11:18:47.44#ibcon#*after write, iclass 35, count 2 2006.229.11:18:47.44#ibcon#*before return 0, iclass 35, count 2 2006.229.11:18:47.44#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:47.44#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:18:47.44#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.11:18:47.44#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:47.44#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:47.56#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:47.56#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:47.56#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:18:47.56#ibcon#first serial, iclass 35, count 0 2006.229.11:18:47.56#ibcon#enter sib2, iclass 35, count 0 2006.229.11:18:47.56#ibcon#flushed, iclass 35, count 0 2006.229.11:18:47.56#ibcon#about to write, iclass 35, count 0 2006.229.11:18:47.56#ibcon#wrote, iclass 35, count 0 2006.229.11:18:47.56#ibcon#about to read 3, iclass 35, count 0 2006.229.11:18:47.58#ibcon#read 3, iclass 35, count 0 2006.229.11:18:47.58#ibcon#about to read 4, iclass 35, count 0 2006.229.11:18:47.58#ibcon#read 4, iclass 35, count 0 2006.229.11:18:47.58#ibcon#about to read 5, iclass 35, count 0 2006.229.11:18:47.58#ibcon#read 5, iclass 35, count 0 2006.229.11:18:47.58#ibcon#about to read 6, iclass 35, count 0 2006.229.11:18:47.58#ibcon#read 6, iclass 35, count 0 2006.229.11:18:47.58#ibcon#end of sib2, iclass 35, count 0 2006.229.11:18:47.58#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:18:47.58#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:18:47.58#ibcon#[27=USB\r\n] 2006.229.11:18:47.58#ibcon#*before write, iclass 35, count 0 2006.229.11:18:47.58#ibcon#enter sib2, iclass 35, count 0 2006.229.11:18:47.58#ibcon#flushed, iclass 35, count 0 2006.229.11:18:47.58#ibcon#about to write, iclass 35, count 0 2006.229.11:18:47.58#ibcon#wrote, iclass 35, count 0 2006.229.11:18:47.58#ibcon#about to read 3, iclass 35, count 0 2006.229.11:18:47.61#ibcon#read 3, iclass 35, count 0 2006.229.11:18:47.61#ibcon#about to read 4, iclass 35, count 0 2006.229.11:18:47.61#ibcon#read 4, iclass 35, count 0 2006.229.11:18:47.61#ibcon#about to read 5, iclass 35, count 0 2006.229.11:18:47.61#ibcon#read 5, iclass 35, count 0 2006.229.11:18:47.61#ibcon#about to read 6, iclass 35, count 0 2006.229.11:18:47.61#ibcon#read 6, iclass 35, count 0 2006.229.11:18:47.61#ibcon#end of sib2, iclass 35, count 0 2006.229.11:18:47.61#ibcon#*after write, iclass 35, count 0 2006.229.11:18:47.61#ibcon#*before return 0, iclass 35, count 0 2006.229.11:18:47.61#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:47.61#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:18:47.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:18:47.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:18:47.61$vck44/vblo=3,649.99 2006.229.11:18:47.61#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:18:47.61#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:18:47.61#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:47.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:47.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:47.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:47.61#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:18:47.61#ibcon#first serial, iclass 37, count 0 2006.229.11:18:47.61#ibcon#enter sib2, iclass 37, count 0 2006.229.11:18:47.61#ibcon#flushed, iclass 37, count 0 2006.229.11:18:47.61#ibcon#about to write, iclass 37, count 0 2006.229.11:18:47.61#ibcon#wrote, iclass 37, count 0 2006.229.11:18:47.61#ibcon#about to read 3, iclass 37, count 0 2006.229.11:18:47.63#ibcon#read 3, iclass 37, count 0 2006.229.11:18:47.63#ibcon#about to read 4, iclass 37, count 0 2006.229.11:18:47.63#ibcon#read 4, iclass 37, count 0 2006.229.11:18:47.63#ibcon#about to read 5, iclass 37, count 0 2006.229.11:18:47.63#ibcon#read 5, iclass 37, count 0 2006.229.11:18:47.63#ibcon#about to read 6, iclass 37, count 0 2006.229.11:18:47.63#ibcon#read 6, iclass 37, count 0 2006.229.11:18:47.63#ibcon#end of sib2, iclass 37, count 0 2006.229.11:18:47.63#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:18:47.63#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:18:47.63#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:18:47.63#ibcon#*before write, iclass 37, count 0 2006.229.11:18:47.63#ibcon#enter sib2, iclass 37, count 0 2006.229.11:18:47.63#ibcon#flushed, iclass 37, count 0 2006.229.11:18:47.63#ibcon#about to write, iclass 37, count 0 2006.229.11:18:47.63#ibcon#wrote, iclass 37, count 0 2006.229.11:18:47.63#ibcon#about to read 3, iclass 37, count 0 2006.229.11:18:47.67#ibcon#read 3, iclass 37, count 0 2006.229.11:18:47.67#ibcon#about to read 4, iclass 37, count 0 2006.229.11:18:47.67#ibcon#read 4, iclass 37, count 0 2006.229.11:18:47.67#ibcon#about to read 5, iclass 37, count 0 2006.229.11:18:47.67#ibcon#read 5, iclass 37, count 0 2006.229.11:18:47.67#ibcon#about to read 6, iclass 37, count 0 2006.229.11:18:47.67#ibcon#read 6, iclass 37, count 0 2006.229.11:18:47.67#ibcon#end of sib2, iclass 37, count 0 2006.229.11:18:47.67#ibcon#*after write, iclass 37, count 0 2006.229.11:18:47.67#ibcon#*before return 0, iclass 37, count 0 2006.229.11:18:47.67#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:47.67#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:18:47.67#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:18:47.67#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:18:47.67$vck44/vb=3,4 2006.229.11:18:47.67#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.11:18:47.67#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.11:18:47.67#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:47.67#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:47.73#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:47.73#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:47.73#ibcon#enter wrdev, iclass 39, count 2 2006.229.11:18:47.73#ibcon#first serial, iclass 39, count 2 2006.229.11:18:47.73#ibcon#enter sib2, iclass 39, count 2 2006.229.11:18:47.73#ibcon#flushed, iclass 39, count 2 2006.229.11:18:47.73#ibcon#about to write, iclass 39, count 2 2006.229.11:18:47.73#ibcon#wrote, iclass 39, count 2 2006.229.11:18:47.73#ibcon#about to read 3, iclass 39, count 2 2006.229.11:18:47.75#ibcon#read 3, iclass 39, count 2 2006.229.11:18:47.75#ibcon#about to read 4, iclass 39, count 2 2006.229.11:18:47.75#ibcon#read 4, iclass 39, count 2 2006.229.11:18:47.75#ibcon#about to read 5, iclass 39, count 2 2006.229.11:18:47.75#ibcon#read 5, iclass 39, count 2 2006.229.11:18:47.75#ibcon#about to read 6, iclass 39, count 2 2006.229.11:18:47.75#ibcon#read 6, iclass 39, count 2 2006.229.11:18:47.75#ibcon#end of sib2, iclass 39, count 2 2006.229.11:18:47.75#ibcon#*mode == 0, iclass 39, count 2 2006.229.11:18:47.75#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.11:18:47.75#ibcon#[27=AT03-04\r\n] 2006.229.11:18:47.75#ibcon#*before write, iclass 39, count 2 2006.229.11:18:47.75#ibcon#enter sib2, iclass 39, count 2 2006.229.11:18:47.75#ibcon#flushed, iclass 39, count 2 2006.229.11:18:47.75#ibcon#about to write, iclass 39, count 2 2006.229.11:18:47.75#ibcon#wrote, iclass 39, count 2 2006.229.11:18:47.75#ibcon#about to read 3, iclass 39, count 2 2006.229.11:18:47.78#ibcon#read 3, iclass 39, count 2 2006.229.11:18:47.78#ibcon#about to read 4, iclass 39, count 2 2006.229.11:18:47.78#ibcon#read 4, iclass 39, count 2 2006.229.11:18:47.78#ibcon#about to read 5, iclass 39, count 2 2006.229.11:18:47.78#ibcon#read 5, iclass 39, count 2 2006.229.11:18:47.78#ibcon#about to read 6, iclass 39, count 2 2006.229.11:18:47.78#ibcon#read 6, iclass 39, count 2 2006.229.11:18:47.78#ibcon#end of sib2, iclass 39, count 2 2006.229.11:18:47.78#ibcon#*after write, iclass 39, count 2 2006.229.11:18:47.78#ibcon#*before return 0, iclass 39, count 2 2006.229.11:18:47.78#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:47.78#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:18:47.78#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.11:18:47.78#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:47.78#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:47.90#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:47.90#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:47.90#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:18:47.90#ibcon#first serial, iclass 39, count 0 2006.229.11:18:47.90#ibcon#enter sib2, iclass 39, count 0 2006.229.11:18:47.90#ibcon#flushed, iclass 39, count 0 2006.229.11:18:47.90#ibcon#about to write, iclass 39, count 0 2006.229.11:18:47.90#ibcon#wrote, iclass 39, count 0 2006.229.11:18:47.90#ibcon#about to read 3, iclass 39, count 0 2006.229.11:18:47.92#ibcon#read 3, iclass 39, count 0 2006.229.11:18:47.92#ibcon#about to read 4, iclass 39, count 0 2006.229.11:18:47.92#ibcon#read 4, iclass 39, count 0 2006.229.11:18:47.92#ibcon#about to read 5, iclass 39, count 0 2006.229.11:18:47.92#ibcon#read 5, iclass 39, count 0 2006.229.11:18:47.92#ibcon#about to read 6, iclass 39, count 0 2006.229.11:18:47.92#ibcon#read 6, iclass 39, count 0 2006.229.11:18:47.92#ibcon#end of sib2, iclass 39, count 0 2006.229.11:18:47.92#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:18:47.92#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:18:47.92#ibcon#[27=USB\r\n] 2006.229.11:18:47.92#ibcon#*before write, iclass 39, count 0 2006.229.11:18:47.92#ibcon#enter sib2, iclass 39, count 0 2006.229.11:18:47.92#ibcon#flushed, iclass 39, count 0 2006.229.11:18:47.92#ibcon#about to write, iclass 39, count 0 2006.229.11:18:47.92#ibcon#wrote, iclass 39, count 0 2006.229.11:18:47.92#ibcon#about to read 3, iclass 39, count 0 2006.229.11:18:47.95#ibcon#read 3, iclass 39, count 0 2006.229.11:18:47.95#ibcon#about to read 4, iclass 39, count 0 2006.229.11:18:47.95#ibcon#read 4, iclass 39, count 0 2006.229.11:18:47.95#ibcon#about to read 5, iclass 39, count 0 2006.229.11:18:47.95#ibcon#read 5, iclass 39, count 0 2006.229.11:18:47.95#ibcon#about to read 6, iclass 39, count 0 2006.229.11:18:47.95#ibcon#read 6, iclass 39, count 0 2006.229.11:18:47.95#ibcon#end of sib2, iclass 39, count 0 2006.229.11:18:47.95#ibcon#*after write, iclass 39, count 0 2006.229.11:18:47.95#ibcon#*before return 0, iclass 39, count 0 2006.229.11:18:47.95#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:47.95#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:18:47.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:18:47.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:18:47.95$vck44/vblo=4,679.99 2006.229.11:18:47.95#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:18:47.95#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:18:47.95#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:47.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:47.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:47.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:47.95#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:18:47.95#ibcon#first serial, iclass 3, count 0 2006.229.11:18:47.95#ibcon#enter sib2, iclass 3, count 0 2006.229.11:18:47.95#ibcon#flushed, iclass 3, count 0 2006.229.11:18:47.95#ibcon#about to write, iclass 3, count 0 2006.229.11:18:47.95#ibcon#wrote, iclass 3, count 0 2006.229.11:18:47.95#ibcon#about to read 3, iclass 3, count 0 2006.229.11:18:47.97#ibcon#read 3, iclass 3, count 0 2006.229.11:18:47.97#ibcon#about to read 4, iclass 3, count 0 2006.229.11:18:47.97#ibcon#read 4, iclass 3, count 0 2006.229.11:18:47.97#ibcon#about to read 5, iclass 3, count 0 2006.229.11:18:47.97#ibcon#read 5, iclass 3, count 0 2006.229.11:18:47.97#ibcon#about to read 6, iclass 3, count 0 2006.229.11:18:47.97#ibcon#read 6, iclass 3, count 0 2006.229.11:18:47.97#ibcon#end of sib2, iclass 3, count 0 2006.229.11:18:47.97#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:18:47.97#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:18:47.97#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:18:47.97#ibcon#*before write, iclass 3, count 0 2006.229.11:18:47.97#ibcon#enter sib2, iclass 3, count 0 2006.229.11:18:47.97#ibcon#flushed, iclass 3, count 0 2006.229.11:18:47.97#ibcon#about to write, iclass 3, count 0 2006.229.11:18:47.97#ibcon#wrote, iclass 3, count 0 2006.229.11:18:47.97#ibcon#about to read 3, iclass 3, count 0 2006.229.11:18:48.01#ibcon#read 3, iclass 3, count 0 2006.229.11:18:48.01#ibcon#about to read 4, iclass 3, count 0 2006.229.11:18:48.01#ibcon#read 4, iclass 3, count 0 2006.229.11:18:48.01#ibcon#about to read 5, iclass 3, count 0 2006.229.11:18:48.01#ibcon#read 5, iclass 3, count 0 2006.229.11:18:48.01#ibcon#about to read 6, iclass 3, count 0 2006.229.11:18:48.01#ibcon#read 6, iclass 3, count 0 2006.229.11:18:48.01#ibcon#end of sib2, iclass 3, count 0 2006.229.11:18:48.01#ibcon#*after write, iclass 3, count 0 2006.229.11:18:48.01#ibcon#*before return 0, iclass 3, count 0 2006.229.11:18:48.01#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:48.01#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:18:48.01#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:18:48.01#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:18:48.01$vck44/vb=4,4 2006.229.11:18:48.01#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.11:18:48.01#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.11:18:48.01#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:48.01#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:48.07#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:48.07#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:48.07#ibcon#enter wrdev, iclass 5, count 2 2006.229.11:18:48.07#ibcon#first serial, iclass 5, count 2 2006.229.11:18:48.07#ibcon#enter sib2, iclass 5, count 2 2006.229.11:18:48.07#ibcon#flushed, iclass 5, count 2 2006.229.11:18:48.07#ibcon#about to write, iclass 5, count 2 2006.229.11:18:48.07#ibcon#wrote, iclass 5, count 2 2006.229.11:18:48.07#ibcon#about to read 3, iclass 5, count 2 2006.229.11:18:48.09#ibcon#read 3, iclass 5, count 2 2006.229.11:18:48.09#ibcon#about to read 4, iclass 5, count 2 2006.229.11:18:48.09#ibcon#read 4, iclass 5, count 2 2006.229.11:18:48.09#ibcon#about to read 5, iclass 5, count 2 2006.229.11:18:48.09#ibcon#read 5, iclass 5, count 2 2006.229.11:18:48.09#ibcon#about to read 6, iclass 5, count 2 2006.229.11:18:48.09#ibcon#read 6, iclass 5, count 2 2006.229.11:18:48.09#ibcon#end of sib2, iclass 5, count 2 2006.229.11:18:48.09#ibcon#*mode == 0, iclass 5, count 2 2006.229.11:18:48.09#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.11:18:48.09#ibcon#[27=AT04-04\r\n] 2006.229.11:18:48.09#ibcon#*before write, iclass 5, count 2 2006.229.11:18:48.09#ibcon#enter sib2, iclass 5, count 2 2006.229.11:18:48.09#ibcon#flushed, iclass 5, count 2 2006.229.11:18:48.09#ibcon#about to write, iclass 5, count 2 2006.229.11:18:48.09#ibcon#wrote, iclass 5, count 2 2006.229.11:18:48.09#ibcon#about to read 3, iclass 5, count 2 2006.229.11:18:48.12#ibcon#read 3, iclass 5, count 2 2006.229.11:18:48.12#ibcon#about to read 4, iclass 5, count 2 2006.229.11:18:48.12#ibcon#read 4, iclass 5, count 2 2006.229.11:18:48.12#ibcon#about to read 5, iclass 5, count 2 2006.229.11:18:48.12#ibcon#read 5, iclass 5, count 2 2006.229.11:18:48.12#ibcon#about to read 6, iclass 5, count 2 2006.229.11:18:48.12#ibcon#read 6, iclass 5, count 2 2006.229.11:18:48.12#ibcon#end of sib2, iclass 5, count 2 2006.229.11:18:48.12#ibcon#*after write, iclass 5, count 2 2006.229.11:18:48.12#ibcon#*before return 0, iclass 5, count 2 2006.229.11:18:48.12#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:48.12#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:18:48.12#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.11:18:48.12#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:48.12#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:48.24#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:48.24#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:48.24#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:18:48.24#ibcon#first serial, iclass 5, count 0 2006.229.11:18:48.24#ibcon#enter sib2, iclass 5, count 0 2006.229.11:18:48.24#ibcon#flushed, iclass 5, count 0 2006.229.11:18:48.24#ibcon#about to write, iclass 5, count 0 2006.229.11:18:48.24#ibcon#wrote, iclass 5, count 0 2006.229.11:18:48.24#ibcon#about to read 3, iclass 5, count 0 2006.229.11:18:48.26#ibcon#read 3, iclass 5, count 0 2006.229.11:18:48.26#ibcon#about to read 4, iclass 5, count 0 2006.229.11:18:48.26#ibcon#read 4, iclass 5, count 0 2006.229.11:18:48.26#ibcon#about to read 5, iclass 5, count 0 2006.229.11:18:48.26#ibcon#read 5, iclass 5, count 0 2006.229.11:18:48.26#ibcon#about to read 6, iclass 5, count 0 2006.229.11:18:48.26#ibcon#read 6, iclass 5, count 0 2006.229.11:18:48.26#ibcon#end of sib2, iclass 5, count 0 2006.229.11:18:48.26#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:18:48.26#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:18:48.26#ibcon#[27=USB\r\n] 2006.229.11:18:48.26#ibcon#*before write, iclass 5, count 0 2006.229.11:18:48.26#ibcon#enter sib2, iclass 5, count 0 2006.229.11:18:48.26#ibcon#flushed, iclass 5, count 0 2006.229.11:18:48.26#ibcon#about to write, iclass 5, count 0 2006.229.11:18:48.26#ibcon#wrote, iclass 5, count 0 2006.229.11:18:48.26#ibcon#about to read 3, iclass 5, count 0 2006.229.11:18:48.29#ibcon#read 3, iclass 5, count 0 2006.229.11:18:48.29#ibcon#about to read 4, iclass 5, count 0 2006.229.11:18:48.29#ibcon#read 4, iclass 5, count 0 2006.229.11:18:48.29#ibcon#about to read 5, iclass 5, count 0 2006.229.11:18:48.29#ibcon#read 5, iclass 5, count 0 2006.229.11:18:48.29#ibcon#about to read 6, iclass 5, count 0 2006.229.11:18:48.29#ibcon#read 6, iclass 5, count 0 2006.229.11:18:48.29#ibcon#end of sib2, iclass 5, count 0 2006.229.11:18:48.29#ibcon#*after write, iclass 5, count 0 2006.229.11:18:48.29#ibcon#*before return 0, iclass 5, count 0 2006.229.11:18:48.29#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:48.29#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:18:48.29#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:18:48.29#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:18:48.29$vck44/vblo=5,709.99 2006.229.11:18:48.29#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.11:18:48.29#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.11:18:48.29#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:48.29#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:48.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:48.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:48.29#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:18:48.29#ibcon#first serial, iclass 7, count 0 2006.229.11:18:48.29#ibcon#enter sib2, iclass 7, count 0 2006.229.11:18:48.29#ibcon#flushed, iclass 7, count 0 2006.229.11:18:48.29#ibcon#about to write, iclass 7, count 0 2006.229.11:18:48.29#ibcon#wrote, iclass 7, count 0 2006.229.11:18:48.29#ibcon#about to read 3, iclass 7, count 0 2006.229.11:18:48.31#ibcon#read 3, iclass 7, count 0 2006.229.11:18:48.31#ibcon#about to read 4, iclass 7, count 0 2006.229.11:18:48.31#ibcon#read 4, iclass 7, count 0 2006.229.11:18:48.31#ibcon#about to read 5, iclass 7, count 0 2006.229.11:18:48.31#ibcon#read 5, iclass 7, count 0 2006.229.11:18:48.31#ibcon#about to read 6, iclass 7, count 0 2006.229.11:18:48.31#ibcon#read 6, iclass 7, count 0 2006.229.11:18:48.31#ibcon#end of sib2, iclass 7, count 0 2006.229.11:18:48.31#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:18:48.31#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:18:48.31#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:18:48.31#ibcon#*before write, iclass 7, count 0 2006.229.11:18:48.31#ibcon#enter sib2, iclass 7, count 0 2006.229.11:18:48.31#ibcon#flushed, iclass 7, count 0 2006.229.11:18:48.31#ibcon#about to write, iclass 7, count 0 2006.229.11:18:48.31#ibcon#wrote, iclass 7, count 0 2006.229.11:18:48.31#ibcon#about to read 3, iclass 7, count 0 2006.229.11:18:48.35#ibcon#read 3, iclass 7, count 0 2006.229.11:18:48.35#ibcon#about to read 4, iclass 7, count 0 2006.229.11:18:48.35#ibcon#read 4, iclass 7, count 0 2006.229.11:18:48.35#ibcon#about to read 5, iclass 7, count 0 2006.229.11:18:48.35#ibcon#read 5, iclass 7, count 0 2006.229.11:18:48.35#ibcon#about to read 6, iclass 7, count 0 2006.229.11:18:48.35#ibcon#read 6, iclass 7, count 0 2006.229.11:18:48.35#ibcon#end of sib2, iclass 7, count 0 2006.229.11:18:48.35#ibcon#*after write, iclass 7, count 0 2006.229.11:18:48.35#ibcon#*before return 0, iclass 7, count 0 2006.229.11:18:48.35#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:48.35#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:18:48.35#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:18:48.35#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:18:48.35$vck44/vb=5,4 2006.229.11:18:48.35#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.11:18:48.35#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.11:18:48.35#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:48.35#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:48.41#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:48.41#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:48.41#ibcon#enter wrdev, iclass 11, count 2 2006.229.11:18:48.41#ibcon#first serial, iclass 11, count 2 2006.229.11:18:48.41#ibcon#enter sib2, iclass 11, count 2 2006.229.11:18:48.41#ibcon#flushed, iclass 11, count 2 2006.229.11:18:48.41#ibcon#about to write, iclass 11, count 2 2006.229.11:18:48.41#ibcon#wrote, iclass 11, count 2 2006.229.11:18:48.41#ibcon#about to read 3, iclass 11, count 2 2006.229.11:18:48.43#ibcon#read 3, iclass 11, count 2 2006.229.11:18:48.43#ibcon#about to read 4, iclass 11, count 2 2006.229.11:18:48.43#ibcon#read 4, iclass 11, count 2 2006.229.11:18:48.43#ibcon#about to read 5, iclass 11, count 2 2006.229.11:18:48.43#ibcon#read 5, iclass 11, count 2 2006.229.11:18:48.43#ibcon#about to read 6, iclass 11, count 2 2006.229.11:18:48.43#ibcon#read 6, iclass 11, count 2 2006.229.11:18:48.43#ibcon#end of sib2, iclass 11, count 2 2006.229.11:18:48.43#ibcon#*mode == 0, iclass 11, count 2 2006.229.11:18:48.43#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.11:18:48.43#ibcon#[27=AT05-04\r\n] 2006.229.11:18:48.43#ibcon#*before write, iclass 11, count 2 2006.229.11:18:48.43#ibcon#enter sib2, iclass 11, count 2 2006.229.11:18:48.43#ibcon#flushed, iclass 11, count 2 2006.229.11:18:48.43#ibcon#about to write, iclass 11, count 2 2006.229.11:18:48.43#ibcon#wrote, iclass 11, count 2 2006.229.11:18:48.43#ibcon#about to read 3, iclass 11, count 2 2006.229.11:18:48.46#ibcon#read 3, iclass 11, count 2 2006.229.11:18:48.46#ibcon#about to read 4, iclass 11, count 2 2006.229.11:18:48.46#ibcon#read 4, iclass 11, count 2 2006.229.11:18:48.46#ibcon#about to read 5, iclass 11, count 2 2006.229.11:18:48.46#ibcon#read 5, iclass 11, count 2 2006.229.11:18:48.46#ibcon#about to read 6, iclass 11, count 2 2006.229.11:18:48.46#ibcon#read 6, iclass 11, count 2 2006.229.11:18:48.46#ibcon#end of sib2, iclass 11, count 2 2006.229.11:18:48.46#ibcon#*after write, iclass 11, count 2 2006.229.11:18:48.46#ibcon#*before return 0, iclass 11, count 2 2006.229.11:18:48.46#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:48.46#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:18:48.46#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.11:18:48.46#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:48.46#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:48.58#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:48.58#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:48.58#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:18:48.58#ibcon#first serial, iclass 11, count 0 2006.229.11:18:48.58#ibcon#enter sib2, iclass 11, count 0 2006.229.11:18:48.58#ibcon#flushed, iclass 11, count 0 2006.229.11:18:48.58#ibcon#about to write, iclass 11, count 0 2006.229.11:18:48.58#ibcon#wrote, iclass 11, count 0 2006.229.11:18:48.58#ibcon#about to read 3, iclass 11, count 0 2006.229.11:18:48.60#ibcon#read 3, iclass 11, count 0 2006.229.11:18:48.60#ibcon#about to read 4, iclass 11, count 0 2006.229.11:18:48.60#ibcon#read 4, iclass 11, count 0 2006.229.11:18:48.60#ibcon#about to read 5, iclass 11, count 0 2006.229.11:18:48.60#ibcon#read 5, iclass 11, count 0 2006.229.11:18:48.60#ibcon#about to read 6, iclass 11, count 0 2006.229.11:18:48.60#ibcon#read 6, iclass 11, count 0 2006.229.11:18:48.60#ibcon#end of sib2, iclass 11, count 0 2006.229.11:18:48.60#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:18:48.60#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:18:48.60#ibcon#[27=USB\r\n] 2006.229.11:18:48.60#ibcon#*before write, iclass 11, count 0 2006.229.11:18:48.60#ibcon#enter sib2, iclass 11, count 0 2006.229.11:18:48.60#ibcon#flushed, iclass 11, count 0 2006.229.11:18:48.60#ibcon#about to write, iclass 11, count 0 2006.229.11:18:48.60#ibcon#wrote, iclass 11, count 0 2006.229.11:18:48.60#ibcon#about to read 3, iclass 11, count 0 2006.229.11:18:48.63#ibcon#read 3, iclass 11, count 0 2006.229.11:18:48.63#ibcon#about to read 4, iclass 11, count 0 2006.229.11:18:48.63#ibcon#read 4, iclass 11, count 0 2006.229.11:18:48.63#ibcon#about to read 5, iclass 11, count 0 2006.229.11:18:48.63#ibcon#read 5, iclass 11, count 0 2006.229.11:18:48.63#ibcon#about to read 6, iclass 11, count 0 2006.229.11:18:48.63#ibcon#read 6, iclass 11, count 0 2006.229.11:18:48.63#ibcon#end of sib2, iclass 11, count 0 2006.229.11:18:48.63#ibcon#*after write, iclass 11, count 0 2006.229.11:18:48.63#ibcon#*before return 0, iclass 11, count 0 2006.229.11:18:48.63#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:48.63#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:18:48.63#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:18:48.63#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:18:48.63$vck44/vblo=6,719.99 2006.229.11:18:48.63#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.11:18:48.63#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.11:18:48.63#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:48.63#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:18:48.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:18:48.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:18:48.63#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:18:48.63#ibcon#first serial, iclass 13, count 0 2006.229.11:18:48.63#ibcon#enter sib2, iclass 13, count 0 2006.229.11:18:48.63#ibcon#flushed, iclass 13, count 0 2006.229.11:18:48.63#ibcon#about to write, iclass 13, count 0 2006.229.11:18:48.63#ibcon#wrote, iclass 13, count 0 2006.229.11:18:48.63#ibcon#about to read 3, iclass 13, count 0 2006.229.11:18:48.65#ibcon#read 3, iclass 13, count 0 2006.229.11:18:48.65#ibcon#about to read 4, iclass 13, count 0 2006.229.11:18:48.65#ibcon#read 4, iclass 13, count 0 2006.229.11:18:48.65#ibcon#about to read 5, iclass 13, count 0 2006.229.11:18:48.65#ibcon#read 5, iclass 13, count 0 2006.229.11:18:48.65#ibcon#about to read 6, iclass 13, count 0 2006.229.11:18:48.65#ibcon#read 6, iclass 13, count 0 2006.229.11:18:48.65#ibcon#end of sib2, iclass 13, count 0 2006.229.11:18:48.65#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:18:48.65#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:18:48.65#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:18:48.65#ibcon#*before write, iclass 13, count 0 2006.229.11:18:48.65#ibcon#enter sib2, iclass 13, count 0 2006.229.11:18:48.65#ibcon#flushed, iclass 13, count 0 2006.229.11:18:48.65#ibcon#about to write, iclass 13, count 0 2006.229.11:18:48.65#ibcon#wrote, iclass 13, count 0 2006.229.11:18:48.65#ibcon#about to read 3, iclass 13, count 0 2006.229.11:18:48.69#ibcon#read 3, iclass 13, count 0 2006.229.11:18:48.69#ibcon#about to read 4, iclass 13, count 0 2006.229.11:18:48.69#ibcon#read 4, iclass 13, count 0 2006.229.11:18:48.69#ibcon#about to read 5, iclass 13, count 0 2006.229.11:18:48.69#ibcon#read 5, iclass 13, count 0 2006.229.11:18:48.69#ibcon#about to read 6, iclass 13, count 0 2006.229.11:18:48.69#ibcon#read 6, iclass 13, count 0 2006.229.11:18:48.69#ibcon#end of sib2, iclass 13, count 0 2006.229.11:18:48.69#ibcon#*after write, iclass 13, count 0 2006.229.11:18:48.69#ibcon#*before return 0, iclass 13, count 0 2006.229.11:18:48.69#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:18:48.69#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:18:48.69#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:18:48.69#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:18:48.69$vck44/vb=6,4 2006.229.11:18:48.69#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.11:18:48.69#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.11:18:48.69#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:48.69#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:18:48.75#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:18:48.75#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:18:48.75#ibcon#enter wrdev, iclass 15, count 2 2006.229.11:18:48.75#ibcon#first serial, iclass 15, count 2 2006.229.11:18:48.75#ibcon#enter sib2, iclass 15, count 2 2006.229.11:18:48.75#ibcon#flushed, iclass 15, count 2 2006.229.11:18:48.75#ibcon#about to write, iclass 15, count 2 2006.229.11:18:48.75#ibcon#wrote, iclass 15, count 2 2006.229.11:18:48.75#ibcon#about to read 3, iclass 15, count 2 2006.229.11:18:48.77#ibcon#read 3, iclass 15, count 2 2006.229.11:18:48.77#ibcon#about to read 4, iclass 15, count 2 2006.229.11:18:48.77#ibcon#read 4, iclass 15, count 2 2006.229.11:18:48.77#ibcon#about to read 5, iclass 15, count 2 2006.229.11:18:48.77#ibcon#read 5, iclass 15, count 2 2006.229.11:18:48.77#ibcon#about to read 6, iclass 15, count 2 2006.229.11:18:48.77#ibcon#read 6, iclass 15, count 2 2006.229.11:18:48.77#ibcon#end of sib2, iclass 15, count 2 2006.229.11:18:48.77#ibcon#*mode == 0, iclass 15, count 2 2006.229.11:18:48.77#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.11:18:48.77#ibcon#[27=AT06-04\r\n] 2006.229.11:18:48.77#ibcon#*before write, iclass 15, count 2 2006.229.11:18:48.77#ibcon#enter sib2, iclass 15, count 2 2006.229.11:18:48.77#ibcon#flushed, iclass 15, count 2 2006.229.11:18:48.77#ibcon#about to write, iclass 15, count 2 2006.229.11:18:48.77#ibcon#wrote, iclass 15, count 2 2006.229.11:18:48.77#ibcon#about to read 3, iclass 15, count 2 2006.229.11:18:48.80#ibcon#read 3, iclass 15, count 2 2006.229.11:18:48.80#ibcon#about to read 4, iclass 15, count 2 2006.229.11:18:48.80#ibcon#read 4, iclass 15, count 2 2006.229.11:18:48.80#ibcon#about to read 5, iclass 15, count 2 2006.229.11:18:48.80#ibcon#read 5, iclass 15, count 2 2006.229.11:18:48.80#ibcon#about to read 6, iclass 15, count 2 2006.229.11:18:48.80#ibcon#read 6, iclass 15, count 2 2006.229.11:18:48.80#ibcon#end of sib2, iclass 15, count 2 2006.229.11:18:48.80#ibcon#*after write, iclass 15, count 2 2006.229.11:18:48.80#ibcon#*before return 0, iclass 15, count 2 2006.229.11:18:48.80#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:18:48.80#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:18:48.80#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.11:18:48.80#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:48.80#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:18:48.92#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:18:48.92#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:18:48.92#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:18:48.92#ibcon#first serial, iclass 15, count 0 2006.229.11:18:48.92#ibcon#enter sib2, iclass 15, count 0 2006.229.11:18:48.92#ibcon#flushed, iclass 15, count 0 2006.229.11:18:48.92#ibcon#about to write, iclass 15, count 0 2006.229.11:18:48.92#ibcon#wrote, iclass 15, count 0 2006.229.11:18:48.92#ibcon#about to read 3, iclass 15, count 0 2006.229.11:18:48.94#ibcon#read 3, iclass 15, count 0 2006.229.11:18:48.94#ibcon#about to read 4, iclass 15, count 0 2006.229.11:18:48.94#ibcon#read 4, iclass 15, count 0 2006.229.11:18:48.94#ibcon#about to read 5, iclass 15, count 0 2006.229.11:18:48.94#ibcon#read 5, iclass 15, count 0 2006.229.11:18:48.94#ibcon#about to read 6, iclass 15, count 0 2006.229.11:18:48.94#ibcon#read 6, iclass 15, count 0 2006.229.11:18:48.94#ibcon#end of sib2, iclass 15, count 0 2006.229.11:18:48.94#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:18:48.94#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:18:48.94#ibcon#[27=USB\r\n] 2006.229.11:18:48.94#ibcon#*before write, iclass 15, count 0 2006.229.11:18:48.94#ibcon#enter sib2, iclass 15, count 0 2006.229.11:18:48.94#ibcon#flushed, iclass 15, count 0 2006.229.11:18:48.94#ibcon#about to write, iclass 15, count 0 2006.229.11:18:48.94#ibcon#wrote, iclass 15, count 0 2006.229.11:18:48.94#ibcon#about to read 3, iclass 15, count 0 2006.229.11:18:48.97#ibcon#read 3, iclass 15, count 0 2006.229.11:18:48.97#ibcon#about to read 4, iclass 15, count 0 2006.229.11:18:48.97#ibcon#read 4, iclass 15, count 0 2006.229.11:18:48.97#ibcon#about to read 5, iclass 15, count 0 2006.229.11:18:48.97#ibcon#read 5, iclass 15, count 0 2006.229.11:18:48.97#ibcon#about to read 6, iclass 15, count 0 2006.229.11:18:48.97#ibcon#read 6, iclass 15, count 0 2006.229.11:18:48.97#ibcon#end of sib2, iclass 15, count 0 2006.229.11:18:48.97#ibcon#*after write, iclass 15, count 0 2006.229.11:18:48.97#ibcon#*before return 0, iclass 15, count 0 2006.229.11:18:48.97#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:18:48.97#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:18:48.97#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:18:48.97#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:18:48.97$vck44/vblo=7,734.99 2006.229.11:18:48.97#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.11:18:48.97#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.11:18:48.97#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:48.97#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:48.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:48.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:48.97#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:18:48.97#ibcon#first serial, iclass 17, count 0 2006.229.11:18:48.97#ibcon#enter sib2, iclass 17, count 0 2006.229.11:18:48.97#ibcon#flushed, iclass 17, count 0 2006.229.11:18:48.97#ibcon#about to write, iclass 17, count 0 2006.229.11:18:48.97#ibcon#wrote, iclass 17, count 0 2006.229.11:18:48.97#ibcon#about to read 3, iclass 17, count 0 2006.229.11:18:48.99#ibcon#read 3, iclass 17, count 0 2006.229.11:18:48.99#ibcon#about to read 4, iclass 17, count 0 2006.229.11:18:48.99#ibcon#read 4, iclass 17, count 0 2006.229.11:18:48.99#ibcon#about to read 5, iclass 17, count 0 2006.229.11:18:48.99#ibcon#read 5, iclass 17, count 0 2006.229.11:18:48.99#ibcon#about to read 6, iclass 17, count 0 2006.229.11:18:48.99#ibcon#read 6, iclass 17, count 0 2006.229.11:18:48.99#ibcon#end of sib2, iclass 17, count 0 2006.229.11:18:48.99#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:18:48.99#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:18:48.99#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:18:48.99#ibcon#*before write, iclass 17, count 0 2006.229.11:18:48.99#ibcon#enter sib2, iclass 17, count 0 2006.229.11:18:48.99#ibcon#flushed, iclass 17, count 0 2006.229.11:18:48.99#ibcon#about to write, iclass 17, count 0 2006.229.11:18:48.99#ibcon#wrote, iclass 17, count 0 2006.229.11:18:48.99#ibcon#about to read 3, iclass 17, count 0 2006.229.11:18:49.03#ibcon#read 3, iclass 17, count 0 2006.229.11:18:49.03#ibcon#about to read 4, iclass 17, count 0 2006.229.11:18:49.03#ibcon#read 4, iclass 17, count 0 2006.229.11:18:49.03#ibcon#about to read 5, iclass 17, count 0 2006.229.11:18:49.03#ibcon#read 5, iclass 17, count 0 2006.229.11:18:49.03#ibcon#about to read 6, iclass 17, count 0 2006.229.11:18:49.03#ibcon#read 6, iclass 17, count 0 2006.229.11:18:49.03#ibcon#end of sib2, iclass 17, count 0 2006.229.11:18:49.03#ibcon#*after write, iclass 17, count 0 2006.229.11:18:49.03#ibcon#*before return 0, iclass 17, count 0 2006.229.11:18:49.03#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:49.03#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:18:49.03#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:18:49.03#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:18:49.03$vck44/vb=7,4 2006.229.11:18:49.03#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.11:18:49.03#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.11:18:49.03#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:49.03#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:49.09#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:49.09#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:49.09#ibcon#enter wrdev, iclass 19, count 2 2006.229.11:18:49.09#ibcon#first serial, iclass 19, count 2 2006.229.11:18:49.09#ibcon#enter sib2, iclass 19, count 2 2006.229.11:18:49.09#ibcon#flushed, iclass 19, count 2 2006.229.11:18:49.09#ibcon#about to write, iclass 19, count 2 2006.229.11:18:49.09#ibcon#wrote, iclass 19, count 2 2006.229.11:18:49.09#ibcon#about to read 3, iclass 19, count 2 2006.229.11:18:49.11#ibcon#read 3, iclass 19, count 2 2006.229.11:18:49.11#ibcon#about to read 4, iclass 19, count 2 2006.229.11:18:49.11#ibcon#read 4, iclass 19, count 2 2006.229.11:18:49.11#ibcon#about to read 5, iclass 19, count 2 2006.229.11:18:49.11#ibcon#read 5, iclass 19, count 2 2006.229.11:18:49.11#ibcon#about to read 6, iclass 19, count 2 2006.229.11:18:49.11#ibcon#read 6, iclass 19, count 2 2006.229.11:18:49.11#ibcon#end of sib2, iclass 19, count 2 2006.229.11:18:49.11#ibcon#*mode == 0, iclass 19, count 2 2006.229.11:18:49.11#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.11:18:49.11#ibcon#[27=AT07-04\r\n] 2006.229.11:18:49.11#ibcon#*before write, iclass 19, count 2 2006.229.11:18:49.11#ibcon#enter sib2, iclass 19, count 2 2006.229.11:18:49.11#ibcon#flushed, iclass 19, count 2 2006.229.11:18:49.11#ibcon#about to write, iclass 19, count 2 2006.229.11:18:49.11#ibcon#wrote, iclass 19, count 2 2006.229.11:18:49.11#ibcon#about to read 3, iclass 19, count 2 2006.229.11:18:49.14#ibcon#read 3, iclass 19, count 2 2006.229.11:18:49.14#ibcon#about to read 4, iclass 19, count 2 2006.229.11:18:49.14#ibcon#read 4, iclass 19, count 2 2006.229.11:18:49.14#ibcon#about to read 5, iclass 19, count 2 2006.229.11:18:49.14#ibcon#read 5, iclass 19, count 2 2006.229.11:18:49.14#ibcon#about to read 6, iclass 19, count 2 2006.229.11:18:49.14#ibcon#read 6, iclass 19, count 2 2006.229.11:18:49.14#ibcon#end of sib2, iclass 19, count 2 2006.229.11:18:49.14#ibcon#*after write, iclass 19, count 2 2006.229.11:18:49.14#ibcon#*before return 0, iclass 19, count 2 2006.229.11:18:49.14#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:49.14#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:18:49.14#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.11:18:49.14#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:49.14#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:49.26#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:49.26#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:49.26#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:18:49.26#ibcon#first serial, iclass 19, count 0 2006.229.11:18:49.26#ibcon#enter sib2, iclass 19, count 0 2006.229.11:18:49.26#ibcon#flushed, iclass 19, count 0 2006.229.11:18:49.26#ibcon#about to write, iclass 19, count 0 2006.229.11:18:49.26#ibcon#wrote, iclass 19, count 0 2006.229.11:18:49.26#ibcon#about to read 3, iclass 19, count 0 2006.229.11:18:49.28#ibcon#read 3, iclass 19, count 0 2006.229.11:18:49.28#ibcon#about to read 4, iclass 19, count 0 2006.229.11:18:49.28#ibcon#read 4, iclass 19, count 0 2006.229.11:18:49.28#ibcon#about to read 5, iclass 19, count 0 2006.229.11:18:49.28#ibcon#read 5, iclass 19, count 0 2006.229.11:18:49.28#ibcon#about to read 6, iclass 19, count 0 2006.229.11:18:49.28#ibcon#read 6, iclass 19, count 0 2006.229.11:18:49.28#ibcon#end of sib2, iclass 19, count 0 2006.229.11:18:49.28#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:18:49.28#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:18:49.28#ibcon#[27=USB\r\n] 2006.229.11:18:49.28#ibcon#*before write, iclass 19, count 0 2006.229.11:18:49.28#ibcon#enter sib2, iclass 19, count 0 2006.229.11:18:49.28#ibcon#flushed, iclass 19, count 0 2006.229.11:18:49.28#ibcon#about to write, iclass 19, count 0 2006.229.11:18:49.28#ibcon#wrote, iclass 19, count 0 2006.229.11:18:49.28#ibcon#about to read 3, iclass 19, count 0 2006.229.11:18:49.31#ibcon#read 3, iclass 19, count 0 2006.229.11:18:49.31#ibcon#about to read 4, iclass 19, count 0 2006.229.11:18:49.31#ibcon#read 4, iclass 19, count 0 2006.229.11:18:49.31#ibcon#about to read 5, iclass 19, count 0 2006.229.11:18:49.31#ibcon#read 5, iclass 19, count 0 2006.229.11:18:49.31#ibcon#about to read 6, iclass 19, count 0 2006.229.11:18:49.31#ibcon#read 6, iclass 19, count 0 2006.229.11:18:49.31#ibcon#end of sib2, iclass 19, count 0 2006.229.11:18:49.31#ibcon#*after write, iclass 19, count 0 2006.229.11:18:49.31#ibcon#*before return 0, iclass 19, count 0 2006.229.11:18:49.31#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:49.31#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:18:49.31#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:18:49.31#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:18:49.31$vck44/vblo=8,744.99 2006.229.11:18:49.31#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.11:18:49.31#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.11:18:49.31#ibcon#ireg 17 cls_cnt 0 2006.229.11:18:49.31#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:49.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:49.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:49.31#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:18:49.31#ibcon#first serial, iclass 21, count 0 2006.229.11:18:49.31#ibcon#enter sib2, iclass 21, count 0 2006.229.11:18:49.31#ibcon#flushed, iclass 21, count 0 2006.229.11:18:49.31#ibcon#about to write, iclass 21, count 0 2006.229.11:18:49.31#ibcon#wrote, iclass 21, count 0 2006.229.11:18:49.31#ibcon#about to read 3, iclass 21, count 0 2006.229.11:18:49.33#ibcon#read 3, iclass 21, count 0 2006.229.11:18:49.33#ibcon#about to read 4, iclass 21, count 0 2006.229.11:18:49.33#ibcon#read 4, iclass 21, count 0 2006.229.11:18:49.33#ibcon#about to read 5, iclass 21, count 0 2006.229.11:18:49.33#ibcon#read 5, iclass 21, count 0 2006.229.11:18:49.33#ibcon#about to read 6, iclass 21, count 0 2006.229.11:18:49.33#ibcon#read 6, iclass 21, count 0 2006.229.11:18:49.33#ibcon#end of sib2, iclass 21, count 0 2006.229.11:18:49.33#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:18:49.33#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:18:49.33#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:18:49.33#ibcon#*before write, iclass 21, count 0 2006.229.11:18:49.33#ibcon#enter sib2, iclass 21, count 0 2006.229.11:18:49.33#ibcon#flushed, iclass 21, count 0 2006.229.11:18:49.33#ibcon#about to write, iclass 21, count 0 2006.229.11:18:49.33#ibcon#wrote, iclass 21, count 0 2006.229.11:18:49.33#ibcon#about to read 3, iclass 21, count 0 2006.229.11:18:49.37#ibcon#read 3, iclass 21, count 0 2006.229.11:18:49.37#ibcon#about to read 4, iclass 21, count 0 2006.229.11:18:49.37#ibcon#read 4, iclass 21, count 0 2006.229.11:18:49.37#ibcon#about to read 5, iclass 21, count 0 2006.229.11:18:49.37#ibcon#read 5, iclass 21, count 0 2006.229.11:18:49.37#ibcon#about to read 6, iclass 21, count 0 2006.229.11:18:49.37#ibcon#read 6, iclass 21, count 0 2006.229.11:18:49.37#ibcon#end of sib2, iclass 21, count 0 2006.229.11:18:49.37#ibcon#*after write, iclass 21, count 0 2006.229.11:18:49.37#ibcon#*before return 0, iclass 21, count 0 2006.229.11:18:49.37#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:49.37#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:18:49.37#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:18:49.37#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:18:49.37$vck44/vb=8,4 2006.229.11:18:49.37#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.11:18:49.37#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.11:18:49.37#ibcon#ireg 11 cls_cnt 2 2006.229.11:18:49.37#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:49.43#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:49.43#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:49.43#ibcon#enter wrdev, iclass 23, count 2 2006.229.11:18:49.43#ibcon#first serial, iclass 23, count 2 2006.229.11:18:49.43#ibcon#enter sib2, iclass 23, count 2 2006.229.11:18:49.43#ibcon#flushed, iclass 23, count 2 2006.229.11:18:49.43#ibcon#about to write, iclass 23, count 2 2006.229.11:18:49.43#ibcon#wrote, iclass 23, count 2 2006.229.11:18:49.43#ibcon#about to read 3, iclass 23, count 2 2006.229.11:18:49.45#ibcon#read 3, iclass 23, count 2 2006.229.11:18:49.45#ibcon#about to read 4, iclass 23, count 2 2006.229.11:18:49.45#ibcon#read 4, iclass 23, count 2 2006.229.11:18:49.45#ibcon#about to read 5, iclass 23, count 2 2006.229.11:18:49.45#ibcon#read 5, iclass 23, count 2 2006.229.11:18:49.45#ibcon#about to read 6, iclass 23, count 2 2006.229.11:18:49.45#ibcon#read 6, iclass 23, count 2 2006.229.11:18:49.45#ibcon#end of sib2, iclass 23, count 2 2006.229.11:18:49.45#ibcon#*mode == 0, iclass 23, count 2 2006.229.11:18:49.45#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.11:18:49.45#ibcon#[27=AT08-04\r\n] 2006.229.11:18:49.45#ibcon#*before write, iclass 23, count 2 2006.229.11:18:49.45#ibcon#enter sib2, iclass 23, count 2 2006.229.11:18:49.45#ibcon#flushed, iclass 23, count 2 2006.229.11:18:49.45#ibcon#about to write, iclass 23, count 2 2006.229.11:18:49.45#ibcon#wrote, iclass 23, count 2 2006.229.11:18:49.45#ibcon#about to read 3, iclass 23, count 2 2006.229.11:18:49.48#ibcon#read 3, iclass 23, count 2 2006.229.11:18:49.48#ibcon#about to read 4, iclass 23, count 2 2006.229.11:18:49.48#ibcon#read 4, iclass 23, count 2 2006.229.11:18:49.48#ibcon#about to read 5, iclass 23, count 2 2006.229.11:18:49.48#ibcon#read 5, iclass 23, count 2 2006.229.11:18:49.48#ibcon#about to read 6, iclass 23, count 2 2006.229.11:18:49.48#ibcon#read 6, iclass 23, count 2 2006.229.11:18:49.48#ibcon#end of sib2, iclass 23, count 2 2006.229.11:18:49.48#ibcon#*after write, iclass 23, count 2 2006.229.11:18:49.48#ibcon#*before return 0, iclass 23, count 2 2006.229.11:18:49.48#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:49.48#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:18:49.48#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.11:18:49.48#ibcon#ireg 7 cls_cnt 0 2006.229.11:18:49.48#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:49.60#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:49.60#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:49.60#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:18:49.60#ibcon#first serial, iclass 23, count 0 2006.229.11:18:49.60#ibcon#enter sib2, iclass 23, count 0 2006.229.11:18:49.60#ibcon#flushed, iclass 23, count 0 2006.229.11:18:49.60#ibcon#about to write, iclass 23, count 0 2006.229.11:18:49.60#ibcon#wrote, iclass 23, count 0 2006.229.11:18:49.60#ibcon#about to read 3, iclass 23, count 0 2006.229.11:18:49.62#ibcon#read 3, iclass 23, count 0 2006.229.11:18:49.62#ibcon#about to read 4, iclass 23, count 0 2006.229.11:18:49.62#ibcon#read 4, iclass 23, count 0 2006.229.11:18:49.62#ibcon#about to read 5, iclass 23, count 0 2006.229.11:18:49.62#ibcon#read 5, iclass 23, count 0 2006.229.11:18:49.62#ibcon#about to read 6, iclass 23, count 0 2006.229.11:18:49.62#ibcon#read 6, iclass 23, count 0 2006.229.11:18:49.62#ibcon#end of sib2, iclass 23, count 0 2006.229.11:18:49.62#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:18:49.62#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:18:49.62#ibcon#[27=USB\r\n] 2006.229.11:18:49.62#ibcon#*before write, iclass 23, count 0 2006.229.11:18:49.62#ibcon#enter sib2, iclass 23, count 0 2006.229.11:18:49.62#ibcon#flushed, iclass 23, count 0 2006.229.11:18:49.62#ibcon#about to write, iclass 23, count 0 2006.229.11:18:49.62#ibcon#wrote, iclass 23, count 0 2006.229.11:18:49.62#ibcon#about to read 3, iclass 23, count 0 2006.229.11:18:49.65#ibcon#read 3, iclass 23, count 0 2006.229.11:18:49.65#ibcon#about to read 4, iclass 23, count 0 2006.229.11:18:49.65#ibcon#read 4, iclass 23, count 0 2006.229.11:18:49.65#ibcon#about to read 5, iclass 23, count 0 2006.229.11:18:49.65#ibcon#read 5, iclass 23, count 0 2006.229.11:18:49.65#ibcon#about to read 6, iclass 23, count 0 2006.229.11:18:49.65#ibcon#read 6, iclass 23, count 0 2006.229.11:18:49.65#ibcon#end of sib2, iclass 23, count 0 2006.229.11:18:49.65#ibcon#*after write, iclass 23, count 0 2006.229.11:18:49.65#ibcon#*before return 0, iclass 23, count 0 2006.229.11:18:49.65#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:49.65#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:18:49.65#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:18:49.65#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:18:49.65$vck44/vabw=wide 2006.229.11:18:49.65#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.11:18:49.65#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.11:18:49.65#ibcon#ireg 8 cls_cnt 0 2006.229.11:18:49.65#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:49.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:49.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:49.65#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:18:49.65#ibcon#first serial, iclass 25, count 0 2006.229.11:18:49.65#ibcon#enter sib2, iclass 25, count 0 2006.229.11:18:49.65#ibcon#flushed, iclass 25, count 0 2006.229.11:18:49.65#ibcon#about to write, iclass 25, count 0 2006.229.11:18:49.65#ibcon#wrote, iclass 25, count 0 2006.229.11:18:49.65#ibcon#about to read 3, iclass 25, count 0 2006.229.11:18:49.67#ibcon#read 3, iclass 25, count 0 2006.229.11:18:49.67#ibcon#about to read 4, iclass 25, count 0 2006.229.11:18:49.67#ibcon#read 4, iclass 25, count 0 2006.229.11:18:49.67#ibcon#about to read 5, iclass 25, count 0 2006.229.11:18:49.67#ibcon#read 5, iclass 25, count 0 2006.229.11:18:49.67#ibcon#about to read 6, iclass 25, count 0 2006.229.11:18:49.67#ibcon#read 6, iclass 25, count 0 2006.229.11:18:49.67#ibcon#end of sib2, iclass 25, count 0 2006.229.11:18:49.67#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:18:49.67#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:18:49.67#ibcon#[25=BW32\r\n] 2006.229.11:18:49.67#ibcon#*before write, iclass 25, count 0 2006.229.11:18:49.67#ibcon#enter sib2, iclass 25, count 0 2006.229.11:18:49.67#ibcon#flushed, iclass 25, count 0 2006.229.11:18:49.67#ibcon#about to write, iclass 25, count 0 2006.229.11:18:49.67#ibcon#wrote, iclass 25, count 0 2006.229.11:18:49.67#ibcon#about to read 3, iclass 25, count 0 2006.229.11:18:49.70#ibcon#read 3, iclass 25, count 0 2006.229.11:18:49.70#ibcon#about to read 4, iclass 25, count 0 2006.229.11:18:49.70#ibcon#read 4, iclass 25, count 0 2006.229.11:18:49.70#ibcon#about to read 5, iclass 25, count 0 2006.229.11:18:49.70#ibcon#read 5, iclass 25, count 0 2006.229.11:18:49.70#ibcon#about to read 6, iclass 25, count 0 2006.229.11:18:49.70#ibcon#read 6, iclass 25, count 0 2006.229.11:18:49.70#ibcon#end of sib2, iclass 25, count 0 2006.229.11:18:49.70#ibcon#*after write, iclass 25, count 0 2006.229.11:18:49.70#ibcon#*before return 0, iclass 25, count 0 2006.229.11:18:49.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:49.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:18:49.70#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:18:49.70#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:18:49.70$vck44/vbbw=wide 2006.229.11:18:49.70#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:18:49.70#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:18:49.70#ibcon#ireg 8 cls_cnt 0 2006.229.11:18:49.70#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:18:49.77#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:18:49.77#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:18:49.77#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:18:49.77#ibcon#first serial, iclass 27, count 0 2006.229.11:18:49.77#ibcon#enter sib2, iclass 27, count 0 2006.229.11:18:49.77#ibcon#flushed, iclass 27, count 0 2006.229.11:18:49.77#ibcon#about to write, iclass 27, count 0 2006.229.11:18:49.77#ibcon#wrote, iclass 27, count 0 2006.229.11:18:49.77#ibcon#about to read 3, iclass 27, count 0 2006.229.11:18:49.79#ibcon#read 3, iclass 27, count 0 2006.229.11:18:49.79#ibcon#about to read 4, iclass 27, count 0 2006.229.11:18:49.79#ibcon#read 4, iclass 27, count 0 2006.229.11:18:49.79#ibcon#about to read 5, iclass 27, count 0 2006.229.11:18:49.79#ibcon#read 5, iclass 27, count 0 2006.229.11:18:49.79#ibcon#about to read 6, iclass 27, count 0 2006.229.11:18:49.79#ibcon#read 6, iclass 27, count 0 2006.229.11:18:49.79#ibcon#end of sib2, iclass 27, count 0 2006.229.11:18:49.79#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:18:49.79#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:18:49.79#ibcon#[27=BW32\r\n] 2006.229.11:18:49.79#ibcon#*before write, iclass 27, count 0 2006.229.11:18:49.79#ibcon#enter sib2, iclass 27, count 0 2006.229.11:18:49.79#ibcon#flushed, iclass 27, count 0 2006.229.11:18:49.79#ibcon#about to write, iclass 27, count 0 2006.229.11:18:49.79#ibcon#wrote, iclass 27, count 0 2006.229.11:18:49.79#ibcon#about to read 3, iclass 27, count 0 2006.229.11:18:49.82#ibcon#read 3, iclass 27, count 0 2006.229.11:18:49.82#ibcon#about to read 4, iclass 27, count 0 2006.229.11:18:49.82#ibcon#read 4, iclass 27, count 0 2006.229.11:18:49.82#ibcon#about to read 5, iclass 27, count 0 2006.229.11:18:49.82#ibcon#read 5, iclass 27, count 0 2006.229.11:18:49.82#ibcon#about to read 6, iclass 27, count 0 2006.229.11:18:49.82#ibcon#read 6, iclass 27, count 0 2006.229.11:18:49.82#ibcon#end of sib2, iclass 27, count 0 2006.229.11:18:49.82#ibcon#*after write, iclass 27, count 0 2006.229.11:18:49.82#ibcon#*before return 0, iclass 27, count 0 2006.229.11:18:49.82#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:18:49.82#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:18:49.82#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:18:49.82#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:18:49.82$setupk4/ifdk4 2006.229.11:18:49.82$ifdk4/lo= 2006.229.11:18:49.82$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:18:49.82$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:18:49.82$ifdk4/patch= 2006.229.11:18:49.82$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:18:49.82$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:18:49.82$setupk4/!*+20s 2006.229.11:18:56.01#abcon#<5=/04 1.9 3.9 28.211001001.9\r\n> 2006.229.11:18:56.03#abcon#{5=INTERFACE CLEAR} 2006.229.11:18:56.09#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:19:04.29$setupk4/"tpicd 2006.229.11:19:04.29$setupk4/echo=off 2006.229.11:19:04.29$setupk4/xlog=off 2006.229.11:19:04.29:!2006.229.11:21:10 2006.229.11:19:13.14#trakl#Source acquired 2006.229.11:19:13.14#flagr#flagr/antenna,acquired 2006.229.11:21:10.00:preob 2006.229.11:21:11.13/onsource/TRACKING 2006.229.11:21:11.13:!2006.229.11:21:20 2006.229.11:21:20.00:"tape 2006.229.11:21:20.00:"st=record 2006.229.11:21:20.00:data_valid=on 2006.229.11:21:20.00:midob 2006.229.11:21:20.13/onsource/TRACKING 2006.229.11:21:20.13/wx/28.18,1001.9,100 2006.229.11:21:20.30/cable/+6.4054E-03 2006.229.11:21:21.39/va/01,08,usb,yes,29,32 2006.229.11:21:21.39/va/02,07,usb,yes,32,32 2006.229.11:21:21.39/va/03,06,usb,yes,39,42 2006.229.11:21:21.39/va/04,07,usb,yes,33,34 2006.229.11:21:21.39/va/05,04,usb,yes,29,30 2006.229.11:21:21.39/va/06,04,usb,yes,33,33 2006.229.11:21:21.39/va/07,05,usb,yes,29,30 2006.229.11:21:21.39/va/08,06,usb,yes,21,26 2006.229.11:21:21.62/valo/01,524.99,yes,locked 2006.229.11:21:21.62/valo/02,534.99,yes,locked 2006.229.11:21:21.62/valo/03,564.99,yes,locked 2006.229.11:21:21.62/valo/04,624.99,yes,locked 2006.229.11:21:21.62/valo/05,734.99,yes,locked 2006.229.11:21:21.62/valo/06,814.99,yes,locked 2006.229.11:21:21.62/valo/07,864.99,yes,locked 2006.229.11:21:21.62/valo/08,884.99,yes,locked 2006.229.11:21:22.71/vb/01,04,usb,yes,31,29 2006.229.11:21:22.71/vb/02,04,usb,yes,33,33 2006.229.11:21:22.71/vb/03,04,usb,yes,30,33 2006.229.11:21:22.71/vb/04,04,usb,yes,35,34 2006.229.11:21:22.71/vb/05,04,usb,yes,27,29 2006.229.11:21:22.71/vb/06,04,usb,yes,32,28 2006.229.11:21:22.71/vb/07,04,usb,yes,31,31 2006.229.11:21:22.71/vb/08,04,usb,yes,29,32 2006.229.11:21:22.95/vblo/01,629.99,yes,locked 2006.229.11:21:22.95/vblo/02,634.99,yes,locked 2006.229.11:21:22.95/vblo/03,649.99,yes,locked 2006.229.11:21:22.95/vblo/04,679.99,yes,locked 2006.229.11:21:22.95/vblo/05,709.99,yes,locked 2006.229.11:21:22.95/vblo/06,719.99,yes,locked 2006.229.11:21:22.95/vblo/07,734.99,yes,locked 2006.229.11:21:22.95/vblo/08,744.99,yes,locked 2006.229.11:21:23.10/vabw/8 2006.229.11:21:23.25/vbbw/8 2006.229.11:21:23.34/xfe/off,on,12.0 2006.229.11:21:23.72/ifatt/23,28,28,28 2006.229.11:21:24.07/fmout-gps/S +4.58E-07 2006.229.11:21:24.11:!2006.229.11:22:00 2006.229.11:22:00.00:data_valid=off 2006.229.11:22:00.00:"et 2006.229.11:22:00.00:!+3s 2006.229.11:22:03.01:"tape 2006.229.11:22:03.01:postob 2006.229.11:22:03.17/cable/+6.4063E-03 2006.229.11:22:03.17/wx/28.17,1001.9,100 2006.229.11:22:04.07/fmout-gps/S +4.59E-07 2006.229.11:22:04.07:scan_name=229-1123,jd0608,390 2006.229.11:22:04.07:source=1622-253,162546.89,-252738.3,2000.0,cw 2006.229.11:22:05.14#flagr#flagr/antenna,new-source 2006.229.11:22:05.14:checkk5 2006.229.11:22:05.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:22:05.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:22:06.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:22:06.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:22:07.10/chk_obsdata//k5ts1/T2291121??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.11:22:07.48/chk_obsdata//k5ts2/T2291121??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.11:22:07.86/chk_obsdata//k5ts3/T2291121??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.11:22:08.24/chk_obsdata//k5ts4/T2291121??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.11:22:08.96/k5log//k5ts1_log_newline 2006.229.11:22:09.67/k5log//k5ts2_log_newline 2006.229.11:22:10.37/k5log//k5ts3_log_newline 2006.229.11:22:11.08/k5log//k5ts4_log_newline 2006.229.11:22:11.11/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:22:11.11:setupk4=1 2006.229.11:22:11.11$setupk4/echo=on 2006.229.11:22:11.11$setupk4/pcalon 2006.229.11:22:11.11$pcalon/"no phase cal control is implemented here 2006.229.11:22:11.11$setupk4/"tpicd=stop 2006.229.11:22:11.11$setupk4/"rec=synch_on 2006.229.11:22:11.11$setupk4/"rec_mode=128 2006.229.11:22:11.11$setupk4/!* 2006.229.11:22:11.11$setupk4/recpk4 2006.229.11:22:11.11$recpk4/recpatch= 2006.229.11:22:11.11$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:22:11.11$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:22:11.11$setupk4/vck44 2006.229.11:22:11.11$vck44/valo=1,524.99 2006.229.11:22:11.11#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.11:22:11.11#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.11:22:11.11#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:11.11#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:11.11#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:11.11#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:11.11#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:22:11.11#ibcon#first serial, iclass 40, count 0 2006.229.11:22:11.11#ibcon#enter sib2, iclass 40, count 0 2006.229.11:22:11.11#ibcon#flushed, iclass 40, count 0 2006.229.11:22:11.11#ibcon#about to write, iclass 40, count 0 2006.229.11:22:11.11#ibcon#wrote, iclass 40, count 0 2006.229.11:22:11.11#ibcon#about to read 3, iclass 40, count 0 2006.229.11:22:11.13#ibcon#read 3, iclass 40, count 0 2006.229.11:22:11.13#ibcon#about to read 4, iclass 40, count 0 2006.229.11:22:11.13#ibcon#read 4, iclass 40, count 0 2006.229.11:22:11.13#ibcon#about to read 5, iclass 40, count 0 2006.229.11:22:11.13#ibcon#read 5, iclass 40, count 0 2006.229.11:22:11.13#ibcon#about to read 6, iclass 40, count 0 2006.229.11:22:11.13#ibcon#read 6, iclass 40, count 0 2006.229.11:22:11.13#ibcon#end of sib2, iclass 40, count 0 2006.229.11:22:11.13#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:22:11.13#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:22:11.13#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:22:11.13#ibcon#*before write, iclass 40, count 0 2006.229.11:22:11.13#ibcon#enter sib2, iclass 40, count 0 2006.229.11:22:11.13#ibcon#flushed, iclass 40, count 0 2006.229.11:22:11.13#ibcon#about to write, iclass 40, count 0 2006.229.11:22:11.13#ibcon#wrote, iclass 40, count 0 2006.229.11:22:11.13#ibcon#about to read 3, iclass 40, count 0 2006.229.11:22:11.18#ibcon#read 3, iclass 40, count 0 2006.229.11:22:11.18#ibcon#about to read 4, iclass 40, count 0 2006.229.11:22:11.18#ibcon#read 4, iclass 40, count 0 2006.229.11:22:11.18#ibcon#about to read 5, iclass 40, count 0 2006.229.11:22:11.18#ibcon#read 5, iclass 40, count 0 2006.229.11:22:11.18#ibcon#about to read 6, iclass 40, count 0 2006.229.11:22:11.18#ibcon#read 6, iclass 40, count 0 2006.229.11:22:11.18#ibcon#end of sib2, iclass 40, count 0 2006.229.11:22:11.18#ibcon#*after write, iclass 40, count 0 2006.229.11:22:11.18#ibcon#*before return 0, iclass 40, count 0 2006.229.11:22:11.18#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:11.18#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:11.18#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:22:11.18#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:22:11.18$vck44/va=1,8 2006.229.11:22:11.18#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.11:22:11.18#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.11:22:11.18#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:11.18#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:11.18#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:11.18#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:11.18#ibcon#enter wrdev, iclass 4, count 2 2006.229.11:22:11.18#ibcon#first serial, iclass 4, count 2 2006.229.11:22:11.18#ibcon#enter sib2, iclass 4, count 2 2006.229.11:22:11.18#ibcon#flushed, iclass 4, count 2 2006.229.11:22:11.18#ibcon#about to write, iclass 4, count 2 2006.229.11:22:11.18#ibcon#wrote, iclass 4, count 2 2006.229.11:22:11.18#ibcon#about to read 3, iclass 4, count 2 2006.229.11:22:11.20#ibcon#read 3, iclass 4, count 2 2006.229.11:22:11.20#ibcon#about to read 4, iclass 4, count 2 2006.229.11:22:11.20#ibcon#read 4, iclass 4, count 2 2006.229.11:22:11.20#ibcon#about to read 5, iclass 4, count 2 2006.229.11:22:11.20#ibcon#read 5, iclass 4, count 2 2006.229.11:22:11.20#ibcon#about to read 6, iclass 4, count 2 2006.229.11:22:11.20#ibcon#read 6, iclass 4, count 2 2006.229.11:22:11.20#ibcon#end of sib2, iclass 4, count 2 2006.229.11:22:11.20#ibcon#*mode == 0, iclass 4, count 2 2006.229.11:22:11.20#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.11:22:11.20#ibcon#[25=AT01-08\r\n] 2006.229.11:22:11.20#ibcon#*before write, iclass 4, count 2 2006.229.11:22:11.20#ibcon#enter sib2, iclass 4, count 2 2006.229.11:22:11.20#ibcon#flushed, iclass 4, count 2 2006.229.11:22:11.20#ibcon#about to write, iclass 4, count 2 2006.229.11:22:11.20#ibcon#wrote, iclass 4, count 2 2006.229.11:22:11.20#ibcon#about to read 3, iclass 4, count 2 2006.229.11:22:11.23#ibcon#read 3, iclass 4, count 2 2006.229.11:22:11.23#ibcon#about to read 4, iclass 4, count 2 2006.229.11:22:11.23#ibcon#read 4, iclass 4, count 2 2006.229.11:22:11.23#ibcon#about to read 5, iclass 4, count 2 2006.229.11:22:11.23#ibcon#read 5, iclass 4, count 2 2006.229.11:22:11.23#ibcon#about to read 6, iclass 4, count 2 2006.229.11:22:11.23#ibcon#read 6, iclass 4, count 2 2006.229.11:22:11.23#ibcon#end of sib2, iclass 4, count 2 2006.229.11:22:11.23#ibcon#*after write, iclass 4, count 2 2006.229.11:22:11.23#ibcon#*before return 0, iclass 4, count 2 2006.229.11:22:11.23#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:11.23#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:11.23#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.11:22:11.23#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:11.23#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:11.35#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:11.35#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:11.35#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:22:11.35#ibcon#first serial, iclass 4, count 0 2006.229.11:22:11.35#ibcon#enter sib2, iclass 4, count 0 2006.229.11:22:11.35#ibcon#flushed, iclass 4, count 0 2006.229.11:22:11.35#ibcon#about to write, iclass 4, count 0 2006.229.11:22:11.35#ibcon#wrote, iclass 4, count 0 2006.229.11:22:11.35#ibcon#about to read 3, iclass 4, count 0 2006.229.11:22:11.37#ibcon#read 3, iclass 4, count 0 2006.229.11:22:11.37#ibcon#about to read 4, iclass 4, count 0 2006.229.11:22:11.37#ibcon#read 4, iclass 4, count 0 2006.229.11:22:11.37#ibcon#about to read 5, iclass 4, count 0 2006.229.11:22:11.37#ibcon#read 5, iclass 4, count 0 2006.229.11:22:11.37#ibcon#about to read 6, iclass 4, count 0 2006.229.11:22:11.37#ibcon#read 6, iclass 4, count 0 2006.229.11:22:11.37#ibcon#end of sib2, iclass 4, count 0 2006.229.11:22:11.37#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:22:11.37#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:22:11.37#ibcon#[25=USB\r\n] 2006.229.11:22:11.37#ibcon#*before write, iclass 4, count 0 2006.229.11:22:11.37#ibcon#enter sib2, iclass 4, count 0 2006.229.11:22:11.37#ibcon#flushed, iclass 4, count 0 2006.229.11:22:11.37#ibcon#about to write, iclass 4, count 0 2006.229.11:22:11.37#ibcon#wrote, iclass 4, count 0 2006.229.11:22:11.37#ibcon#about to read 3, iclass 4, count 0 2006.229.11:22:11.40#ibcon#read 3, iclass 4, count 0 2006.229.11:22:11.40#ibcon#about to read 4, iclass 4, count 0 2006.229.11:22:11.40#ibcon#read 4, iclass 4, count 0 2006.229.11:22:11.40#ibcon#about to read 5, iclass 4, count 0 2006.229.11:22:11.40#ibcon#read 5, iclass 4, count 0 2006.229.11:22:11.40#ibcon#about to read 6, iclass 4, count 0 2006.229.11:22:11.40#ibcon#read 6, iclass 4, count 0 2006.229.11:22:11.40#ibcon#end of sib2, iclass 4, count 0 2006.229.11:22:11.40#ibcon#*after write, iclass 4, count 0 2006.229.11:22:11.40#ibcon#*before return 0, iclass 4, count 0 2006.229.11:22:11.40#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:11.40#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:11.40#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:22:11.40#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:22:11.40$vck44/valo=2,534.99 2006.229.11:22:11.40#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.11:22:11.40#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.11:22:11.40#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:11.40#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:11.40#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:11.40#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:11.40#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:22:11.40#ibcon#first serial, iclass 6, count 0 2006.229.11:22:11.40#ibcon#enter sib2, iclass 6, count 0 2006.229.11:22:11.40#ibcon#flushed, iclass 6, count 0 2006.229.11:22:11.40#ibcon#about to write, iclass 6, count 0 2006.229.11:22:11.40#ibcon#wrote, iclass 6, count 0 2006.229.11:22:11.40#ibcon#about to read 3, iclass 6, count 0 2006.229.11:22:11.42#ibcon#read 3, iclass 6, count 0 2006.229.11:22:11.42#ibcon#about to read 4, iclass 6, count 0 2006.229.11:22:11.42#ibcon#read 4, iclass 6, count 0 2006.229.11:22:11.42#ibcon#about to read 5, iclass 6, count 0 2006.229.11:22:11.42#ibcon#read 5, iclass 6, count 0 2006.229.11:22:11.42#ibcon#about to read 6, iclass 6, count 0 2006.229.11:22:11.42#ibcon#read 6, iclass 6, count 0 2006.229.11:22:11.42#ibcon#end of sib2, iclass 6, count 0 2006.229.11:22:11.42#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:22:11.42#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:22:11.42#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:22:11.42#ibcon#*before write, iclass 6, count 0 2006.229.11:22:11.42#ibcon#enter sib2, iclass 6, count 0 2006.229.11:22:11.42#ibcon#flushed, iclass 6, count 0 2006.229.11:22:11.42#ibcon#about to write, iclass 6, count 0 2006.229.11:22:11.42#ibcon#wrote, iclass 6, count 0 2006.229.11:22:11.42#ibcon#about to read 3, iclass 6, count 0 2006.229.11:22:11.46#ibcon#read 3, iclass 6, count 0 2006.229.11:22:11.46#ibcon#about to read 4, iclass 6, count 0 2006.229.11:22:11.46#ibcon#read 4, iclass 6, count 0 2006.229.11:22:11.46#ibcon#about to read 5, iclass 6, count 0 2006.229.11:22:11.46#ibcon#read 5, iclass 6, count 0 2006.229.11:22:11.46#ibcon#about to read 6, iclass 6, count 0 2006.229.11:22:11.46#ibcon#read 6, iclass 6, count 0 2006.229.11:22:11.46#ibcon#end of sib2, iclass 6, count 0 2006.229.11:22:11.46#ibcon#*after write, iclass 6, count 0 2006.229.11:22:11.46#ibcon#*before return 0, iclass 6, count 0 2006.229.11:22:11.46#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:11.46#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:11.46#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:22:11.46#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:22:11.46$vck44/va=2,7 2006.229.11:22:11.46#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.11:22:11.46#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.11:22:11.46#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:11.46#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:11.52#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:11.52#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:11.52#ibcon#enter wrdev, iclass 10, count 2 2006.229.11:22:11.52#ibcon#first serial, iclass 10, count 2 2006.229.11:22:11.52#ibcon#enter sib2, iclass 10, count 2 2006.229.11:22:11.52#ibcon#flushed, iclass 10, count 2 2006.229.11:22:11.52#ibcon#about to write, iclass 10, count 2 2006.229.11:22:11.52#ibcon#wrote, iclass 10, count 2 2006.229.11:22:11.52#ibcon#about to read 3, iclass 10, count 2 2006.229.11:22:11.54#ibcon#read 3, iclass 10, count 2 2006.229.11:22:11.54#ibcon#about to read 4, iclass 10, count 2 2006.229.11:22:11.54#ibcon#read 4, iclass 10, count 2 2006.229.11:22:11.54#ibcon#about to read 5, iclass 10, count 2 2006.229.11:22:11.54#ibcon#read 5, iclass 10, count 2 2006.229.11:22:11.54#ibcon#about to read 6, iclass 10, count 2 2006.229.11:22:11.54#ibcon#read 6, iclass 10, count 2 2006.229.11:22:11.54#ibcon#end of sib2, iclass 10, count 2 2006.229.11:22:11.54#ibcon#*mode == 0, iclass 10, count 2 2006.229.11:22:11.54#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.11:22:11.54#ibcon#[25=AT02-07\r\n] 2006.229.11:22:11.54#ibcon#*before write, iclass 10, count 2 2006.229.11:22:11.54#ibcon#enter sib2, iclass 10, count 2 2006.229.11:22:11.54#ibcon#flushed, iclass 10, count 2 2006.229.11:22:11.54#ibcon#about to write, iclass 10, count 2 2006.229.11:22:11.54#ibcon#wrote, iclass 10, count 2 2006.229.11:22:11.54#ibcon#about to read 3, iclass 10, count 2 2006.229.11:22:11.57#ibcon#read 3, iclass 10, count 2 2006.229.11:22:11.57#ibcon#about to read 4, iclass 10, count 2 2006.229.11:22:11.57#ibcon#read 4, iclass 10, count 2 2006.229.11:22:11.57#ibcon#about to read 5, iclass 10, count 2 2006.229.11:22:11.57#ibcon#read 5, iclass 10, count 2 2006.229.11:22:11.57#ibcon#about to read 6, iclass 10, count 2 2006.229.11:22:11.57#ibcon#read 6, iclass 10, count 2 2006.229.11:22:11.57#ibcon#end of sib2, iclass 10, count 2 2006.229.11:22:11.57#ibcon#*after write, iclass 10, count 2 2006.229.11:22:11.57#ibcon#*before return 0, iclass 10, count 2 2006.229.11:22:11.57#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:11.57#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:11.57#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.11:22:11.57#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:11.57#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:11.69#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:11.69#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:11.69#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:22:11.69#ibcon#first serial, iclass 10, count 0 2006.229.11:22:11.69#ibcon#enter sib2, iclass 10, count 0 2006.229.11:22:11.69#ibcon#flushed, iclass 10, count 0 2006.229.11:22:11.69#ibcon#about to write, iclass 10, count 0 2006.229.11:22:11.69#ibcon#wrote, iclass 10, count 0 2006.229.11:22:11.69#ibcon#about to read 3, iclass 10, count 0 2006.229.11:22:11.71#ibcon#read 3, iclass 10, count 0 2006.229.11:22:11.71#ibcon#about to read 4, iclass 10, count 0 2006.229.11:22:11.71#ibcon#read 4, iclass 10, count 0 2006.229.11:22:11.71#ibcon#about to read 5, iclass 10, count 0 2006.229.11:22:11.71#ibcon#read 5, iclass 10, count 0 2006.229.11:22:11.71#ibcon#about to read 6, iclass 10, count 0 2006.229.11:22:11.71#ibcon#read 6, iclass 10, count 0 2006.229.11:22:11.71#ibcon#end of sib2, iclass 10, count 0 2006.229.11:22:11.71#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:22:11.71#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:22:11.71#ibcon#[25=USB\r\n] 2006.229.11:22:11.71#ibcon#*before write, iclass 10, count 0 2006.229.11:22:11.71#ibcon#enter sib2, iclass 10, count 0 2006.229.11:22:11.71#ibcon#flushed, iclass 10, count 0 2006.229.11:22:11.71#ibcon#about to write, iclass 10, count 0 2006.229.11:22:11.71#ibcon#wrote, iclass 10, count 0 2006.229.11:22:11.71#ibcon#about to read 3, iclass 10, count 0 2006.229.11:22:11.74#ibcon#read 3, iclass 10, count 0 2006.229.11:22:11.74#ibcon#about to read 4, iclass 10, count 0 2006.229.11:22:11.74#ibcon#read 4, iclass 10, count 0 2006.229.11:22:11.74#ibcon#about to read 5, iclass 10, count 0 2006.229.11:22:11.74#ibcon#read 5, iclass 10, count 0 2006.229.11:22:11.74#ibcon#about to read 6, iclass 10, count 0 2006.229.11:22:11.74#ibcon#read 6, iclass 10, count 0 2006.229.11:22:11.74#ibcon#end of sib2, iclass 10, count 0 2006.229.11:22:11.74#ibcon#*after write, iclass 10, count 0 2006.229.11:22:11.74#ibcon#*before return 0, iclass 10, count 0 2006.229.11:22:11.74#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:11.74#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:11.74#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:22:11.74#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:22:11.74$vck44/valo=3,564.99 2006.229.11:22:11.74#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.11:22:11.74#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.11:22:11.74#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:11.74#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:11.74#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:11.74#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:11.74#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:22:11.74#ibcon#first serial, iclass 12, count 0 2006.229.11:22:11.74#ibcon#enter sib2, iclass 12, count 0 2006.229.11:22:11.74#ibcon#flushed, iclass 12, count 0 2006.229.11:22:11.74#ibcon#about to write, iclass 12, count 0 2006.229.11:22:11.74#ibcon#wrote, iclass 12, count 0 2006.229.11:22:11.74#ibcon#about to read 3, iclass 12, count 0 2006.229.11:22:11.76#ibcon#read 3, iclass 12, count 0 2006.229.11:22:11.76#ibcon#about to read 4, iclass 12, count 0 2006.229.11:22:11.76#ibcon#read 4, iclass 12, count 0 2006.229.11:22:11.76#ibcon#about to read 5, iclass 12, count 0 2006.229.11:22:11.76#ibcon#read 5, iclass 12, count 0 2006.229.11:22:11.76#ibcon#about to read 6, iclass 12, count 0 2006.229.11:22:11.76#ibcon#read 6, iclass 12, count 0 2006.229.11:22:11.76#ibcon#end of sib2, iclass 12, count 0 2006.229.11:22:11.76#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:22:11.76#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:22:11.76#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:22:11.76#ibcon#*before write, iclass 12, count 0 2006.229.11:22:11.76#ibcon#enter sib2, iclass 12, count 0 2006.229.11:22:11.76#ibcon#flushed, iclass 12, count 0 2006.229.11:22:11.76#ibcon#about to write, iclass 12, count 0 2006.229.11:22:11.76#ibcon#wrote, iclass 12, count 0 2006.229.11:22:11.76#ibcon#about to read 3, iclass 12, count 0 2006.229.11:22:11.80#ibcon#read 3, iclass 12, count 0 2006.229.11:22:11.80#ibcon#about to read 4, iclass 12, count 0 2006.229.11:22:11.80#ibcon#read 4, iclass 12, count 0 2006.229.11:22:11.80#ibcon#about to read 5, iclass 12, count 0 2006.229.11:22:11.80#ibcon#read 5, iclass 12, count 0 2006.229.11:22:11.80#ibcon#about to read 6, iclass 12, count 0 2006.229.11:22:11.80#ibcon#read 6, iclass 12, count 0 2006.229.11:22:11.80#ibcon#end of sib2, iclass 12, count 0 2006.229.11:22:11.80#ibcon#*after write, iclass 12, count 0 2006.229.11:22:11.80#ibcon#*before return 0, iclass 12, count 0 2006.229.11:22:11.80#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:11.80#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:11.80#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:22:11.80#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:22:11.80$vck44/va=3,6 2006.229.11:22:11.80#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.11:22:11.80#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.11:22:11.80#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:11.80#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:11.86#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:11.86#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:11.86#ibcon#enter wrdev, iclass 14, count 2 2006.229.11:22:11.86#ibcon#first serial, iclass 14, count 2 2006.229.11:22:11.86#ibcon#enter sib2, iclass 14, count 2 2006.229.11:22:11.86#ibcon#flushed, iclass 14, count 2 2006.229.11:22:11.86#ibcon#about to write, iclass 14, count 2 2006.229.11:22:11.86#ibcon#wrote, iclass 14, count 2 2006.229.11:22:11.86#ibcon#about to read 3, iclass 14, count 2 2006.229.11:22:11.88#ibcon#read 3, iclass 14, count 2 2006.229.11:22:11.88#ibcon#about to read 4, iclass 14, count 2 2006.229.11:22:11.88#ibcon#read 4, iclass 14, count 2 2006.229.11:22:11.88#ibcon#about to read 5, iclass 14, count 2 2006.229.11:22:11.88#ibcon#read 5, iclass 14, count 2 2006.229.11:22:11.88#ibcon#about to read 6, iclass 14, count 2 2006.229.11:22:11.88#ibcon#read 6, iclass 14, count 2 2006.229.11:22:11.88#ibcon#end of sib2, iclass 14, count 2 2006.229.11:22:11.88#ibcon#*mode == 0, iclass 14, count 2 2006.229.11:22:11.88#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.11:22:11.88#ibcon#[25=AT03-06\r\n] 2006.229.11:22:11.88#ibcon#*before write, iclass 14, count 2 2006.229.11:22:11.88#ibcon#enter sib2, iclass 14, count 2 2006.229.11:22:11.88#ibcon#flushed, iclass 14, count 2 2006.229.11:22:11.88#ibcon#about to write, iclass 14, count 2 2006.229.11:22:11.88#ibcon#wrote, iclass 14, count 2 2006.229.11:22:11.88#ibcon#about to read 3, iclass 14, count 2 2006.229.11:22:11.91#ibcon#read 3, iclass 14, count 2 2006.229.11:22:11.91#ibcon#about to read 4, iclass 14, count 2 2006.229.11:22:11.91#ibcon#read 4, iclass 14, count 2 2006.229.11:22:11.91#ibcon#about to read 5, iclass 14, count 2 2006.229.11:22:11.91#ibcon#read 5, iclass 14, count 2 2006.229.11:22:11.91#ibcon#about to read 6, iclass 14, count 2 2006.229.11:22:11.91#ibcon#read 6, iclass 14, count 2 2006.229.11:22:11.91#ibcon#end of sib2, iclass 14, count 2 2006.229.11:22:11.91#ibcon#*after write, iclass 14, count 2 2006.229.11:22:11.91#ibcon#*before return 0, iclass 14, count 2 2006.229.11:22:11.91#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:11.91#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:11.91#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.11:22:11.91#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:11.91#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:12.03#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:12.03#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:12.03#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:22:12.03#ibcon#first serial, iclass 14, count 0 2006.229.11:22:12.03#ibcon#enter sib2, iclass 14, count 0 2006.229.11:22:12.03#ibcon#flushed, iclass 14, count 0 2006.229.11:22:12.03#ibcon#about to write, iclass 14, count 0 2006.229.11:22:12.03#ibcon#wrote, iclass 14, count 0 2006.229.11:22:12.03#ibcon#about to read 3, iclass 14, count 0 2006.229.11:22:12.05#ibcon#read 3, iclass 14, count 0 2006.229.11:22:12.05#ibcon#about to read 4, iclass 14, count 0 2006.229.11:22:12.05#ibcon#read 4, iclass 14, count 0 2006.229.11:22:12.05#ibcon#about to read 5, iclass 14, count 0 2006.229.11:22:12.05#ibcon#read 5, iclass 14, count 0 2006.229.11:22:12.05#ibcon#about to read 6, iclass 14, count 0 2006.229.11:22:12.05#ibcon#read 6, iclass 14, count 0 2006.229.11:22:12.05#ibcon#end of sib2, iclass 14, count 0 2006.229.11:22:12.05#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:22:12.05#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:22:12.05#ibcon#[25=USB\r\n] 2006.229.11:22:12.05#ibcon#*before write, iclass 14, count 0 2006.229.11:22:12.05#ibcon#enter sib2, iclass 14, count 0 2006.229.11:22:12.05#ibcon#flushed, iclass 14, count 0 2006.229.11:22:12.05#ibcon#about to write, iclass 14, count 0 2006.229.11:22:12.05#ibcon#wrote, iclass 14, count 0 2006.229.11:22:12.05#ibcon#about to read 3, iclass 14, count 0 2006.229.11:22:12.08#ibcon#read 3, iclass 14, count 0 2006.229.11:22:12.08#ibcon#about to read 4, iclass 14, count 0 2006.229.11:22:12.08#ibcon#read 4, iclass 14, count 0 2006.229.11:22:12.08#ibcon#about to read 5, iclass 14, count 0 2006.229.11:22:12.08#ibcon#read 5, iclass 14, count 0 2006.229.11:22:12.08#ibcon#about to read 6, iclass 14, count 0 2006.229.11:22:12.08#ibcon#read 6, iclass 14, count 0 2006.229.11:22:12.08#ibcon#end of sib2, iclass 14, count 0 2006.229.11:22:12.08#ibcon#*after write, iclass 14, count 0 2006.229.11:22:12.08#ibcon#*before return 0, iclass 14, count 0 2006.229.11:22:12.08#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:12.08#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:12.08#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:22:12.08#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:22:12.08$vck44/valo=4,624.99 2006.229.11:22:12.08#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.11:22:12.08#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.11:22:12.08#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:12.08#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:12.08#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:12.08#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:12.08#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:22:12.08#ibcon#first serial, iclass 16, count 0 2006.229.11:22:12.08#ibcon#enter sib2, iclass 16, count 0 2006.229.11:22:12.08#ibcon#flushed, iclass 16, count 0 2006.229.11:22:12.08#ibcon#about to write, iclass 16, count 0 2006.229.11:22:12.08#ibcon#wrote, iclass 16, count 0 2006.229.11:22:12.08#ibcon#about to read 3, iclass 16, count 0 2006.229.11:22:12.10#ibcon#read 3, iclass 16, count 0 2006.229.11:22:12.10#ibcon#about to read 4, iclass 16, count 0 2006.229.11:22:12.10#ibcon#read 4, iclass 16, count 0 2006.229.11:22:12.10#ibcon#about to read 5, iclass 16, count 0 2006.229.11:22:12.10#ibcon#read 5, iclass 16, count 0 2006.229.11:22:12.10#ibcon#about to read 6, iclass 16, count 0 2006.229.11:22:12.10#ibcon#read 6, iclass 16, count 0 2006.229.11:22:12.10#ibcon#end of sib2, iclass 16, count 0 2006.229.11:22:12.10#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:22:12.10#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:22:12.10#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:22:12.10#ibcon#*before write, iclass 16, count 0 2006.229.11:22:12.10#ibcon#enter sib2, iclass 16, count 0 2006.229.11:22:12.10#ibcon#flushed, iclass 16, count 0 2006.229.11:22:12.10#ibcon#about to write, iclass 16, count 0 2006.229.11:22:12.10#ibcon#wrote, iclass 16, count 0 2006.229.11:22:12.10#ibcon#about to read 3, iclass 16, count 0 2006.229.11:22:12.14#ibcon#read 3, iclass 16, count 0 2006.229.11:22:12.14#ibcon#about to read 4, iclass 16, count 0 2006.229.11:22:12.14#ibcon#read 4, iclass 16, count 0 2006.229.11:22:12.14#ibcon#about to read 5, iclass 16, count 0 2006.229.11:22:12.14#ibcon#read 5, iclass 16, count 0 2006.229.11:22:12.14#ibcon#about to read 6, iclass 16, count 0 2006.229.11:22:12.14#ibcon#read 6, iclass 16, count 0 2006.229.11:22:12.14#ibcon#end of sib2, iclass 16, count 0 2006.229.11:22:12.14#ibcon#*after write, iclass 16, count 0 2006.229.11:22:12.14#ibcon#*before return 0, iclass 16, count 0 2006.229.11:22:12.14#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:12.14#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:12.14#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:22:12.14#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:22:12.14$vck44/va=4,7 2006.229.11:22:12.14#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.11:22:12.14#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.11:22:12.14#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:12.14#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:12.20#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:12.20#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:12.20#ibcon#enter wrdev, iclass 18, count 2 2006.229.11:22:12.20#ibcon#first serial, iclass 18, count 2 2006.229.11:22:12.20#ibcon#enter sib2, iclass 18, count 2 2006.229.11:22:12.20#ibcon#flushed, iclass 18, count 2 2006.229.11:22:12.20#ibcon#about to write, iclass 18, count 2 2006.229.11:22:12.20#ibcon#wrote, iclass 18, count 2 2006.229.11:22:12.20#ibcon#about to read 3, iclass 18, count 2 2006.229.11:22:12.22#ibcon#read 3, iclass 18, count 2 2006.229.11:22:12.22#ibcon#about to read 4, iclass 18, count 2 2006.229.11:22:12.22#ibcon#read 4, iclass 18, count 2 2006.229.11:22:12.22#ibcon#about to read 5, iclass 18, count 2 2006.229.11:22:12.22#ibcon#read 5, iclass 18, count 2 2006.229.11:22:12.22#ibcon#about to read 6, iclass 18, count 2 2006.229.11:22:12.22#ibcon#read 6, iclass 18, count 2 2006.229.11:22:12.22#ibcon#end of sib2, iclass 18, count 2 2006.229.11:22:12.22#ibcon#*mode == 0, iclass 18, count 2 2006.229.11:22:12.22#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.11:22:12.22#ibcon#[25=AT04-07\r\n] 2006.229.11:22:12.22#ibcon#*before write, iclass 18, count 2 2006.229.11:22:12.22#ibcon#enter sib2, iclass 18, count 2 2006.229.11:22:12.22#ibcon#flushed, iclass 18, count 2 2006.229.11:22:12.22#ibcon#about to write, iclass 18, count 2 2006.229.11:22:12.22#ibcon#wrote, iclass 18, count 2 2006.229.11:22:12.22#ibcon#about to read 3, iclass 18, count 2 2006.229.11:22:12.25#ibcon#read 3, iclass 18, count 2 2006.229.11:22:12.25#ibcon#about to read 4, iclass 18, count 2 2006.229.11:22:12.25#ibcon#read 4, iclass 18, count 2 2006.229.11:22:12.25#ibcon#about to read 5, iclass 18, count 2 2006.229.11:22:12.25#ibcon#read 5, iclass 18, count 2 2006.229.11:22:12.25#ibcon#about to read 6, iclass 18, count 2 2006.229.11:22:12.25#ibcon#read 6, iclass 18, count 2 2006.229.11:22:12.25#ibcon#end of sib2, iclass 18, count 2 2006.229.11:22:12.25#ibcon#*after write, iclass 18, count 2 2006.229.11:22:12.25#ibcon#*before return 0, iclass 18, count 2 2006.229.11:22:12.25#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:12.25#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:12.25#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.11:22:12.25#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:12.25#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:12.37#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:12.37#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:12.37#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:22:12.37#ibcon#first serial, iclass 18, count 0 2006.229.11:22:12.37#ibcon#enter sib2, iclass 18, count 0 2006.229.11:22:12.37#ibcon#flushed, iclass 18, count 0 2006.229.11:22:12.37#ibcon#about to write, iclass 18, count 0 2006.229.11:22:12.37#ibcon#wrote, iclass 18, count 0 2006.229.11:22:12.37#ibcon#about to read 3, iclass 18, count 0 2006.229.11:22:12.39#ibcon#read 3, iclass 18, count 0 2006.229.11:22:12.39#ibcon#about to read 4, iclass 18, count 0 2006.229.11:22:12.39#ibcon#read 4, iclass 18, count 0 2006.229.11:22:12.39#ibcon#about to read 5, iclass 18, count 0 2006.229.11:22:12.39#ibcon#read 5, iclass 18, count 0 2006.229.11:22:12.39#ibcon#about to read 6, iclass 18, count 0 2006.229.11:22:12.39#ibcon#read 6, iclass 18, count 0 2006.229.11:22:12.39#ibcon#end of sib2, iclass 18, count 0 2006.229.11:22:12.39#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:22:12.39#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:22:12.39#ibcon#[25=USB\r\n] 2006.229.11:22:12.39#ibcon#*before write, iclass 18, count 0 2006.229.11:22:12.39#ibcon#enter sib2, iclass 18, count 0 2006.229.11:22:12.39#ibcon#flushed, iclass 18, count 0 2006.229.11:22:12.39#ibcon#about to write, iclass 18, count 0 2006.229.11:22:12.39#ibcon#wrote, iclass 18, count 0 2006.229.11:22:12.39#ibcon#about to read 3, iclass 18, count 0 2006.229.11:22:12.42#ibcon#read 3, iclass 18, count 0 2006.229.11:22:12.42#ibcon#about to read 4, iclass 18, count 0 2006.229.11:22:12.42#ibcon#read 4, iclass 18, count 0 2006.229.11:22:12.42#ibcon#about to read 5, iclass 18, count 0 2006.229.11:22:12.42#ibcon#read 5, iclass 18, count 0 2006.229.11:22:12.42#ibcon#about to read 6, iclass 18, count 0 2006.229.11:22:12.42#ibcon#read 6, iclass 18, count 0 2006.229.11:22:12.42#ibcon#end of sib2, iclass 18, count 0 2006.229.11:22:12.42#ibcon#*after write, iclass 18, count 0 2006.229.11:22:12.42#ibcon#*before return 0, iclass 18, count 0 2006.229.11:22:12.42#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:12.42#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:12.42#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:22:12.42#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:22:12.42$vck44/valo=5,734.99 2006.229.11:22:12.42#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.11:22:12.42#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.11:22:12.42#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:12.42#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:12.42#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:12.42#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:12.42#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:22:12.42#ibcon#first serial, iclass 20, count 0 2006.229.11:22:12.42#ibcon#enter sib2, iclass 20, count 0 2006.229.11:22:12.42#ibcon#flushed, iclass 20, count 0 2006.229.11:22:12.42#ibcon#about to write, iclass 20, count 0 2006.229.11:22:12.42#ibcon#wrote, iclass 20, count 0 2006.229.11:22:12.42#ibcon#about to read 3, iclass 20, count 0 2006.229.11:22:12.44#ibcon#read 3, iclass 20, count 0 2006.229.11:22:12.44#ibcon#about to read 4, iclass 20, count 0 2006.229.11:22:12.44#ibcon#read 4, iclass 20, count 0 2006.229.11:22:12.44#ibcon#about to read 5, iclass 20, count 0 2006.229.11:22:12.44#ibcon#read 5, iclass 20, count 0 2006.229.11:22:12.44#ibcon#about to read 6, iclass 20, count 0 2006.229.11:22:12.44#ibcon#read 6, iclass 20, count 0 2006.229.11:22:12.44#ibcon#end of sib2, iclass 20, count 0 2006.229.11:22:12.44#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:22:12.44#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:22:12.44#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:22:12.44#ibcon#*before write, iclass 20, count 0 2006.229.11:22:12.44#ibcon#enter sib2, iclass 20, count 0 2006.229.11:22:12.44#ibcon#flushed, iclass 20, count 0 2006.229.11:22:12.44#ibcon#about to write, iclass 20, count 0 2006.229.11:22:12.44#ibcon#wrote, iclass 20, count 0 2006.229.11:22:12.44#ibcon#about to read 3, iclass 20, count 0 2006.229.11:22:12.48#ibcon#read 3, iclass 20, count 0 2006.229.11:22:12.48#ibcon#about to read 4, iclass 20, count 0 2006.229.11:22:12.48#ibcon#read 4, iclass 20, count 0 2006.229.11:22:12.48#ibcon#about to read 5, iclass 20, count 0 2006.229.11:22:12.48#ibcon#read 5, iclass 20, count 0 2006.229.11:22:12.48#ibcon#about to read 6, iclass 20, count 0 2006.229.11:22:12.48#ibcon#read 6, iclass 20, count 0 2006.229.11:22:12.48#ibcon#end of sib2, iclass 20, count 0 2006.229.11:22:12.48#ibcon#*after write, iclass 20, count 0 2006.229.11:22:12.48#ibcon#*before return 0, iclass 20, count 0 2006.229.11:22:12.48#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:12.48#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:12.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:22:12.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:22:12.48$vck44/va=5,4 2006.229.11:22:12.48#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.11:22:12.48#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.11:22:12.48#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:12.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:12.54#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:12.54#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:12.54#ibcon#enter wrdev, iclass 22, count 2 2006.229.11:22:12.54#ibcon#first serial, iclass 22, count 2 2006.229.11:22:12.54#ibcon#enter sib2, iclass 22, count 2 2006.229.11:22:12.54#ibcon#flushed, iclass 22, count 2 2006.229.11:22:12.54#ibcon#about to write, iclass 22, count 2 2006.229.11:22:12.54#ibcon#wrote, iclass 22, count 2 2006.229.11:22:12.54#ibcon#about to read 3, iclass 22, count 2 2006.229.11:22:12.56#ibcon#read 3, iclass 22, count 2 2006.229.11:22:12.56#ibcon#about to read 4, iclass 22, count 2 2006.229.11:22:12.56#ibcon#read 4, iclass 22, count 2 2006.229.11:22:12.56#ibcon#about to read 5, iclass 22, count 2 2006.229.11:22:12.56#ibcon#read 5, iclass 22, count 2 2006.229.11:22:12.56#ibcon#about to read 6, iclass 22, count 2 2006.229.11:22:12.56#ibcon#read 6, iclass 22, count 2 2006.229.11:22:12.56#ibcon#end of sib2, iclass 22, count 2 2006.229.11:22:12.56#ibcon#*mode == 0, iclass 22, count 2 2006.229.11:22:12.56#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.11:22:12.56#ibcon#[25=AT05-04\r\n] 2006.229.11:22:12.56#ibcon#*before write, iclass 22, count 2 2006.229.11:22:12.56#ibcon#enter sib2, iclass 22, count 2 2006.229.11:22:12.56#ibcon#flushed, iclass 22, count 2 2006.229.11:22:12.56#ibcon#about to write, iclass 22, count 2 2006.229.11:22:12.56#ibcon#wrote, iclass 22, count 2 2006.229.11:22:12.56#ibcon#about to read 3, iclass 22, count 2 2006.229.11:22:12.59#ibcon#read 3, iclass 22, count 2 2006.229.11:22:12.59#ibcon#about to read 4, iclass 22, count 2 2006.229.11:22:12.59#ibcon#read 4, iclass 22, count 2 2006.229.11:22:12.59#ibcon#about to read 5, iclass 22, count 2 2006.229.11:22:12.59#ibcon#read 5, iclass 22, count 2 2006.229.11:22:12.59#ibcon#about to read 6, iclass 22, count 2 2006.229.11:22:12.59#ibcon#read 6, iclass 22, count 2 2006.229.11:22:12.59#ibcon#end of sib2, iclass 22, count 2 2006.229.11:22:12.59#ibcon#*after write, iclass 22, count 2 2006.229.11:22:12.59#ibcon#*before return 0, iclass 22, count 2 2006.229.11:22:12.59#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:12.59#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:12.59#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.11:22:12.59#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:12.59#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:12.71#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:12.71#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:12.71#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:22:12.71#ibcon#first serial, iclass 22, count 0 2006.229.11:22:12.71#ibcon#enter sib2, iclass 22, count 0 2006.229.11:22:12.71#ibcon#flushed, iclass 22, count 0 2006.229.11:22:12.71#ibcon#about to write, iclass 22, count 0 2006.229.11:22:12.71#ibcon#wrote, iclass 22, count 0 2006.229.11:22:12.71#ibcon#about to read 3, iclass 22, count 0 2006.229.11:22:12.73#ibcon#read 3, iclass 22, count 0 2006.229.11:22:12.73#ibcon#about to read 4, iclass 22, count 0 2006.229.11:22:12.73#ibcon#read 4, iclass 22, count 0 2006.229.11:22:12.73#ibcon#about to read 5, iclass 22, count 0 2006.229.11:22:12.73#ibcon#read 5, iclass 22, count 0 2006.229.11:22:12.73#ibcon#about to read 6, iclass 22, count 0 2006.229.11:22:12.73#ibcon#read 6, iclass 22, count 0 2006.229.11:22:12.73#ibcon#end of sib2, iclass 22, count 0 2006.229.11:22:12.73#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:22:12.73#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:22:12.73#ibcon#[25=USB\r\n] 2006.229.11:22:12.73#ibcon#*before write, iclass 22, count 0 2006.229.11:22:12.73#ibcon#enter sib2, iclass 22, count 0 2006.229.11:22:12.73#ibcon#flushed, iclass 22, count 0 2006.229.11:22:12.73#ibcon#about to write, iclass 22, count 0 2006.229.11:22:12.73#ibcon#wrote, iclass 22, count 0 2006.229.11:22:12.73#ibcon#about to read 3, iclass 22, count 0 2006.229.11:22:12.76#ibcon#read 3, iclass 22, count 0 2006.229.11:22:12.76#ibcon#about to read 4, iclass 22, count 0 2006.229.11:22:12.76#ibcon#read 4, iclass 22, count 0 2006.229.11:22:12.76#ibcon#about to read 5, iclass 22, count 0 2006.229.11:22:12.76#ibcon#read 5, iclass 22, count 0 2006.229.11:22:12.76#ibcon#about to read 6, iclass 22, count 0 2006.229.11:22:12.76#ibcon#read 6, iclass 22, count 0 2006.229.11:22:12.76#ibcon#end of sib2, iclass 22, count 0 2006.229.11:22:12.76#ibcon#*after write, iclass 22, count 0 2006.229.11:22:12.76#ibcon#*before return 0, iclass 22, count 0 2006.229.11:22:12.76#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:12.76#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:12.76#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:22:12.76#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:22:12.76$vck44/valo=6,814.99 2006.229.11:22:12.76#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.11:22:12.76#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.11:22:12.76#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:12.76#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:12.76#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:12.76#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:12.76#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:22:12.76#ibcon#first serial, iclass 24, count 0 2006.229.11:22:12.76#ibcon#enter sib2, iclass 24, count 0 2006.229.11:22:12.76#ibcon#flushed, iclass 24, count 0 2006.229.11:22:12.76#ibcon#about to write, iclass 24, count 0 2006.229.11:22:12.76#ibcon#wrote, iclass 24, count 0 2006.229.11:22:12.76#ibcon#about to read 3, iclass 24, count 0 2006.229.11:22:12.78#ibcon#read 3, iclass 24, count 0 2006.229.11:22:12.78#ibcon#about to read 4, iclass 24, count 0 2006.229.11:22:12.78#ibcon#read 4, iclass 24, count 0 2006.229.11:22:12.78#ibcon#about to read 5, iclass 24, count 0 2006.229.11:22:12.78#ibcon#read 5, iclass 24, count 0 2006.229.11:22:12.78#ibcon#about to read 6, iclass 24, count 0 2006.229.11:22:12.78#ibcon#read 6, iclass 24, count 0 2006.229.11:22:12.78#ibcon#end of sib2, iclass 24, count 0 2006.229.11:22:12.78#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:22:12.78#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:22:12.78#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:22:12.78#ibcon#*before write, iclass 24, count 0 2006.229.11:22:12.78#ibcon#enter sib2, iclass 24, count 0 2006.229.11:22:12.78#ibcon#flushed, iclass 24, count 0 2006.229.11:22:12.78#ibcon#about to write, iclass 24, count 0 2006.229.11:22:12.78#ibcon#wrote, iclass 24, count 0 2006.229.11:22:12.78#ibcon#about to read 3, iclass 24, count 0 2006.229.11:22:12.82#ibcon#read 3, iclass 24, count 0 2006.229.11:22:12.82#ibcon#about to read 4, iclass 24, count 0 2006.229.11:22:12.82#ibcon#read 4, iclass 24, count 0 2006.229.11:22:12.82#ibcon#about to read 5, iclass 24, count 0 2006.229.11:22:12.82#ibcon#read 5, iclass 24, count 0 2006.229.11:22:12.82#ibcon#about to read 6, iclass 24, count 0 2006.229.11:22:12.82#ibcon#read 6, iclass 24, count 0 2006.229.11:22:12.82#ibcon#end of sib2, iclass 24, count 0 2006.229.11:22:12.82#ibcon#*after write, iclass 24, count 0 2006.229.11:22:12.82#ibcon#*before return 0, iclass 24, count 0 2006.229.11:22:12.82#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:12.82#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:12.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:22:12.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:22:12.82$vck44/va=6,4 2006.229.11:22:12.82#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.11:22:12.82#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.11:22:12.82#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:12.82#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:12.88#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:12.88#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:12.88#ibcon#enter wrdev, iclass 26, count 2 2006.229.11:22:12.88#ibcon#first serial, iclass 26, count 2 2006.229.11:22:12.88#ibcon#enter sib2, iclass 26, count 2 2006.229.11:22:12.88#ibcon#flushed, iclass 26, count 2 2006.229.11:22:12.88#ibcon#about to write, iclass 26, count 2 2006.229.11:22:12.88#ibcon#wrote, iclass 26, count 2 2006.229.11:22:12.88#ibcon#about to read 3, iclass 26, count 2 2006.229.11:22:12.90#ibcon#read 3, iclass 26, count 2 2006.229.11:22:12.90#ibcon#about to read 4, iclass 26, count 2 2006.229.11:22:12.90#ibcon#read 4, iclass 26, count 2 2006.229.11:22:12.90#ibcon#about to read 5, iclass 26, count 2 2006.229.11:22:12.90#ibcon#read 5, iclass 26, count 2 2006.229.11:22:12.90#ibcon#about to read 6, iclass 26, count 2 2006.229.11:22:12.90#ibcon#read 6, iclass 26, count 2 2006.229.11:22:12.90#ibcon#end of sib2, iclass 26, count 2 2006.229.11:22:12.90#ibcon#*mode == 0, iclass 26, count 2 2006.229.11:22:12.90#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.11:22:12.90#ibcon#[25=AT06-04\r\n] 2006.229.11:22:12.90#ibcon#*before write, iclass 26, count 2 2006.229.11:22:12.90#ibcon#enter sib2, iclass 26, count 2 2006.229.11:22:12.90#ibcon#flushed, iclass 26, count 2 2006.229.11:22:12.90#ibcon#about to write, iclass 26, count 2 2006.229.11:22:12.90#ibcon#wrote, iclass 26, count 2 2006.229.11:22:12.90#ibcon#about to read 3, iclass 26, count 2 2006.229.11:22:12.93#ibcon#read 3, iclass 26, count 2 2006.229.11:22:12.93#ibcon#about to read 4, iclass 26, count 2 2006.229.11:22:12.93#ibcon#read 4, iclass 26, count 2 2006.229.11:22:12.93#ibcon#about to read 5, iclass 26, count 2 2006.229.11:22:12.93#ibcon#read 5, iclass 26, count 2 2006.229.11:22:12.93#ibcon#about to read 6, iclass 26, count 2 2006.229.11:22:12.93#ibcon#read 6, iclass 26, count 2 2006.229.11:22:12.93#ibcon#end of sib2, iclass 26, count 2 2006.229.11:22:12.93#ibcon#*after write, iclass 26, count 2 2006.229.11:22:12.93#ibcon#*before return 0, iclass 26, count 2 2006.229.11:22:12.93#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:12.93#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:12.93#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.11:22:12.93#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:12.93#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:13.05#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:13.05#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:13.05#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:22:13.05#ibcon#first serial, iclass 26, count 0 2006.229.11:22:13.05#ibcon#enter sib2, iclass 26, count 0 2006.229.11:22:13.05#ibcon#flushed, iclass 26, count 0 2006.229.11:22:13.05#ibcon#about to write, iclass 26, count 0 2006.229.11:22:13.05#ibcon#wrote, iclass 26, count 0 2006.229.11:22:13.05#ibcon#about to read 3, iclass 26, count 0 2006.229.11:22:13.07#ibcon#read 3, iclass 26, count 0 2006.229.11:22:13.07#ibcon#about to read 4, iclass 26, count 0 2006.229.11:22:13.07#ibcon#read 4, iclass 26, count 0 2006.229.11:22:13.07#ibcon#about to read 5, iclass 26, count 0 2006.229.11:22:13.07#ibcon#read 5, iclass 26, count 0 2006.229.11:22:13.07#ibcon#about to read 6, iclass 26, count 0 2006.229.11:22:13.07#ibcon#read 6, iclass 26, count 0 2006.229.11:22:13.07#ibcon#end of sib2, iclass 26, count 0 2006.229.11:22:13.07#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:22:13.07#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:22:13.07#ibcon#[25=USB\r\n] 2006.229.11:22:13.07#ibcon#*before write, iclass 26, count 0 2006.229.11:22:13.07#ibcon#enter sib2, iclass 26, count 0 2006.229.11:22:13.07#ibcon#flushed, iclass 26, count 0 2006.229.11:22:13.07#ibcon#about to write, iclass 26, count 0 2006.229.11:22:13.07#ibcon#wrote, iclass 26, count 0 2006.229.11:22:13.07#ibcon#about to read 3, iclass 26, count 0 2006.229.11:22:13.10#ibcon#read 3, iclass 26, count 0 2006.229.11:22:13.10#ibcon#about to read 4, iclass 26, count 0 2006.229.11:22:13.10#ibcon#read 4, iclass 26, count 0 2006.229.11:22:13.10#ibcon#about to read 5, iclass 26, count 0 2006.229.11:22:13.10#ibcon#read 5, iclass 26, count 0 2006.229.11:22:13.10#ibcon#about to read 6, iclass 26, count 0 2006.229.11:22:13.10#ibcon#read 6, iclass 26, count 0 2006.229.11:22:13.10#ibcon#end of sib2, iclass 26, count 0 2006.229.11:22:13.10#ibcon#*after write, iclass 26, count 0 2006.229.11:22:13.10#ibcon#*before return 0, iclass 26, count 0 2006.229.11:22:13.10#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:13.10#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:13.10#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:22:13.10#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:22:13.10$vck44/valo=7,864.99 2006.229.11:22:13.10#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.11:22:13.10#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.11:22:13.10#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:13.10#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:13.10#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:13.10#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:13.10#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:22:13.10#ibcon#first serial, iclass 28, count 0 2006.229.11:22:13.10#ibcon#enter sib2, iclass 28, count 0 2006.229.11:22:13.10#ibcon#flushed, iclass 28, count 0 2006.229.11:22:13.10#ibcon#about to write, iclass 28, count 0 2006.229.11:22:13.10#ibcon#wrote, iclass 28, count 0 2006.229.11:22:13.10#ibcon#about to read 3, iclass 28, count 0 2006.229.11:22:13.12#ibcon#read 3, iclass 28, count 0 2006.229.11:22:13.12#ibcon#about to read 4, iclass 28, count 0 2006.229.11:22:13.12#ibcon#read 4, iclass 28, count 0 2006.229.11:22:13.12#ibcon#about to read 5, iclass 28, count 0 2006.229.11:22:13.12#ibcon#read 5, iclass 28, count 0 2006.229.11:22:13.12#ibcon#about to read 6, iclass 28, count 0 2006.229.11:22:13.12#ibcon#read 6, iclass 28, count 0 2006.229.11:22:13.12#ibcon#end of sib2, iclass 28, count 0 2006.229.11:22:13.12#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:22:13.12#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:22:13.12#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:22:13.12#ibcon#*before write, iclass 28, count 0 2006.229.11:22:13.12#ibcon#enter sib2, iclass 28, count 0 2006.229.11:22:13.12#ibcon#flushed, iclass 28, count 0 2006.229.11:22:13.12#ibcon#about to write, iclass 28, count 0 2006.229.11:22:13.12#ibcon#wrote, iclass 28, count 0 2006.229.11:22:13.12#ibcon#about to read 3, iclass 28, count 0 2006.229.11:22:13.16#ibcon#read 3, iclass 28, count 0 2006.229.11:22:13.16#ibcon#about to read 4, iclass 28, count 0 2006.229.11:22:13.16#ibcon#read 4, iclass 28, count 0 2006.229.11:22:13.16#ibcon#about to read 5, iclass 28, count 0 2006.229.11:22:13.16#ibcon#read 5, iclass 28, count 0 2006.229.11:22:13.16#ibcon#about to read 6, iclass 28, count 0 2006.229.11:22:13.16#ibcon#read 6, iclass 28, count 0 2006.229.11:22:13.16#ibcon#end of sib2, iclass 28, count 0 2006.229.11:22:13.16#ibcon#*after write, iclass 28, count 0 2006.229.11:22:13.16#ibcon#*before return 0, iclass 28, count 0 2006.229.11:22:13.16#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:13.16#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:13.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:22:13.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:22:13.16$vck44/va=7,5 2006.229.11:22:13.16#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.11:22:13.16#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.11:22:13.16#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:13.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:13.22#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:13.22#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:13.22#ibcon#enter wrdev, iclass 30, count 2 2006.229.11:22:13.22#ibcon#first serial, iclass 30, count 2 2006.229.11:22:13.22#ibcon#enter sib2, iclass 30, count 2 2006.229.11:22:13.22#ibcon#flushed, iclass 30, count 2 2006.229.11:22:13.22#ibcon#about to write, iclass 30, count 2 2006.229.11:22:13.22#ibcon#wrote, iclass 30, count 2 2006.229.11:22:13.22#ibcon#about to read 3, iclass 30, count 2 2006.229.11:22:13.24#ibcon#read 3, iclass 30, count 2 2006.229.11:22:13.24#ibcon#about to read 4, iclass 30, count 2 2006.229.11:22:13.24#ibcon#read 4, iclass 30, count 2 2006.229.11:22:13.24#ibcon#about to read 5, iclass 30, count 2 2006.229.11:22:13.24#ibcon#read 5, iclass 30, count 2 2006.229.11:22:13.24#ibcon#about to read 6, iclass 30, count 2 2006.229.11:22:13.24#ibcon#read 6, iclass 30, count 2 2006.229.11:22:13.24#ibcon#end of sib2, iclass 30, count 2 2006.229.11:22:13.24#ibcon#*mode == 0, iclass 30, count 2 2006.229.11:22:13.24#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.11:22:13.24#ibcon#[25=AT07-05\r\n] 2006.229.11:22:13.24#ibcon#*before write, iclass 30, count 2 2006.229.11:22:13.24#ibcon#enter sib2, iclass 30, count 2 2006.229.11:22:13.24#ibcon#flushed, iclass 30, count 2 2006.229.11:22:13.24#ibcon#about to write, iclass 30, count 2 2006.229.11:22:13.24#ibcon#wrote, iclass 30, count 2 2006.229.11:22:13.24#ibcon#about to read 3, iclass 30, count 2 2006.229.11:22:13.27#ibcon#read 3, iclass 30, count 2 2006.229.11:22:13.27#ibcon#about to read 4, iclass 30, count 2 2006.229.11:22:13.27#ibcon#read 4, iclass 30, count 2 2006.229.11:22:13.27#ibcon#about to read 5, iclass 30, count 2 2006.229.11:22:13.27#ibcon#read 5, iclass 30, count 2 2006.229.11:22:13.27#ibcon#about to read 6, iclass 30, count 2 2006.229.11:22:13.27#ibcon#read 6, iclass 30, count 2 2006.229.11:22:13.27#ibcon#end of sib2, iclass 30, count 2 2006.229.11:22:13.27#ibcon#*after write, iclass 30, count 2 2006.229.11:22:13.27#ibcon#*before return 0, iclass 30, count 2 2006.229.11:22:13.27#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:13.27#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:13.27#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.11:22:13.27#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:13.27#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:13.39#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:13.39#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:13.39#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:22:13.39#ibcon#first serial, iclass 30, count 0 2006.229.11:22:13.39#ibcon#enter sib2, iclass 30, count 0 2006.229.11:22:13.39#ibcon#flushed, iclass 30, count 0 2006.229.11:22:13.39#ibcon#about to write, iclass 30, count 0 2006.229.11:22:13.39#ibcon#wrote, iclass 30, count 0 2006.229.11:22:13.39#ibcon#about to read 3, iclass 30, count 0 2006.229.11:22:13.41#ibcon#read 3, iclass 30, count 0 2006.229.11:22:13.41#ibcon#about to read 4, iclass 30, count 0 2006.229.11:22:13.41#ibcon#read 4, iclass 30, count 0 2006.229.11:22:13.41#ibcon#about to read 5, iclass 30, count 0 2006.229.11:22:13.41#ibcon#read 5, iclass 30, count 0 2006.229.11:22:13.41#ibcon#about to read 6, iclass 30, count 0 2006.229.11:22:13.41#ibcon#read 6, iclass 30, count 0 2006.229.11:22:13.41#ibcon#end of sib2, iclass 30, count 0 2006.229.11:22:13.41#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:22:13.41#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:22:13.41#ibcon#[25=USB\r\n] 2006.229.11:22:13.41#ibcon#*before write, iclass 30, count 0 2006.229.11:22:13.41#ibcon#enter sib2, iclass 30, count 0 2006.229.11:22:13.41#ibcon#flushed, iclass 30, count 0 2006.229.11:22:13.41#ibcon#about to write, iclass 30, count 0 2006.229.11:22:13.41#ibcon#wrote, iclass 30, count 0 2006.229.11:22:13.41#ibcon#about to read 3, iclass 30, count 0 2006.229.11:22:13.44#ibcon#read 3, iclass 30, count 0 2006.229.11:22:13.44#ibcon#about to read 4, iclass 30, count 0 2006.229.11:22:13.44#ibcon#read 4, iclass 30, count 0 2006.229.11:22:13.44#ibcon#about to read 5, iclass 30, count 0 2006.229.11:22:13.44#ibcon#read 5, iclass 30, count 0 2006.229.11:22:13.44#ibcon#about to read 6, iclass 30, count 0 2006.229.11:22:13.44#ibcon#read 6, iclass 30, count 0 2006.229.11:22:13.44#ibcon#end of sib2, iclass 30, count 0 2006.229.11:22:13.44#ibcon#*after write, iclass 30, count 0 2006.229.11:22:13.44#ibcon#*before return 0, iclass 30, count 0 2006.229.11:22:13.44#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:13.44#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:13.44#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:22:13.44#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:22:13.44$vck44/valo=8,884.99 2006.229.11:22:13.44#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.11:22:13.44#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.11:22:13.44#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:13.44#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:13.44#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:13.44#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:13.44#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:22:13.44#ibcon#first serial, iclass 32, count 0 2006.229.11:22:13.44#ibcon#enter sib2, iclass 32, count 0 2006.229.11:22:13.44#ibcon#flushed, iclass 32, count 0 2006.229.11:22:13.44#ibcon#about to write, iclass 32, count 0 2006.229.11:22:13.44#ibcon#wrote, iclass 32, count 0 2006.229.11:22:13.44#ibcon#about to read 3, iclass 32, count 0 2006.229.11:22:13.46#ibcon#read 3, iclass 32, count 0 2006.229.11:22:13.46#ibcon#about to read 4, iclass 32, count 0 2006.229.11:22:13.46#ibcon#read 4, iclass 32, count 0 2006.229.11:22:13.46#ibcon#about to read 5, iclass 32, count 0 2006.229.11:22:13.46#ibcon#read 5, iclass 32, count 0 2006.229.11:22:13.46#ibcon#about to read 6, iclass 32, count 0 2006.229.11:22:13.46#ibcon#read 6, iclass 32, count 0 2006.229.11:22:13.46#ibcon#end of sib2, iclass 32, count 0 2006.229.11:22:13.46#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:22:13.46#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:22:13.46#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:22:13.46#ibcon#*before write, iclass 32, count 0 2006.229.11:22:13.46#ibcon#enter sib2, iclass 32, count 0 2006.229.11:22:13.46#ibcon#flushed, iclass 32, count 0 2006.229.11:22:13.46#ibcon#about to write, iclass 32, count 0 2006.229.11:22:13.46#ibcon#wrote, iclass 32, count 0 2006.229.11:22:13.46#ibcon#about to read 3, iclass 32, count 0 2006.229.11:22:13.50#ibcon#read 3, iclass 32, count 0 2006.229.11:22:13.50#ibcon#about to read 4, iclass 32, count 0 2006.229.11:22:13.50#ibcon#read 4, iclass 32, count 0 2006.229.11:22:13.50#ibcon#about to read 5, iclass 32, count 0 2006.229.11:22:13.50#ibcon#read 5, iclass 32, count 0 2006.229.11:22:13.50#ibcon#about to read 6, iclass 32, count 0 2006.229.11:22:13.50#ibcon#read 6, iclass 32, count 0 2006.229.11:22:13.50#ibcon#end of sib2, iclass 32, count 0 2006.229.11:22:13.50#ibcon#*after write, iclass 32, count 0 2006.229.11:22:13.50#ibcon#*before return 0, iclass 32, count 0 2006.229.11:22:13.50#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:13.50#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:13.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:22:13.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:22:13.50$vck44/va=8,6 2006.229.11:22:13.50#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.11:22:13.50#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.11:22:13.50#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:13.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:22:13.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:22:13.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:22:13.56#ibcon#enter wrdev, iclass 34, count 2 2006.229.11:22:13.56#ibcon#first serial, iclass 34, count 2 2006.229.11:22:13.56#ibcon#enter sib2, iclass 34, count 2 2006.229.11:22:13.56#ibcon#flushed, iclass 34, count 2 2006.229.11:22:13.56#ibcon#about to write, iclass 34, count 2 2006.229.11:22:13.56#ibcon#wrote, iclass 34, count 2 2006.229.11:22:13.56#ibcon#about to read 3, iclass 34, count 2 2006.229.11:22:13.58#ibcon#read 3, iclass 34, count 2 2006.229.11:22:13.58#ibcon#about to read 4, iclass 34, count 2 2006.229.11:22:13.58#ibcon#read 4, iclass 34, count 2 2006.229.11:22:13.58#ibcon#about to read 5, iclass 34, count 2 2006.229.11:22:13.58#ibcon#read 5, iclass 34, count 2 2006.229.11:22:13.58#ibcon#about to read 6, iclass 34, count 2 2006.229.11:22:13.58#ibcon#read 6, iclass 34, count 2 2006.229.11:22:13.58#ibcon#end of sib2, iclass 34, count 2 2006.229.11:22:13.58#ibcon#*mode == 0, iclass 34, count 2 2006.229.11:22:13.58#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.11:22:13.58#ibcon#[25=AT08-06\r\n] 2006.229.11:22:13.58#ibcon#*before write, iclass 34, count 2 2006.229.11:22:13.58#ibcon#enter sib2, iclass 34, count 2 2006.229.11:22:13.58#ibcon#flushed, iclass 34, count 2 2006.229.11:22:13.58#ibcon#about to write, iclass 34, count 2 2006.229.11:22:13.58#ibcon#wrote, iclass 34, count 2 2006.229.11:22:13.58#ibcon#about to read 3, iclass 34, count 2 2006.229.11:22:13.61#ibcon#read 3, iclass 34, count 2 2006.229.11:22:13.61#ibcon#about to read 4, iclass 34, count 2 2006.229.11:22:13.61#ibcon#read 4, iclass 34, count 2 2006.229.11:22:13.61#ibcon#about to read 5, iclass 34, count 2 2006.229.11:22:13.61#ibcon#read 5, iclass 34, count 2 2006.229.11:22:13.61#ibcon#about to read 6, iclass 34, count 2 2006.229.11:22:13.61#ibcon#read 6, iclass 34, count 2 2006.229.11:22:13.61#ibcon#end of sib2, iclass 34, count 2 2006.229.11:22:13.61#ibcon#*after write, iclass 34, count 2 2006.229.11:22:13.61#ibcon#*before return 0, iclass 34, count 2 2006.229.11:22:13.61#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:22:13.61#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:22:13.61#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.11:22:13.61#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:13.61#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:22:13.73#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:22:13.73#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:22:13.73#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:22:13.73#ibcon#first serial, iclass 34, count 0 2006.229.11:22:13.73#ibcon#enter sib2, iclass 34, count 0 2006.229.11:22:13.73#ibcon#flushed, iclass 34, count 0 2006.229.11:22:13.73#ibcon#about to write, iclass 34, count 0 2006.229.11:22:13.73#ibcon#wrote, iclass 34, count 0 2006.229.11:22:13.73#ibcon#about to read 3, iclass 34, count 0 2006.229.11:22:13.75#ibcon#read 3, iclass 34, count 0 2006.229.11:22:13.75#ibcon#about to read 4, iclass 34, count 0 2006.229.11:22:13.75#ibcon#read 4, iclass 34, count 0 2006.229.11:22:13.75#ibcon#about to read 5, iclass 34, count 0 2006.229.11:22:13.75#ibcon#read 5, iclass 34, count 0 2006.229.11:22:13.75#ibcon#about to read 6, iclass 34, count 0 2006.229.11:22:13.75#ibcon#read 6, iclass 34, count 0 2006.229.11:22:13.75#ibcon#end of sib2, iclass 34, count 0 2006.229.11:22:13.75#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:22:13.75#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:22:13.75#ibcon#[25=USB\r\n] 2006.229.11:22:13.75#ibcon#*before write, iclass 34, count 0 2006.229.11:22:13.75#ibcon#enter sib2, iclass 34, count 0 2006.229.11:22:13.75#ibcon#flushed, iclass 34, count 0 2006.229.11:22:13.75#ibcon#about to write, iclass 34, count 0 2006.229.11:22:13.75#ibcon#wrote, iclass 34, count 0 2006.229.11:22:13.75#ibcon#about to read 3, iclass 34, count 0 2006.229.11:22:13.78#ibcon#read 3, iclass 34, count 0 2006.229.11:22:13.78#ibcon#about to read 4, iclass 34, count 0 2006.229.11:22:13.78#ibcon#read 4, iclass 34, count 0 2006.229.11:22:13.78#ibcon#about to read 5, iclass 34, count 0 2006.229.11:22:13.78#ibcon#read 5, iclass 34, count 0 2006.229.11:22:13.78#ibcon#about to read 6, iclass 34, count 0 2006.229.11:22:13.78#ibcon#read 6, iclass 34, count 0 2006.229.11:22:13.78#ibcon#end of sib2, iclass 34, count 0 2006.229.11:22:13.78#ibcon#*after write, iclass 34, count 0 2006.229.11:22:13.78#ibcon#*before return 0, iclass 34, count 0 2006.229.11:22:13.78#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:22:13.78#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:22:13.78#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:22:13.78#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:22:13.78$vck44/vblo=1,629.99 2006.229.11:22:13.78#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.11:22:13.78#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.11:22:13.78#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:13.78#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:22:13.78#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:22:13.78#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:22:13.78#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:22:13.78#ibcon#first serial, iclass 36, count 0 2006.229.11:22:13.78#ibcon#enter sib2, iclass 36, count 0 2006.229.11:22:13.78#ibcon#flushed, iclass 36, count 0 2006.229.11:22:13.78#ibcon#about to write, iclass 36, count 0 2006.229.11:22:13.78#ibcon#wrote, iclass 36, count 0 2006.229.11:22:13.78#ibcon#about to read 3, iclass 36, count 0 2006.229.11:22:13.80#ibcon#read 3, iclass 36, count 0 2006.229.11:22:13.80#ibcon#about to read 4, iclass 36, count 0 2006.229.11:22:13.80#ibcon#read 4, iclass 36, count 0 2006.229.11:22:13.80#ibcon#about to read 5, iclass 36, count 0 2006.229.11:22:13.80#ibcon#read 5, iclass 36, count 0 2006.229.11:22:13.80#ibcon#about to read 6, iclass 36, count 0 2006.229.11:22:13.80#ibcon#read 6, iclass 36, count 0 2006.229.11:22:13.80#ibcon#end of sib2, iclass 36, count 0 2006.229.11:22:13.80#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:22:13.80#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:22:13.80#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:22:13.80#ibcon#*before write, iclass 36, count 0 2006.229.11:22:13.80#ibcon#enter sib2, iclass 36, count 0 2006.229.11:22:13.80#ibcon#flushed, iclass 36, count 0 2006.229.11:22:13.80#ibcon#about to write, iclass 36, count 0 2006.229.11:22:13.80#ibcon#wrote, iclass 36, count 0 2006.229.11:22:13.80#ibcon#about to read 3, iclass 36, count 0 2006.229.11:22:13.84#ibcon#read 3, iclass 36, count 0 2006.229.11:22:13.84#ibcon#about to read 4, iclass 36, count 0 2006.229.11:22:13.84#ibcon#read 4, iclass 36, count 0 2006.229.11:22:13.84#ibcon#about to read 5, iclass 36, count 0 2006.229.11:22:13.84#ibcon#read 5, iclass 36, count 0 2006.229.11:22:13.84#ibcon#about to read 6, iclass 36, count 0 2006.229.11:22:13.84#ibcon#read 6, iclass 36, count 0 2006.229.11:22:13.84#ibcon#end of sib2, iclass 36, count 0 2006.229.11:22:13.84#ibcon#*after write, iclass 36, count 0 2006.229.11:22:13.84#ibcon#*before return 0, iclass 36, count 0 2006.229.11:22:13.84#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:22:13.84#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:22:13.84#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:22:13.84#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:22:13.84$vck44/vb=1,4 2006.229.11:22:13.84#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.11:22:13.84#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.11:22:13.84#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:13.84#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:22:13.84#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:22:13.84#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:22:13.84#ibcon#enter wrdev, iclass 38, count 2 2006.229.11:22:13.84#ibcon#first serial, iclass 38, count 2 2006.229.11:22:13.84#ibcon#enter sib2, iclass 38, count 2 2006.229.11:22:13.84#ibcon#flushed, iclass 38, count 2 2006.229.11:22:13.84#ibcon#about to write, iclass 38, count 2 2006.229.11:22:13.84#ibcon#wrote, iclass 38, count 2 2006.229.11:22:13.84#ibcon#about to read 3, iclass 38, count 2 2006.229.11:22:13.86#ibcon#read 3, iclass 38, count 2 2006.229.11:22:13.86#ibcon#about to read 4, iclass 38, count 2 2006.229.11:22:13.86#ibcon#read 4, iclass 38, count 2 2006.229.11:22:13.86#ibcon#about to read 5, iclass 38, count 2 2006.229.11:22:13.86#ibcon#read 5, iclass 38, count 2 2006.229.11:22:13.86#ibcon#about to read 6, iclass 38, count 2 2006.229.11:22:13.86#ibcon#read 6, iclass 38, count 2 2006.229.11:22:13.86#ibcon#end of sib2, iclass 38, count 2 2006.229.11:22:13.86#ibcon#*mode == 0, iclass 38, count 2 2006.229.11:22:13.86#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.11:22:13.86#ibcon#[27=AT01-04\r\n] 2006.229.11:22:13.86#ibcon#*before write, iclass 38, count 2 2006.229.11:22:13.86#ibcon#enter sib2, iclass 38, count 2 2006.229.11:22:13.86#ibcon#flushed, iclass 38, count 2 2006.229.11:22:13.86#ibcon#about to write, iclass 38, count 2 2006.229.11:22:13.86#ibcon#wrote, iclass 38, count 2 2006.229.11:22:13.86#ibcon#about to read 3, iclass 38, count 2 2006.229.11:22:13.89#ibcon#read 3, iclass 38, count 2 2006.229.11:22:13.89#ibcon#about to read 4, iclass 38, count 2 2006.229.11:22:13.89#ibcon#read 4, iclass 38, count 2 2006.229.11:22:13.89#ibcon#about to read 5, iclass 38, count 2 2006.229.11:22:13.89#ibcon#read 5, iclass 38, count 2 2006.229.11:22:13.89#ibcon#about to read 6, iclass 38, count 2 2006.229.11:22:13.89#ibcon#read 6, iclass 38, count 2 2006.229.11:22:13.89#ibcon#end of sib2, iclass 38, count 2 2006.229.11:22:13.89#ibcon#*after write, iclass 38, count 2 2006.229.11:22:13.89#ibcon#*before return 0, iclass 38, count 2 2006.229.11:22:13.89#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:22:13.89#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:22:13.89#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.11:22:13.89#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:13.89#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:22:14.01#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:22:14.01#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:22:14.01#ibcon#enter wrdev, iclass 38, count 0 2006.229.11:22:14.01#ibcon#first serial, iclass 38, count 0 2006.229.11:22:14.01#ibcon#enter sib2, iclass 38, count 0 2006.229.11:22:14.01#ibcon#flushed, iclass 38, count 0 2006.229.11:22:14.01#ibcon#about to write, iclass 38, count 0 2006.229.11:22:14.01#ibcon#wrote, iclass 38, count 0 2006.229.11:22:14.01#ibcon#about to read 3, iclass 38, count 0 2006.229.11:22:14.03#ibcon#read 3, iclass 38, count 0 2006.229.11:22:14.03#ibcon#about to read 4, iclass 38, count 0 2006.229.11:22:14.03#ibcon#read 4, iclass 38, count 0 2006.229.11:22:14.03#ibcon#about to read 5, iclass 38, count 0 2006.229.11:22:14.03#ibcon#read 5, iclass 38, count 0 2006.229.11:22:14.03#ibcon#about to read 6, iclass 38, count 0 2006.229.11:22:14.03#ibcon#read 6, iclass 38, count 0 2006.229.11:22:14.03#ibcon#end of sib2, iclass 38, count 0 2006.229.11:22:14.03#ibcon#*mode == 0, iclass 38, count 0 2006.229.11:22:14.03#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.11:22:14.03#ibcon#[27=USB\r\n] 2006.229.11:22:14.03#ibcon#*before write, iclass 38, count 0 2006.229.11:22:14.03#ibcon#enter sib2, iclass 38, count 0 2006.229.11:22:14.03#ibcon#flushed, iclass 38, count 0 2006.229.11:22:14.03#ibcon#about to write, iclass 38, count 0 2006.229.11:22:14.03#ibcon#wrote, iclass 38, count 0 2006.229.11:22:14.03#ibcon#about to read 3, iclass 38, count 0 2006.229.11:22:14.06#ibcon#read 3, iclass 38, count 0 2006.229.11:22:14.06#ibcon#about to read 4, iclass 38, count 0 2006.229.11:22:14.06#ibcon#read 4, iclass 38, count 0 2006.229.11:22:14.06#ibcon#about to read 5, iclass 38, count 0 2006.229.11:22:14.06#ibcon#read 5, iclass 38, count 0 2006.229.11:22:14.06#ibcon#about to read 6, iclass 38, count 0 2006.229.11:22:14.06#ibcon#read 6, iclass 38, count 0 2006.229.11:22:14.06#ibcon#end of sib2, iclass 38, count 0 2006.229.11:22:14.06#ibcon#*after write, iclass 38, count 0 2006.229.11:22:14.06#ibcon#*before return 0, iclass 38, count 0 2006.229.11:22:14.06#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:22:14.06#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:22:14.06#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.11:22:14.06#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.11:22:14.06$vck44/vblo=2,634.99 2006.229.11:22:14.06#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.11:22:14.06#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.11:22:14.06#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:14.06#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:14.06#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:14.06#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:14.06#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:22:14.06#ibcon#first serial, iclass 40, count 0 2006.229.11:22:14.06#ibcon#enter sib2, iclass 40, count 0 2006.229.11:22:14.06#ibcon#flushed, iclass 40, count 0 2006.229.11:22:14.06#ibcon#about to write, iclass 40, count 0 2006.229.11:22:14.06#ibcon#wrote, iclass 40, count 0 2006.229.11:22:14.06#ibcon#about to read 3, iclass 40, count 0 2006.229.11:22:14.08#ibcon#read 3, iclass 40, count 0 2006.229.11:22:14.08#ibcon#about to read 4, iclass 40, count 0 2006.229.11:22:14.08#ibcon#read 4, iclass 40, count 0 2006.229.11:22:14.08#ibcon#about to read 5, iclass 40, count 0 2006.229.11:22:14.08#ibcon#read 5, iclass 40, count 0 2006.229.11:22:14.08#ibcon#about to read 6, iclass 40, count 0 2006.229.11:22:14.08#ibcon#read 6, iclass 40, count 0 2006.229.11:22:14.08#ibcon#end of sib2, iclass 40, count 0 2006.229.11:22:14.08#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:22:14.08#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:22:14.08#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:22:14.08#ibcon#*before write, iclass 40, count 0 2006.229.11:22:14.08#ibcon#enter sib2, iclass 40, count 0 2006.229.11:22:14.08#ibcon#flushed, iclass 40, count 0 2006.229.11:22:14.08#ibcon#about to write, iclass 40, count 0 2006.229.11:22:14.08#ibcon#wrote, iclass 40, count 0 2006.229.11:22:14.08#ibcon#about to read 3, iclass 40, count 0 2006.229.11:22:14.12#ibcon#read 3, iclass 40, count 0 2006.229.11:22:14.12#ibcon#about to read 4, iclass 40, count 0 2006.229.11:22:14.12#ibcon#read 4, iclass 40, count 0 2006.229.11:22:14.12#ibcon#about to read 5, iclass 40, count 0 2006.229.11:22:14.12#ibcon#read 5, iclass 40, count 0 2006.229.11:22:14.12#ibcon#about to read 6, iclass 40, count 0 2006.229.11:22:14.12#ibcon#read 6, iclass 40, count 0 2006.229.11:22:14.12#ibcon#end of sib2, iclass 40, count 0 2006.229.11:22:14.12#ibcon#*after write, iclass 40, count 0 2006.229.11:22:14.12#ibcon#*before return 0, iclass 40, count 0 2006.229.11:22:14.12#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:14.12#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:22:14.12#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:22:14.12#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:22:14.12$vck44/vb=2,4 2006.229.11:22:14.12#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.11:22:14.12#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.11:22:14.12#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:14.12#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:14.18#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:14.18#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:14.18#ibcon#enter wrdev, iclass 4, count 2 2006.229.11:22:14.18#ibcon#first serial, iclass 4, count 2 2006.229.11:22:14.18#ibcon#enter sib2, iclass 4, count 2 2006.229.11:22:14.18#ibcon#flushed, iclass 4, count 2 2006.229.11:22:14.18#ibcon#about to write, iclass 4, count 2 2006.229.11:22:14.18#ibcon#wrote, iclass 4, count 2 2006.229.11:22:14.18#ibcon#about to read 3, iclass 4, count 2 2006.229.11:22:14.20#ibcon#read 3, iclass 4, count 2 2006.229.11:22:14.20#ibcon#about to read 4, iclass 4, count 2 2006.229.11:22:14.20#ibcon#read 4, iclass 4, count 2 2006.229.11:22:14.20#ibcon#about to read 5, iclass 4, count 2 2006.229.11:22:14.20#ibcon#read 5, iclass 4, count 2 2006.229.11:22:14.20#ibcon#about to read 6, iclass 4, count 2 2006.229.11:22:14.20#ibcon#read 6, iclass 4, count 2 2006.229.11:22:14.20#ibcon#end of sib2, iclass 4, count 2 2006.229.11:22:14.20#ibcon#*mode == 0, iclass 4, count 2 2006.229.11:22:14.20#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.11:22:14.20#ibcon#[27=AT02-04\r\n] 2006.229.11:22:14.20#ibcon#*before write, iclass 4, count 2 2006.229.11:22:14.20#ibcon#enter sib2, iclass 4, count 2 2006.229.11:22:14.20#ibcon#flushed, iclass 4, count 2 2006.229.11:22:14.20#ibcon#about to write, iclass 4, count 2 2006.229.11:22:14.20#ibcon#wrote, iclass 4, count 2 2006.229.11:22:14.20#ibcon#about to read 3, iclass 4, count 2 2006.229.11:22:14.23#ibcon#read 3, iclass 4, count 2 2006.229.11:22:14.23#ibcon#about to read 4, iclass 4, count 2 2006.229.11:22:14.23#ibcon#read 4, iclass 4, count 2 2006.229.11:22:14.23#ibcon#about to read 5, iclass 4, count 2 2006.229.11:22:14.23#ibcon#read 5, iclass 4, count 2 2006.229.11:22:14.23#ibcon#about to read 6, iclass 4, count 2 2006.229.11:22:14.23#ibcon#read 6, iclass 4, count 2 2006.229.11:22:14.23#ibcon#end of sib2, iclass 4, count 2 2006.229.11:22:14.23#ibcon#*after write, iclass 4, count 2 2006.229.11:22:14.23#ibcon#*before return 0, iclass 4, count 2 2006.229.11:22:14.23#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:14.23#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:22:14.23#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.11:22:14.23#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:14.23#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:14.35#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:14.35#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:14.35#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:22:14.35#ibcon#first serial, iclass 4, count 0 2006.229.11:22:14.35#ibcon#enter sib2, iclass 4, count 0 2006.229.11:22:14.35#ibcon#flushed, iclass 4, count 0 2006.229.11:22:14.35#ibcon#about to write, iclass 4, count 0 2006.229.11:22:14.35#ibcon#wrote, iclass 4, count 0 2006.229.11:22:14.35#ibcon#about to read 3, iclass 4, count 0 2006.229.11:22:14.37#ibcon#read 3, iclass 4, count 0 2006.229.11:22:14.37#ibcon#about to read 4, iclass 4, count 0 2006.229.11:22:14.37#ibcon#read 4, iclass 4, count 0 2006.229.11:22:14.37#ibcon#about to read 5, iclass 4, count 0 2006.229.11:22:14.37#ibcon#read 5, iclass 4, count 0 2006.229.11:22:14.37#ibcon#about to read 6, iclass 4, count 0 2006.229.11:22:14.37#ibcon#read 6, iclass 4, count 0 2006.229.11:22:14.37#ibcon#end of sib2, iclass 4, count 0 2006.229.11:22:14.37#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:22:14.37#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:22:14.37#ibcon#[27=USB\r\n] 2006.229.11:22:14.37#ibcon#*before write, iclass 4, count 0 2006.229.11:22:14.37#ibcon#enter sib2, iclass 4, count 0 2006.229.11:22:14.37#ibcon#flushed, iclass 4, count 0 2006.229.11:22:14.37#ibcon#about to write, iclass 4, count 0 2006.229.11:22:14.37#ibcon#wrote, iclass 4, count 0 2006.229.11:22:14.37#ibcon#about to read 3, iclass 4, count 0 2006.229.11:22:14.40#ibcon#read 3, iclass 4, count 0 2006.229.11:22:14.40#ibcon#about to read 4, iclass 4, count 0 2006.229.11:22:14.40#ibcon#read 4, iclass 4, count 0 2006.229.11:22:14.40#ibcon#about to read 5, iclass 4, count 0 2006.229.11:22:14.40#ibcon#read 5, iclass 4, count 0 2006.229.11:22:14.40#ibcon#about to read 6, iclass 4, count 0 2006.229.11:22:14.40#ibcon#read 6, iclass 4, count 0 2006.229.11:22:14.40#ibcon#end of sib2, iclass 4, count 0 2006.229.11:22:14.40#ibcon#*after write, iclass 4, count 0 2006.229.11:22:14.40#ibcon#*before return 0, iclass 4, count 0 2006.229.11:22:14.40#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:14.40#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:22:14.40#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:22:14.40#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:22:14.40$vck44/vblo=3,649.99 2006.229.11:22:14.40#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.11:22:14.40#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.11:22:14.40#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:14.40#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:14.40#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:14.40#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:14.40#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:22:14.40#ibcon#first serial, iclass 6, count 0 2006.229.11:22:14.40#ibcon#enter sib2, iclass 6, count 0 2006.229.11:22:14.40#ibcon#flushed, iclass 6, count 0 2006.229.11:22:14.40#ibcon#about to write, iclass 6, count 0 2006.229.11:22:14.40#ibcon#wrote, iclass 6, count 0 2006.229.11:22:14.40#ibcon#about to read 3, iclass 6, count 0 2006.229.11:22:14.42#ibcon#read 3, iclass 6, count 0 2006.229.11:22:14.42#ibcon#about to read 4, iclass 6, count 0 2006.229.11:22:14.42#ibcon#read 4, iclass 6, count 0 2006.229.11:22:14.42#ibcon#about to read 5, iclass 6, count 0 2006.229.11:22:14.42#ibcon#read 5, iclass 6, count 0 2006.229.11:22:14.42#ibcon#about to read 6, iclass 6, count 0 2006.229.11:22:14.42#ibcon#read 6, iclass 6, count 0 2006.229.11:22:14.42#ibcon#end of sib2, iclass 6, count 0 2006.229.11:22:14.42#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:22:14.42#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:22:14.42#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:22:14.42#ibcon#*before write, iclass 6, count 0 2006.229.11:22:14.42#ibcon#enter sib2, iclass 6, count 0 2006.229.11:22:14.42#ibcon#flushed, iclass 6, count 0 2006.229.11:22:14.42#ibcon#about to write, iclass 6, count 0 2006.229.11:22:14.42#ibcon#wrote, iclass 6, count 0 2006.229.11:22:14.42#ibcon#about to read 3, iclass 6, count 0 2006.229.11:22:14.46#ibcon#read 3, iclass 6, count 0 2006.229.11:22:14.46#ibcon#about to read 4, iclass 6, count 0 2006.229.11:22:14.46#ibcon#read 4, iclass 6, count 0 2006.229.11:22:14.46#ibcon#about to read 5, iclass 6, count 0 2006.229.11:22:14.46#ibcon#read 5, iclass 6, count 0 2006.229.11:22:14.46#ibcon#about to read 6, iclass 6, count 0 2006.229.11:22:14.46#ibcon#read 6, iclass 6, count 0 2006.229.11:22:14.46#ibcon#end of sib2, iclass 6, count 0 2006.229.11:22:14.46#ibcon#*after write, iclass 6, count 0 2006.229.11:22:14.46#ibcon#*before return 0, iclass 6, count 0 2006.229.11:22:14.46#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:14.46#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:22:14.46#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:22:14.46#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:22:14.46$vck44/vb=3,4 2006.229.11:22:14.46#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.11:22:14.46#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.11:22:14.46#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:14.46#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:14.52#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:14.52#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:14.52#ibcon#enter wrdev, iclass 10, count 2 2006.229.11:22:14.52#ibcon#first serial, iclass 10, count 2 2006.229.11:22:14.52#ibcon#enter sib2, iclass 10, count 2 2006.229.11:22:14.52#ibcon#flushed, iclass 10, count 2 2006.229.11:22:14.52#ibcon#about to write, iclass 10, count 2 2006.229.11:22:14.52#ibcon#wrote, iclass 10, count 2 2006.229.11:22:14.52#ibcon#about to read 3, iclass 10, count 2 2006.229.11:22:14.54#ibcon#read 3, iclass 10, count 2 2006.229.11:22:14.54#ibcon#about to read 4, iclass 10, count 2 2006.229.11:22:14.54#ibcon#read 4, iclass 10, count 2 2006.229.11:22:14.54#ibcon#about to read 5, iclass 10, count 2 2006.229.11:22:14.54#ibcon#read 5, iclass 10, count 2 2006.229.11:22:14.54#ibcon#about to read 6, iclass 10, count 2 2006.229.11:22:14.54#ibcon#read 6, iclass 10, count 2 2006.229.11:22:14.54#ibcon#end of sib2, iclass 10, count 2 2006.229.11:22:14.54#ibcon#*mode == 0, iclass 10, count 2 2006.229.11:22:14.54#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.11:22:14.54#ibcon#[27=AT03-04\r\n] 2006.229.11:22:14.54#ibcon#*before write, iclass 10, count 2 2006.229.11:22:14.54#ibcon#enter sib2, iclass 10, count 2 2006.229.11:22:14.54#ibcon#flushed, iclass 10, count 2 2006.229.11:22:14.54#ibcon#about to write, iclass 10, count 2 2006.229.11:22:14.54#ibcon#wrote, iclass 10, count 2 2006.229.11:22:14.54#ibcon#about to read 3, iclass 10, count 2 2006.229.11:22:14.57#ibcon#read 3, iclass 10, count 2 2006.229.11:22:14.57#ibcon#about to read 4, iclass 10, count 2 2006.229.11:22:14.57#ibcon#read 4, iclass 10, count 2 2006.229.11:22:14.57#ibcon#about to read 5, iclass 10, count 2 2006.229.11:22:14.57#ibcon#read 5, iclass 10, count 2 2006.229.11:22:14.57#ibcon#about to read 6, iclass 10, count 2 2006.229.11:22:14.57#ibcon#read 6, iclass 10, count 2 2006.229.11:22:14.57#ibcon#end of sib2, iclass 10, count 2 2006.229.11:22:14.57#ibcon#*after write, iclass 10, count 2 2006.229.11:22:14.57#ibcon#*before return 0, iclass 10, count 2 2006.229.11:22:14.57#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:14.57#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:22:14.57#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.11:22:14.57#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:14.57#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:14.69#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:14.69#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:14.69#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:22:14.69#ibcon#first serial, iclass 10, count 0 2006.229.11:22:14.69#ibcon#enter sib2, iclass 10, count 0 2006.229.11:22:14.69#ibcon#flushed, iclass 10, count 0 2006.229.11:22:14.69#ibcon#about to write, iclass 10, count 0 2006.229.11:22:14.69#ibcon#wrote, iclass 10, count 0 2006.229.11:22:14.69#ibcon#about to read 3, iclass 10, count 0 2006.229.11:22:14.71#ibcon#read 3, iclass 10, count 0 2006.229.11:22:14.71#ibcon#about to read 4, iclass 10, count 0 2006.229.11:22:14.71#ibcon#read 4, iclass 10, count 0 2006.229.11:22:14.71#ibcon#about to read 5, iclass 10, count 0 2006.229.11:22:14.71#ibcon#read 5, iclass 10, count 0 2006.229.11:22:14.71#ibcon#about to read 6, iclass 10, count 0 2006.229.11:22:14.71#ibcon#read 6, iclass 10, count 0 2006.229.11:22:14.71#ibcon#end of sib2, iclass 10, count 0 2006.229.11:22:14.71#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:22:14.71#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:22:14.71#ibcon#[27=USB\r\n] 2006.229.11:22:14.71#ibcon#*before write, iclass 10, count 0 2006.229.11:22:14.71#ibcon#enter sib2, iclass 10, count 0 2006.229.11:22:14.71#ibcon#flushed, iclass 10, count 0 2006.229.11:22:14.71#ibcon#about to write, iclass 10, count 0 2006.229.11:22:14.71#ibcon#wrote, iclass 10, count 0 2006.229.11:22:14.71#ibcon#about to read 3, iclass 10, count 0 2006.229.11:22:14.74#ibcon#read 3, iclass 10, count 0 2006.229.11:22:14.74#ibcon#about to read 4, iclass 10, count 0 2006.229.11:22:14.74#ibcon#read 4, iclass 10, count 0 2006.229.11:22:14.74#ibcon#about to read 5, iclass 10, count 0 2006.229.11:22:14.74#ibcon#read 5, iclass 10, count 0 2006.229.11:22:14.74#ibcon#about to read 6, iclass 10, count 0 2006.229.11:22:14.74#ibcon#read 6, iclass 10, count 0 2006.229.11:22:14.74#ibcon#end of sib2, iclass 10, count 0 2006.229.11:22:14.74#ibcon#*after write, iclass 10, count 0 2006.229.11:22:14.74#ibcon#*before return 0, iclass 10, count 0 2006.229.11:22:14.74#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:14.74#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:22:14.74#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:22:14.74#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:22:14.74$vck44/vblo=4,679.99 2006.229.11:22:14.74#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.11:22:14.74#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.11:22:14.74#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:14.74#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:14.74#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:14.74#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:14.74#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:22:14.74#ibcon#first serial, iclass 12, count 0 2006.229.11:22:14.74#ibcon#enter sib2, iclass 12, count 0 2006.229.11:22:14.74#ibcon#flushed, iclass 12, count 0 2006.229.11:22:14.74#ibcon#about to write, iclass 12, count 0 2006.229.11:22:14.74#ibcon#wrote, iclass 12, count 0 2006.229.11:22:14.74#ibcon#about to read 3, iclass 12, count 0 2006.229.11:22:14.76#ibcon#read 3, iclass 12, count 0 2006.229.11:22:14.76#ibcon#about to read 4, iclass 12, count 0 2006.229.11:22:14.76#ibcon#read 4, iclass 12, count 0 2006.229.11:22:14.76#ibcon#about to read 5, iclass 12, count 0 2006.229.11:22:14.76#ibcon#read 5, iclass 12, count 0 2006.229.11:22:14.76#ibcon#about to read 6, iclass 12, count 0 2006.229.11:22:14.76#ibcon#read 6, iclass 12, count 0 2006.229.11:22:14.76#ibcon#end of sib2, iclass 12, count 0 2006.229.11:22:14.76#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:22:14.76#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:22:14.76#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:22:14.76#ibcon#*before write, iclass 12, count 0 2006.229.11:22:14.76#ibcon#enter sib2, iclass 12, count 0 2006.229.11:22:14.76#ibcon#flushed, iclass 12, count 0 2006.229.11:22:14.76#ibcon#about to write, iclass 12, count 0 2006.229.11:22:14.76#ibcon#wrote, iclass 12, count 0 2006.229.11:22:14.76#ibcon#about to read 3, iclass 12, count 0 2006.229.11:22:14.80#ibcon#read 3, iclass 12, count 0 2006.229.11:22:14.80#ibcon#about to read 4, iclass 12, count 0 2006.229.11:22:14.80#ibcon#read 4, iclass 12, count 0 2006.229.11:22:14.80#ibcon#about to read 5, iclass 12, count 0 2006.229.11:22:14.80#ibcon#read 5, iclass 12, count 0 2006.229.11:22:14.80#ibcon#about to read 6, iclass 12, count 0 2006.229.11:22:14.80#ibcon#read 6, iclass 12, count 0 2006.229.11:22:14.80#ibcon#end of sib2, iclass 12, count 0 2006.229.11:22:14.80#ibcon#*after write, iclass 12, count 0 2006.229.11:22:14.80#ibcon#*before return 0, iclass 12, count 0 2006.229.11:22:14.80#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:14.80#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:22:14.80#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:22:14.80#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:22:14.80$vck44/vb=4,4 2006.229.11:22:14.80#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.11:22:14.80#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.11:22:14.80#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:14.80#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:14.86#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:14.86#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:14.86#ibcon#enter wrdev, iclass 14, count 2 2006.229.11:22:14.86#ibcon#first serial, iclass 14, count 2 2006.229.11:22:14.86#ibcon#enter sib2, iclass 14, count 2 2006.229.11:22:14.86#ibcon#flushed, iclass 14, count 2 2006.229.11:22:14.86#ibcon#about to write, iclass 14, count 2 2006.229.11:22:14.86#ibcon#wrote, iclass 14, count 2 2006.229.11:22:14.86#ibcon#about to read 3, iclass 14, count 2 2006.229.11:22:14.88#ibcon#read 3, iclass 14, count 2 2006.229.11:22:14.88#ibcon#about to read 4, iclass 14, count 2 2006.229.11:22:14.88#ibcon#read 4, iclass 14, count 2 2006.229.11:22:14.88#ibcon#about to read 5, iclass 14, count 2 2006.229.11:22:14.88#ibcon#read 5, iclass 14, count 2 2006.229.11:22:14.88#ibcon#about to read 6, iclass 14, count 2 2006.229.11:22:14.88#ibcon#read 6, iclass 14, count 2 2006.229.11:22:14.88#ibcon#end of sib2, iclass 14, count 2 2006.229.11:22:14.88#ibcon#*mode == 0, iclass 14, count 2 2006.229.11:22:14.88#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.11:22:14.88#ibcon#[27=AT04-04\r\n] 2006.229.11:22:14.88#ibcon#*before write, iclass 14, count 2 2006.229.11:22:14.88#ibcon#enter sib2, iclass 14, count 2 2006.229.11:22:14.88#ibcon#flushed, iclass 14, count 2 2006.229.11:22:14.88#ibcon#about to write, iclass 14, count 2 2006.229.11:22:14.88#ibcon#wrote, iclass 14, count 2 2006.229.11:22:14.88#ibcon#about to read 3, iclass 14, count 2 2006.229.11:22:14.91#ibcon#read 3, iclass 14, count 2 2006.229.11:22:14.91#ibcon#about to read 4, iclass 14, count 2 2006.229.11:22:14.91#ibcon#read 4, iclass 14, count 2 2006.229.11:22:14.91#ibcon#about to read 5, iclass 14, count 2 2006.229.11:22:14.91#ibcon#read 5, iclass 14, count 2 2006.229.11:22:14.91#ibcon#about to read 6, iclass 14, count 2 2006.229.11:22:14.91#ibcon#read 6, iclass 14, count 2 2006.229.11:22:14.91#ibcon#end of sib2, iclass 14, count 2 2006.229.11:22:14.91#ibcon#*after write, iclass 14, count 2 2006.229.11:22:14.91#ibcon#*before return 0, iclass 14, count 2 2006.229.11:22:14.91#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:14.91#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:22:14.91#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.11:22:14.91#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:14.91#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:15.03#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:15.03#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:15.03#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:22:15.03#ibcon#first serial, iclass 14, count 0 2006.229.11:22:15.03#ibcon#enter sib2, iclass 14, count 0 2006.229.11:22:15.03#ibcon#flushed, iclass 14, count 0 2006.229.11:22:15.03#ibcon#about to write, iclass 14, count 0 2006.229.11:22:15.03#ibcon#wrote, iclass 14, count 0 2006.229.11:22:15.03#ibcon#about to read 3, iclass 14, count 0 2006.229.11:22:15.05#ibcon#read 3, iclass 14, count 0 2006.229.11:22:15.05#ibcon#about to read 4, iclass 14, count 0 2006.229.11:22:15.05#ibcon#read 4, iclass 14, count 0 2006.229.11:22:15.05#ibcon#about to read 5, iclass 14, count 0 2006.229.11:22:15.05#ibcon#read 5, iclass 14, count 0 2006.229.11:22:15.05#ibcon#about to read 6, iclass 14, count 0 2006.229.11:22:15.05#ibcon#read 6, iclass 14, count 0 2006.229.11:22:15.05#ibcon#end of sib2, iclass 14, count 0 2006.229.11:22:15.05#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:22:15.05#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:22:15.05#ibcon#[27=USB\r\n] 2006.229.11:22:15.05#ibcon#*before write, iclass 14, count 0 2006.229.11:22:15.05#ibcon#enter sib2, iclass 14, count 0 2006.229.11:22:15.05#ibcon#flushed, iclass 14, count 0 2006.229.11:22:15.05#ibcon#about to write, iclass 14, count 0 2006.229.11:22:15.05#ibcon#wrote, iclass 14, count 0 2006.229.11:22:15.05#ibcon#about to read 3, iclass 14, count 0 2006.229.11:22:15.08#ibcon#read 3, iclass 14, count 0 2006.229.11:22:15.08#ibcon#about to read 4, iclass 14, count 0 2006.229.11:22:15.08#ibcon#read 4, iclass 14, count 0 2006.229.11:22:15.08#ibcon#about to read 5, iclass 14, count 0 2006.229.11:22:15.08#ibcon#read 5, iclass 14, count 0 2006.229.11:22:15.08#ibcon#about to read 6, iclass 14, count 0 2006.229.11:22:15.08#ibcon#read 6, iclass 14, count 0 2006.229.11:22:15.08#ibcon#end of sib2, iclass 14, count 0 2006.229.11:22:15.08#ibcon#*after write, iclass 14, count 0 2006.229.11:22:15.08#ibcon#*before return 0, iclass 14, count 0 2006.229.11:22:15.08#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:15.08#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:22:15.08#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:22:15.08#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:22:15.08$vck44/vblo=5,709.99 2006.229.11:22:15.08#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.11:22:15.08#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.11:22:15.08#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:15.08#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:15.08#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:15.08#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:15.08#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:22:15.08#ibcon#first serial, iclass 16, count 0 2006.229.11:22:15.08#ibcon#enter sib2, iclass 16, count 0 2006.229.11:22:15.08#ibcon#flushed, iclass 16, count 0 2006.229.11:22:15.08#ibcon#about to write, iclass 16, count 0 2006.229.11:22:15.08#ibcon#wrote, iclass 16, count 0 2006.229.11:22:15.08#ibcon#about to read 3, iclass 16, count 0 2006.229.11:22:15.10#ibcon#read 3, iclass 16, count 0 2006.229.11:22:15.10#ibcon#about to read 4, iclass 16, count 0 2006.229.11:22:15.10#ibcon#read 4, iclass 16, count 0 2006.229.11:22:15.10#ibcon#about to read 5, iclass 16, count 0 2006.229.11:22:15.10#ibcon#read 5, iclass 16, count 0 2006.229.11:22:15.10#ibcon#about to read 6, iclass 16, count 0 2006.229.11:22:15.10#ibcon#read 6, iclass 16, count 0 2006.229.11:22:15.10#ibcon#end of sib2, iclass 16, count 0 2006.229.11:22:15.10#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:22:15.10#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:22:15.10#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:22:15.10#ibcon#*before write, iclass 16, count 0 2006.229.11:22:15.10#ibcon#enter sib2, iclass 16, count 0 2006.229.11:22:15.10#ibcon#flushed, iclass 16, count 0 2006.229.11:22:15.10#ibcon#about to write, iclass 16, count 0 2006.229.11:22:15.10#ibcon#wrote, iclass 16, count 0 2006.229.11:22:15.10#ibcon#about to read 3, iclass 16, count 0 2006.229.11:22:15.14#ibcon#read 3, iclass 16, count 0 2006.229.11:22:15.14#ibcon#about to read 4, iclass 16, count 0 2006.229.11:22:15.14#ibcon#read 4, iclass 16, count 0 2006.229.11:22:15.14#ibcon#about to read 5, iclass 16, count 0 2006.229.11:22:15.14#ibcon#read 5, iclass 16, count 0 2006.229.11:22:15.14#ibcon#about to read 6, iclass 16, count 0 2006.229.11:22:15.14#ibcon#read 6, iclass 16, count 0 2006.229.11:22:15.14#ibcon#end of sib2, iclass 16, count 0 2006.229.11:22:15.14#ibcon#*after write, iclass 16, count 0 2006.229.11:22:15.14#ibcon#*before return 0, iclass 16, count 0 2006.229.11:22:15.14#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:15.14#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:22:15.14#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:22:15.14#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:22:15.14$vck44/vb=5,4 2006.229.11:22:15.14#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.11:22:15.14#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.11:22:15.14#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:15.14#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:15.20#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:15.20#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:15.20#ibcon#enter wrdev, iclass 18, count 2 2006.229.11:22:15.20#ibcon#first serial, iclass 18, count 2 2006.229.11:22:15.20#ibcon#enter sib2, iclass 18, count 2 2006.229.11:22:15.20#ibcon#flushed, iclass 18, count 2 2006.229.11:22:15.20#ibcon#about to write, iclass 18, count 2 2006.229.11:22:15.20#ibcon#wrote, iclass 18, count 2 2006.229.11:22:15.20#ibcon#about to read 3, iclass 18, count 2 2006.229.11:22:15.22#ibcon#read 3, iclass 18, count 2 2006.229.11:22:15.22#ibcon#about to read 4, iclass 18, count 2 2006.229.11:22:15.22#ibcon#read 4, iclass 18, count 2 2006.229.11:22:15.22#ibcon#about to read 5, iclass 18, count 2 2006.229.11:22:15.22#ibcon#read 5, iclass 18, count 2 2006.229.11:22:15.22#ibcon#about to read 6, iclass 18, count 2 2006.229.11:22:15.22#ibcon#read 6, iclass 18, count 2 2006.229.11:22:15.22#ibcon#end of sib2, iclass 18, count 2 2006.229.11:22:15.22#ibcon#*mode == 0, iclass 18, count 2 2006.229.11:22:15.22#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.11:22:15.22#ibcon#[27=AT05-04\r\n] 2006.229.11:22:15.22#ibcon#*before write, iclass 18, count 2 2006.229.11:22:15.22#ibcon#enter sib2, iclass 18, count 2 2006.229.11:22:15.22#ibcon#flushed, iclass 18, count 2 2006.229.11:22:15.22#ibcon#about to write, iclass 18, count 2 2006.229.11:22:15.22#ibcon#wrote, iclass 18, count 2 2006.229.11:22:15.22#ibcon#about to read 3, iclass 18, count 2 2006.229.11:22:15.25#ibcon#read 3, iclass 18, count 2 2006.229.11:22:15.25#ibcon#about to read 4, iclass 18, count 2 2006.229.11:22:15.25#ibcon#read 4, iclass 18, count 2 2006.229.11:22:15.25#ibcon#about to read 5, iclass 18, count 2 2006.229.11:22:15.25#ibcon#read 5, iclass 18, count 2 2006.229.11:22:15.25#ibcon#about to read 6, iclass 18, count 2 2006.229.11:22:15.25#ibcon#read 6, iclass 18, count 2 2006.229.11:22:15.25#ibcon#end of sib2, iclass 18, count 2 2006.229.11:22:15.25#ibcon#*after write, iclass 18, count 2 2006.229.11:22:15.25#ibcon#*before return 0, iclass 18, count 2 2006.229.11:22:15.25#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:15.25#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:22:15.25#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.11:22:15.25#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:15.25#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:15.37#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:15.37#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:15.37#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:22:15.37#ibcon#first serial, iclass 18, count 0 2006.229.11:22:15.37#ibcon#enter sib2, iclass 18, count 0 2006.229.11:22:15.37#ibcon#flushed, iclass 18, count 0 2006.229.11:22:15.37#ibcon#about to write, iclass 18, count 0 2006.229.11:22:15.37#ibcon#wrote, iclass 18, count 0 2006.229.11:22:15.37#ibcon#about to read 3, iclass 18, count 0 2006.229.11:22:15.39#ibcon#read 3, iclass 18, count 0 2006.229.11:22:15.39#ibcon#about to read 4, iclass 18, count 0 2006.229.11:22:15.39#ibcon#read 4, iclass 18, count 0 2006.229.11:22:15.39#ibcon#about to read 5, iclass 18, count 0 2006.229.11:22:15.39#ibcon#read 5, iclass 18, count 0 2006.229.11:22:15.39#ibcon#about to read 6, iclass 18, count 0 2006.229.11:22:15.39#ibcon#read 6, iclass 18, count 0 2006.229.11:22:15.39#ibcon#end of sib2, iclass 18, count 0 2006.229.11:22:15.39#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:22:15.39#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:22:15.39#ibcon#[27=USB\r\n] 2006.229.11:22:15.39#ibcon#*before write, iclass 18, count 0 2006.229.11:22:15.39#ibcon#enter sib2, iclass 18, count 0 2006.229.11:22:15.39#ibcon#flushed, iclass 18, count 0 2006.229.11:22:15.39#ibcon#about to write, iclass 18, count 0 2006.229.11:22:15.39#ibcon#wrote, iclass 18, count 0 2006.229.11:22:15.39#ibcon#about to read 3, iclass 18, count 0 2006.229.11:22:15.42#ibcon#read 3, iclass 18, count 0 2006.229.11:22:15.42#ibcon#about to read 4, iclass 18, count 0 2006.229.11:22:15.42#ibcon#read 4, iclass 18, count 0 2006.229.11:22:15.42#ibcon#about to read 5, iclass 18, count 0 2006.229.11:22:15.42#ibcon#read 5, iclass 18, count 0 2006.229.11:22:15.42#ibcon#about to read 6, iclass 18, count 0 2006.229.11:22:15.42#ibcon#read 6, iclass 18, count 0 2006.229.11:22:15.42#ibcon#end of sib2, iclass 18, count 0 2006.229.11:22:15.42#ibcon#*after write, iclass 18, count 0 2006.229.11:22:15.42#ibcon#*before return 0, iclass 18, count 0 2006.229.11:22:15.42#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:15.42#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:22:15.42#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:22:15.42#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:22:15.42$vck44/vblo=6,719.99 2006.229.11:22:15.42#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.11:22:15.42#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.11:22:15.42#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:15.42#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:15.42#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:15.42#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:15.42#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:22:15.42#ibcon#first serial, iclass 20, count 0 2006.229.11:22:15.42#ibcon#enter sib2, iclass 20, count 0 2006.229.11:22:15.42#ibcon#flushed, iclass 20, count 0 2006.229.11:22:15.42#ibcon#about to write, iclass 20, count 0 2006.229.11:22:15.42#ibcon#wrote, iclass 20, count 0 2006.229.11:22:15.42#ibcon#about to read 3, iclass 20, count 0 2006.229.11:22:15.44#ibcon#read 3, iclass 20, count 0 2006.229.11:22:15.44#ibcon#about to read 4, iclass 20, count 0 2006.229.11:22:15.44#ibcon#read 4, iclass 20, count 0 2006.229.11:22:15.44#ibcon#about to read 5, iclass 20, count 0 2006.229.11:22:15.44#ibcon#read 5, iclass 20, count 0 2006.229.11:22:15.44#ibcon#about to read 6, iclass 20, count 0 2006.229.11:22:15.44#ibcon#read 6, iclass 20, count 0 2006.229.11:22:15.44#ibcon#end of sib2, iclass 20, count 0 2006.229.11:22:15.44#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:22:15.44#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:22:15.44#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:22:15.44#ibcon#*before write, iclass 20, count 0 2006.229.11:22:15.44#ibcon#enter sib2, iclass 20, count 0 2006.229.11:22:15.44#ibcon#flushed, iclass 20, count 0 2006.229.11:22:15.44#ibcon#about to write, iclass 20, count 0 2006.229.11:22:15.44#ibcon#wrote, iclass 20, count 0 2006.229.11:22:15.44#ibcon#about to read 3, iclass 20, count 0 2006.229.11:22:15.48#ibcon#read 3, iclass 20, count 0 2006.229.11:22:15.48#ibcon#about to read 4, iclass 20, count 0 2006.229.11:22:15.48#ibcon#read 4, iclass 20, count 0 2006.229.11:22:15.48#ibcon#about to read 5, iclass 20, count 0 2006.229.11:22:15.48#ibcon#read 5, iclass 20, count 0 2006.229.11:22:15.48#ibcon#about to read 6, iclass 20, count 0 2006.229.11:22:15.48#ibcon#read 6, iclass 20, count 0 2006.229.11:22:15.48#ibcon#end of sib2, iclass 20, count 0 2006.229.11:22:15.48#ibcon#*after write, iclass 20, count 0 2006.229.11:22:15.48#ibcon#*before return 0, iclass 20, count 0 2006.229.11:22:15.48#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:15.48#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:22:15.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:22:15.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:22:15.48$vck44/vb=6,4 2006.229.11:22:15.48#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.11:22:15.48#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.11:22:15.48#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:15.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:15.54#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:15.54#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:15.54#ibcon#enter wrdev, iclass 22, count 2 2006.229.11:22:15.54#ibcon#first serial, iclass 22, count 2 2006.229.11:22:15.54#ibcon#enter sib2, iclass 22, count 2 2006.229.11:22:15.54#ibcon#flushed, iclass 22, count 2 2006.229.11:22:15.54#ibcon#about to write, iclass 22, count 2 2006.229.11:22:15.54#ibcon#wrote, iclass 22, count 2 2006.229.11:22:15.54#ibcon#about to read 3, iclass 22, count 2 2006.229.11:22:15.56#ibcon#read 3, iclass 22, count 2 2006.229.11:22:15.56#ibcon#about to read 4, iclass 22, count 2 2006.229.11:22:15.56#ibcon#read 4, iclass 22, count 2 2006.229.11:22:15.56#ibcon#about to read 5, iclass 22, count 2 2006.229.11:22:15.56#ibcon#read 5, iclass 22, count 2 2006.229.11:22:15.56#ibcon#about to read 6, iclass 22, count 2 2006.229.11:22:15.56#ibcon#read 6, iclass 22, count 2 2006.229.11:22:15.56#ibcon#end of sib2, iclass 22, count 2 2006.229.11:22:15.56#ibcon#*mode == 0, iclass 22, count 2 2006.229.11:22:15.56#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.11:22:15.56#ibcon#[27=AT06-04\r\n] 2006.229.11:22:15.56#ibcon#*before write, iclass 22, count 2 2006.229.11:22:15.56#ibcon#enter sib2, iclass 22, count 2 2006.229.11:22:15.56#ibcon#flushed, iclass 22, count 2 2006.229.11:22:15.56#ibcon#about to write, iclass 22, count 2 2006.229.11:22:15.56#ibcon#wrote, iclass 22, count 2 2006.229.11:22:15.56#ibcon#about to read 3, iclass 22, count 2 2006.229.11:22:15.59#ibcon#read 3, iclass 22, count 2 2006.229.11:22:15.59#ibcon#about to read 4, iclass 22, count 2 2006.229.11:22:15.59#ibcon#read 4, iclass 22, count 2 2006.229.11:22:15.59#ibcon#about to read 5, iclass 22, count 2 2006.229.11:22:15.59#ibcon#read 5, iclass 22, count 2 2006.229.11:22:15.59#ibcon#about to read 6, iclass 22, count 2 2006.229.11:22:15.59#ibcon#read 6, iclass 22, count 2 2006.229.11:22:15.59#ibcon#end of sib2, iclass 22, count 2 2006.229.11:22:15.59#ibcon#*after write, iclass 22, count 2 2006.229.11:22:15.59#ibcon#*before return 0, iclass 22, count 2 2006.229.11:22:15.59#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:15.59#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:22:15.59#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.11:22:15.59#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:15.59#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:15.71#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:15.71#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:15.71#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:22:15.71#ibcon#first serial, iclass 22, count 0 2006.229.11:22:15.71#ibcon#enter sib2, iclass 22, count 0 2006.229.11:22:15.71#ibcon#flushed, iclass 22, count 0 2006.229.11:22:15.71#ibcon#about to write, iclass 22, count 0 2006.229.11:22:15.71#ibcon#wrote, iclass 22, count 0 2006.229.11:22:15.71#ibcon#about to read 3, iclass 22, count 0 2006.229.11:22:15.73#ibcon#read 3, iclass 22, count 0 2006.229.11:22:15.73#ibcon#about to read 4, iclass 22, count 0 2006.229.11:22:15.73#ibcon#read 4, iclass 22, count 0 2006.229.11:22:15.73#ibcon#about to read 5, iclass 22, count 0 2006.229.11:22:15.73#ibcon#read 5, iclass 22, count 0 2006.229.11:22:15.73#ibcon#about to read 6, iclass 22, count 0 2006.229.11:22:15.73#ibcon#read 6, iclass 22, count 0 2006.229.11:22:15.73#ibcon#end of sib2, iclass 22, count 0 2006.229.11:22:15.73#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:22:15.73#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:22:15.73#ibcon#[27=USB\r\n] 2006.229.11:22:15.73#ibcon#*before write, iclass 22, count 0 2006.229.11:22:15.73#ibcon#enter sib2, iclass 22, count 0 2006.229.11:22:15.73#ibcon#flushed, iclass 22, count 0 2006.229.11:22:15.73#ibcon#about to write, iclass 22, count 0 2006.229.11:22:15.73#ibcon#wrote, iclass 22, count 0 2006.229.11:22:15.73#ibcon#about to read 3, iclass 22, count 0 2006.229.11:22:15.76#ibcon#read 3, iclass 22, count 0 2006.229.11:22:15.76#ibcon#about to read 4, iclass 22, count 0 2006.229.11:22:15.76#ibcon#read 4, iclass 22, count 0 2006.229.11:22:15.76#ibcon#about to read 5, iclass 22, count 0 2006.229.11:22:15.76#ibcon#read 5, iclass 22, count 0 2006.229.11:22:15.76#ibcon#about to read 6, iclass 22, count 0 2006.229.11:22:15.76#ibcon#read 6, iclass 22, count 0 2006.229.11:22:15.76#ibcon#end of sib2, iclass 22, count 0 2006.229.11:22:15.76#ibcon#*after write, iclass 22, count 0 2006.229.11:22:15.76#ibcon#*before return 0, iclass 22, count 0 2006.229.11:22:15.76#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:15.76#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:22:15.76#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:22:15.76#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:22:15.76$vck44/vblo=7,734.99 2006.229.11:22:15.76#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.11:22:15.76#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.11:22:15.76#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:15.76#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:15.76#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:15.76#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:15.76#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:22:15.76#ibcon#first serial, iclass 24, count 0 2006.229.11:22:15.76#ibcon#enter sib2, iclass 24, count 0 2006.229.11:22:15.76#ibcon#flushed, iclass 24, count 0 2006.229.11:22:15.76#ibcon#about to write, iclass 24, count 0 2006.229.11:22:15.76#ibcon#wrote, iclass 24, count 0 2006.229.11:22:15.76#ibcon#about to read 3, iclass 24, count 0 2006.229.11:22:15.78#ibcon#read 3, iclass 24, count 0 2006.229.11:22:15.78#ibcon#about to read 4, iclass 24, count 0 2006.229.11:22:15.78#ibcon#read 4, iclass 24, count 0 2006.229.11:22:15.78#ibcon#about to read 5, iclass 24, count 0 2006.229.11:22:15.78#ibcon#read 5, iclass 24, count 0 2006.229.11:22:15.78#ibcon#about to read 6, iclass 24, count 0 2006.229.11:22:15.78#ibcon#read 6, iclass 24, count 0 2006.229.11:22:15.78#ibcon#end of sib2, iclass 24, count 0 2006.229.11:22:15.78#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:22:15.78#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:22:15.78#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:22:15.78#ibcon#*before write, iclass 24, count 0 2006.229.11:22:15.78#ibcon#enter sib2, iclass 24, count 0 2006.229.11:22:15.78#ibcon#flushed, iclass 24, count 0 2006.229.11:22:15.78#ibcon#about to write, iclass 24, count 0 2006.229.11:22:15.78#ibcon#wrote, iclass 24, count 0 2006.229.11:22:15.78#ibcon#about to read 3, iclass 24, count 0 2006.229.11:22:15.82#ibcon#read 3, iclass 24, count 0 2006.229.11:22:15.82#ibcon#about to read 4, iclass 24, count 0 2006.229.11:22:15.82#ibcon#read 4, iclass 24, count 0 2006.229.11:22:15.82#ibcon#about to read 5, iclass 24, count 0 2006.229.11:22:15.82#ibcon#read 5, iclass 24, count 0 2006.229.11:22:15.82#ibcon#about to read 6, iclass 24, count 0 2006.229.11:22:15.82#ibcon#read 6, iclass 24, count 0 2006.229.11:22:15.82#ibcon#end of sib2, iclass 24, count 0 2006.229.11:22:15.82#ibcon#*after write, iclass 24, count 0 2006.229.11:22:15.82#ibcon#*before return 0, iclass 24, count 0 2006.229.11:22:15.82#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:15.82#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:22:15.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:22:15.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:22:15.82$vck44/vb=7,4 2006.229.11:22:15.82#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.11:22:15.82#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.11:22:15.82#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:15.82#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:15.88#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:15.88#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:15.88#ibcon#enter wrdev, iclass 26, count 2 2006.229.11:22:15.88#ibcon#first serial, iclass 26, count 2 2006.229.11:22:15.88#ibcon#enter sib2, iclass 26, count 2 2006.229.11:22:15.88#ibcon#flushed, iclass 26, count 2 2006.229.11:22:15.88#ibcon#about to write, iclass 26, count 2 2006.229.11:22:15.88#ibcon#wrote, iclass 26, count 2 2006.229.11:22:15.88#ibcon#about to read 3, iclass 26, count 2 2006.229.11:22:15.90#ibcon#read 3, iclass 26, count 2 2006.229.11:22:15.90#ibcon#about to read 4, iclass 26, count 2 2006.229.11:22:15.90#ibcon#read 4, iclass 26, count 2 2006.229.11:22:15.90#ibcon#about to read 5, iclass 26, count 2 2006.229.11:22:15.90#ibcon#read 5, iclass 26, count 2 2006.229.11:22:15.90#ibcon#about to read 6, iclass 26, count 2 2006.229.11:22:15.90#ibcon#read 6, iclass 26, count 2 2006.229.11:22:15.90#ibcon#end of sib2, iclass 26, count 2 2006.229.11:22:15.90#ibcon#*mode == 0, iclass 26, count 2 2006.229.11:22:15.90#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.11:22:15.90#ibcon#[27=AT07-04\r\n] 2006.229.11:22:15.90#ibcon#*before write, iclass 26, count 2 2006.229.11:22:15.90#ibcon#enter sib2, iclass 26, count 2 2006.229.11:22:15.90#ibcon#flushed, iclass 26, count 2 2006.229.11:22:15.90#ibcon#about to write, iclass 26, count 2 2006.229.11:22:15.90#ibcon#wrote, iclass 26, count 2 2006.229.11:22:15.90#ibcon#about to read 3, iclass 26, count 2 2006.229.11:22:15.93#ibcon#read 3, iclass 26, count 2 2006.229.11:22:15.93#ibcon#about to read 4, iclass 26, count 2 2006.229.11:22:15.93#ibcon#read 4, iclass 26, count 2 2006.229.11:22:15.93#ibcon#about to read 5, iclass 26, count 2 2006.229.11:22:15.93#ibcon#read 5, iclass 26, count 2 2006.229.11:22:15.93#ibcon#about to read 6, iclass 26, count 2 2006.229.11:22:15.93#ibcon#read 6, iclass 26, count 2 2006.229.11:22:15.93#ibcon#end of sib2, iclass 26, count 2 2006.229.11:22:15.93#ibcon#*after write, iclass 26, count 2 2006.229.11:22:15.93#ibcon#*before return 0, iclass 26, count 2 2006.229.11:22:15.93#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:15.93#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:22:15.93#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.11:22:15.93#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:15.93#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:16.05#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:16.05#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:16.05#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:22:16.05#ibcon#first serial, iclass 26, count 0 2006.229.11:22:16.05#ibcon#enter sib2, iclass 26, count 0 2006.229.11:22:16.05#ibcon#flushed, iclass 26, count 0 2006.229.11:22:16.05#ibcon#about to write, iclass 26, count 0 2006.229.11:22:16.05#ibcon#wrote, iclass 26, count 0 2006.229.11:22:16.05#ibcon#about to read 3, iclass 26, count 0 2006.229.11:22:16.07#ibcon#read 3, iclass 26, count 0 2006.229.11:22:16.07#ibcon#about to read 4, iclass 26, count 0 2006.229.11:22:16.07#ibcon#read 4, iclass 26, count 0 2006.229.11:22:16.07#ibcon#about to read 5, iclass 26, count 0 2006.229.11:22:16.07#ibcon#read 5, iclass 26, count 0 2006.229.11:22:16.07#ibcon#about to read 6, iclass 26, count 0 2006.229.11:22:16.07#ibcon#read 6, iclass 26, count 0 2006.229.11:22:16.07#ibcon#end of sib2, iclass 26, count 0 2006.229.11:22:16.07#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:22:16.07#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:22:16.07#ibcon#[27=USB\r\n] 2006.229.11:22:16.07#ibcon#*before write, iclass 26, count 0 2006.229.11:22:16.07#ibcon#enter sib2, iclass 26, count 0 2006.229.11:22:16.07#ibcon#flushed, iclass 26, count 0 2006.229.11:22:16.07#ibcon#about to write, iclass 26, count 0 2006.229.11:22:16.07#ibcon#wrote, iclass 26, count 0 2006.229.11:22:16.07#ibcon#about to read 3, iclass 26, count 0 2006.229.11:22:16.10#ibcon#read 3, iclass 26, count 0 2006.229.11:22:16.10#ibcon#about to read 4, iclass 26, count 0 2006.229.11:22:16.10#ibcon#read 4, iclass 26, count 0 2006.229.11:22:16.10#ibcon#about to read 5, iclass 26, count 0 2006.229.11:22:16.10#ibcon#read 5, iclass 26, count 0 2006.229.11:22:16.10#ibcon#about to read 6, iclass 26, count 0 2006.229.11:22:16.10#ibcon#read 6, iclass 26, count 0 2006.229.11:22:16.10#ibcon#end of sib2, iclass 26, count 0 2006.229.11:22:16.10#ibcon#*after write, iclass 26, count 0 2006.229.11:22:16.10#ibcon#*before return 0, iclass 26, count 0 2006.229.11:22:16.10#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:16.10#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:22:16.10#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:22:16.10#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:22:16.10$vck44/vblo=8,744.99 2006.229.11:22:16.10#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.11:22:16.10#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.11:22:16.10#ibcon#ireg 17 cls_cnt 0 2006.229.11:22:16.10#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:16.10#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:16.10#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:16.10#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:22:16.10#ibcon#first serial, iclass 28, count 0 2006.229.11:22:16.10#ibcon#enter sib2, iclass 28, count 0 2006.229.11:22:16.10#ibcon#flushed, iclass 28, count 0 2006.229.11:22:16.10#ibcon#about to write, iclass 28, count 0 2006.229.11:22:16.10#ibcon#wrote, iclass 28, count 0 2006.229.11:22:16.10#ibcon#about to read 3, iclass 28, count 0 2006.229.11:22:16.12#ibcon#read 3, iclass 28, count 0 2006.229.11:22:16.12#ibcon#about to read 4, iclass 28, count 0 2006.229.11:22:16.12#ibcon#read 4, iclass 28, count 0 2006.229.11:22:16.12#ibcon#about to read 5, iclass 28, count 0 2006.229.11:22:16.12#ibcon#read 5, iclass 28, count 0 2006.229.11:22:16.12#ibcon#about to read 6, iclass 28, count 0 2006.229.11:22:16.12#ibcon#read 6, iclass 28, count 0 2006.229.11:22:16.12#ibcon#end of sib2, iclass 28, count 0 2006.229.11:22:16.12#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:22:16.12#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:22:16.12#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:22:16.12#ibcon#*before write, iclass 28, count 0 2006.229.11:22:16.12#ibcon#enter sib2, iclass 28, count 0 2006.229.11:22:16.12#ibcon#flushed, iclass 28, count 0 2006.229.11:22:16.12#ibcon#about to write, iclass 28, count 0 2006.229.11:22:16.12#ibcon#wrote, iclass 28, count 0 2006.229.11:22:16.12#ibcon#about to read 3, iclass 28, count 0 2006.229.11:22:16.16#ibcon#read 3, iclass 28, count 0 2006.229.11:22:16.16#ibcon#about to read 4, iclass 28, count 0 2006.229.11:22:16.16#ibcon#read 4, iclass 28, count 0 2006.229.11:22:16.16#ibcon#about to read 5, iclass 28, count 0 2006.229.11:22:16.16#ibcon#read 5, iclass 28, count 0 2006.229.11:22:16.16#ibcon#about to read 6, iclass 28, count 0 2006.229.11:22:16.16#ibcon#read 6, iclass 28, count 0 2006.229.11:22:16.16#ibcon#end of sib2, iclass 28, count 0 2006.229.11:22:16.16#ibcon#*after write, iclass 28, count 0 2006.229.11:22:16.16#ibcon#*before return 0, iclass 28, count 0 2006.229.11:22:16.16#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:16.16#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:22:16.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:22:16.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:22:16.16$vck44/vb=8,4 2006.229.11:22:16.16#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.11:22:16.16#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.11:22:16.16#ibcon#ireg 11 cls_cnt 2 2006.229.11:22:16.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:16.22#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:16.22#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:16.22#ibcon#enter wrdev, iclass 30, count 2 2006.229.11:22:16.22#ibcon#first serial, iclass 30, count 2 2006.229.11:22:16.22#ibcon#enter sib2, iclass 30, count 2 2006.229.11:22:16.22#ibcon#flushed, iclass 30, count 2 2006.229.11:22:16.22#ibcon#about to write, iclass 30, count 2 2006.229.11:22:16.22#ibcon#wrote, iclass 30, count 2 2006.229.11:22:16.22#ibcon#about to read 3, iclass 30, count 2 2006.229.11:22:16.24#ibcon#read 3, iclass 30, count 2 2006.229.11:22:16.24#ibcon#about to read 4, iclass 30, count 2 2006.229.11:22:16.24#ibcon#read 4, iclass 30, count 2 2006.229.11:22:16.24#ibcon#about to read 5, iclass 30, count 2 2006.229.11:22:16.24#ibcon#read 5, iclass 30, count 2 2006.229.11:22:16.24#ibcon#about to read 6, iclass 30, count 2 2006.229.11:22:16.24#ibcon#read 6, iclass 30, count 2 2006.229.11:22:16.24#ibcon#end of sib2, iclass 30, count 2 2006.229.11:22:16.24#ibcon#*mode == 0, iclass 30, count 2 2006.229.11:22:16.24#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.11:22:16.24#ibcon#[27=AT08-04\r\n] 2006.229.11:22:16.24#ibcon#*before write, iclass 30, count 2 2006.229.11:22:16.24#ibcon#enter sib2, iclass 30, count 2 2006.229.11:22:16.24#ibcon#flushed, iclass 30, count 2 2006.229.11:22:16.24#ibcon#about to write, iclass 30, count 2 2006.229.11:22:16.24#ibcon#wrote, iclass 30, count 2 2006.229.11:22:16.24#ibcon#about to read 3, iclass 30, count 2 2006.229.11:22:16.27#ibcon#read 3, iclass 30, count 2 2006.229.11:22:16.27#ibcon#about to read 4, iclass 30, count 2 2006.229.11:22:16.27#ibcon#read 4, iclass 30, count 2 2006.229.11:22:16.27#ibcon#about to read 5, iclass 30, count 2 2006.229.11:22:16.27#ibcon#read 5, iclass 30, count 2 2006.229.11:22:16.27#ibcon#about to read 6, iclass 30, count 2 2006.229.11:22:16.27#ibcon#read 6, iclass 30, count 2 2006.229.11:22:16.27#ibcon#end of sib2, iclass 30, count 2 2006.229.11:22:16.27#ibcon#*after write, iclass 30, count 2 2006.229.11:22:16.27#ibcon#*before return 0, iclass 30, count 2 2006.229.11:22:16.27#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:16.27#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:22:16.27#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.11:22:16.27#ibcon#ireg 7 cls_cnt 0 2006.229.11:22:16.27#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:16.39#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:16.39#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:16.39#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:22:16.39#ibcon#first serial, iclass 30, count 0 2006.229.11:22:16.39#ibcon#enter sib2, iclass 30, count 0 2006.229.11:22:16.39#ibcon#flushed, iclass 30, count 0 2006.229.11:22:16.39#ibcon#about to write, iclass 30, count 0 2006.229.11:22:16.39#ibcon#wrote, iclass 30, count 0 2006.229.11:22:16.39#ibcon#about to read 3, iclass 30, count 0 2006.229.11:22:16.41#ibcon#read 3, iclass 30, count 0 2006.229.11:22:16.41#ibcon#about to read 4, iclass 30, count 0 2006.229.11:22:16.41#ibcon#read 4, iclass 30, count 0 2006.229.11:22:16.41#ibcon#about to read 5, iclass 30, count 0 2006.229.11:22:16.41#ibcon#read 5, iclass 30, count 0 2006.229.11:22:16.41#ibcon#about to read 6, iclass 30, count 0 2006.229.11:22:16.41#ibcon#read 6, iclass 30, count 0 2006.229.11:22:16.41#ibcon#end of sib2, iclass 30, count 0 2006.229.11:22:16.41#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:22:16.41#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:22:16.41#ibcon#[27=USB\r\n] 2006.229.11:22:16.41#ibcon#*before write, iclass 30, count 0 2006.229.11:22:16.41#ibcon#enter sib2, iclass 30, count 0 2006.229.11:22:16.41#ibcon#flushed, iclass 30, count 0 2006.229.11:22:16.41#ibcon#about to write, iclass 30, count 0 2006.229.11:22:16.41#ibcon#wrote, iclass 30, count 0 2006.229.11:22:16.41#ibcon#about to read 3, iclass 30, count 0 2006.229.11:22:16.44#ibcon#read 3, iclass 30, count 0 2006.229.11:22:16.44#ibcon#about to read 4, iclass 30, count 0 2006.229.11:22:16.44#ibcon#read 4, iclass 30, count 0 2006.229.11:22:16.44#ibcon#about to read 5, iclass 30, count 0 2006.229.11:22:16.44#ibcon#read 5, iclass 30, count 0 2006.229.11:22:16.44#ibcon#about to read 6, iclass 30, count 0 2006.229.11:22:16.44#ibcon#read 6, iclass 30, count 0 2006.229.11:22:16.44#ibcon#end of sib2, iclass 30, count 0 2006.229.11:22:16.44#ibcon#*after write, iclass 30, count 0 2006.229.11:22:16.44#ibcon#*before return 0, iclass 30, count 0 2006.229.11:22:16.44#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:16.44#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:22:16.44#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:22:16.44#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:22:16.44$vck44/vabw=wide 2006.229.11:22:16.44#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.11:22:16.44#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.11:22:16.44#ibcon#ireg 8 cls_cnt 0 2006.229.11:22:16.44#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:16.44#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:16.44#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:16.44#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:22:16.44#ibcon#first serial, iclass 32, count 0 2006.229.11:22:16.44#ibcon#enter sib2, iclass 32, count 0 2006.229.11:22:16.44#ibcon#flushed, iclass 32, count 0 2006.229.11:22:16.44#ibcon#about to write, iclass 32, count 0 2006.229.11:22:16.44#ibcon#wrote, iclass 32, count 0 2006.229.11:22:16.44#ibcon#about to read 3, iclass 32, count 0 2006.229.11:22:16.46#ibcon#read 3, iclass 32, count 0 2006.229.11:22:16.46#ibcon#about to read 4, iclass 32, count 0 2006.229.11:22:16.46#ibcon#read 4, iclass 32, count 0 2006.229.11:22:16.46#ibcon#about to read 5, iclass 32, count 0 2006.229.11:22:16.46#ibcon#read 5, iclass 32, count 0 2006.229.11:22:16.46#ibcon#about to read 6, iclass 32, count 0 2006.229.11:22:16.46#ibcon#read 6, iclass 32, count 0 2006.229.11:22:16.46#ibcon#end of sib2, iclass 32, count 0 2006.229.11:22:16.46#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:22:16.46#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:22:16.46#ibcon#[25=BW32\r\n] 2006.229.11:22:16.46#ibcon#*before write, iclass 32, count 0 2006.229.11:22:16.46#ibcon#enter sib2, iclass 32, count 0 2006.229.11:22:16.46#ibcon#flushed, iclass 32, count 0 2006.229.11:22:16.46#ibcon#about to write, iclass 32, count 0 2006.229.11:22:16.46#ibcon#wrote, iclass 32, count 0 2006.229.11:22:16.46#ibcon#about to read 3, iclass 32, count 0 2006.229.11:22:16.49#ibcon#read 3, iclass 32, count 0 2006.229.11:22:16.49#ibcon#about to read 4, iclass 32, count 0 2006.229.11:22:16.49#ibcon#read 4, iclass 32, count 0 2006.229.11:22:16.49#ibcon#about to read 5, iclass 32, count 0 2006.229.11:22:16.49#ibcon#read 5, iclass 32, count 0 2006.229.11:22:16.49#ibcon#about to read 6, iclass 32, count 0 2006.229.11:22:16.49#ibcon#read 6, iclass 32, count 0 2006.229.11:22:16.49#ibcon#end of sib2, iclass 32, count 0 2006.229.11:22:16.49#ibcon#*after write, iclass 32, count 0 2006.229.11:22:16.49#ibcon#*before return 0, iclass 32, count 0 2006.229.11:22:16.49#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:16.49#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:22:16.49#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:22:16.49#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:22:16.49$vck44/vbbw=wide 2006.229.11:22:16.49#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.11:22:16.49#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.11:22:16.49#ibcon#ireg 8 cls_cnt 0 2006.229.11:22:16.49#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:22:16.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:22:16.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:22:16.56#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:22:16.56#ibcon#first serial, iclass 34, count 0 2006.229.11:22:16.56#ibcon#enter sib2, iclass 34, count 0 2006.229.11:22:16.56#ibcon#flushed, iclass 34, count 0 2006.229.11:22:16.56#ibcon#about to write, iclass 34, count 0 2006.229.11:22:16.56#ibcon#wrote, iclass 34, count 0 2006.229.11:22:16.56#ibcon#about to read 3, iclass 34, count 0 2006.229.11:22:16.58#ibcon#read 3, iclass 34, count 0 2006.229.11:22:16.58#ibcon#about to read 4, iclass 34, count 0 2006.229.11:22:16.58#ibcon#read 4, iclass 34, count 0 2006.229.11:22:16.58#ibcon#about to read 5, iclass 34, count 0 2006.229.11:22:16.58#ibcon#read 5, iclass 34, count 0 2006.229.11:22:16.58#ibcon#about to read 6, iclass 34, count 0 2006.229.11:22:16.58#ibcon#read 6, iclass 34, count 0 2006.229.11:22:16.58#ibcon#end of sib2, iclass 34, count 0 2006.229.11:22:16.58#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:22:16.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:22:16.58#ibcon#[27=BW32\r\n] 2006.229.11:22:16.58#ibcon#*before write, iclass 34, count 0 2006.229.11:22:16.58#ibcon#enter sib2, iclass 34, count 0 2006.229.11:22:16.58#ibcon#flushed, iclass 34, count 0 2006.229.11:22:16.58#ibcon#about to write, iclass 34, count 0 2006.229.11:22:16.58#ibcon#wrote, iclass 34, count 0 2006.229.11:22:16.58#ibcon#about to read 3, iclass 34, count 0 2006.229.11:22:16.61#ibcon#read 3, iclass 34, count 0 2006.229.11:22:16.61#ibcon#about to read 4, iclass 34, count 0 2006.229.11:22:16.61#ibcon#read 4, iclass 34, count 0 2006.229.11:22:16.61#ibcon#about to read 5, iclass 34, count 0 2006.229.11:22:16.61#ibcon#read 5, iclass 34, count 0 2006.229.11:22:16.61#ibcon#about to read 6, iclass 34, count 0 2006.229.11:22:16.61#ibcon#read 6, iclass 34, count 0 2006.229.11:22:16.61#ibcon#end of sib2, iclass 34, count 0 2006.229.11:22:16.61#ibcon#*after write, iclass 34, count 0 2006.229.11:22:16.61#ibcon#*before return 0, iclass 34, count 0 2006.229.11:22:16.61#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:22:16.61#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:22:16.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:22:16.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:22:16.61$setupk4/ifdk4 2006.229.11:22:16.61$ifdk4/lo= 2006.229.11:22:16.61$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:22:16.61$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:22:16.61$ifdk4/patch= 2006.229.11:22:16.61$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:22:16.61$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:22:16.61$setupk4/!*+20s 2006.229.11:22:19.41#abcon#<5=/04 1.8 3.4 28.171001001.9\r\n> 2006.229.11:22:19.43#abcon#{5=INTERFACE CLEAR} 2006.229.11:22:19.49#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:22:26.14#trakl#Source acquired 2006.229.11:22:27.14#flagr#flagr/antenna,acquired 2006.229.11:22:29.58#abcon#<5=/04 1.8 3.4 28.171001001.9\r\n> 2006.229.11:22:29.60#abcon#{5=INTERFACE CLEAR} 2006.229.11:22:29.66#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:22:31.12$setupk4/"tpicd 2006.229.11:22:31.12$setupk4/echo=off 2006.229.11:22:31.12$setupk4/xlog=off 2006.229.11:22:31.12:!2006.229.11:23:17 2006.229.11:23:17.00:preob 2006.229.11:23:17.14/onsource/TRACKING 2006.229.11:23:17.14:!2006.229.11:23:27 2006.229.11:23:27.00:"tape 2006.229.11:23:27.00:"st=record 2006.229.11:23:27.00:data_valid=on 2006.229.11:23:27.00:midob 2006.229.11:23:27.14/onsource/TRACKING 2006.229.11:23:27.14/wx/28.16,1001.9,100 2006.229.11:23:27.34/cable/+6.4063E-03 2006.229.11:23:28.43/va/01,08,usb,yes,31,34 2006.229.11:23:28.43/va/02,07,usb,yes,34,34 2006.229.11:23:28.43/va/03,06,usb,yes,42,44 2006.229.11:23:28.43/va/04,07,usb,yes,35,36 2006.229.11:23:28.43/va/05,04,usb,yes,31,32 2006.229.11:23:28.43/va/06,04,usb,yes,35,35 2006.229.11:23:28.43/va/07,05,usb,yes,31,31 2006.229.11:23:28.43/va/08,06,usb,yes,22,28 2006.229.11:23:28.66/valo/01,524.99,yes,locked 2006.229.11:23:28.66/valo/02,534.99,yes,locked 2006.229.11:23:28.66/valo/03,564.99,yes,locked 2006.229.11:23:28.66/valo/04,624.99,yes,locked 2006.229.11:23:28.66/valo/05,734.99,yes,locked 2006.229.11:23:28.66/valo/06,814.99,yes,locked 2006.229.11:23:28.66/valo/07,864.99,yes,locked 2006.229.11:23:28.66/valo/08,884.99,yes,locked 2006.229.11:23:29.75/vb/01,04,usb,yes,32,30 2006.229.11:23:29.75/vb/02,04,usb,yes,34,34 2006.229.11:23:29.75/vb/03,04,usb,yes,31,34 2006.229.11:23:29.75/vb/04,04,usb,yes,36,35 2006.229.11:23:29.75/vb/05,04,usb,yes,28,30 2006.229.11:23:29.75/vb/06,04,usb,yes,33,29 2006.229.11:23:29.75/vb/07,04,usb,yes,32,32 2006.229.11:23:29.75/vb/08,04,usb,yes,30,33 2006.229.11:23:29.99/vblo/01,629.99,yes,locked 2006.229.11:23:29.99/vblo/02,634.99,yes,locked 2006.229.11:23:29.99/vblo/03,649.99,yes,locked 2006.229.11:23:29.99/vblo/04,679.99,yes,locked 2006.229.11:23:29.99/vblo/05,709.99,yes,locked 2006.229.11:23:29.99/vblo/06,719.99,yes,locked 2006.229.11:23:29.99/vblo/07,734.99,yes,locked 2006.229.11:23:29.99/vblo/08,744.99,yes,locked 2006.229.11:23:30.14/vabw/8 2006.229.11:23:30.29/vbbw/8 2006.229.11:23:30.38/xfe/off,on,12.0 2006.229.11:23:30.76/ifatt/23,28,28,28 2006.229.11:23:31.07/fmout-gps/S +4.61E-07 2006.229.11:23:31.11:!2006.229.11:29:57 2006.229.11:29:57.00:data_valid=off 2006.229.11:29:57.00:"et 2006.229.11:29:57.01:!+3s 2006.229.11:30:00.02:"tape 2006.229.11:30:00.02:postob 2006.229.11:30:00.10/cable/+6.4063E-03 2006.229.11:30:00.10/wx/28.08,1002.0,100 2006.229.11:30:00.16/fmout-gps/S +4.63E-07 2006.229.11:30:00.16:scan_name=229-1134,jd0608,80 2006.229.11:30:00.16:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.11:30:01.13#flagr#flagr/antenna,new-source 2006.229.11:30:01.13:checkk5 2006.229.11:30:01.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:30:01.86/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:30:02.25/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:30:02.64/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:30:03.03/chk_obsdata//k5ts1/T2291123??a.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.11:30:03.42/chk_obsdata//k5ts2/T2291123??b.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.11:30:03.82/chk_obsdata//k5ts3/T2291123??c.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.11:30:04.22/chk_obsdata//k5ts4/T2291123??d.dat file size is correct (nominal:1560MB, actual:1556MB). 2006.229.11:30:04.94/k5log//k5ts1_log_newline 2006.229.11:30:05.66/k5log//k5ts2_log_newline 2006.229.11:30:06.36/k5log//k5ts3_log_newline 2006.229.11:30:07.07/k5log//k5ts4_log_newline 2006.229.11:30:07.10/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:30:07.10:setupk4=1 2006.229.11:30:07.10$setupk4/echo=on 2006.229.11:30:07.10$setupk4/pcalon 2006.229.11:30:07.10$pcalon/"no phase cal control is implemented here 2006.229.11:30:07.10$setupk4/"tpicd=stop 2006.229.11:30:07.10$setupk4/"rec=synch_on 2006.229.11:30:07.10$setupk4/"rec_mode=128 2006.229.11:30:07.10$setupk4/!* 2006.229.11:30:07.10$setupk4/recpk4 2006.229.11:30:07.10$recpk4/recpatch= 2006.229.11:30:07.11$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:30:07.11$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:30:07.11$setupk4/vck44 2006.229.11:30:07.11$vck44/valo=1,524.99 2006.229.11:30:07.11#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.11:30:07.11#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.11:30:07.11#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:07.11#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:07.11#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:07.11#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:07.11#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:30:07.11#ibcon#first serial, iclass 5, count 0 2006.229.11:30:07.11#ibcon#enter sib2, iclass 5, count 0 2006.229.11:30:07.11#ibcon#flushed, iclass 5, count 0 2006.229.11:30:07.11#ibcon#about to write, iclass 5, count 0 2006.229.11:30:07.11#ibcon#wrote, iclass 5, count 0 2006.229.11:30:07.11#ibcon#about to read 3, iclass 5, count 0 2006.229.11:30:07.12#ibcon#read 3, iclass 5, count 0 2006.229.11:30:07.12#ibcon#about to read 4, iclass 5, count 0 2006.229.11:30:07.12#ibcon#read 4, iclass 5, count 0 2006.229.11:30:07.12#ibcon#about to read 5, iclass 5, count 0 2006.229.11:30:07.12#ibcon#read 5, iclass 5, count 0 2006.229.11:30:07.12#ibcon#about to read 6, iclass 5, count 0 2006.229.11:30:07.12#ibcon#read 6, iclass 5, count 0 2006.229.11:30:07.12#ibcon#end of sib2, iclass 5, count 0 2006.229.11:30:07.12#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:30:07.12#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:30:07.12#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:30:07.12#ibcon#*before write, iclass 5, count 0 2006.229.11:30:07.12#ibcon#enter sib2, iclass 5, count 0 2006.229.11:30:07.12#ibcon#flushed, iclass 5, count 0 2006.229.11:30:07.12#ibcon#about to write, iclass 5, count 0 2006.229.11:30:07.12#ibcon#wrote, iclass 5, count 0 2006.229.11:30:07.12#ibcon#about to read 3, iclass 5, count 0 2006.229.11:30:07.17#ibcon#read 3, iclass 5, count 0 2006.229.11:30:07.17#ibcon#about to read 4, iclass 5, count 0 2006.229.11:30:07.17#ibcon#read 4, iclass 5, count 0 2006.229.11:30:07.17#ibcon#about to read 5, iclass 5, count 0 2006.229.11:30:07.17#ibcon#read 5, iclass 5, count 0 2006.229.11:30:07.17#ibcon#about to read 6, iclass 5, count 0 2006.229.11:30:07.17#ibcon#read 6, iclass 5, count 0 2006.229.11:30:07.17#ibcon#end of sib2, iclass 5, count 0 2006.229.11:30:07.17#ibcon#*after write, iclass 5, count 0 2006.229.11:30:07.17#ibcon#*before return 0, iclass 5, count 0 2006.229.11:30:07.17#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:07.17#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:07.17#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:30:07.17#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:30:07.17$vck44/va=1,8 2006.229.11:30:07.17#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.11:30:07.17#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.11:30:07.17#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:07.17#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:07.17#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:07.17#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:07.17#ibcon#enter wrdev, iclass 7, count 2 2006.229.11:30:07.17#ibcon#first serial, iclass 7, count 2 2006.229.11:30:07.17#ibcon#enter sib2, iclass 7, count 2 2006.229.11:30:07.17#ibcon#flushed, iclass 7, count 2 2006.229.11:30:07.17#ibcon#about to write, iclass 7, count 2 2006.229.11:30:07.17#ibcon#wrote, iclass 7, count 2 2006.229.11:30:07.17#ibcon#about to read 3, iclass 7, count 2 2006.229.11:30:07.19#ibcon#read 3, iclass 7, count 2 2006.229.11:30:07.19#ibcon#about to read 4, iclass 7, count 2 2006.229.11:30:07.19#ibcon#read 4, iclass 7, count 2 2006.229.11:30:07.19#ibcon#about to read 5, iclass 7, count 2 2006.229.11:30:07.19#ibcon#read 5, iclass 7, count 2 2006.229.11:30:07.19#ibcon#about to read 6, iclass 7, count 2 2006.229.11:30:07.19#ibcon#read 6, iclass 7, count 2 2006.229.11:30:07.19#ibcon#end of sib2, iclass 7, count 2 2006.229.11:30:07.19#ibcon#*mode == 0, iclass 7, count 2 2006.229.11:30:07.19#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.11:30:07.19#ibcon#[25=AT01-08\r\n] 2006.229.11:30:07.19#ibcon#*before write, iclass 7, count 2 2006.229.11:30:07.19#ibcon#enter sib2, iclass 7, count 2 2006.229.11:30:07.19#ibcon#flushed, iclass 7, count 2 2006.229.11:30:07.19#ibcon#about to write, iclass 7, count 2 2006.229.11:30:07.19#ibcon#wrote, iclass 7, count 2 2006.229.11:30:07.19#ibcon#about to read 3, iclass 7, count 2 2006.229.11:30:07.22#ibcon#read 3, iclass 7, count 2 2006.229.11:30:07.22#ibcon#about to read 4, iclass 7, count 2 2006.229.11:30:07.22#ibcon#read 4, iclass 7, count 2 2006.229.11:30:07.22#ibcon#about to read 5, iclass 7, count 2 2006.229.11:30:07.22#ibcon#read 5, iclass 7, count 2 2006.229.11:30:07.22#ibcon#about to read 6, iclass 7, count 2 2006.229.11:30:07.22#ibcon#read 6, iclass 7, count 2 2006.229.11:30:07.22#ibcon#end of sib2, iclass 7, count 2 2006.229.11:30:07.22#ibcon#*after write, iclass 7, count 2 2006.229.11:30:07.22#ibcon#*before return 0, iclass 7, count 2 2006.229.11:30:07.22#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:07.22#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:07.22#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.11:30:07.22#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:07.22#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:07.34#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:07.34#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:07.34#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:30:07.34#ibcon#first serial, iclass 7, count 0 2006.229.11:30:07.34#ibcon#enter sib2, iclass 7, count 0 2006.229.11:30:07.34#ibcon#flushed, iclass 7, count 0 2006.229.11:30:07.34#ibcon#about to write, iclass 7, count 0 2006.229.11:30:07.34#ibcon#wrote, iclass 7, count 0 2006.229.11:30:07.34#ibcon#about to read 3, iclass 7, count 0 2006.229.11:30:07.36#ibcon#read 3, iclass 7, count 0 2006.229.11:30:07.36#ibcon#about to read 4, iclass 7, count 0 2006.229.11:30:07.36#ibcon#read 4, iclass 7, count 0 2006.229.11:30:07.36#ibcon#about to read 5, iclass 7, count 0 2006.229.11:30:07.36#ibcon#read 5, iclass 7, count 0 2006.229.11:30:07.36#ibcon#about to read 6, iclass 7, count 0 2006.229.11:30:07.36#ibcon#read 6, iclass 7, count 0 2006.229.11:30:07.36#ibcon#end of sib2, iclass 7, count 0 2006.229.11:30:07.36#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:30:07.36#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:30:07.36#ibcon#[25=USB\r\n] 2006.229.11:30:07.36#ibcon#*before write, iclass 7, count 0 2006.229.11:30:07.36#ibcon#enter sib2, iclass 7, count 0 2006.229.11:30:07.36#ibcon#flushed, iclass 7, count 0 2006.229.11:30:07.36#ibcon#about to write, iclass 7, count 0 2006.229.11:30:07.36#ibcon#wrote, iclass 7, count 0 2006.229.11:30:07.36#ibcon#about to read 3, iclass 7, count 0 2006.229.11:30:07.39#ibcon#read 3, iclass 7, count 0 2006.229.11:30:07.39#ibcon#about to read 4, iclass 7, count 0 2006.229.11:30:07.39#ibcon#read 4, iclass 7, count 0 2006.229.11:30:07.39#ibcon#about to read 5, iclass 7, count 0 2006.229.11:30:07.39#ibcon#read 5, iclass 7, count 0 2006.229.11:30:07.39#ibcon#about to read 6, iclass 7, count 0 2006.229.11:30:07.39#ibcon#read 6, iclass 7, count 0 2006.229.11:30:07.39#ibcon#end of sib2, iclass 7, count 0 2006.229.11:30:07.39#ibcon#*after write, iclass 7, count 0 2006.229.11:30:07.39#ibcon#*before return 0, iclass 7, count 0 2006.229.11:30:07.39#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:07.39#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:07.39#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:30:07.39#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:30:07.39$vck44/valo=2,534.99 2006.229.11:30:07.39#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.11:30:07.39#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.11:30:07.39#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:07.39#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:07.39#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:07.39#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:07.39#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:30:07.39#ibcon#first serial, iclass 11, count 0 2006.229.11:30:07.39#ibcon#enter sib2, iclass 11, count 0 2006.229.11:30:07.39#ibcon#flushed, iclass 11, count 0 2006.229.11:30:07.39#ibcon#about to write, iclass 11, count 0 2006.229.11:30:07.39#ibcon#wrote, iclass 11, count 0 2006.229.11:30:07.39#ibcon#about to read 3, iclass 11, count 0 2006.229.11:30:07.41#ibcon#read 3, iclass 11, count 0 2006.229.11:30:07.41#ibcon#about to read 4, iclass 11, count 0 2006.229.11:30:07.41#ibcon#read 4, iclass 11, count 0 2006.229.11:30:07.41#ibcon#about to read 5, iclass 11, count 0 2006.229.11:30:07.41#ibcon#read 5, iclass 11, count 0 2006.229.11:30:07.41#ibcon#about to read 6, iclass 11, count 0 2006.229.11:30:07.41#ibcon#read 6, iclass 11, count 0 2006.229.11:30:07.41#ibcon#end of sib2, iclass 11, count 0 2006.229.11:30:07.41#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:30:07.41#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:30:07.41#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:30:07.41#ibcon#*before write, iclass 11, count 0 2006.229.11:30:07.41#ibcon#enter sib2, iclass 11, count 0 2006.229.11:30:07.41#ibcon#flushed, iclass 11, count 0 2006.229.11:30:07.41#ibcon#about to write, iclass 11, count 0 2006.229.11:30:07.41#ibcon#wrote, iclass 11, count 0 2006.229.11:30:07.41#ibcon#about to read 3, iclass 11, count 0 2006.229.11:30:07.45#ibcon#read 3, iclass 11, count 0 2006.229.11:30:07.45#ibcon#about to read 4, iclass 11, count 0 2006.229.11:30:07.45#ibcon#read 4, iclass 11, count 0 2006.229.11:30:07.45#ibcon#about to read 5, iclass 11, count 0 2006.229.11:30:07.45#ibcon#read 5, iclass 11, count 0 2006.229.11:30:07.45#ibcon#about to read 6, iclass 11, count 0 2006.229.11:30:07.45#ibcon#read 6, iclass 11, count 0 2006.229.11:30:07.45#ibcon#end of sib2, iclass 11, count 0 2006.229.11:30:07.45#ibcon#*after write, iclass 11, count 0 2006.229.11:30:07.45#ibcon#*before return 0, iclass 11, count 0 2006.229.11:30:07.45#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:07.45#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:07.45#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:30:07.45#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:30:07.45$vck44/va=2,7 2006.229.11:30:07.45#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.11:30:07.45#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.11:30:07.45#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:07.45#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:07.51#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:07.51#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:07.51#ibcon#enter wrdev, iclass 13, count 2 2006.229.11:30:07.51#ibcon#first serial, iclass 13, count 2 2006.229.11:30:07.51#ibcon#enter sib2, iclass 13, count 2 2006.229.11:30:07.51#ibcon#flushed, iclass 13, count 2 2006.229.11:30:07.51#ibcon#about to write, iclass 13, count 2 2006.229.11:30:07.51#ibcon#wrote, iclass 13, count 2 2006.229.11:30:07.51#ibcon#about to read 3, iclass 13, count 2 2006.229.11:30:07.53#ibcon#read 3, iclass 13, count 2 2006.229.11:30:07.53#ibcon#about to read 4, iclass 13, count 2 2006.229.11:30:07.53#ibcon#read 4, iclass 13, count 2 2006.229.11:30:07.53#ibcon#about to read 5, iclass 13, count 2 2006.229.11:30:07.53#ibcon#read 5, iclass 13, count 2 2006.229.11:30:07.53#ibcon#about to read 6, iclass 13, count 2 2006.229.11:30:07.53#ibcon#read 6, iclass 13, count 2 2006.229.11:30:07.53#ibcon#end of sib2, iclass 13, count 2 2006.229.11:30:07.53#ibcon#*mode == 0, iclass 13, count 2 2006.229.11:30:07.53#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.11:30:07.53#ibcon#[25=AT02-07\r\n] 2006.229.11:30:07.53#ibcon#*before write, iclass 13, count 2 2006.229.11:30:07.53#ibcon#enter sib2, iclass 13, count 2 2006.229.11:30:07.53#ibcon#flushed, iclass 13, count 2 2006.229.11:30:07.53#ibcon#about to write, iclass 13, count 2 2006.229.11:30:07.53#ibcon#wrote, iclass 13, count 2 2006.229.11:30:07.53#ibcon#about to read 3, iclass 13, count 2 2006.229.11:30:07.54#abcon#<5=/04 1.9 3.6 28.081001002.0\r\n> 2006.229.11:30:07.56#abcon#{5=INTERFACE CLEAR} 2006.229.11:30:07.56#ibcon#read 3, iclass 13, count 2 2006.229.11:30:07.56#ibcon#about to read 4, iclass 13, count 2 2006.229.11:30:07.56#ibcon#read 4, iclass 13, count 2 2006.229.11:30:07.56#ibcon#about to read 5, iclass 13, count 2 2006.229.11:30:07.56#ibcon#read 5, iclass 13, count 2 2006.229.11:30:07.56#ibcon#about to read 6, iclass 13, count 2 2006.229.11:30:07.56#ibcon#read 6, iclass 13, count 2 2006.229.11:30:07.56#ibcon#end of sib2, iclass 13, count 2 2006.229.11:30:07.56#ibcon#*after write, iclass 13, count 2 2006.229.11:30:07.56#ibcon#*before return 0, iclass 13, count 2 2006.229.11:30:07.56#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:07.56#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:07.56#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.11:30:07.56#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:07.56#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:07.62#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:30:07.68#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:07.68#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:07.68#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:30:07.68#ibcon#first serial, iclass 13, count 0 2006.229.11:30:07.68#ibcon#enter sib2, iclass 13, count 0 2006.229.11:30:07.68#ibcon#flushed, iclass 13, count 0 2006.229.11:30:07.68#ibcon#about to write, iclass 13, count 0 2006.229.11:30:07.68#ibcon#wrote, iclass 13, count 0 2006.229.11:30:07.68#ibcon#about to read 3, iclass 13, count 0 2006.229.11:30:07.70#ibcon#read 3, iclass 13, count 0 2006.229.11:30:07.70#ibcon#about to read 4, iclass 13, count 0 2006.229.11:30:07.70#ibcon#read 4, iclass 13, count 0 2006.229.11:30:07.70#ibcon#about to read 5, iclass 13, count 0 2006.229.11:30:07.70#ibcon#read 5, iclass 13, count 0 2006.229.11:30:07.70#ibcon#about to read 6, iclass 13, count 0 2006.229.11:30:07.70#ibcon#read 6, iclass 13, count 0 2006.229.11:30:07.70#ibcon#end of sib2, iclass 13, count 0 2006.229.11:30:07.70#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:30:07.70#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:30:07.70#ibcon#[25=USB\r\n] 2006.229.11:30:07.70#ibcon#*before write, iclass 13, count 0 2006.229.11:30:07.70#ibcon#enter sib2, iclass 13, count 0 2006.229.11:30:07.70#ibcon#flushed, iclass 13, count 0 2006.229.11:30:07.70#ibcon#about to write, iclass 13, count 0 2006.229.11:30:07.70#ibcon#wrote, iclass 13, count 0 2006.229.11:30:07.70#ibcon#about to read 3, iclass 13, count 0 2006.229.11:30:07.73#ibcon#read 3, iclass 13, count 0 2006.229.11:30:07.73#ibcon#about to read 4, iclass 13, count 0 2006.229.11:30:07.73#ibcon#read 4, iclass 13, count 0 2006.229.11:30:07.73#ibcon#about to read 5, iclass 13, count 0 2006.229.11:30:07.73#ibcon#read 5, iclass 13, count 0 2006.229.11:30:07.73#ibcon#about to read 6, iclass 13, count 0 2006.229.11:30:07.73#ibcon#read 6, iclass 13, count 0 2006.229.11:30:07.73#ibcon#end of sib2, iclass 13, count 0 2006.229.11:30:07.73#ibcon#*after write, iclass 13, count 0 2006.229.11:30:07.73#ibcon#*before return 0, iclass 13, count 0 2006.229.11:30:07.73#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:07.73#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:07.73#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:30:07.73#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:30:07.73$vck44/valo=3,564.99 2006.229.11:30:07.73#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.11:30:07.73#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.11:30:07.73#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:07.73#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:07.73#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:07.73#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:07.73#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:30:07.73#ibcon#first serial, iclass 19, count 0 2006.229.11:30:07.73#ibcon#enter sib2, iclass 19, count 0 2006.229.11:30:07.73#ibcon#flushed, iclass 19, count 0 2006.229.11:30:07.73#ibcon#about to write, iclass 19, count 0 2006.229.11:30:07.73#ibcon#wrote, iclass 19, count 0 2006.229.11:30:07.73#ibcon#about to read 3, iclass 19, count 0 2006.229.11:30:07.75#ibcon#read 3, iclass 19, count 0 2006.229.11:30:07.75#ibcon#about to read 4, iclass 19, count 0 2006.229.11:30:07.75#ibcon#read 4, iclass 19, count 0 2006.229.11:30:07.75#ibcon#about to read 5, iclass 19, count 0 2006.229.11:30:07.75#ibcon#read 5, iclass 19, count 0 2006.229.11:30:07.75#ibcon#about to read 6, iclass 19, count 0 2006.229.11:30:07.75#ibcon#read 6, iclass 19, count 0 2006.229.11:30:07.75#ibcon#end of sib2, iclass 19, count 0 2006.229.11:30:07.75#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:30:07.75#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:30:07.75#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:30:07.75#ibcon#*before write, iclass 19, count 0 2006.229.11:30:07.75#ibcon#enter sib2, iclass 19, count 0 2006.229.11:30:07.75#ibcon#flushed, iclass 19, count 0 2006.229.11:30:07.75#ibcon#about to write, iclass 19, count 0 2006.229.11:30:07.75#ibcon#wrote, iclass 19, count 0 2006.229.11:30:07.75#ibcon#about to read 3, iclass 19, count 0 2006.229.11:30:07.79#ibcon#read 3, iclass 19, count 0 2006.229.11:30:07.79#ibcon#about to read 4, iclass 19, count 0 2006.229.11:30:07.79#ibcon#read 4, iclass 19, count 0 2006.229.11:30:07.79#ibcon#about to read 5, iclass 19, count 0 2006.229.11:30:07.79#ibcon#read 5, iclass 19, count 0 2006.229.11:30:07.79#ibcon#about to read 6, iclass 19, count 0 2006.229.11:30:07.79#ibcon#read 6, iclass 19, count 0 2006.229.11:30:07.79#ibcon#end of sib2, iclass 19, count 0 2006.229.11:30:07.79#ibcon#*after write, iclass 19, count 0 2006.229.11:30:07.79#ibcon#*before return 0, iclass 19, count 0 2006.229.11:30:07.79#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:07.79#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:07.79#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:30:07.79#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:30:07.79$vck44/va=3,6 2006.229.11:30:07.79#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.11:30:07.79#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.11:30:07.79#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:07.79#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:07.85#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:07.85#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:07.85#ibcon#enter wrdev, iclass 21, count 2 2006.229.11:30:07.85#ibcon#first serial, iclass 21, count 2 2006.229.11:30:07.85#ibcon#enter sib2, iclass 21, count 2 2006.229.11:30:07.85#ibcon#flushed, iclass 21, count 2 2006.229.11:30:07.85#ibcon#about to write, iclass 21, count 2 2006.229.11:30:07.85#ibcon#wrote, iclass 21, count 2 2006.229.11:30:07.85#ibcon#about to read 3, iclass 21, count 2 2006.229.11:30:07.87#ibcon#read 3, iclass 21, count 2 2006.229.11:30:07.87#ibcon#about to read 4, iclass 21, count 2 2006.229.11:30:07.87#ibcon#read 4, iclass 21, count 2 2006.229.11:30:07.87#ibcon#about to read 5, iclass 21, count 2 2006.229.11:30:07.87#ibcon#read 5, iclass 21, count 2 2006.229.11:30:07.87#ibcon#about to read 6, iclass 21, count 2 2006.229.11:30:07.87#ibcon#read 6, iclass 21, count 2 2006.229.11:30:07.87#ibcon#end of sib2, iclass 21, count 2 2006.229.11:30:07.87#ibcon#*mode == 0, iclass 21, count 2 2006.229.11:30:07.87#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.11:30:07.87#ibcon#[25=AT03-06\r\n] 2006.229.11:30:07.87#ibcon#*before write, iclass 21, count 2 2006.229.11:30:07.87#ibcon#enter sib2, iclass 21, count 2 2006.229.11:30:07.87#ibcon#flushed, iclass 21, count 2 2006.229.11:30:07.87#ibcon#about to write, iclass 21, count 2 2006.229.11:30:07.87#ibcon#wrote, iclass 21, count 2 2006.229.11:30:07.87#ibcon#about to read 3, iclass 21, count 2 2006.229.11:30:07.90#ibcon#read 3, iclass 21, count 2 2006.229.11:30:07.90#ibcon#about to read 4, iclass 21, count 2 2006.229.11:30:07.90#ibcon#read 4, iclass 21, count 2 2006.229.11:30:07.90#ibcon#about to read 5, iclass 21, count 2 2006.229.11:30:07.90#ibcon#read 5, iclass 21, count 2 2006.229.11:30:07.90#ibcon#about to read 6, iclass 21, count 2 2006.229.11:30:07.90#ibcon#read 6, iclass 21, count 2 2006.229.11:30:07.90#ibcon#end of sib2, iclass 21, count 2 2006.229.11:30:07.90#ibcon#*after write, iclass 21, count 2 2006.229.11:30:07.90#ibcon#*before return 0, iclass 21, count 2 2006.229.11:30:07.90#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:07.90#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:07.90#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.11:30:07.90#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:07.90#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:08.02#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:08.02#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:08.02#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:30:08.02#ibcon#first serial, iclass 21, count 0 2006.229.11:30:08.02#ibcon#enter sib2, iclass 21, count 0 2006.229.11:30:08.02#ibcon#flushed, iclass 21, count 0 2006.229.11:30:08.02#ibcon#about to write, iclass 21, count 0 2006.229.11:30:08.02#ibcon#wrote, iclass 21, count 0 2006.229.11:30:08.02#ibcon#about to read 3, iclass 21, count 0 2006.229.11:30:08.04#ibcon#read 3, iclass 21, count 0 2006.229.11:30:08.04#ibcon#about to read 4, iclass 21, count 0 2006.229.11:30:08.04#ibcon#read 4, iclass 21, count 0 2006.229.11:30:08.04#ibcon#about to read 5, iclass 21, count 0 2006.229.11:30:08.04#ibcon#read 5, iclass 21, count 0 2006.229.11:30:08.04#ibcon#about to read 6, iclass 21, count 0 2006.229.11:30:08.04#ibcon#read 6, iclass 21, count 0 2006.229.11:30:08.04#ibcon#end of sib2, iclass 21, count 0 2006.229.11:30:08.04#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:30:08.04#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:30:08.04#ibcon#[25=USB\r\n] 2006.229.11:30:08.04#ibcon#*before write, iclass 21, count 0 2006.229.11:30:08.04#ibcon#enter sib2, iclass 21, count 0 2006.229.11:30:08.04#ibcon#flushed, iclass 21, count 0 2006.229.11:30:08.04#ibcon#about to write, iclass 21, count 0 2006.229.11:30:08.04#ibcon#wrote, iclass 21, count 0 2006.229.11:30:08.04#ibcon#about to read 3, iclass 21, count 0 2006.229.11:30:08.07#ibcon#read 3, iclass 21, count 0 2006.229.11:30:08.07#ibcon#about to read 4, iclass 21, count 0 2006.229.11:30:08.07#ibcon#read 4, iclass 21, count 0 2006.229.11:30:08.07#ibcon#about to read 5, iclass 21, count 0 2006.229.11:30:08.07#ibcon#read 5, iclass 21, count 0 2006.229.11:30:08.07#ibcon#about to read 6, iclass 21, count 0 2006.229.11:30:08.07#ibcon#read 6, iclass 21, count 0 2006.229.11:30:08.07#ibcon#end of sib2, iclass 21, count 0 2006.229.11:30:08.07#ibcon#*after write, iclass 21, count 0 2006.229.11:30:08.07#ibcon#*before return 0, iclass 21, count 0 2006.229.11:30:08.07#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:08.07#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:08.07#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:30:08.07#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:30:08.07$vck44/valo=4,624.99 2006.229.11:30:08.07#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.11:30:08.07#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.11:30:08.07#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:08.07#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:08.07#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:08.07#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:08.07#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:30:08.07#ibcon#first serial, iclass 23, count 0 2006.229.11:30:08.07#ibcon#enter sib2, iclass 23, count 0 2006.229.11:30:08.07#ibcon#flushed, iclass 23, count 0 2006.229.11:30:08.07#ibcon#about to write, iclass 23, count 0 2006.229.11:30:08.07#ibcon#wrote, iclass 23, count 0 2006.229.11:30:08.07#ibcon#about to read 3, iclass 23, count 0 2006.229.11:30:08.09#ibcon#read 3, iclass 23, count 0 2006.229.11:30:08.09#ibcon#about to read 4, iclass 23, count 0 2006.229.11:30:08.09#ibcon#read 4, iclass 23, count 0 2006.229.11:30:08.09#ibcon#about to read 5, iclass 23, count 0 2006.229.11:30:08.09#ibcon#read 5, iclass 23, count 0 2006.229.11:30:08.09#ibcon#about to read 6, iclass 23, count 0 2006.229.11:30:08.09#ibcon#read 6, iclass 23, count 0 2006.229.11:30:08.09#ibcon#end of sib2, iclass 23, count 0 2006.229.11:30:08.09#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:30:08.09#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:30:08.09#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:30:08.09#ibcon#*before write, iclass 23, count 0 2006.229.11:30:08.09#ibcon#enter sib2, iclass 23, count 0 2006.229.11:30:08.09#ibcon#flushed, iclass 23, count 0 2006.229.11:30:08.09#ibcon#about to write, iclass 23, count 0 2006.229.11:30:08.09#ibcon#wrote, iclass 23, count 0 2006.229.11:30:08.09#ibcon#about to read 3, iclass 23, count 0 2006.229.11:30:08.13#ibcon#read 3, iclass 23, count 0 2006.229.11:30:08.13#ibcon#about to read 4, iclass 23, count 0 2006.229.11:30:08.13#ibcon#read 4, iclass 23, count 0 2006.229.11:30:08.13#ibcon#about to read 5, iclass 23, count 0 2006.229.11:30:08.13#ibcon#read 5, iclass 23, count 0 2006.229.11:30:08.13#ibcon#about to read 6, iclass 23, count 0 2006.229.11:30:08.13#ibcon#read 6, iclass 23, count 0 2006.229.11:30:08.13#ibcon#end of sib2, iclass 23, count 0 2006.229.11:30:08.13#ibcon#*after write, iclass 23, count 0 2006.229.11:30:08.13#ibcon#*before return 0, iclass 23, count 0 2006.229.11:30:08.13#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:08.13#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:08.13#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:30:08.13#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:30:08.13$vck44/va=4,7 2006.229.11:30:08.13#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:30:08.13#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:30:08.13#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:08.13#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:08.19#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:08.19#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:08.19#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:30:08.19#ibcon#first serial, iclass 25, count 2 2006.229.11:30:08.19#ibcon#enter sib2, iclass 25, count 2 2006.229.11:30:08.19#ibcon#flushed, iclass 25, count 2 2006.229.11:30:08.19#ibcon#about to write, iclass 25, count 2 2006.229.11:30:08.19#ibcon#wrote, iclass 25, count 2 2006.229.11:30:08.19#ibcon#about to read 3, iclass 25, count 2 2006.229.11:30:08.21#ibcon#read 3, iclass 25, count 2 2006.229.11:30:08.21#ibcon#about to read 4, iclass 25, count 2 2006.229.11:30:08.21#ibcon#read 4, iclass 25, count 2 2006.229.11:30:08.21#ibcon#about to read 5, iclass 25, count 2 2006.229.11:30:08.21#ibcon#read 5, iclass 25, count 2 2006.229.11:30:08.21#ibcon#about to read 6, iclass 25, count 2 2006.229.11:30:08.21#ibcon#read 6, iclass 25, count 2 2006.229.11:30:08.21#ibcon#end of sib2, iclass 25, count 2 2006.229.11:30:08.21#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:30:08.21#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:30:08.21#ibcon#[25=AT04-07\r\n] 2006.229.11:30:08.21#ibcon#*before write, iclass 25, count 2 2006.229.11:30:08.21#ibcon#enter sib2, iclass 25, count 2 2006.229.11:30:08.21#ibcon#flushed, iclass 25, count 2 2006.229.11:30:08.21#ibcon#about to write, iclass 25, count 2 2006.229.11:30:08.21#ibcon#wrote, iclass 25, count 2 2006.229.11:30:08.21#ibcon#about to read 3, iclass 25, count 2 2006.229.11:30:08.24#ibcon#read 3, iclass 25, count 2 2006.229.11:30:08.24#ibcon#about to read 4, iclass 25, count 2 2006.229.11:30:08.24#ibcon#read 4, iclass 25, count 2 2006.229.11:30:08.24#ibcon#about to read 5, iclass 25, count 2 2006.229.11:30:08.24#ibcon#read 5, iclass 25, count 2 2006.229.11:30:08.24#ibcon#about to read 6, iclass 25, count 2 2006.229.11:30:08.24#ibcon#read 6, iclass 25, count 2 2006.229.11:30:08.24#ibcon#end of sib2, iclass 25, count 2 2006.229.11:30:08.24#ibcon#*after write, iclass 25, count 2 2006.229.11:30:08.24#ibcon#*before return 0, iclass 25, count 2 2006.229.11:30:08.24#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:08.24#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:08.24#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:30:08.24#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:08.24#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:08.36#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:08.36#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:08.36#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:30:08.36#ibcon#first serial, iclass 25, count 0 2006.229.11:30:08.36#ibcon#enter sib2, iclass 25, count 0 2006.229.11:30:08.36#ibcon#flushed, iclass 25, count 0 2006.229.11:30:08.36#ibcon#about to write, iclass 25, count 0 2006.229.11:30:08.36#ibcon#wrote, iclass 25, count 0 2006.229.11:30:08.36#ibcon#about to read 3, iclass 25, count 0 2006.229.11:30:08.38#ibcon#read 3, iclass 25, count 0 2006.229.11:30:08.38#ibcon#about to read 4, iclass 25, count 0 2006.229.11:30:08.38#ibcon#read 4, iclass 25, count 0 2006.229.11:30:08.38#ibcon#about to read 5, iclass 25, count 0 2006.229.11:30:08.38#ibcon#read 5, iclass 25, count 0 2006.229.11:30:08.38#ibcon#about to read 6, iclass 25, count 0 2006.229.11:30:08.38#ibcon#read 6, iclass 25, count 0 2006.229.11:30:08.38#ibcon#end of sib2, iclass 25, count 0 2006.229.11:30:08.38#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:30:08.38#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:30:08.38#ibcon#[25=USB\r\n] 2006.229.11:30:08.38#ibcon#*before write, iclass 25, count 0 2006.229.11:30:08.38#ibcon#enter sib2, iclass 25, count 0 2006.229.11:30:08.38#ibcon#flushed, iclass 25, count 0 2006.229.11:30:08.38#ibcon#about to write, iclass 25, count 0 2006.229.11:30:08.38#ibcon#wrote, iclass 25, count 0 2006.229.11:30:08.38#ibcon#about to read 3, iclass 25, count 0 2006.229.11:30:08.41#ibcon#read 3, iclass 25, count 0 2006.229.11:30:08.41#ibcon#about to read 4, iclass 25, count 0 2006.229.11:30:08.41#ibcon#read 4, iclass 25, count 0 2006.229.11:30:08.41#ibcon#about to read 5, iclass 25, count 0 2006.229.11:30:08.41#ibcon#read 5, iclass 25, count 0 2006.229.11:30:08.41#ibcon#about to read 6, iclass 25, count 0 2006.229.11:30:08.41#ibcon#read 6, iclass 25, count 0 2006.229.11:30:08.41#ibcon#end of sib2, iclass 25, count 0 2006.229.11:30:08.41#ibcon#*after write, iclass 25, count 0 2006.229.11:30:08.41#ibcon#*before return 0, iclass 25, count 0 2006.229.11:30:08.41#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:08.41#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:08.41#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:30:08.41#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:30:08.41$vck44/valo=5,734.99 2006.229.11:30:08.41#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:30:08.41#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:30:08.41#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:08.41#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:08.41#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:08.41#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:08.41#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:30:08.41#ibcon#first serial, iclass 27, count 0 2006.229.11:30:08.41#ibcon#enter sib2, iclass 27, count 0 2006.229.11:30:08.41#ibcon#flushed, iclass 27, count 0 2006.229.11:30:08.41#ibcon#about to write, iclass 27, count 0 2006.229.11:30:08.41#ibcon#wrote, iclass 27, count 0 2006.229.11:30:08.41#ibcon#about to read 3, iclass 27, count 0 2006.229.11:30:08.43#ibcon#read 3, iclass 27, count 0 2006.229.11:30:08.43#ibcon#about to read 4, iclass 27, count 0 2006.229.11:30:08.43#ibcon#read 4, iclass 27, count 0 2006.229.11:30:08.43#ibcon#about to read 5, iclass 27, count 0 2006.229.11:30:08.43#ibcon#read 5, iclass 27, count 0 2006.229.11:30:08.43#ibcon#about to read 6, iclass 27, count 0 2006.229.11:30:08.43#ibcon#read 6, iclass 27, count 0 2006.229.11:30:08.43#ibcon#end of sib2, iclass 27, count 0 2006.229.11:30:08.43#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:30:08.43#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:30:08.43#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:30:08.43#ibcon#*before write, iclass 27, count 0 2006.229.11:30:08.43#ibcon#enter sib2, iclass 27, count 0 2006.229.11:30:08.43#ibcon#flushed, iclass 27, count 0 2006.229.11:30:08.43#ibcon#about to write, iclass 27, count 0 2006.229.11:30:08.43#ibcon#wrote, iclass 27, count 0 2006.229.11:30:08.43#ibcon#about to read 3, iclass 27, count 0 2006.229.11:30:08.47#ibcon#read 3, iclass 27, count 0 2006.229.11:30:08.47#ibcon#about to read 4, iclass 27, count 0 2006.229.11:30:08.47#ibcon#read 4, iclass 27, count 0 2006.229.11:30:08.47#ibcon#about to read 5, iclass 27, count 0 2006.229.11:30:08.47#ibcon#read 5, iclass 27, count 0 2006.229.11:30:08.47#ibcon#about to read 6, iclass 27, count 0 2006.229.11:30:08.47#ibcon#read 6, iclass 27, count 0 2006.229.11:30:08.47#ibcon#end of sib2, iclass 27, count 0 2006.229.11:30:08.47#ibcon#*after write, iclass 27, count 0 2006.229.11:30:08.47#ibcon#*before return 0, iclass 27, count 0 2006.229.11:30:08.47#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:08.47#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:08.47#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:30:08.47#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:30:08.47$vck44/va=5,4 2006.229.11:30:08.47#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.11:30:08.47#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.11:30:08.47#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:08.47#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:08.53#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:08.53#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:08.53#ibcon#enter wrdev, iclass 29, count 2 2006.229.11:30:08.53#ibcon#first serial, iclass 29, count 2 2006.229.11:30:08.53#ibcon#enter sib2, iclass 29, count 2 2006.229.11:30:08.53#ibcon#flushed, iclass 29, count 2 2006.229.11:30:08.53#ibcon#about to write, iclass 29, count 2 2006.229.11:30:08.53#ibcon#wrote, iclass 29, count 2 2006.229.11:30:08.53#ibcon#about to read 3, iclass 29, count 2 2006.229.11:30:08.55#ibcon#read 3, iclass 29, count 2 2006.229.11:30:08.55#ibcon#about to read 4, iclass 29, count 2 2006.229.11:30:08.55#ibcon#read 4, iclass 29, count 2 2006.229.11:30:08.55#ibcon#about to read 5, iclass 29, count 2 2006.229.11:30:08.55#ibcon#read 5, iclass 29, count 2 2006.229.11:30:08.55#ibcon#about to read 6, iclass 29, count 2 2006.229.11:30:08.55#ibcon#read 6, iclass 29, count 2 2006.229.11:30:08.55#ibcon#end of sib2, iclass 29, count 2 2006.229.11:30:08.55#ibcon#*mode == 0, iclass 29, count 2 2006.229.11:30:08.55#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.11:30:08.55#ibcon#[25=AT05-04\r\n] 2006.229.11:30:08.55#ibcon#*before write, iclass 29, count 2 2006.229.11:30:08.55#ibcon#enter sib2, iclass 29, count 2 2006.229.11:30:08.55#ibcon#flushed, iclass 29, count 2 2006.229.11:30:08.55#ibcon#about to write, iclass 29, count 2 2006.229.11:30:08.55#ibcon#wrote, iclass 29, count 2 2006.229.11:30:08.55#ibcon#about to read 3, iclass 29, count 2 2006.229.11:30:08.58#ibcon#read 3, iclass 29, count 2 2006.229.11:30:08.58#ibcon#about to read 4, iclass 29, count 2 2006.229.11:30:08.58#ibcon#read 4, iclass 29, count 2 2006.229.11:30:08.58#ibcon#about to read 5, iclass 29, count 2 2006.229.11:30:08.58#ibcon#read 5, iclass 29, count 2 2006.229.11:30:08.58#ibcon#about to read 6, iclass 29, count 2 2006.229.11:30:08.58#ibcon#read 6, iclass 29, count 2 2006.229.11:30:08.58#ibcon#end of sib2, iclass 29, count 2 2006.229.11:30:08.58#ibcon#*after write, iclass 29, count 2 2006.229.11:30:08.58#ibcon#*before return 0, iclass 29, count 2 2006.229.11:30:08.58#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:08.58#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:08.58#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.11:30:08.58#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:08.58#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:08.70#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:08.70#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:08.70#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:30:08.70#ibcon#first serial, iclass 29, count 0 2006.229.11:30:08.70#ibcon#enter sib2, iclass 29, count 0 2006.229.11:30:08.70#ibcon#flushed, iclass 29, count 0 2006.229.11:30:08.70#ibcon#about to write, iclass 29, count 0 2006.229.11:30:08.70#ibcon#wrote, iclass 29, count 0 2006.229.11:30:08.70#ibcon#about to read 3, iclass 29, count 0 2006.229.11:30:08.72#ibcon#read 3, iclass 29, count 0 2006.229.11:30:08.72#ibcon#about to read 4, iclass 29, count 0 2006.229.11:30:08.72#ibcon#read 4, iclass 29, count 0 2006.229.11:30:08.72#ibcon#about to read 5, iclass 29, count 0 2006.229.11:30:08.72#ibcon#read 5, iclass 29, count 0 2006.229.11:30:08.72#ibcon#about to read 6, iclass 29, count 0 2006.229.11:30:08.72#ibcon#read 6, iclass 29, count 0 2006.229.11:30:08.72#ibcon#end of sib2, iclass 29, count 0 2006.229.11:30:08.72#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:30:08.72#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:30:08.72#ibcon#[25=USB\r\n] 2006.229.11:30:08.72#ibcon#*before write, iclass 29, count 0 2006.229.11:30:08.72#ibcon#enter sib2, iclass 29, count 0 2006.229.11:30:08.72#ibcon#flushed, iclass 29, count 0 2006.229.11:30:08.72#ibcon#about to write, iclass 29, count 0 2006.229.11:30:08.72#ibcon#wrote, iclass 29, count 0 2006.229.11:30:08.72#ibcon#about to read 3, iclass 29, count 0 2006.229.11:30:08.75#ibcon#read 3, iclass 29, count 0 2006.229.11:30:08.75#ibcon#about to read 4, iclass 29, count 0 2006.229.11:30:08.75#ibcon#read 4, iclass 29, count 0 2006.229.11:30:08.75#ibcon#about to read 5, iclass 29, count 0 2006.229.11:30:08.75#ibcon#read 5, iclass 29, count 0 2006.229.11:30:08.75#ibcon#about to read 6, iclass 29, count 0 2006.229.11:30:08.75#ibcon#read 6, iclass 29, count 0 2006.229.11:30:08.75#ibcon#end of sib2, iclass 29, count 0 2006.229.11:30:08.75#ibcon#*after write, iclass 29, count 0 2006.229.11:30:08.75#ibcon#*before return 0, iclass 29, count 0 2006.229.11:30:08.75#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:08.75#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:08.75#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:30:08.75#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:30:08.75$vck44/valo=6,814.99 2006.229.11:30:08.75#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:30:08.75#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:30:08.75#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:08.75#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:08.75#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:08.75#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:08.75#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:30:08.75#ibcon#first serial, iclass 31, count 0 2006.229.11:30:08.75#ibcon#enter sib2, iclass 31, count 0 2006.229.11:30:08.75#ibcon#flushed, iclass 31, count 0 2006.229.11:30:08.75#ibcon#about to write, iclass 31, count 0 2006.229.11:30:08.75#ibcon#wrote, iclass 31, count 0 2006.229.11:30:08.75#ibcon#about to read 3, iclass 31, count 0 2006.229.11:30:08.77#ibcon#read 3, iclass 31, count 0 2006.229.11:30:08.77#ibcon#about to read 4, iclass 31, count 0 2006.229.11:30:08.77#ibcon#read 4, iclass 31, count 0 2006.229.11:30:08.77#ibcon#about to read 5, iclass 31, count 0 2006.229.11:30:08.77#ibcon#read 5, iclass 31, count 0 2006.229.11:30:08.77#ibcon#about to read 6, iclass 31, count 0 2006.229.11:30:08.77#ibcon#read 6, iclass 31, count 0 2006.229.11:30:08.77#ibcon#end of sib2, iclass 31, count 0 2006.229.11:30:08.77#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:30:08.77#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:30:08.77#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:30:08.77#ibcon#*before write, iclass 31, count 0 2006.229.11:30:08.77#ibcon#enter sib2, iclass 31, count 0 2006.229.11:30:08.77#ibcon#flushed, iclass 31, count 0 2006.229.11:30:08.77#ibcon#about to write, iclass 31, count 0 2006.229.11:30:08.77#ibcon#wrote, iclass 31, count 0 2006.229.11:30:08.77#ibcon#about to read 3, iclass 31, count 0 2006.229.11:30:08.81#ibcon#read 3, iclass 31, count 0 2006.229.11:30:08.81#ibcon#about to read 4, iclass 31, count 0 2006.229.11:30:08.81#ibcon#read 4, iclass 31, count 0 2006.229.11:30:08.81#ibcon#about to read 5, iclass 31, count 0 2006.229.11:30:08.81#ibcon#read 5, iclass 31, count 0 2006.229.11:30:08.81#ibcon#about to read 6, iclass 31, count 0 2006.229.11:30:08.81#ibcon#read 6, iclass 31, count 0 2006.229.11:30:08.81#ibcon#end of sib2, iclass 31, count 0 2006.229.11:30:08.81#ibcon#*after write, iclass 31, count 0 2006.229.11:30:08.81#ibcon#*before return 0, iclass 31, count 0 2006.229.11:30:08.81#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:08.81#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:08.81#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:30:08.81#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:30:08.81$vck44/va=6,4 2006.229.11:30:08.81#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.11:30:08.81#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.11:30:08.81#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:08.81#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:08.87#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:08.87#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:08.87#ibcon#enter wrdev, iclass 33, count 2 2006.229.11:30:08.87#ibcon#first serial, iclass 33, count 2 2006.229.11:30:08.87#ibcon#enter sib2, iclass 33, count 2 2006.229.11:30:08.87#ibcon#flushed, iclass 33, count 2 2006.229.11:30:08.87#ibcon#about to write, iclass 33, count 2 2006.229.11:30:08.87#ibcon#wrote, iclass 33, count 2 2006.229.11:30:08.87#ibcon#about to read 3, iclass 33, count 2 2006.229.11:30:08.89#ibcon#read 3, iclass 33, count 2 2006.229.11:30:08.89#ibcon#about to read 4, iclass 33, count 2 2006.229.11:30:08.89#ibcon#read 4, iclass 33, count 2 2006.229.11:30:08.89#ibcon#about to read 5, iclass 33, count 2 2006.229.11:30:08.89#ibcon#read 5, iclass 33, count 2 2006.229.11:30:08.89#ibcon#about to read 6, iclass 33, count 2 2006.229.11:30:08.89#ibcon#read 6, iclass 33, count 2 2006.229.11:30:08.89#ibcon#end of sib2, iclass 33, count 2 2006.229.11:30:08.89#ibcon#*mode == 0, iclass 33, count 2 2006.229.11:30:08.89#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.11:30:08.89#ibcon#[25=AT06-04\r\n] 2006.229.11:30:08.89#ibcon#*before write, iclass 33, count 2 2006.229.11:30:08.89#ibcon#enter sib2, iclass 33, count 2 2006.229.11:30:08.89#ibcon#flushed, iclass 33, count 2 2006.229.11:30:08.89#ibcon#about to write, iclass 33, count 2 2006.229.11:30:08.89#ibcon#wrote, iclass 33, count 2 2006.229.11:30:08.89#ibcon#about to read 3, iclass 33, count 2 2006.229.11:30:08.92#ibcon#read 3, iclass 33, count 2 2006.229.11:30:08.92#ibcon#about to read 4, iclass 33, count 2 2006.229.11:30:08.92#ibcon#read 4, iclass 33, count 2 2006.229.11:30:08.92#ibcon#about to read 5, iclass 33, count 2 2006.229.11:30:08.92#ibcon#read 5, iclass 33, count 2 2006.229.11:30:08.92#ibcon#about to read 6, iclass 33, count 2 2006.229.11:30:08.92#ibcon#read 6, iclass 33, count 2 2006.229.11:30:08.92#ibcon#end of sib2, iclass 33, count 2 2006.229.11:30:08.92#ibcon#*after write, iclass 33, count 2 2006.229.11:30:08.92#ibcon#*before return 0, iclass 33, count 2 2006.229.11:30:08.92#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:08.92#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:08.92#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.11:30:08.92#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:08.92#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:09.04#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:09.04#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:09.04#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:30:09.04#ibcon#first serial, iclass 33, count 0 2006.229.11:30:09.04#ibcon#enter sib2, iclass 33, count 0 2006.229.11:30:09.04#ibcon#flushed, iclass 33, count 0 2006.229.11:30:09.04#ibcon#about to write, iclass 33, count 0 2006.229.11:30:09.04#ibcon#wrote, iclass 33, count 0 2006.229.11:30:09.04#ibcon#about to read 3, iclass 33, count 0 2006.229.11:30:09.06#ibcon#read 3, iclass 33, count 0 2006.229.11:30:09.06#ibcon#about to read 4, iclass 33, count 0 2006.229.11:30:09.06#ibcon#read 4, iclass 33, count 0 2006.229.11:30:09.06#ibcon#about to read 5, iclass 33, count 0 2006.229.11:30:09.06#ibcon#read 5, iclass 33, count 0 2006.229.11:30:09.06#ibcon#about to read 6, iclass 33, count 0 2006.229.11:30:09.06#ibcon#read 6, iclass 33, count 0 2006.229.11:30:09.06#ibcon#end of sib2, iclass 33, count 0 2006.229.11:30:09.06#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:30:09.06#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:30:09.06#ibcon#[25=USB\r\n] 2006.229.11:30:09.06#ibcon#*before write, iclass 33, count 0 2006.229.11:30:09.06#ibcon#enter sib2, iclass 33, count 0 2006.229.11:30:09.06#ibcon#flushed, iclass 33, count 0 2006.229.11:30:09.06#ibcon#about to write, iclass 33, count 0 2006.229.11:30:09.06#ibcon#wrote, iclass 33, count 0 2006.229.11:30:09.06#ibcon#about to read 3, iclass 33, count 0 2006.229.11:30:09.09#ibcon#read 3, iclass 33, count 0 2006.229.11:30:09.09#ibcon#about to read 4, iclass 33, count 0 2006.229.11:30:09.09#ibcon#read 4, iclass 33, count 0 2006.229.11:30:09.09#ibcon#about to read 5, iclass 33, count 0 2006.229.11:30:09.09#ibcon#read 5, iclass 33, count 0 2006.229.11:30:09.09#ibcon#about to read 6, iclass 33, count 0 2006.229.11:30:09.09#ibcon#read 6, iclass 33, count 0 2006.229.11:30:09.09#ibcon#end of sib2, iclass 33, count 0 2006.229.11:30:09.09#ibcon#*after write, iclass 33, count 0 2006.229.11:30:09.09#ibcon#*before return 0, iclass 33, count 0 2006.229.11:30:09.09#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:09.09#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:09.09#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:30:09.09#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:30:09.09$vck44/valo=7,864.99 2006.229.11:30:09.09#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.11:30:09.09#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.11:30:09.09#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:09.09#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:09.09#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:09.09#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:09.09#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:30:09.09#ibcon#first serial, iclass 35, count 0 2006.229.11:30:09.09#ibcon#enter sib2, iclass 35, count 0 2006.229.11:30:09.09#ibcon#flushed, iclass 35, count 0 2006.229.11:30:09.09#ibcon#about to write, iclass 35, count 0 2006.229.11:30:09.09#ibcon#wrote, iclass 35, count 0 2006.229.11:30:09.09#ibcon#about to read 3, iclass 35, count 0 2006.229.11:30:09.11#ibcon#read 3, iclass 35, count 0 2006.229.11:30:09.11#ibcon#about to read 4, iclass 35, count 0 2006.229.11:30:09.11#ibcon#read 4, iclass 35, count 0 2006.229.11:30:09.11#ibcon#about to read 5, iclass 35, count 0 2006.229.11:30:09.11#ibcon#read 5, iclass 35, count 0 2006.229.11:30:09.11#ibcon#about to read 6, iclass 35, count 0 2006.229.11:30:09.11#ibcon#read 6, iclass 35, count 0 2006.229.11:30:09.11#ibcon#end of sib2, iclass 35, count 0 2006.229.11:30:09.11#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:30:09.11#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:30:09.11#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:30:09.11#ibcon#*before write, iclass 35, count 0 2006.229.11:30:09.11#ibcon#enter sib2, iclass 35, count 0 2006.229.11:30:09.11#ibcon#flushed, iclass 35, count 0 2006.229.11:30:09.11#ibcon#about to write, iclass 35, count 0 2006.229.11:30:09.11#ibcon#wrote, iclass 35, count 0 2006.229.11:30:09.11#ibcon#about to read 3, iclass 35, count 0 2006.229.11:30:09.15#ibcon#read 3, iclass 35, count 0 2006.229.11:30:09.15#ibcon#about to read 4, iclass 35, count 0 2006.229.11:30:09.15#ibcon#read 4, iclass 35, count 0 2006.229.11:30:09.15#ibcon#about to read 5, iclass 35, count 0 2006.229.11:30:09.15#ibcon#read 5, iclass 35, count 0 2006.229.11:30:09.15#ibcon#about to read 6, iclass 35, count 0 2006.229.11:30:09.15#ibcon#read 6, iclass 35, count 0 2006.229.11:30:09.15#ibcon#end of sib2, iclass 35, count 0 2006.229.11:30:09.15#ibcon#*after write, iclass 35, count 0 2006.229.11:30:09.15#ibcon#*before return 0, iclass 35, count 0 2006.229.11:30:09.15#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:09.15#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:09.15#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:30:09.15#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:30:09.15$vck44/va=7,5 2006.229.11:30:09.15#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.11:30:09.15#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.11:30:09.15#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:09.15#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:09.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:09.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:09.21#ibcon#enter wrdev, iclass 37, count 2 2006.229.11:30:09.21#ibcon#first serial, iclass 37, count 2 2006.229.11:30:09.21#ibcon#enter sib2, iclass 37, count 2 2006.229.11:30:09.21#ibcon#flushed, iclass 37, count 2 2006.229.11:30:09.21#ibcon#about to write, iclass 37, count 2 2006.229.11:30:09.21#ibcon#wrote, iclass 37, count 2 2006.229.11:30:09.21#ibcon#about to read 3, iclass 37, count 2 2006.229.11:30:09.23#ibcon#read 3, iclass 37, count 2 2006.229.11:30:09.23#ibcon#about to read 4, iclass 37, count 2 2006.229.11:30:09.23#ibcon#read 4, iclass 37, count 2 2006.229.11:30:09.23#ibcon#about to read 5, iclass 37, count 2 2006.229.11:30:09.23#ibcon#read 5, iclass 37, count 2 2006.229.11:30:09.23#ibcon#about to read 6, iclass 37, count 2 2006.229.11:30:09.23#ibcon#read 6, iclass 37, count 2 2006.229.11:30:09.23#ibcon#end of sib2, iclass 37, count 2 2006.229.11:30:09.23#ibcon#*mode == 0, iclass 37, count 2 2006.229.11:30:09.23#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.11:30:09.23#ibcon#[25=AT07-05\r\n] 2006.229.11:30:09.23#ibcon#*before write, iclass 37, count 2 2006.229.11:30:09.23#ibcon#enter sib2, iclass 37, count 2 2006.229.11:30:09.23#ibcon#flushed, iclass 37, count 2 2006.229.11:30:09.23#ibcon#about to write, iclass 37, count 2 2006.229.11:30:09.23#ibcon#wrote, iclass 37, count 2 2006.229.11:30:09.23#ibcon#about to read 3, iclass 37, count 2 2006.229.11:30:09.26#ibcon#read 3, iclass 37, count 2 2006.229.11:30:09.26#ibcon#about to read 4, iclass 37, count 2 2006.229.11:30:09.26#ibcon#read 4, iclass 37, count 2 2006.229.11:30:09.26#ibcon#about to read 5, iclass 37, count 2 2006.229.11:30:09.26#ibcon#read 5, iclass 37, count 2 2006.229.11:30:09.26#ibcon#about to read 6, iclass 37, count 2 2006.229.11:30:09.26#ibcon#read 6, iclass 37, count 2 2006.229.11:30:09.26#ibcon#end of sib2, iclass 37, count 2 2006.229.11:30:09.26#ibcon#*after write, iclass 37, count 2 2006.229.11:30:09.26#ibcon#*before return 0, iclass 37, count 2 2006.229.11:30:09.26#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:09.26#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:09.26#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.11:30:09.26#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:09.26#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:09.38#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:09.38#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:09.38#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:30:09.38#ibcon#first serial, iclass 37, count 0 2006.229.11:30:09.38#ibcon#enter sib2, iclass 37, count 0 2006.229.11:30:09.38#ibcon#flushed, iclass 37, count 0 2006.229.11:30:09.38#ibcon#about to write, iclass 37, count 0 2006.229.11:30:09.38#ibcon#wrote, iclass 37, count 0 2006.229.11:30:09.38#ibcon#about to read 3, iclass 37, count 0 2006.229.11:30:09.40#ibcon#read 3, iclass 37, count 0 2006.229.11:30:09.40#ibcon#about to read 4, iclass 37, count 0 2006.229.11:30:09.40#ibcon#read 4, iclass 37, count 0 2006.229.11:30:09.40#ibcon#about to read 5, iclass 37, count 0 2006.229.11:30:09.40#ibcon#read 5, iclass 37, count 0 2006.229.11:30:09.40#ibcon#about to read 6, iclass 37, count 0 2006.229.11:30:09.40#ibcon#read 6, iclass 37, count 0 2006.229.11:30:09.40#ibcon#end of sib2, iclass 37, count 0 2006.229.11:30:09.40#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:30:09.40#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:30:09.40#ibcon#[25=USB\r\n] 2006.229.11:30:09.40#ibcon#*before write, iclass 37, count 0 2006.229.11:30:09.40#ibcon#enter sib2, iclass 37, count 0 2006.229.11:30:09.40#ibcon#flushed, iclass 37, count 0 2006.229.11:30:09.40#ibcon#about to write, iclass 37, count 0 2006.229.11:30:09.40#ibcon#wrote, iclass 37, count 0 2006.229.11:30:09.40#ibcon#about to read 3, iclass 37, count 0 2006.229.11:30:09.43#ibcon#read 3, iclass 37, count 0 2006.229.11:30:09.43#ibcon#about to read 4, iclass 37, count 0 2006.229.11:30:09.43#ibcon#read 4, iclass 37, count 0 2006.229.11:30:09.43#ibcon#about to read 5, iclass 37, count 0 2006.229.11:30:09.43#ibcon#read 5, iclass 37, count 0 2006.229.11:30:09.43#ibcon#about to read 6, iclass 37, count 0 2006.229.11:30:09.43#ibcon#read 6, iclass 37, count 0 2006.229.11:30:09.43#ibcon#end of sib2, iclass 37, count 0 2006.229.11:30:09.43#ibcon#*after write, iclass 37, count 0 2006.229.11:30:09.43#ibcon#*before return 0, iclass 37, count 0 2006.229.11:30:09.43#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:09.43#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:09.43#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:30:09.43#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:30:09.43$vck44/valo=8,884.99 2006.229.11:30:09.43#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.11:30:09.43#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.11:30:09.43#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:09.43#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:09.43#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:09.43#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:09.43#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:30:09.43#ibcon#first serial, iclass 39, count 0 2006.229.11:30:09.43#ibcon#enter sib2, iclass 39, count 0 2006.229.11:30:09.43#ibcon#flushed, iclass 39, count 0 2006.229.11:30:09.43#ibcon#about to write, iclass 39, count 0 2006.229.11:30:09.43#ibcon#wrote, iclass 39, count 0 2006.229.11:30:09.43#ibcon#about to read 3, iclass 39, count 0 2006.229.11:30:09.45#ibcon#read 3, iclass 39, count 0 2006.229.11:30:09.45#ibcon#about to read 4, iclass 39, count 0 2006.229.11:30:09.45#ibcon#read 4, iclass 39, count 0 2006.229.11:30:09.45#ibcon#about to read 5, iclass 39, count 0 2006.229.11:30:09.45#ibcon#read 5, iclass 39, count 0 2006.229.11:30:09.45#ibcon#about to read 6, iclass 39, count 0 2006.229.11:30:09.45#ibcon#read 6, iclass 39, count 0 2006.229.11:30:09.45#ibcon#end of sib2, iclass 39, count 0 2006.229.11:30:09.45#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:30:09.45#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:30:09.45#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:30:09.45#ibcon#*before write, iclass 39, count 0 2006.229.11:30:09.45#ibcon#enter sib2, iclass 39, count 0 2006.229.11:30:09.45#ibcon#flushed, iclass 39, count 0 2006.229.11:30:09.45#ibcon#about to write, iclass 39, count 0 2006.229.11:30:09.45#ibcon#wrote, iclass 39, count 0 2006.229.11:30:09.45#ibcon#about to read 3, iclass 39, count 0 2006.229.11:30:09.49#ibcon#read 3, iclass 39, count 0 2006.229.11:30:09.49#ibcon#about to read 4, iclass 39, count 0 2006.229.11:30:09.49#ibcon#read 4, iclass 39, count 0 2006.229.11:30:09.49#ibcon#about to read 5, iclass 39, count 0 2006.229.11:30:09.49#ibcon#read 5, iclass 39, count 0 2006.229.11:30:09.49#ibcon#about to read 6, iclass 39, count 0 2006.229.11:30:09.49#ibcon#read 6, iclass 39, count 0 2006.229.11:30:09.49#ibcon#end of sib2, iclass 39, count 0 2006.229.11:30:09.49#ibcon#*after write, iclass 39, count 0 2006.229.11:30:09.49#ibcon#*before return 0, iclass 39, count 0 2006.229.11:30:09.49#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:09.49#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:09.49#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:30:09.49#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:30:09.49$vck44/va=8,6 2006.229.11:30:09.49#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.11:30:09.49#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.11:30:09.49#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:09.49#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:30:09.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:30:09.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:30:09.55#ibcon#enter wrdev, iclass 3, count 2 2006.229.11:30:09.55#ibcon#first serial, iclass 3, count 2 2006.229.11:30:09.55#ibcon#enter sib2, iclass 3, count 2 2006.229.11:30:09.55#ibcon#flushed, iclass 3, count 2 2006.229.11:30:09.55#ibcon#about to write, iclass 3, count 2 2006.229.11:30:09.55#ibcon#wrote, iclass 3, count 2 2006.229.11:30:09.55#ibcon#about to read 3, iclass 3, count 2 2006.229.11:30:09.57#ibcon#read 3, iclass 3, count 2 2006.229.11:30:09.57#ibcon#about to read 4, iclass 3, count 2 2006.229.11:30:09.57#ibcon#read 4, iclass 3, count 2 2006.229.11:30:09.57#ibcon#about to read 5, iclass 3, count 2 2006.229.11:30:09.57#ibcon#read 5, iclass 3, count 2 2006.229.11:30:09.57#ibcon#about to read 6, iclass 3, count 2 2006.229.11:30:09.57#ibcon#read 6, iclass 3, count 2 2006.229.11:30:09.57#ibcon#end of sib2, iclass 3, count 2 2006.229.11:30:09.57#ibcon#*mode == 0, iclass 3, count 2 2006.229.11:30:09.57#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.11:30:09.57#ibcon#[25=AT08-06\r\n] 2006.229.11:30:09.57#ibcon#*before write, iclass 3, count 2 2006.229.11:30:09.57#ibcon#enter sib2, iclass 3, count 2 2006.229.11:30:09.57#ibcon#flushed, iclass 3, count 2 2006.229.11:30:09.57#ibcon#about to write, iclass 3, count 2 2006.229.11:30:09.57#ibcon#wrote, iclass 3, count 2 2006.229.11:30:09.57#ibcon#about to read 3, iclass 3, count 2 2006.229.11:30:09.60#ibcon#read 3, iclass 3, count 2 2006.229.11:30:09.60#ibcon#about to read 4, iclass 3, count 2 2006.229.11:30:09.60#ibcon#read 4, iclass 3, count 2 2006.229.11:30:09.60#ibcon#about to read 5, iclass 3, count 2 2006.229.11:30:09.60#ibcon#read 5, iclass 3, count 2 2006.229.11:30:09.60#ibcon#about to read 6, iclass 3, count 2 2006.229.11:30:09.60#ibcon#read 6, iclass 3, count 2 2006.229.11:30:09.60#ibcon#end of sib2, iclass 3, count 2 2006.229.11:30:09.60#ibcon#*after write, iclass 3, count 2 2006.229.11:30:09.60#ibcon#*before return 0, iclass 3, count 2 2006.229.11:30:09.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:30:09.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:30:09.60#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.11:30:09.60#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:09.60#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:30:09.72#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:30:09.72#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:30:09.72#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:30:09.72#ibcon#first serial, iclass 3, count 0 2006.229.11:30:09.72#ibcon#enter sib2, iclass 3, count 0 2006.229.11:30:09.72#ibcon#flushed, iclass 3, count 0 2006.229.11:30:09.72#ibcon#about to write, iclass 3, count 0 2006.229.11:30:09.72#ibcon#wrote, iclass 3, count 0 2006.229.11:30:09.72#ibcon#about to read 3, iclass 3, count 0 2006.229.11:30:09.74#ibcon#read 3, iclass 3, count 0 2006.229.11:30:09.74#ibcon#about to read 4, iclass 3, count 0 2006.229.11:30:09.74#ibcon#read 4, iclass 3, count 0 2006.229.11:30:09.74#ibcon#about to read 5, iclass 3, count 0 2006.229.11:30:09.74#ibcon#read 5, iclass 3, count 0 2006.229.11:30:09.74#ibcon#about to read 6, iclass 3, count 0 2006.229.11:30:09.74#ibcon#read 6, iclass 3, count 0 2006.229.11:30:09.74#ibcon#end of sib2, iclass 3, count 0 2006.229.11:30:09.74#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:30:09.74#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:30:09.74#ibcon#[25=USB\r\n] 2006.229.11:30:09.74#ibcon#*before write, iclass 3, count 0 2006.229.11:30:09.74#ibcon#enter sib2, iclass 3, count 0 2006.229.11:30:09.74#ibcon#flushed, iclass 3, count 0 2006.229.11:30:09.74#ibcon#about to write, iclass 3, count 0 2006.229.11:30:09.74#ibcon#wrote, iclass 3, count 0 2006.229.11:30:09.74#ibcon#about to read 3, iclass 3, count 0 2006.229.11:30:09.77#ibcon#read 3, iclass 3, count 0 2006.229.11:30:09.77#ibcon#about to read 4, iclass 3, count 0 2006.229.11:30:09.77#ibcon#read 4, iclass 3, count 0 2006.229.11:30:09.77#ibcon#about to read 5, iclass 3, count 0 2006.229.11:30:09.77#ibcon#read 5, iclass 3, count 0 2006.229.11:30:09.77#ibcon#about to read 6, iclass 3, count 0 2006.229.11:30:09.77#ibcon#read 6, iclass 3, count 0 2006.229.11:30:09.77#ibcon#end of sib2, iclass 3, count 0 2006.229.11:30:09.77#ibcon#*after write, iclass 3, count 0 2006.229.11:30:09.77#ibcon#*before return 0, iclass 3, count 0 2006.229.11:30:09.77#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:30:09.77#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:30:09.77#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:30:09.77#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:30:09.77$vck44/vblo=1,629.99 2006.229.11:30:09.77#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.11:30:09.77#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.11:30:09.77#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:09.77#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:09.77#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:09.77#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:09.77#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:30:09.77#ibcon#first serial, iclass 5, count 0 2006.229.11:30:09.77#ibcon#enter sib2, iclass 5, count 0 2006.229.11:30:09.77#ibcon#flushed, iclass 5, count 0 2006.229.11:30:09.77#ibcon#about to write, iclass 5, count 0 2006.229.11:30:09.77#ibcon#wrote, iclass 5, count 0 2006.229.11:30:09.77#ibcon#about to read 3, iclass 5, count 0 2006.229.11:30:09.79#ibcon#read 3, iclass 5, count 0 2006.229.11:30:09.79#ibcon#about to read 4, iclass 5, count 0 2006.229.11:30:09.79#ibcon#read 4, iclass 5, count 0 2006.229.11:30:09.79#ibcon#about to read 5, iclass 5, count 0 2006.229.11:30:09.79#ibcon#read 5, iclass 5, count 0 2006.229.11:30:09.79#ibcon#about to read 6, iclass 5, count 0 2006.229.11:30:09.79#ibcon#read 6, iclass 5, count 0 2006.229.11:30:09.79#ibcon#end of sib2, iclass 5, count 0 2006.229.11:30:09.79#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:30:09.79#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:30:09.79#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:30:09.79#ibcon#*before write, iclass 5, count 0 2006.229.11:30:09.79#ibcon#enter sib2, iclass 5, count 0 2006.229.11:30:09.79#ibcon#flushed, iclass 5, count 0 2006.229.11:30:09.79#ibcon#about to write, iclass 5, count 0 2006.229.11:30:09.79#ibcon#wrote, iclass 5, count 0 2006.229.11:30:09.79#ibcon#about to read 3, iclass 5, count 0 2006.229.11:30:09.83#ibcon#read 3, iclass 5, count 0 2006.229.11:30:09.83#ibcon#about to read 4, iclass 5, count 0 2006.229.11:30:09.83#ibcon#read 4, iclass 5, count 0 2006.229.11:30:09.83#ibcon#about to read 5, iclass 5, count 0 2006.229.11:30:09.83#ibcon#read 5, iclass 5, count 0 2006.229.11:30:09.83#ibcon#about to read 6, iclass 5, count 0 2006.229.11:30:09.83#ibcon#read 6, iclass 5, count 0 2006.229.11:30:09.83#ibcon#end of sib2, iclass 5, count 0 2006.229.11:30:09.83#ibcon#*after write, iclass 5, count 0 2006.229.11:30:09.83#ibcon#*before return 0, iclass 5, count 0 2006.229.11:30:09.83#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:09.83#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:30:09.83#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:30:09.83#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:30:09.83$vck44/vb=1,4 2006.229.11:30:09.83#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.11:30:09.83#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.11:30:09.83#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:09.83#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:09.83#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:09.83#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:09.83#ibcon#enter wrdev, iclass 7, count 2 2006.229.11:30:09.83#ibcon#first serial, iclass 7, count 2 2006.229.11:30:09.83#ibcon#enter sib2, iclass 7, count 2 2006.229.11:30:09.83#ibcon#flushed, iclass 7, count 2 2006.229.11:30:09.83#ibcon#about to write, iclass 7, count 2 2006.229.11:30:09.83#ibcon#wrote, iclass 7, count 2 2006.229.11:30:09.83#ibcon#about to read 3, iclass 7, count 2 2006.229.11:30:09.85#ibcon#read 3, iclass 7, count 2 2006.229.11:30:09.85#ibcon#about to read 4, iclass 7, count 2 2006.229.11:30:09.85#ibcon#read 4, iclass 7, count 2 2006.229.11:30:09.85#ibcon#about to read 5, iclass 7, count 2 2006.229.11:30:09.85#ibcon#read 5, iclass 7, count 2 2006.229.11:30:09.85#ibcon#about to read 6, iclass 7, count 2 2006.229.11:30:09.85#ibcon#read 6, iclass 7, count 2 2006.229.11:30:09.85#ibcon#end of sib2, iclass 7, count 2 2006.229.11:30:09.85#ibcon#*mode == 0, iclass 7, count 2 2006.229.11:30:09.85#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.11:30:09.85#ibcon#[27=AT01-04\r\n] 2006.229.11:30:09.85#ibcon#*before write, iclass 7, count 2 2006.229.11:30:09.85#ibcon#enter sib2, iclass 7, count 2 2006.229.11:30:09.85#ibcon#flushed, iclass 7, count 2 2006.229.11:30:09.85#ibcon#about to write, iclass 7, count 2 2006.229.11:30:09.85#ibcon#wrote, iclass 7, count 2 2006.229.11:30:09.85#ibcon#about to read 3, iclass 7, count 2 2006.229.11:30:09.88#ibcon#read 3, iclass 7, count 2 2006.229.11:30:09.88#ibcon#about to read 4, iclass 7, count 2 2006.229.11:30:09.88#ibcon#read 4, iclass 7, count 2 2006.229.11:30:09.88#ibcon#about to read 5, iclass 7, count 2 2006.229.11:30:09.88#ibcon#read 5, iclass 7, count 2 2006.229.11:30:09.88#ibcon#about to read 6, iclass 7, count 2 2006.229.11:30:09.88#ibcon#read 6, iclass 7, count 2 2006.229.11:30:09.88#ibcon#end of sib2, iclass 7, count 2 2006.229.11:30:09.88#ibcon#*after write, iclass 7, count 2 2006.229.11:30:09.88#ibcon#*before return 0, iclass 7, count 2 2006.229.11:30:09.88#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:09.88#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:30:09.88#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.11:30:09.88#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:09.88#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:10.00#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:10.00#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:10.00#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:30:10.00#ibcon#first serial, iclass 7, count 0 2006.229.11:30:10.00#ibcon#enter sib2, iclass 7, count 0 2006.229.11:30:10.00#ibcon#flushed, iclass 7, count 0 2006.229.11:30:10.00#ibcon#about to write, iclass 7, count 0 2006.229.11:30:10.00#ibcon#wrote, iclass 7, count 0 2006.229.11:30:10.00#ibcon#about to read 3, iclass 7, count 0 2006.229.11:30:10.02#ibcon#read 3, iclass 7, count 0 2006.229.11:30:10.02#ibcon#about to read 4, iclass 7, count 0 2006.229.11:30:10.02#ibcon#read 4, iclass 7, count 0 2006.229.11:30:10.02#ibcon#about to read 5, iclass 7, count 0 2006.229.11:30:10.02#ibcon#read 5, iclass 7, count 0 2006.229.11:30:10.02#ibcon#about to read 6, iclass 7, count 0 2006.229.11:30:10.02#ibcon#read 6, iclass 7, count 0 2006.229.11:30:10.02#ibcon#end of sib2, iclass 7, count 0 2006.229.11:30:10.02#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:30:10.02#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:30:10.02#ibcon#[27=USB\r\n] 2006.229.11:30:10.02#ibcon#*before write, iclass 7, count 0 2006.229.11:30:10.02#ibcon#enter sib2, iclass 7, count 0 2006.229.11:30:10.02#ibcon#flushed, iclass 7, count 0 2006.229.11:30:10.02#ibcon#about to write, iclass 7, count 0 2006.229.11:30:10.02#ibcon#wrote, iclass 7, count 0 2006.229.11:30:10.02#ibcon#about to read 3, iclass 7, count 0 2006.229.11:30:10.05#ibcon#read 3, iclass 7, count 0 2006.229.11:30:10.05#ibcon#about to read 4, iclass 7, count 0 2006.229.11:30:10.05#ibcon#read 4, iclass 7, count 0 2006.229.11:30:10.05#ibcon#about to read 5, iclass 7, count 0 2006.229.11:30:10.05#ibcon#read 5, iclass 7, count 0 2006.229.11:30:10.05#ibcon#about to read 6, iclass 7, count 0 2006.229.11:30:10.05#ibcon#read 6, iclass 7, count 0 2006.229.11:30:10.05#ibcon#end of sib2, iclass 7, count 0 2006.229.11:30:10.05#ibcon#*after write, iclass 7, count 0 2006.229.11:30:10.05#ibcon#*before return 0, iclass 7, count 0 2006.229.11:30:10.05#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:10.05#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:30:10.05#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:30:10.05#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:30:10.05$vck44/vblo=2,634.99 2006.229.11:30:10.05#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.11:30:10.05#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.11:30:10.05#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:10.05#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:10.05#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:10.05#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:10.05#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:30:10.05#ibcon#first serial, iclass 11, count 0 2006.229.11:30:10.05#ibcon#enter sib2, iclass 11, count 0 2006.229.11:30:10.05#ibcon#flushed, iclass 11, count 0 2006.229.11:30:10.05#ibcon#about to write, iclass 11, count 0 2006.229.11:30:10.05#ibcon#wrote, iclass 11, count 0 2006.229.11:30:10.05#ibcon#about to read 3, iclass 11, count 0 2006.229.11:30:10.07#ibcon#read 3, iclass 11, count 0 2006.229.11:30:10.07#ibcon#about to read 4, iclass 11, count 0 2006.229.11:30:10.07#ibcon#read 4, iclass 11, count 0 2006.229.11:30:10.07#ibcon#about to read 5, iclass 11, count 0 2006.229.11:30:10.07#ibcon#read 5, iclass 11, count 0 2006.229.11:30:10.07#ibcon#about to read 6, iclass 11, count 0 2006.229.11:30:10.07#ibcon#read 6, iclass 11, count 0 2006.229.11:30:10.07#ibcon#end of sib2, iclass 11, count 0 2006.229.11:30:10.07#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:30:10.07#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:30:10.07#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:30:10.07#ibcon#*before write, iclass 11, count 0 2006.229.11:30:10.07#ibcon#enter sib2, iclass 11, count 0 2006.229.11:30:10.07#ibcon#flushed, iclass 11, count 0 2006.229.11:30:10.07#ibcon#about to write, iclass 11, count 0 2006.229.11:30:10.07#ibcon#wrote, iclass 11, count 0 2006.229.11:30:10.07#ibcon#about to read 3, iclass 11, count 0 2006.229.11:30:10.11#ibcon#read 3, iclass 11, count 0 2006.229.11:30:10.11#ibcon#about to read 4, iclass 11, count 0 2006.229.11:30:10.11#ibcon#read 4, iclass 11, count 0 2006.229.11:30:10.11#ibcon#about to read 5, iclass 11, count 0 2006.229.11:30:10.11#ibcon#read 5, iclass 11, count 0 2006.229.11:30:10.11#ibcon#about to read 6, iclass 11, count 0 2006.229.11:30:10.11#ibcon#read 6, iclass 11, count 0 2006.229.11:30:10.11#ibcon#end of sib2, iclass 11, count 0 2006.229.11:30:10.11#ibcon#*after write, iclass 11, count 0 2006.229.11:30:10.11#ibcon#*before return 0, iclass 11, count 0 2006.229.11:30:10.11#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:10.11#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:30:10.11#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:30:10.11#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:30:10.11$vck44/vb=2,4 2006.229.11:30:10.11#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.11:30:10.11#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.11:30:10.11#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:10.11#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:10.17#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:10.17#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:10.17#ibcon#enter wrdev, iclass 13, count 2 2006.229.11:30:10.17#ibcon#first serial, iclass 13, count 2 2006.229.11:30:10.17#ibcon#enter sib2, iclass 13, count 2 2006.229.11:30:10.17#ibcon#flushed, iclass 13, count 2 2006.229.11:30:10.17#ibcon#about to write, iclass 13, count 2 2006.229.11:30:10.17#ibcon#wrote, iclass 13, count 2 2006.229.11:30:10.17#ibcon#about to read 3, iclass 13, count 2 2006.229.11:30:10.19#ibcon#read 3, iclass 13, count 2 2006.229.11:30:10.19#ibcon#about to read 4, iclass 13, count 2 2006.229.11:30:10.19#ibcon#read 4, iclass 13, count 2 2006.229.11:30:10.19#ibcon#about to read 5, iclass 13, count 2 2006.229.11:30:10.19#ibcon#read 5, iclass 13, count 2 2006.229.11:30:10.19#ibcon#about to read 6, iclass 13, count 2 2006.229.11:30:10.19#ibcon#read 6, iclass 13, count 2 2006.229.11:30:10.19#ibcon#end of sib2, iclass 13, count 2 2006.229.11:30:10.19#ibcon#*mode == 0, iclass 13, count 2 2006.229.11:30:10.19#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.11:30:10.19#ibcon#[27=AT02-04\r\n] 2006.229.11:30:10.19#ibcon#*before write, iclass 13, count 2 2006.229.11:30:10.19#ibcon#enter sib2, iclass 13, count 2 2006.229.11:30:10.19#ibcon#flushed, iclass 13, count 2 2006.229.11:30:10.19#ibcon#about to write, iclass 13, count 2 2006.229.11:30:10.19#ibcon#wrote, iclass 13, count 2 2006.229.11:30:10.19#ibcon#about to read 3, iclass 13, count 2 2006.229.11:30:10.22#ibcon#read 3, iclass 13, count 2 2006.229.11:30:10.22#ibcon#about to read 4, iclass 13, count 2 2006.229.11:30:10.22#ibcon#read 4, iclass 13, count 2 2006.229.11:30:10.22#ibcon#about to read 5, iclass 13, count 2 2006.229.11:30:10.22#ibcon#read 5, iclass 13, count 2 2006.229.11:30:10.22#ibcon#about to read 6, iclass 13, count 2 2006.229.11:30:10.22#ibcon#read 6, iclass 13, count 2 2006.229.11:30:10.22#ibcon#end of sib2, iclass 13, count 2 2006.229.11:30:10.22#ibcon#*after write, iclass 13, count 2 2006.229.11:30:10.22#ibcon#*before return 0, iclass 13, count 2 2006.229.11:30:10.22#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:10.22#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:30:10.22#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.11:30:10.22#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:10.22#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:10.34#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:10.34#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:10.34#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:30:10.34#ibcon#first serial, iclass 13, count 0 2006.229.11:30:10.34#ibcon#enter sib2, iclass 13, count 0 2006.229.11:30:10.34#ibcon#flushed, iclass 13, count 0 2006.229.11:30:10.34#ibcon#about to write, iclass 13, count 0 2006.229.11:30:10.34#ibcon#wrote, iclass 13, count 0 2006.229.11:30:10.34#ibcon#about to read 3, iclass 13, count 0 2006.229.11:30:10.36#ibcon#read 3, iclass 13, count 0 2006.229.11:30:10.36#ibcon#about to read 4, iclass 13, count 0 2006.229.11:30:10.36#ibcon#read 4, iclass 13, count 0 2006.229.11:30:10.36#ibcon#about to read 5, iclass 13, count 0 2006.229.11:30:10.36#ibcon#read 5, iclass 13, count 0 2006.229.11:30:10.36#ibcon#about to read 6, iclass 13, count 0 2006.229.11:30:10.36#ibcon#read 6, iclass 13, count 0 2006.229.11:30:10.36#ibcon#end of sib2, iclass 13, count 0 2006.229.11:30:10.36#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:30:10.36#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:30:10.36#ibcon#[27=USB\r\n] 2006.229.11:30:10.36#ibcon#*before write, iclass 13, count 0 2006.229.11:30:10.36#ibcon#enter sib2, iclass 13, count 0 2006.229.11:30:10.36#ibcon#flushed, iclass 13, count 0 2006.229.11:30:10.36#ibcon#about to write, iclass 13, count 0 2006.229.11:30:10.36#ibcon#wrote, iclass 13, count 0 2006.229.11:30:10.36#ibcon#about to read 3, iclass 13, count 0 2006.229.11:30:10.39#ibcon#read 3, iclass 13, count 0 2006.229.11:30:10.39#ibcon#about to read 4, iclass 13, count 0 2006.229.11:30:10.39#ibcon#read 4, iclass 13, count 0 2006.229.11:30:10.39#ibcon#about to read 5, iclass 13, count 0 2006.229.11:30:10.39#ibcon#read 5, iclass 13, count 0 2006.229.11:30:10.39#ibcon#about to read 6, iclass 13, count 0 2006.229.11:30:10.39#ibcon#read 6, iclass 13, count 0 2006.229.11:30:10.39#ibcon#end of sib2, iclass 13, count 0 2006.229.11:30:10.39#ibcon#*after write, iclass 13, count 0 2006.229.11:30:10.39#ibcon#*before return 0, iclass 13, count 0 2006.229.11:30:10.39#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:10.39#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:30:10.39#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:30:10.39#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:30:10.39$vck44/vblo=3,649.99 2006.229.11:30:10.39#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.11:30:10.39#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.11:30:10.39#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:10.39#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:30:10.39#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:30:10.39#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:30:10.39#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:30:10.39#ibcon#first serial, iclass 15, count 0 2006.229.11:30:10.39#ibcon#enter sib2, iclass 15, count 0 2006.229.11:30:10.39#ibcon#flushed, iclass 15, count 0 2006.229.11:30:10.39#ibcon#about to write, iclass 15, count 0 2006.229.11:30:10.39#ibcon#wrote, iclass 15, count 0 2006.229.11:30:10.39#ibcon#about to read 3, iclass 15, count 0 2006.229.11:30:10.41#ibcon#read 3, iclass 15, count 0 2006.229.11:30:10.41#ibcon#about to read 4, iclass 15, count 0 2006.229.11:30:10.41#ibcon#read 4, iclass 15, count 0 2006.229.11:30:10.41#ibcon#about to read 5, iclass 15, count 0 2006.229.11:30:10.41#ibcon#read 5, iclass 15, count 0 2006.229.11:30:10.41#ibcon#about to read 6, iclass 15, count 0 2006.229.11:30:10.41#ibcon#read 6, iclass 15, count 0 2006.229.11:30:10.41#ibcon#end of sib2, iclass 15, count 0 2006.229.11:30:10.41#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:30:10.41#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:30:10.41#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:30:10.41#ibcon#*before write, iclass 15, count 0 2006.229.11:30:10.41#ibcon#enter sib2, iclass 15, count 0 2006.229.11:30:10.41#ibcon#flushed, iclass 15, count 0 2006.229.11:30:10.41#ibcon#about to write, iclass 15, count 0 2006.229.11:30:10.41#ibcon#wrote, iclass 15, count 0 2006.229.11:30:10.41#ibcon#about to read 3, iclass 15, count 0 2006.229.11:30:10.45#ibcon#read 3, iclass 15, count 0 2006.229.11:30:10.45#ibcon#about to read 4, iclass 15, count 0 2006.229.11:30:10.45#ibcon#read 4, iclass 15, count 0 2006.229.11:30:10.45#ibcon#about to read 5, iclass 15, count 0 2006.229.11:30:10.45#ibcon#read 5, iclass 15, count 0 2006.229.11:30:10.45#ibcon#about to read 6, iclass 15, count 0 2006.229.11:30:10.45#ibcon#read 6, iclass 15, count 0 2006.229.11:30:10.45#ibcon#end of sib2, iclass 15, count 0 2006.229.11:30:10.45#ibcon#*after write, iclass 15, count 0 2006.229.11:30:10.45#ibcon#*before return 0, iclass 15, count 0 2006.229.11:30:10.45#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:30:10.45#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:30:10.45#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:30:10.45#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:30:10.45$vck44/vb=3,4 2006.229.11:30:10.45#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.11:30:10.45#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.11:30:10.45#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:10.45#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:30:10.51#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:30:10.51#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:30:10.51#ibcon#enter wrdev, iclass 17, count 2 2006.229.11:30:10.51#ibcon#first serial, iclass 17, count 2 2006.229.11:30:10.51#ibcon#enter sib2, iclass 17, count 2 2006.229.11:30:10.51#ibcon#flushed, iclass 17, count 2 2006.229.11:30:10.51#ibcon#about to write, iclass 17, count 2 2006.229.11:30:10.51#ibcon#wrote, iclass 17, count 2 2006.229.11:30:10.51#ibcon#about to read 3, iclass 17, count 2 2006.229.11:30:10.53#ibcon#read 3, iclass 17, count 2 2006.229.11:30:10.53#ibcon#about to read 4, iclass 17, count 2 2006.229.11:30:10.53#ibcon#read 4, iclass 17, count 2 2006.229.11:30:10.53#ibcon#about to read 5, iclass 17, count 2 2006.229.11:30:10.53#ibcon#read 5, iclass 17, count 2 2006.229.11:30:10.53#ibcon#about to read 6, iclass 17, count 2 2006.229.11:30:10.53#ibcon#read 6, iclass 17, count 2 2006.229.11:30:10.53#ibcon#end of sib2, iclass 17, count 2 2006.229.11:30:10.53#ibcon#*mode == 0, iclass 17, count 2 2006.229.11:30:10.53#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.11:30:10.53#ibcon#[27=AT03-04\r\n] 2006.229.11:30:10.53#ibcon#*before write, iclass 17, count 2 2006.229.11:30:10.53#ibcon#enter sib2, iclass 17, count 2 2006.229.11:30:10.53#ibcon#flushed, iclass 17, count 2 2006.229.11:30:10.53#ibcon#about to write, iclass 17, count 2 2006.229.11:30:10.53#ibcon#wrote, iclass 17, count 2 2006.229.11:30:10.53#ibcon#about to read 3, iclass 17, count 2 2006.229.11:30:10.56#ibcon#read 3, iclass 17, count 2 2006.229.11:30:10.56#ibcon#about to read 4, iclass 17, count 2 2006.229.11:30:10.56#ibcon#read 4, iclass 17, count 2 2006.229.11:30:10.56#ibcon#about to read 5, iclass 17, count 2 2006.229.11:30:10.56#ibcon#read 5, iclass 17, count 2 2006.229.11:30:10.56#ibcon#about to read 6, iclass 17, count 2 2006.229.11:30:10.56#ibcon#read 6, iclass 17, count 2 2006.229.11:30:10.56#ibcon#end of sib2, iclass 17, count 2 2006.229.11:30:10.56#ibcon#*after write, iclass 17, count 2 2006.229.11:30:10.56#ibcon#*before return 0, iclass 17, count 2 2006.229.11:30:10.56#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:30:10.56#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:30:10.56#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.11:30:10.56#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:10.56#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:30:10.68#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:30:10.68#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:30:10.68#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:30:10.68#ibcon#first serial, iclass 17, count 0 2006.229.11:30:10.68#ibcon#enter sib2, iclass 17, count 0 2006.229.11:30:10.68#ibcon#flushed, iclass 17, count 0 2006.229.11:30:10.68#ibcon#about to write, iclass 17, count 0 2006.229.11:30:10.68#ibcon#wrote, iclass 17, count 0 2006.229.11:30:10.68#ibcon#about to read 3, iclass 17, count 0 2006.229.11:30:10.70#ibcon#read 3, iclass 17, count 0 2006.229.11:30:10.70#ibcon#about to read 4, iclass 17, count 0 2006.229.11:30:10.70#ibcon#read 4, iclass 17, count 0 2006.229.11:30:10.70#ibcon#about to read 5, iclass 17, count 0 2006.229.11:30:10.70#ibcon#read 5, iclass 17, count 0 2006.229.11:30:10.70#ibcon#about to read 6, iclass 17, count 0 2006.229.11:30:10.70#ibcon#read 6, iclass 17, count 0 2006.229.11:30:10.70#ibcon#end of sib2, iclass 17, count 0 2006.229.11:30:10.70#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:30:10.70#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:30:10.70#ibcon#[27=USB\r\n] 2006.229.11:30:10.70#ibcon#*before write, iclass 17, count 0 2006.229.11:30:10.70#ibcon#enter sib2, iclass 17, count 0 2006.229.11:30:10.70#ibcon#flushed, iclass 17, count 0 2006.229.11:30:10.70#ibcon#about to write, iclass 17, count 0 2006.229.11:30:10.70#ibcon#wrote, iclass 17, count 0 2006.229.11:30:10.70#ibcon#about to read 3, iclass 17, count 0 2006.229.11:30:10.73#ibcon#read 3, iclass 17, count 0 2006.229.11:30:10.73#ibcon#about to read 4, iclass 17, count 0 2006.229.11:30:10.73#ibcon#read 4, iclass 17, count 0 2006.229.11:30:10.73#ibcon#about to read 5, iclass 17, count 0 2006.229.11:30:10.73#ibcon#read 5, iclass 17, count 0 2006.229.11:30:10.73#ibcon#about to read 6, iclass 17, count 0 2006.229.11:30:10.73#ibcon#read 6, iclass 17, count 0 2006.229.11:30:10.73#ibcon#end of sib2, iclass 17, count 0 2006.229.11:30:10.73#ibcon#*after write, iclass 17, count 0 2006.229.11:30:10.73#ibcon#*before return 0, iclass 17, count 0 2006.229.11:30:10.73#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:30:10.73#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:30:10.73#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:30:10.73#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:30:10.73$vck44/vblo=4,679.99 2006.229.11:30:10.73#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.11:30:10.73#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.11:30:10.73#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:10.73#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:10.73#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:10.73#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:10.73#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:30:10.73#ibcon#first serial, iclass 19, count 0 2006.229.11:30:10.73#ibcon#enter sib2, iclass 19, count 0 2006.229.11:30:10.73#ibcon#flushed, iclass 19, count 0 2006.229.11:30:10.73#ibcon#about to write, iclass 19, count 0 2006.229.11:30:10.73#ibcon#wrote, iclass 19, count 0 2006.229.11:30:10.73#ibcon#about to read 3, iclass 19, count 0 2006.229.11:30:10.75#ibcon#read 3, iclass 19, count 0 2006.229.11:30:10.75#ibcon#about to read 4, iclass 19, count 0 2006.229.11:30:10.75#ibcon#read 4, iclass 19, count 0 2006.229.11:30:10.75#ibcon#about to read 5, iclass 19, count 0 2006.229.11:30:10.75#ibcon#read 5, iclass 19, count 0 2006.229.11:30:10.75#ibcon#about to read 6, iclass 19, count 0 2006.229.11:30:10.75#ibcon#read 6, iclass 19, count 0 2006.229.11:30:10.75#ibcon#end of sib2, iclass 19, count 0 2006.229.11:30:10.75#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:30:10.75#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:30:10.75#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:30:10.75#ibcon#*before write, iclass 19, count 0 2006.229.11:30:10.75#ibcon#enter sib2, iclass 19, count 0 2006.229.11:30:10.75#ibcon#flushed, iclass 19, count 0 2006.229.11:30:10.75#ibcon#about to write, iclass 19, count 0 2006.229.11:30:10.75#ibcon#wrote, iclass 19, count 0 2006.229.11:30:10.75#ibcon#about to read 3, iclass 19, count 0 2006.229.11:30:10.79#ibcon#read 3, iclass 19, count 0 2006.229.11:30:10.79#ibcon#about to read 4, iclass 19, count 0 2006.229.11:30:10.79#ibcon#read 4, iclass 19, count 0 2006.229.11:30:10.79#ibcon#about to read 5, iclass 19, count 0 2006.229.11:30:10.79#ibcon#read 5, iclass 19, count 0 2006.229.11:30:10.79#ibcon#about to read 6, iclass 19, count 0 2006.229.11:30:10.79#ibcon#read 6, iclass 19, count 0 2006.229.11:30:10.79#ibcon#end of sib2, iclass 19, count 0 2006.229.11:30:10.79#ibcon#*after write, iclass 19, count 0 2006.229.11:30:10.79#ibcon#*before return 0, iclass 19, count 0 2006.229.11:30:10.79#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:10.79#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:30:10.79#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:30:10.79#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:30:10.79$vck44/vb=4,4 2006.229.11:30:10.79#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.11:30:10.79#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.11:30:10.79#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:10.79#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:10.85#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:10.85#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:10.85#ibcon#enter wrdev, iclass 21, count 2 2006.229.11:30:10.85#ibcon#first serial, iclass 21, count 2 2006.229.11:30:10.85#ibcon#enter sib2, iclass 21, count 2 2006.229.11:30:10.85#ibcon#flushed, iclass 21, count 2 2006.229.11:30:10.85#ibcon#about to write, iclass 21, count 2 2006.229.11:30:10.85#ibcon#wrote, iclass 21, count 2 2006.229.11:30:10.85#ibcon#about to read 3, iclass 21, count 2 2006.229.11:30:10.87#ibcon#read 3, iclass 21, count 2 2006.229.11:30:10.87#ibcon#about to read 4, iclass 21, count 2 2006.229.11:30:10.87#ibcon#read 4, iclass 21, count 2 2006.229.11:30:10.87#ibcon#about to read 5, iclass 21, count 2 2006.229.11:30:10.87#ibcon#read 5, iclass 21, count 2 2006.229.11:30:10.87#ibcon#about to read 6, iclass 21, count 2 2006.229.11:30:10.87#ibcon#read 6, iclass 21, count 2 2006.229.11:30:10.87#ibcon#end of sib2, iclass 21, count 2 2006.229.11:30:10.87#ibcon#*mode == 0, iclass 21, count 2 2006.229.11:30:10.87#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.11:30:10.87#ibcon#[27=AT04-04\r\n] 2006.229.11:30:10.87#ibcon#*before write, iclass 21, count 2 2006.229.11:30:10.87#ibcon#enter sib2, iclass 21, count 2 2006.229.11:30:10.87#ibcon#flushed, iclass 21, count 2 2006.229.11:30:10.87#ibcon#about to write, iclass 21, count 2 2006.229.11:30:10.87#ibcon#wrote, iclass 21, count 2 2006.229.11:30:10.87#ibcon#about to read 3, iclass 21, count 2 2006.229.11:30:10.90#ibcon#read 3, iclass 21, count 2 2006.229.11:30:10.90#ibcon#about to read 4, iclass 21, count 2 2006.229.11:30:10.90#ibcon#read 4, iclass 21, count 2 2006.229.11:30:10.90#ibcon#about to read 5, iclass 21, count 2 2006.229.11:30:10.90#ibcon#read 5, iclass 21, count 2 2006.229.11:30:10.90#ibcon#about to read 6, iclass 21, count 2 2006.229.11:30:10.90#ibcon#read 6, iclass 21, count 2 2006.229.11:30:10.90#ibcon#end of sib2, iclass 21, count 2 2006.229.11:30:10.90#ibcon#*after write, iclass 21, count 2 2006.229.11:30:10.90#ibcon#*before return 0, iclass 21, count 2 2006.229.11:30:10.90#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:10.90#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:30:10.90#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.11:30:10.90#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:10.90#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:11.02#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:11.02#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:11.02#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:30:11.02#ibcon#first serial, iclass 21, count 0 2006.229.11:30:11.02#ibcon#enter sib2, iclass 21, count 0 2006.229.11:30:11.02#ibcon#flushed, iclass 21, count 0 2006.229.11:30:11.02#ibcon#about to write, iclass 21, count 0 2006.229.11:30:11.02#ibcon#wrote, iclass 21, count 0 2006.229.11:30:11.02#ibcon#about to read 3, iclass 21, count 0 2006.229.11:30:11.04#ibcon#read 3, iclass 21, count 0 2006.229.11:30:11.04#ibcon#about to read 4, iclass 21, count 0 2006.229.11:30:11.04#ibcon#read 4, iclass 21, count 0 2006.229.11:30:11.04#ibcon#about to read 5, iclass 21, count 0 2006.229.11:30:11.04#ibcon#read 5, iclass 21, count 0 2006.229.11:30:11.04#ibcon#about to read 6, iclass 21, count 0 2006.229.11:30:11.04#ibcon#read 6, iclass 21, count 0 2006.229.11:30:11.04#ibcon#end of sib2, iclass 21, count 0 2006.229.11:30:11.04#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:30:11.04#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:30:11.04#ibcon#[27=USB\r\n] 2006.229.11:30:11.04#ibcon#*before write, iclass 21, count 0 2006.229.11:30:11.04#ibcon#enter sib2, iclass 21, count 0 2006.229.11:30:11.04#ibcon#flushed, iclass 21, count 0 2006.229.11:30:11.04#ibcon#about to write, iclass 21, count 0 2006.229.11:30:11.04#ibcon#wrote, iclass 21, count 0 2006.229.11:30:11.04#ibcon#about to read 3, iclass 21, count 0 2006.229.11:30:11.07#ibcon#read 3, iclass 21, count 0 2006.229.11:30:11.07#ibcon#about to read 4, iclass 21, count 0 2006.229.11:30:11.07#ibcon#read 4, iclass 21, count 0 2006.229.11:30:11.07#ibcon#about to read 5, iclass 21, count 0 2006.229.11:30:11.07#ibcon#read 5, iclass 21, count 0 2006.229.11:30:11.07#ibcon#about to read 6, iclass 21, count 0 2006.229.11:30:11.07#ibcon#read 6, iclass 21, count 0 2006.229.11:30:11.07#ibcon#end of sib2, iclass 21, count 0 2006.229.11:30:11.07#ibcon#*after write, iclass 21, count 0 2006.229.11:30:11.07#ibcon#*before return 0, iclass 21, count 0 2006.229.11:30:11.07#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:11.07#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:30:11.07#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:30:11.07#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:30:11.07$vck44/vblo=5,709.99 2006.229.11:30:11.07#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.11:30:11.07#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.11:30:11.07#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:11.07#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:11.07#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:11.07#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:11.07#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:30:11.07#ibcon#first serial, iclass 23, count 0 2006.229.11:30:11.07#ibcon#enter sib2, iclass 23, count 0 2006.229.11:30:11.07#ibcon#flushed, iclass 23, count 0 2006.229.11:30:11.07#ibcon#about to write, iclass 23, count 0 2006.229.11:30:11.07#ibcon#wrote, iclass 23, count 0 2006.229.11:30:11.07#ibcon#about to read 3, iclass 23, count 0 2006.229.11:30:11.09#ibcon#read 3, iclass 23, count 0 2006.229.11:30:11.09#ibcon#about to read 4, iclass 23, count 0 2006.229.11:30:11.09#ibcon#read 4, iclass 23, count 0 2006.229.11:30:11.09#ibcon#about to read 5, iclass 23, count 0 2006.229.11:30:11.09#ibcon#read 5, iclass 23, count 0 2006.229.11:30:11.09#ibcon#about to read 6, iclass 23, count 0 2006.229.11:30:11.09#ibcon#read 6, iclass 23, count 0 2006.229.11:30:11.09#ibcon#end of sib2, iclass 23, count 0 2006.229.11:30:11.09#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:30:11.09#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:30:11.09#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:30:11.09#ibcon#*before write, iclass 23, count 0 2006.229.11:30:11.09#ibcon#enter sib2, iclass 23, count 0 2006.229.11:30:11.09#ibcon#flushed, iclass 23, count 0 2006.229.11:30:11.09#ibcon#about to write, iclass 23, count 0 2006.229.11:30:11.09#ibcon#wrote, iclass 23, count 0 2006.229.11:30:11.09#ibcon#about to read 3, iclass 23, count 0 2006.229.11:30:11.13#ibcon#read 3, iclass 23, count 0 2006.229.11:30:11.13#ibcon#about to read 4, iclass 23, count 0 2006.229.11:30:11.13#ibcon#read 4, iclass 23, count 0 2006.229.11:30:11.13#ibcon#about to read 5, iclass 23, count 0 2006.229.11:30:11.13#ibcon#read 5, iclass 23, count 0 2006.229.11:30:11.13#ibcon#about to read 6, iclass 23, count 0 2006.229.11:30:11.13#ibcon#read 6, iclass 23, count 0 2006.229.11:30:11.13#ibcon#end of sib2, iclass 23, count 0 2006.229.11:30:11.13#ibcon#*after write, iclass 23, count 0 2006.229.11:30:11.13#ibcon#*before return 0, iclass 23, count 0 2006.229.11:30:11.13#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:11.13#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:30:11.13#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:30:11.13#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:30:11.13$vck44/vb=5,4 2006.229.11:30:11.13#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:30:11.13#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:30:11.13#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:11.13#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:11.19#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:11.19#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:11.19#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:30:11.19#ibcon#first serial, iclass 25, count 2 2006.229.11:30:11.19#ibcon#enter sib2, iclass 25, count 2 2006.229.11:30:11.19#ibcon#flushed, iclass 25, count 2 2006.229.11:30:11.19#ibcon#about to write, iclass 25, count 2 2006.229.11:30:11.19#ibcon#wrote, iclass 25, count 2 2006.229.11:30:11.19#ibcon#about to read 3, iclass 25, count 2 2006.229.11:30:11.21#ibcon#read 3, iclass 25, count 2 2006.229.11:30:11.21#ibcon#about to read 4, iclass 25, count 2 2006.229.11:30:11.21#ibcon#read 4, iclass 25, count 2 2006.229.11:30:11.21#ibcon#about to read 5, iclass 25, count 2 2006.229.11:30:11.21#ibcon#read 5, iclass 25, count 2 2006.229.11:30:11.21#ibcon#about to read 6, iclass 25, count 2 2006.229.11:30:11.21#ibcon#read 6, iclass 25, count 2 2006.229.11:30:11.21#ibcon#end of sib2, iclass 25, count 2 2006.229.11:30:11.21#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:30:11.21#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:30:11.21#ibcon#[27=AT05-04\r\n] 2006.229.11:30:11.21#ibcon#*before write, iclass 25, count 2 2006.229.11:30:11.21#ibcon#enter sib2, iclass 25, count 2 2006.229.11:30:11.21#ibcon#flushed, iclass 25, count 2 2006.229.11:30:11.21#ibcon#about to write, iclass 25, count 2 2006.229.11:30:11.21#ibcon#wrote, iclass 25, count 2 2006.229.11:30:11.21#ibcon#about to read 3, iclass 25, count 2 2006.229.11:30:11.24#ibcon#read 3, iclass 25, count 2 2006.229.11:30:11.24#ibcon#about to read 4, iclass 25, count 2 2006.229.11:30:11.24#ibcon#read 4, iclass 25, count 2 2006.229.11:30:11.24#ibcon#about to read 5, iclass 25, count 2 2006.229.11:30:11.24#ibcon#read 5, iclass 25, count 2 2006.229.11:30:11.24#ibcon#about to read 6, iclass 25, count 2 2006.229.11:30:11.24#ibcon#read 6, iclass 25, count 2 2006.229.11:30:11.24#ibcon#end of sib2, iclass 25, count 2 2006.229.11:30:11.24#ibcon#*after write, iclass 25, count 2 2006.229.11:30:11.24#ibcon#*before return 0, iclass 25, count 2 2006.229.11:30:11.24#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:11.24#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:30:11.24#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:30:11.24#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:11.24#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:11.36#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:11.36#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:11.36#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:30:11.36#ibcon#first serial, iclass 25, count 0 2006.229.11:30:11.36#ibcon#enter sib2, iclass 25, count 0 2006.229.11:30:11.36#ibcon#flushed, iclass 25, count 0 2006.229.11:30:11.36#ibcon#about to write, iclass 25, count 0 2006.229.11:30:11.36#ibcon#wrote, iclass 25, count 0 2006.229.11:30:11.36#ibcon#about to read 3, iclass 25, count 0 2006.229.11:30:11.38#ibcon#read 3, iclass 25, count 0 2006.229.11:30:11.38#ibcon#about to read 4, iclass 25, count 0 2006.229.11:30:11.38#ibcon#read 4, iclass 25, count 0 2006.229.11:30:11.38#ibcon#about to read 5, iclass 25, count 0 2006.229.11:30:11.38#ibcon#read 5, iclass 25, count 0 2006.229.11:30:11.38#ibcon#about to read 6, iclass 25, count 0 2006.229.11:30:11.38#ibcon#read 6, iclass 25, count 0 2006.229.11:30:11.38#ibcon#end of sib2, iclass 25, count 0 2006.229.11:30:11.38#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:30:11.38#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:30:11.38#ibcon#[27=USB\r\n] 2006.229.11:30:11.38#ibcon#*before write, iclass 25, count 0 2006.229.11:30:11.38#ibcon#enter sib2, iclass 25, count 0 2006.229.11:30:11.38#ibcon#flushed, iclass 25, count 0 2006.229.11:30:11.38#ibcon#about to write, iclass 25, count 0 2006.229.11:30:11.38#ibcon#wrote, iclass 25, count 0 2006.229.11:30:11.38#ibcon#about to read 3, iclass 25, count 0 2006.229.11:30:11.41#ibcon#read 3, iclass 25, count 0 2006.229.11:30:11.41#ibcon#about to read 4, iclass 25, count 0 2006.229.11:30:11.41#ibcon#read 4, iclass 25, count 0 2006.229.11:30:11.41#ibcon#about to read 5, iclass 25, count 0 2006.229.11:30:11.41#ibcon#read 5, iclass 25, count 0 2006.229.11:30:11.41#ibcon#about to read 6, iclass 25, count 0 2006.229.11:30:11.41#ibcon#read 6, iclass 25, count 0 2006.229.11:30:11.41#ibcon#end of sib2, iclass 25, count 0 2006.229.11:30:11.41#ibcon#*after write, iclass 25, count 0 2006.229.11:30:11.41#ibcon#*before return 0, iclass 25, count 0 2006.229.11:30:11.41#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:11.41#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:30:11.41#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:30:11.41#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:30:11.41$vck44/vblo=6,719.99 2006.229.11:30:11.41#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:30:11.41#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:30:11.41#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:11.41#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:11.41#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:11.41#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:11.41#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:30:11.41#ibcon#first serial, iclass 27, count 0 2006.229.11:30:11.41#ibcon#enter sib2, iclass 27, count 0 2006.229.11:30:11.41#ibcon#flushed, iclass 27, count 0 2006.229.11:30:11.41#ibcon#about to write, iclass 27, count 0 2006.229.11:30:11.41#ibcon#wrote, iclass 27, count 0 2006.229.11:30:11.41#ibcon#about to read 3, iclass 27, count 0 2006.229.11:30:11.43#ibcon#read 3, iclass 27, count 0 2006.229.11:30:11.43#ibcon#about to read 4, iclass 27, count 0 2006.229.11:30:11.43#ibcon#read 4, iclass 27, count 0 2006.229.11:30:11.43#ibcon#about to read 5, iclass 27, count 0 2006.229.11:30:11.43#ibcon#read 5, iclass 27, count 0 2006.229.11:30:11.43#ibcon#about to read 6, iclass 27, count 0 2006.229.11:30:11.43#ibcon#read 6, iclass 27, count 0 2006.229.11:30:11.43#ibcon#end of sib2, iclass 27, count 0 2006.229.11:30:11.43#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:30:11.43#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:30:11.43#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:30:11.43#ibcon#*before write, iclass 27, count 0 2006.229.11:30:11.43#ibcon#enter sib2, iclass 27, count 0 2006.229.11:30:11.43#ibcon#flushed, iclass 27, count 0 2006.229.11:30:11.43#ibcon#about to write, iclass 27, count 0 2006.229.11:30:11.43#ibcon#wrote, iclass 27, count 0 2006.229.11:30:11.43#ibcon#about to read 3, iclass 27, count 0 2006.229.11:30:11.47#ibcon#read 3, iclass 27, count 0 2006.229.11:30:11.47#ibcon#about to read 4, iclass 27, count 0 2006.229.11:30:11.47#ibcon#read 4, iclass 27, count 0 2006.229.11:30:11.47#ibcon#about to read 5, iclass 27, count 0 2006.229.11:30:11.47#ibcon#read 5, iclass 27, count 0 2006.229.11:30:11.47#ibcon#about to read 6, iclass 27, count 0 2006.229.11:30:11.47#ibcon#read 6, iclass 27, count 0 2006.229.11:30:11.47#ibcon#end of sib2, iclass 27, count 0 2006.229.11:30:11.47#ibcon#*after write, iclass 27, count 0 2006.229.11:30:11.47#ibcon#*before return 0, iclass 27, count 0 2006.229.11:30:11.47#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:11.47#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:30:11.47#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:30:11.47#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:30:11.47$vck44/vb=6,4 2006.229.11:30:11.47#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.11:30:11.47#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.11:30:11.47#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:11.47#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:11.53#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:11.53#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:11.53#ibcon#enter wrdev, iclass 29, count 2 2006.229.11:30:11.53#ibcon#first serial, iclass 29, count 2 2006.229.11:30:11.53#ibcon#enter sib2, iclass 29, count 2 2006.229.11:30:11.53#ibcon#flushed, iclass 29, count 2 2006.229.11:30:11.53#ibcon#about to write, iclass 29, count 2 2006.229.11:30:11.53#ibcon#wrote, iclass 29, count 2 2006.229.11:30:11.53#ibcon#about to read 3, iclass 29, count 2 2006.229.11:30:11.55#ibcon#read 3, iclass 29, count 2 2006.229.11:30:11.55#ibcon#about to read 4, iclass 29, count 2 2006.229.11:30:11.55#ibcon#read 4, iclass 29, count 2 2006.229.11:30:11.55#ibcon#about to read 5, iclass 29, count 2 2006.229.11:30:11.55#ibcon#read 5, iclass 29, count 2 2006.229.11:30:11.55#ibcon#about to read 6, iclass 29, count 2 2006.229.11:30:11.55#ibcon#read 6, iclass 29, count 2 2006.229.11:30:11.55#ibcon#end of sib2, iclass 29, count 2 2006.229.11:30:11.55#ibcon#*mode == 0, iclass 29, count 2 2006.229.11:30:11.55#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.11:30:11.55#ibcon#[27=AT06-04\r\n] 2006.229.11:30:11.55#ibcon#*before write, iclass 29, count 2 2006.229.11:30:11.55#ibcon#enter sib2, iclass 29, count 2 2006.229.11:30:11.55#ibcon#flushed, iclass 29, count 2 2006.229.11:30:11.55#ibcon#about to write, iclass 29, count 2 2006.229.11:30:11.55#ibcon#wrote, iclass 29, count 2 2006.229.11:30:11.55#ibcon#about to read 3, iclass 29, count 2 2006.229.11:30:11.58#ibcon#read 3, iclass 29, count 2 2006.229.11:30:11.58#ibcon#about to read 4, iclass 29, count 2 2006.229.11:30:11.58#ibcon#read 4, iclass 29, count 2 2006.229.11:30:11.58#ibcon#about to read 5, iclass 29, count 2 2006.229.11:30:11.58#ibcon#read 5, iclass 29, count 2 2006.229.11:30:11.58#ibcon#about to read 6, iclass 29, count 2 2006.229.11:30:11.58#ibcon#read 6, iclass 29, count 2 2006.229.11:30:11.58#ibcon#end of sib2, iclass 29, count 2 2006.229.11:30:11.58#ibcon#*after write, iclass 29, count 2 2006.229.11:30:11.58#ibcon#*before return 0, iclass 29, count 2 2006.229.11:30:11.58#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:11.58#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:30:11.58#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.11:30:11.58#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:11.58#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:11.70#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:11.70#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:11.70#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:30:11.70#ibcon#first serial, iclass 29, count 0 2006.229.11:30:11.70#ibcon#enter sib2, iclass 29, count 0 2006.229.11:30:11.70#ibcon#flushed, iclass 29, count 0 2006.229.11:30:11.70#ibcon#about to write, iclass 29, count 0 2006.229.11:30:11.70#ibcon#wrote, iclass 29, count 0 2006.229.11:30:11.70#ibcon#about to read 3, iclass 29, count 0 2006.229.11:30:11.72#ibcon#read 3, iclass 29, count 0 2006.229.11:30:11.72#ibcon#about to read 4, iclass 29, count 0 2006.229.11:30:11.72#ibcon#read 4, iclass 29, count 0 2006.229.11:30:11.72#ibcon#about to read 5, iclass 29, count 0 2006.229.11:30:11.72#ibcon#read 5, iclass 29, count 0 2006.229.11:30:11.72#ibcon#about to read 6, iclass 29, count 0 2006.229.11:30:11.72#ibcon#read 6, iclass 29, count 0 2006.229.11:30:11.72#ibcon#end of sib2, iclass 29, count 0 2006.229.11:30:11.72#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:30:11.72#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:30:11.72#ibcon#[27=USB\r\n] 2006.229.11:30:11.72#ibcon#*before write, iclass 29, count 0 2006.229.11:30:11.72#ibcon#enter sib2, iclass 29, count 0 2006.229.11:30:11.72#ibcon#flushed, iclass 29, count 0 2006.229.11:30:11.72#ibcon#about to write, iclass 29, count 0 2006.229.11:30:11.72#ibcon#wrote, iclass 29, count 0 2006.229.11:30:11.72#ibcon#about to read 3, iclass 29, count 0 2006.229.11:30:11.75#ibcon#read 3, iclass 29, count 0 2006.229.11:30:11.75#ibcon#about to read 4, iclass 29, count 0 2006.229.11:30:11.75#ibcon#read 4, iclass 29, count 0 2006.229.11:30:11.75#ibcon#about to read 5, iclass 29, count 0 2006.229.11:30:11.75#ibcon#read 5, iclass 29, count 0 2006.229.11:30:11.75#ibcon#about to read 6, iclass 29, count 0 2006.229.11:30:11.75#ibcon#read 6, iclass 29, count 0 2006.229.11:30:11.75#ibcon#end of sib2, iclass 29, count 0 2006.229.11:30:11.75#ibcon#*after write, iclass 29, count 0 2006.229.11:30:11.75#ibcon#*before return 0, iclass 29, count 0 2006.229.11:30:11.75#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:11.75#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:30:11.75#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:30:11.75#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:30:11.75$vck44/vblo=7,734.99 2006.229.11:30:11.75#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:30:11.75#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:30:11.75#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:11.75#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:11.75#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:11.75#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:11.75#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:30:11.75#ibcon#first serial, iclass 31, count 0 2006.229.11:30:11.75#ibcon#enter sib2, iclass 31, count 0 2006.229.11:30:11.75#ibcon#flushed, iclass 31, count 0 2006.229.11:30:11.75#ibcon#about to write, iclass 31, count 0 2006.229.11:30:11.75#ibcon#wrote, iclass 31, count 0 2006.229.11:30:11.75#ibcon#about to read 3, iclass 31, count 0 2006.229.11:30:11.77#ibcon#read 3, iclass 31, count 0 2006.229.11:30:11.77#ibcon#about to read 4, iclass 31, count 0 2006.229.11:30:11.77#ibcon#read 4, iclass 31, count 0 2006.229.11:30:11.77#ibcon#about to read 5, iclass 31, count 0 2006.229.11:30:11.77#ibcon#read 5, iclass 31, count 0 2006.229.11:30:11.77#ibcon#about to read 6, iclass 31, count 0 2006.229.11:30:11.77#ibcon#read 6, iclass 31, count 0 2006.229.11:30:11.77#ibcon#end of sib2, iclass 31, count 0 2006.229.11:30:11.77#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:30:11.77#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:30:11.77#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:30:11.77#ibcon#*before write, iclass 31, count 0 2006.229.11:30:11.77#ibcon#enter sib2, iclass 31, count 0 2006.229.11:30:11.77#ibcon#flushed, iclass 31, count 0 2006.229.11:30:11.77#ibcon#about to write, iclass 31, count 0 2006.229.11:30:11.77#ibcon#wrote, iclass 31, count 0 2006.229.11:30:11.77#ibcon#about to read 3, iclass 31, count 0 2006.229.11:30:11.81#ibcon#read 3, iclass 31, count 0 2006.229.11:30:11.81#ibcon#about to read 4, iclass 31, count 0 2006.229.11:30:11.81#ibcon#read 4, iclass 31, count 0 2006.229.11:30:11.81#ibcon#about to read 5, iclass 31, count 0 2006.229.11:30:11.81#ibcon#read 5, iclass 31, count 0 2006.229.11:30:11.81#ibcon#about to read 6, iclass 31, count 0 2006.229.11:30:11.81#ibcon#read 6, iclass 31, count 0 2006.229.11:30:11.81#ibcon#end of sib2, iclass 31, count 0 2006.229.11:30:11.81#ibcon#*after write, iclass 31, count 0 2006.229.11:30:11.81#ibcon#*before return 0, iclass 31, count 0 2006.229.11:30:11.81#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:11.81#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:30:11.81#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:30:11.81#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:30:11.81$vck44/vb=7,4 2006.229.11:30:11.81#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.11:30:11.81#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.11:30:11.81#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:11.81#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:11.87#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:11.87#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:11.87#ibcon#enter wrdev, iclass 33, count 2 2006.229.11:30:11.87#ibcon#first serial, iclass 33, count 2 2006.229.11:30:11.87#ibcon#enter sib2, iclass 33, count 2 2006.229.11:30:11.87#ibcon#flushed, iclass 33, count 2 2006.229.11:30:11.87#ibcon#about to write, iclass 33, count 2 2006.229.11:30:11.87#ibcon#wrote, iclass 33, count 2 2006.229.11:30:11.87#ibcon#about to read 3, iclass 33, count 2 2006.229.11:30:11.89#ibcon#read 3, iclass 33, count 2 2006.229.11:30:11.89#ibcon#about to read 4, iclass 33, count 2 2006.229.11:30:11.89#ibcon#read 4, iclass 33, count 2 2006.229.11:30:11.89#ibcon#about to read 5, iclass 33, count 2 2006.229.11:30:11.89#ibcon#read 5, iclass 33, count 2 2006.229.11:30:11.89#ibcon#about to read 6, iclass 33, count 2 2006.229.11:30:11.89#ibcon#read 6, iclass 33, count 2 2006.229.11:30:11.89#ibcon#end of sib2, iclass 33, count 2 2006.229.11:30:11.89#ibcon#*mode == 0, iclass 33, count 2 2006.229.11:30:11.89#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.11:30:11.89#ibcon#[27=AT07-04\r\n] 2006.229.11:30:11.89#ibcon#*before write, iclass 33, count 2 2006.229.11:30:11.89#ibcon#enter sib2, iclass 33, count 2 2006.229.11:30:11.89#ibcon#flushed, iclass 33, count 2 2006.229.11:30:11.89#ibcon#about to write, iclass 33, count 2 2006.229.11:30:11.89#ibcon#wrote, iclass 33, count 2 2006.229.11:30:11.89#ibcon#about to read 3, iclass 33, count 2 2006.229.11:30:11.92#ibcon#read 3, iclass 33, count 2 2006.229.11:30:11.92#ibcon#about to read 4, iclass 33, count 2 2006.229.11:30:11.92#ibcon#read 4, iclass 33, count 2 2006.229.11:30:11.92#ibcon#about to read 5, iclass 33, count 2 2006.229.11:30:11.92#ibcon#read 5, iclass 33, count 2 2006.229.11:30:11.92#ibcon#about to read 6, iclass 33, count 2 2006.229.11:30:11.92#ibcon#read 6, iclass 33, count 2 2006.229.11:30:11.92#ibcon#end of sib2, iclass 33, count 2 2006.229.11:30:11.92#ibcon#*after write, iclass 33, count 2 2006.229.11:30:11.92#ibcon#*before return 0, iclass 33, count 2 2006.229.11:30:11.92#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:11.92#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:30:11.92#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.11:30:11.92#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:11.92#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:12.04#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:12.04#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:12.04#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:30:12.04#ibcon#first serial, iclass 33, count 0 2006.229.11:30:12.04#ibcon#enter sib2, iclass 33, count 0 2006.229.11:30:12.04#ibcon#flushed, iclass 33, count 0 2006.229.11:30:12.04#ibcon#about to write, iclass 33, count 0 2006.229.11:30:12.04#ibcon#wrote, iclass 33, count 0 2006.229.11:30:12.04#ibcon#about to read 3, iclass 33, count 0 2006.229.11:30:12.06#ibcon#read 3, iclass 33, count 0 2006.229.11:30:12.06#ibcon#about to read 4, iclass 33, count 0 2006.229.11:30:12.06#ibcon#read 4, iclass 33, count 0 2006.229.11:30:12.06#ibcon#about to read 5, iclass 33, count 0 2006.229.11:30:12.06#ibcon#read 5, iclass 33, count 0 2006.229.11:30:12.06#ibcon#about to read 6, iclass 33, count 0 2006.229.11:30:12.06#ibcon#read 6, iclass 33, count 0 2006.229.11:30:12.06#ibcon#end of sib2, iclass 33, count 0 2006.229.11:30:12.06#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:30:12.06#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:30:12.06#ibcon#[27=USB\r\n] 2006.229.11:30:12.06#ibcon#*before write, iclass 33, count 0 2006.229.11:30:12.06#ibcon#enter sib2, iclass 33, count 0 2006.229.11:30:12.06#ibcon#flushed, iclass 33, count 0 2006.229.11:30:12.06#ibcon#about to write, iclass 33, count 0 2006.229.11:30:12.06#ibcon#wrote, iclass 33, count 0 2006.229.11:30:12.06#ibcon#about to read 3, iclass 33, count 0 2006.229.11:30:12.09#ibcon#read 3, iclass 33, count 0 2006.229.11:30:12.09#ibcon#about to read 4, iclass 33, count 0 2006.229.11:30:12.09#ibcon#read 4, iclass 33, count 0 2006.229.11:30:12.09#ibcon#about to read 5, iclass 33, count 0 2006.229.11:30:12.09#ibcon#read 5, iclass 33, count 0 2006.229.11:30:12.09#ibcon#about to read 6, iclass 33, count 0 2006.229.11:30:12.09#ibcon#read 6, iclass 33, count 0 2006.229.11:30:12.09#ibcon#end of sib2, iclass 33, count 0 2006.229.11:30:12.09#ibcon#*after write, iclass 33, count 0 2006.229.11:30:12.09#ibcon#*before return 0, iclass 33, count 0 2006.229.11:30:12.09#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:12.09#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:30:12.09#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:30:12.09#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:30:12.09$vck44/vblo=8,744.99 2006.229.11:30:12.09#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.11:30:12.09#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.11:30:12.09#ibcon#ireg 17 cls_cnt 0 2006.229.11:30:12.09#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:12.09#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:12.09#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:12.09#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:30:12.09#ibcon#first serial, iclass 35, count 0 2006.229.11:30:12.09#ibcon#enter sib2, iclass 35, count 0 2006.229.11:30:12.09#ibcon#flushed, iclass 35, count 0 2006.229.11:30:12.09#ibcon#about to write, iclass 35, count 0 2006.229.11:30:12.09#ibcon#wrote, iclass 35, count 0 2006.229.11:30:12.09#ibcon#about to read 3, iclass 35, count 0 2006.229.11:30:12.11#ibcon#read 3, iclass 35, count 0 2006.229.11:30:12.11#ibcon#about to read 4, iclass 35, count 0 2006.229.11:30:12.11#ibcon#read 4, iclass 35, count 0 2006.229.11:30:12.11#ibcon#about to read 5, iclass 35, count 0 2006.229.11:30:12.11#ibcon#read 5, iclass 35, count 0 2006.229.11:30:12.11#ibcon#about to read 6, iclass 35, count 0 2006.229.11:30:12.11#ibcon#read 6, iclass 35, count 0 2006.229.11:30:12.11#ibcon#end of sib2, iclass 35, count 0 2006.229.11:30:12.11#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:30:12.11#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:30:12.11#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:30:12.11#ibcon#*before write, iclass 35, count 0 2006.229.11:30:12.11#ibcon#enter sib2, iclass 35, count 0 2006.229.11:30:12.11#ibcon#flushed, iclass 35, count 0 2006.229.11:30:12.11#ibcon#about to write, iclass 35, count 0 2006.229.11:30:12.11#ibcon#wrote, iclass 35, count 0 2006.229.11:30:12.11#ibcon#about to read 3, iclass 35, count 0 2006.229.11:30:12.15#ibcon#read 3, iclass 35, count 0 2006.229.11:30:12.15#ibcon#about to read 4, iclass 35, count 0 2006.229.11:30:12.15#ibcon#read 4, iclass 35, count 0 2006.229.11:30:12.15#ibcon#about to read 5, iclass 35, count 0 2006.229.11:30:12.15#ibcon#read 5, iclass 35, count 0 2006.229.11:30:12.15#ibcon#about to read 6, iclass 35, count 0 2006.229.11:30:12.15#ibcon#read 6, iclass 35, count 0 2006.229.11:30:12.15#ibcon#end of sib2, iclass 35, count 0 2006.229.11:30:12.15#ibcon#*after write, iclass 35, count 0 2006.229.11:30:12.15#ibcon#*before return 0, iclass 35, count 0 2006.229.11:30:12.15#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:12.15#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:30:12.15#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:30:12.15#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:30:12.15$vck44/vb=8,4 2006.229.11:30:12.15#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.11:30:12.15#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.11:30:12.15#ibcon#ireg 11 cls_cnt 2 2006.229.11:30:12.15#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:12.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:12.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:12.21#ibcon#enter wrdev, iclass 37, count 2 2006.229.11:30:12.21#ibcon#first serial, iclass 37, count 2 2006.229.11:30:12.21#ibcon#enter sib2, iclass 37, count 2 2006.229.11:30:12.21#ibcon#flushed, iclass 37, count 2 2006.229.11:30:12.21#ibcon#about to write, iclass 37, count 2 2006.229.11:30:12.21#ibcon#wrote, iclass 37, count 2 2006.229.11:30:12.21#ibcon#about to read 3, iclass 37, count 2 2006.229.11:30:12.23#ibcon#read 3, iclass 37, count 2 2006.229.11:30:12.23#ibcon#about to read 4, iclass 37, count 2 2006.229.11:30:12.23#ibcon#read 4, iclass 37, count 2 2006.229.11:30:12.23#ibcon#about to read 5, iclass 37, count 2 2006.229.11:30:12.23#ibcon#read 5, iclass 37, count 2 2006.229.11:30:12.23#ibcon#about to read 6, iclass 37, count 2 2006.229.11:30:12.23#ibcon#read 6, iclass 37, count 2 2006.229.11:30:12.23#ibcon#end of sib2, iclass 37, count 2 2006.229.11:30:12.23#ibcon#*mode == 0, iclass 37, count 2 2006.229.11:30:12.23#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.11:30:12.23#ibcon#[27=AT08-04\r\n] 2006.229.11:30:12.23#ibcon#*before write, iclass 37, count 2 2006.229.11:30:12.23#ibcon#enter sib2, iclass 37, count 2 2006.229.11:30:12.23#ibcon#flushed, iclass 37, count 2 2006.229.11:30:12.23#ibcon#about to write, iclass 37, count 2 2006.229.11:30:12.23#ibcon#wrote, iclass 37, count 2 2006.229.11:30:12.23#ibcon#about to read 3, iclass 37, count 2 2006.229.11:30:12.26#ibcon#read 3, iclass 37, count 2 2006.229.11:30:12.26#ibcon#about to read 4, iclass 37, count 2 2006.229.11:30:12.26#ibcon#read 4, iclass 37, count 2 2006.229.11:30:12.26#ibcon#about to read 5, iclass 37, count 2 2006.229.11:30:12.26#ibcon#read 5, iclass 37, count 2 2006.229.11:30:12.26#ibcon#about to read 6, iclass 37, count 2 2006.229.11:30:12.26#ibcon#read 6, iclass 37, count 2 2006.229.11:30:12.26#ibcon#end of sib2, iclass 37, count 2 2006.229.11:30:12.26#ibcon#*after write, iclass 37, count 2 2006.229.11:30:12.26#ibcon#*before return 0, iclass 37, count 2 2006.229.11:30:12.26#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:12.26#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:30:12.26#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.11:30:12.26#ibcon#ireg 7 cls_cnt 0 2006.229.11:30:12.26#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:12.38#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:12.38#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:12.38#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:30:12.38#ibcon#first serial, iclass 37, count 0 2006.229.11:30:12.38#ibcon#enter sib2, iclass 37, count 0 2006.229.11:30:12.38#ibcon#flushed, iclass 37, count 0 2006.229.11:30:12.38#ibcon#about to write, iclass 37, count 0 2006.229.11:30:12.38#ibcon#wrote, iclass 37, count 0 2006.229.11:30:12.38#ibcon#about to read 3, iclass 37, count 0 2006.229.11:30:12.40#ibcon#read 3, iclass 37, count 0 2006.229.11:30:12.40#ibcon#about to read 4, iclass 37, count 0 2006.229.11:30:12.40#ibcon#read 4, iclass 37, count 0 2006.229.11:30:12.40#ibcon#about to read 5, iclass 37, count 0 2006.229.11:30:12.40#ibcon#read 5, iclass 37, count 0 2006.229.11:30:12.40#ibcon#about to read 6, iclass 37, count 0 2006.229.11:30:12.40#ibcon#read 6, iclass 37, count 0 2006.229.11:30:12.40#ibcon#end of sib2, iclass 37, count 0 2006.229.11:30:12.40#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:30:12.40#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:30:12.40#ibcon#[27=USB\r\n] 2006.229.11:30:12.40#ibcon#*before write, iclass 37, count 0 2006.229.11:30:12.40#ibcon#enter sib2, iclass 37, count 0 2006.229.11:30:12.40#ibcon#flushed, iclass 37, count 0 2006.229.11:30:12.40#ibcon#about to write, iclass 37, count 0 2006.229.11:30:12.40#ibcon#wrote, iclass 37, count 0 2006.229.11:30:12.40#ibcon#about to read 3, iclass 37, count 0 2006.229.11:30:12.43#ibcon#read 3, iclass 37, count 0 2006.229.11:30:12.43#ibcon#about to read 4, iclass 37, count 0 2006.229.11:30:12.43#ibcon#read 4, iclass 37, count 0 2006.229.11:30:12.43#ibcon#about to read 5, iclass 37, count 0 2006.229.11:30:12.43#ibcon#read 5, iclass 37, count 0 2006.229.11:30:12.43#ibcon#about to read 6, iclass 37, count 0 2006.229.11:30:12.43#ibcon#read 6, iclass 37, count 0 2006.229.11:30:12.43#ibcon#end of sib2, iclass 37, count 0 2006.229.11:30:12.43#ibcon#*after write, iclass 37, count 0 2006.229.11:30:12.43#ibcon#*before return 0, iclass 37, count 0 2006.229.11:30:12.43#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:12.43#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:30:12.43#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:30:12.43#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:30:12.43$vck44/vabw=wide 2006.229.11:30:12.43#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.11:30:12.43#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.11:30:12.43#ibcon#ireg 8 cls_cnt 0 2006.229.11:30:12.43#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:12.43#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:12.43#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:12.43#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:30:12.43#ibcon#first serial, iclass 39, count 0 2006.229.11:30:12.43#ibcon#enter sib2, iclass 39, count 0 2006.229.11:30:12.43#ibcon#flushed, iclass 39, count 0 2006.229.11:30:12.43#ibcon#about to write, iclass 39, count 0 2006.229.11:30:12.43#ibcon#wrote, iclass 39, count 0 2006.229.11:30:12.43#ibcon#about to read 3, iclass 39, count 0 2006.229.11:30:12.45#ibcon#read 3, iclass 39, count 0 2006.229.11:30:12.45#ibcon#about to read 4, iclass 39, count 0 2006.229.11:30:12.45#ibcon#read 4, iclass 39, count 0 2006.229.11:30:12.45#ibcon#about to read 5, iclass 39, count 0 2006.229.11:30:12.45#ibcon#read 5, iclass 39, count 0 2006.229.11:30:12.45#ibcon#about to read 6, iclass 39, count 0 2006.229.11:30:12.45#ibcon#read 6, iclass 39, count 0 2006.229.11:30:12.45#ibcon#end of sib2, iclass 39, count 0 2006.229.11:30:12.45#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:30:12.45#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:30:12.45#ibcon#[25=BW32\r\n] 2006.229.11:30:12.45#ibcon#*before write, iclass 39, count 0 2006.229.11:30:12.45#ibcon#enter sib2, iclass 39, count 0 2006.229.11:30:12.45#ibcon#flushed, iclass 39, count 0 2006.229.11:30:12.45#ibcon#about to write, iclass 39, count 0 2006.229.11:30:12.45#ibcon#wrote, iclass 39, count 0 2006.229.11:30:12.45#ibcon#about to read 3, iclass 39, count 0 2006.229.11:30:12.48#ibcon#read 3, iclass 39, count 0 2006.229.11:30:12.48#ibcon#about to read 4, iclass 39, count 0 2006.229.11:30:12.48#ibcon#read 4, iclass 39, count 0 2006.229.11:30:12.48#ibcon#about to read 5, iclass 39, count 0 2006.229.11:30:12.48#ibcon#read 5, iclass 39, count 0 2006.229.11:30:12.48#ibcon#about to read 6, iclass 39, count 0 2006.229.11:30:12.48#ibcon#read 6, iclass 39, count 0 2006.229.11:30:12.48#ibcon#end of sib2, iclass 39, count 0 2006.229.11:30:12.48#ibcon#*after write, iclass 39, count 0 2006.229.11:30:12.48#ibcon#*before return 0, iclass 39, count 0 2006.229.11:30:12.48#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:12.48#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:30:12.48#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:30:12.48#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:30:12.48$vck44/vbbw=wide 2006.229.11:30:12.48#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:30:12.48#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:30:12.48#ibcon#ireg 8 cls_cnt 0 2006.229.11:30:12.48#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:30:12.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:30:12.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:30:12.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:30:12.55#ibcon#first serial, iclass 3, count 0 2006.229.11:30:12.55#ibcon#enter sib2, iclass 3, count 0 2006.229.11:30:12.55#ibcon#flushed, iclass 3, count 0 2006.229.11:30:12.55#ibcon#about to write, iclass 3, count 0 2006.229.11:30:12.55#ibcon#wrote, iclass 3, count 0 2006.229.11:30:12.55#ibcon#about to read 3, iclass 3, count 0 2006.229.11:30:12.57#ibcon#read 3, iclass 3, count 0 2006.229.11:30:12.57#ibcon#about to read 4, iclass 3, count 0 2006.229.11:30:12.57#ibcon#read 4, iclass 3, count 0 2006.229.11:30:12.57#ibcon#about to read 5, iclass 3, count 0 2006.229.11:30:12.57#ibcon#read 5, iclass 3, count 0 2006.229.11:30:12.57#ibcon#about to read 6, iclass 3, count 0 2006.229.11:30:12.57#ibcon#read 6, iclass 3, count 0 2006.229.11:30:12.57#ibcon#end of sib2, iclass 3, count 0 2006.229.11:30:12.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:30:12.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:30:12.57#ibcon#[27=BW32\r\n] 2006.229.11:30:12.57#ibcon#*before write, iclass 3, count 0 2006.229.11:30:12.57#ibcon#enter sib2, iclass 3, count 0 2006.229.11:30:12.57#ibcon#flushed, iclass 3, count 0 2006.229.11:30:12.57#ibcon#about to write, iclass 3, count 0 2006.229.11:30:12.57#ibcon#wrote, iclass 3, count 0 2006.229.11:30:12.57#ibcon#about to read 3, iclass 3, count 0 2006.229.11:30:12.60#ibcon#read 3, iclass 3, count 0 2006.229.11:30:12.60#ibcon#about to read 4, iclass 3, count 0 2006.229.11:30:12.60#ibcon#read 4, iclass 3, count 0 2006.229.11:30:12.60#ibcon#about to read 5, iclass 3, count 0 2006.229.11:30:12.60#ibcon#read 5, iclass 3, count 0 2006.229.11:30:12.60#ibcon#about to read 6, iclass 3, count 0 2006.229.11:30:12.60#ibcon#read 6, iclass 3, count 0 2006.229.11:30:12.60#ibcon#end of sib2, iclass 3, count 0 2006.229.11:30:12.60#ibcon#*after write, iclass 3, count 0 2006.229.11:30:12.60#ibcon#*before return 0, iclass 3, count 0 2006.229.11:30:12.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:30:12.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:30:12.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:30:12.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:30:12.60$setupk4/ifdk4 2006.229.11:30:12.60$ifdk4/lo= 2006.229.11:30:12.60$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:30:12.60$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:30:12.60$ifdk4/patch= 2006.229.11:30:12.60$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:30:12.60$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:30:12.60$setupk4/!*+20s 2006.229.11:30:17.71#abcon#<5=/04 1.9 3.6 28.071001002.0\r\n> 2006.229.11:30:17.73#abcon#{5=INTERFACE CLEAR} 2006.229.11:30:17.79#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:30:27.11$setupk4/"tpicd 2006.229.11:30:27.11$setupk4/echo=off 2006.229.11:30:27.11$setupk4/xlog=off 2006.229.11:30:27.11:!2006.229.11:34:08 2006.229.11:30:39.14#trakl#Source acquired 2006.229.11:30:39.14#flagr#flagr/antenna,acquired 2006.229.11:34:08.00:preob 2006.229.11:34:08.14/onsource/TRACKING 2006.229.11:34:08.14:!2006.229.11:34:18 2006.229.11:34:18.00:"tape 2006.229.11:34:18.00:"st=record 2006.229.11:34:18.00:data_valid=on 2006.229.11:34:18.00:midob 2006.229.11:34:18.14/onsource/TRACKING 2006.229.11:34:18.14/wx/28.03,1002.1,100 2006.229.11:34:18.31/cable/+6.4046E-03 2006.229.11:34:19.40/va/01,08,usb,yes,29,32 2006.229.11:34:19.40/va/02,07,usb,yes,32,32 2006.229.11:34:19.40/va/03,06,usb,yes,40,42 2006.229.11:34:19.40/va/04,07,usb,yes,33,34 2006.229.11:34:19.40/va/05,04,usb,yes,29,30 2006.229.11:34:19.40/va/06,04,usb,yes,33,33 2006.229.11:34:19.40/va/07,05,usb,yes,29,30 2006.229.11:34:19.40/va/08,06,usb,yes,21,26 2006.229.11:34:19.63/valo/01,524.99,yes,locked 2006.229.11:34:19.63/valo/02,534.99,yes,locked 2006.229.11:34:19.63/valo/03,564.99,yes,locked 2006.229.11:34:19.63/valo/04,624.99,yes,locked 2006.229.11:34:19.63/valo/05,734.99,yes,locked 2006.229.11:34:19.63/valo/06,814.99,yes,locked 2006.229.11:34:19.63/valo/07,864.99,yes,locked 2006.229.11:34:19.63/valo/08,884.99,yes,locked 2006.229.11:34:20.72/vb/01,04,usb,yes,31,29 2006.229.11:34:20.72/vb/02,04,usb,yes,33,33 2006.229.11:34:20.72/vb/03,04,usb,yes,30,33 2006.229.11:34:20.72/vb/04,04,usb,yes,35,33 2006.229.11:34:20.72/vb/05,04,usb,yes,27,29 2006.229.11:34:20.72/vb/06,04,usb,yes,31,27 2006.229.11:34:20.72/vb/07,04,usb,yes,31,31 2006.229.11:34:20.72/vb/08,04,usb,yes,29,32 2006.229.11:34:20.95/vblo/01,629.99,yes,locked 2006.229.11:34:20.95/vblo/02,634.99,yes,locked 2006.229.11:34:20.95/vblo/03,649.99,yes,locked 2006.229.11:34:20.95/vblo/04,679.99,yes,locked 2006.229.11:34:20.95/vblo/05,709.99,yes,locked 2006.229.11:34:20.95/vblo/06,719.99,yes,locked 2006.229.11:34:20.95/vblo/07,734.99,yes,locked 2006.229.11:34:20.95/vblo/08,744.99,yes,locked 2006.229.11:34:21.10/vabw/8 2006.229.11:34:21.25/vbbw/8 2006.229.11:34:21.34/xfe/off,on,12.0 2006.229.11:34:21.74/ifatt/23,28,28,28 2006.229.11:34:22.08/fmout-gps/S +4.63E-07 2006.229.11:34:22.12:!2006.229.11:35:38 2006.229.11:35:38.00:data_valid=off 2006.229.11:35:38.00:"et 2006.229.11:35:38.00:!+3s 2006.229.11:35:41.01:"tape 2006.229.11:35:41.01:postob 2006.229.11:35:41.10/cable/+6.4066E-03 2006.229.11:35:41.10/wx/28.01,1002.1,100 2006.229.11:35:42.07/fmout-gps/S +4.61E-07 2006.229.11:35:42.07:scan_name=229-1137,jd0608,160 2006.229.11:35:42.07:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.11:35:43.14#flagr#flagr/antenna,new-source 2006.229.11:35:43.14:checkk5 2006.229.11:35:43.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:35:43.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:35:44.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:35:44.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:35:45.09/chk_obsdata//k5ts1/T2291134??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:35:45.48/chk_obsdata//k5ts2/T2291134??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:35:45.88/chk_obsdata//k5ts3/T2291134??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:35:46.26/chk_obsdata//k5ts4/T2291134??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:35:46.99/k5log//k5ts1_log_newline 2006.229.11:35:47.70/k5log//k5ts2_log_newline 2006.229.11:35:48.42/k5log//k5ts3_log_newline 2006.229.11:35:49.14/k5log//k5ts4_log_newline 2006.229.11:35:49.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:35:49.16:setupk4=1 2006.229.11:35:49.16$setupk4/echo=on 2006.229.11:35:49.16$setupk4/pcalon 2006.229.11:35:49.16$pcalon/"no phase cal control is implemented here 2006.229.11:35:49.16$setupk4/"tpicd=stop 2006.229.11:35:49.16$setupk4/"rec=synch_on 2006.229.11:35:49.16$setupk4/"rec_mode=128 2006.229.11:35:49.16$setupk4/!* 2006.229.11:35:49.16$setupk4/recpk4 2006.229.11:35:49.16$recpk4/recpatch= 2006.229.11:35:49.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:35:49.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:35:49.16$setupk4/vck44 2006.229.11:35:49.16$vck44/valo=1,524.99 2006.229.11:35:49.16#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.11:35:49.16#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.11:35:49.16#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:49.16#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:49.16#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:49.16#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:49.16#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:35:49.16#ibcon#first serial, iclass 34, count 0 2006.229.11:35:49.16#ibcon#enter sib2, iclass 34, count 0 2006.229.11:35:49.16#ibcon#flushed, iclass 34, count 0 2006.229.11:35:49.16#ibcon#about to write, iclass 34, count 0 2006.229.11:35:49.16#ibcon#wrote, iclass 34, count 0 2006.229.11:35:49.16#ibcon#about to read 3, iclass 34, count 0 2006.229.11:35:49.18#ibcon#read 3, iclass 34, count 0 2006.229.11:35:49.18#ibcon#about to read 4, iclass 34, count 0 2006.229.11:35:49.18#ibcon#read 4, iclass 34, count 0 2006.229.11:35:49.18#ibcon#about to read 5, iclass 34, count 0 2006.229.11:35:49.18#ibcon#read 5, iclass 34, count 0 2006.229.11:35:49.18#ibcon#about to read 6, iclass 34, count 0 2006.229.11:35:49.18#ibcon#read 6, iclass 34, count 0 2006.229.11:35:49.18#ibcon#end of sib2, iclass 34, count 0 2006.229.11:35:49.18#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:35:49.18#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:35:49.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:35:49.18#ibcon#*before write, iclass 34, count 0 2006.229.11:35:49.18#ibcon#enter sib2, iclass 34, count 0 2006.229.11:35:49.18#ibcon#flushed, iclass 34, count 0 2006.229.11:35:49.18#ibcon#about to write, iclass 34, count 0 2006.229.11:35:49.18#ibcon#wrote, iclass 34, count 0 2006.229.11:35:49.18#ibcon#about to read 3, iclass 34, count 0 2006.229.11:35:49.23#ibcon#read 3, iclass 34, count 0 2006.229.11:35:49.23#ibcon#about to read 4, iclass 34, count 0 2006.229.11:35:49.23#ibcon#read 4, iclass 34, count 0 2006.229.11:35:49.23#ibcon#about to read 5, iclass 34, count 0 2006.229.11:35:49.23#ibcon#read 5, iclass 34, count 0 2006.229.11:35:49.23#ibcon#about to read 6, iclass 34, count 0 2006.229.11:35:49.23#ibcon#read 6, iclass 34, count 0 2006.229.11:35:49.23#ibcon#end of sib2, iclass 34, count 0 2006.229.11:35:49.23#ibcon#*after write, iclass 34, count 0 2006.229.11:35:49.23#ibcon#*before return 0, iclass 34, count 0 2006.229.11:35:49.23#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:49.23#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:49.23#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:35:49.23#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:35:49.23$vck44/va=1,8 2006.229.11:35:49.23#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.11:35:49.23#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.11:35:49.23#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:49.23#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:49.23#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:49.23#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:49.23#ibcon#enter wrdev, iclass 36, count 2 2006.229.11:35:49.23#ibcon#first serial, iclass 36, count 2 2006.229.11:35:49.23#ibcon#enter sib2, iclass 36, count 2 2006.229.11:35:49.23#ibcon#flushed, iclass 36, count 2 2006.229.11:35:49.23#ibcon#about to write, iclass 36, count 2 2006.229.11:35:49.23#ibcon#wrote, iclass 36, count 2 2006.229.11:35:49.23#ibcon#about to read 3, iclass 36, count 2 2006.229.11:35:49.25#ibcon#read 3, iclass 36, count 2 2006.229.11:35:49.25#ibcon#about to read 4, iclass 36, count 2 2006.229.11:35:49.25#ibcon#read 4, iclass 36, count 2 2006.229.11:35:49.25#ibcon#about to read 5, iclass 36, count 2 2006.229.11:35:49.25#ibcon#read 5, iclass 36, count 2 2006.229.11:35:49.25#ibcon#about to read 6, iclass 36, count 2 2006.229.11:35:49.25#ibcon#read 6, iclass 36, count 2 2006.229.11:35:49.25#ibcon#end of sib2, iclass 36, count 2 2006.229.11:35:49.25#ibcon#*mode == 0, iclass 36, count 2 2006.229.11:35:49.25#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.11:35:49.25#ibcon#[25=AT01-08\r\n] 2006.229.11:35:49.25#ibcon#*before write, iclass 36, count 2 2006.229.11:35:49.25#ibcon#enter sib2, iclass 36, count 2 2006.229.11:35:49.25#ibcon#flushed, iclass 36, count 2 2006.229.11:35:49.25#ibcon#about to write, iclass 36, count 2 2006.229.11:35:49.25#ibcon#wrote, iclass 36, count 2 2006.229.11:35:49.25#ibcon#about to read 3, iclass 36, count 2 2006.229.11:35:49.28#ibcon#read 3, iclass 36, count 2 2006.229.11:35:49.28#ibcon#about to read 4, iclass 36, count 2 2006.229.11:35:49.28#ibcon#read 4, iclass 36, count 2 2006.229.11:35:49.28#ibcon#about to read 5, iclass 36, count 2 2006.229.11:35:49.28#ibcon#read 5, iclass 36, count 2 2006.229.11:35:49.28#ibcon#about to read 6, iclass 36, count 2 2006.229.11:35:49.28#ibcon#read 6, iclass 36, count 2 2006.229.11:35:49.28#ibcon#end of sib2, iclass 36, count 2 2006.229.11:35:49.28#ibcon#*after write, iclass 36, count 2 2006.229.11:35:49.28#ibcon#*before return 0, iclass 36, count 2 2006.229.11:35:49.28#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:49.28#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:49.28#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.11:35:49.28#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:49.28#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:49.40#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:49.40#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:49.40#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:35:49.40#ibcon#first serial, iclass 36, count 0 2006.229.11:35:49.40#ibcon#enter sib2, iclass 36, count 0 2006.229.11:35:49.40#ibcon#flushed, iclass 36, count 0 2006.229.11:35:49.40#ibcon#about to write, iclass 36, count 0 2006.229.11:35:49.40#ibcon#wrote, iclass 36, count 0 2006.229.11:35:49.40#ibcon#about to read 3, iclass 36, count 0 2006.229.11:35:49.42#ibcon#read 3, iclass 36, count 0 2006.229.11:35:49.42#ibcon#about to read 4, iclass 36, count 0 2006.229.11:35:49.42#ibcon#read 4, iclass 36, count 0 2006.229.11:35:49.42#ibcon#about to read 5, iclass 36, count 0 2006.229.11:35:49.42#ibcon#read 5, iclass 36, count 0 2006.229.11:35:49.42#ibcon#about to read 6, iclass 36, count 0 2006.229.11:35:49.42#ibcon#read 6, iclass 36, count 0 2006.229.11:35:49.42#ibcon#end of sib2, iclass 36, count 0 2006.229.11:35:49.42#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:35:49.42#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:35:49.42#ibcon#[25=USB\r\n] 2006.229.11:35:49.42#ibcon#*before write, iclass 36, count 0 2006.229.11:35:49.42#ibcon#enter sib2, iclass 36, count 0 2006.229.11:35:49.42#ibcon#flushed, iclass 36, count 0 2006.229.11:35:49.42#ibcon#about to write, iclass 36, count 0 2006.229.11:35:49.42#ibcon#wrote, iclass 36, count 0 2006.229.11:35:49.42#ibcon#about to read 3, iclass 36, count 0 2006.229.11:35:49.45#ibcon#read 3, iclass 36, count 0 2006.229.11:35:49.45#ibcon#about to read 4, iclass 36, count 0 2006.229.11:35:49.45#ibcon#read 4, iclass 36, count 0 2006.229.11:35:49.45#ibcon#about to read 5, iclass 36, count 0 2006.229.11:35:49.45#ibcon#read 5, iclass 36, count 0 2006.229.11:35:49.45#ibcon#about to read 6, iclass 36, count 0 2006.229.11:35:49.45#ibcon#read 6, iclass 36, count 0 2006.229.11:35:49.45#ibcon#end of sib2, iclass 36, count 0 2006.229.11:35:49.45#ibcon#*after write, iclass 36, count 0 2006.229.11:35:49.45#ibcon#*before return 0, iclass 36, count 0 2006.229.11:35:49.45#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:49.45#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:49.45#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:35:49.45#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:35:49.45$vck44/valo=2,534.99 2006.229.11:35:49.45#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.11:35:49.45#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.11:35:49.45#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:49.45#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:49.45#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:49.45#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:49.45#ibcon#enter wrdev, iclass 38, count 0 2006.229.11:35:49.45#ibcon#first serial, iclass 38, count 0 2006.229.11:35:49.45#ibcon#enter sib2, iclass 38, count 0 2006.229.11:35:49.45#ibcon#flushed, iclass 38, count 0 2006.229.11:35:49.45#ibcon#about to write, iclass 38, count 0 2006.229.11:35:49.45#ibcon#wrote, iclass 38, count 0 2006.229.11:35:49.45#ibcon#about to read 3, iclass 38, count 0 2006.229.11:35:49.47#ibcon#read 3, iclass 38, count 0 2006.229.11:35:49.47#ibcon#about to read 4, iclass 38, count 0 2006.229.11:35:49.47#ibcon#read 4, iclass 38, count 0 2006.229.11:35:49.47#ibcon#about to read 5, iclass 38, count 0 2006.229.11:35:49.47#ibcon#read 5, iclass 38, count 0 2006.229.11:35:49.47#ibcon#about to read 6, iclass 38, count 0 2006.229.11:35:49.47#ibcon#read 6, iclass 38, count 0 2006.229.11:35:49.47#ibcon#end of sib2, iclass 38, count 0 2006.229.11:35:49.47#ibcon#*mode == 0, iclass 38, count 0 2006.229.11:35:49.47#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.11:35:49.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:35:49.47#ibcon#*before write, iclass 38, count 0 2006.229.11:35:49.47#ibcon#enter sib2, iclass 38, count 0 2006.229.11:35:49.47#ibcon#flushed, iclass 38, count 0 2006.229.11:35:49.47#ibcon#about to write, iclass 38, count 0 2006.229.11:35:49.47#ibcon#wrote, iclass 38, count 0 2006.229.11:35:49.47#ibcon#about to read 3, iclass 38, count 0 2006.229.11:35:49.51#ibcon#read 3, iclass 38, count 0 2006.229.11:35:49.51#ibcon#about to read 4, iclass 38, count 0 2006.229.11:35:49.51#ibcon#read 4, iclass 38, count 0 2006.229.11:35:49.51#ibcon#about to read 5, iclass 38, count 0 2006.229.11:35:49.51#ibcon#read 5, iclass 38, count 0 2006.229.11:35:49.51#ibcon#about to read 6, iclass 38, count 0 2006.229.11:35:49.51#ibcon#read 6, iclass 38, count 0 2006.229.11:35:49.51#ibcon#end of sib2, iclass 38, count 0 2006.229.11:35:49.51#ibcon#*after write, iclass 38, count 0 2006.229.11:35:49.51#ibcon#*before return 0, iclass 38, count 0 2006.229.11:35:49.51#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:49.51#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:49.51#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.11:35:49.51#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.11:35:49.51$vck44/va=2,7 2006.229.11:35:49.51#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.11:35:49.51#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.11:35:49.51#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:49.51#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:49.57#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:49.57#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:49.57#ibcon#enter wrdev, iclass 40, count 2 2006.229.11:35:49.57#ibcon#first serial, iclass 40, count 2 2006.229.11:35:49.57#ibcon#enter sib2, iclass 40, count 2 2006.229.11:35:49.57#ibcon#flushed, iclass 40, count 2 2006.229.11:35:49.57#ibcon#about to write, iclass 40, count 2 2006.229.11:35:49.57#ibcon#wrote, iclass 40, count 2 2006.229.11:35:49.57#ibcon#about to read 3, iclass 40, count 2 2006.229.11:35:49.59#ibcon#read 3, iclass 40, count 2 2006.229.11:35:49.59#ibcon#about to read 4, iclass 40, count 2 2006.229.11:35:49.59#ibcon#read 4, iclass 40, count 2 2006.229.11:35:49.59#ibcon#about to read 5, iclass 40, count 2 2006.229.11:35:49.59#ibcon#read 5, iclass 40, count 2 2006.229.11:35:49.59#ibcon#about to read 6, iclass 40, count 2 2006.229.11:35:49.59#ibcon#read 6, iclass 40, count 2 2006.229.11:35:49.59#ibcon#end of sib2, iclass 40, count 2 2006.229.11:35:49.59#ibcon#*mode == 0, iclass 40, count 2 2006.229.11:35:49.59#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.11:35:49.59#ibcon#[25=AT02-07\r\n] 2006.229.11:35:49.59#ibcon#*before write, iclass 40, count 2 2006.229.11:35:49.59#ibcon#enter sib2, iclass 40, count 2 2006.229.11:35:49.59#ibcon#flushed, iclass 40, count 2 2006.229.11:35:49.59#ibcon#about to write, iclass 40, count 2 2006.229.11:35:49.59#ibcon#wrote, iclass 40, count 2 2006.229.11:35:49.59#ibcon#about to read 3, iclass 40, count 2 2006.229.11:35:49.62#ibcon#read 3, iclass 40, count 2 2006.229.11:35:49.62#ibcon#about to read 4, iclass 40, count 2 2006.229.11:35:49.62#ibcon#read 4, iclass 40, count 2 2006.229.11:35:49.62#ibcon#about to read 5, iclass 40, count 2 2006.229.11:35:49.62#ibcon#read 5, iclass 40, count 2 2006.229.11:35:49.62#ibcon#about to read 6, iclass 40, count 2 2006.229.11:35:49.62#ibcon#read 6, iclass 40, count 2 2006.229.11:35:49.62#ibcon#end of sib2, iclass 40, count 2 2006.229.11:35:49.62#ibcon#*after write, iclass 40, count 2 2006.229.11:35:49.62#ibcon#*before return 0, iclass 40, count 2 2006.229.11:35:49.62#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:49.62#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:49.62#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.11:35:49.62#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:49.62#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:49.74#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:49.74#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:49.74#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:35:49.74#ibcon#first serial, iclass 40, count 0 2006.229.11:35:49.74#ibcon#enter sib2, iclass 40, count 0 2006.229.11:35:49.74#ibcon#flushed, iclass 40, count 0 2006.229.11:35:49.74#ibcon#about to write, iclass 40, count 0 2006.229.11:35:49.74#ibcon#wrote, iclass 40, count 0 2006.229.11:35:49.74#ibcon#about to read 3, iclass 40, count 0 2006.229.11:35:49.76#ibcon#read 3, iclass 40, count 0 2006.229.11:35:49.76#ibcon#about to read 4, iclass 40, count 0 2006.229.11:35:49.76#ibcon#read 4, iclass 40, count 0 2006.229.11:35:49.76#ibcon#about to read 5, iclass 40, count 0 2006.229.11:35:49.76#ibcon#read 5, iclass 40, count 0 2006.229.11:35:49.76#ibcon#about to read 6, iclass 40, count 0 2006.229.11:35:49.76#ibcon#read 6, iclass 40, count 0 2006.229.11:35:49.76#ibcon#end of sib2, iclass 40, count 0 2006.229.11:35:49.76#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:35:49.76#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:35:49.76#ibcon#[25=USB\r\n] 2006.229.11:35:49.76#ibcon#*before write, iclass 40, count 0 2006.229.11:35:49.76#ibcon#enter sib2, iclass 40, count 0 2006.229.11:35:49.76#ibcon#flushed, iclass 40, count 0 2006.229.11:35:49.76#ibcon#about to write, iclass 40, count 0 2006.229.11:35:49.76#ibcon#wrote, iclass 40, count 0 2006.229.11:35:49.76#ibcon#about to read 3, iclass 40, count 0 2006.229.11:35:49.79#ibcon#read 3, iclass 40, count 0 2006.229.11:35:49.79#ibcon#about to read 4, iclass 40, count 0 2006.229.11:35:49.79#ibcon#read 4, iclass 40, count 0 2006.229.11:35:49.79#ibcon#about to read 5, iclass 40, count 0 2006.229.11:35:49.79#ibcon#read 5, iclass 40, count 0 2006.229.11:35:49.79#ibcon#about to read 6, iclass 40, count 0 2006.229.11:35:49.79#ibcon#read 6, iclass 40, count 0 2006.229.11:35:49.79#ibcon#end of sib2, iclass 40, count 0 2006.229.11:35:49.79#ibcon#*after write, iclass 40, count 0 2006.229.11:35:49.79#ibcon#*before return 0, iclass 40, count 0 2006.229.11:35:49.79#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:49.79#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:49.79#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:35:49.79#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:35:49.79$vck44/valo=3,564.99 2006.229.11:35:49.79#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.11:35:49.79#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.11:35:49.79#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:49.79#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:49.79#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:49.79#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:49.79#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:35:49.79#ibcon#first serial, iclass 4, count 0 2006.229.11:35:49.79#ibcon#enter sib2, iclass 4, count 0 2006.229.11:35:49.79#ibcon#flushed, iclass 4, count 0 2006.229.11:35:49.79#ibcon#about to write, iclass 4, count 0 2006.229.11:35:49.79#ibcon#wrote, iclass 4, count 0 2006.229.11:35:49.79#ibcon#about to read 3, iclass 4, count 0 2006.229.11:35:49.81#ibcon#read 3, iclass 4, count 0 2006.229.11:35:49.81#ibcon#about to read 4, iclass 4, count 0 2006.229.11:35:49.81#ibcon#read 4, iclass 4, count 0 2006.229.11:35:49.81#ibcon#about to read 5, iclass 4, count 0 2006.229.11:35:49.81#ibcon#read 5, iclass 4, count 0 2006.229.11:35:49.81#ibcon#about to read 6, iclass 4, count 0 2006.229.11:35:49.81#ibcon#read 6, iclass 4, count 0 2006.229.11:35:49.81#ibcon#end of sib2, iclass 4, count 0 2006.229.11:35:49.81#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:35:49.81#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:35:49.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:35:49.81#ibcon#*before write, iclass 4, count 0 2006.229.11:35:49.81#ibcon#enter sib2, iclass 4, count 0 2006.229.11:35:49.81#ibcon#flushed, iclass 4, count 0 2006.229.11:35:49.81#ibcon#about to write, iclass 4, count 0 2006.229.11:35:49.81#ibcon#wrote, iclass 4, count 0 2006.229.11:35:49.81#ibcon#about to read 3, iclass 4, count 0 2006.229.11:35:49.85#ibcon#read 3, iclass 4, count 0 2006.229.11:35:49.85#ibcon#about to read 4, iclass 4, count 0 2006.229.11:35:49.85#ibcon#read 4, iclass 4, count 0 2006.229.11:35:49.85#ibcon#about to read 5, iclass 4, count 0 2006.229.11:35:49.85#ibcon#read 5, iclass 4, count 0 2006.229.11:35:49.85#ibcon#about to read 6, iclass 4, count 0 2006.229.11:35:49.85#ibcon#read 6, iclass 4, count 0 2006.229.11:35:49.85#ibcon#end of sib2, iclass 4, count 0 2006.229.11:35:49.85#ibcon#*after write, iclass 4, count 0 2006.229.11:35:49.85#ibcon#*before return 0, iclass 4, count 0 2006.229.11:35:49.85#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:49.85#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:49.85#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:35:49.85#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:35:49.85$vck44/va=3,6 2006.229.11:35:49.85#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.11:35:49.85#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.11:35:49.85#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:49.85#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:49.91#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:49.91#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:49.91#ibcon#enter wrdev, iclass 6, count 2 2006.229.11:35:49.91#ibcon#first serial, iclass 6, count 2 2006.229.11:35:49.91#ibcon#enter sib2, iclass 6, count 2 2006.229.11:35:49.91#ibcon#flushed, iclass 6, count 2 2006.229.11:35:49.91#ibcon#about to write, iclass 6, count 2 2006.229.11:35:49.91#ibcon#wrote, iclass 6, count 2 2006.229.11:35:49.91#ibcon#about to read 3, iclass 6, count 2 2006.229.11:35:49.93#ibcon#read 3, iclass 6, count 2 2006.229.11:35:49.93#ibcon#about to read 4, iclass 6, count 2 2006.229.11:35:49.93#ibcon#read 4, iclass 6, count 2 2006.229.11:35:49.93#ibcon#about to read 5, iclass 6, count 2 2006.229.11:35:49.93#ibcon#read 5, iclass 6, count 2 2006.229.11:35:49.93#ibcon#about to read 6, iclass 6, count 2 2006.229.11:35:49.93#ibcon#read 6, iclass 6, count 2 2006.229.11:35:49.93#ibcon#end of sib2, iclass 6, count 2 2006.229.11:35:49.93#ibcon#*mode == 0, iclass 6, count 2 2006.229.11:35:49.93#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.11:35:49.93#ibcon#[25=AT03-06\r\n] 2006.229.11:35:49.93#ibcon#*before write, iclass 6, count 2 2006.229.11:35:49.93#ibcon#enter sib2, iclass 6, count 2 2006.229.11:35:49.93#ibcon#flushed, iclass 6, count 2 2006.229.11:35:49.93#ibcon#about to write, iclass 6, count 2 2006.229.11:35:49.93#ibcon#wrote, iclass 6, count 2 2006.229.11:35:49.93#ibcon#about to read 3, iclass 6, count 2 2006.229.11:35:49.96#ibcon#read 3, iclass 6, count 2 2006.229.11:35:49.96#ibcon#about to read 4, iclass 6, count 2 2006.229.11:35:49.96#ibcon#read 4, iclass 6, count 2 2006.229.11:35:49.96#ibcon#about to read 5, iclass 6, count 2 2006.229.11:35:49.96#ibcon#read 5, iclass 6, count 2 2006.229.11:35:49.96#ibcon#about to read 6, iclass 6, count 2 2006.229.11:35:49.96#ibcon#read 6, iclass 6, count 2 2006.229.11:35:49.96#ibcon#end of sib2, iclass 6, count 2 2006.229.11:35:49.96#ibcon#*after write, iclass 6, count 2 2006.229.11:35:49.96#ibcon#*before return 0, iclass 6, count 2 2006.229.11:35:49.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:49.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:49.96#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.11:35:49.96#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:49.96#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:50.08#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:50.08#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:50.08#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:35:50.08#ibcon#first serial, iclass 6, count 0 2006.229.11:35:50.08#ibcon#enter sib2, iclass 6, count 0 2006.229.11:35:50.08#ibcon#flushed, iclass 6, count 0 2006.229.11:35:50.08#ibcon#about to write, iclass 6, count 0 2006.229.11:35:50.08#ibcon#wrote, iclass 6, count 0 2006.229.11:35:50.08#ibcon#about to read 3, iclass 6, count 0 2006.229.11:35:50.10#ibcon#read 3, iclass 6, count 0 2006.229.11:35:50.10#ibcon#about to read 4, iclass 6, count 0 2006.229.11:35:50.10#ibcon#read 4, iclass 6, count 0 2006.229.11:35:50.10#ibcon#about to read 5, iclass 6, count 0 2006.229.11:35:50.10#ibcon#read 5, iclass 6, count 0 2006.229.11:35:50.10#ibcon#about to read 6, iclass 6, count 0 2006.229.11:35:50.10#ibcon#read 6, iclass 6, count 0 2006.229.11:35:50.10#ibcon#end of sib2, iclass 6, count 0 2006.229.11:35:50.10#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:35:50.10#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:35:50.10#ibcon#[25=USB\r\n] 2006.229.11:35:50.10#ibcon#*before write, iclass 6, count 0 2006.229.11:35:50.10#ibcon#enter sib2, iclass 6, count 0 2006.229.11:35:50.10#ibcon#flushed, iclass 6, count 0 2006.229.11:35:50.10#ibcon#about to write, iclass 6, count 0 2006.229.11:35:50.10#ibcon#wrote, iclass 6, count 0 2006.229.11:35:50.10#ibcon#about to read 3, iclass 6, count 0 2006.229.11:35:50.13#ibcon#read 3, iclass 6, count 0 2006.229.11:35:50.13#ibcon#about to read 4, iclass 6, count 0 2006.229.11:35:50.13#ibcon#read 4, iclass 6, count 0 2006.229.11:35:50.13#ibcon#about to read 5, iclass 6, count 0 2006.229.11:35:50.13#ibcon#read 5, iclass 6, count 0 2006.229.11:35:50.13#ibcon#about to read 6, iclass 6, count 0 2006.229.11:35:50.13#ibcon#read 6, iclass 6, count 0 2006.229.11:35:50.13#ibcon#end of sib2, iclass 6, count 0 2006.229.11:35:50.13#ibcon#*after write, iclass 6, count 0 2006.229.11:35:50.13#ibcon#*before return 0, iclass 6, count 0 2006.229.11:35:50.13#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:50.13#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:50.13#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:35:50.13#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:35:50.13$vck44/valo=4,624.99 2006.229.11:35:50.13#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.11:35:50.13#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.11:35:50.13#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:50.13#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:50.13#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:50.13#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:50.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:35:50.13#ibcon#first serial, iclass 10, count 0 2006.229.11:35:50.13#ibcon#enter sib2, iclass 10, count 0 2006.229.11:35:50.13#ibcon#flushed, iclass 10, count 0 2006.229.11:35:50.13#ibcon#about to write, iclass 10, count 0 2006.229.11:35:50.13#ibcon#wrote, iclass 10, count 0 2006.229.11:35:50.13#ibcon#about to read 3, iclass 10, count 0 2006.229.11:35:50.15#ibcon#read 3, iclass 10, count 0 2006.229.11:35:50.15#ibcon#about to read 4, iclass 10, count 0 2006.229.11:35:50.15#ibcon#read 4, iclass 10, count 0 2006.229.11:35:50.15#ibcon#about to read 5, iclass 10, count 0 2006.229.11:35:50.15#ibcon#read 5, iclass 10, count 0 2006.229.11:35:50.15#ibcon#about to read 6, iclass 10, count 0 2006.229.11:35:50.15#ibcon#read 6, iclass 10, count 0 2006.229.11:35:50.15#ibcon#end of sib2, iclass 10, count 0 2006.229.11:35:50.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:35:50.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:35:50.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:35:50.15#ibcon#*before write, iclass 10, count 0 2006.229.11:35:50.15#ibcon#enter sib2, iclass 10, count 0 2006.229.11:35:50.15#ibcon#flushed, iclass 10, count 0 2006.229.11:35:50.15#ibcon#about to write, iclass 10, count 0 2006.229.11:35:50.15#ibcon#wrote, iclass 10, count 0 2006.229.11:35:50.15#ibcon#about to read 3, iclass 10, count 0 2006.229.11:35:50.19#ibcon#read 3, iclass 10, count 0 2006.229.11:35:50.19#ibcon#about to read 4, iclass 10, count 0 2006.229.11:35:50.19#ibcon#read 4, iclass 10, count 0 2006.229.11:35:50.19#ibcon#about to read 5, iclass 10, count 0 2006.229.11:35:50.19#ibcon#read 5, iclass 10, count 0 2006.229.11:35:50.19#ibcon#about to read 6, iclass 10, count 0 2006.229.11:35:50.19#ibcon#read 6, iclass 10, count 0 2006.229.11:35:50.19#ibcon#end of sib2, iclass 10, count 0 2006.229.11:35:50.19#ibcon#*after write, iclass 10, count 0 2006.229.11:35:50.19#ibcon#*before return 0, iclass 10, count 0 2006.229.11:35:50.19#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:50.19#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:50.19#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:35:50.19#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:35:50.19$vck44/va=4,7 2006.229.11:35:50.19#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.11:35:50.19#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.11:35:50.19#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:50.19#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:50.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:50.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:50.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.11:35:50.25#ibcon#first serial, iclass 12, count 2 2006.229.11:35:50.25#ibcon#enter sib2, iclass 12, count 2 2006.229.11:35:50.25#ibcon#flushed, iclass 12, count 2 2006.229.11:35:50.25#ibcon#about to write, iclass 12, count 2 2006.229.11:35:50.25#ibcon#wrote, iclass 12, count 2 2006.229.11:35:50.25#ibcon#about to read 3, iclass 12, count 2 2006.229.11:35:50.27#ibcon#read 3, iclass 12, count 2 2006.229.11:35:50.27#ibcon#about to read 4, iclass 12, count 2 2006.229.11:35:50.27#ibcon#read 4, iclass 12, count 2 2006.229.11:35:50.27#ibcon#about to read 5, iclass 12, count 2 2006.229.11:35:50.27#ibcon#read 5, iclass 12, count 2 2006.229.11:35:50.27#ibcon#about to read 6, iclass 12, count 2 2006.229.11:35:50.27#ibcon#read 6, iclass 12, count 2 2006.229.11:35:50.27#ibcon#end of sib2, iclass 12, count 2 2006.229.11:35:50.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.11:35:50.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.11:35:50.27#ibcon#[25=AT04-07\r\n] 2006.229.11:35:50.27#ibcon#*before write, iclass 12, count 2 2006.229.11:35:50.27#ibcon#enter sib2, iclass 12, count 2 2006.229.11:35:50.27#ibcon#flushed, iclass 12, count 2 2006.229.11:35:50.27#ibcon#about to write, iclass 12, count 2 2006.229.11:35:50.27#ibcon#wrote, iclass 12, count 2 2006.229.11:35:50.27#ibcon#about to read 3, iclass 12, count 2 2006.229.11:35:50.30#ibcon#read 3, iclass 12, count 2 2006.229.11:35:50.30#ibcon#about to read 4, iclass 12, count 2 2006.229.11:35:50.30#ibcon#read 4, iclass 12, count 2 2006.229.11:35:50.30#ibcon#about to read 5, iclass 12, count 2 2006.229.11:35:50.30#ibcon#read 5, iclass 12, count 2 2006.229.11:35:50.30#ibcon#about to read 6, iclass 12, count 2 2006.229.11:35:50.30#ibcon#read 6, iclass 12, count 2 2006.229.11:35:50.30#ibcon#end of sib2, iclass 12, count 2 2006.229.11:35:50.30#ibcon#*after write, iclass 12, count 2 2006.229.11:35:50.30#ibcon#*before return 0, iclass 12, count 2 2006.229.11:35:50.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:50.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:50.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.11:35:50.30#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:50.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:50.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:50.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:50.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:35:50.42#ibcon#first serial, iclass 12, count 0 2006.229.11:35:50.42#ibcon#enter sib2, iclass 12, count 0 2006.229.11:35:50.42#ibcon#flushed, iclass 12, count 0 2006.229.11:35:50.42#ibcon#about to write, iclass 12, count 0 2006.229.11:35:50.42#ibcon#wrote, iclass 12, count 0 2006.229.11:35:50.42#ibcon#about to read 3, iclass 12, count 0 2006.229.11:35:50.44#ibcon#read 3, iclass 12, count 0 2006.229.11:35:50.44#ibcon#about to read 4, iclass 12, count 0 2006.229.11:35:50.44#ibcon#read 4, iclass 12, count 0 2006.229.11:35:50.44#ibcon#about to read 5, iclass 12, count 0 2006.229.11:35:50.44#ibcon#read 5, iclass 12, count 0 2006.229.11:35:50.44#ibcon#about to read 6, iclass 12, count 0 2006.229.11:35:50.44#ibcon#read 6, iclass 12, count 0 2006.229.11:35:50.44#ibcon#end of sib2, iclass 12, count 0 2006.229.11:35:50.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:35:50.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:35:50.44#ibcon#[25=USB\r\n] 2006.229.11:35:50.44#ibcon#*before write, iclass 12, count 0 2006.229.11:35:50.44#ibcon#enter sib2, iclass 12, count 0 2006.229.11:35:50.44#ibcon#flushed, iclass 12, count 0 2006.229.11:35:50.44#ibcon#about to write, iclass 12, count 0 2006.229.11:35:50.44#ibcon#wrote, iclass 12, count 0 2006.229.11:35:50.44#ibcon#about to read 3, iclass 12, count 0 2006.229.11:35:50.47#ibcon#read 3, iclass 12, count 0 2006.229.11:35:50.47#ibcon#about to read 4, iclass 12, count 0 2006.229.11:35:50.47#ibcon#read 4, iclass 12, count 0 2006.229.11:35:50.47#ibcon#about to read 5, iclass 12, count 0 2006.229.11:35:50.47#ibcon#read 5, iclass 12, count 0 2006.229.11:35:50.47#ibcon#about to read 6, iclass 12, count 0 2006.229.11:35:50.47#ibcon#read 6, iclass 12, count 0 2006.229.11:35:50.47#ibcon#end of sib2, iclass 12, count 0 2006.229.11:35:50.47#ibcon#*after write, iclass 12, count 0 2006.229.11:35:50.47#ibcon#*before return 0, iclass 12, count 0 2006.229.11:35:50.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:50.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:50.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:35:50.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:35:50.47$vck44/valo=5,734.99 2006.229.11:35:50.47#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.11:35:50.47#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.11:35:50.47#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:50.47#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:35:50.47#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:35:50.47#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:35:50.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:35:50.47#ibcon#first serial, iclass 14, count 0 2006.229.11:35:50.47#ibcon#enter sib2, iclass 14, count 0 2006.229.11:35:50.47#ibcon#flushed, iclass 14, count 0 2006.229.11:35:50.47#ibcon#about to write, iclass 14, count 0 2006.229.11:35:50.47#ibcon#wrote, iclass 14, count 0 2006.229.11:35:50.47#ibcon#about to read 3, iclass 14, count 0 2006.229.11:35:50.49#ibcon#read 3, iclass 14, count 0 2006.229.11:35:50.49#ibcon#about to read 4, iclass 14, count 0 2006.229.11:35:50.49#ibcon#read 4, iclass 14, count 0 2006.229.11:35:50.49#ibcon#about to read 5, iclass 14, count 0 2006.229.11:35:50.49#ibcon#read 5, iclass 14, count 0 2006.229.11:35:50.49#ibcon#about to read 6, iclass 14, count 0 2006.229.11:35:50.49#ibcon#read 6, iclass 14, count 0 2006.229.11:35:50.49#ibcon#end of sib2, iclass 14, count 0 2006.229.11:35:50.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:35:50.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:35:50.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:35:50.49#ibcon#*before write, iclass 14, count 0 2006.229.11:35:50.49#ibcon#enter sib2, iclass 14, count 0 2006.229.11:35:50.49#ibcon#flushed, iclass 14, count 0 2006.229.11:35:50.49#ibcon#about to write, iclass 14, count 0 2006.229.11:35:50.49#ibcon#wrote, iclass 14, count 0 2006.229.11:35:50.49#ibcon#about to read 3, iclass 14, count 0 2006.229.11:35:50.53#ibcon#read 3, iclass 14, count 0 2006.229.11:35:50.53#ibcon#about to read 4, iclass 14, count 0 2006.229.11:35:50.53#ibcon#read 4, iclass 14, count 0 2006.229.11:35:50.53#ibcon#about to read 5, iclass 14, count 0 2006.229.11:35:50.53#ibcon#read 5, iclass 14, count 0 2006.229.11:35:50.53#ibcon#about to read 6, iclass 14, count 0 2006.229.11:35:50.53#ibcon#read 6, iclass 14, count 0 2006.229.11:35:50.53#ibcon#end of sib2, iclass 14, count 0 2006.229.11:35:50.53#ibcon#*after write, iclass 14, count 0 2006.229.11:35:50.53#ibcon#*before return 0, iclass 14, count 0 2006.229.11:35:50.53#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:35:50.53#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:35:50.53#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:35:50.53#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:35:50.53$vck44/va=5,4 2006.229.11:35:50.53#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.11:35:50.53#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.11:35:50.53#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:50.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:35:50.59#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:35:50.59#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:35:50.59#ibcon#enter wrdev, iclass 16, count 2 2006.229.11:35:50.59#ibcon#first serial, iclass 16, count 2 2006.229.11:35:50.59#ibcon#enter sib2, iclass 16, count 2 2006.229.11:35:50.59#ibcon#flushed, iclass 16, count 2 2006.229.11:35:50.59#ibcon#about to write, iclass 16, count 2 2006.229.11:35:50.59#ibcon#wrote, iclass 16, count 2 2006.229.11:35:50.59#ibcon#about to read 3, iclass 16, count 2 2006.229.11:35:50.61#ibcon#read 3, iclass 16, count 2 2006.229.11:35:50.61#ibcon#about to read 4, iclass 16, count 2 2006.229.11:35:50.61#ibcon#read 4, iclass 16, count 2 2006.229.11:35:50.61#ibcon#about to read 5, iclass 16, count 2 2006.229.11:35:50.61#ibcon#read 5, iclass 16, count 2 2006.229.11:35:50.61#ibcon#about to read 6, iclass 16, count 2 2006.229.11:35:50.61#ibcon#read 6, iclass 16, count 2 2006.229.11:35:50.61#ibcon#end of sib2, iclass 16, count 2 2006.229.11:35:50.61#ibcon#*mode == 0, iclass 16, count 2 2006.229.11:35:50.61#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.11:35:50.61#ibcon#[25=AT05-04\r\n] 2006.229.11:35:50.61#ibcon#*before write, iclass 16, count 2 2006.229.11:35:50.61#ibcon#enter sib2, iclass 16, count 2 2006.229.11:35:50.61#ibcon#flushed, iclass 16, count 2 2006.229.11:35:50.61#ibcon#about to write, iclass 16, count 2 2006.229.11:35:50.61#ibcon#wrote, iclass 16, count 2 2006.229.11:35:50.61#ibcon#about to read 3, iclass 16, count 2 2006.229.11:35:50.64#ibcon#read 3, iclass 16, count 2 2006.229.11:35:50.64#ibcon#about to read 4, iclass 16, count 2 2006.229.11:35:50.64#ibcon#read 4, iclass 16, count 2 2006.229.11:35:50.64#ibcon#about to read 5, iclass 16, count 2 2006.229.11:35:50.64#ibcon#read 5, iclass 16, count 2 2006.229.11:35:50.64#ibcon#about to read 6, iclass 16, count 2 2006.229.11:35:50.64#ibcon#read 6, iclass 16, count 2 2006.229.11:35:50.64#ibcon#end of sib2, iclass 16, count 2 2006.229.11:35:50.64#ibcon#*after write, iclass 16, count 2 2006.229.11:35:50.64#ibcon#*before return 0, iclass 16, count 2 2006.229.11:35:50.64#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:35:50.64#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.11:35:50.64#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.11:35:50.64#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:50.64#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:35:50.76#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:35:50.76#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:35:50.76#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:35:50.76#ibcon#first serial, iclass 16, count 0 2006.229.11:35:50.76#ibcon#enter sib2, iclass 16, count 0 2006.229.11:35:50.76#ibcon#flushed, iclass 16, count 0 2006.229.11:35:50.76#ibcon#about to write, iclass 16, count 0 2006.229.11:35:50.76#ibcon#wrote, iclass 16, count 0 2006.229.11:35:50.76#ibcon#about to read 3, iclass 16, count 0 2006.229.11:35:50.78#ibcon#read 3, iclass 16, count 0 2006.229.11:35:50.78#ibcon#about to read 4, iclass 16, count 0 2006.229.11:35:50.78#ibcon#read 4, iclass 16, count 0 2006.229.11:35:50.78#ibcon#about to read 5, iclass 16, count 0 2006.229.11:35:50.78#ibcon#read 5, iclass 16, count 0 2006.229.11:35:50.78#ibcon#about to read 6, iclass 16, count 0 2006.229.11:35:50.78#ibcon#read 6, iclass 16, count 0 2006.229.11:35:50.78#ibcon#end of sib2, iclass 16, count 0 2006.229.11:35:50.78#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:35:50.78#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:35:50.78#ibcon#[25=USB\r\n] 2006.229.11:35:50.78#ibcon#*before write, iclass 16, count 0 2006.229.11:35:50.78#ibcon#enter sib2, iclass 16, count 0 2006.229.11:35:50.78#ibcon#flushed, iclass 16, count 0 2006.229.11:35:50.78#ibcon#about to write, iclass 16, count 0 2006.229.11:35:50.78#ibcon#wrote, iclass 16, count 0 2006.229.11:35:50.78#ibcon#about to read 3, iclass 16, count 0 2006.229.11:35:50.81#ibcon#read 3, iclass 16, count 0 2006.229.11:35:50.81#ibcon#about to read 4, iclass 16, count 0 2006.229.11:35:50.81#ibcon#read 4, iclass 16, count 0 2006.229.11:35:50.81#ibcon#about to read 5, iclass 16, count 0 2006.229.11:35:50.81#ibcon#read 5, iclass 16, count 0 2006.229.11:35:50.81#ibcon#about to read 6, iclass 16, count 0 2006.229.11:35:50.81#ibcon#read 6, iclass 16, count 0 2006.229.11:35:50.81#ibcon#end of sib2, iclass 16, count 0 2006.229.11:35:50.81#ibcon#*after write, iclass 16, count 0 2006.229.11:35:50.81#ibcon#*before return 0, iclass 16, count 0 2006.229.11:35:50.81#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:35:50.81#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.11:35:50.81#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:35:50.81#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:35:50.81$vck44/valo=6,814.99 2006.229.11:35:50.81#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.11:35:50.81#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.11:35:50.81#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:50.81#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:50.81#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:50.81#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:50.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:35:50.81#ibcon#first serial, iclass 18, count 0 2006.229.11:35:50.81#ibcon#enter sib2, iclass 18, count 0 2006.229.11:35:50.81#ibcon#flushed, iclass 18, count 0 2006.229.11:35:50.81#ibcon#about to write, iclass 18, count 0 2006.229.11:35:50.81#ibcon#wrote, iclass 18, count 0 2006.229.11:35:50.81#ibcon#about to read 3, iclass 18, count 0 2006.229.11:35:50.83#ibcon#read 3, iclass 18, count 0 2006.229.11:35:50.83#ibcon#about to read 4, iclass 18, count 0 2006.229.11:35:50.83#ibcon#read 4, iclass 18, count 0 2006.229.11:35:50.83#ibcon#about to read 5, iclass 18, count 0 2006.229.11:35:50.83#ibcon#read 5, iclass 18, count 0 2006.229.11:35:50.83#ibcon#about to read 6, iclass 18, count 0 2006.229.11:35:50.83#ibcon#read 6, iclass 18, count 0 2006.229.11:35:50.83#ibcon#end of sib2, iclass 18, count 0 2006.229.11:35:50.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:35:50.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:35:50.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:35:50.83#ibcon#*before write, iclass 18, count 0 2006.229.11:35:50.83#ibcon#enter sib2, iclass 18, count 0 2006.229.11:35:50.83#ibcon#flushed, iclass 18, count 0 2006.229.11:35:50.83#ibcon#about to write, iclass 18, count 0 2006.229.11:35:50.83#ibcon#wrote, iclass 18, count 0 2006.229.11:35:50.83#ibcon#about to read 3, iclass 18, count 0 2006.229.11:35:50.87#ibcon#read 3, iclass 18, count 0 2006.229.11:35:50.87#ibcon#about to read 4, iclass 18, count 0 2006.229.11:35:50.87#ibcon#read 4, iclass 18, count 0 2006.229.11:35:50.87#ibcon#about to read 5, iclass 18, count 0 2006.229.11:35:50.87#ibcon#read 5, iclass 18, count 0 2006.229.11:35:50.87#ibcon#about to read 6, iclass 18, count 0 2006.229.11:35:50.87#ibcon#read 6, iclass 18, count 0 2006.229.11:35:50.87#ibcon#end of sib2, iclass 18, count 0 2006.229.11:35:50.87#ibcon#*after write, iclass 18, count 0 2006.229.11:35:50.87#ibcon#*before return 0, iclass 18, count 0 2006.229.11:35:50.87#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:50.87#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:50.87#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:35:50.87#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:35:50.87$vck44/va=6,4 2006.229.11:35:50.87#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.11:35:50.87#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.11:35:50.87#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:50.87#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:50.93#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:50.93#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:50.93#ibcon#enter wrdev, iclass 20, count 2 2006.229.11:35:50.93#ibcon#first serial, iclass 20, count 2 2006.229.11:35:50.93#ibcon#enter sib2, iclass 20, count 2 2006.229.11:35:50.93#ibcon#flushed, iclass 20, count 2 2006.229.11:35:50.93#ibcon#about to write, iclass 20, count 2 2006.229.11:35:50.93#ibcon#wrote, iclass 20, count 2 2006.229.11:35:50.93#ibcon#about to read 3, iclass 20, count 2 2006.229.11:35:50.95#ibcon#read 3, iclass 20, count 2 2006.229.11:35:50.95#ibcon#about to read 4, iclass 20, count 2 2006.229.11:35:50.95#ibcon#read 4, iclass 20, count 2 2006.229.11:35:50.95#ibcon#about to read 5, iclass 20, count 2 2006.229.11:35:50.95#ibcon#read 5, iclass 20, count 2 2006.229.11:35:50.95#ibcon#about to read 6, iclass 20, count 2 2006.229.11:35:50.95#ibcon#read 6, iclass 20, count 2 2006.229.11:35:50.95#ibcon#end of sib2, iclass 20, count 2 2006.229.11:35:50.95#ibcon#*mode == 0, iclass 20, count 2 2006.229.11:35:50.95#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.11:35:50.95#ibcon#[25=AT06-04\r\n] 2006.229.11:35:50.95#ibcon#*before write, iclass 20, count 2 2006.229.11:35:50.95#ibcon#enter sib2, iclass 20, count 2 2006.229.11:35:50.95#ibcon#flushed, iclass 20, count 2 2006.229.11:35:50.95#ibcon#about to write, iclass 20, count 2 2006.229.11:35:50.95#ibcon#wrote, iclass 20, count 2 2006.229.11:35:50.95#ibcon#about to read 3, iclass 20, count 2 2006.229.11:35:50.98#ibcon#read 3, iclass 20, count 2 2006.229.11:35:50.98#ibcon#about to read 4, iclass 20, count 2 2006.229.11:35:50.98#ibcon#read 4, iclass 20, count 2 2006.229.11:35:50.98#ibcon#about to read 5, iclass 20, count 2 2006.229.11:35:50.98#ibcon#read 5, iclass 20, count 2 2006.229.11:35:50.98#ibcon#about to read 6, iclass 20, count 2 2006.229.11:35:50.98#ibcon#read 6, iclass 20, count 2 2006.229.11:35:50.98#ibcon#end of sib2, iclass 20, count 2 2006.229.11:35:50.98#ibcon#*after write, iclass 20, count 2 2006.229.11:35:50.98#ibcon#*before return 0, iclass 20, count 2 2006.229.11:35:50.98#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:50.98#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:50.98#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.11:35:50.98#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:50.98#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:51.10#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:51.10#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:51.10#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:35:51.10#ibcon#first serial, iclass 20, count 0 2006.229.11:35:51.10#ibcon#enter sib2, iclass 20, count 0 2006.229.11:35:51.10#ibcon#flushed, iclass 20, count 0 2006.229.11:35:51.10#ibcon#about to write, iclass 20, count 0 2006.229.11:35:51.10#ibcon#wrote, iclass 20, count 0 2006.229.11:35:51.10#ibcon#about to read 3, iclass 20, count 0 2006.229.11:35:51.12#ibcon#read 3, iclass 20, count 0 2006.229.11:35:51.12#ibcon#about to read 4, iclass 20, count 0 2006.229.11:35:51.12#ibcon#read 4, iclass 20, count 0 2006.229.11:35:51.12#ibcon#about to read 5, iclass 20, count 0 2006.229.11:35:51.12#ibcon#read 5, iclass 20, count 0 2006.229.11:35:51.12#ibcon#about to read 6, iclass 20, count 0 2006.229.11:35:51.12#ibcon#read 6, iclass 20, count 0 2006.229.11:35:51.12#ibcon#end of sib2, iclass 20, count 0 2006.229.11:35:51.12#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:35:51.12#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:35:51.12#ibcon#[25=USB\r\n] 2006.229.11:35:51.12#ibcon#*before write, iclass 20, count 0 2006.229.11:35:51.12#ibcon#enter sib2, iclass 20, count 0 2006.229.11:35:51.12#ibcon#flushed, iclass 20, count 0 2006.229.11:35:51.12#ibcon#about to write, iclass 20, count 0 2006.229.11:35:51.12#ibcon#wrote, iclass 20, count 0 2006.229.11:35:51.12#ibcon#about to read 3, iclass 20, count 0 2006.229.11:35:51.15#ibcon#read 3, iclass 20, count 0 2006.229.11:35:51.15#ibcon#about to read 4, iclass 20, count 0 2006.229.11:35:51.15#ibcon#read 4, iclass 20, count 0 2006.229.11:35:51.15#ibcon#about to read 5, iclass 20, count 0 2006.229.11:35:51.15#ibcon#read 5, iclass 20, count 0 2006.229.11:35:51.15#ibcon#about to read 6, iclass 20, count 0 2006.229.11:35:51.15#ibcon#read 6, iclass 20, count 0 2006.229.11:35:51.15#ibcon#end of sib2, iclass 20, count 0 2006.229.11:35:51.15#ibcon#*after write, iclass 20, count 0 2006.229.11:35:51.15#ibcon#*before return 0, iclass 20, count 0 2006.229.11:35:51.15#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:51.15#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:51.15#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:35:51.15#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:35:51.15$vck44/valo=7,864.99 2006.229.11:35:51.15#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.11:35:51.15#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.11:35:51.15#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:51.15#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:51.15#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:51.15#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:51.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:35:51.15#ibcon#first serial, iclass 22, count 0 2006.229.11:35:51.15#ibcon#enter sib2, iclass 22, count 0 2006.229.11:35:51.15#ibcon#flushed, iclass 22, count 0 2006.229.11:35:51.15#ibcon#about to write, iclass 22, count 0 2006.229.11:35:51.15#ibcon#wrote, iclass 22, count 0 2006.229.11:35:51.15#ibcon#about to read 3, iclass 22, count 0 2006.229.11:35:51.17#ibcon#read 3, iclass 22, count 0 2006.229.11:35:51.17#ibcon#about to read 4, iclass 22, count 0 2006.229.11:35:51.17#ibcon#read 4, iclass 22, count 0 2006.229.11:35:51.17#ibcon#about to read 5, iclass 22, count 0 2006.229.11:35:51.17#ibcon#read 5, iclass 22, count 0 2006.229.11:35:51.17#ibcon#about to read 6, iclass 22, count 0 2006.229.11:35:51.17#ibcon#read 6, iclass 22, count 0 2006.229.11:35:51.17#ibcon#end of sib2, iclass 22, count 0 2006.229.11:35:51.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:35:51.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:35:51.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:35:51.17#ibcon#*before write, iclass 22, count 0 2006.229.11:35:51.17#ibcon#enter sib2, iclass 22, count 0 2006.229.11:35:51.17#ibcon#flushed, iclass 22, count 0 2006.229.11:35:51.17#ibcon#about to write, iclass 22, count 0 2006.229.11:35:51.17#ibcon#wrote, iclass 22, count 0 2006.229.11:35:51.17#ibcon#about to read 3, iclass 22, count 0 2006.229.11:35:51.21#ibcon#read 3, iclass 22, count 0 2006.229.11:35:51.21#ibcon#about to read 4, iclass 22, count 0 2006.229.11:35:51.21#ibcon#read 4, iclass 22, count 0 2006.229.11:35:51.21#ibcon#about to read 5, iclass 22, count 0 2006.229.11:35:51.21#ibcon#read 5, iclass 22, count 0 2006.229.11:35:51.21#ibcon#about to read 6, iclass 22, count 0 2006.229.11:35:51.21#ibcon#read 6, iclass 22, count 0 2006.229.11:35:51.21#ibcon#end of sib2, iclass 22, count 0 2006.229.11:35:51.21#ibcon#*after write, iclass 22, count 0 2006.229.11:35:51.21#ibcon#*before return 0, iclass 22, count 0 2006.229.11:35:51.21#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:51.21#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:51.21#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:35:51.21#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:35:51.21$vck44/va=7,5 2006.229.11:35:51.21#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.11:35:51.21#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.11:35:51.21#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:51.21#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:51.27#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:51.27#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:51.27#ibcon#enter wrdev, iclass 24, count 2 2006.229.11:35:51.27#ibcon#first serial, iclass 24, count 2 2006.229.11:35:51.27#ibcon#enter sib2, iclass 24, count 2 2006.229.11:35:51.27#ibcon#flushed, iclass 24, count 2 2006.229.11:35:51.27#ibcon#about to write, iclass 24, count 2 2006.229.11:35:51.27#ibcon#wrote, iclass 24, count 2 2006.229.11:35:51.27#ibcon#about to read 3, iclass 24, count 2 2006.229.11:35:51.29#ibcon#read 3, iclass 24, count 2 2006.229.11:35:51.29#ibcon#about to read 4, iclass 24, count 2 2006.229.11:35:51.29#ibcon#read 4, iclass 24, count 2 2006.229.11:35:51.29#ibcon#about to read 5, iclass 24, count 2 2006.229.11:35:51.29#ibcon#read 5, iclass 24, count 2 2006.229.11:35:51.29#ibcon#about to read 6, iclass 24, count 2 2006.229.11:35:51.29#ibcon#read 6, iclass 24, count 2 2006.229.11:35:51.29#ibcon#end of sib2, iclass 24, count 2 2006.229.11:35:51.29#ibcon#*mode == 0, iclass 24, count 2 2006.229.11:35:51.29#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.11:35:51.29#ibcon#[25=AT07-05\r\n] 2006.229.11:35:51.29#ibcon#*before write, iclass 24, count 2 2006.229.11:35:51.29#ibcon#enter sib2, iclass 24, count 2 2006.229.11:35:51.29#ibcon#flushed, iclass 24, count 2 2006.229.11:35:51.29#ibcon#about to write, iclass 24, count 2 2006.229.11:35:51.29#ibcon#wrote, iclass 24, count 2 2006.229.11:35:51.29#ibcon#about to read 3, iclass 24, count 2 2006.229.11:35:51.32#ibcon#read 3, iclass 24, count 2 2006.229.11:35:51.32#ibcon#about to read 4, iclass 24, count 2 2006.229.11:35:51.32#ibcon#read 4, iclass 24, count 2 2006.229.11:35:51.32#ibcon#about to read 5, iclass 24, count 2 2006.229.11:35:51.32#ibcon#read 5, iclass 24, count 2 2006.229.11:35:51.32#ibcon#about to read 6, iclass 24, count 2 2006.229.11:35:51.32#ibcon#read 6, iclass 24, count 2 2006.229.11:35:51.32#ibcon#end of sib2, iclass 24, count 2 2006.229.11:35:51.32#ibcon#*after write, iclass 24, count 2 2006.229.11:35:51.32#ibcon#*before return 0, iclass 24, count 2 2006.229.11:35:51.32#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:51.32#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:51.32#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.11:35:51.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:51.32#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:51.44#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:51.44#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:51.44#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:35:51.44#ibcon#first serial, iclass 24, count 0 2006.229.11:35:51.44#ibcon#enter sib2, iclass 24, count 0 2006.229.11:35:51.44#ibcon#flushed, iclass 24, count 0 2006.229.11:35:51.44#ibcon#about to write, iclass 24, count 0 2006.229.11:35:51.44#ibcon#wrote, iclass 24, count 0 2006.229.11:35:51.44#ibcon#about to read 3, iclass 24, count 0 2006.229.11:35:51.46#ibcon#read 3, iclass 24, count 0 2006.229.11:35:51.46#ibcon#about to read 4, iclass 24, count 0 2006.229.11:35:51.46#ibcon#read 4, iclass 24, count 0 2006.229.11:35:51.46#ibcon#about to read 5, iclass 24, count 0 2006.229.11:35:51.46#ibcon#read 5, iclass 24, count 0 2006.229.11:35:51.46#ibcon#about to read 6, iclass 24, count 0 2006.229.11:35:51.46#ibcon#read 6, iclass 24, count 0 2006.229.11:35:51.46#ibcon#end of sib2, iclass 24, count 0 2006.229.11:35:51.46#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:35:51.46#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:35:51.46#ibcon#[25=USB\r\n] 2006.229.11:35:51.46#ibcon#*before write, iclass 24, count 0 2006.229.11:35:51.46#ibcon#enter sib2, iclass 24, count 0 2006.229.11:35:51.46#ibcon#flushed, iclass 24, count 0 2006.229.11:35:51.46#ibcon#about to write, iclass 24, count 0 2006.229.11:35:51.46#ibcon#wrote, iclass 24, count 0 2006.229.11:35:51.46#ibcon#about to read 3, iclass 24, count 0 2006.229.11:35:51.49#ibcon#read 3, iclass 24, count 0 2006.229.11:35:51.49#ibcon#about to read 4, iclass 24, count 0 2006.229.11:35:51.49#ibcon#read 4, iclass 24, count 0 2006.229.11:35:51.49#ibcon#about to read 5, iclass 24, count 0 2006.229.11:35:51.49#ibcon#read 5, iclass 24, count 0 2006.229.11:35:51.49#ibcon#about to read 6, iclass 24, count 0 2006.229.11:35:51.49#ibcon#read 6, iclass 24, count 0 2006.229.11:35:51.49#ibcon#end of sib2, iclass 24, count 0 2006.229.11:35:51.49#ibcon#*after write, iclass 24, count 0 2006.229.11:35:51.49#ibcon#*before return 0, iclass 24, count 0 2006.229.11:35:51.49#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:51.49#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:51.49#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:35:51.49#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:35:51.49$vck44/valo=8,884.99 2006.229.11:35:51.49#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.11:35:51.49#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.11:35:51.49#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:51.49#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:51.49#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:51.49#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:51.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:35:51.49#ibcon#first serial, iclass 26, count 0 2006.229.11:35:51.49#ibcon#enter sib2, iclass 26, count 0 2006.229.11:35:51.49#ibcon#flushed, iclass 26, count 0 2006.229.11:35:51.49#ibcon#about to write, iclass 26, count 0 2006.229.11:35:51.49#ibcon#wrote, iclass 26, count 0 2006.229.11:35:51.49#ibcon#about to read 3, iclass 26, count 0 2006.229.11:35:51.51#ibcon#read 3, iclass 26, count 0 2006.229.11:35:51.51#ibcon#about to read 4, iclass 26, count 0 2006.229.11:35:51.51#ibcon#read 4, iclass 26, count 0 2006.229.11:35:51.51#ibcon#about to read 5, iclass 26, count 0 2006.229.11:35:51.51#ibcon#read 5, iclass 26, count 0 2006.229.11:35:51.51#ibcon#about to read 6, iclass 26, count 0 2006.229.11:35:51.51#ibcon#read 6, iclass 26, count 0 2006.229.11:35:51.51#ibcon#end of sib2, iclass 26, count 0 2006.229.11:35:51.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:35:51.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:35:51.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:35:51.51#ibcon#*before write, iclass 26, count 0 2006.229.11:35:51.51#ibcon#enter sib2, iclass 26, count 0 2006.229.11:35:51.51#ibcon#flushed, iclass 26, count 0 2006.229.11:35:51.51#ibcon#about to write, iclass 26, count 0 2006.229.11:35:51.51#ibcon#wrote, iclass 26, count 0 2006.229.11:35:51.51#ibcon#about to read 3, iclass 26, count 0 2006.229.11:35:51.55#ibcon#read 3, iclass 26, count 0 2006.229.11:35:51.55#ibcon#about to read 4, iclass 26, count 0 2006.229.11:35:51.55#ibcon#read 4, iclass 26, count 0 2006.229.11:35:51.55#ibcon#about to read 5, iclass 26, count 0 2006.229.11:35:51.55#ibcon#read 5, iclass 26, count 0 2006.229.11:35:51.55#ibcon#about to read 6, iclass 26, count 0 2006.229.11:35:51.55#ibcon#read 6, iclass 26, count 0 2006.229.11:35:51.55#ibcon#end of sib2, iclass 26, count 0 2006.229.11:35:51.55#ibcon#*after write, iclass 26, count 0 2006.229.11:35:51.55#ibcon#*before return 0, iclass 26, count 0 2006.229.11:35:51.55#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:51.55#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:51.55#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:35:51.55#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:35:51.55$vck44/va=8,6 2006.229.11:35:51.55#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.11:35:51.55#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.11:35:51.55#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:51.55#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:51.61#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:51.61#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:51.61#ibcon#enter wrdev, iclass 28, count 2 2006.229.11:35:51.61#ibcon#first serial, iclass 28, count 2 2006.229.11:35:51.61#ibcon#enter sib2, iclass 28, count 2 2006.229.11:35:51.61#ibcon#flushed, iclass 28, count 2 2006.229.11:35:51.61#ibcon#about to write, iclass 28, count 2 2006.229.11:35:51.61#ibcon#wrote, iclass 28, count 2 2006.229.11:35:51.61#ibcon#about to read 3, iclass 28, count 2 2006.229.11:35:51.63#ibcon#read 3, iclass 28, count 2 2006.229.11:35:51.63#ibcon#about to read 4, iclass 28, count 2 2006.229.11:35:51.63#ibcon#read 4, iclass 28, count 2 2006.229.11:35:51.63#ibcon#about to read 5, iclass 28, count 2 2006.229.11:35:51.63#ibcon#read 5, iclass 28, count 2 2006.229.11:35:51.63#ibcon#about to read 6, iclass 28, count 2 2006.229.11:35:51.63#ibcon#read 6, iclass 28, count 2 2006.229.11:35:51.63#ibcon#end of sib2, iclass 28, count 2 2006.229.11:35:51.63#ibcon#*mode == 0, iclass 28, count 2 2006.229.11:35:51.63#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.11:35:51.63#ibcon#[25=AT08-06\r\n] 2006.229.11:35:51.63#ibcon#*before write, iclass 28, count 2 2006.229.11:35:51.63#ibcon#enter sib2, iclass 28, count 2 2006.229.11:35:51.63#ibcon#flushed, iclass 28, count 2 2006.229.11:35:51.63#ibcon#about to write, iclass 28, count 2 2006.229.11:35:51.63#ibcon#wrote, iclass 28, count 2 2006.229.11:35:51.63#ibcon#about to read 3, iclass 28, count 2 2006.229.11:35:51.66#ibcon#read 3, iclass 28, count 2 2006.229.11:35:51.66#ibcon#about to read 4, iclass 28, count 2 2006.229.11:35:51.66#ibcon#read 4, iclass 28, count 2 2006.229.11:35:51.66#ibcon#about to read 5, iclass 28, count 2 2006.229.11:35:51.66#ibcon#read 5, iclass 28, count 2 2006.229.11:35:51.66#ibcon#about to read 6, iclass 28, count 2 2006.229.11:35:51.66#ibcon#read 6, iclass 28, count 2 2006.229.11:35:51.66#ibcon#end of sib2, iclass 28, count 2 2006.229.11:35:51.66#ibcon#*after write, iclass 28, count 2 2006.229.11:35:51.66#ibcon#*before return 0, iclass 28, count 2 2006.229.11:35:51.66#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:51.66#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:51.66#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.11:35:51.66#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:51.66#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:51.78#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:51.78#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:51.78#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:35:51.78#ibcon#first serial, iclass 28, count 0 2006.229.11:35:51.78#ibcon#enter sib2, iclass 28, count 0 2006.229.11:35:51.78#ibcon#flushed, iclass 28, count 0 2006.229.11:35:51.78#ibcon#about to write, iclass 28, count 0 2006.229.11:35:51.78#ibcon#wrote, iclass 28, count 0 2006.229.11:35:51.78#ibcon#about to read 3, iclass 28, count 0 2006.229.11:35:51.80#ibcon#read 3, iclass 28, count 0 2006.229.11:35:51.80#ibcon#about to read 4, iclass 28, count 0 2006.229.11:35:51.80#ibcon#read 4, iclass 28, count 0 2006.229.11:35:51.80#ibcon#about to read 5, iclass 28, count 0 2006.229.11:35:51.80#ibcon#read 5, iclass 28, count 0 2006.229.11:35:51.80#ibcon#about to read 6, iclass 28, count 0 2006.229.11:35:51.80#ibcon#read 6, iclass 28, count 0 2006.229.11:35:51.80#ibcon#end of sib2, iclass 28, count 0 2006.229.11:35:51.80#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:35:51.80#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:35:51.80#ibcon#[25=USB\r\n] 2006.229.11:35:51.80#ibcon#*before write, iclass 28, count 0 2006.229.11:35:51.80#ibcon#enter sib2, iclass 28, count 0 2006.229.11:35:51.80#ibcon#flushed, iclass 28, count 0 2006.229.11:35:51.80#ibcon#about to write, iclass 28, count 0 2006.229.11:35:51.80#ibcon#wrote, iclass 28, count 0 2006.229.11:35:51.80#ibcon#about to read 3, iclass 28, count 0 2006.229.11:35:51.83#ibcon#read 3, iclass 28, count 0 2006.229.11:35:51.83#ibcon#about to read 4, iclass 28, count 0 2006.229.11:35:51.83#ibcon#read 4, iclass 28, count 0 2006.229.11:35:51.83#ibcon#about to read 5, iclass 28, count 0 2006.229.11:35:51.83#ibcon#read 5, iclass 28, count 0 2006.229.11:35:51.83#ibcon#about to read 6, iclass 28, count 0 2006.229.11:35:51.83#ibcon#read 6, iclass 28, count 0 2006.229.11:35:51.83#ibcon#end of sib2, iclass 28, count 0 2006.229.11:35:51.83#ibcon#*after write, iclass 28, count 0 2006.229.11:35:51.83#ibcon#*before return 0, iclass 28, count 0 2006.229.11:35:51.83#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:51.83#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:51.83#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:35:51.83#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:35:51.83$vck44/vblo=1,629.99 2006.229.11:35:51.83#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.11:35:51.83#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.11:35:51.83#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:51.83#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:51.83#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:51.83#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:51.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:35:51.83#ibcon#first serial, iclass 30, count 0 2006.229.11:35:51.83#ibcon#enter sib2, iclass 30, count 0 2006.229.11:35:51.83#ibcon#flushed, iclass 30, count 0 2006.229.11:35:51.83#ibcon#about to write, iclass 30, count 0 2006.229.11:35:51.83#ibcon#wrote, iclass 30, count 0 2006.229.11:35:51.83#ibcon#about to read 3, iclass 30, count 0 2006.229.11:35:51.85#ibcon#read 3, iclass 30, count 0 2006.229.11:35:51.85#ibcon#about to read 4, iclass 30, count 0 2006.229.11:35:51.85#ibcon#read 4, iclass 30, count 0 2006.229.11:35:51.85#ibcon#about to read 5, iclass 30, count 0 2006.229.11:35:51.85#ibcon#read 5, iclass 30, count 0 2006.229.11:35:51.85#ibcon#about to read 6, iclass 30, count 0 2006.229.11:35:51.85#ibcon#read 6, iclass 30, count 0 2006.229.11:35:51.85#ibcon#end of sib2, iclass 30, count 0 2006.229.11:35:51.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:35:51.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:35:51.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:35:51.85#ibcon#*before write, iclass 30, count 0 2006.229.11:35:51.85#ibcon#enter sib2, iclass 30, count 0 2006.229.11:35:51.85#ibcon#flushed, iclass 30, count 0 2006.229.11:35:51.85#ibcon#about to write, iclass 30, count 0 2006.229.11:35:51.85#ibcon#wrote, iclass 30, count 0 2006.229.11:35:51.85#ibcon#about to read 3, iclass 30, count 0 2006.229.11:35:51.89#ibcon#read 3, iclass 30, count 0 2006.229.11:35:51.89#ibcon#about to read 4, iclass 30, count 0 2006.229.11:35:51.89#ibcon#read 4, iclass 30, count 0 2006.229.11:35:51.89#ibcon#about to read 5, iclass 30, count 0 2006.229.11:35:51.89#ibcon#read 5, iclass 30, count 0 2006.229.11:35:51.89#ibcon#about to read 6, iclass 30, count 0 2006.229.11:35:51.89#ibcon#read 6, iclass 30, count 0 2006.229.11:35:51.89#ibcon#end of sib2, iclass 30, count 0 2006.229.11:35:51.89#ibcon#*after write, iclass 30, count 0 2006.229.11:35:51.89#ibcon#*before return 0, iclass 30, count 0 2006.229.11:35:51.89#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:51.89#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:51.89#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:35:51.89#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:35:51.89$vck44/vb=1,4 2006.229.11:35:51.89#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.11:35:51.89#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.11:35:51.89#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:51.89#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:35:51.89#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:35:51.89#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:35:51.89#ibcon#enter wrdev, iclass 32, count 2 2006.229.11:35:51.89#ibcon#first serial, iclass 32, count 2 2006.229.11:35:51.89#ibcon#enter sib2, iclass 32, count 2 2006.229.11:35:51.89#ibcon#flushed, iclass 32, count 2 2006.229.11:35:51.89#ibcon#about to write, iclass 32, count 2 2006.229.11:35:51.89#ibcon#wrote, iclass 32, count 2 2006.229.11:35:51.89#ibcon#about to read 3, iclass 32, count 2 2006.229.11:35:51.91#ibcon#read 3, iclass 32, count 2 2006.229.11:35:51.91#ibcon#about to read 4, iclass 32, count 2 2006.229.11:35:51.91#ibcon#read 4, iclass 32, count 2 2006.229.11:35:51.91#ibcon#about to read 5, iclass 32, count 2 2006.229.11:35:51.91#ibcon#read 5, iclass 32, count 2 2006.229.11:35:51.91#ibcon#about to read 6, iclass 32, count 2 2006.229.11:35:51.91#ibcon#read 6, iclass 32, count 2 2006.229.11:35:51.91#ibcon#end of sib2, iclass 32, count 2 2006.229.11:35:51.91#ibcon#*mode == 0, iclass 32, count 2 2006.229.11:35:51.91#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.11:35:51.91#ibcon#[27=AT01-04\r\n] 2006.229.11:35:51.91#ibcon#*before write, iclass 32, count 2 2006.229.11:35:51.91#ibcon#enter sib2, iclass 32, count 2 2006.229.11:35:51.91#ibcon#flushed, iclass 32, count 2 2006.229.11:35:51.91#ibcon#about to write, iclass 32, count 2 2006.229.11:35:51.91#ibcon#wrote, iclass 32, count 2 2006.229.11:35:51.91#ibcon#about to read 3, iclass 32, count 2 2006.229.11:35:51.94#ibcon#read 3, iclass 32, count 2 2006.229.11:35:51.94#ibcon#about to read 4, iclass 32, count 2 2006.229.11:35:51.94#ibcon#read 4, iclass 32, count 2 2006.229.11:35:51.94#ibcon#about to read 5, iclass 32, count 2 2006.229.11:35:51.94#ibcon#read 5, iclass 32, count 2 2006.229.11:35:51.94#ibcon#about to read 6, iclass 32, count 2 2006.229.11:35:51.94#ibcon#read 6, iclass 32, count 2 2006.229.11:35:51.94#ibcon#end of sib2, iclass 32, count 2 2006.229.11:35:51.94#ibcon#*after write, iclass 32, count 2 2006.229.11:35:51.94#ibcon#*before return 0, iclass 32, count 2 2006.229.11:35:51.94#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:35:51.94#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.11:35:51.94#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.11:35:51.94#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:51.94#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:35:52.06#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:35:52.06#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:35:52.06#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:35:52.06#ibcon#first serial, iclass 32, count 0 2006.229.11:35:52.06#ibcon#enter sib2, iclass 32, count 0 2006.229.11:35:52.06#ibcon#flushed, iclass 32, count 0 2006.229.11:35:52.06#ibcon#about to write, iclass 32, count 0 2006.229.11:35:52.06#ibcon#wrote, iclass 32, count 0 2006.229.11:35:52.06#ibcon#about to read 3, iclass 32, count 0 2006.229.11:35:52.08#ibcon#read 3, iclass 32, count 0 2006.229.11:35:52.08#ibcon#about to read 4, iclass 32, count 0 2006.229.11:35:52.08#ibcon#read 4, iclass 32, count 0 2006.229.11:35:52.08#ibcon#about to read 5, iclass 32, count 0 2006.229.11:35:52.08#ibcon#read 5, iclass 32, count 0 2006.229.11:35:52.08#ibcon#about to read 6, iclass 32, count 0 2006.229.11:35:52.08#ibcon#read 6, iclass 32, count 0 2006.229.11:35:52.08#ibcon#end of sib2, iclass 32, count 0 2006.229.11:35:52.08#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:35:52.08#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:35:52.08#ibcon#[27=USB\r\n] 2006.229.11:35:52.08#ibcon#*before write, iclass 32, count 0 2006.229.11:35:52.08#ibcon#enter sib2, iclass 32, count 0 2006.229.11:35:52.08#ibcon#flushed, iclass 32, count 0 2006.229.11:35:52.08#ibcon#about to write, iclass 32, count 0 2006.229.11:35:52.08#ibcon#wrote, iclass 32, count 0 2006.229.11:35:52.08#ibcon#about to read 3, iclass 32, count 0 2006.229.11:35:52.11#ibcon#read 3, iclass 32, count 0 2006.229.11:35:52.11#ibcon#about to read 4, iclass 32, count 0 2006.229.11:35:52.11#ibcon#read 4, iclass 32, count 0 2006.229.11:35:52.11#ibcon#about to read 5, iclass 32, count 0 2006.229.11:35:52.11#ibcon#read 5, iclass 32, count 0 2006.229.11:35:52.11#ibcon#about to read 6, iclass 32, count 0 2006.229.11:35:52.11#ibcon#read 6, iclass 32, count 0 2006.229.11:35:52.11#ibcon#end of sib2, iclass 32, count 0 2006.229.11:35:52.11#ibcon#*after write, iclass 32, count 0 2006.229.11:35:52.11#ibcon#*before return 0, iclass 32, count 0 2006.229.11:35:52.11#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:35:52.11#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.11:35:52.11#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:35:52.11#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:35:52.11$vck44/vblo=2,634.99 2006.229.11:35:52.11#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.11:35:52.11#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.11:35:52.11#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:52.11#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:52.11#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:52.11#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:52.11#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:35:52.11#ibcon#first serial, iclass 34, count 0 2006.229.11:35:52.11#ibcon#enter sib2, iclass 34, count 0 2006.229.11:35:52.11#ibcon#flushed, iclass 34, count 0 2006.229.11:35:52.11#ibcon#about to write, iclass 34, count 0 2006.229.11:35:52.11#ibcon#wrote, iclass 34, count 0 2006.229.11:35:52.11#ibcon#about to read 3, iclass 34, count 0 2006.229.11:35:52.13#ibcon#read 3, iclass 34, count 0 2006.229.11:35:52.13#ibcon#about to read 4, iclass 34, count 0 2006.229.11:35:52.13#ibcon#read 4, iclass 34, count 0 2006.229.11:35:52.13#ibcon#about to read 5, iclass 34, count 0 2006.229.11:35:52.13#ibcon#read 5, iclass 34, count 0 2006.229.11:35:52.13#ibcon#about to read 6, iclass 34, count 0 2006.229.11:35:52.13#ibcon#read 6, iclass 34, count 0 2006.229.11:35:52.13#ibcon#end of sib2, iclass 34, count 0 2006.229.11:35:52.13#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:35:52.13#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:35:52.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:35:52.13#ibcon#*before write, iclass 34, count 0 2006.229.11:35:52.13#ibcon#enter sib2, iclass 34, count 0 2006.229.11:35:52.13#ibcon#flushed, iclass 34, count 0 2006.229.11:35:52.13#ibcon#about to write, iclass 34, count 0 2006.229.11:35:52.13#ibcon#wrote, iclass 34, count 0 2006.229.11:35:52.13#ibcon#about to read 3, iclass 34, count 0 2006.229.11:35:52.17#ibcon#read 3, iclass 34, count 0 2006.229.11:35:52.17#ibcon#about to read 4, iclass 34, count 0 2006.229.11:35:52.17#ibcon#read 4, iclass 34, count 0 2006.229.11:35:52.17#ibcon#about to read 5, iclass 34, count 0 2006.229.11:35:52.17#ibcon#read 5, iclass 34, count 0 2006.229.11:35:52.17#ibcon#about to read 6, iclass 34, count 0 2006.229.11:35:52.17#ibcon#read 6, iclass 34, count 0 2006.229.11:35:52.17#ibcon#end of sib2, iclass 34, count 0 2006.229.11:35:52.17#ibcon#*after write, iclass 34, count 0 2006.229.11:35:52.17#ibcon#*before return 0, iclass 34, count 0 2006.229.11:35:52.17#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:52.17#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.11:35:52.17#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:35:52.17#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:35:52.17$vck44/vb=2,4 2006.229.11:35:52.17#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.11:35:52.17#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.11:35:52.17#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:52.17#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:52.23#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:52.23#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:52.23#ibcon#enter wrdev, iclass 36, count 2 2006.229.11:35:52.23#ibcon#first serial, iclass 36, count 2 2006.229.11:35:52.23#ibcon#enter sib2, iclass 36, count 2 2006.229.11:35:52.23#ibcon#flushed, iclass 36, count 2 2006.229.11:35:52.23#ibcon#about to write, iclass 36, count 2 2006.229.11:35:52.23#ibcon#wrote, iclass 36, count 2 2006.229.11:35:52.23#ibcon#about to read 3, iclass 36, count 2 2006.229.11:35:52.25#ibcon#read 3, iclass 36, count 2 2006.229.11:35:52.25#ibcon#about to read 4, iclass 36, count 2 2006.229.11:35:52.25#ibcon#read 4, iclass 36, count 2 2006.229.11:35:52.25#ibcon#about to read 5, iclass 36, count 2 2006.229.11:35:52.25#ibcon#read 5, iclass 36, count 2 2006.229.11:35:52.25#ibcon#about to read 6, iclass 36, count 2 2006.229.11:35:52.25#ibcon#read 6, iclass 36, count 2 2006.229.11:35:52.25#ibcon#end of sib2, iclass 36, count 2 2006.229.11:35:52.25#ibcon#*mode == 0, iclass 36, count 2 2006.229.11:35:52.25#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.11:35:52.25#ibcon#[27=AT02-04\r\n] 2006.229.11:35:52.25#ibcon#*before write, iclass 36, count 2 2006.229.11:35:52.25#ibcon#enter sib2, iclass 36, count 2 2006.229.11:35:52.25#ibcon#flushed, iclass 36, count 2 2006.229.11:35:52.25#ibcon#about to write, iclass 36, count 2 2006.229.11:35:52.25#ibcon#wrote, iclass 36, count 2 2006.229.11:35:52.25#ibcon#about to read 3, iclass 36, count 2 2006.229.11:35:52.28#ibcon#read 3, iclass 36, count 2 2006.229.11:35:52.28#ibcon#about to read 4, iclass 36, count 2 2006.229.11:35:52.28#ibcon#read 4, iclass 36, count 2 2006.229.11:35:52.28#ibcon#about to read 5, iclass 36, count 2 2006.229.11:35:52.28#ibcon#read 5, iclass 36, count 2 2006.229.11:35:52.28#ibcon#about to read 6, iclass 36, count 2 2006.229.11:35:52.28#ibcon#read 6, iclass 36, count 2 2006.229.11:35:52.28#ibcon#end of sib2, iclass 36, count 2 2006.229.11:35:52.28#ibcon#*after write, iclass 36, count 2 2006.229.11:35:52.28#ibcon#*before return 0, iclass 36, count 2 2006.229.11:35:52.28#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:52.28#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.11:35:52.28#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.11:35:52.28#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:52.28#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:52.40#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:52.40#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:52.40#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:35:52.40#ibcon#first serial, iclass 36, count 0 2006.229.11:35:52.40#ibcon#enter sib2, iclass 36, count 0 2006.229.11:35:52.40#ibcon#flushed, iclass 36, count 0 2006.229.11:35:52.40#ibcon#about to write, iclass 36, count 0 2006.229.11:35:52.40#ibcon#wrote, iclass 36, count 0 2006.229.11:35:52.40#ibcon#about to read 3, iclass 36, count 0 2006.229.11:35:52.42#ibcon#read 3, iclass 36, count 0 2006.229.11:35:52.42#ibcon#about to read 4, iclass 36, count 0 2006.229.11:35:52.42#ibcon#read 4, iclass 36, count 0 2006.229.11:35:52.42#ibcon#about to read 5, iclass 36, count 0 2006.229.11:35:52.42#ibcon#read 5, iclass 36, count 0 2006.229.11:35:52.42#ibcon#about to read 6, iclass 36, count 0 2006.229.11:35:52.42#ibcon#read 6, iclass 36, count 0 2006.229.11:35:52.42#ibcon#end of sib2, iclass 36, count 0 2006.229.11:35:52.42#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:35:52.42#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:35:52.42#ibcon#[27=USB\r\n] 2006.229.11:35:52.42#ibcon#*before write, iclass 36, count 0 2006.229.11:35:52.42#ibcon#enter sib2, iclass 36, count 0 2006.229.11:35:52.42#ibcon#flushed, iclass 36, count 0 2006.229.11:35:52.42#ibcon#about to write, iclass 36, count 0 2006.229.11:35:52.42#ibcon#wrote, iclass 36, count 0 2006.229.11:35:52.42#ibcon#about to read 3, iclass 36, count 0 2006.229.11:35:52.45#ibcon#read 3, iclass 36, count 0 2006.229.11:35:52.45#ibcon#about to read 4, iclass 36, count 0 2006.229.11:35:52.45#ibcon#read 4, iclass 36, count 0 2006.229.11:35:52.45#ibcon#about to read 5, iclass 36, count 0 2006.229.11:35:52.45#ibcon#read 5, iclass 36, count 0 2006.229.11:35:52.45#ibcon#about to read 6, iclass 36, count 0 2006.229.11:35:52.45#ibcon#read 6, iclass 36, count 0 2006.229.11:35:52.45#ibcon#end of sib2, iclass 36, count 0 2006.229.11:35:52.45#ibcon#*after write, iclass 36, count 0 2006.229.11:35:52.45#ibcon#*before return 0, iclass 36, count 0 2006.229.11:35:52.45#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:52.45#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.11:35:52.45#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:35:52.45#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:35:52.45$vck44/vblo=3,649.99 2006.229.11:35:52.45#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.11:35:52.45#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.11:35:52.45#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:52.45#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:52.45#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:52.45#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:52.45#ibcon#enter wrdev, iclass 38, count 0 2006.229.11:35:52.45#ibcon#first serial, iclass 38, count 0 2006.229.11:35:52.45#ibcon#enter sib2, iclass 38, count 0 2006.229.11:35:52.45#ibcon#flushed, iclass 38, count 0 2006.229.11:35:52.45#ibcon#about to write, iclass 38, count 0 2006.229.11:35:52.45#ibcon#wrote, iclass 38, count 0 2006.229.11:35:52.45#ibcon#about to read 3, iclass 38, count 0 2006.229.11:35:52.47#ibcon#read 3, iclass 38, count 0 2006.229.11:35:52.47#ibcon#about to read 4, iclass 38, count 0 2006.229.11:35:52.47#ibcon#read 4, iclass 38, count 0 2006.229.11:35:52.47#ibcon#about to read 5, iclass 38, count 0 2006.229.11:35:52.47#ibcon#read 5, iclass 38, count 0 2006.229.11:35:52.47#ibcon#about to read 6, iclass 38, count 0 2006.229.11:35:52.47#ibcon#read 6, iclass 38, count 0 2006.229.11:35:52.47#ibcon#end of sib2, iclass 38, count 0 2006.229.11:35:52.47#ibcon#*mode == 0, iclass 38, count 0 2006.229.11:35:52.47#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.11:35:52.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:35:52.47#ibcon#*before write, iclass 38, count 0 2006.229.11:35:52.47#ibcon#enter sib2, iclass 38, count 0 2006.229.11:35:52.47#ibcon#flushed, iclass 38, count 0 2006.229.11:35:52.47#ibcon#about to write, iclass 38, count 0 2006.229.11:35:52.47#ibcon#wrote, iclass 38, count 0 2006.229.11:35:52.47#ibcon#about to read 3, iclass 38, count 0 2006.229.11:35:52.51#ibcon#read 3, iclass 38, count 0 2006.229.11:35:52.51#ibcon#about to read 4, iclass 38, count 0 2006.229.11:35:52.51#ibcon#read 4, iclass 38, count 0 2006.229.11:35:52.51#ibcon#about to read 5, iclass 38, count 0 2006.229.11:35:52.51#ibcon#read 5, iclass 38, count 0 2006.229.11:35:52.51#ibcon#about to read 6, iclass 38, count 0 2006.229.11:35:52.51#ibcon#read 6, iclass 38, count 0 2006.229.11:35:52.51#ibcon#end of sib2, iclass 38, count 0 2006.229.11:35:52.51#ibcon#*after write, iclass 38, count 0 2006.229.11:35:52.51#ibcon#*before return 0, iclass 38, count 0 2006.229.11:35:52.51#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:52.51#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.11:35:52.51#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.11:35:52.51#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.11:35:52.51$vck44/vb=3,4 2006.229.11:35:52.51#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.11:35:52.51#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.11:35:52.51#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:52.51#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:52.57#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:52.57#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:52.57#ibcon#enter wrdev, iclass 40, count 2 2006.229.11:35:52.57#ibcon#first serial, iclass 40, count 2 2006.229.11:35:52.57#ibcon#enter sib2, iclass 40, count 2 2006.229.11:35:52.57#ibcon#flushed, iclass 40, count 2 2006.229.11:35:52.57#ibcon#about to write, iclass 40, count 2 2006.229.11:35:52.57#ibcon#wrote, iclass 40, count 2 2006.229.11:35:52.57#ibcon#about to read 3, iclass 40, count 2 2006.229.11:35:52.59#ibcon#read 3, iclass 40, count 2 2006.229.11:35:52.59#ibcon#about to read 4, iclass 40, count 2 2006.229.11:35:52.59#ibcon#read 4, iclass 40, count 2 2006.229.11:35:52.59#ibcon#about to read 5, iclass 40, count 2 2006.229.11:35:52.59#ibcon#read 5, iclass 40, count 2 2006.229.11:35:52.59#ibcon#about to read 6, iclass 40, count 2 2006.229.11:35:52.59#ibcon#read 6, iclass 40, count 2 2006.229.11:35:52.59#ibcon#end of sib2, iclass 40, count 2 2006.229.11:35:52.59#ibcon#*mode == 0, iclass 40, count 2 2006.229.11:35:52.59#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.11:35:52.59#ibcon#[27=AT03-04\r\n] 2006.229.11:35:52.59#ibcon#*before write, iclass 40, count 2 2006.229.11:35:52.59#ibcon#enter sib2, iclass 40, count 2 2006.229.11:35:52.59#ibcon#flushed, iclass 40, count 2 2006.229.11:35:52.59#ibcon#about to write, iclass 40, count 2 2006.229.11:35:52.59#ibcon#wrote, iclass 40, count 2 2006.229.11:35:52.59#ibcon#about to read 3, iclass 40, count 2 2006.229.11:35:52.62#ibcon#read 3, iclass 40, count 2 2006.229.11:35:52.62#ibcon#about to read 4, iclass 40, count 2 2006.229.11:35:52.62#ibcon#read 4, iclass 40, count 2 2006.229.11:35:52.62#ibcon#about to read 5, iclass 40, count 2 2006.229.11:35:52.62#ibcon#read 5, iclass 40, count 2 2006.229.11:35:52.62#ibcon#about to read 6, iclass 40, count 2 2006.229.11:35:52.62#ibcon#read 6, iclass 40, count 2 2006.229.11:35:52.62#ibcon#end of sib2, iclass 40, count 2 2006.229.11:35:52.62#ibcon#*after write, iclass 40, count 2 2006.229.11:35:52.62#ibcon#*before return 0, iclass 40, count 2 2006.229.11:35:52.62#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:52.62#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.11:35:52.62#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.11:35:52.62#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:52.62#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:52.74#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:52.74#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:52.74#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:35:52.74#ibcon#first serial, iclass 40, count 0 2006.229.11:35:52.74#ibcon#enter sib2, iclass 40, count 0 2006.229.11:35:52.74#ibcon#flushed, iclass 40, count 0 2006.229.11:35:52.74#ibcon#about to write, iclass 40, count 0 2006.229.11:35:52.74#ibcon#wrote, iclass 40, count 0 2006.229.11:35:52.74#ibcon#about to read 3, iclass 40, count 0 2006.229.11:35:52.76#ibcon#read 3, iclass 40, count 0 2006.229.11:35:52.76#ibcon#about to read 4, iclass 40, count 0 2006.229.11:35:52.76#ibcon#read 4, iclass 40, count 0 2006.229.11:35:52.76#ibcon#about to read 5, iclass 40, count 0 2006.229.11:35:52.76#ibcon#read 5, iclass 40, count 0 2006.229.11:35:52.76#ibcon#about to read 6, iclass 40, count 0 2006.229.11:35:52.76#ibcon#read 6, iclass 40, count 0 2006.229.11:35:52.76#ibcon#end of sib2, iclass 40, count 0 2006.229.11:35:52.76#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:35:52.76#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:35:52.76#ibcon#[27=USB\r\n] 2006.229.11:35:52.76#ibcon#*before write, iclass 40, count 0 2006.229.11:35:52.76#ibcon#enter sib2, iclass 40, count 0 2006.229.11:35:52.76#ibcon#flushed, iclass 40, count 0 2006.229.11:35:52.76#ibcon#about to write, iclass 40, count 0 2006.229.11:35:52.76#ibcon#wrote, iclass 40, count 0 2006.229.11:35:52.76#ibcon#about to read 3, iclass 40, count 0 2006.229.11:35:52.79#ibcon#read 3, iclass 40, count 0 2006.229.11:35:52.79#ibcon#about to read 4, iclass 40, count 0 2006.229.11:35:52.79#ibcon#read 4, iclass 40, count 0 2006.229.11:35:52.79#ibcon#about to read 5, iclass 40, count 0 2006.229.11:35:52.79#ibcon#read 5, iclass 40, count 0 2006.229.11:35:52.79#ibcon#about to read 6, iclass 40, count 0 2006.229.11:35:52.79#ibcon#read 6, iclass 40, count 0 2006.229.11:35:52.79#ibcon#end of sib2, iclass 40, count 0 2006.229.11:35:52.79#ibcon#*after write, iclass 40, count 0 2006.229.11:35:52.79#ibcon#*before return 0, iclass 40, count 0 2006.229.11:35:52.79#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:52.79#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.11:35:52.79#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:35:52.79#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:35:52.79$vck44/vblo=4,679.99 2006.229.11:35:52.79#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.11:35:52.79#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.11:35:52.79#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:52.79#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:52.79#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:52.79#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:52.79#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:35:52.79#ibcon#first serial, iclass 4, count 0 2006.229.11:35:52.79#ibcon#enter sib2, iclass 4, count 0 2006.229.11:35:52.79#ibcon#flushed, iclass 4, count 0 2006.229.11:35:52.79#ibcon#about to write, iclass 4, count 0 2006.229.11:35:52.79#ibcon#wrote, iclass 4, count 0 2006.229.11:35:52.79#ibcon#about to read 3, iclass 4, count 0 2006.229.11:35:52.81#ibcon#read 3, iclass 4, count 0 2006.229.11:35:52.81#ibcon#about to read 4, iclass 4, count 0 2006.229.11:35:52.81#ibcon#read 4, iclass 4, count 0 2006.229.11:35:52.81#ibcon#about to read 5, iclass 4, count 0 2006.229.11:35:52.81#ibcon#read 5, iclass 4, count 0 2006.229.11:35:52.81#ibcon#about to read 6, iclass 4, count 0 2006.229.11:35:52.81#ibcon#read 6, iclass 4, count 0 2006.229.11:35:52.81#ibcon#end of sib2, iclass 4, count 0 2006.229.11:35:52.81#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:35:52.81#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:35:52.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:35:52.81#ibcon#*before write, iclass 4, count 0 2006.229.11:35:52.81#ibcon#enter sib2, iclass 4, count 0 2006.229.11:35:52.81#ibcon#flushed, iclass 4, count 0 2006.229.11:35:52.81#ibcon#about to write, iclass 4, count 0 2006.229.11:35:52.81#ibcon#wrote, iclass 4, count 0 2006.229.11:35:52.81#ibcon#about to read 3, iclass 4, count 0 2006.229.11:35:52.85#ibcon#read 3, iclass 4, count 0 2006.229.11:35:52.85#ibcon#about to read 4, iclass 4, count 0 2006.229.11:35:52.85#ibcon#read 4, iclass 4, count 0 2006.229.11:35:52.85#ibcon#about to read 5, iclass 4, count 0 2006.229.11:35:52.85#ibcon#read 5, iclass 4, count 0 2006.229.11:35:52.85#ibcon#about to read 6, iclass 4, count 0 2006.229.11:35:52.85#ibcon#read 6, iclass 4, count 0 2006.229.11:35:52.85#ibcon#end of sib2, iclass 4, count 0 2006.229.11:35:52.85#ibcon#*after write, iclass 4, count 0 2006.229.11:35:52.85#ibcon#*before return 0, iclass 4, count 0 2006.229.11:35:52.85#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:52.85#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.11:35:52.85#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:35:52.85#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:35:52.85$vck44/vb=4,4 2006.229.11:35:52.85#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.11:35:52.85#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.11:35:52.85#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:52.85#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:52.91#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:52.91#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:52.91#ibcon#enter wrdev, iclass 6, count 2 2006.229.11:35:52.91#ibcon#first serial, iclass 6, count 2 2006.229.11:35:52.91#ibcon#enter sib2, iclass 6, count 2 2006.229.11:35:52.91#ibcon#flushed, iclass 6, count 2 2006.229.11:35:52.91#ibcon#about to write, iclass 6, count 2 2006.229.11:35:52.91#ibcon#wrote, iclass 6, count 2 2006.229.11:35:52.91#ibcon#about to read 3, iclass 6, count 2 2006.229.11:35:52.93#ibcon#read 3, iclass 6, count 2 2006.229.11:35:52.93#ibcon#about to read 4, iclass 6, count 2 2006.229.11:35:52.93#ibcon#read 4, iclass 6, count 2 2006.229.11:35:52.93#ibcon#about to read 5, iclass 6, count 2 2006.229.11:35:52.93#ibcon#read 5, iclass 6, count 2 2006.229.11:35:52.93#ibcon#about to read 6, iclass 6, count 2 2006.229.11:35:52.93#ibcon#read 6, iclass 6, count 2 2006.229.11:35:52.93#ibcon#end of sib2, iclass 6, count 2 2006.229.11:35:52.93#ibcon#*mode == 0, iclass 6, count 2 2006.229.11:35:52.93#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.11:35:52.93#ibcon#[27=AT04-04\r\n] 2006.229.11:35:52.93#ibcon#*before write, iclass 6, count 2 2006.229.11:35:52.93#ibcon#enter sib2, iclass 6, count 2 2006.229.11:35:52.93#ibcon#flushed, iclass 6, count 2 2006.229.11:35:52.93#ibcon#about to write, iclass 6, count 2 2006.229.11:35:52.93#ibcon#wrote, iclass 6, count 2 2006.229.11:35:52.93#ibcon#about to read 3, iclass 6, count 2 2006.229.11:35:52.96#ibcon#read 3, iclass 6, count 2 2006.229.11:35:52.96#ibcon#about to read 4, iclass 6, count 2 2006.229.11:35:52.96#ibcon#read 4, iclass 6, count 2 2006.229.11:35:52.96#ibcon#about to read 5, iclass 6, count 2 2006.229.11:35:52.96#ibcon#read 5, iclass 6, count 2 2006.229.11:35:52.96#ibcon#about to read 6, iclass 6, count 2 2006.229.11:35:52.96#ibcon#read 6, iclass 6, count 2 2006.229.11:35:52.96#ibcon#end of sib2, iclass 6, count 2 2006.229.11:35:52.96#ibcon#*after write, iclass 6, count 2 2006.229.11:35:52.96#ibcon#*before return 0, iclass 6, count 2 2006.229.11:35:52.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:52.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.11:35:52.96#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.11:35:52.96#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:52.96#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:53.08#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:53.08#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:53.08#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:35:53.08#ibcon#first serial, iclass 6, count 0 2006.229.11:35:53.08#ibcon#enter sib2, iclass 6, count 0 2006.229.11:35:53.08#ibcon#flushed, iclass 6, count 0 2006.229.11:35:53.08#ibcon#about to write, iclass 6, count 0 2006.229.11:35:53.08#ibcon#wrote, iclass 6, count 0 2006.229.11:35:53.08#ibcon#about to read 3, iclass 6, count 0 2006.229.11:35:53.10#ibcon#read 3, iclass 6, count 0 2006.229.11:35:53.10#ibcon#about to read 4, iclass 6, count 0 2006.229.11:35:53.10#ibcon#read 4, iclass 6, count 0 2006.229.11:35:53.10#ibcon#about to read 5, iclass 6, count 0 2006.229.11:35:53.10#ibcon#read 5, iclass 6, count 0 2006.229.11:35:53.10#ibcon#about to read 6, iclass 6, count 0 2006.229.11:35:53.10#ibcon#read 6, iclass 6, count 0 2006.229.11:35:53.10#ibcon#end of sib2, iclass 6, count 0 2006.229.11:35:53.10#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:35:53.10#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:35:53.10#ibcon#[27=USB\r\n] 2006.229.11:35:53.10#ibcon#*before write, iclass 6, count 0 2006.229.11:35:53.10#ibcon#enter sib2, iclass 6, count 0 2006.229.11:35:53.10#ibcon#flushed, iclass 6, count 0 2006.229.11:35:53.10#ibcon#about to write, iclass 6, count 0 2006.229.11:35:53.10#ibcon#wrote, iclass 6, count 0 2006.229.11:35:53.10#ibcon#about to read 3, iclass 6, count 0 2006.229.11:35:53.13#ibcon#read 3, iclass 6, count 0 2006.229.11:35:53.13#ibcon#about to read 4, iclass 6, count 0 2006.229.11:35:53.13#ibcon#read 4, iclass 6, count 0 2006.229.11:35:53.13#ibcon#about to read 5, iclass 6, count 0 2006.229.11:35:53.13#ibcon#read 5, iclass 6, count 0 2006.229.11:35:53.13#ibcon#about to read 6, iclass 6, count 0 2006.229.11:35:53.13#ibcon#read 6, iclass 6, count 0 2006.229.11:35:53.13#ibcon#end of sib2, iclass 6, count 0 2006.229.11:35:53.13#ibcon#*after write, iclass 6, count 0 2006.229.11:35:53.13#ibcon#*before return 0, iclass 6, count 0 2006.229.11:35:53.13#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:53.13#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.11:35:53.13#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:35:53.13#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:35:53.13$vck44/vblo=5,709.99 2006.229.11:35:53.13#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.11:35:53.13#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.11:35:53.13#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:53.13#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:53.13#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:53.13#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:53.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:35:53.13#ibcon#first serial, iclass 10, count 0 2006.229.11:35:53.13#ibcon#enter sib2, iclass 10, count 0 2006.229.11:35:53.13#ibcon#flushed, iclass 10, count 0 2006.229.11:35:53.13#ibcon#about to write, iclass 10, count 0 2006.229.11:35:53.13#ibcon#wrote, iclass 10, count 0 2006.229.11:35:53.13#ibcon#about to read 3, iclass 10, count 0 2006.229.11:35:53.15#ibcon#read 3, iclass 10, count 0 2006.229.11:35:53.15#ibcon#about to read 4, iclass 10, count 0 2006.229.11:35:53.15#ibcon#read 4, iclass 10, count 0 2006.229.11:35:53.15#ibcon#about to read 5, iclass 10, count 0 2006.229.11:35:53.15#ibcon#read 5, iclass 10, count 0 2006.229.11:35:53.15#ibcon#about to read 6, iclass 10, count 0 2006.229.11:35:53.15#ibcon#read 6, iclass 10, count 0 2006.229.11:35:53.15#ibcon#end of sib2, iclass 10, count 0 2006.229.11:35:53.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:35:53.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:35:53.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:35:53.15#ibcon#*before write, iclass 10, count 0 2006.229.11:35:53.15#ibcon#enter sib2, iclass 10, count 0 2006.229.11:35:53.15#ibcon#flushed, iclass 10, count 0 2006.229.11:35:53.15#ibcon#about to write, iclass 10, count 0 2006.229.11:35:53.15#ibcon#wrote, iclass 10, count 0 2006.229.11:35:53.15#ibcon#about to read 3, iclass 10, count 0 2006.229.11:35:53.19#ibcon#read 3, iclass 10, count 0 2006.229.11:35:53.19#ibcon#about to read 4, iclass 10, count 0 2006.229.11:35:53.19#ibcon#read 4, iclass 10, count 0 2006.229.11:35:53.19#ibcon#about to read 5, iclass 10, count 0 2006.229.11:35:53.19#ibcon#read 5, iclass 10, count 0 2006.229.11:35:53.19#ibcon#about to read 6, iclass 10, count 0 2006.229.11:35:53.19#ibcon#read 6, iclass 10, count 0 2006.229.11:35:53.19#ibcon#end of sib2, iclass 10, count 0 2006.229.11:35:53.19#ibcon#*after write, iclass 10, count 0 2006.229.11:35:53.19#ibcon#*before return 0, iclass 10, count 0 2006.229.11:35:53.19#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:53.19#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.11:35:53.19#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:35:53.19#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:35:53.19$vck44/vb=5,4 2006.229.11:35:53.19#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.11:35:53.19#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.11:35:53.19#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:53.19#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:53.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:53.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:53.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.11:35:53.25#ibcon#first serial, iclass 12, count 2 2006.229.11:35:53.25#ibcon#enter sib2, iclass 12, count 2 2006.229.11:35:53.25#ibcon#flushed, iclass 12, count 2 2006.229.11:35:53.25#ibcon#about to write, iclass 12, count 2 2006.229.11:35:53.25#ibcon#wrote, iclass 12, count 2 2006.229.11:35:53.25#ibcon#about to read 3, iclass 12, count 2 2006.229.11:35:53.27#ibcon#read 3, iclass 12, count 2 2006.229.11:35:53.27#ibcon#about to read 4, iclass 12, count 2 2006.229.11:35:53.27#ibcon#read 4, iclass 12, count 2 2006.229.11:35:53.27#ibcon#about to read 5, iclass 12, count 2 2006.229.11:35:53.27#ibcon#read 5, iclass 12, count 2 2006.229.11:35:53.27#ibcon#about to read 6, iclass 12, count 2 2006.229.11:35:53.27#ibcon#read 6, iclass 12, count 2 2006.229.11:35:53.27#ibcon#end of sib2, iclass 12, count 2 2006.229.11:35:53.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.11:35:53.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.11:35:53.27#ibcon#[27=AT05-04\r\n] 2006.229.11:35:53.27#ibcon#*before write, iclass 12, count 2 2006.229.11:35:53.27#ibcon#enter sib2, iclass 12, count 2 2006.229.11:35:53.27#ibcon#flushed, iclass 12, count 2 2006.229.11:35:53.27#ibcon#about to write, iclass 12, count 2 2006.229.11:35:53.27#ibcon#wrote, iclass 12, count 2 2006.229.11:35:53.27#ibcon#about to read 3, iclass 12, count 2 2006.229.11:35:53.30#ibcon#read 3, iclass 12, count 2 2006.229.11:35:53.30#ibcon#about to read 4, iclass 12, count 2 2006.229.11:35:53.30#ibcon#read 4, iclass 12, count 2 2006.229.11:35:53.30#ibcon#about to read 5, iclass 12, count 2 2006.229.11:35:53.30#ibcon#read 5, iclass 12, count 2 2006.229.11:35:53.30#ibcon#about to read 6, iclass 12, count 2 2006.229.11:35:53.30#ibcon#read 6, iclass 12, count 2 2006.229.11:35:53.30#ibcon#end of sib2, iclass 12, count 2 2006.229.11:35:53.30#ibcon#*after write, iclass 12, count 2 2006.229.11:35:53.30#ibcon#*before return 0, iclass 12, count 2 2006.229.11:35:53.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:53.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.11:35:53.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.11:35:53.30#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:53.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:53.33#abcon#<5=/04 1.8 3.6 28.011001002.1\r\n> 2006.229.11:35:53.35#abcon#{5=INTERFACE CLEAR} 2006.229.11:35:53.41#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:35:53.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:53.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:53.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:35:53.42#ibcon#first serial, iclass 12, count 0 2006.229.11:35:53.42#ibcon#enter sib2, iclass 12, count 0 2006.229.11:35:53.42#ibcon#flushed, iclass 12, count 0 2006.229.11:35:53.42#ibcon#about to write, iclass 12, count 0 2006.229.11:35:53.42#ibcon#wrote, iclass 12, count 0 2006.229.11:35:53.42#ibcon#about to read 3, iclass 12, count 0 2006.229.11:35:53.44#ibcon#read 3, iclass 12, count 0 2006.229.11:35:53.44#ibcon#about to read 4, iclass 12, count 0 2006.229.11:35:53.44#ibcon#read 4, iclass 12, count 0 2006.229.11:35:53.44#ibcon#about to read 5, iclass 12, count 0 2006.229.11:35:53.44#ibcon#read 5, iclass 12, count 0 2006.229.11:35:53.44#ibcon#about to read 6, iclass 12, count 0 2006.229.11:35:53.44#ibcon#read 6, iclass 12, count 0 2006.229.11:35:53.44#ibcon#end of sib2, iclass 12, count 0 2006.229.11:35:53.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:35:53.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:35:53.44#ibcon#[27=USB\r\n] 2006.229.11:35:53.44#ibcon#*before write, iclass 12, count 0 2006.229.11:35:53.44#ibcon#enter sib2, iclass 12, count 0 2006.229.11:35:53.44#ibcon#flushed, iclass 12, count 0 2006.229.11:35:53.44#ibcon#about to write, iclass 12, count 0 2006.229.11:35:53.44#ibcon#wrote, iclass 12, count 0 2006.229.11:35:53.44#ibcon#about to read 3, iclass 12, count 0 2006.229.11:35:53.47#ibcon#read 3, iclass 12, count 0 2006.229.11:35:53.47#ibcon#about to read 4, iclass 12, count 0 2006.229.11:35:53.47#ibcon#read 4, iclass 12, count 0 2006.229.11:35:53.47#ibcon#about to read 5, iclass 12, count 0 2006.229.11:35:53.47#ibcon#read 5, iclass 12, count 0 2006.229.11:35:53.47#ibcon#about to read 6, iclass 12, count 0 2006.229.11:35:53.47#ibcon#read 6, iclass 12, count 0 2006.229.11:35:53.47#ibcon#end of sib2, iclass 12, count 0 2006.229.11:35:53.47#ibcon#*after write, iclass 12, count 0 2006.229.11:35:53.47#ibcon#*before return 0, iclass 12, count 0 2006.229.11:35:53.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:53.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.11:35:53.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:35:53.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:35:53.47$vck44/vblo=6,719.99 2006.229.11:35:53.47#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.11:35:53.47#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.11:35:53.47#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:53.47#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:53.47#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:53.47#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:53.47#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:35:53.47#ibcon#first serial, iclass 18, count 0 2006.229.11:35:53.47#ibcon#enter sib2, iclass 18, count 0 2006.229.11:35:53.47#ibcon#flushed, iclass 18, count 0 2006.229.11:35:53.47#ibcon#about to write, iclass 18, count 0 2006.229.11:35:53.47#ibcon#wrote, iclass 18, count 0 2006.229.11:35:53.47#ibcon#about to read 3, iclass 18, count 0 2006.229.11:35:53.49#ibcon#read 3, iclass 18, count 0 2006.229.11:35:53.49#ibcon#about to read 4, iclass 18, count 0 2006.229.11:35:53.49#ibcon#read 4, iclass 18, count 0 2006.229.11:35:53.49#ibcon#about to read 5, iclass 18, count 0 2006.229.11:35:53.49#ibcon#read 5, iclass 18, count 0 2006.229.11:35:53.49#ibcon#about to read 6, iclass 18, count 0 2006.229.11:35:53.49#ibcon#read 6, iclass 18, count 0 2006.229.11:35:53.49#ibcon#end of sib2, iclass 18, count 0 2006.229.11:35:53.49#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:35:53.49#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:35:53.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:35:53.49#ibcon#*before write, iclass 18, count 0 2006.229.11:35:53.49#ibcon#enter sib2, iclass 18, count 0 2006.229.11:35:53.49#ibcon#flushed, iclass 18, count 0 2006.229.11:35:53.49#ibcon#about to write, iclass 18, count 0 2006.229.11:35:53.49#ibcon#wrote, iclass 18, count 0 2006.229.11:35:53.49#ibcon#about to read 3, iclass 18, count 0 2006.229.11:35:53.53#ibcon#read 3, iclass 18, count 0 2006.229.11:35:53.53#ibcon#about to read 4, iclass 18, count 0 2006.229.11:35:53.53#ibcon#read 4, iclass 18, count 0 2006.229.11:35:53.53#ibcon#about to read 5, iclass 18, count 0 2006.229.11:35:53.53#ibcon#read 5, iclass 18, count 0 2006.229.11:35:53.53#ibcon#about to read 6, iclass 18, count 0 2006.229.11:35:53.53#ibcon#read 6, iclass 18, count 0 2006.229.11:35:53.53#ibcon#end of sib2, iclass 18, count 0 2006.229.11:35:53.53#ibcon#*after write, iclass 18, count 0 2006.229.11:35:53.53#ibcon#*before return 0, iclass 18, count 0 2006.229.11:35:53.53#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:53.53#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.11:35:53.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:35:53.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:35:53.53$vck44/vb=6,4 2006.229.11:35:53.53#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.11:35:53.53#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.11:35:53.53#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:53.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:53.59#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:53.59#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:53.59#ibcon#enter wrdev, iclass 20, count 2 2006.229.11:35:53.59#ibcon#first serial, iclass 20, count 2 2006.229.11:35:53.59#ibcon#enter sib2, iclass 20, count 2 2006.229.11:35:53.59#ibcon#flushed, iclass 20, count 2 2006.229.11:35:53.59#ibcon#about to write, iclass 20, count 2 2006.229.11:35:53.59#ibcon#wrote, iclass 20, count 2 2006.229.11:35:53.59#ibcon#about to read 3, iclass 20, count 2 2006.229.11:35:53.61#ibcon#read 3, iclass 20, count 2 2006.229.11:35:53.61#ibcon#about to read 4, iclass 20, count 2 2006.229.11:35:53.61#ibcon#read 4, iclass 20, count 2 2006.229.11:35:53.61#ibcon#about to read 5, iclass 20, count 2 2006.229.11:35:53.61#ibcon#read 5, iclass 20, count 2 2006.229.11:35:53.61#ibcon#about to read 6, iclass 20, count 2 2006.229.11:35:53.61#ibcon#read 6, iclass 20, count 2 2006.229.11:35:53.61#ibcon#end of sib2, iclass 20, count 2 2006.229.11:35:53.61#ibcon#*mode == 0, iclass 20, count 2 2006.229.11:35:53.61#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.11:35:53.61#ibcon#[27=AT06-04\r\n] 2006.229.11:35:53.61#ibcon#*before write, iclass 20, count 2 2006.229.11:35:53.61#ibcon#enter sib2, iclass 20, count 2 2006.229.11:35:53.61#ibcon#flushed, iclass 20, count 2 2006.229.11:35:53.61#ibcon#about to write, iclass 20, count 2 2006.229.11:35:53.61#ibcon#wrote, iclass 20, count 2 2006.229.11:35:53.61#ibcon#about to read 3, iclass 20, count 2 2006.229.11:35:53.64#ibcon#read 3, iclass 20, count 2 2006.229.11:35:53.64#ibcon#about to read 4, iclass 20, count 2 2006.229.11:35:53.64#ibcon#read 4, iclass 20, count 2 2006.229.11:35:53.64#ibcon#about to read 5, iclass 20, count 2 2006.229.11:35:53.64#ibcon#read 5, iclass 20, count 2 2006.229.11:35:53.64#ibcon#about to read 6, iclass 20, count 2 2006.229.11:35:53.64#ibcon#read 6, iclass 20, count 2 2006.229.11:35:53.64#ibcon#end of sib2, iclass 20, count 2 2006.229.11:35:53.64#ibcon#*after write, iclass 20, count 2 2006.229.11:35:53.64#ibcon#*before return 0, iclass 20, count 2 2006.229.11:35:53.64#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:53.64#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.11:35:53.64#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.11:35:53.64#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:53.64#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:53.76#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:53.76#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:53.76#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:35:53.76#ibcon#first serial, iclass 20, count 0 2006.229.11:35:53.76#ibcon#enter sib2, iclass 20, count 0 2006.229.11:35:53.76#ibcon#flushed, iclass 20, count 0 2006.229.11:35:53.76#ibcon#about to write, iclass 20, count 0 2006.229.11:35:53.76#ibcon#wrote, iclass 20, count 0 2006.229.11:35:53.76#ibcon#about to read 3, iclass 20, count 0 2006.229.11:35:53.78#ibcon#read 3, iclass 20, count 0 2006.229.11:35:53.78#ibcon#about to read 4, iclass 20, count 0 2006.229.11:35:53.78#ibcon#read 4, iclass 20, count 0 2006.229.11:35:53.78#ibcon#about to read 5, iclass 20, count 0 2006.229.11:35:53.78#ibcon#read 5, iclass 20, count 0 2006.229.11:35:53.78#ibcon#about to read 6, iclass 20, count 0 2006.229.11:35:53.78#ibcon#read 6, iclass 20, count 0 2006.229.11:35:53.78#ibcon#end of sib2, iclass 20, count 0 2006.229.11:35:53.78#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:35:53.78#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:35:53.78#ibcon#[27=USB\r\n] 2006.229.11:35:53.78#ibcon#*before write, iclass 20, count 0 2006.229.11:35:53.78#ibcon#enter sib2, iclass 20, count 0 2006.229.11:35:53.78#ibcon#flushed, iclass 20, count 0 2006.229.11:35:53.78#ibcon#about to write, iclass 20, count 0 2006.229.11:35:53.78#ibcon#wrote, iclass 20, count 0 2006.229.11:35:53.78#ibcon#about to read 3, iclass 20, count 0 2006.229.11:35:53.81#ibcon#read 3, iclass 20, count 0 2006.229.11:35:53.81#ibcon#about to read 4, iclass 20, count 0 2006.229.11:35:53.81#ibcon#read 4, iclass 20, count 0 2006.229.11:35:53.81#ibcon#about to read 5, iclass 20, count 0 2006.229.11:35:53.81#ibcon#read 5, iclass 20, count 0 2006.229.11:35:53.81#ibcon#about to read 6, iclass 20, count 0 2006.229.11:35:53.81#ibcon#read 6, iclass 20, count 0 2006.229.11:35:53.81#ibcon#end of sib2, iclass 20, count 0 2006.229.11:35:53.81#ibcon#*after write, iclass 20, count 0 2006.229.11:35:53.81#ibcon#*before return 0, iclass 20, count 0 2006.229.11:35:53.81#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:53.81#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.11:35:53.81#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:35:53.81#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:35:53.81$vck44/vblo=7,734.99 2006.229.11:35:53.81#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.11:35:53.81#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.11:35:53.81#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:53.81#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:53.81#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:53.81#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:53.81#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:35:53.81#ibcon#first serial, iclass 22, count 0 2006.229.11:35:53.81#ibcon#enter sib2, iclass 22, count 0 2006.229.11:35:53.81#ibcon#flushed, iclass 22, count 0 2006.229.11:35:53.81#ibcon#about to write, iclass 22, count 0 2006.229.11:35:53.81#ibcon#wrote, iclass 22, count 0 2006.229.11:35:53.81#ibcon#about to read 3, iclass 22, count 0 2006.229.11:35:53.83#ibcon#read 3, iclass 22, count 0 2006.229.11:35:53.83#ibcon#about to read 4, iclass 22, count 0 2006.229.11:35:53.83#ibcon#read 4, iclass 22, count 0 2006.229.11:35:53.83#ibcon#about to read 5, iclass 22, count 0 2006.229.11:35:53.83#ibcon#read 5, iclass 22, count 0 2006.229.11:35:53.83#ibcon#about to read 6, iclass 22, count 0 2006.229.11:35:53.83#ibcon#read 6, iclass 22, count 0 2006.229.11:35:53.83#ibcon#end of sib2, iclass 22, count 0 2006.229.11:35:53.83#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:35:53.83#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:35:53.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:35:53.83#ibcon#*before write, iclass 22, count 0 2006.229.11:35:53.83#ibcon#enter sib2, iclass 22, count 0 2006.229.11:35:53.83#ibcon#flushed, iclass 22, count 0 2006.229.11:35:53.83#ibcon#about to write, iclass 22, count 0 2006.229.11:35:53.83#ibcon#wrote, iclass 22, count 0 2006.229.11:35:53.83#ibcon#about to read 3, iclass 22, count 0 2006.229.11:35:53.87#ibcon#read 3, iclass 22, count 0 2006.229.11:35:53.87#ibcon#about to read 4, iclass 22, count 0 2006.229.11:35:53.87#ibcon#read 4, iclass 22, count 0 2006.229.11:35:53.87#ibcon#about to read 5, iclass 22, count 0 2006.229.11:35:53.87#ibcon#read 5, iclass 22, count 0 2006.229.11:35:53.87#ibcon#about to read 6, iclass 22, count 0 2006.229.11:35:53.87#ibcon#read 6, iclass 22, count 0 2006.229.11:35:53.87#ibcon#end of sib2, iclass 22, count 0 2006.229.11:35:53.87#ibcon#*after write, iclass 22, count 0 2006.229.11:35:53.87#ibcon#*before return 0, iclass 22, count 0 2006.229.11:35:53.87#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:53.87#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.11:35:53.87#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:35:53.87#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:35:53.87$vck44/vb=7,4 2006.229.11:35:53.87#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.11:35:53.87#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.11:35:53.87#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:53.87#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:53.93#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:53.93#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:53.93#ibcon#enter wrdev, iclass 24, count 2 2006.229.11:35:53.93#ibcon#first serial, iclass 24, count 2 2006.229.11:35:53.93#ibcon#enter sib2, iclass 24, count 2 2006.229.11:35:53.93#ibcon#flushed, iclass 24, count 2 2006.229.11:35:53.93#ibcon#about to write, iclass 24, count 2 2006.229.11:35:53.93#ibcon#wrote, iclass 24, count 2 2006.229.11:35:53.93#ibcon#about to read 3, iclass 24, count 2 2006.229.11:35:53.95#ibcon#read 3, iclass 24, count 2 2006.229.11:35:53.95#ibcon#about to read 4, iclass 24, count 2 2006.229.11:35:53.95#ibcon#read 4, iclass 24, count 2 2006.229.11:35:53.95#ibcon#about to read 5, iclass 24, count 2 2006.229.11:35:53.95#ibcon#read 5, iclass 24, count 2 2006.229.11:35:53.95#ibcon#about to read 6, iclass 24, count 2 2006.229.11:35:53.95#ibcon#read 6, iclass 24, count 2 2006.229.11:35:53.95#ibcon#end of sib2, iclass 24, count 2 2006.229.11:35:53.95#ibcon#*mode == 0, iclass 24, count 2 2006.229.11:35:53.95#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.11:35:53.95#ibcon#[27=AT07-04\r\n] 2006.229.11:35:53.95#ibcon#*before write, iclass 24, count 2 2006.229.11:35:53.95#ibcon#enter sib2, iclass 24, count 2 2006.229.11:35:53.95#ibcon#flushed, iclass 24, count 2 2006.229.11:35:53.95#ibcon#about to write, iclass 24, count 2 2006.229.11:35:53.95#ibcon#wrote, iclass 24, count 2 2006.229.11:35:53.95#ibcon#about to read 3, iclass 24, count 2 2006.229.11:35:53.98#ibcon#read 3, iclass 24, count 2 2006.229.11:35:53.98#ibcon#about to read 4, iclass 24, count 2 2006.229.11:35:53.98#ibcon#read 4, iclass 24, count 2 2006.229.11:35:53.98#ibcon#about to read 5, iclass 24, count 2 2006.229.11:35:53.98#ibcon#read 5, iclass 24, count 2 2006.229.11:35:53.98#ibcon#about to read 6, iclass 24, count 2 2006.229.11:35:53.98#ibcon#read 6, iclass 24, count 2 2006.229.11:35:53.98#ibcon#end of sib2, iclass 24, count 2 2006.229.11:35:53.98#ibcon#*after write, iclass 24, count 2 2006.229.11:35:53.98#ibcon#*before return 0, iclass 24, count 2 2006.229.11:35:53.98#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:53.98#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.11:35:53.98#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.11:35:53.98#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:53.98#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:54.10#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:54.10#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:54.10#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:35:54.10#ibcon#first serial, iclass 24, count 0 2006.229.11:35:54.10#ibcon#enter sib2, iclass 24, count 0 2006.229.11:35:54.10#ibcon#flushed, iclass 24, count 0 2006.229.11:35:54.10#ibcon#about to write, iclass 24, count 0 2006.229.11:35:54.10#ibcon#wrote, iclass 24, count 0 2006.229.11:35:54.10#ibcon#about to read 3, iclass 24, count 0 2006.229.11:35:54.12#ibcon#read 3, iclass 24, count 0 2006.229.11:35:54.12#ibcon#about to read 4, iclass 24, count 0 2006.229.11:35:54.12#ibcon#read 4, iclass 24, count 0 2006.229.11:35:54.12#ibcon#about to read 5, iclass 24, count 0 2006.229.11:35:54.12#ibcon#read 5, iclass 24, count 0 2006.229.11:35:54.12#ibcon#about to read 6, iclass 24, count 0 2006.229.11:35:54.12#ibcon#read 6, iclass 24, count 0 2006.229.11:35:54.12#ibcon#end of sib2, iclass 24, count 0 2006.229.11:35:54.12#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:35:54.12#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:35:54.12#ibcon#[27=USB\r\n] 2006.229.11:35:54.12#ibcon#*before write, iclass 24, count 0 2006.229.11:35:54.12#ibcon#enter sib2, iclass 24, count 0 2006.229.11:35:54.12#ibcon#flushed, iclass 24, count 0 2006.229.11:35:54.12#ibcon#about to write, iclass 24, count 0 2006.229.11:35:54.12#ibcon#wrote, iclass 24, count 0 2006.229.11:35:54.12#ibcon#about to read 3, iclass 24, count 0 2006.229.11:35:54.15#ibcon#read 3, iclass 24, count 0 2006.229.11:35:54.15#ibcon#about to read 4, iclass 24, count 0 2006.229.11:35:54.15#ibcon#read 4, iclass 24, count 0 2006.229.11:35:54.15#ibcon#about to read 5, iclass 24, count 0 2006.229.11:35:54.15#ibcon#read 5, iclass 24, count 0 2006.229.11:35:54.15#ibcon#about to read 6, iclass 24, count 0 2006.229.11:35:54.15#ibcon#read 6, iclass 24, count 0 2006.229.11:35:54.15#ibcon#end of sib2, iclass 24, count 0 2006.229.11:35:54.15#ibcon#*after write, iclass 24, count 0 2006.229.11:35:54.15#ibcon#*before return 0, iclass 24, count 0 2006.229.11:35:54.15#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:54.15#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.11:35:54.15#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:35:54.15#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:35:54.15$vck44/vblo=8,744.99 2006.229.11:35:54.15#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.11:35:54.15#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.11:35:54.15#ibcon#ireg 17 cls_cnt 0 2006.229.11:35:54.15#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:54.15#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:54.15#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:54.15#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:35:54.15#ibcon#first serial, iclass 26, count 0 2006.229.11:35:54.15#ibcon#enter sib2, iclass 26, count 0 2006.229.11:35:54.15#ibcon#flushed, iclass 26, count 0 2006.229.11:35:54.15#ibcon#about to write, iclass 26, count 0 2006.229.11:35:54.15#ibcon#wrote, iclass 26, count 0 2006.229.11:35:54.15#ibcon#about to read 3, iclass 26, count 0 2006.229.11:35:54.17#ibcon#read 3, iclass 26, count 0 2006.229.11:35:54.17#ibcon#about to read 4, iclass 26, count 0 2006.229.11:35:54.17#ibcon#read 4, iclass 26, count 0 2006.229.11:35:54.17#ibcon#about to read 5, iclass 26, count 0 2006.229.11:35:54.17#ibcon#read 5, iclass 26, count 0 2006.229.11:35:54.17#ibcon#about to read 6, iclass 26, count 0 2006.229.11:35:54.17#ibcon#read 6, iclass 26, count 0 2006.229.11:35:54.17#ibcon#end of sib2, iclass 26, count 0 2006.229.11:35:54.17#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:35:54.17#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:35:54.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:35:54.17#ibcon#*before write, iclass 26, count 0 2006.229.11:35:54.17#ibcon#enter sib2, iclass 26, count 0 2006.229.11:35:54.17#ibcon#flushed, iclass 26, count 0 2006.229.11:35:54.17#ibcon#about to write, iclass 26, count 0 2006.229.11:35:54.17#ibcon#wrote, iclass 26, count 0 2006.229.11:35:54.17#ibcon#about to read 3, iclass 26, count 0 2006.229.11:35:54.21#ibcon#read 3, iclass 26, count 0 2006.229.11:35:54.21#ibcon#about to read 4, iclass 26, count 0 2006.229.11:35:54.21#ibcon#read 4, iclass 26, count 0 2006.229.11:35:54.21#ibcon#about to read 5, iclass 26, count 0 2006.229.11:35:54.21#ibcon#read 5, iclass 26, count 0 2006.229.11:35:54.21#ibcon#about to read 6, iclass 26, count 0 2006.229.11:35:54.21#ibcon#read 6, iclass 26, count 0 2006.229.11:35:54.21#ibcon#end of sib2, iclass 26, count 0 2006.229.11:35:54.21#ibcon#*after write, iclass 26, count 0 2006.229.11:35:54.21#ibcon#*before return 0, iclass 26, count 0 2006.229.11:35:54.21#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:54.21#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.11:35:54.21#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:35:54.21#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:35:54.21$vck44/vb=8,4 2006.229.11:35:54.21#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.11:35:54.21#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.11:35:54.21#ibcon#ireg 11 cls_cnt 2 2006.229.11:35:54.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:54.27#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:54.27#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:54.27#ibcon#enter wrdev, iclass 28, count 2 2006.229.11:35:54.27#ibcon#first serial, iclass 28, count 2 2006.229.11:35:54.27#ibcon#enter sib2, iclass 28, count 2 2006.229.11:35:54.27#ibcon#flushed, iclass 28, count 2 2006.229.11:35:54.27#ibcon#about to write, iclass 28, count 2 2006.229.11:35:54.27#ibcon#wrote, iclass 28, count 2 2006.229.11:35:54.27#ibcon#about to read 3, iclass 28, count 2 2006.229.11:35:54.29#ibcon#read 3, iclass 28, count 2 2006.229.11:35:54.29#ibcon#about to read 4, iclass 28, count 2 2006.229.11:35:54.29#ibcon#read 4, iclass 28, count 2 2006.229.11:35:54.29#ibcon#about to read 5, iclass 28, count 2 2006.229.11:35:54.29#ibcon#read 5, iclass 28, count 2 2006.229.11:35:54.29#ibcon#about to read 6, iclass 28, count 2 2006.229.11:35:54.29#ibcon#read 6, iclass 28, count 2 2006.229.11:35:54.29#ibcon#end of sib2, iclass 28, count 2 2006.229.11:35:54.29#ibcon#*mode == 0, iclass 28, count 2 2006.229.11:35:54.29#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.11:35:54.29#ibcon#[27=AT08-04\r\n] 2006.229.11:35:54.29#ibcon#*before write, iclass 28, count 2 2006.229.11:35:54.29#ibcon#enter sib2, iclass 28, count 2 2006.229.11:35:54.29#ibcon#flushed, iclass 28, count 2 2006.229.11:35:54.29#ibcon#about to write, iclass 28, count 2 2006.229.11:35:54.29#ibcon#wrote, iclass 28, count 2 2006.229.11:35:54.29#ibcon#about to read 3, iclass 28, count 2 2006.229.11:35:54.32#ibcon#read 3, iclass 28, count 2 2006.229.11:35:54.32#ibcon#about to read 4, iclass 28, count 2 2006.229.11:35:54.32#ibcon#read 4, iclass 28, count 2 2006.229.11:35:54.32#ibcon#about to read 5, iclass 28, count 2 2006.229.11:35:54.32#ibcon#read 5, iclass 28, count 2 2006.229.11:35:54.32#ibcon#about to read 6, iclass 28, count 2 2006.229.11:35:54.32#ibcon#read 6, iclass 28, count 2 2006.229.11:35:54.32#ibcon#end of sib2, iclass 28, count 2 2006.229.11:35:54.32#ibcon#*after write, iclass 28, count 2 2006.229.11:35:54.32#ibcon#*before return 0, iclass 28, count 2 2006.229.11:35:54.32#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:54.32#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.11:35:54.32#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.11:35:54.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:35:54.32#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:54.44#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:54.44#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:54.44#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:35:54.44#ibcon#first serial, iclass 28, count 0 2006.229.11:35:54.44#ibcon#enter sib2, iclass 28, count 0 2006.229.11:35:54.44#ibcon#flushed, iclass 28, count 0 2006.229.11:35:54.44#ibcon#about to write, iclass 28, count 0 2006.229.11:35:54.44#ibcon#wrote, iclass 28, count 0 2006.229.11:35:54.44#ibcon#about to read 3, iclass 28, count 0 2006.229.11:35:54.46#ibcon#read 3, iclass 28, count 0 2006.229.11:35:54.46#ibcon#about to read 4, iclass 28, count 0 2006.229.11:35:54.46#ibcon#read 4, iclass 28, count 0 2006.229.11:35:54.46#ibcon#about to read 5, iclass 28, count 0 2006.229.11:35:54.46#ibcon#read 5, iclass 28, count 0 2006.229.11:35:54.46#ibcon#about to read 6, iclass 28, count 0 2006.229.11:35:54.46#ibcon#read 6, iclass 28, count 0 2006.229.11:35:54.46#ibcon#end of sib2, iclass 28, count 0 2006.229.11:35:54.46#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:35:54.46#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:35:54.46#ibcon#[27=USB\r\n] 2006.229.11:35:54.46#ibcon#*before write, iclass 28, count 0 2006.229.11:35:54.46#ibcon#enter sib2, iclass 28, count 0 2006.229.11:35:54.46#ibcon#flushed, iclass 28, count 0 2006.229.11:35:54.46#ibcon#about to write, iclass 28, count 0 2006.229.11:35:54.46#ibcon#wrote, iclass 28, count 0 2006.229.11:35:54.46#ibcon#about to read 3, iclass 28, count 0 2006.229.11:35:54.49#ibcon#read 3, iclass 28, count 0 2006.229.11:35:54.49#ibcon#about to read 4, iclass 28, count 0 2006.229.11:35:54.49#ibcon#read 4, iclass 28, count 0 2006.229.11:35:54.49#ibcon#about to read 5, iclass 28, count 0 2006.229.11:35:54.49#ibcon#read 5, iclass 28, count 0 2006.229.11:35:54.49#ibcon#about to read 6, iclass 28, count 0 2006.229.11:35:54.49#ibcon#read 6, iclass 28, count 0 2006.229.11:35:54.49#ibcon#end of sib2, iclass 28, count 0 2006.229.11:35:54.49#ibcon#*after write, iclass 28, count 0 2006.229.11:35:54.49#ibcon#*before return 0, iclass 28, count 0 2006.229.11:35:54.49#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:54.49#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.11:35:54.49#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:35:54.49#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:35:54.49$vck44/vabw=wide 2006.229.11:35:54.49#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.11:35:54.49#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.11:35:54.49#ibcon#ireg 8 cls_cnt 0 2006.229.11:35:54.49#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:54.49#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:54.49#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:54.49#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:35:54.49#ibcon#first serial, iclass 30, count 0 2006.229.11:35:54.49#ibcon#enter sib2, iclass 30, count 0 2006.229.11:35:54.49#ibcon#flushed, iclass 30, count 0 2006.229.11:35:54.49#ibcon#about to write, iclass 30, count 0 2006.229.11:35:54.49#ibcon#wrote, iclass 30, count 0 2006.229.11:35:54.49#ibcon#about to read 3, iclass 30, count 0 2006.229.11:35:54.51#ibcon#read 3, iclass 30, count 0 2006.229.11:35:54.51#ibcon#about to read 4, iclass 30, count 0 2006.229.11:35:54.51#ibcon#read 4, iclass 30, count 0 2006.229.11:35:54.51#ibcon#about to read 5, iclass 30, count 0 2006.229.11:35:54.51#ibcon#read 5, iclass 30, count 0 2006.229.11:35:54.51#ibcon#about to read 6, iclass 30, count 0 2006.229.11:35:54.51#ibcon#read 6, iclass 30, count 0 2006.229.11:35:54.51#ibcon#end of sib2, iclass 30, count 0 2006.229.11:35:54.51#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:35:54.51#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:35:54.51#ibcon#[25=BW32\r\n] 2006.229.11:35:54.51#ibcon#*before write, iclass 30, count 0 2006.229.11:35:54.51#ibcon#enter sib2, iclass 30, count 0 2006.229.11:35:54.51#ibcon#flushed, iclass 30, count 0 2006.229.11:35:54.51#ibcon#about to write, iclass 30, count 0 2006.229.11:35:54.51#ibcon#wrote, iclass 30, count 0 2006.229.11:35:54.51#ibcon#about to read 3, iclass 30, count 0 2006.229.11:35:54.54#ibcon#read 3, iclass 30, count 0 2006.229.11:35:54.54#ibcon#about to read 4, iclass 30, count 0 2006.229.11:35:54.54#ibcon#read 4, iclass 30, count 0 2006.229.11:35:54.54#ibcon#about to read 5, iclass 30, count 0 2006.229.11:35:54.54#ibcon#read 5, iclass 30, count 0 2006.229.11:35:54.54#ibcon#about to read 6, iclass 30, count 0 2006.229.11:35:54.54#ibcon#read 6, iclass 30, count 0 2006.229.11:35:54.54#ibcon#end of sib2, iclass 30, count 0 2006.229.11:35:54.54#ibcon#*after write, iclass 30, count 0 2006.229.11:35:54.54#ibcon#*before return 0, iclass 30, count 0 2006.229.11:35:54.54#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:54.54#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.11:35:54.54#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:35:54.54#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:35:54.54$vck44/vbbw=wide 2006.229.11:35:54.54#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.11:35:54.54#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.11:35:54.54#ibcon#ireg 8 cls_cnt 0 2006.229.11:35:54.54#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:35:54.61#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:35:54.61#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:35:54.61#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:35:54.61#ibcon#first serial, iclass 32, count 0 2006.229.11:35:54.61#ibcon#enter sib2, iclass 32, count 0 2006.229.11:35:54.61#ibcon#flushed, iclass 32, count 0 2006.229.11:35:54.61#ibcon#about to write, iclass 32, count 0 2006.229.11:35:54.61#ibcon#wrote, iclass 32, count 0 2006.229.11:35:54.61#ibcon#about to read 3, iclass 32, count 0 2006.229.11:35:54.63#ibcon#read 3, iclass 32, count 0 2006.229.11:35:54.63#ibcon#about to read 4, iclass 32, count 0 2006.229.11:35:54.63#ibcon#read 4, iclass 32, count 0 2006.229.11:35:54.63#ibcon#about to read 5, iclass 32, count 0 2006.229.11:35:54.63#ibcon#read 5, iclass 32, count 0 2006.229.11:35:54.63#ibcon#about to read 6, iclass 32, count 0 2006.229.11:35:54.63#ibcon#read 6, iclass 32, count 0 2006.229.11:35:54.63#ibcon#end of sib2, iclass 32, count 0 2006.229.11:35:54.63#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:35:54.63#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:35:54.63#ibcon#[27=BW32\r\n] 2006.229.11:35:54.63#ibcon#*before write, iclass 32, count 0 2006.229.11:35:54.63#ibcon#enter sib2, iclass 32, count 0 2006.229.11:35:54.63#ibcon#flushed, iclass 32, count 0 2006.229.11:35:54.63#ibcon#about to write, iclass 32, count 0 2006.229.11:35:54.63#ibcon#wrote, iclass 32, count 0 2006.229.11:35:54.63#ibcon#about to read 3, iclass 32, count 0 2006.229.11:35:54.66#ibcon#read 3, iclass 32, count 0 2006.229.11:35:54.66#ibcon#about to read 4, iclass 32, count 0 2006.229.11:35:54.66#ibcon#read 4, iclass 32, count 0 2006.229.11:35:54.66#ibcon#about to read 5, iclass 32, count 0 2006.229.11:35:54.66#ibcon#read 5, iclass 32, count 0 2006.229.11:35:54.66#ibcon#about to read 6, iclass 32, count 0 2006.229.11:35:54.66#ibcon#read 6, iclass 32, count 0 2006.229.11:35:54.66#ibcon#end of sib2, iclass 32, count 0 2006.229.11:35:54.66#ibcon#*after write, iclass 32, count 0 2006.229.11:35:54.66#ibcon#*before return 0, iclass 32, count 0 2006.229.11:35:54.66#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:35:54.66#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:35:54.66#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:35:54.66#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:35:54.66$setupk4/ifdk4 2006.229.11:35:54.66$ifdk4/lo= 2006.229.11:35:54.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:35:54.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:35:54.66$ifdk4/patch= 2006.229.11:35:54.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:35:54.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:35:54.66$setupk4/!*+20s 2006.229.11:36:03.50#abcon#<5=/04 1.8 3.3 28.011001002.1\r\n> 2006.229.11:36:03.52#abcon#{5=INTERFACE CLEAR} 2006.229.11:36:03.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:36:09.17$setupk4/"tpicd 2006.229.11:36:09.17$setupk4/echo=off 2006.229.11:36:09.17$setupk4/xlog=off 2006.229.11:36:09.17:!2006.229.11:37:21 2006.229.11:36:18.14#trakl#Source acquired 2006.229.11:36:18.14#flagr#flagr/antenna,acquired 2006.229.11:37:21.00:preob 2006.229.11:37:22.13/onsource/TRACKING 2006.229.11:37:22.13:!2006.229.11:37:31 2006.229.11:37:31.00:"tape 2006.229.11:37:31.00:"st=record 2006.229.11:37:31.00:data_valid=on 2006.229.11:37:31.00:midob 2006.229.11:37:31.13/onsource/TRACKING 2006.229.11:37:31.13/wx/27.99,1002.2,100 2006.229.11:37:31.27/cable/+6.4058E-03 2006.229.11:37:32.36/va/01,08,usb,yes,30,33 2006.229.11:37:32.36/va/02,07,usb,yes,33,33 2006.229.11:37:32.36/va/03,06,usb,yes,41,43 2006.229.11:37:32.36/va/04,07,usb,yes,34,35 2006.229.11:37:32.36/va/05,04,usb,yes,30,31 2006.229.11:37:32.36/va/06,04,usb,yes,34,34 2006.229.11:37:32.36/va/07,05,usb,yes,30,31 2006.229.11:37:32.36/va/08,06,usb,yes,22,27 2006.229.11:37:32.59/valo/01,524.99,yes,locked 2006.229.11:37:32.59/valo/02,534.99,yes,locked 2006.229.11:37:32.59/valo/03,564.99,yes,locked 2006.229.11:37:32.59/valo/04,624.99,yes,locked 2006.229.11:37:32.59/valo/05,734.99,yes,locked 2006.229.11:37:32.59/valo/06,814.99,yes,locked 2006.229.11:37:32.59/valo/07,864.99,yes,locked 2006.229.11:37:32.59/valo/08,884.99,yes,locked 2006.229.11:37:33.68/vb/01,04,usb,yes,31,29 2006.229.11:37:33.68/vb/02,04,usb,yes,34,34 2006.229.11:37:33.68/vb/03,04,usb,yes,31,34 2006.229.11:37:33.68/vb/04,04,usb,yes,35,34 2006.229.11:37:33.68/vb/05,04,usb,yes,27,30 2006.229.11:37:33.68/vb/06,04,usb,yes,32,28 2006.229.11:37:33.68/vb/07,04,usb,yes,32,32 2006.229.11:37:33.68/vb/08,04,usb,yes,29,33 2006.229.11:37:33.92/vblo/01,629.99,yes,locked 2006.229.11:37:33.92/vblo/02,634.99,yes,locked 2006.229.11:37:33.92/vblo/03,649.99,yes,locked 2006.229.11:37:33.92/vblo/04,679.99,yes,locked 2006.229.11:37:33.92/vblo/05,709.99,yes,locked 2006.229.11:37:33.92/vblo/06,719.99,yes,locked 2006.229.11:37:33.92/vblo/07,734.99,yes,locked 2006.229.11:37:33.92/vblo/08,744.99,yes,locked 2006.229.11:37:34.07/vabw/8 2006.229.11:37:34.22/vbbw/8 2006.229.11:37:34.31/xfe/off,on,12.0 2006.229.11:37:34.69/ifatt/23,28,28,28 2006.229.11:37:35.07/fmout-gps/S +4.62E-07 2006.229.11:37:35.11:!2006.229.11:40:11 2006.229.11:40:11.00:data_valid=off 2006.229.11:40:11.00:"et 2006.229.11:40:11.00:!+3s 2006.229.11:40:14.01:"tape 2006.229.11:40:14.01:postob 2006.229.11:40:14.15/cable/+6.4040E-03 2006.229.11:40:14.15/wx/27.96,1002.3,100 2006.229.11:40:15.08/fmout-gps/S +4.60E-07 2006.229.11:40:15.08:scan_name=229-1144,jd0608,100 2006.229.11:40:15.08:source=2128-123,213135.26,-120704.8,2000.0,cw 2006.229.11:40:16.14#flagr#flagr/antenna,new-source 2006.229.11:40:16.14:checkk5 2006.229.11:40:16.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:40:16.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:40:17.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:40:17.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:40:18.15/chk_obsdata//k5ts1/T2291137??a.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.11:40:18.55/chk_obsdata//k5ts2/T2291137??b.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.11:40:18.93/chk_obsdata//k5ts3/T2291137??c.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.11:40:19.34/chk_obsdata//k5ts4/T2291137??d.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.11:40:20.06/k5log//k5ts1_log_newline 2006.229.11:40:20.76/k5log//k5ts2_log_newline 2006.229.11:40:21.46/k5log//k5ts3_log_newline 2006.229.11:40:22.17/k5log//k5ts4_log_newline 2006.229.11:40:22.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:40:22.19:setupk4=1 2006.229.11:40:22.19$setupk4/echo=on 2006.229.11:40:22.19$setupk4/pcalon 2006.229.11:40:22.19$pcalon/"no phase cal control is implemented here 2006.229.11:40:22.19$setupk4/"tpicd=stop 2006.229.11:40:22.19$setupk4/"rec=synch_on 2006.229.11:40:22.19$setupk4/"rec_mode=128 2006.229.11:40:22.19$setupk4/!* 2006.229.11:40:22.19$setupk4/recpk4 2006.229.11:40:22.19$recpk4/recpatch= 2006.229.11:40:22.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:40:22.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:40:22.20$setupk4/vck44 2006.229.11:40:22.20$vck44/valo=1,524.99 2006.229.11:40:22.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.11:40:22.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.11:40:22.20#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:22.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:22.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:22.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:22.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:40:22.20#ibcon#first serial, iclass 33, count 0 2006.229.11:40:22.20#ibcon#enter sib2, iclass 33, count 0 2006.229.11:40:22.20#ibcon#flushed, iclass 33, count 0 2006.229.11:40:22.20#ibcon#about to write, iclass 33, count 0 2006.229.11:40:22.20#ibcon#wrote, iclass 33, count 0 2006.229.11:40:22.20#ibcon#about to read 3, iclass 33, count 0 2006.229.11:40:22.22#ibcon#read 3, iclass 33, count 0 2006.229.11:40:22.22#ibcon#about to read 4, iclass 33, count 0 2006.229.11:40:22.22#ibcon#read 4, iclass 33, count 0 2006.229.11:40:22.22#ibcon#about to read 5, iclass 33, count 0 2006.229.11:40:22.22#ibcon#read 5, iclass 33, count 0 2006.229.11:40:22.22#ibcon#about to read 6, iclass 33, count 0 2006.229.11:40:22.22#ibcon#read 6, iclass 33, count 0 2006.229.11:40:22.22#ibcon#end of sib2, iclass 33, count 0 2006.229.11:40:22.22#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:40:22.22#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:40:22.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:40:22.22#ibcon#*before write, iclass 33, count 0 2006.229.11:40:22.22#ibcon#enter sib2, iclass 33, count 0 2006.229.11:40:22.22#ibcon#flushed, iclass 33, count 0 2006.229.11:40:22.22#ibcon#about to write, iclass 33, count 0 2006.229.11:40:22.22#ibcon#wrote, iclass 33, count 0 2006.229.11:40:22.22#ibcon#about to read 3, iclass 33, count 0 2006.229.11:40:22.27#ibcon#read 3, iclass 33, count 0 2006.229.11:40:22.27#ibcon#about to read 4, iclass 33, count 0 2006.229.11:40:22.27#ibcon#read 4, iclass 33, count 0 2006.229.11:40:22.27#ibcon#about to read 5, iclass 33, count 0 2006.229.11:40:22.27#ibcon#read 5, iclass 33, count 0 2006.229.11:40:22.27#ibcon#about to read 6, iclass 33, count 0 2006.229.11:40:22.27#ibcon#read 6, iclass 33, count 0 2006.229.11:40:22.27#ibcon#end of sib2, iclass 33, count 0 2006.229.11:40:22.27#ibcon#*after write, iclass 33, count 0 2006.229.11:40:22.27#ibcon#*before return 0, iclass 33, count 0 2006.229.11:40:22.27#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:22.27#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:22.27#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:40:22.27#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:40:22.27$vck44/va=1,8 2006.229.11:40:22.27#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.11:40:22.27#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.11:40:22.27#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:22.27#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:22.27#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:22.27#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:22.27#ibcon#enter wrdev, iclass 35, count 2 2006.229.11:40:22.27#ibcon#first serial, iclass 35, count 2 2006.229.11:40:22.27#ibcon#enter sib2, iclass 35, count 2 2006.229.11:40:22.27#ibcon#flushed, iclass 35, count 2 2006.229.11:40:22.27#ibcon#about to write, iclass 35, count 2 2006.229.11:40:22.27#ibcon#wrote, iclass 35, count 2 2006.229.11:40:22.27#ibcon#about to read 3, iclass 35, count 2 2006.229.11:40:22.29#ibcon#read 3, iclass 35, count 2 2006.229.11:40:22.29#ibcon#about to read 4, iclass 35, count 2 2006.229.11:40:22.29#ibcon#read 4, iclass 35, count 2 2006.229.11:40:22.29#ibcon#about to read 5, iclass 35, count 2 2006.229.11:40:22.29#ibcon#read 5, iclass 35, count 2 2006.229.11:40:22.29#ibcon#about to read 6, iclass 35, count 2 2006.229.11:40:22.29#ibcon#read 6, iclass 35, count 2 2006.229.11:40:22.29#ibcon#end of sib2, iclass 35, count 2 2006.229.11:40:22.29#ibcon#*mode == 0, iclass 35, count 2 2006.229.11:40:22.29#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.11:40:22.29#ibcon#[25=AT01-08\r\n] 2006.229.11:40:22.29#ibcon#*before write, iclass 35, count 2 2006.229.11:40:22.29#ibcon#enter sib2, iclass 35, count 2 2006.229.11:40:22.29#ibcon#flushed, iclass 35, count 2 2006.229.11:40:22.29#ibcon#about to write, iclass 35, count 2 2006.229.11:40:22.29#ibcon#wrote, iclass 35, count 2 2006.229.11:40:22.29#ibcon#about to read 3, iclass 35, count 2 2006.229.11:40:22.32#ibcon#read 3, iclass 35, count 2 2006.229.11:40:22.32#ibcon#about to read 4, iclass 35, count 2 2006.229.11:40:22.32#ibcon#read 4, iclass 35, count 2 2006.229.11:40:22.32#ibcon#about to read 5, iclass 35, count 2 2006.229.11:40:22.32#ibcon#read 5, iclass 35, count 2 2006.229.11:40:22.32#ibcon#about to read 6, iclass 35, count 2 2006.229.11:40:22.32#ibcon#read 6, iclass 35, count 2 2006.229.11:40:22.32#ibcon#end of sib2, iclass 35, count 2 2006.229.11:40:22.32#ibcon#*after write, iclass 35, count 2 2006.229.11:40:22.32#ibcon#*before return 0, iclass 35, count 2 2006.229.11:40:22.32#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:22.32#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:22.32#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.11:40:22.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:22.32#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:22.44#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:22.44#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:22.44#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:40:22.44#ibcon#first serial, iclass 35, count 0 2006.229.11:40:22.44#ibcon#enter sib2, iclass 35, count 0 2006.229.11:40:22.44#ibcon#flushed, iclass 35, count 0 2006.229.11:40:22.44#ibcon#about to write, iclass 35, count 0 2006.229.11:40:22.44#ibcon#wrote, iclass 35, count 0 2006.229.11:40:22.44#ibcon#about to read 3, iclass 35, count 0 2006.229.11:40:22.46#ibcon#read 3, iclass 35, count 0 2006.229.11:40:22.46#ibcon#about to read 4, iclass 35, count 0 2006.229.11:40:22.46#ibcon#read 4, iclass 35, count 0 2006.229.11:40:22.46#ibcon#about to read 5, iclass 35, count 0 2006.229.11:40:22.46#ibcon#read 5, iclass 35, count 0 2006.229.11:40:22.46#ibcon#about to read 6, iclass 35, count 0 2006.229.11:40:22.46#ibcon#read 6, iclass 35, count 0 2006.229.11:40:22.46#ibcon#end of sib2, iclass 35, count 0 2006.229.11:40:22.46#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:40:22.46#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:40:22.46#ibcon#[25=USB\r\n] 2006.229.11:40:22.46#ibcon#*before write, iclass 35, count 0 2006.229.11:40:22.46#ibcon#enter sib2, iclass 35, count 0 2006.229.11:40:22.46#ibcon#flushed, iclass 35, count 0 2006.229.11:40:22.46#ibcon#about to write, iclass 35, count 0 2006.229.11:40:22.46#ibcon#wrote, iclass 35, count 0 2006.229.11:40:22.46#ibcon#about to read 3, iclass 35, count 0 2006.229.11:40:22.49#ibcon#read 3, iclass 35, count 0 2006.229.11:40:22.49#ibcon#about to read 4, iclass 35, count 0 2006.229.11:40:22.49#ibcon#read 4, iclass 35, count 0 2006.229.11:40:22.49#ibcon#about to read 5, iclass 35, count 0 2006.229.11:40:22.49#ibcon#read 5, iclass 35, count 0 2006.229.11:40:22.49#ibcon#about to read 6, iclass 35, count 0 2006.229.11:40:22.49#ibcon#read 6, iclass 35, count 0 2006.229.11:40:22.49#ibcon#end of sib2, iclass 35, count 0 2006.229.11:40:22.49#ibcon#*after write, iclass 35, count 0 2006.229.11:40:22.49#ibcon#*before return 0, iclass 35, count 0 2006.229.11:40:22.49#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:22.49#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:22.49#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:40:22.49#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:40:22.49$vck44/valo=2,534.99 2006.229.11:40:22.49#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:40:22.49#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:40:22.49#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:22.49#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:22.49#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:22.49#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:22.49#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:40:22.49#ibcon#first serial, iclass 37, count 0 2006.229.11:40:22.49#ibcon#enter sib2, iclass 37, count 0 2006.229.11:40:22.49#ibcon#flushed, iclass 37, count 0 2006.229.11:40:22.49#ibcon#about to write, iclass 37, count 0 2006.229.11:40:22.49#ibcon#wrote, iclass 37, count 0 2006.229.11:40:22.49#ibcon#about to read 3, iclass 37, count 0 2006.229.11:40:22.51#ibcon#read 3, iclass 37, count 0 2006.229.11:40:22.51#ibcon#about to read 4, iclass 37, count 0 2006.229.11:40:22.51#ibcon#read 4, iclass 37, count 0 2006.229.11:40:22.51#ibcon#about to read 5, iclass 37, count 0 2006.229.11:40:22.51#ibcon#read 5, iclass 37, count 0 2006.229.11:40:22.51#ibcon#about to read 6, iclass 37, count 0 2006.229.11:40:22.51#ibcon#read 6, iclass 37, count 0 2006.229.11:40:22.51#ibcon#end of sib2, iclass 37, count 0 2006.229.11:40:22.51#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:40:22.51#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:40:22.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:40:22.51#ibcon#*before write, iclass 37, count 0 2006.229.11:40:22.51#ibcon#enter sib2, iclass 37, count 0 2006.229.11:40:22.51#ibcon#flushed, iclass 37, count 0 2006.229.11:40:22.51#ibcon#about to write, iclass 37, count 0 2006.229.11:40:22.51#ibcon#wrote, iclass 37, count 0 2006.229.11:40:22.51#ibcon#about to read 3, iclass 37, count 0 2006.229.11:40:22.55#ibcon#read 3, iclass 37, count 0 2006.229.11:40:22.55#ibcon#about to read 4, iclass 37, count 0 2006.229.11:40:22.55#ibcon#read 4, iclass 37, count 0 2006.229.11:40:22.55#ibcon#about to read 5, iclass 37, count 0 2006.229.11:40:22.55#ibcon#read 5, iclass 37, count 0 2006.229.11:40:22.55#ibcon#about to read 6, iclass 37, count 0 2006.229.11:40:22.55#ibcon#read 6, iclass 37, count 0 2006.229.11:40:22.55#ibcon#end of sib2, iclass 37, count 0 2006.229.11:40:22.55#ibcon#*after write, iclass 37, count 0 2006.229.11:40:22.55#ibcon#*before return 0, iclass 37, count 0 2006.229.11:40:22.55#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:22.55#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:22.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:40:22.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:40:22.55$vck44/va=2,7 2006.229.11:40:22.55#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.11:40:22.55#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.11:40:22.55#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:22.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:22.61#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:22.61#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:22.61#ibcon#enter wrdev, iclass 39, count 2 2006.229.11:40:22.61#ibcon#first serial, iclass 39, count 2 2006.229.11:40:22.61#ibcon#enter sib2, iclass 39, count 2 2006.229.11:40:22.61#ibcon#flushed, iclass 39, count 2 2006.229.11:40:22.61#ibcon#about to write, iclass 39, count 2 2006.229.11:40:22.61#ibcon#wrote, iclass 39, count 2 2006.229.11:40:22.61#ibcon#about to read 3, iclass 39, count 2 2006.229.11:40:22.63#ibcon#read 3, iclass 39, count 2 2006.229.11:40:22.63#ibcon#about to read 4, iclass 39, count 2 2006.229.11:40:22.63#ibcon#read 4, iclass 39, count 2 2006.229.11:40:22.63#ibcon#about to read 5, iclass 39, count 2 2006.229.11:40:22.63#ibcon#read 5, iclass 39, count 2 2006.229.11:40:22.63#ibcon#about to read 6, iclass 39, count 2 2006.229.11:40:22.63#ibcon#read 6, iclass 39, count 2 2006.229.11:40:22.63#ibcon#end of sib2, iclass 39, count 2 2006.229.11:40:22.63#ibcon#*mode == 0, iclass 39, count 2 2006.229.11:40:22.63#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.11:40:22.63#ibcon#[25=AT02-07\r\n] 2006.229.11:40:22.63#ibcon#*before write, iclass 39, count 2 2006.229.11:40:22.63#ibcon#enter sib2, iclass 39, count 2 2006.229.11:40:22.63#ibcon#flushed, iclass 39, count 2 2006.229.11:40:22.63#ibcon#about to write, iclass 39, count 2 2006.229.11:40:22.63#ibcon#wrote, iclass 39, count 2 2006.229.11:40:22.63#ibcon#about to read 3, iclass 39, count 2 2006.229.11:40:22.66#ibcon#read 3, iclass 39, count 2 2006.229.11:40:22.66#ibcon#about to read 4, iclass 39, count 2 2006.229.11:40:22.66#ibcon#read 4, iclass 39, count 2 2006.229.11:40:22.66#ibcon#about to read 5, iclass 39, count 2 2006.229.11:40:22.66#ibcon#read 5, iclass 39, count 2 2006.229.11:40:22.66#ibcon#about to read 6, iclass 39, count 2 2006.229.11:40:22.66#ibcon#read 6, iclass 39, count 2 2006.229.11:40:22.66#ibcon#end of sib2, iclass 39, count 2 2006.229.11:40:22.66#ibcon#*after write, iclass 39, count 2 2006.229.11:40:22.66#ibcon#*before return 0, iclass 39, count 2 2006.229.11:40:22.66#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:22.66#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:22.66#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.11:40:22.66#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:22.66#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:22.78#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:22.78#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:22.78#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:40:22.78#ibcon#first serial, iclass 39, count 0 2006.229.11:40:22.78#ibcon#enter sib2, iclass 39, count 0 2006.229.11:40:22.78#ibcon#flushed, iclass 39, count 0 2006.229.11:40:22.78#ibcon#about to write, iclass 39, count 0 2006.229.11:40:22.78#ibcon#wrote, iclass 39, count 0 2006.229.11:40:22.78#ibcon#about to read 3, iclass 39, count 0 2006.229.11:40:22.80#ibcon#read 3, iclass 39, count 0 2006.229.11:40:22.80#ibcon#about to read 4, iclass 39, count 0 2006.229.11:40:22.80#ibcon#read 4, iclass 39, count 0 2006.229.11:40:22.80#ibcon#about to read 5, iclass 39, count 0 2006.229.11:40:22.80#ibcon#read 5, iclass 39, count 0 2006.229.11:40:22.80#ibcon#about to read 6, iclass 39, count 0 2006.229.11:40:22.80#ibcon#read 6, iclass 39, count 0 2006.229.11:40:22.80#ibcon#end of sib2, iclass 39, count 0 2006.229.11:40:22.80#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:40:22.80#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:40:22.80#ibcon#[25=USB\r\n] 2006.229.11:40:22.80#ibcon#*before write, iclass 39, count 0 2006.229.11:40:22.80#ibcon#enter sib2, iclass 39, count 0 2006.229.11:40:22.80#ibcon#flushed, iclass 39, count 0 2006.229.11:40:22.80#ibcon#about to write, iclass 39, count 0 2006.229.11:40:22.80#ibcon#wrote, iclass 39, count 0 2006.229.11:40:22.80#ibcon#about to read 3, iclass 39, count 0 2006.229.11:40:22.83#ibcon#read 3, iclass 39, count 0 2006.229.11:40:22.83#ibcon#about to read 4, iclass 39, count 0 2006.229.11:40:22.83#ibcon#read 4, iclass 39, count 0 2006.229.11:40:22.83#ibcon#about to read 5, iclass 39, count 0 2006.229.11:40:22.83#ibcon#read 5, iclass 39, count 0 2006.229.11:40:22.83#ibcon#about to read 6, iclass 39, count 0 2006.229.11:40:22.83#ibcon#read 6, iclass 39, count 0 2006.229.11:40:22.83#ibcon#end of sib2, iclass 39, count 0 2006.229.11:40:22.83#ibcon#*after write, iclass 39, count 0 2006.229.11:40:22.83#ibcon#*before return 0, iclass 39, count 0 2006.229.11:40:22.83#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:22.83#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:22.83#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:40:22.83#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:40:22.83$vck44/valo=3,564.99 2006.229.11:40:22.83#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:40:22.83#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:40:22.83#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:22.83#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:22.83#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:22.83#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:22.83#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:40:22.83#ibcon#first serial, iclass 3, count 0 2006.229.11:40:22.83#ibcon#enter sib2, iclass 3, count 0 2006.229.11:40:22.83#ibcon#flushed, iclass 3, count 0 2006.229.11:40:22.83#ibcon#about to write, iclass 3, count 0 2006.229.11:40:22.83#ibcon#wrote, iclass 3, count 0 2006.229.11:40:22.83#ibcon#about to read 3, iclass 3, count 0 2006.229.11:40:22.85#ibcon#read 3, iclass 3, count 0 2006.229.11:40:22.85#ibcon#about to read 4, iclass 3, count 0 2006.229.11:40:22.85#ibcon#read 4, iclass 3, count 0 2006.229.11:40:22.85#ibcon#about to read 5, iclass 3, count 0 2006.229.11:40:22.85#ibcon#read 5, iclass 3, count 0 2006.229.11:40:22.85#ibcon#about to read 6, iclass 3, count 0 2006.229.11:40:22.85#ibcon#read 6, iclass 3, count 0 2006.229.11:40:22.85#ibcon#end of sib2, iclass 3, count 0 2006.229.11:40:22.85#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:40:22.85#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:40:22.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:40:22.85#ibcon#*before write, iclass 3, count 0 2006.229.11:40:22.85#ibcon#enter sib2, iclass 3, count 0 2006.229.11:40:22.85#ibcon#flushed, iclass 3, count 0 2006.229.11:40:22.85#ibcon#about to write, iclass 3, count 0 2006.229.11:40:22.85#ibcon#wrote, iclass 3, count 0 2006.229.11:40:22.85#ibcon#about to read 3, iclass 3, count 0 2006.229.11:40:22.89#ibcon#read 3, iclass 3, count 0 2006.229.11:40:22.89#ibcon#about to read 4, iclass 3, count 0 2006.229.11:40:22.89#ibcon#read 4, iclass 3, count 0 2006.229.11:40:22.89#ibcon#about to read 5, iclass 3, count 0 2006.229.11:40:22.89#ibcon#read 5, iclass 3, count 0 2006.229.11:40:22.89#ibcon#about to read 6, iclass 3, count 0 2006.229.11:40:22.89#ibcon#read 6, iclass 3, count 0 2006.229.11:40:22.89#ibcon#end of sib2, iclass 3, count 0 2006.229.11:40:22.89#ibcon#*after write, iclass 3, count 0 2006.229.11:40:22.89#ibcon#*before return 0, iclass 3, count 0 2006.229.11:40:22.89#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:22.89#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:22.89#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:40:22.89#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:40:22.89$vck44/va=3,6 2006.229.11:40:22.89#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.11:40:22.89#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.11:40:22.89#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:22.89#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:22.95#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:22.95#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:22.95#ibcon#enter wrdev, iclass 5, count 2 2006.229.11:40:22.95#ibcon#first serial, iclass 5, count 2 2006.229.11:40:22.95#ibcon#enter sib2, iclass 5, count 2 2006.229.11:40:22.95#ibcon#flushed, iclass 5, count 2 2006.229.11:40:22.95#ibcon#about to write, iclass 5, count 2 2006.229.11:40:22.95#ibcon#wrote, iclass 5, count 2 2006.229.11:40:22.95#ibcon#about to read 3, iclass 5, count 2 2006.229.11:40:22.97#ibcon#read 3, iclass 5, count 2 2006.229.11:40:22.97#ibcon#about to read 4, iclass 5, count 2 2006.229.11:40:22.97#ibcon#read 4, iclass 5, count 2 2006.229.11:40:22.97#ibcon#about to read 5, iclass 5, count 2 2006.229.11:40:22.97#ibcon#read 5, iclass 5, count 2 2006.229.11:40:22.97#ibcon#about to read 6, iclass 5, count 2 2006.229.11:40:22.97#ibcon#read 6, iclass 5, count 2 2006.229.11:40:22.97#ibcon#end of sib2, iclass 5, count 2 2006.229.11:40:22.97#ibcon#*mode == 0, iclass 5, count 2 2006.229.11:40:22.97#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.11:40:22.97#ibcon#[25=AT03-06\r\n] 2006.229.11:40:22.97#ibcon#*before write, iclass 5, count 2 2006.229.11:40:22.97#ibcon#enter sib2, iclass 5, count 2 2006.229.11:40:22.97#ibcon#flushed, iclass 5, count 2 2006.229.11:40:22.97#ibcon#about to write, iclass 5, count 2 2006.229.11:40:22.97#ibcon#wrote, iclass 5, count 2 2006.229.11:40:22.97#ibcon#about to read 3, iclass 5, count 2 2006.229.11:40:23.00#ibcon#read 3, iclass 5, count 2 2006.229.11:40:23.00#ibcon#about to read 4, iclass 5, count 2 2006.229.11:40:23.00#ibcon#read 4, iclass 5, count 2 2006.229.11:40:23.00#ibcon#about to read 5, iclass 5, count 2 2006.229.11:40:23.00#ibcon#read 5, iclass 5, count 2 2006.229.11:40:23.00#ibcon#about to read 6, iclass 5, count 2 2006.229.11:40:23.00#ibcon#read 6, iclass 5, count 2 2006.229.11:40:23.00#ibcon#end of sib2, iclass 5, count 2 2006.229.11:40:23.00#ibcon#*after write, iclass 5, count 2 2006.229.11:40:23.00#ibcon#*before return 0, iclass 5, count 2 2006.229.11:40:23.00#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:23.00#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:23.00#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.11:40:23.00#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:23.00#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:23.12#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:23.12#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:23.12#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:40:23.12#ibcon#first serial, iclass 5, count 0 2006.229.11:40:23.12#ibcon#enter sib2, iclass 5, count 0 2006.229.11:40:23.12#ibcon#flushed, iclass 5, count 0 2006.229.11:40:23.12#ibcon#about to write, iclass 5, count 0 2006.229.11:40:23.12#ibcon#wrote, iclass 5, count 0 2006.229.11:40:23.12#ibcon#about to read 3, iclass 5, count 0 2006.229.11:40:23.14#ibcon#read 3, iclass 5, count 0 2006.229.11:40:23.14#ibcon#about to read 4, iclass 5, count 0 2006.229.11:40:23.14#ibcon#read 4, iclass 5, count 0 2006.229.11:40:23.14#ibcon#about to read 5, iclass 5, count 0 2006.229.11:40:23.14#ibcon#read 5, iclass 5, count 0 2006.229.11:40:23.14#ibcon#about to read 6, iclass 5, count 0 2006.229.11:40:23.14#ibcon#read 6, iclass 5, count 0 2006.229.11:40:23.14#ibcon#end of sib2, iclass 5, count 0 2006.229.11:40:23.14#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:40:23.14#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:40:23.14#ibcon#[25=USB\r\n] 2006.229.11:40:23.14#ibcon#*before write, iclass 5, count 0 2006.229.11:40:23.14#ibcon#enter sib2, iclass 5, count 0 2006.229.11:40:23.14#ibcon#flushed, iclass 5, count 0 2006.229.11:40:23.14#ibcon#about to write, iclass 5, count 0 2006.229.11:40:23.14#ibcon#wrote, iclass 5, count 0 2006.229.11:40:23.14#ibcon#about to read 3, iclass 5, count 0 2006.229.11:40:23.17#ibcon#read 3, iclass 5, count 0 2006.229.11:40:23.17#ibcon#about to read 4, iclass 5, count 0 2006.229.11:40:23.17#ibcon#read 4, iclass 5, count 0 2006.229.11:40:23.17#ibcon#about to read 5, iclass 5, count 0 2006.229.11:40:23.17#ibcon#read 5, iclass 5, count 0 2006.229.11:40:23.17#ibcon#about to read 6, iclass 5, count 0 2006.229.11:40:23.17#ibcon#read 6, iclass 5, count 0 2006.229.11:40:23.17#ibcon#end of sib2, iclass 5, count 0 2006.229.11:40:23.17#ibcon#*after write, iclass 5, count 0 2006.229.11:40:23.17#ibcon#*before return 0, iclass 5, count 0 2006.229.11:40:23.17#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:23.17#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:23.17#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:40:23.17#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:40:23.17$vck44/valo=4,624.99 2006.229.11:40:23.17#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.11:40:23.17#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.11:40:23.17#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:23.17#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:23.17#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:23.17#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:23.17#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:40:23.17#ibcon#first serial, iclass 7, count 0 2006.229.11:40:23.17#ibcon#enter sib2, iclass 7, count 0 2006.229.11:40:23.17#ibcon#flushed, iclass 7, count 0 2006.229.11:40:23.17#ibcon#about to write, iclass 7, count 0 2006.229.11:40:23.17#ibcon#wrote, iclass 7, count 0 2006.229.11:40:23.17#ibcon#about to read 3, iclass 7, count 0 2006.229.11:40:23.19#ibcon#read 3, iclass 7, count 0 2006.229.11:40:23.19#ibcon#about to read 4, iclass 7, count 0 2006.229.11:40:23.19#ibcon#read 4, iclass 7, count 0 2006.229.11:40:23.19#ibcon#about to read 5, iclass 7, count 0 2006.229.11:40:23.19#ibcon#read 5, iclass 7, count 0 2006.229.11:40:23.19#ibcon#about to read 6, iclass 7, count 0 2006.229.11:40:23.19#ibcon#read 6, iclass 7, count 0 2006.229.11:40:23.19#ibcon#end of sib2, iclass 7, count 0 2006.229.11:40:23.19#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:40:23.19#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:40:23.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:40:23.19#ibcon#*before write, iclass 7, count 0 2006.229.11:40:23.19#ibcon#enter sib2, iclass 7, count 0 2006.229.11:40:23.19#ibcon#flushed, iclass 7, count 0 2006.229.11:40:23.19#ibcon#about to write, iclass 7, count 0 2006.229.11:40:23.19#ibcon#wrote, iclass 7, count 0 2006.229.11:40:23.19#ibcon#about to read 3, iclass 7, count 0 2006.229.11:40:23.23#ibcon#read 3, iclass 7, count 0 2006.229.11:40:23.23#ibcon#about to read 4, iclass 7, count 0 2006.229.11:40:23.23#ibcon#read 4, iclass 7, count 0 2006.229.11:40:23.23#ibcon#about to read 5, iclass 7, count 0 2006.229.11:40:23.23#ibcon#read 5, iclass 7, count 0 2006.229.11:40:23.23#ibcon#about to read 6, iclass 7, count 0 2006.229.11:40:23.23#ibcon#read 6, iclass 7, count 0 2006.229.11:40:23.23#ibcon#end of sib2, iclass 7, count 0 2006.229.11:40:23.23#ibcon#*after write, iclass 7, count 0 2006.229.11:40:23.23#ibcon#*before return 0, iclass 7, count 0 2006.229.11:40:23.23#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:23.23#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:23.23#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:40:23.23#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:40:23.23$vck44/va=4,7 2006.229.11:40:23.23#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.11:40:23.23#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.11:40:23.23#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:23.23#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:23.29#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:23.29#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:23.29#ibcon#enter wrdev, iclass 11, count 2 2006.229.11:40:23.29#ibcon#first serial, iclass 11, count 2 2006.229.11:40:23.29#ibcon#enter sib2, iclass 11, count 2 2006.229.11:40:23.29#ibcon#flushed, iclass 11, count 2 2006.229.11:40:23.29#ibcon#about to write, iclass 11, count 2 2006.229.11:40:23.29#ibcon#wrote, iclass 11, count 2 2006.229.11:40:23.29#ibcon#about to read 3, iclass 11, count 2 2006.229.11:40:23.31#ibcon#read 3, iclass 11, count 2 2006.229.11:40:23.31#ibcon#about to read 4, iclass 11, count 2 2006.229.11:40:23.31#ibcon#read 4, iclass 11, count 2 2006.229.11:40:23.31#ibcon#about to read 5, iclass 11, count 2 2006.229.11:40:23.31#ibcon#read 5, iclass 11, count 2 2006.229.11:40:23.31#ibcon#about to read 6, iclass 11, count 2 2006.229.11:40:23.31#ibcon#read 6, iclass 11, count 2 2006.229.11:40:23.31#ibcon#end of sib2, iclass 11, count 2 2006.229.11:40:23.31#ibcon#*mode == 0, iclass 11, count 2 2006.229.11:40:23.31#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.11:40:23.31#ibcon#[25=AT04-07\r\n] 2006.229.11:40:23.31#ibcon#*before write, iclass 11, count 2 2006.229.11:40:23.31#ibcon#enter sib2, iclass 11, count 2 2006.229.11:40:23.31#ibcon#flushed, iclass 11, count 2 2006.229.11:40:23.31#ibcon#about to write, iclass 11, count 2 2006.229.11:40:23.31#ibcon#wrote, iclass 11, count 2 2006.229.11:40:23.31#ibcon#about to read 3, iclass 11, count 2 2006.229.11:40:23.34#ibcon#read 3, iclass 11, count 2 2006.229.11:40:23.34#ibcon#about to read 4, iclass 11, count 2 2006.229.11:40:23.34#ibcon#read 4, iclass 11, count 2 2006.229.11:40:23.34#ibcon#about to read 5, iclass 11, count 2 2006.229.11:40:23.34#ibcon#read 5, iclass 11, count 2 2006.229.11:40:23.34#ibcon#about to read 6, iclass 11, count 2 2006.229.11:40:23.34#ibcon#read 6, iclass 11, count 2 2006.229.11:40:23.34#ibcon#end of sib2, iclass 11, count 2 2006.229.11:40:23.34#ibcon#*after write, iclass 11, count 2 2006.229.11:40:23.34#ibcon#*before return 0, iclass 11, count 2 2006.229.11:40:23.34#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:23.34#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:23.34#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.11:40:23.34#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:23.34#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:23.46#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:23.46#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:23.46#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:40:23.46#ibcon#first serial, iclass 11, count 0 2006.229.11:40:23.46#ibcon#enter sib2, iclass 11, count 0 2006.229.11:40:23.46#ibcon#flushed, iclass 11, count 0 2006.229.11:40:23.46#ibcon#about to write, iclass 11, count 0 2006.229.11:40:23.46#ibcon#wrote, iclass 11, count 0 2006.229.11:40:23.46#ibcon#about to read 3, iclass 11, count 0 2006.229.11:40:23.48#ibcon#read 3, iclass 11, count 0 2006.229.11:40:23.48#ibcon#about to read 4, iclass 11, count 0 2006.229.11:40:23.48#ibcon#read 4, iclass 11, count 0 2006.229.11:40:23.48#ibcon#about to read 5, iclass 11, count 0 2006.229.11:40:23.48#ibcon#read 5, iclass 11, count 0 2006.229.11:40:23.48#ibcon#about to read 6, iclass 11, count 0 2006.229.11:40:23.48#ibcon#read 6, iclass 11, count 0 2006.229.11:40:23.48#ibcon#end of sib2, iclass 11, count 0 2006.229.11:40:23.48#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:40:23.48#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:40:23.48#ibcon#[25=USB\r\n] 2006.229.11:40:23.48#ibcon#*before write, iclass 11, count 0 2006.229.11:40:23.48#ibcon#enter sib2, iclass 11, count 0 2006.229.11:40:23.48#ibcon#flushed, iclass 11, count 0 2006.229.11:40:23.48#ibcon#about to write, iclass 11, count 0 2006.229.11:40:23.48#ibcon#wrote, iclass 11, count 0 2006.229.11:40:23.48#ibcon#about to read 3, iclass 11, count 0 2006.229.11:40:23.51#ibcon#read 3, iclass 11, count 0 2006.229.11:40:23.51#ibcon#about to read 4, iclass 11, count 0 2006.229.11:40:23.51#ibcon#read 4, iclass 11, count 0 2006.229.11:40:23.51#ibcon#about to read 5, iclass 11, count 0 2006.229.11:40:23.51#ibcon#read 5, iclass 11, count 0 2006.229.11:40:23.51#ibcon#about to read 6, iclass 11, count 0 2006.229.11:40:23.51#ibcon#read 6, iclass 11, count 0 2006.229.11:40:23.51#ibcon#end of sib2, iclass 11, count 0 2006.229.11:40:23.51#ibcon#*after write, iclass 11, count 0 2006.229.11:40:23.51#ibcon#*before return 0, iclass 11, count 0 2006.229.11:40:23.51#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:23.51#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:23.51#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:40:23.51#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:40:23.51$vck44/valo=5,734.99 2006.229.11:40:23.51#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.11:40:23.51#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.11:40:23.51#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:23.51#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:23.51#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:23.51#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:23.51#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:40:23.51#ibcon#first serial, iclass 13, count 0 2006.229.11:40:23.51#ibcon#enter sib2, iclass 13, count 0 2006.229.11:40:23.51#ibcon#flushed, iclass 13, count 0 2006.229.11:40:23.51#ibcon#about to write, iclass 13, count 0 2006.229.11:40:23.51#ibcon#wrote, iclass 13, count 0 2006.229.11:40:23.51#ibcon#about to read 3, iclass 13, count 0 2006.229.11:40:23.53#ibcon#read 3, iclass 13, count 0 2006.229.11:40:23.53#ibcon#about to read 4, iclass 13, count 0 2006.229.11:40:23.53#ibcon#read 4, iclass 13, count 0 2006.229.11:40:23.53#ibcon#about to read 5, iclass 13, count 0 2006.229.11:40:23.53#ibcon#read 5, iclass 13, count 0 2006.229.11:40:23.53#ibcon#about to read 6, iclass 13, count 0 2006.229.11:40:23.53#ibcon#read 6, iclass 13, count 0 2006.229.11:40:23.53#ibcon#end of sib2, iclass 13, count 0 2006.229.11:40:23.53#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:40:23.53#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:40:23.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:40:23.53#ibcon#*before write, iclass 13, count 0 2006.229.11:40:23.53#ibcon#enter sib2, iclass 13, count 0 2006.229.11:40:23.53#ibcon#flushed, iclass 13, count 0 2006.229.11:40:23.53#ibcon#about to write, iclass 13, count 0 2006.229.11:40:23.53#ibcon#wrote, iclass 13, count 0 2006.229.11:40:23.53#ibcon#about to read 3, iclass 13, count 0 2006.229.11:40:23.57#ibcon#read 3, iclass 13, count 0 2006.229.11:40:23.57#ibcon#about to read 4, iclass 13, count 0 2006.229.11:40:23.57#ibcon#read 4, iclass 13, count 0 2006.229.11:40:23.57#ibcon#about to read 5, iclass 13, count 0 2006.229.11:40:23.57#ibcon#read 5, iclass 13, count 0 2006.229.11:40:23.57#ibcon#about to read 6, iclass 13, count 0 2006.229.11:40:23.57#ibcon#read 6, iclass 13, count 0 2006.229.11:40:23.57#ibcon#end of sib2, iclass 13, count 0 2006.229.11:40:23.57#ibcon#*after write, iclass 13, count 0 2006.229.11:40:23.57#ibcon#*before return 0, iclass 13, count 0 2006.229.11:40:23.57#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:23.57#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:23.57#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:40:23.57#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:40:23.57$vck44/va=5,4 2006.229.11:40:23.57#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.11:40:23.57#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.11:40:23.57#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:23.57#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:23.63#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:23.63#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:23.63#ibcon#enter wrdev, iclass 15, count 2 2006.229.11:40:23.63#ibcon#first serial, iclass 15, count 2 2006.229.11:40:23.63#ibcon#enter sib2, iclass 15, count 2 2006.229.11:40:23.63#ibcon#flushed, iclass 15, count 2 2006.229.11:40:23.63#ibcon#about to write, iclass 15, count 2 2006.229.11:40:23.63#ibcon#wrote, iclass 15, count 2 2006.229.11:40:23.63#ibcon#about to read 3, iclass 15, count 2 2006.229.11:40:23.65#ibcon#read 3, iclass 15, count 2 2006.229.11:40:23.65#ibcon#about to read 4, iclass 15, count 2 2006.229.11:40:23.65#ibcon#read 4, iclass 15, count 2 2006.229.11:40:23.65#ibcon#about to read 5, iclass 15, count 2 2006.229.11:40:23.65#ibcon#read 5, iclass 15, count 2 2006.229.11:40:23.65#ibcon#about to read 6, iclass 15, count 2 2006.229.11:40:23.65#ibcon#read 6, iclass 15, count 2 2006.229.11:40:23.65#ibcon#end of sib2, iclass 15, count 2 2006.229.11:40:23.65#ibcon#*mode == 0, iclass 15, count 2 2006.229.11:40:23.65#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.11:40:23.65#ibcon#[25=AT05-04\r\n] 2006.229.11:40:23.65#ibcon#*before write, iclass 15, count 2 2006.229.11:40:23.65#ibcon#enter sib2, iclass 15, count 2 2006.229.11:40:23.65#ibcon#flushed, iclass 15, count 2 2006.229.11:40:23.65#ibcon#about to write, iclass 15, count 2 2006.229.11:40:23.65#ibcon#wrote, iclass 15, count 2 2006.229.11:40:23.65#ibcon#about to read 3, iclass 15, count 2 2006.229.11:40:23.68#ibcon#read 3, iclass 15, count 2 2006.229.11:40:23.68#ibcon#about to read 4, iclass 15, count 2 2006.229.11:40:23.68#ibcon#read 4, iclass 15, count 2 2006.229.11:40:23.68#ibcon#about to read 5, iclass 15, count 2 2006.229.11:40:23.68#ibcon#read 5, iclass 15, count 2 2006.229.11:40:23.68#ibcon#about to read 6, iclass 15, count 2 2006.229.11:40:23.68#ibcon#read 6, iclass 15, count 2 2006.229.11:40:23.68#ibcon#end of sib2, iclass 15, count 2 2006.229.11:40:23.68#ibcon#*after write, iclass 15, count 2 2006.229.11:40:23.68#ibcon#*before return 0, iclass 15, count 2 2006.229.11:40:23.68#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:23.68#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:23.68#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.11:40:23.68#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:23.68#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:23.80#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:23.80#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:23.80#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:40:23.80#ibcon#first serial, iclass 15, count 0 2006.229.11:40:23.80#ibcon#enter sib2, iclass 15, count 0 2006.229.11:40:23.80#ibcon#flushed, iclass 15, count 0 2006.229.11:40:23.80#ibcon#about to write, iclass 15, count 0 2006.229.11:40:23.80#ibcon#wrote, iclass 15, count 0 2006.229.11:40:23.80#ibcon#about to read 3, iclass 15, count 0 2006.229.11:40:23.82#ibcon#read 3, iclass 15, count 0 2006.229.11:40:23.82#ibcon#about to read 4, iclass 15, count 0 2006.229.11:40:23.82#ibcon#read 4, iclass 15, count 0 2006.229.11:40:23.82#ibcon#about to read 5, iclass 15, count 0 2006.229.11:40:23.82#ibcon#read 5, iclass 15, count 0 2006.229.11:40:23.82#ibcon#about to read 6, iclass 15, count 0 2006.229.11:40:23.82#ibcon#read 6, iclass 15, count 0 2006.229.11:40:23.82#ibcon#end of sib2, iclass 15, count 0 2006.229.11:40:23.82#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:40:23.82#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:40:23.82#ibcon#[25=USB\r\n] 2006.229.11:40:23.82#ibcon#*before write, iclass 15, count 0 2006.229.11:40:23.82#ibcon#enter sib2, iclass 15, count 0 2006.229.11:40:23.82#ibcon#flushed, iclass 15, count 0 2006.229.11:40:23.82#ibcon#about to write, iclass 15, count 0 2006.229.11:40:23.82#ibcon#wrote, iclass 15, count 0 2006.229.11:40:23.82#ibcon#about to read 3, iclass 15, count 0 2006.229.11:40:23.85#ibcon#read 3, iclass 15, count 0 2006.229.11:40:23.85#ibcon#about to read 4, iclass 15, count 0 2006.229.11:40:23.85#ibcon#read 4, iclass 15, count 0 2006.229.11:40:23.85#ibcon#about to read 5, iclass 15, count 0 2006.229.11:40:23.85#ibcon#read 5, iclass 15, count 0 2006.229.11:40:23.85#ibcon#about to read 6, iclass 15, count 0 2006.229.11:40:23.85#ibcon#read 6, iclass 15, count 0 2006.229.11:40:23.85#ibcon#end of sib2, iclass 15, count 0 2006.229.11:40:23.85#ibcon#*after write, iclass 15, count 0 2006.229.11:40:23.85#ibcon#*before return 0, iclass 15, count 0 2006.229.11:40:23.85#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:23.85#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:23.85#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:40:23.85#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:40:23.85$vck44/valo=6,814.99 2006.229.11:40:23.85#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.11:40:23.85#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.11:40:23.85#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:23.85#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:23.85#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:23.85#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:23.85#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:40:23.85#ibcon#first serial, iclass 17, count 0 2006.229.11:40:23.85#ibcon#enter sib2, iclass 17, count 0 2006.229.11:40:23.85#ibcon#flushed, iclass 17, count 0 2006.229.11:40:23.85#ibcon#about to write, iclass 17, count 0 2006.229.11:40:23.85#ibcon#wrote, iclass 17, count 0 2006.229.11:40:23.85#ibcon#about to read 3, iclass 17, count 0 2006.229.11:40:23.87#ibcon#read 3, iclass 17, count 0 2006.229.11:40:23.87#ibcon#about to read 4, iclass 17, count 0 2006.229.11:40:23.87#ibcon#read 4, iclass 17, count 0 2006.229.11:40:23.87#ibcon#about to read 5, iclass 17, count 0 2006.229.11:40:23.87#ibcon#read 5, iclass 17, count 0 2006.229.11:40:23.87#ibcon#about to read 6, iclass 17, count 0 2006.229.11:40:23.87#ibcon#read 6, iclass 17, count 0 2006.229.11:40:23.87#ibcon#end of sib2, iclass 17, count 0 2006.229.11:40:23.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:40:23.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:40:23.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:40:23.87#ibcon#*before write, iclass 17, count 0 2006.229.11:40:23.87#ibcon#enter sib2, iclass 17, count 0 2006.229.11:40:23.87#ibcon#flushed, iclass 17, count 0 2006.229.11:40:23.87#ibcon#about to write, iclass 17, count 0 2006.229.11:40:23.87#ibcon#wrote, iclass 17, count 0 2006.229.11:40:23.87#ibcon#about to read 3, iclass 17, count 0 2006.229.11:40:23.91#ibcon#read 3, iclass 17, count 0 2006.229.11:40:23.91#ibcon#about to read 4, iclass 17, count 0 2006.229.11:40:23.91#ibcon#read 4, iclass 17, count 0 2006.229.11:40:23.91#ibcon#about to read 5, iclass 17, count 0 2006.229.11:40:23.91#ibcon#read 5, iclass 17, count 0 2006.229.11:40:23.91#ibcon#about to read 6, iclass 17, count 0 2006.229.11:40:23.91#ibcon#read 6, iclass 17, count 0 2006.229.11:40:23.91#ibcon#end of sib2, iclass 17, count 0 2006.229.11:40:23.91#ibcon#*after write, iclass 17, count 0 2006.229.11:40:23.91#ibcon#*before return 0, iclass 17, count 0 2006.229.11:40:23.91#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:23.91#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:23.91#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:40:23.91#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:40:23.91$vck44/va=6,4 2006.229.11:40:23.91#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.11:40:23.91#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.11:40:23.91#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:23.91#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:23.97#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:23.97#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:23.97#ibcon#enter wrdev, iclass 19, count 2 2006.229.11:40:23.97#ibcon#first serial, iclass 19, count 2 2006.229.11:40:23.97#ibcon#enter sib2, iclass 19, count 2 2006.229.11:40:23.97#ibcon#flushed, iclass 19, count 2 2006.229.11:40:23.97#ibcon#about to write, iclass 19, count 2 2006.229.11:40:23.97#ibcon#wrote, iclass 19, count 2 2006.229.11:40:23.97#ibcon#about to read 3, iclass 19, count 2 2006.229.11:40:23.99#ibcon#read 3, iclass 19, count 2 2006.229.11:40:23.99#ibcon#about to read 4, iclass 19, count 2 2006.229.11:40:23.99#ibcon#read 4, iclass 19, count 2 2006.229.11:40:23.99#ibcon#about to read 5, iclass 19, count 2 2006.229.11:40:23.99#ibcon#read 5, iclass 19, count 2 2006.229.11:40:23.99#ibcon#about to read 6, iclass 19, count 2 2006.229.11:40:23.99#ibcon#read 6, iclass 19, count 2 2006.229.11:40:23.99#ibcon#end of sib2, iclass 19, count 2 2006.229.11:40:23.99#ibcon#*mode == 0, iclass 19, count 2 2006.229.11:40:23.99#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.11:40:23.99#ibcon#[25=AT06-04\r\n] 2006.229.11:40:23.99#ibcon#*before write, iclass 19, count 2 2006.229.11:40:23.99#ibcon#enter sib2, iclass 19, count 2 2006.229.11:40:23.99#ibcon#flushed, iclass 19, count 2 2006.229.11:40:23.99#ibcon#about to write, iclass 19, count 2 2006.229.11:40:23.99#ibcon#wrote, iclass 19, count 2 2006.229.11:40:23.99#ibcon#about to read 3, iclass 19, count 2 2006.229.11:40:24.02#ibcon#read 3, iclass 19, count 2 2006.229.11:40:24.02#ibcon#about to read 4, iclass 19, count 2 2006.229.11:40:24.02#ibcon#read 4, iclass 19, count 2 2006.229.11:40:24.02#ibcon#about to read 5, iclass 19, count 2 2006.229.11:40:24.02#ibcon#read 5, iclass 19, count 2 2006.229.11:40:24.02#ibcon#about to read 6, iclass 19, count 2 2006.229.11:40:24.02#ibcon#read 6, iclass 19, count 2 2006.229.11:40:24.02#ibcon#end of sib2, iclass 19, count 2 2006.229.11:40:24.02#ibcon#*after write, iclass 19, count 2 2006.229.11:40:24.02#ibcon#*before return 0, iclass 19, count 2 2006.229.11:40:24.02#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:24.02#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:24.02#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.11:40:24.02#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:24.02#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:24.14#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:24.14#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:24.14#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:40:24.14#ibcon#first serial, iclass 19, count 0 2006.229.11:40:24.14#ibcon#enter sib2, iclass 19, count 0 2006.229.11:40:24.14#ibcon#flushed, iclass 19, count 0 2006.229.11:40:24.14#ibcon#about to write, iclass 19, count 0 2006.229.11:40:24.14#ibcon#wrote, iclass 19, count 0 2006.229.11:40:24.14#ibcon#about to read 3, iclass 19, count 0 2006.229.11:40:24.16#ibcon#read 3, iclass 19, count 0 2006.229.11:40:24.16#ibcon#about to read 4, iclass 19, count 0 2006.229.11:40:24.16#ibcon#read 4, iclass 19, count 0 2006.229.11:40:24.16#ibcon#about to read 5, iclass 19, count 0 2006.229.11:40:24.16#ibcon#read 5, iclass 19, count 0 2006.229.11:40:24.16#ibcon#about to read 6, iclass 19, count 0 2006.229.11:40:24.16#ibcon#read 6, iclass 19, count 0 2006.229.11:40:24.16#ibcon#end of sib2, iclass 19, count 0 2006.229.11:40:24.16#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:40:24.16#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:40:24.16#ibcon#[25=USB\r\n] 2006.229.11:40:24.16#ibcon#*before write, iclass 19, count 0 2006.229.11:40:24.16#ibcon#enter sib2, iclass 19, count 0 2006.229.11:40:24.16#ibcon#flushed, iclass 19, count 0 2006.229.11:40:24.16#ibcon#about to write, iclass 19, count 0 2006.229.11:40:24.16#ibcon#wrote, iclass 19, count 0 2006.229.11:40:24.16#ibcon#about to read 3, iclass 19, count 0 2006.229.11:40:24.19#ibcon#read 3, iclass 19, count 0 2006.229.11:40:24.19#ibcon#about to read 4, iclass 19, count 0 2006.229.11:40:24.19#ibcon#read 4, iclass 19, count 0 2006.229.11:40:24.19#ibcon#about to read 5, iclass 19, count 0 2006.229.11:40:24.19#ibcon#read 5, iclass 19, count 0 2006.229.11:40:24.19#ibcon#about to read 6, iclass 19, count 0 2006.229.11:40:24.19#ibcon#read 6, iclass 19, count 0 2006.229.11:40:24.19#ibcon#end of sib2, iclass 19, count 0 2006.229.11:40:24.19#ibcon#*after write, iclass 19, count 0 2006.229.11:40:24.19#ibcon#*before return 0, iclass 19, count 0 2006.229.11:40:24.19#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:24.19#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:24.19#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:40:24.19#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:40:24.19$vck44/valo=7,864.99 2006.229.11:40:24.19#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.11:40:24.19#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.11:40:24.19#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:24.19#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:24.19#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:24.19#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:24.19#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:40:24.19#ibcon#first serial, iclass 21, count 0 2006.229.11:40:24.19#ibcon#enter sib2, iclass 21, count 0 2006.229.11:40:24.19#ibcon#flushed, iclass 21, count 0 2006.229.11:40:24.19#ibcon#about to write, iclass 21, count 0 2006.229.11:40:24.19#ibcon#wrote, iclass 21, count 0 2006.229.11:40:24.19#ibcon#about to read 3, iclass 21, count 0 2006.229.11:40:24.21#ibcon#read 3, iclass 21, count 0 2006.229.11:40:24.21#ibcon#about to read 4, iclass 21, count 0 2006.229.11:40:24.21#ibcon#read 4, iclass 21, count 0 2006.229.11:40:24.21#ibcon#about to read 5, iclass 21, count 0 2006.229.11:40:24.21#ibcon#read 5, iclass 21, count 0 2006.229.11:40:24.21#ibcon#about to read 6, iclass 21, count 0 2006.229.11:40:24.21#ibcon#read 6, iclass 21, count 0 2006.229.11:40:24.21#ibcon#end of sib2, iclass 21, count 0 2006.229.11:40:24.21#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:40:24.21#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:40:24.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:40:24.21#ibcon#*before write, iclass 21, count 0 2006.229.11:40:24.21#ibcon#enter sib2, iclass 21, count 0 2006.229.11:40:24.21#ibcon#flushed, iclass 21, count 0 2006.229.11:40:24.21#ibcon#about to write, iclass 21, count 0 2006.229.11:40:24.21#ibcon#wrote, iclass 21, count 0 2006.229.11:40:24.21#ibcon#about to read 3, iclass 21, count 0 2006.229.11:40:24.25#ibcon#read 3, iclass 21, count 0 2006.229.11:40:24.25#ibcon#about to read 4, iclass 21, count 0 2006.229.11:40:24.25#ibcon#read 4, iclass 21, count 0 2006.229.11:40:24.25#ibcon#about to read 5, iclass 21, count 0 2006.229.11:40:24.25#ibcon#read 5, iclass 21, count 0 2006.229.11:40:24.25#ibcon#about to read 6, iclass 21, count 0 2006.229.11:40:24.25#ibcon#read 6, iclass 21, count 0 2006.229.11:40:24.25#ibcon#end of sib2, iclass 21, count 0 2006.229.11:40:24.25#ibcon#*after write, iclass 21, count 0 2006.229.11:40:24.25#ibcon#*before return 0, iclass 21, count 0 2006.229.11:40:24.25#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:24.25#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:24.25#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:40:24.25#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:40:24.25$vck44/va=7,5 2006.229.11:40:24.25#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.11:40:24.25#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.11:40:24.25#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:24.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:24.31#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:24.31#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:24.31#ibcon#enter wrdev, iclass 23, count 2 2006.229.11:40:24.31#ibcon#first serial, iclass 23, count 2 2006.229.11:40:24.31#ibcon#enter sib2, iclass 23, count 2 2006.229.11:40:24.31#ibcon#flushed, iclass 23, count 2 2006.229.11:40:24.31#ibcon#about to write, iclass 23, count 2 2006.229.11:40:24.31#ibcon#wrote, iclass 23, count 2 2006.229.11:40:24.31#ibcon#about to read 3, iclass 23, count 2 2006.229.11:40:24.33#ibcon#read 3, iclass 23, count 2 2006.229.11:40:24.33#ibcon#about to read 4, iclass 23, count 2 2006.229.11:40:24.33#ibcon#read 4, iclass 23, count 2 2006.229.11:40:24.33#ibcon#about to read 5, iclass 23, count 2 2006.229.11:40:24.33#ibcon#read 5, iclass 23, count 2 2006.229.11:40:24.33#ibcon#about to read 6, iclass 23, count 2 2006.229.11:40:24.33#ibcon#read 6, iclass 23, count 2 2006.229.11:40:24.33#ibcon#end of sib2, iclass 23, count 2 2006.229.11:40:24.33#ibcon#*mode == 0, iclass 23, count 2 2006.229.11:40:24.33#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.11:40:24.33#ibcon#[25=AT07-05\r\n] 2006.229.11:40:24.33#ibcon#*before write, iclass 23, count 2 2006.229.11:40:24.33#ibcon#enter sib2, iclass 23, count 2 2006.229.11:40:24.33#ibcon#flushed, iclass 23, count 2 2006.229.11:40:24.33#ibcon#about to write, iclass 23, count 2 2006.229.11:40:24.33#ibcon#wrote, iclass 23, count 2 2006.229.11:40:24.33#ibcon#about to read 3, iclass 23, count 2 2006.229.11:40:24.36#ibcon#read 3, iclass 23, count 2 2006.229.11:40:24.36#ibcon#about to read 4, iclass 23, count 2 2006.229.11:40:24.36#ibcon#read 4, iclass 23, count 2 2006.229.11:40:24.36#ibcon#about to read 5, iclass 23, count 2 2006.229.11:40:24.36#ibcon#read 5, iclass 23, count 2 2006.229.11:40:24.36#ibcon#about to read 6, iclass 23, count 2 2006.229.11:40:24.36#ibcon#read 6, iclass 23, count 2 2006.229.11:40:24.36#ibcon#end of sib2, iclass 23, count 2 2006.229.11:40:24.36#ibcon#*after write, iclass 23, count 2 2006.229.11:40:24.36#ibcon#*before return 0, iclass 23, count 2 2006.229.11:40:24.36#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:24.36#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:24.36#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.11:40:24.36#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:24.36#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:24.48#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:24.48#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:24.48#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:40:24.48#ibcon#first serial, iclass 23, count 0 2006.229.11:40:24.48#ibcon#enter sib2, iclass 23, count 0 2006.229.11:40:24.48#ibcon#flushed, iclass 23, count 0 2006.229.11:40:24.48#ibcon#about to write, iclass 23, count 0 2006.229.11:40:24.48#ibcon#wrote, iclass 23, count 0 2006.229.11:40:24.48#ibcon#about to read 3, iclass 23, count 0 2006.229.11:40:24.50#ibcon#read 3, iclass 23, count 0 2006.229.11:40:24.50#ibcon#about to read 4, iclass 23, count 0 2006.229.11:40:24.50#ibcon#read 4, iclass 23, count 0 2006.229.11:40:24.50#ibcon#about to read 5, iclass 23, count 0 2006.229.11:40:24.50#ibcon#read 5, iclass 23, count 0 2006.229.11:40:24.50#ibcon#about to read 6, iclass 23, count 0 2006.229.11:40:24.50#ibcon#read 6, iclass 23, count 0 2006.229.11:40:24.50#ibcon#end of sib2, iclass 23, count 0 2006.229.11:40:24.50#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:40:24.50#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:40:24.50#ibcon#[25=USB\r\n] 2006.229.11:40:24.50#ibcon#*before write, iclass 23, count 0 2006.229.11:40:24.50#ibcon#enter sib2, iclass 23, count 0 2006.229.11:40:24.50#ibcon#flushed, iclass 23, count 0 2006.229.11:40:24.50#ibcon#about to write, iclass 23, count 0 2006.229.11:40:24.50#ibcon#wrote, iclass 23, count 0 2006.229.11:40:24.50#ibcon#about to read 3, iclass 23, count 0 2006.229.11:40:24.53#ibcon#read 3, iclass 23, count 0 2006.229.11:40:24.53#ibcon#about to read 4, iclass 23, count 0 2006.229.11:40:24.53#ibcon#read 4, iclass 23, count 0 2006.229.11:40:24.53#ibcon#about to read 5, iclass 23, count 0 2006.229.11:40:24.53#ibcon#read 5, iclass 23, count 0 2006.229.11:40:24.53#ibcon#about to read 6, iclass 23, count 0 2006.229.11:40:24.53#ibcon#read 6, iclass 23, count 0 2006.229.11:40:24.53#ibcon#end of sib2, iclass 23, count 0 2006.229.11:40:24.53#ibcon#*after write, iclass 23, count 0 2006.229.11:40:24.53#ibcon#*before return 0, iclass 23, count 0 2006.229.11:40:24.53#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:24.53#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:24.53#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:40:24.53#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:40:24.53$vck44/valo=8,884.99 2006.229.11:40:24.53#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.11:40:24.53#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.11:40:24.53#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:24.53#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:24.53#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:24.53#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:24.53#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:40:24.53#ibcon#first serial, iclass 25, count 0 2006.229.11:40:24.53#ibcon#enter sib2, iclass 25, count 0 2006.229.11:40:24.53#ibcon#flushed, iclass 25, count 0 2006.229.11:40:24.53#ibcon#about to write, iclass 25, count 0 2006.229.11:40:24.53#ibcon#wrote, iclass 25, count 0 2006.229.11:40:24.53#ibcon#about to read 3, iclass 25, count 0 2006.229.11:40:24.55#ibcon#read 3, iclass 25, count 0 2006.229.11:40:24.55#ibcon#about to read 4, iclass 25, count 0 2006.229.11:40:24.55#ibcon#read 4, iclass 25, count 0 2006.229.11:40:24.55#ibcon#about to read 5, iclass 25, count 0 2006.229.11:40:24.55#ibcon#read 5, iclass 25, count 0 2006.229.11:40:24.55#ibcon#about to read 6, iclass 25, count 0 2006.229.11:40:24.55#ibcon#read 6, iclass 25, count 0 2006.229.11:40:24.55#ibcon#end of sib2, iclass 25, count 0 2006.229.11:40:24.55#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:40:24.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:40:24.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:40:24.55#ibcon#*before write, iclass 25, count 0 2006.229.11:40:24.55#ibcon#enter sib2, iclass 25, count 0 2006.229.11:40:24.55#ibcon#flushed, iclass 25, count 0 2006.229.11:40:24.55#ibcon#about to write, iclass 25, count 0 2006.229.11:40:24.55#ibcon#wrote, iclass 25, count 0 2006.229.11:40:24.55#ibcon#about to read 3, iclass 25, count 0 2006.229.11:40:24.59#ibcon#read 3, iclass 25, count 0 2006.229.11:40:24.59#ibcon#about to read 4, iclass 25, count 0 2006.229.11:40:24.59#ibcon#read 4, iclass 25, count 0 2006.229.11:40:24.59#ibcon#about to read 5, iclass 25, count 0 2006.229.11:40:24.59#ibcon#read 5, iclass 25, count 0 2006.229.11:40:24.59#ibcon#about to read 6, iclass 25, count 0 2006.229.11:40:24.59#ibcon#read 6, iclass 25, count 0 2006.229.11:40:24.59#ibcon#end of sib2, iclass 25, count 0 2006.229.11:40:24.59#ibcon#*after write, iclass 25, count 0 2006.229.11:40:24.59#ibcon#*before return 0, iclass 25, count 0 2006.229.11:40:24.59#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:24.59#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:24.59#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:40:24.59#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:40:24.59$vck44/va=8,6 2006.229.11:40:24.59#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.11:40:24.59#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.11:40:24.59#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:24.59#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:40:24.65#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:40:24.65#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:40:24.65#ibcon#enter wrdev, iclass 27, count 2 2006.229.11:40:24.65#ibcon#first serial, iclass 27, count 2 2006.229.11:40:24.65#ibcon#enter sib2, iclass 27, count 2 2006.229.11:40:24.65#ibcon#flushed, iclass 27, count 2 2006.229.11:40:24.65#ibcon#about to write, iclass 27, count 2 2006.229.11:40:24.65#ibcon#wrote, iclass 27, count 2 2006.229.11:40:24.65#ibcon#about to read 3, iclass 27, count 2 2006.229.11:40:24.67#ibcon#read 3, iclass 27, count 2 2006.229.11:40:24.67#ibcon#about to read 4, iclass 27, count 2 2006.229.11:40:24.67#ibcon#read 4, iclass 27, count 2 2006.229.11:40:24.67#ibcon#about to read 5, iclass 27, count 2 2006.229.11:40:24.67#ibcon#read 5, iclass 27, count 2 2006.229.11:40:24.67#ibcon#about to read 6, iclass 27, count 2 2006.229.11:40:24.67#ibcon#read 6, iclass 27, count 2 2006.229.11:40:24.67#ibcon#end of sib2, iclass 27, count 2 2006.229.11:40:24.67#ibcon#*mode == 0, iclass 27, count 2 2006.229.11:40:24.67#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.11:40:24.67#ibcon#[25=AT08-06\r\n] 2006.229.11:40:24.67#ibcon#*before write, iclass 27, count 2 2006.229.11:40:24.67#ibcon#enter sib2, iclass 27, count 2 2006.229.11:40:24.67#ibcon#flushed, iclass 27, count 2 2006.229.11:40:24.67#ibcon#about to write, iclass 27, count 2 2006.229.11:40:24.67#ibcon#wrote, iclass 27, count 2 2006.229.11:40:24.67#ibcon#about to read 3, iclass 27, count 2 2006.229.11:40:24.70#ibcon#read 3, iclass 27, count 2 2006.229.11:40:24.70#ibcon#about to read 4, iclass 27, count 2 2006.229.11:40:24.70#ibcon#read 4, iclass 27, count 2 2006.229.11:40:24.70#ibcon#about to read 5, iclass 27, count 2 2006.229.11:40:24.70#ibcon#read 5, iclass 27, count 2 2006.229.11:40:24.70#ibcon#about to read 6, iclass 27, count 2 2006.229.11:40:24.70#ibcon#read 6, iclass 27, count 2 2006.229.11:40:24.70#ibcon#end of sib2, iclass 27, count 2 2006.229.11:40:24.70#ibcon#*after write, iclass 27, count 2 2006.229.11:40:24.70#ibcon#*before return 0, iclass 27, count 2 2006.229.11:40:24.70#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:40:24.70#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:40:24.70#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.11:40:24.70#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:24.70#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:40:24.82#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:40:24.82#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:40:24.82#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:40:24.82#ibcon#first serial, iclass 27, count 0 2006.229.11:40:24.82#ibcon#enter sib2, iclass 27, count 0 2006.229.11:40:24.82#ibcon#flushed, iclass 27, count 0 2006.229.11:40:24.82#ibcon#about to write, iclass 27, count 0 2006.229.11:40:24.82#ibcon#wrote, iclass 27, count 0 2006.229.11:40:24.82#ibcon#about to read 3, iclass 27, count 0 2006.229.11:40:24.84#ibcon#read 3, iclass 27, count 0 2006.229.11:40:24.84#ibcon#about to read 4, iclass 27, count 0 2006.229.11:40:24.84#ibcon#read 4, iclass 27, count 0 2006.229.11:40:24.84#ibcon#about to read 5, iclass 27, count 0 2006.229.11:40:24.84#ibcon#read 5, iclass 27, count 0 2006.229.11:40:24.84#ibcon#about to read 6, iclass 27, count 0 2006.229.11:40:24.84#ibcon#read 6, iclass 27, count 0 2006.229.11:40:24.84#ibcon#end of sib2, iclass 27, count 0 2006.229.11:40:24.84#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:40:24.84#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:40:24.84#ibcon#[25=USB\r\n] 2006.229.11:40:24.84#ibcon#*before write, iclass 27, count 0 2006.229.11:40:24.84#ibcon#enter sib2, iclass 27, count 0 2006.229.11:40:24.84#ibcon#flushed, iclass 27, count 0 2006.229.11:40:24.84#ibcon#about to write, iclass 27, count 0 2006.229.11:40:24.84#ibcon#wrote, iclass 27, count 0 2006.229.11:40:24.84#ibcon#about to read 3, iclass 27, count 0 2006.229.11:40:24.87#ibcon#read 3, iclass 27, count 0 2006.229.11:40:24.87#ibcon#about to read 4, iclass 27, count 0 2006.229.11:40:24.87#ibcon#read 4, iclass 27, count 0 2006.229.11:40:24.87#ibcon#about to read 5, iclass 27, count 0 2006.229.11:40:24.87#ibcon#read 5, iclass 27, count 0 2006.229.11:40:24.87#ibcon#about to read 6, iclass 27, count 0 2006.229.11:40:24.87#ibcon#read 6, iclass 27, count 0 2006.229.11:40:24.87#ibcon#end of sib2, iclass 27, count 0 2006.229.11:40:24.87#ibcon#*after write, iclass 27, count 0 2006.229.11:40:24.87#ibcon#*before return 0, iclass 27, count 0 2006.229.11:40:24.87#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:40:24.87#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:40:24.87#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:40:24.87#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:40:24.87$vck44/vblo=1,629.99 2006.229.11:40:24.87#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.11:40:24.87#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.11:40:24.87#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:24.87#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:40:24.87#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:40:24.87#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:40:24.87#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:40:24.87#ibcon#first serial, iclass 29, count 0 2006.229.11:40:24.87#ibcon#enter sib2, iclass 29, count 0 2006.229.11:40:24.87#ibcon#flushed, iclass 29, count 0 2006.229.11:40:24.87#ibcon#about to write, iclass 29, count 0 2006.229.11:40:24.87#ibcon#wrote, iclass 29, count 0 2006.229.11:40:24.87#ibcon#about to read 3, iclass 29, count 0 2006.229.11:40:24.89#ibcon#read 3, iclass 29, count 0 2006.229.11:40:24.89#ibcon#about to read 4, iclass 29, count 0 2006.229.11:40:24.89#ibcon#read 4, iclass 29, count 0 2006.229.11:40:24.89#ibcon#about to read 5, iclass 29, count 0 2006.229.11:40:24.89#ibcon#read 5, iclass 29, count 0 2006.229.11:40:24.89#ibcon#about to read 6, iclass 29, count 0 2006.229.11:40:24.89#ibcon#read 6, iclass 29, count 0 2006.229.11:40:24.89#ibcon#end of sib2, iclass 29, count 0 2006.229.11:40:24.89#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:40:24.89#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:40:24.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:40:24.89#ibcon#*before write, iclass 29, count 0 2006.229.11:40:24.89#ibcon#enter sib2, iclass 29, count 0 2006.229.11:40:24.89#ibcon#flushed, iclass 29, count 0 2006.229.11:40:24.89#ibcon#about to write, iclass 29, count 0 2006.229.11:40:24.89#ibcon#wrote, iclass 29, count 0 2006.229.11:40:24.89#ibcon#about to read 3, iclass 29, count 0 2006.229.11:40:24.93#ibcon#read 3, iclass 29, count 0 2006.229.11:40:24.93#ibcon#about to read 4, iclass 29, count 0 2006.229.11:40:24.93#ibcon#read 4, iclass 29, count 0 2006.229.11:40:24.93#ibcon#about to read 5, iclass 29, count 0 2006.229.11:40:24.93#ibcon#read 5, iclass 29, count 0 2006.229.11:40:24.93#ibcon#about to read 6, iclass 29, count 0 2006.229.11:40:24.93#ibcon#read 6, iclass 29, count 0 2006.229.11:40:24.93#ibcon#end of sib2, iclass 29, count 0 2006.229.11:40:24.93#ibcon#*after write, iclass 29, count 0 2006.229.11:40:24.93#ibcon#*before return 0, iclass 29, count 0 2006.229.11:40:24.93#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:40:24.93#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:40:24.93#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:40:24.93#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:40:24.93$vck44/vb=1,4 2006.229.11:40:24.93#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.11:40:24.93#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.11:40:24.93#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:24.93#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:40:24.93#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:40:24.93#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:40:24.93#ibcon#enter wrdev, iclass 31, count 2 2006.229.11:40:24.93#ibcon#first serial, iclass 31, count 2 2006.229.11:40:24.93#ibcon#enter sib2, iclass 31, count 2 2006.229.11:40:24.93#ibcon#flushed, iclass 31, count 2 2006.229.11:40:24.93#ibcon#about to write, iclass 31, count 2 2006.229.11:40:24.93#ibcon#wrote, iclass 31, count 2 2006.229.11:40:24.93#ibcon#about to read 3, iclass 31, count 2 2006.229.11:40:24.95#ibcon#read 3, iclass 31, count 2 2006.229.11:40:24.95#ibcon#about to read 4, iclass 31, count 2 2006.229.11:40:24.95#ibcon#read 4, iclass 31, count 2 2006.229.11:40:24.95#ibcon#about to read 5, iclass 31, count 2 2006.229.11:40:24.95#ibcon#read 5, iclass 31, count 2 2006.229.11:40:24.95#ibcon#about to read 6, iclass 31, count 2 2006.229.11:40:24.95#ibcon#read 6, iclass 31, count 2 2006.229.11:40:24.95#ibcon#end of sib2, iclass 31, count 2 2006.229.11:40:24.95#ibcon#*mode == 0, iclass 31, count 2 2006.229.11:40:24.95#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.11:40:24.95#ibcon#[27=AT01-04\r\n] 2006.229.11:40:24.95#ibcon#*before write, iclass 31, count 2 2006.229.11:40:24.95#ibcon#enter sib2, iclass 31, count 2 2006.229.11:40:24.95#ibcon#flushed, iclass 31, count 2 2006.229.11:40:24.95#ibcon#about to write, iclass 31, count 2 2006.229.11:40:24.95#ibcon#wrote, iclass 31, count 2 2006.229.11:40:24.95#ibcon#about to read 3, iclass 31, count 2 2006.229.11:40:24.98#ibcon#read 3, iclass 31, count 2 2006.229.11:40:24.98#ibcon#about to read 4, iclass 31, count 2 2006.229.11:40:24.98#ibcon#read 4, iclass 31, count 2 2006.229.11:40:24.98#ibcon#about to read 5, iclass 31, count 2 2006.229.11:40:24.98#ibcon#read 5, iclass 31, count 2 2006.229.11:40:24.98#ibcon#about to read 6, iclass 31, count 2 2006.229.11:40:24.98#ibcon#read 6, iclass 31, count 2 2006.229.11:40:24.98#ibcon#end of sib2, iclass 31, count 2 2006.229.11:40:24.98#ibcon#*after write, iclass 31, count 2 2006.229.11:40:24.98#ibcon#*before return 0, iclass 31, count 2 2006.229.11:40:24.98#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:40:24.98#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:40:24.98#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.11:40:24.98#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:24.98#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:40:25.10#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:40:25.10#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:40:25.10#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:40:25.10#ibcon#first serial, iclass 31, count 0 2006.229.11:40:25.10#ibcon#enter sib2, iclass 31, count 0 2006.229.11:40:25.10#ibcon#flushed, iclass 31, count 0 2006.229.11:40:25.10#ibcon#about to write, iclass 31, count 0 2006.229.11:40:25.10#ibcon#wrote, iclass 31, count 0 2006.229.11:40:25.10#ibcon#about to read 3, iclass 31, count 0 2006.229.11:40:25.12#ibcon#read 3, iclass 31, count 0 2006.229.11:40:25.12#ibcon#about to read 4, iclass 31, count 0 2006.229.11:40:25.12#ibcon#read 4, iclass 31, count 0 2006.229.11:40:25.12#ibcon#about to read 5, iclass 31, count 0 2006.229.11:40:25.12#ibcon#read 5, iclass 31, count 0 2006.229.11:40:25.12#ibcon#about to read 6, iclass 31, count 0 2006.229.11:40:25.12#ibcon#read 6, iclass 31, count 0 2006.229.11:40:25.12#ibcon#end of sib2, iclass 31, count 0 2006.229.11:40:25.12#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:40:25.12#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:40:25.12#ibcon#[27=USB\r\n] 2006.229.11:40:25.12#ibcon#*before write, iclass 31, count 0 2006.229.11:40:25.12#ibcon#enter sib2, iclass 31, count 0 2006.229.11:40:25.12#ibcon#flushed, iclass 31, count 0 2006.229.11:40:25.12#ibcon#about to write, iclass 31, count 0 2006.229.11:40:25.12#ibcon#wrote, iclass 31, count 0 2006.229.11:40:25.12#ibcon#about to read 3, iclass 31, count 0 2006.229.11:40:25.15#ibcon#read 3, iclass 31, count 0 2006.229.11:40:25.15#ibcon#about to read 4, iclass 31, count 0 2006.229.11:40:25.15#ibcon#read 4, iclass 31, count 0 2006.229.11:40:25.15#ibcon#about to read 5, iclass 31, count 0 2006.229.11:40:25.15#ibcon#read 5, iclass 31, count 0 2006.229.11:40:25.15#ibcon#about to read 6, iclass 31, count 0 2006.229.11:40:25.15#ibcon#read 6, iclass 31, count 0 2006.229.11:40:25.15#ibcon#end of sib2, iclass 31, count 0 2006.229.11:40:25.15#ibcon#*after write, iclass 31, count 0 2006.229.11:40:25.15#ibcon#*before return 0, iclass 31, count 0 2006.229.11:40:25.15#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:40:25.15#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:40:25.15#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:40:25.15#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:40:25.15$vck44/vblo=2,634.99 2006.229.11:40:25.15#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.11:40:25.15#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.11:40:25.15#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:25.15#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:25.15#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:25.15#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:25.15#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:40:25.15#ibcon#first serial, iclass 33, count 0 2006.229.11:40:25.15#ibcon#enter sib2, iclass 33, count 0 2006.229.11:40:25.15#ibcon#flushed, iclass 33, count 0 2006.229.11:40:25.15#ibcon#about to write, iclass 33, count 0 2006.229.11:40:25.15#ibcon#wrote, iclass 33, count 0 2006.229.11:40:25.15#ibcon#about to read 3, iclass 33, count 0 2006.229.11:40:25.17#ibcon#read 3, iclass 33, count 0 2006.229.11:40:25.17#ibcon#about to read 4, iclass 33, count 0 2006.229.11:40:25.17#ibcon#read 4, iclass 33, count 0 2006.229.11:40:25.17#ibcon#about to read 5, iclass 33, count 0 2006.229.11:40:25.17#ibcon#read 5, iclass 33, count 0 2006.229.11:40:25.17#ibcon#about to read 6, iclass 33, count 0 2006.229.11:40:25.17#ibcon#read 6, iclass 33, count 0 2006.229.11:40:25.17#ibcon#end of sib2, iclass 33, count 0 2006.229.11:40:25.17#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:40:25.17#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:40:25.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:40:25.17#ibcon#*before write, iclass 33, count 0 2006.229.11:40:25.17#ibcon#enter sib2, iclass 33, count 0 2006.229.11:40:25.17#ibcon#flushed, iclass 33, count 0 2006.229.11:40:25.17#ibcon#about to write, iclass 33, count 0 2006.229.11:40:25.17#ibcon#wrote, iclass 33, count 0 2006.229.11:40:25.17#ibcon#about to read 3, iclass 33, count 0 2006.229.11:40:25.21#ibcon#read 3, iclass 33, count 0 2006.229.11:40:25.21#ibcon#about to read 4, iclass 33, count 0 2006.229.11:40:25.21#ibcon#read 4, iclass 33, count 0 2006.229.11:40:25.21#ibcon#about to read 5, iclass 33, count 0 2006.229.11:40:25.21#ibcon#read 5, iclass 33, count 0 2006.229.11:40:25.21#ibcon#about to read 6, iclass 33, count 0 2006.229.11:40:25.21#ibcon#read 6, iclass 33, count 0 2006.229.11:40:25.21#ibcon#end of sib2, iclass 33, count 0 2006.229.11:40:25.21#ibcon#*after write, iclass 33, count 0 2006.229.11:40:25.21#ibcon#*before return 0, iclass 33, count 0 2006.229.11:40:25.21#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:25.21#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:40:25.21#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:40:25.21#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:40:25.21$vck44/vb=2,4 2006.229.11:40:25.21#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.11:40:25.21#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.11:40:25.21#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:25.21#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:25.27#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:25.27#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:25.27#ibcon#enter wrdev, iclass 35, count 2 2006.229.11:40:25.27#ibcon#first serial, iclass 35, count 2 2006.229.11:40:25.27#ibcon#enter sib2, iclass 35, count 2 2006.229.11:40:25.27#ibcon#flushed, iclass 35, count 2 2006.229.11:40:25.27#ibcon#about to write, iclass 35, count 2 2006.229.11:40:25.27#ibcon#wrote, iclass 35, count 2 2006.229.11:40:25.27#ibcon#about to read 3, iclass 35, count 2 2006.229.11:40:25.29#ibcon#read 3, iclass 35, count 2 2006.229.11:40:25.29#ibcon#about to read 4, iclass 35, count 2 2006.229.11:40:25.29#ibcon#read 4, iclass 35, count 2 2006.229.11:40:25.29#ibcon#about to read 5, iclass 35, count 2 2006.229.11:40:25.29#ibcon#read 5, iclass 35, count 2 2006.229.11:40:25.29#ibcon#about to read 6, iclass 35, count 2 2006.229.11:40:25.29#ibcon#read 6, iclass 35, count 2 2006.229.11:40:25.29#ibcon#end of sib2, iclass 35, count 2 2006.229.11:40:25.29#ibcon#*mode == 0, iclass 35, count 2 2006.229.11:40:25.29#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.11:40:25.29#ibcon#[27=AT02-04\r\n] 2006.229.11:40:25.29#ibcon#*before write, iclass 35, count 2 2006.229.11:40:25.29#ibcon#enter sib2, iclass 35, count 2 2006.229.11:40:25.29#ibcon#flushed, iclass 35, count 2 2006.229.11:40:25.29#ibcon#about to write, iclass 35, count 2 2006.229.11:40:25.29#ibcon#wrote, iclass 35, count 2 2006.229.11:40:25.29#ibcon#about to read 3, iclass 35, count 2 2006.229.11:40:25.32#ibcon#read 3, iclass 35, count 2 2006.229.11:40:25.32#ibcon#about to read 4, iclass 35, count 2 2006.229.11:40:25.32#ibcon#read 4, iclass 35, count 2 2006.229.11:40:25.32#ibcon#about to read 5, iclass 35, count 2 2006.229.11:40:25.32#ibcon#read 5, iclass 35, count 2 2006.229.11:40:25.32#ibcon#about to read 6, iclass 35, count 2 2006.229.11:40:25.32#ibcon#read 6, iclass 35, count 2 2006.229.11:40:25.32#ibcon#end of sib2, iclass 35, count 2 2006.229.11:40:25.32#ibcon#*after write, iclass 35, count 2 2006.229.11:40:25.32#ibcon#*before return 0, iclass 35, count 2 2006.229.11:40:25.32#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:25.32#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:40:25.32#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.11:40:25.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:25.32#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:25.44#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:25.44#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:25.44#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:40:25.44#ibcon#first serial, iclass 35, count 0 2006.229.11:40:25.44#ibcon#enter sib2, iclass 35, count 0 2006.229.11:40:25.44#ibcon#flushed, iclass 35, count 0 2006.229.11:40:25.44#ibcon#about to write, iclass 35, count 0 2006.229.11:40:25.44#ibcon#wrote, iclass 35, count 0 2006.229.11:40:25.44#ibcon#about to read 3, iclass 35, count 0 2006.229.11:40:25.46#ibcon#read 3, iclass 35, count 0 2006.229.11:40:25.46#ibcon#about to read 4, iclass 35, count 0 2006.229.11:40:25.46#ibcon#read 4, iclass 35, count 0 2006.229.11:40:25.46#ibcon#about to read 5, iclass 35, count 0 2006.229.11:40:25.46#ibcon#read 5, iclass 35, count 0 2006.229.11:40:25.46#ibcon#about to read 6, iclass 35, count 0 2006.229.11:40:25.46#ibcon#read 6, iclass 35, count 0 2006.229.11:40:25.46#ibcon#end of sib2, iclass 35, count 0 2006.229.11:40:25.46#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:40:25.46#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:40:25.46#ibcon#[27=USB\r\n] 2006.229.11:40:25.46#ibcon#*before write, iclass 35, count 0 2006.229.11:40:25.46#ibcon#enter sib2, iclass 35, count 0 2006.229.11:40:25.46#ibcon#flushed, iclass 35, count 0 2006.229.11:40:25.46#ibcon#about to write, iclass 35, count 0 2006.229.11:40:25.46#ibcon#wrote, iclass 35, count 0 2006.229.11:40:25.46#ibcon#about to read 3, iclass 35, count 0 2006.229.11:40:25.49#ibcon#read 3, iclass 35, count 0 2006.229.11:40:25.49#ibcon#about to read 4, iclass 35, count 0 2006.229.11:40:25.49#ibcon#read 4, iclass 35, count 0 2006.229.11:40:25.49#ibcon#about to read 5, iclass 35, count 0 2006.229.11:40:25.49#ibcon#read 5, iclass 35, count 0 2006.229.11:40:25.49#ibcon#about to read 6, iclass 35, count 0 2006.229.11:40:25.49#ibcon#read 6, iclass 35, count 0 2006.229.11:40:25.49#ibcon#end of sib2, iclass 35, count 0 2006.229.11:40:25.49#ibcon#*after write, iclass 35, count 0 2006.229.11:40:25.49#ibcon#*before return 0, iclass 35, count 0 2006.229.11:40:25.49#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:25.49#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:40:25.49#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:40:25.49#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:40:25.49$vck44/vblo=3,649.99 2006.229.11:40:25.49#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:40:25.49#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:40:25.49#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:25.49#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:25.49#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:25.49#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:25.49#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:40:25.49#ibcon#first serial, iclass 37, count 0 2006.229.11:40:25.49#ibcon#enter sib2, iclass 37, count 0 2006.229.11:40:25.49#ibcon#flushed, iclass 37, count 0 2006.229.11:40:25.49#ibcon#about to write, iclass 37, count 0 2006.229.11:40:25.49#ibcon#wrote, iclass 37, count 0 2006.229.11:40:25.49#ibcon#about to read 3, iclass 37, count 0 2006.229.11:40:25.51#ibcon#read 3, iclass 37, count 0 2006.229.11:40:25.51#ibcon#about to read 4, iclass 37, count 0 2006.229.11:40:25.51#ibcon#read 4, iclass 37, count 0 2006.229.11:40:25.51#ibcon#about to read 5, iclass 37, count 0 2006.229.11:40:25.51#ibcon#read 5, iclass 37, count 0 2006.229.11:40:25.51#ibcon#about to read 6, iclass 37, count 0 2006.229.11:40:25.51#ibcon#read 6, iclass 37, count 0 2006.229.11:40:25.51#ibcon#end of sib2, iclass 37, count 0 2006.229.11:40:25.51#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:40:25.51#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:40:25.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:40:25.51#ibcon#*before write, iclass 37, count 0 2006.229.11:40:25.51#ibcon#enter sib2, iclass 37, count 0 2006.229.11:40:25.51#ibcon#flushed, iclass 37, count 0 2006.229.11:40:25.51#ibcon#about to write, iclass 37, count 0 2006.229.11:40:25.51#ibcon#wrote, iclass 37, count 0 2006.229.11:40:25.51#ibcon#about to read 3, iclass 37, count 0 2006.229.11:40:25.55#ibcon#read 3, iclass 37, count 0 2006.229.11:40:25.55#ibcon#about to read 4, iclass 37, count 0 2006.229.11:40:25.55#ibcon#read 4, iclass 37, count 0 2006.229.11:40:25.55#ibcon#about to read 5, iclass 37, count 0 2006.229.11:40:25.55#ibcon#read 5, iclass 37, count 0 2006.229.11:40:25.55#ibcon#about to read 6, iclass 37, count 0 2006.229.11:40:25.55#ibcon#read 6, iclass 37, count 0 2006.229.11:40:25.55#ibcon#end of sib2, iclass 37, count 0 2006.229.11:40:25.55#ibcon#*after write, iclass 37, count 0 2006.229.11:40:25.55#ibcon#*before return 0, iclass 37, count 0 2006.229.11:40:25.55#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:25.55#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:40:25.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:40:25.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:40:25.55$vck44/vb=3,4 2006.229.11:40:25.55#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.11:40:25.55#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.11:40:25.55#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:25.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:25.61#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:25.61#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:25.61#ibcon#enter wrdev, iclass 39, count 2 2006.229.11:40:25.61#ibcon#first serial, iclass 39, count 2 2006.229.11:40:25.61#ibcon#enter sib2, iclass 39, count 2 2006.229.11:40:25.61#ibcon#flushed, iclass 39, count 2 2006.229.11:40:25.61#ibcon#about to write, iclass 39, count 2 2006.229.11:40:25.61#ibcon#wrote, iclass 39, count 2 2006.229.11:40:25.61#ibcon#about to read 3, iclass 39, count 2 2006.229.11:40:25.63#ibcon#read 3, iclass 39, count 2 2006.229.11:40:25.63#ibcon#about to read 4, iclass 39, count 2 2006.229.11:40:25.63#ibcon#read 4, iclass 39, count 2 2006.229.11:40:25.63#ibcon#about to read 5, iclass 39, count 2 2006.229.11:40:25.63#ibcon#read 5, iclass 39, count 2 2006.229.11:40:25.63#ibcon#about to read 6, iclass 39, count 2 2006.229.11:40:25.63#ibcon#read 6, iclass 39, count 2 2006.229.11:40:25.63#ibcon#end of sib2, iclass 39, count 2 2006.229.11:40:25.63#ibcon#*mode == 0, iclass 39, count 2 2006.229.11:40:25.63#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.11:40:25.63#ibcon#[27=AT03-04\r\n] 2006.229.11:40:25.63#ibcon#*before write, iclass 39, count 2 2006.229.11:40:25.63#ibcon#enter sib2, iclass 39, count 2 2006.229.11:40:25.63#ibcon#flushed, iclass 39, count 2 2006.229.11:40:25.63#ibcon#about to write, iclass 39, count 2 2006.229.11:40:25.63#ibcon#wrote, iclass 39, count 2 2006.229.11:40:25.63#ibcon#about to read 3, iclass 39, count 2 2006.229.11:40:25.66#ibcon#read 3, iclass 39, count 2 2006.229.11:40:25.66#ibcon#about to read 4, iclass 39, count 2 2006.229.11:40:25.66#ibcon#read 4, iclass 39, count 2 2006.229.11:40:25.66#ibcon#about to read 5, iclass 39, count 2 2006.229.11:40:25.66#ibcon#read 5, iclass 39, count 2 2006.229.11:40:25.66#ibcon#about to read 6, iclass 39, count 2 2006.229.11:40:25.66#ibcon#read 6, iclass 39, count 2 2006.229.11:40:25.66#ibcon#end of sib2, iclass 39, count 2 2006.229.11:40:25.66#ibcon#*after write, iclass 39, count 2 2006.229.11:40:25.66#ibcon#*before return 0, iclass 39, count 2 2006.229.11:40:25.66#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:25.66#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:40:25.66#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.11:40:25.66#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:25.66#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:25.78#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:25.78#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:25.78#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:40:25.78#ibcon#first serial, iclass 39, count 0 2006.229.11:40:25.78#ibcon#enter sib2, iclass 39, count 0 2006.229.11:40:25.78#ibcon#flushed, iclass 39, count 0 2006.229.11:40:25.78#ibcon#about to write, iclass 39, count 0 2006.229.11:40:25.78#ibcon#wrote, iclass 39, count 0 2006.229.11:40:25.78#ibcon#about to read 3, iclass 39, count 0 2006.229.11:40:25.80#ibcon#read 3, iclass 39, count 0 2006.229.11:40:25.80#ibcon#about to read 4, iclass 39, count 0 2006.229.11:40:25.80#ibcon#read 4, iclass 39, count 0 2006.229.11:40:25.80#ibcon#about to read 5, iclass 39, count 0 2006.229.11:40:25.80#ibcon#read 5, iclass 39, count 0 2006.229.11:40:25.80#ibcon#about to read 6, iclass 39, count 0 2006.229.11:40:25.80#ibcon#read 6, iclass 39, count 0 2006.229.11:40:25.80#ibcon#end of sib2, iclass 39, count 0 2006.229.11:40:25.80#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:40:25.80#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:40:25.80#ibcon#[27=USB\r\n] 2006.229.11:40:25.80#ibcon#*before write, iclass 39, count 0 2006.229.11:40:25.80#ibcon#enter sib2, iclass 39, count 0 2006.229.11:40:25.80#ibcon#flushed, iclass 39, count 0 2006.229.11:40:25.80#ibcon#about to write, iclass 39, count 0 2006.229.11:40:25.80#ibcon#wrote, iclass 39, count 0 2006.229.11:40:25.80#ibcon#about to read 3, iclass 39, count 0 2006.229.11:40:25.83#ibcon#read 3, iclass 39, count 0 2006.229.11:40:25.83#ibcon#about to read 4, iclass 39, count 0 2006.229.11:40:25.83#ibcon#read 4, iclass 39, count 0 2006.229.11:40:25.83#ibcon#about to read 5, iclass 39, count 0 2006.229.11:40:25.83#ibcon#read 5, iclass 39, count 0 2006.229.11:40:25.83#ibcon#about to read 6, iclass 39, count 0 2006.229.11:40:25.83#ibcon#read 6, iclass 39, count 0 2006.229.11:40:25.83#ibcon#end of sib2, iclass 39, count 0 2006.229.11:40:25.83#ibcon#*after write, iclass 39, count 0 2006.229.11:40:25.83#ibcon#*before return 0, iclass 39, count 0 2006.229.11:40:25.83#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:25.83#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:40:25.83#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:40:25.83#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:40:25.83$vck44/vblo=4,679.99 2006.229.11:40:25.83#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:40:25.83#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:40:25.83#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:25.83#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:25.83#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:25.83#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:25.83#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:40:25.83#ibcon#first serial, iclass 3, count 0 2006.229.11:40:25.83#ibcon#enter sib2, iclass 3, count 0 2006.229.11:40:25.83#ibcon#flushed, iclass 3, count 0 2006.229.11:40:25.83#ibcon#about to write, iclass 3, count 0 2006.229.11:40:25.83#ibcon#wrote, iclass 3, count 0 2006.229.11:40:25.83#ibcon#about to read 3, iclass 3, count 0 2006.229.11:40:25.85#ibcon#read 3, iclass 3, count 0 2006.229.11:40:25.85#ibcon#about to read 4, iclass 3, count 0 2006.229.11:40:25.85#ibcon#read 4, iclass 3, count 0 2006.229.11:40:25.85#ibcon#about to read 5, iclass 3, count 0 2006.229.11:40:25.85#ibcon#read 5, iclass 3, count 0 2006.229.11:40:25.85#ibcon#about to read 6, iclass 3, count 0 2006.229.11:40:25.85#ibcon#read 6, iclass 3, count 0 2006.229.11:40:25.85#ibcon#end of sib2, iclass 3, count 0 2006.229.11:40:25.85#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:40:25.85#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:40:25.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:40:25.85#ibcon#*before write, iclass 3, count 0 2006.229.11:40:25.85#ibcon#enter sib2, iclass 3, count 0 2006.229.11:40:25.85#ibcon#flushed, iclass 3, count 0 2006.229.11:40:25.85#ibcon#about to write, iclass 3, count 0 2006.229.11:40:25.85#ibcon#wrote, iclass 3, count 0 2006.229.11:40:25.85#ibcon#about to read 3, iclass 3, count 0 2006.229.11:40:25.89#ibcon#read 3, iclass 3, count 0 2006.229.11:40:25.89#ibcon#about to read 4, iclass 3, count 0 2006.229.11:40:25.89#ibcon#read 4, iclass 3, count 0 2006.229.11:40:25.89#ibcon#about to read 5, iclass 3, count 0 2006.229.11:40:25.89#ibcon#read 5, iclass 3, count 0 2006.229.11:40:25.89#ibcon#about to read 6, iclass 3, count 0 2006.229.11:40:25.89#ibcon#read 6, iclass 3, count 0 2006.229.11:40:25.89#ibcon#end of sib2, iclass 3, count 0 2006.229.11:40:25.89#ibcon#*after write, iclass 3, count 0 2006.229.11:40:25.89#ibcon#*before return 0, iclass 3, count 0 2006.229.11:40:25.89#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:25.89#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:40:25.89#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:40:25.89#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:40:25.89$vck44/vb=4,4 2006.229.11:40:25.89#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.11:40:25.89#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.11:40:25.89#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:25.89#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:25.95#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:25.95#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:25.95#ibcon#enter wrdev, iclass 5, count 2 2006.229.11:40:25.95#ibcon#first serial, iclass 5, count 2 2006.229.11:40:25.95#ibcon#enter sib2, iclass 5, count 2 2006.229.11:40:25.95#ibcon#flushed, iclass 5, count 2 2006.229.11:40:25.95#ibcon#about to write, iclass 5, count 2 2006.229.11:40:25.95#ibcon#wrote, iclass 5, count 2 2006.229.11:40:25.95#ibcon#about to read 3, iclass 5, count 2 2006.229.11:40:25.97#ibcon#read 3, iclass 5, count 2 2006.229.11:40:25.97#ibcon#about to read 4, iclass 5, count 2 2006.229.11:40:25.97#ibcon#read 4, iclass 5, count 2 2006.229.11:40:25.97#ibcon#about to read 5, iclass 5, count 2 2006.229.11:40:25.97#ibcon#read 5, iclass 5, count 2 2006.229.11:40:25.97#ibcon#about to read 6, iclass 5, count 2 2006.229.11:40:25.97#ibcon#read 6, iclass 5, count 2 2006.229.11:40:25.97#ibcon#end of sib2, iclass 5, count 2 2006.229.11:40:25.97#ibcon#*mode == 0, iclass 5, count 2 2006.229.11:40:25.97#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.11:40:25.97#ibcon#[27=AT04-04\r\n] 2006.229.11:40:25.97#ibcon#*before write, iclass 5, count 2 2006.229.11:40:25.97#ibcon#enter sib2, iclass 5, count 2 2006.229.11:40:25.97#ibcon#flushed, iclass 5, count 2 2006.229.11:40:25.97#ibcon#about to write, iclass 5, count 2 2006.229.11:40:25.97#ibcon#wrote, iclass 5, count 2 2006.229.11:40:25.97#ibcon#about to read 3, iclass 5, count 2 2006.229.11:40:26.00#ibcon#read 3, iclass 5, count 2 2006.229.11:40:26.00#ibcon#about to read 4, iclass 5, count 2 2006.229.11:40:26.00#ibcon#read 4, iclass 5, count 2 2006.229.11:40:26.00#ibcon#about to read 5, iclass 5, count 2 2006.229.11:40:26.00#ibcon#read 5, iclass 5, count 2 2006.229.11:40:26.00#ibcon#about to read 6, iclass 5, count 2 2006.229.11:40:26.00#ibcon#read 6, iclass 5, count 2 2006.229.11:40:26.00#ibcon#end of sib2, iclass 5, count 2 2006.229.11:40:26.00#ibcon#*after write, iclass 5, count 2 2006.229.11:40:26.00#ibcon#*before return 0, iclass 5, count 2 2006.229.11:40:26.00#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:26.00#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:40:26.00#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.11:40:26.00#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:26.00#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:26.12#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:26.12#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:26.12#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:40:26.12#ibcon#first serial, iclass 5, count 0 2006.229.11:40:26.12#ibcon#enter sib2, iclass 5, count 0 2006.229.11:40:26.12#ibcon#flushed, iclass 5, count 0 2006.229.11:40:26.12#ibcon#about to write, iclass 5, count 0 2006.229.11:40:26.12#ibcon#wrote, iclass 5, count 0 2006.229.11:40:26.12#ibcon#about to read 3, iclass 5, count 0 2006.229.11:40:26.14#ibcon#read 3, iclass 5, count 0 2006.229.11:40:26.14#ibcon#about to read 4, iclass 5, count 0 2006.229.11:40:26.14#ibcon#read 4, iclass 5, count 0 2006.229.11:40:26.14#ibcon#about to read 5, iclass 5, count 0 2006.229.11:40:26.14#ibcon#read 5, iclass 5, count 0 2006.229.11:40:26.14#ibcon#about to read 6, iclass 5, count 0 2006.229.11:40:26.14#ibcon#read 6, iclass 5, count 0 2006.229.11:40:26.14#ibcon#end of sib2, iclass 5, count 0 2006.229.11:40:26.14#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:40:26.14#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:40:26.14#ibcon#[27=USB\r\n] 2006.229.11:40:26.14#ibcon#*before write, iclass 5, count 0 2006.229.11:40:26.14#ibcon#enter sib2, iclass 5, count 0 2006.229.11:40:26.14#ibcon#flushed, iclass 5, count 0 2006.229.11:40:26.14#ibcon#about to write, iclass 5, count 0 2006.229.11:40:26.14#ibcon#wrote, iclass 5, count 0 2006.229.11:40:26.14#ibcon#about to read 3, iclass 5, count 0 2006.229.11:40:26.17#ibcon#read 3, iclass 5, count 0 2006.229.11:40:26.17#ibcon#about to read 4, iclass 5, count 0 2006.229.11:40:26.17#ibcon#read 4, iclass 5, count 0 2006.229.11:40:26.17#ibcon#about to read 5, iclass 5, count 0 2006.229.11:40:26.17#ibcon#read 5, iclass 5, count 0 2006.229.11:40:26.17#ibcon#about to read 6, iclass 5, count 0 2006.229.11:40:26.17#ibcon#read 6, iclass 5, count 0 2006.229.11:40:26.17#ibcon#end of sib2, iclass 5, count 0 2006.229.11:40:26.17#ibcon#*after write, iclass 5, count 0 2006.229.11:40:26.17#ibcon#*before return 0, iclass 5, count 0 2006.229.11:40:26.17#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:26.17#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:40:26.17#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:40:26.17#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:40:26.17$vck44/vblo=5,709.99 2006.229.11:40:26.17#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.11:40:26.17#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.11:40:26.17#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:26.17#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:26.17#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:26.17#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:26.17#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:40:26.17#ibcon#first serial, iclass 7, count 0 2006.229.11:40:26.17#ibcon#enter sib2, iclass 7, count 0 2006.229.11:40:26.17#ibcon#flushed, iclass 7, count 0 2006.229.11:40:26.17#ibcon#about to write, iclass 7, count 0 2006.229.11:40:26.17#ibcon#wrote, iclass 7, count 0 2006.229.11:40:26.17#ibcon#about to read 3, iclass 7, count 0 2006.229.11:40:26.19#ibcon#read 3, iclass 7, count 0 2006.229.11:40:26.19#ibcon#about to read 4, iclass 7, count 0 2006.229.11:40:26.19#ibcon#read 4, iclass 7, count 0 2006.229.11:40:26.19#ibcon#about to read 5, iclass 7, count 0 2006.229.11:40:26.19#ibcon#read 5, iclass 7, count 0 2006.229.11:40:26.19#ibcon#about to read 6, iclass 7, count 0 2006.229.11:40:26.19#ibcon#read 6, iclass 7, count 0 2006.229.11:40:26.19#ibcon#end of sib2, iclass 7, count 0 2006.229.11:40:26.19#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:40:26.19#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:40:26.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:40:26.19#ibcon#*before write, iclass 7, count 0 2006.229.11:40:26.19#ibcon#enter sib2, iclass 7, count 0 2006.229.11:40:26.19#ibcon#flushed, iclass 7, count 0 2006.229.11:40:26.19#ibcon#about to write, iclass 7, count 0 2006.229.11:40:26.19#ibcon#wrote, iclass 7, count 0 2006.229.11:40:26.19#ibcon#about to read 3, iclass 7, count 0 2006.229.11:40:26.23#ibcon#read 3, iclass 7, count 0 2006.229.11:40:26.23#ibcon#about to read 4, iclass 7, count 0 2006.229.11:40:26.23#ibcon#read 4, iclass 7, count 0 2006.229.11:40:26.23#ibcon#about to read 5, iclass 7, count 0 2006.229.11:40:26.23#ibcon#read 5, iclass 7, count 0 2006.229.11:40:26.23#ibcon#about to read 6, iclass 7, count 0 2006.229.11:40:26.23#ibcon#read 6, iclass 7, count 0 2006.229.11:40:26.23#ibcon#end of sib2, iclass 7, count 0 2006.229.11:40:26.23#ibcon#*after write, iclass 7, count 0 2006.229.11:40:26.23#ibcon#*before return 0, iclass 7, count 0 2006.229.11:40:26.23#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:26.23#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:40:26.23#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:40:26.23#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:40:26.23$vck44/vb=5,4 2006.229.11:40:26.23#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.11:40:26.23#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.11:40:26.23#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:26.23#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:26.29#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:26.29#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:26.29#ibcon#enter wrdev, iclass 11, count 2 2006.229.11:40:26.29#ibcon#first serial, iclass 11, count 2 2006.229.11:40:26.29#ibcon#enter sib2, iclass 11, count 2 2006.229.11:40:26.29#ibcon#flushed, iclass 11, count 2 2006.229.11:40:26.29#ibcon#about to write, iclass 11, count 2 2006.229.11:40:26.29#ibcon#wrote, iclass 11, count 2 2006.229.11:40:26.29#ibcon#about to read 3, iclass 11, count 2 2006.229.11:40:26.31#ibcon#read 3, iclass 11, count 2 2006.229.11:40:26.31#ibcon#about to read 4, iclass 11, count 2 2006.229.11:40:26.31#ibcon#read 4, iclass 11, count 2 2006.229.11:40:26.31#ibcon#about to read 5, iclass 11, count 2 2006.229.11:40:26.31#ibcon#read 5, iclass 11, count 2 2006.229.11:40:26.31#ibcon#about to read 6, iclass 11, count 2 2006.229.11:40:26.31#ibcon#read 6, iclass 11, count 2 2006.229.11:40:26.31#ibcon#end of sib2, iclass 11, count 2 2006.229.11:40:26.31#ibcon#*mode == 0, iclass 11, count 2 2006.229.11:40:26.31#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.11:40:26.31#ibcon#[27=AT05-04\r\n] 2006.229.11:40:26.31#ibcon#*before write, iclass 11, count 2 2006.229.11:40:26.31#ibcon#enter sib2, iclass 11, count 2 2006.229.11:40:26.31#ibcon#flushed, iclass 11, count 2 2006.229.11:40:26.31#ibcon#about to write, iclass 11, count 2 2006.229.11:40:26.31#ibcon#wrote, iclass 11, count 2 2006.229.11:40:26.31#ibcon#about to read 3, iclass 11, count 2 2006.229.11:40:26.34#ibcon#read 3, iclass 11, count 2 2006.229.11:40:26.34#ibcon#about to read 4, iclass 11, count 2 2006.229.11:40:26.34#ibcon#read 4, iclass 11, count 2 2006.229.11:40:26.34#ibcon#about to read 5, iclass 11, count 2 2006.229.11:40:26.34#ibcon#read 5, iclass 11, count 2 2006.229.11:40:26.34#ibcon#about to read 6, iclass 11, count 2 2006.229.11:40:26.34#ibcon#read 6, iclass 11, count 2 2006.229.11:40:26.34#ibcon#end of sib2, iclass 11, count 2 2006.229.11:40:26.34#ibcon#*after write, iclass 11, count 2 2006.229.11:40:26.34#ibcon#*before return 0, iclass 11, count 2 2006.229.11:40:26.34#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:26.34#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:40:26.34#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.11:40:26.34#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:26.34#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:26.46#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:26.46#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:26.46#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:40:26.46#ibcon#first serial, iclass 11, count 0 2006.229.11:40:26.46#ibcon#enter sib2, iclass 11, count 0 2006.229.11:40:26.46#ibcon#flushed, iclass 11, count 0 2006.229.11:40:26.46#ibcon#about to write, iclass 11, count 0 2006.229.11:40:26.46#ibcon#wrote, iclass 11, count 0 2006.229.11:40:26.46#ibcon#about to read 3, iclass 11, count 0 2006.229.11:40:26.48#ibcon#read 3, iclass 11, count 0 2006.229.11:40:26.48#ibcon#about to read 4, iclass 11, count 0 2006.229.11:40:26.48#ibcon#read 4, iclass 11, count 0 2006.229.11:40:26.48#ibcon#about to read 5, iclass 11, count 0 2006.229.11:40:26.48#ibcon#read 5, iclass 11, count 0 2006.229.11:40:26.48#ibcon#about to read 6, iclass 11, count 0 2006.229.11:40:26.48#ibcon#read 6, iclass 11, count 0 2006.229.11:40:26.48#ibcon#end of sib2, iclass 11, count 0 2006.229.11:40:26.48#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:40:26.48#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:40:26.48#ibcon#[27=USB\r\n] 2006.229.11:40:26.48#ibcon#*before write, iclass 11, count 0 2006.229.11:40:26.48#ibcon#enter sib2, iclass 11, count 0 2006.229.11:40:26.48#ibcon#flushed, iclass 11, count 0 2006.229.11:40:26.48#ibcon#about to write, iclass 11, count 0 2006.229.11:40:26.48#ibcon#wrote, iclass 11, count 0 2006.229.11:40:26.48#ibcon#about to read 3, iclass 11, count 0 2006.229.11:40:26.51#ibcon#read 3, iclass 11, count 0 2006.229.11:40:26.51#ibcon#about to read 4, iclass 11, count 0 2006.229.11:40:26.51#ibcon#read 4, iclass 11, count 0 2006.229.11:40:26.51#ibcon#about to read 5, iclass 11, count 0 2006.229.11:40:26.51#ibcon#read 5, iclass 11, count 0 2006.229.11:40:26.51#ibcon#about to read 6, iclass 11, count 0 2006.229.11:40:26.51#ibcon#read 6, iclass 11, count 0 2006.229.11:40:26.51#ibcon#end of sib2, iclass 11, count 0 2006.229.11:40:26.51#ibcon#*after write, iclass 11, count 0 2006.229.11:40:26.51#ibcon#*before return 0, iclass 11, count 0 2006.229.11:40:26.51#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:26.51#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:40:26.51#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:40:26.51#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:40:26.51$vck44/vblo=6,719.99 2006.229.11:40:26.51#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.11:40:26.51#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.11:40:26.51#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:26.51#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:26.51#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:26.51#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:26.51#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:40:26.51#ibcon#first serial, iclass 13, count 0 2006.229.11:40:26.51#ibcon#enter sib2, iclass 13, count 0 2006.229.11:40:26.51#ibcon#flushed, iclass 13, count 0 2006.229.11:40:26.51#ibcon#about to write, iclass 13, count 0 2006.229.11:40:26.51#ibcon#wrote, iclass 13, count 0 2006.229.11:40:26.51#ibcon#about to read 3, iclass 13, count 0 2006.229.11:40:26.53#ibcon#read 3, iclass 13, count 0 2006.229.11:40:26.53#ibcon#about to read 4, iclass 13, count 0 2006.229.11:40:26.53#ibcon#read 4, iclass 13, count 0 2006.229.11:40:26.53#ibcon#about to read 5, iclass 13, count 0 2006.229.11:40:26.53#ibcon#read 5, iclass 13, count 0 2006.229.11:40:26.53#ibcon#about to read 6, iclass 13, count 0 2006.229.11:40:26.53#ibcon#read 6, iclass 13, count 0 2006.229.11:40:26.53#ibcon#end of sib2, iclass 13, count 0 2006.229.11:40:26.53#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:40:26.53#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:40:26.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:40:26.53#ibcon#*before write, iclass 13, count 0 2006.229.11:40:26.53#ibcon#enter sib2, iclass 13, count 0 2006.229.11:40:26.53#ibcon#flushed, iclass 13, count 0 2006.229.11:40:26.53#ibcon#about to write, iclass 13, count 0 2006.229.11:40:26.53#ibcon#wrote, iclass 13, count 0 2006.229.11:40:26.53#ibcon#about to read 3, iclass 13, count 0 2006.229.11:40:26.57#ibcon#read 3, iclass 13, count 0 2006.229.11:40:26.57#ibcon#about to read 4, iclass 13, count 0 2006.229.11:40:26.57#ibcon#read 4, iclass 13, count 0 2006.229.11:40:26.57#ibcon#about to read 5, iclass 13, count 0 2006.229.11:40:26.57#ibcon#read 5, iclass 13, count 0 2006.229.11:40:26.57#ibcon#about to read 6, iclass 13, count 0 2006.229.11:40:26.57#ibcon#read 6, iclass 13, count 0 2006.229.11:40:26.57#ibcon#end of sib2, iclass 13, count 0 2006.229.11:40:26.57#ibcon#*after write, iclass 13, count 0 2006.229.11:40:26.57#ibcon#*before return 0, iclass 13, count 0 2006.229.11:40:26.57#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:26.57#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:40:26.57#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:40:26.57#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:40:26.57$vck44/vb=6,4 2006.229.11:40:26.57#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.11:40:26.57#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.11:40:26.57#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:26.57#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:26.63#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:26.63#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:26.63#ibcon#enter wrdev, iclass 15, count 2 2006.229.11:40:26.63#ibcon#first serial, iclass 15, count 2 2006.229.11:40:26.63#ibcon#enter sib2, iclass 15, count 2 2006.229.11:40:26.63#ibcon#flushed, iclass 15, count 2 2006.229.11:40:26.63#ibcon#about to write, iclass 15, count 2 2006.229.11:40:26.63#ibcon#wrote, iclass 15, count 2 2006.229.11:40:26.63#ibcon#about to read 3, iclass 15, count 2 2006.229.11:40:26.65#ibcon#read 3, iclass 15, count 2 2006.229.11:40:26.65#ibcon#about to read 4, iclass 15, count 2 2006.229.11:40:26.65#ibcon#read 4, iclass 15, count 2 2006.229.11:40:26.65#ibcon#about to read 5, iclass 15, count 2 2006.229.11:40:26.65#ibcon#read 5, iclass 15, count 2 2006.229.11:40:26.65#ibcon#about to read 6, iclass 15, count 2 2006.229.11:40:26.65#ibcon#read 6, iclass 15, count 2 2006.229.11:40:26.65#ibcon#end of sib2, iclass 15, count 2 2006.229.11:40:26.65#ibcon#*mode == 0, iclass 15, count 2 2006.229.11:40:26.65#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.11:40:26.65#ibcon#[27=AT06-04\r\n] 2006.229.11:40:26.65#ibcon#*before write, iclass 15, count 2 2006.229.11:40:26.65#ibcon#enter sib2, iclass 15, count 2 2006.229.11:40:26.65#ibcon#flushed, iclass 15, count 2 2006.229.11:40:26.65#ibcon#about to write, iclass 15, count 2 2006.229.11:40:26.65#ibcon#wrote, iclass 15, count 2 2006.229.11:40:26.65#ibcon#about to read 3, iclass 15, count 2 2006.229.11:40:26.68#ibcon#read 3, iclass 15, count 2 2006.229.11:40:26.68#ibcon#about to read 4, iclass 15, count 2 2006.229.11:40:26.68#ibcon#read 4, iclass 15, count 2 2006.229.11:40:26.68#ibcon#about to read 5, iclass 15, count 2 2006.229.11:40:26.68#ibcon#read 5, iclass 15, count 2 2006.229.11:40:26.68#ibcon#about to read 6, iclass 15, count 2 2006.229.11:40:26.68#ibcon#read 6, iclass 15, count 2 2006.229.11:40:26.68#ibcon#end of sib2, iclass 15, count 2 2006.229.11:40:26.68#ibcon#*after write, iclass 15, count 2 2006.229.11:40:26.68#ibcon#*before return 0, iclass 15, count 2 2006.229.11:40:26.68#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:26.68#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:40:26.68#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.11:40:26.68#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:26.68#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:26.80#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:26.80#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:26.80#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:40:26.80#ibcon#first serial, iclass 15, count 0 2006.229.11:40:26.80#ibcon#enter sib2, iclass 15, count 0 2006.229.11:40:26.80#ibcon#flushed, iclass 15, count 0 2006.229.11:40:26.80#ibcon#about to write, iclass 15, count 0 2006.229.11:40:26.80#ibcon#wrote, iclass 15, count 0 2006.229.11:40:26.80#ibcon#about to read 3, iclass 15, count 0 2006.229.11:40:26.82#ibcon#read 3, iclass 15, count 0 2006.229.11:40:26.82#ibcon#about to read 4, iclass 15, count 0 2006.229.11:40:26.82#ibcon#read 4, iclass 15, count 0 2006.229.11:40:26.82#ibcon#about to read 5, iclass 15, count 0 2006.229.11:40:26.82#ibcon#read 5, iclass 15, count 0 2006.229.11:40:26.82#ibcon#about to read 6, iclass 15, count 0 2006.229.11:40:26.82#ibcon#read 6, iclass 15, count 0 2006.229.11:40:26.82#ibcon#end of sib2, iclass 15, count 0 2006.229.11:40:26.82#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:40:26.82#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:40:26.82#ibcon#[27=USB\r\n] 2006.229.11:40:26.82#ibcon#*before write, iclass 15, count 0 2006.229.11:40:26.82#ibcon#enter sib2, iclass 15, count 0 2006.229.11:40:26.82#ibcon#flushed, iclass 15, count 0 2006.229.11:40:26.82#ibcon#about to write, iclass 15, count 0 2006.229.11:40:26.82#ibcon#wrote, iclass 15, count 0 2006.229.11:40:26.82#ibcon#about to read 3, iclass 15, count 0 2006.229.11:40:26.85#ibcon#read 3, iclass 15, count 0 2006.229.11:40:26.85#ibcon#about to read 4, iclass 15, count 0 2006.229.11:40:26.85#ibcon#read 4, iclass 15, count 0 2006.229.11:40:26.85#ibcon#about to read 5, iclass 15, count 0 2006.229.11:40:26.85#ibcon#read 5, iclass 15, count 0 2006.229.11:40:26.85#ibcon#about to read 6, iclass 15, count 0 2006.229.11:40:26.85#ibcon#read 6, iclass 15, count 0 2006.229.11:40:26.85#ibcon#end of sib2, iclass 15, count 0 2006.229.11:40:26.85#ibcon#*after write, iclass 15, count 0 2006.229.11:40:26.85#ibcon#*before return 0, iclass 15, count 0 2006.229.11:40:26.85#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:26.85#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:40:26.85#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:40:26.85#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:40:26.85$vck44/vblo=7,734.99 2006.229.11:40:26.85#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.11:40:26.85#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.11:40:26.85#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:26.85#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:26.85#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:26.85#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:26.85#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:40:26.85#ibcon#first serial, iclass 17, count 0 2006.229.11:40:26.85#ibcon#enter sib2, iclass 17, count 0 2006.229.11:40:26.85#ibcon#flushed, iclass 17, count 0 2006.229.11:40:26.85#ibcon#about to write, iclass 17, count 0 2006.229.11:40:26.85#ibcon#wrote, iclass 17, count 0 2006.229.11:40:26.85#ibcon#about to read 3, iclass 17, count 0 2006.229.11:40:26.87#ibcon#read 3, iclass 17, count 0 2006.229.11:40:26.87#ibcon#about to read 4, iclass 17, count 0 2006.229.11:40:26.87#ibcon#read 4, iclass 17, count 0 2006.229.11:40:26.87#ibcon#about to read 5, iclass 17, count 0 2006.229.11:40:26.87#ibcon#read 5, iclass 17, count 0 2006.229.11:40:26.87#ibcon#about to read 6, iclass 17, count 0 2006.229.11:40:26.87#ibcon#read 6, iclass 17, count 0 2006.229.11:40:26.87#ibcon#end of sib2, iclass 17, count 0 2006.229.11:40:26.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:40:26.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:40:26.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:40:26.87#ibcon#*before write, iclass 17, count 0 2006.229.11:40:26.87#ibcon#enter sib2, iclass 17, count 0 2006.229.11:40:26.87#ibcon#flushed, iclass 17, count 0 2006.229.11:40:26.87#ibcon#about to write, iclass 17, count 0 2006.229.11:40:26.87#ibcon#wrote, iclass 17, count 0 2006.229.11:40:26.87#ibcon#about to read 3, iclass 17, count 0 2006.229.11:40:26.91#ibcon#read 3, iclass 17, count 0 2006.229.11:40:26.91#ibcon#about to read 4, iclass 17, count 0 2006.229.11:40:26.91#ibcon#read 4, iclass 17, count 0 2006.229.11:40:26.91#ibcon#about to read 5, iclass 17, count 0 2006.229.11:40:26.91#ibcon#read 5, iclass 17, count 0 2006.229.11:40:26.91#ibcon#about to read 6, iclass 17, count 0 2006.229.11:40:26.91#ibcon#read 6, iclass 17, count 0 2006.229.11:40:26.91#ibcon#end of sib2, iclass 17, count 0 2006.229.11:40:26.91#ibcon#*after write, iclass 17, count 0 2006.229.11:40:26.91#ibcon#*before return 0, iclass 17, count 0 2006.229.11:40:26.91#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:26.91#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:40:26.91#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:40:26.91#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:40:26.91$vck44/vb=7,4 2006.229.11:40:26.91#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.11:40:26.91#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.11:40:26.91#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:26.91#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:26.97#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:26.97#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:26.97#ibcon#enter wrdev, iclass 19, count 2 2006.229.11:40:26.97#ibcon#first serial, iclass 19, count 2 2006.229.11:40:26.97#ibcon#enter sib2, iclass 19, count 2 2006.229.11:40:26.97#ibcon#flushed, iclass 19, count 2 2006.229.11:40:26.97#ibcon#about to write, iclass 19, count 2 2006.229.11:40:26.97#ibcon#wrote, iclass 19, count 2 2006.229.11:40:26.97#ibcon#about to read 3, iclass 19, count 2 2006.229.11:40:26.99#ibcon#read 3, iclass 19, count 2 2006.229.11:40:26.99#ibcon#about to read 4, iclass 19, count 2 2006.229.11:40:26.99#ibcon#read 4, iclass 19, count 2 2006.229.11:40:26.99#ibcon#about to read 5, iclass 19, count 2 2006.229.11:40:26.99#ibcon#read 5, iclass 19, count 2 2006.229.11:40:26.99#ibcon#about to read 6, iclass 19, count 2 2006.229.11:40:26.99#ibcon#read 6, iclass 19, count 2 2006.229.11:40:26.99#ibcon#end of sib2, iclass 19, count 2 2006.229.11:40:26.99#ibcon#*mode == 0, iclass 19, count 2 2006.229.11:40:26.99#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.11:40:26.99#ibcon#[27=AT07-04\r\n] 2006.229.11:40:26.99#ibcon#*before write, iclass 19, count 2 2006.229.11:40:26.99#ibcon#enter sib2, iclass 19, count 2 2006.229.11:40:26.99#ibcon#flushed, iclass 19, count 2 2006.229.11:40:26.99#ibcon#about to write, iclass 19, count 2 2006.229.11:40:26.99#ibcon#wrote, iclass 19, count 2 2006.229.11:40:26.99#ibcon#about to read 3, iclass 19, count 2 2006.229.11:40:27.02#ibcon#read 3, iclass 19, count 2 2006.229.11:40:27.02#ibcon#about to read 4, iclass 19, count 2 2006.229.11:40:27.02#ibcon#read 4, iclass 19, count 2 2006.229.11:40:27.02#ibcon#about to read 5, iclass 19, count 2 2006.229.11:40:27.02#ibcon#read 5, iclass 19, count 2 2006.229.11:40:27.02#ibcon#about to read 6, iclass 19, count 2 2006.229.11:40:27.02#ibcon#read 6, iclass 19, count 2 2006.229.11:40:27.02#ibcon#end of sib2, iclass 19, count 2 2006.229.11:40:27.02#ibcon#*after write, iclass 19, count 2 2006.229.11:40:27.02#ibcon#*before return 0, iclass 19, count 2 2006.229.11:40:27.02#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:27.02#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:40:27.02#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.11:40:27.02#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:27.02#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:27.14#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:27.14#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:27.14#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:40:27.14#ibcon#first serial, iclass 19, count 0 2006.229.11:40:27.14#ibcon#enter sib2, iclass 19, count 0 2006.229.11:40:27.14#ibcon#flushed, iclass 19, count 0 2006.229.11:40:27.14#ibcon#about to write, iclass 19, count 0 2006.229.11:40:27.14#ibcon#wrote, iclass 19, count 0 2006.229.11:40:27.14#ibcon#about to read 3, iclass 19, count 0 2006.229.11:40:27.16#ibcon#read 3, iclass 19, count 0 2006.229.11:40:27.16#ibcon#about to read 4, iclass 19, count 0 2006.229.11:40:27.16#ibcon#read 4, iclass 19, count 0 2006.229.11:40:27.16#ibcon#about to read 5, iclass 19, count 0 2006.229.11:40:27.16#ibcon#read 5, iclass 19, count 0 2006.229.11:40:27.16#ibcon#about to read 6, iclass 19, count 0 2006.229.11:40:27.16#ibcon#read 6, iclass 19, count 0 2006.229.11:40:27.16#ibcon#end of sib2, iclass 19, count 0 2006.229.11:40:27.16#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:40:27.16#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:40:27.16#ibcon#[27=USB\r\n] 2006.229.11:40:27.16#ibcon#*before write, iclass 19, count 0 2006.229.11:40:27.16#ibcon#enter sib2, iclass 19, count 0 2006.229.11:40:27.16#ibcon#flushed, iclass 19, count 0 2006.229.11:40:27.16#ibcon#about to write, iclass 19, count 0 2006.229.11:40:27.16#ibcon#wrote, iclass 19, count 0 2006.229.11:40:27.16#ibcon#about to read 3, iclass 19, count 0 2006.229.11:40:27.19#ibcon#read 3, iclass 19, count 0 2006.229.11:40:27.19#ibcon#about to read 4, iclass 19, count 0 2006.229.11:40:27.19#ibcon#read 4, iclass 19, count 0 2006.229.11:40:27.19#ibcon#about to read 5, iclass 19, count 0 2006.229.11:40:27.19#ibcon#read 5, iclass 19, count 0 2006.229.11:40:27.19#ibcon#about to read 6, iclass 19, count 0 2006.229.11:40:27.19#ibcon#read 6, iclass 19, count 0 2006.229.11:40:27.19#ibcon#end of sib2, iclass 19, count 0 2006.229.11:40:27.19#ibcon#*after write, iclass 19, count 0 2006.229.11:40:27.19#ibcon#*before return 0, iclass 19, count 0 2006.229.11:40:27.19#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:27.19#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:40:27.19#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:40:27.19#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:40:27.19$vck44/vblo=8,744.99 2006.229.11:40:27.19#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.11:40:27.19#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.11:40:27.19#ibcon#ireg 17 cls_cnt 0 2006.229.11:40:27.19#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:27.19#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:27.19#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:27.19#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:40:27.19#ibcon#first serial, iclass 21, count 0 2006.229.11:40:27.19#ibcon#enter sib2, iclass 21, count 0 2006.229.11:40:27.19#ibcon#flushed, iclass 21, count 0 2006.229.11:40:27.19#ibcon#about to write, iclass 21, count 0 2006.229.11:40:27.19#ibcon#wrote, iclass 21, count 0 2006.229.11:40:27.19#ibcon#about to read 3, iclass 21, count 0 2006.229.11:40:27.21#ibcon#read 3, iclass 21, count 0 2006.229.11:40:27.21#ibcon#about to read 4, iclass 21, count 0 2006.229.11:40:27.21#ibcon#read 4, iclass 21, count 0 2006.229.11:40:27.21#ibcon#about to read 5, iclass 21, count 0 2006.229.11:40:27.21#ibcon#read 5, iclass 21, count 0 2006.229.11:40:27.21#ibcon#about to read 6, iclass 21, count 0 2006.229.11:40:27.21#ibcon#read 6, iclass 21, count 0 2006.229.11:40:27.21#ibcon#end of sib2, iclass 21, count 0 2006.229.11:40:27.21#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:40:27.21#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:40:27.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:40:27.21#ibcon#*before write, iclass 21, count 0 2006.229.11:40:27.21#ibcon#enter sib2, iclass 21, count 0 2006.229.11:40:27.21#ibcon#flushed, iclass 21, count 0 2006.229.11:40:27.21#ibcon#about to write, iclass 21, count 0 2006.229.11:40:27.21#ibcon#wrote, iclass 21, count 0 2006.229.11:40:27.21#ibcon#about to read 3, iclass 21, count 0 2006.229.11:40:27.25#ibcon#read 3, iclass 21, count 0 2006.229.11:40:27.25#ibcon#about to read 4, iclass 21, count 0 2006.229.11:40:27.25#ibcon#read 4, iclass 21, count 0 2006.229.11:40:27.25#ibcon#about to read 5, iclass 21, count 0 2006.229.11:40:27.25#ibcon#read 5, iclass 21, count 0 2006.229.11:40:27.25#ibcon#about to read 6, iclass 21, count 0 2006.229.11:40:27.25#ibcon#read 6, iclass 21, count 0 2006.229.11:40:27.25#ibcon#end of sib2, iclass 21, count 0 2006.229.11:40:27.25#ibcon#*after write, iclass 21, count 0 2006.229.11:40:27.25#ibcon#*before return 0, iclass 21, count 0 2006.229.11:40:27.25#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:27.25#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:40:27.25#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:40:27.25#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:40:27.25$vck44/vb=8,4 2006.229.11:40:27.25#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.11:40:27.25#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.11:40:27.25#ibcon#ireg 11 cls_cnt 2 2006.229.11:40:27.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:27.31#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:27.31#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:27.31#ibcon#enter wrdev, iclass 23, count 2 2006.229.11:40:27.31#ibcon#first serial, iclass 23, count 2 2006.229.11:40:27.31#ibcon#enter sib2, iclass 23, count 2 2006.229.11:40:27.31#ibcon#flushed, iclass 23, count 2 2006.229.11:40:27.31#ibcon#about to write, iclass 23, count 2 2006.229.11:40:27.31#ibcon#wrote, iclass 23, count 2 2006.229.11:40:27.31#ibcon#about to read 3, iclass 23, count 2 2006.229.11:40:27.33#ibcon#read 3, iclass 23, count 2 2006.229.11:40:27.33#ibcon#about to read 4, iclass 23, count 2 2006.229.11:40:27.33#ibcon#read 4, iclass 23, count 2 2006.229.11:40:27.33#ibcon#about to read 5, iclass 23, count 2 2006.229.11:40:27.33#ibcon#read 5, iclass 23, count 2 2006.229.11:40:27.33#ibcon#about to read 6, iclass 23, count 2 2006.229.11:40:27.33#ibcon#read 6, iclass 23, count 2 2006.229.11:40:27.33#ibcon#end of sib2, iclass 23, count 2 2006.229.11:40:27.33#ibcon#*mode == 0, iclass 23, count 2 2006.229.11:40:27.33#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.11:40:27.33#ibcon#[27=AT08-04\r\n] 2006.229.11:40:27.33#ibcon#*before write, iclass 23, count 2 2006.229.11:40:27.33#ibcon#enter sib2, iclass 23, count 2 2006.229.11:40:27.33#ibcon#flushed, iclass 23, count 2 2006.229.11:40:27.33#ibcon#about to write, iclass 23, count 2 2006.229.11:40:27.33#ibcon#wrote, iclass 23, count 2 2006.229.11:40:27.33#ibcon#about to read 3, iclass 23, count 2 2006.229.11:40:27.36#ibcon#read 3, iclass 23, count 2 2006.229.11:40:27.36#ibcon#about to read 4, iclass 23, count 2 2006.229.11:40:27.36#ibcon#read 4, iclass 23, count 2 2006.229.11:40:27.36#ibcon#about to read 5, iclass 23, count 2 2006.229.11:40:27.36#ibcon#read 5, iclass 23, count 2 2006.229.11:40:27.36#ibcon#about to read 6, iclass 23, count 2 2006.229.11:40:27.36#ibcon#read 6, iclass 23, count 2 2006.229.11:40:27.36#ibcon#end of sib2, iclass 23, count 2 2006.229.11:40:27.36#ibcon#*after write, iclass 23, count 2 2006.229.11:40:27.36#ibcon#*before return 0, iclass 23, count 2 2006.229.11:40:27.36#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:27.36#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:40:27.36#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.11:40:27.36#ibcon#ireg 7 cls_cnt 0 2006.229.11:40:27.36#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:27.48#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:27.48#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:27.48#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:40:27.48#ibcon#first serial, iclass 23, count 0 2006.229.11:40:27.48#ibcon#enter sib2, iclass 23, count 0 2006.229.11:40:27.48#ibcon#flushed, iclass 23, count 0 2006.229.11:40:27.48#ibcon#about to write, iclass 23, count 0 2006.229.11:40:27.48#ibcon#wrote, iclass 23, count 0 2006.229.11:40:27.48#ibcon#about to read 3, iclass 23, count 0 2006.229.11:40:27.50#ibcon#read 3, iclass 23, count 0 2006.229.11:40:27.50#ibcon#about to read 4, iclass 23, count 0 2006.229.11:40:27.50#ibcon#read 4, iclass 23, count 0 2006.229.11:40:27.50#ibcon#about to read 5, iclass 23, count 0 2006.229.11:40:27.50#ibcon#read 5, iclass 23, count 0 2006.229.11:40:27.50#ibcon#about to read 6, iclass 23, count 0 2006.229.11:40:27.50#ibcon#read 6, iclass 23, count 0 2006.229.11:40:27.50#ibcon#end of sib2, iclass 23, count 0 2006.229.11:40:27.50#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:40:27.50#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:40:27.50#ibcon#[27=USB\r\n] 2006.229.11:40:27.50#ibcon#*before write, iclass 23, count 0 2006.229.11:40:27.50#ibcon#enter sib2, iclass 23, count 0 2006.229.11:40:27.50#ibcon#flushed, iclass 23, count 0 2006.229.11:40:27.50#ibcon#about to write, iclass 23, count 0 2006.229.11:40:27.50#ibcon#wrote, iclass 23, count 0 2006.229.11:40:27.50#ibcon#about to read 3, iclass 23, count 0 2006.229.11:40:27.53#ibcon#read 3, iclass 23, count 0 2006.229.11:40:27.53#ibcon#about to read 4, iclass 23, count 0 2006.229.11:40:27.53#ibcon#read 4, iclass 23, count 0 2006.229.11:40:27.53#ibcon#about to read 5, iclass 23, count 0 2006.229.11:40:27.53#ibcon#read 5, iclass 23, count 0 2006.229.11:40:27.53#ibcon#about to read 6, iclass 23, count 0 2006.229.11:40:27.53#ibcon#read 6, iclass 23, count 0 2006.229.11:40:27.53#ibcon#end of sib2, iclass 23, count 0 2006.229.11:40:27.53#ibcon#*after write, iclass 23, count 0 2006.229.11:40:27.53#ibcon#*before return 0, iclass 23, count 0 2006.229.11:40:27.53#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:27.53#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:40:27.53#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:40:27.53#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:40:27.53$vck44/vabw=wide 2006.229.11:40:27.53#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.11:40:27.53#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.11:40:27.53#ibcon#ireg 8 cls_cnt 0 2006.229.11:40:27.53#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:27.53#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:27.53#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:27.53#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:40:27.53#ibcon#first serial, iclass 25, count 0 2006.229.11:40:27.53#ibcon#enter sib2, iclass 25, count 0 2006.229.11:40:27.53#ibcon#flushed, iclass 25, count 0 2006.229.11:40:27.53#ibcon#about to write, iclass 25, count 0 2006.229.11:40:27.53#ibcon#wrote, iclass 25, count 0 2006.229.11:40:27.53#ibcon#about to read 3, iclass 25, count 0 2006.229.11:40:27.55#ibcon#read 3, iclass 25, count 0 2006.229.11:40:27.55#ibcon#about to read 4, iclass 25, count 0 2006.229.11:40:27.55#ibcon#read 4, iclass 25, count 0 2006.229.11:40:27.55#ibcon#about to read 5, iclass 25, count 0 2006.229.11:40:27.55#ibcon#read 5, iclass 25, count 0 2006.229.11:40:27.55#ibcon#about to read 6, iclass 25, count 0 2006.229.11:40:27.55#ibcon#read 6, iclass 25, count 0 2006.229.11:40:27.55#ibcon#end of sib2, iclass 25, count 0 2006.229.11:40:27.55#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:40:27.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:40:27.55#ibcon#[25=BW32\r\n] 2006.229.11:40:27.55#ibcon#*before write, iclass 25, count 0 2006.229.11:40:27.55#ibcon#enter sib2, iclass 25, count 0 2006.229.11:40:27.55#ibcon#flushed, iclass 25, count 0 2006.229.11:40:27.55#ibcon#about to write, iclass 25, count 0 2006.229.11:40:27.55#ibcon#wrote, iclass 25, count 0 2006.229.11:40:27.55#ibcon#about to read 3, iclass 25, count 0 2006.229.11:40:27.58#ibcon#read 3, iclass 25, count 0 2006.229.11:40:27.58#ibcon#about to read 4, iclass 25, count 0 2006.229.11:40:27.58#ibcon#read 4, iclass 25, count 0 2006.229.11:40:27.58#ibcon#about to read 5, iclass 25, count 0 2006.229.11:40:27.58#ibcon#read 5, iclass 25, count 0 2006.229.11:40:27.58#ibcon#about to read 6, iclass 25, count 0 2006.229.11:40:27.58#ibcon#read 6, iclass 25, count 0 2006.229.11:40:27.58#ibcon#end of sib2, iclass 25, count 0 2006.229.11:40:27.58#ibcon#*after write, iclass 25, count 0 2006.229.11:40:27.58#ibcon#*before return 0, iclass 25, count 0 2006.229.11:40:27.58#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:27.58#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:40:27.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:40:27.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:40:27.58$vck44/vbbw=wide 2006.229.11:40:27.58#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:40:27.58#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:40:27.58#ibcon#ireg 8 cls_cnt 0 2006.229.11:40:27.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:40:27.65#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:40:27.65#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:40:27.65#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:40:27.65#ibcon#first serial, iclass 27, count 0 2006.229.11:40:27.65#ibcon#enter sib2, iclass 27, count 0 2006.229.11:40:27.65#ibcon#flushed, iclass 27, count 0 2006.229.11:40:27.65#ibcon#about to write, iclass 27, count 0 2006.229.11:40:27.65#ibcon#wrote, iclass 27, count 0 2006.229.11:40:27.65#ibcon#about to read 3, iclass 27, count 0 2006.229.11:40:27.67#ibcon#read 3, iclass 27, count 0 2006.229.11:40:27.67#ibcon#about to read 4, iclass 27, count 0 2006.229.11:40:27.67#ibcon#read 4, iclass 27, count 0 2006.229.11:40:27.67#ibcon#about to read 5, iclass 27, count 0 2006.229.11:40:27.67#ibcon#read 5, iclass 27, count 0 2006.229.11:40:27.67#ibcon#about to read 6, iclass 27, count 0 2006.229.11:40:27.67#ibcon#read 6, iclass 27, count 0 2006.229.11:40:27.67#ibcon#end of sib2, iclass 27, count 0 2006.229.11:40:27.67#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:40:27.67#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:40:27.67#ibcon#[27=BW32\r\n] 2006.229.11:40:27.67#ibcon#*before write, iclass 27, count 0 2006.229.11:40:27.67#ibcon#enter sib2, iclass 27, count 0 2006.229.11:40:27.67#ibcon#flushed, iclass 27, count 0 2006.229.11:40:27.67#ibcon#about to write, iclass 27, count 0 2006.229.11:40:27.67#ibcon#wrote, iclass 27, count 0 2006.229.11:40:27.67#ibcon#about to read 3, iclass 27, count 0 2006.229.11:40:27.70#ibcon#read 3, iclass 27, count 0 2006.229.11:40:27.70#ibcon#about to read 4, iclass 27, count 0 2006.229.11:40:27.70#ibcon#read 4, iclass 27, count 0 2006.229.11:40:27.70#ibcon#about to read 5, iclass 27, count 0 2006.229.11:40:27.70#ibcon#read 5, iclass 27, count 0 2006.229.11:40:27.70#ibcon#about to read 6, iclass 27, count 0 2006.229.11:40:27.70#ibcon#read 6, iclass 27, count 0 2006.229.11:40:27.70#ibcon#end of sib2, iclass 27, count 0 2006.229.11:40:27.70#ibcon#*after write, iclass 27, count 0 2006.229.11:40:27.70#ibcon#*before return 0, iclass 27, count 0 2006.229.11:40:27.70#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:40:27.70#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:40:27.70#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:40:27.70#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:40:27.70$setupk4/ifdk4 2006.229.11:40:27.70$ifdk4/lo= 2006.229.11:40:27.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:40:27.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:40:27.70$ifdk4/patch= 2006.229.11:40:27.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:40:27.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:40:27.70$setupk4/!*+20s 2006.229.11:40:28.06#abcon#<5=/04 1.5 2.7 27.961001002.2\r\n> 2006.229.11:40:28.08#abcon#{5=INTERFACE CLEAR} 2006.229.11:40:28.14#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:40:38.23#abcon#<5=/04 1.5 2.7 27.961001002.3\r\n> 2006.229.11:40:38.25#abcon#{5=INTERFACE CLEAR} 2006.229.11:40:38.31#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:40:42.20$setupk4/"tpicd 2006.229.11:40:42.20$setupk4/echo=off 2006.229.11:40:42.20$setupk4/xlog=off 2006.229.11:40:42.20:!2006.229.11:43:50 2006.229.11:40:55.14#trakl#Source acquired 2006.229.11:40:56.14#flagr#flagr/antenna,acquired 2006.229.11:43:50.02:preob 2006.229.11:43:51.15/onsource/TRACKING 2006.229.11:43:51.15:!2006.229.11:44:00 2006.229.11:44:00.02:"tape 2006.229.11:44:00.02:"st=record 2006.229.11:44:00.02:data_valid=on 2006.229.11:44:00.02:midob 2006.229.11:44:01.15/onsource/TRACKING 2006.229.11:44:01.15/wx/27.93,1002.3,100 2006.229.11:44:01.21/cable/+6.4057E-03 2006.229.11:44:02.30/va/01,08,usb,yes,30,33 2006.229.11:44:02.30/va/02,07,usb,yes,33,33 2006.229.11:44:02.30/va/03,06,usb,yes,41,43 2006.229.11:44:02.30/va/04,07,usb,yes,34,35 2006.229.11:44:02.30/va/05,04,usb,yes,30,31 2006.229.11:44:02.30/va/06,04,usb,yes,34,34 2006.229.11:44:02.30/va/07,05,usb,yes,30,31 2006.229.11:44:02.30/va/08,06,usb,yes,22,27 2006.229.11:44:02.54/valo/01,524.99,yes,locked 2006.229.11:44:02.54/valo/02,534.99,yes,locked 2006.229.11:44:02.54/valo/03,564.99,yes,locked 2006.229.11:44:02.54/valo/04,624.99,yes,locked 2006.229.11:44:02.54/valo/05,734.99,yes,locked 2006.229.11:44:02.54/valo/06,814.99,yes,locked 2006.229.11:44:02.54/valo/07,864.99,yes,locked 2006.229.11:44:02.54/valo/08,884.99,yes,locked 2006.229.11:44:03.62/vb/01,04,usb,yes,31,29 2006.229.11:44:03.62/vb/02,04,usb,yes,34,34 2006.229.11:44:03.62/vb/03,04,usb,yes,31,34 2006.229.11:44:03.62/vb/04,04,usb,yes,35,34 2006.229.11:44:03.62/vb/05,04,usb,yes,27,30 2006.229.11:44:03.62/vb/06,04,usb,yes,32,28 2006.229.11:44:03.62/vb/07,04,usb,yes,32,32 2006.229.11:44:03.62/vb/08,04,usb,yes,29,33 2006.229.11:44:03.85/vblo/01,629.99,yes,locked 2006.229.11:44:03.85/vblo/02,634.99,yes,locked 2006.229.11:44:03.85/vblo/03,649.99,yes,locked 2006.229.11:44:03.85/vblo/04,679.99,yes,locked 2006.229.11:44:03.85/vblo/05,709.99,yes,locked 2006.229.11:44:03.85/vblo/06,719.99,yes,locked 2006.229.11:44:03.85/vblo/07,734.99,yes,locked 2006.229.11:44:03.85/vblo/08,744.99,yes,locked 2006.229.11:44:04.00/vabw/8 2006.229.11:44:04.15/vbbw/8 2006.229.11:44:04.24/xfe/off,on,12.0 2006.229.11:44:04.61/ifatt/23,28,28,28 2006.229.11:44:05.07/fmout-gps/S +4.47E-07 2006.229.11:44:05.12:!2006.229.11:45:40 2006.229.11:45:40.01:data_valid=off 2006.229.11:45:40.02:"et 2006.229.11:45:40.02:!+3s 2006.229.11:45:43.04:"tape 2006.229.11:45:43.04:postob 2006.229.11:45:43.10/cable/+6.4052E-03 2006.229.11:45:43.11/wx/27.92,1002.3,100 2006.229.11:45:43.16/fmout-gps/S +4.45E-07 2006.229.11:45:43.16:scan_name=229-1149,jd0608,80 2006.229.11:45:43.17:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.11:45:44.13#flagr#flagr/antenna,new-source 2006.229.11:45:44.14:checkk5 2006.229.11:45:44.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:45:44.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:45:45.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:45:45.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:45:46.12/chk_obsdata//k5ts1/T2291144??a.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.11:45:46.54/chk_obsdata//k5ts2/T2291144??b.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.11:45:46.93/chk_obsdata//k5ts3/T2291144??c.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.11:45:47.34/chk_obsdata//k5ts4/T2291144??d.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.11:45:48.07/k5log//k5ts1_log_newline 2006.229.11:45:48.76/k5log//k5ts2_log_newline 2006.229.11:45:49.44/k5log//k5ts3_log_newline 2006.229.11:45:50.15/k5log//k5ts4_log_newline 2006.229.11:45:50.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:45:50.17:setupk4=1 2006.229.11:45:50.17$setupk4/echo=on 2006.229.11:45:50.17$setupk4/pcalon 2006.229.11:45:50.17$pcalon/"no phase cal control is implemented here 2006.229.11:45:50.17$setupk4/"tpicd=stop 2006.229.11:45:50.17$setupk4/"rec=synch_on 2006.229.11:45:50.17$setupk4/"rec_mode=128 2006.229.11:45:50.17$setupk4/!* 2006.229.11:45:50.17$setupk4/recpk4 2006.229.11:45:50.17$recpk4/recpatch= 2006.229.11:45:50.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:45:50.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:45:50.18$setupk4/vck44 2006.229.11:45:50.18$vck44/valo=1,524.99 2006.229.11:45:50.18#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.11:45:50.18#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.11:45:50.18#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:50.18#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:50.18#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:50.18#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:50.18#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:45:50.18#ibcon#first serial, iclass 16, count 0 2006.229.11:45:50.18#ibcon#enter sib2, iclass 16, count 0 2006.229.11:45:50.18#ibcon#flushed, iclass 16, count 0 2006.229.11:45:50.18#ibcon#about to write, iclass 16, count 0 2006.229.11:45:50.18#ibcon#wrote, iclass 16, count 0 2006.229.11:45:50.18#ibcon#about to read 3, iclass 16, count 0 2006.229.11:45:50.19#ibcon#read 3, iclass 16, count 0 2006.229.11:45:50.19#ibcon#about to read 4, iclass 16, count 0 2006.229.11:45:50.19#ibcon#read 4, iclass 16, count 0 2006.229.11:45:50.19#ibcon#about to read 5, iclass 16, count 0 2006.229.11:45:50.19#ibcon#read 5, iclass 16, count 0 2006.229.11:45:50.19#ibcon#about to read 6, iclass 16, count 0 2006.229.11:45:50.19#ibcon#read 6, iclass 16, count 0 2006.229.11:45:50.19#ibcon#end of sib2, iclass 16, count 0 2006.229.11:45:50.19#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:45:50.19#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:45:50.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:45:50.19#ibcon#*before write, iclass 16, count 0 2006.229.11:45:50.19#ibcon#enter sib2, iclass 16, count 0 2006.229.11:45:50.19#ibcon#flushed, iclass 16, count 0 2006.229.11:45:50.19#ibcon#about to write, iclass 16, count 0 2006.229.11:45:50.19#ibcon#wrote, iclass 16, count 0 2006.229.11:45:50.19#ibcon#about to read 3, iclass 16, count 0 2006.229.11:45:50.24#ibcon#read 3, iclass 16, count 0 2006.229.11:45:50.24#ibcon#about to read 4, iclass 16, count 0 2006.229.11:45:50.24#ibcon#read 4, iclass 16, count 0 2006.229.11:45:50.24#ibcon#about to read 5, iclass 16, count 0 2006.229.11:45:50.24#ibcon#read 5, iclass 16, count 0 2006.229.11:45:50.24#ibcon#about to read 6, iclass 16, count 0 2006.229.11:45:50.24#ibcon#read 6, iclass 16, count 0 2006.229.11:45:50.24#ibcon#end of sib2, iclass 16, count 0 2006.229.11:45:50.24#ibcon#*after write, iclass 16, count 0 2006.229.11:45:50.24#ibcon#*before return 0, iclass 16, count 0 2006.229.11:45:50.24#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:50.24#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:50.24#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:45:50.24#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:45:50.24$vck44/va=1,8 2006.229.11:45:50.24#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.11:45:50.24#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.11:45:50.24#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:50.24#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:50.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:50.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:50.24#ibcon#enter wrdev, iclass 18, count 2 2006.229.11:45:50.24#ibcon#first serial, iclass 18, count 2 2006.229.11:45:50.24#ibcon#enter sib2, iclass 18, count 2 2006.229.11:45:50.24#ibcon#flushed, iclass 18, count 2 2006.229.11:45:50.24#ibcon#about to write, iclass 18, count 2 2006.229.11:45:50.24#ibcon#wrote, iclass 18, count 2 2006.229.11:45:50.24#ibcon#about to read 3, iclass 18, count 2 2006.229.11:45:50.26#ibcon#read 3, iclass 18, count 2 2006.229.11:45:50.26#ibcon#about to read 4, iclass 18, count 2 2006.229.11:45:50.26#ibcon#read 4, iclass 18, count 2 2006.229.11:45:50.26#ibcon#about to read 5, iclass 18, count 2 2006.229.11:45:50.26#ibcon#read 5, iclass 18, count 2 2006.229.11:45:50.26#ibcon#about to read 6, iclass 18, count 2 2006.229.11:45:50.26#ibcon#read 6, iclass 18, count 2 2006.229.11:45:50.26#ibcon#end of sib2, iclass 18, count 2 2006.229.11:45:50.26#ibcon#*mode == 0, iclass 18, count 2 2006.229.11:45:50.26#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.11:45:50.26#ibcon#[25=AT01-08\r\n] 2006.229.11:45:50.26#ibcon#*before write, iclass 18, count 2 2006.229.11:45:50.26#ibcon#enter sib2, iclass 18, count 2 2006.229.11:45:50.26#ibcon#flushed, iclass 18, count 2 2006.229.11:45:50.26#ibcon#about to write, iclass 18, count 2 2006.229.11:45:50.26#ibcon#wrote, iclass 18, count 2 2006.229.11:45:50.26#ibcon#about to read 3, iclass 18, count 2 2006.229.11:45:50.29#ibcon#read 3, iclass 18, count 2 2006.229.11:45:50.29#ibcon#about to read 4, iclass 18, count 2 2006.229.11:45:50.29#ibcon#read 4, iclass 18, count 2 2006.229.11:45:50.29#ibcon#about to read 5, iclass 18, count 2 2006.229.11:45:50.29#ibcon#read 5, iclass 18, count 2 2006.229.11:45:50.29#ibcon#about to read 6, iclass 18, count 2 2006.229.11:45:50.29#ibcon#read 6, iclass 18, count 2 2006.229.11:45:50.29#ibcon#end of sib2, iclass 18, count 2 2006.229.11:45:50.29#ibcon#*after write, iclass 18, count 2 2006.229.11:45:50.29#ibcon#*before return 0, iclass 18, count 2 2006.229.11:45:50.29#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:50.29#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:50.29#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.11:45:50.29#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:50.29#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:50.41#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:50.41#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:50.41#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:45:50.41#ibcon#first serial, iclass 18, count 0 2006.229.11:45:50.41#ibcon#enter sib2, iclass 18, count 0 2006.229.11:45:50.41#ibcon#flushed, iclass 18, count 0 2006.229.11:45:50.41#ibcon#about to write, iclass 18, count 0 2006.229.11:45:50.41#ibcon#wrote, iclass 18, count 0 2006.229.11:45:50.41#ibcon#about to read 3, iclass 18, count 0 2006.229.11:45:50.43#ibcon#read 3, iclass 18, count 0 2006.229.11:45:50.43#ibcon#about to read 4, iclass 18, count 0 2006.229.11:45:50.43#ibcon#read 4, iclass 18, count 0 2006.229.11:45:50.43#ibcon#about to read 5, iclass 18, count 0 2006.229.11:45:50.43#ibcon#read 5, iclass 18, count 0 2006.229.11:45:50.43#ibcon#about to read 6, iclass 18, count 0 2006.229.11:45:50.43#ibcon#read 6, iclass 18, count 0 2006.229.11:45:50.43#ibcon#end of sib2, iclass 18, count 0 2006.229.11:45:50.43#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:45:50.43#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:45:50.43#ibcon#[25=USB\r\n] 2006.229.11:45:50.43#ibcon#*before write, iclass 18, count 0 2006.229.11:45:50.43#ibcon#enter sib2, iclass 18, count 0 2006.229.11:45:50.43#ibcon#flushed, iclass 18, count 0 2006.229.11:45:50.43#ibcon#about to write, iclass 18, count 0 2006.229.11:45:50.43#ibcon#wrote, iclass 18, count 0 2006.229.11:45:50.43#ibcon#about to read 3, iclass 18, count 0 2006.229.11:45:50.46#ibcon#read 3, iclass 18, count 0 2006.229.11:45:50.46#ibcon#about to read 4, iclass 18, count 0 2006.229.11:45:50.46#ibcon#read 4, iclass 18, count 0 2006.229.11:45:50.46#ibcon#about to read 5, iclass 18, count 0 2006.229.11:45:50.46#ibcon#read 5, iclass 18, count 0 2006.229.11:45:50.46#ibcon#about to read 6, iclass 18, count 0 2006.229.11:45:50.46#ibcon#read 6, iclass 18, count 0 2006.229.11:45:50.46#ibcon#end of sib2, iclass 18, count 0 2006.229.11:45:50.46#ibcon#*after write, iclass 18, count 0 2006.229.11:45:50.46#ibcon#*before return 0, iclass 18, count 0 2006.229.11:45:50.46#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:50.46#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:50.46#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:45:50.46#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:45:50.46$vck44/valo=2,534.99 2006.229.11:45:50.46#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.11:45:50.46#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.11:45:50.46#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:50.46#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:45:50.46#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:45:50.46#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:45:50.46#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:45:50.46#ibcon#first serial, iclass 20, count 0 2006.229.11:45:50.46#ibcon#enter sib2, iclass 20, count 0 2006.229.11:45:50.46#ibcon#flushed, iclass 20, count 0 2006.229.11:45:50.46#ibcon#about to write, iclass 20, count 0 2006.229.11:45:50.46#ibcon#wrote, iclass 20, count 0 2006.229.11:45:50.46#ibcon#about to read 3, iclass 20, count 0 2006.229.11:45:50.48#ibcon#read 3, iclass 20, count 0 2006.229.11:45:50.48#ibcon#about to read 4, iclass 20, count 0 2006.229.11:45:50.48#ibcon#read 4, iclass 20, count 0 2006.229.11:45:50.48#ibcon#about to read 5, iclass 20, count 0 2006.229.11:45:50.48#ibcon#read 5, iclass 20, count 0 2006.229.11:45:50.48#ibcon#about to read 6, iclass 20, count 0 2006.229.11:45:50.48#ibcon#read 6, iclass 20, count 0 2006.229.11:45:50.48#ibcon#end of sib2, iclass 20, count 0 2006.229.11:45:50.48#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:45:50.48#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:45:50.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:45:50.48#ibcon#*before write, iclass 20, count 0 2006.229.11:45:50.48#ibcon#enter sib2, iclass 20, count 0 2006.229.11:45:50.48#ibcon#flushed, iclass 20, count 0 2006.229.11:45:50.48#ibcon#about to write, iclass 20, count 0 2006.229.11:45:50.48#ibcon#wrote, iclass 20, count 0 2006.229.11:45:50.48#ibcon#about to read 3, iclass 20, count 0 2006.229.11:45:50.52#ibcon#read 3, iclass 20, count 0 2006.229.11:45:50.52#ibcon#about to read 4, iclass 20, count 0 2006.229.11:45:50.52#ibcon#read 4, iclass 20, count 0 2006.229.11:45:50.52#ibcon#about to read 5, iclass 20, count 0 2006.229.11:45:50.52#ibcon#read 5, iclass 20, count 0 2006.229.11:45:50.52#ibcon#about to read 6, iclass 20, count 0 2006.229.11:45:50.52#ibcon#read 6, iclass 20, count 0 2006.229.11:45:50.52#ibcon#end of sib2, iclass 20, count 0 2006.229.11:45:50.52#ibcon#*after write, iclass 20, count 0 2006.229.11:45:50.52#ibcon#*before return 0, iclass 20, count 0 2006.229.11:45:50.52#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:45:50.52#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:45:50.52#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:45:50.52#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:45:50.52$vck44/va=2,7 2006.229.11:45:50.52#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.11:45:50.52#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.11:45:50.52#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:50.52#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:45:50.58#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:45:50.58#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:45:50.58#ibcon#enter wrdev, iclass 22, count 2 2006.229.11:45:50.58#ibcon#first serial, iclass 22, count 2 2006.229.11:45:50.58#ibcon#enter sib2, iclass 22, count 2 2006.229.11:45:50.58#ibcon#flushed, iclass 22, count 2 2006.229.11:45:50.58#ibcon#about to write, iclass 22, count 2 2006.229.11:45:50.58#ibcon#wrote, iclass 22, count 2 2006.229.11:45:50.58#ibcon#about to read 3, iclass 22, count 2 2006.229.11:45:50.60#ibcon#read 3, iclass 22, count 2 2006.229.11:45:50.60#ibcon#about to read 4, iclass 22, count 2 2006.229.11:45:50.60#ibcon#read 4, iclass 22, count 2 2006.229.11:45:50.60#ibcon#about to read 5, iclass 22, count 2 2006.229.11:45:50.60#ibcon#read 5, iclass 22, count 2 2006.229.11:45:50.60#ibcon#about to read 6, iclass 22, count 2 2006.229.11:45:50.60#ibcon#read 6, iclass 22, count 2 2006.229.11:45:50.60#ibcon#end of sib2, iclass 22, count 2 2006.229.11:45:50.60#ibcon#*mode == 0, iclass 22, count 2 2006.229.11:45:50.60#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.11:45:50.60#ibcon#[25=AT02-07\r\n] 2006.229.11:45:50.60#ibcon#*before write, iclass 22, count 2 2006.229.11:45:50.60#ibcon#enter sib2, iclass 22, count 2 2006.229.11:45:50.60#ibcon#flushed, iclass 22, count 2 2006.229.11:45:50.60#ibcon#about to write, iclass 22, count 2 2006.229.11:45:50.60#ibcon#wrote, iclass 22, count 2 2006.229.11:45:50.60#ibcon#about to read 3, iclass 22, count 2 2006.229.11:45:50.63#ibcon#read 3, iclass 22, count 2 2006.229.11:45:50.63#ibcon#about to read 4, iclass 22, count 2 2006.229.11:45:50.63#ibcon#read 4, iclass 22, count 2 2006.229.11:45:50.63#ibcon#about to read 5, iclass 22, count 2 2006.229.11:45:50.63#ibcon#read 5, iclass 22, count 2 2006.229.11:45:50.63#ibcon#about to read 6, iclass 22, count 2 2006.229.11:45:50.63#ibcon#read 6, iclass 22, count 2 2006.229.11:45:50.63#ibcon#end of sib2, iclass 22, count 2 2006.229.11:45:50.63#ibcon#*after write, iclass 22, count 2 2006.229.11:45:50.63#ibcon#*before return 0, iclass 22, count 2 2006.229.11:45:50.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:45:50.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:45:50.63#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.11:45:50.63#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:50.63#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:45:50.75#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:45:50.75#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:45:50.75#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:45:50.75#ibcon#first serial, iclass 22, count 0 2006.229.11:45:50.75#ibcon#enter sib2, iclass 22, count 0 2006.229.11:45:50.75#ibcon#flushed, iclass 22, count 0 2006.229.11:45:50.75#ibcon#about to write, iclass 22, count 0 2006.229.11:45:50.75#ibcon#wrote, iclass 22, count 0 2006.229.11:45:50.75#ibcon#about to read 3, iclass 22, count 0 2006.229.11:45:50.77#ibcon#read 3, iclass 22, count 0 2006.229.11:45:50.77#ibcon#about to read 4, iclass 22, count 0 2006.229.11:45:50.77#ibcon#read 4, iclass 22, count 0 2006.229.11:45:50.77#ibcon#about to read 5, iclass 22, count 0 2006.229.11:45:50.77#ibcon#read 5, iclass 22, count 0 2006.229.11:45:50.77#ibcon#about to read 6, iclass 22, count 0 2006.229.11:45:50.77#ibcon#read 6, iclass 22, count 0 2006.229.11:45:50.77#ibcon#end of sib2, iclass 22, count 0 2006.229.11:45:50.77#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:45:50.77#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:45:50.77#ibcon#[25=USB\r\n] 2006.229.11:45:50.77#ibcon#*before write, iclass 22, count 0 2006.229.11:45:50.77#ibcon#enter sib2, iclass 22, count 0 2006.229.11:45:50.77#ibcon#flushed, iclass 22, count 0 2006.229.11:45:50.77#ibcon#about to write, iclass 22, count 0 2006.229.11:45:50.77#ibcon#wrote, iclass 22, count 0 2006.229.11:45:50.77#ibcon#about to read 3, iclass 22, count 0 2006.229.11:45:50.80#ibcon#read 3, iclass 22, count 0 2006.229.11:45:50.80#ibcon#about to read 4, iclass 22, count 0 2006.229.11:45:50.80#ibcon#read 4, iclass 22, count 0 2006.229.11:45:50.80#ibcon#about to read 5, iclass 22, count 0 2006.229.11:45:50.80#ibcon#read 5, iclass 22, count 0 2006.229.11:45:50.80#ibcon#about to read 6, iclass 22, count 0 2006.229.11:45:50.80#ibcon#read 6, iclass 22, count 0 2006.229.11:45:50.80#ibcon#end of sib2, iclass 22, count 0 2006.229.11:45:50.80#ibcon#*after write, iclass 22, count 0 2006.229.11:45:50.80#ibcon#*before return 0, iclass 22, count 0 2006.229.11:45:50.80#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:45:50.80#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:45:50.80#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:45:50.80#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:45:50.80$vck44/valo=3,564.99 2006.229.11:45:50.80#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.11:45:50.80#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.11:45:50.80#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:50.80#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:45:50.80#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:45:50.80#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:45:50.80#ibcon#enter wrdev, iclass 24, count 0 2006.229.11:45:50.80#ibcon#first serial, iclass 24, count 0 2006.229.11:45:50.80#ibcon#enter sib2, iclass 24, count 0 2006.229.11:45:50.80#ibcon#flushed, iclass 24, count 0 2006.229.11:45:50.80#ibcon#about to write, iclass 24, count 0 2006.229.11:45:50.80#ibcon#wrote, iclass 24, count 0 2006.229.11:45:50.80#ibcon#about to read 3, iclass 24, count 0 2006.229.11:45:50.82#ibcon#read 3, iclass 24, count 0 2006.229.11:45:50.82#ibcon#about to read 4, iclass 24, count 0 2006.229.11:45:50.82#ibcon#read 4, iclass 24, count 0 2006.229.11:45:50.82#ibcon#about to read 5, iclass 24, count 0 2006.229.11:45:50.82#ibcon#read 5, iclass 24, count 0 2006.229.11:45:50.82#ibcon#about to read 6, iclass 24, count 0 2006.229.11:45:50.82#ibcon#read 6, iclass 24, count 0 2006.229.11:45:50.82#ibcon#end of sib2, iclass 24, count 0 2006.229.11:45:50.82#ibcon#*mode == 0, iclass 24, count 0 2006.229.11:45:50.82#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.11:45:50.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:45:50.82#ibcon#*before write, iclass 24, count 0 2006.229.11:45:50.82#ibcon#enter sib2, iclass 24, count 0 2006.229.11:45:50.82#ibcon#flushed, iclass 24, count 0 2006.229.11:45:50.82#ibcon#about to write, iclass 24, count 0 2006.229.11:45:50.82#ibcon#wrote, iclass 24, count 0 2006.229.11:45:50.82#ibcon#about to read 3, iclass 24, count 0 2006.229.11:45:50.86#ibcon#read 3, iclass 24, count 0 2006.229.11:45:50.86#ibcon#about to read 4, iclass 24, count 0 2006.229.11:45:50.86#ibcon#read 4, iclass 24, count 0 2006.229.11:45:50.86#ibcon#about to read 5, iclass 24, count 0 2006.229.11:45:50.86#ibcon#read 5, iclass 24, count 0 2006.229.11:45:50.86#ibcon#about to read 6, iclass 24, count 0 2006.229.11:45:50.86#ibcon#read 6, iclass 24, count 0 2006.229.11:45:50.86#ibcon#end of sib2, iclass 24, count 0 2006.229.11:45:50.86#ibcon#*after write, iclass 24, count 0 2006.229.11:45:50.86#ibcon#*before return 0, iclass 24, count 0 2006.229.11:45:50.86#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:45:50.86#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.11:45:50.86#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.11:45:50.86#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.11:45:50.86$vck44/va=3,6 2006.229.11:45:50.86#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.11:45:50.86#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.11:45:50.86#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:50.86#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:45:50.92#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:45:50.92#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:45:50.92#ibcon#enter wrdev, iclass 26, count 2 2006.229.11:45:50.92#ibcon#first serial, iclass 26, count 2 2006.229.11:45:50.92#ibcon#enter sib2, iclass 26, count 2 2006.229.11:45:50.92#ibcon#flushed, iclass 26, count 2 2006.229.11:45:50.92#ibcon#about to write, iclass 26, count 2 2006.229.11:45:50.92#ibcon#wrote, iclass 26, count 2 2006.229.11:45:50.92#ibcon#about to read 3, iclass 26, count 2 2006.229.11:45:50.94#ibcon#read 3, iclass 26, count 2 2006.229.11:45:50.94#ibcon#about to read 4, iclass 26, count 2 2006.229.11:45:50.94#ibcon#read 4, iclass 26, count 2 2006.229.11:45:50.94#ibcon#about to read 5, iclass 26, count 2 2006.229.11:45:50.94#ibcon#read 5, iclass 26, count 2 2006.229.11:45:50.94#ibcon#about to read 6, iclass 26, count 2 2006.229.11:45:50.94#ibcon#read 6, iclass 26, count 2 2006.229.11:45:50.94#ibcon#end of sib2, iclass 26, count 2 2006.229.11:45:50.94#ibcon#*mode == 0, iclass 26, count 2 2006.229.11:45:50.94#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.11:45:50.94#ibcon#[25=AT03-06\r\n] 2006.229.11:45:50.94#ibcon#*before write, iclass 26, count 2 2006.229.11:45:50.94#ibcon#enter sib2, iclass 26, count 2 2006.229.11:45:50.94#ibcon#flushed, iclass 26, count 2 2006.229.11:45:50.94#ibcon#about to write, iclass 26, count 2 2006.229.11:45:50.94#ibcon#wrote, iclass 26, count 2 2006.229.11:45:50.94#ibcon#about to read 3, iclass 26, count 2 2006.229.11:45:50.97#ibcon#read 3, iclass 26, count 2 2006.229.11:45:50.97#ibcon#about to read 4, iclass 26, count 2 2006.229.11:45:50.97#ibcon#read 4, iclass 26, count 2 2006.229.11:45:50.97#ibcon#about to read 5, iclass 26, count 2 2006.229.11:45:50.97#ibcon#read 5, iclass 26, count 2 2006.229.11:45:50.97#ibcon#about to read 6, iclass 26, count 2 2006.229.11:45:50.97#ibcon#read 6, iclass 26, count 2 2006.229.11:45:50.97#ibcon#end of sib2, iclass 26, count 2 2006.229.11:45:50.97#ibcon#*after write, iclass 26, count 2 2006.229.11:45:50.97#ibcon#*before return 0, iclass 26, count 2 2006.229.11:45:50.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:45:50.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.11:45:50.97#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.11:45:50.97#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:50.97#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:45:51.09#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:45:51.09#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:45:51.09#ibcon#enter wrdev, iclass 26, count 0 2006.229.11:45:51.09#ibcon#first serial, iclass 26, count 0 2006.229.11:45:51.09#ibcon#enter sib2, iclass 26, count 0 2006.229.11:45:51.09#ibcon#flushed, iclass 26, count 0 2006.229.11:45:51.09#ibcon#about to write, iclass 26, count 0 2006.229.11:45:51.09#ibcon#wrote, iclass 26, count 0 2006.229.11:45:51.09#ibcon#about to read 3, iclass 26, count 0 2006.229.11:45:51.11#ibcon#read 3, iclass 26, count 0 2006.229.11:45:51.11#ibcon#about to read 4, iclass 26, count 0 2006.229.11:45:51.11#ibcon#read 4, iclass 26, count 0 2006.229.11:45:51.11#ibcon#about to read 5, iclass 26, count 0 2006.229.11:45:51.11#ibcon#read 5, iclass 26, count 0 2006.229.11:45:51.11#ibcon#about to read 6, iclass 26, count 0 2006.229.11:45:51.11#ibcon#read 6, iclass 26, count 0 2006.229.11:45:51.11#ibcon#end of sib2, iclass 26, count 0 2006.229.11:45:51.11#ibcon#*mode == 0, iclass 26, count 0 2006.229.11:45:51.11#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.11:45:51.11#ibcon#[25=USB\r\n] 2006.229.11:45:51.11#ibcon#*before write, iclass 26, count 0 2006.229.11:45:51.11#ibcon#enter sib2, iclass 26, count 0 2006.229.11:45:51.11#ibcon#flushed, iclass 26, count 0 2006.229.11:45:51.11#ibcon#about to write, iclass 26, count 0 2006.229.11:45:51.11#ibcon#wrote, iclass 26, count 0 2006.229.11:45:51.11#ibcon#about to read 3, iclass 26, count 0 2006.229.11:45:51.14#ibcon#read 3, iclass 26, count 0 2006.229.11:45:51.14#ibcon#about to read 4, iclass 26, count 0 2006.229.11:45:51.14#ibcon#read 4, iclass 26, count 0 2006.229.11:45:51.14#ibcon#about to read 5, iclass 26, count 0 2006.229.11:45:51.14#ibcon#read 5, iclass 26, count 0 2006.229.11:45:51.14#ibcon#about to read 6, iclass 26, count 0 2006.229.11:45:51.14#ibcon#read 6, iclass 26, count 0 2006.229.11:45:51.14#ibcon#end of sib2, iclass 26, count 0 2006.229.11:45:51.14#ibcon#*after write, iclass 26, count 0 2006.229.11:45:51.14#ibcon#*before return 0, iclass 26, count 0 2006.229.11:45:51.14#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:45:51.14#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.11:45:51.14#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.11:45:51.14#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.11:45:51.14$vck44/valo=4,624.99 2006.229.11:45:51.14#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.11:45:51.14#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.11:45:51.14#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:51.14#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:51.14#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:51.14#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:51.14#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:45:51.14#ibcon#first serial, iclass 28, count 0 2006.229.11:45:51.14#ibcon#enter sib2, iclass 28, count 0 2006.229.11:45:51.14#ibcon#flushed, iclass 28, count 0 2006.229.11:45:51.14#ibcon#about to write, iclass 28, count 0 2006.229.11:45:51.14#ibcon#wrote, iclass 28, count 0 2006.229.11:45:51.14#ibcon#about to read 3, iclass 28, count 0 2006.229.11:45:51.16#ibcon#read 3, iclass 28, count 0 2006.229.11:45:51.16#ibcon#about to read 4, iclass 28, count 0 2006.229.11:45:51.16#ibcon#read 4, iclass 28, count 0 2006.229.11:45:51.16#ibcon#about to read 5, iclass 28, count 0 2006.229.11:45:51.16#ibcon#read 5, iclass 28, count 0 2006.229.11:45:51.16#ibcon#about to read 6, iclass 28, count 0 2006.229.11:45:51.16#ibcon#read 6, iclass 28, count 0 2006.229.11:45:51.16#ibcon#end of sib2, iclass 28, count 0 2006.229.11:45:51.16#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:45:51.16#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:45:51.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:45:51.16#ibcon#*before write, iclass 28, count 0 2006.229.11:45:51.16#ibcon#enter sib2, iclass 28, count 0 2006.229.11:45:51.16#ibcon#flushed, iclass 28, count 0 2006.229.11:45:51.16#ibcon#about to write, iclass 28, count 0 2006.229.11:45:51.16#ibcon#wrote, iclass 28, count 0 2006.229.11:45:51.16#ibcon#about to read 3, iclass 28, count 0 2006.229.11:45:51.20#ibcon#read 3, iclass 28, count 0 2006.229.11:45:51.20#ibcon#about to read 4, iclass 28, count 0 2006.229.11:45:51.20#ibcon#read 4, iclass 28, count 0 2006.229.11:45:51.20#ibcon#about to read 5, iclass 28, count 0 2006.229.11:45:51.20#ibcon#read 5, iclass 28, count 0 2006.229.11:45:51.20#ibcon#about to read 6, iclass 28, count 0 2006.229.11:45:51.20#ibcon#read 6, iclass 28, count 0 2006.229.11:45:51.20#ibcon#end of sib2, iclass 28, count 0 2006.229.11:45:51.20#ibcon#*after write, iclass 28, count 0 2006.229.11:45:51.20#ibcon#*before return 0, iclass 28, count 0 2006.229.11:45:51.20#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:51.20#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:51.20#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:45:51.20#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:45:51.20$vck44/va=4,7 2006.229.11:45:51.20#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.11:45:51.20#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.11:45:51.20#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:51.20#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:51.26#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:51.26#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:51.26#ibcon#enter wrdev, iclass 30, count 2 2006.229.11:45:51.26#ibcon#first serial, iclass 30, count 2 2006.229.11:45:51.26#ibcon#enter sib2, iclass 30, count 2 2006.229.11:45:51.26#ibcon#flushed, iclass 30, count 2 2006.229.11:45:51.26#ibcon#about to write, iclass 30, count 2 2006.229.11:45:51.26#ibcon#wrote, iclass 30, count 2 2006.229.11:45:51.26#ibcon#about to read 3, iclass 30, count 2 2006.229.11:45:51.28#ibcon#read 3, iclass 30, count 2 2006.229.11:45:51.28#ibcon#about to read 4, iclass 30, count 2 2006.229.11:45:51.28#ibcon#read 4, iclass 30, count 2 2006.229.11:45:51.28#ibcon#about to read 5, iclass 30, count 2 2006.229.11:45:51.28#ibcon#read 5, iclass 30, count 2 2006.229.11:45:51.28#ibcon#about to read 6, iclass 30, count 2 2006.229.11:45:51.28#ibcon#read 6, iclass 30, count 2 2006.229.11:45:51.28#ibcon#end of sib2, iclass 30, count 2 2006.229.11:45:51.28#ibcon#*mode == 0, iclass 30, count 2 2006.229.11:45:51.28#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.11:45:51.28#ibcon#[25=AT04-07\r\n] 2006.229.11:45:51.28#ibcon#*before write, iclass 30, count 2 2006.229.11:45:51.28#ibcon#enter sib2, iclass 30, count 2 2006.229.11:45:51.28#ibcon#flushed, iclass 30, count 2 2006.229.11:45:51.28#ibcon#about to write, iclass 30, count 2 2006.229.11:45:51.28#ibcon#wrote, iclass 30, count 2 2006.229.11:45:51.28#ibcon#about to read 3, iclass 30, count 2 2006.229.11:45:51.31#ibcon#read 3, iclass 30, count 2 2006.229.11:45:51.31#ibcon#about to read 4, iclass 30, count 2 2006.229.11:45:51.31#ibcon#read 4, iclass 30, count 2 2006.229.11:45:51.31#ibcon#about to read 5, iclass 30, count 2 2006.229.11:45:51.31#ibcon#read 5, iclass 30, count 2 2006.229.11:45:51.31#ibcon#about to read 6, iclass 30, count 2 2006.229.11:45:51.31#ibcon#read 6, iclass 30, count 2 2006.229.11:45:51.31#ibcon#end of sib2, iclass 30, count 2 2006.229.11:45:51.31#ibcon#*after write, iclass 30, count 2 2006.229.11:45:51.31#ibcon#*before return 0, iclass 30, count 2 2006.229.11:45:51.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:51.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:51.31#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.11:45:51.31#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:51.31#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:51.43#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:51.43#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:51.43#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:45:51.43#ibcon#first serial, iclass 30, count 0 2006.229.11:45:51.43#ibcon#enter sib2, iclass 30, count 0 2006.229.11:45:51.43#ibcon#flushed, iclass 30, count 0 2006.229.11:45:51.43#ibcon#about to write, iclass 30, count 0 2006.229.11:45:51.43#ibcon#wrote, iclass 30, count 0 2006.229.11:45:51.43#ibcon#about to read 3, iclass 30, count 0 2006.229.11:45:51.45#ibcon#read 3, iclass 30, count 0 2006.229.11:45:51.45#ibcon#about to read 4, iclass 30, count 0 2006.229.11:45:51.45#ibcon#read 4, iclass 30, count 0 2006.229.11:45:51.45#ibcon#about to read 5, iclass 30, count 0 2006.229.11:45:51.45#ibcon#read 5, iclass 30, count 0 2006.229.11:45:51.45#ibcon#about to read 6, iclass 30, count 0 2006.229.11:45:51.45#ibcon#read 6, iclass 30, count 0 2006.229.11:45:51.45#ibcon#end of sib2, iclass 30, count 0 2006.229.11:45:51.45#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:45:51.45#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:45:51.45#ibcon#[25=USB\r\n] 2006.229.11:45:51.45#ibcon#*before write, iclass 30, count 0 2006.229.11:45:51.45#ibcon#enter sib2, iclass 30, count 0 2006.229.11:45:51.45#ibcon#flushed, iclass 30, count 0 2006.229.11:45:51.45#ibcon#about to write, iclass 30, count 0 2006.229.11:45:51.45#ibcon#wrote, iclass 30, count 0 2006.229.11:45:51.45#ibcon#about to read 3, iclass 30, count 0 2006.229.11:45:51.48#ibcon#read 3, iclass 30, count 0 2006.229.11:45:51.48#ibcon#about to read 4, iclass 30, count 0 2006.229.11:45:51.48#ibcon#read 4, iclass 30, count 0 2006.229.11:45:51.48#ibcon#about to read 5, iclass 30, count 0 2006.229.11:45:51.48#ibcon#read 5, iclass 30, count 0 2006.229.11:45:51.48#ibcon#about to read 6, iclass 30, count 0 2006.229.11:45:51.48#ibcon#read 6, iclass 30, count 0 2006.229.11:45:51.48#ibcon#end of sib2, iclass 30, count 0 2006.229.11:45:51.48#ibcon#*after write, iclass 30, count 0 2006.229.11:45:51.48#ibcon#*before return 0, iclass 30, count 0 2006.229.11:45:51.48#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:51.48#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:51.48#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:45:51.48#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:45:51.48$vck44/valo=5,734.99 2006.229.11:45:51.48#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.11:45:51.48#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.11:45:51.48#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:51.48#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:51.48#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:51.48#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:51.48#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:45:51.48#ibcon#first serial, iclass 32, count 0 2006.229.11:45:51.48#ibcon#enter sib2, iclass 32, count 0 2006.229.11:45:51.48#ibcon#flushed, iclass 32, count 0 2006.229.11:45:51.48#ibcon#about to write, iclass 32, count 0 2006.229.11:45:51.48#ibcon#wrote, iclass 32, count 0 2006.229.11:45:51.48#ibcon#about to read 3, iclass 32, count 0 2006.229.11:45:51.50#ibcon#read 3, iclass 32, count 0 2006.229.11:45:51.50#ibcon#about to read 4, iclass 32, count 0 2006.229.11:45:51.50#ibcon#read 4, iclass 32, count 0 2006.229.11:45:51.50#ibcon#about to read 5, iclass 32, count 0 2006.229.11:45:51.50#ibcon#read 5, iclass 32, count 0 2006.229.11:45:51.50#ibcon#about to read 6, iclass 32, count 0 2006.229.11:45:51.50#ibcon#read 6, iclass 32, count 0 2006.229.11:45:51.50#ibcon#end of sib2, iclass 32, count 0 2006.229.11:45:51.50#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:45:51.50#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:45:51.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:45:51.50#ibcon#*before write, iclass 32, count 0 2006.229.11:45:51.50#ibcon#enter sib2, iclass 32, count 0 2006.229.11:45:51.50#ibcon#flushed, iclass 32, count 0 2006.229.11:45:51.50#ibcon#about to write, iclass 32, count 0 2006.229.11:45:51.50#ibcon#wrote, iclass 32, count 0 2006.229.11:45:51.50#ibcon#about to read 3, iclass 32, count 0 2006.229.11:45:51.54#ibcon#read 3, iclass 32, count 0 2006.229.11:45:51.54#ibcon#about to read 4, iclass 32, count 0 2006.229.11:45:51.54#ibcon#read 4, iclass 32, count 0 2006.229.11:45:51.54#ibcon#about to read 5, iclass 32, count 0 2006.229.11:45:51.54#ibcon#read 5, iclass 32, count 0 2006.229.11:45:51.54#ibcon#about to read 6, iclass 32, count 0 2006.229.11:45:51.54#ibcon#read 6, iclass 32, count 0 2006.229.11:45:51.54#ibcon#end of sib2, iclass 32, count 0 2006.229.11:45:51.54#ibcon#*after write, iclass 32, count 0 2006.229.11:45:51.54#ibcon#*before return 0, iclass 32, count 0 2006.229.11:45:51.54#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:51.54#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:51.54#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:45:51.54#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:45:51.54$vck44/va=5,4 2006.229.11:45:51.54#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.11:45:51.54#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.11:45:51.54#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:51.54#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:51.60#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:51.60#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:51.60#ibcon#enter wrdev, iclass 34, count 2 2006.229.11:45:51.60#ibcon#first serial, iclass 34, count 2 2006.229.11:45:51.60#ibcon#enter sib2, iclass 34, count 2 2006.229.11:45:51.60#ibcon#flushed, iclass 34, count 2 2006.229.11:45:51.60#ibcon#about to write, iclass 34, count 2 2006.229.11:45:51.60#ibcon#wrote, iclass 34, count 2 2006.229.11:45:51.60#ibcon#about to read 3, iclass 34, count 2 2006.229.11:45:51.62#ibcon#read 3, iclass 34, count 2 2006.229.11:45:51.62#ibcon#about to read 4, iclass 34, count 2 2006.229.11:45:51.62#ibcon#read 4, iclass 34, count 2 2006.229.11:45:51.62#ibcon#about to read 5, iclass 34, count 2 2006.229.11:45:51.62#ibcon#read 5, iclass 34, count 2 2006.229.11:45:51.62#ibcon#about to read 6, iclass 34, count 2 2006.229.11:45:51.62#ibcon#read 6, iclass 34, count 2 2006.229.11:45:51.62#ibcon#end of sib2, iclass 34, count 2 2006.229.11:45:51.62#ibcon#*mode == 0, iclass 34, count 2 2006.229.11:45:51.62#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.11:45:51.62#ibcon#[25=AT05-04\r\n] 2006.229.11:45:51.62#ibcon#*before write, iclass 34, count 2 2006.229.11:45:51.62#ibcon#enter sib2, iclass 34, count 2 2006.229.11:45:51.62#ibcon#flushed, iclass 34, count 2 2006.229.11:45:51.62#ibcon#about to write, iclass 34, count 2 2006.229.11:45:51.62#ibcon#wrote, iclass 34, count 2 2006.229.11:45:51.62#ibcon#about to read 3, iclass 34, count 2 2006.229.11:45:51.65#ibcon#read 3, iclass 34, count 2 2006.229.11:45:51.65#ibcon#about to read 4, iclass 34, count 2 2006.229.11:45:51.65#ibcon#read 4, iclass 34, count 2 2006.229.11:45:51.65#ibcon#about to read 5, iclass 34, count 2 2006.229.11:45:51.65#ibcon#read 5, iclass 34, count 2 2006.229.11:45:51.65#ibcon#about to read 6, iclass 34, count 2 2006.229.11:45:51.65#ibcon#read 6, iclass 34, count 2 2006.229.11:45:51.65#ibcon#end of sib2, iclass 34, count 2 2006.229.11:45:51.65#ibcon#*after write, iclass 34, count 2 2006.229.11:45:51.65#ibcon#*before return 0, iclass 34, count 2 2006.229.11:45:51.65#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:51.65#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:51.65#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.11:45:51.65#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:51.65#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:51.77#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:51.77#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:51.77#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:45:51.77#ibcon#first serial, iclass 34, count 0 2006.229.11:45:51.77#ibcon#enter sib2, iclass 34, count 0 2006.229.11:45:51.77#ibcon#flushed, iclass 34, count 0 2006.229.11:45:51.77#ibcon#about to write, iclass 34, count 0 2006.229.11:45:51.77#ibcon#wrote, iclass 34, count 0 2006.229.11:45:51.77#ibcon#about to read 3, iclass 34, count 0 2006.229.11:45:51.79#ibcon#read 3, iclass 34, count 0 2006.229.11:45:51.79#ibcon#about to read 4, iclass 34, count 0 2006.229.11:45:51.79#ibcon#read 4, iclass 34, count 0 2006.229.11:45:51.79#ibcon#about to read 5, iclass 34, count 0 2006.229.11:45:51.79#ibcon#read 5, iclass 34, count 0 2006.229.11:45:51.79#ibcon#about to read 6, iclass 34, count 0 2006.229.11:45:51.79#ibcon#read 6, iclass 34, count 0 2006.229.11:45:51.79#ibcon#end of sib2, iclass 34, count 0 2006.229.11:45:51.79#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:45:51.79#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:45:51.79#ibcon#[25=USB\r\n] 2006.229.11:45:51.79#ibcon#*before write, iclass 34, count 0 2006.229.11:45:51.79#ibcon#enter sib2, iclass 34, count 0 2006.229.11:45:51.79#ibcon#flushed, iclass 34, count 0 2006.229.11:45:51.79#ibcon#about to write, iclass 34, count 0 2006.229.11:45:51.79#ibcon#wrote, iclass 34, count 0 2006.229.11:45:51.79#ibcon#about to read 3, iclass 34, count 0 2006.229.11:45:51.82#ibcon#read 3, iclass 34, count 0 2006.229.11:45:51.82#ibcon#about to read 4, iclass 34, count 0 2006.229.11:45:51.82#ibcon#read 4, iclass 34, count 0 2006.229.11:45:51.82#ibcon#about to read 5, iclass 34, count 0 2006.229.11:45:51.82#ibcon#read 5, iclass 34, count 0 2006.229.11:45:51.82#ibcon#about to read 6, iclass 34, count 0 2006.229.11:45:51.82#ibcon#read 6, iclass 34, count 0 2006.229.11:45:51.82#ibcon#end of sib2, iclass 34, count 0 2006.229.11:45:51.82#ibcon#*after write, iclass 34, count 0 2006.229.11:45:51.82#ibcon#*before return 0, iclass 34, count 0 2006.229.11:45:51.82#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:51.82#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:51.82#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:45:51.82#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:45:51.82$vck44/valo=6,814.99 2006.229.11:45:51.82#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.11:45:51.82#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.11:45:51.82#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:51.82#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:51.82#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:51.82#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:51.82#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:45:51.82#ibcon#first serial, iclass 36, count 0 2006.229.11:45:51.82#ibcon#enter sib2, iclass 36, count 0 2006.229.11:45:51.82#ibcon#flushed, iclass 36, count 0 2006.229.11:45:51.82#ibcon#about to write, iclass 36, count 0 2006.229.11:45:51.82#ibcon#wrote, iclass 36, count 0 2006.229.11:45:51.82#ibcon#about to read 3, iclass 36, count 0 2006.229.11:45:51.84#ibcon#read 3, iclass 36, count 0 2006.229.11:45:51.84#ibcon#about to read 4, iclass 36, count 0 2006.229.11:45:51.84#ibcon#read 4, iclass 36, count 0 2006.229.11:45:51.84#ibcon#about to read 5, iclass 36, count 0 2006.229.11:45:51.84#ibcon#read 5, iclass 36, count 0 2006.229.11:45:51.84#ibcon#about to read 6, iclass 36, count 0 2006.229.11:45:51.84#ibcon#read 6, iclass 36, count 0 2006.229.11:45:51.84#ibcon#end of sib2, iclass 36, count 0 2006.229.11:45:51.84#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:45:51.84#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:45:51.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:45:51.84#ibcon#*before write, iclass 36, count 0 2006.229.11:45:51.84#ibcon#enter sib2, iclass 36, count 0 2006.229.11:45:51.84#ibcon#flushed, iclass 36, count 0 2006.229.11:45:51.84#ibcon#about to write, iclass 36, count 0 2006.229.11:45:51.84#ibcon#wrote, iclass 36, count 0 2006.229.11:45:51.84#ibcon#about to read 3, iclass 36, count 0 2006.229.11:45:51.88#ibcon#read 3, iclass 36, count 0 2006.229.11:45:51.88#ibcon#about to read 4, iclass 36, count 0 2006.229.11:45:51.88#ibcon#read 4, iclass 36, count 0 2006.229.11:45:51.88#ibcon#about to read 5, iclass 36, count 0 2006.229.11:45:51.88#ibcon#read 5, iclass 36, count 0 2006.229.11:45:51.88#ibcon#about to read 6, iclass 36, count 0 2006.229.11:45:51.88#ibcon#read 6, iclass 36, count 0 2006.229.11:45:51.88#ibcon#end of sib2, iclass 36, count 0 2006.229.11:45:51.88#ibcon#*after write, iclass 36, count 0 2006.229.11:45:51.88#ibcon#*before return 0, iclass 36, count 0 2006.229.11:45:51.88#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:51.88#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:51.88#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:45:51.88#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:45:51.88$vck44/va=6,4 2006.229.11:45:51.88#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.11:45:51.88#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.11:45:51.88#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:51.88#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:51.94#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:51.94#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:51.94#ibcon#enter wrdev, iclass 38, count 2 2006.229.11:45:51.94#ibcon#first serial, iclass 38, count 2 2006.229.11:45:51.94#ibcon#enter sib2, iclass 38, count 2 2006.229.11:45:51.94#ibcon#flushed, iclass 38, count 2 2006.229.11:45:51.94#ibcon#about to write, iclass 38, count 2 2006.229.11:45:51.94#ibcon#wrote, iclass 38, count 2 2006.229.11:45:51.94#ibcon#about to read 3, iclass 38, count 2 2006.229.11:45:51.96#ibcon#read 3, iclass 38, count 2 2006.229.11:45:51.96#ibcon#about to read 4, iclass 38, count 2 2006.229.11:45:51.96#ibcon#read 4, iclass 38, count 2 2006.229.11:45:51.96#ibcon#about to read 5, iclass 38, count 2 2006.229.11:45:51.96#ibcon#read 5, iclass 38, count 2 2006.229.11:45:51.96#ibcon#about to read 6, iclass 38, count 2 2006.229.11:45:51.96#ibcon#read 6, iclass 38, count 2 2006.229.11:45:51.96#ibcon#end of sib2, iclass 38, count 2 2006.229.11:45:51.96#ibcon#*mode == 0, iclass 38, count 2 2006.229.11:45:51.96#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.11:45:51.96#ibcon#[25=AT06-04\r\n] 2006.229.11:45:51.96#ibcon#*before write, iclass 38, count 2 2006.229.11:45:51.96#ibcon#enter sib2, iclass 38, count 2 2006.229.11:45:51.96#ibcon#flushed, iclass 38, count 2 2006.229.11:45:51.96#ibcon#about to write, iclass 38, count 2 2006.229.11:45:51.96#ibcon#wrote, iclass 38, count 2 2006.229.11:45:51.96#ibcon#about to read 3, iclass 38, count 2 2006.229.11:45:51.99#ibcon#read 3, iclass 38, count 2 2006.229.11:45:51.99#ibcon#about to read 4, iclass 38, count 2 2006.229.11:45:51.99#ibcon#read 4, iclass 38, count 2 2006.229.11:45:51.99#ibcon#about to read 5, iclass 38, count 2 2006.229.11:45:51.99#ibcon#read 5, iclass 38, count 2 2006.229.11:45:51.99#ibcon#about to read 6, iclass 38, count 2 2006.229.11:45:51.99#ibcon#read 6, iclass 38, count 2 2006.229.11:45:51.99#ibcon#end of sib2, iclass 38, count 2 2006.229.11:45:51.99#ibcon#*after write, iclass 38, count 2 2006.229.11:45:51.99#ibcon#*before return 0, iclass 38, count 2 2006.229.11:45:51.99#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:51.99#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:52.00#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.11:45:52.00#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:52.00#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:52.10#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:52.10#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:52.10#ibcon#enter wrdev, iclass 38, count 0 2006.229.11:45:52.10#ibcon#first serial, iclass 38, count 0 2006.229.11:45:52.10#ibcon#enter sib2, iclass 38, count 0 2006.229.11:45:52.10#ibcon#flushed, iclass 38, count 0 2006.229.11:45:52.10#ibcon#about to write, iclass 38, count 0 2006.229.11:45:52.10#ibcon#wrote, iclass 38, count 0 2006.229.11:45:52.10#ibcon#about to read 3, iclass 38, count 0 2006.229.11:45:52.12#ibcon#read 3, iclass 38, count 0 2006.229.11:45:52.12#ibcon#about to read 4, iclass 38, count 0 2006.229.11:45:52.12#ibcon#read 4, iclass 38, count 0 2006.229.11:45:52.12#ibcon#about to read 5, iclass 38, count 0 2006.229.11:45:52.12#ibcon#read 5, iclass 38, count 0 2006.229.11:45:52.12#ibcon#about to read 6, iclass 38, count 0 2006.229.11:45:52.12#ibcon#read 6, iclass 38, count 0 2006.229.11:45:52.12#ibcon#end of sib2, iclass 38, count 0 2006.229.11:45:52.12#ibcon#*mode == 0, iclass 38, count 0 2006.229.11:45:52.12#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.11:45:52.12#ibcon#[25=USB\r\n] 2006.229.11:45:52.12#ibcon#*before write, iclass 38, count 0 2006.229.11:45:52.12#ibcon#enter sib2, iclass 38, count 0 2006.229.11:45:52.12#ibcon#flushed, iclass 38, count 0 2006.229.11:45:52.12#ibcon#about to write, iclass 38, count 0 2006.229.11:45:52.12#ibcon#wrote, iclass 38, count 0 2006.229.11:45:52.12#ibcon#about to read 3, iclass 38, count 0 2006.229.11:45:52.15#ibcon#read 3, iclass 38, count 0 2006.229.11:45:52.15#ibcon#about to read 4, iclass 38, count 0 2006.229.11:45:52.15#ibcon#read 4, iclass 38, count 0 2006.229.11:45:52.15#ibcon#about to read 5, iclass 38, count 0 2006.229.11:45:52.15#ibcon#read 5, iclass 38, count 0 2006.229.11:45:52.15#ibcon#about to read 6, iclass 38, count 0 2006.229.11:45:52.15#ibcon#read 6, iclass 38, count 0 2006.229.11:45:52.15#ibcon#end of sib2, iclass 38, count 0 2006.229.11:45:52.15#ibcon#*after write, iclass 38, count 0 2006.229.11:45:52.15#ibcon#*before return 0, iclass 38, count 0 2006.229.11:45:52.15#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:52.15#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:52.15#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.11:45:52.15#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.11:45:52.15$vck44/valo=7,864.99 2006.229.11:45:52.15#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.11:45:52.15#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.11:45:52.15#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:52.15#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:52.15#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:52.15#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:52.15#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:45:52.15#ibcon#first serial, iclass 40, count 0 2006.229.11:45:52.15#ibcon#enter sib2, iclass 40, count 0 2006.229.11:45:52.15#ibcon#flushed, iclass 40, count 0 2006.229.11:45:52.15#ibcon#about to write, iclass 40, count 0 2006.229.11:45:52.15#ibcon#wrote, iclass 40, count 0 2006.229.11:45:52.15#ibcon#about to read 3, iclass 40, count 0 2006.229.11:45:52.17#ibcon#read 3, iclass 40, count 0 2006.229.11:45:52.17#ibcon#about to read 4, iclass 40, count 0 2006.229.11:45:52.17#ibcon#read 4, iclass 40, count 0 2006.229.11:45:52.17#ibcon#about to read 5, iclass 40, count 0 2006.229.11:45:52.17#ibcon#read 5, iclass 40, count 0 2006.229.11:45:52.17#ibcon#about to read 6, iclass 40, count 0 2006.229.11:45:52.17#ibcon#read 6, iclass 40, count 0 2006.229.11:45:52.17#ibcon#end of sib2, iclass 40, count 0 2006.229.11:45:52.17#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:45:52.17#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:45:52.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:45:52.17#ibcon#*before write, iclass 40, count 0 2006.229.11:45:52.17#ibcon#enter sib2, iclass 40, count 0 2006.229.11:45:52.17#ibcon#flushed, iclass 40, count 0 2006.229.11:45:52.17#ibcon#about to write, iclass 40, count 0 2006.229.11:45:52.17#ibcon#wrote, iclass 40, count 0 2006.229.11:45:52.17#ibcon#about to read 3, iclass 40, count 0 2006.229.11:45:52.21#ibcon#read 3, iclass 40, count 0 2006.229.11:45:52.21#ibcon#about to read 4, iclass 40, count 0 2006.229.11:45:52.21#ibcon#read 4, iclass 40, count 0 2006.229.11:45:52.21#ibcon#about to read 5, iclass 40, count 0 2006.229.11:45:52.21#ibcon#read 5, iclass 40, count 0 2006.229.11:45:52.21#ibcon#about to read 6, iclass 40, count 0 2006.229.11:45:52.21#ibcon#read 6, iclass 40, count 0 2006.229.11:45:52.21#ibcon#end of sib2, iclass 40, count 0 2006.229.11:45:52.21#ibcon#*after write, iclass 40, count 0 2006.229.11:45:52.21#ibcon#*before return 0, iclass 40, count 0 2006.229.11:45:52.21#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:52.21#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:52.21#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:45:52.21#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:45:52.21$vck44/va=7,5 2006.229.11:45:52.21#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.11:45:52.21#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.11:45:52.21#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:52.21#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:52.27#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:52.27#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:52.27#ibcon#enter wrdev, iclass 4, count 2 2006.229.11:45:52.27#ibcon#first serial, iclass 4, count 2 2006.229.11:45:52.27#ibcon#enter sib2, iclass 4, count 2 2006.229.11:45:52.27#ibcon#flushed, iclass 4, count 2 2006.229.11:45:52.27#ibcon#about to write, iclass 4, count 2 2006.229.11:45:52.27#ibcon#wrote, iclass 4, count 2 2006.229.11:45:52.27#ibcon#about to read 3, iclass 4, count 2 2006.229.11:45:52.29#ibcon#read 3, iclass 4, count 2 2006.229.11:45:52.29#ibcon#about to read 4, iclass 4, count 2 2006.229.11:45:52.29#ibcon#read 4, iclass 4, count 2 2006.229.11:45:52.29#ibcon#about to read 5, iclass 4, count 2 2006.229.11:45:52.29#ibcon#read 5, iclass 4, count 2 2006.229.11:45:52.29#ibcon#about to read 6, iclass 4, count 2 2006.229.11:45:52.29#ibcon#read 6, iclass 4, count 2 2006.229.11:45:52.29#ibcon#end of sib2, iclass 4, count 2 2006.229.11:45:52.29#ibcon#*mode == 0, iclass 4, count 2 2006.229.11:45:52.29#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.11:45:52.29#ibcon#[25=AT07-05\r\n] 2006.229.11:45:52.29#ibcon#*before write, iclass 4, count 2 2006.229.11:45:52.29#ibcon#enter sib2, iclass 4, count 2 2006.229.11:45:52.29#ibcon#flushed, iclass 4, count 2 2006.229.11:45:52.29#ibcon#about to write, iclass 4, count 2 2006.229.11:45:52.29#ibcon#wrote, iclass 4, count 2 2006.229.11:45:52.29#ibcon#about to read 3, iclass 4, count 2 2006.229.11:45:52.32#ibcon#read 3, iclass 4, count 2 2006.229.11:45:52.32#ibcon#about to read 4, iclass 4, count 2 2006.229.11:45:52.32#ibcon#read 4, iclass 4, count 2 2006.229.11:45:52.32#ibcon#about to read 5, iclass 4, count 2 2006.229.11:45:52.32#ibcon#read 5, iclass 4, count 2 2006.229.11:45:52.32#ibcon#about to read 6, iclass 4, count 2 2006.229.11:45:52.32#ibcon#read 6, iclass 4, count 2 2006.229.11:45:52.32#ibcon#end of sib2, iclass 4, count 2 2006.229.11:45:52.32#ibcon#*after write, iclass 4, count 2 2006.229.11:45:52.32#ibcon#*before return 0, iclass 4, count 2 2006.229.11:45:52.32#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:52.32#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:52.32#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.11:45:52.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:52.32#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:52.44#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:52.44#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:52.44#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:45:52.44#ibcon#first serial, iclass 4, count 0 2006.229.11:45:52.44#ibcon#enter sib2, iclass 4, count 0 2006.229.11:45:52.44#ibcon#flushed, iclass 4, count 0 2006.229.11:45:52.44#ibcon#about to write, iclass 4, count 0 2006.229.11:45:52.44#ibcon#wrote, iclass 4, count 0 2006.229.11:45:52.44#ibcon#about to read 3, iclass 4, count 0 2006.229.11:45:52.46#ibcon#read 3, iclass 4, count 0 2006.229.11:45:52.46#ibcon#about to read 4, iclass 4, count 0 2006.229.11:45:52.46#ibcon#read 4, iclass 4, count 0 2006.229.11:45:52.46#ibcon#about to read 5, iclass 4, count 0 2006.229.11:45:52.46#ibcon#read 5, iclass 4, count 0 2006.229.11:45:52.46#ibcon#about to read 6, iclass 4, count 0 2006.229.11:45:52.46#ibcon#read 6, iclass 4, count 0 2006.229.11:45:52.46#ibcon#end of sib2, iclass 4, count 0 2006.229.11:45:52.46#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:45:52.46#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:45:52.46#ibcon#[25=USB\r\n] 2006.229.11:45:52.46#ibcon#*before write, iclass 4, count 0 2006.229.11:45:52.46#ibcon#enter sib2, iclass 4, count 0 2006.229.11:45:52.46#ibcon#flushed, iclass 4, count 0 2006.229.11:45:52.46#ibcon#about to write, iclass 4, count 0 2006.229.11:45:52.46#ibcon#wrote, iclass 4, count 0 2006.229.11:45:52.46#ibcon#about to read 3, iclass 4, count 0 2006.229.11:45:52.49#ibcon#read 3, iclass 4, count 0 2006.229.11:45:52.49#ibcon#about to read 4, iclass 4, count 0 2006.229.11:45:52.49#ibcon#read 4, iclass 4, count 0 2006.229.11:45:52.49#ibcon#about to read 5, iclass 4, count 0 2006.229.11:45:52.49#ibcon#read 5, iclass 4, count 0 2006.229.11:45:52.49#ibcon#about to read 6, iclass 4, count 0 2006.229.11:45:52.49#ibcon#read 6, iclass 4, count 0 2006.229.11:45:52.49#ibcon#end of sib2, iclass 4, count 0 2006.229.11:45:52.49#ibcon#*after write, iclass 4, count 0 2006.229.11:45:52.49#ibcon#*before return 0, iclass 4, count 0 2006.229.11:45:52.49#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:52.49#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:52.49#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:45:52.49#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:45:52.49$vck44/valo=8,884.99 2006.229.11:45:52.49#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.11:45:52.49#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.11:45:52.49#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:52.49#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:52.49#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:52.49#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:52.49#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:45:52.49#ibcon#first serial, iclass 6, count 0 2006.229.11:45:52.49#ibcon#enter sib2, iclass 6, count 0 2006.229.11:45:52.49#ibcon#flushed, iclass 6, count 0 2006.229.11:45:52.49#ibcon#about to write, iclass 6, count 0 2006.229.11:45:52.49#ibcon#wrote, iclass 6, count 0 2006.229.11:45:52.49#ibcon#about to read 3, iclass 6, count 0 2006.229.11:45:52.51#ibcon#read 3, iclass 6, count 0 2006.229.11:45:52.51#ibcon#about to read 4, iclass 6, count 0 2006.229.11:45:52.51#ibcon#read 4, iclass 6, count 0 2006.229.11:45:52.51#ibcon#about to read 5, iclass 6, count 0 2006.229.11:45:52.51#ibcon#read 5, iclass 6, count 0 2006.229.11:45:52.51#ibcon#about to read 6, iclass 6, count 0 2006.229.11:45:52.51#ibcon#read 6, iclass 6, count 0 2006.229.11:45:52.51#ibcon#end of sib2, iclass 6, count 0 2006.229.11:45:52.51#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:45:52.51#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:45:52.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:45:52.51#ibcon#*before write, iclass 6, count 0 2006.229.11:45:52.51#ibcon#enter sib2, iclass 6, count 0 2006.229.11:45:52.51#ibcon#flushed, iclass 6, count 0 2006.229.11:45:52.51#ibcon#about to write, iclass 6, count 0 2006.229.11:45:52.51#ibcon#wrote, iclass 6, count 0 2006.229.11:45:52.51#ibcon#about to read 3, iclass 6, count 0 2006.229.11:45:52.55#ibcon#read 3, iclass 6, count 0 2006.229.11:45:52.55#ibcon#about to read 4, iclass 6, count 0 2006.229.11:45:52.55#ibcon#read 4, iclass 6, count 0 2006.229.11:45:52.55#ibcon#about to read 5, iclass 6, count 0 2006.229.11:45:52.55#ibcon#read 5, iclass 6, count 0 2006.229.11:45:52.55#ibcon#about to read 6, iclass 6, count 0 2006.229.11:45:52.55#ibcon#read 6, iclass 6, count 0 2006.229.11:45:52.55#ibcon#end of sib2, iclass 6, count 0 2006.229.11:45:52.55#ibcon#*after write, iclass 6, count 0 2006.229.11:45:52.55#ibcon#*before return 0, iclass 6, count 0 2006.229.11:45:52.55#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:52.55#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:52.55#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:45:52.55#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:45:52.55$vck44/va=8,6 2006.229.11:45:52.55#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.11:45:52.55#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.11:45:52.55#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:52.55#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:52.61#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:52.61#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:52.61#ibcon#enter wrdev, iclass 10, count 2 2006.229.11:45:52.61#ibcon#first serial, iclass 10, count 2 2006.229.11:45:52.61#ibcon#enter sib2, iclass 10, count 2 2006.229.11:45:52.61#ibcon#flushed, iclass 10, count 2 2006.229.11:45:52.61#ibcon#about to write, iclass 10, count 2 2006.229.11:45:52.61#ibcon#wrote, iclass 10, count 2 2006.229.11:45:52.61#ibcon#about to read 3, iclass 10, count 2 2006.229.11:45:52.63#ibcon#read 3, iclass 10, count 2 2006.229.11:45:52.63#ibcon#about to read 4, iclass 10, count 2 2006.229.11:45:52.63#ibcon#read 4, iclass 10, count 2 2006.229.11:45:52.63#ibcon#about to read 5, iclass 10, count 2 2006.229.11:45:52.63#ibcon#read 5, iclass 10, count 2 2006.229.11:45:52.63#ibcon#about to read 6, iclass 10, count 2 2006.229.11:45:52.63#ibcon#read 6, iclass 10, count 2 2006.229.11:45:52.63#ibcon#end of sib2, iclass 10, count 2 2006.229.11:45:52.63#ibcon#*mode == 0, iclass 10, count 2 2006.229.11:45:52.63#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.11:45:52.63#ibcon#[25=AT08-06\r\n] 2006.229.11:45:52.63#ibcon#*before write, iclass 10, count 2 2006.229.11:45:52.63#ibcon#enter sib2, iclass 10, count 2 2006.229.11:45:52.63#ibcon#flushed, iclass 10, count 2 2006.229.11:45:52.63#ibcon#about to write, iclass 10, count 2 2006.229.11:45:52.63#ibcon#wrote, iclass 10, count 2 2006.229.11:45:52.63#ibcon#about to read 3, iclass 10, count 2 2006.229.11:45:52.66#ibcon#read 3, iclass 10, count 2 2006.229.11:45:52.66#ibcon#about to read 4, iclass 10, count 2 2006.229.11:45:52.66#ibcon#read 4, iclass 10, count 2 2006.229.11:45:52.66#ibcon#about to read 5, iclass 10, count 2 2006.229.11:45:52.66#ibcon#read 5, iclass 10, count 2 2006.229.11:45:52.66#ibcon#about to read 6, iclass 10, count 2 2006.229.11:45:52.66#ibcon#read 6, iclass 10, count 2 2006.229.11:45:52.66#ibcon#end of sib2, iclass 10, count 2 2006.229.11:45:52.66#ibcon#*after write, iclass 10, count 2 2006.229.11:45:52.66#ibcon#*before return 0, iclass 10, count 2 2006.229.11:45:52.66#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:52.66#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:52.66#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.11:45:52.66#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:52.66#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:52.78#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:52.78#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:52.78#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:45:52.78#ibcon#first serial, iclass 10, count 0 2006.229.11:45:52.78#ibcon#enter sib2, iclass 10, count 0 2006.229.11:45:52.78#ibcon#flushed, iclass 10, count 0 2006.229.11:45:52.78#ibcon#about to write, iclass 10, count 0 2006.229.11:45:52.78#ibcon#wrote, iclass 10, count 0 2006.229.11:45:52.78#ibcon#about to read 3, iclass 10, count 0 2006.229.11:45:52.80#ibcon#read 3, iclass 10, count 0 2006.229.11:45:52.80#ibcon#about to read 4, iclass 10, count 0 2006.229.11:45:52.80#ibcon#read 4, iclass 10, count 0 2006.229.11:45:52.80#ibcon#about to read 5, iclass 10, count 0 2006.229.11:45:52.80#ibcon#read 5, iclass 10, count 0 2006.229.11:45:52.80#ibcon#about to read 6, iclass 10, count 0 2006.229.11:45:52.80#ibcon#read 6, iclass 10, count 0 2006.229.11:45:52.80#ibcon#end of sib2, iclass 10, count 0 2006.229.11:45:52.80#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:45:52.80#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:45:52.80#ibcon#[25=USB\r\n] 2006.229.11:45:52.80#ibcon#*before write, iclass 10, count 0 2006.229.11:45:52.80#ibcon#enter sib2, iclass 10, count 0 2006.229.11:45:52.80#ibcon#flushed, iclass 10, count 0 2006.229.11:45:52.80#ibcon#about to write, iclass 10, count 0 2006.229.11:45:52.80#ibcon#wrote, iclass 10, count 0 2006.229.11:45:52.80#ibcon#about to read 3, iclass 10, count 0 2006.229.11:45:52.83#ibcon#read 3, iclass 10, count 0 2006.229.11:45:52.83#ibcon#about to read 4, iclass 10, count 0 2006.229.11:45:52.83#ibcon#read 4, iclass 10, count 0 2006.229.11:45:52.83#ibcon#about to read 5, iclass 10, count 0 2006.229.11:45:52.83#ibcon#read 5, iclass 10, count 0 2006.229.11:45:52.83#ibcon#about to read 6, iclass 10, count 0 2006.229.11:45:52.83#ibcon#read 6, iclass 10, count 0 2006.229.11:45:52.83#ibcon#end of sib2, iclass 10, count 0 2006.229.11:45:52.83#ibcon#*after write, iclass 10, count 0 2006.229.11:45:52.83#ibcon#*before return 0, iclass 10, count 0 2006.229.11:45:52.83#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:52.83#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:52.83#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:45:52.83#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:45:52.83$vck44/vblo=1,629.99 2006.229.11:45:52.83#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.11:45:52.83#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.11:45:52.83#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:52.83#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:52.83#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:52.83#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:52.83#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:45:52.83#ibcon#first serial, iclass 12, count 0 2006.229.11:45:52.83#ibcon#enter sib2, iclass 12, count 0 2006.229.11:45:52.83#ibcon#flushed, iclass 12, count 0 2006.229.11:45:52.83#ibcon#about to write, iclass 12, count 0 2006.229.11:45:52.83#ibcon#wrote, iclass 12, count 0 2006.229.11:45:52.83#ibcon#about to read 3, iclass 12, count 0 2006.229.11:45:52.85#ibcon#read 3, iclass 12, count 0 2006.229.11:45:52.85#ibcon#about to read 4, iclass 12, count 0 2006.229.11:45:52.85#ibcon#read 4, iclass 12, count 0 2006.229.11:45:52.85#ibcon#about to read 5, iclass 12, count 0 2006.229.11:45:52.85#ibcon#read 5, iclass 12, count 0 2006.229.11:45:52.85#ibcon#about to read 6, iclass 12, count 0 2006.229.11:45:52.85#ibcon#read 6, iclass 12, count 0 2006.229.11:45:52.85#ibcon#end of sib2, iclass 12, count 0 2006.229.11:45:52.85#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:45:52.85#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:45:52.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:45:52.85#ibcon#*before write, iclass 12, count 0 2006.229.11:45:52.85#ibcon#enter sib2, iclass 12, count 0 2006.229.11:45:52.85#ibcon#flushed, iclass 12, count 0 2006.229.11:45:52.85#ibcon#about to write, iclass 12, count 0 2006.229.11:45:52.85#ibcon#wrote, iclass 12, count 0 2006.229.11:45:52.85#ibcon#about to read 3, iclass 12, count 0 2006.229.11:45:52.89#ibcon#read 3, iclass 12, count 0 2006.229.11:45:52.89#ibcon#about to read 4, iclass 12, count 0 2006.229.11:45:52.89#ibcon#read 4, iclass 12, count 0 2006.229.11:45:52.89#ibcon#about to read 5, iclass 12, count 0 2006.229.11:45:52.89#ibcon#read 5, iclass 12, count 0 2006.229.11:45:52.89#ibcon#about to read 6, iclass 12, count 0 2006.229.11:45:52.89#ibcon#read 6, iclass 12, count 0 2006.229.11:45:52.89#ibcon#end of sib2, iclass 12, count 0 2006.229.11:45:52.89#ibcon#*after write, iclass 12, count 0 2006.229.11:45:52.89#ibcon#*before return 0, iclass 12, count 0 2006.229.11:45:52.89#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:52.89#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:52.89#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:45:52.89#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:45:52.89$vck44/vb=1,4 2006.229.11:45:52.89#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.11:45:52.89#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.11:45:52.89#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:52.89#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:45:52.89#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:45:52.89#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:45:52.89#ibcon#enter wrdev, iclass 14, count 2 2006.229.11:45:52.89#ibcon#first serial, iclass 14, count 2 2006.229.11:45:52.89#ibcon#enter sib2, iclass 14, count 2 2006.229.11:45:52.89#ibcon#flushed, iclass 14, count 2 2006.229.11:45:52.89#ibcon#about to write, iclass 14, count 2 2006.229.11:45:52.89#ibcon#wrote, iclass 14, count 2 2006.229.11:45:52.89#ibcon#about to read 3, iclass 14, count 2 2006.229.11:45:52.91#ibcon#read 3, iclass 14, count 2 2006.229.11:45:52.91#ibcon#about to read 4, iclass 14, count 2 2006.229.11:45:52.91#ibcon#read 4, iclass 14, count 2 2006.229.11:45:52.91#ibcon#about to read 5, iclass 14, count 2 2006.229.11:45:52.91#ibcon#read 5, iclass 14, count 2 2006.229.11:45:52.91#ibcon#about to read 6, iclass 14, count 2 2006.229.11:45:52.91#ibcon#read 6, iclass 14, count 2 2006.229.11:45:52.91#ibcon#end of sib2, iclass 14, count 2 2006.229.11:45:52.91#ibcon#*mode == 0, iclass 14, count 2 2006.229.11:45:52.91#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.11:45:52.91#ibcon#[27=AT01-04\r\n] 2006.229.11:45:52.91#ibcon#*before write, iclass 14, count 2 2006.229.11:45:52.91#ibcon#enter sib2, iclass 14, count 2 2006.229.11:45:52.91#ibcon#flushed, iclass 14, count 2 2006.229.11:45:52.91#ibcon#about to write, iclass 14, count 2 2006.229.11:45:52.91#ibcon#wrote, iclass 14, count 2 2006.229.11:45:52.91#ibcon#about to read 3, iclass 14, count 2 2006.229.11:45:52.94#ibcon#read 3, iclass 14, count 2 2006.229.11:45:52.94#ibcon#about to read 4, iclass 14, count 2 2006.229.11:45:52.94#ibcon#read 4, iclass 14, count 2 2006.229.11:45:52.94#ibcon#about to read 5, iclass 14, count 2 2006.229.11:45:52.94#ibcon#read 5, iclass 14, count 2 2006.229.11:45:52.94#ibcon#about to read 6, iclass 14, count 2 2006.229.11:45:52.94#ibcon#read 6, iclass 14, count 2 2006.229.11:45:52.94#ibcon#end of sib2, iclass 14, count 2 2006.229.11:45:52.94#ibcon#*after write, iclass 14, count 2 2006.229.11:45:52.94#ibcon#*before return 0, iclass 14, count 2 2006.229.11:45:52.94#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:45:52.94#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.11:45:52.94#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.11:45:52.94#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:52.94#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:45:53.06#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:45:53.06#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:45:53.06#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:45:53.06#ibcon#first serial, iclass 14, count 0 2006.229.11:45:53.06#ibcon#enter sib2, iclass 14, count 0 2006.229.11:45:53.06#ibcon#flushed, iclass 14, count 0 2006.229.11:45:53.06#ibcon#about to write, iclass 14, count 0 2006.229.11:45:53.06#ibcon#wrote, iclass 14, count 0 2006.229.11:45:53.06#ibcon#about to read 3, iclass 14, count 0 2006.229.11:45:53.08#ibcon#read 3, iclass 14, count 0 2006.229.11:45:53.08#ibcon#about to read 4, iclass 14, count 0 2006.229.11:45:53.08#ibcon#read 4, iclass 14, count 0 2006.229.11:45:53.08#ibcon#about to read 5, iclass 14, count 0 2006.229.11:45:53.08#ibcon#read 5, iclass 14, count 0 2006.229.11:45:53.08#ibcon#about to read 6, iclass 14, count 0 2006.229.11:45:53.08#ibcon#read 6, iclass 14, count 0 2006.229.11:45:53.08#ibcon#end of sib2, iclass 14, count 0 2006.229.11:45:53.08#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:45:53.08#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:45:53.08#ibcon#[27=USB\r\n] 2006.229.11:45:53.08#ibcon#*before write, iclass 14, count 0 2006.229.11:45:53.08#ibcon#enter sib2, iclass 14, count 0 2006.229.11:45:53.08#ibcon#flushed, iclass 14, count 0 2006.229.11:45:53.08#ibcon#about to write, iclass 14, count 0 2006.229.11:45:53.08#ibcon#wrote, iclass 14, count 0 2006.229.11:45:53.08#ibcon#about to read 3, iclass 14, count 0 2006.229.11:45:53.11#ibcon#read 3, iclass 14, count 0 2006.229.11:45:53.11#ibcon#about to read 4, iclass 14, count 0 2006.229.11:45:53.11#ibcon#read 4, iclass 14, count 0 2006.229.11:45:53.11#ibcon#about to read 5, iclass 14, count 0 2006.229.11:45:53.11#ibcon#read 5, iclass 14, count 0 2006.229.11:45:53.11#ibcon#about to read 6, iclass 14, count 0 2006.229.11:45:53.11#ibcon#read 6, iclass 14, count 0 2006.229.11:45:53.11#ibcon#end of sib2, iclass 14, count 0 2006.229.11:45:53.11#ibcon#*after write, iclass 14, count 0 2006.229.11:45:53.11#ibcon#*before return 0, iclass 14, count 0 2006.229.11:45:53.11#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:45:53.11#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.11:45:53.11#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:45:53.11#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:45:53.11$vck44/vblo=2,634.99 2006.229.11:45:53.11#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.11:45:53.11#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.11:45:53.11#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:53.11#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:53.11#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:53.11#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:53.11#ibcon#enter wrdev, iclass 16, count 0 2006.229.11:45:53.11#ibcon#first serial, iclass 16, count 0 2006.229.11:45:53.11#ibcon#enter sib2, iclass 16, count 0 2006.229.11:45:53.11#ibcon#flushed, iclass 16, count 0 2006.229.11:45:53.11#ibcon#about to write, iclass 16, count 0 2006.229.11:45:53.11#ibcon#wrote, iclass 16, count 0 2006.229.11:45:53.11#ibcon#about to read 3, iclass 16, count 0 2006.229.11:45:53.13#ibcon#read 3, iclass 16, count 0 2006.229.11:45:53.13#ibcon#about to read 4, iclass 16, count 0 2006.229.11:45:53.13#ibcon#read 4, iclass 16, count 0 2006.229.11:45:53.13#ibcon#about to read 5, iclass 16, count 0 2006.229.11:45:53.13#ibcon#read 5, iclass 16, count 0 2006.229.11:45:53.13#ibcon#about to read 6, iclass 16, count 0 2006.229.11:45:53.13#ibcon#read 6, iclass 16, count 0 2006.229.11:45:53.13#ibcon#end of sib2, iclass 16, count 0 2006.229.11:45:53.13#ibcon#*mode == 0, iclass 16, count 0 2006.229.11:45:53.13#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.11:45:53.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:45:53.13#ibcon#*before write, iclass 16, count 0 2006.229.11:45:53.13#ibcon#enter sib2, iclass 16, count 0 2006.229.11:45:53.13#ibcon#flushed, iclass 16, count 0 2006.229.11:45:53.13#ibcon#about to write, iclass 16, count 0 2006.229.11:45:53.13#ibcon#wrote, iclass 16, count 0 2006.229.11:45:53.13#ibcon#about to read 3, iclass 16, count 0 2006.229.11:45:53.17#ibcon#read 3, iclass 16, count 0 2006.229.11:45:53.17#ibcon#about to read 4, iclass 16, count 0 2006.229.11:45:53.17#ibcon#read 4, iclass 16, count 0 2006.229.11:45:53.17#ibcon#about to read 5, iclass 16, count 0 2006.229.11:45:53.17#ibcon#read 5, iclass 16, count 0 2006.229.11:45:53.17#ibcon#about to read 6, iclass 16, count 0 2006.229.11:45:53.17#ibcon#read 6, iclass 16, count 0 2006.229.11:45:53.17#ibcon#end of sib2, iclass 16, count 0 2006.229.11:45:53.17#ibcon#*after write, iclass 16, count 0 2006.229.11:45:53.17#ibcon#*before return 0, iclass 16, count 0 2006.229.11:45:53.17#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:53.17#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.11:45:53.17#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.11:45:53.17#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.11:45:53.17$vck44/vb=2,4 2006.229.11:45:53.17#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.11:45:53.17#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.11:45:53.17#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:53.17#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:53.23#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:53.23#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:53.23#ibcon#enter wrdev, iclass 18, count 2 2006.229.11:45:53.23#ibcon#first serial, iclass 18, count 2 2006.229.11:45:53.23#ibcon#enter sib2, iclass 18, count 2 2006.229.11:45:53.23#ibcon#flushed, iclass 18, count 2 2006.229.11:45:53.23#ibcon#about to write, iclass 18, count 2 2006.229.11:45:53.23#ibcon#wrote, iclass 18, count 2 2006.229.11:45:53.23#ibcon#about to read 3, iclass 18, count 2 2006.229.11:45:53.25#ibcon#read 3, iclass 18, count 2 2006.229.11:45:53.25#ibcon#about to read 4, iclass 18, count 2 2006.229.11:45:53.25#ibcon#read 4, iclass 18, count 2 2006.229.11:45:53.25#ibcon#about to read 5, iclass 18, count 2 2006.229.11:45:53.25#ibcon#read 5, iclass 18, count 2 2006.229.11:45:53.25#ibcon#about to read 6, iclass 18, count 2 2006.229.11:45:53.25#ibcon#read 6, iclass 18, count 2 2006.229.11:45:53.25#ibcon#end of sib2, iclass 18, count 2 2006.229.11:45:53.25#ibcon#*mode == 0, iclass 18, count 2 2006.229.11:45:53.25#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.11:45:53.25#ibcon#[27=AT02-04\r\n] 2006.229.11:45:53.25#ibcon#*before write, iclass 18, count 2 2006.229.11:45:53.25#ibcon#enter sib2, iclass 18, count 2 2006.229.11:45:53.25#ibcon#flushed, iclass 18, count 2 2006.229.11:45:53.25#ibcon#about to write, iclass 18, count 2 2006.229.11:45:53.25#ibcon#wrote, iclass 18, count 2 2006.229.11:45:53.25#ibcon#about to read 3, iclass 18, count 2 2006.229.11:45:53.28#ibcon#read 3, iclass 18, count 2 2006.229.11:45:53.28#ibcon#about to read 4, iclass 18, count 2 2006.229.11:45:53.28#ibcon#read 4, iclass 18, count 2 2006.229.11:45:53.28#ibcon#about to read 5, iclass 18, count 2 2006.229.11:45:53.28#ibcon#read 5, iclass 18, count 2 2006.229.11:45:53.28#ibcon#about to read 6, iclass 18, count 2 2006.229.11:45:53.28#ibcon#read 6, iclass 18, count 2 2006.229.11:45:53.28#ibcon#end of sib2, iclass 18, count 2 2006.229.11:45:53.28#ibcon#*after write, iclass 18, count 2 2006.229.11:45:53.28#ibcon#*before return 0, iclass 18, count 2 2006.229.11:45:53.28#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:53.28#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:45:53.28#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.11:45:53.28#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:53.28#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:53.40#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:53.40#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:53.40#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:45:53.40#ibcon#first serial, iclass 18, count 0 2006.229.11:45:53.40#ibcon#enter sib2, iclass 18, count 0 2006.229.11:45:53.40#ibcon#flushed, iclass 18, count 0 2006.229.11:45:53.40#ibcon#about to write, iclass 18, count 0 2006.229.11:45:53.40#ibcon#wrote, iclass 18, count 0 2006.229.11:45:53.40#ibcon#about to read 3, iclass 18, count 0 2006.229.11:45:53.42#ibcon#read 3, iclass 18, count 0 2006.229.11:45:53.42#ibcon#about to read 4, iclass 18, count 0 2006.229.11:45:53.42#ibcon#read 4, iclass 18, count 0 2006.229.11:45:53.42#ibcon#about to read 5, iclass 18, count 0 2006.229.11:45:53.42#ibcon#read 5, iclass 18, count 0 2006.229.11:45:53.42#ibcon#about to read 6, iclass 18, count 0 2006.229.11:45:53.42#ibcon#read 6, iclass 18, count 0 2006.229.11:45:53.42#ibcon#end of sib2, iclass 18, count 0 2006.229.11:45:53.42#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:45:53.42#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:45:53.42#ibcon#[27=USB\r\n] 2006.229.11:45:53.42#ibcon#*before write, iclass 18, count 0 2006.229.11:45:53.42#ibcon#enter sib2, iclass 18, count 0 2006.229.11:45:53.42#ibcon#flushed, iclass 18, count 0 2006.229.11:45:53.42#ibcon#about to write, iclass 18, count 0 2006.229.11:45:53.42#ibcon#wrote, iclass 18, count 0 2006.229.11:45:53.42#ibcon#about to read 3, iclass 18, count 0 2006.229.11:45:53.45#ibcon#read 3, iclass 18, count 0 2006.229.11:45:53.45#ibcon#about to read 4, iclass 18, count 0 2006.229.11:45:53.45#ibcon#read 4, iclass 18, count 0 2006.229.11:45:53.45#ibcon#about to read 5, iclass 18, count 0 2006.229.11:45:53.45#ibcon#read 5, iclass 18, count 0 2006.229.11:45:53.45#ibcon#about to read 6, iclass 18, count 0 2006.229.11:45:53.45#ibcon#read 6, iclass 18, count 0 2006.229.11:45:53.45#ibcon#end of sib2, iclass 18, count 0 2006.229.11:45:53.45#ibcon#*after write, iclass 18, count 0 2006.229.11:45:53.45#ibcon#*before return 0, iclass 18, count 0 2006.229.11:45:53.45#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:53.45#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:45:53.45#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:45:53.45#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:45:53.45$vck44/vblo=3,649.99 2006.229.11:45:53.45#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.11:45:53.45#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.11:45:53.45#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:53.45#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:45:53.45#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:45:53.45#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:45:53.45#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:45:53.45#ibcon#first serial, iclass 21, count 0 2006.229.11:45:53.45#ibcon#enter sib2, iclass 21, count 0 2006.229.11:45:53.45#ibcon#flushed, iclass 21, count 0 2006.229.11:45:53.45#ibcon#about to write, iclass 21, count 0 2006.229.11:45:53.45#ibcon#wrote, iclass 21, count 0 2006.229.11:45:53.45#ibcon#about to read 3, iclass 21, count 0 2006.229.11:45:53.47#ibcon#read 3, iclass 21, count 0 2006.229.11:45:53.47#ibcon#about to read 4, iclass 21, count 0 2006.229.11:45:53.47#ibcon#read 4, iclass 21, count 0 2006.229.11:45:53.47#ibcon#about to read 5, iclass 21, count 0 2006.229.11:45:53.47#ibcon#read 5, iclass 21, count 0 2006.229.11:45:53.47#ibcon#about to read 6, iclass 21, count 0 2006.229.11:45:53.47#ibcon#read 6, iclass 21, count 0 2006.229.11:45:53.47#ibcon#end of sib2, iclass 21, count 0 2006.229.11:45:53.47#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:45:53.47#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:45:53.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:45:53.47#ibcon#*before write, iclass 21, count 0 2006.229.11:45:53.47#ibcon#enter sib2, iclass 21, count 0 2006.229.11:45:53.47#ibcon#flushed, iclass 21, count 0 2006.229.11:45:53.47#ibcon#about to write, iclass 21, count 0 2006.229.11:45:53.47#ibcon#wrote, iclass 21, count 0 2006.229.11:45:53.47#ibcon#about to read 3, iclass 21, count 0 2006.229.11:45:53.49#abcon#<5=/04 1.5 3.0 27.921001002.3\r\n> 2006.229.11:45:53.51#abcon#{5=INTERFACE CLEAR} 2006.229.11:45:53.51#ibcon#read 3, iclass 21, count 0 2006.229.11:45:53.51#ibcon#about to read 4, iclass 21, count 0 2006.229.11:45:53.51#ibcon#read 4, iclass 21, count 0 2006.229.11:45:53.51#ibcon#about to read 5, iclass 21, count 0 2006.229.11:45:53.51#ibcon#read 5, iclass 21, count 0 2006.229.11:45:53.51#ibcon#about to read 6, iclass 21, count 0 2006.229.11:45:53.51#ibcon#read 6, iclass 21, count 0 2006.229.11:45:53.51#ibcon#end of sib2, iclass 21, count 0 2006.229.11:45:53.51#ibcon#*after write, iclass 21, count 0 2006.229.11:45:53.51#ibcon#*before return 0, iclass 21, count 0 2006.229.11:45:53.51#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:45:53.51#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:45:53.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:45:53.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:45:53.51$vck44/vb=3,4 2006.229.11:45:53.51#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:45:53.51#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:45:53.51#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:53.51#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:45:53.57#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:45:53.57#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:45:53.57#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:45:53.57#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:45:53.57#ibcon#first serial, iclass 25, count 2 2006.229.11:45:53.57#ibcon#enter sib2, iclass 25, count 2 2006.229.11:45:53.57#ibcon#flushed, iclass 25, count 2 2006.229.11:45:53.57#ibcon#about to write, iclass 25, count 2 2006.229.11:45:53.57#ibcon#wrote, iclass 25, count 2 2006.229.11:45:53.57#ibcon#about to read 3, iclass 25, count 2 2006.229.11:45:53.59#ibcon#read 3, iclass 25, count 2 2006.229.11:45:53.59#ibcon#about to read 4, iclass 25, count 2 2006.229.11:45:53.59#ibcon#read 4, iclass 25, count 2 2006.229.11:45:53.59#ibcon#about to read 5, iclass 25, count 2 2006.229.11:45:53.59#ibcon#read 5, iclass 25, count 2 2006.229.11:45:53.59#ibcon#about to read 6, iclass 25, count 2 2006.229.11:45:53.59#ibcon#read 6, iclass 25, count 2 2006.229.11:45:53.59#ibcon#end of sib2, iclass 25, count 2 2006.229.11:45:53.59#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:45:53.59#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:45:53.59#ibcon#[27=AT03-04\r\n] 2006.229.11:45:53.59#ibcon#*before write, iclass 25, count 2 2006.229.11:45:53.59#ibcon#enter sib2, iclass 25, count 2 2006.229.11:45:53.59#ibcon#flushed, iclass 25, count 2 2006.229.11:45:53.59#ibcon#about to write, iclass 25, count 2 2006.229.11:45:53.59#ibcon#wrote, iclass 25, count 2 2006.229.11:45:53.59#ibcon#about to read 3, iclass 25, count 2 2006.229.11:45:53.62#ibcon#read 3, iclass 25, count 2 2006.229.11:45:53.62#ibcon#about to read 4, iclass 25, count 2 2006.229.11:45:53.62#ibcon#read 4, iclass 25, count 2 2006.229.11:45:53.62#ibcon#about to read 5, iclass 25, count 2 2006.229.11:45:53.62#ibcon#read 5, iclass 25, count 2 2006.229.11:45:53.62#ibcon#about to read 6, iclass 25, count 2 2006.229.11:45:53.62#ibcon#read 6, iclass 25, count 2 2006.229.11:45:53.62#ibcon#end of sib2, iclass 25, count 2 2006.229.11:45:53.62#ibcon#*after write, iclass 25, count 2 2006.229.11:45:53.62#ibcon#*before return 0, iclass 25, count 2 2006.229.11:45:53.62#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:45:53.62#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:45:53.62#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:45:53.62#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:53.62#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:45:53.74#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:45:53.74#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:45:53.74#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:45:53.74#ibcon#first serial, iclass 25, count 0 2006.229.11:45:53.74#ibcon#enter sib2, iclass 25, count 0 2006.229.11:45:53.74#ibcon#flushed, iclass 25, count 0 2006.229.11:45:53.74#ibcon#about to write, iclass 25, count 0 2006.229.11:45:53.74#ibcon#wrote, iclass 25, count 0 2006.229.11:45:53.74#ibcon#about to read 3, iclass 25, count 0 2006.229.11:45:53.76#ibcon#read 3, iclass 25, count 0 2006.229.11:45:53.76#ibcon#about to read 4, iclass 25, count 0 2006.229.11:45:53.76#ibcon#read 4, iclass 25, count 0 2006.229.11:45:53.76#ibcon#about to read 5, iclass 25, count 0 2006.229.11:45:53.76#ibcon#read 5, iclass 25, count 0 2006.229.11:45:53.76#ibcon#about to read 6, iclass 25, count 0 2006.229.11:45:53.76#ibcon#read 6, iclass 25, count 0 2006.229.11:45:53.76#ibcon#end of sib2, iclass 25, count 0 2006.229.11:45:53.76#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:45:53.76#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:45:53.76#ibcon#[27=USB\r\n] 2006.229.11:45:53.76#ibcon#*before write, iclass 25, count 0 2006.229.11:45:53.76#ibcon#enter sib2, iclass 25, count 0 2006.229.11:45:53.76#ibcon#flushed, iclass 25, count 0 2006.229.11:45:53.76#ibcon#about to write, iclass 25, count 0 2006.229.11:45:53.76#ibcon#wrote, iclass 25, count 0 2006.229.11:45:53.76#ibcon#about to read 3, iclass 25, count 0 2006.229.11:45:53.79#ibcon#read 3, iclass 25, count 0 2006.229.11:45:53.79#ibcon#about to read 4, iclass 25, count 0 2006.229.11:45:53.79#ibcon#read 4, iclass 25, count 0 2006.229.11:45:53.79#ibcon#about to read 5, iclass 25, count 0 2006.229.11:45:53.79#ibcon#read 5, iclass 25, count 0 2006.229.11:45:53.79#ibcon#about to read 6, iclass 25, count 0 2006.229.11:45:53.79#ibcon#read 6, iclass 25, count 0 2006.229.11:45:53.79#ibcon#end of sib2, iclass 25, count 0 2006.229.11:45:53.79#ibcon#*after write, iclass 25, count 0 2006.229.11:45:53.79#ibcon#*before return 0, iclass 25, count 0 2006.229.11:45:53.79#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:45:53.79#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:45:53.79#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:45:53.79#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:45:53.79$vck44/vblo=4,679.99 2006.229.11:45:53.79#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.11:45:53.79#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.11:45:53.79#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:53.79#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:53.79#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:53.79#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:53.79#ibcon#enter wrdev, iclass 28, count 0 2006.229.11:45:53.79#ibcon#first serial, iclass 28, count 0 2006.229.11:45:53.79#ibcon#enter sib2, iclass 28, count 0 2006.229.11:45:53.79#ibcon#flushed, iclass 28, count 0 2006.229.11:45:53.79#ibcon#about to write, iclass 28, count 0 2006.229.11:45:53.79#ibcon#wrote, iclass 28, count 0 2006.229.11:45:53.79#ibcon#about to read 3, iclass 28, count 0 2006.229.11:45:53.81#ibcon#read 3, iclass 28, count 0 2006.229.11:45:53.81#ibcon#about to read 4, iclass 28, count 0 2006.229.11:45:53.81#ibcon#read 4, iclass 28, count 0 2006.229.11:45:53.81#ibcon#about to read 5, iclass 28, count 0 2006.229.11:45:53.81#ibcon#read 5, iclass 28, count 0 2006.229.11:45:53.81#ibcon#about to read 6, iclass 28, count 0 2006.229.11:45:53.81#ibcon#read 6, iclass 28, count 0 2006.229.11:45:53.81#ibcon#end of sib2, iclass 28, count 0 2006.229.11:45:53.81#ibcon#*mode == 0, iclass 28, count 0 2006.229.11:45:53.81#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.11:45:53.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:45:53.81#ibcon#*before write, iclass 28, count 0 2006.229.11:45:53.81#ibcon#enter sib2, iclass 28, count 0 2006.229.11:45:53.81#ibcon#flushed, iclass 28, count 0 2006.229.11:45:53.81#ibcon#about to write, iclass 28, count 0 2006.229.11:45:53.81#ibcon#wrote, iclass 28, count 0 2006.229.11:45:53.81#ibcon#about to read 3, iclass 28, count 0 2006.229.11:45:53.85#ibcon#read 3, iclass 28, count 0 2006.229.11:45:53.85#ibcon#about to read 4, iclass 28, count 0 2006.229.11:45:53.85#ibcon#read 4, iclass 28, count 0 2006.229.11:45:53.85#ibcon#about to read 5, iclass 28, count 0 2006.229.11:45:53.85#ibcon#read 5, iclass 28, count 0 2006.229.11:45:53.85#ibcon#about to read 6, iclass 28, count 0 2006.229.11:45:53.85#ibcon#read 6, iclass 28, count 0 2006.229.11:45:53.85#ibcon#end of sib2, iclass 28, count 0 2006.229.11:45:53.85#ibcon#*after write, iclass 28, count 0 2006.229.11:45:53.85#ibcon#*before return 0, iclass 28, count 0 2006.229.11:45:53.85#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:53.85#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.11:45:53.85#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.11:45:53.85#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.11:45:53.85$vck44/vb=4,4 2006.229.11:45:53.85#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.11:45:53.85#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.11:45:53.85#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:53.85#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:53.91#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:53.91#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:53.91#ibcon#enter wrdev, iclass 30, count 2 2006.229.11:45:53.91#ibcon#first serial, iclass 30, count 2 2006.229.11:45:53.91#ibcon#enter sib2, iclass 30, count 2 2006.229.11:45:53.91#ibcon#flushed, iclass 30, count 2 2006.229.11:45:53.91#ibcon#about to write, iclass 30, count 2 2006.229.11:45:53.91#ibcon#wrote, iclass 30, count 2 2006.229.11:45:53.91#ibcon#about to read 3, iclass 30, count 2 2006.229.11:45:53.93#ibcon#read 3, iclass 30, count 2 2006.229.11:45:53.93#ibcon#about to read 4, iclass 30, count 2 2006.229.11:45:53.93#ibcon#read 4, iclass 30, count 2 2006.229.11:45:53.93#ibcon#about to read 5, iclass 30, count 2 2006.229.11:45:53.93#ibcon#read 5, iclass 30, count 2 2006.229.11:45:53.93#ibcon#about to read 6, iclass 30, count 2 2006.229.11:45:53.93#ibcon#read 6, iclass 30, count 2 2006.229.11:45:53.93#ibcon#end of sib2, iclass 30, count 2 2006.229.11:45:53.93#ibcon#*mode == 0, iclass 30, count 2 2006.229.11:45:53.93#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.11:45:53.93#ibcon#[27=AT04-04\r\n] 2006.229.11:45:53.93#ibcon#*before write, iclass 30, count 2 2006.229.11:45:53.93#ibcon#enter sib2, iclass 30, count 2 2006.229.11:45:53.93#ibcon#flushed, iclass 30, count 2 2006.229.11:45:53.93#ibcon#about to write, iclass 30, count 2 2006.229.11:45:53.93#ibcon#wrote, iclass 30, count 2 2006.229.11:45:53.93#ibcon#about to read 3, iclass 30, count 2 2006.229.11:45:53.96#ibcon#read 3, iclass 30, count 2 2006.229.11:45:53.96#ibcon#about to read 4, iclass 30, count 2 2006.229.11:45:53.96#ibcon#read 4, iclass 30, count 2 2006.229.11:45:53.96#ibcon#about to read 5, iclass 30, count 2 2006.229.11:45:53.96#ibcon#read 5, iclass 30, count 2 2006.229.11:45:53.96#ibcon#about to read 6, iclass 30, count 2 2006.229.11:45:53.96#ibcon#read 6, iclass 30, count 2 2006.229.11:45:53.96#ibcon#end of sib2, iclass 30, count 2 2006.229.11:45:53.96#ibcon#*after write, iclass 30, count 2 2006.229.11:45:53.96#ibcon#*before return 0, iclass 30, count 2 2006.229.11:45:53.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:53.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.11:45:53.96#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.11:45:53.96#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:53.96#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:54.08#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:54.08#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:54.08#ibcon#enter wrdev, iclass 30, count 0 2006.229.11:45:54.08#ibcon#first serial, iclass 30, count 0 2006.229.11:45:54.08#ibcon#enter sib2, iclass 30, count 0 2006.229.11:45:54.08#ibcon#flushed, iclass 30, count 0 2006.229.11:45:54.08#ibcon#about to write, iclass 30, count 0 2006.229.11:45:54.08#ibcon#wrote, iclass 30, count 0 2006.229.11:45:54.08#ibcon#about to read 3, iclass 30, count 0 2006.229.11:45:54.10#ibcon#read 3, iclass 30, count 0 2006.229.11:45:54.10#ibcon#about to read 4, iclass 30, count 0 2006.229.11:45:54.10#ibcon#read 4, iclass 30, count 0 2006.229.11:45:54.10#ibcon#about to read 5, iclass 30, count 0 2006.229.11:45:54.10#ibcon#read 5, iclass 30, count 0 2006.229.11:45:54.10#ibcon#about to read 6, iclass 30, count 0 2006.229.11:45:54.10#ibcon#read 6, iclass 30, count 0 2006.229.11:45:54.10#ibcon#end of sib2, iclass 30, count 0 2006.229.11:45:54.10#ibcon#*mode == 0, iclass 30, count 0 2006.229.11:45:54.10#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.11:45:54.10#ibcon#[27=USB\r\n] 2006.229.11:45:54.10#ibcon#*before write, iclass 30, count 0 2006.229.11:45:54.10#ibcon#enter sib2, iclass 30, count 0 2006.229.11:45:54.10#ibcon#flushed, iclass 30, count 0 2006.229.11:45:54.10#ibcon#about to write, iclass 30, count 0 2006.229.11:45:54.10#ibcon#wrote, iclass 30, count 0 2006.229.11:45:54.10#ibcon#about to read 3, iclass 30, count 0 2006.229.11:45:54.13#ibcon#read 3, iclass 30, count 0 2006.229.11:45:54.13#ibcon#about to read 4, iclass 30, count 0 2006.229.11:45:54.13#ibcon#read 4, iclass 30, count 0 2006.229.11:45:54.13#ibcon#about to read 5, iclass 30, count 0 2006.229.11:45:54.13#ibcon#read 5, iclass 30, count 0 2006.229.11:45:54.13#ibcon#about to read 6, iclass 30, count 0 2006.229.11:45:54.13#ibcon#read 6, iclass 30, count 0 2006.229.11:45:54.13#ibcon#end of sib2, iclass 30, count 0 2006.229.11:45:54.13#ibcon#*after write, iclass 30, count 0 2006.229.11:45:54.13#ibcon#*before return 0, iclass 30, count 0 2006.229.11:45:54.13#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:54.13#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.11:45:54.13#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.11:45:54.13#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.11:45:54.13$vck44/vblo=5,709.99 2006.229.11:45:54.13#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.11:45:54.13#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.11:45:54.13#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:54.13#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:54.13#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:54.13#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:54.13#ibcon#enter wrdev, iclass 32, count 0 2006.229.11:45:54.13#ibcon#first serial, iclass 32, count 0 2006.229.11:45:54.13#ibcon#enter sib2, iclass 32, count 0 2006.229.11:45:54.13#ibcon#flushed, iclass 32, count 0 2006.229.11:45:54.13#ibcon#about to write, iclass 32, count 0 2006.229.11:45:54.13#ibcon#wrote, iclass 32, count 0 2006.229.11:45:54.13#ibcon#about to read 3, iclass 32, count 0 2006.229.11:45:54.15#ibcon#read 3, iclass 32, count 0 2006.229.11:45:54.15#ibcon#about to read 4, iclass 32, count 0 2006.229.11:45:54.15#ibcon#read 4, iclass 32, count 0 2006.229.11:45:54.15#ibcon#about to read 5, iclass 32, count 0 2006.229.11:45:54.15#ibcon#read 5, iclass 32, count 0 2006.229.11:45:54.15#ibcon#about to read 6, iclass 32, count 0 2006.229.11:45:54.15#ibcon#read 6, iclass 32, count 0 2006.229.11:45:54.15#ibcon#end of sib2, iclass 32, count 0 2006.229.11:45:54.15#ibcon#*mode == 0, iclass 32, count 0 2006.229.11:45:54.15#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.11:45:54.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:45:54.15#ibcon#*before write, iclass 32, count 0 2006.229.11:45:54.15#ibcon#enter sib2, iclass 32, count 0 2006.229.11:45:54.15#ibcon#flushed, iclass 32, count 0 2006.229.11:45:54.15#ibcon#about to write, iclass 32, count 0 2006.229.11:45:54.15#ibcon#wrote, iclass 32, count 0 2006.229.11:45:54.15#ibcon#about to read 3, iclass 32, count 0 2006.229.11:45:54.19#ibcon#read 3, iclass 32, count 0 2006.229.11:45:54.19#ibcon#about to read 4, iclass 32, count 0 2006.229.11:45:54.19#ibcon#read 4, iclass 32, count 0 2006.229.11:45:54.19#ibcon#about to read 5, iclass 32, count 0 2006.229.11:45:54.19#ibcon#read 5, iclass 32, count 0 2006.229.11:45:54.19#ibcon#about to read 6, iclass 32, count 0 2006.229.11:45:54.19#ibcon#read 6, iclass 32, count 0 2006.229.11:45:54.19#ibcon#end of sib2, iclass 32, count 0 2006.229.11:45:54.19#ibcon#*after write, iclass 32, count 0 2006.229.11:45:54.19#ibcon#*before return 0, iclass 32, count 0 2006.229.11:45:54.19#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:54.19#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.11:45:54.19#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.11:45:54.19#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.11:45:54.19$vck44/vb=5,4 2006.229.11:45:54.19#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.11:45:54.19#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.11:45:54.19#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:54.19#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:54.25#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:54.25#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:54.25#ibcon#enter wrdev, iclass 34, count 2 2006.229.11:45:54.25#ibcon#first serial, iclass 34, count 2 2006.229.11:45:54.25#ibcon#enter sib2, iclass 34, count 2 2006.229.11:45:54.25#ibcon#flushed, iclass 34, count 2 2006.229.11:45:54.25#ibcon#about to write, iclass 34, count 2 2006.229.11:45:54.25#ibcon#wrote, iclass 34, count 2 2006.229.11:45:54.25#ibcon#about to read 3, iclass 34, count 2 2006.229.11:45:54.27#ibcon#read 3, iclass 34, count 2 2006.229.11:45:54.27#ibcon#about to read 4, iclass 34, count 2 2006.229.11:45:54.27#ibcon#read 4, iclass 34, count 2 2006.229.11:45:54.27#ibcon#about to read 5, iclass 34, count 2 2006.229.11:45:54.27#ibcon#read 5, iclass 34, count 2 2006.229.11:45:54.27#ibcon#about to read 6, iclass 34, count 2 2006.229.11:45:54.27#ibcon#read 6, iclass 34, count 2 2006.229.11:45:54.27#ibcon#end of sib2, iclass 34, count 2 2006.229.11:45:54.27#ibcon#*mode == 0, iclass 34, count 2 2006.229.11:45:54.27#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.11:45:54.27#ibcon#[27=AT05-04\r\n] 2006.229.11:45:54.27#ibcon#*before write, iclass 34, count 2 2006.229.11:45:54.27#ibcon#enter sib2, iclass 34, count 2 2006.229.11:45:54.27#ibcon#flushed, iclass 34, count 2 2006.229.11:45:54.27#ibcon#about to write, iclass 34, count 2 2006.229.11:45:54.27#ibcon#wrote, iclass 34, count 2 2006.229.11:45:54.27#ibcon#about to read 3, iclass 34, count 2 2006.229.11:45:54.30#ibcon#read 3, iclass 34, count 2 2006.229.11:45:54.30#ibcon#about to read 4, iclass 34, count 2 2006.229.11:45:54.30#ibcon#read 4, iclass 34, count 2 2006.229.11:45:54.30#ibcon#about to read 5, iclass 34, count 2 2006.229.11:45:54.30#ibcon#read 5, iclass 34, count 2 2006.229.11:45:54.30#ibcon#about to read 6, iclass 34, count 2 2006.229.11:45:54.30#ibcon#read 6, iclass 34, count 2 2006.229.11:45:54.30#ibcon#end of sib2, iclass 34, count 2 2006.229.11:45:54.30#ibcon#*after write, iclass 34, count 2 2006.229.11:45:54.30#ibcon#*before return 0, iclass 34, count 2 2006.229.11:45:54.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:54.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.11:45:54.30#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.11:45:54.30#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:54.30#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:54.42#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:54.42#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:54.42#ibcon#enter wrdev, iclass 34, count 0 2006.229.11:45:54.42#ibcon#first serial, iclass 34, count 0 2006.229.11:45:54.42#ibcon#enter sib2, iclass 34, count 0 2006.229.11:45:54.42#ibcon#flushed, iclass 34, count 0 2006.229.11:45:54.42#ibcon#about to write, iclass 34, count 0 2006.229.11:45:54.42#ibcon#wrote, iclass 34, count 0 2006.229.11:45:54.42#ibcon#about to read 3, iclass 34, count 0 2006.229.11:45:54.44#ibcon#read 3, iclass 34, count 0 2006.229.11:45:54.44#ibcon#about to read 4, iclass 34, count 0 2006.229.11:45:54.44#ibcon#read 4, iclass 34, count 0 2006.229.11:45:54.44#ibcon#about to read 5, iclass 34, count 0 2006.229.11:45:54.44#ibcon#read 5, iclass 34, count 0 2006.229.11:45:54.44#ibcon#about to read 6, iclass 34, count 0 2006.229.11:45:54.44#ibcon#read 6, iclass 34, count 0 2006.229.11:45:54.44#ibcon#end of sib2, iclass 34, count 0 2006.229.11:45:54.44#ibcon#*mode == 0, iclass 34, count 0 2006.229.11:45:54.44#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.11:45:54.44#ibcon#[27=USB\r\n] 2006.229.11:45:54.44#ibcon#*before write, iclass 34, count 0 2006.229.11:45:54.44#ibcon#enter sib2, iclass 34, count 0 2006.229.11:45:54.44#ibcon#flushed, iclass 34, count 0 2006.229.11:45:54.44#ibcon#about to write, iclass 34, count 0 2006.229.11:45:54.44#ibcon#wrote, iclass 34, count 0 2006.229.11:45:54.44#ibcon#about to read 3, iclass 34, count 0 2006.229.11:45:54.47#ibcon#read 3, iclass 34, count 0 2006.229.11:45:54.47#ibcon#about to read 4, iclass 34, count 0 2006.229.11:45:54.47#ibcon#read 4, iclass 34, count 0 2006.229.11:45:54.47#ibcon#about to read 5, iclass 34, count 0 2006.229.11:45:54.47#ibcon#read 5, iclass 34, count 0 2006.229.11:45:54.47#ibcon#about to read 6, iclass 34, count 0 2006.229.11:45:54.47#ibcon#read 6, iclass 34, count 0 2006.229.11:45:54.47#ibcon#end of sib2, iclass 34, count 0 2006.229.11:45:54.47#ibcon#*after write, iclass 34, count 0 2006.229.11:45:54.47#ibcon#*before return 0, iclass 34, count 0 2006.229.11:45:54.47#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:54.47#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.11:45:54.47#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.11:45:54.47#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.11:45:54.47$vck44/vblo=6,719.99 2006.229.11:45:54.47#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.11:45:54.47#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.11:45:54.47#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:54.47#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:54.47#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:54.47#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:54.47#ibcon#enter wrdev, iclass 36, count 0 2006.229.11:45:54.47#ibcon#first serial, iclass 36, count 0 2006.229.11:45:54.47#ibcon#enter sib2, iclass 36, count 0 2006.229.11:45:54.47#ibcon#flushed, iclass 36, count 0 2006.229.11:45:54.47#ibcon#about to write, iclass 36, count 0 2006.229.11:45:54.47#ibcon#wrote, iclass 36, count 0 2006.229.11:45:54.47#ibcon#about to read 3, iclass 36, count 0 2006.229.11:45:54.49#ibcon#read 3, iclass 36, count 0 2006.229.11:45:54.49#ibcon#about to read 4, iclass 36, count 0 2006.229.11:45:54.49#ibcon#read 4, iclass 36, count 0 2006.229.11:45:54.49#ibcon#about to read 5, iclass 36, count 0 2006.229.11:45:54.49#ibcon#read 5, iclass 36, count 0 2006.229.11:45:54.49#ibcon#about to read 6, iclass 36, count 0 2006.229.11:45:54.49#ibcon#read 6, iclass 36, count 0 2006.229.11:45:54.49#ibcon#end of sib2, iclass 36, count 0 2006.229.11:45:54.49#ibcon#*mode == 0, iclass 36, count 0 2006.229.11:45:54.49#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.11:45:54.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:45:54.49#ibcon#*before write, iclass 36, count 0 2006.229.11:45:54.49#ibcon#enter sib2, iclass 36, count 0 2006.229.11:45:54.49#ibcon#flushed, iclass 36, count 0 2006.229.11:45:54.49#ibcon#about to write, iclass 36, count 0 2006.229.11:45:54.49#ibcon#wrote, iclass 36, count 0 2006.229.11:45:54.49#ibcon#about to read 3, iclass 36, count 0 2006.229.11:45:54.53#ibcon#read 3, iclass 36, count 0 2006.229.11:45:54.53#ibcon#about to read 4, iclass 36, count 0 2006.229.11:45:54.53#ibcon#read 4, iclass 36, count 0 2006.229.11:45:54.53#ibcon#about to read 5, iclass 36, count 0 2006.229.11:45:54.53#ibcon#read 5, iclass 36, count 0 2006.229.11:45:54.53#ibcon#about to read 6, iclass 36, count 0 2006.229.11:45:54.53#ibcon#read 6, iclass 36, count 0 2006.229.11:45:54.53#ibcon#end of sib2, iclass 36, count 0 2006.229.11:45:54.53#ibcon#*after write, iclass 36, count 0 2006.229.11:45:54.53#ibcon#*before return 0, iclass 36, count 0 2006.229.11:45:54.53#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:54.53#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.11:45:54.53#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.11:45:54.53#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.11:45:54.53$vck44/vb=6,4 2006.229.11:45:54.53#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.11:45:54.53#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.11:45:54.53#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:54.53#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:54.59#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:54.59#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:54.59#ibcon#enter wrdev, iclass 38, count 2 2006.229.11:45:54.59#ibcon#first serial, iclass 38, count 2 2006.229.11:45:54.59#ibcon#enter sib2, iclass 38, count 2 2006.229.11:45:54.59#ibcon#flushed, iclass 38, count 2 2006.229.11:45:54.59#ibcon#about to write, iclass 38, count 2 2006.229.11:45:54.59#ibcon#wrote, iclass 38, count 2 2006.229.11:45:54.59#ibcon#about to read 3, iclass 38, count 2 2006.229.11:45:54.61#ibcon#read 3, iclass 38, count 2 2006.229.11:45:54.61#ibcon#about to read 4, iclass 38, count 2 2006.229.11:45:54.61#ibcon#read 4, iclass 38, count 2 2006.229.11:45:54.61#ibcon#about to read 5, iclass 38, count 2 2006.229.11:45:54.61#ibcon#read 5, iclass 38, count 2 2006.229.11:45:54.61#ibcon#about to read 6, iclass 38, count 2 2006.229.11:45:54.61#ibcon#read 6, iclass 38, count 2 2006.229.11:45:54.61#ibcon#end of sib2, iclass 38, count 2 2006.229.11:45:54.61#ibcon#*mode == 0, iclass 38, count 2 2006.229.11:45:54.61#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.11:45:54.61#ibcon#[27=AT06-04\r\n] 2006.229.11:45:54.61#ibcon#*before write, iclass 38, count 2 2006.229.11:45:54.61#ibcon#enter sib2, iclass 38, count 2 2006.229.11:45:54.61#ibcon#flushed, iclass 38, count 2 2006.229.11:45:54.61#ibcon#about to write, iclass 38, count 2 2006.229.11:45:54.61#ibcon#wrote, iclass 38, count 2 2006.229.11:45:54.61#ibcon#about to read 3, iclass 38, count 2 2006.229.11:45:54.64#ibcon#read 3, iclass 38, count 2 2006.229.11:45:54.64#ibcon#about to read 4, iclass 38, count 2 2006.229.11:45:54.64#ibcon#read 4, iclass 38, count 2 2006.229.11:45:54.64#ibcon#about to read 5, iclass 38, count 2 2006.229.11:45:54.64#ibcon#read 5, iclass 38, count 2 2006.229.11:45:54.64#ibcon#about to read 6, iclass 38, count 2 2006.229.11:45:54.64#ibcon#read 6, iclass 38, count 2 2006.229.11:45:54.64#ibcon#end of sib2, iclass 38, count 2 2006.229.11:45:54.64#ibcon#*after write, iclass 38, count 2 2006.229.11:45:54.64#ibcon#*before return 0, iclass 38, count 2 2006.229.11:45:54.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:54.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.11:45:54.64#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.11:45:54.64#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:54.64#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:54.76#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:54.76#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:54.76#ibcon#enter wrdev, iclass 38, count 0 2006.229.11:45:54.76#ibcon#first serial, iclass 38, count 0 2006.229.11:45:54.76#ibcon#enter sib2, iclass 38, count 0 2006.229.11:45:54.76#ibcon#flushed, iclass 38, count 0 2006.229.11:45:54.76#ibcon#about to write, iclass 38, count 0 2006.229.11:45:54.76#ibcon#wrote, iclass 38, count 0 2006.229.11:45:54.76#ibcon#about to read 3, iclass 38, count 0 2006.229.11:45:54.78#ibcon#read 3, iclass 38, count 0 2006.229.11:45:54.78#ibcon#about to read 4, iclass 38, count 0 2006.229.11:45:54.78#ibcon#read 4, iclass 38, count 0 2006.229.11:45:54.78#ibcon#about to read 5, iclass 38, count 0 2006.229.11:45:54.78#ibcon#read 5, iclass 38, count 0 2006.229.11:45:54.78#ibcon#about to read 6, iclass 38, count 0 2006.229.11:45:54.78#ibcon#read 6, iclass 38, count 0 2006.229.11:45:54.78#ibcon#end of sib2, iclass 38, count 0 2006.229.11:45:54.78#ibcon#*mode == 0, iclass 38, count 0 2006.229.11:45:54.78#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.11:45:54.78#ibcon#[27=USB\r\n] 2006.229.11:45:54.78#ibcon#*before write, iclass 38, count 0 2006.229.11:45:54.78#ibcon#enter sib2, iclass 38, count 0 2006.229.11:45:54.78#ibcon#flushed, iclass 38, count 0 2006.229.11:45:54.78#ibcon#about to write, iclass 38, count 0 2006.229.11:45:54.78#ibcon#wrote, iclass 38, count 0 2006.229.11:45:54.78#ibcon#about to read 3, iclass 38, count 0 2006.229.11:45:54.81#ibcon#read 3, iclass 38, count 0 2006.229.11:45:54.81#ibcon#about to read 4, iclass 38, count 0 2006.229.11:45:54.81#ibcon#read 4, iclass 38, count 0 2006.229.11:45:54.81#ibcon#about to read 5, iclass 38, count 0 2006.229.11:45:54.81#ibcon#read 5, iclass 38, count 0 2006.229.11:45:54.81#ibcon#about to read 6, iclass 38, count 0 2006.229.11:45:54.81#ibcon#read 6, iclass 38, count 0 2006.229.11:45:54.81#ibcon#end of sib2, iclass 38, count 0 2006.229.11:45:54.81#ibcon#*after write, iclass 38, count 0 2006.229.11:45:54.81#ibcon#*before return 0, iclass 38, count 0 2006.229.11:45:54.81#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:54.81#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.11:45:54.81#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.11:45:54.81#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.11:45:54.81$vck44/vblo=7,734.99 2006.229.11:45:54.81#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.11:45:54.81#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.11:45:54.81#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:54.81#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:54.81#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:54.81#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:54.81#ibcon#enter wrdev, iclass 40, count 0 2006.229.11:45:54.81#ibcon#first serial, iclass 40, count 0 2006.229.11:45:54.81#ibcon#enter sib2, iclass 40, count 0 2006.229.11:45:54.81#ibcon#flushed, iclass 40, count 0 2006.229.11:45:54.81#ibcon#about to write, iclass 40, count 0 2006.229.11:45:54.81#ibcon#wrote, iclass 40, count 0 2006.229.11:45:54.81#ibcon#about to read 3, iclass 40, count 0 2006.229.11:45:54.83#ibcon#read 3, iclass 40, count 0 2006.229.11:45:54.83#ibcon#about to read 4, iclass 40, count 0 2006.229.11:45:54.83#ibcon#read 4, iclass 40, count 0 2006.229.11:45:54.83#ibcon#about to read 5, iclass 40, count 0 2006.229.11:45:54.83#ibcon#read 5, iclass 40, count 0 2006.229.11:45:54.83#ibcon#about to read 6, iclass 40, count 0 2006.229.11:45:54.83#ibcon#read 6, iclass 40, count 0 2006.229.11:45:54.83#ibcon#end of sib2, iclass 40, count 0 2006.229.11:45:54.83#ibcon#*mode == 0, iclass 40, count 0 2006.229.11:45:54.83#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.11:45:54.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:45:54.83#ibcon#*before write, iclass 40, count 0 2006.229.11:45:54.83#ibcon#enter sib2, iclass 40, count 0 2006.229.11:45:54.83#ibcon#flushed, iclass 40, count 0 2006.229.11:45:54.83#ibcon#about to write, iclass 40, count 0 2006.229.11:45:54.83#ibcon#wrote, iclass 40, count 0 2006.229.11:45:54.83#ibcon#about to read 3, iclass 40, count 0 2006.229.11:45:54.87#ibcon#read 3, iclass 40, count 0 2006.229.11:45:54.87#ibcon#about to read 4, iclass 40, count 0 2006.229.11:45:54.87#ibcon#read 4, iclass 40, count 0 2006.229.11:45:54.87#ibcon#about to read 5, iclass 40, count 0 2006.229.11:45:54.87#ibcon#read 5, iclass 40, count 0 2006.229.11:45:54.87#ibcon#about to read 6, iclass 40, count 0 2006.229.11:45:54.87#ibcon#read 6, iclass 40, count 0 2006.229.11:45:54.87#ibcon#end of sib2, iclass 40, count 0 2006.229.11:45:54.87#ibcon#*after write, iclass 40, count 0 2006.229.11:45:54.87#ibcon#*before return 0, iclass 40, count 0 2006.229.11:45:54.87#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:54.87#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.11:45:54.87#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.11:45:54.87#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.11:45:54.87$vck44/vb=7,4 2006.229.11:45:54.87#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.11:45:54.87#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.11:45:54.87#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:54.87#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:54.93#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:54.93#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:54.93#ibcon#enter wrdev, iclass 4, count 2 2006.229.11:45:54.93#ibcon#first serial, iclass 4, count 2 2006.229.11:45:54.93#ibcon#enter sib2, iclass 4, count 2 2006.229.11:45:54.93#ibcon#flushed, iclass 4, count 2 2006.229.11:45:54.93#ibcon#about to write, iclass 4, count 2 2006.229.11:45:54.93#ibcon#wrote, iclass 4, count 2 2006.229.11:45:54.93#ibcon#about to read 3, iclass 4, count 2 2006.229.11:45:54.95#ibcon#read 3, iclass 4, count 2 2006.229.11:45:54.95#ibcon#about to read 4, iclass 4, count 2 2006.229.11:45:54.95#ibcon#read 4, iclass 4, count 2 2006.229.11:45:54.95#ibcon#about to read 5, iclass 4, count 2 2006.229.11:45:54.95#ibcon#read 5, iclass 4, count 2 2006.229.11:45:54.95#ibcon#about to read 6, iclass 4, count 2 2006.229.11:45:54.95#ibcon#read 6, iclass 4, count 2 2006.229.11:45:54.95#ibcon#end of sib2, iclass 4, count 2 2006.229.11:45:54.95#ibcon#*mode == 0, iclass 4, count 2 2006.229.11:45:54.95#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.11:45:54.95#ibcon#[27=AT07-04\r\n] 2006.229.11:45:54.95#ibcon#*before write, iclass 4, count 2 2006.229.11:45:54.95#ibcon#enter sib2, iclass 4, count 2 2006.229.11:45:54.95#ibcon#flushed, iclass 4, count 2 2006.229.11:45:54.95#ibcon#about to write, iclass 4, count 2 2006.229.11:45:54.95#ibcon#wrote, iclass 4, count 2 2006.229.11:45:54.95#ibcon#about to read 3, iclass 4, count 2 2006.229.11:45:54.98#ibcon#read 3, iclass 4, count 2 2006.229.11:45:54.98#ibcon#about to read 4, iclass 4, count 2 2006.229.11:45:54.98#ibcon#read 4, iclass 4, count 2 2006.229.11:45:54.98#ibcon#about to read 5, iclass 4, count 2 2006.229.11:45:54.98#ibcon#read 5, iclass 4, count 2 2006.229.11:45:54.98#ibcon#about to read 6, iclass 4, count 2 2006.229.11:45:54.98#ibcon#read 6, iclass 4, count 2 2006.229.11:45:54.98#ibcon#end of sib2, iclass 4, count 2 2006.229.11:45:54.98#ibcon#*after write, iclass 4, count 2 2006.229.11:45:54.98#ibcon#*before return 0, iclass 4, count 2 2006.229.11:45:54.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:54.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.11:45:54.98#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.11:45:54.98#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:54.98#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:55.10#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:55.10#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:55.10#ibcon#enter wrdev, iclass 4, count 0 2006.229.11:45:55.10#ibcon#first serial, iclass 4, count 0 2006.229.11:45:55.10#ibcon#enter sib2, iclass 4, count 0 2006.229.11:45:55.10#ibcon#flushed, iclass 4, count 0 2006.229.11:45:55.10#ibcon#about to write, iclass 4, count 0 2006.229.11:45:55.10#ibcon#wrote, iclass 4, count 0 2006.229.11:45:55.10#ibcon#about to read 3, iclass 4, count 0 2006.229.11:45:55.12#ibcon#read 3, iclass 4, count 0 2006.229.11:45:55.12#ibcon#about to read 4, iclass 4, count 0 2006.229.11:45:55.12#ibcon#read 4, iclass 4, count 0 2006.229.11:45:55.12#ibcon#about to read 5, iclass 4, count 0 2006.229.11:45:55.12#ibcon#read 5, iclass 4, count 0 2006.229.11:45:55.12#ibcon#about to read 6, iclass 4, count 0 2006.229.11:45:55.12#ibcon#read 6, iclass 4, count 0 2006.229.11:45:55.12#ibcon#end of sib2, iclass 4, count 0 2006.229.11:45:55.12#ibcon#*mode == 0, iclass 4, count 0 2006.229.11:45:55.12#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.11:45:55.12#ibcon#[27=USB\r\n] 2006.229.11:45:55.12#ibcon#*before write, iclass 4, count 0 2006.229.11:45:55.12#ibcon#enter sib2, iclass 4, count 0 2006.229.11:45:55.12#ibcon#flushed, iclass 4, count 0 2006.229.11:45:55.12#ibcon#about to write, iclass 4, count 0 2006.229.11:45:55.12#ibcon#wrote, iclass 4, count 0 2006.229.11:45:55.12#ibcon#about to read 3, iclass 4, count 0 2006.229.11:45:55.15#ibcon#read 3, iclass 4, count 0 2006.229.11:45:55.15#ibcon#about to read 4, iclass 4, count 0 2006.229.11:45:55.15#ibcon#read 4, iclass 4, count 0 2006.229.11:45:55.15#ibcon#about to read 5, iclass 4, count 0 2006.229.11:45:55.15#ibcon#read 5, iclass 4, count 0 2006.229.11:45:55.15#ibcon#about to read 6, iclass 4, count 0 2006.229.11:45:55.15#ibcon#read 6, iclass 4, count 0 2006.229.11:45:55.15#ibcon#end of sib2, iclass 4, count 0 2006.229.11:45:55.15#ibcon#*after write, iclass 4, count 0 2006.229.11:45:55.15#ibcon#*before return 0, iclass 4, count 0 2006.229.11:45:55.15#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:55.15#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.11:45:55.15#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.11:45:55.15#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.11:45:55.15$vck44/vblo=8,744.99 2006.229.11:45:55.15#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.11:45:55.15#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.11:45:55.15#ibcon#ireg 17 cls_cnt 0 2006.229.11:45:55.15#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:55.15#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:55.15#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:55.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.11:45:55.15#ibcon#first serial, iclass 6, count 0 2006.229.11:45:55.15#ibcon#enter sib2, iclass 6, count 0 2006.229.11:45:55.15#ibcon#flushed, iclass 6, count 0 2006.229.11:45:55.15#ibcon#about to write, iclass 6, count 0 2006.229.11:45:55.15#ibcon#wrote, iclass 6, count 0 2006.229.11:45:55.15#ibcon#about to read 3, iclass 6, count 0 2006.229.11:45:55.17#ibcon#read 3, iclass 6, count 0 2006.229.11:45:55.17#ibcon#about to read 4, iclass 6, count 0 2006.229.11:45:55.17#ibcon#read 4, iclass 6, count 0 2006.229.11:45:55.17#ibcon#about to read 5, iclass 6, count 0 2006.229.11:45:55.17#ibcon#read 5, iclass 6, count 0 2006.229.11:45:55.17#ibcon#about to read 6, iclass 6, count 0 2006.229.11:45:55.17#ibcon#read 6, iclass 6, count 0 2006.229.11:45:55.17#ibcon#end of sib2, iclass 6, count 0 2006.229.11:45:55.17#ibcon#*mode == 0, iclass 6, count 0 2006.229.11:45:55.17#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.11:45:55.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:45:55.17#ibcon#*before write, iclass 6, count 0 2006.229.11:45:55.17#ibcon#enter sib2, iclass 6, count 0 2006.229.11:45:55.17#ibcon#flushed, iclass 6, count 0 2006.229.11:45:55.17#ibcon#about to write, iclass 6, count 0 2006.229.11:45:55.17#ibcon#wrote, iclass 6, count 0 2006.229.11:45:55.17#ibcon#about to read 3, iclass 6, count 0 2006.229.11:45:55.21#ibcon#read 3, iclass 6, count 0 2006.229.11:45:55.21#ibcon#about to read 4, iclass 6, count 0 2006.229.11:45:55.21#ibcon#read 4, iclass 6, count 0 2006.229.11:45:55.21#ibcon#about to read 5, iclass 6, count 0 2006.229.11:45:55.21#ibcon#read 5, iclass 6, count 0 2006.229.11:45:55.21#ibcon#about to read 6, iclass 6, count 0 2006.229.11:45:55.21#ibcon#read 6, iclass 6, count 0 2006.229.11:45:55.21#ibcon#end of sib2, iclass 6, count 0 2006.229.11:45:55.21#ibcon#*after write, iclass 6, count 0 2006.229.11:45:55.21#ibcon#*before return 0, iclass 6, count 0 2006.229.11:45:55.21#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:55.21#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.11:45:55.21#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.11:45:55.21#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.11:45:55.21$vck44/vb=8,4 2006.229.11:45:55.21#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.11:45:55.21#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.11:45:55.21#ibcon#ireg 11 cls_cnt 2 2006.229.11:45:55.21#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:55.27#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:55.27#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:55.27#ibcon#enter wrdev, iclass 10, count 2 2006.229.11:45:55.27#ibcon#first serial, iclass 10, count 2 2006.229.11:45:55.27#ibcon#enter sib2, iclass 10, count 2 2006.229.11:45:55.27#ibcon#flushed, iclass 10, count 2 2006.229.11:45:55.27#ibcon#about to write, iclass 10, count 2 2006.229.11:45:55.27#ibcon#wrote, iclass 10, count 2 2006.229.11:45:55.27#ibcon#about to read 3, iclass 10, count 2 2006.229.11:45:55.29#ibcon#read 3, iclass 10, count 2 2006.229.11:45:55.29#ibcon#about to read 4, iclass 10, count 2 2006.229.11:45:55.29#ibcon#read 4, iclass 10, count 2 2006.229.11:45:55.29#ibcon#about to read 5, iclass 10, count 2 2006.229.11:45:55.29#ibcon#read 5, iclass 10, count 2 2006.229.11:45:55.29#ibcon#about to read 6, iclass 10, count 2 2006.229.11:45:55.29#ibcon#read 6, iclass 10, count 2 2006.229.11:45:55.29#ibcon#end of sib2, iclass 10, count 2 2006.229.11:45:55.29#ibcon#*mode == 0, iclass 10, count 2 2006.229.11:45:55.29#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.11:45:55.29#ibcon#[27=AT08-04\r\n] 2006.229.11:45:55.29#ibcon#*before write, iclass 10, count 2 2006.229.11:45:55.29#ibcon#enter sib2, iclass 10, count 2 2006.229.11:45:55.29#ibcon#flushed, iclass 10, count 2 2006.229.11:45:55.29#ibcon#about to write, iclass 10, count 2 2006.229.11:45:55.29#ibcon#wrote, iclass 10, count 2 2006.229.11:45:55.29#ibcon#about to read 3, iclass 10, count 2 2006.229.11:45:55.32#ibcon#read 3, iclass 10, count 2 2006.229.11:45:55.32#ibcon#about to read 4, iclass 10, count 2 2006.229.11:45:55.32#ibcon#read 4, iclass 10, count 2 2006.229.11:45:55.32#ibcon#about to read 5, iclass 10, count 2 2006.229.11:45:55.32#ibcon#read 5, iclass 10, count 2 2006.229.11:45:55.32#ibcon#about to read 6, iclass 10, count 2 2006.229.11:45:55.32#ibcon#read 6, iclass 10, count 2 2006.229.11:45:55.32#ibcon#end of sib2, iclass 10, count 2 2006.229.11:45:55.32#ibcon#*after write, iclass 10, count 2 2006.229.11:45:55.32#ibcon#*before return 0, iclass 10, count 2 2006.229.11:45:55.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:55.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.11:45:55.32#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.11:45:55.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:45:55.32#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:55.44#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:55.44#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:55.44#ibcon#enter wrdev, iclass 10, count 0 2006.229.11:45:55.44#ibcon#first serial, iclass 10, count 0 2006.229.11:45:55.44#ibcon#enter sib2, iclass 10, count 0 2006.229.11:45:55.44#ibcon#flushed, iclass 10, count 0 2006.229.11:45:55.44#ibcon#about to write, iclass 10, count 0 2006.229.11:45:55.44#ibcon#wrote, iclass 10, count 0 2006.229.11:45:55.44#ibcon#about to read 3, iclass 10, count 0 2006.229.11:45:55.46#ibcon#read 3, iclass 10, count 0 2006.229.11:45:55.46#ibcon#about to read 4, iclass 10, count 0 2006.229.11:45:55.46#ibcon#read 4, iclass 10, count 0 2006.229.11:45:55.46#ibcon#about to read 5, iclass 10, count 0 2006.229.11:45:55.46#ibcon#read 5, iclass 10, count 0 2006.229.11:45:55.46#ibcon#about to read 6, iclass 10, count 0 2006.229.11:45:55.46#ibcon#read 6, iclass 10, count 0 2006.229.11:45:55.46#ibcon#end of sib2, iclass 10, count 0 2006.229.11:45:55.46#ibcon#*mode == 0, iclass 10, count 0 2006.229.11:45:55.46#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.11:45:55.46#ibcon#[27=USB\r\n] 2006.229.11:45:55.46#ibcon#*before write, iclass 10, count 0 2006.229.11:45:55.46#ibcon#enter sib2, iclass 10, count 0 2006.229.11:45:55.46#ibcon#flushed, iclass 10, count 0 2006.229.11:45:55.46#ibcon#about to write, iclass 10, count 0 2006.229.11:45:55.46#ibcon#wrote, iclass 10, count 0 2006.229.11:45:55.46#ibcon#about to read 3, iclass 10, count 0 2006.229.11:45:55.49#ibcon#read 3, iclass 10, count 0 2006.229.11:45:55.49#ibcon#about to read 4, iclass 10, count 0 2006.229.11:45:55.49#ibcon#read 4, iclass 10, count 0 2006.229.11:45:55.49#ibcon#about to read 5, iclass 10, count 0 2006.229.11:45:55.49#ibcon#read 5, iclass 10, count 0 2006.229.11:45:55.49#ibcon#about to read 6, iclass 10, count 0 2006.229.11:45:55.49#ibcon#read 6, iclass 10, count 0 2006.229.11:45:55.49#ibcon#end of sib2, iclass 10, count 0 2006.229.11:45:55.49#ibcon#*after write, iclass 10, count 0 2006.229.11:45:55.49#ibcon#*before return 0, iclass 10, count 0 2006.229.11:45:55.49#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:55.49#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.11:45:55.49#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.11:45:55.49#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.11:45:55.49$vck44/vabw=wide 2006.229.11:45:55.49#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.11:45:55.49#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.11:45:55.49#ibcon#ireg 8 cls_cnt 0 2006.229.11:45:55.49#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:55.49#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:55.49#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:55.49#ibcon#enter wrdev, iclass 12, count 0 2006.229.11:45:55.49#ibcon#first serial, iclass 12, count 0 2006.229.11:45:55.49#ibcon#enter sib2, iclass 12, count 0 2006.229.11:45:55.49#ibcon#flushed, iclass 12, count 0 2006.229.11:45:55.49#ibcon#about to write, iclass 12, count 0 2006.229.11:45:55.49#ibcon#wrote, iclass 12, count 0 2006.229.11:45:55.49#ibcon#about to read 3, iclass 12, count 0 2006.229.11:45:55.51#ibcon#read 3, iclass 12, count 0 2006.229.11:45:55.51#ibcon#about to read 4, iclass 12, count 0 2006.229.11:45:55.51#ibcon#read 4, iclass 12, count 0 2006.229.11:45:55.51#ibcon#about to read 5, iclass 12, count 0 2006.229.11:45:55.51#ibcon#read 5, iclass 12, count 0 2006.229.11:45:55.51#ibcon#about to read 6, iclass 12, count 0 2006.229.11:45:55.51#ibcon#read 6, iclass 12, count 0 2006.229.11:45:55.51#ibcon#end of sib2, iclass 12, count 0 2006.229.11:45:55.51#ibcon#*mode == 0, iclass 12, count 0 2006.229.11:45:55.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.11:45:55.51#ibcon#[25=BW32\r\n] 2006.229.11:45:55.51#ibcon#*before write, iclass 12, count 0 2006.229.11:45:55.51#ibcon#enter sib2, iclass 12, count 0 2006.229.11:45:55.51#ibcon#flushed, iclass 12, count 0 2006.229.11:45:55.51#ibcon#about to write, iclass 12, count 0 2006.229.11:45:55.51#ibcon#wrote, iclass 12, count 0 2006.229.11:45:55.51#ibcon#about to read 3, iclass 12, count 0 2006.229.11:45:55.54#ibcon#read 3, iclass 12, count 0 2006.229.11:45:55.54#ibcon#about to read 4, iclass 12, count 0 2006.229.11:45:55.54#ibcon#read 4, iclass 12, count 0 2006.229.11:45:55.54#ibcon#about to read 5, iclass 12, count 0 2006.229.11:45:55.54#ibcon#read 5, iclass 12, count 0 2006.229.11:45:55.54#ibcon#about to read 6, iclass 12, count 0 2006.229.11:45:55.54#ibcon#read 6, iclass 12, count 0 2006.229.11:45:55.54#ibcon#end of sib2, iclass 12, count 0 2006.229.11:45:55.54#ibcon#*after write, iclass 12, count 0 2006.229.11:45:55.54#ibcon#*before return 0, iclass 12, count 0 2006.229.11:45:55.54#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:55.54#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.11:45:55.54#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.11:45:55.54#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.11:45:55.54$vck44/vbbw=wide 2006.229.11:45:55.54#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.11:45:55.54#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.11:45:55.54#ibcon#ireg 8 cls_cnt 0 2006.229.11:45:55.54#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:45:55.61#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:45:55.61#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:45:55.61#ibcon#enter wrdev, iclass 14, count 0 2006.229.11:45:55.61#ibcon#first serial, iclass 14, count 0 2006.229.11:45:55.61#ibcon#enter sib2, iclass 14, count 0 2006.229.11:45:55.61#ibcon#flushed, iclass 14, count 0 2006.229.11:45:55.61#ibcon#about to write, iclass 14, count 0 2006.229.11:45:55.61#ibcon#wrote, iclass 14, count 0 2006.229.11:45:55.61#ibcon#about to read 3, iclass 14, count 0 2006.229.11:45:55.63#ibcon#read 3, iclass 14, count 0 2006.229.11:45:55.63#ibcon#about to read 4, iclass 14, count 0 2006.229.11:45:55.63#ibcon#read 4, iclass 14, count 0 2006.229.11:45:55.63#ibcon#about to read 5, iclass 14, count 0 2006.229.11:45:55.63#ibcon#read 5, iclass 14, count 0 2006.229.11:45:55.63#ibcon#about to read 6, iclass 14, count 0 2006.229.11:45:55.63#ibcon#read 6, iclass 14, count 0 2006.229.11:45:55.63#ibcon#end of sib2, iclass 14, count 0 2006.229.11:45:55.63#ibcon#*mode == 0, iclass 14, count 0 2006.229.11:45:55.63#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.11:45:55.63#ibcon#[27=BW32\r\n] 2006.229.11:45:55.63#ibcon#*before write, iclass 14, count 0 2006.229.11:45:55.63#ibcon#enter sib2, iclass 14, count 0 2006.229.11:45:55.63#ibcon#flushed, iclass 14, count 0 2006.229.11:45:55.63#ibcon#about to write, iclass 14, count 0 2006.229.11:45:55.63#ibcon#wrote, iclass 14, count 0 2006.229.11:45:55.63#ibcon#about to read 3, iclass 14, count 0 2006.229.11:45:55.66#ibcon#read 3, iclass 14, count 0 2006.229.11:45:55.66#ibcon#about to read 4, iclass 14, count 0 2006.229.11:45:55.66#ibcon#read 4, iclass 14, count 0 2006.229.11:45:55.66#ibcon#about to read 5, iclass 14, count 0 2006.229.11:45:55.66#ibcon#read 5, iclass 14, count 0 2006.229.11:45:55.66#ibcon#about to read 6, iclass 14, count 0 2006.229.11:45:55.66#ibcon#read 6, iclass 14, count 0 2006.229.11:45:55.66#ibcon#end of sib2, iclass 14, count 0 2006.229.11:45:55.66#ibcon#*after write, iclass 14, count 0 2006.229.11:45:55.66#ibcon#*before return 0, iclass 14, count 0 2006.229.11:45:55.66#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:45:55.66#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.11:45:55.66#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.11:45:55.66#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.11:45:55.66$setupk4/ifdk4 2006.229.11:45:55.66$ifdk4/lo= 2006.229.11:45:55.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:45:55.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:45:55.67$ifdk4/patch= 2006.229.11:45:55.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:45:55.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:45:55.67$setupk4/!*+20s 2006.229.11:46:01.13#trakl#Source acquired 2006.229.11:46:01.13#flagr#flagr/antenna,acquired 2006.229.11:46:03.80#abcon#<5=/04 1.6 3.1 27.911001002.3\r\n> 2006.229.11:46:03.82#abcon#{5=INTERFACE CLEAR} 2006.229.11:46:03.88#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:46:10.19$setupk4/"tpicd 2006.229.11:46:10.19$setupk4/echo=off 2006.229.11:46:10.19$setupk4/xlog=off 2006.229.11:46:10.19:!2006.229.11:49:47 2006.229.11:49:47.00:preob 2006.229.11:49:47.14/onsource/TRACKING 2006.229.11:49:47.14:!2006.229.11:49:57 2006.229.11:49:57.00:"tape 2006.229.11:49:57.00:"st=record 2006.229.11:49:57.00:data_valid=on 2006.229.11:49:57.00:midob 2006.229.11:49:58.14/onsource/TRACKING 2006.229.11:49:58.14/wx/27.89,1002.3,100 2006.229.11:49:58.25/cable/+6.4051E-03 2006.229.11:49:59.34/va/01,08,usb,yes,29,32 2006.229.11:49:59.34/va/02,07,usb,yes,32,32 2006.229.11:49:59.34/va/03,06,usb,yes,39,42 2006.229.11:49:59.34/va/04,07,usb,yes,33,34 2006.229.11:49:59.34/va/05,04,usb,yes,29,30 2006.229.11:49:59.34/va/06,04,usb,yes,33,32 2006.229.11:49:59.34/va/07,05,usb,yes,29,29 2006.229.11:49:59.34/va/08,06,usb,yes,21,26 2006.229.11:49:59.57/valo/01,524.99,yes,locked 2006.229.11:49:59.57/valo/02,534.99,yes,locked 2006.229.11:49:59.57/valo/03,564.99,yes,locked 2006.229.11:49:59.57/valo/04,624.99,yes,locked 2006.229.11:49:59.57/valo/05,734.99,yes,locked 2006.229.11:49:59.57/valo/06,814.99,yes,locked 2006.229.11:49:59.57/valo/07,864.99,yes,locked 2006.229.11:49:59.57/valo/08,884.99,yes,locked 2006.229.11:50:00.66/vb/01,04,usb,yes,31,28 2006.229.11:50:00.66/vb/02,04,usb,yes,33,33 2006.229.11:50:00.66/vb/03,04,usb,yes,30,33 2006.229.11:50:00.66/vb/04,04,usb,yes,34,33 2006.229.11:50:00.66/vb/05,04,usb,yes,27,29 2006.229.11:50:00.66/vb/06,04,usb,yes,31,27 2006.229.11:50:00.66/vb/07,04,usb,yes,31,31 2006.229.11:50:00.66/vb/08,04,usb,yes,28,32 2006.229.11:50:00.89/vblo/01,629.99,yes,locked 2006.229.11:50:00.89/vblo/02,634.99,yes,locked 2006.229.11:50:00.89/vblo/03,649.99,yes,locked 2006.229.11:50:00.89/vblo/04,679.99,yes,locked 2006.229.11:50:00.89/vblo/05,709.99,yes,locked 2006.229.11:50:00.89/vblo/06,719.99,yes,locked 2006.229.11:50:00.89/vblo/07,734.99,yes,locked 2006.229.11:50:00.89/vblo/08,744.99,yes,locked 2006.229.11:50:01.04/vabw/8 2006.229.11:50:01.19/vbbw/8 2006.229.11:50:01.28/xfe/off,on,12.2 2006.229.11:50:01.66/ifatt/23,28,28,28 2006.229.11:50:02.07/fmout-gps/S +4.31E-07 2006.229.11:50:02.11:!2006.229.11:51:17 2006.229.11:51:17.00:data_valid=off 2006.229.11:51:17.00:"et 2006.229.11:51:17.00:!+3s 2006.229.11:51:20.01:"tape 2006.229.11:51:20.01:postob 2006.229.11:51:20.22/cable/+6.4052E-03 2006.229.11:51:20.22/wx/27.88,1002.3,100 2006.229.11:51:21.07/fmout-gps/S +4.29E-07 2006.229.11:51:21.07:scan_name=229-1155,jd0608,190 2006.229.11:51:21.07:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.11:51:22.14#flagr#flagr/antenna,new-source 2006.229.11:51:22.14:checkk5 2006.229.11:51:22.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:51:22.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:51:23.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:51:23.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:51:24.12/chk_obsdata//k5ts1/T2291149??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:51:24.52/chk_obsdata//k5ts2/T2291149??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:51:24.93/chk_obsdata//k5ts3/T2291149??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:51:25.33/chk_obsdata//k5ts4/T2291149??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.11:51:26.06/k5log//k5ts1_log_newline 2006.229.11:51:26.78/k5log//k5ts2_log_newline 2006.229.11:51:27.47/k5log//k5ts3_log_newline 2006.229.11:51:28.17/k5log//k5ts4_log_newline 2006.229.11:51:28.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:51:28.19:setupk4=1 2006.229.11:51:28.19$setupk4/echo=on 2006.229.11:51:28.19$setupk4/pcalon 2006.229.11:51:28.19$pcalon/"no phase cal control is implemented here 2006.229.11:51:28.19$setupk4/"tpicd=stop 2006.229.11:51:28.19$setupk4/"rec=synch_on 2006.229.11:51:28.19$setupk4/"rec_mode=128 2006.229.11:51:28.19$setupk4/!* 2006.229.11:51:28.19$setupk4/recpk4 2006.229.11:51:28.19$recpk4/recpatch= 2006.229.11:51:28.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:51:28.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:51:28.20$setupk4/vck44 2006.229.11:51:28.20$vck44/valo=1,524.99 2006.229.11:51:28.20#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.11:51:28.20#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.11:51:28.20#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:28.20#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:28.20#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:28.20#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:28.20#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:51:28.20#ibcon#first serial, iclass 39, count 0 2006.229.11:51:28.20#ibcon#enter sib2, iclass 39, count 0 2006.229.11:51:28.20#ibcon#flushed, iclass 39, count 0 2006.229.11:51:28.20#ibcon#about to write, iclass 39, count 0 2006.229.11:51:28.20#ibcon#wrote, iclass 39, count 0 2006.229.11:51:28.20#ibcon#about to read 3, iclass 39, count 0 2006.229.11:51:28.22#ibcon#read 3, iclass 39, count 0 2006.229.11:51:28.22#ibcon#about to read 4, iclass 39, count 0 2006.229.11:51:28.22#ibcon#read 4, iclass 39, count 0 2006.229.11:51:28.22#ibcon#about to read 5, iclass 39, count 0 2006.229.11:51:28.22#ibcon#read 5, iclass 39, count 0 2006.229.11:51:28.22#ibcon#about to read 6, iclass 39, count 0 2006.229.11:51:28.22#ibcon#read 6, iclass 39, count 0 2006.229.11:51:28.22#ibcon#end of sib2, iclass 39, count 0 2006.229.11:51:28.22#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:51:28.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:51:28.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:51:28.22#ibcon#*before write, iclass 39, count 0 2006.229.11:51:28.22#ibcon#enter sib2, iclass 39, count 0 2006.229.11:51:28.22#ibcon#flushed, iclass 39, count 0 2006.229.11:51:28.22#ibcon#about to write, iclass 39, count 0 2006.229.11:51:28.22#ibcon#wrote, iclass 39, count 0 2006.229.11:51:28.22#ibcon#about to read 3, iclass 39, count 0 2006.229.11:51:28.27#ibcon#read 3, iclass 39, count 0 2006.229.11:51:28.27#ibcon#about to read 4, iclass 39, count 0 2006.229.11:51:28.27#ibcon#read 4, iclass 39, count 0 2006.229.11:51:28.27#ibcon#about to read 5, iclass 39, count 0 2006.229.11:51:28.27#ibcon#read 5, iclass 39, count 0 2006.229.11:51:28.27#ibcon#about to read 6, iclass 39, count 0 2006.229.11:51:28.27#ibcon#read 6, iclass 39, count 0 2006.229.11:51:28.27#ibcon#end of sib2, iclass 39, count 0 2006.229.11:51:28.27#ibcon#*after write, iclass 39, count 0 2006.229.11:51:28.27#ibcon#*before return 0, iclass 39, count 0 2006.229.11:51:28.27#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:28.27#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:28.27#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:51:28.27#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:51:28.27$vck44/va=1,8 2006.229.11:51:28.27#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.11:51:28.27#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.11:51:28.27#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:28.27#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:28.27#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:28.27#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:28.27#ibcon#enter wrdev, iclass 3, count 2 2006.229.11:51:28.27#ibcon#first serial, iclass 3, count 2 2006.229.11:51:28.27#ibcon#enter sib2, iclass 3, count 2 2006.229.11:51:28.27#ibcon#flushed, iclass 3, count 2 2006.229.11:51:28.27#ibcon#about to write, iclass 3, count 2 2006.229.11:51:28.27#ibcon#wrote, iclass 3, count 2 2006.229.11:51:28.27#ibcon#about to read 3, iclass 3, count 2 2006.229.11:51:28.29#ibcon#read 3, iclass 3, count 2 2006.229.11:51:28.29#ibcon#about to read 4, iclass 3, count 2 2006.229.11:51:28.29#ibcon#read 4, iclass 3, count 2 2006.229.11:51:28.29#ibcon#about to read 5, iclass 3, count 2 2006.229.11:51:28.29#ibcon#read 5, iclass 3, count 2 2006.229.11:51:28.29#ibcon#about to read 6, iclass 3, count 2 2006.229.11:51:28.29#ibcon#read 6, iclass 3, count 2 2006.229.11:51:28.29#ibcon#end of sib2, iclass 3, count 2 2006.229.11:51:28.29#ibcon#*mode == 0, iclass 3, count 2 2006.229.11:51:28.29#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.11:51:28.29#ibcon#[25=AT01-08\r\n] 2006.229.11:51:28.29#ibcon#*before write, iclass 3, count 2 2006.229.11:51:28.29#ibcon#enter sib2, iclass 3, count 2 2006.229.11:51:28.29#ibcon#flushed, iclass 3, count 2 2006.229.11:51:28.29#ibcon#about to write, iclass 3, count 2 2006.229.11:51:28.29#ibcon#wrote, iclass 3, count 2 2006.229.11:51:28.29#ibcon#about to read 3, iclass 3, count 2 2006.229.11:51:28.32#ibcon#read 3, iclass 3, count 2 2006.229.11:51:28.32#ibcon#about to read 4, iclass 3, count 2 2006.229.11:51:28.32#ibcon#read 4, iclass 3, count 2 2006.229.11:51:28.32#ibcon#about to read 5, iclass 3, count 2 2006.229.11:51:28.32#ibcon#read 5, iclass 3, count 2 2006.229.11:51:28.32#ibcon#about to read 6, iclass 3, count 2 2006.229.11:51:28.32#ibcon#read 6, iclass 3, count 2 2006.229.11:51:28.32#ibcon#end of sib2, iclass 3, count 2 2006.229.11:51:28.32#ibcon#*after write, iclass 3, count 2 2006.229.11:51:28.32#ibcon#*before return 0, iclass 3, count 2 2006.229.11:51:28.32#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:28.32#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:28.32#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.11:51:28.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:28.32#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:28.44#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:28.44#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:28.44#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:51:28.44#ibcon#first serial, iclass 3, count 0 2006.229.11:51:28.44#ibcon#enter sib2, iclass 3, count 0 2006.229.11:51:28.44#ibcon#flushed, iclass 3, count 0 2006.229.11:51:28.44#ibcon#about to write, iclass 3, count 0 2006.229.11:51:28.44#ibcon#wrote, iclass 3, count 0 2006.229.11:51:28.44#ibcon#about to read 3, iclass 3, count 0 2006.229.11:51:28.46#ibcon#read 3, iclass 3, count 0 2006.229.11:51:28.46#ibcon#about to read 4, iclass 3, count 0 2006.229.11:51:28.46#ibcon#read 4, iclass 3, count 0 2006.229.11:51:28.46#ibcon#about to read 5, iclass 3, count 0 2006.229.11:51:28.46#ibcon#read 5, iclass 3, count 0 2006.229.11:51:28.46#ibcon#about to read 6, iclass 3, count 0 2006.229.11:51:28.46#ibcon#read 6, iclass 3, count 0 2006.229.11:51:28.46#ibcon#end of sib2, iclass 3, count 0 2006.229.11:51:28.46#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:51:28.46#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:51:28.46#ibcon#[25=USB\r\n] 2006.229.11:51:28.46#ibcon#*before write, iclass 3, count 0 2006.229.11:51:28.46#ibcon#enter sib2, iclass 3, count 0 2006.229.11:51:28.46#ibcon#flushed, iclass 3, count 0 2006.229.11:51:28.46#ibcon#about to write, iclass 3, count 0 2006.229.11:51:28.46#ibcon#wrote, iclass 3, count 0 2006.229.11:51:28.46#ibcon#about to read 3, iclass 3, count 0 2006.229.11:51:28.49#ibcon#read 3, iclass 3, count 0 2006.229.11:51:28.49#ibcon#about to read 4, iclass 3, count 0 2006.229.11:51:28.49#ibcon#read 4, iclass 3, count 0 2006.229.11:51:28.49#ibcon#about to read 5, iclass 3, count 0 2006.229.11:51:28.49#ibcon#read 5, iclass 3, count 0 2006.229.11:51:28.49#ibcon#about to read 6, iclass 3, count 0 2006.229.11:51:28.49#ibcon#read 6, iclass 3, count 0 2006.229.11:51:28.49#ibcon#end of sib2, iclass 3, count 0 2006.229.11:51:28.49#ibcon#*after write, iclass 3, count 0 2006.229.11:51:28.49#ibcon#*before return 0, iclass 3, count 0 2006.229.11:51:28.49#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:28.49#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:28.49#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:51:28.49#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:51:28.49$vck44/valo=2,534.99 2006.229.11:51:28.49#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.11:51:28.49#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.11:51:28.49#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:28.49#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:28.49#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:28.49#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:28.49#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:51:28.49#ibcon#first serial, iclass 5, count 0 2006.229.11:51:28.49#ibcon#enter sib2, iclass 5, count 0 2006.229.11:51:28.49#ibcon#flushed, iclass 5, count 0 2006.229.11:51:28.49#ibcon#about to write, iclass 5, count 0 2006.229.11:51:28.49#ibcon#wrote, iclass 5, count 0 2006.229.11:51:28.49#ibcon#about to read 3, iclass 5, count 0 2006.229.11:51:28.51#ibcon#read 3, iclass 5, count 0 2006.229.11:51:28.51#ibcon#about to read 4, iclass 5, count 0 2006.229.11:51:28.51#ibcon#read 4, iclass 5, count 0 2006.229.11:51:28.51#ibcon#about to read 5, iclass 5, count 0 2006.229.11:51:28.51#ibcon#read 5, iclass 5, count 0 2006.229.11:51:28.51#ibcon#about to read 6, iclass 5, count 0 2006.229.11:51:28.51#ibcon#read 6, iclass 5, count 0 2006.229.11:51:28.51#ibcon#end of sib2, iclass 5, count 0 2006.229.11:51:28.51#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:51:28.51#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:51:28.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:51:28.51#ibcon#*before write, iclass 5, count 0 2006.229.11:51:28.51#ibcon#enter sib2, iclass 5, count 0 2006.229.11:51:28.51#ibcon#flushed, iclass 5, count 0 2006.229.11:51:28.51#ibcon#about to write, iclass 5, count 0 2006.229.11:51:28.51#ibcon#wrote, iclass 5, count 0 2006.229.11:51:28.51#ibcon#about to read 3, iclass 5, count 0 2006.229.11:51:28.55#ibcon#read 3, iclass 5, count 0 2006.229.11:51:28.55#ibcon#about to read 4, iclass 5, count 0 2006.229.11:51:28.55#ibcon#read 4, iclass 5, count 0 2006.229.11:51:28.55#ibcon#about to read 5, iclass 5, count 0 2006.229.11:51:28.55#ibcon#read 5, iclass 5, count 0 2006.229.11:51:28.55#ibcon#about to read 6, iclass 5, count 0 2006.229.11:51:28.55#ibcon#read 6, iclass 5, count 0 2006.229.11:51:28.55#ibcon#end of sib2, iclass 5, count 0 2006.229.11:51:28.55#ibcon#*after write, iclass 5, count 0 2006.229.11:51:28.55#ibcon#*before return 0, iclass 5, count 0 2006.229.11:51:28.55#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:28.55#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:28.55#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:51:28.55#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:51:28.55$vck44/va=2,7 2006.229.11:51:28.55#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.11:51:28.55#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.11:51:28.55#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:28.55#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:28.61#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:28.61#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:28.61#ibcon#enter wrdev, iclass 7, count 2 2006.229.11:51:28.61#ibcon#first serial, iclass 7, count 2 2006.229.11:51:28.61#ibcon#enter sib2, iclass 7, count 2 2006.229.11:51:28.61#ibcon#flushed, iclass 7, count 2 2006.229.11:51:28.61#ibcon#about to write, iclass 7, count 2 2006.229.11:51:28.61#ibcon#wrote, iclass 7, count 2 2006.229.11:51:28.61#ibcon#about to read 3, iclass 7, count 2 2006.229.11:51:28.63#ibcon#read 3, iclass 7, count 2 2006.229.11:51:28.63#ibcon#about to read 4, iclass 7, count 2 2006.229.11:51:28.63#ibcon#read 4, iclass 7, count 2 2006.229.11:51:28.63#ibcon#about to read 5, iclass 7, count 2 2006.229.11:51:28.63#ibcon#read 5, iclass 7, count 2 2006.229.11:51:28.63#ibcon#about to read 6, iclass 7, count 2 2006.229.11:51:28.63#ibcon#read 6, iclass 7, count 2 2006.229.11:51:28.63#ibcon#end of sib2, iclass 7, count 2 2006.229.11:51:28.63#ibcon#*mode == 0, iclass 7, count 2 2006.229.11:51:28.63#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.11:51:28.63#ibcon#[25=AT02-07\r\n] 2006.229.11:51:28.63#ibcon#*before write, iclass 7, count 2 2006.229.11:51:28.63#ibcon#enter sib2, iclass 7, count 2 2006.229.11:51:28.63#ibcon#flushed, iclass 7, count 2 2006.229.11:51:28.63#ibcon#about to write, iclass 7, count 2 2006.229.11:51:28.63#ibcon#wrote, iclass 7, count 2 2006.229.11:51:28.63#ibcon#about to read 3, iclass 7, count 2 2006.229.11:51:28.66#ibcon#read 3, iclass 7, count 2 2006.229.11:51:28.66#ibcon#about to read 4, iclass 7, count 2 2006.229.11:51:28.66#ibcon#read 4, iclass 7, count 2 2006.229.11:51:28.66#ibcon#about to read 5, iclass 7, count 2 2006.229.11:51:28.66#ibcon#read 5, iclass 7, count 2 2006.229.11:51:28.66#ibcon#about to read 6, iclass 7, count 2 2006.229.11:51:28.66#ibcon#read 6, iclass 7, count 2 2006.229.11:51:28.66#ibcon#end of sib2, iclass 7, count 2 2006.229.11:51:28.66#ibcon#*after write, iclass 7, count 2 2006.229.11:51:28.66#ibcon#*before return 0, iclass 7, count 2 2006.229.11:51:28.66#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:28.66#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:28.66#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.11:51:28.66#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:28.66#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:28.78#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:28.78#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:28.78#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:51:28.78#ibcon#first serial, iclass 7, count 0 2006.229.11:51:28.78#ibcon#enter sib2, iclass 7, count 0 2006.229.11:51:28.78#ibcon#flushed, iclass 7, count 0 2006.229.11:51:28.78#ibcon#about to write, iclass 7, count 0 2006.229.11:51:28.78#ibcon#wrote, iclass 7, count 0 2006.229.11:51:28.78#ibcon#about to read 3, iclass 7, count 0 2006.229.11:51:28.80#ibcon#read 3, iclass 7, count 0 2006.229.11:51:28.80#ibcon#about to read 4, iclass 7, count 0 2006.229.11:51:28.80#ibcon#read 4, iclass 7, count 0 2006.229.11:51:28.80#ibcon#about to read 5, iclass 7, count 0 2006.229.11:51:28.80#ibcon#read 5, iclass 7, count 0 2006.229.11:51:28.80#ibcon#about to read 6, iclass 7, count 0 2006.229.11:51:28.80#ibcon#read 6, iclass 7, count 0 2006.229.11:51:28.80#ibcon#end of sib2, iclass 7, count 0 2006.229.11:51:28.80#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:51:28.80#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:51:28.80#ibcon#[25=USB\r\n] 2006.229.11:51:28.80#ibcon#*before write, iclass 7, count 0 2006.229.11:51:28.80#ibcon#enter sib2, iclass 7, count 0 2006.229.11:51:28.80#ibcon#flushed, iclass 7, count 0 2006.229.11:51:28.80#ibcon#about to write, iclass 7, count 0 2006.229.11:51:28.80#ibcon#wrote, iclass 7, count 0 2006.229.11:51:28.80#ibcon#about to read 3, iclass 7, count 0 2006.229.11:51:28.83#ibcon#read 3, iclass 7, count 0 2006.229.11:51:28.83#ibcon#about to read 4, iclass 7, count 0 2006.229.11:51:28.83#ibcon#read 4, iclass 7, count 0 2006.229.11:51:28.83#ibcon#about to read 5, iclass 7, count 0 2006.229.11:51:28.83#ibcon#read 5, iclass 7, count 0 2006.229.11:51:28.83#ibcon#about to read 6, iclass 7, count 0 2006.229.11:51:28.83#ibcon#read 6, iclass 7, count 0 2006.229.11:51:28.83#ibcon#end of sib2, iclass 7, count 0 2006.229.11:51:28.83#ibcon#*after write, iclass 7, count 0 2006.229.11:51:28.83#ibcon#*before return 0, iclass 7, count 0 2006.229.11:51:28.83#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:28.83#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:28.83#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:51:28.83#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:51:28.83$vck44/valo=3,564.99 2006.229.11:51:28.83#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.11:51:28.83#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.11:51:28.83#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:28.83#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:28.83#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:28.83#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:28.83#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:51:28.83#ibcon#first serial, iclass 11, count 0 2006.229.11:51:28.83#ibcon#enter sib2, iclass 11, count 0 2006.229.11:51:28.83#ibcon#flushed, iclass 11, count 0 2006.229.11:51:28.83#ibcon#about to write, iclass 11, count 0 2006.229.11:51:28.83#ibcon#wrote, iclass 11, count 0 2006.229.11:51:28.83#ibcon#about to read 3, iclass 11, count 0 2006.229.11:51:28.85#ibcon#read 3, iclass 11, count 0 2006.229.11:51:28.85#ibcon#about to read 4, iclass 11, count 0 2006.229.11:51:28.85#ibcon#read 4, iclass 11, count 0 2006.229.11:51:28.85#ibcon#about to read 5, iclass 11, count 0 2006.229.11:51:28.85#ibcon#read 5, iclass 11, count 0 2006.229.11:51:28.85#ibcon#about to read 6, iclass 11, count 0 2006.229.11:51:28.85#ibcon#read 6, iclass 11, count 0 2006.229.11:51:28.85#ibcon#end of sib2, iclass 11, count 0 2006.229.11:51:28.85#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:51:28.85#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:51:28.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:51:28.85#ibcon#*before write, iclass 11, count 0 2006.229.11:51:28.85#ibcon#enter sib2, iclass 11, count 0 2006.229.11:51:28.85#ibcon#flushed, iclass 11, count 0 2006.229.11:51:28.85#ibcon#about to write, iclass 11, count 0 2006.229.11:51:28.85#ibcon#wrote, iclass 11, count 0 2006.229.11:51:28.85#ibcon#about to read 3, iclass 11, count 0 2006.229.11:51:28.89#ibcon#read 3, iclass 11, count 0 2006.229.11:51:28.89#ibcon#about to read 4, iclass 11, count 0 2006.229.11:51:28.89#ibcon#read 4, iclass 11, count 0 2006.229.11:51:28.89#ibcon#about to read 5, iclass 11, count 0 2006.229.11:51:28.89#ibcon#read 5, iclass 11, count 0 2006.229.11:51:28.89#ibcon#about to read 6, iclass 11, count 0 2006.229.11:51:28.89#ibcon#read 6, iclass 11, count 0 2006.229.11:51:28.89#ibcon#end of sib2, iclass 11, count 0 2006.229.11:51:28.89#ibcon#*after write, iclass 11, count 0 2006.229.11:51:28.89#ibcon#*before return 0, iclass 11, count 0 2006.229.11:51:28.89#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:28.89#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:28.89#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:51:28.89#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:51:28.89$vck44/va=3,6 2006.229.11:51:28.89#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.11:51:28.89#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.11:51:28.89#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:28.89#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:28.95#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:28.95#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:28.95#ibcon#enter wrdev, iclass 13, count 2 2006.229.11:51:28.95#ibcon#first serial, iclass 13, count 2 2006.229.11:51:28.95#ibcon#enter sib2, iclass 13, count 2 2006.229.11:51:28.95#ibcon#flushed, iclass 13, count 2 2006.229.11:51:28.95#ibcon#about to write, iclass 13, count 2 2006.229.11:51:28.95#ibcon#wrote, iclass 13, count 2 2006.229.11:51:28.95#ibcon#about to read 3, iclass 13, count 2 2006.229.11:51:28.97#ibcon#read 3, iclass 13, count 2 2006.229.11:51:28.97#ibcon#about to read 4, iclass 13, count 2 2006.229.11:51:28.97#ibcon#read 4, iclass 13, count 2 2006.229.11:51:28.97#ibcon#about to read 5, iclass 13, count 2 2006.229.11:51:28.97#ibcon#read 5, iclass 13, count 2 2006.229.11:51:28.97#ibcon#about to read 6, iclass 13, count 2 2006.229.11:51:28.97#ibcon#read 6, iclass 13, count 2 2006.229.11:51:28.97#ibcon#end of sib2, iclass 13, count 2 2006.229.11:51:28.97#ibcon#*mode == 0, iclass 13, count 2 2006.229.11:51:28.97#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.11:51:28.97#ibcon#[25=AT03-06\r\n] 2006.229.11:51:28.97#ibcon#*before write, iclass 13, count 2 2006.229.11:51:28.97#ibcon#enter sib2, iclass 13, count 2 2006.229.11:51:28.97#ibcon#flushed, iclass 13, count 2 2006.229.11:51:28.97#ibcon#about to write, iclass 13, count 2 2006.229.11:51:28.97#ibcon#wrote, iclass 13, count 2 2006.229.11:51:28.97#ibcon#about to read 3, iclass 13, count 2 2006.229.11:51:29.00#ibcon#read 3, iclass 13, count 2 2006.229.11:51:29.00#ibcon#about to read 4, iclass 13, count 2 2006.229.11:51:29.00#ibcon#read 4, iclass 13, count 2 2006.229.11:51:29.00#ibcon#about to read 5, iclass 13, count 2 2006.229.11:51:29.00#ibcon#read 5, iclass 13, count 2 2006.229.11:51:29.00#ibcon#about to read 6, iclass 13, count 2 2006.229.11:51:29.00#ibcon#read 6, iclass 13, count 2 2006.229.11:51:29.00#ibcon#end of sib2, iclass 13, count 2 2006.229.11:51:29.00#ibcon#*after write, iclass 13, count 2 2006.229.11:51:29.00#ibcon#*before return 0, iclass 13, count 2 2006.229.11:51:29.00#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:29.00#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:29.00#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.11:51:29.00#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:29.00#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:29.12#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:29.12#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:29.12#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:51:29.12#ibcon#first serial, iclass 13, count 0 2006.229.11:51:29.12#ibcon#enter sib2, iclass 13, count 0 2006.229.11:51:29.12#ibcon#flushed, iclass 13, count 0 2006.229.11:51:29.12#ibcon#about to write, iclass 13, count 0 2006.229.11:51:29.12#ibcon#wrote, iclass 13, count 0 2006.229.11:51:29.12#ibcon#about to read 3, iclass 13, count 0 2006.229.11:51:29.14#ibcon#read 3, iclass 13, count 0 2006.229.11:51:29.14#ibcon#about to read 4, iclass 13, count 0 2006.229.11:51:29.14#ibcon#read 4, iclass 13, count 0 2006.229.11:51:29.14#ibcon#about to read 5, iclass 13, count 0 2006.229.11:51:29.14#ibcon#read 5, iclass 13, count 0 2006.229.11:51:29.14#ibcon#about to read 6, iclass 13, count 0 2006.229.11:51:29.14#ibcon#read 6, iclass 13, count 0 2006.229.11:51:29.14#ibcon#end of sib2, iclass 13, count 0 2006.229.11:51:29.14#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:51:29.14#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:51:29.14#ibcon#[25=USB\r\n] 2006.229.11:51:29.14#ibcon#*before write, iclass 13, count 0 2006.229.11:51:29.14#ibcon#enter sib2, iclass 13, count 0 2006.229.11:51:29.14#ibcon#flushed, iclass 13, count 0 2006.229.11:51:29.14#ibcon#about to write, iclass 13, count 0 2006.229.11:51:29.14#ibcon#wrote, iclass 13, count 0 2006.229.11:51:29.14#ibcon#about to read 3, iclass 13, count 0 2006.229.11:51:29.17#ibcon#read 3, iclass 13, count 0 2006.229.11:51:29.17#ibcon#about to read 4, iclass 13, count 0 2006.229.11:51:29.17#ibcon#read 4, iclass 13, count 0 2006.229.11:51:29.17#ibcon#about to read 5, iclass 13, count 0 2006.229.11:51:29.17#ibcon#read 5, iclass 13, count 0 2006.229.11:51:29.17#ibcon#about to read 6, iclass 13, count 0 2006.229.11:51:29.17#ibcon#read 6, iclass 13, count 0 2006.229.11:51:29.17#ibcon#end of sib2, iclass 13, count 0 2006.229.11:51:29.17#ibcon#*after write, iclass 13, count 0 2006.229.11:51:29.17#ibcon#*before return 0, iclass 13, count 0 2006.229.11:51:29.17#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:29.17#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:29.17#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:51:29.17#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:51:29.17$vck44/valo=4,624.99 2006.229.11:51:29.17#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.11:51:29.17#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.11:51:29.17#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:29.17#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:29.17#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:29.17#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:29.17#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:51:29.17#ibcon#first serial, iclass 15, count 0 2006.229.11:51:29.17#ibcon#enter sib2, iclass 15, count 0 2006.229.11:51:29.17#ibcon#flushed, iclass 15, count 0 2006.229.11:51:29.17#ibcon#about to write, iclass 15, count 0 2006.229.11:51:29.17#ibcon#wrote, iclass 15, count 0 2006.229.11:51:29.17#ibcon#about to read 3, iclass 15, count 0 2006.229.11:51:29.19#ibcon#read 3, iclass 15, count 0 2006.229.11:51:29.19#ibcon#about to read 4, iclass 15, count 0 2006.229.11:51:29.19#ibcon#read 4, iclass 15, count 0 2006.229.11:51:29.19#ibcon#about to read 5, iclass 15, count 0 2006.229.11:51:29.19#ibcon#read 5, iclass 15, count 0 2006.229.11:51:29.19#ibcon#about to read 6, iclass 15, count 0 2006.229.11:51:29.19#ibcon#read 6, iclass 15, count 0 2006.229.11:51:29.19#ibcon#end of sib2, iclass 15, count 0 2006.229.11:51:29.19#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:51:29.19#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:51:29.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:51:29.19#ibcon#*before write, iclass 15, count 0 2006.229.11:51:29.19#ibcon#enter sib2, iclass 15, count 0 2006.229.11:51:29.19#ibcon#flushed, iclass 15, count 0 2006.229.11:51:29.19#ibcon#about to write, iclass 15, count 0 2006.229.11:51:29.19#ibcon#wrote, iclass 15, count 0 2006.229.11:51:29.19#ibcon#about to read 3, iclass 15, count 0 2006.229.11:51:29.23#ibcon#read 3, iclass 15, count 0 2006.229.11:51:29.23#ibcon#about to read 4, iclass 15, count 0 2006.229.11:51:29.23#ibcon#read 4, iclass 15, count 0 2006.229.11:51:29.23#ibcon#about to read 5, iclass 15, count 0 2006.229.11:51:29.23#ibcon#read 5, iclass 15, count 0 2006.229.11:51:29.23#ibcon#about to read 6, iclass 15, count 0 2006.229.11:51:29.23#ibcon#read 6, iclass 15, count 0 2006.229.11:51:29.23#ibcon#end of sib2, iclass 15, count 0 2006.229.11:51:29.23#ibcon#*after write, iclass 15, count 0 2006.229.11:51:29.23#ibcon#*before return 0, iclass 15, count 0 2006.229.11:51:29.23#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:29.23#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:29.23#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:51:29.23#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:51:29.23$vck44/va=4,7 2006.229.11:51:29.23#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.11:51:29.23#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.11:51:29.23#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:29.23#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:51:29.24#abcon#<5=/04 1.7 3.1 27.881001002.3\r\n> 2006.229.11:51:29.26#abcon#{5=INTERFACE CLEAR} 2006.229.11:51:29.29#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:51:29.29#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:51:29.29#ibcon#enter wrdev, iclass 18, count 2 2006.229.11:51:29.29#ibcon#first serial, iclass 18, count 2 2006.229.11:51:29.29#ibcon#enter sib2, iclass 18, count 2 2006.229.11:51:29.29#ibcon#flushed, iclass 18, count 2 2006.229.11:51:29.29#ibcon#about to write, iclass 18, count 2 2006.229.11:51:29.29#ibcon#wrote, iclass 18, count 2 2006.229.11:51:29.29#ibcon#about to read 3, iclass 18, count 2 2006.229.11:51:29.31#ibcon#read 3, iclass 18, count 2 2006.229.11:51:29.31#ibcon#about to read 4, iclass 18, count 2 2006.229.11:51:29.31#ibcon#read 4, iclass 18, count 2 2006.229.11:51:29.31#ibcon#about to read 5, iclass 18, count 2 2006.229.11:51:29.31#ibcon#read 5, iclass 18, count 2 2006.229.11:51:29.31#ibcon#about to read 6, iclass 18, count 2 2006.229.11:51:29.31#ibcon#read 6, iclass 18, count 2 2006.229.11:51:29.31#ibcon#end of sib2, iclass 18, count 2 2006.229.11:51:29.31#ibcon#*mode == 0, iclass 18, count 2 2006.229.11:51:29.31#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.11:51:29.31#ibcon#[25=AT04-07\r\n] 2006.229.11:51:29.31#ibcon#*before write, iclass 18, count 2 2006.229.11:51:29.31#ibcon#enter sib2, iclass 18, count 2 2006.229.11:51:29.31#ibcon#flushed, iclass 18, count 2 2006.229.11:51:29.31#ibcon#about to write, iclass 18, count 2 2006.229.11:51:29.31#ibcon#wrote, iclass 18, count 2 2006.229.11:51:29.31#ibcon#about to read 3, iclass 18, count 2 2006.229.11:51:29.32#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:51:29.34#ibcon#read 3, iclass 18, count 2 2006.229.11:51:29.34#ibcon#about to read 4, iclass 18, count 2 2006.229.11:51:29.34#ibcon#read 4, iclass 18, count 2 2006.229.11:51:29.34#ibcon#about to read 5, iclass 18, count 2 2006.229.11:51:29.34#ibcon#read 5, iclass 18, count 2 2006.229.11:51:29.34#ibcon#about to read 6, iclass 18, count 2 2006.229.11:51:29.34#ibcon#read 6, iclass 18, count 2 2006.229.11:51:29.34#ibcon#end of sib2, iclass 18, count 2 2006.229.11:51:29.34#ibcon#*after write, iclass 18, count 2 2006.229.11:51:29.34#ibcon#*before return 0, iclass 18, count 2 2006.229.11:51:29.34#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:51:29.34#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.11:51:29.34#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.11:51:29.34#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:29.34#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:51:29.46#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:51:29.46#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:51:29.46#ibcon#enter wrdev, iclass 18, count 0 2006.229.11:51:29.46#ibcon#first serial, iclass 18, count 0 2006.229.11:51:29.46#ibcon#enter sib2, iclass 18, count 0 2006.229.11:51:29.46#ibcon#flushed, iclass 18, count 0 2006.229.11:51:29.46#ibcon#about to write, iclass 18, count 0 2006.229.11:51:29.46#ibcon#wrote, iclass 18, count 0 2006.229.11:51:29.46#ibcon#about to read 3, iclass 18, count 0 2006.229.11:51:29.48#ibcon#read 3, iclass 18, count 0 2006.229.11:51:29.48#ibcon#about to read 4, iclass 18, count 0 2006.229.11:51:29.48#ibcon#read 4, iclass 18, count 0 2006.229.11:51:29.48#ibcon#about to read 5, iclass 18, count 0 2006.229.11:51:29.48#ibcon#read 5, iclass 18, count 0 2006.229.11:51:29.48#ibcon#about to read 6, iclass 18, count 0 2006.229.11:51:29.48#ibcon#read 6, iclass 18, count 0 2006.229.11:51:29.48#ibcon#end of sib2, iclass 18, count 0 2006.229.11:51:29.48#ibcon#*mode == 0, iclass 18, count 0 2006.229.11:51:29.48#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.11:51:29.48#ibcon#[25=USB\r\n] 2006.229.11:51:29.48#ibcon#*before write, iclass 18, count 0 2006.229.11:51:29.48#ibcon#enter sib2, iclass 18, count 0 2006.229.11:51:29.48#ibcon#flushed, iclass 18, count 0 2006.229.11:51:29.48#ibcon#about to write, iclass 18, count 0 2006.229.11:51:29.48#ibcon#wrote, iclass 18, count 0 2006.229.11:51:29.48#ibcon#about to read 3, iclass 18, count 0 2006.229.11:51:29.51#ibcon#read 3, iclass 18, count 0 2006.229.11:51:29.51#ibcon#about to read 4, iclass 18, count 0 2006.229.11:51:29.51#ibcon#read 4, iclass 18, count 0 2006.229.11:51:29.51#ibcon#about to read 5, iclass 18, count 0 2006.229.11:51:29.51#ibcon#read 5, iclass 18, count 0 2006.229.11:51:29.51#ibcon#about to read 6, iclass 18, count 0 2006.229.11:51:29.51#ibcon#read 6, iclass 18, count 0 2006.229.11:51:29.51#ibcon#end of sib2, iclass 18, count 0 2006.229.11:51:29.51#ibcon#*after write, iclass 18, count 0 2006.229.11:51:29.51#ibcon#*before return 0, iclass 18, count 0 2006.229.11:51:29.51#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:51:29.51#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.11:51:29.51#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.11:51:29.51#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.11:51:29.51$vck44/valo=5,734.99 2006.229.11:51:29.51#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.11:51:29.51#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.11:51:29.51#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:29.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:29.51#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:29.51#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:29.51#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:51:29.51#ibcon#first serial, iclass 23, count 0 2006.229.11:51:29.51#ibcon#enter sib2, iclass 23, count 0 2006.229.11:51:29.51#ibcon#flushed, iclass 23, count 0 2006.229.11:51:29.51#ibcon#about to write, iclass 23, count 0 2006.229.11:51:29.51#ibcon#wrote, iclass 23, count 0 2006.229.11:51:29.51#ibcon#about to read 3, iclass 23, count 0 2006.229.11:51:29.53#ibcon#read 3, iclass 23, count 0 2006.229.11:51:29.53#ibcon#about to read 4, iclass 23, count 0 2006.229.11:51:29.53#ibcon#read 4, iclass 23, count 0 2006.229.11:51:29.53#ibcon#about to read 5, iclass 23, count 0 2006.229.11:51:29.53#ibcon#read 5, iclass 23, count 0 2006.229.11:51:29.53#ibcon#about to read 6, iclass 23, count 0 2006.229.11:51:29.53#ibcon#read 6, iclass 23, count 0 2006.229.11:51:29.53#ibcon#end of sib2, iclass 23, count 0 2006.229.11:51:29.53#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:51:29.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:51:29.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:51:29.53#ibcon#*before write, iclass 23, count 0 2006.229.11:51:29.53#ibcon#enter sib2, iclass 23, count 0 2006.229.11:51:29.53#ibcon#flushed, iclass 23, count 0 2006.229.11:51:29.53#ibcon#about to write, iclass 23, count 0 2006.229.11:51:29.53#ibcon#wrote, iclass 23, count 0 2006.229.11:51:29.53#ibcon#about to read 3, iclass 23, count 0 2006.229.11:51:29.57#ibcon#read 3, iclass 23, count 0 2006.229.11:51:29.57#ibcon#about to read 4, iclass 23, count 0 2006.229.11:51:29.57#ibcon#read 4, iclass 23, count 0 2006.229.11:51:29.57#ibcon#about to read 5, iclass 23, count 0 2006.229.11:51:29.57#ibcon#read 5, iclass 23, count 0 2006.229.11:51:29.57#ibcon#about to read 6, iclass 23, count 0 2006.229.11:51:29.57#ibcon#read 6, iclass 23, count 0 2006.229.11:51:29.57#ibcon#end of sib2, iclass 23, count 0 2006.229.11:51:29.57#ibcon#*after write, iclass 23, count 0 2006.229.11:51:29.57#ibcon#*before return 0, iclass 23, count 0 2006.229.11:51:29.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:29.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:29.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:51:29.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:51:29.57$vck44/va=5,4 2006.229.11:51:29.57#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:51:29.57#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:51:29.57#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:29.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:29.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:29.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:29.63#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:51:29.63#ibcon#first serial, iclass 25, count 2 2006.229.11:51:29.63#ibcon#enter sib2, iclass 25, count 2 2006.229.11:51:29.63#ibcon#flushed, iclass 25, count 2 2006.229.11:51:29.63#ibcon#about to write, iclass 25, count 2 2006.229.11:51:29.63#ibcon#wrote, iclass 25, count 2 2006.229.11:51:29.63#ibcon#about to read 3, iclass 25, count 2 2006.229.11:51:29.65#ibcon#read 3, iclass 25, count 2 2006.229.11:51:29.65#ibcon#about to read 4, iclass 25, count 2 2006.229.11:51:29.65#ibcon#read 4, iclass 25, count 2 2006.229.11:51:29.65#ibcon#about to read 5, iclass 25, count 2 2006.229.11:51:29.65#ibcon#read 5, iclass 25, count 2 2006.229.11:51:29.65#ibcon#about to read 6, iclass 25, count 2 2006.229.11:51:29.65#ibcon#read 6, iclass 25, count 2 2006.229.11:51:29.65#ibcon#end of sib2, iclass 25, count 2 2006.229.11:51:29.65#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:51:29.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:51:29.65#ibcon#[25=AT05-04\r\n] 2006.229.11:51:29.65#ibcon#*before write, iclass 25, count 2 2006.229.11:51:29.65#ibcon#enter sib2, iclass 25, count 2 2006.229.11:51:29.65#ibcon#flushed, iclass 25, count 2 2006.229.11:51:29.65#ibcon#about to write, iclass 25, count 2 2006.229.11:51:29.65#ibcon#wrote, iclass 25, count 2 2006.229.11:51:29.65#ibcon#about to read 3, iclass 25, count 2 2006.229.11:51:29.68#ibcon#read 3, iclass 25, count 2 2006.229.11:51:29.68#ibcon#about to read 4, iclass 25, count 2 2006.229.11:51:29.68#ibcon#read 4, iclass 25, count 2 2006.229.11:51:29.68#ibcon#about to read 5, iclass 25, count 2 2006.229.11:51:29.68#ibcon#read 5, iclass 25, count 2 2006.229.11:51:29.68#ibcon#about to read 6, iclass 25, count 2 2006.229.11:51:29.68#ibcon#read 6, iclass 25, count 2 2006.229.11:51:29.68#ibcon#end of sib2, iclass 25, count 2 2006.229.11:51:29.68#ibcon#*after write, iclass 25, count 2 2006.229.11:51:29.68#ibcon#*before return 0, iclass 25, count 2 2006.229.11:51:29.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:29.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:29.68#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:51:29.68#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:29.68#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:29.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:29.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:29.80#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:51:29.80#ibcon#first serial, iclass 25, count 0 2006.229.11:51:29.80#ibcon#enter sib2, iclass 25, count 0 2006.229.11:51:29.80#ibcon#flushed, iclass 25, count 0 2006.229.11:51:29.80#ibcon#about to write, iclass 25, count 0 2006.229.11:51:29.80#ibcon#wrote, iclass 25, count 0 2006.229.11:51:29.80#ibcon#about to read 3, iclass 25, count 0 2006.229.11:51:29.82#ibcon#read 3, iclass 25, count 0 2006.229.11:51:29.82#ibcon#about to read 4, iclass 25, count 0 2006.229.11:51:29.82#ibcon#read 4, iclass 25, count 0 2006.229.11:51:29.82#ibcon#about to read 5, iclass 25, count 0 2006.229.11:51:29.82#ibcon#read 5, iclass 25, count 0 2006.229.11:51:29.82#ibcon#about to read 6, iclass 25, count 0 2006.229.11:51:29.82#ibcon#read 6, iclass 25, count 0 2006.229.11:51:29.82#ibcon#end of sib2, iclass 25, count 0 2006.229.11:51:29.82#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:51:29.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:51:29.82#ibcon#[25=USB\r\n] 2006.229.11:51:29.82#ibcon#*before write, iclass 25, count 0 2006.229.11:51:29.82#ibcon#enter sib2, iclass 25, count 0 2006.229.11:51:29.82#ibcon#flushed, iclass 25, count 0 2006.229.11:51:29.82#ibcon#about to write, iclass 25, count 0 2006.229.11:51:29.82#ibcon#wrote, iclass 25, count 0 2006.229.11:51:29.82#ibcon#about to read 3, iclass 25, count 0 2006.229.11:51:29.85#ibcon#read 3, iclass 25, count 0 2006.229.11:51:29.85#ibcon#about to read 4, iclass 25, count 0 2006.229.11:51:29.85#ibcon#read 4, iclass 25, count 0 2006.229.11:51:29.85#ibcon#about to read 5, iclass 25, count 0 2006.229.11:51:29.85#ibcon#read 5, iclass 25, count 0 2006.229.11:51:29.85#ibcon#about to read 6, iclass 25, count 0 2006.229.11:51:29.85#ibcon#read 6, iclass 25, count 0 2006.229.11:51:29.85#ibcon#end of sib2, iclass 25, count 0 2006.229.11:51:29.85#ibcon#*after write, iclass 25, count 0 2006.229.11:51:29.85#ibcon#*before return 0, iclass 25, count 0 2006.229.11:51:29.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:29.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:29.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:51:29.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:51:29.85$vck44/valo=6,814.99 2006.229.11:51:29.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:51:29.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:51:29.85#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:29.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:29.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:29.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:29.85#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:51:29.85#ibcon#first serial, iclass 27, count 0 2006.229.11:51:29.85#ibcon#enter sib2, iclass 27, count 0 2006.229.11:51:29.85#ibcon#flushed, iclass 27, count 0 2006.229.11:51:29.85#ibcon#about to write, iclass 27, count 0 2006.229.11:51:29.85#ibcon#wrote, iclass 27, count 0 2006.229.11:51:29.85#ibcon#about to read 3, iclass 27, count 0 2006.229.11:51:29.87#ibcon#read 3, iclass 27, count 0 2006.229.11:51:29.87#ibcon#about to read 4, iclass 27, count 0 2006.229.11:51:29.87#ibcon#read 4, iclass 27, count 0 2006.229.11:51:29.87#ibcon#about to read 5, iclass 27, count 0 2006.229.11:51:29.87#ibcon#read 5, iclass 27, count 0 2006.229.11:51:29.87#ibcon#about to read 6, iclass 27, count 0 2006.229.11:51:29.87#ibcon#read 6, iclass 27, count 0 2006.229.11:51:29.87#ibcon#end of sib2, iclass 27, count 0 2006.229.11:51:29.87#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:51:29.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:51:29.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:51:29.87#ibcon#*before write, iclass 27, count 0 2006.229.11:51:29.87#ibcon#enter sib2, iclass 27, count 0 2006.229.11:51:29.87#ibcon#flushed, iclass 27, count 0 2006.229.11:51:29.87#ibcon#about to write, iclass 27, count 0 2006.229.11:51:29.87#ibcon#wrote, iclass 27, count 0 2006.229.11:51:29.87#ibcon#about to read 3, iclass 27, count 0 2006.229.11:51:29.91#ibcon#read 3, iclass 27, count 0 2006.229.11:51:29.91#ibcon#about to read 4, iclass 27, count 0 2006.229.11:51:29.91#ibcon#read 4, iclass 27, count 0 2006.229.11:51:29.91#ibcon#about to read 5, iclass 27, count 0 2006.229.11:51:29.91#ibcon#read 5, iclass 27, count 0 2006.229.11:51:29.91#ibcon#about to read 6, iclass 27, count 0 2006.229.11:51:29.91#ibcon#read 6, iclass 27, count 0 2006.229.11:51:29.91#ibcon#end of sib2, iclass 27, count 0 2006.229.11:51:29.91#ibcon#*after write, iclass 27, count 0 2006.229.11:51:29.91#ibcon#*before return 0, iclass 27, count 0 2006.229.11:51:29.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:29.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:29.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:51:29.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:51:29.91$vck44/va=6,4 2006.229.11:51:29.91#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.11:51:29.91#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.11:51:29.91#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:29.91#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:29.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:29.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:29.97#ibcon#enter wrdev, iclass 29, count 2 2006.229.11:51:29.97#ibcon#first serial, iclass 29, count 2 2006.229.11:51:29.97#ibcon#enter sib2, iclass 29, count 2 2006.229.11:51:29.97#ibcon#flushed, iclass 29, count 2 2006.229.11:51:29.97#ibcon#about to write, iclass 29, count 2 2006.229.11:51:29.97#ibcon#wrote, iclass 29, count 2 2006.229.11:51:29.97#ibcon#about to read 3, iclass 29, count 2 2006.229.11:51:29.99#ibcon#read 3, iclass 29, count 2 2006.229.11:51:29.99#ibcon#about to read 4, iclass 29, count 2 2006.229.11:51:29.99#ibcon#read 4, iclass 29, count 2 2006.229.11:51:29.99#ibcon#about to read 5, iclass 29, count 2 2006.229.11:51:29.99#ibcon#read 5, iclass 29, count 2 2006.229.11:51:29.99#ibcon#about to read 6, iclass 29, count 2 2006.229.11:51:29.99#ibcon#read 6, iclass 29, count 2 2006.229.11:51:29.99#ibcon#end of sib2, iclass 29, count 2 2006.229.11:51:29.99#ibcon#*mode == 0, iclass 29, count 2 2006.229.11:51:29.99#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.11:51:29.99#ibcon#[25=AT06-04\r\n] 2006.229.11:51:29.99#ibcon#*before write, iclass 29, count 2 2006.229.11:51:29.99#ibcon#enter sib2, iclass 29, count 2 2006.229.11:51:29.99#ibcon#flushed, iclass 29, count 2 2006.229.11:51:29.99#ibcon#about to write, iclass 29, count 2 2006.229.11:51:29.99#ibcon#wrote, iclass 29, count 2 2006.229.11:51:29.99#ibcon#about to read 3, iclass 29, count 2 2006.229.11:51:30.02#ibcon#read 3, iclass 29, count 2 2006.229.11:51:30.02#ibcon#about to read 4, iclass 29, count 2 2006.229.11:51:30.02#ibcon#read 4, iclass 29, count 2 2006.229.11:51:30.02#ibcon#about to read 5, iclass 29, count 2 2006.229.11:51:30.02#ibcon#read 5, iclass 29, count 2 2006.229.11:51:30.02#ibcon#about to read 6, iclass 29, count 2 2006.229.11:51:30.02#ibcon#read 6, iclass 29, count 2 2006.229.11:51:30.02#ibcon#end of sib2, iclass 29, count 2 2006.229.11:51:30.02#ibcon#*after write, iclass 29, count 2 2006.229.11:51:30.02#ibcon#*before return 0, iclass 29, count 2 2006.229.11:51:30.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:30.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:30.02#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.11:51:30.02#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:30.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:30.14#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:30.14#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:30.14#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:51:30.14#ibcon#first serial, iclass 29, count 0 2006.229.11:51:30.14#ibcon#enter sib2, iclass 29, count 0 2006.229.11:51:30.14#ibcon#flushed, iclass 29, count 0 2006.229.11:51:30.14#ibcon#about to write, iclass 29, count 0 2006.229.11:51:30.14#ibcon#wrote, iclass 29, count 0 2006.229.11:51:30.14#ibcon#about to read 3, iclass 29, count 0 2006.229.11:51:30.16#ibcon#read 3, iclass 29, count 0 2006.229.11:51:30.16#ibcon#about to read 4, iclass 29, count 0 2006.229.11:51:30.16#ibcon#read 4, iclass 29, count 0 2006.229.11:51:30.16#ibcon#about to read 5, iclass 29, count 0 2006.229.11:51:30.16#ibcon#read 5, iclass 29, count 0 2006.229.11:51:30.16#ibcon#about to read 6, iclass 29, count 0 2006.229.11:51:30.16#ibcon#read 6, iclass 29, count 0 2006.229.11:51:30.16#ibcon#end of sib2, iclass 29, count 0 2006.229.11:51:30.16#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:51:30.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:51:30.16#ibcon#[25=USB\r\n] 2006.229.11:51:30.16#ibcon#*before write, iclass 29, count 0 2006.229.11:51:30.16#ibcon#enter sib2, iclass 29, count 0 2006.229.11:51:30.16#ibcon#flushed, iclass 29, count 0 2006.229.11:51:30.16#ibcon#about to write, iclass 29, count 0 2006.229.11:51:30.16#ibcon#wrote, iclass 29, count 0 2006.229.11:51:30.16#ibcon#about to read 3, iclass 29, count 0 2006.229.11:51:30.19#ibcon#read 3, iclass 29, count 0 2006.229.11:51:30.19#ibcon#about to read 4, iclass 29, count 0 2006.229.11:51:30.19#ibcon#read 4, iclass 29, count 0 2006.229.11:51:30.19#ibcon#about to read 5, iclass 29, count 0 2006.229.11:51:30.19#ibcon#read 5, iclass 29, count 0 2006.229.11:51:30.19#ibcon#about to read 6, iclass 29, count 0 2006.229.11:51:30.19#ibcon#read 6, iclass 29, count 0 2006.229.11:51:30.19#ibcon#end of sib2, iclass 29, count 0 2006.229.11:51:30.19#ibcon#*after write, iclass 29, count 0 2006.229.11:51:30.19#ibcon#*before return 0, iclass 29, count 0 2006.229.11:51:30.19#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:30.19#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:30.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:51:30.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:51:30.19$vck44/valo=7,864.99 2006.229.11:51:30.19#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:51:30.19#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:51:30.19#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:30.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:30.19#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:30.19#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:30.19#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:51:30.19#ibcon#first serial, iclass 31, count 0 2006.229.11:51:30.19#ibcon#enter sib2, iclass 31, count 0 2006.229.11:51:30.19#ibcon#flushed, iclass 31, count 0 2006.229.11:51:30.19#ibcon#about to write, iclass 31, count 0 2006.229.11:51:30.19#ibcon#wrote, iclass 31, count 0 2006.229.11:51:30.19#ibcon#about to read 3, iclass 31, count 0 2006.229.11:51:30.21#ibcon#read 3, iclass 31, count 0 2006.229.11:51:30.21#ibcon#about to read 4, iclass 31, count 0 2006.229.11:51:30.21#ibcon#read 4, iclass 31, count 0 2006.229.11:51:30.21#ibcon#about to read 5, iclass 31, count 0 2006.229.11:51:30.21#ibcon#read 5, iclass 31, count 0 2006.229.11:51:30.21#ibcon#about to read 6, iclass 31, count 0 2006.229.11:51:30.21#ibcon#read 6, iclass 31, count 0 2006.229.11:51:30.21#ibcon#end of sib2, iclass 31, count 0 2006.229.11:51:30.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:51:30.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:51:30.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:51:30.21#ibcon#*before write, iclass 31, count 0 2006.229.11:51:30.21#ibcon#enter sib2, iclass 31, count 0 2006.229.11:51:30.21#ibcon#flushed, iclass 31, count 0 2006.229.11:51:30.21#ibcon#about to write, iclass 31, count 0 2006.229.11:51:30.21#ibcon#wrote, iclass 31, count 0 2006.229.11:51:30.21#ibcon#about to read 3, iclass 31, count 0 2006.229.11:51:30.25#ibcon#read 3, iclass 31, count 0 2006.229.11:51:30.25#ibcon#about to read 4, iclass 31, count 0 2006.229.11:51:30.25#ibcon#read 4, iclass 31, count 0 2006.229.11:51:30.25#ibcon#about to read 5, iclass 31, count 0 2006.229.11:51:30.25#ibcon#read 5, iclass 31, count 0 2006.229.11:51:30.25#ibcon#about to read 6, iclass 31, count 0 2006.229.11:51:30.25#ibcon#read 6, iclass 31, count 0 2006.229.11:51:30.25#ibcon#end of sib2, iclass 31, count 0 2006.229.11:51:30.25#ibcon#*after write, iclass 31, count 0 2006.229.11:51:30.25#ibcon#*before return 0, iclass 31, count 0 2006.229.11:51:30.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:30.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:30.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:51:30.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:51:30.25$vck44/va=7,5 2006.229.11:51:30.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.11:51:30.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.11:51:30.25#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:30.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:30.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:30.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:30.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.11:51:30.31#ibcon#first serial, iclass 33, count 2 2006.229.11:51:30.31#ibcon#enter sib2, iclass 33, count 2 2006.229.11:51:30.31#ibcon#flushed, iclass 33, count 2 2006.229.11:51:30.31#ibcon#about to write, iclass 33, count 2 2006.229.11:51:30.31#ibcon#wrote, iclass 33, count 2 2006.229.11:51:30.31#ibcon#about to read 3, iclass 33, count 2 2006.229.11:51:30.33#ibcon#read 3, iclass 33, count 2 2006.229.11:51:30.33#ibcon#about to read 4, iclass 33, count 2 2006.229.11:51:30.33#ibcon#read 4, iclass 33, count 2 2006.229.11:51:30.33#ibcon#about to read 5, iclass 33, count 2 2006.229.11:51:30.33#ibcon#read 5, iclass 33, count 2 2006.229.11:51:30.33#ibcon#about to read 6, iclass 33, count 2 2006.229.11:51:30.33#ibcon#read 6, iclass 33, count 2 2006.229.11:51:30.33#ibcon#end of sib2, iclass 33, count 2 2006.229.11:51:30.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.11:51:30.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.11:51:30.33#ibcon#[25=AT07-05\r\n] 2006.229.11:51:30.33#ibcon#*before write, iclass 33, count 2 2006.229.11:51:30.33#ibcon#enter sib2, iclass 33, count 2 2006.229.11:51:30.33#ibcon#flushed, iclass 33, count 2 2006.229.11:51:30.33#ibcon#about to write, iclass 33, count 2 2006.229.11:51:30.33#ibcon#wrote, iclass 33, count 2 2006.229.11:51:30.33#ibcon#about to read 3, iclass 33, count 2 2006.229.11:51:30.36#ibcon#read 3, iclass 33, count 2 2006.229.11:51:30.36#ibcon#about to read 4, iclass 33, count 2 2006.229.11:51:30.36#ibcon#read 4, iclass 33, count 2 2006.229.11:51:30.36#ibcon#about to read 5, iclass 33, count 2 2006.229.11:51:30.36#ibcon#read 5, iclass 33, count 2 2006.229.11:51:30.36#ibcon#about to read 6, iclass 33, count 2 2006.229.11:51:30.36#ibcon#read 6, iclass 33, count 2 2006.229.11:51:30.36#ibcon#end of sib2, iclass 33, count 2 2006.229.11:51:30.36#ibcon#*after write, iclass 33, count 2 2006.229.11:51:30.36#ibcon#*before return 0, iclass 33, count 2 2006.229.11:51:30.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:30.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:30.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.11:51:30.36#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:30.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:30.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:30.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:30.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:51:30.48#ibcon#first serial, iclass 33, count 0 2006.229.11:51:30.48#ibcon#enter sib2, iclass 33, count 0 2006.229.11:51:30.48#ibcon#flushed, iclass 33, count 0 2006.229.11:51:30.48#ibcon#about to write, iclass 33, count 0 2006.229.11:51:30.48#ibcon#wrote, iclass 33, count 0 2006.229.11:51:30.48#ibcon#about to read 3, iclass 33, count 0 2006.229.11:51:30.50#ibcon#read 3, iclass 33, count 0 2006.229.11:51:30.50#ibcon#about to read 4, iclass 33, count 0 2006.229.11:51:30.50#ibcon#read 4, iclass 33, count 0 2006.229.11:51:30.50#ibcon#about to read 5, iclass 33, count 0 2006.229.11:51:30.50#ibcon#read 5, iclass 33, count 0 2006.229.11:51:30.50#ibcon#about to read 6, iclass 33, count 0 2006.229.11:51:30.50#ibcon#read 6, iclass 33, count 0 2006.229.11:51:30.50#ibcon#end of sib2, iclass 33, count 0 2006.229.11:51:30.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:51:30.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:51:30.50#ibcon#[25=USB\r\n] 2006.229.11:51:30.50#ibcon#*before write, iclass 33, count 0 2006.229.11:51:30.50#ibcon#enter sib2, iclass 33, count 0 2006.229.11:51:30.50#ibcon#flushed, iclass 33, count 0 2006.229.11:51:30.50#ibcon#about to write, iclass 33, count 0 2006.229.11:51:30.50#ibcon#wrote, iclass 33, count 0 2006.229.11:51:30.50#ibcon#about to read 3, iclass 33, count 0 2006.229.11:51:30.53#ibcon#read 3, iclass 33, count 0 2006.229.11:51:30.53#ibcon#about to read 4, iclass 33, count 0 2006.229.11:51:30.53#ibcon#read 4, iclass 33, count 0 2006.229.11:51:30.53#ibcon#about to read 5, iclass 33, count 0 2006.229.11:51:30.53#ibcon#read 5, iclass 33, count 0 2006.229.11:51:30.53#ibcon#about to read 6, iclass 33, count 0 2006.229.11:51:30.53#ibcon#read 6, iclass 33, count 0 2006.229.11:51:30.53#ibcon#end of sib2, iclass 33, count 0 2006.229.11:51:30.53#ibcon#*after write, iclass 33, count 0 2006.229.11:51:30.53#ibcon#*before return 0, iclass 33, count 0 2006.229.11:51:30.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:30.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:30.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:51:30.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:51:30.53$vck44/valo=8,884.99 2006.229.11:51:30.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.11:51:30.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.11:51:30.53#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:30.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:30.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:30.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:30.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:51:30.53#ibcon#first serial, iclass 35, count 0 2006.229.11:51:30.53#ibcon#enter sib2, iclass 35, count 0 2006.229.11:51:30.53#ibcon#flushed, iclass 35, count 0 2006.229.11:51:30.53#ibcon#about to write, iclass 35, count 0 2006.229.11:51:30.53#ibcon#wrote, iclass 35, count 0 2006.229.11:51:30.53#ibcon#about to read 3, iclass 35, count 0 2006.229.11:51:30.55#ibcon#read 3, iclass 35, count 0 2006.229.11:51:30.55#ibcon#about to read 4, iclass 35, count 0 2006.229.11:51:30.55#ibcon#read 4, iclass 35, count 0 2006.229.11:51:30.55#ibcon#about to read 5, iclass 35, count 0 2006.229.11:51:30.55#ibcon#read 5, iclass 35, count 0 2006.229.11:51:30.55#ibcon#about to read 6, iclass 35, count 0 2006.229.11:51:30.55#ibcon#read 6, iclass 35, count 0 2006.229.11:51:30.55#ibcon#end of sib2, iclass 35, count 0 2006.229.11:51:30.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:51:30.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:51:30.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:51:30.55#ibcon#*before write, iclass 35, count 0 2006.229.11:51:30.55#ibcon#enter sib2, iclass 35, count 0 2006.229.11:51:30.55#ibcon#flushed, iclass 35, count 0 2006.229.11:51:30.55#ibcon#about to write, iclass 35, count 0 2006.229.11:51:30.55#ibcon#wrote, iclass 35, count 0 2006.229.11:51:30.55#ibcon#about to read 3, iclass 35, count 0 2006.229.11:51:30.59#ibcon#read 3, iclass 35, count 0 2006.229.11:51:30.59#ibcon#about to read 4, iclass 35, count 0 2006.229.11:51:30.59#ibcon#read 4, iclass 35, count 0 2006.229.11:51:30.59#ibcon#about to read 5, iclass 35, count 0 2006.229.11:51:30.59#ibcon#read 5, iclass 35, count 0 2006.229.11:51:30.59#ibcon#about to read 6, iclass 35, count 0 2006.229.11:51:30.59#ibcon#read 6, iclass 35, count 0 2006.229.11:51:30.59#ibcon#end of sib2, iclass 35, count 0 2006.229.11:51:30.59#ibcon#*after write, iclass 35, count 0 2006.229.11:51:30.59#ibcon#*before return 0, iclass 35, count 0 2006.229.11:51:30.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:30.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:30.59#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:51:30.59#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:51:30.59$vck44/va=8,6 2006.229.11:51:30.59#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.11:51:30.59#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.11:51:30.59#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:30.59#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:51:30.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:51:30.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:51:30.65#ibcon#enter wrdev, iclass 37, count 2 2006.229.11:51:30.65#ibcon#first serial, iclass 37, count 2 2006.229.11:51:30.65#ibcon#enter sib2, iclass 37, count 2 2006.229.11:51:30.65#ibcon#flushed, iclass 37, count 2 2006.229.11:51:30.65#ibcon#about to write, iclass 37, count 2 2006.229.11:51:30.65#ibcon#wrote, iclass 37, count 2 2006.229.11:51:30.65#ibcon#about to read 3, iclass 37, count 2 2006.229.11:51:30.67#ibcon#read 3, iclass 37, count 2 2006.229.11:51:30.67#ibcon#about to read 4, iclass 37, count 2 2006.229.11:51:30.67#ibcon#read 4, iclass 37, count 2 2006.229.11:51:30.67#ibcon#about to read 5, iclass 37, count 2 2006.229.11:51:30.67#ibcon#read 5, iclass 37, count 2 2006.229.11:51:30.67#ibcon#about to read 6, iclass 37, count 2 2006.229.11:51:30.67#ibcon#read 6, iclass 37, count 2 2006.229.11:51:30.67#ibcon#end of sib2, iclass 37, count 2 2006.229.11:51:30.67#ibcon#*mode == 0, iclass 37, count 2 2006.229.11:51:30.67#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.11:51:30.67#ibcon#[25=AT08-06\r\n] 2006.229.11:51:30.67#ibcon#*before write, iclass 37, count 2 2006.229.11:51:30.67#ibcon#enter sib2, iclass 37, count 2 2006.229.11:51:30.67#ibcon#flushed, iclass 37, count 2 2006.229.11:51:30.67#ibcon#about to write, iclass 37, count 2 2006.229.11:51:30.67#ibcon#wrote, iclass 37, count 2 2006.229.11:51:30.67#ibcon#about to read 3, iclass 37, count 2 2006.229.11:51:30.70#ibcon#read 3, iclass 37, count 2 2006.229.11:51:30.70#ibcon#about to read 4, iclass 37, count 2 2006.229.11:51:30.70#ibcon#read 4, iclass 37, count 2 2006.229.11:51:30.70#ibcon#about to read 5, iclass 37, count 2 2006.229.11:51:30.70#ibcon#read 5, iclass 37, count 2 2006.229.11:51:30.70#ibcon#about to read 6, iclass 37, count 2 2006.229.11:51:30.70#ibcon#read 6, iclass 37, count 2 2006.229.11:51:30.70#ibcon#end of sib2, iclass 37, count 2 2006.229.11:51:30.70#ibcon#*after write, iclass 37, count 2 2006.229.11:51:30.70#ibcon#*before return 0, iclass 37, count 2 2006.229.11:51:30.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:51:30.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.11:51:30.70#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.11:51:30.70#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:30.70#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:51:30.82#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:51:30.82#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:51:30.82#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:51:30.82#ibcon#first serial, iclass 37, count 0 2006.229.11:51:30.82#ibcon#enter sib2, iclass 37, count 0 2006.229.11:51:30.82#ibcon#flushed, iclass 37, count 0 2006.229.11:51:30.82#ibcon#about to write, iclass 37, count 0 2006.229.11:51:30.82#ibcon#wrote, iclass 37, count 0 2006.229.11:51:30.82#ibcon#about to read 3, iclass 37, count 0 2006.229.11:51:30.84#ibcon#read 3, iclass 37, count 0 2006.229.11:51:30.84#ibcon#about to read 4, iclass 37, count 0 2006.229.11:51:30.84#ibcon#read 4, iclass 37, count 0 2006.229.11:51:30.84#ibcon#about to read 5, iclass 37, count 0 2006.229.11:51:30.84#ibcon#read 5, iclass 37, count 0 2006.229.11:51:30.84#ibcon#about to read 6, iclass 37, count 0 2006.229.11:51:30.84#ibcon#read 6, iclass 37, count 0 2006.229.11:51:30.84#ibcon#end of sib2, iclass 37, count 0 2006.229.11:51:30.84#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:51:30.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:51:30.84#ibcon#[25=USB\r\n] 2006.229.11:51:30.84#ibcon#*before write, iclass 37, count 0 2006.229.11:51:30.84#ibcon#enter sib2, iclass 37, count 0 2006.229.11:51:30.84#ibcon#flushed, iclass 37, count 0 2006.229.11:51:30.84#ibcon#about to write, iclass 37, count 0 2006.229.11:51:30.84#ibcon#wrote, iclass 37, count 0 2006.229.11:51:30.84#ibcon#about to read 3, iclass 37, count 0 2006.229.11:51:30.87#ibcon#read 3, iclass 37, count 0 2006.229.11:51:30.87#ibcon#about to read 4, iclass 37, count 0 2006.229.11:51:30.87#ibcon#read 4, iclass 37, count 0 2006.229.11:51:30.87#ibcon#about to read 5, iclass 37, count 0 2006.229.11:51:30.87#ibcon#read 5, iclass 37, count 0 2006.229.11:51:30.87#ibcon#about to read 6, iclass 37, count 0 2006.229.11:51:30.87#ibcon#read 6, iclass 37, count 0 2006.229.11:51:30.87#ibcon#end of sib2, iclass 37, count 0 2006.229.11:51:30.87#ibcon#*after write, iclass 37, count 0 2006.229.11:51:30.87#ibcon#*before return 0, iclass 37, count 0 2006.229.11:51:30.87#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:51:30.87#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.11:51:30.87#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:51:30.87#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:51:30.87$vck44/vblo=1,629.99 2006.229.11:51:30.87#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.11:51:30.87#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.11:51:30.87#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:30.87#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:30.87#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:30.87#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:30.87#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:51:30.87#ibcon#first serial, iclass 39, count 0 2006.229.11:51:30.87#ibcon#enter sib2, iclass 39, count 0 2006.229.11:51:30.87#ibcon#flushed, iclass 39, count 0 2006.229.11:51:30.87#ibcon#about to write, iclass 39, count 0 2006.229.11:51:30.87#ibcon#wrote, iclass 39, count 0 2006.229.11:51:30.87#ibcon#about to read 3, iclass 39, count 0 2006.229.11:51:30.89#ibcon#read 3, iclass 39, count 0 2006.229.11:51:30.89#ibcon#about to read 4, iclass 39, count 0 2006.229.11:51:30.89#ibcon#read 4, iclass 39, count 0 2006.229.11:51:30.89#ibcon#about to read 5, iclass 39, count 0 2006.229.11:51:30.89#ibcon#read 5, iclass 39, count 0 2006.229.11:51:30.89#ibcon#about to read 6, iclass 39, count 0 2006.229.11:51:30.89#ibcon#read 6, iclass 39, count 0 2006.229.11:51:30.89#ibcon#end of sib2, iclass 39, count 0 2006.229.11:51:30.89#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:51:30.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:51:30.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:51:30.89#ibcon#*before write, iclass 39, count 0 2006.229.11:51:30.89#ibcon#enter sib2, iclass 39, count 0 2006.229.11:51:30.89#ibcon#flushed, iclass 39, count 0 2006.229.11:51:30.89#ibcon#about to write, iclass 39, count 0 2006.229.11:51:30.89#ibcon#wrote, iclass 39, count 0 2006.229.11:51:30.89#ibcon#about to read 3, iclass 39, count 0 2006.229.11:51:30.93#ibcon#read 3, iclass 39, count 0 2006.229.11:51:30.93#ibcon#about to read 4, iclass 39, count 0 2006.229.11:51:30.93#ibcon#read 4, iclass 39, count 0 2006.229.11:51:30.93#ibcon#about to read 5, iclass 39, count 0 2006.229.11:51:30.93#ibcon#read 5, iclass 39, count 0 2006.229.11:51:30.93#ibcon#about to read 6, iclass 39, count 0 2006.229.11:51:30.93#ibcon#read 6, iclass 39, count 0 2006.229.11:51:30.93#ibcon#end of sib2, iclass 39, count 0 2006.229.11:51:30.93#ibcon#*after write, iclass 39, count 0 2006.229.11:51:30.93#ibcon#*before return 0, iclass 39, count 0 2006.229.11:51:30.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:30.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.11:51:30.93#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:51:30.93#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:51:30.93$vck44/vb=1,4 2006.229.11:51:30.93#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.11:51:30.93#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.11:51:30.93#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:30.93#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:30.93#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:30.93#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:30.93#ibcon#enter wrdev, iclass 3, count 2 2006.229.11:51:30.93#ibcon#first serial, iclass 3, count 2 2006.229.11:51:30.93#ibcon#enter sib2, iclass 3, count 2 2006.229.11:51:30.93#ibcon#flushed, iclass 3, count 2 2006.229.11:51:30.93#ibcon#about to write, iclass 3, count 2 2006.229.11:51:30.93#ibcon#wrote, iclass 3, count 2 2006.229.11:51:30.93#ibcon#about to read 3, iclass 3, count 2 2006.229.11:51:30.95#ibcon#read 3, iclass 3, count 2 2006.229.11:51:30.95#ibcon#about to read 4, iclass 3, count 2 2006.229.11:51:30.95#ibcon#read 4, iclass 3, count 2 2006.229.11:51:30.95#ibcon#about to read 5, iclass 3, count 2 2006.229.11:51:30.95#ibcon#read 5, iclass 3, count 2 2006.229.11:51:30.95#ibcon#about to read 6, iclass 3, count 2 2006.229.11:51:30.95#ibcon#read 6, iclass 3, count 2 2006.229.11:51:30.95#ibcon#end of sib2, iclass 3, count 2 2006.229.11:51:30.95#ibcon#*mode == 0, iclass 3, count 2 2006.229.11:51:30.95#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.11:51:30.95#ibcon#[27=AT01-04\r\n] 2006.229.11:51:30.95#ibcon#*before write, iclass 3, count 2 2006.229.11:51:30.95#ibcon#enter sib2, iclass 3, count 2 2006.229.11:51:30.95#ibcon#flushed, iclass 3, count 2 2006.229.11:51:30.95#ibcon#about to write, iclass 3, count 2 2006.229.11:51:30.95#ibcon#wrote, iclass 3, count 2 2006.229.11:51:30.95#ibcon#about to read 3, iclass 3, count 2 2006.229.11:51:30.98#ibcon#read 3, iclass 3, count 2 2006.229.11:51:30.98#ibcon#about to read 4, iclass 3, count 2 2006.229.11:51:30.98#ibcon#read 4, iclass 3, count 2 2006.229.11:51:30.98#ibcon#about to read 5, iclass 3, count 2 2006.229.11:51:30.98#ibcon#read 5, iclass 3, count 2 2006.229.11:51:30.98#ibcon#about to read 6, iclass 3, count 2 2006.229.11:51:30.98#ibcon#read 6, iclass 3, count 2 2006.229.11:51:30.98#ibcon#end of sib2, iclass 3, count 2 2006.229.11:51:30.98#ibcon#*after write, iclass 3, count 2 2006.229.11:51:30.98#ibcon#*before return 0, iclass 3, count 2 2006.229.11:51:30.98#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:30.98#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.11:51:30.98#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.11:51:30.98#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:30.98#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:31.10#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:31.10#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:31.10#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:51:31.10#ibcon#first serial, iclass 3, count 0 2006.229.11:51:31.10#ibcon#enter sib2, iclass 3, count 0 2006.229.11:51:31.10#ibcon#flushed, iclass 3, count 0 2006.229.11:51:31.10#ibcon#about to write, iclass 3, count 0 2006.229.11:51:31.10#ibcon#wrote, iclass 3, count 0 2006.229.11:51:31.10#ibcon#about to read 3, iclass 3, count 0 2006.229.11:51:31.12#ibcon#read 3, iclass 3, count 0 2006.229.11:51:31.12#ibcon#about to read 4, iclass 3, count 0 2006.229.11:51:31.12#ibcon#read 4, iclass 3, count 0 2006.229.11:51:31.12#ibcon#about to read 5, iclass 3, count 0 2006.229.11:51:31.12#ibcon#read 5, iclass 3, count 0 2006.229.11:51:31.12#ibcon#about to read 6, iclass 3, count 0 2006.229.11:51:31.12#ibcon#read 6, iclass 3, count 0 2006.229.11:51:31.12#ibcon#end of sib2, iclass 3, count 0 2006.229.11:51:31.12#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:51:31.12#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:51:31.12#ibcon#[27=USB\r\n] 2006.229.11:51:31.12#ibcon#*before write, iclass 3, count 0 2006.229.11:51:31.12#ibcon#enter sib2, iclass 3, count 0 2006.229.11:51:31.12#ibcon#flushed, iclass 3, count 0 2006.229.11:51:31.12#ibcon#about to write, iclass 3, count 0 2006.229.11:51:31.12#ibcon#wrote, iclass 3, count 0 2006.229.11:51:31.12#ibcon#about to read 3, iclass 3, count 0 2006.229.11:51:31.15#ibcon#read 3, iclass 3, count 0 2006.229.11:51:31.15#ibcon#about to read 4, iclass 3, count 0 2006.229.11:51:31.15#ibcon#read 4, iclass 3, count 0 2006.229.11:51:31.15#ibcon#about to read 5, iclass 3, count 0 2006.229.11:51:31.15#ibcon#read 5, iclass 3, count 0 2006.229.11:51:31.15#ibcon#about to read 6, iclass 3, count 0 2006.229.11:51:31.15#ibcon#read 6, iclass 3, count 0 2006.229.11:51:31.15#ibcon#end of sib2, iclass 3, count 0 2006.229.11:51:31.15#ibcon#*after write, iclass 3, count 0 2006.229.11:51:31.15#ibcon#*before return 0, iclass 3, count 0 2006.229.11:51:31.15#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:31.15#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.11:51:31.15#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:51:31.15#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:51:31.15$vck44/vblo=2,634.99 2006.229.11:51:31.15#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.11:51:31.15#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.11:51:31.15#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:31.15#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:31.15#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:31.15#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:31.15#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:51:31.15#ibcon#first serial, iclass 5, count 0 2006.229.11:51:31.15#ibcon#enter sib2, iclass 5, count 0 2006.229.11:51:31.15#ibcon#flushed, iclass 5, count 0 2006.229.11:51:31.15#ibcon#about to write, iclass 5, count 0 2006.229.11:51:31.15#ibcon#wrote, iclass 5, count 0 2006.229.11:51:31.15#ibcon#about to read 3, iclass 5, count 0 2006.229.11:51:31.17#ibcon#read 3, iclass 5, count 0 2006.229.11:51:31.17#ibcon#about to read 4, iclass 5, count 0 2006.229.11:51:31.17#ibcon#read 4, iclass 5, count 0 2006.229.11:51:31.17#ibcon#about to read 5, iclass 5, count 0 2006.229.11:51:31.17#ibcon#read 5, iclass 5, count 0 2006.229.11:51:31.17#ibcon#about to read 6, iclass 5, count 0 2006.229.11:51:31.17#ibcon#read 6, iclass 5, count 0 2006.229.11:51:31.17#ibcon#end of sib2, iclass 5, count 0 2006.229.11:51:31.17#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:51:31.17#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:51:31.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:51:31.17#ibcon#*before write, iclass 5, count 0 2006.229.11:51:31.17#ibcon#enter sib2, iclass 5, count 0 2006.229.11:51:31.17#ibcon#flushed, iclass 5, count 0 2006.229.11:51:31.17#ibcon#about to write, iclass 5, count 0 2006.229.11:51:31.17#ibcon#wrote, iclass 5, count 0 2006.229.11:51:31.17#ibcon#about to read 3, iclass 5, count 0 2006.229.11:51:31.21#ibcon#read 3, iclass 5, count 0 2006.229.11:51:31.21#ibcon#about to read 4, iclass 5, count 0 2006.229.11:51:31.21#ibcon#read 4, iclass 5, count 0 2006.229.11:51:31.21#ibcon#about to read 5, iclass 5, count 0 2006.229.11:51:31.21#ibcon#read 5, iclass 5, count 0 2006.229.11:51:31.21#ibcon#about to read 6, iclass 5, count 0 2006.229.11:51:31.21#ibcon#read 6, iclass 5, count 0 2006.229.11:51:31.21#ibcon#end of sib2, iclass 5, count 0 2006.229.11:51:31.21#ibcon#*after write, iclass 5, count 0 2006.229.11:51:31.21#ibcon#*before return 0, iclass 5, count 0 2006.229.11:51:31.21#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:31.21#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.11:51:31.21#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:51:31.21#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:51:31.21$vck44/vb=2,4 2006.229.11:51:31.21#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.11:51:31.21#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.11:51:31.21#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:31.21#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:31.27#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:31.27#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:31.27#ibcon#enter wrdev, iclass 7, count 2 2006.229.11:51:31.27#ibcon#first serial, iclass 7, count 2 2006.229.11:51:31.27#ibcon#enter sib2, iclass 7, count 2 2006.229.11:51:31.27#ibcon#flushed, iclass 7, count 2 2006.229.11:51:31.27#ibcon#about to write, iclass 7, count 2 2006.229.11:51:31.27#ibcon#wrote, iclass 7, count 2 2006.229.11:51:31.27#ibcon#about to read 3, iclass 7, count 2 2006.229.11:51:31.29#ibcon#read 3, iclass 7, count 2 2006.229.11:51:31.29#ibcon#about to read 4, iclass 7, count 2 2006.229.11:51:31.29#ibcon#read 4, iclass 7, count 2 2006.229.11:51:31.29#ibcon#about to read 5, iclass 7, count 2 2006.229.11:51:31.29#ibcon#read 5, iclass 7, count 2 2006.229.11:51:31.29#ibcon#about to read 6, iclass 7, count 2 2006.229.11:51:31.29#ibcon#read 6, iclass 7, count 2 2006.229.11:51:31.29#ibcon#end of sib2, iclass 7, count 2 2006.229.11:51:31.29#ibcon#*mode == 0, iclass 7, count 2 2006.229.11:51:31.29#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.11:51:31.29#ibcon#[27=AT02-04\r\n] 2006.229.11:51:31.29#ibcon#*before write, iclass 7, count 2 2006.229.11:51:31.29#ibcon#enter sib2, iclass 7, count 2 2006.229.11:51:31.29#ibcon#flushed, iclass 7, count 2 2006.229.11:51:31.29#ibcon#about to write, iclass 7, count 2 2006.229.11:51:31.29#ibcon#wrote, iclass 7, count 2 2006.229.11:51:31.29#ibcon#about to read 3, iclass 7, count 2 2006.229.11:51:31.32#ibcon#read 3, iclass 7, count 2 2006.229.11:51:31.32#ibcon#about to read 4, iclass 7, count 2 2006.229.11:51:31.32#ibcon#read 4, iclass 7, count 2 2006.229.11:51:31.32#ibcon#about to read 5, iclass 7, count 2 2006.229.11:51:31.32#ibcon#read 5, iclass 7, count 2 2006.229.11:51:31.32#ibcon#about to read 6, iclass 7, count 2 2006.229.11:51:31.32#ibcon#read 6, iclass 7, count 2 2006.229.11:51:31.32#ibcon#end of sib2, iclass 7, count 2 2006.229.11:51:31.32#ibcon#*after write, iclass 7, count 2 2006.229.11:51:31.32#ibcon#*before return 0, iclass 7, count 2 2006.229.11:51:31.32#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:31.32#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.11:51:31.32#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.11:51:31.32#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:31.32#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:31.44#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:31.44#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:31.44#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:51:31.44#ibcon#first serial, iclass 7, count 0 2006.229.11:51:31.44#ibcon#enter sib2, iclass 7, count 0 2006.229.11:51:31.44#ibcon#flushed, iclass 7, count 0 2006.229.11:51:31.44#ibcon#about to write, iclass 7, count 0 2006.229.11:51:31.44#ibcon#wrote, iclass 7, count 0 2006.229.11:51:31.44#ibcon#about to read 3, iclass 7, count 0 2006.229.11:51:31.46#ibcon#read 3, iclass 7, count 0 2006.229.11:51:31.46#ibcon#about to read 4, iclass 7, count 0 2006.229.11:51:31.46#ibcon#read 4, iclass 7, count 0 2006.229.11:51:31.46#ibcon#about to read 5, iclass 7, count 0 2006.229.11:51:31.46#ibcon#read 5, iclass 7, count 0 2006.229.11:51:31.46#ibcon#about to read 6, iclass 7, count 0 2006.229.11:51:31.46#ibcon#read 6, iclass 7, count 0 2006.229.11:51:31.46#ibcon#end of sib2, iclass 7, count 0 2006.229.11:51:31.46#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:51:31.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:51:31.46#ibcon#[27=USB\r\n] 2006.229.11:51:31.46#ibcon#*before write, iclass 7, count 0 2006.229.11:51:31.46#ibcon#enter sib2, iclass 7, count 0 2006.229.11:51:31.46#ibcon#flushed, iclass 7, count 0 2006.229.11:51:31.46#ibcon#about to write, iclass 7, count 0 2006.229.11:51:31.46#ibcon#wrote, iclass 7, count 0 2006.229.11:51:31.46#ibcon#about to read 3, iclass 7, count 0 2006.229.11:51:31.49#ibcon#read 3, iclass 7, count 0 2006.229.11:51:31.49#ibcon#about to read 4, iclass 7, count 0 2006.229.11:51:31.49#ibcon#read 4, iclass 7, count 0 2006.229.11:51:31.49#ibcon#about to read 5, iclass 7, count 0 2006.229.11:51:31.49#ibcon#read 5, iclass 7, count 0 2006.229.11:51:31.49#ibcon#about to read 6, iclass 7, count 0 2006.229.11:51:31.49#ibcon#read 6, iclass 7, count 0 2006.229.11:51:31.49#ibcon#end of sib2, iclass 7, count 0 2006.229.11:51:31.49#ibcon#*after write, iclass 7, count 0 2006.229.11:51:31.49#ibcon#*before return 0, iclass 7, count 0 2006.229.11:51:31.49#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:31.49#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.11:51:31.49#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:51:31.49#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:51:31.49$vck44/vblo=3,649.99 2006.229.11:51:31.49#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.11:51:31.49#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.11:51:31.49#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:31.49#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:31.49#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:31.49#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:31.49#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:51:31.49#ibcon#first serial, iclass 11, count 0 2006.229.11:51:31.49#ibcon#enter sib2, iclass 11, count 0 2006.229.11:51:31.49#ibcon#flushed, iclass 11, count 0 2006.229.11:51:31.49#ibcon#about to write, iclass 11, count 0 2006.229.11:51:31.49#ibcon#wrote, iclass 11, count 0 2006.229.11:51:31.49#ibcon#about to read 3, iclass 11, count 0 2006.229.11:51:31.51#ibcon#read 3, iclass 11, count 0 2006.229.11:51:31.51#ibcon#about to read 4, iclass 11, count 0 2006.229.11:51:31.51#ibcon#read 4, iclass 11, count 0 2006.229.11:51:31.51#ibcon#about to read 5, iclass 11, count 0 2006.229.11:51:31.51#ibcon#read 5, iclass 11, count 0 2006.229.11:51:31.51#ibcon#about to read 6, iclass 11, count 0 2006.229.11:51:31.51#ibcon#read 6, iclass 11, count 0 2006.229.11:51:31.51#ibcon#end of sib2, iclass 11, count 0 2006.229.11:51:31.51#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:51:31.51#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:51:31.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:51:31.51#ibcon#*before write, iclass 11, count 0 2006.229.11:51:31.51#ibcon#enter sib2, iclass 11, count 0 2006.229.11:51:31.51#ibcon#flushed, iclass 11, count 0 2006.229.11:51:31.51#ibcon#about to write, iclass 11, count 0 2006.229.11:51:31.51#ibcon#wrote, iclass 11, count 0 2006.229.11:51:31.51#ibcon#about to read 3, iclass 11, count 0 2006.229.11:51:31.55#ibcon#read 3, iclass 11, count 0 2006.229.11:51:31.55#ibcon#about to read 4, iclass 11, count 0 2006.229.11:51:31.55#ibcon#read 4, iclass 11, count 0 2006.229.11:51:31.55#ibcon#about to read 5, iclass 11, count 0 2006.229.11:51:31.55#ibcon#read 5, iclass 11, count 0 2006.229.11:51:31.55#ibcon#about to read 6, iclass 11, count 0 2006.229.11:51:31.55#ibcon#read 6, iclass 11, count 0 2006.229.11:51:31.55#ibcon#end of sib2, iclass 11, count 0 2006.229.11:51:31.55#ibcon#*after write, iclass 11, count 0 2006.229.11:51:31.55#ibcon#*before return 0, iclass 11, count 0 2006.229.11:51:31.55#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:31.55#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.11:51:31.55#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:51:31.55#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:51:31.55$vck44/vb=3,4 2006.229.11:51:31.55#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.11:51:31.55#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.11:51:31.55#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:31.55#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:31.61#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:31.61#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:31.61#ibcon#enter wrdev, iclass 13, count 2 2006.229.11:51:31.61#ibcon#first serial, iclass 13, count 2 2006.229.11:51:31.61#ibcon#enter sib2, iclass 13, count 2 2006.229.11:51:31.61#ibcon#flushed, iclass 13, count 2 2006.229.11:51:31.61#ibcon#about to write, iclass 13, count 2 2006.229.11:51:31.61#ibcon#wrote, iclass 13, count 2 2006.229.11:51:31.61#ibcon#about to read 3, iclass 13, count 2 2006.229.11:51:31.63#ibcon#read 3, iclass 13, count 2 2006.229.11:51:31.63#ibcon#about to read 4, iclass 13, count 2 2006.229.11:51:31.63#ibcon#read 4, iclass 13, count 2 2006.229.11:51:31.63#ibcon#about to read 5, iclass 13, count 2 2006.229.11:51:31.63#ibcon#read 5, iclass 13, count 2 2006.229.11:51:31.63#ibcon#about to read 6, iclass 13, count 2 2006.229.11:51:31.63#ibcon#read 6, iclass 13, count 2 2006.229.11:51:31.63#ibcon#end of sib2, iclass 13, count 2 2006.229.11:51:31.63#ibcon#*mode == 0, iclass 13, count 2 2006.229.11:51:31.63#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.11:51:31.63#ibcon#[27=AT03-04\r\n] 2006.229.11:51:31.63#ibcon#*before write, iclass 13, count 2 2006.229.11:51:31.63#ibcon#enter sib2, iclass 13, count 2 2006.229.11:51:31.63#ibcon#flushed, iclass 13, count 2 2006.229.11:51:31.63#ibcon#about to write, iclass 13, count 2 2006.229.11:51:31.63#ibcon#wrote, iclass 13, count 2 2006.229.11:51:31.63#ibcon#about to read 3, iclass 13, count 2 2006.229.11:51:31.66#ibcon#read 3, iclass 13, count 2 2006.229.11:51:31.66#ibcon#about to read 4, iclass 13, count 2 2006.229.11:51:31.66#ibcon#read 4, iclass 13, count 2 2006.229.11:51:31.66#ibcon#about to read 5, iclass 13, count 2 2006.229.11:51:31.66#ibcon#read 5, iclass 13, count 2 2006.229.11:51:31.66#ibcon#about to read 6, iclass 13, count 2 2006.229.11:51:31.66#ibcon#read 6, iclass 13, count 2 2006.229.11:51:31.66#ibcon#end of sib2, iclass 13, count 2 2006.229.11:51:31.66#ibcon#*after write, iclass 13, count 2 2006.229.11:51:31.66#ibcon#*before return 0, iclass 13, count 2 2006.229.11:51:31.66#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:31.66#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.11:51:31.66#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.11:51:31.66#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:31.66#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:31.78#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:31.78#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:31.78#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:51:31.78#ibcon#first serial, iclass 13, count 0 2006.229.11:51:31.78#ibcon#enter sib2, iclass 13, count 0 2006.229.11:51:31.78#ibcon#flushed, iclass 13, count 0 2006.229.11:51:31.78#ibcon#about to write, iclass 13, count 0 2006.229.11:51:31.78#ibcon#wrote, iclass 13, count 0 2006.229.11:51:31.78#ibcon#about to read 3, iclass 13, count 0 2006.229.11:51:31.80#ibcon#read 3, iclass 13, count 0 2006.229.11:51:31.80#ibcon#about to read 4, iclass 13, count 0 2006.229.11:51:31.80#ibcon#read 4, iclass 13, count 0 2006.229.11:51:31.80#ibcon#about to read 5, iclass 13, count 0 2006.229.11:51:31.80#ibcon#read 5, iclass 13, count 0 2006.229.11:51:31.80#ibcon#about to read 6, iclass 13, count 0 2006.229.11:51:31.80#ibcon#read 6, iclass 13, count 0 2006.229.11:51:31.80#ibcon#end of sib2, iclass 13, count 0 2006.229.11:51:31.80#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:51:31.80#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:51:31.80#ibcon#[27=USB\r\n] 2006.229.11:51:31.80#ibcon#*before write, iclass 13, count 0 2006.229.11:51:31.80#ibcon#enter sib2, iclass 13, count 0 2006.229.11:51:31.80#ibcon#flushed, iclass 13, count 0 2006.229.11:51:31.80#ibcon#about to write, iclass 13, count 0 2006.229.11:51:31.80#ibcon#wrote, iclass 13, count 0 2006.229.11:51:31.80#ibcon#about to read 3, iclass 13, count 0 2006.229.11:51:31.83#ibcon#read 3, iclass 13, count 0 2006.229.11:51:31.83#ibcon#about to read 4, iclass 13, count 0 2006.229.11:51:31.83#ibcon#read 4, iclass 13, count 0 2006.229.11:51:31.83#ibcon#about to read 5, iclass 13, count 0 2006.229.11:51:31.83#ibcon#read 5, iclass 13, count 0 2006.229.11:51:31.83#ibcon#about to read 6, iclass 13, count 0 2006.229.11:51:31.83#ibcon#read 6, iclass 13, count 0 2006.229.11:51:31.83#ibcon#end of sib2, iclass 13, count 0 2006.229.11:51:31.83#ibcon#*after write, iclass 13, count 0 2006.229.11:51:31.83#ibcon#*before return 0, iclass 13, count 0 2006.229.11:51:31.83#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:31.83#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.11:51:31.83#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:51:31.83#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:51:31.83$vck44/vblo=4,679.99 2006.229.11:51:31.83#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.11:51:31.83#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.11:51:31.83#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:31.83#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:31.83#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:31.83#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:31.83#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:51:31.83#ibcon#first serial, iclass 15, count 0 2006.229.11:51:31.83#ibcon#enter sib2, iclass 15, count 0 2006.229.11:51:31.83#ibcon#flushed, iclass 15, count 0 2006.229.11:51:31.83#ibcon#about to write, iclass 15, count 0 2006.229.11:51:31.83#ibcon#wrote, iclass 15, count 0 2006.229.11:51:31.83#ibcon#about to read 3, iclass 15, count 0 2006.229.11:51:31.85#ibcon#read 3, iclass 15, count 0 2006.229.11:51:31.85#ibcon#about to read 4, iclass 15, count 0 2006.229.11:51:31.85#ibcon#read 4, iclass 15, count 0 2006.229.11:51:31.85#ibcon#about to read 5, iclass 15, count 0 2006.229.11:51:31.85#ibcon#read 5, iclass 15, count 0 2006.229.11:51:31.85#ibcon#about to read 6, iclass 15, count 0 2006.229.11:51:31.85#ibcon#read 6, iclass 15, count 0 2006.229.11:51:31.85#ibcon#end of sib2, iclass 15, count 0 2006.229.11:51:31.85#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:51:31.85#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:51:31.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:51:31.85#ibcon#*before write, iclass 15, count 0 2006.229.11:51:31.85#ibcon#enter sib2, iclass 15, count 0 2006.229.11:51:31.85#ibcon#flushed, iclass 15, count 0 2006.229.11:51:31.85#ibcon#about to write, iclass 15, count 0 2006.229.11:51:31.85#ibcon#wrote, iclass 15, count 0 2006.229.11:51:31.85#ibcon#about to read 3, iclass 15, count 0 2006.229.11:51:31.89#ibcon#read 3, iclass 15, count 0 2006.229.11:51:31.89#ibcon#about to read 4, iclass 15, count 0 2006.229.11:51:31.89#ibcon#read 4, iclass 15, count 0 2006.229.11:51:31.89#ibcon#about to read 5, iclass 15, count 0 2006.229.11:51:31.89#ibcon#read 5, iclass 15, count 0 2006.229.11:51:31.89#ibcon#about to read 6, iclass 15, count 0 2006.229.11:51:31.89#ibcon#read 6, iclass 15, count 0 2006.229.11:51:31.89#ibcon#end of sib2, iclass 15, count 0 2006.229.11:51:31.89#ibcon#*after write, iclass 15, count 0 2006.229.11:51:31.89#ibcon#*before return 0, iclass 15, count 0 2006.229.11:51:31.89#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:31.89#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.11:51:31.89#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:51:31.89#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:51:31.89$vck44/vb=4,4 2006.229.11:51:31.89#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.11:51:31.89#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.11:51:31.89#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:31.89#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:51:31.95#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:51:31.95#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:51:31.95#ibcon#enter wrdev, iclass 17, count 2 2006.229.11:51:31.95#ibcon#first serial, iclass 17, count 2 2006.229.11:51:31.95#ibcon#enter sib2, iclass 17, count 2 2006.229.11:51:31.95#ibcon#flushed, iclass 17, count 2 2006.229.11:51:31.95#ibcon#about to write, iclass 17, count 2 2006.229.11:51:31.95#ibcon#wrote, iclass 17, count 2 2006.229.11:51:31.95#ibcon#about to read 3, iclass 17, count 2 2006.229.11:51:31.97#ibcon#read 3, iclass 17, count 2 2006.229.11:51:31.97#ibcon#about to read 4, iclass 17, count 2 2006.229.11:51:31.97#ibcon#read 4, iclass 17, count 2 2006.229.11:51:31.97#ibcon#about to read 5, iclass 17, count 2 2006.229.11:51:31.97#ibcon#read 5, iclass 17, count 2 2006.229.11:51:31.97#ibcon#about to read 6, iclass 17, count 2 2006.229.11:51:31.97#ibcon#read 6, iclass 17, count 2 2006.229.11:51:31.97#ibcon#end of sib2, iclass 17, count 2 2006.229.11:51:31.97#ibcon#*mode == 0, iclass 17, count 2 2006.229.11:51:31.97#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.11:51:31.97#ibcon#[27=AT04-04\r\n] 2006.229.11:51:31.97#ibcon#*before write, iclass 17, count 2 2006.229.11:51:31.97#ibcon#enter sib2, iclass 17, count 2 2006.229.11:51:31.97#ibcon#flushed, iclass 17, count 2 2006.229.11:51:31.97#ibcon#about to write, iclass 17, count 2 2006.229.11:51:31.97#ibcon#wrote, iclass 17, count 2 2006.229.11:51:31.97#ibcon#about to read 3, iclass 17, count 2 2006.229.11:51:32.00#ibcon#read 3, iclass 17, count 2 2006.229.11:51:32.00#ibcon#about to read 4, iclass 17, count 2 2006.229.11:51:32.00#ibcon#read 4, iclass 17, count 2 2006.229.11:51:32.00#ibcon#about to read 5, iclass 17, count 2 2006.229.11:51:32.00#ibcon#read 5, iclass 17, count 2 2006.229.11:51:32.00#ibcon#about to read 6, iclass 17, count 2 2006.229.11:51:32.00#ibcon#read 6, iclass 17, count 2 2006.229.11:51:32.00#ibcon#end of sib2, iclass 17, count 2 2006.229.11:51:32.00#ibcon#*after write, iclass 17, count 2 2006.229.11:51:32.00#ibcon#*before return 0, iclass 17, count 2 2006.229.11:51:32.00#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:51:32.00#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.11:51:32.00#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.11:51:32.00#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:32.00#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:51:32.12#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:51:32.12#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:51:32.12#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:51:32.12#ibcon#first serial, iclass 17, count 0 2006.229.11:51:32.12#ibcon#enter sib2, iclass 17, count 0 2006.229.11:51:32.12#ibcon#flushed, iclass 17, count 0 2006.229.11:51:32.12#ibcon#about to write, iclass 17, count 0 2006.229.11:51:32.12#ibcon#wrote, iclass 17, count 0 2006.229.11:51:32.12#ibcon#about to read 3, iclass 17, count 0 2006.229.11:51:32.14#ibcon#read 3, iclass 17, count 0 2006.229.11:51:32.14#ibcon#about to read 4, iclass 17, count 0 2006.229.11:51:32.14#ibcon#read 4, iclass 17, count 0 2006.229.11:51:32.14#ibcon#about to read 5, iclass 17, count 0 2006.229.11:51:32.14#ibcon#read 5, iclass 17, count 0 2006.229.11:51:32.14#ibcon#about to read 6, iclass 17, count 0 2006.229.11:51:32.14#ibcon#read 6, iclass 17, count 0 2006.229.11:51:32.14#ibcon#end of sib2, iclass 17, count 0 2006.229.11:51:32.14#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:51:32.14#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:51:32.14#ibcon#[27=USB\r\n] 2006.229.11:51:32.14#ibcon#*before write, iclass 17, count 0 2006.229.11:51:32.14#ibcon#enter sib2, iclass 17, count 0 2006.229.11:51:32.14#ibcon#flushed, iclass 17, count 0 2006.229.11:51:32.14#ibcon#about to write, iclass 17, count 0 2006.229.11:51:32.14#ibcon#wrote, iclass 17, count 0 2006.229.11:51:32.14#ibcon#about to read 3, iclass 17, count 0 2006.229.11:51:32.17#ibcon#read 3, iclass 17, count 0 2006.229.11:51:32.17#ibcon#about to read 4, iclass 17, count 0 2006.229.11:51:32.17#ibcon#read 4, iclass 17, count 0 2006.229.11:51:32.17#ibcon#about to read 5, iclass 17, count 0 2006.229.11:51:32.17#ibcon#read 5, iclass 17, count 0 2006.229.11:51:32.17#ibcon#about to read 6, iclass 17, count 0 2006.229.11:51:32.17#ibcon#read 6, iclass 17, count 0 2006.229.11:51:32.17#ibcon#end of sib2, iclass 17, count 0 2006.229.11:51:32.17#ibcon#*after write, iclass 17, count 0 2006.229.11:51:32.17#ibcon#*before return 0, iclass 17, count 0 2006.229.11:51:32.17#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:51:32.17#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.11:51:32.17#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:51:32.17#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:51:32.17$vck44/vblo=5,709.99 2006.229.11:51:32.17#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.11:51:32.17#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.11:51:32.17#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:32.17#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:51:32.17#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:51:32.17#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:51:32.17#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:51:32.17#ibcon#first serial, iclass 19, count 0 2006.229.11:51:32.17#ibcon#enter sib2, iclass 19, count 0 2006.229.11:51:32.17#ibcon#flushed, iclass 19, count 0 2006.229.11:51:32.17#ibcon#about to write, iclass 19, count 0 2006.229.11:51:32.17#ibcon#wrote, iclass 19, count 0 2006.229.11:51:32.17#ibcon#about to read 3, iclass 19, count 0 2006.229.11:51:32.19#ibcon#read 3, iclass 19, count 0 2006.229.11:51:32.19#ibcon#about to read 4, iclass 19, count 0 2006.229.11:51:32.19#ibcon#read 4, iclass 19, count 0 2006.229.11:51:32.19#ibcon#about to read 5, iclass 19, count 0 2006.229.11:51:32.19#ibcon#read 5, iclass 19, count 0 2006.229.11:51:32.19#ibcon#about to read 6, iclass 19, count 0 2006.229.11:51:32.19#ibcon#read 6, iclass 19, count 0 2006.229.11:51:32.19#ibcon#end of sib2, iclass 19, count 0 2006.229.11:51:32.19#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:51:32.19#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:51:32.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:51:32.19#ibcon#*before write, iclass 19, count 0 2006.229.11:51:32.19#ibcon#enter sib2, iclass 19, count 0 2006.229.11:51:32.19#ibcon#flushed, iclass 19, count 0 2006.229.11:51:32.19#ibcon#about to write, iclass 19, count 0 2006.229.11:51:32.19#ibcon#wrote, iclass 19, count 0 2006.229.11:51:32.19#ibcon#about to read 3, iclass 19, count 0 2006.229.11:51:32.23#ibcon#read 3, iclass 19, count 0 2006.229.11:51:32.23#ibcon#about to read 4, iclass 19, count 0 2006.229.11:51:32.23#ibcon#read 4, iclass 19, count 0 2006.229.11:51:32.23#ibcon#about to read 5, iclass 19, count 0 2006.229.11:51:32.23#ibcon#read 5, iclass 19, count 0 2006.229.11:51:32.23#ibcon#about to read 6, iclass 19, count 0 2006.229.11:51:32.23#ibcon#read 6, iclass 19, count 0 2006.229.11:51:32.23#ibcon#end of sib2, iclass 19, count 0 2006.229.11:51:32.23#ibcon#*after write, iclass 19, count 0 2006.229.11:51:32.23#ibcon#*before return 0, iclass 19, count 0 2006.229.11:51:32.23#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:51:32.23#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.11:51:32.23#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:51:32.23#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:51:32.23$vck44/vb=5,4 2006.229.11:51:32.23#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.11:51:32.23#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.11:51:32.23#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:32.23#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:51:32.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:51:32.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:51:32.29#ibcon#enter wrdev, iclass 21, count 2 2006.229.11:51:32.29#ibcon#first serial, iclass 21, count 2 2006.229.11:51:32.29#ibcon#enter sib2, iclass 21, count 2 2006.229.11:51:32.29#ibcon#flushed, iclass 21, count 2 2006.229.11:51:32.29#ibcon#about to write, iclass 21, count 2 2006.229.11:51:32.29#ibcon#wrote, iclass 21, count 2 2006.229.11:51:32.29#ibcon#about to read 3, iclass 21, count 2 2006.229.11:51:32.31#ibcon#read 3, iclass 21, count 2 2006.229.11:51:32.31#ibcon#about to read 4, iclass 21, count 2 2006.229.11:51:32.31#ibcon#read 4, iclass 21, count 2 2006.229.11:51:32.31#ibcon#about to read 5, iclass 21, count 2 2006.229.11:51:32.31#ibcon#read 5, iclass 21, count 2 2006.229.11:51:32.31#ibcon#about to read 6, iclass 21, count 2 2006.229.11:51:32.31#ibcon#read 6, iclass 21, count 2 2006.229.11:51:32.31#ibcon#end of sib2, iclass 21, count 2 2006.229.11:51:32.31#ibcon#*mode == 0, iclass 21, count 2 2006.229.11:51:32.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.11:51:32.31#ibcon#[27=AT05-04\r\n] 2006.229.11:51:32.31#ibcon#*before write, iclass 21, count 2 2006.229.11:51:32.31#ibcon#enter sib2, iclass 21, count 2 2006.229.11:51:32.31#ibcon#flushed, iclass 21, count 2 2006.229.11:51:32.31#ibcon#about to write, iclass 21, count 2 2006.229.11:51:32.31#ibcon#wrote, iclass 21, count 2 2006.229.11:51:32.31#ibcon#about to read 3, iclass 21, count 2 2006.229.11:51:32.34#ibcon#read 3, iclass 21, count 2 2006.229.11:51:32.34#ibcon#about to read 4, iclass 21, count 2 2006.229.11:51:32.34#ibcon#read 4, iclass 21, count 2 2006.229.11:51:32.34#ibcon#about to read 5, iclass 21, count 2 2006.229.11:51:32.34#ibcon#read 5, iclass 21, count 2 2006.229.11:51:32.34#ibcon#about to read 6, iclass 21, count 2 2006.229.11:51:32.34#ibcon#read 6, iclass 21, count 2 2006.229.11:51:32.34#ibcon#end of sib2, iclass 21, count 2 2006.229.11:51:32.34#ibcon#*after write, iclass 21, count 2 2006.229.11:51:32.34#ibcon#*before return 0, iclass 21, count 2 2006.229.11:51:32.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:51:32.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.11:51:32.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.11:51:32.34#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:32.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:51:32.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:51:32.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:51:32.46#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:51:32.46#ibcon#first serial, iclass 21, count 0 2006.229.11:51:32.46#ibcon#enter sib2, iclass 21, count 0 2006.229.11:51:32.46#ibcon#flushed, iclass 21, count 0 2006.229.11:51:32.46#ibcon#about to write, iclass 21, count 0 2006.229.11:51:32.46#ibcon#wrote, iclass 21, count 0 2006.229.11:51:32.46#ibcon#about to read 3, iclass 21, count 0 2006.229.11:51:32.48#ibcon#read 3, iclass 21, count 0 2006.229.11:51:32.48#ibcon#about to read 4, iclass 21, count 0 2006.229.11:51:32.48#ibcon#read 4, iclass 21, count 0 2006.229.11:51:32.48#ibcon#about to read 5, iclass 21, count 0 2006.229.11:51:32.48#ibcon#read 5, iclass 21, count 0 2006.229.11:51:32.48#ibcon#about to read 6, iclass 21, count 0 2006.229.11:51:32.48#ibcon#read 6, iclass 21, count 0 2006.229.11:51:32.48#ibcon#end of sib2, iclass 21, count 0 2006.229.11:51:32.48#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:51:32.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:51:32.48#ibcon#[27=USB\r\n] 2006.229.11:51:32.48#ibcon#*before write, iclass 21, count 0 2006.229.11:51:32.48#ibcon#enter sib2, iclass 21, count 0 2006.229.11:51:32.48#ibcon#flushed, iclass 21, count 0 2006.229.11:51:32.48#ibcon#about to write, iclass 21, count 0 2006.229.11:51:32.48#ibcon#wrote, iclass 21, count 0 2006.229.11:51:32.48#ibcon#about to read 3, iclass 21, count 0 2006.229.11:51:32.51#ibcon#read 3, iclass 21, count 0 2006.229.11:51:32.51#ibcon#about to read 4, iclass 21, count 0 2006.229.11:51:32.51#ibcon#read 4, iclass 21, count 0 2006.229.11:51:32.51#ibcon#about to read 5, iclass 21, count 0 2006.229.11:51:32.51#ibcon#read 5, iclass 21, count 0 2006.229.11:51:32.51#ibcon#about to read 6, iclass 21, count 0 2006.229.11:51:32.51#ibcon#read 6, iclass 21, count 0 2006.229.11:51:32.51#ibcon#end of sib2, iclass 21, count 0 2006.229.11:51:32.51#ibcon#*after write, iclass 21, count 0 2006.229.11:51:32.51#ibcon#*before return 0, iclass 21, count 0 2006.229.11:51:32.51#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:51:32.51#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.11:51:32.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:51:32.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:51:32.51$vck44/vblo=6,719.99 2006.229.11:51:32.51#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.11:51:32.51#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.11:51:32.51#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:32.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:32.51#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:32.51#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:32.51#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:51:32.51#ibcon#first serial, iclass 23, count 0 2006.229.11:51:32.51#ibcon#enter sib2, iclass 23, count 0 2006.229.11:51:32.51#ibcon#flushed, iclass 23, count 0 2006.229.11:51:32.51#ibcon#about to write, iclass 23, count 0 2006.229.11:51:32.51#ibcon#wrote, iclass 23, count 0 2006.229.11:51:32.51#ibcon#about to read 3, iclass 23, count 0 2006.229.11:51:32.53#ibcon#read 3, iclass 23, count 0 2006.229.11:51:32.53#ibcon#about to read 4, iclass 23, count 0 2006.229.11:51:32.53#ibcon#read 4, iclass 23, count 0 2006.229.11:51:32.53#ibcon#about to read 5, iclass 23, count 0 2006.229.11:51:32.53#ibcon#read 5, iclass 23, count 0 2006.229.11:51:32.53#ibcon#about to read 6, iclass 23, count 0 2006.229.11:51:32.53#ibcon#read 6, iclass 23, count 0 2006.229.11:51:32.53#ibcon#end of sib2, iclass 23, count 0 2006.229.11:51:32.53#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:51:32.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:51:32.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:51:32.53#ibcon#*before write, iclass 23, count 0 2006.229.11:51:32.53#ibcon#enter sib2, iclass 23, count 0 2006.229.11:51:32.53#ibcon#flushed, iclass 23, count 0 2006.229.11:51:32.53#ibcon#about to write, iclass 23, count 0 2006.229.11:51:32.53#ibcon#wrote, iclass 23, count 0 2006.229.11:51:32.53#ibcon#about to read 3, iclass 23, count 0 2006.229.11:51:32.57#ibcon#read 3, iclass 23, count 0 2006.229.11:51:32.57#ibcon#about to read 4, iclass 23, count 0 2006.229.11:51:32.57#ibcon#read 4, iclass 23, count 0 2006.229.11:51:32.57#ibcon#about to read 5, iclass 23, count 0 2006.229.11:51:32.57#ibcon#read 5, iclass 23, count 0 2006.229.11:51:32.57#ibcon#about to read 6, iclass 23, count 0 2006.229.11:51:32.57#ibcon#read 6, iclass 23, count 0 2006.229.11:51:32.57#ibcon#end of sib2, iclass 23, count 0 2006.229.11:51:32.57#ibcon#*after write, iclass 23, count 0 2006.229.11:51:32.57#ibcon#*before return 0, iclass 23, count 0 2006.229.11:51:32.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:32.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.11:51:32.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:51:32.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:51:32.57$vck44/vb=6,4 2006.229.11:51:32.57#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.11:51:32.57#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.11:51:32.57#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:32.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:32.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:32.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:32.63#ibcon#enter wrdev, iclass 25, count 2 2006.229.11:51:32.63#ibcon#first serial, iclass 25, count 2 2006.229.11:51:32.63#ibcon#enter sib2, iclass 25, count 2 2006.229.11:51:32.63#ibcon#flushed, iclass 25, count 2 2006.229.11:51:32.63#ibcon#about to write, iclass 25, count 2 2006.229.11:51:32.63#ibcon#wrote, iclass 25, count 2 2006.229.11:51:32.63#ibcon#about to read 3, iclass 25, count 2 2006.229.11:51:32.65#ibcon#read 3, iclass 25, count 2 2006.229.11:51:32.65#ibcon#about to read 4, iclass 25, count 2 2006.229.11:51:32.65#ibcon#read 4, iclass 25, count 2 2006.229.11:51:32.65#ibcon#about to read 5, iclass 25, count 2 2006.229.11:51:32.65#ibcon#read 5, iclass 25, count 2 2006.229.11:51:32.65#ibcon#about to read 6, iclass 25, count 2 2006.229.11:51:32.65#ibcon#read 6, iclass 25, count 2 2006.229.11:51:32.65#ibcon#end of sib2, iclass 25, count 2 2006.229.11:51:32.65#ibcon#*mode == 0, iclass 25, count 2 2006.229.11:51:32.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.11:51:32.65#ibcon#[27=AT06-04\r\n] 2006.229.11:51:32.65#ibcon#*before write, iclass 25, count 2 2006.229.11:51:32.65#ibcon#enter sib2, iclass 25, count 2 2006.229.11:51:32.65#ibcon#flushed, iclass 25, count 2 2006.229.11:51:32.65#ibcon#about to write, iclass 25, count 2 2006.229.11:51:32.65#ibcon#wrote, iclass 25, count 2 2006.229.11:51:32.65#ibcon#about to read 3, iclass 25, count 2 2006.229.11:51:32.68#ibcon#read 3, iclass 25, count 2 2006.229.11:51:32.68#ibcon#about to read 4, iclass 25, count 2 2006.229.11:51:32.68#ibcon#read 4, iclass 25, count 2 2006.229.11:51:32.68#ibcon#about to read 5, iclass 25, count 2 2006.229.11:51:32.68#ibcon#read 5, iclass 25, count 2 2006.229.11:51:32.68#ibcon#about to read 6, iclass 25, count 2 2006.229.11:51:32.68#ibcon#read 6, iclass 25, count 2 2006.229.11:51:32.68#ibcon#end of sib2, iclass 25, count 2 2006.229.11:51:32.68#ibcon#*after write, iclass 25, count 2 2006.229.11:51:32.68#ibcon#*before return 0, iclass 25, count 2 2006.229.11:51:32.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:32.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.11:51:32.68#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.11:51:32.68#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:32.68#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:32.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:32.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:32.80#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:51:32.80#ibcon#first serial, iclass 25, count 0 2006.229.11:51:32.80#ibcon#enter sib2, iclass 25, count 0 2006.229.11:51:32.80#ibcon#flushed, iclass 25, count 0 2006.229.11:51:32.80#ibcon#about to write, iclass 25, count 0 2006.229.11:51:32.80#ibcon#wrote, iclass 25, count 0 2006.229.11:51:32.80#ibcon#about to read 3, iclass 25, count 0 2006.229.11:51:32.82#ibcon#read 3, iclass 25, count 0 2006.229.11:51:32.82#ibcon#about to read 4, iclass 25, count 0 2006.229.11:51:32.82#ibcon#read 4, iclass 25, count 0 2006.229.11:51:32.82#ibcon#about to read 5, iclass 25, count 0 2006.229.11:51:32.82#ibcon#read 5, iclass 25, count 0 2006.229.11:51:32.82#ibcon#about to read 6, iclass 25, count 0 2006.229.11:51:32.82#ibcon#read 6, iclass 25, count 0 2006.229.11:51:32.82#ibcon#end of sib2, iclass 25, count 0 2006.229.11:51:32.82#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:51:32.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:51:32.82#ibcon#[27=USB\r\n] 2006.229.11:51:32.82#ibcon#*before write, iclass 25, count 0 2006.229.11:51:32.82#ibcon#enter sib2, iclass 25, count 0 2006.229.11:51:32.82#ibcon#flushed, iclass 25, count 0 2006.229.11:51:32.82#ibcon#about to write, iclass 25, count 0 2006.229.11:51:32.82#ibcon#wrote, iclass 25, count 0 2006.229.11:51:32.82#ibcon#about to read 3, iclass 25, count 0 2006.229.11:51:32.85#ibcon#read 3, iclass 25, count 0 2006.229.11:51:32.85#ibcon#about to read 4, iclass 25, count 0 2006.229.11:51:32.85#ibcon#read 4, iclass 25, count 0 2006.229.11:51:32.85#ibcon#about to read 5, iclass 25, count 0 2006.229.11:51:32.85#ibcon#read 5, iclass 25, count 0 2006.229.11:51:32.85#ibcon#about to read 6, iclass 25, count 0 2006.229.11:51:32.85#ibcon#read 6, iclass 25, count 0 2006.229.11:51:32.85#ibcon#end of sib2, iclass 25, count 0 2006.229.11:51:32.85#ibcon#*after write, iclass 25, count 0 2006.229.11:51:32.85#ibcon#*before return 0, iclass 25, count 0 2006.229.11:51:32.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:32.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.11:51:32.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:51:32.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:51:32.85$vck44/vblo=7,734.99 2006.229.11:51:32.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.11:51:32.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.11:51:32.85#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:32.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:32.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:32.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:32.85#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:51:32.85#ibcon#first serial, iclass 27, count 0 2006.229.11:51:32.85#ibcon#enter sib2, iclass 27, count 0 2006.229.11:51:32.85#ibcon#flushed, iclass 27, count 0 2006.229.11:51:32.85#ibcon#about to write, iclass 27, count 0 2006.229.11:51:32.85#ibcon#wrote, iclass 27, count 0 2006.229.11:51:32.85#ibcon#about to read 3, iclass 27, count 0 2006.229.11:51:32.87#ibcon#read 3, iclass 27, count 0 2006.229.11:51:32.87#ibcon#about to read 4, iclass 27, count 0 2006.229.11:51:32.87#ibcon#read 4, iclass 27, count 0 2006.229.11:51:32.87#ibcon#about to read 5, iclass 27, count 0 2006.229.11:51:32.87#ibcon#read 5, iclass 27, count 0 2006.229.11:51:32.87#ibcon#about to read 6, iclass 27, count 0 2006.229.11:51:32.87#ibcon#read 6, iclass 27, count 0 2006.229.11:51:32.87#ibcon#end of sib2, iclass 27, count 0 2006.229.11:51:32.87#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:51:32.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:51:32.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:51:32.87#ibcon#*before write, iclass 27, count 0 2006.229.11:51:32.87#ibcon#enter sib2, iclass 27, count 0 2006.229.11:51:32.87#ibcon#flushed, iclass 27, count 0 2006.229.11:51:32.87#ibcon#about to write, iclass 27, count 0 2006.229.11:51:32.87#ibcon#wrote, iclass 27, count 0 2006.229.11:51:32.87#ibcon#about to read 3, iclass 27, count 0 2006.229.11:51:32.91#ibcon#read 3, iclass 27, count 0 2006.229.11:51:32.91#ibcon#about to read 4, iclass 27, count 0 2006.229.11:51:32.91#ibcon#read 4, iclass 27, count 0 2006.229.11:51:32.91#ibcon#about to read 5, iclass 27, count 0 2006.229.11:51:32.91#ibcon#read 5, iclass 27, count 0 2006.229.11:51:32.91#ibcon#about to read 6, iclass 27, count 0 2006.229.11:51:32.91#ibcon#read 6, iclass 27, count 0 2006.229.11:51:32.91#ibcon#end of sib2, iclass 27, count 0 2006.229.11:51:32.91#ibcon#*after write, iclass 27, count 0 2006.229.11:51:32.91#ibcon#*before return 0, iclass 27, count 0 2006.229.11:51:32.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:32.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.11:51:32.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:51:32.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:51:32.91$vck44/vb=7,4 2006.229.11:51:32.91#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.11:51:32.91#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.11:51:32.91#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:32.91#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:32.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:32.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:32.97#ibcon#enter wrdev, iclass 29, count 2 2006.229.11:51:32.97#ibcon#first serial, iclass 29, count 2 2006.229.11:51:32.97#ibcon#enter sib2, iclass 29, count 2 2006.229.11:51:32.97#ibcon#flushed, iclass 29, count 2 2006.229.11:51:32.97#ibcon#about to write, iclass 29, count 2 2006.229.11:51:32.97#ibcon#wrote, iclass 29, count 2 2006.229.11:51:32.97#ibcon#about to read 3, iclass 29, count 2 2006.229.11:51:32.99#ibcon#read 3, iclass 29, count 2 2006.229.11:51:32.99#ibcon#about to read 4, iclass 29, count 2 2006.229.11:51:32.99#ibcon#read 4, iclass 29, count 2 2006.229.11:51:32.99#ibcon#about to read 5, iclass 29, count 2 2006.229.11:51:32.99#ibcon#read 5, iclass 29, count 2 2006.229.11:51:32.99#ibcon#about to read 6, iclass 29, count 2 2006.229.11:51:32.99#ibcon#read 6, iclass 29, count 2 2006.229.11:51:32.99#ibcon#end of sib2, iclass 29, count 2 2006.229.11:51:32.99#ibcon#*mode == 0, iclass 29, count 2 2006.229.11:51:32.99#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.11:51:32.99#ibcon#[27=AT07-04\r\n] 2006.229.11:51:32.99#ibcon#*before write, iclass 29, count 2 2006.229.11:51:32.99#ibcon#enter sib2, iclass 29, count 2 2006.229.11:51:32.99#ibcon#flushed, iclass 29, count 2 2006.229.11:51:32.99#ibcon#about to write, iclass 29, count 2 2006.229.11:51:32.99#ibcon#wrote, iclass 29, count 2 2006.229.11:51:32.99#ibcon#about to read 3, iclass 29, count 2 2006.229.11:51:33.02#ibcon#read 3, iclass 29, count 2 2006.229.11:51:33.02#ibcon#about to read 4, iclass 29, count 2 2006.229.11:51:33.02#ibcon#read 4, iclass 29, count 2 2006.229.11:51:33.02#ibcon#about to read 5, iclass 29, count 2 2006.229.11:51:33.02#ibcon#read 5, iclass 29, count 2 2006.229.11:51:33.02#ibcon#about to read 6, iclass 29, count 2 2006.229.11:51:33.02#ibcon#read 6, iclass 29, count 2 2006.229.11:51:33.02#ibcon#end of sib2, iclass 29, count 2 2006.229.11:51:33.02#ibcon#*after write, iclass 29, count 2 2006.229.11:51:33.02#ibcon#*before return 0, iclass 29, count 2 2006.229.11:51:33.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:33.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.11:51:33.02#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.11:51:33.02#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:33.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:33.14#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:33.14#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:33.14#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:51:33.14#ibcon#first serial, iclass 29, count 0 2006.229.11:51:33.14#ibcon#enter sib2, iclass 29, count 0 2006.229.11:51:33.14#ibcon#flushed, iclass 29, count 0 2006.229.11:51:33.14#ibcon#about to write, iclass 29, count 0 2006.229.11:51:33.14#ibcon#wrote, iclass 29, count 0 2006.229.11:51:33.14#ibcon#about to read 3, iclass 29, count 0 2006.229.11:51:33.16#ibcon#read 3, iclass 29, count 0 2006.229.11:51:33.16#ibcon#about to read 4, iclass 29, count 0 2006.229.11:51:33.16#ibcon#read 4, iclass 29, count 0 2006.229.11:51:33.16#ibcon#about to read 5, iclass 29, count 0 2006.229.11:51:33.16#ibcon#read 5, iclass 29, count 0 2006.229.11:51:33.16#ibcon#about to read 6, iclass 29, count 0 2006.229.11:51:33.16#ibcon#read 6, iclass 29, count 0 2006.229.11:51:33.16#ibcon#end of sib2, iclass 29, count 0 2006.229.11:51:33.16#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:51:33.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:51:33.16#ibcon#[27=USB\r\n] 2006.229.11:51:33.16#ibcon#*before write, iclass 29, count 0 2006.229.11:51:33.16#ibcon#enter sib2, iclass 29, count 0 2006.229.11:51:33.16#ibcon#flushed, iclass 29, count 0 2006.229.11:51:33.16#ibcon#about to write, iclass 29, count 0 2006.229.11:51:33.16#ibcon#wrote, iclass 29, count 0 2006.229.11:51:33.16#ibcon#about to read 3, iclass 29, count 0 2006.229.11:51:33.19#ibcon#read 3, iclass 29, count 0 2006.229.11:51:33.19#ibcon#about to read 4, iclass 29, count 0 2006.229.11:51:33.19#ibcon#read 4, iclass 29, count 0 2006.229.11:51:33.19#ibcon#about to read 5, iclass 29, count 0 2006.229.11:51:33.19#ibcon#read 5, iclass 29, count 0 2006.229.11:51:33.19#ibcon#about to read 6, iclass 29, count 0 2006.229.11:51:33.19#ibcon#read 6, iclass 29, count 0 2006.229.11:51:33.19#ibcon#end of sib2, iclass 29, count 0 2006.229.11:51:33.19#ibcon#*after write, iclass 29, count 0 2006.229.11:51:33.19#ibcon#*before return 0, iclass 29, count 0 2006.229.11:51:33.19#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:33.19#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.11:51:33.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:51:33.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:51:33.19$vck44/vblo=8,744.99 2006.229.11:51:33.19#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:51:33.19#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:51:33.19#ibcon#ireg 17 cls_cnt 0 2006.229.11:51:33.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:33.19#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:33.19#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:33.19#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:51:33.19#ibcon#first serial, iclass 31, count 0 2006.229.11:51:33.19#ibcon#enter sib2, iclass 31, count 0 2006.229.11:51:33.19#ibcon#flushed, iclass 31, count 0 2006.229.11:51:33.19#ibcon#about to write, iclass 31, count 0 2006.229.11:51:33.19#ibcon#wrote, iclass 31, count 0 2006.229.11:51:33.19#ibcon#about to read 3, iclass 31, count 0 2006.229.11:51:33.21#ibcon#read 3, iclass 31, count 0 2006.229.11:51:33.21#ibcon#about to read 4, iclass 31, count 0 2006.229.11:51:33.21#ibcon#read 4, iclass 31, count 0 2006.229.11:51:33.21#ibcon#about to read 5, iclass 31, count 0 2006.229.11:51:33.21#ibcon#read 5, iclass 31, count 0 2006.229.11:51:33.21#ibcon#about to read 6, iclass 31, count 0 2006.229.11:51:33.21#ibcon#read 6, iclass 31, count 0 2006.229.11:51:33.21#ibcon#end of sib2, iclass 31, count 0 2006.229.11:51:33.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:51:33.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:51:33.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:51:33.21#ibcon#*before write, iclass 31, count 0 2006.229.11:51:33.21#ibcon#enter sib2, iclass 31, count 0 2006.229.11:51:33.21#ibcon#flushed, iclass 31, count 0 2006.229.11:51:33.21#ibcon#about to write, iclass 31, count 0 2006.229.11:51:33.21#ibcon#wrote, iclass 31, count 0 2006.229.11:51:33.21#ibcon#about to read 3, iclass 31, count 0 2006.229.11:51:33.25#ibcon#read 3, iclass 31, count 0 2006.229.11:51:33.25#ibcon#about to read 4, iclass 31, count 0 2006.229.11:51:33.25#ibcon#read 4, iclass 31, count 0 2006.229.11:51:33.25#ibcon#about to read 5, iclass 31, count 0 2006.229.11:51:33.25#ibcon#read 5, iclass 31, count 0 2006.229.11:51:33.25#ibcon#about to read 6, iclass 31, count 0 2006.229.11:51:33.25#ibcon#read 6, iclass 31, count 0 2006.229.11:51:33.25#ibcon#end of sib2, iclass 31, count 0 2006.229.11:51:33.25#ibcon#*after write, iclass 31, count 0 2006.229.11:51:33.25#ibcon#*before return 0, iclass 31, count 0 2006.229.11:51:33.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:33.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:51:33.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:51:33.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:51:33.25$vck44/vb=8,4 2006.229.11:51:33.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.11:51:33.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.11:51:33.25#ibcon#ireg 11 cls_cnt 2 2006.229.11:51:33.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:33.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:33.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:33.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.11:51:33.31#ibcon#first serial, iclass 33, count 2 2006.229.11:51:33.31#ibcon#enter sib2, iclass 33, count 2 2006.229.11:51:33.31#ibcon#flushed, iclass 33, count 2 2006.229.11:51:33.31#ibcon#about to write, iclass 33, count 2 2006.229.11:51:33.31#ibcon#wrote, iclass 33, count 2 2006.229.11:51:33.31#ibcon#about to read 3, iclass 33, count 2 2006.229.11:51:33.33#ibcon#read 3, iclass 33, count 2 2006.229.11:51:33.33#ibcon#about to read 4, iclass 33, count 2 2006.229.11:51:33.33#ibcon#read 4, iclass 33, count 2 2006.229.11:51:33.33#ibcon#about to read 5, iclass 33, count 2 2006.229.11:51:33.33#ibcon#read 5, iclass 33, count 2 2006.229.11:51:33.33#ibcon#about to read 6, iclass 33, count 2 2006.229.11:51:33.33#ibcon#read 6, iclass 33, count 2 2006.229.11:51:33.33#ibcon#end of sib2, iclass 33, count 2 2006.229.11:51:33.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.11:51:33.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.11:51:33.33#ibcon#[27=AT08-04\r\n] 2006.229.11:51:33.33#ibcon#*before write, iclass 33, count 2 2006.229.11:51:33.33#ibcon#enter sib2, iclass 33, count 2 2006.229.11:51:33.33#ibcon#flushed, iclass 33, count 2 2006.229.11:51:33.33#ibcon#about to write, iclass 33, count 2 2006.229.11:51:33.33#ibcon#wrote, iclass 33, count 2 2006.229.11:51:33.33#ibcon#about to read 3, iclass 33, count 2 2006.229.11:51:33.36#ibcon#read 3, iclass 33, count 2 2006.229.11:51:33.36#ibcon#about to read 4, iclass 33, count 2 2006.229.11:51:33.36#ibcon#read 4, iclass 33, count 2 2006.229.11:51:33.36#ibcon#about to read 5, iclass 33, count 2 2006.229.11:51:33.36#ibcon#read 5, iclass 33, count 2 2006.229.11:51:33.36#ibcon#about to read 6, iclass 33, count 2 2006.229.11:51:33.36#ibcon#read 6, iclass 33, count 2 2006.229.11:51:33.36#ibcon#end of sib2, iclass 33, count 2 2006.229.11:51:33.36#ibcon#*after write, iclass 33, count 2 2006.229.11:51:33.36#ibcon#*before return 0, iclass 33, count 2 2006.229.11:51:33.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:33.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.11:51:33.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.11:51:33.36#ibcon#ireg 7 cls_cnt 0 2006.229.11:51:33.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:33.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:33.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:33.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:51:33.48#ibcon#first serial, iclass 33, count 0 2006.229.11:51:33.48#ibcon#enter sib2, iclass 33, count 0 2006.229.11:51:33.48#ibcon#flushed, iclass 33, count 0 2006.229.11:51:33.48#ibcon#about to write, iclass 33, count 0 2006.229.11:51:33.48#ibcon#wrote, iclass 33, count 0 2006.229.11:51:33.48#ibcon#about to read 3, iclass 33, count 0 2006.229.11:51:33.50#ibcon#read 3, iclass 33, count 0 2006.229.11:51:33.50#ibcon#about to read 4, iclass 33, count 0 2006.229.11:51:33.50#ibcon#read 4, iclass 33, count 0 2006.229.11:51:33.50#ibcon#about to read 5, iclass 33, count 0 2006.229.11:51:33.50#ibcon#read 5, iclass 33, count 0 2006.229.11:51:33.50#ibcon#about to read 6, iclass 33, count 0 2006.229.11:51:33.50#ibcon#read 6, iclass 33, count 0 2006.229.11:51:33.50#ibcon#end of sib2, iclass 33, count 0 2006.229.11:51:33.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:51:33.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:51:33.50#ibcon#[27=USB\r\n] 2006.229.11:51:33.50#ibcon#*before write, iclass 33, count 0 2006.229.11:51:33.50#ibcon#enter sib2, iclass 33, count 0 2006.229.11:51:33.50#ibcon#flushed, iclass 33, count 0 2006.229.11:51:33.50#ibcon#about to write, iclass 33, count 0 2006.229.11:51:33.50#ibcon#wrote, iclass 33, count 0 2006.229.11:51:33.50#ibcon#about to read 3, iclass 33, count 0 2006.229.11:51:33.53#ibcon#read 3, iclass 33, count 0 2006.229.11:51:33.53#ibcon#about to read 4, iclass 33, count 0 2006.229.11:51:33.53#ibcon#read 4, iclass 33, count 0 2006.229.11:51:33.53#ibcon#about to read 5, iclass 33, count 0 2006.229.11:51:33.53#ibcon#read 5, iclass 33, count 0 2006.229.11:51:33.53#ibcon#about to read 6, iclass 33, count 0 2006.229.11:51:33.53#ibcon#read 6, iclass 33, count 0 2006.229.11:51:33.53#ibcon#end of sib2, iclass 33, count 0 2006.229.11:51:33.53#ibcon#*after write, iclass 33, count 0 2006.229.11:51:33.53#ibcon#*before return 0, iclass 33, count 0 2006.229.11:51:33.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:33.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.11:51:33.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:51:33.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:51:33.53$vck44/vabw=wide 2006.229.11:51:33.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.11:51:33.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.11:51:33.53#ibcon#ireg 8 cls_cnt 0 2006.229.11:51:33.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:33.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:33.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:33.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:51:33.53#ibcon#first serial, iclass 35, count 0 2006.229.11:51:33.53#ibcon#enter sib2, iclass 35, count 0 2006.229.11:51:33.53#ibcon#flushed, iclass 35, count 0 2006.229.11:51:33.53#ibcon#about to write, iclass 35, count 0 2006.229.11:51:33.53#ibcon#wrote, iclass 35, count 0 2006.229.11:51:33.53#ibcon#about to read 3, iclass 35, count 0 2006.229.11:51:33.55#ibcon#read 3, iclass 35, count 0 2006.229.11:51:33.55#ibcon#about to read 4, iclass 35, count 0 2006.229.11:51:33.55#ibcon#read 4, iclass 35, count 0 2006.229.11:51:33.55#ibcon#about to read 5, iclass 35, count 0 2006.229.11:51:33.55#ibcon#read 5, iclass 35, count 0 2006.229.11:51:33.55#ibcon#about to read 6, iclass 35, count 0 2006.229.11:51:33.55#ibcon#read 6, iclass 35, count 0 2006.229.11:51:33.55#ibcon#end of sib2, iclass 35, count 0 2006.229.11:51:33.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:51:33.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:51:33.55#ibcon#[25=BW32\r\n] 2006.229.11:51:33.55#ibcon#*before write, iclass 35, count 0 2006.229.11:51:33.55#ibcon#enter sib2, iclass 35, count 0 2006.229.11:51:33.55#ibcon#flushed, iclass 35, count 0 2006.229.11:51:33.55#ibcon#about to write, iclass 35, count 0 2006.229.11:51:33.55#ibcon#wrote, iclass 35, count 0 2006.229.11:51:33.55#ibcon#about to read 3, iclass 35, count 0 2006.229.11:51:33.58#ibcon#read 3, iclass 35, count 0 2006.229.11:51:33.58#ibcon#about to read 4, iclass 35, count 0 2006.229.11:51:33.58#ibcon#read 4, iclass 35, count 0 2006.229.11:51:33.58#ibcon#about to read 5, iclass 35, count 0 2006.229.11:51:33.58#ibcon#read 5, iclass 35, count 0 2006.229.11:51:33.58#ibcon#about to read 6, iclass 35, count 0 2006.229.11:51:33.58#ibcon#read 6, iclass 35, count 0 2006.229.11:51:33.58#ibcon#end of sib2, iclass 35, count 0 2006.229.11:51:33.58#ibcon#*after write, iclass 35, count 0 2006.229.11:51:33.58#ibcon#*before return 0, iclass 35, count 0 2006.229.11:51:33.58#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:33.58#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.11:51:33.58#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:51:33.58#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:51:33.58$vck44/vbbw=wide 2006.229.11:51:33.58#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:51:33.58#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:51:33.58#ibcon#ireg 8 cls_cnt 0 2006.229.11:51:33.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:51:33.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:51:33.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:51:33.65#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:51:33.65#ibcon#first serial, iclass 37, count 0 2006.229.11:51:33.65#ibcon#enter sib2, iclass 37, count 0 2006.229.11:51:33.65#ibcon#flushed, iclass 37, count 0 2006.229.11:51:33.65#ibcon#about to write, iclass 37, count 0 2006.229.11:51:33.65#ibcon#wrote, iclass 37, count 0 2006.229.11:51:33.65#ibcon#about to read 3, iclass 37, count 0 2006.229.11:51:33.67#ibcon#read 3, iclass 37, count 0 2006.229.11:51:33.67#ibcon#about to read 4, iclass 37, count 0 2006.229.11:51:33.67#ibcon#read 4, iclass 37, count 0 2006.229.11:51:33.67#ibcon#about to read 5, iclass 37, count 0 2006.229.11:51:33.67#ibcon#read 5, iclass 37, count 0 2006.229.11:51:33.67#ibcon#about to read 6, iclass 37, count 0 2006.229.11:51:33.67#ibcon#read 6, iclass 37, count 0 2006.229.11:51:33.67#ibcon#end of sib2, iclass 37, count 0 2006.229.11:51:33.67#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:51:33.67#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:51:33.67#ibcon#[27=BW32\r\n] 2006.229.11:51:33.67#ibcon#*before write, iclass 37, count 0 2006.229.11:51:33.67#ibcon#enter sib2, iclass 37, count 0 2006.229.11:51:33.67#ibcon#flushed, iclass 37, count 0 2006.229.11:51:33.67#ibcon#about to write, iclass 37, count 0 2006.229.11:51:33.67#ibcon#wrote, iclass 37, count 0 2006.229.11:51:33.67#ibcon#about to read 3, iclass 37, count 0 2006.229.11:51:33.70#ibcon#read 3, iclass 37, count 0 2006.229.11:51:33.70#ibcon#about to read 4, iclass 37, count 0 2006.229.11:51:33.70#ibcon#read 4, iclass 37, count 0 2006.229.11:51:33.70#ibcon#about to read 5, iclass 37, count 0 2006.229.11:51:33.70#ibcon#read 5, iclass 37, count 0 2006.229.11:51:33.70#ibcon#about to read 6, iclass 37, count 0 2006.229.11:51:33.70#ibcon#read 6, iclass 37, count 0 2006.229.11:51:33.70#ibcon#end of sib2, iclass 37, count 0 2006.229.11:51:33.70#ibcon#*after write, iclass 37, count 0 2006.229.11:51:33.70#ibcon#*before return 0, iclass 37, count 0 2006.229.11:51:33.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:51:33.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:51:33.70#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:51:33.70#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:51:33.70$setupk4/ifdk4 2006.229.11:51:33.70$ifdk4/lo= 2006.229.11:51:33.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:51:33.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:51:33.70$ifdk4/patch= 2006.229.11:51:33.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:51:33.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:51:33.70$setupk4/!*+20s 2006.229.11:51:39.41#abcon#<5=/04 1.7 3.1 27.881001002.3\r\n> 2006.229.11:51:39.43#abcon#{5=INTERFACE CLEAR} 2006.229.11:51:39.49#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:51:43.14#trakl#Source acquired 2006.229.11:51:45.14#flagr#flagr/antenna,acquired 2006.229.11:51:48.20$setupk4/"tpicd 2006.229.11:51:48.20$setupk4/echo=off 2006.229.11:51:48.20$setupk4/xlog=off 2006.229.11:51:48.20:!2006.229.11:55:34 2006.229.11:55:34.00:preob 2006.229.11:55:34.13/onsource/TRACKING 2006.229.11:55:34.13:!2006.229.11:55:44 2006.229.11:55:44.00:"tape 2006.229.11:55:44.00:"st=record 2006.229.11:55:44.00:data_valid=on 2006.229.11:55:44.00:midob 2006.229.11:55:45.14/onsource/TRACKING 2006.229.11:55:45.14/wx/27.85,1002.2,100 2006.229.11:55:45.23/cable/+6.4066E-03 2006.229.11:55:46.32/va/01,08,usb,yes,31,33 2006.229.11:55:46.32/va/02,07,usb,yes,33,34 2006.229.11:55:46.32/va/03,06,usb,yes,41,44 2006.229.11:55:46.32/va/04,07,usb,yes,34,36 2006.229.11:55:46.32/va/05,04,usb,yes,31,31 2006.229.11:55:46.32/va/06,04,usb,yes,35,34 2006.229.11:55:46.32/va/07,05,usb,yes,31,31 2006.229.11:55:46.32/va/08,06,usb,yes,22,27 2006.229.11:55:46.55/valo/01,524.99,yes,locked 2006.229.11:55:46.55/valo/02,534.99,yes,locked 2006.229.11:55:46.55/valo/03,564.99,yes,locked 2006.229.11:55:46.55/valo/04,624.99,yes,locked 2006.229.11:55:46.55/valo/05,734.99,yes,locked 2006.229.11:55:46.55/valo/06,814.99,yes,locked 2006.229.11:55:46.55/valo/07,864.99,yes,locked 2006.229.11:55:46.55/valo/08,884.99,yes,locked 2006.229.11:55:47.64/vb/01,04,usb,yes,32,29 2006.229.11:55:47.64/vb/02,04,usb,yes,34,34 2006.229.11:55:47.64/vb/03,04,usb,yes,31,34 2006.229.11:55:47.64/vb/04,04,usb,yes,36,34 2006.229.11:55:47.64/vb/05,04,usb,yes,28,30 2006.229.11:55:47.64/vb/06,04,usb,yes,32,28 2006.229.11:55:47.64/vb/07,04,usb,yes,32,32 2006.229.11:55:47.64/vb/08,04,usb,yes,30,33 2006.229.11:55:47.87/vblo/01,629.99,yes,locked 2006.229.11:55:47.87/vblo/02,634.99,yes,locked 2006.229.11:55:47.87/vblo/03,649.99,yes,locked 2006.229.11:55:47.87/vblo/04,679.99,yes,locked 2006.229.11:55:47.87/vblo/05,709.99,yes,locked 2006.229.11:55:47.87/vblo/06,719.99,yes,locked 2006.229.11:55:47.87/vblo/07,734.99,yes,locked 2006.229.11:55:47.87/vblo/08,744.99,yes,locked 2006.229.11:55:48.02/vabw/8 2006.229.11:55:48.17/vbbw/8 2006.229.11:55:48.26/xfe/off,on,12.0 2006.229.11:55:48.65/ifatt/23,28,28,28 2006.229.11:55:49.07/fmout-gps/S +4.26E-07 2006.229.11:55:49.11:!2006.229.11:58:54 2006.229.11:58:54.00:data_valid=off 2006.229.11:58:54.00:"et 2006.229.11:58:54.00:!+3s 2006.229.11:58:57.01:"tape 2006.229.11:58:57.01:postob 2006.229.11:58:57.18/cable/+6.4062E-03 2006.229.11:58:57.18/wx/27.84,1002.2,100 2006.229.11:58:58.08/fmout-gps/S +4.21E-07 2006.229.11:58:58.08:scan_name=229-1201,jd0608,40 2006.229.11:58:58.08:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.11:58:59.14#flagr#flagr/antenna,new-source 2006.229.11:58:59.14:checkk5 2006.229.11:58:59.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.11:58:59.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.11:59:00.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.11:59:00.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.11:59:01.13/chk_obsdata//k5ts1/T2291155??a.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.11:59:01.54/chk_obsdata//k5ts2/T2291155??b.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.11:59:01.94/chk_obsdata//k5ts3/T2291155??c.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.11:59:02.34/chk_obsdata//k5ts4/T2291155??d.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.11:59:03.07/k5log//k5ts1_log_newline 2006.229.11:59:03.78/k5log//k5ts2_log_newline 2006.229.11:59:04.51/k5log//k5ts3_log_newline 2006.229.11:59:05.23/k5log//k5ts4_log_newline 2006.229.11:59:05.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.11:59:05.25:setupk4=1 2006.229.11:59:05.25$setupk4/echo=on 2006.229.11:59:05.25$setupk4/pcalon 2006.229.11:59:05.25$pcalon/"no phase cal control is implemented here 2006.229.11:59:05.25$setupk4/"tpicd=stop 2006.229.11:59:05.25$setupk4/"rec=synch_on 2006.229.11:59:05.25$setupk4/"rec_mode=128 2006.229.11:59:05.25$setupk4/!* 2006.229.11:59:05.25$setupk4/recpk4 2006.229.11:59:05.25$recpk4/recpatch= 2006.229.11:59:05.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.11:59:05.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.11:59:05.26$setupk4/vck44 2006.229.11:59:05.26$vck44/valo=1,524.99 2006.229.11:59:05.26#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.11:59:05.26#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.11:59:05.26#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:05.26#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:05.26#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:05.26#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:05.26#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:59:05.26#ibcon#first serial, iclass 33, count 0 2006.229.11:59:05.26#ibcon#enter sib2, iclass 33, count 0 2006.229.11:59:05.26#ibcon#flushed, iclass 33, count 0 2006.229.11:59:05.26#ibcon#about to write, iclass 33, count 0 2006.229.11:59:05.26#ibcon#wrote, iclass 33, count 0 2006.229.11:59:05.26#ibcon#about to read 3, iclass 33, count 0 2006.229.11:59:05.27#ibcon#read 3, iclass 33, count 0 2006.229.11:59:05.27#ibcon#about to read 4, iclass 33, count 0 2006.229.11:59:05.27#ibcon#read 4, iclass 33, count 0 2006.229.11:59:05.27#ibcon#about to read 5, iclass 33, count 0 2006.229.11:59:05.27#ibcon#read 5, iclass 33, count 0 2006.229.11:59:05.27#ibcon#about to read 6, iclass 33, count 0 2006.229.11:59:05.27#ibcon#read 6, iclass 33, count 0 2006.229.11:59:05.27#ibcon#end of sib2, iclass 33, count 0 2006.229.11:59:05.27#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:59:05.27#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:59:05.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.11:59:05.27#ibcon#*before write, iclass 33, count 0 2006.229.11:59:05.27#ibcon#enter sib2, iclass 33, count 0 2006.229.11:59:05.27#ibcon#flushed, iclass 33, count 0 2006.229.11:59:05.27#ibcon#about to write, iclass 33, count 0 2006.229.11:59:05.27#ibcon#wrote, iclass 33, count 0 2006.229.11:59:05.27#ibcon#about to read 3, iclass 33, count 0 2006.229.11:59:05.32#ibcon#read 3, iclass 33, count 0 2006.229.11:59:05.32#ibcon#about to read 4, iclass 33, count 0 2006.229.11:59:05.32#ibcon#read 4, iclass 33, count 0 2006.229.11:59:05.32#ibcon#about to read 5, iclass 33, count 0 2006.229.11:59:05.32#ibcon#read 5, iclass 33, count 0 2006.229.11:59:05.32#ibcon#about to read 6, iclass 33, count 0 2006.229.11:59:05.32#ibcon#read 6, iclass 33, count 0 2006.229.11:59:05.32#ibcon#end of sib2, iclass 33, count 0 2006.229.11:59:05.32#ibcon#*after write, iclass 33, count 0 2006.229.11:59:05.32#ibcon#*before return 0, iclass 33, count 0 2006.229.11:59:05.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:05.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:05.32#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:59:05.32#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:59:05.32$vck44/va=1,8 2006.229.11:59:05.32#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.11:59:05.32#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.11:59:05.32#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:05.32#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:05.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:05.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:05.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.11:59:05.32#ibcon#first serial, iclass 35, count 2 2006.229.11:59:05.32#ibcon#enter sib2, iclass 35, count 2 2006.229.11:59:05.32#ibcon#flushed, iclass 35, count 2 2006.229.11:59:05.32#ibcon#about to write, iclass 35, count 2 2006.229.11:59:05.32#ibcon#wrote, iclass 35, count 2 2006.229.11:59:05.32#ibcon#about to read 3, iclass 35, count 2 2006.229.11:59:05.34#ibcon#read 3, iclass 35, count 2 2006.229.11:59:05.34#ibcon#about to read 4, iclass 35, count 2 2006.229.11:59:05.34#ibcon#read 4, iclass 35, count 2 2006.229.11:59:05.34#ibcon#about to read 5, iclass 35, count 2 2006.229.11:59:05.34#ibcon#read 5, iclass 35, count 2 2006.229.11:59:05.34#ibcon#about to read 6, iclass 35, count 2 2006.229.11:59:05.34#ibcon#read 6, iclass 35, count 2 2006.229.11:59:05.34#ibcon#end of sib2, iclass 35, count 2 2006.229.11:59:05.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.11:59:05.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.11:59:05.34#ibcon#[25=AT01-08\r\n] 2006.229.11:59:05.34#ibcon#*before write, iclass 35, count 2 2006.229.11:59:05.34#ibcon#enter sib2, iclass 35, count 2 2006.229.11:59:05.34#ibcon#flushed, iclass 35, count 2 2006.229.11:59:05.34#ibcon#about to write, iclass 35, count 2 2006.229.11:59:05.34#ibcon#wrote, iclass 35, count 2 2006.229.11:59:05.34#ibcon#about to read 3, iclass 35, count 2 2006.229.11:59:05.37#ibcon#read 3, iclass 35, count 2 2006.229.11:59:05.37#ibcon#about to read 4, iclass 35, count 2 2006.229.11:59:05.37#ibcon#read 4, iclass 35, count 2 2006.229.11:59:05.37#ibcon#about to read 5, iclass 35, count 2 2006.229.11:59:05.37#ibcon#read 5, iclass 35, count 2 2006.229.11:59:05.37#ibcon#about to read 6, iclass 35, count 2 2006.229.11:59:05.37#ibcon#read 6, iclass 35, count 2 2006.229.11:59:05.37#ibcon#end of sib2, iclass 35, count 2 2006.229.11:59:05.37#ibcon#*after write, iclass 35, count 2 2006.229.11:59:05.37#ibcon#*before return 0, iclass 35, count 2 2006.229.11:59:05.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:05.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:05.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.11:59:05.37#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:05.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:05.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:05.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:05.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:59:05.49#ibcon#first serial, iclass 35, count 0 2006.229.11:59:05.49#ibcon#enter sib2, iclass 35, count 0 2006.229.11:59:05.49#ibcon#flushed, iclass 35, count 0 2006.229.11:59:05.49#ibcon#about to write, iclass 35, count 0 2006.229.11:59:05.49#ibcon#wrote, iclass 35, count 0 2006.229.11:59:05.49#ibcon#about to read 3, iclass 35, count 0 2006.229.11:59:05.51#ibcon#read 3, iclass 35, count 0 2006.229.11:59:05.51#ibcon#about to read 4, iclass 35, count 0 2006.229.11:59:05.51#ibcon#read 4, iclass 35, count 0 2006.229.11:59:05.51#ibcon#about to read 5, iclass 35, count 0 2006.229.11:59:05.51#ibcon#read 5, iclass 35, count 0 2006.229.11:59:05.51#ibcon#about to read 6, iclass 35, count 0 2006.229.11:59:05.51#ibcon#read 6, iclass 35, count 0 2006.229.11:59:05.51#ibcon#end of sib2, iclass 35, count 0 2006.229.11:59:05.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:59:05.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:59:05.51#ibcon#[25=USB\r\n] 2006.229.11:59:05.51#ibcon#*before write, iclass 35, count 0 2006.229.11:59:05.51#ibcon#enter sib2, iclass 35, count 0 2006.229.11:59:05.51#ibcon#flushed, iclass 35, count 0 2006.229.11:59:05.51#ibcon#about to write, iclass 35, count 0 2006.229.11:59:05.51#ibcon#wrote, iclass 35, count 0 2006.229.11:59:05.51#ibcon#about to read 3, iclass 35, count 0 2006.229.11:59:05.54#ibcon#read 3, iclass 35, count 0 2006.229.11:59:05.54#ibcon#about to read 4, iclass 35, count 0 2006.229.11:59:05.54#ibcon#read 4, iclass 35, count 0 2006.229.11:59:05.54#ibcon#about to read 5, iclass 35, count 0 2006.229.11:59:05.54#ibcon#read 5, iclass 35, count 0 2006.229.11:59:05.54#ibcon#about to read 6, iclass 35, count 0 2006.229.11:59:05.54#ibcon#read 6, iclass 35, count 0 2006.229.11:59:05.54#ibcon#end of sib2, iclass 35, count 0 2006.229.11:59:05.54#ibcon#*after write, iclass 35, count 0 2006.229.11:59:05.54#ibcon#*before return 0, iclass 35, count 0 2006.229.11:59:05.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:05.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:05.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:59:05.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:59:05.54$vck44/valo=2,534.99 2006.229.11:59:05.54#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:59:05.54#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:59:05.54#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:05.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:05.54#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:05.54#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:05.54#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:59:05.54#ibcon#first serial, iclass 37, count 0 2006.229.11:59:05.54#ibcon#enter sib2, iclass 37, count 0 2006.229.11:59:05.54#ibcon#flushed, iclass 37, count 0 2006.229.11:59:05.54#ibcon#about to write, iclass 37, count 0 2006.229.11:59:05.54#ibcon#wrote, iclass 37, count 0 2006.229.11:59:05.54#ibcon#about to read 3, iclass 37, count 0 2006.229.11:59:05.56#ibcon#read 3, iclass 37, count 0 2006.229.11:59:05.56#ibcon#about to read 4, iclass 37, count 0 2006.229.11:59:05.56#ibcon#read 4, iclass 37, count 0 2006.229.11:59:05.56#ibcon#about to read 5, iclass 37, count 0 2006.229.11:59:05.56#ibcon#read 5, iclass 37, count 0 2006.229.11:59:05.56#ibcon#about to read 6, iclass 37, count 0 2006.229.11:59:05.56#ibcon#read 6, iclass 37, count 0 2006.229.11:59:05.56#ibcon#end of sib2, iclass 37, count 0 2006.229.11:59:05.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:59:05.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:59:05.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.11:59:05.56#ibcon#*before write, iclass 37, count 0 2006.229.11:59:05.56#ibcon#enter sib2, iclass 37, count 0 2006.229.11:59:05.56#ibcon#flushed, iclass 37, count 0 2006.229.11:59:05.56#ibcon#about to write, iclass 37, count 0 2006.229.11:59:05.56#ibcon#wrote, iclass 37, count 0 2006.229.11:59:05.56#ibcon#about to read 3, iclass 37, count 0 2006.229.11:59:05.60#ibcon#read 3, iclass 37, count 0 2006.229.11:59:05.60#ibcon#about to read 4, iclass 37, count 0 2006.229.11:59:05.60#ibcon#read 4, iclass 37, count 0 2006.229.11:59:05.60#ibcon#about to read 5, iclass 37, count 0 2006.229.11:59:05.60#ibcon#read 5, iclass 37, count 0 2006.229.11:59:05.60#ibcon#about to read 6, iclass 37, count 0 2006.229.11:59:05.60#ibcon#read 6, iclass 37, count 0 2006.229.11:59:05.60#ibcon#end of sib2, iclass 37, count 0 2006.229.11:59:05.60#ibcon#*after write, iclass 37, count 0 2006.229.11:59:05.60#ibcon#*before return 0, iclass 37, count 0 2006.229.11:59:05.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:05.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:05.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:59:05.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:59:05.60$vck44/va=2,7 2006.229.11:59:05.60#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.11:59:05.60#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.11:59:05.60#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:05.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:05.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:05.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:05.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.11:59:05.66#ibcon#first serial, iclass 39, count 2 2006.229.11:59:05.66#ibcon#enter sib2, iclass 39, count 2 2006.229.11:59:05.66#ibcon#flushed, iclass 39, count 2 2006.229.11:59:05.66#ibcon#about to write, iclass 39, count 2 2006.229.11:59:05.66#ibcon#wrote, iclass 39, count 2 2006.229.11:59:05.66#ibcon#about to read 3, iclass 39, count 2 2006.229.11:59:05.68#ibcon#read 3, iclass 39, count 2 2006.229.11:59:05.68#ibcon#about to read 4, iclass 39, count 2 2006.229.11:59:05.68#ibcon#read 4, iclass 39, count 2 2006.229.11:59:05.68#ibcon#about to read 5, iclass 39, count 2 2006.229.11:59:05.68#ibcon#read 5, iclass 39, count 2 2006.229.11:59:05.68#ibcon#about to read 6, iclass 39, count 2 2006.229.11:59:05.68#ibcon#read 6, iclass 39, count 2 2006.229.11:59:05.68#ibcon#end of sib2, iclass 39, count 2 2006.229.11:59:05.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.11:59:05.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.11:59:05.68#ibcon#[25=AT02-07\r\n] 2006.229.11:59:05.68#ibcon#*before write, iclass 39, count 2 2006.229.11:59:05.68#ibcon#enter sib2, iclass 39, count 2 2006.229.11:59:05.68#ibcon#flushed, iclass 39, count 2 2006.229.11:59:05.68#ibcon#about to write, iclass 39, count 2 2006.229.11:59:05.68#ibcon#wrote, iclass 39, count 2 2006.229.11:59:05.68#ibcon#about to read 3, iclass 39, count 2 2006.229.11:59:05.71#ibcon#read 3, iclass 39, count 2 2006.229.11:59:05.71#ibcon#about to read 4, iclass 39, count 2 2006.229.11:59:05.71#ibcon#read 4, iclass 39, count 2 2006.229.11:59:05.71#ibcon#about to read 5, iclass 39, count 2 2006.229.11:59:05.71#ibcon#read 5, iclass 39, count 2 2006.229.11:59:05.71#ibcon#about to read 6, iclass 39, count 2 2006.229.11:59:05.71#ibcon#read 6, iclass 39, count 2 2006.229.11:59:05.71#ibcon#end of sib2, iclass 39, count 2 2006.229.11:59:05.71#ibcon#*after write, iclass 39, count 2 2006.229.11:59:05.71#ibcon#*before return 0, iclass 39, count 2 2006.229.11:59:05.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:05.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:05.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.11:59:05.71#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:05.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:05.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:05.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:05.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:59:05.83#ibcon#first serial, iclass 39, count 0 2006.229.11:59:05.83#ibcon#enter sib2, iclass 39, count 0 2006.229.11:59:05.83#ibcon#flushed, iclass 39, count 0 2006.229.11:59:05.83#ibcon#about to write, iclass 39, count 0 2006.229.11:59:05.83#ibcon#wrote, iclass 39, count 0 2006.229.11:59:05.83#ibcon#about to read 3, iclass 39, count 0 2006.229.11:59:05.85#ibcon#read 3, iclass 39, count 0 2006.229.11:59:05.85#ibcon#about to read 4, iclass 39, count 0 2006.229.11:59:05.85#ibcon#read 4, iclass 39, count 0 2006.229.11:59:05.85#ibcon#about to read 5, iclass 39, count 0 2006.229.11:59:05.85#ibcon#read 5, iclass 39, count 0 2006.229.11:59:05.85#ibcon#about to read 6, iclass 39, count 0 2006.229.11:59:05.85#ibcon#read 6, iclass 39, count 0 2006.229.11:59:05.85#ibcon#end of sib2, iclass 39, count 0 2006.229.11:59:05.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:59:05.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:59:05.85#ibcon#[25=USB\r\n] 2006.229.11:59:05.85#ibcon#*before write, iclass 39, count 0 2006.229.11:59:05.85#ibcon#enter sib2, iclass 39, count 0 2006.229.11:59:05.85#ibcon#flushed, iclass 39, count 0 2006.229.11:59:05.85#ibcon#about to write, iclass 39, count 0 2006.229.11:59:05.85#ibcon#wrote, iclass 39, count 0 2006.229.11:59:05.85#ibcon#about to read 3, iclass 39, count 0 2006.229.11:59:05.88#ibcon#read 3, iclass 39, count 0 2006.229.11:59:05.88#ibcon#about to read 4, iclass 39, count 0 2006.229.11:59:05.88#ibcon#read 4, iclass 39, count 0 2006.229.11:59:05.88#ibcon#about to read 5, iclass 39, count 0 2006.229.11:59:05.88#ibcon#read 5, iclass 39, count 0 2006.229.11:59:05.88#ibcon#about to read 6, iclass 39, count 0 2006.229.11:59:05.88#ibcon#read 6, iclass 39, count 0 2006.229.11:59:05.88#ibcon#end of sib2, iclass 39, count 0 2006.229.11:59:05.88#ibcon#*after write, iclass 39, count 0 2006.229.11:59:05.88#ibcon#*before return 0, iclass 39, count 0 2006.229.11:59:05.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:05.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:05.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:59:05.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:59:05.88$vck44/valo=3,564.99 2006.229.11:59:05.88#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:59:05.88#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:59:05.88#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:05.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:05.88#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:05.88#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:05.88#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:59:05.88#ibcon#first serial, iclass 3, count 0 2006.229.11:59:05.88#ibcon#enter sib2, iclass 3, count 0 2006.229.11:59:05.88#ibcon#flushed, iclass 3, count 0 2006.229.11:59:05.88#ibcon#about to write, iclass 3, count 0 2006.229.11:59:05.88#ibcon#wrote, iclass 3, count 0 2006.229.11:59:05.88#ibcon#about to read 3, iclass 3, count 0 2006.229.11:59:05.90#ibcon#read 3, iclass 3, count 0 2006.229.11:59:05.90#ibcon#about to read 4, iclass 3, count 0 2006.229.11:59:05.90#ibcon#read 4, iclass 3, count 0 2006.229.11:59:05.90#ibcon#about to read 5, iclass 3, count 0 2006.229.11:59:05.90#ibcon#read 5, iclass 3, count 0 2006.229.11:59:05.90#ibcon#about to read 6, iclass 3, count 0 2006.229.11:59:05.90#ibcon#read 6, iclass 3, count 0 2006.229.11:59:05.90#ibcon#end of sib2, iclass 3, count 0 2006.229.11:59:05.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:59:05.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:59:05.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.11:59:05.90#ibcon#*before write, iclass 3, count 0 2006.229.11:59:05.90#ibcon#enter sib2, iclass 3, count 0 2006.229.11:59:05.90#ibcon#flushed, iclass 3, count 0 2006.229.11:59:05.90#ibcon#about to write, iclass 3, count 0 2006.229.11:59:05.90#ibcon#wrote, iclass 3, count 0 2006.229.11:59:05.90#ibcon#about to read 3, iclass 3, count 0 2006.229.11:59:05.94#ibcon#read 3, iclass 3, count 0 2006.229.11:59:05.94#ibcon#about to read 4, iclass 3, count 0 2006.229.11:59:05.94#ibcon#read 4, iclass 3, count 0 2006.229.11:59:05.94#ibcon#about to read 5, iclass 3, count 0 2006.229.11:59:05.94#ibcon#read 5, iclass 3, count 0 2006.229.11:59:05.94#ibcon#about to read 6, iclass 3, count 0 2006.229.11:59:05.94#ibcon#read 6, iclass 3, count 0 2006.229.11:59:05.94#ibcon#end of sib2, iclass 3, count 0 2006.229.11:59:05.94#ibcon#*after write, iclass 3, count 0 2006.229.11:59:05.94#ibcon#*before return 0, iclass 3, count 0 2006.229.11:59:05.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:05.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:05.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:59:05.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:59:05.94$vck44/va=3,6 2006.229.11:59:05.94#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.11:59:05.94#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.11:59:05.94#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:05.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:06.00#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:06.00#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:06.00#ibcon#enter wrdev, iclass 5, count 2 2006.229.11:59:06.00#ibcon#first serial, iclass 5, count 2 2006.229.11:59:06.00#ibcon#enter sib2, iclass 5, count 2 2006.229.11:59:06.00#ibcon#flushed, iclass 5, count 2 2006.229.11:59:06.00#ibcon#about to write, iclass 5, count 2 2006.229.11:59:06.00#ibcon#wrote, iclass 5, count 2 2006.229.11:59:06.00#ibcon#about to read 3, iclass 5, count 2 2006.229.11:59:06.02#ibcon#read 3, iclass 5, count 2 2006.229.11:59:06.02#ibcon#about to read 4, iclass 5, count 2 2006.229.11:59:06.02#ibcon#read 4, iclass 5, count 2 2006.229.11:59:06.02#ibcon#about to read 5, iclass 5, count 2 2006.229.11:59:06.02#ibcon#read 5, iclass 5, count 2 2006.229.11:59:06.02#ibcon#about to read 6, iclass 5, count 2 2006.229.11:59:06.02#ibcon#read 6, iclass 5, count 2 2006.229.11:59:06.02#ibcon#end of sib2, iclass 5, count 2 2006.229.11:59:06.02#ibcon#*mode == 0, iclass 5, count 2 2006.229.11:59:06.02#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.11:59:06.02#ibcon#[25=AT03-06\r\n] 2006.229.11:59:06.02#ibcon#*before write, iclass 5, count 2 2006.229.11:59:06.02#ibcon#enter sib2, iclass 5, count 2 2006.229.11:59:06.02#ibcon#flushed, iclass 5, count 2 2006.229.11:59:06.02#ibcon#about to write, iclass 5, count 2 2006.229.11:59:06.02#ibcon#wrote, iclass 5, count 2 2006.229.11:59:06.02#ibcon#about to read 3, iclass 5, count 2 2006.229.11:59:06.05#ibcon#read 3, iclass 5, count 2 2006.229.11:59:06.05#ibcon#about to read 4, iclass 5, count 2 2006.229.11:59:06.05#ibcon#read 4, iclass 5, count 2 2006.229.11:59:06.05#ibcon#about to read 5, iclass 5, count 2 2006.229.11:59:06.05#ibcon#read 5, iclass 5, count 2 2006.229.11:59:06.05#ibcon#about to read 6, iclass 5, count 2 2006.229.11:59:06.05#ibcon#read 6, iclass 5, count 2 2006.229.11:59:06.05#ibcon#end of sib2, iclass 5, count 2 2006.229.11:59:06.05#ibcon#*after write, iclass 5, count 2 2006.229.11:59:06.05#ibcon#*before return 0, iclass 5, count 2 2006.229.11:59:06.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:06.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:06.05#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.11:59:06.05#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:06.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:06.17#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:06.17#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:06.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:59:06.17#ibcon#first serial, iclass 5, count 0 2006.229.11:59:06.17#ibcon#enter sib2, iclass 5, count 0 2006.229.11:59:06.17#ibcon#flushed, iclass 5, count 0 2006.229.11:59:06.17#ibcon#about to write, iclass 5, count 0 2006.229.11:59:06.17#ibcon#wrote, iclass 5, count 0 2006.229.11:59:06.17#ibcon#about to read 3, iclass 5, count 0 2006.229.11:59:06.19#ibcon#read 3, iclass 5, count 0 2006.229.11:59:06.19#ibcon#about to read 4, iclass 5, count 0 2006.229.11:59:06.19#ibcon#read 4, iclass 5, count 0 2006.229.11:59:06.19#ibcon#about to read 5, iclass 5, count 0 2006.229.11:59:06.19#ibcon#read 5, iclass 5, count 0 2006.229.11:59:06.19#ibcon#about to read 6, iclass 5, count 0 2006.229.11:59:06.19#ibcon#read 6, iclass 5, count 0 2006.229.11:59:06.19#ibcon#end of sib2, iclass 5, count 0 2006.229.11:59:06.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:59:06.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:59:06.19#ibcon#[25=USB\r\n] 2006.229.11:59:06.19#ibcon#*before write, iclass 5, count 0 2006.229.11:59:06.19#ibcon#enter sib2, iclass 5, count 0 2006.229.11:59:06.19#ibcon#flushed, iclass 5, count 0 2006.229.11:59:06.19#ibcon#about to write, iclass 5, count 0 2006.229.11:59:06.19#ibcon#wrote, iclass 5, count 0 2006.229.11:59:06.19#ibcon#about to read 3, iclass 5, count 0 2006.229.11:59:06.22#ibcon#read 3, iclass 5, count 0 2006.229.11:59:06.22#ibcon#about to read 4, iclass 5, count 0 2006.229.11:59:06.22#ibcon#read 4, iclass 5, count 0 2006.229.11:59:06.22#ibcon#about to read 5, iclass 5, count 0 2006.229.11:59:06.22#ibcon#read 5, iclass 5, count 0 2006.229.11:59:06.22#ibcon#about to read 6, iclass 5, count 0 2006.229.11:59:06.22#ibcon#read 6, iclass 5, count 0 2006.229.11:59:06.22#ibcon#end of sib2, iclass 5, count 0 2006.229.11:59:06.22#ibcon#*after write, iclass 5, count 0 2006.229.11:59:06.22#ibcon#*before return 0, iclass 5, count 0 2006.229.11:59:06.22#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:06.22#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:06.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:59:06.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:59:06.22$vck44/valo=4,624.99 2006.229.11:59:06.22#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.11:59:06.22#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.11:59:06.22#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:06.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:06.22#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:06.22#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:06.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:59:06.22#ibcon#first serial, iclass 7, count 0 2006.229.11:59:06.22#ibcon#enter sib2, iclass 7, count 0 2006.229.11:59:06.22#ibcon#flushed, iclass 7, count 0 2006.229.11:59:06.22#ibcon#about to write, iclass 7, count 0 2006.229.11:59:06.22#ibcon#wrote, iclass 7, count 0 2006.229.11:59:06.22#ibcon#about to read 3, iclass 7, count 0 2006.229.11:59:06.24#ibcon#read 3, iclass 7, count 0 2006.229.11:59:06.24#ibcon#about to read 4, iclass 7, count 0 2006.229.11:59:06.24#ibcon#read 4, iclass 7, count 0 2006.229.11:59:06.24#ibcon#about to read 5, iclass 7, count 0 2006.229.11:59:06.24#ibcon#read 5, iclass 7, count 0 2006.229.11:59:06.24#ibcon#about to read 6, iclass 7, count 0 2006.229.11:59:06.24#ibcon#read 6, iclass 7, count 0 2006.229.11:59:06.24#ibcon#end of sib2, iclass 7, count 0 2006.229.11:59:06.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:59:06.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:59:06.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.11:59:06.24#ibcon#*before write, iclass 7, count 0 2006.229.11:59:06.24#ibcon#enter sib2, iclass 7, count 0 2006.229.11:59:06.24#ibcon#flushed, iclass 7, count 0 2006.229.11:59:06.24#ibcon#about to write, iclass 7, count 0 2006.229.11:59:06.24#ibcon#wrote, iclass 7, count 0 2006.229.11:59:06.24#ibcon#about to read 3, iclass 7, count 0 2006.229.11:59:06.28#ibcon#read 3, iclass 7, count 0 2006.229.11:59:06.28#ibcon#about to read 4, iclass 7, count 0 2006.229.11:59:06.28#ibcon#read 4, iclass 7, count 0 2006.229.11:59:06.28#ibcon#about to read 5, iclass 7, count 0 2006.229.11:59:06.28#ibcon#read 5, iclass 7, count 0 2006.229.11:59:06.28#ibcon#about to read 6, iclass 7, count 0 2006.229.11:59:06.28#ibcon#read 6, iclass 7, count 0 2006.229.11:59:06.28#ibcon#end of sib2, iclass 7, count 0 2006.229.11:59:06.28#ibcon#*after write, iclass 7, count 0 2006.229.11:59:06.28#ibcon#*before return 0, iclass 7, count 0 2006.229.11:59:06.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:06.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:06.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:59:06.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:59:06.28$vck44/va=4,7 2006.229.11:59:06.28#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.11:59:06.28#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.11:59:06.28#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:06.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:06.34#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:06.34#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:06.34#ibcon#enter wrdev, iclass 11, count 2 2006.229.11:59:06.34#ibcon#first serial, iclass 11, count 2 2006.229.11:59:06.34#ibcon#enter sib2, iclass 11, count 2 2006.229.11:59:06.34#ibcon#flushed, iclass 11, count 2 2006.229.11:59:06.34#ibcon#about to write, iclass 11, count 2 2006.229.11:59:06.34#ibcon#wrote, iclass 11, count 2 2006.229.11:59:06.34#ibcon#about to read 3, iclass 11, count 2 2006.229.11:59:06.36#ibcon#read 3, iclass 11, count 2 2006.229.11:59:06.36#ibcon#about to read 4, iclass 11, count 2 2006.229.11:59:06.36#ibcon#read 4, iclass 11, count 2 2006.229.11:59:06.36#ibcon#about to read 5, iclass 11, count 2 2006.229.11:59:06.36#ibcon#read 5, iclass 11, count 2 2006.229.11:59:06.36#ibcon#about to read 6, iclass 11, count 2 2006.229.11:59:06.36#ibcon#read 6, iclass 11, count 2 2006.229.11:59:06.36#ibcon#end of sib2, iclass 11, count 2 2006.229.11:59:06.36#ibcon#*mode == 0, iclass 11, count 2 2006.229.11:59:06.36#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.11:59:06.36#ibcon#[25=AT04-07\r\n] 2006.229.11:59:06.36#ibcon#*before write, iclass 11, count 2 2006.229.11:59:06.36#ibcon#enter sib2, iclass 11, count 2 2006.229.11:59:06.36#ibcon#flushed, iclass 11, count 2 2006.229.11:59:06.36#ibcon#about to write, iclass 11, count 2 2006.229.11:59:06.36#ibcon#wrote, iclass 11, count 2 2006.229.11:59:06.36#ibcon#about to read 3, iclass 11, count 2 2006.229.11:59:06.39#ibcon#read 3, iclass 11, count 2 2006.229.11:59:06.39#ibcon#about to read 4, iclass 11, count 2 2006.229.11:59:06.39#ibcon#read 4, iclass 11, count 2 2006.229.11:59:06.39#ibcon#about to read 5, iclass 11, count 2 2006.229.11:59:06.39#ibcon#read 5, iclass 11, count 2 2006.229.11:59:06.39#ibcon#about to read 6, iclass 11, count 2 2006.229.11:59:06.39#ibcon#read 6, iclass 11, count 2 2006.229.11:59:06.39#ibcon#end of sib2, iclass 11, count 2 2006.229.11:59:06.39#ibcon#*after write, iclass 11, count 2 2006.229.11:59:06.39#ibcon#*before return 0, iclass 11, count 2 2006.229.11:59:06.39#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:06.39#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:06.41#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.11:59:06.41#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:06.41#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:06.51#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:06.51#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:06.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:59:06.51#ibcon#first serial, iclass 11, count 0 2006.229.11:59:06.51#ibcon#enter sib2, iclass 11, count 0 2006.229.11:59:06.51#ibcon#flushed, iclass 11, count 0 2006.229.11:59:06.51#ibcon#about to write, iclass 11, count 0 2006.229.11:59:06.51#ibcon#wrote, iclass 11, count 0 2006.229.11:59:06.51#ibcon#about to read 3, iclass 11, count 0 2006.229.11:59:06.53#ibcon#read 3, iclass 11, count 0 2006.229.11:59:06.53#ibcon#about to read 4, iclass 11, count 0 2006.229.11:59:06.53#ibcon#read 4, iclass 11, count 0 2006.229.11:59:06.53#ibcon#about to read 5, iclass 11, count 0 2006.229.11:59:06.53#ibcon#read 5, iclass 11, count 0 2006.229.11:59:06.53#ibcon#about to read 6, iclass 11, count 0 2006.229.11:59:06.53#ibcon#read 6, iclass 11, count 0 2006.229.11:59:06.53#ibcon#end of sib2, iclass 11, count 0 2006.229.11:59:06.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:59:06.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:59:06.53#ibcon#[25=USB\r\n] 2006.229.11:59:06.53#ibcon#*before write, iclass 11, count 0 2006.229.11:59:06.53#ibcon#enter sib2, iclass 11, count 0 2006.229.11:59:06.53#ibcon#flushed, iclass 11, count 0 2006.229.11:59:06.53#ibcon#about to write, iclass 11, count 0 2006.229.11:59:06.53#ibcon#wrote, iclass 11, count 0 2006.229.11:59:06.53#ibcon#about to read 3, iclass 11, count 0 2006.229.11:59:06.56#ibcon#read 3, iclass 11, count 0 2006.229.11:59:06.56#ibcon#about to read 4, iclass 11, count 0 2006.229.11:59:06.56#ibcon#read 4, iclass 11, count 0 2006.229.11:59:06.56#ibcon#about to read 5, iclass 11, count 0 2006.229.11:59:06.56#ibcon#read 5, iclass 11, count 0 2006.229.11:59:06.56#ibcon#about to read 6, iclass 11, count 0 2006.229.11:59:06.56#ibcon#read 6, iclass 11, count 0 2006.229.11:59:06.56#ibcon#end of sib2, iclass 11, count 0 2006.229.11:59:06.56#ibcon#*after write, iclass 11, count 0 2006.229.11:59:06.56#ibcon#*before return 0, iclass 11, count 0 2006.229.11:59:06.56#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:06.56#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:06.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:59:06.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:59:06.56$vck44/valo=5,734.99 2006.229.11:59:06.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.11:59:06.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.11:59:06.56#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:06.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:06.56#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:06.56#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:06.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:59:06.56#ibcon#first serial, iclass 13, count 0 2006.229.11:59:06.56#ibcon#enter sib2, iclass 13, count 0 2006.229.11:59:06.56#ibcon#flushed, iclass 13, count 0 2006.229.11:59:06.56#ibcon#about to write, iclass 13, count 0 2006.229.11:59:06.56#ibcon#wrote, iclass 13, count 0 2006.229.11:59:06.56#ibcon#about to read 3, iclass 13, count 0 2006.229.11:59:06.58#ibcon#read 3, iclass 13, count 0 2006.229.11:59:06.58#ibcon#about to read 4, iclass 13, count 0 2006.229.11:59:06.58#ibcon#read 4, iclass 13, count 0 2006.229.11:59:06.58#ibcon#about to read 5, iclass 13, count 0 2006.229.11:59:06.58#ibcon#read 5, iclass 13, count 0 2006.229.11:59:06.58#ibcon#about to read 6, iclass 13, count 0 2006.229.11:59:06.58#ibcon#read 6, iclass 13, count 0 2006.229.11:59:06.58#ibcon#end of sib2, iclass 13, count 0 2006.229.11:59:06.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:59:06.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:59:06.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.11:59:06.58#ibcon#*before write, iclass 13, count 0 2006.229.11:59:06.58#ibcon#enter sib2, iclass 13, count 0 2006.229.11:59:06.58#ibcon#flushed, iclass 13, count 0 2006.229.11:59:06.58#ibcon#about to write, iclass 13, count 0 2006.229.11:59:06.58#ibcon#wrote, iclass 13, count 0 2006.229.11:59:06.58#ibcon#about to read 3, iclass 13, count 0 2006.229.11:59:06.62#ibcon#read 3, iclass 13, count 0 2006.229.11:59:06.62#ibcon#about to read 4, iclass 13, count 0 2006.229.11:59:06.62#ibcon#read 4, iclass 13, count 0 2006.229.11:59:06.62#ibcon#about to read 5, iclass 13, count 0 2006.229.11:59:06.62#ibcon#read 5, iclass 13, count 0 2006.229.11:59:06.62#ibcon#about to read 6, iclass 13, count 0 2006.229.11:59:06.62#ibcon#read 6, iclass 13, count 0 2006.229.11:59:06.62#ibcon#end of sib2, iclass 13, count 0 2006.229.11:59:06.62#ibcon#*after write, iclass 13, count 0 2006.229.11:59:06.62#ibcon#*before return 0, iclass 13, count 0 2006.229.11:59:06.62#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:06.62#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:06.62#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:59:06.62#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:59:06.62$vck44/va=5,4 2006.229.11:59:06.62#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.11:59:06.62#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.11:59:06.62#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:06.62#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:06.68#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:06.68#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:06.68#ibcon#enter wrdev, iclass 15, count 2 2006.229.11:59:06.68#ibcon#first serial, iclass 15, count 2 2006.229.11:59:06.68#ibcon#enter sib2, iclass 15, count 2 2006.229.11:59:06.68#ibcon#flushed, iclass 15, count 2 2006.229.11:59:06.68#ibcon#about to write, iclass 15, count 2 2006.229.11:59:06.68#ibcon#wrote, iclass 15, count 2 2006.229.11:59:06.68#ibcon#about to read 3, iclass 15, count 2 2006.229.11:59:06.70#ibcon#read 3, iclass 15, count 2 2006.229.11:59:06.70#ibcon#about to read 4, iclass 15, count 2 2006.229.11:59:06.70#ibcon#read 4, iclass 15, count 2 2006.229.11:59:06.70#ibcon#about to read 5, iclass 15, count 2 2006.229.11:59:06.70#ibcon#read 5, iclass 15, count 2 2006.229.11:59:06.70#ibcon#about to read 6, iclass 15, count 2 2006.229.11:59:06.70#ibcon#read 6, iclass 15, count 2 2006.229.11:59:06.70#ibcon#end of sib2, iclass 15, count 2 2006.229.11:59:06.70#ibcon#*mode == 0, iclass 15, count 2 2006.229.11:59:06.70#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.11:59:06.70#ibcon#[25=AT05-04\r\n] 2006.229.11:59:06.70#ibcon#*before write, iclass 15, count 2 2006.229.11:59:06.70#ibcon#enter sib2, iclass 15, count 2 2006.229.11:59:06.70#ibcon#flushed, iclass 15, count 2 2006.229.11:59:06.70#ibcon#about to write, iclass 15, count 2 2006.229.11:59:06.70#ibcon#wrote, iclass 15, count 2 2006.229.11:59:06.70#ibcon#about to read 3, iclass 15, count 2 2006.229.11:59:06.73#ibcon#read 3, iclass 15, count 2 2006.229.11:59:06.73#ibcon#about to read 4, iclass 15, count 2 2006.229.11:59:06.73#ibcon#read 4, iclass 15, count 2 2006.229.11:59:06.73#ibcon#about to read 5, iclass 15, count 2 2006.229.11:59:06.73#ibcon#read 5, iclass 15, count 2 2006.229.11:59:06.73#ibcon#about to read 6, iclass 15, count 2 2006.229.11:59:06.73#ibcon#read 6, iclass 15, count 2 2006.229.11:59:06.73#ibcon#end of sib2, iclass 15, count 2 2006.229.11:59:06.73#ibcon#*after write, iclass 15, count 2 2006.229.11:59:06.73#ibcon#*before return 0, iclass 15, count 2 2006.229.11:59:06.73#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:06.73#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:06.73#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.11:59:06.73#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:06.73#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:06.85#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:06.85#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:06.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:59:06.85#ibcon#first serial, iclass 15, count 0 2006.229.11:59:06.85#ibcon#enter sib2, iclass 15, count 0 2006.229.11:59:06.85#ibcon#flushed, iclass 15, count 0 2006.229.11:59:06.85#ibcon#about to write, iclass 15, count 0 2006.229.11:59:06.85#ibcon#wrote, iclass 15, count 0 2006.229.11:59:06.85#ibcon#about to read 3, iclass 15, count 0 2006.229.11:59:06.87#ibcon#read 3, iclass 15, count 0 2006.229.11:59:06.87#ibcon#about to read 4, iclass 15, count 0 2006.229.11:59:06.87#ibcon#read 4, iclass 15, count 0 2006.229.11:59:06.87#ibcon#about to read 5, iclass 15, count 0 2006.229.11:59:06.87#ibcon#read 5, iclass 15, count 0 2006.229.11:59:06.87#ibcon#about to read 6, iclass 15, count 0 2006.229.11:59:06.87#ibcon#read 6, iclass 15, count 0 2006.229.11:59:06.87#ibcon#end of sib2, iclass 15, count 0 2006.229.11:59:06.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:59:06.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:59:06.87#ibcon#[25=USB\r\n] 2006.229.11:59:06.87#ibcon#*before write, iclass 15, count 0 2006.229.11:59:06.87#ibcon#enter sib2, iclass 15, count 0 2006.229.11:59:06.87#ibcon#flushed, iclass 15, count 0 2006.229.11:59:06.87#ibcon#about to write, iclass 15, count 0 2006.229.11:59:06.87#ibcon#wrote, iclass 15, count 0 2006.229.11:59:06.87#ibcon#about to read 3, iclass 15, count 0 2006.229.11:59:06.90#ibcon#read 3, iclass 15, count 0 2006.229.11:59:06.90#ibcon#about to read 4, iclass 15, count 0 2006.229.11:59:06.90#ibcon#read 4, iclass 15, count 0 2006.229.11:59:06.90#ibcon#about to read 5, iclass 15, count 0 2006.229.11:59:06.90#ibcon#read 5, iclass 15, count 0 2006.229.11:59:06.90#ibcon#about to read 6, iclass 15, count 0 2006.229.11:59:06.90#ibcon#read 6, iclass 15, count 0 2006.229.11:59:06.90#ibcon#end of sib2, iclass 15, count 0 2006.229.11:59:06.90#ibcon#*after write, iclass 15, count 0 2006.229.11:59:06.90#ibcon#*before return 0, iclass 15, count 0 2006.229.11:59:06.90#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:06.90#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:06.90#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:59:06.90#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:59:06.90$vck44/valo=6,814.99 2006.229.11:59:06.90#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.11:59:06.90#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.11:59:06.90#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:06.90#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:59:06.90#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:59:06.90#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:59:06.90#ibcon#enter wrdev, iclass 17, count 0 2006.229.11:59:06.90#ibcon#first serial, iclass 17, count 0 2006.229.11:59:06.90#ibcon#enter sib2, iclass 17, count 0 2006.229.11:59:06.90#ibcon#flushed, iclass 17, count 0 2006.229.11:59:06.90#ibcon#about to write, iclass 17, count 0 2006.229.11:59:06.90#ibcon#wrote, iclass 17, count 0 2006.229.11:59:06.90#ibcon#about to read 3, iclass 17, count 0 2006.229.11:59:06.92#ibcon#read 3, iclass 17, count 0 2006.229.11:59:06.92#ibcon#about to read 4, iclass 17, count 0 2006.229.11:59:06.92#ibcon#read 4, iclass 17, count 0 2006.229.11:59:06.92#ibcon#about to read 5, iclass 17, count 0 2006.229.11:59:06.92#ibcon#read 5, iclass 17, count 0 2006.229.11:59:06.92#ibcon#about to read 6, iclass 17, count 0 2006.229.11:59:06.92#ibcon#read 6, iclass 17, count 0 2006.229.11:59:06.92#ibcon#end of sib2, iclass 17, count 0 2006.229.11:59:06.92#ibcon#*mode == 0, iclass 17, count 0 2006.229.11:59:06.92#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.11:59:06.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.11:59:06.92#ibcon#*before write, iclass 17, count 0 2006.229.11:59:06.92#ibcon#enter sib2, iclass 17, count 0 2006.229.11:59:06.92#ibcon#flushed, iclass 17, count 0 2006.229.11:59:06.92#ibcon#about to write, iclass 17, count 0 2006.229.11:59:06.92#ibcon#wrote, iclass 17, count 0 2006.229.11:59:06.92#ibcon#about to read 3, iclass 17, count 0 2006.229.11:59:06.96#ibcon#read 3, iclass 17, count 0 2006.229.11:59:06.96#ibcon#about to read 4, iclass 17, count 0 2006.229.11:59:06.96#ibcon#read 4, iclass 17, count 0 2006.229.11:59:06.96#ibcon#about to read 5, iclass 17, count 0 2006.229.11:59:06.96#ibcon#read 5, iclass 17, count 0 2006.229.11:59:06.96#ibcon#about to read 6, iclass 17, count 0 2006.229.11:59:06.96#ibcon#read 6, iclass 17, count 0 2006.229.11:59:06.96#ibcon#end of sib2, iclass 17, count 0 2006.229.11:59:06.96#ibcon#*after write, iclass 17, count 0 2006.229.11:59:06.96#ibcon#*before return 0, iclass 17, count 0 2006.229.11:59:06.96#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:59:06.96#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.11:59:06.96#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.11:59:06.96#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.11:59:06.96$vck44/va=6,4 2006.229.11:59:06.96#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.11:59:06.96#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.11:59:06.96#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:06.96#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:59:07.02#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:59:07.02#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:59:07.02#ibcon#enter wrdev, iclass 19, count 2 2006.229.11:59:07.02#ibcon#first serial, iclass 19, count 2 2006.229.11:59:07.02#ibcon#enter sib2, iclass 19, count 2 2006.229.11:59:07.02#ibcon#flushed, iclass 19, count 2 2006.229.11:59:07.02#ibcon#about to write, iclass 19, count 2 2006.229.11:59:07.02#ibcon#wrote, iclass 19, count 2 2006.229.11:59:07.02#ibcon#about to read 3, iclass 19, count 2 2006.229.11:59:07.04#ibcon#read 3, iclass 19, count 2 2006.229.11:59:07.04#ibcon#about to read 4, iclass 19, count 2 2006.229.11:59:07.04#ibcon#read 4, iclass 19, count 2 2006.229.11:59:07.04#ibcon#about to read 5, iclass 19, count 2 2006.229.11:59:07.04#ibcon#read 5, iclass 19, count 2 2006.229.11:59:07.04#ibcon#about to read 6, iclass 19, count 2 2006.229.11:59:07.04#ibcon#read 6, iclass 19, count 2 2006.229.11:59:07.04#ibcon#end of sib2, iclass 19, count 2 2006.229.11:59:07.04#ibcon#*mode == 0, iclass 19, count 2 2006.229.11:59:07.04#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.11:59:07.04#ibcon#[25=AT06-04\r\n] 2006.229.11:59:07.04#ibcon#*before write, iclass 19, count 2 2006.229.11:59:07.04#ibcon#enter sib2, iclass 19, count 2 2006.229.11:59:07.04#ibcon#flushed, iclass 19, count 2 2006.229.11:59:07.04#ibcon#about to write, iclass 19, count 2 2006.229.11:59:07.04#ibcon#wrote, iclass 19, count 2 2006.229.11:59:07.04#ibcon#about to read 3, iclass 19, count 2 2006.229.11:59:07.07#ibcon#read 3, iclass 19, count 2 2006.229.11:59:07.07#ibcon#about to read 4, iclass 19, count 2 2006.229.11:59:07.07#ibcon#read 4, iclass 19, count 2 2006.229.11:59:07.07#ibcon#about to read 5, iclass 19, count 2 2006.229.11:59:07.07#ibcon#read 5, iclass 19, count 2 2006.229.11:59:07.07#ibcon#about to read 6, iclass 19, count 2 2006.229.11:59:07.07#ibcon#read 6, iclass 19, count 2 2006.229.11:59:07.07#ibcon#end of sib2, iclass 19, count 2 2006.229.11:59:07.07#ibcon#*after write, iclass 19, count 2 2006.229.11:59:07.07#ibcon#*before return 0, iclass 19, count 2 2006.229.11:59:07.07#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:59:07.07#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.11:59:07.07#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.11:59:07.07#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:07.07#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:59:07.19#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:59:07.19#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:59:07.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.11:59:07.19#ibcon#first serial, iclass 19, count 0 2006.229.11:59:07.19#ibcon#enter sib2, iclass 19, count 0 2006.229.11:59:07.19#ibcon#flushed, iclass 19, count 0 2006.229.11:59:07.19#ibcon#about to write, iclass 19, count 0 2006.229.11:59:07.19#ibcon#wrote, iclass 19, count 0 2006.229.11:59:07.19#ibcon#about to read 3, iclass 19, count 0 2006.229.11:59:07.21#ibcon#read 3, iclass 19, count 0 2006.229.11:59:07.21#ibcon#about to read 4, iclass 19, count 0 2006.229.11:59:07.21#ibcon#read 4, iclass 19, count 0 2006.229.11:59:07.21#ibcon#about to read 5, iclass 19, count 0 2006.229.11:59:07.21#ibcon#read 5, iclass 19, count 0 2006.229.11:59:07.21#ibcon#about to read 6, iclass 19, count 0 2006.229.11:59:07.21#ibcon#read 6, iclass 19, count 0 2006.229.11:59:07.21#ibcon#end of sib2, iclass 19, count 0 2006.229.11:59:07.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.11:59:07.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.11:59:07.21#ibcon#[25=USB\r\n] 2006.229.11:59:07.21#ibcon#*before write, iclass 19, count 0 2006.229.11:59:07.21#ibcon#enter sib2, iclass 19, count 0 2006.229.11:59:07.21#ibcon#flushed, iclass 19, count 0 2006.229.11:59:07.21#ibcon#about to write, iclass 19, count 0 2006.229.11:59:07.21#ibcon#wrote, iclass 19, count 0 2006.229.11:59:07.21#ibcon#about to read 3, iclass 19, count 0 2006.229.11:59:07.24#ibcon#read 3, iclass 19, count 0 2006.229.11:59:07.24#ibcon#about to read 4, iclass 19, count 0 2006.229.11:59:07.24#ibcon#read 4, iclass 19, count 0 2006.229.11:59:07.24#ibcon#about to read 5, iclass 19, count 0 2006.229.11:59:07.24#ibcon#read 5, iclass 19, count 0 2006.229.11:59:07.24#ibcon#about to read 6, iclass 19, count 0 2006.229.11:59:07.24#ibcon#read 6, iclass 19, count 0 2006.229.11:59:07.24#ibcon#end of sib2, iclass 19, count 0 2006.229.11:59:07.24#ibcon#*after write, iclass 19, count 0 2006.229.11:59:07.24#ibcon#*before return 0, iclass 19, count 0 2006.229.11:59:07.24#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:59:07.24#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.11:59:07.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.11:59:07.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.11:59:07.24$vck44/valo=7,864.99 2006.229.11:59:07.24#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.11:59:07.24#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.11:59:07.24#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:07.24#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:59:07.24#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:59:07.24#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:59:07.24#ibcon#enter wrdev, iclass 21, count 0 2006.229.11:59:07.24#ibcon#first serial, iclass 21, count 0 2006.229.11:59:07.24#ibcon#enter sib2, iclass 21, count 0 2006.229.11:59:07.24#ibcon#flushed, iclass 21, count 0 2006.229.11:59:07.24#ibcon#about to write, iclass 21, count 0 2006.229.11:59:07.24#ibcon#wrote, iclass 21, count 0 2006.229.11:59:07.24#ibcon#about to read 3, iclass 21, count 0 2006.229.11:59:07.26#ibcon#read 3, iclass 21, count 0 2006.229.11:59:07.26#ibcon#about to read 4, iclass 21, count 0 2006.229.11:59:07.26#ibcon#read 4, iclass 21, count 0 2006.229.11:59:07.26#ibcon#about to read 5, iclass 21, count 0 2006.229.11:59:07.26#ibcon#read 5, iclass 21, count 0 2006.229.11:59:07.26#ibcon#about to read 6, iclass 21, count 0 2006.229.11:59:07.26#ibcon#read 6, iclass 21, count 0 2006.229.11:59:07.26#ibcon#end of sib2, iclass 21, count 0 2006.229.11:59:07.26#ibcon#*mode == 0, iclass 21, count 0 2006.229.11:59:07.26#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.11:59:07.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.11:59:07.26#ibcon#*before write, iclass 21, count 0 2006.229.11:59:07.26#ibcon#enter sib2, iclass 21, count 0 2006.229.11:59:07.26#ibcon#flushed, iclass 21, count 0 2006.229.11:59:07.26#ibcon#about to write, iclass 21, count 0 2006.229.11:59:07.26#ibcon#wrote, iclass 21, count 0 2006.229.11:59:07.26#ibcon#about to read 3, iclass 21, count 0 2006.229.11:59:07.30#ibcon#read 3, iclass 21, count 0 2006.229.11:59:07.30#ibcon#about to read 4, iclass 21, count 0 2006.229.11:59:07.30#ibcon#read 4, iclass 21, count 0 2006.229.11:59:07.30#ibcon#about to read 5, iclass 21, count 0 2006.229.11:59:07.30#ibcon#read 5, iclass 21, count 0 2006.229.11:59:07.30#ibcon#about to read 6, iclass 21, count 0 2006.229.11:59:07.30#ibcon#read 6, iclass 21, count 0 2006.229.11:59:07.30#ibcon#end of sib2, iclass 21, count 0 2006.229.11:59:07.30#ibcon#*after write, iclass 21, count 0 2006.229.11:59:07.30#ibcon#*before return 0, iclass 21, count 0 2006.229.11:59:07.30#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:59:07.30#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.11:59:07.30#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.11:59:07.30#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.11:59:07.30$vck44/va=7,5 2006.229.11:59:07.30#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.11:59:07.30#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.11:59:07.30#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:07.30#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:59:07.36#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:59:07.36#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:59:07.36#ibcon#enter wrdev, iclass 23, count 2 2006.229.11:59:07.36#ibcon#first serial, iclass 23, count 2 2006.229.11:59:07.36#ibcon#enter sib2, iclass 23, count 2 2006.229.11:59:07.36#ibcon#flushed, iclass 23, count 2 2006.229.11:59:07.36#ibcon#about to write, iclass 23, count 2 2006.229.11:59:07.36#ibcon#wrote, iclass 23, count 2 2006.229.11:59:07.36#ibcon#about to read 3, iclass 23, count 2 2006.229.11:59:07.38#ibcon#read 3, iclass 23, count 2 2006.229.11:59:07.38#ibcon#about to read 4, iclass 23, count 2 2006.229.11:59:07.38#ibcon#read 4, iclass 23, count 2 2006.229.11:59:07.38#ibcon#about to read 5, iclass 23, count 2 2006.229.11:59:07.38#ibcon#read 5, iclass 23, count 2 2006.229.11:59:07.38#ibcon#about to read 6, iclass 23, count 2 2006.229.11:59:07.38#ibcon#read 6, iclass 23, count 2 2006.229.11:59:07.38#ibcon#end of sib2, iclass 23, count 2 2006.229.11:59:07.38#ibcon#*mode == 0, iclass 23, count 2 2006.229.11:59:07.38#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.11:59:07.38#ibcon#[25=AT07-05\r\n] 2006.229.11:59:07.38#ibcon#*before write, iclass 23, count 2 2006.229.11:59:07.38#ibcon#enter sib2, iclass 23, count 2 2006.229.11:59:07.38#ibcon#flushed, iclass 23, count 2 2006.229.11:59:07.38#ibcon#about to write, iclass 23, count 2 2006.229.11:59:07.38#ibcon#wrote, iclass 23, count 2 2006.229.11:59:07.38#ibcon#about to read 3, iclass 23, count 2 2006.229.11:59:07.41#ibcon#read 3, iclass 23, count 2 2006.229.11:59:07.41#ibcon#about to read 4, iclass 23, count 2 2006.229.11:59:07.41#ibcon#read 4, iclass 23, count 2 2006.229.11:59:07.41#ibcon#about to read 5, iclass 23, count 2 2006.229.11:59:07.41#ibcon#read 5, iclass 23, count 2 2006.229.11:59:07.41#ibcon#about to read 6, iclass 23, count 2 2006.229.11:59:07.41#ibcon#read 6, iclass 23, count 2 2006.229.11:59:07.41#ibcon#end of sib2, iclass 23, count 2 2006.229.11:59:07.41#ibcon#*after write, iclass 23, count 2 2006.229.11:59:07.41#ibcon#*before return 0, iclass 23, count 2 2006.229.11:59:07.41#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:59:07.41#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.11:59:07.41#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.11:59:07.41#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:07.41#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:59:07.53#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:59:07.53#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:59:07.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.11:59:07.53#ibcon#first serial, iclass 23, count 0 2006.229.11:59:07.53#ibcon#enter sib2, iclass 23, count 0 2006.229.11:59:07.53#ibcon#flushed, iclass 23, count 0 2006.229.11:59:07.53#ibcon#about to write, iclass 23, count 0 2006.229.11:59:07.53#ibcon#wrote, iclass 23, count 0 2006.229.11:59:07.53#ibcon#about to read 3, iclass 23, count 0 2006.229.11:59:07.55#ibcon#read 3, iclass 23, count 0 2006.229.11:59:07.55#ibcon#about to read 4, iclass 23, count 0 2006.229.11:59:07.55#ibcon#read 4, iclass 23, count 0 2006.229.11:59:07.55#ibcon#about to read 5, iclass 23, count 0 2006.229.11:59:07.55#ibcon#read 5, iclass 23, count 0 2006.229.11:59:07.55#ibcon#about to read 6, iclass 23, count 0 2006.229.11:59:07.55#ibcon#read 6, iclass 23, count 0 2006.229.11:59:07.55#ibcon#end of sib2, iclass 23, count 0 2006.229.11:59:07.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.11:59:07.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.11:59:07.55#ibcon#[25=USB\r\n] 2006.229.11:59:07.55#ibcon#*before write, iclass 23, count 0 2006.229.11:59:07.55#ibcon#enter sib2, iclass 23, count 0 2006.229.11:59:07.55#ibcon#flushed, iclass 23, count 0 2006.229.11:59:07.55#ibcon#about to write, iclass 23, count 0 2006.229.11:59:07.55#ibcon#wrote, iclass 23, count 0 2006.229.11:59:07.55#ibcon#about to read 3, iclass 23, count 0 2006.229.11:59:07.58#ibcon#read 3, iclass 23, count 0 2006.229.11:59:07.58#ibcon#about to read 4, iclass 23, count 0 2006.229.11:59:07.58#ibcon#read 4, iclass 23, count 0 2006.229.11:59:07.58#ibcon#about to read 5, iclass 23, count 0 2006.229.11:59:07.58#ibcon#read 5, iclass 23, count 0 2006.229.11:59:07.58#ibcon#about to read 6, iclass 23, count 0 2006.229.11:59:07.58#ibcon#read 6, iclass 23, count 0 2006.229.11:59:07.58#ibcon#end of sib2, iclass 23, count 0 2006.229.11:59:07.58#ibcon#*after write, iclass 23, count 0 2006.229.11:59:07.58#ibcon#*before return 0, iclass 23, count 0 2006.229.11:59:07.58#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:59:07.58#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.11:59:07.58#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.11:59:07.58#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.11:59:07.58$vck44/valo=8,884.99 2006.229.11:59:07.58#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.11:59:07.58#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.11:59:07.58#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:07.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:07.58#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:07.58#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:07.58#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:59:07.58#ibcon#first serial, iclass 25, count 0 2006.229.11:59:07.58#ibcon#enter sib2, iclass 25, count 0 2006.229.11:59:07.58#ibcon#flushed, iclass 25, count 0 2006.229.11:59:07.58#ibcon#about to write, iclass 25, count 0 2006.229.11:59:07.58#ibcon#wrote, iclass 25, count 0 2006.229.11:59:07.58#ibcon#about to read 3, iclass 25, count 0 2006.229.11:59:07.60#ibcon#read 3, iclass 25, count 0 2006.229.11:59:07.60#ibcon#about to read 4, iclass 25, count 0 2006.229.11:59:07.60#ibcon#read 4, iclass 25, count 0 2006.229.11:59:07.60#ibcon#about to read 5, iclass 25, count 0 2006.229.11:59:07.60#ibcon#read 5, iclass 25, count 0 2006.229.11:59:07.60#ibcon#about to read 6, iclass 25, count 0 2006.229.11:59:07.60#ibcon#read 6, iclass 25, count 0 2006.229.11:59:07.60#ibcon#end of sib2, iclass 25, count 0 2006.229.11:59:07.60#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:59:07.60#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:59:07.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.11:59:07.60#ibcon#*before write, iclass 25, count 0 2006.229.11:59:07.60#ibcon#enter sib2, iclass 25, count 0 2006.229.11:59:07.60#ibcon#flushed, iclass 25, count 0 2006.229.11:59:07.60#ibcon#about to write, iclass 25, count 0 2006.229.11:59:07.60#ibcon#wrote, iclass 25, count 0 2006.229.11:59:07.60#ibcon#about to read 3, iclass 25, count 0 2006.229.11:59:07.64#ibcon#read 3, iclass 25, count 0 2006.229.11:59:07.64#ibcon#about to read 4, iclass 25, count 0 2006.229.11:59:07.64#ibcon#read 4, iclass 25, count 0 2006.229.11:59:07.64#ibcon#about to read 5, iclass 25, count 0 2006.229.11:59:07.64#ibcon#read 5, iclass 25, count 0 2006.229.11:59:07.64#ibcon#about to read 6, iclass 25, count 0 2006.229.11:59:07.64#ibcon#read 6, iclass 25, count 0 2006.229.11:59:07.64#ibcon#end of sib2, iclass 25, count 0 2006.229.11:59:07.64#ibcon#*after write, iclass 25, count 0 2006.229.11:59:07.64#ibcon#*before return 0, iclass 25, count 0 2006.229.11:59:07.64#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:07.64#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:07.64#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:59:07.64#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:59:07.64$vck44/va=8,6 2006.229.11:59:07.64#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.11:59:07.64#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.11:59:07.64#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:07.64#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:07.70#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:07.70#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:07.70#ibcon#enter wrdev, iclass 27, count 2 2006.229.11:59:07.70#ibcon#first serial, iclass 27, count 2 2006.229.11:59:07.70#ibcon#enter sib2, iclass 27, count 2 2006.229.11:59:07.70#ibcon#flushed, iclass 27, count 2 2006.229.11:59:07.70#ibcon#about to write, iclass 27, count 2 2006.229.11:59:07.70#ibcon#wrote, iclass 27, count 2 2006.229.11:59:07.70#ibcon#about to read 3, iclass 27, count 2 2006.229.11:59:07.72#ibcon#read 3, iclass 27, count 2 2006.229.11:59:07.72#ibcon#about to read 4, iclass 27, count 2 2006.229.11:59:07.72#ibcon#read 4, iclass 27, count 2 2006.229.11:59:07.72#ibcon#about to read 5, iclass 27, count 2 2006.229.11:59:07.72#ibcon#read 5, iclass 27, count 2 2006.229.11:59:07.72#ibcon#about to read 6, iclass 27, count 2 2006.229.11:59:07.72#ibcon#read 6, iclass 27, count 2 2006.229.11:59:07.72#ibcon#end of sib2, iclass 27, count 2 2006.229.11:59:07.72#ibcon#*mode == 0, iclass 27, count 2 2006.229.11:59:07.72#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.11:59:07.72#ibcon#[25=AT08-06\r\n] 2006.229.11:59:07.72#ibcon#*before write, iclass 27, count 2 2006.229.11:59:07.72#ibcon#enter sib2, iclass 27, count 2 2006.229.11:59:07.72#ibcon#flushed, iclass 27, count 2 2006.229.11:59:07.72#ibcon#about to write, iclass 27, count 2 2006.229.11:59:07.72#ibcon#wrote, iclass 27, count 2 2006.229.11:59:07.72#ibcon#about to read 3, iclass 27, count 2 2006.229.11:59:07.75#ibcon#read 3, iclass 27, count 2 2006.229.11:59:07.75#ibcon#about to read 4, iclass 27, count 2 2006.229.11:59:07.75#ibcon#read 4, iclass 27, count 2 2006.229.11:59:07.75#ibcon#about to read 5, iclass 27, count 2 2006.229.11:59:07.75#ibcon#read 5, iclass 27, count 2 2006.229.11:59:07.75#ibcon#about to read 6, iclass 27, count 2 2006.229.11:59:07.75#ibcon#read 6, iclass 27, count 2 2006.229.11:59:07.75#ibcon#end of sib2, iclass 27, count 2 2006.229.11:59:07.75#ibcon#*after write, iclass 27, count 2 2006.229.11:59:07.75#ibcon#*before return 0, iclass 27, count 2 2006.229.11:59:07.75#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:07.75#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:07.75#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.11:59:07.75#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:07.75#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:07.87#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:07.87#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:07.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:59:07.87#ibcon#first serial, iclass 27, count 0 2006.229.11:59:07.87#ibcon#enter sib2, iclass 27, count 0 2006.229.11:59:07.87#ibcon#flushed, iclass 27, count 0 2006.229.11:59:07.87#ibcon#about to write, iclass 27, count 0 2006.229.11:59:07.87#ibcon#wrote, iclass 27, count 0 2006.229.11:59:07.87#ibcon#about to read 3, iclass 27, count 0 2006.229.11:59:07.89#ibcon#read 3, iclass 27, count 0 2006.229.11:59:07.89#ibcon#about to read 4, iclass 27, count 0 2006.229.11:59:07.89#ibcon#read 4, iclass 27, count 0 2006.229.11:59:07.89#ibcon#about to read 5, iclass 27, count 0 2006.229.11:59:07.89#ibcon#read 5, iclass 27, count 0 2006.229.11:59:07.89#ibcon#about to read 6, iclass 27, count 0 2006.229.11:59:07.89#ibcon#read 6, iclass 27, count 0 2006.229.11:59:07.89#ibcon#end of sib2, iclass 27, count 0 2006.229.11:59:07.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:59:07.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:59:07.89#ibcon#[25=USB\r\n] 2006.229.11:59:07.89#ibcon#*before write, iclass 27, count 0 2006.229.11:59:07.89#ibcon#enter sib2, iclass 27, count 0 2006.229.11:59:07.89#ibcon#flushed, iclass 27, count 0 2006.229.11:59:07.89#ibcon#about to write, iclass 27, count 0 2006.229.11:59:07.89#ibcon#wrote, iclass 27, count 0 2006.229.11:59:07.89#ibcon#about to read 3, iclass 27, count 0 2006.229.11:59:07.92#ibcon#read 3, iclass 27, count 0 2006.229.11:59:07.92#ibcon#about to read 4, iclass 27, count 0 2006.229.11:59:07.92#ibcon#read 4, iclass 27, count 0 2006.229.11:59:07.92#ibcon#about to read 5, iclass 27, count 0 2006.229.11:59:07.92#ibcon#read 5, iclass 27, count 0 2006.229.11:59:07.92#ibcon#about to read 6, iclass 27, count 0 2006.229.11:59:07.92#ibcon#read 6, iclass 27, count 0 2006.229.11:59:07.92#ibcon#end of sib2, iclass 27, count 0 2006.229.11:59:07.92#ibcon#*after write, iclass 27, count 0 2006.229.11:59:07.92#ibcon#*before return 0, iclass 27, count 0 2006.229.11:59:07.92#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:07.92#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:07.92#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:59:07.92#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:59:07.92$vck44/vblo=1,629.99 2006.229.11:59:07.92#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.11:59:07.92#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.11:59:07.92#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:07.92#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:07.92#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:07.92#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:07.92#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:59:07.92#ibcon#first serial, iclass 29, count 0 2006.229.11:59:07.92#ibcon#enter sib2, iclass 29, count 0 2006.229.11:59:07.92#ibcon#flushed, iclass 29, count 0 2006.229.11:59:07.92#ibcon#about to write, iclass 29, count 0 2006.229.11:59:07.92#ibcon#wrote, iclass 29, count 0 2006.229.11:59:07.92#ibcon#about to read 3, iclass 29, count 0 2006.229.11:59:07.94#ibcon#read 3, iclass 29, count 0 2006.229.11:59:07.94#ibcon#about to read 4, iclass 29, count 0 2006.229.11:59:07.94#ibcon#read 4, iclass 29, count 0 2006.229.11:59:07.94#ibcon#about to read 5, iclass 29, count 0 2006.229.11:59:07.94#ibcon#read 5, iclass 29, count 0 2006.229.11:59:07.94#ibcon#about to read 6, iclass 29, count 0 2006.229.11:59:07.94#ibcon#read 6, iclass 29, count 0 2006.229.11:59:07.94#ibcon#end of sib2, iclass 29, count 0 2006.229.11:59:07.94#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:59:07.94#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:59:07.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.11:59:07.94#ibcon#*before write, iclass 29, count 0 2006.229.11:59:07.94#ibcon#enter sib2, iclass 29, count 0 2006.229.11:59:07.94#ibcon#flushed, iclass 29, count 0 2006.229.11:59:07.94#ibcon#about to write, iclass 29, count 0 2006.229.11:59:07.94#ibcon#wrote, iclass 29, count 0 2006.229.11:59:07.94#ibcon#about to read 3, iclass 29, count 0 2006.229.11:59:07.98#ibcon#read 3, iclass 29, count 0 2006.229.11:59:07.98#ibcon#about to read 4, iclass 29, count 0 2006.229.11:59:07.98#ibcon#read 4, iclass 29, count 0 2006.229.11:59:07.98#ibcon#about to read 5, iclass 29, count 0 2006.229.11:59:07.98#ibcon#read 5, iclass 29, count 0 2006.229.11:59:07.98#ibcon#about to read 6, iclass 29, count 0 2006.229.11:59:07.98#ibcon#read 6, iclass 29, count 0 2006.229.11:59:07.98#ibcon#end of sib2, iclass 29, count 0 2006.229.11:59:07.98#ibcon#*after write, iclass 29, count 0 2006.229.11:59:07.98#ibcon#*before return 0, iclass 29, count 0 2006.229.11:59:07.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:07.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:07.98#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:59:07.98#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:59:07.98$vck44/vb=1,4 2006.229.11:59:07.98#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.11:59:07.98#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.11:59:07.98#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:07.98#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:59:07.98#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:59:07.98#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:59:07.98#ibcon#enter wrdev, iclass 31, count 2 2006.229.11:59:07.98#ibcon#first serial, iclass 31, count 2 2006.229.11:59:07.98#ibcon#enter sib2, iclass 31, count 2 2006.229.11:59:07.98#ibcon#flushed, iclass 31, count 2 2006.229.11:59:07.98#ibcon#about to write, iclass 31, count 2 2006.229.11:59:07.98#ibcon#wrote, iclass 31, count 2 2006.229.11:59:07.98#ibcon#about to read 3, iclass 31, count 2 2006.229.11:59:08.00#ibcon#read 3, iclass 31, count 2 2006.229.11:59:08.00#ibcon#about to read 4, iclass 31, count 2 2006.229.11:59:08.00#ibcon#read 4, iclass 31, count 2 2006.229.11:59:08.00#ibcon#about to read 5, iclass 31, count 2 2006.229.11:59:08.00#ibcon#read 5, iclass 31, count 2 2006.229.11:59:08.00#ibcon#about to read 6, iclass 31, count 2 2006.229.11:59:08.00#ibcon#read 6, iclass 31, count 2 2006.229.11:59:08.00#ibcon#end of sib2, iclass 31, count 2 2006.229.11:59:08.00#ibcon#*mode == 0, iclass 31, count 2 2006.229.11:59:08.00#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.11:59:08.00#ibcon#[27=AT01-04\r\n] 2006.229.11:59:08.00#ibcon#*before write, iclass 31, count 2 2006.229.11:59:08.00#ibcon#enter sib2, iclass 31, count 2 2006.229.11:59:08.00#ibcon#flushed, iclass 31, count 2 2006.229.11:59:08.00#ibcon#about to write, iclass 31, count 2 2006.229.11:59:08.00#ibcon#wrote, iclass 31, count 2 2006.229.11:59:08.00#ibcon#about to read 3, iclass 31, count 2 2006.229.11:59:08.03#ibcon#read 3, iclass 31, count 2 2006.229.11:59:08.03#ibcon#about to read 4, iclass 31, count 2 2006.229.11:59:08.03#ibcon#read 4, iclass 31, count 2 2006.229.11:59:08.03#ibcon#about to read 5, iclass 31, count 2 2006.229.11:59:08.03#ibcon#read 5, iclass 31, count 2 2006.229.11:59:08.03#ibcon#about to read 6, iclass 31, count 2 2006.229.11:59:08.03#ibcon#read 6, iclass 31, count 2 2006.229.11:59:08.03#ibcon#end of sib2, iclass 31, count 2 2006.229.11:59:08.03#ibcon#*after write, iclass 31, count 2 2006.229.11:59:08.03#ibcon#*before return 0, iclass 31, count 2 2006.229.11:59:08.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:59:08.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.11:59:08.03#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.11:59:08.03#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:08.03#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:59:08.15#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:59:08.15#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:59:08.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:59:08.15#ibcon#first serial, iclass 31, count 0 2006.229.11:59:08.15#ibcon#enter sib2, iclass 31, count 0 2006.229.11:59:08.15#ibcon#flushed, iclass 31, count 0 2006.229.11:59:08.15#ibcon#about to write, iclass 31, count 0 2006.229.11:59:08.15#ibcon#wrote, iclass 31, count 0 2006.229.11:59:08.15#ibcon#about to read 3, iclass 31, count 0 2006.229.11:59:08.17#ibcon#read 3, iclass 31, count 0 2006.229.11:59:08.17#ibcon#about to read 4, iclass 31, count 0 2006.229.11:59:08.17#ibcon#read 4, iclass 31, count 0 2006.229.11:59:08.17#ibcon#about to read 5, iclass 31, count 0 2006.229.11:59:08.17#ibcon#read 5, iclass 31, count 0 2006.229.11:59:08.17#ibcon#about to read 6, iclass 31, count 0 2006.229.11:59:08.17#ibcon#read 6, iclass 31, count 0 2006.229.11:59:08.17#ibcon#end of sib2, iclass 31, count 0 2006.229.11:59:08.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:59:08.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:59:08.17#ibcon#[27=USB\r\n] 2006.229.11:59:08.17#ibcon#*before write, iclass 31, count 0 2006.229.11:59:08.17#ibcon#enter sib2, iclass 31, count 0 2006.229.11:59:08.17#ibcon#flushed, iclass 31, count 0 2006.229.11:59:08.17#ibcon#about to write, iclass 31, count 0 2006.229.11:59:08.17#ibcon#wrote, iclass 31, count 0 2006.229.11:59:08.17#ibcon#about to read 3, iclass 31, count 0 2006.229.11:59:08.20#ibcon#read 3, iclass 31, count 0 2006.229.11:59:08.20#ibcon#about to read 4, iclass 31, count 0 2006.229.11:59:08.20#ibcon#read 4, iclass 31, count 0 2006.229.11:59:08.20#ibcon#about to read 5, iclass 31, count 0 2006.229.11:59:08.20#ibcon#read 5, iclass 31, count 0 2006.229.11:59:08.20#ibcon#about to read 6, iclass 31, count 0 2006.229.11:59:08.20#ibcon#read 6, iclass 31, count 0 2006.229.11:59:08.20#ibcon#end of sib2, iclass 31, count 0 2006.229.11:59:08.20#ibcon#*after write, iclass 31, count 0 2006.229.11:59:08.20#ibcon#*before return 0, iclass 31, count 0 2006.229.11:59:08.20#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:59:08.20#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.11:59:08.20#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:59:08.20#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:59:08.20$vck44/vblo=2,634.99 2006.229.11:59:08.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.11:59:08.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.11:59:08.20#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:08.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:08.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:08.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:08.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.11:59:08.20#ibcon#first serial, iclass 33, count 0 2006.229.11:59:08.20#ibcon#enter sib2, iclass 33, count 0 2006.229.11:59:08.20#ibcon#flushed, iclass 33, count 0 2006.229.11:59:08.20#ibcon#about to write, iclass 33, count 0 2006.229.11:59:08.20#ibcon#wrote, iclass 33, count 0 2006.229.11:59:08.20#ibcon#about to read 3, iclass 33, count 0 2006.229.11:59:08.22#ibcon#read 3, iclass 33, count 0 2006.229.11:59:08.22#ibcon#about to read 4, iclass 33, count 0 2006.229.11:59:08.22#ibcon#read 4, iclass 33, count 0 2006.229.11:59:08.22#ibcon#about to read 5, iclass 33, count 0 2006.229.11:59:08.22#ibcon#read 5, iclass 33, count 0 2006.229.11:59:08.22#ibcon#about to read 6, iclass 33, count 0 2006.229.11:59:08.22#ibcon#read 6, iclass 33, count 0 2006.229.11:59:08.22#ibcon#end of sib2, iclass 33, count 0 2006.229.11:59:08.22#ibcon#*mode == 0, iclass 33, count 0 2006.229.11:59:08.22#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.11:59:08.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.11:59:08.22#ibcon#*before write, iclass 33, count 0 2006.229.11:59:08.22#ibcon#enter sib2, iclass 33, count 0 2006.229.11:59:08.22#ibcon#flushed, iclass 33, count 0 2006.229.11:59:08.22#ibcon#about to write, iclass 33, count 0 2006.229.11:59:08.22#ibcon#wrote, iclass 33, count 0 2006.229.11:59:08.22#ibcon#about to read 3, iclass 33, count 0 2006.229.11:59:08.26#ibcon#read 3, iclass 33, count 0 2006.229.11:59:08.26#ibcon#about to read 4, iclass 33, count 0 2006.229.11:59:08.26#ibcon#read 4, iclass 33, count 0 2006.229.11:59:08.26#ibcon#about to read 5, iclass 33, count 0 2006.229.11:59:08.26#ibcon#read 5, iclass 33, count 0 2006.229.11:59:08.26#ibcon#about to read 6, iclass 33, count 0 2006.229.11:59:08.26#ibcon#read 6, iclass 33, count 0 2006.229.11:59:08.26#ibcon#end of sib2, iclass 33, count 0 2006.229.11:59:08.26#ibcon#*after write, iclass 33, count 0 2006.229.11:59:08.26#ibcon#*before return 0, iclass 33, count 0 2006.229.11:59:08.26#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:08.26#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.11:59:08.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.11:59:08.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.11:59:08.26$vck44/vb=2,4 2006.229.11:59:08.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.11:59:08.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.11:59:08.26#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:08.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:08.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:08.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:08.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.11:59:08.32#ibcon#first serial, iclass 35, count 2 2006.229.11:59:08.32#ibcon#enter sib2, iclass 35, count 2 2006.229.11:59:08.32#ibcon#flushed, iclass 35, count 2 2006.229.11:59:08.32#ibcon#about to write, iclass 35, count 2 2006.229.11:59:08.32#ibcon#wrote, iclass 35, count 2 2006.229.11:59:08.32#ibcon#about to read 3, iclass 35, count 2 2006.229.11:59:08.34#ibcon#read 3, iclass 35, count 2 2006.229.11:59:08.34#ibcon#about to read 4, iclass 35, count 2 2006.229.11:59:08.34#ibcon#read 4, iclass 35, count 2 2006.229.11:59:08.34#ibcon#about to read 5, iclass 35, count 2 2006.229.11:59:08.34#ibcon#read 5, iclass 35, count 2 2006.229.11:59:08.34#ibcon#about to read 6, iclass 35, count 2 2006.229.11:59:08.34#ibcon#read 6, iclass 35, count 2 2006.229.11:59:08.34#ibcon#end of sib2, iclass 35, count 2 2006.229.11:59:08.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.11:59:08.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.11:59:08.34#ibcon#[27=AT02-04\r\n] 2006.229.11:59:08.34#ibcon#*before write, iclass 35, count 2 2006.229.11:59:08.34#ibcon#enter sib2, iclass 35, count 2 2006.229.11:59:08.34#ibcon#flushed, iclass 35, count 2 2006.229.11:59:08.34#ibcon#about to write, iclass 35, count 2 2006.229.11:59:08.34#ibcon#wrote, iclass 35, count 2 2006.229.11:59:08.34#ibcon#about to read 3, iclass 35, count 2 2006.229.11:59:08.37#ibcon#read 3, iclass 35, count 2 2006.229.11:59:08.37#ibcon#about to read 4, iclass 35, count 2 2006.229.11:59:08.37#ibcon#read 4, iclass 35, count 2 2006.229.11:59:08.37#ibcon#about to read 5, iclass 35, count 2 2006.229.11:59:08.37#ibcon#read 5, iclass 35, count 2 2006.229.11:59:08.37#ibcon#about to read 6, iclass 35, count 2 2006.229.11:59:08.37#ibcon#read 6, iclass 35, count 2 2006.229.11:59:08.37#ibcon#end of sib2, iclass 35, count 2 2006.229.11:59:08.37#ibcon#*after write, iclass 35, count 2 2006.229.11:59:08.37#ibcon#*before return 0, iclass 35, count 2 2006.229.11:59:08.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:08.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.11:59:08.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.11:59:08.37#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:08.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:08.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:08.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:08.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.11:59:08.49#ibcon#first serial, iclass 35, count 0 2006.229.11:59:08.49#ibcon#enter sib2, iclass 35, count 0 2006.229.11:59:08.49#ibcon#flushed, iclass 35, count 0 2006.229.11:59:08.49#ibcon#about to write, iclass 35, count 0 2006.229.11:59:08.49#ibcon#wrote, iclass 35, count 0 2006.229.11:59:08.49#ibcon#about to read 3, iclass 35, count 0 2006.229.11:59:08.51#ibcon#read 3, iclass 35, count 0 2006.229.11:59:08.51#ibcon#about to read 4, iclass 35, count 0 2006.229.11:59:08.51#ibcon#read 4, iclass 35, count 0 2006.229.11:59:08.51#ibcon#about to read 5, iclass 35, count 0 2006.229.11:59:08.51#ibcon#read 5, iclass 35, count 0 2006.229.11:59:08.51#ibcon#about to read 6, iclass 35, count 0 2006.229.11:59:08.51#ibcon#read 6, iclass 35, count 0 2006.229.11:59:08.51#ibcon#end of sib2, iclass 35, count 0 2006.229.11:59:08.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.11:59:08.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.11:59:08.51#ibcon#[27=USB\r\n] 2006.229.11:59:08.51#ibcon#*before write, iclass 35, count 0 2006.229.11:59:08.51#ibcon#enter sib2, iclass 35, count 0 2006.229.11:59:08.51#ibcon#flushed, iclass 35, count 0 2006.229.11:59:08.51#ibcon#about to write, iclass 35, count 0 2006.229.11:59:08.51#ibcon#wrote, iclass 35, count 0 2006.229.11:59:08.51#ibcon#about to read 3, iclass 35, count 0 2006.229.11:59:08.54#ibcon#read 3, iclass 35, count 0 2006.229.11:59:08.54#ibcon#about to read 4, iclass 35, count 0 2006.229.11:59:08.54#ibcon#read 4, iclass 35, count 0 2006.229.11:59:08.54#ibcon#about to read 5, iclass 35, count 0 2006.229.11:59:08.54#ibcon#read 5, iclass 35, count 0 2006.229.11:59:08.54#ibcon#about to read 6, iclass 35, count 0 2006.229.11:59:08.54#ibcon#read 6, iclass 35, count 0 2006.229.11:59:08.54#ibcon#end of sib2, iclass 35, count 0 2006.229.11:59:08.54#ibcon#*after write, iclass 35, count 0 2006.229.11:59:08.54#ibcon#*before return 0, iclass 35, count 0 2006.229.11:59:08.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:08.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.11:59:08.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.11:59:08.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.11:59:08.54$vck44/vblo=3,649.99 2006.229.11:59:08.54#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.11:59:08.54#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.11:59:08.54#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:08.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:08.54#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:08.54#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:08.54#ibcon#enter wrdev, iclass 37, count 0 2006.229.11:59:08.54#ibcon#first serial, iclass 37, count 0 2006.229.11:59:08.54#ibcon#enter sib2, iclass 37, count 0 2006.229.11:59:08.54#ibcon#flushed, iclass 37, count 0 2006.229.11:59:08.54#ibcon#about to write, iclass 37, count 0 2006.229.11:59:08.54#ibcon#wrote, iclass 37, count 0 2006.229.11:59:08.54#ibcon#about to read 3, iclass 37, count 0 2006.229.11:59:08.56#ibcon#read 3, iclass 37, count 0 2006.229.11:59:08.56#ibcon#about to read 4, iclass 37, count 0 2006.229.11:59:08.56#ibcon#read 4, iclass 37, count 0 2006.229.11:59:08.56#ibcon#about to read 5, iclass 37, count 0 2006.229.11:59:08.56#ibcon#read 5, iclass 37, count 0 2006.229.11:59:08.56#ibcon#about to read 6, iclass 37, count 0 2006.229.11:59:08.56#ibcon#read 6, iclass 37, count 0 2006.229.11:59:08.56#ibcon#end of sib2, iclass 37, count 0 2006.229.11:59:08.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.11:59:08.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.11:59:08.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.11:59:08.56#ibcon#*before write, iclass 37, count 0 2006.229.11:59:08.56#ibcon#enter sib2, iclass 37, count 0 2006.229.11:59:08.56#ibcon#flushed, iclass 37, count 0 2006.229.11:59:08.56#ibcon#about to write, iclass 37, count 0 2006.229.11:59:08.56#ibcon#wrote, iclass 37, count 0 2006.229.11:59:08.56#ibcon#about to read 3, iclass 37, count 0 2006.229.11:59:08.60#ibcon#read 3, iclass 37, count 0 2006.229.11:59:08.60#ibcon#about to read 4, iclass 37, count 0 2006.229.11:59:08.60#ibcon#read 4, iclass 37, count 0 2006.229.11:59:08.60#ibcon#about to read 5, iclass 37, count 0 2006.229.11:59:08.60#ibcon#read 5, iclass 37, count 0 2006.229.11:59:08.60#ibcon#about to read 6, iclass 37, count 0 2006.229.11:59:08.60#ibcon#read 6, iclass 37, count 0 2006.229.11:59:08.60#ibcon#end of sib2, iclass 37, count 0 2006.229.11:59:08.60#ibcon#*after write, iclass 37, count 0 2006.229.11:59:08.60#ibcon#*before return 0, iclass 37, count 0 2006.229.11:59:08.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:08.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.11:59:08.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.11:59:08.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.11:59:08.60$vck44/vb=3,4 2006.229.11:59:08.60#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.11:59:08.60#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.11:59:08.60#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:08.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:08.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:08.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:08.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.11:59:08.66#ibcon#first serial, iclass 39, count 2 2006.229.11:59:08.66#ibcon#enter sib2, iclass 39, count 2 2006.229.11:59:08.66#ibcon#flushed, iclass 39, count 2 2006.229.11:59:08.66#ibcon#about to write, iclass 39, count 2 2006.229.11:59:08.66#ibcon#wrote, iclass 39, count 2 2006.229.11:59:08.66#ibcon#about to read 3, iclass 39, count 2 2006.229.11:59:08.68#ibcon#read 3, iclass 39, count 2 2006.229.11:59:08.68#ibcon#about to read 4, iclass 39, count 2 2006.229.11:59:08.68#ibcon#read 4, iclass 39, count 2 2006.229.11:59:08.68#ibcon#about to read 5, iclass 39, count 2 2006.229.11:59:08.68#ibcon#read 5, iclass 39, count 2 2006.229.11:59:08.68#ibcon#about to read 6, iclass 39, count 2 2006.229.11:59:08.68#ibcon#read 6, iclass 39, count 2 2006.229.11:59:08.68#ibcon#end of sib2, iclass 39, count 2 2006.229.11:59:08.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.11:59:08.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.11:59:08.68#ibcon#[27=AT03-04\r\n] 2006.229.11:59:08.68#ibcon#*before write, iclass 39, count 2 2006.229.11:59:08.68#ibcon#enter sib2, iclass 39, count 2 2006.229.11:59:08.68#ibcon#flushed, iclass 39, count 2 2006.229.11:59:08.68#ibcon#about to write, iclass 39, count 2 2006.229.11:59:08.68#ibcon#wrote, iclass 39, count 2 2006.229.11:59:08.68#ibcon#about to read 3, iclass 39, count 2 2006.229.11:59:08.71#ibcon#read 3, iclass 39, count 2 2006.229.11:59:08.71#ibcon#about to read 4, iclass 39, count 2 2006.229.11:59:08.71#ibcon#read 4, iclass 39, count 2 2006.229.11:59:08.71#ibcon#about to read 5, iclass 39, count 2 2006.229.11:59:08.71#ibcon#read 5, iclass 39, count 2 2006.229.11:59:08.71#ibcon#about to read 6, iclass 39, count 2 2006.229.11:59:08.71#ibcon#read 6, iclass 39, count 2 2006.229.11:59:08.71#ibcon#end of sib2, iclass 39, count 2 2006.229.11:59:08.71#ibcon#*after write, iclass 39, count 2 2006.229.11:59:08.71#ibcon#*before return 0, iclass 39, count 2 2006.229.11:59:08.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:08.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.11:59:08.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.11:59:08.71#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:08.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:08.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:08.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:08.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.11:59:08.83#ibcon#first serial, iclass 39, count 0 2006.229.11:59:08.83#ibcon#enter sib2, iclass 39, count 0 2006.229.11:59:08.83#ibcon#flushed, iclass 39, count 0 2006.229.11:59:08.83#ibcon#about to write, iclass 39, count 0 2006.229.11:59:08.83#ibcon#wrote, iclass 39, count 0 2006.229.11:59:08.83#ibcon#about to read 3, iclass 39, count 0 2006.229.11:59:08.85#ibcon#read 3, iclass 39, count 0 2006.229.11:59:08.85#ibcon#about to read 4, iclass 39, count 0 2006.229.11:59:08.85#ibcon#read 4, iclass 39, count 0 2006.229.11:59:08.85#ibcon#about to read 5, iclass 39, count 0 2006.229.11:59:08.85#ibcon#read 5, iclass 39, count 0 2006.229.11:59:08.85#ibcon#about to read 6, iclass 39, count 0 2006.229.11:59:08.85#ibcon#read 6, iclass 39, count 0 2006.229.11:59:08.85#ibcon#end of sib2, iclass 39, count 0 2006.229.11:59:08.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.11:59:08.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.11:59:08.85#ibcon#[27=USB\r\n] 2006.229.11:59:08.85#ibcon#*before write, iclass 39, count 0 2006.229.11:59:08.85#ibcon#enter sib2, iclass 39, count 0 2006.229.11:59:08.85#ibcon#flushed, iclass 39, count 0 2006.229.11:59:08.85#ibcon#about to write, iclass 39, count 0 2006.229.11:59:08.85#ibcon#wrote, iclass 39, count 0 2006.229.11:59:08.85#ibcon#about to read 3, iclass 39, count 0 2006.229.11:59:08.88#ibcon#read 3, iclass 39, count 0 2006.229.11:59:08.88#ibcon#about to read 4, iclass 39, count 0 2006.229.11:59:08.88#ibcon#read 4, iclass 39, count 0 2006.229.11:59:08.88#ibcon#about to read 5, iclass 39, count 0 2006.229.11:59:08.88#ibcon#read 5, iclass 39, count 0 2006.229.11:59:08.88#ibcon#about to read 6, iclass 39, count 0 2006.229.11:59:08.88#ibcon#read 6, iclass 39, count 0 2006.229.11:59:08.88#ibcon#end of sib2, iclass 39, count 0 2006.229.11:59:08.88#ibcon#*after write, iclass 39, count 0 2006.229.11:59:08.88#ibcon#*before return 0, iclass 39, count 0 2006.229.11:59:08.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:08.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.11:59:08.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.11:59:08.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.11:59:08.88$vck44/vblo=4,679.99 2006.229.11:59:08.88#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.11:59:08.88#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.11:59:08.88#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:08.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:08.88#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:08.88#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:08.88#ibcon#enter wrdev, iclass 3, count 0 2006.229.11:59:08.88#ibcon#first serial, iclass 3, count 0 2006.229.11:59:08.88#ibcon#enter sib2, iclass 3, count 0 2006.229.11:59:08.88#ibcon#flushed, iclass 3, count 0 2006.229.11:59:08.88#ibcon#about to write, iclass 3, count 0 2006.229.11:59:08.88#ibcon#wrote, iclass 3, count 0 2006.229.11:59:08.88#ibcon#about to read 3, iclass 3, count 0 2006.229.11:59:08.90#ibcon#read 3, iclass 3, count 0 2006.229.11:59:08.90#ibcon#about to read 4, iclass 3, count 0 2006.229.11:59:08.90#ibcon#read 4, iclass 3, count 0 2006.229.11:59:08.90#ibcon#about to read 5, iclass 3, count 0 2006.229.11:59:08.90#ibcon#read 5, iclass 3, count 0 2006.229.11:59:08.90#ibcon#about to read 6, iclass 3, count 0 2006.229.11:59:08.90#ibcon#read 6, iclass 3, count 0 2006.229.11:59:08.90#ibcon#end of sib2, iclass 3, count 0 2006.229.11:59:08.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.11:59:08.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.11:59:08.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.11:59:08.90#ibcon#*before write, iclass 3, count 0 2006.229.11:59:08.90#ibcon#enter sib2, iclass 3, count 0 2006.229.11:59:08.90#ibcon#flushed, iclass 3, count 0 2006.229.11:59:08.90#ibcon#about to write, iclass 3, count 0 2006.229.11:59:08.90#ibcon#wrote, iclass 3, count 0 2006.229.11:59:08.90#ibcon#about to read 3, iclass 3, count 0 2006.229.11:59:08.94#ibcon#read 3, iclass 3, count 0 2006.229.11:59:08.94#ibcon#about to read 4, iclass 3, count 0 2006.229.11:59:08.94#ibcon#read 4, iclass 3, count 0 2006.229.11:59:08.94#ibcon#about to read 5, iclass 3, count 0 2006.229.11:59:08.94#ibcon#read 5, iclass 3, count 0 2006.229.11:59:08.94#ibcon#about to read 6, iclass 3, count 0 2006.229.11:59:08.94#ibcon#read 6, iclass 3, count 0 2006.229.11:59:08.94#ibcon#end of sib2, iclass 3, count 0 2006.229.11:59:08.94#ibcon#*after write, iclass 3, count 0 2006.229.11:59:08.94#ibcon#*before return 0, iclass 3, count 0 2006.229.11:59:08.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:08.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.11:59:08.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.11:59:08.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.11:59:08.94$vck44/vb=4,4 2006.229.11:59:08.94#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.11:59:08.94#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.11:59:08.94#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:08.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:09.00#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:09.00#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:09.00#ibcon#enter wrdev, iclass 5, count 2 2006.229.11:59:09.00#ibcon#first serial, iclass 5, count 2 2006.229.11:59:09.00#ibcon#enter sib2, iclass 5, count 2 2006.229.11:59:09.00#ibcon#flushed, iclass 5, count 2 2006.229.11:59:09.00#ibcon#about to write, iclass 5, count 2 2006.229.11:59:09.00#ibcon#wrote, iclass 5, count 2 2006.229.11:59:09.00#ibcon#about to read 3, iclass 5, count 2 2006.229.11:59:09.02#ibcon#read 3, iclass 5, count 2 2006.229.11:59:09.02#ibcon#about to read 4, iclass 5, count 2 2006.229.11:59:09.02#ibcon#read 4, iclass 5, count 2 2006.229.11:59:09.02#ibcon#about to read 5, iclass 5, count 2 2006.229.11:59:09.02#ibcon#read 5, iclass 5, count 2 2006.229.11:59:09.02#ibcon#about to read 6, iclass 5, count 2 2006.229.11:59:09.02#ibcon#read 6, iclass 5, count 2 2006.229.11:59:09.02#ibcon#end of sib2, iclass 5, count 2 2006.229.11:59:09.02#ibcon#*mode == 0, iclass 5, count 2 2006.229.11:59:09.02#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.11:59:09.02#ibcon#[27=AT04-04\r\n] 2006.229.11:59:09.02#ibcon#*before write, iclass 5, count 2 2006.229.11:59:09.02#ibcon#enter sib2, iclass 5, count 2 2006.229.11:59:09.02#ibcon#flushed, iclass 5, count 2 2006.229.11:59:09.02#ibcon#about to write, iclass 5, count 2 2006.229.11:59:09.02#ibcon#wrote, iclass 5, count 2 2006.229.11:59:09.02#ibcon#about to read 3, iclass 5, count 2 2006.229.11:59:09.05#ibcon#read 3, iclass 5, count 2 2006.229.11:59:09.05#ibcon#about to read 4, iclass 5, count 2 2006.229.11:59:09.05#ibcon#read 4, iclass 5, count 2 2006.229.11:59:09.05#ibcon#about to read 5, iclass 5, count 2 2006.229.11:59:09.05#ibcon#read 5, iclass 5, count 2 2006.229.11:59:09.05#ibcon#about to read 6, iclass 5, count 2 2006.229.11:59:09.05#ibcon#read 6, iclass 5, count 2 2006.229.11:59:09.05#ibcon#end of sib2, iclass 5, count 2 2006.229.11:59:09.05#ibcon#*after write, iclass 5, count 2 2006.229.11:59:09.05#ibcon#*before return 0, iclass 5, count 2 2006.229.11:59:09.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:09.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.11:59:09.05#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.11:59:09.05#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:09.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:09.17#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:09.17#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:09.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.11:59:09.17#ibcon#first serial, iclass 5, count 0 2006.229.11:59:09.17#ibcon#enter sib2, iclass 5, count 0 2006.229.11:59:09.17#ibcon#flushed, iclass 5, count 0 2006.229.11:59:09.17#ibcon#about to write, iclass 5, count 0 2006.229.11:59:09.17#ibcon#wrote, iclass 5, count 0 2006.229.11:59:09.17#ibcon#about to read 3, iclass 5, count 0 2006.229.11:59:09.19#ibcon#read 3, iclass 5, count 0 2006.229.11:59:09.19#ibcon#about to read 4, iclass 5, count 0 2006.229.11:59:09.19#ibcon#read 4, iclass 5, count 0 2006.229.11:59:09.19#ibcon#about to read 5, iclass 5, count 0 2006.229.11:59:09.19#ibcon#read 5, iclass 5, count 0 2006.229.11:59:09.19#ibcon#about to read 6, iclass 5, count 0 2006.229.11:59:09.19#ibcon#read 6, iclass 5, count 0 2006.229.11:59:09.19#ibcon#end of sib2, iclass 5, count 0 2006.229.11:59:09.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.11:59:09.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.11:59:09.19#ibcon#[27=USB\r\n] 2006.229.11:59:09.19#ibcon#*before write, iclass 5, count 0 2006.229.11:59:09.19#ibcon#enter sib2, iclass 5, count 0 2006.229.11:59:09.19#ibcon#flushed, iclass 5, count 0 2006.229.11:59:09.19#ibcon#about to write, iclass 5, count 0 2006.229.11:59:09.19#ibcon#wrote, iclass 5, count 0 2006.229.11:59:09.19#ibcon#about to read 3, iclass 5, count 0 2006.229.11:59:09.22#ibcon#read 3, iclass 5, count 0 2006.229.11:59:09.22#ibcon#about to read 4, iclass 5, count 0 2006.229.11:59:09.22#ibcon#read 4, iclass 5, count 0 2006.229.11:59:09.22#ibcon#about to read 5, iclass 5, count 0 2006.229.11:59:09.22#ibcon#read 5, iclass 5, count 0 2006.229.11:59:09.22#ibcon#about to read 6, iclass 5, count 0 2006.229.11:59:09.22#ibcon#read 6, iclass 5, count 0 2006.229.11:59:09.22#ibcon#end of sib2, iclass 5, count 0 2006.229.11:59:09.22#ibcon#*after write, iclass 5, count 0 2006.229.11:59:09.22#ibcon#*before return 0, iclass 5, count 0 2006.229.11:59:09.22#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:09.22#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.11:59:09.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.11:59:09.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.11:59:09.22$vck44/vblo=5,709.99 2006.229.11:59:09.22#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.11:59:09.22#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.11:59:09.22#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:09.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:09.22#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:09.22#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:09.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.11:59:09.22#ibcon#first serial, iclass 7, count 0 2006.229.11:59:09.22#ibcon#enter sib2, iclass 7, count 0 2006.229.11:59:09.22#ibcon#flushed, iclass 7, count 0 2006.229.11:59:09.22#ibcon#about to write, iclass 7, count 0 2006.229.11:59:09.22#ibcon#wrote, iclass 7, count 0 2006.229.11:59:09.22#ibcon#about to read 3, iclass 7, count 0 2006.229.11:59:09.24#ibcon#read 3, iclass 7, count 0 2006.229.11:59:09.24#ibcon#about to read 4, iclass 7, count 0 2006.229.11:59:09.24#ibcon#read 4, iclass 7, count 0 2006.229.11:59:09.24#ibcon#about to read 5, iclass 7, count 0 2006.229.11:59:09.24#ibcon#read 5, iclass 7, count 0 2006.229.11:59:09.24#ibcon#about to read 6, iclass 7, count 0 2006.229.11:59:09.24#ibcon#read 6, iclass 7, count 0 2006.229.11:59:09.24#ibcon#end of sib2, iclass 7, count 0 2006.229.11:59:09.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.11:59:09.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.11:59:09.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.11:59:09.24#ibcon#*before write, iclass 7, count 0 2006.229.11:59:09.24#ibcon#enter sib2, iclass 7, count 0 2006.229.11:59:09.24#ibcon#flushed, iclass 7, count 0 2006.229.11:59:09.24#ibcon#about to write, iclass 7, count 0 2006.229.11:59:09.24#ibcon#wrote, iclass 7, count 0 2006.229.11:59:09.24#ibcon#about to read 3, iclass 7, count 0 2006.229.11:59:09.28#ibcon#read 3, iclass 7, count 0 2006.229.11:59:09.28#ibcon#about to read 4, iclass 7, count 0 2006.229.11:59:09.28#ibcon#read 4, iclass 7, count 0 2006.229.11:59:09.28#ibcon#about to read 5, iclass 7, count 0 2006.229.11:59:09.28#ibcon#read 5, iclass 7, count 0 2006.229.11:59:09.28#ibcon#about to read 6, iclass 7, count 0 2006.229.11:59:09.28#ibcon#read 6, iclass 7, count 0 2006.229.11:59:09.28#ibcon#end of sib2, iclass 7, count 0 2006.229.11:59:09.28#ibcon#*after write, iclass 7, count 0 2006.229.11:59:09.28#ibcon#*before return 0, iclass 7, count 0 2006.229.11:59:09.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:09.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.11:59:09.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.11:59:09.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.11:59:09.28$vck44/vb=5,4 2006.229.11:59:09.28#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.11:59:09.28#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.11:59:09.28#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:09.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:09.34#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:09.34#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:09.34#ibcon#enter wrdev, iclass 11, count 2 2006.229.11:59:09.34#ibcon#first serial, iclass 11, count 2 2006.229.11:59:09.34#ibcon#enter sib2, iclass 11, count 2 2006.229.11:59:09.34#ibcon#flushed, iclass 11, count 2 2006.229.11:59:09.34#ibcon#about to write, iclass 11, count 2 2006.229.11:59:09.34#ibcon#wrote, iclass 11, count 2 2006.229.11:59:09.34#ibcon#about to read 3, iclass 11, count 2 2006.229.11:59:09.36#ibcon#read 3, iclass 11, count 2 2006.229.11:59:09.36#ibcon#about to read 4, iclass 11, count 2 2006.229.11:59:09.36#ibcon#read 4, iclass 11, count 2 2006.229.11:59:09.36#ibcon#about to read 5, iclass 11, count 2 2006.229.11:59:09.36#ibcon#read 5, iclass 11, count 2 2006.229.11:59:09.36#ibcon#about to read 6, iclass 11, count 2 2006.229.11:59:09.36#ibcon#read 6, iclass 11, count 2 2006.229.11:59:09.36#ibcon#end of sib2, iclass 11, count 2 2006.229.11:59:09.36#ibcon#*mode == 0, iclass 11, count 2 2006.229.11:59:09.36#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.11:59:09.36#ibcon#[27=AT05-04\r\n] 2006.229.11:59:09.36#ibcon#*before write, iclass 11, count 2 2006.229.11:59:09.36#ibcon#enter sib2, iclass 11, count 2 2006.229.11:59:09.36#ibcon#flushed, iclass 11, count 2 2006.229.11:59:09.36#ibcon#about to write, iclass 11, count 2 2006.229.11:59:09.36#ibcon#wrote, iclass 11, count 2 2006.229.11:59:09.36#ibcon#about to read 3, iclass 11, count 2 2006.229.11:59:09.39#ibcon#read 3, iclass 11, count 2 2006.229.11:59:09.39#ibcon#about to read 4, iclass 11, count 2 2006.229.11:59:09.39#ibcon#read 4, iclass 11, count 2 2006.229.11:59:09.39#ibcon#about to read 5, iclass 11, count 2 2006.229.11:59:09.39#ibcon#read 5, iclass 11, count 2 2006.229.11:59:09.39#ibcon#about to read 6, iclass 11, count 2 2006.229.11:59:09.39#ibcon#read 6, iclass 11, count 2 2006.229.11:59:09.39#ibcon#end of sib2, iclass 11, count 2 2006.229.11:59:09.39#ibcon#*after write, iclass 11, count 2 2006.229.11:59:09.39#ibcon#*before return 0, iclass 11, count 2 2006.229.11:59:09.39#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:09.39#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.11:59:09.39#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.11:59:09.39#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:09.39#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:09.51#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:09.51#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:09.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.11:59:09.51#ibcon#first serial, iclass 11, count 0 2006.229.11:59:09.51#ibcon#enter sib2, iclass 11, count 0 2006.229.11:59:09.51#ibcon#flushed, iclass 11, count 0 2006.229.11:59:09.51#ibcon#about to write, iclass 11, count 0 2006.229.11:59:09.51#ibcon#wrote, iclass 11, count 0 2006.229.11:59:09.51#ibcon#about to read 3, iclass 11, count 0 2006.229.11:59:09.53#ibcon#read 3, iclass 11, count 0 2006.229.11:59:09.53#ibcon#about to read 4, iclass 11, count 0 2006.229.11:59:09.53#ibcon#read 4, iclass 11, count 0 2006.229.11:59:09.53#ibcon#about to read 5, iclass 11, count 0 2006.229.11:59:09.53#ibcon#read 5, iclass 11, count 0 2006.229.11:59:09.53#ibcon#about to read 6, iclass 11, count 0 2006.229.11:59:09.53#ibcon#read 6, iclass 11, count 0 2006.229.11:59:09.53#ibcon#end of sib2, iclass 11, count 0 2006.229.11:59:09.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.11:59:09.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.11:59:09.53#ibcon#[27=USB\r\n] 2006.229.11:59:09.53#ibcon#*before write, iclass 11, count 0 2006.229.11:59:09.53#ibcon#enter sib2, iclass 11, count 0 2006.229.11:59:09.53#ibcon#flushed, iclass 11, count 0 2006.229.11:59:09.53#ibcon#about to write, iclass 11, count 0 2006.229.11:59:09.53#ibcon#wrote, iclass 11, count 0 2006.229.11:59:09.53#ibcon#about to read 3, iclass 11, count 0 2006.229.11:59:09.56#ibcon#read 3, iclass 11, count 0 2006.229.11:59:09.56#ibcon#about to read 4, iclass 11, count 0 2006.229.11:59:09.56#ibcon#read 4, iclass 11, count 0 2006.229.11:59:09.56#ibcon#about to read 5, iclass 11, count 0 2006.229.11:59:09.56#ibcon#read 5, iclass 11, count 0 2006.229.11:59:09.56#ibcon#about to read 6, iclass 11, count 0 2006.229.11:59:09.56#ibcon#read 6, iclass 11, count 0 2006.229.11:59:09.56#ibcon#end of sib2, iclass 11, count 0 2006.229.11:59:09.56#ibcon#*after write, iclass 11, count 0 2006.229.11:59:09.56#ibcon#*before return 0, iclass 11, count 0 2006.229.11:59:09.56#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:09.56#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.11:59:09.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.11:59:09.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.11:59:09.56$vck44/vblo=6,719.99 2006.229.11:59:09.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.11:59:09.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.11:59:09.56#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:09.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:09.56#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:09.56#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:09.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.11:59:09.56#ibcon#first serial, iclass 13, count 0 2006.229.11:59:09.56#ibcon#enter sib2, iclass 13, count 0 2006.229.11:59:09.56#ibcon#flushed, iclass 13, count 0 2006.229.11:59:09.56#ibcon#about to write, iclass 13, count 0 2006.229.11:59:09.56#ibcon#wrote, iclass 13, count 0 2006.229.11:59:09.56#ibcon#about to read 3, iclass 13, count 0 2006.229.11:59:09.58#ibcon#read 3, iclass 13, count 0 2006.229.11:59:09.58#ibcon#about to read 4, iclass 13, count 0 2006.229.11:59:09.58#ibcon#read 4, iclass 13, count 0 2006.229.11:59:09.58#ibcon#about to read 5, iclass 13, count 0 2006.229.11:59:09.58#ibcon#read 5, iclass 13, count 0 2006.229.11:59:09.58#ibcon#about to read 6, iclass 13, count 0 2006.229.11:59:09.58#ibcon#read 6, iclass 13, count 0 2006.229.11:59:09.58#ibcon#end of sib2, iclass 13, count 0 2006.229.11:59:09.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.11:59:09.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.11:59:09.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.11:59:09.58#ibcon#*before write, iclass 13, count 0 2006.229.11:59:09.58#ibcon#enter sib2, iclass 13, count 0 2006.229.11:59:09.58#ibcon#flushed, iclass 13, count 0 2006.229.11:59:09.58#ibcon#about to write, iclass 13, count 0 2006.229.11:59:09.58#ibcon#wrote, iclass 13, count 0 2006.229.11:59:09.58#ibcon#about to read 3, iclass 13, count 0 2006.229.11:59:09.62#ibcon#read 3, iclass 13, count 0 2006.229.11:59:09.62#ibcon#about to read 4, iclass 13, count 0 2006.229.11:59:09.62#ibcon#read 4, iclass 13, count 0 2006.229.11:59:09.62#ibcon#about to read 5, iclass 13, count 0 2006.229.11:59:09.62#ibcon#read 5, iclass 13, count 0 2006.229.11:59:09.62#ibcon#about to read 6, iclass 13, count 0 2006.229.11:59:09.62#ibcon#read 6, iclass 13, count 0 2006.229.11:59:09.62#ibcon#end of sib2, iclass 13, count 0 2006.229.11:59:09.62#ibcon#*after write, iclass 13, count 0 2006.229.11:59:09.62#ibcon#*before return 0, iclass 13, count 0 2006.229.11:59:09.62#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:09.62#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.11:59:09.62#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.11:59:09.62#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.11:59:09.62$vck44/vb=6,4 2006.229.11:59:09.62#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.11:59:09.62#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.11:59:09.62#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:09.62#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:09.68#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:09.68#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:09.68#ibcon#enter wrdev, iclass 15, count 2 2006.229.11:59:09.68#ibcon#first serial, iclass 15, count 2 2006.229.11:59:09.68#ibcon#enter sib2, iclass 15, count 2 2006.229.11:59:09.68#ibcon#flushed, iclass 15, count 2 2006.229.11:59:09.68#ibcon#about to write, iclass 15, count 2 2006.229.11:59:09.68#ibcon#wrote, iclass 15, count 2 2006.229.11:59:09.68#ibcon#about to read 3, iclass 15, count 2 2006.229.11:59:09.70#ibcon#read 3, iclass 15, count 2 2006.229.11:59:09.70#ibcon#about to read 4, iclass 15, count 2 2006.229.11:59:09.70#ibcon#read 4, iclass 15, count 2 2006.229.11:59:09.70#ibcon#about to read 5, iclass 15, count 2 2006.229.11:59:09.70#ibcon#read 5, iclass 15, count 2 2006.229.11:59:09.70#ibcon#about to read 6, iclass 15, count 2 2006.229.11:59:09.70#ibcon#read 6, iclass 15, count 2 2006.229.11:59:09.70#ibcon#end of sib2, iclass 15, count 2 2006.229.11:59:09.70#ibcon#*mode == 0, iclass 15, count 2 2006.229.11:59:09.70#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.11:59:09.70#ibcon#[27=AT06-04\r\n] 2006.229.11:59:09.70#ibcon#*before write, iclass 15, count 2 2006.229.11:59:09.70#ibcon#enter sib2, iclass 15, count 2 2006.229.11:59:09.70#ibcon#flushed, iclass 15, count 2 2006.229.11:59:09.70#ibcon#about to write, iclass 15, count 2 2006.229.11:59:09.70#ibcon#wrote, iclass 15, count 2 2006.229.11:59:09.70#ibcon#about to read 3, iclass 15, count 2 2006.229.11:59:09.73#ibcon#read 3, iclass 15, count 2 2006.229.11:59:09.73#ibcon#about to read 4, iclass 15, count 2 2006.229.11:59:09.73#ibcon#read 4, iclass 15, count 2 2006.229.11:59:09.73#ibcon#about to read 5, iclass 15, count 2 2006.229.11:59:09.73#ibcon#read 5, iclass 15, count 2 2006.229.11:59:09.73#ibcon#about to read 6, iclass 15, count 2 2006.229.11:59:09.73#ibcon#read 6, iclass 15, count 2 2006.229.11:59:09.73#ibcon#end of sib2, iclass 15, count 2 2006.229.11:59:09.73#ibcon#*after write, iclass 15, count 2 2006.229.11:59:09.73#ibcon#*before return 0, iclass 15, count 2 2006.229.11:59:09.73#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:09.73#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.11:59:09.73#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.11:59:09.73#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:09.73#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:09.85#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:09.85#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:09.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.11:59:09.85#ibcon#first serial, iclass 15, count 0 2006.229.11:59:09.85#ibcon#enter sib2, iclass 15, count 0 2006.229.11:59:09.85#ibcon#flushed, iclass 15, count 0 2006.229.11:59:09.85#ibcon#about to write, iclass 15, count 0 2006.229.11:59:09.85#ibcon#wrote, iclass 15, count 0 2006.229.11:59:09.85#ibcon#about to read 3, iclass 15, count 0 2006.229.11:59:09.87#ibcon#read 3, iclass 15, count 0 2006.229.11:59:09.87#ibcon#about to read 4, iclass 15, count 0 2006.229.11:59:09.87#ibcon#read 4, iclass 15, count 0 2006.229.11:59:09.87#ibcon#about to read 5, iclass 15, count 0 2006.229.11:59:09.87#ibcon#read 5, iclass 15, count 0 2006.229.11:59:09.87#ibcon#about to read 6, iclass 15, count 0 2006.229.11:59:09.87#ibcon#read 6, iclass 15, count 0 2006.229.11:59:09.87#ibcon#end of sib2, iclass 15, count 0 2006.229.11:59:09.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.11:59:09.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.11:59:09.87#ibcon#[27=USB\r\n] 2006.229.11:59:09.87#ibcon#*before write, iclass 15, count 0 2006.229.11:59:09.87#ibcon#enter sib2, iclass 15, count 0 2006.229.11:59:09.87#ibcon#flushed, iclass 15, count 0 2006.229.11:59:09.87#ibcon#about to write, iclass 15, count 0 2006.229.11:59:09.87#ibcon#wrote, iclass 15, count 0 2006.229.11:59:09.87#ibcon#about to read 3, iclass 15, count 0 2006.229.11:59:09.90#abcon#<5=/04 1.5 3.4 27.841001002.3\r\n> 2006.229.11:59:09.90#ibcon#read 3, iclass 15, count 0 2006.229.11:59:09.90#ibcon#about to read 4, iclass 15, count 0 2006.229.11:59:09.90#ibcon#read 4, iclass 15, count 0 2006.229.11:59:09.90#ibcon#about to read 5, iclass 15, count 0 2006.229.11:59:09.90#ibcon#read 5, iclass 15, count 0 2006.229.11:59:09.90#ibcon#about to read 6, iclass 15, count 0 2006.229.11:59:09.90#ibcon#read 6, iclass 15, count 0 2006.229.11:59:09.90#ibcon#end of sib2, iclass 15, count 0 2006.229.11:59:09.90#ibcon#*after write, iclass 15, count 0 2006.229.11:59:09.90#ibcon#*before return 0, iclass 15, count 0 2006.229.11:59:09.90#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:09.90#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.11:59:09.90#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.11:59:09.90#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.11:59:09.90$vck44/vblo=7,734.99 2006.229.11:59:09.90#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.11:59:09.90#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.11:59:09.90#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:09.90#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:59:09.90#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:59:09.90#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:59:09.90#ibcon#enter wrdev, iclass 20, count 0 2006.229.11:59:09.90#ibcon#first serial, iclass 20, count 0 2006.229.11:59:09.90#ibcon#enter sib2, iclass 20, count 0 2006.229.11:59:09.90#ibcon#flushed, iclass 20, count 0 2006.229.11:59:09.90#ibcon#about to write, iclass 20, count 0 2006.229.11:59:09.90#ibcon#wrote, iclass 20, count 0 2006.229.11:59:09.90#ibcon#about to read 3, iclass 20, count 0 2006.229.11:59:09.92#ibcon#read 3, iclass 20, count 0 2006.229.11:59:09.92#ibcon#about to read 4, iclass 20, count 0 2006.229.11:59:09.92#ibcon#read 4, iclass 20, count 0 2006.229.11:59:09.92#ibcon#about to read 5, iclass 20, count 0 2006.229.11:59:09.92#ibcon#read 5, iclass 20, count 0 2006.229.11:59:09.92#ibcon#about to read 6, iclass 20, count 0 2006.229.11:59:09.92#ibcon#read 6, iclass 20, count 0 2006.229.11:59:09.92#ibcon#end of sib2, iclass 20, count 0 2006.229.11:59:09.92#ibcon#*mode == 0, iclass 20, count 0 2006.229.11:59:09.92#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.11:59:09.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.11:59:09.92#ibcon#*before write, iclass 20, count 0 2006.229.11:59:09.92#ibcon#enter sib2, iclass 20, count 0 2006.229.11:59:09.92#ibcon#flushed, iclass 20, count 0 2006.229.11:59:09.92#ibcon#about to write, iclass 20, count 0 2006.229.11:59:09.92#ibcon#wrote, iclass 20, count 0 2006.229.11:59:09.92#ibcon#about to read 3, iclass 20, count 0 2006.229.11:59:09.92#abcon#{5=INTERFACE CLEAR} 2006.229.11:59:09.96#ibcon#read 3, iclass 20, count 0 2006.229.11:59:09.96#ibcon#about to read 4, iclass 20, count 0 2006.229.11:59:09.96#ibcon#read 4, iclass 20, count 0 2006.229.11:59:09.96#ibcon#about to read 5, iclass 20, count 0 2006.229.11:59:09.96#ibcon#read 5, iclass 20, count 0 2006.229.11:59:09.96#ibcon#about to read 6, iclass 20, count 0 2006.229.11:59:09.96#ibcon#read 6, iclass 20, count 0 2006.229.11:59:09.96#ibcon#end of sib2, iclass 20, count 0 2006.229.11:59:09.96#ibcon#*after write, iclass 20, count 0 2006.229.11:59:09.96#ibcon#*before return 0, iclass 20, count 0 2006.229.11:59:09.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:59:09.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.11:59:09.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.11:59:09.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.11:59:09.96$vck44/vb=7,4 2006.229.11:59:09.96#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.11:59:09.96#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.11:59:09.96#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:09.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:59:09.98#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:59:10.02#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:59:10.02#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:59:10.02#ibcon#enter wrdev, iclass 22, count 2 2006.229.11:59:10.02#ibcon#first serial, iclass 22, count 2 2006.229.11:59:10.02#ibcon#enter sib2, iclass 22, count 2 2006.229.11:59:10.02#ibcon#flushed, iclass 22, count 2 2006.229.11:59:10.02#ibcon#about to write, iclass 22, count 2 2006.229.11:59:10.02#ibcon#wrote, iclass 22, count 2 2006.229.11:59:10.02#ibcon#about to read 3, iclass 22, count 2 2006.229.11:59:10.04#ibcon#read 3, iclass 22, count 2 2006.229.11:59:10.04#ibcon#about to read 4, iclass 22, count 2 2006.229.11:59:10.04#ibcon#read 4, iclass 22, count 2 2006.229.11:59:10.04#ibcon#about to read 5, iclass 22, count 2 2006.229.11:59:10.04#ibcon#read 5, iclass 22, count 2 2006.229.11:59:10.04#ibcon#about to read 6, iclass 22, count 2 2006.229.11:59:10.04#ibcon#read 6, iclass 22, count 2 2006.229.11:59:10.04#ibcon#end of sib2, iclass 22, count 2 2006.229.11:59:10.04#ibcon#*mode == 0, iclass 22, count 2 2006.229.11:59:10.04#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.11:59:10.04#ibcon#[27=AT07-04\r\n] 2006.229.11:59:10.04#ibcon#*before write, iclass 22, count 2 2006.229.11:59:10.04#ibcon#enter sib2, iclass 22, count 2 2006.229.11:59:10.04#ibcon#flushed, iclass 22, count 2 2006.229.11:59:10.04#ibcon#about to write, iclass 22, count 2 2006.229.11:59:10.04#ibcon#wrote, iclass 22, count 2 2006.229.11:59:10.04#ibcon#about to read 3, iclass 22, count 2 2006.229.11:59:10.07#ibcon#read 3, iclass 22, count 2 2006.229.11:59:10.07#ibcon#about to read 4, iclass 22, count 2 2006.229.11:59:10.07#ibcon#read 4, iclass 22, count 2 2006.229.11:59:10.07#ibcon#about to read 5, iclass 22, count 2 2006.229.11:59:10.07#ibcon#read 5, iclass 22, count 2 2006.229.11:59:10.07#ibcon#about to read 6, iclass 22, count 2 2006.229.11:59:10.07#ibcon#read 6, iclass 22, count 2 2006.229.11:59:10.07#ibcon#end of sib2, iclass 22, count 2 2006.229.11:59:10.07#ibcon#*after write, iclass 22, count 2 2006.229.11:59:10.07#ibcon#*before return 0, iclass 22, count 2 2006.229.11:59:10.07#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:59:10.07#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.11:59:10.07#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.11:59:10.07#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:10.07#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:59:10.19#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:59:10.19#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:59:10.19#ibcon#enter wrdev, iclass 22, count 0 2006.229.11:59:10.19#ibcon#first serial, iclass 22, count 0 2006.229.11:59:10.19#ibcon#enter sib2, iclass 22, count 0 2006.229.11:59:10.19#ibcon#flushed, iclass 22, count 0 2006.229.11:59:10.19#ibcon#about to write, iclass 22, count 0 2006.229.11:59:10.19#ibcon#wrote, iclass 22, count 0 2006.229.11:59:10.19#ibcon#about to read 3, iclass 22, count 0 2006.229.11:59:10.21#ibcon#read 3, iclass 22, count 0 2006.229.11:59:10.21#ibcon#about to read 4, iclass 22, count 0 2006.229.11:59:10.21#ibcon#read 4, iclass 22, count 0 2006.229.11:59:10.21#ibcon#about to read 5, iclass 22, count 0 2006.229.11:59:10.21#ibcon#read 5, iclass 22, count 0 2006.229.11:59:10.21#ibcon#about to read 6, iclass 22, count 0 2006.229.11:59:10.21#ibcon#read 6, iclass 22, count 0 2006.229.11:59:10.21#ibcon#end of sib2, iclass 22, count 0 2006.229.11:59:10.21#ibcon#*mode == 0, iclass 22, count 0 2006.229.11:59:10.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.11:59:10.21#ibcon#[27=USB\r\n] 2006.229.11:59:10.21#ibcon#*before write, iclass 22, count 0 2006.229.11:59:10.21#ibcon#enter sib2, iclass 22, count 0 2006.229.11:59:10.21#ibcon#flushed, iclass 22, count 0 2006.229.11:59:10.21#ibcon#about to write, iclass 22, count 0 2006.229.11:59:10.21#ibcon#wrote, iclass 22, count 0 2006.229.11:59:10.21#ibcon#about to read 3, iclass 22, count 0 2006.229.11:59:10.24#ibcon#read 3, iclass 22, count 0 2006.229.11:59:10.24#ibcon#about to read 4, iclass 22, count 0 2006.229.11:59:10.24#ibcon#read 4, iclass 22, count 0 2006.229.11:59:10.24#ibcon#about to read 5, iclass 22, count 0 2006.229.11:59:10.24#ibcon#read 5, iclass 22, count 0 2006.229.11:59:10.24#ibcon#about to read 6, iclass 22, count 0 2006.229.11:59:10.24#ibcon#read 6, iclass 22, count 0 2006.229.11:59:10.24#ibcon#end of sib2, iclass 22, count 0 2006.229.11:59:10.24#ibcon#*after write, iclass 22, count 0 2006.229.11:59:10.24#ibcon#*before return 0, iclass 22, count 0 2006.229.11:59:10.24#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:59:10.24#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.11:59:10.24#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.11:59:10.24#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.11:59:10.24$vck44/vblo=8,744.99 2006.229.11:59:10.24#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.11:59:10.24#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.11:59:10.24#ibcon#ireg 17 cls_cnt 0 2006.229.11:59:10.24#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:10.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:10.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:10.24#ibcon#enter wrdev, iclass 25, count 0 2006.229.11:59:10.24#ibcon#first serial, iclass 25, count 0 2006.229.11:59:10.24#ibcon#enter sib2, iclass 25, count 0 2006.229.11:59:10.24#ibcon#flushed, iclass 25, count 0 2006.229.11:59:10.24#ibcon#about to write, iclass 25, count 0 2006.229.11:59:10.24#ibcon#wrote, iclass 25, count 0 2006.229.11:59:10.24#ibcon#about to read 3, iclass 25, count 0 2006.229.11:59:10.26#ibcon#read 3, iclass 25, count 0 2006.229.11:59:10.26#ibcon#about to read 4, iclass 25, count 0 2006.229.11:59:10.26#ibcon#read 4, iclass 25, count 0 2006.229.11:59:10.26#ibcon#about to read 5, iclass 25, count 0 2006.229.11:59:10.26#ibcon#read 5, iclass 25, count 0 2006.229.11:59:10.26#ibcon#about to read 6, iclass 25, count 0 2006.229.11:59:10.26#ibcon#read 6, iclass 25, count 0 2006.229.11:59:10.26#ibcon#end of sib2, iclass 25, count 0 2006.229.11:59:10.26#ibcon#*mode == 0, iclass 25, count 0 2006.229.11:59:10.26#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.11:59:10.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.11:59:10.26#ibcon#*before write, iclass 25, count 0 2006.229.11:59:10.26#ibcon#enter sib2, iclass 25, count 0 2006.229.11:59:10.26#ibcon#flushed, iclass 25, count 0 2006.229.11:59:10.26#ibcon#about to write, iclass 25, count 0 2006.229.11:59:10.26#ibcon#wrote, iclass 25, count 0 2006.229.11:59:10.26#ibcon#about to read 3, iclass 25, count 0 2006.229.11:59:10.30#ibcon#read 3, iclass 25, count 0 2006.229.11:59:10.30#ibcon#about to read 4, iclass 25, count 0 2006.229.11:59:10.30#ibcon#read 4, iclass 25, count 0 2006.229.11:59:10.30#ibcon#about to read 5, iclass 25, count 0 2006.229.11:59:10.30#ibcon#read 5, iclass 25, count 0 2006.229.11:59:10.30#ibcon#about to read 6, iclass 25, count 0 2006.229.11:59:10.30#ibcon#read 6, iclass 25, count 0 2006.229.11:59:10.30#ibcon#end of sib2, iclass 25, count 0 2006.229.11:59:10.30#ibcon#*after write, iclass 25, count 0 2006.229.11:59:10.30#ibcon#*before return 0, iclass 25, count 0 2006.229.11:59:10.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:10.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.11:59:10.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.11:59:10.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.11:59:10.30$vck44/vb=8,4 2006.229.11:59:10.30#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.11:59:10.30#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.11:59:10.30#ibcon#ireg 11 cls_cnt 2 2006.229.11:59:10.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:10.36#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:10.36#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:10.36#ibcon#enter wrdev, iclass 27, count 2 2006.229.11:59:10.36#ibcon#first serial, iclass 27, count 2 2006.229.11:59:10.36#ibcon#enter sib2, iclass 27, count 2 2006.229.11:59:10.36#ibcon#flushed, iclass 27, count 2 2006.229.11:59:10.36#ibcon#about to write, iclass 27, count 2 2006.229.11:59:10.36#ibcon#wrote, iclass 27, count 2 2006.229.11:59:10.36#ibcon#about to read 3, iclass 27, count 2 2006.229.11:59:10.38#ibcon#read 3, iclass 27, count 2 2006.229.11:59:10.38#ibcon#about to read 4, iclass 27, count 2 2006.229.11:59:10.38#ibcon#read 4, iclass 27, count 2 2006.229.11:59:10.38#ibcon#about to read 5, iclass 27, count 2 2006.229.11:59:10.38#ibcon#read 5, iclass 27, count 2 2006.229.11:59:10.38#ibcon#about to read 6, iclass 27, count 2 2006.229.11:59:10.38#ibcon#read 6, iclass 27, count 2 2006.229.11:59:10.38#ibcon#end of sib2, iclass 27, count 2 2006.229.11:59:10.38#ibcon#*mode == 0, iclass 27, count 2 2006.229.11:59:10.38#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.11:59:10.38#ibcon#[27=AT08-04\r\n] 2006.229.11:59:10.38#ibcon#*before write, iclass 27, count 2 2006.229.11:59:10.38#ibcon#enter sib2, iclass 27, count 2 2006.229.11:59:10.38#ibcon#flushed, iclass 27, count 2 2006.229.11:59:10.38#ibcon#about to write, iclass 27, count 2 2006.229.11:59:10.38#ibcon#wrote, iclass 27, count 2 2006.229.11:59:10.38#ibcon#about to read 3, iclass 27, count 2 2006.229.11:59:10.41#ibcon#read 3, iclass 27, count 2 2006.229.11:59:10.41#ibcon#about to read 4, iclass 27, count 2 2006.229.11:59:10.41#ibcon#read 4, iclass 27, count 2 2006.229.11:59:10.41#ibcon#about to read 5, iclass 27, count 2 2006.229.11:59:10.41#ibcon#read 5, iclass 27, count 2 2006.229.11:59:10.41#ibcon#about to read 6, iclass 27, count 2 2006.229.11:59:10.41#ibcon#read 6, iclass 27, count 2 2006.229.11:59:10.41#ibcon#end of sib2, iclass 27, count 2 2006.229.11:59:10.41#ibcon#*after write, iclass 27, count 2 2006.229.11:59:10.41#ibcon#*before return 0, iclass 27, count 2 2006.229.11:59:10.41#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:10.41#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.11:59:10.41#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.11:59:10.41#ibcon#ireg 7 cls_cnt 0 2006.229.11:59:10.41#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:10.53#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:10.53#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:10.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.11:59:10.53#ibcon#first serial, iclass 27, count 0 2006.229.11:59:10.53#ibcon#enter sib2, iclass 27, count 0 2006.229.11:59:10.53#ibcon#flushed, iclass 27, count 0 2006.229.11:59:10.53#ibcon#about to write, iclass 27, count 0 2006.229.11:59:10.53#ibcon#wrote, iclass 27, count 0 2006.229.11:59:10.53#ibcon#about to read 3, iclass 27, count 0 2006.229.11:59:10.55#ibcon#read 3, iclass 27, count 0 2006.229.11:59:10.55#ibcon#about to read 4, iclass 27, count 0 2006.229.11:59:10.55#ibcon#read 4, iclass 27, count 0 2006.229.11:59:10.55#ibcon#about to read 5, iclass 27, count 0 2006.229.11:59:10.55#ibcon#read 5, iclass 27, count 0 2006.229.11:59:10.55#ibcon#about to read 6, iclass 27, count 0 2006.229.11:59:10.55#ibcon#read 6, iclass 27, count 0 2006.229.11:59:10.55#ibcon#end of sib2, iclass 27, count 0 2006.229.11:59:10.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.11:59:10.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.11:59:10.55#ibcon#[27=USB\r\n] 2006.229.11:59:10.55#ibcon#*before write, iclass 27, count 0 2006.229.11:59:10.55#ibcon#enter sib2, iclass 27, count 0 2006.229.11:59:10.55#ibcon#flushed, iclass 27, count 0 2006.229.11:59:10.55#ibcon#about to write, iclass 27, count 0 2006.229.11:59:10.55#ibcon#wrote, iclass 27, count 0 2006.229.11:59:10.55#ibcon#about to read 3, iclass 27, count 0 2006.229.11:59:10.58#ibcon#read 3, iclass 27, count 0 2006.229.11:59:10.58#ibcon#about to read 4, iclass 27, count 0 2006.229.11:59:10.58#ibcon#read 4, iclass 27, count 0 2006.229.11:59:10.58#ibcon#about to read 5, iclass 27, count 0 2006.229.11:59:10.58#ibcon#read 5, iclass 27, count 0 2006.229.11:59:10.58#ibcon#about to read 6, iclass 27, count 0 2006.229.11:59:10.58#ibcon#read 6, iclass 27, count 0 2006.229.11:59:10.58#ibcon#end of sib2, iclass 27, count 0 2006.229.11:59:10.58#ibcon#*after write, iclass 27, count 0 2006.229.11:59:10.58#ibcon#*before return 0, iclass 27, count 0 2006.229.11:59:10.58#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:10.58#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.11:59:10.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.11:59:10.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.11:59:10.58$vck44/vabw=wide 2006.229.11:59:10.58#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.11:59:10.58#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.11:59:10.58#ibcon#ireg 8 cls_cnt 0 2006.229.11:59:10.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:10.58#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:10.58#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:10.58#ibcon#enter wrdev, iclass 29, count 0 2006.229.11:59:10.58#ibcon#first serial, iclass 29, count 0 2006.229.11:59:10.58#ibcon#enter sib2, iclass 29, count 0 2006.229.11:59:10.58#ibcon#flushed, iclass 29, count 0 2006.229.11:59:10.58#ibcon#about to write, iclass 29, count 0 2006.229.11:59:10.58#ibcon#wrote, iclass 29, count 0 2006.229.11:59:10.58#ibcon#about to read 3, iclass 29, count 0 2006.229.11:59:10.60#ibcon#read 3, iclass 29, count 0 2006.229.11:59:10.60#ibcon#about to read 4, iclass 29, count 0 2006.229.11:59:10.60#ibcon#read 4, iclass 29, count 0 2006.229.11:59:10.60#ibcon#about to read 5, iclass 29, count 0 2006.229.11:59:10.60#ibcon#read 5, iclass 29, count 0 2006.229.11:59:10.60#ibcon#about to read 6, iclass 29, count 0 2006.229.11:59:10.60#ibcon#read 6, iclass 29, count 0 2006.229.11:59:10.60#ibcon#end of sib2, iclass 29, count 0 2006.229.11:59:10.60#ibcon#*mode == 0, iclass 29, count 0 2006.229.11:59:10.60#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.11:59:10.60#ibcon#[25=BW32\r\n] 2006.229.11:59:10.60#ibcon#*before write, iclass 29, count 0 2006.229.11:59:10.60#ibcon#enter sib2, iclass 29, count 0 2006.229.11:59:10.60#ibcon#flushed, iclass 29, count 0 2006.229.11:59:10.60#ibcon#about to write, iclass 29, count 0 2006.229.11:59:10.60#ibcon#wrote, iclass 29, count 0 2006.229.11:59:10.60#ibcon#about to read 3, iclass 29, count 0 2006.229.11:59:10.63#ibcon#read 3, iclass 29, count 0 2006.229.11:59:10.63#ibcon#about to read 4, iclass 29, count 0 2006.229.11:59:10.63#ibcon#read 4, iclass 29, count 0 2006.229.11:59:10.63#ibcon#about to read 5, iclass 29, count 0 2006.229.11:59:10.63#ibcon#read 5, iclass 29, count 0 2006.229.11:59:10.63#ibcon#about to read 6, iclass 29, count 0 2006.229.11:59:10.63#ibcon#read 6, iclass 29, count 0 2006.229.11:59:10.63#ibcon#end of sib2, iclass 29, count 0 2006.229.11:59:10.63#ibcon#*after write, iclass 29, count 0 2006.229.11:59:10.63#ibcon#*before return 0, iclass 29, count 0 2006.229.11:59:10.63#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:10.63#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.11:59:10.63#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.11:59:10.63#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.11:59:10.63$vck44/vbbw=wide 2006.229.11:59:10.63#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.11:59:10.63#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.11:59:10.63#ibcon#ireg 8 cls_cnt 0 2006.229.11:59:10.63#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:59:10.70#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:59:10.70#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:59:10.70#ibcon#enter wrdev, iclass 31, count 0 2006.229.11:59:10.70#ibcon#first serial, iclass 31, count 0 2006.229.11:59:10.70#ibcon#enter sib2, iclass 31, count 0 2006.229.11:59:10.70#ibcon#flushed, iclass 31, count 0 2006.229.11:59:10.70#ibcon#about to write, iclass 31, count 0 2006.229.11:59:10.70#ibcon#wrote, iclass 31, count 0 2006.229.11:59:10.70#ibcon#about to read 3, iclass 31, count 0 2006.229.11:59:10.72#ibcon#read 3, iclass 31, count 0 2006.229.11:59:10.72#ibcon#about to read 4, iclass 31, count 0 2006.229.11:59:10.72#ibcon#read 4, iclass 31, count 0 2006.229.11:59:10.72#ibcon#about to read 5, iclass 31, count 0 2006.229.11:59:10.72#ibcon#read 5, iclass 31, count 0 2006.229.11:59:10.72#ibcon#about to read 6, iclass 31, count 0 2006.229.11:59:10.72#ibcon#read 6, iclass 31, count 0 2006.229.11:59:10.72#ibcon#end of sib2, iclass 31, count 0 2006.229.11:59:10.72#ibcon#*mode == 0, iclass 31, count 0 2006.229.11:59:10.72#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.11:59:10.72#ibcon#[27=BW32\r\n] 2006.229.11:59:10.72#ibcon#*before write, iclass 31, count 0 2006.229.11:59:10.72#ibcon#enter sib2, iclass 31, count 0 2006.229.11:59:10.72#ibcon#flushed, iclass 31, count 0 2006.229.11:59:10.72#ibcon#about to write, iclass 31, count 0 2006.229.11:59:10.72#ibcon#wrote, iclass 31, count 0 2006.229.11:59:10.72#ibcon#about to read 3, iclass 31, count 0 2006.229.11:59:10.75#ibcon#read 3, iclass 31, count 0 2006.229.11:59:10.75#ibcon#about to read 4, iclass 31, count 0 2006.229.11:59:10.75#ibcon#read 4, iclass 31, count 0 2006.229.11:59:10.75#ibcon#about to read 5, iclass 31, count 0 2006.229.11:59:10.75#ibcon#read 5, iclass 31, count 0 2006.229.11:59:10.75#ibcon#about to read 6, iclass 31, count 0 2006.229.11:59:10.75#ibcon#read 6, iclass 31, count 0 2006.229.11:59:10.75#ibcon#end of sib2, iclass 31, count 0 2006.229.11:59:10.75#ibcon#*after write, iclass 31, count 0 2006.229.11:59:10.75#ibcon#*before return 0, iclass 31, count 0 2006.229.11:59:10.75#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:59:10.75#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.11:59:10.75#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.11:59:10.75#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.11:59:10.75$setupk4/ifdk4 2006.229.11:59:10.75$ifdk4/lo= 2006.229.11:59:10.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.11:59:10.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.11:59:10.75$ifdk4/patch= 2006.229.11:59:10.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.11:59:10.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.11:59:10.75$setupk4/!*+20s 2006.229.11:59:20.07#abcon#<5=/04 1.6 3.4 27.841001002.3\r\n> 2006.229.11:59:20.09#abcon#{5=INTERFACE CLEAR} 2006.229.11:59:20.15#abcon#[5=S1D000X0/0*\r\n] 2006.229.11:59:25.26$setupk4/"tpicd 2006.229.11:59:25.26$setupk4/echo=off 2006.229.11:59:25.26$setupk4/xlog=off 2006.229.11:59:25.26:!2006.229.12:01:34 2006.229.11:59:36.14#trakl#Source acquired 2006.229.11:59:36.14#flagr#flagr/antenna,acquired 2006.229.12:01:34.00:preob 2006.229.12:01:34.14/onsource/TRACKING 2006.229.12:01:34.14:!2006.229.12:01:44 2006.229.12:01:44.00:"tape 2006.229.12:01:44.00:"st=record 2006.229.12:01:44.00:data_valid=on 2006.229.12:01:44.00:midob 2006.229.12:01:45.14/onsource/TRACKING 2006.229.12:01:45.14/wx/27.82,1002.3,100 2006.229.12:01:45.26/cable/+6.4078E-03 2006.229.12:01:46.35/va/01,08,usb,yes,30,32 2006.229.12:01:46.35/va/02,07,usb,yes,32,33 2006.229.12:01:46.35/va/03,06,usb,yes,40,43 2006.229.12:01:46.35/va/04,07,usb,yes,33,35 2006.229.12:01:46.35/va/05,04,usb,yes,30,30 2006.229.12:01:46.35/va/06,04,usb,yes,34,33 2006.229.12:01:46.35/va/07,05,usb,yes,30,30 2006.229.12:01:46.35/va/08,06,usb,yes,22,27 2006.229.12:01:46.58/valo/01,524.99,yes,locked 2006.229.12:01:46.58/valo/02,534.99,yes,locked 2006.229.12:01:46.58/valo/03,564.99,yes,locked 2006.229.12:01:46.58/valo/04,624.99,yes,locked 2006.229.12:01:46.58/valo/05,734.99,yes,locked 2006.229.12:01:46.58/valo/06,814.99,yes,locked 2006.229.12:01:46.58/valo/07,864.99,yes,locked 2006.229.12:01:46.58/valo/08,884.99,yes,locked 2006.229.12:01:47.67/vb/01,04,usb,yes,31,29 2006.229.12:01:47.67/vb/02,04,usb,yes,33,33 2006.229.12:01:47.67/vb/03,04,usb,yes,30,33 2006.229.12:01:47.67/vb/04,04,usb,yes,35,34 2006.229.12:01:47.67/vb/05,04,usb,yes,27,30 2006.229.12:01:47.67/vb/06,04,usb,yes,32,28 2006.229.12:01:47.67/vb/07,04,usb,yes,31,31 2006.229.12:01:47.67/vb/08,04,usb,yes,29,32 2006.229.12:01:47.91/vblo/01,629.99,yes,locked 2006.229.12:01:47.91/vblo/02,634.99,yes,locked 2006.229.12:01:47.91/vblo/03,649.99,yes,locked 2006.229.12:01:47.91/vblo/04,679.99,yes,locked 2006.229.12:01:47.91/vblo/05,709.99,yes,locked 2006.229.12:01:47.91/vblo/06,719.99,yes,locked 2006.229.12:01:47.91/vblo/07,734.99,yes,locked 2006.229.12:01:47.91/vblo/08,744.99,yes,locked 2006.229.12:01:48.06/vabw/8 2006.229.12:01:48.21/vbbw/8 2006.229.12:01:48.30/xfe/off,on,12.0 2006.229.12:01:48.67/ifatt/23,28,28,28 2006.229.12:01:49.08/fmout-gps/S +4.17E-07 2006.229.12:01:49.12:!2006.229.12:02:24 2006.229.12:02:24.00:data_valid=off 2006.229.12:02:24.00:"et 2006.229.12:02:24.00:!+3s 2006.229.12:02:27.01:"tape 2006.229.12:02:27.01:postob 2006.229.12:02:27.18/cable/+6.4075E-03 2006.229.12:02:27.18/wx/27.81,1002.3,100 2006.229.12:02:28.08/fmout-gps/S +4.16E-07 2006.229.12:02:28.08:scan_name=229-1204,jd0608,40 2006.229.12:02:28.08:source=3c345,164258.81,394837.0,2000.0,cw 2006.229.12:02:29.13#flagr#flagr/antenna,new-source 2006.229.12:02:29.13:checkk5 2006.229.12:02:29.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:02:29.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:02:30.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:02:30.69/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:02:31.06/chk_obsdata//k5ts1/T2291201??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:02:31.45/chk_obsdata//k5ts2/T2291201??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:02:31.86/chk_obsdata//k5ts3/T2291201??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:02:32.25/chk_obsdata//k5ts4/T2291201??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:02:32.97/k5log//k5ts1_log_newline 2006.229.12:02:33.66/k5log//k5ts2_log_newline 2006.229.12:02:34.36/k5log//k5ts3_log_newline 2006.229.12:02:35.07/k5log//k5ts4_log_newline 2006.229.12:02:35.09/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:02:35.09:setupk4=1 2006.229.12:02:35.09$setupk4/echo=on 2006.229.12:02:35.09$setupk4/pcalon 2006.229.12:02:35.09$pcalon/"no phase cal control is implemented here 2006.229.12:02:35.09$setupk4/"tpicd=stop 2006.229.12:02:35.09$setupk4/"rec=synch_on 2006.229.12:02:35.09$setupk4/"rec_mode=128 2006.229.12:02:35.09$setupk4/!* 2006.229.12:02:35.09$setupk4/recpk4 2006.229.12:02:35.09$recpk4/recpatch= 2006.229.12:02:35.09$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:02:35.09$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:02:35.10$setupk4/vck44 2006.229.12:02:35.10$vck44/valo=1,524.99 2006.229.12:02:35.10#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.12:02:35.10#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.12:02:35.10#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:35.10#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:35.10#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:35.10#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:35.10#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:02:35.10#ibcon#first serial, iclass 6, count 0 2006.229.12:02:35.10#ibcon#enter sib2, iclass 6, count 0 2006.229.12:02:35.10#ibcon#flushed, iclass 6, count 0 2006.229.12:02:35.10#ibcon#about to write, iclass 6, count 0 2006.229.12:02:35.10#ibcon#wrote, iclass 6, count 0 2006.229.12:02:35.10#ibcon#about to read 3, iclass 6, count 0 2006.229.12:02:35.11#ibcon#read 3, iclass 6, count 0 2006.229.12:02:35.11#ibcon#about to read 4, iclass 6, count 0 2006.229.12:02:35.11#ibcon#read 4, iclass 6, count 0 2006.229.12:02:35.11#ibcon#about to read 5, iclass 6, count 0 2006.229.12:02:35.11#ibcon#read 5, iclass 6, count 0 2006.229.12:02:35.11#ibcon#about to read 6, iclass 6, count 0 2006.229.12:02:35.11#ibcon#read 6, iclass 6, count 0 2006.229.12:02:35.11#ibcon#end of sib2, iclass 6, count 0 2006.229.12:02:35.11#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:02:35.11#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:02:35.11#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:02:35.11#ibcon#*before write, iclass 6, count 0 2006.229.12:02:35.11#ibcon#enter sib2, iclass 6, count 0 2006.229.12:02:35.11#ibcon#flushed, iclass 6, count 0 2006.229.12:02:35.11#ibcon#about to write, iclass 6, count 0 2006.229.12:02:35.11#ibcon#wrote, iclass 6, count 0 2006.229.12:02:35.11#ibcon#about to read 3, iclass 6, count 0 2006.229.12:02:35.16#ibcon#read 3, iclass 6, count 0 2006.229.12:02:35.16#ibcon#about to read 4, iclass 6, count 0 2006.229.12:02:35.16#ibcon#read 4, iclass 6, count 0 2006.229.12:02:35.16#ibcon#about to read 5, iclass 6, count 0 2006.229.12:02:35.16#ibcon#read 5, iclass 6, count 0 2006.229.12:02:35.16#ibcon#about to read 6, iclass 6, count 0 2006.229.12:02:35.16#ibcon#read 6, iclass 6, count 0 2006.229.12:02:35.16#ibcon#end of sib2, iclass 6, count 0 2006.229.12:02:35.16#ibcon#*after write, iclass 6, count 0 2006.229.12:02:35.16#ibcon#*before return 0, iclass 6, count 0 2006.229.12:02:35.16#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:35.16#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:35.16#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:02:35.16#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:02:35.16$vck44/va=1,8 2006.229.12:02:35.16#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.12:02:35.16#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.12:02:35.16#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:35.16#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:35.16#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:35.16#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:35.16#ibcon#enter wrdev, iclass 10, count 2 2006.229.12:02:35.16#ibcon#first serial, iclass 10, count 2 2006.229.12:02:35.16#ibcon#enter sib2, iclass 10, count 2 2006.229.12:02:35.16#ibcon#flushed, iclass 10, count 2 2006.229.12:02:35.16#ibcon#about to write, iclass 10, count 2 2006.229.12:02:35.16#ibcon#wrote, iclass 10, count 2 2006.229.12:02:35.16#ibcon#about to read 3, iclass 10, count 2 2006.229.12:02:35.18#ibcon#read 3, iclass 10, count 2 2006.229.12:02:35.18#ibcon#about to read 4, iclass 10, count 2 2006.229.12:02:35.18#ibcon#read 4, iclass 10, count 2 2006.229.12:02:35.18#ibcon#about to read 5, iclass 10, count 2 2006.229.12:02:35.18#ibcon#read 5, iclass 10, count 2 2006.229.12:02:35.18#ibcon#about to read 6, iclass 10, count 2 2006.229.12:02:35.18#ibcon#read 6, iclass 10, count 2 2006.229.12:02:35.18#ibcon#end of sib2, iclass 10, count 2 2006.229.12:02:35.18#ibcon#*mode == 0, iclass 10, count 2 2006.229.12:02:35.18#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.12:02:35.18#ibcon#[25=AT01-08\r\n] 2006.229.12:02:35.18#ibcon#*before write, iclass 10, count 2 2006.229.12:02:35.18#ibcon#enter sib2, iclass 10, count 2 2006.229.12:02:35.18#ibcon#flushed, iclass 10, count 2 2006.229.12:02:35.18#ibcon#about to write, iclass 10, count 2 2006.229.12:02:35.18#ibcon#wrote, iclass 10, count 2 2006.229.12:02:35.18#ibcon#about to read 3, iclass 10, count 2 2006.229.12:02:35.21#ibcon#read 3, iclass 10, count 2 2006.229.12:02:35.21#ibcon#about to read 4, iclass 10, count 2 2006.229.12:02:35.21#ibcon#read 4, iclass 10, count 2 2006.229.12:02:35.21#ibcon#about to read 5, iclass 10, count 2 2006.229.12:02:35.21#ibcon#read 5, iclass 10, count 2 2006.229.12:02:35.21#ibcon#about to read 6, iclass 10, count 2 2006.229.12:02:35.21#ibcon#read 6, iclass 10, count 2 2006.229.12:02:35.21#ibcon#end of sib2, iclass 10, count 2 2006.229.12:02:35.21#ibcon#*after write, iclass 10, count 2 2006.229.12:02:35.21#ibcon#*before return 0, iclass 10, count 2 2006.229.12:02:35.21#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:35.21#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:35.21#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.12:02:35.21#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:35.21#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:35.33#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:35.33#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:35.33#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:02:35.33#ibcon#first serial, iclass 10, count 0 2006.229.12:02:35.33#ibcon#enter sib2, iclass 10, count 0 2006.229.12:02:35.33#ibcon#flushed, iclass 10, count 0 2006.229.12:02:35.33#ibcon#about to write, iclass 10, count 0 2006.229.12:02:35.33#ibcon#wrote, iclass 10, count 0 2006.229.12:02:35.33#ibcon#about to read 3, iclass 10, count 0 2006.229.12:02:35.35#ibcon#read 3, iclass 10, count 0 2006.229.12:02:35.35#ibcon#about to read 4, iclass 10, count 0 2006.229.12:02:35.35#ibcon#read 4, iclass 10, count 0 2006.229.12:02:35.35#ibcon#about to read 5, iclass 10, count 0 2006.229.12:02:35.35#ibcon#read 5, iclass 10, count 0 2006.229.12:02:35.35#ibcon#about to read 6, iclass 10, count 0 2006.229.12:02:35.35#ibcon#read 6, iclass 10, count 0 2006.229.12:02:35.35#ibcon#end of sib2, iclass 10, count 0 2006.229.12:02:35.35#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:02:35.35#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:02:35.35#ibcon#[25=USB\r\n] 2006.229.12:02:35.35#ibcon#*before write, iclass 10, count 0 2006.229.12:02:35.35#ibcon#enter sib2, iclass 10, count 0 2006.229.12:02:35.35#ibcon#flushed, iclass 10, count 0 2006.229.12:02:35.35#ibcon#about to write, iclass 10, count 0 2006.229.12:02:35.35#ibcon#wrote, iclass 10, count 0 2006.229.12:02:35.35#ibcon#about to read 3, iclass 10, count 0 2006.229.12:02:35.38#ibcon#read 3, iclass 10, count 0 2006.229.12:02:35.38#ibcon#about to read 4, iclass 10, count 0 2006.229.12:02:35.38#ibcon#read 4, iclass 10, count 0 2006.229.12:02:35.38#ibcon#about to read 5, iclass 10, count 0 2006.229.12:02:35.38#ibcon#read 5, iclass 10, count 0 2006.229.12:02:35.38#ibcon#about to read 6, iclass 10, count 0 2006.229.12:02:35.38#ibcon#read 6, iclass 10, count 0 2006.229.12:02:35.38#ibcon#end of sib2, iclass 10, count 0 2006.229.12:02:35.38#ibcon#*after write, iclass 10, count 0 2006.229.12:02:35.38#ibcon#*before return 0, iclass 10, count 0 2006.229.12:02:35.38#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:35.38#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:35.38#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:02:35.38#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:02:35.38$vck44/valo=2,534.99 2006.229.12:02:35.38#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:02:35.38#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:02:35.38#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:35.38#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:35.38#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:35.38#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:35.38#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:02:35.38#ibcon#first serial, iclass 12, count 0 2006.229.12:02:35.38#ibcon#enter sib2, iclass 12, count 0 2006.229.12:02:35.38#ibcon#flushed, iclass 12, count 0 2006.229.12:02:35.38#ibcon#about to write, iclass 12, count 0 2006.229.12:02:35.38#ibcon#wrote, iclass 12, count 0 2006.229.12:02:35.38#ibcon#about to read 3, iclass 12, count 0 2006.229.12:02:35.40#ibcon#read 3, iclass 12, count 0 2006.229.12:02:35.40#ibcon#about to read 4, iclass 12, count 0 2006.229.12:02:35.40#ibcon#read 4, iclass 12, count 0 2006.229.12:02:35.40#ibcon#about to read 5, iclass 12, count 0 2006.229.12:02:35.40#ibcon#read 5, iclass 12, count 0 2006.229.12:02:35.40#ibcon#about to read 6, iclass 12, count 0 2006.229.12:02:35.40#ibcon#read 6, iclass 12, count 0 2006.229.12:02:35.40#ibcon#end of sib2, iclass 12, count 0 2006.229.12:02:35.40#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:02:35.40#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:02:35.40#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:02:35.40#ibcon#*before write, iclass 12, count 0 2006.229.12:02:35.40#ibcon#enter sib2, iclass 12, count 0 2006.229.12:02:35.40#ibcon#flushed, iclass 12, count 0 2006.229.12:02:35.40#ibcon#about to write, iclass 12, count 0 2006.229.12:02:35.40#ibcon#wrote, iclass 12, count 0 2006.229.12:02:35.40#ibcon#about to read 3, iclass 12, count 0 2006.229.12:02:35.44#ibcon#read 3, iclass 12, count 0 2006.229.12:02:35.44#ibcon#about to read 4, iclass 12, count 0 2006.229.12:02:35.44#ibcon#read 4, iclass 12, count 0 2006.229.12:02:35.44#ibcon#about to read 5, iclass 12, count 0 2006.229.12:02:35.44#ibcon#read 5, iclass 12, count 0 2006.229.12:02:35.44#ibcon#about to read 6, iclass 12, count 0 2006.229.12:02:35.44#ibcon#read 6, iclass 12, count 0 2006.229.12:02:35.44#ibcon#end of sib2, iclass 12, count 0 2006.229.12:02:35.44#ibcon#*after write, iclass 12, count 0 2006.229.12:02:35.44#ibcon#*before return 0, iclass 12, count 0 2006.229.12:02:35.44#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:35.44#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:35.44#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:02:35.44#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:02:35.44$vck44/va=2,7 2006.229.12:02:35.44#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.12:02:35.44#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.12:02:35.44#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:35.44#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:35.50#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:35.50#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:35.50#ibcon#enter wrdev, iclass 14, count 2 2006.229.12:02:35.50#ibcon#first serial, iclass 14, count 2 2006.229.12:02:35.50#ibcon#enter sib2, iclass 14, count 2 2006.229.12:02:35.50#ibcon#flushed, iclass 14, count 2 2006.229.12:02:35.50#ibcon#about to write, iclass 14, count 2 2006.229.12:02:35.50#ibcon#wrote, iclass 14, count 2 2006.229.12:02:35.50#ibcon#about to read 3, iclass 14, count 2 2006.229.12:02:35.52#ibcon#read 3, iclass 14, count 2 2006.229.12:02:35.52#ibcon#about to read 4, iclass 14, count 2 2006.229.12:02:35.52#ibcon#read 4, iclass 14, count 2 2006.229.12:02:35.52#ibcon#about to read 5, iclass 14, count 2 2006.229.12:02:35.52#ibcon#read 5, iclass 14, count 2 2006.229.12:02:35.52#ibcon#about to read 6, iclass 14, count 2 2006.229.12:02:35.52#ibcon#read 6, iclass 14, count 2 2006.229.12:02:35.52#ibcon#end of sib2, iclass 14, count 2 2006.229.12:02:35.52#ibcon#*mode == 0, iclass 14, count 2 2006.229.12:02:35.52#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.12:02:35.52#ibcon#[25=AT02-07\r\n] 2006.229.12:02:35.52#ibcon#*before write, iclass 14, count 2 2006.229.12:02:35.52#ibcon#enter sib2, iclass 14, count 2 2006.229.12:02:35.52#ibcon#flushed, iclass 14, count 2 2006.229.12:02:35.52#ibcon#about to write, iclass 14, count 2 2006.229.12:02:35.52#ibcon#wrote, iclass 14, count 2 2006.229.12:02:35.52#ibcon#about to read 3, iclass 14, count 2 2006.229.12:02:35.55#ibcon#read 3, iclass 14, count 2 2006.229.12:02:35.55#ibcon#about to read 4, iclass 14, count 2 2006.229.12:02:35.55#ibcon#read 4, iclass 14, count 2 2006.229.12:02:35.55#ibcon#about to read 5, iclass 14, count 2 2006.229.12:02:35.55#ibcon#read 5, iclass 14, count 2 2006.229.12:02:35.55#ibcon#about to read 6, iclass 14, count 2 2006.229.12:02:35.55#ibcon#read 6, iclass 14, count 2 2006.229.12:02:35.55#ibcon#end of sib2, iclass 14, count 2 2006.229.12:02:35.55#ibcon#*after write, iclass 14, count 2 2006.229.12:02:35.55#ibcon#*before return 0, iclass 14, count 2 2006.229.12:02:35.55#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:35.55#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:35.55#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.12:02:35.55#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:35.55#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:35.67#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:35.67#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:35.67#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:02:35.67#ibcon#first serial, iclass 14, count 0 2006.229.12:02:35.67#ibcon#enter sib2, iclass 14, count 0 2006.229.12:02:35.67#ibcon#flushed, iclass 14, count 0 2006.229.12:02:35.67#ibcon#about to write, iclass 14, count 0 2006.229.12:02:35.67#ibcon#wrote, iclass 14, count 0 2006.229.12:02:35.67#ibcon#about to read 3, iclass 14, count 0 2006.229.12:02:35.69#ibcon#read 3, iclass 14, count 0 2006.229.12:02:35.69#ibcon#about to read 4, iclass 14, count 0 2006.229.12:02:35.69#ibcon#read 4, iclass 14, count 0 2006.229.12:02:35.69#ibcon#about to read 5, iclass 14, count 0 2006.229.12:02:35.69#ibcon#read 5, iclass 14, count 0 2006.229.12:02:35.69#ibcon#about to read 6, iclass 14, count 0 2006.229.12:02:35.69#ibcon#read 6, iclass 14, count 0 2006.229.12:02:35.69#ibcon#end of sib2, iclass 14, count 0 2006.229.12:02:35.69#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:02:35.69#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:02:35.69#ibcon#[25=USB\r\n] 2006.229.12:02:35.69#ibcon#*before write, iclass 14, count 0 2006.229.12:02:35.69#ibcon#enter sib2, iclass 14, count 0 2006.229.12:02:35.69#ibcon#flushed, iclass 14, count 0 2006.229.12:02:35.69#ibcon#about to write, iclass 14, count 0 2006.229.12:02:35.69#ibcon#wrote, iclass 14, count 0 2006.229.12:02:35.69#ibcon#about to read 3, iclass 14, count 0 2006.229.12:02:35.72#ibcon#read 3, iclass 14, count 0 2006.229.12:02:35.72#ibcon#about to read 4, iclass 14, count 0 2006.229.12:02:35.72#ibcon#read 4, iclass 14, count 0 2006.229.12:02:35.72#ibcon#about to read 5, iclass 14, count 0 2006.229.12:02:35.72#ibcon#read 5, iclass 14, count 0 2006.229.12:02:35.72#ibcon#about to read 6, iclass 14, count 0 2006.229.12:02:35.72#ibcon#read 6, iclass 14, count 0 2006.229.12:02:35.72#ibcon#end of sib2, iclass 14, count 0 2006.229.12:02:35.72#ibcon#*after write, iclass 14, count 0 2006.229.12:02:35.72#ibcon#*before return 0, iclass 14, count 0 2006.229.12:02:35.72#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:35.72#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:35.72#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:02:35.72#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:02:35.72$vck44/valo=3,564.99 2006.229.12:02:35.72#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.12:02:35.72#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.12:02:35.72#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:35.72#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:35.72#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:35.72#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:35.72#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:02:35.72#ibcon#first serial, iclass 16, count 0 2006.229.12:02:35.72#ibcon#enter sib2, iclass 16, count 0 2006.229.12:02:35.72#ibcon#flushed, iclass 16, count 0 2006.229.12:02:35.72#ibcon#about to write, iclass 16, count 0 2006.229.12:02:35.72#ibcon#wrote, iclass 16, count 0 2006.229.12:02:35.72#ibcon#about to read 3, iclass 16, count 0 2006.229.12:02:35.74#ibcon#read 3, iclass 16, count 0 2006.229.12:02:35.74#ibcon#about to read 4, iclass 16, count 0 2006.229.12:02:35.74#ibcon#read 4, iclass 16, count 0 2006.229.12:02:35.74#ibcon#about to read 5, iclass 16, count 0 2006.229.12:02:35.74#ibcon#read 5, iclass 16, count 0 2006.229.12:02:35.74#ibcon#about to read 6, iclass 16, count 0 2006.229.12:02:35.74#ibcon#read 6, iclass 16, count 0 2006.229.12:02:35.74#ibcon#end of sib2, iclass 16, count 0 2006.229.12:02:35.74#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:02:35.74#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:02:35.74#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:02:35.74#ibcon#*before write, iclass 16, count 0 2006.229.12:02:35.74#ibcon#enter sib2, iclass 16, count 0 2006.229.12:02:35.74#ibcon#flushed, iclass 16, count 0 2006.229.12:02:35.74#ibcon#about to write, iclass 16, count 0 2006.229.12:02:35.74#ibcon#wrote, iclass 16, count 0 2006.229.12:02:35.74#ibcon#about to read 3, iclass 16, count 0 2006.229.12:02:35.78#ibcon#read 3, iclass 16, count 0 2006.229.12:02:35.78#ibcon#about to read 4, iclass 16, count 0 2006.229.12:02:35.78#ibcon#read 4, iclass 16, count 0 2006.229.12:02:35.78#ibcon#about to read 5, iclass 16, count 0 2006.229.12:02:35.78#ibcon#read 5, iclass 16, count 0 2006.229.12:02:35.78#ibcon#about to read 6, iclass 16, count 0 2006.229.12:02:35.78#ibcon#read 6, iclass 16, count 0 2006.229.12:02:35.78#ibcon#end of sib2, iclass 16, count 0 2006.229.12:02:35.78#ibcon#*after write, iclass 16, count 0 2006.229.12:02:35.78#ibcon#*before return 0, iclass 16, count 0 2006.229.12:02:35.78#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:35.78#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:35.78#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:02:35.78#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:02:35.78$vck44/va=3,6 2006.229.12:02:35.78#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.12:02:35.78#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.12:02:35.78#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:35.78#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:35.84#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:35.84#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:35.84#ibcon#enter wrdev, iclass 18, count 2 2006.229.12:02:35.84#ibcon#first serial, iclass 18, count 2 2006.229.12:02:35.84#ibcon#enter sib2, iclass 18, count 2 2006.229.12:02:35.84#ibcon#flushed, iclass 18, count 2 2006.229.12:02:35.84#ibcon#about to write, iclass 18, count 2 2006.229.12:02:35.84#ibcon#wrote, iclass 18, count 2 2006.229.12:02:35.84#ibcon#about to read 3, iclass 18, count 2 2006.229.12:02:35.86#ibcon#read 3, iclass 18, count 2 2006.229.12:02:35.86#ibcon#about to read 4, iclass 18, count 2 2006.229.12:02:35.86#ibcon#read 4, iclass 18, count 2 2006.229.12:02:35.86#ibcon#about to read 5, iclass 18, count 2 2006.229.12:02:35.86#ibcon#read 5, iclass 18, count 2 2006.229.12:02:35.86#ibcon#about to read 6, iclass 18, count 2 2006.229.12:02:35.86#ibcon#read 6, iclass 18, count 2 2006.229.12:02:35.86#ibcon#end of sib2, iclass 18, count 2 2006.229.12:02:35.86#ibcon#*mode == 0, iclass 18, count 2 2006.229.12:02:35.86#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.12:02:35.86#ibcon#[25=AT03-06\r\n] 2006.229.12:02:35.86#ibcon#*before write, iclass 18, count 2 2006.229.12:02:35.86#ibcon#enter sib2, iclass 18, count 2 2006.229.12:02:35.86#ibcon#flushed, iclass 18, count 2 2006.229.12:02:35.86#ibcon#about to write, iclass 18, count 2 2006.229.12:02:35.86#ibcon#wrote, iclass 18, count 2 2006.229.12:02:35.86#ibcon#about to read 3, iclass 18, count 2 2006.229.12:02:35.89#ibcon#read 3, iclass 18, count 2 2006.229.12:02:35.89#ibcon#about to read 4, iclass 18, count 2 2006.229.12:02:35.89#ibcon#read 4, iclass 18, count 2 2006.229.12:02:35.89#ibcon#about to read 5, iclass 18, count 2 2006.229.12:02:35.89#ibcon#read 5, iclass 18, count 2 2006.229.12:02:35.89#ibcon#about to read 6, iclass 18, count 2 2006.229.12:02:35.89#ibcon#read 6, iclass 18, count 2 2006.229.12:02:35.89#ibcon#end of sib2, iclass 18, count 2 2006.229.12:02:35.89#ibcon#*after write, iclass 18, count 2 2006.229.12:02:35.89#ibcon#*before return 0, iclass 18, count 2 2006.229.12:02:35.89#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:35.89#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:35.89#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.12:02:35.89#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:35.89#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:36.01#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:36.01#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:36.01#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:02:36.01#ibcon#first serial, iclass 18, count 0 2006.229.12:02:36.01#ibcon#enter sib2, iclass 18, count 0 2006.229.12:02:36.01#ibcon#flushed, iclass 18, count 0 2006.229.12:02:36.01#ibcon#about to write, iclass 18, count 0 2006.229.12:02:36.01#ibcon#wrote, iclass 18, count 0 2006.229.12:02:36.01#ibcon#about to read 3, iclass 18, count 0 2006.229.12:02:36.03#ibcon#read 3, iclass 18, count 0 2006.229.12:02:36.03#ibcon#about to read 4, iclass 18, count 0 2006.229.12:02:36.03#ibcon#read 4, iclass 18, count 0 2006.229.12:02:36.03#ibcon#about to read 5, iclass 18, count 0 2006.229.12:02:36.03#ibcon#read 5, iclass 18, count 0 2006.229.12:02:36.03#ibcon#about to read 6, iclass 18, count 0 2006.229.12:02:36.03#ibcon#read 6, iclass 18, count 0 2006.229.12:02:36.03#ibcon#end of sib2, iclass 18, count 0 2006.229.12:02:36.03#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:02:36.03#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:02:36.03#ibcon#[25=USB\r\n] 2006.229.12:02:36.03#ibcon#*before write, iclass 18, count 0 2006.229.12:02:36.03#ibcon#enter sib2, iclass 18, count 0 2006.229.12:02:36.03#ibcon#flushed, iclass 18, count 0 2006.229.12:02:36.03#ibcon#about to write, iclass 18, count 0 2006.229.12:02:36.03#ibcon#wrote, iclass 18, count 0 2006.229.12:02:36.03#ibcon#about to read 3, iclass 18, count 0 2006.229.12:02:36.06#ibcon#read 3, iclass 18, count 0 2006.229.12:02:36.06#ibcon#about to read 4, iclass 18, count 0 2006.229.12:02:36.06#ibcon#read 4, iclass 18, count 0 2006.229.12:02:36.06#ibcon#about to read 5, iclass 18, count 0 2006.229.12:02:36.06#ibcon#read 5, iclass 18, count 0 2006.229.12:02:36.06#ibcon#about to read 6, iclass 18, count 0 2006.229.12:02:36.06#ibcon#read 6, iclass 18, count 0 2006.229.12:02:36.06#ibcon#end of sib2, iclass 18, count 0 2006.229.12:02:36.06#ibcon#*after write, iclass 18, count 0 2006.229.12:02:36.06#ibcon#*before return 0, iclass 18, count 0 2006.229.12:02:36.06#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:36.06#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:36.06#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:02:36.06#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:02:36.06$vck44/valo=4,624.99 2006.229.12:02:36.06#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.12:02:36.06#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.12:02:36.06#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:36.06#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:36.06#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:36.06#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:36.06#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:02:36.06#ibcon#first serial, iclass 20, count 0 2006.229.12:02:36.06#ibcon#enter sib2, iclass 20, count 0 2006.229.12:02:36.06#ibcon#flushed, iclass 20, count 0 2006.229.12:02:36.06#ibcon#about to write, iclass 20, count 0 2006.229.12:02:36.06#ibcon#wrote, iclass 20, count 0 2006.229.12:02:36.06#ibcon#about to read 3, iclass 20, count 0 2006.229.12:02:36.08#ibcon#read 3, iclass 20, count 0 2006.229.12:02:36.08#ibcon#about to read 4, iclass 20, count 0 2006.229.12:02:36.08#ibcon#read 4, iclass 20, count 0 2006.229.12:02:36.08#ibcon#about to read 5, iclass 20, count 0 2006.229.12:02:36.08#ibcon#read 5, iclass 20, count 0 2006.229.12:02:36.08#ibcon#about to read 6, iclass 20, count 0 2006.229.12:02:36.08#ibcon#read 6, iclass 20, count 0 2006.229.12:02:36.08#ibcon#end of sib2, iclass 20, count 0 2006.229.12:02:36.08#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:02:36.08#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:02:36.08#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:02:36.08#ibcon#*before write, iclass 20, count 0 2006.229.12:02:36.08#ibcon#enter sib2, iclass 20, count 0 2006.229.12:02:36.08#ibcon#flushed, iclass 20, count 0 2006.229.12:02:36.08#ibcon#about to write, iclass 20, count 0 2006.229.12:02:36.08#ibcon#wrote, iclass 20, count 0 2006.229.12:02:36.08#ibcon#about to read 3, iclass 20, count 0 2006.229.12:02:36.12#ibcon#read 3, iclass 20, count 0 2006.229.12:02:36.12#ibcon#about to read 4, iclass 20, count 0 2006.229.12:02:36.12#ibcon#read 4, iclass 20, count 0 2006.229.12:02:36.12#ibcon#about to read 5, iclass 20, count 0 2006.229.12:02:36.12#ibcon#read 5, iclass 20, count 0 2006.229.12:02:36.12#ibcon#about to read 6, iclass 20, count 0 2006.229.12:02:36.12#ibcon#read 6, iclass 20, count 0 2006.229.12:02:36.12#ibcon#end of sib2, iclass 20, count 0 2006.229.12:02:36.12#ibcon#*after write, iclass 20, count 0 2006.229.12:02:36.12#ibcon#*before return 0, iclass 20, count 0 2006.229.12:02:36.12#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:36.12#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:36.12#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:02:36.12#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:02:36.12$vck44/va=4,7 2006.229.12:02:36.12#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.12:02:36.12#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.12:02:36.12#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:36.12#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:36.18#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:36.18#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:36.18#ibcon#enter wrdev, iclass 22, count 2 2006.229.12:02:36.18#ibcon#first serial, iclass 22, count 2 2006.229.12:02:36.18#ibcon#enter sib2, iclass 22, count 2 2006.229.12:02:36.18#ibcon#flushed, iclass 22, count 2 2006.229.12:02:36.18#ibcon#about to write, iclass 22, count 2 2006.229.12:02:36.18#ibcon#wrote, iclass 22, count 2 2006.229.12:02:36.18#ibcon#about to read 3, iclass 22, count 2 2006.229.12:02:36.20#ibcon#read 3, iclass 22, count 2 2006.229.12:02:36.20#ibcon#about to read 4, iclass 22, count 2 2006.229.12:02:36.20#ibcon#read 4, iclass 22, count 2 2006.229.12:02:36.20#ibcon#about to read 5, iclass 22, count 2 2006.229.12:02:36.20#ibcon#read 5, iclass 22, count 2 2006.229.12:02:36.20#ibcon#about to read 6, iclass 22, count 2 2006.229.12:02:36.20#ibcon#read 6, iclass 22, count 2 2006.229.12:02:36.20#ibcon#end of sib2, iclass 22, count 2 2006.229.12:02:36.20#ibcon#*mode == 0, iclass 22, count 2 2006.229.12:02:36.20#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.12:02:36.20#ibcon#[25=AT04-07\r\n] 2006.229.12:02:36.20#ibcon#*before write, iclass 22, count 2 2006.229.12:02:36.20#ibcon#enter sib2, iclass 22, count 2 2006.229.12:02:36.20#ibcon#flushed, iclass 22, count 2 2006.229.12:02:36.20#ibcon#about to write, iclass 22, count 2 2006.229.12:02:36.20#ibcon#wrote, iclass 22, count 2 2006.229.12:02:36.20#ibcon#about to read 3, iclass 22, count 2 2006.229.12:02:36.23#ibcon#read 3, iclass 22, count 2 2006.229.12:02:36.23#ibcon#about to read 4, iclass 22, count 2 2006.229.12:02:36.23#ibcon#read 4, iclass 22, count 2 2006.229.12:02:36.23#ibcon#about to read 5, iclass 22, count 2 2006.229.12:02:36.23#ibcon#read 5, iclass 22, count 2 2006.229.12:02:36.23#ibcon#about to read 6, iclass 22, count 2 2006.229.12:02:36.23#ibcon#read 6, iclass 22, count 2 2006.229.12:02:36.23#ibcon#end of sib2, iclass 22, count 2 2006.229.12:02:36.23#ibcon#*after write, iclass 22, count 2 2006.229.12:02:36.23#ibcon#*before return 0, iclass 22, count 2 2006.229.12:02:36.23#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:36.23#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:36.23#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.12:02:36.23#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:36.23#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:36.35#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:36.35#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:36.35#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:02:36.35#ibcon#first serial, iclass 22, count 0 2006.229.12:02:36.35#ibcon#enter sib2, iclass 22, count 0 2006.229.12:02:36.35#ibcon#flushed, iclass 22, count 0 2006.229.12:02:36.35#ibcon#about to write, iclass 22, count 0 2006.229.12:02:36.35#ibcon#wrote, iclass 22, count 0 2006.229.12:02:36.35#ibcon#about to read 3, iclass 22, count 0 2006.229.12:02:36.37#ibcon#read 3, iclass 22, count 0 2006.229.12:02:36.37#ibcon#about to read 4, iclass 22, count 0 2006.229.12:02:36.37#ibcon#read 4, iclass 22, count 0 2006.229.12:02:36.37#ibcon#about to read 5, iclass 22, count 0 2006.229.12:02:36.37#ibcon#read 5, iclass 22, count 0 2006.229.12:02:36.37#ibcon#about to read 6, iclass 22, count 0 2006.229.12:02:36.37#ibcon#read 6, iclass 22, count 0 2006.229.12:02:36.37#ibcon#end of sib2, iclass 22, count 0 2006.229.12:02:36.37#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:02:36.37#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:02:36.37#ibcon#[25=USB\r\n] 2006.229.12:02:36.37#ibcon#*before write, iclass 22, count 0 2006.229.12:02:36.37#ibcon#enter sib2, iclass 22, count 0 2006.229.12:02:36.37#ibcon#flushed, iclass 22, count 0 2006.229.12:02:36.37#ibcon#about to write, iclass 22, count 0 2006.229.12:02:36.37#ibcon#wrote, iclass 22, count 0 2006.229.12:02:36.37#ibcon#about to read 3, iclass 22, count 0 2006.229.12:02:36.40#ibcon#read 3, iclass 22, count 0 2006.229.12:02:36.40#ibcon#about to read 4, iclass 22, count 0 2006.229.12:02:36.40#ibcon#read 4, iclass 22, count 0 2006.229.12:02:36.40#ibcon#about to read 5, iclass 22, count 0 2006.229.12:02:36.40#ibcon#read 5, iclass 22, count 0 2006.229.12:02:36.40#ibcon#about to read 6, iclass 22, count 0 2006.229.12:02:36.40#ibcon#read 6, iclass 22, count 0 2006.229.12:02:36.40#ibcon#end of sib2, iclass 22, count 0 2006.229.12:02:36.40#ibcon#*after write, iclass 22, count 0 2006.229.12:02:36.40#ibcon#*before return 0, iclass 22, count 0 2006.229.12:02:36.40#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:36.40#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:36.40#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:02:36.40#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:02:36.40$vck44/valo=5,734.99 2006.229.12:02:36.40#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:02:36.40#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:02:36.40#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:36.40#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:36.40#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:36.40#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:36.40#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:02:36.40#ibcon#first serial, iclass 24, count 0 2006.229.12:02:36.40#ibcon#enter sib2, iclass 24, count 0 2006.229.12:02:36.40#ibcon#flushed, iclass 24, count 0 2006.229.12:02:36.40#ibcon#about to write, iclass 24, count 0 2006.229.12:02:36.40#ibcon#wrote, iclass 24, count 0 2006.229.12:02:36.40#ibcon#about to read 3, iclass 24, count 0 2006.229.12:02:36.42#ibcon#read 3, iclass 24, count 0 2006.229.12:02:36.42#ibcon#about to read 4, iclass 24, count 0 2006.229.12:02:36.42#ibcon#read 4, iclass 24, count 0 2006.229.12:02:36.42#ibcon#about to read 5, iclass 24, count 0 2006.229.12:02:36.42#ibcon#read 5, iclass 24, count 0 2006.229.12:02:36.42#ibcon#about to read 6, iclass 24, count 0 2006.229.12:02:36.42#ibcon#read 6, iclass 24, count 0 2006.229.12:02:36.42#ibcon#end of sib2, iclass 24, count 0 2006.229.12:02:36.42#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:02:36.42#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:02:36.42#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:02:36.42#ibcon#*before write, iclass 24, count 0 2006.229.12:02:36.42#ibcon#enter sib2, iclass 24, count 0 2006.229.12:02:36.42#ibcon#flushed, iclass 24, count 0 2006.229.12:02:36.42#ibcon#about to write, iclass 24, count 0 2006.229.12:02:36.42#ibcon#wrote, iclass 24, count 0 2006.229.12:02:36.42#ibcon#about to read 3, iclass 24, count 0 2006.229.12:02:36.46#ibcon#read 3, iclass 24, count 0 2006.229.12:02:36.46#ibcon#about to read 4, iclass 24, count 0 2006.229.12:02:36.46#ibcon#read 4, iclass 24, count 0 2006.229.12:02:36.46#ibcon#about to read 5, iclass 24, count 0 2006.229.12:02:36.46#ibcon#read 5, iclass 24, count 0 2006.229.12:02:36.46#ibcon#about to read 6, iclass 24, count 0 2006.229.12:02:36.46#ibcon#read 6, iclass 24, count 0 2006.229.12:02:36.46#ibcon#end of sib2, iclass 24, count 0 2006.229.12:02:36.46#ibcon#*after write, iclass 24, count 0 2006.229.12:02:36.46#ibcon#*before return 0, iclass 24, count 0 2006.229.12:02:36.46#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:36.46#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:36.46#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:02:36.46#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:02:36.46$vck44/va=5,4 2006.229.12:02:36.46#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:02:36.46#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:02:36.46#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:36.46#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:36.52#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:36.52#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:36.52#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:02:36.52#ibcon#first serial, iclass 26, count 2 2006.229.12:02:36.52#ibcon#enter sib2, iclass 26, count 2 2006.229.12:02:36.52#ibcon#flushed, iclass 26, count 2 2006.229.12:02:36.52#ibcon#about to write, iclass 26, count 2 2006.229.12:02:36.52#ibcon#wrote, iclass 26, count 2 2006.229.12:02:36.52#ibcon#about to read 3, iclass 26, count 2 2006.229.12:02:36.54#ibcon#read 3, iclass 26, count 2 2006.229.12:02:36.54#ibcon#about to read 4, iclass 26, count 2 2006.229.12:02:36.54#ibcon#read 4, iclass 26, count 2 2006.229.12:02:36.54#ibcon#about to read 5, iclass 26, count 2 2006.229.12:02:36.54#ibcon#read 5, iclass 26, count 2 2006.229.12:02:36.54#ibcon#about to read 6, iclass 26, count 2 2006.229.12:02:36.54#ibcon#read 6, iclass 26, count 2 2006.229.12:02:36.54#ibcon#end of sib2, iclass 26, count 2 2006.229.12:02:36.54#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:02:36.54#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:02:36.54#ibcon#[25=AT05-04\r\n] 2006.229.12:02:36.54#ibcon#*before write, iclass 26, count 2 2006.229.12:02:36.54#ibcon#enter sib2, iclass 26, count 2 2006.229.12:02:36.54#ibcon#flushed, iclass 26, count 2 2006.229.12:02:36.54#ibcon#about to write, iclass 26, count 2 2006.229.12:02:36.54#ibcon#wrote, iclass 26, count 2 2006.229.12:02:36.54#ibcon#about to read 3, iclass 26, count 2 2006.229.12:02:36.57#ibcon#read 3, iclass 26, count 2 2006.229.12:02:36.57#ibcon#about to read 4, iclass 26, count 2 2006.229.12:02:36.57#ibcon#read 4, iclass 26, count 2 2006.229.12:02:36.57#ibcon#about to read 5, iclass 26, count 2 2006.229.12:02:36.57#ibcon#read 5, iclass 26, count 2 2006.229.12:02:36.57#ibcon#about to read 6, iclass 26, count 2 2006.229.12:02:36.57#ibcon#read 6, iclass 26, count 2 2006.229.12:02:36.57#ibcon#end of sib2, iclass 26, count 2 2006.229.12:02:36.57#ibcon#*after write, iclass 26, count 2 2006.229.12:02:36.57#ibcon#*before return 0, iclass 26, count 2 2006.229.12:02:36.57#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:36.57#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:36.57#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:02:36.57#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:36.57#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:36.69#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:36.69#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:36.69#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:02:36.69#ibcon#first serial, iclass 26, count 0 2006.229.12:02:36.69#ibcon#enter sib2, iclass 26, count 0 2006.229.12:02:36.69#ibcon#flushed, iclass 26, count 0 2006.229.12:02:36.69#ibcon#about to write, iclass 26, count 0 2006.229.12:02:36.69#ibcon#wrote, iclass 26, count 0 2006.229.12:02:36.69#ibcon#about to read 3, iclass 26, count 0 2006.229.12:02:36.71#ibcon#read 3, iclass 26, count 0 2006.229.12:02:36.71#ibcon#about to read 4, iclass 26, count 0 2006.229.12:02:36.71#ibcon#read 4, iclass 26, count 0 2006.229.12:02:36.71#ibcon#about to read 5, iclass 26, count 0 2006.229.12:02:36.71#ibcon#read 5, iclass 26, count 0 2006.229.12:02:36.71#ibcon#about to read 6, iclass 26, count 0 2006.229.12:02:36.71#ibcon#read 6, iclass 26, count 0 2006.229.12:02:36.71#ibcon#end of sib2, iclass 26, count 0 2006.229.12:02:36.71#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:02:36.71#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:02:36.71#ibcon#[25=USB\r\n] 2006.229.12:02:36.71#ibcon#*before write, iclass 26, count 0 2006.229.12:02:36.71#ibcon#enter sib2, iclass 26, count 0 2006.229.12:02:36.71#ibcon#flushed, iclass 26, count 0 2006.229.12:02:36.71#ibcon#about to write, iclass 26, count 0 2006.229.12:02:36.71#ibcon#wrote, iclass 26, count 0 2006.229.12:02:36.71#ibcon#about to read 3, iclass 26, count 0 2006.229.12:02:36.74#ibcon#read 3, iclass 26, count 0 2006.229.12:02:36.74#ibcon#about to read 4, iclass 26, count 0 2006.229.12:02:36.74#ibcon#read 4, iclass 26, count 0 2006.229.12:02:36.74#ibcon#about to read 5, iclass 26, count 0 2006.229.12:02:36.74#ibcon#read 5, iclass 26, count 0 2006.229.12:02:36.74#ibcon#about to read 6, iclass 26, count 0 2006.229.12:02:36.74#ibcon#read 6, iclass 26, count 0 2006.229.12:02:36.74#ibcon#end of sib2, iclass 26, count 0 2006.229.12:02:36.74#ibcon#*after write, iclass 26, count 0 2006.229.12:02:36.74#ibcon#*before return 0, iclass 26, count 0 2006.229.12:02:36.74#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:36.74#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:36.74#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:02:36.74#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:02:36.74$vck44/valo=6,814.99 2006.229.12:02:36.74#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.12:02:36.74#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.12:02:36.74#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:36.74#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:36.74#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:36.74#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:36.74#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:02:36.74#ibcon#first serial, iclass 28, count 0 2006.229.12:02:36.74#ibcon#enter sib2, iclass 28, count 0 2006.229.12:02:36.74#ibcon#flushed, iclass 28, count 0 2006.229.12:02:36.74#ibcon#about to write, iclass 28, count 0 2006.229.12:02:36.74#ibcon#wrote, iclass 28, count 0 2006.229.12:02:36.74#ibcon#about to read 3, iclass 28, count 0 2006.229.12:02:36.76#ibcon#read 3, iclass 28, count 0 2006.229.12:02:36.76#ibcon#about to read 4, iclass 28, count 0 2006.229.12:02:36.76#ibcon#read 4, iclass 28, count 0 2006.229.12:02:36.76#ibcon#about to read 5, iclass 28, count 0 2006.229.12:02:36.76#ibcon#read 5, iclass 28, count 0 2006.229.12:02:36.76#ibcon#about to read 6, iclass 28, count 0 2006.229.12:02:36.76#ibcon#read 6, iclass 28, count 0 2006.229.12:02:36.76#ibcon#end of sib2, iclass 28, count 0 2006.229.12:02:36.76#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:02:36.76#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:02:36.76#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:02:36.76#ibcon#*before write, iclass 28, count 0 2006.229.12:02:36.76#ibcon#enter sib2, iclass 28, count 0 2006.229.12:02:36.76#ibcon#flushed, iclass 28, count 0 2006.229.12:02:36.76#ibcon#about to write, iclass 28, count 0 2006.229.12:02:36.76#ibcon#wrote, iclass 28, count 0 2006.229.12:02:36.76#ibcon#about to read 3, iclass 28, count 0 2006.229.12:02:36.80#ibcon#read 3, iclass 28, count 0 2006.229.12:02:36.80#ibcon#about to read 4, iclass 28, count 0 2006.229.12:02:36.80#ibcon#read 4, iclass 28, count 0 2006.229.12:02:36.80#ibcon#about to read 5, iclass 28, count 0 2006.229.12:02:36.80#ibcon#read 5, iclass 28, count 0 2006.229.12:02:36.80#ibcon#about to read 6, iclass 28, count 0 2006.229.12:02:36.80#ibcon#read 6, iclass 28, count 0 2006.229.12:02:36.80#ibcon#end of sib2, iclass 28, count 0 2006.229.12:02:36.80#ibcon#*after write, iclass 28, count 0 2006.229.12:02:36.80#ibcon#*before return 0, iclass 28, count 0 2006.229.12:02:36.80#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:36.80#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:36.80#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:02:36.80#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:02:36.80$vck44/va=6,4 2006.229.12:02:36.80#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.12:02:36.80#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.12:02:36.80#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:36.80#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:36.86#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:36.86#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:36.86#ibcon#enter wrdev, iclass 30, count 2 2006.229.12:02:36.86#ibcon#first serial, iclass 30, count 2 2006.229.12:02:36.86#ibcon#enter sib2, iclass 30, count 2 2006.229.12:02:36.86#ibcon#flushed, iclass 30, count 2 2006.229.12:02:36.86#ibcon#about to write, iclass 30, count 2 2006.229.12:02:36.86#ibcon#wrote, iclass 30, count 2 2006.229.12:02:36.86#ibcon#about to read 3, iclass 30, count 2 2006.229.12:02:36.88#ibcon#read 3, iclass 30, count 2 2006.229.12:02:36.88#ibcon#about to read 4, iclass 30, count 2 2006.229.12:02:36.88#ibcon#read 4, iclass 30, count 2 2006.229.12:02:36.88#ibcon#about to read 5, iclass 30, count 2 2006.229.12:02:36.88#ibcon#read 5, iclass 30, count 2 2006.229.12:02:36.88#ibcon#about to read 6, iclass 30, count 2 2006.229.12:02:36.88#ibcon#read 6, iclass 30, count 2 2006.229.12:02:36.88#ibcon#end of sib2, iclass 30, count 2 2006.229.12:02:36.88#ibcon#*mode == 0, iclass 30, count 2 2006.229.12:02:36.88#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.12:02:36.88#ibcon#[25=AT06-04\r\n] 2006.229.12:02:36.88#ibcon#*before write, iclass 30, count 2 2006.229.12:02:36.88#ibcon#enter sib2, iclass 30, count 2 2006.229.12:02:36.88#ibcon#flushed, iclass 30, count 2 2006.229.12:02:36.88#ibcon#about to write, iclass 30, count 2 2006.229.12:02:36.88#ibcon#wrote, iclass 30, count 2 2006.229.12:02:36.88#ibcon#about to read 3, iclass 30, count 2 2006.229.12:02:36.91#ibcon#read 3, iclass 30, count 2 2006.229.12:02:36.91#ibcon#about to read 4, iclass 30, count 2 2006.229.12:02:36.91#ibcon#read 4, iclass 30, count 2 2006.229.12:02:36.91#ibcon#about to read 5, iclass 30, count 2 2006.229.12:02:36.91#ibcon#read 5, iclass 30, count 2 2006.229.12:02:36.91#ibcon#about to read 6, iclass 30, count 2 2006.229.12:02:36.91#ibcon#read 6, iclass 30, count 2 2006.229.12:02:36.91#ibcon#end of sib2, iclass 30, count 2 2006.229.12:02:36.91#ibcon#*after write, iclass 30, count 2 2006.229.12:02:36.91#ibcon#*before return 0, iclass 30, count 2 2006.229.12:02:36.91#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:36.91#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:36.91#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.12:02:36.91#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:36.91#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:37.03#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:37.03#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:37.03#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:02:37.03#ibcon#first serial, iclass 30, count 0 2006.229.12:02:37.03#ibcon#enter sib2, iclass 30, count 0 2006.229.12:02:37.03#ibcon#flushed, iclass 30, count 0 2006.229.12:02:37.03#ibcon#about to write, iclass 30, count 0 2006.229.12:02:37.03#ibcon#wrote, iclass 30, count 0 2006.229.12:02:37.03#ibcon#about to read 3, iclass 30, count 0 2006.229.12:02:37.05#ibcon#read 3, iclass 30, count 0 2006.229.12:02:37.05#ibcon#about to read 4, iclass 30, count 0 2006.229.12:02:37.05#ibcon#read 4, iclass 30, count 0 2006.229.12:02:37.05#ibcon#about to read 5, iclass 30, count 0 2006.229.12:02:37.05#ibcon#read 5, iclass 30, count 0 2006.229.12:02:37.05#ibcon#about to read 6, iclass 30, count 0 2006.229.12:02:37.05#ibcon#read 6, iclass 30, count 0 2006.229.12:02:37.05#ibcon#end of sib2, iclass 30, count 0 2006.229.12:02:37.05#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:02:37.05#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:02:37.05#ibcon#[25=USB\r\n] 2006.229.12:02:37.05#ibcon#*before write, iclass 30, count 0 2006.229.12:02:37.05#ibcon#enter sib2, iclass 30, count 0 2006.229.12:02:37.05#ibcon#flushed, iclass 30, count 0 2006.229.12:02:37.05#ibcon#about to write, iclass 30, count 0 2006.229.12:02:37.05#ibcon#wrote, iclass 30, count 0 2006.229.12:02:37.05#ibcon#about to read 3, iclass 30, count 0 2006.229.12:02:37.08#ibcon#read 3, iclass 30, count 0 2006.229.12:02:37.08#ibcon#about to read 4, iclass 30, count 0 2006.229.12:02:37.08#ibcon#read 4, iclass 30, count 0 2006.229.12:02:37.08#ibcon#about to read 5, iclass 30, count 0 2006.229.12:02:37.08#ibcon#read 5, iclass 30, count 0 2006.229.12:02:37.08#ibcon#about to read 6, iclass 30, count 0 2006.229.12:02:37.08#ibcon#read 6, iclass 30, count 0 2006.229.12:02:37.08#ibcon#end of sib2, iclass 30, count 0 2006.229.12:02:37.08#ibcon#*after write, iclass 30, count 0 2006.229.12:02:37.08#ibcon#*before return 0, iclass 30, count 0 2006.229.12:02:37.08#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:37.08#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:37.08#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:02:37.08#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:02:37.08$vck44/valo=7,864.99 2006.229.12:02:37.08#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.12:02:37.08#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.12:02:37.08#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:37.08#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:37.08#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:37.08#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:37.08#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:02:37.08#ibcon#first serial, iclass 32, count 0 2006.229.12:02:37.08#ibcon#enter sib2, iclass 32, count 0 2006.229.12:02:37.08#ibcon#flushed, iclass 32, count 0 2006.229.12:02:37.08#ibcon#about to write, iclass 32, count 0 2006.229.12:02:37.08#ibcon#wrote, iclass 32, count 0 2006.229.12:02:37.08#ibcon#about to read 3, iclass 32, count 0 2006.229.12:02:37.10#ibcon#read 3, iclass 32, count 0 2006.229.12:02:37.10#ibcon#about to read 4, iclass 32, count 0 2006.229.12:02:37.10#ibcon#read 4, iclass 32, count 0 2006.229.12:02:37.10#ibcon#about to read 5, iclass 32, count 0 2006.229.12:02:37.10#ibcon#read 5, iclass 32, count 0 2006.229.12:02:37.10#ibcon#about to read 6, iclass 32, count 0 2006.229.12:02:37.10#ibcon#read 6, iclass 32, count 0 2006.229.12:02:37.10#ibcon#end of sib2, iclass 32, count 0 2006.229.12:02:37.10#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:02:37.10#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:02:37.10#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:02:37.10#ibcon#*before write, iclass 32, count 0 2006.229.12:02:37.10#ibcon#enter sib2, iclass 32, count 0 2006.229.12:02:37.10#ibcon#flushed, iclass 32, count 0 2006.229.12:02:37.10#ibcon#about to write, iclass 32, count 0 2006.229.12:02:37.10#ibcon#wrote, iclass 32, count 0 2006.229.12:02:37.10#ibcon#about to read 3, iclass 32, count 0 2006.229.12:02:37.14#ibcon#read 3, iclass 32, count 0 2006.229.12:02:37.14#ibcon#about to read 4, iclass 32, count 0 2006.229.12:02:37.14#ibcon#read 4, iclass 32, count 0 2006.229.12:02:37.14#ibcon#about to read 5, iclass 32, count 0 2006.229.12:02:37.14#ibcon#read 5, iclass 32, count 0 2006.229.12:02:37.14#ibcon#about to read 6, iclass 32, count 0 2006.229.12:02:37.14#ibcon#read 6, iclass 32, count 0 2006.229.12:02:37.14#ibcon#end of sib2, iclass 32, count 0 2006.229.12:02:37.14#ibcon#*after write, iclass 32, count 0 2006.229.12:02:37.14#ibcon#*before return 0, iclass 32, count 0 2006.229.12:02:37.14#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:37.14#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:37.14#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:02:37.14#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:02:37.14$vck44/va=7,5 2006.229.12:02:37.14#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.12:02:37.14#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.12:02:37.14#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:37.14#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:37.20#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:37.20#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:37.20#ibcon#enter wrdev, iclass 34, count 2 2006.229.12:02:37.20#ibcon#first serial, iclass 34, count 2 2006.229.12:02:37.20#ibcon#enter sib2, iclass 34, count 2 2006.229.12:02:37.20#ibcon#flushed, iclass 34, count 2 2006.229.12:02:37.20#ibcon#about to write, iclass 34, count 2 2006.229.12:02:37.20#ibcon#wrote, iclass 34, count 2 2006.229.12:02:37.20#ibcon#about to read 3, iclass 34, count 2 2006.229.12:02:37.22#ibcon#read 3, iclass 34, count 2 2006.229.12:02:37.22#ibcon#about to read 4, iclass 34, count 2 2006.229.12:02:37.22#ibcon#read 4, iclass 34, count 2 2006.229.12:02:37.22#ibcon#about to read 5, iclass 34, count 2 2006.229.12:02:37.22#ibcon#read 5, iclass 34, count 2 2006.229.12:02:37.22#ibcon#about to read 6, iclass 34, count 2 2006.229.12:02:37.22#ibcon#read 6, iclass 34, count 2 2006.229.12:02:37.22#ibcon#end of sib2, iclass 34, count 2 2006.229.12:02:37.22#ibcon#*mode == 0, iclass 34, count 2 2006.229.12:02:37.22#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.12:02:37.22#ibcon#[25=AT07-05\r\n] 2006.229.12:02:37.22#ibcon#*before write, iclass 34, count 2 2006.229.12:02:37.22#ibcon#enter sib2, iclass 34, count 2 2006.229.12:02:37.22#ibcon#flushed, iclass 34, count 2 2006.229.12:02:37.22#ibcon#about to write, iclass 34, count 2 2006.229.12:02:37.22#ibcon#wrote, iclass 34, count 2 2006.229.12:02:37.22#ibcon#about to read 3, iclass 34, count 2 2006.229.12:02:37.25#ibcon#read 3, iclass 34, count 2 2006.229.12:02:37.25#ibcon#about to read 4, iclass 34, count 2 2006.229.12:02:37.25#ibcon#read 4, iclass 34, count 2 2006.229.12:02:37.25#ibcon#about to read 5, iclass 34, count 2 2006.229.12:02:37.25#ibcon#read 5, iclass 34, count 2 2006.229.12:02:37.25#ibcon#about to read 6, iclass 34, count 2 2006.229.12:02:37.25#ibcon#read 6, iclass 34, count 2 2006.229.12:02:37.25#ibcon#end of sib2, iclass 34, count 2 2006.229.12:02:37.25#ibcon#*after write, iclass 34, count 2 2006.229.12:02:37.25#ibcon#*before return 0, iclass 34, count 2 2006.229.12:02:37.25#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:37.25#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:37.25#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.12:02:37.25#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:37.25#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:37.37#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:37.37#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:37.37#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:02:37.37#ibcon#first serial, iclass 34, count 0 2006.229.12:02:37.37#ibcon#enter sib2, iclass 34, count 0 2006.229.12:02:37.37#ibcon#flushed, iclass 34, count 0 2006.229.12:02:37.37#ibcon#about to write, iclass 34, count 0 2006.229.12:02:37.37#ibcon#wrote, iclass 34, count 0 2006.229.12:02:37.37#ibcon#about to read 3, iclass 34, count 0 2006.229.12:02:37.39#ibcon#read 3, iclass 34, count 0 2006.229.12:02:37.39#ibcon#about to read 4, iclass 34, count 0 2006.229.12:02:37.39#ibcon#read 4, iclass 34, count 0 2006.229.12:02:37.39#ibcon#about to read 5, iclass 34, count 0 2006.229.12:02:37.39#ibcon#read 5, iclass 34, count 0 2006.229.12:02:37.39#ibcon#about to read 6, iclass 34, count 0 2006.229.12:02:37.39#ibcon#read 6, iclass 34, count 0 2006.229.12:02:37.39#ibcon#end of sib2, iclass 34, count 0 2006.229.12:02:37.39#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:02:37.39#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:02:37.39#ibcon#[25=USB\r\n] 2006.229.12:02:37.39#ibcon#*before write, iclass 34, count 0 2006.229.12:02:37.39#ibcon#enter sib2, iclass 34, count 0 2006.229.12:02:37.39#ibcon#flushed, iclass 34, count 0 2006.229.12:02:37.39#ibcon#about to write, iclass 34, count 0 2006.229.12:02:37.39#ibcon#wrote, iclass 34, count 0 2006.229.12:02:37.39#ibcon#about to read 3, iclass 34, count 0 2006.229.12:02:37.42#ibcon#read 3, iclass 34, count 0 2006.229.12:02:37.42#ibcon#about to read 4, iclass 34, count 0 2006.229.12:02:37.42#ibcon#read 4, iclass 34, count 0 2006.229.12:02:37.42#ibcon#about to read 5, iclass 34, count 0 2006.229.12:02:37.42#ibcon#read 5, iclass 34, count 0 2006.229.12:02:37.42#ibcon#about to read 6, iclass 34, count 0 2006.229.12:02:37.42#ibcon#read 6, iclass 34, count 0 2006.229.12:02:37.42#ibcon#end of sib2, iclass 34, count 0 2006.229.12:02:37.42#ibcon#*after write, iclass 34, count 0 2006.229.12:02:37.42#ibcon#*before return 0, iclass 34, count 0 2006.229.12:02:37.42#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:37.42#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:37.42#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:02:37.42#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:02:37.42$vck44/valo=8,884.99 2006.229.12:02:37.42#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:02:37.42#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:02:37.42#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:37.42#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:37.42#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:37.42#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:37.42#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:02:37.42#ibcon#first serial, iclass 36, count 0 2006.229.12:02:37.42#ibcon#enter sib2, iclass 36, count 0 2006.229.12:02:37.42#ibcon#flushed, iclass 36, count 0 2006.229.12:02:37.42#ibcon#about to write, iclass 36, count 0 2006.229.12:02:37.42#ibcon#wrote, iclass 36, count 0 2006.229.12:02:37.42#ibcon#about to read 3, iclass 36, count 0 2006.229.12:02:37.44#ibcon#read 3, iclass 36, count 0 2006.229.12:02:37.44#ibcon#about to read 4, iclass 36, count 0 2006.229.12:02:37.44#ibcon#read 4, iclass 36, count 0 2006.229.12:02:37.44#ibcon#about to read 5, iclass 36, count 0 2006.229.12:02:37.44#ibcon#read 5, iclass 36, count 0 2006.229.12:02:37.44#ibcon#about to read 6, iclass 36, count 0 2006.229.12:02:37.44#ibcon#read 6, iclass 36, count 0 2006.229.12:02:37.44#ibcon#end of sib2, iclass 36, count 0 2006.229.12:02:37.44#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:02:37.44#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:02:37.44#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:02:37.44#ibcon#*before write, iclass 36, count 0 2006.229.12:02:37.44#ibcon#enter sib2, iclass 36, count 0 2006.229.12:02:37.44#ibcon#flushed, iclass 36, count 0 2006.229.12:02:37.44#ibcon#about to write, iclass 36, count 0 2006.229.12:02:37.44#ibcon#wrote, iclass 36, count 0 2006.229.12:02:37.44#ibcon#about to read 3, iclass 36, count 0 2006.229.12:02:37.48#ibcon#read 3, iclass 36, count 0 2006.229.12:02:37.48#ibcon#about to read 4, iclass 36, count 0 2006.229.12:02:37.48#ibcon#read 4, iclass 36, count 0 2006.229.12:02:37.48#ibcon#about to read 5, iclass 36, count 0 2006.229.12:02:37.48#ibcon#read 5, iclass 36, count 0 2006.229.12:02:37.48#ibcon#about to read 6, iclass 36, count 0 2006.229.12:02:37.48#ibcon#read 6, iclass 36, count 0 2006.229.12:02:37.48#ibcon#end of sib2, iclass 36, count 0 2006.229.12:02:37.48#ibcon#*after write, iclass 36, count 0 2006.229.12:02:37.48#ibcon#*before return 0, iclass 36, count 0 2006.229.12:02:37.48#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:37.48#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:37.48#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:02:37.48#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:02:37.48$vck44/va=8,6 2006.229.12:02:37.48#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.12:02:37.48#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.12:02:37.48#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:37.48#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:02:37.54#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:02:37.54#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:02:37.54#ibcon#enter wrdev, iclass 38, count 2 2006.229.12:02:37.54#ibcon#first serial, iclass 38, count 2 2006.229.12:02:37.54#ibcon#enter sib2, iclass 38, count 2 2006.229.12:02:37.54#ibcon#flushed, iclass 38, count 2 2006.229.12:02:37.54#ibcon#about to write, iclass 38, count 2 2006.229.12:02:37.54#ibcon#wrote, iclass 38, count 2 2006.229.12:02:37.54#ibcon#about to read 3, iclass 38, count 2 2006.229.12:02:37.56#ibcon#read 3, iclass 38, count 2 2006.229.12:02:37.56#ibcon#about to read 4, iclass 38, count 2 2006.229.12:02:37.56#ibcon#read 4, iclass 38, count 2 2006.229.12:02:37.56#ibcon#about to read 5, iclass 38, count 2 2006.229.12:02:37.56#ibcon#read 5, iclass 38, count 2 2006.229.12:02:37.56#ibcon#about to read 6, iclass 38, count 2 2006.229.12:02:37.56#ibcon#read 6, iclass 38, count 2 2006.229.12:02:37.56#ibcon#end of sib2, iclass 38, count 2 2006.229.12:02:37.56#ibcon#*mode == 0, iclass 38, count 2 2006.229.12:02:37.56#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.12:02:37.56#ibcon#[25=AT08-06\r\n] 2006.229.12:02:37.56#ibcon#*before write, iclass 38, count 2 2006.229.12:02:37.56#ibcon#enter sib2, iclass 38, count 2 2006.229.12:02:37.56#ibcon#flushed, iclass 38, count 2 2006.229.12:02:37.56#ibcon#about to write, iclass 38, count 2 2006.229.12:02:37.56#ibcon#wrote, iclass 38, count 2 2006.229.12:02:37.56#ibcon#about to read 3, iclass 38, count 2 2006.229.12:02:37.59#ibcon#read 3, iclass 38, count 2 2006.229.12:02:37.59#ibcon#about to read 4, iclass 38, count 2 2006.229.12:02:37.59#ibcon#read 4, iclass 38, count 2 2006.229.12:02:37.59#ibcon#about to read 5, iclass 38, count 2 2006.229.12:02:37.59#ibcon#read 5, iclass 38, count 2 2006.229.12:02:37.59#ibcon#about to read 6, iclass 38, count 2 2006.229.12:02:37.59#ibcon#read 6, iclass 38, count 2 2006.229.12:02:37.59#ibcon#end of sib2, iclass 38, count 2 2006.229.12:02:37.59#ibcon#*after write, iclass 38, count 2 2006.229.12:02:37.59#ibcon#*before return 0, iclass 38, count 2 2006.229.12:02:37.59#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:02:37.59#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:02:37.59#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.12:02:37.59#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:37.59#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:02:37.71#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:02:37.71#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:02:37.71#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:02:37.71#ibcon#first serial, iclass 38, count 0 2006.229.12:02:37.71#ibcon#enter sib2, iclass 38, count 0 2006.229.12:02:37.71#ibcon#flushed, iclass 38, count 0 2006.229.12:02:37.71#ibcon#about to write, iclass 38, count 0 2006.229.12:02:37.71#ibcon#wrote, iclass 38, count 0 2006.229.12:02:37.71#ibcon#about to read 3, iclass 38, count 0 2006.229.12:02:37.73#ibcon#read 3, iclass 38, count 0 2006.229.12:02:37.73#ibcon#about to read 4, iclass 38, count 0 2006.229.12:02:37.73#ibcon#read 4, iclass 38, count 0 2006.229.12:02:37.73#ibcon#about to read 5, iclass 38, count 0 2006.229.12:02:37.73#ibcon#read 5, iclass 38, count 0 2006.229.12:02:37.73#ibcon#about to read 6, iclass 38, count 0 2006.229.12:02:37.73#ibcon#read 6, iclass 38, count 0 2006.229.12:02:37.73#ibcon#end of sib2, iclass 38, count 0 2006.229.12:02:37.73#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:02:37.73#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:02:37.73#ibcon#[25=USB\r\n] 2006.229.12:02:37.73#ibcon#*before write, iclass 38, count 0 2006.229.12:02:37.73#ibcon#enter sib2, iclass 38, count 0 2006.229.12:02:37.73#ibcon#flushed, iclass 38, count 0 2006.229.12:02:37.73#ibcon#about to write, iclass 38, count 0 2006.229.12:02:37.73#ibcon#wrote, iclass 38, count 0 2006.229.12:02:37.73#ibcon#about to read 3, iclass 38, count 0 2006.229.12:02:37.76#ibcon#read 3, iclass 38, count 0 2006.229.12:02:37.76#ibcon#about to read 4, iclass 38, count 0 2006.229.12:02:37.76#ibcon#read 4, iclass 38, count 0 2006.229.12:02:37.76#ibcon#about to read 5, iclass 38, count 0 2006.229.12:02:37.76#ibcon#read 5, iclass 38, count 0 2006.229.12:02:37.76#ibcon#about to read 6, iclass 38, count 0 2006.229.12:02:37.76#ibcon#read 6, iclass 38, count 0 2006.229.12:02:37.76#ibcon#end of sib2, iclass 38, count 0 2006.229.12:02:37.76#ibcon#*after write, iclass 38, count 0 2006.229.12:02:37.76#ibcon#*before return 0, iclass 38, count 0 2006.229.12:02:37.76#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:02:37.76#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:02:37.76#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:02:37.76#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:02:37.76$vck44/vblo=1,629.99 2006.229.12:02:37.76#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.12:02:37.76#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.12:02:37.76#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:37.76#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:02:37.76#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:02:37.76#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:02:37.76#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:02:37.76#ibcon#first serial, iclass 40, count 0 2006.229.12:02:37.76#ibcon#enter sib2, iclass 40, count 0 2006.229.12:02:37.76#ibcon#flushed, iclass 40, count 0 2006.229.12:02:37.76#ibcon#about to write, iclass 40, count 0 2006.229.12:02:37.76#ibcon#wrote, iclass 40, count 0 2006.229.12:02:37.76#ibcon#about to read 3, iclass 40, count 0 2006.229.12:02:37.78#ibcon#read 3, iclass 40, count 0 2006.229.12:02:37.78#ibcon#about to read 4, iclass 40, count 0 2006.229.12:02:37.78#ibcon#read 4, iclass 40, count 0 2006.229.12:02:37.78#ibcon#about to read 5, iclass 40, count 0 2006.229.12:02:37.78#ibcon#read 5, iclass 40, count 0 2006.229.12:02:37.78#ibcon#about to read 6, iclass 40, count 0 2006.229.12:02:37.78#ibcon#read 6, iclass 40, count 0 2006.229.12:02:37.78#ibcon#end of sib2, iclass 40, count 0 2006.229.12:02:37.78#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:02:37.78#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:02:37.78#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:02:37.78#ibcon#*before write, iclass 40, count 0 2006.229.12:02:37.78#ibcon#enter sib2, iclass 40, count 0 2006.229.12:02:37.78#ibcon#flushed, iclass 40, count 0 2006.229.12:02:37.78#ibcon#about to write, iclass 40, count 0 2006.229.12:02:37.78#ibcon#wrote, iclass 40, count 0 2006.229.12:02:37.78#ibcon#about to read 3, iclass 40, count 0 2006.229.12:02:37.82#ibcon#read 3, iclass 40, count 0 2006.229.12:02:37.82#ibcon#about to read 4, iclass 40, count 0 2006.229.12:02:37.82#ibcon#read 4, iclass 40, count 0 2006.229.12:02:37.82#ibcon#about to read 5, iclass 40, count 0 2006.229.12:02:37.82#ibcon#read 5, iclass 40, count 0 2006.229.12:02:37.82#ibcon#about to read 6, iclass 40, count 0 2006.229.12:02:37.82#ibcon#read 6, iclass 40, count 0 2006.229.12:02:37.82#ibcon#end of sib2, iclass 40, count 0 2006.229.12:02:37.82#ibcon#*after write, iclass 40, count 0 2006.229.12:02:37.82#ibcon#*before return 0, iclass 40, count 0 2006.229.12:02:37.82#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:02:37.82#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:02:37.82#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:02:37.82#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:02:37.82$vck44/vb=1,4 2006.229.12:02:37.82#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.12:02:37.82#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.12:02:37.82#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:37.82#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:02:37.82#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:02:37.82#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:02:37.82#ibcon#enter wrdev, iclass 4, count 2 2006.229.12:02:37.82#ibcon#first serial, iclass 4, count 2 2006.229.12:02:37.82#ibcon#enter sib2, iclass 4, count 2 2006.229.12:02:37.82#ibcon#flushed, iclass 4, count 2 2006.229.12:02:37.82#ibcon#about to write, iclass 4, count 2 2006.229.12:02:37.82#ibcon#wrote, iclass 4, count 2 2006.229.12:02:37.82#ibcon#about to read 3, iclass 4, count 2 2006.229.12:02:37.84#ibcon#read 3, iclass 4, count 2 2006.229.12:02:37.84#ibcon#about to read 4, iclass 4, count 2 2006.229.12:02:37.84#ibcon#read 4, iclass 4, count 2 2006.229.12:02:37.84#ibcon#about to read 5, iclass 4, count 2 2006.229.12:02:37.84#ibcon#read 5, iclass 4, count 2 2006.229.12:02:37.84#ibcon#about to read 6, iclass 4, count 2 2006.229.12:02:37.84#ibcon#read 6, iclass 4, count 2 2006.229.12:02:37.84#ibcon#end of sib2, iclass 4, count 2 2006.229.12:02:37.84#ibcon#*mode == 0, iclass 4, count 2 2006.229.12:02:37.84#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.12:02:37.84#ibcon#[27=AT01-04\r\n] 2006.229.12:02:37.84#ibcon#*before write, iclass 4, count 2 2006.229.12:02:37.84#ibcon#enter sib2, iclass 4, count 2 2006.229.12:02:37.84#ibcon#flushed, iclass 4, count 2 2006.229.12:02:37.84#ibcon#about to write, iclass 4, count 2 2006.229.12:02:37.84#ibcon#wrote, iclass 4, count 2 2006.229.12:02:37.84#ibcon#about to read 3, iclass 4, count 2 2006.229.12:02:37.87#ibcon#read 3, iclass 4, count 2 2006.229.12:02:37.87#ibcon#about to read 4, iclass 4, count 2 2006.229.12:02:37.87#ibcon#read 4, iclass 4, count 2 2006.229.12:02:37.87#ibcon#about to read 5, iclass 4, count 2 2006.229.12:02:37.87#ibcon#read 5, iclass 4, count 2 2006.229.12:02:37.87#ibcon#about to read 6, iclass 4, count 2 2006.229.12:02:37.87#ibcon#read 6, iclass 4, count 2 2006.229.12:02:37.87#ibcon#end of sib2, iclass 4, count 2 2006.229.12:02:37.87#ibcon#*after write, iclass 4, count 2 2006.229.12:02:37.87#ibcon#*before return 0, iclass 4, count 2 2006.229.12:02:37.87#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:02:37.87#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:02:37.87#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.12:02:37.87#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:37.87#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:02:37.99#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:02:37.99#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:02:37.99#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:02:37.99#ibcon#first serial, iclass 4, count 0 2006.229.12:02:37.99#ibcon#enter sib2, iclass 4, count 0 2006.229.12:02:37.99#ibcon#flushed, iclass 4, count 0 2006.229.12:02:37.99#ibcon#about to write, iclass 4, count 0 2006.229.12:02:37.99#ibcon#wrote, iclass 4, count 0 2006.229.12:02:37.99#ibcon#about to read 3, iclass 4, count 0 2006.229.12:02:38.01#ibcon#read 3, iclass 4, count 0 2006.229.12:02:38.01#ibcon#about to read 4, iclass 4, count 0 2006.229.12:02:38.01#ibcon#read 4, iclass 4, count 0 2006.229.12:02:38.01#ibcon#about to read 5, iclass 4, count 0 2006.229.12:02:38.01#ibcon#read 5, iclass 4, count 0 2006.229.12:02:38.01#ibcon#about to read 6, iclass 4, count 0 2006.229.12:02:38.01#ibcon#read 6, iclass 4, count 0 2006.229.12:02:38.01#ibcon#end of sib2, iclass 4, count 0 2006.229.12:02:38.01#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:02:38.01#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:02:38.01#ibcon#[27=USB\r\n] 2006.229.12:02:38.01#ibcon#*before write, iclass 4, count 0 2006.229.12:02:38.01#ibcon#enter sib2, iclass 4, count 0 2006.229.12:02:38.01#ibcon#flushed, iclass 4, count 0 2006.229.12:02:38.01#ibcon#about to write, iclass 4, count 0 2006.229.12:02:38.01#ibcon#wrote, iclass 4, count 0 2006.229.12:02:38.01#ibcon#about to read 3, iclass 4, count 0 2006.229.12:02:38.04#ibcon#read 3, iclass 4, count 0 2006.229.12:02:38.04#ibcon#about to read 4, iclass 4, count 0 2006.229.12:02:38.04#ibcon#read 4, iclass 4, count 0 2006.229.12:02:38.04#ibcon#about to read 5, iclass 4, count 0 2006.229.12:02:38.04#ibcon#read 5, iclass 4, count 0 2006.229.12:02:38.04#ibcon#about to read 6, iclass 4, count 0 2006.229.12:02:38.04#ibcon#read 6, iclass 4, count 0 2006.229.12:02:38.04#ibcon#end of sib2, iclass 4, count 0 2006.229.12:02:38.04#ibcon#*after write, iclass 4, count 0 2006.229.12:02:38.04#ibcon#*before return 0, iclass 4, count 0 2006.229.12:02:38.04#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:02:38.04#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:02:38.04#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:02:38.04#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:02:38.04$vck44/vblo=2,634.99 2006.229.12:02:38.04#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.12:02:38.04#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.12:02:38.04#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:38.04#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:38.04#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:38.04#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:38.04#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:02:38.04#ibcon#first serial, iclass 6, count 0 2006.229.12:02:38.04#ibcon#enter sib2, iclass 6, count 0 2006.229.12:02:38.04#ibcon#flushed, iclass 6, count 0 2006.229.12:02:38.04#ibcon#about to write, iclass 6, count 0 2006.229.12:02:38.04#ibcon#wrote, iclass 6, count 0 2006.229.12:02:38.04#ibcon#about to read 3, iclass 6, count 0 2006.229.12:02:38.06#ibcon#read 3, iclass 6, count 0 2006.229.12:02:38.06#ibcon#about to read 4, iclass 6, count 0 2006.229.12:02:38.06#ibcon#read 4, iclass 6, count 0 2006.229.12:02:38.06#ibcon#about to read 5, iclass 6, count 0 2006.229.12:02:38.06#ibcon#read 5, iclass 6, count 0 2006.229.12:02:38.06#ibcon#about to read 6, iclass 6, count 0 2006.229.12:02:38.06#ibcon#read 6, iclass 6, count 0 2006.229.12:02:38.06#ibcon#end of sib2, iclass 6, count 0 2006.229.12:02:38.06#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:02:38.06#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:02:38.06#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:02:38.06#ibcon#*before write, iclass 6, count 0 2006.229.12:02:38.06#ibcon#enter sib2, iclass 6, count 0 2006.229.12:02:38.06#ibcon#flushed, iclass 6, count 0 2006.229.12:02:38.06#ibcon#about to write, iclass 6, count 0 2006.229.12:02:38.06#ibcon#wrote, iclass 6, count 0 2006.229.12:02:38.06#ibcon#about to read 3, iclass 6, count 0 2006.229.12:02:38.10#ibcon#read 3, iclass 6, count 0 2006.229.12:02:38.10#ibcon#about to read 4, iclass 6, count 0 2006.229.12:02:38.10#ibcon#read 4, iclass 6, count 0 2006.229.12:02:38.10#ibcon#about to read 5, iclass 6, count 0 2006.229.12:02:38.10#ibcon#read 5, iclass 6, count 0 2006.229.12:02:38.10#ibcon#about to read 6, iclass 6, count 0 2006.229.12:02:38.10#ibcon#read 6, iclass 6, count 0 2006.229.12:02:38.10#ibcon#end of sib2, iclass 6, count 0 2006.229.12:02:38.10#ibcon#*after write, iclass 6, count 0 2006.229.12:02:38.10#ibcon#*before return 0, iclass 6, count 0 2006.229.12:02:38.10#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:38.10#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:02:38.10#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:02:38.10#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:02:38.10$vck44/vb=2,4 2006.229.12:02:38.10#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.12:02:38.10#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.12:02:38.10#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:38.10#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:38.16#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:38.16#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:38.16#ibcon#enter wrdev, iclass 10, count 2 2006.229.12:02:38.16#ibcon#first serial, iclass 10, count 2 2006.229.12:02:38.16#ibcon#enter sib2, iclass 10, count 2 2006.229.12:02:38.16#ibcon#flushed, iclass 10, count 2 2006.229.12:02:38.16#ibcon#about to write, iclass 10, count 2 2006.229.12:02:38.16#ibcon#wrote, iclass 10, count 2 2006.229.12:02:38.16#ibcon#about to read 3, iclass 10, count 2 2006.229.12:02:38.18#ibcon#read 3, iclass 10, count 2 2006.229.12:02:38.18#ibcon#about to read 4, iclass 10, count 2 2006.229.12:02:38.18#ibcon#read 4, iclass 10, count 2 2006.229.12:02:38.18#ibcon#about to read 5, iclass 10, count 2 2006.229.12:02:38.18#ibcon#read 5, iclass 10, count 2 2006.229.12:02:38.18#ibcon#about to read 6, iclass 10, count 2 2006.229.12:02:38.18#ibcon#read 6, iclass 10, count 2 2006.229.12:02:38.18#ibcon#end of sib2, iclass 10, count 2 2006.229.12:02:38.18#ibcon#*mode == 0, iclass 10, count 2 2006.229.12:02:38.18#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.12:02:38.18#ibcon#[27=AT02-04\r\n] 2006.229.12:02:38.18#ibcon#*before write, iclass 10, count 2 2006.229.12:02:38.18#ibcon#enter sib2, iclass 10, count 2 2006.229.12:02:38.18#ibcon#flushed, iclass 10, count 2 2006.229.12:02:38.18#ibcon#about to write, iclass 10, count 2 2006.229.12:02:38.18#ibcon#wrote, iclass 10, count 2 2006.229.12:02:38.18#ibcon#about to read 3, iclass 10, count 2 2006.229.12:02:38.21#ibcon#read 3, iclass 10, count 2 2006.229.12:02:38.21#ibcon#about to read 4, iclass 10, count 2 2006.229.12:02:38.21#ibcon#read 4, iclass 10, count 2 2006.229.12:02:38.21#ibcon#about to read 5, iclass 10, count 2 2006.229.12:02:38.21#ibcon#read 5, iclass 10, count 2 2006.229.12:02:38.21#ibcon#about to read 6, iclass 10, count 2 2006.229.12:02:38.21#ibcon#read 6, iclass 10, count 2 2006.229.12:02:38.21#ibcon#end of sib2, iclass 10, count 2 2006.229.12:02:38.21#ibcon#*after write, iclass 10, count 2 2006.229.12:02:38.21#ibcon#*before return 0, iclass 10, count 2 2006.229.12:02:38.21#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:38.21#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:02:38.21#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.12:02:38.21#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:38.21#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:38.33#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:38.33#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:38.33#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:02:38.33#ibcon#first serial, iclass 10, count 0 2006.229.12:02:38.33#ibcon#enter sib2, iclass 10, count 0 2006.229.12:02:38.33#ibcon#flushed, iclass 10, count 0 2006.229.12:02:38.33#ibcon#about to write, iclass 10, count 0 2006.229.12:02:38.33#ibcon#wrote, iclass 10, count 0 2006.229.12:02:38.33#ibcon#about to read 3, iclass 10, count 0 2006.229.12:02:38.35#ibcon#read 3, iclass 10, count 0 2006.229.12:02:38.35#ibcon#about to read 4, iclass 10, count 0 2006.229.12:02:38.35#ibcon#read 4, iclass 10, count 0 2006.229.12:02:38.35#ibcon#about to read 5, iclass 10, count 0 2006.229.12:02:38.35#ibcon#read 5, iclass 10, count 0 2006.229.12:02:38.35#ibcon#about to read 6, iclass 10, count 0 2006.229.12:02:38.35#ibcon#read 6, iclass 10, count 0 2006.229.12:02:38.35#ibcon#end of sib2, iclass 10, count 0 2006.229.12:02:38.35#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:02:38.35#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:02:38.35#ibcon#[27=USB\r\n] 2006.229.12:02:38.35#ibcon#*before write, iclass 10, count 0 2006.229.12:02:38.35#ibcon#enter sib2, iclass 10, count 0 2006.229.12:02:38.35#ibcon#flushed, iclass 10, count 0 2006.229.12:02:38.35#ibcon#about to write, iclass 10, count 0 2006.229.12:02:38.35#ibcon#wrote, iclass 10, count 0 2006.229.12:02:38.35#ibcon#about to read 3, iclass 10, count 0 2006.229.12:02:38.38#ibcon#read 3, iclass 10, count 0 2006.229.12:02:38.38#ibcon#about to read 4, iclass 10, count 0 2006.229.12:02:38.38#ibcon#read 4, iclass 10, count 0 2006.229.12:02:38.38#ibcon#about to read 5, iclass 10, count 0 2006.229.12:02:38.38#ibcon#read 5, iclass 10, count 0 2006.229.12:02:38.38#ibcon#about to read 6, iclass 10, count 0 2006.229.12:02:38.38#ibcon#read 6, iclass 10, count 0 2006.229.12:02:38.38#ibcon#end of sib2, iclass 10, count 0 2006.229.12:02:38.38#ibcon#*after write, iclass 10, count 0 2006.229.12:02:38.38#ibcon#*before return 0, iclass 10, count 0 2006.229.12:02:38.38#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:38.38#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:02:38.38#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:02:38.38#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:02:38.38$vck44/vblo=3,649.99 2006.229.12:02:38.38#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:02:38.38#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:02:38.38#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:38.38#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:38.38#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:38.38#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:38.38#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:02:38.38#ibcon#first serial, iclass 12, count 0 2006.229.12:02:38.38#ibcon#enter sib2, iclass 12, count 0 2006.229.12:02:38.38#ibcon#flushed, iclass 12, count 0 2006.229.12:02:38.38#ibcon#about to write, iclass 12, count 0 2006.229.12:02:38.38#ibcon#wrote, iclass 12, count 0 2006.229.12:02:38.38#ibcon#about to read 3, iclass 12, count 0 2006.229.12:02:38.40#ibcon#read 3, iclass 12, count 0 2006.229.12:02:38.40#ibcon#about to read 4, iclass 12, count 0 2006.229.12:02:38.40#ibcon#read 4, iclass 12, count 0 2006.229.12:02:38.40#ibcon#about to read 5, iclass 12, count 0 2006.229.12:02:38.40#ibcon#read 5, iclass 12, count 0 2006.229.12:02:38.40#ibcon#about to read 6, iclass 12, count 0 2006.229.12:02:38.40#ibcon#read 6, iclass 12, count 0 2006.229.12:02:38.40#ibcon#end of sib2, iclass 12, count 0 2006.229.12:02:38.40#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:02:38.40#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:02:38.40#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:02:38.40#ibcon#*before write, iclass 12, count 0 2006.229.12:02:38.40#ibcon#enter sib2, iclass 12, count 0 2006.229.12:02:38.40#ibcon#flushed, iclass 12, count 0 2006.229.12:02:38.40#ibcon#about to write, iclass 12, count 0 2006.229.12:02:38.40#ibcon#wrote, iclass 12, count 0 2006.229.12:02:38.40#ibcon#about to read 3, iclass 12, count 0 2006.229.12:02:38.44#ibcon#read 3, iclass 12, count 0 2006.229.12:02:38.44#ibcon#about to read 4, iclass 12, count 0 2006.229.12:02:38.44#ibcon#read 4, iclass 12, count 0 2006.229.12:02:38.44#ibcon#about to read 5, iclass 12, count 0 2006.229.12:02:38.44#ibcon#read 5, iclass 12, count 0 2006.229.12:02:38.44#ibcon#about to read 6, iclass 12, count 0 2006.229.12:02:38.44#ibcon#read 6, iclass 12, count 0 2006.229.12:02:38.44#ibcon#end of sib2, iclass 12, count 0 2006.229.12:02:38.44#ibcon#*after write, iclass 12, count 0 2006.229.12:02:38.44#ibcon#*before return 0, iclass 12, count 0 2006.229.12:02:38.44#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:38.44#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:02:38.44#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:02:38.44#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:02:38.44$vck44/vb=3,4 2006.229.12:02:38.44#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.12:02:38.44#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.12:02:38.44#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:38.44#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:38.50#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:38.50#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:38.50#ibcon#enter wrdev, iclass 14, count 2 2006.229.12:02:38.50#ibcon#first serial, iclass 14, count 2 2006.229.12:02:38.50#ibcon#enter sib2, iclass 14, count 2 2006.229.12:02:38.50#ibcon#flushed, iclass 14, count 2 2006.229.12:02:38.50#ibcon#about to write, iclass 14, count 2 2006.229.12:02:38.50#ibcon#wrote, iclass 14, count 2 2006.229.12:02:38.50#ibcon#about to read 3, iclass 14, count 2 2006.229.12:02:38.52#ibcon#read 3, iclass 14, count 2 2006.229.12:02:38.52#ibcon#about to read 4, iclass 14, count 2 2006.229.12:02:38.52#ibcon#read 4, iclass 14, count 2 2006.229.12:02:38.52#ibcon#about to read 5, iclass 14, count 2 2006.229.12:02:38.52#ibcon#read 5, iclass 14, count 2 2006.229.12:02:38.52#ibcon#about to read 6, iclass 14, count 2 2006.229.12:02:38.52#ibcon#read 6, iclass 14, count 2 2006.229.12:02:38.52#ibcon#end of sib2, iclass 14, count 2 2006.229.12:02:38.52#ibcon#*mode == 0, iclass 14, count 2 2006.229.12:02:38.52#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.12:02:38.52#ibcon#[27=AT03-04\r\n] 2006.229.12:02:38.52#ibcon#*before write, iclass 14, count 2 2006.229.12:02:38.52#ibcon#enter sib2, iclass 14, count 2 2006.229.12:02:38.52#ibcon#flushed, iclass 14, count 2 2006.229.12:02:38.52#ibcon#about to write, iclass 14, count 2 2006.229.12:02:38.52#ibcon#wrote, iclass 14, count 2 2006.229.12:02:38.52#ibcon#about to read 3, iclass 14, count 2 2006.229.12:02:38.55#ibcon#read 3, iclass 14, count 2 2006.229.12:02:38.55#ibcon#about to read 4, iclass 14, count 2 2006.229.12:02:38.55#ibcon#read 4, iclass 14, count 2 2006.229.12:02:38.55#ibcon#about to read 5, iclass 14, count 2 2006.229.12:02:38.55#ibcon#read 5, iclass 14, count 2 2006.229.12:02:38.55#ibcon#about to read 6, iclass 14, count 2 2006.229.12:02:38.55#ibcon#read 6, iclass 14, count 2 2006.229.12:02:38.55#ibcon#end of sib2, iclass 14, count 2 2006.229.12:02:38.55#ibcon#*after write, iclass 14, count 2 2006.229.12:02:38.55#ibcon#*before return 0, iclass 14, count 2 2006.229.12:02:38.55#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:38.55#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:02:38.55#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.12:02:38.55#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:38.55#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:38.67#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:38.67#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:38.67#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:02:38.67#ibcon#first serial, iclass 14, count 0 2006.229.12:02:38.67#ibcon#enter sib2, iclass 14, count 0 2006.229.12:02:38.67#ibcon#flushed, iclass 14, count 0 2006.229.12:02:38.67#ibcon#about to write, iclass 14, count 0 2006.229.12:02:38.67#ibcon#wrote, iclass 14, count 0 2006.229.12:02:38.67#ibcon#about to read 3, iclass 14, count 0 2006.229.12:02:38.69#ibcon#read 3, iclass 14, count 0 2006.229.12:02:38.69#ibcon#about to read 4, iclass 14, count 0 2006.229.12:02:38.69#ibcon#read 4, iclass 14, count 0 2006.229.12:02:38.69#ibcon#about to read 5, iclass 14, count 0 2006.229.12:02:38.69#ibcon#read 5, iclass 14, count 0 2006.229.12:02:38.69#ibcon#about to read 6, iclass 14, count 0 2006.229.12:02:38.69#ibcon#read 6, iclass 14, count 0 2006.229.12:02:38.69#ibcon#end of sib2, iclass 14, count 0 2006.229.12:02:38.69#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:02:38.69#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:02:38.69#ibcon#[27=USB\r\n] 2006.229.12:02:38.69#ibcon#*before write, iclass 14, count 0 2006.229.12:02:38.69#ibcon#enter sib2, iclass 14, count 0 2006.229.12:02:38.69#ibcon#flushed, iclass 14, count 0 2006.229.12:02:38.69#ibcon#about to write, iclass 14, count 0 2006.229.12:02:38.69#ibcon#wrote, iclass 14, count 0 2006.229.12:02:38.69#ibcon#about to read 3, iclass 14, count 0 2006.229.12:02:38.72#ibcon#read 3, iclass 14, count 0 2006.229.12:02:38.72#ibcon#about to read 4, iclass 14, count 0 2006.229.12:02:38.72#ibcon#read 4, iclass 14, count 0 2006.229.12:02:38.72#ibcon#about to read 5, iclass 14, count 0 2006.229.12:02:38.72#ibcon#read 5, iclass 14, count 0 2006.229.12:02:38.72#ibcon#about to read 6, iclass 14, count 0 2006.229.12:02:38.72#ibcon#read 6, iclass 14, count 0 2006.229.12:02:38.72#ibcon#end of sib2, iclass 14, count 0 2006.229.12:02:38.72#ibcon#*after write, iclass 14, count 0 2006.229.12:02:38.72#ibcon#*before return 0, iclass 14, count 0 2006.229.12:02:38.72#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:38.72#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:02:38.72#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:02:38.72#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:02:38.72$vck44/vblo=4,679.99 2006.229.12:02:38.72#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.12:02:38.72#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.12:02:38.72#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:38.72#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:38.72#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:38.72#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:38.72#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:02:38.72#ibcon#first serial, iclass 16, count 0 2006.229.12:02:38.72#ibcon#enter sib2, iclass 16, count 0 2006.229.12:02:38.72#ibcon#flushed, iclass 16, count 0 2006.229.12:02:38.72#ibcon#about to write, iclass 16, count 0 2006.229.12:02:38.72#ibcon#wrote, iclass 16, count 0 2006.229.12:02:38.72#ibcon#about to read 3, iclass 16, count 0 2006.229.12:02:38.74#ibcon#read 3, iclass 16, count 0 2006.229.12:02:38.74#ibcon#about to read 4, iclass 16, count 0 2006.229.12:02:38.74#ibcon#read 4, iclass 16, count 0 2006.229.12:02:38.74#ibcon#about to read 5, iclass 16, count 0 2006.229.12:02:38.74#ibcon#read 5, iclass 16, count 0 2006.229.12:02:38.74#ibcon#about to read 6, iclass 16, count 0 2006.229.12:02:38.74#ibcon#read 6, iclass 16, count 0 2006.229.12:02:38.74#ibcon#end of sib2, iclass 16, count 0 2006.229.12:02:38.74#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:02:38.74#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:02:38.74#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:02:38.74#ibcon#*before write, iclass 16, count 0 2006.229.12:02:38.74#ibcon#enter sib2, iclass 16, count 0 2006.229.12:02:38.74#ibcon#flushed, iclass 16, count 0 2006.229.12:02:38.74#ibcon#about to write, iclass 16, count 0 2006.229.12:02:38.74#ibcon#wrote, iclass 16, count 0 2006.229.12:02:38.74#ibcon#about to read 3, iclass 16, count 0 2006.229.12:02:38.78#ibcon#read 3, iclass 16, count 0 2006.229.12:02:38.78#ibcon#about to read 4, iclass 16, count 0 2006.229.12:02:38.78#ibcon#read 4, iclass 16, count 0 2006.229.12:02:38.78#ibcon#about to read 5, iclass 16, count 0 2006.229.12:02:38.78#ibcon#read 5, iclass 16, count 0 2006.229.12:02:38.78#ibcon#about to read 6, iclass 16, count 0 2006.229.12:02:38.78#ibcon#read 6, iclass 16, count 0 2006.229.12:02:38.78#ibcon#end of sib2, iclass 16, count 0 2006.229.12:02:38.78#ibcon#*after write, iclass 16, count 0 2006.229.12:02:38.78#ibcon#*before return 0, iclass 16, count 0 2006.229.12:02:38.78#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:38.78#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:02:38.78#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:02:38.78#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:02:38.78$vck44/vb=4,4 2006.229.12:02:38.78#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.12:02:38.78#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.12:02:38.78#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:38.78#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:38.84#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:38.84#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:38.84#ibcon#enter wrdev, iclass 18, count 2 2006.229.12:02:38.84#ibcon#first serial, iclass 18, count 2 2006.229.12:02:38.84#ibcon#enter sib2, iclass 18, count 2 2006.229.12:02:38.84#ibcon#flushed, iclass 18, count 2 2006.229.12:02:38.84#ibcon#about to write, iclass 18, count 2 2006.229.12:02:38.84#ibcon#wrote, iclass 18, count 2 2006.229.12:02:38.84#ibcon#about to read 3, iclass 18, count 2 2006.229.12:02:38.86#ibcon#read 3, iclass 18, count 2 2006.229.12:02:38.86#ibcon#about to read 4, iclass 18, count 2 2006.229.12:02:38.86#ibcon#read 4, iclass 18, count 2 2006.229.12:02:38.86#ibcon#about to read 5, iclass 18, count 2 2006.229.12:02:38.86#ibcon#read 5, iclass 18, count 2 2006.229.12:02:38.86#ibcon#about to read 6, iclass 18, count 2 2006.229.12:02:38.86#ibcon#read 6, iclass 18, count 2 2006.229.12:02:38.86#ibcon#end of sib2, iclass 18, count 2 2006.229.12:02:38.86#ibcon#*mode == 0, iclass 18, count 2 2006.229.12:02:38.86#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.12:02:38.86#ibcon#[27=AT04-04\r\n] 2006.229.12:02:38.86#ibcon#*before write, iclass 18, count 2 2006.229.12:02:38.86#ibcon#enter sib2, iclass 18, count 2 2006.229.12:02:38.86#ibcon#flushed, iclass 18, count 2 2006.229.12:02:38.86#ibcon#about to write, iclass 18, count 2 2006.229.12:02:38.86#ibcon#wrote, iclass 18, count 2 2006.229.12:02:38.86#ibcon#about to read 3, iclass 18, count 2 2006.229.12:02:38.89#ibcon#read 3, iclass 18, count 2 2006.229.12:02:38.89#ibcon#about to read 4, iclass 18, count 2 2006.229.12:02:38.89#ibcon#read 4, iclass 18, count 2 2006.229.12:02:38.89#ibcon#about to read 5, iclass 18, count 2 2006.229.12:02:38.89#ibcon#read 5, iclass 18, count 2 2006.229.12:02:38.89#ibcon#about to read 6, iclass 18, count 2 2006.229.12:02:38.89#ibcon#read 6, iclass 18, count 2 2006.229.12:02:38.89#ibcon#end of sib2, iclass 18, count 2 2006.229.12:02:38.89#ibcon#*after write, iclass 18, count 2 2006.229.12:02:38.89#ibcon#*before return 0, iclass 18, count 2 2006.229.12:02:38.89#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:38.89#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:02:38.89#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.12:02:38.89#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:38.89#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:39.01#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:39.01#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:39.01#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:02:39.01#ibcon#first serial, iclass 18, count 0 2006.229.12:02:39.01#ibcon#enter sib2, iclass 18, count 0 2006.229.12:02:39.01#ibcon#flushed, iclass 18, count 0 2006.229.12:02:39.01#ibcon#about to write, iclass 18, count 0 2006.229.12:02:39.01#ibcon#wrote, iclass 18, count 0 2006.229.12:02:39.01#ibcon#about to read 3, iclass 18, count 0 2006.229.12:02:39.03#ibcon#read 3, iclass 18, count 0 2006.229.12:02:39.03#ibcon#about to read 4, iclass 18, count 0 2006.229.12:02:39.03#ibcon#read 4, iclass 18, count 0 2006.229.12:02:39.03#ibcon#about to read 5, iclass 18, count 0 2006.229.12:02:39.03#ibcon#read 5, iclass 18, count 0 2006.229.12:02:39.03#ibcon#about to read 6, iclass 18, count 0 2006.229.12:02:39.03#ibcon#read 6, iclass 18, count 0 2006.229.12:02:39.03#ibcon#end of sib2, iclass 18, count 0 2006.229.12:02:39.03#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:02:39.03#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:02:39.03#ibcon#[27=USB\r\n] 2006.229.12:02:39.03#ibcon#*before write, iclass 18, count 0 2006.229.12:02:39.03#ibcon#enter sib2, iclass 18, count 0 2006.229.12:02:39.03#ibcon#flushed, iclass 18, count 0 2006.229.12:02:39.03#ibcon#about to write, iclass 18, count 0 2006.229.12:02:39.03#ibcon#wrote, iclass 18, count 0 2006.229.12:02:39.03#ibcon#about to read 3, iclass 18, count 0 2006.229.12:02:39.06#ibcon#read 3, iclass 18, count 0 2006.229.12:02:39.06#ibcon#about to read 4, iclass 18, count 0 2006.229.12:02:39.06#ibcon#read 4, iclass 18, count 0 2006.229.12:02:39.06#ibcon#about to read 5, iclass 18, count 0 2006.229.12:02:39.06#ibcon#read 5, iclass 18, count 0 2006.229.12:02:39.06#ibcon#about to read 6, iclass 18, count 0 2006.229.12:02:39.06#ibcon#read 6, iclass 18, count 0 2006.229.12:02:39.06#ibcon#end of sib2, iclass 18, count 0 2006.229.12:02:39.06#ibcon#*after write, iclass 18, count 0 2006.229.12:02:39.06#ibcon#*before return 0, iclass 18, count 0 2006.229.12:02:39.06#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:39.06#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:02:39.06#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:02:39.06#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:02:39.06$vck44/vblo=5,709.99 2006.229.12:02:39.06#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.12:02:39.06#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.12:02:39.06#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:39.06#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:39.06#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:39.06#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:39.06#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:02:39.06#ibcon#first serial, iclass 20, count 0 2006.229.12:02:39.06#ibcon#enter sib2, iclass 20, count 0 2006.229.12:02:39.06#ibcon#flushed, iclass 20, count 0 2006.229.12:02:39.06#ibcon#about to write, iclass 20, count 0 2006.229.12:02:39.06#ibcon#wrote, iclass 20, count 0 2006.229.12:02:39.06#ibcon#about to read 3, iclass 20, count 0 2006.229.12:02:39.08#ibcon#read 3, iclass 20, count 0 2006.229.12:02:39.08#ibcon#about to read 4, iclass 20, count 0 2006.229.12:02:39.08#ibcon#read 4, iclass 20, count 0 2006.229.12:02:39.08#ibcon#about to read 5, iclass 20, count 0 2006.229.12:02:39.08#ibcon#read 5, iclass 20, count 0 2006.229.12:02:39.08#ibcon#about to read 6, iclass 20, count 0 2006.229.12:02:39.08#ibcon#read 6, iclass 20, count 0 2006.229.12:02:39.08#ibcon#end of sib2, iclass 20, count 0 2006.229.12:02:39.08#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:02:39.08#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:02:39.08#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:02:39.08#ibcon#*before write, iclass 20, count 0 2006.229.12:02:39.08#ibcon#enter sib2, iclass 20, count 0 2006.229.12:02:39.08#ibcon#flushed, iclass 20, count 0 2006.229.12:02:39.08#ibcon#about to write, iclass 20, count 0 2006.229.12:02:39.08#ibcon#wrote, iclass 20, count 0 2006.229.12:02:39.08#ibcon#about to read 3, iclass 20, count 0 2006.229.12:02:39.12#ibcon#read 3, iclass 20, count 0 2006.229.12:02:39.12#ibcon#about to read 4, iclass 20, count 0 2006.229.12:02:39.12#ibcon#read 4, iclass 20, count 0 2006.229.12:02:39.12#ibcon#about to read 5, iclass 20, count 0 2006.229.12:02:39.12#ibcon#read 5, iclass 20, count 0 2006.229.12:02:39.12#ibcon#about to read 6, iclass 20, count 0 2006.229.12:02:39.12#ibcon#read 6, iclass 20, count 0 2006.229.12:02:39.12#ibcon#end of sib2, iclass 20, count 0 2006.229.12:02:39.12#ibcon#*after write, iclass 20, count 0 2006.229.12:02:39.12#ibcon#*before return 0, iclass 20, count 0 2006.229.12:02:39.12#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:39.12#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:02:39.12#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:02:39.12#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:02:39.12$vck44/vb=5,4 2006.229.12:02:39.12#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.12:02:39.12#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.12:02:39.12#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:39.12#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:39.18#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:39.18#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:39.18#ibcon#enter wrdev, iclass 22, count 2 2006.229.12:02:39.18#ibcon#first serial, iclass 22, count 2 2006.229.12:02:39.18#ibcon#enter sib2, iclass 22, count 2 2006.229.12:02:39.18#ibcon#flushed, iclass 22, count 2 2006.229.12:02:39.18#ibcon#about to write, iclass 22, count 2 2006.229.12:02:39.18#ibcon#wrote, iclass 22, count 2 2006.229.12:02:39.18#ibcon#about to read 3, iclass 22, count 2 2006.229.12:02:39.20#ibcon#read 3, iclass 22, count 2 2006.229.12:02:39.20#ibcon#about to read 4, iclass 22, count 2 2006.229.12:02:39.20#ibcon#read 4, iclass 22, count 2 2006.229.12:02:39.20#ibcon#about to read 5, iclass 22, count 2 2006.229.12:02:39.20#ibcon#read 5, iclass 22, count 2 2006.229.12:02:39.20#ibcon#about to read 6, iclass 22, count 2 2006.229.12:02:39.20#ibcon#read 6, iclass 22, count 2 2006.229.12:02:39.20#ibcon#end of sib2, iclass 22, count 2 2006.229.12:02:39.20#ibcon#*mode == 0, iclass 22, count 2 2006.229.12:02:39.20#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.12:02:39.20#ibcon#[27=AT05-04\r\n] 2006.229.12:02:39.20#ibcon#*before write, iclass 22, count 2 2006.229.12:02:39.20#ibcon#enter sib2, iclass 22, count 2 2006.229.12:02:39.20#ibcon#flushed, iclass 22, count 2 2006.229.12:02:39.20#ibcon#about to write, iclass 22, count 2 2006.229.12:02:39.20#ibcon#wrote, iclass 22, count 2 2006.229.12:02:39.20#ibcon#about to read 3, iclass 22, count 2 2006.229.12:02:39.23#ibcon#read 3, iclass 22, count 2 2006.229.12:02:39.23#ibcon#about to read 4, iclass 22, count 2 2006.229.12:02:39.23#ibcon#read 4, iclass 22, count 2 2006.229.12:02:39.23#ibcon#about to read 5, iclass 22, count 2 2006.229.12:02:39.23#ibcon#read 5, iclass 22, count 2 2006.229.12:02:39.23#ibcon#about to read 6, iclass 22, count 2 2006.229.12:02:39.23#ibcon#read 6, iclass 22, count 2 2006.229.12:02:39.23#ibcon#end of sib2, iclass 22, count 2 2006.229.12:02:39.23#ibcon#*after write, iclass 22, count 2 2006.229.12:02:39.23#ibcon#*before return 0, iclass 22, count 2 2006.229.12:02:39.23#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:39.23#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:02:39.23#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.12:02:39.23#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:39.23#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:39.35#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:39.35#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:39.35#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:02:39.35#ibcon#first serial, iclass 22, count 0 2006.229.12:02:39.35#ibcon#enter sib2, iclass 22, count 0 2006.229.12:02:39.35#ibcon#flushed, iclass 22, count 0 2006.229.12:02:39.35#ibcon#about to write, iclass 22, count 0 2006.229.12:02:39.35#ibcon#wrote, iclass 22, count 0 2006.229.12:02:39.35#ibcon#about to read 3, iclass 22, count 0 2006.229.12:02:39.37#ibcon#read 3, iclass 22, count 0 2006.229.12:02:39.37#ibcon#about to read 4, iclass 22, count 0 2006.229.12:02:39.37#ibcon#read 4, iclass 22, count 0 2006.229.12:02:39.37#ibcon#about to read 5, iclass 22, count 0 2006.229.12:02:39.37#ibcon#read 5, iclass 22, count 0 2006.229.12:02:39.37#ibcon#about to read 6, iclass 22, count 0 2006.229.12:02:39.37#ibcon#read 6, iclass 22, count 0 2006.229.12:02:39.37#ibcon#end of sib2, iclass 22, count 0 2006.229.12:02:39.37#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:02:39.37#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:02:39.37#ibcon#[27=USB\r\n] 2006.229.12:02:39.37#ibcon#*before write, iclass 22, count 0 2006.229.12:02:39.37#ibcon#enter sib2, iclass 22, count 0 2006.229.12:02:39.37#ibcon#flushed, iclass 22, count 0 2006.229.12:02:39.37#ibcon#about to write, iclass 22, count 0 2006.229.12:02:39.37#ibcon#wrote, iclass 22, count 0 2006.229.12:02:39.37#ibcon#about to read 3, iclass 22, count 0 2006.229.12:02:39.40#ibcon#read 3, iclass 22, count 0 2006.229.12:02:39.40#ibcon#about to read 4, iclass 22, count 0 2006.229.12:02:39.40#ibcon#read 4, iclass 22, count 0 2006.229.12:02:39.40#ibcon#about to read 5, iclass 22, count 0 2006.229.12:02:39.40#ibcon#read 5, iclass 22, count 0 2006.229.12:02:39.40#ibcon#about to read 6, iclass 22, count 0 2006.229.12:02:39.40#ibcon#read 6, iclass 22, count 0 2006.229.12:02:39.40#ibcon#end of sib2, iclass 22, count 0 2006.229.12:02:39.40#ibcon#*after write, iclass 22, count 0 2006.229.12:02:39.40#ibcon#*before return 0, iclass 22, count 0 2006.229.12:02:39.40#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:39.40#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:02:39.40#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:02:39.40#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:02:39.40$vck44/vblo=6,719.99 2006.229.12:02:39.40#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:02:39.40#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:02:39.40#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:39.40#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:39.40#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:39.40#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:39.40#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:02:39.40#ibcon#first serial, iclass 24, count 0 2006.229.12:02:39.40#ibcon#enter sib2, iclass 24, count 0 2006.229.12:02:39.40#ibcon#flushed, iclass 24, count 0 2006.229.12:02:39.40#ibcon#about to write, iclass 24, count 0 2006.229.12:02:39.40#ibcon#wrote, iclass 24, count 0 2006.229.12:02:39.40#ibcon#about to read 3, iclass 24, count 0 2006.229.12:02:39.42#ibcon#read 3, iclass 24, count 0 2006.229.12:02:39.42#ibcon#about to read 4, iclass 24, count 0 2006.229.12:02:39.42#ibcon#read 4, iclass 24, count 0 2006.229.12:02:39.42#ibcon#about to read 5, iclass 24, count 0 2006.229.12:02:39.42#ibcon#read 5, iclass 24, count 0 2006.229.12:02:39.42#ibcon#about to read 6, iclass 24, count 0 2006.229.12:02:39.42#ibcon#read 6, iclass 24, count 0 2006.229.12:02:39.42#ibcon#end of sib2, iclass 24, count 0 2006.229.12:02:39.42#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:02:39.42#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:02:39.42#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:02:39.42#ibcon#*before write, iclass 24, count 0 2006.229.12:02:39.42#ibcon#enter sib2, iclass 24, count 0 2006.229.12:02:39.42#ibcon#flushed, iclass 24, count 0 2006.229.12:02:39.42#ibcon#about to write, iclass 24, count 0 2006.229.12:02:39.42#ibcon#wrote, iclass 24, count 0 2006.229.12:02:39.42#ibcon#about to read 3, iclass 24, count 0 2006.229.12:02:39.46#ibcon#read 3, iclass 24, count 0 2006.229.12:02:39.46#ibcon#about to read 4, iclass 24, count 0 2006.229.12:02:39.46#ibcon#read 4, iclass 24, count 0 2006.229.12:02:39.46#ibcon#about to read 5, iclass 24, count 0 2006.229.12:02:39.46#ibcon#read 5, iclass 24, count 0 2006.229.12:02:39.46#ibcon#about to read 6, iclass 24, count 0 2006.229.12:02:39.46#ibcon#read 6, iclass 24, count 0 2006.229.12:02:39.46#ibcon#end of sib2, iclass 24, count 0 2006.229.12:02:39.46#ibcon#*after write, iclass 24, count 0 2006.229.12:02:39.46#ibcon#*before return 0, iclass 24, count 0 2006.229.12:02:39.46#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:39.46#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:02:39.46#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:02:39.46#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:02:39.46$vck44/vb=6,4 2006.229.12:02:39.46#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:02:39.46#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:02:39.46#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:39.46#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:39.52#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:39.52#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:39.52#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:02:39.52#ibcon#first serial, iclass 26, count 2 2006.229.12:02:39.52#ibcon#enter sib2, iclass 26, count 2 2006.229.12:02:39.52#ibcon#flushed, iclass 26, count 2 2006.229.12:02:39.52#ibcon#about to write, iclass 26, count 2 2006.229.12:02:39.52#ibcon#wrote, iclass 26, count 2 2006.229.12:02:39.52#ibcon#about to read 3, iclass 26, count 2 2006.229.12:02:39.54#ibcon#read 3, iclass 26, count 2 2006.229.12:02:39.54#ibcon#about to read 4, iclass 26, count 2 2006.229.12:02:39.54#ibcon#read 4, iclass 26, count 2 2006.229.12:02:39.54#ibcon#about to read 5, iclass 26, count 2 2006.229.12:02:39.54#ibcon#read 5, iclass 26, count 2 2006.229.12:02:39.54#ibcon#about to read 6, iclass 26, count 2 2006.229.12:02:39.54#ibcon#read 6, iclass 26, count 2 2006.229.12:02:39.54#ibcon#end of sib2, iclass 26, count 2 2006.229.12:02:39.54#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:02:39.54#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:02:39.54#ibcon#[27=AT06-04\r\n] 2006.229.12:02:39.54#ibcon#*before write, iclass 26, count 2 2006.229.12:02:39.54#ibcon#enter sib2, iclass 26, count 2 2006.229.12:02:39.54#ibcon#flushed, iclass 26, count 2 2006.229.12:02:39.54#ibcon#about to write, iclass 26, count 2 2006.229.12:02:39.54#ibcon#wrote, iclass 26, count 2 2006.229.12:02:39.54#ibcon#about to read 3, iclass 26, count 2 2006.229.12:02:39.57#ibcon#read 3, iclass 26, count 2 2006.229.12:02:39.57#ibcon#about to read 4, iclass 26, count 2 2006.229.12:02:39.57#ibcon#read 4, iclass 26, count 2 2006.229.12:02:39.57#ibcon#about to read 5, iclass 26, count 2 2006.229.12:02:39.57#ibcon#read 5, iclass 26, count 2 2006.229.12:02:39.57#ibcon#about to read 6, iclass 26, count 2 2006.229.12:02:39.57#ibcon#read 6, iclass 26, count 2 2006.229.12:02:39.57#ibcon#end of sib2, iclass 26, count 2 2006.229.12:02:39.57#ibcon#*after write, iclass 26, count 2 2006.229.12:02:39.57#ibcon#*before return 0, iclass 26, count 2 2006.229.12:02:39.57#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:39.57#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:02:39.57#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:02:39.57#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:39.57#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:39.69#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:39.69#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:39.69#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:02:39.69#ibcon#first serial, iclass 26, count 0 2006.229.12:02:39.69#ibcon#enter sib2, iclass 26, count 0 2006.229.12:02:39.69#ibcon#flushed, iclass 26, count 0 2006.229.12:02:39.69#ibcon#about to write, iclass 26, count 0 2006.229.12:02:39.69#ibcon#wrote, iclass 26, count 0 2006.229.12:02:39.69#ibcon#about to read 3, iclass 26, count 0 2006.229.12:02:39.71#ibcon#read 3, iclass 26, count 0 2006.229.12:02:39.71#ibcon#about to read 4, iclass 26, count 0 2006.229.12:02:39.71#ibcon#read 4, iclass 26, count 0 2006.229.12:02:39.71#ibcon#about to read 5, iclass 26, count 0 2006.229.12:02:39.71#ibcon#read 5, iclass 26, count 0 2006.229.12:02:39.71#ibcon#about to read 6, iclass 26, count 0 2006.229.12:02:39.71#ibcon#read 6, iclass 26, count 0 2006.229.12:02:39.71#ibcon#end of sib2, iclass 26, count 0 2006.229.12:02:39.71#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:02:39.71#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:02:39.71#ibcon#[27=USB\r\n] 2006.229.12:02:39.71#ibcon#*before write, iclass 26, count 0 2006.229.12:02:39.71#ibcon#enter sib2, iclass 26, count 0 2006.229.12:02:39.71#ibcon#flushed, iclass 26, count 0 2006.229.12:02:39.71#ibcon#about to write, iclass 26, count 0 2006.229.12:02:39.71#ibcon#wrote, iclass 26, count 0 2006.229.12:02:39.71#ibcon#about to read 3, iclass 26, count 0 2006.229.12:02:39.74#ibcon#read 3, iclass 26, count 0 2006.229.12:02:39.74#ibcon#about to read 4, iclass 26, count 0 2006.229.12:02:39.74#ibcon#read 4, iclass 26, count 0 2006.229.12:02:39.74#ibcon#about to read 5, iclass 26, count 0 2006.229.12:02:39.74#ibcon#read 5, iclass 26, count 0 2006.229.12:02:39.74#ibcon#about to read 6, iclass 26, count 0 2006.229.12:02:39.74#ibcon#read 6, iclass 26, count 0 2006.229.12:02:39.74#ibcon#end of sib2, iclass 26, count 0 2006.229.12:02:39.74#ibcon#*after write, iclass 26, count 0 2006.229.12:02:39.74#ibcon#*before return 0, iclass 26, count 0 2006.229.12:02:39.74#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:39.74#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:02:39.74#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:02:39.74#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:02:39.74$vck44/vblo=7,734.99 2006.229.12:02:39.74#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.12:02:39.74#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.12:02:39.74#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:39.74#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:39.74#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:39.74#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:39.74#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:02:39.74#ibcon#first serial, iclass 28, count 0 2006.229.12:02:39.74#ibcon#enter sib2, iclass 28, count 0 2006.229.12:02:39.74#ibcon#flushed, iclass 28, count 0 2006.229.12:02:39.74#ibcon#about to write, iclass 28, count 0 2006.229.12:02:39.74#ibcon#wrote, iclass 28, count 0 2006.229.12:02:39.74#ibcon#about to read 3, iclass 28, count 0 2006.229.12:02:39.76#ibcon#read 3, iclass 28, count 0 2006.229.12:02:39.76#ibcon#about to read 4, iclass 28, count 0 2006.229.12:02:39.76#ibcon#read 4, iclass 28, count 0 2006.229.12:02:39.76#ibcon#about to read 5, iclass 28, count 0 2006.229.12:02:39.76#ibcon#read 5, iclass 28, count 0 2006.229.12:02:39.76#ibcon#about to read 6, iclass 28, count 0 2006.229.12:02:39.76#ibcon#read 6, iclass 28, count 0 2006.229.12:02:39.76#ibcon#end of sib2, iclass 28, count 0 2006.229.12:02:39.76#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:02:39.76#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:02:39.76#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:02:39.76#ibcon#*before write, iclass 28, count 0 2006.229.12:02:39.76#ibcon#enter sib2, iclass 28, count 0 2006.229.12:02:39.76#ibcon#flushed, iclass 28, count 0 2006.229.12:02:39.76#ibcon#about to write, iclass 28, count 0 2006.229.12:02:39.76#ibcon#wrote, iclass 28, count 0 2006.229.12:02:39.76#ibcon#about to read 3, iclass 28, count 0 2006.229.12:02:39.80#ibcon#read 3, iclass 28, count 0 2006.229.12:02:39.80#ibcon#about to read 4, iclass 28, count 0 2006.229.12:02:39.80#ibcon#read 4, iclass 28, count 0 2006.229.12:02:39.80#ibcon#about to read 5, iclass 28, count 0 2006.229.12:02:39.80#ibcon#read 5, iclass 28, count 0 2006.229.12:02:39.80#ibcon#about to read 6, iclass 28, count 0 2006.229.12:02:39.80#ibcon#read 6, iclass 28, count 0 2006.229.12:02:39.80#ibcon#end of sib2, iclass 28, count 0 2006.229.12:02:39.80#ibcon#*after write, iclass 28, count 0 2006.229.12:02:39.80#ibcon#*before return 0, iclass 28, count 0 2006.229.12:02:39.80#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:39.80#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:02:39.80#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:02:39.80#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:02:39.80$vck44/vb=7,4 2006.229.12:02:39.80#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.12:02:39.80#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.12:02:39.80#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:39.80#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:39.86#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:39.86#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:39.86#ibcon#enter wrdev, iclass 30, count 2 2006.229.12:02:39.86#ibcon#first serial, iclass 30, count 2 2006.229.12:02:39.86#ibcon#enter sib2, iclass 30, count 2 2006.229.12:02:39.86#ibcon#flushed, iclass 30, count 2 2006.229.12:02:39.86#ibcon#about to write, iclass 30, count 2 2006.229.12:02:39.86#ibcon#wrote, iclass 30, count 2 2006.229.12:02:39.86#ibcon#about to read 3, iclass 30, count 2 2006.229.12:02:39.88#ibcon#read 3, iclass 30, count 2 2006.229.12:02:39.88#ibcon#about to read 4, iclass 30, count 2 2006.229.12:02:39.88#ibcon#read 4, iclass 30, count 2 2006.229.12:02:39.88#ibcon#about to read 5, iclass 30, count 2 2006.229.12:02:39.88#ibcon#read 5, iclass 30, count 2 2006.229.12:02:39.88#ibcon#about to read 6, iclass 30, count 2 2006.229.12:02:39.88#ibcon#read 6, iclass 30, count 2 2006.229.12:02:39.88#ibcon#end of sib2, iclass 30, count 2 2006.229.12:02:39.88#ibcon#*mode == 0, iclass 30, count 2 2006.229.12:02:39.88#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.12:02:39.88#ibcon#[27=AT07-04\r\n] 2006.229.12:02:39.88#ibcon#*before write, iclass 30, count 2 2006.229.12:02:39.88#ibcon#enter sib2, iclass 30, count 2 2006.229.12:02:39.88#ibcon#flushed, iclass 30, count 2 2006.229.12:02:39.88#ibcon#about to write, iclass 30, count 2 2006.229.12:02:39.88#ibcon#wrote, iclass 30, count 2 2006.229.12:02:39.88#ibcon#about to read 3, iclass 30, count 2 2006.229.12:02:39.91#ibcon#read 3, iclass 30, count 2 2006.229.12:02:39.91#ibcon#about to read 4, iclass 30, count 2 2006.229.12:02:39.91#ibcon#read 4, iclass 30, count 2 2006.229.12:02:39.91#ibcon#about to read 5, iclass 30, count 2 2006.229.12:02:39.91#ibcon#read 5, iclass 30, count 2 2006.229.12:02:39.91#ibcon#about to read 6, iclass 30, count 2 2006.229.12:02:39.91#ibcon#read 6, iclass 30, count 2 2006.229.12:02:39.91#ibcon#end of sib2, iclass 30, count 2 2006.229.12:02:39.91#ibcon#*after write, iclass 30, count 2 2006.229.12:02:39.91#ibcon#*before return 0, iclass 30, count 2 2006.229.12:02:39.91#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:39.91#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:02:39.91#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.12:02:39.91#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:39.91#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:40.03#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:40.03#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:40.03#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:02:40.03#ibcon#first serial, iclass 30, count 0 2006.229.12:02:40.03#ibcon#enter sib2, iclass 30, count 0 2006.229.12:02:40.03#ibcon#flushed, iclass 30, count 0 2006.229.12:02:40.03#ibcon#about to write, iclass 30, count 0 2006.229.12:02:40.03#ibcon#wrote, iclass 30, count 0 2006.229.12:02:40.03#ibcon#about to read 3, iclass 30, count 0 2006.229.12:02:40.05#ibcon#read 3, iclass 30, count 0 2006.229.12:02:40.05#ibcon#about to read 4, iclass 30, count 0 2006.229.12:02:40.05#ibcon#read 4, iclass 30, count 0 2006.229.12:02:40.05#ibcon#about to read 5, iclass 30, count 0 2006.229.12:02:40.05#ibcon#read 5, iclass 30, count 0 2006.229.12:02:40.05#ibcon#about to read 6, iclass 30, count 0 2006.229.12:02:40.05#ibcon#read 6, iclass 30, count 0 2006.229.12:02:40.05#ibcon#end of sib2, iclass 30, count 0 2006.229.12:02:40.05#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:02:40.05#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:02:40.05#ibcon#[27=USB\r\n] 2006.229.12:02:40.05#ibcon#*before write, iclass 30, count 0 2006.229.12:02:40.05#ibcon#enter sib2, iclass 30, count 0 2006.229.12:02:40.05#ibcon#flushed, iclass 30, count 0 2006.229.12:02:40.05#ibcon#about to write, iclass 30, count 0 2006.229.12:02:40.05#ibcon#wrote, iclass 30, count 0 2006.229.12:02:40.05#ibcon#about to read 3, iclass 30, count 0 2006.229.12:02:40.08#ibcon#read 3, iclass 30, count 0 2006.229.12:02:40.08#ibcon#about to read 4, iclass 30, count 0 2006.229.12:02:40.08#ibcon#read 4, iclass 30, count 0 2006.229.12:02:40.08#ibcon#about to read 5, iclass 30, count 0 2006.229.12:02:40.08#ibcon#read 5, iclass 30, count 0 2006.229.12:02:40.08#ibcon#about to read 6, iclass 30, count 0 2006.229.12:02:40.08#ibcon#read 6, iclass 30, count 0 2006.229.12:02:40.08#ibcon#end of sib2, iclass 30, count 0 2006.229.12:02:40.08#ibcon#*after write, iclass 30, count 0 2006.229.12:02:40.08#ibcon#*before return 0, iclass 30, count 0 2006.229.12:02:40.08#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:40.08#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:02:40.08#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:02:40.08#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:02:40.08$vck44/vblo=8,744.99 2006.229.12:02:40.08#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.12:02:40.08#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.12:02:40.08#ibcon#ireg 17 cls_cnt 0 2006.229.12:02:40.08#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:40.08#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:40.08#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:40.08#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:02:40.08#ibcon#first serial, iclass 32, count 0 2006.229.12:02:40.08#ibcon#enter sib2, iclass 32, count 0 2006.229.12:02:40.08#ibcon#flushed, iclass 32, count 0 2006.229.12:02:40.08#ibcon#about to write, iclass 32, count 0 2006.229.12:02:40.08#ibcon#wrote, iclass 32, count 0 2006.229.12:02:40.08#ibcon#about to read 3, iclass 32, count 0 2006.229.12:02:40.10#ibcon#read 3, iclass 32, count 0 2006.229.12:02:40.10#ibcon#about to read 4, iclass 32, count 0 2006.229.12:02:40.10#ibcon#read 4, iclass 32, count 0 2006.229.12:02:40.10#ibcon#about to read 5, iclass 32, count 0 2006.229.12:02:40.10#ibcon#read 5, iclass 32, count 0 2006.229.12:02:40.10#ibcon#about to read 6, iclass 32, count 0 2006.229.12:02:40.10#ibcon#read 6, iclass 32, count 0 2006.229.12:02:40.10#ibcon#end of sib2, iclass 32, count 0 2006.229.12:02:40.10#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:02:40.10#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:02:40.10#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:02:40.10#ibcon#*before write, iclass 32, count 0 2006.229.12:02:40.10#ibcon#enter sib2, iclass 32, count 0 2006.229.12:02:40.10#ibcon#flushed, iclass 32, count 0 2006.229.12:02:40.10#ibcon#about to write, iclass 32, count 0 2006.229.12:02:40.10#ibcon#wrote, iclass 32, count 0 2006.229.12:02:40.10#ibcon#about to read 3, iclass 32, count 0 2006.229.12:02:40.14#ibcon#read 3, iclass 32, count 0 2006.229.12:02:40.14#ibcon#about to read 4, iclass 32, count 0 2006.229.12:02:40.14#ibcon#read 4, iclass 32, count 0 2006.229.12:02:40.14#ibcon#about to read 5, iclass 32, count 0 2006.229.12:02:40.14#ibcon#read 5, iclass 32, count 0 2006.229.12:02:40.14#ibcon#about to read 6, iclass 32, count 0 2006.229.12:02:40.14#ibcon#read 6, iclass 32, count 0 2006.229.12:02:40.14#ibcon#end of sib2, iclass 32, count 0 2006.229.12:02:40.14#ibcon#*after write, iclass 32, count 0 2006.229.12:02:40.14#ibcon#*before return 0, iclass 32, count 0 2006.229.12:02:40.14#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:40.14#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:02:40.14#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:02:40.14#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:02:40.14$vck44/vb=8,4 2006.229.12:02:40.14#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.12:02:40.14#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.12:02:40.14#ibcon#ireg 11 cls_cnt 2 2006.229.12:02:40.14#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:40.20#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:40.20#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:40.20#ibcon#enter wrdev, iclass 34, count 2 2006.229.12:02:40.20#ibcon#first serial, iclass 34, count 2 2006.229.12:02:40.20#ibcon#enter sib2, iclass 34, count 2 2006.229.12:02:40.20#ibcon#flushed, iclass 34, count 2 2006.229.12:02:40.20#ibcon#about to write, iclass 34, count 2 2006.229.12:02:40.20#ibcon#wrote, iclass 34, count 2 2006.229.12:02:40.20#ibcon#about to read 3, iclass 34, count 2 2006.229.12:02:40.22#ibcon#read 3, iclass 34, count 2 2006.229.12:02:40.22#ibcon#about to read 4, iclass 34, count 2 2006.229.12:02:40.22#ibcon#read 4, iclass 34, count 2 2006.229.12:02:40.22#ibcon#about to read 5, iclass 34, count 2 2006.229.12:02:40.22#ibcon#read 5, iclass 34, count 2 2006.229.12:02:40.22#ibcon#about to read 6, iclass 34, count 2 2006.229.12:02:40.22#ibcon#read 6, iclass 34, count 2 2006.229.12:02:40.22#ibcon#end of sib2, iclass 34, count 2 2006.229.12:02:40.22#ibcon#*mode == 0, iclass 34, count 2 2006.229.12:02:40.22#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.12:02:40.22#ibcon#[27=AT08-04\r\n] 2006.229.12:02:40.22#ibcon#*before write, iclass 34, count 2 2006.229.12:02:40.22#ibcon#enter sib2, iclass 34, count 2 2006.229.12:02:40.22#ibcon#flushed, iclass 34, count 2 2006.229.12:02:40.22#ibcon#about to write, iclass 34, count 2 2006.229.12:02:40.22#ibcon#wrote, iclass 34, count 2 2006.229.12:02:40.22#ibcon#about to read 3, iclass 34, count 2 2006.229.12:02:40.25#ibcon#read 3, iclass 34, count 2 2006.229.12:02:40.25#ibcon#about to read 4, iclass 34, count 2 2006.229.12:02:40.25#ibcon#read 4, iclass 34, count 2 2006.229.12:02:40.25#ibcon#about to read 5, iclass 34, count 2 2006.229.12:02:40.25#ibcon#read 5, iclass 34, count 2 2006.229.12:02:40.25#ibcon#about to read 6, iclass 34, count 2 2006.229.12:02:40.25#ibcon#read 6, iclass 34, count 2 2006.229.12:02:40.25#ibcon#end of sib2, iclass 34, count 2 2006.229.12:02:40.25#ibcon#*after write, iclass 34, count 2 2006.229.12:02:40.25#ibcon#*before return 0, iclass 34, count 2 2006.229.12:02:40.25#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:40.25#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:02:40.25#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.12:02:40.25#ibcon#ireg 7 cls_cnt 0 2006.229.12:02:40.25#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:40.37#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:40.37#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:40.37#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:02:40.37#ibcon#first serial, iclass 34, count 0 2006.229.12:02:40.37#ibcon#enter sib2, iclass 34, count 0 2006.229.12:02:40.37#ibcon#flushed, iclass 34, count 0 2006.229.12:02:40.37#ibcon#about to write, iclass 34, count 0 2006.229.12:02:40.37#ibcon#wrote, iclass 34, count 0 2006.229.12:02:40.37#ibcon#about to read 3, iclass 34, count 0 2006.229.12:02:40.39#ibcon#read 3, iclass 34, count 0 2006.229.12:02:40.39#ibcon#about to read 4, iclass 34, count 0 2006.229.12:02:40.39#ibcon#read 4, iclass 34, count 0 2006.229.12:02:40.39#ibcon#about to read 5, iclass 34, count 0 2006.229.12:02:40.39#ibcon#read 5, iclass 34, count 0 2006.229.12:02:40.39#ibcon#about to read 6, iclass 34, count 0 2006.229.12:02:40.39#ibcon#read 6, iclass 34, count 0 2006.229.12:02:40.39#ibcon#end of sib2, iclass 34, count 0 2006.229.12:02:40.39#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:02:40.39#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:02:40.39#ibcon#[27=USB\r\n] 2006.229.12:02:40.39#ibcon#*before write, iclass 34, count 0 2006.229.12:02:40.39#ibcon#enter sib2, iclass 34, count 0 2006.229.12:02:40.39#ibcon#flushed, iclass 34, count 0 2006.229.12:02:40.39#ibcon#about to write, iclass 34, count 0 2006.229.12:02:40.39#ibcon#wrote, iclass 34, count 0 2006.229.12:02:40.39#ibcon#about to read 3, iclass 34, count 0 2006.229.12:02:40.42#ibcon#read 3, iclass 34, count 0 2006.229.12:02:40.42#ibcon#about to read 4, iclass 34, count 0 2006.229.12:02:40.42#ibcon#read 4, iclass 34, count 0 2006.229.12:02:40.42#ibcon#about to read 5, iclass 34, count 0 2006.229.12:02:40.42#ibcon#read 5, iclass 34, count 0 2006.229.12:02:40.42#ibcon#about to read 6, iclass 34, count 0 2006.229.12:02:40.42#ibcon#read 6, iclass 34, count 0 2006.229.12:02:40.42#ibcon#end of sib2, iclass 34, count 0 2006.229.12:02:40.42#ibcon#*after write, iclass 34, count 0 2006.229.12:02:40.42#ibcon#*before return 0, iclass 34, count 0 2006.229.12:02:40.42#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:40.42#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:02:40.42#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:02:40.42#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:02:40.42$vck44/vabw=wide 2006.229.12:02:40.42#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:02:40.42#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:02:40.42#ibcon#ireg 8 cls_cnt 0 2006.229.12:02:40.42#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:40.42#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:40.42#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:40.42#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:02:40.42#ibcon#first serial, iclass 36, count 0 2006.229.12:02:40.42#ibcon#enter sib2, iclass 36, count 0 2006.229.12:02:40.42#ibcon#flushed, iclass 36, count 0 2006.229.12:02:40.42#ibcon#about to write, iclass 36, count 0 2006.229.12:02:40.42#ibcon#wrote, iclass 36, count 0 2006.229.12:02:40.42#ibcon#about to read 3, iclass 36, count 0 2006.229.12:02:40.44#ibcon#read 3, iclass 36, count 0 2006.229.12:02:40.44#ibcon#about to read 4, iclass 36, count 0 2006.229.12:02:40.44#ibcon#read 4, iclass 36, count 0 2006.229.12:02:40.44#ibcon#about to read 5, iclass 36, count 0 2006.229.12:02:40.44#ibcon#read 5, iclass 36, count 0 2006.229.12:02:40.44#ibcon#about to read 6, iclass 36, count 0 2006.229.12:02:40.44#ibcon#read 6, iclass 36, count 0 2006.229.12:02:40.44#ibcon#end of sib2, iclass 36, count 0 2006.229.12:02:40.44#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:02:40.44#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:02:40.44#ibcon#[25=BW32\r\n] 2006.229.12:02:40.44#ibcon#*before write, iclass 36, count 0 2006.229.12:02:40.44#ibcon#enter sib2, iclass 36, count 0 2006.229.12:02:40.44#ibcon#flushed, iclass 36, count 0 2006.229.12:02:40.44#ibcon#about to write, iclass 36, count 0 2006.229.12:02:40.44#ibcon#wrote, iclass 36, count 0 2006.229.12:02:40.44#ibcon#about to read 3, iclass 36, count 0 2006.229.12:02:40.47#ibcon#read 3, iclass 36, count 0 2006.229.12:02:40.47#ibcon#about to read 4, iclass 36, count 0 2006.229.12:02:40.47#ibcon#read 4, iclass 36, count 0 2006.229.12:02:40.47#ibcon#about to read 5, iclass 36, count 0 2006.229.12:02:40.47#ibcon#read 5, iclass 36, count 0 2006.229.12:02:40.47#ibcon#about to read 6, iclass 36, count 0 2006.229.12:02:40.47#ibcon#read 6, iclass 36, count 0 2006.229.12:02:40.47#ibcon#end of sib2, iclass 36, count 0 2006.229.12:02:40.47#ibcon#*after write, iclass 36, count 0 2006.229.12:02:40.47#ibcon#*before return 0, iclass 36, count 0 2006.229.12:02:40.47#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:40.47#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:02:40.47#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:02:40.47#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:02:40.47$vck44/vbbw=wide 2006.229.12:02:40.47#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:02:40.47#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:02:40.47#ibcon#ireg 8 cls_cnt 0 2006.229.12:02:40.47#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:02:40.54#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:02:40.54#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:02:40.54#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:02:40.54#ibcon#first serial, iclass 38, count 0 2006.229.12:02:40.54#ibcon#enter sib2, iclass 38, count 0 2006.229.12:02:40.54#ibcon#flushed, iclass 38, count 0 2006.229.12:02:40.54#ibcon#about to write, iclass 38, count 0 2006.229.12:02:40.54#ibcon#wrote, iclass 38, count 0 2006.229.12:02:40.54#ibcon#about to read 3, iclass 38, count 0 2006.229.12:02:40.56#ibcon#read 3, iclass 38, count 0 2006.229.12:02:40.56#ibcon#about to read 4, iclass 38, count 0 2006.229.12:02:40.56#ibcon#read 4, iclass 38, count 0 2006.229.12:02:40.56#ibcon#about to read 5, iclass 38, count 0 2006.229.12:02:40.56#ibcon#read 5, iclass 38, count 0 2006.229.12:02:40.56#ibcon#about to read 6, iclass 38, count 0 2006.229.12:02:40.56#ibcon#read 6, iclass 38, count 0 2006.229.12:02:40.56#ibcon#end of sib2, iclass 38, count 0 2006.229.12:02:40.56#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:02:40.56#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:02:40.56#ibcon#[27=BW32\r\n] 2006.229.12:02:40.56#ibcon#*before write, iclass 38, count 0 2006.229.12:02:40.56#ibcon#enter sib2, iclass 38, count 0 2006.229.12:02:40.56#ibcon#flushed, iclass 38, count 0 2006.229.12:02:40.56#ibcon#about to write, iclass 38, count 0 2006.229.12:02:40.56#ibcon#wrote, iclass 38, count 0 2006.229.12:02:40.56#ibcon#about to read 3, iclass 38, count 0 2006.229.12:02:40.59#ibcon#read 3, iclass 38, count 0 2006.229.12:02:40.59#ibcon#about to read 4, iclass 38, count 0 2006.229.12:02:40.59#ibcon#read 4, iclass 38, count 0 2006.229.12:02:40.59#ibcon#about to read 5, iclass 38, count 0 2006.229.12:02:40.59#ibcon#read 5, iclass 38, count 0 2006.229.12:02:40.59#ibcon#about to read 6, iclass 38, count 0 2006.229.12:02:40.59#ibcon#read 6, iclass 38, count 0 2006.229.12:02:40.59#ibcon#end of sib2, iclass 38, count 0 2006.229.12:02:40.59#ibcon#*after write, iclass 38, count 0 2006.229.12:02:40.59#ibcon#*before return 0, iclass 38, count 0 2006.229.12:02:40.59#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:02:40.59#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:02:40.59#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:02:40.59#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:02:40.59$setupk4/ifdk4 2006.229.12:02:40.59$ifdk4/lo= 2006.229.12:02:40.59$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:02:40.59$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:02:40.59$ifdk4/patch= 2006.229.12:02:40.59$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:02:40.59$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:02:40.59$setupk4/!*+20s 2006.229.12:02:43.47#abcon#<5=/04 1.7 3.4 27.811001002.3\r\n> 2006.229.12:02:43.49#abcon#{5=INTERFACE CLEAR} 2006.229.12:02:43.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:02:53.80#abcon#<5=/04 1.6 3.4 27.811001002.3\r\n> 2006.229.12:02:53.82#abcon#{5=INTERFACE CLEAR} 2006.229.12:02:53.88#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:02:55.10$setupk4/"tpicd 2006.229.12:02:55.10$setupk4/echo=off 2006.229.12:02:55.10$setupk4/xlog=off 2006.229.12:02:55.10:!2006.229.12:03:54 2006.229.12:03:03.13#trakl#Source acquired 2006.229.12:03:03.13#flagr#flagr/antenna,acquired 2006.229.12:03:54.00:preob 2006.229.12:03:55.13/onsource/TRACKING 2006.229.12:03:55.13:!2006.229.12:04:04 2006.229.12:04:04.00:"tape 2006.229.12:04:04.00:"st=record 2006.229.12:04:04.00:data_valid=on 2006.229.12:04:04.00:midob 2006.229.12:04:04.13/onsource/TRACKING 2006.229.12:04:04.13/wx/27.80,1002.3,100 2006.229.12:04:04.23/cable/+6.4074E-03 2006.229.12:04:05.32/va/01,08,usb,yes,29,31 2006.229.12:04:05.32/va/02,07,usb,yes,32,32 2006.229.12:04:05.32/va/03,06,usb,yes,39,42 2006.229.12:04:05.32/va/04,07,usb,yes,33,34 2006.229.12:04:05.32/va/05,04,usb,yes,29,29 2006.229.12:04:05.32/va/06,04,usb,yes,33,32 2006.229.12:04:05.32/va/07,05,usb,yes,29,29 2006.229.12:04:05.32/va/08,06,usb,yes,21,26 2006.229.12:04:05.55/valo/01,524.99,yes,locked 2006.229.12:04:05.55/valo/02,534.99,yes,locked 2006.229.12:04:05.55/valo/03,564.99,yes,locked 2006.229.12:04:05.55/valo/04,624.99,yes,locked 2006.229.12:04:05.55/valo/05,734.99,yes,locked 2006.229.12:04:05.55/valo/06,814.99,yes,locked 2006.229.12:04:05.55/valo/07,864.99,yes,locked 2006.229.12:04:05.55/valo/08,884.99,yes,locked 2006.229.12:04:06.64/vb/01,04,usb,yes,31,29 2006.229.12:04:06.64/vb/02,04,usb,yes,33,33 2006.229.12:04:06.64/vb/03,04,usb,yes,30,33 2006.229.12:04:06.64/vb/04,04,usb,yes,35,33 2006.229.12:04:06.64/vb/05,04,usb,yes,27,29 2006.229.12:04:06.64/vb/06,04,usb,yes,31,27 2006.229.12:04:06.64/vb/07,04,usb,yes,31,31 2006.229.12:04:06.64/vb/08,04,usb,yes,29,32 2006.229.12:04:06.88/vblo/01,629.99,yes,locked 2006.229.12:04:06.88/vblo/02,634.99,yes,locked 2006.229.12:04:06.88/vblo/03,649.99,yes,locked 2006.229.12:04:06.88/vblo/04,679.99,yes,locked 2006.229.12:04:06.88/vblo/05,709.99,yes,locked 2006.229.12:04:06.88/vblo/06,719.99,yes,locked 2006.229.12:04:06.88/vblo/07,734.99,yes,locked 2006.229.12:04:06.88/vblo/08,744.99,yes,locked 2006.229.12:04:07.03/vabw/8 2006.229.12:04:07.18/vbbw/8 2006.229.12:04:07.27/xfe/off,on,12.0 2006.229.12:04:07.66/ifatt/23,28,28,28 2006.229.12:04:08.08/fmout-gps/S +4.17E-07 2006.229.12:04:08.12:!2006.229.12:04:44 2006.229.12:04:44.00:data_valid=off 2006.229.12:04:44.00:"et 2006.229.12:04:44.00:!+3s 2006.229.12:04:47.01:"tape 2006.229.12:04:47.01:postob 2006.229.12:04:47.10/cable/+6.4076E-03 2006.229.12:04:47.10/wx/27.80,1002.3,100 2006.229.12:04:48.08/fmout-gps/S +4.17E-07 2006.229.12:04:48.08:scan_name=229-1206,jd0608,40 2006.229.12:04:48.08:source=1954-388,195800.00,-384506.4,2000.0,cw 2006.229.12:04:49.14#flagr#flagr/antenna,new-source 2006.229.12:04:49.14:checkk5 2006.229.12:04:49.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:04:49.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:04:50.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:04:50.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:04:51.15/chk_obsdata//k5ts1/T2291204??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:04:51.54/chk_obsdata//k5ts2/T2291204??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:04:51.95/chk_obsdata//k5ts3/T2291204??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:04:52.36/chk_obsdata//k5ts4/T2291204??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:04:53.08/k5log//k5ts1_log_newline 2006.229.12:04:53.78/k5log//k5ts2_log_newline 2006.229.12:04:54.51/k5log//k5ts3_log_newline 2006.229.12:04:55.21/k5log//k5ts4_log_newline 2006.229.12:04:55.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:04:55.24:setupk4=1 2006.229.12:04:55.24$setupk4/echo=on 2006.229.12:04:55.24$setupk4/pcalon 2006.229.12:04:55.24$pcalon/"no phase cal control is implemented here 2006.229.12:04:55.24$setupk4/"tpicd=stop 2006.229.12:04:55.24$setupk4/"rec=synch_on 2006.229.12:04:55.24$setupk4/"rec_mode=128 2006.229.12:04:55.24$setupk4/!* 2006.229.12:04:55.24$setupk4/recpk4 2006.229.12:04:55.24$recpk4/recpatch= 2006.229.12:04:55.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:04:55.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:04:55.24$setupk4/vck44 2006.229.12:04:55.24$vck44/valo=1,524.99 2006.229.12:04:55.24#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.12:04:55.24#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.12:04:55.24#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:55.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:55.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:55.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:55.24#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:04:55.24#ibcon#first serial, iclass 23, count 0 2006.229.12:04:55.24#ibcon#enter sib2, iclass 23, count 0 2006.229.12:04:55.24#ibcon#flushed, iclass 23, count 0 2006.229.12:04:55.24#ibcon#about to write, iclass 23, count 0 2006.229.12:04:55.24#ibcon#wrote, iclass 23, count 0 2006.229.12:04:55.24#ibcon#about to read 3, iclass 23, count 0 2006.229.12:04:55.26#ibcon#read 3, iclass 23, count 0 2006.229.12:04:55.26#ibcon#about to read 4, iclass 23, count 0 2006.229.12:04:55.26#ibcon#read 4, iclass 23, count 0 2006.229.12:04:55.26#ibcon#about to read 5, iclass 23, count 0 2006.229.12:04:55.26#ibcon#read 5, iclass 23, count 0 2006.229.12:04:55.26#ibcon#about to read 6, iclass 23, count 0 2006.229.12:04:55.26#ibcon#read 6, iclass 23, count 0 2006.229.12:04:55.26#ibcon#end of sib2, iclass 23, count 0 2006.229.12:04:55.26#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:04:55.26#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:04:55.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:04:55.26#ibcon#*before write, iclass 23, count 0 2006.229.12:04:55.26#ibcon#enter sib2, iclass 23, count 0 2006.229.12:04:55.26#ibcon#flushed, iclass 23, count 0 2006.229.12:04:55.26#ibcon#about to write, iclass 23, count 0 2006.229.12:04:55.26#ibcon#wrote, iclass 23, count 0 2006.229.12:04:55.26#ibcon#about to read 3, iclass 23, count 0 2006.229.12:04:55.31#ibcon#read 3, iclass 23, count 0 2006.229.12:04:55.31#ibcon#about to read 4, iclass 23, count 0 2006.229.12:04:55.31#ibcon#read 4, iclass 23, count 0 2006.229.12:04:55.31#ibcon#about to read 5, iclass 23, count 0 2006.229.12:04:55.31#ibcon#read 5, iclass 23, count 0 2006.229.12:04:55.31#ibcon#about to read 6, iclass 23, count 0 2006.229.12:04:55.31#ibcon#read 6, iclass 23, count 0 2006.229.12:04:55.31#ibcon#end of sib2, iclass 23, count 0 2006.229.12:04:55.31#ibcon#*after write, iclass 23, count 0 2006.229.12:04:55.31#ibcon#*before return 0, iclass 23, count 0 2006.229.12:04:55.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:55.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:55.31#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:04:55.31#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:04:55.31$vck44/va=1,8 2006.229.12:04:55.31#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.12:04:55.31#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.12:04:55.31#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:55.31#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:55.31#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:55.31#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:55.31#ibcon#enter wrdev, iclass 25, count 2 2006.229.12:04:55.31#ibcon#first serial, iclass 25, count 2 2006.229.12:04:55.31#ibcon#enter sib2, iclass 25, count 2 2006.229.12:04:55.31#ibcon#flushed, iclass 25, count 2 2006.229.12:04:55.31#ibcon#about to write, iclass 25, count 2 2006.229.12:04:55.31#ibcon#wrote, iclass 25, count 2 2006.229.12:04:55.31#ibcon#about to read 3, iclass 25, count 2 2006.229.12:04:55.33#ibcon#read 3, iclass 25, count 2 2006.229.12:04:55.33#ibcon#about to read 4, iclass 25, count 2 2006.229.12:04:55.33#ibcon#read 4, iclass 25, count 2 2006.229.12:04:55.33#ibcon#about to read 5, iclass 25, count 2 2006.229.12:04:55.33#ibcon#read 5, iclass 25, count 2 2006.229.12:04:55.33#ibcon#about to read 6, iclass 25, count 2 2006.229.12:04:55.33#ibcon#read 6, iclass 25, count 2 2006.229.12:04:55.33#ibcon#end of sib2, iclass 25, count 2 2006.229.12:04:55.33#ibcon#*mode == 0, iclass 25, count 2 2006.229.12:04:55.33#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.12:04:55.33#ibcon#[25=AT01-08\r\n] 2006.229.12:04:55.33#ibcon#*before write, iclass 25, count 2 2006.229.12:04:55.33#ibcon#enter sib2, iclass 25, count 2 2006.229.12:04:55.33#ibcon#flushed, iclass 25, count 2 2006.229.12:04:55.33#ibcon#about to write, iclass 25, count 2 2006.229.12:04:55.33#ibcon#wrote, iclass 25, count 2 2006.229.12:04:55.33#ibcon#about to read 3, iclass 25, count 2 2006.229.12:04:55.36#ibcon#read 3, iclass 25, count 2 2006.229.12:04:55.36#ibcon#about to read 4, iclass 25, count 2 2006.229.12:04:55.36#ibcon#read 4, iclass 25, count 2 2006.229.12:04:55.36#ibcon#about to read 5, iclass 25, count 2 2006.229.12:04:55.36#ibcon#read 5, iclass 25, count 2 2006.229.12:04:55.36#ibcon#about to read 6, iclass 25, count 2 2006.229.12:04:55.36#ibcon#read 6, iclass 25, count 2 2006.229.12:04:55.36#ibcon#end of sib2, iclass 25, count 2 2006.229.12:04:55.36#ibcon#*after write, iclass 25, count 2 2006.229.12:04:55.36#ibcon#*before return 0, iclass 25, count 2 2006.229.12:04:55.36#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:55.36#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:55.36#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.12:04:55.36#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:55.36#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:55.48#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:55.48#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:55.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:04:55.48#ibcon#first serial, iclass 25, count 0 2006.229.12:04:55.48#ibcon#enter sib2, iclass 25, count 0 2006.229.12:04:55.48#ibcon#flushed, iclass 25, count 0 2006.229.12:04:55.48#ibcon#about to write, iclass 25, count 0 2006.229.12:04:55.48#ibcon#wrote, iclass 25, count 0 2006.229.12:04:55.48#ibcon#about to read 3, iclass 25, count 0 2006.229.12:04:55.50#ibcon#read 3, iclass 25, count 0 2006.229.12:04:55.50#ibcon#about to read 4, iclass 25, count 0 2006.229.12:04:55.50#ibcon#read 4, iclass 25, count 0 2006.229.12:04:55.50#ibcon#about to read 5, iclass 25, count 0 2006.229.12:04:55.50#ibcon#read 5, iclass 25, count 0 2006.229.12:04:55.50#ibcon#about to read 6, iclass 25, count 0 2006.229.12:04:55.50#ibcon#read 6, iclass 25, count 0 2006.229.12:04:55.50#ibcon#end of sib2, iclass 25, count 0 2006.229.12:04:55.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:04:55.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:04:55.50#ibcon#[25=USB\r\n] 2006.229.12:04:55.50#ibcon#*before write, iclass 25, count 0 2006.229.12:04:55.50#ibcon#enter sib2, iclass 25, count 0 2006.229.12:04:55.50#ibcon#flushed, iclass 25, count 0 2006.229.12:04:55.50#ibcon#about to write, iclass 25, count 0 2006.229.12:04:55.50#ibcon#wrote, iclass 25, count 0 2006.229.12:04:55.50#ibcon#about to read 3, iclass 25, count 0 2006.229.12:04:55.53#ibcon#read 3, iclass 25, count 0 2006.229.12:04:55.53#ibcon#about to read 4, iclass 25, count 0 2006.229.12:04:55.53#ibcon#read 4, iclass 25, count 0 2006.229.12:04:55.53#ibcon#about to read 5, iclass 25, count 0 2006.229.12:04:55.53#ibcon#read 5, iclass 25, count 0 2006.229.12:04:55.53#ibcon#about to read 6, iclass 25, count 0 2006.229.12:04:55.53#ibcon#read 6, iclass 25, count 0 2006.229.12:04:55.53#ibcon#end of sib2, iclass 25, count 0 2006.229.12:04:55.53#ibcon#*after write, iclass 25, count 0 2006.229.12:04:55.53#ibcon#*before return 0, iclass 25, count 0 2006.229.12:04:55.53#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:55.53#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:55.53#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:04:55.53#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:04:55.53$vck44/valo=2,534.99 2006.229.12:04:55.53#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.12:04:55.53#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.12:04:55.53#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:55.53#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:55.53#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:55.53#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:55.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:04:55.53#ibcon#first serial, iclass 27, count 0 2006.229.12:04:55.53#ibcon#enter sib2, iclass 27, count 0 2006.229.12:04:55.53#ibcon#flushed, iclass 27, count 0 2006.229.12:04:55.53#ibcon#about to write, iclass 27, count 0 2006.229.12:04:55.53#ibcon#wrote, iclass 27, count 0 2006.229.12:04:55.53#ibcon#about to read 3, iclass 27, count 0 2006.229.12:04:55.55#ibcon#read 3, iclass 27, count 0 2006.229.12:04:55.55#ibcon#about to read 4, iclass 27, count 0 2006.229.12:04:55.55#ibcon#read 4, iclass 27, count 0 2006.229.12:04:55.55#ibcon#about to read 5, iclass 27, count 0 2006.229.12:04:55.55#ibcon#read 5, iclass 27, count 0 2006.229.12:04:55.55#ibcon#about to read 6, iclass 27, count 0 2006.229.12:04:55.55#ibcon#read 6, iclass 27, count 0 2006.229.12:04:55.55#ibcon#end of sib2, iclass 27, count 0 2006.229.12:04:55.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:04:55.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:04:55.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:04:55.55#ibcon#*before write, iclass 27, count 0 2006.229.12:04:55.55#ibcon#enter sib2, iclass 27, count 0 2006.229.12:04:55.55#ibcon#flushed, iclass 27, count 0 2006.229.12:04:55.55#ibcon#about to write, iclass 27, count 0 2006.229.12:04:55.55#ibcon#wrote, iclass 27, count 0 2006.229.12:04:55.55#ibcon#about to read 3, iclass 27, count 0 2006.229.12:04:55.59#ibcon#read 3, iclass 27, count 0 2006.229.12:04:55.59#ibcon#about to read 4, iclass 27, count 0 2006.229.12:04:55.59#ibcon#read 4, iclass 27, count 0 2006.229.12:04:55.59#ibcon#about to read 5, iclass 27, count 0 2006.229.12:04:55.59#ibcon#read 5, iclass 27, count 0 2006.229.12:04:55.59#ibcon#about to read 6, iclass 27, count 0 2006.229.12:04:55.59#ibcon#read 6, iclass 27, count 0 2006.229.12:04:55.59#ibcon#end of sib2, iclass 27, count 0 2006.229.12:04:55.59#ibcon#*after write, iclass 27, count 0 2006.229.12:04:55.59#ibcon#*before return 0, iclass 27, count 0 2006.229.12:04:55.59#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:55.59#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:55.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:04:55.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:04:55.59$vck44/va=2,7 2006.229.12:04:55.59#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.12:04:55.59#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.12:04:55.59#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:55.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:55.65#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:55.65#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:55.65#ibcon#enter wrdev, iclass 29, count 2 2006.229.12:04:55.65#ibcon#first serial, iclass 29, count 2 2006.229.12:04:55.65#ibcon#enter sib2, iclass 29, count 2 2006.229.12:04:55.65#ibcon#flushed, iclass 29, count 2 2006.229.12:04:55.65#ibcon#about to write, iclass 29, count 2 2006.229.12:04:55.65#ibcon#wrote, iclass 29, count 2 2006.229.12:04:55.65#ibcon#about to read 3, iclass 29, count 2 2006.229.12:04:55.67#ibcon#read 3, iclass 29, count 2 2006.229.12:04:55.67#ibcon#about to read 4, iclass 29, count 2 2006.229.12:04:55.67#ibcon#read 4, iclass 29, count 2 2006.229.12:04:55.67#ibcon#about to read 5, iclass 29, count 2 2006.229.12:04:55.67#ibcon#read 5, iclass 29, count 2 2006.229.12:04:55.67#ibcon#about to read 6, iclass 29, count 2 2006.229.12:04:55.67#ibcon#read 6, iclass 29, count 2 2006.229.12:04:55.67#ibcon#end of sib2, iclass 29, count 2 2006.229.12:04:55.67#ibcon#*mode == 0, iclass 29, count 2 2006.229.12:04:55.67#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.12:04:55.67#ibcon#[25=AT02-07\r\n] 2006.229.12:04:55.67#ibcon#*before write, iclass 29, count 2 2006.229.12:04:55.67#ibcon#enter sib2, iclass 29, count 2 2006.229.12:04:55.67#ibcon#flushed, iclass 29, count 2 2006.229.12:04:55.67#ibcon#about to write, iclass 29, count 2 2006.229.12:04:55.67#ibcon#wrote, iclass 29, count 2 2006.229.12:04:55.67#ibcon#about to read 3, iclass 29, count 2 2006.229.12:04:55.70#ibcon#read 3, iclass 29, count 2 2006.229.12:04:55.70#ibcon#about to read 4, iclass 29, count 2 2006.229.12:04:55.70#ibcon#read 4, iclass 29, count 2 2006.229.12:04:55.70#ibcon#about to read 5, iclass 29, count 2 2006.229.12:04:55.70#ibcon#read 5, iclass 29, count 2 2006.229.12:04:55.70#ibcon#about to read 6, iclass 29, count 2 2006.229.12:04:55.70#ibcon#read 6, iclass 29, count 2 2006.229.12:04:55.70#ibcon#end of sib2, iclass 29, count 2 2006.229.12:04:55.70#ibcon#*after write, iclass 29, count 2 2006.229.12:04:55.70#ibcon#*before return 0, iclass 29, count 2 2006.229.12:04:55.70#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:55.70#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:55.70#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.12:04:55.70#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:55.70#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:55.82#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:55.82#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:55.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:04:55.82#ibcon#first serial, iclass 29, count 0 2006.229.12:04:55.82#ibcon#enter sib2, iclass 29, count 0 2006.229.12:04:55.82#ibcon#flushed, iclass 29, count 0 2006.229.12:04:55.82#ibcon#about to write, iclass 29, count 0 2006.229.12:04:55.82#ibcon#wrote, iclass 29, count 0 2006.229.12:04:55.82#ibcon#about to read 3, iclass 29, count 0 2006.229.12:04:55.84#ibcon#read 3, iclass 29, count 0 2006.229.12:04:55.84#ibcon#about to read 4, iclass 29, count 0 2006.229.12:04:55.84#ibcon#read 4, iclass 29, count 0 2006.229.12:04:55.84#ibcon#about to read 5, iclass 29, count 0 2006.229.12:04:55.84#ibcon#read 5, iclass 29, count 0 2006.229.12:04:55.84#ibcon#about to read 6, iclass 29, count 0 2006.229.12:04:55.84#ibcon#read 6, iclass 29, count 0 2006.229.12:04:55.84#ibcon#end of sib2, iclass 29, count 0 2006.229.12:04:55.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:04:55.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:04:55.84#ibcon#[25=USB\r\n] 2006.229.12:04:55.84#ibcon#*before write, iclass 29, count 0 2006.229.12:04:55.84#ibcon#enter sib2, iclass 29, count 0 2006.229.12:04:55.84#ibcon#flushed, iclass 29, count 0 2006.229.12:04:55.84#ibcon#about to write, iclass 29, count 0 2006.229.12:04:55.84#ibcon#wrote, iclass 29, count 0 2006.229.12:04:55.84#ibcon#about to read 3, iclass 29, count 0 2006.229.12:04:55.84#abcon#<5=/04 1.6 3.1 27.801001002.3\r\n> 2006.229.12:04:55.86#abcon#{5=INTERFACE CLEAR} 2006.229.12:04:55.87#ibcon#read 3, iclass 29, count 0 2006.229.12:04:55.87#ibcon#about to read 4, iclass 29, count 0 2006.229.12:04:55.87#ibcon#read 4, iclass 29, count 0 2006.229.12:04:55.87#ibcon#about to read 5, iclass 29, count 0 2006.229.12:04:55.87#ibcon#read 5, iclass 29, count 0 2006.229.12:04:55.87#ibcon#about to read 6, iclass 29, count 0 2006.229.12:04:55.87#ibcon#read 6, iclass 29, count 0 2006.229.12:04:55.87#ibcon#end of sib2, iclass 29, count 0 2006.229.12:04:55.87#ibcon#*after write, iclass 29, count 0 2006.229.12:04:55.87#ibcon#*before return 0, iclass 29, count 0 2006.229.12:04:55.87#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:55.87#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:55.87#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:04:55.87#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:04:55.87$vck44/valo=3,564.99 2006.229.12:04:55.87#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.12:04:55.87#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.12:04:55.87#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:55.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:04:55.87#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:04:55.87#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:04:55.87#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:04:55.87#ibcon#first serial, iclass 34, count 0 2006.229.12:04:55.87#ibcon#enter sib2, iclass 34, count 0 2006.229.12:04:55.87#ibcon#flushed, iclass 34, count 0 2006.229.12:04:55.87#ibcon#about to write, iclass 34, count 0 2006.229.12:04:55.87#ibcon#wrote, iclass 34, count 0 2006.229.12:04:55.87#ibcon#about to read 3, iclass 34, count 0 2006.229.12:04:55.89#ibcon#read 3, iclass 34, count 0 2006.229.12:04:55.89#ibcon#about to read 4, iclass 34, count 0 2006.229.12:04:55.89#ibcon#read 4, iclass 34, count 0 2006.229.12:04:55.89#ibcon#about to read 5, iclass 34, count 0 2006.229.12:04:55.89#ibcon#read 5, iclass 34, count 0 2006.229.12:04:55.89#ibcon#about to read 6, iclass 34, count 0 2006.229.12:04:55.89#ibcon#read 6, iclass 34, count 0 2006.229.12:04:55.89#ibcon#end of sib2, iclass 34, count 0 2006.229.12:04:55.89#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:04:55.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:04:55.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:04:55.89#ibcon#*before write, iclass 34, count 0 2006.229.12:04:55.89#ibcon#enter sib2, iclass 34, count 0 2006.229.12:04:55.89#ibcon#flushed, iclass 34, count 0 2006.229.12:04:55.89#ibcon#about to write, iclass 34, count 0 2006.229.12:04:55.89#ibcon#wrote, iclass 34, count 0 2006.229.12:04:55.89#ibcon#about to read 3, iclass 34, count 0 2006.229.12:04:55.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:04:55.93#ibcon#read 3, iclass 34, count 0 2006.229.12:04:55.93#ibcon#about to read 4, iclass 34, count 0 2006.229.12:04:55.93#ibcon#read 4, iclass 34, count 0 2006.229.12:04:55.93#ibcon#about to read 5, iclass 34, count 0 2006.229.12:04:55.93#ibcon#read 5, iclass 34, count 0 2006.229.12:04:55.93#ibcon#about to read 6, iclass 34, count 0 2006.229.12:04:55.93#ibcon#read 6, iclass 34, count 0 2006.229.12:04:55.93#ibcon#end of sib2, iclass 34, count 0 2006.229.12:04:55.93#ibcon#*after write, iclass 34, count 0 2006.229.12:04:55.93#ibcon#*before return 0, iclass 34, count 0 2006.229.12:04:55.93#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:04:55.93#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:04:55.93#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:04:55.93#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:04:55.93$vck44/va=3,6 2006.229.12:04:55.93#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.12:04:55.93#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.12:04:55.93#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:55.93#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:55.99#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:55.99#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:55.99#ibcon#enter wrdev, iclass 37, count 2 2006.229.12:04:55.99#ibcon#first serial, iclass 37, count 2 2006.229.12:04:55.99#ibcon#enter sib2, iclass 37, count 2 2006.229.12:04:55.99#ibcon#flushed, iclass 37, count 2 2006.229.12:04:55.99#ibcon#about to write, iclass 37, count 2 2006.229.12:04:55.99#ibcon#wrote, iclass 37, count 2 2006.229.12:04:55.99#ibcon#about to read 3, iclass 37, count 2 2006.229.12:04:56.01#ibcon#read 3, iclass 37, count 2 2006.229.12:04:56.01#ibcon#about to read 4, iclass 37, count 2 2006.229.12:04:56.01#ibcon#read 4, iclass 37, count 2 2006.229.12:04:56.01#ibcon#about to read 5, iclass 37, count 2 2006.229.12:04:56.01#ibcon#read 5, iclass 37, count 2 2006.229.12:04:56.01#ibcon#about to read 6, iclass 37, count 2 2006.229.12:04:56.01#ibcon#read 6, iclass 37, count 2 2006.229.12:04:56.01#ibcon#end of sib2, iclass 37, count 2 2006.229.12:04:56.01#ibcon#*mode == 0, iclass 37, count 2 2006.229.12:04:56.01#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.12:04:56.01#ibcon#[25=AT03-06\r\n] 2006.229.12:04:56.01#ibcon#*before write, iclass 37, count 2 2006.229.12:04:56.01#ibcon#enter sib2, iclass 37, count 2 2006.229.12:04:56.01#ibcon#flushed, iclass 37, count 2 2006.229.12:04:56.01#ibcon#about to write, iclass 37, count 2 2006.229.12:04:56.01#ibcon#wrote, iclass 37, count 2 2006.229.12:04:56.01#ibcon#about to read 3, iclass 37, count 2 2006.229.12:04:56.04#ibcon#read 3, iclass 37, count 2 2006.229.12:04:56.04#ibcon#about to read 4, iclass 37, count 2 2006.229.12:04:56.04#ibcon#read 4, iclass 37, count 2 2006.229.12:04:56.04#ibcon#about to read 5, iclass 37, count 2 2006.229.12:04:56.04#ibcon#read 5, iclass 37, count 2 2006.229.12:04:56.04#ibcon#about to read 6, iclass 37, count 2 2006.229.12:04:56.04#ibcon#read 6, iclass 37, count 2 2006.229.12:04:56.04#ibcon#end of sib2, iclass 37, count 2 2006.229.12:04:56.04#ibcon#*after write, iclass 37, count 2 2006.229.12:04:56.04#ibcon#*before return 0, iclass 37, count 2 2006.229.12:04:56.04#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:56.04#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:56.04#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.12:04:56.04#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:56.04#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:56.16#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:56.16#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:56.16#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:04:56.16#ibcon#first serial, iclass 37, count 0 2006.229.12:04:56.16#ibcon#enter sib2, iclass 37, count 0 2006.229.12:04:56.16#ibcon#flushed, iclass 37, count 0 2006.229.12:04:56.16#ibcon#about to write, iclass 37, count 0 2006.229.12:04:56.16#ibcon#wrote, iclass 37, count 0 2006.229.12:04:56.16#ibcon#about to read 3, iclass 37, count 0 2006.229.12:04:56.18#ibcon#read 3, iclass 37, count 0 2006.229.12:04:56.18#ibcon#about to read 4, iclass 37, count 0 2006.229.12:04:56.18#ibcon#read 4, iclass 37, count 0 2006.229.12:04:56.18#ibcon#about to read 5, iclass 37, count 0 2006.229.12:04:56.18#ibcon#read 5, iclass 37, count 0 2006.229.12:04:56.18#ibcon#about to read 6, iclass 37, count 0 2006.229.12:04:56.18#ibcon#read 6, iclass 37, count 0 2006.229.12:04:56.18#ibcon#end of sib2, iclass 37, count 0 2006.229.12:04:56.18#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:04:56.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:04:56.18#ibcon#[25=USB\r\n] 2006.229.12:04:56.18#ibcon#*before write, iclass 37, count 0 2006.229.12:04:56.18#ibcon#enter sib2, iclass 37, count 0 2006.229.12:04:56.18#ibcon#flushed, iclass 37, count 0 2006.229.12:04:56.18#ibcon#about to write, iclass 37, count 0 2006.229.12:04:56.18#ibcon#wrote, iclass 37, count 0 2006.229.12:04:56.18#ibcon#about to read 3, iclass 37, count 0 2006.229.12:04:56.21#ibcon#read 3, iclass 37, count 0 2006.229.12:04:56.21#ibcon#about to read 4, iclass 37, count 0 2006.229.12:04:56.21#ibcon#read 4, iclass 37, count 0 2006.229.12:04:56.21#ibcon#about to read 5, iclass 37, count 0 2006.229.12:04:56.21#ibcon#read 5, iclass 37, count 0 2006.229.12:04:56.21#ibcon#about to read 6, iclass 37, count 0 2006.229.12:04:56.21#ibcon#read 6, iclass 37, count 0 2006.229.12:04:56.21#ibcon#end of sib2, iclass 37, count 0 2006.229.12:04:56.21#ibcon#*after write, iclass 37, count 0 2006.229.12:04:56.21#ibcon#*before return 0, iclass 37, count 0 2006.229.12:04:56.21#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:56.21#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:56.21#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:04:56.21#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:04:56.21$vck44/valo=4,624.99 2006.229.12:04:56.21#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.12:04:56.21#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.12:04:56.21#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:56.21#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:56.21#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:56.21#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:56.21#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:04:56.21#ibcon#first serial, iclass 39, count 0 2006.229.12:04:56.21#ibcon#enter sib2, iclass 39, count 0 2006.229.12:04:56.21#ibcon#flushed, iclass 39, count 0 2006.229.12:04:56.21#ibcon#about to write, iclass 39, count 0 2006.229.12:04:56.21#ibcon#wrote, iclass 39, count 0 2006.229.12:04:56.21#ibcon#about to read 3, iclass 39, count 0 2006.229.12:04:56.23#ibcon#read 3, iclass 39, count 0 2006.229.12:04:56.23#ibcon#about to read 4, iclass 39, count 0 2006.229.12:04:56.23#ibcon#read 4, iclass 39, count 0 2006.229.12:04:56.23#ibcon#about to read 5, iclass 39, count 0 2006.229.12:04:56.23#ibcon#read 5, iclass 39, count 0 2006.229.12:04:56.23#ibcon#about to read 6, iclass 39, count 0 2006.229.12:04:56.23#ibcon#read 6, iclass 39, count 0 2006.229.12:04:56.23#ibcon#end of sib2, iclass 39, count 0 2006.229.12:04:56.23#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:04:56.23#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:04:56.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:04:56.23#ibcon#*before write, iclass 39, count 0 2006.229.12:04:56.23#ibcon#enter sib2, iclass 39, count 0 2006.229.12:04:56.23#ibcon#flushed, iclass 39, count 0 2006.229.12:04:56.23#ibcon#about to write, iclass 39, count 0 2006.229.12:04:56.23#ibcon#wrote, iclass 39, count 0 2006.229.12:04:56.23#ibcon#about to read 3, iclass 39, count 0 2006.229.12:04:56.27#ibcon#read 3, iclass 39, count 0 2006.229.12:04:56.27#ibcon#about to read 4, iclass 39, count 0 2006.229.12:04:56.27#ibcon#read 4, iclass 39, count 0 2006.229.12:04:56.27#ibcon#about to read 5, iclass 39, count 0 2006.229.12:04:56.27#ibcon#read 5, iclass 39, count 0 2006.229.12:04:56.27#ibcon#about to read 6, iclass 39, count 0 2006.229.12:04:56.27#ibcon#read 6, iclass 39, count 0 2006.229.12:04:56.27#ibcon#end of sib2, iclass 39, count 0 2006.229.12:04:56.27#ibcon#*after write, iclass 39, count 0 2006.229.12:04:56.27#ibcon#*before return 0, iclass 39, count 0 2006.229.12:04:56.27#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:56.27#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:56.27#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:04:56.27#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:04:56.27$vck44/va=4,7 2006.229.12:04:56.27#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.12:04:56.27#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.12:04:56.27#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:56.27#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:56.33#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:56.33#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:56.33#ibcon#enter wrdev, iclass 3, count 2 2006.229.12:04:56.33#ibcon#first serial, iclass 3, count 2 2006.229.12:04:56.33#ibcon#enter sib2, iclass 3, count 2 2006.229.12:04:56.33#ibcon#flushed, iclass 3, count 2 2006.229.12:04:56.33#ibcon#about to write, iclass 3, count 2 2006.229.12:04:56.33#ibcon#wrote, iclass 3, count 2 2006.229.12:04:56.33#ibcon#about to read 3, iclass 3, count 2 2006.229.12:04:56.35#ibcon#read 3, iclass 3, count 2 2006.229.12:04:56.35#ibcon#about to read 4, iclass 3, count 2 2006.229.12:04:56.35#ibcon#read 4, iclass 3, count 2 2006.229.12:04:56.35#ibcon#about to read 5, iclass 3, count 2 2006.229.12:04:56.35#ibcon#read 5, iclass 3, count 2 2006.229.12:04:56.35#ibcon#about to read 6, iclass 3, count 2 2006.229.12:04:56.35#ibcon#read 6, iclass 3, count 2 2006.229.12:04:56.35#ibcon#end of sib2, iclass 3, count 2 2006.229.12:04:56.35#ibcon#*mode == 0, iclass 3, count 2 2006.229.12:04:56.35#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.12:04:56.35#ibcon#[25=AT04-07\r\n] 2006.229.12:04:56.35#ibcon#*before write, iclass 3, count 2 2006.229.12:04:56.35#ibcon#enter sib2, iclass 3, count 2 2006.229.12:04:56.35#ibcon#flushed, iclass 3, count 2 2006.229.12:04:56.35#ibcon#about to write, iclass 3, count 2 2006.229.12:04:56.35#ibcon#wrote, iclass 3, count 2 2006.229.12:04:56.35#ibcon#about to read 3, iclass 3, count 2 2006.229.12:04:56.38#ibcon#read 3, iclass 3, count 2 2006.229.12:04:56.38#ibcon#about to read 4, iclass 3, count 2 2006.229.12:04:56.38#ibcon#read 4, iclass 3, count 2 2006.229.12:04:56.38#ibcon#about to read 5, iclass 3, count 2 2006.229.12:04:56.38#ibcon#read 5, iclass 3, count 2 2006.229.12:04:56.38#ibcon#about to read 6, iclass 3, count 2 2006.229.12:04:56.38#ibcon#read 6, iclass 3, count 2 2006.229.12:04:56.41#ibcon#end of sib2, iclass 3, count 2 2006.229.12:04:56.41#ibcon#*after write, iclass 3, count 2 2006.229.12:04:56.41#ibcon#*before return 0, iclass 3, count 2 2006.229.12:04:56.41#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:56.41#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:56.41#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.12:04:56.41#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:56.41#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:56.53#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:56.53#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:56.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:04:56.53#ibcon#first serial, iclass 3, count 0 2006.229.12:04:56.53#ibcon#enter sib2, iclass 3, count 0 2006.229.12:04:56.53#ibcon#flushed, iclass 3, count 0 2006.229.12:04:56.53#ibcon#about to write, iclass 3, count 0 2006.229.12:04:56.53#ibcon#wrote, iclass 3, count 0 2006.229.12:04:56.53#ibcon#about to read 3, iclass 3, count 0 2006.229.12:04:56.55#ibcon#read 3, iclass 3, count 0 2006.229.12:04:56.55#ibcon#about to read 4, iclass 3, count 0 2006.229.12:04:56.55#ibcon#read 4, iclass 3, count 0 2006.229.12:04:56.55#ibcon#about to read 5, iclass 3, count 0 2006.229.12:04:56.55#ibcon#read 5, iclass 3, count 0 2006.229.12:04:56.55#ibcon#about to read 6, iclass 3, count 0 2006.229.12:04:56.55#ibcon#read 6, iclass 3, count 0 2006.229.12:04:56.55#ibcon#end of sib2, iclass 3, count 0 2006.229.12:04:56.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:04:56.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:04:56.55#ibcon#[25=USB\r\n] 2006.229.12:04:56.55#ibcon#*before write, iclass 3, count 0 2006.229.12:04:56.55#ibcon#enter sib2, iclass 3, count 0 2006.229.12:04:56.55#ibcon#flushed, iclass 3, count 0 2006.229.12:04:56.55#ibcon#about to write, iclass 3, count 0 2006.229.12:04:56.55#ibcon#wrote, iclass 3, count 0 2006.229.12:04:56.55#ibcon#about to read 3, iclass 3, count 0 2006.229.12:04:56.58#ibcon#read 3, iclass 3, count 0 2006.229.12:04:56.58#ibcon#about to read 4, iclass 3, count 0 2006.229.12:04:56.58#ibcon#read 4, iclass 3, count 0 2006.229.12:04:56.58#ibcon#about to read 5, iclass 3, count 0 2006.229.12:04:56.58#ibcon#read 5, iclass 3, count 0 2006.229.12:04:56.58#ibcon#about to read 6, iclass 3, count 0 2006.229.12:04:56.58#ibcon#read 6, iclass 3, count 0 2006.229.12:04:56.58#ibcon#end of sib2, iclass 3, count 0 2006.229.12:04:56.58#ibcon#*after write, iclass 3, count 0 2006.229.12:04:56.58#ibcon#*before return 0, iclass 3, count 0 2006.229.12:04:56.58#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:56.58#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:56.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:04:56.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:04:56.58$vck44/valo=5,734.99 2006.229.12:04:56.58#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.12:04:56.58#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.12:04:56.58#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:56.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:56.58#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:56.58#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:56.58#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:04:56.58#ibcon#first serial, iclass 5, count 0 2006.229.12:04:56.58#ibcon#enter sib2, iclass 5, count 0 2006.229.12:04:56.58#ibcon#flushed, iclass 5, count 0 2006.229.12:04:56.58#ibcon#about to write, iclass 5, count 0 2006.229.12:04:56.58#ibcon#wrote, iclass 5, count 0 2006.229.12:04:56.58#ibcon#about to read 3, iclass 5, count 0 2006.229.12:04:56.60#ibcon#read 3, iclass 5, count 0 2006.229.12:04:56.60#ibcon#about to read 4, iclass 5, count 0 2006.229.12:04:56.60#ibcon#read 4, iclass 5, count 0 2006.229.12:04:56.60#ibcon#about to read 5, iclass 5, count 0 2006.229.12:04:56.60#ibcon#read 5, iclass 5, count 0 2006.229.12:04:56.60#ibcon#about to read 6, iclass 5, count 0 2006.229.12:04:56.60#ibcon#read 6, iclass 5, count 0 2006.229.12:04:56.60#ibcon#end of sib2, iclass 5, count 0 2006.229.12:04:56.60#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:04:56.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:04:56.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:04:56.60#ibcon#*before write, iclass 5, count 0 2006.229.12:04:56.60#ibcon#enter sib2, iclass 5, count 0 2006.229.12:04:56.60#ibcon#flushed, iclass 5, count 0 2006.229.12:04:56.60#ibcon#about to write, iclass 5, count 0 2006.229.12:04:56.60#ibcon#wrote, iclass 5, count 0 2006.229.12:04:56.60#ibcon#about to read 3, iclass 5, count 0 2006.229.12:04:56.64#ibcon#read 3, iclass 5, count 0 2006.229.12:04:56.64#ibcon#about to read 4, iclass 5, count 0 2006.229.12:04:56.64#ibcon#read 4, iclass 5, count 0 2006.229.12:04:56.64#ibcon#about to read 5, iclass 5, count 0 2006.229.12:04:56.64#ibcon#read 5, iclass 5, count 0 2006.229.12:04:56.64#ibcon#about to read 6, iclass 5, count 0 2006.229.12:04:56.64#ibcon#read 6, iclass 5, count 0 2006.229.12:04:56.64#ibcon#end of sib2, iclass 5, count 0 2006.229.12:04:56.64#ibcon#*after write, iclass 5, count 0 2006.229.12:04:56.64#ibcon#*before return 0, iclass 5, count 0 2006.229.12:04:56.64#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:56.64#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:56.64#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:04:56.64#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:04:56.64$vck44/va=5,4 2006.229.12:04:56.64#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.12:04:56.64#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.12:04:56.64#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:56.64#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:56.70#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:56.70#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:56.70#ibcon#enter wrdev, iclass 7, count 2 2006.229.12:04:56.70#ibcon#first serial, iclass 7, count 2 2006.229.12:04:56.70#ibcon#enter sib2, iclass 7, count 2 2006.229.12:04:56.70#ibcon#flushed, iclass 7, count 2 2006.229.12:04:56.70#ibcon#about to write, iclass 7, count 2 2006.229.12:04:56.70#ibcon#wrote, iclass 7, count 2 2006.229.12:04:56.70#ibcon#about to read 3, iclass 7, count 2 2006.229.12:04:56.72#ibcon#read 3, iclass 7, count 2 2006.229.12:04:56.72#ibcon#about to read 4, iclass 7, count 2 2006.229.12:04:56.72#ibcon#read 4, iclass 7, count 2 2006.229.12:04:56.72#ibcon#about to read 5, iclass 7, count 2 2006.229.12:04:56.72#ibcon#read 5, iclass 7, count 2 2006.229.12:04:56.72#ibcon#about to read 6, iclass 7, count 2 2006.229.12:04:56.72#ibcon#read 6, iclass 7, count 2 2006.229.12:04:56.72#ibcon#end of sib2, iclass 7, count 2 2006.229.12:04:56.72#ibcon#*mode == 0, iclass 7, count 2 2006.229.12:04:56.72#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.12:04:56.72#ibcon#[25=AT05-04\r\n] 2006.229.12:04:56.72#ibcon#*before write, iclass 7, count 2 2006.229.12:04:56.72#ibcon#enter sib2, iclass 7, count 2 2006.229.12:04:56.72#ibcon#flushed, iclass 7, count 2 2006.229.12:04:56.72#ibcon#about to write, iclass 7, count 2 2006.229.12:04:56.72#ibcon#wrote, iclass 7, count 2 2006.229.12:04:56.72#ibcon#about to read 3, iclass 7, count 2 2006.229.12:04:56.75#ibcon#read 3, iclass 7, count 2 2006.229.12:04:56.75#ibcon#about to read 4, iclass 7, count 2 2006.229.12:04:56.75#ibcon#read 4, iclass 7, count 2 2006.229.12:04:56.75#ibcon#about to read 5, iclass 7, count 2 2006.229.12:04:56.75#ibcon#read 5, iclass 7, count 2 2006.229.12:04:56.75#ibcon#about to read 6, iclass 7, count 2 2006.229.12:04:56.75#ibcon#read 6, iclass 7, count 2 2006.229.12:04:56.75#ibcon#end of sib2, iclass 7, count 2 2006.229.12:04:56.75#ibcon#*after write, iclass 7, count 2 2006.229.12:04:56.75#ibcon#*before return 0, iclass 7, count 2 2006.229.12:04:56.75#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:56.75#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:56.75#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.12:04:56.75#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:56.75#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:56.87#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:56.87#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:56.87#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:04:56.87#ibcon#first serial, iclass 7, count 0 2006.229.12:04:56.87#ibcon#enter sib2, iclass 7, count 0 2006.229.12:04:56.87#ibcon#flushed, iclass 7, count 0 2006.229.12:04:56.87#ibcon#about to write, iclass 7, count 0 2006.229.12:04:56.87#ibcon#wrote, iclass 7, count 0 2006.229.12:04:56.87#ibcon#about to read 3, iclass 7, count 0 2006.229.12:04:56.89#ibcon#read 3, iclass 7, count 0 2006.229.12:04:56.89#ibcon#about to read 4, iclass 7, count 0 2006.229.12:04:56.89#ibcon#read 4, iclass 7, count 0 2006.229.12:04:56.89#ibcon#about to read 5, iclass 7, count 0 2006.229.12:04:56.89#ibcon#read 5, iclass 7, count 0 2006.229.12:04:56.89#ibcon#about to read 6, iclass 7, count 0 2006.229.12:04:56.89#ibcon#read 6, iclass 7, count 0 2006.229.12:04:56.89#ibcon#end of sib2, iclass 7, count 0 2006.229.12:04:56.89#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:04:56.89#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:04:56.89#ibcon#[25=USB\r\n] 2006.229.12:04:56.89#ibcon#*before write, iclass 7, count 0 2006.229.12:04:56.89#ibcon#enter sib2, iclass 7, count 0 2006.229.12:04:56.89#ibcon#flushed, iclass 7, count 0 2006.229.12:04:56.89#ibcon#about to write, iclass 7, count 0 2006.229.12:04:56.89#ibcon#wrote, iclass 7, count 0 2006.229.12:04:56.89#ibcon#about to read 3, iclass 7, count 0 2006.229.12:04:56.92#ibcon#read 3, iclass 7, count 0 2006.229.12:04:56.92#ibcon#about to read 4, iclass 7, count 0 2006.229.12:04:56.92#ibcon#read 4, iclass 7, count 0 2006.229.12:04:56.92#ibcon#about to read 5, iclass 7, count 0 2006.229.12:04:56.92#ibcon#read 5, iclass 7, count 0 2006.229.12:04:56.92#ibcon#about to read 6, iclass 7, count 0 2006.229.12:04:56.92#ibcon#read 6, iclass 7, count 0 2006.229.12:04:56.92#ibcon#end of sib2, iclass 7, count 0 2006.229.12:04:56.92#ibcon#*after write, iclass 7, count 0 2006.229.12:04:56.92#ibcon#*before return 0, iclass 7, count 0 2006.229.12:04:56.92#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:56.92#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:56.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:04:56.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:04:56.92$vck44/valo=6,814.99 2006.229.12:04:56.92#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:04:56.92#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:04:56.92#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:56.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:56.92#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:56.92#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:56.92#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:04:56.92#ibcon#first serial, iclass 11, count 0 2006.229.12:04:56.92#ibcon#enter sib2, iclass 11, count 0 2006.229.12:04:56.92#ibcon#flushed, iclass 11, count 0 2006.229.12:04:56.92#ibcon#about to write, iclass 11, count 0 2006.229.12:04:56.92#ibcon#wrote, iclass 11, count 0 2006.229.12:04:56.92#ibcon#about to read 3, iclass 11, count 0 2006.229.12:04:56.94#ibcon#read 3, iclass 11, count 0 2006.229.12:04:56.94#ibcon#about to read 4, iclass 11, count 0 2006.229.12:04:56.94#ibcon#read 4, iclass 11, count 0 2006.229.12:04:56.94#ibcon#about to read 5, iclass 11, count 0 2006.229.12:04:56.94#ibcon#read 5, iclass 11, count 0 2006.229.12:04:56.94#ibcon#about to read 6, iclass 11, count 0 2006.229.12:04:56.94#ibcon#read 6, iclass 11, count 0 2006.229.12:04:56.94#ibcon#end of sib2, iclass 11, count 0 2006.229.12:04:56.94#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:04:56.94#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:04:56.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:04:56.94#ibcon#*before write, iclass 11, count 0 2006.229.12:04:56.94#ibcon#enter sib2, iclass 11, count 0 2006.229.12:04:56.94#ibcon#flushed, iclass 11, count 0 2006.229.12:04:56.94#ibcon#about to write, iclass 11, count 0 2006.229.12:04:56.94#ibcon#wrote, iclass 11, count 0 2006.229.12:04:56.94#ibcon#about to read 3, iclass 11, count 0 2006.229.12:04:56.98#ibcon#read 3, iclass 11, count 0 2006.229.12:04:56.98#ibcon#about to read 4, iclass 11, count 0 2006.229.12:04:56.98#ibcon#read 4, iclass 11, count 0 2006.229.12:04:56.98#ibcon#about to read 5, iclass 11, count 0 2006.229.12:04:56.98#ibcon#read 5, iclass 11, count 0 2006.229.12:04:56.98#ibcon#about to read 6, iclass 11, count 0 2006.229.12:04:56.98#ibcon#read 6, iclass 11, count 0 2006.229.12:04:56.98#ibcon#end of sib2, iclass 11, count 0 2006.229.12:04:56.98#ibcon#*after write, iclass 11, count 0 2006.229.12:04:56.98#ibcon#*before return 0, iclass 11, count 0 2006.229.12:04:56.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:56.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:56.98#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:04:56.98#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:04:56.98$vck44/va=6,4 2006.229.12:04:56.98#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.12:04:56.98#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.12:04:56.98#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:56.98#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:04:57.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:04:57.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:04:57.04#ibcon#enter wrdev, iclass 13, count 2 2006.229.12:04:57.04#ibcon#first serial, iclass 13, count 2 2006.229.12:04:57.04#ibcon#enter sib2, iclass 13, count 2 2006.229.12:04:57.04#ibcon#flushed, iclass 13, count 2 2006.229.12:04:57.04#ibcon#about to write, iclass 13, count 2 2006.229.12:04:57.04#ibcon#wrote, iclass 13, count 2 2006.229.12:04:57.04#ibcon#about to read 3, iclass 13, count 2 2006.229.12:04:57.06#ibcon#read 3, iclass 13, count 2 2006.229.12:04:57.06#ibcon#about to read 4, iclass 13, count 2 2006.229.12:04:57.06#ibcon#read 4, iclass 13, count 2 2006.229.12:04:57.06#ibcon#about to read 5, iclass 13, count 2 2006.229.12:04:57.06#ibcon#read 5, iclass 13, count 2 2006.229.12:04:57.06#ibcon#about to read 6, iclass 13, count 2 2006.229.12:04:57.06#ibcon#read 6, iclass 13, count 2 2006.229.12:04:57.06#ibcon#end of sib2, iclass 13, count 2 2006.229.12:04:57.06#ibcon#*mode == 0, iclass 13, count 2 2006.229.12:04:57.06#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.12:04:57.06#ibcon#[25=AT06-04\r\n] 2006.229.12:04:57.06#ibcon#*before write, iclass 13, count 2 2006.229.12:04:57.06#ibcon#enter sib2, iclass 13, count 2 2006.229.12:04:57.06#ibcon#flushed, iclass 13, count 2 2006.229.12:04:57.06#ibcon#about to write, iclass 13, count 2 2006.229.12:04:57.06#ibcon#wrote, iclass 13, count 2 2006.229.12:04:57.06#ibcon#about to read 3, iclass 13, count 2 2006.229.12:04:57.09#ibcon#read 3, iclass 13, count 2 2006.229.12:04:57.09#ibcon#about to read 4, iclass 13, count 2 2006.229.12:04:57.09#ibcon#read 4, iclass 13, count 2 2006.229.12:04:57.09#ibcon#about to read 5, iclass 13, count 2 2006.229.12:04:57.09#ibcon#read 5, iclass 13, count 2 2006.229.12:04:57.09#ibcon#about to read 6, iclass 13, count 2 2006.229.12:04:57.09#ibcon#read 6, iclass 13, count 2 2006.229.12:04:57.09#ibcon#end of sib2, iclass 13, count 2 2006.229.12:04:57.09#ibcon#*after write, iclass 13, count 2 2006.229.12:04:57.09#ibcon#*before return 0, iclass 13, count 2 2006.229.12:04:57.09#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:04:57.09#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:04:57.09#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.12:04:57.09#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:57.09#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:04:57.21#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:04:57.21#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:04:57.21#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:04:57.21#ibcon#first serial, iclass 13, count 0 2006.229.12:04:57.21#ibcon#enter sib2, iclass 13, count 0 2006.229.12:04:57.21#ibcon#flushed, iclass 13, count 0 2006.229.12:04:57.21#ibcon#about to write, iclass 13, count 0 2006.229.12:04:57.21#ibcon#wrote, iclass 13, count 0 2006.229.12:04:57.21#ibcon#about to read 3, iclass 13, count 0 2006.229.12:04:57.23#ibcon#read 3, iclass 13, count 0 2006.229.12:04:57.23#ibcon#about to read 4, iclass 13, count 0 2006.229.12:04:57.23#ibcon#read 4, iclass 13, count 0 2006.229.12:04:57.23#ibcon#about to read 5, iclass 13, count 0 2006.229.12:04:57.23#ibcon#read 5, iclass 13, count 0 2006.229.12:04:57.23#ibcon#about to read 6, iclass 13, count 0 2006.229.12:04:57.23#ibcon#read 6, iclass 13, count 0 2006.229.12:04:57.23#ibcon#end of sib2, iclass 13, count 0 2006.229.12:04:57.23#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:04:57.23#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:04:57.23#ibcon#[25=USB\r\n] 2006.229.12:04:57.23#ibcon#*before write, iclass 13, count 0 2006.229.12:04:57.23#ibcon#enter sib2, iclass 13, count 0 2006.229.12:04:57.23#ibcon#flushed, iclass 13, count 0 2006.229.12:04:57.23#ibcon#about to write, iclass 13, count 0 2006.229.12:04:57.23#ibcon#wrote, iclass 13, count 0 2006.229.12:04:57.23#ibcon#about to read 3, iclass 13, count 0 2006.229.12:04:57.26#ibcon#read 3, iclass 13, count 0 2006.229.12:04:57.26#ibcon#about to read 4, iclass 13, count 0 2006.229.12:04:57.26#ibcon#read 4, iclass 13, count 0 2006.229.12:04:57.26#ibcon#about to read 5, iclass 13, count 0 2006.229.12:04:57.26#ibcon#read 5, iclass 13, count 0 2006.229.12:04:57.26#ibcon#about to read 6, iclass 13, count 0 2006.229.12:04:57.26#ibcon#read 6, iclass 13, count 0 2006.229.12:04:57.26#ibcon#end of sib2, iclass 13, count 0 2006.229.12:04:57.26#ibcon#*after write, iclass 13, count 0 2006.229.12:04:57.26#ibcon#*before return 0, iclass 13, count 0 2006.229.12:04:57.26#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:04:57.26#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:04:57.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:04:57.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:04:57.26$vck44/valo=7,864.99 2006.229.12:04:57.26#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.12:04:57.26#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.12:04:57.26#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:57.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:04:57.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:04:57.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:04:57.26#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:04:57.26#ibcon#first serial, iclass 15, count 0 2006.229.12:04:57.26#ibcon#enter sib2, iclass 15, count 0 2006.229.12:04:57.26#ibcon#flushed, iclass 15, count 0 2006.229.12:04:57.26#ibcon#about to write, iclass 15, count 0 2006.229.12:04:57.26#ibcon#wrote, iclass 15, count 0 2006.229.12:04:57.26#ibcon#about to read 3, iclass 15, count 0 2006.229.12:04:57.28#ibcon#read 3, iclass 15, count 0 2006.229.12:04:57.28#ibcon#about to read 4, iclass 15, count 0 2006.229.12:04:57.28#ibcon#read 4, iclass 15, count 0 2006.229.12:04:57.28#ibcon#about to read 5, iclass 15, count 0 2006.229.12:04:57.28#ibcon#read 5, iclass 15, count 0 2006.229.12:04:57.28#ibcon#about to read 6, iclass 15, count 0 2006.229.12:04:57.28#ibcon#read 6, iclass 15, count 0 2006.229.12:04:57.28#ibcon#end of sib2, iclass 15, count 0 2006.229.12:04:57.28#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:04:57.28#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:04:57.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:04:57.28#ibcon#*before write, iclass 15, count 0 2006.229.12:04:57.28#ibcon#enter sib2, iclass 15, count 0 2006.229.12:04:57.28#ibcon#flushed, iclass 15, count 0 2006.229.12:04:57.28#ibcon#about to write, iclass 15, count 0 2006.229.12:04:57.28#ibcon#wrote, iclass 15, count 0 2006.229.12:04:57.28#ibcon#about to read 3, iclass 15, count 0 2006.229.12:04:57.32#ibcon#read 3, iclass 15, count 0 2006.229.12:04:57.32#ibcon#about to read 4, iclass 15, count 0 2006.229.12:04:57.32#ibcon#read 4, iclass 15, count 0 2006.229.12:04:57.32#ibcon#about to read 5, iclass 15, count 0 2006.229.12:04:57.32#ibcon#read 5, iclass 15, count 0 2006.229.12:04:57.32#ibcon#about to read 6, iclass 15, count 0 2006.229.12:04:57.32#ibcon#read 6, iclass 15, count 0 2006.229.12:04:57.32#ibcon#end of sib2, iclass 15, count 0 2006.229.12:04:57.32#ibcon#*after write, iclass 15, count 0 2006.229.12:04:57.32#ibcon#*before return 0, iclass 15, count 0 2006.229.12:04:57.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:04:57.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:04:57.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:04:57.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:04:57.32$vck44/va=7,5 2006.229.12:04:57.32#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.12:04:57.32#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.12:04:57.32#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:57.32#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:04:57.38#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:04:57.38#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:04:57.38#ibcon#enter wrdev, iclass 17, count 2 2006.229.12:04:57.38#ibcon#first serial, iclass 17, count 2 2006.229.12:04:57.38#ibcon#enter sib2, iclass 17, count 2 2006.229.12:04:57.38#ibcon#flushed, iclass 17, count 2 2006.229.12:04:57.38#ibcon#about to write, iclass 17, count 2 2006.229.12:04:57.38#ibcon#wrote, iclass 17, count 2 2006.229.12:04:57.38#ibcon#about to read 3, iclass 17, count 2 2006.229.12:04:57.40#ibcon#read 3, iclass 17, count 2 2006.229.12:04:57.40#ibcon#about to read 4, iclass 17, count 2 2006.229.12:04:57.40#ibcon#read 4, iclass 17, count 2 2006.229.12:04:57.40#ibcon#about to read 5, iclass 17, count 2 2006.229.12:04:57.40#ibcon#read 5, iclass 17, count 2 2006.229.12:04:57.40#ibcon#about to read 6, iclass 17, count 2 2006.229.12:04:57.40#ibcon#read 6, iclass 17, count 2 2006.229.12:04:57.40#ibcon#end of sib2, iclass 17, count 2 2006.229.12:04:57.40#ibcon#*mode == 0, iclass 17, count 2 2006.229.12:04:57.40#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.12:04:57.40#ibcon#[25=AT07-05\r\n] 2006.229.12:04:57.40#ibcon#*before write, iclass 17, count 2 2006.229.12:04:57.40#ibcon#enter sib2, iclass 17, count 2 2006.229.12:04:57.40#ibcon#flushed, iclass 17, count 2 2006.229.12:04:57.40#ibcon#about to write, iclass 17, count 2 2006.229.12:04:57.40#ibcon#wrote, iclass 17, count 2 2006.229.12:04:57.40#ibcon#about to read 3, iclass 17, count 2 2006.229.12:04:57.43#ibcon#read 3, iclass 17, count 2 2006.229.12:04:57.43#ibcon#about to read 4, iclass 17, count 2 2006.229.12:04:57.43#ibcon#read 4, iclass 17, count 2 2006.229.12:04:57.43#ibcon#about to read 5, iclass 17, count 2 2006.229.12:04:57.43#ibcon#read 5, iclass 17, count 2 2006.229.12:04:57.43#ibcon#about to read 6, iclass 17, count 2 2006.229.12:04:57.43#ibcon#read 6, iclass 17, count 2 2006.229.12:04:57.43#ibcon#end of sib2, iclass 17, count 2 2006.229.12:04:57.43#ibcon#*after write, iclass 17, count 2 2006.229.12:04:57.43#ibcon#*before return 0, iclass 17, count 2 2006.229.12:04:57.43#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:04:57.43#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:04:57.43#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.12:04:57.43#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:57.43#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:04:57.55#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:04:57.55#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:04:57.55#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:04:57.55#ibcon#first serial, iclass 17, count 0 2006.229.12:04:57.55#ibcon#enter sib2, iclass 17, count 0 2006.229.12:04:57.55#ibcon#flushed, iclass 17, count 0 2006.229.12:04:57.55#ibcon#about to write, iclass 17, count 0 2006.229.12:04:57.55#ibcon#wrote, iclass 17, count 0 2006.229.12:04:57.55#ibcon#about to read 3, iclass 17, count 0 2006.229.12:04:57.57#ibcon#read 3, iclass 17, count 0 2006.229.12:04:57.57#ibcon#about to read 4, iclass 17, count 0 2006.229.12:04:57.57#ibcon#read 4, iclass 17, count 0 2006.229.12:04:57.57#ibcon#about to read 5, iclass 17, count 0 2006.229.12:04:57.57#ibcon#read 5, iclass 17, count 0 2006.229.12:04:57.57#ibcon#about to read 6, iclass 17, count 0 2006.229.12:04:57.57#ibcon#read 6, iclass 17, count 0 2006.229.12:04:57.57#ibcon#end of sib2, iclass 17, count 0 2006.229.12:04:57.57#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:04:57.57#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:04:57.57#ibcon#[25=USB\r\n] 2006.229.12:04:57.57#ibcon#*before write, iclass 17, count 0 2006.229.12:04:57.57#ibcon#enter sib2, iclass 17, count 0 2006.229.12:04:57.57#ibcon#flushed, iclass 17, count 0 2006.229.12:04:57.57#ibcon#about to write, iclass 17, count 0 2006.229.12:04:57.57#ibcon#wrote, iclass 17, count 0 2006.229.12:04:57.57#ibcon#about to read 3, iclass 17, count 0 2006.229.12:04:57.60#ibcon#read 3, iclass 17, count 0 2006.229.12:04:57.60#ibcon#about to read 4, iclass 17, count 0 2006.229.12:04:57.60#ibcon#read 4, iclass 17, count 0 2006.229.12:04:57.60#ibcon#about to read 5, iclass 17, count 0 2006.229.12:04:57.60#ibcon#read 5, iclass 17, count 0 2006.229.12:04:57.60#ibcon#about to read 6, iclass 17, count 0 2006.229.12:04:57.60#ibcon#read 6, iclass 17, count 0 2006.229.12:04:57.60#ibcon#end of sib2, iclass 17, count 0 2006.229.12:04:57.60#ibcon#*after write, iclass 17, count 0 2006.229.12:04:57.60#ibcon#*before return 0, iclass 17, count 0 2006.229.12:04:57.60#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:04:57.60#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:04:57.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:04:57.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:04:57.60$vck44/valo=8,884.99 2006.229.12:04:57.60#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:04:57.60#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:04:57.60#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:57.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:04:57.60#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:04:57.60#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:04:57.60#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:04:57.60#ibcon#first serial, iclass 19, count 0 2006.229.12:04:57.60#ibcon#enter sib2, iclass 19, count 0 2006.229.12:04:57.60#ibcon#flushed, iclass 19, count 0 2006.229.12:04:57.60#ibcon#about to write, iclass 19, count 0 2006.229.12:04:57.60#ibcon#wrote, iclass 19, count 0 2006.229.12:04:57.60#ibcon#about to read 3, iclass 19, count 0 2006.229.12:04:57.62#ibcon#read 3, iclass 19, count 0 2006.229.12:04:57.62#ibcon#about to read 4, iclass 19, count 0 2006.229.12:04:57.62#ibcon#read 4, iclass 19, count 0 2006.229.12:04:57.62#ibcon#about to read 5, iclass 19, count 0 2006.229.12:04:57.62#ibcon#read 5, iclass 19, count 0 2006.229.12:04:57.62#ibcon#about to read 6, iclass 19, count 0 2006.229.12:04:57.62#ibcon#read 6, iclass 19, count 0 2006.229.12:04:57.62#ibcon#end of sib2, iclass 19, count 0 2006.229.12:04:57.62#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:04:57.62#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:04:57.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:04:57.62#ibcon#*before write, iclass 19, count 0 2006.229.12:04:57.62#ibcon#enter sib2, iclass 19, count 0 2006.229.12:04:57.62#ibcon#flushed, iclass 19, count 0 2006.229.12:04:57.62#ibcon#about to write, iclass 19, count 0 2006.229.12:04:57.62#ibcon#wrote, iclass 19, count 0 2006.229.12:04:57.62#ibcon#about to read 3, iclass 19, count 0 2006.229.12:04:57.66#ibcon#read 3, iclass 19, count 0 2006.229.12:04:57.66#ibcon#about to read 4, iclass 19, count 0 2006.229.12:04:57.66#ibcon#read 4, iclass 19, count 0 2006.229.12:04:57.66#ibcon#about to read 5, iclass 19, count 0 2006.229.12:04:57.66#ibcon#read 5, iclass 19, count 0 2006.229.12:04:57.66#ibcon#about to read 6, iclass 19, count 0 2006.229.12:04:57.66#ibcon#read 6, iclass 19, count 0 2006.229.12:04:57.66#ibcon#end of sib2, iclass 19, count 0 2006.229.12:04:57.66#ibcon#*after write, iclass 19, count 0 2006.229.12:04:57.66#ibcon#*before return 0, iclass 19, count 0 2006.229.12:04:57.66#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:04:57.66#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:04:57.66#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:04:57.66#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:04:57.66$vck44/va=8,6 2006.229.12:04:57.66#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.12:04:57.66#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.12:04:57.66#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:57.66#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:04:57.72#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:04:57.72#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:04:57.72#ibcon#enter wrdev, iclass 21, count 2 2006.229.12:04:57.72#ibcon#first serial, iclass 21, count 2 2006.229.12:04:57.72#ibcon#enter sib2, iclass 21, count 2 2006.229.12:04:57.72#ibcon#flushed, iclass 21, count 2 2006.229.12:04:57.72#ibcon#about to write, iclass 21, count 2 2006.229.12:04:57.72#ibcon#wrote, iclass 21, count 2 2006.229.12:04:57.72#ibcon#about to read 3, iclass 21, count 2 2006.229.12:04:57.74#ibcon#read 3, iclass 21, count 2 2006.229.12:04:57.74#ibcon#about to read 4, iclass 21, count 2 2006.229.12:04:57.74#ibcon#read 4, iclass 21, count 2 2006.229.12:04:57.74#ibcon#about to read 5, iclass 21, count 2 2006.229.12:04:57.74#ibcon#read 5, iclass 21, count 2 2006.229.12:04:57.74#ibcon#about to read 6, iclass 21, count 2 2006.229.12:04:57.74#ibcon#read 6, iclass 21, count 2 2006.229.12:04:57.74#ibcon#end of sib2, iclass 21, count 2 2006.229.12:04:57.74#ibcon#*mode == 0, iclass 21, count 2 2006.229.12:04:57.74#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.12:04:57.74#ibcon#[25=AT08-06\r\n] 2006.229.12:04:57.74#ibcon#*before write, iclass 21, count 2 2006.229.12:04:57.74#ibcon#enter sib2, iclass 21, count 2 2006.229.12:04:57.74#ibcon#flushed, iclass 21, count 2 2006.229.12:04:57.74#ibcon#about to write, iclass 21, count 2 2006.229.12:04:57.74#ibcon#wrote, iclass 21, count 2 2006.229.12:04:57.74#ibcon#about to read 3, iclass 21, count 2 2006.229.12:04:57.77#ibcon#read 3, iclass 21, count 2 2006.229.12:04:57.77#ibcon#about to read 4, iclass 21, count 2 2006.229.12:04:57.77#ibcon#read 4, iclass 21, count 2 2006.229.12:04:57.77#ibcon#about to read 5, iclass 21, count 2 2006.229.12:04:57.77#ibcon#read 5, iclass 21, count 2 2006.229.12:04:57.77#ibcon#about to read 6, iclass 21, count 2 2006.229.12:04:57.77#ibcon#read 6, iclass 21, count 2 2006.229.12:04:57.77#ibcon#end of sib2, iclass 21, count 2 2006.229.12:04:57.77#ibcon#*after write, iclass 21, count 2 2006.229.12:04:57.77#ibcon#*before return 0, iclass 21, count 2 2006.229.12:04:57.77#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:04:57.77#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:04:57.77#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.12:04:57.77#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:57.77#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:04:57.89#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:04:57.89#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:04:57.89#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:04:57.89#ibcon#first serial, iclass 21, count 0 2006.229.12:04:57.89#ibcon#enter sib2, iclass 21, count 0 2006.229.12:04:57.89#ibcon#flushed, iclass 21, count 0 2006.229.12:04:57.89#ibcon#about to write, iclass 21, count 0 2006.229.12:04:57.89#ibcon#wrote, iclass 21, count 0 2006.229.12:04:57.89#ibcon#about to read 3, iclass 21, count 0 2006.229.12:04:57.91#ibcon#read 3, iclass 21, count 0 2006.229.12:04:57.91#ibcon#about to read 4, iclass 21, count 0 2006.229.12:04:57.91#ibcon#read 4, iclass 21, count 0 2006.229.12:04:57.91#ibcon#about to read 5, iclass 21, count 0 2006.229.12:04:57.91#ibcon#read 5, iclass 21, count 0 2006.229.12:04:57.91#ibcon#about to read 6, iclass 21, count 0 2006.229.12:04:57.91#ibcon#read 6, iclass 21, count 0 2006.229.12:04:57.91#ibcon#end of sib2, iclass 21, count 0 2006.229.12:04:57.91#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:04:57.91#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:04:57.91#ibcon#[25=USB\r\n] 2006.229.12:04:57.91#ibcon#*before write, iclass 21, count 0 2006.229.12:04:57.91#ibcon#enter sib2, iclass 21, count 0 2006.229.12:04:57.91#ibcon#flushed, iclass 21, count 0 2006.229.12:04:57.91#ibcon#about to write, iclass 21, count 0 2006.229.12:04:57.91#ibcon#wrote, iclass 21, count 0 2006.229.12:04:57.91#ibcon#about to read 3, iclass 21, count 0 2006.229.12:04:57.94#ibcon#read 3, iclass 21, count 0 2006.229.12:04:57.94#ibcon#about to read 4, iclass 21, count 0 2006.229.12:04:57.94#ibcon#read 4, iclass 21, count 0 2006.229.12:04:57.94#ibcon#about to read 5, iclass 21, count 0 2006.229.12:04:57.94#ibcon#read 5, iclass 21, count 0 2006.229.12:04:57.94#ibcon#about to read 6, iclass 21, count 0 2006.229.12:04:57.94#ibcon#read 6, iclass 21, count 0 2006.229.12:04:57.94#ibcon#end of sib2, iclass 21, count 0 2006.229.12:04:57.94#ibcon#*after write, iclass 21, count 0 2006.229.12:04:57.94#ibcon#*before return 0, iclass 21, count 0 2006.229.12:04:57.94#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:04:57.94#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:04:57.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:04:57.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:04:57.94$vck44/vblo=1,629.99 2006.229.12:04:57.94#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.12:04:57.94#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.12:04:57.94#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:57.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:57.94#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:57.94#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:57.94#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:04:57.94#ibcon#first serial, iclass 23, count 0 2006.229.12:04:57.94#ibcon#enter sib2, iclass 23, count 0 2006.229.12:04:57.94#ibcon#flushed, iclass 23, count 0 2006.229.12:04:57.94#ibcon#about to write, iclass 23, count 0 2006.229.12:04:57.94#ibcon#wrote, iclass 23, count 0 2006.229.12:04:57.94#ibcon#about to read 3, iclass 23, count 0 2006.229.12:04:57.96#ibcon#read 3, iclass 23, count 0 2006.229.12:04:57.96#ibcon#about to read 4, iclass 23, count 0 2006.229.12:04:57.96#ibcon#read 4, iclass 23, count 0 2006.229.12:04:57.96#ibcon#about to read 5, iclass 23, count 0 2006.229.12:04:57.96#ibcon#read 5, iclass 23, count 0 2006.229.12:04:57.96#ibcon#about to read 6, iclass 23, count 0 2006.229.12:04:57.96#ibcon#read 6, iclass 23, count 0 2006.229.12:04:57.96#ibcon#end of sib2, iclass 23, count 0 2006.229.12:04:57.96#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:04:57.96#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:04:57.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:04:57.96#ibcon#*before write, iclass 23, count 0 2006.229.12:04:57.96#ibcon#enter sib2, iclass 23, count 0 2006.229.12:04:57.96#ibcon#flushed, iclass 23, count 0 2006.229.12:04:57.96#ibcon#about to write, iclass 23, count 0 2006.229.12:04:57.96#ibcon#wrote, iclass 23, count 0 2006.229.12:04:57.96#ibcon#about to read 3, iclass 23, count 0 2006.229.12:04:58.00#ibcon#read 3, iclass 23, count 0 2006.229.12:04:58.00#ibcon#about to read 4, iclass 23, count 0 2006.229.12:04:58.00#ibcon#read 4, iclass 23, count 0 2006.229.12:04:58.00#ibcon#about to read 5, iclass 23, count 0 2006.229.12:04:58.00#ibcon#read 5, iclass 23, count 0 2006.229.12:04:58.00#ibcon#about to read 6, iclass 23, count 0 2006.229.12:04:58.00#ibcon#read 6, iclass 23, count 0 2006.229.12:04:58.00#ibcon#end of sib2, iclass 23, count 0 2006.229.12:04:58.00#ibcon#*after write, iclass 23, count 0 2006.229.12:04:58.00#ibcon#*before return 0, iclass 23, count 0 2006.229.12:04:58.00#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:58.00#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:04:58.00#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:04:58.00#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:04:58.00$vck44/vb=1,4 2006.229.12:04:58.00#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.12:04:58.00#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.12:04:58.00#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:58.00#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:58.00#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:58.00#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:58.00#ibcon#enter wrdev, iclass 25, count 2 2006.229.12:04:58.00#ibcon#first serial, iclass 25, count 2 2006.229.12:04:58.00#ibcon#enter sib2, iclass 25, count 2 2006.229.12:04:58.00#ibcon#flushed, iclass 25, count 2 2006.229.12:04:58.00#ibcon#about to write, iclass 25, count 2 2006.229.12:04:58.00#ibcon#wrote, iclass 25, count 2 2006.229.12:04:58.00#ibcon#about to read 3, iclass 25, count 2 2006.229.12:04:58.02#ibcon#read 3, iclass 25, count 2 2006.229.12:04:58.02#ibcon#about to read 4, iclass 25, count 2 2006.229.12:04:58.02#ibcon#read 4, iclass 25, count 2 2006.229.12:04:58.02#ibcon#about to read 5, iclass 25, count 2 2006.229.12:04:58.02#ibcon#read 5, iclass 25, count 2 2006.229.12:04:58.02#ibcon#about to read 6, iclass 25, count 2 2006.229.12:04:58.02#ibcon#read 6, iclass 25, count 2 2006.229.12:04:58.02#ibcon#end of sib2, iclass 25, count 2 2006.229.12:04:58.02#ibcon#*mode == 0, iclass 25, count 2 2006.229.12:04:58.02#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.12:04:58.02#ibcon#[27=AT01-04\r\n] 2006.229.12:04:58.02#ibcon#*before write, iclass 25, count 2 2006.229.12:04:58.02#ibcon#enter sib2, iclass 25, count 2 2006.229.12:04:58.02#ibcon#flushed, iclass 25, count 2 2006.229.12:04:58.02#ibcon#about to write, iclass 25, count 2 2006.229.12:04:58.02#ibcon#wrote, iclass 25, count 2 2006.229.12:04:58.02#ibcon#about to read 3, iclass 25, count 2 2006.229.12:04:58.05#ibcon#read 3, iclass 25, count 2 2006.229.12:04:58.05#ibcon#about to read 4, iclass 25, count 2 2006.229.12:04:58.05#ibcon#read 4, iclass 25, count 2 2006.229.12:04:58.05#ibcon#about to read 5, iclass 25, count 2 2006.229.12:04:58.05#ibcon#read 5, iclass 25, count 2 2006.229.12:04:58.05#ibcon#about to read 6, iclass 25, count 2 2006.229.12:04:58.05#ibcon#read 6, iclass 25, count 2 2006.229.12:04:58.05#ibcon#end of sib2, iclass 25, count 2 2006.229.12:04:58.05#ibcon#*after write, iclass 25, count 2 2006.229.12:04:58.05#ibcon#*before return 0, iclass 25, count 2 2006.229.12:04:58.05#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:58.05#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:04:58.05#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.12:04:58.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:58.05#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:58.17#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:58.17#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:58.17#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:04:58.17#ibcon#first serial, iclass 25, count 0 2006.229.12:04:58.17#ibcon#enter sib2, iclass 25, count 0 2006.229.12:04:58.17#ibcon#flushed, iclass 25, count 0 2006.229.12:04:58.17#ibcon#about to write, iclass 25, count 0 2006.229.12:04:58.17#ibcon#wrote, iclass 25, count 0 2006.229.12:04:58.17#ibcon#about to read 3, iclass 25, count 0 2006.229.12:04:58.19#ibcon#read 3, iclass 25, count 0 2006.229.12:04:58.19#ibcon#about to read 4, iclass 25, count 0 2006.229.12:04:58.19#ibcon#read 4, iclass 25, count 0 2006.229.12:04:58.19#ibcon#about to read 5, iclass 25, count 0 2006.229.12:04:58.19#ibcon#read 5, iclass 25, count 0 2006.229.12:04:58.19#ibcon#about to read 6, iclass 25, count 0 2006.229.12:04:58.19#ibcon#read 6, iclass 25, count 0 2006.229.12:04:58.19#ibcon#end of sib2, iclass 25, count 0 2006.229.12:04:58.19#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:04:58.19#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:04:58.19#ibcon#[27=USB\r\n] 2006.229.12:04:58.19#ibcon#*before write, iclass 25, count 0 2006.229.12:04:58.19#ibcon#enter sib2, iclass 25, count 0 2006.229.12:04:58.19#ibcon#flushed, iclass 25, count 0 2006.229.12:04:58.19#ibcon#about to write, iclass 25, count 0 2006.229.12:04:58.19#ibcon#wrote, iclass 25, count 0 2006.229.12:04:58.19#ibcon#about to read 3, iclass 25, count 0 2006.229.12:04:58.22#ibcon#read 3, iclass 25, count 0 2006.229.12:04:58.22#ibcon#about to read 4, iclass 25, count 0 2006.229.12:04:58.22#ibcon#read 4, iclass 25, count 0 2006.229.12:04:58.22#ibcon#about to read 5, iclass 25, count 0 2006.229.12:04:58.22#ibcon#read 5, iclass 25, count 0 2006.229.12:04:58.22#ibcon#about to read 6, iclass 25, count 0 2006.229.12:04:58.22#ibcon#read 6, iclass 25, count 0 2006.229.12:04:58.22#ibcon#end of sib2, iclass 25, count 0 2006.229.12:04:58.22#ibcon#*after write, iclass 25, count 0 2006.229.12:04:58.22#ibcon#*before return 0, iclass 25, count 0 2006.229.12:04:58.22#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:58.22#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:04:58.22#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:04:58.22#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:04:58.22$vck44/vblo=2,634.99 2006.229.12:04:58.22#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.12:04:58.22#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.12:04:58.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:58.22#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:58.22#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:58.22#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:58.22#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:04:58.22#ibcon#first serial, iclass 27, count 0 2006.229.12:04:58.22#ibcon#enter sib2, iclass 27, count 0 2006.229.12:04:58.22#ibcon#flushed, iclass 27, count 0 2006.229.12:04:58.22#ibcon#about to write, iclass 27, count 0 2006.229.12:04:58.22#ibcon#wrote, iclass 27, count 0 2006.229.12:04:58.22#ibcon#about to read 3, iclass 27, count 0 2006.229.12:04:58.24#ibcon#read 3, iclass 27, count 0 2006.229.12:04:58.24#ibcon#about to read 4, iclass 27, count 0 2006.229.12:04:58.24#ibcon#read 4, iclass 27, count 0 2006.229.12:04:58.24#ibcon#about to read 5, iclass 27, count 0 2006.229.12:04:58.24#ibcon#read 5, iclass 27, count 0 2006.229.12:04:58.24#ibcon#about to read 6, iclass 27, count 0 2006.229.12:04:58.24#ibcon#read 6, iclass 27, count 0 2006.229.12:04:58.24#ibcon#end of sib2, iclass 27, count 0 2006.229.12:04:58.24#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:04:58.24#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:04:58.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:04:58.24#ibcon#*before write, iclass 27, count 0 2006.229.12:04:58.24#ibcon#enter sib2, iclass 27, count 0 2006.229.12:04:58.24#ibcon#flushed, iclass 27, count 0 2006.229.12:04:58.24#ibcon#about to write, iclass 27, count 0 2006.229.12:04:58.24#ibcon#wrote, iclass 27, count 0 2006.229.12:04:58.24#ibcon#about to read 3, iclass 27, count 0 2006.229.12:04:58.28#ibcon#read 3, iclass 27, count 0 2006.229.12:04:58.28#ibcon#about to read 4, iclass 27, count 0 2006.229.12:04:58.28#ibcon#read 4, iclass 27, count 0 2006.229.12:04:58.28#ibcon#about to read 5, iclass 27, count 0 2006.229.12:04:58.28#ibcon#read 5, iclass 27, count 0 2006.229.12:04:58.28#ibcon#about to read 6, iclass 27, count 0 2006.229.12:04:58.28#ibcon#read 6, iclass 27, count 0 2006.229.12:04:58.28#ibcon#end of sib2, iclass 27, count 0 2006.229.12:04:58.28#ibcon#*after write, iclass 27, count 0 2006.229.12:04:58.28#ibcon#*before return 0, iclass 27, count 0 2006.229.12:04:58.28#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:58.28#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:04:58.28#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:04:58.28#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:04:58.28$vck44/vb=2,4 2006.229.12:04:58.28#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.12:04:58.28#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.12:04:58.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:58.28#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:58.34#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:58.34#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:58.34#ibcon#enter wrdev, iclass 29, count 2 2006.229.12:04:58.34#ibcon#first serial, iclass 29, count 2 2006.229.12:04:58.34#ibcon#enter sib2, iclass 29, count 2 2006.229.12:04:58.34#ibcon#flushed, iclass 29, count 2 2006.229.12:04:58.34#ibcon#about to write, iclass 29, count 2 2006.229.12:04:58.34#ibcon#wrote, iclass 29, count 2 2006.229.12:04:58.34#ibcon#about to read 3, iclass 29, count 2 2006.229.12:04:58.36#ibcon#read 3, iclass 29, count 2 2006.229.12:04:58.36#ibcon#about to read 4, iclass 29, count 2 2006.229.12:04:58.36#ibcon#read 4, iclass 29, count 2 2006.229.12:04:58.36#ibcon#about to read 5, iclass 29, count 2 2006.229.12:04:58.36#ibcon#read 5, iclass 29, count 2 2006.229.12:04:58.36#ibcon#about to read 6, iclass 29, count 2 2006.229.12:04:58.36#ibcon#read 6, iclass 29, count 2 2006.229.12:04:58.36#ibcon#end of sib2, iclass 29, count 2 2006.229.12:04:58.36#ibcon#*mode == 0, iclass 29, count 2 2006.229.12:04:58.36#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.12:04:58.36#ibcon#[27=AT02-04\r\n] 2006.229.12:04:58.36#ibcon#*before write, iclass 29, count 2 2006.229.12:04:58.36#ibcon#enter sib2, iclass 29, count 2 2006.229.12:04:58.36#ibcon#flushed, iclass 29, count 2 2006.229.12:04:58.36#ibcon#about to write, iclass 29, count 2 2006.229.12:04:58.36#ibcon#wrote, iclass 29, count 2 2006.229.12:04:58.36#ibcon#about to read 3, iclass 29, count 2 2006.229.12:04:58.39#ibcon#read 3, iclass 29, count 2 2006.229.12:04:58.39#ibcon#about to read 4, iclass 29, count 2 2006.229.12:04:58.39#ibcon#read 4, iclass 29, count 2 2006.229.12:04:58.39#ibcon#about to read 5, iclass 29, count 2 2006.229.12:04:58.39#ibcon#read 5, iclass 29, count 2 2006.229.12:04:58.39#ibcon#about to read 6, iclass 29, count 2 2006.229.12:04:58.39#ibcon#read 6, iclass 29, count 2 2006.229.12:04:58.39#ibcon#end of sib2, iclass 29, count 2 2006.229.12:04:58.39#ibcon#*after write, iclass 29, count 2 2006.229.12:04:58.39#ibcon#*before return 0, iclass 29, count 2 2006.229.12:04:58.39#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:58.39#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:04:58.39#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.12:04:58.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:58.39#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:58.51#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:58.51#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:58.51#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:04:58.51#ibcon#first serial, iclass 29, count 0 2006.229.12:04:58.51#ibcon#enter sib2, iclass 29, count 0 2006.229.12:04:58.51#ibcon#flushed, iclass 29, count 0 2006.229.12:04:58.51#ibcon#about to write, iclass 29, count 0 2006.229.12:04:58.51#ibcon#wrote, iclass 29, count 0 2006.229.12:04:58.51#ibcon#about to read 3, iclass 29, count 0 2006.229.12:04:58.53#ibcon#read 3, iclass 29, count 0 2006.229.12:04:58.53#ibcon#about to read 4, iclass 29, count 0 2006.229.12:04:58.53#ibcon#read 4, iclass 29, count 0 2006.229.12:04:58.53#ibcon#about to read 5, iclass 29, count 0 2006.229.12:04:58.53#ibcon#read 5, iclass 29, count 0 2006.229.12:04:58.53#ibcon#about to read 6, iclass 29, count 0 2006.229.12:04:58.53#ibcon#read 6, iclass 29, count 0 2006.229.12:04:58.53#ibcon#end of sib2, iclass 29, count 0 2006.229.12:04:58.53#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:04:58.53#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:04:58.53#ibcon#[27=USB\r\n] 2006.229.12:04:58.53#ibcon#*before write, iclass 29, count 0 2006.229.12:04:58.53#ibcon#enter sib2, iclass 29, count 0 2006.229.12:04:58.53#ibcon#flushed, iclass 29, count 0 2006.229.12:04:58.53#ibcon#about to write, iclass 29, count 0 2006.229.12:04:58.53#ibcon#wrote, iclass 29, count 0 2006.229.12:04:58.53#ibcon#about to read 3, iclass 29, count 0 2006.229.12:04:58.56#ibcon#read 3, iclass 29, count 0 2006.229.12:04:58.56#ibcon#about to read 4, iclass 29, count 0 2006.229.12:04:58.56#ibcon#read 4, iclass 29, count 0 2006.229.12:04:58.56#ibcon#about to read 5, iclass 29, count 0 2006.229.12:04:58.56#ibcon#read 5, iclass 29, count 0 2006.229.12:04:58.56#ibcon#about to read 6, iclass 29, count 0 2006.229.12:04:58.56#ibcon#read 6, iclass 29, count 0 2006.229.12:04:58.56#ibcon#end of sib2, iclass 29, count 0 2006.229.12:04:58.56#ibcon#*after write, iclass 29, count 0 2006.229.12:04:58.56#ibcon#*before return 0, iclass 29, count 0 2006.229.12:04:58.56#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:58.56#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:04:58.56#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:04:58.56#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:04:58.56$vck44/vblo=3,649.99 2006.229.12:04:58.56#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.12:04:58.56#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.12:04:58.56#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:58.56#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:04:58.56#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:04:58.56#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:04:58.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:04:58.56#ibcon#first serial, iclass 31, count 0 2006.229.12:04:58.56#ibcon#enter sib2, iclass 31, count 0 2006.229.12:04:58.56#ibcon#flushed, iclass 31, count 0 2006.229.12:04:58.56#ibcon#about to write, iclass 31, count 0 2006.229.12:04:58.56#ibcon#wrote, iclass 31, count 0 2006.229.12:04:58.56#ibcon#about to read 3, iclass 31, count 0 2006.229.12:04:58.58#ibcon#read 3, iclass 31, count 0 2006.229.12:04:58.58#ibcon#about to read 4, iclass 31, count 0 2006.229.12:04:58.58#ibcon#read 4, iclass 31, count 0 2006.229.12:04:58.58#ibcon#about to read 5, iclass 31, count 0 2006.229.12:04:58.58#ibcon#read 5, iclass 31, count 0 2006.229.12:04:58.58#ibcon#about to read 6, iclass 31, count 0 2006.229.12:04:58.58#ibcon#read 6, iclass 31, count 0 2006.229.12:04:58.58#ibcon#end of sib2, iclass 31, count 0 2006.229.12:04:58.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:04:58.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:04:58.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:04:58.58#ibcon#*before write, iclass 31, count 0 2006.229.12:04:58.58#ibcon#enter sib2, iclass 31, count 0 2006.229.12:04:58.58#ibcon#flushed, iclass 31, count 0 2006.229.12:04:58.58#ibcon#about to write, iclass 31, count 0 2006.229.12:04:58.58#ibcon#wrote, iclass 31, count 0 2006.229.12:04:58.58#ibcon#about to read 3, iclass 31, count 0 2006.229.12:04:58.62#ibcon#read 3, iclass 31, count 0 2006.229.12:04:58.62#ibcon#about to read 4, iclass 31, count 0 2006.229.12:04:58.62#ibcon#read 4, iclass 31, count 0 2006.229.12:04:58.62#ibcon#about to read 5, iclass 31, count 0 2006.229.12:04:58.62#ibcon#read 5, iclass 31, count 0 2006.229.12:04:58.62#ibcon#about to read 6, iclass 31, count 0 2006.229.12:04:58.62#ibcon#read 6, iclass 31, count 0 2006.229.12:04:58.62#ibcon#end of sib2, iclass 31, count 0 2006.229.12:04:58.62#ibcon#*after write, iclass 31, count 0 2006.229.12:04:58.62#ibcon#*before return 0, iclass 31, count 0 2006.229.12:04:58.62#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:04:58.62#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:04:58.62#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:04:58.62#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:04:58.62$vck44/vb=3,4 2006.229.12:04:58.62#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.12:04:58.62#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.12:04:58.62#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:58.62#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:04:58.68#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:04:58.68#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:04:58.68#ibcon#enter wrdev, iclass 33, count 2 2006.229.12:04:58.68#ibcon#first serial, iclass 33, count 2 2006.229.12:04:58.68#ibcon#enter sib2, iclass 33, count 2 2006.229.12:04:58.68#ibcon#flushed, iclass 33, count 2 2006.229.12:04:58.68#ibcon#about to write, iclass 33, count 2 2006.229.12:04:58.68#ibcon#wrote, iclass 33, count 2 2006.229.12:04:58.68#ibcon#about to read 3, iclass 33, count 2 2006.229.12:04:58.70#ibcon#read 3, iclass 33, count 2 2006.229.12:04:58.70#ibcon#about to read 4, iclass 33, count 2 2006.229.12:04:58.70#ibcon#read 4, iclass 33, count 2 2006.229.12:04:58.70#ibcon#about to read 5, iclass 33, count 2 2006.229.12:04:58.70#ibcon#read 5, iclass 33, count 2 2006.229.12:04:58.70#ibcon#about to read 6, iclass 33, count 2 2006.229.12:04:58.70#ibcon#read 6, iclass 33, count 2 2006.229.12:04:58.70#ibcon#end of sib2, iclass 33, count 2 2006.229.12:04:58.70#ibcon#*mode == 0, iclass 33, count 2 2006.229.12:04:58.70#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.12:04:58.70#ibcon#[27=AT03-04\r\n] 2006.229.12:04:58.70#ibcon#*before write, iclass 33, count 2 2006.229.12:04:58.70#ibcon#enter sib2, iclass 33, count 2 2006.229.12:04:58.70#ibcon#flushed, iclass 33, count 2 2006.229.12:04:58.70#ibcon#about to write, iclass 33, count 2 2006.229.12:04:58.70#ibcon#wrote, iclass 33, count 2 2006.229.12:04:58.70#ibcon#about to read 3, iclass 33, count 2 2006.229.12:04:58.73#ibcon#read 3, iclass 33, count 2 2006.229.12:04:58.73#ibcon#about to read 4, iclass 33, count 2 2006.229.12:04:58.73#ibcon#read 4, iclass 33, count 2 2006.229.12:04:58.73#ibcon#about to read 5, iclass 33, count 2 2006.229.12:04:58.73#ibcon#read 5, iclass 33, count 2 2006.229.12:04:58.73#ibcon#about to read 6, iclass 33, count 2 2006.229.12:04:58.73#ibcon#read 6, iclass 33, count 2 2006.229.12:04:58.73#ibcon#end of sib2, iclass 33, count 2 2006.229.12:04:58.73#ibcon#*after write, iclass 33, count 2 2006.229.12:04:58.73#ibcon#*before return 0, iclass 33, count 2 2006.229.12:04:58.73#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:04:58.73#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:04:58.73#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.12:04:58.73#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:58.73#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:04:58.85#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:04:58.85#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:04:58.85#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:04:58.85#ibcon#first serial, iclass 33, count 0 2006.229.12:04:58.85#ibcon#enter sib2, iclass 33, count 0 2006.229.12:04:58.85#ibcon#flushed, iclass 33, count 0 2006.229.12:04:58.85#ibcon#about to write, iclass 33, count 0 2006.229.12:04:58.85#ibcon#wrote, iclass 33, count 0 2006.229.12:04:58.85#ibcon#about to read 3, iclass 33, count 0 2006.229.12:04:58.87#ibcon#read 3, iclass 33, count 0 2006.229.12:04:58.87#ibcon#about to read 4, iclass 33, count 0 2006.229.12:04:58.87#ibcon#read 4, iclass 33, count 0 2006.229.12:04:58.87#ibcon#about to read 5, iclass 33, count 0 2006.229.12:04:58.87#ibcon#read 5, iclass 33, count 0 2006.229.12:04:58.87#ibcon#about to read 6, iclass 33, count 0 2006.229.12:04:58.87#ibcon#read 6, iclass 33, count 0 2006.229.12:04:58.87#ibcon#end of sib2, iclass 33, count 0 2006.229.12:04:58.87#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:04:58.87#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:04:58.87#ibcon#[27=USB\r\n] 2006.229.12:04:58.87#ibcon#*before write, iclass 33, count 0 2006.229.12:04:58.87#ibcon#enter sib2, iclass 33, count 0 2006.229.12:04:58.87#ibcon#flushed, iclass 33, count 0 2006.229.12:04:58.87#ibcon#about to write, iclass 33, count 0 2006.229.12:04:58.87#ibcon#wrote, iclass 33, count 0 2006.229.12:04:58.87#ibcon#about to read 3, iclass 33, count 0 2006.229.12:04:58.90#ibcon#read 3, iclass 33, count 0 2006.229.12:04:58.90#ibcon#about to read 4, iclass 33, count 0 2006.229.12:04:58.90#ibcon#read 4, iclass 33, count 0 2006.229.12:04:58.90#ibcon#about to read 5, iclass 33, count 0 2006.229.12:04:58.90#ibcon#read 5, iclass 33, count 0 2006.229.12:04:58.90#ibcon#about to read 6, iclass 33, count 0 2006.229.12:04:58.90#ibcon#read 6, iclass 33, count 0 2006.229.12:04:58.90#ibcon#end of sib2, iclass 33, count 0 2006.229.12:04:58.90#ibcon#*after write, iclass 33, count 0 2006.229.12:04:58.90#ibcon#*before return 0, iclass 33, count 0 2006.229.12:04:58.90#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:04:58.90#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:04:58.90#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:04:58.90#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:04:58.90$vck44/vblo=4,679.99 2006.229.12:04:58.90#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.12:04:58.90#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.12:04:58.90#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:58.90#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:04:58.90#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:04:58.90#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:04:58.90#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:04:58.90#ibcon#first serial, iclass 35, count 0 2006.229.12:04:58.90#ibcon#enter sib2, iclass 35, count 0 2006.229.12:04:58.90#ibcon#flushed, iclass 35, count 0 2006.229.12:04:58.90#ibcon#about to write, iclass 35, count 0 2006.229.12:04:58.90#ibcon#wrote, iclass 35, count 0 2006.229.12:04:58.90#ibcon#about to read 3, iclass 35, count 0 2006.229.12:04:58.92#ibcon#read 3, iclass 35, count 0 2006.229.12:04:58.92#ibcon#about to read 4, iclass 35, count 0 2006.229.12:04:58.92#ibcon#read 4, iclass 35, count 0 2006.229.12:04:58.92#ibcon#about to read 5, iclass 35, count 0 2006.229.12:04:58.92#ibcon#read 5, iclass 35, count 0 2006.229.12:04:58.92#ibcon#about to read 6, iclass 35, count 0 2006.229.12:04:58.92#ibcon#read 6, iclass 35, count 0 2006.229.12:04:58.92#ibcon#end of sib2, iclass 35, count 0 2006.229.12:04:58.92#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:04:58.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:04:58.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:04:58.92#ibcon#*before write, iclass 35, count 0 2006.229.12:04:58.92#ibcon#enter sib2, iclass 35, count 0 2006.229.12:04:58.92#ibcon#flushed, iclass 35, count 0 2006.229.12:04:58.92#ibcon#about to write, iclass 35, count 0 2006.229.12:04:58.92#ibcon#wrote, iclass 35, count 0 2006.229.12:04:58.92#ibcon#about to read 3, iclass 35, count 0 2006.229.12:04:58.96#ibcon#read 3, iclass 35, count 0 2006.229.12:04:58.96#ibcon#about to read 4, iclass 35, count 0 2006.229.12:04:58.96#ibcon#read 4, iclass 35, count 0 2006.229.12:04:58.96#ibcon#about to read 5, iclass 35, count 0 2006.229.12:04:58.96#ibcon#read 5, iclass 35, count 0 2006.229.12:04:58.96#ibcon#about to read 6, iclass 35, count 0 2006.229.12:04:58.96#ibcon#read 6, iclass 35, count 0 2006.229.12:04:58.96#ibcon#end of sib2, iclass 35, count 0 2006.229.12:04:58.96#ibcon#*after write, iclass 35, count 0 2006.229.12:04:58.96#ibcon#*before return 0, iclass 35, count 0 2006.229.12:04:58.96#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:04:58.96#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:04:58.96#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:04:58.96#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:04:58.96$vck44/vb=4,4 2006.229.12:04:58.96#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.12:04:58.96#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.12:04:58.96#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:58.96#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:59.02#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:59.02#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:59.02#ibcon#enter wrdev, iclass 37, count 2 2006.229.12:04:59.02#ibcon#first serial, iclass 37, count 2 2006.229.12:04:59.02#ibcon#enter sib2, iclass 37, count 2 2006.229.12:04:59.02#ibcon#flushed, iclass 37, count 2 2006.229.12:04:59.02#ibcon#about to write, iclass 37, count 2 2006.229.12:04:59.02#ibcon#wrote, iclass 37, count 2 2006.229.12:04:59.02#ibcon#about to read 3, iclass 37, count 2 2006.229.12:04:59.04#ibcon#read 3, iclass 37, count 2 2006.229.12:04:59.04#ibcon#about to read 4, iclass 37, count 2 2006.229.12:04:59.04#ibcon#read 4, iclass 37, count 2 2006.229.12:04:59.04#ibcon#about to read 5, iclass 37, count 2 2006.229.12:04:59.04#ibcon#read 5, iclass 37, count 2 2006.229.12:04:59.04#ibcon#about to read 6, iclass 37, count 2 2006.229.12:04:59.04#ibcon#read 6, iclass 37, count 2 2006.229.12:04:59.04#ibcon#end of sib2, iclass 37, count 2 2006.229.12:04:59.04#ibcon#*mode == 0, iclass 37, count 2 2006.229.12:04:59.04#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.12:04:59.04#ibcon#[27=AT04-04\r\n] 2006.229.12:04:59.04#ibcon#*before write, iclass 37, count 2 2006.229.12:04:59.04#ibcon#enter sib2, iclass 37, count 2 2006.229.12:04:59.04#ibcon#flushed, iclass 37, count 2 2006.229.12:04:59.04#ibcon#about to write, iclass 37, count 2 2006.229.12:04:59.04#ibcon#wrote, iclass 37, count 2 2006.229.12:04:59.04#ibcon#about to read 3, iclass 37, count 2 2006.229.12:04:59.07#ibcon#read 3, iclass 37, count 2 2006.229.12:04:59.07#ibcon#about to read 4, iclass 37, count 2 2006.229.12:04:59.07#ibcon#read 4, iclass 37, count 2 2006.229.12:04:59.07#ibcon#about to read 5, iclass 37, count 2 2006.229.12:04:59.07#ibcon#read 5, iclass 37, count 2 2006.229.12:04:59.07#ibcon#about to read 6, iclass 37, count 2 2006.229.12:04:59.07#ibcon#read 6, iclass 37, count 2 2006.229.12:04:59.07#ibcon#end of sib2, iclass 37, count 2 2006.229.12:04:59.07#ibcon#*after write, iclass 37, count 2 2006.229.12:04:59.07#ibcon#*before return 0, iclass 37, count 2 2006.229.12:04:59.07#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:59.07#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:04:59.07#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.12:04:59.07#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:59.07#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:59.19#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:59.19#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:59.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:04:59.19#ibcon#first serial, iclass 37, count 0 2006.229.12:04:59.19#ibcon#enter sib2, iclass 37, count 0 2006.229.12:04:59.19#ibcon#flushed, iclass 37, count 0 2006.229.12:04:59.19#ibcon#about to write, iclass 37, count 0 2006.229.12:04:59.19#ibcon#wrote, iclass 37, count 0 2006.229.12:04:59.19#ibcon#about to read 3, iclass 37, count 0 2006.229.12:04:59.21#ibcon#read 3, iclass 37, count 0 2006.229.12:04:59.21#ibcon#about to read 4, iclass 37, count 0 2006.229.12:04:59.21#ibcon#read 4, iclass 37, count 0 2006.229.12:04:59.21#ibcon#about to read 5, iclass 37, count 0 2006.229.12:04:59.21#ibcon#read 5, iclass 37, count 0 2006.229.12:04:59.21#ibcon#about to read 6, iclass 37, count 0 2006.229.12:04:59.21#ibcon#read 6, iclass 37, count 0 2006.229.12:04:59.21#ibcon#end of sib2, iclass 37, count 0 2006.229.12:04:59.21#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:04:59.21#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:04:59.21#ibcon#[27=USB\r\n] 2006.229.12:04:59.21#ibcon#*before write, iclass 37, count 0 2006.229.12:04:59.21#ibcon#enter sib2, iclass 37, count 0 2006.229.12:04:59.21#ibcon#flushed, iclass 37, count 0 2006.229.12:04:59.21#ibcon#about to write, iclass 37, count 0 2006.229.12:04:59.21#ibcon#wrote, iclass 37, count 0 2006.229.12:04:59.21#ibcon#about to read 3, iclass 37, count 0 2006.229.12:04:59.24#ibcon#read 3, iclass 37, count 0 2006.229.12:04:59.24#ibcon#about to read 4, iclass 37, count 0 2006.229.12:04:59.24#ibcon#read 4, iclass 37, count 0 2006.229.12:04:59.24#ibcon#about to read 5, iclass 37, count 0 2006.229.12:04:59.24#ibcon#read 5, iclass 37, count 0 2006.229.12:04:59.24#ibcon#about to read 6, iclass 37, count 0 2006.229.12:04:59.24#ibcon#read 6, iclass 37, count 0 2006.229.12:04:59.24#ibcon#end of sib2, iclass 37, count 0 2006.229.12:04:59.24#ibcon#*after write, iclass 37, count 0 2006.229.12:04:59.24#ibcon#*before return 0, iclass 37, count 0 2006.229.12:04:59.24#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:59.24#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:04:59.24#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:04:59.24#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:04:59.24$vck44/vblo=5,709.99 2006.229.12:04:59.24#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.12:04:59.24#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.12:04:59.24#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:59.24#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:59.24#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:59.24#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:59.24#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:04:59.24#ibcon#first serial, iclass 39, count 0 2006.229.12:04:59.24#ibcon#enter sib2, iclass 39, count 0 2006.229.12:04:59.24#ibcon#flushed, iclass 39, count 0 2006.229.12:04:59.24#ibcon#about to write, iclass 39, count 0 2006.229.12:04:59.24#ibcon#wrote, iclass 39, count 0 2006.229.12:04:59.24#ibcon#about to read 3, iclass 39, count 0 2006.229.12:04:59.26#ibcon#read 3, iclass 39, count 0 2006.229.12:04:59.26#ibcon#about to read 4, iclass 39, count 0 2006.229.12:04:59.26#ibcon#read 4, iclass 39, count 0 2006.229.12:04:59.26#ibcon#about to read 5, iclass 39, count 0 2006.229.12:04:59.26#ibcon#read 5, iclass 39, count 0 2006.229.12:04:59.26#ibcon#about to read 6, iclass 39, count 0 2006.229.12:04:59.26#ibcon#read 6, iclass 39, count 0 2006.229.12:04:59.26#ibcon#end of sib2, iclass 39, count 0 2006.229.12:04:59.26#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:04:59.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:04:59.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:04:59.26#ibcon#*before write, iclass 39, count 0 2006.229.12:04:59.26#ibcon#enter sib2, iclass 39, count 0 2006.229.12:04:59.26#ibcon#flushed, iclass 39, count 0 2006.229.12:04:59.26#ibcon#about to write, iclass 39, count 0 2006.229.12:04:59.26#ibcon#wrote, iclass 39, count 0 2006.229.12:04:59.26#ibcon#about to read 3, iclass 39, count 0 2006.229.12:04:59.30#ibcon#read 3, iclass 39, count 0 2006.229.12:04:59.30#ibcon#about to read 4, iclass 39, count 0 2006.229.12:04:59.30#ibcon#read 4, iclass 39, count 0 2006.229.12:04:59.30#ibcon#about to read 5, iclass 39, count 0 2006.229.12:04:59.30#ibcon#read 5, iclass 39, count 0 2006.229.12:04:59.30#ibcon#about to read 6, iclass 39, count 0 2006.229.12:04:59.30#ibcon#read 6, iclass 39, count 0 2006.229.12:04:59.30#ibcon#end of sib2, iclass 39, count 0 2006.229.12:04:59.30#ibcon#*after write, iclass 39, count 0 2006.229.12:04:59.30#ibcon#*before return 0, iclass 39, count 0 2006.229.12:04:59.30#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:59.30#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:04:59.30#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:04:59.30#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:04:59.30$vck44/vb=5,4 2006.229.12:04:59.30#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.12:04:59.30#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.12:04:59.30#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:59.30#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:59.36#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:59.36#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:59.36#ibcon#enter wrdev, iclass 3, count 2 2006.229.12:04:59.36#ibcon#first serial, iclass 3, count 2 2006.229.12:04:59.36#ibcon#enter sib2, iclass 3, count 2 2006.229.12:04:59.36#ibcon#flushed, iclass 3, count 2 2006.229.12:04:59.36#ibcon#about to write, iclass 3, count 2 2006.229.12:04:59.36#ibcon#wrote, iclass 3, count 2 2006.229.12:04:59.36#ibcon#about to read 3, iclass 3, count 2 2006.229.12:04:59.38#ibcon#read 3, iclass 3, count 2 2006.229.12:04:59.38#ibcon#about to read 4, iclass 3, count 2 2006.229.12:04:59.38#ibcon#read 4, iclass 3, count 2 2006.229.12:04:59.38#ibcon#about to read 5, iclass 3, count 2 2006.229.12:04:59.38#ibcon#read 5, iclass 3, count 2 2006.229.12:04:59.38#ibcon#about to read 6, iclass 3, count 2 2006.229.12:04:59.38#ibcon#read 6, iclass 3, count 2 2006.229.12:04:59.38#ibcon#end of sib2, iclass 3, count 2 2006.229.12:04:59.38#ibcon#*mode == 0, iclass 3, count 2 2006.229.12:04:59.38#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.12:04:59.38#ibcon#[27=AT05-04\r\n] 2006.229.12:04:59.38#ibcon#*before write, iclass 3, count 2 2006.229.12:04:59.38#ibcon#enter sib2, iclass 3, count 2 2006.229.12:04:59.38#ibcon#flushed, iclass 3, count 2 2006.229.12:04:59.38#ibcon#about to write, iclass 3, count 2 2006.229.12:04:59.38#ibcon#wrote, iclass 3, count 2 2006.229.12:04:59.38#ibcon#about to read 3, iclass 3, count 2 2006.229.12:04:59.41#ibcon#read 3, iclass 3, count 2 2006.229.12:04:59.41#ibcon#about to read 4, iclass 3, count 2 2006.229.12:04:59.41#ibcon#read 4, iclass 3, count 2 2006.229.12:04:59.41#ibcon#about to read 5, iclass 3, count 2 2006.229.12:04:59.41#ibcon#read 5, iclass 3, count 2 2006.229.12:04:59.41#ibcon#about to read 6, iclass 3, count 2 2006.229.12:04:59.41#ibcon#read 6, iclass 3, count 2 2006.229.12:04:59.41#ibcon#end of sib2, iclass 3, count 2 2006.229.12:04:59.41#ibcon#*after write, iclass 3, count 2 2006.229.12:04:59.41#ibcon#*before return 0, iclass 3, count 2 2006.229.12:04:59.41#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:59.41#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:04:59.41#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.12:04:59.41#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:59.41#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:59.53#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:59.53#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:59.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:04:59.53#ibcon#first serial, iclass 3, count 0 2006.229.12:04:59.53#ibcon#enter sib2, iclass 3, count 0 2006.229.12:04:59.53#ibcon#flushed, iclass 3, count 0 2006.229.12:04:59.53#ibcon#about to write, iclass 3, count 0 2006.229.12:04:59.53#ibcon#wrote, iclass 3, count 0 2006.229.12:04:59.53#ibcon#about to read 3, iclass 3, count 0 2006.229.12:04:59.55#ibcon#read 3, iclass 3, count 0 2006.229.12:04:59.55#ibcon#about to read 4, iclass 3, count 0 2006.229.12:04:59.55#ibcon#read 4, iclass 3, count 0 2006.229.12:04:59.55#ibcon#about to read 5, iclass 3, count 0 2006.229.12:04:59.55#ibcon#read 5, iclass 3, count 0 2006.229.12:04:59.55#ibcon#about to read 6, iclass 3, count 0 2006.229.12:04:59.55#ibcon#read 6, iclass 3, count 0 2006.229.12:04:59.55#ibcon#end of sib2, iclass 3, count 0 2006.229.12:04:59.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:04:59.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:04:59.55#ibcon#[27=USB\r\n] 2006.229.12:04:59.55#ibcon#*before write, iclass 3, count 0 2006.229.12:04:59.55#ibcon#enter sib2, iclass 3, count 0 2006.229.12:04:59.55#ibcon#flushed, iclass 3, count 0 2006.229.12:04:59.55#ibcon#about to write, iclass 3, count 0 2006.229.12:04:59.55#ibcon#wrote, iclass 3, count 0 2006.229.12:04:59.55#ibcon#about to read 3, iclass 3, count 0 2006.229.12:04:59.58#ibcon#read 3, iclass 3, count 0 2006.229.12:04:59.58#ibcon#about to read 4, iclass 3, count 0 2006.229.12:04:59.58#ibcon#read 4, iclass 3, count 0 2006.229.12:04:59.58#ibcon#about to read 5, iclass 3, count 0 2006.229.12:04:59.58#ibcon#read 5, iclass 3, count 0 2006.229.12:04:59.58#ibcon#about to read 6, iclass 3, count 0 2006.229.12:04:59.58#ibcon#read 6, iclass 3, count 0 2006.229.12:04:59.58#ibcon#end of sib2, iclass 3, count 0 2006.229.12:04:59.58#ibcon#*after write, iclass 3, count 0 2006.229.12:04:59.58#ibcon#*before return 0, iclass 3, count 0 2006.229.12:04:59.58#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:59.58#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:04:59.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:04:59.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:04:59.58$vck44/vblo=6,719.99 2006.229.12:04:59.58#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.12:04:59.58#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.12:04:59.58#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:59.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:59.58#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:59.58#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:59.58#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:04:59.58#ibcon#first serial, iclass 5, count 0 2006.229.12:04:59.58#ibcon#enter sib2, iclass 5, count 0 2006.229.12:04:59.58#ibcon#flushed, iclass 5, count 0 2006.229.12:04:59.58#ibcon#about to write, iclass 5, count 0 2006.229.12:04:59.58#ibcon#wrote, iclass 5, count 0 2006.229.12:04:59.58#ibcon#about to read 3, iclass 5, count 0 2006.229.12:04:59.60#ibcon#read 3, iclass 5, count 0 2006.229.12:04:59.60#ibcon#about to read 4, iclass 5, count 0 2006.229.12:04:59.60#ibcon#read 4, iclass 5, count 0 2006.229.12:04:59.60#ibcon#about to read 5, iclass 5, count 0 2006.229.12:04:59.60#ibcon#read 5, iclass 5, count 0 2006.229.12:04:59.60#ibcon#about to read 6, iclass 5, count 0 2006.229.12:04:59.60#ibcon#read 6, iclass 5, count 0 2006.229.12:04:59.60#ibcon#end of sib2, iclass 5, count 0 2006.229.12:04:59.60#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:04:59.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:04:59.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:04:59.60#ibcon#*before write, iclass 5, count 0 2006.229.12:04:59.60#ibcon#enter sib2, iclass 5, count 0 2006.229.12:04:59.60#ibcon#flushed, iclass 5, count 0 2006.229.12:04:59.60#ibcon#about to write, iclass 5, count 0 2006.229.12:04:59.60#ibcon#wrote, iclass 5, count 0 2006.229.12:04:59.60#ibcon#about to read 3, iclass 5, count 0 2006.229.12:04:59.64#ibcon#read 3, iclass 5, count 0 2006.229.12:04:59.64#ibcon#about to read 4, iclass 5, count 0 2006.229.12:04:59.64#ibcon#read 4, iclass 5, count 0 2006.229.12:04:59.64#ibcon#about to read 5, iclass 5, count 0 2006.229.12:04:59.64#ibcon#read 5, iclass 5, count 0 2006.229.12:04:59.64#ibcon#about to read 6, iclass 5, count 0 2006.229.12:04:59.64#ibcon#read 6, iclass 5, count 0 2006.229.12:04:59.64#ibcon#end of sib2, iclass 5, count 0 2006.229.12:04:59.64#ibcon#*after write, iclass 5, count 0 2006.229.12:04:59.64#ibcon#*before return 0, iclass 5, count 0 2006.229.12:04:59.64#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:59.64#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:04:59.64#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:04:59.64#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:04:59.64$vck44/vb=6,4 2006.229.12:04:59.64#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.12:04:59.64#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.12:04:59.64#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:59.64#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:59.70#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:59.70#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:59.70#ibcon#enter wrdev, iclass 7, count 2 2006.229.12:04:59.70#ibcon#first serial, iclass 7, count 2 2006.229.12:04:59.70#ibcon#enter sib2, iclass 7, count 2 2006.229.12:04:59.70#ibcon#flushed, iclass 7, count 2 2006.229.12:04:59.70#ibcon#about to write, iclass 7, count 2 2006.229.12:04:59.70#ibcon#wrote, iclass 7, count 2 2006.229.12:04:59.70#ibcon#about to read 3, iclass 7, count 2 2006.229.12:04:59.72#ibcon#read 3, iclass 7, count 2 2006.229.12:04:59.72#ibcon#about to read 4, iclass 7, count 2 2006.229.12:04:59.72#ibcon#read 4, iclass 7, count 2 2006.229.12:04:59.72#ibcon#about to read 5, iclass 7, count 2 2006.229.12:04:59.72#ibcon#read 5, iclass 7, count 2 2006.229.12:04:59.72#ibcon#about to read 6, iclass 7, count 2 2006.229.12:04:59.72#ibcon#read 6, iclass 7, count 2 2006.229.12:04:59.72#ibcon#end of sib2, iclass 7, count 2 2006.229.12:04:59.72#ibcon#*mode == 0, iclass 7, count 2 2006.229.12:04:59.72#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.12:04:59.72#ibcon#[27=AT06-04\r\n] 2006.229.12:04:59.72#ibcon#*before write, iclass 7, count 2 2006.229.12:04:59.72#ibcon#enter sib2, iclass 7, count 2 2006.229.12:04:59.72#ibcon#flushed, iclass 7, count 2 2006.229.12:04:59.72#ibcon#about to write, iclass 7, count 2 2006.229.12:04:59.72#ibcon#wrote, iclass 7, count 2 2006.229.12:04:59.72#ibcon#about to read 3, iclass 7, count 2 2006.229.12:04:59.75#ibcon#read 3, iclass 7, count 2 2006.229.12:04:59.75#ibcon#about to read 4, iclass 7, count 2 2006.229.12:04:59.75#ibcon#read 4, iclass 7, count 2 2006.229.12:04:59.75#ibcon#about to read 5, iclass 7, count 2 2006.229.12:04:59.75#ibcon#read 5, iclass 7, count 2 2006.229.12:04:59.75#ibcon#about to read 6, iclass 7, count 2 2006.229.12:04:59.75#ibcon#read 6, iclass 7, count 2 2006.229.12:04:59.75#ibcon#end of sib2, iclass 7, count 2 2006.229.12:04:59.75#ibcon#*after write, iclass 7, count 2 2006.229.12:04:59.75#ibcon#*before return 0, iclass 7, count 2 2006.229.12:04:59.75#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:59.75#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:04:59.75#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.12:04:59.75#ibcon#ireg 7 cls_cnt 0 2006.229.12:04:59.75#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:59.87#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:59.87#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:59.87#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:04:59.87#ibcon#first serial, iclass 7, count 0 2006.229.12:04:59.87#ibcon#enter sib2, iclass 7, count 0 2006.229.12:04:59.87#ibcon#flushed, iclass 7, count 0 2006.229.12:04:59.87#ibcon#about to write, iclass 7, count 0 2006.229.12:04:59.87#ibcon#wrote, iclass 7, count 0 2006.229.12:04:59.87#ibcon#about to read 3, iclass 7, count 0 2006.229.12:04:59.89#ibcon#read 3, iclass 7, count 0 2006.229.12:04:59.89#ibcon#about to read 4, iclass 7, count 0 2006.229.12:04:59.89#ibcon#read 4, iclass 7, count 0 2006.229.12:04:59.89#ibcon#about to read 5, iclass 7, count 0 2006.229.12:04:59.89#ibcon#read 5, iclass 7, count 0 2006.229.12:04:59.89#ibcon#about to read 6, iclass 7, count 0 2006.229.12:04:59.89#ibcon#read 6, iclass 7, count 0 2006.229.12:04:59.89#ibcon#end of sib2, iclass 7, count 0 2006.229.12:04:59.89#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:04:59.89#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:04:59.89#ibcon#[27=USB\r\n] 2006.229.12:04:59.89#ibcon#*before write, iclass 7, count 0 2006.229.12:04:59.89#ibcon#enter sib2, iclass 7, count 0 2006.229.12:04:59.89#ibcon#flushed, iclass 7, count 0 2006.229.12:04:59.89#ibcon#about to write, iclass 7, count 0 2006.229.12:04:59.89#ibcon#wrote, iclass 7, count 0 2006.229.12:04:59.89#ibcon#about to read 3, iclass 7, count 0 2006.229.12:04:59.92#ibcon#read 3, iclass 7, count 0 2006.229.12:04:59.92#ibcon#about to read 4, iclass 7, count 0 2006.229.12:04:59.92#ibcon#read 4, iclass 7, count 0 2006.229.12:04:59.92#ibcon#about to read 5, iclass 7, count 0 2006.229.12:04:59.92#ibcon#read 5, iclass 7, count 0 2006.229.12:04:59.92#ibcon#about to read 6, iclass 7, count 0 2006.229.12:04:59.92#ibcon#read 6, iclass 7, count 0 2006.229.12:04:59.92#ibcon#end of sib2, iclass 7, count 0 2006.229.12:04:59.92#ibcon#*after write, iclass 7, count 0 2006.229.12:04:59.92#ibcon#*before return 0, iclass 7, count 0 2006.229.12:04:59.92#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:59.92#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:04:59.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:04:59.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:04:59.92$vck44/vblo=7,734.99 2006.229.12:04:59.92#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:04:59.92#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:04:59.92#ibcon#ireg 17 cls_cnt 0 2006.229.12:04:59.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:59.92#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:59.92#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:59.92#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:04:59.92#ibcon#first serial, iclass 11, count 0 2006.229.12:04:59.92#ibcon#enter sib2, iclass 11, count 0 2006.229.12:04:59.92#ibcon#flushed, iclass 11, count 0 2006.229.12:04:59.92#ibcon#about to write, iclass 11, count 0 2006.229.12:04:59.92#ibcon#wrote, iclass 11, count 0 2006.229.12:04:59.92#ibcon#about to read 3, iclass 11, count 0 2006.229.12:04:59.94#ibcon#read 3, iclass 11, count 0 2006.229.12:04:59.94#ibcon#about to read 4, iclass 11, count 0 2006.229.12:04:59.94#ibcon#read 4, iclass 11, count 0 2006.229.12:04:59.94#ibcon#about to read 5, iclass 11, count 0 2006.229.12:04:59.94#ibcon#read 5, iclass 11, count 0 2006.229.12:04:59.94#ibcon#about to read 6, iclass 11, count 0 2006.229.12:04:59.94#ibcon#read 6, iclass 11, count 0 2006.229.12:04:59.94#ibcon#end of sib2, iclass 11, count 0 2006.229.12:04:59.94#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:04:59.94#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:04:59.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:04:59.94#ibcon#*before write, iclass 11, count 0 2006.229.12:04:59.94#ibcon#enter sib2, iclass 11, count 0 2006.229.12:04:59.94#ibcon#flushed, iclass 11, count 0 2006.229.12:04:59.94#ibcon#about to write, iclass 11, count 0 2006.229.12:04:59.94#ibcon#wrote, iclass 11, count 0 2006.229.12:04:59.94#ibcon#about to read 3, iclass 11, count 0 2006.229.12:04:59.98#ibcon#read 3, iclass 11, count 0 2006.229.12:04:59.98#ibcon#about to read 4, iclass 11, count 0 2006.229.12:04:59.98#ibcon#read 4, iclass 11, count 0 2006.229.12:04:59.98#ibcon#about to read 5, iclass 11, count 0 2006.229.12:04:59.98#ibcon#read 5, iclass 11, count 0 2006.229.12:04:59.98#ibcon#about to read 6, iclass 11, count 0 2006.229.12:04:59.98#ibcon#read 6, iclass 11, count 0 2006.229.12:04:59.98#ibcon#end of sib2, iclass 11, count 0 2006.229.12:04:59.98#ibcon#*after write, iclass 11, count 0 2006.229.12:04:59.98#ibcon#*before return 0, iclass 11, count 0 2006.229.12:04:59.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:59.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:04:59.98#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:04:59.98#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:04:59.98$vck44/vb=7,4 2006.229.12:04:59.98#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.12:04:59.98#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.12:04:59.98#ibcon#ireg 11 cls_cnt 2 2006.229.12:04:59.98#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:05:00.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:05:00.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:05:00.04#ibcon#enter wrdev, iclass 13, count 2 2006.229.12:05:00.04#ibcon#first serial, iclass 13, count 2 2006.229.12:05:00.04#ibcon#enter sib2, iclass 13, count 2 2006.229.12:05:00.04#ibcon#flushed, iclass 13, count 2 2006.229.12:05:00.04#ibcon#about to write, iclass 13, count 2 2006.229.12:05:00.04#ibcon#wrote, iclass 13, count 2 2006.229.12:05:00.04#ibcon#about to read 3, iclass 13, count 2 2006.229.12:05:00.06#ibcon#read 3, iclass 13, count 2 2006.229.12:05:00.06#ibcon#about to read 4, iclass 13, count 2 2006.229.12:05:00.06#ibcon#read 4, iclass 13, count 2 2006.229.12:05:00.06#ibcon#about to read 5, iclass 13, count 2 2006.229.12:05:00.06#ibcon#read 5, iclass 13, count 2 2006.229.12:05:00.06#ibcon#about to read 6, iclass 13, count 2 2006.229.12:05:00.06#ibcon#read 6, iclass 13, count 2 2006.229.12:05:00.06#ibcon#end of sib2, iclass 13, count 2 2006.229.12:05:00.06#ibcon#*mode == 0, iclass 13, count 2 2006.229.12:05:00.06#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.12:05:00.06#ibcon#[27=AT07-04\r\n] 2006.229.12:05:00.06#ibcon#*before write, iclass 13, count 2 2006.229.12:05:00.06#ibcon#enter sib2, iclass 13, count 2 2006.229.12:05:00.06#ibcon#flushed, iclass 13, count 2 2006.229.12:05:00.06#ibcon#about to write, iclass 13, count 2 2006.229.12:05:00.06#ibcon#wrote, iclass 13, count 2 2006.229.12:05:00.06#ibcon#about to read 3, iclass 13, count 2 2006.229.12:05:00.09#ibcon#read 3, iclass 13, count 2 2006.229.12:05:00.09#ibcon#about to read 4, iclass 13, count 2 2006.229.12:05:00.09#ibcon#read 4, iclass 13, count 2 2006.229.12:05:00.09#ibcon#about to read 5, iclass 13, count 2 2006.229.12:05:00.09#ibcon#read 5, iclass 13, count 2 2006.229.12:05:00.09#ibcon#about to read 6, iclass 13, count 2 2006.229.12:05:00.09#ibcon#read 6, iclass 13, count 2 2006.229.12:05:00.09#ibcon#end of sib2, iclass 13, count 2 2006.229.12:05:00.09#ibcon#*after write, iclass 13, count 2 2006.229.12:05:00.09#ibcon#*before return 0, iclass 13, count 2 2006.229.12:05:00.09#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:05:00.09#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:05:00.09#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.12:05:00.09#ibcon#ireg 7 cls_cnt 0 2006.229.12:05:00.09#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:05:00.21#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:05:00.21#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:05:00.21#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:05:00.21#ibcon#first serial, iclass 13, count 0 2006.229.12:05:00.21#ibcon#enter sib2, iclass 13, count 0 2006.229.12:05:00.21#ibcon#flushed, iclass 13, count 0 2006.229.12:05:00.21#ibcon#about to write, iclass 13, count 0 2006.229.12:05:00.21#ibcon#wrote, iclass 13, count 0 2006.229.12:05:00.21#ibcon#about to read 3, iclass 13, count 0 2006.229.12:05:00.23#ibcon#read 3, iclass 13, count 0 2006.229.12:05:00.23#ibcon#about to read 4, iclass 13, count 0 2006.229.12:05:00.23#ibcon#read 4, iclass 13, count 0 2006.229.12:05:00.23#ibcon#about to read 5, iclass 13, count 0 2006.229.12:05:00.23#ibcon#read 5, iclass 13, count 0 2006.229.12:05:00.23#ibcon#about to read 6, iclass 13, count 0 2006.229.12:05:00.23#ibcon#read 6, iclass 13, count 0 2006.229.12:05:00.23#ibcon#end of sib2, iclass 13, count 0 2006.229.12:05:00.23#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:05:00.23#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:05:00.23#ibcon#[27=USB\r\n] 2006.229.12:05:00.23#ibcon#*before write, iclass 13, count 0 2006.229.12:05:00.23#ibcon#enter sib2, iclass 13, count 0 2006.229.12:05:00.23#ibcon#flushed, iclass 13, count 0 2006.229.12:05:00.23#ibcon#about to write, iclass 13, count 0 2006.229.12:05:00.23#ibcon#wrote, iclass 13, count 0 2006.229.12:05:00.23#ibcon#about to read 3, iclass 13, count 0 2006.229.12:05:00.26#ibcon#read 3, iclass 13, count 0 2006.229.12:05:00.26#ibcon#about to read 4, iclass 13, count 0 2006.229.12:05:00.26#ibcon#read 4, iclass 13, count 0 2006.229.12:05:00.26#ibcon#about to read 5, iclass 13, count 0 2006.229.12:05:00.26#ibcon#read 5, iclass 13, count 0 2006.229.12:05:00.26#ibcon#about to read 6, iclass 13, count 0 2006.229.12:05:00.26#ibcon#read 6, iclass 13, count 0 2006.229.12:05:00.26#ibcon#end of sib2, iclass 13, count 0 2006.229.12:05:00.26#ibcon#*after write, iclass 13, count 0 2006.229.12:05:00.26#ibcon#*before return 0, iclass 13, count 0 2006.229.12:05:00.26#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:05:00.26#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:05:00.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:05:00.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:05:00.26$vck44/vblo=8,744.99 2006.229.12:05:00.26#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.12:05:00.26#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.12:05:00.26#ibcon#ireg 17 cls_cnt 0 2006.229.12:05:00.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:05:00.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:05:00.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:05:00.26#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:05:00.26#ibcon#first serial, iclass 15, count 0 2006.229.12:05:00.26#ibcon#enter sib2, iclass 15, count 0 2006.229.12:05:00.26#ibcon#flushed, iclass 15, count 0 2006.229.12:05:00.26#ibcon#about to write, iclass 15, count 0 2006.229.12:05:00.26#ibcon#wrote, iclass 15, count 0 2006.229.12:05:00.26#ibcon#about to read 3, iclass 15, count 0 2006.229.12:05:00.28#ibcon#read 3, iclass 15, count 0 2006.229.12:05:00.28#ibcon#about to read 4, iclass 15, count 0 2006.229.12:05:00.28#ibcon#read 4, iclass 15, count 0 2006.229.12:05:00.28#ibcon#about to read 5, iclass 15, count 0 2006.229.12:05:00.28#ibcon#read 5, iclass 15, count 0 2006.229.12:05:00.28#ibcon#about to read 6, iclass 15, count 0 2006.229.12:05:00.28#ibcon#read 6, iclass 15, count 0 2006.229.12:05:00.28#ibcon#end of sib2, iclass 15, count 0 2006.229.12:05:00.28#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:05:00.28#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:05:00.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:05:00.28#ibcon#*before write, iclass 15, count 0 2006.229.12:05:00.28#ibcon#enter sib2, iclass 15, count 0 2006.229.12:05:00.28#ibcon#flushed, iclass 15, count 0 2006.229.12:05:00.28#ibcon#about to write, iclass 15, count 0 2006.229.12:05:00.28#ibcon#wrote, iclass 15, count 0 2006.229.12:05:00.28#ibcon#about to read 3, iclass 15, count 0 2006.229.12:05:00.32#ibcon#read 3, iclass 15, count 0 2006.229.12:05:00.32#ibcon#about to read 4, iclass 15, count 0 2006.229.12:05:00.32#ibcon#read 4, iclass 15, count 0 2006.229.12:05:00.32#ibcon#about to read 5, iclass 15, count 0 2006.229.12:05:00.32#ibcon#read 5, iclass 15, count 0 2006.229.12:05:00.32#ibcon#about to read 6, iclass 15, count 0 2006.229.12:05:00.32#ibcon#read 6, iclass 15, count 0 2006.229.12:05:00.32#ibcon#end of sib2, iclass 15, count 0 2006.229.12:05:00.32#ibcon#*after write, iclass 15, count 0 2006.229.12:05:00.32#ibcon#*before return 0, iclass 15, count 0 2006.229.12:05:00.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:05:00.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:05:00.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:05:00.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:05:00.32$vck44/vb=8,4 2006.229.12:05:00.32#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.12:05:00.32#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.12:05:00.32#ibcon#ireg 11 cls_cnt 2 2006.229.12:05:00.32#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:05:00.38#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:05:00.38#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:05:00.38#ibcon#enter wrdev, iclass 17, count 2 2006.229.12:05:00.38#ibcon#first serial, iclass 17, count 2 2006.229.12:05:00.38#ibcon#enter sib2, iclass 17, count 2 2006.229.12:05:00.38#ibcon#flushed, iclass 17, count 2 2006.229.12:05:00.38#ibcon#about to write, iclass 17, count 2 2006.229.12:05:00.38#ibcon#wrote, iclass 17, count 2 2006.229.12:05:00.38#ibcon#about to read 3, iclass 17, count 2 2006.229.12:05:00.40#ibcon#read 3, iclass 17, count 2 2006.229.12:05:00.40#ibcon#about to read 4, iclass 17, count 2 2006.229.12:05:00.40#ibcon#read 4, iclass 17, count 2 2006.229.12:05:00.40#ibcon#about to read 5, iclass 17, count 2 2006.229.12:05:00.40#ibcon#read 5, iclass 17, count 2 2006.229.12:05:00.40#ibcon#about to read 6, iclass 17, count 2 2006.229.12:05:00.40#ibcon#read 6, iclass 17, count 2 2006.229.12:05:00.40#ibcon#end of sib2, iclass 17, count 2 2006.229.12:05:00.40#ibcon#*mode == 0, iclass 17, count 2 2006.229.12:05:00.40#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.12:05:00.40#ibcon#[27=AT08-04\r\n] 2006.229.12:05:00.40#ibcon#*before write, iclass 17, count 2 2006.229.12:05:00.40#ibcon#enter sib2, iclass 17, count 2 2006.229.12:05:00.40#ibcon#flushed, iclass 17, count 2 2006.229.12:05:00.40#ibcon#about to write, iclass 17, count 2 2006.229.12:05:00.40#ibcon#wrote, iclass 17, count 2 2006.229.12:05:00.40#ibcon#about to read 3, iclass 17, count 2 2006.229.12:05:00.43#ibcon#read 3, iclass 17, count 2 2006.229.12:05:00.43#ibcon#about to read 4, iclass 17, count 2 2006.229.12:05:00.43#ibcon#read 4, iclass 17, count 2 2006.229.12:05:00.43#ibcon#about to read 5, iclass 17, count 2 2006.229.12:05:00.43#ibcon#read 5, iclass 17, count 2 2006.229.12:05:00.43#ibcon#about to read 6, iclass 17, count 2 2006.229.12:05:00.43#ibcon#read 6, iclass 17, count 2 2006.229.12:05:00.43#ibcon#end of sib2, iclass 17, count 2 2006.229.12:05:00.43#ibcon#*after write, iclass 17, count 2 2006.229.12:05:00.43#ibcon#*before return 0, iclass 17, count 2 2006.229.12:05:00.43#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:05:00.43#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:05:00.43#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.12:05:00.43#ibcon#ireg 7 cls_cnt 0 2006.229.12:05:00.43#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:05:00.55#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:05:00.55#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:05:00.55#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:05:00.55#ibcon#first serial, iclass 17, count 0 2006.229.12:05:00.55#ibcon#enter sib2, iclass 17, count 0 2006.229.12:05:00.55#ibcon#flushed, iclass 17, count 0 2006.229.12:05:00.55#ibcon#about to write, iclass 17, count 0 2006.229.12:05:00.55#ibcon#wrote, iclass 17, count 0 2006.229.12:05:00.55#ibcon#about to read 3, iclass 17, count 0 2006.229.12:05:00.57#ibcon#read 3, iclass 17, count 0 2006.229.12:05:00.57#ibcon#about to read 4, iclass 17, count 0 2006.229.12:05:00.57#ibcon#read 4, iclass 17, count 0 2006.229.12:05:00.57#ibcon#about to read 5, iclass 17, count 0 2006.229.12:05:00.57#ibcon#read 5, iclass 17, count 0 2006.229.12:05:00.57#ibcon#about to read 6, iclass 17, count 0 2006.229.12:05:00.57#ibcon#read 6, iclass 17, count 0 2006.229.12:05:00.57#ibcon#end of sib2, iclass 17, count 0 2006.229.12:05:00.57#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:05:00.57#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:05:00.57#ibcon#[27=USB\r\n] 2006.229.12:05:00.57#ibcon#*before write, iclass 17, count 0 2006.229.12:05:00.57#ibcon#enter sib2, iclass 17, count 0 2006.229.12:05:00.57#ibcon#flushed, iclass 17, count 0 2006.229.12:05:00.57#ibcon#about to write, iclass 17, count 0 2006.229.12:05:00.57#ibcon#wrote, iclass 17, count 0 2006.229.12:05:00.57#ibcon#about to read 3, iclass 17, count 0 2006.229.12:05:00.60#ibcon#read 3, iclass 17, count 0 2006.229.12:05:00.60#ibcon#about to read 4, iclass 17, count 0 2006.229.12:05:00.60#ibcon#read 4, iclass 17, count 0 2006.229.12:05:00.60#ibcon#about to read 5, iclass 17, count 0 2006.229.12:05:00.60#ibcon#read 5, iclass 17, count 0 2006.229.12:05:00.60#ibcon#about to read 6, iclass 17, count 0 2006.229.12:05:00.60#ibcon#read 6, iclass 17, count 0 2006.229.12:05:00.60#ibcon#end of sib2, iclass 17, count 0 2006.229.12:05:00.60#ibcon#*after write, iclass 17, count 0 2006.229.12:05:00.60#ibcon#*before return 0, iclass 17, count 0 2006.229.12:05:00.60#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:05:00.60#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:05:00.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:05:00.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:05:00.60$vck44/vabw=wide 2006.229.12:05:00.60#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:05:00.60#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:05:00.60#ibcon#ireg 8 cls_cnt 0 2006.229.12:05:00.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:05:00.60#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:05:00.60#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:05:00.60#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:05:00.60#ibcon#first serial, iclass 19, count 0 2006.229.12:05:00.60#ibcon#enter sib2, iclass 19, count 0 2006.229.12:05:00.60#ibcon#flushed, iclass 19, count 0 2006.229.12:05:00.60#ibcon#about to write, iclass 19, count 0 2006.229.12:05:00.60#ibcon#wrote, iclass 19, count 0 2006.229.12:05:00.60#ibcon#about to read 3, iclass 19, count 0 2006.229.12:05:00.62#ibcon#read 3, iclass 19, count 0 2006.229.12:05:00.62#ibcon#about to read 4, iclass 19, count 0 2006.229.12:05:00.62#ibcon#read 4, iclass 19, count 0 2006.229.12:05:00.62#ibcon#about to read 5, iclass 19, count 0 2006.229.12:05:00.62#ibcon#read 5, iclass 19, count 0 2006.229.12:05:00.62#ibcon#about to read 6, iclass 19, count 0 2006.229.12:05:00.62#ibcon#read 6, iclass 19, count 0 2006.229.12:05:00.62#ibcon#end of sib2, iclass 19, count 0 2006.229.12:05:00.62#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:05:00.62#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:05:00.62#ibcon#[25=BW32\r\n] 2006.229.12:05:00.62#ibcon#*before write, iclass 19, count 0 2006.229.12:05:00.62#ibcon#enter sib2, iclass 19, count 0 2006.229.12:05:00.62#ibcon#flushed, iclass 19, count 0 2006.229.12:05:00.62#ibcon#about to write, iclass 19, count 0 2006.229.12:05:00.62#ibcon#wrote, iclass 19, count 0 2006.229.12:05:00.62#ibcon#about to read 3, iclass 19, count 0 2006.229.12:05:00.65#ibcon#read 3, iclass 19, count 0 2006.229.12:05:00.65#ibcon#about to read 4, iclass 19, count 0 2006.229.12:05:00.65#ibcon#read 4, iclass 19, count 0 2006.229.12:05:00.65#ibcon#about to read 5, iclass 19, count 0 2006.229.12:05:00.65#ibcon#read 5, iclass 19, count 0 2006.229.12:05:00.65#ibcon#about to read 6, iclass 19, count 0 2006.229.12:05:00.65#ibcon#read 6, iclass 19, count 0 2006.229.12:05:00.65#ibcon#end of sib2, iclass 19, count 0 2006.229.12:05:00.65#ibcon#*after write, iclass 19, count 0 2006.229.12:05:00.65#ibcon#*before return 0, iclass 19, count 0 2006.229.12:05:00.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:05:00.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:05:00.65#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:05:00.65#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:05:00.65$vck44/vbbw=wide 2006.229.12:05:00.65#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.12:05:00.65#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.12:05:00.65#ibcon#ireg 8 cls_cnt 0 2006.229.12:05:00.65#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:05:00.72#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:05:00.72#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:05:00.72#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:05:00.72#ibcon#first serial, iclass 21, count 0 2006.229.12:05:00.72#ibcon#enter sib2, iclass 21, count 0 2006.229.12:05:00.72#ibcon#flushed, iclass 21, count 0 2006.229.12:05:00.72#ibcon#about to write, iclass 21, count 0 2006.229.12:05:00.72#ibcon#wrote, iclass 21, count 0 2006.229.12:05:00.72#ibcon#about to read 3, iclass 21, count 0 2006.229.12:05:00.74#ibcon#read 3, iclass 21, count 0 2006.229.12:05:00.74#ibcon#about to read 4, iclass 21, count 0 2006.229.12:05:00.74#ibcon#read 4, iclass 21, count 0 2006.229.12:05:00.74#ibcon#about to read 5, iclass 21, count 0 2006.229.12:05:00.74#ibcon#read 5, iclass 21, count 0 2006.229.12:05:00.74#ibcon#about to read 6, iclass 21, count 0 2006.229.12:05:00.74#ibcon#read 6, iclass 21, count 0 2006.229.12:05:00.74#ibcon#end of sib2, iclass 21, count 0 2006.229.12:05:00.74#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:05:00.74#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:05:00.74#ibcon#[27=BW32\r\n] 2006.229.12:05:00.74#ibcon#*before write, iclass 21, count 0 2006.229.12:05:00.74#ibcon#enter sib2, iclass 21, count 0 2006.229.12:05:00.74#ibcon#flushed, iclass 21, count 0 2006.229.12:05:00.74#ibcon#about to write, iclass 21, count 0 2006.229.12:05:00.74#ibcon#wrote, iclass 21, count 0 2006.229.12:05:00.74#ibcon#about to read 3, iclass 21, count 0 2006.229.12:05:00.77#ibcon#read 3, iclass 21, count 0 2006.229.12:05:00.77#ibcon#about to read 4, iclass 21, count 0 2006.229.12:05:00.77#ibcon#read 4, iclass 21, count 0 2006.229.12:05:00.77#ibcon#about to read 5, iclass 21, count 0 2006.229.12:05:00.77#ibcon#read 5, iclass 21, count 0 2006.229.12:05:00.77#ibcon#about to read 6, iclass 21, count 0 2006.229.12:05:00.77#ibcon#read 6, iclass 21, count 0 2006.229.12:05:00.77#ibcon#end of sib2, iclass 21, count 0 2006.229.12:05:00.77#ibcon#*after write, iclass 21, count 0 2006.229.12:05:00.77#ibcon#*before return 0, iclass 21, count 0 2006.229.12:05:00.77#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:05:00.77#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:05:00.77#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:05:00.77#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:05:00.77$setupk4/ifdk4 2006.229.12:05:00.77$ifdk4/lo= 2006.229.12:05:00.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:05:00.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:05:00.77$ifdk4/patch= 2006.229.12:05:00.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:05:00.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:05:00.77$setupk4/!*+20s 2006.229.12:05:06.01#abcon#<5=/04 1.6 3.1 27.801001002.3\r\n> 2006.229.12:05:06.03#abcon#{5=INTERFACE CLEAR} 2006.229.12:05:06.09#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:05:15.25$setupk4/"tpicd 2006.229.12:05:15.25$setupk4/echo=off 2006.229.12:05:15.25$setupk4/xlog=off 2006.229.12:05:15.25:!2006.229.12:06:16 2006.229.12:05:35.14#trakl#Source acquired 2006.229.12:05:35.14#flagr#flagr/antenna,acquired 2006.229.12:06:16.00:preob 2006.229.12:06:16.14/onsource/TRACKING 2006.229.12:06:16.14:!2006.229.12:06:26 2006.229.12:06:26.00:"tape 2006.229.12:06:26.00:"st=record 2006.229.12:06:26.00:data_valid=on 2006.229.12:06:26.00:midob 2006.229.12:06:26.14/onsource/TRACKING 2006.229.12:06:26.14/wx/27.79,1002.3,100 2006.229.12:06:26.26/cable/+6.4083E-03 2006.229.12:06:27.35/va/01,08,usb,yes,34,36 2006.229.12:06:27.35/va/02,07,usb,yes,36,37 2006.229.12:06:27.35/va/03,06,usb,yes,45,48 2006.229.12:06:27.35/va/04,07,usb,yes,38,39 2006.229.12:06:27.35/va/05,04,usb,yes,34,34 2006.229.12:06:27.35/va/06,04,usb,yes,38,37 2006.229.12:06:27.35/va/07,05,usb,yes,33,34 2006.229.12:06:27.35/va/08,06,usb,yes,24,30 2006.229.12:06:27.58/valo/01,524.99,yes,locked 2006.229.12:06:27.58/valo/02,534.99,yes,locked 2006.229.12:06:27.58/valo/03,564.99,yes,locked 2006.229.12:06:27.58/valo/04,624.99,yes,locked 2006.229.12:06:27.58/valo/05,734.99,yes,locked 2006.229.12:06:27.58/valo/06,814.99,yes,locked 2006.229.12:06:27.58/valo/07,864.99,yes,locked 2006.229.12:06:27.58/valo/08,884.99,yes,locked 2006.229.12:06:28.67/vb/01,04,usb,yes,32,30 2006.229.12:06:28.67/vb/02,04,usb,yes,34,34 2006.229.12:06:28.67/vb/03,04,usb,yes,31,35 2006.229.12:06:28.67/vb/04,04,usb,yes,36,35 2006.229.12:06:28.67/vb/05,04,usb,yes,28,31 2006.229.12:06:28.67/vb/06,04,usb,yes,33,29 2006.229.12:06:28.67/vb/07,04,usb,yes,33,33 2006.229.12:06:28.67/vb/08,04,usb,yes,30,34 2006.229.12:06:28.90/vblo/01,629.99,yes,locked 2006.229.12:06:28.90/vblo/02,634.99,yes,locked 2006.229.12:06:28.90/vblo/03,649.99,yes,locked 2006.229.12:06:28.90/vblo/04,679.99,yes,locked 2006.229.12:06:28.90/vblo/05,709.99,yes,locked 2006.229.12:06:28.90/vblo/06,719.99,yes,locked 2006.229.12:06:28.90/vblo/07,734.99,yes,locked 2006.229.12:06:28.90/vblo/08,744.99,yes,locked 2006.229.12:06:29.05/vabw/8 2006.229.12:06:29.20/vbbw/8 2006.229.12:06:29.41/xfe/off,on,12.0 2006.229.12:06:29.80/ifatt/23,28,28,28 2006.229.12:06:30.08/fmout-gps/S +4.18E-07 2006.229.12:06:30.12:!2006.229.12:07:06 2006.229.12:07:06.00:data_valid=off 2006.229.12:07:06.00:"et 2006.229.12:07:06.00:!+3s 2006.229.12:07:09.01:"tape 2006.229.12:07:09.01:postob 2006.229.12:07:09.09/cable/+6.4067E-03 2006.229.12:07:09.09/wx/27.79,1002.4,100 2006.229.12:07:10.08/fmout-gps/S +4.18E-07 2006.229.12:07:10.08:scan_name=229-1212,jd0608,190 2006.229.12:07:10.08:source=1958-179,200057.09,-174857.7,2000.0,cw 2006.229.12:07:11.14#flagr#flagr/antenna,new-source 2006.229.12:07:11.14:checkk5 2006.229.12:07:11.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:07:11.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:07:12.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:07:12.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:07:13.10/chk_obsdata//k5ts1/T2291206??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:07:13.51/chk_obsdata//k5ts2/T2291206??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:07:13.93/chk_obsdata//k5ts3/T2291206??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:07:14.32/chk_obsdata//k5ts4/T2291206??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:07:15.06/k5log//k5ts1_log_newline 2006.229.12:07:15.77/k5log//k5ts2_log_newline 2006.229.12:07:16.49/k5log//k5ts3_log_newline 2006.229.12:07:17.21/k5log//k5ts4_log_newline 2006.229.12:07:17.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:07:17.23:setupk4=1 2006.229.12:07:17.23$setupk4/echo=on 2006.229.12:07:17.23$setupk4/pcalon 2006.229.12:07:17.23$pcalon/"no phase cal control is implemented here 2006.229.12:07:17.23$setupk4/"tpicd=stop 2006.229.12:07:17.23$setupk4/"rec=synch_on 2006.229.12:07:17.23$setupk4/"rec_mode=128 2006.229.12:07:17.23$setupk4/!* 2006.229.12:07:17.23$setupk4/recpk4 2006.229.12:07:17.23$recpk4/recpatch= 2006.229.12:07:17.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:07:17.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:07:17.23$setupk4/vck44 2006.229.12:07:17.23$vck44/valo=1,524.99 2006.229.12:07:17.23#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.12:07:17.23#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.12:07:17.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:17.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:17.23#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:17.23#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:17.23#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:07:17.23#ibcon#first serial, iclass 4, count 0 2006.229.12:07:17.23#ibcon#enter sib2, iclass 4, count 0 2006.229.12:07:17.23#ibcon#flushed, iclass 4, count 0 2006.229.12:07:17.23#ibcon#about to write, iclass 4, count 0 2006.229.12:07:17.23#ibcon#wrote, iclass 4, count 0 2006.229.12:07:17.23#ibcon#about to read 3, iclass 4, count 0 2006.229.12:07:17.25#ibcon#read 3, iclass 4, count 0 2006.229.12:07:17.25#ibcon#about to read 4, iclass 4, count 0 2006.229.12:07:17.25#ibcon#read 4, iclass 4, count 0 2006.229.12:07:17.25#ibcon#about to read 5, iclass 4, count 0 2006.229.12:07:17.25#ibcon#read 5, iclass 4, count 0 2006.229.12:07:17.25#ibcon#about to read 6, iclass 4, count 0 2006.229.12:07:17.25#ibcon#read 6, iclass 4, count 0 2006.229.12:07:17.25#ibcon#end of sib2, iclass 4, count 0 2006.229.12:07:17.25#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:07:17.25#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:07:17.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:07:17.25#ibcon#*before write, iclass 4, count 0 2006.229.12:07:17.25#ibcon#enter sib2, iclass 4, count 0 2006.229.12:07:17.25#ibcon#flushed, iclass 4, count 0 2006.229.12:07:17.25#ibcon#about to write, iclass 4, count 0 2006.229.12:07:17.25#ibcon#wrote, iclass 4, count 0 2006.229.12:07:17.25#ibcon#about to read 3, iclass 4, count 0 2006.229.12:07:17.30#ibcon#read 3, iclass 4, count 0 2006.229.12:07:17.30#ibcon#about to read 4, iclass 4, count 0 2006.229.12:07:17.30#ibcon#read 4, iclass 4, count 0 2006.229.12:07:17.30#ibcon#about to read 5, iclass 4, count 0 2006.229.12:07:17.30#ibcon#read 5, iclass 4, count 0 2006.229.12:07:17.30#ibcon#about to read 6, iclass 4, count 0 2006.229.12:07:17.30#ibcon#read 6, iclass 4, count 0 2006.229.12:07:17.30#ibcon#end of sib2, iclass 4, count 0 2006.229.12:07:17.30#ibcon#*after write, iclass 4, count 0 2006.229.12:07:17.30#ibcon#*before return 0, iclass 4, count 0 2006.229.12:07:17.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:17.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:17.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:07:17.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:07:17.30$vck44/va=1,8 2006.229.12:07:17.30#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.12:07:17.30#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.12:07:17.30#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:17.30#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:17.30#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:17.30#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:17.30#ibcon#enter wrdev, iclass 6, count 2 2006.229.12:07:17.30#ibcon#first serial, iclass 6, count 2 2006.229.12:07:17.30#ibcon#enter sib2, iclass 6, count 2 2006.229.12:07:17.30#ibcon#flushed, iclass 6, count 2 2006.229.12:07:17.30#ibcon#about to write, iclass 6, count 2 2006.229.12:07:17.30#ibcon#wrote, iclass 6, count 2 2006.229.12:07:17.30#ibcon#about to read 3, iclass 6, count 2 2006.229.12:07:17.32#ibcon#read 3, iclass 6, count 2 2006.229.12:07:17.32#ibcon#about to read 4, iclass 6, count 2 2006.229.12:07:17.32#ibcon#read 4, iclass 6, count 2 2006.229.12:07:17.32#ibcon#about to read 5, iclass 6, count 2 2006.229.12:07:17.32#ibcon#read 5, iclass 6, count 2 2006.229.12:07:17.32#ibcon#about to read 6, iclass 6, count 2 2006.229.12:07:17.32#ibcon#read 6, iclass 6, count 2 2006.229.12:07:17.32#ibcon#end of sib2, iclass 6, count 2 2006.229.12:07:17.32#ibcon#*mode == 0, iclass 6, count 2 2006.229.12:07:17.32#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.12:07:17.32#ibcon#[25=AT01-08\r\n] 2006.229.12:07:17.32#ibcon#*before write, iclass 6, count 2 2006.229.12:07:17.32#ibcon#enter sib2, iclass 6, count 2 2006.229.12:07:17.32#ibcon#flushed, iclass 6, count 2 2006.229.12:07:17.32#ibcon#about to write, iclass 6, count 2 2006.229.12:07:17.32#ibcon#wrote, iclass 6, count 2 2006.229.12:07:17.32#ibcon#about to read 3, iclass 6, count 2 2006.229.12:07:17.35#ibcon#read 3, iclass 6, count 2 2006.229.12:07:17.35#ibcon#about to read 4, iclass 6, count 2 2006.229.12:07:17.35#ibcon#read 4, iclass 6, count 2 2006.229.12:07:17.35#ibcon#about to read 5, iclass 6, count 2 2006.229.12:07:17.35#ibcon#read 5, iclass 6, count 2 2006.229.12:07:17.35#ibcon#about to read 6, iclass 6, count 2 2006.229.12:07:17.35#ibcon#read 6, iclass 6, count 2 2006.229.12:07:17.35#ibcon#end of sib2, iclass 6, count 2 2006.229.12:07:17.35#ibcon#*after write, iclass 6, count 2 2006.229.12:07:17.35#ibcon#*before return 0, iclass 6, count 2 2006.229.12:07:17.35#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:17.35#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:17.35#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.12:07:17.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:17.35#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:17.47#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:17.47#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:17.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:07:17.47#ibcon#first serial, iclass 6, count 0 2006.229.12:07:17.47#ibcon#enter sib2, iclass 6, count 0 2006.229.12:07:17.47#ibcon#flushed, iclass 6, count 0 2006.229.12:07:17.47#ibcon#about to write, iclass 6, count 0 2006.229.12:07:17.47#ibcon#wrote, iclass 6, count 0 2006.229.12:07:17.47#ibcon#about to read 3, iclass 6, count 0 2006.229.12:07:17.49#ibcon#read 3, iclass 6, count 0 2006.229.12:07:17.49#ibcon#about to read 4, iclass 6, count 0 2006.229.12:07:17.49#ibcon#read 4, iclass 6, count 0 2006.229.12:07:17.49#ibcon#about to read 5, iclass 6, count 0 2006.229.12:07:17.49#ibcon#read 5, iclass 6, count 0 2006.229.12:07:17.49#ibcon#about to read 6, iclass 6, count 0 2006.229.12:07:17.49#ibcon#read 6, iclass 6, count 0 2006.229.12:07:17.49#ibcon#end of sib2, iclass 6, count 0 2006.229.12:07:17.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:07:17.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:07:17.49#ibcon#[25=USB\r\n] 2006.229.12:07:17.49#ibcon#*before write, iclass 6, count 0 2006.229.12:07:17.49#ibcon#enter sib2, iclass 6, count 0 2006.229.12:07:17.49#ibcon#flushed, iclass 6, count 0 2006.229.12:07:17.49#ibcon#about to write, iclass 6, count 0 2006.229.12:07:17.49#ibcon#wrote, iclass 6, count 0 2006.229.12:07:17.49#ibcon#about to read 3, iclass 6, count 0 2006.229.12:07:17.52#ibcon#read 3, iclass 6, count 0 2006.229.12:07:17.52#ibcon#about to read 4, iclass 6, count 0 2006.229.12:07:17.52#ibcon#read 4, iclass 6, count 0 2006.229.12:07:17.52#ibcon#about to read 5, iclass 6, count 0 2006.229.12:07:17.52#ibcon#read 5, iclass 6, count 0 2006.229.12:07:17.52#ibcon#about to read 6, iclass 6, count 0 2006.229.12:07:17.52#ibcon#read 6, iclass 6, count 0 2006.229.12:07:17.52#ibcon#end of sib2, iclass 6, count 0 2006.229.12:07:17.52#ibcon#*after write, iclass 6, count 0 2006.229.12:07:17.52#ibcon#*before return 0, iclass 6, count 0 2006.229.12:07:17.52#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:17.52#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:17.52#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:07:17.52#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:07:17.52$vck44/valo=2,534.99 2006.229.12:07:17.52#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.12:07:17.52#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.12:07:17.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:17.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:17.52#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:17.52#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:17.52#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:07:17.52#ibcon#first serial, iclass 10, count 0 2006.229.12:07:17.52#ibcon#enter sib2, iclass 10, count 0 2006.229.12:07:17.52#ibcon#flushed, iclass 10, count 0 2006.229.12:07:17.52#ibcon#about to write, iclass 10, count 0 2006.229.12:07:17.52#ibcon#wrote, iclass 10, count 0 2006.229.12:07:17.52#ibcon#about to read 3, iclass 10, count 0 2006.229.12:07:17.54#ibcon#read 3, iclass 10, count 0 2006.229.12:07:17.54#ibcon#about to read 4, iclass 10, count 0 2006.229.12:07:17.54#ibcon#read 4, iclass 10, count 0 2006.229.12:07:17.54#ibcon#about to read 5, iclass 10, count 0 2006.229.12:07:17.54#ibcon#read 5, iclass 10, count 0 2006.229.12:07:17.54#ibcon#about to read 6, iclass 10, count 0 2006.229.12:07:17.54#ibcon#read 6, iclass 10, count 0 2006.229.12:07:17.54#ibcon#end of sib2, iclass 10, count 0 2006.229.12:07:17.54#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:07:17.54#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:07:17.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:07:17.54#ibcon#*before write, iclass 10, count 0 2006.229.12:07:17.54#ibcon#enter sib2, iclass 10, count 0 2006.229.12:07:17.54#ibcon#flushed, iclass 10, count 0 2006.229.12:07:17.54#ibcon#about to write, iclass 10, count 0 2006.229.12:07:17.54#ibcon#wrote, iclass 10, count 0 2006.229.12:07:17.54#ibcon#about to read 3, iclass 10, count 0 2006.229.12:07:17.58#ibcon#read 3, iclass 10, count 0 2006.229.12:07:17.58#ibcon#about to read 4, iclass 10, count 0 2006.229.12:07:17.58#ibcon#read 4, iclass 10, count 0 2006.229.12:07:17.58#ibcon#about to read 5, iclass 10, count 0 2006.229.12:07:17.58#ibcon#read 5, iclass 10, count 0 2006.229.12:07:17.58#ibcon#about to read 6, iclass 10, count 0 2006.229.12:07:17.58#ibcon#read 6, iclass 10, count 0 2006.229.12:07:17.58#ibcon#end of sib2, iclass 10, count 0 2006.229.12:07:17.58#ibcon#*after write, iclass 10, count 0 2006.229.12:07:17.58#ibcon#*before return 0, iclass 10, count 0 2006.229.12:07:17.58#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:17.58#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:17.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:07:17.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:07:17.58$vck44/va=2,7 2006.229.12:07:17.58#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.12:07:17.58#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.12:07:17.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:17.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:17.64#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:17.64#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:17.64#ibcon#enter wrdev, iclass 12, count 2 2006.229.12:07:17.64#ibcon#first serial, iclass 12, count 2 2006.229.12:07:17.64#ibcon#enter sib2, iclass 12, count 2 2006.229.12:07:17.64#ibcon#flushed, iclass 12, count 2 2006.229.12:07:17.64#ibcon#about to write, iclass 12, count 2 2006.229.12:07:17.64#ibcon#wrote, iclass 12, count 2 2006.229.12:07:17.64#ibcon#about to read 3, iclass 12, count 2 2006.229.12:07:17.66#ibcon#read 3, iclass 12, count 2 2006.229.12:07:17.66#ibcon#about to read 4, iclass 12, count 2 2006.229.12:07:17.66#ibcon#read 4, iclass 12, count 2 2006.229.12:07:17.66#ibcon#about to read 5, iclass 12, count 2 2006.229.12:07:17.66#ibcon#read 5, iclass 12, count 2 2006.229.12:07:17.66#ibcon#about to read 6, iclass 12, count 2 2006.229.12:07:17.66#ibcon#read 6, iclass 12, count 2 2006.229.12:07:17.66#ibcon#end of sib2, iclass 12, count 2 2006.229.12:07:17.66#ibcon#*mode == 0, iclass 12, count 2 2006.229.12:07:17.66#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.12:07:17.66#ibcon#[25=AT02-07\r\n] 2006.229.12:07:17.66#ibcon#*before write, iclass 12, count 2 2006.229.12:07:17.66#ibcon#enter sib2, iclass 12, count 2 2006.229.12:07:17.66#ibcon#flushed, iclass 12, count 2 2006.229.12:07:17.66#ibcon#about to write, iclass 12, count 2 2006.229.12:07:17.66#ibcon#wrote, iclass 12, count 2 2006.229.12:07:17.66#ibcon#about to read 3, iclass 12, count 2 2006.229.12:07:17.69#ibcon#read 3, iclass 12, count 2 2006.229.12:07:17.69#ibcon#about to read 4, iclass 12, count 2 2006.229.12:07:17.69#ibcon#read 4, iclass 12, count 2 2006.229.12:07:17.69#ibcon#about to read 5, iclass 12, count 2 2006.229.12:07:17.69#ibcon#read 5, iclass 12, count 2 2006.229.12:07:17.69#ibcon#about to read 6, iclass 12, count 2 2006.229.12:07:17.69#ibcon#read 6, iclass 12, count 2 2006.229.12:07:17.69#ibcon#end of sib2, iclass 12, count 2 2006.229.12:07:17.69#ibcon#*after write, iclass 12, count 2 2006.229.12:07:17.69#ibcon#*before return 0, iclass 12, count 2 2006.229.12:07:17.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:17.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:17.69#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.12:07:17.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:17.69#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:17.81#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:17.81#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:17.81#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:07:17.81#ibcon#first serial, iclass 12, count 0 2006.229.12:07:17.81#ibcon#enter sib2, iclass 12, count 0 2006.229.12:07:17.81#ibcon#flushed, iclass 12, count 0 2006.229.12:07:17.81#ibcon#about to write, iclass 12, count 0 2006.229.12:07:17.81#ibcon#wrote, iclass 12, count 0 2006.229.12:07:17.81#ibcon#about to read 3, iclass 12, count 0 2006.229.12:07:17.83#ibcon#read 3, iclass 12, count 0 2006.229.12:07:17.83#ibcon#about to read 4, iclass 12, count 0 2006.229.12:07:17.83#ibcon#read 4, iclass 12, count 0 2006.229.12:07:17.83#ibcon#about to read 5, iclass 12, count 0 2006.229.12:07:17.83#ibcon#read 5, iclass 12, count 0 2006.229.12:07:17.83#ibcon#about to read 6, iclass 12, count 0 2006.229.12:07:17.83#ibcon#read 6, iclass 12, count 0 2006.229.12:07:17.83#ibcon#end of sib2, iclass 12, count 0 2006.229.12:07:17.83#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:07:17.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:07:17.83#ibcon#[25=USB\r\n] 2006.229.12:07:17.83#ibcon#*before write, iclass 12, count 0 2006.229.12:07:17.83#ibcon#enter sib2, iclass 12, count 0 2006.229.12:07:17.83#ibcon#flushed, iclass 12, count 0 2006.229.12:07:17.83#ibcon#about to write, iclass 12, count 0 2006.229.12:07:17.83#ibcon#wrote, iclass 12, count 0 2006.229.12:07:17.83#ibcon#about to read 3, iclass 12, count 0 2006.229.12:07:17.86#ibcon#read 3, iclass 12, count 0 2006.229.12:07:17.86#ibcon#about to read 4, iclass 12, count 0 2006.229.12:07:17.86#ibcon#read 4, iclass 12, count 0 2006.229.12:07:17.86#ibcon#about to read 5, iclass 12, count 0 2006.229.12:07:17.86#ibcon#read 5, iclass 12, count 0 2006.229.12:07:17.86#ibcon#about to read 6, iclass 12, count 0 2006.229.12:07:17.86#ibcon#read 6, iclass 12, count 0 2006.229.12:07:17.86#ibcon#end of sib2, iclass 12, count 0 2006.229.12:07:17.86#ibcon#*after write, iclass 12, count 0 2006.229.12:07:17.86#ibcon#*before return 0, iclass 12, count 0 2006.229.12:07:17.86#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:17.86#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:17.86#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:07:17.86#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:07:17.86$vck44/valo=3,564.99 2006.229.12:07:17.86#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:07:17.86#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:07:17.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:17.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:17.86#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:17.86#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:17.86#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:07:17.86#ibcon#first serial, iclass 14, count 0 2006.229.12:07:17.86#ibcon#enter sib2, iclass 14, count 0 2006.229.12:07:17.86#ibcon#flushed, iclass 14, count 0 2006.229.12:07:17.86#ibcon#about to write, iclass 14, count 0 2006.229.12:07:17.86#ibcon#wrote, iclass 14, count 0 2006.229.12:07:17.86#ibcon#about to read 3, iclass 14, count 0 2006.229.12:07:17.88#ibcon#read 3, iclass 14, count 0 2006.229.12:07:17.88#ibcon#about to read 4, iclass 14, count 0 2006.229.12:07:17.88#ibcon#read 4, iclass 14, count 0 2006.229.12:07:17.88#ibcon#about to read 5, iclass 14, count 0 2006.229.12:07:17.88#ibcon#read 5, iclass 14, count 0 2006.229.12:07:17.88#ibcon#about to read 6, iclass 14, count 0 2006.229.12:07:17.88#ibcon#read 6, iclass 14, count 0 2006.229.12:07:17.88#ibcon#end of sib2, iclass 14, count 0 2006.229.12:07:17.88#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:07:17.88#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:07:17.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:07:17.88#ibcon#*before write, iclass 14, count 0 2006.229.12:07:17.88#ibcon#enter sib2, iclass 14, count 0 2006.229.12:07:17.88#ibcon#flushed, iclass 14, count 0 2006.229.12:07:17.88#ibcon#about to write, iclass 14, count 0 2006.229.12:07:17.88#ibcon#wrote, iclass 14, count 0 2006.229.12:07:17.88#ibcon#about to read 3, iclass 14, count 0 2006.229.12:07:17.92#ibcon#read 3, iclass 14, count 0 2006.229.12:07:17.92#ibcon#about to read 4, iclass 14, count 0 2006.229.12:07:17.92#ibcon#read 4, iclass 14, count 0 2006.229.12:07:17.92#ibcon#about to read 5, iclass 14, count 0 2006.229.12:07:17.92#ibcon#read 5, iclass 14, count 0 2006.229.12:07:17.92#ibcon#about to read 6, iclass 14, count 0 2006.229.12:07:17.92#ibcon#read 6, iclass 14, count 0 2006.229.12:07:17.92#ibcon#end of sib2, iclass 14, count 0 2006.229.12:07:17.92#ibcon#*after write, iclass 14, count 0 2006.229.12:07:17.92#ibcon#*before return 0, iclass 14, count 0 2006.229.12:07:17.92#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:17.92#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:17.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:07:17.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:07:17.92$vck44/va=3,6 2006.229.12:07:17.92#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.12:07:17.92#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.12:07:17.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:17.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:17.98#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:17.98#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:17.98#ibcon#enter wrdev, iclass 16, count 2 2006.229.12:07:17.98#ibcon#first serial, iclass 16, count 2 2006.229.12:07:17.98#ibcon#enter sib2, iclass 16, count 2 2006.229.12:07:17.98#ibcon#flushed, iclass 16, count 2 2006.229.12:07:17.98#ibcon#about to write, iclass 16, count 2 2006.229.12:07:17.98#ibcon#wrote, iclass 16, count 2 2006.229.12:07:17.98#ibcon#about to read 3, iclass 16, count 2 2006.229.12:07:18.00#ibcon#read 3, iclass 16, count 2 2006.229.12:07:18.00#ibcon#about to read 4, iclass 16, count 2 2006.229.12:07:18.00#ibcon#read 4, iclass 16, count 2 2006.229.12:07:18.00#ibcon#about to read 5, iclass 16, count 2 2006.229.12:07:18.00#ibcon#read 5, iclass 16, count 2 2006.229.12:07:18.00#ibcon#about to read 6, iclass 16, count 2 2006.229.12:07:18.00#ibcon#read 6, iclass 16, count 2 2006.229.12:07:18.00#ibcon#end of sib2, iclass 16, count 2 2006.229.12:07:18.00#ibcon#*mode == 0, iclass 16, count 2 2006.229.12:07:18.00#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.12:07:18.00#ibcon#[25=AT03-06\r\n] 2006.229.12:07:18.00#ibcon#*before write, iclass 16, count 2 2006.229.12:07:18.00#ibcon#enter sib2, iclass 16, count 2 2006.229.12:07:18.00#ibcon#flushed, iclass 16, count 2 2006.229.12:07:18.00#ibcon#about to write, iclass 16, count 2 2006.229.12:07:18.00#ibcon#wrote, iclass 16, count 2 2006.229.12:07:18.00#ibcon#about to read 3, iclass 16, count 2 2006.229.12:07:18.03#ibcon#read 3, iclass 16, count 2 2006.229.12:07:18.03#ibcon#about to read 4, iclass 16, count 2 2006.229.12:07:18.03#ibcon#read 4, iclass 16, count 2 2006.229.12:07:18.03#ibcon#about to read 5, iclass 16, count 2 2006.229.12:07:18.03#ibcon#read 5, iclass 16, count 2 2006.229.12:07:18.03#ibcon#about to read 6, iclass 16, count 2 2006.229.12:07:18.03#ibcon#read 6, iclass 16, count 2 2006.229.12:07:18.03#ibcon#end of sib2, iclass 16, count 2 2006.229.12:07:18.03#ibcon#*after write, iclass 16, count 2 2006.229.12:07:18.03#ibcon#*before return 0, iclass 16, count 2 2006.229.12:07:18.03#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:18.03#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:18.03#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.12:07:18.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:18.03#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:18.15#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:18.15#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:18.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:07:18.15#ibcon#first serial, iclass 16, count 0 2006.229.12:07:18.15#ibcon#enter sib2, iclass 16, count 0 2006.229.12:07:18.15#ibcon#flushed, iclass 16, count 0 2006.229.12:07:18.15#ibcon#about to write, iclass 16, count 0 2006.229.12:07:18.15#ibcon#wrote, iclass 16, count 0 2006.229.12:07:18.15#ibcon#about to read 3, iclass 16, count 0 2006.229.12:07:18.17#ibcon#read 3, iclass 16, count 0 2006.229.12:07:18.17#ibcon#about to read 4, iclass 16, count 0 2006.229.12:07:18.17#ibcon#read 4, iclass 16, count 0 2006.229.12:07:18.17#ibcon#about to read 5, iclass 16, count 0 2006.229.12:07:18.17#ibcon#read 5, iclass 16, count 0 2006.229.12:07:18.17#ibcon#about to read 6, iclass 16, count 0 2006.229.12:07:18.17#ibcon#read 6, iclass 16, count 0 2006.229.12:07:18.17#ibcon#end of sib2, iclass 16, count 0 2006.229.12:07:18.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:07:18.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:07:18.17#ibcon#[25=USB\r\n] 2006.229.12:07:18.17#ibcon#*before write, iclass 16, count 0 2006.229.12:07:18.17#ibcon#enter sib2, iclass 16, count 0 2006.229.12:07:18.17#ibcon#flushed, iclass 16, count 0 2006.229.12:07:18.17#ibcon#about to write, iclass 16, count 0 2006.229.12:07:18.17#ibcon#wrote, iclass 16, count 0 2006.229.12:07:18.17#ibcon#about to read 3, iclass 16, count 0 2006.229.12:07:18.20#ibcon#read 3, iclass 16, count 0 2006.229.12:07:18.20#ibcon#about to read 4, iclass 16, count 0 2006.229.12:07:18.20#ibcon#read 4, iclass 16, count 0 2006.229.12:07:18.20#ibcon#about to read 5, iclass 16, count 0 2006.229.12:07:18.20#ibcon#read 5, iclass 16, count 0 2006.229.12:07:18.20#ibcon#about to read 6, iclass 16, count 0 2006.229.12:07:18.20#ibcon#read 6, iclass 16, count 0 2006.229.12:07:18.20#ibcon#end of sib2, iclass 16, count 0 2006.229.12:07:18.20#ibcon#*after write, iclass 16, count 0 2006.229.12:07:18.20#ibcon#*before return 0, iclass 16, count 0 2006.229.12:07:18.20#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:18.20#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:18.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:07:18.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:07:18.20$vck44/valo=4,624.99 2006.229.12:07:18.20#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:07:18.20#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:07:18.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:18.20#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:07:18.20#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:07:18.20#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:07:18.20#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:07:18.20#ibcon#first serial, iclass 19, count 0 2006.229.12:07:18.20#ibcon#enter sib2, iclass 19, count 0 2006.229.12:07:18.20#ibcon#flushed, iclass 19, count 0 2006.229.12:07:18.20#ibcon#about to write, iclass 19, count 0 2006.229.12:07:18.20#ibcon#wrote, iclass 19, count 0 2006.229.12:07:18.20#ibcon#about to read 3, iclass 19, count 0 2006.229.12:07:18.22#ibcon#read 3, iclass 19, count 0 2006.229.12:07:18.22#ibcon#about to read 4, iclass 19, count 0 2006.229.12:07:18.22#ibcon#read 4, iclass 19, count 0 2006.229.12:07:18.22#ibcon#about to read 5, iclass 19, count 0 2006.229.12:07:18.22#ibcon#read 5, iclass 19, count 0 2006.229.12:07:18.22#ibcon#about to read 6, iclass 19, count 0 2006.229.12:07:18.22#ibcon#read 6, iclass 19, count 0 2006.229.12:07:18.22#ibcon#end of sib2, iclass 19, count 0 2006.229.12:07:18.22#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:07:18.22#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:07:18.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:07:18.22#ibcon#*before write, iclass 19, count 0 2006.229.12:07:18.22#ibcon#enter sib2, iclass 19, count 0 2006.229.12:07:18.22#ibcon#flushed, iclass 19, count 0 2006.229.12:07:18.22#ibcon#about to write, iclass 19, count 0 2006.229.12:07:18.22#ibcon#wrote, iclass 19, count 0 2006.229.12:07:18.22#ibcon#about to read 3, iclass 19, count 0 2006.229.12:07:18.22#abcon#<5=/04 1.6 3.1 27.781001002.4\r\n> 2006.229.12:07:18.24#abcon#{5=INTERFACE CLEAR} 2006.229.12:07:18.26#ibcon#read 3, iclass 19, count 0 2006.229.12:07:18.26#ibcon#about to read 4, iclass 19, count 0 2006.229.12:07:18.26#ibcon#read 4, iclass 19, count 0 2006.229.12:07:18.26#ibcon#about to read 5, iclass 19, count 0 2006.229.12:07:18.26#ibcon#read 5, iclass 19, count 0 2006.229.12:07:18.26#ibcon#about to read 6, iclass 19, count 0 2006.229.12:07:18.26#ibcon#read 6, iclass 19, count 0 2006.229.12:07:18.26#ibcon#end of sib2, iclass 19, count 0 2006.229.12:07:18.26#ibcon#*after write, iclass 19, count 0 2006.229.12:07:18.26#ibcon#*before return 0, iclass 19, count 0 2006.229.12:07:18.26#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:07:18.26#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:07:18.26#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:07:18.26#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:07:18.26$vck44/va=4,7 2006.229.12:07:18.26#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.12:07:18.26#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.12:07:18.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:18.26#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:07:18.30#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:07:18.32#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:07:18.32#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:07:18.32#ibcon#enter wrdev, iclass 23, count 2 2006.229.12:07:18.32#ibcon#first serial, iclass 23, count 2 2006.229.12:07:18.32#ibcon#enter sib2, iclass 23, count 2 2006.229.12:07:18.32#ibcon#flushed, iclass 23, count 2 2006.229.12:07:18.32#ibcon#about to write, iclass 23, count 2 2006.229.12:07:18.32#ibcon#wrote, iclass 23, count 2 2006.229.12:07:18.32#ibcon#about to read 3, iclass 23, count 2 2006.229.12:07:18.34#ibcon#read 3, iclass 23, count 2 2006.229.12:07:18.34#ibcon#about to read 4, iclass 23, count 2 2006.229.12:07:18.34#ibcon#read 4, iclass 23, count 2 2006.229.12:07:18.34#ibcon#about to read 5, iclass 23, count 2 2006.229.12:07:18.34#ibcon#read 5, iclass 23, count 2 2006.229.12:07:18.34#ibcon#about to read 6, iclass 23, count 2 2006.229.12:07:18.34#ibcon#read 6, iclass 23, count 2 2006.229.12:07:18.34#ibcon#end of sib2, iclass 23, count 2 2006.229.12:07:18.34#ibcon#*mode == 0, iclass 23, count 2 2006.229.12:07:18.34#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.12:07:18.34#ibcon#[25=AT04-07\r\n] 2006.229.12:07:18.34#ibcon#*before write, iclass 23, count 2 2006.229.12:07:18.34#ibcon#enter sib2, iclass 23, count 2 2006.229.12:07:18.34#ibcon#flushed, iclass 23, count 2 2006.229.12:07:18.34#ibcon#about to write, iclass 23, count 2 2006.229.12:07:18.34#ibcon#wrote, iclass 23, count 2 2006.229.12:07:18.34#ibcon#about to read 3, iclass 23, count 2 2006.229.12:07:18.37#ibcon#read 3, iclass 23, count 2 2006.229.12:07:18.37#ibcon#about to read 4, iclass 23, count 2 2006.229.12:07:18.37#ibcon#read 4, iclass 23, count 2 2006.229.12:07:18.37#ibcon#about to read 5, iclass 23, count 2 2006.229.12:07:18.37#ibcon#read 5, iclass 23, count 2 2006.229.12:07:18.37#ibcon#about to read 6, iclass 23, count 2 2006.229.12:07:18.37#ibcon#read 6, iclass 23, count 2 2006.229.12:07:18.37#ibcon#end of sib2, iclass 23, count 2 2006.229.12:07:18.37#ibcon#*after write, iclass 23, count 2 2006.229.12:07:18.37#ibcon#*before return 0, iclass 23, count 2 2006.229.12:07:18.37#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:07:18.37#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:07:18.37#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.12:07:18.37#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:18.37#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:07:18.49#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:07:18.49#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:07:18.49#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:07:18.49#ibcon#first serial, iclass 23, count 0 2006.229.12:07:18.49#ibcon#enter sib2, iclass 23, count 0 2006.229.12:07:18.49#ibcon#flushed, iclass 23, count 0 2006.229.12:07:18.49#ibcon#about to write, iclass 23, count 0 2006.229.12:07:18.49#ibcon#wrote, iclass 23, count 0 2006.229.12:07:18.49#ibcon#about to read 3, iclass 23, count 0 2006.229.12:07:18.51#ibcon#read 3, iclass 23, count 0 2006.229.12:07:18.51#ibcon#about to read 4, iclass 23, count 0 2006.229.12:07:18.51#ibcon#read 4, iclass 23, count 0 2006.229.12:07:18.51#ibcon#about to read 5, iclass 23, count 0 2006.229.12:07:18.51#ibcon#read 5, iclass 23, count 0 2006.229.12:07:18.51#ibcon#about to read 6, iclass 23, count 0 2006.229.12:07:18.51#ibcon#read 6, iclass 23, count 0 2006.229.12:07:18.51#ibcon#end of sib2, iclass 23, count 0 2006.229.12:07:18.51#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:07:18.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:07:18.51#ibcon#[25=USB\r\n] 2006.229.12:07:18.51#ibcon#*before write, iclass 23, count 0 2006.229.12:07:18.51#ibcon#enter sib2, iclass 23, count 0 2006.229.12:07:18.51#ibcon#flushed, iclass 23, count 0 2006.229.12:07:18.51#ibcon#about to write, iclass 23, count 0 2006.229.12:07:18.51#ibcon#wrote, iclass 23, count 0 2006.229.12:07:18.51#ibcon#about to read 3, iclass 23, count 0 2006.229.12:07:18.54#ibcon#read 3, iclass 23, count 0 2006.229.12:07:18.54#ibcon#about to read 4, iclass 23, count 0 2006.229.12:07:18.54#ibcon#read 4, iclass 23, count 0 2006.229.12:07:18.54#ibcon#about to read 5, iclass 23, count 0 2006.229.12:07:18.54#ibcon#read 5, iclass 23, count 0 2006.229.12:07:18.54#ibcon#about to read 6, iclass 23, count 0 2006.229.12:07:18.54#ibcon#read 6, iclass 23, count 0 2006.229.12:07:18.54#ibcon#end of sib2, iclass 23, count 0 2006.229.12:07:18.54#ibcon#*after write, iclass 23, count 0 2006.229.12:07:18.54#ibcon#*before return 0, iclass 23, count 0 2006.229.12:07:18.54#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:07:18.54#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:07:18.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:07:18.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:07:18.54$vck44/valo=5,734.99 2006.229.12:07:18.54#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:07:18.54#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:07:18.54#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:18.54#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:18.54#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:18.54#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:18.54#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:07:18.54#ibcon#first serial, iclass 26, count 0 2006.229.12:07:18.54#ibcon#enter sib2, iclass 26, count 0 2006.229.12:07:18.54#ibcon#flushed, iclass 26, count 0 2006.229.12:07:18.54#ibcon#about to write, iclass 26, count 0 2006.229.12:07:18.54#ibcon#wrote, iclass 26, count 0 2006.229.12:07:18.54#ibcon#about to read 3, iclass 26, count 0 2006.229.12:07:18.56#ibcon#read 3, iclass 26, count 0 2006.229.12:07:18.56#ibcon#about to read 4, iclass 26, count 0 2006.229.12:07:18.56#ibcon#read 4, iclass 26, count 0 2006.229.12:07:18.56#ibcon#about to read 5, iclass 26, count 0 2006.229.12:07:18.56#ibcon#read 5, iclass 26, count 0 2006.229.12:07:18.56#ibcon#about to read 6, iclass 26, count 0 2006.229.12:07:18.56#ibcon#read 6, iclass 26, count 0 2006.229.12:07:18.56#ibcon#end of sib2, iclass 26, count 0 2006.229.12:07:18.56#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:07:18.56#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:07:18.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:07:18.56#ibcon#*before write, iclass 26, count 0 2006.229.12:07:18.56#ibcon#enter sib2, iclass 26, count 0 2006.229.12:07:18.56#ibcon#flushed, iclass 26, count 0 2006.229.12:07:18.56#ibcon#about to write, iclass 26, count 0 2006.229.12:07:18.56#ibcon#wrote, iclass 26, count 0 2006.229.12:07:18.56#ibcon#about to read 3, iclass 26, count 0 2006.229.12:07:18.60#ibcon#read 3, iclass 26, count 0 2006.229.12:07:18.60#ibcon#about to read 4, iclass 26, count 0 2006.229.12:07:18.60#ibcon#read 4, iclass 26, count 0 2006.229.12:07:18.60#ibcon#about to read 5, iclass 26, count 0 2006.229.12:07:18.60#ibcon#read 5, iclass 26, count 0 2006.229.12:07:18.60#ibcon#about to read 6, iclass 26, count 0 2006.229.12:07:18.60#ibcon#read 6, iclass 26, count 0 2006.229.12:07:18.60#ibcon#end of sib2, iclass 26, count 0 2006.229.12:07:18.60#ibcon#*after write, iclass 26, count 0 2006.229.12:07:18.60#ibcon#*before return 0, iclass 26, count 0 2006.229.12:07:18.60#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:18.60#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:18.60#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:07:18.60#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:07:18.60$vck44/va=5,4 2006.229.12:07:18.60#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.12:07:18.60#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.12:07:18.60#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:18.60#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:18.66#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:18.66#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:18.66#ibcon#enter wrdev, iclass 28, count 2 2006.229.12:07:18.66#ibcon#first serial, iclass 28, count 2 2006.229.12:07:18.66#ibcon#enter sib2, iclass 28, count 2 2006.229.12:07:18.66#ibcon#flushed, iclass 28, count 2 2006.229.12:07:18.66#ibcon#about to write, iclass 28, count 2 2006.229.12:07:18.66#ibcon#wrote, iclass 28, count 2 2006.229.12:07:18.66#ibcon#about to read 3, iclass 28, count 2 2006.229.12:07:18.68#ibcon#read 3, iclass 28, count 2 2006.229.12:07:18.68#ibcon#about to read 4, iclass 28, count 2 2006.229.12:07:18.68#ibcon#read 4, iclass 28, count 2 2006.229.12:07:18.68#ibcon#about to read 5, iclass 28, count 2 2006.229.12:07:18.68#ibcon#read 5, iclass 28, count 2 2006.229.12:07:18.68#ibcon#about to read 6, iclass 28, count 2 2006.229.12:07:18.68#ibcon#read 6, iclass 28, count 2 2006.229.12:07:18.68#ibcon#end of sib2, iclass 28, count 2 2006.229.12:07:18.68#ibcon#*mode == 0, iclass 28, count 2 2006.229.12:07:18.68#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.12:07:18.68#ibcon#[25=AT05-04\r\n] 2006.229.12:07:18.68#ibcon#*before write, iclass 28, count 2 2006.229.12:07:18.68#ibcon#enter sib2, iclass 28, count 2 2006.229.12:07:18.68#ibcon#flushed, iclass 28, count 2 2006.229.12:07:18.68#ibcon#about to write, iclass 28, count 2 2006.229.12:07:18.68#ibcon#wrote, iclass 28, count 2 2006.229.12:07:18.68#ibcon#about to read 3, iclass 28, count 2 2006.229.12:07:18.71#ibcon#read 3, iclass 28, count 2 2006.229.12:07:18.71#ibcon#about to read 4, iclass 28, count 2 2006.229.12:07:18.71#ibcon#read 4, iclass 28, count 2 2006.229.12:07:18.71#ibcon#about to read 5, iclass 28, count 2 2006.229.12:07:18.71#ibcon#read 5, iclass 28, count 2 2006.229.12:07:18.71#ibcon#about to read 6, iclass 28, count 2 2006.229.12:07:18.71#ibcon#read 6, iclass 28, count 2 2006.229.12:07:18.71#ibcon#end of sib2, iclass 28, count 2 2006.229.12:07:18.71#ibcon#*after write, iclass 28, count 2 2006.229.12:07:18.71#ibcon#*before return 0, iclass 28, count 2 2006.229.12:07:18.71#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:18.71#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:18.71#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.12:07:18.71#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:18.71#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:18.83#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:18.83#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:18.83#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:07:18.83#ibcon#first serial, iclass 28, count 0 2006.229.12:07:18.83#ibcon#enter sib2, iclass 28, count 0 2006.229.12:07:18.83#ibcon#flushed, iclass 28, count 0 2006.229.12:07:18.83#ibcon#about to write, iclass 28, count 0 2006.229.12:07:18.83#ibcon#wrote, iclass 28, count 0 2006.229.12:07:18.83#ibcon#about to read 3, iclass 28, count 0 2006.229.12:07:18.85#ibcon#read 3, iclass 28, count 0 2006.229.12:07:18.85#ibcon#about to read 4, iclass 28, count 0 2006.229.12:07:18.85#ibcon#read 4, iclass 28, count 0 2006.229.12:07:18.85#ibcon#about to read 5, iclass 28, count 0 2006.229.12:07:18.85#ibcon#read 5, iclass 28, count 0 2006.229.12:07:18.85#ibcon#about to read 6, iclass 28, count 0 2006.229.12:07:18.85#ibcon#read 6, iclass 28, count 0 2006.229.12:07:18.85#ibcon#end of sib2, iclass 28, count 0 2006.229.12:07:18.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:07:18.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:07:18.85#ibcon#[25=USB\r\n] 2006.229.12:07:18.85#ibcon#*before write, iclass 28, count 0 2006.229.12:07:18.85#ibcon#enter sib2, iclass 28, count 0 2006.229.12:07:18.85#ibcon#flushed, iclass 28, count 0 2006.229.12:07:18.85#ibcon#about to write, iclass 28, count 0 2006.229.12:07:18.85#ibcon#wrote, iclass 28, count 0 2006.229.12:07:18.85#ibcon#about to read 3, iclass 28, count 0 2006.229.12:07:18.88#ibcon#read 3, iclass 28, count 0 2006.229.12:07:18.88#ibcon#about to read 4, iclass 28, count 0 2006.229.12:07:18.88#ibcon#read 4, iclass 28, count 0 2006.229.12:07:18.88#ibcon#about to read 5, iclass 28, count 0 2006.229.12:07:18.88#ibcon#read 5, iclass 28, count 0 2006.229.12:07:18.88#ibcon#about to read 6, iclass 28, count 0 2006.229.12:07:18.88#ibcon#read 6, iclass 28, count 0 2006.229.12:07:18.88#ibcon#end of sib2, iclass 28, count 0 2006.229.12:07:18.88#ibcon#*after write, iclass 28, count 0 2006.229.12:07:18.88#ibcon#*before return 0, iclass 28, count 0 2006.229.12:07:18.88#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:18.88#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:18.88#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:07:18.88#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:07:18.88$vck44/valo=6,814.99 2006.229.12:07:18.88#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.12:07:18.88#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.12:07:18.88#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:18.88#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:18.88#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:18.88#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:18.88#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:07:18.88#ibcon#first serial, iclass 30, count 0 2006.229.12:07:18.88#ibcon#enter sib2, iclass 30, count 0 2006.229.12:07:18.88#ibcon#flushed, iclass 30, count 0 2006.229.12:07:18.88#ibcon#about to write, iclass 30, count 0 2006.229.12:07:18.88#ibcon#wrote, iclass 30, count 0 2006.229.12:07:18.88#ibcon#about to read 3, iclass 30, count 0 2006.229.12:07:18.90#ibcon#read 3, iclass 30, count 0 2006.229.12:07:18.90#ibcon#about to read 4, iclass 30, count 0 2006.229.12:07:18.90#ibcon#read 4, iclass 30, count 0 2006.229.12:07:18.90#ibcon#about to read 5, iclass 30, count 0 2006.229.12:07:18.90#ibcon#read 5, iclass 30, count 0 2006.229.12:07:18.90#ibcon#about to read 6, iclass 30, count 0 2006.229.12:07:18.90#ibcon#read 6, iclass 30, count 0 2006.229.12:07:18.90#ibcon#end of sib2, iclass 30, count 0 2006.229.12:07:18.90#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:07:18.90#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:07:18.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:07:18.90#ibcon#*before write, iclass 30, count 0 2006.229.12:07:18.90#ibcon#enter sib2, iclass 30, count 0 2006.229.12:07:18.90#ibcon#flushed, iclass 30, count 0 2006.229.12:07:18.90#ibcon#about to write, iclass 30, count 0 2006.229.12:07:18.90#ibcon#wrote, iclass 30, count 0 2006.229.12:07:18.90#ibcon#about to read 3, iclass 30, count 0 2006.229.12:07:18.94#ibcon#read 3, iclass 30, count 0 2006.229.12:07:18.94#ibcon#about to read 4, iclass 30, count 0 2006.229.12:07:18.94#ibcon#read 4, iclass 30, count 0 2006.229.12:07:18.94#ibcon#about to read 5, iclass 30, count 0 2006.229.12:07:18.94#ibcon#read 5, iclass 30, count 0 2006.229.12:07:18.94#ibcon#about to read 6, iclass 30, count 0 2006.229.12:07:18.94#ibcon#read 6, iclass 30, count 0 2006.229.12:07:18.94#ibcon#end of sib2, iclass 30, count 0 2006.229.12:07:18.94#ibcon#*after write, iclass 30, count 0 2006.229.12:07:18.94#ibcon#*before return 0, iclass 30, count 0 2006.229.12:07:18.94#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:18.94#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:18.94#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:07:18.94#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:07:18.94$vck44/va=6,4 2006.229.12:07:18.94#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.12:07:18.94#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.12:07:18.94#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:18.94#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:19.00#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:19.00#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:19.00#ibcon#enter wrdev, iclass 32, count 2 2006.229.12:07:19.00#ibcon#first serial, iclass 32, count 2 2006.229.12:07:19.00#ibcon#enter sib2, iclass 32, count 2 2006.229.12:07:19.00#ibcon#flushed, iclass 32, count 2 2006.229.12:07:19.00#ibcon#about to write, iclass 32, count 2 2006.229.12:07:19.00#ibcon#wrote, iclass 32, count 2 2006.229.12:07:19.00#ibcon#about to read 3, iclass 32, count 2 2006.229.12:07:19.02#ibcon#read 3, iclass 32, count 2 2006.229.12:07:19.02#ibcon#about to read 4, iclass 32, count 2 2006.229.12:07:19.02#ibcon#read 4, iclass 32, count 2 2006.229.12:07:19.02#ibcon#about to read 5, iclass 32, count 2 2006.229.12:07:19.02#ibcon#read 5, iclass 32, count 2 2006.229.12:07:19.02#ibcon#about to read 6, iclass 32, count 2 2006.229.12:07:19.02#ibcon#read 6, iclass 32, count 2 2006.229.12:07:19.02#ibcon#end of sib2, iclass 32, count 2 2006.229.12:07:19.02#ibcon#*mode == 0, iclass 32, count 2 2006.229.12:07:19.02#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.12:07:19.02#ibcon#[25=AT06-04\r\n] 2006.229.12:07:19.02#ibcon#*before write, iclass 32, count 2 2006.229.12:07:19.02#ibcon#enter sib2, iclass 32, count 2 2006.229.12:07:19.02#ibcon#flushed, iclass 32, count 2 2006.229.12:07:19.02#ibcon#about to write, iclass 32, count 2 2006.229.12:07:19.02#ibcon#wrote, iclass 32, count 2 2006.229.12:07:19.02#ibcon#about to read 3, iclass 32, count 2 2006.229.12:07:19.05#ibcon#read 3, iclass 32, count 2 2006.229.12:07:19.05#ibcon#about to read 4, iclass 32, count 2 2006.229.12:07:19.05#ibcon#read 4, iclass 32, count 2 2006.229.12:07:19.05#ibcon#about to read 5, iclass 32, count 2 2006.229.12:07:19.05#ibcon#read 5, iclass 32, count 2 2006.229.12:07:19.05#ibcon#about to read 6, iclass 32, count 2 2006.229.12:07:19.05#ibcon#read 6, iclass 32, count 2 2006.229.12:07:19.05#ibcon#end of sib2, iclass 32, count 2 2006.229.12:07:19.05#ibcon#*after write, iclass 32, count 2 2006.229.12:07:19.05#ibcon#*before return 0, iclass 32, count 2 2006.229.12:07:19.05#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:19.05#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:19.05#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.12:07:19.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:19.05#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:19.17#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:19.17#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:19.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:07:19.17#ibcon#first serial, iclass 32, count 0 2006.229.12:07:19.17#ibcon#enter sib2, iclass 32, count 0 2006.229.12:07:19.17#ibcon#flushed, iclass 32, count 0 2006.229.12:07:19.17#ibcon#about to write, iclass 32, count 0 2006.229.12:07:19.17#ibcon#wrote, iclass 32, count 0 2006.229.12:07:19.17#ibcon#about to read 3, iclass 32, count 0 2006.229.12:07:19.19#ibcon#read 3, iclass 32, count 0 2006.229.12:07:19.19#ibcon#about to read 4, iclass 32, count 0 2006.229.12:07:19.19#ibcon#read 4, iclass 32, count 0 2006.229.12:07:19.19#ibcon#about to read 5, iclass 32, count 0 2006.229.12:07:19.19#ibcon#read 5, iclass 32, count 0 2006.229.12:07:19.19#ibcon#about to read 6, iclass 32, count 0 2006.229.12:07:19.19#ibcon#read 6, iclass 32, count 0 2006.229.12:07:19.19#ibcon#end of sib2, iclass 32, count 0 2006.229.12:07:19.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:07:19.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:07:19.19#ibcon#[25=USB\r\n] 2006.229.12:07:19.19#ibcon#*before write, iclass 32, count 0 2006.229.12:07:19.19#ibcon#enter sib2, iclass 32, count 0 2006.229.12:07:19.19#ibcon#flushed, iclass 32, count 0 2006.229.12:07:19.19#ibcon#about to write, iclass 32, count 0 2006.229.12:07:19.19#ibcon#wrote, iclass 32, count 0 2006.229.12:07:19.19#ibcon#about to read 3, iclass 32, count 0 2006.229.12:07:19.22#ibcon#read 3, iclass 32, count 0 2006.229.12:07:19.22#ibcon#about to read 4, iclass 32, count 0 2006.229.12:07:19.22#ibcon#read 4, iclass 32, count 0 2006.229.12:07:19.22#ibcon#about to read 5, iclass 32, count 0 2006.229.12:07:19.22#ibcon#read 5, iclass 32, count 0 2006.229.12:07:19.22#ibcon#about to read 6, iclass 32, count 0 2006.229.12:07:19.22#ibcon#read 6, iclass 32, count 0 2006.229.12:07:19.22#ibcon#end of sib2, iclass 32, count 0 2006.229.12:07:19.22#ibcon#*after write, iclass 32, count 0 2006.229.12:07:19.22#ibcon#*before return 0, iclass 32, count 0 2006.229.12:07:19.22#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:19.22#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:19.22#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:07:19.22#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:07:19.22$vck44/valo=7,864.99 2006.229.12:07:19.22#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.12:07:19.22#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.12:07:19.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:19.22#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:19.22#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:19.22#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:19.22#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:07:19.22#ibcon#first serial, iclass 34, count 0 2006.229.12:07:19.22#ibcon#enter sib2, iclass 34, count 0 2006.229.12:07:19.22#ibcon#flushed, iclass 34, count 0 2006.229.12:07:19.22#ibcon#about to write, iclass 34, count 0 2006.229.12:07:19.22#ibcon#wrote, iclass 34, count 0 2006.229.12:07:19.22#ibcon#about to read 3, iclass 34, count 0 2006.229.12:07:19.24#ibcon#read 3, iclass 34, count 0 2006.229.12:07:19.24#ibcon#about to read 4, iclass 34, count 0 2006.229.12:07:19.24#ibcon#read 4, iclass 34, count 0 2006.229.12:07:19.24#ibcon#about to read 5, iclass 34, count 0 2006.229.12:07:19.24#ibcon#read 5, iclass 34, count 0 2006.229.12:07:19.24#ibcon#about to read 6, iclass 34, count 0 2006.229.12:07:19.24#ibcon#read 6, iclass 34, count 0 2006.229.12:07:19.24#ibcon#end of sib2, iclass 34, count 0 2006.229.12:07:19.24#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:07:19.24#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:07:19.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:07:19.24#ibcon#*before write, iclass 34, count 0 2006.229.12:07:19.24#ibcon#enter sib2, iclass 34, count 0 2006.229.12:07:19.24#ibcon#flushed, iclass 34, count 0 2006.229.12:07:19.24#ibcon#about to write, iclass 34, count 0 2006.229.12:07:19.24#ibcon#wrote, iclass 34, count 0 2006.229.12:07:19.24#ibcon#about to read 3, iclass 34, count 0 2006.229.12:07:19.28#ibcon#read 3, iclass 34, count 0 2006.229.12:07:19.28#ibcon#about to read 4, iclass 34, count 0 2006.229.12:07:19.28#ibcon#read 4, iclass 34, count 0 2006.229.12:07:19.28#ibcon#about to read 5, iclass 34, count 0 2006.229.12:07:19.28#ibcon#read 5, iclass 34, count 0 2006.229.12:07:19.28#ibcon#about to read 6, iclass 34, count 0 2006.229.12:07:19.28#ibcon#read 6, iclass 34, count 0 2006.229.12:07:19.28#ibcon#end of sib2, iclass 34, count 0 2006.229.12:07:19.28#ibcon#*after write, iclass 34, count 0 2006.229.12:07:19.28#ibcon#*before return 0, iclass 34, count 0 2006.229.12:07:19.28#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:19.28#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:19.28#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:07:19.28#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:07:19.28$vck44/va=7,5 2006.229.12:07:19.28#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.12:07:19.28#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.12:07:19.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:19.28#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:19.34#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:19.34#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:19.34#ibcon#enter wrdev, iclass 36, count 2 2006.229.12:07:19.34#ibcon#first serial, iclass 36, count 2 2006.229.12:07:19.34#ibcon#enter sib2, iclass 36, count 2 2006.229.12:07:19.34#ibcon#flushed, iclass 36, count 2 2006.229.12:07:19.34#ibcon#about to write, iclass 36, count 2 2006.229.12:07:19.34#ibcon#wrote, iclass 36, count 2 2006.229.12:07:19.34#ibcon#about to read 3, iclass 36, count 2 2006.229.12:07:19.36#ibcon#read 3, iclass 36, count 2 2006.229.12:07:19.36#ibcon#about to read 4, iclass 36, count 2 2006.229.12:07:19.36#ibcon#read 4, iclass 36, count 2 2006.229.12:07:19.36#ibcon#about to read 5, iclass 36, count 2 2006.229.12:07:19.36#ibcon#read 5, iclass 36, count 2 2006.229.12:07:19.36#ibcon#about to read 6, iclass 36, count 2 2006.229.12:07:19.36#ibcon#read 6, iclass 36, count 2 2006.229.12:07:19.36#ibcon#end of sib2, iclass 36, count 2 2006.229.12:07:19.36#ibcon#*mode == 0, iclass 36, count 2 2006.229.12:07:19.36#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.12:07:19.36#ibcon#[25=AT07-05\r\n] 2006.229.12:07:19.36#ibcon#*before write, iclass 36, count 2 2006.229.12:07:19.36#ibcon#enter sib2, iclass 36, count 2 2006.229.12:07:19.36#ibcon#flushed, iclass 36, count 2 2006.229.12:07:19.36#ibcon#about to write, iclass 36, count 2 2006.229.12:07:19.36#ibcon#wrote, iclass 36, count 2 2006.229.12:07:19.36#ibcon#about to read 3, iclass 36, count 2 2006.229.12:07:19.39#ibcon#read 3, iclass 36, count 2 2006.229.12:07:19.39#ibcon#about to read 4, iclass 36, count 2 2006.229.12:07:19.39#ibcon#read 4, iclass 36, count 2 2006.229.12:07:19.39#ibcon#about to read 5, iclass 36, count 2 2006.229.12:07:19.39#ibcon#read 5, iclass 36, count 2 2006.229.12:07:19.39#ibcon#about to read 6, iclass 36, count 2 2006.229.12:07:19.39#ibcon#read 6, iclass 36, count 2 2006.229.12:07:19.39#ibcon#end of sib2, iclass 36, count 2 2006.229.12:07:19.39#ibcon#*after write, iclass 36, count 2 2006.229.12:07:19.39#ibcon#*before return 0, iclass 36, count 2 2006.229.12:07:19.39#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:19.39#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:19.39#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.12:07:19.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:19.39#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:19.51#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:19.51#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:19.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:07:19.51#ibcon#first serial, iclass 36, count 0 2006.229.12:07:19.51#ibcon#enter sib2, iclass 36, count 0 2006.229.12:07:19.51#ibcon#flushed, iclass 36, count 0 2006.229.12:07:19.51#ibcon#about to write, iclass 36, count 0 2006.229.12:07:19.51#ibcon#wrote, iclass 36, count 0 2006.229.12:07:19.51#ibcon#about to read 3, iclass 36, count 0 2006.229.12:07:19.53#ibcon#read 3, iclass 36, count 0 2006.229.12:07:19.53#ibcon#about to read 4, iclass 36, count 0 2006.229.12:07:19.53#ibcon#read 4, iclass 36, count 0 2006.229.12:07:19.53#ibcon#about to read 5, iclass 36, count 0 2006.229.12:07:19.53#ibcon#read 5, iclass 36, count 0 2006.229.12:07:19.53#ibcon#about to read 6, iclass 36, count 0 2006.229.12:07:19.53#ibcon#read 6, iclass 36, count 0 2006.229.12:07:19.53#ibcon#end of sib2, iclass 36, count 0 2006.229.12:07:19.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:07:19.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:07:19.53#ibcon#[25=USB\r\n] 2006.229.12:07:19.53#ibcon#*before write, iclass 36, count 0 2006.229.12:07:19.53#ibcon#enter sib2, iclass 36, count 0 2006.229.12:07:19.53#ibcon#flushed, iclass 36, count 0 2006.229.12:07:19.53#ibcon#about to write, iclass 36, count 0 2006.229.12:07:19.53#ibcon#wrote, iclass 36, count 0 2006.229.12:07:19.53#ibcon#about to read 3, iclass 36, count 0 2006.229.12:07:19.56#ibcon#read 3, iclass 36, count 0 2006.229.12:07:19.56#ibcon#about to read 4, iclass 36, count 0 2006.229.12:07:19.56#ibcon#read 4, iclass 36, count 0 2006.229.12:07:19.56#ibcon#about to read 5, iclass 36, count 0 2006.229.12:07:19.56#ibcon#read 5, iclass 36, count 0 2006.229.12:07:19.56#ibcon#about to read 6, iclass 36, count 0 2006.229.12:07:19.56#ibcon#read 6, iclass 36, count 0 2006.229.12:07:19.56#ibcon#end of sib2, iclass 36, count 0 2006.229.12:07:19.56#ibcon#*after write, iclass 36, count 0 2006.229.12:07:19.56#ibcon#*before return 0, iclass 36, count 0 2006.229.12:07:19.56#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:19.56#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:19.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:07:19.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:07:19.56$vck44/valo=8,884.99 2006.229.12:07:19.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:07:19.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:07:19.56#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:19.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:19.56#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:19.56#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:19.56#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:07:19.56#ibcon#first serial, iclass 38, count 0 2006.229.12:07:19.56#ibcon#enter sib2, iclass 38, count 0 2006.229.12:07:19.56#ibcon#flushed, iclass 38, count 0 2006.229.12:07:19.56#ibcon#about to write, iclass 38, count 0 2006.229.12:07:19.56#ibcon#wrote, iclass 38, count 0 2006.229.12:07:19.56#ibcon#about to read 3, iclass 38, count 0 2006.229.12:07:19.58#ibcon#read 3, iclass 38, count 0 2006.229.12:07:19.58#ibcon#about to read 4, iclass 38, count 0 2006.229.12:07:19.58#ibcon#read 4, iclass 38, count 0 2006.229.12:07:19.58#ibcon#about to read 5, iclass 38, count 0 2006.229.12:07:19.58#ibcon#read 5, iclass 38, count 0 2006.229.12:07:19.58#ibcon#about to read 6, iclass 38, count 0 2006.229.12:07:19.58#ibcon#read 6, iclass 38, count 0 2006.229.12:07:19.58#ibcon#end of sib2, iclass 38, count 0 2006.229.12:07:19.58#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:07:19.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:07:19.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:07:19.58#ibcon#*before write, iclass 38, count 0 2006.229.12:07:19.58#ibcon#enter sib2, iclass 38, count 0 2006.229.12:07:19.58#ibcon#flushed, iclass 38, count 0 2006.229.12:07:19.58#ibcon#about to write, iclass 38, count 0 2006.229.12:07:19.58#ibcon#wrote, iclass 38, count 0 2006.229.12:07:19.58#ibcon#about to read 3, iclass 38, count 0 2006.229.12:07:19.62#ibcon#read 3, iclass 38, count 0 2006.229.12:07:19.62#ibcon#about to read 4, iclass 38, count 0 2006.229.12:07:19.62#ibcon#read 4, iclass 38, count 0 2006.229.12:07:19.62#ibcon#about to read 5, iclass 38, count 0 2006.229.12:07:19.62#ibcon#read 5, iclass 38, count 0 2006.229.12:07:19.62#ibcon#about to read 6, iclass 38, count 0 2006.229.12:07:19.62#ibcon#read 6, iclass 38, count 0 2006.229.12:07:19.62#ibcon#end of sib2, iclass 38, count 0 2006.229.12:07:19.62#ibcon#*after write, iclass 38, count 0 2006.229.12:07:19.62#ibcon#*before return 0, iclass 38, count 0 2006.229.12:07:19.62#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:19.62#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:19.62#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:07:19.62#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:07:19.62$vck44/va=8,6 2006.229.12:07:19.62#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.12:07:19.62#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.12:07:19.62#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:19.62#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:07:19.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:07:19.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:07:19.68#ibcon#enter wrdev, iclass 40, count 2 2006.229.12:07:19.68#ibcon#first serial, iclass 40, count 2 2006.229.12:07:19.68#ibcon#enter sib2, iclass 40, count 2 2006.229.12:07:19.68#ibcon#flushed, iclass 40, count 2 2006.229.12:07:19.68#ibcon#about to write, iclass 40, count 2 2006.229.12:07:19.68#ibcon#wrote, iclass 40, count 2 2006.229.12:07:19.68#ibcon#about to read 3, iclass 40, count 2 2006.229.12:07:19.70#ibcon#read 3, iclass 40, count 2 2006.229.12:07:19.70#ibcon#about to read 4, iclass 40, count 2 2006.229.12:07:19.70#ibcon#read 4, iclass 40, count 2 2006.229.12:07:19.70#ibcon#about to read 5, iclass 40, count 2 2006.229.12:07:19.70#ibcon#read 5, iclass 40, count 2 2006.229.12:07:19.70#ibcon#about to read 6, iclass 40, count 2 2006.229.12:07:19.70#ibcon#read 6, iclass 40, count 2 2006.229.12:07:19.70#ibcon#end of sib2, iclass 40, count 2 2006.229.12:07:19.70#ibcon#*mode == 0, iclass 40, count 2 2006.229.12:07:19.70#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.12:07:19.70#ibcon#[25=AT08-06\r\n] 2006.229.12:07:19.70#ibcon#*before write, iclass 40, count 2 2006.229.12:07:19.70#ibcon#enter sib2, iclass 40, count 2 2006.229.12:07:19.70#ibcon#flushed, iclass 40, count 2 2006.229.12:07:19.70#ibcon#about to write, iclass 40, count 2 2006.229.12:07:19.70#ibcon#wrote, iclass 40, count 2 2006.229.12:07:19.70#ibcon#about to read 3, iclass 40, count 2 2006.229.12:07:19.73#ibcon#read 3, iclass 40, count 2 2006.229.12:07:19.73#ibcon#about to read 4, iclass 40, count 2 2006.229.12:07:19.73#ibcon#read 4, iclass 40, count 2 2006.229.12:07:19.73#ibcon#about to read 5, iclass 40, count 2 2006.229.12:07:19.73#ibcon#read 5, iclass 40, count 2 2006.229.12:07:19.73#ibcon#about to read 6, iclass 40, count 2 2006.229.12:07:19.73#ibcon#read 6, iclass 40, count 2 2006.229.12:07:19.73#ibcon#end of sib2, iclass 40, count 2 2006.229.12:07:19.73#ibcon#*after write, iclass 40, count 2 2006.229.12:07:19.73#ibcon#*before return 0, iclass 40, count 2 2006.229.12:07:19.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:07:19.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:07:19.73#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.12:07:19.73#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:19.73#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:07:19.85#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:07:19.85#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:07:19.85#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:07:19.85#ibcon#first serial, iclass 40, count 0 2006.229.12:07:19.85#ibcon#enter sib2, iclass 40, count 0 2006.229.12:07:19.85#ibcon#flushed, iclass 40, count 0 2006.229.12:07:19.85#ibcon#about to write, iclass 40, count 0 2006.229.12:07:19.85#ibcon#wrote, iclass 40, count 0 2006.229.12:07:19.85#ibcon#about to read 3, iclass 40, count 0 2006.229.12:07:19.87#ibcon#read 3, iclass 40, count 0 2006.229.12:07:19.87#ibcon#about to read 4, iclass 40, count 0 2006.229.12:07:19.87#ibcon#read 4, iclass 40, count 0 2006.229.12:07:19.87#ibcon#about to read 5, iclass 40, count 0 2006.229.12:07:19.87#ibcon#read 5, iclass 40, count 0 2006.229.12:07:19.87#ibcon#about to read 6, iclass 40, count 0 2006.229.12:07:19.87#ibcon#read 6, iclass 40, count 0 2006.229.12:07:19.87#ibcon#end of sib2, iclass 40, count 0 2006.229.12:07:19.87#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:07:19.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:07:19.87#ibcon#[25=USB\r\n] 2006.229.12:07:19.87#ibcon#*before write, iclass 40, count 0 2006.229.12:07:19.87#ibcon#enter sib2, iclass 40, count 0 2006.229.12:07:19.87#ibcon#flushed, iclass 40, count 0 2006.229.12:07:19.87#ibcon#about to write, iclass 40, count 0 2006.229.12:07:19.87#ibcon#wrote, iclass 40, count 0 2006.229.12:07:19.87#ibcon#about to read 3, iclass 40, count 0 2006.229.12:07:19.90#ibcon#read 3, iclass 40, count 0 2006.229.12:07:19.90#ibcon#about to read 4, iclass 40, count 0 2006.229.12:07:19.90#ibcon#read 4, iclass 40, count 0 2006.229.12:07:19.90#ibcon#about to read 5, iclass 40, count 0 2006.229.12:07:19.90#ibcon#read 5, iclass 40, count 0 2006.229.12:07:19.90#ibcon#about to read 6, iclass 40, count 0 2006.229.12:07:19.90#ibcon#read 6, iclass 40, count 0 2006.229.12:07:19.90#ibcon#end of sib2, iclass 40, count 0 2006.229.12:07:19.90#ibcon#*after write, iclass 40, count 0 2006.229.12:07:19.90#ibcon#*before return 0, iclass 40, count 0 2006.229.12:07:19.90#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:07:19.90#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:07:19.90#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:07:19.90#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:07:19.90$vck44/vblo=1,629.99 2006.229.12:07:19.90#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.12:07:19.90#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.12:07:19.90#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:19.90#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:19.90#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:19.90#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:19.90#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:07:19.90#ibcon#first serial, iclass 4, count 0 2006.229.12:07:19.90#ibcon#enter sib2, iclass 4, count 0 2006.229.12:07:19.90#ibcon#flushed, iclass 4, count 0 2006.229.12:07:19.90#ibcon#about to write, iclass 4, count 0 2006.229.12:07:19.90#ibcon#wrote, iclass 4, count 0 2006.229.12:07:19.90#ibcon#about to read 3, iclass 4, count 0 2006.229.12:07:19.92#ibcon#read 3, iclass 4, count 0 2006.229.12:07:19.92#ibcon#about to read 4, iclass 4, count 0 2006.229.12:07:19.92#ibcon#read 4, iclass 4, count 0 2006.229.12:07:19.92#ibcon#about to read 5, iclass 4, count 0 2006.229.12:07:19.92#ibcon#read 5, iclass 4, count 0 2006.229.12:07:19.92#ibcon#about to read 6, iclass 4, count 0 2006.229.12:07:19.92#ibcon#read 6, iclass 4, count 0 2006.229.12:07:19.92#ibcon#end of sib2, iclass 4, count 0 2006.229.12:07:19.92#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:07:19.92#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:07:19.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:07:19.92#ibcon#*before write, iclass 4, count 0 2006.229.12:07:19.92#ibcon#enter sib2, iclass 4, count 0 2006.229.12:07:19.92#ibcon#flushed, iclass 4, count 0 2006.229.12:07:19.92#ibcon#about to write, iclass 4, count 0 2006.229.12:07:19.92#ibcon#wrote, iclass 4, count 0 2006.229.12:07:19.92#ibcon#about to read 3, iclass 4, count 0 2006.229.12:07:19.96#ibcon#read 3, iclass 4, count 0 2006.229.12:07:19.96#ibcon#about to read 4, iclass 4, count 0 2006.229.12:07:19.96#ibcon#read 4, iclass 4, count 0 2006.229.12:07:19.96#ibcon#about to read 5, iclass 4, count 0 2006.229.12:07:19.96#ibcon#read 5, iclass 4, count 0 2006.229.12:07:19.96#ibcon#about to read 6, iclass 4, count 0 2006.229.12:07:19.96#ibcon#read 6, iclass 4, count 0 2006.229.12:07:19.96#ibcon#end of sib2, iclass 4, count 0 2006.229.12:07:19.96#ibcon#*after write, iclass 4, count 0 2006.229.12:07:19.96#ibcon#*before return 0, iclass 4, count 0 2006.229.12:07:19.96#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:19.96#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:07:19.96#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:07:19.96#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:07:19.96$vck44/vb=1,4 2006.229.12:07:19.96#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.12:07:19.96#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.12:07:19.96#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:19.96#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:19.96#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:19.96#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:19.96#ibcon#enter wrdev, iclass 6, count 2 2006.229.12:07:19.96#ibcon#first serial, iclass 6, count 2 2006.229.12:07:19.96#ibcon#enter sib2, iclass 6, count 2 2006.229.12:07:19.96#ibcon#flushed, iclass 6, count 2 2006.229.12:07:19.96#ibcon#about to write, iclass 6, count 2 2006.229.12:07:19.96#ibcon#wrote, iclass 6, count 2 2006.229.12:07:19.96#ibcon#about to read 3, iclass 6, count 2 2006.229.12:07:19.98#ibcon#read 3, iclass 6, count 2 2006.229.12:07:19.98#ibcon#about to read 4, iclass 6, count 2 2006.229.12:07:19.98#ibcon#read 4, iclass 6, count 2 2006.229.12:07:19.98#ibcon#about to read 5, iclass 6, count 2 2006.229.12:07:19.98#ibcon#read 5, iclass 6, count 2 2006.229.12:07:19.98#ibcon#about to read 6, iclass 6, count 2 2006.229.12:07:19.98#ibcon#read 6, iclass 6, count 2 2006.229.12:07:19.98#ibcon#end of sib2, iclass 6, count 2 2006.229.12:07:19.98#ibcon#*mode == 0, iclass 6, count 2 2006.229.12:07:19.98#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.12:07:19.98#ibcon#[27=AT01-04\r\n] 2006.229.12:07:19.98#ibcon#*before write, iclass 6, count 2 2006.229.12:07:19.98#ibcon#enter sib2, iclass 6, count 2 2006.229.12:07:19.98#ibcon#flushed, iclass 6, count 2 2006.229.12:07:19.98#ibcon#about to write, iclass 6, count 2 2006.229.12:07:19.98#ibcon#wrote, iclass 6, count 2 2006.229.12:07:19.98#ibcon#about to read 3, iclass 6, count 2 2006.229.12:07:20.01#ibcon#read 3, iclass 6, count 2 2006.229.12:07:20.01#ibcon#about to read 4, iclass 6, count 2 2006.229.12:07:20.01#ibcon#read 4, iclass 6, count 2 2006.229.12:07:20.01#ibcon#about to read 5, iclass 6, count 2 2006.229.12:07:20.01#ibcon#read 5, iclass 6, count 2 2006.229.12:07:20.01#ibcon#about to read 6, iclass 6, count 2 2006.229.12:07:20.01#ibcon#read 6, iclass 6, count 2 2006.229.12:07:20.01#ibcon#end of sib2, iclass 6, count 2 2006.229.12:07:20.01#ibcon#*after write, iclass 6, count 2 2006.229.12:07:20.01#ibcon#*before return 0, iclass 6, count 2 2006.229.12:07:20.01#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:20.01#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:07:20.01#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.12:07:20.01#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:20.01#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:20.13#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:20.13#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:20.13#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:07:20.13#ibcon#first serial, iclass 6, count 0 2006.229.12:07:20.13#ibcon#enter sib2, iclass 6, count 0 2006.229.12:07:20.13#ibcon#flushed, iclass 6, count 0 2006.229.12:07:20.13#ibcon#about to write, iclass 6, count 0 2006.229.12:07:20.13#ibcon#wrote, iclass 6, count 0 2006.229.12:07:20.13#ibcon#about to read 3, iclass 6, count 0 2006.229.12:07:20.15#ibcon#read 3, iclass 6, count 0 2006.229.12:07:20.15#ibcon#about to read 4, iclass 6, count 0 2006.229.12:07:20.15#ibcon#read 4, iclass 6, count 0 2006.229.12:07:20.15#ibcon#about to read 5, iclass 6, count 0 2006.229.12:07:20.15#ibcon#read 5, iclass 6, count 0 2006.229.12:07:20.15#ibcon#about to read 6, iclass 6, count 0 2006.229.12:07:20.15#ibcon#read 6, iclass 6, count 0 2006.229.12:07:20.15#ibcon#end of sib2, iclass 6, count 0 2006.229.12:07:20.15#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:07:20.15#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:07:20.15#ibcon#[27=USB\r\n] 2006.229.12:07:20.15#ibcon#*before write, iclass 6, count 0 2006.229.12:07:20.15#ibcon#enter sib2, iclass 6, count 0 2006.229.12:07:20.15#ibcon#flushed, iclass 6, count 0 2006.229.12:07:20.15#ibcon#about to write, iclass 6, count 0 2006.229.12:07:20.15#ibcon#wrote, iclass 6, count 0 2006.229.12:07:20.15#ibcon#about to read 3, iclass 6, count 0 2006.229.12:07:20.18#ibcon#read 3, iclass 6, count 0 2006.229.12:07:20.18#ibcon#about to read 4, iclass 6, count 0 2006.229.12:07:20.18#ibcon#read 4, iclass 6, count 0 2006.229.12:07:20.18#ibcon#about to read 5, iclass 6, count 0 2006.229.12:07:20.18#ibcon#read 5, iclass 6, count 0 2006.229.12:07:20.18#ibcon#about to read 6, iclass 6, count 0 2006.229.12:07:20.18#ibcon#read 6, iclass 6, count 0 2006.229.12:07:20.18#ibcon#end of sib2, iclass 6, count 0 2006.229.12:07:20.18#ibcon#*after write, iclass 6, count 0 2006.229.12:07:20.18#ibcon#*before return 0, iclass 6, count 0 2006.229.12:07:20.18#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:20.18#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:07:20.18#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:07:20.18#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:07:20.18$vck44/vblo=2,634.99 2006.229.12:07:20.18#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.12:07:20.18#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.12:07:20.18#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:20.18#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:20.18#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:20.18#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:20.18#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:07:20.18#ibcon#first serial, iclass 10, count 0 2006.229.12:07:20.18#ibcon#enter sib2, iclass 10, count 0 2006.229.12:07:20.18#ibcon#flushed, iclass 10, count 0 2006.229.12:07:20.18#ibcon#about to write, iclass 10, count 0 2006.229.12:07:20.18#ibcon#wrote, iclass 10, count 0 2006.229.12:07:20.18#ibcon#about to read 3, iclass 10, count 0 2006.229.12:07:20.20#ibcon#read 3, iclass 10, count 0 2006.229.12:07:20.20#ibcon#about to read 4, iclass 10, count 0 2006.229.12:07:20.20#ibcon#read 4, iclass 10, count 0 2006.229.12:07:20.20#ibcon#about to read 5, iclass 10, count 0 2006.229.12:07:20.20#ibcon#read 5, iclass 10, count 0 2006.229.12:07:20.20#ibcon#about to read 6, iclass 10, count 0 2006.229.12:07:20.20#ibcon#read 6, iclass 10, count 0 2006.229.12:07:20.20#ibcon#end of sib2, iclass 10, count 0 2006.229.12:07:20.20#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:07:20.20#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:07:20.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:07:20.20#ibcon#*before write, iclass 10, count 0 2006.229.12:07:20.20#ibcon#enter sib2, iclass 10, count 0 2006.229.12:07:20.20#ibcon#flushed, iclass 10, count 0 2006.229.12:07:20.20#ibcon#about to write, iclass 10, count 0 2006.229.12:07:20.20#ibcon#wrote, iclass 10, count 0 2006.229.12:07:20.20#ibcon#about to read 3, iclass 10, count 0 2006.229.12:07:20.24#ibcon#read 3, iclass 10, count 0 2006.229.12:07:20.24#ibcon#about to read 4, iclass 10, count 0 2006.229.12:07:20.24#ibcon#read 4, iclass 10, count 0 2006.229.12:07:20.24#ibcon#about to read 5, iclass 10, count 0 2006.229.12:07:20.24#ibcon#read 5, iclass 10, count 0 2006.229.12:07:20.24#ibcon#about to read 6, iclass 10, count 0 2006.229.12:07:20.24#ibcon#read 6, iclass 10, count 0 2006.229.12:07:20.24#ibcon#end of sib2, iclass 10, count 0 2006.229.12:07:20.24#ibcon#*after write, iclass 10, count 0 2006.229.12:07:20.24#ibcon#*before return 0, iclass 10, count 0 2006.229.12:07:20.24#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:20.24#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:07:20.24#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:07:20.24#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:07:20.24$vck44/vb=2,4 2006.229.12:07:20.24#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.12:07:20.24#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.12:07:20.24#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:20.24#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:20.30#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:20.30#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:20.30#ibcon#enter wrdev, iclass 12, count 2 2006.229.12:07:20.30#ibcon#first serial, iclass 12, count 2 2006.229.12:07:20.30#ibcon#enter sib2, iclass 12, count 2 2006.229.12:07:20.30#ibcon#flushed, iclass 12, count 2 2006.229.12:07:20.30#ibcon#about to write, iclass 12, count 2 2006.229.12:07:20.30#ibcon#wrote, iclass 12, count 2 2006.229.12:07:20.30#ibcon#about to read 3, iclass 12, count 2 2006.229.12:07:20.32#ibcon#read 3, iclass 12, count 2 2006.229.12:07:20.32#ibcon#about to read 4, iclass 12, count 2 2006.229.12:07:20.32#ibcon#read 4, iclass 12, count 2 2006.229.12:07:20.32#ibcon#about to read 5, iclass 12, count 2 2006.229.12:07:20.32#ibcon#read 5, iclass 12, count 2 2006.229.12:07:20.32#ibcon#about to read 6, iclass 12, count 2 2006.229.12:07:20.32#ibcon#read 6, iclass 12, count 2 2006.229.12:07:20.32#ibcon#end of sib2, iclass 12, count 2 2006.229.12:07:20.32#ibcon#*mode == 0, iclass 12, count 2 2006.229.12:07:20.32#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.12:07:20.32#ibcon#[27=AT02-04\r\n] 2006.229.12:07:20.32#ibcon#*before write, iclass 12, count 2 2006.229.12:07:20.32#ibcon#enter sib2, iclass 12, count 2 2006.229.12:07:20.32#ibcon#flushed, iclass 12, count 2 2006.229.12:07:20.32#ibcon#about to write, iclass 12, count 2 2006.229.12:07:20.32#ibcon#wrote, iclass 12, count 2 2006.229.12:07:20.32#ibcon#about to read 3, iclass 12, count 2 2006.229.12:07:20.35#ibcon#read 3, iclass 12, count 2 2006.229.12:07:20.35#ibcon#about to read 4, iclass 12, count 2 2006.229.12:07:20.35#ibcon#read 4, iclass 12, count 2 2006.229.12:07:20.35#ibcon#about to read 5, iclass 12, count 2 2006.229.12:07:20.35#ibcon#read 5, iclass 12, count 2 2006.229.12:07:20.35#ibcon#about to read 6, iclass 12, count 2 2006.229.12:07:20.35#ibcon#read 6, iclass 12, count 2 2006.229.12:07:20.35#ibcon#end of sib2, iclass 12, count 2 2006.229.12:07:20.35#ibcon#*after write, iclass 12, count 2 2006.229.12:07:20.35#ibcon#*before return 0, iclass 12, count 2 2006.229.12:07:20.35#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:20.35#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:07:20.35#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.12:07:20.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:20.35#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:20.47#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:20.47#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:20.47#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:07:20.47#ibcon#first serial, iclass 12, count 0 2006.229.12:07:20.47#ibcon#enter sib2, iclass 12, count 0 2006.229.12:07:20.47#ibcon#flushed, iclass 12, count 0 2006.229.12:07:20.47#ibcon#about to write, iclass 12, count 0 2006.229.12:07:20.47#ibcon#wrote, iclass 12, count 0 2006.229.12:07:20.47#ibcon#about to read 3, iclass 12, count 0 2006.229.12:07:20.49#ibcon#read 3, iclass 12, count 0 2006.229.12:07:20.49#ibcon#about to read 4, iclass 12, count 0 2006.229.12:07:20.49#ibcon#read 4, iclass 12, count 0 2006.229.12:07:20.49#ibcon#about to read 5, iclass 12, count 0 2006.229.12:07:20.49#ibcon#read 5, iclass 12, count 0 2006.229.12:07:20.49#ibcon#about to read 6, iclass 12, count 0 2006.229.12:07:20.49#ibcon#read 6, iclass 12, count 0 2006.229.12:07:20.49#ibcon#end of sib2, iclass 12, count 0 2006.229.12:07:20.49#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:07:20.49#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:07:20.49#ibcon#[27=USB\r\n] 2006.229.12:07:20.49#ibcon#*before write, iclass 12, count 0 2006.229.12:07:20.49#ibcon#enter sib2, iclass 12, count 0 2006.229.12:07:20.49#ibcon#flushed, iclass 12, count 0 2006.229.12:07:20.49#ibcon#about to write, iclass 12, count 0 2006.229.12:07:20.49#ibcon#wrote, iclass 12, count 0 2006.229.12:07:20.49#ibcon#about to read 3, iclass 12, count 0 2006.229.12:07:20.52#ibcon#read 3, iclass 12, count 0 2006.229.12:07:20.52#ibcon#about to read 4, iclass 12, count 0 2006.229.12:07:20.52#ibcon#read 4, iclass 12, count 0 2006.229.12:07:20.52#ibcon#about to read 5, iclass 12, count 0 2006.229.12:07:20.52#ibcon#read 5, iclass 12, count 0 2006.229.12:07:20.52#ibcon#about to read 6, iclass 12, count 0 2006.229.12:07:20.52#ibcon#read 6, iclass 12, count 0 2006.229.12:07:20.52#ibcon#end of sib2, iclass 12, count 0 2006.229.12:07:20.52#ibcon#*after write, iclass 12, count 0 2006.229.12:07:20.52#ibcon#*before return 0, iclass 12, count 0 2006.229.12:07:20.52#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:20.52#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:07:20.52#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:07:20.52#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:07:20.52$vck44/vblo=3,649.99 2006.229.12:07:20.52#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:07:20.52#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:07:20.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:20.52#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:20.52#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:20.52#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:20.52#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:07:20.52#ibcon#first serial, iclass 14, count 0 2006.229.12:07:20.52#ibcon#enter sib2, iclass 14, count 0 2006.229.12:07:20.52#ibcon#flushed, iclass 14, count 0 2006.229.12:07:20.52#ibcon#about to write, iclass 14, count 0 2006.229.12:07:20.52#ibcon#wrote, iclass 14, count 0 2006.229.12:07:20.52#ibcon#about to read 3, iclass 14, count 0 2006.229.12:07:20.54#ibcon#read 3, iclass 14, count 0 2006.229.12:07:20.54#ibcon#about to read 4, iclass 14, count 0 2006.229.12:07:20.54#ibcon#read 4, iclass 14, count 0 2006.229.12:07:20.54#ibcon#about to read 5, iclass 14, count 0 2006.229.12:07:20.54#ibcon#read 5, iclass 14, count 0 2006.229.12:07:20.54#ibcon#about to read 6, iclass 14, count 0 2006.229.12:07:20.54#ibcon#read 6, iclass 14, count 0 2006.229.12:07:20.54#ibcon#end of sib2, iclass 14, count 0 2006.229.12:07:20.54#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:07:20.54#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:07:20.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:07:20.54#ibcon#*before write, iclass 14, count 0 2006.229.12:07:20.54#ibcon#enter sib2, iclass 14, count 0 2006.229.12:07:20.54#ibcon#flushed, iclass 14, count 0 2006.229.12:07:20.54#ibcon#about to write, iclass 14, count 0 2006.229.12:07:20.54#ibcon#wrote, iclass 14, count 0 2006.229.12:07:20.54#ibcon#about to read 3, iclass 14, count 0 2006.229.12:07:20.58#ibcon#read 3, iclass 14, count 0 2006.229.12:07:20.58#ibcon#about to read 4, iclass 14, count 0 2006.229.12:07:20.58#ibcon#read 4, iclass 14, count 0 2006.229.12:07:20.58#ibcon#about to read 5, iclass 14, count 0 2006.229.12:07:20.58#ibcon#read 5, iclass 14, count 0 2006.229.12:07:20.58#ibcon#about to read 6, iclass 14, count 0 2006.229.12:07:20.58#ibcon#read 6, iclass 14, count 0 2006.229.12:07:20.58#ibcon#end of sib2, iclass 14, count 0 2006.229.12:07:20.58#ibcon#*after write, iclass 14, count 0 2006.229.12:07:20.58#ibcon#*before return 0, iclass 14, count 0 2006.229.12:07:20.58#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:20.58#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:07:20.58#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:07:20.58#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:07:20.58$vck44/vb=3,4 2006.229.12:07:20.58#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.12:07:20.58#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.12:07:20.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:20.58#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:20.64#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:20.64#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:20.64#ibcon#enter wrdev, iclass 16, count 2 2006.229.12:07:20.64#ibcon#first serial, iclass 16, count 2 2006.229.12:07:20.64#ibcon#enter sib2, iclass 16, count 2 2006.229.12:07:20.64#ibcon#flushed, iclass 16, count 2 2006.229.12:07:20.64#ibcon#about to write, iclass 16, count 2 2006.229.12:07:20.64#ibcon#wrote, iclass 16, count 2 2006.229.12:07:20.64#ibcon#about to read 3, iclass 16, count 2 2006.229.12:07:20.66#ibcon#read 3, iclass 16, count 2 2006.229.12:07:20.66#ibcon#about to read 4, iclass 16, count 2 2006.229.12:07:20.66#ibcon#read 4, iclass 16, count 2 2006.229.12:07:20.66#ibcon#about to read 5, iclass 16, count 2 2006.229.12:07:20.66#ibcon#read 5, iclass 16, count 2 2006.229.12:07:20.66#ibcon#about to read 6, iclass 16, count 2 2006.229.12:07:20.66#ibcon#read 6, iclass 16, count 2 2006.229.12:07:20.66#ibcon#end of sib2, iclass 16, count 2 2006.229.12:07:20.66#ibcon#*mode == 0, iclass 16, count 2 2006.229.12:07:20.66#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.12:07:20.66#ibcon#[27=AT03-04\r\n] 2006.229.12:07:20.66#ibcon#*before write, iclass 16, count 2 2006.229.12:07:20.66#ibcon#enter sib2, iclass 16, count 2 2006.229.12:07:20.66#ibcon#flushed, iclass 16, count 2 2006.229.12:07:20.66#ibcon#about to write, iclass 16, count 2 2006.229.12:07:20.66#ibcon#wrote, iclass 16, count 2 2006.229.12:07:20.66#ibcon#about to read 3, iclass 16, count 2 2006.229.12:07:20.69#ibcon#read 3, iclass 16, count 2 2006.229.12:07:20.69#ibcon#about to read 4, iclass 16, count 2 2006.229.12:07:20.69#ibcon#read 4, iclass 16, count 2 2006.229.12:07:20.69#ibcon#about to read 5, iclass 16, count 2 2006.229.12:07:20.69#ibcon#read 5, iclass 16, count 2 2006.229.12:07:20.69#ibcon#about to read 6, iclass 16, count 2 2006.229.12:07:20.69#ibcon#read 6, iclass 16, count 2 2006.229.12:07:20.69#ibcon#end of sib2, iclass 16, count 2 2006.229.12:07:20.69#ibcon#*after write, iclass 16, count 2 2006.229.12:07:20.69#ibcon#*before return 0, iclass 16, count 2 2006.229.12:07:20.69#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:20.69#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:07:20.69#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.12:07:20.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:20.69#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:20.81#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:20.81#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:20.81#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:07:20.81#ibcon#first serial, iclass 16, count 0 2006.229.12:07:20.81#ibcon#enter sib2, iclass 16, count 0 2006.229.12:07:20.81#ibcon#flushed, iclass 16, count 0 2006.229.12:07:20.81#ibcon#about to write, iclass 16, count 0 2006.229.12:07:20.81#ibcon#wrote, iclass 16, count 0 2006.229.12:07:20.81#ibcon#about to read 3, iclass 16, count 0 2006.229.12:07:20.83#ibcon#read 3, iclass 16, count 0 2006.229.12:07:20.83#ibcon#about to read 4, iclass 16, count 0 2006.229.12:07:20.83#ibcon#read 4, iclass 16, count 0 2006.229.12:07:20.83#ibcon#about to read 5, iclass 16, count 0 2006.229.12:07:20.83#ibcon#read 5, iclass 16, count 0 2006.229.12:07:20.83#ibcon#about to read 6, iclass 16, count 0 2006.229.12:07:20.83#ibcon#read 6, iclass 16, count 0 2006.229.12:07:20.83#ibcon#end of sib2, iclass 16, count 0 2006.229.12:07:20.83#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:07:20.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:07:20.83#ibcon#[27=USB\r\n] 2006.229.12:07:20.83#ibcon#*before write, iclass 16, count 0 2006.229.12:07:20.83#ibcon#enter sib2, iclass 16, count 0 2006.229.12:07:20.83#ibcon#flushed, iclass 16, count 0 2006.229.12:07:20.83#ibcon#about to write, iclass 16, count 0 2006.229.12:07:20.83#ibcon#wrote, iclass 16, count 0 2006.229.12:07:20.83#ibcon#about to read 3, iclass 16, count 0 2006.229.12:07:20.86#ibcon#read 3, iclass 16, count 0 2006.229.12:07:20.86#ibcon#about to read 4, iclass 16, count 0 2006.229.12:07:20.86#ibcon#read 4, iclass 16, count 0 2006.229.12:07:20.86#ibcon#about to read 5, iclass 16, count 0 2006.229.12:07:20.86#ibcon#read 5, iclass 16, count 0 2006.229.12:07:20.86#ibcon#about to read 6, iclass 16, count 0 2006.229.12:07:20.86#ibcon#read 6, iclass 16, count 0 2006.229.12:07:20.86#ibcon#end of sib2, iclass 16, count 0 2006.229.12:07:20.86#ibcon#*after write, iclass 16, count 0 2006.229.12:07:20.86#ibcon#*before return 0, iclass 16, count 0 2006.229.12:07:20.86#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:20.86#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:07:20.86#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:07:20.86#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:07:20.86$vck44/vblo=4,679.99 2006.229.12:07:20.86#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.12:07:20.86#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.12:07:20.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:20.86#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:07:20.86#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:07:20.86#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:07:20.86#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:07:20.86#ibcon#first serial, iclass 18, count 0 2006.229.12:07:20.86#ibcon#enter sib2, iclass 18, count 0 2006.229.12:07:20.86#ibcon#flushed, iclass 18, count 0 2006.229.12:07:20.86#ibcon#about to write, iclass 18, count 0 2006.229.12:07:20.86#ibcon#wrote, iclass 18, count 0 2006.229.12:07:20.86#ibcon#about to read 3, iclass 18, count 0 2006.229.12:07:20.88#ibcon#read 3, iclass 18, count 0 2006.229.12:07:20.88#ibcon#about to read 4, iclass 18, count 0 2006.229.12:07:20.88#ibcon#read 4, iclass 18, count 0 2006.229.12:07:20.88#ibcon#about to read 5, iclass 18, count 0 2006.229.12:07:20.88#ibcon#read 5, iclass 18, count 0 2006.229.12:07:20.88#ibcon#about to read 6, iclass 18, count 0 2006.229.12:07:20.88#ibcon#read 6, iclass 18, count 0 2006.229.12:07:20.88#ibcon#end of sib2, iclass 18, count 0 2006.229.12:07:20.88#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:07:20.88#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:07:20.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:07:20.88#ibcon#*before write, iclass 18, count 0 2006.229.12:07:20.88#ibcon#enter sib2, iclass 18, count 0 2006.229.12:07:20.88#ibcon#flushed, iclass 18, count 0 2006.229.12:07:20.88#ibcon#about to write, iclass 18, count 0 2006.229.12:07:20.88#ibcon#wrote, iclass 18, count 0 2006.229.12:07:20.88#ibcon#about to read 3, iclass 18, count 0 2006.229.12:07:20.92#ibcon#read 3, iclass 18, count 0 2006.229.12:07:20.92#ibcon#about to read 4, iclass 18, count 0 2006.229.12:07:20.92#ibcon#read 4, iclass 18, count 0 2006.229.12:07:20.92#ibcon#about to read 5, iclass 18, count 0 2006.229.12:07:20.92#ibcon#read 5, iclass 18, count 0 2006.229.12:07:20.92#ibcon#about to read 6, iclass 18, count 0 2006.229.12:07:20.92#ibcon#read 6, iclass 18, count 0 2006.229.12:07:20.92#ibcon#end of sib2, iclass 18, count 0 2006.229.12:07:20.92#ibcon#*after write, iclass 18, count 0 2006.229.12:07:20.92#ibcon#*before return 0, iclass 18, count 0 2006.229.12:07:20.92#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:07:20.92#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:07:20.92#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:07:20.92#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:07:20.92$vck44/vb=4,4 2006.229.12:07:20.92#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.12:07:20.92#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.12:07:20.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:20.92#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:07:20.98#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:07:20.98#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:07:20.98#ibcon#enter wrdev, iclass 20, count 2 2006.229.12:07:20.98#ibcon#first serial, iclass 20, count 2 2006.229.12:07:20.98#ibcon#enter sib2, iclass 20, count 2 2006.229.12:07:20.98#ibcon#flushed, iclass 20, count 2 2006.229.12:07:20.98#ibcon#about to write, iclass 20, count 2 2006.229.12:07:20.98#ibcon#wrote, iclass 20, count 2 2006.229.12:07:20.98#ibcon#about to read 3, iclass 20, count 2 2006.229.12:07:21.00#ibcon#read 3, iclass 20, count 2 2006.229.12:07:21.00#ibcon#about to read 4, iclass 20, count 2 2006.229.12:07:21.00#ibcon#read 4, iclass 20, count 2 2006.229.12:07:21.00#ibcon#about to read 5, iclass 20, count 2 2006.229.12:07:21.00#ibcon#read 5, iclass 20, count 2 2006.229.12:07:21.00#ibcon#about to read 6, iclass 20, count 2 2006.229.12:07:21.00#ibcon#read 6, iclass 20, count 2 2006.229.12:07:21.00#ibcon#end of sib2, iclass 20, count 2 2006.229.12:07:21.00#ibcon#*mode == 0, iclass 20, count 2 2006.229.12:07:21.00#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.12:07:21.00#ibcon#[27=AT04-04\r\n] 2006.229.12:07:21.00#ibcon#*before write, iclass 20, count 2 2006.229.12:07:21.00#ibcon#enter sib2, iclass 20, count 2 2006.229.12:07:21.00#ibcon#flushed, iclass 20, count 2 2006.229.12:07:21.00#ibcon#about to write, iclass 20, count 2 2006.229.12:07:21.00#ibcon#wrote, iclass 20, count 2 2006.229.12:07:21.00#ibcon#about to read 3, iclass 20, count 2 2006.229.12:07:21.03#ibcon#read 3, iclass 20, count 2 2006.229.12:07:21.03#ibcon#about to read 4, iclass 20, count 2 2006.229.12:07:21.03#ibcon#read 4, iclass 20, count 2 2006.229.12:07:21.03#ibcon#about to read 5, iclass 20, count 2 2006.229.12:07:21.03#ibcon#read 5, iclass 20, count 2 2006.229.12:07:21.03#ibcon#about to read 6, iclass 20, count 2 2006.229.12:07:21.03#ibcon#read 6, iclass 20, count 2 2006.229.12:07:21.03#ibcon#end of sib2, iclass 20, count 2 2006.229.12:07:21.03#ibcon#*after write, iclass 20, count 2 2006.229.12:07:21.03#ibcon#*before return 0, iclass 20, count 2 2006.229.12:07:21.03#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:07:21.03#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:07:21.03#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.12:07:21.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:21.03#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:07:21.15#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:07:21.15#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:07:21.15#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:07:21.15#ibcon#first serial, iclass 20, count 0 2006.229.12:07:21.15#ibcon#enter sib2, iclass 20, count 0 2006.229.12:07:21.15#ibcon#flushed, iclass 20, count 0 2006.229.12:07:21.15#ibcon#about to write, iclass 20, count 0 2006.229.12:07:21.15#ibcon#wrote, iclass 20, count 0 2006.229.12:07:21.15#ibcon#about to read 3, iclass 20, count 0 2006.229.12:07:21.17#ibcon#read 3, iclass 20, count 0 2006.229.12:07:21.17#ibcon#about to read 4, iclass 20, count 0 2006.229.12:07:21.17#ibcon#read 4, iclass 20, count 0 2006.229.12:07:21.17#ibcon#about to read 5, iclass 20, count 0 2006.229.12:07:21.17#ibcon#read 5, iclass 20, count 0 2006.229.12:07:21.17#ibcon#about to read 6, iclass 20, count 0 2006.229.12:07:21.17#ibcon#read 6, iclass 20, count 0 2006.229.12:07:21.17#ibcon#end of sib2, iclass 20, count 0 2006.229.12:07:21.17#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:07:21.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:07:21.17#ibcon#[27=USB\r\n] 2006.229.12:07:21.17#ibcon#*before write, iclass 20, count 0 2006.229.12:07:21.17#ibcon#enter sib2, iclass 20, count 0 2006.229.12:07:21.17#ibcon#flushed, iclass 20, count 0 2006.229.12:07:21.17#ibcon#about to write, iclass 20, count 0 2006.229.12:07:21.17#ibcon#wrote, iclass 20, count 0 2006.229.12:07:21.17#ibcon#about to read 3, iclass 20, count 0 2006.229.12:07:21.20#ibcon#read 3, iclass 20, count 0 2006.229.12:07:21.20#ibcon#about to read 4, iclass 20, count 0 2006.229.12:07:21.20#ibcon#read 4, iclass 20, count 0 2006.229.12:07:21.20#ibcon#about to read 5, iclass 20, count 0 2006.229.12:07:21.20#ibcon#read 5, iclass 20, count 0 2006.229.12:07:21.20#ibcon#about to read 6, iclass 20, count 0 2006.229.12:07:21.20#ibcon#read 6, iclass 20, count 0 2006.229.12:07:21.20#ibcon#end of sib2, iclass 20, count 0 2006.229.12:07:21.20#ibcon#*after write, iclass 20, count 0 2006.229.12:07:21.20#ibcon#*before return 0, iclass 20, count 0 2006.229.12:07:21.20#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:07:21.20#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:07:21.20#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:07:21.20#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:07:21.20$vck44/vblo=5,709.99 2006.229.12:07:21.20#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.12:07:21.20#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.12:07:21.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:21.20#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:07:21.20#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:07:21.20#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:07:21.20#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:07:21.20#ibcon#first serial, iclass 22, count 0 2006.229.12:07:21.20#ibcon#enter sib2, iclass 22, count 0 2006.229.12:07:21.20#ibcon#flushed, iclass 22, count 0 2006.229.12:07:21.20#ibcon#about to write, iclass 22, count 0 2006.229.12:07:21.20#ibcon#wrote, iclass 22, count 0 2006.229.12:07:21.20#ibcon#about to read 3, iclass 22, count 0 2006.229.12:07:21.22#ibcon#read 3, iclass 22, count 0 2006.229.12:07:21.22#ibcon#about to read 4, iclass 22, count 0 2006.229.12:07:21.22#ibcon#read 4, iclass 22, count 0 2006.229.12:07:21.22#ibcon#about to read 5, iclass 22, count 0 2006.229.12:07:21.22#ibcon#read 5, iclass 22, count 0 2006.229.12:07:21.22#ibcon#about to read 6, iclass 22, count 0 2006.229.12:07:21.22#ibcon#read 6, iclass 22, count 0 2006.229.12:07:21.22#ibcon#end of sib2, iclass 22, count 0 2006.229.12:07:21.22#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:07:21.22#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:07:21.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:07:21.22#ibcon#*before write, iclass 22, count 0 2006.229.12:07:21.22#ibcon#enter sib2, iclass 22, count 0 2006.229.12:07:21.22#ibcon#flushed, iclass 22, count 0 2006.229.12:07:21.22#ibcon#about to write, iclass 22, count 0 2006.229.12:07:21.22#ibcon#wrote, iclass 22, count 0 2006.229.12:07:21.22#ibcon#about to read 3, iclass 22, count 0 2006.229.12:07:21.26#ibcon#read 3, iclass 22, count 0 2006.229.12:07:21.26#ibcon#about to read 4, iclass 22, count 0 2006.229.12:07:21.26#ibcon#read 4, iclass 22, count 0 2006.229.12:07:21.26#ibcon#about to read 5, iclass 22, count 0 2006.229.12:07:21.26#ibcon#read 5, iclass 22, count 0 2006.229.12:07:21.26#ibcon#about to read 6, iclass 22, count 0 2006.229.12:07:21.26#ibcon#read 6, iclass 22, count 0 2006.229.12:07:21.26#ibcon#end of sib2, iclass 22, count 0 2006.229.12:07:21.26#ibcon#*after write, iclass 22, count 0 2006.229.12:07:21.26#ibcon#*before return 0, iclass 22, count 0 2006.229.12:07:21.26#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:07:21.26#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:07:21.26#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:07:21.26#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:07:21.26$vck44/vb=5,4 2006.229.12:07:21.26#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.12:07:21.26#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.12:07:21.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:21.26#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:07:21.32#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:07:21.32#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:07:21.32#ibcon#enter wrdev, iclass 24, count 2 2006.229.12:07:21.32#ibcon#first serial, iclass 24, count 2 2006.229.12:07:21.32#ibcon#enter sib2, iclass 24, count 2 2006.229.12:07:21.32#ibcon#flushed, iclass 24, count 2 2006.229.12:07:21.32#ibcon#about to write, iclass 24, count 2 2006.229.12:07:21.32#ibcon#wrote, iclass 24, count 2 2006.229.12:07:21.32#ibcon#about to read 3, iclass 24, count 2 2006.229.12:07:21.34#ibcon#read 3, iclass 24, count 2 2006.229.12:07:21.34#ibcon#about to read 4, iclass 24, count 2 2006.229.12:07:21.34#ibcon#read 4, iclass 24, count 2 2006.229.12:07:21.34#ibcon#about to read 5, iclass 24, count 2 2006.229.12:07:21.34#ibcon#read 5, iclass 24, count 2 2006.229.12:07:21.34#ibcon#about to read 6, iclass 24, count 2 2006.229.12:07:21.34#ibcon#read 6, iclass 24, count 2 2006.229.12:07:21.34#ibcon#end of sib2, iclass 24, count 2 2006.229.12:07:21.34#ibcon#*mode == 0, iclass 24, count 2 2006.229.12:07:21.34#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.12:07:21.34#ibcon#[27=AT05-04\r\n] 2006.229.12:07:21.34#ibcon#*before write, iclass 24, count 2 2006.229.12:07:21.34#ibcon#enter sib2, iclass 24, count 2 2006.229.12:07:21.34#ibcon#flushed, iclass 24, count 2 2006.229.12:07:21.34#ibcon#about to write, iclass 24, count 2 2006.229.12:07:21.34#ibcon#wrote, iclass 24, count 2 2006.229.12:07:21.34#ibcon#about to read 3, iclass 24, count 2 2006.229.12:07:21.37#ibcon#read 3, iclass 24, count 2 2006.229.12:07:21.37#ibcon#about to read 4, iclass 24, count 2 2006.229.12:07:21.37#ibcon#read 4, iclass 24, count 2 2006.229.12:07:21.37#ibcon#about to read 5, iclass 24, count 2 2006.229.12:07:21.37#ibcon#read 5, iclass 24, count 2 2006.229.12:07:21.37#ibcon#about to read 6, iclass 24, count 2 2006.229.12:07:21.37#ibcon#read 6, iclass 24, count 2 2006.229.12:07:21.37#ibcon#end of sib2, iclass 24, count 2 2006.229.12:07:21.37#ibcon#*after write, iclass 24, count 2 2006.229.12:07:21.37#ibcon#*before return 0, iclass 24, count 2 2006.229.12:07:21.37#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:07:21.37#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:07:21.37#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.12:07:21.37#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:21.37#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:07:21.49#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:07:21.49#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:07:21.49#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:07:21.49#ibcon#first serial, iclass 24, count 0 2006.229.12:07:21.49#ibcon#enter sib2, iclass 24, count 0 2006.229.12:07:21.49#ibcon#flushed, iclass 24, count 0 2006.229.12:07:21.49#ibcon#about to write, iclass 24, count 0 2006.229.12:07:21.49#ibcon#wrote, iclass 24, count 0 2006.229.12:07:21.49#ibcon#about to read 3, iclass 24, count 0 2006.229.12:07:21.51#ibcon#read 3, iclass 24, count 0 2006.229.12:07:21.51#ibcon#about to read 4, iclass 24, count 0 2006.229.12:07:21.51#ibcon#read 4, iclass 24, count 0 2006.229.12:07:21.51#ibcon#about to read 5, iclass 24, count 0 2006.229.12:07:21.51#ibcon#read 5, iclass 24, count 0 2006.229.12:07:21.51#ibcon#about to read 6, iclass 24, count 0 2006.229.12:07:21.51#ibcon#read 6, iclass 24, count 0 2006.229.12:07:21.51#ibcon#end of sib2, iclass 24, count 0 2006.229.12:07:21.51#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:07:21.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:07:21.51#ibcon#[27=USB\r\n] 2006.229.12:07:21.51#ibcon#*before write, iclass 24, count 0 2006.229.12:07:21.51#ibcon#enter sib2, iclass 24, count 0 2006.229.12:07:21.51#ibcon#flushed, iclass 24, count 0 2006.229.12:07:21.51#ibcon#about to write, iclass 24, count 0 2006.229.12:07:21.51#ibcon#wrote, iclass 24, count 0 2006.229.12:07:21.51#ibcon#about to read 3, iclass 24, count 0 2006.229.12:07:21.54#ibcon#read 3, iclass 24, count 0 2006.229.12:07:21.54#ibcon#about to read 4, iclass 24, count 0 2006.229.12:07:21.54#ibcon#read 4, iclass 24, count 0 2006.229.12:07:21.54#ibcon#about to read 5, iclass 24, count 0 2006.229.12:07:21.54#ibcon#read 5, iclass 24, count 0 2006.229.12:07:21.54#ibcon#about to read 6, iclass 24, count 0 2006.229.12:07:21.54#ibcon#read 6, iclass 24, count 0 2006.229.12:07:21.54#ibcon#end of sib2, iclass 24, count 0 2006.229.12:07:21.54#ibcon#*after write, iclass 24, count 0 2006.229.12:07:21.54#ibcon#*before return 0, iclass 24, count 0 2006.229.12:07:21.54#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:07:21.54#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:07:21.54#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:07:21.54#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:07:21.54$vck44/vblo=6,719.99 2006.229.12:07:21.54#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:07:21.54#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:07:21.54#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:21.54#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:21.54#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:21.54#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:21.54#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:07:21.54#ibcon#first serial, iclass 26, count 0 2006.229.12:07:21.54#ibcon#enter sib2, iclass 26, count 0 2006.229.12:07:21.54#ibcon#flushed, iclass 26, count 0 2006.229.12:07:21.54#ibcon#about to write, iclass 26, count 0 2006.229.12:07:21.54#ibcon#wrote, iclass 26, count 0 2006.229.12:07:21.54#ibcon#about to read 3, iclass 26, count 0 2006.229.12:07:21.56#ibcon#read 3, iclass 26, count 0 2006.229.12:07:21.56#ibcon#about to read 4, iclass 26, count 0 2006.229.12:07:21.56#ibcon#read 4, iclass 26, count 0 2006.229.12:07:21.56#ibcon#about to read 5, iclass 26, count 0 2006.229.12:07:21.56#ibcon#read 5, iclass 26, count 0 2006.229.12:07:21.56#ibcon#about to read 6, iclass 26, count 0 2006.229.12:07:21.56#ibcon#read 6, iclass 26, count 0 2006.229.12:07:21.56#ibcon#end of sib2, iclass 26, count 0 2006.229.12:07:21.56#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:07:21.56#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:07:21.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:07:21.56#ibcon#*before write, iclass 26, count 0 2006.229.12:07:21.56#ibcon#enter sib2, iclass 26, count 0 2006.229.12:07:21.56#ibcon#flushed, iclass 26, count 0 2006.229.12:07:21.56#ibcon#about to write, iclass 26, count 0 2006.229.12:07:21.56#ibcon#wrote, iclass 26, count 0 2006.229.12:07:21.56#ibcon#about to read 3, iclass 26, count 0 2006.229.12:07:21.60#ibcon#read 3, iclass 26, count 0 2006.229.12:07:21.60#ibcon#about to read 4, iclass 26, count 0 2006.229.12:07:21.60#ibcon#read 4, iclass 26, count 0 2006.229.12:07:21.60#ibcon#about to read 5, iclass 26, count 0 2006.229.12:07:21.60#ibcon#read 5, iclass 26, count 0 2006.229.12:07:21.60#ibcon#about to read 6, iclass 26, count 0 2006.229.12:07:21.60#ibcon#read 6, iclass 26, count 0 2006.229.12:07:21.60#ibcon#end of sib2, iclass 26, count 0 2006.229.12:07:21.60#ibcon#*after write, iclass 26, count 0 2006.229.12:07:21.60#ibcon#*before return 0, iclass 26, count 0 2006.229.12:07:21.60#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:21.60#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:07:21.60#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:07:21.60#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:07:21.60$vck44/vb=6,4 2006.229.12:07:21.60#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.12:07:21.60#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.12:07:21.60#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:21.60#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:21.66#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:21.66#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:21.66#ibcon#enter wrdev, iclass 28, count 2 2006.229.12:07:21.66#ibcon#first serial, iclass 28, count 2 2006.229.12:07:21.66#ibcon#enter sib2, iclass 28, count 2 2006.229.12:07:21.66#ibcon#flushed, iclass 28, count 2 2006.229.12:07:21.66#ibcon#about to write, iclass 28, count 2 2006.229.12:07:21.66#ibcon#wrote, iclass 28, count 2 2006.229.12:07:21.66#ibcon#about to read 3, iclass 28, count 2 2006.229.12:07:21.68#ibcon#read 3, iclass 28, count 2 2006.229.12:07:21.68#ibcon#about to read 4, iclass 28, count 2 2006.229.12:07:21.68#ibcon#read 4, iclass 28, count 2 2006.229.12:07:21.68#ibcon#about to read 5, iclass 28, count 2 2006.229.12:07:21.68#ibcon#read 5, iclass 28, count 2 2006.229.12:07:21.68#ibcon#about to read 6, iclass 28, count 2 2006.229.12:07:21.68#ibcon#read 6, iclass 28, count 2 2006.229.12:07:21.68#ibcon#end of sib2, iclass 28, count 2 2006.229.12:07:21.68#ibcon#*mode == 0, iclass 28, count 2 2006.229.12:07:21.68#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.12:07:21.68#ibcon#[27=AT06-04\r\n] 2006.229.12:07:21.68#ibcon#*before write, iclass 28, count 2 2006.229.12:07:21.68#ibcon#enter sib2, iclass 28, count 2 2006.229.12:07:21.68#ibcon#flushed, iclass 28, count 2 2006.229.12:07:21.68#ibcon#about to write, iclass 28, count 2 2006.229.12:07:21.68#ibcon#wrote, iclass 28, count 2 2006.229.12:07:21.68#ibcon#about to read 3, iclass 28, count 2 2006.229.12:07:21.71#ibcon#read 3, iclass 28, count 2 2006.229.12:07:21.71#ibcon#about to read 4, iclass 28, count 2 2006.229.12:07:21.71#ibcon#read 4, iclass 28, count 2 2006.229.12:07:21.71#ibcon#about to read 5, iclass 28, count 2 2006.229.12:07:21.71#ibcon#read 5, iclass 28, count 2 2006.229.12:07:21.71#ibcon#about to read 6, iclass 28, count 2 2006.229.12:07:21.71#ibcon#read 6, iclass 28, count 2 2006.229.12:07:21.71#ibcon#end of sib2, iclass 28, count 2 2006.229.12:07:21.71#ibcon#*after write, iclass 28, count 2 2006.229.12:07:21.71#ibcon#*before return 0, iclass 28, count 2 2006.229.12:07:21.71#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:21.71#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:07:21.71#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.12:07:21.71#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:21.71#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:21.83#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:21.83#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:21.83#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:07:21.83#ibcon#first serial, iclass 28, count 0 2006.229.12:07:21.83#ibcon#enter sib2, iclass 28, count 0 2006.229.12:07:21.83#ibcon#flushed, iclass 28, count 0 2006.229.12:07:21.83#ibcon#about to write, iclass 28, count 0 2006.229.12:07:21.83#ibcon#wrote, iclass 28, count 0 2006.229.12:07:21.83#ibcon#about to read 3, iclass 28, count 0 2006.229.12:07:21.85#ibcon#read 3, iclass 28, count 0 2006.229.12:07:21.85#ibcon#about to read 4, iclass 28, count 0 2006.229.12:07:21.85#ibcon#read 4, iclass 28, count 0 2006.229.12:07:21.85#ibcon#about to read 5, iclass 28, count 0 2006.229.12:07:21.85#ibcon#read 5, iclass 28, count 0 2006.229.12:07:21.85#ibcon#about to read 6, iclass 28, count 0 2006.229.12:07:21.85#ibcon#read 6, iclass 28, count 0 2006.229.12:07:21.85#ibcon#end of sib2, iclass 28, count 0 2006.229.12:07:21.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:07:21.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:07:21.85#ibcon#[27=USB\r\n] 2006.229.12:07:21.85#ibcon#*before write, iclass 28, count 0 2006.229.12:07:21.85#ibcon#enter sib2, iclass 28, count 0 2006.229.12:07:21.85#ibcon#flushed, iclass 28, count 0 2006.229.12:07:21.85#ibcon#about to write, iclass 28, count 0 2006.229.12:07:21.85#ibcon#wrote, iclass 28, count 0 2006.229.12:07:21.85#ibcon#about to read 3, iclass 28, count 0 2006.229.12:07:21.88#ibcon#read 3, iclass 28, count 0 2006.229.12:07:21.88#ibcon#about to read 4, iclass 28, count 0 2006.229.12:07:21.88#ibcon#read 4, iclass 28, count 0 2006.229.12:07:21.88#ibcon#about to read 5, iclass 28, count 0 2006.229.12:07:21.88#ibcon#read 5, iclass 28, count 0 2006.229.12:07:21.88#ibcon#about to read 6, iclass 28, count 0 2006.229.12:07:21.88#ibcon#read 6, iclass 28, count 0 2006.229.12:07:21.88#ibcon#end of sib2, iclass 28, count 0 2006.229.12:07:21.88#ibcon#*after write, iclass 28, count 0 2006.229.12:07:21.88#ibcon#*before return 0, iclass 28, count 0 2006.229.12:07:21.88#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:21.88#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:07:21.88#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:07:21.88#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:07:21.88$vck44/vblo=7,734.99 2006.229.12:07:21.88#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.12:07:21.88#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.12:07:21.88#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:21.88#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:21.88#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:21.88#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:21.88#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:07:21.88#ibcon#first serial, iclass 30, count 0 2006.229.12:07:21.88#ibcon#enter sib2, iclass 30, count 0 2006.229.12:07:21.88#ibcon#flushed, iclass 30, count 0 2006.229.12:07:21.88#ibcon#about to write, iclass 30, count 0 2006.229.12:07:21.88#ibcon#wrote, iclass 30, count 0 2006.229.12:07:21.88#ibcon#about to read 3, iclass 30, count 0 2006.229.12:07:21.90#ibcon#read 3, iclass 30, count 0 2006.229.12:07:21.90#ibcon#about to read 4, iclass 30, count 0 2006.229.12:07:21.90#ibcon#read 4, iclass 30, count 0 2006.229.12:07:21.90#ibcon#about to read 5, iclass 30, count 0 2006.229.12:07:21.90#ibcon#read 5, iclass 30, count 0 2006.229.12:07:21.90#ibcon#about to read 6, iclass 30, count 0 2006.229.12:07:21.90#ibcon#read 6, iclass 30, count 0 2006.229.12:07:21.90#ibcon#end of sib2, iclass 30, count 0 2006.229.12:07:21.90#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:07:21.90#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:07:21.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:07:21.90#ibcon#*before write, iclass 30, count 0 2006.229.12:07:21.90#ibcon#enter sib2, iclass 30, count 0 2006.229.12:07:21.90#ibcon#flushed, iclass 30, count 0 2006.229.12:07:21.90#ibcon#about to write, iclass 30, count 0 2006.229.12:07:21.90#ibcon#wrote, iclass 30, count 0 2006.229.12:07:21.90#ibcon#about to read 3, iclass 30, count 0 2006.229.12:07:21.94#ibcon#read 3, iclass 30, count 0 2006.229.12:07:21.94#ibcon#about to read 4, iclass 30, count 0 2006.229.12:07:21.94#ibcon#read 4, iclass 30, count 0 2006.229.12:07:21.94#ibcon#about to read 5, iclass 30, count 0 2006.229.12:07:21.94#ibcon#read 5, iclass 30, count 0 2006.229.12:07:21.94#ibcon#about to read 6, iclass 30, count 0 2006.229.12:07:21.94#ibcon#read 6, iclass 30, count 0 2006.229.12:07:21.94#ibcon#end of sib2, iclass 30, count 0 2006.229.12:07:21.94#ibcon#*after write, iclass 30, count 0 2006.229.12:07:21.94#ibcon#*before return 0, iclass 30, count 0 2006.229.12:07:21.94#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:21.94#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:07:21.94#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:07:21.94#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:07:21.94$vck44/vb=7,4 2006.229.12:07:21.94#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.12:07:21.94#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.12:07:21.94#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:21.94#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:22.00#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:22.00#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:22.00#ibcon#enter wrdev, iclass 32, count 2 2006.229.12:07:22.00#ibcon#first serial, iclass 32, count 2 2006.229.12:07:22.00#ibcon#enter sib2, iclass 32, count 2 2006.229.12:07:22.00#ibcon#flushed, iclass 32, count 2 2006.229.12:07:22.00#ibcon#about to write, iclass 32, count 2 2006.229.12:07:22.00#ibcon#wrote, iclass 32, count 2 2006.229.12:07:22.00#ibcon#about to read 3, iclass 32, count 2 2006.229.12:07:22.02#ibcon#read 3, iclass 32, count 2 2006.229.12:07:22.02#ibcon#about to read 4, iclass 32, count 2 2006.229.12:07:22.02#ibcon#read 4, iclass 32, count 2 2006.229.12:07:22.02#ibcon#about to read 5, iclass 32, count 2 2006.229.12:07:22.02#ibcon#read 5, iclass 32, count 2 2006.229.12:07:22.02#ibcon#about to read 6, iclass 32, count 2 2006.229.12:07:22.02#ibcon#read 6, iclass 32, count 2 2006.229.12:07:22.02#ibcon#end of sib2, iclass 32, count 2 2006.229.12:07:22.02#ibcon#*mode == 0, iclass 32, count 2 2006.229.12:07:22.02#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.12:07:22.02#ibcon#[27=AT07-04\r\n] 2006.229.12:07:22.02#ibcon#*before write, iclass 32, count 2 2006.229.12:07:22.02#ibcon#enter sib2, iclass 32, count 2 2006.229.12:07:22.02#ibcon#flushed, iclass 32, count 2 2006.229.12:07:22.02#ibcon#about to write, iclass 32, count 2 2006.229.12:07:22.02#ibcon#wrote, iclass 32, count 2 2006.229.12:07:22.02#ibcon#about to read 3, iclass 32, count 2 2006.229.12:07:22.05#ibcon#read 3, iclass 32, count 2 2006.229.12:07:22.05#ibcon#about to read 4, iclass 32, count 2 2006.229.12:07:22.05#ibcon#read 4, iclass 32, count 2 2006.229.12:07:22.05#ibcon#about to read 5, iclass 32, count 2 2006.229.12:07:22.05#ibcon#read 5, iclass 32, count 2 2006.229.12:07:22.05#ibcon#about to read 6, iclass 32, count 2 2006.229.12:07:22.05#ibcon#read 6, iclass 32, count 2 2006.229.12:07:22.05#ibcon#end of sib2, iclass 32, count 2 2006.229.12:07:22.05#ibcon#*after write, iclass 32, count 2 2006.229.12:07:22.05#ibcon#*before return 0, iclass 32, count 2 2006.229.12:07:22.05#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:22.05#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:07:22.05#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.12:07:22.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:22.05#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:22.17#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:22.17#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:22.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:07:22.17#ibcon#first serial, iclass 32, count 0 2006.229.12:07:22.17#ibcon#enter sib2, iclass 32, count 0 2006.229.12:07:22.17#ibcon#flushed, iclass 32, count 0 2006.229.12:07:22.17#ibcon#about to write, iclass 32, count 0 2006.229.12:07:22.17#ibcon#wrote, iclass 32, count 0 2006.229.12:07:22.17#ibcon#about to read 3, iclass 32, count 0 2006.229.12:07:22.19#ibcon#read 3, iclass 32, count 0 2006.229.12:07:22.19#ibcon#about to read 4, iclass 32, count 0 2006.229.12:07:22.19#ibcon#read 4, iclass 32, count 0 2006.229.12:07:22.19#ibcon#about to read 5, iclass 32, count 0 2006.229.12:07:22.19#ibcon#read 5, iclass 32, count 0 2006.229.12:07:22.19#ibcon#about to read 6, iclass 32, count 0 2006.229.12:07:22.19#ibcon#read 6, iclass 32, count 0 2006.229.12:07:22.19#ibcon#end of sib2, iclass 32, count 0 2006.229.12:07:22.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:07:22.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:07:22.19#ibcon#[27=USB\r\n] 2006.229.12:07:22.19#ibcon#*before write, iclass 32, count 0 2006.229.12:07:22.19#ibcon#enter sib2, iclass 32, count 0 2006.229.12:07:22.19#ibcon#flushed, iclass 32, count 0 2006.229.12:07:22.19#ibcon#about to write, iclass 32, count 0 2006.229.12:07:22.19#ibcon#wrote, iclass 32, count 0 2006.229.12:07:22.19#ibcon#about to read 3, iclass 32, count 0 2006.229.12:07:22.22#ibcon#read 3, iclass 32, count 0 2006.229.12:07:22.22#ibcon#about to read 4, iclass 32, count 0 2006.229.12:07:22.22#ibcon#read 4, iclass 32, count 0 2006.229.12:07:22.22#ibcon#about to read 5, iclass 32, count 0 2006.229.12:07:22.22#ibcon#read 5, iclass 32, count 0 2006.229.12:07:22.22#ibcon#about to read 6, iclass 32, count 0 2006.229.12:07:22.22#ibcon#read 6, iclass 32, count 0 2006.229.12:07:22.22#ibcon#end of sib2, iclass 32, count 0 2006.229.12:07:22.22#ibcon#*after write, iclass 32, count 0 2006.229.12:07:22.22#ibcon#*before return 0, iclass 32, count 0 2006.229.12:07:22.22#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:22.22#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:07:22.22#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:07:22.22#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:07:22.22$vck44/vblo=8,744.99 2006.229.12:07:22.22#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.12:07:22.22#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.12:07:22.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:07:22.22#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:22.22#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:22.22#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:22.22#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:07:22.22#ibcon#first serial, iclass 34, count 0 2006.229.12:07:22.22#ibcon#enter sib2, iclass 34, count 0 2006.229.12:07:22.22#ibcon#flushed, iclass 34, count 0 2006.229.12:07:22.22#ibcon#about to write, iclass 34, count 0 2006.229.12:07:22.22#ibcon#wrote, iclass 34, count 0 2006.229.12:07:22.22#ibcon#about to read 3, iclass 34, count 0 2006.229.12:07:22.24#ibcon#read 3, iclass 34, count 0 2006.229.12:07:22.24#ibcon#about to read 4, iclass 34, count 0 2006.229.12:07:22.24#ibcon#read 4, iclass 34, count 0 2006.229.12:07:22.24#ibcon#about to read 5, iclass 34, count 0 2006.229.12:07:22.24#ibcon#read 5, iclass 34, count 0 2006.229.12:07:22.24#ibcon#about to read 6, iclass 34, count 0 2006.229.12:07:22.24#ibcon#read 6, iclass 34, count 0 2006.229.12:07:22.24#ibcon#end of sib2, iclass 34, count 0 2006.229.12:07:22.24#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:07:22.24#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:07:22.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:07:22.24#ibcon#*before write, iclass 34, count 0 2006.229.12:07:22.24#ibcon#enter sib2, iclass 34, count 0 2006.229.12:07:22.24#ibcon#flushed, iclass 34, count 0 2006.229.12:07:22.24#ibcon#about to write, iclass 34, count 0 2006.229.12:07:22.24#ibcon#wrote, iclass 34, count 0 2006.229.12:07:22.24#ibcon#about to read 3, iclass 34, count 0 2006.229.12:07:22.28#ibcon#read 3, iclass 34, count 0 2006.229.12:07:22.28#ibcon#about to read 4, iclass 34, count 0 2006.229.12:07:22.28#ibcon#read 4, iclass 34, count 0 2006.229.12:07:22.28#ibcon#about to read 5, iclass 34, count 0 2006.229.12:07:22.28#ibcon#read 5, iclass 34, count 0 2006.229.12:07:22.28#ibcon#about to read 6, iclass 34, count 0 2006.229.12:07:22.28#ibcon#read 6, iclass 34, count 0 2006.229.12:07:22.28#ibcon#end of sib2, iclass 34, count 0 2006.229.12:07:22.28#ibcon#*after write, iclass 34, count 0 2006.229.12:07:22.28#ibcon#*before return 0, iclass 34, count 0 2006.229.12:07:22.28#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:22.28#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:07:22.28#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:07:22.28#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:07:22.28$vck44/vb=8,4 2006.229.12:07:22.28#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.12:07:22.28#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.12:07:22.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:07:22.28#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:22.34#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:22.34#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:22.34#ibcon#enter wrdev, iclass 36, count 2 2006.229.12:07:22.34#ibcon#first serial, iclass 36, count 2 2006.229.12:07:22.34#ibcon#enter sib2, iclass 36, count 2 2006.229.12:07:22.34#ibcon#flushed, iclass 36, count 2 2006.229.12:07:22.34#ibcon#about to write, iclass 36, count 2 2006.229.12:07:22.34#ibcon#wrote, iclass 36, count 2 2006.229.12:07:22.34#ibcon#about to read 3, iclass 36, count 2 2006.229.12:07:22.36#ibcon#read 3, iclass 36, count 2 2006.229.12:07:22.36#ibcon#about to read 4, iclass 36, count 2 2006.229.12:07:22.36#ibcon#read 4, iclass 36, count 2 2006.229.12:07:22.36#ibcon#about to read 5, iclass 36, count 2 2006.229.12:07:22.36#ibcon#read 5, iclass 36, count 2 2006.229.12:07:22.36#ibcon#about to read 6, iclass 36, count 2 2006.229.12:07:22.36#ibcon#read 6, iclass 36, count 2 2006.229.12:07:22.36#ibcon#end of sib2, iclass 36, count 2 2006.229.12:07:22.36#ibcon#*mode == 0, iclass 36, count 2 2006.229.12:07:22.36#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.12:07:22.36#ibcon#[27=AT08-04\r\n] 2006.229.12:07:22.36#ibcon#*before write, iclass 36, count 2 2006.229.12:07:22.36#ibcon#enter sib2, iclass 36, count 2 2006.229.12:07:22.36#ibcon#flushed, iclass 36, count 2 2006.229.12:07:22.36#ibcon#about to write, iclass 36, count 2 2006.229.12:07:22.36#ibcon#wrote, iclass 36, count 2 2006.229.12:07:22.36#ibcon#about to read 3, iclass 36, count 2 2006.229.12:07:22.39#ibcon#read 3, iclass 36, count 2 2006.229.12:07:22.39#ibcon#about to read 4, iclass 36, count 2 2006.229.12:07:22.39#ibcon#read 4, iclass 36, count 2 2006.229.12:07:22.39#ibcon#about to read 5, iclass 36, count 2 2006.229.12:07:22.39#ibcon#read 5, iclass 36, count 2 2006.229.12:07:22.39#ibcon#about to read 6, iclass 36, count 2 2006.229.12:07:22.39#ibcon#read 6, iclass 36, count 2 2006.229.12:07:22.39#ibcon#end of sib2, iclass 36, count 2 2006.229.12:07:22.39#ibcon#*after write, iclass 36, count 2 2006.229.12:07:22.39#ibcon#*before return 0, iclass 36, count 2 2006.229.12:07:22.39#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:22.39#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:07:22.39#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.12:07:22.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:07:22.39#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:22.51#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:22.51#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:22.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:07:22.51#ibcon#first serial, iclass 36, count 0 2006.229.12:07:22.51#ibcon#enter sib2, iclass 36, count 0 2006.229.12:07:22.51#ibcon#flushed, iclass 36, count 0 2006.229.12:07:22.51#ibcon#about to write, iclass 36, count 0 2006.229.12:07:22.51#ibcon#wrote, iclass 36, count 0 2006.229.12:07:22.51#ibcon#about to read 3, iclass 36, count 0 2006.229.12:07:22.53#ibcon#read 3, iclass 36, count 0 2006.229.12:07:22.53#ibcon#about to read 4, iclass 36, count 0 2006.229.12:07:22.53#ibcon#read 4, iclass 36, count 0 2006.229.12:07:22.53#ibcon#about to read 5, iclass 36, count 0 2006.229.12:07:22.53#ibcon#read 5, iclass 36, count 0 2006.229.12:07:22.53#ibcon#about to read 6, iclass 36, count 0 2006.229.12:07:22.53#ibcon#read 6, iclass 36, count 0 2006.229.12:07:22.53#ibcon#end of sib2, iclass 36, count 0 2006.229.12:07:22.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:07:22.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:07:22.53#ibcon#[27=USB\r\n] 2006.229.12:07:22.53#ibcon#*before write, iclass 36, count 0 2006.229.12:07:22.53#ibcon#enter sib2, iclass 36, count 0 2006.229.12:07:22.53#ibcon#flushed, iclass 36, count 0 2006.229.12:07:22.53#ibcon#about to write, iclass 36, count 0 2006.229.12:07:22.53#ibcon#wrote, iclass 36, count 0 2006.229.12:07:22.53#ibcon#about to read 3, iclass 36, count 0 2006.229.12:07:22.56#ibcon#read 3, iclass 36, count 0 2006.229.12:07:22.56#ibcon#about to read 4, iclass 36, count 0 2006.229.12:07:22.56#ibcon#read 4, iclass 36, count 0 2006.229.12:07:22.56#ibcon#about to read 5, iclass 36, count 0 2006.229.12:07:22.56#ibcon#read 5, iclass 36, count 0 2006.229.12:07:22.56#ibcon#about to read 6, iclass 36, count 0 2006.229.12:07:22.56#ibcon#read 6, iclass 36, count 0 2006.229.12:07:22.56#ibcon#end of sib2, iclass 36, count 0 2006.229.12:07:22.56#ibcon#*after write, iclass 36, count 0 2006.229.12:07:22.56#ibcon#*before return 0, iclass 36, count 0 2006.229.12:07:22.56#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:22.56#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:07:22.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:07:22.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:07:22.56$vck44/vabw=wide 2006.229.12:07:22.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:07:22.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:07:22.56#ibcon#ireg 8 cls_cnt 0 2006.229.12:07:22.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:22.56#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:22.56#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:22.56#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:07:22.56#ibcon#first serial, iclass 38, count 0 2006.229.12:07:22.56#ibcon#enter sib2, iclass 38, count 0 2006.229.12:07:22.56#ibcon#flushed, iclass 38, count 0 2006.229.12:07:22.56#ibcon#about to write, iclass 38, count 0 2006.229.12:07:22.56#ibcon#wrote, iclass 38, count 0 2006.229.12:07:22.56#ibcon#about to read 3, iclass 38, count 0 2006.229.12:07:22.58#ibcon#read 3, iclass 38, count 0 2006.229.12:07:22.58#ibcon#about to read 4, iclass 38, count 0 2006.229.12:07:22.58#ibcon#read 4, iclass 38, count 0 2006.229.12:07:22.58#ibcon#about to read 5, iclass 38, count 0 2006.229.12:07:22.58#ibcon#read 5, iclass 38, count 0 2006.229.12:07:22.58#ibcon#about to read 6, iclass 38, count 0 2006.229.12:07:22.58#ibcon#read 6, iclass 38, count 0 2006.229.12:07:22.58#ibcon#end of sib2, iclass 38, count 0 2006.229.12:07:22.58#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:07:22.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:07:22.58#ibcon#[25=BW32\r\n] 2006.229.12:07:22.58#ibcon#*before write, iclass 38, count 0 2006.229.12:07:22.58#ibcon#enter sib2, iclass 38, count 0 2006.229.12:07:22.58#ibcon#flushed, iclass 38, count 0 2006.229.12:07:22.58#ibcon#about to write, iclass 38, count 0 2006.229.12:07:22.58#ibcon#wrote, iclass 38, count 0 2006.229.12:07:22.58#ibcon#about to read 3, iclass 38, count 0 2006.229.12:07:22.61#ibcon#read 3, iclass 38, count 0 2006.229.12:07:22.61#ibcon#about to read 4, iclass 38, count 0 2006.229.12:07:22.61#ibcon#read 4, iclass 38, count 0 2006.229.12:07:22.61#ibcon#about to read 5, iclass 38, count 0 2006.229.12:07:22.61#ibcon#read 5, iclass 38, count 0 2006.229.12:07:22.61#ibcon#about to read 6, iclass 38, count 0 2006.229.12:07:22.61#ibcon#read 6, iclass 38, count 0 2006.229.12:07:22.61#ibcon#end of sib2, iclass 38, count 0 2006.229.12:07:22.61#ibcon#*after write, iclass 38, count 0 2006.229.12:07:22.61#ibcon#*before return 0, iclass 38, count 0 2006.229.12:07:22.61#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:22.61#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:07:22.61#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:07:22.61#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:07:22.61$vck44/vbbw=wide 2006.229.12:07:22.61#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.12:07:22.61#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.12:07:22.61#ibcon#ireg 8 cls_cnt 0 2006.229.12:07:22.61#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:07:22.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:07:22.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:07:22.68#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:07:22.68#ibcon#first serial, iclass 40, count 0 2006.229.12:07:22.68#ibcon#enter sib2, iclass 40, count 0 2006.229.12:07:22.68#ibcon#flushed, iclass 40, count 0 2006.229.12:07:22.68#ibcon#about to write, iclass 40, count 0 2006.229.12:07:22.68#ibcon#wrote, iclass 40, count 0 2006.229.12:07:22.68#ibcon#about to read 3, iclass 40, count 0 2006.229.12:07:22.70#ibcon#read 3, iclass 40, count 0 2006.229.12:07:22.70#ibcon#about to read 4, iclass 40, count 0 2006.229.12:07:22.70#ibcon#read 4, iclass 40, count 0 2006.229.12:07:22.70#ibcon#about to read 5, iclass 40, count 0 2006.229.12:07:22.70#ibcon#read 5, iclass 40, count 0 2006.229.12:07:22.70#ibcon#about to read 6, iclass 40, count 0 2006.229.12:07:22.70#ibcon#read 6, iclass 40, count 0 2006.229.12:07:22.70#ibcon#end of sib2, iclass 40, count 0 2006.229.12:07:22.70#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:07:22.70#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:07:22.70#ibcon#[27=BW32\r\n] 2006.229.12:07:22.70#ibcon#*before write, iclass 40, count 0 2006.229.12:07:22.70#ibcon#enter sib2, iclass 40, count 0 2006.229.12:07:22.70#ibcon#flushed, iclass 40, count 0 2006.229.12:07:22.70#ibcon#about to write, iclass 40, count 0 2006.229.12:07:22.70#ibcon#wrote, iclass 40, count 0 2006.229.12:07:22.70#ibcon#about to read 3, iclass 40, count 0 2006.229.12:07:22.73#ibcon#read 3, iclass 40, count 0 2006.229.12:07:22.73#ibcon#about to read 4, iclass 40, count 0 2006.229.12:07:22.73#ibcon#read 4, iclass 40, count 0 2006.229.12:07:22.73#ibcon#about to read 5, iclass 40, count 0 2006.229.12:07:22.73#ibcon#read 5, iclass 40, count 0 2006.229.12:07:22.73#ibcon#about to read 6, iclass 40, count 0 2006.229.12:07:22.73#ibcon#read 6, iclass 40, count 0 2006.229.12:07:22.73#ibcon#end of sib2, iclass 40, count 0 2006.229.12:07:22.73#ibcon#*after write, iclass 40, count 0 2006.229.12:07:22.73#ibcon#*before return 0, iclass 40, count 0 2006.229.12:07:22.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:07:22.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:07:22.73#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:07:22.73#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:07:22.73$setupk4/ifdk4 2006.229.12:07:22.73$ifdk4/lo= 2006.229.12:07:22.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:07:22.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:07:22.73$ifdk4/patch= 2006.229.12:07:22.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:07:22.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:07:22.73$setupk4/!*+20s 2006.229.12:07:28.14#trakl#Source acquired 2006.229.12:07:28.39#abcon#<5=/04 1.6 3.1 27.791001002.4\r\n> 2006.229.12:07:28.41#abcon#{5=INTERFACE CLEAR} 2006.229.12:07:28.47#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:07:30.14#flagr#flagr/antenna,acquired 2006.229.12:07:37.24$setupk4/"tpicd 2006.229.12:07:37.24$setupk4/echo=off 2006.229.12:07:37.24$setupk4/xlog=off 2006.229.12:07:37.24:!2006.229.12:12:13 2006.229.12:12:13.00:preob 2006.229.12:12:13.13/onsource/TRACKING 2006.229.12:12:13.13:!2006.229.12:12:23 2006.229.12:12:23.00:"tape 2006.229.12:12:23.00:"st=record 2006.229.12:12:23.00:data_valid=on 2006.229.12:12:23.00:midob 2006.229.12:12:24.13/onsource/TRACKING 2006.229.12:12:24.13/wx/27.76,1002.4,100 2006.229.12:12:24.18/cable/+6.4056E-03 2006.229.12:12:25.27/va/01,08,usb,yes,30,32 2006.229.12:12:25.27/va/02,07,usb,yes,33,33 2006.229.12:12:25.27/va/03,06,usb,yes,41,43 2006.229.12:12:25.27/va/04,07,usb,yes,34,35 2006.229.12:12:25.27/va/05,04,usb,yes,30,31 2006.229.12:12:25.27/va/06,04,usb,yes,34,33 2006.229.12:12:25.27/va/07,05,usb,yes,30,30 2006.229.12:12:25.27/va/08,06,usb,yes,22,27 2006.229.12:12:25.50/valo/01,524.99,yes,locked 2006.229.12:12:25.50/valo/02,534.99,yes,locked 2006.229.12:12:25.50/valo/03,564.99,yes,locked 2006.229.12:12:25.50/valo/04,624.99,yes,locked 2006.229.12:12:25.50/valo/05,734.99,yes,locked 2006.229.12:12:25.50/valo/06,814.99,yes,locked 2006.229.12:12:25.50/valo/07,864.99,yes,locked 2006.229.12:12:25.50/valo/08,884.99,yes,locked 2006.229.12:12:26.59/vb/01,04,usb,yes,32,29 2006.229.12:12:26.59/vb/02,04,usb,yes,33,34 2006.229.12:12:26.59/vb/03,04,usb,yes,30,34 2006.229.12:12:26.59/vb/04,04,usb,yes,35,34 2006.229.12:12:26.59/vb/05,04,usb,yes,27,30 2006.229.12:12:26.59/vb/06,04,usb,yes,32,28 2006.229.12:12:26.59/vb/07,04,usb,yes,31,31 2006.229.12:12:26.59/vb/08,04,usb,yes,29,32 2006.229.12:12:26.82/vblo/01,629.99,yes,locked 2006.229.12:12:26.82/vblo/02,634.99,yes,locked 2006.229.12:12:26.82/vblo/03,649.99,yes,locked 2006.229.12:12:26.82/vblo/04,679.99,yes,locked 2006.229.12:12:26.82/vblo/05,709.99,yes,locked 2006.229.12:12:26.82/vblo/06,719.99,yes,locked 2006.229.12:12:26.82/vblo/07,734.99,yes,locked 2006.229.12:12:26.82/vblo/08,744.99,yes,locked 2006.229.12:12:26.97/vabw/8 2006.229.12:12:27.12/vbbw/8 2006.229.12:12:27.21/xfe/off,on,12.0 2006.229.12:12:27.59/ifatt/23,28,28,28 2006.229.12:12:28.08/fmout-gps/S +4.24E-07 2006.229.12:12:28.12:!2006.229.12:15:33 2006.229.12:15:33.00:data_valid=off 2006.229.12:15:33.00:"et 2006.229.12:15:33.00:!+3s 2006.229.12:15:36.02:"tape 2006.229.12:15:36.02:postob 2006.229.12:15:36.18/cable/+6.4076E-03 2006.229.12:15:36.18/wx/27.74,1002.4,100 2006.229.12:15:37.08/fmout-gps/S +4.26E-07 2006.229.12:15:37.08:scan_name=229-1218,jd0608,70 2006.229.12:15:37.08:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.12:15:38.14#flagr#flagr/antenna,new-source 2006.229.12:15:38.14:checkk5 2006.229.12:15:38.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:15:38.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:15:39.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:15:39.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:15:40.13/chk_obsdata//k5ts1/T2291212??a.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.12:15:40.53/chk_obsdata//k5ts2/T2291212??b.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.12:15:40.94/chk_obsdata//k5ts3/T2291212??c.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.12:15:41.33/chk_obsdata//k5ts4/T2291212??d.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.12:15:42.07/k5log//k5ts1_log_newline 2006.229.12:15:42.77/k5log//k5ts2_log_newline 2006.229.12:15:43.49/k5log//k5ts3_log_newline 2006.229.12:15:44.20/k5log//k5ts4_log_newline 2006.229.12:15:44.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:15:44.22:setupk4=1 2006.229.12:15:44.22$setupk4/echo=on 2006.229.12:15:44.22$setupk4/pcalon 2006.229.12:15:44.22$pcalon/"no phase cal control is implemented here 2006.229.12:15:44.22$setupk4/"tpicd=stop 2006.229.12:15:44.22$setupk4/"rec=synch_on 2006.229.12:15:44.22$setupk4/"rec_mode=128 2006.229.12:15:44.22$setupk4/!* 2006.229.12:15:44.22$setupk4/recpk4 2006.229.12:15:44.22$recpk4/recpatch= 2006.229.12:15:44.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:15:44.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:15:44.23$setupk4/vck44 2006.229.12:15:44.23$vck44/valo=1,524.99 2006.229.12:15:44.23#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.12:15:44.23#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.12:15:44.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:44.23#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:15:44.23#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:15:44.23#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:15:44.23#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:15:44.23#ibcon#first serial, iclass 25, count 0 2006.229.12:15:44.23#ibcon#enter sib2, iclass 25, count 0 2006.229.12:15:44.23#ibcon#flushed, iclass 25, count 0 2006.229.12:15:44.23#ibcon#about to write, iclass 25, count 0 2006.229.12:15:44.23#ibcon#wrote, iclass 25, count 0 2006.229.12:15:44.23#ibcon#about to read 3, iclass 25, count 0 2006.229.12:15:44.25#ibcon#read 3, iclass 25, count 0 2006.229.12:15:44.25#ibcon#about to read 4, iclass 25, count 0 2006.229.12:15:44.25#ibcon#read 4, iclass 25, count 0 2006.229.12:15:44.25#ibcon#about to read 5, iclass 25, count 0 2006.229.12:15:44.25#ibcon#read 5, iclass 25, count 0 2006.229.12:15:44.25#ibcon#about to read 6, iclass 25, count 0 2006.229.12:15:44.25#ibcon#read 6, iclass 25, count 0 2006.229.12:15:44.25#ibcon#end of sib2, iclass 25, count 0 2006.229.12:15:44.25#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:15:44.25#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:15:44.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:15:44.25#ibcon#*before write, iclass 25, count 0 2006.229.12:15:44.25#ibcon#enter sib2, iclass 25, count 0 2006.229.12:15:44.25#ibcon#flushed, iclass 25, count 0 2006.229.12:15:44.25#ibcon#about to write, iclass 25, count 0 2006.229.12:15:44.25#ibcon#wrote, iclass 25, count 0 2006.229.12:15:44.25#ibcon#about to read 3, iclass 25, count 0 2006.229.12:15:44.30#ibcon#read 3, iclass 25, count 0 2006.229.12:15:44.30#ibcon#about to read 4, iclass 25, count 0 2006.229.12:15:44.30#ibcon#read 4, iclass 25, count 0 2006.229.12:15:44.30#ibcon#about to read 5, iclass 25, count 0 2006.229.12:15:44.30#ibcon#read 5, iclass 25, count 0 2006.229.12:15:44.30#ibcon#about to read 6, iclass 25, count 0 2006.229.12:15:44.30#ibcon#read 6, iclass 25, count 0 2006.229.12:15:44.30#ibcon#end of sib2, iclass 25, count 0 2006.229.12:15:44.30#ibcon#*after write, iclass 25, count 0 2006.229.12:15:44.30#ibcon#*before return 0, iclass 25, count 0 2006.229.12:15:44.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:15:44.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:15:44.30#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:15:44.30#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:15:44.30$vck44/va=1,8 2006.229.12:15:44.30#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.12:15:44.30#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.12:15:44.30#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:44.30#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:15:44.30#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:15:44.30#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:15:44.30#ibcon#enter wrdev, iclass 27, count 2 2006.229.12:15:44.30#ibcon#first serial, iclass 27, count 2 2006.229.12:15:44.30#ibcon#enter sib2, iclass 27, count 2 2006.229.12:15:44.30#ibcon#flushed, iclass 27, count 2 2006.229.12:15:44.30#ibcon#about to write, iclass 27, count 2 2006.229.12:15:44.30#ibcon#wrote, iclass 27, count 2 2006.229.12:15:44.30#ibcon#about to read 3, iclass 27, count 2 2006.229.12:15:44.32#ibcon#read 3, iclass 27, count 2 2006.229.12:15:44.32#ibcon#about to read 4, iclass 27, count 2 2006.229.12:15:44.32#ibcon#read 4, iclass 27, count 2 2006.229.12:15:44.32#ibcon#about to read 5, iclass 27, count 2 2006.229.12:15:44.32#ibcon#read 5, iclass 27, count 2 2006.229.12:15:44.32#ibcon#about to read 6, iclass 27, count 2 2006.229.12:15:44.32#ibcon#read 6, iclass 27, count 2 2006.229.12:15:44.32#ibcon#end of sib2, iclass 27, count 2 2006.229.12:15:44.32#ibcon#*mode == 0, iclass 27, count 2 2006.229.12:15:44.32#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.12:15:44.32#ibcon#[25=AT01-08\r\n] 2006.229.12:15:44.32#ibcon#*before write, iclass 27, count 2 2006.229.12:15:44.32#ibcon#enter sib2, iclass 27, count 2 2006.229.12:15:44.32#ibcon#flushed, iclass 27, count 2 2006.229.12:15:44.32#ibcon#about to write, iclass 27, count 2 2006.229.12:15:44.32#ibcon#wrote, iclass 27, count 2 2006.229.12:15:44.32#ibcon#about to read 3, iclass 27, count 2 2006.229.12:15:44.35#ibcon#read 3, iclass 27, count 2 2006.229.12:15:44.35#ibcon#about to read 4, iclass 27, count 2 2006.229.12:15:44.35#ibcon#read 4, iclass 27, count 2 2006.229.12:15:44.35#ibcon#about to read 5, iclass 27, count 2 2006.229.12:15:44.35#ibcon#read 5, iclass 27, count 2 2006.229.12:15:44.35#ibcon#about to read 6, iclass 27, count 2 2006.229.12:15:44.35#ibcon#read 6, iclass 27, count 2 2006.229.12:15:44.35#ibcon#end of sib2, iclass 27, count 2 2006.229.12:15:44.35#ibcon#*after write, iclass 27, count 2 2006.229.12:15:44.35#ibcon#*before return 0, iclass 27, count 2 2006.229.12:15:44.35#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:15:44.35#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:15:44.35#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.12:15:44.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:44.35#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:15:44.47#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:15:44.47#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:15:44.47#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:15:44.47#ibcon#first serial, iclass 27, count 0 2006.229.12:15:44.47#ibcon#enter sib2, iclass 27, count 0 2006.229.12:15:44.47#ibcon#flushed, iclass 27, count 0 2006.229.12:15:44.47#ibcon#about to write, iclass 27, count 0 2006.229.12:15:44.47#ibcon#wrote, iclass 27, count 0 2006.229.12:15:44.47#ibcon#about to read 3, iclass 27, count 0 2006.229.12:15:44.49#ibcon#read 3, iclass 27, count 0 2006.229.12:15:44.49#ibcon#about to read 4, iclass 27, count 0 2006.229.12:15:44.49#ibcon#read 4, iclass 27, count 0 2006.229.12:15:44.49#ibcon#about to read 5, iclass 27, count 0 2006.229.12:15:44.49#ibcon#read 5, iclass 27, count 0 2006.229.12:15:44.49#ibcon#about to read 6, iclass 27, count 0 2006.229.12:15:44.49#ibcon#read 6, iclass 27, count 0 2006.229.12:15:44.49#ibcon#end of sib2, iclass 27, count 0 2006.229.12:15:44.49#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:15:44.49#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:15:44.49#ibcon#[25=USB\r\n] 2006.229.12:15:44.49#ibcon#*before write, iclass 27, count 0 2006.229.12:15:44.49#ibcon#enter sib2, iclass 27, count 0 2006.229.12:15:44.49#ibcon#flushed, iclass 27, count 0 2006.229.12:15:44.49#ibcon#about to write, iclass 27, count 0 2006.229.12:15:44.49#ibcon#wrote, iclass 27, count 0 2006.229.12:15:44.49#ibcon#about to read 3, iclass 27, count 0 2006.229.12:15:44.52#ibcon#read 3, iclass 27, count 0 2006.229.12:15:44.52#ibcon#about to read 4, iclass 27, count 0 2006.229.12:15:44.52#ibcon#read 4, iclass 27, count 0 2006.229.12:15:44.52#ibcon#about to read 5, iclass 27, count 0 2006.229.12:15:44.52#ibcon#read 5, iclass 27, count 0 2006.229.12:15:44.52#ibcon#about to read 6, iclass 27, count 0 2006.229.12:15:44.52#ibcon#read 6, iclass 27, count 0 2006.229.12:15:44.52#ibcon#end of sib2, iclass 27, count 0 2006.229.12:15:44.52#ibcon#*after write, iclass 27, count 0 2006.229.12:15:44.52#ibcon#*before return 0, iclass 27, count 0 2006.229.12:15:44.52#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:15:44.52#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:15:44.52#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:15:44.52#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:15:44.52$vck44/valo=2,534.99 2006.229.12:15:44.52#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.12:15:44.52#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.12:15:44.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:44.52#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:44.52#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:44.52#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:44.52#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:15:44.52#ibcon#first serial, iclass 29, count 0 2006.229.12:15:44.52#ibcon#enter sib2, iclass 29, count 0 2006.229.12:15:44.52#ibcon#flushed, iclass 29, count 0 2006.229.12:15:44.52#ibcon#about to write, iclass 29, count 0 2006.229.12:15:44.52#ibcon#wrote, iclass 29, count 0 2006.229.12:15:44.52#ibcon#about to read 3, iclass 29, count 0 2006.229.12:15:44.54#ibcon#read 3, iclass 29, count 0 2006.229.12:15:44.54#ibcon#about to read 4, iclass 29, count 0 2006.229.12:15:44.54#ibcon#read 4, iclass 29, count 0 2006.229.12:15:44.54#ibcon#about to read 5, iclass 29, count 0 2006.229.12:15:44.54#ibcon#read 5, iclass 29, count 0 2006.229.12:15:44.54#ibcon#about to read 6, iclass 29, count 0 2006.229.12:15:44.54#ibcon#read 6, iclass 29, count 0 2006.229.12:15:44.54#ibcon#end of sib2, iclass 29, count 0 2006.229.12:15:44.54#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:15:44.54#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:15:44.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:15:44.54#ibcon#*before write, iclass 29, count 0 2006.229.12:15:44.54#ibcon#enter sib2, iclass 29, count 0 2006.229.12:15:44.54#ibcon#flushed, iclass 29, count 0 2006.229.12:15:44.54#ibcon#about to write, iclass 29, count 0 2006.229.12:15:44.54#ibcon#wrote, iclass 29, count 0 2006.229.12:15:44.54#ibcon#about to read 3, iclass 29, count 0 2006.229.12:15:44.58#ibcon#read 3, iclass 29, count 0 2006.229.12:15:44.58#ibcon#about to read 4, iclass 29, count 0 2006.229.12:15:44.58#ibcon#read 4, iclass 29, count 0 2006.229.12:15:44.58#ibcon#about to read 5, iclass 29, count 0 2006.229.12:15:44.58#ibcon#read 5, iclass 29, count 0 2006.229.12:15:44.58#ibcon#about to read 6, iclass 29, count 0 2006.229.12:15:44.58#ibcon#read 6, iclass 29, count 0 2006.229.12:15:44.58#ibcon#end of sib2, iclass 29, count 0 2006.229.12:15:44.58#ibcon#*after write, iclass 29, count 0 2006.229.12:15:44.58#ibcon#*before return 0, iclass 29, count 0 2006.229.12:15:44.58#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:44.58#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:44.58#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:15:44.58#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:15:44.58$vck44/va=2,7 2006.229.12:15:44.58#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.12:15:44.58#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.12:15:44.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:44.58#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:44.64#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:44.64#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:44.64#ibcon#enter wrdev, iclass 31, count 2 2006.229.12:15:44.64#ibcon#first serial, iclass 31, count 2 2006.229.12:15:44.64#ibcon#enter sib2, iclass 31, count 2 2006.229.12:15:44.64#ibcon#flushed, iclass 31, count 2 2006.229.12:15:44.64#ibcon#about to write, iclass 31, count 2 2006.229.12:15:44.64#ibcon#wrote, iclass 31, count 2 2006.229.12:15:44.64#ibcon#about to read 3, iclass 31, count 2 2006.229.12:15:44.66#ibcon#read 3, iclass 31, count 2 2006.229.12:15:44.66#ibcon#about to read 4, iclass 31, count 2 2006.229.12:15:44.66#ibcon#read 4, iclass 31, count 2 2006.229.12:15:44.66#ibcon#about to read 5, iclass 31, count 2 2006.229.12:15:44.66#ibcon#read 5, iclass 31, count 2 2006.229.12:15:44.66#ibcon#about to read 6, iclass 31, count 2 2006.229.12:15:44.66#ibcon#read 6, iclass 31, count 2 2006.229.12:15:44.66#ibcon#end of sib2, iclass 31, count 2 2006.229.12:15:44.66#ibcon#*mode == 0, iclass 31, count 2 2006.229.12:15:44.66#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.12:15:44.66#ibcon#[25=AT02-07\r\n] 2006.229.12:15:44.66#ibcon#*before write, iclass 31, count 2 2006.229.12:15:44.66#ibcon#enter sib2, iclass 31, count 2 2006.229.12:15:44.66#ibcon#flushed, iclass 31, count 2 2006.229.12:15:44.66#ibcon#about to write, iclass 31, count 2 2006.229.12:15:44.66#ibcon#wrote, iclass 31, count 2 2006.229.12:15:44.66#ibcon#about to read 3, iclass 31, count 2 2006.229.12:15:44.69#ibcon#read 3, iclass 31, count 2 2006.229.12:15:44.69#ibcon#about to read 4, iclass 31, count 2 2006.229.12:15:44.69#ibcon#read 4, iclass 31, count 2 2006.229.12:15:44.69#ibcon#about to read 5, iclass 31, count 2 2006.229.12:15:44.69#ibcon#read 5, iclass 31, count 2 2006.229.12:15:44.69#ibcon#about to read 6, iclass 31, count 2 2006.229.12:15:44.69#ibcon#read 6, iclass 31, count 2 2006.229.12:15:44.69#ibcon#end of sib2, iclass 31, count 2 2006.229.12:15:44.69#ibcon#*after write, iclass 31, count 2 2006.229.12:15:44.69#ibcon#*before return 0, iclass 31, count 2 2006.229.12:15:44.69#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:44.69#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:44.69#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.12:15:44.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:44.69#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:44.81#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:44.81#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:44.81#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:15:44.81#ibcon#first serial, iclass 31, count 0 2006.229.12:15:44.81#ibcon#enter sib2, iclass 31, count 0 2006.229.12:15:44.81#ibcon#flushed, iclass 31, count 0 2006.229.12:15:44.81#ibcon#about to write, iclass 31, count 0 2006.229.12:15:44.81#ibcon#wrote, iclass 31, count 0 2006.229.12:15:44.81#ibcon#about to read 3, iclass 31, count 0 2006.229.12:15:44.83#ibcon#read 3, iclass 31, count 0 2006.229.12:15:44.83#ibcon#about to read 4, iclass 31, count 0 2006.229.12:15:44.83#ibcon#read 4, iclass 31, count 0 2006.229.12:15:44.83#ibcon#about to read 5, iclass 31, count 0 2006.229.12:15:44.83#ibcon#read 5, iclass 31, count 0 2006.229.12:15:44.83#ibcon#about to read 6, iclass 31, count 0 2006.229.12:15:44.83#ibcon#read 6, iclass 31, count 0 2006.229.12:15:44.83#ibcon#end of sib2, iclass 31, count 0 2006.229.12:15:44.83#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:15:44.83#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:15:44.83#ibcon#[25=USB\r\n] 2006.229.12:15:44.83#ibcon#*before write, iclass 31, count 0 2006.229.12:15:44.83#ibcon#enter sib2, iclass 31, count 0 2006.229.12:15:44.83#ibcon#flushed, iclass 31, count 0 2006.229.12:15:44.83#ibcon#about to write, iclass 31, count 0 2006.229.12:15:44.83#ibcon#wrote, iclass 31, count 0 2006.229.12:15:44.83#ibcon#about to read 3, iclass 31, count 0 2006.229.12:15:44.86#ibcon#read 3, iclass 31, count 0 2006.229.12:15:44.86#ibcon#about to read 4, iclass 31, count 0 2006.229.12:15:44.86#ibcon#read 4, iclass 31, count 0 2006.229.12:15:44.86#ibcon#about to read 5, iclass 31, count 0 2006.229.12:15:44.86#ibcon#read 5, iclass 31, count 0 2006.229.12:15:44.86#ibcon#about to read 6, iclass 31, count 0 2006.229.12:15:44.86#ibcon#read 6, iclass 31, count 0 2006.229.12:15:44.86#ibcon#end of sib2, iclass 31, count 0 2006.229.12:15:44.86#ibcon#*after write, iclass 31, count 0 2006.229.12:15:44.86#ibcon#*before return 0, iclass 31, count 0 2006.229.12:15:44.86#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:44.86#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:44.86#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:15:44.86#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:15:44.86$vck44/valo=3,564.99 2006.229.12:15:44.86#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.12:15:44.86#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.12:15:44.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:44.86#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:44.86#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:44.86#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:44.86#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:15:44.86#ibcon#first serial, iclass 33, count 0 2006.229.12:15:44.86#ibcon#enter sib2, iclass 33, count 0 2006.229.12:15:44.86#ibcon#flushed, iclass 33, count 0 2006.229.12:15:44.86#ibcon#about to write, iclass 33, count 0 2006.229.12:15:44.86#ibcon#wrote, iclass 33, count 0 2006.229.12:15:44.86#ibcon#about to read 3, iclass 33, count 0 2006.229.12:15:44.88#ibcon#read 3, iclass 33, count 0 2006.229.12:15:44.88#ibcon#about to read 4, iclass 33, count 0 2006.229.12:15:44.88#ibcon#read 4, iclass 33, count 0 2006.229.12:15:44.88#ibcon#about to read 5, iclass 33, count 0 2006.229.12:15:44.88#ibcon#read 5, iclass 33, count 0 2006.229.12:15:44.88#ibcon#about to read 6, iclass 33, count 0 2006.229.12:15:44.88#ibcon#read 6, iclass 33, count 0 2006.229.12:15:44.88#ibcon#end of sib2, iclass 33, count 0 2006.229.12:15:44.88#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:15:44.88#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:15:44.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:15:44.88#ibcon#*before write, iclass 33, count 0 2006.229.12:15:44.88#ibcon#enter sib2, iclass 33, count 0 2006.229.12:15:44.88#ibcon#flushed, iclass 33, count 0 2006.229.12:15:44.88#ibcon#about to write, iclass 33, count 0 2006.229.12:15:44.88#ibcon#wrote, iclass 33, count 0 2006.229.12:15:44.88#ibcon#about to read 3, iclass 33, count 0 2006.229.12:15:44.92#ibcon#read 3, iclass 33, count 0 2006.229.12:15:44.92#ibcon#about to read 4, iclass 33, count 0 2006.229.12:15:44.92#ibcon#read 4, iclass 33, count 0 2006.229.12:15:44.92#ibcon#about to read 5, iclass 33, count 0 2006.229.12:15:44.92#ibcon#read 5, iclass 33, count 0 2006.229.12:15:44.92#ibcon#about to read 6, iclass 33, count 0 2006.229.12:15:44.92#ibcon#read 6, iclass 33, count 0 2006.229.12:15:44.92#ibcon#end of sib2, iclass 33, count 0 2006.229.12:15:44.92#ibcon#*after write, iclass 33, count 0 2006.229.12:15:44.92#ibcon#*before return 0, iclass 33, count 0 2006.229.12:15:44.92#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:44.92#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:44.92#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:15:44.92#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:15:44.92$vck44/va=3,6 2006.229.12:15:44.92#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.12:15:44.92#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.12:15:44.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:44.92#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:44.98#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:44.98#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:44.98#ibcon#enter wrdev, iclass 35, count 2 2006.229.12:15:44.98#ibcon#first serial, iclass 35, count 2 2006.229.12:15:44.98#ibcon#enter sib2, iclass 35, count 2 2006.229.12:15:44.98#ibcon#flushed, iclass 35, count 2 2006.229.12:15:44.98#ibcon#about to write, iclass 35, count 2 2006.229.12:15:44.98#ibcon#wrote, iclass 35, count 2 2006.229.12:15:44.98#ibcon#about to read 3, iclass 35, count 2 2006.229.12:15:45.00#ibcon#read 3, iclass 35, count 2 2006.229.12:15:45.00#ibcon#about to read 4, iclass 35, count 2 2006.229.12:15:45.00#ibcon#read 4, iclass 35, count 2 2006.229.12:15:45.00#ibcon#about to read 5, iclass 35, count 2 2006.229.12:15:45.00#ibcon#read 5, iclass 35, count 2 2006.229.12:15:45.00#ibcon#about to read 6, iclass 35, count 2 2006.229.12:15:45.00#ibcon#read 6, iclass 35, count 2 2006.229.12:15:45.00#ibcon#end of sib2, iclass 35, count 2 2006.229.12:15:45.00#ibcon#*mode == 0, iclass 35, count 2 2006.229.12:15:45.00#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.12:15:45.00#ibcon#[25=AT03-06\r\n] 2006.229.12:15:45.00#ibcon#*before write, iclass 35, count 2 2006.229.12:15:45.00#ibcon#enter sib2, iclass 35, count 2 2006.229.12:15:45.00#ibcon#flushed, iclass 35, count 2 2006.229.12:15:45.00#ibcon#about to write, iclass 35, count 2 2006.229.12:15:45.00#ibcon#wrote, iclass 35, count 2 2006.229.12:15:45.00#ibcon#about to read 3, iclass 35, count 2 2006.229.12:15:45.03#ibcon#read 3, iclass 35, count 2 2006.229.12:15:45.03#ibcon#about to read 4, iclass 35, count 2 2006.229.12:15:45.03#ibcon#read 4, iclass 35, count 2 2006.229.12:15:45.03#ibcon#about to read 5, iclass 35, count 2 2006.229.12:15:45.03#ibcon#read 5, iclass 35, count 2 2006.229.12:15:45.03#ibcon#about to read 6, iclass 35, count 2 2006.229.12:15:45.03#ibcon#read 6, iclass 35, count 2 2006.229.12:15:45.03#ibcon#end of sib2, iclass 35, count 2 2006.229.12:15:45.03#ibcon#*after write, iclass 35, count 2 2006.229.12:15:45.03#ibcon#*before return 0, iclass 35, count 2 2006.229.12:15:45.03#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:45.03#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:45.03#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.12:15:45.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:45.03#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:45.15#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:45.15#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:45.15#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:15:45.15#ibcon#first serial, iclass 35, count 0 2006.229.12:15:45.15#ibcon#enter sib2, iclass 35, count 0 2006.229.12:15:45.15#ibcon#flushed, iclass 35, count 0 2006.229.12:15:45.15#ibcon#about to write, iclass 35, count 0 2006.229.12:15:45.15#ibcon#wrote, iclass 35, count 0 2006.229.12:15:45.15#ibcon#about to read 3, iclass 35, count 0 2006.229.12:15:45.17#ibcon#read 3, iclass 35, count 0 2006.229.12:15:45.17#ibcon#about to read 4, iclass 35, count 0 2006.229.12:15:45.17#ibcon#read 4, iclass 35, count 0 2006.229.12:15:45.17#ibcon#about to read 5, iclass 35, count 0 2006.229.12:15:45.17#ibcon#read 5, iclass 35, count 0 2006.229.12:15:45.17#ibcon#about to read 6, iclass 35, count 0 2006.229.12:15:45.17#ibcon#read 6, iclass 35, count 0 2006.229.12:15:45.17#ibcon#end of sib2, iclass 35, count 0 2006.229.12:15:45.17#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:15:45.17#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:15:45.17#ibcon#[25=USB\r\n] 2006.229.12:15:45.17#ibcon#*before write, iclass 35, count 0 2006.229.12:15:45.17#ibcon#enter sib2, iclass 35, count 0 2006.229.12:15:45.17#ibcon#flushed, iclass 35, count 0 2006.229.12:15:45.17#ibcon#about to write, iclass 35, count 0 2006.229.12:15:45.17#ibcon#wrote, iclass 35, count 0 2006.229.12:15:45.17#ibcon#about to read 3, iclass 35, count 0 2006.229.12:15:45.20#ibcon#read 3, iclass 35, count 0 2006.229.12:15:45.20#ibcon#about to read 4, iclass 35, count 0 2006.229.12:15:45.20#ibcon#read 4, iclass 35, count 0 2006.229.12:15:45.20#ibcon#about to read 5, iclass 35, count 0 2006.229.12:15:45.20#ibcon#read 5, iclass 35, count 0 2006.229.12:15:45.20#ibcon#about to read 6, iclass 35, count 0 2006.229.12:15:45.20#ibcon#read 6, iclass 35, count 0 2006.229.12:15:45.20#ibcon#end of sib2, iclass 35, count 0 2006.229.12:15:45.20#ibcon#*after write, iclass 35, count 0 2006.229.12:15:45.20#ibcon#*before return 0, iclass 35, count 0 2006.229.12:15:45.20#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:45.20#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:45.20#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:15:45.20#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:15:45.20$vck44/valo=4,624.99 2006.229.12:15:45.20#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.12:15:45.20#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.12:15:45.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:45.20#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:45.20#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:45.20#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:45.20#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:15:45.20#ibcon#first serial, iclass 37, count 0 2006.229.12:15:45.20#ibcon#enter sib2, iclass 37, count 0 2006.229.12:15:45.20#ibcon#flushed, iclass 37, count 0 2006.229.12:15:45.20#ibcon#about to write, iclass 37, count 0 2006.229.12:15:45.20#ibcon#wrote, iclass 37, count 0 2006.229.12:15:45.20#ibcon#about to read 3, iclass 37, count 0 2006.229.12:15:45.22#ibcon#read 3, iclass 37, count 0 2006.229.12:15:45.22#ibcon#about to read 4, iclass 37, count 0 2006.229.12:15:45.22#ibcon#read 4, iclass 37, count 0 2006.229.12:15:45.22#ibcon#about to read 5, iclass 37, count 0 2006.229.12:15:45.22#ibcon#read 5, iclass 37, count 0 2006.229.12:15:45.22#ibcon#about to read 6, iclass 37, count 0 2006.229.12:15:45.22#ibcon#read 6, iclass 37, count 0 2006.229.12:15:45.22#ibcon#end of sib2, iclass 37, count 0 2006.229.12:15:45.22#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:15:45.22#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:15:45.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:15:45.22#ibcon#*before write, iclass 37, count 0 2006.229.12:15:45.22#ibcon#enter sib2, iclass 37, count 0 2006.229.12:15:45.22#ibcon#flushed, iclass 37, count 0 2006.229.12:15:45.22#ibcon#about to write, iclass 37, count 0 2006.229.12:15:45.22#ibcon#wrote, iclass 37, count 0 2006.229.12:15:45.22#ibcon#about to read 3, iclass 37, count 0 2006.229.12:15:45.26#ibcon#read 3, iclass 37, count 0 2006.229.12:15:45.26#ibcon#about to read 4, iclass 37, count 0 2006.229.12:15:45.26#ibcon#read 4, iclass 37, count 0 2006.229.12:15:45.26#ibcon#about to read 5, iclass 37, count 0 2006.229.12:15:45.26#ibcon#read 5, iclass 37, count 0 2006.229.12:15:45.26#ibcon#about to read 6, iclass 37, count 0 2006.229.12:15:45.26#ibcon#read 6, iclass 37, count 0 2006.229.12:15:45.26#ibcon#end of sib2, iclass 37, count 0 2006.229.12:15:45.26#ibcon#*after write, iclass 37, count 0 2006.229.12:15:45.26#ibcon#*before return 0, iclass 37, count 0 2006.229.12:15:45.26#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:45.26#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:45.26#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:15:45.26#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:15:45.26$vck44/va=4,7 2006.229.12:15:45.26#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.12:15:45.26#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.12:15:45.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:45.26#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:45.32#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:45.32#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:45.32#ibcon#enter wrdev, iclass 39, count 2 2006.229.12:15:45.32#ibcon#first serial, iclass 39, count 2 2006.229.12:15:45.32#ibcon#enter sib2, iclass 39, count 2 2006.229.12:15:45.32#ibcon#flushed, iclass 39, count 2 2006.229.12:15:45.32#ibcon#about to write, iclass 39, count 2 2006.229.12:15:45.32#ibcon#wrote, iclass 39, count 2 2006.229.12:15:45.32#ibcon#about to read 3, iclass 39, count 2 2006.229.12:15:45.34#ibcon#read 3, iclass 39, count 2 2006.229.12:15:45.34#ibcon#about to read 4, iclass 39, count 2 2006.229.12:15:45.34#ibcon#read 4, iclass 39, count 2 2006.229.12:15:45.34#ibcon#about to read 5, iclass 39, count 2 2006.229.12:15:45.34#ibcon#read 5, iclass 39, count 2 2006.229.12:15:45.34#ibcon#about to read 6, iclass 39, count 2 2006.229.12:15:45.34#ibcon#read 6, iclass 39, count 2 2006.229.12:15:45.34#ibcon#end of sib2, iclass 39, count 2 2006.229.12:15:45.34#ibcon#*mode == 0, iclass 39, count 2 2006.229.12:15:45.34#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.12:15:45.34#ibcon#[25=AT04-07\r\n] 2006.229.12:15:45.34#ibcon#*before write, iclass 39, count 2 2006.229.12:15:45.34#ibcon#enter sib2, iclass 39, count 2 2006.229.12:15:45.34#ibcon#flushed, iclass 39, count 2 2006.229.12:15:45.34#ibcon#about to write, iclass 39, count 2 2006.229.12:15:45.34#ibcon#wrote, iclass 39, count 2 2006.229.12:15:45.34#ibcon#about to read 3, iclass 39, count 2 2006.229.12:15:45.37#ibcon#read 3, iclass 39, count 2 2006.229.12:15:45.37#ibcon#about to read 4, iclass 39, count 2 2006.229.12:15:45.37#ibcon#read 4, iclass 39, count 2 2006.229.12:15:45.37#ibcon#about to read 5, iclass 39, count 2 2006.229.12:15:45.37#ibcon#read 5, iclass 39, count 2 2006.229.12:15:45.37#ibcon#about to read 6, iclass 39, count 2 2006.229.12:15:45.37#ibcon#read 6, iclass 39, count 2 2006.229.12:15:45.37#ibcon#end of sib2, iclass 39, count 2 2006.229.12:15:45.37#ibcon#*after write, iclass 39, count 2 2006.229.12:15:45.37#ibcon#*before return 0, iclass 39, count 2 2006.229.12:15:45.37#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:45.37#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:45.37#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.12:15:45.37#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:45.37#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:45.49#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:45.49#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:45.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:15:45.49#ibcon#first serial, iclass 39, count 0 2006.229.12:15:45.49#ibcon#enter sib2, iclass 39, count 0 2006.229.12:15:45.49#ibcon#flushed, iclass 39, count 0 2006.229.12:15:45.49#ibcon#about to write, iclass 39, count 0 2006.229.12:15:45.49#ibcon#wrote, iclass 39, count 0 2006.229.12:15:45.49#ibcon#about to read 3, iclass 39, count 0 2006.229.12:15:45.51#ibcon#read 3, iclass 39, count 0 2006.229.12:15:45.51#ibcon#about to read 4, iclass 39, count 0 2006.229.12:15:45.51#ibcon#read 4, iclass 39, count 0 2006.229.12:15:45.51#ibcon#about to read 5, iclass 39, count 0 2006.229.12:15:45.51#ibcon#read 5, iclass 39, count 0 2006.229.12:15:45.51#ibcon#about to read 6, iclass 39, count 0 2006.229.12:15:45.51#ibcon#read 6, iclass 39, count 0 2006.229.12:15:45.51#ibcon#end of sib2, iclass 39, count 0 2006.229.12:15:45.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:15:45.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:15:45.51#ibcon#[25=USB\r\n] 2006.229.12:15:45.51#ibcon#*before write, iclass 39, count 0 2006.229.12:15:45.51#ibcon#enter sib2, iclass 39, count 0 2006.229.12:15:45.51#ibcon#flushed, iclass 39, count 0 2006.229.12:15:45.51#ibcon#about to write, iclass 39, count 0 2006.229.12:15:45.51#ibcon#wrote, iclass 39, count 0 2006.229.12:15:45.51#ibcon#about to read 3, iclass 39, count 0 2006.229.12:15:45.54#ibcon#read 3, iclass 39, count 0 2006.229.12:15:45.54#ibcon#about to read 4, iclass 39, count 0 2006.229.12:15:45.54#ibcon#read 4, iclass 39, count 0 2006.229.12:15:45.54#ibcon#about to read 5, iclass 39, count 0 2006.229.12:15:45.54#ibcon#read 5, iclass 39, count 0 2006.229.12:15:45.54#ibcon#about to read 6, iclass 39, count 0 2006.229.12:15:45.54#ibcon#read 6, iclass 39, count 0 2006.229.12:15:45.54#ibcon#end of sib2, iclass 39, count 0 2006.229.12:15:45.54#ibcon#*after write, iclass 39, count 0 2006.229.12:15:45.54#ibcon#*before return 0, iclass 39, count 0 2006.229.12:15:45.54#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:45.54#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:45.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:15:45.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:15:45.54$vck44/valo=5,734.99 2006.229.12:15:45.54#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.12:15:45.54#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.12:15:45.54#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:45.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:45.54#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:45.54#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:45.54#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:15:45.54#ibcon#first serial, iclass 3, count 0 2006.229.12:15:45.54#ibcon#enter sib2, iclass 3, count 0 2006.229.12:15:45.54#ibcon#flushed, iclass 3, count 0 2006.229.12:15:45.54#ibcon#about to write, iclass 3, count 0 2006.229.12:15:45.54#ibcon#wrote, iclass 3, count 0 2006.229.12:15:45.54#ibcon#about to read 3, iclass 3, count 0 2006.229.12:15:45.56#ibcon#read 3, iclass 3, count 0 2006.229.12:15:45.56#ibcon#about to read 4, iclass 3, count 0 2006.229.12:15:45.56#ibcon#read 4, iclass 3, count 0 2006.229.12:15:45.56#ibcon#about to read 5, iclass 3, count 0 2006.229.12:15:45.56#ibcon#read 5, iclass 3, count 0 2006.229.12:15:45.56#ibcon#about to read 6, iclass 3, count 0 2006.229.12:15:45.56#ibcon#read 6, iclass 3, count 0 2006.229.12:15:45.56#ibcon#end of sib2, iclass 3, count 0 2006.229.12:15:45.56#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:15:45.56#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:15:45.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:15:45.56#ibcon#*before write, iclass 3, count 0 2006.229.12:15:45.56#ibcon#enter sib2, iclass 3, count 0 2006.229.12:15:45.56#ibcon#flushed, iclass 3, count 0 2006.229.12:15:45.56#ibcon#about to write, iclass 3, count 0 2006.229.12:15:45.56#ibcon#wrote, iclass 3, count 0 2006.229.12:15:45.56#ibcon#about to read 3, iclass 3, count 0 2006.229.12:15:45.60#ibcon#read 3, iclass 3, count 0 2006.229.12:15:45.60#ibcon#about to read 4, iclass 3, count 0 2006.229.12:15:45.60#ibcon#read 4, iclass 3, count 0 2006.229.12:15:45.60#ibcon#about to read 5, iclass 3, count 0 2006.229.12:15:45.60#ibcon#read 5, iclass 3, count 0 2006.229.12:15:45.60#ibcon#about to read 6, iclass 3, count 0 2006.229.12:15:45.60#ibcon#read 6, iclass 3, count 0 2006.229.12:15:45.60#ibcon#end of sib2, iclass 3, count 0 2006.229.12:15:45.60#ibcon#*after write, iclass 3, count 0 2006.229.12:15:45.60#ibcon#*before return 0, iclass 3, count 0 2006.229.12:15:45.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:45.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:45.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:15:45.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:15:45.60$vck44/va=5,4 2006.229.12:15:45.60#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.12:15:45.60#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.12:15:45.60#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:45.60#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:45.66#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:45.66#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:45.66#ibcon#enter wrdev, iclass 5, count 2 2006.229.12:15:45.66#ibcon#first serial, iclass 5, count 2 2006.229.12:15:45.66#ibcon#enter sib2, iclass 5, count 2 2006.229.12:15:45.66#ibcon#flushed, iclass 5, count 2 2006.229.12:15:45.66#ibcon#about to write, iclass 5, count 2 2006.229.12:15:45.66#ibcon#wrote, iclass 5, count 2 2006.229.12:15:45.66#ibcon#about to read 3, iclass 5, count 2 2006.229.12:15:45.68#ibcon#read 3, iclass 5, count 2 2006.229.12:15:45.68#ibcon#about to read 4, iclass 5, count 2 2006.229.12:15:45.68#ibcon#read 4, iclass 5, count 2 2006.229.12:15:45.68#ibcon#about to read 5, iclass 5, count 2 2006.229.12:15:45.68#ibcon#read 5, iclass 5, count 2 2006.229.12:15:45.68#ibcon#about to read 6, iclass 5, count 2 2006.229.12:15:45.68#ibcon#read 6, iclass 5, count 2 2006.229.12:15:45.68#ibcon#end of sib2, iclass 5, count 2 2006.229.12:15:45.68#ibcon#*mode == 0, iclass 5, count 2 2006.229.12:15:45.68#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.12:15:45.68#ibcon#[25=AT05-04\r\n] 2006.229.12:15:45.68#ibcon#*before write, iclass 5, count 2 2006.229.12:15:45.68#ibcon#enter sib2, iclass 5, count 2 2006.229.12:15:45.68#ibcon#flushed, iclass 5, count 2 2006.229.12:15:45.68#ibcon#about to write, iclass 5, count 2 2006.229.12:15:45.68#ibcon#wrote, iclass 5, count 2 2006.229.12:15:45.68#ibcon#about to read 3, iclass 5, count 2 2006.229.12:15:45.71#ibcon#read 3, iclass 5, count 2 2006.229.12:15:45.71#ibcon#about to read 4, iclass 5, count 2 2006.229.12:15:45.71#ibcon#read 4, iclass 5, count 2 2006.229.12:15:45.71#ibcon#about to read 5, iclass 5, count 2 2006.229.12:15:45.71#ibcon#read 5, iclass 5, count 2 2006.229.12:15:45.71#ibcon#about to read 6, iclass 5, count 2 2006.229.12:15:45.71#ibcon#read 6, iclass 5, count 2 2006.229.12:15:45.71#ibcon#end of sib2, iclass 5, count 2 2006.229.12:15:45.71#ibcon#*after write, iclass 5, count 2 2006.229.12:15:45.71#ibcon#*before return 0, iclass 5, count 2 2006.229.12:15:45.71#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:45.71#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:45.71#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.12:15:45.71#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:45.71#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:45.83#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:45.83#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:45.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:15:45.83#ibcon#first serial, iclass 5, count 0 2006.229.12:15:45.83#ibcon#enter sib2, iclass 5, count 0 2006.229.12:15:45.83#ibcon#flushed, iclass 5, count 0 2006.229.12:15:45.83#ibcon#about to write, iclass 5, count 0 2006.229.12:15:45.83#ibcon#wrote, iclass 5, count 0 2006.229.12:15:45.83#ibcon#about to read 3, iclass 5, count 0 2006.229.12:15:45.85#ibcon#read 3, iclass 5, count 0 2006.229.12:15:45.85#ibcon#about to read 4, iclass 5, count 0 2006.229.12:15:45.85#ibcon#read 4, iclass 5, count 0 2006.229.12:15:45.85#ibcon#about to read 5, iclass 5, count 0 2006.229.12:15:45.85#ibcon#read 5, iclass 5, count 0 2006.229.12:15:45.85#ibcon#about to read 6, iclass 5, count 0 2006.229.12:15:45.85#ibcon#read 6, iclass 5, count 0 2006.229.12:15:45.85#ibcon#end of sib2, iclass 5, count 0 2006.229.12:15:45.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:15:45.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:15:45.85#ibcon#[25=USB\r\n] 2006.229.12:15:45.85#ibcon#*before write, iclass 5, count 0 2006.229.12:15:45.85#ibcon#enter sib2, iclass 5, count 0 2006.229.12:15:45.85#ibcon#flushed, iclass 5, count 0 2006.229.12:15:45.85#ibcon#about to write, iclass 5, count 0 2006.229.12:15:45.85#ibcon#wrote, iclass 5, count 0 2006.229.12:15:45.85#ibcon#about to read 3, iclass 5, count 0 2006.229.12:15:45.88#ibcon#read 3, iclass 5, count 0 2006.229.12:15:45.88#ibcon#about to read 4, iclass 5, count 0 2006.229.12:15:45.88#ibcon#read 4, iclass 5, count 0 2006.229.12:15:45.88#ibcon#about to read 5, iclass 5, count 0 2006.229.12:15:45.88#ibcon#read 5, iclass 5, count 0 2006.229.12:15:45.88#ibcon#about to read 6, iclass 5, count 0 2006.229.12:15:45.88#ibcon#read 6, iclass 5, count 0 2006.229.12:15:45.88#ibcon#end of sib2, iclass 5, count 0 2006.229.12:15:45.88#ibcon#*after write, iclass 5, count 0 2006.229.12:15:45.88#ibcon#*before return 0, iclass 5, count 0 2006.229.12:15:45.88#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:45.88#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:45.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:15:45.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:15:45.88$vck44/valo=6,814.99 2006.229.12:15:45.88#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.12:15:45.88#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.12:15:45.88#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:45.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:45.88#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:45.88#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:45.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:15:45.88#ibcon#first serial, iclass 7, count 0 2006.229.12:15:45.88#ibcon#enter sib2, iclass 7, count 0 2006.229.12:15:45.88#ibcon#flushed, iclass 7, count 0 2006.229.12:15:45.88#ibcon#about to write, iclass 7, count 0 2006.229.12:15:45.88#ibcon#wrote, iclass 7, count 0 2006.229.12:15:45.88#ibcon#about to read 3, iclass 7, count 0 2006.229.12:15:45.90#ibcon#read 3, iclass 7, count 0 2006.229.12:15:45.90#ibcon#about to read 4, iclass 7, count 0 2006.229.12:15:45.90#ibcon#read 4, iclass 7, count 0 2006.229.12:15:45.90#ibcon#about to read 5, iclass 7, count 0 2006.229.12:15:45.90#ibcon#read 5, iclass 7, count 0 2006.229.12:15:45.90#ibcon#about to read 6, iclass 7, count 0 2006.229.12:15:45.90#ibcon#read 6, iclass 7, count 0 2006.229.12:15:45.90#ibcon#end of sib2, iclass 7, count 0 2006.229.12:15:45.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:15:45.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:15:45.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:15:45.90#ibcon#*before write, iclass 7, count 0 2006.229.12:15:45.90#ibcon#enter sib2, iclass 7, count 0 2006.229.12:15:45.90#ibcon#flushed, iclass 7, count 0 2006.229.12:15:45.90#ibcon#about to write, iclass 7, count 0 2006.229.12:15:45.90#ibcon#wrote, iclass 7, count 0 2006.229.12:15:45.90#ibcon#about to read 3, iclass 7, count 0 2006.229.12:15:45.94#ibcon#read 3, iclass 7, count 0 2006.229.12:15:45.94#ibcon#about to read 4, iclass 7, count 0 2006.229.12:15:45.94#ibcon#read 4, iclass 7, count 0 2006.229.12:15:45.94#ibcon#about to read 5, iclass 7, count 0 2006.229.12:15:45.94#ibcon#read 5, iclass 7, count 0 2006.229.12:15:45.94#ibcon#about to read 6, iclass 7, count 0 2006.229.12:15:45.94#ibcon#read 6, iclass 7, count 0 2006.229.12:15:45.94#ibcon#end of sib2, iclass 7, count 0 2006.229.12:15:45.94#ibcon#*after write, iclass 7, count 0 2006.229.12:15:45.94#ibcon#*before return 0, iclass 7, count 0 2006.229.12:15:45.94#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:45.94#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:45.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:15:45.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:15:45.94$vck44/va=6,4 2006.229.12:15:45.94#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.12:15:45.94#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.12:15:45.94#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:45.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:46.00#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:46.00#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:46.00#ibcon#enter wrdev, iclass 11, count 2 2006.229.12:15:46.00#ibcon#first serial, iclass 11, count 2 2006.229.12:15:46.00#ibcon#enter sib2, iclass 11, count 2 2006.229.12:15:46.00#ibcon#flushed, iclass 11, count 2 2006.229.12:15:46.00#ibcon#about to write, iclass 11, count 2 2006.229.12:15:46.00#ibcon#wrote, iclass 11, count 2 2006.229.12:15:46.00#ibcon#about to read 3, iclass 11, count 2 2006.229.12:15:46.02#ibcon#read 3, iclass 11, count 2 2006.229.12:15:46.02#ibcon#about to read 4, iclass 11, count 2 2006.229.12:15:46.02#ibcon#read 4, iclass 11, count 2 2006.229.12:15:46.02#ibcon#about to read 5, iclass 11, count 2 2006.229.12:15:46.02#ibcon#read 5, iclass 11, count 2 2006.229.12:15:46.02#ibcon#about to read 6, iclass 11, count 2 2006.229.12:15:46.02#ibcon#read 6, iclass 11, count 2 2006.229.12:15:46.02#ibcon#end of sib2, iclass 11, count 2 2006.229.12:15:46.02#ibcon#*mode == 0, iclass 11, count 2 2006.229.12:15:46.02#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.12:15:46.02#ibcon#[25=AT06-04\r\n] 2006.229.12:15:46.02#ibcon#*before write, iclass 11, count 2 2006.229.12:15:46.02#ibcon#enter sib2, iclass 11, count 2 2006.229.12:15:46.02#ibcon#flushed, iclass 11, count 2 2006.229.12:15:46.02#ibcon#about to write, iclass 11, count 2 2006.229.12:15:46.02#ibcon#wrote, iclass 11, count 2 2006.229.12:15:46.02#ibcon#about to read 3, iclass 11, count 2 2006.229.12:15:46.05#ibcon#read 3, iclass 11, count 2 2006.229.12:15:46.05#ibcon#about to read 4, iclass 11, count 2 2006.229.12:15:46.05#ibcon#read 4, iclass 11, count 2 2006.229.12:15:46.05#ibcon#about to read 5, iclass 11, count 2 2006.229.12:15:46.05#ibcon#read 5, iclass 11, count 2 2006.229.12:15:46.05#ibcon#about to read 6, iclass 11, count 2 2006.229.12:15:46.05#ibcon#read 6, iclass 11, count 2 2006.229.12:15:46.05#ibcon#end of sib2, iclass 11, count 2 2006.229.12:15:46.05#ibcon#*after write, iclass 11, count 2 2006.229.12:15:46.05#ibcon#*before return 0, iclass 11, count 2 2006.229.12:15:46.05#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:46.05#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:46.05#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.12:15:46.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:46.05#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:46.17#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:46.17#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:46.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:15:46.17#ibcon#first serial, iclass 11, count 0 2006.229.12:15:46.17#ibcon#enter sib2, iclass 11, count 0 2006.229.12:15:46.17#ibcon#flushed, iclass 11, count 0 2006.229.12:15:46.17#ibcon#about to write, iclass 11, count 0 2006.229.12:15:46.17#ibcon#wrote, iclass 11, count 0 2006.229.12:15:46.17#ibcon#about to read 3, iclass 11, count 0 2006.229.12:15:46.19#ibcon#read 3, iclass 11, count 0 2006.229.12:15:46.19#ibcon#about to read 4, iclass 11, count 0 2006.229.12:15:46.19#ibcon#read 4, iclass 11, count 0 2006.229.12:15:46.19#ibcon#about to read 5, iclass 11, count 0 2006.229.12:15:46.19#ibcon#read 5, iclass 11, count 0 2006.229.12:15:46.19#ibcon#about to read 6, iclass 11, count 0 2006.229.12:15:46.19#ibcon#read 6, iclass 11, count 0 2006.229.12:15:46.19#ibcon#end of sib2, iclass 11, count 0 2006.229.12:15:46.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:15:46.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:15:46.19#ibcon#[25=USB\r\n] 2006.229.12:15:46.19#ibcon#*before write, iclass 11, count 0 2006.229.12:15:46.19#ibcon#enter sib2, iclass 11, count 0 2006.229.12:15:46.19#ibcon#flushed, iclass 11, count 0 2006.229.12:15:46.19#ibcon#about to write, iclass 11, count 0 2006.229.12:15:46.19#ibcon#wrote, iclass 11, count 0 2006.229.12:15:46.19#ibcon#about to read 3, iclass 11, count 0 2006.229.12:15:46.22#ibcon#read 3, iclass 11, count 0 2006.229.12:15:46.22#ibcon#about to read 4, iclass 11, count 0 2006.229.12:15:46.22#ibcon#read 4, iclass 11, count 0 2006.229.12:15:46.22#ibcon#about to read 5, iclass 11, count 0 2006.229.12:15:46.22#ibcon#read 5, iclass 11, count 0 2006.229.12:15:46.22#ibcon#about to read 6, iclass 11, count 0 2006.229.12:15:46.22#ibcon#read 6, iclass 11, count 0 2006.229.12:15:46.22#ibcon#end of sib2, iclass 11, count 0 2006.229.12:15:46.22#ibcon#*after write, iclass 11, count 0 2006.229.12:15:46.22#ibcon#*before return 0, iclass 11, count 0 2006.229.12:15:46.22#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:46.22#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:46.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:15:46.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:15:46.22$vck44/valo=7,864.99 2006.229.12:15:46.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.12:15:46.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.12:15:46.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:46.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:46.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:46.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:46.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:15:46.22#ibcon#first serial, iclass 13, count 0 2006.229.12:15:46.22#ibcon#enter sib2, iclass 13, count 0 2006.229.12:15:46.22#ibcon#flushed, iclass 13, count 0 2006.229.12:15:46.22#ibcon#about to write, iclass 13, count 0 2006.229.12:15:46.22#ibcon#wrote, iclass 13, count 0 2006.229.12:15:46.22#ibcon#about to read 3, iclass 13, count 0 2006.229.12:15:46.24#ibcon#read 3, iclass 13, count 0 2006.229.12:15:46.24#ibcon#about to read 4, iclass 13, count 0 2006.229.12:15:46.24#ibcon#read 4, iclass 13, count 0 2006.229.12:15:46.24#ibcon#about to read 5, iclass 13, count 0 2006.229.12:15:46.24#ibcon#read 5, iclass 13, count 0 2006.229.12:15:46.24#ibcon#about to read 6, iclass 13, count 0 2006.229.12:15:46.24#ibcon#read 6, iclass 13, count 0 2006.229.12:15:46.24#ibcon#end of sib2, iclass 13, count 0 2006.229.12:15:46.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:15:46.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:15:46.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:15:46.24#ibcon#*before write, iclass 13, count 0 2006.229.12:15:46.24#ibcon#enter sib2, iclass 13, count 0 2006.229.12:15:46.24#ibcon#flushed, iclass 13, count 0 2006.229.12:15:46.24#ibcon#about to write, iclass 13, count 0 2006.229.12:15:46.24#ibcon#wrote, iclass 13, count 0 2006.229.12:15:46.24#ibcon#about to read 3, iclass 13, count 0 2006.229.12:15:46.28#ibcon#read 3, iclass 13, count 0 2006.229.12:15:46.28#ibcon#about to read 4, iclass 13, count 0 2006.229.12:15:46.28#ibcon#read 4, iclass 13, count 0 2006.229.12:15:46.28#ibcon#about to read 5, iclass 13, count 0 2006.229.12:15:46.28#ibcon#read 5, iclass 13, count 0 2006.229.12:15:46.28#ibcon#about to read 6, iclass 13, count 0 2006.229.12:15:46.28#ibcon#read 6, iclass 13, count 0 2006.229.12:15:46.28#ibcon#end of sib2, iclass 13, count 0 2006.229.12:15:46.28#ibcon#*after write, iclass 13, count 0 2006.229.12:15:46.28#ibcon#*before return 0, iclass 13, count 0 2006.229.12:15:46.28#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:46.28#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:46.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:15:46.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:15:46.28$vck44/va=7,5 2006.229.12:15:46.28#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.12:15:46.28#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.12:15:46.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:46.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:46.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:46.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:46.34#ibcon#enter wrdev, iclass 15, count 2 2006.229.12:15:46.34#ibcon#first serial, iclass 15, count 2 2006.229.12:15:46.34#ibcon#enter sib2, iclass 15, count 2 2006.229.12:15:46.34#ibcon#flushed, iclass 15, count 2 2006.229.12:15:46.34#ibcon#about to write, iclass 15, count 2 2006.229.12:15:46.34#ibcon#wrote, iclass 15, count 2 2006.229.12:15:46.34#ibcon#about to read 3, iclass 15, count 2 2006.229.12:15:46.36#ibcon#read 3, iclass 15, count 2 2006.229.12:15:46.36#ibcon#about to read 4, iclass 15, count 2 2006.229.12:15:46.36#ibcon#read 4, iclass 15, count 2 2006.229.12:15:46.36#ibcon#about to read 5, iclass 15, count 2 2006.229.12:15:46.36#ibcon#read 5, iclass 15, count 2 2006.229.12:15:46.36#ibcon#about to read 6, iclass 15, count 2 2006.229.12:15:46.36#ibcon#read 6, iclass 15, count 2 2006.229.12:15:46.36#ibcon#end of sib2, iclass 15, count 2 2006.229.12:15:46.36#ibcon#*mode == 0, iclass 15, count 2 2006.229.12:15:46.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.12:15:46.36#ibcon#[25=AT07-05\r\n] 2006.229.12:15:46.36#ibcon#*before write, iclass 15, count 2 2006.229.12:15:46.36#ibcon#enter sib2, iclass 15, count 2 2006.229.12:15:46.36#ibcon#flushed, iclass 15, count 2 2006.229.12:15:46.36#ibcon#about to write, iclass 15, count 2 2006.229.12:15:46.36#ibcon#wrote, iclass 15, count 2 2006.229.12:15:46.36#ibcon#about to read 3, iclass 15, count 2 2006.229.12:15:46.39#ibcon#read 3, iclass 15, count 2 2006.229.12:15:46.39#ibcon#about to read 4, iclass 15, count 2 2006.229.12:15:46.39#ibcon#read 4, iclass 15, count 2 2006.229.12:15:46.39#ibcon#about to read 5, iclass 15, count 2 2006.229.12:15:46.39#ibcon#read 5, iclass 15, count 2 2006.229.12:15:46.39#ibcon#about to read 6, iclass 15, count 2 2006.229.12:15:46.39#ibcon#read 6, iclass 15, count 2 2006.229.12:15:46.39#ibcon#end of sib2, iclass 15, count 2 2006.229.12:15:46.39#ibcon#*after write, iclass 15, count 2 2006.229.12:15:46.39#ibcon#*before return 0, iclass 15, count 2 2006.229.12:15:46.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:46.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:46.39#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.12:15:46.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:46.39#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:46.51#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:46.51#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:46.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:15:46.51#ibcon#first serial, iclass 15, count 0 2006.229.12:15:46.51#ibcon#enter sib2, iclass 15, count 0 2006.229.12:15:46.51#ibcon#flushed, iclass 15, count 0 2006.229.12:15:46.51#ibcon#about to write, iclass 15, count 0 2006.229.12:15:46.51#ibcon#wrote, iclass 15, count 0 2006.229.12:15:46.51#ibcon#about to read 3, iclass 15, count 0 2006.229.12:15:46.53#ibcon#read 3, iclass 15, count 0 2006.229.12:15:46.53#ibcon#about to read 4, iclass 15, count 0 2006.229.12:15:46.53#ibcon#read 4, iclass 15, count 0 2006.229.12:15:46.53#ibcon#about to read 5, iclass 15, count 0 2006.229.12:15:46.53#ibcon#read 5, iclass 15, count 0 2006.229.12:15:46.53#ibcon#about to read 6, iclass 15, count 0 2006.229.12:15:46.53#ibcon#read 6, iclass 15, count 0 2006.229.12:15:46.53#ibcon#end of sib2, iclass 15, count 0 2006.229.12:15:46.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:15:46.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:15:46.53#ibcon#[25=USB\r\n] 2006.229.12:15:46.53#ibcon#*before write, iclass 15, count 0 2006.229.12:15:46.53#ibcon#enter sib2, iclass 15, count 0 2006.229.12:15:46.53#ibcon#flushed, iclass 15, count 0 2006.229.12:15:46.53#ibcon#about to write, iclass 15, count 0 2006.229.12:15:46.53#ibcon#wrote, iclass 15, count 0 2006.229.12:15:46.53#ibcon#about to read 3, iclass 15, count 0 2006.229.12:15:46.56#ibcon#read 3, iclass 15, count 0 2006.229.12:15:46.56#ibcon#about to read 4, iclass 15, count 0 2006.229.12:15:46.56#ibcon#read 4, iclass 15, count 0 2006.229.12:15:46.56#ibcon#about to read 5, iclass 15, count 0 2006.229.12:15:46.56#ibcon#read 5, iclass 15, count 0 2006.229.12:15:46.56#ibcon#about to read 6, iclass 15, count 0 2006.229.12:15:46.56#ibcon#read 6, iclass 15, count 0 2006.229.12:15:46.56#ibcon#end of sib2, iclass 15, count 0 2006.229.12:15:46.56#ibcon#*after write, iclass 15, count 0 2006.229.12:15:46.56#ibcon#*before return 0, iclass 15, count 0 2006.229.12:15:46.56#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:46.56#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:46.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:15:46.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:15:46.56$vck44/valo=8,884.99 2006.229.12:15:46.56#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.12:15:46.56#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.12:15:46.56#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:46.56#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:46.56#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:46.56#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:46.56#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:15:46.56#ibcon#first serial, iclass 17, count 0 2006.229.12:15:46.56#ibcon#enter sib2, iclass 17, count 0 2006.229.12:15:46.56#ibcon#flushed, iclass 17, count 0 2006.229.12:15:46.56#ibcon#about to write, iclass 17, count 0 2006.229.12:15:46.56#ibcon#wrote, iclass 17, count 0 2006.229.12:15:46.56#ibcon#about to read 3, iclass 17, count 0 2006.229.12:15:46.58#ibcon#read 3, iclass 17, count 0 2006.229.12:15:46.58#ibcon#about to read 4, iclass 17, count 0 2006.229.12:15:46.58#ibcon#read 4, iclass 17, count 0 2006.229.12:15:46.58#ibcon#about to read 5, iclass 17, count 0 2006.229.12:15:46.58#ibcon#read 5, iclass 17, count 0 2006.229.12:15:46.58#ibcon#about to read 6, iclass 17, count 0 2006.229.12:15:46.58#ibcon#read 6, iclass 17, count 0 2006.229.12:15:46.58#ibcon#end of sib2, iclass 17, count 0 2006.229.12:15:46.58#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:15:46.58#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:15:46.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:15:46.58#ibcon#*before write, iclass 17, count 0 2006.229.12:15:46.58#ibcon#enter sib2, iclass 17, count 0 2006.229.12:15:46.58#ibcon#flushed, iclass 17, count 0 2006.229.12:15:46.58#ibcon#about to write, iclass 17, count 0 2006.229.12:15:46.58#ibcon#wrote, iclass 17, count 0 2006.229.12:15:46.58#ibcon#about to read 3, iclass 17, count 0 2006.229.12:15:46.62#ibcon#read 3, iclass 17, count 0 2006.229.12:15:46.62#ibcon#about to read 4, iclass 17, count 0 2006.229.12:15:46.62#ibcon#read 4, iclass 17, count 0 2006.229.12:15:46.62#ibcon#about to read 5, iclass 17, count 0 2006.229.12:15:46.62#ibcon#read 5, iclass 17, count 0 2006.229.12:15:46.62#ibcon#about to read 6, iclass 17, count 0 2006.229.12:15:46.62#ibcon#read 6, iclass 17, count 0 2006.229.12:15:46.62#ibcon#end of sib2, iclass 17, count 0 2006.229.12:15:46.62#ibcon#*after write, iclass 17, count 0 2006.229.12:15:46.62#ibcon#*before return 0, iclass 17, count 0 2006.229.12:15:46.62#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:46.62#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:46.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:15:46.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:15:46.62$vck44/va=8,6 2006.229.12:15:46.62#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.12:15:46.62#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.12:15:46.62#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:46.62#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:46.68#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:46.68#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:46.68#ibcon#enter wrdev, iclass 19, count 2 2006.229.12:15:46.68#ibcon#first serial, iclass 19, count 2 2006.229.12:15:46.68#ibcon#enter sib2, iclass 19, count 2 2006.229.12:15:46.68#ibcon#flushed, iclass 19, count 2 2006.229.12:15:46.68#ibcon#about to write, iclass 19, count 2 2006.229.12:15:46.68#ibcon#wrote, iclass 19, count 2 2006.229.12:15:46.68#ibcon#about to read 3, iclass 19, count 2 2006.229.12:15:46.70#ibcon#read 3, iclass 19, count 2 2006.229.12:15:46.70#ibcon#about to read 4, iclass 19, count 2 2006.229.12:15:46.70#ibcon#read 4, iclass 19, count 2 2006.229.12:15:46.70#ibcon#about to read 5, iclass 19, count 2 2006.229.12:15:46.70#ibcon#read 5, iclass 19, count 2 2006.229.12:15:46.70#ibcon#about to read 6, iclass 19, count 2 2006.229.12:15:46.70#ibcon#read 6, iclass 19, count 2 2006.229.12:15:46.70#ibcon#end of sib2, iclass 19, count 2 2006.229.12:15:46.70#ibcon#*mode == 0, iclass 19, count 2 2006.229.12:15:46.70#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.12:15:46.70#ibcon#[25=AT08-06\r\n] 2006.229.12:15:46.70#ibcon#*before write, iclass 19, count 2 2006.229.12:15:46.70#ibcon#enter sib2, iclass 19, count 2 2006.229.12:15:46.70#ibcon#flushed, iclass 19, count 2 2006.229.12:15:46.70#ibcon#about to write, iclass 19, count 2 2006.229.12:15:46.70#ibcon#wrote, iclass 19, count 2 2006.229.12:15:46.70#ibcon#about to read 3, iclass 19, count 2 2006.229.12:15:46.73#ibcon#read 3, iclass 19, count 2 2006.229.12:15:46.73#ibcon#about to read 4, iclass 19, count 2 2006.229.12:15:46.73#ibcon#read 4, iclass 19, count 2 2006.229.12:15:46.73#ibcon#about to read 5, iclass 19, count 2 2006.229.12:15:46.73#ibcon#read 5, iclass 19, count 2 2006.229.12:15:46.73#ibcon#about to read 6, iclass 19, count 2 2006.229.12:15:46.73#ibcon#read 6, iclass 19, count 2 2006.229.12:15:46.73#ibcon#end of sib2, iclass 19, count 2 2006.229.12:15:46.73#ibcon#*after write, iclass 19, count 2 2006.229.12:15:46.73#ibcon#*before return 0, iclass 19, count 2 2006.229.12:15:46.73#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:46.73#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:46.73#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.12:15:46.73#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:46.73#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:46.85#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:46.85#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:46.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:15:46.85#ibcon#first serial, iclass 19, count 0 2006.229.12:15:46.85#ibcon#enter sib2, iclass 19, count 0 2006.229.12:15:46.85#ibcon#flushed, iclass 19, count 0 2006.229.12:15:46.85#ibcon#about to write, iclass 19, count 0 2006.229.12:15:46.85#ibcon#wrote, iclass 19, count 0 2006.229.12:15:46.85#ibcon#about to read 3, iclass 19, count 0 2006.229.12:15:46.87#ibcon#read 3, iclass 19, count 0 2006.229.12:15:46.87#ibcon#about to read 4, iclass 19, count 0 2006.229.12:15:46.87#ibcon#read 4, iclass 19, count 0 2006.229.12:15:46.87#ibcon#about to read 5, iclass 19, count 0 2006.229.12:15:46.87#ibcon#read 5, iclass 19, count 0 2006.229.12:15:46.87#ibcon#about to read 6, iclass 19, count 0 2006.229.12:15:46.87#ibcon#read 6, iclass 19, count 0 2006.229.12:15:46.87#ibcon#end of sib2, iclass 19, count 0 2006.229.12:15:46.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:15:46.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:15:46.87#ibcon#[25=USB\r\n] 2006.229.12:15:46.87#ibcon#*before write, iclass 19, count 0 2006.229.12:15:46.87#ibcon#enter sib2, iclass 19, count 0 2006.229.12:15:46.87#ibcon#flushed, iclass 19, count 0 2006.229.12:15:46.87#ibcon#about to write, iclass 19, count 0 2006.229.12:15:46.87#ibcon#wrote, iclass 19, count 0 2006.229.12:15:46.87#ibcon#about to read 3, iclass 19, count 0 2006.229.12:15:46.90#ibcon#read 3, iclass 19, count 0 2006.229.12:15:46.90#ibcon#about to read 4, iclass 19, count 0 2006.229.12:15:46.90#ibcon#read 4, iclass 19, count 0 2006.229.12:15:46.90#ibcon#about to read 5, iclass 19, count 0 2006.229.12:15:46.90#ibcon#read 5, iclass 19, count 0 2006.229.12:15:46.90#ibcon#about to read 6, iclass 19, count 0 2006.229.12:15:46.90#ibcon#read 6, iclass 19, count 0 2006.229.12:15:46.90#ibcon#end of sib2, iclass 19, count 0 2006.229.12:15:46.90#ibcon#*after write, iclass 19, count 0 2006.229.12:15:46.90#ibcon#*before return 0, iclass 19, count 0 2006.229.12:15:46.90#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:46.90#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:46.90#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:15:46.90#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:15:46.90$vck44/vblo=1,629.99 2006.229.12:15:46.90#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.12:15:46.90#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.12:15:46.90#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:46.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:46.90#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:46.90#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:46.90#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:15:46.90#ibcon#first serial, iclass 21, count 0 2006.229.12:15:46.90#ibcon#enter sib2, iclass 21, count 0 2006.229.12:15:46.90#ibcon#flushed, iclass 21, count 0 2006.229.12:15:46.90#ibcon#about to write, iclass 21, count 0 2006.229.12:15:46.90#ibcon#wrote, iclass 21, count 0 2006.229.12:15:46.90#ibcon#about to read 3, iclass 21, count 0 2006.229.12:15:46.92#ibcon#read 3, iclass 21, count 0 2006.229.12:15:46.92#ibcon#about to read 4, iclass 21, count 0 2006.229.12:15:46.92#ibcon#read 4, iclass 21, count 0 2006.229.12:15:46.92#ibcon#about to read 5, iclass 21, count 0 2006.229.12:15:46.92#ibcon#read 5, iclass 21, count 0 2006.229.12:15:46.92#ibcon#about to read 6, iclass 21, count 0 2006.229.12:15:46.92#ibcon#read 6, iclass 21, count 0 2006.229.12:15:46.92#ibcon#end of sib2, iclass 21, count 0 2006.229.12:15:46.92#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:15:46.92#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:15:46.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:15:46.92#ibcon#*before write, iclass 21, count 0 2006.229.12:15:46.92#ibcon#enter sib2, iclass 21, count 0 2006.229.12:15:46.92#ibcon#flushed, iclass 21, count 0 2006.229.12:15:46.92#ibcon#about to write, iclass 21, count 0 2006.229.12:15:46.92#ibcon#wrote, iclass 21, count 0 2006.229.12:15:46.92#ibcon#about to read 3, iclass 21, count 0 2006.229.12:15:46.95#abcon#<5=/04 1.5 3.1 27.741001002.4\r\n> 2006.229.12:15:46.96#ibcon#read 3, iclass 21, count 0 2006.229.12:15:46.96#ibcon#about to read 4, iclass 21, count 0 2006.229.12:15:46.96#ibcon#read 4, iclass 21, count 0 2006.229.12:15:46.96#ibcon#about to read 5, iclass 21, count 0 2006.229.12:15:46.96#ibcon#read 5, iclass 21, count 0 2006.229.12:15:46.96#ibcon#about to read 6, iclass 21, count 0 2006.229.12:15:46.96#ibcon#read 6, iclass 21, count 0 2006.229.12:15:46.96#ibcon#end of sib2, iclass 21, count 0 2006.229.12:15:46.96#ibcon#*after write, iclass 21, count 0 2006.229.12:15:46.96#ibcon#*before return 0, iclass 21, count 0 2006.229.12:15:46.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:46.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:46.96#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:15:46.96#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:15:46.96$vck44/vb=1,4 2006.229.12:15:46.96#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:15:46.96#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:15:46.96#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:46.96#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:15:46.96#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:15:46.96#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:15:46.96#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:15:46.96#ibcon#first serial, iclass 26, count 2 2006.229.12:15:46.96#ibcon#enter sib2, iclass 26, count 2 2006.229.12:15:46.96#ibcon#flushed, iclass 26, count 2 2006.229.12:15:46.96#ibcon#about to write, iclass 26, count 2 2006.229.12:15:46.96#ibcon#wrote, iclass 26, count 2 2006.229.12:15:46.96#ibcon#about to read 3, iclass 26, count 2 2006.229.12:15:46.97#abcon#{5=INTERFACE CLEAR} 2006.229.12:15:46.98#ibcon#read 3, iclass 26, count 2 2006.229.12:15:46.98#ibcon#about to read 4, iclass 26, count 2 2006.229.12:15:46.98#ibcon#read 4, iclass 26, count 2 2006.229.12:15:46.98#ibcon#about to read 5, iclass 26, count 2 2006.229.12:15:46.98#ibcon#read 5, iclass 26, count 2 2006.229.12:15:46.98#ibcon#about to read 6, iclass 26, count 2 2006.229.12:15:46.98#ibcon#read 6, iclass 26, count 2 2006.229.12:15:46.98#ibcon#end of sib2, iclass 26, count 2 2006.229.12:15:46.98#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:15:46.98#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:15:46.98#ibcon#[27=AT01-04\r\n] 2006.229.12:15:46.98#ibcon#*before write, iclass 26, count 2 2006.229.12:15:46.98#ibcon#enter sib2, iclass 26, count 2 2006.229.12:15:46.98#ibcon#flushed, iclass 26, count 2 2006.229.12:15:46.98#ibcon#about to write, iclass 26, count 2 2006.229.12:15:46.98#ibcon#wrote, iclass 26, count 2 2006.229.12:15:46.98#ibcon#about to read 3, iclass 26, count 2 2006.229.12:15:47.01#ibcon#read 3, iclass 26, count 2 2006.229.12:15:47.01#ibcon#about to read 4, iclass 26, count 2 2006.229.12:15:47.01#ibcon#read 4, iclass 26, count 2 2006.229.12:15:47.01#ibcon#about to read 5, iclass 26, count 2 2006.229.12:15:47.01#ibcon#read 5, iclass 26, count 2 2006.229.12:15:47.01#ibcon#about to read 6, iclass 26, count 2 2006.229.12:15:47.01#ibcon#read 6, iclass 26, count 2 2006.229.12:15:47.01#ibcon#end of sib2, iclass 26, count 2 2006.229.12:15:47.01#ibcon#*after write, iclass 26, count 2 2006.229.12:15:47.01#ibcon#*before return 0, iclass 26, count 2 2006.229.12:15:47.01#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:15:47.01#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:15:47.01#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:15:47.01#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:47.01#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:15:47.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:15:47.13#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:15:47.13#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:15:47.13#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:15:47.13#ibcon#first serial, iclass 26, count 0 2006.229.12:15:47.13#ibcon#enter sib2, iclass 26, count 0 2006.229.12:15:47.13#ibcon#flushed, iclass 26, count 0 2006.229.12:15:47.13#ibcon#about to write, iclass 26, count 0 2006.229.12:15:47.13#ibcon#wrote, iclass 26, count 0 2006.229.12:15:47.13#ibcon#about to read 3, iclass 26, count 0 2006.229.12:15:47.15#ibcon#read 3, iclass 26, count 0 2006.229.12:15:47.15#ibcon#about to read 4, iclass 26, count 0 2006.229.12:15:47.15#ibcon#read 4, iclass 26, count 0 2006.229.12:15:47.15#ibcon#about to read 5, iclass 26, count 0 2006.229.12:15:47.15#ibcon#read 5, iclass 26, count 0 2006.229.12:15:47.15#ibcon#about to read 6, iclass 26, count 0 2006.229.12:15:47.15#ibcon#read 6, iclass 26, count 0 2006.229.12:15:47.15#ibcon#end of sib2, iclass 26, count 0 2006.229.12:15:47.15#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:15:47.15#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:15:47.15#ibcon#[27=USB\r\n] 2006.229.12:15:47.15#ibcon#*before write, iclass 26, count 0 2006.229.12:15:47.15#ibcon#enter sib2, iclass 26, count 0 2006.229.12:15:47.15#ibcon#flushed, iclass 26, count 0 2006.229.12:15:47.15#ibcon#about to write, iclass 26, count 0 2006.229.12:15:47.15#ibcon#wrote, iclass 26, count 0 2006.229.12:15:47.15#ibcon#about to read 3, iclass 26, count 0 2006.229.12:15:47.18#ibcon#read 3, iclass 26, count 0 2006.229.12:15:47.18#ibcon#about to read 4, iclass 26, count 0 2006.229.12:15:47.18#ibcon#read 4, iclass 26, count 0 2006.229.12:15:47.18#ibcon#about to read 5, iclass 26, count 0 2006.229.12:15:47.18#ibcon#read 5, iclass 26, count 0 2006.229.12:15:47.18#ibcon#about to read 6, iclass 26, count 0 2006.229.12:15:47.18#ibcon#read 6, iclass 26, count 0 2006.229.12:15:47.18#ibcon#end of sib2, iclass 26, count 0 2006.229.12:15:47.18#ibcon#*after write, iclass 26, count 0 2006.229.12:15:47.18#ibcon#*before return 0, iclass 26, count 0 2006.229.12:15:47.18#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:15:47.18#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:15:47.18#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:15:47.18#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:15:47.18$vck44/vblo=2,634.99 2006.229.12:15:47.18#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.12:15:47.18#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.12:15:47.18#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:47.18#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:47.18#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:47.18#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:47.18#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:15:47.18#ibcon#first serial, iclass 29, count 0 2006.229.12:15:47.18#ibcon#enter sib2, iclass 29, count 0 2006.229.12:15:47.18#ibcon#flushed, iclass 29, count 0 2006.229.12:15:47.18#ibcon#about to write, iclass 29, count 0 2006.229.12:15:47.18#ibcon#wrote, iclass 29, count 0 2006.229.12:15:47.18#ibcon#about to read 3, iclass 29, count 0 2006.229.12:15:47.20#ibcon#read 3, iclass 29, count 0 2006.229.12:15:47.20#ibcon#about to read 4, iclass 29, count 0 2006.229.12:15:47.20#ibcon#read 4, iclass 29, count 0 2006.229.12:15:47.20#ibcon#about to read 5, iclass 29, count 0 2006.229.12:15:47.20#ibcon#read 5, iclass 29, count 0 2006.229.12:15:47.20#ibcon#about to read 6, iclass 29, count 0 2006.229.12:15:47.20#ibcon#read 6, iclass 29, count 0 2006.229.12:15:47.20#ibcon#end of sib2, iclass 29, count 0 2006.229.12:15:47.20#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:15:47.20#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:15:47.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:15:47.20#ibcon#*before write, iclass 29, count 0 2006.229.12:15:47.20#ibcon#enter sib2, iclass 29, count 0 2006.229.12:15:47.20#ibcon#flushed, iclass 29, count 0 2006.229.12:15:47.20#ibcon#about to write, iclass 29, count 0 2006.229.12:15:47.20#ibcon#wrote, iclass 29, count 0 2006.229.12:15:47.20#ibcon#about to read 3, iclass 29, count 0 2006.229.12:15:47.24#ibcon#read 3, iclass 29, count 0 2006.229.12:15:47.24#ibcon#about to read 4, iclass 29, count 0 2006.229.12:15:47.24#ibcon#read 4, iclass 29, count 0 2006.229.12:15:47.24#ibcon#about to read 5, iclass 29, count 0 2006.229.12:15:47.24#ibcon#read 5, iclass 29, count 0 2006.229.12:15:47.24#ibcon#about to read 6, iclass 29, count 0 2006.229.12:15:47.24#ibcon#read 6, iclass 29, count 0 2006.229.12:15:47.24#ibcon#end of sib2, iclass 29, count 0 2006.229.12:15:47.24#ibcon#*after write, iclass 29, count 0 2006.229.12:15:47.24#ibcon#*before return 0, iclass 29, count 0 2006.229.12:15:47.24#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:47.24#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:15:47.24#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:15:47.24#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:15:47.24$vck44/vb=2,4 2006.229.12:15:47.24#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.12:15:47.24#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.12:15:47.24#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:47.24#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:47.30#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:47.30#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:47.30#ibcon#enter wrdev, iclass 31, count 2 2006.229.12:15:47.30#ibcon#first serial, iclass 31, count 2 2006.229.12:15:47.30#ibcon#enter sib2, iclass 31, count 2 2006.229.12:15:47.30#ibcon#flushed, iclass 31, count 2 2006.229.12:15:47.30#ibcon#about to write, iclass 31, count 2 2006.229.12:15:47.30#ibcon#wrote, iclass 31, count 2 2006.229.12:15:47.30#ibcon#about to read 3, iclass 31, count 2 2006.229.12:15:47.32#ibcon#read 3, iclass 31, count 2 2006.229.12:15:47.32#ibcon#about to read 4, iclass 31, count 2 2006.229.12:15:47.32#ibcon#read 4, iclass 31, count 2 2006.229.12:15:47.32#ibcon#about to read 5, iclass 31, count 2 2006.229.12:15:47.32#ibcon#read 5, iclass 31, count 2 2006.229.12:15:47.32#ibcon#about to read 6, iclass 31, count 2 2006.229.12:15:47.32#ibcon#read 6, iclass 31, count 2 2006.229.12:15:47.32#ibcon#end of sib2, iclass 31, count 2 2006.229.12:15:47.32#ibcon#*mode == 0, iclass 31, count 2 2006.229.12:15:47.32#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.12:15:47.32#ibcon#[27=AT02-04\r\n] 2006.229.12:15:47.32#ibcon#*before write, iclass 31, count 2 2006.229.12:15:47.32#ibcon#enter sib2, iclass 31, count 2 2006.229.12:15:47.32#ibcon#flushed, iclass 31, count 2 2006.229.12:15:47.32#ibcon#about to write, iclass 31, count 2 2006.229.12:15:47.32#ibcon#wrote, iclass 31, count 2 2006.229.12:15:47.32#ibcon#about to read 3, iclass 31, count 2 2006.229.12:15:47.35#ibcon#read 3, iclass 31, count 2 2006.229.12:15:47.35#ibcon#about to read 4, iclass 31, count 2 2006.229.12:15:47.35#ibcon#read 4, iclass 31, count 2 2006.229.12:15:47.35#ibcon#about to read 5, iclass 31, count 2 2006.229.12:15:47.35#ibcon#read 5, iclass 31, count 2 2006.229.12:15:47.35#ibcon#about to read 6, iclass 31, count 2 2006.229.12:15:47.35#ibcon#read 6, iclass 31, count 2 2006.229.12:15:47.35#ibcon#end of sib2, iclass 31, count 2 2006.229.12:15:47.35#ibcon#*after write, iclass 31, count 2 2006.229.12:15:47.35#ibcon#*before return 0, iclass 31, count 2 2006.229.12:15:47.35#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:47.35#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:15:47.35#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.12:15:47.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:47.35#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:47.47#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:47.47#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:47.47#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:15:47.47#ibcon#first serial, iclass 31, count 0 2006.229.12:15:47.47#ibcon#enter sib2, iclass 31, count 0 2006.229.12:15:47.47#ibcon#flushed, iclass 31, count 0 2006.229.12:15:47.47#ibcon#about to write, iclass 31, count 0 2006.229.12:15:47.47#ibcon#wrote, iclass 31, count 0 2006.229.12:15:47.47#ibcon#about to read 3, iclass 31, count 0 2006.229.12:15:47.49#ibcon#read 3, iclass 31, count 0 2006.229.12:15:47.49#ibcon#about to read 4, iclass 31, count 0 2006.229.12:15:47.49#ibcon#read 4, iclass 31, count 0 2006.229.12:15:47.49#ibcon#about to read 5, iclass 31, count 0 2006.229.12:15:47.49#ibcon#read 5, iclass 31, count 0 2006.229.12:15:47.49#ibcon#about to read 6, iclass 31, count 0 2006.229.12:15:47.49#ibcon#read 6, iclass 31, count 0 2006.229.12:15:47.49#ibcon#end of sib2, iclass 31, count 0 2006.229.12:15:47.49#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:15:47.49#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:15:47.49#ibcon#[27=USB\r\n] 2006.229.12:15:47.49#ibcon#*before write, iclass 31, count 0 2006.229.12:15:47.49#ibcon#enter sib2, iclass 31, count 0 2006.229.12:15:47.49#ibcon#flushed, iclass 31, count 0 2006.229.12:15:47.49#ibcon#about to write, iclass 31, count 0 2006.229.12:15:47.49#ibcon#wrote, iclass 31, count 0 2006.229.12:15:47.49#ibcon#about to read 3, iclass 31, count 0 2006.229.12:15:47.52#ibcon#read 3, iclass 31, count 0 2006.229.12:15:47.52#ibcon#about to read 4, iclass 31, count 0 2006.229.12:15:47.52#ibcon#read 4, iclass 31, count 0 2006.229.12:15:47.52#ibcon#about to read 5, iclass 31, count 0 2006.229.12:15:47.52#ibcon#read 5, iclass 31, count 0 2006.229.12:15:47.52#ibcon#about to read 6, iclass 31, count 0 2006.229.12:15:47.52#ibcon#read 6, iclass 31, count 0 2006.229.12:15:47.52#ibcon#end of sib2, iclass 31, count 0 2006.229.12:15:47.52#ibcon#*after write, iclass 31, count 0 2006.229.12:15:47.52#ibcon#*before return 0, iclass 31, count 0 2006.229.12:15:47.52#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:47.52#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:15:47.52#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:15:47.52#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:15:47.52$vck44/vblo=3,649.99 2006.229.12:15:47.52#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.12:15:47.52#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.12:15:47.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:47.52#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:47.52#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:47.52#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:47.52#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:15:47.52#ibcon#first serial, iclass 33, count 0 2006.229.12:15:47.52#ibcon#enter sib2, iclass 33, count 0 2006.229.12:15:47.52#ibcon#flushed, iclass 33, count 0 2006.229.12:15:47.52#ibcon#about to write, iclass 33, count 0 2006.229.12:15:47.52#ibcon#wrote, iclass 33, count 0 2006.229.12:15:47.52#ibcon#about to read 3, iclass 33, count 0 2006.229.12:15:47.54#ibcon#read 3, iclass 33, count 0 2006.229.12:15:47.54#ibcon#about to read 4, iclass 33, count 0 2006.229.12:15:47.54#ibcon#read 4, iclass 33, count 0 2006.229.12:15:47.54#ibcon#about to read 5, iclass 33, count 0 2006.229.12:15:47.54#ibcon#read 5, iclass 33, count 0 2006.229.12:15:47.54#ibcon#about to read 6, iclass 33, count 0 2006.229.12:15:47.54#ibcon#read 6, iclass 33, count 0 2006.229.12:15:47.54#ibcon#end of sib2, iclass 33, count 0 2006.229.12:15:47.54#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:15:47.54#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:15:47.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:15:47.54#ibcon#*before write, iclass 33, count 0 2006.229.12:15:47.54#ibcon#enter sib2, iclass 33, count 0 2006.229.12:15:47.54#ibcon#flushed, iclass 33, count 0 2006.229.12:15:47.54#ibcon#about to write, iclass 33, count 0 2006.229.12:15:47.54#ibcon#wrote, iclass 33, count 0 2006.229.12:15:47.54#ibcon#about to read 3, iclass 33, count 0 2006.229.12:15:47.58#ibcon#read 3, iclass 33, count 0 2006.229.12:15:47.58#ibcon#about to read 4, iclass 33, count 0 2006.229.12:15:47.58#ibcon#read 4, iclass 33, count 0 2006.229.12:15:47.58#ibcon#about to read 5, iclass 33, count 0 2006.229.12:15:47.58#ibcon#read 5, iclass 33, count 0 2006.229.12:15:47.58#ibcon#about to read 6, iclass 33, count 0 2006.229.12:15:47.58#ibcon#read 6, iclass 33, count 0 2006.229.12:15:47.58#ibcon#end of sib2, iclass 33, count 0 2006.229.12:15:47.58#ibcon#*after write, iclass 33, count 0 2006.229.12:15:47.58#ibcon#*before return 0, iclass 33, count 0 2006.229.12:15:47.58#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:47.58#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:15:47.58#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:15:47.58#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:15:47.58$vck44/vb=3,4 2006.229.12:15:47.58#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.12:15:47.58#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.12:15:47.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:47.58#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:47.64#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:47.64#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:47.64#ibcon#enter wrdev, iclass 35, count 2 2006.229.12:15:47.64#ibcon#first serial, iclass 35, count 2 2006.229.12:15:47.64#ibcon#enter sib2, iclass 35, count 2 2006.229.12:15:47.64#ibcon#flushed, iclass 35, count 2 2006.229.12:15:47.64#ibcon#about to write, iclass 35, count 2 2006.229.12:15:47.64#ibcon#wrote, iclass 35, count 2 2006.229.12:15:47.64#ibcon#about to read 3, iclass 35, count 2 2006.229.12:15:47.66#ibcon#read 3, iclass 35, count 2 2006.229.12:15:47.66#ibcon#about to read 4, iclass 35, count 2 2006.229.12:15:47.66#ibcon#read 4, iclass 35, count 2 2006.229.12:15:47.66#ibcon#about to read 5, iclass 35, count 2 2006.229.12:15:47.66#ibcon#read 5, iclass 35, count 2 2006.229.12:15:47.66#ibcon#about to read 6, iclass 35, count 2 2006.229.12:15:47.66#ibcon#read 6, iclass 35, count 2 2006.229.12:15:47.66#ibcon#end of sib2, iclass 35, count 2 2006.229.12:15:47.66#ibcon#*mode == 0, iclass 35, count 2 2006.229.12:15:47.66#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.12:15:47.66#ibcon#[27=AT03-04\r\n] 2006.229.12:15:47.66#ibcon#*before write, iclass 35, count 2 2006.229.12:15:47.66#ibcon#enter sib2, iclass 35, count 2 2006.229.12:15:47.66#ibcon#flushed, iclass 35, count 2 2006.229.12:15:47.66#ibcon#about to write, iclass 35, count 2 2006.229.12:15:47.66#ibcon#wrote, iclass 35, count 2 2006.229.12:15:47.66#ibcon#about to read 3, iclass 35, count 2 2006.229.12:15:47.69#ibcon#read 3, iclass 35, count 2 2006.229.12:15:47.69#ibcon#about to read 4, iclass 35, count 2 2006.229.12:15:47.69#ibcon#read 4, iclass 35, count 2 2006.229.12:15:47.69#ibcon#about to read 5, iclass 35, count 2 2006.229.12:15:47.69#ibcon#read 5, iclass 35, count 2 2006.229.12:15:47.69#ibcon#about to read 6, iclass 35, count 2 2006.229.12:15:47.69#ibcon#read 6, iclass 35, count 2 2006.229.12:15:47.69#ibcon#end of sib2, iclass 35, count 2 2006.229.12:15:47.69#ibcon#*after write, iclass 35, count 2 2006.229.12:15:47.69#ibcon#*before return 0, iclass 35, count 2 2006.229.12:15:47.69#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:47.69#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:15:47.69#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.12:15:47.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:47.69#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:47.81#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:47.81#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:47.81#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:15:47.81#ibcon#first serial, iclass 35, count 0 2006.229.12:15:47.81#ibcon#enter sib2, iclass 35, count 0 2006.229.12:15:47.81#ibcon#flushed, iclass 35, count 0 2006.229.12:15:47.81#ibcon#about to write, iclass 35, count 0 2006.229.12:15:47.81#ibcon#wrote, iclass 35, count 0 2006.229.12:15:47.81#ibcon#about to read 3, iclass 35, count 0 2006.229.12:15:47.83#ibcon#read 3, iclass 35, count 0 2006.229.12:15:47.83#ibcon#about to read 4, iclass 35, count 0 2006.229.12:15:47.83#ibcon#read 4, iclass 35, count 0 2006.229.12:15:47.83#ibcon#about to read 5, iclass 35, count 0 2006.229.12:15:47.83#ibcon#read 5, iclass 35, count 0 2006.229.12:15:47.83#ibcon#about to read 6, iclass 35, count 0 2006.229.12:15:47.83#ibcon#read 6, iclass 35, count 0 2006.229.12:15:47.83#ibcon#end of sib2, iclass 35, count 0 2006.229.12:15:47.83#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:15:47.83#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:15:47.83#ibcon#[27=USB\r\n] 2006.229.12:15:47.83#ibcon#*before write, iclass 35, count 0 2006.229.12:15:47.83#ibcon#enter sib2, iclass 35, count 0 2006.229.12:15:47.83#ibcon#flushed, iclass 35, count 0 2006.229.12:15:47.83#ibcon#about to write, iclass 35, count 0 2006.229.12:15:47.83#ibcon#wrote, iclass 35, count 0 2006.229.12:15:47.83#ibcon#about to read 3, iclass 35, count 0 2006.229.12:15:47.86#ibcon#read 3, iclass 35, count 0 2006.229.12:15:47.86#ibcon#about to read 4, iclass 35, count 0 2006.229.12:15:47.86#ibcon#read 4, iclass 35, count 0 2006.229.12:15:47.86#ibcon#about to read 5, iclass 35, count 0 2006.229.12:15:47.86#ibcon#read 5, iclass 35, count 0 2006.229.12:15:47.86#ibcon#about to read 6, iclass 35, count 0 2006.229.12:15:47.86#ibcon#read 6, iclass 35, count 0 2006.229.12:15:47.86#ibcon#end of sib2, iclass 35, count 0 2006.229.12:15:47.86#ibcon#*after write, iclass 35, count 0 2006.229.12:15:47.86#ibcon#*before return 0, iclass 35, count 0 2006.229.12:15:47.86#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:47.86#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:15:47.86#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:15:47.86#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:15:47.86$vck44/vblo=4,679.99 2006.229.12:15:47.86#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.12:15:47.86#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.12:15:47.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:47.86#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:47.86#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:47.86#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:47.86#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:15:47.86#ibcon#first serial, iclass 37, count 0 2006.229.12:15:47.86#ibcon#enter sib2, iclass 37, count 0 2006.229.12:15:47.86#ibcon#flushed, iclass 37, count 0 2006.229.12:15:47.86#ibcon#about to write, iclass 37, count 0 2006.229.12:15:47.86#ibcon#wrote, iclass 37, count 0 2006.229.12:15:47.86#ibcon#about to read 3, iclass 37, count 0 2006.229.12:15:47.88#ibcon#read 3, iclass 37, count 0 2006.229.12:15:47.88#ibcon#about to read 4, iclass 37, count 0 2006.229.12:15:47.88#ibcon#read 4, iclass 37, count 0 2006.229.12:15:47.88#ibcon#about to read 5, iclass 37, count 0 2006.229.12:15:47.88#ibcon#read 5, iclass 37, count 0 2006.229.12:15:47.88#ibcon#about to read 6, iclass 37, count 0 2006.229.12:15:47.88#ibcon#read 6, iclass 37, count 0 2006.229.12:15:47.88#ibcon#end of sib2, iclass 37, count 0 2006.229.12:15:47.88#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:15:47.88#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:15:47.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:15:47.88#ibcon#*before write, iclass 37, count 0 2006.229.12:15:47.88#ibcon#enter sib2, iclass 37, count 0 2006.229.12:15:47.88#ibcon#flushed, iclass 37, count 0 2006.229.12:15:47.88#ibcon#about to write, iclass 37, count 0 2006.229.12:15:47.88#ibcon#wrote, iclass 37, count 0 2006.229.12:15:47.88#ibcon#about to read 3, iclass 37, count 0 2006.229.12:15:47.92#ibcon#read 3, iclass 37, count 0 2006.229.12:15:47.92#ibcon#about to read 4, iclass 37, count 0 2006.229.12:15:47.92#ibcon#read 4, iclass 37, count 0 2006.229.12:15:47.92#ibcon#about to read 5, iclass 37, count 0 2006.229.12:15:47.92#ibcon#read 5, iclass 37, count 0 2006.229.12:15:47.92#ibcon#about to read 6, iclass 37, count 0 2006.229.12:15:47.92#ibcon#read 6, iclass 37, count 0 2006.229.12:15:47.92#ibcon#end of sib2, iclass 37, count 0 2006.229.12:15:47.92#ibcon#*after write, iclass 37, count 0 2006.229.12:15:47.92#ibcon#*before return 0, iclass 37, count 0 2006.229.12:15:47.92#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:47.92#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:15:47.92#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:15:47.92#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:15:47.92$vck44/vb=4,4 2006.229.12:15:47.92#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.12:15:47.92#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.12:15:47.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:47.92#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:47.98#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:47.98#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:47.98#ibcon#enter wrdev, iclass 39, count 2 2006.229.12:15:47.98#ibcon#first serial, iclass 39, count 2 2006.229.12:15:47.98#ibcon#enter sib2, iclass 39, count 2 2006.229.12:15:47.98#ibcon#flushed, iclass 39, count 2 2006.229.12:15:47.98#ibcon#about to write, iclass 39, count 2 2006.229.12:15:47.98#ibcon#wrote, iclass 39, count 2 2006.229.12:15:47.98#ibcon#about to read 3, iclass 39, count 2 2006.229.12:15:48.00#ibcon#read 3, iclass 39, count 2 2006.229.12:15:48.00#ibcon#about to read 4, iclass 39, count 2 2006.229.12:15:48.00#ibcon#read 4, iclass 39, count 2 2006.229.12:15:48.00#ibcon#about to read 5, iclass 39, count 2 2006.229.12:15:48.00#ibcon#read 5, iclass 39, count 2 2006.229.12:15:48.00#ibcon#about to read 6, iclass 39, count 2 2006.229.12:15:48.00#ibcon#read 6, iclass 39, count 2 2006.229.12:15:48.00#ibcon#end of sib2, iclass 39, count 2 2006.229.12:15:48.00#ibcon#*mode == 0, iclass 39, count 2 2006.229.12:15:48.00#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.12:15:48.00#ibcon#[27=AT04-04\r\n] 2006.229.12:15:48.00#ibcon#*before write, iclass 39, count 2 2006.229.12:15:48.00#ibcon#enter sib2, iclass 39, count 2 2006.229.12:15:48.00#ibcon#flushed, iclass 39, count 2 2006.229.12:15:48.00#ibcon#about to write, iclass 39, count 2 2006.229.12:15:48.00#ibcon#wrote, iclass 39, count 2 2006.229.12:15:48.00#ibcon#about to read 3, iclass 39, count 2 2006.229.12:15:48.03#ibcon#read 3, iclass 39, count 2 2006.229.12:15:48.03#ibcon#about to read 4, iclass 39, count 2 2006.229.12:15:48.03#ibcon#read 4, iclass 39, count 2 2006.229.12:15:48.03#ibcon#about to read 5, iclass 39, count 2 2006.229.12:15:48.03#ibcon#read 5, iclass 39, count 2 2006.229.12:15:48.03#ibcon#about to read 6, iclass 39, count 2 2006.229.12:15:48.03#ibcon#read 6, iclass 39, count 2 2006.229.12:15:48.03#ibcon#end of sib2, iclass 39, count 2 2006.229.12:15:48.03#ibcon#*after write, iclass 39, count 2 2006.229.12:15:48.03#ibcon#*before return 0, iclass 39, count 2 2006.229.12:15:48.03#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:48.03#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:15:48.03#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.12:15:48.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:48.03#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:48.15#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:48.15#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:48.15#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:15:48.15#ibcon#first serial, iclass 39, count 0 2006.229.12:15:48.15#ibcon#enter sib2, iclass 39, count 0 2006.229.12:15:48.15#ibcon#flushed, iclass 39, count 0 2006.229.12:15:48.15#ibcon#about to write, iclass 39, count 0 2006.229.12:15:48.15#ibcon#wrote, iclass 39, count 0 2006.229.12:15:48.15#ibcon#about to read 3, iclass 39, count 0 2006.229.12:15:48.17#ibcon#read 3, iclass 39, count 0 2006.229.12:15:48.17#ibcon#about to read 4, iclass 39, count 0 2006.229.12:15:48.17#ibcon#read 4, iclass 39, count 0 2006.229.12:15:48.17#ibcon#about to read 5, iclass 39, count 0 2006.229.12:15:48.17#ibcon#read 5, iclass 39, count 0 2006.229.12:15:48.17#ibcon#about to read 6, iclass 39, count 0 2006.229.12:15:48.17#ibcon#read 6, iclass 39, count 0 2006.229.12:15:48.17#ibcon#end of sib2, iclass 39, count 0 2006.229.12:15:48.17#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:15:48.17#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:15:48.17#ibcon#[27=USB\r\n] 2006.229.12:15:48.17#ibcon#*before write, iclass 39, count 0 2006.229.12:15:48.17#ibcon#enter sib2, iclass 39, count 0 2006.229.12:15:48.17#ibcon#flushed, iclass 39, count 0 2006.229.12:15:48.17#ibcon#about to write, iclass 39, count 0 2006.229.12:15:48.17#ibcon#wrote, iclass 39, count 0 2006.229.12:15:48.17#ibcon#about to read 3, iclass 39, count 0 2006.229.12:15:48.20#ibcon#read 3, iclass 39, count 0 2006.229.12:15:48.20#ibcon#about to read 4, iclass 39, count 0 2006.229.12:15:48.20#ibcon#read 4, iclass 39, count 0 2006.229.12:15:48.20#ibcon#about to read 5, iclass 39, count 0 2006.229.12:15:48.20#ibcon#read 5, iclass 39, count 0 2006.229.12:15:48.20#ibcon#about to read 6, iclass 39, count 0 2006.229.12:15:48.20#ibcon#read 6, iclass 39, count 0 2006.229.12:15:48.20#ibcon#end of sib2, iclass 39, count 0 2006.229.12:15:48.20#ibcon#*after write, iclass 39, count 0 2006.229.12:15:48.20#ibcon#*before return 0, iclass 39, count 0 2006.229.12:15:48.20#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:48.20#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:15:48.20#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:15:48.20#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:15:48.20$vck44/vblo=5,709.99 2006.229.12:15:48.20#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.12:15:48.20#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.12:15:48.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:48.20#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:48.20#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:48.20#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:48.20#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:15:48.20#ibcon#first serial, iclass 3, count 0 2006.229.12:15:48.20#ibcon#enter sib2, iclass 3, count 0 2006.229.12:15:48.20#ibcon#flushed, iclass 3, count 0 2006.229.12:15:48.20#ibcon#about to write, iclass 3, count 0 2006.229.12:15:48.20#ibcon#wrote, iclass 3, count 0 2006.229.12:15:48.20#ibcon#about to read 3, iclass 3, count 0 2006.229.12:15:48.22#ibcon#read 3, iclass 3, count 0 2006.229.12:15:48.22#ibcon#about to read 4, iclass 3, count 0 2006.229.12:15:48.22#ibcon#read 4, iclass 3, count 0 2006.229.12:15:48.22#ibcon#about to read 5, iclass 3, count 0 2006.229.12:15:48.22#ibcon#read 5, iclass 3, count 0 2006.229.12:15:48.22#ibcon#about to read 6, iclass 3, count 0 2006.229.12:15:48.22#ibcon#read 6, iclass 3, count 0 2006.229.12:15:48.22#ibcon#end of sib2, iclass 3, count 0 2006.229.12:15:48.22#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:15:48.22#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:15:48.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:15:48.22#ibcon#*before write, iclass 3, count 0 2006.229.12:15:48.22#ibcon#enter sib2, iclass 3, count 0 2006.229.12:15:48.22#ibcon#flushed, iclass 3, count 0 2006.229.12:15:48.22#ibcon#about to write, iclass 3, count 0 2006.229.12:15:48.22#ibcon#wrote, iclass 3, count 0 2006.229.12:15:48.22#ibcon#about to read 3, iclass 3, count 0 2006.229.12:15:48.26#ibcon#read 3, iclass 3, count 0 2006.229.12:15:48.26#ibcon#about to read 4, iclass 3, count 0 2006.229.12:15:48.26#ibcon#read 4, iclass 3, count 0 2006.229.12:15:48.26#ibcon#about to read 5, iclass 3, count 0 2006.229.12:15:48.26#ibcon#read 5, iclass 3, count 0 2006.229.12:15:48.26#ibcon#about to read 6, iclass 3, count 0 2006.229.12:15:48.26#ibcon#read 6, iclass 3, count 0 2006.229.12:15:48.26#ibcon#end of sib2, iclass 3, count 0 2006.229.12:15:48.26#ibcon#*after write, iclass 3, count 0 2006.229.12:15:48.26#ibcon#*before return 0, iclass 3, count 0 2006.229.12:15:48.26#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:48.26#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:15:48.26#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:15:48.26#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:15:48.26$vck44/vb=5,4 2006.229.12:15:48.26#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.12:15:48.26#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.12:15:48.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:48.26#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:48.32#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:48.32#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:48.32#ibcon#enter wrdev, iclass 5, count 2 2006.229.12:15:48.32#ibcon#first serial, iclass 5, count 2 2006.229.12:15:48.32#ibcon#enter sib2, iclass 5, count 2 2006.229.12:15:48.32#ibcon#flushed, iclass 5, count 2 2006.229.12:15:48.32#ibcon#about to write, iclass 5, count 2 2006.229.12:15:48.32#ibcon#wrote, iclass 5, count 2 2006.229.12:15:48.32#ibcon#about to read 3, iclass 5, count 2 2006.229.12:15:48.34#ibcon#read 3, iclass 5, count 2 2006.229.12:15:48.34#ibcon#about to read 4, iclass 5, count 2 2006.229.12:15:48.34#ibcon#read 4, iclass 5, count 2 2006.229.12:15:48.34#ibcon#about to read 5, iclass 5, count 2 2006.229.12:15:48.34#ibcon#read 5, iclass 5, count 2 2006.229.12:15:48.34#ibcon#about to read 6, iclass 5, count 2 2006.229.12:15:48.34#ibcon#read 6, iclass 5, count 2 2006.229.12:15:48.34#ibcon#end of sib2, iclass 5, count 2 2006.229.12:15:48.34#ibcon#*mode == 0, iclass 5, count 2 2006.229.12:15:48.34#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.12:15:48.34#ibcon#[27=AT05-04\r\n] 2006.229.12:15:48.34#ibcon#*before write, iclass 5, count 2 2006.229.12:15:48.34#ibcon#enter sib2, iclass 5, count 2 2006.229.12:15:48.34#ibcon#flushed, iclass 5, count 2 2006.229.12:15:48.34#ibcon#about to write, iclass 5, count 2 2006.229.12:15:48.34#ibcon#wrote, iclass 5, count 2 2006.229.12:15:48.34#ibcon#about to read 3, iclass 5, count 2 2006.229.12:15:48.37#ibcon#read 3, iclass 5, count 2 2006.229.12:15:48.37#ibcon#about to read 4, iclass 5, count 2 2006.229.12:15:48.37#ibcon#read 4, iclass 5, count 2 2006.229.12:15:48.37#ibcon#about to read 5, iclass 5, count 2 2006.229.12:15:48.37#ibcon#read 5, iclass 5, count 2 2006.229.12:15:48.37#ibcon#about to read 6, iclass 5, count 2 2006.229.12:15:48.37#ibcon#read 6, iclass 5, count 2 2006.229.12:15:48.37#ibcon#end of sib2, iclass 5, count 2 2006.229.12:15:48.37#ibcon#*after write, iclass 5, count 2 2006.229.12:15:48.37#ibcon#*before return 0, iclass 5, count 2 2006.229.12:15:48.37#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:48.37#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:15:48.37#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.12:15:48.37#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:48.37#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:48.49#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:48.49#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:48.49#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:15:48.49#ibcon#first serial, iclass 5, count 0 2006.229.12:15:48.49#ibcon#enter sib2, iclass 5, count 0 2006.229.12:15:48.49#ibcon#flushed, iclass 5, count 0 2006.229.12:15:48.49#ibcon#about to write, iclass 5, count 0 2006.229.12:15:48.49#ibcon#wrote, iclass 5, count 0 2006.229.12:15:48.49#ibcon#about to read 3, iclass 5, count 0 2006.229.12:15:48.51#ibcon#read 3, iclass 5, count 0 2006.229.12:15:48.51#ibcon#about to read 4, iclass 5, count 0 2006.229.12:15:48.51#ibcon#read 4, iclass 5, count 0 2006.229.12:15:48.51#ibcon#about to read 5, iclass 5, count 0 2006.229.12:15:48.51#ibcon#read 5, iclass 5, count 0 2006.229.12:15:48.51#ibcon#about to read 6, iclass 5, count 0 2006.229.12:15:48.51#ibcon#read 6, iclass 5, count 0 2006.229.12:15:48.51#ibcon#end of sib2, iclass 5, count 0 2006.229.12:15:48.51#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:15:48.51#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:15:48.51#ibcon#[27=USB\r\n] 2006.229.12:15:48.51#ibcon#*before write, iclass 5, count 0 2006.229.12:15:48.51#ibcon#enter sib2, iclass 5, count 0 2006.229.12:15:48.51#ibcon#flushed, iclass 5, count 0 2006.229.12:15:48.51#ibcon#about to write, iclass 5, count 0 2006.229.12:15:48.51#ibcon#wrote, iclass 5, count 0 2006.229.12:15:48.51#ibcon#about to read 3, iclass 5, count 0 2006.229.12:15:48.54#ibcon#read 3, iclass 5, count 0 2006.229.12:15:48.54#ibcon#about to read 4, iclass 5, count 0 2006.229.12:15:48.54#ibcon#read 4, iclass 5, count 0 2006.229.12:15:48.54#ibcon#about to read 5, iclass 5, count 0 2006.229.12:15:48.54#ibcon#read 5, iclass 5, count 0 2006.229.12:15:48.54#ibcon#about to read 6, iclass 5, count 0 2006.229.12:15:48.54#ibcon#read 6, iclass 5, count 0 2006.229.12:15:48.54#ibcon#end of sib2, iclass 5, count 0 2006.229.12:15:48.54#ibcon#*after write, iclass 5, count 0 2006.229.12:15:48.54#ibcon#*before return 0, iclass 5, count 0 2006.229.12:15:48.54#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:48.54#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:15:48.54#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:15:48.54#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:15:48.54$vck44/vblo=6,719.99 2006.229.12:15:48.54#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.12:15:48.54#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.12:15:48.54#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:48.54#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:48.54#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:48.54#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:48.54#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:15:48.54#ibcon#first serial, iclass 7, count 0 2006.229.12:15:48.54#ibcon#enter sib2, iclass 7, count 0 2006.229.12:15:48.54#ibcon#flushed, iclass 7, count 0 2006.229.12:15:48.54#ibcon#about to write, iclass 7, count 0 2006.229.12:15:48.54#ibcon#wrote, iclass 7, count 0 2006.229.12:15:48.54#ibcon#about to read 3, iclass 7, count 0 2006.229.12:15:48.56#ibcon#read 3, iclass 7, count 0 2006.229.12:15:48.56#ibcon#about to read 4, iclass 7, count 0 2006.229.12:15:48.56#ibcon#read 4, iclass 7, count 0 2006.229.12:15:48.56#ibcon#about to read 5, iclass 7, count 0 2006.229.12:15:48.56#ibcon#read 5, iclass 7, count 0 2006.229.12:15:48.56#ibcon#about to read 6, iclass 7, count 0 2006.229.12:15:48.56#ibcon#read 6, iclass 7, count 0 2006.229.12:15:48.56#ibcon#end of sib2, iclass 7, count 0 2006.229.12:15:48.56#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:15:48.56#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:15:48.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:15:48.56#ibcon#*before write, iclass 7, count 0 2006.229.12:15:48.56#ibcon#enter sib2, iclass 7, count 0 2006.229.12:15:48.56#ibcon#flushed, iclass 7, count 0 2006.229.12:15:48.56#ibcon#about to write, iclass 7, count 0 2006.229.12:15:48.56#ibcon#wrote, iclass 7, count 0 2006.229.12:15:48.56#ibcon#about to read 3, iclass 7, count 0 2006.229.12:15:48.60#ibcon#read 3, iclass 7, count 0 2006.229.12:15:48.60#ibcon#about to read 4, iclass 7, count 0 2006.229.12:15:48.60#ibcon#read 4, iclass 7, count 0 2006.229.12:15:48.60#ibcon#about to read 5, iclass 7, count 0 2006.229.12:15:48.60#ibcon#read 5, iclass 7, count 0 2006.229.12:15:48.60#ibcon#about to read 6, iclass 7, count 0 2006.229.12:15:48.60#ibcon#read 6, iclass 7, count 0 2006.229.12:15:48.60#ibcon#end of sib2, iclass 7, count 0 2006.229.12:15:48.60#ibcon#*after write, iclass 7, count 0 2006.229.12:15:48.60#ibcon#*before return 0, iclass 7, count 0 2006.229.12:15:48.60#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:48.60#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:15:48.60#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:15:48.60#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:15:48.60$vck44/vb=6,4 2006.229.12:15:48.60#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.12:15:48.60#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.12:15:48.60#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:48.60#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:48.66#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:48.66#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:48.66#ibcon#enter wrdev, iclass 11, count 2 2006.229.12:15:48.66#ibcon#first serial, iclass 11, count 2 2006.229.12:15:48.66#ibcon#enter sib2, iclass 11, count 2 2006.229.12:15:48.66#ibcon#flushed, iclass 11, count 2 2006.229.12:15:48.66#ibcon#about to write, iclass 11, count 2 2006.229.12:15:48.66#ibcon#wrote, iclass 11, count 2 2006.229.12:15:48.66#ibcon#about to read 3, iclass 11, count 2 2006.229.12:15:48.68#ibcon#read 3, iclass 11, count 2 2006.229.12:15:48.68#ibcon#about to read 4, iclass 11, count 2 2006.229.12:15:48.68#ibcon#read 4, iclass 11, count 2 2006.229.12:15:48.68#ibcon#about to read 5, iclass 11, count 2 2006.229.12:15:48.68#ibcon#read 5, iclass 11, count 2 2006.229.12:15:48.68#ibcon#about to read 6, iclass 11, count 2 2006.229.12:15:48.68#ibcon#read 6, iclass 11, count 2 2006.229.12:15:48.68#ibcon#end of sib2, iclass 11, count 2 2006.229.12:15:48.68#ibcon#*mode == 0, iclass 11, count 2 2006.229.12:15:48.68#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.12:15:48.68#ibcon#[27=AT06-04\r\n] 2006.229.12:15:48.68#ibcon#*before write, iclass 11, count 2 2006.229.12:15:48.68#ibcon#enter sib2, iclass 11, count 2 2006.229.12:15:48.68#ibcon#flushed, iclass 11, count 2 2006.229.12:15:48.68#ibcon#about to write, iclass 11, count 2 2006.229.12:15:48.68#ibcon#wrote, iclass 11, count 2 2006.229.12:15:48.68#ibcon#about to read 3, iclass 11, count 2 2006.229.12:15:48.71#ibcon#read 3, iclass 11, count 2 2006.229.12:15:48.71#ibcon#about to read 4, iclass 11, count 2 2006.229.12:15:48.71#ibcon#read 4, iclass 11, count 2 2006.229.12:15:48.71#ibcon#about to read 5, iclass 11, count 2 2006.229.12:15:48.71#ibcon#read 5, iclass 11, count 2 2006.229.12:15:48.71#ibcon#about to read 6, iclass 11, count 2 2006.229.12:15:48.71#ibcon#read 6, iclass 11, count 2 2006.229.12:15:48.71#ibcon#end of sib2, iclass 11, count 2 2006.229.12:15:48.71#ibcon#*after write, iclass 11, count 2 2006.229.12:15:48.71#ibcon#*before return 0, iclass 11, count 2 2006.229.12:15:48.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:48.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:15:48.71#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.12:15:48.71#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:48.71#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:48.83#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:48.83#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:48.83#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:15:48.83#ibcon#first serial, iclass 11, count 0 2006.229.12:15:48.83#ibcon#enter sib2, iclass 11, count 0 2006.229.12:15:48.83#ibcon#flushed, iclass 11, count 0 2006.229.12:15:48.83#ibcon#about to write, iclass 11, count 0 2006.229.12:15:48.83#ibcon#wrote, iclass 11, count 0 2006.229.12:15:48.83#ibcon#about to read 3, iclass 11, count 0 2006.229.12:15:48.85#ibcon#read 3, iclass 11, count 0 2006.229.12:15:48.85#ibcon#about to read 4, iclass 11, count 0 2006.229.12:15:48.85#ibcon#read 4, iclass 11, count 0 2006.229.12:15:48.85#ibcon#about to read 5, iclass 11, count 0 2006.229.12:15:48.85#ibcon#read 5, iclass 11, count 0 2006.229.12:15:48.85#ibcon#about to read 6, iclass 11, count 0 2006.229.12:15:48.85#ibcon#read 6, iclass 11, count 0 2006.229.12:15:48.85#ibcon#end of sib2, iclass 11, count 0 2006.229.12:15:48.85#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:15:48.85#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:15:48.85#ibcon#[27=USB\r\n] 2006.229.12:15:48.85#ibcon#*before write, iclass 11, count 0 2006.229.12:15:48.85#ibcon#enter sib2, iclass 11, count 0 2006.229.12:15:48.85#ibcon#flushed, iclass 11, count 0 2006.229.12:15:48.85#ibcon#about to write, iclass 11, count 0 2006.229.12:15:48.85#ibcon#wrote, iclass 11, count 0 2006.229.12:15:48.85#ibcon#about to read 3, iclass 11, count 0 2006.229.12:15:48.88#ibcon#read 3, iclass 11, count 0 2006.229.12:15:48.88#ibcon#about to read 4, iclass 11, count 0 2006.229.12:15:48.88#ibcon#read 4, iclass 11, count 0 2006.229.12:15:48.88#ibcon#about to read 5, iclass 11, count 0 2006.229.12:15:48.88#ibcon#read 5, iclass 11, count 0 2006.229.12:15:48.88#ibcon#about to read 6, iclass 11, count 0 2006.229.12:15:48.88#ibcon#read 6, iclass 11, count 0 2006.229.12:15:48.88#ibcon#end of sib2, iclass 11, count 0 2006.229.12:15:48.88#ibcon#*after write, iclass 11, count 0 2006.229.12:15:48.88#ibcon#*before return 0, iclass 11, count 0 2006.229.12:15:48.88#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:48.88#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:15:48.88#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:15:48.88#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:15:48.88$vck44/vblo=7,734.99 2006.229.12:15:48.88#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.12:15:48.88#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.12:15:48.88#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:48.88#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:48.88#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:48.88#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:48.88#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:15:48.88#ibcon#first serial, iclass 13, count 0 2006.229.12:15:48.88#ibcon#enter sib2, iclass 13, count 0 2006.229.12:15:48.88#ibcon#flushed, iclass 13, count 0 2006.229.12:15:48.88#ibcon#about to write, iclass 13, count 0 2006.229.12:15:48.88#ibcon#wrote, iclass 13, count 0 2006.229.12:15:48.88#ibcon#about to read 3, iclass 13, count 0 2006.229.12:15:48.90#ibcon#read 3, iclass 13, count 0 2006.229.12:15:48.90#ibcon#about to read 4, iclass 13, count 0 2006.229.12:15:48.90#ibcon#read 4, iclass 13, count 0 2006.229.12:15:48.90#ibcon#about to read 5, iclass 13, count 0 2006.229.12:15:48.90#ibcon#read 5, iclass 13, count 0 2006.229.12:15:48.90#ibcon#about to read 6, iclass 13, count 0 2006.229.12:15:48.90#ibcon#read 6, iclass 13, count 0 2006.229.12:15:48.90#ibcon#end of sib2, iclass 13, count 0 2006.229.12:15:48.90#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:15:48.90#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:15:48.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:15:48.90#ibcon#*before write, iclass 13, count 0 2006.229.12:15:48.90#ibcon#enter sib2, iclass 13, count 0 2006.229.12:15:48.90#ibcon#flushed, iclass 13, count 0 2006.229.12:15:48.90#ibcon#about to write, iclass 13, count 0 2006.229.12:15:48.90#ibcon#wrote, iclass 13, count 0 2006.229.12:15:48.90#ibcon#about to read 3, iclass 13, count 0 2006.229.12:15:48.94#ibcon#read 3, iclass 13, count 0 2006.229.12:15:48.94#ibcon#about to read 4, iclass 13, count 0 2006.229.12:15:48.94#ibcon#read 4, iclass 13, count 0 2006.229.12:15:48.94#ibcon#about to read 5, iclass 13, count 0 2006.229.12:15:48.94#ibcon#read 5, iclass 13, count 0 2006.229.12:15:48.94#ibcon#about to read 6, iclass 13, count 0 2006.229.12:15:48.94#ibcon#read 6, iclass 13, count 0 2006.229.12:15:48.94#ibcon#end of sib2, iclass 13, count 0 2006.229.12:15:48.94#ibcon#*after write, iclass 13, count 0 2006.229.12:15:48.94#ibcon#*before return 0, iclass 13, count 0 2006.229.12:15:48.94#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:48.94#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:15:48.94#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:15:48.94#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:15:48.94$vck44/vb=7,4 2006.229.12:15:48.94#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.12:15:48.94#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.12:15:48.94#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:48.94#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:49.00#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:49.00#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:49.00#ibcon#enter wrdev, iclass 15, count 2 2006.229.12:15:49.00#ibcon#first serial, iclass 15, count 2 2006.229.12:15:49.00#ibcon#enter sib2, iclass 15, count 2 2006.229.12:15:49.00#ibcon#flushed, iclass 15, count 2 2006.229.12:15:49.00#ibcon#about to write, iclass 15, count 2 2006.229.12:15:49.00#ibcon#wrote, iclass 15, count 2 2006.229.12:15:49.00#ibcon#about to read 3, iclass 15, count 2 2006.229.12:15:49.02#ibcon#read 3, iclass 15, count 2 2006.229.12:15:49.02#ibcon#about to read 4, iclass 15, count 2 2006.229.12:15:49.02#ibcon#read 4, iclass 15, count 2 2006.229.12:15:49.02#ibcon#about to read 5, iclass 15, count 2 2006.229.12:15:49.02#ibcon#read 5, iclass 15, count 2 2006.229.12:15:49.02#ibcon#about to read 6, iclass 15, count 2 2006.229.12:15:49.02#ibcon#read 6, iclass 15, count 2 2006.229.12:15:49.02#ibcon#end of sib2, iclass 15, count 2 2006.229.12:15:49.02#ibcon#*mode == 0, iclass 15, count 2 2006.229.12:15:49.02#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.12:15:49.02#ibcon#[27=AT07-04\r\n] 2006.229.12:15:49.02#ibcon#*before write, iclass 15, count 2 2006.229.12:15:49.02#ibcon#enter sib2, iclass 15, count 2 2006.229.12:15:49.02#ibcon#flushed, iclass 15, count 2 2006.229.12:15:49.02#ibcon#about to write, iclass 15, count 2 2006.229.12:15:49.02#ibcon#wrote, iclass 15, count 2 2006.229.12:15:49.02#ibcon#about to read 3, iclass 15, count 2 2006.229.12:15:49.05#ibcon#read 3, iclass 15, count 2 2006.229.12:15:49.05#ibcon#about to read 4, iclass 15, count 2 2006.229.12:15:49.05#ibcon#read 4, iclass 15, count 2 2006.229.12:15:49.05#ibcon#about to read 5, iclass 15, count 2 2006.229.12:15:49.05#ibcon#read 5, iclass 15, count 2 2006.229.12:15:49.05#ibcon#about to read 6, iclass 15, count 2 2006.229.12:15:49.05#ibcon#read 6, iclass 15, count 2 2006.229.12:15:49.05#ibcon#end of sib2, iclass 15, count 2 2006.229.12:15:49.05#ibcon#*after write, iclass 15, count 2 2006.229.12:15:49.05#ibcon#*before return 0, iclass 15, count 2 2006.229.12:15:49.05#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:49.05#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:15:49.05#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.12:15:49.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:49.05#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:49.17#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:49.17#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:49.17#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:15:49.17#ibcon#first serial, iclass 15, count 0 2006.229.12:15:49.17#ibcon#enter sib2, iclass 15, count 0 2006.229.12:15:49.17#ibcon#flushed, iclass 15, count 0 2006.229.12:15:49.17#ibcon#about to write, iclass 15, count 0 2006.229.12:15:49.17#ibcon#wrote, iclass 15, count 0 2006.229.12:15:49.17#ibcon#about to read 3, iclass 15, count 0 2006.229.12:15:49.19#ibcon#read 3, iclass 15, count 0 2006.229.12:15:49.19#ibcon#about to read 4, iclass 15, count 0 2006.229.12:15:49.19#ibcon#read 4, iclass 15, count 0 2006.229.12:15:49.19#ibcon#about to read 5, iclass 15, count 0 2006.229.12:15:49.19#ibcon#read 5, iclass 15, count 0 2006.229.12:15:49.19#ibcon#about to read 6, iclass 15, count 0 2006.229.12:15:49.19#ibcon#read 6, iclass 15, count 0 2006.229.12:15:49.19#ibcon#end of sib2, iclass 15, count 0 2006.229.12:15:49.19#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:15:49.19#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:15:49.19#ibcon#[27=USB\r\n] 2006.229.12:15:49.19#ibcon#*before write, iclass 15, count 0 2006.229.12:15:49.19#ibcon#enter sib2, iclass 15, count 0 2006.229.12:15:49.19#ibcon#flushed, iclass 15, count 0 2006.229.12:15:49.19#ibcon#about to write, iclass 15, count 0 2006.229.12:15:49.19#ibcon#wrote, iclass 15, count 0 2006.229.12:15:49.19#ibcon#about to read 3, iclass 15, count 0 2006.229.12:15:49.22#ibcon#read 3, iclass 15, count 0 2006.229.12:15:49.22#ibcon#about to read 4, iclass 15, count 0 2006.229.12:15:49.22#ibcon#read 4, iclass 15, count 0 2006.229.12:15:49.22#ibcon#about to read 5, iclass 15, count 0 2006.229.12:15:49.22#ibcon#read 5, iclass 15, count 0 2006.229.12:15:49.22#ibcon#about to read 6, iclass 15, count 0 2006.229.12:15:49.22#ibcon#read 6, iclass 15, count 0 2006.229.12:15:49.22#ibcon#end of sib2, iclass 15, count 0 2006.229.12:15:49.22#ibcon#*after write, iclass 15, count 0 2006.229.12:15:49.22#ibcon#*before return 0, iclass 15, count 0 2006.229.12:15:49.22#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:49.22#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:15:49.22#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:15:49.22#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:15:49.22$vck44/vblo=8,744.99 2006.229.12:15:49.22#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.12:15:49.22#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.12:15:49.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:15:49.22#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:49.22#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:49.22#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:49.22#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:15:49.22#ibcon#first serial, iclass 17, count 0 2006.229.12:15:49.22#ibcon#enter sib2, iclass 17, count 0 2006.229.12:15:49.22#ibcon#flushed, iclass 17, count 0 2006.229.12:15:49.22#ibcon#about to write, iclass 17, count 0 2006.229.12:15:49.22#ibcon#wrote, iclass 17, count 0 2006.229.12:15:49.22#ibcon#about to read 3, iclass 17, count 0 2006.229.12:15:49.24#ibcon#read 3, iclass 17, count 0 2006.229.12:15:49.24#ibcon#about to read 4, iclass 17, count 0 2006.229.12:15:49.24#ibcon#read 4, iclass 17, count 0 2006.229.12:15:49.24#ibcon#about to read 5, iclass 17, count 0 2006.229.12:15:49.24#ibcon#read 5, iclass 17, count 0 2006.229.12:15:49.24#ibcon#about to read 6, iclass 17, count 0 2006.229.12:15:49.24#ibcon#read 6, iclass 17, count 0 2006.229.12:15:49.24#ibcon#end of sib2, iclass 17, count 0 2006.229.12:15:49.24#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:15:49.24#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:15:49.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:15:49.24#ibcon#*before write, iclass 17, count 0 2006.229.12:15:49.24#ibcon#enter sib2, iclass 17, count 0 2006.229.12:15:49.24#ibcon#flushed, iclass 17, count 0 2006.229.12:15:49.24#ibcon#about to write, iclass 17, count 0 2006.229.12:15:49.24#ibcon#wrote, iclass 17, count 0 2006.229.12:15:49.24#ibcon#about to read 3, iclass 17, count 0 2006.229.12:15:49.28#ibcon#read 3, iclass 17, count 0 2006.229.12:15:49.28#ibcon#about to read 4, iclass 17, count 0 2006.229.12:15:49.28#ibcon#read 4, iclass 17, count 0 2006.229.12:15:49.28#ibcon#about to read 5, iclass 17, count 0 2006.229.12:15:49.28#ibcon#read 5, iclass 17, count 0 2006.229.12:15:49.28#ibcon#about to read 6, iclass 17, count 0 2006.229.12:15:49.28#ibcon#read 6, iclass 17, count 0 2006.229.12:15:49.28#ibcon#end of sib2, iclass 17, count 0 2006.229.12:15:49.28#ibcon#*after write, iclass 17, count 0 2006.229.12:15:49.28#ibcon#*before return 0, iclass 17, count 0 2006.229.12:15:49.28#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:49.28#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:15:49.28#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:15:49.28#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:15:49.28$vck44/vb=8,4 2006.229.12:15:49.28#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.12:15:49.28#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.12:15:49.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:15:49.28#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:49.34#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:49.34#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:49.34#ibcon#enter wrdev, iclass 19, count 2 2006.229.12:15:49.34#ibcon#first serial, iclass 19, count 2 2006.229.12:15:49.34#ibcon#enter sib2, iclass 19, count 2 2006.229.12:15:49.34#ibcon#flushed, iclass 19, count 2 2006.229.12:15:49.34#ibcon#about to write, iclass 19, count 2 2006.229.12:15:49.34#ibcon#wrote, iclass 19, count 2 2006.229.12:15:49.34#ibcon#about to read 3, iclass 19, count 2 2006.229.12:15:49.36#ibcon#read 3, iclass 19, count 2 2006.229.12:15:49.36#ibcon#about to read 4, iclass 19, count 2 2006.229.12:15:49.36#ibcon#read 4, iclass 19, count 2 2006.229.12:15:49.36#ibcon#about to read 5, iclass 19, count 2 2006.229.12:15:49.36#ibcon#read 5, iclass 19, count 2 2006.229.12:15:49.36#ibcon#about to read 6, iclass 19, count 2 2006.229.12:15:49.36#ibcon#read 6, iclass 19, count 2 2006.229.12:15:49.36#ibcon#end of sib2, iclass 19, count 2 2006.229.12:15:49.36#ibcon#*mode == 0, iclass 19, count 2 2006.229.12:15:49.36#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.12:15:49.36#ibcon#[27=AT08-04\r\n] 2006.229.12:15:49.36#ibcon#*before write, iclass 19, count 2 2006.229.12:15:49.36#ibcon#enter sib2, iclass 19, count 2 2006.229.12:15:49.36#ibcon#flushed, iclass 19, count 2 2006.229.12:15:49.36#ibcon#about to write, iclass 19, count 2 2006.229.12:15:49.36#ibcon#wrote, iclass 19, count 2 2006.229.12:15:49.36#ibcon#about to read 3, iclass 19, count 2 2006.229.12:15:49.39#ibcon#read 3, iclass 19, count 2 2006.229.12:15:49.39#ibcon#about to read 4, iclass 19, count 2 2006.229.12:15:49.39#ibcon#read 4, iclass 19, count 2 2006.229.12:15:49.39#ibcon#about to read 5, iclass 19, count 2 2006.229.12:15:49.39#ibcon#read 5, iclass 19, count 2 2006.229.12:15:49.39#ibcon#about to read 6, iclass 19, count 2 2006.229.12:15:49.39#ibcon#read 6, iclass 19, count 2 2006.229.12:15:49.39#ibcon#end of sib2, iclass 19, count 2 2006.229.12:15:49.39#ibcon#*after write, iclass 19, count 2 2006.229.12:15:49.39#ibcon#*before return 0, iclass 19, count 2 2006.229.12:15:49.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:49.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:15:49.39#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.12:15:49.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:15:49.39#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:49.51#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:49.51#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:49.51#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:15:49.51#ibcon#first serial, iclass 19, count 0 2006.229.12:15:49.51#ibcon#enter sib2, iclass 19, count 0 2006.229.12:15:49.51#ibcon#flushed, iclass 19, count 0 2006.229.12:15:49.51#ibcon#about to write, iclass 19, count 0 2006.229.12:15:49.51#ibcon#wrote, iclass 19, count 0 2006.229.12:15:49.51#ibcon#about to read 3, iclass 19, count 0 2006.229.12:15:49.53#ibcon#read 3, iclass 19, count 0 2006.229.12:15:49.53#ibcon#about to read 4, iclass 19, count 0 2006.229.12:15:49.53#ibcon#read 4, iclass 19, count 0 2006.229.12:15:49.53#ibcon#about to read 5, iclass 19, count 0 2006.229.12:15:49.53#ibcon#read 5, iclass 19, count 0 2006.229.12:15:49.53#ibcon#about to read 6, iclass 19, count 0 2006.229.12:15:49.53#ibcon#read 6, iclass 19, count 0 2006.229.12:15:49.53#ibcon#end of sib2, iclass 19, count 0 2006.229.12:15:49.53#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:15:49.53#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:15:49.53#ibcon#[27=USB\r\n] 2006.229.12:15:49.53#ibcon#*before write, iclass 19, count 0 2006.229.12:15:49.53#ibcon#enter sib2, iclass 19, count 0 2006.229.12:15:49.53#ibcon#flushed, iclass 19, count 0 2006.229.12:15:49.53#ibcon#about to write, iclass 19, count 0 2006.229.12:15:49.53#ibcon#wrote, iclass 19, count 0 2006.229.12:15:49.53#ibcon#about to read 3, iclass 19, count 0 2006.229.12:15:49.56#ibcon#read 3, iclass 19, count 0 2006.229.12:15:49.56#ibcon#about to read 4, iclass 19, count 0 2006.229.12:15:49.56#ibcon#read 4, iclass 19, count 0 2006.229.12:15:49.56#ibcon#about to read 5, iclass 19, count 0 2006.229.12:15:49.56#ibcon#read 5, iclass 19, count 0 2006.229.12:15:49.56#ibcon#about to read 6, iclass 19, count 0 2006.229.12:15:49.56#ibcon#read 6, iclass 19, count 0 2006.229.12:15:49.56#ibcon#end of sib2, iclass 19, count 0 2006.229.12:15:49.56#ibcon#*after write, iclass 19, count 0 2006.229.12:15:49.56#ibcon#*before return 0, iclass 19, count 0 2006.229.12:15:49.56#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:49.56#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:15:49.56#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:15:49.56#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:15:49.56$vck44/vabw=wide 2006.229.12:15:49.56#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.12:15:49.56#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.12:15:49.56#ibcon#ireg 8 cls_cnt 0 2006.229.12:15:49.56#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:49.56#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:49.56#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:49.56#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:15:49.56#ibcon#first serial, iclass 21, count 0 2006.229.12:15:49.56#ibcon#enter sib2, iclass 21, count 0 2006.229.12:15:49.56#ibcon#flushed, iclass 21, count 0 2006.229.12:15:49.56#ibcon#about to write, iclass 21, count 0 2006.229.12:15:49.56#ibcon#wrote, iclass 21, count 0 2006.229.12:15:49.56#ibcon#about to read 3, iclass 21, count 0 2006.229.12:15:49.58#ibcon#read 3, iclass 21, count 0 2006.229.12:15:49.58#ibcon#about to read 4, iclass 21, count 0 2006.229.12:15:49.58#ibcon#read 4, iclass 21, count 0 2006.229.12:15:49.58#ibcon#about to read 5, iclass 21, count 0 2006.229.12:15:49.58#ibcon#read 5, iclass 21, count 0 2006.229.12:15:49.58#ibcon#about to read 6, iclass 21, count 0 2006.229.12:15:49.58#ibcon#read 6, iclass 21, count 0 2006.229.12:15:49.58#ibcon#end of sib2, iclass 21, count 0 2006.229.12:15:49.58#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:15:49.58#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:15:49.58#ibcon#[25=BW32\r\n] 2006.229.12:15:49.58#ibcon#*before write, iclass 21, count 0 2006.229.12:15:49.58#ibcon#enter sib2, iclass 21, count 0 2006.229.12:15:49.58#ibcon#flushed, iclass 21, count 0 2006.229.12:15:49.58#ibcon#about to write, iclass 21, count 0 2006.229.12:15:49.58#ibcon#wrote, iclass 21, count 0 2006.229.12:15:49.58#ibcon#about to read 3, iclass 21, count 0 2006.229.12:15:49.61#ibcon#read 3, iclass 21, count 0 2006.229.12:15:49.61#ibcon#about to read 4, iclass 21, count 0 2006.229.12:15:49.61#ibcon#read 4, iclass 21, count 0 2006.229.12:15:49.61#ibcon#about to read 5, iclass 21, count 0 2006.229.12:15:49.61#ibcon#read 5, iclass 21, count 0 2006.229.12:15:49.61#ibcon#about to read 6, iclass 21, count 0 2006.229.12:15:49.61#ibcon#read 6, iclass 21, count 0 2006.229.12:15:49.61#ibcon#end of sib2, iclass 21, count 0 2006.229.12:15:49.61#ibcon#*after write, iclass 21, count 0 2006.229.12:15:49.61#ibcon#*before return 0, iclass 21, count 0 2006.229.12:15:49.61#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:49.61#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:15:49.61#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:15:49.61#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:15:49.61$vck44/vbbw=wide 2006.229.12:15:49.61#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.12:15:49.61#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.12:15:49.61#ibcon#ireg 8 cls_cnt 0 2006.229.12:15:49.61#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:15:49.68#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:15:49.68#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:15:49.68#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:15:49.68#ibcon#first serial, iclass 23, count 0 2006.229.12:15:49.68#ibcon#enter sib2, iclass 23, count 0 2006.229.12:15:49.68#ibcon#flushed, iclass 23, count 0 2006.229.12:15:49.68#ibcon#about to write, iclass 23, count 0 2006.229.12:15:49.68#ibcon#wrote, iclass 23, count 0 2006.229.12:15:49.68#ibcon#about to read 3, iclass 23, count 0 2006.229.12:15:49.70#ibcon#read 3, iclass 23, count 0 2006.229.12:15:49.70#ibcon#about to read 4, iclass 23, count 0 2006.229.12:15:49.70#ibcon#read 4, iclass 23, count 0 2006.229.12:15:49.70#ibcon#about to read 5, iclass 23, count 0 2006.229.12:15:49.70#ibcon#read 5, iclass 23, count 0 2006.229.12:15:49.70#ibcon#about to read 6, iclass 23, count 0 2006.229.12:15:49.70#ibcon#read 6, iclass 23, count 0 2006.229.12:15:49.70#ibcon#end of sib2, iclass 23, count 0 2006.229.12:15:49.70#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:15:49.70#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:15:49.70#ibcon#[27=BW32\r\n] 2006.229.12:15:49.70#ibcon#*before write, iclass 23, count 0 2006.229.12:15:49.70#ibcon#enter sib2, iclass 23, count 0 2006.229.12:15:49.70#ibcon#flushed, iclass 23, count 0 2006.229.12:15:49.70#ibcon#about to write, iclass 23, count 0 2006.229.12:15:49.70#ibcon#wrote, iclass 23, count 0 2006.229.12:15:49.70#ibcon#about to read 3, iclass 23, count 0 2006.229.12:15:49.73#ibcon#read 3, iclass 23, count 0 2006.229.12:15:49.73#ibcon#about to read 4, iclass 23, count 0 2006.229.12:15:49.73#ibcon#read 4, iclass 23, count 0 2006.229.12:15:49.73#ibcon#about to read 5, iclass 23, count 0 2006.229.12:15:49.73#ibcon#read 5, iclass 23, count 0 2006.229.12:15:49.73#ibcon#about to read 6, iclass 23, count 0 2006.229.12:15:49.73#ibcon#read 6, iclass 23, count 0 2006.229.12:15:49.73#ibcon#end of sib2, iclass 23, count 0 2006.229.12:15:49.73#ibcon#*after write, iclass 23, count 0 2006.229.12:15:49.73#ibcon#*before return 0, iclass 23, count 0 2006.229.12:15:49.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:15:49.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:15:49.73#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:15:49.73#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:15:49.73$setupk4/ifdk4 2006.229.12:15:49.73$ifdk4/lo= 2006.229.12:15:49.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:15:49.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:15:49.73$ifdk4/patch= 2006.229.12:15:49.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:15:49.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:15:49.73$setupk4/!*+20s 2006.229.12:15:57.12#abcon#<5=/04 1.6 3.1 27.741001002.4\r\n> 2006.229.12:15:57.14#abcon#{5=INTERFACE CLEAR} 2006.229.12:15:57.20#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:16:00.14#trakl#Source acquired 2006.229.12:16:00.14#flagr#flagr/antenna,acquired 2006.229.12:16:04.23$setupk4/"tpicd 2006.229.12:16:04.23$setupk4/echo=off 2006.229.12:16:04.23$setupk4/xlog=off 2006.229.12:16:04.23:!2006.229.12:18:00 2006.229.12:18:00.00:preob 2006.229.12:18:01.14/onsource/TRACKING 2006.229.12:18:01.14:!2006.229.12:18:10 2006.229.12:18:10.00:"tape 2006.229.12:18:10.00:"st=record 2006.229.12:18:10.00:data_valid=on 2006.229.12:18:10.00:midob 2006.229.12:18:10.14/onsource/TRACKING 2006.229.12:18:10.14/wx/27.74,1002.4,100 2006.229.12:18:10.19/cable/+6.4075E-03 2006.229.12:18:11.28/va/01,08,usb,yes,29,31 2006.229.12:18:11.28/va/02,07,usb,yes,32,32 2006.229.12:18:11.28/va/03,06,usb,yes,39,42 2006.229.12:18:11.28/va/04,07,usb,yes,33,34 2006.229.12:18:11.28/va/05,04,usb,yes,29,29 2006.229.12:18:11.28/va/06,04,usb,yes,33,32 2006.229.12:18:11.28/va/07,05,usb,yes,29,29 2006.229.12:18:11.28/va/08,06,usb,yes,21,26 2006.229.12:18:11.51/valo/01,524.99,yes,locked 2006.229.12:18:11.51/valo/02,534.99,yes,locked 2006.229.12:18:11.51/valo/03,564.99,yes,locked 2006.229.12:18:11.51/valo/04,624.99,yes,locked 2006.229.12:18:11.51/valo/05,734.99,yes,locked 2006.229.12:18:11.51/valo/06,814.99,yes,locked 2006.229.12:18:11.51/valo/07,864.99,yes,locked 2006.229.12:18:11.51/valo/08,884.99,yes,locked 2006.229.12:18:12.60/vb/01,04,usb,yes,31,29 2006.229.12:18:12.60/vb/02,04,usb,yes,33,33 2006.229.12:18:12.60/vb/03,04,usb,yes,30,33 2006.229.12:18:12.60/vb/04,04,usb,yes,35,33 2006.229.12:18:12.60/vb/05,04,usb,yes,27,29 2006.229.12:18:12.60/vb/06,04,usb,yes,32,28 2006.229.12:18:12.60/vb/07,04,usb,yes,31,31 2006.229.12:18:12.60/vb/08,04,usb,yes,29,32 2006.229.12:18:12.83/vblo/01,629.99,yes,locked 2006.229.12:18:12.83/vblo/02,634.99,yes,locked 2006.229.12:18:12.83/vblo/03,649.99,yes,locked 2006.229.12:18:12.83/vblo/04,679.99,yes,locked 2006.229.12:18:12.83/vblo/05,709.99,yes,locked 2006.229.12:18:12.83/vblo/06,719.99,yes,locked 2006.229.12:18:12.83/vblo/07,734.99,yes,locked 2006.229.12:18:12.83/vblo/08,744.99,yes,locked 2006.229.12:18:12.98/vabw/8 2006.229.12:18:13.13/vbbw/8 2006.229.12:18:13.22/xfe/off,on,12.0 2006.229.12:18:13.60/ifatt/23,28,28,28 2006.229.12:18:14.08/fmout-gps/S +4.30E-07 2006.229.12:18:14.11:!2006.229.12:19:20 2006.229.12:19:20.00:data_valid=off 2006.229.12:19:20.00:"et 2006.229.12:19:20.00:!+3s 2006.229.12:19:23.01:"tape 2006.229.12:19:23.01:postob 2006.229.12:19:23.09/cable/+6.4073E-03 2006.229.12:19:23.09/wx/27.73,1002.4,100 2006.229.12:19:24.08/fmout-gps/S +4.33E-07 2006.229.12:19:24.08:scan_name=229-1220,jd0608,90 2006.229.12:19:24.08:source=2128-123,213135.26,-120704.8,2000.0,cw 2006.229.12:19:25.13#flagr#flagr/antenna,new-source 2006.229.12:19:25.13:checkk5 2006.229.12:19:25.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:19:25.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:19:26.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:19:26.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:19:27.10/chk_obsdata//k5ts1/T2291218??a.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.12:19:27.50/chk_obsdata//k5ts2/T2291218??b.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.12:19:27.90/chk_obsdata//k5ts3/T2291218??c.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.12:19:28.31/chk_obsdata//k5ts4/T2291218??d.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.12:19:29.03/k5log//k5ts1_log_newline 2006.229.12:19:29.73/k5log//k5ts2_log_newline 2006.229.12:19:30.44/k5log//k5ts3_log_newline 2006.229.12:19:31.15/k5log//k5ts4_log_newline 2006.229.12:19:31.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:19:31.18:setupk4=1 2006.229.12:19:31.18$setupk4/echo=on 2006.229.12:19:31.18$setupk4/pcalon 2006.229.12:19:31.18$pcalon/"no phase cal control is implemented here 2006.229.12:19:31.18$setupk4/"tpicd=stop 2006.229.12:19:31.18$setupk4/"rec=synch_on 2006.229.12:19:31.18$setupk4/"rec_mode=128 2006.229.12:19:31.18$setupk4/!* 2006.229.12:19:31.18$setupk4/recpk4 2006.229.12:19:31.18$recpk4/recpatch= 2006.229.12:19:31.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:19:31.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:19:31.18$setupk4/vck44 2006.229.12:19:31.18$vck44/valo=1,524.99 2006.229.12:19:31.18#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.12:19:31.18#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.12:19:31.18#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:31.18#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:31.18#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:31.18#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:31.18#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:19:31.18#ibcon#first serial, iclass 6, count 0 2006.229.12:19:31.18#ibcon#enter sib2, iclass 6, count 0 2006.229.12:19:31.18#ibcon#flushed, iclass 6, count 0 2006.229.12:19:31.18#ibcon#about to write, iclass 6, count 0 2006.229.12:19:31.18#ibcon#wrote, iclass 6, count 0 2006.229.12:19:31.18#ibcon#about to read 3, iclass 6, count 0 2006.229.12:19:31.20#ibcon#read 3, iclass 6, count 0 2006.229.12:19:31.20#ibcon#about to read 4, iclass 6, count 0 2006.229.12:19:31.20#ibcon#read 4, iclass 6, count 0 2006.229.12:19:31.20#ibcon#about to read 5, iclass 6, count 0 2006.229.12:19:31.20#ibcon#read 5, iclass 6, count 0 2006.229.12:19:31.20#ibcon#about to read 6, iclass 6, count 0 2006.229.12:19:31.20#ibcon#read 6, iclass 6, count 0 2006.229.12:19:31.20#ibcon#end of sib2, iclass 6, count 0 2006.229.12:19:31.20#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:19:31.20#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:19:31.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:19:31.20#ibcon#*before write, iclass 6, count 0 2006.229.12:19:31.20#ibcon#enter sib2, iclass 6, count 0 2006.229.12:19:31.20#ibcon#flushed, iclass 6, count 0 2006.229.12:19:31.20#ibcon#about to write, iclass 6, count 0 2006.229.12:19:31.20#ibcon#wrote, iclass 6, count 0 2006.229.12:19:31.20#ibcon#about to read 3, iclass 6, count 0 2006.229.12:19:31.25#ibcon#read 3, iclass 6, count 0 2006.229.12:19:31.25#ibcon#about to read 4, iclass 6, count 0 2006.229.12:19:31.25#ibcon#read 4, iclass 6, count 0 2006.229.12:19:31.25#ibcon#about to read 5, iclass 6, count 0 2006.229.12:19:31.25#ibcon#read 5, iclass 6, count 0 2006.229.12:19:31.25#ibcon#about to read 6, iclass 6, count 0 2006.229.12:19:31.25#ibcon#read 6, iclass 6, count 0 2006.229.12:19:31.25#ibcon#end of sib2, iclass 6, count 0 2006.229.12:19:31.25#ibcon#*after write, iclass 6, count 0 2006.229.12:19:31.25#ibcon#*before return 0, iclass 6, count 0 2006.229.12:19:31.25#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:31.25#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:31.25#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:19:31.25#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:19:31.25$vck44/va=1,8 2006.229.12:19:31.25#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.12:19:31.25#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.12:19:31.25#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:31.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:31.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:31.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:31.25#ibcon#enter wrdev, iclass 10, count 2 2006.229.12:19:31.25#ibcon#first serial, iclass 10, count 2 2006.229.12:19:31.25#ibcon#enter sib2, iclass 10, count 2 2006.229.12:19:31.25#ibcon#flushed, iclass 10, count 2 2006.229.12:19:31.25#ibcon#about to write, iclass 10, count 2 2006.229.12:19:31.25#ibcon#wrote, iclass 10, count 2 2006.229.12:19:31.25#ibcon#about to read 3, iclass 10, count 2 2006.229.12:19:31.27#ibcon#read 3, iclass 10, count 2 2006.229.12:19:31.27#ibcon#about to read 4, iclass 10, count 2 2006.229.12:19:31.27#ibcon#read 4, iclass 10, count 2 2006.229.12:19:31.27#ibcon#about to read 5, iclass 10, count 2 2006.229.12:19:31.27#ibcon#read 5, iclass 10, count 2 2006.229.12:19:31.27#ibcon#about to read 6, iclass 10, count 2 2006.229.12:19:31.27#ibcon#read 6, iclass 10, count 2 2006.229.12:19:31.27#ibcon#end of sib2, iclass 10, count 2 2006.229.12:19:31.27#ibcon#*mode == 0, iclass 10, count 2 2006.229.12:19:31.27#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.12:19:31.27#ibcon#[25=AT01-08\r\n] 2006.229.12:19:31.27#ibcon#*before write, iclass 10, count 2 2006.229.12:19:31.27#ibcon#enter sib2, iclass 10, count 2 2006.229.12:19:31.27#ibcon#flushed, iclass 10, count 2 2006.229.12:19:31.27#ibcon#about to write, iclass 10, count 2 2006.229.12:19:31.27#ibcon#wrote, iclass 10, count 2 2006.229.12:19:31.27#ibcon#about to read 3, iclass 10, count 2 2006.229.12:19:31.30#ibcon#read 3, iclass 10, count 2 2006.229.12:19:31.30#ibcon#about to read 4, iclass 10, count 2 2006.229.12:19:31.30#ibcon#read 4, iclass 10, count 2 2006.229.12:19:31.30#ibcon#about to read 5, iclass 10, count 2 2006.229.12:19:31.30#ibcon#read 5, iclass 10, count 2 2006.229.12:19:31.30#ibcon#about to read 6, iclass 10, count 2 2006.229.12:19:31.30#ibcon#read 6, iclass 10, count 2 2006.229.12:19:31.30#ibcon#end of sib2, iclass 10, count 2 2006.229.12:19:31.30#ibcon#*after write, iclass 10, count 2 2006.229.12:19:31.30#ibcon#*before return 0, iclass 10, count 2 2006.229.12:19:31.30#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:31.30#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:31.30#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.12:19:31.30#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:31.30#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:31.42#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:31.42#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:31.42#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:19:31.42#ibcon#first serial, iclass 10, count 0 2006.229.12:19:31.42#ibcon#enter sib2, iclass 10, count 0 2006.229.12:19:31.42#ibcon#flushed, iclass 10, count 0 2006.229.12:19:31.42#ibcon#about to write, iclass 10, count 0 2006.229.12:19:31.42#ibcon#wrote, iclass 10, count 0 2006.229.12:19:31.42#ibcon#about to read 3, iclass 10, count 0 2006.229.12:19:31.44#ibcon#read 3, iclass 10, count 0 2006.229.12:19:31.44#ibcon#about to read 4, iclass 10, count 0 2006.229.12:19:31.44#ibcon#read 4, iclass 10, count 0 2006.229.12:19:31.44#ibcon#about to read 5, iclass 10, count 0 2006.229.12:19:31.44#ibcon#read 5, iclass 10, count 0 2006.229.12:19:31.44#ibcon#about to read 6, iclass 10, count 0 2006.229.12:19:31.44#ibcon#read 6, iclass 10, count 0 2006.229.12:19:31.44#ibcon#end of sib2, iclass 10, count 0 2006.229.12:19:31.44#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:19:31.44#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:19:31.44#ibcon#[25=USB\r\n] 2006.229.12:19:31.44#ibcon#*before write, iclass 10, count 0 2006.229.12:19:31.44#ibcon#enter sib2, iclass 10, count 0 2006.229.12:19:31.44#ibcon#flushed, iclass 10, count 0 2006.229.12:19:31.44#ibcon#about to write, iclass 10, count 0 2006.229.12:19:31.44#ibcon#wrote, iclass 10, count 0 2006.229.12:19:31.44#ibcon#about to read 3, iclass 10, count 0 2006.229.12:19:31.47#ibcon#read 3, iclass 10, count 0 2006.229.12:19:31.47#ibcon#about to read 4, iclass 10, count 0 2006.229.12:19:31.47#ibcon#read 4, iclass 10, count 0 2006.229.12:19:31.47#ibcon#about to read 5, iclass 10, count 0 2006.229.12:19:31.47#ibcon#read 5, iclass 10, count 0 2006.229.12:19:31.47#ibcon#about to read 6, iclass 10, count 0 2006.229.12:19:31.47#ibcon#read 6, iclass 10, count 0 2006.229.12:19:31.47#ibcon#end of sib2, iclass 10, count 0 2006.229.12:19:31.47#ibcon#*after write, iclass 10, count 0 2006.229.12:19:31.47#ibcon#*before return 0, iclass 10, count 0 2006.229.12:19:31.47#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:31.47#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:31.47#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:19:31.47#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:19:31.47$vck44/valo=2,534.99 2006.229.12:19:31.47#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:19:31.47#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:19:31.47#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:31.47#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:31.47#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:31.47#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:31.47#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:19:31.47#ibcon#first serial, iclass 12, count 0 2006.229.12:19:31.47#ibcon#enter sib2, iclass 12, count 0 2006.229.12:19:31.47#ibcon#flushed, iclass 12, count 0 2006.229.12:19:31.47#ibcon#about to write, iclass 12, count 0 2006.229.12:19:31.47#ibcon#wrote, iclass 12, count 0 2006.229.12:19:31.47#ibcon#about to read 3, iclass 12, count 0 2006.229.12:19:31.49#ibcon#read 3, iclass 12, count 0 2006.229.12:19:31.49#ibcon#about to read 4, iclass 12, count 0 2006.229.12:19:31.49#ibcon#read 4, iclass 12, count 0 2006.229.12:19:31.49#ibcon#about to read 5, iclass 12, count 0 2006.229.12:19:31.49#ibcon#read 5, iclass 12, count 0 2006.229.12:19:31.49#ibcon#about to read 6, iclass 12, count 0 2006.229.12:19:31.49#ibcon#read 6, iclass 12, count 0 2006.229.12:19:31.49#ibcon#end of sib2, iclass 12, count 0 2006.229.12:19:31.49#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:19:31.49#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:19:31.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:19:31.49#ibcon#*before write, iclass 12, count 0 2006.229.12:19:31.49#ibcon#enter sib2, iclass 12, count 0 2006.229.12:19:31.49#ibcon#flushed, iclass 12, count 0 2006.229.12:19:31.49#ibcon#about to write, iclass 12, count 0 2006.229.12:19:31.49#ibcon#wrote, iclass 12, count 0 2006.229.12:19:31.49#ibcon#about to read 3, iclass 12, count 0 2006.229.12:19:31.53#ibcon#read 3, iclass 12, count 0 2006.229.12:19:31.53#ibcon#about to read 4, iclass 12, count 0 2006.229.12:19:31.53#ibcon#read 4, iclass 12, count 0 2006.229.12:19:31.53#ibcon#about to read 5, iclass 12, count 0 2006.229.12:19:31.53#ibcon#read 5, iclass 12, count 0 2006.229.12:19:31.53#ibcon#about to read 6, iclass 12, count 0 2006.229.12:19:31.53#ibcon#read 6, iclass 12, count 0 2006.229.12:19:31.53#ibcon#end of sib2, iclass 12, count 0 2006.229.12:19:31.53#ibcon#*after write, iclass 12, count 0 2006.229.12:19:31.53#ibcon#*before return 0, iclass 12, count 0 2006.229.12:19:31.53#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:31.53#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:31.53#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:19:31.53#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:19:31.53$vck44/va=2,7 2006.229.12:19:31.53#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.12:19:31.53#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.12:19:31.53#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:31.53#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:31.59#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:31.59#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:31.59#ibcon#enter wrdev, iclass 14, count 2 2006.229.12:19:31.59#ibcon#first serial, iclass 14, count 2 2006.229.12:19:31.59#ibcon#enter sib2, iclass 14, count 2 2006.229.12:19:31.59#ibcon#flushed, iclass 14, count 2 2006.229.12:19:31.59#ibcon#about to write, iclass 14, count 2 2006.229.12:19:31.59#ibcon#wrote, iclass 14, count 2 2006.229.12:19:31.59#ibcon#about to read 3, iclass 14, count 2 2006.229.12:19:31.61#ibcon#read 3, iclass 14, count 2 2006.229.12:19:31.61#ibcon#about to read 4, iclass 14, count 2 2006.229.12:19:31.61#ibcon#read 4, iclass 14, count 2 2006.229.12:19:31.61#ibcon#about to read 5, iclass 14, count 2 2006.229.12:19:31.61#ibcon#read 5, iclass 14, count 2 2006.229.12:19:31.61#ibcon#about to read 6, iclass 14, count 2 2006.229.12:19:31.61#ibcon#read 6, iclass 14, count 2 2006.229.12:19:31.61#ibcon#end of sib2, iclass 14, count 2 2006.229.12:19:31.61#ibcon#*mode == 0, iclass 14, count 2 2006.229.12:19:31.61#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.12:19:31.61#ibcon#[25=AT02-07\r\n] 2006.229.12:19:31.61#ibcon#*before write, iclass 14, count 2 2006.229.12:19:31.61#ibcon#enter sib2, iclass 14, count 2 2006.229.12:19:31.61#ibcon#flushed, iclass 14, count 2 2006.229.12:19:31.61#ibcon#about to write, iclass 14, count 2 2006.229.12:19:31.61#ibcon#wrote, iclass 14, count 2 2006.229.12:19:31.61#ibcon#about to read 3, iclass 14, count 2 2006.229.12:19:31.64#ibcon#read 3, iclass 14, count 2 2006.229.12:19:31.64#ibcon#about to read 4, iclass 14, count 2 2006.229.12:19:31.64#ibcon#read 4, iclass 14, count 2 2006.229.12:19:31.64#ibcon#about to read 5, iclass 14, count 2 2006.229.12:19:31.64#ibcon#read 5, iclass 14, count 2 2006.229.12:19:31.64#ibcon#about to read 6, iclass 14, count 2 2006.229.12:19:31.64#ibcon#read 6, iclass 14, count 2 2006.229.12:19:31.64#ibcon#end of sib2, iclass 14, count 2 2006.229.12:19:31.64#ibcon#*after write, iclass 14, count 2 2006.229.12:19:31.64#ibcon#*before return 0, iclass 14, count 2 2006.229.12:19:31.64#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:31.64#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:31.64#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.12:19:31.64#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:31.64#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:31.76#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:31.76#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:31.76#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:19:31.76#ibcon#first serial, iclass 14, count 0 2006.229.12:19:31.76#ibcon#enter sib2, iclass 14, count 0 2006.229.12:19:31.76#ibcon#flushed, iclass 14, count 0 2006.229.12:19:31.76#ibcon#about to write, iclass 14, count 0 2006.229.12:19:31.76#ibcon#wrote, iclass 14, count 0 2006.229.12:19:31.76#ibcon#about to read 3, iclass 14, count 0 2006.229.12:19:31.78#ibcon#read 3, iclass 14, count 0 2006.229.12:19:31.78#ibcon#about to read 4, iclass 14, count 0 2006.229.12:19:31.78#ibcon#read 4, iclass 14, count 0 2006.229.12:19:31.78#ibcon#about to read 5, iclass 14, count 0 2006.229.12:19:31.78#ibcon#read 5, iclass 14, count 0 2006.229.12:19:31.78#ibcon#about to read 6, iclass 14, count 0 2006.229.12:19:31.78#ibcon#read 6, iclass 14, count 0 2006.229.12:19:31.78#ibcon#end of sib2, iclass 14, count 0 2006.229.12:19:31.78#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:19:31.78#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:19:31.78#ibcon#[25=USB\r\n] 2006.229.12:19:31.78#ibcon#*before write, iclass 14, count 0 2006.229.12:19:31.78#ibcon#enter sib2, iclass 14, count 0 2006.229.12:19:31.78#ibcon#flushed, iclass 14, count 0 2006.229.12:19:31.78#ibcon#about to write, iclass 14, count 0 2006.229.12:19:31.78#ibcon#wrote, iclass 14, count 0 2006.229.12:19:31.78#ibcon#about to read 3, iclass 14, count 0 2006.229.12:19:31.81#ibcon#read 3, iclass 14, count 0 2006.229.12:19:31.81#ibcon#about to read 4, iclass 14, count 0 2006.229.12:19:31.81#ibcon#read 4, iclass 14, count 0 2006.229.12:19:31.81#ibcon#about to read 5, iclass 14, count 0 2006.229.12:19:31.81#ibcon#read 5, iclass 14, count 0 2006.229.12:19:31.81#ibcon#about to read 6, iclass 14, count 0 2006.229.12:19:31.81#ibcon#read 6, iclass 14, count 0 2006.229.12:19:31.81#ibcon#end of sib2, iclass 14, count 0 2006.229.12:19:31.81#ibcon#*after write, iclass 14, count 0 2006.229.12:19:31.81#ibcon#*before return 0, iclass 14, count 0 2006.229.12:19:31.81#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:31.81#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:31.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:19:31.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:19:31.81$vck44/valo=3,564.99 2006.229.12:19:31.81#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.12:19:31.81#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.12:19:31.81#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:31.81#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:31.81#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:31.81#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:31.81#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:19:31.81#ibcon#first serial, iclass 16, count 0 2006.229.12:19:31.81#ibcon#enter sib2, iclass 16, count 0 2006.229.12:19:31.81#ibcon#flushed, iclass 16, count 0 2006.229.12:19:31.81#ibcon#about to write, iclass 16, count 0 2006.229.12:19:31.81#ibcon#wrote, iclass 16, count 0 2006.229.12:19:31.81#ibcon#about to read 3, iclass 16, count 0 2006.229.12:19:31.83#ibcon#read 3, iclass 16, count 0 2006.229.12:19:31.83#ibcon#about to read 4, iclass 16, count 0 2006.229.12:19:31.83#ibcon#read 4, iclass 16, count 0 2006.229.12:19:31.83#ibcon#about to read 5, iclass 16, count 0 2006.229.12:19:31.83#ibcon#read 5, iclass 16, count 0 2006.229.12:19:31.83#ibcon#about to read 6, iclass 16, count 0 2006.229.12:19:31.83#ibcon#read 6, iclass 16, count 0 2006.229.12:19:31.83#ibcon#end of sib2, iclass 16, count 0 2006.229.12:19:31.83#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:19:31.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:19:31.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:19:31.83#ibcon#*before write, iclass 16, count 0 2006.229.12:19:31.83#ibcon#enter sib2, iclass 16, count 0 2006.229.12:19:31.83#ibcon#flushed, iclass 16, count 0 2006.229.12:19:31.83#ibcon#about to write, iclass 16, count 0 2006.229.12:19:31.83#ibcon#wrote, iclass 16, count 0 2006.229.12:19:31.83#ibcon#about to read 3, iclass 16, count 0 2006.229.12:19:31.87#ibcon#read 3, iclass 16, count 0 2006.229.12:19:31.87#ibcon#about to read 4, iclass 16, count 0 2006.229.12:19:31.87#ibcon#read 4, iclass 16, count 0 2006.229.12:19:31.87#ibcon#about to read 5, iclass 16, count 0 2006.229.12:19:31.87#ibcon#read 5, iclass 16, count 0 2006.229.12:19:31.87#ibcon#about to read 6, iclass 16, count 0 2006.229.12:19:31.87#ibcon#read 6, iclass 16, count 0 2006.229.12:19:31.87#ibcon#end of sib2, iclass 16, count 0 2006.229.12:19:31.87#ibcon#*after write, iclass 16, count 0 2006.229.12:19:31.87#ibcon#*before return 0, iclass 16, count 0 2006.229.12:19:31.87#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:31.87#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:31.87#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:19:31.87#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:19:31.87$vck44/va=3,6 2006.229.12:19:31.87#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.12:19:31.87#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.12:19:31.87#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:31.87#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:31.93#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:31.93#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:31.93#ibcon#enter wrdev, iclass 18, count 2 2006.229.12:19:31.93#ibcon#first serial, iclass 18, count 2 2006.229.12:19:31.93#ibcon#enter sib2, iclass 18, count 2 2006.229.12:19:31.93#ibcon#flushed, iclass 18, count 2 2006.229.12:19:31.93#ibcon#about to write, iclass 18, count 2 2006.229.12:19:31.93#ibcon#wrote, iclass 18, count 2 2006.229.12:19:31.93#ibcon#about to read 3, iclass 18, count 2 2006.229.12:19:31.95#ibcon#read 3, iclass 18, count 2 2006.229.12:19:31.95#ibcon#about to read 4, iclass 18, count 2 2006.229.12:19:31.95#ibcon#read 4, iclass 18, count 2 2006.229.12:19:31.95#ibcon#about to read 5, iclass 18, count 2 2006.229.12:19:31.95#ibcon#read 5, iclass 18, count 2 2006.229.12:19:31.95#ibcon#about to read 6, iclass 18, count 2 2006.229.12:19:31.95#ibcon#read 6, iclass 18, count 2 2006.229.12:19:31.95#ibcon#end of sib2, iclass 18, count 2 2006.229.12:19:31.95#ibcon#*mode == 0, iclass 18, count 2 2006.229.12:19:31.95#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.12:19:31.95#ibcon#[25=AT03-06\r\n] 2006.229.12:19:31.95#ibcon#*before write, iclass 18, count 2 2006.229.12:19:31.95#ibcon#enter sib2, iclass 18, count 2 2006.229.12:19:31.95#ibcon#flushed, iclass 18, count 2 2006.229.12:19:31.95#ibcon#about to write, iclass 18, count 2 2006.229.12:19:31.95#ibcon#wrote, iclass 18, count 2 2006.229.12:19:31.95#ibcon#about to read 3, iclass 18, count 2 2006.229.12:19:31.98#ibcon#read 3, iclass 18, count 2 2006.229.12:19:31.98#ibcon#about to read 4, iclass 18, count 2 2006.229.12:19:31.98#ibcon#read 4, iclass 18, count 2 2006.229.12:19:31.98#ibcon#about to read 5, iclass 18, count 2 2006.229.12:19:31.98#ibcon#read 5, iclass 18, count 2 2006.229.12:19:31.98#ibcon#about to read 6, iclass 18, count 2 2006.229.12:19:31.98#ibcon#read 6, iclass 18, count 2 2006.229.12:19:31.98#ibcon#end of sib2, iclass 18, count 2 2006.229.12:19:31.98#ibcon#*after write, iclass 18, count 2 2006.229.12:19:31.98#ibcon#*before return 0, iclass 18, count 2 2006.229.12:19:31.98#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:31.98#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:31.98#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.12:19:31.98#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:31.98#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:32.10#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:32.10#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:32.10#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:19:32.10#ibcon#first serial, iclass 18, count 0 2006.229.12:19:32.10#ibcon#enter sib2, iclass 18, count 0 2006.229.12:19:32.10#ibcon#flushed, iclass 18, count 0 2006.229.12:19:32.10#ibcon#about to write, iclass 18, count 0 2006.229.12:19:32.10#ibcon#wrote, iclass 18, count 0 2006.229.12:19:32.10#ibcon#about to read 3, iclass 18, count 0 2006.229.12:19:32.12#ibcon#read 3, iclass 18, count 0 2006.229.12:19:32.12#ibcon#about to read 4, iclass 18, count 0 2006.229.12:19:32.12#ibcon#read 4, iclass 18, count 0 2006.229.12:19:32.12#ibcon#about to read 5, iclass 18, count 0 2006.229.12:19:32.12#ibcon#read 5, iclass 18, count 0 2006.229.12:19:32.12#ibcon#about to read 6, iclass 18, count 0 2006.229.12:19:32.12#ibcon#read 6, iclass 18, count 0 2006.229.12:19:32.12#ibcon#end of sib2, iclass 18, count 0 2006.229.12:19:32.12#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:19:32.12#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:19:32.12#ibcon#[25=USB\r\n] 2006.229.12:19:32.12#ibcon#*before write, iclass 18, count 0 2006.229.12:19:32.12#ibcon#enter sib2, iclass 18, count 0 2006.229.12:19:32.12#ibcon#flushed, iclass 18, count 0 2006.229.12:19:32.12#ibcon#about to write, iclass 18, count 0 2006.229.12:19:32.12#ibcon#wrote, iclass 18, count 0 2006.229.12:19:32.12#ibcon#about to read 3, iclass 18, count 0 2006.229.12:19:32.15#ibcon#read 3, iclass 18, count 0 2006.229.12:19:32.15#ibcon#about to read 4, iclass 18, count 0 2006.229.12:19:32.15#ibcon#read 4, iclass 18, count 0 2006.229.12:19:32.15#ibcon#about to read 5, iclass 18, count 0 2006.229.12:19:32.15#ibcon#read 5, iclass 18, count 0 2006.229.12:19:32.15#ibcon#about to read 6, iclass 18, count 0 2006.229.12:19:32.15#ibcon#read 6, iclass 18, count 0 2006.229.12:19:32.15#ibcon#end of sib2, iclass 18, count 0 2006.229.12:19:32.15#ibcon#*after write, iclass 18, count 0 2006.229.12:19:32.15#ibcon#*before return 0, iclass 18, count 0 2006.229.12:19:32.15#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:32.15#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:32.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:19:32.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:19:32.15$vck44/valo=4,624.99 2006.229.12:19:32.15#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.12:19:32.15#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.12:19:32.15#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:32.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:32.15#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:32.15#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:32.15#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:19:32.15#ibcon#first serial, iclass 20, count 0 2006.229.12:19:32.15#ibcon#enter sib2, iclass 20, count 0 2006.229.12:19:32.15#ibcon#flushed, iclass 20, count 0 2006.229.12:19:32.15#ibcon#about to write, iclass 20, count 0 2006.229.12:19:32.15#ibcon#wrote, iclass 20, count 0 2006.229.12:19:32.15#ibcon#about to read 3, iclass 20, count 0 2006.229.12:19:32.17#ibcon#read 3, iclass 20, count 0 2006.229.12:19:32.17#ibcon#about to read 4, iclass 20, count 0 2006.229.12:19:32.17#ibcon#read 4, iclass 20, count 0 2006.229.12:19:32.17#ibcon#about to read 5, iclass 20, count 0 2006.229.12:19:32.17#ibcon#read 5, iclass 20, count 0 2006.229.12:19:32.17#ibcon#about to read 6, iclass 20, count 0 2006.229.12:19:32.17#ibcon#read 6, iclass 20, count 0 2006.229.12:19:32.17#ibcon#end of sib2, iclass 20, count 0 2006.229.12:19:32.17#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:19:32.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:19:32.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:19:32.17#ibcon#*before write, iclass 20, count 0 2006.229.12:19:32.17#ibcon#enter sib2, iclass 20, count 0 2006.229.12:19:32.17#ibcon#flushed, iclass 20, count 0 2006.229.12:19:32.17#ibcon#about to write, iclass 20, count 0 2006.229.12:19:32.17#ibcon#wrote, iclass 20, count 0 2006.229.12:19:32.17#ibcon#about to read 3, iclass 20, count 0 2006.229.12:19:32.21#ibcon#read 3, iclass 20, count 0 2006.229.12:19:32.21#ibcon#about to read 4, iclass 20, count 0 2006.229.12:19:32.21#ibcon#read 4, iclass 20, count 0 2006.229.12:19:32.21#ibcon#about to read 5, iclass 20, count 0 2006.229.12:19:32.21#ibcon#read 5, iclass 20, count 0 2006.229.12:19:32.21#ibcon#about to read 6, iclass 20, count 0 2006.229.12:19:32.21#ibcon#read 6, iclass 20, count 0 2006.229.12:19:32.21#ibcon#end of sib2, iclass 20, count 0 2006.229.12:19:32.21#ibcon#*after write, iclass 20, count 0 2006.229.12:19:32.21#ibcon#*before return 0, iclass 20, count 0 2006.229.12:19:32.21#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:32.21#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:32.21#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:19:32.21#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:19:32.21$vck44/va=4,7 2006.229.12:19:32.21#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.12:19:32.21#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.12:19:32.21#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:32.21#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:32.27#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:32.27#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:32.27#ibcon#enter wrdev, iclass 22, count 2 2006.229.12:19:32.27#ibcon#first serial, iclass 22, count 2 2006.229.12:19:32.27#ibcon#enter sib2, iclass 22, count 2 2006.229.12:19:32.27#ibcon#flushed, iclass 22, count 2 2006.229.12:19:32.27#ibcon#about to write, iclass 22, count 2 2006.229.12:19:32.27#ibcon#wrote, iclass 22, count 2 2006.229.12:19:32.27#ibcon#about to read 3, iclass 22, count 2 2006.229.12:19:32.29#ibcon#read 3, iclass 22, count 2 2006.229.12:19:32.29#ibcon#about to read 4, iclass 22, count 2 2006.229.12:19:32.29#ibcon#read 4, iclass 22, count 2 2006.229.12:19:32.29#ibcon#about to read 5, iclass 22, count 2 2006.229.12:19:32.29#ibcon#read 5, iclass 22, count 2 2006.229.12:19:32.29#ibcon#about to read 6, iclass 22, count 2 2006.229.12:19:32.29#ibcon#read 6, iclass 22, count 2 2006.229.12:19:32.29#ibcon#end of sib2, iclass 22, count 2 2006.229.12:19:32.29#ibcon#*mode == 0, iclass 22, count 2 2006.229.12:19:32.29#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.12:19:32.29#ibcon#[25=AT04-07\r\n] 2006.229.12:19:32.29#ibcon#*before write, iclass 22, count 2 2006.229.12:19:32.29#ibcon#enter sib2, iclass 22, count 2 2006.229.12:19:32.29#ibcon#flushed, iclass 22, count 2 2006.229.12:19:32.29#ibcon#about to write, iclass 22, count 2 2006.229.12:19:32.29#ibcon#wrote, iclass 22, count 2 2006.229.12:19:32.29#ibcon#about to read 3, iclass 22, count 2 2006.229.12:19:32.32#ibcon#read 3, iclass 22, count 2 2006.229.12:19:32.32#ibcon#about to read 4, iclass 22, count 2 2006.229.12:19:32.32#ibcon#read 4, iclass 22, count 2 2006.229.12:19:32.32#ibcon#about to read 5, iclass 22, count 2 2006.229.12:19:32.32#ibcon#read 5, iclass 22, count 2 2006.229.12:19:32.32#ibcon#about to read 6, iclass 22, count 2 2006.229.12:19:32.32#ibcon#read 6, iclass 22, count 2 2006.229.12:19:32.32#ibcon#end of sib2, iclass 22, count 2 2006.229.12:19:32.32#ibcon#*after write, iclass 22, count 2 2006.229.12:19:32.32#ibcon#*before return 0, iclass 22, count 2 2006.229.12:19:32.32#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:32.32#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:32.32#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.12:19:32.32#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:32.32#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:32.44#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:32.44#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:32.44#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:19:32.44#ibcon#first serial, iclass 22, count 0 2006.229.12:19:32.44#ibcon#enter sib2, iclass 22, count 0 2006.229.12:19:32.44#ibcon#flushed, iclass 22, count 0 2006.229.12:19:32.44#ibcon#about to write, iclass 22, count 0 2006.229.12:19:32.44#ibcon#wrote, iclass 22, count 0 2006.229.12:19:32.44#ibcon#about to read 3, iclass 22, count 0 2006.229.12:19:32.46#ibcon#read 3, iclass 22, count 0 2006.229.12:19:32.46#ibcon#about to read 4, iclass 22, count 0 2006.229.12:19:32.46#ibcon#read 4, iclass 22, count 0 2006.229.12:19:32.46#ibcon#about to read 5, iclass 22, count 0 2006.229.12:19:32.46#ibcon#read 5, iclass 22, count 0 2006.229.12:19:32.46#ibcon#about to read 6, iclass 22, count 0 2006.229.12:19:32.46#ibcon#read 6, iclass 22, count 0 2006.229.12:19:32.46#ibcon#end of sib2, iclass 22, count 0 2006.229.12:19:32.46#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:19:32.46#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:19:32.46#ibcon#[25=USB\r\n] 2006.229.12:19:32.46#ibcon#*before write, iclass 22, count 0 2006.229.12:19:32.46#ibcon#enter sib2, iclass 22, count 0 2006.229.12:19:32.46#ibcon#flushed, iclass 22, count 0 2006.229.12:19:32.46#ibcon#about to write, iclass 22, count 0 2006.229.12:19:32.46#ibcon#wrote, iclass 22, count 0 2006.229.12:19:32.46#ibcon#about to read 3, iclass 22, count 0 2006.229.12:19:32.49#ibcon#read 3, iclass 22, count 0 2006.229.12:19:32.49#ibcon#about to read 4, iclass 22, count 0 2006.229.12:19:32.49#ibcon#read 4, iclass 22, count 0 2006.229.12:19:32.49#ibcon#about to read 5, iclass 22, count 0 2006.229.12:19:32.49#ibcon#read 5, iclass 22, count 0 2006.229.12:19:32.49#ibcon#about to read 6, iclass 22, count 0 2006.229.12:19:32.49#ibcon#read 6, iclass 22, count 0 2006.229.12:19:32.49#ibcon#end of sib2, iclass 22, count 0 2006.229.12:19:32.49#ibcon#*after write, iclass 22, count 0 2006.229.12:19:32.49#ibcon#*before return 0, iclass 22, count 0 2006.229.12:19:32.49#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:32.49#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:32.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:19:32.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:19:32.49$vck44/valo=5,734.99 2006.229.12:19:32.49#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:19:32.49#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:19:32.49#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:32.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:32.49#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:32.49#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:32.49#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:19:32.49#ibcon#first serial, iclass 24, count 0 2006.229.12:19:32.49#ibcon#enter sib2, iclass 24, count 0 2006.229.12:19:32.49#ibcon#flushed, iclass 24, count 0 2006.229.12:19:32.49#ibcon#about to write, iclass 24, count 0 2006.229.12:19:32.49#ibcon#wrote, iclass 24, count 0 2006.229.12:19:32.49#ibcon#about to read 3, iclass 24, count 0 2006.229.12:19:32.51#ibcon#read 3, iclass 24, count 0 2006.229.12:19:32.51#ibcon#about to read 4, iclass 24, count 0 2006.229.12:19:32.51#ibcon#read 4, iclass 24, count 0 2006.229.12:19:32.51#ibcon#about to read 5, iclass 24, count 0 2006.229.12:19:32.51#ibcon#read 5, iclass 24, count 0 2006.229.12:19:32.51#ibcon#about to read 6, iclass 24, count 0 2006.229.12:19:32.51#ibcon#read 6, iclass 24, count 0 2006.229.12:19:32.51#ibcon#end of sib2, iclass 24, count 0 2006.229.12:19:32.51#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:19:32.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:19:32.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:19:32.51#ibcon#*before write, iclass 24, count 0 2006.229.12:19:32.51#ibcon#enter sib2, iclass 24, count 0 2006.229.12:19:32.51#ibcon#flushed, iclass 24, count 0 2006.229.12:19:32.51#ibcon#about to write, iclass 24, count 0 2006.229.12:19:32.51#ibcon#wrote, iclass 24, count 0 2006.229.12:19:32.51#ibcon#about to read 3, iclass 24, count 0 2006.229.12:19:32.55#ibcon#read 3, iclass 24, count 0 2006.229.12:19:32.55#ibcon#about to read 4, iclass 24, count 0 2006.229.12:19:32.55#ibcon#read 4, iclass 24, count 0 2006.229.12:19:32.55#ibcon#about to read 5, iclass 24, count 0 2006.229.12:19:32.55#ibcon#read 5, iclass 24, count 0 2006.229.12:19:32.55#ibcon#about to read 6, iclass 24, count 0 2006.229.12:19:32.55#ibcon#read 6, iclass 24, count 0 2006.229.12:19:32.55#ibcon#end of sib2, iclass 24, count 0 2006.229.12:19:32.55#ibcon#*after write, iclass 24, count 0 2006.229.12:19:32.55#ibcon#*before return 0, iclass 24, count 0 2006.229.12:19:32.55#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:32.55#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:32.55#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:19:32.55#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:19:32.55$vck44/va=5,4 2006.229.12:19:32.55#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:19:32.55#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:19:32.55#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:32.55#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:32.61#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:32.61#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:32.61#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:19:32.61#ibcon#first serial, iclass 26, count 2 2006.229.12:19:32.61#ibcon#enter sib2, iclass 26, count 2 2006.229.12:19:32.61#ibcon#flushed, iclass 26, count 2 2006.229.12:19:32.61#ibcon#about to write, iclass 26, count 2 2006.229.12:19:32.61#ibcon#wrote, iclass 26, count 2 2006.229.12:19:32.61#ibcon#about to read 3, iclass 26, count 2 2006.229.12:19:32.63#ibcon#read 3, iclass 26, count 2 2006.229.12:19:32.63#ibcon#about to read 4, iclass 26, count 2 2006.229.12:19:32.63#ibcon#read 4, iclass 26, count 2 2006.229.12:19:32.63#ibcon#about to read 5, iclass 26, count 2 2006.229.12:19:32.63#ibcon#read 5, iclass 26, count 2 2006.229.12:19:32.63#ibcon#about to read 6, iclass 26, count 2 2006.229.12:19:32.63#ibcon#read 6, iclass 26, count 2 2006.229.12:19:32.63#ibcon#end of sib2, iclass 26, count 2 2006.229.12:19:32.63#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:19:32.63#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:19:32.63#ibcon#[25=AT05-04\r\n] 2006.229.12:19:32.63#ibcon#*before write, iclass 26, count 2 2006.229.12:19:32.63#ibcon#enter sib2, iclass 26, count 2 2006.229.12:19:32.63#ibcon#flushed, iclass 26, count 2 2006.229.12:19:32.63#ibcon#about to write, iclass 26, count 2 2006.229.12:19:32.63#ibcon#wrote, iclass 26, count 2 2006.229.12:19:32.63#ibcon#about to read 3, iclass 26, count 2 2006.229.12:19:32.66#ibcon#read 3, iclass 26, count 2 2006.229.12:19:32.66#ibcon#about to read 4, iclass 26, count 2 2006.229.12:19:32.66#ibcon#read 4, iclass 26, count 2 2006.229.12:19:32.66#ibcon#about to read 5, iclass 26, count 2 2006.229.12:19:32.66#ibcon#read 5, iclass 26, count 2 2006.229.12:19:32.66#ibcon#about to read 6, iclass 26, count 2 2006.229.12:19:32.66#ibcon#read 6, iclass 26, count 2 2006.229.12:19:32.66#ibcon#end of sib2, iclass 26, count 2 2006.229.12:19:32.66#ibcon#*after write, iclass 26, count 2 2006.229.12:19:32.66#ibcon#*before return 0, iclass 26, count 2 2006.229.12:19:32.66#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:32.66#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:32.66#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:19:32.66#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:32.66#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:32.78#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:32.78#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:32.78#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:19:32.78#ibcon#first serial, iclass 26, count 0 2006.229.12:19:32.78#ibcon#enter sib2, iclass 26, count 0 2006.229.12:19:32.78#ibcon#flushed, iclass 26, count 0 2006.229.12:19:32.78#ibcon#about to write, iclass 26, count 0 2006.229.12:19:32.78#ibcon#wrote, iclass 26, count 0 2006.229.12:19:32.78#ibcon#about to read 3, iclass 26, count 0 2006.229.12:19:32.80#ibcon#read 3, iclass 26, count 0 2006.229.12:19:32.80#ibcon#about to read 4, iclass 26, count 0 2006.229.12:19:32.80#ibcon#read 4, iclass 26, count 0 2006.229.12:19:32.80#ibcon#about to read 5, iclass 26, count 0 2006.229.12:19:32.80#ibcon#read 5, iclass 26, count 0 2006.229.12:19:32.80#ibcon#about to read 6, iclass 26, count 0 2006.229.12:19:32.80#ibcon#read 6, iclass 26, count 0 2006.229.12:19:32.80#ibcon#end of sib2, iclass 26, count 0 2006.229.12:19:32.80#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:19:32.80#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:19:32.80#ibcon#[25=USB\r\n] 2006.229.12:19:32.80#ibcon#*before write, iclass 26, count 0 2006.229.12:19:32.80#ibcon#enter sib2, iclass 26, count 0 2006.229.12:19:32.80#ibcon#flushed, iclass 26, count 0 2006.229.12:19:32.80#ibcon#about to write, iclass 26, count 0 2006.229.12:19:32.80#ibcon#wrote, iclass 26, count 0 2006.229.12:19:32.80#ibcon#about to read 3, iclass 26, count 0 2006.229.12:19:32.83#ibcon#read 3, iclass 26, count 0 2006.229.12:19:32.83#ibcon#about to read 4, iclass 26, count 0 2006.229.12:19:32.83#ibcon#read 4, iclass 26, count 0 2006.229.12:19:32.83#ibcon#about to read 5, iclass 26, count 0 2006.229.12:19:32.83#ibcon#read 5, iclass 26, count 0 2006.229.12:19:32.83#ibcon#about to read 6, iclass 26, count 0 2006.229.12:19:32.83#ibcon#read 6, iclass 26, count 0 2006.229.12:19:32.83#ibcon#end of sib2, iclass 26, count 0 2006.229.12:19:32.83#ibcon#*after write, iclass 26, count 0 2006.229.12:19:32.83#ibcon#*before return 0, iclass 26, count 0 2006.229.12:19:32.83#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:32.83#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:32.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:19:32.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:19:32.83$vck44/valo=6,814.99 2006.229.12:19:32.83#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.12:19:32.83#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.12:19:32.83#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:32.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:32.83#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:32.83#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:32.83#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:19:32.83#ibcon#first serial, iclass 28, count 0 2006.229.12:19:32.83#ibcon#enter sib2, iclass 28, count 0 2006.229.12:19:32.83#ibcon#flushed, iclass 28, count 0 2006.229.12:19:32.83#ibcon#about to write, iclass 28, count 0 2006.229.12:19:32.83#ibcon#wrote, iclass 28, count 0 2006.229.12:19:32.83#ibcon#about to read 3, iclass 28, count 0 2006.229.12:19:32.85#ibcon#read 3, iclass 28, count 0 2006.229.12:19:32.85#ibcon#about to read 4, iclass 28, count 0 2006.229.12:19:32.85#ibcon#read 4, iclass 28, count 0 2006.229.12:19:32.85#ibcon#about to read 5, iclass 28, count 0 2006.229.12:19:32.85#ibcon#read 5, iclass 28, count 0 2006.229.12:19:32.85#ibcon#about to read 6, iclass 28, count 0 2006.229.12:19:32.85#ibcon#read 6, iclass 28, count 0 2006.229.12:19:32.85#ibcon#end of sib2, iclass 28, count 0 2006.229.12:19:32.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:19:32.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:19:32.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:19:32.85#ibcon#*before write, iclass 28, count 0 2006.229.12:19:32.85#ibcon#enter sib2, iclass 28, count 0 2006.229.12:19:32.85#ibcon#flushed, iclass 28, count 0 2006.229.12:19:32.85#ibcon#about to write, iclass 28, count 0 2006.229.12:19:32.85#ibcon#wrote, iclass 28, count 0 2006.229.12:19:32.85#ibcon#about to read 3, iclass 28, count 0 2006.229.12:19:32.89#ibcon#read 3, iclass 28, count 0 2006.229.12:19:32.89#ibcon#about to read 4, iclass 28, count 0 2006.229.12:19:32.89#ibcon#read 4, iclass 28, count 0 2006.229.12:19:32.89#ibcon#about to read 5, iclass 28, count 0 2006.229.12:19:32.89#ibcon#read 5, iclass 28, count 0 2006.229.12:19:32.89#ibcon#about to read 6, iclass 28, count 0 2006.229.12:19:32.89#ibcon#read 6, iclass 28, count 0 2006.229.12:19:32.89#ibcon#end of sib2, iclass 28, count 0 2006.229.12:19:32.89#ibcon#*after write, iclass 28, count 0 2006.229.12:19:32.89#ibcon#*before return 0, iclass 28, count 0 2006.229.12:19:32.89#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:32.89#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:32.89#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:19:32.89#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:19:32.89$vck44/va=6,4 2006.229.12:19:32.89#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.12:19:32.89#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.12:19:32.89#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:32.89#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:32.95#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:32.95#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:32.95#ibcon#enter wrdev, iclass 30, count 2 2006.229.12:19:32.95#ibcon#first serial, iclass 30, count 2 2006.229.12:19:32.95#ibcon#enter sib2, iclass 30, count 2 2006.229.12:19:32.95#ibcon#flushed, iclass 30, count 2 2006.229.12:19:32.95#ibcon#about to write, iclass 30, count 2 2006.229.12:19:32.95#ibcon#wrote, iclass 30, count 2 2006.229.12:19:32.95#ibcon#about to read 3, iclass 30, count 2 2006.229.12:19:32.97#ibcon#read 3, iclass 30, count 2 2006.229.12:19:32.97#ibcon#about to read 4, iclass 30, count 2 2006.229.12:19:32.97#ibcon#read 4, iclass 30, count 2 2006.229.12:19:32.97#ibcon#about to read 5, iclass 30, count 2 2006.229.12:19:32.97#ibcon#read 5, iclass 30, count 2 2006.229.12:19:32.97#ibcon#about to read 6, iclass 30, count 2 2006.229.12:19:32.97#ibcon#read 6, iclass 30, count 2 2006.229.12:19:32.97#ibcon#end of sib2, iclass 30, count 2 2006.229.12:19:32.97#ibcon#*mode == 0, iclass 30, count 2 2006.229.12:19:32.97#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.12:19:32.97#ibcon#[25=AT06-04\r\n] 2006.229.12:19:32.97#ibcon#*before write, iclass 30, count 2 2006.229.12:19:32.97#ibcon#enter sib2, iclass 30, count 2 2006.229.12:19:32.97#ibcon#flushed, iclass 30, count 2 2006.229.12:19:32.97#ibcon#about to write, iclass 30, count 2 2006.229.12:19:32.97#ibcon#wrote, iclass 30, count 2 2006.229.12:19:32.97#ibcon#about to read 3, iclass 30, count 2 2006.229.12:19:33.00#ibcon#read 3, iclass 30, count 2 2006.229.12:19:33.00#ibcon#about to read 4, iclass 30, count 2 2006.229.12:19:33.00#ibcon#read 4, iclass 30, count 2 2006.229.12:19:33.00#ibcon#about to read 5, iclass 30, count 2 2006.229.12:19:33.00#ibcon#read 5, iclass 30, count 2 2006.229.12:19:33.00#ibcon#about to read 6, iclass 30, count 2 2006.229.12:19:33.00#ibcon#read 6, iclass 30, count 2 2006.229.12:19:33.00#ibcon#end of sib2, iclass 30, count 2 2006.229.12:19:33.00#ibcon#*after write, iclass 30, count 2 2006.229.12:19:33.00#ibcon#*before return 0, iclass 30, count 2 2006.229.12:19:33.00#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:33.00#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:33.00#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.12:19:33.00#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:33.00#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:33.12#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:33.12#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:33.12#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:19:33.12#ibcon#first serial, iclass 30, count 0 2006.229.12:19:33.12#ibcon#enter sib2, iclass 30, count 0 2006.229.12:19:33.12#ibcon#flushed, iclass 30, count 0 2006.229.12:19:33.12#ibcon#about to write, iclass 30, count 0 2006.229.12:19:33.12#ibcon#wrote, iclass 30, count 0 2006.229.12:19:33.12#ibcon#about to read 3, iclass 30, count 0 2006.229.12:19:33.14#ibcon#read 3, iclass 30, count 0 2006.229.12:19:33.14#ibcon#about to read 4, iclass 30, count 0 2006.229.12:19:33.14#ibcon#read 4, iclass 30, count 0 2006.229.12:19:33.14#ibcon#about to read 5, iclass 30, count 0 2006.229.12:19:33.14#ibcon#read 5, iclass 30, count 0 2006.229.12:19:33.14#ibcon#about to read 6, iclass 30, count 0 2006.229.12:19:33.14#ibcon#read 6, iclass 30, count 0 2006.229.12:19:33.14#ibcon#end of sib2, iclass 30, count 0 2006.229.12:19:33.14#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:19:33.14#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:19:33.14#ibcon#[25=USB\r\n] 2006.229.12:19:33.14#ibcon#*before write, iclass 30, count 0 2006.229.12:19:33.14#ibcon#enter sib2, iclass 30, count 0 2006.229.12:19:33.14#ibcon#flushed, iclass 30, count 0 2006.229.12:19:33.14#ibcon#about to write, iclass 30, count 0 2006.229.12:19:33.14#ibcon#wrote, iclass 30, count 0 2006.229.12:19:33.14#ibcon#about to read 3, iclass 30, count 0 2006.229.12:19:33.17#ibcon#read 3, iclass 30, count 0 2006.229.12:19:33.17#ibcon#about to read 4, iclass 30, count 0 2006.229.12:19:33.17#ibcon#read 4, iclass 30, count 0 2006.229.12:19:33.17#ibcon#about to read 5, iclass 30, count 0 2006.229.12:19:33.17#ibcon#read 5, iclass 30, count 0 2006.229.12:19:33.17#ibcon#about to read 6, iclass 30, count 0 2006.229.12:19:33.17#ibcon#read 6, iclass 30, count 0 2006.229.12:19:33.17#ibcon#end of sib2, iclass 30, count 0 2006.229.12:19:33.17#ibcon#*after write, iclass 30, count 0 2006.229.12:19:33.17#ibcon#*before return 0, iclass 30, count 0 2006.229.12:19:33.17#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:33.17#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:33.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:19:33.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:19:33.17$vck44/valo=7,864.99 2006.229.12:19:33.17#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.12:19:33.17#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.12:19:33.17#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:33.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:33.17#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:33.17#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:33.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:19:33.17#ibcon#first serial, iclass 32, count 0 2006.229.12:19:33.17#ibcon#enter sib2, iclass 32, count 0 2006.229.12:19:33.17#ibcon#flushed, iclass 32, count 0 2006.229.12:19:33.17#ibcon#about to write, iclass 32, count 0 2006.229.12:19:33.17#ibcon#wrote, iclass 32, count 0 2006.229.12:19:33.17#ibcon#about to read 3, iclass 32, count 0 2006.229.12:19:33.19#ibcon#read 3, iclass 32, count 0 2006.229.12:19:33.19#ibcon#about to read 4, iclass 32, count 0 2006.229.12:19:33.19#ibcon#read 4, iclass 32, count 0 2006.229.12:19:33.19#ibcon#about to read 5, iclass 32, count 0 2006.229.12:19:33.19#ibcon#read 5, iclass 32, count 0 2006.229.12:19:33.19#ibcon#about to read 6, iclass 32, count 0 2006.229.12:19:33.19#ibcon#read 6, iclass 32, count 0 2006.229.12:19:33.19#ibcon#end of sib2, iclass 32, count 0 2006.229.12:19:33.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:19:33.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:19:33.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:19:33.19#ibcon#*before write, iclass 32, count 0 2006.229.12:19:33.19#ibcon#enter sib2, iclass 32, count 0 2006.229.12:19:33.19#ibcon#flushed, iclass 32, count 0 2006.229.12:19:33.19#ibcon#about to write, iclass 32, count 0 2006.229.12:19:33.19#ibcon#wrote, iclass 32, count 0 2006.229.12:19:33.19#ibcon#about to read 3, iclass 32, count 0 2006.229.12:19:33.23#ibcon#read 3, iclass 32, count 0 2006.229.12:19:33.23#ibcon#about to read 4, iclass 32, count 0 2006.229.12:19:33.23#ibcon#read 4, iclass 32, count 0 2006.229.12:19:33.23#ibcon#about to read 5, iclass 32, count 0 2006.229.12:19:33.23#ibcon#read 5, iclass 32, count 0 2006.229.12:19:33.23#ibcon#about to read 6, iclass 32, count 0 2006.229.12:19:33.23#ibcon#read 6, iclass 32, count 0 2006.229.12:19:33.23#ibcon#end of sib2, iclass 32, count 0 2006.229.12:19:33.23#ibcon#*after write, iclass 32, count 0 2006.229.12:19:33.23#ibcon#*before return 0, iclass 32, count 0 2006.229.12:19:33.23#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:33.23#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:33.23#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:19:33.23#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:19:33.23$vck44/va=7,5 2006.229.12:19:33.23#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.12:19:33.23#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.12:19:33.23#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:33.23#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:33.29#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:33.29#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:33.29#ibcon#enter wrdev, iclass 34, count 2 2006.229.12:19:33.29#ibcon#first serial, iclass 34, count 2 2006.229.12:19:33.29#ibcon#enter sib2, iclass 34, count 2 2006.229.12:19:33.29#ibcon#flushed, iclass 34, count 2 2006.229.12:19:33.29#ibcon#about to write, iclass 34, count 2 2006.229.12:19:33.29#ibcon#wrote, iclass 34, count 2 2006.229.12:19:33.29#ibcon#about to read 3, iclass 34, count 2 2006.229.12:19:33.31#ibcon#read 3, iclass 34, count 2 2006.229.12:19:33.31#ibcon#about to read 4, iclass 34, count 2 2006.229.12:19:33.31#ibcon#read 4, iclass 34, count 2 2006.229.12:19:33.31#ibcon#about to read 5, iclass 34, count 2 2006.229.12:19:33.31#ibcon#read 5, iclass 34, count 2 2006.229.12:19:33.31#ibcon#about to read 6, iclass 34, count 2 2006.229.12:19:33.31#ibcon#read 6, iclass 34, count 2 2006.229.12:19:33.31#ibcon#end of sib2, iclass 34, count 2 2006.229.12:19:33.31#ibcon#*mode == 0, iclass 34, count 2 2006.229.12:19:33.31#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.12:19:33.31#ibcon#[25=AT07-05\r\n] 2006.229.12:19:33.31#ibcon#*before write, iclass 34, count 2 2006.229.12:19:33.31#ibcon#enter sib2, iclass 34, count 2 2006.229.12:19:33.31#ibcon#flushed, iclass 34, count 2 2006.229.12:19:33.31#ibcon#about to write, iclass 34, count 2 2006.229.12:19:33.31#ibcon#wrote, iclass 34, count 2 2006.229.12:19:33.31#ibcon#about to read 3, iclass 34, count 2 2006.229.12:19:33.34#ibcon#read 3, iclass 34, count 2 2006.229.12:19:33.34#ibcon#about to read 4, iclass 34, count 2 2006.229.12:19:33.34#ibcon#read 4, iclass 34, count 2 2006.229.12:19:33.34#ibcon#about to read 5, iclass 34, count 2 2006.229.12:19:33.34#ibcon#read 5, iclass 34, count 2 2006.229.12:19:33.34#ibcon#about to read 6, iclass 34, count 2 2006.229.12:19:33.34#ibcon#read 6, iclass 34, count 2 2006.229.12:19:33.34#ibcon#end of sib2, iclass 34, count 2 2006.229.12:19:33.34#ibcon#*after write, iclass 34, count 2 2006.229.12:19:33.34#ibcon#*before return 0, iclass 34, count 2 2006.229.12:19:33.34#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:33.34#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:33.34#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.12:19:33.34#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:33.34#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:33.46#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:33.46#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:33.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:19:33.46#ibcon#first serial, iclass 34, count 0 2006.229.12:19:33.46#ibcon#enter sib2, iclass 34, count 0 2006.229.12:19:33.46#ibcon#flushed, iclass 34, count 0 2006.229.12:19:33.46#ibcon#about to write, iclass 34, count 0 2006.229.12:19:33.46#ibcon#wrote, iclass 34, count 0 2006.229.12:19:33.46#ibcon#about to read 3, iclass 34, count 0 2006.229.12:19:33.48#ibcon#read 3, iclass 34, count 0 2006.229.12:19:33.48#ibcon#about to read 4, iclass 34, count 0 2006.229.12:19:33.48#ibcon#read 4, iclass 34, count 0 2006.229.12:19:33.48#ibcon#about to read 5, iclass 34, count 0 2006.229.12:19:33.48#ibcon#read 5, iclass 34, count 0 2006.229.12:19:33.48#ibcon#about to read 6, iclass 34, count 0 2006.229.12:19:33.48#ibcon#read 6, iclass 34, count 0 2006.229.12:19:33.48#ibcon#end of sib2, iclass 34, count 0 2006.229.12:19:33.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:19:33.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:19:33.48#ibcon#[25=USB\r\n] 2006.229.12:19:33.48#ibcon#*before write, iclass 34, count 0 2006.229.12:19:33.48#ibcon#enter sib2, iclass 34, count 0 2006.229.12:19:33.48#ibcon#flushed, iclass 34, count 0 2006.229.12:19:33.48#ibcon#about to write, iclass 34, count 0 2006.229.12:19:33.48#ibcon#wrote, iclass 34, count 0 2006.229.12:19:33.48#ibcon#about to read 3, iclass 34, count 0 2006.229.12:19:33.51#ibcon#read 3, iclass 34, count 0 2006.229.12:19:33.51#ibcon#about to read 4, iclass 34, count 0 2006.229.12:19:33.51#ibcon#read 4, iclass 34, count 0 2006.229.12:19:33.51#ibcon#about to read 5, iclass 34, count 0 2006.229.12:19:33.51#ibcon#read 5, iclass 34, count 0 2006.229.12:19:33.51#ibcon#about to read 6, iclass 34, count 0 2006.229.12:19:33.51#ibcon#read 6, iclass 34, count 0 2006.229.12:19:33.51#ibcon#end of sib2, iclass 34, count 0 2006.229.12:19:33.51#ibcon#*after write, iclass 34, count 0 2006.229.12:19:33.51#ibcon#*before return 0, iclass 34, count 0 2006.229.12:19:33.51#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:33.51#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:33.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:19:33.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:19:33.51$vck44/valo=8,884.99 2006.229.12:19:33.51#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:19:33.51#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:19:33.51#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:33.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:33.51#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:33.51#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:33.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:19:33.51#ibcon#first serial, iclass 36, count 0 2006.229.12:19:33.51#ibcon#enter sib2, iclass 36, count 0 2006.229.12:19:33.51#ibcon#flushed, iclass 36, count 0 2006.229.12:19:33.51#ibcon#about to write, iclass 36, count 0 2006.229.12:19:33.51#ibcon#wrote, iclass 36, count 0 2006.229.12:19:33.51#ibcon#about to read 3, iclass 36, count 0 2006.229.12:19:33.53#ibcon#read 3, iclass 36, count 0 2006.229.12:19:33.53#ibcon#about to read 4, iclass 36, count 0 2006.229.12:19:33.53#ibcon#read 4, iclass 36, count 0 2006.229.12:19:33.53#ibcon#about to read 5, iclass 36, count 0 2006.229.12:19:33.53#ibcon#read 5, iclass 36, count 0 2006.229.12:19:33.53#ibcon#about to read 6, iclass 36, count 0 2006.229.12:19:33.53#ibcon#read 6, iclass 36, count 0 2006.229.12:19:33.53#ibcon#end of sib2, iclass 36, count 0 2006.229.12:19:33.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:19:33.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:19:33.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:19:33.53#ibcon#*before write, iclass 36, count 0 2006.229.12:19:33.53#ibcon#enter sib2, iclass 36, count 0 2006.229.12:19:33.53#ibcon#flushed, iclass 36, count 0 2006.229.12:19:33.53#ibcon#about to write, iclass 36, count 0 2006.229.12:19:33.53#ibcon#wrote, iclass 36, count 0 2006.229.12:19:33.53#ibcon#about to read 3, iclass 36, count 0 2006.229.12:19:33.57#ibcon#read 3, iclass 36, count 0 2006.229.12:19:33.57#ibcon#about to read 4, iclass 36, count 0 2006.229.12:19:33.57#ibcon#read 4, iclass 36, count 0 2006.229.12:19:33.57#ibcon#about to read 5, iclass 36, count 0 2006.229.12:19:33.57#ibcon#read 5, iclass 36, count 0 2006.229.12:19:33.57#ibcon#about to read 6, iclass 36, count 0 2006.229.12:19:33.57#ibcon#read 6, iclass 36, count 0 2006.229.12:19:33.57#ibcon#end of sib2, iclass 36, count 0 2006.229.12:19:33.57#ibcon#*after write, iclass 36, count 0 2006.229.12:19:33.57#ibcon#*before return 0, iclass 36, count 0 2006.229.12:19:33.57#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:33.57#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:33.57#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:19:33.57#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:19:33.57$vck44/va=8,6 2006.229.12:19:33.57#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.12:19:33.57#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.12:19:33.57#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:33.57#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:19:33.63#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:19:33.63#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:19:33.63#ibcon#enter wrdev, iclass 38, count 2 2006.229.12:19:33.63#ibcon#first serial, iclass 38, count 2 2006.229.12:19:33.63#ibcon#enter sib2, iclass 38, count 2 2006.229.12:19:33.63#ibcon#flushed, iclass 38, count 2 2006.229.12:19:33.63#ibcon#about to write, iclass 38, count 2 2006.229.12:19:33.63#ibcon#wrote, iclass 38, count 2 2006.229.12:19:33.63#ibcon#about to read 3, iclass 38, count 2 2006.229.12:19:33.65#ibcon#read 3, iclass 38, count 2 2006.229.12:19:33.65#ibcon#about to read 4, iclass 38, count 2 2006.229.12:19:33.65#ibcon#read 4, iclass 38, count 2 2006.229.12:19:33.65#ibcon#about to read 5, iclass 38, count 2 2006.229.12:19:33.65#ibcon#read 5, iclass 38, count 2 2006.229.12:19:33.65#ibcon#about to read 6, iclass 38, count 2 2006.229.12:19:33.65#ibcon#read 6, iclass 38, count 2 2006.229.12:19:33.65#ibcon#end of sib2, iclass 38, count 2 2006.229.12:19:33.65#ibcon#*mode == 0, iclass 38, count 2 2006.229.12:19:33.65#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.12:19:33.65#ibcon#[25=AT08-06\r\n] 2006.229.12:19:33.65#ibcon#*before write, iclass 38, count 2 2006.229.12:19:33.65#ibcon#enter sib2, iclass 38, count 2 2006.229.12:19:33.65#ibcon#flushed, iclass 38, count 2 2006.229.12:19:33.65#ibcon#about to write, iclass 38, count 2 2006.229.12:19:33.65#ibcon#wrote, iclass 38, count 2 2006.229.12:19:33.65#ibcon#about to read 3, iclass 38, count 2 2006.229.12:19:33.68#ibcon#read 3, iclass 38, count 2 2006.229.12:19:33.68#ibcon#about to read 4, iclass 38, count 2 2006.229.12:19:33.68#ibcon#read 4, iclass 38, count 2 2006.229.12:19:33.68#ibcon#about to read 5, iclass 38, count 2 2006.229.12:19:33.68#ibcon#read 5, iclass 38, count 2 2006.229.12:19:33.68#ibcon#about to read 6, iclass 38, count 2 2006.229.12:19:33.68#ibcon#read 6, iclass 38, count 2 2006.229.12:19:33.68#ibcon#end of sib2, iclass 38, count 2 2006.229.12:19:33.68#ibcon#*after write, iclass 38, count 2 2006.229.12:19:33.68#ibcon#*before return 0, iclass 38, count 2 2006.229.12:19:33.68#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:19:33.68#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:19:33.68#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.12:19:33.68#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:33.68#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:19:33.80#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:19:33.80#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:19:33.80#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:19:33.80#ibcon#first serial, iclass 38, count 0 2006.229.12:19:33.80#ibcon#enter sib2, iclass 38, count 0 2006.229.12:19:33.80#ibcon#flushed, iclass 38, count 0 2006.229.12:19:33.80#ibcon#about to write, iclass 38, count 0 2006.229.12:19:33.80#ibcon#wrote, iclass 38, count 0 2006.229.12:19:33.80#ibcon#about to read 3, iclass 38, count 0 2006.229.12:19:33.82#ibcon#read 3, iclass 38, count 0 2006.229.12:19:33.82#ibcon#about to read 4, iclass 38, count 0 2006.229.12:19:33.82#ibcon#read 4, iclass 38, count 0 2006.229.12:19:33.82#ibcon#about to read 5, iclass 38, count 0 2006.229.12:19:33.82#ibcon#read 5, iclass 38, count 0 2006.229.12:19:33.82#ibcon#about to read 6, iclass 38, count 0 2006.229.12:19:33.82#ibcon#read 6, iclass 38, count 0 2006.229.12:19:33.82#ibcon#end of sib2, iclass 38, count 0 2006.229.12:19:33.82#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:19:33.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:19:33.82#ibcon#[25=USB\r\n] 2006.229.12:19:33.82#ibcon#*before write, iclass 38, count 0 2006.229.12:19:33.82#ibcon#enter sib2, iclass 38, count 0 2006.229.12:19:33.82#ibcon#flushed, iclass 38, count 0 2006.229.12:19:33.82#ibcon#about to write, iclass 38, count 0 2006.229.12:19:33.82#ibcon#wrote, iclass 38, count 0 2006.229.12:19:33.82#ibcon#about to read 3, iclass 38, count 0 2006.229.12:19:33.85#ibcon#read 3, iclass 38, count 0 2006.229.12:19:33.85#ibcon#about to read 4, iclass 38, count 0 2006.229.12:19:33.85#ibcon#read 4, iclass 38, count 0 2006.229.12:19:33.85#ibcon#about to read 5, iclass 38, count 0 2006.229.12:19:33.85#ibcon#read 5, iclass 38, count 0 2006.229.12:19:33.85#ibcon#about to read 6, iclass 38, count 0 2006.229.12:19:33.85#ibcon#read 6, iclass 38, count 0 2006.229.12:19:33.85#ibcon#end of sib2, iclass 38, count 0 2006.229.12:19:33.85#ibcon#*after write, iclass 38, count 0 2006.229.12:19:33.85#ibcon#*before return 0, iclass 38, count 0 2006.229.12:19:33.85#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:19:33.85#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:19:33.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:19:33.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:19:33.85$vck44/vblo=1,629.99 2006.229.12:19:33.85#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.12:19:33.85#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.12:19:33.85#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:33.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:19:33.85#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:19:33.85#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:19:33.85#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:19:33.85#ibcon#first serial, iclass 40, count 0 2006.229.12:19:33.85#ibcon#enter sib2, iclass 40, count 0 2006.229.12:19:33.85#ibcon#flushed, iclass 40, count 0 2006.229.12:19:33.85#ibcon#about to write, iclass 40, count 0 2006.229.12:19:33.85#ibcon#wrote, iclass 40, count 0 2006.229.12:19:33.85#ibcon#about to read 3, iclass 40, count 0 2006.229.12:19:33.87#ibcon#read 3, iclass 40, count 0 2006.229.12:19:33.87#ibcon#about to read 4, iclass 40, count 0 2006.229.12:19:33.87#ibcon#read 4, iclass 40, count 0 2006.229.12:19:33.87#ibcon#about to read 5, iclass 40, count 0 2006.229.12:19:33.87#ibcon#read 5, iclass 40, count 0 2006.229.12:19:33.87#ibcon#about to read 6, iclass 40, count 0 2006.229.12:19:33.87#ibcon#read 6, iclass 40, count 0 2006.229.12:19:33.87#ibcon#end of sib2, iclass 40, count 0 2006.229.12:19:33.87#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:19:33.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:19:33.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:19:33.87#ibcon#*before write, iclass 40, count 0 2006.229.12:19:33.87#ibcon#enter sib2, iclass 40, count 0 2006.229.12:19:33.87#ibcon#flushed, iclass 40, count 0 2006.229.12:19:33.87#ibcon#about to write, iclass 40, count 0 2006.229.12:19:33.87#ibcon#wrote, iclass 40, count 0 2006.229.12:19:33.87#ibcon#about to read 3, iclass 40, count 0 2006.229.12:19:33.91#ibcon#read 3, iclass 40, count 0 2006.229.12:19:33.91#ibcon#about to read 4, iclass 40, count 0 2006.229.12:19:33.91#ibcon#read 4, iclass 40, count 0 2006.229.12:19:33.91#ibcon#about to read 5, iclass 40, count 0 2006.229.12:19:33.91#ibcon#read 5, iclass 40, count 0 2006.229.12:19:33.91#ibcon#about to read 6, iclass 40, count 0 2006.229.12:19:33.91#ibcon#read 6, iclass 40, count 0 2006.229.12:19:33.91#ibcon#end of sib2, iclass 40, count 0 2006.229.12:19:33.91#ibcon#*after write, iclass 40, count 0 2006.229.12:19:33.91#ibcon#*before return 0, iclass 40, count 0 2006.229.12:19:33.91#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:19:33.91#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:19:33.91#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:19:33.91#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:19:33.91$vck44/vb=1,4 2006.229.12:19:33.91#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.12:19:33.91#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.12:19:33.91#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:33.91#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:19:33.91#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:19:33.91#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:19:33.91#ibcon#enter wrdev, iclass 4, count 2 2006.229.12:19:33.91#ibcon#first serial, iclass 4, count 2 2006.229.12:19:33.91#ibcon#enter sib2, iclass 4, count 2 2006.229.12:19:33.91#ibcon#flushed, iclass 4, count 2 2006.229.12:19:33.91#ibcon#about to write, iclass 4, count 2 2006.229.12:19:33.91#ibcon#wrote, iclass 4, count 2 2006.229.12:19:33.91#ibcon#about to read 3, iclass 4, count 2 2006.229.12:19:33.93#ibcon#read 3, iclass 4, count 2 2006.229.12:19:33.93#ibcon#about to read 4, iclass 4, count 2 2006.229.12:19:33.93#ibcon#read 4, iclass 4, count 2 2006.229.12:19:33.93#ibcon#about to read 5, iclass 4, count 2 2006.229.12:19:33.93#ibcon#read 5, iclass 4, count 2 2006.229.12:19:33.93#ibcon#about to read 6, iclass 4, count 2 2006.229.12:19:33.93#ibcon#read 6, iclass 4, count 2 2006.229.12:19:33.93#ibcon#end of sib2, iclass 4, count 2 2006.229.12:19:33.93#ibcon#*mode == 0, iclass 4, count 2 2006.229.12:19:33.93#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.12:19:33.93#ibcon#[27=AT01-04\r\n] 2006.229.12:19:33.93#ibcon#*before write, iclass 4, count 2 2006.229.12:19:33.93#ibcon#enter sib2, iclass 4, count 2 2006.229.12:19:33.93#ibcon#flushed, iclass 4, count 2 2006.229.12:19:33.93#ibcon#about to write, iclass 4, count 2 2006.229.12:19:33.93#ibcon#wrote, iclass 4, count 2 2006.229.12:19:33.93#ibcon#about to read 3, iclass 4, count 2 2006.229.12:19:33.96#ibcon#read 3, iclass 4, count 2 2006.229.12:19:33.96#ibcon#about to read 4, iclass 4, count 2 2006.229.12:19:33.96#ibcon#read 4, iclass 4, count 2 2006.229.12:19:33.96#ibcon#about to read 5, iclass 4, count 2 2006.229.12:19:33.96#ibcon#read 5, iclass 4, count 2 2006.229.12:19:33.96#ibcon#about to read 6, iclass 4, count 2 2006.229.12:19:33.96#ibcon#read 6, iclass 4, count 2 2006.229.12:19:33.96#ibcon#end of sib2, iclass 4, count 2 2006.229.12:19:33.96#ibcon#*after write, iclass 4, count 2 2006.229.12:19:33.96#ibcon#*before return 0, iclass 4, count 2 2006.229.12:19:33.96#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:19:33.96#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:19:33.96#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.12:19:33.96#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:33.96#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:19:34.08#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:19:34.08#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:19:34.08#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:19:34.08#ibcon#first serial, iclass 4, count 0 2006.229.12:19:34.08#ibcon#enter sib2, iclass 4, count 0 2006.229.12:19:34.08#ibcon#flushed, iclass 4, count 0 2006.229.12:19:34.08#ibcon#about to write, iclass 4, count 0 2006.229.12:19:34.08#ibcon#wrote, iclass 4, count 0 2006.229.12:19:34.08#ibcon#about to read 3, iclass 4, count 0 2006.229.12:19:34.10#ibcon#read 3, iclass 4, count 0 2006.229.12:19:34.10#ibcon#about to read 4, iclass 4, count 0 2006.229.12:19:34.10#ibcon#read 4, iclass 4, count 0 2006.229.12:19:34.10#ibcon#about to read 5, iclass 4, count 0 2006.229.12:19:34.10#ibcon#read 5, iclass 4, count 0 2006.229.12:19:34.10#ibcon#about to read 6, iclass 4, count 0 2006.229.12:19:34.10#ibcon#read 6, iclass 4, count 0 2006.229.12:19:34.10#ibcon#end of sib2, iclass 4, count 0 2006.229.12:19:34.10#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:19:34.10#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:19:34.10#ibcon#[27=USB\r\n] 2006.229.12:19:34.10#ibcon#*before write, iclass 4, count 0 2006.229.12:19:34.10#ibcon#enter sib2, iclass 4, count 0 2006.229.12:19:34.10#ibcon#flushed, iclass 4, count 0 2006.229.12:19:34.10#ibcon#about to write, iclass 4, count 0 2006.229.12:19:34.10#ibcon#wrote, iclass 4, count 0 2006.229.12:19:34.10#ibcon#about to read 3, iclass 4, count 0 2006.229.12:19:34.13#ibcon#read 3, iclass 4, count 0 2006.229.12:19:34.13#ibcon#about to read 4, iclass 4, count 0 2006.229.12:19:34.13#ibcon#read 4, iclass 4, count 0 2006.229.12:19:34.13#ibcon#about to read 5, iclass 4, count 0 2006.229.12:19:34.13#ibcon#read 5, iclass 4, count 0 2006.229.12:19:34.13#ibcon#about to read 6, iclass 4, count 0 2006.229.12:19:34.13#ibcon#read 6, iclass 4, count 0 2006.229.12:19:34.13#ibcon#end of sib2, iclass 4, count 0 2006.229.12:19:34.13#ibcon#*after write, iclass 4, count 0 2006.229.12:19:34.13#ibcon#*before return 0, iclass 4, count 0 2006.229.12:19:34.13#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:19:34.13#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:19:34.13#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:19:34.13#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:19:34.13$vck44/vblo=2,634.99 2006.229.12:19:34.13#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.12:19:34.13#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.12:19:34.13#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:34.13#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:34.13#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:34.13#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:34.13#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:19:34.13#ibcon#first serial, iclass 6, count 0 2006.229.12:19:34.13#ibcon#enter sib2, iclass 6, count 0 2006.229.12:19:34.13#ibcon#flushed, iclass 6, count 0 2006.229.12:19:34.13#ibcon#about to write, iclass 6, count 0 2006.229.12:19:34.13#ibcon#wrote, iclass 6, count 0 2006.229.12:19:34.13#ibcon#about to read 3, iclass 6, count 0 2006.229.12:19:34.15#ibcon#read 3, iclass 6, count 0 2006.229.12:19:34.15#ibcon#about to read 4, iclass 6, count 0 2006.229.12:19:34.15#ibcon#read 4, iclass 6, count 0 2006.229.12:19:34.15#ibcon#about to read 5, iclass 6, count 0 2006.229.12:19:34.15#ibcon#read 5, iclass 6, count 0 2006.229.12:19:34.15#ibcon#about to read 6, iclass 6, count 0 2006.229.12:19:34.15#ibcon#read 6, iclass 6, count 0 2006.229.12:19:34.15#ibcon#end of sib2, iclass 6, count 0 2006.229.12:19:34.15#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:19:34.15#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:19:34.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:19:34.15#ibcon#*before write, iclass 6, count 0 2006.229.12:19:34.15#ibcon#enter sib2, iclass 6, count 0 2006.229.12:19:34.15#ibcon#flushed, iclass 6, count 0 2006.229.12:19:34.15#ibcon#about to write, iclass 6, count 0 2006.229.12:19:34.15#ibcon#wrote, iclass 6, count 0 2006.229.12:19:34.15#ibcon#about to read 3, iclass 6, count 0 2006.229.12:19:34.19#ibcon#read 3, iclass 6, count 0 2006.229.12:19:34.19#ibcon#about to read 4, iclass 6, count 0 2006.229.12:19:34.19#ibcon#read 4, iclass 6, count 0 2006.229.12:19:34.19#ibcon#about to read 5, iclass 6, count 0 2006.229.12:19:34.19#ibcon#read 5, iclass 6, count 0 2006.229.12:19:34.19#ibcon#about to read 6, iclass 6, count 0 2006.229.12:19:34.19#ibcon#read 6, iclass 6, count 0 2006.229.12:19:34.19#ibcon#end of sib2, iclass 6, count 0 2006.229.12:19:34.19#ibcon#*after write, iclass 6, count 0 2006.229.12:19:34.19#ibcon#*before return 0, iclass 6, count 0 2006.229.12:19:34.19#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:34.19#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:19:34.19#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:19:34.19#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:19:34.19$vck44/vb=2,4 2006.229.12:19:34.19#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.12:19:34.19#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.12:19:34.19#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:34.19#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:34.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:34.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:34.25#ibcon#enter wrdev, iclass 10, count 2 2006.229.12:19:34.25#ibcon#first serial, iclass 10, count 2 2006.229.12:19:34.25#ibcon#enter sib2, iclass 10, count 2 2006.229.12:19:34.25#ibcon#flushed, iclass 10, count 2 2006.229.12:19:34.25#ibcon#about to write, iclass 10, count 2 2006.229.12:19:34.25#ibcon#wrote, iclass 10, count 2 2006.229.12:19:34.25#ibcon#about to read 3, iclass 10, count 2 2006.229.12:19:34.27#ibcon#read 3, iclass 10, count 2 2006.229.12:19:34.27#ibcon#about to read 4, iclass 10, count 2 2006.229.12:19:34.27#ibcon#read 4, iclass 10, count 2 2006.229.12:19:34.27#ibcon#about to read 5, iclass 10, count 2 2006.229.12:19:34.27#ibcon#read 5, iclass 10, count 2 2006.229.12:19:34.27#ibcon#about to read 6, iclass 10, count 2 2006.229.12:19:34.27#ibcon#read 6, iclass 10, count 2 2006.229.12:19:34.27#ibcon#end of sib2, iclass 10, count 2 2006.229.12:19:34.27#ibcon#*mode == 0, iclass 10, count 2 2006.229.12:19:34.27#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.12:19:34.27#ibcon#[27=AT02-04\r\n] 2006.229.12:19:34.27#ibcon#*before write, iclass 10, count 2 2006.229.12:19:34.27#ibcon#enter sib2, iclass 10, count 2 2006.229.12:19:34.27#ibcon#flushed, iclass 10, count 2 2006.229.12:19:34.27#ibcon#about to write, iclass 10, count 2 2006.229.12:19:34.27#ibcon#wrote, iclass 10, count 2 2006.229.12:19:34.27#ibcon#about to read 3, iclass 10, count 2 2006.229.12:19:34.30#ibcon#read 3, iclass 10, count 2 2006.229.12:19:34.30#ibcon#about to read 4, iclass 10, count 2 2006.229.12:19:34.30#ibcon#read 4, iclass 10, count 2 2006.229.12:19:34.30#ibcon#about to read 5, iclass 10, count 2 2006.229.12:19:34.30#ibcon#read 5, iclass 10, count 2 2006.229.12:19:34.30#ibcon#about to read 6, iclass 10, count 2 2006.229.12:19:34.30#ibcon#read 6, iclass 10, count 2 2006.229.12:19:34.30#ibcon#end of sib2, iclass 10, count 2 2006.229.12:19:34.30#ibcon#*after write, iclass 10, count 2 2006.229.12:19:34.30#ibcon#*before return 0, iclass 10, count 2 2006.229.12:19:34.30#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:34.30#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:19:34.30#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.12:19:34.30#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:34.30#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:34.42#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:34.42#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:34.42#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:19:34.42#ibcon#first serial, iclass 10, count 0 2006.229.12:19:34.42#ibcon#enter sib2, iclass 10, count 0 2006.229.12:19:34.42#ibcon#flushed, iclass 10, count 0 2006.229.12:19:34.42#ibcon#about to write, iclass 10, count 0 2006.229.12:19:34.42#ibcon#wrote, iclass 10, count 0 2006.229.12:19:34.42#ibcon#about to read 3, iclass 10, count 0 2006.229.12:19:34.44#ibcon#read 3, iclass 10, count 0 2006.229.12:19:34.44#ibcon#about to read 4, iclass 10, count 0 2006.229.12:19:34.44#ibcon#read 4, iclass 10, count 0 2006.229.12:19:34.44#ibcon#about to read 5, iclass 10, count 0 2006.229.12:19:34.44#ibcon#read 5, iclass 10, count 0 2006.229.12:19:34.44#ibcon#about to read 6, iclass 10, count 0 2006.229.12:19:34.44#ibcon#read 6, iclass 10, count 0 2006.229.12:19:34.44#ibcon#end of sib2, iclass 10, count 0 2006.229.12:19:34.44#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:19:34.44#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:19:34.44#ibcon#[27=USB\r\n] 2006.229.12:19:34.44#ibcon#*before write, iclass 10, count 0 2006.229.12:19:34.44#ibcon#enter sib2, iclass 10, count 0 2006.229.12:19:34.44#ibcon#flushed, iclass 10, count 0 2006.229.12:19:34.44#ibcon#about to write, iclass 10, count 0 2006.229.12:19:34.44#ibcon#wrote, iclass 10, count 0 2006.229.12:19:34.44#ibcon#about to read 3, iclass 10, count 0 2006.229.12:19:34.47#ibcon#read 3, iclass 10, count 0 2006.229.12:19:34.47#ibcon#about to read 4, iclass 10, count 0 2006.229.12:19:34.47#ibcon#read 4, iclass 10, count 0 2006.229.12:19:34.47#ibcon#about to read 5, iclass 10, count 0 2006.229.12:19:34.47#ibcon#read 5, iclass 10, count 0 2006.229.12:19:34.47#ibcon#about to read 6, iclass 10, count 0 2006.229.12:19:34.47#ibcon#read 6, iclass 10, count 0 2006.229.12:19:34.47#ibcon#end of sib2, iclass 10, count 0 2006.229.12:19:34.47#ibcon#*after write, iclass 10, count 0 2006.229.12:19:34.47#ibcon#*before return 0, iclass 10, count 0 2006.229.12:19:34.47#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:34.47#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:19:34.47#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:19:34.47#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:19:34.47$vck44/vblo=3,649.99 2006.229.12:19:34.47#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:19:34.47#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:19:34.47#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:34.47#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:34.47#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:34.47#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:34.47#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:19:34.47#ibcon#first serial, iclass 12, count 0 2006.229.12:19:34.47#ibcon#enter sib2, iclass 12, count 0 2006.229.12:19:34.47#ibcon#flushed, iclass 12, count 0 2006.229.12:19:34.47#ibcon#about to write, iclass 12, count 0 2006.229.12:19:34.47#ibcon#wrote, iclass 12, count 0 2006.229.12:19:34.47#ibcon#about to read 3, iclass 12, count 0 2006.229.12:19:34.49#ibcon#read 3, iclass 12, count 0 2006.229.12:19:34.49#ibcon#about to read 4, iclass 12, count 0 2006.229.12:19:34.49#ibcon#read 4, iclass 12, count 0 2006.229.12:19:34.49#ibcon#about to read 5, iclass 12, count 0 2006.229.12:19:34.49#ibcon#read 5, iclass 12, count 0 2006.229.12:19:34.49#ibcon#about to read 6, iclass 12, count 0 2006.229.12:19:34.49#ibcon#read 6, iclass 12, count 0 2006.229.12:19:34.49#ibcon#end of sib2, iclass 12, count 0 2006.229.12:19:34.49#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:19:34.49#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:19:34.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:19:34.49#ibcon#*before write, iclass 12, count 0 2006.229.12:19:34.49#ibcon#enter sib2, iclass 12, count 0 2006.229.12:19:34.49#ibcon#flushed, iclass 12, count 0 2006.229.12:19:34.49#ibcon#about to write, iclass 12, count 0 2006.229.12:19:34.49#ibcon#wrote, iclass 12, count 0 2006.229.12:19:34.49#ibcon#about to read 3, iclass 12, count 0 2006.229.12:19:34.53#ibcon#read 3, iclass 12, count 0 2006.229.12:19:34.53#ibcon#about to read 4, iclass 12, count 0 2006.229.12:19:34.53#ibcon#read 4, iclass 12, count 0 2006.229.12:19:34.53#ibcon#about to read 5, iclass 12, count 0 2006.229.12:19:34.53#ibcon#read 5, iclass 12, count 0 2006.229.12:19:34.53#ibcon#about to read 6, iclass 12, count 0 2006.229.12:19:34.53#ibcon#read 6, iclass 12, count 0 2006.229.12:19:34.53#ibcon#end of sib2, iclass 12, count 0 2006.229.12:19:34.53#ibcon#*after write, iclass 12, count 0 2006.229.12:19:34.53#ibcon#*before return 0, iclass 12, count 0 2006.229.12:19:34.53#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:34.53#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:19:34.53#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:19:34.53#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:19:34.53$vck44/vb=3,4 2006.229.12:19:34.53#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.12:19:34.53#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.12:19:34.53#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:34.53#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:34.59#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:34.59#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:34.59#ibcon#enter wrdev, iclass 14, count 2 2006.229.12:19:34.59#ibcon#first serial, iclass 14, count 2 2006.229.12:19:34.59#ibcon#enter sib2, iclass 14, count 2 2006.229.12:19:34.59#ibcon#flushed, iclass 14, count 2 2006.229.12:19:34.59#ibcon#about to write, iclass 14, count 2 2006.229.12:19:34.59#ibcon#wrote, iclass 14, count 2 2006.229.12:19:34.59#ibcon#about to read 3, iclass 14, count 2 2006.229.12:19:34.61#ibcon#read 3, iclass 14, count 2 2006.229.12:19:34.61#ibcon#about to read 4, iclass 14, count 2 2006.229.12:19:34.61#ibcon#read 4, iclass 14, count 2 2006.229.12:19:34.61#ibcon#about to read 5, iclass 14, count 2 2006.229.12:19:34.61#ibcon#read 5, iclass 14, count 2 2006.229.12:19:34.61#ibcon#about to read 6, iclass 14, count 2 2006.229.12:19:34.61#ibcon#read 6, iclass 14, count 2 2006.229.12:19:34.61#ibcon#end of sib2, iclass 14, count 2 2006.229.12:19:34.61#ibcon#*mode == 0, iclass 14, count 2 2006.229.12:19:34.61#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.12:19:34.61#ibcon#[27=AT03-04\r\n] 2006.229.12:19:34.61#ibcon#*before write, iclass 14, count 2 2006.229.12:19:34.61#ibcon#enter sib2, iclass 14, count 2 2006.229.12:19:34.61#ibcon#flushed, iclass 14, count 2 2006.229.12:19:34.61#ibcon#about to write, iclass 14, count 2 2006.229.12:19:34.61#ibcon#wrote, iclass 14, count 2 2006.229.12:19:34.61#ibcon#about to read 3, iclass 14, count 2 2006.229.12:19:34.64#ibcon#read 3, iclass 14, count 2 2006.229.12:19:34.64#ibcon#about to read 4, iclass 14, count 2 2006.229.12:19:34.64#ibcon#read 4, iclass 14, count 2 2006.229.12:19:34.64#ibcon#about to read 5, iclass 14, count 2 2006.229.12:19:34.64#ibcon#read 5, iclass 14, count 2 2006.229.12:19:34.64#ibcon#about to read 6, iclass 14, count 2 2006.229.12:19:34.64#ibcon#read 6, iclass 14, count 2 2006.229.12:19:34.64#ibcon#end of sib2, iclass 14, count 2 2006.229.12:19:34.64#ibcon#*after write, iclass 14, count 2 2006.229.12:19:34.64#ibcon#*before return 0, iclass 14, count 2 2006.229.12:19:34.64#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:34.64#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:19:34.64#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.12:19:34.64#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:34.64#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:34.76#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:34.76#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:34.76#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:19:34.76#ibcon#first serial, iclass 14, count 0 2006.229.12:19:34.76#ibcon#enter sib2, iclass 14, count 0 2006.229.12:19:34.76#ibcon#flushed, iclass 14, count 0 2006.229.12:19:34.76#ibcon#about to write, iclass 14, count 0 2006.229.12:19:34.76#ibcon#wrote, iclass 14, count 0 2006.229.12:19:34.76#ibcon#about to read 3, iclass 14, count 0 2006.229.12:19:34.78#ibcon#read 3, iclass 14, count 0 2006.229.12:19:34.78#ibcon#about to read 4, iclass 14, count 0 2006.229.12:19:34.78#ibcon#read 4, iclass 14, count 0 2006.229.12:19:34.78#ibcon#about to read 5, iclass 14, count 0 2006.229.12:19:34.78#ibcon#read 5, iclass 14, count 0 2006.229.12:19:34.78#ibcon#about to read 6, iclass 14, count 0 2006.229.12:19:34.78#ibcon#read 6, iclass 14, count 0 2006.229.12:19:34.78#ibcon#end of sib2, iclass 14, count 0 2006.229.12:19:34.78#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:19:34.78#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:19:34.78#ibcon#[27=USB\r\n] 2006.229.12:19:34.78#ibcon#*before write, iclass 14, count 0 2006.229.12:19:34.78#ibcon#enter sib2, iclass 14, count 0 2006.229.12:19:34.78#ibcon#flushed, iclass 14, count 0 2006.229.12:19:34.78#ibcon#about to write, iclass 14, count 0 2006.229.12:19:34.78#ibcon#wrote, iclass 14, count 0 2006.229.12:19:34.78#ibcon#about to read 3, iclass 14, count 0 2006.229.12:19:34.81#ibcon#read 3, iclass 14, count 0 2006.229.12:19:34.81#ibcon#about to read 4, iclass 14, count 0 2006.229.12:19:34.81#ibcon#read 4, iclass 14, count 0 2006.229.12:19:34.81#ibcon#about to read 5, iclass 14, count 0 2006.229.12:19:34.81#ibcon#read 5, iclass 14, count 0 2006.229.12:19:34.81#ibcon#about to read 6, iclass 14, count 0 2006.229.12:19:34.81#ibcon#read 6, iclass 14, count 0 2006.229.12:19:34.81#ibcon#end of sib2, iclass 14, count 0 2006.229.12:19:34.81#ibcon#*after write, iclass 14, count 0 2006.229.12:19:34.81#ibcon#*before return 0, iclass 14, count 0 2006.229.12:19:34.81#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:34.81#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:19:34.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:19:34.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:19:34.81$vck44/vblo=4,679.99 2006.229.12:19:34.81#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.12:19:34.81#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.12:19:34.81#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:34.81#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:34.81#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:34.81#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:34.81#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:19:34.81#ibcon#first serial, iclass 16, count 0 2006.229.12:19:34.81#ibcon#enter sib2, iclass 16, count 0 2006.229.12:19:34.81#ibcon#flushed, iclass 16, count 0 2006.229.12:19:34.81#ibcon#about to write, iclass 16, count 0 2006.229.12:19:34.81#ibcon#wrote, iclass 16, count 0 2006.229.12:19:34.81#ibcon#about to read 3, iclass 16, count 0 2006.229.12:19:34.83#ibcon#read 3, iclass 16, count 0 2006.229.12:19:34.83#ibcon#about to read 4, iclass 16, count 0 2006.229.12:19:34.83#ibcon#read 4, iclass 16, count 0 2006.229.12:19:34.83#ibcon#about to read 5, iclass 16, count 0 2006.229.12:19:34.83#ibcon#read 5, iclass 16, count 0 2006.229.12:19:34.83#ibcon#about to read 6, iclass 16, count 0 2006.229.12:19:34.83#ibcon#read 6, iclass 16, count 0 2006.229.12:19:34.83#ibcon#end of sib2, iclass 16, count 0 2006.229.12:19:34.83#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:19:34.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:19:34.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:19:34.83#ibcon#*before write, iclass 16, count 0 2006.229.12:19:34.83#ibcon#enter sib2, iclass 16, count 0 2006.229.12:19:34.83#ibcon#flushed, iclass 16, count 0 2006.229.12:19:34.83#ibcon#about to write, iclass 16, count 0 2006.229.12:19:34.83#ibcon#wrote, iclass 16, count 0 2006.229.12:19:34.83#ibcon#about to read 3, iclass 16, count 0 2006.229.12:19:34.87#ibcon#read 3, iclass 16, count 0 2006.229.12:19:34.87#ibcon#about to read 4, iclass 16, count 0 2006.229.12:19:34.87#ibcon#read 4, iclass 16, count 0 2006.229.12:19:34.87#ibcon#about to read 5, iclass 16, count 0 2006.229.12:19:34.87#ibcon#read 5, iclass 16, count 0 2006.229.12:19:34.87#ibcon#about to read 6, iclass 16, count 0 2006.229.12:19:34.87#ibcon#read 6, iclass 16, count 0 2006.229.12:19:34.87#ibcon#end of sib2, iclass 16, count 0 2006.229.12:19:34.87#ibcon#*after write, iclass 16, count 0 2006.229.12:19:34.87#ibcon#*before return 0, iclass 16, count 0 2006.229.12:19:34.87#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:34.87#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:19:34.87#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:19:34.87#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:19:34.87$vck44/vb=4,4 2006.229.12:19:34.87#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.12:19:34.87#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.12:19:34.87#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:34.87#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:34.93#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:34.93#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:34.93#ibcon#enter wrdev, iclass 18, count 2 2006.229.12:19:34.93#ibcon#first serial, iclass 18, count 2 2006.229.12:19:34.93#ibcon#enter sib2, iclass 18, count 2 2006.229.12:19:34.93#ibcon#flushed, iclass 18, count 2 2006.229.12:19:34.93#ibcon#about to write, iclass 18, count 2 2006.229.12:19:34.93#ibcon#wrote, iclass 18, count 2 2006.229.12:19:34.93#ibcon#about to read 3, iclass 18, count 2 2006.229.12:19:34.95#ibcon#read 3, iclass 18, count 2 2006.229.12:19:34.95#ibcon#about to read 4, iclass 18, count 2 2006.229.12:19:34.95#ibcon#read 4, iclass 18, count 2 2006.229.12:19:34.95#ibcon#about to read 5, iclass 18, count 2 2006.229.12:19:34.95#ibcon#read 5, iclass 18, count 2 2006.229.12:19:34.95#ibcon#about to read 6, iclass 18, count 2 2006.229.12:19:34.95#ibcon#read 6, iclass 18, count 2 2006.229.12:19:34.95#ibcon#end of sib2, iclass 18, count 2 2006.229.12:19:34.95#ibcon#*mode == 0, iclass 18, count 2 2006.229.12:19:34.95#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.12:19:34.95#ibcon#[27=AT04-04\r\n] 2006.229.12:19:34.95#ibcon#*before write, iclass 18, count 2 2006.229.12:19:34.95#ibcon#enter sib2, iclass 18, count 2 2006.229.12:19:34.95#ibcon#flushed, iclass 18, count 2 2006.229.12:19:34.95#ibcon#about to write, iclass 18, count 2 2006.229.12:19:34.95#ibcon#wrote, iclass 18, count 2 2006.229.12:19:34.95#ibcon#about to read 3, iclass 18, count 2 2006.229.12:19:34.98#ibcon#read 3, iclass 18, count 2 2006.229.12:19:34.98#ibcon#about to read 4, iclass 18, count 2 2006.229.12:19:34.98#ibcon#read 4, iclass 18, count 2 2006.229.12:19:34.98#ibcon#about to read 5, iclass 18, count 2 2006.229.12:19:34.98#ibcon#read 5, iclass 18, count 2 2006.229.12:19:34.98#ibcon#about to read 6, iclass 18, count 2 2006.229.12:19:34.98#ibcon#read 6, iclass 18, count 2 2006.229.12:19:34.98#ibcon#end of sib2, iclass 18, count 2 2006.229.12:19:34.98#ibcon#*after write, iclass 18, count 2 2006.229.12:19:34.98#ibcon#*before return 0, iclass 18, count 2 2006.229.12:19:34.98#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:34.98#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:19:34.98#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.12:19:34.98#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:34.98#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:35.10#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:35.10#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:35.10#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:19:35.10#ibcon#first serial, iclass 18, count 0 2006.229.12:19:35.10#ibcon#enter sib2, iclass 18, count 0 2006.229.12:19:35.10#ibcon#flushed, iclass 18, count 0 2006.229.12:19:35.10#ibcon#about to write, iclass 18, count 0 2006.229.12:19:35.10#ibcon#wrote, iclass 18, count 0 2006.229.12:19:35.10#ibcon#about to read 3, iclass 18, count 0 2006.229.12:19:35.12#ibcon#read 3, iclass 18, count 0 2006.229.12:19:35.12#ibcon#about to read 4, iclass 18, count 0 2006.229.12:19:35.12#ibcon#read 4, iclass 18, count 0 2006.229.12:19:35.12#ibcon#about to read 5, iclass 18, count 0 2006.229.12:19:35.12#ibcon#read 5, iclass 18, count 0 2006.229.12:19:35.12#ibcon#about to read 6, iclass 18, count 0 2006.229.12:19:35.12#ibcon#read 6, iclass 18, count 0 2006.229.12:19:35.12#ibcon#end of sib2, iclass 18, count 0 2006.229.12:19:35.12#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:19:35.12#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:19:35.12#ibcon#[27=USB\r\n] 2006.229.12:19:35.12#ibcon#*before write, iclass 18, count 0 2006.229.12:19:35.12#ibcon#enter sib2, iclass 18, count 0 2006.229.12:19:35.12#ibcon#flushed, iclass 18, count 0 2006.229.12:19:35.12#ibcon#about to write, iclass 18, count 0 2006.229.12:19:35.12#ibcon#wrote, iclass 18, count 0 2006.229.12:19:35.12#ibcon#about to read 3, iclass 18, count 0 2006.229.12:19:35.15#ibcon#read 3, iclass 18, count 0 2006.229.12:19:35.15#ibcon#about to read 4, iclass 18, count 0 2006.229.12:19:35.15#ibcon#read 4, iclass 18, count 0 2006.229.12:19:35.15#ibcon#about to read 5, iclass 18, count 0 2006.229.12:19:35.15#ibcon#read 5, iclass 18, count 0 2006.229.12:19:35.15#ibcon#about to read 6, iclass 18, count 0 2006.229.12:19:35.15#ibcon#read 6, iclass 18, count 0 2006.229.12:19:35.15#ibcon#end of sib2, iclass 18, count 0 2006.229.12:19:35.15#ibcon#*after write, iclass 18, count 0 2006.229.12:19:35.15#ibcon#*before return 0, iclass 18, count 0 2006.229.12:19:35.15#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:35.15#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:19:35.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:19:35.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:19:35.15$vck44/vblo=5,709.99 2006.229.12:19:35.15#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.12:19:35.15#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.12:19:35.15#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:35.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:35.15#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:35.15#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:35.15#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:19:35.15#ibcon#first serial, iclass 20, count 0 2006.229.12:19:35.15#ibcon#enter sib2, iclass 20, count 0 2006.229.12:19:35.15#ibcon#flushed, iclass 20, count 0 2006.229.12:19:35.15#ibcon#about to write, iclass 20, count 0 2006.229.12:19:35.15#ibcon#wrote, iclass 20, count 0 2006.229.12:19:35.15#ibcon#about to read 3, iclass 20, count 0 2006.229.12:19:35.17#ibcon#read 3, iclass 20, count 0 2006.229.12:19:35.17#ibcon#about to read 4, iclass 20, count 0 2006.229.12:19:35.17#ibcon#read 4, iclass 20, count 0 2006.229.12:19:35.17#ibcon#about to read 5, iclass 20, count 0 2006.229.12:19:35.17#ibcon#read 5, iclass 20, count 0 2006.229.12:19:35.17#ibcon#about to read 6, iclass 20, count 0 2006.229.12:19:35.17#ibcon#read 6, iclass 20, count 0 2006.229.12:19:35.17#ibcon#end of sib2, iclass 20, count 0 2006.229.12:19:35.17#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:19:35.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:19:35.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:19:35.17#ibcon#*before write, iclass 20, count 0 2006.229.12:19:35.17#ibcon#enter sib2, iclass 20, count 0 2006.229.12:19:35.17#ibcon#flushed, iclass 20, count 0 2006.229.12:19:35.17#ibcon#about to write, iclass 20, count 0 2006.229.12:19:35.17#ibcon#wrote, iclass 20, count 0 2006.229.12:19:35.17#ibcon#about to read 3, iclass 20, count 0 2006.229.12:19:35.21#ibcon#read 3, iclass 20, count 0 2006.229.12:19:35.21#ibcon#about to read 4, iclass 20, count 0 2006.229.12:19:35.21#ibcon#read 4, iclass 20, count 0 2006.229.12:19:35.21#ibcon#about to read 5, iclass 20, count 0 2006.229.12:19:35.21#ibcon#read 5, iclass 20, count 0 2006.229.12:19:35.21#ibcon#about to read 6, iclass 20, count 0 2006.229.12:19:35.21#ibcon#read 6, iclass 20, count 0 2006.229.12:19:35.21#ibcon#end of sib2, iclass 20, count 0 2006.229.12:19:35.21#ibcon#*after write, iclass 20, count 0 2006.229.12:19:35.21#ibcon#*before return 0, iclass 20, count 0 2006.229.12:19:35.21#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:35.21#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:19:35.21#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:19:35.21#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:19:35.21$vck44/vb=5,4 2006.229.12:19:35.21#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.12:19:35.21#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.12:19:35.21#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:35.21#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:35.27#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:35.27#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:35.27#ibcon#enter wrdev, iclass 22, count 2 2006.229.12:19:35.27#ibcon#first serial, iclass 22, count 2 2006.229.12:19:35.27#ibcon#enter sib2, iclass 22, count 2 2006.229.12:19:35.27#ibcon#flushed, iclass 22, count 2 2006.229.12:19:35.27#ibcon#about to write, iclass 22, count 2 2006.229.12:19:35.27#ibcon#wrote, iclass 22, count 2 2006.229.12:19:35.27#ibcon#about to read 3, iclass 22, count 2 2006.229.12:19:35.29#ibcon#read 3, iclass 22, count 2 2006.229.12:19:35.29#ibcon#about to read 4, iclass 22, count 2 2006.229.12:19:35.29#ibcon#read 4, iclass 22, count 2 2006.229.12:19:35.29#ibcon#about to read 5, iclass 22, count 2 2006.229.12:19:35.29#ibcon#read 5, iclass 22, count 2 2006.229.12:19:35.29#ibcon#about to read 6, iclass 22, count 2 2006.229.12:19:35.29#ibcon#read 6, iclass 22, count 2 2006.229.12:19:35.29#ibcon#end of sib2, iclass 22, count 2 2006.229.12:19:35.29#ibcon#*mode == 0, iclass 22, count 2 2006.229.12:19:35.29#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.12:19:35.29#ibcon#[27=AT05-04\r\n] 2006.229.12:19:35.29#ibcon#*before write, iclass 22, count 2 2006.229.12:19:35.29#ibcon#enter sib2, iclass 22, count 2 2006.229.12:19:35.29#ibcon#flushed, iclass 22, count 2 2006.229.12:19:35.29#ibcon#about to write, iclass 22, count 2 2006.229.12:19:35.29#ibcon#wrote, iclass 22, count 2 2006.229.12:19:35.29#ibcon#about to read 3, iclass 22, count 2 2006.229.12:19:35.32#ibcon#read 3, iclass 22, count 2 2006.229.12:19:35.32#ibcon#about to read 4, iclass 22, count 2 2006.229.12:19:35.32#ibcon#read 4, iclass 22, count 2 2006.229.12:19:35.32#ibcon#about to read 5, iclass 22, count 2 2006.229.12:19:35.32#ibcon#read 5, iclass 22, count 2 2006.229.12:19:35.32#ibcon#about to read 6, iclass 22, count 2 2006.229.12:19:35.32#ibcon#read 6, iclass 22, count 2 2006.229.12:19:35.32#ibcon#end of sib2, iclass 22, count 2 2006.229.12:19:35.32#ibcon#*after write, iclass 22, count 2 2006.229.12:19:35.32#ibcon#*before return 0, iclass 22, count 2 2006.229.12:19:35.32#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:35.32#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:19:35.32#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.12:19:35.32#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:35.32#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:35.44#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:35.44#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:35.44#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:19:35.44#ibcon#first serial, iclass 22, count 0 2006.229.12:19:35.44#ibcon#enter sib2, iclass 22, count 0 2006.229.12:19:35.44#ibcon#flushed, iclass 22, count 0 2006.229.12:19:35.44#ibcon#about to write, iclass 22, count 0 2006.229.12:19:35.44#ibcon#wrote, iclass 22, count 0 2006.229.12:19:35.44#ibcon#about to read 3, iclass 22, count 0 2006.229.12:19:35.46#ibcon#read 3, iclass 22, count 0 2006.229.12:19:35.46#ibcon#about to read 4, iclass 22, count 0 2006.229.12:19:35.46#ibcon#read 4, iclass 22, count 0 2006.229.12:19:35.46#ibcon#about to read 5, iclass 22, count 0 2006.229.12:19:35.46#ibcon#read 5, iclass 22, count 0 2006.229.12:19:35.46#ibcon#about to read 6, iclass 22, count 0 2006.229.12:19:35.46#ibcon#read 6, iclass 22, count 0 2006.229.12:19:35.46#ibcon#end of sib2, iclass 22, count 0 2006.229.12:19:35.46#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:19:35.46#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:19:35.46#ibcon#[27=USB\r\n] 2006.229.12:19:35.46#ibcon#*before write, iclass 22, count 0 2006.229.12:19:35.46#ibcon#enter sib2, iclass 22, count 0 2006.229.12:19:35.46#ibcon#flushed, iclass 22, count 0 2006.229.12:19:35.46#ibcon#about to write, iclass 22, count 0 2006.229.12:19:35.46#ibcon#wrote, iclass 22, count 0 2006.229.12:19:35.46#ibcon#about to read 3, iclass 22, count 0 2006.229.12:19:35.49#ibcon#read 3, iclass 22, count 0 2006.229.12:19:35.49#ibcon#about to read 4, iclass 22, count 0 2006.229.12:19:35.49#ibcon#read 4, iclass 22, count 0 2006.229.12:19:35.49#ibcon#about to read 5, iclass 22, count 0 2006.229.12:19:35.49#ibcon#read 5, iclass 22, count 0 2006.229.12:19:35.49#ibcon#about to read 6, iclass 22, count 0 2006.229.12:19:35.49#ibcon#read 6, iclass 22, count 0 2006.229.12:19:35.49#ibcon#end of sib2, iclass 22, count 0 2006.229.12:19:35.49#ibcon#*after write, iclass 22, count 0 2006.229.12:19:35.49#ibcon#*before return 0, iclass 22, count 0 2006.229.12:19:35.49#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:35.49#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:19:35.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:19:35.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:19:35.49$vck44/vblo=6,719.99 2006.229.12:19:35.49#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:19:35.49#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:19:35.49#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:35.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:35.49#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:35.49#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:35.49#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:19:35.49#ibcon#first serial, iclass 24, count 0 2006.229.12:19:35.49#ibcon#enter sib2, iclass 24, count 0 2006.229.12:19:35.49#ibcon#flushed, iclass 24, count 0 2006.229.12:19:35.49#ibcon#about to write, iclass 24, count 0 2006.229.12:19:35.49#ibcon#wrote, iclass 24, count 0 2006.229.12:19:35.49#ibcon#about to read 3, iclass 24, count 0 2006.229.12:19:35.51#ibcon#read 3, iclass 24, count 0 2006.229.12:19:35.51#ibcon#about to read 4, iclass 24, count 0 2006.229.12:19:35.51#ibcon#read 4, iclass 24, count 0 2006.229.12:19:35.51#ibcon#about to read 5, iclass 24, count 0 2006.229.12:19:35.51#ibcon#read 5, iclass 24, count 0 2006.229.12:19:35.51#ibcon#about to read 6, iclass 24, count 0 2006.229.12:19:35.51#ibcon#read 6, iclass 24, count 0 2006.229.12:19:35.51#ibcon#end of sib2, iclass 24, count 0 2006.229.12:19:35.51#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:19:35.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:19:35.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:19:35.51#ibcon#*before write, iclass 24, count 0 2006.229.12:19:35.51#ibcon#enter sib2, iclass 24, count 0 2006.229.12:19:35.51#ibcon#flushed, iclass 24, count 0 2006.229.12:19:35.51#ibcon#about to write, iclass 24, count 0 2006.229.12:19:35.51#ibcon#wrote, iclass 24, count 0 2006.229.12:19:35.51#ibcon#about to read 3, iclass 24, count 0 2006.229.12:19:35.55#ibcon#read 3, iclass 24, count 0 2006.229.12:19:35.55#ibcon#about to read 4, iclass 24, count 0 2006.229.12:19:35.55#ibcon#read 4, iclass 24, count 0 2006.229.12:19:35.55#ibcon#about to read 5, iclass 24, count 0 2006.229.12:19:35.55#ibcon#read 5, iclass 24, count 0 2006.229.12:19:35.55#ibcon#about to read 6, iclass 24, count 0 2006.229.12:19:35.55#ibcon#read 6, iclass 24, count 0 2006.229.12:19:35.55#ibcon#end of sib2, iclass 24, count 0 2006.229.12:19:35.55#ibcon#*after write, iclass 24, count 0 2006.229.12:19:35.55#ibcon#*before return 0, iclass 24, count 0 2006.229.12:19:35.55#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:35.55#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:19:35.55#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:19:35.55#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:19:35.55$vck44/vb=6,4 2006.229.12:19:35.55#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:19:35.55#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:19:35.55#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:35.55#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:35.61#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:35.61#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:35.61#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:19:35.61#ibcon#first serial, iclass 26, count 2 2006.229.12:19:35.61#ibcon#enter sib2, iclass 26, count 2 2006.229.12:19:35.61#ibcon#flushed, iclass 26, count 2 2006.229.12:19:35.61#ibcon#about to write, iclass 26, count 2 2006.229.12:19:35.61#ibcon#wrote, iclass 26, count 2 2006.229.12:19:35.61#ibcon#about to read 3, iclass 26, count 2 2006.229.12:19:35.63#ibcon#read 3, iclass 26, count 2 2006.229.12:19:35.63#ibcon#about to read 4, iclass 26, count 2 2006.229.12:19:35.63#ibcon#read 4, iclass 26, count 2 2006.229.12:19:35.63#ibcon#about to read 5, iclass 26, count 2 2006.229.12:19:35.63#ibcon#read 5, iclass 26, count 2 2006.229.12:19:35.63#ibcon#about to read 6, iclass 26, count 2 2006.229.12:19:35.63#ibcon#read 6, iclass 26, count 2 2006.229.12:19:35.63#ibcon#end of sib2, iclass 26, count 2 2006.229.12:19:35.63#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:19:35.63#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:19:35.63#ibcon#[27=AT06-04\r\n] 2006.229.12:19:35.63#ibcon#*before write, iclass 26, count 2 2006.229.12:19:35.63#ibcon#enter sib2, iclass 26, count 2 2006.229.12:19:35.63#ibcon#flushed, iclass 26, count 2 2006.229.12:19:35.63#ibcon#about to write, iclass 26, count 2 2006.229.12:19:35.63#ibcon#wrote, iclass 26, count 2 2006.229.12:19:35.63#ibcon#about to read 3, iclass 26, count 2 2006.229.12:19:35.66#ibcon#read 3, iclass 26, count 2 2006.229.12:19:35.66#ibcon#about to read 4, iclass 26, count 2 2006.229.12:19:35.66#ibcon#read 4, iclass 26, count 2 2006.229.12:19:35.66#ibcon#about to read 5, iclass 26, count 2 2006.229.12:19:35.66#ibcon#read 5, iclass 26, count 2 2006.229.12:19:35.66#ibcon#about to read 6, iclass 26, count 2 2006.229.12:19:35.66#ibcon#read 6, iclass 26, count 2 2006.229.12:19:35.66#ibcon#end of sib2, iclass 26, count 2 2006.229.12:19:35.66#ibcon#*after write, iclass 26, count 2 2006.229.12:19:35.66#ibcon#*before return 0, iclass 26, count 2 2006.229.12:19:35.66#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:35.66#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:19:35.66#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:19:35.66#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:35.66#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:35.78#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:35.78#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:35.78#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:19:35.78#ibcon#first serial, iclass 26, count 0 2006.229.12:19:35.78#ibcon#enter sib2, iclass 26, count 0 2006.229.12:19:35.78#ibcon#flushed, iclass 26, count 0 2006.229.12:19:35.78#ibcon#about to write, iclass 26, count 0 2006.229.12:19:35.78#ibcon#wrote, iclass 26, count 0 2006.229.12:19:35.78#ibcon#about to read 3, iclass 26, count 0 2006.229.12:19:35.80#ibcon#read 3, iclass 26, count 0 2006.229.12:19:35.80#ibcon#about to read 4, iclass 26, count 0 2006.229.12:19:35.80#ibcon#read 4, iclass 26, count 0 2006.229.12:19:35.80#ibcon#about to read 5, iclass 26, count 0 2006.229.12:19:35.80#ibcon#read 5, iclass 26, count 0 2006.229.12:19:35.80#ibcon#about to read 6, iclass 26, count 0 2006.229.12:19:35.80#ibcon#read 6, iclass 26, count 0 2006.229.12:19:35.80#ibcon#end of sib2, iclass 26, count 0 2006.229.12:19:35.80#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:19:35.80#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:19:35.80#ibcon#[27=USB\r\n] 2006.229.12:19:35.80#ibcon#*before write, iclass 26, count 0 2006.229.12:19:35.80#ibcon#enter sib2, iclass 26, count 0 2006.229.12:19:35.80#ibcon#flushed, iclass 26, count 0 2006.229.12:19:35.80#ibcon#about to write, iclass 26, count 0 2006.229.12:19:35.80#ibcon#wrote, iclass 26, count 0 2006.229.12:19:35.80#ibcon#about to read 3, iclass 26, count 0 2006.229.12:19:35.83#ibcon#read 3, iclass 26, count 0 2006.229.12:19:35.83#ibcon#about to read 4, iclass 26, count 0 2006.229.12:19:35.83#ibcon#read 4, iclass 26, count 0 2006.229.12:19:35.83#ibcon#about to read 5, iclass 26, count 0 2006.229.12:19:35.83#ibcon#read 5, iclass 26, count 0 2006.229.12:19:35.83#ibcon#about to read 6, iclass 26, count 0 2006.229.12:19:35.83#ibcon#read 6, iclass 26, count 0 2006.229.12:19:35.83#ibcon#end of sib2, iclass 26, count 0 2006.229.12:19:35.83#ibcon#*after write, iclass 26, count 0 2006.229.12:19:35.83#ibcon#*before return 0, iclass 26, count 0 2006.229.12:19:35.83#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:35.83#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:19:35.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:19:35.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:19:35.83$vck44/vblo=7,734.99 2006.229.12:19:35.83#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.12:19:35.83#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.12:19:35.83#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:35.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:35.83#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:35.83#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:35.83#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:19:35.83#ibcon#first serial, iclass 28, count 0 2006.229.12:19:35.83#ibcon#enter sib2, iclass 28, count 0 2006.229.12:19:35.83#ibcon#flushed, iclass 28, count 0 2006.229.12:19:35.83#ibcon#about to write, iclass 28, count 0 2006.229.12:19:35.83#ibcon#wrote, iclass 28, count 0 2006.229.12:19:35.83#ibcon#about to read 3, iclass 28, count 0 2006.229.12:19:35.85#ibcon#read 3, iclass 28, count 0 2006.229.12:19:35.85#ibcon#about to read 4, iclass 28, count 0 2006.229.12:19:35.85#ibcon#read 4, iclass 28, count 0 2006.229.12:19:35.85#ibcon#about to read 5, iclass 28, count 0 2006.229.12:19:35.85#ibcon#read 5, iclass 28, count 0 2006.229.12:19:35.85#ibcon#about to read 6, iclass 28, count 0 2006.229.12:19:35.85#ibcon#read 6, iclass 28, count 0 2006.229.12:19:35.85#ibcon#end of sib2, iclass 28, count 0 2006.229.12:19:35.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:19:35.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:19:35.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:19:35.85#ibcon#*before write, iclass 28, count 0 2006.229.12:19:35.85#ibcon#enter sib2, iclass 28, count 0 2006.229.12:19:35.85#ibcon#flushed, iclass 28, count 0 2006.229.12:19:35.85#ibcon#about to write, iclass 28, count 0 2006.229.12:19:35.85#ibcon#wrote, iclass 28, count 0 2006.229.12:19:35.85#ibcon#about to read 3, iclass 28, count 0 2006.229.12:19:35.89#ibcon#read 3, iclass 28, count 0 2006.229.12:19:35.89#ibcon#about to read 4, iclass 28, count 0 2006.229.12:19:35.89#ibcon#read 4, iclass 28, count 0 2006.229.12:19:35.89#ibcon#about to read 5, iclass 28, count 0 2006.229.12:19:35.89#ibcon#read 5, iclass 28, count 0 2006.229.12:19:35.89#ibcon#about to read 6, iclass 28, count 0 2006.229.12:19:35.89#ibcon#read 6, iclass 28, count 0 2006.229.12:19:35.89#ibcon#end of sib2, iclass 28, count 0 2006.229.12:19:35.89#ibcon#*after write, iclass 28, count 0 2006.229.12:19:35.89#ibcon#*before return 0, iclass 28, count 0 2006.229.12:19:35.89#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:35.89#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:19:35.89#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:19:35.89#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:19:35.89$vck44/vb=7,4 2006.229.12:19:35.89#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.12:19:35.89#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.12:19:35.89#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:35.89#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:35.95#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:35.95#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:35.95#ibcon#enter wrdev, iclass 30, count 2 2006.229.12:19:35.95#ibcon#first serial, iclass 30, count 2 2006.229.12:19:35.95#ibcon#enter sib2, iclass 30, count 2 2006.229.12:19:35.95#ibcon#flushed, iclass 30, count 2 2006.229.12:19:35.95#ibcon#about to write, iclass 30, count 2 2006.229.12:19:35.95#ibcon#wrote, iclass 30, count 2 2006.229.12:19:35.95#ibcon#about to read 3, iclass 30, count 2 2006.229.12:19:35.97#ibcon#read 3, iclass 30, count 2 2006.229.12:19:35.97#ibcon#about to read 4, iclass 30, count 2 2006.229.12:19:35.97#ibcon#read 4, iclass 30, count 2 2006.229.12:19:35.97#ibcon#about to read 5, iclass 30, count 2 2006.229.12:19:35.97#ibcon#read 5, iclass 30, count 2 2006.229.12:19:35.97#ibcon#about to read 6, iclass 30, count 2 2006.229.12:19:35.97#ibcon#read 6, iclass 30, count 2 2006.229.12:19:35.97#ibcon#end of sib2, iclass 30, count 2 2006.229.12:19:35.97#ibcon#*mode == 0, iclass 30, count 2 2006.229.12:19:35.97#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.12:19:35.97#ibcon#[27=AT07-04\r\n] 2006.229.12:19:35.97#ibcon#*before write, iclass 30, count 2 2006.229.12:19:35.97#ibcon#enter sib2, iclass 30, count 2 2006.229.12:19:35.97#ibcon#flushed, iclass 30, count 2 2006.229.12:19:35.97#ibcon#about to write, iclass 30, count 2 2006.229.12:19:35.97#ibcon#wrote, iclass 30, count 2 2006.229.12:19:35.97#ibcon#about to read 3, iclass 30, count 2 2006.229.12:19:36.00#ibcon#read 3, iclass 30, count 2 2006.229.12:19:36.00#ibcon#about to read 4, iclass 30, count 2 2006.229.12:19:36.00#ibcon#read 4, iclass 30, count 2 2006.229.12:19:36.00#ibcon#about to read 5, iclass 30, count 2 2006.229.12:19:36.00#ibcon#read 5, iclass 30, count 2 2006.229.12:19:36.00#ibcon#about to read 6, iclass 30, count 2 2006.229.12:19:36.00#ibcon#read 6, iclass 30, count 2 2006.229.12:19:36.00#ibcon#end of sib2, iclass 30, count 2 2006.229.12:19:36.00#ibcon#*after write, iclass 30, count 2 2006.229.12:19:36.00#ibcon#*before return 0, iclass 30, count 2 2006.229.12:19:36.00#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:36.00#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:19:36.00#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.12:19:36.00#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:36.00#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:36.12#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:36.12#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:36.12#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:19:36.12#ibcon#first serial, iclass 30, count 0 2006.229.12:19:36.12#ibcon#enter sib2, iclass 30, count 0 2006.229.12:19:36.12#ibcon#flushed, iclass 30, count 0 2006.229.12:19:36.12#ibcon#about to write, iclass 30, count 0 2006.229.12:19:36.12#ibcon#wrote, iclass 30, count 0 2006.229.12:19:36.12#ibcon#about to read 3, iclass 30, count 0 2006.229.12:19:36.14#ibcon#read 3, iclass 30, count 0 2006.229.12:19:36.14#ibcon#about to read 4, iclass 30, count 0 2006.229.12:19:36.14#ibcon#read 4, iclass 30, count 0 2006.229.12:19:36.14#ibcon#about to read 5, iclass 30, count 0 2006.229.12:19:36.14#ibcon#read 5, iclass 30, count 0 2006.229.12:19:36.14#ibcon#about to read 6, iclass 30, count 0 2006.229.12:19:36.14#ibcon#read 6, iclass 30, count 0 2006.229.12:19:36.14#ibcon#end of sib2, iclass 30, count 0 2006.229.12:19:36.14#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:19:36.14#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:19:36.14#ibcon#[27=USB\r\n] 2006.229.12:19:36.14#ibcon#*before write, iclass 30, count 0 2006.229.12:19:36.14#ibcon#enter sib2, iclass 30, count 0 2006.229.12:19:36.14#ibcon#flushed, iclass 30, count 0 2006.229.12:19:36.14#ibcon#about to write, iclass 30, count 0 2006.229.12:19:36.14#ibcon#wrote, iclass 30, count 0 2006.229.12:19:36.14#ibcon#about to read 3, iclass 30, count 0 2006.229.12:19:36.17#ibcon#read 3, iclass 30, count 0 2006.229.12:19:36.17#ibcon#about to read 4, iclass 30, count 0 2006.229.12:19:36.17#ibcon#read 4, iclass 30, count 0 2006.229.12:19:36.17#ibcon#about to read 5, iclass 30, count 0 2006.229.12:19:36.17#ibcon#read 5, iclass 30, count 0 2006.229.12:19:36.17#ibcon#about to read 6, iclass 30, count 0 2006.229.12:19:36.17#ibcon#read 6, iclass 30, count 0 2006.229.12:19:36.17#ibcon#end of sib2, iclass 30, count 0 2006.229.12:19:36.17#ibcon#*after write, iclass 30, count 0 2006.229.12:19:36.17#ibcon#*before return 0, iclass 30, count 0 2006.229.12:19:36.17#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:36.17#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:19:36.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:19:36.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:19:36.17$vck44/vblo=8,744.99 2006.229.12:19:36.17#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.12:19:36.17#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.12:19:36.17#ibcon#ireg 17 cls_cnt 0 2006.229.12:19:36.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:36.17#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:36.17#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:36.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:19:36.17#ibcon#first serial, iclass 32, count 0 2006.229.12:19:36.17#ibcon#enter sib2, iclass 32, count 0 2006.229.12:19:36.17#ibcon#flushed, iclass 32, count 0 2006.229.12:19:36.17#ibcon#about to write, iclass 32, count 0 2006.229.12:19:36.17#ibcon#wrote, iclass 32, count 0 2006.229.12:19:36.17#ibcon#about to read 3, iclass 32, count 0 2006.229.12:19:36.19#ibcon#read 3, iclass 32, count 0 2006.229.12:19:36.19#ibcon#about to read 4, iclass 32, count 0 2006.229.12:19:36.19#ibcon#read 4, iclass 32, count 0 2006.229.12:19:36.19#ibcon#about to read 5, iclass 32, count 0 2006.229.12:19:36.19#ibcon#read 5, iclass 32, count 0 2006.229.12:19:36.19#ibcon#about to read 6, iclass 32, count 0 2006.229.12:19:36.19#ibcon#read 6, iclass 32, count 0 2006.229.12:19:36.19#ibcon#end of sib2, iclass 32, count 0 2006.229.12:19:36.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:19:36.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:19:36.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:19:36.19#ibcon#*before write, iclass 32, count 0 2006.229.12:19:36.19#ibcon#enter sib2, iclass 32, count 0 2006.229.12:19:36.19#ibcon#flushed, iclass 32, count 0 2006.229.12:19:36.19#ibcon#about to write, iclass 32, count 0 2006.229.12:19:36.19#ibcon#wrote, iclass 32, count 0 2006.229.12:19:36.19#ibcon#about to read 3, iclass 32, count 0 2006.229.12:19:36.23#ibcon#read 3, iclass 32, count 0 2006.229.12:19:36.23#ibcon#about to read 4, iclass 32, count 0 2006.229.12:19:36.23#ibcon#read 4, iclass 32, count 0 2006.229.12:19:36.23#ibcon#about to read 5, iclass 32, count 0 2006.229.12:19:36.23#ibcon#read 5, iclass 32, count 0 2006.229.12:19:36.23#ibcon#about to read 6, iclass 32, count 0 2006.229.12:19:36.23#ibcon#read 6, iclass 32, count 0 2006.229.12:19:36.23#ibcon#end of sib2, iclass 32, count 0 2006.229.12:19:36.23#ibcon#*after write, iclass 32, count 0 2006.229.12:19:36.23#ibcon#*before return 0, iclass 32, count 0 2006.229.12:19:36.23#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:36.23#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:19:36.23#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:19:36.23#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:19:36.23$vck44/vb=8,4 2006.229.12:19:36.23#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.12:19:36.23#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.12:19:36.23#ibcon#ireg 11 cls_cnt 2 2006.229.12:19:36.23#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:36.29#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:36.29#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:36.29#ibcon#enter wrdev, iclass 34, count 2 2006.229.12:19:36.29#ibcon#first serial, iclass 34, count 2 2006.229.12:19:36.29#ibcon#enter sib2, iclass 34, count 2 2006.229.12:19:36.29#ibcon#flushed, iclass 34, count 2 2006.229.12:19:36.29#ibcon#about to write, iclass 34, count 2 2006.229.12:19:36.29#ibcon#wrote, iclass 34, count 2 2006.229.12:19:36.29#ibcon#about to read 3, iclass 34, count 2 2006.229.12:19:36.31#ibcon#read 3, iclass 34, count 2 2006.229.12:19:36.31#ibcon#about to read 4, iclass 34, count 2 2006.229.12:19:36.31#ibcon#read 4, iclass 34, count 2 2006.229.12:19:36.31#ibcon#about to read 5, iclass 34, count 2 2006.229.12:19:36.31#ibcon#read 5, iclass 34, count 2 2006.229.12:19:36.31#ibcon#about to read 6, iclass 34, count 2 2006.229.12:19:36.31#ibcon#read 6, iclass 34, count 2 2006.229.12:19:36.31#ibcon#end of sib2, iclass 34, count 2 2006.229.12:19:36.31#ibcon#*mode == 0, iclass 34, count 2 2006.229.12:19:36.31#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.12:19:36.31#ibcon#[27=AT08-04\r\n] 2006.229.12:19:36.31#ibcon#*before write, iclass 34, count 2 2006.229.12:19:36.31#ibcon#enter sib2, iclass 34, count 2 2006.229.12:19:36.31#ibcon#flushed, iclass 34, count 2 2006.229.12:19:36.31#ibcon#about to write, iclass 34, count 2 2006.229.12:19:36.31#ibcon#wrote, iclass 34, count 2 2006.229.12:19:36.31#ibcon#about to read 3, iclass 34, count 2 2006.229.12:19:36.34#ibcon#read 3, iclass 34, count 2 2006.229.12:19:36.34#ibcon#about to read 4, iclass 34, count 2 2006.229.12:19:36.34#ibcon#read 4, iclass 34, count 2 2006.229.12:19:36.34#ibcon#about to read 5, iclass 34, count 2 2006.229.12:19:36.34#ibcon#read 5, iclass 34, count 2 2006.229.12:19:36.34#ibcon#about to read 6, iclass 34, count 2 2006.229.12:19:36.34#ibcon#read 6, iclass 34, count 2 2006.229.12:19:36.34#ibcon#end of sib2, iclass 34, count 2 2006.229.12:19:36.34#ibcon#*after write, iclass 34, count 2 2006.229.12:19:36.34#ibcon#*before return 0, iclass 34, count 2 2006.229.12:19:36.34#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:36.34#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:19:36.34#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.12:19:36.34#ibcon#ireg 7 cls_cnt 0 2006.229.12:19:36.34#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:36.46#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:36.46#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:36.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:19:36.46#ibcon#first serial, iclass 34, count 0 2006.229.12:19:36.46#ibcon#enter sib2, iclass 34, count 0 2006.229.12:19:36.46#ibcon#flushed, iclass 34, count 0 2006.229.12:19:36.46#ibcon#about to write, iclass 34, count 0 2006.229.12:19:36.46#ibcon#wrote, iclass 34, count 0 2006.229.12:19:36.46#ibcon#about to read 3, iclass 34, count 0 2006.229.12:19:36.48#ibcon#read 3, iclass 34, count 0 2006.229.12:19:36.48#ibcon#about to read 4, iclass 34, count 0 2006.229.12:19:36.48#ibcon#read 4, iclass 34, count 0 2006.229.12:19:36.48#ibcon#about to read 5, iclass 34, count 0 2006.229.12:19:36.48#ibcon#read 5, iclass 34, count 0 2006.229.12:19:36.48#ibcon#about to read 6, iclass 34, count 0 2006.229.12:19:36.48#ibcon#read 6, iclass 34, count 0 2006.229.12:19:36.48#ibcon#end of sib2, iclass 34, count 0 2006.229.12:19:36.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:19:36.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:19:36.48#ibcon#[27=USB\r\n] 2006.229.12:19:36.48#ibcon#*before write, iclass 34, count 0 2006.229.12:19:36.48#ibcon#enter sib2, iclass 34, count 0 2006.229.12:19:36.48#ibcon#flushed, iclass 34, count 0 2006.229.12:19:36.48#ibcon#about to write, iclass 34, count 0 2006.229.12:19:36.48#ibcon#wrote, iclass 34, count 0 2006.229.12:19:36.48#ibcon#about to read 3, iclass 34, count 0 2006.229.12:19:36.51#ibcon#read 3, iclass 34, count 0 2006.229.12:19:36.51#ibcon#about to read 4, iclass 34, count 0 2006.229.12:19:36.51#ibcon#read 4, iclass 34, count 0 2006.229.12:19:36.51#ibcon#about to read 5, iclass 34, count 0 2006.229.12:19:36.51#ibcon#read 5, iclass 34, count 0 2006.229.12:19:36.51#ibcon#about to read 6, iclass 34, count 0 2006.229.12:19:36.51#ibcon#read 6, iclass 34, count 0 2006.229.12:19:36.51#ibcon#end of sib2, iclass 34, count 0 2006.229.12:19:36.51#ibcon#*after write, iclass 34, count 0 2006.229.12:19:36.51#ibcon#*before return 0, iclass 34, count 0 2006.229.12:19:36.51#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:36.51#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:19:36.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:19:36.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:19:36.51$vck44/vabw=wide 2006.229.12:19:36.51#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:19:36.51#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:19:36.51#ibcon#ireg 8 cls_cnt 0 2006.229.12:19:36.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:36.51#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:36.51#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:36.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:19:36.51#ibcon#first serial, iclass 36, count 0 2006.229.12:19:36.51#ibcon#enter sib2, iclass 36, count 0 2006.229.12:19:36.51#ibcon#flushed, iclass 36, count 0 2006.229.12:19:36.51#ibcon#about to write, iclass 36, count 0 2006.229.12:19:36.51#ibcon#wrote, iclass 36, count 0 2006.229.12:19:36.51#ibcon#about to read 3, iclass 36, count 0 2006.229.12:19:36.53#ibcon#read 3, iclass 36, count 0 2006.229.12:19:36.53#ibcon#about to read 4, iclass 36, count 0 2006.229.12:19:36.53#ibcon#read 4, iclass 36, count 0 2006.229.12:19:36.53#ibcon#about to read 5, iclass 36, count 0 2006.229.12:19:36.53#ibcon#read 5, iclass 36, count 0 2006.229.12:19:36.53#ibcon#about to read 6, iclass 36, count 0 2006.229.12:19:36.53#ibcon#read 6, iclass 36, count 0 2006.229.12:19:36.53#ibcon#end of sib2, iclass 36, count 0 2006.229.12:19:36.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:19:36.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:19:36.53#ibcon#[25=BW32\r\n] 2006.229.12:19:36.53#ibcon#*before write, iclass 36, count 0 2006.229.12:19:36.53#ibcon#enter sib2, iclass 36, count 0 2006.229.12:19:36.53#ibcon#flushed, iclass 36, count 0 2006.229.12:19:36.53#ibcon#about to write, iclass 36, count 0 2006.229.12:19:36.53#ibcon#wrote, iclass 36, count 0 2006.229.12:19:36.53#ibcon#about to read 3, iclass 36, count 0 2006.229.12:19:36.56#ibcon#read 3, iclass 36, count 0 2006.229.12:19:36.56#ibcon#about to read 4, iclass 36, count 0 2006.229.12:19:36.56#ibcon#read 4, iclass 36, count 0 2006.229.12:19:36.56#ibcon#about to read 5, iclass 36, count 0 2006.229.12:19:36.56#ibcon#read 5, iclass 36, count 0 2006.229.12:19:36.56#ibcon#about to read 6, iclass 36, count 0 2006.229.12:19:36.56#ibcon#read 6, iclass 36, count 0 2006.229.12:19:36.56#ibcon#end of sib2, iclass 36, count 0 2006.229.12:19:36.56#ibcon#*after write, iclass 36, count 0 2006.229.12:19:36.56#ibcon#*before return 0, iclass 36, count 0 2006.229.12:19:36.56#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:36.56#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:19:36.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:19:36.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:19:36.56$vck44/vbbw=wide 2006.229.12:19:36.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:19:36.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:19:36.56#ibcon#ireg 8 cls_cnt 0 2006.229.12:19:36.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:19:36.63#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:19:36.63#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:19:36.63#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:19:36.63#ibcon#first serial, iclass 38, count 0 2006.229.12:19:36.63#ibcon#enter sib2, iclass 38, count 0 2006.229.12:19:36.63#ibcon#flushed, iclass 38, count 0 2006.229.12:19:36.63#ibcon#about to write, iclass 38, count 0 2006.229.12:19:36.63#ibcon#wrote, iclass 38, count 0 2006.229.12:19:36.63#ibcon#about to read 3, iclass 38, count 0 2006.229.12:19:36.65#ibcon#read 3, iclass 38, count 0 2006.229.12:19:36.65#ibcon#about to read 4, iclass 38, count 0 2006.229.12:19:36.65#ibcon#read 4, iclass 38, count 0 2006.229.12:19:36.65#ibcon#about to read 5, iclass 38, count 0 2006.229.12:19:36.65#ibcon#read 5, iclass 38, count 0 2006.229.12:19:36.65#ibcon#about to read 6, iclass 38, count 0 2006.229.12:19:36.65#ibcon#read 6, iclass 38, count 0 2006.229.12:19:36.65#ibcon#end of sib2, iclass 38, count 0 2006.229.12:19:36.65#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:19:36.65#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:19:36.65#ibcon#[27=BW32\r\n] 2006.229.12:19:36.65#ibcon#*before write, iclass 38, count 0 2006.229.12:19:36.65#ibcon#enter sib2, iclass 38, count 0 2006.229.12:19:36.65#ibcon#flushed, iclass 38, count 0 2006.229.12:19:36.65#ibcon#about to write, iclass 38, count 0 2006.229.12:19:36.65#ibcon#wrote, iclass 38, count 0 2006.229.12:19:36.65#ibcon#about to read 3, iclass 38, count 0 2006.229.12:19:36.68#ibcon#read 3, iclass 38, count 0 2006.229.12:19:36.68#ibcon#about to read 4, iclass 38, count 0 2006.229.12:19:36.68#ibcon#read 4, iclass 38, count 0 2006.229.12:19:36.68#ibcon#about to read 5, iclass 38, count 0 2006.229.12:19:36.68#ibcon#read 5, iclass 38, count 0 2006.229.12:19:36.68#ibcon#about to read 6, iclass 38, count 0 2006.229.12:19:36.68#ibcon#read 6, iclass 38, count 0 2006.229.12:19:36.68#ibcon#end of sib2, iclass 38, count 0 2006.229.12:19:36.68#ibcon#*after write, iclass 38, count 0 2006.229.12:19:36.68#ibcon#*before return 0, iclass 38, count 0 2006.229.12:19:36.68#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:19:36.68#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:19:36.68#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:19:36.68#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:19:36.68$setupk4/ifdk4 2006.229.12:19:36.68$ifdk4/lo= 2006.229.12:19:36.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:19:36.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:19:36.68$ifdk4/patch= 2006.229.12:19:36.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:19:36.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:19:36.68$setupk4/!*+20s 2006.229.12:19:40.86#abcon#<5=/04 1.7 2.8 27.731001002.3\r\n> 2006.229.12:19:40.88#abcon#{5=INTERFACE CLEAR} 2006.229.12:19:40.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:19:42.13#trakl#Source acquired 2006.229.12:19:44.13#flagr#flagr/antenna,acquired 2006.229.12:19:51.02#abcon#<5=/04 1.7 2.9 27.731001002.3\r\n> 2006.229.12:19:51.05#abcon#{5=INTERFACE CLEAR} 2006.229.12:19:51.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:19:51.19$setupk4/"tpicd 2006.229.12:19:51.19$setupk4/echo=off 2006.229.12:19:51.19$setupk4/xlog=off 2006.229.12:19:51.19:!2006.229.12:20:47 2006.229.12:20:47.02:preob 2006.229.12:20:48.14/onsource/TRACKING 2006.229.12:20:48.14:!2006.229.12:20:57 2006.229.12:20:57.02:"tape 2006.229.12:20:57.02:"st=record 2006.229.12:20:57.02:data_valid=on 2006.229.12:20:57.02:midob 2006.229.12:20:58.15/onsource/TRACKING 2006.229.12:20:58.15/wx/27.73,1002.3,100 2006.229.12:20:58.21/cable/+6.4073E-03 2006.229.12:20:59.30/va/01,08,usb,yes,30,33 2006.229.12:20:59.30/va/02,07,usb,yes,33,33 2006.229.12:20:59.30/va/03,06,usb,yes,41,43 2006.229.12:20:59.30/va/04,07,usb,yes,34,35 2006.229.12:20:59.30/va/05,04,usb,yes,30,31 2006.229.12:20:59.30/va/06,04,usb,yes,34,34 2006.229.12:20:59.30/va/07,05,usb,yes,30,31 2006.229.12:20:59.30/va/08,06,usb,yes,22,27 2006.229.12:20:59.53/valo/01,524.99,yes,locked 2006.229.12:20:59.53/valo/02,534.99,yes,locked 2006.229.12:20:59.53/valo/03,564.99,yes,locked 2006.229.12:20:59.53/valo/04,624.99,yes,locked 2006.229.12:20:59.53/valo/05,734.99,yes,locked 2006.229.12:20:59.53/valo/06,814.99,yes,locked 2006.229.12:20:59.53/valo/07,864.99,yes,locked 2006.229.12:20:59.54/valo/08,884.99,yes,locked 2006.229.12:21:00.62/vb/01,04,usb,yes,31,29 2006.229.12:21:00.62/vb/02,04,usb,yes,34,33 2006.229.12:21:00.62/vb/03,04,usb,yes,31,34 2006.229.12:21:00.62/vb/04,04,usb,yes,35,34 2006.229.12:21:00.62/vb/05,04,usb,yes,27,30 2006.229.12:21:00.62/vb/06,04,usb,yes,32,28 2006.229.12:21:00.62/vb/07,04,usb,yes,32,32 2006.229.12:21:00.62/vb/08,04,usb,yes,29,33 2006.229.12:21:00.86/vblo/01,629.99,yes,locked 2006.229.12:21:00.86/vblo/02,634.99,yes,locked 2006.229.12:21:00.86/vblo/03,649.99,yes,locked 2006.229.12:21:00.86/vblo/04,679.99,yes,locked 2006.229.12:21:00.86/vblo/05,709.99,yes,locked 2006.229.12:21:00.86/vblo/06,719.99,yes,locked 2006.229.12:21:00.87/vblo/07,734.99,yes,locked 2006.229.12:21:00.87/vblo/08,744.99,yes,locked 2006.229.12:21:01.01/vabw/8 2006.229.12:21:01.16/vbbw/8 2006.229.12:21:01.25/xfe/off,on,12.0 2006.229.12:21:01.63/ifatt/23,28,28,28 2006.229.12:21:02.07/fmout-gps/S +4.39E-07 2006.229.12:21:02.12:!2006.229.12:22:27 2006.229.12:22:27.02:data_valid=off 2006.229.12:22:27.02:"et 2006.229.12:22:27.02:!+3s 2006.229.12:22:30.05:"tape 2006.229.12:22:30.06:postob 2006.229.12:22:30.13/cable/+6.4091E-03 2006.229.12:22:30.14/wx/27.72,1002.4,100 2006.229.12:22:30.21/fmout-gps/S +4.46E-07 2006.229.12:22:30.21:scan_name=229-1226,jd0608,80 2006.229.12:22:30.21:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.12:22:31.15#flagr#flagr/antenna,new-source 2006.229.12:22:31.15:checkk5 2006.229.12:22:31.58/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:22:31.98/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:22:32.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:22:32.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:22:33.17/chk_obsdata//k5ts1/T2291220??a.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.12:22:33.60/chk_obsdata//k5ts2/T2291220??b.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.12:22:34.00/chk_obsdata//k5ts3/T2291220??c.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.12:22:34.39/chk_obsdata//k5ts4/T2291220??d.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.12:22:35.14/k5log//k5ts1_log_newline 2006.229.12:22:35.87/k5log//k5ts2_log_newline 2006.229.12:22:36.59/k5log//k5ts3_log_newline 2006.229.12:22:37.32/k5log//k5ts4_log_newline 2006.229.12:22:37.34/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:22:37.34:setupk4=1 2006.229.12:22:37.34$setupk4/echo=on 2006.229.12:22:37.35$setupk4/pcalon 2006.229.12:22:37.35$pcalon/"no phase cal control is implemented here 2006.229.12:22:37.35$setupk4/"tpicd=stop 2006.229.12:22:37.35$setupk4/"rec=synch_on 2006.229.12:22:37.35$setupk4/"rec_mode=128 2006.229.12:22:37.35$setupk4/!* 2006.229.12:22:37.35$setupk4/recpk4 2006.229.12:22:37.35$recpk4/recpatch= 2006.229.12:22:37.35$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:22:37.35$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:22:37.35$setupk4/vck44 2006.229.12:22:37.35$vck44/valo=1,524.99 2006.229.12:22:37.35#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.12:22:37.35#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.12:22:37.35#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:37.35#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:37.35#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:37.35#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:37.35#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:22:37.35#ibcon#first serial, iclass 5, count 0 2006.229.12:22:37.35#ibcon#enter sib2, iclass 5, count 0 2006.229.12:22:37.35#ibcon#flushed, iclass 5, count 0 2006.229.12:22:37.35#ibcon#about to write, iclass 5, count 0 2006.229.12:22:37.35#ibcon#wrote, iclass 5, count 0 2006.229.12:22:37.35#ibcon#about to read 3, iclass 5, count 0 2006.229.12:22:37.36#ibcon#read 3, iclass 5, count 0 2006.229.12:22:37.36#ibcon#about to read 4, iclass 5, count 0 2006.229.12:22:37.36#ibcon#read 4, iclass 5, count 0 2006.229.12:22:37.36#ibcon#about to read 5, iclass 5, count 0 2006.229.12:22:37.36#ibcon#read 5, iclass 5, count 0 2006.229.12:22:37.36#ibcon#about to read 6, iclass 5, count 0 2006.229.12:22:37.36#ibcon#read 6, iclass 5, count 0 2006.229.12:22:37.36#ibcon#end of sib2, iclass 5, count 0 2006.229.12:22:37.36#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:22:37.36#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:22:37.36#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:22:37.36#ibcon#*before write, iclass 5, count 0 2006.229.12:22:37.36#ibcon#enter sib2, iclass 5, count 0 2006.229.12:22:37.36#ibcon#flushed, iclass 5, count 0 2006.229.12:22:37.36#ibcon#about to write, iclass 5, count 0 2006.229.12:22:37.36#ibcon#wrote, iclass 5, count 0 2006.229.12:22:37.36#ibcon#about to read 3, iclass 5, count 0 2006.229.12:22:37.41#ibcon#read 3, iclass 5, count 0 2006.229.12:22:37.41#ibcon#about to read 4, iclass 5, count 0 2006.229.12:22:37.41#ibcon#read 4, iclass 5, count 0 2006.229.12:22:37.41#ibcon#about to read 5, iclass 5, count 0 2006.229.12:22:37.41#ibcon#read 5, iclass 5, count 0 2006.229.12:22:37.41#ibcon#about to read 6, iclass 5, count 0 2006.229.12:22:37.41#ibcon#read 6, iclass 5, count 0 2006.229.12:22:37.41#ibcon#end of sib2, iclass 5, count 0 2006.229.12:22:37.41#ibcon#*after write, iclass 5, count 0 2006.229.12:22:37.41#ibcon#*before return 0, iclass 5, count 0 2006.229.12:22:37.41#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:37.41#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:37.41#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:22:37.41#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:22:37.41$vck44/va=1,8 2006.229.12:22:37.41#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.12:22:37.41#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.12:22:37.41#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:37.41#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:37.41#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:37.41#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:37.41#ibcon#enter wrdev, iclass 7, count 2 2006.229.12:22:37.42#ibcon#first serial, iclass 7, count 2 2006.229.12:22:37.42#ibcon#enter sib2, iclass 7, count 2 2006.229.12:22:37.42#ibcon#flushed, iclass 7, count 2 2006.229.12:22:37.42#ibcon#about to write, iclass 7, count 2 2006.229.12:22:37.42#ibcon#wrote, iclass 7, count 2 2006.229.12:22:37.42#ibcon#about to read 3, iclass 7, count 2 2006.229.12:22:37.43#ibcon#read 3, iclass 7, count 2 2006.229.12:22:37.43#ibcon#about to read 4, iclass 7, count 2 2006.229.12:22:37.43#ibcon#read 4, iclass 7, count 2 2006.229.12:22:37.43#ibcon#about to read 5, iclass 7, count 2 2006.229.12:22:37.43#ibcon#read 5, iclass 7, count 2 2006.229.12:22:37.43#ibcon#about to read 6, iclass 7, count 2 2006.229.12:22:37.43#ibcon#read 6, iclass 7, count 2 2006.229.12:22:37.43#ibcon#end of sib2, iclass 7, count 2 2006.229.12:22:37.43#ibcon#*mode == 0, iclass 7, count 2 2006.229.12:22:37.43#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.12:22:37.43#ibcon#[25=AT01-08\r\n] 2006.229.12:22:37.43#ibcon#*before write, iclass 7, count 2 2006.229.12:22:37.43#ibcon#enter sib2, iclass 7, count 2 2006.229.12:22:37.43#ibcon#flushed, iclass 7, count 2 2006.229.12:22:37.43#ibcon#about to write, iclass 7, count 2 2006.229.12:22:37.43#ibcon#wrote, iclass 7, count 2 2006.229.12:22:37.43#ibcon#about to read 3, iclass 7, count 2 2006.229.12:22:37.46#ibcon#read 3, iclass 7, count 2 2006.229.12:22:37.46#ibcon#about to read 4, iclass 7, count 2 2006.229.12:22:37.46#ibcon#read 4, iclass 7, count 2 2006.229.12:22:37.46#ibcon#about to read 5, iclass 7, count 2 2006.229.12:22:37.46#ibcon#read 5, iclass 7, count 2 2006.229.12:22:37.46#ibcon#about to read 6, iclass 7, count 2 2006.229.12:22:37.46#ibcon#read 6, iclass 7, count 2 2006.229.12:22:37.46#ibcon#end of sib2, iclass 7, count 2 2006.229.12:22:37.46#ibcon#*after write, iclass 7, count 2 2006.229.12:22:37.46#ibcon#*before return 0, iclass 7, count 2 2006.229.12:22:37.46#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:37.46#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:37.46#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.12:22:37.46#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:37.46#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:37.58#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:37.58#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:37.58#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:22:37.58#ibcon#first serial, iclass 7, count 0 2006.229.12:22:37.58#ibcon#enter sib2, iclass 7, count 0 2006.229.12:22:37.58#ibcon#flushed, iclass 7, count 0 2006.229.12:22:37.58#ibcon#about to write, iclass 7, count 0 2006.229.12:22:37.58#ibcon#wrote, iclass 7, count 0 2006.229.12:22:37.58#ibcon#about to read 3, iclass 7, count 0 2006.229.12:22:37.60#ibcon#read 3, iclass 7, count 0 2006.229.12:22:37.60#ibcon#about to read 4, iclass 7, count 0 2006.229.12:22:37.60#ibcon#read 4, iclass 7, count 0 2006.229.12:22:37.60#ibcon#about to read 5, iclass 7, count 0 2006.229.12:22:37.60#ibcon#read 5, iclass 7, count 0 2006.229.12:22:37.60#ibcon#about to read 6, iclass 7, count 0 2006.229.12:22:37.60#ibcon#read 6, iclass 7, count 0 2006.229.12:22:37.60#ibcon#end of sib2, iclass 7, count 0 2006.229.12:22:37.60#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:22:37.60#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:22:37.60#ibcon#[25=USB\r\n] 2006.229.12:22:37.60#ibcon#*before write, iclass 7, count 0 2006.229.12:22:37.60#ibcon#enter sib2, iclass 7, count 0 2006.229.12:22:37.60#ibcon#flushed, iclass 7, count 0 2006.229.12:22:37.60#ibcon#about to write, iclass 7, count 0 2006.229.12:22:37.60#ibcon#wrote, iclass 7, count 0 2006.229.12:22:37.60#ibcon#about to read 3, iclass 7, count 0 2006.229.12:22:37.63#ibcon#read 3, iclass 7, count 0 2006.229.12:22:37.63#ibcon#about to read 4, iclass 7, count 0 2006.229.12:22:37.63#ibcon#read 4, iclass 7, count 0 2006.229.12:22:37.63#ibcon#about to read 5, iclass 7, count 0 2006.229.12:22:37.63#ibcon#read 5, iclass 7, count 0 2006.229.12:22:37.63#ibcon#about to read 6, iclass 7, count 0 2006.229.12:22:37.63#ibcon#read 6, iclass 7, count 0 2006.229.12:22:37.63#ibcon#end of sib2, iclass 7, count 0 2006.229.12:22:37.63#ibcon#*after write, iclass 7, count 0 2006.229.12:22:37.63#ibcon#*before return 0, iclass 7, count 0 2006.229.12:22:37.63#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:37.63#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:37.63#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:22:37.63#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:22:37.63$vck44/valo=2,534.99 2006.229.12:22:37.63#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:22:37.63#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:22:37.63#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:37.63#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:37.63#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:37.63#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:37.63#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:22:37.63#ibcon#first serial, iclass 11, count 0 2006.229.12:22:37.63#ibcon#enter sib2, iclass 11, count 0 2006.229.12:22:37.64#ibcon#flushed, iclass 11, count 0 2006.229.12:22:37.64#ibcon#about to write, iclass 11, count 0 2006.229.12:22:37.64#ibcon#wrote, iclass 11, count 0 2006.229.12:22:37.64#ibcon#about to read 3, iclass 11, count 0 2006.229.12:22:37.65#ibcon#read 3, iclass 11, count 0 2006.229.12:22:37.65#ibcon#about to read 4, iclass 11, count 0 2006.229.12:22:37.65#ibcon#read 4, iclass 11, count 0 2006.229.12:22:37.65#ibcon#about to read 5, iclass 11, count 0 2006.229.12:22:37.65#ibcon#read 5, iclass 11, count 0 2006.229.12:22:37.65#ibcon#about to read 6, iclass 11, count 0 2006.229.12:22:37.65#ibcon#read 6, iclass 11, count 0 2006.229.12:22:37.65#ibcon#end of sib2, iclass 11, count 0 2006.229.12:22:37.65#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:22:37.65#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:22:37.65#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:22:37.65#ibcon#*before write, iclass 11, count 0 2006.229.12:22:37.65#ibcon#enter sib2, iclass 11, count 0 2006.229.12:22:37.65#ibcon#flushed, iclass 11, count 0 2006.229.12:22:37.65#ibcon#about to write, iclass 11, count 0 2006.229.12:22:37.65#ibcon#wrote, iclass 11, count 0 2006.229.12:22:37.65#ibcon#about to read 3, iclass 11, count 0 2006.229.12:22:37.69#ibcon#read 3, iclass 11, count 0 2006.229.12:22:37.69#ibcon#about to read 4, iclass 11, count 0 2006.229.12:22:37.69#ibcon#read 4, iclass 11, count 0 2006.229.12:22:37.69#ibcon#about to read 5, iclass 11, count 0 2006.229.12:22:37.69#ibcon#read 5, iclass 11, count 0 2006.229.12:22:37.69#ibcon#about to read 6, iclass 11, count 0 2006.229.12:22:37.69#ibcon#read 6, iclass 11, count 0 2006.229.12:22:37.69#ibcon#end of sib2, iclass 11, count 0 2006.229.12:22:37.69#ibcon#*after write, iclass 11, count 0 2006.229.12:22:37.69#ibcon#*before return 0, iclass 11, count 0 2006.229.12:22:37.69#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:37.69#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:37.69#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:22:37.69#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:22:37.69$vck44/va=2,7 2006.229.12:22:37.69#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.12:22:37.69#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.12:22:37.69#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:37.69#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:37.75#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:37.75#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:37.75#ibcon#enter wrdev, iclass 13, count 2 2006.229.12:22:37.75#ibcon#first serial, iclass 13, count 2 2006.229.12:22:37.75#ibcon#enter sib2, iclass 13, count 2 2006.229.12:22:37.75#ibcon#flushed, iclass 13, count 2 2006.229.12:22:37.75#ibcon#about to write, iclass 13, count 2 2006.229.12:22:37.75#ibcon#wrote, iclass 13, count 2 2006.229.12:22:37.75#ibcon#about to read 3, iclass 13, count 2 2006.229.12:22:37.77#ibcon#read 3, iclass 13, count 2 2006.229.12:22:37.77#ibcon#about to read 4, iclass 13, count 2 2006.229.12:22:37.77#ibcon#read 4, iclass 13, count 2 2006.229.12:22:37.77#ibcon#about to read 5, iclass 13, count 2 2006.229.12:22:37.77#ibcon#read 5, iclass 13, count 2 2006.229.12:22:37.77#ibcon#about to read 6, iclass 13, count 2 2006.229.12:22:37.77#ibcon#read 6, iclass 13, count 2 2006.229.12:22:37.77#ibcon#end of sib2, iclass 13, count 2 2006.229.12:22:37.77#ibcon#*mode == 0, iclass 13, count 2 2006.229.12:22:37.77#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.12:22:37.77#ibcon#[25=AT02-07\r\n] 2006.229.12:22:37.77#ibcon#*before write, iclass 13, count 2 2006.229.12:22:37.77#ibcon#enter sib2, iclass 13, count 2 2006.229.12:22:37.77#ibcon#flushed, iclass 13, count 2 2006.229.12:22:37.77#ibcon#about to write, iclass 13, count 2 2006.229.12:22:37.77#ibcon#wrote, iclass 13, count 2 2006.229.12:22:37.77#ibcon#about to read 3, iclass 13, count 2 2006.229.12:22:37.80#ibcon#read 3, iclass 13, count 2 2006.229.12:22:37.80#ibcon#about to read 4, iclass 13, count 2 2006.229.12:22:37.80#ibcon#read 4, iclass 13, count 2 2006.229.12:22:37.80#ibcon#about to read 5, iclass 13, count 2 2006.229.12:22:37.80#ibcon#read 5, iclass 13, count 2 2006.229.12:22:37.80#ibcon#about to read 6, iclass 13, count 2 2006.229.12:22:37.80#ibcon#read 6, iclass 13, count 2 2006.229.12:22:37.80#ibcon#end of sib2, iclass 13, count 2 2006.229.12:22:37.80#ibcon#*after write, iclass 13, count 2 2006.229.12:22:37.80#ibcon#*before return 0, iclass 13, count 2 2006.229.12:22:37.80#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:37.80#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:37.80#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.12:22:37.80#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:37.80#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:37.92#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:37.92#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:37.92#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:22:37.92#ibcon#first serial, iclass 13, count 0 2006.229.12:22:37.92#ibcon#enter sib2, iclass 13, count 0 2006.229.12:22:37.92#ibcon#flushed, iclass 13, count 0 2006.229.12:22:37.92#ibcon#about to write, iclass 13, count 0 2006.229.12:22:37.92#ibcon#wrote, iclass 13, count 0 2006.229.12:22:37.92#ibcon#about to read 3, iclass 13, count 0 2006.229.12:22:37.94#ibcon#read 3, iclass 13, count 0 2006.229.12:22:37.94#ibcon#about to read 4, iclass 13, count 0 2006.229.12:22:37.94#ibcon#read 4, iclass 13, count 0 2006.229.12:22:37.94#ibcon#about to read 5, iclass 13, count 0 2006.229.12:22:37.94#ibcon#read 5, iclass 13, count 0 2006.229.12:22:37.94#ibcon#about to read 6, iclass 13, count 0 2006.229.12:22:37.94#ibcon#read 6, iclass 13, count 0 2006.229.12:22:37.94#ibcon#end of sib2, iclass 13, count 0 2006.229.12:22:37.94#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:22:37.94#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:22:37.94#ibcon#[25=USB\r\n] 2006.229.12:22:37.94#ibcon#*before write, iclass 13, count 0 2006.229.12:22:37.94#ibcon#enter sib2, iclass 13, count 0 2006.229.12:22:37.94#ibcon#flushed, iclass 13, count 0 2006.229.12:22:37.94#ibcon#about to write, iclass 13, count 0 2006.229.12:22:37.94#ibcon#wrote, iclass 13, count 0 2006.229.12:22:37.94#ibcon#about to read 3, iclass 13, count 0 2006.229.12:22:37.97#ibcon#read 3, iclass 13, count 0 2006.229.12:22:37.97#ibcon#about to read 4, iclass 13, count 0 2006.229.12:22:37.97#ibcon#read 4, iclass 13, count 0 2006.229.12:22:37.97#ibcon#about to read 5, iclass 13, count 0 2006.229.12:22:37.97#ibcon#read 5, iclass 13, count 0 2006.229.12:22:37.97#ibcon#about to read 6, iclass 13, count 0 2006.229.12:22:37.97#ibcon#read 6, iclass 13, count 0 2006.229.12:22:37.97#ibcon#end of sib2, iclass 13, count 0 2006.229.12:22:37.97#ibcon#*after write, iclass 13, count 0 2006.229.12:22:37.97#ibcon#*before return 0, iclass 13, count 0 2006.229.12:22:37.97#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:37.97#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:37.97#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:22:37.97#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:22:37.97$vck44/valo=3,564.99 2006.229.12:22:37.97#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.12:22:37.97#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.12:22:37.97#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:37.97#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:37.97#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:37.97#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:37.97#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:22:37.97#ibcon#first serial, iclass 15, count 0 2006.229.12:22:37.97#ibcon#enter sib2, iclass 15, count 0 2006.229.12:22:37.97#ibcon#flushed, iclass 15, count 0 2006.229.12:22:37.97#ibcon#about to write, iclass 15, count 0 2006.229.12:22:37.98#ibcon#wrote, iclass 15, count 0 2006.229.12:22:37.98#ibcon#about to read 3, iclass 15, count 0 2006.229.12:22:37.99#ibcon#read 3, iclass 15, count 0 2006.229.12:22:37.99#ibcon#about to read 4, iclass 15, count 0 2006.229.12:22:37.99#ibcon#read 4, iclass 15, count 0 2006.229.12:22:37.99#ibcon#about to read 5, iclass 15, count 0 2006.229.12:22:37.99#ibcon#read 5, iclass 15, count 0 2006.229.12:22:37.99#ibcon#about to read 6, iclass 15, count 0 2006.229.12:22:37.99#ibcon#read 6, iclass 15, count 0 2006.229.12:22:37.99#ibcon#end of sib2, iclass 15, count 0 2006.229.12:22:37.99#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:22:37.99#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:22:37.99#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:22:37.99#ibcon#*before write, iclass 15, count 0 2006.229.12:22:37.99#ibcon#enter sib2, iclass 15, count 0 2006.229.12:22:37.99#ibcon#flushed, iclass 15, count 0 2006.229.12:22:37.99#ibcon#about to write, iclass 15, count 0 2006.229.12:22:37.99#ibcon#wrote, iclass 15, count 0 2006.229.12:22:37.99#ibcon#about to read 3, iclass 15, count 0 2006.229.12:22:38.03#ibcon#read 3, iclass 15, count 0 2006.229.12:22:38.03#ibcon#about to read 4, iclass 15, count 0 2006.229.12:22:38.03#ibcon#read 4, iclass 15, count 0 2006.229.12:22:38.03#ibcon#about to read 5, iclass 15, count 0 2006.229.12:22:38.03#ibcon#read 5, iclass 15, count 0 2006.229.12:22:38.03#ibcon#about to read 6, iclass 15, count 0 2006.229.12:22:38.03#ibcon#read 6, iclass 15, count 0 2006.229.12:22:38.03#ibcon#end of sib2, iclass 15, count 0 2006.229.12:22:38.03#ibcon#*after write, iclass 15, count 0 2006.229.12:22:38.03#ibcon#*before return 0, iclass 15, count 0 2006.229.12:22:38.03#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:38.03#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:38.03#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:22:38.03#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:22:38.03$vck44/va=3,6 2006.229.12:22:38.03#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.12:22:38.03#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.12:22:38.03#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:38.03#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:38.09#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:38.09#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:38.09#ibcon#enter wrdev, iclass 17, count 2 2006.229.12:22:38.09#ibcon#first serial, iclass 17, count 2 2006.229.12:22:38.09#ibcon#enter sib2, iclass 17, count 2 2006.229.12:22:38.09#ibcon#flushed, iclass 17, count 2 2006.229.12:22:38.09#ibcon#about to write, iclass 17, count 2 2006.229.12:22:38.09#ibcon#wrote, iclass 17, count 2 2006.229.12:22:38.09#ibcon#about to read 3, iclass 17, count 2 2006.229.12:22:38.11#ibcon#read 3, iclass 17, count 2 2006.229.12:22:38.11#ibcon#about to read 4, iclass 17, count 2 2006.229.12:22:38.11#ibcon#read 4, iclass 17, count 2 2006.229.12:22:38.11#ibcon#about to read 5, iclass 17, count 2 2006.229.12:22:38.11#ibcon#read 5, iclass 17, count 2 2006.229.12:22:38.11#ibcon#about to read 6, iclass 17, count 2 2006.229.12:22:38.11#ibcon#read 6, iclass 17, count 2 2006.229.12:22:38.11#ibcon#end of sib2, iclass 17, count 2 2006.229.12:22:38.11#ibcon#*mode == 0, iclass 17, count 2 2006.229.12:22:38.11#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.12:22:38.11#ibcon#[25=AT03-06\r\n] 2006.229.12:22:38.11#ibcon#*before write, iclass 17, count 2 2006.229.12:22:38.11#ibcon#enter sib2, iclass 17, count 2 2006.229.12:22:38.11#ibcon#flushed, iclass 17, count 2 2006.229.12:22:38.11#ibcon#about to write, iclass 17, count 2 2006.229.12:22:38.11#ibcon#wrote, iclass 17, count 2 2006.229.12:22:38.11#ibcon#about to read 3, iclass 17, count 2 2006.229.12:22:38.14#ibcon#read 3, iclass 17, count 2 2006.229.12:22:38.14#ibcon#about to read 4, iclass 17, count 2 2006.229.12:22:38.14#ibcon#read 4, iclass 17, count 2 2006.229.12:22:38.14#ibcon#about to read 5, iclass 17, count 2 2006.229.12:22:38.14#ibcon#read 5, iclass 17, count 2 2006.229.12:22:38.14#ibcon#about to read 6, iclass 17, count 2 2006.229.12:22:38.14#ibcon#read 6, iclass 17, count 2 2006.229.12:22:38.14#ibcon#end of sib2, iclass 17, count 2 2006.229.12:22:38.14#ibcon#*after write, iclass 17, count 2 2006.229.12:22:38.14#ibcon#*before return 0, iclass 17, count 2 2006.229.12:22:38.14#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:38.14#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:38.14#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.12:22:38.14#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:38.14#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:38.26#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:38.26#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:38.26#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:22:38.26#ibcon#first serial, iclass 17, count 0 2006.229.12:22:38.26#ibcon#enter sib2, iclass 17, count 0 2006.229.12:22:38.26#ibcon#flushed, iclass 17, count 0 2006.229.12:22:38.26#ibcon#about to write, iclass 17, count 0 2006.229.12:22:38.26#ibcon#wrote, iclass 17, count 0 2006.229.12:22:38.26#ibcon#about to read 3, iclass 17, count 0 2006.229.12:22:38.28#ibcon#read 3, iclass 17, count 0 2006.229.12:22:38.28#ibcon#about to read 4, iclass 17, count 0 2006.229.12:22:38.28#ibcon#read 4, iclass 17, count 0 2006.229.12:22:38.28#ibcon#about to read 5, iclass 17, count 0 2006.229.12:22:38.28#ibcon#read 5, iclass 17, count 0 2006.229.12:22:38.28#ibcon#about to read 6, iclass 17, count 0 2006.229.12:22:38.28#ibcon#read 6, iclass 17, count 0 2006.229.12:22:38.28#ibcon#end of sib2, iclass 17, count 0 2006.229.12:22:38.28#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:22:38.28#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:22:38.28#ibcon#[25=USB\r\n] 2006.229.12:22:38.28#ibcon#*before write, iclass 17, count 0 2006.229.12:22:38.28#ibcon#enter sib2, iclass 17, count 0 2006.229.12:22:38.28#ibcon#flushed, iclass 17, count 0 2006.229.12:22:38.28#ibcon#about to write, iclass 17, count 0 2006.229.12:22:38.28#ibcon#wrote, iclass 17, count 0 2006.229.12:22:38.28#ibcon#about to read 3, iclass 17, count 0 2006.229.12:22:38.31#ibcon#read 3, iclass 17, count 0 2006.229.12:22:38.31#ibcon#about to read 4, iclass 17, count 0 2006.229.12:22:38.31#ibcon#read 4, iclass 17, count 0 2006.229.12:22:38.31#ibcon#about to read 5, iclass 17, count 0 2006.229.12:22:38.31#ibcon#read 5, iclass 17, count 0 2006.229.12:22:38.31#ibcon#about to read 6, iclass 17, count 0 2006.229.12:22:38.31#ibcon#read 6, iclass 17, count 0 2006.229.12:22:38.31#ibcon#end of sib2, iclass 17, count 0 2006.229.12:22:38.31#ibcon#*after write, iclass 17, count 0 2006.229.12:22:38.31#ibcon#*before return 0, iclass 17, count 0 2006.229.12:22:38.31#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:38.31#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:38.31#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:22:38.31#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:22:38.31$vck44/valo=4,624.99 2006.229.12:22:38.31#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:22:38.31#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:22:38.31#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:38.31#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:38.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:38.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:38.31#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:22:38.31#ibcon#first serial, iclass 19, count 0 2006.229.12:22:38.31#ibcon#enter sib2, iclass 19, count 0 2006.229.12:22:38.31#ibcon#flushed, iclass 19, count 0 2006.229.12:22:38.32#ibcon#about to write, iclass 19, count 0 2006.229.12:22:38.32#ibcon#wrote, iclass 19, count 0 2006.229.12:22:38.32#ibcon#about to read 3, iclass 19, count 0 2006.229.12:22:38.33#ibcon#read 3, iclass 19, count 0 2006.229.12:22:38.33#ibcon#about to read 4, iclass 19, count 0 2006.229.12:22:38.33#ibcon#read 4, iclass 19, count 0 2006.229.12:22:38.33#ibcon#about to read 5, iclass 19, count 0 2006.229.12:22:38.33#ibcon#read 5, iclass 19, count 0 2006.229.12:22:38.33#ibcon#about to read 6, iclass 19, count 0 2006.229.12:22:38.33#ibcon#read 6, iclass 19, count 0 2006.229.12:22:38.33#ibcon#end of sib2, iclass 19, count 0 2006.229.12:22:38.33#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:22:38.33#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:22:38.33#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:22:38.33#ibcon#*before write, iclass 19, count 0 2006.229.12:22:38.33#ibcon#enter sib2, iclass 19, count 0 2006.229.12:22:38.33#ibcon#flushed, iclass 19, count 0 2006.229.12:22:38.33#ibcon#about to write, iclass 19, count 0 2006.229.12:22:38.33#ibcon#wrote, iclass 19, count 0 2006.229.12:22:38.33#ibcon#about to read 3, iclass 19, count 0 2006.229.12:22:38.37#ibcon#read 3, iclass 19, count 0 2006.229.12:22:38.37#ibcon#about to read 4, iclass 19, count 0 2006.229.12:22:38.37#ibcon#read 4, iclass 19, count 0 2006.229.12:22:38.37#ibcon#about to read 5, iclass 19, count 0 2006.229.12:22:38.37#ibcon#read 5, iclass 19, count 0 2006.229.12:22:38.37#ibcon#about to read 6, iclass 19, count 0 2006.229.12:22:38.37#ibcon#read 6, iclass 19, count 0 2006.229.12:22:38.37#ibcon#end of sib2, iclass 19, count 0 2006.229.12:22:38.37#ibcon#*after write, iclass 19, count 0 2006.229.12:22:38.37#ibcon#*before return 0, iclass 19, count 0 2006.229.12:22:38.37#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:38.37#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:38.37#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:22:38.37#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:22:38.37$vck44/va=4,7 2006.229.12:22:38.37#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.12:22:38.37#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.12:22:38.37#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:38.37#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:38.43#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:38.43#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:38.43#ibcon#enter wrdev, iclass 21, count 2 2006.229.12:22:38.43#ibcon#first serial, iclass 21, count 2 2006.229.12:22:38.43#ibcon#enter sib2, iclass 21, count 2 2006.229.12:22:38.43#ibcon#flushed, iclass 21, count 2 2006.229.12:22:38.43#ibcon#about to write, iclass 21, count 2 2006.229.12:22:38.43#ibcon#wrote, iclass 21, count 2 2006.229.12:22:38.43#ibcon#about to read 3, iclass 21, count 2 2006.229.12:22:38.45#ibcon#read 3, iclass 21, count 2 2006.229.12:22:38.45#ibcon#about to read 4, iclass 21, count 2 2006.229.12:22:38.45#ibcon#read 4, iclass 21, count 2 2006.229.12:22:38.45#ibcon#about to read 5, iclass 21, count 2 2006.229.12:22:38.45#ibcon#read 5, iclass 21, count 2 2006.229.12:22:38.45#ibcon#about to read 6, iclass 21, count 2 2006.229.12:22:38.45#ibcon#read 6, iclass 21, count 2 2006.229.12:22:38.45#ibcon#end of sib2, iclass 21, count 2 2006.229.12:22:38.45#ibcon#*mode == 0, iclass 21, count 2 2006.229.12:22:38.45#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.12:22:38.45#ibcon#[25=AT04-07\r\n] 2006.229.12:22:38.45#ibcon#*before write, iclass 21, count 2 2006.229.12:22:38.45#ibcon#enter sib2, iclass 21, count 2 2006.229.12:22:38.45#ibcon#flushed, iclass 21, count 2 2006.229.12:22:38.45#ibcon#about to write, iclass 21, count 2 2006.229.12:22:38.45#ibcon#wrote, iclass 21, count 2 2006.229.12:22:38.45#ibcon#about to read 3, iclass 21, count 2 2006.229.12:22:38.48#ibcon#read 3, iclass 21, count 2 2006.229.12:22:38.48#ibcon#about to read 4, iclass 21, count 2 2006.229.12:22:38.48#ibcon#read 4, iclass 21, count 2 2006.229.12:22:38.48#ibcon#about to read 5, iclass 21, count 2 2006.229.12:22:38.48#ibcon#read 5, iclass 21, count 2 2006.229.12:22:38.48#ibcon#about to read 6, iclass 21, count 2 2006.229.12:22:38.48#ibcon#read 6, iclass 21, count 2 2006.229.12:22:38.48#ibcon#end of sib2, iclass 21, count 2 2006.229.12:22:38.48#ibcon#*after write, iclass 21, count 2 2006.229.12:22:38.48#ibcon#*before return 0, iclass 21, count 2 2006.229.12:22:38.48#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:38.48#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:38.48#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.12:22:38.48#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:38.48#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:38.60#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:38.60#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:38.60#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:22:38.60#ibcon#first serial, iclass 21, count 0 2006.229.12:22:38.60#ibcon#enter sib2, iclass 21, count 0 2006.229.12:22:38.60#ibcon#flushed, iclass 21, count 0 2006.229.12:22:38.60#ibcon#about to write, iclass 21, count 0 2006.229.12:22:38.60#ibcon#wrote, iclass 21, count 0 2006.229.12:22:38.60#ibcon#about to read 3, iclass 21, count 0 2006.229.12:22:38.62#ibcon#read 3, iclass 21, count 0 2006.229.12:22:38.62#ibcon#about to read 4, iclass 21, count 0 2006.229.12:22:38.62#ibcon#read 4, iclass 21, count 0 2006.229.12:22:38.62#ibcon#about to read 5, iclass 21, count 0 2006.229.12:22:38.62#ibcon#read 5, iclass 21, count 0 2006.229.12:22:38.62#ibcon#about to read 6, iclass 21, count 0 2006.229.12:22:38.62#ibcon#read 6, iclass 21, count 0 2006.229.12:22:38.62#ibcon#end of sib2, iclass 21, count 0 2006.229.12:22:38.62#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:22:38.62#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:22:38.62#ibcon#[25=USB\r\n] 2006.229.12:22:38.62#ibcon#*before write, iclass 21, count 0 2006.229.12:22:38.62#ibcon#enter sib2, iclass 21, count 0 2006.229.12:22:38.62#ibcon#flushed, iclass 21, count 0 2006.229.12:22:38.62#ibcon#about to write, iclass 21, count 0 2006.229.12:22:38.62#ibcon#wrote, iclass 21, count 0 2006.229.12:22:38.62#ibcon#about to read 3, iclass 21, count 0 2006.229.12:22:38.65#ibcon#read 3, iclass 21, count 0 2006.229.12:22:38.65#ibcon#about to read 4, iclass 21, count 0 2006.229.12:22:38.65#ibcon#read 4, iclass 21, count 0 2006.229.12:22:38.65#ibcon#about to read 5, iclass 21, count 0 2006.229.12:22:38.65#ibcon#read 5, iclass 21, count 0 2006.229.12:22:38.65#ibcon#about to read 6, iclass 21, count 0 2006.229.12:22:38.65#ibcon#read 6, iclass 21, count 0 2006.229.12:22:38.65#ibcon#end of sib2, iclass 21, count 0 2006.229.12:22:38.65#ibcon#*after write, iclass 21, count 0 2006.229.12:22:38.65#ibcon#*before return 0, iclass 21, count 0 2006.229.12:22:38.65#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:38.65#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:38.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:22:38.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:22:38.65$vck44/valo=5,734.99 2006.229.12:22:38.65#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.12:22:38.65#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.12:22:38.66#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:38.66#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:38.66#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:38.66#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:38.66#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:22:38.66#ibcon#first serial, iclass 23, count 0 2006.229.12:22:38.66#ibcon#enter sib2, iclass 23, count 0 2006.229.12:22:38.66#ibcon#flushed, iclass 23, count 0 2006.229.12:22:38.66#ibcon#about to write, iclass 23, count 0 2006.229.12:22:38.66#ibcon#wrote, iclass 23, count 0 2006.229.12:22:38.66#ibcon#about to read 3, iclass 23, count 0 2006.229.12:22:38.67#ibcon#read 3, iclass 23, count 0 2006.229.12:22:38.67#ibcon#about to read 4, iclass 23, count 0 2006.229.12:22:38.67#ibcon#read 4, iclass 23, count 0 2006.229.12:22:38.67#ibcon#about to read 5, iclass 23, count 0 2006.229.12:22:38.67#ibcon#read 5, iclass 23, count 0 2006.229.12:22:38.67#ibcon#about to read 6, iclass 23, count 0 2006.229.12:22:38.67#ibcon#read 6, iclass 23, count 0 2006.229.12:22:38.67#ibcon#end of sib2, iclass 23, count 0 2006.229.12:22:38.67#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:22:38.67#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:22:38.67#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:22:38.67#ibcon#*before write, iclass 23, count 0 2006.229.12:22:38.67#ibcon#enter sib2, iclass 23, count 0 2006.229.12:22:38.67#ibcon#flushed, iclass 23, count 0 2006.229.12:22:38.67#ibcon#about to write, iclass 23, count 0 2006.229.12:22:38.67#ibcon#wrote, iclass 23, count 0 2006.229.12:22:38.67#ibcon#about to read 3, iclass 23, count 0 2006.229.12:22:38.71#ibcon#read 3, iclass 23, count 0 2006.229.12:22:38.71#ibcon#about to read 4, iclass 23, count 0 2006.229.12:22:38.71#ibcon#read 4, iclass 23, count 0 2006.229.12:22:38.71#ibcon#about to read 5, iclass 23, count 0 2006.229.12:22:38.71#ibcon#read 5, iclass 23, count 0 2006.229.12:22:38.71#ibcon#about to read 6, iclass 23, count 0 2006.229.12:22:38.71#ibcon#read 6, iclass 23, count 0 2006.229.12:22:38.71#ibcon#end of sib2, iclass 23, count 0 2006.229.12:22:38.71#ibcon#*after write, iclass 23, count 0 2006.229.12:22:38.71#ibcon#*before return 0, iclass 23, count 0 2006.229.12:22:38.71#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:38.71#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:38.71#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:22:38.71#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:22:38.71$vck44/va=5,4 2006.229.12:22:38.71#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.12:22:38.71#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.12:22:38.71#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:38.71#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:38.77#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:38.77#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:38.77#ibcon#enter wrdev, iclass 25, count 2 2006.229.12:22:38.77#ibcon#first serial, iclass 25, count 2 2006.229.12:22:38.77#ibcon#enter sib2, iclass 25, count 2 2006.229.12:22:38.77#ibcon#flushed, iclass 25, count 2 2006.229.12:22:38.77#ibcon#about to write, iclass 25, count 2 2006.229.12:22:38.77#ibcon#wrote, iclass 25, count 2 2006.229.12:22:38.77#ibcon#about to read 3, iclass 25, count 2 2006.229.12:22:38.79#ibcon#read 3, iclass 25, count 2 2006.229.12:22:38.79#ibcon#about to read 4, iclass 25, count 2 2006.229.12:22:38.79#ibcon#read 4, iclass 25, count 2 2006.229.12:22:38.79#ibcon#about to read 5, iclass 25, count 2 2006.229.12:22:38.79#ibcon#read 5, iclass 25, count 2 2006.229.12:22:38.79#ibcon#about to read 6, iclass 25, count 2 2006.229.12:22:38.79#ibcon#read 6, iclass 25, count 2 2006.229.12:22:38.79#ibcon#end of sib2, iclass 25, count 2 2006.229.12:22:38.79#ibcon#*mode == 0, iclass 25, count 2 2006.229.12:22:38.79#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.12:22:38.79#ibcon#[25=AT05-04\r\n] 2006.229.12:22:38.79#ibcon#*before write, iclass 25, count 2 2006.229.12:22:38.79#ibcon#enter sib2, iclass 25, count 2 2006.229.12:22:38.79#ibcon#flushed, iclass 25, count 2 2006.229.12:22:38.79#ibcon#about to write, iclass 25, count 2 2006.229.12:22:38.79#ibcon#wrote, iclass 25, count 2 2006.229.12:22:38.79#ibcon#about to read 3, iclass 25, count 2 2006.229.12:22:38.82#ibcon#read 3, iclass 25, count 2 2006.229.12:22:38.82#ibcon#about to read 4, iclass 25, count 2 2006.229.12:22:38.82#ibcon#read 4, iclass 25, count 2 2006.229.12:22:38.82#ibcon#about to read 5, iclass 25, count 2 2006.229.12:22:38.82#ibcon#read 5, iclass 25, count 2 2006.229.12:22:38.82#ibcon#about to read 6, iclass 25, count 2 2006.229.12:22:38.82#ibcon#read 6, iclass 25, count 2 2006.229.12:22:38.82#ibcon#end of sib2, iclass 25, count 2 2006.229.12:22:38.82#ibcon#*after write, iclass 25, count 2 2006.229.12:22:38.82#ibcon#*before return 0, iclass 25, count 2 2006.229.12:22:38.82#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:38.82#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:38.82#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.12:22:38.82#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:38.82#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:38.94#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:38.94#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:38.94#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:22:38.94#ibcon#first serial, iclass 25, count 0 2006.229.12:22:38.94#ibcon#enter sib2, iclass 25, count 0 2006.229.12:22:38.94#ibcon#flushed, iclass 25, count 0 2006.229.12:22:38.94#ibcon#about to write, iclass 25, count 0 2006.229.12:22:38.94#ibcon#wrote, iclass 25, count 0 2006.229.12:22:38.94#ibcon#about to read 3, iclass 25, count 0 2006.229.12:22:38.96#ibcon#read 3, iclass 25, count 0 2006.229.12:22:38.96#ibcon#about to read 4, iclass 25, count 0 2006.229.12:22:38.96#ibcon#read 4, iclass 25, count 0 2006.229.12:22:38.96#ibcon#about to read 5, iclass 25, count 0 2006.229.12:22:38.96#ibcon#read 5, iclass 25, count 0 2006.229.12:22:38.96#ibcon#about to read 6, iclass 25, count 0 2006.229.12:22:38.96#ibcon#read 6, iclass 25, count 0 2006.229.12:22:38.96#ibcon#end of sib2, iclass 25, count 0 2006.229.12:22:38.96#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:22:38.96#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:22:38.96#ibcon#[25=USB\r\n] 2006.229.12:22:38.96#ibcon#*before write, iclass 25, count 0 2006.229.12:22:38.96#ibcon#enter sib2, iclass 25, count 0 2006.229.12:22:38.96#ibcon#flushed, iclass 25, count 0 2006.229.12:22:38.96#ibcon#about to write, iclass 25, count 0 2006.229.12:22:38.96#ibcon#wrote, iclass 25, count 0 2006.229.12:22:38.96#ibcon#about to read 3, iclass 25, count 0 2006.229.12:22:38.99#ibcon#read 3, iclass 25, count 0 2006.229.12:22:38.99#ibcon#about to read 4, iclass 25, count 0 2006.229.12:22:38.99#ibcon#read 4, iclass 25, count 0 2006.229.12:22:38.99#ibcon#about to read 5, iclass 25, count 0 2006.229.12:22:38.99#ibcon#read 5, iclass 25, count 0 2006.229.12:22:38.99#ibcon#about to read 6, iclass 25, count 0 2006.229.12:22:38.99#ibcon#read 6, iclass 25, count 0 2006.229.12:22:38.99#ibcon#end of sib2, iclass 25, count 0 2006.229.12:22:38.99#ibcon#*after write, iclass 25, count 0 2006.229.12:22:38.99#ibcon#*before return 0, iclass 25, count 0 2006.229.12:22:38.99#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:38.99#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:38.99#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:22:38.99#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:22:38.99$vck44/valo=6,814.99 2006.229.12:22:38.99#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.12:22:38.99#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.12:22:38.99#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:38.99#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:38.99#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:38.99#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:38.99#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:22:38.99#ibcon#first serial, iclass 27, count 0 2006.229.12:22:38.99#ibcon#enter sib2, iclass 27, count 0 2006.229.12:22:39.00#ibcon#flushed, iclass 27, count 0 2006.229.12:22:39.00#ibcon#about to write, iclass 27, count 0 2006.229.12:22:39.00#ibcon#wrote, iclass 27, count 0 2006.229.12:22:39.00#ibcon#about to read 3, iclass 27, count 0 2006.229.12:22:39.01#ibcon#read 3, iclass 27, count 0 2006.229.12:22:39.01#ibcon#about to read 4, iclass 27, count 0 2006.229.12:22:39.01#ibcon#read 4, iclass 27, count 0 2006.229.12:22:39.01#ibcon#about to read 5, iclass 27, count 0 2006.229.12:22:39.01#ibcon#read 5, iclass 27, count 0 2006.229.12:22:39.01#ibcon#about to read 6, iclass 27, count 0 2006.229.12:22:39.01#ibcon#read 6, iclass 27, count 0 2006.229.12:22:39.01#ibcon#end of sib2, iclass 27, count 0 2006.229.12:22:39.01#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:22:39.01#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:22:39.01#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:22:39.01#ibcon#*before write, iclass 27, count 0 2006.229.12:22:39.01#ibcon#enter sib2, iclass 27, count 0 2006.229.12:22:39.01#ibcon#flushed, iclass 27, count 0 2006.229.12:22:39.01#ibcon#about to write, iclass 27, count 0 2006.229.12:22:39.01#ibcon#wrote, iclass 27, count 0 2006.229.12:22:39.01#ibcon#about to read 3, iclass 27, count 0 2006.229.12:22:39.05#ibcon#read 3, iclass 27, count 0 2006.229.12:22:39.05#ibcon#about to read 4, iclass 27, count 0 2006.229.12:22:39.05#ibcon#read 4, iclass 27, count 0 2006.229.12:22:39.05#ibcon#about to read 5, iclass 27, count 0 2006.229.12:22:39.05#ibcon#read 5, iclass 27, count 0 2006.229.12:22:39.05#ibcon#about to read 6, iclass 27, count 0 2006.229.12:22:39.05#ibcon#read 6, iclass 27, count 0 2006.229.12:22:39.05#ibcon#end of sib2, iclass 27, count 0 2006.229.12:22:39.05#ibcon#*after write, iclass 27, count 0 2006.229.12:22:39.05#ibcon#*before return 0, iclass 27, count 0 2006.229.12:22:39.05#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:39.05#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:39.05#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:22:39.05#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:22:39.05$vck44/va=6,4 2006.229.12:22:39.05#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.12:22:39.05#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.12:22:39.05#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:39.05#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:39.11#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:39.11#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:39.11#ibcon#enter wrdev, iclass 29, count 2 2006.229.12:22:39.11#ibcon#first serial, iclass 29, count 2 2006.229.12:22:39.11#ibcon#enter sib2, iclass 29, count 2 2006.229.12:22:39.11#ibcon#flushed, iclass 29, count 2 2006.229.12:22:39.11#ibcon#about to write, iclass 29, count 2 2006.229.12:22:39.11#ibcon#wrote, iclass 29, count 2 2006.229.12:22:39.11#ibcon#about to read 3, iclass 29, count 2 2006.229.12:22:39.13#ibcon#read 3, iclass 29, count 2 2006.229.12:22:39.13#ibcon#about to read 4, iclass 29, count 2 2006.229.12:22:39.13#ibcon#read 4, iclass 29, count 2 2006.229.12:22:39.13#ibcon#about to read 5, iclass 29, count 2 2006.229.12:22:39.13#ibcon#read 5, iclass 29, count 2 2006.229.12:22:39.13#ibcon#about to read 6, iclass 29, count 2 2006.229.12:22:39.13#ibcon#read 6, iclass 29, count 2 2006.229.12:22:39.13#ibcon#end of sib2, iclass 29, count 2 2006.229.12:22:39.13#ibcon#*mode == 0, iclass 29, count 2 2006.229.12:22:39.13#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.12:22:39.13#ibcon#[25=AT06-04\r\n] 2006.229.12:22:39.13#ibcon#*before write, iclass 29, count 2 2006.229.12:22:39.13#ibcon#enter sib2, iclass 29, count 2 2006.229.12:22:39.13#ibcon#flushed, iclass 29, count 2 2006.229.12:22:39.13#ibcon#about to write, iclass 29, count 2 2006.229.12:22:39.13#ibcon#wrote, iclass 29, count 2 2006.229.12:22:39.13#ibcon#about to read 3, iclass 29, count 2 2006.229.12:22:39.16#ibcon#read 3, iclass 29, count 2 2006.229.12:22:39.16#ibcon#about to read 4, iclass 29, count 2 2006.229.12:22:39.16#ibcon#read 4, iclass 29, count 2 2006.229.12:22:39.16#ibcon#about to read 5, iclass 29, count 2 2006.229.12:22:39.16#ibcon#read 5, iclass 29, count 2 2006.229.12:22:39.16#ibcon#about to read 6, iclass 29, count 2 2006.229.12:22:39.16#ibcon#read 6, iclass 29, count 2 2006.229.12:22:39.16#ibcon#end of sib2, iclass 29, count 2 2006.229.12:22:39.16#ibcon#*after write, iclass 29, count 2 2006.229.12:22:39.16#ibcon#*before return 0, iclass 29, count 2 2006.229.12:22:39.16#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:39.16#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:39.16#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.12:22:39.16#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:39.16#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:39.28#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:39.28#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:39.28#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:22:39.28#ibcon#first serial, iclass 29, count 0 2006.229.12:22:39.28#ibcon#enter sib2, iclass 29, count 0 2006.229.12:22:39.28#ibcon#flushed, iclass 29, count 0 2006.229.12:22:39.28#ibcon#about to write, iclass 29, count 0 2006.229.12:22:39.28#ibcon#wrote, iclass 29, count 0 2006.229.12:22:39.28#ibcon#about to read 3, iclass 29, count 0 2006.229.12:22:39.30#ibcon#read 3, iclass 29, count 0 2006.229.12:22:39.30#ibcon#about to read 4, iclass 29, count 0 2006.229.12:22:39.30#ibcon#read 4, iclass 29, count 0 2006.229.12:22:39.30#ibcon#about to read 5, iclass 29, count 0 2006.229.12:22:39.30#ibcon#read 5, iclass 29, count 0 2006.229.12:22:39.30#ibcon#about to read 6, iclass 29, count 0 2006.229.12:22:39.30#ibcon#read 6, iclass 29, count 0 2006.229.12:22:39.30#ibcon#end of sib2, iclass 29, count 0 2006.229.12:22:39.30#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:22:39.30#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:22:39.30#ibcon#[25=USB\r\n] 2006.229.12:22:39.30#ibcon#*before write, iclass 29, count 0 2006.229.12:22:39.30#ibcon#enter sib2, iclass 29, count 0 2006.229.12:22:39.30#ibcon#flushed, iclass 29, count 0 2006.229.12:22:39.30#ibcon#about to write, iclass 29, count 0 2006.229.12:22:39.30#ibcon#wrote, iclass 29, count 0 2006.229.12:22:39.30#ibcon#about to read 3, iclass 29, count 0 2006.229.12:22:39.33#ibcon#read 3, iclass 29, count 0 2006.229.12:22:39.33#ibcon#about to read 4, iclass 29, count 0 2006.229.12:22:39.33#ibcon#read 4, iclass 29, count 0 2006.229.12:22:39.33#ibcon#about to read 5, iclass 29, count 0 2006.229.12:22:39.33#ibcon#read 5, iclass 29, count 0 2006.229.12:22:39.33#ibcon#about to read 6, iclass 29, count 0 2006.229.12:22:39.33#ibcon#read 6, iclass 29, count 0 2006.229.12:22:39.33#ibcon#end of sib2, iclass 29, count 0 2006.229.12:22:39.33#ibcon#*after write, iclass 29, count 0 2006.229.12:22:39.33#ibcon#*before return 0, iclass 29, count 0 2006.229.12:22:39.33#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:39.33#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:39.33#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:22:39.33#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:22:39.33$vck44/valo=7,864.99 2006.229.12:22:39.33#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.12:22:39.33#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.12:22:39.33#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:39.33#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:39.33#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:39.33#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:39.33#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:22:39.33#ibcon#first serial, iclass 31, count 0 2006.229.12:22:39.33#ibcon#enter sib2, iclass 31, count 0 2006.229.12:22:39.33#ibcon#flushed, iclass 31, count 0 2006.229.12:22:39.33#ibcon#about to write, iclass 31, count 0 2006.229.12:22:39.34#ibcon#wrote, iclass 31, count 0 2006.229.12:22:39.34#ibcon#about to read 3, iclass 31, count 0 2006.229.12:22:39.35#ibcon#read 3, iclass 31, count 0 2006.229.12:22:39.35#ibcon#about to read 4, iclass 31, count 0 2006.229.12:22:39.35#ibcon#read 4, iclass 31, count 0 2006.229.12:22:39.35#ibcon#about to read 5, iclass 31, count 0 2006.229.12:22:39.35#ibcon#read 5, iclass 31, count 0 2006.229.12:22:39.35#ibcon#about to read 6, iclass 31, count 0 2006.229.12:22:39.35#ibcon#read 6, iclass 31, count 0 2006.229.12:22:39.35#ibcon#end of sib2, iclass 31, count 0 2006.229.12:22:39.35#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:22:39.35#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:22:39.35#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:22:39.35#ibcon#*before write, iclass 31, count 0 2006.229.12:22:39.35#ibcon#enter sib2, iclass 31, count 0 2006.229.12:22:39.35#ibcon#flushed, iclass 31, count 0 2006.229.12:22:39.35#ibcon#about to write, iclass 31, count 0 2006.229.12:22:39.35#ibcon#wrote, iclass 31, count 0 2006.229.12:22:39.35#ibcon#about to read 3, iclass 31, count 0 2006.229.12:22:39.39#ibcon#read 3, iclass 31, count 0 2006.229.12:22:39.39#ibcon#about to read 4, iclass 31, count 0 2006.229.12:22:39.39#ibcon#read 4, iclass 31, count 0 2006.229.12:22:39.39#ibcon#about to read 5, iclass 31, count 0 2006.229.12:22:39.39#ibcon#read 5, iclass 31, count 0 2006.229.12:22:39.39#ibcon#about to read 6, iclass 31, count 0 2006.229.12:22:39.39#ibcon#read 6, iclass 31, count 0 2006.229.12:22:39.39#ibcon#end of sib2, iclass 31, count 0 2006.229.12:22:39.39#ibcon#*after write, iclass 31, count 0 2006.229.12:22:39.39#ibcon#*before return 0, iclass 31, count 0 2006.229.12:22:39.39#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:39.39#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:39.39#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:22:39.39#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:22:39.39$vck44/va=7,5 2006.229.12:22:39.39#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.12:22:39.39#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.12:22:39.39#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:39.39#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:39.45#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:39.45#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:39.45#ibcon#enter wrdev, iclass 33, count 2 2006.229.12:22:39.45#ibcon#first serial, iclass 33, count 2 2006.229.12:22:39.45#ibcon#enter sib2, iclass 33, count 2 2006.229.12:22:39.45#ibcon#flushed, iclass 33, count 2 2006.229.12:22:39.45#ibcon#about to write, iclass 33, count 2 2006.229.12:22:39.45#ibcon#wrote, iclass 33, count 2 2006.229.12:22:39.45#ibcon#about to read 3, iclass 33, count 2 2006.229.12:22:39.47#ibcon#read 3, iclass 33, count 2 2006.229.12:22:39.47#ibcon#about to read 4, iclass 33, count 2 2006.229.12:22:39.47#ibcon#read 4, iclass 33, count 2 2006.229.12:22:39.47#ibcon#about to read 5, iclass 33, count 2 2006.229.12:22:39.47#ibcon#read 5, iclass 33, count 2 2006.229.12:22:39.47#ibcon#about to read 6, iclass 33, count 2 2006.229.12:22:39.47#ibcon#read 6, iclass 33, count 2 2006.229.12:22:39.47#ibcon#end of sib2, iclass 33, count 2 2006.229.12:22:39.47#ibcon#*mode == 0, iclass 33, count 2 2006.229.12:22:39.47#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.12:22:39.47#ibcon#[25=AT07-05\r\n] 2006.229.12:22:39.47#ibcon#*before write, iclass 33, count 2 2006.229.12:22:39.47#ibcon#enter sib2, iclass 33, count 2 2006.229.12:22:39.47#ibcon#flushed, iclass 33, count 2 2006.229.12:22:39.47#ibcon#about to write, iclass 33, count 2 2006.229.12:22:39.47#ibcon#wrote, iclass 33, count 2 2006.229.12:22:39.47#ibcon#about to read 3, iclass 33, count 2 2006.229.12:22:39.50#ibcon#read 3, iclass 33, count 2 2006.229.12:22:39.50#ibcon#about to read 4, iclass 33, count 2 2006.229.12:22:39.50#ibcon#read 4, iclass 33, count 2 2006.229.12:22:39.50#ibcon#about to read 5, iclass 33, count 2 2006.229.12:22:39.50#ibcon#read 5, iclass 33, count 2 2006.229.12:22:39.50#ibcon#about to read 6, iclass 33, count 2 2006.229.12:22:39.50#ibcon#read 6, iclass 33, count 2 2006.229.12:22:39.50#ibcon#end of sib2, iclass 33, count 2 2006.229.12:22:39.50#ibcon#*after write, iclass 33, count 2 2006.229.12:22:39.50#ibcon#*before return 0, iclass 33, count 2 2006.229.12:22:39.50#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:39.50#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:39.50#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.12:22:39.50#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:39.50#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:39.62#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:39.62#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:39.62#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:22:39.62#ibcon#first serial, iclass 33, count 0 2006.229.12:22:39.62#ibcon#enter sib2, iclass 33, count 0 2006.229.12:22:39.62#ibcon#flushed, iclass 33, count 0 2006.229.12:22:39.62#ibcon#about to write, iclass 33, count 0 2006.229.12:22:39.62#ibcon#wrote, iclass 33, count 0 2006.229.12:22:39.62#ibcon#about to read 3, iclass 33, count 0 2006.229.12:22:39.64#ibcon#read 3, iclass 33, count 0 2006.229.12:22:39.64#ibcon#about to read 4, iclass 33, count 0 2006.229.12:22:39.64#ibcon#read 4, iclass 33, count 0 2006.229.12:22:39.64#ibcon#about to read 5, iclass 33, count 0 2006.229.12:22:39.64#ibcon#read 5, iclass 33, count 0 2006.229.12:22:39.64#ibcon#about to read 6, iclass 33, count 0 2006.229.12:22:39.64#ibcon#read 6, iclass 33, count 0 2006.229.12:22:39.64#ibcon#end of sib2, iclass 33, count 0 2006.229.12:22:39.64#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:22:39.64#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:22:39.64#ibcon#[25=USB\r\n] 2006.229.12:22:39.64#ibcon#*before write, iclass 33, count 0 2006.229.12:22:39.64#ibcon#enter sib2, iclass 33, count 0 2006.229.12:22:39.64#ibcon#flushed, iclass 33, count 0 2006.229.12:22:39.64#ibcon#about to write, iclass 33, count 0 2006.229.12:22:39.64#ibcon#wrote, iclass 33, count 0 2006.229.12:22:39.64#ibcon#about to read 3, iclass 33, count 0 2006.229.12:22:39.67#ibcon#read 3, iclass 33, count 0 2006.229.12:22:39.67#ibcon#about to read 4, iclass 33, count 0 2006.229.12:22:39.67#ibcon#read 4, iclass 33, count 0 2006.229.12:22:39.67#ibcon#about to read 5, iclass 33, count 0 2006.229.12:22:39.67#ibcon#read 5, iclass 33, count 0 2006.229.12:22:39.67#ibcon#about to read 6, iclass 33, count 0 2006.229.12:22:39.67#ibcon#read 6, iclass 33, count 0 2006.229.12:22:39.67#ibcon#end of sib2, iclass 33, count 0 2006.229.12:22:39.67#ibcon#*after write, iclass 33, count 0 2006.229.12:22:39.67#ibcon#*before return 0, iclass 33, count 0 2006.229.12:22:39.67#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:39.67#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:39.67#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:22:39.67#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:22:39.67$vck44/valo=8,884.99 2006.229.12:22:39.67#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.12:22:39.67#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.12:22:39.67#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:39.67#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:39.67#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:39.67#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:39.67#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:22:39.67#ibcon#first serial, iclass 35, count 0 2006.229.12:22:39.67#ibcon#enter sib2, iclass 35, count 0 2006.229.12:22:39.68#ibcon#flushed, iclass 35, count 0 2006.229.12:22:39.68#ibcon#about to write, iclass 35, count 0 2006.229.12:22:39.68#ibcon#wrote, iclass 35, count 0 2006.229.12:22:39.68#ibcon#about to read 3, iclass 35, count 0 2006.229.12:22:39.69#ibcon#read 3, iclass 35, count 0 2006.229.12:22:39.69#ibcon#about to read 4, iclass 35, count 0 2006.229.12:22:39.69#ibcon#read 4, iclass 35, count 0 2006.229.12:22:39.69#ibcon#about to read 5, iclass 35, count 0 2006.229.12:22:39.69#ibcon#read 5, iclass 35, count 0 2006.229.12:22:39.69#ibcon#about to read 6, iclass 35, count 0 2006.229.12:22:39.69#ibcon#read 6, iclass 35, count 0 2006.229.12:22:39.69#ibcon#end of sib2, iclass 35, count 0 2006.229.12:22:39.69#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:22:39.69#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:22:39.69#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:22:39.69#ibcon#*before write, iclass 35, count 0 2006.229.12:22:39.69#ibcon#enter sib2, iclass 35, count 0 2006.229.12:22:39.69#ibcon#flushed, iclass 35, count 0 2006.229.12:22:39.69#ibcon#about to write, iclass 35, count 0 2006.229.12:22:39.69#ibcon#wrote, iclass 35, count 0 2006.229.12:22:39.69#ibcon#about to read 3, iclass 35, count 0 2006.229.12:22:39.73#ibcon#read 3, iclass 35, count 0 2006.229.12:22:39.73#ibcon#about to read 4, iclass 35, count 0 2006.229.12:22:39.73#ibcon#read 4, iclass 35, count 0 2006.229.12:22:39.73#ibcon#about to read 5, iclass 35, count 0 2006.229.12:22:39.73#ibcon#read 5, iclass 35, count 0 2006.229.12:22:39.73#ibcon#about to read 6, iclass 35, count 0 2006.229.12:22:39.73#ibcon#read 6, iclass 35, count 0 2006.229.12:22:39.73#ibcon#end of sib2, iclass 35, count 0 2006.229.12:22:39.73#ibcon#*after write, iclass 35, count 0 2006.229.12:22:39.73#ibcon#*before return 0, iclass 35, count 0 2006.229.12:22:39.73#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:39.73#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:39.73#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:22:39.73#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:22:39.73$vck44/va=8,6 2006.229.12:22:39.73#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.12:22:39.73#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.12:22:39.73#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:39.73#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:22:39.79#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:22:39.79#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:22:39.79#ibcon#enter wrdev, iclass 37, count 2 2006.229.12:22:39.79#ibcon#first serial, iclass 37, count 2 2006.229.12:22:39.79#ibcon#enter sib2, iclass 37, count 2 2006.229.12:22:39.79#ibcon#flushed, iclass 37, count 2 2006.229.12:22:39.79#ibcon#about to write, iclass 37, count 2 2006.229.12:22:39.79#ibcon#wrote, iclass 37, count 2 2006.229.12:22:39.79#ibcon#about to read 3, iclass 37, count 2 2006.229.12:22:39.81#ibcon#read 3, iclass 37, count 2 2006.229.12:22:39.81#ibcon#about to read 4, iclass 37, count 2 2006.229.12:22:39.81#ibcon#read 4, iclass 37, count 2 2006.229.12:22:39.81#ibcon#about to read 5, iclass 37, count 2 2006.229.12:22:39.81#ibcon#read 5, iclass 37, count 2 2006.229.12:22:39.81#ibcon#about to read 6, iclass 37, count 2 2006.229.12:22:39.81#ibcon#read 6, iclass 37, count 2 2006.229.12:22:39.81#ibcon#end of sib2, iclass 37, count 2 2006.229.12:22:39.81#ibcon#*mode == 0, iclass 37, count 2 2006.229.12:22:39.81#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.12:22:39.81#ibcon#[25=AT08-06\r\n] 2006.229.12:22:39.81#ibcon#*before write, iclass 37, count 2 2006.229.12:22:39.81#ibcon#enter sib2, iclass 37, count 2 2006.229.12:22:39.81#ibcon#flushed, iclass 37, count 2 2006.229.12:22:39.81#ibcon#about to write, iclass 37, count 2 2006.229.12:22:39.81#ibcon#wrote, iclass 37, count 2 2006.229.12:22:39.81#ibcon#about to read 3, iclass 37, count 2 2006.229.12:22:39.84#ibcon#read 3, iclass 37, count 2 2006.229.12:22:39.84#ibcon#about to read 4, iclass 37, count 2 2006.229.12:22:39.84#ibcon#read 4, iclass 37, count 2 2006.229.12:22:39.84#ibcon#about to read 5, iclass 37, count 2 2006.229.12:22:39.84#ibcon#read 5, iclass 37, count 2 2006.229.12:22:39.84#ibcon#about to read 6, iclass 37, count 2 2006.229.12:22:39.84#ibcon#read 6, iclass 37, count 2 2006.229.12:22:39.84#ibcon#end of sib2, iclass 37, count 2 2006.229.12:22:39.84#ibcon#*after write, iclass 37, count 2 2006.229.12:22:39.84#ibcon#*before return 0, iclass 37, count 2 2006.229.12:22:39.84#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:22:39.84#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:22:39.84#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.12:22:39.84#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:39.84#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:22:39.96#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:22:39.96#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:22:39.96#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:22:39.96#ibcon#first serial, iclass 37, count 0 2006.229.12:22:39.96#ibcon#enter sib2, iclass 37, count 0 2006.229.12:22:39.96#ibcon#flushed, iclass 37, count 0 2006.229.12:22:39.96#ibcon#about to write, iclass 37, count 0 2006.229.12:22:39.96#ibcon#wrote, iclass 37, count 0 2006.229.12:22:39.96#ibcon#about to read 3, iclass 37, count 0 2006.229.12:22:39.98#ibcon#read 3, iclass 37, count 0 2006.229.12:22:39.98#ibcon#about to read 4, iclass 37, count 0 2006.229.12:22:39.98#ibcon#read 4, iclass 37, count 0 2006.229.12:22:39.98#ibcon#about to read 5, iclass 37, count 0 2006.229.12:22:39.98#ibcon#read 5, iclass 37, count 0 2006.229.12:22:39.98#ibcon#about to read 6, iclass 37, count 0 2006.229.12:22:39.98#ibcon#read 6, iclass 37, count 0 2006.229.12:22:39.98#ibcon#end of sib2, iclass 37, count 0 2006.229.12:22:39.98#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:22:39.98#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:22:39.98#ibcon#[25=USB\r\n] 2006.229.12:22:39.98#ibcon#*before write, iclass 37, count 0 2006.229.12:22:39.98#ibcon#enter sib2, iclass 37, count 0 2006.229.12:22:39.98#ibcon#flushed, iclass 37, count 0 2006.229.12:22:39.98#ibcon#about to write, iclass 37, count 0 2006.229.12:22:39.98#ibcon#wrote, iclass 37, count 0 2006.229.12:22:39.98#ibcon#about to read 3, iclass 37, count 0 2006.229.12:22:40.01#ibcon#read 3, iclass 37, count 0 2006.229.12:22:40.01#ibcon#about to read 4, iclass 37, count 0 2006.229.12:22:40.01#ibcon#read 4, iclass 37, count 0 2006.229.12:22:40.01#ibcon#about to read 5, iclass 37, count 0 2006.229.12:22:40.01#ibcon#read 5, iclass 37, count 0 2006.229.12:22:40.01#ibcon#about to read 6, iclass 37, count 0 2006.229.12:22:40.01#ibcon#read 6, iclass 37, count 0 2006.229.12:22:40.01#ibcon#end of sib2, iclass 37, count 0 2006.229.12:22:40.01#ibcon#*after write, iclass 37, count 0 2006.229.12:22:40.01#ibcon#*before return 0, iclass 37, count 0 2006.229.12:22:40.01#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:22:40.01#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:22:40.01#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:22:40.01#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:22:40.01$vck44/vblo=1,629.99 2006.229.12:22:40.01#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.12:22:40.01#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.12:22:40.01#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:40.01#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:22:40.01#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:22:40.01#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:22:40.01#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:22:40.01#ibcon#first serial, iclass 39, count 0 2006.229.12:22:40.01#ibcon#enter sib2, iclass 39, count 0 2006.229.12:22:40.02#ibcon#flushed, iclass 39, count 0 2006.229.12:22:40.02#ibcon#about to write, iclass 39, count 0 2006.229.12:22:40.02#ibcon#wrote, iclass 39, count 0 2006.229.12:22:40.02#ibcon#about to read 3, iclass 39, count 0 2006.229.12:22:40.03#ibcon#read 3, iclass 39, count 0 2006.229.12:22:40.03#ibcon#about to read 4, iclass 39, count 0 2006.229.12:22:40.03#ibcon#read 4, iclass 39, count 0 2006.229.12:22:40.03#ibcon#about to read 5, iclass 39, count 0 2006.229.12:22:40.03#ibcon#read 5, iclass 39, count 0 2006.229.12:22:40.03#ibcon#about to read 6, iclass 39, count 0 2006.229.12:22:40.03#ibcon#read 6, iclass 39, count 0 2006.229.12:22:40.03#ibcon#end of sib2, iclass 39, count 0 2006.229.12:22:40.03#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:22:40.03#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:22:40.03#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:22:40.03#ibcon#*before write, iclass 39, count 0 2006.229.12:22:40.03#ibcon#enter sib2, iclass 39, count 0 2006.229.12:22:40.03#ibcon#flushed, iclass 39, count 0 2006.229.12:22:40.03#ibcon#about to write, iclass 39, count 0 2006.229.12:22:40.03#ibcon#wrote, iclass 39, count 0 2006.229.12:22:40.03#ibcon#about to read 3, iclass 39, count 0 2006.229.12:22:40.07#ibcon#read 3, iclass 39, count 0 2006.229.12:22:40.07#ibcon#about to read 4, iclass 39, count 0 2006.229.12:22:40.07#ibcon#read 4, iclass 39, count 0 2006.229.12:22:40.07#ibcon#about to read 5, iclass 39, count 0 2006.229.12:22:40.07#ibcon#read 5, iclass 39, count 0 2006.229.12:22:40.07#ibcon#about to read 6, iclass 39, count 0 2006.229.12:22:40.07#ibcon#read 6, iclass 39, count 0 2006.229.12:22:40.07#ibcon#end of sib2, iclass 39, count 0 2006.229.12:22:40.07#ibcon#*after write, iclass 39, count 0 2006.229.12:22:40.07#ibcon#*before return 0, iclass 39, count 0 2006.229.12:22:40.07#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:22:40.07#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:22:40.07#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:22:40.07#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:22:40.07$vck44/vb=1,4 2006.229.12:22:40.07#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.12:22:40.07#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.12:22:40.07#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:40.07#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:22:40.07#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:22:40.07#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:22:40.07#ibcon#enter wrdev, iclass 3, count 2 2006.229.12:22:40.07#ibcon#first serial, iclass 3, count 2 2006.229.12:22:40.07#ibcon#enter sib2, iclass 3, count 2 2006.229.12:22:40.07#ibcon#flushed, iclass 3, count 2 2006.229.12:22:40.07#ibcon#about to write, iclass 3, count 2 2006.229.12:22:40.08#ibcon#wrote, iclass 3, count 2 2006.229.12:22:40.08#ibcon#about to read 3, iclass 3, count 2 2006.229.12:22:40.09#ibcon#read 3, iclass 3, count 2 2006.229.12:22:40.09#ibcon#about to read 4, iclass 3, count 2 2006.229.12:22:40.09#ibcon#read 4, iclass 3, count 2 2006.229.12:22:40.09#ibcon#about to read 5, iclass 3, count 2 2006.229.12:22:40.09#ibcon#read 5, iclass 3, count 2 2006.229.12:22:40.09#ibcon#about to read 6, iclass 3, count 2 2006.229.12:22:40.09#ibcon#read 6, iclass 3, count 2 2006.229.12:22:40.09#ibcon#end of sib2, iclass 3, count 2 2006.229.12:22:40.09#ibcon#*mode == 0, iclass 3, count 2 2006.229.12:22:40.09#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.12:22:40.09#ibcon#[27=AT01-04\r\n] 2006.229.12:22:40.09#ibcon#*before write, iclass 3, count 2 2006.229.12:22:40.09#ibcon#enter sib2, iclass 3, count 2 2006.229.12:22:40.09#ibcon#flushed, iclass 3, count 2 2006.229.12:22:40.09#ibcon#about to write, iclass 3, count 2 2006.229.12:22:40.09#ibcon#wrote, iclass 3, count 2 2006.229.12:22:40.09#ibcon#about to read 3, iclass 3, count 2 2006.229.12:22:40.12#ibcon#read 3, iclass 3, count 2 2006.229.12:22:40.12#ibcon#about to read 4, iclass 3, count 2 2006.229.12:22:40.12#ibcon#read 4, iclass 3, count 2 2006.229.12:22:40.12#ibcon#about to read 5, iclass 3, count 2 2006.229.12:22:40.12#ibcon#read 5, iclass 3, count 2 2006.229.12:22:40.12#ibcon#about to read 6, iclass 3, count 2 2006.229.12:22:40.12#ibcon#read 6, iclass 3, count 2 2006.229.12:22:40.12#ibcon#end of sib2, iclass 3, count 2 2006.229.12:22:40.12#ibcon#*after write, iclass 3, count 2 2006.229.12:22:40.12#ibcon#*before return 0, iclass 3, count 2 2006.229.12:22:40.12#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:22:40.12#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:22:40.12#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.12:22:40.12#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:40.12#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:22:40.24#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:22:40.24#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:22:40.24#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:22:40.24#ibcon#first serial, iclass 3, count 0 2006.229.12:22:40.24#ibcon#enter sib2, iclass 3, count 0 2006.229.12:22:40.24#ibcon#flushed, iclass 3, count 0 2006.229.12:22:40.24#ibcon#about to write, iclass 3, count 0 2006.229.12:22:40.24#ibcon#wrote, iclass 3, count 0 2006.229.12:22:40.24#ibcon#about to read 3, iclass 3, count 0 2006.229.12:22:40.26#ibcon#read 3, iclass 3, count 0 2006.229.12:22:40.26#ibcon#about to read 4, iclass 3, count 0 2006.229.12:22:40.26#ibcon#read 4, iclass 3, count 0 2006.229.12:22:40.26#ibcon#about to read 5, iclass 3, count 0 2006.229.12:22:40.26#ibcon#read 5, iclass 3, count 0 2006.229.12:22:40.26#ibcon#about to read 6, iclass 3, count 0 2006.229.12:22:40.26#ibcon#read 6, iclass 3, count 0 2006.229.12:22:40.26#ibcon#end of sib2, iclass 3, count 0 2006.229.12:22:40.26#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:22:40.26#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:22:40.26#ibcon#[27=USB\r\n] 2006.229.12:22:40.26#ibcon#*before write, iclass 3, count 0 2006.229.12:22:40.26#ibcon#enter sib2, iclass 3, count 0 2006.229.12:22:40.26#ibcon#flushed, iclass 3, count 0 2006.229.12:22:40.26#ibcon#about to write, iclass 3, count 0 2006.229.12:22:40.26#ibcon#wrote, iclass 3, count 0 2006.229.12:22:40.26#ibcon#about to read 3, iclass 3, count 0 2006.229.12:22:40.29#ibcon#read 3, iclass 3, count 0 2006.229.12:22:40.29#ibcon#about to read 4, iclass 3, count 0 2006.229.12:22:40.29#ibcon#read 4, iclass 3, count 0 2006.229.12:22:40.29#ibcon#about to read 5, iclass 3, count 0 2006.229.12:22:40.29#ibcon#read 5, iclass 3, count 0 2006.229.12:22:40.29#ibcon#about to read 6, iclass 3, count 0 2006.229.12:22:40.29#ibcon#read 6, iclass 3, count 0 2006.229.12:22:40.29#ibcon#end of sib2, iclass 3, count 0 2006.229.12:22:40.29#ibcon#*after write, iclass 3, count 0 2006.229.12:22:40.29#ibcon#*before return 0, iclass 3, count 0 2006.229.12:22:40.29#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:22:40.29#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:22:40.29#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:22:40.29#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:22:40.29$vck44/vblo=2,634.99 2006.229.12:22:40.29#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.12:22:40.29#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.12:22:40.29#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:40.29#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:40.29#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:40.29#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:40.29#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:22:40.29#ibcon#first serial, iclass 5, count 0 2006.229.12:22:40.29#ibcon#enter sib2, iclass 5, count 0 2006.229.12:22:40.29#ibcon#flushed, iclass 5, count 0 2006.229.12:22:40.29#ibcon#about to write, iclass 5, count 0 2006.229.12:22:40.30#ibcon#wrote, iclass 5, count 0 2006.229.12:22:40.30#ibcon#about to read 3, iclass 5, count 0 2006.229.12:22:40.31#ibcon#read 3, iclass 5, count 0 2006.229.12:22:40.31#ibcon#about to read 4, iclass 5, count 0 2006.229.12:22:40.31#ibcon#read 4, iclass 5, count 0 2006.229.12:22:40.31#ibcon#about to read 5, iclass 5, count 0 2006.229.12:22:40.31#ibcon#read 5, iclass 5, count 0 2006.229.12:22:40.31#ibcon#about to read 6, iclass 5, count 0 2006.229.12:22:40.31#ibcon#read 6, iclass 5, count 0 2006.229.12:22:40.31#ibcon#end of sib2, iclass 5, count 0 2006.229.12:22:40.31#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:22:40.31#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:22:40.31#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:22:40.31#ibcon#*before write, iclass 5, count 0 2006.229.12:22:40.31#ibcon#enter sib2, iclass 5, count 0 2006.229.12:22:40.31#ibcon#flushed, iclass 5, count 0 2006.229.12:22:40.31#ibcon#about to write, iclass 5, count 0 2006.229.12:22:40.31#ibcon#wrote, iclass 5, count 0 2006.229.12:22:40.31#ibcon#about to read 3, iclass 5, count 0 2006.229.12:22:40.35#ibcon#read 3, iclass 5, count 0 2006.229.12:22:40.35#ibcon#about to read 4, iclass 5, count 0 2006.229.12:22:40.35#ibcon#read 4, iclass 5, count 0 2006.229.12:22:40.35#ibcon#about to read 5, iclass 5, count 0 2006.229.12:22:40.35#ibcon#read 5, iclass 5, count 0 2006.229.12:22:40.35#ibcon#about to read 6, iclass 5, count 0 2006.229.12:22:40.35#ibcon#read 6, iclass 5, count 0 2006.229.12:22:40.35#ibcon#end of sib2, iclass 5, count 0 2006.229.12:22:40.35#ibcon#*after write, iclass 5, count 0 2006.229.12:22:40.35#ibcon#*before return 0, iclass 5, count 0 2006.229.12:22:40.35#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:40.35#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:22:40.35#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:22:40.35#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:22:40.35$vck44/vb=2,4 2006.229.12:22:40.35#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.12:22:40.35#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.12:22:40.35#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:40.35#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:40.41#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:40.41#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:40.41#ibcon#enter wrdev, iclass 7, count 2 2006.229.12:22:40.41#ibcon#first serial, iclass 7, count 2 2006.229.12:22:40.41#ibcon#enter sib2, iclass 7, count 2 2006.229.12:22:40.41#ibcon#flushed, iclass 7, count 2 2006.229.12:22:40.41#ibcon#about to write, iclass 7, count 2 2006.229.12:22:40.41#ibcon#wrote, iclass 7, count 2 2006.229.12:22:40.41#ibcon#about to read 3, iclass 7, count 2 2006.229.12:22:40.43#ibcon#read 3, iclass 7, count 2 2006.229.12:22:40.43#ibcon#about to read 4, iclass 7, count 2 2006.229.12:22:40.43#ibcon#read 4, iclass 7, count 2 2006.229.12:22:40.43#ibcon#about to read 5, iclass 7, count 2 2006.229.12:22:40.43#ibcon#read 5, iclass 7, count 2 2006.229.12:22:40.43#ibcon#about to read 6, iclass 7, count 2 2006.229.12:22:40.43#ibcon#read 6, iclass 7, count 2 2006.229.12:22:40.43#ibcon#end of sib2, iclass 7, count 2 2006.229.12:22:40.43#ibcon#*mode == 0, iclass 7, count 2 2006.229.12:22:40.43#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.12:22:40.43#ibcon#[27=AT02-04\r\n] 2006.229.12:22:40.43#ibcon#*before write, iclass 7, count 2 2006.229.12:22:40.43#ibcon#enter sib2, iclass 7, count 2 2006.229.12:22:40.43#ibcon#flushed, iclass 7, count 2 2006.229.12:22:40.43#ibcon#about to write, iclass 7, count 2 2006.229.12:22:40.43#ibcon#wrote, iclass 7, count 2 2006.229.12:22:40.43#ibcon#about to read 3, iclass 7, count 2 2006.229.12:22:40.46#ibcon#read 3, iclass 7, count 2 2006.229.12:22:40.46#ibcon#about to read 4, iclass 7, count 2 2006.229.12:22:40.46#ibcon#read 4, iclass 7, count 2 2006.229.12:22:40.46#ibcon#about to read 5, iclass 7, count 2 2006.229.12:22:40.46#ibcon#read 5, iclass 7, count 2 2006.229.12:22:40.46#ibcon#about to read 6, iclass 7, count 2 2006.229.12:22:40.46#ibcon#read 6, iclass 7, count 2 2006.229.12:22:40.46#ibcon#end of sib2, iclass 7, count 2 2006.229.12:22:40.46#ibcon#*after write, iclass 7, count 2 2006.229.12:22:40.46#ibcon#*before return 0, iclass 7, count 2 2006.229.12:22:40.46#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:40.46#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:22:40.46#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.12:22:40.46#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:40.46#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:40.58#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:40.58#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:40.58#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:22:40.58#ibcon#first serial, iclass 7, count 0 2006.229.12:22:40.58#ibcon#enter sib2, iclass 7, count 0 2006.229.12:22:40.58#ibcon#flushed, iclass 7, count 0 2006.229.12:22:40.58#ibcon#about to write, iclass 7, count 0 2006.229.12:22:40.58#ibcon#wrote, iclass 7, count 0 2006.229.12:22:40.58#ibcon#about to read 3, iclass 7, count 0 2006.229.12:22:40.60#ibcon#read 3, iclass 7, count 0 2006.229.12:22:40.60#ibcon#about to read 4, iclass 7, count 0 2006.229.12:22:40.60#ibcon#read 4, iclass 7, count 0 2006.229.12:22:40.60#ibcon#about to read 5, iclass 7, count 0 2006.229.12:22:40.60#ibcon#read 5, iclass 7, count 0 2006.229.12:22:40.60#ibcon#about to read 6, iclass 7, count 0 2006.229.12:22:40.60#ibcon#read 6, iclass 7, count 0 2006.229.12:22:40.60#ibcon#end of sib2, iclass 7, count 0 2006.229.12:22:40.60#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:22:40.60#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:22:40.60#ibcon#[27=USB\r\n] 2006.229.12:22:40.60#ibcon#*before write, iclass 7, count 0 2006.229.12:22:40.60#ibcon#enter sib2, iclass 7, count 0 2006.229.12:22:40.60#ibcon#flushed, iclass 7, count 0 2006.229.12:22:40.60#ibcon#about to write, iclass 7, count 0 2006.229.12:22:40.60#ibcon#wrote, iclass 7, count 0 2006.229.12:22:40.60#ibcon#about to read 3, iclass 7, count 0 2006.229.12:22:40.63#ibcon#read 3, iclass 7, count 0 2006.229.12:22:40.63#ibcon#about to read 4, iclass 7, count 0 2006.229.12:22:40.63#ibcon#read 4, iclass 7, count 0 2006.229.12:22:40.63#ibcon#about to read 5, iclass 7, count 0 2006.229.12:22:40.63#ibcon#read 5, iclass 7, count 0 2006.229.12:22:40.63#ibcon#about to read 6, iclass 7, count 0 2006.229.12:22:40.63#ibcon#read 6, iclass 7, count 0 2006.229.12:22:40.63#ibcon#end of sib2, iclass 7, count 0 2006.229.12:22:40.63#ibcon#*after write, iclass 7, count 0 2006.229.12:22:40.63#ibcon#*before return 0, iclass 7, count 0 2006.229.12:22:40.63#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:40.63#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:22:40.63#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:22:40.63#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:22:40.63$vck44/vblo=3,649.99 2006.229.12:22:40.63#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:22:40.63#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:22:40.63#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:40.63#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:40.63#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:40.63#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:40.63#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:22:40.64#ibcon#first serial, iclass 11, count 0 2006.229.12:22:40.64#ibcon#enter sib2, iclass 11, count 0 2006.229.12:22:40.64#ibcon#flushed, iclass 11, count 0 2006.229.12:22:40.64#ibcon#about to write, iclass 11, count 0 2006.229.12:22:40.64#ibcon#wrote, iclass 11, count 0 2006.229.12:22:40.64#ibcon#about to read 3, iclass 11, count 0 2006.229.12:22:40.65#ibcon#read 3, iclass 11, count 0 2006.229.12:22:40.65#ibcon#about to read 4, iclass 11, count 0 2006.229.12:22:40.65#ibcon#read 4, iclass 11, count 0 2006.229.12:22:40.65#ibcon#about to read 5, iclass 11, count 0 2006.229.12:22:40.65#ibcon#read 5, iclass 11, count 0 2006.229.12:22:40.65#ibcon#about to read 6, iclass 11, count 0 2006.229.12:22:40.65#ibcon#read 6, iclass 11, count 0 2006.229.12:22:40.65#ibcon#end of sib2, iclass 11, count 0 2006.229.12:22:40.65#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:22:40.65#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:22:40.65#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:22:40.65#ibcon#*before write, iclass 11, count 0 2006.229.12:22:40.65#ibcon#enter sib2, iclass 11, count 0 2006.229.12:22:40.65#ibcon#flushed, iclass 11, count 0 2006.229.12:22:40.65#ibcon#about to write, iclass 11, count 0 2006.229.12:22:40.65#ibcon#wrote, iclass 11, count 0 2006.229.12:22:40.65#ibcon#about to read 3, iclass 11, count 0 2006.229.12:22:40.69#ibcon#read 3, iclass 11, count 0 2006.229.12:22:40.69#ibcon#about to read 4, iclass 11, count 0 2006.229.12:22:40.69#ibcon#read 4, iclass 11, count 0 2006.229.12:22:40.69#ibcon#about to read 5, iclass 11, count 0 2006.229.12:22:40.69#ibcon#read 5, iclass 11, count 0 2006.229.12:22:40.69#ibcon#about to read 6, iclass 11, count 0 2006.229.12:22:40.69#ibcon#read 6, iclass 11, count 0 2006.229.12:22:40.69#ibcon#end of sib2, iclass 11, count 0 2006.229.12:22:40.69#ibcon#*after write, iclass 11, count 0 2006.229.12:22:40.69#ibcon#*before return 0, iclass 11, count 0 2006.229.12:22:40.69#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:40.69#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:22:40.69#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:22:40.69#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:22:40.69$vck44/vb=3,4 2006.229.12:22:40.69#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.12:22:40.69#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.12:22:40.69#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:40.70#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:40.74#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:40.74#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:40.74#ibcon#enter wrdev, iclass 13, count 2 2006.229.12:22:40.74#ibcon#first serial, iclass 13, count 2 2006.229.12:22:40.74#ibcon#enter sib2, iclass 13, count 2 2006.229.12:22:40.74#ibcon#flushed, iclass 13, count 2 2006.229.12:22:40.74#ibcon#about to write, iclass 13, count 2 2006.229.12:22:40.74#ibcon#wrote, iclass 13, count 2 2006.229.12:22:40.74#ibcon#about to read 3, iclass 13, count 2 2006.229.12:22:40.76#ibcon#read 3, iclass 13, count 2 2006.229.12:22:40.76#ibcon#about to read 4, iclass 13, count 2 2006.229.12:22:40.76#ibcon#read 4, iclass 13, count 2 2006.229.12:22:40.76#ibcon#about to read 5, iclass 13, count 2 2006.229.12:22:40.76#ibcon#read 5, iclass 13, count 2 2006.229.12:22:40.76#ibcon#about to read 6, iclass 13, count 2 2006.229.12:22:40.76#ibcon#read 6, iclass 13, count 2 2006.229.12:22:40.76#ibcon#end of sib2, iclass 13, count 2 2006.229.12:22:40.76#ibcon#*mode == 0, iclass 13, count 2 2006.229.12:22:40.76#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.12:22:40.76#ibcon#[27=AT03-04\r\n] 2006.229.12:22:40.76#ibcon#*before write, iclass 13, count 2 2006.229.12:22:40.76#ibcon#enter sib2, iclass 13, count 2 2006.229.12:22:40.76#ibcon#flushed, iclass 13, count 2 2006.229.12:22:40.76#ibcon#about to write, iclass 13, count 2 2006.229.12:22:40.76#ibcon#wrote, iclass 13, count 2 2006.229.12:22:40.76#ibcon#about to read 3, iclass 13, count 2 2006.229.12:22:40.79#ibcon#read 3, iclass 13, count 2 2006.229.12:22:40.79#ibcon#about to read 4, iclass 13, count 2 2006.229.12:22:40.79#ibcon#read 4, iclass 13, count 2 2006.229.12:22:40.79#ibcon#about to read 5, iclass 13, count 2 2006.229.12:22:40.79#ibcon#read 5, iclass 13, count 2 2006.229.12:22:40.79#ibcon#about to read 6, iclass 13, count 2 2006.229.12:22:40.79#ibcon#read 6, iclass 13, count 2 2006.229.12:22:40.79#ibcon#end of sib2, iclass 13, count 2 2006.229.12:22:40.79#ibcon#*after write, iclass 13, count 2 2006.229.12:22:40.79#ibcon#*before return 0, iclass 13, count 2 2006.229.12:22:40.79#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:40.79#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:22:40.79#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.12:22:40.79#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:40.79#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:40.91#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:40.91#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:40.91#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:22:40.91#ibcon#first serial, iclass 13, count 0 2006.229.12:22:40.91#ibcon#enter sib2, iclass 13, count 0 2006.229.12:22:40.91#ibcon#flushed, iclass 13, count 0 2006.229.12:22:40.91#ibcon#about to write, iclass 13, count 0 2006.229.12:22:40.91#ibcon#wrote, iclass 13, count 0 2006.229.12:22:40.91#ibcon#about to read 3, iclass 13, count 0 2006.229.12:22:40.93#ibcon#read 3, iclass 13, count 0 2006.229.12:22:40.93#ibcon#about to read 4, iclass 13, count 0 2006.229.12:22:40.93#ibcon#read 4, iclass 13, count 0 2006.229.12:22:40.93#ibcon#about to read 5, iclass 13, count 0 2006.229.12:22:40.93#ibcon#read 5, iclass 13, count 0 2006.229.12:22:40.93#ibcon#about to read 6, iclass 13, count 0 2006.229.12:22:40.93#ibcon#read 6, iclass 13, count 0 2006.229.12:22:40.93#ibcon#end of sib2, iclass 13, count 0 2006.229.12:22:40.93#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:22:40.93#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:22:40.93#ibcon#[27=USB\r\n] 2006.229.12:22:40.93#ibcon#*before write, iclass 13, count 0 2006.229.12:22:40.93#ibcon#enter sib2, iclass 13, count 0 2006.229.12:22:40.93#ibcon#flushed, iclass 13, count 0 2006.229.12:22:40.93#ibcon#about to write, iclass 13, count 0 2006.229.12:22:40.93#ibcon#wrote, iclass 13, count 0 2006.229.12:22:40.93#ibcon#about to read 3, iclass 13, count 0 2006.229.12:22:40.96#ibcon#read 3, iclass 13, count 0 2006.229.12:22:40.96#ibcon#about to read 4, iclass 13, count 0 2006.229.12:22:40.96#ibcon#read 4, iclass 13, count 0 2006.229.12:22:40.96#ibcon#about to read 5, iclass 13, count 0 2006.229.12:22:40.96#ibcon#read 5, iclass 13, count 0 2006.229.12:22:40.96#ibcon#about to read 6, iclass 13, count 0 2006.229.12:22:40.96#ibcon#read 6, iclass 13, count 0 2006.229.12:22:40.96#ibcon#end of sib2, iclass 13, count 0 2006.229.12:22:40.96#ibcon#*after write, iclass 13, count 0 2006.229.12:22:40.96#ibcon#*before return 0, iclass 13, count 0 2006.229.12:22:40.96#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:40.96#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:22:40.96#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:22:40.96#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:22:40.96$vck44/vblo=4,679.99 2006.229.12:22:40.96#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.12:22:40.96#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.12:22:40.96#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:40.96#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:40.96#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:40.96#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:40.96#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:22:40.97#ibcon#first serial, iclass 15, count 0 2006.229.12:22:40.97#ibcon#enter sib2, iclass 15, count 0 2006.229.12:22:40.97#ibcon#flushed, iclass 15, count 0 2006.229.12:22:40.97#ibcon#about to write, iclass 15, count 0 2006.229.12:22:40.97#ibcon#wrote, iclass 15, count 0 2006.229.12:22:40.97#ibcon#about to read 3, iclass 15, count 0 2006.229.12:22:40.98#ibcon#read 3, iclass 15, count 0 2006.229.12:22:40.98#ibcon#about to read 4, iclass 15, count 0 2006.229.12:22:40.98#ibcon#read 4, iclass 15, count 0 2006.229.12:22:40.98#ibcon#about to read 5, iclass 15, count 0 2006.229.12:22:40.98#ibcon#read 5, iclass 15, count 0 2006.229.12:22:40.98#ibcon#about to read 6, iclass 15, count 0 2006.229.12:22:40.98#ibcon#read 6, iclass 15, count 0 2006.229.12:22:40.98#ibcon#end of sib2, iclass 15, count 0 2006.229.12:22:40.98#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:22:40.98#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:22:40.98#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:22:40.98#ibcon#*before write, iclass 15, count 0 2006.229.12:22:40.98#ibcon#enter sib2, iclass 15, count 0 2006.229.12:22:40.98#ibcon#flushed, iclass 15, count 0 2006.229.12:22:40.98#ibcon#about to write, iclass 15, count 0 2006.229.12:22:40.98#ibcon#wrote, iclass 15, count 0 2006.229.12:22:40.98#ibcon#about to read 3, iclass 15, count 0 2006.229.12:22:41.02#ibcon#read 3, iclass 15, count 0 2006.229.12:22:41.02#ibcon#about to read 4, iclass 15, count 0 2006.229.12:22:41.02#ibcon#read 4, iclass 15, count 0 2006.229.12:22:41.02#ibcon#about to read 5, iclass 15, count 0 2006.229.12:22:41.02#ibcon#read 5, iclass 15, count 0 2006.229.12:22:41.02#ibcon#about to read 6, iclass 15, count 0 2006.229.12:22:41.02#ibcon#read 6, iclass 15, count 0 2006.229.12:22:41.02#ibcon#end of sib2, iclass 15, count 0 2006.229.12:22:41.02#ibcon#*after write, iclass 15, count 0 2006.229.12:22:41.02#ibcon#*before return 0, iclass 15, count 0 2006.229.12:22:41.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:41.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:22:41.02#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:22:41.02#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:22:41.02$vck44/vb=4,4 2006.229.12:22:41.02#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.12:22:41.02#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.12:22:41.02#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:41.02#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:41.08#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:41.08#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:41.08#ibcon#enter wrdev, iclass 17, count 2 2006.229.12:22:41.08#ibcon#first serial, iclass 17, count 2 2006.229.12:22:41.08#ibcon#enter sib2, iclass 17, count 2 2006.229.12:22:41.08#ibcon#flushed, iclass 17, count 2 2006.229.12:22:41.08#ibcon#about to write, iclass 17, count 2 2006.229.12:22:41.08#ibcon#wrote, iclass 17, count 2 2006.229.12:22:41.08#ibcon#about to read 3, iclass 17, count 2 2006.229.12:22:41.10#ibcon#read 3, iclass 17, count 2 2006.229.12:22:41.10#ibcon#about to read 4, iclass 17, count 2 2006.229.12:22:41.10#ibcon#read 4, iclass 17, count 2 2006.229.12:22:41.10#ibcon#about to read 5, iclass 17, count 2 2006.229.12:22:41.10#ibcon#read 5, iclass 17, count 2 2006.229.12:22:41.10#ibcon#about to read 6, iclass 17, count 2 2006.229.12:22:41.10#ibcon#read 6, iclass 17, count 2 2006.229.12:22:41.10#ibcon#end of sib2, iclass 17, count 2 2006.229.12:22:41.10#ibcon#*mode == 0, iclass 17, count 2 2006.229.12:22:41.10#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.12:22:41.10#ibcon#[27=AT04-04\r\n] 2006.229.12:22:41.10#ibcon#*before write, iclass 17, count 2 2006.229.12:22:41.10#ibcon#enter sib2, iclass 17, count 2 2006.229.12:22:41.10#ibcon#flushed, iclass 17, count 2 2006.229.12:22:41.10#ibcon#about to write, iclass 17, count 2 2006.229.12:22:41.10#ibcon#wrote, iclass 17, count 2 2006.229.12:22:41.10#ibcon#about to read 3, iclass 17, count 2 2006.229.12:22:41.13#ibcon#read 3, iclass 17, count 2 2006.229.12:22:41.13#ibcon#about to read 4, iclass 17, count 2 2006.229.12:22:41.13#ibcon#read 4, iclass 17, count 2 2006.229.12:22:41.13#ibcon#about to read 5, iclass 17, count 2 2006.229.12:22:41.13#ibcon#read 5, iclass 17, count 2 2006.229.12:22:41.13#ibcon#about to read 6, iclass 17, count 2 2006.229.12:22:41.13#ibcon#read 6, iclass 17, count 2 2006.229.12:22:41.13#ibcon#end of sib2, iclass 17, count 2 2006.229.12:22:41.13#ibcon#*after write, iclass 17, count 2 2006.229.12:22:41.13#ibcon#*before return 0, iclass 17, count 2 2006.229.12:22:41.13#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:41.13#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:22:41.13#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.12:22:41.13#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:41.13#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:41.25#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:41.25#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:41.25#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:22:41.25#ibcon#first serial, iclass 17, count 0 2006.229.12:22:41.25#ibcon#enter sib2, iclass 17, count 0 2006.229.12:22:41.25#ibcon#flushed, iclass 17, count 0 2006.229.12:22:41.25#ibcon#about to write, iclass 17, count 0 2006.229.12:22:41.25#ibcon#wrote, iclass 17, count 0 2006.229.12:22:41.25#ibcon#about to read 3, iclass 17, count 0 2006.229.12:22:41.27#ibcon#read 3, iclass 17, count 0 2006.229.12:22:41.27#ibcon#about to read 4, iclass 17, count 0 2006.229.12:22:41.27#ibcon#read 4, iclass 17, count 0 2006.229.12:22:41.27#ibcon#about to read 5, iclass 17, count 0 2006.229.12:22:41.27#ibcon#read 5, iclass 17, count 0 2006.229.12:22:41.27#ibcon#about to read 6, iclass 17, count 0 2006.229.12:22:41.27#ibcon#read 6, iclass 17, count 0 2006.229.12:22:41.27#ibcon#end of sib2, iclass 17, count 0 2006.229.12:22:41.27#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:22:41.27#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:22:41.27#ibcon#[27=USB\r\n] 2006.229.12:22:41.27#ibcon#*before write, iclass 17, count 0 2006.229.12:22:41.27#ibcon#enter sib2, iclass 17, count 0 2006.229.12:22:41.27#ibcon#flushed, iclass 17, count 0 2006.229.12:22:41.27#ibcon#about to write, iclass 17, count 0 2006.229.12:22:41.27#ibcon#wrote, iclass 17, count 0 2006.229.12:22:41.27#ibcon#about to read 3, iclass 17, count 0 2006.229.12:22:41.30#ibcon#read 3, iclass 17, count 0 2006.229.12:22:41.30#ibcon#about to read 4, iclass 17, count 0 2006.229.12:22:41.30#ibcon#read 4, iclass 17, count 0 2006.229.12:22:41.30#ibcon#about to read 5, iclass 17, count 0 2006.229.12:22:41.30#ibcon#read 5, iclass 17, count 0 2006.229.12:22:41.30#ibcon#about to read 6, iclass 17, count 0 2006.229.12:22:41.30#ibcon#read 6, iclass 17, count 0 2006.229.12:22:41.30#ibcon#end of sib2, iclass 17, count 0 2006.229.12:22:41.30#ibcon#*after write, iclass 17, count 0 2006.229.12:22:41.30#ibcon#*before return 0, iclass 17, count 0 2006.229.12:22:41.30#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:41.30#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:22:41.30#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:22:41.30#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:22:41.30$vck44/vblo=5,709.99 2006.229.12:22:41.30#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:22:41.30#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:22:41.30#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:41.30#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:41.30#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:41.30#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:41.30#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:22:41.30#ibcon#first serial, iclass 19, count 0 2006.229.12:22:41.30#ibcon#enter sib2, iclass 19, count 0 2006.229.12:22:41.30#ibcon#flushed, iclass 19, count 0 2006.229.12:22:41.30#ibcon#about to write, iclass 19, count 0 2006.229.12:22:41.31#ibcon#wrote, iclass 19, count 0 2006.229.12:22:41.31#ibcon#about to read 3, iclass 19, count 0 2006.229.12:22:41.32#ibcon#read 3, iclass 19, count 0 2006.229.12:22:41.32#ibcon#about to read 4, iclass 19, count 0 2006.229.12:22:41.32#ibcon#read 4, iclass 19, count 0 2006.229.12:22:41.32#ibcon#about to read 5, iclass 19, count 0 2006.229.12:22:41.32#ibcon#read 5, iclass 19, count 0 2006.229.12:22:41.32#ibcon#about to read 6, iclass 19, count 0 2006.229.12:22:41.32#ibcon#read 6, iclass 19, count 0 2006.229.12:22:41.32#ibcon#end of sib2, iclass 19, count 0 2006.229.12:22:41.32#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:22:41.32#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:22:41.32#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:22:41.32#ibcon#*before write, iclass 19, count 0 2006.229.12:22:41.32#ibcon#enter sib2, iclass 19, count 0 2006.229.12:22:41.32#ibcon#flushed, iclass 19, count 0 2006.229.12:22:41.32#ibcon#about to write, iclass 19, count 0 2006.229.12:22:41.32#ibcon#wrote, iclass 19, count 0 2006.229.12:22:41.32#ibcon#about to read 3, iclass 19, count 0 2006.229.12:22:41.36#ibcon#read 3, iclass 19, count 0 2006.229.12:22:41.36#ibcon#about to read 4, iclass 19, count 0 2006.229.12:22:41.36#ibcon#read 4, iclass 19, count 0 2006.229.12:22:41.36#ibcon#about to read 5, iclass 19, count 0 2006.229.12:22:41.36#ibcon#read 5, iclass 19, count 0 2006.229.12:22:41.36#ibcon#about to read 6, iclass 19, count 0 2006.229.12:22:41.36#ibcon#read 6, iclass 19, count 0 2006.229.12:22:41.36#ibcon#end of sib2, iclass 19, count 0 2006.229.12:22:41.36#ibcon#*after write, iclass 19, count 0 2006.229.12:22:41.36#ibcon#*before return 0, iclass 19, count 0 2006.229.12:22:41.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:41.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:22:41.36#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:22:41.36#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:22:41.36$vck44/vb=5,4 2006.229.12:22:41.36#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.12:22:41.37#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.12:22:41.37#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:41.37#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:41.41#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:41.41#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:41.41#ibcon#enter wrdev, iclass 21, count 2 2006.229.12:22:41.41#ibcon#first serial, iclass 21, count 2 2006.229.12:22:41.41#ibcon#enter sib2, iclass 21, count 2 2006.229.12:22:41.41#ibcon#flushed, iclass 21, count 2 2006.229.12:22:41.41#ibcon#about to write, iclass 21, count 2 2006.229.12:22:41.41#ibcon#wrote, iclass 21, count 2 2006.229.12:22:41.41#ibcon#about to read 3, iclass 21, count 2 2006.229.12:22:41.43#ibcon#read 3, iclass 21, count 2 2006.229.12:22:41.43#ibcon#about to read 4, iclass 21, count 2 2006.229.12:22:41.43#ibcon#read 4, iclass 21, count 2 2006.229.12:22:41.43#ibcon#about to read 5, iclass 21, count 2 2006.229.12:22:41.43#ibcon#read 5, iclass 21, count 2 2006.229.12:22:41.43#ibcon#about to read 6, iclass 21, count 2 2006.229.12:22:41.43#ibcon#read 6, iclass 21, count 2 2006.229.12:22:41.43#ibcon#end of sib2, iclass 21, count 2 2006.229.12:22:41.43#ibcon#*mode == 0, iclass 21, count 2 2006.229.12:22:41.43#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.12:22:41.43#ibcon#[27=AT05-04\r\n] 2006.229.12:22:41.43#ibcon#*before write, iclass 21, count 2 2006.229.12:22:41.43#ibcon#enter sib2, iclass 21, count 2 2006.229.12:22:41.43#ibcon#flushed, iclass 21, count 2 2006.229.12:22:41.43#ibcon#about to write, iclass 21, count 2 2006.229.12:22:41.43#ibcon#wrote, iclass 21, count 2 2006.229.12:22:41.43#ibcon#about to read 3, iclass 21, count 2 2006.229.12:22:41.46#ibcon#read 3, iclass 21, count 2 2006.229.12:22:41.46#ibcon#about to read 4, iclass 21, count 2 2006.229.12:22:41.46#ibcon#read 4, iclass 21, count 2 2006.229.12:22:41.46#ibcon#about to read 5, iclass 21, count 2 2006.229.12:22:41.46#ibcon#read 5, iclass 21, count 2 2006.229.12:22:41.46#ibcon#about to read 6, iclass 21, count 2 2006.229.12:22:41.46#ibcon#read 6, iclass 21, count 2 2006.229.12:22:41.46#ibcon#end of sib2, iclass 21, count 2 2006.229.12:22:41.46#ibcon#*after write, iclass 21, count 2 2006.229.12:22:41.46#ibcon#*before return 0, iclass 21, count 2 2006.229.12:22:41.46#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:41.46#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:22:41.46#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.12:22:41.46#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:41.46#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:41.58#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:41.58#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:41.58#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:22:41.58#ibcon#first serial, iclass 21, count 0 2006.229.12:22:41.58#ibcon#enter sib2, iclass 21, count 0 2006.229.12:22:41.58#ibcon#flushed, iclass 21, count 0 2006.229.12:22:41.58#ibcon#about to write, iclass 21, count 0 2006.229.12:22:41.58#ibcon#wrote, iclass 21, count 0 2006.229.12:22:41.58#ibcon#about to read 3, iclass 21, count 0 2006.229.12:22:41.60#ibcon#read 3, iclass 21, count 0 2006.229.12:22:41.60#ibcon#about to read 4, iclass 21, count 0 2006.229.12:22:41.60#ibcon#read 4, iclass 21, count 0 2006.229.12:22:41.60#ibcon#about to read 5, iclass 21, count 0 2006.229.12:22:41.60#ibcon#read 5, iclass 21, count 0 2006.229.12:22:41.60#ibcon#about to read 6, iclass 21, count 0 2006.229.12:22:41.60#ibcon#read 6, iclass 21, count 0 2006.229.12:22:41.60#ibcon#end of sib2, iclass 21, count 0 2006.229.12:22:41.60#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:22:41.60#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:22:41.60#ibcon#[27=USB\r\n] 2006.229.12:22:41.60#ibcon#*before write, iclass 21, count 0 2006.229.12:22:41.60#ibcon#enter sib2, iclass 21, count 0 2006.229.12:22:41.60#ibcon#flushed, iclass 21, count 0 2006.229.12:22:41.60#ibcon#about to write, iclass 21, count 0 2006.229.12:22:41.60#ibcon#wrote, iclass 21, count 0 2006.229.12:22:41.60#ibcon#about to read 3, iclass 21, count 0 2006.229.12:22:41.63#ibcon#read 3, iclass 21, count 0 2006.229.12:22:41.63#ibcon#about to read 4, iclass 21, count 0 2006.229.12:22:41.63#ibcon#read 4, iclass 21, count 0 2006.229.12:22:41.63#ibcon#about to read 5, iclass 21, count 0 2006.229.12:22:41.63#ibcon#read 5, iclass 21, count 0 2006.229.12:22:41.63#ibcon#about to read 6, iclass 21, count 0 2006.229.12:22:41.63#ibcon#read 6, iclass 21, count 0 2006.229.12:22:41.63#ibcon#end of sib2, iclass 21, count 0 2006.229.12:22:41.63#ibcon#*after write, iclass 21, count 0 2006.229.12:22:41.63#ibcon#*before return 0, iclass 21, count 0 2006.229.12:22:41.63#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:41.63#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:22:41.63#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:22:41.63#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:22:41.63$vck44/vblo=6,719.99 2006.229.12:22:41.63#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.12:22:41.63#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.12:22:41.63#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:41.63#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:41.63#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:41.64#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:41.64#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:22:41.64#ibcon#first serial, iclass 23, count 0 2006.229.12:22:41.64#ibcon#enter sib2, iclass 23, count 0 2006.229.12:22:41.64#ibcon#flushed, iclass 23, count 0 2006.229.12:22:41.64#ibcon#about to write, iclass 23, count 0 2006.229.12:22:41.64#ibcon#wrote, iclass 23, count 0 2006.229.12:22:41.64#ibcon#about to read 3, iclass 23, count 0 2006.229.12:22:41.65#ibcon#read 3, iclass 23, count 0 2006.229.12:22:41.65#ibcon#about to read 4, iclass 23, count 0 2006.229.12:22:41.65#ibcon#read 4, iclass 23, count 0 2006.229.12:22:41.65#ibcon#about to read 5, iclass 23, count 0 2006.229.12:22:41.65#ibcon#read 5, iclass 23, count 0 2006.229.12:22:41.65#ibcon#about to read 6, iclass 23, count 0 2006.229.12:22:41.65#ibcon#read 6, iclass 23, count 0 2006.229.12:22:41.65#ibcon#end of sib2, iclass 23, count 0 2006.229.12:22:41.65#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:22:41.65#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:22:41.65#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:22:41.65#ibcon#*before write, iclass 23, count 0 2006.229.12:22:41.65#ibcon#enter sib2, iclass 23, count 0 2006.229.12:22:41.65#ibcon#flushed, iclass 23, count 0 2006.229.12:22:41.65#ibcon#about to write, iclass 23, count 0 2006.229.12:22:41.65#ibcon#wrote, iclass 23, count 0 2006.229.12:22:41.65#ibcon#about to read 3, iclass 23, count 0 2006.229.12:22:41.69#ibcon#read 3, iclass 23, count 0 2006.229.12:22:41.69#ibcon#about to read 4, iclass 23, count 0 2006.229.12:22:41.69#ibcon#read 4, iclass 23, count 0 2006.229.12:22:41.69#ibcon#about to read 5, iclass 23, count 0 2006.229.12:22:41.69#ibcon#read 5, iclass 23, count 0 2006.229.12:22:41.69#ibcon#about to read 6, iclass 23, count 0 2006.229.12:22:41.69#ibcon#read 6, iclass 23, count 0 2006.229.12:22:41.69#ibcon#end of sib2, iclass 23, count 0 2006.229.12:22:41.69#ibcon#*after write, iclass 23, count 0 2006.229.12:22:41.69#ibcon#*before return 0, iclass 23, count 0 2006.229.12:22:41.69#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:41.69#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:22:41.69#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:22:41.69#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:22:41.69$vck44/vb=6,4 2006.229.12:22:41.69#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.12:22:41.69#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.12:22:41.69#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:41.69#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:41.75#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:41.75#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:41.75#ibcon#enter wrdev, iclass 25, count 2 2006.229.12:22:41.75#ibcon#first serial, iclass 25, count 2 2006.229.12:22:41.75#ibcon#enter sib2, iclass 25, count 2 2006.229.12:22:41.75#ibcon#flushed, iclass 25, count 2 2006.229.12:22:41.75#ibcon#about to write, iclass 25, count 2 2006.229.12:22:41.75#ibcon#wrote, iclass 25, count 2 2006.229.12:22:41.75#ibcon#about to read 3, iclass 25, count 2 2006.229.12:22:41.77#ibcon#read 3, iclass 25, count 2 2006.229.12:22:41.77#ibcon#about to read 4, iclass 25, count 2 2006.229.12:22:41.77#ibcon#read 4, iclass 25, count 2 2006.229.12:22:41.77#ibcon#about to read 5, iclass 25, count 2 2006.229.12:22:41.77#ibcon#read 5, iclass 25, count 2 2006.229.12:22:41.77#ibcon#about to read 6, iclass 25, count 2 2006.229.12:22:41.77#ibcon#read 6, iclass 25, count 2 2006.229.12:22:41.77#ibcon#end of sib2, iclass 25, count 2 2006.229.12:22:41.77#ibcon#*mode == 0, iclass 25, count 2 2006.229.12:22:41.77#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.12:22:41.77#ibcon#[27=AT06-04\r\n] 2006.229.12:22:41.77#ibcon#*before write, iclass 25, count 2 2006.229.12:22:41.77#ibcon#enter sib2, iclass 25, count 2 2006.229.12:22:41.77#ibcon#flushed, iclass 25, count 2 2006.229.12:22:41.77#ibcon#about to write, iclass 25, count 2 2006.229.12:22:41.77#ibcon#wrote, iclass 25, count 2 2006.229.12:22:41.77#ibcon#about to read 3, iclass 25, count 2 2006.229.12:22:41.80#ibcon#read 3, iclass 25, count 2 2006.229.12:22:41.80#ibcon#about to read 4, iclass 25, count 2 2006.229.12:22:41.80#ibcon#read 4, iclass 25, count 2 2006.229.12:22:41.80#ibcon#about to read 5, iclass 25, count 2 2006.229.12:22:41.80#ibcon#read 5, iclass 25, count 2 2006.229.12:22:41.80#ibcon#about to read 6, iclass 25, count 2 2006.229.12:22:41.80#ibcon#read 6, iclass 25, count 2 2006.229.12:22:41.80#ibcon#end of sib2, iclass 25, count 2 2006.229.12:22:41.80#ibcon#*after write, iclass 25, count 2 2006.229.12:22:41.80#ibcon#*before return 0, iclass 25, count 2 2006.229.12:22:41.80#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:41.80#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:22:41.80#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.12:22:41.80#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:41.80#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:41.92#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:41.92#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:41.92#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:22:41.92#ibcon#first serial, iclass 25, count 0 2006.229.12:22:41.92#ibcon#enter sib2, iclass 25, count 0 2006.229.12:22:41.92#ibcon#flushed, iclass 25, count 0 2006.229.12:22:41.92#ibcon#about to write, iclass 25, count 0 2006.229.12:22:41.92#ibcon#wrote, iclass 25, count 0 2006.229.12:22:41.92#ibcon#about to read 3, iclass 25, count 0 2006.229.12:22:41.94#ibcon#read 3, iclass 25, count 0 2006.229.12:22:41.94#ibcon#about to read 4, iclass 25, count 0 2006.229.12:22:41.94#ibcon#read 4, iclass 25, count 0 2006.229.12:22:41.94#ibcon#about to read 5, iclass 25, count 0 2006.229.12:22:41.94#ibcon#read 5, iclass 25, count 0 2006.229.12:22:41.94#ibcon#about to read 6, iclass 25, count 0 2006.229.12:22:41.94#ibcon#read 6, iclass 25, count 0 2006.229.12:22:41.94#ibcon#end of sib2, iclass 25, count 0 2006.229.12:22:41.94#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:22:41.94#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:22:41.94#ibcon#[27=USB\r\n] 2006.229.12:22:41.94#ibcon#*before write, iclass 25, count 0 2006.229.12:22:41.94#ibcon#enter sib2, iclass 25, count 0 2006.229.12:22:41.94#ibcon#flushed, iclass 25, count 0 2006.229.12:22:41.94#ibcon#about to write, iclass 25, count 0 2006.229.12:22:41.94#ibcon#wrote, iclass 25, count 0 2006.229.12:22:41.94#ibcon#about to read 3, iclass 25, count 0 2006.229.12:22:41.97#ibcon#read 3, iclass 25, count 0 2006.229.12:22:41.97#ibcon#about to read 4, iclass 25, count 0 2006.229.12:22:41.97#ibcon#read 4, iclass 25, count 0 2006.229.12:22:41.97#ibcon#about to read 5, iclass 25, count 0 2006.229.12:22:41.97#ibcon#read 5, iclass 25, count 0 2006.229.12:22:41.97#ibcon#about to read 6, iclass 25, count 0 2006.229.12:22:41.97#ibcon#read 6, iclass 25, count 0 2006.229.12:22:41.97#ibcon#end of sib2, iclass 25, count 0 2006.229.12:22:41.97#ibcon#*after write, iclass 25, count 0 2006.229.12:22:41.97#ibcon#*before return 0, iclass 25, count 0 2006.229.12:22:41.97#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:41.97#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:22:41.97#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:22:41.97#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:22:41.97$vck44/vblo=7,734.99 2006.229.12:22:41.97#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.12:22:41.97#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.12:22:41.97#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:41.97#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:41.97#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:41.97#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:41.97#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:22:41.97#ibcon#first serial, iclass 27, count 0 2006.229.12:22:41.97#ibcon#enter sib2, iclass 27, count 0 2006.229.12:22:41.97#ibcon#flushed, iclass 27, count 0 2006.229.12:22:41.98#ibcon#about to write, iclass 27, count 0 2006.229.12:22:41.98#ibcon#wrote, iclass 27, count 0 2006.229.12:22:41.98#ibcon#about to read 3, iclass 27, count 0 2006.229.12:22:41.99#ibcon#read 3, iclass 27, count 0 2006.229.12:22:41.99#ibcon#about to read 4, iclass 27, count 0 2006.229.12:22:41.99#ibcon#read 4, iclass 27, count 0 2006.229.12:22:41.99#ibcon#about to read 5, iclass 27, count 0 2006.229.12:22:41.99#ibcon#read 5, iclass 27, count 0 2006.229.12:22:41.99#ibcon#about to read 6, iclass 27, count 0 2006.229.12:22:41.99#ibcon#read 6, iclass 27, count 0 2006.229.12:22:41.99#ibcon#end of sib2, iclass 27, count 0 2006.229.12:22:41.99#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:22:41.99#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:22:41.99#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:22:41.99#ibcon#*before write, iclass 27, count 0 2006.229.12:22:41.99#ibcon#enter sib2, iclass 27, count 0 2006.229.12:22:41.99#ibcon#flushed, iclass 27, count 0 2006.229.12:22:41.99#ibcon#about to write, iclass 27, count 0 2006.229.12:22:41.99#ibcon#wrote, iclass 27, count 0 2006.229.12:22:41.99#ibcon#about to read 3, iclass 27, count 0 2006.229.12:22:42.03#ibcon#read 3, iclass 27, count 0 2006.229.12:22:42.03#ibcon#about to read 4, iclass 27, count 0 2006.229.12:22:42.03#ibcon#read 4, iclass 27, count 0 2006.229.12:22:42.03#ibcon#about to read 5, iclass 27, count 0 2006.229.12:22:42.03#ibcon#read 5, iclass 27, count 0 2006.229.12:22:42.03#ibcon#about to read 6, iclass 27, count 0 2006.229.12:22:42.03#ibcon#read 6, iclass 27, count 0 2006.229.12:22:42.03#ibcon#end of sib2, iclass 27, count 0 2006.229.12:22:42.03#ibcon#*after write, iclass 27, count 0 2006.229.12:22:42.03#ibcon#*before return 0, iclass 27, count 0 2006.229.12:22:42.03#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:42.03#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:22:42.03#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:22:42.03#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:22:42.03$vck44/vb=7,4 2006.229.12:22:42.03#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.12:22:42.03#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.12:22:42.03#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:42.03#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:42.09#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:42.09#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:42.09#ibcon#enter wrdev, iclass 29, count 2 2006.229.12:22:42.09#ibcon#first serial, iclass 29, count 2 2006.229.12:22:42.09#ibcon#enter sib2, iclass 29, count 2 2006.229.12:22:42.09#ibcon#flushed, iclass 29, count 2 2006.229.12:22:42.09#ibcon#about to write, iclass 29, count 2 2006.229.12:22:42.09#ibcon#wrote, iclass 29, count 2 2006.229.12:22:42.09#ibcon#about to read 3, iclass 29, count 2 2006.229.12:22:42.11#ibcon#read 3, iclass 29, count 2 2006.229.12:22:42.11#ibcon#about to read 4, iclass 29, count 2 2006.229.12:22:42.11#ibcon#read 4, iclass 29, count 2 2006.229.12:22:42.11#ibcon#about to read 5, iclass 29, count 2 2006.229.12:22:42.11#ibcon#read 5, iclass 29, count 2 2006.229.12:22:42.11#ibcon#about to read 6, iclass 29, count 2 2006.229.12:22:42.11#ibcon#read 6, iclass 29, count 2 2006.229.12:22:42.11#ibcon#end of sib2, iclass 29, count 2 2006.229.12:22:42.11#ibcon#*mode == 0, iclass 29, count 2 2006.229.12:22:42.11#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.12:22:42.11#ibcon#[27=AT07-04\r\n] 2006.229.12:22:42.11#ibcon#*before write, iclass 29, count 2 2006.229.12:22:42.11#ibcon#enter sib2, iclass 29, count 2 2006.229.12:22:42.11#ibcon#flushed, iclass 29, count 2 2006.229.12:22:42.11#ibcon#about to write, iclass 29, count 2 2006.229.12:22:42.11#ibcon#wrote, iclass 29, count 2 2006.229.12:22:42.11#ibcon#about to read 3, iclass 29, count 2 2006.229.12:22:42.14#ibcon#read 3, iclass 29, count 2 2006.229.12:22:42.14#ibcon#about to read 4, iclass 29, count 2 2006.229.12:22:42.14#ibcon#read 4, iclass 29, count 2 2006.229.12:22:42.14#ibcon#about to read 5, iclass 29, count 2 2006.229.12:22:42.14#ibcon#read 5, iclass 29, count 2 2006.229.12:22:42.14#ibcon#about to read 6, iclass 29, count 2 2006.229.12:22:42.15#ibcon#read 6, iclass 29, count 2 2006.229.12:22:42.15#ibcon#end of sib2, iclass 29, count 2 2006.229.12:22:42.15#ibcon#*after write, iclass 29, count 2 2006.229.12:22:42.15#ibcon#*before return 0, iclass 29, count 2 2006.229.12:22:42.15#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:42.15#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:22:42.15#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.12:22:42.15#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:42.15#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:42.26#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:42.26#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:42.26#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:22:42.26#ibcon#first serial, iclass 29, count 0 2006.229.12:22:42.26#ibcon#enter sib2, iclass 29, count 0 2006.229.12:22:42.26#ibcon#flushed, iclass 29, count 0 2006.229.12:22:42.26#ibcon#about to write, iclass 29, count 0 2006.229.12:22:42.26#ibcon#wrote, iclass 29, count 0 2006.229.12:22:42.26#ibcon#about to read 3, iclass 29, count 0 2006.229.12:22:42.28#ibcon#read 3, iclass 29, count 0 2006.229.12:22:42.28#ibcon#about to read 4, iclass 29, count 0 2006.229.12:22:42.28#ibcon#read 4, iclass 29, count 0 2006.229.12:22:42.28#ibcon#about to read 5, iclass 29, count 0 2006.229.12:22:42.28#ibcon#read 5, iclass 29, count 0 2006.229.12:22:42.28#ibcon#about to read 6, iclass 29, count 0 2006.229.12:22:42.28#ibcon#read 6, iclass 29, count 0 2006.229.12:22:42.28#ibcon#end of sib2, iclass 29, count 0 2006.229.12:22:42.28#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:22:42.28#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:22:42.28#ibcon#[27=USB\r\n] 2006.229.12:22:42.28#ibcon#*before write, iclass 29, count 0 2006.229.12:22:42.28#ibcon#enter sib2, iclass 29, count 0 2006.229.12:22:42.28#ibcon#flushed, iclass 29, count 0 2006.229.12:22:42.28#ibcon#about to write, iclass 29, count 0 2006.229.12:22:42.28#ibcon#wrote, iclass 29, count 0 2006.229.12:22:42.28#ibcon#about to read 3, iclass 29, count 0 2006.229.12:22:42.31#ibcon#read 3, iclass 29, count 0 2006.229.12:22:42.31#ibcon#about to read 4, iclass 29, count 0 2006.229.12:22:42.31#ibcon#read 4, iclass 29, count 0 2006.229.12:22:42.31#ibcon#about to read 5, iclass 29, count 0 2006.229.12:22:42.31#ibcon#read 5, iclass 29, count 0 2006.229.12:22:42.31#ibcon#about to read 6, iclass 29, count 0 2006.229.12:22:42.31#ibcon#read 6, iclass 29, count 0 2006.229.12:22:42.31#ibcon#end of sib2, iclass 29, count 0 2006.229.12:22:42.31#ibcon#*after write, iclass 29, count 0 2006.229.12:22:42.31#ibcon#*before return 0, iclass 29, count 0 2006.229.12:22:42.31#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:42.31#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:22:42.31#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:22:42.31#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:22:42.31$vck44/vblo=8,744.99 2006.229.12:22:42.31#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.12:22:42.31#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.12:22:42.31#ibcon#ireg 17 cls_cnt 0 2006.229.12:22:42.31#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:42.31#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:42.31#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:42.31#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:22:42.31#ibcon#first serial, iclass 31, count 0 2006.229.12:22:42.31#ibcon#enter sib2, iclass 31, count 0 2006.229.12:22:42.31#ibcon#flushed, iclass 31, count 0 2006.229.12:22:42.31#ibcon#about to write, iclass 31, count 0 2006.229.12:22:42.32#ibcon#wrote, iclass 31, count 0 2006.229.12:22:42.32#ibcon#about to read 3, iclass 31, count 0 2006.229.12:22:42.33#ibcon#read 3, iclass 31, count 0 2006.229.12:22:42.33#ibcon#about to read 4, iclass 31, count 0 2006.229.12:22:42.33#ibcon#read 4, iclass 31, count 0 2006.229.12:22:42.33#ibcon#about to read 5, iclass 31, count 0 2006.229.12:22:42.33#ibcon#read 5, iclass 31, count 0 2006.229.12:22:42.33#ibcon#about to read 6, iclass 31, count 0 2006.229.12:22:42.33#ibcon#read 6, iclass 31, count 0 2006.229.12:22:42.33#ibcon#end of sib2, iclass 31, count 0 2006.229.12:22:42.33#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:22:42.33#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:22:42.33#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:22:42.33#ibcon#*before write, iclass 31, count 0 2006.229.12:22:42.33#ibcon#enter sib2, iclass 31, count 0 2006.229.12:22:42.33#ibcon#flushed, iclass 31, count 0 2006.229.12:22:42.33#ibcon#about to write, iclass 31, count 0 2006.229.12:22:42.33#ibcon#wrote, iclass 31, count 0 2006.229.12:22:42.33#ibcon#about to read 3, iclass 31, count 0 2006.229.12:22:42.37#ibcon#read 3, iclass 31, count 0 2006.229.12:22:42.37#ibcon#about to read 4, iclass 31, count 0 2006.229.12:22:42.37#ibcon#read 4, iclass 31, count 0 2006.229.12:22:42.37#ibcon#about to read 5, iclass 31, count 0 2006.229.12:22:42.37#ibcon#read 5, iclass 31, count 0 2006.229.12:22:42.37#ibcon#about to read 6, iclass 31, count 0 2006.229.12:22:42.37#ibcon#read 6, iclass 31, count 0 2006.229.12:22:42.37#ibcon#end of sib2, iclass 31, count 0 2006.229.12:22:42.37#ibcon#*after write, iclass 31, count 0 2006.229.12:22:42.37#ibcon#*before return 0, iclass 31, count 0 2006.229.12:22:42.37#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:42.37#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:22:42.37#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:22:42.37#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:22:42.37$vck44/vb=8,4 2006.229.12:22:42.37#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.12:22:42.37#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.12:22:42.37#ibcon#ireg 11 cls_cnt 2 2006.229.12:22:42.37#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:42.43#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:42.43#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:42.43#ibcon#enter wrdev, iclass 33, count 2 2006.229.12:22:42.43#ibcon#first serial, iclass 33, count 2 2006.229.12:22:42.43#ibcon#enter sib2, iclass 33, count 2 2006.229.12:22:42.43#ibcon#flushed, iclass 33, count 2 2006.229.12:22:42.43#ibcon#about to write, iclass 33, count 2 2006.229.12:22:42.43#ibcon#wrote, iclass 33, count 2 2006.229.12:22:42.43#ibcon#about to read 3, iclass 33, count 2 2006.229.12:22:42.45#ibcon#read 3, iclass 33, count 2 2006.229.12:22:42.45#ibcon#about to read 4, iclass 33, count 2 2006.229.12:22:42.45#ibcon#read 4, iclass 33, count 2 2006.229.12:22:42.45#ibcon#about to read 5, iclass 33, count 2 2006.229.12:22:42.45#ibcon#read 5, iclass 33, count 2 2006.229.12:22:42.45#ibcon#about to read 6, iclass 33, count 2 2006.229.12:22:42.45#ibcon#read 6, iclass 33, count 2 2006.229.12:22:42.45#ibcon#end of sib2, iclass 33, count 2 2006.229.12:22:42.45#ibcon#*mode == 0, iclass 33, count 2 2006.229.12:22:42.45#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.12:22:42.45#ibcon#[27=AT08-04\r\n] 2006.229.12:22:42.45#ibcon#*before write, iclass 33, count 2 2006.229.12:22:42.45#ibcon#enter sib2, iclass 33, count 2 2006.229.12:22:42.45#ibcon#flushed, iclass 33, count 2 2006.229.12:22:42.45#ibcon#about to write, iclass 33, count 2 2006.229.12:22:42.45#ibcon#wrote, iclass 33, count 2 2006.229.12:22:42.45#ibcon#about to read 3, iclass 33, count 2 2006.229.12:22:42.48#ibcon#read 3, iclass 33, count 2 2006.229.12:22:42.48#ibcon#about to read 4, iclass 33, count 2 2006.229.12:22:42.48#ibcon#read 4, iclass 33, count 2 2006.229.12:22:42.48#ibcon#about to read 5, iclass 33, count 2 2006.229.12:22:42.48#ibcon#read 5, iclass 33, count 2 2006.229.12:22:42.48#ibcon#about to read 6, iclass 33, count 2 2006.229.12:22:42.48#ibcon#read 6, iclass 33, count 2 2006.229.12:22:42.48#ibcon#end of sib2, iclass 33, count 2 2006.229.12:22:42.48#ibcon#*after write, iclass 33, count 2 2006.229.12:22:42.48#ibcon#*before return 0, iclass 33, count 2 2006.229.12:22:42.48#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:42.48#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:22:42.48#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.12:22:42.48#ibcon#ireg 7 cls_cnt 0 2006.229.12:22:42.48#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:42.60#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:42.60#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:42.60#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:22:42.60#ibcon#first serial, iclass 33, count 0 2006.229.12:22:42.60#ibcon#enter sib2, iclass 33, count 0 2006.229.12:22:42.60#ibcon#flushed, iclass 33, count 0 2006.229.12:22:42.60#ibcon#about to write, iclass 33, count 0 2006.229.12:22:42.60#ibcon#wrote, iclass 33, count 0 2006.229.12:22:42.60#ibcon#about to read 3, iclass 33, count 0 2006.229.12:22:42.62#ibcon#read 3, iclass 33, count 0 2006.229.12:22:42.62#ibcon#about to read 4, iclass 33, count 0 2006.229.12:22:42.62#ibcon#read 4, iclass 33, count 0 2006.229.12:22:42.62#ibcon#about to read 5, iclass 33, count 0 2006.229.12:22:42.62#ibcon#read 5, iclass 33, count 0 2006.229.12:22:42.62#ibcon#about to read 6, iclass 33, count 0 2006.229.12:22:42.62#ibcon#read 6, iclass 33, count 0 2006.229.12:22:42.62#ibcon#end of sib2, iclass 33, count 0 2006.229.12:22:42.62#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:22:42.62#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:22:42.62#ibcon#[27=USB\r\n] 2006.229.12:22:42.62#ibcon#*before write, iclass 33, count 0 2006.229.12:22:42.62#ibcon#enter sib2, iclass 33, count 0 2006.229.12:22:42.62#ibcon#flushed, iclass 33, count 0 2006.229.12:22:42.62#ibcon#about to write, iclass 33, count 0 2006.229.12:22:42.62#ibcon#wrote, iclass 33, count 0 2006.229.12:22:42.62#ibcon#about to read 3, iclass 33, count 0 2006.229.12:22:42.65#ibcon#read 3, iclass 33, count 0 2006.229.12:22:42.65#ibcon#about to read 4, iclass 33, count 0 2006.229.12:22:42.65#ibcon#read 4, iclass 33, count 0 2006.229.12:22:42.65#ibcon#about to read 5, iclass 33, count 0 2006.229.12:22:42.65#ibcon#read 5, iclass 33, count 0 2006.229.12:22:42.65#ibcon#about to read 6, iclass 33, count 0 2006.229.12:22:42.65#ibcon#read 6, iclass 33, count 0 2006.229.12:22:42.65#ibcon#end of sib2, iclass 33, count 0 2006.229.12:22:42.65#ibcon#*after write, iclass 33, count 0 2006.229.12:22:42.65#ibcon#*before return 0, iclass 33, count 0 2006.229.12:22:42.65#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:42.65#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:22:42.65#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:22:42.65#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:22:42.65$vck44/vabw=wide 2006.229.12:22:42.65#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.12:22:42.65#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.12:22:42.65#ibcon#ireg 8 cls_cnt 0 2006.229.12:22:42.65#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:42.65#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:42.65#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:42.65#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:22:42.65#ibcon#first serial, iclass 35, count 0 2006.229.12:22:42.65#ibcon#enter sib2, iclass 35, count 0 2006.229.12:22:42.65#ibcon#flushed, iclass 35, count 0 2006.229.12:22:42.65#ibcon#about to write, iclass 35, count 0 2006.229.12:22:42.66#ibcon#wrote, iclass 35, count 0 2006.229.12:22:42.66#ibcon#about to read 3, iclass 35, count 0 2006.229.12:22:42.67#ibcon#read 3, iclass 35, count 0 2006.229.12:22:42.67#ibcon#about to read 4, iclass 35, count 0 2006.229.12:22:42.67#ibcon#read 4, iclass 35, count 0 2006.229.12:22:42.67#ibcon#about to read 5, iclass 35, count 0 2006.229.12:22:42.67#ibcon#read 5, iclass 35, count 0 2006.229.12:22:42.67#ibcon#about to read 6, iclass 35, count 0 2006.229.12:22:42.67#ibcon#read 6, iclass 35, count 0 2006.229.12:22:42.67#ibcon#end of sib2, iclass 35, count 0 2006.229.12:22:42.67#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:22:42.67#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:22:42.67#ibcon#[25=BW32\r\n] 2006.229.12:22:42.67#ibcon#*before write, iclass 35, count 0 2006.229.12:22:42.67#ibcon#enter sib2, iclass 35, count 0 2006.229.12:22:42.67#ibcon#flushed, iclass 35, count 0 2006.229.12:22:42.67#ibcon#about to write, iclass 35, count 0 2006.229.12:22:42.67#ibcon#wrote, iclass 35, count 0 2006.229.12:22:42.67#ibcon#about to read 3, iclass 35, count 0 2006.229.12:22:42.70#ibcon#read 3, iclass 35, count 0 2006.229.12:22:42.70#ibcon#about to read 4, iclass 35, count 0 2006.229.12:22:42.70#ibcon#read 4, iclass 35, count 0 2006.229.12:22:42.70#ibcon#about to read 5, iclass 35, count 0 2006.229.12:22:42.70#ibcon#read 5, iclass 35, count 0 2006.229.12:22:42.70#ibcon#about to read 6, iclass 35, count 0 2006.229.12:22:42.70#ibcon#read 6, iclass 35, count 0 2006.229.12:22:42.70#ibcon#end of sib2, iclass 35, count 0 2006.229.12:22:42.70#ibcon#*after write, iclass 35, count 0 2006.229.12:22:42.70#ibcon#*before return 0, iclass 35, count 0 2006.229.12:22:42.70#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:42.70#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:22:42.70#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:22:42.70#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:22:42.70$vck44/vbbw=wide 2006.229.12:22:42.70#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.12:22:42.70#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.12:22:42.70#ibcon#ireg 8 cls_cnt 0 2006.229.12:22:42.70#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:22:42.77#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:22:42.77#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:22:42.77#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:22:42.77#ibcon#first serial, iclass 37, count 0 2006.229.12:22:42.77#ibcon#enter sib2, iclass 37, count 0 2006.229.12:22:42.77#ibcon#flushed, iclass 37, count 0 2006.229.12:22:42.77#ibcon#about to write, iclass 37, count 0 2006.229.12:22:42.77#ibcon#wrote, iclass 37, count 0 2006.229.12:22:42.77#ibcon#about to read 3, iclass 37, count 0 2006.229.12:22:42.79#ibcon#read 3, iclass 37, count 0 2006.229.12:22:42.79#ibcon#about to read 4, iclass 37, count 0 2006.229.12:22:42.79#ibcon#read 4, iclass 37, count 0 2006.229.12:22:42.79#ibcon#about to read 5, iclass 37, count 0 2006.229.12:22:42.79#ibcon#read 5, iclass 37, count 0 2006.229.12:22:42.79#ibcon#about to read 6, iclass 37, count 0 2006.229.12:22:42.79#ibcon#read 6, iclass 37, count 0 2006.229.12:22:42.79#ibcon#end of sib2, iclass 37, count 0 2006.229.12:22:42.79#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:22:42.79#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:22:42.79#ibcon#[27=BW32\r\n] 2006.229.12:22:42.79#ibcon#*before write, iclass 37, count 0 2006.229.12:22:42.79#ibcon#enter sib2, iclass 37, count 0 2006.229.12:22:42.79#ibcon#flushed, iclass 37, count 0 2006.229.12:22:42.79#ibcon#about to write, iclass 37, count 0 2006.229.12:22:42.79#ibcon#wrote, iclass 37, count 0 2006.229.12:22:42.79#ibcon#about to read 3, iclass 37, count 0 2006.229.12:22:42.82#ibcon#read 3, iclass 37, count 0 2006.229.12:22:42.82#ibcon#about to read 4, iclass 37, count 0 2006.229.12:22:42.82#ibcon#read 4, iclass 37, count 0 2006.229.12:22:42.82#ibcon#about to read 5, iclass 37, count 0 2006.229.12:22:42.82#ibcon#read 5, iclass 37, count 0 2006.229.12:22:42.82#ibcon#about to read 6, iclass 37, count 0 2006.229.12:22:42.82#ibcon#read 6, iclass 37, count 0 2006.229.12:22:42.82#ibcon#end of sib2, iclass 37, count 0 2006.229.12:22:42.82#ibcon#*after write, iclass 37, count 0 2006.229.12:22:42.82#ibcon#*before return 0, iclass 37, count 0 2006.229.12:22:42.82#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:22:42.82#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:22:42.82#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:22:42.82#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:22:42.82$setupk4/ifdk4 2006.229.12:22:42.82$ifdk4/lo= 2006.229.12:22:42.83$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:22:42.83$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:22:42.83$ifdk4/patch= 2006.229.12:22:42.83$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:22:42.83$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:22:42.83$setupk4/!*+20s 2006.229.12:22:43.97#abcon#<5=/04 1.7 2.8 27.721001002.4\r\n> 2006.229.12:22:43.99#abcon#{5=INTERFACE CLEAR} 2006.229.12:22:44.05#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:22:48.14#trakl#Source acquired 2006.229.12:22:50.14#flagr#flagr/antenna,acquired 2006.229.12:22:54.14#abcon#<5=/04 1.7 2.9 27.721001002.4\r\n> 2006.229.12:22:54.16#abcon#{5=INTERFACE CLEAR} 2006.229.12:22:54.22#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:22:57.37$setupk4/"tpicd 2006.229.12:22:57.37$setupk4/echo=off 2006.229.12:22:57.37$setupk4/xlog=off 2006.229.12:22:57.37:!2006.229.12:26:24 2006.229.12:26:24.00:preob 2006.229.12:26:24.14/onsource/TRACKING 2006.229.12:26:24.14:!2006.229.12:26:34 2006.229.12:26:34.00:"tape 2006.229.12:26:34.00:"st=record 2006.229.12:26:34.00:data_valid=on 2006.229.12:26:34.00:midob 2006.229.12:26:35.14/onsource/TRACKING 2006.229.12:26:35.14/wx/27.71,1002.3,100 2006.229.12:26:35.25/cable/+6.4080E-03 2006.229.12:26:36.34/va/01,08,usb,yes,29,31 2006.229.12:26:36.34/va/02,07,usb,yes,32,32 2006.229.12:26:36.34/va/03,06,usb,yes,39,42 2006.229.12:26:36.34/va/04,07,usb,yes,33,34 2006.229.12:26:36.34/va/05,04,usb,yes,29,29 2006.229.12:26:36.34/va/06,04,usb,yes,33,32 2006.229.12:26:36.34/va/07,05,usb,yes,29,29 2006.229.12:26:36.34/va/08,06,usb,yes,21,26 2006.229.12:26:36.57/valo/01,524.99,yes,locked 2006.229.12:26:36.57/valo/02,534.99,yes,locked 2006.229.12:26:36.57/valo/03,564.99,yes,locked 2006.229.12:26:36.57/valo/04,624.99,yes,locked 2006.229.12:26:36.57/valo/05,734.99,yes,locked 2006.229.12:26:36.57/valo/06,814.99,yes,locked 2006.229.12:26:36.57/valo/07,864.99,yes,locked 2006.229.12:26:36.57/valo/08,884.99,yes,locked 2006.229.12:26:37.66/vb/01,04,usb,yes,30,28 2006.229.12:26:37.66/vb/02,04,usb,yes,33,32 2006.229.12:26:37.66/vb/03,04,usb,yes,30,33 2006.229.12:26:37.66/vb/04,04,usb,yes,34,33 2006.229.12:26:37.66/vb/05,04,usb,yes,26,29 2006.229.12:26:37.66/vb/06,04,usb,yes,31,27 2006.229.12:26:37.66/vb/07,04,usb,yes,31,31 2006.229.12:26:37.66/vb/08,04,usb,yes,28,32 2006.229.12:26:37.90/vblo/01,629.99,yes,locked 2006.229.12:26:37.90/vblo/02,634.99,yes,locked 2006.229.12:26:37.90/vblo/03,649.99,yes,locked 2006.229.12:26:37.90/vblo/04,679.99,yes,locked 2006.229.12:26:37.90/vblo/05,709.99,yes,locked 2006.229.12:26:37.90/vblo/06,719.99,yes,locked 2006.229.12:26:37.90/vblo/07,734.99,yes,locked 2006.229.12:26:37.90/vblo/08,744.99,yes,locked 2006.229.12:26:38.05/vabw/8 2006.229.12:26:38.20/vbbw/8 2006.229.12:26:38.29/xfe/off,on,12.2 2006.229.12:26:38.66/ifatt/23,28,28,28 2006.229.12:26:39.07/fmout-gps/S +4.54E-07 2006.229.12:26:39.11:!2006.229.12:27:54 2006.229.12:27:54.01:data_valid=off 2006.229.12:27:54.02:"et 2006.229.12:27:54.02:!+3s 2006.229.12:27:57.03:"tape 2006.229.12:27:57.04:postob 2006.229.12:27:57.22/cable/+6.4077E-03 2006.229.12:27:57.23/wx/27.70,1002.3,100 2006.229.12:27:57.28/fmout-gps/S +4.57E-07 2006.229.12:27:57.29:scan_name=229-1232,jd0608,170 2006.229.12:27:57.29:source=2201+315,220314.98,314538.3,2000.0,cw 2006.229.12:27:58.13#flagr#flagr/antenna,new-source 2006.229.12:27:58.14:checkk5 2006.229.12:27:58.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:27:58.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:27:59.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:27:59.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:28:00.17/chk_obsdata//k5ts1/T2291226??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.12:28:00.59/chk_obsdata//k5ts2/T2291226??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.12:28:00.99/chk_obsdata//k5ts3/T2291226??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.12:28:01.39/chk_obsdata//k5ts4/T2291226??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.12:28:02.11/k5log//k5ts1_log_newline 2006.229.12:28:02.83/k5log//k5ts2_log_newline 2006.229.12:28:03.56/k5log//k5ts3_log_newline 2006.229.12:28:04.28/k5log//k5ts4_log_newline 2006.229.12:28:04.30/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:28:04.30:setupk4=1 2006.229.12:28:04.30$setupk4/echo=on 2006.229.12:28:04.31$setupk4/pcalon 2006.229.12:28:04.31$pcalon/"no phase cal control is implemented here 2006.229.12:28:04.31$setupk4/"tpicd=stop 2006.229.12:28:04.31$setupk4/"rec=synch_on 2006.229.12:28:04.31$setupk4/"rec_mode=128 2006.229.12:28:04.31$setupk4/!* 2006.229.12:28:04.31$setupk4/recpk4 2006.229.12:28:04.31$recpk4/recpatch= 2006.229.12:28:04.31$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:28:04.31$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:28:04.31$setupk4/vck44 2006.229.12:28:04.31$vck44/valo=1,524.99 2006.229.12:28:04.31#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:28:04.31#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:28:04.31#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:04.31#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:04.31#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:04.31#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:04.31#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:28:04.31#ibcon#first serial, iclass 26, count 0 2006.229.12:28:04.31#ibcon#enter sib2, iclass 26, count 0 2006.229.12:28:04.31#ibcon#flushed, iclass 26, count 0 2006.229.12:28:04.31#ibcon#about to write, iclass 26, count 0 2006.229.12:28:04.31#ibcon#wrote, iclass 26, count 0 2006.229.12:28:04.31#ibcon#about to read 3, iclass 26, count 0 2006.229.12:28:04.32#ibcon#read 3, iclass 26, count 0 2006.229.12:28:04.32#ibcon#about to read 4, iclass 26, count 0 2006.229.12:28:04.32#ibcon#read 4, iclass 26, count 0 2006.229.12:28:04.32#ibcon#about to read 5, iclass 26, count 0 2006.229.12:28:04.32#ibcon#read 5, iclass 26, count 0 2006.229.12:28:04.32#ibcon#about to read 6, iclass 26, count 0 2006.229.12:28:04.32#ibcon#read 6, iclass 26, count 0 2006.229.12:28:04.32#ibcon#end of sib2, iclass 26, count 0 2006.229.12:28:04.32#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:28:04.32#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:28:04.32#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:28:04.32#ibcon#*before write, iclass 26, count 0 2006.229.12:28:04.32#ibcon#enter sib2, iclass 26, count 0 2006.229.12:28:04.32#ibcon#flushed, iclass 26, count 0 2006.229.12:28:04.32#ibcon#about to write, iclass 26, count 0 2006.229.12:28:04.32#ibcon#wrote, iclass 26, count 0 2006.229.12:28:04.32#ibcon#about to read 3, iclass 26, count 0 2006.229.12:28:04.37#ibcon#read 3, iclass 26, count 0 2006.229.12:28:04.37#ibcon#about to read 4, iclass 26, count 0 2006.229.12:28:04.37#ibcon#read 4, iclass 26, count 0 2006.229.12:28:04.37#ibcon#about to read 5, iclass 26, count 0 2006.229.12:28:04.37#ibcon#read 5, iclass 26, count 0 2006.229.12:28:04.37#ibcon#about to read 6, iclass 26, count 0 2006.229.12:28:04.37#ibcon#read 6, iclass 26, count 0 2006.229.12:28:04.37#ibcon#end of sib2, iclass 26, count 0 2006.229.12:28:04.37#ibcon#*after write, iclass 26, count 0 2006.229.12:28:04.37#ibcon#*before return 0, iclass 26, count 0 2006.229.12:28:04.37#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:04.37#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:04.37#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:28:04.37#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:28:04.37$vck44/va=1,8 2006.229.12:28:04.37#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.12:28:04.37#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.12:28:04.37#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:04.37#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:04.37#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:04.37#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:04.37#ibcon#enter wrdev, iclass 28, count 2 2006.229.12:28:04.37#ibcon#first serial, iclass 28, count 2 2006.229.12:28:04.37#ibcon#enter sib2, iclass 28, count 2 2006.229.12:28:04.37#ibcon#flushed, iclass 28, count 2 2006.229.12:28:04.37#ibcon#about to write, iclass 28, count 2 2006.229.12:28:04.37#ibcon#wrote, iclass 28, count 2 2006.229.12:28:04.37#ibcon#about to read 3, iclass 28, count 2 2006.229.12:28:04.39#ibcon#read 3, iclass 28, count 2 2006.229.12:28:04.39#ibcon#about to read 4, iclass 28, count 2 2006.229.12:28:04.39#ibcon#read 4, iclass 28, count 2 2006.229.12:28:04.39#ibcon#about to read 5, iclass 28, count 2 2006.229.12:28:04.39#ibcon#read 5, iclass 28, count 2 2006.229.12:28:04.39#ibcon#about to read 6, iclass 28, count 2 2006.229.12:28:04.39#ibcon#read 6, iclass 28, count 2 2006.229.12:28:04.39#ibcon#end of sib2, iclass 28, count 2 2006.229.12:28:04.39#ibcon#*mode == 0, iclass 28, count 2 2006.229.12:28:04.39#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.12:28:04.39#ibcon#[25=AT01-08\r\n] 2006.229.12:28:04.39#ibcon#*before write, iclass 28, count 2 2006.229.12:28:04.39#ibcon#enter sib2, iclass 28, count 2 2006.229.12:28:04.39#ibcon#flushed, iclass 28, count 2 2006.229.12:28:04.39#ibcon#about to write, iclass 28, count 2 2006.229.12:28:04.39#ibcon#wrote, iclass 28, count 2 2006.229.12:28:04.39#ibcon#about to read 3, iclass 28, count 2 2006.229.12:28:04.42#ibcon#read 3, iclass 28, count 2 2006.229.12:28:04.42#ibcon#about to read 4, iclass 28, count 2 2006.229.12:28:04.42#ibcon#read 4, iclass 28, count 2 2006.229.12:28:04.42#ibcon#about to read 5, iclass 28, count 2 2006.229.12:28:04.42#ibcon#read 5, iclass 28, count 2 2006.229.12:28:04.42#ibcon#about to read 6, iclass 28, count 2 2006.229.12:28:04.42#ibcon#read 6, iclass 28, count 2 2006.229.12:28:04.42#ibcon#end of sib2, iclass 28, count 2 2006.229.12:28:04.42#ibcon#*after write, iclass 28, count 2 2006.229.12:28:04.42#ibcon#*before return 0, iclass 28, count 2 2006.229.12:28:04.42#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:04.42#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:04.42#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.12:28:04.42#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:04.42#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:04.54#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:04.54#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:04.54#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:28:04.54#ibcon#first serial, iclass 28, count 0 2006.229.12:28:04.54#ibcon#enter sib2, iclass 28, count 0 2006.229.12:28:04.54#ibcon#flushed, iclass 28, count 0 2006.229.12:28:04.54#ibcon#about to write, iclass 28, count 0 2006.229.12:28:04.54#ibcon#wrote, iclass 28, count 0 2006.229.12:28:04.54#ibcon#about to read 3, iclass 28, count 0 2006.229.12:28:04.56#ibcon#read 3, iclass 28, count 0 2006.229.12:28:04.56#ibcon#about to read 4, iclass 28, count 0 2006.229.12:28:04.56#ibcon#read 4, iclass 28, count 0 2006.229.12:28:04.56#ibcon#about to read 5, iclass 28, count 0 2006.229.12:28:04.56#ibcon#read 5, iclass 28, count 0 2006.229.12:28:04.56#ibcon#about to read 6, iclass 28, count 0 2006.229.12:28:04.56#ibcon#read 6, iclass 28, count 0 2006.229.12:28:04.56#ibcon#end of sib2, iclass 28, count 0 2006.229.12:28:04.56#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:28:04.56#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:28:04.56#ibcon#[25=USB\r\n] 2006.229.12:28:04.56#ibcon#*before write, iclass 28, count 0 2006.229.12:28:04.56#ibcon#enter sib2, iclass 28, count 0 2006.229.12:28:04.56#ibcon#flushed, iclass 28, count 0 2006.229.12:28:04.56#ibcon#about to write, iclass 28, count 0 2006.229.12:28:04.56#ibcon#wrote, iclass 28, count 0 2006.229.12:28:04.56#ibcon#about to read 3, iclass 28, count 0 2006.229.12:28:04.59#ibcon#read 3, iclass 28, count 0 2006.229.12:28:04.59#ibcon#about to read 4, iclass 28, count 0 2006.229.12:28:04.59#ibcon#read 4, iclass 28, count 0 2006.229.12:28:04.59#ibcon#about to read 5, iclass 28, count 0 2006.229.12:28:04.59#ibcon#read 5, iclass 28, count 0 2006.229.12:28:04.59#ibcon#about to read 6, iclass 28, count 0 2006.229.12:28:04.59#ibcon#read 6, iclass 28, count 0 2006.229.12:28:04.59#ibcon#end of sib2, iclass 28, count 0 2006.229.12:28:04.59#ibcon#*after write, iclass 28, count 0 2006.229.12:28:04.59#ibcon#*before return 0, iclass 28, count 0 2006.229.12:28:04.59#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:04.59#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:04.59#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:28:04.59#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:28:04.59$vck44/valo=2,534.99 2006.229.12:28:04.59#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.12:28:04.59#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.12:28:04.59#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:04.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:04.59#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:04.59#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:04.59#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:28:04.59#ibcon#first serial, iclass 30, count 0 2006.229.12:28:04.59#ibcon#enter sib2, iclass 30, count 0 2006.229.12:28:04.59#ibcon#flushed, iclass 30, count 0 2006.229.12:28:04.59#ibcon#about to write, iclass 30, count 0 2006.229.12:28:04.59#ibcon#wrote, iclass 30, count 0 2006.229.12:28:04.59#ibcon#about to read 3, iclass 30, count 0 2006.229.12:28:04.61#ibcon#read 3, iclass 30, count 0 2006.229.12:28:04.61#ibcon#about to read 4, iclass 30, count 0 2006.229.12:28:04.61#ibcon#read 4, iclass 30, count 0 2006.229.12:28:04.61#ibcon#about to read 5, iclass 30, count 0 2006.229.12:28:04.61#ibcon#read 5, iclass 30, count 0 2006.229.12:28:04.61#ibcon#about to read 6, iclass 30, count 0 2006.229.12:28:04.61#ibcon#read 6, iclass 30, count 0 2006.229.12:28:04.61#ibcon#end of sib2, iclass 30, count 0 2006.229.12:28:04.61#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:28:04.61#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:28:04.61#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:28:04.61#ibcon#*before write, iclass 30, count 0 2006.229.12:28:04.61#ibcon#enter sib2, iclass 30, count 0 2006.229.12:28:04.61#ibcon#flushed, iclass 30, count 0 2006.229.12:28:04.61#ibcon#about to write, iclass 30, count 0 2006.229.12:28:04.61#ibcon#wrote, iclass 30, count 0 2006.229.12:28:04.61#ibcon#about to read 3, iclass 30, count 0 2006.229.12:28:04.65#ibcon#read 3, iclass 30, count 0 2006.229.12:28:04.65#ibcon#about to read 4, iclass 30, count 0 2006.229.12:28:04.65#ibcon#read 4, iclass 30, count 0 2006.229.12:28:04.65#ibcon#about to read 5, iclass 30, count 0 2006.229.12:28:04.65#ibcon#read 5, iclass 30, count 0 2006.229.12:28:04.65#ibcon#about to read 6, iclass 30, count 0 2006.229.12:28:04.65#ibcon#read 6, iclass 30, count 0 2006.229.12:28:04.65#ibcon#end of sib2, iclass 30, count 0 2006.229.12:28:04.65#ibcon#*after write, iclass 30, count 0 2006.229.12:28:04.65#ibcon#*before return 0, iclass 30, count 0 2006.229.12:28:04.65#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:04.65#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:04.65#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:28:04.65#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:28:04.65$vck44/va=2,7 2006.229.12:28:04.65#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.12:28:04.65#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.12:28:04.65#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:04.65#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:04.71#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:04.71#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:04.71#ibcon#enter wrdev, iclass 32, count 2 2006.229.12:28:04.71#ibcon#first serial, iclass 32, count 2 2006.229.12:28:04.71#ibcon#enter sib2, iclass 32, count 2 2006.229.12:28:04.71#ibcon#flushed, iclass 32, count 2 2006.229.12:28:04.71#ibcon#about to write, iclass 32, count 2 2006.229.12:28:04.71#ibcon#wrote, iclass 32, count 2 2006.229.12:28:04.71#ibcon#about to read 3, iclass 32, count 2 2006.229.12:28:04.73#ibcon#read 3, iclass 32, count 2 2006.229.12:28:04.73#ibcon#about to read 4, iclass 32, count 2 2006.229.12:28:04.73#ibcon#read 4, iclass 32, count 2 2006.229.12:28:04.73#ibcon#about to read 5, iclass 32, count 2 2006.229.12:28:04.73#ibcon#read 5, iclass 32, count 2 2006.229.12:28:04.73#ibcon#about to read 6, iclass 32, count 2 2006.229.12:28:04.73#ibcon#read 6, iclass 32, count 2 2006.229.12:28:04.73#ibcon#end of sib2, iclass 32, count 2 2006.229.12:28:04.73#ibcon#*mode == 0, iclass 32, count 2 2006.229.12:28:04.73#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.12:28:04.73#ibcon#[25=AT02-07\r\n] 2006.229.12:28:04.73#ibcon#*before write, iclass 32, count 2 2006.229.12:28:04.73#ibcon#enter sib2, iclass 32, count 2 2006.229.12:28:04.73#ibcon#flushed, iclass 32, count 2 2006.229.12:28:04.73#ibcon#about to write, iclass 32, count 2 2006.229.12:28:04.73#ibcon#wrote, iclass 32, count 2 2006.229.12:28:04.73#ibcon#about to read 3, iclass 32, count 2 2006.229.12:28:04.76#ibcon#read 3, iclass 32, count 2 2006.229.12:28:04.76#ibcon#about to read 4, iclass 32, count 2 2006.229.12:28:04.76#ibcon#read 4, iclass 32, count 2 2006.229.12:28:04.76#ibcon#about to read 5, iclass 32, count 2 2006.229.12:28:04.76#ibcon#read 5, iclass 32, count 2 2006.229.12:28:04.76#ibcon#about to read 6, iclass 32, count 2 2006.229.12:28:04.76#ibcon#read 6, iclass 32, count 2 2006.229.12:28:04.76#ibcon#end of sib2, iclass 32, count 2 2006.229.12:28:04.76#ibcon#*after write, iclass 32, count 2 2006.229.12:28:04.76#ibcon#*before return 0, iclass 32, count 2 2006.229.12:28:04.76#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:04.76#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:04.76#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.12:28:04.76#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:04.76#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:04.88#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:04.88#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:04.88#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:28:04.88#ibcon#first serial, iclass 32, count 0 2006.229.12:28:04.88#ibcon#enter sib2, iclass 32, count 0 2006.229.12:28:04.88#ibcon#flushed, iclass 32, count 0 2006.229.12:28:04.88#ibcon#about to write, iclass 32, count 0 2006.229.12:28:04.88#ibcon#wrote, iclass 32, count 0 2006.229.12:28:04.88#ibcon#about to read 3, iclass 32, count 0 2006.229.12:28:04.90#ibcon#read 3, iclass 32, count 0 2006.229.12:28:04.90#ibcon#about to read 4, iclass 32, count 0 2006.229.12:28:04.90#ibcon#read 4, iclass 32, count 0 2006.229.12:28:04.90#ibcon#about to read 5, iclass 32, count 0 2006.229.12:28:04.90#ibcon#read 5, iclass 32, count 0 2006.229.12:28:04.90#ibcon#about to read 6, iclass 32, count 0 2006.229.12:28:04.90#ibcon#read 6, iclass 32, count 0 2006.229.12:28:04.90#ibcon#end of sib2, iclass 32, count 0 2006.229.12:28:04.90#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:28:04.90#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:28:04.90#ibcon#[25=USB\r\n] 2006.229.12:28:04.90#ibcon#*before write, iclass 32, count 0 2006.229.12:28:04.90#ibcon#enter sib2, iclass 32, count 0 2006.229.12:28:04.90#ibcon#flushed, iclass 32, count 0 2006.229.12:28:04.90#ibcon#about to write, iclass 32, count 0 2006.229.12:28:04.90#ibcon#wrote, iclass 32, count 0 2006.229.12:28:04.90#ibcon#about to read 3, iclass 32, count 0 2006.229.12:28:04.93#ibcon#read 3, iclass 32, count 0 2006.229.12:28:04.93#ibcon#about to read 4, iclass 32, count 0 2006.229.12:28:04.93#ibcon#read 4, iclass 32, count 0 2006.229.12:28:04.93#ibcon#about to read 5, iclass 32, count 0 2006.229.12:28:04.93#ibcon#read 5, iclass 32, count 0 2006.229.12:28:04.93#ibcon#about to read 6, iclass 32, count 0 2006.229.12:28:04.93#ibcon#read 6, iclass 32, count 0 2006.229.12:28:04.93#ibcon#end of sib2, iclass 32, count 0 2006.229.12:28:04.93#ibcon#*after write, iclass 32, count 0 2006.229.12:28:04.93#ibcon#*before return 0, iclass 32, count 0 2006.229.12:28:04.93#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:04.93#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:04.93#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:28:04.93#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:28:04.93$vck44/valo=3,564.99 2006.229.12:28:04.93#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.12:28:04.93#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.12:28:04.93#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:04.93#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:04.93#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:04.93#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:04.93#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:28:04.93#ibcon#first serial, iclass 34, count 0 2006.229.12:28:04.93#ibcon#enter sib2, iclass 34, count 0 2006.229.12:28:04.93#ibcon#flushed, iclass 34, count 0 2006.229.12:28:04.93#ibcon#about to write, iclass 34, count 0 2006.229.12:28:04.93#ibcon#wrote, iclass 34, count 0 2006.229.12:28:04.93#ibcon#about to read 3, iclass 34, count 0 2006.229.12:28:04.95#ibcon#read 3, iclass 34, count 0 2006.229.12:28:04.95#ibcon#about to read 4, iclass 34, count 0 2006.229.12:28:04.95#ibcon#read 4, iclass 34, count 0 2006.229.12:28:04.95#ibcon#about to read 5, iclass 34, count 0 2006.229.12:28:04.95#ibcon#read 5, iclass 34, count 0 2006.229.12:28:04.95#ibcon#about to read 6, iclass 34, count 0 2006.229.12:28:04.95#ibcon#read 6, iclass 34, count 0 2006.229.12:28:04.95#ibcon#end of sib2, iclass 34, count 0 2006.229.12:28:04.95#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:28:04.95#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:28:04.95#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:28:04.95#ibcon#*before write, iclass 34, count 0 2006.229.12:28:04.95#ibcon#enter sib2, iclass 34, count 0 2006.229.12:28:04.95#ibcon#flushed, iclass 34, count 0 2006.229.12:28:04.95#ibcon#about to write, iclass 34, count 0 2006.229.12:28:04.95#ibcon#wrote, iclass 34, count 0 2006.229.12:28:04.95#ibcon#about to read 3, iclass 34, count 0 2006.229.12:28:04.99#ibcon#read 3, iclass 34, count 0 2006.229.12:28:04.99#ibcon#about to read 4, iclass 34, count 0 2006.229.12:28:04.99#ibcon#read 4, iclass 34, count 0 2006.229.12:28:04.99#ibcon#about to read 5, iclass 34, count 0 2006.229.12:28:04.99#ibcon#read 5, iclass 34, count 0 2006.229.12:28:04.99#ibcon#about to read 6, iclass 34, count 0 2006.229.12:28:04.99#ibcon#read 6, iclass 34, count 0 2006.229.12:28:04.99#ibcon#end of sib2, iclass 34, count 0 2006.229.12:28:04.99#ibcon#*after write, iclass 34, count 0 2006.229.12:28:04.99#ibcon#*before return 0, iclass 34, count 0 2006.229.12:28:04.99#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:04.99#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:04.99#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:28:04.99#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:28:04.99$vck44/va=3,6 2006.229.12:28:04.99#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.12:28:04.99#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.12:28:04.99#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:04.99#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:05.05#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:05.05#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:05.05#ibcon#enter wrdev, iclass 36, count 2 2006.229.12:28:05.05#ibcon#first serial, iclass 36, count 2 2006.229.12:28:05.05#ibcon#enter sib2, iclass 36, count 2 2006.229.12:28:05.05#ibcon#flushed, iclass 36, count 2 2006.229.12:28:05.05#ibcon#about to write, iclass 36, count 2 2006.229.12:28:05.05#ibcon#wrote, iclass 36, count 2 2006.229.12:28:05.05#ibcon#about to read 3, iclass 36, count 2 2006.229.12:28:05.07#ibcon#read 3, iclass 36, count 2 2006.229.12:28:05.07#ibcon#about to read 4, iclass 36, count 2 2006.229.12:28:05.07#ibcon#read 4, iclass 36, count 2 2006.229.12:28:05.07#ibcon#about to read 5, iclass 36, count 2 2006.229.12:28:05.07#ibcon#read 5, iclass 36, count 2 2006.229.12:28:05.07#ibcon#about to read 6, iclass 36, count 2 2006.229.12:28:05.07#ibcon#read 6, iclass 36, count 2 2006.229.12:28:05.07#ibcon#end of sib2, iclass 36, count 2 2006.229.12:28:05.07#ibcon#*mode == 0, iclass 36, count 2 2006.229.12:28:05.07#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.12:28:05.07#ibcon#[25=AT03-06\r\n] 2006.229.12:28:05.07#ibcon#*before write, iclass 36, count 2 2006.229.12:28:05.07#ibcon#enter sib2, iclass 36, count 2 2006.229.12:28:05.07#ibcon#flushed, iclass 36, count 2 2006.229.12:28:05.07#ibcon#about to write, iclass 36, count 2 2006.229.12:28:05.07#ibcon#wrote, iclass 36, count 2 2006.229.12:28:05.07#ibcon#about to read 3, iclass 36, count 2 2006.229.12:28:05.10#ibcon#read 3, iclass 36, count 2 2006.229.12:28:05.10#ibcon#about to read 4, iclass 36, count 2 2006.229.12:28:05.10#ibcon#read 4, iclass 36, count 2 2006.229.12:28:05.10#ibcon#about to read 5, iclass 36, count 2 2006.229.12:28:05.10#ibcon#read 5, iclass 36, count 2 2006.229.12:28:05.10#ibcon#about to read 6, iclass 36, count 2 2006.229.12:28:05.10#ibcon#read 6, iclass 36, count 2 2006.229.12:28:05.10#ibcon#end of sib2, iclass 36, count 2 2006.229.12:28:05.10#ibcon#*after write, iclass 36, count 2 2006.229.12:28:05.10#ibcon#*before return 0, iclass 36, count 2 2006.229.12:28:05.10#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:05.10#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:05.10#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.12:28:05.10#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:05.10#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:05.22#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:05.22#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:05.22#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:28:05.22#ibcon#first serial, iclass 36, count 0 2006.229.12:28:05.22#ibcon#enter sib2, iclass 36, count 0 2006.229.12:28:05.22#ibcon#flushed, iclass 36, count 0 2006.229.12:28:05.22#ibcon#about to write, iclass 36, count 0 2006.229.12:28:05.22#ibcon#wrote, iclass 36, count 0 2006.229.12:28:05.22#ibcon#about to read 3, iclass 36, count 0 2006.229.12:28:05.24#ibcon#read 3, iclass 36, count 0 2006.229.12:28:05.24#ibcon#about to read 4, iclass 36, count 0 2006.229.12:28:05.24#ibcon#read 4, iclass 36, count 0 2006.229.12:28:05.24#ibcon#about to read 5, iclass 36, count 0 2006.229.12:28:05.24#ibcon#read 5, iclass 36, count 0 2006.229.12:28:05.24#ibcon#about to read 6, iclass 36, count 0 2006.229.12:28:05.24#ibcon#read 6, iclass 36, count 0 2006.229.12:28:05.24#ibcon#end of sib2, iclass 36, count 0 2006.229.12:28:05.24#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:28:05.24#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:28:05.24#ibcon#[25=USB\r\n] 2006.229.12:28:05.24#ibcon#*before write, iclass 36, count 0 2006.229.12:28:05.24#ibcon#enter sib2, iclass 36, count 0 2006.229.12:28:05.24#ibcon#flushed, iclass 36, count 0 2006.229.12:28:05.24#ibcon#about to write, iclass 36, count 0 2006.229.12:28:05.24#ibcon#wrote, iclass 36, count 0 2006.229.12:28:05.24#ibcon#about to read 3, iclass 36, count 0 2006.229.12:28:05.27#ibcon#read 3, iclass 36, count 0 2006.229.12:28:05.27#ibcon#about to read 4, iclass 36, count 0 2006.229.12:28:05.27#ibcon#read 4, iclass 36, count 0 2006.229.12:28:05.27#ibcon#about to read 5, iclass 36, count 0 2006.229.12:28:05.27#ibcon#read 5, iclass 36, count 0 2006.229.12:28:05.27#ibcon#about to read 6, iclass 36, count 0 2006.229.12:28:05.27#ibcon#read 6, iclass 36, count 0 2006.229.12:28:05.27#ibcon#end of sib2, iclass 36, count 0 2006.229.12:28:05.27#ibcon#*after write, iclass 36, count 0 2006.229.12:28:05.27#ibcon#*before return 0, iclass 36, count 0 2006.229.12:28:05.27#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:05.27#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:05.27#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:28:05.27#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:28:05.27$vck44/valo=4,624.99 2006.229.12:28:05.27#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:28:05.27#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:28:05.27#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:05.27#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:05.27#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:05.27#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:05.27#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:28:05.27#ibcon#first serial, iclass 38, count 0 2006.229.12:28:05.27#ibcon#enter sib2, iclass 38, count 0 2006.229.12:28:05.27#ibcon#flushed, iclass 38, count 0 2006.229.12:28:05.27#ibcon#about to write, iclass 38, count 0 2006.229.12:28:05.27#ibcon#wrote, iclass 38, count 0 2006.229.12:28:05.27#ibcon#about to read 3, iclass 38, count 0 2006.229.12:28:05.29#ibcon#read 3, iclass 38, count 0 2006.229.12:28:05.29#ibcon#about to read 4, iclass 38, count 0 2006.229.12:28:05.29#ibcon#read 4, iclass 38, count 0 2006.229.12:28:05.29#ibcon#about to read 5, iclass 38, count 0 2006.229.12:28:05.29#ibcon#read 5, iclass 38, count 0 2006.229.12:28:05.29#ibcon#about to read 6, iclass 38, count 0 2006.229.12:28:05.29#ibcon#read 6, iclass 38, count 0 2006.229.12:28:05.29#ibcon#end of sib2, iclass 38, count 0 2006.229.12:28:05.29#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:28:05.29#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:28:05.29#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:28:05.29#ibcon#*before write, iclass 38, count 0 2006.229.12:28:05.29#ibcon#enter sib2, iclass 38, count 0 2006.229.12:28:05.29#ibcon#flushed, iclass 38, count 0 2006.229.12:28:05.29#ibcon#about to write, iclass 38, count 0 2006.229.12:28:05.29#ibcon#wrote, iclass 38, count 0 2006.229.12:28:05.29#ibcon#about to read 3, iclass 38, count 0 2006.229.12:28:05.33#ibcon#read 3, iclass 38, count 0 2006.229.12:28:05.33#ibcon#about to read 4, iclass 38, count 0 2006.229.12:28:05.33#ibcon#read 4, iclass 38, count 0 2006.229.12:28:05.33#ibcon#about to read 5, iclass 38, count 0 2006.229.12:28:05.33#ibcon#read 5, iclass 38, count 0 2006.229.12:28:05.33#ibcon#about to read 6, iclass 38, count 0 2006.229.12:28:05.33#ibcon#read 6, iclass 38, count 0 2006.229.12:28:05.33#ibcon#end of sib2, iclass 38, count 0 2006.229.12:28:05.33#ibcon#*after write, iclass 38, count 0 2006.229.12:28:05.33#ibcon#*before return 0, iclass 38, count 0 2006.229.12:28:05.33#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:05.33#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:05.33#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:28:05.33#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:28:05.33$vck44/va=4,7 2006.229.12:28:05.33#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.12:28:05.33#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.12:28:05.33#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:05.33#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:05.39#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:05.39#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:05.39#ibcon#enter wrdev, iclass 40, count 2 2006.229.12:28:05.39#ibcon#first serial, iclass 40, count 2 2006.229.12:28:05.39#ibcon#enter sib2, iclass 40, count 2 2006.229.12:28:05.39#ibcon#flushed, iclass 40, count 2 2006.229.12:28:05.39#ibcon#about to write, iclass 40, count 2 2006.229.12:28:05.39#ibcon#wrote, iclass 40, count 2 2006.229.12:28:05.39#ibcon#about to read 3, iclass 40, count 2 2006.229.12:28:05.41#ibcon#read 3, iclass 40, count 2 2006.229.12:28:05.41#ibcon#about to read 4, iclass 40, count 2 2006.229.12:28:05.41#ibcon#read 4, iclass 40, count 2 2006.229.12:28:05.41#ibcon#about to read 5, iclass 40, count 2 2006.229.12:28:05.41#ibcon#read 5, iclass 40, count 2 2006.229.12:28:05.41#ibcon#about to read 6, iclass 40, count 2 2006.229.12:28:05.41#ibcon#read 6, iclass 40, count 2 2006.229.12:28:05.41#ibcon#end of sib2, iclass 40, count 2 2006.229.12:28:05.41#ibcon#*mode == 0, iclass 40, count 2 2006.229.12:28:05.41#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.12:28:05.41#ibcon#[25=AT04-07\r\n] 2006.229.12:28:05.41#ibcon#*before write, iclass 40, count 2 2006.229.12:28:05.41#ibcon#enter sib2, iclass 40, count 2 2006.229.12:28:05.41#ibcon#flushed, iclass 40, count 2 2006.229.12:28:05.41#ibcon#about to write, iclass 40, count 2 2006.229.12:28:05.41#ibcon#wrote, iclass 40, count 2 2006.229.12:28:05.41#ibcon#about to read 3, iclass 40, count 2 2006.229.12:28:05.44#ibcon#read 3, iclass 40, count 2 2006.229.12:28:05.44#ibcon#about to read 4, iclass 40, count 2 2006.229.12:28:05.44#ibcon#read 4, iclass 40, count 2 2006.229.12:28:05.44#ibcon#about to read 5, iclass 40, count 2 2006.229.12:28:05.44#ibcon#read 5, iclass 40, count 2 2006.229.12:28:05.44#ibcon#about to read 6, iclass 40, count 2 2006.229.12:28:05.44#ibcon#read 6, iclass 40, count 2 2006.229.12:28:05.44#ibcon#end of sib2, iclass 40, count 2 2006.229.12:28:05.44#ibcon#*after write, iclass 40, count 2 2006.229.12:28:05.44#ibcon#*before return 0, iclass 40, count 2 2006.229.12:28:05.44#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:05.44#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:05.44#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.12:28:05.44#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:05.44#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:05.56#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:05.56#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:05.56#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:28:05.56#ibcon#first serial, iclass 40, count 0 2006.229.12:28:05.56#ibcon#enter sib2, iclass 40, count 0 2006.229.12:28:05.56#ibcon#flushed, iclass 40, count 0 2006.229.12:28:05.56#ibcon#about to write, iclass 40, count 0 2006.229.12:28:05.56#ibcon#wrote, iclass 40, count 0 2006.229.12:28:05.56#ibcon#about to read 3, iclass 40, count 0 2006.229.12:28:05.58#ibcon#read 3, iclass 40, count 0 2006.229.12:28:05.58#ibcon#about to read 4, iclass 40, count 0 2006.229.12:28:05.58#ibcon#read 4, iclass 40, count 0 2006.229.12:28:05.58#ibcon#about to read 5, iclass 40, count 0 2006.229.12:28:05.58#ibcon#read 5, iclass 40, count 0 2006.229.12:28:05.58#ibcon#about to read 6, iclass 40, count 0 2006.229.12:28:05.58#ibcon#read 6, iclass 40, count 0 2006.229.12:28:05.58#ibcon#end of sib2, iclass 40, count 0 2006.229.12:28:05.58#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:28:05.58#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:28:05.58#ibcon#[25=USB\r\n] 2006.229.12:28:05.58#ibcon#*before write, iclass 40, count 0 2006.229.12:28:05.58#ibcon#enter sib2, iclass 40, count 0 2006.229.12:28:05.58#ibcon#flushed, iclass 40, count 0 2006.229.12:28:05.58#ibcon#about to write, iclass 40, count 0 2006.229.12:28:05.58#ibcon#wrote, iclass 40, count 0 2006.229.12:28:05.58#ibcon#about to read 3, iclass 40, count 0 2006.229.12:28:05.61#ibcon#read 3, iclass 40, count 0 2006.229.12:28:05.61#ibcon#about to read 4, iclass 40, count 0 2006.229.12:28:05.61#ibcon#read 4, iclass 40, count 0 2006.229.12:28:05.61#ibcon#about to read 5, iclass 40, count 0 2006.229.12:28:05.61#ibcon#read 5, iclass 40, count 0 2006.229.12:28:05.61#ibcon#about to read 6, iclass 40, count 0 2006.229.12:28:05.61#ibcon#read 6, iclass 40, count 0 2006.229.12:28:05.61#ibcon#end of sib2, iclass 40, count 0 2006.229.12:28:05.61#ibcon#*after write, iclass 40, count 0 2006.229.12:28:05.61#ibcon#*before return 0, iclass 40, count 0 2006.229.12:28:05.61#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:05.61#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:05.61#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:28:05.61#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:28:05.61$vck44/valo=5,734.99 2006.229.12:28:05.61#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.12:28:05.61#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.12:28:05.61#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:05.61#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:05.61#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:05.61#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:05.61#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:28:05.61#ibcon#first serial, iclass 4, count 0 2006.229.12:28:05.61#ibcon#enter sib2, iclass 4, count 0 2006.229.12:28:05.61#ibcon#flushed, iclass 4, count 0 2006.229.12:28:05.61#ibcon#about to write, iclass 4, count 0 2006.229.12:28:05.61#ibcon#wrote, iclass 4, count 0 2006.229.12:28:05.61#ibcon#about to read 3, iclass 4, count 0 2006.229.12:28:05.63#ibcon#read 3, iclass 4, count 0 2006.229.12:28:05.63#ibcon#about to read 4, iclass 4, count 0 2006.229.12:28:05.63#ibcon#read 4, iclass 4, count 0 2006.229.12:28:05.63#ibcon#about to read 5, iclass 4, count 0 2006.229.12:28:05.63#ibcon#read 5, iclass 4, count 0 2006.229.12:28:05.63#ibcon#about to read 6, iclass 4, count 0 2006.229.12:28:05.63#ibcon#read 6, iclass 4, count 0 2006.229.12:28:05.63#ibcon#end of sib2, iclass 4, count 0 2006.229.12:28:05.63#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:28:05.63#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:28:05.63#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:28:05.63#ibcon#*before write, iclass 4, count 0 2006.229.12:28:05.63#ibcon#enter sib2, iclass 4, count 0 2006.229.12:28:05.63#ibcon#flushed, iclass 4, count 0 2006.229.12:28:05.63#ibcon#about to write, iclass 4, count 0 2006.229.12:28:05.63#ibcon#wrote, iclass 4, count 0 2006.229.12:28:05.63#ibcon#about to read 3, iclass 4, count 0 2006.229.12:28:05.67#ibcon#read 3, iclass 4, count 0 2006.229.12:28:05.67#ibcon#about to read 4, iclass 4, count 0 2006.229.12:28:05.67#ibcon#read 4, iclass 4, count 0 2006.229.12:28:05.67#ibcon#about to read 5, iclass 4, count 0 2006.229.12:28:05.67#ibcon#read 5, iclass 4, count 0 2006.229.12:28:05.67#ibcon#about to read 6, iclass 4, count 0 2006.229.12:28:05.67#ibcon#read 6, iclass 4, count 0 2006.229.12:28:05.67#ibcon#end of sib2, iclass 4, count 0 2006.229.12:28:05.67#ibcon#*after write, iclass 4, count 0 2006.229.12:28:05.67#ibcon#*before return 0, iclass 4, count 0 2006.229.12:28:05.67#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:05.67#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:05.67#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:28:05.67#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:28:05.67$vck44/va=5,4 2006.229.12:28:05.67#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.12:28:05.67#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.12:28:05.67#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:05.67#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:05.73#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:05.73#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:05.73#ibcon#enter wrdev, iclass 6, count 2 2006.229.12:28:05.73#ibcon#first serial, iclass 6, count 2 2006.229.12:28:05.73#ibcon#enter sib2, iclass 6, count 2 2006.229.12:28:05.73#ibcon#flushed, iclass 6, count 2 2006.229.12:28:05.73#ibcon#about to write, iclass 6, count 2 2006.229.12:28:05.73#ibcon#wrote, iclass 6, count 2 2006.229.12:28:05.73#ibcon#about to read 3, iclass 6, count 2 2006.229.12:28:05.75#ibcon#read 3, iclass 6, count 2 2006.229.12:28:05.75#ibcon#about to read 4, iclass 6, count 2 2006.229.12:28:05.75#ibcon#read 4, iclass 6, count 2 2006.229.12:28:05.75#ibcon#about to read 5, iclass 6, count 2 2006.229.12:28:05.75#ibcon#read 5, iclass 6, count 2 2006.229.12:28:05.75#ibcon#about to read 6, iclass 6, count 2 2006.229.12:28:05.75#ibcon#read 6, iclass 6, count 2 2006.229.12:28:05.75#ibcon#end of sib2, iclass 6, count 2 2006.229.12:28:05.75#ibcon#*mode == 0, iclass 6, count 2 2006.229.12:28:05.75#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.12:28:05.75#ibcon#[25=AT05-04\r\n] 2006.229.12:28:05.75#ibcon#*before write, iclass 6, count 2 2006.229.12:28:05.75#ibcon#enter sib2, iclass 6, count 2 2006.229.12:28:05.75#ibcon#flushed, iclass 6, count 2 2006.229.12:28:05.75#ibcon#about to write, iclass 6, count 2 2006.229.12:28:05.75#ibcon#wrote, iclass 6, count 2 2006.229.12:28:05.75#ibcon#about to read 3, iclass 6, count 2 2006.229.12:28:05.78#ibcon#read 3, iclass 6, count 2 2006.229.12:28:05.78#ibcon#about to read 4, iclass 6, count 2 2006.229.12:28:05.78#ibcon#read 4, iclass 6, count 2 2006.229.12:28:05.78#ibcon#about to read 5, iclass 6, count 2 2006.229.12:28:05.78#ibcon#read 5, iclass 6, count 2 2006.229.12:28:05.78#ibcon#about to read 6, iclass 6, count 2 2006.229.12:28:05.78#ibcon#read 6, iclass 6, count 2 2006.229.12:28:05.78#ibcon#end of sib2, iclass 6, count 2 2006.229.12:28:05.78#ibcon#*after write, iclass 6, count 2 2006.229.12:28:05.78#ibcon#*before return 0, iclass 6, count 2 2006.229.12:28:05.78#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:05.78#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:05.78#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.12:28:05.78#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:05.78#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:05.90#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:05.90#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:05.90#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:28:05.90#ibcon#first serial, iclass 6, count 0 2006.229.12:28:05.90#ibcon#enter sib2, iclass 6, count 0 2006.229.12:28:05.90#ibcon#flushed, iclass 6, count 0 2006.229.12:28:05.90#ibcon#about to write, iclass 6, count 0 2006.229.12:28:05.90#ibcon#wrote, iclass 6, count 0 2006.229.12:28:05.90#ibcon#about to read 3, iclass 6, count 0 2006.229.12:28:05.92#ibcon#read 3, iclass 6, count 0 2006.229.12:28:05.92#ibcon#about to read 4, iclass 6, count 0 2006.229.12:28:05.92#ibcon#read 4, iclass 6, count 0 2006.229.12:28:05.92#ibcon#about to read 5, iclass 6, count 0 2006.229.12:28:05.92#ibcon#read 5, iclass 6, count 0 2006.229.12:28:05.92#ibcon#about to read 6, iclass 6, count 0 2006.229.12:28:05.92#ibcon#read 6, iclass 6, count 0 2006.229.12:28:05.92#ibcon#end of sib2, iclass 6, count 0 2006.229.12:28:05.92#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:28:05.92#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:28:05.92#ibcon#[25=USB\r\n] 2006.229.12:28:05.92#ibcon#*before write, iclass 6, count 0 2006.229.12:28:05.92#ibcon#enter sib2, iclass 6, count 0 2006.229.12:28:05.92#ibcon#flushed, iclass 6, count 0 2006.229.12:28:05.92#ibcon#about to write, iclass 6, count 0 2006.229.12:28:05.92#ibcon#wrote, iclass 6, count 0 2006.229.12:28:05.92#ibcon#about to read 3, iclass 6, count 0 2006.229.12:28:05.95#ibcon#read 3, iclass 6, count 0 2006.229.12:28:05.95#ibcon#about to read 4, iclass 6, count 0 2006.229.12:28:05.95#ibcon#read 4, iclass 6, count 0 2006.229.12:28:05.95#ibcon#about to read 5, iclass 6, count 0 2006.229.12:28:05.95#ibcon#read 5, iclass 6, count 0 2006.229.12:28:05.95#ibcon#about to read 6, iclass 6, count 0 2006.229.12:28:05.95#ibcon#read 6, iclass 6, count 0 2006.229.12:28:05.95#ibcon#end of sib2, iclass 6, count 0 2006.229.12:28:05.95#ibcon#*after write, iclass 6, count 0 2006.229.12:28:05.95#ibcon#*before return 0, iclass 6, count 0 2006.229.12:28:05.95#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:05.95#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:05.95#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:28:05.95#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:28:05.95$vck44/valo=6,814.99 2006.229.12:28:05.95#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.12:28:05.95#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.12:28:05.95#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:05.95#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:05.95#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:05.95#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:05.95#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:28:05.95#ibcon#first serial, iclass 10, count 0 2006.229.12:28:05.95#ibcon#enter sib2, iclass 10, count 0 2006.229.12:28:05.95#ibcon#flushed, iclass 10, count 0 2006.229.12:28:05.95#ibcon#about to write, iclass 10, count 0 2006.229.12:28:05.95#ibcon#wrote, iclass 10, count 0 2006.229.12:28:05.95#ibcon#about to read 3, iclass 10, count 0 2006.229.12:28:05.97#ibcon#read 3, iclass 10, count 0 2006.229.12:28:05.97#ibcon#about to read 4, iclass 10, count 0 2006.229.12:28:05.97#ibcon#read 4, iclass 10, count 0 2006.229.12:28:05.97#ibcon#about to read 5, iclass 10, count 0 2006.229.12:28:05.97#ibcon#read 5, iclass 10, count 0 2006.229.12:28:05.97#ibcon#about to read 6, iclass 10, count 0 2006.229.12:28:05.97#ibcon#read 6, iclass 10, count 0 2006.229.12:28:05.97#ibcon#end of sib2, iclass 10, count 0 2006.229.12:28:05.97#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:28:05.97#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:28:05.97#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:28:05.97#ibcon#*before write, iclass 10, count 0 2006.229.12:28:05.97#ibcon#enter sib2, iclass 10, count 0 2006.229.12:28:05.97#ibcon#flushed, iclass 10, count 0 2006.229.12:28:05.97#ibcon#about to write, iclass 10, count 0 2006.229.12:28:05.97#ibcon#wrote, iclass 10, count 0 2006.229.12:28:05.97#ibcon#about to read 3, iclass 10, count 0 2006.229.12:28:06.01#ibcon#read 3, iclass 10, count 0 2006.229.12:28:06.01#ibcon#about to read 4, iclass 10, count 0 2006.229.12:28:06.01#ibcon#read 4, iclass 10, count 0 2006.229.12:28:06.01#ibcon#about to read 5, iclass 10, count 0 2006.229.12:28:06.01#ibcon#read 5, iclass 10, count 0 2006.229.12:28:06.01#ibcon#about to read 6, iclass 10, count 0 2006.229.12:28:06.01#ibcon#read 6, iclass 10, count 0 2006.229.12:28:06.01#ibcon#end of sib2, iclass 10, count 0 2006.229.12:28:06.01#ibcon#*after write, iclass 10, count 0 2006.229.12:28:06.01#ibcon#*before return 0, iclass 10, count 0 2006.229.12:28:06.01#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:06.01#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:06.01#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:28:06.01#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:28:06.01$vck44/va=6,4 2006.229.12:28:06.01#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.12:28:06.01#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.12:28:06.01#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:06.01#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:06.07#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:06.07#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:06.07#ibcon#enter wrdev, iclass 12, count 2 2006.229.12:28:06.07#ibcon#first serial, iclass 12, count 2 2006.229.12:28:06.07#ibcon#enter sib2, iclass 12, count 2 2006.229.12:28:06.07#ibcon#flushed, iclass 12, count 2 2006.229.12:28:06.07#ibcon#about to write, iclass 12, count 2 2006.229.12:28:06.07#ibcon#wrote, iclass 12, count 2 2006.229.12:28:06.07#ibcon#about to read 3, iclass 12, count 2 2006.229.12:28:06.09#ibcon#read 3, iclass 12, count 2 2006.229.12:28:06.09#ibcon#about to read 4, iclass 12, count 2 2006.229.12:28:06.09#ibcon#read 4, iclass 12, count 2 2006.229.12:28:06.09#ibcon#about to read 5, iclass 12, count 2 2006.229.12:28:06.09#ibcon#read 5, iclass 12, count 2 2006.229.12:28:06.09#ibcon#about to read 6, iclass 12, count 2 2006.229.12:28:06.09#ibcon#read 6, iclass 12, count 2 2006.229.12:28:06.09#ibcon#end of sib2, iclass 12, count 2 2006.229.12:28:06.09#ibcon#*mode == 0, iclass 12, count 2 2006.229.12:28:06.09#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.12:28:06.09#ibcon#[25=AT06-04\r\n] 2006.229.12:28:06.09#ibcon#*before write, iclass 12, count 2 2006.229.12:28:06.09#ibcon#enter sib2, iclass 12, count 2 2006.229.12:28:06.09#ibcon#flushed, iclass 12, count 2 2006.229.12:28:06.09#ibcon#about to write, iclass 12, count 2 2006.229.12:28:06.09#ibcon#wrote, iclass 12, count 2 2006.229.12:28:06.09#ibcon#about to read 3, iclass 12, count 2 2006.229.12:28:06.12#ibcon#read 3, iclass 12, count 2 2006.229.12:28:06.12#ibcon#about to read 4, iclass 12, count 2 2006.229.12:28:06.12#ibcon#read 4, iclass 12, count 2 2006.229.12:28:06.12#ibcon#about to read 5, iclass 12, count 2 2006.229.12:28:06.12#ibcon#read 5, iclass 12, count 2 2006.229.12:28:06.12#ibcon#about to read 6, iclass 12, count 2 2006.229.12:28:06.12#ibcon#read 6, iclass 12, count 2 2006.229.12:28:06.12#ibcon#end of sib2, iclass 12, count 2 2006.229.12:28:06.12#ibcon#*after write, iclass 12, count 2 2006.229.12:28:06.12#ibcon#*before return 0, iclass 12, count 2 2006.229.12:28:06.12#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:06.12#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:06.12#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.12:28:06.12#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:06.12#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:06.24#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:06.24#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:06.24#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:28:06.24#ibcon#first serial, iclass 12, count 0 2006.229.12:28:06.24#ibcon#enter sib2, iclass 12, count 0 2006.229.12:28:06.24#ibcon#flushed, iclass 12, count 0 2006.229.12:28:06.24#ibcon#about to write, iclass 12, count 0 2006.229.12:28:06.24#ibcon#wrote, iclass 12, count 0 2006.229.12:28:06.24#ibcon#about to read 3, iclass 12, count 0 2006.229.12:28:06.26#ibcon#read 3, iclass 12, count 0 2006.229.12:28:06.26#ibcon#about to read 4, iclass 12, count 0 2006.229.12:28:06.26#ibcon#read 4, iclass 12, count 0 2006.229.12:28:06.26#ibcon#about to read 5, iclass 12, count 0 2006.229.12:28:06.26#ibcon#read 5, iclass 12, count 0 2006.229.12:28:06.26#ibcon#about to read 6, iclass 12, count 0 2006.229.12:28:06.26#ibcon#read 6, iclass 12, count 0 2006.229.12:28:06.26#ibcon#end of sib2, iclass 12, count 0 2006.229.12:28:06.26#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:28:06.26#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:28:06.26#ibcon#[25=USB\r\n] 2006.229.12:28:06.26#ibcon#*before write, iclass 12, count 0 2006.229.12:28:06.26#ibcon#enter sib2, iclass 12, count 0 2006.229.12:28:06.26#ibcon#flushed, iclass 12, count 0 2006.229.12:28:06.26#ibcon#about to write, iclass 12, count 0 2006.229.12:28:06.26#ibcon#wrote, iclass 12, count 0 2006.229.12:28:06.26#ibcon#about to read 3, iclass 12, count 0 2006.229.12:28:06.29#ibcon#read 3, iclass 12, count 0 2006.229.12:28:06.29#ibcon#about to read 4, iclass 12, count 0 2006.229.12:28:06.29#ibcon#read 4, iclass 12, count 0 2006.229.12:28:06.29#ibcon#about to read 5, iclass 12, count 0 2006.229.12:28:06.29#ibcon#read 5, iclass 12, count 0 2006.229.12:28:06.29#ibcon#about to read 6, iclass 12, count 0 2006.229.12:28:06.29#ibcon#read 6, iclass 12, count 0 2006.229.12:28:06.29#ibcon#end of sib2, iclass 12, count 0 2006.229.12:28:06.29#ibcon#*after write, iclass 12, count 0 2006.229.12:28:06.29#ibcon#*before return 0, iclass 12, count 0 2006.229.12:28:06.29#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:06.29#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:06.29#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:28:06.29#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:28:06.29$vck44/valo=7,864.99 2006.229.12:28:06.29#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:28:06.29#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:28:06.29#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:06.29#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:06.29#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:06.29#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:06.29#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:28:06.29#ibcon#first serial, iclass 14, count 0 2006.229.12:28:06.29#ibcon#enter sib2, iclass 14, count 0 2006.229.12:28:06.29#ibcon#flushed, iclass 14, count 0 2006.229.12:28:06.29#ibcon#about to write, iclass 14, count 0 2006.229.12:28:06.29#ibcon#wrote, iclass 14, count 0 2006.229.12:28:06.29#ibcon#about to read 3, iclass 14, count 0 2006.229.12:28:06.31#ibcon#read 3, iclass 14, count 0 2006.229.12:28:06.31#ibcon#about to read 4, iclass 14, count 0 2006.229.12:28:06.31#ibcon#read 4, iclass 14, count 0 2006.229.12:28:06.31#ibcon#about to read 5, iclass 14, count 0 2006.229.12:28:06.31#ibcon#read 5, iclass 14, count 0 2006.229.12:28:06.31#ibcon#about to read 6, iclass 14, count 0 2006.229.12:28:06.31#ibcon#read 6, iclass 14, count 0 2006.229.12:28:06.31#ibcon#end of sib2, iclass 14, count 0 2006.229.12:28:06.31#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:28:06.31#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:28:06.31#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:28:06.31#ibcon#*before write, iclass 14, count 0 2006.229.12:28:06.31#ibcon#enter sib2, iclass 14, count 0 2006.229.12:28:06.31#ibcon#flushed, iclass 14, count 0 2006.229.12:28:06.31#ibcon#about to write, iclass 14, count 0 2006.229.12:28:06.31#ibcon#wrote, iclass 14, count 0 2006.229.12:28:06.31#ibcon#about to read 3, iclass 14, count 0 2006.229.12:28:06.35#ibcon#read 3, iclass 14, count 0 2006.229.12:28:06.35#ibcon#about to read 4, iclass 14, count 0 2006.229.12:28:06.35#ibcon#read 4, iclass 14, count 0 2006.229.12:28:06.35#ibcon#about to read 5, iclass 14, count 0 2006.229.12:28:06.35#ibcon#read 5, iclass 14, count 0 2006.229.12:28:06.35#ibcon#about to read 6, iclass 14, count 0 2006.229.12:28:06.35#ibcon#read 6, iclass 14, count 0 2006.229.12:28:06.35#ibcon#end of sib2, iclass 14, count 0 2006.229.12:28:06.35#ibcon#*after write, iclass 14, count 0 2006.229.12:28:06.35#ibcon#*before return 0, iclass 14, count 0 2006.229.12:28:06.35#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:06.35#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:06.35#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:28:06.35#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:28:06.35$vck44/va=7,5 2006.229.12:28:06.35#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.12:28:06.35#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.12:28:06.35#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:06.35#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:06.41#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:06.41#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:06.41#ibcon#enter wrdev, iclass 16, count 2 2006.229.12:28:06.41#ibcon#first serial, iclass 16, count 2 2006.229.12:28:06.41#ibcon#enter sib2, iclass 16, count 2 2006.229.12:28:06.41#ibcon#flushed, iclass 16, count 2 2006.229.12:28:06.41#ibcon#about to write, iclass 16, count 2 2006.229.12:28:06.41#ibcon#wrote, iclass 16, count 2 2006.229.12:28:06.41#ibcon#about to read 3, iclass 16, count 2 2006.229.12:28:06.43#ibcon#read 3, iclass 16, count 2 2006.229.12:28:06.43#ibcon#about to read 4, iclass 16, count 2 2006.229.12:28:06.43#ibcon#read 4, iclass 16, count 2 2006.229.12:28:06.43#ibcon#about to read 5, iclass 16, count 2 2006.229.12:28:06.43#ibcon#read 5, iclass 16, count 2 2006.229.12:28:06.43#ibcon#about to read 6, iclass 16, count 2 2006.229.12:28:06.43#ibcon#read 6, iclass 16, count 2 2006.229.12:28:06.43#ibcon#end of sib2, iclass 16, count 2 2006.229.12:28:06.43#ibcon#*mode == 0, iclass 16, count 2 2006.229.12:28:06.43#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.12:28:06.43#ibcon#[25=AT07-05\r\n] 2006.229.12:28:06.43#ibcon#*before write, iclass 16, count 2 2006.229.12:28:06.43#ibcon#enter sib2, iclass 16, count 2 2006.229.12:28:06.43#ibcon#flushed, iclass 16, count 2 2006.229.12:28:06.43#ibcon#about to write, iclass 16, count 2 2006.229.12:28:06.43#ibcon#wrote, iclass 16, count 2 2006.229.12:28:06.43#ibcon#about to read 3, iclass 16, count 2 2006.229.12:28:06.46#ibcon#read 3, iclass 16, count 2 2006.229.12:28:06.46#ibcon#about to read 4, iclass 16, count 2 2006.229.12:28:06.46#ibcon#read 4, iclass 16, count 2 2006.229.12:28:06.46#ibcon#about to read 5, iclass 16, count 2 2006.229.12:28:06.46#ibcon#read 5, iclass 16, count 2 2006.229.12:28:06.46#ibcon#about to read 6, iclass 16, count 2 2006.229.12:28:06.46#ibcon#read 6, iclass 16, count 2 2006.229.12:28:06.46#ibcon#end of sib2, iclass 16, count 2 2006.229.12:28:06.46#ibcon#*after write, iclass 16, count 2 2006.229.12:28:06.46#ibcon#*before return 0, iclass 16, count 2 2006.229.12:28:06.46#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:06.46#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:06.46#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.12:28:06.46#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:06.46#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:06.58#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:06.58#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:06.58#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:28:06.58#ibcon#first serial, iclass 16, count 0 2006.229.12:28:06.58#ibcon#enter sib2, iclass 16, count 0 2006.229.12:28:06.58#ibcon#flushed, iclass 16, count 0 2006.229.12:28:06.58#ibcon#about to write, iclass 16, count 0 2006.229.12:28:06.58#ibcon#wrote, iclass 16, count 0 2006.229.12:28:06.58#ibcon#about to read 3, iclass 16, count 0 2006.229.12:28:06.60#ibcon#read 3, iclass 16, count 0 2006.229.12:28:06.60#ibcon#about to read 4, iclass 16, count 0 2006.229.12:28:06.60#ibcon#read 4, iclass 16, count 0 2006.229.12:28:06.60#ibcon#about to read 5, iclass 16, count 0 2006.229.12:28:06.60#ibcon#read 5, iclass 16, count 0 2006.229.12:28:06.60#ibcon#about to read 6, iclass 16, count 0 2006.229.12:28:06.60#ibcon#read 6, iclass 16, count 0 2006.229.12:28:06.60#ibcon#end of sib2, iclass 16, count 0 2006.229.12:28:06.60#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:28:06.60#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:28:06.60#ibcon#[25=USB\r\n] 2006.229.12:28:06.60#ibcon#*before write, iclass 16, count 0 2006.229.12:28:06.60#ibcon#enter sib2, iclass 16, count 0 2006.229.12:28:06.60#ibcon#flushed, iclass 16, count 0 2006.229.12:28:06.60#ibcon#about to write, iclass 16, count 0 2006.229.12:28:06.60#ibcon#wrote, iclass 16, count 0 2006.229.12:28:06.60#ibcon#about to read 3, iclass 16, count 0 2006.229.12:28:06.63#ibcon#read 3, iclass 16, count 0 2006.229.12:28:06.63#ibcon#about to read 4, iclass 16, count 0 2006.229.12:28:06.63#ibcon#read 4, iclass 16, count 0 2006.229.12:28:06.63#ibcon#about to read 5, iclass 16, count 0 2006.229.12:28:06.63#ibcon#read 5, iclass 16, count 0 2006.229.12:28:06.63#ibcon#about to read 6, iclass 16, count 0 2006.229.12:28:06.63#ibcon#read 6, iclass 16, count 0 2006.229.12:28:06.63#ibcon#end of sib2, iclass 16, count 0 2006.229.12:28:06.63#ibcon#*after write, iclass 16, count 0 2006.229.12:28:06.63#ibcon#*before return 0, iclass 16, count 0 2006.229.12:28:06.63#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:06.63#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:06.63#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:28:06.63#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:28:06.63$vck44/valo=8,884.99 2006.229.12:28:06.63#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.12:28:06.63#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.12:28:06.63#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:06.63#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:28:06.63#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:28:06.63#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:28:06.63#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:28:06.63#ibcon#first serial, iclass 18, count 0 2006.229.12:28:06.63#ibcon#enter sib2, iclass 18, count 0 2006.229.12:28:06.63#ibcon#flushed, iclass 18, count 0 2006.229.12:28:06.63#ibcon#about to write, iclass 18, count 0 2006.229.12:28:06.63#ibcon#wrote, iclass 18, count 0 2006.229.12:28:06.63#ibcon#about to read 3, iclass 18, count 0 2006.229.12:28:06.65#ibcon#read 3, iclass 18, count 0 2006.229.12:28:06.65#ibcon#about to read 4, iclass 18, count 0 2006.229.12:28:06.65#ibcon#read 4, iclass 18, count 0 2006.229.12:28:06.65#ibcon#about to read 5, iclass 18, count 0 2006.229.12:28:06.65#ibcon#read 5, iclass 18, count 0 2006.229.12:28:06.65#ibcon#about to read 6, iclass 18, count 0 2006.229.12:28:06.65#ibcon#read 6, iclass 18, count 0 2006.229.12:28:06.65#ibcon#end of sib2, iclass 18, count 0 2006.229.12:28:06.65#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:28:06.65#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:28:06.65#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:28:06.65#ibcon#*before write, iclass 18, count 0 2006.229.12:28:06.65#ibcon#enter sib2, iclass 18, count 0 2006.229.12:28:06.65#ibcon#flushed, iclass 18, count 0 2006.229.12:28:06.65#ibcon#about to write, iclass 18, count 0 2006.229.12:28:06.65#ibcon#wrote, iclass 18, count 0 2006.229.12:28:06.65#ibcon#about to read 3, iclass 18, count 0 2006.229.12:28:06.69#ibcon#read 3, iclass 18, count 0 2006.229.12:28:06.69#ibcon#about to read 4, iclass 18, count 0 2006.229.12:28:06.69#ibcon#read 4, iclass 18, count 0 2006.229.12:28:06.69#ibcon#about to read 5, iclass 18, count 0 2006.229.12:28:06.69#ibcon#read 5, iclass 18, count 0 2006.229.12:28:06.69#ibcon#about to read 6, iclass 18, count 0 2006.229.12:28:06.69#ibcon#read 6, iclass 18, count 0 2006.229.12:28:06.69#ibcon#end of sib2, iclass 18, count 0 2006.229.12:28:06.69#ibcon#*after write, iclass 18, count 0 2006.229.12:28:06.69#ibcon#*before return 0, iclass 18, count 0 2006.229.12:28:06.69#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:28:06.69#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:28:06.69#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:28:06.69#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:28:06.69$vck44/va=8,6 2006.229.12:28:06.69#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.12:28:06.69#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.12:28:06.69#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:06.69#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:28:06.75#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:28:06.75#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:28:06.75#ibcon#enter wrdev, iclass 20, count 2 2006.229.12:28:06.75#ibcon#first serial, iclass 20, count 2 2006.229.12:28:06.75#ibcon#enter sib2, iclass 20, count 2 2006.229.12:28:06.75#ibcon#flushed, iclass 20, count 2 2006.229.12:28:06.75#ibcon#about to write, iclass 20, count 2 2006.229.12:28:06.75#ibcon#wrote, iclass 20, count 2 2006.229.12:28:06.75#ibcon#about to read 3, iclass 20, count 2 2006.229.12:28:06.77#ibcon#read 3, iclass 20, count 2 2006.229.12:28:06.77#ibcon#about to read 4, iclass 20, count 2 2006.229.12:28:06.77#ibcon#read 4, iclass 20, count 2 2006.229.12:28:06.77#ibcon#about to read 5, iclass 20, count 2 2006.229.12:28:06.77#ibcon#read 5, iclass 20, count 2 2006.229.12:28:06.77#ibcon#about to read 6, iclass 20, count 2 2006.229.12:28:06.77#ibcon#read 6, iclass 20, count 2 2006.229.12:28:06.77#ibcon#end of sib2, iclass 20, count 2 2006.229.12:28:06.77#ibcon#*mode == 0, iclass 20, count 2 2006.229.12:28:06.77#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.12:28:06.77#ibcon#[25=AT08-06\r\n] 2006.229.12:28:06.77#ibcon#*before write, iclass 20, count 2 2006.229.12:28:06.77#ibcon#enter sib2, iclass 20, count 2 2006.229.12:28:06.77#ibcon#flushed, iclass 20, count 2 2006.229.12:28:06.77#ibcon#about to write, iclass 20, count 2 2006.229.12:28:06.77#ibcon#wrote, iclass 20, count 2 2006.229.12:28:06.77#ibcon#about to read 3, iclass 20, count 2 2006.229.12:28:06.80#ibcon#read 3, iclass 20, count 2 2006.229.12:28:06.80#ibcon#about to read 4, iclass 20, count 2 2006.229.12:28:06.80#ibcon#read 4, iclass 20, count 2 2006.229.12:28:06.80#ibcon#about to read 5, iclass 20, count 2 2006.229.12:28:06.80#ibcon#read 5, iclass 20, count 2 2006.229.12:28:06.80#ibcon#about to read 6, iclass 20, count 2 2006.229.12:28:06.80#ibcon#read 6, iclass 20, count 2 2006.229.12:28:06.80#ibcon#end of sib2, iclass 20, count 2 2006.229.12:28:06.80#ibcon#*after write, iclass 20, count 2 2006.229.12:28:06.80#ibcon#*before return 0, iclass 20, count 2 2006.229.12:28:06.80#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:28:06.80#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:28:06.80#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.12:28:06.80#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:06.80#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:28:06.92#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:28:06.92#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:28:06.92#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:28:06.92#ibcon#first serial, iclass 20, count 0 2006.229.12:28:06.92#ibcon#enter sib2, iclass 20, count 0 2006.229.12:28:06.92#ibcon#flushed, iclass 20, count 0 2006.229.12:28:06.92#ibcon#about to write, iclass 20, count 0 2006.229.12:28:06.92#ibcon#wrote, iclass 20, count 0 2006.229.12:28:06.92#ibcon#about to read 3, iclass 20, count 0 2006.229.12:28:06.94#ibcon#read 3, iclass 20, count 0 2006.229.12:28:06.94#ibcon#about to read 4, iclass 20, count 0 2006.229.12:28:06.94#ibcon#read 4, iclass 20, count 0 2006.229.12:28:06.94#ibcon#about to read 5, iclass 20, count 0 2006.229.12:28:06.94#ibcon#read 5, iclass 20, count 0 2006.229.12:28:06.94#ibcon#about to read 6, iclass 20, count 0 2006.229.12:28:06.94#ibcon#read 6, iclass 20, count 0 2006.229.12:28:06.94#ibcon#end of sib2, iclass 20, count 0 2006.229.12:28:06.94#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:28:06.94#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:28:06.94#ibcon#[25=USB\r\n] 2006.229.12:28:06.94#ibcon#*before write, iclass 20, count 0 2006.229.12:28:06.94#ibcon#enter sib2, iclass 20, count 0 2006.229.12:28:06.94#ibcon#flushed, iclass 20, count 0 2006.229.12:28:06.94#ibcon#about to write, iclass 20, count 0 2006.229.12:28:06.94#ibcon#wrote, iclass 20, count 0 2006.229.12:28:06.94#ibcon#about to read 3, iclass 20, count 0 2006.229.12:28:06.97#ibcon#read 3, iclass 20, count 0 2006.229.12:28:06.97#ibcon#about to read 4, iclass 20, count 0 2006.229.12:28:06.97#ibcon#read 4, iclass 20, count 0 2006.229.12:28:06.97#ibcon#about to read 5, iclass 20, count 0 2006.229.12:28:06.97#ibcon#read 5, iclass 20, count 0 2006.229.12:28:06.97#ibcon#about to read 6, iclass 20, count 0 2006.229.12:28:06.97#ibcon#read 6, iclass 20, count 0 2006.229.12:28:06.97#ibcon#end of sib2, iclass 20, count 0 2006.229.12:28:06.97#ibcon#*after write, iclass 20, count 0 2006.229.12:28:06.97#ibcon#*before return 0, iclass 20, count 0 2006.229.12:28:06.97#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:28:06.97#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:28:06.97#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:28:06.97#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:28:06.97$vck44/vblo=1,629.99 2006.229.12:28:06.97#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.12:28:06.97#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.12:28:06.97#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:06.97#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:06.97#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:06.97#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:06.97#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:28:06.97#ibcon#first serial, iclass 22, count 0 2006.229.12:28:06.97#ibcon#enter sib2, iclass 22, count 0 2006.229.12:28:06.97#ibcon#flushed, iclass 22, count 0 2006.229.12:28:06.97#ibcon#about to write, iclass 22, count 0 2006.229.12:28:06.97#ibcon#wrote, iclass 22, count 0 2006.229.12:28:06.97#ibcon#about to read 3, iclass 22, count 0 2006.229.12:28:06.99#ibcon#read 3, iclass 22, count 0 2006.229.12:28:06.99#ibcon#about to read 4, iclass 22, count 0 2006.229.12:28:06.99#ibcon#read 4, iclass 22, count 0 2006.229.12:28:06.99#ibcon#about to read 5, iclass 22, count 0 2006.229.12:28:06.99#ibcon#read 5, iclass 22, count 0 2006.229.12:28:06.99#ibcon#about to read 6, iclass 22, count 0 2006.229.12:28:06.99#ibcon#read 6, iclass 22, count 0 2006.229.12:28:06.99#ibcon#end of sib2, iclass 22, count 0 2006.229.12:28:06.99#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:28:06.99#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:28:06.99#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:28:06.99#ibcon#*before write, iclass 22, count 0 2006.229.12:28:06.99#ibcon#enter sib2, iclass 22, count 0 2006.229.12:28:06.99#ibcon#flushed, iclass 22, count 0 2006.229.12:28:06.99#ibcon#about to write, iclass 22, count 0 2006.229.12:28:06.99#ibcon#wrote, iclass 22, count 0 2006.229.12:28:06.99#ibcon#about to read 3, iclass 22, count 0 2006.229.12:28:07.03#ibcon#read 3, iclass 22, count 0 2006.229.12:28:07.03#ibcon#about to read 4, iclass 22, count 0 2006.229.12:28:07.03#ibcon#read 4, iclass 22, count 0 2006.229.12:28:07.03#ibcon#about to read 5, iclass 22, count 0 2006.229.12:28:07.03#ibcon#read 5, iclass 22, count 0 2006.229.12:28:07.03#ibcon#about to read 6, iclass 22, count 0 2006.229.12:28:07.03#ibcon#read 6, iclass 22, count 0 2006.229.12:28:07.03#ibcon#end of sib2, iclass 22, count 0 2006.229.12:28:07.03#ibcon#*after write, iclass 22, count 0 2006.229.12:28:07.03#ibcon#*before return 0, iclass 22, count 0 2006.229.12:28:07.03#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:07.03#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:07.03#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:28:07.03#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:28:07.03$vck44/vb=1,4 2006.229.12:28:07.03#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.12:28:07.03#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.12:28:07.03#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:07.03#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:28:07.03#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:28:07.03#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:28:07.03#ibcon#enter wrdev, iclass 24, count 2 2006.229.12:28:07.03#ibcon#first serial, iclass 24, count 2 2006.229.12:28:07.03#ibcon#enter sib2, iclass 24, count 2 2006.229.12:28:07.03#ibcon#flushed, iclass 24, count 2 2006.229.12:28:07.03#ibcon#about to write, iclass 24, count 2 2006.229.12:28:07.03#ibcon#wrote, iclass 24, count 2 2006.229.12:28:07.03#ibcon#about to read 3, iclass 24, count 2 2006.229.12:28:07.05#ibcon#read 3, iclass 24, count 2 2006.229.12:28:07.05#ibcon#about to read 4, iclass 24, count 2 2006.229.12:28:07.05#ibcon#read 4, iclass 24, count 2 2006.229.12:28:07.05#ibcon#about to read 5, iclass 24, count 2 2006.229.12:28:07.05#ibcon#read 5, iclass 24, count 2 2006.229.12:28:07.05#ibcon#about to read 6, iclass 24, count 2 2006.229.12:28:07.05#ibcon#read 6, iclass 24, count 2 2006.229.12:28:07.05#ibcon#end of sib2, iclass 24, count 2 2006.229.12:28:07.05#ibcon#*mode == 0, iclass 24, count 2 2006.229.12:28:07.05#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.12:28:07.05#ibcon#[27=AT01-04\r\n] 2006.229.12:28:07.05#ibcon#*before write, iclass 24, count 2 2006.229.12:28:07.05#ibcon#enter sib2, iclass 24, count 2 2006.229.12:28:07.05#ibcon#flushed, iclass 24, count 2 2006.229.12:28:07.05#ibcon#about to write, iclass 24, count 2 2006.229.12:28:07.05#ibcon#wrote, iclass 24, count 2 2006.229.12:28:07.05#ibcon#about to read 3, iclass 24, count 2 2006.229.12:28:07.08#ibcon#read 3, iclass 24, count 2 2006.229.12:28:07.08#ibcon#about to read 4, iclass 24, count 2 2006.229.12:28:07.08#ibcon#read 4, iclass 24, count 2 2006.229.12:28:07.08#ibcon#about to read 5, iclass 24, count 2 2006.229.12:28:07.08#ibcon#read 5, iclass 24, count 2 2006.229.12:28:07.08#ibcon#about to read 6, iclass 24, count 2 2006.229.12:28:07.08#ibcon#read 6, iclass 24, count 2 2006.229.12:28:07.08#ibcon#end of sib2, iclass 24, count 2 2006.229.12:28:07.08#ibcon#*after write, iclass 24, count 2 2006.229.12:28:07.08#ibcon#*before return 0, iclass 24, count 2 2006.229.12:28:07.08#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:28:07.08#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:28:07.08#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.12:28:07.08#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:07.08#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:28:07.20#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:28:07.20#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:28:07.20#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:28:07.20#ibcon#first serial, iclass 24, count 0 2006.229.12:28:07.20#ibcon#enter sib2, iclass 24, count 0 2006.229.12:28:07.20#ibcon#flushed, iclass 24, count 0 2006.229.12:28:07.20#ibcon#about to write, iclass 24, count 0 2006.229.12:28:07.20#ibcon#wrote, iclass 24, count 0 2006.229.12:28:07.20#ibcon#about to read 3, iclass 24, count 0 2006.229.12:28:07.22#ibcon#read 3, iclass 24, count 0 2006.229.12:28:07.22#ibcon#about to read 4, iclass 24, count 0 2006.229.12:28:07.22#ibcon#read 4, iclass 24, count 0 2006.229.12:28:07.22#ibcon#about to read 5, iclass 24, count 0 2006.229.12:28:07.22#ibcon#read 5, iclass 24, count 0 2006.229.12:28:07.22#ibcon#about to read 6, iclass 24, count 0 2006.229.12:28:07.22#ibcon#read 6, iclass 24, count 0 2006.229.12:28:07.22#ibcon#end of sib2, iclass 24, count 0 2006.229.12:28:07.22#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:28:07.22#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:28:07.22#ibcon#[27=USB\r\n] 2006.229.12:28:07.22#ibcon#*before write, iclass 24, count 0 2006.229.12:28:07.22#ibcon#enter sib2, iclass 24, count 0 2006.229.12:28:07.22#ibcon#flushed, iclass 24, count 0 2006.229.12:28:07.22#ibcon#about to write, iclass 24, count 0 2006.229.12:28:07.22#ibcon#wrote, iclass 24, count 0 2006.229.12:28:07.22#ibcon#about to read 3, iclass 24, count 0 2006.229.12:28:07.25#ibcon#read 3, iclass 24, count 0 2006.229.12:28:07.25#ibcon#about to read 4, iclass 24, count 0 2006.229.12:28:07.25#ibcon#read 4, iclass 24, count 0 2006.229.12:28:07.25#ibcon#about to read 5, iclass 24, count 0 2006.229.12:28:07.25#ibcon#read 5, iclass 24, count 0 2006.229.12:28:07.25#ibcon#about to read 6, iclass 24, count 0 2006.229.12:28:07.25#ibcon#read 6, iclass 24, count 0 2006.229.12:28:07.25#ibcon#end of sib2, iclass 24, count 0 2006.229.12:28:07.25#ibcon#*after write, iclass 24, count 0 2006.229.12:28:07.25#ibcon#*before return 0, iclass 24, count 0 2006.229.12:28:07.25#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:28:07.25#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:28:07.25#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:28:07.25#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:28:07.25$vck44/vblo=2,634.99 2006.229.12:28:07.25#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:28:07.25#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:28:07.25#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:07.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:07.25#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:07.25#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:07.25#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:28:07.25#ibcon#first serial, iclass 26, count 0 2006.229.12:28:07.25#ibcon#enter sib2, iclass 26, count 0 2006.229.12:28:07.25#ibcon#flushed, iclass 26, count 0 2006.229.12:28:07.25#ibcon#about to write, iclass 26, count 0 2006.229.12:28:07.25#ibcon#wrote, iclass 26, count 0 2006.229.12:28:07.25#ibcon#about to read 3, iclass 26, count 0 2006.229.12:28:07.27#ibcon#read 3, iclass 26, count 0 2006.229.12:28:07.27#ibcon#about to read 4, iclass 26, count 0 2006.229.12:28:07.27#ibcon#read 4, iclass 26, count 0 2006.229.12:28:07.27#ibcon#about to read 5, iclass 26, count 0 2006.229.12:28:07.27#ibcon#read 5, iclass 26, count 0 2006.229.12:28:07.27#ibcon#about to read 6, iclass 26, count 0 2006.229.12:28:07.27#ibcon#read 6, iclass 26, count 0 2006.229.12:28:07.27#ibcon#end of sib2, iclass 26, count 0 2006.229.12:28:07.27#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:28:07.27#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:28:07.27#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:28:07.27#ibcon#*before write, iclass 26, count 0 2006.229.12:28:07.27#ibcon#enter sib2, iclass 26, count 0 2006.229.12:28:07.27#ibcon#flushed, iclass 26, count 0 2006.229.12:28:07.27#ibcon#about to write, iclass 26, count 0 2006.229.12:28:07.27#ibcon#wrote, iclass 26, count 0 2006.229.12:28:07.27#ibcon#about to read 3, iclass 26, count 0 2006.229.12:28:07.31#ibcon#read 3, iclass 26, count 0 2006.229.12:28:07.31#ibcon#about to read 4, iclass 26, count 0 2006.229.12:28:07.31#ibcon#read 4, iclass 26, count 0 2006.229.12:28:07.31#ibcon#about to read 5, iclass 26, count 0 2006.229.12:28:07.31#ibcon#read 5, iclass 26, count 0 2006.229.12:28:07.31#ibcon#about to read 6, iclass 26, count 0 2006.229.12:28:07.31#ibcon#read 6, iclass 26, count 0 2006.229.12:28:07.31#ibcon#end of sib2, iclass 26, count 0 2006.229.12:28:07.31#ibcon#*after write, iclass 26, count 0 2006.229.12:28:07.31#ibcon#*before return 0, iclass 26, count 0 2006.229.12:28:07.31#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:07.31#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:28:07.31#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:28:07.31#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:28:07.31$vck44/vb=2,4 2006.229.12:28:07.31#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.12:28:07.31#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.12:28:07.31#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:07.31#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:07.37#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:07.37#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:07.37#ibcon#enter wrdev, iclass 28, count 2 2006.229.12:28:07.37#ibcon#first serial, iclass 28, count 2 2006.229.12:28:07.37#ibcon#enter sib2, iclass 28, count 2 2006.229.12:28:07.37#ibcon#flushed, iclass 28, count 2 2006.229.12:28:07.37#ibcon#about to write, iclass 28, count 2 2006.229.12:28:07.37#ibcon#wrote, iclass 28, count 2 2006.229.12:28:07.37#ibcon#about to read 3, iclass 28, count 2 2006.229.12:28:07.39#ibcon#read 3, iclass 28, count 2 2006.229.12:28:07.39#ibcon#about to read 4, iclass 28, count 2 2006.229.12:28:07.39#ibcon#read 4, iclass 28, count 2 2006.229.12:28:07.39#ibcon#about to read 5, iclass 28, count 2 2006.229.12:28:07.39#ibcon#read 5, iclass 28, count 2 2006.229.12:28:07.39#ibcon#about to read 6, iclass 28, count 2 2006.229.12:28:07.39#ibcon#read 6, iclass 28, count 2 2006.229.12:28:07.39#ibcon#end of sib2, iclass 28, count 2 2006.229.12:28:07.39#ibcon#*mode == 0, iclass 28, count 2 2006.229.12:28:07.39#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.12:28:07.39#ibcon#[27=AT02-04\r\n] 2006.229.12:28:07.39#ibcon#*before write, iclass 28, count 2 2006.229.12:28:07.39#ibcon#enter sib2, iclass 28, count 2 2006.229.12:28:07.39#ibcon#flushed, iclass 28, count 2 2006.229.12:28:07.39#ibcon#about to write, iclass 28, count 2 2006.229.12:28:07.39#ibcon#wrote, iclass 28, count 2 2006.229.12:28:07.39#ibcon#about to read 3, iclass 28, count 2 2006.229.12:28:07.42#ibcon#read 3, iclass 28, count 2 2006.229.12:28:07.42#ibcon#about to read 4, iclass 28, count 2 2006.229.12:28:07.42#ibcon#read 4, iclass 28, count 2 2006.229.12:28:07.42#ibcon#about to read 5, iclass 28, count 2 2006.229.12:28:07.42#ibcon#read 5, iclass 28, count 2 2006.229.12:28:07.42#ibcon#about to read 6, iclass 28, count 2 2006.229.12:28:07.42#ibcon#read 6, iclass 28, count 2 2006.229.12:28:07.42#ibcon#end of sib2, iclass 28, count 2 2006.229.12:28:07.42#ibcon#*after write, iclass 28, count 2 2006.229.12:28:07.42#ibcon#*before return 0, iclass 28, count 2 2006.229.12:28:07.42#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:07.42#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:28:07.42#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.12:28:07.42#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:07.42#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:07.54#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:07.54#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:07.54#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:28:07.54#ibcon#first serial, iclass 28, count 0 2006.229.12:28:07.54#ibcon#enter sib2, iclass 28, count 0 2006.229.12:28:07.54#ibcon#flushed, iclass 28, count 0 2006.229.12:28:07.54#ibcon#about to write, iclass 28, count 0 2006.229.12:28:07.54#ibcon#wrote, iclass 28, count 0 2006.229.12:28:07.54#ibcon#about to read 3, iclass 28, count 0 2006.229.12:28:07.56#ibcon#read 3, iclass 28, count 0 2006.229.12:28:07.56#ibcon#about to read 4, iclass 28, count 0 2006.229.12:28:07.56#ibcon#read 4, iclass 28, count 0 2006.229.12:28:07.56#ibcon#about to read 5, iclass 28, count 0 2006.229.12:28:07.56#ibcon#read 5, iclass 28, count 0 2006.229.12:28:07.56#ibcon#about to read 6, iclass 28, count 0 2006.229.12:28:07.56#ibcon#read 6, iclass 28, count 0 2006.229.12:28:07.56#ibcon#end of sib2, iclass 28, count 0 2006.229.12:28:07.56#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:28:07.56#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:28:07.56#ibcon#[27=USB\r\n] 2006.229.12:28:07.56#ibcon#*before write, iclass 28, count 0 2006.229.12:28:07.56#ibcon#enter sib2, iclass 28, count 0 2006.229.12:28:07.56#ibcon#flushed, iclass 28, count 0 2006.229.12:28:07.56#ibcon#about to write, iclass 28, count 0 2006.229.12:28:07.56#ibcon#wrote, iclass 28, count 0 2006.229.12:28:07.56#ibcon#about to read 3, iclass 28, count 0 2006.229.12:28:07.59#ibcon#read 3, iclass 28, count 0 2006.229.12:28:07.59#ibcon#about to read 4, iclass 28, count 0 2006.229.12:28:07.59#ibcon#read 4, iclass 28, count 0 2006.229.12:28:07.59#ibcon#about to read 5, iclass 28, count 0 2006.229.12:28:07.59#ibcon#read 5, iclass 28, count 0 2006.229.12:28:07.59#ibcon#about to read 6, iclass 28, count 0 2006.229.12:28:07.59#ibcon#read 6, iclass 28, count 0 2006.229.12:28:07.59#ibcon#end of sib2, iclass 28, count 0 2006.229.12:28:07.59#ibcon#*after write, iclass 28, count 0 2006.229.12:28:07.59#ibcon#*before return 0, iclass 28, count 0 2006.229.12:28:07.59#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:07.59#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:28:07.59#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:28:07.59#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:28:07.59$vck44/vblo=3,649.99 2006.229.12:28:07.59#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.12:28:07.59#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.12:28:07.59#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:07.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:07.59#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:07.59#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:07.59#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:28:07.59#ibcon#first serial, iclass 30, count 0 2006.229.12:28:07.59#ibcon#enter sib2, iclass 30, count 0 2006.229.12:28:07.59#ibcon#flushed, iclass 30, count 0 2006.229.12:28:07.59#ibcon#about to write, iclass 30, count 0 2006.229.12:28:07.59#ibcon#wrote, iclass 30, count 0 2006.229.12:28:07.59#ibcon#about to read 3, iclass 30, count 0 2006.229.12:28:07.61#ibcon#read 3, iclass 30, count 0 2006.229.12:28:07.61#ibcon#about to read 4, iclass 30, count 0 2006.229.12:28:07.61#ibcon#read 4, iclass 30, count 0 2006.229.12:28:07.61#ibcon#about to read 5, iclass 30, count 0 2006.229.12:28:07.61#ibcon#read 5, iclass 30, count 0 2006.229.12:28:07.61#ibcon#about to read 6, iclass 30, count 0 2006.229.12:28:07.61#ibcon#read 6, iclass 30, count 0 2006.229.12:28:07.61#ibcon#end of sib2, iclass 30, count 0 2006.229.12:28:07.61#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:28:07.61#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:28:07.61#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:28:07.61#ibcon#*before write, iclass 30, count 0 2006.229.12:28:07.61#ibcon#enter sib2, iclass 30, count 0 2006.229.12:28:07.61#ibcon#flushed, iclass 30, count 0 2006.229.12:28:07.61#ibcon#about to write, iclass 30, count 0 2006.229.12:28:07.61#ibcon#wrote, iclass 30, count 0 2006.229.12:28:07.61#ibcon#about to read 3, iclass 30, count 0 2006.229.12:28:07.65#ibcon#read 3, iclass 30, count 0 2006.229.12:28:07.65#ibcon#about to read 4, iclass 30, count 0 2006.229.12:28:07.65#ibcon#read 4, iclass 30, count 0 2006.229.12:28:07.65#ibcon#about to read 5, iclass 30, count 0 2006.229.12:28:07.65#ibcon#read 5, iclass 30, count 0 2006.229.12:28:07.65#ibcon#about to read 6, iclass 30, count 0 2006.229.12:28:07.65#ibcon#read 6, iclass 30, count 0 2006.229.12:28:07.65#ibcon#end of sib2, iclass 30, count 0 2006.229.12:28:07.65#ibcon#*after write, iclass 30, count 0 2006.229.12:28:07.65#ibcon#*before return 0, iclass 30, count 0 2006.229.12:28:07.65#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:07.65#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:28:07.65#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:28:07.65#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:28:07.65$vck44/vb=3,4 2006.229.12:28:07.65#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.12:28:07.65#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.12:28:07.65#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:07.65#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:07.71#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:07.71#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:07.71#ibcon#enter wrdev, iclass 32, count 2 2006.229.12:28:07.71#ibcon#first serial, iclass 32, count 2 2006.229.12:28:07.71#ibcon#enter sib2, iclass 32, count 2 2006.229.12:28:07.71#ibcon#flushed, iclass 32, count 2 2006.229.12:28:07.71#ibcon#about to write, iclass 32, count 2 2006.229.12:28:07.71#ibcon#wrote, iclass 32, count 2 2006.229.12:28:07.71#ibcon#about to read 3, iclass 32, count 2 2006.229.12:28:07.73#ibcon#read 3, iclass 32, count 2 2006.229.12:28:07.73#ibcon#about to read 4, iclass 32, count 2 2006.229.12:28:07.73#ibcon#read 4, iclass 32, count 2 2006.229.12:28:07.73#ibcon#about to read 5, iclass 32, count 2 2006.229.12:28:07.73#ibcon#read 5, iclass 32, count 2 2006.229.12:28:07.73#ibcon#about to read 6, iclass 32, count 2 2006.229.12:28:07.73#ibcon#read 6, iclass 32, count 2 2006.229.12:28:07.73#ibcon#end of sib2, iclass 32, count 2 2006.229.12:28:07.73#ibcon#*mode == 0, iclass 32, count 2 2006.229.12:28:07.73#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.12:28:07.73#ibcon#[27=AT03-04\r\n] 2006.229.12:28:07.73#ibcon#*before write, iclass 32, count 2 2006.229.12:28:07.73#ibcon#enter sib2, iclass 32, count 2 2006.229.12:28:07.73#ibcon#flushed, iclass 32, count 2 2006.229.12:28:07.73#ibcon#about to write, iclass 32, count 2 2006.229.12:28:07.73#ibcon#wrote, iclass 32, count 2 2006.229.12:28:07.73#ibcon#about to read 3, iclass 32, count 2 2006.229.12:28:07.76#ibcon#read 3, iclass 32, count 2 2006.229.12:28:07.76#ibcon#about to read 4, iclass 32, count 2 2006.229.12:28:07.76#ibcon#read 4, iclass 32, count 2 2006.229.12:28:07.76#ibcon#about to read 5, iclass 32, count 2 2006.229.12:28:07.76#ibcon#read 5, iclass 32, count 2 2006.229.12:28:07.76#ibcon#about to read 6, iclass 32, count 2 2006.229.12:28:07.76#ibcon#read 6, iclass 32, count 2 2006.229.12:28:07.76#ibcon#end of sib2, iclass 32, count 2 2006.229.12:28:07.76#ibcon#*after write, iclass 32, count 2 2006.229.12:28:07.76#ibcon#*before return 0, iclass 32, count 2 2006.229.12:28:07.76#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:07.76#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:28:07.76#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.12:28:07.76#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:07.76#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:07.88#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:07.88#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:07.88#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:28:07.88#ibcon#first serial, iclass 32, count 0 2006.229.12:28:07.88#ibcon#enter sib2, iclass 32, count 0 2006.229.12:28:07.88#ibcon#flushed, iclass 32, count 0 2006.229.12:28:07.88#ibcon#about to write, iclass 32, count 0 2006.229.12:28:07.88#ibcon#wrote, iclass 32, count 0 2006.229.12:28:07.88#ibcon#about to read 3, iclass 32, count 0 2006.229.12:28:07.90#ibcon#read 3, iclass 32, count 0 2006.229.12:28:07.90#ibcon#about to read 4, iclass 32, count 0 2006.229.12:28:07.90#ibcon#read 4, iclass 32, count 0 2006.229.12:28:07.90#ibcon#about to read 5, iclass 32, count 0 2006.229.12:28:07.90#ibcon#read 5, iclass 32, count 0 2006.229.12:28:07.90#ibcon#about to read 6, iclass 32, count 0 2006.229.12:28:07.90#ibcon#read 6, iclass 32, count 0 2006.229.12:28:07.90#ibcon#end of sib2, iclass 32, count 0 2006.229.12:28:07.90#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:28:07.90#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:28:07.90#ibcon#[27=USB\r\n] 2006.229.12:28:07.90#ibcon#*before write, iclass 32, count 0 2006.229.12:28:07.90#ibcon#enter sib2, iclass 32, count 0 2006.229.12:28:07.90#ibcon#flushed, iclass 32, count 0 2006.229.12:28:07.90#ibcon#about to write, iclass 32, count 0 2006.229.12:28:07.90#ibcon#wrote, iclass 32, count 0 2006.229.12:28:07.90#ibcon#about to read 3, iclass 32, count 0 2006.229.12:28:07.93#ibcon#read 3, iclass 32, count 0 2006.229.12:28:07.93#ibcon#about to read 4, iclass 32, count 0 2006.229.12:28:07.93#ibcon#read 4, iclass 32, count 0 2006.229.12:28:07.93#ibcon#about to read 5, iclass 32, count 0 2006.229.12:28:07.93#ibcon#read 5, iclass 32, count 0 2006.229.12:28:07.93#ibcon#about to read 6, iclass 32, count 0 2006.229.12:28:07.93#ibcon#read 6, iclass 32, count 0 2006.229.12:28:07.93#ibcon#end of sib2, iclass 32, count 0 2006.229.12:28:07.93#ibcon#*after write, iclass 32, count 0 2006.229.12:28:07.93#ibcon#*before return 0, iclass 32, count 0 2006.229.12:28:07.93#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:07.93#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:28:07.93#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:28:07.93#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:28:07.93$vck44/vblo=4,679.99 2006.229.12:28:07.93#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.12:28:07.93#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.12:28:07.93#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:07.93#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:07.93#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:07.93#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:07.93#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:28:07.93#ibcon#first serial, iclass 34, count 0 2006.229.12:28:07.93#ibcon#enter sib2, iclass 34, count 0 2006.229.12:28:07.93#ibcon#flushed, iclass 34, count 0 2006.229.12:28:07.93#ibcon#about to write, iclass 34, count 0 2006.229.12:28:07.93#ibcon#wrote, iclass 34, count 0 2006.229.12:28:07.93#ibcon#about to read 3, iclass 34, count 0 2006.229.12:28:07.95#ibcon#read 3, iclass 34, count 0 2006.229.12:28:07.95#ibcon#about to read 4, iclass 34, count 0 2006.229.12:28:07.95#ibcon#read 4, iclass 34, count 0 2006.229.12:28:07.95#ibcon#about to read 5, iclass 34, count 0 2006.229.12:28:07.95#ibcon#read 5, iclass 34, count 0 2006.229.12:28:07.95#ibcon#about to read 6, iclass 34, count 0 2006.229.12:28:07.95#ibcon#read 6, iclass 34, count 0 2006.229.12:28:07.95#ibcon#end of sib2, iclass 34, count 0 2006.229.12:28:07.95#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:28:07.95#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:28:07.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:28:07.95#ibcon#*before write, iclass 34, count 0 2006.229.12:28:07.95#ibcon#enter sib2, iclass 34, count 0 2006.229.12:28:07.95#ibcon#flushed, iclass 34, count 0 2006.229.12:28:07.95#ibcon#about to write, iclass 34, count 0 2006.229.12:28:07.95#ibcon#wrote, iclass 34, count 0 2006.229.12:28:07.95#ibcon#about to read 3, iclass 34, count 0 2006.229.12:28:07.99#ibcon#read 3, iclass 34, count 0 2006.229.12:28:07.99#ibcon#about to read 4, iclass 34, count 0 2006.229.12:28:07.99#ibcon#read 4, iclass 34, count 0 2006.229.12:28:07.99#ibcon#about to read 5, iclass 34, count 0 2006.229.12:28:07.99#ibcon#read 5, iclass 34, count 0 2006.229.12:28:07.99#ibcon#about to read 6, iclass 34, count 0 2006.229.12:28:07.99#ibcon#read 6, iclass 34, count 0 2006.229.12:28:07.99#ibcon#end of sib2, iclass 34, count 0 2006.229.12:28:07.99#ibcon#*after write, iclass 34, count 0 2006.229.12:28:07.99#ibcon#*before return 0, iclass 34, count 0 2006.229.12:28:07.99#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:07.99#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:28:07.99#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:28:07.99#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:28:07.99$vck44/vb=4,4 2006.229.12:28:07.99#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.12:28:07.99#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.12:28:07.99#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:07.99#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:08.05#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:08.05#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:08.05#ibcon#enter wrdev, iclass 36, count 2 2006.229.12:28:08.05#ibcon#first serial, iclass 36, count 2 2006.229.12:28:08.05#ibcon#enter sib2, iclass 36, count 2 2006.229.12:28:08.05#ibcon#flushed, iclass 36, count 2 2006.229.12:28:08.05#ibcon#about to write, iclass 36, count 2 2006.229.12:28:08.05#ibcon#wrote, iclass 36, count 2 2006.229.12:28:08.05#ibcon#about to read 3, iclass 36, count 2 2006.229.12:28:08.07#ibcon#read 3, iclass 36, count 2 2006.229.12:28:08.07#ibcon#about to read 4, iclass 36, count 2 2006.229.12:28:08.07#ibcon#read 4, iclass 36, count 2 2006.229.12:28:08.07#ibcon#about to read 5, iclass 36, count 2 2006.229.12:28:08.07#ibcon#read 5, iclass 36, count 2 2006.229.12:28:08.07#ibcon#about to read 6, iclass 36, count 2 2006.229.12:28:08.07#ibcon#read 6, iclass 36, count 2 2006.229.12:28:08.07#ibcon#end of sib2, iclass 36, count 2 2006.229.12:28:08.07#ibcon#*mode == 0, iclass 36, count 2 2006.229.12:28:08.07#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.12:28:08.07#ibcon#[27=AT04-04\r\n] 2006.229.12:28:08.07#ibcon#*before write, iclass 36, count 2 2006.229.12:28:08.07#ibcon#enter sib2, iclass 36, count 2 2006.229.12:28:08.07#ibcon#flushed, iclass 36, count 2 2006.229.12:28:08.07#ibcon#about to write, iclass 36, count 2 2006.229.12:28:08.07#ibcon#wrote, iclass 36, count 2 2006.229.12:28:08.07#ibcon#about to read 3, iclass 36, count 2 2006.229.12:28:08.10#ibcon#read 3, iclass 36, count 2 2006.229.12:28:08.10#ibcon#about to read 4, iclass 36, count 2 2006.229.12:28:08.10#ibcon#read 4, iclass 36, count 2 2006.229.12:28:08.10#ibcon#about to read 5, iclass 36, count 2 2006.229.12:28:08.10#ibcon#read 5, iclass 36, count 2 2006.229.12:28:08.10#ibcon#about to read 6, iclass 36, count 2 2006.229.12:28:08.10#ibcon#read 6, iclass 36, count 2 2006.229.12:28:08.10#ibcon#end of sib2, iclass 36, count 2 2006.229.12:28:08.10#ibcon#*after write, iclass 36, count 2 2006.229.12:28:08.10#ibcon#*before return 0, iclass 36, count 2 2006.229.12:28:08.10#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:08.10#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:28:08.10#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.12:28:08.10#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:08.10#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:08.22#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:08.22#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:08.22#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:28:08.22#ibcon#first serial, iclass 36, count 0 2006.229.12:28:08.22#ibcon#enter sib2, iclass 36, count 0 2006.229.12:28:08.22#ibcon#flushed, iclass 36, count 0 2006.229.12:28:08.22#ibcon#about to write, iclass 36, count 0 2006.229.12:28:08.22#ibcon#wrote, iclass 36, count 0 2006.229.12:28:08.22#ibcon#about to read 3, iclass 36, count 0 2006.229.12:28:08.24#ibcon#read 3, iclass 36, count 0 2006.229.12:28:08.24#ibcon#about to read 4, iclass 36, count 0 2006.229.12:28:08.24#ibcon#read 4, iclass 36, count 0 2006.229.12:28:08.24#ibcon#about to read 5, iclass 36, count 0 2006.229.12:28:08.24#ibcon#read 5, iclass 36, count 0 2006.229.12:28:08.24#ibcon#about to read 6, iclass 36, count 0 2006.229.12:28:08.24#ibcon#read 6, iclass 36, count 0 2006.229.12:28:08.24#ibcon#end of sib2, iclass 36, count 0 2006.229.12:28:08.24#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:28:08.24#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:28:08.24#ibcon#[27=USB\r\n] 2006.229.12:28:08.24#ibcon#*before write, iclass 36, count 0 2006.229.12:28:08.24#ibcon#enter sib2, iclass 36, count 0 2006.229.12:28:08.24#ibcon#flushed, iclass 36, count 0 2006.229.12:28:08.24#ibcon#about to write, iclass 36, count 0 2006.229.12:28:08.24#ibcon#wrote, iclass 36, count 0 2006.229.12:28:08.24#ibcon#about to read 3, iclass 36, count 0 2006.229.12:28:08.27#ibcon#read 3, iclass 36, count 0 2006.229.12:28:08.27#ibcon#about to read 4, iclass 36, count 0 2006.229.12:28:08.27#ibcon#read 4, iclass 36, count 0 2006.229.12:28:08.27#ibcon#about to read 5, iclass 36, count 0 2006.229.12:28:08.27#ibcon#read 5, iclass 36, count 0 2006.229.12:28:08.27#ibcon#about to read 6, iclass 36, count 0 2006.229.12:28:08.27#ibcon#read 6, iclass 36, count 0 2006.229.12:28:08.27#ibcon#end of sib2, iclass 36, count 0 2006.229.12:28:08.27#ibcon#*after write, iclass 36, count 0 2006.229.12:28:08.27#ibcon#*before return 0, iclass 36, count 0 2006.229.12:28:08.27#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:08.27#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:28:08.27#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:28:08.27#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:28:08.27$vck44/vblo=5,709.99 2006.229.12:28:08.27#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:28:08.27#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:28:08.27#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:08.27#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:08.27#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:08.27#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:08.27#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:28:08.27#ibcon#first serial, iclass 38, count 0 2006.229.12:28:08.27#ibcon#enter sib2, iclass 38, count 0 2006.229.12:28:08.27#ibcon#flushed, iclass 38, count 0 2006.229.12:28:08.27#ibcon#about to write, iclass 38, count 0 2006.229.12:28:08.27#ibcon#wrote, iclass 38, count 0 2006.229.12:28:08.27#ibcon#about to read 3, iclass 38, count 0 2006.229.12:28:08.29#ibcon#read 3, iclass 38, count 0 2006.229.12:28:08.29#ibcon#about to read 4, iclass 38, count 0 2006.229.12:28:08.29#ibcon#read 4, iclass 38, count 0 2006.229.12:28:08.29#ibcon#about to read 5, iclass 38, count 0 2006.229.12:28:08.29#ibcon#read 5, iclass 38, count 0 2006.229.12:28:08.29#ibcon#about to read 6, iclass 38, count 0 2006.229.12:28:08.29#ibcon#read 6, iclass 38, count 0 2006.229.12:28:08.29#ibcon#end of sib2, iclass 38, count 0 2006.229.12:28:08.29#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:28:08.29#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:28:08.29#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:28:08.29#ibcon#*before write, iclass 38, count 0 2006.229.12:28:08.29#ibcon#enter sib2, iclass 38, count 0 2006.229.12:28:08.29#ibcon#flushed, iclass 38, count 0 2006.229.12:28:08.29#ibcon#about to write, iclass 38, count 0 2006.229.12:28:08.29#ibcon#wrote, iclass 38, count 0 2006.229.12:28:08.29#ibcon#about to read 3, iclass 38, count 0 2006.229.12:28:08.33#ibcon#read 3, iclass 38, count 0 2006.229.12:28:08.33#ibcon#about to read 4, iclass 38, count 0 2006.229.12:28:08.33#ibcon#read 4, iclass 38, count 0 2006.229.12:28:08.33#ibcon#about to read 5, iclass 38, count 0 2006.229.12:28:08.33#ibcon#read 5, iclass 38, count 0 2006.229.12:28:08.33#ibcon#about to read 6, iclass 38, count 0 2006.229.12:28:08.33#ibcon#read 6, iclass 38, count 0 2006.229.12:28:08.33#ibcon#end of sib2, iclass 38, count 0 2006.229.12:28:08.33#ibcon#*after write, iclass 38, count 0 2006.229.12:28:08.33#ibcon#*before return 0, iclass 38, count 0 2006.229.12:28:08.33#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:08.33#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:28:08.33#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:28:08.33#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:28:08.33$vck44/vb=5,4 2006.229.12:28:08.33#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.12:28:08.33#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.12:28:08.33#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:08.33#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:08.39#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:08.39#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:08.39#ibcon#enter wrdev, iclass 40, count 2 2006.229.12:28:08.39#ibcon#first serial, iclass 40, count 2 2006.229.12:28:08.39#ibcon#enter sib2, iclass 40, count 2 2006.229.12:28:08.39#ibcon#flushed, iclass 40, count 2 2006.229.12:28:08.39#ibcon#about to write, iclass 40, count 2 2006.229.12:28:08.39#ibcon#wrote, iclass 40, count 2 2006.229.12:28:08.39#ibcon#about to read 3, iclass 40, count 2 2006.229.12:28:08.41#ibcon#read 3, iclass 40, count 2 2006.229.12:28:08.41#ibcon#about to read 4, iclass 40, count 2 2006.229.12:28:08.41#ibcon#read 4, iclass 40, count 2 2006.229.12:28:08.41#ibcon#about to read 5, iclass 40, count 2 2006.229.12:28:08.41#ibcon#read 5, iclass 40, count 2 2006.229.12:28:08.41#ibcon#about to read 6, iclass 40, count 2 2006.229.12:28:08.41#ibcon#read 6, iclass 40, count 2 2006.229.12:28:08.41#ibcon#end of sib2, iclass 40, count 2 2006.229.12:28:08.41#ibcon#*mode == 0, iclass 40, count 2 2006.229.12:28:08.41#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.12:28:08.41#ibcon#[27=AT05-04\r\n] 2006.229.12:28:08.41#ibcon#*before write, iclass 40, count 2 2006.229.12:28:08.41#ibcon#enter sib2, iclass 40, count 2 2006.229.12:28:08.41#ibcon#flushed, iclass 40, count 2 2006.229.12:28:08.41#ibcon#about to write, iclass 40, count 2 2006.229.12:28:08.41#ibcon#wrote, iclass 40, count 2 2006.229.12:28:08.41#ibcon#about to read 3, iclass 40, count 2 2006.229.12:28:08.44#ibcon#read 3, iclass 40, count 2 2006.229.12:28:08.44#ibcon#about to read 4, iclass 40, count 2 2006.229.12:28:08.44#ibcon#read 4, iclass 40, count 2 2006.229.12:28:08.44#ibcon#about to read 5, iclass 40, count 2 2006.229.12:28:08.44#ibcon#read 5, iclass 40, count 2 2006.229.12:28:08.44#ibcon#about to read 6, iclass 40, count 2 2006.229.12:28:08.44#ibcon#read 6, iclass 40, count 2 2006.229.12:28:08.44#ibcon#end of sib2, iclass 40, count 2 2006.229.12:28:08.44#ibcon#*after write, iclass 40, count 2 2006.229.12:28:08.44#ibcon#*before return 0, iclass 40, count 2 2006.229.12:28:08.44#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:08.44#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:28:08.44#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.12:28:08.44#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:08.44#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:08.56#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:08.56#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:08.56#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:28:08.56#ibcon#first serial, iclass 40, count 0 2006.229.12:28:08.56#ibcon#enter sib2, iclass 40, count 0 2006.229.12:28:08.56#ibcon#flushed, iclass 40, count 0 2006.229.12:28:08.56#ibcon#about to write, iclass 40, count 0 2006.229.12:28:08.56#ibcon#wrote, iclass 40, count 0 2006.229.12:28:08.56#ibcon#about to read 3, iclass 40, count 0 2006.229.12:28:08.58#ibcon#read 3, iclass 40, count 0 2006.229.12:28:08.58#ibcon#about to read 4, iclass 40, count 0 2006.229.12:28:08.58#ibcon#read 4, iclass 40, count 0 2006.229.12:28:08.58#ibcon#about to read 5, iclass 40, count 0 2006.229.12:28:08.58#ibcon#read 5, iclass 40, count 0 2006.229.12:28:08.58#ibcon#about to read 6, iclass 40, count 0 2006.229.12:28:08.58#ibcon#read 6, iclass 40, count 0 2006.229.12:28:08.58#ibcon#end of sib2, iclass 40, count 0 2006.229.12:28:08.58#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:28:08.58#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:28:08.58#ibcon#[27=USB\r\n] 2006.229.12:28:08.58#ibcon#*before write, iclass 40, count 0 2006.229.12:28:08.58#ibcon#enter sib2, iclass 40, count 0 2006.229.12:28:08.58#ibcon#flushed, iclass 40, count 0 2006.229.12:28:08.58#ibcon#about to write, iclass 40, count 0 2006.229.12:28:08.58#ibcon#wrote, iclass 40, count 0 2006.229.12:28:08.58#ibcon#about to read 3, iclass 40, count 0 2006.229.12:28:08.61#ibcon#read 3, iclass 40, count 0 2006.229.12:28:08.61#ibcon#about to read 4, iclass 40, count 0 2006.229.12:28:08.61#ibcon#read 4, iclass 40, count 0 2006.229.12:28:08.61#ibcon#about to read 5, iclass 40, count 0 2006.229.12:28:08.61#ibcon#read 5, iclass 40, count 0 2006.229.12:28:08.61#ibcon#about to read 6, iclass 40, count 0 2006.229.12:28:08.61#ibcon#read 6, iclass 40, count 0 2006.229.12:28:08.61#ibcon#end of sib2, iclass 40, count 0 2006.229.12:28:08.61#ibcon#*after write, iclass 40, count 0 2006.229.12:28:08.61#ibcon#*before return 0, iclass 40, count 0 2006.229.12:28:08.61#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:08.61#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:28:08.61#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:28:08.61#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:28:08.61$vck44/vblo=6,719.99 2006.229.12:28:08.61#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.12:28:08.61#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.12:28:08.61#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:08.61#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:08.61#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:08.61#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:08.61#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:28:08.61#ibcon#first serial, iclass 4, count 0 2006.229.12:28:08.61#ibcon#enter sib2, iclass 4, count 0 2006.229.12:28:08.61#ibcon#flushed, iclass 4, count 0 2006.229.12:28:08.61#ibcon#about to write, iclass 4, count 0 2006.229.12:28:08.61#ibcon#wrote, iclass 4, count 0 2006.229.12:28:08.61#ibcon#about to read 3, iclass 4, count 0 2006.229.12:28:08.63#ibcon#read 3, iclass 4, count 0 2006.229.12:28:08.63#ibcon#about to read 4, iclass 4, count 0 2006.229.12:28:08.63#ibcon#read 4, iclass 4, count 0 2006.229.12:28:08.63#ibcon#about to read 5, iclass 4, count 0 2006.229.12:28:08.63#ibcon#read 5, iclass 4, count 0 2006.229.12:28:08.63#ibcon#about to read 6, iclass 4, count 0 2006.229.12:28:08.63#ibcon#read 6, iclass 4, count 0 2006.229.12:28:08.63#ibcon#end of sib2, iclass 4, count 0 2006.229.12:28:08.63#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:28:08.63#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:28:08.63#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:28:08.63#ibcon#*before write, iclass 4, count 0 2006.229.12:28:08.63#ibcon#enter sib2, iclass 4, count 0 2006.229.12:28:08.63#ibcon#flushed, iclass 4, count 0 2006.229.12:28:08.63#ibcon#about to write, iclass 4, count 0 2006.229.12:28:08.63#ibcon#wrote, iclass 4, count 0 2006.229.12:28:08.63#ibcon#about to read 3, iclass 4, count 0 2006.229.12:28:08.67#ibcon#read 3, iclass 4, count 0 2006.229.12:28:08.67#ibcon#about to read 4, iclass 4, count 0 2006.229.12:28:08.67#ibcon#read 4, iclass 4, count 0 2006.229.12:28:08.67#ibcon#about to read 5, iclass 4, count 0 2006.229.12:28:08.67#ibcon#read 5, iclass 4, count 0 2006.229.12:28:08.67#ibcon#about to read 6, iclass 4, count 0 2006.229.12:28:08.67#ibcon#read 6, iclass 4, count 0 2006.229.12:28:08.67#ibcon#end of sib2, iclass 4, count 0 2006.229.12:28:08.67#ibcon#*after write, iclass 4, count 0 2006.229.12:28:08.67#ibcon#*before return 0, iclass 4, count 0 2006.229.12:28:08.67#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:08.67#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:28:08.67#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:28:08.67#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:28:08.67$vck44/vb=6,4 2006.229.12:28:08.67#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.12:28:08.67#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.12:28:08.67#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:08.67#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:08.73#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:08.73#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:08.73#ibcon#enter wrdev, iclass 6, count 2 2006.229.12:28:08.73#ibcon#first serial, iclass 6, count 2 2006.229.12:28:08.73#ibcon#enter sib2, iclass 6, count 2 2006.229.12:28:08.73#ibcon#flushed, iclass 6, count 2 2006.229.12:28:08.73#ibcon#about to write, iclass 6, count 2 2006.229.12:28:08.73#ibcon#wrote, iclass 6, count 2 2006.229.12:28:08.73#ibcon#about to read 3, iclass 6, count 2 2006.229.12:28:08.75#ibcon#read 3, iclass 6, count 2 2006.229.12:28:08.75#ibcon#about to read 4, iclass 6, count 2 2006.229.12:28:08.75#ibcon#read 4, iclass 6, count 2 2006.229.12:28:08.75#ibcon#about to read 5, iclass 6, count 2 2006.229.12:28:08.75#ibcon#read 5, iclass 6, count 2 2006.229.12:28:08.75#ibcon#about to read 6, iclass 6, count 2 2006.229.12:28:08.75#ibcon#read 6, iclass 6, count 2 2006.229.12:28:08.75#ibcon#end of sib2, iclass 6, count 2 2006.229.12:28:08.75#ibcon#*mode == 0, iclass 6, count 2 2006.229.12:28:08.75#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.12:28:08.75#ibcon#[27=AT06-04\r\n] 2006.229.12:28:08.75#ibcon#*before write, iclass 6, count 2 2006.229.12:28:08.75#ibcon#enter sib2, iclass 6, count 2 2006.229.12:28:08.75#ibcon#flushed, iclass 6, count 2 2006.229.12:28:08.75#ibcon#about to write, iclass 6, count 2 2006.229.12:28:08.75#ibcon#wrote, iclass 6, count 2 2006.229.12:28:08.75#ibcon#about to read 3, iclass 6, count 2 2006.229.12:28:08.78#ibcon#read 3, iclass 6, count 2 2006.229.12:28:08.78#ibcon#about to read 4, iclass 6, count 2 2006.229.12:28:08.78#ibcon#read 4, iclass 6, count 2 2006.229.12:28:08.78#ibcon#about to read 5, iclass 6, count 2 2006.229.12:28:08.78#ibcon#read 5, iclass 6, count 2 2006.229.12:28:08.78#ibcon#about to read 6, iclass 6, count 2 2006.229.12:28:08.78#ibcon#read 6, iclass 6, count 2 2006.229.12:28:08.78#ibcon#end of sib2, iclass 6, count 2 2006.229.12:28:08.78#ibcon#*after write, iclass 6, count 2 2006.229.12:28:08.78#ibcon#*before return 0, iclass 6, count 2 2006.229.12:28:08.78#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:08.78#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:28:08.78#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.12:28:08.78#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:08.78#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:08.90#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:08.90#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:08.90#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:28:08.90#ibcon#first serial, iclass 6, count 0 2006.229.12:28:08.90#ibcon#enter sib2, iclass 6, count 0 2006.229.12:28:08.90#ibcon#flushed, iclass 6, count 0 2006.229.12:28:08.90#ibcon#about to write, iclass 6, count 0 2006.229.12:28:08.90#ibcon#wrote, iclass 6, count 0 2006.229.12:28:08.90#ibcon#about to read 3, iclass 6, count 0 2006.229.12:28:08.92#ibcon#read 3, iclass 6, count 0 2006.229.12:28:08.92#ibcon#about to read 4, iclass 6, count 0 2006.229.12:28:08.92#ibcon#read 4, iclass 6, count 0 2006.229.12:28:08.92#ibcon#about to read 5, iclass 6, count 0 2006.229.12:28:08.92#ibcon#read 5, iclass 6, count 0 2006.229.12:28:08.92#ibcon#about to read 6, iclass 6, count 0 2006.229.12:28:08.92#ibcon#read 6, iclass 6, count 0 2006.229.12:28:08.92#ibcon#end of sib2, iclass 6, count 0 2006.229.12:28:08.92#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:28:08.92#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:28:08.92#ibcon#[27=USB\r\n] 2006.229.12:28:08.92#ibcon#*before write, iclass 6, count 0 2006.229.12:28:08.92#ibcon#enter sib2, iclass 6, count 0 2006.229.12:28:08.92#ibcon#flushed, iclass 6, count 0 2006.229.12:28:08.92#ibcon#about to write, iclass 6, count 0 2006.229.12:28:08.92#ibcon#wrote, iclass 6, count 0 2006.229.12:28:08.92#ibcon#about to read 3, iclass 6, count 0 2006.229.12:28:08.95#ibcon#read 3, iclass 6, count 0 2006.229.12:28:08.95#ibcon#about to read 4, iclass 6, count 0 2006.229.12:28:08.95#ibcon#read 4, iclass 6, count 0 2006.229.12:28:08.95#ibcon#about to read 5, iclass 6, count 0 2006.229.12:28:08.95#ibcon#read 5, iclass 6, count 0 2006.229.12:28:08.95#ibcon#about to read 6, iclass 6, count 0 2006.229.12:28:08.95#ibcon#read 6, iclass 6, count 0 2006.229.12:28:08.95#ibcon#end of sib2, iclass 6, count 0 2006.229.12:28:08.95#ibcon#*after write, iclass 6, count 0 2006.229.12:28:08.95#ibcon#*before return 0, iclass 6, count 0 2006.229.12:28:08.95#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:08.95#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:28:08.95#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:28:08.95#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:28:08.95$vck44/vblo=7,734.99 2006.229.12:28:08.95#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.12:28:08.95#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.12:28:08.95#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:08.95#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:08.95#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:08.95#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:08.95#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:28:08.95#ibcon#first serial, iclass 10, count 0 2006.229.12:28:08.95#ibcon#enter sib2, iclass 10, count 0 2006.229.12:28:08.95#ibcon#flushed, iclass 10, count 0 2006.229.12:28:08.95#ibcon#about to write, iclass 10, count 0 2006.229.12:28:08.95#ibcon#wrote, iclass 10, count 0 2006.229.12:28:08.95#ibcon#about to read 3, iclass 10, count 0 2006.229.12:28:08.97#ibcon#read 3, iclass 10, count 0 2006.229.12:28:08.97#ibcon#about to read 4, iclass 10, count 0 2006.229.12:28:08.97#ibcon#read 4, iclass 10, count 0 2006.229.12:28:08.97#ibcon#about to read 5, iclass 10, count 0 2006.229.12:28:08.97#ibcon#read 5, iclass 10, count 0 2006.229.12:28:08.97#ibcon#about to read 6, iclass 10, count 0 2006.229.12:28:08.97#ibcon#read 6, iclass 10, count 0 2006.229.12:28:08.97#ibcon#end of sib2, iclass 10, count 0 2006.229.12:28:08.97#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:28:08.97#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:28:08.97#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:28:08.97#ibcon#*before write, iclass 10, count 0 2006.229.12:28:08.97#ibcon#enter sib2, iclass 10, count 0 2006.229.12:28:08.97#ibcon#flushed, iclass 10, count 0 2006.229.12:28:08.97#ibcon#about to write, iclass 10, count 0 2006.229.12:28:08.97#ibcon#wrote, iclass 10, count 0 2006.229.12:28:08.97#ibcon#about to read 3, iclass 10, count 0 2006.229.12:28:09.01#ibcon#read 3, iclass 10, count 0 2006.229.12:28:09.01#ibcon#about to read 4, iclass 10, count 0 2006.229.12:28:09.01#ibcon#read 4, iclass 10, count 0 2006.229.12:28:09.01#ibcon#about to read 5, iclass 10, count 0 2006.229.12:28:09.01#ibcon#read 5, iclass 10, count 0 2006.229.12:28:09.01#ibcon#about to read 6, iclass 10, count 0 2006.229.12:28:09.01#ibcon#read 6, iclass 10, count 0 2006.229.12:28:09.01#ibcon#end of sib2, iclass 10, count 0 2006.229.12:28:09.01#ibcon#*after write, iclass 10, count 0 2006.229.12:28:09.01#ibcon#*before return 0, iclass 10, count 0 2006.229.12:28:09.01#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:09.01#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:28:09.01#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:28:09.01#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:28:09.01$vck44/vb=7,4 2006.229.12:28:09.01#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.12:28:09.01#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.12:28:09.01#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:09.01#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:09.07#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:09.07#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:09.07#ibcon#enter wrdev, iclass 12, count 2 2006.229.12:28:09.07#ibcon#first serial, iclass 12, count 2 2006.229.12:28:09.07#ibcon#enter sib2, iclass 12, count 2 2006.229.12:28:09.07#ibcon#flushed, iclass 12, count 2 2006.229.12:28:09.07#ibcon#about to write, iclass 12, count 2 2006.229.12:28:09.07#ibcon#wrote, iclass 12, count 2 2006.229.12:28:09.07#ibcon#about to read 3, iclass 12, count 2 2006.229.12:28:09.09#ibcon#read 3, iclass 12, count 2 2006.229.12:28:09.09#ibcon#about to read 4, iclass 12, count 2 2006.229.12:28:09.09#ibcon#read 4, iclass 12, count 2 2006.229.12:28:09.09#ibcon#about to read 5, iclass 12, count 2 2006.229.12:28:09.09#ibcon#read 5, iclass 12, count 2 2006.229.12:28:09.09#ibcon#about to read 6, iclass 12, count 2 2006.229.12:28:09.09#ibcon#read 6, iclass 12, count 2 2006.229.12:28:09.09#ibcon#end of sib2, iclass 12, count 2 2006.229.12:28:09.09#ibcon#*mode == 0, iclass 12, count 2 2006.229.12:28:09.09#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.12:28:09.09#ibcon#[27=AT07-04\r\n] 2006.229.12:28:09.09#ibcon#*before write, iclass 12, count 2 2006.229.12:28:09.09#ibcon#enter sib2, iclass 12, count 2 2006.229.12:28:09.09#ibcon#flushed, iclass 12, count 2 2006.229.12:28:09.09#ibcon#about to write, iclass 12, count 2 2006.229.12:28:09.09#ibcon#wrote, iclass 12, count 2 2006.229.12:28:09.09#ibcon#about to read 3, iclass 12, count 2 2006.229.12:28:09.12#ibcon#read 3, iclass 12, count 2 2006.229.12:28:09.12#ibcon#about to read 4, iclass 12, count 2 2006.229.12:28:09.12#ibcon#read 4, iclass 12, count 2 2006.229.12:28:09.12#ibcon#about to read 5, iclass 12, count 2 2006.229.12:28:09.12#ibcon#read 5, iclass 12, count 2 2006.229.12:28:09.12#ibcon#about to read 6, iclass 12, count 2 2006.229.12:28:09.12#ibcon#read 6, iclass 12, count 2 2006.229.12:28:09.12#ibcon#end of sib2, iclass 12, count 2 2006.229.12:28:09.12#ibcon#*after write, iclass 12, count 2 2006.229.12:28:09.12#ibcon#*before return 0, iclass 12, count 2 2006.229.12:28:09.12#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:09.12#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:28:09.12#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.12:28:09.12#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:09.12#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:09.24#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:09.24#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:09.24#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:28:09.24#ibcon#first serial, iclass 12, count 0 2006.229.12:28:09.24#ibcon#enter sib2, iclass 12, count 0 2006.229.12:28:09.24#ibcon#flushed, iclass 12, count 0 2006.229.12:28:09.24#ibcon#about to write, iclass 12, count 0 2006.229.12:28:09.24#ibcon#wrote, iclass 12, count 0 2006.229.12:28:09.24#ibcon#about to read 3, iclass 12, count 0 2006.229.12:28:09.26#ibcon#read 3, iclass 12, count 0 2006.229.12:28:09.26#ibcon#about to read 4, iclass 12, count 0 2006.229.12:28:09.26#ibcon#read 4, iclass 12, count 0 2006.229.12:28:09.26#ibcon#about to read 5, iclass 12, count 0 2006.229.12:28:09.26#ibcon#read 5, iclass 12, count 0 2006.229.12:28:09.26#ibcon#about to read 6, iclass 12, count 0 2006.229.12:28:09.26#ibcon#read 6, iclass 12, count 0 2006.229.12:28:09.26#ibcon#end of sib2, iclass 12, count 0 2006.229.12:28:09.26#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:28:09.26#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:28:09.26#ibcon#[27=USB\r\n] 2006.229.12:28:09.26#ibcon#*before write, iclass 12, count 0 2006.229.12:28:09.26#ibcon#enter sib2, iclass 12, count 0 2006.229.12:28:09.26#ibcon#flushed, iclass 12, count 0 2006.229.12:28:09.26#ibcon#about to write, iclass 12, count 0 2006.229.12:28:09.26#ibcon#wrote, iclass 12, count 0 2006.229.12:28:09.26#ibcon#about to read 3, iclass 12, count 0 2006.229.12:28:09.29#ibcon#read 3, iclass 12, count 0 2006.229.12:28:09.29#ibcon#about to read 4, iclass 12, count 0 2006.229.12:28:09.29#ibcon#read 4, iclass 12, count 0 2006.229.12:28:09.29#ibcon#about to read 5, iclass 12, count 0 2006.229.12:28:09.29#ibcon#read 5, iclass 12, count 0 2006.229.12:28:09.29#ibcon#about to read 6, iclass 12, count 0 2006.229.12:28:09.29#ibcon#read 6, iclass 12, count 0 2006.229.12:28:09.29#ibcon#end of sib2, iclass 12, count 0 2006.229.12:28:09.29#ibcon#*after write, iclass 12, count 0 2006.229.12:28:09.29#ibcon#*before return 0, iclass 12, count 0 2006.229.12:28:09.29#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:09.29#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:28:09.29#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:28:09.29#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:28:09.29$vck44/vblo=8,744.99 2006.229.12:28:09.29#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:28:09.29#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:28:09.29#ibcon#ireg 17 cls_cnt 0 2006.229.12:28:09.29#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:09.29#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:09.29#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:09.29#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:28:09.29#ibcon#first serial, iclass 14, count 0 2006.229.12:28:09.29#ibcon#enter sib2, iclass 14, count 0 2006.229.12:28:09.29#ibcon#flushed, iclass 14, count 0 2006.229.12:28:09.29#ibcon#about to write, iclass 14, count 0 2006.229.12:28:09.29#ibcon#wrote, iclass 14, count 0 2006.229.12:28:09.29#ibcon#about to read 3, iclass 14, count 0 2006.229.12:28:09.31#ibcon#read 3, iclass 14, count 0 2006.229.12:28:09.31#ibcon#about to read 4, iclass 14, count 0 2006.229.12:28:09.31#ibcon#read 4, iclass 14, count 0 2006.229.12:28:09.31#ibcon#about to read 5, iclass 14, count 0 2006.229.12:28:09.31#ibcon#read 5, iclass 14, count 0 2006.229.12:28:09.31#ibcon#about to read 6, iclass 14, count 0 2006.229.12:28:09.31#ibcon#read 6, iclass 14, count 0 2006.229.12:28:09.31#ibcon#end of sib2, iclass 14, count 0 2006.229.12:28:09.31#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:28:09.31#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:28:09.31#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:28:09.31#ibcon#*before write, iclass 14, count 0 2006.229.12:28:09.31#ibcon#enter sib2, iclass 14, count 0 2006.229.12:28:09.31#ibcon#flushed, iclass 14, count 0 2006.229.12:28:09.31#ibcon#about to write, iclass 14, count 0 2006.229.12:28:09.31#ibcon#wrote, iclass 14, count 0 2006.229.12:28:09.31#ibcon#about to read 3, iclass 14, count 0 2006.229.12:28:09.35#ibcon#read 3, iclass 14, count 0 2006.229.12:28:09.35#ibcon#about to read 4, iclass 14, count 0 2006.229.12:28:09.35#ibcon#read 4, iclass 14, count 0 2006.229.12:28:09.35#ibcon#about to read 5, iclass 14, count 0 2006.229.12:28:09.35#ibcon#read 5, iclass 14, count 0 2006.229.12:28:09.35#ibcon#about to read 6, iclass 14, count 0 2006.229.12:28:09.35#ibcon#read 6, iclass 14, count 0 2006.229.12:28:09.35#ibcon#end of sib2, iclass 14, count 0 2006.229.12:28:09.35#ibcon#*after write, iclass 14, count 0 2006.229.12:28:09.35#ibcon#*before return 0, iclass 14, count 0 2006.229.12:28:09.35#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:09.35#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:28:09.35#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:28:09.35#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:28:09.35$vck44/vb=8,4 2006.229.12:28:09.35#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.12:28:09.35#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.12:28:09.35#ibcon#ireg 11 cls_cnt 2 2006.229.12:28:09.35#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:09.41#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:09.41#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:09.41#ibcon#enter wrdev, iclass 16, count 2 2006.229.12:28:09.41#ibcon#first serial, iclass 16, count 2 2006.229.12:28:09.41#ibcon#enter sib2, iclass 16, count 2 2006.229.12:28:09.41#ibcon#flushed, iclass 16, count 2 2006.229.12:28:09.41#ibcon#about to write, iclass 16, count 2 2006.229.12:28:09.41#ibcon#wrote, iclass 16, count 2 2006.229.12:28:09.41#ibcon#about to read 3, iclass 16, count 2 2006.229.12:28:09.42#abcon#<5=/04 1.9 3.4 27.701001002.3\r\n> 2006.229.12:28:09.43#ibcon#read 3, iclass 16, count 2 2006.229.12:28:09.43#ibcon#about to read 4, iclass 16, count 2 2006.229.12:28:09.43#ibcon#read 4, iclass 16, count 2 2006.229.12:28:09.43#ibcon#about to read 5, iclass 16, count 2 2006.229.12:28:09.43#ibcon#read 5, iclass 16, count 2 2006.229.12:28:09.43#ibcon#about to read 6, iclass 16, count 2 2006.229.12:28:09.43#ibcon#read 6, iclass 16, count 2 2006.229.12:28:09.43#ibcon#end of sib2, iclass 16, count 2 2006.229.12:28:09.43#ibcon#*mode == 0, iclass 16, count 2 2006.229.12:28:09.43#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.12:28:09.43#ibcon#[27=AT08-04\r\n] 2006.229.12:28:09.43#ibcon#*before write, iclass 16, count 2 2006.229.12:28:09.43#ibcon#enter sib2, iclass 16, count 2 2006.229.12:28:09.43#ibcon#flushed, iclass 16, count 2 2006.229.12:28:09.43#ibcon#about to write, iclass 16, count 2 2006.229.12:28:09.43#ibcon#wrote, iclass 16, count 2 2006.229.12:28:09.43#ibcon#about to read 3, iclass 16, count 2 2006.229.12:28:09.44#abcon#{5=INTERFACE CLEAR} 2006.229.12:28:09.46#ibcon#read 3, iclass 16, count 2 2006.229.12:28:09.46#ibcon#about to read 4, iclass 16, count 2 2006.229.12:28:09.46#ibcon#read 4, iclass 16, count 2 2006.229.12:28:09.46#ibcon#about to read 5, iclass 16, count 2 2006.229.12:28:09.46#ibcon#read 5, iclass 16, count 2 2006.229.12:28:09.46#ibcon#about to read 6, iclass 16, count 2 2006.229.12:28:09.46#ibcon#read 6, iclass 16, count 2 2006.229.12:28:09.46#ibcon#end of sib2, iclass 16, count 2 2006.229.12:28:09.46#ibcon#*after write, iclass 16, count 2 2006.229.12:28:09.46#ibcon#*before return 0, iclass 16, count 2 2006.229.12:28:09.46#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:09.46#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:28:09.46#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.12:28:09.46#ibcon#ireg 7 cls_cnt 0 2006.229.12:28:09.46#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:09.50#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:28:09.58#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:09.58#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:09.58#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:28:09.58#ibcon#first serial, iclass 16, count 0 2006.229.12:28:09.58#ibcon#enter sib2, iclass 16, count 0 2006.229.12:28:09.58#ibcon#flushed, iclass 16, count 0 2006.229.12:28:09.58#ibcon#about to write, iclass 16, count 0 2006.229.12:28:09.58#ibcon#wrote, iclass 16, count 0 2006.229.12:28:09.58#ibcon#about to read 3, iclass 16, count 0 2006.229.12:28:09.60#ibcon#read 3, iclass 16, count 0 2006.229.12:28:09.60#ibcon#about to read 4, iclass 16, count 0 2006.229.12:28:09.60#ibcon#read 4, iclass 16, count 0 2006.229.12:28:09.60#ibcon#about to read 5, iclass 16, count 0 2006.229.12:28:09.60#ibcon#read 5, iclass 16, count 0 2006.229.12:28:09.60#ibcon#about to read 6, iclass 16, count 0 2006.229.12:28:09.60#ibcon#read 6, iclass 16, count 0 2006.229.12:28:09.60#ibcon#end of sib2, iclass 16, count 0 2006.229.12:28:09.60#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:28:09.60#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:28:09.60#ibcon#[27=USB\r\n] 2006.229.12:28:09.60#ibcon#*before write, iclass 16, count 0 2006.229.12:28:09.60#ibcon#enter sib2, iclass 16, count 0 2006.229.12:28:09.60#ibcon#flushed, iclass 16, count 0 2006.229.12:28:09.60#ibcon#about to write, iclass 16, count 0 2006.229.12:28:09.60#ibcon#wrote, iclass 16, count 0 2006.229.12:28:09.60#ibcon#about to read 3, iclass 16, count 0 2006.229.12:28:09.63#ibcon#read 3, iclass 16, count 0 2006.229.12:28:09.63#ibcon#about to read 4, iclass 16, count 0 2006.229.12:28:09.63#ibcon#read 4, iclass 16, count 0 2006.229.12:28:09.63#ibcon#about to read 5, iclass 16, count 0 2006.229.12:28:09.63#ibcon#read 5, iclass 16, count 0 2006.229.12:28:09.63#ibcon#about to read 6, iclass 16, count 0 2006.229.12:28:09.63#ibcon#read 6, iclass 16, count 0 2006.229.12:28:09.63#ibcon#end of sib2, iclass 16, count 0 2006.229.12:28:09.63#ibcon#*after write, iclass 16, count 0 2006.229.12:28:09.63#ibcon#*before return 0, iclass 16, count 0 2006.229.12:28:09.63#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:09.63#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:28:09.63#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:28:09.63#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:28:09.63$vck44/vabw=wide 2006.229.12:28:09.63#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.12:28:09.63#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.12:28:09.63#ibcon#ireg 8 cls_cnt 0 2006.229.12:28:09.63#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:09.63#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:09.63#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:09.63#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:28:09.63#ibcon#first serial, iclass 22, count 0 2006.229.12:28:09.63#ibcon#enter sib2, iclass 22, count 0 2006.229.12:28:09.63#ibcon#flushed, iclass 22, count 0 2006.229.12:28:09.63#ibcon#about to write, iclass 22, count 0 2006.229.12:28:09.63#ibcon#wrote, iclass 22, count 0 2006.229.12:28:09.63#ibcon#about to read 3, iclass 22, count 0 2006.229.12:28:09.65#ibcon#read 3, iclass 22, count 0 2006.229.12:28:09.65#ibcon#about to read 4, iclass 22, count 0 2006.229.12:28:09.65#ibcon#read 4, iclass 22, count 0 2006.229.12:28:09.65#ibcon#about to read 5, iclass 22, count 0 2006.229.12:28:09.65#ibcon#read 5, iclass 22, count 0 2006.229.12:28:09.65#ibcon#about to read 6, iclass 22, count 0 2006.229.12:28:09.65#ibcon#read 6, iclass 22, count 0 2006.229.12:28:09.65#ibcon#end of sib2, iclass 22, count 0 2006.229.12:28:09.65#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:28:09.65#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:28:09.65#ibcon#[25=BW32\r\n] 2006.229.12:28:09.65#ibcon#*before write, iclass 22, count 0 2006.229.12:28:09.65#ibcon#enter sib2, iclass 22, count 0 2006.229.12:28:09.65#ibcon#flushed, iclass 22, count 0 2006.229.12:28:09.65#ibcon#about to write, iclass 22, count 0 2006.229.12:28:09.65#ibcon#wrote, iclass 22, count 0 2006.229.12:28:09.65#ibcon#about to read 3, iclass 22, count 0 2006.229.12:28:09.68#ibcon#read 3, iclass 22, count 0 2006.229.12:28:09.68#ibcon#about to read 4, iclass 22, count 0 2006.229.12:28:09.68#ibcon#read 4, iclass 22, count 0 2006.229.12:28:09.68#ibcon#about to read 5, iclass 22, count 0 2006.229.12:28:09.68#ibcon#read 5, iclass 22, count 0 2006.229.12:28:09.68#ibcon#about to read 6, iclass 22, count 0 2006.229.12:28:09.68#ibcon#read 6, iclass 22, count 0 2006.229.12:28:09.68#ibcon#end of sib2, iclass 22, count 0 2006.229.12:28:09.68#ibcon#*after write, iclass 22, count 0 2006.229.12:28:09.68#ibcon#*before return 0, iclass 22, count 0 2006.229.12:28:09.68#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:09.68#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:28:09.68#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:28:09.68#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:28:09.68$vck44/vbbw=wide 2006.229.12:28:09.68#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:28:09.68#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:28:09.68#ibcon#ireg 8 cls_cnt 0 2006.229.12:28:09.68#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:28:09.75#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:28:09.75#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:28:09.75#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:28:09.75#ibcon#first serial, iclass 24, count 0 2006.229.12:28:09.75#ibcon#enter sib2, iclass 24, count 0 2006.229.12:28:09.75#ibcon#flushed, iclass 24, count 0 2006.229.12:28:09.75#ibcon#about to write, iclass 24, count 0 2006.229.12:28:09.75#ibcon#wrote, iclass 24, count 0 2006.229.12:28:09.75#ibcon#about to read 3, iclass 24, count 0 2006.229.12:28:09.77#ibcon#read 3, iclass 24, count 0 2006.229.12:28:09.77#ibcon#about to read 4, iclass 24, count 0 2006.229.12:28:09.77#ibcon#read 4, iclass 24, count 0 2006.229.12:28:09.77#ibcon#about to read 5, iclass 24, count 0 2006.229.12:28:09.77#ibcon#read 5, iclass 24, count 0 2006.229.12:28:09.77#ibcon#about to read 6, iclass 24, count 0 2006.229.12:28:09.77#ibcon#read 6, iclass 24, count 0 2006.229.12:28:09.77#ibcon#end of sib2, iclass 24, count 0 2006.229.12:28:09.77#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:28:09.77#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:28:09.77#ibcon#[27=BW32\r\n] 2006.229.12:28:09.77#ibcon#*before write, iclass 24, count 0 2006.229.12:28:09.77#ibcon#enter sib2, iclass 24, count 0 2006.229.12:28:09.77#ibcon#flushed, iclass 24, count 0 2006.229.12:28:09.77#ibcon#about to write, iclass 24, count 0 2006.229.12:28:09.77#ibcon#wrote, iclass 24, count 0 2006.229.12:28:09.77#ibcon#about to read 3, iclass 24, count 0 2006.229.12:28:09.80#ibcon#read 3, iclass 24, count 0 2006.229.12:28:09.80#ibcon#about to read 4, iclass 24, count 0 2006.229.12:28:09.80#ibcon#read 4, iclass 24, count 0 2006.229.12:28:09.80#ibcon#about to read 5, iclass 24, count 0 2006.229.12:28:09.80#ibcon#read 5, iclass 24, count 0 2006.229.12:28:09.80#ibcon#about to read 6, iclass 24, count 0 2006.229.12:28:09.80#ibcon#read 6, iclass 24, count 0 2006.229.12:28:09.80#ibcon#end of sib2, iclass 24, count 0 2006.229.12:28:09.80#ibcon#*after write, iclass 24, count 0 2006.229.12:28:09.80#ibcon#*before return 0, iclass 24, count 0 2006.229.12:28:09.80#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:28:09.80#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:28:09.80#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:28:09.80#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:28:09.80$setupk4/ifdk4 2006.229.12:28:09.80$ifdk4/lo= 2006.229.12:28:09.80$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:28:09.80$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:28:09.80$ifdk4/patch= 2006.229.12:28:09.80$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:28:09.80$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:28:09.80$setupk4/!*+20s 2006.229.12:28:18.13#trakl#Source acquired 2006.229.12:28:19.59#abcon#<5=/04 1.9 3.4 27.701001002.3\r\n> 2006.229.12:28:19.61#abcon#{5=INTERFACE CLEAR} 2006.229.12:28:19.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:28:20.13#flagr#flagr/antenna,acquired 2006.229.12:28:24.32$setupk4/"tpicd 2006.229.12:28:24.32$setupk4/echo=off 2006.229.12:28:24.32$setupk4/xlog=off 2006.229.12:28:24.32:!2006.229.12:32:01 2006.229.12:32:01.00:preob 2006.229.12:32:01.14/onsource/TRACKING 2006.229.12:32:01.14:!2006.229.12:32:11 2006.229.12:32:11.00:"tape 2006.229.12:32:11.00:"st=record 2006.229.12:32:11.00:data_valid=on 2006.229.12:32:11.00:midob 2006.229.12:32:11.14/onsource/TRACKING 2006.229.12:32:11.14/wx/27.68,1002.3,100 2006.229.12:32:11.26/cable/+6.4075E-03 2006.229.12:32:12.35/va/01,08,usb,yes,29,31 2006.229.12:32:12.35/va/02,07,usb,yes,32,32 2006.229.12:32:12.35/va/03,06,usb,yes,39,42 2006.229.12:32:12.35/va/04,07,usb,yes,33,34 2006.229.12:32:12.35/va/05,04,usb,yes,29,29 2006.229.12:32:12.35/va/06,04,usb,yes,33,32 2006.229.12:32:12.35/va/07,05,usb,yes,29,29 2006.229.12:32:12.35/va/08,06,usb,yes,21,26 2006.229.12:32:12.58/valo/01,524.99,yes,locked 2006.229.12:32:12.58/valo/02,534.99,yes,locked 2006.229.12:32:12.58/valo/03,564.99,yes,locked 2006.229.12:32:12.58/valo/04,624.99,yes,locked 2006.229.12:32:12.58/valo/05,734.99,yes,locked 2006.229.12:32:12.58/valo/06,814.99,yes,locked 2006.229.12:32:12.58/valo/07,864.99,yes,locked 2006.229.12:32:12.58/valo/08,884.99,yes,locked 2006.229.12:32:13.67/vb/01,04,usb,yes,30,28 2006.229.12:32:13.67/vb/02,04,usb,yes,33,33 2006.229.12:32:13.67/vb/03,04,usb,yes,30,33 2006.229.12:32:13.67/vb/04,04,usb,yes,34,33 2006.229.12:32:13.67/vb/05,04,usb,yes,27,29 2006.229.12:32:13.67/vb/06,04,usb,yes,31,27 2006.229.12:32:13.67/vb/07,04,usb,yes,31,31 2006.229.12:32:13.67/vb/08,04,usb,yes,28,32 2006.229.12:32:13.91/vblo/01,629.99,yes,locked 2006.229.12:32:13.91/vblo/02,634.99,yes,locked 2006.229.12:32:13.91/vblo/03,649.99,yes,locked 2006.229.12:32:13.91/vblo/04,679.99,yes,locked 2006.229.12:32:13.91/vblo/05,709.99,yes,locked 2006.229.12:32:13.91/vblo/06,719.99,yes,locked 2006.229.12:32:13.91/vblo/07,734.99,yes,locked 2006.229.12:32:13.91/vblo/08,744.99,yes,locked 2006.229.12:32:14.06/vabw/8 2006.229.12:32:14.21/vbbw/8 2006.229.12:32:14.30/xfe/off,on,12.2 2006.229.12:32:14.67/ifatt/23,28,28,28 2006.229.12:32:15.08/fmout-gps/S +4.61E-07 2006.229.12:32:15.12:!2006.229.12:35:01 2006.229.12:35:01.00:data_valid=off 2006.229.12:35:01.00:"et 2006.229.12:35:01.00:!+3s 2006.229.12:35:04.01:"tape 2006.229.12:35:04.01:postob 2006.229.12:35:04.21/cable/+6.4068E-03 2006.229.12:35:04.21/wx/27.66,1002.3,100 2006.229.12:35:05.08/fmout-gps/S +4.61E-07 2006.229.12:35:05.08:scan_name=229-1243,jd0608,270 2006.229.12:35:05.08:source=0014+813,001708.47,813508.1,2000.0,cw 2006.229.12:35:06.14#flagr#flagr/antenna,new-source 2006.229.12:35:06.14:checkk5 2006.229.12:35:06.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:35:06.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:35:07.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:35:07.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:35:08.12/chk_obsdata//k5ts1/T2291232??a.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.12:35:08.52/chk_obsdata//k5ts2/T2291232??b.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.12:35:08.92/chk_obsdata//k5ts3/T2291232??c.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.12:35:09.33/chk_obsdata//k5ts4/T2291232??d.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.12:35:10.06/k5log//k5ts1_log_newline 2006.229.12:35:10.78/k5log//k5ts2_log_newline 2006.229.12:35:11.49/k5log//k5ts3_log_newline 2006.229.12:35:12.21/k5log//k5ts4_log_newline 2006.229.12:35:12.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:35:12.23:setupk4=1 2006.229.12:35:12.23$setupk4/echo=on 2006.229.12:35:12.23$setupk4/pcalon 2006.229.12:35:12.23$pcalon/"no phase cal control is implemented here 2006.229.12:35:12.23$setupk4/"tpicd=stop 2006.229.12:35:12.23$setupk4/"rec=synch_on 2006.229.12:35:12.23$setupk4/"rec_mode=128 2006.229.12:35:12.23$setupk4/!* 2006.229.12:35:12.23$setupk4/recpk4 2006.229.12:35:12.23$recpk4/recpatch= 2006.229.12:35:12.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:35:12.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:35:12.23$setupk4/vck44 2006.229.12:35:12.23$vck44/valo=1,524.99 2006.229.12:35:12.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.12:35:12.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.12:35:12.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:12.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:12.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:12.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:12.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:35:12.23#ibcon#first serial, iclass 13, count 0 2006.229.12:35:12.23#ibcon#enter sib2, iclass 13, count 0 2006.229.12:35:12.23#ibcon#flushed, iclass 13, count 0 2006.229.12:35:12.23#ibcon#about to write, iclass 13, count 0 2006.229.12:35:12.23#ibcon#wrote, iclass 13, count 0 2006.229.12:35:12.23#ibcon#about to read 3, iclass 13, count 0 2006.229.12:35:12.25#ibcon#read 3, iclass 13, count 0 2006.229.12:35:12.25#ibcon#about to read 4, iclass 13, count 0 2006.229.12:35:12.25#ibcon#read 4, iclass 13, count 0 2006.229.12:35:12.25#ibcon#about to read 5, iclass 13, count 0 2006.229.12:35:12.25#ibcon#read 5, iclass 13, count 0 2006.229.12:35:12.25#ibcon#about to read 6, iclass 13, count 0 2006.229.12:35:12.25#ibcon#read 6, iclass 13, count 0 2006.229.12:35:12.25#ibcon#end of sib2, iclass 13, count 0 2006.229.12:35:12.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:35:12.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:35:12.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:35:12.25#ibcon#*before write, iclass 13, count 0 2006.229.12:35:12.25#ibcon#enter sib2, iclass 13, count 0 2006.229.12:35:12.25#ibcon#flushed, iclass 13, count 0 2006.229.12:35:12.25#ibcon#about to write, iclass 13, count 0 2006.229.12:35:12.25#ibcon#wrote, iclass 13, count 0 2006.229.12:35:12.25#ibcon#about to read 3, iclass 13, count 0 2006.229.12:35:12.30#ibcon#read 3, iclass 13, count 0 2006.229.12:35:12.30#ibcon#about to read 4, iclass 13, count 0 2006.229.12:35:12.30#ibcon#read 4, iclass 13, count 0 2006.229.12:35:12.30#ibcon#about to read 5, iclass 13, count 0 2006.229.12:35:12.30#ibcon#read 5, iclass 13, count 0 2006.229.12:35:12.30#ibcon#about to read 6, iclass 13, count 0 2006.229.12:35:12.30#ibcon#read 6, iclass 13, count 0 2006.229.12:35:12.30#ibcon#end of sib2, iclass 13, count 0 2006.229.12:35:12.30#ibcon#*after write, iclass 13, count 0 2006.229.12:35:12.30#ibcon#*before return 0, iclass 13, count 0 2006.229.12:35:12.30#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:12.30#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:12.30#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:35:12.30#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:35:12.30$vck44/va=1,8 2006.229.12:35:12.30#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.12:35:12.30#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.12:35:12.30#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:12.30#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:12.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:12.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:12.30#ibcon#enter wrdev, iclass 15, count 2 2006.229.12:35:12.30#ibcon#first serial, iclass 15, count 2 2006.229.12:35:12.30#ibcon#enter sib2, iclass 15, count 2 2006.229.12:35:12.30#ibcon#flushed, iclass 15, count 2 2006.229.12:35:12.30#ibcon#about to write, iclass 15, count 2 2006.229.12:35:12.30#ibcon#wrote, iclass 15, count 2 2006.229.12:35:12.30#ibcon#about to read 3, iclass 15, count 2 2006.229.12:35:12.32#ibcon#read 3, iclass 15, count 2 2006.229.12:35:12.32#ibcon#about to read 4, iclass 15, count 2 2006.229.12:35:12.32#ibcon#read 4, iclass 15, count 2 2006.229.12:35:12.32#ibcon#about to read 5, iclass 15, count 2 2006.229.12:35:12.32#ibcon#read 5, iclass 15, count 2 2006.229.12:35:12.32#ibcon#about to read 6, iclass 15, count 2 2006.229.12:35:12.32#ibcon#read 6, iclass 15, count 2 2006.229.12:35:12.32#ibcon#end of sib2, iclass 15, count 2 2006.229.12:35:12.32#ibcon#*mode == 0, iclass 15, count 2 2006.229.12:35:12.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.12:35:12.32#ibcon#[25=AT01-08\r\n] 2006.229.12:35:12.32#ibcon#*before write, iclass 15, count 2 2006.229.12:35:12.32#ibcon#enter sib2, iclass 15, count 2 2006.229.12:35:12.32#ibcon#flushed, iclass 15, count 2 2006.229.12:35:12.32#ibcon#about to write, iclass 15, count 2 2006.229.12:35:12.32#ibcon#wrote, iclass 15, count 2 2006.229.12:35:12.32#ibcon#about to read 3, iclass 15, count 2 2006.229.12:35:12.35#ibcon#read 3, iclass 15, count 2 2006.229.12:35:12.35#ibcon#about to read 4, iclass 15, count 2 2006.229.12:35:12.35#ibcon#read 4, iclass 15, count 2 2006.229.12:35:12.35#ibcon#about to read 5, iclass 15, count 2 2006.229.12:35:12.35#ibcon#read 5, iclass 15, count 2 2006.229.12:35:12.35#ibcon#about to read 6, iclass 15, count 2 2006.229.12:35:12.35#ibcon#read 6, iclass 15, count 2 2006.229.12:35:12.35#ibcon#end of sib2, iclass 15, count 2 2006.229.12:35:12.35#ibcon#*after write, iclass 15, count 2 2006.229.12:35:12.35#ibcon#*before return 0, iclass 15, count 2 2006.229.12:35:12.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:12.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:12.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.12:35:12.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:12.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:12.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:12.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:12.47#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:35:12.47#ibcon#first serial, iclass 15, count 0 2006.229.12:35:12.47#ibcon#enter sib2, iclass 15, count 0 2006.229.12:35:12.47#ibcon#flushed, iclass 15, count 0 2006.229.12:35:12.47#ibcon#about to write, iclass 15, count 0 2006.229.12:35:12.47#ibcon#wrote, iclass 15, count 0 2006.229.12:35:12.47#ibcon#about to read 3, iclass 15, count 0 2006.229.12:35:12.49#ibcon#read 3, iclass 15, count 0 2006.229.12:35:12.49#ibcon#about to read 4, iclass 15, count 0 2006.229.12:35:12.49#ibcon#read 4, iclass 15, count 0 2006.229.12:35:12.49#ibcon#about to read 5, iclass 15, count 0 2006.229.12:35:12.49#ibcon#read 5, iclass 15, count 0 2006.229.12:35:12.49#ibcon#about to read 6, iclass 15, count 0 2006.229.12:35:12.49#ibcon#read 6, iclass 15, count 0 2006.229.12:35:12.49#ibcon#end of sib2, iclass 15, count 0 2006.229.12:35:12.49#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:35:12.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:35:12.49#ibcon#[25=USB\r\n] 2006.229.12:35:12.49#ibcon#*before write, iclass 15, count 0 2006.229.12:35:12.49#ibcon#enter sib2, iclass 15, count 0 2006.229.12:35:12.49#ibcon#flushed, iclass 15, count 0 2006.229.12:35:12.49#ibcon#about to write, iclass 15, count 0 2006.229.12:35:12.49#ibcon#wrote, iclass 15, count 0 2006.229.12:35:12.49#ibcon#about to read 3, iclass 15, count 0 2006.229.12:35:12.52#ibcon#read 3, iclass 15, count 0 2006.229.12:35:12.52#ibcon#about to read 4, iclass 15, count 0 2006.229.12:35:12.52#ibcon#read 4, iclass 15, count 0 2006.229.12:35:12.52#ibcon#about to read 5, iclass 15, count 0 2006.229.12:35:12.52#ibcon#read 5, iclass 15, count 0 2006.229.12:35:12.52#ibcon#about to read 6, iclass 15, count 0 2006.229.12:35:12.52#ibcon#read 6, iclass 15, count 0 2006.229.12:35:12.52#ibcon#end of sib2, iclass 15, count 0 2006.229.12:35:12.52#ibcon#*after write, iclass 15, count 0 2006.229.12:35:12.52#ibcon#*before return 0, iclass 15, count 0 2006.229.12:35:12.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:12.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:12.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:35:12.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:35:12.52$vck44/valo=2,534.99 2006.229.12:35:12.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.12:35:12.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.12:35:12.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:12.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:12.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:12.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:12.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:35:12.52#ibcon#first serial, iclass 17, count 0 2006.229.12:35:12.52#ibcon#enter sib2, iclass 17, count 0 2006.229.12:35:12.52#ibcon#flushed, iclass 17, count 0 2006.229.12:35:12.52#ibcon#about to write, iclass 17, count 0 2006.229.12:35:12.52#ibcon#wrote, iclass 17, count 0 2006.229.12:35:12.52#ibcon#about to read 3, iclass 17, count 0 2006.229.12:35:12.54#ibcon#read 3, iclass 17, count 0 2006.229.12:35:12.54#ibcon#about to read 4, iclass 17, count 0 2006.229.12:35:12.54#ibcon#read 4, iclass 17, count 0 2006.229.12:35:12.54#ibcon#about to read 5, iclass 17, count 0 2006.229.12:35:12.54#ibcon#read 5, iclass 17, count 0 2006.229.12:35:12.54#ibcon#about to read 6, iclass 17, count 0 2006.229.12:35:12.54#ibcon#read 6, iclass 17, count 0 2006.229.12:35:12.54#ibcon#end of sib2, iclass 17, count 0 2006.229.12:35:12.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:35:12.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:35:12.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:35:12.54#ibcon#*before write, iclass 17, count 0 2006.229.12:35:12.54#ibcon#enter sib2, iclass 17, count 0 2006.229.12:35:12.54#ibcon#flushed, iclass 17, count 0 2006.229.12:35:12.54#ibcon#about to write, iclass 17, count 0 2006.229.12:35:12.54#ibcon#wrote, iclass 17, count 0 2006.229.12:35:12.54#ibcon#about to read 3, iclass 17, count 0 2006.229.12:35:12.58#ibcon#read 3, iclass 17, count 0 2006.229.12:35:12.58#ibcon#about to read 4, iclass 17, count 0 2006.229.12:35:12.58#ibcon#read 4, iclass 17, count 0 2006.229.12:35:12.58#ibcon#about to read 5, iclass 17, count 0 2006.229.12:35:12.58#ibcon#read 5, iclass 17, count 0 2006.229.12:35:12.58#ibcon#about to read 6, iclass 17, count 0 2006.229.12:35:12.58#ibcon#read 6, iclass 17, count 0 2006.229.12:35:12.58#ibcon#end of sib2, iclass 17, count 0 2006.229.12:35:12.58#ibcon#*after write, iclass 17, count 0 2006.229.12:35:12.58#ibcon#*before return 0, iclass 17, count 0 2006.229.12:35:12.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:12.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:12.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:35:12.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:35:12.58$vck44/va=2,7 2006.229.12:35:12.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.12:35:12.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.12:35:12.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:12.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:12.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:12.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:12.64#ibcon#enter wrdev, iclass 19, count 2 2006.229.12:35:12.64#ibcon#first serial, iclass 19, count 2 2006.229.12:35:12.64#ibcon#enter sib2, iclass 19, count 2 2006.229.12:35:12.64#ibcon#flushed, iclass 19, count 2 2006.229.12:35:12.64#ibcon#about to write, iclass 19, count 2 2006.229.12:35:12.64#ibcon#wrote, iclass 19, count 2 2006.229.12:35:12.64#ibcon#about to read 3, iclass 19, count 2 2006.229.12:35:12.66#ibcon#read 3, iclass 19, count 2 2006.229.12:35:12.66#ibcon#about to read 4, iclass 19, count 2 2006.229.12:35:12.66#ibcon#read 4, iclass 19, count 2 2006.229.12:35:12.66#ibcon#about to read 5, iclass 19, count 2 2006.229.12:35:12.66#ibcon#read 5, iclass 19, count 2 2006.229.12:35:12.66#ibcon#about to read 6, iclass 19, count 2 2006.229.12:35:12.66#ibcon#read 6, iclass 19, count 2 2006.229.12:35:12.66#ibcon#end of sib2, iclass 19, count 2 2006.229.12:35:12.66#ibcon#*mode == 0, iclass 19, count 2 2006.229.12:35:12.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.12:35:12.66#ibcon#[25=AT02-07\r\n] 2006.229.12:35:12.66#ibcon#*before write, iclass 19, count 2 2006.229.12:35:12.66#ibcon#enter sib2, iclass 19, count 2 2006.229.12:35:12.66#ibcon#flushed, iclass 19, count 2 2006.229.12:35:12.66#ibcon#about to write, iclass 19, count 2 2006.229.12:35:12.66#ibcon#wrote, iclass 19, count 2 2006.229.12:35:12.66#ibcon#about to read 3, iclass 19, count 2 2006.229.12:35:12.69#ibcon#read 3, iclass 19, count 2 2006.229.12:35:12.69#ibcon#about to read 4, iclass 19, count 2 2006.229.12:35:12.69#ibcon#read 4, iclass 19, count 2 2006.229.12:35:12.69#ibcon#about to read 5, iclass 19, count 2 2006.229.12:35:12.69#ibcon#read 5, iclass 19, count 2 2006.229.12:35:12.69#ibcon#about to read 6, iclass 19, count 2 2006.229.12:35:12.69#ibcon#read 6, iclass 19, count 2 2006.229.12:35:12.69#ibcon#end of sib2, iclass 19, count 2 2006.229.12:35:12.69#ibcon#*after write, iclass 19, count 2 2006.229.12:35:12.69#ibcon#*before return 0, iclass 19, count 2 2006.229.12:35:12.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:12.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:12.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.12:35:12.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:12.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:12.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:12.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:12.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:35:12.81#ibcon#first serial, iclass 19, count 0 2006.229.12:35:12.81#ibcon#enter sib2, iclass 19, count 0 2006.229.12:35:12.81#ibcon#flushed, iclass 19, count 0 2006.229.12:35:12.81#ibcon#about to write, iclass 19, count 0 2006.229.12:35:12.81#ibcon#wrote, iclass 19, count 0 2006.229.12:35:12.81#ibcon#about to read 3, iclass 19, count 0 2006.229.12:35:12.83#ibcon#read 3, iclass 19, count 0 2006.229.12:35:12.83#ibcon#about to read 4, iclass 19, count 0 2006.229.12:35:12.83#ibcon#read 4, iclass 19, count 0 2006.229.12:35:12.83#ibcon#about to read 5, iclass 19, count 0 2006.229.12:35:12.83#ibcon#read 5, iclass 19, count 0 2006.229.12:35:12.83#ibcon#about to read 6, iclass 19, count 0 2006.229.12:35:12.83#ibcon#read 6, iclass 19, count 0 2006.229.12:35:12.83#ibcon#end of sib2, iclass 19, count 0 2006.229.12:35:12.83#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:35:12.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:35:12.83#ibcon#[25=USB\r\n] 2006.229.12:35:12.83#ibcon#*before write, iclass 19, count 0 2006.229.12:35:12.83#ibcon#enter sib2, iclass 19, count 0 2006.229.12:35:12.83#ibcon#flushed, iclass 19, count 0 2006.229.12:35:12.83#ibcon#about to write, iclass 19, count 0 2006.229.12:35:12.83#ibcon#wrote, iclass 19, count 0 2006.229.12:35:12.83#ibcon#about to read 3, iclass 19, count 0 2006.229.12:35:12.86#ibcon#read 3, iclass 19, count 0 2006.229.12:35:12.86#ibcon#about to read 4, iclass 19, count 0 2006.229.12:35:12.86#ibcon#read 4, iclass 19, count 0 2006.229.12:35:12.86#ibcon#about to read 5, iclass 19, count 0 2006.229.12:35:12.86#ibcon#read 5, iclass 19, count 0 2006.229.12:35:12.86#ibcon#about to read 6, iclass 19, count 0 2006.229.12:35:12.86#ibcon#read 6, iclass 19, count 0 2006.229.12:35:12.86#ibcon#end of sib2, iclass 19, count 0 2006.229.12:35:12.86#ibcon#*after write, iclass 19, count 0 2006.229.12:35:12.86#ibcon#*before return 0, iclass 19, count 0 2006.229.12:35:12.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:12.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:12.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:35:12.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:35:12.86$vck44/valo=3,564.99 2006.229.12:35:12.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.12:35:12.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.12:35:12.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:12.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:12.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:12.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:12.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:35:12.86#ibcon#first serial, iclass 21, count 0 2006.229.12:35:12.86#ibcon#enter sib2, iclass 21, count 0 2006.229.12:35:12.86#ibcon#flushed, iclass 21, count 0 2006.229.12:35:12.86#ibcon#about to write, iclass 21, count 0 2006.229.12:35:12.86#ibcon#wrote, iclass 21, count 0 2006.229.12:35:12.86#ibcon#about to read 3, iclass 21, count 0 2006.229.12:35:12.88#ibcon#read 3, iclass 21, count 0 2006.229.12:35:12.88#ibcon#about to read 4, iclass 21, count 0 2006.229.12:35:12.88#ibcon#read 4, iclass 21, count 0 2006.229.12:35:12.88#ibcon#about to read 5, iclass 21, count 0 2006.229.12:35:12.88#ibcon#read 5, iclass 21, count 0 2006.229.12:35:12.88#ibcon#about to read 6, iclass 21, count 0 2006.229.12:35:12.88#ibcon#read 6, iclass 21, count 0 2006.229.12:35:12.88#ibcon#end of sib2, iclass 21, count 0 2006.229.12:35:12.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:35:12.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:35:12.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:35:12.88#ibcon#*before write, iclass 21, count 0 2006.229.12:35:12.88#ibcon#enter sib2, iclass 21, count 0 2006.229.12:35:12.88#ibcon#flushed, iclass 21, count 0 2006.229.12:35:12.88#ibcon#about to write, iclass 21, count 0 2006.229.12:35:12.88#ibcon#wrote, iclass 21, count 0 2006.229.12:35:12.88#ibcon#about to read 3, iclass 21, count 0 2006.229.12:35:12.92#ibcon#read 3, iclass 21, count 0 2006.229.12:35:12.92#ibcon#about to read 4, iclass 21, count 0 2006.229.12:35:12.92#ibcon#read 4, iclass 21, count 0 2006.229.12:35:12.92#ibcon#about to read 5, iclass 21, count 0 2006.229.12:35:12.92#ibcon#read 5, iclass 21, count 0 2006.229.12:35:12.92#ibcon#about to read 6, iclass 21, count 0 2006.229.12:35:12.92#ibcon#read 6, iclass 21, count 0 2006.229.12:35:12.92#ibcon#end of sib2, iclass 21, count 0 2006.229.12:35:12.92#ibcon#*after write, iclass 21, count 0 2006.229.12:35:12.92#ibcon#*before return 0, iclass 21, count 0 2006.229.12:35:12.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:12.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:12.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:35:12.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:35:12.92$vck44/va=3,6 2006.229.12:35:12.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.12:35:12.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.12:35:12.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:12.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:12.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:12.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:12.98#ibcon#enter wrdev, iclass 23, count 2 2006.229.12:35:12.98#ibcon#first serial, iclass 23, count 2 2006.229.12:35:12.98#ibcon#enter sib2, iclass 23, count 2 2006.229.12:35:12.98#ibcon#flushed, iclass 23, count 2 2006.229.12:35:12.98#ibcon#about to write, iclass 23, count 2 2006.229.12:35:12.98#ibcon#wrote, iclass 23, count 2 2006.229.12:35:12.98#ibcon#about to read 3, iclass 23, count 2 2006.229.12:35:13.00#ibcon#read 3, iclass 23, count 2 2006.229.12:35:13.00#ibcon#about to read 4, iclass 23, count 2 2006.229.12:35:13.00#ibcon#read 4, iclass 23, count 2 2006.229.12:35:13.00#ibcon#about to read 5, iclass 23, count 2 2006.229.12:35:13.00#ibcon#read 5, iclass 23, count 2 2006.229.12:35:13.00#ibcon#about to read 6, iclass 23, count 2 2006.229.12:35:13.00#ibcon#read 6, iclass 23, count 2 2006.229.12:35:13.00#ibcon#end of sib2, iclass 23, count 2 2006.229.12:35:13.00#ibcon#*mode == 0, iclass 23, count 2 2006.229.12:35:13.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.12:35:13.00#ibcon#[25=AT03-06\r\n] 2006.229.12:35:13.00#ibcon#*before write, iclass 23, count 2 2006.229.12:35:13.00#ibcon#enter sib2, iclass 23, count 2 2006.229.12:35:13.00#ibcon#flushed, iclass 23, count 2 2006.229.12:35:13.00#ibcon#about to write, iclass 23, count 2 2006.229.12:35:13.00#ibcon#wrote, iclass 23, count 2 2006.229.12:35:13.00#ibcon#about to read 3, iclass 23, count 2 2006.229.12:35:13.03#ibcon#read 3, iclass 23, count 2 2006.229.12:35:13.03#ibcon#about to read 4, iclass 23, count 2 2006.229.12:35:13.03#ibcon#read 4, iclass 23, count 2 2006.229.12:35:13.03#ibcon#about to read 5, iclass 23, count 2 2006.229.12:35:13.03#ibcon#read 5, iclass 23, count 2 2006.229.12:35:13.03#ibcon#about to read 6, iclass 23, count 2 2006.229.12:35:13.03#ibcon#read 6, iclass 23, count 2 2006.229.12:35:13.03#ibcon#end of sib2, iclass 23, count 2 2006.229.12:35:13.03#ibcon#*after write, iclass 23, count 2 2006.229.12:35:13.03#ibcon#*before return 0, iclass 23, count 2 2006.229.12:35:13.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:13.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:13.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.12:35:13.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:13.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:13.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:13.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:13.15#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:35:13.15#ibcon#first serial, iclass 23, count 0 2006.229.12:35:13.15#ibcon#enter sib2, iclass 23, count 0 2006.229.12:35:13.15#ibcon#flushed, iclass 23, count 0 2006.229.12:35:13.15#ibcon#about to write, iclass 23, count 0 2006.229.12:35:13.15#ibcon#wrote, iclass 23, count 0 2006.229.12:35:13.15#ibcon#about to read 3, iclass 23, count 0 2006.229.12:35:13.17#ibcon#read 3, iclass 23, count 0 2006.229.12:35:13.17#ibcon#about to read 4, iclass 23, count 0 2006.229.12:35:13.17#ibcon#read 4, iclass 23, count 0 2006.229.12:35:13.17#ibcon#about to read 5, iclass 23, count 0 2006.229.12:35:13.17#ibcon#read 5, iclass 23, count 0 2006.229.12:35:13.17#ibcon#about to read 6, iclass 23, count 0 2006.229.12:35:13.17#ibcon#read 6, iclass 23, count 0 2006.229.12:35:13.17#ibcon#end of sib2, iclass 23, count 0 2006.229.12:35:13.17#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:35:13.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:35:13.17#ibcon#[25=USB\r\n] 2006.229.12:35:13.17#ibcon#*before write, iclass 23, count 0 2006.229.12:35:13.17#ibcon#enter sib2, iclass 23, count 0 2006.229.12:35:13.17#ibcon#flushed, iclass 23, count 0 2006.229.12:35:13.17#ibcon#about to write, iclass 23, count 0 2006.229.12:35:13.17#ibcon#wrote, iclass 23, count 0 2006.229.12:35:13.17#ibcon#about to read 3, iclass 23, count 0 2006.229.12:35:13.20#ibcon#read 3, iclass 23, count 0 2006.229.12:35:13.20#ibcon#about to read 4, iclass 23, count 0 2006.229.12:35:13.20#ibcon#read 4, iclass 23, count 0 2006.229.12:35:13.20#ibcon#about to read 5, iclass 23, count 0 2006.229.12:35:13.20#ibcon#read 5, iclass 23, count 0 2006.229.12:35:13.20#ibcon#about to read 6, iclass 23, count 0 2006.229.12:35:13.20#ibcon#read 6, iclass 23, count 0 2006.229.12:35:13.20#ibcon#end of sib2, iclass 23, count 0 2006.229.12:35:13.20#ibcon#*after write, iclass 23, count 0 2006.229.12:35:13.20#ibcon#*before return 0, iclass 23, count 0 2006.229.12:35:13.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:13.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:13.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:35:13.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:35:13.20$vck44/valo=4,624.99 2006.229.12:35:13.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.12:35:13.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.12:35:13.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:13.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:13.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:13.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:13.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:35:13.20#ibcon#first serial, iclass 25, count 0 2006.229.12:35:13.20#ibcon#enter sib2, iclass 25, count 0 2006.229.12:35:13.20#ibcon#flushed, iclass 25, count 0 2006.229.12:35:13.20#ibcon#about to write, iclass 25, count 0 2006.229.12:35:13.20#ibcon#wrote, iclass 25, count 0 2006.229.12:35:13.20#ibcon#about to read 3, iclass 25, count 0 2006.229.12:35:13.22#ibcon#read 3, iclass 25, count 0 2006.229.12:35:13.22#ibcon#about to read 4, iclass 25, count 0 2006.229.12:35:13.22#ibcon#read 4, iclass 25, count 0 2006.229.12:35:13.22#ibcon#about to read 5, iclass 25, count 0 2006.229.12:35:13.22#ibcon#read 5, iclass 25, count 0 2006.229.12:35:13.22#ibcon#about to read 6, iclass 25, count 0 2006.229.12:35:13.22#ibcon#read 6, iclass 25, count 0 2006.229.12:35:13.22#ibcon#end of sib2, iclass 25, count 0 2006.229.12:35:13.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:35:13.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:35:13.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:35:13.22#ibcon#*before write, iclass 25, count 0 2006.229.12:35:13.22#ibcon#enter sib2, iclass 25, count 0 2006.229.12:35:13.22#ibcon#flushed, iclass 25, count 0 2006.229.12:35:13.22#ibcon#about to write, iclass 25, count 0 2006.229.12:35:13.22#ibcon#wrote, iclass 25, count 0 2006.229.12:35:13.22#ibcon#about to read 3, iclass 25, count 0 2006.229.12:35:13.26#ibcon#read 3, iclass 25, count 0 2006.229.12:35:13.26#ibcon#about to read 4, iclass 25, count 0 2006.229.12:35:13.26#ibcon#read 4, iclass 25, count 0 2006.229.12:35:13.26#ibcon#about to read 5, iclass 25, count 0 2006.229.12:35:13.26#ibcon#read 5, iclass 25, count 0 2006.229.12:35:13.26#ibcon#about to read 6, iclass 25, count 0 2006.229.12:35:13.26#ibcon#read 6, iclass 25, count 0 2006.229.12:35:13.26#ibcon#end of sib2, iclass 25, count 0 2006.229.12:35:13.26#ibcon#*after write, iclass 25, count 0 2006.229.12:35:13.26#ibcon#*before return 0, iclass 25, count 0 2006.229.12:35:13.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:13.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:13.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:35:13.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:35:13.26$vck44/va=4,7 2006.229.12:35:13.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.12:35:13.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.12:35:13.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:13.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:13.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:13.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:13.32#ibcon#enter wrdev, iclass 27, count 2 2006.229.12:35:13.32#ibcon#first serial, iclass 27, count 2 2006.229.12:35:13.32#ibcon#enter sib2, iclass 27, count 2 2006.229.12:35:13.32#ibcon#flushed, iclass 27, count 2 2006.229.12:35:13.32#ibcon#about to write, iclass 27, count 2 2006.229.12:35:13.32#ibcon#wrote, iclass 27, count 2 2006.229.12:35:13.32#ibcon#about to read 3, iclass 27, count 2 2006.229.12:35:13.34#ibcon#read 3, iclass 27, count 2 2006.229.12:35:13.34#ibcon#about to read 4, iclass 27, count 2 2006.229.12:35:13.34#ibcon#read 4, iclass 27, count 2 2006.229.12:35:13.34#ibcon#about to read 5, iclass 27, count 2 2006.229.12:35:13.34#ibcon#read 5, iclass 27, count 2 2006.229.12:35:13.34#ibcon#about to read 6, iclass 27, count 2 2006.229.12:35:13.34#ibcon#read 6, iclass 27, count 2 2006.229.12:35:13.34#ibcon#end of sib2, iclass 27, count 2 2006.229.12:35:13.34#ibcon#*mode == 0, iclass 27, count 2 2006.229.12:35:13.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.12:35:13.34#ibcon#[25=AT04-07\r\n] 2006.229.12:35:13.34#ibcon#*before write, iclass 27, count 2 2006.229.12:35:13.34#ibcon#enter sib2, iclass 27, count 2 2006.229.12:35:13.34#ibcon#flushed, iclass 27, count 2 2006.229.12:35:13.34#ibcon#about to write, iclass 27, count 2 2006.229.12:35:13.34#ibcon#wrote, iclass 27, count 2 2006.229.12:35:13.34#ibcon#about to read 3, iclass 27, count 2 2006.229.12:35:13.37#ibcon#read 3, iclass 27, count 2 2006.229.12:35:13.37#ibcon#about to read 4, iclass 27, count 2 2006.229.12:35:13.37#ibcon#read 4, iclass 27, count 2 2006.229.12:35:13.37#ibcon#about to read 5, iclass 27, count 2 2006.229.12:35:13.37#ibcon#read 5, iclass 27, count 2 2006.229.12:35:13.37#ibcon#about to read 6, iclass 27, count 2 2006.229.12:35:13.37#ibcon#read 6, iclass 27, count 2 2006.229.12:35:13.37#ibcon#end of sib2, iclass 27, count 2 2006.229.12:35:13.37#ibcon#*after write, iclass 27, count 2 2006.229.12:35:13.38#ibcon#*before return 0, iclass 27, count 2 2006.229.12:35:13.38#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:13.38#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:13.38#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.12:35:13.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:13.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:13.49#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:13.49#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:13.49#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:35:13.49#ibcon#first serial, iclass 27, count 0 2006.229.12:35:13.49#ibcon#enter sib2, iclass 27, count 0 2006.229.12:35:13.49#ibcon#flushed, iclass 27, count 0 2006.229.12:35:13.49#ibcon#about to write, iclass 27, count 0 2006.229.12:35:13.49#ibcon#wrote, iclass 27, count 0 2006.229.12:35:13.49#ibcon#about to read 3, iclass 27, count 0 2006.229.12:35:13.51#ibcon#read 3, iclass 27, count 0 2006.229.12:35:13.51#ibcon#about to read 4, iclass 27, count 0 2006.229.12:35:13.51#ibcon#read 4, iclass 27, count 0 2006.229.12:35:13.51#ibcon#about to read 5, iclass 27, count 0 2006.229.12:35:13.51#ibcon#read 5, iclass 27, count 0 2006.229.12:35:13.51#ibcon#about to read 6, iclass 27, count 0 2006.229.12:35:13.51#ibcon#read 6, iclass 27, count 0 2006.229.12:35:13.51#ibcon#end of sib2, iclass 27, count 0 2006.229.12:35:13.51#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:35:13.51#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:35:13.51#ibcon#[25=USB\r\n] 2006.229.12:35:13.51#ibcon#*before write, iclass 27, count 0 2006.229.12:35:13.51#ibcon#enter sib2, iclass 27, count 0 2006.229.12:35:13.51#ibcon#flushed, iclass 27, count 0 2006.229.12:35:13.51#ibcon#about to write, iclass 27, count 0 2006.229.12:35:13.51#ibcon#wrote, iclass 27, count 0 2006.229.12:35:13.51#ibcon#about to read 3, iclass 27, count 0 2006.229.12:35:13.54#ibcon#read 3, iclass 27, count 0 2006.229.12:35:13.54#ibcon#about to read 4, iclass 27, count 0 2006.229.12:35:13.54#ibcon#read 4, iclass 27, count 0 2006.229.12:35:13.54#ibcon#about to read 5, iclass 27, count 0 2006.229.12:35:13.54#ibcon#read 5, iclass 27, count 0 2006.229.12:35:13.54#ibcon#about to read 6, iclass 27, count 0 2006.229.12:35:13.54#ibcon#read 6, iclass 27, count 0 2006.229.12:35:13.54#ibcon#end of sib2, iclass 27, count 0 2006.229.12:35:13.54#ibcon#*after write, iclass 27, count 0 2006.229.12:35:13.54#ibcon#*before return 0, iclass 27, count 0 2006.229.12:35:13.54#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:13.54#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:13.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:35:13.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:35:13.54$vck44/valo=5,734.99 2006.229.12:35:13.54#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.12:35:13.54#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.12:35:13.54#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:13.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:13.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:13.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:13.54#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:35:13.54#ibcon#first serial, iclass 29, count 0 2006.229.12:35:13.54#ibcon#enter sib2, iclass 29, count 0 2006.229.12:35:13.54#ibcon#flushed, iclass 29, count 0 2006.229.12:35:13.54#ibcon#about to write, iclass 29, count 0 2006.229.12:35:13.54#ibcon#wrote, iclass 29, count 0 2006.229.12:35:13.54#ibcon#about to read 3, iclass 29, count 0 2006.229.12:35:13.56#ibcon#read 3, iclass 29, count 0 2006.229.12:35:13.56#ibcon#about to read 4, iclass 29, count 0 2006.229.12:35:13.56#ibcon#read 4, iclass 29, count 0 2006.229.12:35:13.56#ibcon#about to read 5, iclass 29, count 0 2006.229.12:35:13.56#ibcon#read 5, iclass 29, count 0 2006.229.12:35:13.56#ibcon#about to read 6, iclass 29, count 0 2006.229.12:35:13.56#ibcon#read 6, iclass 29, count 0 2006.229.12:35:13.56#ibcon#end of sib2, iclass 29, count 0 2006.229.12:35:13.56#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:35:13.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:35:13.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:35:13.56#ibcon#*before write, iclass 29, count 0 2006.229.12:35:13.56#ibcon#enter sib2, iclass 29, count 0 2006.229.12:35:13.56#ibcon#flushed, iclass 29, count 0 2006.229.12:35:13.56#ibcon#about to write, iclass 29, count 0 2006.229.12:35:13.56#ibcon#wrote, iclass 29, count 0 2006.229.12:35:13.56#ibcon#about to read 3, iclass 29, count 0 2006.229.12:35:13.60#ibcon#read 3, iclass 29, count 0 2006.229.12:35:13.60#ibcon#about to read 4, iclass 29, count 0 2006.229.12:35:13.60#ibcon#read 4, iclass 29, count 0 2006.229.12:35:13.60#ibcon#about to read 5, iclass 29, count 0 2006.229.12:35:13.60#ibcon#read 5, iclass 29, count 0 2006.229.12:35:13.60#ibcon#about to read 6, iclass 29, count 0 2006.229.12:35:13.60#ibcon#read 6, iclass 29, count 0 2006.229.12:35:13.60#ibcon#end of sib2, iclass 29, count 0 2006.229.12:35:13.60#ibcon#*after write, iclass 29, count 0 2006.229.12:35:13.60#ibcon#*before return 0, iclass 29, count 0 2006.229.12:35:13.60#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:13.60#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:13.60#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:35:13.60#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:35:13.60$vck44/va=5,4 2006.229.12:35:13.60#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.12:35:13.60#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.12:35:13.60#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:13.60#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:13.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:13.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:13.66#ibcon#enter wrdev, iclass 31, count 2 2006.229.12:35:13.66#ibcon#first serial, iclass 31, count 2 2006.229.12:35:13.66#ibcon#enter sib2, iclass 31, count 2 2006.229.12:35:13.66#ibcon#flushed, iclass 31, count 2 2006.229.12:35:13.66#ibcon#about to write, iclass 31, count 2 2006.229.12:35:13.66#ibcon#wrote, iclass 31, count 2 2006.229.12:35:13.66#ibcon#about to read 3, iclass 31, count 2 2006.229.12:35:13.68#ibcon#read 3, iclass 31, count 2 2006.229.12:35:13.68#ibcon#about to read 4, iclass 31, count 2 2006.229.12:35:13.68#ibcon#read 4, iclass 31, count 2 2006.229.12:35:13.68#ibcon#about to read 5, iclass 31, count 2 2006.229.12:35:13.68#ibcon#read 5, iclass 31, count 2 2006.229.12:35:13.68#ibcon#about to read 6, iclass 31, count 2 2006.229.12:35:13.68#ibcon#read 6, iclass 31, count 2 2006.229.12:35:13.68#ibcon#end of sib2, iclass 31, count 2 2006.229.12:35:13.68#ibcon#*mode == 0, iclass 31, count 2 2006.229.12:35:13.68#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.12:35:13.68#ibcon#[25=AT05-04\r\n] 2006.229.12:35:13.68#ibcon#*before write, iclass 31, count 2 2006.229.12:35:13.68#ibcon#enter sib2, iclass 31, count 2 2006.229.12:35:13.68#ibcon#flushed, iclass 31, count 2 2006.229.12:35:13.68#ibcon#about to write, iclass 31, count 2 2006.229.12:35:13.68#ibcon#wrote, iclass 31, count 2 2006.229.12:35:13.68#ibcon#about to read 3, iclass 31, count 2 2006.229.12:35:13.71#ibcon#read 3, iclass 31, count 2 2006.229.12:35:13.71#ibcon#about to read 4, iclass 31, count 2 2006.229.12:35:13.71#ibcon#read 4, iclass 31, count 2 2006.229.12:35:13.71#ibcon#about to read 5, iclass 31, count 2 2006.229.12:35:13.71#ibcon#read 5, iclass 31, count 2 2006.229.12:35:13.71#ibcon#about to read 6, iclass 31, count 2 2006.229.12:35:13.71#ibcon#read 6, iclass 31, count 2 2006.229.12:35:13.71#ibcon#end of sib2, iclass 31, count 2 2006.229.12:35:13.71#ibcon#*after write, iclass 31, count 2 2006.229.12:35:13.71#ibcon#*before return 0, iclass 31, count 2 2006.229.12:35:13.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:13.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:13.71#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.12:35:13.71#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:13.71#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:13.83#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:13.83#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:13.83#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:35:13.83#ibcon#first serial, iclass 31, count 0 2006.229.12:35:13.83#ibcon#enter sib2, iclass 31, count 0 2006.229.12:35:13.83#ibcon#flushed, iclass 31, count 0 2006.229.12:35:13.83#ibcon#about to write, iclass 31, count 0 2006.229.12:35:13.83#ibcon#wrote, iclass 31, count 0 2006.229.12:35:13.83#ibcon#about to read 3, iclass 31, count 0 2006.229.12:35:13.85#ibcon#read 3, iclass 31, count 0 2006.229.12:35:13.85#ibcon#about to read 4, iclass 31, count 0 2006.229.12:35:13.85#ibcon#read 4, iclass 31, count 0 2006.229.12:35:13.85#ibcon#about to read 5, iclass 31, count 0 2006.229.12:35:13.85#ibcon#read 5, iclass 31, count 0 2006.229.12:35:13.85#ibcon#about to read 6, iclass 31, count 0 2006.229.12:35:13.85#ibcon#read 6, iclass 31, count 0 2006.229.12:35:13.85#ibcon#end of sib2, iclass 31, count 0 2006.229.12:35:13.85#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:35:13.85#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:35:13.85#ibcon#[25=USB\r\n] 2006.229.12:35:13.85#ibcon#*before write, iclass 31, count 0 2006.229.12:35:13.85#ibcon#enter sib2, iclass 31, count 0 2006.229.12:35:13.85#ibcon#flushed, iclass 31, count 0 2006.229.12:35:13.85#ibcon#about to write, iclass 31, count 0 2006.229.12:35:13.85#ibcon#wrote, iclass 31, count 0 2006.229.12:35:13.85#ibcon#about to read 3, iclass 31, count 0 2006.229.12:35:13.88#ibcon#read 3, iclass 31, count 0 2006.229.12:35:13.88#ibcon#about to read 4, iclass 31, count 0 2006.229.12:35:13.88#ibcon#read 4, iclass 31, count 0 2006.229.12:35:13.88#ibcon#about to read 5, iclass 31, count 0 2006.229.12:35:13.88#ibcon#read 5, iclass 31, count 0 2006.229.12:35:13.88#ibcon#about to read 6, iclass 31, count 0 2006.229.12:35:13.88#ibcon#read 6, iclass 31, count 0 2006.229.12:35:13.88#ibcon#end of sib2, iclass 31, count 0 2006.229.12:35:13.88#ibcon#*after write, iclass 31, count 0 2006.229.12:35:13.88#ibcon#*before return 0, iclass 31, count 0 2006.229.12:35:13.88#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:13.88#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:13.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:35:13.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:35:13.88$vck44/valo=6,814.99 2006.229.12:35:13.88#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.12:35:13.88#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.12:35:13.88#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:13.88#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:35:13.88#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:35:13.88#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:35:13.88#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:35:13.88#ibcon#first serial, iclass 33, count 0 2006.229.12:35:13.88#ibcon#enter sib2, iclass 33, count 0 2006.229.12:35:13.88#ibcon#flushed, iclass 33, count 0 2006.229.12:35:13.88#ibcon#about to write, iclass 33, count 0 2006.229.12:35:13.88#ibcon#wrote, iclass 33, count 0 2006.229.12:35:13.88#ibcon#about to read 3, iclass 33, count 0 2006.229.12:35:13.90#ibcon#read 3, iclass 33, count 0 2006.229.12:35:13.90#ibcon#about to read 4, iclass 33, count 0 2006.229.12:35:13.90#ibcon#read 4, iclass 33, count 0 2006.229.12:35:13.90#ibcon#about to read 5, iclass 33, count 0 2006.229.12:35:13.90#ibcon#read 5, iclass 33, count 0 2006.229.12:35:13.90#ibcon#about to read 6, iclass 33, count 0 2006.229.12:35:13.90#ibcon#read 6, iclass 33, count 0 2006.229.12:35:13.90#ibcon#end of sib2, iclass 33, count 0 2006.229.12:35:13.90#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:35:13.90#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:35:13.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:35:13.90#ibcon#*before write, iclass 33, count 0 2006.229.12:35:13.90#ibcon#enter sib2, iclass 33, count 0 2006.229.12:35:13.90#ibcon#flushed, iclass 33, count 0 2006.229.12:35:13.90#ibcon#about to write, iclass 33, count 0 2006.229.12:35:13.90#ibcon#wrote, iclass 33, count 0 2006.229.12:35:13.90#ibcon#about to read 3, iclass 33, count 0 2006.229.12:35:13.94#ibcon#read 3, iclass 33, count 0 2006.229.12:35:13.94#ibcon#about to read 4, iclass 33, count 0 2006.229.12:35:13.94#ibcon#read 4, iclass 33, count 0 2006.229.12:35:13.94#ibcon#about to read 5, iclass 33, count 0 2006.229.12:35:13.94#ibcon#read 5, iclass 33, count 0 2006.229.12:35:13.94#ibcon#about to read 6, iclass 33, count 0 2006.229.12:35:13.94#ibcon#read 6, iclass 33, count 0 2006.229.12:35:13.94#ibcon#end of sib2, iclass 33, count 0 2006.229.12:35:13.94#ibcon#*after write, iclass 33, count 0 2006.229.12:35:13.94#ibcon#*before return 0, iclass 33, count 0 2006.229.12:35:13.94#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:35:13.94#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.12:35:13.94#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:35:13.94#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:35:13.94$vck44/va=6,4 2006.229.12:35:13.94#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.12:35:13.94#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.12:35:13.94#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:13.94#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:35:14.00#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:35:14.00#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:35:14.00#ibcon#enter wrdev, iclass 35, count 2 2006.229.12:35:14.00#ibcon#first serial, iclass 35, count 2 2006.229.12:35:14.00#ibcon#enter sib2, iclass 35, count 2 2006.229.12:35:14.00#ibcon#flushed, iclass 35, count 2 2006.229.12:35:14.00#ibcon#about to write, iclass 35, count 2 2006.229.12:35:14.00#ibcon#wrote, iclass 35, count 2 2006.229.12:35:14.00#ibcon#about to read 3, iclass 35, count 2 2006.229.12:35:14.02#ibcon#read 3, iclass 35, count 2 2006.229.12:35:14.02#ibcon#about to read 4, iclass 35, count 2 2006.229.12:35:14.02#ibcon#read 4, iclass 35, count 2 2006.229.12:35:14.02#ibcon#about to read 5, iclass 35, count 2 2006.229.12:35:14.02#ibcon#read 5, iclass 35, count 2 2006.229.12:35:14.02#ibcon#about to read 6, iclass 35, count 2 2006.229.12:35:14.02#ibcon#read 6, iclass 35, count 2 2006.229.12:35:14.02#ibcon#end of sib2, iclass 35, count 2 2006.229.12:35:14.02#ibcon#*mode == 0, iclass 35, count 2 2006.229.12:35:14.02#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.12:35:14.02#ibcon#[25=AT06-04\r\n] 2006.229.12:35:14.02#ibcon#*before write, iclass 35, count 2 2006.229.12:35:14.02#ibcon#enter sib2, iclass 35, count 2 2006.229.12:35:14.02#ibcon#flushed, iclass 35, count 2 2006.229.12:35:14.02#ibcon#about to write, iclass 35, count 2 2006.229.12:35:14.02#ibcon#wrote, iclass 35, count 2 2006.229.12:35:14.02#ibcon#about to read 3, iclass 35, count 2 2006.229.12:35:14.05#ibcon#read 3, iclass 35, count 2 2006.229.12:35:14.05#ibcon#about to read 4, iclass 35, count 2 2006.229.12:35:14.05#ibcon#read 4, iclass 35, count 2 2006.229.12:35:14.05#ibcon#about to read 5, iclass 35, count 2 2006.229.12:35:14.05#ibcon#read 5, iclass 35, count 2 2006.229.12:35:14.05#ibcon#about to read 6, iclass 35, count 2 2006.229.12:35:14.05#ibcon#read 6, iclass 35, count 2 2006.229.12:35:14.05#ibcon#end of sib2, iclass 35, count 2 2006.229.12:35:14.05#ibcon#*after write, iclass 35, count 2 2006.229.12:35:14.05#ibcon#*before return 0, iclass 35, count 2 2006.229.12:35:14.05#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:35:14.05#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.12:35:14.05#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.12:35:14.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:14.05#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:35:14.17#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:35:14.17#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:35:14.17#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:35:14.17#ibcon#first serial, iclass 35, count 0 2006.229.12:35:14.17#ibcon#enter sib2, iclass 35, count 0 2006.229.12:35:14.17#ibcon#flushed, iclass 35, count 0 2006.229.12:35:14.17#ibcon#about to write, iclass 35, count 0 2006.229.12:35:14.17#ibcon#wrote, iclass 35, count 0 2006.229.12:35:14.17#ibcon#about to read 3, iclass 35, count 0 2006.229.12:35:14.19#ibcon#read 3, iclass 35, count 0 2006.229.12:35:14.19#ibcon#about to read 4, iclass 35, count 0 2006.229.12:35:14.19#ibcon#read 4, iclass 35, count 0 2006.229.12:35:14.19#ibcon#about to read 5, iclass 35, count 0 2006.229.12:35:14.19#ibcon#read 5, iclass 35, count 0 2006.229.12:35:14.19#ibcon#about to read 6, iclass 35, count 0 2006.229.12:35:14.19#ibcon#read 6, iclass 35, count 0 2006.229.12:35:14.19#ibcon#end of sib2, iclass 35, count 0 2006.229.12:35:14.19#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:35:14.19#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:35:14.19#ibcon#[25=USB\r\n] 2006.229.12:35:14.19#ibcon#*before write, iclass 35, count 0 2006.229.12:35:14.19#ibcon#enter sib2, iclass 35, count 0 2006.229.12:35:14.19#ibcon#flushed, iclass 35, count 0 2006.229.12:35:14.19#ibcon#about to write, iclass 35, count 0 2006.229.12:35:14.19#ibcon#wrote, iclass 35, count 0 2006.229.12:35:14.19#ibcon#about to read 3, iclass 35, count 0 2006.229.12:35:14.22#ibcon#read 3, iclass 35, count 0 2006.229.12:35:14.22#ibcon#about to read 4, iclass 35, count 0 2006.229.12:35:14.22#ibcon#read 4, iclass 35, count 0 2006.229.12:35:14.22#ibcon#about to read 5, iclass 35, count 0 2006.229.12:35:14.22#ibcon#read 5, iclass 35, count 0 2006.229.12:35:14.22#ibcon#about to read 6, iclass 35, count 0 2006.229.12:35:14.22#ibcon#read 6, iclass 35, count 0 2006.229.12:35:14.22#ibcon#end of sib2, iclass 35, count 0 2006.229.12:35:14.22#ibcon#*after write, iclass 35, count 0 2006.229.12:35:14.22#ibcon#*before return 0, iclass 35, count 0 2006.229.12:35:14.22#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:35:14.22#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.12:35:14.22#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:35:14.22#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:35:14.22$vck44/valo=7,864.99 2006.229.12:35:14.22#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.12:35:14.22#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.12:35:14.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:14.22#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:35:14.22#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:35:14.22#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:35:14.22#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:35:14.22#ibcon#first serial, iclass 37, count 0 2006.229.12:35:14.22#ibcon#enter sib2, iclass 37, count 0 2006.229.12:35:14.22#ibcon#flushed, iclass 37, count 0 2006.229.12:35:14.22#ibcon#about to write, iclass 37, count 0 2006.229.12:35:14.22#ibcon#wrote, iclass 37, count 0 2006.229.12:35:14.22#ibcon#about to read 3, iclass 37, count 0 2006.229.12:35:14.24#ibcon#read 3, iclass 37, count 0 2006.229.12:35:14.24#ibcon#about to read 4, iclass 37, count 0 2006.229.12:35:14.24#ibcon#read 4, iclass 37, count 0 2006.229.12:35:14.24#ibcon#about to read 5, iclass 37, count 0 2006.229.12:35:14.24#ibcon#read 5, iclass 37, count 0 2006.229.12:35:14.24#ibcon#about to read 6, iclass 37, count 0 2006.229.12:35:14.24#ibcon#read 6, iclass 37, count 0 2006.229.12:35:14.24#ibcon#end of sib2, iclass 37, count 0 2006.229.12:35:14.24#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:35:14.24#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:35:14.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:35:14.24#ibcon#*before write, iclass 37, count 0 2006.229.12:35:14.24#ibcon#enter sib2, iclass 37, count 0 2006.229.12:35:14.24#ibcon#flushed, iclass 37, count 0 2006.229.12:35:14.24#ibcon#about to write, iclass 37, count 0 2006.229.12:35:14.24#ibcon#wrote, iclass 37, count 0 2006.229.12:35:14.24#ibcon#about to read 3, iclass 37, count 0 2006.229.12:35:14.28#ibcon#read 3, iclass 37, count 0 2006.229.12:35:14.28#ibcon#about to read 4, iclass 37, count 0 2006.229.12:35:14.28#ibcon#read 4, iclass 37, count 0 2006.229.12:35:14.28#ibcon#about to read 5, iclass 37, count 0 2006.229.12:35:14.28#ibcon#read 5, iclass 37, count 0 2006.229.12:35:14.28#ibcon#about to read 6, iclass 37, count 0 2006.229.12:35:14.28#ibcon#read 6, iclass 37, count 0 2006.229.12:35:14.28#ibcon#end of sib2, iclass 37, count 0 2006.229.12:35:14.28#ibcon#*after write, iclass 37, count 0 2006.229.12:35:14.28#ibcon#*before return 0, iclass 37, count 0 2006.229.12:35:14.28#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:35:14.28#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:35:14.28#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:35:14.28#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:35:14.28$vck44/va=7,5 2006.229.12:35:14.28#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.12:35:14.28#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.12:35:14.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:14.28#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:14.34#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:14.34#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:14.34#ibcon#enter wrdev, iclass 39, count 2 2006.229.12:35:14.34#ibcon#first serial, iclass 39, count 2 2006.229.12:35:14.34#ibcon#enter sib2, iclass 39, count 2 2006.229.12:35:14.34#ibcon#flushed, iclass 39, count 2 2006.229.12:35:14.34#ibcon#about to write, iclass 39, count 2 2006.229.12:35:14.34#ibcon#wrote, iclass 39, count 2 2006.229.12:35:14.34#ibcon#about to read 3, iclass 39, count 2 2006.229.12:35:14.36#ibcon#read 3, iclass 39, count 2 2006.229.12:35:14.36#ibcon#about to read 4, iclass 39, count 2 2006.229.12:35:14.36#ibcon#read 4, iclass 39, count 2 2006.229.12:35:14.36#ibcon#about to read 5, iclass 39, count 2 2006.229.12:35:14.36#ibcon#read 5, iclass 39, count 2 2006.229.12:35:14.36#ibcon#about to read 6, iclass 39, count 2 2006.229.12:35:14.36#ibcon#read 6, iclass 39, count 2 2006.229.12:35:14.36#ibcon#end of sib2, iclass 39, count 2 2006.229.12:35:14.36#ibcon#*mode == 0, iclass 39, count 2 2006.229.12:35:14.36#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.12:35:14.36#ibcon#[25=AT07-05\r\n] 2006.229.12:35:14.36#ibcon#*before write, iclass 39, count 2 2006.229.12:35:14.36#ibcon#enter sib2, iclass 39, count 2 2006.229.12:35:14.36#ibcon#flushed, iclass 39, count 2 2006.229.12:35:14.36#ibcon#about to write, iclass 39, count 2 2006.229.12:35:14.36#ibcon#wrote, iclass 39, count 2 2006.229.12:35:14.36#ibcon#about to read 3, iclass 39, count 2 2006.229.12:35:14.39#ibcon#read 3, iclass 39, count 2 2006.229.12:35:14.39#ibcon#about to read 4, iclass 39, count 2 2006.229.12:35:14.39#ibcon#read 4, iclass 39, count 2 2006.229.12:35:14.39#ibcon#about to read 5, iclass 39, count 2 2006.229.12:35:14.39#ibcon#read 5, iclass 39, count 2 2006.229.12:35:14.39#ibcon#about to read 6, iclass 39, count 2 2006.229.12:35:14.39#ibcon#read 6, iclass 39, count 2 2006.229.12:35:14.39#ibcon#end of sib2, iclass 39, count 2 2006.229.12:35:14.39#ibcon#*after write, iclass 39, count 2 2006.229.12:35:14.39#ibcon#*before return 0, iclass 39, count 2 2006.229.12:35:14.39#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:14.39#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:14.39#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.12:35:14.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:14.39#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:14.51#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:14.51#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:14.51#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:35:14.51#ibcon#first serial, iclass 39, count 0 2006.229.12:35:14.51#ibcon#enter sib2, iclass 39, count 0 2006.229.12:35:14.51#ibcon#flushed, iclass 39, count 0 2006.229.12:35:14.51#ibcon#about to write, iclass 39, count 0 2006.229.12:35:14.51#ibcon#wrote, iclass 39, count 0 2006.229.12:35:14.51#ibcon#about to read 3, iclass 39, count 0 2006.229.12:35:14.53#ibcon#read 3, iclass 39, count 0 2006.229.12:35:14.53#ibcon#about to read 4, iclass 39, count 0 2006.229.12:35:14.53#ibcon#read 4, iclass 39, count 0 2006.229.12:35:14.53#ibcon#about to read 5, iclass 39, count 0 2006.229.12:35:14.53#ibcon#read 5, iclass 39, count 0 2006.229.12:35:14.53#ibcon#about to read 6, iclass 39, count 0 2006.229.12:35:14.53#ibcon#read 6, iclass 39, count 0 2006.229.12:35:14.53#ibcon#end of sib2, iclass 39, count 0 2006.229.12:35:14.53#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:35:14.53#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:35:14.53#ibcon#[25=USB\r\n] 2006.229.12:35:14.53#ibcon#*before write, iclass 39, count 0 2006.229.12:35:14.53#ibcon#enter sib2, iclass 39, count 0 2006.229.12:35:14.53#ibcon#flushed, iclass 39, count 0 2006.229.12:35:14.53#ibcon#about to write, iclass 39, count 0 2006.229.12:35:14.53#ibcon#wrote, iclass 39, count 0 2006.229.12:35:14.53#ibcon#about to read 3, iclass 39, count 0 2006.229.12:35:14.56#ibcon#read 3, iclass 39, count 0 2006.229.12:35:14.56#ibcon#about to read 4, iclass 39, count 0 2006.229.12:35:14.56#ibcon#read 4, iclass 39, count 0 2006.229.12:35:14.56#ibcon#about to read 5, iclass 39, count 0 2006.229.12:35:14.56#ibcon#read 5, iclass 39, count 0 2006.229.12:35:14.56#ibcon#about to read 6, iclass 39, count 0 2006.229.12:35:14.56#ibcon#read 6, iclass 39, count 0 2006.229.12:35:14.56#ibcon#end of sib2, iclass 39, count 0 2006.229.12:35:14.56#ibcon#*after write, iclass 39, count 0 2006.229.12:35:14.56#ibcon#*before return 0, iclass 39, count 0 2006.229.12:35:14.56#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:14.56#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:14.56#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:35:14.56#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:35:14.56$vck44/valo=8,884.99 2006.229.12:35:14.56#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.12:35:14.56#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.12:35:14.56#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:14.56#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:14.56#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:14.56#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:14.56#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:35:14.56#ibcon#first serial, iclass 3, count 0 2006.229.12:35:14.56#ibcon#enter sib2, iclass 3, count 0 2006.229.12:35:14.56#ibcon#flushed, iclass 3, count 0 2006.229.12:35:14.56#ibcon#about to write, iclass 3, count 0 2006.229.12:35:14.56#ibcon#wrote, iclass 3, count 0 2006.229.12:35:14.56#ibcon#about to read 3, iclass 3, count 0 2006.229.12:35:14.58#ibcon#read 3, iclass 3, count 0 2006.229.12:35:14.58#ibcon#about to read 4, iclass 3, count 0 2006.229.12:35:14.58#ibcon#read 4, iclass 3, count 0 2006.229.12:35:14.58#ibcon#about to read 5, iclass 3, count 0 2006.229.12:35:14.58#ibcon#read 5, iclass 3, count 0 2006.229.12:35:14.58#ibcon#about to read 6, iclass 3, count 0 2006.229.12:35:14.58#ibcon#read 6, iclass 3, count 0 2006.229.12:35:14.58#ibcon#end of sib2, iclass 3, count 0 2006.229.12:35:14.58#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:35:14.58#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:35:14.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:35:14.58#ibcon#*before write, iclass 3, count 0 2006.229.12:35:14.58#ibcon#enter sib2, iclass 3, count 0 2006.229.12:35:14.58#ibcon#flushed, iclass 3, count 0 2006.229.12:35:14.58#ibcon#about to write, iclass 3, count 0 2006.229.12:35:14.58#ibcon#wrote, iclass 3, count 0 2006.229.12:35:14.58#ibcon#about to read 3, iclass 3, count 0 2006.229.12:35:14.62#ibcon#read 3, iclass 3, count 0 2006.229.12:35:14.62#ibcon#about to read 4, iclass 3, count 0 2006.229.12:35:14.62#ibcon#read 4, iclass 3, count 0 2006.229.12:35:14.62#ibcon#about to read 5, iclass 3, count 0 2006.229.12:35:14.62#ibcon#read 5, iclass 3, count 0 2006.229.12:35:14.62#ibcon#about to read 6, iclass 3, count 0 2006.229.12:35:14.62#ibcon#read 6, iclass 3, count 0 2006.229.12:35:14.62#ibcon#end of sib2, iclass 3, count 0 2006.229.12:35:14.62#ibcon#*after write, iclass 3, count 0 2006.229.12:35:14.62#ibcon#*before return 0, iclass 3, count 0 2006.229.12:35:14.62#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:14.62#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:14.62#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:35:14.62#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:35:14.62$vck44/va=8,6 2006.229.12:35:14.62#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.12:35:14.62#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.12:35:14.62#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:14.62#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:14.68#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:14.68#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:14.68#ibcon#enter wrdev, iclass 5, count 2 2006.229.12:35:14.68#ibcon#first serial, iclass 5, count 2 2006.229.12:35:14.68#ibcon#enter sib2, iclass 5, count 2 2006.229.12:35:14.68#ibcon#flushed, iclass 5, count 2 2006.229.12:35:14.68#ibcon#about to write, iclass 5, count 2 2006.229.12:35:14.68#ibcon#wrote, iclass 5, count 2 2006.229.12:35:14.68#ibcon#about to read 3, iclass 5, count 2 2006.229.12:35:14.70#ibcon#read 3, iclass 5, count 2 2006.229.12:35:14.70#ibcon#about to read 4, iclass 5, count 2 2006.229.12:35:14.70#ibcon#read 4, iclass 5, count 2 2006.229.12:35:14.70#ibcon#about to read 5, iclass 5, count 2 2006.229.12:35:14.70#ibcon#read 5, iclass 5, count 2 2006.229.12:35:14.70#ibcon#about to read 6, iclass 5, count 2 2006.229.12:35:14.70#ibcon#read 6, iclass 5, count 2 2006.229.12:35:14.70#ibcon#end of sib2, iclass 5, count 2 2006.229.12:35:14.70#ibcon#*mode == 0, iclass 5, count 2 2006.229.12:35:14.70#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.12:35:14.70#ibcon#[25=AT08-06\r\n] 2006.229.12:35:14.70#ibcon#*before write, iclass 5, count 2 2006.229.12:35:14.70#ibcon#enter sib2, iclass 5, count 2 2006.229.12:35:14.70#ibcon#flushed, iclass 5, count 2 2006.229.12:35:14.70#ibcon#about to write, iclass 5, count 2 2006.229.12:35:14.70#ibcon#wrote, iclass 5, count 2 2006.229.12:35:14.70#ibcon#about to read 3, iclass 5, count 2 2006.229.12:35:14.73#ibcon#read 3, iclass 5, count 2 2006.229.12:35:14.73#ibcon#about to read 4, iclass 5, count 2 2006.229.12:35:14.73#ibcon#read 4, iclass 5, count 2 2006.229.12:35:14.73#ibcon#about to read 5, iclass 5, count 2 2006.229.12:35:14.73#ibcon#read 5, iclass 5, count 2 2006.229.12:35:14.73#ibcon#about to read 6, iclass 5, count 2 2006.229.12:35:14.73#ibcon#read 6, iclass 5, count 2 2006.229.12:35:14.73#ibcon#end of sib2, iclass 5, count 2 2006.229.12:35:14.73#ibcon#*after write, iclass 5, count 2 2006.229.12:35:14.73#ibcon#*before return 0, iclass 5, count 2 2006.229.12:35:14.73#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:14.73#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:14.73#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.12:35:14.73#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:14.73#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:14.85#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:14.85#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:14.85#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:35:14.85#ibcon#first serial, iclass 5, count 0 2006.229.12:35:14.85#ibcon#enter sib2, iclass 5, count 0 2006.229.12:35:14.85#ibcon#flushed, iclass 5, count 0 2006.229.12:35:14.85#ibcon#about to write, iclass 5, count 0 2006.229.12:35:14.85#ibcon#wrote, iclass 5, count 0 2006.229.12:35:14.85#ibcon#about to read 3, iclass 5, count 0 2006.229.12:35:14.87#ibcon#read 3, iclass 5, count 0 2006.229.12:35:14.87#ibcon#about to read 4, iclass 5, count 0 2006.229.12:35:14.87#ibcon#read 4, iclass 5, count 0 2006.229.12:35:14.87#ibcon#about to read 5, iclass 5, count 0 2006.229.12:35:14.87#ibcon#read 5, iclass 5, count 0 2006.229.12:35:14.87#ibcon#about to read 6, iclass 5, count 0 2006.229.12:35:14.87#ibcon#read 6, iclass 5, count 0 2006.229.12:35:14.87#ibcon#end of sib2, iclass 5, count 0 2006.229.12:35:14.87#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:35:14.87#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:35:14.87#ibcon#[25=USB\r\n] 2006.229.12:35:14.87#ibcon#*before write, iclass 5, count 0 2006.229.12:35:14.87#ibcon#enter sib2, iclass 5, count 0 2006.229.12:35:14.87#ibcon#flushed, iclass 5, count 0 2006.229.12:35:14.87#ibcon#about to write, iclass 5, count 0 2006.229.12:35:14.87#ibcon#wrote, iclass 5, count 0 2006.229.12:35:14.87#ibcon#about to read 3, iclass 5, count 0 2006.229.12:35:14.90#ibcon#read 3, iclass 5, count 0 2006.229.12:35:14.90#ibcon#about to read 4, iclass 5, count 0 2006.229.12:35:14.90#ibcon#read 4, iclass 5, count 0 2006.229.12:35:14.90#ibcon#about to read 5, iclass 5, count 0 2006.229.12:35:14.90#ibcon#read 5, iclass 5, count 0 2006.229.12:35:14.90#ibcon#about to read 6, iclass 5, count 0 2006.229.12:35:14.90#ibcon#read 6, iclass 5, count 0 2006.229.12:35:14.90#ibcon#end of sib2, iclass 5, count 0 2006.229.12:35:14.90#ibcon#*after write, iclass 5, count 0 2006.229.12:35:14.90#ibcon#*before return 0, iclass 5, count 0 2006.229.12:35:14.90#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:14.90#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:14.90#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:35:14.90#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:35:14.90$vck44/vblo=1,629.99 2006.229.12:35:14.90#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.12:35:14.90#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.12:35:14.90#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:14.90#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:14.90#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:14.90#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:14.90#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:35:14.90#ibcon#first serial, iclass 7, count 0 2006.229.12:35:14.90#ibcon#enter sib2, iclass 7, count 0 2006.229.12:35:14.90#ibcon#flushed, iclass 7, count 0 2006.229.12:35:14.90#ibcon#about to write, iclass 7, count 0 2006.229.12:35:14.90#ibcon#wrote, iclass 7, count 0 2006.229.12:35:14.90#ibcon#about to read 3, iclass 7, count 0 2006.229.12:35:14.92#ibcon#read 3, iclass 7, count 0 2006.229.12:35:14.92#ibcon#about to read 4, iclass 7, count 0 2006.229.12:35:14.92#ibcon#read 4, iclass 7, count 0 2006.229.12:35:14.92#ibcon#about to read 5, iclass 7, count 0 2006.229.12:35:14.92#ibcon#read 5, iclass 7, count 0 2006.229.12:35:14.92#ibcon#about to read 6, iclass 7, count 0 2006.229.12:35:14.92#ibcon#read 6, iclass 7, count 0 2006.229.12:35:14.92#ibcon#end of sib2, iclass 7, count 0 2006.229.12:35:14.92#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:35:14.92#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:35:14.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:35:14.92#ibcon#*before write, iclass 7, count 0 2006.229.12:35:14.92#ibcon#enter sib2, iclass 7, count 0 2006.229.12:35:14.92#ibcon#flushed, iclass 7, count 0 2006.229.12:35:14.92#ibcon#about to write, iclass 7, count 0 2006.229.12:35:14.92#ibcon#wrote, iclass 7, count 0 2006.229.12:35:14.92#ibcon#about to read 3, iclass 7, count 0 2006.229.12:35:14.96#ibcon#read 3, iclass 7, count 0 2006.229.12:35:14.96#ibcon#about to read 4, iclass 7, count 0 2006.229.12:35:14.96#ibcon#read 4, iclass 7, count 0 2006.229.12:35:14.96#ibcon#about to read 5, iclass 7, count 0 2006.229.12:35:14.96#ibcon#read 5, iclass 7, count 0 2006.229.12:35:14.96#ibcon#about to read 6, iclass 7, count 0 2006.229.12:35:14.96#ibcon#read 6, iclass 7, count 0 2006.229.12:35:14.96#ibcon#end of sib2, iclass 7, count 0 2006.229.12:35:14.96#ibcon#*after write, iclass 7, count 0 2006.229.12:35:14.96#ibcon#*before return 0, iclass 7, count 0 2006.229.12:35:14.96#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:14.96#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:14.96#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:35:14.96#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:35:14.96$vck44/vb=1,4 2006.229.12:35:14.96#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.12:35:14.96#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.12:35:14.96#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:14.96#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:35:14.96#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:35:14.96#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:35:14.96#ibcon#enter wrdev, iclass 11, count 2 2006.229.12:35:14.96#ibcon#first serial, iclass 11, count 2 2006.229.12:35:14.96#ibcon#enter sib2, iclass 11, count 2 2006.229.12:35:14.96#ibcon#flushed, iclass 11, count 2 2006.229.12:35:14.96#ibcon#about to write, iclass 11, count 2 2006.229.12:35:14.96#ibcon#wrote, iclass 11, count 2 2006.229.12:35:14.96#ibcon#about to read 3, iclass 11, count 2 2006.229.12:35:14.98#ibcon#read 3, iclass 11, count 2 2006.229.12:35:14.98#ibcon#about to read 4, iclass 11, count 2 2006.229.12:35:14.98#ibcon#read 4, iclass 11, count 2 2006.229.12:35:14.98#ibcon#about to read 5, iclass 11, count 2 2006.229.12:35:14.98#ibcon#read 5, iclass 11, count 2 2006.229.12:35:14.98#ibcon#about to read 6, iclass 11, count 2 2006.229.12:35:14.98#ibcon#read 6, iclass 11, count 2 2006.229.12:35:14.98#ibcon#end of sib2, iclass 11, count 2 2006.229.12:35:14.98#ibcon#*mode == 0, iclass 11, count 2 2006.229.12:35:14.98#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.12:35:14.98#ibcon#[27=AT01-04\r\n] 2006.229.12:35:14.98#ibcon#*before write, iclass 11, count 2 2006.229.12:35:14.98#ibcon#enter sib2, iclass 11, count 2 2006.229.12:35:14.98#ibcon#flushed, iclass 11, count 2 2006.229.12:35:14.98#ibcon#about to write, iclass 11, count 2 2006.229.12:35:14.98#ibcon#wrote, iclass 11, count 2 2006.229.12:35:14.98#ibcon#about to read 3, iclass 11, count 2 2006.229.12:35:15.01#ibcon#read 3, iclass 11, count 2 2006.229.12:35:15.01#ibcon#about to read 4, iclass 11, count 2 2006.229.12:35:15.01#ibcon#read 4, iclass 11, count 2 2006.229.12:35:15.01#ibcon#about to read 5, iclass 11, count 2 2006.229.12:35:15.01#ibcon#read 5, iclass 11, count 2 2006.229.12:35:15.01#ibcon#about to read 6, iclass 11, count 2 2006.229.12:35:15.01#ibcon#read 6, iclass 11, count 2 2006.229.12:35:15.01#ibcon#end of sib2, iclass 11, count 2 2006.229.12:35:15.01#ibcon#*after write, iclass 11, count 2 2006.229.12:35:15.01#ibcon#*before return 0, iclass 11, count 2 2006.229.12:35:15.01#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:35:15.01#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.12:35:15.01#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.12:35:15.01#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:15.01#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:35:15.13#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:35:15.13#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:35:15.13#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:35:15.13#ibcon#first serial, iclass 11, count 0 2006.229.12:35:15.13#ibcon#enter sib2, iclass 11, count 0 2006.229.12:35:15.13#ibcon#flushed, iclass 11, count 0 2006.229.12:35:15.13#ibcon#about to write, iclass 11, count 0 2006.229.12:35:15.13#ibcon#wrote, iclass 11, count 0 2006.229.12:35:15.13#ibcon#about to read 3, iclass 11, count 0 2006.229.12:35:15.15#ibcon#read 3, iclass 11, count 0 2006.229.12:35:15.15#ibcon#about to read 4, iclass 11, count 0 2006.229.12:35:15.15#ibcon#read 4, iclass 11, count 0 2006.229.12:35:15.15#ibcon#about to read 5, iclass 11, count 0 2006.229.12:35:15.15#ibcon#read 5, iclass 11, count 0 2006.229.12:35:15.15#ibcon#about to read 6, iclass 11, count 0 2006.229.12:35:15.15#ibcon#read 6, iclass 11, count 0 2006.229.12:35:15.15#ibcon#end of sib2, iclass 11, count 0 2006.229.12:35:15.15#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:35:15.15#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:35:15.15#ibcon#[27=USB\r\n] 2006.229.12:35:15.15#ibcon#*before write, iclass 11, count 0 2006.229.12:35:15.15#ibcon#enter sib2, iclass 11, count 0 2006.229.12:35:15.15#ibcon#flushed, iclass 11, count 0 2006.229.12:35:15.15#ibcon#about to write, iclass 11, count 0 2006.229.12:35:15.15#ibcon#wrote, iclass 11, count 0 2006.229.12:35:15.15#ibcon#about to read 3, iclass 11, count 0 2006.229.12:35:15.18#ibcon#read 3, iclass 11, count 0 2006.229.12:35:15.18#ibcon#about to read 4, iclass 11, count 0 2006.229.12:35:15.18#ibcon#read 4, iclass 11, count 0 2006.229.12:35:15.18#ibcon#about to read 5, iclass 11, count 0 2006.229.12:35:15.18#ibcon#read 5, iclass 11, count 0 2006.229.12:35:15.18#ibcon#about to read 6, iclass 11, count 0 2006.229.12:35:15.18#ibcon#read 6, iclass 11, count 0 2006.229.12:35:15.18#ibcon#end of sib2, iclass 11, count 0 2006.229.12:35:15.18#ibcon#*after write, iclass 11, count 0 2006.229.12:35:15.18#ibcon#*before return 0, iclass 11, count 0 2006.229.12:35:15.18#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:35:15.18#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.12:35:15.18#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:35:15.18#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:35:15.18$vck44/vblo=2,634.99 2006.229.12:35:15.18#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.12:35:15.18#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.12:35:15.18#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:15.18#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:15.18#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:15.18#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:15.18#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:35:15.18#ibcon#first serial, iclass 13, count 0 2006.229.12:35:15.18#ibcon#enter sib2, iclass 13, count 0 2006.229.12:35:15.18#ibcon#flushed, iclass 13, count 0 2006.229.12:35:15.18#ibcon#about to write, iclass 13, count 0 2006.229.12:35:15.18#ibcon#wrote, iclass 13, count 0 2006.229.12:35:15.18#ibcon#about to read 3, iclass 13, count 0 2006.229.12:35:15.20#ibcon#read 3, iclass 13, count 0 2006.229.12:35:15.20#ibcon#about to read 4, iclass 13, count 0 2006.229.12:35:15.20#ibcon#read 4, iclass 13, count 0 2006.229.12:35:15.20#ibcon#about to read 5, iclass 13, count 0 2006.229.12:35:15.20#ibcon#read 5, iclass 13, count 0 2006.229.12:35:15.20#ibcon#about to read 6, iclass 13, count 0 2006.229.12:35:15.20#ibcon#read 6, iclass 13, count 0 2006.229.12:35:15.20#ibcon#end of sib2, iclass 13, count 0 2006.229.12:35:15.20#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:35:15.20#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:35:15.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:35:15.20#ibcon#*before write, iclass 13, count 0 2006.229.12:35:15.20#ibcon#enter sib2, iclass 13, count 0 2006.229.12:35:15.20#ibcon#flushed, iclass 13, count 0 2006.229.12:35:15.20#ibcon#about to write, iclass 13, count 0 2006.229.12:35:15.20#ibcon#wrote, iclass 13, count 0 2006.229.12:35:15.20#ibcon#about to read 3, iclass 13, count 0 2006.229.12:35:15.24#ibcon#read 3, iclass 13, count 0 2006.229.12:35:15.24#ibcon#about to read 4, iclass 13, count 0 2006.229.12:35:15.24#ibcon#read 4, iclass 13, count 0 2006.229.12:35:15.24#ibcon#about to read 5, iclass 13, count 0 2006.229.12:35:15.24#ibcon#read 5, iclass 13, count 0 2006.229.12:35:15.24#ibcon#about to read 6, iclass 13, count 0 2006.229.12:35:15.24#ibcon#read 6, iclass 13, count 0 2006.229.12:35:15.24#ibcon#end of sib2, iclass 13, count 0 2006.229.12:35:15.24#ibcon#*after write, iclass 13, count 0 2006.229.12:35:15.24#ibcon#*before return 0, iclass 13, count 0 2006.229.12:35:15.24#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:15.24#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.12:35:15.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:35:15.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:35:15.24$vck44/vb=2,4 2006.229.12:35:15.24#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.12:35:15.24#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.12:35:15.24#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:15.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:15.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:15.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:15.30#ibcon#enter wrdev, iclass 15, count 2 2006.229.12:35:15.30#ibcon#first serial, iclass 15, count 2 2006.229.12:35:15.30#ibcon#enter sib2, iclass 15, count 2 2006.229.12:35:15.30#ibcon#flushed, iclass 15, count 2 2006.229.12:35:15.30#ibcon#about to write, iclass 15, count 2 2006.229.12:35:15.30#ibcon#wrote, iclass 15, count 2 2006.229.12:35:15.30#ibcon#about to read 3, iclass 15, count 2 2006.229.12:35:15.32#ibcon#read 3, iclass 15, count 2 2006.229.12:35:15.32#ibcon#about to read 4, iclass 15, count 2 2006.229.12:35:15.32#ibcon#read 4, iclass 15, count 2 2006.229.12:35:15.32#ibcon#about to read 5, iclass 15, count 2 2006.229.12:35:15.32#ibcon#read 5, iclass 15, count 2 2006.229.12:35:15.32#ibcon#about to read 6, iclass 15, count 2 2006.229.12:35:15.32#ibcon#read 6, iclass 15, count 2 2006.229.12:35:15.32#ibcon#end of sib2, iclass 15, count 2 2006.229.12:35:15.32#ibcon#*mode == 0, iclass 15, count 2 2006.229.12:35:15.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.12:35:15.32#ibcon#[27=AT02-04\r\n] 2006.229.12:35:15.32#ibcon#*before write, iclass 15, count 2 2006.229.12:35:15.32#ibcon#enter sib2, iclass 15, count 2 2006.229.12:35:15.32#ibcon#flushed, iclass 15, count 2 2006.229.12:35:15.32#ibcon#about to write, iclass 15, count 2 2006.229.12:35:15.32#ibcon#wrote, iclass 15, count 2 2006.229.12:35:15.32#ibcon#about to read 3, iclass 15, count 2 2006.229.12:35:15.35#ibcon#read 3, iclass 15, count 2 2006.229.12:35:15.35#ibcon#about to read 4, iclass 15, count 2 2006.229.12:35:15.35#ibcon#read 4, iclass 15, count 2 2006.229.12:35:15.35#ibcon#about to read 5, iclass 15, count 2 2006.229.12:35:15.35#ibcon#read 5, iclass 15, count 2 2006.229.12:35:15.35#ibcon#about to read 6, iclass 15, count 2 2006.229.12:35:15.35#ibcon#read 6, iclass 15, count 2 2006.229.12:35:15.35#ibcon#end of sib2, iclass 15, count 2 2006.229.12:35:15.35#ibcon#*after write, iclass 15, count 2 2006.229.12:35:15.35#ibcon#*before return 0, iclass 15, count 2 2006.229.12:35:15.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:15.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.12:35:15.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.12:35:15.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:15.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:15.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:15.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:15.47#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:35:15.47#ibcon#first serial, iclass 15, count 0 2006.229.12:35:15.47#ibcon#enter sib2, iclass 15, count 0 2006.229.12:35:15.47#ibcon#flushed, iclass 15, count 0 2006.229.12:35:15.47#ibcon#about to write, iclass 15, count 0 2006.229.12:35:15.47#ibcon#wrote, iclass 15, count 0 2006.229.12:35:15.47#ibcon#about to read 3, iclass 15, count 0 2006.229.12:35:15.49#ibcon#read 3, iclass 15, count 0 2006.229.12:35:15.49#ibcon#about to read 4, iclass 15, count 0 2006.229.12:35:15.49#ibcon#read 4, iclass 15, count 0 2006.229.12:35:15.49#ibcon#about to read 5, iclass 15, count 0 2006.229.12:35:15.49#ibcon#read 5, iclass 15, count 0 2006.229.12:35:15.49#ibcon#about to read 6, iclass 15, count 0 2006.229.12:35:15.49#ibcon#read 6, iclass 15, count 0 2006.229.12:35:15.49#ibcon#end of sib2, iclass 15, count 0 2006.229.12:35:15.49#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:35:15.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:35:15.49#ibcon#[27=USB\r\n] 2006.229.12:35:15.49#ibcon#*before write, iclass 15, count 0 2006.229.12:35:15.49#ibcon#enter sib2, iclass 15, count 0 2006.229.12:35:15.49#ibcon#flushed, iclass 15, count 0 2006.229.12:35:15.49#ibcon#about to write, iclass 15, count 0 2006.229.12:35:15.49#ibcon#wrote, iclass 15, count 0 2006.229.12:35:15.49#ibcon#about to read 3, iclass 15, count 0 2006.229.12:35:15.52#ibcon#read 3, iclass 15, count 0 2006.229.12:35:15.52#ibcon#about to read 4, iclass 15, count 0 2006.229.12:35:15.52#ibcon#read 4, iclass 15, count 0 2006.229.12:35:15.52#ibcon#about to read 5, iclass 15, count 0 2006.229.12:35:15.52#ibcon#read 5, iclass 15, count 0 2006.229.12:35:15.52#ibcon#about to read 6, iclass 15, count 0 2006.229.12:35:15.52#ibcon#read 6, iclass 15, count 0 2006.229.12:35:15.52#ibcon#end of sib2, iclass 15, count 0 2006.229.12:35:15.52#ibcon#*after write, iclass 15, count 0 2006.229.12:35:15.52#ibcon#*before return 0, iclass 15, count 0 2006.229.12:35:15.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:15.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.12:35:15.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:35:15.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:35:15.52$vck44/vblo=3,649.99 2006.229.12:35:15.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.12:35:15.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.12:35:15.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:15.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:15.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:15.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:15.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:35:15.52#ibcon#first serial, iclass 17, count 0 2006.229.12:35:15.52#ibcon#enter sib2, iclass 17, count 0 2006.229.12:35:15.52#ibcon#flushed, iclass 17, count 0 2006.229.12:35:15.52#ibcon#about to write, iclass 17, count 0 2006.229.12:35:15.52#ibcon#wrote, iclass 17, count 0 2006.229.12:35:15.52#ibcon#about to read 3, iclass 17, count 0 2006.229.12:35:15.54#ibcon#read 3, iclass 17, count 0 2006.229.12:35:15.54#ibcon#about to read 4, iclass 17, count 0 2006.229.12:35:15.54#ibcon#read 4, iclass 17, count 0 2006.229.12:35:15.54#ibcon#about to read 5, iclass 17, count 0 2006.229.12:35:15.54#ibcon#read 5, iclass 17, count 0 2006.229.12:35:15.54#ibcon#about to read 6, iclass 17, count 0 2006.229.12:35:15.54#ibcon#read 6, iclass 17, count 0 2006.229.12:35:15.54#ibcon#end of sib2, iclass 17, count 0 2006.229.12:35:15.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:35:15.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:35:15.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:35:15.54#ibcon#*before write, iclass 17, count 0 2006.229.12:35:15.54#ibcon#enter sib2, iclass 17, count 0 2006.229.12:35:15.54#ibcon#flushed, iclass 17, count 0 2006.229.12:35:15.54#ibcon#about to write, iclass 17, count 0 2006.229.12:35:15.54#ibcon#wrote, iclass 17, count 0 2006.229.12:35:15.54#ibcon#about to read 3, iclass 17, count 0 2006.229.12:35:15.58#ibcon#read 3, iclass 17, count 0 2006.229.12:35:15.58#ibcon#about to read 4, iclass 17, count 0 2006.229.12:35:15.58#ibcon#read 4, iclass 17, count 0 2006.229.12:35:15.58#ibcon#about to read 5, iclass 17, count 0 2006.229.12:35:15.58#ibcon#read 5, iclass 17, count 0 2006.229.12:35:15.58#ibcon#about to read 6, iclass 17, count 0 2006.229.12:35:15.58#ibcon#read 6, iclass 17, count 0 2006.229.12:35:15.58#ibcon#end of sib2, iclass 17, count 0 2006.229.12:35:15.58#ibcon#*after write, iclass 17, count 0 2006.229.12:35:15.58#ibcon#*before return 0, iclass 17, count 0 2006.229.12:35:15.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:15.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.12:35:15.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:35:15.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:35:15.58$vck44/vb=3,4 2006.229.12:35:15.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.12:35:15.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.12:35:15.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:15.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:15.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:15.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:15.64#ibcon#enter wrdev, iclass 19, count 2 2006.229.12:35:15.64#ibcon#first serial, iclass 19, count 2 2006.229.12:35:15.64#ibcon#enter sib2, iclass 19, count 2 2006.229.12:35:15.64#ibcon#flushed, iclass 19, count 2 2006.229.12:35:15.64#ibcon#about to write, iclass 19, count 2 2006.229.12:35:15.64#ibcon#wrote, iclass 19, count 2 2006.229.12:35:15.64#ibcon#about to read 3, iclass 19, count 2 2006.229.12:35:15.66#ibcon#read 3, iclass 19, count 2 2006.229.12:35:15.66#ibcon#about to read 4, iclass 19, count 2 2006.229.12:35:15.66#ibcon#read 4, iclass 19, count 2 2006.229.12:35:15.66#ibcon#about to read 5, iclass 19, count 2 2006.229.12:35:15.66#ibcon#read 5, iclass 19, count 2 2006.229.12:35:15.66#ibcon#about to read 6, iclass 19, count 2 2006.229.12:35:15.66#ibcon#read 6, iclass 19, count 2 2006.229.12:35:15.66#ibcon#end of sib2, iclass 19, count 2 2006.229.12:35:15.66#ibcon#*mode == 0, iclass 19, count 2 2006.229.12:35:15.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.12:35:15.66#ibcon#[27=AT03-04\r\n] 2006.229.12:35:15.66#ibcon#*before write, iclass 19, count 2 2006.229.12:35:15.66#ibcon#enter sib2, iclass 19, count 2 2006.229.12:35:15.66#ibcon#flushed, iclass 19, count 2 2006.229.12:35:15.66#ibcon#about to write, iclass 19, count 2 2006.229.12:35:15.66#ibcon#wrote, iclass 19, count 2 2006.229.12:35:15.66#ibcon#about to read 3, iclass 19, count 2 2006.229.12:35:15.69#ibcon#read 3, iclass 19, count 2 2006.229.12:35:15.69#ibcon#about to read 4, iclass 19, count 2 2006.229.12:35:15.69#ibcon#read 4, iclass 19, count 2 2006.229.12:35:15.69#ibcon#about to read 5, iclass 19, count 2 2006.229.12:35:15.69#ibcon#read 5, iclass 19, count 2 2006.229.12:35:15.69#ibcon#about to read 6, iclass 19, count 2 2006.229.12:35:15.69#ibcon#read 6, iclass 19, count 2 2006.229.12:35:15.69#ibcon#end of sib2, iclass 19, count 2 2006.229.12:35:15.69#ibcon#*after write, iclass 19, count 2 2006.229.12:35:15.69#ibcon#*before return 0, iclass 19, count 2 2006.229.12:35:15.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:15.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.12:35:15.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.12:35:15.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:15.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:15.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:15.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:15.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:35:15.81#ibcon#first serial, iclass 19, count 0 2006.229.12:35:15.81#ibcon#enter sib2, iclass 19, count 0 2006.229.12:35:15.81#ibcon#flushed, iclass 19, count 0 2006.229.12:35:15.81#ibcon#about to write, iclass 19, count 0 2006.229.12:35:15.81#ibcon#wrote, iclass 19, count 0 2006.229.12:35:15.81#ibcon#about to read 3, iclass 19, count 0 2006.229.12:35:15.83#ibcon#read 3, iclass 19, count 0 2006.229.12:35:15.83#ibcon#about to read 4, iclass 19, count 0 2006.229.12:35:15.83#ibcon#read 4, iclass 19, count 0 2006.229.12:35:15.83#ibcon#about to read 5, iclass 19, count 0 2006.229.12:35:15.83#ibcon#read 5, iclass 19, count 0 2006.229.12:35:15.83#ibcon#about to read 6, iclass 19, count 0 2006.229.12:35:15.83#ibcon#read 6, iclass 19, count 0 2006.229.12:35:15.83#ibcon#end of sib2, iclass 19, count 0 2006.229.12:35:15.83#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:35:15.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:35:15.83#ibcon#[27=USB\r\n] 2006.229.12:35:15.83#ibcon#*before write, iclass 19, count 0 2006.229.12:35:15.83#ibcon#enter sib2, iclass 19, count 0 2006.229.12:35:15.83#ibcon#flushed, iclass 19, count 0 2006.229.12:35:15.83#ibcon#about to write, iclass 19, count 0 2006.229.12:35:15.83#ibcon#wrote, iclass 19, count 0 2006.229.12:35:15.83#ibcon#about to read 3, iclass 19, count 0 2006.229.12:35:15.86#ibcon#read 3, iclass 19, count 0 2006.229.12:35:15.86#ibcon#about to read 4, iclass 19, count 0 2006.229.12:35:15.86#ibcon#read 4, iclass 19, count 0 2006.229.12:35:15.86#ibcon#about to read 5, iclass 19, count 0 2006.229.12:35:15.86#ibcon#read 5, iclass 19, count 0 2006.229.12:35:15.86#ibcon#about to read 6, iclass 19, count 0 2006.229.12:35:15.86#ibcon#read 6, iclass 19, count 0 2006.229.12:35:15.86#ibcon#end of sib2, iclass 19, count 0 2006.229.12:35:15.86#ibcon#*after write, iclass 19, count 0 2006.229.12:35:15.86#ibcon#*before return 0, iclass 19, count 0 2006.229.12:35:15.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:15.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.12:35:15.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:35:15.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:35:15.86$vck44/vblo=4,679.99 2006.229.12:35:15.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.12:35:15.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.12:35:15.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:15.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:15.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:15.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:15.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:35:15.86#ibcon#first serial, iclass 21, count 0 2006.229.12:35:15.86#ibcon#enter sib2, iclass 21, count 0 2006.229.12:35:15.86#ibcon#flushed, iclass 21, count 0 2006.229.12:35:15.86#ibcon#about to write, iclass 21, count 0 2006.229.12:35:15.86#ibcon#wrote, iclass 21, count 0 2006.229.12:35:15.86#ibcon#about to read 3, iclass 21, count 0 2006.229.12:35:15.88#ibcon#read 3, iclass 21, count 0 2006.229.12:35:15.88#ibcon#about to read 4, iclass 21, count 0 2006.229.12:35:15.88#ibcon#read 4, iclass 21, count 0 2006.229.12:35:15.88#ibcon#about to read 5, iclass 21, count 0 2006.229.12:35:15.88#ibcon#read 5, iclass 21, count 0 2006.229.12:35:15.88#ibcon#about to read 6, iclass 21, count 0 2006.229.12:35:15.88#ibcon#read 6, iclass 21, count 0 2006.229.12:35:15.88#ibcon#end of sib2, iclass 21, count 0 2006.229.12:35:15.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:35:15.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:35:15.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:35:15.88#ibcon#*before write, iclass 21, count 0 2006.229.12:35:15.88#ibcon#enter sib2, iclass 21, count 0 2006.229.12:35:15.88#ibcon#flushed, iclass 21, count 0 2006.229.12:35:15.88#ibcon#about to write, iclass 21, count 0 2006.229.12:35:15.88#ibcon#wrote, iclass 21, count 0 2006.229.12:35:15.88#ibcon#about to read 3, iclass 21, count 0 2006.229.12:35:15.92#ibcon#read 3, iclass 21, count 0 2006.229.12:35:15.92#ibcon#about to read 4, iclass 21, count 0 2006.229.12:35:15.92#ibcon#read 4, iclass 21, count 0 2006.229.12:35:15.92#ibcon#about to read 5, iclass 21, count 0 2006.229.12:35:15.92#ibcon#read 5, iclass 21, count 0 2006.229.12:35:15.92#ibcon#about to read 6, iclass 21, count 0 2006.229.12:35:15.92#ibcon#read 6, iclass 21, count 0 2006.229.12:35:15.92#ibcon#end of sib2, iclass 21, count 0 2006.229.12:35:15.92#ibcon#*after write, iclass 21, count 0 2006.229.12:35:15.92#ibcon#*before return 0, iclass 21, count 0 2006.229.12:35:15.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:15.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.12:35:15.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:35:15.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:35:15.92$vck44/vb=4,4 2006.229.12:35:15.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.12:35:15.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.12:35:15.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:15.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:15.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:15.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:15.98#ibcon#enter wrdev, iclass 23, count 2 2006.229.12:35:15.98#ibcon#first serial, iclass 23, count 2 2006.229.12:35:15.98#ibcon#enter sib2, iclass 23, count 2 2006.229.12:35:15.98#ibcon#flushed, iclass 23, count 2 2006.229.12:35:15.98#ibcon#about to write, iclass 23, count 2 2006.229.12:35:15.98#ibcon#wrote, iclass 23, count 2 2006.229.12:35:15.98#ibcon#about to read 3, iclass 23, count 2 2006.229.12:35:16.00#ibcon#read 3, iclass 23, count 2 2006.229.12:35:16.00#ibcon#about to read 4, iclass 23, count 2 2006.229.12:35:16.00#ibcon#read 4, iclass 23, count 2 2006.229.12:35:16.00#ibcon#about to read 5, iclass 23, count 2 2006.229.12:35:16.00#ibcon#read 5, iclass 23, count 2 2006.229.12:35:16.00#ibcon#about to read 6, iclass 23, count 2 2006.229.12:35:16.00#ibcon#read 6, iclass 23, count 2 2006.229.12:35:16.00#ibcon#end of sib2, iclass 23, count 2 2006.229.12:35:16.00#ibcon#*mode == 0, iclass 23, count 2 2006.229.12:35:16.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.12:35:16.00#ibcon#[27=AT04-04\r\n] 2006.229.12:35:16.00#ibcon#*before write, iclass 23, count 2 2006.229.12:35:16.00#ibcon#enter sib2, iclass 23, count 2 2006.229.12:35:16.00#ibcon#flushed, iclass 23, count 2 2006.229.12:35:16.00#ibcon#about to write, iclass 23, count 2 2006.229.12:35:16.00#ibcon#wrote, iclass 23, count 2 2006.229.12:35:16.00#ibcon#about to read 3, iclass 23, count 2 2006.229.12:35:16.03#ibcon#read 3, iclass 23, count 2 2006.229.12:35:16.03#ibcon#about to read 4, iclass 23, count 2 2006.229.12:35:16.03#ibcon#read 4, iclass 23, count 2 2006.229.12:35:16.03#ibcon#about to read 5, iclass 23, count 2 2006.229.12:35:16.03#ibcon#read 5, iclass 23, count 2 2006.229.12:35:16.03#ibcon#about to read 6, iclass 23, count 2 2006.229.12:35:16.03#ibcon#read 6, iclass 23, count 2 2006.229.12:35:16.03#ibcon#end of sib2, iclass 23, count 2 2006.229.12:35:16.03#ibcon#*after write, iclass 23, count 2 2006.229.12:35:16.03#ibcon#*before return 0, iclass 23, count 2 2006.229.12:35:16.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:16.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.12:35:16.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.12:35:16.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:16.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:16.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:16.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:16.15#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:35:16.15#ibcon#first serial, iclass 23, count 0 2006.229.12:35:16.15#ibcon#enter sib2, iclass 23, count 0 2006.229.12:35:16.15#ibcon#flushed, iclass 23, count 0 2006.229.12:35:16.15#ibcon#about to write, iclass 23, count 0 2006.229.12:35:16.15#ibcon#wrote, iclass 23, count 0 2006.229.12:35:16.15#ibcon#about to read 3, iclass 23, count 0 2006.229.12:35:16.17#ibcon#read 3, iclass 23, count 0 2006.229.12:35:16.17#ibcon#about to read 4, iclass 23, count 0 2006.229.12:35:16.17#ibcon#read 4, iclass 23, count 0 2006.229.12:35:16.17#ibcon#about to read 5, iclass 23, count 0 2006.229.12:35:16.17#ibcon#read 5, iclass 23, count 0 2006.229.12:35:16.17#ibcon#about to read 6, iclass 23, count 0 2006.229.12:35:16.17#ibcon#read 6, iclass 23, count 0 2006.229.12:35:16.17#ibcon#end of sib2, iclass 23, count 0 2006.229.12:35:16.17#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:35:16.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:35:16.17#ibcon#[27=USB\r\n] 2006.229.12:35:16.17#ibcon#*before write, iclass 23, count 0 2006.229.12:35:16.17#ibcon#enter sib2, iclass 23, count 0 2006.229.12:35:16.17#ibcon#flushed, iclass 23, count 0 2006.229.12:35:16.17#ibcon#about to write, iclass 23, count 0 2006.229.12:35:16.17#ibcon#wrote, iclass 23, count 0 2006.229.12:35:16.17#ibcon#about to read 3, iclass 23, count 0 2006.229.12:35:16.20#ibcon#read 3, iclass 23, count 0 2006.229.12:35:16.20#ibcon#about to read 4, iclass 23, count 0 2006.229.12:35:16.20#ibcon#read 4, iclass 23, count 0 2006.229.12:35:16.20#ibcon#about to read 5, iclass 23, count 0 2006.229.12:35:16.20#ibcon#read 5, iclass 23, count 0 2006.229.12:35:16.20#ibcon#about to read 6, iclass 23, count 0 2006.229.12:35:16.20#ibcon#read 6, iclass 23, count 0 2006.229.12:35:16.20#ibcon#end of sib2, iclass 23, count 0 2006.229.12:35:16.20#ibcon#*after write, iclass 23, count 0 2006.229.12:35:16.20#ibcon#*before return 0, iclass 23, count 0 2006.229.12:35:16.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:16.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.12:35:16.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:35:16.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:35:16.20$vck44/vblo=5,709.99 2006.229.12:35:16.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.12:35:16.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.12:35:16.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:16.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:16.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:16.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:16.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:35:16.20#ibcon#first serial, iclass 25, count 0 2006.229.12:35:16.20#ibcon#enter sib2, iclass 25, count 0 2006.229.12:35:16.20#ibcon#flushed, iclass 25, count 0 2006.229.12:35:16.20#ibcon#about to write, iclass 25, count 0 2006.229.12:35:16.20#ibcon#wrote, iclass 25, count 0 2006.229.12:35:16.20#ibcon#about to read 3, iclass 25, count 0 2006.229.12:35:16.22#ibcon#read 3, iclass 25, count 0 2006.229.12:35:16.22#ibcon#about to read 4, iclass 25, count 0 2006.229.12:35:16.22#ibcon#read 4, iclass 25, count 0 2006.229.12:35:16.22#ibcon#about to read 5, iclass 25, count 0 2006.229.12:35:16.22#ibcon#read 5, iclass 25, count 0 2006.229.12:35:16.22#ibcon#about to read 6, iclass 25, count 0 2006.229.12:35:16.22#ibcon#read 6, iclass 25, count 0 2006.229.12:35:16.22#ibcon#end of sib2, iclass 25, count 0 2006.229.12:35:16.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:35:16.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:35:16.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:35:16.22#ibcon#*before write, iclass 25, count 0 2006.229.12:35:16.22#ibcon#enter sib2, iclass 25, count 0 2006.229.12:35:16.22#ibcon#flushed, iclass 25, count 0 2006.229.12:35:16.22#ibcon#about to write, iclass 25, count 0 2006.229.12:35:16.22#ibcon#wrote, iclass 25, count 0 2006.229.12:35:16.22#ibcon#about to read 3, iclass 25, count 0 2006.229.12:35:16.26#ibcon#read 3, iclass 25, count 0 2006.229.12:35:16.26#ibcon#about to read 4, iclass 25, count 0 2006.229.12:35:16.26#ibcon#read 4, iclass 25, count 0 2006.229.12:35:16.26#ibcon#about to read 5, iclass 25, count 0 2006.229.12:35:16.26#ibcon#read 5, iclass 25, count 0 2006.229.12:35:16.26#ibcon#about to read 6, iclass 25, count 0 2006.229.12:35:16.26#ibcon#read 6, iclass 25, count 0 2006.229.12:35:16.26#ibcon#end of sib2, iclass 25, count 0 2006.229.12:35:16.26#ibcon#*after write, iclass 25, count 0 2006.229.12:35:16.26#ibcon#*before return 0, iclass 25, count 0 2006.229.12:35:16.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:16.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.12:35:16.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:35:16.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:35:16.26$vck44/vb=5,4 2006.229.12:35:16.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.12:35:16.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.12:35:16.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:16.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:16.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:16.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:16.32#ibcon#enter wrdev, iclass 27, count 2 2006.229.12:35:16.32#ibcon#first serial, iclass 27, count 2 2006.229.12:35:16.32#ibcon#enter sib2, iclass 27, count 2 2006.229.12:35:16.32#ibcon#flushed, iclass 27, count 2 2006.229.12:35:16.32#ibcon#about to write, iclass 27, count 2 2006.229.12:35:16.32#ibcon#wrote, iclass 27, count 2 2006.229.12:35:16.32#ibcon#about to read 3, iclass 27, count 2 2006.229.12:35:16.34#ibcon#read 3, iclass 27, count 2 2006.229.12:35:16.34#ibcon#about to read 4, iclass 27, count 2 2006.229.12:35:16.34#ibcon#read 4, iclass 27, count 2 2006.229.12:35:16.34#ibcon#about to read 5, iclass 27, count 2 2006.229.12:35:16.34#ibcon#read 5, iclass 27, count 2 2006.229.12:35:16.34#ibcon#about to read 6, iclass 27, count 2 2006.229.12:35:16.34#ibcon#read 6, iclass 27, count 2 2006.229.12:35:16.34#ibcon#end of sib2, iclass 27, count 2 2006.229.12:35:16.34#ibcon#*mode == 0, iclass 27, count 2 2006.229.12:35:16.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.12:35:16.34#ibcon#[27=AT05-04\r\n] 2006.229.12:35:16.34#ibcon#*before write, iclass 27, count 2 2006.229.12:35:16.34#ibcon#enter sib2, iclass 27, count 2 2006.229.12:35:16.34#ibcon#flushed, iclass 27, count 2 2006.229.12:35:16.34#ibcon#about to write, iclass 27, count 2 2006.229.12:35:16.34#ibcon#wrote, iclass 27, count 2 2006.229.12:35:16.34#ibcon#about to read 3, iclass 27, count 2 2006.229.12:35:16.37#ibcon#read 3, iclass 27, count 2 2006.229.12:35:16.37#ibcon#about to read 4, iclass 27, count 2 2006.229.12:35:16.37#ibcon#read 4, iclass 27, count 2 2006.229.12:35:16.37#ibcon#about to read 5, iclass 27, count 2 2006.229.12:35:16.37#ibcon#read 5, iclass 27, count 2 2006.229.12:35:16.37#ibcon#about to read 6, iclass 27, count 2 2006.229.12:35:16.37#ibcon#read 6, iclass 27, count 2 2006.229.12:35:16.37#ibcon#end of sib2, iclass 27, count 2 2006.229.12:35:16.37#ibcon#*after write, iclass 27, count 2 2006.229.12:35:16.37#ibcon#*before return 0, iclass 27, count 2 2006.229.12:35:16.37#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:16.37#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.12:35:16.37#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.12:35:16.37#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:16.37#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:16.49#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:16.49#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:16.49#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:35:16.49#ibcon#first serial, iclass 27, count 0 2006.229.12:35:16.49#ibcon#enter sib2, iclass 27, count 0 2006.229.12:35:16.49#ibcon#flushed, iclass 27, count 0 2006.229.12:35:16.49#ibcon#about to write, iclass 27, count 0 2006.229.12:35:16.49#ibcon#wrote, iclass 27, count 0 2006.229.12:35:16.49#ibcon#about to read 3, iclass 27, count 0 2006.229.12:35:16.51#ibcon#read 3, iclass 27, count 0 2006.229.12:35:16.51#ibcon#about to read 4, iclass 27, count 0 2006.229.12:35:16.51#ibcon#read 4, iclass 27, count 0 2006.229.12:35:16.51#ibcon#about to read 5, iclass 27, count 0 2006.229.12:35:16.51#ibcon#read 5, iclass 27, count 0 2006.229.12:35:16.51#ibcon#about to read 6, iclass 27, count 0 2006.229.12:35:16.51#ibcon#read 6, iclass 27, count 0 2006.229.12:35:16.51#ibcon#end of sib2, iclass 27, count 0 2006.229.12:35:16.51#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:35:16.51#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:35:16.51#ibcon#[27=USB\r\n] 2006.229.12:35:16.51#ibcon#*before write, iclass 27, count 0 2006.229.12:35:16.51#ibcon#enter sib2, iclass 27, count 0 2006.229.12:35:16.51#ibcon#flushed, iclass 27, count 0 2006.229.12:35:16.51#ibcon#about to write, iclass 27, count 0 2006.229.12:35:16.51#ibcon#wrote, iclass 27, count 0 2006.229.12:35:16.51#ibcon#about to read 3, iclass 27, count 0 2006.229.12:35:16.54#ibcon#read 3, iclass 27, count 0 2006.229.12:35:16.54#ibcon#about to read 4, iclass 27, count 0 2006.229.12:35:16.54#ibcon#read 4, iclass 27, count 0 2006.229.12:35:16.54#ibcon#about to read 5, iclass 27, count 0 2006.229.12:35:16.54#ibcon#read 5, iclass 27, count 0 2006.229.12:35:16.54#ibcon#about to read 6, iclass 27, count 0 2006.229.12:35:16.54#ibcon#read 6, iclass 27, count 0 2006.229.12:35:16.54#ibcon#end of sib2, iclass 27, count 0 2006.229.12:35:16.54#ibcon#*after write, iclass 27, count 0 2006.229.12:35:16.54#ibcon#*before return 0, iclass 27, count 0 2006.229.12:35:16.54#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:16.54#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.12:35:16.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:35:16.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:35:16.54$vck44/vblo=6,719.99 2006.229.12:35:16.54#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.12:35:16.54#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.12:35:16.54#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:16.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:16.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:16.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:16.54#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:35:16.54#ibcon#first serial, iclass 29, count 0 2006.229.12:35:16.54#ibcon#enter sib2, iclass 29, count 0 2006.229.12:35:16.54#ibcon#flushed, iclass 29, count 0 2006.229.12:35:16.54#ibcon#about to write, iclass 29, count 0 2006.229.12:35:16.54#ibcon#wrote, iclass 29, count 0 2006.229.12:35:16.54#ibcon#about to read 3, iclass 29, count 0 2006.229.12:35:16.56#ibcon#read 3, iclass 29, count 0 2006.229.12:35:16.56#ibcon#about to read 4, iclass 29, count 0 2006.229.12:35:16.56#ibcon#read 4, iclass 29, count 0 2006.229.12:35:16.56#ibcon#about to read 5, iclass 29, count 0 2006.229.12:35:16.56#ibcon#read 5, iclass 29, count 0 2006.229.12:35:16.56#ibcon#about to read 6, iclass 29, count 0 2006.229.12:35:16.56#ibcon#read 6, iclass 29, count 0 2006.229.12:35:16.56#ibcon#end of sib2, iclass 29, count 0 2006.229.12:35:16.56#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:35:16.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:35:16.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:35:16.56#ibcon#*before write, iclass 29, count 0 2006.229.12:35:16.56#ibcon#enter sib2, iclass 29, count 0 2006.229.12:35:16.56#ibcon#flushed, iclass 29, count 0 2006.229.12:35:16.56#ibcon#about to write, iclass 29, count 0 2006.229.12:35:16.56#ibcon#wrote, iclass 29, count 0 2006.229.12:35:16.56#ibcon#about to read 3, iclass 29, count 0 2006.229.12:35:16.60#ibcon#read 3, iclass 29, count 0 2006.229.12:35:16.60#ibcon#about to read 4, iclass 29, count 0 2006.229.12:35:16.60#ibcon#read 4, iclass 29, count 0 2006.229.12:35:16.60#ibcon#about to read 5, iclass 29, count 0 2006.229.12:35:16.60#ibcon#read 5, iclass 29, count 0 2006.229.12:35:16.60#ibcon#about to read 6, iclass 29, count 0 2006.229.12:35:16.60#ibcon#read 6, iclass 29, count 0 2006.229.12:35:16.60#ibcon#end of sib2, iclass 29, count 0 2006.229.12:35:16.60#ibcon#*after write, iclass 29, count 0 2006.229.12:35:16.60#ibcon#*before return 0, iclass 29, count 0 2006.229.12:35:16.60#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:16.60#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.12:35:16.60#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:35:16.60#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:35:16.60$vck44/vb=6,4 2006.229.12:35:16.60#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.12:35:16.60#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.12:35:16.60#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:16.60#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:16.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:16.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:16.66#ibcon#enter wrdev, iclass 31, count 2 2006.229.12:35:16.66#ibcon#first serial, iclass 31, count 2 2006.229.12:35:16.66#ibcon#enter sib2, iclass 31, count 2 2006.229.12:35:16.66#ibcon#flushed, iclass 31, count 2 2006.229.12:35:16.66#ibcon#about to write, iclass 31, count 2 2006.229.12:35:16.66#ibcon#wrote, iclass 31, count 2 2006.229.12:35:16.66#ibcon#about to read 3, iclass 31, count 2 2006.229.12:35:16.68#ibcon#read 3, iclass 31, count 2 2006.229.12:35:16.68#ibcon#about to read 4, iclass 31, count 2 2006.229.12:35:16.68#ibcon#read 4, iclass 31, count 2 2006.229.12:35:16.68#ibcon#about to read 5, iclass 31, count 2 2006.229.12:35:16.68#ibcon#read 5, iclass 31, count 2 2006.229.12:35:16.68#ibcon#about to read 6, iclass 31, count 2 2006.229.12:35:16.68#ibcon#read 6, iclass 31, count 2 2006.229.12:35:16.68#ibcon#end of sib2, iclass 31, count 2 2006.229.12:35:16.68#ibcon#*mode == 0, iclass 31, count 2 2006.229.12:35:16.68#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.12:35:16.68#ibcon#[27=AT06-04\r\n] 2006.229.12:35:16.68#ibcon#*before write, iclass 31, count 2 2006.229.12:35:16.68#ibcon#enter sib2, iclass 31, count 2 2006.229.12:35:16.68#ibcon#flushed, iclass 31, count 2 2006.229.12:35:16.68#ibcon#about to write, iclass 31, count 2 2006.229.12:35:16.68#ibcon#wrote, iclass 31, count 2 2006.229.12:35:16.68#ibcon#about to read 3, iclass 31, count 2 2006.229.12:35:16.71#ibcon#read 3, iclass 31, count 2 2006.229.12:35:16.71#ibcon#about to read 4, iclass 31, count 2 2006.229.12:35:16.71#ibcon#read 4, iclass 31, count 2 2006.229.12:35:16.71#ibcon#about to read 5, iclass 31, count 2 2006.229.12:35:16.71#ibcon#read 5, iclass 31, count 2 2006.229.12:35:16.71#ibcon#about to read 6, iclass 31, count 2 2006.229.12:35:16.71#ibcon#read 6, iclass 31, count 2 2006.229.12:35:16.71#ibcon#end of sib2, iclass 31, count 2 2006.229.12:35:16.71#ibcon#*after write, iclass 31, count 2 2006.229.12:35:16.71#ibcon#*before return 0, iclass 31, count 2 2006.229.12:35:16.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:16.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.12:35:16.71#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.12:35:16.71#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:16.71#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:16.83#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:16.83#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:16.83#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:35:16.83#ibcon#first serial, iclass 31, count 0 2006.229.12:35:16.83#ibcon#enter sib2, iclass 31, count 0 2006.229.12:35:16.83#ibcon#flushed, iclass 31, count 0 2006.229.12:35:16.83#ibcon#about to write, iclass 31, count 0 2006.229.12:35:16.83#ibcon#wrote, iclass 31, count 0 2006.229.12:35:16.83#ibcon#about to read 3, iclass 31, count 0 2006.229.12:35:16.85#ibcon#read 3, iclass 31, count 0 2006.229.12:35:16.85#ibcon#about to read 4, iclass 31, count 0 2006.229.12:35:16.85#ibcon#read 4, iclass 31, count 0 2006.229.12:35:16.85#ibcon#about to read 5, iclass 31, count 0 2006.229.12:35:16.85#ibcon#read 5, iclass 31, count 0 2006.229.12:35:16.85#ibcon#about to read 6, iclass 31, count 0 2006.229.12:35:16.85#ibcon#read 6, iclass 31, count 0 2006.229.12:35:16.85#ibcon#end of sib2, iclass 31, count 0 2006.229.12:35:16.85#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:35:16.85#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:35:16.85#ibcon#[27=USB\r\n] 2006.229.12:35:16.85#ibcon#*before write, iclass 31, count 0 2006.229.12:35:16.85#ibcon#enter sib2, iclass 31, count 0 2006.229.12:35:16.85#ibcon#flushed, iclass 31, count 0 2006.229.12:35:16.85#ibcon#about to write, iclass 31, count 0 2006.229.12:35:16.85#ibcon#wrote, iclass 31, count 0 2006.229.12:35:16.85#ibcon#about to read 3, iclass 31, count 0 2006.229.12:35:16.86#abcon#<5=/03 2.0 3.4 27.661001002.3\r\n> 2006.229.12:35:16.88#abcon#{5=INTERFACE CLEAR} 2006.229.12:35:16.88#ibcon#read 3, iclass 31, count 0 2006.229.12:35:16.88#ibcon#about to read 4, iclass 31, count 0 2006.229.12:35:16.88#ibcon#read 4, iclass 31, count 0 2006.229.12:35:16.88#ibcon#about to read 5, iclass 31, count 0 2006.229.12:35:16.88#ibcon#read 5, iclass 31, count 0 2006.229.12:35:16.88#ibcon#about to read 6, iclass 31, count 0 2006.229.12:35:16.88#ibcon#read 6, iclass 31, count 0 2006.229.12:35:16.88#ibcon#end of sib2, iclass 31, count 0 2006.229.12:35:16.88#ibcon#*after write, iclass 31, count 0 2006.229.12:35:16.88#ibcon#*before return 0, iclass 31, count 0 2006.229.12:35:16.88#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:16.88#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.12:35:16.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:35:16.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:35:16.88$vck44/vblo=7,734.99 2006.229.12:35:16.88#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:35:16.88#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:35:16.88#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:16.88#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:35:16.88#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:35:16.88#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:35:16.88#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:35:16.88#ibcon#first serial, iclass 36, count 0 2006.229.12:35:16.88#ibcon#enter sib2, iclass 36, count 0 2006.229.12:35:16.88#ibcon#flushed, iclass 36, count 0 2006.229.12:35:16.88#ibcon#about to write, iclass 36, count 0 2006.229.12:35:16.88#ibcon#wrote, iclass 36, count 0 2006.229.12:35:16.88#ibcon#about to read 3, iclass 36, count 0 2006.229.12:35:16.90#ibcon#read 3, iclass 36, count 0 2006.229.12:35:16.90#ibcon#about to read 4, iclass 36, count 0 2006.229.12:35:16.90#ibcon#read 4, iclass 36, count 0 2006.229.12:35:16.90#ibcon#about to read 5, iclass 36, count 0 2006.229.12:35:16.90#ibcon#read 5, iclass 36, count 0 2006.229.12:35:16.90#ibcon#about to read 6, iclass 36, count 0 2006.229.12:35:16.90#ibcon#read 6, iclass 36, count 0 2006.229.12:35:16.90#ibcon#end of sib2, iclass 36, count 0 2006.229.12:35:16.90#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:35:16.90#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:35:16.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:35:16.90#ibcon#*before write, iclass 36, count 0 2006.229.12:35:16.90#ibcon#enter sib2, iclass 36, count 0 2006.229.12:35:16.90#ibcon#flushed, iclass 36, count 0 2006.229.12:35:16.90#ibcon#about to write, iclass 36, count 0 2006.229.12:35:16.90#ibcon#wrote, iclass 36, count 0 2006.229.12:35:16.90#ibcon#about to read 3, iclass 36, count 0 2006.229.12:35:16.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:35:16.94#ibcon#read 3, iclass 36, count 0 2006.229.12:35:16.94#ibcon#about to read 4, iclass 36, count 0 2006.229.12:35:16.94#ibcon#read 4, iclass 36, count 0 2006.229.12:35:16.94#ibcon#about to read 5, iclass 36, count 0 2006.229.12:35:16.94#ibcon#read 5, iclass 36, count 0 2006.229.12:35:16.94#ibcon#about to read 6, iclass 36, count 0 2006.229.12:35:16.94#ibcon#read 6, iclass 36, count 0 2006.229.12:35:16.94#ibcon#end of sib2, iclass 36, count 0 2006.229.12:35:16.94#ibcon#*after write, iclass 36, count 0 2006.229.12:35:16.94#ibcon#*before return 0, iclass 36, count 0 2006.229.12:35:16.94#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:35:16.94#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:35:16.94#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:35:16.94#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:35:16.94$vck44/vb=7,4 2006.229.12:35:16.94#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.12:35:16.94#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.12:35:16.94#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:16.94#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:17.00#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:17.00#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:17.00#ibcon#enter wrdev, iclass 39, count 2 2006.229.12:35:17.00#ibcon#first serial, iclass 39, count 2 2006.229.12:35:17.00#ibcon#enter sib2, iclass 39, count 2 2006.229.12:35:17.00#ibcon#flushed, iclass 39, count 2 2006.229.12:35:17.00#ibcon#about to write, iclass 39, count 2 2006.229.12:35:17.00#ibcon#wrote, iclass 39, count 2 2006.229.12:35:17.00#ibcon#about to read 3, iclass 39, count 2 2006.229.12:35:17.02#ibcon#read 3, iclass 39, count 2 2006.229.12:35:17.02#ibcon#about to read 4, iclass 39, count 2 2006.229.12:35:17.02#ibcon#read 4, iclass 39, count 2 2006.229.12:35:17.02#ibcon#about to read 5, iclass 39, count 2 2006.229.12:35:17.02#ibcon#read 5, iclass 39, count 2 2006.229.12:35:17.02#ibcon#about to read 6, iclass 39, count 2 2006.229.12:35:17.02#ibcon#read 6, iclass 39, count 2 2006.229.12:35:17.02#ibcon#end of sib2, iclass 39, count 2 2006.229.12:35:17.02#ibcon#*mode == 0, iclass 39, count 2 2006.229.12:35:17.02#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.12:35:17.02#ibcon#[27=AT07-04\r\n] 2006.229.12:35:17.02#ibcon#*before write, iclass 39, count 2 2006.229.12:35:17.02#ibcon#enter sib2, iclass 39, count 2 2006.229.12:35:17.02#ibcon#flushed, iclass 39, count 2 2006.229.12:35:17.02#ibcon#about to write, iclass 39, count 2 2006.229.12:35:17.02#ibcon#wrote, iclass 39, count 2 2006.229.12:35:17.02#ibcon#about to read 3, iclass 39, count 2 2006.229.12:35:17.05#ibcon#read 3, iclass 39, count 2 2006.229.12:35:17.05#ibcon#about to read 4, iclass 39, count 2 2006.229.12:35:17.05#ibcon#read 4, iclass 39, count 2 2006.229.12:35:17.05#ibcon#about to read 5, iclass 39, count 2 2006.229.12:35:17.05#ibcon#read 5, iclass 39, count 2 2006.229.12:35:17.05#ibcon#about to read 6, iclass 39, count 2 2006.229.12:35:17.05#ibcon#read 6, iclass 39, count 2 2006.229.12:35:17.05#ibcon#end of sib2, iclass 39, count 2 2006.229.12:35:17.05#ibcon#*after write, iclass 39, count 2 2006.229.12:35:17.05#ibcon#*before return 0, iclass 39, count 2 2006.229.12:35:17.05#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:17.05#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.12:35:17.05#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.12:35:17.05#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:17.05#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:17.17#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:17.17#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:17.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:35:17.17#ibcon#first serial, iclass 39, count 0 2006.229.12:35:17.17#ibcon#enter sib2, iclass 39, count 0 2006.229.12:35:17.17#ibcon#flushed, iclass 39, count 0 2006.229.12:35:17.17#ibcon#about to write, iclass 39, count 0 2006.229.12:35:17.17#ibcon#wrote, iclass 39, count 0 2006.229.12:35:17.17#ibcon#about to read 3, iclass 39, count 0 2006.229.12:35:17.19#ibcon#read 3, iclass 39, count 0 2006.229.12:35:17.19#ibcon#about to read 4, iclass 39, count 0 2006.229.12:35:17.19#ibcon#read 4, iclass 39, count 0 2006.229.12:35:17.19#ibcon#about to read 5, iclass 39, count 0 2006.229.12:35:17.19#ibcon#read 5, iclass 39, count 0 2006.229.12:35:17.19#ibcon#about to read 6, iclass 39, count 0 2006.229.12:35:17.19#ibcon#read 6, iclass 39, count 0 2006.229.12:35:17.19#ibcon#end of sib2, iclass 39, count 0 2006.229.12:35:17.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:35:17.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:35:17.19#ibcon#[27=USB\r\n] 2006.229.12:35:17.19#ibcon#*before write, iclass 39, count 0 2006.229.12:35:17.19#ibcon#enter sib2, iclass 39, count 0 2006.229.12:35:17.19#ibcon#flushed, iclass 39, count 0 2006.229.12:35:17.19#ibcon#about to write, iclass 39, count 0 2006.229.12:35:17.19#ibcon#wrote, iclass 39, count 0 2006.229.12:35:17.19#ibcon#about to read 3, iclass 39, count 0 2006.229.12:35:17.22#ibcon#read 3, iclass 39, count 0 2006.229.12:35:17.22#ibcon#about to read 4, iclass 39, count 0 2006.229.12:35:17.22#ibcon#read 4, iclass 39, count 0 2006.229.12:35:17.22#ibcon#about to read 5, iclass 39, count 0 2006.229.12:35:17.22#ibcon#read 5, iclass 39, count 0 2006.229.12:35:17.22#ibcon#about to read 6, iclass 39, count 0 2006.229.12:35:17.22#ibcon#read 6, iclass 39, count 0 2006.229.12:35:17.22#ibcon#end of sib2, iclass 39, count 0 2006.229.12:35:17.22#ibcon#*after write, iclass 39, count 0 2006.229.12:35:17.22#ibcon#*before return 0, iclass 39, count 0 2006.229.12:35:17.22#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:17.22#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.12:35:17.22#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:35:17.22#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:35:17.22$vck44/vblo=8,744.99 2006.229.12:35:17.22#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.12:35:17.22#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.12:35:17.22#ibcon#ireg 17 cls_cnt 0 2006.229.12:35:17.22#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:17.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:17.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:17.22#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:35:17.22#ibcon#first serial, iclass 3, count 0 2006.229.12:35:17.22#ibcon#enter sib2, iclass 3, count 0 2006.229.12:35:17.22#ibcon#flushed, iclass 3, count 0 2006.229.12:35:17.22#ibcon#about to write, iclass 3, count 0 2006.229.12:35:17.22#ibcon#wrote, iclass 3, count 0 2006.229.12:35:17.22#ibcon#about to read 3, iclass 3, count 0 2006.229.12:35:17.24#ibcon#read 3, iclass 3, count 0 2006.229.12:35:17.24#ibcon#about to read 4, iclass 3, count 0 2006.229.12:35:17.24#ibcon#read 4, iclass 3, count 0 2006.229.12:35:17.24#ibcon#about to read 5, iclass 3, count 0 2006.229.12:35:17.24#ibcon#read 5, iclass 3, count 0 2006.229.12:35:17.24#ibcon#about to read 6, iclass 3, count 0 2006.229.12:35:17.24#ibcon#read 6, iclass 3, count 0 2006.229.12:35:17.24#ibcon#end of sib2, iclass 3, count 0 2006.229.12:35:17.24#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:35:17.24#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:35:17.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:35:17.24#ibcon#*before write, iclass 3, count 0 2006.229.12:35:17.24#ibcon#enter sib2, iclass 3, count 0 2006.229.12:35:17.24#ibcon#flushed, iclass 3, count 0 2006.229.12:35:17.24#ibcon#about to write, iclass 3, count 0 2006.229.12:35:17.24#ibcon#wrote, iclass 3, count 0 2006.229.12:35:17.24#ibcon#about to read 3, iclass 3, count 0 2006.229.12:35:17.28#ibcon#read 3, iclass 3, count 0 2006.229.12:35:17.28#ibcon#about to read 4, iclass 3, count 0 2006.229.12:35:17.28#ibcon#read 4, iclass 3, count 0 2006.229.12:35:17.28#ibcon#about to read 5, iclass 3, count 0 2006.229.12:35:17.28#ibcon#read 5, iclass 3, count 0 2006.229.12:35:17.28#ibcon#about to read 6, iclass 3, count 0 2006.229.12:35:17.28#ibcon#read 6, iclass 3, count 0 2006.229.12:35:17.28#ibcon#end of sib2, iclass 3, count 0 2006.229.12:35:17.28#ibcon#*after write, iclass 3, count 0 2006.229.12:35:17.28#ibcon#*before return 0, iclass 3, count 0 2006.229.12:35:17.28#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:17.28#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.12:35:17.28#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:35:17.28#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:35:17.28$vck44/vb=8,4 2006.229.12:35:17.28#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.12:35:17.28#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.12:35:17.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:35:17.28#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:17.34#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:17.34#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:17.34#ibcon#enter wrdev, iclass 5, count 2 2006.229.12:35:17.34#ibcon#first serial, iclass 5, count 2 2006.229.12:35:17.34#ibcon#enter sib2, iclass 5, count 2 2006.229.12:35:17.34#ibcon#flushed, iclass 5, count 2 2006.229.12:35:17.34#ibcon#about to write, iclass 5, count 2 2006.229.12:35:17.34#ibcon#wrote, iclass 5, count 2 2006.229.12:35:17.34#ibcon#about to read 3, iclass 5, count 2 2006.229.12:35:17.36#ibcon#read 3, iclass 5, count 2 2006.229.12:35:17.36#ibcon#about to read 4, iclass 5, count 2 2006.229.12:35:17.36#ibcon#read 4, iclass 5, count 2 2006.229.12:35:17.36#ibcon#about to read 5, iclass 5, count 2 2006.229.12:35:17.36#ibcon#read 5, iclass 5, count 2 2006.229.12:35:17.36#ibcon#about to read 6, iclass 5, count 2 2006.229.12:35:17.36#ibcon#read 6, iclass 5, count 2 2006.229.12:35:17.36#ibcon#end of sib2, iclass 5, count 2 2006.229.12:35:17.36#ibcon#*mode == 0, iclass 5, count 2 2006.229.12:35:17.36#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.12:35:17.36#ibcon#[27=AT08-04\r\n] 2006.229.12:35:17.36#ibcon#*before write, iclass 5, count 2 2006.229.12:35:17.36#ibcon#enter sib2, iclass 5, count 2 2006.229.12:35:17.36#ibcon#flushed, iclass 5, count 2 2006.229.12:35:17.36#ibcon#about to write, iclass 5, count 2 2006.229.12:35:17.36#ibcon#wrote, iclass 5, count 2 2006.229.12:35:17.36#ibcon#about to read 3, iclass 5, count 2 2006.229.12:35:17.39#ibcon#read 3, iclass 5, count 2 2006.229.12:35:17.39#ibcon#about to read 4, iclass 5, count 2 2006.229.12:35:17.39#ibcon#read 4, iclass 5, count 2 2006.229.12:35:17.39#ibcon#about to read 5, iclass 5, count 2 2006.229.12:35:17.39#ibcon#read 5, iclass 5, count 2 2006.229.12:35:17.39#ibcon#about to read 6, iclass 5, count 2 2006.229.12:35:17.39#ibcon#read 6, iclass 5, count 2 2006.229.12:35:17.39#ibcon#end of sib2, iclass 5, count 2 2006.229.12:35:17.39#ibcon#*after write, iclass 5, count 2 2006.229.12:35:17.39#ibcon#*before return 0, iclass 5, count 2 2006.229.12:35:17.39#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:17.39#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.12:35:17.39#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.12:35:17.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:35:17.39#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:17.51#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:17.51#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:17.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:35:17.51#ibcon#first serial, iclass 5, count 0 2006.229.12:35:17.51#ibcon#enter sib2, iclass 5, count 0 2006.229.12:35:17.51#ibcon#flushed, iclass 5, count 0 2006.229.12:35:17.51#ibcon#about to write, iclass 5, count 0 2006.229.12:35:17.51#ibcon#wrote, iclass 5, count 0 2006.229.12:35:17.51#ibcon#about to read 3, iclass 5, count 0 2006.229.12:35:17.53#ibcon#read 3, iclass 5, count 0 2006.229.12:35:17.53#ibcon#about to read 4, iclass 5, count 0 2006.229.12:35:17.53#ibcon#read 4, iclass 5, count 0 2006.229.12:35:17.53#ibcon#about to read 5, iclass 5, count 0 2006.229.12:35:17.53#ibcon#read 5, iclass 5, count 0 2006.229.12:35:17.53#ibcon#about to read 6, iclass 5, count 0 2006.229.12:35:17.53#ibcon#read 6, iclass 5, count 0 2006.229.12:35:17.53#ibcon#end of sib2, iclass 5, count 0 2006.229.12:35:17.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:35:17.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:35:17.53#ibcon#[27=USB\r\n] 2006.229.12:35:17.53#ibcon#*before write, iclass 5, count 0 2006.229.12:35:17.53#ibcon#enter sib2, iclass 5, count 0 2006.229.12:35:17.53#ibcon#flushed, iclass 5, count 0 2006.229.12:35:17.53#ibcon#about to write, iclass 5, count 0 2006.229.12:35:17.53#ibcon#wrote, iclass 5, count 0 2006.229.12:35:17.53#ibcon#about to read 3, iclass 5, count 0 2006.229.12:35:17.56#ibcon#read 3, iclass 5, count 0 2006.229.12:35:17.56#ibcon#about to read 4, iclass 5, count 0 2006.229.12:35:17.56#ibcon#read 4, iclass 5, count 0 2006.229.12:35:17.56#ibcon#about to read 5, iclass 5, count 0 2006.229.12:35:17.56#ibcon#read 5, iclass 5, count 0 2006.229.12:35:17.56#ibcon#about to read 6, iclass 5, count 0 2006.229.12:35:17.56#ibcon#read 6, iclass 5, count 0 2006.229.12:35:17.56#ibcon#end of sib2, iclass 5, count 0 2006.229.12:35:17.56#ibcon#*after write, iclass 5, count 0 2006.229.12:35:17.56#ibcon#*before return 0, iclass 5, count 0 2006.229.12:35:17.56#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:17.56#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.12:35:17.56#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:35:17.56#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:35:17.56$vck44/vabw=wide 2006.229.12:35:17.56#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.12:35:17.56#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.12:35:17.56#ibcon#ireg 8 cls_cnt 0 2006.229.12:35:17.56#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:17.56#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:17.56#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:17.56#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:35:17.56#ibcon#first serial, iclass 7, count 0 2006.229.12:35:17.56#ibcon#enter sib2, iclass 7, count 0 2006.229.12:35:17.56#ibcon#flushed, iclass 7, count 0 2006.229.12:35:17.56#ibcon#about to write, iclass 7, count 0 2006.229.12:35:17.56#ibcon#wrote, iclass 7, count 0 2006.229.12:35:17.56#ibcon#about to read 3, iclass 7, count 0 2006.229.12:35:17.58#ibcon#read 3, iclass 7, count 0 2006.229.12:35:17.58#ibcon#about to read 4, iclass 7, count 0 2006.229.12:35:17.58#ibcon#read 4, iclass 7, count 0 2006.229.12:35:17.58#ibcon#about to read 5, iclass 7, count 0 2006.229.12:35:17.58#ibcon#read 5, iclass 7, count 0 2006.229.12:35:17.58#ibcon#about to read 6, iclass 7, count 0 2006.229.12:35:17.58#ibcon#read 6, iclass 7, count 0 2006.229.12:35:17.58#ibcon#end of sib2, iclass 7, count 0 2006.229.12:35:17.58#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:35:17.58#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:35:17.58#ibcon#[25=BW32\r\n] 2006.229.12:35:17.58#ibcon#*before write, iclass 7, count 0 2006.229.12:35:17.58#ibcon#enter sib2, iclass 7, count 0 2006.229.12:35:17.58#ibcon#flushed, iclass 7, count 0 2006.229.12:35:17.58#ibcon#about to write, iclass 7, count 0 2006.229.12:35:17.58#ibcon#wrote, iclass 7, count 0 2006.229.12:35:17.58#ibcon#about to read 3, iclass 7, count 0 2006.229.12:35:17.61#ibcon#read 3, iclass 7, count 0 2006.229.12:35:17.61#ibcon#about to read 4, iclass 7, count 0 2006.229.12:35:17.61#ibcon#read 4, iclass 7, count 0 2006.229.12:35:17.61#ibcon#about to read 5, iclass 7, count 0 2006.229.12:35:17.61#ibcon#read 5, iclass 7, count 0 2006.229.12:35:17.61#ibcon#about to read 6, iclass 7, count 0 2006.229.12:35:17.61#ibcon#read 6, iclass 7, count 0 2006.229.12:35:17.61#ibcon#end of sib2, iclass 7, count 0 2006.229.12:35:17.61#ibcon#*after write, iclass 7, count 0 2006.229.12:35:17.61#ibcon#*before return 0, iclass 7, count 0 2006.229.12:35:17.61#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:17.61#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.12:35:17.61#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:35:17.61#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:35:17.61$vck44/vbbw=wide 2006.229.12:35:17.61#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:35:17.61#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:35:17.61#ibcon#ireg 8 cls_cnt 0 2006.229.12:35:17.61#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:35:17.68#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:35:17.68#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:35:17.68#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:35:17.68#ibcon#first serial, iclass 11, count 0 2006.229.12:35:17.68#ibcon#enter sib2, iclass 11, count 0 2006.229.12:35:17.68#ibcon#flushed, iclass 11, count 0 2006.229.12:35:17.68#ibcon#about to write, iclass 11, count 0 2006.229.12:35:17.68#ibcon#wrote, iclass 11, count 0 2006.229.12:35:17.68#ibcon#about to read 3, iclass 11, count 0 2006.229.12:35:17.70#ibcon#read 3, iclass 11, count 0 2006.229.12:35:17.70#ibcon#about to read 4, iclass 11, count 0 2006.229.12:35:17.70#ibcon#read 4, iclass 11, count 0 2006.229.12:35:17.70#ibcon#about to read 5, iclass 11, count 0 2006.229.12:35:17.70#ibcon#read 5, iclass 11, count 0 2006.229.12:35:17.70#ibcon#about to read 6, iclass 11, count 0 2006.229.12:35:17.70#ibcon#read 6, iclass 11, count 0 2006.229.12:35:17.70#ibcon#end of sib2, iclass 11, count 0 2006.229.12:35:17.70#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:35:17.70#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:35:17.70#ibcon#[27=BW32\r\n] 2006.229.12:35:17.70#ibcon#*before write, iclass 11, count 0 2006.229.12:35:17.70#ibcon#enter sib2, iclass 11, count 0 2006.229.12:35:17.70#ibcon#flushed, iclass 11, count 0 2006.229.12:35:17.70#ibcon#about to write, iclass 11, count 0 2006.229.12:35:17.70#ibcon#wrote, iclass 11, count 0 2006.229.12:35:17.70#ibcon#about to read 3, iclass 11, count 0 2006.229.12:35:17.73#ibcon#read 3, iclass 11, count 0 2006.229.12:35:17.73#ibcon#about to read 4, iclass 11, count 0 2006.229.12:35:17.73#ibcon#read 4, iclass 11, count 0 2006.229.12:35:17.73#ibcon#about to read 5, iclass 11, count 0 2006.229.12:35:17.73#ibcon#read 5, iclass 11, count 0 2006.229.12:35:17.73#ibcon#about to read 6, iclass 11, count 0 2006.229.12:35:17.73#ibcon#read 6, iclass 11, count 0 2006.229.12:35:17.73#ibcon#end of sib2, iclass 11, count 0 2006.229.12:35:17.73#ibcon#*after write, iclass 11, count 0 2006.229.12:35:17.73#ibcon#*before return 0, iclass 11, count 0 2006.229.12:35:17.73#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:35:17.73#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:35:17.73#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:35:17.73#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:35:17.73$setupk4/ifdk4 2006.229.12:35:17.73$ifdk4/lo= 2006.229.12:35:17.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:35:17.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:35:17.73$ifdk4/patch= 2006.229.12:35:17.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:35:17.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:35:17.73$setupk4/!*+20s 2006.229.12:35:27.03#abcon#<5=/03 2.0 3.4 27.661001002.3\r\n> 2006.229.12:35:27.05#abcon#{5=INTERFACE CLEAR} 2006.229.12:35:27.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:35:32.24$setupk4/"tpicd 2006.229.12:35:32.24$setupk4/echo=off 2006.229.12:35:32.24$setupk4/xlog=off 2006.229.12:35:32.24:!2006.229.12:42:50 2006.229.12:35:39.14#trakl#Source acquired 2006.229.12:35:41.14#flagr#flagr/antenna,acquired 2006.229.12:42:50.00:preob 2006.229.12:42:51.14/onsource/TRACKING 2006.229.12:42:51.14:!2006.229.12:43:00 2006.229.12:43:00.00:"tape 2006.229.12:43:00.00:"st=record 2006.229.12:43:00.00:data_valid=on 2006.229.12:43:00.00:midob 2006.229.12:43:00.14/onsource/TRACKING 2006.229.12:43:00.14/wx/27.64,1002.3,100 2006.229.12:43:00.31/cable/+6.4075E-03 2006.229.12:43:01.40/va/01,08,usb,yes,30,32 2006.229.12:43:01.40/va/02,07,usb,yes,32,33 2006.229.12:43:01.40/va/03,06,usb,yes,40,42 2006.229.12:43:01.40/va/04,07,usb,yes,33,35 2006.229.12:43:01.40/va/05,04,usb,yes,30,30 2006.229.12:43:01.40/va/06,04,usb,yes,33,33 2006.229.12:43:01.40/va/07,05,usb,yes,29,30 2006.229.12:43:01.40/va/08,06,usb,yes,21,26 2006.229.12:43:01.63/valo/01,524.99,yes,locked 2006.229.12:43:01.63/valo/02,534.99,yes,locked 2006.229.12:43:01.63/valo/03,564.99,yes,locked 2006.229.12:43:01.63/valo/04,624.99,yes,locked 2006.229.12:43:01.63/valo/05,734.99,yes,locked 2006.229.12:43:01.63/valo/06,814.99,yes,locked 2006.229.12:43:01.63/valo/07,864.99,yes,locked 2006.229.12:43:01.63/valo/08,884.99,yes,locked 2006.229.12:43:02.72/vb/01,04,usb,yes,31,29 2006.229.12:43:02.72/vb/02,04,usb,yes,33,33 2006.229.12:43:02.72/vb/03,04,usb,yes,30,33 2006.229.12:43:02.72/vb/04,04,usb,yes,35,33 2006.229.12:43:02.72/vb/05,04,usb,yes,27,29 2006.229.12:43:02.72/vb/06,04,usb,yes,31,27 2006.229.12:43:02.72/vb/07,04,usb,yes,31,31 2006.229.12:43:02.72/vb/08,04,usb,yes,29,32 2006.229.12:43:02.95/vblo/01,629.99,yes,locked 2006.229.12:43:02.95/vblo/02,634.99,yes,locked 2006.229.12:43:02.95/vblo/03,649.99,yes,locked 2006.229.12:43:02.95/vblo/04,679.99,yes,locked 2006.229.12:43:02.95/vblo/05,709.99,yes,locked 2006.229.12:43:02.95/vblo/06,719.99,yes,locked 2006.229.12:43:02.95/vblo/07,734.99,yes,locked 2006.229.12:43:02.95/vblo/08,744.99,yes,locked 2006.229.12:43:03.10/vabw/8 2006.229.12:43:03.25/vbbw/8 2006.229.12:43:03.34/xfe/off,on,12.0 2006.229.12:43:03.73/ifatt/23,28,28,28 2006.229.12:43:04.08/fmout-gps/S +4.61E-07 2006.229.12:43:04.12:!2006.229.12:47:30 2006.229.12:47:30.00:data_valid=off 2006.229.12:47:30.00:"et 2006.229.12:47:30.00:!+3s 2006.229.12:47:33.02:"tape 2006.229.12:47:33.02:postob 2006.229.12:47:33.19/cable/+6.4085E-03 2006.229.12:47:33.19/wx/27.62,1002.2,100 2006.229.12:47:34.08/fmout-gps/S +4.50E-07 2006.229.12:47:34.08:scan_name=229-1256,jd0608,40 2006.229.12:47:34.08:source=3c345,164258.81,394837.0,2000.0,cw 2006.229.12:47:34.14#flagr#flagr/antenna,new-source 2006.229.12:47:35.14:checkk5 2006.229.12:47:35.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:47:35.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:47:36.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:47:36.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:47:37.13/chk_obsdata//k5ts1/T2291243??a.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.12:47:37.53/chk_obsdata//k5ts2/T2291243??b.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.12:47:37.93/chk_obsdata//k5ts3/T2291243??c.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.12:47:38.37/chk_obsdata//k5ts4/T2291243??d.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.12:47:39.08/k5log//k5ts1_log_newline 2006.229.12:47:39.78/k5log//k5ts2_log_newline 2006.229.12:47:40.49/k5log//k5ts3_log_newline 2006.229.12:47:41.20/k5log//k5ts4_log_newline 2006.229.12:47:41.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:47:41.22:setupk4=1 2006.229.12:47:41.22$setupk4/echo=on 2006.229.12:47:41.22$setupk4/pcalon 2006.229.12:47:41.22$pcalon/"no phase cal control is implemented here 2006.229.12:47:41.22$setupk4/"tpicd=stop 2006.229.12:47:41.22$setupk4/"rec=synch_on 2006.229.12:47:41.22$setupk4/"rec_mode=128 2006.229.12:47:41.22$setupk4/!* 2006.229.12:47:41.22$setupk4/recpk4 2006.229.12:47:41.22$recpk4/recpatch= 2006.229.12:47:41.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:47:41.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:47:41.23$setupk4/vck44 2006.229.12:47:41.23$vck44/valo=1,524.99 2006.229.12:47:41.23#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.12:47:41.23#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.12:47:41.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:41.23#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:41.23#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:41.23#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:41.23#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:47:41.23#ibcon#first serial, iclass 20, count 0 2006.229.12:47:41.23#ibcon#enter sib2, iclass 20, count 0 2006.229.12:47:41.23#ibcon#flushed, iclass 20, count 0 2006.229.12:47:41.23#ibcon#about to write, iclass 20, count 0 2006.229.12:47:41.23#ibcon#wrote, iclass 20, count 0 2006.229.12:47:41.23#ibcon#about to read 3, iclass 20, count 0 2006.229.12:47:41.25#ibcon#read 3, iclass 20, count 0 2006.229.12:47:41.25#ibcon#about to read 4, iclass 20, count 0 2006.229.12:47:41.25#ibcon#read 4, iclass 20, count 0 2006.229.12:47:41.25#ibcon#about to read 5, iclass 20, count 0 2006.229.12:47:41.25#ibcon#read 5, iclass 20, count 0 2006.229.12:47:41.25#ibcon#about to read 6, iclass 20, count 0 2006.229.12:47:41.25#ibcon#read 6, iclass 20, count 0 2006.229.12:47:41.25#ibcon#end of sib2, iclass 20, count 0 2006.229.12:47:41.25#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:47:41.25#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:47:41.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:47:41.25#ibcon#*before write, iclass 20, count 0 2006.229.12:47:41.25#ibcon#enter sib2, iclass 20, count 0 2006.229.12:47:41.25#ibcon#flushed, iclass 20, count 0 2006.229.12:47:41.25#ibcon#about to write, iclass 20, count 0 2006.229.12:47:41.25#ibcon#wrote, iclass 20, count 0 2006.229.12:47:41.25#ibcon#about to read 3, iclass 20, count 0 2006.229.12:47:41.30#ibcon#read 3, iclass 20, count 0 2006.229.12:47:41.30#ibcon#about to read 4, iclass 20, count 0 2006.229.12:47:41.30#ibcon#read 4, iclass 20, count 0 2006.229.12:47:41.30#ibcon#about to read 5, iclass 20, count 0 2006.229.12:47:41.30#ibcon#read 5, iclass 20, count 0 2006.229.12:47:41.30#ibcon#about to read 6, iclass 20, count 0 2006.229.12:47:41.30#ibcon#read 6, iclass 20, count 0 2006.229.12:47:41.30#ibcon#end of sib2, iclass 20, count 0 2006.229.12:47:41.30#ibcon#*after write, iclass 20, count 0 2006.229.12:47:41.30#ibcon#*before return 0, iclass 20, count 0 2006.229.12:47:41.30#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:41.30#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:41.30#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:47:41.30#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:47:41.30$vck44/va=1,8 2006.229.12:47:41.30#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.12:47:41.30#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.12:47:41.30#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:41.30#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:41.30#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:41.30#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:41.30#ibcon#enter wrdev, iclass 22, count 2 2006.229.12:47:41.30#ibcon#first serial, iclass 22, count 2 2006.229.12:47:41.30#ibcon#enter sib2, iclass 22, count 2 2006.229.12:47:41.30#ibcon#flushed, iclass 22, count 2 2006.229.12:47:41.30#ibcon#about to write, iclass 22, count 2 2006.229.12:47:41.30#ibcon#wrote, iclass 22, count 2 2006.229.12:47:41.30#ibcon#about to read 3, iclass 22, count 2 2006.229.12:47:41.32#ibcon#read 3, iclass 22, count 2 2006.229.12:47:41.32#ibcon#about to read 4, iclass 22, count 2 2006.229.12:47:41.32#ibcon#read 4, iclass 22, count 2 2006.229.12:47:41.32#ibcon#about to read 5, iclass 22, count 2 2006.229.12:47:41.32#ibcon#read 5, iclass 22, count 2 2006.229.12:47:41.32#ibcon#about to read 6, iclass 22, count 2 2006.229.12:47:41.32#ibcon#read 6, iclass 22, count 2 2006.229.12:47:41.32#ibcon#end of sib2, iclass 22, count 2 2006.229.12:47:41.32#ibcon#*mode == 0, iclass 22, count 2 2006.229.12:47:41.32#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.12:47:41.32#ibcon#[25=AT01-08\r\n] 2006.229.12:47:41.32#ibcon#*before write, iclass 22, count 2 2006.229.12:47:41.32#ibcon#enter sib2, iclass 22, count 2 2006.229.12:47:41.32#ibcon#flushed, iclass 22, count 2 2006.229.12:47:41.32#ibcon#about to write, iclass 22, count 2 2006.229.12:47:41.32#ibcon#wrote, iclass 22, count 2 2006.229.12:47:41.32#ibcon#about to read 3, iclass 22, count 2 2006.229.12:47:41.35#ibcon#read 3, iclass 22, count 2 2006.229.12:47:41.35#ibcon#about to read 4, iclass 22, count 2 2006.229.12:47:41.35#ibcon#read 4, iclass 22, count 2 2006.229.12:47:41.35#ibcon#about to read 5, iclass 22, count 2 2006.229.12:47:41.35#ibcon#read 5, iclass 22, count 2 2006.229.12:47:41.35#ibcon#about to read 6, iclass 22, count 2 2006.229.12:47:41.35#ibcon#read 6, iclass 22, count 2 2006.229.12:47:41.35#ibcon#end of sib2, iclass 22, count 2 2006.229.12:47:41.35#ibcon#*after write, iclass 22, count 2 2006.229.12:47:41.35#ibcon#*before return 0, iclass 22, count 2 2006.229.12:47:41.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:41.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:41.35#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.12:47:41.35#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:41.35#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:41.47#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:41.47#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:41.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:47:41.47#ibcon#first serial, iclass 22, count 0 2006.229.12:47:41.47#ibcon#enter sib2, iclass 22, count 0 2006.229.12:47:41.47#ibcon#flushed, iclass 22, count 0 2006.229.12:47:41.47#ibcon#about to write, iclass 22, count 0 2006.229.12:47:41.47#ibcon#wrote, iclass 22, count 0 2006.229.12:47:41.47#ibcon#about to read 3, iclass 22, count 0 2006.229.12:47:41.49#ibcon#read 3, iclass 22, count 0 2006.229.12:47:41.49#ibcon#about to read 4, iclass 22, count 0 2006.229.12:47:41.49#ibcon#read 4, iclass 22, count 0 2006.229.12:47:41.49#ibcon#about to read 5, iclass 22, count 0 2006.229.12:47:41.49#ibcon#read 5, iclass 22, count 0 2006.229.12:47:41.49#ibcon#about to read 6, iclass 22, count 0 2006.229.12:47:41.49#ibcon#read 6, iclass 22, count 0 2006.229.12:47:41.49#ibcon#end of sib2, iclass 22, count 0 2006.229.12:47:41.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:47:41.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:47:41.49#ibcon#[25=USB\r\n] 2006.229.12:47:41.49#ibcon#*before write, iclass 22, count 0 2006.229.12:47:41.49#ibcon#enter sib2, iclass 22, count 0 2006.229.12:47:41.49#ibcon#flushed, iclass 22, count 0 2006.229.12:47:41.49#ibcon#about to write, iclass 22, count 0 2006.229.12:47:41.49#ibcon#wrote, iclass 22, count 0 2006.229.12:47:41.49#ibcon#about to read 3, iclass 22, count 0 2006.229.12:47:41.52#ibcon#read 3, iclass 22, count 0 2006.229.12:47:41.52#ibcon#about to read 4, iclass 22, count 0 2006.229.12:47:41.52#ibcon#read 4, iclass 22, count 0 2006.229.12:47:41.52#ibcon#about to read 5, iclass 22, count 0 2006.229.12:47:41.52#ibcon#read 5, iclass 22, count 0 2006.229.12:47:41.52#ibcon#about to read 6, iclass 22, count 0 2006.229.12:47:41.52#ibcon#read 6, iclass 22, count 0 2006.229.12:47:41.52#ibcon#end of sib2, iclass 22, count 0 2006.229.12:47:41.52#ibcon#*after write, iclass 22, count 0 2006.229.12:47:41.52#ibcon#*before return 0, iclass 22, count 0 2006.229.12:47:41.52#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:41.52#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:41.52#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:47:41.52#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:47:41.52$vck44/valo=2,534.99 2006.229.12:47:41.52#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:47:41.52#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:47:41.52#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:41.52#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:41.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:41.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:41.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:47:41.52#ibcon#first serial, iclass 24, count 0 2006.229.12:47:41.52#ibcon#enter sib2, iclass 24, count 0 2006.229.12:47:41.52#ibcon#flushed, iclass 24, count 0 2006.229.12:47:41.52#ibcon#about to write, iclass 24, count 0 2006.229.12:47:41.52#ibcon#wrote, iclass 24, count 0 2006.229.12:47:41.52#ibcon#about to read 3, iclass 24, count 0 2006.229.12:47:41.54#ibcon#read 3, iclass 24, count 0 2006.229.12:47:41.54#ibcon#about to read 4, iclass 24, count 0 2006.229.12:47:41.54#ibcon#read 4, iclass 24, count 0 2006.229.12:47:41.54#ibcon#about to read 5, iclass 24, count 0 2006.229.12:47:41.54#ibcon#read 5, iclass 24, count 0 2006.229.12:47:41.54#ibcon#about to read 6, iclass 24, count 0 2006.229.12:47:41.54#ibcon#read 6, iclass 24, count 0 2006.229.12:47:41.54#ibcon#end of sib2, iclass 24, count 0 2006.229.12:47:41.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:47:41.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:47:41.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:47:41.54#ibcon#*before write, iclass 24, count 0 2006.229.12:47:41.54#ibcon#enter sib2, iclass 24, count 0 2006.229.12:47:41.54#ibcon#flushed, iclass 24, count 0 2006.229.12:47:41.54#ibcon#about to write, iclass 24, count 0 2006.229.12:47:41.54#ibcon#wrote, iclass 24, count 0 2006.229.12:47:41.54#ibcon#about to read 3, iclass 24, count 0 2006.229.12:47:41.58#ibcon#read 3, iclass 24, count 0 2006.229.12:47:41.58#ibcon#about to read 4, iclass 24, count 0 2006.229.12:47:41.58#ibcon#read 4, iclass 24, count 0 2006.229.12:47:41.58#ibcon#about to read 5, iclass 24, count 0 2006.229.12:47:41.58#ibcon#read 5, iclass 24, count 0 2006.229.12:47:41.58#ibcon#about to read 6, iclass 24, count 0 2006.229.12:47:41.58#ibcon#read 6, iclass 24, count 0 2006.229.12:47:41.58#ibcon#end of sib2, iclass 24, count 0 2006.229.12:47:41.58#ibcon#*after write, iclass 24, count 0 2006.229.12:47:41.58#ibcon#*before return 0, iclass 24, count 0 2006.229.12:47:41.58#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:41.58#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:41.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:47:41.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:47:41.58$vck44/va=2,7 2006.229.12:47:41.58#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:47:41.58#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:47:41.58#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:41.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:41.64#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:41.64#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:41.64#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:47:41.64#ibcon#first serial, iclass 26, count 2 2006.229.12:47:41.64#ibcon#enter sib2, iclass 26, count 2 2006.229.12:47:41.64#ibcon#flushed, iclass 26, count 2 2006.229.12:47:41.64#ibcon#about to write, iclass 26, count 2 2006.229.12:47:41.64#ibcon#wrote, iclass 26, count 2 2006.229.12:47:41.64#ibcon#about to read 3, iclass 26, count 2 2006.229.12:47:41.66#ibcon#read 3, iclass 26, count 2 2006.229.12:47:41.66#ibcon#about to read 4, iclass 26, count 2 2006.229.12:47:41.66#ibcon#read 4, iclass 26, count 2 2006.229.12:47:41.66#ibcon#about to read 5, iclass 26, count 2 2006.229.12:47:41.66#ibcon#read 5, iclass 26, count 2 2006.229.12:47:41.66#ibcon#about to read 6, iclass 26, count 2 2006.229.12:47:41.66#ibcon#read 6, iclass 26, count 2 2006.229.12:47:41.66#ibcon#end of sib2, iclass 26, count 2 2006.229.12:47:41.66#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:47:41.66#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:47:41.66#ibcon#[25=AT02-07\r\n] 2006.229.12:47:41.66#ibcon#*before write, iclass 26, count 2 2006.229.12:47:41.66#ibcon#enter sib2, iclass 26, count 2 2006.229.12:47:41.66#ibcon#flushed, iclass 26, count 2 2006.229.12:47:41.66#ibcon#about to write, iclass 26, count 2 2006.229.12:47:41.66#ibcon#wrote, iclass 26, count 2 2006.229.12:47:41.66#ibcon#about to read 3, iclass 26, count 2 2006.229.12:47:41.69#ibcon#read 3, iclass 26, count 2 2006.229.12:47:41.69#ibcon#about to read 4, iclass 26, count 2 2006.229.12:47:41.69#ibcon#read 4, iclass 26, count 2 2006.229.12:47:41.69#ibcon#about to read 5, iclass 26, count 2 2006.229.12:47:41.69#ibcon#read 5, iclass 26, count 2 2006.229.12:47:41.69#ibcon#about to read 6, iclass 26, count 2 2006.229.12:47:41.69#ibcon#read 6, iclass 26, count 2 2006.229.12:47:41.69#ibcon#end of sib2, iclass 26, count 2 2006.229.12:47:41.69#ibcon#*after write, iclass 26, count 2 2006.229.12:47:41.69#ibcon#*before return 0, iclass 26, count 2 2006.229.12:47:41.69#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:41.69#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:41.69#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:47:41.69#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:41.69#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:41.81#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:41.81#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:41.81#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:47:41.81#ibcon#first serial, iclass 26, count 0 2006.229.12:47:41.81#ibcon#enter sib2, iclass 26, count 0 2006.229.12:47:41.81#ibcon#flushed, iclass 26, count 0 2006.229.12:47:41.81#ibcon#about to write, iclass 26, count 0 2006.229.12:47:41.81#ibcon#wrote, iclass 26, count 0 2006.229.12:47:41.81#ibcon#about to read 3, iclass 26, count 0 2006.229.12:47:41.83#ibcon#read 3, iclass 26, count 0 2006.229.12:47:41.83#ibcon#about to read 4, iclass 26, count 0 2006.229.12:47:41.83#ibcon#read 4, iclass 26, count 0 2006.229.12:47:41.83#ibcon#about to read 5, iclass 26, count 0 2006.229.12:47:41.83#ibcon#read 5, iclass 26, count 0 2006.229.12:47:41.83#ibcon#about to read 6, iclass 26, count 0 2006.229.12:47:41.83#ibcon#read 6, iclass 26, count 0 2006.229.12:47:41.83#ibcon#end of sib2, iclass 26, count 0 2006.229.12:47:41.83#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:47:41.83#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:47:41.83#ibcon#[25=USB\r\n] 2006.229.12:47:41.83#ibcon#*before write, iclass 26, count 0 2006.229.12:47:41.83#ibcon#enter sib2, iclass 26, count 0 2006.229.12:47:41.83#ibcon#flushed, iclass 26, count 0 2006.229.12:47:41.83#ibcon#about to write, iclass 26, count 0 2006.229.12:47:41.83#ibcon#wrote, iclass 26, count 0 2006.229.12:47:41.83#ibcon#about to read 3, iclass 26, count 0 2006.229.12:47:41.86#ibcon#read 3, iclass 26, count 0 2006.229.12:47:41.86#ibcon#about to read 4, iclass 26, count 0 2006.229.12:47:41.86#ibcon#read 4, iclass 26, count 0 2006.229.12:47:41.86#ibcon#about to read 5, iclass 26, count 0 2006.229.12:47:41.86#ibcon#read 5, iclass 26, count 0 2006.229.12:47:41.86#ibcon#about to read 6, iclass 26, count 0 2006.229.12:47:41.86#ibcon#read 6, iclass 26, count 0 2006.229.12:47:41.86#ibcon#end of sib2, iclass 26, count 0 2006.229.12:47:41.86#ibcon#*after write, iclass 26, count 0 2006.229.12:47:41.86#ibcon#*before return 0, iclass 26, count 0 2006.229.12:47:41.86#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:41.86#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:41.86#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:47:41.86#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:47:41.86$vck44/valo=3,564.99 2006.229.12:47:41.86#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.12:47:41.86#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.12:47:41.86#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:41.86#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:41.86#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:41.86#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:41.86#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:47:41.86#ibcon#first serial, iclass 28, count 0 2006.229.12:47:41.86#ibcon#enter sib2, iclass 28, count 0 2006.229.12:47:41.86#ibcon#flushed, iclass 28, count 0 2006.229.12:47:41.86#ibcon#about to write, iclass 28, count 0 2006.229.12:47:41.86#ibcon#wrote, iclass 28, count 0 2006.229.12:47:41.86#ibcon#about to read 3, iclass 28, count 0 2006.229.12:47:41.88#ibcon#read 3, iclass 28, count 0 2006.229.12:47:41.88#ibcon#about to read 4, iclass 28, count 0 2006.229.12:47:41.88#ibcon#read 4, iclass 28, count 0 2006.229.12:47:41.88#ibcon#about to read 5, iclass 28, count 0 2006.229.12:47:41.88#ibcon#read 5, iclass 28, count 0 2006.229.12:47:41.88#ibcon#about to read 6, iclass 28, count 0 2006.229.12:47:41.88#ibcon#read 6, iclass 28, count 0 2006.229.12:47:41.88#ibcon#end of sib2, iclass 28, count 0 2006.229.12:47:41.88#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:47:41.88#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:47:41.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:47:41.88#ibcon#*before write, iclass 28, count 0 2006.229.12:47:41.88#ibcon#enter sib2, iclass 28, count 0 2006.229.12:47:41.88#ibcon#flushed, iclass 28, count 0 2006.229.12:47:41.88#ibcon#about to write, iclass 28, count 0 2006.229.12:47:41.88#ibcon#wrote, iclass 28, count 0 2006.229.12:47:41.88#ibcon#about to read 3, iclass 28, count 0 2006.229.12:47:41.92#ibcon#read 3, iclass 28, count 0 2006.229.12:47:41.92#ibcon#about to read 4, iclass 28, count 0 2006.229.12:47:41.92#ibcon#read 4, iclass 28, count 0 2006.229.12:47:41.92#ibcon#about to read 5, iclass 28, count 0 2006.229.12:47:41.92#ibcon#read 5, iclass 28, count 0 2006.229.12:47:41.92#ibcon#about to read 6, iclass 28, count 0 2006.229.12:47:41.92#ibcon#read 6, iclass 28, count 0 2006.229.12:47:41.92#ibcon#end of sib2, iclass 28, count 0 2006.229.12:47:41.92#ibcon#*after write, iclass 28, count 0 2006.229.12:47:41.92#ibcon#*before return 0, iclass 28, count 0 2006.229.12:47:41.92#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:41.92#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:41.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:47:41.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:47:41.92$vck44/va=3,6 2006.229.12:47:41.92#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.12:47:41.92#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.12:47:41.92#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:41.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:41.98#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:41.98#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:41.98#ibcon#enter wrdev, iclass 30, count 2 2006.229.12:47:41.98#ibcon#first serial, iclass 30, count 2 2006.229.12:47:41.98#ibcon#enter sib2, iclass 30, count 2 2006.229.12:47:41.98#ibcon#flushed, iclass 30, count 2 2006.229.12:47:41.98#ibcon#about to write, iclass 30, count 2 2006.229.12:47:41.98#ibcon#wrote, iclass 30, count 2 2006.229.12:47:41.98#ibcon#about to read 3, iclass 30, count 2 2006.229.12:47:42.00#ibcon#read 3, iclass 30, count 2 2006.229.12:47:42.00#ibcon#about to read 4, iclass 30, count 2 2006.229.12:47:42.00#ibcon#read 4, iclass 30, count 2 2006.229.12:47:42.00#ibcon#about to read 5, iclass 30, count 2 2006.229.12:47:42.00#ibcon#read 5, iclass 30, count 2 2006.229.12:47:42.00#ibcon#about to read 6, iclass 30, count 2 2006.229.12:47:42.00#ibcon#read 6, iclass 30, count 2 2006.229.12:47:42.00#ibcon#end of sib2, iclass 30, count 2 2006.229.12:47:42.00#ibcon#*mode == 0, iclass 30, count 2 2006.229.12:47:42.00#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.12:47:42.00#ibcon#[25=AT03-06\r\n] 2006.229.12:47:42.00#ibcon#*before write, iclass 30, count 2 2006.229.12:47:42.00#ibcon#enter sib2, iclass 30, count 2 2006.229.12:47:42.00#ibcon#flushed, iclass 30, count 2 2006.229.12:47:42.00#ibcon#about to write, iclass 30, count 2 2006.229.12:47:42.00#ibcon#wrote, iclass 30, count 2 2006.229.12:47:42.00#ibcon#about to read 3, iclass 30, count 2 2006.229.12:47:42.03#ibcon#read 3, iclass 30, count 2 2006.229.12:47:42.03#ibcon#about to read 4, iclass 30, count 2 2006.229.12:47:42.03#ibcon#read 4, iclass 30, count 2 2006.229.12:47:42.03#ibcon#about to read 5, iclass 30, count 2 2006.229.12:47:42.03#ibcon#read 5, iclass 30, count 2 2006.229.12:47:42.03#ibcon#about to read 6, iclass 30, count 2 2006.229.12:47:42.03#ibcon#read 6, iclass 30, count 2 2006.229.12:47:42.03#ibcon#end of sib2, iclass 30, count 2 2006.229.12:47:42.03#ibcon#*after write, iclass 30, count 2 2006.229.12:47:42.03#ibcon#*before return 0, iclass 30, count 2 2006.229.12:47:42.03#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:42.03#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:42.03#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.12:47:42.03#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:42.03#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:42.15#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:42.15#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:42.15#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:47:42.15#ibcon#first serial, iclass 30, count 0 2006.229.12:47:42.15#ibcon#enter sib2, iclass 30, count 0 2006.229.12:47:42.15#ibcon#flushed, iclass 30, count 0 2006.229.12:47:42.15#ibcon#about to write, iclass 30, count 0 2006.229.12:47:42.15#ibcon#wrote, iclass 30, count 0 2006.229.12:47:42.15#ibcon#about to read 3, iclass 30, count 0 2006.229.12:47:42.17#ibcon#read 3, iclass 30, count 0 2006.229.12:47:42.17#ibcon#about to read 4, iclass 30, count 0 2006.229.12:47:42.17#ibcon#read 4, iclass 30, count 0 2006.229.12:47:42.17#ibcon#about to read 5, iclass 30, count 0 2006.229.12:47:42.17#ibcon#read 5, iclass 30, count 0 2006.229.12:47:42.17#ibcon#about to read 6, iclass 30, count 0 2006.229.12:47:42.17#ibcon#read 6, iclass 30, count 0 2006.229.12:47:42.17#ibcon#end of sib2, iclass 30, count 0 2006.229.12:47:42.17#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:47:42.17#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:47:42.17#ibcon#[25=USB\r\n] 2006.229.12:47:42.17#ibcon#*before write, iclass 30, count 0 2006.229.12:47:42.17#ibcon#enter sib2, iclass 30, count 0 2006.229.12:47:42.17#ibcon#flushed, iclass 30, count 0 2006.229.12:47:42.17#ibcon#about to write, iclass 30, count 0 2006.229.12:47:42.17#ibcon#wrote, iclass 30, count 0 2006.229.12:47:42.17#ibcon#about to read 3, iclass 30, count 0 2006.229.12:47:42.20#ibcon#read 3, iclass 30, count 0 2006.229.12:47:42.20#ibcon#about to read 4, iclass 30, count 0 2006.229.12:47:42.20#ibcon#read 4, iclass 30, count 0 2006.229.12:47:42.20#ibcon#about to read 5, iclass 30, count 0 2006.229.12:47:42.20#ibcon#read 5, iclass 30, count 0 2006.229.12:47:42.20#ibcon#about to read 6, iclass 30, count 0 2006.229.12:47:42.20#ibcon#read 6, iclass 30, count 0 2006.229.12:47:42.20#ibcon#end of sib2, iclass 30, count 0 2006.229.12:47:42.20#ibcon#*after write, iclass 30, count 0 2006.229.12:47:42.20#ibcon#*before return 0, iclass 30, count 0 2006.229.12:47:42.20#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:42.20#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:42.20#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:47:42.20#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:47:42.20$vck44/valo=4,624.99 2006.229.12:47:42.20#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.12:47:42.20#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.12:47:42.20#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:42.20#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:42.20#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:42.20#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:42.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:47:42.20#ibcon#first serial, iclass 32, count 0 2006.229.12:47:42.20#ibcon#enter sib2, iclass 32, count 0 2006.229.12:47:42.20#ibcon#flushed, iclass 32, count 0 2006.229.12:47:42.20#ibcon#about to write, iclass 32, count 0 2006.229.12:47:42.20#ibcon#wrote, iclass 32, count 0 2006.229.12:47:42.20#ibcon#about to read 3, iclass 32, count 0 2006.229.12:47:42.22#ibcon#read 3, iclass 32, count 0 2006.229.12:47:42.22#ibcon#about to read 4, iclass 32, count 0 2006.229.12:47:42.22#ibcon#read 4, iclass 32, count 0 2006.229.12:47:42.22#ibcon#about to read 5, iclass 32, count 0 2006.229.12:47:42.22#ibcon#read 5, iclass 32, count 0 2006.229.12:47:42.22#ibcon#about to read 6, iclass 32, count 0 2006.229.12:47:42.22#ibcon#read 6, iclass 32, count 0 2006.229.12:47:42.22#ibcon#end of sib2, iclass 32, count 0 2006.229.12:47:42.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:47:42.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:47:42.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:47:42.22#ibcon#*before write, iclass 32, count 0 2006.229.12:47:42.22#ibcon#enter sib2, iclass 32, count 0 2006.229.12:47:42.22#ibcon#flushed, iclass 32, count 0 2006.229.12:47:42.22#ibcon#about to write, iclass 32, count 0 2006.229.12:47:42.22#ibcon#wrote, iclass 32, count 0 2006.229.12:47:42.22#ibcon#about to read 3, iclass 32, count 0 2006.229.12:47:42.26#ibcon#read 3, iclass 32, count 0 2006.229.12:47:42.26#ibcon#about to read 4, iclass 32, count 0 2006.229.12:47:42.26#ibcon#read 4, iclass 32, count 0 2006.229.12:47:42.26#ibcon#about to read 5, iclass 32, count 0 2006.229.12:47:42.26#ibcon#read 5, iclass 32, count 0 2006.229.12:47:42.26#ibcon#about to read 6, iclass 32, count 0 2006.229.12:47:42.26#ibcon#read 6, iclass 32, count 0 2006.229.12:47:42.26#ibcon#end of sib2, iclass 32, count 0 2006.229.12:47:42.26#ibcon#*after write, iclass 32, count 0 2006.229.12:47:42.26#ibcon#*before return 0, iclass 32, count 0 2006.229.12:47:42.26#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:42.26#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:42.26#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:47:42.26#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:47:42.26$vck44/va=4,7 2006.229.12:47:42.26#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.12:47:42.26#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.12:47:42.26#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:42.26#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:42.32#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:42.32#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:42.32#ibcon#enter wrdev, iclass 34, count 2 2006.229.12:47:42.32#ibcon#first serial, iclass 34, count 2 2006.229.12:47:42.32#ibcon#enter sib2, iclass 34, count 2 2006.229.12:47:42.32#ibcon#flushed, iclass 34, count 2 2006.229.12:47:42.32#ibcon#about to write, iclass 34, count 2 2006.229.12:47:42.32#ibcon#wrote, iclass 34, count 2 2006.229.12:47:42.32#ibcon#about to read 3, iclass 34, count 2 2006.229.12:47:42.34#ibcon#read 3, iclass 34, count 2 2006.229.12:47:42.34#ibcon#about to read 4, iclass 34, count 2 2006.229.12:47:42.34#ibcon#read 4, iclass 34, count 2 2006.229.12:47:42.34#ibcon#about to read 5, iclass 34, count 2 2006.229.12:47:42.34#ibcon#read 5, iclass 34, count 2 2006.229.12:47:42.34#ibcon#about to read 6, iclass 34, count 2 2006.229.12:47:42.34#ibcon#read 6, iclass 34, count 2 2006.229.12:47:42.34#ibcon#end of sib2, iclass 34, count 2 2006.229.12:47:42.34#ibcon#*mode == 0, iclass 34, count 2 2006.229.12:47:42.34#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.12:47:42.34#ibcon#[25=AT04-07\r\n] 2006.229.12:47:42.34#ibcon#*before write, iclass 34, count 2 2006.229.12:47:42.34#ibcon#enter sib2, iclass 34, count 2 2006.229.12:47:42.34#ibcon#flushed, iclass 34, count 2 2006.229.12:47:42.34#ibcon#about to write, iclass 34, count 2 2006.229.12:47:42.34#ibcon#wrote, iclass 34, count 2 2006.229.12:47:42.34#ibcon#about to read 3, iclass 34, count 2 2006.229.12:47:42.37#ibcon#read 3, iclass 34, count 2 2006.229.12:47:42.37#ibcon#about to read 4, iclass 34, count 2 2006.229.12:47:42.37#ibcon#read 4, iclass 34, count 2 2006.229.12:47:42.37#ibcon#about to read 5, iclass 34, count 2 2006.229.12:47:42.37#ibcon#read 5, iclass 34, count 2 2006.229.12:47:42.37#ibcon#about to read 6, iclass 34, count 2 2006.229.12:47:42.37#ibcon#read 6, iclass 34, count 2 2006.229.12:47:42.37#ibcon#end of sib2, iclass 34, count 2 2006.229.12:47:42.37#ibcon#*after write, iclass 34, count 2 2006.229.12:47:42.39#ibcon#*before return 0, iclass 34, count 2 2006.229.12:47:42.39#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:42.39#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:42.39#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.12:47:42.39#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:42.39#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:42.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:42.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:42.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:47:42.50#ibcon#first serial, iclass 34, count 0 2006.229.12:47:42.50#ibcon#enter sib2, iclass 34, count 0 2006.229.12:47:42.50#ibcon#flushed, iclass 34, count 0 2006.229.12:47:42.50#ibcon#about to write, iclass 34, count 0 2006.229.12:47:42.50#ibcon#wrote, iclass 34, count 0 2006.229.12:47:42.50#ibcon#about to read 3, iclass 34, count 0 2006.229.12:47:42.52#ibcon#read 3, iclass 34, count 0 2006.229.12:47:42.52#ibcon#about to read 4, iclass 34, count 0 2006.229.12:47:42.52#ibcon#read 4, iclass 34, count 0 2006.229.12:47:42.52#ibcon#about to read 5, iclass 34, count 0 2006.229.12:47:42.52#ibcon#read 5, iclass 34, count 0 2006.229.12:47:42.52#ibcon#about to read 6, iclass 34, count 0 2006.229.12:47:42.52#ibcon#read 6, iclass 34, count 0 2006.229.12:47:42.52#ibcon#end of sib2, iclass 34, count 0 2006.229.12:47:42.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:47:42.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:47:42.52#ibcon#[25=USB\r\n] 2006.229.12:47:42.52#ibcon#*before write, iclass 34, count 0 2006.229.12:47:42.52#ibcon#enter sib2, iclass 34, count 0 2006.229.12:47:42.52#ibcon#flushed, iclass 34, count 0 2006.229.12:47:42.52#ibcon#about to write, iclass 34, count 0 2006.229.12:47:42.52#ibcon#wrote, iclass 34, count 0 2006.229.12:47:42.52#ibcon#about to read 3, iclass 34, count 0 2006.229.12:47:42.55#ibcon#read 3, iclass 34, count 0 2006.229.12:47:42.55#ibcon#about to read 4, iclass 34, count 0 2006.229.12:47:42.55#ibcon#read 4, iclass 34, count 0 2006.229.12:47:42.55#ibcon#about to read 5, iclass 34, count 0 2006.229.12:47:42.55#ibcon#read 5, iclass 34, count 0 2006.229.12:47:42.55#ibcon#about to read 6, iclass 34, count 0 2006.229.12:47:42.55#ibcon#read 6, iclass 34, count 0 2006.229.12:47:42.55#ibcon#end of sib2, iclass 34, count 0 2006.229.12:47:42.55#ibcon#*after write, iclass 34, count 0 2006.229.12:47:42.55#ibcon#*before return 0, iclass 34, count 0 2006.229.12:47:42.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:42.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:42.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:47:42.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:47:42.55$vck44/valo=5,734.99 2006.229.12:47:42.55#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:47:42.55#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:47:42.55#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:42.55#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:42.55#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:42.55#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:42.55#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:47:42.55#ibcon#first serial, iclass 36, count 0 2006.229.12:47:42.55#ibcon#enter sib2, iclass 36, count 0 2006.229.12:47:42.55#ibcon#flushed, iclass 36, count 0 2006.229.12:47:42.55#ibcon#about to write, iclass 36, count 0 2006.229.12:47:42.55#ibcon#wrote, iclass 36, count 0 2006.229.12:47:42.55#ibcon#about to read 3, iclass 36, count 0 2006.229.12:47:42.57#ibcon#read 3, iclass 36, count 0 2006.229.12:47:42.57#ibcon#about to read 4, iclass 36, count 0 2006.229.12:47:42.57#ibcon#read 4, iclass 36, count 0 2006.229.12:47:42.57#ibcon#about to read 5, iclass 36, count 0 2006.229.12:47:42.57#ibcon#read 5, iclass 36, count 0 2006.229.12:47:42.57#ibcon#about to read 6, iclass 36, count 0 2006.229.12:47:42.57#ibcon#read 6, iclass 36, count 0 2006.229.12:47:42.57#ibcon#end of sib2, iclass 36, count 0 2006.229.12:47:42.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:47:42.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:47:42.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:47:42.57#ibcon#*before write, iclass 36, count 0 2006.229.12:47:42.57#ibcon#enter sib2, iclass 36, count 0 2006.229.12:47:42.57#ibcon#flushed, iclass 36, count 0 2006.229.12:47:42.57#ibcon#about to write, iclass 36, count 0 2006.229.12:47:42.57#ibcon#wrote, iclass 36, count 0 2006.229.12:47:42.57#ibcon#about to read 3, iclass 36, count 0 2006.229.12:47:42.61#ibcon#read 3, iclass 36, count 0 2006.229.12:47:42.61#ibcon#about to read 4, iclass 36, count 0 2006.229.12:47:42.61#ibcon#read 4, iclass 36, count 0 2006.229.12:47:42.61#ibcon#about to read 5, iclass 36, count 0 2006.229.12:47:42.61#ibcon#read 5, iclass 36, count 0 2006.229.12:47:42.61#ibcon#about to read 6, iclass 36, count 0 2006.229.12:47:42.61#ibcon#read 6, iclass 36, count 0 2006.229.12:47:42.61#ibcon#end of sib2, iclass 36, count 0 2006.229.12:47:42.61#ibcon#*after write, iclass 36, count 0 2006.229.12:47:42.61#ibcon#*before return 0, iclass 36, count 0 2006.229.12:47:42.61#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:42.61#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:42.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:47:42.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:47:42.61$vck44/va=5,4 2006.229.12:47:42.61#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.12:47:42.61#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.12:47:42.61#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:42.61#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:42.67#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:42.67#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:42.67#ibcon#enter wrdev, iclass 38, count 2 2006.229.12:47:42.67#ibcon#first serial, iclass 38, count 2 2006.229.12:47:42.67#ibcon#enter sib2, iclass 38, count 2 2006.229.12:47:42.67#ibcon#flushed, iclass 38, count 2 2006.229.12:47:42.67#ibcon#about to write, iclass 38, count 2 2006.229.12:47:42.67#ibcon#wrote, iclass 38, count 2 2006.229.12:47:42.67#ibcon#about to read 3, iclass 38, count 2 2006.229.12:47:42.69#ibcon#read 3, iclass 38, count 2 2006.229.12:47:42.69#ibcon#about to read 4, iclass 38, count 2 2006.229.12:47:42.69#ibcon#read 4, iclass 38, count 2 2006.229.12:47:42.69#ibcon#about to read 5, iclass 38, count 2 2006.229.12:47:42.69#ibcon#read 5, iclass 38, count 2 2006.229.12:47:42.69#ibcon#about to read 6, iclass 38, count 2 2006.229.12:47:42.69#ibcon#read 6, iclass 38, count 2 2006.229.12:47:42.69#ibcon#end of sib2, iclass 38, count 2 2006.229.12:47:42.69#ibcon#*mode == 0, iclass 38, count 2 2006.229.12:47:42.69#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.12:47:42.69#ibcon#[25=AT05-04\r\n] 2006.229.12:47:42.69#ibcon#*before write, iclass 38, count 2 2006.229.12:47:42.69#ibcon#enter sib2, iclass 38, count 2 2006.229.12:47:42.69#ibcon#flushed, iclass 38, count 2 2006.229.12:47:42.69#ibcon#about to write, iclass 38, count 2 2006.229.12:47:42.69#ibcon#wrote, iclass 38, count 2 2006.229.12:47:42.69#ibcon#about to read 3, iclass 38, count 2 2006.229.12:47:42.72#ibcon#read 3, iclass 38, count 2 2006.229.12:47:42.72#ibcon#about to read 4, iclass 38, count 2 2006.229.12:47:42.72#ibcon#read 4, iclass 38, count 2 2006.229.12:47:42.72#ibcon#about to read 5, iclass 38, count 2 2006.229.12:47:42.72#ibcon#read 5, iclass 38, count 2 2006.229.12:47:42.72#ibcon#about to read 6, iclass 38, count 2 2006.229.12:47:42.72#ibcon#read 6, iclass 38, count 2 2006.229.12:47:42.72#ibcon#end of sib2, iclass 38, count 2 2006.229.12:47:42.72#ibcon#*after write, iclass 38, count 2 2006.229.12:47:42.72#ibcon#*before return 0, iclass 38, count 2 2006.229.12:47:42.72#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:42.72#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:42.72#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.12:47:42.72#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:42.72#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:42.84#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:42.84#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:42.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:47:42.84#ibcon#first serial, iclass 38, count 0 2006.229.12:47:42.84#ibcon#enter sib2, iclass 38, count 0 2006.229.12:47:42.84#ibcon#flushed, iclass 38, count 0 2006.229.12:47:42.84#ibcon#about to write, iclass 38, count 0 2006.229.12:47:42.84#ibcon#wrote, iclass 38, count 0 2006.229.12:47:42.84#ibcon#about to read 3, iclass 38, count 0 2006.229.12:47:42.86#ibcon#read 3, iclass 38, count 0 2006.229.12:47:42.86#ibcon#about to read 4, iclass 38, count 0 2006.229.12:47:42.86#ibcon#read 4, iclass 38, count 0 2006.229.12:47:42.86#ibcon#about to read 5, iclass 38, count 0 2006.229.12:47:42.86#ibcon#read 5, iclass 38, count 0 2006.229.12:47:42.86#ibcon#about to read 6, iclass 38, count 0 2006.229.12:47:42.86#ibcon#read 6, iclass 38, count 0 2006.229.12:47:42.86#ibcon#end of sib2, iclass 38, count 0 2006.229.12:47:42.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:47:42.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:47:42.86#ibcon#[25=USB\r\n] 2006.229.12:47:42.86#ibcon#*before write, iclass 38, count 0 2006.229.12:47:42.86#ibcon#enter sib2, iclass 38, count 0 2006.229.12:47:42.86#ibcon#flushed, iclass 38, count 0 2006.229.12:47:42.86#ibcon#about to write, iclass 38, count 0 2006.229.12:47:42.86#ibcon#wrote, iclass 38, count 0 2006.229.12:47:42.86#ibcon#about to read 3, iclass 38, count 0 2006.229.12:47:42.89#ibcon#read 3, iclass 38, count 0 2006.229.12:47:42.89#ibcon#about to read 4, iclass 38, count 0 2006.229.12:47:42.89#ibcon#read 4, iclass 38, count 0 2006.229.12:47:42.89#ibcon#about to read 5, iclass 38, count 0 2006.229.12:47:42.89#ibcon#read 5, iclass 38, count 0 2006.229.12:47:42.89#ibcon#about to read 6, iclass 38, count 0 2006.229.12:47:42.89#ibcon#read 6, iclass 38, count 0 2006.229.12:47:42.89#ibcon#end of sib2, iclass 38, count 0 2006.229.12:47:42.89#ibcon#*after write, iclass 38, count 0 2006.229.12:47:42.89#ibcon#*before return 0, iclass 38, count 0 2006.229.12:47:42.89#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:42.89#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:42.89#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:47:42.89#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:47:42.89$vck44/valo=6,814.99 2006.229.12:47:42.89#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.12:47:42.89#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.12:47:42.89#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:42.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:42.89#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:42.89#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:42.89#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:47:42.89#ibcon#first serial, iclass 40, count 0 2006.229.12:47:42.89#ibcon#enter sib2, iclass 40, count 0 2006.229.12:47:42.89#ibcon#flushed, iclass 40, count 0 2006.229.12:47:42.89#ibcon#about to write, iclass 40, count 0 2006.229.12:47:42.89#ibcon#wrote, iclass 40, count 0 2006.229.12:47:42.89#ibcon#about to read 3, iclass 40, count 0 2006.229.12:47:42.91#ibcon#read 3, iclass 40, count 0 2006.229.12:47:42.91#ibcon#about to read 4, iclass 40, count 0 2006.229.12:47:42.91#ibcon#read 4, iclass 40, count 0 2006.229.12:47:42.91#ibcon#about to read 5, iclass 40, count 0 2006.229.12:47:42.91#ibcon#read 5, iclass 40, count 0 2006.229.12:47:42.91#ibcon#about to read 6, iclass 40, count 0 2006.229.12:47:42.91#ibcon#read 6, iclass 40, count 0 2006.229.12:47:42.91#ibcon#end of sib2, iclass 40, count 0 2006.229.12:47:42.91#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:47:42.91#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:47:42.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:47:42.91#ibcon#*before write, iclass 40, count 0 2006.229.12:47:42.91#ibcon#enter sib2, iclass 40, count 0 2006.229.12:47:42.91#ibcon#flushed, iclass 40, count 0 2006.229.12:47:42.91#ibcon#about to write, iclass 40, count 0 2006.229.12:47:42.91#ibcon#wrote, iclass 40, count 0 2006.229.12:47:42.91#ibcon#about to read 3, iclass 40, count 0 2006.229.12:47:42.95#ibcon#read 3, iclass 40, count 0 2006.229.12:47:42.95#ibcon#about to read 4, iclass 40, count 0 2006.229.12:47:42.95#ibcon#read 4, iclass 40, count 0 2006.229.12:47:42.95#ibcon#about to read 5, iclass 40, count 0 2006.229.12:47:42.95#ibcon#read 5, iclass 40, count 0 2006.229.12:47:42.95#ibcon#about to read 6, iclass 40, count 0 2006.229.12:47:42.95#ibcon#read 6, iclass 40, count 0 2006.229.12:47:42.95#ibcon#end of sib2, iclass 40, count 0 2006.229.12:47:42.95#ibcon#*after write, iclass 40, count 0 2006.229.12:47:42.95#ibcon#*before return 0, iclass 40, count 0 2006.229.12:47:42.95#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:42.95#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:42.95#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:47:42.95#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:47:42.95$vck44/va=6,4 2006.229.12:47:42.95#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.12:47:42.95#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.12:47:42.95#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:42.95#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:43.01#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:43.01#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:43.01#ibcon#enter wrdev, iclass 4, count 2 2006.229.12:47:43.01#ibcon#first serial, iclass 4, count 2 2006.229.12:47:43.01#ibcon#enter sib2, iclass 4, count 2 2006.229.12:47:43.01#ibcon#flushed, iclass 4, count 2 2006.229.12:47:43.01#ibcon#about to write, iclass 4, count 2 2006.229.12:47:43.01#ibcon#wrote, iclass 4, count 2 2006.229.12:47:43.01#ibcon#about to read 3, iclass 4, count 2 2006.229.12:47:43.03#ibcon#read 3, iclass 4, count 2 2006.229.12:47:43.03#ibcon#about to read 4, iclass 4, count 2 2006.229.12:47:43.03#ibcon#read 4, iclass 4, count 2 2006.229.12:47:43.03#ibcon#about to read 5, iclass 4, count 2 2006.229.12:47:43.03#ibcon#read 5, iclass 4, count 2 2006.229.12:47:43.03#ibcon#about to read 6, iclass 4, count 2 2006.229.12:47:43.03#ibcon#read 6, iclass 4, count 2 2006.229.12:47:43.03#ibcon#end of sib2, iclass 4, count 2 2006.229.12:47:43.03#ibcon#*mode == 0, iclass 4, count 2 2006.229.12:47:43.03#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.12:47:43.03#ibcon#[25=AT06-04\r\n] 2006.229.12:47:43.03#ibcon#*before write, iclass 4, count 2 2006.229.12:47:43.03#ibcon#enter sib2, iclass 4, count 2 2006.229.12:47:43.03#ibcon#flushed, iclass 4, count 2 2006.229.12:47:43.03#ibcon#about to write, iclass 4, count 2 2006.229.12:47:43.03#ibcon#wrote, iclass 4, count 2 2006.229.12:47:43.03#ibcon#about to read 3, iclass 4, count 2 2006.229.12:47:43.06#ibcon#read 3, iclass 4, count 2 2006.229.12:47:43.06#ibcon#about to read 4, iclass 4, count 2 2006.229.12:47:43.06#ibcon#read 4, iclass 4, count 2 2006.229.12:47:43.06#ibcon#about to read 5, iclass 4, count 2 2006.229.12:47:43.06#ibcon#read 5, iclass 4, count 2 2006.229.12:47:43.06#ibcon#about to read 6, iclass 4, count 2 2006.229.12:47:43.06#ibcon#read 6, iclass 4, count 2 2006.229.12:47:43.06#ibcon#end of sib2, iclass 4, count 2 2006.229.12:47:43.06#ibcon#*after write, iclass 4, count 2 2006.229.12:47:43.06#ibcon#*before return 0, iclass 4, count 2 2006.229.12:47:43.06#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:43.06#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:43.06#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.12:47:43.06#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:43.06#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:43.18#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:43.18#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:43.18#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:47:43.18#ibcon#first serial, iclass 4, count 0 2006.229.12:47:43.18#ibcon#enter sib2, iclass 4, count 0 2006.229.12:47:43.18#ibcon#flushed, iclass 4, count 0 2006.229.12:47:43.18#ibcon#about to write, iclass 4, count 0 2006.229.12:47:43.18#ibcon#wrote, iclass 4, count 0 2006.229.12:47:43.18#ibcon#about to read 3, iclass 4, count 0 2006.229.12:47:43.20#ibcon#read 3, iclass 4, count 0 2006.229.12:47:43.20#ibcon#about to read 4, iclass 4, count 0 2006.229.12:47:43.20#ibcon#read 4, iclass 4, count 0 2006.229.12:47:43.20#ibcon#about to read 5, iclass 4, count 0 2006.229.12:47:43.20#ibcon#read 5, iclass 4, count 0 2006.229.12:47:43.20#ibcon#about to read 6, iclass 4, count 0 2006.229.12:47:43.20#ibcon#read 6, iclass 4, count 0 2006.229.12:47:43.20#ibcon#end of sib2, iclass 4, count 0 2006.229.12:47:43.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:47:43.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:47:43.20#ibcon#[25=USB\r\n] 2006.229.12:47:43.20#ibcon#*before write, iclass 4, count 0 2006.229.12:47:43.20#ibcon#enter sib2, iclass 4, count 0 2006.229.12:47:43.20#ibcon#flushed, iclass 4, count 0 2006.229.12:47:43.20#ibcon#about to write, iclass 4, count 0 2006.229.12:47:43.20#ibcon#wrote, iclass 4, count 0 2006.229.12:47:43.20#ibcon#about to read 3, iclass 4, count 0 2006.229.12:47:43.23#ibcon#read 3, iclass 4, count 0 2006.229.12:47:43.23#ibcon#about to read 4, iclass 4, count 0 2006.229.12:47:43.23#ibcon#read 4, iclass 4, count 0 2006.229.12:47:43.23#ibcon#about to read 5, iclass 4, count 0 2006.229.12:47:43.23#ibcon#read 5, iclass 4, count 0 2006.229.12:47:43.23#ibcon#about to read 6, iclass 4, count 0 2006.229.12:47:43.23#ibcon#read 6, iclass 4, count 0 2006.229.12:47:43.23#ibcon#end of sib2, iclass 4, count 0 2006.229.12:47:43.23#ibcon#*after write, iclass 4, count 0 2006.229.12:47:43.23#ibcon#*before return 0, iclass 4, count 0 2006.229.12:47:43.23#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:43.23#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:43.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:47:43.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:47:43.23$vck44/valo=7,864.99 2006.229.12:47:43.23#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.12:47:43.23#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.12:47:43.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:43.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:43.23#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:43.23#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:43.23#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:47:43.23#ibcon#first serial, iclass 6, count 0 2006.229.12:47:43.23#ibcon#enter sib2, iclass 6, count 0 2006.229.12:47:43.23#ibcon#flushed, iclass 6, count 0 2006.229.12:47:43.23#ibcon#about to write, iclass 6, count 0 2006.229.12:47:43.23#ibcon#wrote, iclass 6, count 0 2006.229.12:47:43.23#ibcon#about to read 3, iclass 6, count 0 2006.229.12:47:43.25#ibcon#read 3, iclass 6, count 0 2006.229.12:47:43.25#ibcon#about to read 4, iclass 6, count 0 2006.229.12:47:43.25#ibcon#read 4, iclass 6, count 0 2006.229.12:47:43.25#ibcon#about to read 5, iclass 6, count 0 2006.229.12:47:43.25#ibcon#read 5, iclass 6, count 0 2006.229.12:47:43.25#ibcon#about to read 6, iclass 6, count 0 2006.229.12:47:43.25#ibcon#read 6, iclass 6, count 0 2006.229.12:47:43.25#ibcon#end of sib2, iclass 6, count 0 2006.229.12:47:43.25#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:47:43.25#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:47:43.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:47:43.25#ibcon#*before write, iclass 6, count 0 2006.229.12:47:43.25#ibcon#enter sib2, iclass 6, count 0 2006.229.12:47:43.25#ibcon#flushed, iclass 6, count 0 2006.229.12:47:43.25#ibcon#about to write, iclass 6, count 0 2006.229.12:47:43.25#ibcon#wrote, iclass 6, count 0 2006.229.12:47:43.25#ibcon#about to read 3, iclass 6, count 0 2006.229.12:47:43.29#ibcon#read 3, iclass 6, count 0 2006.229.12:47:43.29#ibcon#about to read 4, iclass 6, count 0 2006.229.12:47:43.29#ibcon#read 4, iclass 6, count 0 2006.229.12:47:43.29#ibcon#about to read 5, iclass 6, count 0 2006.229.12:47:43.29#ibcon#read 5, iclass 6, count 0 2006.229.12:47:43.29#ibcon#about to read 6, iclass 6, count 0 2006.229.12:47:43.29#ibcon#read 6, iclass 6, count 0 2006.229.12:47:43.29#ibcon#end of sib2, iclass 6, count 0 2006.229.12:47:43.29#ibcon#*after write, iclass 6, count 0 2006.229.12:47:43.29#ibcon#*before return 0, iclass 6, count 0 2006.229.12:47:43.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:43.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:43.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:47:43.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:47:43.29$vck44/va=7,5 2006.229.12:47:43.29#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.12:47:43.29#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.12:47:43.29#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:43.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:43.35#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:43.35#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:43.35#ibcon#enter wrdev, iclass 10, count 2 2006.229.12:47:43.35#ibcon#first serial, iclass 10, count 2 2006.229.12:47:43.35#ibcon#enter sib2, iclass 10, count 2 2006.229.12:47:43.35#ibcon#flushed, iclass 10, count 2 2006.229.12:47:43.35#ibcon#about to write, iclass 10, count 2 2006.229.12:47:43.35#ibcon#wrote, iclass 10, count 2 2006.229.12:47:43.35#ibcon#about to read 3, iclass 10, count 2 2006.229.12:47:43.37#ibcon#read 3, iclass 10, count 2 2006.229.12:47:43.37#ibcon#about to read 4, iclass 10, count 2 2006.229.12:47:43.37#ibcon#read 4, iclass 10, count 2 2006.229.12:47:43.37#ibcon#about to read 5, iclass 10, count 2 2006.229.12:47:43.37#ibcon#read 5, iclass 10, count 2 2006.229.12:47:43.37#ibcon#about to read 6, iclass 10, count 2 2006.229.12:47:43.37#ibcon#read 6, iclass 10, count 2 2006.229.12:47:43.37#ibcon#end of sib2, iclass 10, count 2 2006.229.12:47:43.37#ibcon#*mode == 0, iclass 10, count 2 2006.229.12:47:43.37#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.12:47:43.37#ibcon#[25=AT07-05\r\n] 2006.229.12:47:43.37#ibcon#*before write, iclass 10, count 2 2006.229.12:47:43.37#ibcon#enter sib2, iclass 10, count 2 2006.229.12:47:43.37#ibcon#flushed, iclass 10, count 2 2006.229.12:47:43.37#ibcon#about to write, iclass 10, count 2 2006.229.12:47:43.37#ibcon#wrote, iclass 10, count 2 2006.229.12:47:43.37#ibcon#about to read 3, iclass 10, count 2 2006.229.12:47:43.40#ibcon#read 3, iclass 10, count 2 2006.229.12:47:43.40#ibcon#about to read 4, iclass 10, count 2 2006.229.12:47:43.40#ibcon#read 4, iclass 10, count 2 2006.229.12:47:43.40#ibcon#about to read 5, iclass 10, count 2 2006.229.12:47:43.40#ibcon#read 5, iclass 10, count 2 2006.229.12:47:43.40#ibcon#about to read 6, iclass 10, count 2 2006.229.12:47:43.40#ibcon#read 6, iclass 10, count 2 2006.229.12:47:43.40#ibcon#end of sib2, iclass 10, count 2 2006.229.12:47:43.40#ibcon#*after write, iclass 10, count 2 2006.229.12:47:43.40#ibcon#*before return 0, iclass 10, count 2 2006.229.12:47:43.40#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:43.40#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:43.40#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.12:47:43.40#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:43.40#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:43.52#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:43.52#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:43.52#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:47:43.52#ibcon#first serial, iclass 10, count 0 2006.229.12:47:43.52#ibcon#enter sib2, iclass 10, count 0 2006.229.12:47:43.52#ibcon#flushed, iclass 10, count 0 2006.229.12:47:43.52#ibcon#about to write, iclass 10, count 0 2006.229.12:47:43.52#ibcon#wrote, iclass 10, count 0 2006.229.12:47:43.52#ibcon#about to read 3, iclass 10, count 0 2006.229.12:47:43.54#ibcon#read 3, iclass 10, count 0 2006.229.12:47:43.54#ibcon#about to read 4, iclass 10, count 0 2006.229.12:47:43.54#ibcon#read 4, iclass 10, count 0 2006.229.12:47:43.54#ibcon#about to read 5, iclass 10, count 0 2006.229.12:47:43.54#ibcon#read 5, iclass 10, count 0 2006.229.12:47:43.54#ibcon#about to read 6, iclass 10, count 0 2006.229.12:47:43.54#ibcon#read 6, iclass 10, count 0 2006.229.12:47:43.54#ibcon#end of sib2, iclass 10, count 0 2006.229.12:47:43.54#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:47:43.54#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:47:43.54#ibcon#[25=USB\r\n] 2006.229.12:47:43.54#ibcon#*before write, iclass 10, count 0 2006.229.12:47:43.54#ibcon#enter sib2, iclass 10, count 0 2006.229.12:47:43.54#ibcon#flushed, iclass 10, count 0 2006.229.12:47:43.54#ibcon#about to write, iclass 10, count 0 2006.229.12:47:43.54#ibcon#wrote, iclass 10, count 0 2006.229.12:47:43.54#ibcon#about to read 3, iclass 10, count 0 2006.229.12:47:43.57#ibcon#read 3, iclass 10, count 0 2006.229.12:47:43.57#ibcon#about to read 4, iclass 10, count 0 2006.229.12:47:43.57#ibcon#read 4, iclass 10, count 0 2006.229.12:47:43.57#ibcon#about to read 5, iclass 10, count 0 2006.229.12:47:43.57#ibcon#read 5, iclass 10, count 0 2006.229.12:47:43.57#ibcon#about to read 6, iclass 10, count 0 2006.229.12:47:43.57#ibcon#read 6, iclass 10, count 0 2006.229.12:47:43.57#ibcon#end of sib2, iclass 10, count 0 2006.229.12:47:43.57#ibcon#*after write, iclass 10, count 0 2006.229.12:47:43.57#ibcon#*before return 0, iclass 10, count 0 2006.229.12:47:43.57#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:43.57#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:43.57#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:47:43.57#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:47:43.57$vck44/valo=8,884.99 2006.229.12:47:43.57#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:47:43.57#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:47:43.57#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:43.57#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:43.57#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:43.57#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:43.57#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:47:43.57#ibcon#first serial, iclass 12, count 0 2006.229.12:47:43.57#ibcon#enter sib2, iclass 12, count 0 2006.229.12:47:43.57#ibcon#flushed, iclass 12, count 0 2006.229.12:47:43.57#ibcon#about to write, iclass 12, count 0 2006.229.12:47:43.57#ibcon#wrote, iclass 12, count 0 2006.229.12:47:43.57#ibcon#about to read 3, iclass 12, count 0 2006.229.12:47:43.59#ibcon#read 3, iclass 12, count 0 2006.229.12:47:43.59#ibcon#about to read 4, iclass 12, count 0 2006.229.12:47:43.59#ibcon#read 4, iclass 12, count 0 2006.229.12:47:43.59#ibcon#about to read 5, iclass 12, count 0 2006.229.12:47:43.59#ibcon#read 5, iclass 12, count 0 2006.229.12:47:43.59#ibcon#about to read 6, iclass 12, count 0 2006.229.12:47:43.59#ibcon#read 6, iclass 12, count 0 2006.229.12:47:43.59#ibcon#end of sib2, iclass 12, count 0 2006.229.12:47:43.59#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:47:43.59#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:47:43.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:47:43.59#ibcon#*before write, iclass 12, count 0 2006.229.12:47:43.59#ibcon#enter sib2, iclass 12, count 0 2006.229.12:47:43.59#ibcon#flushed, iclass 12, count 0 2006.229.12:47:43.59#ibcon#about to write, iclass 12, count 0 2006.229.12:47:43.59#ibcon#wrote, iclass 12, count 0 2006.229.12:47:43.59#ibcon#about to read 3, iclass 12, count 0 2006.229.12:47:43.63#ibcon#read 3, iclass 12, count 0 2006.229.12:47:43.63#ibcon#about to read 4, iclass 12, count 0 2006.229.12:47:43.63#ibcon#read 4, iclass 12, count 0 2006.229.12:47:43.63#ibcon#about to read 5, iclass 12, count 0 2006.229.12:47:43.63#ibcon#read 5, iclass 12, count 0 2006.229.12:47:43.63#ibcon#about to read 6, iclass 12, count 0 2006.229.12:47:43.63#ibcon#read 6, iclass 12, count 0 2006.229.12:47:43.63#ibcon#end of sib2, iclass 12, count 0 2006.229.12:47:43.63#ibcon#*after write, iclass 12, count 0 2006.229.12:47:43.63#ibcon#*before return 0, iclass 12, count 0 2006.229.12:47:43.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:43.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:43.63#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:47:43.63#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:47:43.63$vck44/va=8,6 2006.229.12:47:43.63#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.12:47:43.63#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.12:47:43.63#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:43.63#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:47:43.69#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:47:43.69#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:47:43.69#ibcon#enter wrdev, iclass 14, count 2 2006.229.12:47:43.69#ibcon#first serial, iclass 14, count 2 2006.229.12:47:43.69#ibcon#enter sib2, iclass 14, count 2 2006.229.12:47:43.69#ibcon#flushed, iclass 14, count 2 2006.229.12:47:43.69#ibcon#about to write, iclass 14, count 2 2006.229.12:47:43.69#ibcon#wrote, iclass 14, count 2 2006.229.12:47:43.69#ibcon#about to read 3, iclass 14, count 2 2006.229.12:47:43.71#ibcon#read 3, iclass 14, count 2 2006.229.12:47:43.71#ibcon#about to read 4, iclass 14, count 2 2006.229.12:47:43.71#ibcon#read 4, iclass 14, count 2 2006.229.12:47:43.71#ibcon#about to read 5, iclass 14, count 2 2006.229.12:47:43.71#ibcon#read 5, iclass 14, count 2 2006.229.12:47:43.71#ibcon#about to read 6, iclass 14, count 2 2006.229.12:47:43.71#ibcon#read 6, iclass 14, count 2 2006.229.12:47:43.71#ibcon#end of sib2, iclass 14, count 2 2006.229.12:47:43.71#ibcon#*mode == 0, iclass 14, count 2 2006.229.12:47:43.71#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.12:47:43.71#ibcon#[25=AT08-06\r\n] 2006.229.12:47:43.71#ibcon#*before write, iclass 14, count 2 2006.229.12:47:43.71#ibcon#enter sib2, iclass 14, count 2 2006.229.12:47:43.71#ibcon#flushed, iclass 14, count 2 2006.229.12:47:43.71#ibcon#about to write, iclass 14, count 2 2006.229.12:47:43.71#ibcon#wrote, iclass 14, count 2 2006.229.12:47:43.71#ibcon#about to read 3, iclass 14, count 2 2006.229.12:47:43.74#ibcon#read 3, iclass 14, count 2 2006.229.12:47:43.74#ibcon#about to read 4, iclass 14, count 2 2006.229.12:47:43.74#ibcon#read 4, iclass 14, count 2 2006.229.12:47:43.74#ibcon#about to read 5, iclass 14, count 2 2006.229.12:47:43.74#ibcon#read 5, iclass 14, count 2 2006.229.12:47:43.74#ibcon#about to read 6, iclass 14, count 2 2006.229.12:47:43.74#ibcon#read 6, iclass 14, count 2 2006.229.12:47:43.74#ibcon#end of sib2, iclass 14, count 2 2006.229.12:47:43.74#ibcon#*after write, iclass 14, count 2 2006.229.12:47:43.74#ibcon#*before return 0, iclass 14, count 2 2006.229.12:47:43.74#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:47:43.74#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.12:47:43.74#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.12:47:43.74#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:43.74#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:47:43.86#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:47:43.86#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:47:43.86#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:47:43.86#ibcon#first serial, iclass 14, count 0 2006.229.12:47:43.86#ibcon#enter sib2, iclass 14, count 0 2006.229.12:47:43.86#ibcon#flushed, iclass 14, count 0 2006.229.12:47:43.86#ibcon#about to write, iclass 14, count 0 2006.229.12:47:43.86#ibcon#wrote, iclass 14, count 0 2006.229.12:47:43.86#ibcon#about to read 3, iclass 14, count 0 2006.229.12:47:43.88#ibcon#read 3, iclass 14, count 0 2006.229.12:47:43.88#ibcon#about to read 4, iclass 14, count 0 2006.229.12:47:43.88#ibcon#read 4, iclass 14, count 0 2006.229.12:47:43.88#ibcon#about to read 5, iclass 14, count 0 2006.229.12:47:43.88#ibcon#read 5, iclass 14, count 0 2006.229.12:47:43.88#ibcon#about to read 6, iclass 14, count 0 2006.229.12:47:43.88#ibcon#read 6, iclass 14, count 0 2006.229.12:47:43.88#ibcon#end of sib2, iclass 14, count 0 2006.229.12:47:43.88#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:47:43.88#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:47:43.88#ibcon#[25=USB\r\n] 2006.229.12:47:43.88#ibcon#*before write, iclass 14, count 0 2006.229.12:47:43.88#ibcon#enter sib2, iclass 14, count 0 2006.229.12:47:43.88#ibcon#flushed, iclass 14, count 0 2006.229.12:47:43.88#ibcon#about to write, iclass 14, count 0 2006.229.12:47:43.88#ibcon#wrote, iclass 14, count 0 2006.229.12:47:43.88#ibcon#about to read 3, iclass 14, count 0 2006.229.12:47:43.91#ibcon#read 3, iclass 14, count 0 2006.229.12:47:43.91#ibcon#about to read 4, iclass 14, count 0 2006.229.12:47:43.91#ibcon#read 4, iclass 14, count 0 2006.229.12:47:43.91#ibcon#about to read 5, iclass 14, count 0 2006.229.12:47:43.91#ibcon#read 5, iclass 14, count 0 2006.229.12:47:43.91#ibcon#about to read 6, iclass 14, count 0 2006.229.12:47:43.91#ibcon#read 6, iclass 14, count 0 2006.229.12:47:43.91#ibcon#end of sib2, iclass 14, count 0 2006.229.12:47:43.91#ibcon#*after write, iclass 14, count 0 2006.229.12:47:43.91#ibcon#*before return 0, iclass 14, count 0 2006.229.12:47:43.91#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:47:43.91#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.12:47:43.91#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:47:43.91#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:47:43.91$vck44/vblo=1,629.99 2006.229.12:47:43.91#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.12:47:43.91#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.12:47:43.91#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:43.91#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:47:43.91#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:47:43.91#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:47:43.91#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:47:43.91#ibcon#first serial, iclass 16, count 0 2006.229.12:47:43.91#ibcon#enter sib2, iclass 16, count 0 2006.229.12:47:43.91#ibcon#flushed, iclass 16, count 0 2006.229.12:47:43.91#ibcon#about to write, iclass 16, count 0 2006.229.12:47:43.91#ibcon#wrote, iclass 16, count 0 2006.229.12:47:43.91#ibcon#about to read 3, iclass 16, count 0 2006.229.12:47:43.93#ibcon#read 3, iclass 16, count 0 2006.229.12:47:43.93#ibcon#about to read 4, iclass 16, count 0 2006.229.12:47:43.93#ibcon#read 4, iclass 16, count 0 2006.229.12:47:43.93#ibcon#about to read 5, iclass 16, count 0 2006.229.12:47:43.93#ibcon#read 5, iclass 16, count 0 2006.229.12:47:43.93#ibcon#about to read 6, iclass 16, count 0 2006.229.12:47:43.93#ibcon#read 6, iclass 16, count 0 2006.229.12:47:43.93#ibcon#end of sib2, iclass 16, count 0 2006.229.12:47:43.93#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:47:43.93#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:47:43.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:47:43.93#ibcon#*before write, iclass 16, count 0 2006.229.12:47:43.93#ibcon#enter sib2, iclass 16, count 0 2006.229.12:47:43.93#ibcon#flushed, iclass 16, count 0 2006.229.12:47:43.93#ibcon#about to write, iclass 16, count 0 2006.229.12:47:43.93#ibcon#wrote, iclass 16, count 0 2006.229.12:47:43.93#ibcon#about to read 3, iclass 16, count 0 2006.229.12:47:43.97#ibcon#read 3, iclass 16, count 0 2006.229.12:47:43.97#ibcon#about to read 4, iclass 16, count 0 2006.229.12:47:43.97#ibcon#read 4, iclass 16, count 0 2006.229.12:47:43.97#ibcon#about to read 5, iclass 16, count 0 2006.229.12:47:43.97#ibcon#read 5, iclass 16, count 0 2006.229.12:47:43.97#ibcon#about to read 6, iclass 16, count 0 2006.229.12:47:43.97#ibcon#read 6, iclass 16, count 0 2006.229.12:47:43.97#ibcon#end of sib2, iclass 16, count 0 2006.229.12:47:43.97#ibcon#*after write, iclass 16, count 0 2006.229.12:47:43.97#ibcon#*before return 0, iclass 16, count 0 2006.229.12:47:43.97#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:47:43.97#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.12:47:43.97#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:47:43.97#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:47:43.97$vck44/vb=1,4 2006.229.12:47:43.97#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.12:47:43.97#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.12:47:43.97#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:43.97#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:47:43.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:47:43.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:47:43.97#ibcon#enter wrdev, iclass 18, count 2 2006.229.12:47:43.97#ibcon#first serial, iclass 18, count 2 2006.229.12:47:43.97#ibcon#enter sib2, iclass 18, count 2 2006.229.12:47:43.97#ibcon#flushed, iclass 18, count 2 2006.229.12:47:43.97#ibcon#about to write, iclass 18, count 2 2006.229.12:47:43.97#ibcon#wrote, iclass 18, count 2 2006.229.12:47:43.97#ibcon#about to read 3, iclass 18, count 2 2006.229.12:47:43.99#ibcon#read 3, iclass 18, count 2 2006.229.12:47:43.99#ibcon#about to read 4, iclass 18, count 2 2006.229.12:47:43.99#ibcon#read 4, iclass 18, count 2 2006.229.12:47:43.99#ibcon#about to read 5, iclass 18, count 2 2006.229.12:47:43.99#ibcon#read 5, iclass 18, count 2 2006.229.12:47:43.99#ibcon#about to read 6, iclass 18, count 2 2006.229.12:47:43.99#ibcon#read 6, iclass 18, count 2 2006.229.12:47:43.99#ibcon#end of sib2, iclass 18, count 2 2006.229.12:47:43.99#ibcon#*mode == 0, iclass 18, count 2 2006.229.12:47:43.99#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.12:47:43.99#ibcon#[27=AT01-04\r\n] 2006.229.12:47:43.99#ibcon#*before write, iclass 18, count 2 2006.229.12:47:43.99#ibcon#enter sib2, iclass 18, count 2 2006.229.12:47:43.99#ibcon#flushed, iclass 18, count 2 2006.229.12:47:43.99#ibcon#about to write, iclass 18, count 2 2006.229.12:47:43.99#ibcon#wrote, iclass 18, count 2 2006.229.12:47:43.99#ibcon#about to read 3, iclass 18, count 2 2006.229.12:47:44.02#ibcon#read 3, iclass 18, count 2 2006.229.12:47:44.02#ibcon#about to read 4, iclass 18, count 2 2006.229.12:47:44.02#ibcon#read 4, iclass 18, count 2 2006.229.12:47:44.02#ibcon#about to read 5, iclass 18, count 2 2006.229.12:47:44.02#ibcon#read 5, iclass 18, count 2 2006.229.12:47:44.02#ibcon#about to read 6, iclass 18, count 2 2006.229.12:47:44.02#ibcon#read 6, iclass 18, count 2 2006.229.12:47:44.02#ibcon#end of sib2, iclass 18, count 2 2006.229.12:47:44.02#ibcon#*after write, iclass 18, count 2 2006.229.12:47:44.02#ibcon#*before return 0, iclass 18, count 2 2006.229.12:47:44.02#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:47:44.02#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.12:47:44.02#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.12:47:44.02#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:44.02#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:47:44.14#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:47:44.14#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:47:44.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:47:44.14#ibcon#first serial, iclass 18, count 0 2006.229.12:47:44.14#ibcon#enter sib2, iclass 18, count 0 2006.229.12:47:44.14#ibcon#flushed, iclass 18, count 0 2006.229.12:47:44.14#ibcon#about to write, iclass 18, count 0 2006.229.12:47:44.14#ibcon#wrote, iclass 18, count 0 2006.229.12:47:44.14#ibcon#about to read 3, iclass 18, count 0 2006.229.12:47:44.16#ibcon#read 3, iclass 18, count 0 2006.229.12:47:44.16#ibcon#about to read 4, iclass 18, count 0 2006.229.12:47:44.16#ibcon#read 4, iclass 18, count 0 2006.229.12:47:44.16#ibcon#about to read 5, iclass 18, count 0 2006.229.12:47:44.16#ibcon#read 5, iclass 18, count 0 2006.229.12:47:44.16#ibcon#about to read 6, iclass 18, count 0 2006.229.12:47:44.16#ibcon#read 6, iclass 18, count 0 2006.229.12:47:44.16#ibcon#end of sib2, iclass 18, count 0 2006.229.12:47:44.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:47:44.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:47:44.16#ibcon#[27=USB\r\n] 2006.229.12:47:44.16#ibcon#*before write, iclass 18, count 0 2006.229.12:47:44.16#ibcon#enter sib2, iclass 18, count 0 2006.229.12:47:44.16#ibcon#flushed, iclass 18, count 0 2006.229.12:47:44.16#ibcon#about to write, iclass 18, count 0 2006.229.12:47:44.16#ibcon#wrote, iclass 18, count 0 2006.229.12:47:44.16#ibcon#about to read 3, iclass 18, count 0 2006.229.12:47:44.19#ibcon#read 3, iclass 18, count 0 2006.229.12:47:44.19#ibcon#about to read 4, iclass 18, count 0 2006.229.12:47:44.19#ibcon#read 4, iclass 18, count 0 2006.229.12:47:44.19#ibcon#about to read 5, iclass 18, count 0 2006.229.12:47:44.19#ibcon#read 5, iclass 18, count 0 2006.229.12:47:44.19#ibcon#about to read 6, iclass 18, count 0 2006.229.12:47:44.19#ibcon#read 6, iclass 18, count 0 2006.229.12:47:44.19#ibcon#end of sib2, iclass 18, count 0 2006.229.12:47:44.19#ibcon#*after write, iclass 18, count 0 2006.229.12:47:44.19#ibcon#*before return 0, iclass 18, count 0 2006.229.12:47:44.19#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:47:44.19#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.12:47:44.19#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:47:44.19#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:47:44.19$vck44/vblo=2,634.99 2006.229.12:47:44.19#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.12:47:44.19#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.12:47:44.19#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:44.19#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:44.19#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:44.19#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:44.19#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:47:44.19#ibcon#first serial, iclass 20, count 0 2006.229.12:47:44.19#ibcon#enter sib2, iclass 20, count 0 2006.229.12:47:44.19#ibcon#flushed, iclass 20, count 0 2006.229.12:47:44.19#ibcon#about to write, iclass 20, count 0 2006.229.12:47:44.19#ibcon#wrote, iclass 20, count 0 2006.229.12:47:44.19#ibcon#about to read 3, iclass 20, count 0 2006.229.12:47:44.21#ibcon#read 3, iclass 20, count 0 2006.229.12:47:44.21#ibcon#about to read 4, iclass 20, count 0 2006.229.12:47:44.21#ibcon#read 4, iclass 20, count 0 2006.229.12:47:44.21#ibcon#about to read 5, iclass 20, count 0 2006.229.12:47:44.21#ibcon#read 5, iclass 20, count 0 2006.229.12:47:44.21#ibcon#about to read 6, iclass 20, count 0 2006.229.12:47:44.21#ibcon#read 6, iclass 20, count 0 2006.229.12:47:44.21#ibcon#end of sib2, iclass 20, count 0 2006.229.12:47:44.21#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:47:44.21#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:47:44.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:47:44.21#ibcon#*before write, iclass 20, count 0 2006.229.12:47:44.21#ibcon#enter sib2, iclass 20, count 0 2006.229.12:47:44.21#ibcon#flushed, iclass 20, count 0 2006.229.12:47:44.21#ibcon#about to write, iclass 20, count 0 2006.229.12:47:44.21#ibcon#wrote, iclass 20, count 0 2006.229.12:47:44.21#ibcon#about to read 3, iclass 20, count 0 2006.229.12:47:44.25#ibcon#read 3, iclass 20, count 0 2006.229.12:47:44.25#ibcon#about to read 4, iclass 20, count 0 2006.229.12:47:44.25#ibcon#read 4, iclass 20, count 0 2006.229.12:47:44.25#ibcon#about to read 5, iclass 20, count 0 2006.229.12:47:44.25#ibcon#read 5, iclass 20, count 0 2006.229.12:47:44.25#ibcon#about to read 6, iclass 20, count 0 2006.229.12:47:44.25#ibcon#read 6, iclass 20, count 0 2006.229.12:47:44.25#ibcon#end of sib2, iclass 20, count 0 2006.229.12:47:44.25#ibcon#*after write, iclass 20, count 0 2006.229.12:47:44.25#ibcon#*before return 0, iclass 20, count 0 2006.229.12:47:44.25#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:44.25#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.12:47:44.25#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:47:44.25#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:47:44.25$vck44/vb=2,4 2006.229.12:47:44.25#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.12:47:44.25#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.12:47:44.25#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:44.25#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:44.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:44.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:44.31#ibcon#enter wrdev, iclass 22, count 2 2006.229.12:47:44.31#ibcon#first serial, iclass 22, count 2 2006.229.12:47:44.31#ibcon#enter sib2, iclass 22, count 2 2006.229.12:47:44.31#ibcon#flushed, iclass 22, count 2 2006.229.12:47:44.31#ibcon#about to write, iclass 22, count 2 2006.229.12:47:44.31#ibcon#wrote, iclass 22, count 2 2006.229.12:47:44.31#ibcon#about to read 3, iclass 22, count 2 2006.229.12:47:44.33#ibcon#read 3, iclass 22, count 2 2006.229.12:47:44.33#ibcon#about to read 4, iclass 22, count 2 2006.229.12:47:44.33#ibcon#read 4, iclass 22, count 2 2006.229.12:47:44.33#ibcon#about to read 5, iclass 22, count 2 2006.229.12:47:44.33#ibcon#read 5, iclass 22, count 2 2006.229.12:47:44.33#ibcon#about to read 6, iclass 22, count 2 2006.229.12:47:44.33#ibcon#read 6, iclass 22, count 2 2006.229.12:47:44.33#ibcon#end of sib2, iclass 22, count 2 2006.229.12:47:44.33#ibcon#*mode == 0, iclass 22, count 2 2006.229.12:47:44.33#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.12:47:44.33#ibcon#[27=AT02-04\r\n] 2006.229.12:47:44.33#ibcon#*before write, iclass 22, count 2 2006.229.12:47:44.33#ibcon#enter sib2, iclass 22, count 2 2006.229.12:47:44.33#ibcon#flushed, iclass 22, count 2 2006.229.12:47:44.33#ibcon#about to write, iclass 22, count 2 2006.229.12:47:44.33#ibcon#wrote, iclass 22, count 2 2006.229.12:47:44.33#ibcon#about to read 3, iclass 22, count 2 2006.229.12:47:44.36#ibcon#read 3, iclass 22, count 2 2006.229.12:47:44.36#ibcon#about to read 4, iclass 22, count 2 2006.229.12:47:44.36#ibcon#read 4, iclass 22, count 2 2006.229.12:47:44.36#ibcon#about to read 5, iclass 22, count 2 2006.229.12:47:44.36#ibcon#read 5, iclass 22, count 2 2006.229.12:47:44.36#ibcon#about to read 6, iclass 22, count 2 2006.229.12:47:44.36#ibcon#read 6, iclass 22, count 2 2006.229.12:47:44.36#ibcon#end of sib2, iclass 22, count 2 2006.229.12:47:44.36#ibcon#*after write, iclass 22, count 2 2006.229.12:47:44.36#ibcon#*before return 0, iclass 22, count 2 2006.229.12:47:44.36#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:44.36#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.12:47:44.36#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.12:47:44.36#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:44.36#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:44.48#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:44.48#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:44.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:47:44.48#ibcon#first serial, iclass 22, count 0 2006.229.12:47:44.48#ibcon#enter sib2, iclass 22, count 0 2006.229.12:47:44.48#ibcon#flushed, iclass 22, count 0 2006.229.12:47:44.48#ibcon#about to write, iclass 22, count 0 2006.229.12:47:44.48#ibcon#wrote, iclass 22, count 0 2006.229.12:47:44.48#ibcon#about to read 3, iclass 22, count 0 2006.229.12:47:44.50#ibcon#read 3, iclass 22, count 0 2006.229.12:47:44.50#ibcon#about to read 4, iclass 22, count 0 2006.229.12:47:44.50#ibcon#read 4, iclass 22, count 0 2006.229.12:47:44.50#ibcon#about to read 5, iclass 22, count 0 2006.229.12:47:44.50#ibcon#read 5, iclass 22, count 0 2006.229.12:47:44.50#ibcon#about to read 6, iclass 22, count 0 2006.229.12:47:44.50#ibcon#read 6, iclass 22, count 0 2006.229.12:47:44.50#ibcon#end of sib2, iclass 22, count 0 2006.229.12:47:44.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:47:44.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:47:44.50#ibcon#[27=USB\r\n] 2006.229.12:47:44.50#ibcon#*before write, iclass 22, count 0 2006.229.12:47:44.50#ibcon#enter sib2, iclass 22, count 0 2006.229.12:47:44.50#ibcon#flushed, iclass 22, count 0 2006.229.12:47:44.50#ibcon#about to write, iclass 22, count 0 2006.229.12:47:44.50#ibcon#wrote, iclass 22, count 0 2006.229.12:47:44.50#ibcon#about to read 3, iclass 22, count 0 2006.229.12:47:44.53#ibcon#read 3, iclass 22, count 0 2006.229.12:47:44.53#ibcon#about to read 4, iclass 22, count 0 2006.229.12:47:44.53#ibcon#read 4, iclass 22, count 0 2006.229.12:47:44.53#ibcon#about to read 5, iclass 22, count 0 2006.229.12:47:44.53#ibcon#read 5, iclass 22, count 0 2006.229.12:47:44.53#ibcon#about to read 6, iclass 22, count 0 2006.229.12:47:44.53#ibcon#read 6, iclass 22, count 0 2006.229.12:47:44.53#ibcon#end of sib2, iclass 22, count 0 2006.229.12:47:44.53#ibcon#*after write, iclass 22, count 0 2006.229.12:47:44.53#ibcon#*before return 0, iclass 22, count 0 2006.229.12:47:44.53#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:44.53#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.12:47:44.53#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:47:44.53#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:47:44.53$vck44/vblo=3,649.99 2006.229.12:47:44.53#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.12:47:44.53#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.12:47:44.53#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:44.53#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:44.53#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:44.53#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:44.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:47:44.53#ibcon#first serial, iclass 24, count 0 2006.229.12:47:44.53#ibcon#enter sib2, iclass 24, count 0 2006.229.12:47:44.53#ibcon#flushed, iclass 24, count 0 2006.229.12:47:44.53#ibcon#about to write, iclass 24, count 0 2006.229.12:47:44.53#ibcon#wrote, iclass 24, count 0 2006.229.12:47:44.53#ibcon#about to read 3, iclass 24, count 0 2006.229.12:47:44.55#ibcon#read 3, iclass 24, count 0 2006.229.12:47:44.55#ibcon#about to read 4, iclass 24, count 0 2006.229.12:47:44.55#ibcon#read 4, iclass 24, count 0 2006.229.12:47:44.55#ibcon#about to read 5, iclass 24, count 0 2006.229.12:47:44.55#ibcon#read 5, iclass 24, count 0 2006.229.12:47:44.55#ibcon#about to read 6, iclass 24, count 0 2006.229.12:47:44.55#ibcon#read 6, iclass 24, count 0 2006.229.12:47:44.55#ibcon#end of sib2, iclass 24, count 0 2006.229.12:47:44.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:47:44.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:47:44.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:47:44.55#ibcon#*before write, iclass 24, count 0 2006.229.12:47:44.55#ibcon#enter sib2, iclass 24, count 0 2006.229.12:47:44.55#ibcon#flushed, iclass 24, count 0 2006.229.12:47:44.55#ibcon#about to write, iclass 24, count 0 2006.229.12:47:44.55#ibcon#wrote, iclass 24, count 0 2006.229.12:47:44.55#ibcon#about to read 3, iclass 24, count 0 2006.229.12:47:44.59#ibcon#read 3, iclass 24, count 0 2006.229.12:47:44.59#ibcon#about to read 4, iclass 24, count 0 2006.229.12:47:44.59#ibcon#read 4, iclass 24, count 0 2006.229.12:47:44.59#ibcon#about to read 5, iclass 24, count 0 2006.229.12:47:44.59#ibcon#read 5, iclass 24, count 0 2006.229.12:47:44.59#ibcon#about to read 6, iclass 24, count 0 2006.229.12:47:44.59#ibcon#read 6, iclass 24, count 0 2006.229.12:47:44.59#ibcon#end of sib2, iclass 24, count 0 2006.229.12:47:44.59#ibcon#*after write, iclass 24, count 0 2006.229.12:47:44.59#ibcon#*before return 0, iclass 24, count 0 2006.229.12:47:44.59#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:44.59#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.12:47:44.59#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:47:44.59#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:47:44.59$vck44/vb=3,4 2006.229.12:47:44.59#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.12:47:44.59#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.12:47:44.59#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:44.59#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:44.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:44.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:44.65#ibcon#enter wrdev, iclass 26, count 2 2006.229.12:47:44.65#ibcon#first serial, iclass 26, count 2 2006.229.12:47:44.65#ibcon#enter sib2, iclass 26, count 2 2006.229.12:47:44.65#ibcon#flushed, iclass 26, count 2 2006.229.12:47:44.65#ibcon#about to write, iclass 26, count 2 2006.229.12:47:44.65#ibcon#wrote, iclass 26, count 2 2006.229.12:47:44.65#ibcon#about to read 3, iclass 26, count 2 2006.229.12:47:44.67#ibcon#read 3, iclass 26, count 2 2006.229.12:47:44.67#ibcon#about to read 4, iclass 26, count 2 2006.229.12:47:44.67#ibcon#read 4, iclass 26, count 2 2006.229.12:47:44.67#ibcon#about to read 5, iclass 26, count 2 2006.229.12:47:44.67#ibcon#read 5, iclass 26, count 2 2006.229.12:47:44.67#ibcon#about to read 6, iclass 26, count 2 2006.229.12:47:44.67#ibcon#read 6, iclass 26, count 2 2006.229.12:47:44.67#ibcon#end of sib2, iclass 26, count 2 2006.229.12:47:44.67#ibcon#*mode == 0, iclass 26, count 2 2006.229.12:47:44.67#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.12:47:44.67#ibcon#[27=AT03-04\r\n] 2006.229.12:47:44.67#ibcon#*before write, iclass 26, count 2 2006.229.12:47:44.67#ibcon#enter sib2, iclass 26, count 2 2006.229.12:47:44.67#ibcon#flushed, iclass 26, count 2 2006.229.12:47:44.67#ibcon#about to write, iclass 26, count 2 2006.229.12:47:44.67#ibcon#wrote, iclass 26, count 2 2006.229.12:47:44.67#ibcon#about to read 3, iclass 26, count 2 2006.229.12:47:44.70#ibcon#read 3, iclass 26, count 2 2006.229.12:47:44.70#ibcon#about to read 4, iclass 26, count 2 2006.229.12:47:44.70#ibcon#read 4, iclass 26, count 2 2006.229.12:47:44.70#ibcon#about to read 5, iclass 26, count 2 2006.229.12:47:44.70#ibcon#read 5, iclass 26, count 2 2006.229.12:47:44.70#ibcon#about to read 6, iclass 26, count 2 2006.229.12:47:44.70#ibcon#read 6, iclass 26, count 2 2006.229.12:47:44.70#ibcon#end of sib2, iclass 26, count 2 2006.229.12:47:44.70#ibcon#*after write, iclass 26, count 2 2006.229.12:47:44.70#ibcon#*before return 0, iclass 26, count 2 2006.229.12:47:44.70#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:44.70#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.12:47:44.70#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.12:47:44.70#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:44.70#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:44.82#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:44.82#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:44.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:47:44.82#ibcon#first serial, iclass 26, count 0 2006.229.12:47:44.82#ibcon#enter sib2, iclass 26, count 0 2006.229.12:47:44.82#ibcon#flushed, iclass 26, count 0 2006.229.12:47:44.82#ibcon#about to write, iclass 26, count 0 2006.229.12:47:44.82#ibcon#wrote, iclass 26, count 0 2006.229.12:47:44.82#ibcon#about to read 3, iclass 26, count 0 2006.229.12:47:44.84#ibcon#read 3, iclass 26, count 0 2006.229.12:47:44.84#ibcon#about to read 4, iclass 26, count 0 2006.229.12:47:44.84#ibcon#read 4, iclass 26, count 0 2006.229.12:47:44.84#ibcon#about to read 5, iclass 26, count 0 2006.229.12:47:44.84#ibcon#read 5, iclass 26, count 0 2006.229.12:47:44.84#ibcon#about to read 6, iclass 26, count 0 2006.229.12:47:44.84#ibcon#read 6, iclass 26, count 0 2006.229.12:47:44.84#ibcon#end of sib2, iclass 26, count 0 2006.229.12:47:44.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:47:44.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:47:44.84#ibcon#[27=USB\r\n] 2006.229.12:47:44.84#ibcon#*before write, iclass 26, count 0 2006.229.12:47:44.84#ibcon#enter sib2, iclass 26, count 0 2006.229.12:47:44.84#ibcon#flushed, iclass 26, count 0 2006.229.12:47:44.84#ibcon#about to write, iclass 26, count 0 2006.229.12:47:44.84#ibcon#wrote, iclass 26, count 0 2006.229.12:47:44.84#ibcon#about to read 3, iclass 26, count 0 2006.229.12:47:44.87#ibcon#read 3, iclass 26, count 0 2006.229.12:47:44.87#ibcon#about to read 4, iclass 26, count 0 2006.229.12:47:44.87#ibcon#read 4, iclass 26, count 0 2006.229.12:47:44.87#ibcon#about to read 5, iclass 26, count 0 2006.229.12:47:44.87#ibcon#read 5, iclass 26, count 0 2006.229.12:47:44.87#ibcon#about to read 6, iclass 26, count 0 2006.229.12:47:44.87#ibcon#read 6, iclass 26, count 0 2006.229.12:47:44.87#ibcon#end of sib2, iclass 26, count 0 2006.229.12:47:44.87#ibcon#*after write, iclass 26, count 0 2006.229.12:47:44.87#ibcon#*before return 0, iclass 26, count 0 2006.229.12:47:44.87#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:44.87#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.12:47:44.87#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:47:44.87#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:47:44.87$vck44/vblo=4,679.99 2006.229.12:47:44.87#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.12:47:44.87#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.12:47:44.87#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:44.87#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:44.87#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:44.87#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:44.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:47:44.87#ibcon#first serial, iclass 28, count 0 2006.229.12:47:44.87#ibcon#enter sib2, iclass 28, count 0 2006.229.12:47:44.87#ibcon#flushed, iclass 28, count 0 2006.229.12:47:44.87#ibcon#about to write, iclass 28, count 0 2006.229.12:47:44.87#ibcon#wrote, iclass 28, count 0 2006.229.12:47:44.87#ibcon#about to read 3, iclass 28, count 0 2006.229.12:47:44.89#ibcon#read 3, iclass 28, count 0 2006.229.12:47:44.89#ibcon#about to read 4, iclass 28, count 0 2006.229.12:47:44.89#ibcon#read 4, iclass 28, count 0 2006.229.12:47:44.89#ibcon#about to read 5, iclass 28, count 0 2006.229.12:47:44.89#ibcon#read 5, iclass 28, count 0 2006.229.12:47:44.89#ibcon#about to read 6, iclass 28, count 0 2006.229.12:47:44.89#ibcon#read 6, iclass 28, count 0 2006.229.12:47:44.89#ibcon#end of sib2, iclass 28, count 0 2006.229.12:47:44.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:47:44.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:47:44.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:47:44.89#ibcon#*before write, iclass 28, count 0 2006.229.12:47:44.89#ibcon#enter sib2, iclass 28, count 0 2006.229.12:47:44.89#ibcon#flushed, iclass 28, count 0 2006.229.12:47:44.89#ibcon#about to write, iclass 28, count 0 2006.229.12:47:44.89#ibcon#wrote, iclass 28, count 0 2006.229.12:47:44.89#ibcon#about to read 3, iclass 28, count 0 2006.229.12:47:44.93#ibcon#read 3, iclass 28, count 0 2006.229.12:47:44.93#ibcon#about to read 4, iclass 28, count 0 2006.229.12:47:44.93#ibcon#read 4, iclass 28, count 0 2006.229.12:47:44.93#ibcon#about to read 5, iclass 28, count 0 2006.229.12:47:44.93#ibcon#read 5, iclass 28, count 0 2006.229.12:47:44.93#ibcon#about to read 6, iclass 28, count 0 2006.229.12:47:44.93#ibcon#read 6, iclass 28, count 0 2006.229.12:47:44.93#ibcon#end of sib2, iclass 28, count 0 2006.229.12:47:44.93#ibcon#*after write, iclass 28, count 0 2006.229.12:47:44.93#ibcon#*before return 0, iclass 28, count 0 2006.229.12:47:44.93#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:44.93#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.12:47:44.93#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:47:44.93#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:47:44.93$vck44/vb=4,4 2006.229.12:47:44.93#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.12:47:44.93#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.12:47:44.93#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:44.93#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:44.99#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:44.99#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:44.99#ibcon#enter wrdev, iclass 30, count 2 2006.229.12:47:44.99#ibcon#first serial, iclass 30, count 2 2006.229.12:47:44.99#ibcon#enter sib2, iclass 30, count 2 2006.229.12:47:44.99#ibcon#flushed, iclass 30, count 2 2006.229.12:47:44.99#ibcon#about to write, iclass 30, count 2 2006.229.12:47:44.99#ibcon#wrote, iclass 30, count 2 2006.229.12:47:44.99#ibcon#about to read 3, iclass 30, count 2 2006.229.12:47:45.01#ibcon#read 3, iclass 30, count 2 2006.229.12:47:45.01#ibcon#about to read 4, iclass 30, count 2 2006.229.12:47:45.01#ibcon#read 4, iclass 30, count 2 2006.229.12:47:45.01#ibcon#about to read 5, iclass 30, count 2 2006.229.12:47:45.01#ibcon#read 5, iclass 30, count 2 2006.229.12:47:45.01#ibcon#about to read 6, iclass 30, count 2 2006.229.12:47:45.01#ibcon#read 6, iclass 30, count 2 2006.229.12:47:45.01#ibcon#end of sib2, iclass 30, count 2 2006.229.12:47:45.01#ibcon#*mode == 0, iclass 30, count 2 2006.229.12:47:45.01#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.12:47:45.01#ibcon#[27=AT04-04\r\n] 2006.229.12:47:45.01#ibcon#*before write, iclass 30, count 2 2006.229.12:47:45.01#ibcon#enter sib2, iclass 30, count 2 2006.229.12:47:45.01#ibcon#flushed, iclass 30, count 2 2006.229.12:47:45.01#ibcon#about to write, iclass 30, count 2 2006.229.12:47:45.01#ibcon#wrote, iclass 30, count 2 2006.229.12:47:45.01#ibcon#about to read 3, iclass 30, count 2 2006.229.12:47:45.04#ibcon#read 3, iclass 30, count 2 2006.229.12:47:45.04#ibcon#about to read 4, iclass 30, count 2 2006.229.12:47:45.04#ibcon#read 4, iclass 30, count 2 2006.229.12:47:45.04#ibcon#about to read 5, iclass 30, count 2 2006.229.12:47:45.04#ibcon#read 5, iclass 30, count 2 2006.229.12:47:45.04#ibcon#about to read 6, iclass 30, count 2 2006.229.12:47:45.04#ibcon#read 6, iclass 30, count 2 2006.229.12:47:45.04#ibcon#end of sib2, iclass 30, count 2 2006.229.12:47:45.04#ibcon#*after write, iclass 30, count 2 2006.229.12:47:45.04#ibcon#*before return 0, iclass 30, count 2 2006.229.12:47:45.04#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:45.04#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.12:47:45.04#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.12:47:45.04#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:45.04#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:45.16#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:45.16#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:45.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:47:45.16#ibcon#first serial, iclass 30, count 0 2006.229.12:47:45.16#ibcon#enter sib2, iclass 30, count 0 2006.229.12:47:45.16#ibcon#flushed, iclass 30, count 0 2006.229.12:47:45.16#ibcon#about to write, iclass 30, count 0 2006.229.12:47:45.16#ibcon#wrote, iclass 30, count 0 2006.229.12:47:45.16#ibcon#about to read 3, iclass 30, count 0 2006.229.12:47:45.18#ibcon#read 3, iclass 30, count 0 2006.229.12:47:45.18#ibcon#about to read 4, iclass 30, count 0 2006.229.12:47:45.18#ibcon#read 4, iclass 30, count 0 2006.229.12:47:45.18#ibcon#about to read 5, iclass 30, count 0 2006.229.12:47:45.18#ibcon#read 5, iclass 30, count 0 2006.229.12:47:45.18#ibcon#about to read 6, iclass 30, count 0 2006.229.12:47:45.18#ibcon#read 6, iclass 30, count 0 2006.229.12:47:45.18#ibcon#end of sib2, iclass 30, count 0 2006.229.12:47:45.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:47:45.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:47:45.18#ibcon#[27=USB\r\n] 2006.229.12:47:45.18#ibcon#*before write, iclass 30, count 0 2006.229.12:47:45.18#ibcon#enter sib2, iclass 30, count 0 2006.229.12:47:45.18#ibcon#flushed, iclass 30, count 0 2006.229.12:47:45.18#ibcon#about to write, iclass 30, count 0 2006.229.12:47:45.18#ibcon#wrote, iclass 30, count 0 2006.229.12:47:45.18#ibcon#about to read 3, iclass 30, count 0 2006.229.12:47:45.21#ibcon#read 3, iclass 30, count 0 2006.229.12:47:45.21#ibcon#about to read 4, iclass 30, count 0 2006.229.12:47:45.21#ibcon#read 4, iclass 30, count 0 2006.229.12:47:45.21#ibcon#about to read 5, iclass 30, count 0 2006.229.12:47:45.21#ibcon#read 5, iclass 30, count 0 2006.229.12:47:45.21#ibcon#about to read 6, iclass 30, count 0 2006.229.12:47:45.21#ibcon#read 6, iclass 30, count 0 2006.229.12:47:45.21#ibcon#end of sib2, iclass 30, count 0 2006.229.12:47:45.21#ibcon#*after write, iclass 30, count 0 2006.229.12:47:45.21#ibcon#*before return 0, iclass 30, count 0 2006.229.12:47:45.21#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:45.21#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.12:47:45.21#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:47:45.21#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:47:45.21$vck44/vblo=5,709.99 2006.229.12:47:45.21#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.12:47:45.21#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.12:47:45.21#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:45.21#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:45.21#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:45.21#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:45.21#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:47:45.21#ibcon#first serial, iclass 32, count 0 2006.229.12:47:45.21#ibcon#enter sib2, iclass 32, count 0 2006.229.12:47:45.21#ibcon#flushed, iclass 32, count 0 2006.229.12:47:45.21#ibcon#about to write, iclass 32, count 0 2006.229.12:47:45.21#ibcon#wrote, iclass 32, count 0 2006.229.12:47:45.21#ibcon#about to read 3, iclass 32, count 0 2006.229.12:47:45.23#ibcon#read 3, iclass 32, count 0 2006.229.12:47:45.23#ibcon#about to read 4, iclass 32, count 0 2006.229.12:47:45.23#ibcon#read 4, iclass 32, count 0 2006.229.12:47:45.23#ibcon#about to read 5, iclass 32, count 0 2006.229.12:47:45.23#ibcon#read 5, iclass 32, count 0 2006.229.12:47:45.23#ibcon#about to read 6, iclass 32, count 0 2006.229.12:47:45.23#ibcon#read 6, iclass 32, count 0 2006.229.12:47:45.23#ibcon#end of sib2, iclass 32, count 0 2006.229.12:47:45.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:47:45.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:47:45.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:47:45.23#ibcon#*before write, iclass 32, count 0 2006.229.12:47:45.23#ibcon#enter sib2, iclass 32, count 0 2006.229.12:47:45.23#ibcon#flushed, iclass 32, count 0 2006.229.12:47:45.23#ibcon#about to write, iclass 32, count 0 2006.229.12:47:45.23#ibcon#wrote, iclass 32, count 0 2006.229.12:47:45.23#ibcon#about to read 3, iclass 32, count 0 2006.229.12:47:45.27#ibcon#read 3, iclass 32, count 0 2006.229.12:47:45.27#ibcon#about to read 4, iclass 32, count 0 2006.229.12:47:45.27#ibcon#read 4, iclass 32, count 0 2006.229.12:47:45.27#ibcon#about to read 5, iclass 32, count 0 2006.229.12:47:45.27#ibcon#read 5, iclass 32, count 0 2006.229.12:47:45.27#ibcon#about to read 6, iclass 32, count 0 2006.229.12:47:45.27#ibcon#read 6, iclass 32, count 0 2006.229.12:47:45.27#ibcon#end of sib2, iclass 32, count 0 2006.229.12:47:45.27#ibcon#*after write, iclass 32, count 0 2006.229.12:47:45.27#ibcon#*before return 0, iclass 32, count 0 2006.229.12:47:45.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:45.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.12:47:45.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:47:45.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:47:45.27$vck44/vb=5,4 2006.229.12:47:45.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.12:47:45.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.12:47:45.27#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:45.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:45.33#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:45.33#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:45.33#ibcon#enter wrdev, iclass 34, count 2 2006.229.12:47:45.33#ibcon#first serial, iclass 34, count 2 2006.229.12:47:45.33#ibcon#enter sib2, iclass 34, count 2 2006.229.12:47:45.33#ibcon#flushed, iclass 34, count 2 2006.229.12:47:45.33#ibcon#about to write, iclass 34, count 2 2006.229.12:47:45.33#ibcon#wrote, iclass 34, count 2 2006.229.12:47:45.33#ibcon#about to read 3, iclass 34, count 2 2006.229.12:47:45.35#ibcon#read 3, iclass 34, count 2 2006.229.12:47:45.35#ibcon#about to read 4, iclass 34, count 2 2006.229.12:47:45.35#ibcon#read 4, iclass 34, count 2 2006.229.12:47:45.35#ibcon#about to read 5, iclass 34, count 2 2006.229.12:47:45.35#ibcon#read 5, iclass 34, count 2 2006.229.12:47:45.35#ibcon#about to read 6, iclass 34, count 2 2006.229.12:47:45.35#ibcon#read 6, iclass 34, count 2 2006.229.12:47:45.35#ibcon#end of sib2, iclass 34, count 2 2006.229.12:47:45.35#ibcon#*mode == 0, iclass 34, count 2 2006.229.12:47:45.35#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.12:47:45.35#ibcon#[27=AT05-04\r\n] 2006.229.12:47:45.35#ibcon#*before write, iclass 34, count 2 2006.229.12:47:45.35#ibcon#enter sib2, iclass 34, count 2 2006.229.12:47:45.35#ibcon#flushed, iclass 34, count 2 2006.229.12:47:45.35#ibcon#about to write, iclass 34, count 2 2006.229.12:47:45.35#ibcon#wrote, iclass 34, count 2 2006.229.12:47:45.35#ibcon#about to read 3, iclass 34, count 2 2006.229.12:47:45.38#ibcon#read 3, iclass 34, count 2 2006.229.12:47:45.38#ibcon#about to read 4, iclass 34, count 2 2006.229.12:47:45.38#ibcon#read 4, iclass 34, count 2 2006.229.12:47:45.38#ibcon#about to read 5, iclass 34, count 2 2006.229.12:47:45.38#ibcon#read 5, iclass 34, count 2 2006.229.12:47:45.38#ibcon#about to read 6, iclass 34, count 2 2006.229.12:47:45.38#ibcon#read 6, iclass 34, count 2 2006.229.12:47:45.38#ibcon#end of sib2, iclass 34, count 2 2006.229.12:47:45.38#ibcon#*after write, iclass 34, count 2 2006.229.12:47:45.38#ibcon#*before return 0, iclass 34, count 2 2006.229.12:47:45.38#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:45.38#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.12:47:45.38#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.12:47:45.38#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:45.38#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:45.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:45.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:45.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:47:45.50#ibcon#first serial, iclass 34, count 0 2006.229.12:47:45.50#ibcon#enter sib2, iclass 34, count 0 2006.229.12:47:45.50#ibcon#flushed, iclass 34, count 0 2006.229.12:47:45.50#ibcon#about to write, iclass 34, count 0 2006.229.12:47:45.50#ibcon#wrote, iclass 34, count 0 2006.229.12:47:45.50#ibcon#about to read 3, iclass 34, count 0 2006.229.12:47:45.52#ibcon#read 3, iclass 34, count 0 2006.229.12:47:45.52#ibcon#about to read 4, iclass 34, count 0 2006.229.12:47:45.52#ibcon#read 4, iclass 34, count 0 2006.229.12:47:45.52#ibcon#about to read 5, iclass 34, count 0 2006.229.12:47:45.52#ibcon#read 5, iclass 34, count 0 2006.229.12:47:45.52#ibcon#about to read 6, iclass 34, count 0 2006.229.12:47:45.52#ibcon#read 6, iclass 34, count 0 2006.229.12:47:45.52#ibcon#end of sib2, iclass 34, count 0 2006.229.12:47:45.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:47:45.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:47:45.52#ibcon#[27=USB\r\n] 2006.229.12:47:45.52#ibcon#*before write, iclass 34, count 0 2006.229.12:47:45.52#ibcon#enter sib2, iclass 34, count 0 2006.229.12:47:45.52#ibcon#flushed, iclass 34, count 0 2006.229.12:47:45.52#ibcon#about to write, iclass 34, count 0 2006.229.12:47:45.52#ibcon#wrote, iclass 34, count 0 2006.229.12:47:45.52#ibcon#about to read 3, iclass 34, count 0 2006.229.12:47:45.55#ibcon#read 3, iclass 34, count 0 2006.229.12:47:45.55#ibcon#about to read 4, iclass 34, count 0 2006.229.12:47:45.55#ibcon#read 4, iclass 34, count 0 2006.229.12:47:45.55#ibcon#about to read 5, iclass 34, count 0 2006.229.12:47:45.55#ibcon#read 5, iclass 34, count 0 2006.229.12:47:45.55#ibcon#about to read 6, iclass 34, count 0 2006.229.12:47:45.55#ibcon#read 6, iclass 34, count 0 2006.229.12:47:45.55#ibcon#end of sib2, iclass 34, count 0 2006.229.12:47:45.55#ibcon#*after write, iclass 34, count 0 2006.229.12:47:45.55#ibcon#*before return 0, iclass 34, count 0 2006.229.12:47:45.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:45.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.12:47:45.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:47:45.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:47:45.55$vck44/vblo=6,719.99 2006.229.12:47:45.55#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.12:47:45.55#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.12:47:45.55#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:45.55#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:45.55#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:45.55#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:45.55#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:47:45.55#ibcon#first serial, iclass 36, count 0 2006.229.12:47:45.55#ibcon#enter sib2, iclass 36, count 0 2006.229.12:47:45.55#ibcon#flushed, iclass 36, count 0 2006.229.12:47:45.55#ibcon#about to write, iclass 36, count 0 2006.229.12:47:45.55#ibcon#wrote, iclass 36, count 0 2006.229.12:47:45.55#ibcon#about to read 3, iclass 36, count 0 2006.229.12:47:45.57#ibcon#read 3, iclass 36, count 0 2006.229.12:47:45.57#ibcon#about to read 4, iclass 36, count 0 2006.229.12:47:45.57#ibcon#read 4, iclass 36, count 0 2006.229.12:47:45.57#ibcon#about to read 5, iclass 36, count 0 2006.229.12:47:45.57#ibcon#read 5, iclass 36, count 0 2006.229.12:47:45.57#ibcon#about to read 6, iclass 36, count 0 2006.229.12:47:45.57#ibcon#read 6, iclass 36, count 0 2006.229.12:47:45.57#ibcon#end of sib2, iclass 36, count 0 2006.229.12:47:45.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:47:45.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:47:45.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:47:45.57#ibcon#*before write, iclass 36, count 0 2006.229.12:47:45.57#ibcon#enter sib2, iclass 36, count 0 2006.229.12:47:45.57#ibcon#flushed, iclass 36, count 0 2006.229.12:47:45.57#ibcon#about to write, iclass 36, count 0 2006.229.12:47:45.57#ibcon#wrote, iclass 36, count 0 2006.229.12:47:45.57#ibcon#about to read 3, iclass 36, count 0 2006.229.12:47:45.61#ibcon#read 3, iclass 36, count 0 2006.229.12:47:45.61#ibcon#about to read 4, iclass 36, count 0 2006.229.12:47:45.61#ibcon#read 4, iclass 36, count 0 2006.229.12:47:45.61#ibcon#about to read 5, iclass 36, count 0 2006.229.12:47:45.61#ibcon#read 5, iclass 36, count 0 2006.229.12:47:45.61#ibcon#about to read 6, iclass 36, count 0 2006.229.12:47:45.61#ibcon#read 6, iclass 36, count 0 2006.229.12:47:45.61#ibcon#end of sib2, iclass 36, count 0 2006.229.12:47:45.61#ibcon#*after write, iclass 36, count 0 2006.229.12:47:45.61#ibcon#*before return 0, iclass 36, count 0 2006.229.12:47:45.61#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:45.61#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.12:47:45.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:47:45.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:47:45.61$vck44/vb=6,4 2006.229.12:47:45.61#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.12:47:45.61#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.12:47:45.61#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:45.61#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:45.67#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:45.67#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:45.67#ibcon#enter wrdev, iclass 38, count 2 2006.229.12:47:45.67#ibcon#first serial, iclass 38, count 2 2006.229.12:47:45.67#ibcon#enter sib2, iclass 38, count 2 2006.229.12:47:45.67#ibcon#flushed, iclass 38, count 2 2006.229.12:47:45.67#ibcon#about to write, iclass 38, count 2 2006.229.12:47:45.67#ibcon#wrote, iclass 38, count 2 2006.229.12:47:45.67#ibcon#about to read 3, iclass 38, count 2 2006.229.12:47:45.69#ibcon#read 3, iclass 38, count 2 2006.229.12:47:45.69#ibcon#about to read 4, iclass 38, count 2 2006.229.12:47:45.69#ibcon#read 4, iclass 38, count 2 2006.229.12:47:45.69#ibcon#about to read 5, iclass 38, count 2 2006.229.12:47:45.69#ibcon#read 5, iclass 38, count 2 2006.229.12:47:45.69#ibcon#about to read 6, iclass 38, count 2 2006.229.12:47:45.69#ibcon#read 6, iclass 38, count 2 2006.229.12:47:45.69#ibcon#end of sib2, iclass 38, count 2 2006.229.12:47:45.69#ibcon#*mode == 0, iclass 38, count 2 2006.229.12:47:45.69#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.12:47:45.69#ibcon#[27=AT06-04\r\n] 2006.229.12:47:45.69#ibcon#*before write, iclass 38, count 2 2006.229.12:47:45.69#ibcon#enter sib2, iclass 38, count 2 2006.229.12:47:45.69#ibcon#flushed, iclass 38, count 2 2006.229.12:47:45.69#ibcon#about to write, iclass 38, count 2 2006.229.12:47:45.69#ibcon#wrote, iclass 38, count 2 2006.229.12:47:45.69#ibcon#about to read 3, iclass 38, count 2 2006.229.12:47:45.72#ibcon#read 3, iclass 38, count 2 2006.229.12:47:45.72#ibcon#about to read 4, iclass 38, count 2 2006.229.12:47:45.72#ibcon#read 4, iclass 38, count 2 2006.229.12:47:45.72#ibcon#about to read 5, iclass 38, count 2 2006.229.12:47:45.72#ibcon#read 5, iclass 38, count 2 2006.229.12:47:45.72#ibcon#about to read 6, iclass 38, count 2 2006.229.12:47:45.72#ibcon#read 6, iclass 38, count 2 2006.229.12:47:45.72#ibcon#end of sib2, iclass 38, count 2 2006.229.12:47:45.72#ibcon#*after write, iclass 38, count 2 2006.229.12:47:45.72#ibcon#*before return 0, iclass 38, count 2 2006.229.12:47:45.72#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:45.72#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.12:47:45.72#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.12:47:45.72#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:45.72#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:45.84#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:45.84#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:45.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:47:45.84#ibcon#first serial, iclass 38, count 0 2006.229.12:47:45.84#ibcon#enter sib2, iclass 38, count 0 2006.229.12:47:45.84#ibcon#flushed, iclass 38, count 0 2006.229.12:47:45.84#ibcon#about to write, iclass 38, count 0 2006.229.12:47:45.84#ibcon#wrote, iclass 38, count 0 2006.229.12:47:45.84#ibcon#about to read 3, iclass 38, count 0 2006.229.12:47:45.86#ibcon#read 3, iclass 38, count 0 2006.229.12:47:45.86#ibcon#about to read 4, iclass 38, count 0 2006.229.12:47:45.86#ibcon#read 4, iclass 38, count 0 2006.229.12:47:45.86#ibcon#about to read 5, iclass 38, count 0 2006.229.12:47:45.86#ibcon#read 5, iclass 38, count 0 2006.229.12:47:45.86#ibcon#about to read 6, iclass 38, count 0 2006.229.12:47:45.86#ibcon#read 6, iclass 38, count 0 2006.229.12:47:45.86#ibcon#end of sib2, iclass 38, count 0 2006.229.12:47:45.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:47:45.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:47:45.86#ibcon#[27=USB\r\n] 2006.229.12:47:45.86#ibcon#*before write, iclass 38, count 0 2006.229.12:47:45.86#ibcon#enter sib2, iclass 38, count 0 2006.229.12:47:45.86#ibcon#flushed, iclass 38, count 0 2006.229.12:47:45.86#ibcon#about to write, iclass 38, count 0 2006.229.12:47:45.86#ibcon#wrote, iclass 38, count 0 2006.229.12:47:45.86#ibcon#about to read 3, iclass 38, count 0 2006.229.12:47:45.89#ibcon#read 3, iclass 38, count 0 2006.229.12:47:45.89#ibcon#about to read 4, iclass 38, count 0 2006.229.12:47:45.89#ibcon#read 4, iclass 38, count 0 2006.229.12:47:45.89#ibcon#about to read 5, iclass 38, count 0 2006.229.12:47:45.89#ibcon#read 5, iclass 38, count 0 2006.229.12:47:45.89#ibcon#about to read 6, iclass 38, count 0 2006.229.12:47:45.89#ibcon#read 6, iclass 38, count 0 2006.229.12:47:45.89#ibcon#end of sib2, iclass 38, count 0 2006.229.12:47:45.89#ibcon#*after write, iclass 38, count 0 2006.229.12:47:45.89#ibcon#*before return 0, iclass 38, count 0 2006.229.12:47:45.89#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:45.89#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.12:47:45.89#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:47:45.89#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:47:45.89$vck44/vblo=7,734.99 2006.229.12:47:45.89#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.12:47:45.89#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.12:47:45.89#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:45.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:45.89#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:45.89#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:45.89#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:47:45.89#ibcon#first serial, iclass 40, count 0 2006.229.12:47:45.89#ibcon#enter sib2, iclass 40, count 0 2006.229.12:47:45.89#ibcon#flushed, iclass 40, count 0 2006.229.12:47:45.89#ibcon#about to write, iclass 40, count 0 2006.229.12:47:45.89#ibcon#wrote, iclass 40, count 0 2006.229.12:47:45.89#ibcon#about to read 3, iclass 40, count 0 2006.229.12:47:45.91#ibcon#read 3, iclass 40, count 0 2006.229.12:47:45.91#ibcon#about to read 4, iclass 40, count 0 2006.229.12:47:45.91#ibcon#read 4, iclass 40, count 0 2006.229.12:47:45.91#ibcon#about to read 5, iclass 40, count 0 2006.229.12:47:45.91#ibcon#read 5, iclass 40, count 0 2006.229.12:47:45.91#ibcon#about to read 6, iclass 40, count 0 2006.229.12:47:45.91#ibcon#read 6, iclass 40, count 0 2006.229.12:47:45.91#ibcon#end of sib2, iclass 40, count 0 2006.229.12:47:45.91#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:47:45.91#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:47:45.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:47:45.91#ibcon#*before write, iclass 40, count 0 2006.229.12:47:45.91#ibcon#enter sib2, iclass 40, count 0 2006.229.12:47:45.91#ibcon#flushed, iclass 40, count 0 2006.229.12:47:45.91#ibcon#about to write, iclass 40, count 0 2006.229.12:47:45.91#ibcon#wrote, iclass 40, count 0 2006.229.12:47:45.91#ibcon#about to read 3, iclass 40, count 0 2006.229.12:47:45.95#ibcon#read 3, iclass 40, count 0 2006.229.12:47:45.95#ibcon#about to read 4, iclass 40, count 0 2006.229.12:47:45.95#ibcon#read 4, iclass 40, count 0 2006.229.12:47:45.95#ibcon#about to read 5, iclass 40, count 0 2006.229.12:47:45.95#ibcon#read 5, iclass 40, count 0 2006.229.12:47:45.95#ibcon#about to read 6, iclass 40, count 0 2006.229.12:47:45.95#ibcon#read 6, iclass 40, count 0 2006.229.12:47:45.95#ibcon#end of sib2, iclass 40, count 0 2006.229.12:47:45.95#ibcon#*after write, iclass 40, count 0 2006.229.12:47:45.95#ibcon#*before return 0, iclass 40, count 0 2006.229.12:47:45.95#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:45.95#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.12:47:45.95#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:47:45.95#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:47:45.95$vck44/vb=7,4 2006.229.12:47:45.95#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.12:47:45.95#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.12:47:45.95#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:45.95#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:46.01#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:46.01#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:46.01#ibcon#enter wrdev, iclass 4, count 2 2006.229.12:47:46.01#ibcon#first serial, iclass 4, count 2 2006.229.12:47:46.01#ibcon#enter sib2, iclass 4, count 2 2006.229.12:47:46.01#ibcon#flushed, iclass 4, count 2 2006.229.12:47:46.01#ibcon#about to write, iclass 4, count 2 2006.229.12:47:46.01#ibcon#wrote, iclass 4, count 2 2006.229.12:47:46.01#ibcon#about to read 3, iclass 4, count 2 2006.229.12:47:46.03#ibcon#read 3, iclass 4, count 2 2006.229.12:47:46.03#ibcon#about to read 4, iclass 4, count 2 2006.229.12:47:46.03#ibcon#read 4, iclass 4, count 2 2006.229.12:47:46.03#ibcon#about to read 5, iclass 4, count 2 2006.229.12:47:46.03#ibcon#read 5, iclass 4, count 2 2006.229.12:47:46.03#ibcon#about to read 6, iclass 4, count 2 2006.229.12:47:46.03#ibcon#read 6, iclass 4, count 2 2006.229.12:47:46.03#ibcon#end of sib2, iclass 4, count 2 2006.229.12:47:46.03#ibcon#*mode == 0, iclass 4, count 2 2006.229.12:47:46.03#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.12:47:46.03#ibcon#[27=AT07-04\r\n] 2006.229.12:47:46.03#ibcon#*before write, iclass 4, count 2 2006.229.12:47:46.03#ibcon#enter sib2, iclass 4, count 2 2006.229.12:47:46.03#ibcon#flushed, iclass 4, count 2 2006.229.12:47:46.03#ibcon#about to write, iclass 4, count 2 2006.229.12:47:46.03#ibcon#wrote, iclass 4, count 2 2006.229.12:47:46.03#ibcon#about to read 3, iclass 4, count 2 2006.229.12:47:46.06#ibcon#read 3, iclass 4, count 2 2006.229.12:47:46.06#ibcon#about to read 4, iclass 4, count 2 2006.229.12:47:46.06#ibcon#read 4, iclass 4, count 2 2006.229.12:47:46.06#ibcon#about to read 5, iclass 4, count 2 2006.229.12:47:46.06#ibcon#read 5, iclass 4, count 2 2006.229.12:47:46.06#ibcon#about to read 6, iclass 4, count 2 2006.229.12:47:46.06#ibcon#read 6, iclass 4, count 2 2006.229.12:47:46.06#ibcon#end of sib2, iclass 4, count 2 2006.229.12:47:46.06#ibcon#*after write, iclass 4, count 2 2006.229.12:47:46.06#ibcon#*before return 0, iclass 4, count 2 2006.229.12:47:46.06#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:46.06#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.12:47:46.06#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.12:47:46.06#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:46.06#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:46.18#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:46.18#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:46.18#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:47:46.18#ibcon#first serial, iclass 4, count 0 2006.229.12:47:46.18#ibcon#enter sib2, iclass 4, count 0 2006.229.12:47:46.18#ibcon#flushed, iclass 4, count 0 2006.229.12:47:46.18#ibcon#about to write, iclass 4, count 0 2006.229.12:47:46.18#ibcon#wrote, iclass 4, count 0 2006.229.12:47:46.18#ibcon#about to read 3, iclass 4, count 0 2006.229.12:47:46.20#ibcon#read 3, iclass 4, count 0 2006.229.12:47:46.20#ibcon#about to read 4, iclass 4, count 0 2006.229.12:47:46.20#ibcon#read 4, iclass 4, count 0 2006.229.12:47:46.20#ibcon#about to read 5, iclass 4, count 0 2006.229.12:47:46.20#ibcon#read 5, iclass 4, count 0 2006.229.12:47:46.20#ibcon#about to read 6, iclass 4, count 0 2006.229.12:47:46.20#ibcon#read 6, iclass 4, count 0 2006.229.12:47:46.20#ibcon#end of sib2, iclass 4, count 0 2006.229.12:47:46.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:47:46.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:47:46.20#ibcon#[27=USB\r\n] 2006.229.12:47:46.20#ibcon#*before write, iclass 4, count 0 2006.229.12:47:46.20#ibcon#enter sib2, iclass 4, count 0 2006.229.12:47:46.20#ibcon#flushed, iclass 4, count 0 2006.229.12:47:46.20#ibcon#about to write, iclass 4, count 0 2006.229.12:47:46.20#ibcon#wrote, iclass 4, count 0 2006.229.12:47:46.20#ibcon#about to read 3, iclass 4, count 0 2006.229.12:47:46.23#ibcon#read 3, iclass 4, count 0 2006.229.12:47:46.23#ibcon#about to read 4, iclass 4, count 0 2006.229.12:47:46.23#ibcon#read 4, iclass 4, count 0 2006.229.12:47:46.23#ibcon#about to read 5, iclass 4, count 0 2006.229.12:47:46.23#ibcon#read 5, iclass 4, count 0 2006.229.12:47:46.23#ibcon#about to read 6, iclass 4, count 0 2006.229.12:47:46.23#ibcon#read 6, iclass 4, count 0 2006.229.12:47:46.23#ibcon#end of sib2, iclass 4, count 0 2006.229.12:47:46.23#ibcon#*after write, iclass 4, count 0 2006.229.12:47:46.23#ibcon#*before return 0, iclass 4, count 0 2006.229.12:47:46.23#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:46.23#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.12:47:46.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:47:46.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:47:46.23$vck44/vblo=8,744.99 2006.229.12:47:46.23#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.12:47:46.23#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.12:47:46.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:47:46.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:46.23#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:46.23#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:46.23#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:47:46.23#ibcon#first serial, iclass 6, count 0 2006.229.12:47:46.23#ibcon#enter sib2, iclass 6, count 0 2006.229.12:47:46.23#ibcon#flushed, iclass 6, count 0 2006.229.12:47:46.23#ibcon#about to write, iclass 6, count 0 2006.229.12:47:46.23#ibcon#wrote, iclass 6, count 0 2006.229.12:47:46.23#ibcon#about to read 3, iclass 6, count 0 2006.229.12:47:46.25#ibcon#read 3, iclass 6, count 0 2006.229.12:47:46.25#ibcon#about to read 4, iclass 6, count 0 2006.229.12:47:46.25#ibcon#read 4, iclass 6, count 0 2006.229.12:47:46.25#ibcon#about to read 5, iclass 6, count 0 2006.229.12:47:46.25#ibcon#read 5, iclass 6, count 0 2006.229.12:47:46.25#ibcon#about to read 6, iclass 6, count 0 2006.229.12:47:46.25#ibcon#read 6, iclass 6, count 0 2006.229.12:47:46.25#ibcon#end of sib2, iclass 6, count 0 2006.229.12:47:46.25#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:47:46.25#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:47:46.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:47:46.25#ibcon#*before write, iclass 6, count 0 2006.229.12:47:46.25#ibcon#enter sib2, iclass 6, count 0 2006.229.12:47:46.25#ibcon#flushed, iclass 6, count 0 2006.229.12:47:46.25#ibcon#about to write, iclass 6, count 0 2006.229.12:47:46.25#ibcon#wrote, iclass 6, count 0 2006.229.12:47:46.25#ibcon#about to read 3, iclass 6, count 0 2006.229.12:47:46.29#ibcon#read 3, iclass 6, count 0 2006.229.12:47:46.29#ibcon#about to read 4, iclass 6, count 0 2006.229.12:47:46.29#ibcon#read 4, iclass 6, count 0 2006.229.12:47:46.29#ibcon#about to read 5, iclass 6, count 0 2006.229.12:47:46.29#ibcon#read 5, iclass 6, count 0 2006.229.12:47:46.29#ibcon#about to read 6, iclass 6, count 0 2006.229.12:47:46.29#ibcon#read 6, iclass 6, count 0 2006.229.12:47:46.29#ibcon#end of sib2, iclass 6, count 0 2006.229.12:47:46.29#ibcon#*after write, iclass 6, count 0 2006.229.12:47:46.29#ibcon#*before return 0, iclass 6, count 0 2006.229.12:47:46.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:46.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.12:47:46.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:47:46.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:47:46.29$vck44/vb=8,4 2006.229.12:47:46.29#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.12:47:46.29#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.12:47:46.29#ibcon#ireg 11 cls_cnt 2 2006.229.12:47:46.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:46.35#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:46.35#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:46.35#ibcon#enter wrdev, iclass 10, count 2 2006.229.12:47:46.35#ibcon#first serial, iclass 10, count 2 2006.229.12:47:46.35#ibcon#enter sib2, iclass 10, count 2 2006.229.12:47:46.35#ibcon#flushed, iclass 10, count 2 2006.229.12:47:46.35#ibcon#about to write, iclass 10, count 2 2006.229.12:47:46.35#ibcon#wrote, iclass 10, count 2 2006.229.12:47:46.35#ibcon#about to read 3, iclass 10, count 2 2006.229.12:47:46.37#ibcon#read 3, iclass 10, count 2 2006.229.12:47:46.37#ibcon#about to read 4, iclass 10, count 2 2006.229.12:47:46.37#ibcon#read 4, iclass 10, count 2 2006.229.12:47:46.37#ibcon#about to read 5, iclass 10, count 2 2006.229.12:47:46.37#ibcon#read 5, iclass 10, count 2 2006.229.12:47:46.37#ibcon#about to read 6, iclass 10, count 2 2006.229.12:47:46.37#ibcon#read 6, iclass 10, count 2 2006.229.12:47:46.37#ibcon#end of sib2, iclass 10, count 2 2006.229.12:47:46.37#ibcon#*mode == 0, iclass 10, count 2 2006.229.12:47:46.37#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.12:47:46.37#ibcon#[27=AT08-04\r\n] 2006.229.12:47:46.37#ibcon#*before write, iclass 10, count 2 2006.229.12:47:46.37#ibcon#enter sib2, iclass 10, count 2 2006.229.12:47:46.37#ibcon#flushed, iclass 10, count 2 2006.229.12:47:46.37#ibcon#about to write, iclass 10, count 2 2006.229.12:47:46.37#ibcon#wrote, iclass 10, count 2 2006.229.12:47:46.37#ibcon#about to read 3, iclass 10, count 2 2006.229.12:47:46.40#ibcon#read 3, iclass 10, count 2 2006.229.12:47:46.40#ibcon#about to read 4, iclass 10, count 2 2006.229.12:47:46.40#ibcon#read 4, iclass 10, count 2 2006.229.12:47:46.40#ibcon#about to read 5, iclass 10, count 2 2006.229.12:47:46.40#ibcon#read 5, iclass 10, count 2 2006.229.12:47:46.40#ibcon#about to read 6, iclass 10, count 2 2006.229.12:47:46.40#ibcon#read 6, iclass 10, count 2 2006.229.12:47:46.40#ibcon#end of sib2, iclass 10, count 2 2006.229.12:47:46.40#ibcon#*after write, iclass 10, count 2 2006.229.12:47:46.40#ibcon#*before return 0, iclass 10, count 2 2006.229.12:47:46.40#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:46.40#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.12:47:46.40#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.12:47:46.40#ibcon#ireg 7 cls_cnt 0 2006.229.12:47:46.40#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:46.52#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:46.52#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:46.52#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:47:46.52#ibcon#first serial, iclass 10, count 0 2006.229.12:47:46.52#ibcon#enter sib2, iclass 10, count 0 2006.229.12:47:46.52#ibcon#flushed, iclass 10, count 0 2006.229.12:47:46.52#ibcon#about to write, iclass 10, count 0 2006.229.12:47:46.52#ibcon#wrote, iclass 10, count 0 2006.229.12:47:46.52#ibcon#about to read 3, iclass 10, count 0 2006.229.12:47:46.54#ibcon#read 3, iclass 10, count 0 2006.229.12:47:46.54#ibcon#about to read 4, iclass 10, count 0 2006.229.12:47:46.54#ibcon#read 4, iclass 10, count 0 2006.229.12:47:46.54#ibcon#about to read 5, iclass 10, count 0 2006.229.12:47:46.54#ibcon#read 5, iclass 10, count 0 2006.229.12:47:46.54#ibcon#about to read 6, iclass 10, count 0 2006.229.12:47:46.54#ibcon#read 6, iclass 10, count 0 2006.229.12:47:46.54#ibcon#end of sib2, iclass 10, count 0 2006.229.12:47:46.54#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:47:46.54#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:47:46.54#ibcon#[27=USB\r\n] 2006.229.12:47:46.54#ibcon#*before write, iclass 10, count 0 2006.229.12:47:46.54#ibcon#enter sib2, iclass 10, count 0 2006.229.12:47:46.54#ibcon#flushed, iclass 10, count 0 2006.229.12:47:46.54#ibcon#about to write, iclass 10, count 0 2006.229.12:47:46.54#ibcon#wrote, iclass 10, count 0 2006.229.12:47:46.54#ibcon#about to read 3, iclass 10, count 0 2006.229.12:47:46.57#ibcon#read 3, iclass 10, count 0 2006.229.12:47:46.57#ibcon#about to read 4, iclass 10, count 0 2006.229.12:47:46.57#ibcon#read 4, iclass 10, count 0 2006.229.12:47:46.57#ibcon#about to read 5, iclass 10, count 0 2006.229.12:47:46.57#ibcon#read 5, iclass 10, count 0 2006.229.12:47:46.57#ibcon#about to read 6, iclass 10, count 0 2006.229.12:47:46.57#ibcon#read 6, iclass 10, count 0 2006.229.12:47:46.57#ibcon#end of sib2, iclass 10, count 0 2006.229.12:47:46.57#ibcon#*after write, iclass 10, count 0 2006.229.12:47:46.57#ibcon#*before return 0, iclass 10, count 0 2006.229.12:47:46.57#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:46.57#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.12:47:46.57#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:47:46.57#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:47:46.57$vck44/vabw=wide 2006.229.12:47:46.57#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:47:46.57#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:47:46.57#ibcon#ireg 8 cls_cnt 0 2006.229.12:47:46.57#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:46.57#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:46.57#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:46.57#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:47:46.57#ibcon#first serial, iclass 12, count 0 2006.229.12:47:46.57#ibcon#enter sib2, iclass 12, count 0 2006.229.12:47:46.57#ibcon#flushed, iclass 12, count 0 2006.229.12:47:46.57#ibcon#about to write, iclass 12, count 0 2006.229.12:47:46.57#ibcon#wrote, iclass 12, count 0 2006.229.12:47:46.57#ibcon#about to read 3, iclass 12, count 0 2006.229.12:47:46.59#ibcon#read 3, iclass 12, count 0 2006.229.12:47:46.59#ibcon#about to read 4, iclass 12, count 0 2006.229.12:47:46.59#ibcon#read 4, iclass 12, count 0 2006.229.12:47:46.59#ibcon#about to read 5, iclass 12, count 0 2006.229.12:47:46.59#ibcon#read 5, iclass 12, count 0 2006.229.12:47:46.59#ibcon#about to read 6, iclass 12, count 0 2006.229.12:47:46.59#ibcon#read 6, iclass 12, count 0 2006.229.12:47:46.59#ibcon#end of sib2, iclass 12, count 0 2006.229.12:47:46.59#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:47:46.59#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:47:46.59#ibcon#[25=BW32\r\n] 2006.229.12:47:46.59#ibcon#*before write, iclass 12, count 0 2006.229.12:47:46.59#ibcon#enter sib2, iclass 12, count 0 2006.229.12:47:46.59#ibcon#flushed, iclass 12, count 0 2006.229.12:47:46.59#ibcon#about to write, iclass 12, count 0 2006.229.12:47:46.59#ibcon#wrote, iclass 12, count 0 2006.229.12:47:46.59#ibcon#about to read 3, iclass 12, count 0 2006.229.12:47:46.62#ibcon#read 3, iclass 12, count 0 2006.229.12:47:46.62#ibcon#about to read 4, iclass 12, count 0 2006.229.12:47:46.62#ibcon#read 4, iclass 12, count 0 2006.229.12:47:46.62#ibcon#about to read 5, iclass 12, count 0 2006.229.12:47:46.62#ibcon#read 5, iclass 12, count 0 2006.229.12:47:46.62#ibcon#about to read 6, iclass 12, count 0 2006.229.12:47:46.62#ibcon#read 6, iclass 12, count 0 2006.229.12:47:46.62#ibcon#end of sib2, iclass 12, count 0 2006.229.12:47:46.62#ibcon#*after write, iclass 12, count 0 2006.229.12:47:46.62#ibcon#*before return 0, iclass 12, count 0 2006.229.12:47:46.62#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:46.62#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:47:46.62#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:47:46.62#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:47:46.62$vck44/vbbw=wide 2006.229.12:47:46.62#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:47:46.62#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:47:46.62#ibcon#ireg 8 cls_cnt 0 2006.229.12:47:46.62#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:47:46.69#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:47:46.69#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:47:46.69#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:47:46.69#ibcon#first serial, iclass 14, count 0 2006.229.12:47:46.69#ibcon#enter sib2, iclass 14, count 0 2006.229.12:47:46.69#ibcon#flushed, iclass 14, count 0 2006.229.12:47:46.69#ibcon#about to write, iclass 14, count 0 2006.229.12:47:46.69#ibcon#wrote, iclass 14, count 0 2006.229.12:47:46.69#ibcon#about to read 3, iclass 14, count 0 2006.229.12:47:46.71#ibcon#read 3, iclass 14, count 0 2006.229.12:47:46.71#ibcon#about to read 4, iclass 14, count 0 2006.229.12:47:46.71#ibcon#read 4, iclass 14, count 0 2006.229.12:47:46.71#ibcon#about to read 5, iclass 14, count 0 2006.229.12:47:46.71#ibcon#read 5, iclass 14, count 0 2006.229.12:47:46.71#ibcon#about to read 6, iclass 14, count 0 2006.229.12:47:46.71#ibcon#read 6, iclass 14, count 0 2006.229.12:47:46.71#ibcon#end of sib2, iclass 14, count 0 2006.229.12:47:46.71#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:47:46.71#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:47:46.71#ibcon#[27=BW32\r\n] 2006.229.12:47:46.71#ibcon#*before write, iclass 14, count 0 2006.229.12:47:46.71#ibcon#enter sib2, iclass 14, count 0 2006.229.12:47:46.71#ibcon#flushed, iclass 14, count 0 2006.229.12:47:46.71#ibcon#about to write, iclass 14, count 0 2006.229.12:47:46.71#ibcon#wrote, iclass 14, count 0 2006.229.12:47:46.71#ibcon#about to read 3, iclass 14, count 0 2006.229.12:47:46.74#ibcon#read 3, iclass 14, count 0 2006.229.12:47:46.74#ibcon#about to read 4, iclass 14, count 0 2006.229.12:47:46.74#ibcon#read 4, iclass 14, count 0 2006.229.12:47:46.74#ibcon#about to read 5, iclass 14, count 0 2006.229.12:47:46.74#ibcon#read 5, iclass 14, count 0 2006.229.12:47:46.74#ibcon#about to read 6, iclass 14, count 0 2006.229.12:47:46.74#ibcon#read 6, iclass 14, count 0 2006.229.12:47:46.74#ibcon#end of sib2, iclass 14, count 0 2006.229.12:47:46.74#ibcon#*after write, iclass 14, count 0 2006.229.12:47:46.74#ibcon#*before return 0, iclass 14, count 0 2006.229.12:47:46.74#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:47:46.74#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:47:46.74#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:47:46.74#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:47:46.74$setupk4/ifdk4 2006.229.12:47:46.74$ifdk4/lo= 2006.229.12:47:46.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:47:46.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:47:46.74$ifdk4/patch= 2006.229.12:47:46.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:47:46.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:47:46.74$setupk4/!*+20s 2006.229.12:47:49.58#abcon#<5=/04 1.3 2.3 27.621001002.2\r\n> 2006.229.12:47:49.60#abcon#{5=INTERFACE CLEAR} 2006.229.12:47:49.66#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:47:59.75#abcon#<5=/04 1.3 2.3 27.621001002.2\r\n> 2006.229.12:47:59.77#abcon#{5=INTERFACE CLEAR} 2006.229.12:47:59.83#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:48:01.23$setupk4/"tpicd 2006.229.12:48:01.23$setupk4/echo=off 2006.229.12:48:01.23$setupk4/xlog=off 2006.229.12:48:01.23:!2006.229.12:56:45 2006.229.12:48:09.14#trakl#Source acquired 2006.229.12:48:10.14#flagr#flagr/antenna,acquired 2006.229.12:56:45.02:preob 2006.229.12:56:46.15/onsource/TRACKING 2006.229.12:56:46.15:!2006.229.12:56:55 2006.229.12:56:55.02:"tape 2006.229.12:56:55.02:"st=record 2006.229.12:56:55.02:data_valid=on 2006.229.12:56:55.02:midob 2006.229.12:56:56.15/onsource/TRACKING 2006.229.12:56:56.15/wx/27.59,1002.2,100 2006.229.12:56:56.21/cable/+6.4096E-03 2006.229.12:56:57.30/va/01,08,usb,yes,29,32 2006.229.12:56:57.30/va/02,07,usb,yes,32,32 2006.229.12:56:57.30/va/03,06,usb,yes,39,42 2006.229.12:56:57.30/va/04,07,usb,yes,33,34 2006.229.12:56:57.30/va/05,04,usb,yes,29,30 2006.229.12:56:57.30/va/06,04,usb,yes,33,33 2006.229.12:56:57.30/va/07,05,usb,yes,29,30 2006.229.12:56:57.30/va/08,06,usb,yes,21,26 2006.229.12:56:57.53/valo/01,524.99,yes,locked 2006.229.12:56:57.53/valo/02,534.99,yes,locked 2006.229.12:56:57.53/valo/03,564.99,yes,locked 2006.229.12:56:57.53/valo/04,624.99,yes,locked 2006.229.12:56:57.53/valo/05,734.99,yes,locked 2006.229.12:56:57.54/valo/06,814.99,yes,locked 2006.229.12:56:57.54/valo/07,864.99,yes,locked 2006.229.12:56:57.54/valo/08,884.99,yes,locked 2006.229.12:56:58.62/vb/01,04,usb,yes,31,29 2006.229.12:56:58.62/vb/02,04,usb,yes,33,33 2006.229.12:56:58.62/vb/03,04,usb,yes,30,33 2006.229.12:56:58.62/vb/04,04,usb,yes,35,34 2006.229.12:56:58.62/vb/05,04,usb,yes,27,30 2006.229.12:56:58.62/vb/06,04,usb,yes,32,28 2006.229.12:56:58.62/vb/07,04,usb,yes,31,31 2006.229.12:56:58.62/vb/08,04,usb,yes,29,32 2006.229.12:56:58.85/vblo/01,629.99,yes,locked 2006.229.12:56:58.85/vblo/02,634.99,yes,locked 2006.229.12:56:58.85/vblo/03,649.99,yes,locked 2006.229.12:56:58.85/vblo/04,679.99,yes,locked 2006.229.12:56:58.85/vblo/05,709.99,yes,locked 2006.229.12:56:58.85/vblo/06,719.99,yes,locked 2006.229.12:56:58.85/vblo/07,734.99,yes,locked 2006.229.12:56:58.86/vblo/08,744.99,yes,locked 2006.229.12:56:59.00/vabw/8 2006.229.12:56:59.15/vbbw/8 2006.229.12:56:59.24/xfe/off,on,12.0 2006.229.12:56:59.63/ifatt/23,28,28,28 2006.229.12:57:00.07/fmout-gps/S +4.46E-07 2006.229.12:57:00.12:!2006.229.12:57:35 2006.229.12:57:35.02:data_valid=off 2006.229.12:57:35.02:"et 2006.229.12:57:35.02:!+3s 2006.229.12:57:38.04:"tape 2006.229.12:57:38.04:postob 2006.229.12:57:38.26/cable/+6.4092E-03 2006.229.12:57:38.27/wx/27.59,1002.2,100 2006.229.12:57:38.32/fmout-gps/S +4.45E-07 2006.229.12:57:38.33:scan_name=229-1259,jd0608,40 2006.229.12:57:38.33:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.12:57:39.15#flagr#flagr/antenna,new-source 2006.229.12:57:39.15:checkk5 2006.229.12:57:39.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:57:39.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:57:40.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:57:40.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:57:41.13/chk_obsdata//k5ts1/T2291256??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:57:41.54/chk_obsdata//k5ts2/T2291256??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:57:41.93/chk_obsdata//k5ts3/T2291256??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:57:42.33/chk_obsdata//k5ts4/T2291256??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:57:43.04/k5log//k5ts1_log_newline 2006.229.12:57:43.75/k5log//k5ts2_log_newline 2006.229.12:57:44.47/k5log//k5ts3_log_newline 2006.229.12:57:45.18/k5log//k5ts4_log_newline 2006.229.12:57:45.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:57:45.20:setupk4=1 2006.229.12:57:45.20$setupk4/echo=on 2006.229.12:57:45.20$setupk4/pcalon 2006.229.12:57:45.20$pcalon/"no phase cal control is implemented here 2006.229.12:57:45.20$setupk4/"tpicd=stop 2006.229.12:57:45.20$setupk4/"rec=synch_on 2006.229.12:57:45.20$setupk4/"rec_mode=128 2006.229.12:57:45.20$setupk4/!* 2006.229.12:57:45.20$setupk4/recpk4 2006.229.12:57:45.20$recpk4/recpatch= 2006.229.12:57:45.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:57:45.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:57:45.21$setupk4/vck44 2006.229.12:57:45.21$vck44/valo=1,524.99 2006.229.12:57:45.21#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.12:57:45.21#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.12:57:45.21#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:45.21#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:45.21#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:45.21#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:45.21#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:57:45.21#ibcon#first serial, iclass 39, count 0 2006.229.12:57:45.21#ibcon#enter sib2, iclass 39, count 0 2006.229.12:57:45.21#ibcon#flushed, iclass 39, count 0 2006.229.12:57:45.21#ibcon#about to write, iclass 39, count 0 2006.229.12:57:45.21#ibcon#wrote, iclass 39, count 0 2006.229.12:57:45.21#ibcon#about to read 3, iclass 39, count 0 2006.229.12:57:45.23#ibcon#read 3, iclass 39, count 0 2006.229.12:57:45.23#ibcon#about to read 4, iclass 39, count 0 2006.229.12:57:45.23#ibcon#read 4, iclass 39, count 0 2006.229.12:57:45.23#ibcon#about to read 5, iclass 39, count 0 2006.229.12:57:45.23#ibcon#read 5, iclass 39, count 0 2006.229.12:57:45.23#ibcon#about to read 6, iclass 39, count 0 2006.229.12:57:45.23#ibcon#read 6, iclass 39, count 0 2006.229.12:57:45.23#ibcon#end of sib2, iclass 39, count 0 2006.229.12:57:45.23#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:57:45.23#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:57:45.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:57:45.23#ibcon#*before write, iclass 39, count 0 2006.229.12:57:45.23#ibcon#enter sib2, iclass 39, count 0 2006.229.12:57:45.23#ibcon#flushed, iclass 39, count 0 2006.229.12:57:45.23#ibcon#about to write, iclass 39, count 0 2006.229.12:57:45.23#ibcon#wrote, iclass 39, count 0 2006.229.12:57:45.23#ibcon#about to read 3, iclass 39, count 0 2006.229.12:57:45.28#ibcon#read 3, iclass 39, count 0 2006.229.12:57:45.28#ibcon#about to read 4, iclass 39, count 0 2006.229.12:57:45.28#ibcon#read 4, iclass 39, count 0 2006.229.12:57:45.28#ibcon#about to read 5, iclass 39, count 0 2006.229.12:57:45.28#ibcon#read 5, iclass 39, count 0 2006.229.12:57:45.28#ibcon#about to read 6, iclass 39, count 0 2006.229.12:57:45.28#ibcon#read 6, iclass 39, count 0 2006.229.12:57:45.28#ibcon#end of sib2, iclass 39, count 0 2006.229.12:57:45.28#ibcon#*after write, iclass 39, count 0 2006.229.12:57:45.28#ibcon#*before return 0, iclass 39, count 0 2006.229.12:57:45.28#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:45.28#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:45.28#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:57:45.28#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:57:45.28$vck44/va=1,8 2006.229.12:57:45.28#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.12:57:45.28#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.12:57:45.28#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:45.28#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:45.28#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:45.28#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:45.28#ibcon#enter wrdev, iclass 3, count 2 2006.229.12:57:45.28#ibcon#first serial, iclass 3, count 2 2006.229.12:57:45.28#ibcon#enter sib2, iclass 3, count 2 2006.229.12:57:45.28#ibcon#flushed, iclass 3, count 2 2006.229.12:57:45.28#ibcon#about to write, iclass 3, count 2 2006.229.12:57:45.28#ibcon#wrote, iclass 3, count 2 2006.229.12:57:45.28#ibcon#about to read 3, iclass 3, count 2 2006.229.12:57:45.29#ibcon#read 3, iclass 3, count 2 2006.229.12:57:45.29#ibcon#about to read 4, iclass 3, count 2 2006.229.12:57:45.29#ibcon#read 4, iclass 3, count 2 2006.229.12:57:45.29#ibcon#about to read 5, iclass 3, count 2 2006.229.12:57:45.29#ibcon#read 5, iclass 3, count 2 2006.229.12:57:45.29#ibcon#about to read 6, iclass 3, count 2 2006.229.12:57:45.29#ibcon#read 6, iclass 3, count 2 2006.229.12:57:45.29#ibcon#end of sib2, iclass 3, count 2 2006.229.12:57:45.29#ibcon#*mode == 0, iclass 3, count 2 2006.229.12:57:45.29#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.12:57:45.29#ibcon#[25=AT01-08\r\n] 2006.229.12:57:45.29#ibcon#*before write, iclass 3, count 2 2006.229.12:57:45.29#ibcon#enter sib2, iclass 3, count 2 2006.229.12:57:45.29#ibcon#flushed, iclass 3, count 2 2006.229.12:57:45.29#ibcon#about to write, iclass 3, count 2 2006.229.12:57:45.29#ibcon#wrote, iclass 3, count 2 2006.229.12:57:45.29#ibcon#about to read 3, iclass 3, count 2 2006.229.12:57:45.32#ibcon#read 3, iclass 3, count 2 2006.229.12:57:45.32#ibcon#about to read 4, iclass 3, count 2 2006.229.12:57:45.32#ibcon#read 4, iclass 3, count 2 2006.229.12:57:45.32#ibcon#about to read 5, iclass 3, count 2 2006.229.12:57:45.32#ibcon#read 5, iclass 3, count 2 2006.229.12:57:45.32#ibcon#about to read 6, iclass 3, count 2 2006.229.12:57:45.32#ibcon#read 6, iclass 3, count 2 2006.229.12:57:45.32#ibcon#end of sib2, iclass 3, count 2 2006.229.12:57:45.32#ibcon#*after write, iclass 3, count 2 2006.229.12:57:45.32#ibcon#*before return 0, iclass 3, count 2 2006.229.12:57:45.32#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:45.32#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:45.32#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.12:57:45.32#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:45.32#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:45.44#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:45.44#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:45.44#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:57:45.44#ibcon#first serial, iclass 3, count 0 2006.229.12:57:45.44#ibcon#enter sib2, iclass 3, count 0 2006.229.12:57:45.44#ibcon#flushed, iclass 3, count 0 2006.229.12:57:45.44#ibcon#about to write, iclass 3, count 0 2006.229.12:57:45.44#ibcon#wrote, iclass 3, count 0 2006.229.12:57:45.44#ibcon#about to read 3, iclass 3, count 0 2006.229.12:57:45.46#ibcon#read 3, iclass 3, count 0 2006.229.12:57:45.46#ibcon#about to read 4, iclass 3, count 0 2006.229.12:57:45.46#ibcon#read 4, iclass 3, count 0 2006.229.12:57:45.46#ibcon#about to read 5, iclass 3, count 0 2006.229.12:57:45.46#ibcon#read 5, iclass 3, count 0 2006.229.12:57:45.46#ibcon#about to read 6, iclass 3, count 0 2006.229.12:57:45.46#ibcon#read 6, iclass 3, count 0 2006.229.12:57:45.46#ibcon#end of sib2, iclass 3, count 0 2006.229.12:57:45.46#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:57:45.46#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:57:45.46#ibcon#[25=USB\r\n] 2006.229.12:57:45.46#ibcon#*before write, iclass 3, count 0 2006.229.12:57:45.46#ibcon#enter sib2, iclass 3, count 0 2006.229.12:57:45.46#ibcon#flushed, iclass 3, count 0 2006.229.12:57:45.46#ibcon#about to write, iclass 3, count 0 2006.229.12:57:45.46#ibcon#wrote, iclass 3, count 0 2006.229.12:57:45.46#ibcon#about to read 3, iclass 3, count 0 2006.229.12:57:45.49#ibcon#read 3, iclass 3, count 0 2006.229.12:57:45.49#ibcon#about to read 4, iclass 3, count 0 2006.229.12:57:45.49#ibcon#read 4, iclass 3, count 0 2006.229.12:57:45.49#ibcon#about to read 5, iclass 3, count 0 2006.229.12:57:45.49#ibcon#read 5, iclass 3, count 0 2006.229.12:57:45.49#ibcon#about to read 6, iclass 3, count 0 2006.229.12:57:45.49#ibcon#read 6, iclass 3, count 0 2006.229.12:57:45.49#ibcon#end of sib2, iclass 3, count 0 2006.229.12:57:45.49#ibcon#*after write, iclass 3, count 0 2006.229.12:57:45.49#ibcon#*before return 0, iclass 3, count 0 2006.229.12:57:45.49#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:45.49#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:45.49#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:57:45.49#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:57:45.50$vck44/valo=2,534.99 2006.229.12:57:45.50#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.12:57:45.50#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.12:57:45.50#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:45.50#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:45.50#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:45.50#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:45.50#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:57:45.50#ibcon#first serial, iclass 5, count 0 2006.229.12:57:45.50#ibcon#enter sib2, iclass 5, count 0 2006.229.12:57:45.50#ibcon#flushed, iclass 5, count 0 2006.229.12:57:45.50#ibcon#about to write, iclass 5, count 0 2006.229.12:57:45.50#ibcon#wrote, iclass 5, count 0 2006.229.12:57:45.50#ibcon#about to read 3, iclass 5, count 0 2006.229.12:57:45.51#ibcon#read 3, iclass 5, count 0 2006.229.12:57:45.51#ibcon#about to read 4, iclass 5, count 0 2006.229.12:57:45.51#ibcon#read 4, iclass 5, count 0 2006.229.12:57:45.51#ibcon#about to read 5, iclass 5, count 0 2006.229.12:57:45.51#ibcon#read 5, iclass 5, count 0 2006.229.12:57:45.51#ibcon#about to read 6, iclass 5, count 0 2006.229.12:57:45.51#ibcon#read 6, iclass 5, count 0 2006.229.12:57:45.51#ibcon#end of sib2, iclass 5, count 0 2006.229.12:57:45.51#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:57:45.51#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:57:45.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:57:45.51#ibcon#*before write, iclass 5, count 0 2006.229.12:57:45.51#ibcon#enter sib2, iclass 5, count 0 2006.229.12:57:45.51#ibcon#flushed, iclass 5, count 0 2006.229.12:57:45.51#ibcon#about to write, iclass 5, count 0 2006.229.12:57:45.51#ibcon#wrote, iclass 5, count 0 2006.229.12:57:45.51#ibcon#about to read 3, iclass 5, count 0 2006.229.12:57:45.55#ibcon#read 3, iclass 5, count 0 2006.229.12:57:45.55#ibcon#about to read 4, iclass 5, count 0 2006.229.12:57:45.55#ibcon#read 4, iclass 5, count 0 2006.229.12:57:45.55#ibcon#about to read 5, iclass 5, count 0 2006.229.12:57:45.55#ibcon#read 5, iclass 5, count 0 2006.229.12:57:45.55#ibcon#about to read 6, iclass 5, count 0 2006.229.12:57:45.55#ibcon#read 6, iclass 5, count 0 2006.229.12:57:45.55#ibcon#end of sib2, iclass 5, count 0 2006.229.12:57:45.55#ibcon#*after write, iclass 5, count 0 2006.229.12:57:45.55#ibcon#*before return 0, iclass 5, count 0 2006.229.12:57:45.55#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:45.55#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:45.55#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:57:45.55#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:57:45.56$vck44/va=2,7 2006.229.12:57:45.56#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.12:57:45.56#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.12:57:45.56#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:45.56#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:45.60#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:45.60#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:45.60#ibcon#enter wrdev, iclass 7, count 2 2006.229.12:57:45.60#ibcon#first serial, iclass 7, count 2 2006.229.12:57:45.60#ibcon#enter sib2, iclass 7, count 2 2006.229.12:57:45.60#ibcon#flushed, iclass 7, count 2 2006.229.12:57:45.60#ibcon#about to write, iclass 7, count 2 2006.229.12:57:45.60#ibcon#wrote, iclass 7, count 2 2006.229.12:57:45.60#ibcon#about to read 3, iclass 7, count 2 2006.229.12:57:45.62#ibcon#read 3, iclass 7, count 2 2006.229.12:57:45.62#ibcon#about to read 4, iclass 7, count 2 2006.229.12:57:45.62#ibcon#read 4, iclass 7, count 2 2006.229.12:57:45.62#ibcon#about to read 5, iclass 7, count 2 2006.229.12:57:45.62#ibcon#read 5, iclass 7, count 2 2006.229.12:57:45.62#ibcon#about to read 6, iclass 7, count 2 2006.229.12:57:45.62#ibcon#read 6, iclass 7, count 2 2006.229.12:57:45.62#ibcon#end of sib2, iclass 7, count 2 2006.229.12:57:45.62#ibcon#*mode == 0, iclass 7, count 2 2006.229.12:57:45.62#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.12:57:45.62#ibcon#[25=AT02-07\r\n] 2006.229.12:57:45.62#ibcon#*before write, iclass 7, count 2 2006.229.12:57:45.62#ibcon#enter sib2, iclass 7, count 2 2006.229.12:57:45.62#ibcon#flushed, iclass 7, count 2 2006.229.12:57:45.62#ibcon#about to write, iclass 7, count 2 2006.229.12:57:45.62#ibcon#wrote, iclass 7, count 2 2006.229.12:57:45.62#ibcon#about to read 3, iclass 7, count 2 2006.229.12:57:45.65#ibcon#read 3, iclass 7, count 2 2006.229.12:57:45.65#ibcon#about to read 4, iclass 7, count 2 2006.229.12:57:45.65#ibcon#read 4, iclass 7, count 2 2006.229.12:57:45.65#ibcon#about to read 5, iclass 7, count 2 2006.229.12:57:45.65#ibcon#read 5, iclass 7, count 2 2006.229.12:57:45.65#ibcon#about to read 6, iclass 7, count 2 2006.229.12:57:45.65#ibcon#read 6, iclass 7, count 2 2006.229.12:57:45.65#ibcon#end of sib2, iclass 7, count 2 2006.229.12:57:45.65#ibcon#*after write, iclass 7, count 2 2006.229.12:57:45.65#ibcon#*before return 0, iclass 7, count 2 2006.229.12:57:45.65#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:45.65#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:45.65#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.12:57:45.65#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:45.65#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:45.77#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:45.77#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:45.77#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:57:45.77#ibcon#first serial, iclass 7, count 0 2006.229.12:57:45.77#ibcon#enter sib2, iclass 7, count 0 2006.229.12:57:45.77#ibcon#flushed, iclass 7, count 0 2006.229.12:57:45.77#ibcon#about to write, iclass 7, count 0 2006.229.12:57:45.77#ibcon#wrote, iclass 7, count 0 2006.229.12:57:45.77#ibcon#about to read 3, iclass 7, count 0 2006.229.12:57:45.79#ibcon#read 3, iclass 7, count 0 2006.229.12:57:45.79#ibcon#about to read 4, iclass 7, count 0 2006.229.12:57:45.79#ibcon#read 4, iclass 7, count 0 2006.229.12:57:45.79#ibcon#about to read 5, iclass 7, count 0 2006.229.12:57:45.79#ibcon#read 5, iclass 7, count 0 2006.229.12:57:45.79#ibcon#about to read 6, iclass 7, count 0 2006.229.12:57:45.79#ibcon#read 6, iclass 7, count 0 2006.229.12:57:45.79#ibcon#end of sib2, iclass 7, count 0 2006.229.12:57:45.79#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:57:45.79#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:57:45.79#ibcon#[25=USB\r\n] 2006.229.12:57:45.79#ibcon#*before write, iclass 7, count 0 2006.229.12:57:45.79#ibcon#enter sib2, iclass 7, count 0 2006.229.12:57:45.79#ibcon#flushed, iclass 7, count 0 2006.229.12:57:45.79#ibcon#about to write, iclass 7, count 0 2006.229.12:57:45.79#ibcon#wrote, iclass 7, count 0 2006.229.12:57:45.79#ibcon#about to read 3, iclass 7, count 0 2006.229.12:57:45.82#ibcon#read 3, iclass 7, count 0 2006.229.12:57:45.82#ibcon#about to read 4, iclass 7, count 0 2006.229.12:57:45.82#ibcon#read 4, iclass 7, count 0 2006.229.12:57:45.82#ibcon#about to read 5, iclass 7, count 0 2006.229.12:57:45.82#ibcon#read 5, iclass 7, count 0 2006.229.12:57:45.82#ibcon#about to read 6, iclass 7, count 0 2006.229.12:57:45.82#ibcon#read 6, iclass 7, count 0 2006.229.12:57:45.82#ibcon#end of sib2, iclass 7, count 0 2006.229.12:57:45.82#ibcon#*after write, iclass 7, count 0 2006.229.12:57:45.82#ibcon#*before return 0, iclass 7, count 0 2006.229.12:57:45.82#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:45.82#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:45.82#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:57:45.82#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:57:45.83$vck44/valo=3,564.99 2006.229.12:57:45.83#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:57:45.83#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:57:45.83#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:45.83#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:45.83#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:45.83#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:45.83#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:57:45.83#ibcon#first serial, iclass 11, count 0 2006.229.12:57:45.83#ibcon#enter sib2, iclass 11, count 0 2006.229.12:57:45.83#ibcon#flushed, iclass 11, count 0 2006.229.12:57:45.83#ibcon#about to write, iclass 11, count 0 2006.229.12:57:45.83#ibcon#wrote, iclass 11, count 0 2006.229.12:57:45.83#ibcon#about to read 3, iclass 11, count 0 2006.229.12:57:45.84#ibcon#read 3, iclass 11, count 0 2006.229.12:57:45.84#ibcon#about to read 4, iclass 11, count 0 2006.229.12:57:45.84#ibcon#read 4, iclass 11, count 0 2006.229.12:57:45.84#ibcon#about to read 5, iclass 11, count 0 2006.229.12:57:45.84#ibcon#read 5, iclass 11, count 0 2006.229.12:57:45.84#ibcon#about to read 6, iclass 11, count 0 2006.229.12:57:45.84#ibcon#read 6, iclass 11, count 0 2006.229.12:57:45.84#ibcon#end of sib2, iclass 11, count 0 2006.229.12:57:45.84#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:57:45.84#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:57:45.84#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:57:45.84#ibcon#*before write, iclass 11, count 0 2006.229.12:57:45.84#ibcon#enter sib2, iclass 11, count 0 2006.229.12:57:45.84#ibcon#flushed, iclass 11, count 0 2006.229.12:57:45.84#ibcon#about to write, iclass 11, count 0 2006.229.12:57:45.84#ibcon#wrote, iclass 11, count 0 2006.229.12:57:45.84#ibcon#about to read 3, iclass 11, count 0 2006.229.12:57:45.88#ibcon#read 3, iclass 11, count 0 2006.229.12:57:45.88#ibcon#about to read 4, iclass 11, count 0 2006.229.12:57:45.88#ibcon#read 4, iclass 11, count 0 2006.229.12:57:45.88#ibcon#about to read 5, iclass 11, count 0 2006.229.12:57:45.88#ibcon#read 5, iclass 11, count 0 2006.229.12:57:45.88#ibcon#about to read 6, iclass 11, count 0 2006.229.12:57:45.88#ibcon#read 6, iclass 11, count 0 2006.229.12:57:45.88#ibcon#end of sib2, iclass 11, count 0 2006.229.12:57:45.88#ibcon#*after write, iclass 11, count 0 2006.229.12:57:45.88#ibcon#*before return 0, iclass 11, count 0 2006.229.12:57:45.88#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:45.88#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:45.88#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:57:45.88#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:57:45.89$vck44/va=3,6 2006.229.12:57:45.89#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.12:57:45.89#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.12:57:45.89#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:45.89#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:45.93#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:45.93#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:45.93#ibcon#enter wrdev, iclass 13, count 2 2006.229.12:57:45.93#ibcon#first serial, iclass 13, count 2 2006.229.12:57:45.93#ibcon#enter sib2, iclass 13, count 2 2006.229.12:57:45.93#ibcon#flushed, iclass 13, count 2 2006.229.12:57:45.93#ibcon#about to write, iclass 13, count 2 2006.229.12:57:45.93#ibcon#wrote, iclass 13, count 2 2006.229.12:57:45.93#ibcon#about to read 3, iclass 13, count 2 2006.229.12:57:45.95#ibcon#read 3, iclass 13, count 2 2006.229.12:57:45.95#ibcon#about to read 4, iclass 13, count 2 2006.229.12:57:45.95#ibcon#read 4, iclass 13, count 2 2006.229.12:57:45.95#ibcon#about to read 5, iclass 13, count 2 2006.229.12:57:45.95#ibcon#read 5, iclass 13, count 2 2006.229.12:57:45.95#ibcon#about to read 6, iclass 13, count 2 2006.229.12:57:45.95#ibcon#read 6, iclass 13, count 2 2006.229.12:57:45.95#ibcon#end of sib2, iclass 13, count 2 2006.229.12:57:45.95#ibcon#*mode == 0, iclass 13, count 2 2006.229.12:57:45.95#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.12:57:45.95#ibcon#[25=AT03-06\r\n] 2006.229.12:57:45.95#ibcon#*before write, iclass 13, count 2 2006.229.12:57:45.95#ibcon#enter sib2, iclass 13, count 2 2006.229.12:57:45.95#ibcon#flushed, iclass 13, count 2 2006.229.12:57:45.95#ibcon#about to write, iclass 13, count 2 2006.229.12:57:45.95#ibcon#wrote, iclass 13, count 2 2006.229.12:57:45.95#ibcon#about to read 3, iclass 13, count 2 2006.229.12:57:45.98#ibcon#read 3, iclass 13, count 2 2006.229.12:57:45.98#ibcon#about to read 4, iclass 13, count 2 2006.229.12:57:45.98#ibcon#read 4, iclass 13, count 2 2006.229.12:57:45.98#ibcon#about to read 5, iclass 13, count 2 2006.229.12:57:45.98#ibcon#read 5, iclass 13, count 2 2006.229.12:57:45.98#ibcon#about to read 6, iclass 13, count 2 2006.229.12:57:45.98#ibcon#read 6, iclass 13, count 2 2006.229.12:57:45.98#ibcon#end of sib2, iclass 13, count 2 2006.229.12:57:45.98#ibcon#*after write, iclass 13, count 2 2006.229.12:57:45.98#ibcon#*before return 0, iclass 13, count 2 2006.229.12:57:45.98#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:45.98#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:45.98#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.12:57:45.98#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:45.98#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:46.10#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:46.10#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:46.10#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:57:46.10#ibcon#first serial, iclass 13, count 0 2006.229.12:57:46.10#ibcon#enter sib2, iclass 13, count 0 2006.229.12:57:46.10#ibcon#flushed, iclass 13, count 0 2006.229.12:57:46.10#ibcon#about to write, iclass 13, count 0 2006.229.12:57:46.10#ibcon#wrote, iclass 13, count 0 2006.229.12:57:46.10#ibcon#about to read 3, iclass 13, count 0 2006.229.12:57:46.12#ibcon#read 3, iclass 13, count 0 2006.229.12:57:46.12#ibcon#about to read 4, iclass 13, count 0 2006.229.12:57:46.12#ibcon#read 4, iclass 13, count 0 2006.229.12:57:46.12#ibcon#about to read 5, iclass 13, count 0 2006.229.12:57:46.12#ibcon#read 5, iclass 13, count 0 2006.229.12:57:46.12#ibcon#about to read 6, iclass 13, count 0 2006.229.12:57:46.12#ibcon#read 6, iclass 13, count 0 2006.229.12:57:46.12#ibcon#end of sib2, iclass 13, count 0 2006.229.12:57:46.12#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:57:46.12#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:57:46.12#ibcon#[25=USB\r\n] 2006.229.12:57:46.12#ibcon#*before write, iclass 13, count 0 2006.229.12:57:46.12#ibcon#enter sib2, iclass 13, count 0 2006.229.12:57:46.12#ibcon#flushed, iclass 13, count 0 2006.229.12:57:46.12#ibcon#about to write, iclass 13, count 0 2006.229.12:57:46.12#ibcon#wrote, iclass 13, count 0 2006.229.12:57:46.12#ibcon#about to read 3, iclass 13, count 0 2006.229.12:57:46.15#ibcon#read 3, iclass 13, count 0 2006.229.12:57:46.15#ibcon#about to read 4, iclass 13, count 0 2006.229.12:57:46.15#ibcon#read 4, iclass 13, count 0 2006.229.12:57:46.15#ibcon#about to read 5, iclass 13, count 0 2006.229.12:57:46.15#ibcon#read 5, iclass 13, count 0 2006.229.12:57:46.15#ibcon#about to read 6, iclass 13, count 0 2006.229.12:57:46.15#ibcon#read 6, iclass 13, count 0 2006.229.12:57:46.15#ibcon#end of sib2, iclass 13, count 0 2006.229.12:57:46.15#ibcon#*after write, iclass 13, count 0 2006.229.12:57:46.15#ibcon#*before return 0, iclass 13, count 0 2006.229.12:57:46.15#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:46.15#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:46.15#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:57:46.15#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:57:46.16$vck44/valo=4,624.99 2006.229.12:57:46.16#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.12:57:46.16#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.12:57:46.16#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:46.16#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:46.16#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:46.16#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:46.16#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:57:46.16#ibcon#first serial, iclass 15, count 0 2006.229.12:57:46.16#ibcon#enter sib2, iclass 15, count 0 2006.229.12:57:46.16#ibcon#flushed, iclass 15, count 0 2006.229.12:57:46.16#ibcon#about to write, iclass 15, count 0 2006.229.12:57:46.16#ibcon#wrote, iclass 15, count 0 2006.229.12:57:46.16#ibcon#about to read 3, iclass 15, count 0 2006.229.12:57:46.17#ibcon#read 3, iclass 15, count 0 2006.229.12:57:46.17#ibcon#about to read 4, iclass 15, count 0 2006.229.12:57:46.17#ibcon#read 4, iclass 15, count 0 2006.229.12:57:46.17#ibcon#about to read 5, iclass 15, count 0 2006.229.12:57:46.17#ibcon#read 5, iclass 15, count 0 2006.229.12:57:46.17#ibcon#about to read 6, iclass 15, count 0 2006.229.12:57:46.17#ibcon#read 6, iclass 15, count 0 2006.229.12:57:46.17#ibcon#end of sib2, iclass 15, count 0 2006.229.12:57:46.17#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:57:46.17#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:57:46.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:57:46.17#ibcon#*before write, iclass 15, count 0 2006.229.12:57:46.17#ibcon#enter sib2, iclass 15, count 0 2006.229.12:57:46.17#ibcon#flushed, iclass 15, count 0 2006.229.12:57:46.17#ibcon#about to write, iclass 15, count 0 2006.229.12:57:46.17#ibcon#wrote, iclass 15, count 0 2006.229.12:57:46.17#ibcon#about to read 3, iclass 15, count 0 2006.229.12:57:46.21#ibcon#read 3, iclass 15, count 0 2006.229.12:57:46.21#ibcon#about to read 4, iclass 15, count 0 2006.229.12:57:46.21#ibcon#read 4, iclass 15, count 0 2006.229.12:57:46.21#ibcon#about to read 5, iclass 15, count 0 2006.229.12:57:46.21#ibcon#read 5, iclass 15, count 0 2006.229.12:57:46.21#ibcon#about to read 6, iclass 15, count 0 2006.229.12:57:46.21#ibcon#read 6, iclass 15, count 0 2006.229.12:57:46.21#ibcon#end of sib2, iclass 15, count 0 2006.229.12:57:46.21#ibcon#*after write, iclass 15, count 0 2006.229.12:57:46.21#ibcon#*before return 0, iclass 15, count 0 2006.229.12:57:46.21#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:46.21#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:46.21#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:57:46.21#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:57:46.22$vck44/va=4,7 2006.229.12:57:46.22#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.12:57:46.22#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.12:57:46.22#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:46.22#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:46.26#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:46.26#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:46.26#ibcon#enter wrdev, iclass 17, count 2 2006.229.12:57:46.26#ibcon#first serial, iclass 17, count 2 2006.229.12:57:46.26#ibcon#enter sib2, iclass 17, count 2 2006.229.12:57:46.26#ibcon#flushed, iclass 17, count 2 2006.229.12:57:46.26#ibcon#about to write, iclass 17, count 2 2006.229.12:57:46.26#ibcon#wrote, iclass 17, count 2 2006.229.12:57:46.26#ibcon#about to read 3, iclass 17, count 2 2006.229.12:57:46.28#ibcon#read 3, iclass 17, count 2 2006.229.12:57:46.28#ibcon#about to read 4, iclass 17, count 2 2006.229.12:57:46.28#ibcon#read 4, iclass 17, count 2 2006.229.12:57:46.28#ibcon#about to read 5, iclass 17, count 2 2006.229.12:57:46.28#ibcon#read 5, iclass 17, count 2 2006.229.12:57:46.28#ibcon#about to read 6, iclass 17, count 2 2006.229.12:57:46.28#ibcon#read 6, iclass 17, count 2 2006.229.12:57:46.28#ibcon#end of sib2, iclass 17, count 2 2006.229.12:57:46.28#ibcon#*mode == 0, iclass 17, count 2 2006.229.12:57:46.28#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.12:57:46.28#ibcon#[25=AT04-07\r\n] 2006.229.12:57:46.28#ibcon#*before write, iclass 17, count 2 2006.229.12:57:46.28#ibcon#enter sib2, iclass 17, count 2 2006.229.12:57:46.28#ibcon#flushed, iclass 17, count 2 2006.229.12:57:46.28#ibcon#about to write, iclass 17, count 2 2006.229.12:57:46.28#ibcon#wrote, iclass 17, count 2 2006.229.12:57:46.28#ibcon#about to read 3, iclass 17, count 2 2006.229.12:57:46.31#ibcon#read 3, iclass 17, count 2 2006.229.12:57:46.31#ibcon#about to read 4, iclass 17, count 2 2006.229.12:57:46.31#ibcon#read 4, iclass 17, count 2 2006.229.12:57:46.31#ibcon#about to read 5, iclass 17, count 2 2006.229.12:57:46.31#ibcon#read 5, iclass 17, count 2 2006.229.12:57:46.31#ibcon#about to read 6, iclass 17, count 2 2006.229.12:57:46.31#ibcon#read 6, iclass 17, count 2 2006.229.12:57:46.31#ibcon#end of sib2, iclass 17, count 2 2006.229.12:57:46.31#ibcon#*after write, iclass 17, count 2 2006.229.12:57:46.31#ibcon#*before return 0, iclass 17, count 2 2006.229.12:57:46.31#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:46.31#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:46.31#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.12:57:46.31#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:46.31#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:46.43#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:46.43#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:46.43#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:57:46.43#ibcon#first serial, iclass 17, count 0 2006.229.12:57:46.43#ibcon#enter sib2, iclass 17, count 0 2006.229.12:57:46.43#ibcon#flushed, iclass 17, count 0 2006.229.12:57:46.43#ibcon#about to write, iclass 17, count 0 2006.229.12:57:46.43#ibcon#wrote, iclass 17, count 0 2006.229.12:57:46.43#ibcon#about to read 3, iclass 17, count 0 2006.229.12:57:46.45#ibcon#read 3, iclass 17, count 0 2006.229.12:57:46.45#ibcon#about to read 4, iclass 17, count 0 2006.229.12:57:46.45#ibcon#read 4, iclass 17, count 0 2006.229.12:57:46.45#ibcon#about to read 5, iclass 17, count 0 2006.229.12:57:46.45#ibcon#read 5, iclass 17, count 0 2006.229.12:57:46.45#ibcon#about to read 6, iclass 17, count 0 2006.229.12:57:46.45#ibcon#read 6, iclass 17, count 0 2006.229.12:57:46.45#ibcon#end of sib2, iclass 17, count 0 2006.229.12:57:46.45#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:57:46.45#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:57:46.45#ibcon#[25=USB\r\n] 2006.229.12:57:46.45#ibcon#*before write, iclass 17, count 0 2006.229.12:57:46.45#ibcon#enter sib2, iclass 17, count 0 2006.229.12:57:46.45#ibcon#flushed, iclass 17, count 0 2006.229.12:57:46.45#ibcon#about to write, iclass 17, count 0 2006.229.12:57:46.45#ibcon#wrote, iclass 17, count 0 2006.229.12:57:46.45#ibcon#about to read 3, iclass 17, count 0 2006.229.12:57:46.48#ibcon#read 3, iclass 17, count 0 2006.229.12:57:46.48#ibcon#about to read 4, iclass 17, count 0 2006.229.12:57:46.48#ibcon#read 4, iclass 17, count 0 2006.229.12:57:46.48#ibcon#about to read 5, iclass 17, count 0 2006.229.12:57:46.48#ibcon#read 5, iclass 17, count 0 2006.229.12:57:46.48#ibcon#about to read 6, iclass 17, count 0 2006.229.12:57:46.48#ibcon#read 6, iclass 17, count 0 2006.229.12:57:46.48#ibcon#end of sib2, iclass 17, count 0 2006.229.12:57:46.48#ibcon#*after write, iclass 17, count 0 2006.229.12:57:46.48#ibcon#*before return 0, iclass 17, count 0 2006.229.12:57:46.48#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:46.48#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:46.48#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:57:46.48#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:57:46.49$vck44/valo=5,734.99 2006.229.12:57:46.49#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:57:46.49#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:57:46.49#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:46.49#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:46.49#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:46.49#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:46.49#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:57:46.49#ibcon#first serial, iclass 19, count 0 2006.229.12:57:46.49#ibcon#enter sib2, iclass 19, count 0 2006.229.12:57:46.49#ibcon#flushed, iclass 19, count 0 2006.229.12:57:46.49#ibcon#about to write, iclass 19, count 0 2006.229.12:57:46.49#ibcon#wrote, iclass 19, count 0 2006.229.12:57:46.49#ibcon#about to read 3, iclass 19, count 0 2006.229.12:57:46.50#ibcon#read 3, iclass 19, count 0 2006.229.12:57:46.50#ibcon#about to read 4, iclass 19, count 0 2006.229.12:57:46.50#ibcon#read 4, iclass 19, count 0 2006.229.12:57:46.50#ibcon#about to read 5, iclass 19, count 0 2006.229.12:57:46.50#ibcon#read 5, iclass 19, count 0 2006.229.12:57:46.50#ibcon#about to read 6, iclass 19, count 0 2006.229.12:57:46.50#ibcon#read 6, iclass 19, count 0 2006.229.12:57:46.50#ibcon#end of sib2, iclass 19, count 0 2006.229.12:57:46.50#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:57:46.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:57:46.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:57:46.50#ibcon#*before write, iclass 19, count 0 2006.229.12:57:46.50#ibcon#enter sib2, iclass 19, count 0 2006.229.12:57:46.50#ibcon#flushed, iclass 19, count 0 2006.229.12:57:46.50#ibcon#about to write, iclass 19, count 0 2006.229.12:57:46.50#ibcon#wrote, iclass 19, count 0 2006.229.12:57:46.50#ibcon#about to read 3, iclass 19, count 0 2006.229.12:57:46.54#ibcon#read 3, iclass 19, count 0 2006.229.12:57:46.54#ibcon#about to read 4, iclass 19, count 0 2006.229.12:57:46.54#ibcon#read 4, iclass 19, count 0 2006.229.12:57:46.54#ibcon#about to read 5, iclass 19, count 0 2006.229.12:57:46.54#ibcon#read 5, iclass 19, count 0 2006.229.12:57:46.54#ibcon#about to read 6, iclass 19, count 0 2006.229.12:57:46.54#ibcon#read 6, iclass 19, count 0 2006.229.12:57:46.54#ibcon#end of sib2, iclass 19, count 0 2006.229.12:57:46.54#ibcon#*after write, iclass 19, count 0 2006.229.12:57:46.54#ibcon#*before return 0, iclass 19, count 0 2006.229.12:57:46.54#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:46.54#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:46.54#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:57:46.54#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:57:46.55$vck44/va=5,4 2006.229.12:57:46.55#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.12:57:46.55#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.12:57:46.55#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:46.55#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:46.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:46.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:46.59#ibcon#enter wrdev, iclass 21, count 2 2006.229.12:57:46.59#ibcon#first serial, iclass 21, count 2 2006.229.12:57:46.59#ibcon#enter sib2, iclass 21, count 2 2006.229.12:57:46.59#ibcon#flushed, iclass 21, count 2 2006.229.12:57:46.59#ibcon#about to write, iclass 21, count 2 2006.229.12:57:46.59#ibcon#wrote, iclass 21, count 2 2006.229.12:57:46.59#ibcon#about to read 3, iclass 21, count 2 2006.229.12:57:46.61#ibcon#read 3, iclass 21, count 2 2006.229.12:57:46.61#ibcon#about to read 4, iclass 21, count 2 2006.229.12:57:46.61#ibcon#read 4, iclass 21, count 2 2006.229.12:57:46.61#ibcon#about to read 5, iclass 21, count 2 2006.229.12:57:46.61#ibcon#read 5, iclass 21, count 2 2006.229.12:57:46.61#ibcon#about to read 6, iclass 21, count 2 2006.229.12:57:46.61#ibcon#read 6, iclass 21, count 2 2006.229.12:57:46.61#ibcon#end of sib2, iclass 21, count 2 2006.229.12:57:46.61#ibcon#*mode == 0, iclass 21, count 2 2006.229.12:57:46.61#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.12:57:46.61#ibcon#[25=AT05-04\r\n] 2006.229.12:57:46.61#ibcon#*before write, iclass 21, count 2 2006.229.12:57:46.61#ibcon#enter sib2, iclass 21, count 2 2006.229.12:57:46.61#ibcon#flushed, iclass 21, count 2 2006.229.12:57:46.61#ibcon#about to write, iclass 21, count 2 2006.229.12:57:46.61#ibcon#wrote, iclass 21, count 2 2006.229.12:57:46.61#ibcon#about to read 3, iclass 21, count 2 2006.229.12:57:46.64#ibcon#read 3, iclass 21, count 2 2006.229.12:57:46.64#ibcon#about to read 4, iclass 21, count 2 2006.229.12:57:46.64#ibcon#read 4, iclass 21, count 2 2006.229.12:57:46.64#ibcon#about to read 5, iclass 21, count 2 2006.229.12:57:46.64#ibcon#read 5, iclass 21, count 2 2006.229.12:57:46.64#ibcon#about to read 6, iclass 21, count 2 2006.229.12:57:46.64#ibcon#read 6, iclass 21, count 2 2006.229.12:57:46.64#ibcon#end of sib2, iclass 21, count 2 2006.229.12:57:46.64#ibcon#*after write, iclass 21, count 2 2006.229.12:57:46.64#ibcon#*before return 0, iclass 21, count 2 2006.229.12:57:46.64#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:46.64#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:46.64#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.12:57:46.64#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:46.64#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:46.76#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:46.76#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:46.76#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:57:46.76#ibcon#first serial, iclass 21, count 0 2006.229.12:57:46.76#ibcon#enter sib2, iclass 21, count 0 2006.229.12:57:46.76#ibcon#flushed, iclass 21, count 0 2006.229.12:57:46.76#ibcon#about to write, iclass 21, count 0 2006.229.12:57:46.76#ibcon#wrote, iclass 21, count 0 2006.229.12:57:46.76#ibcon#about to read 3, iclass 21, count 0 2006.229.12:57:46.78#ibcon#read 3, iclass 21, count 0 2006.229.12:57:46.78#ibcon#about to read 4, iclass 21, count 0 2006.229.12:57:46.78#ibcon#read 4, iclass 21, count 0 2006.229.12:57:46.78#ibcon#about to read 5, iclass 21, count 0 2006.229.12:57:46.78#ibcon#read 5, iclass 21, count 0 2006.229.12:57:46.78#ibcon#about to read 6, iclass 21, count 0 2006.229.12:57:46.78#ibcon#read 6, iclass 21, count 0 2006.229.12:57:46.78#ibcon#end of sib2, iclass 21, count 0 2006.229.12:57:46.78#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:57:46.78#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:57:46.78#ibcon#[25=USB\r\n] 2006.229.12:57:46.78#ibcon#*before write, iclass 21, count 0 2006.229.12:57:46.78#ibcon#enter sib2, iclass 21, count 0 2006.229.12:57:46.78#ibcon#flushed, iclass 21, count 0 2006.229.12:57:46.78#ibcon#about to write, iclass 21, count 0 2006.229.12:57:46.78#ibcon#wrote, iclass 21, count 0 2006.229.12:57:46.78#ibcon#about to read 3, iclass 21, count 0 2006.229.12:57:46.81#ibcon#read 3, iclass 21, count 0 2006.229.12:57:46.81#ibcon#about to read 4, iclass 21, count 0 2006.229.12:57:46.81#ibcon#read 4, iclass 21, count 0 2006.229.12:57:46.81#ibcon#about to read 5, iclass 21, count 0 2006.229.12:57:46.81#ibcon#read 5, iclass 21, count 0 2006.229.12:57:46.81#ibcon#about to read 6, iclass 21, count 0 2006.229.12:57:46.81#ibcon#read 6, iclass 21, count 0 2006.229.12:57:46.81#ibcon#end of sib2, iclass 21, count 0 2006.229.12:57:46.81#ibcon#*after write, iclass 21, count 0 2006.229.12:57:46.81#ibcon#*before return 0, iclass 21, count 0 2006.229.12:57:46.81#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:46.81#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:46.81#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:57:46.81#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:57:46.82$vck44/valo=6,814.99 2006.229.12:57:46.82#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.12:57:46.82#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.12:57:46.82#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:46.82#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:57:46.82#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:57:46.82#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:57:46.82#ibcon#enter wrdev, iclass 23, count 0 2006.229.12:57:46.82#ibcon#first serial, iclass 23, count 0 2006.229.12:57:46.82#ibcon#enter sib2, iclass 23, count 0 2006.229.12:57:46.82#ibcon#flushed, iclass 23, count 0 2006.229.12:57:46.82#ibcon#about to write, iclass 23, count 0 2006.229.12:57:46.82#ibcon#wrote, iclass 23, count 0 2006.229.12:57:46.82#ibcon#about to read 3, iclass 23, count 0 2006.229.12:57:46.83#ibcon#read 3, iclass 23, count 0 2006.229.12:57:46.83#ibcon#about to read 4, iclass 23, count 0 2006.229.12:57:46.83#ibcon#read 4, iclass 23, count 0 2006.229.12:57:46.83#ibcon#about to read 5, iclass 23, count 0 2006.229.12:57:46.83#ibcon#read 5, iclass 23, count 0 2006.229.12:57:46.83#ibcon#about to read 6, iclass 23, count 0 2006.229.12:57:46.83#ibcon#read 6, iclass 23, count 0 2006.229.12:57:46.83#ibcon#end of sib2, iclass 23, count 0 2006.229.12:57:46.83#ibcon#*mode == 0, iclass 23, count 0 2006.229.12:57:46.83#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.12:57:46.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:57:46.83#ibcon#*before write, iclass 23, count 0 2006.229.12:57:46.83#ibcon#enter sib2, iclass 23, count 0 2006.229.12:57:46.83#ibcon#flushed, iclass 23, count 0 2006.229.12:57:46.83#ibcon#about to write, iclass 23, count 0 2006.229.12:57:46.83#ibcon#wrote, iclass 23, count 0 2006.229.12:57:46.83#ibcon#about to read 3, iclass 23, count 0 2006.229.12:57:46.87#ibcon#read 3, iclass 23, count 0 2006.229.12:57:46.87#ibcon#about to read 4, iclass 23, count 0 2006.229.12:57:46.87#ibcon#read 4, iclass 23, count 0 2006.229.12:57:46.87#ibcon#about to read 5, iclass 23, count 0 2006.229.12:57:46.87#ibcon#read 5, iclass 23, count 0 2006.229.12:57:46.87#ibcon#about to read 6, iclass 23, count 0 2006.229.12:57:46.87#ibcon#read 6, iclass 23, count 0 2006.229.12:57:46.87#ibcon#end of sib2, iclass 23, count 0 2006.229.12:57:46.87#ibcon#*after write, iclass 23, count 0 2006.229.12:57:46.87#ibcon#*before return 0, iclass 23, count 0 2006.229.12:57:46.87#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:57:46.87#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.12:57:46.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.12:57:46.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.12:57:46.88$vck44/va=6,4 2006.229.12:57:46.88#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.12:57:46.88#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.12:57:46.88#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:46.88#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:57:46.92#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:57:46.92#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:57:46.92#ibcon#enter wrdev, iclass 25, count 2 2006.229.12:57:46.92#ibcon#first serial, iclass 25, count 2 2006.229.12:57:46.92#ibcon#enter sib2, iclass 25, count 2 2006.229.12:57:46.92#ibcon#flushed, iclass 25, count 2 2006.229.12:57:46.92#ibcon#about to write, iclass 25, count 2 2006.229.12:57:46.92#ibcon#wrote, iclass 25, count 2 2006.229.12:57:46.92#ibcon#about to read 3, iclass 25, count 2 2006.229.12:57:46.94#ibcon#read 3, iclass 25, count 2 2006.229.12:57:46.94#ibcon#about to read 4, iclass 25, count 2 2006.229.12:57:46.94#ibcon#read 4, iclass 25, count 2 2006.229.12:57:46.94#ibcon#about to read 5, iclass 25, count 2 2006.229.12:57:46.94#ibcon#read 5, iclass 25, count 2 2006.229.12:57:46.94#ibcon#about to read 6, iclass 25, count 2 2006.229.12:57:46.94#ibcon#read 6, iclass 25, count 2 2006.229.12:57:46.94#ibcon#end of sib2, iclass 25, count 2 2006.229.12:57:46.94#ibcon#*mode == 0, iclass 25, count 2 2006.229.12:57:46.94#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.12:57:46.94#ibcon#[25=AT06-04\r\n] 2006.229.12:57:46.94#ibcon#*before write, iclass 25, count 2 2006.229.12:57:46.94#ibcon#enter sib2, iclass 25, count 2 2006.229.12:57:46.94#ibcon#flushed, iclass 25, count 2 2006.229.12:57:46.94#ibcon#about to write, iclass 25, count 2 2006.229.12:57:46.94#ibcon#wrote, iclass 25, count 2 2006.229.12:57:46.94#ibcon#about to read 3, iclass 25, count 2 2006.229.12:57:46.97#ibcon#read 3, iclass 25, count 2 2006.229.12:57:46.97#ibcon#about to read 4, iclass 25, count 2 2006.229.12:57:46.97#ibcon#read 4, iclass 25, count 2 2006.229.12:57:46.97#ibcon#about to read 5, iclass 25, count 2 2006.229.12:57:46.97#ibcon#read 5, iclass 25, count 2 2006.229.12:57:46.97#ibcon#about to read 6, iclass 25, count 2 2006.229.12:57:46.97#ibcon#read 6, iclass 25, count 2 2006.229.12:57:46.97#ibcon#end of sib2, iclass 25, count 2 2006.229.12:57:46.97#ibcon#*after write, iclass 25, count 2 2006.229.12:57:47.01#ibcon#*before return 0, iclass 25, count 2 2006.229.12:57:47.01#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:57:47.01#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.12:57:47.01#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.12:57:47.01#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:47.01#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:57:47.12#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:57:47.12#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:57:47.12#ibcon#enter wrdev, iclass 25, count 0 2006.229.12:57:47.12#ibcon#first serial, iclass 25, count 0 2006.229.12:57:47.12#ibcon#enter sib2, iclass 25, count 0 2006.229.12:57:47.12#ibcon#flushed, iclass 25, count 0 2006.229.12:57:47.12#ibcon#about to write, iclass 25, count 0 2006.229.12:57:47.12#ibcon#wrote, iclass 25, count 0 2006.229.12:57:47.12#ibcon#about to read 3, iclass 25, count 0 2006.229.12:57:47.14#ibcon#read 3, iclass 25, count 0 2006.229.12:57:47.14#ibcon#about to read 4, iclass 25, count 0 2006.229.12:57:47.14#ibcon#read 4, iclass 25, count 0 2006.229.12:57:47.14#ibcon#about to read 5, iclass 25, count 0 2006.229.12:57:47.14#ibcon#read 5, iclass 25, count 0 2006.229.12:57:47.14#ibcon#about to read 6, iclass 25, count 0 2006.229.12:57:47.14#ibcon#read 6, iclass 25, count 0 2006.229.12:57:47.14#ibcon#end of sib2, iclass 25, count 0 2006.229.12:57:47.14#ibcon#*mode == 0, iclass 25, count 0 2006.229.12:57:47.14#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.12:57:47.14#ibcon#[25=USB\r\n] 2006.229.12:57:47.14#ibcon#*before write, iclass 25, count 0 2006.229.12:57:47.14#ibcon#enter sib2, iclass 25, count 0 2006.229.12:57:47.14#ibcon#flushed, iclass 25, count 0 2006.229.12:57:47.14#ibcon#about to write, iclass 25, count 0 2006.229.12:57:47.14#ibcon#wrote, iclass 25, count 0 2006.229.12:57:47.14#ibcon#about to read 3, iclass 25, count 0 2006.229.12:57:47.17#ibcon#read 3, iclass 25, count 0 2006.229.12:57:47.17#ibcon#about to read 4, iclass 25, count 0 2006.229.12:57:47.17#ibcon#read 4, iclass 25, count 0 2006.229.12:57:47.17#ibcon#about to read 5, iclass 25, count 0 2006.229.12:57:47.17#ibcon#read 5, iclass 25, count 0 2006.229.12:57:47.17#ibcon#about to read 6, iclass 25, count 0 2006.229.12:57:47.17#ibcon#read 6, iclass 25, count 0 2006.229.12:57:47.17#ibcon#end of sib2, iclass 25, count 0 2006.229.12:57:47.17#ibcon#*after write, iclass 25, count 0 2006.229.12:57:47.17#ibcon#*before return 0, iclass 25, count 0 2006.229.12:57:47.17#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:57:47.17#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.12:57:47.17#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.12:57:47.17#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.12:57:47.18$vck44/valo=7,864.99 2006.229.12:57:47.18#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.12:57:47.18#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.12:57:47.18#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:47.18#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:57:47.18#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:57:47.18#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:57:47.18#ibcon#enter wrdev, iclass 27, count 0 2006.229.12:57:47.18#ibcon#first serial, iclass 27, count 0 2006.229.12:57:47.18#ibcon#enter sib2, iclass 27, count 0 2006.229.12:57:47.18#ibcon#flushed, iclass 27, count 0 2006.229.12:57:47.18#ibcon#about to write, iclass 27, count 0 2006.229.12:57:47.18#ibcon#wrote, iclass 27, count 0 2006.229.12:57:47.18#ibcon#about to read 3, iclass 27, count 0 2006.229.12:57:47.19#ibcon#read 3, iclass 27, count 0 2006.229.12:57:47.19#ibcon#about to read 4, iclass 27, count 0 2006.229.12:57:47.19#ibcon#read 4, iclass 27, count 0 2006.229.12:57:47.19#ibcon#about to read 5, iclass 27, count 0 2006.229.12:57:47.19#ibcon#read 5, iclass 27, count 0 2006.229.12:57:47.19#ibcon#about to read 6, iclass 27, count 0 2006.229.12:57:47.19#ibcon#read 6, iclass 27, count 0 2006.229.12:57:47.19#ibcon#end of sib2, iclass 27, count 0 2006.229.12:57:47.19#ibcon#*mode == 0, iclass 27, count 0 2006.229.12:57:47.19#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.12:57:47.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:57:47.19#ibcon#*before write, iclass 27, count 0 2006.229.12:57:47.19#ibcon#enter sib2, iclass 27, count 0 2006.229.12:57:47.19#ibcon#flushed, iclass 27, count 0 2006.229.12:57:47.19#ibcon#about to write, iclass 27, count 0 2006.229.12:57:47.19#ibcon#wrote, iclass 27, count 0 2006.229.12:57:47.19#ibcon#about to read 3, iclass 27, count 0 2006.229.12:57:47.23#ibcon#read 3, iclass 27, count 0 2006.229.12:57:47.23#ibcon#about to read 4, iclass 27, count 0 2006.229.12:57:47.23#ibcon#read 4, iclass 27, count 0 2006.229.12:57:47.23#ibcon#about to read 5, iclass 27, count 0 2006.229.12:57:47.23#ibcon#read 5, iclass 27, count 0 2006.229.12:57:47.23#ibcon#about to read 6, iclass 27, count 0 2006.229.12:57:47.23#ibcon#read 6, iclass 27, count 0 2006.229.12:57:47.23#ibcon#end of sib2, iclass 27, count 0 2006.229.12:57:47.23#ibcon#*after write, iclass 27, count 0 2006.229.12:57:47.23#ibcon#*before return 0, iclass 27, count 0 2006.229.12:57:47.23#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:57:47.23#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.12:57:47.23#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.12:57:47.23#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.12:57:47.24$vck44/va=7,5 2006.229.12:57:47.24#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.12:57:47.24#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.12:57:47.24#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:47.24#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:47.28#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:47.28#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:47.28#ibcon#enter wrdev, iclass 29, count 2 2006.229.12:57:47.28#ibcon#first serial, iclass 29, count 2 2006.229.12:57:47.28#ibcon#enter sib2, iclass 29, count 2 2006.229.12:57:47.28#ibcon#flushed, iclass 29, count 2 2006.229.12:57:47.28#ibcon#about to write, iclass 29, count 2 2006.229.12:57:47.28#ibcon#wrote, iclass 29, count 2 2006.229.12:57:47.28#ibcon#about to read 3, iclass 29, count 2 2006.229.12:57:47.30#ibcon#read 3, iclass 29, count 2 2006.229.12:57:47.30#ibcon#about to read 4, iclass 29, count 2 2006.229.12:57:47.30#ibcon#read 4, iclass 29, count 2 2006.229.12:57:47.30#ibcon#about to read 5, iclass 29, count 2 2006.229.12:57:47.30#ibcon#read 5, iclass 29, count 2 2006.229.12:57:47.30#ibcon#about to read 6, iclass 29, count 2 2006.229.12:57:47.30#ibcon#read 6, iclass 29, count 2 2006.229.12:57:47.30#ibcon#end of sib2, iclass 29, count 2 2006.229.12:57:47.30#ibcon#*mode == 0, iclass 29, count 2 2006.229.12:57:47.30#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.12:57:47.30#ibcon#[25=AT07-05\r\n] 2006.229.12:57:47.30#ibcon#*before write, iclass 29, count 2 2006.229.12:57:47.30#ibcon#enter sib2, iclass 29, count 2 2006.229.12:57:47.30#ibcon#flushed, iclass 29, count 2 2006.229.12:57:47.30#ibcon#about to write, iclass 29, count 2 2006.229.12:57:47.30#ibcon#wrote, iclass 29, count 2 2006.229.12:57:47.30#ibcon#about to read 3, iclass 29, count 2 2006.229.12:57:47.33#ibcon#read 3, iclass 29, count 2 2006.229.12:57:47.33#ibcon#about to read 4, iclass 29, count 2 2006.229.12:57:47.33#ibcon#read 4, iclass 29, count 2 2006.229.12:57:47.33#ibcon#about to read 5, iclass 29, count 2 2006.229.12:57:47.33#ibcon#read 5, iclass 29, count 2 2006.229.12:57:47.33#ibcon#about to read 6, iclass 29, count 2 2006.229.12:57:47.33#ibcon#read 6, iclass 29, count 2 2006.229.12:57:47.33#ibcon#end of sib2, iclass 29, count 2 2006.229.12:57:47.33#ibcon#*after write, iclass 29, count 2 2006.229.12:57:47.33#ibcon#*before return 0, iclass 29, count 2 2006.229.12:57:47.33#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:47.33#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:47.33#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.12:57:47.33#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:47.33#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:47.45#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:47.45#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:47.45#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:57:47.45#ibcon#first serial, iclass 29, count 0 2006.229.12:57:47.45#ibcon#enter sib2, iclass 29, count 0 2006.229.12:57:47.45#ibcon#flushed, iclass 29, count 0 2006.229.12:57:47.45#ibcon#about to write, iclass 29, count 0 2006.229.12:57:47.45#ibcon#wrote, iclass 29, count 0 2006.229.12:57:47.45#ibcon#about to read 3, iclass 29, count 0 2006.229.12:57:47.47#ibcon#read 3, iclass 29, count 0 2006.229.12:57:47.47#ibcon#about to read 4, iclass 29, count 0 2006.229.12:57:47.47#ibcon#read 4, iclass 29, count 0 2006.229.12:57:47.47#ibcon#about to read 5, iclass 29, count 0 2006.229.12:57:47.47#ibcon#read 5, iclass 29, count 0 2006.229.12:57:47.47#ibcon#about to read 6, iclass 29, count 0 2006.229.12:57:47.47#ibcon#read 6, iclass 29, count 0 2006.229.12:57:47.47#ibcon#end of sib2, iclass 29, count 0 2006.229.12:57:47.47#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:57:47.47#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:57:47.47#ibcon#[25=USB\r\n] 2006.229.12:57:47.47#ibcon#*before write, iclass 29, count 0 2006.229.12:57:47.47#ibcon#enter sib2, iclass 29, count 0 2006.229.12:57:47.47#ibcon#flushed, iclass 29, count 0 2006.229.12:57:47.47#ibcon#about to write, iclass 29, count 0 2006.229.12:57:47.47#ibcon#wrote, iclass 29, count 0 2006.229.12:57:47.47#ibcon#about to read 3, iclass 29, count 0 2006.229.12:57:47.50#ibcon#read 3, iclass 29, count 0 2006.229.12:57:47.50#ibcon#about to read 4, iclass 29, count 0 2006.229.12:57:47.50#ibcon#read 4, iclass 29, count 0 2006.229.12:57:47.50#ibcon#about to read 5, iclass 29, count 0 2006.229.12:57:47.50#ibcon#read 5, iclass 29, count 0 2006.229.12:57:47.50#ibcon#about to read 6, iclass 29, count 0 2006.229.12:57:47.50#ibcon#read 6, iclass 29, count 0 2006.229.12:57:47.50#ibcon#end of sib2, iclass 29, count 0 2006.229.12:57:47.50#ibcon#*after write, iclass 29, count 0 2006.229.12:57:47.50#ibcon#*before return 0, iclass 29, count 0 2006.229.12:57:47.50#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:47.50#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:47.50#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:57:47.50#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:57:47.51$vck44/valo=8,884.99 2006.229.12:57:47.51#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.12:57:47.51#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.12:57:47.51#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:47.51#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:47.51#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:47.51#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:47.51#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:57:47.51#ibcon#first serial, iclass 31, count 0 2006.229.12:57:47.51#ibcon#enter sib2, iclass 31, count 0 2006.229.12:57:47.51#ibcon#flushed, iclass 31, count 0 2006.229.12:57:47.51#ibcon#about to write, iclass 31, count 0 2006.229.12:57:47.51#ibcon#wrote, iclass 31, count 0 2006.229.12:57:47.51#ibcon#about to read 3, iclass 31, count 0 2006.229.12:57:47.52#ibcon#read 3, iclass 31, count 0 2006.229.12:57:47.52#ibcon#about to read 4, iclass 31, count 0 2006.229.12:57:47.52#ibcon#read 4, iclass 31, count 0 2006.229.12:57:47.52#ibcon#about to read 5, iclass 31, count 0 2006.229.12:57:47.52#ibcon#read 5, iclass 31, count 0 2006.229.12:57:47.52#ibcon#about to read 6, iclass 31, count 0 2006.229.12:57:47.52#ibcon#read 6, iclass 31, count 0 2006.229.12:57:47.52#ibcon#end of sib2, iclass 31, count 0 2006.229.12:57:47.52#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:57:47.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:57:47.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:57:47.52#ibcon#*before write, iclass 31, count 0 2006.229.12:57:47.52#ibcon#enter sib2, iclass 31, count 0 2006.229.12:57:47.52#ibcon#flushed, iclass 31, count 0 2006.229.12:57:47.52#ibcon#about to write, iclass 31, count 0 2006.229.12:57:47.52#ibcon#wrote, iclass 31, count 0 2006.229.12:57:47.52#ibcon#about to read 3, iclass 31, count 0 2006.229.12:57:47.56#ibcon#read 3, iclass 31, count 0 2006.229.12:57:47.56#ibcon#about to read 4, iclass 31, count 0 2006.229.12:57:47.56#ibcon#read 4, iclass 31, count 0 2006.229.12:57:47.56#ibcon#about to read 5, iclass 31, count 0 2006.229.12:57:47.56#ibcon#read 5, iclass 31, count 0 2006.229.12:57:47.56#ibcon#about to read 6, iclass 31, count 0 2006.229.12:57:47.56#ibcon#read 6, iclass 31, count 0 2006.229.12:57:47.56#ibcon#end of sib2, iclass 31, count 0 2006.229.12:57:47.56#ibcon#*after write, iclass 31, count 0 2006.229.12:57:47.56#ibcon#*before return 0, iclass 31, count 0 2006.229.12:57:47.56#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:47.56#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:47.56#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:57:47.56#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:57:47.57$vck44/va=8,6 2006.229.12:57:47.57#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.12:57:47.57#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.12:57:47.57#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:47.57#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:47.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:47.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:47.61#ibcon#enter wrdev, iclass 33, count 2 2006.229.12:57:47.61#ibcon#first serial, iclass 33, count 2 2006.229.12:57:47.61#ibcon#enter sib2, iclass 33, count 2 2006.229.12:57:47.61#ibcon#flushed, iclass 33, count 2 2006.229.12:57:47.61#ibcon#about to write, iclass 33, count 2 2006.229.12:57:47.61#ibcon#wrote, iclass 33, count 2 2006.229.12:57:47.61#ibcon#about to read 3, iclass 33, count 2 2006.229.12:57:47.63#ibcon#read 3, iclass 33, count 2 2006.229.12:57:47.63#ibcon#about to read 4, iclass 33, count 2 2006.229.12:57:47.63#ibcon#read 4, iclass 33, count 2 2006.229.12:57:47.63#ibcon#about to read 5, iclass 33, count 2 2006.229.12:57:47.63#ibcon#read 5, iclass 33, count 2 2006.229.12:57:47.63#ibcon#about to read 6, iclass 33, count 2 2006.229.12:57:47.63#ibcon#read 6, iclass 33, count 2 2006.229.12:57:47.63#ibcon#end of sib2, iclass 33, count 2 2006.229.12:57:47.63#ibcon#*mode == 0, iclass 33, count 2 2006.229.12:57:47.63#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.12:57:47.63#ibcon#[25=AT08-06\r\n] 2006.229.12:57:47.63#ibcon#*before write, iclass 33, count 2 2006.229.12:57:47.63#ibcon#enter sib2, iclass 33, count 2 2006.229.12:57:47.63#ibcon#flushed, iclass 33, count 2 2006.229.12:57:47.63#ibcon#about to write, iclass 33, count 2 2006.229.12:57:47.63#ibcon#wrote, iclass 33, count 2 2006.229.12:57:47.63#ibcon#about to read 3, iclass 33, count 2 2006.229.12:57:47.66#ibcon#read 3, iclass 33, count 2 2006.229.12:57:47.66#ibcon#about to read 4, iclass 33, count 2 2006.229.12:57:47.66#ibcon#read 4, iclass 33, count 2 2006.229.12:57:47.66#ibcon#about to read 5, iclass 33, count 2 2006.229.12:57:47.66#ibcon#read 5, iclass 33, count 2 2006.229.12:57:47.66#ibcon#about to read 6, iclass 33, count 2 2006.229.12:57:47.66#ibcon#read 6, iclass 33, count 2 2006.229.12:57:47.66#ibcon#end of sib2, iclass 33, count 2 2006.229.12:57:47.66#ibcon#*after write, iclass 33, count 2 2006.229.12:57:47.66#ibcon#*before return 0, iclass 33, count 2 2006.229.12:57:47.66#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:47.66#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:47.66#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.12:57:47.66#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:47.66#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:47.78#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:47.78#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:47.78#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:57:47.78#ibcon#first serial, iclass 33, count 0 2006.229.12:57:47.78#ibcon#enter sib2, iclass 33, count 0 2006.229.12:57:47.78#ibcon#flushed, iclass 33, count 0 2006.229.12:57:47.78#ibcon#about to write, iclass 33, count 0 2006.229.12:57:47.78#ibcon#wrote, iclass 33, count 0 2006.229.12:57:47.78#ibcon#about to read 3, iclass 33, count 0 2006.229.12:57:47.80#ibcon#read 3, iclass 33, count 0 2006.229.12:57:47.80#ibcon#about to read 4, iclass 33, count 0 2006.229.12:57:47.80#ibcon#read 4, iclass 33, count 0 2006.229.12:57:47.80#ibcon#about to read 5, iclass 33, count 0 2006.229.12:57:47.80#ibcon#read 5, iclass 33, count 0 2006.229.12:57:47.80#ibcon#about to read 6, iclass 33, count 0 2006.229.12:57:47.80#ibcon#read 6, iclass 33, count 0 2006.229.12:57:47.80#ibcon#end of sib2, iclass 33, count 0 2006.229.12:57:47.80#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:57:47.80#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:57:47.80#ibcon#[25=USB\r\n] 2006.229.12:57:47.80#ibcon#*before write, iclass 33, count 0 2006.229.12:57:47.80#ibcon#enter sib2, iclass 33, count 0 2006.229.12:57:47.80#ibcon#flushed, iclass 33, count 0 2006.229.12:57:47.80#ibcon#about to write, iclass 33, count 0 2006.229.12:57:47.80#ibcon#wrote, iclass 33, count 0 2006.229.12:57:47.80#ibcon#about to read 3, iclass 33, count 0 2006.229.12:57:47.83#ibcon#read 3, iclass 33, count 0 2006.229.12:57:47.83#ibcon#about to read 4, iclass 33, count 0 2006.229.12:57:47.83#ibcon#read 4, iclass 33, count 0 2006.229.12:57:47.83#ibcon#about to read 5, iclass 33, count 0 2006.229.12:57:47.83#ibcon#read 5, iclass 33, count 0 2006.229.12:57:47.83#ibcon#about to read 6, iclass 33, count 0 2006.229.12:57:47.83#ibcon#read 6, iclass 33, count 0 2006.229.12:57:47.83#ibcon#end of sib2, iclass 33, count 0 2006.229.12:57:47.83#ibcon#*after write, iclass 33, count 0 2006.229.12:57:47.83#ibcon#*before return 0, iclass 33, count 0 2006.229.12:57:47.83#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:47.83#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:47.83#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:57:47.83#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:57:47.84$vck44/vblo=1,629.99 2006.229.12:57:47.84#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.12:57:47.84#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.12:57:47.84#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:47.84#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:47.84#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:47.84#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:47.84#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:57:47.84#ibcon#first serial, iclass 35, count 0 2006.229.12:57:47.84#ibcon#enter sib2, iclass 35, count 0 2006.229.12:57:47.84#ibcon#flushed, iclass 35, count 0 2006.229.12:57:47.84#ibcon#about to write, iclass 35, count 0 2006.229.12:57:47.84#ibcon#wrote, iclass 35, count 0 2006.229.12:57:47.84#ibcon#about to read 3, iclass 35, count 0 2006.229.12:57:47.85#ibcon#read 3, iclass 35, count 0 2006.229.12:57:47.85#ibcon#about to read 4, iclass 35, count 0 2006.229.12:57:47.85#ibcon#read 4, iclass 35, count 0 2006.229.12:57:47.85#ibcon#about to read 5, iclass 35, count 0 2006.229.12:57:47.85#ibcon#read 5, iclass 35, count 0 2006.229.12:57:47.85#ibcon#about to read 6, iclass 35, count 0 2006.229.12:57:47.85#ibcon#read 6, iclass 35, count 0 2006.229.12:57:47.85#ibcon#end of sib2, iclass 35, count 0 2006.229.12:57:47.85#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:57:47.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:57:47.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:57:47.85#ibcon#*before write, iclass 35, count 0 2006.229.12:57:47.85#ibcon#enter sib2, iclass 35, count 0 2006.229.12:57:47.85#ibcon#flushed, iclass 35, count 0 2006.229.12:57:47.85#ibcon#about to write, iclass 35, count 0 2006.229.12:57:47.85#ibcon#wrote, iclass 35, count 0 2006.229.12:57:47.85#ibcon#about to read 3, iclass 35, count 0 2006.229.12:57:47.89#ibcon#read 3, iclass 35, count 0 2006.229.12:57:47.89#ibcon#about to read 4, iclass 35, count 0 2006.229.12:57:47.89#ibcon#read 4, iclass 35, count 0 2006.229.12:57:47.89#ibcon#about to read 5, iclass 35, count 0 2006.229.12:57:47.89#ibcon#read 5, iclass 35, count 0 2006.229.12:57:47.89#ibcon#about to read 6, iclass 35, count 0 2006.229.12:57:47.89#ibcon#read 6, iclass 35, count 0 2006.229.12:57:47.89#ibcon#end of sib2, iclass 35, count 0 2006.229.12:57:47.89#ibcon#*after write, iclass 35, count 0 2006.229.12:57:47.89#ibcon#*before return 0, iclass 35, count 0 2006.229.12:57:47.89#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:47.89#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:47.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:57:47.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:57:47.90$vck44/vb=1,4 2006.229.12:57:47.90#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.12:57:47.90#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.12:57:47.90#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:47.90#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:57:47.90#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:57:47.90#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:57:47.90#ibcon#enter wrdev, iclass 37, count 2 2006.229.12:57:47.90#ibcon#first serial, iclass 37, count 2 2006.229.12:57:47.90#ibcon#enter sib2, iclass 37, count 2 2006.229.12:57:47.90#ibcon#flushed, iclass 37, count 2 2006.229.12:57:47.90#ibcon#about to write, iclass 37, count 2 2006.229.12:57:47.90#ibcon#wrote, iclass 37, count 2 2006.229.12:57:47.90#ibcon#about to read 3, iclass 37, count 2 2006.229.12:57:47.91#ibcon#read 3, iclass 37, count 2 2006.229.12:57:47.91#ibcon#about to read 4, iclass 37, count 2 2006.229.12:57:47.91#ibcon#read 4, iclass 37, count 2 2006.229.12:57:47.91#ibcon#about to read 5, iclass 37, count 2 2006.229.12:57:47.91#ibcon#read 5, iclass 37, count 2 2006.229.12:57:47.91#ibcon#about to read 6, iclass 37, count 2 2006.229.12:57:47.91#ibcon#read 6, iclass 37, count 2 2006.229.12:57:47.91#ibcon#end of sib2, iclass 37, count 2 2006.229.12:57:47.91#ibcon#*mode == 0, iclass 37, count 2 2006.229.12:57:47.91#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.12:57:47.91#ibcon#[27=AT01-04\r\n] 2006.229.12:57:47.91#ibcon#*before write, iclass 37, count 2 2006.229.12:57:47.91#ibcon#enter sib2, iclass 37, count 2 2006.229.12:57:47.91#ibcon#flushed, iclass 37, count 2 2006.229.12:57:47.91#ibcon#about to write, iclass 37, count 2 2006.229.12:57:47.91#ibcon#wrote, iclass 37, count 2 2006.229.12:57:47.91#ibcon#about to read 3, iclass 37, count 2 2006.229.12:57:47.94#ibcon#read 3, iclass 37, count 2 2006.229.12:57:47.94#ibcon#about to read 4, iclass 37, count 2 2006.229.12:57:47.94#ibcon#read 4, iclass 37, count 2 2006.229.12:57:47.94#ibcon#about to read 5, iclass 37, count 2 2006.229.12:57:47.94#ibcon#read 5, iclass 37, count 2 2006.229.12:57:47.94#ibcon#about to read 6, iclass 37, count 2 2006.229.12:57:47.94#ibcon#read 6, iclass 37, count 2 2006.229.12:57:47.94#ibcon#end of sib2, iclass 37, count 2 2006.229.12:57:47.94#ibcon#*after write, iclass 37, count 2 2006.229.12:57:47.94#ibcon#*before return 0, iclass 37, count 2 2006.229.12:57:47.94#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:57:47.94#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.12:57:47.94#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.12:57:47.94#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:47.94#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:57:48.06#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:57:48.06#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:57:48.06#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:57:48.06#ibcon#first serial, iclass 37, count 0 2006.229.12:57:48.06#ibcon#enter sib2, iclass 37, count 0 2006.229.12:57:48.06#ibcon#flushed, iclass 37, count 0 2006.229.12:57:48.06#ibcon#about to write, iclass 37, count 0 2006.229.12:57:48.06#ibcon#wrote, iclass 37, count 0 2006.229.12:57:48.06#ibcon#about to read 3, iclass 37, count 0 2006.229.12:57:48.08#ibcon#read 3, iclass 37, count 0 2006.229.12:57:48.08#ibcon#about to read 4, iclass 37, count 0 2006.229.12:57:48.08#ibcon#read 4, iclass 37, count 0 2006.229.12:57:48.08#ibcon#about to read 5, iclass 37, count 0 2006.229.12:57:48.08#ibcon#read 5, iclass 37, count 0 2006.229.12:57:48.08#ibcon#about to read 6, iclass 37, count 0 2006.229.12:57:48.08#ibcon#read 6, iclass 37, count 0 2006.229.12:57:48.08#ibcon#end of sib2, iclass 37, count 0 2006.229.12:57:48.08#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:57:48.08#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:57:48.08#ibcon#[27=USB\r\n] 2006.229.12:57:48.08#ibcon#*before write, iclass 37, count 0 2006.229.12:57:48.08#ibcon#enter sib2, iclass 37, count 0 2006.229.12:57:48.08#ibcon#flushed, iclass 37, count 0 2006.229.12:57:48.08#ibcon#about to write, iclass 37, count 0 2006.229.12:57:48.08#ibcon#wrote, iclass 37, count 0 2006.229.12:57:48.08#ibcon#about to read 3, iclass 37, count 0 2006.229.12:57:48.11#ibcon#read 3, iclass 37, count 0 2006.229.12:57:48.11#ibcon#about to read 4, iclass 37, count 0 2006.229.12:57:48.11#ibcon#read 4, iclass 37, count 0 2006.229.12:57:48.11#ibcon#about to read 5, iclass 37, count 0 2006.229.12:57:48.11#ibcon#read 5, iclass 37, count 0 2006.229.12:57:48.11#ibcon#about to read 6, iclass 37, count 0 2006.229.12:57:48.11#ibcon#read 6, iclass 37, count 0 2006.229.12:57:48.11#ibcon#end of sib2, iclass 37, count 0 2006.229.12:57:48.11#ibcon#*after write, iclass 37, count 0 2006.229.12:57:48.11#ibcon#*before return 0, iclass 37, count 0 2006.229.12:57:48.11#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:57:48.11#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.12:57:48.11#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:57:48.11#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:57:48.12$vck44/vblo=2,634.99 2006.229.12:57:48.12#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.12:57:48.12#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.12:57:48.12#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:48.12#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:48.12#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:48.12#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:48.12#ibcon#enter wrdev, iclass 39, count 0 2006.229.12:57:48.12#ibcon#first serial, iclass 39, count 0 2006.229.12:57:48.12#ibcon#enter sib2, iclass 39, count 0 2006.229.12:57:48.12#ibcon#flushed, iclass 39, count 0 2006.229.12:57:48.12#ibcon#about to write, iclass 39, count 0 2006.229.12:57:48.12#ibcon#wrote, iclass 39, count 0 2006.229.12:57:48.12#ibcon#about to read 3, iclass 39, count 0 2006.229.12:57:48.13#ibcon#read 3, iclass 39, count 0 2006.229.12:57:48.13#ibcon#about to read 4, iclass 39, count 0 2006.229.12:57:48.13#ibcon#read 4, iclass 39, count 0 2006.229.12:57:48.13#ibcon#about to read 5, iclass 39, count 0 2006.229.12:57:48.13#ibcon#read 5, iclass 39, count 0 2006.229.12:57:48.13#ibcon#about to read 6, iclass 39, count 0 2006.229.12:57:48.13#ibcon#read 6, iclass 39, count 0 2006.229.12:57:48.13#ibcon#end of sib2, iclass 39, count 0 2006.229.12:57:48.13#ibcon#*mode == 0, iclass 39, count 0 2006.229.12:57:48.13#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.12:57:48.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:57:48.13#ibcon#*before write, iclass 39, count 0 2006.229.12:57:48.13#ibcon#enter sib2, iclass 39, count 0 2006.229.12:57:48.13#ibcon#flushed, iclass 39, count 0 2006.229.12:57:48.13#ibcon#about to write, iclass 39, count 0 2006.229.12:57:48.13#ibcon#wrote, iclass 39, count 0 2006.229.12:57:48.13#ibcon#about to read 3, iclass 39, count 0 2006.229.12:57:48.17#ibcon#read 3, iclass 39, count 0 2006.229.12:57:48.17#ibcon#about to read 4, iclass 39, count 0 2006.229.12:57:48.17#ibcon#read 4, iclass 39, count 0 2006.229.12:57:48.17#ibcon#about to read 5, iclass 39, count 0 2006.229.12:57:48.17#ibcon#read 5, iclass 39, count 0 2006.229.12:57:48.17#ibcon#about to read 6, iclass 39, count 0 2006.229.12:57:48.17#ibcon#read 6, iclass 39, count 0 2006.229.12:57:48.17#ibcon#end of sib2, iclass 39, count 0 2006.229.12:57:48.17#ibcon#*after write, iclass 39, count 0 2006.229.12:57:48.17#ibcon#*before return 0, iclass 39, count 0 2006.229.12:57:48.17#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:48.17#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.12:57:48.17#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.12:57:48.17#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.12:57:48.18$vck44/vb=2,4 2006.229.12:57:48.18#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.12:57:48.18#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.12:57:48.18#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:48.18#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:48.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:48.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:48.22#ibcon#enter wrdev, iclass 3, count 2 2006.229.12:57:48.22#ibcon#first serial, iclass 3, count 2 2006.229.12:57:48.22#ibcon#enter sib2, iclass 3, count 2 2006.229.12:57:48.22#ibcon#flushed, iclass 3, count 2 2006.229.12:57:48.22#ibcon#about to write, iclass 3, count 2 2006.229.12:57:48.22#ibcon#wrote, iclass 3, count 2 2006.229.12:57:48.22#ibcon#about to read 3, iclass 3, count 2 2006.229.12:57:48.24#ibcon#read 3, iclass 3, count 2 2006.229.12:57:48.24#ibcon#about to read 4, iclass 3, count 2 2006.229.12:57:48.24#ibcon#read 4, iclass 3, count 2 2006.229.12:57:48.24#ibcon#about to read 5, iclass 3, count 2 2006.229.12:57:48.24#ibcon#read 5, iclass 3, count 2 2006.229.12:57:48.24#ibcon#about to read 6, iclass 3, count 2 2006.229.12:57:48.24#ibcon#read 6, iclass 3, count 2 2006.229.12:57:48.24#ibcon#end of sib2, iclass 3, count 2 2006.229.12:57:48.24#ibcon#*mode == 0, iclass 3, count 2 2006.229.12:57:48.24#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.12:57:48.24#ibcon#[27=AT02-04\r\n] 2006.229.12:57:48.24#ibcon#*before write, iclass 3, count 2 2006.229.12:57:48.24#ibcon#enter sib2, iclass 3, count 2 2006.229.12:57:48.24#ibcon#flushed, iclass 3, count 2 2006.229.12:57:48.24#ibcon#about to write, iclass 3, count 2 2006.229.12:57:48.24#ibcon#wrote, iclass 3, count 2 2006.229.12:57:48.24#ibcon#about to read 3, iclass 3, count 2 2006.229.12:57:48.27#ibcon#read 3, iclass 3, count 2 2006.229.12:57:48.27#ibcon#about to read 4, iclass 3, count 2 2006.229.12:57:48.27#ibcon#read 4, iclass 3, count 2 2006.229.12:57:48.27#ibcon#about to read 5, iclass 3, count 2 2006.229.12:57:48.27#ibcon#read 5, iclass 3, count 2 2006.229.12:57:48.27#ibcon#about to read 6, iclass 3, count 2 2006.229.12:57:48.27#ibcon#read 6, iclass 3, count 2 2006.229.12:57:48.27#ibcon#end of sib2, iclass 3, count 2 2006.229.12:57:48.27#ibcon#*after write, iclass 3, count 2 2006.229.12:57:48.27#ibcon#*before return 0, iclass 3, count 2 2006.229.12:57:48.27#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:48.27#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.12:57:48.27#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.12:57:48.27#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:48.27#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:48.39#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:48.39#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:48.39#ibcon#enter wrdev, iclass 3, count 0 2006.229.12:57:48.39#ibcon#first serial, iclass 3, count 0 2006.229.12:57:48.39#ibcon#enter sib2, iclass 3, count 0 2006.229.12:57:48.39#ibcon#flushed, iclass 3, count 0 2006.229.12:57:48.39#ibcon#about to write, iclass 3, count 0 2006.229.12:57:48.39#ibcon#wrote, iclass 3, count 0 2006.229.12:57:48.39#ibcon#about to read 3, iclass 3, count 0 2006.229.12:57:48.41#ibcon#read 3, iclass 3, count 0 2006.229.12:57:48.41#ibcon#about to read 4, iclass 3, count 0 2006.229.12:57:48.41#ibcon#read 4, iclass 3, count 0 2006.229.12:57:48.41#ibcon#about to read 5, iclass 3, count 0 2006.229.12:57:48.41#ibcon#read 5, iclass 3, count 0 2006.229.12:57:48.41#ibcon#about to read 6, iclass 3, count 0 2006.229.12:57:48.41#ibcon#read 6, iclass 3, count 0 2006.229.12:57:48.41#ibcon#end of sib2, iclass 3, count 0 2006.229.12:57:48.41#ibcon#*mode == 0, iclass 3, count 0 2006.229.12:57:48.41#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.12:57:48.41#ibcon#[27=USB\r\n] 2006.229.12:57:48.41#ibcon#*before write, iclass 3, count 0 2006.229.12:57:48.41#ibcon#enter sib2, iclass 3, count 0 2006.229.12:57:48.41#ibcon#flushed, iclass 3, count 0 2006.229.12:57:48.41#ibcon#about to write, iclass 3, count 0 2006.229.12:57:48.41#ibcon#wrote, iclass 3, count 0 2006.229.12:57:48.41#ibcon#about to read 3, iclass 3, count 0 2006.229.12:57:48.44#ibcon#read 3, iclass 3, count 0 2006.229.12:57:48.44#ibcon#about to read 4, iclass 3, count 0 2006.229.12:57:48.44#ibcon#read 4, iclass 3, count 0 2006.229.12:57:48.44#ibcon#about to read 5, iclass 3, count 0 2006.229.12:57:48.44#ibcon#read 5, iclass 3, count 0 2006.229.12:57:48.44#ibcon#about to read 6, iclass 3, count 0 2006.229.12:57:48.44#ibcon#read 6, iclass 3, count 0 2006.229.12:57:48.44#ibcon#end of sib2, iclass 3, count 0 2006.229.12:57:48.44#ibcon#*after write, iclass 3, count 0 2006.229.12:57:48.44#ibcon#*before return 0, iclass 3, count 0 2006.229.12:57:48.44#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:48.44#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.12:57:48.44#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.12:57:48.44#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.12:57:48.45$vck44/vblo=3,649.99 2006.229.12:57:48.45#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.12:57:48.45#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.12:57:48.45#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:48.45#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:48.45#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:48.45#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:48.45#ibcon#enter wrdev, iclass 5, count 0 2006.229.12:57:48.45#ibcon#first serial, iclass 5, count 0 2006.229.12:57:48.45#ibcon#enter sib2, iclass 5, count 0 2006.229.12:57:48.45#ibcon#flushed, iclass 5, count 0 2006.229.12:57:48.45#ibcon#about to write, iclass 5, count 0 2006.229.12:57:48.45#ibcon#wrote, iclass 5, count 0 2006.229.12:57:48.45#ibcon#about to read 3, iclass 5, count 0 2006.229.12:57:48.46#ibcon#read 3, iclass 5, count 0 2006.229.12:57:48.46#ibcon#about to read 4, iclass 5, count 0 2006.229.12:57:48.46#ibcon#read 4, iclass 5, count 0 2006.229.12:57:48.46#ibcon#about to read 5, iclass 5, count 0 2006.229.12:57:48.46#ibcon#read 5, iclass 5, count 0 2006.229.12:57:48.46#ibcon#about to read 6, iclass 5, count 0 2006.229.12:57:48.46#ibcon#read 6, iclass 5, count 0 2006.229.12:57:48.46#ibcon#end of sib2, iclass 5, count 0 2006.229.12:57:48.46#ibcon#*mode == 0, iclass 5, count 0 2006.229.12:57:48.46#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.12:57:48.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:57:48.46#ibcon#*before write, iclass 5, count 0 2006.229.12:57:48.46#ibcon#enter sib2, iclass 5, count 0 2006.229.12:57:48.46#ibcon#flushed, iclass 5, count 0 2006.229.12:57:48.46#ibcon#about to write, iclass 5, count 0 2006.229.12:57:48.46#ibcon#wrote, iclass 5, count 0 2006.229.12:57:48.46#ibcon#about to read 3, iclass 5, count 0 2006.229.12:57:48.50#ibcon#read 3, iclass 5, count 0 2006.229.12:57:48.50#ibcon#about to read 4, iclass 5, count 0 2006.229.12:57:48.50#ibcon#read 4, iclass 5, count 0 2006.229.12:57:48.50#ibcon#about to read 5, iclass 5, count 0 2006.229.12:57:48.50#ibcon#read 5, iclass 5, count 0 2006.229.12:57:48.50#ibcon#about to read 6, iclass 5, count 0 2006.229.12:57:48.50#ibcon#read 6, iclass 5, count 0 2006.229.12:57:48.50#ibcon#end of sib2, iclass 5, count 0 2006.229.12:57:48.50#ibcon#*after write, iclass 5, count 0 2006.229.12:57:48.50#ibcon#*before return 0, iclass 5, count 0 2006.229.12:57:48.50#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:48.50#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.12:57:48.50#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.12:57:48.50#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.12:57:48.51$vck44/vb=3,4 2006.229.12:57:48.51#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.12:57:48.51#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.12:57:48.51#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:48.51#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:48.55#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:48.55#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:48.55#ibcon#enter wrdev, iclass 7, count 2 2006.229.12:57:48.55#ibcon#first serial, iclass 7, count 2 2006.229.12:57:48.55#ibcon#enter sib2, iclass 7, count 2 2006.229.12:57:48.55#ibcon#flushed, iclass 7, count 2 2006.229.12:57:48.55#ibcon#about to write, iclass 7, count 2 2006.229.12:57:48.55#ibcon#wrote, iclass 7, count 2 2006.229.12:57:48.55#ibcon#about to read 3, iclass 7, count 2 2006.229.12:57:48.57#ibcon#read 3, iclass 7, count 2 2006.229.12:57:48.57#ibcon#about to read 4, iclass 7, count 2 2006.229.12:57:48.57#ibcon#read 4, iclass 7, count 2 2006.229.12:57:48.57#ibcon#about to read 5, iclass 7, count 2 2006.229.12:57:48.57#ibcon#read 5, iclass 7, count 2 2006.229.12:57:48.57#ibcon#about to read 6, iclass 7, count 2 2006.229.12:57:48.57#ibcon#read 6, iclass 7, count 2 2006.229.12:57:48.57#ibcon#end of sib2, iclass 7, count 2 2006.229.12:57:48.57#ibcon#*mode == 0, iclass 7, count 2 2006.229.12:57:48.57#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.12:57:48.57#ibcon#[27=AT03-04\r\n] 2006.229.12:57:48.57#ibcon#*before write, iclass 7, count 2 2006.229.12:57:48.57#ibcon#enter sib2, iclass 7, count 2 2006.229.12:57:48.57#ibcon#flushed, iclass 7, count 2 2006.229.12:57:48.57#ibcon#about to write, iclass 7, count 2 2006.229.12:57:48.57#ibcon#wrote, iclass 7, count 2 2006.229.12:57:48.57#ibcon#about to read 3, iclass 7, count 2 2006.229.12:57:48.60#ibcon#read 3, iclass 7, count 2 2006.229.12:57:48.60#ibcon#about to read 4, iclass 7, count 2 2006.229.12:57:48.60#ibcon#read 4, iclass 7, count 2 2006.229.12:57:48.60#ibcon#about to read 5, iclass 7, count 2 2006.229.12:57:48.60#ibcon#read 5, iclass 7, count 2 2006.229.12:57:48.60#ibcon#about to read 6, iclass 7, count 2 2006.229.12:57:48.60#ibcon#read 6, iclass 7, count 2 2006.229.12:57:48.60#ibcon#end of sib2, iclass 7, count 2 2006.229.12:57:48.60#ibcon#*after write, iclass 7, count 2 2006.229.12:57:48.60#ibcon#*before return 0, iclass 7, count 2 2006.229.12:57:48.60#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:48.60#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.12:57:48.60#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.12:57:48.60#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:48.60#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:48.72#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:48.72#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:48.72#ibcon#enter wrdev, iclass 7, count 0 2006.229.12:57:48.72#ibcon#first serial, iclass 7, count 0 2006.229.12:57:48.72#ibcon#enter sib2, iclass 7, count 0 2006.229.12:57:48.72#ibcon#flushed, iclass 7, count 0 2006.229.12:57:48.72#ibcon#about to write, iclass 7, count 0 2006.229.12:57:48.72#ibcon#wrote, iclass 7, count 0 2006.229.12:57:48.72#ibcon#about to read 3, iclass 7, count 0 2006.229.12:57:48.74#ibcon#read 3, iclass 7, count 0 2006.229.12:57:48.74#ibcon#about to read 4, iclass 7, count 0 2006.229.12:57:48.74#ibcon#read 4, iclass 7, count 0 2006.229.12:57:48.74#ibcon#about to read 5, iclass 7, count 0 2006.229.12:57:48.74#ibcon#read 5, iclass 7, count 0 2006.229.12:57:48.74#ibcon#about to read 6, iclass 7, count 0 2006.229.12:57:48.74#ibcon#read 6, iclass 7, count 0 2006.229.12:57:48.74#ibcon#end of sib2, iclass 7, count 0 2006.229.12:57:48.74#ibcon#*mode == 0, iclass 7, count 0 2006.229.12:57:48.74#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.12:57:48.74#ibcon#[27=USB\r\n] 2006.229.12:57:48.74#ibcon#*before write, iclass 7, count 0 2006.229.12:57:48.74#ibcon#enter sib2, iclass 7, count 0 2006.229.12:57:48.74#ibcon#flushed, iclass 7, count 0 2006.229.12:57:48.74#ibcon#about to write, iclass 7, count 0 2006.229.12:57:48.74#ibcon#wrote, iclass 7, count 0 2006.229.12:57:48.74#ibcon#about to read 3, iclass 7, count 0 2006.229.12:57:48.77#ibcon#read 3, iclass 7, count 0 2006.229.12:57:48.77#ibcon#about to read 4, iclass 7, count 0 2006.229.12:57:48.77#ibcon#read 4, iclass 7, count 0 2006.229.12:57:48.77#ibcon#about to read 5, iclass 7, count 0 2006.229.12:57:48.77#ibcon#read 5, iclass 7, count 0 2006.229.12:57:48.77#ibcon#about to read 6, iclass 7, count 0 2006.229.12:57:48.77#ibcon#read 6, iclass 7, count 0 2006.229.12:57:48.77#ibcon#end of sib2, iclass 7, count 0 2006.229.12:57:48.77#ibcon#*after write, iclass 7, count 0 2006.229.12:57:48.77#ibcon#*before return 0, iclass 7, count 0 2006.229.12:57:48.77#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:48.77#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.12:57:48.77#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.12:57:48.77#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.12:57:48.78$vck44/vblo=4,679.99 2006.229.12:57:48.78#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.12:57:48.78#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.12:57:48.78#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:48.78#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:48.78#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:48.78#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:48.78#ibcon#enter wrdev, iclass 11, count 0 2006.229.12:57:48.78#ibcon#first serial, iclass 11, count 0 2006.229.12:57:48.78#ibcon#enter sib2, iclass 11, count 0 2006.229.12:57:48.78#ibcon#flushed, iclass 11, count 0 2006.229.12:57:48.78#ibcon#about to write, iclass 11, count 0 2006.229.12:57:48.78#ibcon#wrote, iclass 11, count 0 2006.229.12:57:48.78#ibcon#about to read 3, iclass 11, count 0 2006.229.12:57:48.79#ibcon#read 3, iclass 11, count 0 2006.229.12:57:48.79#ibcon#about to read 4, iclass 11, count 0 2006.229.12:57:48.79#ibcon#read 4, iclass 11, count 0 2006.229.12:57:48.79#ibcon#about to read 5, iclass 11, count 0 2006.229.12:57:48.79#ibcon#read 5, iclass 11, count 0 2006.229.12:57:48.79#ibcon#about to read 6, iclass 11, count 0 2006.229.12:57:48.79#ibcon#read 6, iclass 11, count 0 2006.229.12:57:48.79#ibcon#end of sib2, iclass 11, count 0 2006.229.12:57:48.79#ibcon#*mode == 0, iclass 11, count 0 2006.229.12:57:48.79#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.12:57:48.79#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:57:48.79#ibcon#*before write, iclass 11, count 0 2006.229.12:57:48.79#ibcon#enter sib2, iclass 11, count 0 2006.229.12:57:48.79#ibcon#flushed, iclass 11, count 0 2006.229.12:57:48.79#ibcon#about to write, iclass 11, count 0 2006.229.12:57:48.79#ibcon#wrote, iclass 11, count 0 2006.229.12:57:48.79#ibcon#about to read 3, iclass 11, count 0 2006.229.12:57:48.83#ibcon#read 3, iclass 11, count 0 2006.229.12:57:48.83#ibcon#about to read 4, iclass 11, count 0 2006.229.12:57:48.83#ibcon#read 4, iclass 11, count 0 2006.229.12:57:48.83#ibcon#about to read 5, iclass 11, count 0 2006.229.12:57:48.83#ibcon#read 5, iclass 11, count 0 2006.229.12:57:48.83#ibcon#about to read 6, iclass 11, count 0 2006.229.12:57:48.83#ibcon#read 6, iclass 11, count 0 2006.229.12:57:48.83#ibcon#end of sib2, iclass 11, count 0 2006.229.12:57:48.83#ibcon#*after write, iclass 11, count 0 2006.229.12:57:48.83#ibcon#*before return 0, iclass 11, count 0 2006.229.12:57:48.83#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:48.83#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.12:57:48.83#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.12:57:48.83#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.12:57:48.84$vck44/vb=4,4 2006.229.12:57:48.84#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.12:57:48.84#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.12:57:48.84#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:48.84#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:48.88#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:48.88#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:48.88#ibcon#enter wrdev, iclass 13, count 2 2006.229.12:57:48.88#ibcon#first serial, iclass 13, count 2 2006.229.12:57:48.88#ibcon#enter sib2, iclass 13, count 2 2006.229.12:57:48.88#ibcon#flushed, iclass 13, count 2 2006.229.12:57:48.88#ibcon#about to write, iclass 13, count 2 2006.229.12:57:48.88#ibcon#wrote, iclass 13, count 2 2006.229.12:57:48.88#ibcon#about to read 3, iclass 13, count 2 2006.229.12:57:48.90#ibcon#read 3, iclass 13, count 2 2006.229.12:57:48.90#ibcon#about to read 4, iclass 13, count 2 2006.229.12:57:48.90#ibcon#read 4, iclass 13, count 2 2006.229.12:57:48.90#ibcon#about to read 5, iclass 13, count 2 2006.229.12:57:48.90#ibcon#read 5, iclass 13, count 2 2006.229.12:57:48.90#ibcon#about to read 6, iclass 13, count 2 2006.229.12:57:48.90#ibcon#read 6, iclass 13, count 2 2006.229.12:57:48.90#ibcon#end of sib2, iclass 13, count 2 2006.229.12:57:48.90#ibcon#*mode == 0, iclass 13, count 2 2006.229.12:57:48.90#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.12:57:48.90#ibcon#[27=AT04-04\r\n] 2006.229.12:57:48.90#ibcon#*before write, iclass 13, count 2 2006.229.12:57:48.90#ibcon#enter sib2, iclass 13, count 2 2006.229.12:57:48.90#ibcon#flushed, iclass 13, count 2 2006.229.12:57:48.90#ibcon#about to write, iclass 13, count 2 2006.229.12:57:48.90#ibcon#wrote, iclass 13, count 2 2006.229.12:57:48.90#ibcon#about to read 3, iclass 13, count 2 2006.229.12:57:48.93#ibcon#read 3, iclass 13, count 2 2006.229.12:57:48.93#ibcon#about to read 4, iclass 13, count 2 2006.229.12:57:48.93#ibcon#read 4, iclass 13, count 2 2006.229.12:57:48.93#ibcon#about to read 5, iclass 13, count 2 2006.229.12:57:48.93#ibcon#read 5, iclass 13, count 2 2006.229.12:57:48.93#ibcon#about to read 6, iclass 13, count 2 2006.229.12:57:48.93#ibcon#read 6, iclass 13, count 2 2006.229.12:57:48.93#ibcon#end of sib2, iclass 13, count 2 2006.229.12:57:48.93#ibcon#*after write, iclass 13, count 2 2006.229.12:57:48.93#ibcon#*before return 0, iclass 13, count 2 2006.229.12:57:48.93#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:48.93#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.12:57:48.93#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.12:57:48.93#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:48.93#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:49.05#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:49.05#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:49.05#ibcon#enter wrdev, iclass 13, count 0 2006.229.12:57:49.05#ibcon#first serial, iclass 13, count 0 2006.229.12:57:49.05#ibcon#enter sib2, iclass 13, count 0 2006.229.12:57:49.05#ibcon#flushed, iclass 13, count 0 2006.229.12:57:49.05#ibcon#about to write, iclass 13, count 0 2006.229.12:57:49.05#ibcon#wrote, iclass 13, count 0 2006.229.12:57:49.05#ibcon#about to read 3, iclass 13, count 0 2006.229.12:57:49.07#ibcon#read 3, iclass 13, count 0 2006.229.12:57:49.07#ibcon#about to read 4, iclass 13, count 0 2006.229.12:57:49.07#ibcon#read 4, iclass 13, count 0 2006.229.12:57:49.07#ibcon#about to read 5, iclass 13, count 0 2006.229.12:57:49.07#ibcon#read 5, iclass 13, count 0 2006.229.12:57:49.07#ibcon#about to read 6, iclass 13, count 0 2006.229.12:57:49.07#ibcon#read 6, iclass 13, count 0 2006.229.12:57:49.07#ibcon#end of sib2, iclass 13, count 0 2006.229.12:57:49.07#ibcon#*mode == 0, iclass 13, count 0 2006.229.12:57:49.07#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.12:57:49.07#ibcon#[27=USB\r\n] 2006.229.12:57:49.07#ibcon#*before write, iclass 13, count 0 2006.229.12:57:49.07#ibcon#enter sib2, iclass 13, count 0 2006.229.12:57:49.07#ibcon#flushed, iclass 13, count 0 2006.229.12:57:49.07#ibcon#about to write, iclass 13, count 0 2006.229.12:57:49.07#ibcon#wrote, iclass 13, count 0 2006.229.12:57:49.07#ibcon#about to read 3, iclass 13, count 0 2006.229.12:57:49.10#ibcon#read 3, iclass 13, count 0 2006.229.12:57:49.10#ibcon#about to read 4, iclass 13, count 0 2006.229.12:57:49.10#ibcon#read 4, iclass 13, count 0 2006.229.12:57:49.10#ibcon#about to read 5, iclass 13, count 0 2006.229.12:57:49.10#ibcon#read 5, iclass 13, count 0 2006.229.12:57:49.10#ibcon#about to read 6, iclass 13, count 0 2006.229.12:57:49.10#ibcon#read 6, iclass 13, count 0 2006.229.12:57:49.10#ibcon#end of sib2, iclass 13, count 0 2006.229.12:57:49.10#ibcon#*after write, iclass 13, count 0 2006.229.12:57:49.10#ibcon#*before return 0, iclass 13, count 0 2006.229.12:57:49.10#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:49.10#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.12:57:49.10#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.12:57:49.10#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.12:57:49.11$vck44/vblo=5,709.99 2006.229.12:57:49.11#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.12:57:49.11#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.12:57:49.11#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:49.11#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:49.11#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:49.11#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:49.11#ibcon#enter wrdev, iclass 15, count 0 2006.229.12:57:49.11#ibcon#first serial, iclass 15, count 0 2006.229.12:57:49.11#ibcon#enter sib2, iclass 15, count 0 2006.229.12:57:49.11#ibcon#flushed, iclass 15, count 0 2006.229.12:57:49.11#ibcon#about to write, iclass 15, count 0 2006.229.12:57:49.11#ibcon#wrote, iclass 15, count 0 2006.229.12:57:49.11#ibcon#about to read 3, iclass 15, count 0 2006.229.12:57:49.12#ibcon#read 3, iclass 15, count 0 2006.229.12:57:49.12#ibcon#about to read 4, iclass 15, count 0 2006.229.12:57:49.12#ibcon#read 4, iclass 15, count 0 2006.229.12:57:49.12#ibcon#about to read 5, iclass 15, count 0 2006.229.12:57:49.12#ibcon#read 5, iclass 15, count 0 2006.229.12:57:49.12#ibcon#about to read 6, iclass 15, count 0 2006.229.12:57:49.12#ibcon#read 6, iclass 15, count 0 2006.229.12:57:49.12#ibcon#end of sib2, iclass 15, count 0 2006.229.12:57:49.12#ibcon#*mode == 0, iclass 15, count 0 2006.229.12:57:49.12#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.12:57:49.12#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:57:49.12#ibcon#*before write, iclass 15, count 0 2006.229.12:57:49.12#ibcon#enter sib2, iclass 15, count 0 2006.229.12:57:49.12#ibcon#flushed, iclass 15, count 0 2006.229.12:57:49.12#ibcon#about to write, iclass 15, count 0 2006.229.12:57:49.12#ibcon#wrote, iclass 15, count 0 2006.229.12:57:49.12#ibcon#about to read 3, iclass 15, count 0 2006.229.12:57:49.16#ibcon#read 3, iclass 15, count 0 2006.229.12:57:49.16#ibcon#about to read 4, iclass 15, count 0 2006.229.12:57:49.16#ibcon#read 4, iclass 15, count 0 2006.229.12:57:49.16#ibcon#about to read 5, iclass 15, count 0 2006.229.12:57:49.16#ibcon#read 5, iclass 15, count 0 2006.229.12:57:49.16#ibcon#about to read 6, iclass 15, count 0 2006.229.12:57:49.16#ibcon#read 6, iclass 15, count 0 2006.229.12:57:49.16#ibcon#end of sib2, iclass 15, count 0 2006.229.12:57:49.16#ibcon#*after write, iclass 15, count 0 2006.229.12:57:49.16#ibcon#*before return 0, iclass 15, count 0 2006.229.12:57:49.16#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:49.16#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.12:57:49.16#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.12:57:49.16#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.12:57:49.17$vck44/vb=5,4 2006.229.12:57:49.17#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.12:57:49.17#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.12:57:49.17#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:49.17#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:49.21#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:49.21#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:49.21#ibcon#enter wrdev, iclass 17, count 2 2006.229.12:57:49.21#ibcon#first serial, iclass 17, count 2 2006.229.12:57:49.21#ibcon#enter sib2, iclass 17, count 2 2006.229.12:57:49.21#ibcon#flushed, iclass 17, count 2 2006.229.12:57:49.21#ibcon#about to write, iclass 17, count 2 2006.229.12:57:49.21#ibcon#wrote, iclass 17, count 2 2006.229.12:57:49.21#ibcon#about to read 3, iclass 17, count 2 2006.229.12:57:49.23#ibcon#read 3, iclass 17, count 2 2006.229.12:57:49.23#ibcon#about to read 4, iclass 17, count 2 2006.229.12:57:49.23#ibcon#read 4, iclass 17, count 2 2006.229.12:57:49.23#ibcon#about to read 5, iclass 17, count 2 2006.229.12:57:49.23#ibcon#read 5, iclass 17, count 2 2006.229.12:57:49.23#ibcon#about to read 6, iclass 17, count 2 2006.229.12:57:49.23#ibcon#read 6, iclass 17, count 2 2006.229.12:57:49.23#ibcon#end of sib2, iclass 17, count 2 2006.229.12:57:49.23#ibcon#*mode == 0, iclass 17, count 2 2006.229.12:57:49.23#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.12:57:49.23#ibcon#[27=AT05-04\r\n] 2006.229.12:57:49.23#ibcon#*before write, iclass 17, count 2 2006.229.12:57:49.23#ibcon#enter sib2, iclass 17, count 2 2006.229.12:57:49.23#ibcon#flushed, iclass 17, count 2 2006.229.12:57:49.23#ibcon#about to write, iclass 17, count 2 2006.229.12:57:49.23#ibcon#wrote, iclass 17, count 2 2006.229.12:57:49.23#ibcon#about to read 3, iclass 17, count 2 2006.229.12:57:49.26#ibcon#read 3, iclass 17, count 2 2006.229.12:57:49.26#ibcon#about to read 4, iclass 17, count 2 2006.229.12:57:49.26#ibcon#read 4, iclass 17, count 2 2006.229.12:57:49.26#ibcon#about to read 5, iclass 17, count 2 2006.229.12:57:49.26#ibcon#read 5, iclass 17, count 2 2006.229.12:57:49.26#ibcon#about to read 6, iclass 17, count 2 2006.229.12:57:49.26#ibcon#read 6, iclass 17, count 2 2006.229.12:57:49.26#ibcon#end of sib2, iclass 17, count 2 2006.229.12:57:49.26#ibcon#*after write, iclass 17, count 2 2006.229.12:57:49.26#ibcon#*before return 0, iclass 17, count 2 2006.229.12:57:49.26#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:49.26#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.12:57:49.26#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.12:57:49.26#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:49.26#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:49.38#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:49.38#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:49.38#ibcon#enter wrdev, iclass 17, count 0 2006.229.12:57:49.38#ibcon#first serial, iclass 17, count 0 2006.229.12:57:49.38#ibcon#enter sib2, iclass 17, count 0 2006.229.12:57:49.38#ibcon#flushed, iclass 17, count 0 2006.229.12:57:49.38#ibcon#about to write, iclass 17, count 0 2006.229.12:57:49.38#ibcon#wrote, iclass 17, count 0 2006.229.12:57:49.38#ibcon#about to read 3, iclass 17, count 0 2006.229.12:57:49.40#ibcon#read 3, iclass 17, count 0 2006.229.12:57:49.40#ibcon#about to read 4, iclass 17, count 0 2006.229.12:57:49.40#ibcon#read 4, iclass 17, count 0 2006.229.12:57:49.40#ibcon#about to read 5, iclass 17, count 0 2006.229.12:57:49.40#ibcon#read 5, iclass 17, count 0 2006.229.12:57:49.40#ibcon#about to read 6, iclass 17, count 0 2006.229.12:57:49.40#ibcon#read 6, iclass 17, count 0 2006.229.12:57:49.40#ibcon#end of sib2, iclass 17, count 0 2006.229.12:57:49.40#ibcon#*mode == 0, iclass 17, count 0 2006.229.12:57:49.40#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.12:57:49.40#ibcon#[27=USB\r\n] 2006.229.12:57:49.40#ibcon#*before write, iclass 17, count 0 2006.229.12:57:49.40#ibcon#enter sib2, iclass 17, count 0 2006.229.12:57:49.40#ibcon#flushed, iclass 17, count 0 2006.229.12:57:49.40#ibcon#about to write, iclass 17, count 0 2006.229.12:57:49.40#ibcon#wrote, iclass 17, count 0 2006.229.12:57:49.40#ibcon#about to read 3, iclass 17, count 0 2006.229.12:57:49.43#ibcon#read 3, iclass 17, count 0 2006.229.12:57:49.43#ibcon#about to read 4, iclass 17, count 0 2006.229.12:57:49.43#ibcon#read 4, iclass 17, count 0 2006.229.12:57:49.43#ibcon#about to read 5, iclass 17, count 0 2006.229.12:57:49.43#ibcon#read 5, iclass 17, count 0 2006.229.12:57:49.43#ibcon#about to read 6, iclass 17, count 0 2006.229.12:57:49.43#ibcon#read 6, iclass 17, count 0 2006.229.12:57:49.43#ibcon#end of sib2, iclass 17, count 0 2006.229.12:57:49.43#ibcon#*after write, iclass 17, count 0 2006.229.12:57:49.43#ibcon#*before return 0, iclass 17, count 0 2006.229.12:57:49.43#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:49.43#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.12:57:49.43#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.12:57:49.43#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.12:57:49.44$vck44/vblo=6,719.99 2006.229.12:57:49.44#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.12:57:49.44#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.12:57:49.44#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:49.44#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:49.44#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:49.44#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:49.44#ibcon#enter wrdev, iclass 19, count 0 2006.229.12:57:49.44#ibcon#first serial, iclass 19, count 0 2006.229.12:57:49.44#ibcon#enter sib2, iclass 19, count 0 2006.229.12:57:49.44#ibcon#flushed, iclass 19, count 0 2006.229.12:57:49.44#ibcon#about to write, iclass 19, count 0 2006.229.12:57:49.44#ibcon#wrote, iclass 19, count 0 2006.229.12:57:49.44#ibcon#about to read 3, iclass 19, count 0 2006.229.12:57:49.45#ibcon#read 3, iclass 19, count 0 2006.229.12:57:49.45#ibcon#about to read 4, iclass 19, count 0 2006.229.12:57:49.45#ibcon#read 4, iclass 19, count 0 2006.229.12:57:49.45#ibcon#about to read 5, iclass 19, count 0 2006.229.12:57:49.45#ibcon#read 5, iclass 19, count 0 2006.229.12:57:49.45#ibcon#about to read 6, iclass 19, count 0 2006.229.12:57:49.45#ibcon#read 6, iclass 19, count 0 2006.229.12:57:49.45#ibcon#end of sib2, iclass 19, count 0 2006.229.12:57:49.45#ibcon#*mode == 0, iclass 19, count 0 2006.229.12:57:49.45#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.12:57:49.45#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:57:49.45#ibcon#*before write, iclass 19, count 0 2006.229.12:57:49.45#ibcon#enter sib2, iclass 19, count 0 2006.229.12:57:49.45#ibcon#flushed, iclass 19, count 0 2006.229.12:57:49.45#ibcon#about to write, iclass 19, count 0 2006.229.12:57:49.45#ibcon#wrote, iclass 19, count 0 2006.229.12:57:49.45#ibcon#about to read 3, iclass 19, count 0 2006.229.12:57:49.49#ibcon#read 3, iclass 19, count 0 2006.229.12:57:49.49#ibcon#about to read 4, iclass 19, count 0 2006.229.12:57:49.49#ibcon#read 4, iclass 19, count 0 2006.229.12:57:49.49#ibcon#about to read 5, iclass 19, count 0 2006.229.12:57:49.49#ibcon#read 5, iclass 19, count 0 2006.229.12:57:49.49#ibcon#about to read 6, iclass 19, count 0 2006.229.12:57:49.49#ibcon#read 6, iclass 19, count 0 2006.229.12:57:49.49#ibcon#end of sib2, iclass 19, count 0 2006.229.12:57:49.49#ibcon#*after write, iclass 19, count 0 2006.229.12:57:49.49#ibcon#*before return 0, iclass 19, count 0 2006.229.12:57:49.49#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:49.49#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.12:57:49.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.12:57:49.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.12:57:49.50$vck44/vb=6,4 2006.229.12:57:49.50#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.12:57:49.50#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.12:57:49.50#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:49.50#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:49.54#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:49.54#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:49.54#ibcon#enter wrdev, iclass 21, count 2 2006.229.12:57:49.54#ibcon#first serial, iclass 21, count 2 2006.229.12:57:49.54#ibcon#enter sib2, iclass 21, count 2 2006.229.12:57:49.54#ibcon#flushed, iclass 21, count 2 2006.229.12:57:49.54#ibcon#about to write, iclass 21, count 2 2006.229.12:57:49.54#ibcon#wrote, iclass 21, count 2 2006.229.12:57:49.54#ibcon#about to read 3, iclass 21, count 2 2006.229.12:57:49.56#ibcon#read 3, iclass 21, count 2 2006.229.12:57:49.56#ibcon#about to read 4, iclass 21, count 2 2006.229.12:57:49.56#ibcon#read 4, iclass 21, count 2 2006.229.12:57:49.56#ibcon#about to read 5, iclass 21, count 2 2006.229.12:57:49.56#ibcon#read 5, iclass 21, count 2 2006.229.12:57:49.56#ibcon#about to read 6, iclass 21, count 2 2006.229.12:57:49.56#ibcon#read 6, iclass 21, count 2 2006.229.12:57:49.56#ibcon#end of sib2, iclass 21, count 2 2006.229.12:57:49.56#ibcon#*mode == 0, iclass 21, count 2 2006.229.12:57:49.56#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.12:57:49.56#ibcon#[27=AT06-04\r\n] 2006.229.12:57:49.56#ibcon#*before write, iclass 21, count 2 2006.229.12:57:49.56#ibcon#enter sib2, iclass 21, count 2 2006.229.12:57:49.56#ibcon#flushed, iclass 21, count 2 2006.229.12:57:49.56#ibcon#about to write, iclass 21, count 2 2006.229.12:57:49.56#ibcon#wrote, iclass 21, count 2 2006.229.12:57:49.56#ibcon#about to read 3, iclass 21, count 2 2006.229.12:57:49.59#ibcon#read 3, iclass 21, count 2 2006.229.12:57:49.59#ibcon#about to read 4, iclass 21, count 2 2006.229.12:57:49.59#ibcon#read 4, iclass 21, count 2 2006.229.12:57:49.59#ibcon#about to read 5, iclass 21, count 2 2006.229.12:57:49.59#ibcon#read 5, iclass 21, count 2 2006.229.12:57:49.59#ibcon#about to read 6, iclass 21, count 2 2006.229.12:57:49.59#ibcon#read 6, iclass 21, count 2 2006.229.12:57:49.59#ibcon#end of sib2, iclass 21, count 2 2006.229.12:57:49.59#ibcon#*after write, iclass 21, count 2 2006.229.12:57:49.59#ibcon#*before return 0, iclass 21, count 2 2006.229.12:57:49.59#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:49.59#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.12:57:49.59#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.12:57:49.59#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:49.59#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:49.71#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:49.71#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:49.71#ibcon#enter wrdev, iclass 21, count 0 2006.229.12:57:49.71#ibcon#first serial, iclass 21, count 0 2006.229.12:57:49.71#ibcon#enter sib2, iclass 21, count 0 2006.229.12:57:49.71#ibcon#flushed, iclass 21, count 0 2006.229.12:57:49.71#ibcon#about to write, iclass 21, count 0 2006.229.12:57:49.71#ibcon#wrote, iclass 21, count 0 2006.229.12:57:49.71#ibcon#about to read 3, iclass 21, count 0 2006.229.12:57:49.73#ibcon#read 3, iclass 21, count 0 2006.229.12:57:49.73#ibcon#about to read 4, iclass 21, count 0 2006.229.12:57:49.73#ibcon#read 4, iclass 21, count 0 2006.229.12:57:49.73#ibcon#about to read 5, iclass 21, count 0 2006.229.12:57:49.73#ibcon#read 5, iclass 21, count 0 2006.229.12:57:49.73#ibcon#about to read 6, iclass 21, count 0 2006.229.12:57:49.73#ibcon#read 6, iclass 21, count 0 2006.229.12:57:49.73#ibcon#end of sib2, iclass 21, count 0 2006.229.12:57:49.73#ibcon#*mode == 0, iclass 21, count 0 2006.229.12:57:49.73#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.12:57:49.73#ibcon#[27=USB\r\n] 2006.229.12:57:49.73#ibcon#*before write, iclass 21, count 0 2006.229.12:57:49.73#ibcon#enter sib2, iclass 21, count 0 2006.229.12:57:49.73#ibcon#flushed, iclass 21, count 0 2006.229.12:57:49.73#ibcon#about to write, iclass 21, count 0 2006.229.12:57:49.73#ibcon#wrote, iclass 21, count 0 2006.229.12:57:49.73#ibcon#about to read 3, iclass 21, count 0 2006.229.12:57:49.74#abcon#<5=/04 1.3 2.3 27.581001002.2\r\n> 2006.229.12:57:49.76#abcon#{5=INTERFACE CLEAR} 2006.229.12:57:49.76#ibcon#read 3, iclass 21, count 0 2006.229.12:57:49.76#ibcon#about to read 4, iclass 21, count 0 2006.229.12:57:49.76#ibcon#read 4, iclass 21, count 0 2006.229.12:57:49.76#ibcon#about to read 5, iclass 21, count 0 2006.229.12:57:49.76#ibcon#read 5, iclass 21, count 0 2006.229.12:57:49.76#ibcon#about to read 6, iclass 21, count 0 2006.229.12:57:49.76#ibcon#read 6, iclass 21, count 0 2006.229.12:57:49.76#ibcon#end of sib2, iclass 21, count 0 2006.229.12:57:49.76#ibcon#*after write, iclass 21, count 0 2006.229.12:57:49.76#ibcon#*before return 0, iclass 21, count 0 2006.229.12:57:49.76#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:49.76#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.12:57:49.76#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.12:57:49.76#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.12:57:49.77$vck44/vblo=7,734.99 2006.229.12:57:49.77#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:57:49.77#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:57:49.77#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:49.77#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:57:49.77#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:57:49.77#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:57:49.77#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:57:49.77#ibcon#first serial, iclass 26, count 0 2006.229.12:57:49.77#ibcon#enter sib2, iclass 26, count 0 2006.229.12:57:49.77#ibcon#flushed, iclass 26, count 0 2006.229.12:57:49.77#ibcon#about to write, iclass 26, count 0 2006.229.12:57:49.77#ibcon#wrote, iclass 26, count 0 2006.229.12:57:49.77#ibcon#about to read 3, iclass 26, count 0 2006.229.12:57:49.78#ibcon#read 3, iclass 26, count 0 2006.229.12:57:49.78#ibcon#about to read 4, iclass 26, count 0 2006.229.12:57:49.78#ibcon#read 4, iclass 26, count 0 2006.229.12:57:49.78#ibcon#about to read 5, iclass 26, count 0 2006.229.12:57:49.78#ibcon#read 5, iclass 26, count 0 2006.229.12:57:49.78#ibcon#about to read 6, iclass 26, count 0 2006.229.12:57:49.78#ibcon#read 6, iclass 26, count 0 2006.229.12:57:49.78#ibcon#end of sib2, iclass 26, count 0 2006.229.12:57:49.78#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:57:49.78#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:57:49.78#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:57:49.78#ibcon#*before write, iclass 26, count 0 2006.229.12:57:49.78#ibcon#enter sib2, iclass 26, count 0 2006.229.12:57:49.78#ibcon#flushed, iclass 26, count 0 2006.229.12:57:49.78#ibcon#about to write, iclass 26, count 0 2006.229.12:57:49.78#ibcon#wrote, iclass 26, count 0 2006.229.12:57:49.78#ibcon#about to read 3, iclass 26, count 0 2006.229.12:57:49.82#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:57:49.82#ibcon#read 3, iclass 26, count 0 2006.229.12:57:49.82#ibcon#about to read 4, iclass 26, count 0 2006.229.12:57:49.82#ibcon#read 4, iclass 26, count 0 2006.229.12:57:49.82#ibcon#about to read 5, iclass 26, count 0 2006.229.12:57:49.82#ibcon#read 5, iclass 26, count 0 2006.229.12:57:49.82#ibcon#about to read 6, iclass 26, count 0 2006.229.12:57:49.82#ibcon#read 6, iclass 26, count 0 2006.229.12:57:49.82#ibcon#end of sib2, iclass 26, count 0 2006.229.12:57:49.82#ibcon#*after write, iclass 26, count 0 2006.229.12:57:49.82#ibcon#*before return 0, iclass 26, count 0 2006.229.12:57:49.82#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:57:49.82#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:57:49.82#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:57:49.82#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:57:49.83$vck44/vb=7,4 2006.229.12:57:49.83#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.12:57:49.83#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.12:57:49.83#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:49.83#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:49.87#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:49.87#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:49.87#ibcon#enter wrdev, iclass 29, count 2 2006.229.12:57:49.87#ibcon#first serial, iclass 29, count 2 2006.229.12:57:49.87#ibcon#enter sib2, iclass 29, count 2 2006.229.12:57:49.87#ibcon#flushed, iclass 29, count 2 2006.229.12:57:49.87#ibcon#about to write, iclass 29, count 2 2006.229.12:57:49.87#ibcon#wrote, iclass 29, count 2 2006.229.12:57:49.87#ibcon#about to read 3, iclass 29, count 2 2006.229.12:57:49.89#ibcon#read 3, iclass 29, count 2 2006.229.12:57:49.89#ibcon#about to read 4, iclass 29, count 2 2006.229.12:57:49.89#ibcon#read 4, iclass 29, count 2 2006.229.12:57:49.89#ibcon#about to read 5, iclass 29, count 2 2006.229.12:57:49.89#ibcon#read 5, iclass 29, count 2 2006.229.12:57:49.89#ibcon#about to read 6, iclass 29, count 2 2006.229.12:57:49.89#ibcon#read 6, iclass 29, count 2 2006.229.12:57:49.89#ibcon#end of sib2, iclass 29, count 2 2006.229.12:57:49.89#ibcon#*mode == 0, iclass 29, count 2 2006.229.12:57:49.89#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.12:57:49.89#ibcon#[27=AT07-04\r\n] 2006.229.12:57:49.89#ibcon#*before write, iclass 29, count 2 2006.229.12:57:49.89#ibcon#enter sib2, iclass 29, count 2 2006.229.12:57:49.89#ibcon#flushed, iclass 29, count 2 2006.229.12:57:49.89#ibcon#about to write, iclass 29, count 2 2006.229.12:57:49.89#ibcon#wrote, iclass 29, count 2 2006.229.12:57:49.89#ibcon#about to read 3, iclass 29, count 2 2006.229.12:57:49.92#ibcon#read 3, iclass 29, count 2 2006.229.12:57:49.92#ibcon#about to read 4, iclass 29, count 2 2006.229.12:57:49.92#ibcon#read 4, iclass 29, count 2 2006.229.12:57:49.92#ibcon#about to read 5, iclass 29, count 2 2006.229.12:57:49.92#ibcon#read 5, iclass 29, count 2 2006.229.12:57:49.92#ibcon#about to read 6, iclass 29, count 2 2006.229.12:57:49.92#ibcon#read 6, iclass 29, count 2 2006.229.12:57:49.92#ibcon#end of sib2, iclass 29, count 2 2006.229.12:57:49.92#ibcon#*after write, iclass 29, count 2 2006.229.12:57:49.92#ibcon#*before return 0, iclass 29, count 2 2006.229.12:57:49.92#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:49.92#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.12:57:49.92#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.12:57:49.92#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:49.92#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:50.04#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:50.04#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:50.04#ibcon#enter wrdev, iclass 29, count 0 2006.229.12:57:50.04#ibcon#first serial, iclass 29, count 0 2006.229.12:57:50.04#ibcon#enter sib2, iclass 29, count 0 2006.229.12:57:50.04#ibcon#flushed, iclass 29, count 0 2006.229.12:57:50.04#ibcon#about to write, iclass 29, count 0 2006.229.12:57:50.04#ibcon#wrote, iclass 29, count 0 2006.229.12:57:50.04#ibcon#about to read 3, iclass 29, count 0 2006.229.12:57:50.06#ibcon#read 3, iclass 29, count 0 2006.229.12:57:50.06#ibcon#about to read 4, iclass 29, count 0 2006.229.12:57:50.06#ibcon#read 4, iclass 29, count 0 2006.229.12:57:50.06#ibcon#about to read 5, iclass 29, count 0 2006.229.12:57:50.06#ibcon#read 5, iclass 29, count 0 2006.229.12:57:50.06#ibcon#about to read 6, iclass 29, count 0 2006.229.12:57:50.06#ibcon#read 6, iclass 29, count 0 2006.229.12:57:50.06#ibcon#end of sib2, iclass 29, count 0 2006.229.12:57:50.06#ibcon#*mode == 0, iclass 29, count 0 2006.229.12:57:50.06#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.12:57:50.06#ibcon#[27=USB\r\n] 2006.229.12:57:50.06#ibcon#*before write, iclass 29, count 0 2006.229.12:57:50.06#ibcon#enter sib2, iclass 29, count 0 2006.229.12:57:50.06#ibcon#flushed, iclass 29, count 0 2006.229.12:57:50.06#ibcon#about to write, iclass 29, count 0 2006.229.12:57:50.06#ibcon#wrote, iclass 29, count 0 2006.229.12:57:50.06#ibcon#about to read 3, iclass 29, count 0 2006.229.12:57:50.09#ibcon#read 3, iclass 29, count 0 2006.229.12:57:50.09#ibcon#about to read 4, iclass 29, count 0 2006.229.12:57:50.09#ibcon#read 4, iclass 29, count 0 2006.229.12:57:50.09#ibcon#about to read 5, iclass 29, count 0 2006.229.12:57:50.09#ibcon#read 5, iclass 29, count 0 2006.229.12:57:50.09#ibcon#about to read 6, iclass 29, count 0 2006.229.12:57:50.09#ibcon#read 6, iclass 29, count 0 2006.229.12:57:50.09#ibcon#end of sib2, iclass 29, count 0 2006.229.12:57:50.09#ibcon#*after write, iclass 29, count 0 2006.229.12:57:50.09#ibcon#*before return 0, iclass 29, count 0 2006.229.12:57:50.09#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:50.09#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.12:57:50.09#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.12:57:50.09#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.12:57:50.10$vck44/vblo=8,744.99 2006.229.12:57:50.10#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.12:57:50.10#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.12:57:50.10#ibcon#ireg 17 cls_cnt 0 2006.229.12:57:50.10#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:50.10#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:50.10#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:50.10#ibcon#enter wrdev, iclass 31, count 0 2006.229.12:57:50.10#ibcon#first serial, iclass 31, count 0 2006.229.12:57:50.10#ibcon#enter sib2, iclass 31, count 0 2006.229.12:57:50.10#ibcon#flushed, iclass 31, count 0 2006.229.12:57:50.10#ibcon#about to write, iclass 31, count 0 2006.229.12:57:50.10#ibcon#wrote, iclass 31, count 0 2006.229.12:57:50.10#ibcon#about to read 3, iclass 31, count 0 2006.229.12:57:50.11#ibcon#read 3, iclass 31, count 0 2006.229.12:57:50.11#ibcon#about to read 4, iclass 31, count 0 2006.229.12:57:50.11#ibcon#read 4, iclass 31, count 0 2006.229.12:57:50.11#ibcon#about to read 5, iclass 31, count 0 2006.229.12:57:50.11#ibcon#read 5, iclass 31, count 0 2006.229.12:57:50.11#ibcon#about to read 6, iclass 31, count 0 2006.229.12:57:50.11#ibcon#read 6, iclass 31, count 0 2006.229.12:57:50.11#ibcon#end of sib2, iclass 31, count 0 2006.229.12:57:50.11#ibcon#*mode == 0, iclass 31, count 0 2006.229.12:57:50.11#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.12:57:50.11#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:57:50.11#ibcon#*before write, iclass 31, count 0 2006.229.12:57:50.11#ibcon#enter sib2, iclass 31, count 0 2006.229.12:57:50.11#ibcon#flushed, iclass 31, count 0 2006.229.12:57:50.11#ibcon#about to write, iclass 31, count 0 2006.229.12:57:50.11#ibcon#wrote, iclass 31, count 0 2006.229.12:57:50.11#ibcon#about to read 3, iclass 31, count 0 2006.229.12:57:50.15#ibcon#read 3, iclass 31, count 0 2006.229.12:57:50.15#ibcon#about to read 4, iclass 31, count 0 2006.229.12:57:50.15#ibcon#read 4, iclass 31, count 0 2006.229.12:57:50.15#ibcon#about to read 5, iclass 31, count 0 2006.229.12:57:50.15#ibcon#read 5, iclass 31, count 0 2006.229.12:57:50.15#ibcon#about to read 6, iclass 31, count 0 2006.229.12:57:50.15#ibcon#read 6, iclass 31, count 0 2006.229.12:57:50.15#ibcon#end of sib2, iclass 31, count 0 2006.229.12:57:50.15#ibcon#*after write, iclass 31, count 0 2006.229.12:57:50.15#ibcon#*before return 0, iclass 31, count 0 2006.229.12:57:50.15#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:50.15#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.12:57:50.15#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.12:57:50.15#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.12:57:50.15$vck44/vb=8,4 2006.229.12:57:50.16#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.12:57:50.16#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.12:57:50.16#ibcon#ireg 11 cls_cnt 2 2006.229.12:57:50.16#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:50.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:50.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:50.20#ibcon#enter wrdev, iclass 33, count 2 2006.229.12:57:50.20#ibcon#first serial, iclass 33, count 2 2006.229.12:57:50.20#ibcon#enter sib2, iclass 33, count 2 2006.229.12:57:50.20#ibcon#flushed, iclass 33, count 2 2006.229.12:57:50.20#ibcon#about to write, iclass 33, count 2 2006.229.12:57:50.20#ibcon#wrote, iclass 33, count 2 2006.229.12:57:50.20#ibcon#about to read 3, iclass 33, count 2 2006.229.12:57:50.22#ibcon#read 3, iclass 33, count 2 2006.229.12:57:50.22#ibcon#about to read 4, iclass 33, count 2 2006.229.12:57:50.22#ibcon#read 4, iclass 33, count 2 2006.229.12:57:50.22#ibcon#about to read 5, iclass 33, count 2 2006.229.12:57:50.22#ibcon#read 5, iclass 33, count 2 2006.229.12:57:50.22#ibcon#about to read 6, iclass 33, count 2 2006.229.12:57:50.22#ibcon#read 6, iclass 33, count 2 2006.229.12:57:50.22#ibcon#end of sib2, iclass 33, count 2 2006.229.12:57:50.22#ibcon#*mode == 0, iclass 33, count 2 2006.229.12:57:50.22#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.12:57:50.22#ibcon#[27=AT08-04\r\n] 2006.229.12:57:50.22#ibcon#*before write, iclass 33, count 2 2006.229.12:57:50.22#ibcon#enter sib2, iclass 33, count 2 2006.229.12:57:50.22#ibcon#flushed, iclass 33, count 2 2006.229.12:57:50.22#ibcon#about to write, iclass 33, count 2 2006.229.12:57:50.22#ibcon#wrote, iclass 33, count 2 2006.229.12:57:50.22#ibcon#about to read 3, iclass 33, count 2 2006.229.12:57:50.25#ibcon#read 3, iclass 33, count 2 2006.229.12:57:50.25#ibcon#about to read 4, iclass 33, count 2 2006.229.12:57:50.25#ibcon#read 4, iclass 33, count 2 2006.229.12:57:50.25#ibcon#about to read 5, iclass 33, count 2 2006.229.12:57:50.25#ibcon#read 5, iclass 33, count 2 2006.229.12:57:50.25#ibcon#about to read 6, iclass 33, count 2 2006.229.12:57:50.25#ibcon#read 6, iclass 33, count 2 2006.229.12:57:50.25#ibcon#end of sib2, iclass 33, count 2 2006.229.12:57:50.25#ibcon#*after write, iclass 33, count 2 2006.229.12:57:50.25#ibcon#*before return 0, iclass 33, count 2 2006.229.12:57:50.25#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:50.25#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.12:57:50.25#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.12:57:50.25#ibcon#ireg 7 cls_cnt 0 2006.229.12:57:50.25#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:50.37#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:50.37#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:50.37#ibcon#enter wrdev, iclass 33, count 0 2006.229.12:57:50.37#ibcon#first serial, iclass 33, count 0 2006.229.12:57:50.37#ibcon#enter sib2, iclass 33, count 0 2006.229.12:57:50.37#ibcon#flushed, iclass 33, count 0 2006.229.12:57:50.37#ibcon#about to write, iclass 33, count 0 2006.229.12:57:50.37#ibcon#wrote, iclass 33, count 0 2006.229.12:57:50.37#ibcon#about to read 3, iclass 33, count 0 2006.229.12:57:50.39#ibcon#read 3, iclass 33, count 0 2006.229.12:57:50.39#ibcon#about to read 4, iclass 33, count 0 2006.229.12:57:50.39#ibcon#read 4, iclass 33, count 0 2006.229.12:57:50.39#ibcon#about to read 5, iclass 33, count 0 2006.229.12:57:50.39#ibcon#read 5, iclass 33, count 0 2006.229.12:57:50.39#ibcon#about to read 6, iclass 33, count 0 2006.229.12:57:50.39#ibcon#read 6, iclass 33, count 0 2006.229.12:57:50.39#ibcon#end of sib2, iclass 33, count 0 2006.229.12:57:50.39#ibcon#*mode == 0, iclass 33, count 0 2006.229.12:57:50.39#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.12:57:50.39#ibcon#[27=USB\r\n] 2006.229.12:57:50.39#ibcon#*before write, iclass 33, count 0 2006.229.12:57:50.39#ibcon#enter sib2, iclass 33, count 0 2006.229.12:57:50.39#ibcon#flushed, iclass 33, count 0 2006.229.12:57:50.39#ibcon#about to write, iclass 33, count 0 2006.229.12:57:50.39#ibcon#wrote, iclass 33, count 0 2006.229.12:57:50.39#ibcon#about to read 3, iclass 33, count 0 2006.229.12:57:50.42#ibcon#read 3, iclass 33, count 0 2006.229.12:57:50.42#ibcon#about to read 4, iclass 33, count 0 2006.229.12:57:50.42#ibcon#read 4, iclass 33, count 0 2006.229.12:57:50.42#ibcon#about to read 5, iclass 33, count 0 2006.229.12:57:50.42#ibcon#read 5, iclass 33, count 0 2006.229.12:57:50.42#ibcon#about to read 6, iclass 33, count 0 2006.229.12:57:50.42#ibcon#read 6, iclass 33, count 0 2006.229.12:57:50.42#ibcon#end of sib2, iclass 33, count 0 2006.229.12:57:50.42#ibcon#*after write, iclass 33, count 0 2006.229.12:57:50.42#ibcon#*before return 0, iclass 33, count 0 2006.229.12:57:50.42#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:50.42#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.12:57:50.42#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.12:57:50.42#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.12:57:50.43$vck44/vabw=wide 2006.229.12:57:50.43#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.12:57:50.43#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.12:57:50.43#ibcon#ireg 8 cls_cnt 0 2006.229.12:57:50.43#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:50.43#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:50.43#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:50.43#ibcon#enter wrdev, iclass 35, count 0 2006.229.12:57:50.43#ibcon#first serial, iclass 35, count 0 2006.229.12:57:50.43#ibcon#enter sib2, iclass 35, count 0 2006.229.12:57:50.43#ibcon#flushed, iclass 35, count 0 2006.229.12:57:50.43#ibcon#about to write, iclass 35, count 0 2006.229.12:57:50.43#ibcon#wrote, iclass 35, count 0 2006.229.12:57:50.43#ibcon#about to read 3, iclass 35, count 0 2006.229.12:57:50.44#ibcon#read 3, iclass 35, count 0 2006.229.12:57:50.44#ibcon#about to read 4, iclass 35, count 0 2006.229.12:57:50.44#ibcon#read 4, iclass 35, count 0 2006.229.12:57:50.44#ibcon#about to read 5, iclass 35, count 0 2006.229.12:57:50.44#ibcon#read 5, iclass 35, count 0 2006.229.12:57:50.44#ibcon#about to read 6, iclass 35, count 0 2006.229.12:57:50.44#ibcon#read 6, iclass 35, count 0 2006.229.12:57:50.44#ibcon#end of sib2, iclass 35, count 0 2006.229.12:57:50.44#ibcon#*mode == 0, iclass 35, count 0 2006.229.12:57:50.44#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.12:57:50.44#ibcon#[25=BW32\r\n] 2006.229.12:57:50.44#ibcon#*before write, iclass 35, count 0 2006.229.12:57:50.44#ibcon#enter sib2, iclass 35, count 0 2006.229.12:57:50.44#ibcon#flushed, iclass 35, count 0 2006.229.12:57:50.44#ibcon#about to write, iclass 35, count 0 2006.229.12:57:50.44#ibcon#wrote, iclass 35, count 0 2006.229.12:57:50.44#ibcon#about to read 3, iclass 35, count 0 2006.229.12:57:50.47#ibcon#read 3, iclass 35, count 0 2006.229.12:57:50.47#ibcon#about to read 4, iclass 35, count 0 2006.229.12:57:50.47#ibcon#read 4, iclass 35, count 0 2006.229.12:57:50.47#ibcon#about to read 5, iclass 35, count 0 2006.229.12:57:50.47#ibcon#read 5, iclass 35, count 0 2006.229.12:57:50.47#ibcon#about to read 6, iclass 35, count 0 2006.229.12:57:50.47#ibcon#read 6, iclass 35, count 0 2006.229.12:57:50.47#ibcon#end of sib2, iclass 35, count 0 2006.229.12:57:50.47#ibcon#*after write, iclass 35, count 0 2006.229.12:57:50.47#ibcon#*before return 0, iclass 35, count 0 2006.229.12:57:50.47#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:50.47#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.12:57:50.47#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.12:57:50.47#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.12:57:50.48$vck44/vbbw=wide 2006.229.12:57:50.48#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.12:57:50.48#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.12:57:50.48#ibcon#ireg 8 cls_cnt 0 2006.229.12:57:50.48#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:57:50.53#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:57:50.53#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:57:50.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:57:50.53#ibcon#first serial, iclass 37, count 0 2006.229.12:57:50.53#ibcon#enter sib2, iclass 37, count 0 2006.229.12:57:50.53#ibcon#flushed, iclass 37, count 0 2006.229.12:57:50.53#ibcon#about to write, iclass 37, count 0 2006.229.12:57:50.53#ibcon#wrote, iclass 37, count 0 2006.229.12:57:50.53#ibcon#about to read 3, iclass 37, count 0 2006.229.12:57:50.55#ibcon#read 3, iclass 37, count 0 2006.229.12:57:50.55#ibcon#about to read 4, iclass 37, count 0 2006.229.12:57:50.55#ibcon#read 4, iclass 37, count 0 2006.229.12:57:50.55#ibcon#about to read 5, iclass 37, count 0 2006.229.12:57:50.55#ibcon#read 5, iclass 37, count 0 2006.229.12:57:50.55#ibcon#about to read 6, iclass 37, count 0 2006.229.12:57:50.55#ibcon#read 6, iclass 37, count 0 2006.229.12:57:50.55#ibcon#end of sib2, iclass 37, count 0 2006.229.12:57:50.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:57:50.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:57:50.55#ibcon#[27=BW32\r\n] 2006.229.12:57:50.55#ibcon#*before write, iclass 37, count 0 2006.229.12:57:50.55#ibcon#enter sib2, iclass 37, count 0 2006.229.12:57:50.55#ibcon#flushed, iclass 37, count 0 2006.229.12:57:50.55#ibcon#about to write, iclass 37, count 0 2006.229.12:57:50.55#ibcon#wrote, iclass 37, count 0 2006.229.12:57:50.55#ibcon#about to read 3, iclass 37, count 0 2006.229.12:57:50.58#ibcon#read 3, iclass 37, count 0 2006.229.12:57:50.58#ibcon#about to read 4, iclass 37, count 0 2006.229.12:57:50.58#ibcon#read 4, iclass 37, count 0 2006.229.12:57:50.58#ibcon#about to read 5, iclass 37, count 0 2006.229.12:57:50.58#ibcon#read 5, iclass 37, count 0 2006.229.12:57:50.58#ibcon#about to read 6, iclass 37, count 0 2006.229.12:57:50.58#ibcon#read 6, iclass 37, count 0 2006.229.12:57:50.58#ibcon#end of sib2, iclass 37, count 0 2006.229.12:57:50.58#ibcon#*after write, iclass 37, count 0 2006.229.12:57:50.58#ibcon#*before return 0, iclass 37, count 0 2006.229.12:57:50.58#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:57:50.58#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:57:50.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:57:50.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:57:50.59$setupk4/ifdk4 2006.229.12:57:50.59$ifdk4/lo= 2006.229.12:57:50.59$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:57:50.59$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:57:50.59$ifdk4/patch= 2006.229.12:57:50.59$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:57:50.59$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:57:50.59$setupk4/!*+20s 2006.229.12:57:59.91#abcon#<5=/04 1.3 2.3 27.581001002.2\r\n> 2006.229.12:57:59.93#abcon#{5=INTERFACE CLEAR} 2006.229.12:57:59.99#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:58:05.22$setupk4/"tpicd 2006.229.12:58:05.22$setupk4/echo=off 2006.229.12:58:05.22$setupk4/xlog=off 2006.229.12:58:05.22:!2006.229.12:58:50 2006.229.12:58:09.14#trakl#Source acquired 2006.229.12:58:11.14#flagr#flagr/antenna,acquired 2006.229.12:58:50.00:preob 2006.229.12:58:51.14/onsource/TRACKING 2006.229.12:58:51.15:!2006.229.12:59:00 2006.229.12:59:00.01:"tape 2006.229.12:59:00.01:"st=record 2006.229.12:59:00.02:data_valid=on 2006.229.12:59:00.02:midob 2006.229.12:59:01.14/onsource/TRACKING 2006.229.12:59:01.15/wx/27.58,1002.2,100 2006.229.12:59:01.26/cable/+6.4106E-03 2006.229.12:59:02.35/va/01,08,usb,yes,30,32 2006.229.12:59:02.35/va/02,07,usb,yes,32,33 2006.229.12:59:02.35/va/03,06,usb,yes,40,43 2006.229.12:59:02.35/va/04,07,usb,yes,33,35 2006.229.12:59:02.35/va/05,04,usb,yes,30,30 2006.229.12:59:02.35/va/06,04,usb,yes,34,33 2006.229.12:59:02.35/va/07,05,usb,yes,30,30 2006.229.12:59:02.35/va/08,06,usb,yes,21,27 2006.229.12:59:02.58/valo/01,524.99,yes,locked 2006.229.12:59:02.58/valo/02,534.99,yes,locked 2006.229.12:59:02.58/valo/03,564.99,yes,locked 2006.229.12:59:02.58/valo/04,624.99,yes,locked 2006.229.12:59:02.58/valo/05,734.99,yes,locked 2006.229.12:59:02.58/valo/06,814.99,yes,locked 2006.229.12:59:02.58/valo/07,864.99,yes,locked 2006.229.12:59:02.58/valo/08,884.99,yes,locked 2006.229.12:59:03.67/vb/01,04,usb,yes,31,29 2006.229.12:59:03.67/vb/02,04,usb,yes,33,33 2006.229.12:59:03.67/vb/03,04,usb,yes,30,34 2006.229.12:59:03.67/vb/04,04,usb,yes,35,34 2006.229.12:59:03.67/vb/05,04,usb,yes,27,30 2006.229.12:59:03.67/vb/06,04,usb,yes,32,28 2006.229.12:59:03.67/vb/07,04,usb,yes,32,31 2006.229.12:59:03.67/vb/08,04,usb,yes,29,32 2006.229.12:59:03.91/vblo/01,629.99,yes,locked 2006.229.12:59:03.91/vblo/02,634.99,yes,locked 2006.229.12:59:03.91/vblo/03,649.99,yes,locked 2006.229.12:59:03.91/vblo/04,679.99,yes,locked 2006.229.12:59:03.91/vblo/05,709.99,yes,locked 2006.229.12:59:03.91/vblo/06,719.99,yes,locked 2006.229.12:59:03.91/vblo/07,734.99,yes,locked 2006.229.12:59:03.91/vblo/08,744.99,yes,locked 2006.229.12:59:04.06/vabw/8 2006.229.12:59:04.21/vbbw/8 2006.229.12:59:04.30/xfe/off,on,12.0 2006.229.12:59:04.67/ifatt/23,28,28,28 2006.229.12:59:05.08/fmout-gps/S +4.46E-07 2006.229.12:59:05.12:!2006.229.12:59:40 2006.229.12:59:40.02:data_valid=off 2006.229.12:59:40.02:"et 2006.229.12:59:40.02:!+3s 2006.229.12:59:43.04:"tape 2006.229.12:59:43.04:postob 2006.229.12:59:43.14/cable/+6.4108E-03 2006.229.12:59:43.15/wx/27.58,1002.2,100 2006.229.12:59:43.20/fmout-gps/S +4.47E-07 2006.229.12:59:43.20:scan_name=229-1301,jd0608,70 2006.229.12:59:43.21:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.12:59:44.14#flagr#flagr/antenna,new-source 2006.229.12:59:44.15:checkk5 2006.229.12:59:44.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.12:59:44.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.12:59:45.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.12:59:45.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.12:59:46.12/chk_obsdata//k5ts1/T2291259??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:59:46.54/chk_obsdata//k5ts2/T2291259??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:59:46.95/chk_obsdata//k5ts3/T2291259??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:59:47.35/chk_obsdata//k5ts4/T2291259??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.12:59:48.08/k5log//k5ts1_log_newline 2006.229.12:59:48.81/k5log//k5ts2_log_newline 2006.229.12:59:49.51/k5log//k5ts3_log_newline 2006.229.12:59:50.24/k5log//k5ts4_log_newline 2006.229.12:59:50.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.12:59:50.26:setupk4=1 2006.229.12:59:50.26$setupk4/echo=on 2006.229.12:59:50.26$setupk4/pcalon 2006.229.12:59:50.26$pcalon/"no phase cal control is implemented here 2006.229.12:59:50.26$setupk4/"tpicd=stop 2006.229.12:59:50.26$setupk4/"rec=synch_on 2006.229.12:59:50.26$setupk4/"rec_mode=128 2006.229.12:59:50.26$setupk4/!* 2006.229.12:59:50.26$setupk4/recpk4 2006.229.12:59:50.26$recpk4/recpatch= 2006.229.12:59:50.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.12:59:50.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.12:59:50.27$setupk4/vck44 2006.229.12:59:50.27$vck44/valo=1,524.99 2006.229.12:59:50.27#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:59:50.27#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:59:50.27#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:50.27#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:50.27#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:50.27#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:50.27#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:59:50.27#ibcon#first serial, iclass 14, count 0 2006.229.12:59:50.27#ibcon#enter sib2, iclass 14, count 0 2006.229.12:59:50.27#ibcon#flushed, iclass 14, count 0 2006.229.12:59:50.27#ibcon#about to write, iclass 14, count 0 2006.229.12:59:50.27#ibcon#wrote, iclass 14, count 0 2006.229.12:59:50.27#ibcon#about to read 3, iclass 14, count 0 2006.229.12:59:50.28#ibcon#read 3, iclass 14, count 0 2006.229.12:59:50.28#ibcon#about to read 4, iclass 14, count 0 2006.229.12:59:50.28#ibcon#read 4, iclass 14, count 0 2006.229.12:59:50.28#ibcon#about to read 5, iclass 14, count 0 2006.229.12:59:50.28#ibcon#read 5, iclass 14, count 0 2006.229.12:59:50.28#ibcon#about to read 6, iclass 14, count 0 2006.229.12:59:50.28#ibcon#read 6, iclass 14, count 0 2006.229.12:59:50.28#ibcon#end of sib2, iclass 14, count 0 2006.229.12:59:50.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:59:50.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:59:50.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.12:59:50.28#ibcon#*before write, iclass 14, count 0 2006.229.12:59:50.28#ibcon#enter sib2, iclass 14, count 0 2006.229.12:59:50.28#ibcon#flushed, iclass 14, count 0 2006.229.12:59:50.28#ibcon#about to write, iclass 14, count 0 2006.229.12:59:50.28#ibcon#wrote, iclass 14, count 0 2006.229.12:59:50.28#ibcon#about to read 3, iclass 14, count 0 2006.229.12:59:50.33#ibcon#read 3, iclass 14, count 0 2006.229.12:59:50.33#ibcon#about to read 4, iclass 14, count 0 2006.229.12:59:50.33#ibcon#read 4, iclass 14, count 0 2006.229.12:59:50.33#ibcon#about to read 5, iclass 14, count 0 2006.229.12:59:50.33#ibcon#read 5, iclass 14, count 0 2006.229.12:59:50.33#ibcon#about to read 6, iclass 14, count 0 2006.229.12:59:50.33#ibcon#read 6, iclass 14, count 0 2006.229.12:59:50.33#ibcon#end of sib2, iclass 14, count 0 2006.229.12:59:50.33#ibcon#*after write, iclass 14, count 0 2006.229.12:59:50.33#ibcon#*before return 0, iclass 14, count 0 2006.229.12:59:50.33#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:50.33#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:50.33#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:59:50.33#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:59:50.33$vck44/va=1,8 2006.229.12:59:50.33#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.12:59:50.33#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.12:59:50.33#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:50.33#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:50.33#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:50.33#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:50.33#ibcon#enter wrdev, iclass 16, count 2 2006.229.12:59:50.33#ibcon#first serial, iclass 16, count 2 2006.229.12:59:50.33#ibcon#enter sib2, iclass 16, count 2 2006.229.12:59:50.33#ibcon#flushed, iclass 16, count 2 2006.229.12:59:50.33#ibcon#about to write, iclass 16, count 2 2006.229.12:59:50.33#ibcon#wrote, iclass 16, count 2 2006.229.12:59:50.33#ibcon#about to read 3, iclass 16, count 2 2006.229.12:59:50.35#ibcon#read 3, iclass 16, count 2 2006.229.12:59:50.35#ibcon#about to read 4, iclass 16, count 2 2006.229.12:59:50.35#ibcon#read 4, iclass 16, count 2 2006.229.12:59:50.35#ibcon#about to read 5, iclass 16, count 2 2006.229.12:59:50.35#ibcon#read 5, iclass 16, count 2 2006.229.12:59:50.35#ibcon#about to read 6, iclass 16, count 2 2006.229.12:59:50.35#ibcon#read 6, iclass 16, count 2 2006.229.12:59:50.35#ibcon#end of sib2, iclass 16, count 2 2006.229.12:59:50.35#ibcon#*mode == 0, iclass 16, count 2 2006.229.12:59:50.35#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.12:59:50.35#ibcon#[25=AT01-08\r\n] 2006.229.12:59:50.35#ibcon#*before write, iclass 16, count 2 2006.229.12:59:50.35#ibcon#enter sib2, iclass 16, count 2 2006.229.12:59:50.35#ibcon#flushed, iclass 16, count 2 2006.229.12:59:50.35#ibcon#about to write, iclass 16, count 2 2006.229.12:59:50.35#ibcon#wrote, iclass 16, count 2 2006.229.12:59:50.35#ibcon#about to read 3, iclass 16, count 2 2006.229.12:59:50.38#ibcon#read 3, iclass 16, count 2 2006.229.12:59:50.38#ibcon#about to read 4, iclass 16, count 2 2006.229.12:59:50.38#ibcon#read 4, iclass 16, count 2 2006.229.12:59:50.38#ibcon#about to read 5, iclass 16, count 2 2006.229.12:59:50.38#ibcon#read 5, iclass 16, count 2 2006.229.12:59:50.38#ibcon#about to read 6, iclass 16, count 2 2006.229.12:59:50.38#ibcon#read 6, iclass 16, count 2 2006.229.12:59:50.38#ibcon#end of sib2, iclass 16, count 2 2006.229.12:59:50.38#ibcon#*after write, iclass 16, count 2 2006.229.12:59:50.38#ibcon#*before return 0, iclass 16, count 2 2006.229.12:59:50.38#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:50.38#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:50.38#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.12:59:50.38#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:50.38#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:50.50#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:50.50#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:50.50#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:59:50.50#ibcon#first serial, iclass 16, count 0 2006.229.12:59:50.50#ibcon#enter sib2, iclass 16, count 0 2006.229.12:59:50.50#ibcon#flushed, iclass 16, count 0 2006.229.12:59:50.50#ibcon#about to write, iclass 16, count 0 2006.229.12:59:50.50#ibcon#wrote, iclass 16, count 0 2006.229.12:59:50.50#ibcon#about to read 3, iclass 16, count 0 2006.229.12:59:50.52#ibcon#read 3, iclass 16, count 0 2006.229.12:59:50.52#ibcon#about to read 4, iclass 16, count 0 2006.229.12:59:50.52#ibcon#read 4, iclass 16, count 0 2006.229.12:59:50.52#ibcon#about to read 5, iclass 16, count 0 2006.229.12:59:50.52#ibcon#read 5, iclass 16, count 0 2006.229.12:59:50.52#ibcon#about to read 6, iclass 16, count 0 2006.229.12:59:50.52#ibcon#read 6, iclass 16, count 0 2006.229.12:59:50.52#ibcon#end of sib2, iclass 16, count 0 2006.229.12:59:50.52#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:59:50.52#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:59:50.52#ibcon#[25=USB\r\n] 2006.229.12:59:50.52#ibcon#*before write, iclass 16, count 0 2006.229.12:59:50.52#ibcon#enter sib2, iclass 16, count 0 2006.229.12:59:50.52#ibcon#flushed, iclass 16, count 0 2006.229.12:59:50.52#ibcon#about to write, iclass 16, count 0 2006.229.12:59:50.52#ibcon#wrote, iclass 16, count 0 2006.229.12:59:50.52#ibcon#about to read 3, iclass 16, count 0 2006.229.12:59:50.55#ibcon#read 3, iclass 16, count 0 2006.229.12:59:50.55#ibcon#about to read 4, iclass 16, count 0 2006.229.12:59:50.55#ibcon#read 4, iclass 16, count 0 2006.229.12:59:50.55#ibcon#about to read 5, iclass 16, count 0 2006.229.12:59:50.55#ibcon#read 5, iclass 16, count 0 2006.229.12:59:50.55#ibcon#about to read 6, iclass 16, count 0 2006.229.12:59:50.55#ibcon#read 6, iclass 16, count 0 2006.229.12:59:50.55#ibcon#end of sib2, iclass 16, count 0 2006.229.12:59:50.55#ibcon#*after write, iclass 16, count 0 2006.229.12:59:50.55#ibcon#*before return 0, iclass 16, count 0 2006.229.12:59:50.55#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:50.55#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:50.55#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:59:50.55#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:59:50.55$vck44/valo=2,534.99 2006.229.12:59:50.55#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.12:59:50.55#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.12:59:50.55#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:50.55#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:50.55#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:50.55#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:50.55#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:59:50.55#ibcon#first serial, iclass 18, count 0 2006.229.12:59:50.55#ibcon#enter sib2, iclass 18, count 0 2006.229.12:59:50.55#ibcon#flushed, iclass 18, count 0 2006.229.12:59:50.55#ibcon#about to write, iclass 18, count 0 2006.229.12:59:50.55#ibcon#wrote, iclass 18, count 0 2006.229.12:59:50.55#ibcon#about to read 3, iclass 18, count 0 2006.229.12:59:50.57#ibcon#read 3, iclass 18, count 0 2006.229.12:59:50.57#ibcon#about to read 4, iclass 18, count 0 2006.229.12:59:50.57#ibcon#read 4, iclass 18, count 0 2006.229.12:59:50.57#ibcon#about to read 5, iclass 18, count 0 2006.229.12:59:50.57#ibcon#read 5, iclass 18, count 0 2006.229.12:59:50.57#ibcon#about to read 6, iclass 18, count 0 2006.229.12:59:50.57#ibcon#read 6, iclass 18, count 0 2006.229.12:59:50.57#ibcon#end of sib2, iclass 18, count 0 2006.229.12:59:50.57#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:59:50.57#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:59:50.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.12:59:50.57#ibcon#*before write, iclass 18, count 0 2006.229.12:59:50.57#ibcon#enter sib2, iclass 18, count 0 2006.229.12:59:50.57#ibcon#flushed, iclass 18, count 0 2006.229.12:59:50.57#ibcon#about to write, iclass 18, count 0 2006.229.12:59:50.57#ibcon#wrote, iclass 18, count 0 2006.229.12:59:50.57#ibcon#about to read 3, iclass 18, count 0 2006.229.12:59:50.61#ibcon#read 3, iclass 18, count 0 2006.229.12:59:50.61#ibcon#about to read 4, iclass 18, count 0 2006.229.12:59:50.61#ibcon#read 4, iclass 18, count 0 2006.229.12:59:50.61#ibcon#about to read 5, iclass 18, count 0 2006.229.12:59:50.61#ibcon#read 5, iclass 18, count 0 2006.229.12:59:50.61#ibcon#about to read 6, iclass 18, count 0 2006.229.12:59:50.61#ibcon#read 6, iclass 18, count 0 2006.229.12:59:50.61#ibcon#end of sib2, iclass 18, count 0 2006.229.12:59:50.61#ibcon#*after write, iclass 18, count 0 2006.229.12:59:50.61#ibcon#*before return 0, iclass 18, count 0 2006.229.12:59:50.61#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:50.61#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:50.61#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:59:50.61#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:59:50.61$vck44/va=2,7 2006.229.12:59:50.61#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.12:59:50.61#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.12:59:50.61#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:50.61#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:50.67#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:50.67#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:50.67#ibcon#enter wrdev, iclass 20, count 2 2006.229.12:59:50.67#ibcon#first serial, iclass 20, count 2 2006.229.12:59:50.67#ibcon#enter sib2, iclass 20, count 2 2006.229.12:59:50.67#ibcon#flushed, iclass 20, count 2 2006.229.12:59:50.67#ibcon#about to write, iclass 20, count 2 2006.229.12:59:50.67#ibcon#wrote, iclass 20, count 2 2006.229.12:59:50.67#ibcon#about to read 3, iclass 20, count 2 2006.229.12:59:50.69#ibcon#read 3, iclass 20, count 2 2006.229.12:59:50.69#ibcon#about to read 4, iclass 20, count 2 2006.229.12:59:50.69#ibcon#read 4, iclass 20, count 2 2006.229.12:59:50.69#ibcon#about to read 5, iclass 20, count 2 2006.229.12:59:50.69#ibcon#read 5, iclass 20, count 2 2006.229.12:59:50.69#ibcon#about to read 6, iclass 20, count 2 2006.229.12:59:50.69#ibcon#read 6, iclass 20, count 2 2006.229.12:59:50.69#ibcon#end of sib2, iclass 20, count 2 2006.229.12:59:50.69#ibcon#*mode == 0, iclass 20, count 2 2006.229.12:59:50.69#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.12:59:50.69#ibcon#[25=AT02-07\r\n] 2006.229.12:59:50.69#ibcon#*before write, iclass 20, count 2 2006.229.12:59:50.69#ibcon#enter sib2, iclass 20, count 2 2006.229.12:59:50.69#ibcon#flushed, iclass 20, count 2 2006.229.12:59:50.69#ibcon#about to write, iclass 20, count 2 2006.229.12:59:50.69#ibcon#wrote, iclass 20, count 2 2006.229.12:59:50.69#ibcon#about to read 3, iclass 20, count 2 2006.229.12:59:50.72#ibcon#read 3, iclass 20, count 2 2006.229.12:59:50.72#ibcon#about to read 4, iclass 20, count 2 2006.229.12:59:50.72#ibcon#read 4, iclass 20, count 2 2006.229.12:59:50.72#ibcon#about to read 5, iclass 20, count 2 2006.229.12:59:50.72#ibcon#read 5, iclass 20, count 2 2006.229.12:59:50.72#ibcon#about to read 6, iclass 20, count 2 2006.229.12:59:50.72#ibcon#read 6, iclass 20, count 2 2006.229.12:59:50.72#ibcon#end of sib2, iclass 20, count 2 2006.229.12:59:50.72#ibcon#*after write, iclass 20, count 2 2006.229.12:59:50.72#ibcon#*before return 0, iclass 20, count 2 2006.229.12:59:50.72#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:50.72#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:50.72#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.12:59:50.72#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:50.72#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:50.84#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:50.84#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:50.84#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:59:50.84#ibcon#first serial, iclass 20, count 0 2006.229.12:59:50.84#ibcon#enter sib2, iclass 20, count 0 2006.229.12:59:50.84#ibcon#flushed, iclass 20, count 0 2006.229.12:59:50.84#ibcon#about to write, iclass 20, count 0 2006.229.12:59:50.84#ibcon#wrote, iclass 20, count 0 2006.229.12:59:50.84#ibcon#about to read 3, iclass 20, count 0 2006.229.12:59:50.86#ibcon#read 3, iclass 20, count 0 2006.229.12:59:50.86#ibcon#about to read 4, iclass 20, count 0 2006.229.12:59:50.86#ibcon#read 4, iclass 20, count 0 2006.229.12:59:50.86#ibcon#about to read 5, iclass 20, count 0 2006.229.12:59:50.86#ibcon#read 5, iclass 20, count 0 2006.229.12:59:50.86#ibcon#about to read 6, iclass 20, count 0 2006.229.12:59:50.86#ibcon#read 6, iclass 20, count 0 2006.229.12:59:50.86#ibcon#end of sib2, iclass 20, count 0 2006.229.12:59:50.86#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:59:50.86#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:59:50.86#ibcon#[25=USB\r\n] 2006.229.12:59:50.86#ibcon#*before write, iclass 20, count 0 2006.229.12:59:50.86#ibcon#enter sib2, iclass 20, count 0 2006.229.12:59:50.86#ibcon#flushed, iclass 20, count 0 2006.229.12:59:50.86#ibcon#about to write, iclass 20, count 0 2006.229.12:59:50.86#ibcon#wrote, iclass 20, count 0 2006.229.12:59:50.86#ibcon#about to read 3, iclass 20, count 0 2006.229.12:59:50.89#ibcon#read 3, iclass 20, count 0 2006.229.12:59:50.89#ibcon#about to read 4, iclass 20, count 0 2006.229.12:59:50.89#ibcon#read 4, iclass 20, count 0 2006.229.12:59:50.89#ibcon#about to read 5, iclass 20, count 0 2006.229.12:59:50.89#ibcon#read 5, iclass 20, count 0 2006.229.12:59:50.89#ibcon#about to read 6, iclass 20, count 0 2006.229.12:59:50.89#ibcon#read 6, iclass 20, count 0 2006.229.12:59:50.89#ibcon#end of sib2, iclass 20, count 0 2006.229.12:59:50.89#ibcon#*after write, iclass 20, count 0 2006.229.12:59:50.89#ibcon#*before return 0, iclass 20, count 0 2006.229.12:59:50.89#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:50.89#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:50.89#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:59:50.89#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:59:50.89$vck44/valo=3,564.99 2006.229.12:59:50.89#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.12:59:50.89#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.12:59:50.89#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:50.89#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:50.89#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:50.89#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:50.89#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:59:50.89#ibcon#first serial, iclass 22, count 0 2006.229.12:59:50.89#ibcon#enter sib2, iclass 22, count 0 2006.229.12:59:50.89#ibcon#flushed, iclass 22, count 0 2006.229.12:59:50.89#ibcon#about to write, iclass 22, count 0 2006.229.12:59:50.89#ibcon#wrote, iclass 22, count 0 2006.229.12:59:50.89#ibcon#about to read 3, iclass 22, count 0 2006.229.12:59:50.91#ibcon#read 3, iclass 22, count 0 2006.229.12:59:50.91#ibcon#about to read 4, iclass 22, count 0 2006.229.12:59:50.91#ibcon#read 4, iclass 22, count 0 2006.229.12:59:50.91#ibcon#about to read 5, iclass 22, count 0 2006.229.12:59:50.91#ibcon#read 5, iclass 22, count 0 2006.229.12:59:50.91#ibcon#about to read 6, iclass 22, count 0 2006.229.12:59:50.91#ibcon#read 6, iclass 22, count 0 2006.229.12:59:50.91#ibcon#end of sib2, iclass 22, count 0 2006.229.12:59:50.91#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:59:50.91#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:59:50.91#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.12:59:50.91#ibcon#*before write, iclass 22, count 0 2006.229.12:59:50.91#ibcon#enter sib2, iclass 22, count 0 2006.229.12:59:50.91#ibcon#flushed, iclass 22, count 0 2006.229.12:59:50.91#ibcon#about to write, iclass 22, count 0 2006.229.12:59:50.91#ibcon#wrote, iclass 22, count 0 2006.229.12:59:50.91#ibcon#about to read 3, iclass 22, count 0 2006.229.12:59:50.95#ibcon#read 3, iclass 22, count 0 2006.229.12:59:50.95#ibcon#about to read 4, iclass 22, count 0 2006.229.12:59:50.95#ibcon#read 4, iclass 22, count 0 2006.229.12:59:50.95#ibcon#about to read 5, iclass 22, count 0 2006.229.12:59:50.95#ibcon#read 5, iclass 22, count 0 2006.229.12:59:50.95#ibcon#about to read 6, iclass 22, count 0 2006.229.12:59:50.95#ibcon#read 6, iclass 22, count 0 2006.229.12:59:50.95#ibcon#end of sib2, iclass 22, count 0 2006.229.12:59:50.95#ibcon#*after write, iclass 22, count 0 2006.229.12:59:50.95#ibcon#*before return 0, iclass 22, count 0 2006.229.12:59:50.95#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:50.95#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:50.95#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:59:50.95#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:59:50.95$vck44/va=3,6 2006.229.12:59:50.95#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.12:59:50.95#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.12:59:50.95#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:50.95#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:51.01#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:51.01#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:51.01#ibcon#enter wrdev, iclass 24, count 2 2006.229.12:59:51.01#ibcon#first serial, iclass 24, count 2 2006.229.12:59:51.01#ibcon#enter sib2, iclass 24, count 2 2006.229.12:59:51.01#ibcon#flushed, iclass 24, count 2 2006.229.12:59:51.01#ibcon#about to write, iclass 24, count 2 2006.229.12:59:51.01#ibcon#wrote, iclass 24, count 2 2006.229.12:59:51.01#ibcon#about to read 3, iclass 24, count 2 2006.229.12:59:51.03#ibcon#read 3, iclass 24, count 2 2006.229.12:59:51.03#ibcon#about to read 4, iclass 24, count 2 2006.229.12:59:51.03#ibcon#read 4, iclass 24, count 2 2006.229.12:59:51.03#ibcon#about to read 5, iclass 24, count 2 2006.229.12:59:51.03#ibcon#read 5, iclass 24, count 2 2006.229.12:59:51.03#ibcon#about to read 6, iclass 24, count 2 2006.229.12:59:51.03#ibcon#read 6, iclass 24, count 2 2006.229.12:59:51.03#ibcon#end of sib2, iclass 24, count 2 2006.229.12:59:51.03#ibcon#*mode == 0, iclass 24, count 2 2006.229.12:59:51.03#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.12:59:51.03#ibcon#[25=AT03-06\r\n] 2006.229.12:59:51.03#ibcon#*before write, iclass 24, count 2 2006.229.12:59:51.03#ibcon#enter sib2, iclass 24, count 2 2006.229.12:59:51.03#ibcon#flushed, iclass 24, count 2 2006.229.12:59:51.03#ibcon#about to write, iclass 24, count 2 2006.229.12:59:51.03#ibcon#wrote, iclass 24, count 2 2006.229.12:59:51.03#ibcon#about to read 3, iclass 24, count 2 2006.229.12:59:51.06#ibcon#read 3, iclass 24, count 2 2006.229.12:59:51.06#ibcon#about to read 4, iclass 24, count 2 2006.229.12:59:51.06#ibcon#read 4, iclass 24, count 2 2006.229.12:59:51.06#ibcon#about to read 5, iclass 24, count 2 2006.229.12:59:51.06#ibcon#read 5, iclass 24, count 2 2006.229.12:59:51.06#ibcon#about to read 6, iclass 24, count 2 2006.229.12:59:51.06#ibcon#read 6, iclass 24, count 2 2006.229.12:59:51.06#ibcon#end of sib2, iclass 24, count 2 2006.229.12:59:51.06#ibcon#*after write, iclass 24, count 2 2006.229.12:59:51.06#ibcon#*before return 0, iclass 24, count 2 2006.229.12:59:51.06#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:51.06#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:51.06#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.12:59:51.06#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:51.06#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:51.18#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:51.18#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:51.18#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:59:51.18#ibcon#first serial, iclass 24, count 0 2006.229.12:59:51.18#ibcon#enter sib2, iclass 24, count 0 2006.229.12:59:51.18#ibcon#flushed, iclass 24, count 0 2006.229.12:59:51.18#ibcon#about to write, iclass 24, count 0 2006.229.12:59:51.18#ibcon#wrote, iclass 24, count 0 2006.229.12:59:51.18#ibcon#about to read 3, iclass 24, count 0 2006.229.12:59:51.20#ibcon#read 3, iclass 24, count 0 2006.229.12:59:51.20#ibcon#about to read 4, iclass 24, count 0 2006.229.12:59:51.20#ibcon#read 4, iclass 24, count 0 2006.229.12:59:51.20#ibcon#about to read 5, iclass 24, count 0 2006.229.12:59:51.20#ibcon#read 5, iclass 24, count 0 2006.229.12:59:51.20#ibcon#about to read 6, iclass 24, count 0 2006.229.12:59:51.20#ibcon#read 6, iclass 24, count 0 2006.229.12:59:51.20#ibcon#end of sib2, iclass 24, count 0 2006.229.12:59:51.20#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:59:51.20#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:59:51.20#ibcon#[25=USB\r\n] 2006.229.12:59:51.20#ibcon#*before write, iclass 24, count 0 2006.229.12:59:51.20#ibcon#enter sib2, iclass 24, count 0 2006.229.12:59:51.20#ibcon#flushed, iclass 24, count 0 2006.229.12:59:51.20#ibcon#about to write, iclass 24, count 0 2006.229.12:59:51.20#ibcon#wrote, iclass 24, count 0 2006.229.12:59:51.20#ibcon#about to read 3, iclass 24, count 0 2006.229.12:59:51.23#ibcon#read 3, iclass 24, count 0 2006.229.12:59:51.23#ibcon#about to read 4, iclass 24, count 0 2006.229.12:59:51.23#ibcon#read 4, iclass 24, count 0 2006.229.12:59:51.23#ibcon#about to read 5, iclass 24, count 0 2006.229.12:59:51.23#ibcon#read 5, iclass 24, count 0 2006.229.12:59:51.23#ibcon#about to read 6, iclass 24, count 0 2006.229.12:59:51.23#ibcon#read 6, iclass 24, count 0 2006.229.12:59:51.23#ibcon#end of sib2, iclass 24, count 0 2006.229.12:59:51.23#ibcon#*after write, iclass 24, count 0 2006.229.12:59:51.23#ibcon#*before return 0, iclass 24, count 0 2006.229.12:59:51.23#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:51.23#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:51.23#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:59:51.23#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:59:51.23$vck44/valo=4,624.99 2006.229.12:59:51.23#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:59:51.23#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:59:51.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:51.23#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:51.23#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:51.23#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:51.23#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:59:51.23#ibcon#first serial, iclass 26, count 0 2006.229.12:59:51.23#ibcon#enter sib2, iclass 26, count 0 2006.229.12:59:51.23#ibcon#flushed, iclass 26, count 0 2006.229.12:59:51.23#ibcon#about to write, iclass 26, count 0 2006.229.12:59:51.23#ibcon#wrote, iclass 26, count 0 2006.229.12:59:51.23#ibcon#about to read 3, iclass 26, count 0 2006.229.12:59:51.25#ibcon#read 3, iclass 26, count 0 2006.229.12:59:51.25#ibcon#about to read 4, iclass 26, count 0 2006.229.12:59:51.25#ibcon#read 4, iclass 26, count 0 2006.229.12:59:51.25#ibcon#about to read 5, iclass 26, count 0 2006.229.12:59:51.25#ibcon#read 5, iclass 26, count 0 2006.229.12:59:51.25#ibcon#about to read 6, iclass 26, count 0 2006.229.12:59:51.25#ibcon#read 6, iclass 26, count 0 2006.229.12:59:51.25#ibcon#end of sib2, iclass 26, count 0 2006.229.12:59:51.25#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:59:51.25#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:59:51.25#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.12:59:51.25#ibcon#*before write, iclass 26, count 0 2006.229.12:59:51.25#ibcon#enter sib2, iclass 26, count 0 2006.229.12:59:51.25#ibcon#flushed, iclass 26, count 0 2006.229.12:59:51.25#ibcon#about to write, iclass 26, count 0 2006.229.12:59:51.25#ibcon#wrote, iclass 26, count 0 2006.229.12:59:51.25#ibcon#about to read 3, iclass 26, count 0 2006.229.12:59:51.29#ibcon#read 3, iclass 26, count 0 2006.229.12:59:51.29#ibcon#about to read 4, iclass 26, count 0 2006.229.12:59:51.29#ibcon#read 4, iclass 26, count 0 2006.229.12:59:51.29#ibcon#about to read 5, iclass 26, count 0 2006.229.12:59:51.29#ibcon#read 5, iclass 26, count 0 2006.229.12:59:51.29#ibcon#about to read 6, iclass 26, count 0 2006.229.12:59:51.29#ibcon#read 6, iclass 26, count 0 2006.229.12:59:51.29#ibcon#end of sib2, iclass 26, count 0 2006.229.12:59:51.29#ibcon#*after write, iclass 26, count 0 2006.229.12:59:51.29#ibcon#*before return 0, iclass 26, count 0 2006.229.12:59:51.29#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:51.29#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:51.29#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:59:51.29#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:59:51.29$vck44/va=4,7 2006.229.12:59:51.29#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.12:59:51.29#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.12:59:51.29#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:51.29#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:51.35#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:51.35#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:51.35#ibcon#enter wrdev, iclass 28, count 2 2006.229.12:59:51.35#ibcon#first serial, iclass 28, count 2 2006.229.12:59:51.35#ibcon#enter sib2, iclass 28, count 2 2006.229.12:59:51.35#ibcon#flushed, iclass 28, count 2 2006.229.12:59:51.35#ibcon#about to write, iclass 28, count 2 2006.229.12:59:51.35#ibcon#wrote, iclass 28, count 2 2006.229.12:59:51.35#ibcon#about to read 3, iclass 28, count 2 2006.229.12:59:51.37#ibcon#read 3, iclass 28, count 2 2006.229.12:59:51.37#ibcon#about to read 4, iclass 28, count 2 2006.229.12:59:51.37#ibcon#read 4, iclass 28, count 2 2006.229.12:59:51.37#ibcon#about to read 5, iclass 28, count 2 2006.229.12:59:51.37#ibcon#read 5, iclass 28, count 2 2006.229.12:59:51.37#ibcon#about to read 6, iclass 28, count 2 2006.229.12:59:51.37#ibcon#read 6, iclass 28, count 2 2006.229.12:59:51.37#ibcon#end of sib2, iclass 28, count 2 2006.229.12:59:51.37#ibcon#*mode == 0, iclass 28, count 2 2006.229.12:59:51.37#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.12:59:51.37#ibcon#[25=AT04-07\r\n] 2006.229.12:59:51.37#ibcon#*before write, iclass 28, count 2 2006.229.12:59:51.37#ibcon#enter sib2, iclass 28, count 2 2006.229.12:59:51.37#ibcon#flushed, iclass 28, count 2 2006.229.12:59:51.37#ibcon#about to write, iclass 28, count 2 2006.229.12:59:51.37#ibcon#wrote, iclass 28, count 2 2006.229.12:59:51.37#ibcon#about to read 3, iclass 28, count 2 2006.229.12:59:51.40#ibcon#read 3, iclass 28, count 2 2006.229.12:59:51.40#ibcon#about to read 4, iclass 28, count 2 2006.229.12:59:51.40#ibcon#read 4, iclass 28, count 2 2006.229.12:59:51.40#ibcon#about to read 5, iclass 28, count 2 2006.229.12:59:51.40#ibcon#read 5, iclass 28, count 2 2006.229.12:59:51.40#ibcon#about to read 6, iclass 28, count 2 2006.229.12:59:51.40#ibcon#read 6, iclass 28, count 2 2006.229.12:59:51.40#ibcon#end of sib2, iclass 28, count 2 2006.229.12:59:51.40#ibcon#*after write, iclass 28, count 2 2006.229.12:59:51.40#ibcon#*before return 0, iclass 28, count 2 2006.229.12:59:51.40#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:51.40#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:51.40#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.12:59:51.40#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:51.40#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:51.52#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:51.52#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:51.52#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:59:51.52#ibcon#first serial, iclass 28, count 0 2006.229.12:59:51.52#ibcon#enter sib2, iclass 28, count 0 2006.229.12:59:51.52#ibcon#flushed, iclass 28, count 0 2006.229.12:59:51.52#ibcon#about to write, iclass 28, count 0 2006.229.12:59:51.52#ibcon#wrote, iclass 28, count 0 2006.229.12:59:51.52#ibcon#about to read 3, iclass 28, count 0 2006.229.12:59:51.54#ibcon#read 3, iclass 28, count 0 2006.229.12:59:51.54#ibcon#about to read 4, iclass 28, count 0 2006.229.12:59:51.54#ibcon#read 4, iclass 28, count 0 2006.229.12:59:51.54#ibcon#about to read 5, iclass 28, count 0 2006.229.12:59:51.54#ibcon#read 5, iclass 28, count 0 2006.229.12:59:51.54#ibcon#about to read 6, iclass 28, count 0 2006.229.12:59:51.54#ibcon#read 6, iclass 28, count 0 2006.229.12:59:51.54#ibcon#end of sib2, iclass 28, count 0 2006.229.12:59:51.54#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:59:51.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:59:51.54#ibcon#[25=USB\r\n] 2006.229.12:59:51.54#ibcon#*before write, iclass 28, count 0 2006.229.12:59:51.54#ibcon#enter sib2, iclass 28, count 0 2006.229.12:59:51.54#ibcon#flushed, iclass 28, count 0 2006.229.12:59:51.54#ibcon#about to write, iclass 28, count 0 2006.229.12:59:51.54#ibcon#wrote, iclass 28, count 0 2006.229.12:59:51.54#ibcon#about to read 3, iclass 28, count 0 2006.229.12:59:51.57#ibcon#read 3, iclass 28, count 0 2006.229.12:59:51.57#ibcon#about to read 4, iclass 28, count 0 2006.229.12:59:51.57#ibcon#read 4, iclass 28, count 0 2006.229.12:59:51.57#ibcon#about to read 5, iclass 28, count 0 2006.229.12:59:51.57#ibcon#read 5, iclass 28, count 0 2006.229.12:59:51.57#ibcon#about to read 6, iclass 28, count 0 2006.229.12:59:51.57#ibcon#read 6, iclass 28, count 0 2006.229.12:59:51.57#ibcon#end of sib2, iclass 28, count 0 2006.229.12:59:51.57#ibcon#*after write, iclass 28, count 0 2006.229.12:59:51.57#ibcon#*before return 0, iclass 28, count 0 2006.229.12:59:51.57#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:51.57#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:51.57#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:59:51.57#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:59:51.57$vck44/valo=5,734.99 2006.229.12:59:51.57#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.12:59:51.57#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.12:59:51.57#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:51.57#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:51.57#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:51.57#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:51.57#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:59:51.57#ibcon#first serial, iclass 30, count 0 2006.229.12:59:51.57#ibcon#enter sib2, iclass 30, count 0 2006.229.12:59:51.57#ibcon#flushed, iclass 30, count 0 2006.229.12:59:51.57#ibcon#about to write, iclass 30, count 0 2006.229.12:59:51.57#ibcon#wrote, iclass 30, count 0 2006.229.12:59:51.57#ibcon#about to read 3, iclass 30, count 0 2006.229.12:59:51.59#ibcon#read 3, iclass 30, count 0 2006.229.12:59:51.59#ibcon#about to read 4, iclass 30, count 0 2006.229.12:59:51.59#ibcon#read 4, iclass 30, count 0 2006.229.12:59:51.59#ibcon#about to read 5, iclass 30, count 0 2006.229.12:59:51.59#ibcon#read 5, iclass 30, count 0 2006.229.12:59:51.59#ibcon#about to read 6, iclass 30, count 0 2006.229.12:59:51.59#ibcon#read 6, iclass 30, count 0 2006.229.12:59:51.59#ibcon#end of sib2, iclass 30, count 0 2006.229.12:59:51.59#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:59:51.59#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:59:51.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.12:59:51.59#ibcon#*before write, iclass 30, count 0 2006.229.12:59:51.59#ibcon#enter sib2, iclass 30, count 0 2006.229.12:59:51.59#ibcon#flushed, iclass 30, count 0 2006.229.12:59:51.59#ibcon#about to write, iclass 30, count 0 2006.229.12:59:51.59#ibcon#wrote, iclass 30, count 0 2006.229.12:59:51.59#ibcon#about to read 3, iclass 30, count 0 2006.229.12:59:51.63#ibcon#read 3, iclass 30, count 0 2006.229.12:59:51.63#ibcon#about to read 4, iclass 30, count 0 2006.229.12:59:51.63#ibcon#read 4, iclass 30, count 0 2006.229.12:59:51.63#ibcon#about to read 5, iclass 30, count 0 2006.229.12:59:51.63#ibcon#read 5, iclass 30, count 0 2006.229.12:59:51.63#ibcon#about to read 6, iclass 30, count 0 2006.229.12:59:51.63#ibcon#read 6, iclass 30, count 0 2006.229.12:59:51.63#ibcon#end of sib2, iclass 30, count 0 2006.229.12:59:51.63#ibcon#*after write, iclass 30, count 0 2006.229.12:59:51.63#ibcon#*before return 0, iclass 30, count 0 2006.229.12:59:51.63#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:51.63#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:51.63#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:59:51.63#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:59:51.63$vck44/va=5,4 2006.229.12:59:51.63#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.12:59:51.63#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.12:59:51.63#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:51.63#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:51.69#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:51.69#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:51.69#ibcon#enter wrdev, iclass 32, count 2 2006.229.12:59:51.69#ibcon#first serial, iclass 32, count 2 2006.229.12:59:51.69#ibcon#enter sib2, iclass 32, count 2 2006.229.12:59:51.69#ibcon#flushed, iclass 32, count 2 2006.229.12:59:51.69#ibcon#about to write, iclass 32, count 2 2006.229.12:59:51.69#ibcon#wrote, iclass 32, count 2 2006.229.12:59:51.69#ibcon#about to read 3, iclass 32, count 2 2006.229.12:59:51.71#ibcon#read 3, iclass 32, count 2 2006.229.12:59:51.71#ibcon#about to read 4, iclass 32, count 2 2006.229.12:59:51.71#ibcon#read 4, iclass 32, count 2 2006.229.12:59:51.71#ibcon#about to read 5, iclass 32, count 2 2006.229.12:59:51.71#ibcon#read 5, iclass 32, count 2 2006.229.12:59:51.71#ibcon#about to read 6, iclass 32, count 2 2006.229.12:59:51.71#ibcon#read 6, iclass 32, count 2 2006.229.12:59:51.71#ibcon#end of sib2, iclass 32, count 2 2006.229.12:59:51.71#ibcon#*mode == 0, iclass 32, count 2 2006.229.12:59:51.71#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.12:59:51.71#ibcon#[25=AT05-04\r\n] 2006.229.12:59:51.71#ibcon#*before write, iclass 32, count 2 2006.229.12:59:51.71#ibcon#enter sib2, iclass 32, count 2 2006.229.12:59:51.71#ibcon#flushed, iclass 32, count 2 2006.229.12:59:51.71#ibcon#about to write, iclass 32, count 2 2006.229.12:59:51.71#ibcon#wrote, iclass 32, count 2 2006.229.12:59:51.71#ibcon#about to read 3, iclass 32, count 2 2006.229.12:59:51.74#ibcon#read 3, iclass 32, count 2 2006.229.12:59:51.74#ibcon#about to read 4, iclass 32, count 2 2006.229.12:59:51.74#ibcon#read 4, iclass 32, count 2 2006.229.12:59:51.74#ibcon#about to read 5, iclass 32, count 2 2006.229.12:59:51.74#ibcon#read 5, iclass 32, count 2 2006.229.12:59:51.74#ibcon#about to read 6, iclass 32, count 2 2006.229.12:59:51.74#ibcon#read 6, iclass 32, count 2 2006.229.12:59:51.74#ibcon#end of sib2, iclass 32, count 2 2006.229.12:59:51.74#ibcon#*after write, iclass 32, count 2 2006.229.12:59:51.74#ibcon#*before return 0, iclass 32, count 2 2006.229.12:59:51.74#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:51.74#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:51.74#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.12:59:51.74#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:51.74#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:51.86#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:51.86#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:51.86#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:59:51.86#ibcon#first serial, iclass 32, count 0 2006.229.12:59:51.86#ibcon#enter sib2, iclass 32, count 0 2006.229.12:59:51.86#ibcon#flushed, iclass 32, count 0 2006.229.12:59:51.86#ibcon#about to write, iclass 32, count 0 2006.229.12:59:51.86#ibcon#wrote, iclass 32, count 0 2006.229.12:59:51.86#ibcon#about to read 3, iclass 32, count 0 2006.229.12:59:51.87#abcon#<5=/04 1.2 2.3 27.581001002.2\r\n> 2006.229.12:59:51.88#ibcon#read 3, iclass 32, count 0 2006.229.12:59:51.88#ibcon#about to read 4, iclass 32, count 0 2006.229.12:59:51.88#ibcon#read 4, iclass 32, count 0 2006.229.12:59:51.88#ibcon#about to read 5, iclass 32, count 0 2006.229.12:59:51.88#ibcon#read 5, iclass 32, count 0 2006.229.12:59:51.88#ibcon#about to read 6, iclass 32, count 0 2006.229.12:59:51.88#ibcon#read 6, iclass 32, count 0 2006.229.12:59:51.88#ibcon#end of sib2, iclass 32, count 0 2006.229.12:59:51.88#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:59:51.88#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:59:51.88#ibcon#[25=USB\r\n] 2006.229.12:59:51.88#ibcon#*before write, iclass 32, count 0 2006.229.12:59:51.88#ibcon#enter sib2, iclass 32, count 0 2006.229.12:59:51.88#ibcon#flushed, iclass 32, count 0 2006.229.12:59:51.88#ibcon#about to write, iclass 32, count 0 2006.229.12:59:51.88#ibcon#wrote, iclass 32, count 0 2006.229.12:59:51.88#ibcon#about to read 3, iclass 32, count 0 2006.229.12:59:51.89#abcon#{5=INTERFACE CLEAR} 2006.229.12:59:51.91#ibcon#read 3, iclass 32, count 0 2006.229.12:59:51.91#ibcon#about to read 4, iclass 32, count 0 2006.229.12:59:51.91#ibcon#read 4, iclass 32, count 0 2006.229.12:59:51.91#ibcon#about to read 5, iclass 32, count 0 2006.229.12:59:51.91#ibcon#read 5, iclass 32, count 0 2006.229.12:59:51.91#ibcon#about to read 6, iclass 32, count 0 2006.229.12:59:51.91#ibcon#read 6, iclass 32, count 0 2006.229.12:59:51.91#ibcon#end of sib2, iclass 32, count 0 2006.229.12:59:51.91#ibcon#*after write, iclass 32, count 0 2006.229.12:59:51.91#ibcon#*before return 0, iclass 32, count 0 2006.229.12:59:51.91#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:51.91#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:51.91#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:59:51.91#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:59:51.91$vck44/valo=6,814.99 2006.229.12:59:51.91#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.12:59:51.91#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.12:59:51.91#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:51.91#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:59:51.91#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:59:51.91#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:59:51.91#ibcon#enter wrdev, iclass 37, count 0 2006.229.12:59:51.91#ibcon#first serial, iclass 37, count 0 2006.229.12:59:51.91#ibcon#enter sib2, iclass 37, count 0 2006.229.12:59:51.91#ibcon#flushed, iclass 37, count 0 2006.229.12:59:51.91#ibcon#about to write, iclass 37, count 0 2006.229.12:59:51.91#ibcon#wrote, iclass 37, count 0 2006.229.12:59:51.91#ibcon#about to read 3, iclass 37, count 0 2006.229.12:59:51.93#ibcon#read 3, iclass 37, count 0 2006.229.12:59:51.93#ibcon#about to read 4, iclass 37, count 0 2006.229.12:59:51.93#ibcon#read 4, iclass 37, count 0 2006.229.12:59:51.93#ibcon#about to read 5, iclass 37, count 0 2006.229.12:59:51.93#ibcon#read 5, iclass 37, count 0 2006.229.12:59:51.93#ibcon#about to read 6, iclass 37, count 0 2006.229.12:59:51.93#ibcon#read 6, iclass 37, count 0 2006.229.12:59:51.93#ibcon#end of sib2, iclass 37, count 0 2006.229.12:59:51.93#ibcon#*mode == 0, iclass 37, count 0 2006.229.12:59:51.93#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.12:59:51.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.12:59:51.93#ibcon#*before write, iclass 37, count 0 2006.229.12:59:51.93#ibcon#enter sib2, iclass 37, count 0 2006.229.12:59:51.93#ibcon#flushed, iclass 37, count 0 2006.229.12:59:51.93#ibcon#about to write, iclass 37, count 0 2006.229.12:59:51.93#ibcon#wrote, iclass 37, count 0 2006.229.12:59:51.93#ibcon#about to read 3, iclass 37, count 0 2006.229.12:59:51.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.12:59:51.97#ibcon#read 3, iclass 37, count 0 2006.229.12:59:51.97#ibcon#about to read 4, iclass 37, count 0 2006.229.12:59:51.97#ibcon#read 4, iclass 37, count 0 2006.229.12:59:51.97#ibcon#about to read 5, iclass 37, count 0 2006.229.12:59:51.97#ibcon#read 5, iclass 37, count 0 2006.229.12:59:51.97#ibcon#about to read 6, iclass 37, count 0 2006.229.12:59:51.97#ibcon#read 6, iclass 37, count 0 2006.229.12:59:51.97#ibcon#end of sib2, iclass 37, count 0 2006.229.12:59:51.97#ibcon#*after write, iclass 37, count 0 2006.229.12:59:51.97#ibcon#*before return 0, iclass 37, count 0 2006.229.12:59:51.97#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:59:51.97#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.12:59:51.97#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.12:59:51.97#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.12:59:51.97$vck44/va=6,4 2006.229.12:59:51.97#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.12:59:51.97#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.12:59:51.97#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:51.97#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:52.03#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:52.03#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:52.03#ibcon#enter wrdev, iclass 40, count 2 2006.229.12:59:52.03#ibcon#first serial, iclass 40, count 2 2006.229.12:59:52.03#ibcon#enter sib2, iclass 40, count 2 2006.229.12:59:52.03#ibcon#flushed, iclass 40, count 2 2006.229.12:59:52.03#ibcon#about to write, iclass 40, count 2 2006.229.12:59:52.03#ibcon#wrote, iclass 40, count 2 2006.229.12:59:52.03#ibcon#about to read 3, iclass 40, count 2 2006.229.12:59:52.05#ibcon#read 3, iclass 40, count 2 2006.229.12:59:52.05#ibcon#about to read 4, iclass 40, count 2 2006.229.12:59:52.05#ibcon#read 4, iclass 40, count 2 2006.229.12:59:52.05#ibcon#about to read 5, iclass 40, count 2 2006.229.12:59:52.05#ibcon#read 5, iclass 40, count 2 2006.229.12:59:52.05#ibcon#about to read 6, iclass 40, count 2 2006.229.12:59:52.05#ibcon#read 6, iclass 40, count 2 2006.229.12:59:52.05#ibcon#end of sib2, iclass 40, count 2 2006.229.12:59:52.05#ibcon#*mode == 0, iclass 40, count 2 2006.229.12:59:52.05#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.12:59:52.05#ibcon#[25=AT06-04\r\n] 2006.229.12:59:52.05#ibcon#*before write, iclass 40, count 2 2006.229.12:59:52.05#ibcon#enter sib2, iclass 40, count 2 2006.229.12:59:52.05#ibcon#flushed, iclass 40, count 2 2006.229.12:59:52.05#ibcon#about to write, iclass 40, count 2 2006.229.12:59:52.05#ibcon#wrote, iclass 40, count 2 2006.229.12:59:52.05#ibcon#about to read 3, iclass 40, count 2 2006.229.12:59:52.08#ibcon#read 3, iclass 40, count 2 2006.229.12:59:52.08#ibcon#about to read 4, iclass 40, count 2 2006.229.12:59:52.08#ibcon#read 4, iclass 40, count 2 2006.229.12:59:52.08#ibcon#about to read 5, iclass 40, count 2 2006.229.12:59:52.08#ibcon#read 5, iclass 40, count 2 2006.229.12:59:52.08#ibcon#about to read 6, iclass 40, count 2 2006.229.12:59:52.08#ibcon#read 6, iclass 40, count 2 2006.229.12:59:52.08#ibcon#end of sib2, iclass 40, count 2 2006.229.12:59:52.08#ibcon#*after write, iclass 40, count 2 2006.229.12:59:52.08#ibcon#*before return 0, iclass 40, count 2 2006.229.12:59:52.08#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:52.08#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:52.08#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.12:59:52.08#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:52.08#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:52.20#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:52.20#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:52.20#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:59:52.20#ibcon#first serial, iclass 40, count 0 2006.229.12:59:52.20#ibcon#enter sib2, iclass 40, count 0 2006.229.12:59:52.20#ibcon#flushed, iclass 40, count 0 2006.229.12:59:52.20#ibcon#about to write, iclass 40, count 0 2006.229.12:59:52.20#ibcon#wrote, iclass 40, count 0 2006.229.12:59:52.20#ibcon#about to read 3, iclass 40, count 0 2006.229.12:59:52.22#ibcon#read 3, iclass 40, count 0 2006.229.12:59:52.22#ibcon#about to read 4, iclass 40, count 0 2006.229.12:59:52.22#ibcon#read 4, iclass 40, count 0 2006.229.12:59:52.22#ibcon#about to read 5, iclass 40, count 0 2006.229.12:59:52.22#ibcon#read 5, iclass 40, count 0 2006.229.12:59:52.22#ibcon#about to read 6, iclass 40, count 0 2006.229.12:59:52.22#ibcon#read 6, iclass 40, count 0 2006.229.12:59:52.22#ibcon#end of sib2, iclass 40, count 0 2006.229.12:59:52.22#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:59:52.22#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:59:52.22#ibcon#[25=USB\r\n] 2006.229.12:59:52.22#ibcon#*before write, iclass 40, count 0 2006.229.12:59:52.22#ibcon#enter sib2, iclass 40, count 0 2006.229.12:59:52.22#ibcon#flushed, iclass 40, count 0 2006.229.12:59:52.22#ibcon#about to write, iclass 40, count 0 2006.229.12:59:52.22#ibcon#wrote, iclass 40, count 0 2006.229.12:59:52.22#ibcon#about to read 3, iclass 40, count 0 2006.229.12:59:52.25#ibcon#read 3, iclass 40, count 0 2006.229.12:59:52.25#ibcon#about to read 4, iclass 40, count 0 2006.229.12:59:52.25#ibcon#read 4, iclass 40, count 0 2006.229.12:59:52.25#ibcon#about to read 5, iclass 40, count 0 2006.229.12:59:52.25#ibcon#read 5, iclass 40, count 0 2006.229.12:59:52.25#ibcon#about to read 6, iclass 40, count 0 2006.229.12:59:52.25#ibcon#read 6, iclass 40, count 0 2006.229.12:59:52.25#ibcon#end of sib2, iclass 40, count 0 2006.229.12:59:52.25#ibcon#*after write, iclass 40, count 0 2006.229.12:59:52.25#ibcon#*before return 0, iclass 40, count 0 2006.229.12:59:52.25#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:52.25#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:52.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:59:52.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:59:52.25$vck44/valo=7,864.99 2006.229.12:59:52.25#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.12:59:52.25#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.12:59:52.25#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:52.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:52.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:52.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:52.25#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:59:52.25#ibcon#first serial, iclass 4, count 0 2006.229.12:59:52.25#ibcon#enter sib2, iclass 4, count 0 2006.229.12:59:52.25#ibcon#flushed, iclass 4, count 0 2006.229.12:59:52.25#ibcon#about to write, iclass 4, count 0 2006.229.12:59:52.25#ibcon#wrote, iclass 4, count 0 2006.229.12:59:52.25#ibcon#about to read 3, iclass 4, count 0 2006.229.12:59:52.27#ibcon#read 3, iclass 4, count 0 2006.229.12:59:52.27#ibcon#about to read 4, iclass 4, count 0 2006.229.12:59:52.27#ibcon#read 4, iclass 4, count 0 2006.229.12:59:52.27#ibcon#about to read 5, iclass 4, count 0 2006.229.12:59:52.27#ibcon#read 5, iclass 4, count 0 2006.229.12:59:52.27#ibcon#about to read 6, iclass 4, count 0 2006.229.12:59:52.27#ibcon#read 6, iclass 4, count 0 2006.229.12:59:52.27#ibcon#end of sib2, iclass 4, count 0 2006.229.12:59:52.27#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:59:52.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:59:52.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.12:59:52.27#ibcon#*before write, iclass 4, count 0 2006.229.12:59:52.27#ibcon#enter sib2, iclass 4, count 0 2006.229.12:59:52.27#ibcon#flushed, iclass 4, count 0 2006.229.12:59:52.27#ibcon#about to write, iclass 4, count 0 2006.229.12:59:52.27#ibcon#wrote, iclass 4, count 0 2006.229.12:59:52.27#ibcon#about to read 3, iclass 4, count 0 2006.229.12:59:52.31#ibcon#read 3, iclass 4, count 0 2006.229.12:59:52.31#ibcon#about to read 4, iclass 4, count 0 2006.229.12:59:52.31#ibcon#read 4, iclass 4, count 0 2006.229.12:59:52.31#ibcon#about to read 5, iclass 4, count 0 2006.229.12:59:52.31#ibcon#read 5, iclass 4, count 0 2006.229.12:59:52.31#ibcon#about to read 6, iclass 4, count 0 2006.229.12:59:52.31#ibcon#read 6, iclass 4, count 0 2006.229.12:59:52.31#ibcon#end of sib2, iclass 4, count 0 2006.229.12:59:52.31#ibcon#*after write, iclass 4, count 0 2006.229.12:59:52.31#ibcon#*before return 0, iclass 4, count 0 2006.229.12:59:52.31#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:52.31#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:52.31#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:59:52.31#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:59:52.31$vck44/va=7,5 2006.229.12:59:52.31#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.12:59:52.31#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.12:59:52.31#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:52.31#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:52.37#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:52.37#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:52.37#ibcon#enter wrdev, iclass 6, count 2 2006.229.12:59:52.37#ibcon#first serial, iclass 6, count 2 2006.229.12:59:52.37#ibcon#enter sib2, iclass 6, count 2 2006.229.12:59:52.37#ibcon#flushed, iclass 6, count 2 2006.229.12:59:52.37#ibcon#about to write, iclass 6, count 2 2006.229.12:59:52.37#ibcon#wrote, iclass 6, count 2 2006.229.12:59:52.37#ibcon#about to read 3, iclass 6, count 2 2006.229.12:59:52.39#ibcon#read 3, iclass 6, count 2 2006.229.12:59:52.39#ibcon#about to read 4, iclass 6, count 2 2006.229.12:59:52.39#ibcon#read 4, iclass 6, count 2 2006.229.12:59:52.39#ibcon#about to read 5, iclass 6, count 2 2006.229.12:59:52.39#ibcon#read 5, iclass 6, count 2 2006.229.12:59:52.39#ibcon#about to read 6, iclass 6, count 2 2006.229.12:59:52.39#ibcon#read 6, iclass 6, count 2 2006.229.12:59:52.39#ibcon#end of sib2, iclass 6, count 2 2006.229.12:59:52.39#ibcon#*mode == 0, iclass 6, count 2 2006.229.12:59:52.39#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.12:59:52.39#ibcon#[25=AT07-05\r\n] 2006.229.12:59:52.39#ibcon#*before write, iclass 6, count 2 2006.229.12:59:52.39#ibcon#enter sib2, iclass 6, count 2 2006.229.12:59:52.39#ibcon#flushed, iclass 6, count 2 2006.229.12:59:52.39#ibcon#about to write, iclass 6, count 2 2006.229.12:59:52.39#ibcon#wrote, iclass 6, count 2 2006.229.12:59:52.39#ibcon#about to read 3, iclass 6, count 2 2006.229.12:59:52.42#ibcon#read 3, iclass 6, count 2 2006.229.12:59:52.42#ibcon#about to read 4, iclass 6, count 2 2006.229.12:59:52.42#ibcon#read 4, iclass 6, count 2 2006.229.12:59:52.42#ibcon#about to read 5, iclass 6, count 2 2006.229.12:59:52.42#ibcon#read 5, iclass 6, count 2 2006.229.12:59:52.42#ibcon#about to read 6, iclass 6, count 2 2006.229.12:59:52.42#ibcon#read 6, iclass 6, count 2 2006.229.12:59:52.42#ibcon#end of sib2, iclass 6, count 2 2006.229.12:59:52.42#ibcon#*after write, iclass 6, count 2 2006.229.12:59:52.42#ibcon#*before return 0, iclass 6, count 2 2006.229.12:59:52.42#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:52.42#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:52.42#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.12:59:52.42#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:52.42#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:52.54#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:52.54#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:52.54#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:59:52.54#ibcon#first serial, iclass 6, count 0 2006.229.12:59:52.54#ibcon#enter sib2, iclass 6, count 0 2006.229.12:59:52.54#ibcon#flushed, iclass 6, count 0 2006.229.12:59:52.54#ibcon#about to write, iclass 6, count 0 2006.229.12:59:52.54#ibcon#wrote, iclass 6, count 0 2006.229.12:59:52.54#ibcon#about to read 3, iclass 6, count 0 2006.229.12:59:52.56#ibcon#read 3, iclass 6, count 0 2006.229.12:59:52.56#ibcon#about to read 4, iclass 6, count 0 2006.229.12:59:52.56#ibcon#read 4, iclass 6, count 0 2006.229.12:59:52.56#ibcon#about to read 5, iclass 6, count 0 2006.229.12:59:52.56#ibcon#read 5, iclass 6, count 0 2006.229.12:59:52.56#ibcon#about to read 6, iclass 6, count 0 2006.229.12:59:52.56#ibcon#read 6, iclass 6, count 0 2006.229.12:59:52.56#ibcon#end of sib2, iclass 6, count 0 2006.229.12:59:52.56#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:59:52.56#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:59:52.56#ibcon#[25=USB\r\n] 2006.229.12:59:52.56#ibcon#*before write, iclass 6, count 0 2006.229.12:59:52.56#ibcon#enter sib2, iclass 6, count 0 2006.229.12:59:52.56#ibcon#flushed, iclass 6, count 0 2006.229.12:59:52.56#ibcon#about to write, iclass 6, count 0 2006.229.12:59:52.56#ibcon#wrote, iclass 6, count 0 2006.229.12:59:52.56#ibcon#about to read 3, iclass 6, count 0 2006.229.12:59:52.59#ibcon#read 3, iclass 6, count 0 2006.229.12:59:52.59#ibcon#about to read 4, iclass 6, count 0 2006.229.12:59:52.59#ibcon#read 4, iclass 6, count 0 2006.229.12:59:52.59#ibcon#about to read 5, iclass 6, count 0 2006.229.12:59:52.59#ibcon#read 5, iclass 6, count 0 2006.229.12:59:52.59#ibcon#about to read 6, iclass 6, count 0 2006.229.12:59:52.59#ibcon#read 6, iclass 6, count 0 2006.229.12:59:52.59#ibcon#end of sib2, iclass 6, count 0 2006.229.12:59:52.59#ibcon#*after write, iclass 6, count 0 2006.229.12:59:52.59#ibcon#*before return 0, iclass 6, count 0 2006.229.12:59:52.59#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:52.59#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:52.59#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:59:52.59#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:59:52.59$vck44/valo=8,884.99 2006.229.12:59:52.59#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.12:59:52.59#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.12:59:52.59#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:52.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:52.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:52.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:52.59#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:59:52.59#ibcon#first serial, iclass 10, count 0 2006.229.12:59:52.59#ibcon#enter sib2, iclass 10, count 0 2006.229.12:59:52.59#ibcon#flushed, iclass 10, count 0 2006.229.12:59:52.59#ibcon#about to write, iclass 10, count 0 2006.229.12:59:52.59#ibcon#wrote, iclass 10, count 0 2006.229.12:59:52.59#ibcon#about to read 3, iclass 10, count 0 2006.229.12:59:52.61#ibcon#read 3, iclass 10, count 0 2006.229.12:59:52.61#ibcon#about to read 4, iclass 10, count 0 2006.229.12:59:52.61#ibcon#read 4, iclass 10, count 0 2006.229.12:59:52.61#ibcon#about to read 5, iclass 10, count 0 2006.229.12:59:52.61#ibcon#read 5, iclass 10, count 0 2006.229.12:59:52.61#ibcon#about to read 6, iclass 10, count 0 2006.229.12:59:52.61#ibcon#read 6, iclass 10, count 0 2006.229.12:59:52.61#ibcon#end of sib2, iclass 10, count 0 2006.229.12:59:52.61#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:59:52.61#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:59:52.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.12:59:52.61#ibcon#*before write, iclass 10, count 0 2006.229.12:59:52.61#ibcon#enter sib2, iclass 10, count 0 2006.229.12:59:52.61#ibcon#flushed, iclass 10, count 0 2006.229.12:59:52.61#ibcon#about to write, iclass 10, count 0 2006.229.12:59:52.61#ibcon#wrote, iclass 10, count 0 2006.229.12:59:52.61#ibcon#about to read 3, iclass 10, count 0 2006.229.12:59:52.65#ibcon#read 3, iclass 10, count 0 2006.229.12:59:52.65#ibcon#about to read 4, iclass 10, count 0 2006.229.12:59:52.65#ibcon#read 4, iclass 10, count 0 2006.229.12:59:52.65#ibcon#about to read 5, iclass 10, count 0 2006.229.12:59:52.65#ibcon#read 5, iclass 10, count 0 2006.229.12:59:52.65#ibcon#about to read 6, iclass 10, count 0 2006.229.12:59:52.65#ibcon#read 6, iclass 10, count 0 2006.229.12:59:52.65#ibcon#end of sib2, iclass 10, count 0 2006.229.12:59:52.65#ibcon#*after write, iclass 10, count 0 2006.229.12:59:52.65#ibcon#*before return 0, iclass 10, count 0 2006.229.12:59:52.65#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:52.65#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:52.65#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:59:52.65#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:59:52.65$vck44/va=8,6 2006.229.12:59:52.65#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.12:59:52.65#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.12:59:52.65#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:52.65#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:59:52.71#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:59:52.71#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:59:52.71#ibcon#enter wrdev, iclass 12, count 2 2006.229.12:59:52.71#ibcon#first serial, iclass 12, count 2 2006.229.12:59:52.71#ibcon#enter sib2, iclass 12, count 2 2006.229.12:59:52.71#ibcon#flushed, iclass 12, count 2 2006.229.12:59:52.71#ibcon#about to write, iclass 12, count 2 2006.229.12:59:52.71#ibcon#wrote, iclass 12, count 2 2006.229.12:59:52.71#ibcon#about to read 3, iclass 12, count 2 2006.229.12:59:52.73#ibcon#read 3, iclass 12, count 2 2006.229.12:59:52.73#ibcon#about to read 4, iclass 12, count 2 2006.229.12:59:52.73#ibcon#read 4, iclass 12, count 2 2006.229.12:59:52.73#ibcon#about to read 5, iclass 12, count 2 2006.229.12:59:52.73#ibcon#read 5, iclass 12, count 2 2006.229.12:59:52.73#ibcon#about to read 6, iclass 12, count 2 2006.229.12:59:52.73#ibcon#read 6, iclass 12, count 2 2006.229.12:59:52.73#ibcon#end of sib2, iclass 12, count 2 2006.229.12:59:52.73#ibcon#*mode == 0, iclass 12, count 2 2006.229.12:59:52.73#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.12:59:52.73#ibcon#[25=AT08-06\r\n] 2006.229.12:59:52.73#ibcon#*before write, iclass 12, count 2 2006.229.12:59:52.73#ibcon#enter sib2, iclass 12, count 2 2006.229.12:59:52.73#ibcon#flushed, iclass 12, count 2 2006.229.12:59:52.73#ibcon#about to write, iclass 12, count 2 2006.229.12:59:52.73#ibcon#wrote, iclass 12, count 2 2006.229.12:59:52.73#ibcon#about to read 3, iclass 12, count 2 2006.229.12:59:52.76#ibcon#read 3, iclass 12, count 2 2006.229.12:59:52.76#ibcon#about to read 4, iclass 12, count 2 2006.229.12:59:52.76#ibcon#read 4, iclass 12, count 2 2006.229.12:59:52.76#ibcon#about to read 5, iclass 12, count 2 2006.229.12:59:52.76#ibcon#read 5, iclass 12, count 2 2006.229.12:59:52.76#ibcon#about to read 6, iclass 12, count 2 2006.229.12:59:52.76#ibcon#read 6, iclass 12, count 2 2006.229.12:59:52.76#ibcon#end of sib2, iclass 12, count 2 2006.229.12:59:52.76#ibcon#*after write, iclass 12, count 2 2006.229.12:59:52.76#ibcon#*before return 0, iclass 12, count 2 2006.229.12:59:52.76#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:59:52.76#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.12:59:52.76#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.12:59:52.76#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:52.76#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:59:52.88#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:59:52.88#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:59:52.88#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:59:52.88#ibcon#first serial, iclass 12, count 0 2006.229.12:59:52.88#ibcon#enter sib2, iclass 12, count 0 2006.229.12:59:52.88#ibcon#flushed, iclass 12, count 0 2006.229.12:59:52.88#ibcon#about to write, iclass 12, count 0 2006.229.12:59:52.88#ibcon#wrote, iclass 12, count 0 2006.229.12:59:52.88#ibcon#about to read 3, iclass 12, count 0 2006.229.12:59:52.90#ibcon#read 3, iclass 12, count 0 2006.229.12:59:52.90#ibcon#about to read 4, iclass 12, count 0 2006.229.12:59:52.90#ibcon#read 4, iclass 12, count 0 2006.229.12:59:52.90#ibcon#about to read 5, iclass 12, count 0 2006.229.12:59:52.90#ibcon#read 5, iclass 12, count 0 2006.229.12:59:52.90#ibcon#about to read 6, iclass 12, count 0 2006.229.12:59:52.90#ibcon#read 6, iclass 12, count 0 2006.229.12:59:52.90#ibcon#end of sib2, iclass 12, count 0 2006.229.12:59:52.90#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:59:52.90#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:59:52.90#ibcon#[25=USB\r\n] 2006.229.12:59:52.90#ibcon#*before write, iclass 12, count 0 2006.229.12:59:52.90#ibcon#enter sib2, iclass 12, count 0 2006.229.12:59:52.90#ibcon#flushed, iclass 12, count 0 2006.229.12:59:52.90#ibcon#about to write, iclass 12, count 0 2006.229.12:59:52.90#ibcon#wrote, iclass 12, count 0 2006.229.12:59:52.90#ibcon#about to read 3, iclass 12, count 0 2006.229.12:59:52.93#ibcon#read 3, iclass 12, count 0 2006.229.12:59:52.93#ibcon#about to read 4, iclass 12, count 0 2006.229.12:59:52.93#ibcon#read 4, iclass 12, count 0 2006.229.12:59:52.93#ibcon#about to read 5, iclass 12, count 0 2006.229.12:59:52.93#ibcon#read 5, iclass 12, count 0 2006.229.12:59:52.93#ibcon#about to read 6, iclass 12, count 0 2006.229.12:59:52.93#ibcon#read 6, iclass 12, count 0 2006.229.12:59:52.93#ibcon#end of sib2, iclass 12, count 0 2006.229.12:59:52.93#ibcon#*after write, iclass 12, count 0 2006.229.12:59:52.93#ibcon#*before return 0, iclass 12, count 0 2006.229.12:59:52.93#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:59:52.93#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.12:59:52.93#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:59:52.93#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:59:52.93$vck44/vblo=1,629.99 2006.229.12:59:52.93#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.12:59:52.93#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.12:59:52.93#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:52.93#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:52.93#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:52.93#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:52.93#ibcon#enter wrdev, iclass 14, count 0 2006.229.12:59:52.93#ibcon#first serial, iclass 14, count 0 2006.229.12:59:52.93#ibcon#enter sib2, iclass 14, count 0 2006.229.12:59:52.93#ibcon#flushed, iclass 14, count 0 2006.229.12:59:52.93#ibcon#about to write, iclass 14, count 0 2006.229.12:59:52.93#ibcon#wrote, iclass 14, count 0 2006.229.12:59:52.93#ibcon#about to read 3, iclass 14, count 0 2006.229.12:59:52.95#ibcon#read 3, iclass 14, count 0 2006.229.12:59:52.95#ibcon#about to read 4, iclass 14, count 0 2006.229.12:59:52.95#ibcon#read 4, iclass 14, count 0 2006.229.12:59:52.95#ibcon#about to read 5, iclass 14, count 0 2006.229.12:59:52.95#ibcon#read 5, iclass 14, count 0 2006.229.12:59:52.95#ibcon#about to read 6, iclass 14, count 0 2006.229.12:59:52.95#ibcon#read 6, iclass 14, count 0 2006.229.12:59:52.95#ibcon#end of sib2, iclass 14, count 0 2006.229.12:59:52.95#ibcon#*mode == 0, iclass 14, count 0 2006.229.12:59:52.95#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.12:59:52.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.12:59:52.95#ibcon#*before write, iclass 14, count 0 2006.229.12:59:52.95#ibcon#enter sib2, iclass 14, count 0 2006.229.12:59:52.95#ibcon#flushed, iclass 14, count 0 2006.229.12:59:52.95#ibcon#about to write, iclass 14, count 0 2006.229.12:59:52.95#ibcon#wrote, iclass 14, count 0 2006.229.12:59:52.95#ibcon#about to read 3, iclass 14, count 0 2006.229.12:59:52.99#ibcon#read 3, iclass 14, count 0 2006.229.12:59:52.99#ibcon#about to read 4, iclass 14, count 0 2006.229.12:59:52.99#ibcon#read 4, iclass 14, count 0 2006.229.12:59:52.99#ibcon#about to read 5, iclass 14, count 0 2006.229.12:59:52.99#ibcon#read 5, iclass 14, count 0 2006.229.12:59:52.99#ibcon#about to read 6, iclass 14, count 0 2006.229.12:59:52.99#ibcon#read 6, iclass 14, count 0 2006.229.12:59:52.99#ibcon#end of sib2, iclass 14, count 0 2006.229.12:59:52.99#ibcon#*after write, iclass 14, count 0 2006.229.12:59:52.99#ibcon#*before return 0, iclass 14, count 0 2006.229.12:59:52.99#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:52.99#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.12:59:52.99#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.12:59:52.99#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.12:59:52.99$vck44/vb=1,4 2006.229.12:59:52.99#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.12:59:52.99#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.12:59:52.99#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:52.99#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:52.99#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:52.99#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:52.99#ibcon#enter wrdev, iclass 16, count 2 2006.229.12:59:52.99#ibcon#first serial, iclass 16, count 2 2006.229.12:59:52.99#ibcon#enter sib2, iclass 16, count 2 2006.229.12:59:52.99#ibcon#flushed, iclass 16, count 2 2006.229.12:59:52.99#ibcon#about to write, iclass 16, count 2 2006.229.12:59:52.99#ibcon#wrote, iclass 16, count 2 2006.229.12:59:52.99#ibcon#about to read 3, iclass 16, count 2 2006.229.12:59:53.01#ibcon#read 3, iclass 16, count 2 2006.229.12:59:53.01#ibcon#about to read 4, iclass 16, count 2 2006.229.12:59:53.01#ibcon#read 4, iclass 16, count 2 2006.229.12:59:53.01#ibcon#about to read 5, iclass 16, count 2 2006.229.12:59:53.01#ibcon#read 5, iclass 16, count 2 2006.229.12:59:53.01#ibcon#about to read 6, iclass 16, count 2 2006.229.12:59:53.01#ibcon#read 6, iclass 16, count 2 2006.229.12:59:53.01#ibcon#end of sib2, iclass 16, count 2 2006.229.12:59:53.01#ibcon#*mode == 0, iclass 16, count 2 2006.229.12:59:53.01#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.12:59:53.01#ibcon#[27=AT01-04\r\n] 2006.229.12:59:53.01#ibcon#*before write, iclass 16, count 2 2006.229.12:59:53.01#ibcon#enter sib2, iclass 16, count 2 2006.229.12:59:53.01#ibcon#flushed, iclass 16, count 2 2006.229.12:59:53.01#ibcon#about to write, iclass 16, count 2 2006.229.12:59:53.01#ibcon#wrote, iclass 16, count 2 2006.229.12:59:53.01#ibcon#about to read 3, iclass 16, count 2 2006.229.12:59:53.04#ibcon#read 3, iclass 16, count 2 2006.229.12:59:53.04#ibcon#about to read 4, iclass 16, count 2 2006.229.12:59:53.04#ibcon#read 4, iclass 16, count 2 2006.229.12:59:53.04#ibcon#about to read 5, iclass 16, count 2 2006.229.12:59:53.04#ibcon#read 5, iclass 16, count 2 2006.229.12:59:53.04#ibcon#about to read 6, iclass 16, count 2 2006.229.12:59:53.04#ibcon#read 6, iclass 16, count 2 2006.229.12:59:53.04#ibcon#end of sib2, iclass 16, count 2 2006.229.12:59:53.04#ibcon#*after write, iclass 16, count 2 2006.229.12:59:53.04#ibcon#*before return 0, iclass 16, count 2 2006.229.12:59:53.04#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:53.04#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.12:59:53.04#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.12:59:53.04#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:53.04#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:53.16#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:53.16#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:53.16#ibcon#enter wrdev, iclass 16, count 0 2006.229.12:59:53.16#ibcon#first serial, iclass 16, count 0 2006.229.12:59:53.16#ibcon#enter sib2, iclass 16, count 0 2006.229.12:59:53.16#ibcon#flushed, iclass 16, count 0 2006.229.12:59:53.16#ibcon#about to write, iclass 16, count 0 2006.229.12:59:53.16#ibcon#wrote, iclass 16, count 0 2006.229.12:59:53.16#ibcon#about to read 3, iclass 16, count 0 2006.229.12:59:53.18#ibcon#read 3, iclass 16, count 0 2006.229.12:59:53.18#ibcon#about to read 4, iclass 16, count 0 2006.229.12:59:53.18#ibcon#read 4, iclass 16, count 0 2006.229.12:59:53.18#ibcon#about to read 5, iclass 16, count 0 2006.229.12:59:53.18#ibcon#read 5, iclass 16, count 0 2006.229.12:59:53.18#ibcon#about to read 6, iclass 16, count 0 2006.229.12:59:53.18#ibcon#read 6, iclass 16, count 0 2006.229.12:59:53.18#ibcon#end of sib2, iclass 16, count 0 2006.229.12:59:53.18#ibcon#*mode == 0, iclass 16, count 0 2006.229.12:59:53.18#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.12:59:53.18#ibcon#[27=USB\r\n] 2006.229.12:59:53.18#ibcon#*before write, iclass 16, count 0 2006.229.12:59:53.18#ibcon#enter sib2, iclass 16, count 0 2006.229.12:59:53.18#ibcon#flushed, iclass 16, count 0 2006.229.12:59:53.18#ibcon#about to write, iclass 16, count 0 2006.229.12:59:53.18#ibcon#wrote, iclass 16, count 0 2006.229.12:59:53.18#ibcon#about to read 3, iclass 16, count 0 2006.229.12:59:53.21#ibcon#read 3, iclass 16, count 0 2006.229.12:59:53.21#ibcon#about to read 4, iclass 16, count 0 2006.229.12:59:53.21#ibcon#read 4, iclass 16, count 0 2006.229.12:59:53.21#ibcon#about to read 5, iclass 16, count 0 2006.229.12:59:53.21#ibcon#read 5, iclass 16, count 0 2006.229.12:59:53.21#ibcon#about to read 6, iclass 16, count 0 2006.229.12:59:53.21#ibcon#read 6, iclass 16, count 0 2006.229.12:59:53.21#ibcon#end of sib2, iclass 16, count 0 2006.229.12:59:53.21#ibcon#*after write, iclass 16, count 0 2006.229.12:59:53.21#ibcon#*before return 0, iclass 16, count 0 2006.229.12:59:53.21#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:53.21#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.12:59:53.21#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.12:59:53.21#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.12:59:53.21$vck44/vblo=2,634.99 2006.229.12:59:53.21#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.12:59:53.21#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.12:59:53.21#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:53.21#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:53.21#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:53.21#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:53.21#ibcon#enter wrdev, iclass 18, count 0 2006.229.12:59:53.21#ibcon#first serial, iclass 18, count 0 2006.229.12:59:53.21#ibcon#enter sib2, iclass 18, count 0 2006.229.12:59:53.21#ibcon#flushed, iclass 18, count 0 2006.229.12:59:53.21#ibcon#about to write, iclass 18, count 0 2006.229.12:59:53.21#ibcon#wrote, iclass 18, count 0 2006.229.12:59:53.21#ibcon#about to read 3, iclass 18, count 0 2006.229.12:59:53.23#ibcon#read 3, iclass 18, count 0 2006.229.12:59:53.23#ibcon#about to read 4, iclass 18, count 0 2006.229.12:59:53.23#ibcon#read 4, iclass 18, count 0 2006.229.12:59:53.23#ibcon#about to read 5, iclass 18, count 0 2006.229.12:59:53.23#ibcon#read 5, iclass 18, count 0 2006.229.12:59:53.23#ibcon#about to read 6, iclass 18, count 0 2006.229.12:59:53.23#ibcon#read 6, iclass 18, count 0 2006.229.12:59:53.23#ibcon#end of sib2, iclass 18, count 0 2006.229.12:59:53.23#ibcon#*mode == 0, iclass 18, count 0 2006.229.12:59:53.23#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.12:59:53.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.12:59:53.23#ibcon#*before write, iclass 18, count 0 2006.229.12:59:53.23#ibcon#enter sib2, iclass 18, count 0 2006.229.12:59:53.23#ibcon#flushed, iclass 18, count 0 2006.229.12:59:53.23#ibcon#about to write, iclass 18, count 0 2006.229.12:59:53.23#ibcon#wrote, iclass 18, count 0 2006.229.12:59:53.23#ibcon#about to read 3, iclass 18, count 0 2006.229.12:59:53.27#ibcon#read 3, iclass 18, count 0 2006.229.12:59:53.27#ibcon#about to read 4, iclass 18, count 0 2006.229.12:59:53.27#ibcon#read 4, iclass 18, count 0 2006.229.12:59:53.27#ibcon#about to read 5, iclass 18, count 0 2006.229.12:59:53.27#ibcon#read 5, iclass 18, count 0 2006.229.12:59:53.27#ibcon#about to read 6, iclass 18, count 0 2006.229.12:59:53.27#ibcon#read 6, iclass 18, count 0 2006.229.12:59:53.27#ibcon#end of sib2, iclass 18, count 0 2006.229.12:59:53.27#ibcon#*after write, iclass 18, count 0 2006.229.12:59:53.27#ibcon#*before return 0, iclass 18, count 0 2006.229.12:59:53.27#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:53.27#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.12:59:53.27#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.12:59:53.27#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.12:59:53.27$vck44/vb=2,4 2006.229.12:59:53.27#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.12:59:53.27#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.12:59:53.27#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:53.27#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:53.33#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:53.33#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:53.33#ibcon#enter wrdev, iclass 20, count 2 2006.229.12:59:53.33#ibcon#first serial, iclass 20, count 2 2006.229.12:59:53.33#ibcon#enter sib2, iclass 20, count 2 2006.229.12:59:53.33#ibcon#flushed, iclass 20, count 2 2006.229.12:59:53.33#ibcon#about to write, iclass 20, count 2 2006.229.12:59:53.33#ibcon#wrote, iclass 20, count 2 2006.229.12:59:53.33#ibcon#about to read 3, iclass 20, count 2 2006.229.12:59:53.35#ibcon#read 3, iclass 20, count 2 2006.229.12:59:53.35#ibcon#about to read 4, iclass 20, count 2 2006.229.12:59:53.35#ibcon#read 4, iclass 20, count 2 2006.229.12:59:53.35#ibcon#about to read 5, iclass 20, count 2 2006.229.12:59:53.35#ibcon#read 5, iclass 20, count 2 2006.229.12:59:53.35#ibcon#about to read 6, iclass 20, count 2 2006.229.12:59:53.35#ibcon#read 6, iclass 20, count 2 2006.229.12:59:53.35#ibcon#end of sib2, iclass 20, count 2 2006.229.12:59:53.35#ibcon#*mode == 0, iclass 20, count 2 2006.229.12:59:53.35#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.12:59:53.35#ibcon#[27=AT02-04\r\n] 2006.229.12:59:53.35#ibcon#*before write, iclass 20, count 2 2006.229.12:59:53.35#ibcon#enter sib2, iclass 20, count 2 2006.229.12:59:53.35#ibcon#flushed, iclass 20, count 2 2006.229.12:59:53.35#ibcon#about to write, iclass 20, count 2 2006.229.12:59:53.35#ibcon#wrote, iclass 20, count 2 2006.229.12:59:53.35#ibcon#about to read 3, iclass 20, count 2 2006.229.12:59:53.38#ibcon#read 3, iclass 20, count 2 2006.229.12:59:53.38#ibcon#about to read 4, iclass 20, count 2 2006.229.12:59:53.38#ibcon#read 4, iclass 20, count 2 2006.229.12:59:53.38#ibcon#about to read 5, iclass 20, count 2 2006.229.12:59:53.38#ibcon#read 5, iclass 20, count 2 2006.229.12:59:53.38#ibcon#about to read 6, iclass 20, count 2 2006.229.12:59:53.38#ibcon#read 6, iclass 20, count 2 2006.229.12:59:53.38#ibcon#end of sib2, iclass 20, count 2 2006.229.12:59:53.38#ibcon#*after write, iclass 20, count 2 2006.229.12:59:53.38#ibcon#*before return 0, iclass 20, count 2 2006.229.12:59:53.38#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:53.38#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.12:59:53.38#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.12:59:53.38#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:53.38#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:53.50#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:53.50#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:53.50#ibcon#enter wrdev, iclass 20, count 0 2006.229.12:59:53.50#ibcon#first serial, iclass 20, count 0 2006.229.12:59:53.50#ibcon#enter sib2, iclass 20, count 0 2006.229.12:59:53.50#ibcon#flushed, iclass 20, count 0 2006.229.12:59:53.50#ibcon#about to write, iclass 20, count 0 2006.229.12:59:53.50#ibcon#wrote, iclass 20, count 0 2006.229.12:59:53.50#ibcon#about to read 3, iclass 20, count 0 2006.229.12:59:53.52#ibcon#read 3, iclass 20, count 0 2006.229.12:59:53.52#ibcon#about to read 4, iclass 20, count 0 2006.229.12:59:53.52#ibcon#read 4, iclass 20, count 0 2006.229.12:59:53.52#ibcon#about to read 5, iclass 20, count 0 2006.229.12:59:53.52#ibcon#read 5, iclass 20, count 0 2006.229.12:59:53.52#ibcon#about to read 6, iclass 20, count 0 2006.229.12:59:53.52#ibcon#read 6, iclass 20, count 0 2006.229.12:59:53.52#ibcon#end of sib2, iclass 20, count 0 2006.229.12:59:53.52#ibcon#*mode == 0, iclass 20, count 0 2006.229.12:59:53.52#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.12:59:53.52#ibcon#[27=USB\r\n] 2006.229.12:59:53.52#ibcon#*before write, iclass 20, count 0 2006.229.12:59:53.52#ibcon#enter sib2, iclass 20, count 0 2006.229.12:59:53.52#ibcon#flushed, iclass 20, count 0 2006.229.12:59:53.52#ibcon#about to write, iclass 20, count 0 2006.229.12:59:53.52#ibcon#wrote, iclass 20, count 0 2006.229.12:59:53.52#ibcon#about to read 3, iclass 20, count 0 2006.229.12:59:53.55#ibcon#read 3, iclass 20, count 0 2006.229.12:59:53.55#ibcon#about to read 4, iclass 20, count 0 2006.229.12:59:53.55#ibcon#read 4, iclass 20, count 0 2006.229.12:59:53.55#ibcon#about to read 5, iclass 20, count 0 2006.229.12:59:53.55#ibcon#read 5, iclass 20, count 0 2006.229.12:59:53.55#ibcon#about to read 6, iclass 20, count 0 2006.229.12:59:53.55#ibcon#read 6, iclass 20, count 0 2006.229.12:59:53.55#ibcon#end of sib2, iclass 20, count 0 2006.229.12:59:53.55#ibcon#*after write, iclass 20, count 0 2006.229.12:59:53.55#ibcon#*before return 0, iclass 20, count 0 2006.229.12:59:53.55#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:53.55#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.12:59:53.55#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.12:59:53.55#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.12:59:53.55$vck44/vblo=3,649.99 2006.229.12:59:53.55#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.12:59:53.55#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.12:59:53.55#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:53.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:53.55#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:53.55#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:53.55#ibcon#enter wrdev, iclass 22, count 0 2006.229.12:59:53.55#ibcon#first serial, iclass 22, count 0 2006.229.12:59:53.55#ibcon#enter sib2, iclass 22, count 0 2006.229.12:59:53.55#ibcon#flushed, iclass 22, count 0 2006.229.12:59:53.55#ibcon#about to write, iclass 22, count 0 2006.229.12:59:53.55#ibcon#wrote, iclass 22, count 0 2006.229.12:59:53.55#ibcon#about to read 3, iclass 22, count 0 2006.229.12:59:53.57#ibcon#read 3, iclass 22, count 0 2006.229.12:59:53.57#ibcon#about to read 4, iclass 22, count 0 2006.229.12:59:53.57#ibcon#read 4, iclass 22, count 0 2006.229.12:59:53.57#ibcon#about to read 5, iclass 22, count 0 2006.229.12:59:53.57#ibcon#read 5, iclass 22, count 0 2006.229.12:59:53.57#ibcon#about to read 6, iclass 22, count 0 2006.229.12:59:53.57#ibcon#read 6, iclass 22, count 0 2006.229.12:59:53.57#ibcon#end of sib2, iclass 22, count 0 2006.229.12:59:53.57#ibcon#*mode == 0, iclass 22, count 0 2006.229.12:59:53.57#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.12:59:53.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.12:59:53.57#ibcon#*before write, iclass 22, count 0 2006.229.12:59:53.57#ibcon#enter sib2, iclass 22, count 0 2006.229.12:59:53.57#ibcon#flushed, iclass 22, count 0 2006.229.12:59:53.57#ibcon#about to write, iclass 22, count 0 2006.229.12:59:53.57#ibcon#wrote, iclass 22, count 0 2006.229.12:59:53.57#ibcon#about to read 3, iclass 22, count 0 2006.229.12:59:53.61#ibcon#read 3, iclass 22, count 0 2006.229.12:59:53.61#ibcon#about to read 4, iclass 22, count 0 2006.229.12:59:53.61#ibcon#read 4, iclass 22, count 0 2006.229.12:59:53.61#ibcon#about to read 5, iclass 22, count 0 2006.229.12:59:53.61#ibcon#read 5, iclass 22, count 0 2006.229.12:59:53.61#ibcon#about to read 6, iclass 22, count 0 2006.229.12:59:53.61#ibcon#read 6, iclass 22, count 0 2006.229.12:59:53.61#ibcon#end of sib2, iclass 22, count 0 2006.229.12:59:53.61#ibcon#*after write, iclass 22, count 0 2006.229.12:59:53.61#ibcon#*before return 0, iclass 22, count 0 2006.229.12:59:53.61#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:53.61#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.12:59:53.61#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.12:59:53.61#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.12:59:53.61$vck44/vb=3,4 2006.229.12:59:53.61#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.12:59:53.61#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.12:59:53.61#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:53.61#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:53.67#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:53.67#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:53.67#ibcon#enter wrdev, iclass 24, count 2 2006.229.12:59:53.67#ibcon#first serial, iclass 24, count 2 2006.229.12:59:53.67#ibcon#enter sib2, iclass 24, count 2 2006.229.12:59:53.67#ibcon#flushed, iclass 24, count 2 2006.229.12:59:53.67#ibcon#about to write, iclass 24, count 2 2006.229.12:59:53.67#ibcon#wrote, iclass 24, count 2 2006.229.12:59:53.67#ibcon#about to read 3, iclass 24, count 2 2006.229.12:59:53.69#ibcon#read 3, iclass 24, count 2 2006.229.12:59:53.69#ibcon#about to read 4, iclass 24, count 2 2006.229.12:59:53.69#ibcon#read 4, iclass 24, count 2 2006.229.12:59:53.69#ibcon#about to read 5, iclass 24, count 2 2006.229.12:59:53.69#ibcon#read 5, iclass 24, count 2 2006.229.12:59:53.69#ibcon#about to read 6, iclass 24, count 2 2006.229.12:59:53.69#ibcon#read 6, iclass 24, count 2 2006.229.12:59:53.69#ibcon#end of sib2, iclass 24, count 2 2006.229.12:59:53.69#ibcon#*mode == 0, iclass 24, count 2 2006.229.12:59:53.69#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.12:59:53.69#ibcon#[27=AT03-04\r\n] 2006.229.12:59:53.69#ibcon#*before write, iclass 24, count 2 2006.229.12:59:53.69#ibcon#enter sib2, iclass 24, count 2 2006.229.12:59:53.69#ibcon#flushed, iclass 24, count 2 2006.229.12:59:53.69#ibcon#about to write, iclass 24, count 2 2006.229.12:59:53.69#ibcon#wrote, iclass 24, count 2 2006.229.12:59:53.69#ibcon#about to read 3, iclass 24, count 2 2006.229.12:59:53.72#ibcon#read 3, iclass 24, count 2 2006.229.12:59:53.72#ibcon#about to read 4, iclass 24, count 2 2006.229.12:59:53.72#ibcon#read 4, iclass 24, count 2 2006.229.12:59:53.72#ibcon#about to read 5, iclass 24, count 2 2006.229.12:59:53.72#ibcon#read 5, iclass 24, count 2 2006.229.12:59:53.72#ibcon#about to read 6, iclass 24, count 2 2006.229.12:59:53.72#ibcon#read 6, iclass 24, count 2 2006.229.12:59:53.72#ibcon#end of sib2, iclass 24, count 2 2006.229.12:59:53.72#ibcon#*after write, iclass 24, count 2 2006.229.12:59:53.72#ibcon#*before return 0, iclass 24, count 2 2006.229.12:59:53.72#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:53.72#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.12:59:53.72#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.12:59:53.72#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:53.72#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:53.84#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:53.84#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:53.84#ibcon#enter wrdev, iclass 24, count 0 2006.229.12:59:53.84#ibcon#first serial, iclass 24, count 0 2006.229.12:59:53.84#ibcon#enter sib2, iclass 24, count 0 2006.229.12:59:53.84#ibcon#flushed, iclass 24, count 0 2006.229.12:59:53.84#ibcon#about to write, iclass 24, count 0 2006.229.12:59:53.84#ibcon#wrote, iclass 24, count 0 2006.229.12:59:53.84#ibcon#about to read 3, iclass 24, count 0 2006.229.12:59:53.86#ibcon#read 3, iclass 24, count 0 2006.229.12:59:53.86#ibcon#about to read 4, iclass 24, count 0 2006.229.12:59:53.86#ibcon#read 4, iclass 24, count 0 2006.229.12:59:53.86#ibcon#about to read 5, iclass 24, count 0 2006.229.12:59:53.86#ibcon#read 5, iclass 24, count 0 2006.229.12:59:53.86#ibcon#about to read 6, iclass 24, count 0 2006.229.12:59:53.86#ibcon#read 6, iclass 24, count 0 2006.229.12:59:53.86#ibcon#end of sib2, iclass 24, count 0 2006.229.12:59:53.86#ibcon#*mode == 0, iclass 24, count 0 2006.229.12:59:53.86#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.12:59:53.86#ibcon#[27=USB\r\n] 2006.229.12:59:53.86#ibcon#*before write, iclass 24, count 0 2006.229.12:59:53.86#ibcon#enter sib2, iclass 24, count 0 2006.229.12:59:53.86#ibcon#flushed, iclass 24, count 0 2006.229.12:59:53.86#ibcon#about to write, iclass 24, count 0 2006.229.12:59:53.86#ibcon#wrote, iclass 24, count 0 2006.229.12:59:53.86#ibcon#about to read 3, iclass 24, count 0 2006.229.12:59:53.89#ibcon#read 3, iclass 24, count 0 2006.229.12:59:53.89#ibcon#about to read 4, iclass 24, count 0 2006.229.12:59:53.89#ibcon#read 4, iclass 24, count 0 2006.229.12:59:53.89#ibcon#about to read 5, iclass 24, count 0 2006.229.12:59:53.89#ibcon#read 5, iclass 24, count 0 2006.229.12:59:53.89#ibcon#about to read 6, iclass 24, count 0 2006.229.12:59:53.89#ibcon#read 6, iclass 24, count 0 2006.229.12:59:53.89#ibcon#end of sib2, iclass 24, count 0 2006.229.12:59:53.89#ibcon#*after write, iclass 24, count 0 2006.229.12:59:53.89#ibcon#*before return 0, iclass 24, count 0 2006.229.12:59:53.89#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:53.89#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.12:59:53.89#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.12:59:53.89#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.12:59:53.89$vck44/vblo=4,679.99 2006.229.12:59:53.89#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.12:59:53.89#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.12:59:53.89#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:53.89#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:53.89#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:53.89#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:53.89#ibcon#enter wrdev, iclass 26, count 0 2006.229.12:59:53.89#ibcon#first serial, iclass 26, count 0 2006.229.12:59:53.89#ibcon#enter sib2, iclass 26, count 0 2006.229.12:59:53.89#ibcon#flushed, iclass 26, count 0 2006.229.12:59:53.89#ibcon#about to write, iclass 26, count 0 2006.229.12:59:53.89#ibcon#wrote, iclass 26, count 0 2006.229.12:59:53.89#ibcon#about to read 3, iclass 26, count 0 2006.229.12:59:53.91#ibcon#read 3, iclass 26, count 0 2006.229.12:59:53.91#ibcon#about to read 4, iclass 26, count 0 2006.229.12:59:53.91#ibcon#read 4, iclass 26, count 0 2006.229.12:59:53.91#ibcon#about to read 5, iclass 26, count 0 2006.229.12:59:53.91#ibcon#read 5, iclass 26, count 0 2006.229.12:59:53.91#ibcon#about to read 6, iclass 26, count 0 2006.229.12:59:53.91#ibcon#read 6, iclass 26, count 0 2006.229.12:59:53.91#ibcon#end of sib2, iclass 26, count 0 2006.229.12:59:53.91#ibcon#*mode == 0, iclass 26, count 0 2006.229.12:59:53.91#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.12:59:53.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.12:59:53.91#ibcon#*before write, iclass 26, count 0 2006.229.12:59:53.91#ibcon#enter sib2, iclass 26, count 0 2006.229.12:59:53.91#ibcon#flushed, iclass 26, count 0 2006.229.12:59:53.91#ibcon#about to write, iclass 26, count 0 2006.229.12:59:53.91#ibcon#wrote, iclass 26, count 0 2006.229.12:59:53.91#ibcon#about to read 3, iclass 26, count 0 2006.229.12:59:53.95#ibcon#read 3, iclass 26, count 0 2006.229.12:59:53.95#ibcon#about to read 4, iclass 26, count 0 2006.229.12:59:53.95#ibcon#read 4, iclass 26, count 0 2006.229.12:59:53.95#ibcon#about to read 5, iclass 26, count 0 2006.229.12:59:53.95#ibcon#read 5, iclass 26, count 0 2006.229.12:59:53.95#ibcon#about to read 6, iclass 26, count 0 2006.229.12:59:53.95#ibcon#read 6, iclass 26, count 0 2006.229.12:59:53.95#ibcon#end of sib2, iclass 26, count 0 2006.229.12:59:53.95#ibcon#*after write, iclass 26, count 0 2006.229.12:59:53.95#ibcon#*before return 0, iclass 26, count 0 2006.229.12:59:53.95#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:53.95#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.12:59:53.95#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.12:59:53.95#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.12:59:53.95$vck44/vb=4,4 2006.229.12:59:53.95#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.12:59:53.95#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.12:59:53.95#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:53.95#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:54.01#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:54.01#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:54.01#ibcon#enter wrdev, iclass 28, count 2 2006.229.12:59:54.01#ibcon#first serial, iclass 28, count 2 2006.229.12:59:54.01#ibcon#enter sib2, iclass 28, count 2 2006.229.12:59:54.01#ibcon#flushed, iclass 28, count 2 2006.229.12:59:54.01#ibcon#about to write, iclass 28, count 2 2006.229.12:59:54.01#ibcon#wrote, iclass 28, count 2 2006.229.12:59:54.01#ibcon#about to read 3, iclass 28, count 2 2006.229.12:59:54.03#ibcon#read 3, iclass 28, count 2 2006.229.12:59:54.03#ibcon#about to read 4, iclass 28, count 2 2006.229.12:59:54.03#ibcon#read 4, iclass 28, count 2 2006.229.12:59:54.03#ibcon#about to read 5, iclass 28, count 2 2006.229.12:59:54.03#ibcon#read 5, iclass 28, count 2 2006.229.12:59:54.03#ibcon#about to read 6, iclass 28, count 2 2006.229.12:59:54.03#ibcon#read 6, iclass 28, count 2 2006.229.12:59:54.03#ibcon#end of sib2, iclass 28, count 2 2006.229.12:59:54.03#ibcon#*mode == 0, iclass 28, count 2 2006.229.12:59:54.03#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.12:59:54.03#ibcon#[27=AT04-04\r\n] 2006.229.12:59:54.03#ibcon#*before write, iclass 28, count 2 2006.229.12:59:54.03#ibcon#enter sib2, iclass 28, count 2 2006.229.12:59:54.03#ibcon#flushed, iclass 28, count 2 2006.229.12:59:54.03#ibcon#about to write, iclass 28, count 2 2006.229.12:59:54.03#ibcon#wrote, iclass 28, count 2 2006.229.12:59:54.03#ibcon#about to read 3, iclass 28, count 2 2006.229.12:59:54.06#ibcon#read 3, iclass 28, count 2 2006.229.12:59:54.06#ibcon#about to read 4, iclass 28, count 2 2006.229.12:59:54.06#ibcon#read 4, iclass 28, count 2 2006.229.12:59:54.06#ibcon#about to read 5, iclass 28, count 2 2006.229.12:59:54.06#ibcon#read 5, iclass 28, count 2 2006.229.12:59:54.06#ibcon#about to read 6, iclass 28, count 2 2006.229.12:59:54.06#ibcon#read 6, iclass 28, count 2 2006.229.12:59:54.06#ibcon#end of sib2, iclass 28, count 2 2006.229.12:59:54.06#ibcon#*after write, iclass 28, count 2 2006.229.12:59:54.06#ibcon#*before return 0, iclass 28, count 2 2006.229.12:59:54.06#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:54.06#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.12:59:54.06#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.12:59:54.06#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:54.06#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:54.18#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:54.18#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:54.18#ibcon#enter wrdev, iclass 28, count 0 2006.229.12:59:54.18#ibcon#first serial, iclass 28, count 0 2006.229.12:59:54.18#ibcon#enter sib2, iclass 28, count 0 2006.229.12:59:54.18#ibcon#flushed, iclass 28, count 0 2006.229.12:59:54.18#ibcon#about to write, iclass 28, count 0 2006.229.12:59:54.18#ibcon#wrote, iclass 28, count 0 2006.229.12:59:54.18#ibcon#about to read 3, iclass 28, count 0 2006.229.12:59:54.20#ibcon#read 3, iclass 28, count 0 2006.229.12:59:54.20#ibcon#about to read 4, iclass 28, count 0 2006.229.12:59:54.20#ibcon#read 4, iclass 28, count 0 2006.229.12:59:54.20#ibcon#about to read 5, iclass 28, count 0 2006.229.12:59:54.20#ibcon#read 5, iclass 28, count 0 2006.229.12:59:54.20#ibcon#about to read 6, iclass 28, count 0 2006.229.12:59:54.20#ibcon#read 6, iclass 28, count 0 2006.229.12:59:54.20#ibcon#end of sib2, iclass 28, count 0 2006.229.12:59:54.20#ibcon#*mode == 0, iclass 28, count 0 2006.229.12:59:54.20#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.12:59:54.20#ibcon#[27=USB\r\n] 2006.229.12:59:54.20#ibcon#*before write, iclass 28, count 0 2006.229.12:59:54.20#ibcon#enter sib2, iclass 28, count 0 2006.229.12:59:54.20#ibcon#flushed, iclass 28, count 0 2006.229.12:59:54.20#ibcon#about to write, iclass 28, count 0 2006.229.12:59:54.20#ibcon#wrote, iclass 28, count 0 2006.229.12:59:54.20#ibcon#about to read 3, iclass 28, count 0 2006.229.12:59:54.23#ibcon#read 3, iclass 28, count 0 2006.229.12:59:54.23#ibcon#about to read 4, iclass 28, count 0 2006.229.12:59:54.23#ibcon#read 4, iclass 28, count 0 2006.229.12:59:54.23#ibcon#about to read 5, iclass 28, count 0 2006.229.12:59:54.23#ibcon#read 5, iclass 28, count 0 2006.229.12:59:54.23#ibcon#about to read 6, iclass 28, count 0 2006.229.12:59:54.23#ibcon#read 6, iclass 28, count 0 2006.229.12:59:54.23#ibcon#end of sib2, iclass 28, count 0 2006.229.12:59:54.23#ibcon#*after write, iclass 28, count 0 2006.229.12:59:54.23#ibcon#*before return 0, iclass 28, count 0 2006.229.12:59:54.23#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:54.23#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.12:59:54.23#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.12:59:54.23#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.12:59:54.23$vck44/vblo=5,709.99 2006.229.12:59:54.23#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.12:59:54.23#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.12:59:54.23#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:54.23#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:54.23#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:54.23#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:54.23#ibcon#enter wrdev, iclass 30, count 0 2006.229.12:59:54.23#ibcon#first serial, iclass 30, count 0 2006.229.12:59:54.23#ibcon#enter sib2, iclass 30, count 0 2006.229.12:59:54.23#ibcon#flushed, iclass 30, count 0 2006.229.12:59:54.23#ibcon#about to write, iclass 30, count 0 2006.229.12:59:54.23#ibcon#wrote, iclass 30, count 0 2006.229.12:59:54.23#ibcon#about to read 3, iclass 30, count 0 2006.229.12:59:54.25#ibcon#read 3, iclass 30, count 0 2006.229.12:59:54.25#ibcon#about to read 4, iclass 30, count 0 2006.229.12:59:54.25#ibcon#read 4, iclass 30, count 0 2006.229.12:59:54.25#ibcon#about to read 5, iclass 30, count 0 2006.229.12:59:54.25#ibcon#read 5, iclass 30, count 0 2006.229.12:59:54.25#ibcon#about to read 6, iclass 30, count 0 2006.229.12:59:54.25#ibcon#read 6, iclass 30, count 0 2006.229.12:59:54.25#ibcon#end of sib2, iclass 30, count 0 2006.229.12:59:54.25#ibcon#*mode == 0, iclass 30, count 0 2006.229.12:59:54.25#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.12:59:54.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.12:59:54.25#ibcon#*before write, iclass 30, count 0 2006.229.12:59:54.25#ibcon#enter sib2, iclass 30, count 0 2006.229.12:59:54.25#ibcon#flushed, iclass 30, count 0 2006.229.12:59:54.25#ibcon#about to write, iclass 30, count 0 2006.229.12:59:54.25#ibcon#wrote, iclass 30, count 0 2006.229.12:59:54.25#ibcon#about to read 3, iclass 30, count 0 2006.229.12:59:54.29#ibcon#read 3, iclass 30, count 0 2006.229.12:59:54.29#ibcon#about to read 4, iclass 30, count 0 2006.229.12:59:54.29#ibcon#read 4, iclass 30, count 0 2006.229.12:59:54.29#ibcon#about to read 5, iclass 30, count 0 2006.229.12:59:54.29#ibcon#read 5, iclass 30, count 0 2006.229.12:59:54.29#ibcon#about to read 6, iclass 30, count 0 2006.229.12:59:54.29#ibcon#read 6, iclass 30, count 0 2006.229.12:59:54.29#ibcon#end of sib2, iclass 30, count 0 2006.229.12:59:54.29#ibcon#*after write, iclass 30, count 0 2006.229.12:59:54.29#ibcon#*before return 0, iclass 30, count 0 2006.229.12:59:54.29#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:54.29#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.12:59:54.29#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.12:59:54.29#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.12:59:54.29$vck44/vb=5,4 2006.229.12:59:54.29#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.12:59:54.29#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.12:59:54.29#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:54.29#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:54.35#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:54.35#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:54.35#ibcon#enter wrdev, iclass 32, count 2 2006.229.12:59:54.35#ibcon#first serial, iclass 32, count 2 2006.229.12:59:54.35#ibcon#enter sib2, iclass 32, count 2 2006.229.12:59:54.35#ibcon#flushed, iclass 32, count 2 2006.229.12:59:54.35#ibcon#about to write, iclass 32, count 2 2006.229.12:59:54.35#ibcon#wrote, iclass 32, count 2 2006.229.12:59:54.35#ibcon#about to read 3, iclass 32, count 2 2006.229.12:59:54.37#ibcon#read 3, iclass 32, count 2 2006.229.12:59:54.37#ibcon#about to read 4, iclass 32, count 2 2006.229.12:59:54.37#ibcon#read 4, iclass 32, count 2 2006.229.12:59:54.37#ibcon#about to read 5, iclass 32, count 2 2006.229.12:59:54.37#ibcon#read 5, iclass 32, count 2 2006.229.12:59:54.37#ibcon#about to read 6, iclass 32, count 2 2006.229.12:59:54.37#ibcon#read 6, iclass 32, count 2 2006.229.12:59:54.37#ibcon#end of sib2, iclass 32, count 2 2006.229.12:59:54.37#ibcon#*mode == 0, iclass 32, count 2 2006.229.12:59:54.37#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.12:59:54.37#ibcon#[27=AT05-04\r\n] 2006.229.12:59:54.37#ibcon#*before write, iclass 32, count 2 2006.229.12:59:54.37#ibcon#enter sib2, iclass 32, count 2 2006.229.12:59:54.37#ibcon#flushed, iclass 32, count 2 2006.229.12:59:54.37#ibcon#about to write, iclass 32, count 2 2006.229.12:59:54.37#ibcon#wrote, iclass 32, count 2 2006.229.12:59:54.37#ibcon#about to read 3, iclass 32, count 2 2006.229.12:59:54.40#ibcon#read 3, iclass 32, count 2 2006.229.12:59:54.40#ibcon#about to read 4, iclass 32, count 2 2006.229.12:59:54.40#ibcon#read 4, iclass 32, count 2 2006.229.12:59:54.40#ibcon#about to read 5, iclass 32, count 2 2006.229.12:59:54.40#ibcon#read 5, iclass 32, count 2 2006.229.12:59:54.40#ibcon#about to read 6, iclass 32, count 2 2006.229.12:59:54.40#ibcon#read 6, iclass 32, count 2 2006.229.12:59:54.40#ibcon#end of sib2, iclass 32, count 2 2006.229.12:59:54.40#ibcon#*after write, iclass 32, count 2 2006.229.12:59:54.40#ibcon#*before return 0, iclass 32, count 2 2006.229.12:59:54.40#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:54.40#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.12:59:54.40#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.12:59:54.40#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:54.40#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:54.52#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:54.52#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:54.52#ibcon#enter wrdev, iclass 32, count 0 2006.229.12:59:54.52#ibcon#first serial, iclass 32, count 0 2006.229.12:59:54.52#ibcon#enter sib2, iclass 32, count 0 2006.229.12:59:54.52#ibcon#flushed, iclass 32, count 0 2006.229.12:59:54.52#ibcon#about to write, iclass 32, count 0 2006.229.12:59:54.52#ibcon#wrote, iclass 32, count 0 2006.229.12:59:54.52#ibcon#about to read 3, iclass 32, count 0 2006.229.12:59:54.54#ibcon#read 3, iclass 32, count 0 2006.229.12:59:54.54#ibcon#about to read 4, iclass 32, count 0 2006.229.12:59:54.54#ibcon#read 4, iclass 32, count 0 2006.229.12:59:54.54#ibcon#about to read 5, iclass 32, count 0 2006.229.12:59:54.54#ibcon#read 5, iclass 32, count 0 2006.229.12:59:54.54#ibcon#about to read 6, iclass 32, count 0 2006.229.12:59:54.54#ibcon#read 6, iclass 32, count 0 2006.229.12:59:54.54#ibcon#end of sib2, iclass 32, count 0 2006.229.12:59:54.54#ibcon#*mode == 0, iclass 32, count 0 2006.229.12:59:54.54#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.12:59:54.54#ibcon#[27=USB\r\n] 2006.229.12:59:54.54#ibcon#*before write, iclass 32, count 0 2006.229.12:59:54.54#ibcon#enter sib2, iclass 32, count 0 2006.229.12:59:54.54#ibcon#flushed, iclass 32, count 0 2006.229.12:59:54.54#ibcon#about to write, iclass 32, count 0 2006.229.12:59:54.54#ibcon#wrote, iclass 32, count 0 2006.229.12:59:54.54#ibcon#about to read 3, iclass 32, count 0 2006.229.12:59:54.57#ibcon#read 3, iclass 32, count 0 2006.229.12:59:54.57#ibcon#about to read 4, iclass 32, count 0 2006.229.12:59:54.57#ibcon#read 4, iclass 32, count 0 2006.229.12:59:54.57#ibcon#about to read 5, iclass 32, count 0 2006.229.12:59:54.57#ibcon#read 5, iclass 32, count 0 2006.229.12:59:54.57#ibcon#about to read 6, iclass 32, count 0 2006.229.12:59:54.57#ibcon#read 6, iclass 32, count 0 2006.229.12:59:54.57#ibcon#end of sib2, iclass 32, count 0 2006.229.12:59:54.57#ibcon#*after write, iclass 32, count 0 2006.229.12:59:54.57#ibcon#*before return 0, iclass 32, count 0 2006.229.12:59:54.57#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:54.57#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.12:59:54.57#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.12:59:54.57#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.12:59:54.57$vck44/vblo=6,719.99 2006.229.12:59:54.57#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.12:59:54.57#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.12:59:54.57#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:54.57#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:59:54.57#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:59:54.57#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:59:54.57#ibcon#enter wrdev, iclass 34, count 0 2006.229.12:59:54.57#ibcon#first serial, iclass 34, count 0 2006.229.12:59:54.57#ibcon#enter sib2, iclass 34, count 0 2006.229.12:59:54.57#ibcon#flushed, iclass 34, count 0 2006.229.12:59:54.57#ibcon#about to write, iclass 34, count 0 2006.229.12:59:54.57#ibcon#wrote, iclass 34, count 0 2006.229.12:59:54.57#ibcon#about to read 3, iclass 34, count 0 2006.229.12:59:54.59#ibcon#read 3, iclass 34, count 0 2006.229.12:59:54.59#ibcon#about to read 4, iclass 34, count 0 2006.229.12:59:54.59#ibcon#read 4, iclass 34, count 0 2006.229.12:59:54.59#ibcon#about to read 5, iclass 34, count 0 2006.229.12:59:54.59#ibcon#read 5, iclass 34, count 0 2006.229.12:59:54.59#ibcon#about to read 6, iclass 34, count 0 2006.229.12:59:54.59#ibcon#read 6, iclass 34, count 0 2006.229.12:59:54.59#ibcon#end of sib2, iclass 34, count 0 2006.229.12:59:54.59#ibcon#*mode == 0, iclass 34, count 0 2006.229.12:59:54.59#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.12:59:54.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.12:59:54.59#ibcon#*before write, iclass 34, count 0 2006.229.12:59:54.59#ibcon#enter sib2, iclass 34, count 0 2006.229.12:59:54.59#ibcon#flushed, iclass 34, count 0 2006.229.12:59:54.59#ibcon#about to write, iclass 34, count 0 2006.229.12:59:54.59#ibcon#wrote, iclass 34, count 0 2006.229.12:59:54.59#ibcon#about to read 3, iclass 34, count 0 2006.229.12:59:54.63#ibcon#read 3, iclass 34, count 0 2006.229.12:59:54.63#ibcon#about to read 4, iclass 34, count 0 2006.229.12:59:54.63#ibcon#read 4, iclass 34, count 0 2006.229.12:59:54.63#ibcon#about to read 5, iclass 34, count 0 2006.229.12:59:54.63#ibcon#read 5, iclass 34, count 0 2006.229.12:59:54.63#ibcon#about to read 6, iclass 34, count 0 2006.229.12:59:54.63#ibcon#read 6, iclass 34, count 0 2006.229.12:59:54.63#ibcon#end of sib2, iclass 34, count 0 2006.229.12:59:54.63#ibcon#*after write, iclass 34, count 0 2006.229.12:59:54.63#ibcon#*before return 0, iclass 34, count 0 2006.229.12:59:54.63#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:59:54.63#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.12:59:54.63#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.12:59:54.63#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.12:59:54.63$vck44/vb=6,4 2006.229.12:59:54.63#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.12:59:54.63#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.12:59:54.63#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:54.63#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:59:54.69#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:59:54.69#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:59:54.69#ibcon#enter wrdev, iclass 36, count 2 2006.229.12:59:54.69#ibcon#first serial, iclass 36, count 2 2006.229.12:59:54.69#ibcon#enter sib2, iclass 36, count 2 2006.229.12:59:54.69#ibcon#flushed, iclass 36, count 2 2006.229.12:59:54.69#ibcon#about to write, iclass 36, count 2 2006.229.12:59:54.69#ibcon#wrote, iclass 36, count 2 2006.229.12:59:54.69#ibcon#about to read 3, iclass 36, count 2 2006.229.12:59:54.71#ibcon#read 3, iclass 36, count 2 2006.229.12:59:54.71#ibcon#about to read 4, iclass 36, count 2 2006.229.12:59:54.71#ibcon#read 4, iclass 36, count 2 2006.229.12:59:54.71#ibcon#about to read 5, iclass 36, count 2 2006.229.12:59:54.71#ibcon#read 5, iclass 36, count 2 2006.229.12:59:54.71#ibcon#about to read 6, iclass 36, count 2 2006.229.12:59:54.71#ibcon#read 6, iclass 36, count 2 2006.229.12:59:54.71#ibcon#end of sib2, iclass 36, count 2 2006.229.12:59:54.71#ibcon#*mode == 0, iclass 36, count 2 2006.229.12:59:54.71#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.12:59:54.71#ibcon#[27=AT06-04\r\n] 2006.229.12:59:54.71#ibcon#*before write, iclass 36, count 2 2006.229.12:59:54.71#ibcon#enter sib2, iclass 36, count 2 2006.229.12:59:54.71#ibcon#flushed, iclass 36, count 2 2006.229.12:59:54.71#ibcon#about to write, iclass 36, count 2 2006.229.12:59:54.71#ibcon#wrote, iclass 36, count 2 2006.229.12:59:54.71#ibcon#about to read 3, iclass 36, count 2 2006.229.12:59:54.74#ibcon#read 3, iclass 36, count 2 2006.229.12:59:54.74#ibcon#about to read 4, iclass 36, count 2 2006.229.12:59:54.74#ibcon#read 4, iclass 36, count 2 2006.229.12:59:54.74#ibcon#about to read 5, iclass 36, count 2 2006.229.12:59:54.74#ibcon#read 5, iclass 36, count 2 2006.229.12:59:54.74#ibcon#about to read 6, iclass 36, count 2 2006.229.12:59:54.74#ibcon#read 6, iclass 36, count 2 2006.229.12:59:54.74#ibcon#end of sib2, iclass 36, count 2 2006.229.12:59:54.74#ibcon#*after write, iclass 36, count 2 2006.229.12:59:54.74#ibcon#*before return 0, iclass 36, count 2 2006.229.12:59:54.74#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:59:54.74#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.12:59:54.74#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.12:59:54.74#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:54.74#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:59:54.86#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:59:54.86#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:59:54.86#ibcon#enter wrdev, iclass 36, count 0 2006.229.12:59:54.86#ibcon#first serial, iclass 36, count 0 2006.229.12:59:54.86#ibcon#enter sib2, iclass 36, count 0 2006.229.12:59:54.86#ibcon#flushed, iclass 36, count 0 2006.229.12:59:54.86#ibcon#about to write, iclass 36, count 0 2006.229.12:59:54.86#ibcon#wrote, iclass 36, count 0 2006.229.12:59:54.86#ibcon#about to read 3, iclass 36, count 0 2006.229.12:59:54.88#ibcon#read 3, iclass 36, count 0 2006.229.12:59:54.88#ibcon#about to read 4, iclass 36, count 0 2006.229.12:59:54.88#ibcon#read 4, iclass 36, count 0 2006.229.12:59:54.88#ibcon#about to read 5, iclass 36, count 0 2006.229.12:59:54.88#ibcon#read 5, iclass 36, count 0 2006.229.12:59:54.88#ibcon#about to read 6, iclass 36, count 0 2006.229.12:59:54.88#ibcon#read 6, iclass 36, count 0 2006.229.12:59:54.88#ibcon#end of sib2, iclass 36, count 0 2006.229.12:59:54.88#ibcon#*mode == 0, iclass 36, count 0 2006.229.12:59:54.88#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.12:59:54.88#ibcon#[27=USB\r\n] 2006.229.12:59:54.88#ibcon#*before write, iclass 36, count 0 2006.229.12:59:54.88#ibcon#enter sib2, iclass 36, count 0 2006.229.12:59:54.88#ibcon#flushed, iclass 36, count 0 2006.229.12:59:54.88#ibcon#about to write, iclass 36, count 0 2006.229.12:59:54.88#ibcon#wrote, iclass 36, count 0 2006.229.12:59:54.88#ibcon#about to read 3, iclass 36, count 0 2006.229.12:59:54.91#ibcon#read 3, iclass 36, count 0 2006.229.12:59:54.91#ibcon#about to read 4, iclass 36, count 0 2006.229.12:59:54.91#ibcon#read 4, iclass 36, count 0 2006.229.12:59:54.91#ibcon#about to read 5, iclass 36, count 0 2006.229.12:59:54.91#ibcon#read 5, iclass 36, count 0 2006.229.12:59:54.91#ibcon#about to read 6, iclass 36, count 0 2006.229.12:59:54.91#ibcon#read 6, iclass 36, count 0 2006.229.12:59:54.91#ibcon#end of sib2, iclass 36, count 0 2006.229.12:59:54.91#ibcon#*after write, iclass 36, count 0 2006.229.12:59:54.91#ibcon#*before return 0, iclass 36, count 0 2006.229.12:59:54.91#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:59:54.91#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.12:59:54.91#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.12:59:54.91#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.12:59:54.91$vck44/vblo=7,734.99 2006.229.12:59:54.91#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.12:59:54.91#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.12:59:54.91#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:54.91#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:59:54.91#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:59:54.91#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:59:54.91#ibcon#enter wrdev, iclass 38, count 0 2006.229.12:59:54.91#ibcon#first serial, iclass 38, count 0 2006.229.12:59:54.91#ibcon#enter sib2, iclass 38, count 0 2006.229.12:59:54.91#ibcon#flushed, iclass 38, count 0 2006.229.12:59:54.91#ibcon#about to write, iclass 38, count 0 2006.229.12:59:54.91#ibcon#wrote, iclass 38, count 0 2006.229.12:59:54.91#ibcon#about to read 3, iclass 38, count 0 2006.229.12:59:54.93#ibcon#read 3, iclass 38, count 0 2006.229.12:59:54.93#ibcon#about to read 4, iclass 38, count 0 2006.229.12:59:54.93#ibcon#read 4, iclass 38, count 0 2006.229.12:59:54.93#ibcon#about to read 5, iclass 38, count 0 2006.229.12:59:54.93#ibcon#read 5, iclass 38, count 0 2006.229.12:59:54.93#ibcon#about to read 6, iclass 38, count 0 2006.229.12:59:54.93#ibcon#read 6, iclass 38, count 0 2006.229.12:59:54.93#ibcon#end of sib2, iclass 38, count 0 2006.229.12:59:54.93#ibcon#*mode == 0, iclass 38, count 0 2006.229.12:59:54.93#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.12:59:54.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.12:59:54.93#ibcon#*before write, iclass 38, count 0 2006.229.12:59:54.93#ibcon#enter sib2, iclass 38, count 0 2006.229.12:59:54.93#ibcon#flushed, iclass 38, count 0 2006.229.12:59:54.93#ibcon#about to write, iclass 38, count 0 2006.229.12:59:54.93#ibcon#wrote, iclass 38, count 0 2006.229.12:59:54.93#ibcon#about to read 3, iclass 38, count 0 2006.229.12:59:54.97#ibcon#read 3, iclass 38, count 0 2006.229.12:59:54.97#ibcon#about to read 4, iclass 38, count 0 2006.229.12:59:54.97#ibcon#read 4, iclass 38, count 0 2006.229.12:59:54.97#ibcon#about to read 5, iclass 38, count 0 2006.229.12:59:54.97#ibcon#read 5, iclass 38, count 0 2006.229.12:59:54.97#ibcon#about to read 6, iclass 38, count 0 2006.229.12:59:54.97#ibcon#read 6, iclass 38, count 0 2006.229.12:59:54.97#ibcon#end of sib2, iclass 38, count 0 2006.229.12:59:54.97#ibcon#*after write, iclass 38, count 0 2006.229.12:59:54.97#ibcon#*before return 0, iclass 38, count 0 2006.229.12:59:54.97#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:59:54.97#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.12:59:54.97#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.12:59:54.97#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.12:59:54.97$vck44/vb=7,4 2006.229.12:59:54.97#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.12:59:54.97#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.12:59:54.97#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:54.97#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:55.03#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:55.03#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:55.03#ibcon#enter wrdev, iclass 40, count 2 2006.229.12:59:55.03#ibcon#first serial, iclass 40, count 2 2006.229.12:59:55.03#ibcon#enter sib2, iclass 40, count 2 2006.229.12:59:55.03#ibcon#flushed, iclass 40, count 2 2006.229.12:59:55.03#ibcon#about to write, iclass 40, count 2 2006.229.12:59:55.03#ibcon#wrote, iclass 40, count 2 2006.229.12:59:55.03#ibcon#about to read 3, iclass 40, count 2 2006.229.12:59:55.05#ibcon#read 3, iclass 40, count 2 2006.229.12:59:55.05#ibcon#about to read 4, iclass 40, count 2 2006.229.12:59:55.05#ibcon#read 4, iclass 40, count 2 2006.229.12:59:55.05#ibcon#about to read 5, iclass 40, count 2 2006.229.12:59:55.05#ibcon#read 5, iclass 40, count 2 2006.229.12:59:55.05#ibcon#about to read 6, iclass 40, count 2 2006.229.12:59:55.05#ibcon#read 6, iclass 40, count 2 2006.229.12:59:55.05#ibcon#end of sib2, iclass 40, count 2 2006.229.12:59:55.05#ibcon#*mode == 0, iclass 40, count 2 2006.229.12:59:55.05#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.12:59:55.05#ibcon#[27=AT07-04\r\n] 2006.229.12:59:55.05#ibcon#*before write, iclass 40, count 2 2006.229.12:59:55.05#ibcon#enter sib2, iclass 40, count 2 2006.229.12:59:55.05#ibcon#flushed, iclass 40, count 2 2006.229.12:59:55.05#ibcon#about to write, iclass 40, count 2 2006.229.12:59:55.05#ibcon#wrote, iclass 40, count 2 2006.229.12:59:55.05#ibcon#about to read 3, iclass 40, count 2 2006.229.12:59:55.08#ibcon#read 3, iclass 40, count 2 2006.229.12:59:55.08#ibcon#about to read 4, iclass 40, count 2 2006.229.12:59:55.08#ibcon#read 4, iclass 40, count 2 2006.229.12:59:55.08#ibcon#about to read 5, iclass 40, count 2 2006.229.12:59:55.08#ibcon#read 5, iclass 40, count 2 2006.229.12:59:55.08#ibcon#about to read 6, iclass 40, count 2 2006.229.12:59:55.08#ibcon#read 6, iclass 40, count 2 2006.229.12:59:55.08#ibcon#end of sib2, iclass 40, count 2 2006.229.12:59:55.08#ibcon#*after write, iclass 40, count 2 2006.229.12:59:55.08#ibcon#*before return 0, iclass 40, count 2 2006.229.12:59:55.08#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:55.08#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.12:59:55.08#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.12:59:55.08#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:55.08#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:55.20#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:55.20#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:55.20#ibcon#enter wrdev, iclass 40, count 0 2006.229.12:59:55.20#ibcon#first serial, iclass 40, count 0 2006.229.12:59:55.20#ibcon#enter sib2, iclass 40, count 0 2006.229.12:59:55.20#ibcon#flushed, iclass 40, count 0 2006.229.12:59:55.20#ibcon#about to write, iclass 40, count 0 2006.229.12:59:55.20#ibcon#wrote, iclass 40, count 0 2006.229.12:59:55.20#ibcon#about to read 3, iclass 40, count 0 2006.229.12:59:55.22#ibcon#read 3, iclass 40, count 0 2006.229.12:59:55.22#ibcon#about to read 4, iclass 40, count 0 2006.229.12:59:55.22#ibcon#read 4, iclass 40, count 0 2006.229.12:59:55.22#ibcon#about to read 5, iclass 40, count 0 2006.229.12:59:55.22#ibcon#read 5, iclass 40, count 0 2006.229.12:59:55.22#ibcon#about to read 6, iclass 40, count 0 2006.229.12:59:55.22#ibcon#read 6, iclass 40, count 0 2006.229.12:59:55.22#ibcon#end of sib2, iclass 40, count 0 2006.229.12:59:55.22#ibcon#*mode == 0, iclass 40, count 0 2006.229.12:59:55.22#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.12:59:55.22#ibcon#[27=USB\r\n] 2006.229.12:59:55.22#ibcon#*before write, iclass 40, count 0 2006.229.12:59:55.22#ibcon#enter sib2, iclass 40, count 0 2006.229.12:59:55.22#ibcon#flushed, iclass 40, count 0 2006.229.12:59:55.22#ibcon#about to write, iclass 40, count 0 2006.229.12:59:55.22#ibcon#wrote, iclass 40, count 0 2006.229.12:59:55.22#ibcon#about to read 3, iclass 40, count 0 2006.229.12:59:55.25#ibcon#read 3, iclass 40, count 0 2006.229.12:59:55.25#ibcon#about to read 4, iclass 40, count 0 2006.229.12:59:55.25#ibcon#read 4, iclass 40, count 0 2006.229.12:59:55.25#ibcon#about to read 5, iclass 40, count 0 2006.229.12:59:55.25#ibcon#read 5, iclass 40, count 0 2006.229.12:59:55.25#ibcon#about to read 6, iclass 40, count 0 2006.229.12:59:55.25#ibcon#read 6, iclass 40, count 0 2006.229.12:59:55.25#ibcon#end of sib2, iclass 40, count 0 2006.229.12:59:55.25#ibcon#*after write, iclass 40, count 0 2006.229.12:59:55.25#ibcon#*before return 0, iclass 40, count 0 2006.229.12:59:55.25#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:55.25#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.12:59:55.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.12:59:55.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.12:59:55.25$vck44/vblo=8,744.99 2006.229.12:59:55.25#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.12:59:55.25#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.12:59:55.25#ibcon#ireg 17 cls_cnt 0 2006.229.12:59:55.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:55.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:55.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:55.25#ibcon#enter wrdev, iclass 4, count 0 2006.229.12:59:55.25#ibcon#first serial, iclass 4, count 0 2006.229.12:59:55.25#ibcon#enter sib2, iclass 4, count 0 2006.229.12:59:55.25#ibcon#flushed, iclass 4, count 0 2006.229.12:59:55.25#ibcon#about to write, iclass 4, count 0 2006.229.12:59:55.25#ibcon#wrote, iclass 4, count 0 2006.229.12:59:55.25#ibcon#about to read 3, iclass 4, count 0 2006.229.12:59:55.27#ibcon#read 3, iclass 4, count 0 2006.229.12:59:55.27#ibcon#about to read 4, iclass 4, count 0 2006.229.12:59:55.27#ibcon#read 4, iclass 4, count 0 2006.229.12:59:55.27#ibcon#about to read 5, iclass 4, count 0 2006.229.12:59:55.27#ibcon#read 5, iclass 4, count 0 2006.229.12:59:55.27#ibcon#about to read 6, iclass 4, count 0 2006.229.12:59:55.27#ibcon#read 6, iclass 4, count 0 2006.229.12:59:55.27#ibcon#end of sib2, iclass 4, count 0 2006.229.12:59:55.27#ibcon#*mode == 0, iclass 4, count 0 2006.229.12:59:55.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.12:59:55.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.12:59:55.27#ibcon#*before write, iclass 4, count 0 2006.229.12:59:55.27#ibcon#enter sib2, iclass 4, count 0 2006.229.12:59:55.27#ibcon#flushed, iclass 4, count 0 2006.229.12:59:55.27#ibcon#about to write, iclass 4, count 0 2006.229.12:59:55.27#ibcon#wrote, iclass 4, count 0 2006.229.12:59:55.27#ibcon#about to read 3, iclass 4, count 0 2006.229.12:59:55.31#ibcon#read 3, iclass 4, count 0 2006.229.12:59:55.31#ibcon#about to read 4, iclass 4, count 0 2006.229.12:59:55.31#ibcon#read 4, iclass 4, count 0 2006.229.12:59:55.31#ibcon#about to read 5, iclass 4, count 0 2006.229.12:59:55.31#ibcon#read 5, iclass 4, count 0 2006.229.12:59:55.31#ibcon#about to read 6, iclass 4, count 0 2006.229.12:59:55.31#ibcon#read 6, iclass 4, count 0 2006.229.12:59:55.31#ibcon#end of sib2, iclass 4, count 0 2006.229.12:59:55.31#ibcon#*after write, iclass 4, count 0 2006.229.12:59:55.31#ibcon#*before return 0, iclass 4, count 0 2006.229.12:59:55.31#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:55.31#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.12:59:55.31#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.12:59:55.31#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.12:59:55.31$vck44/vb=8,4 2006.229.12:59:55.31#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.12:59:55.31#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.12:59:55.31#ibcon#ireg 11 cls_cnt 2 2006.229.12:59:55.31#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:55.37#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:55.37#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:55.37#ibcon#enter wrdev, iclass 6, count 2 2006.229.12:59:55.37#ibcon#first serial, iclass 6, count 2 2006.229.12:59:55.37#ibcon#enter sib2, iclass 6, count 2 2006.229.12:59:55.37#ibcon#flushed, iclass 6, count 2 2006.229.12:59:55.37#ibcon#about to write, iclass 6, count 2 2006.229.12:59:55.37#ibcon#wrote, iclass 6, count 2 2006.229.12:59:55.37#ibcon#about to read 3, iclass 6, count 2 2006.229.12:59:55.39#ibcon#read 3, iclass 6, count 2 2006.229.12:59:55.39#ibcon#about to read 4, iclass 6, count 2 2006.229.12:59:55.39#ibcon#read 4, iclass 6, count 2 2006.229.12:59:55.39#ibcon#about to read 5, iclass 6, count 2 2006.229.12:59:55.39#ibcon#read 5, iclass 6, count 2 2006.229.12:59:55.39#ibcon#about to read 6, iclass 6, count 2 2006.229.12:59:55.39#ibcon#read 6, iclass 6, count 2 2006.229.12:59:55.39#ibcon#end of sib2, iclass 6, count 2 2006.229.12:59:55.39#ibcon#*mode == 0, iclass 6, count 2 2006.229.12:59:55.39#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.12:59:55.39#ibcon#[27=AT08-04\r\n] 2006.229.12:59:55.39#ibcon#*before write, iclass 6, count 2 2006.229.12:59:55.39#ibcon#enter sib2, iclass 6, count 2 2006.229.12:59:55.39#ibcon#flushed, iclass 6, count 2 2006.229.12:59:55.39#ibcon#about to write, iclass 6, count 2 2006.229.12:59:55.39#ibcon#wrote, iclass 6, count 2 2006.229.12:59:55.39#ibcon#about to read 3, iclass 6, count 2 2006.229.12:59:55.42#ibcon#read 3, iclass 6, count 2 2006.229.12:59:55.42#ibcon#about to read 4, iclass 6, count 2 2006.229.12:59:55.42#ibcon#read 4, iclass 6, count 2 2006.229.12:59:55.42#ibcon#about to read 5, iclass 6, count 2 2006.229.12:59:55.42#ibcon#read 5, iclass 6, count 2 2006.229.12:59:55.42#ibcon#about to read 6, iclass 6, count 2 2006.229.12:59:55.42#ibcon#read 6, iclass 6, count 2 2006.229.12:59:55.42#ibcon#end of sib2, iclass 6, count 2 2006.229.12:59:55.42#ibcon#*after write, iclass 6, count 2 2006.229.12:59:55.42#ibcon#*before return 0, iclass 6, count 2 2006.229.12:59:55.42#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:55.42#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.12:59:55.42#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.12:59:55.42#ibcon#ireg 7 cls_cnt 0 2006.229.12:59:55.42#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:55.54#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:55.54#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:55.54#ibcon#enter wrdev, iclass 6, count 0 2006.229.12:59:55.54#ibcon#first serial, iclass 6, count 0 2006.229.12:59:55.54#ibcon#enter sib2, iclass 6, count 0 2006.229.12:59:55.54#ibcon#flushed, iclass 6, count 0 2006.229.12:59:55.54#ibcon#about to write, iclass 6, count 0 2006.229.12:59:55.54#ibcon#wrote, iclass 6, count 0 2006.229.12:59:55.54#ibcon#about to read 3, iclass 6, count 0 2006.229.12:59:55.56#ibcon#read 3, iclass 6, count 0 2006.229.12:59:55.56#ibcon#about to read 4, iclass 6, count 0 2006.229.12:59:55.56#ibcon#read 4, iclass 6, count 0 2006.229.12:59:55.56#ibcon#about to read 5, iclass 6, count 0 2006.229.12:59:55.56#ibcon#read 5, iclass 6, count 0 2006.229.12:59:55.56#ibcon#about to read 6, iclass 6, count 0 2006.229.12:59:55.56#ibcon#read 6, iclass 6, count 0 2006.229.12:59:55.56#ibcon#end of sib2, iclass 6, count 0 2006.229.12:59:55.56#ibcon#*mode == 0, iclass 6, count 0 2006.229.12:59:55.56#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.12:59:55.56#ibcon#[27=USB\r\n] 2006.229.12:59:55.56#ibcon#*before write, iclass 6, count 0 2006.229.12:59:55.56#ibcon#enter sib2, iclass 6, count 0 2006.229.12:59:55.56#ibcon#flushed, iclass 6, count 0 2006.229.12:59:55.56#ibcon#about to write, iclass 6, count 0 2006.229.12:59:55.56#ibcon#wrote, iclass 6, count 0 2006.229.12:59:55.56#ibcon#about to read 3, iclass 6, count 0 2006.229.12:59:55.59#ibcon#read 3, iclass 6, count 0 2006.229.12:59:55.59#ibcon#about to read 4, iclass 6, count 0 2006.229.12:59:55.59#ibcon#read 4, iclass 6, count 0 2006.229.12:59:55.59#ibcon#about to read 5, iclass 6, count 0 2006.229.12:59:55.59#ibcon#read 5, iclass 6, count 0 2006.229.12:59:55.59#ibcon#about to read 6, iclass 6, count 0 2006.229.12:59:55.59#ibcon#read 6, iclass 6, count 0 2006.229.12:59:55.59#ibcon#end of sib2, iclass 6, count 0 2006.229.12:59:55.59#ibcon#*after write, iclass 6, count 0 2006.229.12:59:55.59#ibcon#*before return 0, iclass 6, count 0 2006.229.12:59:55.59#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:55.59#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.12:59:55.59#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.12:59:55.59#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.12:59:55.59$vck44/vabw=wide 2006.229.12:59:55.59#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.12:59:55.59#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.12:59:55.59#ibcon#ireg 8 cls_cnt 0 2006.229.12:59:55.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:55.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:55.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:55.59#ibcon#enter wrdev, iclass 10, count 0 2006.229.12:59:55.59#ibcon#first serial, iclass 10, count 0 2006.229.12:59:55.59#ibcon#enter sib2, iclass 10, count 0 2006.229.12:59:55.59#ibcon#flushed, iclass 10, count 0 2006.229.12:59:55.59#ibcon#about to write, iclass 10, count 0 2006.229.12:59:55.59#ibcon#wrote, iclass 10, count 0 2006.229.12:59:55.59#ibcon#about to read 3, iclass 10, count 0 2006.229.12:59:55.61#ibcon#read 3, iclass 10, count 0 2006.229.12:59:55.61#ibcon#about to read 4, iclass 10, count 0 2006.229.12:59:55.61#ibcon#read 4, iclass 10, count 0 2006.229.12:59:55.61#ibcon#about to read 5, iclass 10, count 0 2006.229.12:59:55.61#ibcon#read 5, iclass 10, count 0 2006.229.12:59:55.61#ibcon#about to read 6, iclass 10, count 0 2006.229.12:59:55.61#ibcon#read 6, iclass 10, count 0 2006.229.12:59:55.61#ibcon#end of sib2, iclass 10, count 0 2006.229.12:59:55.61#ibcon#*mode == 0, iclass 10, count 0 2006.229.12:59:55.61#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.12:59:55.61#ibcon#[25=BW32\r\n] 2006.229.12:59:55.61#ibcon#*before write, iclass 10, count 0 2006.229.12:59:55.61#ibcon#enter sib2, iclass 10, count 0 2006.229.12:59:55.61#ibcon#flushed, iclass 10, count 0 2006.229.12:59:55.61#ibcon#about to write, iclass 10, count 0 2006.229.12:59:55.61#ibcon#wrote, iclass 10, count 0 2006.229.12:59:55.61#ibcon#about to read 3, iclass 10, count 0 2006.229.12:59:55.64#ibcon#read 3, iclass 10, count 0 2006.229.12:59:55.64#ibcon#about to read 4, iclass 10, count 0 2006.229.12:59:55.64#ibcon#read 4, iclass 10, count 0 2006.229.12:59:55.64#ibcon#about to read 5, iclass 10, count 0 2006.229.12:59:55.64#ibcon#read 5, iclass 10, count 0 2006.229.12:59:55.64#ibcon#about to read 6, iclass 10, count 0 2006.229.12:59:55.64#ibcon#read 6, iclass 10, count 0 2006.229.12:59:55.64#ibcon#end of sib2, iclass 10, count 0 2006.229.12:59:55.64#ibcon#*after write, iclass 10, count 0 2006.229.12:59:55.64#ibcon#*before return 0, iclass 10, count 0 2006.229.12:59:55.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:55.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.12:59:55.64#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.12:59:55.64#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.12:59:55.64$vck44/vbbw=wide 2006.229.12:59:55.64#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.12:59:55.64#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.12:59:55.64#ibcon#ireg 8 cls_cnt 0 2006.229.12:59:55.64#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:59:55.71#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:59:55.71#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:59:55.71#ibcon#enter wrdev, iclass 12, count 0 2006.229.12:59:55.71#ibcon#first serial, iclass 12, count 0 2006.229.12:59:55.71#ibcon#enter sib2, iclass 12, count 0 2006.229.12:59:55.71#ibcon#flushed, iclass 12, count 0 2006.229.12:59:55.71#ibcon#about to write, iclass 12, count 0 2006.229.12:59:55.71#ibcon#wrote, iclass 12, count 0 2006.229.12:59:55.71#ibcon#about to read 3, iclass 12, count 0 2006.229.12:59:55.73#ibcon#read 3, iclass 12, count 0 2006.229.12:59:55.73#ibcon#about to read 4, iclass 12, count 0 2006.229.12:59:55.73#ibcon#read 4, iclass 12, count 0 2006.229.12:59:55.73#ibcon#about to read 5, iclass 12, count 0 2006.229.12:59:55.73#ibcon#read 5, iclass 12, count 0 2006.229.12:59:55.73#ibcon#about to read 6, iclass 12, count 0 2006.229.12:59:55.73#ibcon#read 6, iclass 12, count 0 2006.229.12:59:55.73#ibcon#end of sib2, iclass 12, count 0 2006.229.12:59:55.73#ibcon#*mode == 0, iclass 12, count 0 2006.229.12:59:55.73#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.12:59:55.73#ibcon#[27=BW32\r\n] 2006.229.12:59:55.73#ibcon#*before write, iclass 12, count 0 2006.229.12:59:55.73#ibcon#enter sib2, iclass 12, count 0 2006.229.12:59:55.73#ibcon#flushed, iclass 12, count 0 2006.229.12:59:55.73#ibcon#about to write, iclass 12, count 0 2006.229.12:59:55.73#ibcon#wrote, iclass 12, count 0 2006.229.12:59:55.73#ibcon#about to read 3, iclass 12, count 0 2006.229.12:59:55.76#ibcon#read 3, iclass 12, count 0 2006.229.12:59:55.76#ibcon#about to read 4, iclass 12, count 0 2006.229.12:59:55.76#ibcon#read 4, iclass 12, count 0 2006.229.12:59:55.76#ibcon#about to read 5, iclass 12, count 0 2006.229.12:59:55.76#ibcon#read 5, iclass 12, count 0 2006.229.12:59:55.76#ibcon#about to read 6, iclass 12, count 0 2006.229.12:59:55.76#ibcon#read 6, iclass 12, count 0 2006.229.12:59:55.76#ibcon#end of sib2, iclass 12, count 0 2006.229.12:59:55.76#ibcon#*after write, iclass 12, count 0 2006.229.12:59:55.76#ibcon#*before return 0, iclass 12, count 0 2006.229.12:59:55.76#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:59:55.76#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.12:59:55.76#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.12:59:55.76#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.12:59:55.76$setupk4/ifdk4 2006.229.12:59:55.76$ifdk4/lo= 2006.229.12:59:55.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.12:59:55.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.12:59:55.77$ifdk4/patch= 2006.229.12:59:55.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.12:59:55.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.12:59:55.77$setupk4/!*+20s 2006.229.13:00:02.04#abcon#<5=/04 1.2 2.3 27.581001002.2\r\n> 2006.229.13:00:02.06#abcon#{5=INTERFACE CLEAR} 2006.229.13:00:02.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:00:10.28$setupk4/"tpicd 2006.229.13:00:10.28$setupk4/echo=off 2006.229.13:00:10.28$setupk4/xlog=off 2006.229.13:00:10.28:!2006.229.13:01:09 2006.229.13:00:19.14#trakl#Source acquired 2006.229.13:00:19.14#flagr#flagr/antenna,acquired 2006.229.13:01:09.00:preob 2006.229.13:01:09.13/onsource/TRACKING 2006.229.13:01:09.13:!2006.229.13:01:19 2006.229.13:01:19.00:"tape 2006.229.13:01:19.00:"st=record 2006.229.13:01:19.00:data_valid=on 2006.229.13:01:19.00:midob 2006.229.13:01:20.13/onsource/TRACKING 2006.229.13:01:20.13/wx/27.58,1002.2,100 2006.229.13:01:20.32/cable/+6.4100E-03 2006.229.13:01:21.41/va/01,08,usb,yes,29,31 2006.229.13:01:21.41/va/02,07,usb,yes,32,32 2006.229.13:01:21.41/va/03,06,usb,yes,39,42 2006.229.13:01:21.41/va/04,07,usb,yes,33,34 2006.229.13:01:21.41/va/05,04,usb,yes,29,29 2006.229.13:01:21.41/va/06,04,usb,yes,33,32 2006.229.13:01:21.41/va/07,05,usb,yes,29,29 2006.229.13:01:21.41/va/08,06,usb,yes,21,26 2006.229.13:01:21.64/valo/01,524.99,yes,locked 2006.229.13:01:21.64/valo/02,534.99,yes,locked 2006.229.13:01:21.64/valo/03,564.99,yes,locked 2006.229.13:01:21.64/valo/04,624.99,yes,locked 2006.229.13:01:21.64/valo/05,734.99,yes,locked 2006.229.13:01:21.64/valo/06,814.99,yes,locked 2006.229.13:01:21.64/valo/07,864.99,yes,locked 2006.229.13:01:21.64/valo/08,884.99,yes,locked 2006.229.13:01:22.73/vb/01,04,usb,yes,31,29 2006.229.13:01:22.73/vb/02,04,usb,yes,33,33 2006.229.13:01:22.73/vb/03,04,usb,yes,30,33 2006.229.13:01:22.73/vb/04,04,usb,yes,35,33 2006.229.13:01:22.73/vb/05,04,usb,yes,27,29 2006.229.13:01:22.73/vb/06,04,usb,yes,31,27 2006.229.13:01:22.73/vb/07,04,usb,yes,31,31 2006.229.13:01:22.73/vb/08,04,usb,yes,29,32 2006.229.13:01:22.96/vblo/01,629.99,yes,locked 2006.229.13:01:22.96/vblo/02,634.99,yes,locked 2006.229.13:01:22.96/vblo/03,649.99,yes,locked 2006.229.13:01:22.96/vblo/04,679.99,yes,locked 2006.229.13:01:22.96/vblo/05,709.99,yes,locked 2006.229.13:01:22.96/vblo/06,719.99,yes,locked 2006.229.13:01:22.96/vblo/07,734.99,yes,locked 2006.229.13:01:22.96/vblo/08,744.99,yes,locked 2006.229.13:01:23.11/vabw/8 2006.229.13:01:23.26/vbbw/8 2006.229.13:01:23.36/xfe/off,on,11.7 2006.229.13:01:23.74/ifatt/23,28,28,28 2006.229.13:01:24.07/fmout-gps/S +4.45E-07 2006.229.13:01:24.11:!2006.229.13:02:29 2006.229.13:02:29.00:data_valid=off 2006.229.13:02:29.00:"et 2006.229.13:02:29.00:!+3s 2006.229.13:02:32.01:"tape 2006.229.13:02:32.01:postob 2006.229.13:02:32.09/cable/+6.4119E-03 2006.229.13:02:32.09/wx/27.57,1002.2,100 2006.229.13:02:33.07/fmout-gps/S +4.46E-07 2006.229.13:02:33.07:scan_name=229-1304,jd0608,150 2006.229.13:02:33.07:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.13:02:34.13#flagr#flagr/antenna,new-source 2006.229.13:02:34.13:checkk5 2006.229.13:02:34.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:02:34.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:02:35.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:02:35.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:02:36.11/chk_obsdata//k5ts1/T2291301??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:02:36.51/chk_obsdata//k5ts2/T2291301??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:02:36.91/chk_obsdata//k5ts3/T2291301??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:02:37.32/chk_obsdata//k5ts4/T2291301??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:02:38.06/k5log//k5ts1_log_newline 2006.229.13:02:38.78/k5log//k5ts2_log_newline 2006.229.13:02:39.50/k5log//k5ts3_log_newline 2006.229.13:02:40.22/k5log//k5ts4_log_newline 2006.229.13:02:40.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:02:40.24:setupk4=1 2006.229.13:02:40.24$setupk4/echo=on 2006.229.13:02:40.24$setupk4/pcalon 2006.229.13:02:40.24$pcalon/"no phase cal control is implemented here 2006.229.13:02:40.24$setupk4/"tpicd=stop 2006.229.13:02:40.24$setupk4/"rec=synch_on 2006.229.13:02:40.24$setupk4/"rec_mode=128 2006.229.13:02:40.24$setupk4/!* 2006.229.13:02:40.24$setupk4/recpk4 2006.229.13:02:40.24$recpk4/recpatch= 2006.229.13:02:40.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:02:40.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:02:40.25$setupk4/vck44 2006.229.13:02:40.25$vck44/valo=1,524.99 2006.229.13:02:40.25#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:02:40.25#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:02:40.25#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:40.25#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:40.25#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:40.25#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:40.25#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:02:40.25#ibcon#first serial, iclass 7, count 0 2006.229.13:02:40.25#ibcon#enter sib2, iclass 7, count 0 2006.229.13:02:40.25#ibcon#flushed, iclass 7, count 0 2006.229.13:02:40.25#ibcon#about to write, iclass 7, count 0 2006.229.13:02:40.25#ibcon#wrote, iclass 7, count 0 2006.229.13:02:40.25#ibcon#about to read 3, iclass 7, count 0 2006.229.13:02:40.26#ibcon#read 3, iclass 7, count 0 2006.229.13:02:40.26#ibcon#about to read 4, iclass 7, count 0 2006.229.13:02:40.26#ibcon#read 4, iclass 7, count 0 2006.229.13:02:40.26#ibcon#about to read 5, iclass 7, count 0 2006.229.13:02:40.26#ibcon#read 5, iclass 7, count 0 2006.229.13:02:40.26#ibcon#about to read 6, iclass 7, count 0 2006.229.13:02:40.26#ibcon#read 6, iclass 7, count 0 2006.229.13:02:40.26#ibcon#end of sib2, iclass 7, count 0 2006.229.13:02:40.26#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:02:40.26#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:02:40.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:02:40.26#ibcon#*before write, iclass 7, count 0 2006.229.13:02:40.26#ibcon#enter sib2, iclass 7, count 0 2006.229.13:02:40.26#ibcon#flushed, iclass 7, count 0 2006.229.13:02:40.26#ibcon#about to write, iclass 7, count 0 2006.229.13:02:40.26#ibcon#wrote, iclass 7, count 0 2006.229.13:02:40.26#ibcon#about to read 3, iclass 7, count 0 2006.229.13:02:40.31#ibcon#read 3, iclass 7, count 0 2006.229.13:02:40.31#ibcon#about to read 4, iclass 7, count 0 2006.229.13:02:40.31#ibcon#read 4, iclass 7, count 0 2006.229.13:02:40.31#ibcon#about to read 5, iclass 7, count 0 2006.229.13:02:40.31#ibcon#read 5, iclass 7, count 0 2006.229.13:02:40.31#ibcon#about to read 6, iclass 7, count 0 2006.229.13:02:40.31#ibcon#read 6, iclass 7, count 0 2006.229.13:02:40.31#ibcon#end of sib2, iclass 7, count 0 2006.229.13:02:40.31#ibcon#*after write, iclass 7, count 0 2006.229.13:02:40.31#ibcon#*before return 0, iclass 7, count 0 2006.229.13:02:40.31#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:40.31#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:40.31#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:02:40.31#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:02:40.31$vck44/va=1,8 2006.229.13:02:40.31#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.13:02:40.31#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.13:02:40.31#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:40.31#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:40.31#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:40.31#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:40.31#ibcon#enter wrdev, iclass 11, count 2 2006.229.13:02:40.31#ibcon#first serial, iclass 11, count 2 2006.229.13:02:40.31#ibcon#enter sib2, iclass 11, count 2 2006.229.13:02:40.31#ibcon#flushed, iclass 11, count 2 2006.229.13:02:40.31#ibcon#about to write, iclass 11, count 2 2006.229.13:02:40.31#ibcon#wrote, iclass 11, count 2 2006.229.13:02:40.31#ibcon#about to read 3, iclass 11, count 2 2006.229.13:02:40.33#ibcon#read 3, iclass 11, count 2 2006.229.13:02:40.33#ibcon#about to read 4, iclass 11, count 2 2006.229.13:02:40.33#ibcon#read 4, iclass 11, count 2 2006.229.13:02:40.33#ibcon#about to read 5, iclass 11, count 2 2006.229.13:02:40.33#ibcon#read 5, iclass 11, count 2 2006.229.13:02:40.33#ibcon#about to read 6, iclass 11, count 2 2006.229.13:02:40.33#ibcon#read 6, iclass 11, count 2 2006.229.13:02:40.33#ibcon#end of sib2, iclass 11, count 2 2006.229.13:02:40.33#ibcon#*mode == 0, iclass 11, count 2 2006.229.13:02:40.33#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.13:02:40.33#ibcon#[25=AT01-08\r\n] 2006.229.13:02:40.33#ibcon#*before write, iclass 11, count 2 2006.229.13:02:40.33#ibcon#enter sib2, iclass 11, count 2 2006.229.13:02:40.33#ibcon#flushed, iclass 11, count 2 2006.229.13:02:40.33#ibcon#about to write, iclass 11, count 2 2006.229.13:02:40.33#ibcon#wrote, iclass 11, count 2 2006.229.13:02:40.33#ibcon#about to read 3, iclass 11, count 2 2006.229.13:02:40.36#ibcon#read 3, iclass 11, count 2 2006.229.13:02:40.36#ibcon#about to read 4, iclass 11, count 2 2006.229.13:02:40.36#ibcon#read 4, iclass 11, count 2 2006.229.13:02:40.36#ibcon#about to read 5, iclass 11, count 2 2006.229.13:02:40.36#ibcon#read 5, iclass 11, count 2 2006.229.13:02:40.36#ibcon#about to read 6, iclass 11, count 2 2006.229.13:02:40.36#ibcon#read 6, iclass 11, count 2 2006.229.13:02:40.36#ibcon#end of sib2, iclass 11, count 2 2006.229.13:02:40.36#ibcon#*after write, iclass 11, count 2 2006.229.13:02:40.36#ibcon#*before return 0, iclass 11, count 2 2006.229.13:02:40.36#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:40.36#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:40.36#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.13:02:40.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:40.36#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:40.48#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:40.48#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:40.48#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:02:40.48#ibcon#first serial, iclass 11, count 0 2006.229.13:02:40.48#ibcon#enter sib2, iclass 11, count 0 2006.229.13:02:40.48#ibcon#flushed, iclass 11, count 0 2006.229.13:02:40.48#ibcon#about to write, iclass 11, count 0 2006.229.13:02:40.48#ibcon#wrote, iclass 11, count 0 2006.229.13:02:40.48#ibcon#about to read 3, iclass 11, count 0 2006.229.13:02:40.50#ibcon#read 3, iclass 11, count 0 2006.229.13:02:40.50#ibcon#about to read 4, iclass 11, count 0 2006.229.13:02:40.50#ibcon#read 4, iclass 11, count 0 2006.229.13:02:40.50#ibcon#about to read 5, iclass 11, count 0 2006.229.13:02:40.50#ibcon#read 5, iclass 11, count 0 2006.229.13:02:40.50#ibcon#about to read 6, iclass 11, count 0 2006.229.13:02:40.50#ibcon#read 6, iclass 11, count 0 2006.229.13:02:40.50#ibcon#end of sib2, iclass 11, count 0 2006.229.13:02:40.50#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:02:40.50#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:02:40.50#ibcon#[25=USB\r\n] 2006.229.13:02:40.50#ibcon#*before write, iclass 11, count 0 2006.229.13:02:40.50#ibcon#enter sib2, iclass 11, count 0 2006.229.13:02:40.50#ibcon#flushed, iclass 11, count 0 2006.229.13:02:40.50#ibcon#about to write, iclass 11, count 0 2006.229.13:02:40.50#ibcon#wrote, iclass 11, count 0 2006.229.13:02:40.50#ibcon#about to read 3, iclass 11, count 0 2006.229.13:02:40.53#ibcon#read 3, iclass 11, count 0 2006.229.13:02:40.53#ibcon#about to read 4, iclass 11, count 0 2006.229.13:02:40.53#ibcon#read 4, iclass 11, count 0 2006.229.13:02:40.53#ibcon#about to read 5, iclass 11, count 0 2006.229.13:02:40.53#ibcon#read 5, iclass 11, count 0 2006.229.13:02:40.53#ibcon#about to read 6, iclass 11, count 0 2006.229.13:02:40.53#ibcon#read 6, iclass 11, count 0 2006.229.13:02:40.53#ibcon#end of sib2, iclass 11, count 0 2006.229.13:02:40.53#ibcon#*after write, iclass 11, count 0 2006.229.13:02:40.53#ibcon#*before return 0, iclass 11, count 0 2006.229.13:02:40.53#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:40.53#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:40.53#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:02:40.53#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:02:40.53$vck44/valo=2,534.99 2006.229.13:02:40.53#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:02:40.53#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:02:40.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:40.53#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:40.53#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:40.53#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:40.53#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:02:40.53#ibcon#first serial, iclass 13, count 0 2006.229.13:02:40.53#ibcon#enter sib2, iclass 13, count 0 2006.229.13:02:40.53#ibcon#flushed, iclass 13, count 0 2006.229.13:02:40.53#ibcon#about to write, iclass 13, count 0 2006.229.13:02:40.53#ibcon#wrote, iclass 13, count 0 2006.229.13:02:40.53#ibcon#about to read 3, iclass 13, count 0 2006.229.13:02:40.55#ibcon#read 3, iclass 13, count 0 2006.229.13:02:40.55#ibcon#about to read 4, iclass 13, count 0 2006.229.13:02:40.55#ibcon#read 4, iclass 13, count 0 2006.229.13:02:40.55#ibcon#about to read 5, iclass 13, count 0 2006.229.13:02:40.55#ibcon#read 5, iclass 13, count 0 2006.229.13:02:40.55#ibcon#about to read 6, iclass 13, count 0 2006.229.13:02:40.55#ibcon#read 6, iclass 13, count 0 2006.229.13:02:40.55#ibcon#end of sib2, iclass 13, count 0 2006.229.13:02:40.55#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:02:40.55#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:02:40.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:02:40.55#ibcon#*before write, iclass 13, count 0 2006.229.13:02:40.55#ibcon#enter sib2, iclass 13, count 0 2006.229.13:02:40.55#ibcon#flushed, iclass 13, count 0 2006.229.13:02:40.55#ibcon#about to write, iclass 13, count 0 2006.229.13:02:40.55#ibcon#wrote, iclass 13, count 0 2006.229.13:02:40.55#ibcon#about to read 3, iclass 13, count 0 2006.229.13:02:40.59#ibcon#read 3, iclass 13, count 0 2006.229.13:02:40.59#ibcon#about to read 4, iclass 13, count 0 2006.229.13:02:40.59#ibcon#read 4, iclass 13, count 0 2006.229.13:02:40.59#ibcon#about to read 5, iclass 13, count 0 2006.229.13:02:40.59#ibcon#read 5, iclass 13, count 0 2006.229.13:02:40.59#ibcon#about to read 6, iclass 13, count 0 2006.229.13:02:40.59#ibcon#read 6, iclass 13, count 0 2006.229.13:02:40.59#ibcon#end of sib2, iclass 13, count 0 2006.229.13:02:40.59#ibcon#*after write, iclass 13, count 0 2006.229.13:02:40.59#ibcon#*before return 0, iclass 13, count 0 2006.229.13:02:40.59#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:40.59#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:40.59#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:02:40.59#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:02:40.59$vck44/va=2,7 2006.229.13:02:40.59#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.13:02:40.59#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.13:02:40.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:40.59#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:40.65#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:40.65#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:40.65#ibcon#enter wrdev, iclass 15, count 2 2006.229.13:02:40.65#ibcon#first serial, iclass 15, count 2 2006.229.13:02:40.65#ibcon#enter sib2, iclass 15, count 2 2006.229.13:02:40.65#ibcon#flushed, iclass 15, count 2 2006.229.13:02:40.65#ibcon#about to write, iclass 15, count 2 2006.229.13:02:40.65#ibcon#wrote, iclass 15, count 2 2006.229.13:02:40.65#ibcon#about to read 3, iclass 15, count 2 2006.229.13:02:40.67#ibcon#read 3, iclass 15, count 2 2006.229.13:02:40.67#ibcon#about to read 4, iclass 15, count 2 2006.229.13:02:40.67#ibcon#read 4, iclass 15, count 2 2006.229.13:02:40.67#ibcon#about to read 5, iclass 15, count 2 2006.229.13:02:40.67#ibcon#read 5, iclass 15, count 2 2006.229.13:02:40.67#ibcon#about to read 6, iclass 15, count 2 2006.229.13:02:40.67#ibcon#read 6, iclass 15, count 2 2006.229.13:02:40.67#ibcon#end of sib2, iclass 15, count 2 2006.229.13:02:40.67#ibcon#*mode == 0, iclass 15, count 2 2006.229.13:02:40.67#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.13:02:40.67#ibcon#[25=AT02-07\r\n] 2006.229.13:02:40.67#ibcon#*before write, iclass 15, count 2 2006.229.13:02:40.67#ibcon#enter sib2, iclass 15, count 2 2006.229.13:02:40.67#ibcon#flushed, iclass 15, count 2 2006.229.13:02:40.67#ibcon#about to write, iclass 15, count 2 2006.229.13:02:40.67#ibcon#wrote, iclass 15, count 2 2006.229.13:02:40.67#ibcon#about to read 3, iclass 15, count 2 2006.229.13:02:40.70#ibcon#read 3, iclass 15, count 2 2006.229.13:02:40.70#ibcon#about to read 4, iclass 15, count 2 2006.229.13:02:40.70#ibcon#read 4, iclass 15, count 2 2006.229.13:02:40.70#ibcon#about to read 5, iclass 15, count 2 2006.229.13:02:40.70#ibcon#read 5, iclass 15, count 2 2006.229.13:02:40.70#ibcon#about to read 6, iclass 15, count 2 2006.229.13:02:40.70#ibcon#read 6, iclass 15, count 2 2006.229.13:02:40.70#ibcon#end of sib2, iclass 15, count 2 2006.229.13:02:40.70#ibcon#*after write, iclass 15, count 2 2006.229.13:02:40.70#ibcon#*before return 0, iclass 15, count 2 2006.229.13:02:40.70#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:40.70#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:40.70#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.13:02:40.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:40.70#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:40.82#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:40.82#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:40.82#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:02:40.82#ibcon#first serial, iclass 15, count 0 2006.229.13:02:40.82#ibcon#enter sib2, iclass 15, count 0 2006.229.13:02:40.82#ibcon#flushed, iclass 15, count 0 2006.229.13:02:40.82#ibcon#about to write, iclass 15, count 0 2006.229.13:02:40.82#ibcon#wrote, iclass 15, count 0 2006.229.13:02:40.82#ibcon#about to read 3, iclass 15, count 0 2006.229.13:02:40.84#ibcon#read 3, iclass 15, count 0 2006.229.13:02:40.84#ibcon#about to read 4, iclass 15, count 0 2006.229.13:02:40.84#ibcon#read 4, iclass 15, count 0 2006.229.13:02:40.84#ibcon#about to read 5, iclass 15, count 0 2006.229.13:02:40.84#ibcon#read 5, iclass 15, count 0 2006.229.13:02:40.84#ibcon#about to read 6, iclass 15, count 0 2006.229.13:02:40.84#ibcon#read 6, iclass 15, count 0 2006.229.13:02:40.84#ibcon#end of sib2, iclass 15, count 0 2006.229.13:02:40.84#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:02:40.84#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:02:40.84#ibcon#[25=USB\r\n] 2006.229.13:02:40.84#ibcon#*before write, iclass 15, count 0 2006.229.13:02:40.84#ibcon#enter sib2, iclass 15, count 0 2006.229.13:02:40.84#ibcon#flushed, iclass 15, count 0 2006.229.13:02:40.84#ibcon#about to write, iclass 15, count 0 2006.229.13:02:40.84#ibcon#wrote, iclass 15, count 0 2006.229.13:02:40.84#ibcon#about to read 3, iclass 15, count 0 2006.229.13:02:40.87#ibcon#read 3, iclass 15, count 0 2006.229.13:02:40.87#ibcon#about to read 4, iclass 15, count 0 2006.229.13:02:40.87#ibcon#read 4, iclass 15, count 0 2006.229.13:02:40.87#ibcon#about to read 5, iclass 15, count 0 2006.229.13:02:40.87#ibcon#read 5, iclass 15, count 0 2006.229.13:02:40.87#ibcon#about to read 6, iclass 15, count 0 2006.229.13:02:40.87#ibcon#read 6, iclass 15, count 0 2006.229.13:02:40.87#ibcon#end of sib2, iclass 15, count 0 2006.229.13:02:40.87#ibcon#*after write, iclass 15, count 0 2006.229.13:02:40.87#ibcon#*before return 0, iclass 15, count 0 2006.229.13:02:40.87#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:40.87#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:40.87#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:02:40.87#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:02:40.87$vck44/valo=3,564.99 2006.229.13:02:40.87#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.13:02:40.87#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.13:02:40.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:40.87#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:40.87#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:40.87#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:40.87#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:02:40.87#ibcon#first serial, iclass 17, count 0 2006.229.13:02:40.87#ibcon#enter sib2, iclass 17, count 0 2006.229.13:02:40.87#ibcon#flushed, iclass 17, count 0 2006.229.13:02:40.87#ibcon#about to write, iclass 17, count 0 2006.229.13:02:40.87#ibcon#wrote, iclass 17, count 0 2006.229.13:02:40.87#ibcon#about to read 3, iclass 17, count 0 2006.229.13:02:40.89#ibcon#read 3, iclass 17, count 0 2006.229.13:02:40.89#ibcon#about to read 4, iclass 17, count 0 2006.229.13:02:40.89#ibcon#read 4, iclass 17, count 0 2006.229.13:02:40.89#ibcon#about to read 5, iclass 17, count 0 2006.229.13:02:40.89#ibcon#read 5, iclass 17, count 0 2006.229.13:02:40.89#ibcon#about to read 6, iclass 17, count 0 2006.229.13:02:40.89#ibcon#read 6, iclass 17, count 0 2006.229.13:02:40.89#ibcon#end of sib2, iclass 17, count 0 2006.229.13:02:40.89#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:02:40.89#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:02:40.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:02:40.89#ibcon#*before write, iclass 17, count 0 2006.229.13:02:40.89#ibcon#enter sib2, iclass 17, count 0 2006.229.13:02:40.89#ibcon#flushed, iclass 17, count 0 2006.229.13:02:40.89#ibcon#about to write, iclass 17, count 0 2006.229.13:02:40.89#ibcon#wrote, iclass 17, count 0 2006.229.13:02:40.89#ibcon#about to read 3, iclass 17, count 0 2006.229.13:02:40.93#ibcon#read 3, iclass 17, count 0 2006.229.13:02:40.93#ibcon#about to read 4, iclass 17, count 0 2006.229.13:02:40.93#ibcon#read 4, iclass 17, count 0 2006.229.13:02:40.93#ibcon#about to read 5, iclass 17, count 0 2006.229.13:02:40.93#ibcon#read 5, iclass 17, count 0 2006.229.13:02:40.93#ibcon#about to read 6, iclass 17, count 0 2006.229.13:02:40.93#ibcon#read 6, iclass 17, count 0 2006.229.13:02:40.93#ibcon#end of sib2, iclass 17, count 0 2006.229.13:02:40.93#ibcon#*after write, iclass 17, count 0 2006.229.13:02:40.93#ibcon#*before return 0, iclass 17, count 0 2006.229.13:02:40.93#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:40.93#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:40.93#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:02:40.93#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:02:40.93$vck44/va=3,6 2006.229.13:02:40.93#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.13:02:40.93#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.13:02:40.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:40.93#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:40.99#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:40.99#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:40.99#ibcon#enter wrdev, iclass 19, count 2 2006.229.13:02:40.99#ibcon#first serial, iclass 19, count 2 2006.229.13:02:40.99#ibcon#enter sib2, iclass 19, count 2 2006.229.13:02:40.99#ibcon#flushed, iclass 19, count 2 2006.229.13:02:40.99#ibcon#about to write, iclass 19, count 2 2006.229.13:02:40.99#ibcon#wrote, iclass 19, count 2 2006.229.13:02:40.99#ibcon#about to read 3, iclass 19, count 2 2006.229.13:02:41.01#ibcon#read 3, iclass 19, count 2 2006.229.13:02:41.01#ibcon#about to read 4, iclass 19, count 2 2006.229.13:02:41.01#ibcon#read 4, iclass 19, count 2 2006.229.13:02:41.01#ibcon#about to read 5, iclass 19, count 2 2006.229.13:02:41.01#ibcon#read 5, iclass 19, count 2 2006.229.13:02:41.01#ibcon#about to read 6, iclass 19, count 2 2006.229.13:02:41.01#ibcon#read 6, iclass 19, count 2 2006.229.13:02:41.01#ibcon#end of sib2, iclass 19, count 2 2006.229.13:02:41.01#ibcon#*mode == 0, iclass 19, count 2 2006.229.13:02:41.01#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.13:02:41.01#ibcon#[25=AT03-06\r\n] 2006.229.13:02:41.01#ibcon#*before write, iclass 19, count 2 2006.229.13:02:41.01#ibcon#enter sib2, iclass 19, count 2 2006.229.13:02:41.01#ibcon#flushed, iclass 19, count 2 2006.229.13:02:41.01#ibcon#about to write, iclass 19, count 2 2006.229.13:02:41.01#ibcon#wrote, iclass 19, count 2 2006.229.13:02:41.01#ibcon#about to read 3, iclass 19, count 2 2006.229.13:02:41.04#ibcon#read 3, iclass 19, count 2 2006.229.13:02:41.04#ibcon#about to read 4, iclass 19, count 2 2006.229.13:02:41.04#ibcon#read 4, iclass 19, count 2 2006.229.13:02:41.04#ibcon#about to read 5, iclass 19, count 2 2006.229.13:02:41.04#ibcon#read 5, iclass 19, count 2 2006.229.13:02:41.04#ibcon#about to read 6, iclass 19, count 2 2006.229.13:02:41.04#ibcon#read 6, iclass 19, count 2 2006.229.13:02:41.04#ibcon#end of sib2, iclass 19, count 2 2006.229.13:02:41.04#ibcon#*after write, iclass 19, count 2 2006.229.13:02:41.04#ibcon#*before return 0, iclass 19, count 2 2006.229.13:02:41.04#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:41.04#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:41.04#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.13:02:41.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:41.04#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:41.16#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:41.16#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:41.16#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:02:41.16#ibcon#first serial, iclass 19, count 0 2006.229.13:02:41.16#ibcon#enter sib2, iclass 19, count 0 2006.229.13:02:41.16#ibcon#flushed, iclass 19, count 0 2006.229.13:02:41.16#ibcon#about to write, iclass 19, count 0 2006.229.13:02:41.16#ibcon#wrote, iclass 19, count 0 2006.229.13:02:41.16#ibcon#about to read 3, iclass 19, count 0 2006.229.13:02:41.18#ibcon#read 3, iclass 19, count 0 2006.229.13:02:41.18#ibcon#about to read 4, iclass 19, count 0 2006.229.13:02:41.18#ibcon#read 4, iclass 19, count 0 2006.229.13:02:41.18#ibcon#about to read 5, iclass 19, count 0 2006.229.13:02:41.18#ibcon#read 5, iclass 19, count 0 2006.229.13:02:41.18#ibcon#about to read 6, iclass 19, count 0 2006.229.13:02:41.18#ibcon#read 6, iclass 19, count 0 2006.229.13:02:41.18#ibcon#end of sib2, iclass 19, count 0 2006.229.13:02:41.18#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:02:41.18#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:02:41.18#ibcon#[25=USB\r\n] 2006.229.13:02:41.18#ibcon#*before write, iclass 19, count 0 2006.229.13:02:41.18#ibcon#enter sib2, iclass 19, count 0 2006.229.13:02:41.18#ibcon#flushed, iclass 19, count 0 2006.229.13:02:41.18#ibcon#about to write, iclass 19, count 0 2006.229.13:02:41.18#ibcon#wrote, iclass 19, count 0 2006.229.13:02:41.18#ibcon#about to read 3, iclass 19, count 0 2006.229.13:02:41.21#ibcon#read 3, iclass 19, count 0 2006.229.13:02:41.21#ibcon#about to read 4, iclass 19, count 0 2006.229.13:02:41.21#ibcon#read 4, iclass 19, count 0 2006.229.13:02:41.21#ibcon#about to read 5, iclass 19, count 0 2006.229.13:02:41.21#ibcon#read 5, iclass 19, count 0 2006.229.13:02:41.21#ibcon#about to read 6, iclass 19, count 0 2006.229.13:02:41.21#ibcon#read 6, iclass 19, count 0 2006.229.13:02:41.21#ibcon#end of sib2, iclass 19, count 0 2006.229.13:02:41.21#ibcon#*after write, iclass 19, count 0 2006.229.13:02:41.21#ibcon#*before return 0, iclass 19, count 0 2006.229.13:02:41.21#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:41.21#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:41.21#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:02:41.21#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:02:41.21$vck44/valo=4,624.99 2006.229.13:02:41.21#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.13:02:41.21#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.13:02:41.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:41.21#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:41.21#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:41.21#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:41.21#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:02:41.21#ibcon#first serial, iclass 21, count 0 2006.229.13:02:41.21#ibcon#enter sib2, iclass 21, count 0 2006.229.13:02:41.21#ibcon#flushed, iclass 21, count 0 2006.229.13:02:41.21#ibcon#about to write, iclass 21, count 0 2006.229.13:02:41.21#ibcon#wrote, iclass 21, count 0 2006.229.13:02:41.21#ibcon#about to read 3, iclass 21, count 0 2006.229.13:02:41.23#ibcon#read 3, iclass 21, count 0 2006.229.13:02:41.23#ibcon#about to read 4, iclass 21, count 0 2006.229.13:02:41.23#ibcon#read 4, iclass 21, count 0 2006.229.13:02:41.23#ibcon#about to read 5, iclass 21, count 0 2006.229.13:02:41.23#ibcon#read 5, iclass 21, count 0 2006.229.13:02:41.23#ibcon#about to read 6, iclass 21, count 0 2006.229.13:02:41.23#ibcon#read 6, iclass 21, count 0 2006.229.13:02:41.23#ibcon#end of sib2, iclass 21, count 0 2006.229.13:02:41.23#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:02:41.23#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:02:41.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:02:41.23#ibcon#*before write, iclass 21, count 0 2006.229.13:02:41.23#ibcon#enter sib2, iclass 21, count 0 2006.229.13:02:41.23#ibcon#flushed, iclass 21, count 0 2006.229.13:02:41.23#ibcon#about to write, iclass 21, count 0 2006.229.13:02:41.23#ibcon#wrote, iclass 21, count 0 2006.229.13:02:41.23#ibcon#about to read 3, iclass 21, count 0 2006.229.13:02:41.27#ibcon#read 3, iclass 21, count 0 2006.229.13:02:41.27#ibcon#about to read 4, iclass 21, count 0 2006.229.13:02:41.27#ibcon#read 4, iclass 21, count 0 2006.229.13:02:41.27#ibcon#about to read 5, iclass 21, count 0 2006.229.13:02:41.27#ibcon#read 5, iclass 21, count 0 2006.229.13:02:41.27#ibcon#about to read 6, iclass 21, count 0 2006.229.13:02:41.27#ibcon#read 6, iclass 21, count 0 2006.229.13:02:41.27#ibcon#end of sib2, iclass 21, count 0 2006.229.13:02:41.27#ibcon#*after write, iclass 21, count 0 2006.229.13:02:41.27#ibcon#*before return 0, iclass 21, count 0 2006.229.13:02:41.27#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:41.27#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:41.27#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:02:41.27#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:02:41.27$vck44/va=4,7 2006.229.13:02:41.27#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.13:02:41.27#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.13:02:41.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:41.27#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:41.33#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:41.33#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:41.33#ibcon#enter wrdev, iclass 23, count 2 2006.229.13:02:41.33#ibcon#first serial, iclass 23, count 2 2006.229.13:02:41.33#ibcon#enter sib2, iclass 23, count 2 2006.229.13:02:41.33#ibcon#flushed, iclass 23, count 2 2006.229.13:02:41.33#ibcon#about to write, iclass 23, count 2 2006.229.13:02:41.33#ibcon#wrote, iclass 23, count 2 2006.229.13:02:41.33#ibcon#about to read 3, iclass 23, count 2 2006.229.13:02:41.35#ibcon#read 3, iclass 23, count 2 2006.229.13:02:41.35#ibcon#about to read 4, iclass 23, count 2 2006.229.13:02:41.35#ibcon#read 4, iclass 23, count 2 2006.229.13:02:41.35#ibcon#about to read 5, iclass 23, count 2 2006.229.13:02:41.35#ibcon#read 5, iclass 23, count 2 2006.229.13:02:41.35#ibcon#about to read 6, iclass 23, count 2 2006.229.13:02:41.35#ibcon#read 6, iclass 23, count 2 2006.229.13:02:41.35#ibcon#end of sib2, iclass 23, count 2 2006.229.13:02:41.35#ibcon#*mode == 0, iclass 23, count 2 2006.229.13:02:41.35#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.13:02:41.35#ibcon#[25=AT04-07\r\n] 2006.229.13:02:41.35#ibcon#*before write, iclass 23, count 2 2006.229.13:02:41.35#ibcon#enter sib2, iclass 23, count 2 2006.229.13:02:41.35#ibcon#flushed, iclass 23, count 2 2006.229.13:02:41.35#ibcon#about to write, iclass 23, count 2 2006.229.13:02:41.35#ibcon#wrote, iclass 23, count 2 2006.229.13:02:41.35#ibcon#about to read 3, iclass 23, count 2 2006.229.13:02:41.38#ibcon#read 3, iclass 23, count 2 2006.229.13:02:41.38#ibcon#about to read 4, iclass 23, count 2 2006.229.13:02:41.38#ibcon#read 4, iclass 23, count 2 2006.229.13:02:41.38#ibcon#about to read 5, iclass 23, count 2 2006.229.13:02:41.38#ibcon#read 5, iclass 23, count 2 2006.229.13:02:41.38#ibcon#about to read 6, iclass 23, count 2 2006.229.13:02:41.38#ibcon#read 6, iclass 23, count 2 2006.229.13:02:41.38#ibcon#end of sib2, iclass 23, count 2 2006.229.13:02:41.38#ibcon#*after write, iclass 23, count 2 2006.229.13:02:41.38#ibcon#*before return 0, iclass 23, count 2 2006.229.13:02:41.38#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:41.38#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:41.38#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.13:02:41.38#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:41.38#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:41.50#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:41.50#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:41.50#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:02:41.50#ibcon#first serial, iclass 23, count 0 2006.229.13:02:41.50#ibcon#enter sib2, iclass 23, count 0 2006.229.13:02:41.50#ibcon#flushed, iclass 23, count 0 2006.229.13:02:41.50#ibcon#about to write, iclass 23, count 0 2006.229.13:02:41.50#ibcon#wrote, iclass 23, count 0 2006.229.13:02:41.50#ibcon#about to read 3, iclass 23, count 0 2006.229.13:02:41.52#ibcon#read 3, iclass 23, count 0 2006.229.13:02:41.52#ibcon#about to read 4, iclass 23, count 0 2006.229.13:02:41.52#ibcon#read 4, iclass 23, count 0 2006.229.13:02:41.52#ibcon#about to read 5, iclass 23, count 0 2006.229.13:02:41.52#ibcon#read 5, iclass 23, count 0 2006.229.13:02:41.52#ibcon#about to read 6, iclass 23, count 0 2006.229.13:02:41.52#ibcon#read 6, iclass 23, count 0 2006.229.13:02:41.52#ibcon#end of sib2, iclass 23, count 0 2006.229.13:02:41.52#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:02:41.52#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:02:41.52#ibcon#[25=USB\r\n] 2006.229.13:02:41.52#ibcon#*before write, iclass 23, count 0 2006.229.13:02:41.52#ibcon#enter sib2, iclass 23, count 0 2006.229.13:02:41.52#ibcon#flushed, iclass 23, count 0 2006.229.13:02:41.52#ibcon#about to write, iclass 23, count 0 2006.229.13:02:41.52#ibcon#wrote, iclass 23, count 0 2006.229.13:02:41.52#ibcon#about to read 3, iclass 23, count 0 2006.229.13:02:41.55#ibcon#read 3, iclass 23, count 0 2006.229.13:02:41.55#ibcon#about to read 4, iclass 23, count 0 2006.229.13:02:41.55#ibcon#read 4, iclass 23, count 0 2006.229.13:02:41.55#ibcon#about to read 5, iclass 23, count 0 2006.229.13:02:41.55#ibcon#read 5, iclass 23, count 0 2006.229.13:02:41.55#ibcon#about to read 6, iclass 23, count 0 2006.229.13:02:41.55#ibcon#read 6, iclass 23, count 0 2006.229.13:02:41.55#ibcon#end of sib2, iclass 23, count 0 2006.229.13:02:41.55#ibcon#*after write, iclass 23, count 0 2006.229.13:02:41.55#ibcon#*before return 0, iclass 23, count 0 2006.229.13:02:41.55#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:41.55#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:41.55#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:02:41.55#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:02:41.55$vck44/valo=5,734.99 2006.229.13:02:41.55#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.13:02:41.55#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.13:02:41.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:41.55#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:41.55#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:41.55#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:41.55#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:02:41.55#ibcon#first serial, iclass 25, count 0 2006.229.13:02:41.55#ibcon#enter sib2, iclass 25, count 0 2006.229.13:02:41.55#ibcon#flushed, iclass 25, count 0 2006.229.13:02:41.55#ibcon#about to write, iclass 25, count 0 2006.229.13:02:41.55#ibcon#wrote, iclass 25, count 0 2006.229.13:02:41.55#ibcon#about to read 3, iclass 25, count 0 2006.229.13:02:41.57#ibcon#read 3, iclass 25, count 0 2006.229.13:02:41.57#ibcon#about to read 4, iclass 25, count 0 2006.229.13:02:41.57#ibcon#read 4, iclass 25, count 0 2006.229.13:02:41.57#ibcon#about to read 5, iclass 25, count 0 2006.229.13:02:41.57#ibcon#read 5, iclass 25, count 0 2006.229.13:02:41.57#ibcon#about to read 6, iclass 25, count 0 2006.229.13:02:41.57#ibcon#read 6, iclass 25, count 0 2006.229.13:02:41.57#ibcon#end of sib2, iclass 25, count 0 2006.229.13:02:41.57#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:02:41.57#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:02:41.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:02:41.57#ibcon#*before write, iclass 25, count 0 2006.229.13:02:41.57#ibcon#enter sib2, iclass 25, count 0 2006.229.13:02:41.57#ibcon#flushed, iclass 25, count 0 2006.229.13:02:41.57#ibcon#about to write, iclass 25, count 0 2006.229.13:02:41.57#ibcon#wrote, iclass 25, count 0 2006.229.13:02:41.57#ibcon#about to read 3, iclass 25, count 0 2006.229.13:02:41.61#ibcon#read 3, iclass 25, count 0 2006.229.13:02:41.61#ibcon#about to read 4, iclass 25, count 0 2006.229.13:02:41.61#ibcon#read 4, iclass 25, count 0 2006.229.13:02:41.61#ibcon#about to read 5, iclass 25, count 0 2006.229.13:02:41.61#ibcon#read 5, iclass 25, count 0 2006.229.13:02:41.61#ibcon#about to read 6, iclass 25, count 0 2006.229.13:02:41.61#ibcon#read 6, iclass 25, count 0 2006.229.13:02:41.61#ibcon#end of sib2, iclass 25, count 0 2006.229.13:02:41.61#ibcon#*after write, iclass 25, count 0 2006.229.13:02:41.61#ibcon#*before return 0, iclass 25, count 0 2006.229.13:02:41.61#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:41.61#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:41.61#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:02:41.61#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:02:41.61$vck44/va=5,4 2006.229.13:02:41.61#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.13:02:41.61#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.13:02:41.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:41.61#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:41.67#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:41.67#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:41.67#ibcon#enter wrdev, iclass 27, count 2 2006.229.13:02:41.67#ibcon#first serial, iclass 27, count 2 2006.229.13:02:41.67#ibcon#enter sib2, iclass 27, count 2 2006.229.13:02:41.67#ibcon#flushed, iclass 27, count 2 2006.229.13:02:41.67#ibcon#about to write, iclass 27, count 2 2006.229.13:02:41.67#ibcon#wrote, iclass 27, count 2 2006.229.13:02:41.67#ibcon#about to read 3, iclass 27, count 2 2006.229.13:02:41.69#ibcon#read 3, iclass 27, count 2 2006.229.13:02:41.69#ibcon#about to read 4, iclass 27, count 2 2006.229.13:02:41.69#ibcon#read 4, iclass 27, count 2 2006.229.13:02:41.69#ibcon#about to read 5, iclass 27, count 2 2006.229.13:02:41.69#ibcon#read 5, iclass 27, count 2 2006.229.13:02:41.69#ibcon#about to read 6, iclass 27, count 2 2006.229.13:02:41.69#ibcon#read 6, iclass 27, count 2 2006.229.13:02:41.69#ibcon#end of sib2, iclass 27, count 2 2006.229.13:02:41.69#ibcon#*mode == 0, iclass 27, count 2 2006.229.13:02:41.69#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.13:02:41.69#ibcon#[25=AT05-04\r\n] 2006.229.13:02:41.69#ibcon#*before write, iclass 27, count 2 2006.229.13:02:41.69#ibcon#enter sib2, iclass 27, count 2 2006.229.13:02:41.69#ibcon#flushed, iclass 27, count 2 2006.229.13:02:41.69#ibcon#about to write, iclass 27, count 2 2006.229.13:02:41.69#ibcon#wrote, iclass 27, count 2 2006.229.13:02:41.69#ibcon#about to read 3, iclass 27, count 2 2006.229.13:02:41.72#ibcon#read 3, iclass 27, count 2 2006.229.13:02:41.72#ibcon#about to read 4, iclass 27, count 2 2006.229.13:02:41.72#ibcon#read 4, iclass 27, count 2 2006.229.13:02:41.72#ibcon#about to read 5, iclass 27, count 2 2006.229.13:02:41.72#ibcon#read 5, iclass 27, count 2 2006.229.13:02:41.72#ibcon#about to read 6, iclass 27, count 2 2006.229.13:02:41.72#ibcon#read 6, iclass 27, count 2 2006.229.13:02:41.72#ibcon#end of sib2, iclass 27, count 2 2006.229.13:02:41.72#ibcon#*after write, iclass 27, count 2 2006.229.13:02:41.72#ibcon#*before return 0, iclass 27, count 2 2006.229.13:02:41.72#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:41.72#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:41.72#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.13:02:41.72#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:41.72#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:41.84#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:41.84#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:41.84#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:02:41.84#ibcon#first serial, iclass 27, count 0 2006.229.13:02:41.84#ibcon#enter sib2, iclass 27, count 0 2006.229.13:02:41.84#ibcon#flushed, iclass 27, count 0 2006.229.13:02:41.84#ibcon#about to write, iclass 27, count 0 2006.229.13:02:41.84#ibcon#wrote, iclass 27, count 0 2006.229.13:02:41.84#ibcon#about to read 3, iclass 27, count 0 2006.229.13:02:41.86#ibcon#read 3, iclass 27, count 0 2006.229.13:02:41.86#ibcon#about to read 4, iclass 27, count 0 2006.229.13:02:41.86#ibcon#read 4, iclass 27, count 0 2006.229.13:02:41.86#ibcon#about to read 5, iclass 27, count 0 2006.229.13:02:41.86#ibcon#read 5, iclass 27, count 0 2006.229.13:02:41.86#ibcon#about to read 6, iclass 27, count 0 2006.229.13:02:41.86#ibcon#read 6, iclass 27, count 0 2006.229.13:02:41.86#ibcon#end of sib2, iclass 27, count 0 2006.229.13:02:41.86#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:02:41.86#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:02:41.86#ibcon#[25=USB\r\n] 2006.229.13:02:41.86#ibcon#*before write, iclass 27, count 0 2006.229.13:02:41.86#ibcon#enter sib2, iclass 27, count 0 2006.229.13:02:41.86#ibcon#flushed, iclass 27, count 0 2006.229.13:02:41.86#ibcon#about to write, iclass 27, count 0 2006.229.13:02:41.86#ibcon#wrote, iclass 27, count 0 2006.229.13:02:41.86#ibcon#about to read 3, iclass 27, count 0 2006.229.13:02:41.89#ibcon#read 3, iclass 27, count 0 2006.229.13:02:41.89#ibcon#about to read 4, iclass 27, count 0 2006.229.13:02:41.89#ibcon#read 4, iclass 27, count 0 2006.229.13:02:41.89#ibcon#about to read 5, iclass 27, count 0 2006.229.13:02:41.89#ibcon#read 5, iclass 27, count 0 2006.229.13:02:41.89#ibcon#about to read 6, iclass 27, count 0 2006.229.13:02:41.89#ibcon#read 6, iclass 27, count 0 2006.229.13:02:41.89#ibcon#end of sib2, iclass 27, count 0 2006.229.13:02:41.89#ibcon#*after write, iclass 27, count 0 2006.229.13:02:41.89#ibcon#*before return 0, iclass 27, count 0 2006.229.13:02:41.89#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:41.89#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:41.89#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:02:41.89#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:02:41.89$vck44/valo=6,814.99 2006.229.13:02:41.89#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:02:41.89#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:02:41.89#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:41.89#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:41.89#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:41.89#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:41.89#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:02:41.89#ibcon#first serial, iclass 29, count 0 2006.229.13:02:41.89#ibcon#enter sib2, iclass 29, count 0 2006.229.13:02:41.89#ibcon#flushed, iclass 29, count 0 2006.229.13:02:41.89#ibcon#about to write, iclass 29, count 0 2006.229.13:02:41.89#ibcon#wrote, iclass 29, count 0 2006.229.13:02:41.89#ibcon#about to read 3, iclass 29, count 0 2006.229.13:02:41.91#ibcon#read 3, iclass 29, count 0 2006.229.13:02:41.91#ibcon#about to read 4, iclass 29, count 0 2006.229.13:02:41.91#ibcon#read 4, iclass 29, count 0 2006.229.13:02:41.91#ibcon#about to read 5, iclass 29, count 0 2006.229.13:02:41.91#ibcon#read 5, iclass 29, count 0 2006.229.13:02:41.91#ibcon#about to read 6, iclass 29, count 0 2006.229.13:02:41.91#ibcon#read 6, iclass 29, count 0 2006.229.13:02:41.91#ibcon#end of sib2, iclass 29, count 0 2006.229.13:02:41.91#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:02:41.91#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:02:41.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:02:41.91#ibcon#*before write, iclass 29, count 0 2006.229.13:02:41.91#ibcon#enter sib2, iclass 29, count 0 2006.229.13:02:41.91#ibcon#flushed, iclass 29, count 0 2006.229.13:02:41.91#ibcon#about to write, iclass 29, count 0 2006.229.13:02:41.91#ibcon#wrote, iclass 29, count 0 2006.229.13:02:41.91#ibcon#about to read 3, iclass 29, count 0 2006.229.13:02:41.95#ibcon#read 3, iclass 29, count 0 2006.229.13:02:41.95#ibcon#about to read 4, iclass 29, count 0 2006.229.13:02:41.95#ibcon#read 4, iclass 29, count 0 2006.229.13:02:41.95#ibcon#about to read 5, iclass 29, count 0 2006.229.13:02:41.95#ibcon#read 5, iclass 29, count 0 2006.229.13:02:41.95#ibcon#about to read 6, iclass 29, count 0 2006.229.13:02:41.95#ibcon#read 6, iclass 29, count 0 2006.229.13:02:41.95#ibcon#end of sib2, iclass 29, count 0 2006.229.13:02:41.95#ibcon#*after write, iclass 29, count 0 2006.229.13:02:41.95#ibcon#*before return 0, iclass 29, count 0 2006.229.13:02:41.95#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:41.95#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:41.95#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:02:41.95#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:02:41.95$vck44/va=6,4 2006.229.13:02:41.95#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.13:02:41.95#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.13:02:41.95#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:41.95#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:42.01#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:42.01#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:42.01#ibcon#enter wrdev, iclass 31, count 2 2006.229.13:02:42.01#ibcon#first serial, iclass 31, count 2 2006.229.13:02:42.01#ibcon#enter sib2, iclass 31, count 2 2006.229.13:02:42.01#ibcon#flushed, iclass 31, count 2 2006.229.13:02:42.01#ibcon#about to write, iclass 31, count 2 2006.229.13:02:42.01#ibcon#wrote, iclass 31, count 2 2006.229.13:02:42.01#ibcon#about to read 3, iclass 31, count 2 2006.229.13:02:42.03#ibcon#read 3, iclass 31, count 2 2006.229.13:02:42.03#ibcon#about to read 4, iclass 31, count 2 2006.229.13:02:42.03#ibcon#read 4, iclass 31, count 2 2006.229.13:02:42.03#ibcon#about to read 5, iclass 31, count 2 2006.229.13:02:42.03#ibcon#read 5, iclass 31, count 2 2006.229.13:02:42.03#ibcon#about to read 6, iclass 31, count 2 2006.229.13:02:42.03#ibcon#read 6, iclass 31, count 2 2006.229.13:02:42.03#ibcon#end of sib2, iclass 31, count 2 2006.229.13:02:42.03#ibcon#*mode == 0, iclass 31, count 2 2006.229.13:02:42.03#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.13:02:42.03#ibcon#[25=AT06-04\r\n] 2006.229.13:02:42.03#ibcon#*before write, iclass 31, count 2 2006.229.13:02:42.03#ibcon#enter sib2, iclass 31, count 2 2006.229.13:02:42.03#ibcon#flushed, iclass 31, count 2 2006.229.13:02:42.03#ibcon#about to write, iclass 31, count 2 2006.229.13:02:42.03#ibcon#wrote, iclass 31, count 2 2006.229.13:02:42.03#ibcon#about to read 3, iclass 31, count 2 2006.229.13:02:42.06#ibcon#read 3, iclass 31, count 2 2006.229.13:02:42.06#ibcon#about to read 4, iclass 31, count 2 2006.229.13:02:42.06#ibcon#read 4, iclass 31, count 2 2006.229.13:02:42.06#ibcon#about to read 5, iclass 31, count 2 2006.229.13:02:42.06#ibcon#read 5, iclass 31, count 2 2006.229.13:02:42.06#ibcon#about to read 6, iclass 31, count 2 2006.229.13:02:42.06#ibcon#read 6, iclass 31, count 2 2006.229.13:02:42.06#ibcon#end of sib2, iclass 31, count 2 2006.229.13:02:42.06#ibcon#*after write, iclass 31, count 2 2006.229.13:02:42.06#ibcon#*before return 0, iclass 31, count 2 2006.229.13:02:42.06#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:42.06#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:42.06#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.13:02:42.06#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:42.06#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:42.18#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:42.18#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:42.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:02:42.18#ibcon#first serial, iclass 31, count 0 2006.229.13:02:42.18#ibcon#enter sib2, iclass 31, count 0 2006.229.13:02:42.18#ibcon#flushed, iclass 31, count 0 2006.229.13:02:42.18#ibcon#about to write, iclass 31, count 0 2006.229.13:02:42.18#ibcon#wrote, iclass 31, count 0 2006.229.13:02:42.18#ibcon#about to read 3, iclass 31, count 0 2006.229.13:02:42.20#ibcon#read 3, iclass 31, count 0 2006.229.13:02:42.20#ibcon#about to read 4, iclass 31, count 0 2006.229.13:02:42.20#ibcon#read 4, iclass 31, count 0 2006.229.13:02:42.20#ibcon#about to read 5, iclass 31, count 0 2006.229.13:02:42.20#ibcon#read 5, iclass 31, count 0 2006.229.13:02:42.20#ibcon#about to read 6, iclass 31, count 0 2006.229.13:02:42.20#ibcon#read 6, iclass 31, count 0 2006.229.13:02:42.20#ibcon#end of sib2, iclass 31, count 0 2006.229.13:02:42.20#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:02:42.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:02:42.20#ibcon#[25=USB\r\n] 2006.229.13:02:42.20#ibcon#*before write, iclass 31, count 0 2006.229.13:02:42.20#ibcon#enter sib2, iclass 31, count 0 2006.229.13:02:42.20#ibcon#flushed, iclass 31, count 0 2006.229.13:02:42.20#ibcon#about to write, iclass 31, count 0 2006.229.13:02:42.20#ibcon#wrote, iclass 31, count 0 2006.229.13:02:42.20#ibcon#about to read 3, iclass 31, count 0 2006.229.13:02:42.23#ibcon#read 3, iclass 31, count 0 2006.229.13:02:42.23#ibcon#about to read 4, iclass 31, count 0 2006.229.13:02:42.23#ibcon#read 4, iclass 31, count 0 2006.229.13:02:42.23#ibcon#about to read 5, iclass 31, count 0 2006.229.13:02:42.23#ibcon#read 5, iclass 31, count 0 2006.229.13:02:42.23#ibcon#about to read 6, iclass 31, count 0 2006.229.13:02:42.23#ibcon#read 6, iclass 31, count 0 2006.229.13:02:42.23#ibcon#end of sib2, iclass 31, count 0 2006.229.13:02:42.23#ibcon#*after write, iclass 31, count 0 2006.229.13:02:42.23#ibcon#*before return 0, iclass 31, count 0 2006.229.13:02:42.23#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:42.23#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:42.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:02:42.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:02:42.23$vck44/valo=7,864.99 2006.229.13:02:42.23#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.13:02:42.23#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.13:02:42.23#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:42.23#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:02:42.23#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:02:42.23#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:02:42.23#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:02:42.23#ibcon#first serial, iclass 33, count 0 2006.229.13:02:42.23#ibcon#enter sib2, iclass 33, count 0 2006.229.13:02:42.23#ibcon#flushed, iclass 33, count 0 2006.229.13:02:42.23#ibcon#about to write, iclass 33, count 0 2006.229.13:02:42.23#ibcon#wrote, iclass 33, count 0 2006.229.13:02:42.23#ibcon#about to read 3, iclass 33, count 0 2006.229.13:02:42.25#ibcon#read 3, iclass 33, count 0 2006.229.13:02:42.25#ibcon#about to read 4, iclass 33, count 0 2006.229.13:02:42.25#ibcon#read 4, iclass 33, count 0 2006.229.13:02:42.25#ibcon#about to read 5, iclass 33, count 0 2006.229.13:02:42.25#ibcon#read 5, iclass 33, count 0 2006.229.13:02:42.25#ibcon#about to read 6, iclass 33, count 0 2006.229.13:02:42.25#ibcon#read 6, iclass 33, count 0 2006.229.13:02:42.25#ibcon#end of sib2, iclass 33, count 0 2006.229.13:02:42.25#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:02:42.25#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:02:42.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:02:42.25#ibcon#*before write, iclass 33, count 0 2006.229.13:02:42.25#ibcon#enter sib2, iclass 33, count 0 2006.229.13:02:42.25#ibcon#flushed, iclass 33, count 0 2006.229.13:02:42.25#ibcon#about to write, iclass 33, count 0 2006.229.13:02:42.25#ibcon#wrote, iclass 33, count 0 2006.229.13:02:42.25#ibcon#about to read 3, iclass 33, count 0 2006.229.13:02:42.29#ibcon#read 3, iclass 33, count 0 2006.229.13:02:42.29#ibcon#about to read 4, iclass 33, count 0 2006.229.13:02:42.29#ibcon#read 4, iclass 33, count 0 2006.229.13:02:42.29#ibcon#about to read 5, iclass 33, count 0 2006.229.13:02:42.29#ibcon#read 5, iclass 33, count 0 2006.229.13:02:42.29#ibcon#about to read 6, iclass 33, count 0 2006.229.13:02:42.29#ibcon#read 6, iclass 33, count 0 2006.229.13:02:42.29#ibcon#end of sib2, iclass 33, count 0 2006.229.13:02:42.29#ibcon#*after write, iclass 33, count 0 2006.229.13:02:42.29#ibcon#*before return 0, iclass 33, count 0 2006.229.13:02:42.29#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:02:42.29#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:02:42.29#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:02:42.29#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:02:42.29$vck44/va=7,5 2006.229.13:02:42.29#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.13:02:42.29#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.13:02:42.29#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:42.29#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:02:42.35#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:02:42.35#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:02:42.35#ibcon#enter wrdev, iclass 35, count 2 2006.229.13:02:42.35#ibcon#first serial, iclass 35, count 2 2006.229.13:02:42.35#ibcon#enter sib2, iclass 35, count 2 2006.229.13:02:42.35#ibcon#flushed, iclass 35, count 2 2006.229.13:02:42.35#ibcon#about to write, iclass 35, count 2 2006.229.13:02:42.35#ibcon#wrote, iclass 35, count 2 2006.229.13:02:42.35#ibcon#about to read 3, iclass 35, count 2 2006.229.13:02:42.37#ibcon#read 3, iclass 35, count 2 2006.229.13:02:42.37#ibcon#about to read 4, iclass 35, count 2 2006.229.13:02:42.37#ibcon#read 4, iclass 35, count 2 2006.229.13:02:42.37#ibcon#about to read 5, iclass 35, count 2 2006.229.13:02:42.37#ibcon#read 5, iclass 35, count 2 2006.229.13:02:42.37#ibcon#about to read 6, iclass 35, count 2 2006.229.13:02:42.37#ibcon#read 6, iclass 35, count 2 2006.229.13:02:42.37#ibcon#end of sib2, iclass 35, count 2 2006.229.13:02:42.37#ibcon#*mode == 0, iclass 35, count 2 2006.229.13:02:42.37#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.13:02:42.37#ibcon#[25=AT07-05\r\n] 2006.229.13:02:42.37#ibcon#*before write, iclass 35, count 2 2006.229.13:02:42.37#ibcon#enter sib2, iclass 35, count 2 2006.229.13:02:42.37#ibcon#flushed, iclass 35, count 2 2006.229.13:02:42.37#ibcon#about to write, iclass 35, count 2 2006.229.13:02:42.37#ibcon#wrote, iclass 35, count 2 2006.229.13:02:42.37#ibcon#about to read 3, iclass 35, count 2 2006.229.13:02:42.40#ibcon#read 3, iclass 35, count 2 2006.229.13:02:42.40#ibcon#about to read 4, iclass 35, count 2 2006.229.13:02:42.40#ibcon#read 4, iclass 35, count 2 2006.229.13:02:42.40#ibcon#about to read 5, iclass 35, count 2 2006.229.13:02:42.40#ibcon#read 5, iclass 35, count 2 2006.229.13:02:42.40#ibcon#about to read 6, iclass 35, count 2 2006.229.13:02:42.40#ibcon#read 6, iclass 35, count 2 2006.229.13:02:42.40#ibcon#end of sib2, iclass 35, count 2 2006.229.13:02:42.40#ibcon#*after write, iclass 35, count 2 2006.229.13:02:42.40#ibcon#*before return 0, iclass 35, count 2 2006.229.13:02:42.40#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:02:42.40#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:02:42.40#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.13:02:42.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:42.40#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:02:42.52#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:02:42.52#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:02:42.52#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:02:42.52#ibcon#first serial, iclass 35, count 0 2006.229.13:02:42.52#ibcon#enter sib2, iclass 35, count 0 2006.229.13:02:42.52#ibcon#flushed, iclass 35, count 0 2006.229.13:02:42.52#ibcon#about to write, iclass 35, count 0 2006.229.13:02:42.52#ibcon#wrote, iclass 35, count 0 2006.229.13:02:42.52#ibcon#about to read 3, iclass 35, count 0 2006.229.13:02:42.54#ibcon#read 3, iclass 35, count 0 2006.229.13:02:42.54#ibcon#about to read 4, iclass 35, count 0 2006.229.13:02:42.54#ibcon#read 4, iclass 35, count 0 2006.229.13:02:42.54#ibcon#about to read 5, iclass 35, count 0 2006.229.13:02:42.54#ibcon#read 5, iclass 35, count 0 2006.229.13:02:42.54#ibcon#about to read 6, iclass 35, count 0 2006.229.13:02:42.54#ibcon#read 6, iclass 35, count 0 2006.229.13:02:42.54#ibcon#end of sib2, iclass 35, count 0 2006.229.13:02:42.54#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:02:42.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:02:42.54#ibcon#[25=USB\r\n] 2006.229.13:02:42.54#ibcon#*before write, iclass 35, count 0 2006.229.13:02:42.54#ibcon#enter sib2, iclass 35, count 0 2006.229.13:02:42.54#ibcon#flushed, iclass 35, count 0 2006.229.13:02:42.54#ibcon#about to write, iclass 35, count 0 2006.229.13:02:42.54#ibcon#wrote, iclass 35, count 0 2006.229.13:02:42.54#ibcon#about to read 3, iclass 35, count 0 2006.229.13:02:42.57#ibcon#read 3, iclass 35, count 0 2006.229.13:02:42.57#ibcon#about to read 4, iclass 35, count 0 2006.229.13:02:42.57#ibcon#read 4, iclass 35, count 0 2006.229.13:02:42.57#ibcon#about to read 5, iclass 35, count 0 2006.229.13:02:42.57#ibcon#read 5, iclass 35, count 0 2006.229.13:02:42.57#ibcon#about to read 6, iclass 35, count 0 2006.229.13:02:42.57#ibcon#read 6, iclass 35, count 0 2006.229.13:02:42.57#ibcon#end of sib2, iclass 35, count 0 2006.229.13:02:42.57#ibcon#*after write, iclass 35, count 0 2006.229.13:02:42.57#ibcon#*before return 0, iclass 35, count 0 2006.229.13:02:42.57#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:02:42.57#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:02:42.57#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:02:42.57#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:02:42.57$vck44/valo=8,884.99 2006.229.13:02:42.57#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.13:02:42.57#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.13:02:42.57#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:42.57#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:42.57#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:42.57#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:42.57#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:02:42.57#ibcon#first serial, iclass 37, count 0 2006.229.13:02:42.57#ibcon#enter sib2, iclass 37, count 0 2006.229.13:02:42.57#ibcon#flushed, iclass 37, count 0 2006.229.13:02:42.57#ibcon#about to write, iclass 37, count 0 2006.229.13:02:42.57#ibcon#wrote, iclass 37, count 0 2006.229.13:02:42.57#ibcon#about to read 3, iclass 37, count 0 2006.229.13:02:42.59#ibcon#read 3, iclass 37, count 0 2006.229.13:02:42.59#ibcon#about to read 4, iclass 37, count 0 2006.229.13:02:42.59#ibcon#read 4, iclass 37, count 0 2006.229.13:02:42.59#ibcon#about to read 5, iclass 37, count 0 2006.229.13:02:42.59#ibcon#read 5, iclass 37, count 0 2006.229.13:02:42.59#ibcon#about to read 6, iclass 37, count 0 2006.229.13:02:42.59#ibcon#read 6, iclass 37, count 0 2006.229.13:02:42.59#ibcon#end of sib2, iclass 37, count 0 2006.229.13:02:42.59#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:02:42.59#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:02:42.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:02:42.59#ibcon#*before write, iclass 37, count 0 2006.229.13:02:42.59#ibcon#enter sib2, iclass 37, count 0 2006.229.13:02:42.59#ibcon#flushed, iclass 37, count 0 2006.229.13:02:42.59#ibcon#about to write, iclass 37, count 0 2006.229.13:02:42.59#ibcon#wrote, iclass 37, count 0 2006.229.13:02:42.59#ibcon#about to read 3, iclass 37, count 0 2006.229.13:02:42.63#ibcon#read 3, iclass 37, count 0 2006.229.13:02:42.63#ibcon#about to read 4, iclass 37, count 0 2006.229.13:02:42.63#ibcon#read 4, iclass 37, count 0 2006.229.13:02:42.63#ibcon#about to read 5, iclass 37, count 0 2006.229.13:02:42.63#ibcon#read 5, iclass 37, count 0 2006.229.13:02:42.63#ibcon#about to read 6, iclass 37, count 0 2006.229.13:02:42.63#ibcon#read 6, iclass 37, count 0 2006.229.13:02:42.63#ibcon#end of sib2, iclass 37, count 0 2006.229.13:02:42.63#ibcon#*after write, iclass 37, count 0 2006.229.13:02:42.63#ibcon#*before return 0, iclass 37, count 0 2006.229.13:02:42.63#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:42.63#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:42.63#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:02:42.63#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:02:42.63$vck44/va=8,6 2006.229.13:02:42.63#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.13:02:42.63#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.13:02:42.63#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:42.63#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:42.69#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:42.69#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:42.69#ibcon#enter wrdev, iclass 39, count 2 2006.229.13:02:42.69#ibcon#first serial, iclass 39, count 2 2006.229.13:02:42.69#ibcon#enter sib2, iclass 39, count 2 2006.229.13:02:42.69#ibcon#flushed, iclass 39, count 2 2006.229.13:02:42.69#ibcon#about to write, iclass 39, count 2 2006.229.13:02:42.69#ibcon#wrote, iclass 39, count 2 2006.229.13:02:42.69#ibcon#about to read 3, iclass 39, count 2 2006.229.13:02:42.71#ibcon#read 3, iclass 39, count 2 2006.229.13:02:42.71#ibcon#about to read 4, iclass 39, count 2 2006.229.13:02:42.71#ibcon#read 4, iclass 39, count 2 2006.229.13:02:42.71#ibcon#about to read 5, iclass 39, count 2 2006.229.13:02:42.71#ibcon#read 5, iclass 39, count 2 2006.229.13:02:42.71#ibcon#about to read 6, iclass 39, count 2 2006.229.13:02:42.71#ibcon#read 6, iclass 39, count 2 2006.229.13:02:42.71#ibcon#end of sib2, iclass 39, count 2 2006.229.13:02:42.71#ibcon#*mode == 0, iclass 39, count 2 2006.229.13:02:42.71#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.13:02:42.71#ibcon#[25=AT08-06\r\n] 2006.229.13:02:42.71#ibcon#*before write, iclass 39, count 2 2006.229.13:02:42.71#ibcon#enter sib2, iclass 39, count 2 2006.229.13:02:42.71#ibcon#flushed, iclass 39, count 2 2006.229.13:02:42.71#ibcon#about to write, iclass 39, count 2 2006.229.13:02:42.71#ibcon#wrote, iclass 39, count 2 2006.229.13:02:42.71#ibcon#about to read 3, iclass 39, count 2 2006.229.13:02:42.74#ibcon#read 3, iclass 39, count 2 2006.229.13:02:42.74#ibcon#about to read 4, iclass 39, count 2 2006.229.13:02:42.74#ibcon#read 4, iclass 39, count 2 2006.229.13:02:42.74#ibcon#about to read 5, iclass 39, count 2 2006.229.13:02:42.74#ibcon#read 5, iclass 39, count 2 2006.229.13:02:42.74#ibcon#about to read 6, iclass 39, count 2 2006.229.13:02:42.74#ibcon#read 6, iclass 39, count 2 2006.229.13:02:42.74#ibcon#end of sib2, iclass 39, count 2 2006.229.13:02:42.74#ibcon#*after write, iclass 39, count 2 2006.229.13:02:42.74#ibcon#*before return 0, iclass 39, count 2 2006.229.13:02:42.74#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:42.74#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:42.74#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.13:02:42.74#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:42.74#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:42.86#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:42.86#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:42.86#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:02:42.86#ibcon#first serial, iclass 39, count 0 2006.229.13:02:42.86#ibcon#enter sib2, iclass 39, count 0 2006.229.13:02:42.86#ibcon#flushed, iclass 39, count 0 2006.229.13:02:42.86#ibcon#about to write, iclass 39, count 0 2006.229.13:02:42.86#ibcon#wrote, iclass 39, count 0 2006.229.13:02:42.86#ibcon#about to read 3, iclass 39, count 0 2006.229.13:02:42.88#ibcon#read 3, iclass 39, count 0 2006.229.13:02:42.88#ibcon#about to read 4, iclass 39, count 0 2006.229.13:02:42.88#ibcon#read 4, iclass 39, count 0 2006.229.13:02:42.88#ibcon#about to read 5, iclass 39, count 0 2006.229.13:02:42.88#ibcon#read 5, iclass 39, count 0 2006.229.13:02:42.88#ibcon#about to read 6, iclass 39, count 0 2006.229.13:02:42.88#ibcon#read 6, iclass 39, count 0 2006.229.13:02:42.88#ibcon#end of sib2, iclass 39, count 0 2006.229.13:02:42.88#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:02:42.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:02:42.88#ibcon#[25=USB\r\n] 2006.229.13:02:42.88#ibcon#*before write, iclass 39, count 0 2006.229.13:02:42.88#ibcon#enter sib2, iclass 39, count 0 2006.229.13:02:42.88#ibcon#flushed, iclass 39, count 0 2006.229.13:02:42.88#ibcon#about to write, iclass 39, count 0 2006.229.13:02:42.88#ibcon#wrote, iclass 39, count 0 2006.229.13:02:42.88#ibcon#about to read 3, iclass 39, count 0 2006.229.13:02:42.91#ibcon#read 3, iclass 39, count 0 2006.229.13:02:42.91#ibcon#about to read 4, iclass 39, count 0 2006.229.13:02:42.91#ibcon#read 4, iclass 39, count 0 2006.229.13:02:42.91#ibcon#about to read 5, iclass 39, count 0 2006.229.13:02:42.91#ibcon#read 5, iclass 39, count 0 2006.229.13:02:42.91#ibcon#about to read 6, iclass 39, count 0 2006.229.13:02:42.91#ibcon#read 6, iclass 39, count 0 2006.229.13:02:42.91#ibcon#end of sib2, iclass 39, count 0 2006.229.13:02:42.91#ibcon#*after write, iclass 39, count 0 2006.229.13:02:42.91#ibcon#*before return 0, iclass 39, count 0 2006.229.13:02:42.91#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:42.91#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:42.91#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:02:42.91#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:02:42.91$vck44/vblo=1,629.99 2006.229.13:02:42.91#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:02:42.91#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:02:42.91#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:42.91#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:42.91#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:42.91#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:42.91#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:02:42.91#ibcon#first serial, iclass 3, count 0 2006.229.13:02:42.91#ibcon#enter sib2, iclass 3, count 0 2006.229.13:02:42.91#ibcon#flushed, iclass 3, count 0 2006.229.13:02:42.91#ibcon#about to write, iclass 3, count 0 2006.229.13:02:42.91#ibcon#wrote, iclass 3, count 0 2006.229.13:02:42.91#ibcon#about to read 3, iclass 3, count 0 2006.229.13:02:42.93#ibcon#read 3, iclass 3, count 0 2006.229.13:02:42.93#ibcon#about to read 4, iclass 3, count 0 2006.229.13:02:42.93#ibcon#read 4, iclass 3, count 0 2006.229.13:02:42.93#ibcon#about to read 5, iclass 3, count 0 2006.229.13:02:42.93#ibcon#read 5, iclass 3, count 0 2006.229.13:02:42.93#ibcon#about to read 6, iclass 3, count 0 2006.229.13:02:42.93#ibcon#read 6, iclass 3, count 0 2006.229.13:02:42.93#ibcon#end of sib2, iclass 3, count 0 2006.229.13:02:42.93#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:02:42.93#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:02:42.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:02:42.93#ibcon#*before write, iclass 3, count 0 2006.229.13:02:42.93#ibcon#enter sib2, iclass 3, count 0 2006.229.13:02:42.93#ibcon#flushed, iclass 3, count 0 2006.229.13:02:42.93#ibcon#about to write, iclass 3, count 0 2006.229.13:02:42.93#ibcon#wrote, iclass 3, count 0 2006.229.13:02:42.93#ibcon#about to read 3, iclass 3, count 0 2006.229.13:02:42.97#ibcon#read 3, iclass 3, count 0 2006.229.13:02:42.97#ibcon#about to read 4, iclass 3, count 0 2006.229.13:02:42.97#ibcon#read 4, iclass 3, count 0 2006.229.13:02:42.97#ibcon#about to read 5, iclass 3, count 0 2006.229.13:02:42.97#ibcon#read 5, iclass 3, count 0 2006.229.13:02:42.97#ibcon#about to read 6, iclass 3, count 0 2006.229.13:02:42.97#ibcon#read 6, iclass 3, count 0 2006.229.13:02:42.97#ibcon#end of sib2, iclass 3, count 0 2006.229.13:02:42.97#ibcon#*after write, iclass 3, count 0 2006.229.13:02:42.97#ibcon#*before return 0, iclass 3, count 0 2006.229.13:02:42.97#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:42.97#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:42.97#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:02:42.97#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:02:42.97$vck44/vb=1,4 2006.229.13:02:42.97#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.13:02:42.97#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.13:02:42.97#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:42.97#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:02:42.97#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:02:42.97#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:02:42.97#ibcon#enter wrdev, iclass 5, count 2 2006.229.13:02:42.97#ibcon#first serial, iclass 5, count 2 2006.229.13:02:42.97#ibcon#enter sib2, iclass 5, count 2 2006.229.13:02:42.97#ibcon#flushed, iclass 5, count 2 2006.229.13:02:42.97#ibcon#about to write, iclass 5, count 2 2006.229.13:02:42.97#ibcon#wrote, iclass 5, count 2 2006.229.13:02:42.97#ibcon#about to read 3, iclass 5, count 2 2006.229.13:02:42.99#ibcon#read 3, iclass 5, count 2 2006.229.13:02:42.99#ibcon#about to read 4, iclass 5, count 2 2006.229.13:02:42.99#ibcon#read 4, iclass 5, count 2 2006.229.13:02:42.99#ibcon#about to read 5, iclass 5, count 2 2006.229.13:02:42.99#ibcon#read 5, iclass 5, count 2 2006.229.13:02:42.99#ibcon#about to read 6, iclass 5, count 2 2006.229.13:02:42.99#ibcon#read 6, iclass 5, count 2 2006.229.13:02:42.99#ibcon#end of sib2, iclass 5, count 2 2006.229.13:02:42.99#ibcon#*mode == 0, iclass 5, count 2 2006.229.13:02:42.99#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.13:02:42.99#ibcon#[27=AT01-04\r\n] 2006.229.13:02:42.99#ibcon#*before write, iclass 5, count 2 2006.229.13:02:42.99#ibcon#enter sib2, iclass 5, count 2 2006.229.13:02:42.99#ibcon#flushed, iclass 5, count 2 2006.229.13:02:42.99#ibcon#about to write, iclass 5, count 2 2006.229.13:02:42.99#ibcon#wrote, iclass 5, count 2 2006.229.13:02:42.99#ibcon#about to read 3, iclass 5, count 2 2006.229.13:02:43.02#ibcon#read 3, iclass 5, count 2 2006.229.13:02:43.02#ibcon#about to read 4, iclass 5, count 2 2006.229.13:02:43.02#ibcon#read 4, iclass 5, count 2 2006.229.13:02:43.02#ibcon#about to read 5, iclass 5, count 2 2006.229.13:02:43.02#ibcon#read 5, iclass 5, count 2 2006.229.13:02:43.02#ibcon#about to read 6, iclass 5, count 2 2006.229.13:02:43.02#ibcon#read 6, iclass 5, count 2 2006.229.13:02:43.02#ibcon#end of sib2, iclass 5, count 2 2006.229.13:02:43.02#ibcon#*after write, iclass 5, count 2 2006.229.13:02:43.02#ibcon#*before return 0, iclass 5, count 2 2006.229.13:02:43.02#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:02:43.02#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:02:43.02#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.13:02:43.02#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:43.02#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:02:43.14#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:02:43.14#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:02:43.14#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:02:43.14#ibcon#first serial, iclass 5, count 0 2006.229.13:02:43.14#ibcon#enter sib2, iclass 5, count 0 2006.229.13:02:43.14#ibcon#flushed, iclass 5, count 0 2006.229.13:02:43.14#ibcon#about to write, iclass 5, count 0 2006.229.13:02:43.14#ibcon#wrote, iclass 5, count 0 2006.229.13:02:43.14#ibcon#about to read 3, iclass 5, count 0 2006.229.13:02:43.16#ibcon#read 3, iclass 5, count 0 2006.229.13:02:43.16#ibcon#about to read 4, iclass 5, count 0 2006.229.13:02:43.16#ibcon#read 4, iclass 5, count 0 2006.229.13:02:43.16#ibcon#about to read 5, iclass 5, count 0 2006.229.13:02:43.16#ibcon#read 5, iclass 5, count 0 2006.229.13:02:43.16#ibcon#about to read 6, iclass 5, count 0 2006.229.13:02:43.16#ibcon#read 6, iclass 5, count 0 2006.229.13:02:43.16#ibcon#end of sib2, iclass 5, count 0 2006.229.13:02:43.16#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:02:43.16#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:02:43.16#ibcon#[27=USB\r\n] 2006.229.13:02:43.16#ibcon#*before write, iclass 5, count 0 2006.229.13:02:43.16#ibcon#enter sib2, iclass 5, count 0 2006.229.13:02:43.16#ibcon#flushed, iclass 5, count 0 2006.229.13:02:43.16#ibcon#about to write, iclass 5, count 0 2006.229.13:02:43.16#ibcon#wrote, iclass 5, count 0 2006.229.13:02:43.16#ibcon#about to read 3, iclass 5, count 0 2006.229.13:02:43.19#ibcon#read 3, iclass 5, count 0 2006.229.13:02:43.19#ibcon#about to read 4, iclass 5, count 0 2006.229.13:02:43.19#ibcon#read 4, iclass 5, count 0 2006.229.13:02:43.19#ibcon#about to read 5, iclass 5, count 0 2006.229.13:02:43.19#ibcon#read 5, iclass 5, count 0 2006.229.13:02:43.19#ibcon#about to read 6, iclass 5, count 0 2006.229.13:02:43.19#ibcon#read 6, iclass 5, count 0 2006.229.13:02:43.19#ibcon#end of sib2, iclass 5, count 0 2006.229.13:02:43.19#ibcon#*after write, iclass 5, count 0 2006.229.13:02:43.19#ibcon#*before return 0, iclass 5, count 0 2006.229.13:02:43.19#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:02:43.19#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:02:43.19#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:02:43.19#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:02:43.19$vck44/vblo=2,634.99 2006.229.13:02:43.19#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:02:43.19#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:02:43.19#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:43.19#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:43.19#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:43.19#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:43.19#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:02:43.19#ibcon#first serial, iclass 7, count 0 2006.229.13:02:43.19#ibcon#enter sib2, iclass 7, count 0 2006.229.13:02:43.19#ibcon#flushed, iclass 7, count 0 2006.229.13:02:43.19#ibcon#about to write, iclass 7, count 0 2006.229.13:02:43.19#ibcon#wrote, iclass 7, count 0 2006.229.13:02:43.19#ibcon#about to read 3, iclass 7, count 0 2006.229.13:02:43.21#ibcon#read 3, iclass 7, count 0 2006.229.13:02:43.21#ibcon#about to read 4, iclass 7, count 0 2006.229.13:02:43.21#ibcon#read 4, iclass 7, count 0 2006.229.13:02:43.21#ibcon#about to read 5, iclass 7, count 0 2006.229.13:02:43.21#ibcon#read 5, iclass 7, count 0 2006.229.13:02:43.21#ibcon#about to read 6, iclass 7, count 0 2006.229.13:02:43.21#ibcon#read 6, iclass 7, count 0 2006.229.13:02:43.21#ibcon#end of sib2, iclass 7, count 0 2006.229.13:02:43.21#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:02:43.21#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:02:43.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:02:43.21#ibcon#*before write, iclass 7, count 0 2006.229.13:02:43.21#ibcon#enter sib2, iclass 7, count 0 2006.229.13:02:43.21#ibcon#flushed, iclass 7, count 0 2006.229.13:02:43.21#ibcon#about to write, iclass 7, count 0 2006.229.13:02:43.21#ibcon#wrote, iclass 7, count 0 2006.229.13:02:43.21#ibcon#about to read 3, iclass 7, count 0 2006.229.13:02:43.25#ibcon#read 3, iclass 7, count 0 2006.229.13:02:43.25#ibcon#about to read 4, iclass 7, count 0 2006.229.13:02:43.25#ibcon#read 4, iclass 7, count 0 2006.229.13:02:43.25#ibcon#about to read 5, iclass 7, count 0 2006.229.13:02:43.25#ibcon#read 5, iclass 7, count 0 2006.229.13:02:43.25#ibcon#about to read 6, iclass 7, count 0 2006.229.13:02:43.25#ibcon#read 6, iclass 7, count 0 2006.229.13:02:43.25#ibcon#end of sib2, iclass 7, count 0 2006.229.13:02:43.25#ibcon#*after write, iclass 7, count 0 2006.229.13:02:43.25#ibcon#*before return 0, iclass 7, count 0 2006.229.13:02:43.25#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:43.25#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:02:43.25#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:02:43.25#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:02:43.25$vck44/vb=2,4 2006.229.13:02:43.25#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.13:02:43.25#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.13:02:43.25#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:43.25#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:43.31#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:43.31#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:43.31#ibcon#enter wrdev, iclass 11, count 2 2006.229.13:02:43.31#ibcon#first serial, iclass 11, count 2 2006.229.13:02:43.31#ibcon#enter sib2, iclass 11, count 2 2006.229.13:02:43.31#ibcon#flushed, iclass 11, count 2 2006.229.13:02:43.31#ibcon#about to write, iclass 11, count 2 2006.229.13:02:43.31#ibcon#wrote, iclass 11, count 2 2006.229.13:02:43.31#ibcon#about to read 3, iclass 11, count 2 2006.229.13:02:43.33#ibcon#read 3, iclass 11, count 2 2006.229.13:02:43.33#ibcon#about to read 4, iclass 11, count 2 2006.229.13:02:43.33#ibcon#read 4, iclass 11, count 2 2006.229.13:02:43.33#ibcon#about to read 5, iclass 11, count 2 2006.229.13:02:43.33#ibcon#read 5, iclass 11, count 2 2006.229.13:02:43.33#ibcon#about to read 6, iclass 11, count 2 2006.229.13:02:43.33#ibcon#read 6, iclass 11, count 2 2006.229.13:02:43.33#ibcon#end of sib2, iclass 11, count 2 2006.229.13:02:43.33#ibcon#*mode == 0, iclass 11, count 2 2006.229.13:02:43.33#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.13:02:43.33#ibcon#[27=AT02-04\r\n] 2006.229.13:02:43.33#ibcon#*before write, iclass 11, count 2 2006.229.13:02:43.33#ibcon#enter sib2, iclass 11, count 2 2006.229.13:02:43.33#ibcon#flushed, iclass 11, count 2 2006.229.13:02:43.33#ibcon#about to write, iclass 11, count 2 2006.229.13:02:43.33#ibcon#wrote, iclass 11, count 2 2006.229.13:02:43.33#ibcon#about to read 3, iclass 11, count 2 2006.229.13:02:43.36#ibcon#read 3, iclass 11, count 2 2006.229.13:02:43.36#ibcon#about to read 4, iclass 11, count 2 2006.229.13:02:43.36#ibcon#read 4, iclass 11, count 2 2006.229.13:02:43.36#ibcon#about to read 5, iclass 11, count 2 2006.229.13:02:43.36#ibcon#read 5, iclass 11, count 2 2006.229.13:02:43.36#ibcon#about to read 6, iclass 11, count 2 2006.229.13:02:43.36#ibcon#read 6, iclass 11, count 2 2006.229.13:02:43.36#ibcon#end of sib2, iclass 11, count 2 2006.229.13:02:43.36#ibcon#*after write, iclass 11, count 2 2006.229.13:02:43.36#ibcon#*before return 0, iclass 11, count 2 2006.229.13:02:43.36#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:43.36#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:02:43.36#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.13:02:43.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:43.36#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:43.48#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:43.48#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:43.48#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:02:43.48#ibcon#first serial, iclass 11, count 0 2006.229.13:02:43.48#ibcon#enter sib2, iclass 11, count 0 2006.229.13:02:43.48#ibcon#flushed, iclass 11, count 0 2006.229.13:02:43.48#ibcon#about to write, iclass 11, count 0 2006.229.13:02:43.48#ibcon#wrote, iclass 11, count 0 2006.229.13:02:43.48#ibcon#about to read 3, iclass 11, count 0 2006.229.13:02:43.50#ibcon#read 3, iclass 11, count 0 2006.229.13:02:43.50#ibcon#about to read 4, iclass 11, count 0 2006.229.13:02:43.50#ibcon#read 4, iclass 11, count 0 2006.229.13:02:43.50#ibcon#about to read 5, iclass 11, count 0 2006.229.13:02:43.50#ibcon#read 5, iclass 11, count 0 2006.229.13:02:43.50#ibcon#about to read 6, iclass 11, count 0 2006.229.13:02:43.50#ibcon#read 6, iclass 11, count 0 2006.229.13:02:43.50#ibcon#end of sib2, iclass 11, count 0 2006.229.13:02:43.50#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:02:43.50#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:02:43.50#ibcon#[27=USB\r\n] 2006.229.13:02:43.50#ibcon#*before write, iclass 11, count 0 2006.229.13:02:43.50#ibcon#enter sib2, iclass 11, count 0 2006.229.13:02:43.50#ibcon#flushed, iclass 11, count 0 2006.229.13:02:43.50#ibcon#about to write, iclass 11, count 0 2006.229.13:02:43.50#ibcon#wrote, iclass 11, count 0 2006.229.13:02:43.50#ibcon#about to read 3, iclass 11, count 0 2006.229.13:02:43.53#ibcon#read 3, iclass 11, count 0 2006.229.13:02:43.53#ibcon#about to read 4, iclass 11, count 0 2006.229.13:02:43.53#ibcon#read 4, iclass 11, count 0 2006.229.13:02:43.53#ibcon#about to read 5, iclass 11, count 0 2006.229.13:02:43.53#ibcon#read 5, iclass 11, count 0 2006.229.13:02:43.53#ibcon#about to read 6, iclass 11, count 0 2006.229.13:02:43.53#ibcon#read 6, iclass 11, count 0 2006.229.13:02:43.53#ibcon#end of sib2, iclass 11, count 0 2006.229.13:02:43.53#ibcon#*after write, iclass 11, count 0 2006.229.13:02:43.53#ibcon#*before return 0, iclass 11, count 0 2006.229.13:02:43.53#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:43.53#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:02:43.53#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:02:43.53#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:02:43.53$vck44/vblo=3,649.99 2006.229.13:02:43.53#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:02:43.53#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:02:43.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:43.53#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:43.53#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:43.53#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:43.53#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:02:43.53#ibcon#first serial, iclass 13, count 0 2006.229.13:02:43.53#ibcon#enter sib2, iclass 13, count 0 2006.229.13:02:43.53#ibcon#flushed, iclass 13, count 0 2006.229.13:02:43.53#ibcon#about to write, iclass 13, count 0 2006.229.13:02:43.53#ibcon#wrote, iclass 13, count 0 2006.229.13:02:43.53#ibcon#about to read 3, iclass 13, count 0 2006.229.13:02:43.55#ibcon#read 3, iclass 13, count 0 2006.229.13:02:43.55#ibcon#about to read 4, iclass 13, count 0 2006.229.13:02:43.55#ibcon#read 4, iclass 13, count 0 2006.229.13:02:43.55#ibcon#about to read 5, iclass 13, count 0 2006.229.13:02:43.55#ibcon#read 5, iclass 13, count 0 2006.229.13:02:43.55#ibcon#about to read 6, iclass 13, count 0 2006.229.13:02:43.55#ibcon#read 6, iclass 13, count 0 2006.229.13:02:43.55#ibcon#end of sib2, iclass 13, count 0 2006.229.13:02:43.55#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:02:43.55#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:02:43.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:02:43.55#ibcon#*before write, iclass 13, count 0 2006.229.13:02:43.55#ibcon#enter sib2, iclass 13, count 0 2006.229.13:02:43.55#ibcon#flushed, iclass 13, count 0 2006.229.13:02:43.55#ibcon#about to write, iclass 13, count 0 2006.229.13:02:43.55#ibcon#wrote, iclass 13, count 0 2006.229.13:02:43.55#ibcon#about to read 3, iclass 13, count 0 2006.229.13:02:43.59#ibcon#read 3, iclass 13, count 0 2006.229.13:02:43.59#ibcon#about to read 4, iclass 13, count 0 2006.229.13:02:43.59#ibcon#read 4, iclass 13, count 0 2006.229.13:02:43.59#ibcon#about to read 5, iclass 13, count 0 2006.229.13:02:43.59#ibcon#read 5, iclass 13, count 0 2006.229.13:02:43.59#ibcon#about to read 6, iclass 13, count 0 2006.229.13:02:43.59#ibcon#read 6, iclass 13, count 0 2006.229.13:02:43.59#ibcon#end of sib2, iclass 13, count 0 2006.229.13:02:43.59#ibcon#*after write, iclass 13, count 0 2006.229.13:02:43.59#ibcon#*before return 0, iclass 13, count 0 2006.229.13:02:43.59#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:43.59#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:02:43.59#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:02:43.59#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:02:43.59$vck44/vb=3,4 2006.229.13:02:43.59#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.13:02:43.59#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.13:02:43.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:43.59#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:43.65#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:43.65#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:43.65#ibcon#enter wrdev, iclass 15, count 2 2006.229.13:02:43.65#ibcon#first serial, iclass 15, count 2 2006.229.13:02:43.65#ibcon#enter sib2, iclass 15, count 2 2006.229.13:02:43.65#ibcon#flushed, iclass 15, count 2 2006.229.13:02:43.65#ibcon#about to write, iclass 15, count 2 2006.229.13:02:43.65#ibcon#wrote, iclass 15, count 2 2006.229.13:02:43.65#ibcon#about to read 3, iclass 15, count 2 2006.229.13:02:43.67#ibcon#read 3, iclass 15, count 2 2006.229.13:02:43.67#ibcon#about to read 4, iclass 15, count 2 2006.229.13:02:43.67#ibcon#read 4, iclass 15, count 2 2006.229.13:02:43.67#ibcon#about to read 5, iclass 15, count 2 2006.229.13:02:43.67#ibcon#read 5, iclass 15, count 2 2006.229.13:02:43.67#ibcon#about to read 6, iclass 15, count 2 2006.229.13:02:43.67#ibcon#read 6, iclass 15, count 2 2006.229.13:02:43.67#ibcon#end of sib2, iclass 15, count 2 2006.229.13:02:43.67#ibcon#*mode == 0, iclass 15, count 2 2006.229.13:02:43.67#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.13:02:43.67#ibcon#[27=AT03-04\r\n] 2006.229.13:02:43.67#ibcon#*before write, iclass 15, count 2 2006.229.13:02:43.67#ibcon#enter sib2, iclass 15, count 2 2006.229.13:02:43.67#ibcon#flushed, iclass 15, count 2 2006.229.13:02:43.67#ibcon#about to write, iclass 15, count 2 2006.229.13:02:43.67#ibcon#wrote, iclass 15, count 2 2006.229.13:02:43.67#ibcon#about to read 3, iclass 15, count 2 2006.229.13:02:43.70#ibcon#read 3, iclass 15, count 2 2006.229.13:02:43.70#ibcon#about to read 4, iclass 15, count 2 2006.229.13:02:43.70#ibcon#read 4, iclass 15, count 2 2006.229.13:02:43.70#ibcon#about to read 5, iclass 15, count 2 2006.229.13:02:43.70#ibcon#read 5, iclass 15, count 2 2006.229.13:02:43.70#ibcon#about to read 6, iclass 15, count 2 2006.229.13:02:43.70#ibcon#read 6, iclass 15, count 2 2006.229.13:02:43.70#ibcon#end of sib2, iclass 15, count 2 2006.229.13:02:43.70#ibcon#*after write, iclass 15, count 2 2006.229.13:02:43.70#ibcon#*before return 0, iclass 15, count 2 2006.229.13:02:43.70#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:43.70#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:02:43.70#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.13:02:43.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:43.70#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:43.82#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:43.82#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:43.82#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:02:43.82#ibcon#first serial, iclass 15, count 0 2006.229.13:02:43.82#ibcon#enter sib2, iclass 15, count 0 2006.229.13:02:43.82#ibcon#flushed, iclass 15, count 0 2006.229.13:02:43.82#ibcon#about to write, iclass 15, count 0 2006.229.13:02:43.82#ibcon#wrote, iclass 15, count 0 2006.229.13:02:43.82#ibcon#about to read 3, iclass 15, count 0 2006.229.13:02:43.84#ibcon#read 3, iclass 15, count 0 2006.229.13:02:43.84#ibcon#about to read 4, iclass 15, count 0 2006.229.13:02:43.84#ibcon#read 4, iclass 15, count 0 2006.229.13:02:43.84#ibcon#about to read 5, iclass 15, count 0 2006.229.13:02:43.84#ibcon#read 5, iclass 15, count 0 2006.229.13:02:43.84#ibcon#about to read 6, iclass 15, count 0 2006.229.13:02:43.84#ibcon#read 6, iclass 15, count 0 2006.229.13:02:43.84#ibcon#end of sib2, iclass 15, count 0 2006.229.13:02:43.84#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:02:43.84#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:02:43.84#ibcon#[27=USB\r\n] 2006.229.13:02:43.84#ibcon#*before write, iclass 15, count 0 2006.229.13:02:43.84#ibcon#enter sib2, iclass 15, count 0 2006.229.13:02:43.84#ibcon#flushed, iclass 15, count 0 2006.229.13:02:43.84#ibcon#about to write, iclass 15, count 0 2006.229.13:02:43.84#ibcon#wrote, iclass 15, count 0 2006.229.13:02:43.84#ibcon#about to read 3, iclass 15, count 0 2006.229.13:02:43.87#ibcon#read 3, iclass 15, count 0 2006.229.13:02:43.87#ibcon#about to read 4, iclass 15, count 0 2006.229.13:02:43.87#ibcon#read 4, iclass 15, count 0 2006.229.13:02:43.87#ibcon#about to read 5, iclass 15, count 0 2006.229.13:02:43.87#ibcon#read 5, iclass 15, count 0 2006.229.13:02:43.87#ibcon#about to read 6, iclass 15, count 0 2006.229.13:02:43.87#ibcon#read 6, iclass 15, count 0 2006.229.13:02:43.87#ibcon#end of sib2, iclass 15, count 0 2006.229.13:02:43.87#ibcon#*after write, iclass 15, count 0 2006.229.13:02:43.87#ibcon#*before return 0, iclass 15, count 0 2006.229.13:02:43.87#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:43.87#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:02:43.87#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:02:43.87#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:02:43.87$vck44/vblo=4,679.99 2006.229.13:02:43.87#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.13:02:43.87#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.13:02:43.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:43.87#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:43.87#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:43.87#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:43.87#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:02:43.87#ibcon#first serial, iclass 17, count 0 2006.229.13:02:43.87#ibcon#enter sib2, iclass 17, count 0 2006.229.13:02:43.87#ibcon#flushed, iclass 17, count 0 2006.229.13:02:43.87#ibcon#about to write, iclass 17, count 0 2006.229.13:02:43.87#ibcon#wrote, iclass 17, count 0 2006.229.13:02:43.87#ibcon#about to read 3, iclass 17, count 0 2006.229.13:02:43.89#ibcon#read 3, iclass 17, count 0 2006.229.13:02:43.89#ibcon#about to read 4, iclass 17, count 0 2006.229.13:02:43.89#ibcon#read 4, iclass 17, count 0 2006.229.13:02:43.89#ibcon#about to read 5, iclass 17, count 0 2006.229.13:02:43.89#ibcon#read 5, iclass 17, count 0 2006.229.13:02:43.89#ibcon#about to read 6, iclass 17, count 0 2006.229.13:02:43.89#ibcon#read 6, iclass 17, count 0 2006.229.13:02:43.89#ibcon#end of sib2, iclass 17, count 0 2006.229.13:02:43.89#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:02:43.89#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:02:43.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:02:43.89#ibcon#*before write, iclass 17, count 0 2006.229.13:02:43.89#ibcon#enter sib2, iclass 17, count 0 2006.229.13:02:43.89#ibcon#flushed, iclass 17, count 0 2006.229.13:02:43.89#ibcon#about to write, iclass 17, count 0 2006.229.13:02:43.89#ibcon#wrote, iclass 17, count 0 2006.229.13:02:43.89#ibcon#about to read 3, iclass 17, count 0 2006.229.13:02:43.93#ibcon#read 3, iclass 17, count 0 2006.229.13:02:43.93#ibcon#about to read 4, iclass 17, count 0 2006.229.13:02:43.93#ibcon#read 4, iclass 17, count 0 2006.229.13:02:43.93#ibcon#about to read 5, iclass 17, count 0 2006.229.13:02:43.93#ibcon#read 5, iclass 17, count 0 2006.229.13:02:43.93#ibcon#about to read 6, iclass 17, count 0 2006.229.13:02:43.93#ibcon#read 6, iclass 17, count 0 2006.229.13:02:43.93#ibcon#end of sib2, iclass 17, count 0 2006.229.13:02:43.93#ibcon#*after write, iclass 17, count 0 2006.229.13:02:43.93#ibcon#*before return 0, iclass 17, count 0 2006.229.13:02:43.93#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:43.93#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:02:43.93#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:02:43.93#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:02:43.93$vck44/vb=4,4 2006.229.13:02:43.93#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.13:02:43.93#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.13:02:43.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:43.93#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:43.99#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:43.99#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:43.99#ibcon#enter wrdev, iclass 19, count 2 2006.229.13:02:43.99#ibcon#first serial, iclass 19, count 2 2006.229.13:02:43.99#ibcon#enter sib2, iclass 19, count 2 2006.229.13:02:43.99#ibcon#flushed, iclass 19, count 2 2006.229.13:02:43.99#ibcon#about to write, iclass 19, count 2 2006.229.13:02:43.99#ibcon#wrote, iclass 19, count 2 2006.229.13:02:43.99#ibcon#about to read 3, iclass 19, count 2 2006.229.13:02:44.01#ibcon#read 3, iclass 19, count 2 2006.229.13:02:44.01#ibcon#about to read 4, iclass 19, count 2 2006.229.13:02:44.01#ibcon#read 4, iclass 19, count 2 2006.229.13:02:44.01#ibcon#about to read 5, iclass 19, count 2 2006.229.13:02:44.01#ibcon#read 5, iclass 19, count 2 2006.229.13:02:44.01#ibcon#about to read 6, iclass 19, count 2 2006.229.13:02:44.01#ibcon#read 6, iclass 19, count 2 2006.229.13:02:44.01#ibcon#end of sib2, iclass 19, count 2 2006.229.13:02:44.01#ibcon#*mode == 0, iclass 19, count 2 2006.229.13:02:44.01#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.13:02:44.01#ibcon#[27=AT04-04\r\n] 2006.229.13:02:44.01#ibcon#*before write, iclass 19, count 2 2006.229.13:02:44.01#ibcon#enter sib2, iclass 19, count 2 2006.229.13:02:44.01#ibcon#flushed, iclass 19, count 2 2006.229.13:02:44.01#ibcon#about to write, iclass 19, count 2 2006.229.13:02:44.01#ibcon#wrote, iclass 19, count 2 2006.229.13:02:44.01#ibcon#about to read 3, iclass 19, count 2 2006.229.13:02:44.04#ibcon#read 3, iclass 19, count 2 2006.229.13:02:44.04#ibcon#about to read 4, iclass 19, count 2 2006.229.13:02:44.04#ibcon#read 4, iclass 19, count 2 2006.229.13:02:44.04#ibcon#about to read 5, iclass 19, count 2 2006.229.13:02:44.04#ibcon#read 5, iclass 19, count 2 2006.229.13:02:44.04#ibcon#about to read 6, iclass 19, count 2 2006.229.13:02:44.04#ibcon#read 6, iclass 19, count 2 2006.229.13:02:44.04#ibcon#end of sib2, iclass 19, count 2 2006.229.13:02:44.04#ibcon#*after write, iclass 19, count 2 2006.229.13:02:44.04#ibcon#*before return 0, iclass 19, count 2 2006.229.13:02:44.04#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:44.04#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:02:44.04#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.13:02:44.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:44.04#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:44.16#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:44.16#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:44.16#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:02:44.16#ibcon#first serial, iclass 19, count 0 2006.229.13:02:44.16#ibcon#enter sib2, iclass 19, count 0 2006.229.13:02:44.16#ibcon#flushed, iclass 19, count 0 2006.229.13:02:44.16#ibcon#about to write, iclass 19, count 0 2006.229.13:02:44.16#ibcon#wrote, iclass 19, count 0 2006.229.13:02:44.16#ibcon#about to read 3, iclass 19, count 0 2006.229.13:02:44.18#ibcon#read 3, iclass 19, count 0 2006.229.13:02:44.18#ibcon#about to read 4, iclass 19, count 0 2006.229.13:02:44.18#ibcon#read 4, iclass 19, count 0 2006.229.13:02:44.18#ibcon#about to read 5, iclass 19, count 0 2006.229.13:02:44.18#ibcon#read 5, iclass 19, count 0 2006.229.13:02:44.18#ibcon#about to read 6, iclass 19, count 0 2006.229.13:02:44.18#ibcon#read 6, iclass 19, count 0 2006.229.13:02:44.18#ibcon#end of sib2, iclass 19, count 0 2006.229.13:02:44.18#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:02:44.18#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:02:44.18#ibcon#[27=USB\r\n] 2006.229.13:02:44.18#ibcon#*before write, iclass 19, count 0 2006.229.13:02:44.18#ibcon#enter sib2, iclass 19, count 0 2006.229.13:02:44.18#ibcon#flushed, iclass 19, count 0 2006.229.13:02:44.18#ibcon#about to write, iclass 19, count 0 2006.229.13:02:44.18#ibcon#wrote, iclass 19, count 0 2006.229.13:02:44.18#ibcon#about to read 3, iclass 19, count 0 2006.229.13:02:44.21#ibcon#read 3, iclass 19, count 0 2006.229.13:02:44.21#ibcon#about to read 4, iclass 19, count 0 2006.229.13:02:44.21#ibcon#read 4, iclass 19, count 0 2006.229.13:02:44.21#ibcon#about to read 5, iclass 19, count 0 2006.229.13:02:44.21#ibcon#read 5, iclass 19, count 0 2006.229.13:02:44.21#ibcon#about to read 6, iclass 19, count 0 2006.229.13:02:44.21#ibcon#read 6, iclass 19, count 0 2006.229.13:02:44.21#ibcon#end of sib2, iclass 19, count 0 2006.229.13:02:44.21#ibcon#*after write, iclass 19, count 0 2006.229.13:02:44.21#ibcon#*before return 0, iclass 19, count 0 2006.229.13:02:44.21#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:44.21#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:02:44.21#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:02:44.21#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:02:44.21$vck44/vblo=5,709.99 2006.229.13:02:44.21#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.13:02:44.21#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.13:02:44.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:44.21#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:44.21#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:44.21#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:44.21#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:02:44.21#ibcon#first serial, iclass 21, count 0 2006.229.13:02:44.21#ibcon#enter sib2, iclass 21, count 0 2006.229.13:02:44.21#ibcon#flushed, iclass 21, count 0 2006.229.13:02:44.21#ibcon#about to write, iclass 21, count 0 2006.229.13:02:44.21#ibcon#wrote, iclass 21, count 0 2006.229.13:02:44.21#ibcon#about to read 3, iclass 21, count 0 2006.229.13:02:44.23#ibcon#read 3, iclass 21, count 0 2006.229.13:02:44.23#ibcon#about to read 4, iclass 21, count 0 2006.229.13:02:44.23#ibcon#read 4, iclass 21, count 0 2006.229.13:02:44.23#ibcon#about to read 5, iclass 21, count 0 2006.229.13:02:44.23#ibcon#read 5, iclass 21, count 0 2006.229.13:02:44.23#ibcon#about to read 6, iclass 21, count 0 2006.229.13:02:44.23#ibcon#read 6, iclass 21, count 0 2006.229.13:02:44.23#ibcon#end of sib2, iclass 21, count 0 2006.229.13:02:44.23#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:02:44.23#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:02:44.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:02:44.23#ibcon#*before write, iclass 21, count 0 2006.229.13:02:44.23#ibcon#enter sib2, iclass 21, count 0 2006.229.13:02:44.23#ibcon#flushed, iclass 21, count 0 2006.229.13:02:44.23#ibcon#about to write, iclass 21, count 0 2006.229.13:02:44.23#ibcon#wrote, iclass 21, count 0 2006.229.13:02:44.23#ibcon#about to read 3, iclass 21, count 0 2006.229.13:02:44.27#ibcon#read 3, iclass 21, count 0 2006.229.13:02:44.27#ibcon#about to read 4, iclass 21, count 0 2006.229.13:02:44.27#ibcon#read 4, iclass 21, count 0 2006.229.13:02:44.27#ibcon#about to read 5, iclass 21, count 0 2006.229.13:02:44.27#ibcon#read 5, iclass 21, count 0 2006.229.13:02:44.27#ibcon#about to read 6, iclass 21, count 0 2006.229.13:02:44.27#ibcon#read 6, iclass 21, count 0 2006.229.13:02:44.27#ibcon#end of sib2, iclass 21, count 0 2006.229.13:02:44.27#ibcon#*after write, iclass 21, count 0 2006.229.13:02:44.27#ibcon#*before return 0, iclass 21, count 0 2006.229.13:02:44.27#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:44.27#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:02:44.27#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:02:44.27#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:02:44.27$vck44/vb=5,4 2006.229.13:02:44.27#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.13:02:44.27#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.13:02:44.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:44.27#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:44.33#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:44.33#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:44.33#ibcon#enter wrdev, iclass 23, count 2 2006.229.13:02:44.33#ibcon#first serial, iclass 23, count 2 2006.229.13:02:44.33#ibcon#enter sib2, iclass 23, count 2 2006.229.13:02:44.33#ibcon#flushed, iclass 23, count 2 2006.229.13:02:44.33#ibcon#about to write, iclass 23, count 2 2006.229.13:02:44.33#ibcon#wrote, iclass 23, count 2 2006.229.13:02:44.33#ibcon#about to read 3, iclass 23, count 2 2006.229.13:02:44.35#ibcon#read 3, iclass 23, count 2 2006.229.13:02:44.35#ibcon#about to read 4, iclass 23, count 2 2006.229.13:02:44.35#ibcon#read 4, iclass 23, count 2 2006.229.13:02:44.35#ibcon#about to read 5, iclass 23, count 2 2006.229.13:02:44.35#ibcon#read 5, iclass 23, count 2 2006.229.13:02:44.35#ibcon#about to read 6, iclass 23, count 2 2006.229.13:02:44.35#ibcon#read 6, iclass 23, count 2 2006.229.13:02:44.35#ibcon#end of sib2, iclass 23, count 2 2006.229.13:02:44.35#ibcon#*mode == 0, iclass 23, count 2 2006.229.13:02:44.35#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.13:02:44.35#ibcon#[27=AT05-04\r\n] 2006.229.13:02:44.35#ibcon#*before write, iclass 23, count 2 2006.229.13:02:44.35#ibcon#enter sib2, iclass 23, count 2 2006.229.13:02:44.35#ibcon#flushed, iclass 23, count 2 2006.229.13:02:44.35#ibcon#about to write, iclass 23, count 2 2006.229.13:02:44.35#ibcon#wrote, iclass 23, count 2 2006.229.13:02:44.35#ibcon#about to read 3, iclass 23, count 2 2006.229.13:02:44.38#ibcon#read 3, iclass 23, count 2 2006.229.13:02:44.38#ibcon#about to read 4, iclass 23, count 2 2006.229.13:02:44.38#ibcon#read 4, iclass 23, count 2 2006.229.13:02:44.38#ibcon#about to read 5, iclass 23, count 2 2006.229.13:02:44.38#ibcon#read 5, iclass 23, count 2 2006.229.13:02:44.38#ibcon#about to read 6, iclass 23, count 2 2006.229.13:02:44.38#ibcon#read 6, iclass 23, count 2 2006.229.13:02:44.38#ibcon#end of sib2, iclass 23, count 2 2006.229.13:02:44.38#ibcon#*after write, iclass 23, count 2 2006.229.13:02:44.38#ibcon#*before return 0, iclass 23, count 2 2006.229.13:02:44.38#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:44.38#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:02:44.38#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.13:02:44.38#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:44.38#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:44.50#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:44.50#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:44.50#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:02:44.50#ibcon#first serial, iclass 23, count 0 2006.229.13:02:44.50#ibcon#enter sib2, iclass 23, count 0 2006.229.13:02:44.50#ibcon#flushed, iclass 23, count 0 2006.229.13:02:44.50#ibcon#about to write, iclass 23, count 0 2006.229.13:02:44.50#ibcon#wrote, iclass 23, count 0 2006.229.13:02:44.50#ibcon#about to read 3, iclass 23, count 0 2006.229.13:02:44.52#ibcon#read 3, iclass 23, count 0 2006.229.13:02:44.52#ibcon#about to read 4, iclass 23, count 0 2006.229.13:02:44.52#ibcon#read 4, iclass 23, count 0 2006.229.13:02:44.52#ibcon#about to read 5, iclass 23, count 0 2006.229.13:02:44.52#ibcon#read 5, iclass 23, count 0 2006.229.13:02:44.52#ibcon#about to read 6, iclass 23, count 0 2006.229.13:02:44.52#ibcon#read 6, iclass 23, count 0 2006.229.13:02:44.52#ibcon#end of sib2, iclass 23, count 0 2006.229.13:02:44.52#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:02:44.52#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:02:44.52#ibcon#[27=USB\r\n] 2006.229.13:02:44.52#ibcon#*before write, iclass 23, count 0 2006.229.13:02:44.52#ibcon#enter sib2, iclass 23, count 0 2006.229.13:02:44.52#ibcon#flushed, iclass 23, count 0 2006.229.13:02:44.52#ibcon#about to write, iclass 23, count 0 2006.229.13:02:44.52#ibcon#wrote, iclass 23, count 0 2006.229.13:02:44.52#ibcon#about to read 3, iclass 23, count 0 2006.229.13:02:44.55#ibcon#read 3, iclass 23, count 0 2006.229.13:02:44.55#ibcon#about to read 4, iclass 23, count 0 2006.229.13:02:44.55#ibcon#read 4, iclass 23, count 0 2006.229.13:02:44.55#ibcon#about to read 5, iclass 23, count 0 2006.229.13:02:44.55#ibcon#read 5, iclass 23, count 0 2006.229.13:02:44.55#ibcon#about to read 6, iclass 23, count 0 2006.229.13:02:44.55#ibcon#read 6, iclass 23, count 0 2006.229.13:02:44.55#ibcon#end of sib2, iclass 23, count 0 2006.229.13:02:44.55#ibcon#*after write, iclass 23, count 0 2006.229.13:02:44.55#ibcon#*before return 0, iclass 23, count 0 2006.229.13:02:44.55#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:44.55#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:02:44.55#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:02:44.55#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:02:44.55$vck44/vblo=6,719.99 2006.229.13:02:44.55#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.13:02:44.55#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.13:02:44.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:44.55#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:44.55#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:44.55#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:44.55#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:02:44.55#ibcon#first serial, iclass 25, count 0 2006.229.13:02:44.55#ibcon#enter sib2, iclass 25, count 0 2006.229.13:02:44.55#ibcon#flushed, iclass 25, count 0 2006.229.13:02:44.55#ibcon#about to write, iclass 25, count 0 2006.229.13:02:44.55#ibcon#wrote, iclass 25, count 0 2006.229.13:02:44.55#ibcon#about to read 3, iclass 25, count 0 2006.229.13:02:44.57#ibcon#read 3, iclass 25, count 0 2006.229.13:02:44.57#ibcon#about to read 4, iclass 25, count 0 2006.229.13:02:44.57#ibcon#read 4, iclass 25, count 0 2006.229.13:02:44.57#ibcon#about to read 5, iclass 25, count 0 2006.229.13:02:44.57#ibcon#read 5, iclass 25, count 0 2006.229.13:02:44.57#ibcon#about to read 6, iclass 25, count 0 2006.229.13:02:44.57#ibcon#read 6, iclass 25, count 0 2006.229.13:02:44.57#ibcon#end of sib2, iclass 25, count 0 2006.229.13:02:44.57#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:02:44.57#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:02:44.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:02:44.57#ibcon#*before write, iclass 25, count 0 2006.229.13:02:44.57#ibcon#enter sib2, iclass 25, count 0 2006.229.13:02:44.57#ibcon#flushed, iclass 25, count 0 2006.229.13:02:44.57#ibcon#about to write, iclass 25, count 0 2006.229.13:02:44.57#ibcon#wrote, iclass 25, count 0 2006.229.13:02:44.57#ibcon#about to read 3, iclass 25, count 0 2006.229.13:02:44.61#ibcon#read 3, iclass 25, count 0 2006.229.13:02:44.61#ibcon#about to read 4, iclass 25, count 0 2006.229.13:02:44.61#ibcon#read 4, iclass 25, count 0 2006.229.13:02:44.61#ibcon#about to read 5, iclass 25, count 0 2006.229.13:02:44.61#ibcon#read 5, iclass 25, count 0 2006.229.13:02:44.61#ibcon#about to read 6, iclass 25, count 0 2006.229.13:02:44.61#ibcon#read 6, iclass 25, count 0 2006.229.13:02:44.61#ibcon#end of sib2, iclass 25, count 0 2006.229.13:02:44.61#ibcon#*after write, iclass 25, count 0 2006.229.13:02:44.61#ibcon#*before return 0, iclass 25, count 0 2006.229.13:02:44.61#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:44.61#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:02:44.61#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:02:44.61#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:02:44.61$vck44/vb=6,4 2006.229.13:02:44.61#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.13:02:44.61#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.13:02:44.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:44.61#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:44.67#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:44.67#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:44.67#ibcon#enter wrdev, iclass 27, count 2 2006.229.13:02:44.67#ibcon#first serial, iclass 27, count 2 2006.229.13:02:44.67#ibcon#enter sib2, iclass 27, count 2 2006.229.13:02:44.67#ibcon#flushed, iclass 27, count 2 2006.229.13:02:44.67#ibcon#about to write, iclass 27, count 2 2006.229.13:02:44.67#ibcon#wrote, iclass 27, count 2 2006.229.13:02:44.67#ibcon#about to read 3, iclass 27, count 2 2006.229.13:02:44.69#ibcon#read 3, iclass 27, count 2 2006.229.13:02:44.69#ibcon#about to read 4, iclass 27, count 2 2006.229.13:02:44.69#ibcon#read 4, iclass 27, count 2 2006.229.13:02:44.69#ibcon#about to read 5, iclass 27, count 2 2006.229.13:02:44.69#ibcon#read 5, iclass 27, count 2 2006.229.13:02:44.69#ibcon#about to read 6, iclass 27, count 2 2006.229.13:02:44.69#ibcon#read 6, iclass 27, count 2 2006.229.13:02:44.69#ibcon#end of sib2, iclass 27, count 2 2006.229.13:02:44.69#ibcon#*mode == 0, iclass 27, count 2 2006.229.13:02:44.69#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.13:02:44.69#ibcon#[27=AT06-04\r\n] 2006.229.13:02:44.69#ibcon#*before write, iclass 27, count 2 2006.229.13:02:44.69#ibcon#enter sib2, iclass 27, count 2 2006.229.13:02:44.69#ibcon#flushed, iclass 27, count 2 2006.229.13:02:44.69#ibcon#about to write, iclass 27, count 2 2006.229.13:02:44.69#ibcon#wrote, iclass 27, count 2 2006.229.13:02:44.69#ibcon#about to read 3, iclass 27, count 2 2006.229.13:02:44.72#ibcon#read 3, iclass 27, count 2 2006.229.13:02:44.72#ibcon#about to read 4, iclass 27, count 2 2006.229.13:02:44.72#ibcon#read 4, iclass 27, count 2 2006.229.13:02:44.72#ibcon#about to read 5, iclass 27, count 2 2006.229.13:02:44.72#ibcon#read 5, iclass 27, count 2 2006.229.13:02:44.72#ibcon#about to read 6, iclass 27, count 2 2006.229.13:02:44.72#ibcon#read 6, iclass 27, count 2 2006.229.13:02:44.72#ibcon#end of sib2, iclass 27, count 2 2006.229.13:02:44.72#ibcon#*after write, iclass 27, count 2 2006.229.13:02:44.72#ibcon#*before return 0, iclass 27, count 2 2006.229.13:02:44.72#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:44.72#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:02:44.72#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.13:02:44.72#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:44.72#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:44.84#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:44.84#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:44.84#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:02:44.84#ibcon#first serial, iclass 27, count 0 2006.229.13:02:44.84#ibcon#enter sib2, iclass 27, count 0 2006.229.13:02:44.84#ibcon#flushed, iclass 27, count 0 2006.229.13:02:44.84#ibcon#about to write, iclass 27, count 0 2006.229.13:02:44.84#ibcon#wrote, iclass 27, count 0 2006.229.13:02:44.84#ibcon#about to read 3, iclass 27, count 0 2006.229.13:02:44.86#ibcon#read 3, iclass 27, count 0 2006.229.13:02:44.86#ibcon#about to read 4, iclass 27, count 0 2006.229.13:02:44.86#ibcon#read 4, iclass 27, count 0 2006.229.13:02:44.86#ibcon#about to read 5, iclass 27, count 0 2006.229.13:02:44.86#ibcon#read 5, iclass 27, count 0 2006.229.13:02:44.86#ibcon#about to read 6, iclass 27, count 0 2006.229.13:02:44.86#ibcon#read 6, iclass 27, count 0 2006.229.13:02:44.86#ibcon#end of sib2, iclass 27, count 0 2006.229.13:02:44.86#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:02:44.86#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:02:44.86#ibcon#[27=USB\r\n] 2006.229.13:02:44.86#ibcon#*before write, iclass 27, count 0 2006.229.13:02:44.86#ibcon#enter sib2, iclass 27, count 0 2006.229.13:02:44.86#ibcon#flushed, iclass 27, count 0 2006.229.13:02:44.86#ibcon#about to write, iclass 27, count 0 2006.229.13:02:44.86#ibcon#wrote, iclass 27, count 0 2006.229.13:02:44.86#ibcon#about to read 3, iclass 27, count 0 2006.229.13:02:44.89#ibcon#read 3, iclass 27, count 0 2006.229.13:02:44.89#ibcon#about to read 4, iclass 27, count 0 2006.229.13:02:44.89#ibcon#read 4, iclass 27, count 0 2006.229.13:02:44.89#ibcon#about to read 5, iclass 27, count 0 2006.229.13:02:44.89#ibcon#read 5, iclass 27, count 0 2006.229.13:02:44.89#ibcon#about to read 6, iclass 27, count 0 2006.229.13:02:44.89#ibcon#read 6, iclass 27, count 0 2006.229.13:02:44.89#ibcon#end of sib2, iclass 27, count 0 2006.229.13:02:44.89#ibcon#*after write, iclass 27, count 0 2006.229.13:02:44.89#ibcon#*before return 0, iclass 27, count 0 2006.229.13:02:44.89#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:44.89#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:02:44.89#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:02:44.89#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:02:44.89$vck44/vblo=7,734.99 2006.229.13:02:44.89#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:02:44.89#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:02:44.89#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:44.89#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:44.89#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:44.89#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:44.89#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:02:44.89#ibcon#first serial, iclass 29, count 0 2006.229.13:02:44.89#ibcon#enter sib2, iclass 29, count 0 2006.229.13:02:44.89#ibcon#flushed, iclass 29, count 0 2006.229.13:02:44.89#ibcon#about to write, iclass 29, count 0 2006.229.13:02:44.89#ibcon#wrote, iclass 29, count 0 2006.229.13:02:44.89#ibcon#about to read 3, iclass 29, count 0 2006.229.13:02:44.91#ibcon#read 3, iclass 29, count 0 2006.229.13:02:44.91#ibcon#about to read 4, iclass 29, count 0 2006.229.13:02:44.91#ibcon#read 4, iclass 29, count 0 2006.229.13:02:44.91#ibcon#about to read 5, iclass 29, count 0 2006.229.13:02:44.91#ibcon#read 5, iclass 29, count 0 2006.229.13:02:44.91#ibcon#about to read 6, iclass 29, count 0 2006.229.13:02:44.91#ibcon#read 6, iclass 29, count 0 2006.229.13:02:44.91#ibcon#end of sib2, iclass 29, count 0 2006.229.13:02:44.91#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:02:44.91#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:02:44.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:02:44.91#ibcon#*before write, iclass 29, count 0 2006.229.13:02:44.91#ibcon#enter sib2, iclass 29, count 0 2006.229.13:02:44.91#ibcon#flushed, iclass 29, count 0 2006.229.13:02:44.91#ibcon#about to write, iclass 29, count 0 2006.229.13:02:44.91#ibcon#wrote, iclass 29, count 0 2006.229.13:02:44.91#ibcon#about to read 3, iclass 29, count 0 2006.229.13:02:44.95#ibcon#read 3, iclass 29, count 0 2006.229.13:02:44.95#ibcon#about to read 4, iclass 29, count 0 2006.229.13:02:44.95#ibcon#read 4, iclass 29, count 0 2006.229.13:02:44.95#ibcon#about to read 5, iclass 29, count 0 2006.229.13:02:44.95#ibcon#read 5, iclass 29, count 0 2006.229.13:02:44.95#ibcon#about to read 6, iclass 29, count 0 2006.229.13:02:44.95#ibcon#read 6, iclass 29, count 0 2006.229.13:02:44.95#ibcon#end of sib2, iclass 29, count 0 2006.229.13:02:44.95#ibcon#*after write, iclass 29, count 0 2006.229.13:02:44.95#ibcon#*before return 0, iclass 29, count 0 2006.229.13:02:44.95#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:44.95#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:02:44.95#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:02:44.95#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:02:44.95$vck44/vb=7,4 2006.229.13:02:44.95#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.13:02:44.95#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.13:02:44.95#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:44.95#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:45.01#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:45.01#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:45.01#ibcon#enter wrdev, iclass 31, count 2 2006.229.13:02:45.01#ibcon#first serial, iclass 31, count 2 2006.229.13:02:45.01#ibcon#enter sib2, iclass 31, count 2 2006.229.13:02:45.01#ibcon#flushed, iclass 31, count 2 2006.229.13:02:45.01#ibcon#about to write, iclass 31, count 2 2006.229.13:02:45.01#ibcon#wrote, iclass 31, count 2 2006.229.13:02:45.01#ibcon#about to read 3, iclass 31, count 2 2006.229.13:02:45.03#ibcon#read 3, iclass 31, count 2 2006.229.13:02:45.03#ibcon#about to read 4, iclass 31, count 2 2006.229.13:02:45.03#ibcon#read 4, iclass 31, count 2 2006.229.13:02:45.03#ibcon#about to read 5, iclass 31, count 2 2006.229.13:02:45.03#ibcon#read 5, iclass 31, count 2 2006.229.13:02:45.03#ibcon#about to read 6, iclass 31, count 2 2006.229.13:02:45.03#ibcon#read 6, iclass 31, count 2 2006.229.13:02:45.03#ibcon#end of sib2, iclass 31, count 2 2006.229.13:02:45.03#ibcon#*mode == 0, iclass 31, count 2 2006.229.13:02:45.03#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.13:02:45.03#ibcon#[27=AT07-04\r\n] 2006.229.13:02:45.03#ibcon#*before write, iclass 31, count 2 2006.229.13:02:45.03#ibcon#enter sib2, iclass 31, count 2 2006.229.13:02:45.03#ibcon#flushed, iclass 31, count 2 2006.229.13:02:45.03#ibcon#about to write, iclass 31, count 2 2006.229.13:02:45.03#ibcon#wrote, iclass 31, count 2 2006.229.13:02:45.03#ibcon#about to read 3, iclass 31, count 2 2006.229.13:02:45.06#ibcon#read 3, iclass 31, count 2 2006.229.13:02:45.06#ibcon#about to read 4, iclass 31, count 2 2006.229.13:02:45.06#ibcon#read 4, iclass 31, count 2 2006.229.13:02:45.06#ibcon#about to read 5, iclass 31, count 2 2006.229.13:02:45.06#ibcon#read 5, iclass 31, count 2 2006.229.13:02:45.06#ibcon#about to read 6, iclass 31, count 2 2006.229.13:02:45.06#ibcon#read 6, iclass 31, count 2 2006.229.13:02:45.06#ibcon#end of sib2, iclass 31, count 2 2006.229.13:02:45.06#ibcon#*after write, iclass 31, count 2 2006.229.13:02:45.06#ibcon#*before return 0, iclass 31, count 2 2006.229.13:02:45.06#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:45.06#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:02:45.06#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.13:02:45.06#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:45.06#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:45.15#abcon#<5=/04 1.2 1.9 27.571001002.2\r\n> 2006.229.13:02:45.17#abcon#{5=INTERFACE CLEAR} 2006.229.13:02:45.18#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:45.18#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:45.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:02:45.18#ibcon#first serial, iclass 31, count 0 2006.229.13:02:45.18#ibcon#enter sib2, iclass 31, count 0 2006.229.13:02:45.18#ibcon#flushed, iclass 31, count 0 2006.229.13:02:45.18#ibcon#about to write, iclass 31, count 0 2006.229.13:02:45.18#ibcon#wrote, iclass 31, count 0 2006.229.13:02:45.18#ibcon#about to read 3, iclass 31, count 0 2006.229.13:02:45.20#ibcon#read 3, iclass 31, count 0 2006.229.13:02:45.20#ibcon#about to read 4, iclass 31, count 0 2006.229.13:02:45.20#ibcon#read 4, iclass 31, count 0 2006.229.13:02:45.20#ibcon#about to read 5, iclass 31, count 0 2006.229.13:02:45.20#ibcon#read 5, iclass 31, count 0 2006.229.13:02:45.20#ibcon#about to read 6, iclass 31, count 0 2006.229.13:02:45.20#ibcon#read 6, iclass 31, count 0 2006.229.13:02:45.20#ibcon#end of sib2, iclass 31, count 0 2006.229.13:02:45.20#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:02:45.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:02:45.20#ibcon#[27=USB\r\n] 2006.229.13:02:45.20#ibcon#*before write, iclass 31, count 0 2006.229.13:02:45.20#ibcon#enter sib2, iclass 31, count 0 2006.229.13:02:45.20#ibcon#flushed, iclass 31, count 0 2006.229.13:02:45.20#ibcon#about to write, iclass 31, count 0 2006.229.13:02:45.20#ibcon#wrote, iclass 31, count 0 2006.229.13:02:45.20#ibcon#about to read 3, iclass 31, count 0 2006.229.13:02:45.23#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:02:45.23#ibcon#read 3, iclass 31, count 0 2006.229.13:02:45.23#ibcon#about to read 4, iclass 31, count 0 2006.229.13:02:45.23#ibcon#read 4, iclass 31, count 0 2006.229.13:02:45.23#ibcon#about to read 5, iclass 31, count 0 2006.229.13:02:45.23#ibcon#read 5, iclass 31, count 0 2006.229.13:02:45.23#ibcon#about to read 6, iclass 31, count 0 2006.229.13:02:45.23#ibcon#read 6, iclass 31, count 0 2006.229.13:02:45.23#ibcon#end of sib2, iclass 31, count 0 2006.229.13:02:45.23#ibcon#*after write, iclass 31, count 0 2006.229.13:02:45.23#ibcon#*before return 0, iclass 31, count 0 2006.229.13:02:45.23#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:45.23#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:02:45.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:02:45.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:02:45.23$vck44/vblo=8,744.99 2006.229.13:02:45.23#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.13:02:45.23#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.13:02:45.23#ibcon#ireg 17 cls_cnt 0 2006.229.13:02:45.23#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:45.23#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:45.23#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:45.23#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:02:45.23#ibcon#first serial, iclass 37, count 0 2006.229.13:02:45.23#ibcon#enter sib2, iclass 37, count 0 2006.229.13:02:45.23#ibcon#flushed, iclass 37, count 0 2006.229.13:02:45.23#ibcon#about to write, iclass 37, count 0 2006.229.13:02:45.23#ibcon#wrote, iclass 37, count 0 2006.229.13:02:45.23#ibcon#about to read 3, iclass 37, count 0 2006.229.13:02:45.25#ibcon#read 3, iclass 37, count 0 2006.229.13:02:45.25#ibcon#about to read 4, iclass 37, count 0 2006.229.13:02:45.25#ibcon#read 4, iclass 37, count 0 2006.229.13:02:45.25#ibcon#about to read 5, iclass 37, count 0 2006.229.13:02:45.25#ibcon#read 5, iclass 37, count 0 2006.229.13:02:45.25#ibcon#about to read 6, iclass 37, count 0 2006.229.13:02:45.25#ibcon#read 6, iclass 37, count 0 2006.229.13:02:45.25#ibcon#end of sib2, iclass 37, count 0 2006.229.13:02:45.25#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:02:45.25#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:02:45.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:02:45.25#ibcon#*before write, iclass 37, count 0 2006.229.13:02:45.25#ibcon#enter sib2, iclass 37, count 0 2006.229.13:02:45.25#ibcon#flushed, iclass 37, count 0 2006.229.13:02:45.25#ibcon#about to write, iclass 37, count 0 2006.229.13:02:45.25#ibcon#wrote, iclass 37, count 0 2006.229.13:02:45.25#ibcon#about to read 3, iclass 37, count 0 2006.229.13:02:45.29#ibcon#read 3, iclass 37, count 0 2006.229.13:02:45.29#ibcon#about to read 4, iclass 37, count 0 2006.229.13:02:45.29#ibcon#read 4, iclass 37, count 0 2006.229.13:02:45.29#ibcon#about to read 5, iclass 37, count 0 2006.229.13:02:45.29#ibcon#read 5, iclass 37, count 0 2006.229.13:02:45.29#ibcon#about to read 6, iclass 37, count 0 2006.229.13:02:45.29#ibcon#read 6, iclass 37, count 0 2006.229.13:02:45.29#ibcon#end of sib2, iclass 37, count 0 2006.229.13:02:45.29#ibcon#*after write, iclass 37, count 0 2006.229.13:02:45.29#ibcon#*before return 0, iclass 37, count 0 2006.229.13:02:45.29#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:45.29#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:02:45.29#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:02:45.29#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:02:45.29$vck44/vb=8,4 2006.229.13:02:45.29#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.13:02:45.29#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.13:02:45.29#ibcon#ireg 11 cls_cnt 2 2006.229.13:02:45.29#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:45.35#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:45.35#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:45.35#ibcon#enter wrdev, iclass 39, count 2 2006.229.13:02:45.35#ibcon#first serial, iclass 39, count 2 2006.229.13:02:45.35#ibcon#enter sib2, iclass 39, count 2 2006.229.13:02:45.35#ibcon#flushed, iclass 39, count 2 2006.229.13:02:45.35#ibcon#about to write, iclass 39, count 2 2006.229.13:02:45.35#ibcon#wrote, iclass 39, count 2 2006.229.13:02:45.35#ibcon#about to read 3, iclass 39, count 2 2006.229.13:02:45.37#ibcon#read 3, iclass 39, count 2 2006.229.13:02:45.37#ibcon#about to read 4, iclass 39, count 2 2006.229.13:02:45.37#ibcon#read 4, iclass 39, count 2 2006.229.13:02:45.37#ibcon#about to read 5, iclass 39, count 2 2006.229.13:02:45.37#ibcon#read 5, iclass 39, count 2 2006.229.13:02:45.37#ibcon#about to read 6, iclass 39, count 2 2006.229.13:02:45.37#ibcon#read 6, iclass 39, count 2 2006.229.13:02:45.37#ibcon#end of sib2, iclass 39, count 2 2006.229.13:02:45.37#ibcon#*mode == 0, iclass 39, count 2 2006.229.13:02:45.37#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.13:02:45.37#ibcon#[27=AT08-04\r\n] 2006.229.13:02:45.37#ibcon#*before write, iclass 39, count 2 2006.229.13:02:45.37#ibcon#enter sib2, iclass 39, count 2 2006.229.13:02:45.37#ibcon#flushed, iclass 39, count 2 2006.229.13:02:45.37#ibcon#about to write, iclass 39, count 2 2006.229.13:02:45.37#ibcon#wrote, iclass 39, count 2 2006.229.13:02:45.37#ibcon#about to read 3, iclass 39, count 2 2006.229.13:02:45.40#ibcon#read 3, iclass 39, count 2 2006.229.13:02:45.40#ibcon#about to read 4, iclass 39, count 2 2006.229.13:02:45.40#ibcon#read 4, iclass 39, count 2 2006.229.13:02:45.40#ibcon#about to read 5, iclass 39, count 2 2006.229.13:02:45.40#ibcon#read 5, iclass 39, count 2 2006.229.13:02:45.40#ibcon#about to read 6, iclass 39, count 2 2006.229.13:02:45.40#ibcon#read 6, iclass 39, count 2 2006.229.13:02:45.40#ibcon#end of sib2, iclass 39, count 2 2006.229.13:02:45.40#ibcon#*after write, iclass 39, count 2 2006.229.13:02:45.40#ibcon#*before return 0, iclass 39, count 2 2006.229.13:02:45.40#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:45.40#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:02:45.40#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.13:02:45.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:02:45.40#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:45.52#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:45.52#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:45.52#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:02:45.52#ibcon#first serial, iclass 39, count 0 2006.229.13:02:45.52#ibcon#enter sib2, iclass 39, count 0 2006.229.13:02:45.52#ibcon#flushed, iclass 39, count 0 2006.229.13:02:45.52#ibcon#about to write, iclass 39, count 0 2006.229.13:02:45.52#ibcon#wrote, iclass 39, count 0 2006.229.13:02:45.52#ibcon#about to read 3, iclass 39, count 0 2006.229.13:02:45.54#ibcon#read 3, iclass 39, count 0 2006.229.13:02:45.54#ibcon#about to read 4, iclass 39, count 0 2006.229.13:02:45.54#ibcon#read 4, iclass 39, count 0 2006.229.13:02:45.54#ibcon#about to read 5, iclass 39, count 0 2006.229.13:02:45.54#ibcon#read 5, iclass 39, count 0 2006.229.13:02:45.54#ibcon#about to read 6, iclass 39, count 0 2006.229.13:02:45.54#ibcon#read 6, iclass 39, count 0 2006.229.13:02:45.54#ibcon#end of sib2, iclass 39, count 0 2006.229.13:02:45.54#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:02:45.54#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:02:45.54#ibcon#[27=USB\r\n] 2006.229.13:02:45.54#ibcon#*before write, iclass 39, count 0 2006.229.13:02:45.54#ibcon#enter sib2, iclass 39, count 0 2006.229.13:02:45.54#ibcon#flushed, iclass 39, count 0 2006.229.13:02:45.54#ibcon#about to write, iclass 39, count 0 2006.229.13:02:45.54#ibcon#wrote, iclass 39, count 0 2006.229.13:02:45.54#ibcon#about to read 3, iclass 39, count 0 2006.229.13:02:45.57#ibcon#read 3, iclass 39, count 0 2006.229.13:02:45.57#ibcon#about to read 4, iclass 39, count 0 2006.229.13:02:45.57#ibcon#read 4, iclass 39, count 0 2006.229.13:02:45.57#ibcon#about to read 5, iclass 39, count 0 2006.229.13:02:45.57#ibcon#read 5, iclass 39, count 0 2006.229.13:02:45.57#ibcon#about to read 6, iclass 39, count 0 2006.229.13:02:45.57#ibcon#read 6, iclass 39, count 0 2006.229.13:02:45.57#ibcon#end of sib2, iclass 39, count 0 2006.229.13:02:45.57#ibcon#*after write, iclass 39, count 0 2006.229.13:02:45.57#ibcon#*before return 0, iclass 39, count 0 2006.229.13:02:45.57#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:45.57#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:02:45.57#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:02:45.57#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:02:45.57$vck44/vabw=wide 2006.229.13:02:45.57#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:02:45.57#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:02:45.57#ibcon#ireg 8 cls_cnt 0 2006.229.13:02:45.57#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:45.57#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:45.57#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:45.57#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:02:45.57#ibcon#first serial, iclass 3, count 0 2006.229.13:02:45.57#ibcon#enter sib2, iclass 3, count 0 2006.229.13:02:45.57#ibcon#flushed, iclass 3, count 0 2006.229.13:02:45.57#ibcon#about to write, iclass 3, count 0 2006.229.13:02:45.57#ibcon#wrote, iclass 3, count 0 2006.229.13:02:45.57#ibcon#about to read 3, iclass 3, count 0 2006.229.13:02:45.59#ibcon#read 3, iclass 3, count 0 2006.229.13:02:45.59#ibcon#about to read 4, iclass 3, count 0 2006.229.13:02:45.59#ibcon#read 4, iclass 3, count 0 2006.229.13:02:45.59#ibcon#about to read 5, iclass 3, count 0 2006.229.13:02:45.59#ibcon#read 5, iclass 3, count 0 2006.229.13:02:45.59#ibcon#about to read 6, iclass 3, count 0 2006.229.13:02:45.59#ibcon#read 6, iclass 3, count 0 2006.229.13:02:45.59#ibcon#end of sib2, iclass 3, count 0 2006.229.13:02:45.59#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:02:45.59#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:02:45.59#ibcon#[25=BW32\r\n] 2006.229.13:02:45.59#ibcon#*before write, iclass 3, count 0 2006.229.13:02:45.59#ibcon#enter sib2, iclass 3, count 0 2006.229.13:02:45.59#ibcon#flushed, iclass 3, count 0 2006.229.13:02:45.59#ibcon#about to write, iclass 3, count 0 2006.229.13:02:45.59#ibcon#wrote, iclass 3, count 0 2006.229.13:02:45.59#ibcon#about to read 3, iclass 3, count 0 2006.229.13:02:45.62#ibcon#read 3, iclass 3, count 0 2006.229.13:02:45.62#ibcon#about to read 4, iclass 3, count 0 2006.229.13:02:45.62#ibcon#read 4, iclass 3, count 0 2006.229.13:02:45.62#ibcon#about to read 5, iclass 3, count 0 2006.229.13:02:45.62#ibcon#read 5, iclass 3, count 0 2006.229.13:02:45.62#ibcon#about to read 6, iclass 3, count 0 2006.229.13:02:45.62#ibcon#read 6, iclass 3, count 0 2006.229.13:02:45.62#ibcon#end of sib2, iclass 3, count 0 2006.229.13:02:45.62#ibcon#*after write, iclass 3, count 0 2006.229.13:02:45.62#ibcon#*before return 0, iclass 3, count 0 2006.229.13:02:45.62#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:45.62#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:02:45.62#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:02:45.62#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:02:45.62$vck44/vbbw=wide 2006.229.13:02:45.62#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:02:45.62#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:02:45.62#ibcon#ireg 8 cls_cnt 0 2006.229.13:02:45.62#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:02:45.69#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:02:45.69#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:02:45.69#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:02:45.69#ibcon#first serial, iclass 5, count 0 2006.229.13:02:45.69#ibcon#enter sib2, iclass 5, count 0 2006.229.13:02:45.69#ibcon#flushed, iclass 5, count 0 2006.229.13:02:45.69#ibcon#about to write, iclass 5, count 0 2006.229.13:02:45.69#ibcon#wrote, iclass 5, count 0 2006.229.13:02:45.69#ibcon#about to read 3, iclass 5, count 0 2006.229.13:02:45.71#ibcon#read 3, iclass 5, count 0 2006.229.13:02:45.71#ibcon#about to read 4, iclass 5, count 0 2006.229.13:02:45.71#ibcon#read 4, iclass 5, count 0 2006.229.13:02:45.71#ibcon#about to read 5, iclass 5, count 0 2006.229.13:02:45.71#ibcon#read 5, iclass 5, count 0 2006.229.13:02:45.71#ibcon#about to read 6, iclass 5, count 0 2006.229.13:02:45.71#ibcon#read 6, iclass 5, count 0 2006.229.13:02:45.71#ibcon#end of sib2, iclass 5, count 0 2006.229.13:02:45.71#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:02:45.71#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:02:45.71#ibcon#[27=BW32\r\n] 2006.229.13:02:45.71#ibcon#*before write, iclass 5, count 0 2006.229.13:02:45.71#ibcon#enter sib2, iclass 5, count 0 2006.229.13:02:45.71#ibcon#flushed, iclass 5, count 0 2006.229.13:02:45.71#ibcon#about to write, iclass 5, count 0 2006.229.13:02:45.71#ibcon#wrote, iclass 5, count 0 2006.229.13:02:45.71#ibcon#about to read 3, iclass 5, count 0 2006.229.13:02:45.74#ibcon#read 3, iclass 5, count 0 2006.229.13:02:45.74#ibcon#about to read 4, iclass 5, count 0 2006.229.13:02:45.74#ibcon#read 4, iclass 5, count 0 2006.229.13:02:45.74#ibcon#about to read 5, iclass 5, count 0 2006.229.13:02:45.74#ibcon#read 5, iclass 5, count 0 2006.229.13:02:45.74#ibcon#about to read 6, iclass 5, count 0 2006.229.13:02:45.74#ibcon#read 6, iclass 5, count 0 2006.229.13:02:45.74#ibcon#end of sib2, iclass 5, count 0 2006.229.13:02:45.74#ibcon#*after write, iclass 5, count 0 2006.229.13:02:45.74#ibcon#*before return 0, iclass 5, count 0 2006.229.13:02:45.74#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:02:45.74#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:02:45.74#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:02:45.74#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:02:45.74$setupk4/ifdk4 2006.229.13:02:45.74$ifdk4/lo= 2006.229.13:02:45.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:02:45.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:02:45.74$ifdk4/patch= 2006.229.13:02:45.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:02:45.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:02:45.74$setupk4/!*+20s 2006.229.13:02:55.32#abcon#<5=/04 1.1 1.9 27.571001002.2\r\n> 2006.229.13:02:55.34#abcon#{5=INTERFACE CLEAR} 2006.229.13:02:55.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:03:00.25$setupk4/"tpicd 2006.229.13:03:00.25$setupk4/echo=off 2006.229.13:03:00.25$setupk4/xlog=off 2006.229.13:03:00.25:!2006.229.13:04:33 2006.229.13:03:16.13#trakl#Source acquired 2006.229.13:03:17.13#flagr#flagr/antenna,acquired 2006.229.13:04:33.00:preob 2006.229.13:04:33.14/onsource/TRACKING 2006.229.13:04:33.14:!2006.229.13:04:43 2006.229.13:04:43.00:"tape 2006.229.13:04:43.00:"st=record 2006.229.13:04:43.00:data_valid=on 2006.229.13:04:43.00:midob 2006.229.13:04:44.14/onsource/TRACKING 2006.229.13:04:44.14/wx/27.57,1002.3,100 2006.229.13:04:44.26/cable/+6.4100E-03 2006.229.13:04:45.35/va/01,08,usb,yes,30,32 2006.229.13:04:45.35/va/02,07,usb,yes,32,33 2006.229.13:04:45.35/va/03,06,usb,yes,40,42 2006.229.13:04:45.35/va/04,07,usb,yes,33,35 2006.229.13:04:45.35/va/05,04,usb,yes,30,30 2006.229.13:04:45.35/va/06,04,usb,yes,33,33 2006.229.13:04:45.35/va/07,05,usb,yes,29,30 2006.229.13:04:45.35/va/08,06,usb,yes,21,26 2006.229.13:04:45.58/valo/01,524.99,yes,locked 2006.229.13:04:45.58/valo/02,534.99,yes,locked 2006.229.13:04:45.58/valo/03,564.99,yes,locked 2006.229.13:04:45.58/valo/04,624.99,yes,locked 2006.229.13:04:45.58/valo/05,734.99,yes,locked 2006.229.13:04:45.58/valo/06,814.99,yes,locked 2006.229.13:04:45.58/valo/07,864.99,yes,locked 2006.229.13:04:45.58/valo/08,884.99,yes,locked 2006.229.13:04:46.67/vb/01,04,usb,yes,31,29 2006.229.13:04:46.67/vb/02,04,usb,yes,33,33 2006.229.13:04:46.67/vb/03,04,usb,yes,30,33 2006.229.13:04:46.67/vb/04,04,usb,yes,35,34 2006.229.13:04:46.67/vb/05,04,usb,yes,27,30 2006.229.13:04:46.67/vb/06,04,usb,yes,32,28 2006.229.13:04:46.67/vb/07,04,usb,yes,32,31 2006.229.13:04:46.67/vb/08,04,usb,yes,29,32 2006.229.13:04:46.91/vblo/01,629.99,yes,locked 2006.229.13:04:46.91/vblo/02,634.99,yes,locked 2006.229.13:04:46.91/vblo/03,649.99,yes,locked 2006.229.13:04:46.91/vblo/04,679.99,yes,locked 2006.229.13:04:46.91/vblo/05,709.99,yes,locked 2006.229.13:04:46.91/vblo/06,719.99,yes,locked 2006.229.13:04:46.91/vblo/07,734.99,yes,locked 2006.229.13:04:46.91/vblo/08,744.99,yes,locked 2006.229.13:04:47.06/vabw/8 2006.229.13:04:47.21/vbbw/8 2006.229.13:04:47.30/xfe/off,on,11.7 2006.229.13:04:47.73/ifatt/23,28,28,28 2006.229.13:04:48.07/fmout-gps/S +4.48E-07 2006.229.13:04:48.11:!2006.229.13:07:13 2006.229.13:07:13.00:data_valid=off 2006.229.13:07:13.00:"et 2006.229.13:07:13.00:!+3s 2006.229.13:07:16.01:"tape 2006.229.13:07:16.01:postob 2006.229.13:07:16.10/cable/+6.4107E-03 2006.229.13:07:16.10/wx/27.57,1002.3,100 2006.229.13:07:17.08/fmout-gps/S +4.57E-07 2006.229.13:07:17.08:scan_name=229-1310,jd0608,190 2006.229.13:07:17.08:source=1958-179,200057.09,-174857.7,2000.0,cw 2006.229.13:07:17.14#flagr#flagr/antenna,new-source 2006.229.13:07:18.14:checkk5 2006.229.13:07:18.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:07:18.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:07:19.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:07:19.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:07:20.09/chk_obsdata//k5ts1/T2291304??a.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.13:07:20.50/chk_obsdata//k5ts2/T2291304??b.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.13:07:20.91/chk_obsdata//k5ts3/T2291304??c.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.13:07:21.31/chk_obsdata//k5ts4/T2291304??d.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.13:07:22.04/k5log//k5ts1_log_newline 2006.229.13:07:22.75/k5log//k5ts2_log_newline 2006.229.13:07:23.44/k5log//k5ts3_log_newline 2006.229.13:07:24.14/k5log//k5ts4_log_newline 2006.229.13:07:24.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:07:24.16:setupk4=1 2006.229.13:07:24.16$setupk4/echo=on 2006.229.13:07:24.16$setupk4/pcalon 2006.229.13:07:24.16$pcalon/"no phase cal control is implemented here 2006.229.13:07:24.16$setupk4/"tpicd=stop 2006.229.13:07:24.16$setupk4/"rec=synch_on 2006.229.13:07:24.16$setupk4/"rec_mode=128 2006.229.13:07:24.16$setupk4/!* 2006.229.13:07:24.16$setupk4/recpk4 2006.229.13:07:24.16$recpk4/recpatch= 2006.229.13:07:24.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:07:24.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:07:24.17$setupk4/vck44 2006.229.13:07:24.17$vck44/valo=1,524.99 2006.229.13:07:24.17#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:07:24.17#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:07:24.17#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:24.17#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:24.17#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:24.17#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:24.17#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:07:24.17#ibcon#first serial, iclass 12, count 0 2006.229.13:07:24.17#ibcon#enter sib2, iclass 12, count 0 2006.229.13:07:24.17#ibcon#flushed, iclass 12, count 0 2006.229.13:07:24.17#ibcon#about to write, iclass 12, count 0 2006.229.13:07:24.17#ibcon#wrote, iclass 12, count 0 2006.229.13:07:24.17#ibcon#about to read 3, iclass 12, count 0 2006.229.13:07:24.18#ibcon#read 3, iclass 12, count 0 2006.229.13:07:24.18#ibcon#about to read 4, iclass 12, count 0 2006.229.13:07:24.18#ibcon#read 4, iclass 12, count 0 2006.229.13:07:24.18#ibcon#about to read 5, iclass 12, count 0 2006.229.13:07:24.18#ibcon#read 5, iclass 12, count 0 2006.229.13:07:24.18#ibcon#about to read 6, iclass 12, count 0 2006.229.13:07:24.18#ibcon#read 6, iclass 12, count 0 2006.229.13:07:24.18#ibcon#end of sib2, iclass 12, count 0 2006.229.13:07:24.18#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:07:24.18#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:07:24.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:07:24.18#ibcon#*before write, iclass 12, count 0 2006.229.13:07:24.18#ibcon#enter sib2, iclass 12, count 0 2006.229.13:07:24.18#ibcon#flushed, iclass 12, count 0 2006.229.13:07:24.18#ibcon#about to write, iclass 12, count 0 2006.229.13:07:24.18#ibcon#wrote, iclass 12, count 0 2006.229.13:07:24.18#ibcon#about to read 3, iclass 12, count 0 2006.229.13:07:24.23#ibcon#read 3, iclass 12, count 0 2006.229.13:07:24.23#ibcon#about to read 4, iclass 12, count 0 2006.229.13:07:24.23#ibcon#read 4, iclass 12, count 0 2006.229.13:07:24.23#ibcon#about to read 5, iclass 12, count 0 2006.229.13:07:24.23#ibcon#read 5, iclass 12, count 0 2006.229.13:07:24.23#ibcon#about to read 6, iclass 12, count 0 2006.229.13:07:24.23#ibcon#read 6, iclass 12, count 0 2006.229.13:07:24.23#ibcon#end of sib2, iclass 12, count 0 2006.229.13:07:24.23#ibcon#*after write, iclass 12, count 0 2006.229.13:07:24.23#ibcon#*before return 0, iclass 12, count 0 2006.229.13:07:24.23#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:24.23#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:24.23#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:07:24.23#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:07:24.23$vck44/va=1,8 2006.229.13:07:24.23#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:07:24.23#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:07:24.23#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:24.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:24.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:24.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:24.23#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:07:24.23#ibcon#first serial, iclass 14, count 2 2006.229.13:07:24.23#ibcon#enter sib2, iclass 14, count 2 2006.229.13:07:24.23#ibcon#flushed, iclass 14, count 2 2006.229.13:07:24.23#ibcon#about to write, iclass 14, count 2 2006.229.13:07:24.23#ibcon#wrote, iclass 14, count 2 2006.229.13:07:24.23#ibcon#about to read 3, iclass 14, count 2 2006.229.13:07:24.25#ibcon#read 3, iclass 14, count 2 2006.229.13:07:24.25#ibcon#about to read 4, iclass 14, count 2 2006.229.13:07:24.25#ibcon#read 4, iclass 14, count 2 2006.229.13:07:24.25#ibcon#about to read 5, iclass 14, count 2 2006.229.13:07:24.25#ibcon#read 5, iclass 14, count 2 2006.229.13:07:24.25#ibcon#about to read 6, iclass 14, count 2 2006.229.13:07:24.25#ibcon#read 6, iclass 14, count 2 2006.229.13:07:24.25#ibcon#end of sib2, iclass 14, count 2 2006.229.13:07:24.25#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:07:24.25#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:07:24.25#ibcon#[25=AT01-08\r\n] 2006.229.13:07:24.25#ibcon#*before write, iclass 14, count 2 2006.229.13:07:24.25#ibcon#enter sib2, iclass 14, count 2 2006.229.13:07:24.25#ibcon#flushed, iclass 14, count 2 2006.229.13:07:24.25#ibcon#about to write, iclass 14, count 2 2006.229.13:07:24.25#ibcon#wrote, iclass 14, count 2 2006.229.13:07:24.25#ibcon#about to read 3, iclass 14, count 2 2006.229.13:07:24.28#ibcon#read 3, iclass 14, count 2 2006.229.13:07:24.28#ibcon#about to read 4, iclass 14, count 2 2006.229.13:07:24.28#ibcon#read 4, iclass 14, count 2 2006.229.13:07:24.28#ibcon#about to read 5, iclass 14, count 2 2006.229.13:07:24.28#ibcon#read 5, iclass 14, count 2 2006.229.13:07:24.28#ibcon#about to read 6, iclass 14, count 2 2006.229.13:07:24.28#ibcon#read 6, iclass 14, count 2 2006.229.13:07:24.28#ibcon#end of sib2, iclass 14, count 2 2006.229.13:07:24.28#ibcon#*after write, iclass 14, count 2 2006.229.13:07:24.28#ibcon#*before return 0, iclass 14, count 2 2006.229.13:07:24.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:24.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:24.28#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:07:24.28#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:24.28#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:24.40#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:24.40#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:24.40#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:07:24.40#ibcon#first serial, iclass 14, count 0 2006.229.13:07:24.40#ibcon#enter sib2, iclass 14, count 0 2006.229.13:07:24.40#ibcon#flushed, iclass 14, count 0 2006.229.13:07:24.40#ibcon#about to write, iclass 14, count 0 2006.229.13:07:24.40#ibcon#wrote, iclass 14, count 0 2006.229.13:07:24.40#ibcon#about to read 3, iclass 14, count 0 2006.229.13:07:24.42#ibcon#read 3, iclass 14, count 0 2006.229.13:07:24.42#ibcon#about to read 4, iclass 14, count 0 2006.229.13:07:24.42#ibcon#read 4, iclass 14, count 0 2006.229.13:07:24.42#ibcon#about to read 5, iclass 14, count 0 2006.229.13:07:24.42#ibcon#read 5, iclass 14, count 0 2006.229.13:07:24.42#ibcon#about to read 6, iclass 14, count 0 2006.229.13:07:24.42#ibcon#read 6, iclass 14, count 0 2006.229.13:07:24.42#ibcon#end of sib2, iclass 14, count 0 2006.229.13:07:24.42#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:07:24.42#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:07:24.42#ibcon#[25=USB\r\n] 2006.229.13:07:24.42#ibcon#*before write, iclass 14, count 0 2006.229.13:07:24.42#ibcon#enter sib2, iclass 14, count 0 2006.229.13:07:24.42#ibcon#flushed, iclass 14, count 0 2006.229.13:07:24.42#ibcon#about to write, iclass 14, count 0 2006.229.13:07:24.42#ibcon#wrote, iclass 14, count 0 2006.229.13:07:24.42#ibcon#about to read 3, iclass 14, count 0 2006.229.13:07:24.45#ibcon#read 3, iclass 14, count 0 2006.229.13:07:24.45#ibcon#about to read 4, iclass 14, count 0 2006.229.13:07:24.45#ibcon#read 4, iclass 14, count 0 2006.229.13:07:24.45#ibcon#about to read 5, iclass 14, count 0 2006.229.13:07:24.45#ibcon#read 5, iclass 14, count 0 2006.229.13:07:24.45#ibcon#about to read 6, iclass 14, count 0 2006.229.13:07:24.45#ibcon#read 6, iclass 14, count 0 2006.229.13:07:24.45#ibcon#end of sib2, iclass 14, count 0 2006.229.13:07:24.45#ibcon#*after write, iclass 14, count 0 2006.229.13:07:24.45#ibcon#*before return 0, iclass 14, count 0 2006.229.13:07:24.45#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:24.45#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:24.45#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:07:24.45#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:07:24.45$vck44/valo=2,534.99 2006.229.13:07:24.45#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:07:24.45#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:07:24.45#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:24.45#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:24.45#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:24.45#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:24.45#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:07:24.45#ibcon#first serial, iclass 16, count 0 2006.229.13:07:24.45#ibcon#enter sib2, iclass 16, count 0 2006.229.13:07:24.45#ibcon#flushed, iclass 16, count 0 2006.229.13:07:24.45#ibcon#about to write, iclass 16, count 0 2006.229.13:07:24.45#ibcon#wrote, iclass 16, count 0 2006.229.13:07:24.45#ibcon#about to read 3, iclass 16, count 0 2006.229.13:07:24.47#ibcon#read 3, iclass 16, count 0 2006.229.13:07:24.47#ibcon#about to read 4, iclass 16, count 0 2006.229.13:07:24.47#ibcon#read 4, iclass 16, count 0 2006.229.13:07:24.47#ibcon#about to read 5, iclass 16, count 0 2006.229.13:07:24.47#ibcon#read 5, iclass 16, count 0 2006.229.13:07:24.47#ibcon#about to read 6, iclass 16, count 0 2006.229.13:07:24.47#ibcon#read 6, iclass 16, count 0 2006.229.13:07:24.47#ibcon#end of sib2, iclass 16, count 0 2006.229.13:07:24.47#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:07:24.47#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:07:24.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:07:24.47#ibcon#*before write, iclass 16, count 0 2006.229.13:07:24.47#ibcon#enter sib2, iclass 16, count 0 2006.229.13:07:24.47#ibcon#flushed, iclass 16, count 0 2006.229.13:07:24.47#ibcon#about to write, iclass 16, count 0 2006.229.13:07:24.47#ibcon#wrote, iclass 16, count 0 2006.229.13:07:24.47#ibcon#about to read 3, iclass 16, count 0 2006.229.13:07:24.51#ibcon#read 3, iclass 16, count 0 2006.229.13:07:24.51#ibcon#about to read 4, iclass 16, count 0 2006.229.13:07:24.51#ibcon#read 4, iclass 16, count 0 2006.229.13:07:24.51#ibcon#about to read 5, iclass 16, count 0 2006.229.13:07:24.51#ibcon#read 5, iclass 16, count 0 2006.229.13:07:24.51#ibcon#about to read 6, iclass 16, count 0 2006.229.13:07:24.51#ibcon#read 6, iclass 16, count 0 2006.229.13:07:24.51#ibcon#end of sib2, iclass 16, count 0 2006.229.13:07:24.51#ibcon#*after write, iclass 16, count 0 2006.229.13:07:24.51#ibcon#*before return 0, iclass 16, count 0 2006.229.13:07:24.51#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:24.51#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:24.51#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:07:24.51#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:07:24.51$vck44/va=2,7 2006.229.13:07:24.51#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:07:24.51#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:07:24.51#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:24.51#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:24.57#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:24.57#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:24.57#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:07:24.57#ibcon#first serial, iclass 18, count 2 2006.229.13:07:24.57#ibcon#enter sib2, iclass 18, count 2 2006.229.13:07:24.57#ibcon#flushed, iclass 18, count 2 2006.229.13:07:24.57#ibcon#about to write, iclass 18, count 2 2006.229.13:07:24.57#ibcon#wrote, iclass 18, count 2 2006.229.13:07:24.57#ibcon#about to read 3, iclass 18, count 2 2006.229.13:07:24.59#ibcon#read 3, iclass 18, count 2 2006.229.13:07:24.59#ibcon#about to read 4, iclass 18, count 2 2006.229.13:07:24.59#ibcon#read 4, iclass 18, count 2 2006.229.13:07:24.59#ibcon#about to read 5, iclass 18, count 2 2006.229.13:07:24.59#ibcon#read 5, iclass 18, count 2 2006.229.13:07:24.59#ibcon#about to read 6, iclass 18, count 2 2006.229.13:07:24.59#ibcon#read 6, iclass 18, count 2 2006.229.13:07:24.59#ibcon#end of sib2, iclass 18, count 2 2006.229.13:07:24.59#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:07:24.59#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:07:24.59#ibcon#[25=AT02-07\r\n] 2006.229.13:07:24.59#ibcon#*before write, iclass 18, count 2 2006.229.13:07:24.59#ibcon#enter sib2, iclass 18, count 2 2006.229.13:07:24.59#ibcon#flushed, iclass 18, count 2 2006.229.13:07:24.59#ibcon#about to write, iclass 18, count 2 2006.229.13:07:24.59#ibcon#wrote, iclass 18, count 2 2006.229.13:07:24.59#ibcon#about to read 3, iclass 18, count 2 2006.229.13:07:24.62#ibcon#read 3, iclass 18, count 2 2006.229.13:07:24.62#ibcon#about to read 4, iclass 18, count 2 2006.229.13:07:24.62#ibcon#read 4, iclass 18, count 2 2006.229.13:07:24.62#ibcon#about to read 5, iclass 18, count 2 2006.229.13:07:24.62#ibcon#read 5, iclass 18, count 2 2006.229.13:07:24.62#ibcon#about to read 6, iclass 18, count 2 2006.229.13:07:24.62#ibcon#read 6, iclass 18, count 2 2006.229.13:07:24.62#ibcon#end of sib2, iclass 18, count 2 2006.229.13:07:24.62#ibcon#*after write, iclass 18, count 2 2006.229.13:07:24.62#ibcon#*before return 0, iclass 18, count 2 2006.229.13:07:24.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:24.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:24.62#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:07:24.62#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:24.62#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:24.74#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:24.74#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:24.74#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:07:24.74#ibcon#first serial, iclass 18, count 0 2006.229.13:07:24.74#ibcon#enter sib2, iclass 18, count 0 2006.229.13:07:24.74#ibcon#flushed, iclass 18, count 0 2006.229.13:07:24.74#ibcon#about to write, iclass 18, count 0 2006.229.13:07:24.74#ibcon#wrote, iclass 18, count 0 2006.229.13:07:24.74#ibcon#about to read 3, iclass 18, count 0 2006.229.13:07:24.76#ibcon#read 3, iclass 18, count 0 2006.229.13:07:24.76#ibcon#about to read 4, iclass 18, count 0 2006.229.13:07:24.76#ibcon#read 4, iclass 18, count 0 2006.229.13:07:24.76#ibcon#about to read 5, iclass 18, count 0 2006.229.13:07:24.76#ibcon#read 5, iclass 18, count 0 2006.229.13:07:24.76#ibcon#about to read 6, iclass 18, count 0 2006.229.13:07:24.76#ibcon#read 6, iclass 18, count 0 2006.229.13:07:24.76#ibcon#end of sib2, iclass 18, count 0 2006.229.13:07:24.76#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:07:24.76#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:07:24.76#ibcon#[25=USB\r\n] 2006.229.13:07:24.76#ibcon#*before write, iclass 18, count 0 2006.229.13:07:24.76#ibcon#enter sib2, iclass 18, count 0 2006.229.13:07:24.76#ibcon#flushed, iclass 18, count 0 2006.229.13:07:24.76#ibcon#about to write, iclass 18, count 0 2006.229.13:07:24.76#ibcon#wrote, iclass 18, count 0 2006.229.13:07:24.76#ibcon#about to read 3, iclass 18, count 0 2006.229.13:07:24.79#ibcon#read 3, iclass 18, count 0 2006.229.13:07:24.79#ibcon#about to read 4, iclass 18, count 0 2006.229.13:07:24.79#ibcon#read 4, iclass 18, count 0 2006.229.13:07:24.79#ibcon#about to read 5, iclass 18, count 0 2006.229.13:07:24.79#ibcon#read 5, iclass 18, count 0 2006.229.13:07:24.79#ibcon#about to read 6, iclass 18, count 0 2006.229.13:07:24.79#ibcon#read 6, iclass 18, count 0 2006.229.13:07:24.79#ibcon#end of sib2, iclass 18, count 0 2006.229.13:07:24.79#ibcon#*after write, iclass 18, count 0 2006.229.13:07:24.79#ibcon#*before return 0, iclass 18, count 0 2006.229.13:07:24.79#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:24.79#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:24.79#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:07:24.79#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:07:24.79$vck44/valo=3,564.99 2006.229.13:07:24.79#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:07:24.79#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:07:24.79#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:24.79#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:24.79#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:24.79#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:24.79#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:07:24.79#ibcon#first serial, iclass 20, count 0 2006.229.13:07:24.79#ibcon#enter sib2, iclass 20, count 0 2006.229.13:07:24.79#ibcon#flushed, iclass 20, count 0 2006.229.13:07:24.79#ibcon#about to write, iclass 20, count 0 2006.229.13:07:24.79#ibcon#wrote, iclass 20, count 0 2006.229.13:07:24.79#ibcon#about to read 3, iclass 20, count 0 2006.229.13:07:24.81#ibcon#read 3, iclass 20, count 0 2006.229.13:07:24.81#ibcon#about to read 4, iclass 20, count 0 2006.229.13:07:24.81#ibcon#read 4, iclass 20, count 0 2006.229.13:07:24.81#ibcon#about to read 5, iclass 20, count 0 2006.229.13:07:24.81#ibcon#read 5, iclass 20, count 0 2006.229.13:07:24.81#ibcon#about to read 6, iclass 20, count 0 2006.229.13:07:24.81#ibcon#read 6, iclass 20, count 0 2006.229.13:07:24.81#ibcon#end of sib2, iclass 20, count 0 2006.229.13:07:24.81#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:07:24.81#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:07:24.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:07:24.81#ibcon#*before write, iclass 20, count 0 2006.229.13:07:24.81#ibcon#enter sib2, iclass 20, count 0 2006.229.13:07:24.81#ibcon#flushed, iclass 20, count 0 2006.229.13:07:24.81#ibcon#about to write, iclass 20, count 0 2006.229.13:07:24.81#ibcon#wrote, iclass 20, count 0 2006.229.13:07:24.81#ibcon#about to read 3, iclass 20, count 0 2006.229.13:07:24.85#ibcon#read 3, iclass 20, count 0 2006.229.13:07:24.85#ibcon#about to read 4, iclass 20, count 0 2006.229.13:07:24.85#ibcon#read 4, iclass 20, count 0 2006.229.13:07:24.85#ibcon#about to read 5, iclass 20, count 0 2006.229.13:07:24.85#ibcon#read 5, iclass 20, count 0 2006.229.13:07:24.85#ibcon#about to read 6, iclass 20, count 0 2006.229.13:07:24.85#ibcon#read 6, iclass 20, count 0 2006.229.13:07:24.85#ibcon#end of sib2, iclass 20, count 0 2006.229.13:07:24.85#ibcon#*after write, iclass 20, count 0 2006.229.13:07:24.85#ibcon#*before return 0, iclass 20, count 0 2006.229.13:07:24.85#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:24.85#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:24.85#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:07:24.85#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:07:24.85$vck44/va=3,6 2006.229.13:07:24.85#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:07:24.85#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:07:24.85#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:24.85#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:24.91#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:24.91#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:24.91#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:07:24.91#ibcon#first serial, iclass 22, count 2 2006.229.13:07:24.91#ibcon#enter sib2, iclass 22, count 2 2006.229.13:07:24.91#ibcon#flushed, iclass 22, count 2 2006.229.13:07:24.91#ibcon#about to write, iclass 22, count 2 2006.229.13:07:24.91#ibcon#wrote, iclass 22, count 2 2006.229.13:07:24.91#ibcon#about to read 3, iclass 22, count 2 2006.229.13:07:24.93#ibcon#read 3, iclass 22, count 2 2006.229.13:07:24.93#ibcon#about to read 4, iclass 22, count 2 2006.229.13:07:24.93#ibcon#read 4, iclass 22, count 2 2006.229.13:07:24.93#ibcon#about to read 5, iclass 22, count 2 2006.229.13:07:24.93#ibcon#read 5, iclass 22, count 2 2006.229.13:07:24.93#ibcon#about to read 6, iclass 22, count 2 2006.229.13:07:24.93#ibcon#read 6, iclass 22, count 2 2006.229.13:07:24.93#ibcon#end of sib2, iclass 22, count 2 2006.229.13:07:24.93#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:07:24.93#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:07:24.93#ibcon#[25=AT03-06\r\n] 2006.229.13:07:24.93#ibcon#*before write, iclass 22, count 2 2006.229.13:07:24.93#ibcon#enter sib2, iclass 22, count 2 2006.229.13:07:24.93#ibcon#flushed, iclass 22, count 2 2006.229.13:07:24.93#ibcon#about to write, iclass 22, count 2 2006.229.13:07:24.93#ibcon#wrote, iclass 22, count 2 2006.229.13:07:24.93#ibcon#about to read 3, iclass 22, count 2 2006.229.13:07:24.96#ibcon#read 3, iclass 22, count 2 2006.229.13:07:24.96#ibcon#about to read 4, iclass 22, count 2 2006.229.13:07:24.96#ibcon#read 4, iclass 22, count 2 2006.229.13:07:24.96#ibcon#about to read 5, iclass 22, count 2 2006.229.13:07:24.96#ibcon#read 5, iclass 22, count 2 2006.229.13:07:24.96#ibcon#about to read 6, iclass 22, count 2 2006.229.13:07:24.96#ibcon#read 6, iclass 22, count 2 2006.229.13:07:24.96#ibcon#end of sib2, iclass 22, count 2 2006.229.13:07:24.96#ibcon#*after write, iclass 22, count 2 2006.229.13:07:24.96#ibcon#*before return 0, iclass 22, count 2 2006.229.13:07:24.96#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:24.96#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:24.96#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:07:24.96#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:24.96#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:25.08#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:25.08#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:25.08#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:07:25.08#ibcon#first serial, iclass 22, count 0 2006.229.13:07:25.08#ibcon#enter sib2, iclass 22, count 0 2006.229.13:07:25.08#ibcon#flushed, iclass 22, count 0 2006.229.13:07:25.08#ibcon#about to write, iclass 22, count 0 2006.229.13:07:25.08#ibcon#wrote, iclass 22, count 0 2006.229.13:07:25.08#ibcon#about to read 3, iclass 22, count 0 2006.229.13:07:25.10#ibcon#read 3, iclass 22, count 0 2006.229.13:07:25.10#ibcon#about to read 4, iclass 22, count 0 2006.229.13:07:25.10#ibcon#read 4, iclass 22, count 0 2006.229.13:07:25.10#ibcon#about to read 5, iclass 22, count 0 2006.229.13:07:25.10#ibcon#read 5, iclass 22, count 0 2006.229.13:07:25.10#ibcon#about to read 6, iclass 22, count 0 2006.229.13:07:25.10#ibcon#read 6, iclass 22, count 0 2006.229.13:07:25.10#ibcon#end of sib2, iclass 22, count 0 2006.229.13:07:25.10#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:07:25.10#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:07:25.10#ibcon#[25=USB\r\n] 2006.229.13:07:25.10#ibcon#*before write, iclass 22, count 0 2006.229.13:07:25.10#ibcon#enter sib2, iclass 22, count 0 2006.229.13:07:25.10#ibcon#flushed, iclass 22, count 0 2006.229.13:07:25.10#ibcon#about to write, iclass 22, count 0 2006.229.13:07:25.10#ibcon#wrote, iclass 22, count 0 2006.229.13:07:25.10#ibcon#about to read 3, iclass 22, count 0 2006.229.13:07:25.13#ibcon#read 3, iclass 22, count 0 2006.229.13:07:25.13#ibcon#about to read 4, iclass 22, count 0 2006.229.13:07:25.13#ibcon#read 4, iclass 22, count 0 2006.229.13:07:25.13#ibcon#about to read 5, iclass 22, count 0 2006.229.13:07:25.13#ibcon#read 5, iclass 22, count 0 2006.229.13:07:25.13#ibcon#about to read 6, iclass 22, count 0 2006.229.13:07:25.13#ibcon#read 6, iclass 22, count 0 2006.229.13:07:25.13#ibcon#end of sib2, iclass 22, count 0 2006.229.13:07:25.13#ibcon#*after write, iclass 22, count 0 2006.229.13:07:25.13#ibcon#*before return 0, iclass 22, count 0 2006.229.13:07:25.13#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:25.13#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:25.13#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:07:25.13#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:07:25.13$vck44/valo=4,624.99 2006.229.13:07:25.13#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:07:25.13#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:07:25.13#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:25.13#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:25.13#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:25.13#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:25.13#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:07:25.13#ibcon#first serial, iclass 24, count 0 2006.229.13:07:25.13#ibcon#enter sib2, iclass 24, count 0 2006.229.13:07:25.13#ibcon#flushed, iclass 24, count 0 2006.229.13:07:25.13#ibcon#about to write, iclass 24, count 0 2006.229.13:07:25.13#ibcon#wrote, iclass 24, count 0 2006.229.13:07:25.13#ibcon#about to read 3, iclass 24, count 0 2006.229.13:07:25.15#ibcon#read 3, iclass 24, count 0 2006.229.13:07:25.15#ibcon#about to read 4, iclass 24, count 0 2006.229.13:07:25.15#ibcon#read 4, iclass 24, count 0 2006.229.13:07:25.15#ibcon#about to read 5, iclass 24, count 0 2006.229.13:07:25.15#ibcon#read 5, iclass 24, count 0 2006.229.13:07:25.15#ibcon#about to read 6, iclass 24, count 0 2006.229.13:07:25.15#ibcon#read 6, iclass 24, count 0 2006.229.13:07:25.15#ibcon#end of sib2, iclass 24, count 0 2006.229.13:07:25.15#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:07:25.15#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:07:25.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:07:25.15#ibcon#*before write, iclass 24, count 0 2006.229.13:07:25.15#ibcon#enter sib2, iclass 24, count 0 2006.229.13:07:25.15#ibcon#flushed, iclass 24, count 0 2006.229.13:07:25.15#ibcon#about to write, iclass 24, count 0 2006.229.13:07:25.15#ibcon#wrote, iclass 24, count 0 2006.229.13:07:25.15#ibcon#about to read 3, iclass 24, count 0 2006.229.13:07:25.19#ibcon#read 3, iclass 24, count 0 2006.229.13:07:25.19#ibcon#about to read 4, iclass 24, count 0 2006.229.13:07:25.19#ibcon#read 4, iclass 24, count 0 2006.229.13:07:25.19#ibcon#about to read 5, iclass 24, count 0 2006.229.13:07:25.19#ibcon#read 5, iclass 24, count 0 2006.229.13:07:25.19#ibcon#about to read 6, iclass 24, count 0 2006.229.13:07:25.19#ibcon#read 6, iclass 24, count 0 2006.229.13:07:25.19#ibcon#end of sib2, iclass 24, count 0 2006.229.13:07:25.19#ibcon#*after write, iclass 24, count 0 2006.229.13:07:25.19#ibcon#*before return 0, iclass 24, count 0 2006.229.13:07:25.19#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:25.19#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:25.19#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:07:25.19#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:07:25.19$vck44/va=4,7 2006.229.13:07:25.19#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:07:25.19#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:07:25.19#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:25.19#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:25.25#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:25.25#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:25.25#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:07:25.25#ibcon#first serial, iclass 26, count 2 2006.229.13:07:25.25#ibcon#enter sib2, iclass 26, count 2 2006.229.13:07:25.25#ibcon#flushed, iclass 26, count 2 2006.229.13:07:25.25#ibcon#about to write, iclass 26, count 2 2006.229.13:07:25.25#ibcon#wrote, iclass 26, count 2 2006.229.13:07:25.25#ibcon#about to read 3, iclass 26, count 2 2006.229.13:07:25.27#ibcon#read 3, iclass 26, count 2 2006.229.13:07:25.27#ibcon#about to read 4, iclass 26, count 2 2006.229.13:07:25.27#ibcon#read 4, iclass 26, count 2 2006.229.13:07:25.27#ibcon#about to read 5, iclass 26, count 2 2006.229.13:07:25.27#ibcon#read 5, iclass 26, count 2 2006.229.13:07:25.27#ibcon#about to read 6, iclass 26, count 2 2006.229.13:07:25.27#ibcon#read 6, iclass 26, count 2 2006.229.13:07:25.27#ibcon#end of sib2, iclass 26, count 2 2006.229.13:07:25.27#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:07:25.27#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:07:25.27#ibcon#[25=AT04-07\r\n] 2006.229.13:07:25.27#ibcon#*before write, iclass 26, count 2 2006.229.13:07:25.27#ibcon#enter sib2, iclass 26, count 2 2006.229.13:07:25.27#ibcon#flushed, iclass 26, count 2 2006.229.13:07:25.27#ibcon#about to write, iclass 26, count 2 2006.229.13:07:25.27#ibcon#wrote, iclass 26, count 2 2006.229.13:07:25.27#ibcon#about to read 3, iclass 26, count 2 2006.229.13:07:25.30#ibcon#read 3, iclass 26, count 2 2006.229.13:07:25.30#ibcon#about to read 4, iclass 26, count 2 2006.229.13:07:25.30#ibcon#read 4, iclass 26, count 2 2006.229.13:07:25.30#ibcon#about to read 5, iclass 26, count 2 2006.229.13:07:25.30#ibcon#read 5, iclass 26, count 2 2006.229.13:07:25.30#ibcon#about to read 6, iclass 26, count 2 2006.229.13:07:25.30#ibcon#read 6, iclass 26, count 2 2006.229.13:07:25.30#ibcon#end of sib2, iclass 26, count 2 2006.229.13:07:25.30#ibcon#*after write, iclass 26, count 2 2006.229.13:07:25.30#ibcon#*before return 0, iclass 26, count 2 2006.229.13:07:25.30#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:25.30#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:25.30#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:07:25.30#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:25.30#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:25.42#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:25.42#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:25.42#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:07:25.42#ibcon#first serial, iclass 26, count 0 2006.229.13:07:25.42#ibcon#enter sib2, iclass 26, count 0 2006.229.13:07:25.42#ibcon#flushed, iclass 26, count 0 2006.229.13:07:25.42#ibcon#about to write, iclass 26, count 0 2006.229.13:07:25.42#ibcon#wrote, iclass 26, count 0 2006.229.13:07:25.42#ibcon#about to read 3, iclass 26, count 0 2006.229.13:07:25.44#ibcon#read 3, iclass 26, count 0 2006.229.13:07:25.44#ibcon#about to read 4, iclass 26, count 0 2006.229.13:07:25.44#ibcon#read 4, iclass 26, count 0 2006.229.13:07:25.44#ibcon#about to read 5, iclass 26, count 0 2006.229.13:07:25.44#ibcon#read 5, iclass 26, count 0 2006.229.13:07:25.44#ibcon#about to read 6, iclass 26, count 0 2006.229.13:07:25.44#ibcon#read 6, iclass 26, count 0 2006.229.13:07:25.44#ibcon#end of sib2, iclass 26, count 0 2006.229.13:07:25.44#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:07:25.44#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:07:25.44#ibcon#[25=USB\r\n] 2006.229.13:07:25.44#ibcon#*before write, iclass 26, count 0 2006.229.13:07:25.44#ibcon#enter sib2, iclass 26, count 0 2006.229.13:07:25.44#ibcon#flushed, iclass 26, count 0 2006.229.13:07:25.44#ibcon#about to write, iclass 26, count 0 2006.229.13:07:25.44#ibcon#wrote, iclass 26, count 0 2006.229.13:07:25.44#ibcon#about to read 3, iclass 26, count 0 2006.229.13:07:25.47#ibcon#read 3, iclass 26, count 0 2006.229.13:07:25.47#ibcon#about to read 4, iclass 26, count 0 2006.229.13:07:25.47#ibcon#read 4, iclass 26, count 0 2006.229.13:07:25.47#ibcon#about to read 5, iclass 26, count 0 2006.229.13:07:25.47#ibcon#read 5, iclass 26, count 0 2006.229.13:07:25.47#ibcon#about to read 6, iclass 26, count 0 2006.229.13:07:25.47#ibcon#read 6, iclass 26, count 0 2006.229.13:07:25.47#ibcon#end of sib2, iclass 26, count 0 2006.229.13:07:25.47#ibcon#*after write, iclass 26, count 0 2006.229.13:07:25.47#ibcon#*before return 0, iclass 26, count 0 2006.229.13:07:25.47#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:25.47#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:25.47#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:07:25.47#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:07:25.47$vck44/valo=5,734.99 2006.229.13:07:25.47#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:07:25.47#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:07:25.47#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:25.47#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:25.47#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:25.47#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:25.47#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:07:25.47#ibcon#first serial, iclass 28, count 0 2006.229.13:07:25.47#ibcon#enter sib2, iclass 28, count 0 2006.229.13:07:25.47#ibcon#flushed, iclass 28, count 0 2006.229.13:07:25.47#ibcon#about to write, iclass 28, count 0 2006.229.13:07:25.47#ibcon#wrote, iclass 28, count 0 2006.229.13:07:25.47#ibcon#about to read 3, iclass 28, count 0 2006.229.13:07:25.49#ibcon#read 3, iclass 28, count 0 2006.229.13:07:25.49#ibcon#about to read 4, iclass 28, count 0 2006.229.13:07:25.49#ibcon#read 4, iclass 28, count 0 2006.229.13:07:25.49#ibcon#about to read 5, iclass 28, count 0 2006.229.13:07:25.49#ibcon#read 5, iclass 28, count 0 2006.229.13:07:25.49#ibcon#about to read 6, iclass 28, count 0 2006.229.13:07:25.49#ibcon#read 6, iclass 28, count 0 2006.229.13:07:25.49#ibcon#end of sib2, iclass 28, count 0 2006.229.13:07:25.49#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:07:25.49#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:07:25.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:07:25.49#ibcon#*before write, iclass 28, count 0 2006.229.13:07:25.49#ibcon#enter sib2, iclass 28, count 0 2006.229.13:07:25.49#ibcon#flushed, iclass 28, count 0 2006.229.13:07:25.49#ibcon#about to write, iclass 28, count 0 2006.229.13:07:25.49#ibcon#wrote, iclass 28, count 0 2006.229.13:07:25.49#ibcon#about to read 3, iclass 28, count 0 2006.229.13:07:25.53#ibcon#read 3, iclass 28, count 0 2006.229.13:07:25.53#ibcon#about to read 4, iclass 28, count 0 2006.229.13:07:25.53#ibcon#read 4, iclass 28, count 0 2006.229.13:07:25.53#ibcon#about to read 5, iclass 28, count 0 2006.229.13:07:25.53#ibcon#read 5, iclass 28, count 0 2006.229.13:07:25.53#ibcon#about to read 6, iclass 28, count 0 2006.229.13:07:25.53#ibcon#read 6, iclass 28, count 0 2006.229.13:07:25.53#ibcon#end of sib2, iclass 28, count 0 2006.229.13:07:25.53#ibcon#*after write, iclass 28, count 0 2006.229.13:07:25.53#ibcon#*before return 0, iclass 28, count 0 2006.229.13:07:25.53#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:25.53#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:25.53#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:07:25.53#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:07:25.53$vck44/va=5,4 2006.229.13:07:25.53#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:07:25.53#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:07:25.53#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:25.53#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:25.59#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:25.59#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:25.59#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:07:25.59#ibcon#first serial, iclass 30, count 2 2006.229.13:07:25.59#ibcon#enter sib2, iclass 30, count 2 2006.229.13:07:25.59#ibcon#flushed, iclass 30, count 2 2006.229.13:07:25.59#ibcon#about to write, iclass 30, count 2 2006.229.13:07:25.59#ibcon#wrote, iclass 30, count 2 2006.229.13:07:25.59#ibcon#about to read 3, iclass 30, count 2 2006.229.13:07:25.61#ibcon#read 3, iclass 30, count 2 2006.229.13:07:25.61#ibcon#about to read 4, iclass 30, count 2 2006.229.13:07:25.61#ibcon#read 4, iclass 30, count 2 2006.229.13:07:25.61#ibcon#about to read 5, iclass 30, count 2 2006.229.13:07:25.61#ibcon#read 5, iclass 30, count 2 2006.229.13:07:25.61#ibcon#about to read 6, iclass 30, count 2 2006.229.13:07:25.61#ibcon#read 6, iclass 30, count 2 2006.229.13:07:25.61#ibcon#end of sib2, iclass 30, count 2 2006.229.13:07:25.61#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:07:25.61#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:07:25.61#ibcon#[25=AT05-04\r\n] 2006.229.13:07:25.61#ibcon#*before write, iclass 30, count 2 2006.229.13:07:25.61#ibcon#enter sib2, iclass 30, count 2 2006.229.13:07:25.61#ibcon#flushed, iclass 30, count 2 2006.229.13:07:25.61#ibcon#about to write, iclass 30, count 2 2006.229.13:07:25.61#ibcon#wrote, iclass 30, count 2 2006.229.13:07:25.61#ibcon#about to read 3, iclass 30, count 2 2006.229.13:07:25.64#ibcon#read 3, iclass 30, count 2 2006.229.13:07:25.64#ibcon#about to read 4, iclass 30, count 2 2006.229.13:07:25.64#ibcon#read 4, iclass 30, count 2 2006.229.13:07:25.64#ibcon#about to read 5, iclass 30, count 2 2006.229.13:07:25.64#ibcon#read 5, iclass 30, count 2 2006.229.13:07:25.64#ibcon#about to read 6, iclass 30, count 2 2006.229.13:07:25.64#ibcon#read 6, iclass 30, count 2 2006.229.13:07:25.64#ibcon#end of sib2, iclass 30, count 2 2006.229.13:07:25.64#ibcon#*after write, iclass 30, count 2 2006.229.13:07:25.64#ibcon#*before return 0, iclass 30, count 2 2006.229.13:07:25.64#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:25.64#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:25.64#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:07:25.64#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:25.64#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:25.76#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:25.76#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:25.76#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:07:25.76#ibcon#first serial, iclass 30, count 0 2006.229.13:07:25.76#ibcon#enter sib2, iclass 30, count 0 2006.229.13:07:25.76#ibcon#flushed, iclass 30, count 0 2006.229.13:07:25.76#ibcon#about to write, iclass 30, count 0 2006.229.13:07:25.76#ibcon#wrote, iclass 30, count 0 2006.229.13:07:25.76#ibcon#about to read 3, iclass 30, count 0 2006.229.13:07:25.78#ibcon#read 3, iclass 30, count 0 2006.229.13:07:25.78#ibcon#about to read 4, iclass 30, count 0 2006.229.13:07:25.78#ibcon#read 4, iclass 30, count 0 2006.229.13:07:25.78#ibcon#about to read 5, iclass 30, count 0 2006.229.13:07:25.78#ibcon#read 5, iclass 30, count 0 2006.229.13:07:25.78#ibcon#about to read 6, iclass 30, count 0 2006.229.13:07:25.78#ibcon#read 6, iclass 30, count 0 2006.229.13:07:25.78#ibcon#end of sib2, iclass 30, count 0 2006.229.13:07:25.78#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:07:25.78#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:07:25.78#ibcon#[25=USB\r\n] 2006.229.13:07:25.78#ibcon#*before write, iclass 30, count 0 2006.229.13:07:25.78#ibcon#enter sib2, iclass 30, count 0 2006.229.13:07:25.78#ibcon#flushed, iclass 30, count 0 2006.229.13:07:25.78#ibcon#about to write, iclass 30, count 0 2006.229.13:07:25.78#ibcon#wrote, iclass 30, count 0 2006.229.13:07:25.78#ibcon#about to read 3, iclass 30, count 0 2006.229.13:07:25.81#ibcon#read 3, iclass 30, count 0 2006.229.13:07:25.81#ibcon#about to read 4, iclass 30, count 0 2006.229.13:07:25.81#ibcon#read 4, iclass 30, count 0 2006.229.13:07:25.81#ibcon#about to read 5, iclass 30, count 0 2006.229.13:07:25.81#ibcon#read 5, iclass 30, count 0 2006.229.13:07:25.81#ibcon#about to read 6, iclass 30, count 0 2006.229.13:07:25.81#ibcon#read 6, iclass 30, count 0 2006.229.13:07:25.81#ibcon#end of sib2, iclass 30, count 0 2006.229.13:07:25.81#ibcon#*after write, iclass 30, count 0 2006.229.13:07:25.81#ibcon#*before return 0, iclass 30, count 0 2006.229.13:07:25.81#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:25.81#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:25.81#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:07:25.81#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:07:25.81$vck44/valo=6,814.99 2006.229.13:07:25.81#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:07:25.81#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:07:25.81#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:25.81#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:25.81#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:25.81#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:25.81#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:07:25.81#ibcon#first serial, iclass 32, count 0 2006.229.13:07:25.81#ibcon#enter sib2, iclass 32, count 0 2006.229.13:07:25.81#ibcon#flushed, iclass 32, count 0 2006.229.13:07:25.81#ibcon#about to write, iclass 32, count 0 2006.229.13:07:25.81#ibcon#wrote, iclass 32, count 0 2006.229.13:07:25.81#ibcon#about to read 3, iclass 32, count 0 2006.229.13:07:25.83#ibcon#read 3, iclass 32, count 0 2006.229.13:07:25.83#ibcon#about to read 4, iclass 32, count 0 2006.229.13:07:25.83#ibcon#read 4, iclass 32, count 0 2006.229.13:07:25.83#ibcon#about to read 5, iclass 32, count 0 2006.229.13:07:25.83#ibcon#read 5, iclass 32, count 0 2006.229.13:07:25.83#ibcon#about to read 6, iclass 32, count 0 2006.229.13:07:25.83#ibcon#read 6, iclass 32, count 0 2006.229.13:07:25.83#ibcon#end of sib2, iclass 32, count 0 2006.229.13:07:25.83#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:07:25.83#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:07:25.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:07:25.83#ibcon#*before write, iclass 32, count 0 2006.229.13:07:25.83#ibcon#enter sib2, iclass 32, count 0 2006.229.13:07:25.83#ibcon#flushed, iclass 32, count 0 2006.229.13:07:25.83#ibcon#about to write, iclass 32, count 0 2006.229.13:07:25.83#ibcon#wrote, iclass 32, count 0 2006.229.13:07:25.83#ibcon#about to read 3, iclass 32, count 0 2006.229.13:07:25.87#ibcon#read 3, iclass 32, count 0 2006.229.13:07:25.87#ibcon#about to read 4, iclass 32, count 0 2006.229.13:07:25.87#ibcon#read 4, iclass 32, count 0 2006.229.13:07:25.87#ibcon#about to read 5, iclass 32, count 0 2006.229.13:07:25.87#ibcon#read 5, iclass 32, count 0 2006.229.13:07:25.87#ibcon#about to read 6, iclass 32, count 0 2006.229.13:07:25.87#ibcon#read 6, iclass 32, count 0 2006.229.13:07:25.87#ibcon#end of sib2, iclass 32, count 0 2006.229.13:07:25.87#ibcon#*after write, iclass 32, count 0 2006.229.13:07:25.87#ibcon#*before return 0, iclass 32, count 0 2006.229.13:07:25.87#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:25.87#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:25.87#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:07:25.87#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:07:25.87$vck44/va=6,4 2006.229.13:07:25.87#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:07:25.87#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:07:25.87#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:25.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:25.93#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:25.93#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:25.93#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:07:25.93#ibcon#first serial, iclass 34, count 2 2006.229.13:07:25.93#ibcon#enter sib2, iclass 34, count 2 2006.229.13:07:25.93#ibcon#flushed, iclass 34, count 2 2006.229.13:07:25.93#ibcon#about to write, iclass 34, count 2 2006.229.13:07:25.93#ibcon#wrote, iclass 34, count 2 2006.229.13:07:25.93#ibcon#about to read 3, iclass 34, count 2 2006.229.13:07:25.95#ibcon#read 3, iclass 34, count 2 2006.229.13:07:25.95#ibcon#about to read 4, iclass 34, count 2 2006.229.13:07:25.95#ibcon#read 4, iclass 34, count 2 2006.229.13:07:25.95#ibcon#about to read 5, iclass 34, count 2 2006.229.13:07:25.95#ibcon#read 5, iclass 34, count 2 2006.229.13:07:25.95#ibcon#about to read 6, iclass 34, count 2 2006.229.13:07:25.95#ibcon#read 6, iclass 34, count 2 2006.229.13:07:25.95#ibcon#end of sib2, iclass 34, count 2 2006.229.13:07:25.95#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:07:25.95#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:07:25.95#ibcon#[25=AT06-04\r\n] 2006.229.13:07:25.95#ibcon#*before write, iclass 34, count 2 2006.229.13:07:25.95#ibcon#enter sib2, iclass 34, count 2 2006.229.13:07:25.95#ibcon#flushed, iclass 34, count 2 2006.229.13:07:25.95#ibcon#about to write, iclass 34, count 2 2006.229.13:07:25.95#ibcon#wrote, iclass 34, count 2 2006.229.13:07:25.95#ibcon#about to read 3, iclass 34, count 2 2006.229.13:07:25.98#ibcon#read 3, iclass 34, count 2 2006.229.13:07:25.98#ibcon#about to read 4, iclass 34, count 2 2006.229.13:07:25.98#ibcon#read 4, iclass 34, count 2 2006.229.13:07:25.98#ibcon#about to read 5, iclass 34, count 2 2006.229.13:07:25.98#ibcon#read 5, iclass 34, count 2 2006.229.13:07:25.98#ibcon#about to read 6, iclass 34, count 2 2006.229.13:07:25.98#ibcon#read 6, iclass 34, count 2 2006.229.13:07:25.98#ibcon#end of sib2, iclass 34, count 2 2006.229.13:07:25.98#ibcon#*after write, iclass 34, count 2 2006.229.13:07:25.98#ibcon#*before return 0, iclass 34, count 2 2006.229.13:07:25.98#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:25.98#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:25.98#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:07:25.98#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:25.98#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:26.10#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:26.10#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:26.10#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:07:26.10#ibcon#first serial, iclass 34, count 0 2006.229.13:07:26.10#ibcon#enter sib2, iclass 34, count 0 2006.229.13:07:26.10#ibcon#flushed, iclass 34, count 0 2006.229.13:07:26.10#ibcon#about to write, iclass 34, count 0 2006.229.13:07:26.10#ibcon#wrote, iclass 34, count 0 2006.229.13:07:26.10#ibcon#about to read 3, iclass 34, count 0 2006.229.13:07:26.12#ibcon#read 3, iclass 34, count 0 2006.229.13:07:26.12#ibcon#about to read 4, iclass 34, count 0 2006.229.13:07:26.12#ibcon#read 4, iclass 34, count 0 2006.229.13:07:26.12#ibcon#about to read 5, iclass 34, count 0 2006.229.13:07:26.12#ibcon#read 5, iclass 34, count 0 2006.229.13:07:26.12#ibcon#about to read 6, iclass 34, count 0 2006.229.13:07:26.12#ibcon#read 6, iclass 34, count 0 2006.229.13:07:26.12#ibcon#end of sib2, iclass 34, count 0 2006.229.13:07:26.12#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:07:26.12#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:07:26.12#ibcon#[25=USB\r\n] 2006.229.13:07:26.12#ibcon#*before write, iclass 34, count 0 2006.229.13:07:26.12#ibcon#enter sib2, iclass 34, count 0 2006.229.13:07:26.12#ibcon#flushed, iclass 34, count 0 2006.229.13:07:26.12#ibcon#about to write, iclass 34, count 0 2006.229.13:07:26.12#ibcon#wrote, iclass 34, count 0 2006.229.13:07:26.12#ibcon#about to read 3, iclass 34, count 0 2006.229.13:07:26.15#ibcon#read 3, iclass 34, count 0 2006.229.13:07:26.15#ibcon#about to read 4, iclass 34, count 0 2006.229.13:07:26.15#ibcon#read 4, iclass 34, count 0 2006.229.13:07:26.15#ibcon#about to read 5, iclass 34, count 0 2006.229.13:07:26.15#ibcon#read 5, iclass 34, count 0 2006.229.13:07:26.15#ibcon#about to read 6, iclass 34, count 0 2006.229.13:07:26.15#ibcon#read 6, iclass 34, count 0 2006.229.13:07:26.15#ibcon#end of sib2, iclass 34, count 0 2006.229.13:07:26.15#ibcon#*after write, iclass 34, count 0 2006.229.13:07:26.15#ibcon#*before return 0, iclass 34, count 0 2006.229.13:07:26.15#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:26.15#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:26.15#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:07:26.15#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:07:26.15$vck44/valo=7,864.99 2006.229.13:07:26.15#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:07:26.15#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:07:26.15#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:26.15#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:26.15#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:26.15#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:26.15#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:07:26.15#ibcon#first serial, iclass 36, count 0 2006.229.13:07:26.15#ibcon#enter sib2, iclass 36, count 0 2006.229.13:07:26.15#ibcon#flushed, iclass 36, count 0 2006.229.13:07:26.15#ibcon#about to write, iclass 36, count 0 2006.229.13:07:26.15#ibcon#wrote, iclass 36, count 0 2006.229.13:07:26.15#ibcon#about to read 3, iclass 36, count 0 2006.229.13:07:26.17#ibcon#read 3, iclass 36, count 0 2006.229.13:07:26.17#ibcon#about to read 4, iclass 36, count 0 2006.229.13:07:26.17#ibcon#read 4, iclass 36, count 0 2006.229.13:07:26.17#ibcon#about to read 5, iclass 36, count 0 2006.229.13:07:26.17#ibcon#read 5, iclass 36, count 0 2006.229.13:07:26.17#ibcon#about to read 6, iclass 36, count 0 2006.229.13:07:26.17#ibcon#read 6, iclass 36, count 0 2006.229.13:07:26.17#ibcon#end of sib2, iclass 36, count 0 2006.229.13:07:26.17#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:07:26.17#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:07:26.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:07:26.17#ibcon#*before write, iclass 36, count 0 2006.229.13:07:26.17#ibcon#enter sib2, iclass 36, count 0 2006.229.13:07:26.17#ibcon#flushed, iclass 36, count 0 2006.229.13:07:26.17#ibcon#about to write, iclass 36, count 0 2006.229.13:07:26.17#ibcon#wrote, iclass 36, count 0 2006.229.13:07:26.17#ibcon#about to read 3, iclass 36, count 0 2006.229.13:07:26.21#ibcon#read 3, iclass 36, count 0 2006.229.13:07:26.21#ibcon#about to read 4, iclass 36, count 0 2006.229.13:07:26.21#ibcon#read 4, iclass 36, count 0 2006.229.13:07:26.21#ibcon#about to read 5, iclass 36, count 0 2006.229.13:07:26.21#ibcon#read 5, iclass 36, count 0 2006.229.13:07:26.21#ibcon#about to read 6, iclass 36, count 0 2006.229.13:07:26.21#ibcon#read 6, iclass 36, count 0 2006.229.13:07:26.21#ibcon#end of sib2, iclass 36, count 0 2006.229.13:07:26.21#ibcon#*after write, iclass 36, count 0 2006.229.13:07:26.21#ibcon#*before return 0, iclass 36, count 0 2006.229.13:07:26.21#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:26.21#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:26.21#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:07:26.21#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:07:26.21$vck44/va=7,5 2006.229.13:07:26.21#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:07:26.21#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:07:26.21#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:26.21#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:26.27#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:26.27#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:26.27#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:07:26.27#ibcon#first serial, iclass 38, count 2 2006.229.13:07:26.27#ibcon#enter sib2, iclass 38, count 2 2006.229.13:07:26.27#ibcon#flushed, iclass 38, count 2 2006.229.13:07:26.27#ibcon#about to write, iclass 38, count 2 2006.229.13:07:26.27#ibcon#wrote, iclass 38, count 2 2006.229.13:07:26.27#ibcon#about to read 3, iclass 38, count 2 2006.229.13:07:26.29#ibcon#read 3, iclass 38, count 2 2006.229.13:07:26.29#ibcon#about to read 4, iclass 38, count 2 2006.229.13:07:26.29#ibcon#read 4, iclass 38, count 2 2006.229.13:07:26.29#ibcon#about to read 5, iclass 38, count 2 2006.229.13:07:26.29#ibcon#read 5, iclass 38, count 2 2006.229.13:07:26.29#ibcon#about to read 6, iclass 38, count 2 2006.229.13:07:26.29#ibcon#read 6, iclass 38, count 2 2006.229.13:07:26.29#ibcon#end of sib2, iclass 38, count 2 2006.229.13:07:26.29#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:07:26.29#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:07:26.29#ibcon#[25=AT07-05\r\n] 2006.229.13:07:26.29#ibcon#*before write, iclass 38, count 2 2006.229.13:07:26.29#ibcon#enter sib2, iclass 38, count 2 2006.229.13:07:26.29#ibcon#flushed, iclass 38, count 2 2006.229.13:07:26.29#ibcon#about to write, iclass 38, count 2 2006.229.13:07:26.29#ibcon#wrote, iclass 38, count 2 2006.229.13:07:26.29#ibcon#about to read 3, iclass 38, count 2 2006.229.13:07:26.32#ibcon#read 3, iclass 38, count 2 2006.229.13:07:26.32#ibcon#about to read 4, iclass 38, count 2 2006.229.13:07:26.32#ibcon#read 4, iclass 38, count 2 2006.229.13:07:26.32#ibcon#about to read 5, iclass 38, count 2 2006.229.13:07:26.32#ibcon#read 5, iclass 38, count 2 2006.229.13:07:26.32#ibcon#about to read 6, iclass 38, count 2 2006.229.13:07:26.32#ibcon#read 6, iclass 38, count 2 2006.229.13:07:26.32#ibcon#end of sib2, iclass 38, count 2 2006.229.13:07:26.32#ibcon#*after write, iclass 38, count 2 2006.229.13:07:26.32#ibcon#*before return 0, iclass 38, count 2 2006.229.13:07:26.32#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:26.32#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:26.32#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:07:26.32#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:26.32#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:26.44#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:26.44#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:26.44#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:07:26.44#ibcon#first serial, iclass 38, count 0 2006.229.13:07:26.44#ibcon#enter sib2, iclass 38, count 0 2006.229.13:07:26.44#ibcon#flushed, iclass 38, count 0 2006.229.13:07:26.44#ibcon#about to write, iclass 38, count 0 2006.229.13:07:26.44#ibcon#wrote, iclass 38, count 0 2006.229.13:07:26.44#ibcon#about to read 3, iclass 38, count 0 2006.229.13:07:26.46#ibcon#read 3, iclass 38, count 0 2006.229.13:07:26.46#ibcon#about to read 4, iclass 38, count 0 2006.229.13:07:26.46#ibcon#read 4, iclass 38, count 0 2006.229.13:07:26.46#ibcon#about to read 5, iclass 38, count 0 2006.229.13:07:26.46#ibcon#read 5, iclass 38, count 0 2006.229.13:07:26.46#ibcon#about to read 6, iclass 38, count 0 2006.229.13:07:26.46#ibcon#read 6, iclass 38, count 0 2006.229.13:07:26.46#ibcon#end of sib2, iclass 38, count 0 2006.229.13:07:26.46#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:07:26.46#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:07:26.46#ibcon#[25=USB\r\n] 2006.229.13:07:26.46#ibcon#*before write, iclass 38, count 0 2006.229.13:07:26.46#ibcon#enter sib2, iclass 38, count 0 2006.229.13:07:26.46#ibcon#flushed, iclass 38, count 0 2006.229.13:07:26.46#ibcon#about to write, iclass 38, count 0 2006.229.13:07:26.46#ibcon#wrote, iclass 38, count 0 2006.229.13:07:26.46#ibcon#about to read 3, iclass 38, count 0 2006.229.13:07:26.49#ibcon#read 3, iclass 38, count 0 2006.229.13:07:26.49#ibcon#about to read 4, iclass 38, count 0 2006.229.13:07:26.49#ibcon#read 4, iclass 38, count 0 2006.229.13:07:26.49#ibcon#about to read 5, iclass 38, count 0 2006.229.13:07:26.49#ibcon#read 5, iclass 38, count 0 2006.229.13:07:26.49#ibcon#about to read 6, iclass 38, count 0 2006.229.13:07:26.49#ibcon#read 6, iclass 38, count 0 2006.229.13:07:26.49#ibcon#end of sib2, iclass 38, count 0 2006.229.13:07:26.49#ibcon#*after write, iclass 38, count 0 2006.229.13:07:26.49#ibcon#*before return 0, iclass 38, count 0 2006.229.13:07:26.49#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:26.49#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:26.49#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:07:26.49#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:07:26.49$vck44/valo=8,884.99 2006.229.13:07:26.49#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:07:26.49#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:07:26.49#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:26.49#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:26.49#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:26.49#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:26.49#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:07:26.49#ibcon#first serial, iclass 40, count 0 2006.229.13:07:26.49#ibcon#enter sib2, iclass 40, count 0 2006.229.13:07:26.49#ibcon#flushed, iclass 40, count 0 2006.229.13:07:26.49#ibcon#about to write, iclass 40, count 0 2006.229.13:07:26.49#ibcon#wrote, iclass 40, count 0 2006.229.13:07:26.49#ibcon#about to read 3, iclass 40, count 0 2006.229.13:07:26.51#ibcon#read 3, iclass 40, count 0 2006.229.13:07:26.51#ibcon#about to read 4, iclass 40, count 0 2006.229.13:07:26.51#ibcon#read 4, iclass 40, count 0 2006.229.13:07:26.51#ibcon#about to read 5, iclass 40, count 0 2006.229.13:07:26.51#ibcon#read 5, iclass 40, count 0 2006.229.13:07:26.51#ibcon#about to read 6, iclass 40, count 0 2006.229.13:07:26.51#ibcon#read 6, iclass 40, count 0 2006.229.13:07:26.51#ibcon#end of sib2, iclass 40, count 0 2006.229.13:07:26.51#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:07:26.51#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:07:26.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:07:26.51#ibcon#*before write, iclass 40, count 0 2006.229.13:07:26.51#ibcon#enter sib2, iclass 40, count 0 2006.229.13:07:26.51#ibcon#flushed, iclass 40, count 0 2006.229.13:07:26.51#ibcon#about to write, iclass 40, count 0 2006.229.13:07:26.51#ibcon#wrote, iclass 40, count 0 2006.229.13:07:26.51#ibcon#about to read 3, iclass 40, count 0 2006.229.13:07:26.55#ibcon#read 3, iclass 40, count 0 2006.229.13:07:26.55#ibcon#about to read 4, iclass 40, count 0 2006.229.13:07:26.55#ibcon#read 4, iclass 40, count 0 2006.229.13:07:26.55#ibcon#about to read 5, iclass 40, count 0 2006.229.13:07:26.55#ibcon#read 5, iclass 40, count 0 2006.229.13:07:26.55#ibcon#about to read 6, iclass 40, count 0 2006.229.13:07:26.55#ibcon#read 6, iclass 40, count 0 2006.229.13:07:26.55#ibcon#end of sib2, iclass 40, count 0 2006.229.13:07:26.55#ibcon#*after write, iclass 40, count 0 2006.229.13:07:26.55#ibcon#*before return 0, iclass 40, count 0 2006.229.13:07:26.55#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:26.55#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:26.55#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:07:26.55#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:07:26.55$vck44/va=8,6 2006.229.13:07:26.55#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.13:07:26.55#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.13:07:26.55#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:26.55#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:07:26.61#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:07:26.61#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:07:26.61#ibcon#enter wrdev, iclass 4, count 2 2006.229.13:07:26.61#ibcon#first serial, iclass 4, count 2 2006.229.13:07:26.61#ibcon#enter sib2, iclass 4, count 2 2006.229.13:07:26.61#ibcon#flushed, iclass 4, count 2 2006.229.13:07:26.61#ibcon#about to write, iclass 4, count 2 2006.229.13:07:26.61#ibcon#wrote, iclass 4, count 2 2006.229.13:07:26.61#ibcon#about to read 3, iclass 4, count 2 2006.229.13:07:26.63#ibcon#read 3, iclass 4, count 2 2006.229.13:07:26.63#ibcon#about to read 4, iclass 4, count 2 2006.229.13:07:26.63#ibcon#read 4, iclass 4, count 2 2006.229.13:07:26.63#ibcon#about to read 5, iclass 4, count 2 2006.229.13:07:26.63#ibcon#read 5, iclass 4, count 2 2006.229.13:07:26.63#ibcon#about to read 6, iclass 4, count 2 2006.229.13:07:26.63#ibcon#read 6, iclass 4, count 2 2006.229.13:07:26.63#ibcon#end of sib2, iclass 4, count 2 2006.229.13:07:26.63#ibcon#*mode == 0, iclass 4, count 2 2006.229.13:07:26.63#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.13:07:26.63#ibcon#[25=AT08-06\r\n] 2006.229.13:07:26.63#ibcon#*before write, iclass 4, count 2 2006.229.13:07:26.63#ibcon#enter sib2, iclass 4, count 2 2006.229.13:07:26.63#ibcon#flushed, iclass 4, count 2 2006.229.13:07:26.63#ibcon#about to write, iclass 4, count 2 2006.229.13:07:26.63#ibcon#wrote, iclass 4, count 2 2006.229.13:07:26.63#ibcon#about to read 3, iclass 4, count 2 2006.229.13:07:26.66#ibcon#read 3, iclass 4, count 2 2006.229.13:07:26.66#ibcon#about to read 4, iclass 4, count 2 2006.229.13:07:26.66#ibcon#read 4, iclass 4, count 2 2006.229.13:07:26.66#ibcon#about to read 5, iclass 4, count 2 2006.229.13:07:26.66#ibcon#read 5, iclass 4, count 2 2006.229.13:07:26.66#ibcon#about to read 6, iclass 4, count 2 2006.229.13:07:26.66#ibcon#read 6, iclass 4, count 2 2006.229.13:07:26.66#ibcon#end of sib2, iclass 4, count 2 2006.229.13:07:26.66#ibcon#*after write, iclass 4, count 2 2006.229.13:07:26.66#ibcon#*before return 0, iclass 4, count 2 2006.229.13:07:26.66#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:07:26.66#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:07:26.66#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.13:07:26.66#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:26.66#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:07:26.78#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:07:26.78#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:07:26.78#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:07:26.78#ibcon#first serial, iclass 4, count 0 2006.229.13:07:26.78#ibcon#enter sib2, iclass 4, count 0 2006.229.13:07:26.78#ibcon#flushed, iclass 4, count 0 2006.229.13:07:26.78#ibcon#about to write, iclass 4, count 0 2006.229.13:07:26.78#ibcon#wrote, iclass 4, count 0 2006.229.13:07:26.78#ibcon#about to read 3, iclass 4, count 0 2006.229.13:07:26.80#ibcon#read 3, iclass 4, count 0 2006.229.13:07:26.80#ibcon#about to read 4, iclass 4, count 0 2006.229.13:07:26.80#ibcon#read 4, iclass 4, count 0 2006.229.13:07:26.80#ibcon#about to read 5, iclass 4, count 0 2006.229.13:07:26.80#ibcon#read 5, iclass 4, count 0 2006.229.13:07:26.80#ibcon#about to read 6, iclass 4, count 0 2006.229.13:07:26.80#ibcon#read 6, iclass 4, count 0 2006.229.13:07:26.80#ibcon#end of sib2, iclass 4, count 0 2006.229.13:07:26.80#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:07:26.80#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:07:26.80#ibcon#[25=USB\r\n] 2006.229.13:07:26.80#ibcon#*before write, iclass 4, count 0 2006.229.13:07:26.80#ibcon#enter sib2, iclass 4, count 0 2006.229.13:07:26.80#ibcon#flushed, iclass 4, count 0 2006.229.13:07:26.80#ibcon#about to write, iclass 4, count 0 2006.229.13:07:26.80#ibcon#wrote, iclass 4, count 0 2006.229.13:07:26.80#ibcon#about to read 3, iclass 4, count 0 2006.229.13:07:26.83#ibcon#read 3, iclass 4, count 0 2006.229.13:07:26.83#ibcon#about to read 4, iclass 4, count 0 2006.229.13:07:26.83#ibcon#read 4, iclass 4, count 0 2006.229.13:07:26.83#ibcon#about to read 5, iclass 4, count 0 2006.229.13:07:26.83#ibcon#read 5, iclass 4, count 0 2006.229.13:07:26.83#ibcon#about to read 6, iclass 4, count 0 2006.229.13:07:26.83#ibcon#read 6, iclass 4, count 0 2006.229.13:07:26.83#ibcon#end of sib2, iclass 4, count 0 2006.229.13:07:26.83#ibcon#*after write, iclass 4, count 0 2006.229.13:07:26.83#ibcon#*before return 0, iclass 4, count 0 2006.229.13:07:26.83#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:07:26.83#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:07:26.83#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:07:26.83#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:07:26.83$vck44/vblo=1,629.99 2006.229.13:07:26.83#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:07:26.83#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:07:26.83#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:26.83#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:07:26.83#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:07:26.83#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:07:26.83#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:07:26.83#ibcon#first serial, iclass 6, count 0 2006.229.13:07:26.83#ibcon#enter sib2, iclass 6, count 0 2006.229.13:07:26.83#ibcon#flushed, iclass 6, count 0 2006.229.13:07:26.83#ibcon#about to write, iclass 6, count 0 2006.229.13:07:26.83#ibcon#wrote, iclass 6, count 0 2006.229.13:07:26.83#ibcon#about to read 3, iclass 6, count 0 2006.229.13:07:26.85#ibcon#read 3, iclass 6, count 0 2006.229.13:07:26.85#ibcon#about to read 4, iclass 6, count 0 2006.229.13:07:26.85#ibcon#read 4, iclass 6, count 0 2006.229.13:07:26.85#ibcon#about to read 5, iclass 6, count 0 2006.229.13:07:26.85#ibcon#read 5, iclass 6, count 0 2006.229.13:07:26.85#ibcon#about to read 6, iclass 6, count 0 2006.229.13:07:26.85#ibcon#read 6, iclass 6, count 0 2006.229.13:07:26.85#ibcon#end of sib2, iclass 6, count 0 2006.229.13:07:26.85#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:07:26.85#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:07:26.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:07:26.85#ibcon#*before write, iclass 6, count 0 2006.229.13:07:26.85#ibcon#enter sib2, iclass 6, count 0 2006.229.13:07:26.85#ibcon#flushed, iclass 6, count 0 2006.229.13:07:26.85#ibcon#about to write, iclass 6, count 0 2006.229.13:07:26.85#ibcon#wrote, iclass 6, count 0 2006.229.13:07:26.85#ibcon#about to read 3, iclass 6, count 0 2006.229.13:07:26.89#ibcon#read 3, iclass 6, count 0 2006.229.13:07:26.89#ibcon#about to read 4, iclass 6, count 0 2006.229.13:07:26.89#ibcon#read 4, iclass 6, count 0 2006.229.13:07:26.89#ibcon#about to read 5, iclass 6, count 0 2006.229.13:07:26.89#ibcon#read 5, iclass 6, count 0 2006.229.13:07:26.89#ibcon#about to read 6, iclass 6, count 0 2006.229.13:07:26.89#ibcon#read 6, iclass 6, count 0 2006.229.13:07:26.89#ibcon#end of sib2, iclass 6, count 0 2006.229.13:07:26.89#ibcon#*after write, iclass 6, count 0 2006.229.13:07:26.89#ibcon#*before return 0, iclass 6, count 0 2006.229.13:07:26.89#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:07:26.89#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:07:26.89#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:07:26.89#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:07:26.89$vck44/vb=1,4 2006.229.13:07:26.89#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.13:07:26.89#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.13:07:26.89#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:26.89#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:07:26.89#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:07:26.89#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:07:26.89#ibcon#enter wrdev, iclass 10, count 2 2006.229.13:07:26.89#ibcon#first serial, iclass 10, count 2 2006.229.13:07:26.89#ibcon#enter sib2, iclass 10, count 2 2006.229.13:07:26.89#ibcon#flushed, iclass 10, count 2 2006.229.13:07:26.89#ibcon#about to write, iclass 10, count 2 2006.229.13:07:26.89#ibcon#wrote, iclass 10, count 2 2006.229.13:07:26.89#ibcon#about to read 3, iclass 10, count 2 2006.229.13:07:26.91#ibcon#read 3, iclass 10, count 2 2006.229.13:07:26.91#ibcon#about to read 4, iclass 10, count 2 2006.229.13:07:26.91#ibcon#read 4, iclass 10, count 2 2006.229.13:07:26.91#ibcon#about to read 5, iclass 10, count 2 2006.229.13:07:26.91#ibcon#read 5, iclass 10, count 2 2006.229.13:07:26.91#ibcon#about to read 6, iclass 10, count 2 2006.229.13:07:26.91#ibcon#read 6, iclass 10, count 2 2006.229.13:07:26.91#ibcon#end of sib2, iclass 10, count 2 2006.229.13:07:26.91#ibcon#*mode == 0, iclass 10, count 2 2006.229.13:07:26.91#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.13:07:26.91#ibcon#[27=AT01-04\r\n] 2006.229.13:07:26.91#ibcon#*before write, iclass 10, count 2 2006.229.13:07:26.91#ibcon#enter sib2, iclass 10, count 2 2006.229.13:07:26.91#ibcon#flushed, iclass 10, count 2 2006.229.13:07:26.91#ibcon#about to write, iclass 10, count 2 2006.229.13:07:26.91#ibcon#wrote, iclass 10, count 2 2006.229.13:07:26.91#ibcon#about to read 3, iclass 10, count 2 2006.229.13:07:26.94#ibcon#read 3, iclass 10, count 2 2006.229.13:07:26.94#ibcon#about to read 4, iclass 10, count 2 2006.229.13:07:26.94#ibcon#read 4, iclass 10, count 2 2006.229.13:07:26.94#ibcon#about to read 5, iclass 10, count 2 2006.229.13:07:26.94#ibcon#read 5, iclass 10, count 2 2006.229.13:07:26.94#ibcon#about to read 6, iclass 10, count 2 2006.229.13:07:26.94#ibcon#read 6, iclass 10, count 2 2006.229.13:07:26.94#ibcon#end of sib2, iclass 10, count 2 2006.229.13:07:26.94#ibcon#*after write, iclass 10, count 2 2006.229.13:07:26.94#ibcon#*before return 0, iclass 10, count 2 2006.229.13:07:26.94#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:07:26.94#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:07:26.94#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.13:07:26.94#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:26.94#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:07:27.06#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:07:27.06#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:07:27.06#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:07:27.06#ibcon#first serial, iclass 10, count 0 2006.229.13:07:27.06#ibcon#enter sib2, iclass 10, count 0 2006.229.13:07:27.06#ibcon#flushed, iclass 10, count 0 2006.229.13:07:27.06#ibcon#about to write, iclass 10, count 0 2006.229.13:07:27.06#ibcon#wrote, iclass 10, count 0 2006.229.13:07:27.06#ibcon#about to read 3, iclass 10, count 0 2006.229.13:07:27.08#ibcon#read 3, iclass 10, count 0 2006.229.13:07:27.08#ibcon#about to read 4, iclass 10, count 0 2006.229.13:07:27.08#ibcon#read 4, iclass 10, count 0 2006.229.13:07:27.08#ibcon#about to read 5, iclass 10, count 0 2006.229.13:07:27.08#ibcon#read 5, iclass 10, count 0 2006.229.13:07:27.08#ibcon#about to read 6, iclass 10, count 0 2006.229.13:07:27.08#ibcon#read 6, iclass 10, count 0 2006.229.13:07:27.08#ibcon#end of sib2, iclass 10, count 0 2006.229.13:07:27.08#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:07:27.08#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:07:27.08#ibcon#[27=USB\r\n] 2006.229.13:07:27.08#ibcon#*before write, iclass 10, count 0 2006.229.13:07:27.08#ibcon#enter sib2, iclass 10, count 0 2006.229.13:07:27.08#ibcon#flushed, iclass 10, count 0 2006.229.13:07:27.08#ibcon#about to write, iclass 10, count 0 2006.229.13:07:27.08#ibcon#wrote, iclass 10, count 0 2006.229.13:07:27.08#ibcon#about to read 3, iclass 10, count 0 2006.229.13:07:27.11#ibcon#read 3, iclass 10, count 0 2006.229.13:07:27.11#ibcon#about to read 4, iclass 10, count 0 2006.229.13:07:27.11#ibcon#read 4, iclass 10, count 0 2006.229.13:07:27.11#ibcon#about to read 5, iclass 10, count 0 2006.229.13:07:27.11#ibcon#read 5, iclass 10, count 0 2006.229.13:07:27.11#ibcon#about to read 6, iclass 10, count 0 2006.229.13:07:27.11#ibcon#read 6, iclass 10, count 0 2006.229.13:07:27.11#ibcon#end of sib2, iclass 10, count 0 2006.229.13:07:27.11#ibcon#*after write, iclass 10, count 0 2006.229.13:07:27.11#ibcon#*before return 0, iclass 10, count 0 2006.229.13:07:27.11#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:07:27.11#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:07:27.11#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:07:27.11#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:07:27.11$vck44/vblo=2,634.99 2006.229.13:07:27.11#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:07:27.11#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:07:27.11#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:27.11#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:27.11#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:27.11#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:27.11#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:07:27.11#ibcon#first serial, iclass 12, count 0 2006.229.13:07:27.11#ibcon#enter sib2, iclass 12, count 0 2006.229.13:07:27.11#ibcon#flushed, iclass 12, count 0 2006.229.13:07:27.11#ibcon#about to write, iclass 12, count 0 2006.229.13:07:27.11#ibcon#wrote, iclass 12, count 0 2006.229.13:07:27.11#ibcon#about to read 3, iclass 12, count 0 2006.229.13:07:27.13#ibcon#read 3, iclass 12, count 0 2006.229.13:07:27.13#ibcon#about to read 4, iclass 12, count 0 2006.229.13:07:27.13#ibcon#read 4, iclass 12, count 0 2006.229.13:07:27.13#ibcon#about to read 5, iclass 12, count 0 2006.229.13:07:27.13#ibcon#read 5, iclass 12, count 0 2006.229.13:07:27.13#ibcon#about to read 6, iclass 12, count 0 2006.229.13:07:27.13#ibcon#read 6, iclass 12, count 0 2006.229.13:07:27.13#ibcon#end of sib2, iclass 12, count 0 2006.229.13:07:27.13#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:07:27.13#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:07:27.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:07:27.13#ibcon#*before write, iclass 12, count 0 2006.229.13:07:27.13#ibcon#enter sib2, iclass 12, count 0 2006.229.13:07:27.13#ibcon#flushed, iclass 12, count 0 2006.229.13:07:27.13#ibcon#about to write, iclass 12, count 0 2006.229.13:07:27.13#ibcon#wrote, iclass 12, count 0 2006.229.13:07:27.13#ibcon#about to read 3, iclass 12, count 0 2006.229.13:07:27.17#ibcon#read 3, iclass 12, count 0 2006.229.13:07:27.17#ibcon#about to read 4, iclass 12, count 0 2006.229.13:07:27.17#ibcon#read 4, iclass 12, count 0 2006.229.13:07:27.17#ibcon#about to read 5, iclass 12, count 0 2006.229.13:07:27.17#ibcon#read 5, iclass 12, count 0 2006.229.13:07:27.17#ibcon#about to read 6, iclass 12, count 0 2006.229.13:07:27.17#ibcon#read 6, iclass 12, count 0 2006.229.13:07:27.17#ibcon#end of sib2, iclass 12, count 0 2006.229.13:07:27.17#ibcon#*after write, iclass 12, count 0 2006.229.13:07:27.17#ibcon#*before return 0, iclass 12, count 0 2006.229.13:07:27.17#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:27.17#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:07:27.17#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:07:27.17#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:07:27.17$vck44/vb=2,4 2006.229.13:07:27.17#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:07:27.17#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:07:27.17#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:27.17#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:27.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:27.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:27.23#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:07:27.23#ibcon#first serial, iclass 14, count 2 2006.229.13:07:27.23#ibcon#enter sib2, iclass 14, count 2 2006.229.13:07:27.23#ibcon#flushed, iclass 14, count 2 2006.229.13:07:27.23#ibcon#about to write, iclass 14, count 2 2006.229.13:07:27.23#ibcon#wrote, iclass 14, count 2 2006.229.13:07:27.23#ibcon#about to read 3, iclass 14, count 2 2006.229.13:07:27.25#ibcon#read 3, iclass 14, count 2 2006.229.13:07:27.25#ibcon#about to read 4, iclass 14, count 2 2006.229.13:07:27.25#ibcon#read 4, iclass 14, count 2 2006.229.13:07:27.25#ibcon#about to read 5, iclass 14, count 2 2006.229.13:07:27.25#ibcon#read 5, iclass 14, count 2 2006.229.13:07:27.25#ibcon#about to read 6, iclass 14, count 2 2006.229.13:07:27.25#ibcon#read 6, iclass 14, count 2 2006.229.13:07:27.25#ibcon#end of sib2, iclass 14, count 2 2006.229.13:07:27.25#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:07:27.25#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:07:27.25#ibcon#[27=AT02-04\r\n] 2006.229.13:07:27.25#ibcon#*before write, iclass 14, count 2 2006.229.13:07:27.25#ibcon#enter sib2, iclass 14, count 2 2006.229.13:07:27.25#ibcon#flushed, iclass 14, count 2 2006.229.13:07:27.25#ibcon#about to write, iclass 14, count 2 2006.229.13:07:27.25#ibcon#wrote, iclass 14, count 2 2006.229.13:07:27.25#ibcon#about to read 3, iclass 14, count 2 2006.229.13:07:27.28#ibcon#read 3, iclass 14, count 2 2006.229.13:07:27.28#ibcon#about to read 4, iclass 14, count 2 2006.229.13:07:27.28#ibcon#read 4, iclass 14, count 2 2006.229.13:07:27.28#ibcon#about to read 5, iclass 14, count 2 2006.229.13:07:27.28#ibcon#read 5, iclass 14, count 2 2006.229.13:07:27.28#ibcon#about to read 6, iclass 14, count 2 2006.229.13:07:27.28#ibcon#read 6, iclass 14, count 2 2006.229.13:07:27.28#ibcon#end of sib2, iclass 14, count 2 2006.229.13:07:27.28#ibcon#*after write, iclass 14, count 2 2006.229.13:07:27.28#ibcon#*before return 0, iclass 14, count 2 2006.229.13:07:27.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:27.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:07:27.28#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:07:27.28#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:27.28#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:27.40#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:27.40#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:27.40#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:07:27.40#ibcon#first serial, iclass 14, count 0 2006.229.13:07:27.40#ibcon#enter sib2, iclass 14, count 0 2006.229.13:07:27.40#ibcon#flushed, iclass 14, count 0 2006.229.13:07:27.40#ibcon#about to write, iclass 14, count 0 2006.229.13:07:27.40#ibcon#wrote, iclass 14, count 0 2006.229.13:07:27.40#ibcon#about to read 3, iclass 14, count 0 2006.229.13:07:27.42#ibcon#read 3, iclass 14, count 0 2006.229.13:07:27.42#ibcon#about to read 4, iclass 14, count 0 2006.229.13:07:27.42#ibcon#read 4, iclass 14, count 0 2006.229.13:07:27.42#ibcon#about to read 5, iclass 14, count 0 2006.229.13:07:27.42#ibcon#read 5, iclass 14, count 0 2006.229.13:07:27.42#ibcon#about to read 6, iclass 14, count 0 2006.229.13:07:27.42#ibcon#read 6, iclass 14, count 0 2006.229.13:07:27.42#ibcon#end of sib2, iclass 14, count 0 2006.229.13:07:27.42#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:07:27.42#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:07:27.42#ibcon#[27=USB\r\n] 2006.229.13:07:27.42#ibcon#*before write, iclass 14, count 0 2006.229.13:07:27.42#ibcon#enter sib2, iclass 14, count 0 2006.229.13:07:27.42#ibcon#flushed, iclass 14, count 0 2006.229.13:07:27.42#ibcon#about to write, iclass 14, count 0 2006.229.13:07:27.42#ibcon#wrote, iclass 14, count 0 2006.229.13:07:27.42#ibcon#about to read 3, iclass 14, count 0 2006.229.13:07:27.45#ibcon#read 3, iclass 14, count 0 2006.229.13:07:27.45#ibcon#about to read 4, iclass 14, count 0 2006.229.13:07:27.45#ibcon#read 4, iclass 14, count 0 2006.229.13:07:27.45#ibcon#about to read 5, iclass 14, count 0 2006.229.13:07:27.45#ibcon#read 5, iclass 14, count 0 2006.229.13:07:27.45#ibcon#about to read 6, iclass 14, count 0 2006.229.13:07:27.45#ibcon#read 6, iclass 14, count 0 2006.229.13:07:27.45#ibcon#end of sib2, iclass 14, count 0 2006.229.13:07:27.45#ibcon#*after write, iclass 14, count 0 2006.229.13:07:27.45#ibcon#*before return 0, iclass 14, count 0 2006.229.13:07:27.45#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:27.45#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:07:27.45#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:07:27.45#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:07:27.45$vck44/vblo=3,649.99 2006.229.13:07:27.45#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:07:27.45#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:07:27.45#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:27.45#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:27.45#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:27.45#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:27.45#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:07:27.45#ibcon#first serial, iclass 16, count 0 2006.229.13:07:27.45#ibcon#enter sib2, iclass 16, count 0 2006.229.13:07:27.45#ibcon#flushed, iclass 16, count 0 2006.229.13:07:27.45#ibcon#about to write, iclass 16, count 0 2006.229.13:07:27.45#ibcon#wrote, iclass 16, count 0 2006.229.13:07:27.45#ibcon#about to read 3, iclass 16, count 0 2006.229.13:07:27.47#ibcon#read 3, iclass 16, count 0 2006.229.13:07:27.47#ibcon#about to read 4, iclass 16, count 0 2006.229.13:07:27.47#ibcon#read 4, iclass 16, count 0 2006.229.13:07:27.47#ibcon#about to read 5, iclass 16, count 0 2006.229.13:07:27.47#ibcon#read 5, iclass 16, count 0 2006.229.13:07:27.47#ibcon#about to read 6, iclass 16, count 0 2006.229.13:07:27.47#ibcon#read 6, iclass 16, count 0 2006.229.13:07:27.47#ibcon#end of sib2, iclass 16, count 0 2006.229.13:07:27.47#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:07:27.47#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:07:27.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:07:27.47#ibcon#*before write, iclass 16, count 0 2006.229.13:07:27.47#ibcon#enter sib2, iclass 16, count 0 2006.229.13:07:27.47#ibcon#flushed, iclass 16, count 0 2006.229.13:07:27.47#ibcon#about to write, iclass 16, count 0 2006.229.13:07:27.47#ibcon#wrote, iclass 16, count 0 2006.229.13:07:27.47#ibcon#about to read 3, iclass 16, count 0 2006.229.13:07:27.51#ibcon#read 3, iclass 16, count 0 2006.229.13:07:27.51#ibcon#about to read 4, iclass 16, count 0 2006.229.13:07:27.51#ibcon#read 4, iclass 16, count 0 2006.229.13:07:27.51#ibcon#about to read 5, iclass 16, count 0 2006.229.13:07:27.51#ibcon#read 5, iclass 16, count 0 2006.229.13:07:27.51#ibcon#about to read 6, iclass 16, count 0 2006.229.13:07:27.51#ibcon#read 6, iclass 16, count 0 2006.229.13:07:27.51#ibcon#end of sib2, iclass 16, count 0 2006.229.13:07:27.51#ibcon#*after write, iclass 16, count 0 2006.229.13:07:27.51#ibcon#*before return 0, iclass 16, count 0 2006.229.13:07:27.51#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:27.51#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:07:27.51#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:07:27.51#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:07:27.51$vck44/vb=3,4 2006.229.13:07:27.51#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:07:27.51#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:07:27.51#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:27.51#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:27.57#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:27.57#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:27.57#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:07:27.57#ibcon#first serial, iclass 18, count 2 2006.229.13:07:27.57#ibcon#enter sib2, iclass 18, count 2 2006.229.13:07:27.57#ibcon#flushed, iclass 18, count 2 2006.229.13:07:27.57#ibcon#about to write, iclass 18, count 2 2006.229.13:07:27.57#ibcon#wrote, iclass 18, count 2 2006.229.13:07:27.57#ibcon#about to read 3, iclass 18, count 2 2006.229.13:07:27.59#ibcon#read 3, iclass 18, count 2 2006.229.13:07:27.59#ibcon#about to read 4, iclass 18, count 2 2006.229.13:07:27.59#ibcon#read 4, iclass 18, count 2 2006.229.13:07:27.59#ibcon#about to read 5, iclass 18, count 2 2006.229.13:07:27.59#ibcon#read 5, iclass 18, count 2 2006.229.13:07:27.59#ibcon#about to read 6, iclass 18, count 2 2006.229.13:07:27.59#ibcon#read 6, iclass 18, count 2 2006.229.13:07:27.59#ibcon#end of sib2, iclass 18, count 2 2006.229.13:07:27.59#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:07:27.59#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:07:27.59#ibcon#[27=AT03-04\r\n] 2006.229.13:07:27.59#ibcon#*before write, iclass 18, count 2 2006.229.13:07:27.59#ibcon#enter sib2, iclass 18, count 2 2006.229.13:07:27.59#ibcon#flushed, iclass 18, count 2 2006.229.13:07:27.59#ibcon#about to write, iclass 18, count 2 2006.229.13:07:27.59#ibcon#wrote, iclass 18, count 2 2006.229.13:07:27.59#ibcon#about to read 3, iclass 18, count 2 2006.229.13:07:27.62#ibcon#read 3, iclass 18, count 2 2006.229.13:07:27.62#ibcon#about to read 4, iclass 18, count 2 2006.229.13:07:27.62#ibcon#read 4, iclass 18, count 2 2006.229.13:07:27.62#ibcon#about to read 5, iclass 18, count 2 2006.229.13:07:27.62#ibcon#read 5, iclass 18, count 2 2006.229.13:07:27.62#ibcon#about to read 6, iclass 18, count 2 2006.229.13:07:27.62#ibcon#read 6, iclass 18, count 2 2006.229.13:07:27.62#ibcon#end of sib2, iclass 18, count 2 2006.229.13:07:27.62#ibcon#*after write, iclass 18, count 2 2006.229.13:07:27.62#ibcon#*before return 0, iclass 18, count 2 2006.229.13:07:27.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:27.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:07:27.62#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:07:27.62#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:27.62#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:27.74#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:27.74#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:27.74#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:07:27.74#ibcon#first serial, iclass 18, count 0 2006.229.13:07:27.74#ibcon#enter sib2, iclass 18, count 0 2006.229.13:07:27.74#ibcon#flushed, iclass 18, count 0 2006.229.13:07:27.74#ibcon#about to write, iclass 18, count 0 2006.229.13:07:27.74#ibcon#wrote, iclass 18, count 0 2006.229.13:07:27.74#ibcon#about to read 3, iclass 18, count 0 2006.229.13:07:27.76#ibcon#read 3, iclass 18, count 0 2006.229.13:07:27.76#ibcon#about to read 4, iclass 18, count 0 2006.229.13:07:27.76#ibcon#read 4, iclass 18, count 0 2006.229.13:07:27.76#ibcon#about to read 5, iclass 18, count 0 2006.229.13:07:27.76#ibcon#read 5, iclass 18, count 0 2006.229.13:07:27.76#ibcon#about to read 6, iclass 18, count 0 2006.229.13:07:27.76#ibcon#read 6, iclass 18, count 0 2006.229.13:07:27.76#ibcon#end of sib2, iclass 18, count 0 2006.229.13:07:27.76#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:07:27.76#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:07:27.76#ibcon#[27=USB\r\n] 2006.229.13:07:27.76#ibcon#*before write, iclass 18, count 0 2006.229.13:07:27.76#ibcon#enter sib2, iclass 18, count 0 2006.229.13:07:27.76#ibcon#flushed, iclass 18, count 0 2006.229.13:07:27.76#ibcon#about to write, iclass 18, count 0 2006.229.13:07:27.76#ibcon#wrote, iclass 18, count 0 2006.229.13:07:27.76#ibcon#about to read 3, iclass 18, count 0 2006.229.13:07:27.79#ibcon#read 3, iclass 18, count 0 2006.229.13:07:27.79#ibcon#about to read 4, iclass 18, count 0 2006.229.13:07:27.79#ibcon#read 4, iclass 18, count 0 2006.229.13:07:27.79#ibcon#about to read 5, iclass 18, count 0 2006.229.13:07:27.79#ibcon#read 5, iclass 18, count 0 2006.229.13:07:27.79#ibcon#about to read 6, iclass 18, count 0 2006.229.13:07:27.79#ibcon#read 6, iclass 18, count 0 2006.229.13:07:27.79#ibcon#end of sib2, iclass 18, count 0 2006.229.13:07:27.79#ibcon#*after write, iclass 18, count 0 2006.229.13:07:27.79#ibcon#*before return 0, iclass 18, count 0 2006.229.13:07:27.79#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:27.79#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:07:27.79#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:07:27.79#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:07:27.79$vck44/vblo=4,679.99 2006.229.13:07:27.79#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:07:27.79#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:07:27.79#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:27.79#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:27.79#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:27.79#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:27.79#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:07:27.79#ibcon#first serial, iclass 20, count 0 2006.229.13:07:27.79#ibcon#enter sib2, iclass 20, count 0 2006.229.13:07:27.79#ibcon#flushed, iclass 20, count 0 2006.229.13:07:27.79#ibcon#about to write, iclass 20, count 0 2006.229.13:07:27.79#ibcon#wrote, iclass 20, count 0 2006.229.13:07:27.79#ibcon#about to read 3, iclass 20, count 0 2006.229.13:07:27.81#ibcon#read 3, iclass 20, count 0 2006.229.13:07:27.81#ibcon#about to read 4, iclass 20, count 0 2006.229.13:07:27.81#ibcon#read 4, iclass 20, count 0 2006.229.13:07:27.81#ibcon#about to read 5, iclass 20, count 0 2006.229.13:07:27.81#ibcon#read 5, iclass 20, count 0 2006.229.13:07:27.81#ibcon#about to read 6, iclass 20, count 0 2006.229.13:07:27.81#ibcon#read 6, iclass 20, count 0 2006.229.13:07:27.81#ibcon#end of sib2, iclass 20, count 0 2006.229.13:07:27.81#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:07:27.81#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:07:27.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:07:27.81#ibcon#*before write, iclass 20, count 0 2006.229.13:07:27.81#ibcon#enter sib2, iclass 20, count 0 2006.229.13:07:27.81#ibcon#flushed, iclass 20, count 0 2006.229.13:07:27.81#ibcon#about to write, iclass 20, count 0 2006.229.13:07:27.81#ibcon#wrote, iclass 20, count 0 2006.229.13:07:27.81#ibcon#about to read 3, iclass 20, count 0 2006.229.13:07:27.85#ibcon#read 3, iclass 20, count 0 2006.229.13:07:27.85#ibcon#about to read 4, iclass 20, count 0 2006.229.13:07:27.85#ibcon#read 4, iclass 20, count 0 2006.229.13:07:27.85#ibcon#about to read 5, iclass 20, count 0 2006.229.13:07:27.85#ibcon#read 5, iclass 20, count 0 2006.229.13:07:27.85#ibcon#about to read 6, iclass 20, count 0 2006.229.13:07:27.85#ibcon#read 6, iclass 20, count 0 2006.229.13:07:27.85#ibcon#end of sib2, iclass 20, count 0 2006.229.13:07:27.85#ibcon#*after write, iclass 20, count 0 2006.229.13:07:27.85#ibcon#*before return 0, iclass 20, count 0 2006.229.13:07:27.85#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:27.85#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:07:27.85#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:07:27.85#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:07:27.85$vck44/vb=4,4 2006.229.13:07:27.85#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:07:27.85#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:07:27.85#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:27.85#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:27.91#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:27.91#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:27.91#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:07:27.91#ibcon#first serial, iclass 22, count 2 2006.229.13:07:27.91#ibcon#enter sib2, iclass 22, count 2 2006.229.13:07:27.91#ibcon#flushed, iclass 22, count 2 2006.229.13:07:27.91#ibcon#about to write, iclass 22, count 2 2006.229.13:07:27.91#ibcon#wrote, iclass 22, count 2 2006.229.13:07:27.91#ibcon#about to read 3, iclass 22, count 2 2006.229.13:07:27.93#ibcon#read 3, iclass 22, count 2 2006.229.13:07:27.93#ibcon#about to read 4, iclass 22, count 2 2006.229.13:07:27.93#ibcon#read 4, iclass 22, count 2 2006.229.13:07:27.93#ibcon#about to read 5, iclass 22, count 2 2006.229.13:07:27.93#ibcon#read 5, iclass 22, count 2 2006.229.13:07:27.93#ibcon#about to read 6, iclass 22, count 2 2006.229.13:07:27.93#ibcon#read 6, iclass 22, count 2 2006.229.13:07:27.93#ibcon#end of sib2, iclass 22, count 2 2006.229.13:07:27.93#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:07:27.93#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:07:27.93#ibcon#[27=AT04-04\r\n] 2006.229.13:07:27.93#ibcon#*before write, iclass 22, count 2 2006.229.13:07:27.93#ibcon#enter sib2, iclass 22, count 2 2006.229.13:07:27.93#ibcon#flushed, iclass 22, count 2 2006.229.13:07:27.93#ibcon#about to write, iclass 22, count 2 2006.229.13:07:27.93#ibcon#wrote, iclass 22, count 2 2006.229.13:07:27.93#ibcon#about to read 3, iclass 22, count 2 2006.229.13:07:27.96#ibcon#read 3, iclass 22, count 2 2006.229.13:07:27.96#ibcon#about to read 4, iclass 22, count 2 2006.229.13:07:27.96#ibcon#read 4, iclass 22, count 2 2006.229.13:07:27.96#ibcon#about to read 5, iclass 22, count 2 2006.229.13:07:27.96#ibcon#read 5, iclass 22, count 2 2006.229.13:07:27.96#ibcon#about to read 6, iclass 22, count 2 2006.229.13:07:27.96#ibcon#read 6, iclass 22, count 2 2006.229.13:07:27.96#ibcon#end of sib2, iclass 22, count 2 2006.229.13:07:27.96#ibcon#*after write, iclass 22, count 2 2006.229.13:07:27.96#ibcon#*before return 0, iclass 22, count 2 2006.229.13:07:27.96#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:27.96#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:07:27.96#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:07:27.96#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:27.96#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:28.08#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:28.08#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:28.08#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:07:28.08#ibcon#first serial, iclass 22, count 0 2006.229.13:07:28.08#ibcon#enter sib2, iclass 22, count 0 2006.229.13:07:28.08#ibcon#flushed, iclass 22, count 0 2006.229.13:07:28.08#ibcon#about to write, iclass 22, count 0 2006.229.13:07:28.08#ibcon#wrote, iclass 22, count 0 2006.229.13:07:28.08#ibcon#about to read 3, iclass 22, count 0 2006.229.13:07:28.10#ibcon#read 3, iclass 22, count 0 2006.229.13:07:28.10#ibcon#about to read 4, iclass 22, count 0 2006.229.13:07:28.10#ibcon#read 4, iclass 22, count 0 2006.229.13:07:28.10#ibcon#about to read 5, iclass 22, count 0 2006.229.13:07:28.10#ibcon#read 5, iclass 22, count 0 2006.229.13:07:28.10#ibcon#about to read 6, iclass 22, count 0 2006.229.13:07:28.10#ibcon#read 6, iclass 22, count 0 2006.229.13:07:28.10#ibcon#end of sib2, iclass 22, count 0 2006.229.13:07:28.10#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:07:28.10#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:07:28.10#ibcon#[27=USB\r\n] 2006.229.13:07:28.10#ibcon#*before write, iclass 22, count 0 2006.229.13:07:28.10#ibcon#enter sib2, iclass 22, count 0 2006.229.13:07:28.10#ibcon#flushed, iclass 22, count 0 2006.229.13:07:28.10#ibcon#about to write, iclass 22, count 0 2006.229.13:07:28.10#ibcon#wrote, iclass 22, count 0 2006.229.13:07:28.10#ibcon#about to read 3, iclass 22, count 0 2006.229.13:07:28.13#ibcon#read 3, iclass 22, count 0 2006.229.13:07:28.13#ibcon#about to read 4, iclass 22, count 0 2006.229.13:07:28.13#ibcon#read 4, iclass 22, count 0 2006.229.13:07:28.13#ibcon#about to read 5, iclass 22, count 0 2006.229.13:07:28.13#ibcon#read 5, iclass 22, count 0 2006.229.13:07:28.13#ibcon#about to read 6, iclass 22, count 0 2006.229.13:07:28.13#ibcon#read 6, iclass 22, count 0 2006.229.13:07:28.13#ibcon#end of sib2, iclass 22, count 0 2006.229.13:07:28.13#ibcon#*after write, iclass 22, count 0 2006.229.13:07:28.13#ibcon#*before return 0, iclass 22, count 0 2006.229.13:07:28.13#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:28.13#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:07:28.13#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:07:28.13#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:07:28.13$vck44/vblo=5,709.99 2006.229.13:07:28.13#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:07:28.13#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:07:28.13#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:28.13#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:28.13#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:28.13#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:28.13#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:07:28.13#ibcon#first serial, iclass 24, count 0 2006.229.13:07:28.13#ibcon#enter sib2, iclass 24, count 0 2006.229.13:07:28.13#ibcon#flushed, iclass 24, count 0 2006.229.13:07:28.13#ibcon#about to write, iclass 24, count 0 2006.229.13:07:28.13#ibcon#wrote, iclass 24, count 0 2006.229.13:07:28.13#ibcon#about to read 3, iclass 24, count 0 2006.229.13:07:28.15#ibcon#read 3, iclass 24, count 0 2006.229.13:07:28.15#ibcon#about to read 4, iclass 24, count 0 2006.229.13:07:28.15#ibcon#read 4, iclass 24, count 0 2006.229.13:07:28.15#ibcon#about to read 5, iclass 24, count 0 2006.229.13:07:28.15#ibcon#read 5, iclass 24, count 0 2006.229.13:07:28.15#ibcon#about to read 6, iclass 24, count 0 2006.229.13:07:28.15#ibcon#read 6, iclass 24, count 0 2006.229.13:07:28.15#ibcon#end of sib2, iclass 24, count 0 2006.229.13:07:28.15#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:07:28.15#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:07:28.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:07:28.15#ibcon#*before write, iclass 24, count 0 2006.229.13:07:28.15#ibcon#enter sib2, iclass 24, count 0 2006.229.13:07:28.15#ibcon#flushed, iclass 24, count 0 2006.229.13:07:28.15#ibcon#about to write, iclass 24, count 0 2006.229.13:07:28.15#ibcon#wrote, iclass 24, count 0 2006.229.13:07:28.15#ibcon#about to read 3, iclass 24, count 0 2006.229.13:07:28.19#ibcon#read 3, iclass 24, count 0 2006.229.13:07:28.19#ibcon#about to read 4, iclass 24, count 0 2006.229.13:07:28.19#ibcon#read 4, iclass 24, count 0 2006.229.13:07:28.19#ibcon#about to read 5, iclass 24, count 0 2006.229.13:07:28.19#ibcon#read 5, iclass 24, count 0 2006.229.13:07:28.19#ibcon#about to read 6, iclass 24, count 0 2006.229.13:07:28.19#ibcon#read 6, iclass 24, count 0 2006.229.13:07:28.19#ibcon#end of sib2, iclass 24, count 0 2006.229.13:07:28.19#ibcon#*after write, iclass 24, count 0 2006.229.13:07:28.19#ibcon#*before return 0, iclass 24, count 0 2006.229.13:07:28.19#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:28.19#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:07:28.19#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:07:28.19#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:07:28.19$vck44/vb=5,4 2006.229.13:07:28.19#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:07:28.19#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:07:28.19#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:28.19#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:28.25#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:28.25#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:28.25#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:07:28.25#ibcon#first serial, iclass 26, count 2 2006.229.13:07:28.25#ibcon#enter sib2, iclass 26, count 2 2006.229.13:07:28.25#ibcon#flushed, iclass 26, count 2 2006.229.13:07:28.25#ibcon#about to write, iclass 26, count 2 2006.229.13:07:28.25#ibcon#wrote, iclass 26, count 2 2006.229.13:07:28.25#ibcon#about to read 3, iclass 26, count 2 2006.229.13:07:28.27#ibcon#read 3, iclass 26, count 2 2006.229.13:07:28.27#ibcon#about to read 4, iclass 26, count 2 2006.229.13:07:28.27#ibcon#read 4, iclass 26, count 2 2006.229.13:07:28.27#ibcon#about to read 5, iclass 26, count 2 2006.229.13:07:28.27#ibcon#read 5, iclass 26, count 2 2006.229.13:07:28.27#ibcon#about to read 6, iclass 26, count 2 2006.229.13:07:28.27#ibcon#read 6, iclass 26, count 2 2006.229.13:07:28.27#ibcon#end of sib2, iclass 26, count 2 2006.229.13:07:28.27#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:07:28.27#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:07:28.27#ibcon#[27=AT05-04\r\n] 2006.229.13:07:28.27#ibcon#*before write, iclass 26, count 2 2006.229.13:07:28.27#ibcon#enter sib2, iclass 26, count 2 2006.229.13:07:28.27#ibcon#flushed, iclass 26, count 2 2006.229.13:07:28.27#ibcon#about to write, iclass 26, count 2 2006.229.13:07:28.27#ibcon#wrote, iclass 26, count 2 2006.229.13:07:28.27#ibcon#about to read 3, iclass 26, count 2 2006.229.13:07:28.30#ibcon#read 3, iclass 26, count 2 2006.229.13:07:28.30#ibcon#about to read 4, iclass 26, count 2 2006.229.13:07:28.30#ibcon#read 4, iclass 26, count 2 2006.229.13:07:28.30#ibcon#about to read 5, iclass 26, count 2 2006.229.13:07:28.30#ibcon#read 5, iclass 26, count 2 2006.229.13:07:28.30#ibcon#about to read 6, iclass 26, count 2 2006.229.13:07:28.30#ibcon#read 6, iclass 26, count 2 2006.229.13:07:28.30#ibcon#end of sib2, iclass 26, count 2 2006.229.13:07:28.30#ibcon#*after write, iclass 26, count 2 2006.229.13:07:28.30#ibcon#*before return 0, iclass 26, count 2 2006.229.13:07:28.30#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:28.30#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:07:28.30#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:07:28.30#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:28.30#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:28.42#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:28.42#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:28.42#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:07:28.42#ibcon#first serial, iclass 26, count 0 2006.229.13:07:28.42#ibcon#enter sib2, iclass 26, count 0 2006.229.13:07:28.42#ibcon#flushed, iclass 26, count 0 2006.229.13:07:28.42#ibcon#about to write, iclass 26, count 0 2006.229.13:07:28.42#ibcon#wrote, iclass 26, count 0 2006.229.13:07:28.42#ibcon#about to read 3, iclass 26, count 0 2006.229.13:07:28.44#ibcon#read 3, iclass 26, count 0 2006.229.13:07:28.44#ibcon#about to read 4, iclass 26, count 0 2006.229.13:07:28.44#ibcon#read 4, iclass 26, count 0 2006.229.13:07:28.44#ibcon#about to read 5, iclass 26, count 0 2006.229.13:07:28.44#ibcon#read 5, iclass 26, count 0 2006.229.13:07:28.44#ibcon#about to read 6, iclass 26, count 0 2006.229.13:07:28.44#ibcon#read 6, iclass 26, count 0 2006.229.13:07:28.44#ibcon#end of sib2, iclass 26, count 0 2006.229.13:07:28.44#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:07:28.44#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:07:28.44#ibcon#[27=USB\r\n] 2006.229.13:07:28.44#ibcon#*before write, iclass 26, count 0 2006.229.13:07:28.44#ibcon#enter sib2, iclass 26, count 0 2006.229.13:07:28.44#ibcon#flushed, iclass 26, count 0 2006.229.13:07:28.44#ibcon#about to write, iclass 26, count 0 2006.229.13:07:28.44#ibcon#wrote, iclass 26, count 0 2006.229.13:07:28.44#ibcon#about to read 3, iclass 26, count 0 2006.229.13:07:28.47#ibcon#read 3, iclass 26, count 0 2006.229.13:07:28.47#ibcon#about to read 4, iclass 26, count 0 2006.229.13:07:28.47#ibcon#read 4, iclass 26, count 0 2006.229.13:07:28.47#ibcon#about to read 5, iclass 26, count 0 2006.229.13:07:28.47#ibcon#read 5, iclass 26, count 0 2006.229.13:07:28.47#ibcon#about to read 6, iclass 26, count 0 2006.229.13:07:28.47#ibcon#read 6, iclass 26, count 0 2006.229.13:07:28.47#ibcon#end of sib2, iclass 26, count 0 2006.229.13:07:28.47#ibcon#*after write, iclass 26, count 0 2006.229.13:07:28.47#ibcon#*before return 0, iclass 26, count 0 2006.229.13:07:28.47#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:28.47#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:07:28.47#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:07:28.47#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:07:28.47$vck44/vblo=6,719.99 2006.229.13:07:28.47#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:07:28.47#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:07:28.47#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:28.47#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:28.47#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:28.47#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:28.47#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:07:28.47#ibcon#first serial, iclass 28, count 0 2006.229.13:07:28.47#ibcon#enter sib2, iclass 28, count 0 2006.229.13:07:28.47#ibcon#flushed, iclass 28, count 0 2006.229.13:07:28.47#ibcon#about to write, iclass 28, count 0 2006.229.13:07:28.47#ibcon#wrote, iclass 28, count 0 2006.229.13:07:28.47#ibcon#about to read 3, iclass 28, count 0 2006.229.13:07:28.49#ibcon#read 3, iclass 28, count 0 2006.229.13:07:28.49#ibcon#about to read 4, iclass 28, count 0 2006.229.13:07:28.49#ibcon#read 4, iclass 28, count 0 2006.229.13:07:28.49#ibcon#about to read 5, iclass 28, count 0 2006.229.13:07:28.49#ibcon#read 5, iclass 28, count 0 2006.229.13:07:28.49#ibcon#about to read 6, iclass 28, count 0 2006.229.13:07:28.49#ibcon#read 6, iclass 28, count 0 2006.229.13:07:28.49#ibcon#end of sib2, iclass 28, count 0 2006.229.13:07:28.49#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:07:28.49#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:07:28.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:07:28.49#ibcon#*before write, iclass 28, count 0 2006.229.13:07:28.49#ibcon#enter sib2, iclass 28, count 0 2006.229.13:07:28.49#ibcon#flushed, iclass 28, count 0 2006.229.13:07:28.49#ibcon#about to write, iclass 28, count 0 2006.229.13:07:28.49#ibcon#wrote, iclass 28, count 0 2006.229.13:07:28.49#ibcon#about to read 3, iclass 28, count 0 2006.229.13:07:28.53#ibcon#read 3, iclass 28, count 0 2006.229.13:07:28.53#ibcon#about to read 4, iclass 28, count 0 2006.229.13:07:28.53#ibcon#read 4, iclass 28, count 0 2006.229.13:07:28.53#ibcon#about to read 5, iclass 28, count 0 2006.229.13:07:28.53#ibcon#read 5, iclass 28, count 0 2006.229.13:07:28.53#ibcon#about to read 6, iclass 28, count 0 2006.229.13:07:28.53#ibcon#read 6, iclass 28, count 0 2006.229.13:07:28.53#ibcon#end of sib2, iclass 28, count 0 2006.229.13:07:28.53#ibcon#*after write, iclass 28, count 0 2006.229.13:07:28.53#ibcon#*before return 0, iclass 28, count 0 2006.229.13:07:28.53#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:28.53#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:07:28.53#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:07:28.53#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:07:28.53$vck44/vb=6,4 2006.229.13:07:28.53#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:07:28.53#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:07:28.53#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:28.53#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:28.59#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:28.59#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:28.59#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:07:28.59#ibcon#first serial, iclass 30, count 2 2006.229.13:07:28.59#ibcon#enter sib2, iclass 30, count 2 2006.229.13:07:28.59#ibcon#flushed, iclass 30, count 2 2006.229.13:07:28.59#ibcon#about to write, iclass 30, count 2 2006.229.13:07:28.59#ibcon#wrote, iclass 30, count 2 2006.229.13:07:28.59#ibcon#about to read 3, iclass 30, count 2 2006.229.13:07:28.61#ibcon#read 3, iclass 30, count 2 2006.229.13:07:28.61#ibcon#about to read 4, iclass 30, count 2 2006.229.13:07:28.61#ibcon#read 4, iclass 30, count 2 2006.229.13:07:28.61#ibcon#about to read 5, iclass 30, count 2 2006.229.13:07:28.61#ibcon#read 5, iclass 30, count 2 2006.229.13:07:28.61#ibcon#about to read 6, iclass 30, count 2 2006.229.13:07:28.61#ibcon#read 6, iclass 30, count 2 2006.229.13:07:28.61#ibcon#end of sib2, iclass 30, count 2 2006.229.13:07:28.61#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:07:28.61#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:07:28.61#ibcon#[27=AT06-04\r\n] 2006.229.13:07:28.61#ibcon#*before write, iclass 30, count 2 2006.229.13:07:28.61#ibcon#enter sib2, iclass 30, count 2 2006.229.13:07:28.61#ibcon#flushed, iclass 30, count 2 2006.229.13:07:28.61#ibcon#about to write, iclass 30, count 2 2006.229.13:07:28.61#ibcon#wrote, iclass 30, count 2 2006.229.13:07:28.61#ibcon#about to read 3, iclass 30, count 2 2006.229.13:07:28.64#ibcon#read 3, iclass 30, count 2 2006.229.13:07:28.64#ibcon#about to read 4, iclass 30, count 2 2006.229.13:07:28.64#ibcon#read 4, iclass 30, count 2 2006.229.13:07:28.64#ibcon#about to read 5, iclass 30, count 2 2006.229.13:07:28.64#ibcon#read 5, iclass 30, count 2 2006.229.13:07:28.64#ibcon#about to read 6, iclass 30, count 2 2006.229.13:07:28.64#ibcon#read 6, iclass 30, count 2 2006.229.13:07:28.64#ibcon#end of sib2, iclass 30, count 2 2006.229.13:07:28.64#ibcon#*after write, iclass 30, count 2 2006.229.13:07:28.64#ibcon#*before return 0, iclass 30, count 2 2006.229.13:07:28.64#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:28.64#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:07:28.64#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:07:28.64#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:28.64#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:28.76#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:28.76#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:28.76#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:07:28.76#ibcon#first serial, iclass 30, count 0 2006.229.13:07:28.76#ibcon#enter sib2, iclass 30, count 0 2006.229.13:07:28.76#ibcon#flushed, iclass 30, count 0 2006.229.13:07:28.76#ibcon#about to write, iclass 30, count 0 2006.229.13:07:28.76#ibcon#wrote, iclass 30, count 0 2006.229.13:07:28.76#ibcon#about to read 3, iclass 30, count 0 2006.229.13:07:28.78#ibcon#read 3, iclass 30, count 0 2006.229.13:07:28.78#ibcon#about to read 4, iclass 30, count 0 2006.229.13:07:28.78#ibcon#read 4, iclass 30, count 0 2006.229.13:07:28.78#ibcon#about to read 5, iclass 30, count 0 2006.229.13:07:28.78#ibcon#read 5, iclass 30, count 0 2006.229.13:07:28.78#ibcon#about to read 6, iclass 30, count 0 2006.229.13:07:28.78#ibcon#read 6, iclass 30, count 0 2006.229.13:07:28.78#ibcon#end of sib2, iclass 30, count 0 2006.229.13:07:28.78#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:07:28.78#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:07:28.78#ibcon#[27=USB\r\n] 2006.229.13:07:28.78#ibcon#*before write, iclass 30, count 0 2006.229.13:07:28.78#ibcon#enter sib2, iclass 30, count 0 2006.229.13:07:28.78#ibcon#flushed, iclass 30, count 0 2006.229.13:07:28.78#ibcon#about to write, iclass 30, count 0 2006.229.13:07:28.78#ibcon#wrote, iclass 30, count 0 2006.229.13:07:28.78#ibcon#about to read 3, iclass 30, count 0 2006.229.13:07:28.81#ibcon#read 3, iclass 30, count 0 2006.229.13:07:28.81#ibcon#about to read 4, iclass 30, count 0 2006.229.13:07:28.81#ibcon#read 4, iclass 30, count 0 2006.229.13:07:28.81#ibcon#about to read 5, iclass 30, count 0 2006.229.13:07:28.81#ibcon#read 5, iclass 30, count 0 2006.229.13:07:28.81#ibcon#about to read 6, iclass 30, count 0 2006.229.13:07:28.81#ibcon#read 6, iclass 30, count 0 2006.229.13:07:28.81#ibcon#end of sib2, iclass 30, count 0 2006.229.13:07:28.81#ibcon#*after write, iclass 30, count 0 2006.229.13:07:28.81#ibcon#*before return 0, iclass 30, count 0 2006.229.13:07:28.81#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:28.81#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:07:28.81#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:07:28.81#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:07:28.81$vck44/vblo=7,734.99 2006.229.13:07:28.81#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:07:28.81#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:07:28.81#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:28.81#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:28.81#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:28.81#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:28.81#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:07:28.81#ibcon#first serial, iclass 32, count 0 2006.229.13:07:28.81#ibcon#enter sib2, iclass 32, count 0 2006.229.13:07:28.81#ibcon#flushed, iclass 32, count 0 2006.229.13:07:28.81#ibcon#about to write, iclass 32, count 0 2006.229.13:07:28.81#ibcon#wrote, iclass 32, count 0 2006.229.13:07:28.81#ibcon#about to read 3, iclass 32, count 0 2006.229.13:07:28.83#ibcon#read 3, iclass 32, count 0 2006.229.13:07:28.83#ibcon#about to read 4, iclass 32, count 0 2006.229.13:07:28.83#ibcon#read 4, iclass 32, count 0 2006.229.13:07:28.83#ibcon#about to read 5, iclass 32, count 0 2006.229.13:07:28.83#ibcon#read 5, iclass 32, count 0 2006.229.13:07:28.83#ibcon#about to read 6, iclass 32, count 0 2006.229.13:07:28.83#ibcon#read 6, iclass 32, count 0 2006.229.13:07:28.83#ibcon#end of sib2, iclass 32, count 0 2006.229.13:07:28.83#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:07:28.83#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:07:28.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:07:28.83#ibcon#*before write, iclass 32, count 0 2006.229.13:07:28.83#ibcon#enter sib2, iclass 32, count 0 2006.229.13:07:28.83#ibcon#flushed, iclass 32, count 0 2006.229.13:07:28.83#ibcon#about to write, iclass 32, count 0 2006.229.13:07:28.83#ibcon#wrote, iclass 32, count 0 2006.229.13:07:28.83#ibcon#about to read 3, iclass 32, count 0 2006.229.13:07:28.87#ibcon#read 3, iclass 32, count 0 2006.229.13:07:28.87#ibcon#about to read 4, iclass 32, count 0 2006.229.13:07:28.87#ibcon#read 4, iclass 32, count 0 2006.229.13:07:28.87#ibcon#about to read 5, iclass 32, count 0 2006.229.13:07:28.87#ibcon#read 5, iclass 32, count 0 2006.229.13:07:28.87#ibcon#about to read 6, iclass 32, count 0 2006.229.13:07:28.87#ibcon#read 6, iclass 32, count 0 2006.229.13:07:28.87#ibcon#end of sib2, iclass 32, count 0 2006.229.13:07:28.87#ibcon#*after write, iclass 32, count 0 2006.229.13:07:28.87#ibcon#*before return 0, iclass 32, count 0 2006.229.13:07:28.87#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:28.87#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:07:28.87#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:07:28.87#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:07:28.87$vck44/vb=7,4 2006.229.13:07:28.87#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:07:28.87#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:07:28.87#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:28.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:28.93#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:28.93#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:28.93#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:07:28.93#ibcon#first serial, iclass 34, count 2 2006.229.13:07:28.93#ibcon#enter sib2, iclass 34, count 2 2006.229.13:07:28.93#ibcon#flushed, iclass 34, count 2 2006.229.13:07:28.93#ibcon#about to write, iclass 34, count 2 2006.229.13:07:28.93#ibcon#wrote, iclass 34, count 2 2006.229.13:07:28.93#ibcon#about to read 3, iclass 34, count 2 2006.229.13:07:28.95#ibcon#read 3, iclass 34, count 2 2006.229.13:07:28.95#ibcon#about to read 4, iclass 34, count 2 2006.229.13:07:28.95#ibcon#read 4, iclass 34, count 2 2006.229.13:07:28.95#ibcon#about to read 5, iclass 34, count 2 2006.229.13:07:28.95#ibcon#read 5, iclass 34, count 2 2006.229.13:07:28.95#ibcon#about to read 6, iclass 34, count 2 2006.229.13:07:28.95#ibcon#read 6, iclass 34, count 2 2006.229.13:07:28.95#ibcon#end of sib2, iclass 34, count 2 2006.229.13:07:28.95#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:07:28.95#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:07:28.95#ibcon#[27=AT07-04\r\n] 2006.229.13:07:28.95#ibcon#*before write, iclass 34, count 2 2006.229.13:07:28.95#ibcon#enter sib2, iclass 34, count 2 2006.229.13:07:28.95#ibcon#flushed, iclass 34, count 2 2006.229.13:07:28.95#ibcon#about to write, iclass 34, count 2 2006.229.13:07:28.95#ibcon#wrote, iclass 34, count 2 2006.229.13:07:28.95#ibcon#about to read 3, iclass 34, count 2 2006.229.13:07:28.98#ibcon#read 3, iclass 34, count 2 2006.229.13:07:28.98#ibcon#about to read 4, iclass 34, count 2 2006.229.13:07:28.98#ibcon#read 4, iclass 34, count 2 2006.229.13:07:28.98#ibcon#about to read 5, iclass 34, count 2 2006.229.13:07:28.98#ibcon#read 5, iclass 34, count 2 2006.229.13:07:28.98#ibcon#about to read 6, iclass 34, count 2 2006.229.13:07:28.98#ibcon#read 6, iclass 34, count 2 2006.229.13:07:28.98#ibcon#end of sib2, iclass 34, count 2 2006.229.13:07:28.98#ibcon#*after write, iclass 34, count 2 2006.229.13:07:28.98#ibcon#*before return 0, iclass 34, count 2 2006.229.13:07:28.98#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:28.98#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:07:28.98#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:07:28.98#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:28.98#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:29.10#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:29.10#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:29.10#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:07:29.10#ibcon#first serial, iclass 34, count 0 2006.229.13:07:29.10#ibcon#enter sib2, iclass 34, count 0 2006.229.13:07:29.10#ibcon#flushed, iclass 34, count 0 2006.229.13:07:29.10#ibcon#about to write, iclass 34, count 0 2006.229.13:07:29.10#ibcon#wrote, iclass 34, count 0 2006.229.13:07:29.10#ibcon#about to read 3, iclass 34, count 0 2006.229.13:07:29.12#ibcon#read 3, iclass 34, count 0 2006.229.13:07:29.12#ibcon#about to read 4, iclass 34, count 0 2006.229.13:07:29.12#ibcon#read 4, iclass 34, count 0 2006.229.13:07:29.12#ibcon#about to read 5, iclass 34, count 0 2006.229.13:07:29.12#ibcon#read 5, iclass 34, count 0 2006.229.13:07:29.12#ibcon#about to read 6, iclass 34, count 0 2006.229.13:07:29.12#ibcon#read 6, iclass 34, count 0 2006.229.13:07:29.12#ibcon#end of sib2, iclass 34, count 0 2006.229.13:07:29.12#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:07:29.12#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:07:29.12#ibcon#[27=USB\r\n] 2006.229.13:07:29.12#ibcon#*before write, iclass 34, count 0 2006.229.13:07:29.12#ibcon#enter sib2, iclass 34, count 0 2006.229.13:07:29.12#ibcon#flushed, iclass 34, count 0 2006.229.13:07:29.12#ibcon#about to write, iclass 34, count 0 2006.229.13:07:29.12#ibcon#wrote, iclass 34, count 0 2006.229.13:07:29.12#ibcon#about to read 3, iclass 34, count 0 2006.229.13:07:29.15#ibcon#read 3, iclass 34, count 0 2006.229.13:07:29.15#ibcon#about to read 4, iclass 34, count 0 2006.229.13:07:29.15#ibcon#read 4, iclass 34, count 0 2006.229.13:07:29.15#ibcon#about to read 5, iclass 34, count 0 2006.229.13:07:29.15#ibcon#read 5, iclass 34, count 0 2006.229.13:07:29.15#ibcon#about to read 6, iclass 34, count 0 2006.229.13:07:29.15#ibcon#read 6, iclass 34, count 0 2006.229.13:07:29.15#ibcon#end of sib2, iclass 34, count 0 2006.229.13:07:29.15#ibcon#*after write, iclass 34, count 0 2006.229.13:07:29.15#ibcon#*before return 0, iclass 34, count 0 2006.229.13:07:29.15#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:29.15#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:07:29.15#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:07:29.15#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:07:29.15$vck44/vblo=8,744.99 2006.229.13:07:29.15#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:07:29.15#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:07:29.15#ibcon#ireg 17 cls_cnt 0 2006.229.13:07:29.15#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:29.15#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:29.15#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:29.15#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:07:29.15#ibcon#first serial, iclass 36, count 0 2006.229.13:07:29.15#ibcon#enter sib2, iclass 36, count 0 2006.229.13:07:29.15#ibcon#flushed, iclass 36, count 0 2006.229.13:07:29.15#ibcon#about to write, iclass 36, count 0 2006.229.13:07:29.15#ibcon#wrote, iclass 36, count 0 2006.229.13:07:29.15#ibcon#about to read 3, iclass 36, count 0 2006.229.13:07:29.17#ibcon#read 3, iclass 36, count 0 2006.229.13:07:29.17#ibcon#about to read 4, iclass 36, count 0 2006.229.13:07:29.17#ibcon#read 4, iclass 36, count 0 2006.229.13:07:29.17#ibcon#about to read 5, iclass 36, count 0 2006.229.13:07:29.17#ibcon#read 5, iclass 36, count 0 2006.229.13:07:29.17#ibcon#about to read 6, iclass 36, count 0 2006.229.13:07:29.17#ibcon#read 6, iclass 36, count 0 2006.229.13:07:29.17#ibcon#end of sib2, iclass 36, count 0 2006.229.13:07:29.17#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:07:29.17#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:07:29.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:07:29.17#ibcon#*before write, iclass 36, count 0 2006.229.13:07:29.17#ibcon#enter sib2, iclass 36, count 0 2006.229.13:07:29.17#ibcon#flushed, iclass 36, count 0 2006.229.13:07:29.17#ibcon#about to write, iclass 36, count 0 2006.229.13:07:29.17#ibcon#wrote, iclass 36, count 0 2006.229.13:07:29.17#ibcon#about to read 3, iclass 36, count 0 2006.229.13:07:29.21#ibcon#read 3, iclass 36, count 0 2006.229.13:07:29.21#ibcon#about to read 4, iclass 36, count 0 2006.229.13:07:29.21#ibcon#read 4, iclass 36, count 0 2006.229.13:07:29.21#ibcon#about to read 5, iclass 36, count 0 2006.229.13:07:29.21#ibcon#read 5, iclass 36, count 0 2006.229.13:07:29.21#ibcon#about to read 6, iclass 36, count 0 2006.229.13:07:29.21#ibcon#read 6, iclass 36, count 0 2006.229.13:07:29.21#ibcon#end of sib2, iclass 36, count 0 2006.229.13:07:29.21#ibcon#*after write, iclass 36, count 0 2006.229.13:07:29.21#ibcon#*before return 0, iclass 36, count 0 2006.229.13:07:29.21#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:29.21#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:07:29.21#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:07:29.21#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:07:29.21$vck44/vb=8,4 2006.229.13:07:29.21#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:07:29.21#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:07:29.21#ibcon#ireg 11 cls_cnt 2 2006.229.13:07:29.21#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:29.27#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:29.27#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:29.27#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:07:29.27#ibcon#first serial, iclass 38, count 2 2006.229.13:07:29.27#ibcon#enter sib2, iclass 38, count 2 2006.229.13:07:29.27#ibcon#flushed, iclass 38, count 2 2006.229.13:07:29.27#ibcon#about to write, iclass 38, count 2 2006.229.13:07:29.27#ibcon#wrote, iclass 38, count 2 2006.229.13:07:29.27#ibcon#about to read 3, iclass 38, count 2 2006.229.13:07:29.29#ibcon#read 3, iclass 38, count 2 2006.229.13:07:29.29#ibcon#about to read 4, iclass 38, count 2 2006.229.13:07:29.29#ibcon#read 4, iclass 38, count 2 2006.229.13:07:29.29#ibcon#about to read 5, iclass 38, count 2 2006.229.13:07:29.29#ibcon#read 5, iclass 38, count 2 2006.229.13:07:29.29#ibcon#about to read 6, iclass 38, count 2 2006.229.13:07:29.29#ibcon#read 6, iclass 38, count 2 2006.229.13:07:29.29#ibcon#end of sib2, iclass 38, count 2 2006.229.13:07:29.29#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:07:29.29#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:07:29.29#ibcon#[27=AT08-04\r\n] 2006.229.13:07:29.29#ibcon#*before write, iclass 38, count 2 2006.229.13:07:29.29#ibcon#enter sib2, iclass 38, count 2 2006.229.13:07:29.29#ibcon#flushed, iclass 38, count 2 2006.229.13:07:29.29#ibcon#about to write, iclass 38, count 2 2006.229.13:07:29.29#ibcon#wrote, iclass 38, count 2 2006.229.13:07:29.29#ibcon#about to read 3, iclass 38, count 2 2006.229.13:07:29.32#ibcon#read 3, iclass 38, count 2 2006.229.13:07:29.32#ibcon#about to read 4, iclass 38, count 2 2006.229.13:07:29.32#ibcon#read 4, iclass 38, count 2 2006.229.13:07:29.32#ibcon#about to read 5, iclass 38, count 2 2006.229.13:07:29.32#ibcon#read 5, iclass 38, count 2 2006.229.13:07:29.32#ibcon#about to read 6, iclass 38, count 2 2006.229.13:07:29.32#ibcon#read 6, iclass 38, count 2 2006.229.13:07:29.32#ibcon#end of sib2, iclass 38, count 2 2006.229.13:07:29.32#ibcon#*after write, iclass 38, count 2 2006.229.13:07:29.32#ibcon#*before return 0, iclass 38, count 2 2006.229.13:07:29.32#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:29.32#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:07:29.32#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:07:29.32#ibcon#ireg 7 cls_cnt 0 2006.229.13:07:29.32#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:29.44#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:29.44#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:29.44#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:07:29.44#ibcon#first serial, iclass 38, count 0 2006.229.13:07:29.44#ibcon#enter sib2, iclass 38, count 0 2006.229.13:07:29.44#ibcon#flushed, iclass 38, count 0 2006.229.13:07:29.44#ibcon#about to write, iclass 38, count 0 2006.229.13:07:29.44#ibcon#wrote, iclass 38, count 0 2006.229.13:07:29.44#ibcon#about to read 3, iclass 38, count 0 2006.229.13:07:29.46#ibcon#read 3, iclass 38, count 0 2006.229.13:07:29.46#ibcon#about to read 4, iclass 38, count 0 2006.229.13:07:29.46#ibcon#read 4, iclass 38, count 0 2006.229.13:07:29.46#ibcon#about to read 5, iclass 38, count 0 2006.229.13:07:29.46#ibcon#read 5, iclass 38, count 0 2006.229.13:07:29.46#ibcon#about to read 6, iclass 38, count 0 2006.229.13:07:29.46#ibcon#read 6, iclass 38, count 0 2006.229.13:07:29.46#ibcon#end of sib2, iclass 38, count 0 2006.229.13:07:29.46#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:07:29.46#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:07:29.46#ibcon#[27=USB\r\n] 2006.229.13:07:29.46#ibcon#*before write, iclass 38, count 0 2006.229.13:07:29.46#ibcon#enter sib2, iclass 38, count 0 2006.229.13:07:29.46#ibcon#flushed, iclass 38, count 0 2006.229.13:07:29.46#ibcon#about to write, iclass 38, count 0 2006.229.13:07:29.46#ibcon#wrote, iclass 38, count 0 2006.229.13:07:29.46#ibcon#about to read 3, iclass 38, count 0 2006.229.13:07:29.49#ibcon#read 3, iclass 38, count 0 2006.229.13:07:29.49#ibcon#about to read 4, iclass 38, count 0 2006.229.13:07:29.49#ibcon#read 4, iclass 38, count 0 2006.229.13:07:29.49#ibcon#about to read 5, iclass 38, count 0 2006.229.13:07:29.49#ibcon#read 5, iclass 38, count 0 2006.229.13:07:29.49#ibcon#about to read 6, iclass 38, count 0 2006.229.13:07:29.49#ibcon#read 6, iclass 38, count 0 2006.229.13:07:29.49#ibcon#end of sib2, iclass 38, count 0 2006.229.13:07:29.49#ibcon#*after write, iclass 38, count 0 2006.229.13:07:29.49#ibcon#*before return 0, iclass 38, count 0 2006.229.13:07:29.49#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:29.49#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:07:29.49#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:07:29.49#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:07:29.49$vck44/vabw=wide 2006.229.13:07:29.49#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:07:29.49#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:07:29.49#ibcon#ireg 8 cls_cnt 0 2006.229.13:07:29.49#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:29.49#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:29.49#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:29.49#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:07:29.49#ibcon#first serial, iclass 40, count 0 2006.229.13:07:29.49#ibcon#enter sib2, iclass 40, count 0 2006.229.13:07:29.49#ibcon#flushed, iclass 40, count 0 2006.229.13:07:29.49#ibcon#about to write, iclass 40, count 0 2006.229.13:07:29.49#ibcon#wrote, iclass 40, count 0 2006.229.13:07:29.49#ibcon#about to read 3, iclass 40, count 0 2006.229.13:07:29.51#ibcon#read 3, iclass 40, count 0 2006.229.13:07:29.51#ibcon#about to read 4, iclass 40, count 0 2006.229.13:07:29.51#ibcon#read 4, iclass 40, count 0 2006.229.13:07:29.51#ibcon#about to read 5, iclass 40, count 0 2006.229.13:07:29.51#ibcon#read 5, iclass 40, count 0 2006.229.13:07:29.51#ibcon#about to read 6, iclass 40, count 0 2006.229.13:07:29.51#ibcon#read 6, iclass 40, count 0 2006.229.13:07:29.51#ibcon#end of sib2, iclass 40, count 0 2006.229.13:07:29.51#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:07:29.51#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:07:29.51#ibcon#[25=BW32\r\n] 2006.229.13:07:29.51#ibcon#*before write, iclass 40, count 0 2006.229.13:07:29.51#ibcon#enter sib2, iclass 40, count 0 2006.229.13:07:29.51#ibcon#flushed, iclass 40, count 0 2006.229.13:07:29.51#ibcon#about to write, iclass 40, count 0 2006.229.13:07:29.51#ibcon#wrote, iclass 40, count 0 2006.229.13:07:29.51#ibcon#about to read 3, iclass 40, count 0 2006.229.13:07:29.54#ibcon#read 3, iclass 40, count 0 2006.229.13:07:29.54#ibcon#about to read 4, iclass 40, count 0 2006.229.13:07:29.54#ibcon#read 4, iclass 40, count 0 2006.229.13:07:29.54#ibcon#about to read 5, iclass 40, count 0 2006.229.13:07:29.54#ibcon#read 5, iclass 40, count 0 2006.229.13:07:29.54#ibcon#about to read 6, iclass 40, count 0 2006.229.13:07:29.54#ibcon#read 6, iclass 40, count 0 2006.229.13:07:29.54#ibcon#end of sib2, iclass 40, count 0 2006.229.13:07:29.54#ibcon#*after write, iclass 40, count 0 2006.229.13:07:29.54#ibcon#*before return 0, iclass 40, count 0 2006.229.13:07:29.54#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:29.54#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:07:29.54#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:07:29.54#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:07:29.54$vck44/vbbw=wide 2006.229.13:07:29.54#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.13:07:29.54#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.13:07:29.54#ibcon#ireg 8 cls_cnt 0 2006.229.13:07:29.54#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:07:29.61#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:07:29.61#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:07:29.61#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:07:29.61#ibcon#first serial, iclass 4, count 0 2006.229.13:07:29.61#ibcon#enter sib2, iclass 4, count 0 2006.229.13:07:29.61#ibcon#flushed, iclass 4, count 0 2006.229.13:07:29.61#ibcon#about to write, iclass 4, count 0 2006.229.13:07:29.61#ibcon#wrote, iclass 4, count 0 2006.229.13:07:29.61#ibcon#about to read 3, iclass 4, count 0 2006.229.13:07:29.63#ibcon#read 3, iclass 4, count 0 2006.229.13:07:29.63#ibcon#about to read 4, iclass 4, count 0 2006.229.13:07:29.63#ibcon#read 4, iclass 4, count 0 2006.229.13:07:29.63#ibcon#about to read 5, iclass 4, count 0 2006.229.13:07:29.63#ibcon#read 5, iclass 4, count 0 2006.229.13:07:29.63#ibcon#about to read 6, iclass 4, count 0 2006.229.13:07:29.63#ibcon#read 6, iclass 4, count 0 2006.229.13:07:29.63#ibcon#end of sib2, iclass 4, count 0 2006.229.13:07:29.63#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:07:29.63#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:07:29.63#ibcon#[27=BW32\r\n] 2006.229.13:07:29.63#ibcon#*before write, iclass 4, count 0 2006.229.13:07:29.63#ibcon#enter sib2, iclass 4, count 0 2006.229.13:07:29.63#ibcon#flushed, iclass 4, count 0 2006.229.13:07:29.63#ibcon#about to write, iclass 4, count 0 2006.229.13:07:29.63#ibcon#wrote, iclass 4, count 0 2006.229.13:07:29.63#ibcon#about to read 3, iclass 4, count 0 2006.229.13:07:29.66#ibcon#read 3, iclass 4, count 0 2006.229.13:07:29.66#ibcon#about to read 4, iclass 4, count 0 2006.229.13:07:29.66#ibcon#read 4, iclass 4, count 0 2006.229.13:07:29.66#ibcon#about to read 5, iclass 4, count 0 2006.229.13:07:29.66#ibcon#read 5, iclass 4, count 0 2006.229.13:07:29.66#ibcon#about to read 6, iclass 4, count 0 2006.229.13:07:29.66#ibcon#read 6, iclass 4, count 0 2006.229.13:07:29.66#ibcon#end of sib2, iclass 4, count 0 2006.229.13:07:29.66#ibcon#*after write, iclass 4, count 0 2006.229.13:07:29.66#ibcon#*before return 0, iclass 4, count 0 2006.229.13:07:29.66#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:07:29.66#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:07:29.66#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:07:29.66#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:07:29.66$setupk4/ifdk4 2006.229.13:07:29.66$ifdk4/lo= 2006.229.13:07:29.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:07:29.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:07:29.66$ifdk4/patch= 2006.229.13:07:29.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:07:29.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:07:29.66$setupk4/!*+20s 2006.229.13:07:29.96#abcon#<5=/04 0.9 1.6 27.571001002.3\r\n> 2006.229.13:07:29.98#abcon#{5=INTERFACE CLEAR} 2006.229.13:07:30.04#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:07:40.13#abcon#<5=/04 0.9 1.6 27.571001002.3\r\n> 2006.229.13:07:40.15#abcon#{5=INTERFACE CLEAR} 2006.229.13:07:40.21#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:07:44.17$setupk4/"tpicd 2006.229.13:07:44.17$setupk4/echo=off 2006.229.13:07:44.17$setupk4/xlog=off 2006.229.13:07:44.17:!2006.229.13:10:20 2006.229.13:08:12.14#trakl#Source acquired 2006.229.13:08:14.14#flagr#flagr/antenna,acquired 2006.229.13:10:20.00:preob 2006.229.13:10:21.13/onsource/TRACKING 2006.229.13:10:21.13:!2006.229.13:10:30 2006.229.13:10:30.00:"tape 2006.229.13:10:30.00:"st=record 2006.229.13:10:30.00:data_valid=on 2006.229.13:10:30.00:midob 2006.229.13:10:30.13/onsource/TRACKING 2006.229.13:10:30.13/wx/27.58,1002.3,100 2006.229.13:10:30.30/cable/+6.4113E-03 2006.229.13:10:31.39/va/01,08,usb,yes,30,32 2006.229.13:10:31.39/va/02,07,usb,yes,32,33 2006.229.13:10:31.39/va/03,06,usb,yes,40,43 2006.229.13:10:31.39/va/04,07,usb,yes,33,35 2006.229.13:10:31.39/va/05,04,usb,yes,30,30 2006.229.13:10:31.39/va/06,04,usb,yes,33,33 2006.229.13:10:31.39/va/07,05,usb,yes,29,30 2006.229.13:10:31.39/va/08,06,usb,yes,21,26 2006.229.13:10:31.62/valo/01,524.99,yes,locked 2006.229.13:10:31.62/valo/02,534.99,yes,locked 2006.229.13:10:31.62/valo/03,564.99,yes,locked 2006.229.13:10:31.62/valo/04,624.99,yes,locked 2006.229.13:10:31.62/valo/05,734.99,yes,locked 2006.229.13:10:31.62/valo/06,814.99,yes,locked 2006.229.13:10:31.62/valo/07,864.99,yes,locked 2006.229.13:10:31.62/valo/08,884.99,yes,locked 2006.229.13:10:32.71/vb/01,04,usb,yes,31,29 2006.229.13:10:32.71/vb/02,04,usb,yes,33,33 2006.229.13:10:32.71/vb/03,04,usb,yes,30,33 2006.229.13:10:32.71/vb/04,04,usb,yes,35,34 2006.229.13:10:32.71/vb/05,04,usb,yes,27,30 2006.229.13:10:32.71/vb/06,04,usb,yes,32,28 2006.229.13:10:32.71/vb/07,04,usb,yes,31,31 2006.229.13:10:32.71/vb/08,04,usb,yes,29,32 2006.229.13:10:32.95/vblo/01,629.99,yes,locked 2006.229.13:10:32.95/vblo/02,634.99,yes,locked 2006.229.13:10:32.95/vblo/03,649.99,yes,locked 2006.229.13:10:32.95/vblo/04,679.99,yes,locked 2006.229.13:10:32.95/vblo/05,709.99,yes,locked 2006.229.13:10:32.95/vblo/06,719.99,yes,locked 2006.229.13:10:32.95/vblo/07,734.99,yes,locked 2006.229.13:10:32.95/vblo/08,744.99,yes,locked 2006.229.13:10:33.10/vabw/8 2006.229.13:10:33.25/vbbw/8 2006.229.13:10:33.34/xfe/off,on,12.0 2006.229.13:10:33.71/ifatt/23,28,28,28 2006.229.13:10:34.07/fmout-gps/S +4.62E-07 2006.229.13:10:34.11:!2006.229.13:13:40 2006.229.13:13:40.00:data_valid=off 2006.229.13:13:40.00:"et 2006.229.13:13:40.00:!+3s 2006.229.13:13:43.01:"tape 2006.229.13:13:43.01:postob 2006.229.13:13:43.15/cable/+6.4114E-03 2006.229.13:13:43.15/wx/27.57,1002.2,100 2006.229.13:13:44.08/fmout-gps/S +4.67E-07 2006.229.13:13:44.08:scan_name=229-1316,jd0608,50 2006.229.13:13:44.08:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.13:13:45.14#flagr#flagr/antenna,new-source 2006.229.13:13:45.14:checkk5 2006.229.13:13:45.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:13:45.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:13:46.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:13:46.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:13:47.14/chk_obsdata//k5ts1/T2291310??a.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:13:47.55/chk_obsdata//k5ts2/T2291310??b.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:13:47.95/chk_obsdata//k5ts3/T2291310??c.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:13:48.35/chk_obsdata//k5ts4/T2291310??d.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:13:49.08/k5log//k5ts1_log_newline 2006.229.13:13:49.79/k5log//k5ts2_log_newline 2006.229.13:13:50.51/k5log//k5ts3_log_newline 2006.229.13:13:51.21/k5log//k5ts4_log_newline 2006.229.13:13:51.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:13:51.24:setupk4=1 2006.229.13:13:51.24$setupk4/echo=on 2006.229.13:13:51.24$setupk4/pcalon 2006.229.13:13:51.24$pcalon/"no phase cal control is implemented here 2006.229.13:13:51.24$setupk4/"tpicd=stop 2006.229.13:13:51.24$setupk4/"rec=synch_on 2006.229.13:13:51.24$setupk4/"rec_mode=128 2006.229.13:13:51.24$setupk4/!* 2006.229.13:13:51.24$setupk4/recpk4 2006.229.13:13:51.24$recpk4/recpatch= 2006.229.13:13:51.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:13:51.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:13:51.24$setupk4/vck44 2006.229.13:13:51.24$vck44/valo=1,524.99 2006.229.13:13:51.24#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:13:51.24#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:13:51.24#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:51.24#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:51.24#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:51.24#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:51.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:13:51.24#ibcon#first serial, iclass 19, count 0 2006.229.13:13:51.24#ibcon#enter sib2, iclass 19, count 0 2006.229.13:13:51.24#ibcon#flushed, iclass 19, count 0 2006.229.13:13:51.24#ibcon#about to write, iclass 19, count 0 2006.229.13:13:51.24#ibcon#wrote, iclass 19, count 0 2006.229.13:13:51.24#ibcon#about to read 3, iclass 19, count 0 2006.229.13:13:51.26#ibcon#read 3, iclass 19, count 0 2006.229.13:13:51.26#ibcon#about to read 4, iclass 19, count 0 2006.229.13:13:51.26#ibcon#read 4, iclass 19, count 0 2006.229.13:13:51.26#ibcon#about to read 5, iclass 19, count 0 2006.229.13:13:51.26#ibcon#read 5, iclass 19, count 0 2006.229.13:13:51.26#ibcon#about to read 6, iclass 19, count 0 2006.229.13:13:51.26#ibcon#read 6, iclass 19, count 0 2006.229.13:13:51.26#ibcon#end of sib2, iclass 19, count 0 2006.229.13:13:51.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:13:51.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:13:51.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:13:51.26#ibcon#*before write, iclass 19, count 0 2006.229.13:13:51.26#ibcon#enter sib2, iclass 19, count 0 2006.229.13:13:51.26#ibcon#flushed, iclass 19, count 0 2006.229.13:13:51.26#ibcon#about to write, iclass 19, count 0 2006.229.13:13:51.26#ibcon#wrote, iclass 19, count 0 2006.229.13:13:51.26#ibcon#about to read 3, iclass 19, count 0 2006.229.13:13:51.31#ibcon#read 3, iclass 19, count 0 2006.229.13:13:51.31#ibcon#about to read 4, iclass 19, count 0 2006.229.13:13:51.31#ibcon#read 4, iclass 19, count 0 2006.229.13:13:51.31#ibcon#about to read 5, iclass 19, count 0 2006.229.13:13:51.31#ibcon#read 5, iclass 19, count 0 2006.229.13:13:51.31#ibcon#about to read 6, iclass 19, count 0 2006.229.13:13:51.31#ibcon#read 6, iclass 19, count 0 2006.229.13:13:51.31#ibcon#end of sib2, iclass 19, count 0 2006.229.13:13:51.31#ibcon#*after write, iclass 19, count 0 2006.229.13:13:51.31#ibcon#*before return 0, iclass 19, count 0 2006.229.13:13:51.31#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:51.31#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:51.31#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:13:51.31#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:13:51.31$vck44/va=1,8 2006.229.13:13:51.31#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:13:51.31#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:13:51.31#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:51.31#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:51.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:51.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:51.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:13:51.31#ibcon#first serial, iclass 21, count 2 2006.229.13:13:51.31#ibcon#enter sib2, iclass 21, count 2 2006.229.13:13:51.31#ibcon#flushed, iclass 21, count 2 2006.229.13:13:51.31#ibcon#about to write, iclass 21, count 2 2006.229.13:13:51.31#ibcon#wrote, iclass 21, count 2 2006.229.13:13:51.31#ibcon#about to read 3, iclass 21, count 2 2006.229.13:13:51.33#ibcon#read 3, iclass 21, count 2 2006.229.13:13:51.33#ibcon#about to read 4, iclass 21, count 2 2006.229.13:13:51.33#ibcon#read 4, iclass 21, count 2 2006.229.13:13:51.33#ibcon#about to read 5, iclass 21, count 2 2006.229.13:13:51.33#ibcon#read 5, iclass 21, count 2 2006.229.13:13:51.33#ibcon#about to read 6, iclass 21, count 2 2006.229.13:13:51.33#ibcon#read 6, iclass 21, count 2 2006.229.13:13:51.33#ibcon#end of sib2, iclass 21, count 2 2006.229.13:13:51.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:13:51.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:13:51.33#ibcon#[25=AT01-08\r\n] 2006.229.13:13:51.33#ibcon#*before write, iclass 21, count 2 2006.229.13:13:51.33#ibcon#enter sib2, iclass 21, count 2 2006.229.13:13:51.33#ibcon#flushed, iclass 21, count 2 2006.229.13:13:51.33#ibcon#about to write, iclass 21, count 2 2006.229.13:13:51.33#ibcon#wrote, iclass 21, count 2 2006.229.13:13:51.33#ibcon#about to read 3, iclass 21, count 2 2006.229.13:13:51.36#ibcon#read 3, iclass 21, count 2 2006.229.13:13:51.36#ibcon#about to read 4, iclass 21, count 2 2006.229.13:13:51.36#ibcon#read 4, iclass 21, count 2 2006.229.13:13:51.36#ibcon#about to read 5, iclass 21, count 2 2006.229.13:13:51.36#ibcon#read 5, iclass 21, count 2 2006.229.13:13:51.36#ibcon#about to read 6, iclass 21, count 2 2006.229.13:13:51.36#ibcon#read 6, iclass 21, count 2 2006.229.13:13:51.36#ibcon#end of sib2, iclass 21, count 2 2006.229.13:13:51.36#ibcon#*after write, iclass 21, count 2 2006.229.13:13:51.36#ibcon#*before return 0, iclass 21, count 2 2006.229.13:13:51.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:51.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:51.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:13:51.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:51.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:51.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:51.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:51.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:13:51.48#ibcon#first serial, iclass 21, count 0 2006.229.13:13:51.48#ibcon#enter sib2, iclass 21, count 0 2006.229.13:13:51.48#ibcon#flushed, iclass 21, count 0 2006.229.13:13:51.48#ibcon#about to write, iclass 21, count 0 2006.229.13:13:51.48#ibcon#wrote, iclass 21, count 0 2006.229.13:13:51.48#ibcon#about to read 3, iclass 21, count 0 2006.229.13:13:51.50#ibcon#read 3, iclass 21, count 0 2006.229.13:13:51.50#ibcon#about to read 4, iclass 21, count 0 2006.229.13:13:51.50#ibcon#read 4, iclass 21, count 0 2006.229.13:13:51.50#ibcon#about to read 5, iclass 21, count 0 2006.229.13:13:51.50#ibcon#read 5, iclass 21, count 0 2006.229.13:13:51.50#ibcon#about to read 6, iclass 21, count 0 2006.229.13:13:51.50#ibcon#read 6, iclass 21, count 0 2006.229.13:13:51.50#ibcon#end of sib2, iclass 21, count 0 2006.229.13:13:51.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:13:51.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:13:51.50#ibcon#[25=USB\r\n] 2006.229.13:13:51.50#ibcon#*before write, iclass 21, count 0 2006.229.13:13:51.50#ibcon#enter sib2, iclass 21, count 0 2006.229.13:13:51.50#ibcon#flushed, iclass 21, count 0 2006.229.13:13:51.50#ibcon#about to write, iclass 21, count 0 2006.229.13:13:51.50#ibcon#wrote, iclass 21, count 0 2006.229.13:13:51.50#ibcon#about to read 3, iclass 21, count 0 2006.229.13:13:51.53#ibcon#read 3, iclass 21, count 0 2006.229.13:13:51.53#ibcon#about to read 4, iclass 21, count 0 2006.229.13:13:51.53#ibcon#read 4, iclass 21, count 0 2006.229.13:13:51.53#ibcon#about to read 5, iclass 21, count 0 2006.229.13:13:51.53#ibcon#read 5, iclass 21, count 0 2006.229.13:13:51.53#ibcon#about to read 6, iclass 21, count 0 2006.229.13:13:51.53#ibcon#read 6, iclass 21, count 0 2006.229.13:13:51.53#ibcon#end of sib2, iclass 21, count 0 2006.229.13:13:51.53#ibcon#*after write, iclass 21, count 0 2006.229.13:13:51.53#ibcon#*before return 0, iclass 21, count 0 2006.229.13:13:51.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:51.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:51.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:13:51.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:13:51.53$vck44/valo=2,534.99 2006.229.13:13:51.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:13:51.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:13:51.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:51.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:51.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:51.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:51.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:13:51.53#ibcon#first serial, iclass 23, count 0 2006.229.13:13:51.53#ibcon#enter sib2, iclass 23, count 0 2006.229.13:13:51.53#ibcon#flushed, iclass 23, count 0 2006.229.13:13:51.53#ibcon#about to write, iclass 23, count 0 2006.229.13:13:51.53#ibcon#wrote, iclass 23, count 0 2006.229.13:13:51.53#ibcon#about to read 3, iclass 23, count 0 2006.229.13:13:51.55#ibcon#read 3, iclass 23, count 0 2006.229.13:13:51.55#ibcon#about to read 4, iclass 23, count 0 2006.229.13:13:51.55#ibcon#read 4, iclass 23, count 0 2006.229.13:13:51.55#ibcon#about to read 5, iclass 23, count 0 2006.229.13:13:51.55#ibcon#read 5, iclass 23, count 0 2006.229.13:13:51.55#ibcon#about to read 6, iclass 23, count 0 2006.229.13:13:51.55#ibcon#read 6, iclass 23, count 0 2006.229.13:13:51.55#ibcon#end of sib2, iclass 23, count 0 2006.229.13:13:51.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:13:51.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:13:51.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:13:51.55#ibcon#*before write, iclass 23, count 0 2006.229.13:13:51.55#ibcon#enter sib2, iclass 23, count 0 2006.229.13:13:51.55#ibcon#flushed, iclass 23, count 0 2006.229.13:13:51.55#ibcon#about to write, iclass 23, count 0 2006.229.13:13:51.55#ibcon#wrote, iclass 23, count 0 2006.229.13:13:51.55#ibcon#about to read 3, iclass 23, count 0 2006.229.13:13:51.59#ibcon#read 3, iclass 23, count 0 2006.229.13:13:51.59#ibcon#about to read 4, iclass 23, count 0 2006.229.13:13:51.59#ibcon#read 4, iclass 23, count 0 2006.229.13:13:51.59#ibcon#about to read 5, iclass 23, count 0 2006.229.13:13:51.59#ibcon#read 5, iclass 23, count 0 2006.229.13:13:51.59#ibcon#about to read 6, iclass 23, count 0 2006.229.13:13:51.59#ibcon#read 6, iclass 23, count 0 2006.229.13:13:51.59#ibcon#end of sib2, iclass 23, count 0 2006.229.13:13:51.59#ibcon#*after write, iclass 23, count 0 2006.229.13:13:51.59#ibcon#*before return 0, iclass 23, count 0 2006.229.13:13:51.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:51.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:51.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:13:51.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:13:51.59$vck44/va=2,7 2006.229.13:13:51.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:13:51.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:13:51.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:51.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:51.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:51.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:51.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:13:51.65#ibcon#first serial, iclass 25, count 2 2006.229.13:13:51.65#ibcon#enter sib2, iclass 25, count 2 2006.229.13:13:51.65#ibcon#flushed, iclass 25, count 2 2006.229.13:13:51.65#ibcon#about to write, iclass 25, count 2 2006.229.13:13:51.65#ibcon#wrote, iclass 25, count 2 2006.229.13:13:51.65#ibcon#about to read 3, iclass 25, count 2 2006.229.13:13:51.67#ibcon#read 3, iclass 25, count 2 2006.229.13:13:51.67#ibcon#about to read 4, iclass 25, count 2 2006.229.13:13:51.67#ibcon#read 4, iclass 25, count 2 2006.229.13:13:51.67#ibcon#about to read 5, iclass 25, count 2 2006.229.13:13:51.67#ibcon#read 5, iclass 25, count 2 2006.229.13:13:51.67#ibcon#about to read 6, iclass 25, count 2 2006.229.13:13:51.67#ibcon#read 6, iclass 25, count 2 2006.229.13:13:51.67#ibcon#end of sib2, iclass 25, count 2 2006.229.13:13:51.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:13:51.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:13:51.67#ibcon#[25=AT02-07\r\n] 2006.229.13:13:51.67#ibcon#*before write, iclass 25, count 2 2006.229.13:13:51.67#ibcon#enter sib2, iclass 25, count 2 2006.229.13:13:51.67#ibcon#flushed, iclass 25, count 2 2006.229.13:13:51.67#ibcon#about to write, iclass 25, count 2 2006.229.13:13:51.67#ibcon#wrote, iclass 25, count 2 2006.229.13:13:51.67#ibcon#about to read 3, iclass 25, count 2 2006.229.13:13:51.70#ibcon#read 3, iclass 25, count 2 2006.229.13:13:51.70#ibcon#about to read 4, iclass 25, count 2 2006.229.13:13:51.70#ibcon#read 4, iclass 25, count 2 2006.229.13:13:51.70#ibcon#about to read 5, iclass 25, count 2 2006.229.13:13:51.70#ibcon#read 5, iclass 25, count 2 2006.229.13:13:51.70#ibcon#about to read 6, iclass 25, count 2 2006.229.13:13:51.70#ibcon#read 6, iclass 25, count 2 2006.229.13:13:51.70#ibcon#end of sib2, iclass 25, count 2 2006.229.13:13:51.70#ibcon#*after write, iclass 25, count 2 2006.229.13:13:51.70#ibcon#*before return 0, iclass 25, count 2 2006.229.13:13:51.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:51.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:51.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:13:51.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:51.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:51.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:51.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:51.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:13:51.82#ibcon#first serial, iclass 25, count 0 2006.229.13:13:51.82#ibcon#enter sib2, iclass 25, count 0 2006.229.13:13:51.82#ibcon#flushed, iclass 25, count 0 2006.229.13:13:51.82#ibcon#about to write, iclass 25, count 0 2006.229.13:13:51.82#ibcon#wrote, iclass 25, count 0 2006.229.13:13:51.82#ibcon#about to read 3, iclass 25, count 0 2006.229.13:13:51.84#ibcon#read 3, iclass 25, count 0 2006.229.13:13:51.84#ibcon#about to read 4, iclass 25, count 0 2006.229.13:13:51.84#ibcon#read 4, iclass 25, count 0 2006.229.13:13:51.84#ibcon#about to read 5, iclass 25, count 0 2006.229.13:13:51.84#ibcon#read 5, iclass 25, count 0 2006.229.13:13:51.84#ibcon#about to read 6, iclass 25, count 0 2006.229.13:13:51.84#ibcon#read 6, iclass 25, count 0 2006.229.13:13:51.84#ibcon#end of sib2, iclass 25, count 0 2006.229.13:13:51.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:13:51.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:13:51.84#ibcon#[25=USB\r\n] 2006.229.13:13:51.84#ibcon#*before write, iclass 25, count 0 2006.229.13:13:51.84#ibcon#enter sib2, iclass 25, count 0 2006.229.13:13:51.84#ibcon#flushed, iclass 25, count 0 2006.229.13:13:51.84#ibcon#about to write, iclass 25, count 0 2006.229.13:13:51.84#ibcon#wrote, iclass 25, count 0 2006.229.13:13:51.84#ibcon#about to read 3, iclass 25, count 0 2006.229.13:13:51.87#ibcon#read 3, iclass 25, count 0 2006.229.13:13:51.87#ibcon#about to read 4, iclass 25, count 0 2006.229.13:13:51.87#ibcon#read 4, iclass 25, count 0 2006.229.13:13:51.87#ibcon#about to read 5, iclass 25, count 0 2006.229.13:13:51.87#ibcon#read 5, iclass 25, count 0 2006.229.13:13:51.87#ibcon#about to read 6, iclass 25, count 0 2006.229.13:13:51.87#ibcon#read 6, iclass 25, count 0 2006.229.13:13:51.87#ibcon#end of sib2, iclass 25, count 0 2006.229.13:13:51.87#ibcon#*after write, iclass 25, count 0 2006.229.13:13:51.87#ibcon#*before return 0, iclass 25, count 0 2006.229.13:13:51.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:51.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:51.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:13:51.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:13:51.87$vck44/valo=3,564.99 2006.229.13:13:51.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:13:51.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:13:51.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:51.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:51.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:51.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:51.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:13:51.87#ibcon#first serial, iclass 27, count 0 2006.229.13:13:51.87#ibcon#enter sib2, iclass 27, count 0 2006.229.13:13:51.87#ibcon#flushed, iclass 27, count 0 2006.229.13:13:51.87#ibcon#about to write, iclass 27, count 0 2006.229.13:13:51.87#ibcon#wrote, iclass 27, count 0 2006.229.13:13:51.87#ibcon#about to read 3, iclass 27, count 0 2006.229.13:13:51.89#ibcon#read 3, iclass 27, count 0 2006.229.13:13:51.89#ibcon#about to read 4, iclass 27, count 0 2006.229.13:13:51.89#ibcon#read 4, iclass 27, count 0 2006.229.13:13:51.89#ibcon#about to read 5, iclass 27, count 0 2006.229.13:13:51.89#ibcon#read 5, iclass 27, count 0 2006.229.13:13:51.89#ibcon#about to read 6, iclass 27, count 0 2006.229.13:13:51.89#ibcon#read 6, iclass 27, count 0 2006.229.13:13:51.89#ibcon#end of sib2, iclass 27, count 0 2006.229.13:13:51.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:13:51.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:13:51.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:13:51.89#ibcon#*before write, iclass 27, count 0 2006.229.13:13:51.89#ibcon#enter sib2, iclass 27, count 0 2006.229.13:13:51.89#ibcon#flushed, iclass 27, count 0 2006.229.13:13:51.89#ibcon#about to write, iclass 27, count 0 2006.229.13:13:51.89#ibcon#wrote, iclass 27, count 0 2006.229.13:13:51.89#ibcon#about to read 3, iclass 27, count 0 2006.229.13:13:51.93#ibcon#read 3, iclass 27, count 0 2006.229.13:13:51.93#ibcon#about to read 4, iclass 27, count 0 2006.229.13:13:51.93#ibcon#read 4, iclass 27, count 0 2006.229.13:13:51.93#ibcon#about to read 5, iclass 27, count 0 2006.229.13:13:51.93#ibcon#read 5, iclass 27, count 0 2006.229.13:13:51.93#ibcon#about to read 6, iclass 27, count 0 2006.229.13:13:51.93#ibcon#read 6, iclass 27, count 0 2006.229.13:13:51.93#ibcon#end of sib2, iclass 27, count 0 2006.229.13:13:51.93#ibcon#*after write, iclass 27, count 0 2006.229.13:13:51.93#ibcon#*before return 0, iclass 27, count 0 2006.229.13:13:51.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:51.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:51.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:13:51.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:13:51.93$vck44/va=3,6 2006.229.13:13:51.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:13:51.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:13:51.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:51.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:51.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:51.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:51.99#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:13:51.99#ibcon#first serial, iclass 29, count 2 2006.229.13:13:51.99#ibcon#enter sib2, iclass 29, count 2 2006.229.13:13:51.99#ibcon#flushed, iclass 29, count 2 2006.229.13:13:51.99#ibcon#about to write, iclass 29, count 2 2006.229.13:13:51.99#ibcon#wrote, iclass 29, count 2 2006.229.13:13:51.99#ibcon#about to read 3, iclass 29, count 2 2006.229.13:13:52.01#ibcon#read 3, iclass 29, count 2 2006.229.13:13:52.01#ibcon#about to read 4, iclass 29, count 2 2006.229.13:13:52.01#ibcon#read 4, iclass 29, count 2 2006.229.13:13:52.01#ibcon#about to read 5, iclass 29, count 2 2006.229.13:13:52.01#ibcon#read 5, iclass 29, count 2 2006.229.13:13:52.01#ibcon#about to read 6, iclass 29, count 2 2006.229.13:13:52.01#ibcon#read 6, iclass 29, count 2 2006.229.13:13:52.01#ibcon#end of sib2, iclass 29, count 2 2006.229.13:13:52.01#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:13:52.01#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:13:52.01#ibcon#[25=AT03-06\r\n] 2006.229.13:13:52.01#ibcon#*before write, iclass 29, count 2 2006.229.13:13:52.01#ibcon#enter sib2, iclass 29, count 2 2006.229.13:13:52.01#ibcon#flushed, iclass 29, count 2 2006.229.13:13:52.01#ibcon#about to write, iclass 29, count 2 2006.229.13:13:52.01#ibcon#wrote, iclass 29, count 2 2006.229.13:13:52.01#ibcon#about to read 3, iclass 29, count 2 2006.229.13:13:52.04#ibcon#read 3, iclass 29, count 2 2006.229.13:13:52.04#ibcon#about to read 4, iclass 29, count 2 2006.229.13:13:52.04#ibcon#read 4, iclass 29, count 2 2006.229.13:13:52.04#ibcon#about to read 5, iclass 29, count 2 2006.229.13:13:52.04#ibcon#read 5, iclass 29, count 2 2006.229.13:13:52.04#ibcon#about to read 6, iclass 29, count 2 2006.229.13:13:52.04#ibcon#read 6, iclass 29, count 2 2006.229.13:13:52.04#ibcon#end of sib2, iclass 29, count 2 2006.229.13:13:52.04#ibcon#*after write, iclass 29, count 2 2006.229.13:13:52.04#ibcon#*before return 0, iclass 29, count 2 2006.229.13:13:52.04#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:52.04#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:52.04#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:13:52.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:52.04#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:52.16#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:52.16#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:52.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:13:52.16#ibcon#first serial, iclass 29, count 0 2006.229.13:13:52.16#ibcon#enter sib2, iclass 29, count 0 2006.229.13:13:52.16#ibcon#flushed, iclass 29, count 0 2006.229.13:13:52.16#ibcon#about to write, iclass 29, count 0 2006.229.13:13:52.16#ibcon#wrote, iclass 29, count 0 2006.229.13:13:52.16#ibcon#about to read 3, iclass 29, count 0 2006.229.13:13:52.18#ibcon#read 3, iclass 29, count 0 2006.229.13:13:52.18#ibcon#about to read 4, iclass 29, count 0 2006.229.13:13:52.18#ibcon#read 4, iclass 29, count 0 2006.229.13:13:52.18#ibcon#about to read 5, iclass 29, count 0 2006.229.13:13:52.18#ibcon#read 5, iclass 29, count 0 2006.229.13:13:52.18#ibcon#about to read 6, iclass 29, count 0 2006.229.13:13:52.18#ibcon#read 6, iclass 29, count 0 2006.229.13:13:52.18#ibcon#end of sib2, iclass 29, count 0 2006.229.13:13:52.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:13:52.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:13:52.18#ibcon#[25=USB\r\n] 2006.229.13:13:52.18#ibcon#*before write, iclass 29, count 0 2006.229.13:13:52.18#ibcon#enter sib2, iclass 29, count 0 2006.229.13:13:52.18#ibcon#flushed, iclass 29, count 0 2006.229.13:13:52.18#ibcon#about to write, iclass 29, count 0 2006.229.13:13:52.18#ibcon#wrote, iclass 29, count 0 2006.229.13:13:52.18#ibcon#about to read 3, iclass 29, count 0 2006.229.13:13:52.21#ibcon#read 3, iclass 29, count 0 2006.229.13:13:52.21#ibcon#about to read 4, iclass 29, count 0 2006.229.13:13:52.21#ibcon#read 4, iclass 29, count 0 2006.229.13:13:52.21#ibcon#about to read 5, iclass 29, count 0 2006.229.13:13:52.21#ibcon#read 5, iclass 29, count 0 2006.229.13:13:52.21#ibcon#about to read 6, iclass 29, count 0 2006.229.13:13:52.21#ibcon#read 6, iclass 29, count 0 2006.229.13:13:52.21#ibcon#end of sib2, iclass 29, count 0 2006.229.13:13:52.21#ibcon#*after write, iclass 29, count 0 2006.229.13:13:52.21#ibcon#*before return 0, iclass 29, count 0 2006.229.13:13:52.21#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:52.21#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:52.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:13:52.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:13:52.21$vck44/valo=4,624.99 2006.229.13:13:52.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:13:52.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:13:52.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:52.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:52.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:52.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:52.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:13:52.21#ibcon#first serial, iclass 31, count 0 2006.229.13:13:52.21#ibcon#enter sib2, iclass 31, count 0 2006.229.13:13:52.21#ibcon#flushed, iclass 31, count 0 2006.229.13:13:52.21#ibcon#about to write, iclass 31, count 0 2006.229.13:13:52.21#ibcon#wrote, iclass 31, count 0 2006.229.13:13:52.21#ibcon#about to read 3, iclass 31, count 0 2006.229.13:13:52.23#ibcon#read 3, iclass 31, count 0 2006.229.13:13:52.23#ibcon#about to read 4, iclass 31, count 0 2006.229.13:13:52.23#ibcon#read 4, iclass 31, count 0 2006.229.13:13:52.23#ibcon#about to read 5, iclass 31, count 0 2006.229.13:13:52.23#ibcon#read 5, iclass 31, count 0 2006.229.13:13:52.23#ibcon#about to read 6, iclass 31, count 0 2006.229.13:13:52.23#ibcon#read 6, iclass 31, count 0 2006.229.13:13:52.23#ibcon#end of sib2, iclass 31, count 0 2006.229.13:13:52.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:13:52.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:13:52.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:13:52.23#ibcon#*before write, iclass 31, count 0 2006.229.13:13:52.23#ibcon#enter sib2, iclass 31, count 0 2006.229.13:13:52.23#ibcon#flushed, iclass 31, count 0 2006.229.13:13:52.23#ibcon#about to write, iclass 31, count 0 2006.229.13:13:52.23#ibcon#wrote, iclass 31, count 0 2006.229.13:13:52.23#ibcon#about to read 3, iclass 31, count 0 2006.229.13:13:52.27#ibcon#read 3, iclass 31, count 0 2006.229.13:13:52.27#ibcon#about to read 4, iclass 31, count 0 2006.229.13:13:52.27#ibcon#read 4, iclass 31, count 0 2006.229.13:13:52.27#ibcon#about to read 5, iclass 31, count 0 2006.229.13:13:52.27#ibcon#read 5, iclass 31, count 0 2006.229.13:13:52.27#ibcon#about to read 6, iclass 31, count 0 2006.229.13:13:52.27#ibcon#read 6, iclass 31, count 0 2006.229.13:13:52.27#ibcon#end of sib2, iclass 31, count 0 2006.229.13:13:52.27#ibcon#*after write, iclass 31, count 0 2006.229.13:13:52.27#ibcon#*before return 0, iclass 31, count 0 2006.229.13:13:52.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:52.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:52.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:13:52.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:13:52.27$vck44/va=4,7 2006.229.13:13:52.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:13:52.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:13:52.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:52.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:52.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:52.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:52.33#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:13:52.33#ibcon#first serial, iclass 33, count 2 2006.229.13:13:52.33#ibcon#enter sib2, iclass 33, count 2 2006.229.13:13:52.33#ibcon#flushed, iclass 33, count 2 2006.229.13:13:52.33#ibcon#about to write, iclass 33, count 2 2006.229.13:13:52.33#ibcon#wrote, iclass 33, count 2 2006.229.13:13:52.33#ibcon#about to read 3, iclass 33, count 2 2006.229.13:13:52.35#ibcon#read 3, iclass 33, count 2 2006.229.13:13:52.35#ibcon#about to read 4, iclass 33, count 2 2006.229.13:13:52.35#ibcon#read 4, iclass 33, count 2 2006.229.13:13:52.35#ibcon#about to read 5, iclass 33, count 2 2006.229.13:13:52.35#ibcon#read 5, iclass 33, count 2 2006.229.13:13:52.35#ibcon#about to read 6, iclass 33, count 2 2006.229.13:13:52.35#ibcon#read 6, iclass 33, count 2 2006.229.13:13:52.35#ibcon#end of sib2, iclass 33, count 2 2006.229.13:13:52.35#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:13:52.35#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:13:52.35#ibcon#[25=AT04-07\r\n] 2006.229.13:13:52.35#ibcon#*before write, iclass 33, count 2 2006.229.13:13:52.35#ibcon#enter sib2, iclass 33, count 2 2006.229.13:13:52.35#ibcon#flushed, iclass 33, count 2 2006.229.13:13:52.35#ibcon#about to write, iclass 33, count 2 2006.229.13:13:52.35#ibcon#wrote, iclass 33, count 2 2006.229.13:13:52.35#ibcon#about to read 3, iclass 33, count 2 2006.229.13:13:52.38#ibcon#read 3, iclass 33, count 2 2006.229.13:13:52.38#ibcon#about to read 4, iclass 33, count 2 2006.229.13:13:52.38#ibcon#read 4, iclass 33, count 2 2006.229.13:13:52.38#ibcon#about to read 5, iclass 33, count 2 2006.229.13:13:52.38#ibcon#read 5, iclass 33, count 2 2006.229.13:13:52.38#ibcon#about to read 6, iclass 33, count 2 2006.229.13:13:52.38#ibcon#read 6, iclass 33, count 2 2006.229.13:13:52.38#ibcon#end of sib2, iclass 33, count 2 2006.229.13:13:52.38#ibcon#*after write, iclass 33, count 2 2006.229.13:13:52.38#ibcon#*before return 0, iclass 33, count 2 2006.229.13:13:52.38#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:52.38#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:52.38#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:13:52.38#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:52.38#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:52.50#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:52.50#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:52.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:13:52.50#ibcon#first serial, iclass 33, count 0 2006.229.13:13:52.50#ibcon#enter sib2, iclass 33, count 0 2006.229.13:13:52.50#ibcon#flushed, iclass 33, count 0 2006.229.13:13:52.50#ibcon#about to write, iclass 33, count 0 2006.229.13:13:52.50#ibcon#wrote, iclass 33, count 0 2006.229.13:13:52.50#ibcon#about to read 3, iclass 33, count 0 2006.229.13:13:52.52#ibcon#read 3, iclass 33, count 0 2006.229.13:13:52.52#ibcon#about to read 4, iclass 33, count 0 2006.229.13:13:52.52#ibcon#read 4, iclass 33, count 0 2006.229.13:13:52.52#ibcon#about to read 5, iclass 33, count 0 2006.229.13:13:52.52#ibcon#read 5, iclass 33, count 0 2006.229.13:13:52.52#ibcon#about to read 6, iclass 33, count 0 2006.229.13:13:52.52#ibcon#read 6, iclass 33, count 0 2006.229.13:13:52.52#ibcon#end of sib2, iclass 33, count 0 2006.229.13:13:52.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:13:52.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:13:52.52#ibcon#[25=USB\r\n] 2006.229.13:13:52.52#ibcon#*before write, iclass 33, count 0 2006.229.13:13:52.52#ibcon#enter sib2, iclass 33, count 0 2006.229.13:13:52.52#ibcon#flushed, iclass 33, count 0 2006.229.13:13:52.52#ibcon#about to write, iclass 33, count 0 2006.229.13:13:52.52#ibcon#wrote, iclass 33, count 0 2006.229.13:13:52.52#ibcon#about to read 3, iclass 33, count 0 2006.229.13:13:52.55#ibcon#read 3, iclass 33, count 0 2006.229.13:13:52.55#ibcon#about to read 4, iclass 33, count 0 2006.229.13:13:52.55#ibcon#read 4, iclass 33, count 0 2006.229.13:13:52.55#ibcon#about to read 5, iclass 33, count 0 2006.229.13:13:52.55#ibcon#read 5, iclass 33, count 0 2006.229.13:13:52.55#ibcon#about to read 6, iclass 33, count 0 2006.229.13:13:52.55#ibcon#read 6, iclass 33, count 0 2006.229.13:13:52.55#ibcon#end of sib2, iclass 33, count 0 2006.229.13:13:52.55#ibcon#*after write, iclass 33, count 0 2006.229.13:13:52.55#ibcon#*before return 0, iclass 33, count 0 2006.229.13:13:52.55#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:52.55#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:52.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:13:52.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:13:52.55$vck44/valo=5,734.99 2006.229.13:13:52.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:13:52.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:13:52.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:52.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:52.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:52.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:52.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:13:52.55#ibcon#first serial, iclass 35, count 0 2006.229.13:13:52.55#ibcon#enter sib2, iclass 35, count 0 2006.229.13:13:52.55#ibcon#flushed, iclass 35, count 0 2006.229.13:13:52.55#ibcon#about to write, iclass 35, count 0 2006.229.13:13:52.55#ibcon#wrote, iclass 35, count 0 2006.229.13:13:52.55#ibcon#about to read 3, iclass 35, count 0 2006.229.13:13:52.57#ibcon#read 3, iclass 35, count 0 2006.229.13:13:52.57#ibcon#about to read 4, iclass 35, count 0 2006.229.13:13:52.57#ibcon#read 4, iclass 35, count 0 2006.229.13:13:52.57#ibcon#about to read 5, iclass 35, count 0 2006.229.13:13:52.57#ibcon#read 5, iclass 35, count 0 2006.229.13:13:52.57#ibcon#about to read 6, iclass 35, count 0 2006.229.13:13:52.57#ibcon#read 6, iclass 35, count 0 2006.229.13:13:52.57#ibcon#end of sib2, iclass 35, count 0 2006.229.13:13:52.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:13:52.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:13:52.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:13:52.57#ibcon#*before write, iclass 35, count 0 2006.229.13:13:52.57#ibcon#enter sib2, iclass 35, count 0 2006.229.13:13:52.57#ibcon#flushed, iclass 35, count 0 2006.229.13:13:52.57#ibcon#about to write, iclass 35, count 0 2006.229.13:13:52.57#ibcon#wrote, iclass 35, count 0 2006.229.13:13:52.57#ibcon#about to read 3, iclass 35, count 0 2006.229.13:13:52.61#ibcon#read 3, iclass 35, count 0 2006.229.13:13:52.61#ibcon#about to read 4, iclass 35, count 0 2006.229.13:13:52.61#ibcon#read 4, iclass 35, count 0 2006.229.13:13:52.61#ibcon#about to read 5, iclass 35, count 0 2006.229.13:13:52.61#ibcon#read 5, iclass 35, count 0 2006.229.13:13:52.61#ibcon#about to read 6, iclass 35, count 0 2006.229.13:13:52.61#ibcon#read 6, iclass 35, count 0 2006.229.13:13:52.61#ibcon#end of sib2, iclass 35, count 0 2006.229.13:13:52.61#ibcon#*after write, iclass 35, count 0 2006.229.13:13:52.61#ibcon#*before return 0, iclass 35, count 0 2006.229.13:13:52.61#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:52.61#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:52.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:13:52.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:13:52.61$vck44/va=5,4 2006.229.13:13:52.61#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:13:52.61#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:13:52.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:52.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:52.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:52.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:52.67#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:13:52.67#ibcon#first serial, iclass 37, count 2 2006.229.13:13:52.67#ibcon#enter sib2, iclass 37, count 2 2006.229.13:13:52.67#ibcon#flushed, iclass 37, count 2 2006.229.13:13:52.67#ibcon#about to write, iclass 37, count 2 2006.229.13:13:52.67#ibcon#wrote, iclass 37, count 2 2006.229.13:13:52.67#ibcon#about to read 3, iclass 37, count 2 2006.229.13:13:52.69#ibcon#read 3, iclass 37, count 2 2006.229.13:13:52.69#ibcon#about to read 4, iclass 37, count 2 2006.229.13:13:52.69#ibcon#read 4, iclass 37, count 2 2006.229.13:13:52.69#ibcon#about to read 5, iclass 37, count 2 2006.229.13:13:52.69#ibcon#read 5, iclass 37, count 2 2006.229.13:13:52.69#ibcon#about to read 6, iclass 37, count 2 2006.229.13:13:52.69#ibcon#read 6, iclass 37, count 2 2006.229.13:13:52.69#ibcon#end of sib2, iclass 37, count 2 2006.229.13:13:52.69#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:13:52.69#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:13:52.69#ibcon#[25=AT05-04\r\n] 2006.229.13:13:52.69#ibcon#*before write, iclass 37, count 2 2006.229.13:13:52.69#ibcon#enter sib2, iclass 37, count 2 2006.229.13:13:52.69#ibcon#flushed, iclass 37, count 2 2006.229.13:13:52.69#ibcon#about to write, iclass 37, count 2 2006.229.13:13:52.69#ibcon#wrote, iclass 37, count 2 2006.229.13:13:52.69#ibcon#about to read 3, iclass 37, count 2 2006.229.13:13:52.72#ibcon#read 3, iclass 37, count 2 2006.229.13:13:52.72#ibcon#about to read 4, iclass 37, count 2 2006.229.13:13:52.72#ibcon#read 4, iclass 37, count 2 2006.229.13:13:52.72#ibcon#about to read 5, iclass 37, count 2 2006.229.13:13:52.72#ibcon#read 5, iclass 37, count 2 2006.229.13:13:52.72#ibcon#about to read 6, iclass 37, count 2 2006.229.13:13:52.72#ibcon#read 6, iclass 37, count 2 2006.229.13:13:52.72#ibcon#end of sib2, iclass 37, count 2 2006.229.13:13:52.72#ibcon#*after write, iclass 37, count 2 2006.229.13:13:52.72#ibcon#*before return 0, iclass 37, count 2 2006.229.13:13:52.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:52.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:52.72#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:13:52.72#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:52.72#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:52.84#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:52.84#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:52.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:13:52.84#ibcon#first serial, iclass 37, count 0 2006.229.13:13:52.84#ibcon#enter sib2, iclass 37, count 0 2006.229.13:13:52.84#ibcon#flushed, iclass 37, count 0 2006.229.13:13:52.84#ibcon#about to write, iclass 37, count 0 2006.229.13:13:52.84#ibcon#wrote, iclass 37, count 0 2006.229.13:13:52.84#ibcon#about to read 3, iclass 37, count 0 2006.229.13:13:52.86#ibcon#read 3, iclass 37, count 0 2006.229.13:13:52.86#ibcon#about to read 4, iclass 37, count 0 2006.229.13:13:52.86#ibcon#read 4, iclass 37, count 0 2006.229.13:13:52.86#ibcon#about to read 5, iclass 37, count 0 2006.229.13:13:52.86#ibcon#read 5, iclass 37, count 0 2006.229.13:13:52.86#ibcon#about to read 6, iclass 37, count 0 2006.229.13:13:52.86#ibcon#read 6, iclass 37, count 0 2006.229.13:13:52.86#ibcon#end of sib2, iclass 37, count 0 2006.229.13:13:52.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:13:52.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:13:52.86#ibcon#[25=USB\r\n] 2006.229.13:13:52.86#ibcon#*before write, iclass 37, count 0 2006.229.13:13:52.86#ibcon#enter sib2, iclass 37, count 0 2006.229.13:13:52.86#ibcon#flushed, iclass 37, count 0 2006.229.13:13:52.86#ibcon#about to write, iclass 37, count 0 2006.229.13:13:52.86#ibcon#wrote, iclass 37, count 0 2006.229.13:13:52.86#ibcon#about to read 3, iclass 37, count 0 2006.229.13:13:52.89#ibcon#read 3, iclass 37, count 0 2006.229.13:13:52.89#ibcon#about to read 4, iclass 37, count 0 2006.229.13:13:52.89#ibcon#read 4, iclass 37, count 0 2006.229.13:13:52.89#ibcon#about to read 5, iclass 37, count 0 2006.229.13:13:52.89#ibcon#read 5, iclass 37, count 0 2006.229.13:13:52.89#ibcon#about to read 6, iclass 37, count 0 2006.229.13:13:52.89#ibcon#read 6, iclass 37, count 0 2006.229.13:13:52.89#ibcon#end of sib2, iclass 37, count 0 2006.229.13:13:52.89#ibcon#*after write, iclass 37, count 0 2006.229.13:13:52.89#ibcon#*before return 0, iclass 37, count 0 2006.229.13:13:52.89#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:52.89#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:52.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:13:52.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:13:52.89$vck44/valo=6,814.99 2006.229.13:13:52.89#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:13:52.89#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:13:52.89#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:52.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:52.89#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:52.89#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:52.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:13:52.89#ibcon#first serial, iclass 39, count 0 2006.229.13:13:52.89#ibcon#enter sib2, iclass 39, count 0 2006.229.13:13:52.89#ibcon#flushed, iclass 39, count 0 2006.229.13:13:52.89#ibcon#about to write, iclass 39, count 0 2006.229.13:13:52.89#ibcon#wrote, iclass 39, count 0 2006.229.13:13:52.89#ibcon#about to read 3, iclass 39, count 0 2006.229.13:13:52.91#ibcon#read 3, iclass 39, count 0 2006.229.13:13:52.91#ibcon#about to read 4, iclass 39, count 0 2006.229.13:13:52.91#ibcon#read 4, iclass 39, count 0 2006.229.13:13:52.91#ibcon#about to read 5, iclass 39, count 0 2006.229.13:13:52.91#ibcon#read 5, iclass 39, count 0 2006.229.13:13:52.91#ibcon#about to read 6, iclass 39, count 0 2006.229.13:13:52.91#ibcon#read 6, iclass 39, count 0 2006.229.13:13:52.91#ibcon#end of sib2, iclass 39, count 0 2006.229.13:13:52.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:13:52.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:13:52.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:13:52.91#ibcon#*before write, iclass 39, count 0 2006.229.13:13:52.91#ibcon#enter sib2, iclass 39, count 0 2006.229.13:13:52.91#ibcon#flushed, iclass 39, count 0 2006.229.13:13:52.91#ibcon#about to write, iclass 39, count 0 2006.229.13:13:52.91#ibcon#wrote, iclass 39, count 0 2006.229.13:13:52.91#ibcon#about to read 3, iclass 39, count 0 2006.229.13:13:52.95#ibcon#read 3, iclass 39, count 0 2006.229.13:13:52.95#ibcon#about to read 4, iclass 39, count 0 2006.229.13:13:52.95#ibcon#read 4, iclass 39, count 0 2006.229.13:13:52.95#ibcon#about to read 5, iclass 39, count 0 2006.229.13:13:52.95#ibcon#read 5, iclass 39, count 0 2006.229.13:13:52.95#ibcon#about to read 6, iclass 39, count 0 2006.229.13:13:52.95#ibcon#read 6, iclass 39, count 0 2006.229.13:13:52.95#ibcon#end of sib2, iclass 39, count 0 2006.229.13:13:52.95#ibcon#*after write, iclass 39, count 0 2006.229.13:13:52.95#ibcon#*before return 0, iclass 39, count 0 2006.229.13:13:52.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:52.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:52.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:13:52.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:13:52.95$vck44/va=6,4 2006.229.13:13:52.95#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.13:13:52.95#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.13:13:52.95#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:52.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:53.01#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:53.01#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:53.01#ibcon#enter wrdev, iclass 3, count 2 2006.229.13:13:53.01#ibcon#first serial, iclass 3, count 2 2006.229.13:13:53.01#ibcon#enter sib2, iclass 3, count 2 2006.229.13:13:53.01#ibcon#flushed, iclass 3, count 2 2006.229.13:13:53.01#ibcon#about to write, iclass 3, count 2 2006.229.13:13:53.01#ibcon#wrote, iclass 3, count 2 2006.229.13:13:53.01#ibcon#about to read 3, iclass 3, count 2 2006.229.13:13:53.03#ibcon#read 3, iclass 3, count 2 2006.229.13:13:53.03#ibcon#about to read 4, iclass 3, count 2 2006.229.13:13:53.03#ibcon#read 4, iclass 3, count 2 2006.229.13:13:53.03#ibcon#about to read 5, iclass 3, count 2 2006.229.13:13:53.03#ibcon#read 5, iclass 3, count 2 2006.229.13:13:53.03#ibcon#about to read 6, iclass 3, count 2 2006.229.13:13:53.03#ibcon#read 6, iclass 3, count 2 2006.229.13:13:53.03#ibcon#end of sib2, iclass 3, count 2 2006.229.13:13:53.03#ibcon#*mode == 0, iclass 3, count 2 2006.229.13:13:53.03#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.13:13:53.03#ibcon#[25=AT06-04\r\n] 2006.229.13:13:53.03#ibcon#*before write, iclass 3, count 2 2006.229.13:13:53.03#ibcon#enter sib2, iclass 3, count 2 2006.229.13:13:53.03#ibcon#flushed, iclass 3, count 2 2006.229.13:13:53.03#ibcon#about to write, iclass 3, count 2 2006.229.13:13:53.03#ibcon#wrote, iclass 3, count 2 2006.229.13:13:53.03#ibcon#about to read 3, iclass 3, count 2 2006.229.13:13:53.06#ibcon#read 3, iclass 3, count 2 2006.229.13:13:53.06#ibcon#about to read 4, iclass 3, count 2 2006.229.13:13:53.06#ibcon#read 4, iclass 3, count 2 2006.229.13:13:53.06#ibcon#about to read 5, iclass 3, count 2 2006.229.13:13:53.06#ibcon#read 5, iclass 3, count 2 2006.229.13:13:53.06#ibcon#about to read 6, iclass 3, count 2 2006.229.13:13:53.06#ibcon#read 6, iclass 3, count 2 2006.229.13:13:53.06#ibcon#end of sib2, iclass 3, count 2 2006.229.13:13:53.06#ibcon#*after write, iclass 3, count 2 2006.229.13:13:53.06#ibcon#*before return 0, iclass 3, count 2 2006.229.13:13:53.06#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:53.06#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:53.06#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.13:13:53.06#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:53.06#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:53.18#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:53.18#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:53.18#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:13:53.18#ibcon#first serial, iclass 3, count 0 2006.229.13:13:53.18#ibcon#enter sib2, iclass 3, count 0 2006.229.13:13:53.18#ibcon#flushed, iclass 3, count 0 2006.229.13:13:53.18#ibcon#about to write, iclass 3, count 0 2006.229.13:13:53.18#ibcon#wrote, iclass 3, count 0 2006.229.13:13:53.18#ibcon#about to read 3, iclass 3, count 0 2006.229.13:13:53.20#ibcon#read 3, iclass 3, count 0 2006.229.13:13:53.20#ibcon#about to read 4, iclass 3, count 0 2006.229.13:13:53.20#ibcon#read 4, iclass 3, count 0 2006.229.13:13:53.20#ibcon#about to read 5, iclass 3, count 0 2006.229.13:13:53.20#ibcon#read 5, iclass 3, count 0 2006.229.13:13:53.20#ibcon#about to read 6, iclass 3, count 0 2006.229.13:13:53.20#ibcon#read 6, iclass 3, count 0 2006.229.13:13:53.20#ibcon#end of sib2, iclass 3, count 0 2006.229.13:13:53.20#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:13:53.20#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:13:53.20#ibcon#[25=USB\r\n] 2006.229.13:13:53.20#ibcon#*before write, iclass 3, count 0 2006.229.13:13:53.20#ibcon#enter sib2, iclass 3, count 0 2006.229.13:13:53.20#ibcon#flushed, iclass 3, count 0 2006.229.13:13:53.20#ibcon#about to write, iclass 3, count 0 2006.229.13:13:53.20#ibcon#wrote, iclass 3, count 0 2006.229.13:13:53.20#ibcon#about to read 3, iclass 3, count 0 2006.229.13:13:53.23#ibcon#read 3, iclass 3, count 0 2006.229.13:13:53.23#ibcon#about to read 4, iclass 3, count 0 2006.229.13:13:53.23#ibcon#read 4, iclass 3, count 0 2006.229.13:13:53.23#ibcon#about to read 5, iclass 3, count 0 2006.229.13:13:53.23#ibcon#read 5, iclass 3, count 0 2006.229.13:13:53.23#ibcon#about to read 6, iclass 3, count 0 2006.229.13:13:53.23#ibcon#read 6, iclass 3, count 0 2006.229.13:13:53.23#ibcon#end of sib2, iclass 3, count 0 2006.229.13:13:53.23#ibcon#*after write, iclass 3, count 0 2006.229.13:13:53.23#ibcon#*before return 0, iclass 3, count 0 2006.229.13:13:53.23#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:53.23#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:53.23#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:13:53.23#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:13:53.23$vck44/valo=7,864.99 2006.229.13:13:53.23#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:13:53.23#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:13:53.23#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:53.23#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:53.23#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:53.23#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:53.23#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:13:53.23#ibcon#first serial, iclass 5, count 0 2006.229.13:13:53.23#ibcon#enter sib2, iclass 5, count 0 2006.229.13:13:53.23#ibcon#flushed, iclass 5, count 0 2006.229.13:13:53.23#ibcon#about to write, iclass 5, count 0 2006.229.13:13:53.23#ibcon#wrote, iclass 5, count 0 2006.229.13:13:53.23#ibcon#about to read 3, iclass 5, count 0 2006.229.13:13:53.25#ibcon#read 3, iclass 5, count 0 2006.229.13:13:53.25#ibcon#about to read 4, iclass 5, count 0 2006.229.13:13:53.25#ibcon#read 4, iclass 5, count 0 2006.229.13:13:53.25#ibcon#about to read 5, iclass 5, count 0 2006.229.13:13:53.25#ibcon#read 5, iclass 5, count 0 2006.229.13:13:53.25#ibcon#about to read 6, iclass 5, count 0 2006.229.13:13:53.25#ibcon#read 6, iclass 5, count 0 2006.229.13:13:53.25#ibcon#end of sib2, iclass 5, count 0 2006.229.13:13:53.25#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:13:53.25#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:13:53.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:13:53.25#ibcon#*before write, iclass 5, count 0 2006.229.13:13:53.25#ibcon#enter sib2, iclass 5, count 0 2006.229.13:13:53.25#ibcon#flushed, iclass 5, count 0 2006.229.13:13:53.25#ibcon#about to write, iclass 5, count 0 2006.229.13:13:53.25#ibcon#wrote, iclass 5, count 0 2006.229.13:13:53.25#ibcon#about to read 3, iclass 5, count 0 2006.229.13:13:53.29#ibcon#read 3, iclass 5, count 0 2006.229.13:13:53.29#ibcon#about to read 4, iclass 5, count 0 2006.229.13:13:53.29#ibcon#read 4, iclass 5, count 0 2006.229.13:13:53.29#ibcon#about to read 5, iclass 5, count 0 2006.229.13:13:53.29#ibcon#read 5, iclass 5, count 0 2006.229.13:13:53.29#ibcon#about to read 6, iclass 5, count 0 2006.229.13:13:53.29#ibcon#read 6, iclass 5, count 0 2006.229.13:13:53.29#ibcon#end of sib2, iclass 5, count 0 2006.229.13:13:53.29#ibcon#*after write, iclass 5, count 0 2006.229.13:13:53.29#ibcon#*before return 0, iclass 5, count 0 2006.229.13:13:53.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:53.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:53.29#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:13:53.29#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:13:53.29$vck44/va=7,5 2006.229.13:13:53.29#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:13:53.29#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:13:53.29#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:53.29#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:53.35#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:53.35#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:53.35#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:13:53.35#ibcon#first serial, iclass 7, count 2 2006.229.13:13:53.35#ibcon#enter sib2, iclass 7, count 2 2006.229.13:13:53.35#ibcon#flushed, iclass 7, count 2 2006.229.13:13:53.35#ibcon#about to write, iclass 7, count 2 2006.229.13:13:53.35#ibcon#wrote, iclass 7, count 2 2006.229.13:13:53.35#ibcon#about to read 3, iclass 7, count 2 2006.229.13:13:53.37#ibcon#read 3, iclass 7, count 2 2006.229.13:13:53.37#ibcon#about to read 4, iclass 7, count 2 2006.229.13:13:53.37#ibcon#read 4, iclass 7, count 2 2006.229.13:13:53.37#ibcon#about to read 5, iclass 7, count 2 2006.229.13:13:53.37#ibcon#read 5, iclass 7, count 2 2006.229.13:13:53.37#ibcon#about to read 6, iclass 7, count 2 2006.229.13:13:53.37#ibcon#read 6, iclass 7, count 2 2006.229.13:13:53.37#ibcon#end of sib2, iclass 7, count 2 2006.229.13:13:53.37#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:13:53.37#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:13:53.37#ibcon#[25=AT07-05\r\n] 2006.229.13:13:53.37#ibcon#*before write, iclass 7, count 2 2006.229.13:13:53.37#ibcon#enter sib2, iclass 7, count 2 2006.229.13:13:53.37#ibcon#flushed, iclass 7, count 2 2006.229.13:13:53.37#ibcon#about to write, iclass 7, count 2 2006.229.13:13:53.37#ibcon#wrote, iclass 7, count 2 2006.229.13:13:53.37#ibcon#about to read 3, iclass 7, count 2 2006.229.13:13:53.40#ibcon#read 3, iclass 7, count 2 2006.229.13:13:53.40#ibcon#about to read 4, iclass 7, count 2 2006.229.13:13:53.40#ibcon#read 4, iclass 7, count 2 2006.229.13:13:53.40#ibcon#about to read 5, iclass 7, count 2 2006.229.13:13:53.40#ibcon#read 5, iclass 7, count 2 2006.229.13:13:53.40#ibcon#about to read 6, iclass 7, count 2 2006.229.13:13:53.40#ibcon#read 6, iclass 7, count 2 2006.229.13:13:53.40#ibcon#end of sib2, iclass 7, count 2 2006.229.13:13:53.40#ibcon#*after write, iclass 7, count 2 2006.229.13:13:53.40#ibcon#*before return 0, iclass 7, count 2 2006.229.13:13:53.40#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:53.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:53.40#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:13:53.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:53.40#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:53.52#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:53.52#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:53.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:13:53.52#ibcon#first serial, iclass 7, count 0 2006.229.13:13:53.52#ibcon#enter sib2, iclass 7, count 0 2006.229.13:13:53.52#ibcon#flushed, iclass 7, count 0 2006.229.13:13:53.52#ibcon#about to write, iclass 7, count 0 2006.229.13:13:53.52#ibcon#wrote, iclass 7, count 0 2006.229.13:13:53.52#ibcon#about to read 3, iclass 7, count 0 2006.229.13:13:53.54#ibcon#read 3, iclass 7, count 0 2006.229.13:13:53.54#ibcon#about to read 4, iclass 7, count 0 2006.229.13:13:53.54#ibcon#read 4, iclass 7, count 0 2006.229.13:13:53.54#ibcon#about to read 5, iclass 7, count 0 2006.229.13:13:53.54#ibcon#read 5, iclass 7, count 0 2006.229.13:13:53.54#ibcon#about to read 6, iclass 7, count 0 2006.229.13:13:53.54#ibcon#read 6, iclass 7, count 0 2006.229.13:13:53.54#ibcon#end of sib2, iclass 7, count 0 2006.229.13:13:53.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:13:53.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:13:53.54#ibcon#[25=USB\r\n] 2006.229.13:13:53.54#ibcon#*before write, iclass 7, count 0 2006.229.13:13:53.54#ibcon#enter sib2, iclass 7, count 0 2006.229.13:13:53.54#ibcon#flushed, iclass 7, count 0 2006.229.13:13:53.54#ibcon#about to write, iclass 7, count 0 2006.229.13:13:53.54#ibcon#wrote, iclass 7, count 0 2006.229.13:13:53.54#ibcon#about to read 3, iclass 7, count 0 2006.229.13:13:53.57#ibcon#read 3, iclass 7, count 0 2006.229.13:13:53.57#ibcon#about to read 4, iclass 7, count 0 2006.229.13:13:53.57#ibcon#read 4, iclass 7, count 0 2006.229.13:13:53.57#ibcon#about to read 5, iclass 7, count 0 2006.229.13:13:53.57#ibcon#read 5, iclass 7, count 0 2006.229.13:13:53.57#ibcon#about to read 6, iclass 7, count 0 2006.229.13:13:53.57#ibcon#read 6, iclass 7, count 0 2006.229.13:13:53.57#ibcon#end of sib2, iclass 7, count 0 2006.229.13:13:53.57#ibcon#*after write, iclass 7, count 0 2006.229.13:13:53.57#ibcon#*before return 0, iclass 7, count 0 2006.229.13:13:53.57#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:53.57#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:53.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:13:53.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:13:53.57$vck44/valo=8,884.99 2006.229.13:13:53.57#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:13:53.57#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:13:53.57#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:53.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:53.57#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:53.57#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:53.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:13:53.57#ibcon#first serial, iclass 11, count 0 2006.229.13:13:53.57#ibcon#enter sib2, iclass 11, count 0 2006.229.13:13:53.57#ibcon#flushed, iclass 11, count 0 2006.229.13:13:53.57#ibcon#about to write, iclass 11, count 0 2006.229.13:13:53.57#ibcon#wrote, iclass 11, count 0 2006.229.13:13:53.57#ibcon#about to read 3, iclass 11, count 0 2006.229.13:13:53.59#ibcon#read 3, iclass 11, count 0 2006.229.13:13:53.59#ibcon#about to read 4, iclass 11, count 0 2006.229.13:13:53.59#ibcon#read 4, iclass 11, count 0 2006.229.13:13:53.59#ibcon#about to read 5, iclass 11, count 0 2006.229.13:13:53.59#ibcon#read 5, iclass 11, count 0 2006.229.13:13:53.59#ibcon#about to read 6, iclass 11, count 0 2006.229.13:13:53.59#ibcon#read 6, iclass 11, count 0 2006.229.13:13:53.59#ibcon#end of sib2, iclass 11, count 0 2006.229.13:13:53.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:13:53.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:13:53.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:13:53.59#ibcon#*before write, iclass 11, count 0 2006.229.13:13:53.59#ibcon#enter sib2, iclass 11, count 0 2006.229.13:13:53.59#ibcon#flushed, iclass 11, count 0 2006.229.13:13:53.59#ibcon#about to write, iclass 11, count 0 2006.229.13:13:53.59#ibcon#wrote, iclass 11, count 0 2006.229.13:13:53.59#ibcon#about to read 3, iclass 11, count 0 2006.229.13:13:53.63#ibcon#read 3, iclass 11, count 0 2006.229.13:13:53.63#ibcon#about to read 4, iclass 11, count 0 2006.229.13:13:53.63#ibcon#read 4, iclass 11, count 0 2006.229.13:13:53.63#ibcon#about to read 5, iclass 11, count 0 2006.229.13:13:53.63#ibcon#read 5, iclass 11, count 0 2006.229.13:13:53.63#ibcon#about to read 6, iclass 11, count 0 2006.229.13:13:53.63#ibcon#read 6, iclass 11, count 0 2006.229.13:13:53.63#ibcon#end of sib2, iclass 11, count 0 2006.229.13:13:53.63#ibcon#*after write, iclass 11, count 0 2006.229.13:13:53.63#ibcon#*before return 0, iclass 11, count 0 2006.229.13:13:53.63#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:53.63#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:53.63#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:13:53.63#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:13:53.63$vck44/va=8,6 2006.229.13:13:53.63#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.13:13:53.63#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.13:13:53.63#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:53.63#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:13:53.69#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:13:53.69#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:13:53.69#ibcon#enter wrdev, iclass 13, count 2 2006.229.13:13:53.69#ibcon#first serial, iclass 13, count 2 2006.229.13:13:53.69#ibcon#enter sib2, iclass 13, count 2 2006.229.13:13:53.69#ibcon#flushed, iclass 13, count 2 2006.229.13:13:53.69#ibcon#about to write, iclass 13, count 2 2006.229.13:13:53.69#ibcon#wrote, iclass 13, count 2 2006.229.13:13:53.69#ibcon#about to read 3, iclass 13, count 2 2006.229.13:13:53.71#ibcon#read 3, iclass 13, count 2 2006.229.13:13:53.71#ibcon#about to read 4, iclass 13, count 2 2006.229.13:13:53.71#ibcon#read 4, iclass 13, count 2 2006.229.13:13:53.71#ibcon#about to read 5, iclass 13, count 2 2006.229.13:13:53.71#ibcon#read 5, iclass 13, count 2 2006.229.13:13:53.71#ibcon#about to read 6, iclass 13, count 2 2006.229.13:13:53.71#ibcon#read 6, iclass 13, count 2 2006.229.13:13:53.71#ibcon#end of sib2, iclass 13, count 2 2006.229.13:13:53.71#ibcon#*mode == 0, iclass 13, count 2 2006.229.13:13:53.71#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.13:13:53.71#ibcon#[25=AT08-06\r\n] 2006.229.13:13:53.71#ibcon#*before write, iclass 13, count 2 2006.229.13:13:53.71#ibcon#enter sib2, iclass 13, count 2 2006.229.13:13:53.71#ibcon#flushed, iclass 13, count 2 2006.229.13:13:53.71#ibcon#about to write, iclass 13, count 2 2006.229.13:13:53.71#ibcon#wrote, iclass 13, count 2 2006.229.13:13:53.71#ibcon#about to read 3, iclass 13, count 2 2006.229.13:13:53.74#ibcon#read 3, iclass 13, count 2 2006.229.13:13:53.74#ibcon#about to read 4, iclass 13, count 2 2006.229.13:13:53.74#ibcon#read 4, iclass 13, count 2 2006.229.13:13:53.74#ibcon#about to read 5, iclass 13, count 2 2006.229.13:13:53.74#ibcon#read 5, iclass 13, count 2 2006.229.13:13:53.74#ibcon#about to read 6, iclass 13, count 2 2006.229.13:13:53.74#ibcon#read 6, iclass 13, count 2 2006.229.13:13:53.74#ibcon#end of sib2, iclass 13, count 2 2006.229.13:13:53.74#ibcon#*after write, iclass 13, count 2 2006.229.13:13:53.74#ibcon#*before return 0, iclass 13, count 2 2006.229.13:13:53.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:13:53.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:13:53.74#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.13:13:53.74#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:53.74#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:13:53.86#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:13:53.86#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:13:53.86#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:13:53.86#ibcon#first serial, iclass 13, count 0 2006.229.13:13:53.86#ibcon#enter sib2, iclass 13, count 0 2006.229.13:13:53.86#ibcon#flushed, iclass 13, count 0 2006.229.13:13:53.86#ibcon#about to write, iclass 13, count 0 2006.229.13:13:53.86#ibcon#wrote, iclass 13, count 0 2006.229.13:13:53.86#ibcon#about to read 3, iclass 13, count 0 2006.229.13:13:53.88#ibcon#read 3, iclass 13, count 0 2006.229.13:13:53.88#ibcon#about to read 4, iclass 13, count 0 2006.229.13:13:53.88#ibcon#read 4, iclass 13, count 0 2006.229.13:13:53.88#ibcon#about to read 5, iclass 13, count 0 2006.229.13:13:53.88#ibcon#read 5, iclass 13, count 0 2006.229.13:13:53.88#ibcon#about to read 6, iclass 13, count 0 2006.229.13:13:53.88#ibcon#read 6, iclass 13, count 0 2006.229.13:13:53.88#ibcon#end of sib2, iclass 13, count 0 2006.229.13:13:53.88#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:13:53.88#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:13:53.88#ibcon#[25=USB\r\n] 2006.229.13:13:53.88#ibcon#*before write, iclass 13, count 0 2006.229.13:13:53.88#ibcon#enter sib2, iclass 13, count 0 2006.229.13:13:53.88#ibcon#flushed, iclass 13, count 0 2006.229.13:13:53.88#ibcon#about to write, iclass 13, count 0 2006.229.13:13:53.88#ibcon#wrote, iclass 13, count 0 2006.229.13:13:53.88#ibcon#about to read 3, iclass 13, count 0 2006.229.13:13:53.91#ibcon#read 3, iclass 13, count 0 2006.229.13:13:53.91#ibcon#about to read 4, iclass 13, count 0 2006.229.13:13:53.91#ibcon#read 4, iclass 13, count 0 2006.229.13:13:53.91#ibcon#about to read 5, iclass 13, count 0 2006.229.13:13:53.91#ibcon#read 5, iclass 13, count 0 2006.229.13:13:53.91#ibcon#about to read 6, iclass 13, count 0 2006.229.13:13:53.91#ibcon#read 6, iclass 13, count 0 2006.229.13:13:53.91#ibcon#end of sib2, iclass 13, count 0 2006.229.13:13:53.91#ibcon#*after write, iclass 13, count 0 2006.229.13:13:53.91#ibcon#*before return 0, iclass 13, count 0 2006.229.13:13:53.91#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:13:53.91#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:13:53.91#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:13:53.91#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:13:53.91$vck44/vblo=1,629.99 2006.229.13:13:53.91#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.13:13:53.91#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.13:13:53.91#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:53.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:13:53.91#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:13:53.91#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:13:53.91#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:13:53.91#ibcon#first serial, iclass 15, count 0 2006.229.13:13:53.91#ibcon#enter sib2, iclass 15, count 0 2006.229.13:13:53.91#ibcon#flushed, iclass 15, count 0 2006.229.13:13:53.91#ibcon#about to write, iclass 15, count 0 2006.229.13:13:53.91#ibcon#wrote, iclass 15, count 0 2006.229.13:13:53.91#ibcon#about to read 3, iclass 15, count 0 2006.229.13:13:53.93#ibcon#read 3, iclass 15, count 0 2006.229.13:13:53.93#ibcon#about to read 4, iclass 15, count 0 2006.229.13:13:53.93#ibcon#read 4, iclass 15, count 0 2006.229.13:13:53.93#ibcon#about to read 5, iclass 15, count 0 2006.229.13:13:53.93#ibcon#read 5, iclass 15, count 0 2006.229.13:13:53.93#ibcon#about to read 6, iclass 15, count 0 2006.229.13:13:53.93#ibcon#read 6, iclass 15, count 0 2006.229.13:13:53.93#ibcon#end of sib2, iclass 15, count 0 2006.229.13:13:53.93#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:13:53.93#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:13:53.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:13:53.93#ibcon#*before write, iclass 15, count 0 2006.229.13:13:53.93#ibcon#enter sib2, iclass 15, count 0 2006.229.13:13:53.93#ibcon#flushed, iclass 15, count 0 2006.229.13:13:53.93#ibcon#about to write, iclass 15, count 0 2006.229.13:13:53.93#ibcon#wrote, iclass 15, count 0 2006.229.13:13:53.93#ibcon#about to read 3, iclass 15, count 0 2006.229.13:13:53.97#ibcon#read 3, iclass 15, count 0 2006.229.13:13:53.97#ibcon#about to read 4, iclass 15, count 0 2006.229.13:13:53.97#ibcon#read 4, iclass 15, count 0 2006.229.13:13:53.97#ibcon#about to read 5, iclass 15, count 0 2006.229.13:13:53.97#ibcon#read 5, iclass 15, count 0 2006.229.13:13:53.97#ibcon#about to read 6, iclass 15, count 0 2006.229.13:13:53.97#ibcon#read 6, iclass 15, count 0 2006.229.13:13:53.97#ibcon#end of sib2, iclass 15, count 0 2006.229.13:13:53.97#ibcon#*after write, iclass 15, count 0 2006.229.13:13:53.97#ibcon#*before return 0, iclass 15, count 0 2006.229.13:13:53.97#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:13:53.97#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:13:53.97#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:13:53.97#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:13:53.97$vck44/vb=1,4 2006.229.13:13:53.97#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.13:13:53.97#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.13:13:53.97#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:53.97#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:13:53.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:13:53.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:13:53.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.13:13:53.97#ibcon#first serial, iclass 17, count 2 2006.229.13:13:53.97#ibcon#enter sib2, iclass 17, count 2 2006.229.13:13:53.97#ibcon#flushed, iclass 17, count 2 2006.229.13:13:53.97#ibcon#about to write, iclass 17, count 2 2006.229.13:13:53.97#ibcon#wrote, iclass 17, count 2 2006.229.13:13:53.97#ibcon#about to read 3, iclass 17, count 2 2006.229.13:13:53.99#ibcon#read 3, iclass 17, count 2 2006.229.13:13:53.99#ibcon#about to read 4, iclass 17, count 2 2006.229.13:13:53.99#ibcon#read 4, iclass 17, count 2 2006.229.13:13:53.99#ibcon#about to read 5, iclass 17, count 2 2006.229.13:13:53.99#ibcon#read 5, iclass 17, count 2 2006.229.13:13:53.99#ibcon#about to read 6, iclass 17, count 2 2006.229.13:13:53.99#ibcon#read 6, iclass 17, count 2 2006.229.13:13:53.99#ibcon#end of sib2, iclass 17, count 2 2006.229.13:13:53.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.13:13:53.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.13:13:53.99#ibcon#[27=AT01-04\r\n] 2006.229.13:13:53.99#ibcon#*before write, iclass 17, count 2 2006.229.13:13:53.99#ibcon#enter sib2, iclass 17, count 2 2006.229.13:13:53.99#ibcon#flushed, iclass 17, count 2 2006.229.13:13:53.99#ibcon#about to write, iclass 17, count 2 2006.229.13:13:53.99#ibcon#wrote, iclass 17, count 2 2006.229.13:13:53.99#ibcon#about to read 3, iclass 17, count 2 2006.229.13:13:54.02#ibcon#read 3, iclass 17, count 2 2006.229.13:13:54.02#ibcon#about to read 4, iclass 17, count 2 2006.229.13:13:54.02#ibcon#read 4, iclass 17, count 2 2006.229.13:13:54.02#ibcon#about to read 5, iclass 17, count 2 2006.229.13:13:54.02#ibcon#read 5, iclass 17, count 2 2006.229.13:13:54.02#ibcon#about to read 6, iclass 17, count 2 2006.229.13:13:54.02#ibcon#read 6, iclass 17, count 2 2006.229.13:13:54.02#ibcon#end of sib2, iclass 17, count 2 2006.229.13:13:54.02#ibcon#*after write, iclass 17, count 2 2006.229.13:13:54.02#ibcon#*before return 0, iclass 17, count 2 2006.229.13:13:54.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:13:54.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:13:54.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.13:13:54.02#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:54.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:13:54.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:13:54.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:13:54.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:13:54.14#ibcon#first serial, iclass 17, count 0 2006.229.13:13:54.14#ibcon#enter sib2, iclass 17, count 0 2006.229.13:13:54.14#ibcon#flushed, iclass 17, count 0 2006.229.13:13:54.14#ibcon#about to write, iclass 17, count 0 2006.229.13:13:54.14#ibcon#wrote, iclass 17, count 0 2006.229.13:13:54.14#ibcon#about to read 3, iclass 17, count 0 2006.229.13:13:54.16#ibcon#read 3, iclass 17, count 0 2006.229.13:13:54.16#ibcon#about to read 4, iclass 17, count 0 2006.229.13:13:54.16#ibcon#read 4, iclass 17, count 0 2006.229.13:13:54.16#ibcon#about to read 5, iclass 17, count 0 2006.229.13:13:54.16#ibcon#read 5, iclass 17, count 0 2006.229.13:13:54.16#ibcon#about to read 6, iclass 17, count 0 2006.229.13:13:54.16#ibcon#read 6, iclass 17, count 0 2006.229.13:13:54.16#ibcon#end of sib2, iclass 17, count 0 2006.229.13:13:54.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:13:54.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:13:54.16#ibcon#[27=USB\r\n] 2006.229.13:13:54.16#ibcon#*before write, iclass 17, count 0 2006.229.13:13:54.16#ibcon#enter sib2, iclass 17, count 0 2006.229.13:13:54.16#ibcon#flushed, iclass 17, count 0 2006.229.13:13:54.16#ibcon#about to write, iclass 17, count 0 2006.229.13:13:54.16#ibcon#wrote, iclass 17, count 0 2006.229.13:13:54.16#ibcon#about to read 3, iclass 17, count 0 2006.229.13:13:54.19#ibcon#read 3, iclass 17, count 0 2006.229.13:13:54.19#ibcon#about to read 4, iclass 17, count 0 2006.229.13:13:54.19#ibcon#read 4, iclass 17, count 0 2006.229.13:13:54.19#ibcon#about to read 5, iclass 17, count 0 2006.229.13:13:54.19#ibcon#read 5, iclass 17, count 0 2006.229.13:13:54.19#ibcon#about to read 6, iclass 17, count 0 2006.229.13:13:54.19#ibcon#read 6, iclass 17, count 0 2006.229.13:13:54.19#ibcon#end of sib2, iclass 17, count 0 2006.229.13:13:54.19#ibcon#*after write, iclass 17, count 0 2006.229.13:13:54.19#ibcon#*before return 0, iclass 17, count 0 2006.229.13:13:54.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:13:54.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:13:54.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:13:54.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:13:54.19$vck44/vblo=2,634.99 2006.229.13:13:54.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:13:54.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:13:54.19#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:54.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:54.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:54.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:54.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:13:54.19#ibcon#first serial, iclass 19, count 0 2006.229.13:13:54.19#ibcon#enter sib2, iclass 19, count 0 2006.229.13:13:54.19#ibcon#flushed, iclass 19, count 0 2006.229.13:13:54.19#ibcon#about to write, iclass 19, count 0 2006.229.13:13:54.19#ibcon#wrote, iclass 19, count 0 2006.229.13:13:54.19#ibcon#about to read 3, iclass 19, count 0 2006.229.13:13:54.21#ibcon#read 3, iclass 19, count 0 2006.229.13:13:54.21#ibcon#about to read 4, iclass 19, count 0 2006.229.13:13:54.21#ibcon#read 4, iclass 19, count 0 2006.229.13:13:54.21#ibcon#about to read 5, iclass 19, count 0 2006.229.13:13:54.21#ibcon#read 5, iclass 19, count 0 2006.229.13:13:54.21#ibcon#about to read 6, iclass 19, count 0 2006.229.13:13:54.21#ibcon#read 6, iclass 19, count 0 2006.229.13:13:54.21#ibcon#end of sib2, iclass 19, count 0 2006.229.13:13:54.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:13:54.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:13:54.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:13:54.21#ibcon#*before write, iclass 19, count 0 2006.229.13:13:54.21#ibcon#enter sib2, iclass 19, count 0 2006.229.13:13:54.21#ibcon#flushed, iclass 19, count 0 2006.229.13:13:54.21#ibcon#about to write, iclass 19, count 0 2006.229.13:13:54.21#ibcon#wrote, iclass 19, count 0 2006.229.13:13:54.21#ibcon#about to read 3, iclass 19, count 0 2006.229.13:13:54.25#ibcon#read 3, iclass 19, count 0 2006.229.13:13:54.25#ibcon#about to read 4, iclass 19, count 0 2006.229.13:13:54.25#ibcon#read 4, iclass 19, count 0 2006.229.13:13:54.25#ibcon#about to read 5, iclass 19, count 0 2006.229.13:13:54.25#ibcon#read 5, iclass 19, count 0 2006.229.13:13:54.25#ibcon#about to read 6, iclass 19, count 0 2006.229.13:13:54.25#ibcon#read 6, iclass 19, count 0 2006.229.13:13:54.25#ibcon#end of sib2, iclass 19, count 0 2006.229.13:13:54.25#ibcon#*after write, iclass 19, count 0 2006.229.13:13:54.25#ibcon#*before return 0, iclass 19, count 0 2006.229.13:13:54.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:54.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:13:54.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:13:54.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:13:54.25$vck44/vb=2,4 2006.229.13:13:54.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:13:54.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:13:54.25#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:54.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:54.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:54.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:54.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:13:54.31#ibcon#first serial, iclass 21, count 2 2006.229.13:13:54.31#ibcon#enter sib2, iclass 21, count 2 2006.229.13:13:54.31#ibcon#flushed, iclass 21, count 2 2006.229.13:13:54.31#ibcon#about to write, iclass 21, count 2 2006.229.13:13:54.31#ibcon#wrote, iclass 21, count 2 2006.229.13:13:54.31#ibcon#about to read 3, iclass 21, count 2 2006.229.13:13:54.33#ibcon#read 3, iclass 21, count 2 2006.229.13:13:54.33#ibcon#about to read 4, iclass 21, count 2 2006.229.13:13:54.33#ibcon#read 4, iclass 21, count 2 2006.229.13:13:54.33#ibcon#about to read 5, iclass 21, count 2 2006.229.13:13:54.33#ibcon#read 5, iclass 21, count 2 2006.229.13:13:54.33#ibcon#about to read 6, iclass 21, count 2 2006.229.13:13:54.33#ibcon#read 6, iclass 21, count 2 2006.229.13:13:54.33#ibcon#end of sib2, iclass 21, count 2 2006.229.13:13:54.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:13:54.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:13:54.33#ibcon#[27=AT02-04\r\n] 2006.229.13:13:54.33#ibcon#*before write, iclass 21, count 2 2006.229.13:13:54.33#ibcon#enter sib2, iclass 21, count 2 2006.229.13:13:54.33#ibcon#flushed, iclass 21, count 2 2006.229.13:13:54.33#ibcon#about to write, iclass 21, count 2 2006.229.13:13:54.33#ibcon#wrote, iclass 21, count 2 2006.229.13:13:54.33#ibcon#about to read 3, iclass 21, count 2 2006.229.13:13:54.36#ibcon#read 3, iclass 21, count 2 2006.229.13:13:54.36#ibcon#about to read 4, iclass 21, count 2 2006.229.13:13:54.36#ibcon#read 4, iclass 21, count 2 2006.229.13:13:54.36#ibcon#about to read 5, iclass 21, count 2 2006.229.13:13:54.36#ibcon#read 5, iclass 21, count 2 2006.229.13:13:54.36#ibcon#about to read 6, iclass 21, count 2 2006.229.13:13:54.36#ibcon#read 6, iclass 21, count 2 2006.229.13:13:54.36#ibcon#end of sib2, iclass 21, count 2 2006.229.13:13:54.36#ibcon#*after write, iclass 21, count 2 2006.229.13:13:54.36#ibcon#*before return 0, iclass 21, count 2 2006.229.13:13:54.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:54.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:13:54.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:13:54.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:54.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:54.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:54.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:54.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:13:54.48#ibcon#first serial, iclass 21, count 0 2006.229.13:13:54.48#ibcon#enter sib2, iclass 21, count 0 2006.229.13:13:54.48#ibcon#flushed, iclass 21, count 0 2006.229.13:13:54.48#ibcon#about to write, iclass 21, count 0 2006.229.13:13:54.48#ibcon#wrote, iclass 21, count 0 2006.229.13:13:54.48#ibcon#about to read 3, iclass 21, count 0 2006.229.13:13:54.50#ibcon#read 3, iclass 21, count 0 2006.229.13:13:54.50#ibcon#about to read 4, iclass 21, count 0 2006.229.13:13:54.50#ibcon#read 4, iclass 21, count 0 2006.229.13:13:54.50#ibcon#about to read 5, iclass 21, count 0 2006.229.13:13:54.50#ibcon#read 5, iclass 21, count 0 2006.229.13:13:54.50#ibcon#about to read 6, iclass 21, count 0 2006.229.13:13:54.50#ibcon#read 6, iclass 21, count 0 2006.229.13:13:54.50#ibcon#end of sib2, iclass 21, count 0 2006.229.13:13:54.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:13:54.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:13:54.50#ibcon#[27=USB\r\n] 2006.229.13:13:54.50#ibcon#*before write, iclass 21, count 0 2006.229.13:13:54.50#ibcon#enter sib2, iclass 21, count 0 2006.229.13:13:54.50#ibcon#flushed, iclass 21, count 0 2006.229.13:13:54.50#ibcon#about to write, iclass 21, count 0 2006.229.13:13:54.50#ibcon#wrote, iclass 21, count 0 2006.229.13:13:54.50#ibcon#about to read 3, iclass 21, count 0 2006.229.13:13:54.53#ibcon#read 3, iclass 21, count 0 2006.229.13:13:54.53#ibcon#about to read 4, iclass 21, count 0 2006.229.13:13:54.53#ibcon#read 4, iclass 21, count 0 2006.229.13:13:54.53#ibcon#about to read 5, iclass 21, count 0 2006.229.13:13:54.53#ibcon#read 5, iclass 21, count 0 2006.229.13:13:54.53#ibcon#about to read 6, iclass 21, count 0 2006.229.13:13:54.53#ibcon#read 6, iclass 21, count 0 2006.229.13:13:54.53#ibcon#end of sib2, iclass 21, count 0 2006.229.13:13:54.53#ibcon#*after write, iclass 21, count 0 2006.229.13:13:54.53#ibcon#*before return 0, iclass 21, count 0 2006.229.13:13:54.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:54.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:13:54.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:13:54.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:13:54.53$vck44/vblo=3,649.99 2006.229.13:13:54.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:13:54.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:13:54.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:54.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:54.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:54.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:54.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:13:54.53#ibcon#first serial, iclass 23, count 0 2006.229.13:13:54.53#ibcon#enter sib2, iclass 23, count 0 2006.229.13:13:54.53#ibcon#flushed, iclass 23, count 0 2006.229.13:13:54.53#ibcon#about to write, iclass 23, count 0 2006.229.13:13:54.53#ibcon#wrote, iclass 23, count 0 2006.229.13:13:54.53#ibcon#about to read 3, iclass 23, count 0 2006.229.13:13:54.55#ibcon#read 3, iclass 23, count 0 2006.229.13:13:54.55#ibcon#about to read 4, iclass 23, count 0 2006.229.13:13:54.55#ibcon#read 4, iclass 23, count 0 2006.229.13:13:54.55#ibcon#about to read 5, iclass 23, count 0 2006.229.13:13:54.55#ibcon#read 5, iclass 23, count 0 2006.229.13:13:54.55#ibcon#about to read 6, iclass 23, count 0 2006.229.13:13:54.55#ibcon#read 6, iclass 23, count 0 2006.229.13:13:54.55#ibcon#end of sib2, iclass 23, count 0 2006.229.13:13:54.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:13:54.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:13:54.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:13:54.55#ibcon#*before write, iclass 23, count 0 2006.229.13:13:54.55#ibcon#enter sib2, iclass 23, count 0 2006.229.13:13:54.55#ibcon#flushed, iclass 23, count 0 2006.229.13:13:54.55#ibcon#about to write, iclass 23, count 0 2006.229.13:13:54.55#ibcon#wrote, iclass 23, count 0 2006.229.13:13:54.55#ibcon#about to read 3, iclass 23, count 0 2006.229.13:13:54.59#ibcon#read 3, iclass 23, count 0 2006.229.13:13:54.59#ibcon#about to read 4, iclass 23, count 0 2006.229.13:13:54.59#ibcon#read 4, iclass 23, count 0 2006.229.13:13:54.59#ibcon#about to read 5, iclass 23, count 0 2006.229.13:13:54.59#ibcon#read 5, iclass 23, count 0 2006.229.13:13:54.59#ibcon#about to read 6, iclass 23, count 0 2006.229.13:13:54.59#ibcon#read 6, iclass 23, count 0 2006.229.13:13:54.59#ibcon#end of sib2, iclass 23, count 0 2006.229.13:13:54.59#ibcon#*after write, iclass 23, count 0 2006.229.13:13:54.59#ibcon#*before return 0, iclass 23, count 0 2006.229.13:13:54.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:54.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:13:54.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:13:54.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:13:54.59$vck44/vb=3,4 2006.229.13:13:54.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:13:54.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:13:54.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:54.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:54.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:54.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:54.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:13:54.65#ibcon#first serial, iclass 25, count 2 2006.229.13:13:54.65#ibcon#enter sib2, iclass 25, count 2 2006.229.13:13:54.65#ibcon#flushed, iclass 25, count 2 2006.229.13:13:54.65#ibcon#about to write, iclass 25, count 2 2006.229.13:13:54.65#ibcon#wrote, iclass 25, count 2 2006.229.13:13:54.65#ibcon#about to read 3, iclass 25, count 2 2006.229.13:13:54.67#ibcon#read 3, iclass 25, count 2 2006.229.13:13:54.67#ibcon#about to read 4, iclass 25, count 2 2006.229.13:13:54.67#ibcon#read 4, iclass 25, count 2 2006.229.13:13:54.67#ibcon#about to read 5, iclass 25, count 2 2006.229.13:13:54.67#ibcon#read 5, iclass 25, count 2 2006.229.13:13:54.67#ibcon#about to read 6, iclass 25, count 2 2006.229.13:13:54.67#ibcon#read 6, iclass 25, count 2 2006.229.13:13:54.67#ibcon#end of sib2, iclass 25, count 2 2006.229.13:13:54.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:13:54.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:13:54.67#ibcon#[27=AT03-04\r\n] 2006.229.13:13:54.67#ibcon#*before write, iclass 25, count 2 2006.229.13:13:54.67#ibcon#enter sib2, iclass 25, count 2 2006.229.13:13:54.67#ibcon#flushed, iclass 25, count 2 2006.229.13:13:54.67#ibcon#about to write, iclass 25, count 2 2006.229.13:13:54.67#ibcon#wrote, iclass 25, count 2 2006.229.13:13:54.67#ibcon#about to read 3, iclass 25, count 2 2006.229.13:13:54.70#ibcon#read 3, iclass 25, count 2 2006.229.13:13:54.70#ibcon#about to read 4, iclass 25, count 2 2006.229.13:13:54.70#ibcon#read 4, iclass 25, count 2 2006.229.13:13:54.70#ibcon#about to read 5, iclass 25, count 2 2006.229.13:13:54.70#ibcon#read 5, iclass 25, count 2 2006.229.13:13:54.70#ibcon#about to read 6, iclass 25, count 2 2006.229.13:13:54.70#ibcon#read 6, iclass 25, count 2 2006.229.13:13:54.70#ibcon#end of sib2, iclass 25, count 2 2006.229.13:13:54.70#ibcon#*after write, iclass 25, count 2 2006.229.13:13:54.70#ibcon#*before return 0, iclass 25, count 2 2006.229.13:13:54.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:54.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:13:54.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:13:54.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:54.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:54.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:54.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:54.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:13:54.82#ibcon#first serial, iclass 25, count 0 2006.229.13:13:54.82#ibcon#enter sib2, iclass 25, count 0 2006.229.13:13:54.82#ibcon#flushed, iclass 25, count 0 2006.229.13:13:54.82#ibcon#about to write, iclass 25, count 0 2006.229.13:13:54.82#ibcon#wrote, iclass 25, count 0 2006.229.13:13:54.82#ibcon#about to read 3, iclass 25, count 0 2006.229.13:13:54.84#ibcon#read 3, iclass 25, count 0 2006.229.13:13:54.84#ibcon#about to read 4, iclass 25, count 0 2006.229.13:13:54.84#ibcon#read 4, iclass 25, count 0 2006.229.13:13:54.84#ibcon#about to read 5, iclass 25, count 0 2006.229.13:13:54.84#ibcon#read 5, iclass 25, count 0 2006.229.13:13:54.84#ibcon#about to read 6, iclass 25, count 0 2006.229.13:13:54.84#ibcon#read 6, iclass 25, count 0 2006.229.13:13:54.84#ibcon#end of sib2, iclass 25, count 0 2006.229.13:13:54.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:13:54.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:13:54.84#ibcon#[27=USB\r\n] 2006.229.13:13:54.84#ibcon#*before write, iclass 25, count 0 2006.229.13:13:54.84#ibcon#enter sib2, iclass 25, count 0 2006.229.13:13:54.84#ibcon#flushed, iclass 25, count 0 2006.229.13:13:54.84#ibcon#about to write, iclass 25, count 0 2006.229.13:13:54.84#ibcon#wrote, iclass 25, count 0 2006.229.13:13:54.84#ibcon#about to read 3, iclass 25, count 0 2006.229.13:13:54.87#ibcon#read 3, iclass 25, count 0 2006.229.13:13:54.87#ibcon#about to read 4, iclass 25, count 0 2006.229.13:13:54.87#ibcon#read 4, iclass 25, count 0 2006.229.13:13:54.87#ibcon#about to read 5, iclass 25, count 0 2006.229.13:13:54.87#ibcon#read 5, iclass 25, count 0 2006.229.13:13:54.87#ibcon#about to read 6, iclass 25, count 0 2006.229.13:13:54.87#ibcon#read 6, iclass 25, count 0 2006.229.13:13:54.87#ibcon#end of sib2, iclass 25, count 0 2006.229.13:13:54.87#ibcon#*after write, iclass 25, count 0 2006.229.13:13:54.87#ibcon#*before return 0, iclass 25, count 0 2006.229.13:13:54.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:54.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:13:54.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:13:54.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:13:54.87$vck44/vblo=4,679.99 2006.229.13:13:54.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:13:54.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:13:54.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:54.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:54.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:54.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:54.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:13:54.87#ibcon#first serial, iclass 27, count 0 2006.229.13:13:54.87#ibcon#enter sib2, iclass 27, count 0 2006.229.13:13:54.87#ibcon#flushed, iclass 27, count 0 2006.229.13:13:54.87#ibcon#about to write, iclass 27, count 0 2006.229.13:13:54.87#ibcon#wrote, iclass 27, count 0 2006.229.13:13:54.87#ibcon#about to read 3, iclass 27, count 0 2006.229.13:13:54.89#ibcon#read 3, iclass 27, count 0 2006.229.13:13:54.89#ibcon#about to read 4, iclass 27, count 0 2006.229.13:13:54.89#ibcon#read 4, iclass 27, count 0 2006.229.13:13:54.89#ibcon#about to read 5, iclass 27, count 0 2006.229.13:13:54.89#ibcon#read 5, iclass 27, count 0 2006.229.13:13:54.89#ibcon#about to read 6, iclass 27, count 0 2006.229.13:13:54.89#ibcon#read 6, iclass 27, count 0 2006.229.13:13:54.89#ibcon#end of sib2, iclass 27, count 0 2006.229.13:13:54.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:13:54.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:13:54.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:13:54.89#ibcon#*before write, iclass 27, count 0 2006.229.13:13:54.89#ibcon#enter sib2, iclass 27, count 0 2006.229.13:13:54.89#ibcon#flushed, iclass 27, count 0 2006.229.13:13:54.89#ibcon#about to write, iclass 27, count 0 2006.229.13:13:54.89#ibcon#wrote, iclass 27, count 0 2006.229.13:13:54.89#ibcon#about to read 3, iclass 27, count 0 2006.229.13:13:54.93#ibcon#read 3, iclass 27, count 0 2006.229.13:13:54.93#ibcon#about to read 4, iclass 27, count 0 2006.229.13:13:54.93#ibcon#read 4, iclass 27, count 0 2006.229.13:13:54.93#ibcon#about to read 5, iclass 27, count 0 2006.229.13:13:54.93#ibcon#read 5, iclass 27, count 0 2006.229.13:13:54.93#ibcon#about to read 6, iclass 27, count 0 2006.229.13:13:54.93#ibcon#read 6, iclass 27, count 0 2006.229.13:13:54.93#ibcon#end of sib2, iclass 27, count 0 2006.229.13:13:54.93#ibcon#*after write, iclass 27, count 0 2006.229.13:13:54.93#ibcon#*before return 0, iclass 27, count 0 2006.229.13:13:54.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:54.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:13:54.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:13:54.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:13:54.93$vck44/vb=4,4 2006.229.13:13:54.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:13:54.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:13:54.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:54.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:54.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:54.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:54.99#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:13:54.99#ibcon#first serial, iclass 29, count 2 2006.229.13:13:54.99#ibcon#enter sib2, iclass 29, count 2 2006.229.13:13:54.99#ibcon#flushed, iclass 29, count 2 2006.229.13:13:54.99#ibcon#about to write, iclass 29, count 2 2006.229.13:13:54.99#ibcon#wrote, iclass 29, count 2 2006.229.13:13:54.99#ibcon#about to read 3, iclass 29, count 2 2006.229.13:13:55.01#ibcon#read 3, iclass 29, count 2 2006.229.13:13:55.01#ibcon#about to read 4, iclass 29, count 2 2006.229.13:13:55.01#ibcon#read 4, iclass 29, count 2 2006.229.13:13:55.01#ibcon#about to read 5, iclass 29, count 2 2006.229.13:13:55.01#ibcon#read 5, iclass 29, count 2 2006.229.13:13:55.01#ibcon#about to read 6, iclass 29, count 2 2006.229.13:13:55.01#ibcon#read 6, iclass 29, count 2 2006.229.13:13:55.01#ibcon#end of sib2, iclass 29, count 2 2006.229.13:13:55.01#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:13:55.01#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:13:55.01#ibcon#[27=AT04-04\r\n] 2006.229.13:13:55.01#ibcon#*before write, iclass 29, count 2 2006.229.13:13:55.01#ibcon#enter sib2, iclass 29, count 2 2006.229.13:13:55.01#ibcon#flushed, iclass 29, count 2 2006.229.13:13:55.01#ibcon#about to write, iclass 29, count 2 2006.229.13:13:55.01#ibcon#wrote, iclass 29, count 2 2006.229.13:13:55.01#ibcon#about to read 3, iclass 29, count 2 2006.229.13:13:55.04#ibcon#read 3, iclass 29, count 2 2006.229.13:13:55.04#ibcon#about to read 4, iclass 29, count 2 2006.229.13:13:55.04#ibcon#read 4, iclass 29, count 2 2006.229.13:13:55.04#ibcon#about to read 5, iclass 29, count 2 2006.229.13:13:55.04#ibcon#read 5, iclass 29, count 2 2006.229.13:13:55.04#ibcon#about to read 6, iclass 29, count 2 2006.229.13:13:55.04#ibcon#read 6, iclass 29, count 2 2006.229.13:13:55.04#ibcon#end of sib2, iclass 29, count 2 2006.229.13:13:55.04#ibcon#*after write, iclass 29, count 2 2006.229.13:13:55.04#ibcon#*before return 0, iclass 29, count 2 2006.229.13:13:55.04#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:55.04#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:13:55.04#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:13:55.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:55.04#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:55.16#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:55.16#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:55.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:13:55.16#ibcon#first serial, iclass 29, count 0 2006.229.13:13:55.16#ibcon#enter sib2, iclass 29, count 0 2006.229.13:13:55.16#ibcon#flushed, iclass 29, count 0 2006.229.13:13:55.16#ibcon#about to write, iclass 29, count 0 2006.229.13:13:55.16#ibcon#wrote, iclass 29, count 0 2006.229.13:13:55.16#ibcon#about to read 3, iclass 29, count 0 2006.229.13:13:55.18#ibcon#read 3, iclass 29, count 0 2006.229.13:13:55.18#ibcon#about to read 4, iclass 29, count 0 2006.229.13:13:55.18#ibcon#read 4, iclass 29, count 0 2006.229.13:13:55.18#ibcon#about to read 5, iclass 29, count 0 2006.229.13:13:55.18#ibcon#read 5, iclass 29, count 0 2006.229.13:13:55.18#ibcon#about to read 6, iclass 29, count 0 2006.229.13:13:55.18#ibcon#read 6, iclass 29, count 0 2006.229.13:13:55.18#ibcon#end of sib2, iclass 29, count 0 2006.229.13:13:55.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:13:55.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:13:55.18#ibcon#[27=USB\r\n] 2006.229.13:13:55.18#ibcon#*before write, iclass 29, count 0 2006.229.13:13:55.18#ibcon#enter sib2, iclass 29, count 0 2006.229.13:13:55.18#ibcon#flushed, iclass 29, count 0 2006.229.13:13:55.18#ibcon#about to write, iclass 29, count 0 2006.229.13:13:55.18#ibcon#wrote, iclass 29, count 0 2006.229.13:13:55.18#ibcon#about to read 3, iclass 29, count 0 2006.229.13:13:55.21#ibcon#read 3, iclass 29, count 0 2006.229.13:13:55.21#ibcon#about to read 4, iclass 29, count 0 2006.229.13:13:55.21#ibcon#read 4, iclass 29, count 0 2006.229.13:13:55.21#ibcon#about to read 5, iclass 29, count 0 2006.229.13:13:55.21#ibcon#read 5, iclass 29, count 0 2006.229.13:13:55.21#ibcon#about to read 6, iclass 29, count 0 2006.229.13:13:55.21#ibcon#read 6, iclass 29, count 0 2006.229.13:13:55.21#ibcon#end of sib2, iclass 29, count 0 2006.229.13:13:55.21#ibcon#*after write, iclass 29, count 0 2006.229.13:13:55.21#ibcon#*before return 0, iclass 29, count 0 2006.229.13:13:55.21#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:55.21#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:13:55.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:13:55.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:13:55.21$vck44/vblo=5,709.99 2006.229.13:13:55.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:13:55.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:13:55.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:55.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:55.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:55.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:55.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:13:55.21#ibcon#first serial, iclass 31, count 0 2006.229.13:13:55.21#ibcon#enter sib2, iclass 31, count 0 2006.229.13:13:55.21#ibcon#flushed, iclass 31, count 0 2006.229.13:13:55.21#ibcon#about to write, iclass 31, count 0 2006.229.13:13:55.21#ibcon#wrote, iclass 31, count 0 2006.229.13:13:55.21#ibcon#about to read 3, iclass 31, count 0 2006.229.13:13:55.23#ibcon#read 3, iclass 31, count 0 2006.229.13:13:55.23#ibcon#about to read 4, iclass 31, count 0 2006.229.13:13:55.23#ibcon#read 4, iclass 31, count 0 2006.229.13:13:55.23#ibcon#about to read 5, iclass 31, count 0 2006.229.13:13:55.23#ibcon#read 5, iclass 31, count 0 2006.229.13:13:55.23#ibcon#about to read 6, iclass 31, count 0 2006.229.13:13:55.23#ibcon#read 6, iclass 31, count 0 2006.229.13:13:55.23#ibcon#end of sib2, iclass 31, count 0 2006.229.13:13:55.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:13:55.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:13:55.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:13:55.23#ibcon#*before write, iclass 31, count 0 2006.229.13:13:55.23#ibcon#enter sib2, iclass 31, count 0 2006.229.13:13:55.23#ibcon#flushed, iclass 31, count 0 2006.229.13:13:55.23#ibcon#about to write, iclass 31, count 0 2006.229.13:13:55.23#ibcon#wrote, iclass 31, count 0 2006.229.13:13:55.23#ibcon#about to read 3, iclass 31, count 0 2006.229.13:13:55.27#ibcon#read 3, iclass 31, count 0 2006.229.13:13:55.27#ibcon#about to read 4, iclass 31, count 0 2006.229.13:13:55.27#ibcon#read 4, iclass 31, count 0 2006.229.13:13:55.27#ibcon#about to read 5, iclass 31, count 0 2006.229.13:13:55.27#ibcon#read 5, iclass 31, count 0 2006.229.13:13:55.27#ibcon#about to read 6, iclass 31, count 0 2006.229.13:13:55.27#ibcon#read 6, iclass 31, count 0 2006.229.13:13:55.27#ibcon#end of sib2, iclass 31, count 0 2006.229.13:13:55.27#ibcon#*after write, iclass 31, count 0 2006.229.13:13:55.27#ibcon#*before return 0, iclass 31, count 0 2006.229.13:13:55.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:55.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:13:55.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:13:55.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:13:55.27$vck44/vb=5,4 2006.229.13:13:55.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:13:55.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:13:55.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:55.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:55.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:55.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:55.33#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:13:55.33#ibcon#first serial, iclass 33, count 2 2006.229.13:13:55.33#ibcon#enter sib2, iclass 33, count 2 2006.229.13:13:55.33#ibcon#flushed, iclass 33, count 2 2006.229.13:13:55.33#ibcon#about to write, iclass 33, count 2 2006.229.13:13:55.33#ibcon#wrote, iclass 33, count 2 2006.229.13:13:55.33#ibcon#about to read 3, iclass 33, count 2 2006.229.13:13:55.35#ibcon#read 3, iclass 33, count 2 2006.229.13:13:55.35#ibcon#about to read 4, iclass 33, count 2 2006.229.13:13:55.35#ibcon#read 4, iclass 33, count 2 2006.229.13:13:55.35#ibcon#about to read 5, iclass 33, count 2 2006.229.13:13:55.35#ibcon#read 5, iclass 33, count 2 2006.229.13:13:55.35#ibcon#about to read 6, iclass 33, count 2 2006.229.13:13:55.35#ibcon#read 6, iclass 33, count 2 2006.229.13:13:55.35#ibcon#end of sib2, iclass 33, count 2 2006.229.13:13:55.35#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:13:55.35#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:13:55.35#ibcon#[27=AT05-04\r\n] 2006.229.13:13:55.35#ibcon#*before write, iclass 33, count 2 2006.229.13:13:55.35#ibcon#enter sib2, iclass 33, count 2 2006.229.13:13:55.35#ibcon#flushed, iclass 33, count 2 2006.229.13:13:55.35#ibcon#about to write, iclass 33, count 2 2006.229.13:13:55.35#ibcon#wrote, iclass 33, count 2 2006.229.13:13:55.35#ibcon#about to read 3, iclass 33, count 2 2006.229.13:13:55.38#ibcon#read 3, iclass 33, count 2 2006.229.13:13:55.38#ibcon#about to read 4, iclass 33, count 2 2006.229.13:13:55.38#ibcon#read 4, iclass 33, count 2 2006.229.13:13:55.38#ibcon#about to read 5, iclass 33, count 2 2006.229.13:13:55.38#ibcon#read 5, iclass 33, count 2 2006.229.13:13:55.38#ibcon#about to read 6, iclass 33, count 2 2006.229.13:13:55.38#ibcon#read 6, iclass 33, count 2 2006.229.13:13:55.38#ibcon#end of sib2, iclass 33, count 2 2006.229.13:13:55.38#ibcon#*after write, iclass 33, count 2 2006.229.13:13:55.38#ibcon#*before return 0, iclass 33, count 2 2006.229.13:13:55.38#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:55.38#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:13:55.38#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:13:55.38#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:55.38#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:55.50#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:55.50#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:55.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:13:55.50#ibcon#first serial, iclass 33, count 0 2006.229.13:13:55.50#ibcon#enter sib2, iclass 33, count 0 2006.229.13:13:55.50#ibcon#flushed, iclass 33, count 0 2006.229.13:13:55.50#ibcon#about to write, iclass 33, count 0 2006.229.13:13:55.50#ibcon#wrote, iclass 33, count 0 2006.229.13:13:55.50#ibcon#about to read 3, iclass 33, count 0 2006.229.13:13:55.52#ibcon#read 3, iclass 33, count 0 2006.229.13:13:55.52#ibcon#about to read 4, iclass 33, count 0 2006.229.13:13:55.52#ibcon#read 4, iclass 33, count 0 2006.229.13:13:55.52#ibcon#about to read 5, iclass 33, count 0 2006.229.13:13:55.52#ibcon#read 5, iclass 33, count 0 2006.229.13:13:55.52#ibcon#about to read 6, iclass 33, count 0 2006.229.13:13:55.52#ibcon#read 6, iclass 33, count 0 2006.229.13:13:55.52#ibcon#end of sib2, iclass 33, count 0 2006.229.13:13:55.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:13:55.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:13:55.52#ibcon#[27=USB\r\n] 2006.229.13:13:55.52#ibcon#*before write, iclass 33, count 0 2006.229.13:13:55.52#ibcon#enter sib2, iclass 33, count 0 2006.229.13:13:55.52#ibcon#flushed, iclass 33, count 0 2006.229.13:13:55.52#ibcon#about to write, iclass 33, count 0 2006.229.13:13:55.52#ibcon#wrote, iclass 33, count 0 2006.229.13:13:55.52#ibcon#about to read 3, iclass 33, count 0 2006.229.13:13:55.55#ibcon#read 3, iclass 33, count 0 2006.229.13:13:55.55#ibcon#about to read 4, iclass 33, count 0 2006.229.13:13:55.55#ibcon#read 4, iclass 33, count 0 2006.229.13:13:55.55#ibcon#about to read 5, iclass 33, count 0 2006.229.13:13:55.55#ibcon#read 5, iclass 33, count 0 2006.229.13:13:55.55#ibcon#about to read 6, iclass 33, count 0 2006.229.13:13:55.55#ibcon#read 6, iclass 33, count 0 2006.229.13:13:55.55#ibcon#end of sib2, iclass 33, count 0 2006.229.13:13:55.55#ibcon#*after write, iclass 33, count 0 2006.229.13:13:55.55#ibcon#*before return 0, iclass 33, count 0 2006.229.13:13:55.55#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:55.55#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:13:55.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:13:55.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:13:55.55$vck44/vblo=6,719.99 2006.229.13:13:55.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:13:55.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:13:55.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:55.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:55.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:55.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:55.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:13:55.55#ibcon#first serial, iclass 35, count 0 2006.229.13:13:55.55#ibcon#enter sib2, iclass 35, count 0 2006.229.13:13:55.55#ibcon#flushed, iclass 35, count 0 2006.229.13:13:55.55#ibcon#about to write, iclass 35, count 0 2006.229.13:13:55.55#ibcon#wrote, iclass 35, count 0 2006.229.13:13:55.55#ibcon#about to read 3, iclass 35, count 0 2006.229.13:13:55.57#ibcon#read 3, iclass 35, count 0 2006.229.13:13:55.57#ibcon#about to read 4, iclass 35, count 0 2006.229.13:13:55.57#ibcon#read 4, iclass 35, count 0 2006.229.13:13:55.57#ibcon#about to read 5, iclass 35, count 0 2006.229.13:13:55.57#ibcon#read 5, iclass 35, count 0 2006.229.13:13:55.57#ibcon#about to read 6, iclass 35, count 0 2006.229.13:13:55.57#ibcon#read 6, iclass 35, count 0 2006.229.13:13:55.57#ibcon#end of sib2, iclass 35, count 0 2006.229.13:13:55.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:13:55.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:13:55.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:13:55.57#ibcon#*before write, iclass 35, count 0 2006.229.13:13:55.57#ibcon#enter sib2, iclass 35, count 0 2006.229.13:13:55.57#ibcon#flushed, iclass 35, count 0 2006.229.13:13:55.57#ibcon#about to write, iclass 35, count 0 2006.229.13:13:55.57#ibcon#wrote, iclass 35, count 0 2006.229.13:13:55.57#ibcon#about to read 3, iclass 35, count 0 2006.229.13:13:55.61#ibcon#read 3, iclass 35, count 0 2006.229.13:13:55.61#ibcon#about to read 4, iclass 35, count 0 2006.229.13:13:55.61#ibcon#read 4, iclass 35, count 0 2006.229.13:13:55.61#ibcon#about to read 5, iclass 35, count 0 2006.229.13:13:55.61#ibcon#read 5, iclass 35, count 0 2006.229.13:13:55.61#ibcon#about to read 6, iclass 35, count 0 2006.229.13:13:55.61#ibcon#read 6, iclass 35, count 0 2006.229.13:13:55.61#ibcon#end of sib2, iclass 35, count 0 2006.229.13:13:55.61#ibcon#*after write, iclass 35, count 0 2006.229.13:13:55.61#ibcon#*before return 0, iclass 35, count 0 2006.229.13:13:55.61#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:55.61#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:13:55.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:13:55.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:13:55.61$vck44/vb=6,4 2006.229.13:13:55.61#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:13:55.61#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:13:55.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:55.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:55.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:55.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:55.67#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:13:55.67#ibcon#first serial, iclass 37, count 2 2006.229.13:13:55.67#ibcon#enter sib2, iclass 37, count 2 2006.229.13:13:55.67#ibcon#flushed, iclass 37, count 2 2006.229.13:13:55.67#ibcon#about to write, iclass 37, count 2 2006.229.13:13:55.67#ibcon#wrote, iclass 37, count 2 2006.229.13:13:55.67#ibcon#about to read 3, iclass 37, count 2 2006.229.13:13:55.69#ibcon#read 3, iclass 37, count 2 2006.229.13:13:55.69#ibcon#about to read 4, iclass 37, count 2 2006.229.13:13:55.69#ibcon#read 4, iclass 37, count 2 2006.229.13:13:55.69#ibcon#about to read 5, iclass 37, count 2 2006.229.13:13:55.69#ibcon#read 5, iclass 37, count 2 2006.229.13:13:55.69#ibcon#about to read 6, iclass 37, count 2 2006.229.13:13:55.69#ibcon#read 6, iclass 37, count 2 2006.229.13:13:55.69#ibcon#end of sib2, iclass 37, count 2 2006.229.13:13:55.69#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:13:55.69#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:13:55.69#ibcon#[27=AT06-04\r\n] 2006.229.13:13:55.69#ibcon#*before write, iclass 37, count 2 2006.229.13:13:55.69#ibcon#enter sib2, iclass 37, count 2 2006.229.13:13:55.69#ibcon#flushed, iclass 37, count 2 2006.229.13:13:55.69#ibcon#about to write, iclass 37, count 2 2006.229.13:13:55.69#ibcon#wrote, iclass 37, count 2 2006.229.13:13:55.69#ibcon#about to read 3, iclass 37, count 2 2006.229.13:13:55.72#ibcon#read 3, iclass 37, count 2 2006.229.13:13:55.72#ibcon#about to read 4, iclass 37, count 2 2006.229.13:13:55.72#ibcon#read 4, iclass 37, count 2 2006.229.13:13:55.72#ibcon#about to read 5, iclass 37, count 2 2006.229.13:13:55.72#ibcon#read 5, iclass 37, count 2 2006.229.13:13:55.72#ibcon#about to read 6, iclass 37, count 2 2006.229.13:13:55.72#ibcon#read 6, iclass 37, count 2 2006.229.13:13:55.72#ibcon#end of sib2, iclass 37, count 2 2006.229.13:13:55.72#ibcon#*after write, iclass 37, count 2 2006.229.13:13:55.72#ibcon#*before return 0, iclass 37, count 2 2006.229.13:13:55.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:55.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:13:55.72#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:13:55.72#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:55.72#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:55.84#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:55.84#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:55.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:13:55.84#ibcon#first serial, iclass 37, count 0 2006.229.13:13:55.84#ibcon#enter sib2, iclass 37, count 0 2006.229.13:13:55.84#ibcon#flushed, iclass 37, count 0 2006.229.13:13:55.84#ibcon#about to write, iclass 37, count 0 2006.229.13:13:55.84#ibcon#wrote, iclass 37, count 0 2006.229.13:13:55.84#ibcon#about to read 3, iclass 37, count 0 2006.229.13:13:55.86#ibcon#read 3, iclass 37, count 0 2006.229.13:13:55.86#ibcon#about to read 4, iclass 37, count 0 2006.229.13:13:55.86#ibcon#read 4, iclass 37, count 0 2006.229.13:13:55.86#ibcon#about to read 5, iclass 37, count 0 2006.229.13:13:55.86#ibcon#read 5, iclass 37, count 0 2006.229.13:13:55.86#ibcon#about to read 6, iclass 37, count 0 2006.229.13:13:55.86#ibcon#read 6, iclass 37, count 0 2006.229.13:13:55.86#ibcon#end of sib2, iclass 37, count 0 2006.229.13:13:55.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:13:55.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:13:55.86#ibcon#[27=USB\r\n] 2006.229.13:13:55.86#ibcon#*before write, iclass 37, count 0 2006.229.13:13:55.86#ibcon#enter sib2, iclass 37, count 0 2006.229.13:13:55.86#ibcon#flushed, iclass 37, count 0 2006.229.13:13:55.86#ibcon#about to write, iclass 37, count 0 2006.229.13:13:55.86#ibcon#wrote, iclass 37, count 0 2006.229.13:13:55.86#ibcon#about to read 3, iclass 37, count 0 2006.229.13:13:55.89#ibcon#read 3, iclass 37, count 0 2006.229.13:13:55.89#ibcon#about to read 4, iclass 37, count 0 2006.229.13:13:55.89#ibcon#read 4, iclass 37, count 0 2006.229.13:13:55.89#ibcon#about to read 5, iclass 37, count 0 2006.229.13:13:55.89#ibcon#read 5, iclass 37, count 0 2006.229.13:13:55.89#ibcon#about to read 6, iclass 37, count 0 2006.229.13:13:55.89#ibcon#read 6, iclass 37, count 0 2006.229.13:13:55.89#ibcon#end of sib2, iclass 37, count 0 2006.229.13:13:55.89#ibcon#*after write, iclass 37, count 0 2006.229.13:13:55.89#ibcon#*before return 0, iclass 37, count 0 2006.229.13:13:55.89#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:55.89#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:13:55.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:13:55.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:13:55.89$vck44/vblo=7,734.99 2006.229.13:13:55.89#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:13:55.89#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:13:55.89#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:55.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:55.89#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:55.89#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:55.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:13:55.89#ibcon#first serial, iclass 39, count 0 2006.229.13:13:55.89#ibcon#enter sib2, iclass 39, count 0 2006.229.13:13:55.89#ibcon#flushed, iclass 39, count 0 2006.229.13:13:55.89#ibcon#about to write, iclass 39, count 0 2006.229.13:13:55.89#ibcon#wrote, iclass 39, count 0 2006.229.13:13:55.89#ibcon#about to read 3, iclass 39, count 0 2006.229.13:13:55.91#ibcon#read 3, iclass 39, count 0 2006.229.13:13:55.91#ibcon#about to read 4, iclass 39, count 0 2006.229.13:13:55.91#ibcon#read 4, iclass 39, count 0 2006.229.13:13:55.91#ibcon#about to read 5, iclass 39, count 0 2006.229.13:13:55.91#ibcon#read 5, iclass 39, count 0 2006.229.13:13:55.91#ibcon#about to read 6, iclass 39, count 0 2006.229.13:13:55.91#ibcon#read 6, iclass 39, count 0 2006.229.13:13:55.91#ibcon#end of sib2, iclass 39, count 0 2006.229.13:13:55.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:13:55.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:13:55.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:13:55.91#ibcon#*before write, iclass 39, count 0 2006.229.13:13:55.91#ibcon#enter sib2, iclass 39, count 0 2006.229.13:13:55.91#ibcon#flushed, iclass 39, count 0 2006.229.13:13:55.91#ibcon#about to write, iclass 39, count 0 2006.229.13:13:55.91#ibcon#wrote, iclass 39, count 0 2006.229.13:13:55.91#ibcon#about to read 3, iclass 39, count 0 2006.229.13:13:55.95#ibcon#read 3, iclass 39, count 0 2006.229.13:13:55.95#ibcon#about to read 4, iclass 39, count 0 2006.229.13:13:55.95#ibcon#read 4, iclass 39, count 0 2006.229.13:13:55.95#ibcon#about to read 5, iclass 39, count 0 2006.229.13:13:55.95#ibcon#read 5, iclass 39, count 0 2006.229.13:13:55.95#ibcon#about to read 6, iclass 39, count 0 2006.229.13:13:55.95#ibcon#read 6, iclass 39, count 0 2006.229.13:13:55.95#ibcon#end of sib2, iclass 39, count 0 2006.229.13:13:55.95#ibcon#*after write, iclass 39, count 0 2006.229.13:13:55.95#ibcon#*before return 0, iclass 39, count 0 2006.229.13:13:55.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:55.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:13:55.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:13:55.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:13:55.95$vck44/vb=7,4 2006.229.13:13:55.95#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.13:13:55.95#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.13:13:55.95#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:55.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:56.01#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:56.01#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:56.01#ibcon#enter wrdev, iclass 3, count 2 2006.229.13:13:56.01#ibcon#first serial, iclass 3, count 2 2006.229.13:13:56.01#ibcon#enter sib2, iclass 3, count 2 2006.229.13:13:56.01#ibcon#flushed, iclass 3, count 2 2006.229.13:13:56.01#ibcon#about to write, iclass 3, count 2 2006.229.13:13:56.01#ibcon#wrote, iclass 3, count 2 2006.229.13:13:56.01#ibcon#about to read 3, iclass 3, count 2 2006.229.13:13:56.03#ibcon#read 3, iclass 3, count 2 2006.229.13:13:56.03#ibcon#about to read 4, iclass 3, count 2 2006.229.13:13:56.03#ibcon#read 4, iclass 3, count 2 2006.229.13:13:56.03#ibcon#about to read 5, iclass 3, count 2 2006.229.13:13:56.03#ibcon#read 5, iclass 3, count 2 2006.229.13:13:56.03#ibcon#about to read 6, iclass 3, count 2 2006.229.13:13:56.03#ibcon#read 6, iclass 3, count 2 2006.229.13:13:56.03#ibcon#end of sib2, iclass 3, count 2 2006.229.13:13:56.03#ibcon#*mode == 0, iclass 3, count 2 2006.229.13:13:56.03#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.13:13:56.03#ibcon#[27=AT07-04\r\n] 2006.229.13:13:56.03#ibcon#*before write, iclass 3, count 2 2006.229.13:13:56.03#ibcon#enter sib2, iclass 3, count 2 2006.229.13:13:56.03#ibcon#flushed, iclass 3, count 2 2006.229.13:13:56.03#ibcon#about to write, iclass 3, count 2 2006.229.13:13:56.03#ibcon#wrote, iclass 3, count 2 2006.229.13:13:56.03#ibcon#about to read 3, iclass 3, count 2 2006.229.13:13:56.06#ibcon#read 3, iclass 3, count 2 2006.229.13:13:56.06#ibcon#about to read 4, iclass 3, count 2 2006.229.13:13:56.06#ibcon#read 4, iclass 3, count 2 2006.229.13:13:56.06#ibcon#about to read 5, iclass 3, count 2 2006.229.13:13:56.06#ibcon#read 5, iclass 3, count 2 2006.229.13:13:56.06#ibcon#about to read 6, iclass 3, count 2 2006.229.13:13:56.06#ibcon#read 6, iclass 3, count 2 2006.229.13:13:56.06#ibcon#end of sib2, iclass 3, count 2 2006.229.13:13:56.06#ibcon#*after write, iclass 3, count 2 2006.229.13:13:56.06#ibcon#*before return 0, iclass 3, count 2 2006.229.13:13:56.06#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:56.06#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:13:56.06#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.13:13:56.06#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:56.06#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:56.18#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:56.18#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:56.18#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:13:56.18#ibcon#first serial, iclass 3, count 0 2006.229.13:13:56.18#ibcon#enter sib2, iclass 3, count 0 2006.229.13:13:56.18#ibcon#flushed, iclass 3, count 0 2006.229.13:13:56.18#ibcon#about to write, iclass 3, count 0 2006.229.13:13:56.18#ibcon#wrote, iclass 3, count 0 2006.229.13:13:56.18#ibcon#about to read 3, iclass 3, count 0 2006.229.13:13:56.20#ibcon#read 3, iclass 3, count 0 2006.229.13:13:56.20#ibcon#about to read 4, iclass 3, count 0 2006.229.13:13:56.20#ibcon#read 4, iclass 3, count 0 2006.229.13:13:56.20#ibcon#about to read 5, iclass 3, count 0 2006.229.13:13:56.20#ibcon#read 5, iclass 3, count 0 2006.229.13:13:56.20#ibcon#about to read 6, iclass 3, count 0 2006.229.13:13:56.20#ibcon#read 6, iclass 3, count 0 2006.229.13:13:56.20#ibcon#end of sib2, iclass 3, count 0 2006.229.13:13:56.20#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:13:56.20#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:13:56.20#ibcon#[27=USB\r\n] 2006.229.13:13:56.20#ibcon#*before write, iclass 3, count 0 2006.229.13:13:56.20#ibcon#enter sib2, iclass 3, count 0 2006.229.13:13:56.20#ibcon#flushed, iclass 3, count 0 2006.229.13:13:56.20#ibcon#about to write, iclass 3, count 0 2006.229.13:13:56.20#ibcon#wrote, iclass 3, count 0 2006.229.13:13:56.20#ibcon#about to read 3, iclass 3, count 0 2006.229.13:13:56.23#ibcon#read 3, iclass 3, count 0 2006.229.13:13:56.23#ibcon#about to read 4, iclass 3, count 0 2006.229.13:13:56.23#ibcon#read 4, iclass 3, count 0 2006.229.13:13:56.23#ibcon#about to read 5, iclass 3, count 0 2006.229.13:13:56.23#ibcon#read 5, iclass 3, count 0 2006.229.13:13:56.23#ibcon#about to read 6, iclass 3, count 0 2006.229.13:13:56.23#ibcon#read 6, iclass 3, count 0 2006.229.13:13:56.23#ibcon#end of sib2, iclass 3, count 0 2006.229.13:13:56.23#ibcon#*after write, iclass 3, count 0 2006.229.13:13:56.23#ibcon#*before return 0, iclass 3, count 0 2006.229.13:13:56.23#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:56.23#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:13:56.23#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:13:56.23#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:13:56.23$vck44/vblo=8,744.99 2006.229.13:13:56.23#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:13:56.23#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:13:56.23#ibcon#ireg 17 cls_cnt 0 2006.229.13:13:56.23#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:56.23#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:56.23#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:56.23#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:13:56.23#ibcon#first serial, iclass 5, count 0 2006.229.13:13:56.23#ibcon#enter sib2, iclass 5, count 0 2006.229.13:13:56.23#ibcon#flushed, iclass 5, count 0 2006.229.13:13:56.23#ibcon#about to write, iclass 5, count 0 2006.229.13:13:56.23#ibcon#wrote, iclass 5, count 0 2006.229.13:13:56.23#ibcon#about to read 3, iclass 5, count 0 2006.229.13:13:56.25#ibcon#read 3, iclass 5, count 0 2006.229.13:13:56.25#ibcon#about to read 4, iclass 5, count 0 2006.229.13:13:56.25#ibcon#read 4, iclass 5, count 0 2006.229.13:13:56.25#ibcon#about to read 5, iclass 5, count 0 2006.229.13:13:56.25#ibcon#read 5, iclass 5, count 0 2006.229.13:13:56.25#ibcon#about to read 6, iclass 5, count 0 2006.229.13:13:56.25#ibcon#read 6, iclass 5, count 0 2006.229.13:13:56.25#ibcon#end of sib2, iclass 5, count 0 2006.229.13:13:56.25#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:13:56.25#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:13:56.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:13:56.25#ibcon#*before write, iclass 5, count 0 2006.229.13:13:56.25#ibcon#enter sib2, iclass 5, count 0 2006.229.13:13:56.25#ibcon#flushed, iclass 5, count 0 2006.229.13:13:56.25#ibcon#about to write, iclass 5, count 0 2006.229.13:13:56.25#ibcon#wrote, iclass 5, count 0 2006.229.13:13:56.25#ibcon#about to read 3, iclass 5, count 0 2006.229.13:13:56.29#ibcon#read 3, iclass 5, count 0 2006.229.13:13:56.29#ibcon#about to read 4, iclass 5, count 0 2006.229.13:13:56.29#ibcon#read 4, iclass 5, count 0 2006.229.13:13:56.29#ibcon#about to read 5, iclass 5, count 0 2006.229.13:13:56.29#ibcon#read 5, iclass 5, count 0 2006.229.13:13:56.29#ibcon#about to read 6, iclass 5, count 0 2006.229.13:13:56.29#ibcon#read 6, iclass 5, count 0 2006.229.13:13:56.29#ibcon#end of sib2, iclass 5, count 0 2006.229.13:13:56.29#ibcon#*after write, iclass 5, count 0 2006.229.13:13:56.29#ibcon#*before return 0, iclass 5, count 0 2006.229.13:13:56.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:56.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:13:56.29#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:13:56.29#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:13:56.29$vck44/vb=8,4 2006.229.13:13:56.29#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:13:56.29#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:13:56.29#ibcon#ireg 11 cls_cnt 2 2006.229.13:13:56.29#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:56.35#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:56.35#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:56.35#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:13:56.35#ibcon#first serial, iclass 7, count 2 2006.229.13:13:56.35#ibcon#enter sib2, iclass 7, count 2 2006.229.13:13:56.35#ibcon#flushed, iclass 7, count 2 2006.229.13:13:56.35#ibcon#about to write, iclass 7, count 2 2006.229.13:13:56.35#ibcon#wrote, iclass 7, count 2 2006.229.13:13:56.35#ibcon#about to read 3, iclass 7, count 2 2006.229.13:13:56.37#ibcon#read 3, iclass 7, count 2 2006.229.13:13:56.37#ibcon#about to read 4, iclass 7, count 2 2006.229.13:13:56.37#ibcon#read 4, iclass 7, count 2 2006.229.13:13:56.37#ibcon#about to read 5, iclass 7, count 2 2006.229.13:13:56.37#ibcon#read 5, iclass 7, count 2 2006.229.13:13:56.37#ibcon#about to read 6, iclass 7, count 2 2006.229.13:13:56.37#ibcon#read 6, iclass 7, count 2 2006.229.13:13:56.37#ibcon#end of sib2, iclass 7, count 2 2006.229.13:13:56.37#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:13:56.37#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:13:56.37#ibcon#[27=AT08-04\r\n] 2006.229.13:13:56.37#ibcon#*before write, iclass 7, count 2 2006.229.13:13:56.37#ibcon#enter sib2, iclass 7, count 2 2006.229.13:13:56.37#ibcon#flushed, iclass 7, count 2 2006.229.13:13:56.37#ibcon#about to write, iclass 7, count 2 2006.229.13:13:56.37#ibcon#wrote, iclass 7, count 2 2006.229.13:13:56.37#ibcon#about to read 3, iclass 7, count 2 2006.229.13:13:56.40#ibcon#read 3, iclass 7, count 2 2006.229.13:13:56.40#ibcon#about to read 4, iclass 7, count 2 2006.229.13:13:56.40#ibcon#read 4, iclass 7, count 2 2006.229.13:13:56.40#ibcon#about to read 5, iclass 7, count 2 2006.229.13:13:56.40#ibcon#read 5, iclass 7, count 2 2006.229.13:13:56.40#ibcon#about to read 6, iclass 7, count 2 2006.229.13:13:56.40#ibcon#read 6, iclass 7, count 2 2006.229.13:13:56.40#ibcon#end of sib2, iclass 7, count 2 2006.229.13:13:56.40#ibcon#*after write, iclass 7, count 2 2006.229.13:13:56.40#ibcon#*before return 0, iclass 7, count 2 2006.229.13:13:56.40#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:56.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:13:56.40#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:13:56.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:13:56.40#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:56.52#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:56.52#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:56.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:13:56.52#ibcon#first serial, iclass 7, count 0 2006.229.13:13:56.52#ibcon#enter sib2, iclass 7, count 0 2006.229.13:13:56.52#ibcon#flushed, iclass 7, count 0 2006.229.13:13:56.52#ibcon#about to write, iclass 7, count 0 2006.229.13:13:56.52#ibcon#wrote, iclass 7, count 0 2006.229.13:13:56.52#ibcon#about to read 3, iclass 7, count 0 2006.229.13:13:56.54#ibcon#read 3, iclass 7, count 0 2006.229.13:13:56.54#ibcon#about to read 4, iclass 7, count 0 2006.229.13:13:56.54#ibcon#read 4, iclass 7, count 0 2006.229.13:13:56.54#ibcon#about to read 5, iclass 7, count 0 2006.229.13:13:56.54#ibcon#read 5, iclass 7, count 0 2006.229.13:13:56.54#ibcon#about to read 6, iclass 7, count 0 2006.229.13:13:56.54#ibcon#read 6, iclass 7, count 0 2006.229.13:13:56.54#ibcon#end of sib2, iclass 7, count 0 2006.229.13:13:56.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:13:56.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:13:56.54#ibcon#[27=USB\r\n] 2006.229.13:13:56.54#ibcon#*before write, iclass 7, count 0 2006.229.13:13:56.54#ibcon#enter sib2, iclass 7, count 0 2006.229.13:13:56.54#ibcon#flushed, iclass 7, count 0 2006.229.13:13:56.54#ibcon#about to write, iclass 7, count 0 2006.229.13:13:56.54#ibcon#wrote, iclass 7, count 0 2006.229.13:13:56.54#ibcon#about to read 3, iclass 7, count 0 2006.229.13:13:56.57#ibcon#read 3, iclass 7, count 0 2006.229.13:13:56.57#ibcon#about to read 4, iclass 7, count 0 2006.229.13:13:56.57#ibcon#read 4, iclass 7, count 0 2006.229.13:13:56.57#ibcon#about to read 5, iclass 7, count 0 2006.229.13:13:56.57#ibcon#read 5, iclass 7, count 0 2006.229.13:13:56.57#ibcon#about to read 6, iclass 7, count 0 2006.229.13:13:56.57#ibcon#read 6, iclass 7, count 0 2006.229.13:13:56.57#ibcon#end of sib2, iclass 7, count 0 2006.229.13:13:56.57#ibcon#*after write, iclass 7, count 0 2006.229.13:13:56.57#ibcon#*before return 0, iclass 7, count 0 2006.229.13:13:56.57#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:56.57#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:13:56.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:13:56.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:13:56.57$vck44/vabw=wide 2006.229.13:13:56.57#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:13:56.57#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:13:56.57#ibcon#ireg 8 cls_cnt 0 2006.229.13:13:56.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:56.57#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:56.57#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:56.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:13:56.57#ibcon#first serial, iclass 11, count 0 2006.229.13:13:56.57#ibcon#enter sib2, iclass 11, count 0 2006.229.13:13:56.57#ibcon#flushed, iclass 11, count 0 2006.229.13:13:56.57#ibcon#about to write, iclass 11, count 0 2006.229.13:13:56.57#ibcon#wrote, iclass 11, count 0 2006.229.13:13:56.57#ibcon#about to read 3, iclass 11, count 0 2006.229.13:13:56.59#ibcon#read 3, iclass 11, count 0 2006.229.13:13:56.59#ibcon#about to read 4, iclass 11, count 0 2006.229.13:13:56.59#ibcon#read 4, iclass 11, count 0 2006.229.13:13:56.59#ibcon#about to read 5, iclass 11, count 0 2006.229.13:13:56.59#ibcon#read 5, iclass 11, count 0 2006.229.13:13:56.59#ibcon#about to read 6, iclass 11, count 0 2006.229.13:13:56.59#ibcon#read 6, iclass 11, count 0 2006.229.13:13:56.59#ibcon#end of sib2, iclass 11, count 0 2006.229.13:13:56.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:13:56.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:13:56.59#ibcon#[25=BW32\r\n] 2006.229.13:13:56.59#ibcon#*before write, iclass 11, count 0 2006.229.13:13:56.59#ibcon#enter sib2, iclass 11, count 0 2006.229.13:13:56.59#ibcon#flushed, iclass 11, count 0 2006.229.13:13:56.59#ibcon#about to write, iclass 11, count 0 2006.229.13:13:56.59#ibcon#wrote, iclass 11, count 0 2006.229.13:13:56.59#ibcon#about to read 3, iclass 11, count 0 2006.229.13:13:56.62#ibcon#read 3, iclass 11, count 0 2006.229.13:13:56.62#ibcon#about to read 4, iclass 11, count 0 2006.229.13:13:56.62#ibcon#read 4, iclass 11, count 0 2006.229.13:13:56.62#ibcon#about to read 5, iclass 11, count 0 2006.229.13:13:56.62#ibcon#read 5, iclass 11, count 0 2006.229.13:13:56.62#ibcon#about to read 6, iclass 11, count 0 2006.229.13:13:56.62#ibcon#read 6, iclass 11, count 0 2006.229.13:13:56.62#ibcon#end of sib2, iclass 11, count 0 2006.229.13:13:56.62#ibcon#*after write, iclass 11, count 0 2006.229.13:13:56.62#ibcon#*before return 0, iclass 11, count 0 2006.229.13:13:56.62#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:56.62#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:13:56.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:13:56.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:13:56.62$vck44/vbbw=wide 2006.229.13:13:56.62#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:13:56.62#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:13:56.62#ibcon#ireg 8 cls_cnt 0 2006.229.13:13:56.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:13:56.69#abcon#<5=/04 0.9 1.4 27.571001002.2\r\n> 2006.229.13:13:56.69#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:13:56.69#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:13:56.69#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:13:56.69#ibcon#first serial, iclass 13, count 0 2006.229.13:13:56.69#ibcon#enter sib2, iclass 13, count 0 2006.229.13:13:56.69#ibcon#flushed, iclass 13, count 0 2006.229.13:13:56.69#ibcon#about to write, iclass 13, count 0 2006.229.13:13:56.69#ibcon#wrote, iclass 13, count 0 2006.229.13:13:56.69#ibcon#about to read 3, iclass 13, count 0 2006.229.13:13:56.71#ibcon#read 3, iclass 13, count 0 2006.229.13:13:56.71#ibcon#about to read 4, iclass 13, count 0 2006.229.13:13:56.71#ibcon#read 4, iclass 13, count 0 2006.229.13:13:56.71#ibcon#about to read 5, iclass 13, count 0 2006.229.13:13:56.71#ibcon#read 5, iclass 13, count 0 2006.229.13:13:56.71#ibcon#about to read 6, iclass 13, count 0 2006.229.13:13:56.71#ibcon#read 6, iclass 13, count 0 2006.229.13:13:56.71#ibcon#end of sib2, iclass 13, count 0 2006.229.13:13:56.71#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:13:56.71#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:13:56.71#ibcon#[27=BW32\r\n] 2006.229.13:13:56.71#ibcon#*before write, iclass 13, count 0 2006.229.13:13:56.71#ibcon#enter sib2, iclass 13, count 0 2006.229.13:13:56.71#ibcon#flushed, iclass 13, count 0 2006.229.13:13:56.71#ibcon#about to write, iclass 13, count 0 2006.229.13:13:56.71#ibcon#wrote, iclass 13, count 0 2006.229.13:13:56.71#ibcon#about to read 3, iclass 13, count 0 2006.229.13:13:56.71#abcon#{5=INTERFACE CLEAR} 2006.229.13:13:56.74#ibcon#read 3, iclass 13, count 0 2006.229.13:13:56.74#ibcon#about to read 4, iclass 13, count 0 2006.229.13:13:56.74#ibcon#read 4, iclass 13, count 0 2006.229.13:13:56.74#ibcon#about to read 5, iclass 13, count 0 2006.229.13:13:56.74#ibcon#read 5, iclass 13, count 0 2006.229.13:13:56.74#ibcon#about to read 6, iclass 13, count 0 2006.229.13:13:56.74#ibcon#read 6, iclass 13, count 0 2006.229.13:13:56.74#ibcon#end of sib2, iclass 13, count 0 2006.229.13:13:56.74#ibcon#*after write, iclass 13, count 0 2006.229.13:13:56.74#ibcon#*before return 0, iclass 13, count 0 2006.229.13:13:56.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:13:56.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:13:56.74#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:13:56.74#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:13:56.74$setupk4/ifdk4 2006.229.13:13:56.74$ifdk4/lo= 2006.229.13:13:56.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:13:56.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:13:56.74$ifdk4/patch= 2006.229.13:13:56.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:13:56.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:13:56.74$setupk4/!*+20s 2006.229.13:13:56.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:14:06.86#abcon#<5=/04 0.9 1.4 27.571001002.2\r\n> 2006.229.13:14:06.88#abcon#{5=INTERFACE CLEAR} 2006.229.13:14:06.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:14:11.25$setupk4/"tpicd 2006.229.13:14:11.25$setupk4/echo=off 2006.229.13:14:11.25$setupk4/xlog=off 2006.229.13:14:11.25:!2006.229.13:16:25 2006.229.13:14:26.14#trakl#Source acquired 2006.229.13:14:28.14#flagr#flagr/antenna,acquired 2006.229.13:16:25.00:preob 2006.229.13:16:26.14/onsource/TRACKING 2006.229.13:16:26.14:!2006.229.13:16:35 2006.229.13:16:35.00:"tape 2006.229.13:16:35.00:"st=record 2006.229.13:16:35.00:data_valid=on 2006.229.13:16:35.00:midob 2006.229.13:16:35.14/onsource/TRACKING 2006.229.13:16:35.14/wx/27.58,1002.1,100 2006.229.13:16:35.22/cable/+6.4117E-03 2006.229.13:16:36.31/va/01,08,usb,yes,30,32 2006.229.13:16:36.31/va/02,07,usb,yes,32,33 2006.229.13:16:36.31/va/03,06,usb,yes,40,42 2006.229.13:16:36.31/va/04,07,usb,yes,33,35 2006.229.13:16:36.31/va/05,04,usb,yes,30,30 2006.229.13:16:36.31/va/06,04,usb,yes,33,33 2006.229.13:16:36.31/va/07,05,usb,yes,29,30 2006.229.13:16:36.31/va/08,06,usb,yes,21,26 2006.229.13:16:36.54/valo/01,524.99,yes,locked 2006.229.13:16:36.54/valo/02,534.99,yes,locked 2006.229.13:16:36.54/valo/03,564.99,yes,locked 2006.229.13:16:36.54/valo/04,624.99,yes,locked 2006.229.13:16:36.54/valo/05,734.99,yes,locked 2006.229.13:16:36.54/valo/06,814.99,yes,locked 2006.229.13:16:36.54/valo/07,864.99,yes,locked 2006.229.13:16:36.54/valo/08,884.99,yes,locked 2006.229.13:16:37.63/vb/01,04,usb,yes,31,29 2006.229.13:16:37.63/vb/02,04,usb,yes,33,33 2006.229.13:16:37.63/vb/03,04,usb,yes,30,33 2006.229.13:16:37.63/vb/04,04,usb,yes,35,34 2006.229.13:16:37.63/vb/05,04,usb,yes,27,30 2006.229.13:16:37.63/vb/06,04,usb,yes,32,28 2006.229.13:16:37.63/vb/07,04,usb,yes,32,31 2006.229.13:16:37.63/vb/08,04,usb,yes,29,32 2006.229.13:16:37.87/vblo/01,629.99,yes,locked 2006.229.13:16:37.87/vblo/02,634.99,yes,locked 2006.229.13:16:37.87/vblo/03,649.99,yes,locked 2006.229.13:16:37.87/vblo/04,679.99,yes,locked 2006.229.13:16:37.87/vblo/05,709.99,yes,locked 2006.229.13:16:37.87/vblo/06,719.99,yes,locked 2006.229.13:16:37.87/vblo/07,734.99,yes,locked 2006.229.13:16:37.87/vblo/08,744.99,yes,locked 2006.229.13:16:38.02/vabw/8 2006.229.13:16:38.17/vbbw/8 2006.229.13:16:38.26/xfe/off,on,12.0 2006.229.13:16:38.65/ifatt/23,28,28,28 2006.229.13:16:39.08/fmout-gps/S +4.68E-07 2006.229.13:16:39.12:!2006.229.13:17:25 2006.229.13:17:25.01:data_valid=off 2006.229.13:17:25.01:"et 2006.229.13:17:25.02:!+3s 2006.229.13:17:28.03:"tape 2006.229.13:17:28.03:postob 2006.229.13:17:28.23/cable/+6.4125E-03 2006.229.13:17:28.23/wx/27.58,1002.1,100 2006.229.13:17:28.29/fmout-gps/S +4.67E-07 2006.229.13:17:28.29:scan_name=229-1320,jd0608,260 2006.229.13:17:28.29:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.13:17:29.14#flagr#flagr/antenna,new-source 2006.229.13:17:29.14:checkk5 2006.229.13:17:29.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:17:29.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:17:30.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:17:30.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:17:31.11/chk_obsdata//k5ts1/T2291316??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.13:17:31.49/chk_obsdata//k5ts2/T2291316??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.13:17:31.89/chk_obsdata//k5ts3/T2291316??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.13:17:32.29/chk_obsdata//k5ts4/T2291316??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.13:17:33.00/k5log//k5ts1_log_newline 2006.229.13:17:33.72/k5log//k5ts2_log_newline 2006.229.13:17:34.42/k5log//k5ts3_log_newline 2006.229.13:17:35.12/k5log//k5ts4_log_newline 2006.229.13:17:35.15/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:17:35.15:setupk4=1 2006.229.13:17:35.15$setupk4/echo=on 2006.229.13:17:35.15$setupk4/pcalon 2006.229.13:17:35.15$pcalon/"no phase cal control is implemented here 2006.229.13:17:35.15$setupk4/"tpicd=stop 2006.229.13:17:35.15$setupk4/"rec=synch_on 2006.229.13:17:35.15$setupk4/"rec_mode=128 2006.229.13:17:35.15$setupk4/!* 2006.229.13:17:35.15$setupk4/recpk4 2006.229.13:17:35.15$recpk4/recpatch= 2006.229.13:17:35.15$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:17:35.15$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:17:35.15$setupk4/vck44 2006.229.13:17:35.15$vck44/valo=1,524.99 2006.229.13:17:35.15#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.13:17:35.15#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.13:17:35.15#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:35.15#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:35.15#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:35.15#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:35.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:17:35.15#ibcon#first serial, iclass 34, count 0 2006.229.13:17:35.15#ibcon#enter sib2, iclass 34, count 0 2006.229.13:17:35.15#ibcon#flushed, iclass 34, count 0 2006.229.13:17:35.15#ibcon#about to write, iclass 34, count 0 2006.229.13:17:35.15#ibcon#wrote, iclass 34, count 0 2006.229.13:17:35.15#ibcon#about to read 3, iclass 34, count 0 2006.229.13:17:35.17#ibcon#read 3, iclass 34, count 0 2006.229.13:17:35.17#ibcon#about to read 4, iclass 34, count 0 2006.229.13:17:35.17#ibcon#read 4, iclass 34, count 0 2006.229.13:17:35.17#ibcon#about to read 5, iclass 34, count 0 2006.229.13:17:35.17#ibcon#read 5, iclass 34, count 0 2006.229.13:17:35.17#ibcon#about to read 6, iclass 34, count 0 2006.229.13:17:35.17#ibcon#read 6, iclass 34, count 0 2006.229.13:17:35.17#ibcon#end of sib2, iclass 34, count 0 2006.229.13:17:35.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:17:35.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:17:35.17#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:17:35.17#ibcon#*before write, iclass 34, count 0 2006.229.13:17:35.17#ibcon#enter sib2, iclass 34, count 0 2006.229.13:17:35.17#ibcon#flushed, iclass 34, count 0 2006.229.13:17:35.17#ibcon#about to write, iclass 34, count 0 2006.229.13:17:35.17#ibcon#wrote, iclass 34, count 0 2006.229.13:17:35.17#ibcon#about to read 3, iclass 34, count 0 2006.229.13:17:35.22#ibcon#read 3, iclass 34, count 0 2006.229.13:17:35.22#ibcon#about to read 4, iclass 34, count 0 2006.229.13:17:35.22#ibcon#read 4, iclass 34, count 0 2006.229.13:17:35.22#ibcon#about to read 5, iclass 34, count 0 2006.229.13:17:35.22#ibcon#read 5, iclass 34, count 0 2006.229.13:17:35.22#ibcon#about to read 6, iclass 34, count 0 2006.229.13:17:35.22#ibcon#read 6, iclass 34, count 0 2006.229.13:17:35.22#ibcon#end of sib2, iclass 34, count 0 2006.229.13:17:35.22#ibcon#*after write, iclass 34, count 0 2006.229.13:17:35.22#ibcon#*before return 0, iclass 34, count 0 2006.229.13:17:35.22#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:35.22#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:35.22#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:17:35.22#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:17:35.22$vck44/va=1,8 2006.229.13:17:35.22#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.13:17:35.22#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.13:17:35.22#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:35.22#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:35.22#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:35.22#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:35.22#ibcon#enter wrdev, iclass 36, count 2 2006.229.13:17:35.22#ibcon#first serial, iclass 36, count 2 2006.229.13:17:35.22#ibcon#enter sib2, iclass 36, count 2 2006.229.13:17:35.22#ibcon#flushed, iclass 36, count 2 2006.229.13:17:35.22#ibcon#about to write, iclass 36, count 2 2006.229.13:17:35.22#ibcon#wrote, iclass 36, count 2 2006.229.13:17:35.22#ibcon#about to read 3, iclass 36, count 2 2006.229.13:17:35.24#ibcon#read 3, iclass 36, count 2 2006.229.13:17:35.24#ibcon#about to read 4, iclass 36, count 2 2006.229.13:17:35.24#ibcon#read 4, iclass 36, count 2 2006.229.13:17:35.24#ibcon#about to read 5, iclass 36, count 2 2006.229.13:17:35.24#ibcon#read 5, iclass 36, count 2 2006.229.13:17:35.24#ibcon#about to read 6, iclass 36, count 2 2006.229.13:17:35.24#ibcon#read 6, iclass 36, count 2 2006.229.13:17:35.24#ibcon#end of sib2, iclass 36, count 2 2006.229.13:17:35.24#ibcon#*mode == 0, iclass 36, count 2 2006.229.13:17:35.24#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.13:17:35.24#ibcon#[25=AT01-08\r\n] 2006.229.13:17:35.24#ibcon#*before write, iclass 36, count 2 2006.229.13:17:35.24#ibcon#enter sib2, iclass 36, count 2 2006.229.13:17:35.24#ibcon#flushed, iclass 36, count 2 2006.229.13:17:35.24#ibcon#about to write, iclass 36, count 2 2006.229.13:17:35.24#ibcon#wrote, iclass 36, count 2 2006.229.13:17:35.24#ibcon#about to read 3, iclass 36, count 2 2006.229.13:17:35.27#ibcon#read 3, iclass 36, count 2 2006.229.13:17:35.27#ibcon#about to read 4, iclass 36, count 2 2006.229.13:17:35.27#ibcon#read 4, iclass 36, count 2 2006.229.13:17:35.27#ibcon#about to read 5, iclass 36, count 2 2006.229.13:17:35.27#ibcon#read 5, iclass 36, count 2 2006.229.13:17:35.27#ibcon#about to read 6, iclass 36, count 2 2006.229.13:17:35.27#ibcon#read 6, iclass 36, count 2 2006.229.13:17:35.27#ibcon#end of sib2, iclass 36, count 2 2006.229.13:17:35.27#ibcon#*after write, iclass 36, count 2 2006.229.13:17:35.27#ibcon#*before return 0, iclass 36, count 2 2006.229.13:17:35.27#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:35.27#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:35.27#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.13:17:35.27#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:35.27#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:35.39#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:35.39#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:35.39#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:17:35.39#ibcon#first serial, iclass 36, count 0 2006.229.13:17:35.39#ibcon#enter sib2, iclass 36, count 0 2006.229.13:17:35.39#ibcon#flushed, iclass 36, count 0 2006.229.13:17:35.39#ibcon#about to write, iclass 36, count 0 2006.229.13:17:35.39#ibcon#wrote, iclass 36, count 0 2006.229.13:17:35.39#ibcon#about to read 3, iclass 36, count 0 2006.229.13:17:35.41#ibcon#read 3, iclass 36, count 0 2006.229.13:17:35.41#ibcon#about to read 4, iclass 36, count 0 2006.229.13:17:35.41#ibcon#read 4, iclass 36, count 0 2006.229.13:17:35.41#ibcon#about to read 5, iclass 36, count 0 2006.229.13:17:35.41#ibcon#read 5, iclass 36, count 0 2006.229.13:17:35.41#ibcon#about to read 6, iclass 36, count 0 2006.229.13:17:35.41#ibcon#read 6, iclass 36, count 0 2006.229.13:17:35.41#ibcon#end of sib2, iclass 36, count 0 2006.229.13:17:35.41#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:17:35.41#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:17:35.41#ibcon#[25=USB\r\n] 2006.229.13:17:35.41#ibcon#*before write, iclass 36, count 0 2006.229.13:17:35.41#ibcon#enter sib2, iclass 36, count 0 2006.229.13:17:35.41#ibcon#flushed, iclass 36, count 0 2006.229.13:17:35.41#ibcon#about to write, iclass 36, count 0 2006.229.13:17:35.41#ibcon#wrote, iclass 36, count 0 2006.229.13:17:35.41#ibcon#about to read 3, iclass 36, count 0 2006.229.13:17:35.44#ibcon#read 3, iclass 36, count 0 2006.229.13:17:35.44#ibcon#about to read 4, iclass 36, count 0 2006.229.13:17:35.44#ibcon#read 4, iclass 36, count 0 2006.229.13:17:35.44#ibcon#about to read 5, iclass 36, count 0 2006.229.13:17:35.44#ibcon#read 5, iclass 36, count 0 2006.229.13:17:35.44#ibcon#about to read 6, iclass 36, count 0 2006.229.13:17:35.44#ibcon#read 6, iclass 36, count 0 2006.229.13:17:35.44#ibcon#end of sib2, iclass 36, count 0 2006.229.13:17:35.44#ibcon#*after write, iclass 36, count 0 2006.229.13:17:35.44#ibcon#*before return 0, iclass 36, count 0 2006.229.13:17:35.44#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:35.44#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:35.44#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:17:35.44#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:17:35.44$vck44/valo=2,534.99 2006.229.13:17:35.44#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.13:17:35.44#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.13:17:35.44#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:35.44#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:35.44#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:35.44#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:35.44#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:17:35.44#ibcon#first serial, iclass 38, count 0 2006.229.13:17:35.44#ibcon#enter sib2, iclass 38, count 0 2006.229.13:17:35.44#ibcon#flushed, iclass 38, count 0 2006.229.13:17:35.44#ibcon#about to write, iclass 38, count 0 2006.229.13:17:35.44#ibcon#wrote, iclass 38, count 0 2006.229.13:17:35.44#ibcon#about to read 3, iclass 38, count 0 2006.229.13:17:35.46#ibcon#read 3, iclass 38, count 0 2006.229.13:17:35.46#ibcon#about to read 4, iclass 38, count 0 2006.229.13:17:35.46#ibcon#read 4, iclass 38, count 0 2006.229.13:17:35.46#ibcon#about to read 5, iclass 38, count 0 2006.229.13:17:35.46#ibcon#read 5, iclass 38, count 0 2006.229.13:17:35.46#ibcon#about to read 6, iclass 38, count 0 2006.229.13:17:35.46#ibcon#read 6, iclass 38, count 0 2006.229.13:17:35.46#ibcon#end of sib2, iclass 38, count 0 2006.229.13:17:35.46#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:17:35.46#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:17:35.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:17:35.46#ibcon#*before write, iclass 38, count 0 2006.229.13:17:35.46#ibcon#enter sib2, iclass 38, count 0 2006.229.13:17:35.46#ibcon#flushed, iclass 38, count 0 2006.229.13:17:35.46#ibcon#about to write, iclass 38, count 0 2006.229.13:17:35.46#ibcon#wrote, iclass 38, count 0 2006.229.13:17:35.46#ibcon#about to read 3, iclass 38, count 0 2006.229.13:17:35.50#ibcon#read 3, iclass 38, count 0 2006.229.13:17:35.50#ibcon#about to read 4, iclass 38, count 0 2006.229.13:17:35.50#ibcon#read 4, iclass 38, count 0 2006.229.13:17:35.50#ibcon#about to read 5, iclass 38, count 0 2006.229.13:17:35.50#ibcon#read 5, iclass 38, count 0 2006.229.13:17:35.50#ibcon#about to read 6, iclass 38, count 0 2006.229.13:17:35.50#ibcon#read 6, iclass 38, count 0 2006.229.13:17:35.50#ibcon#end of sib2, iclass 38, count 0 2006.229.13:17:35.50#ibcon#*after write, iclass 38, count 0 2006.229.13:17:35.50#ibcon#*before return 0, iclass 38, count 0 2006.229.13:17:35.50#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:35.50#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:35.50#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:17:35.50#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:17:35.50$vck44/va=2,7 2006.229.13:17:35.50#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.13:17:35.50#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.13:17:35.50#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:35.50#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:35.56#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:35.56#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:35.56#ibcon#enter wrdev, iclass 40, count 2 2006.229.13:17:35.56#ibcon#first serial, iclass 40, count 2 2006.229.13:17:35.56#ibcon#enter sib2, iclass 40, count 2 2006.229.13:17:35.56#ibcon#flushed, iclass 40, count 2 2006.229.13:17:35.56#ibcon#about to write, iclass 40, count 2 2006.229.13:17:35.56#ibcon#wrote, iclass 40, count 2 2006.229.13:17:35.56#ibcon#about to read 3, iclass 40, count 2 2006.229.13:17:35.58#ibcon#read 3, iclass 40, count 2 2006.229.13:17:35.58#ibcon#about to read 4, iclass 40, count 2 2006.229.13:17:35.58#ibcon#read 4, iclass 40, count 2 2006.229.13:17:35.58#ibcon#about to read 5, iclass 40, count 2 2006.229.13:17:35.58#ibcon#read 5, iclass 40, count 2 2006.229.13:17:35.58#ibcon#about to read 6, iclass 40, count 2 2006.229.13:17:35.58#ibcon#read 6, iclass 40, count 2 2006.229.13:17:35.58#ibcon#end of sib2, iclass 40, count 2 2006.229.13:17:35.58#ibcon#*mode == 0, iclass 40, count 2 2006.229.13:17:35.58#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.13:17:35.58#ibcon#[25=AT02-07\r\n] 2006.229.13:17:35.58#ibcon#*before write, iclass 40, count 2 2006.229.13:17:35.58#ibcon#enter sib2, iclass 40, count 2 2006.229.13:17:35.58#ibcon#flushed, iclass 40, count 2 2006.229.13:17:35.58#ibcon#about to write, iclass 40, count 2 2006.229.13:17:35.58#ibcon#wrote, iclass 40, count 2 2006.229.13:17:35.58#ibcon#about to read 3, iclass 40, count 2 2006.229.13:17:35.61#ibcon#read 3, iclass 40, count 2 2006.229.13:17:35.61#ibcon#about to read 4, iclass 40, count 2 2006.229.13:17:35.61#ibcon#read 4, iclass 40, count 2 2006.229.13:17:35.61#ibcon#about to read 5, iclass 40, count 2 2006.229.13:17:35.61#ibcon#read 5, iclass 40, count 2 2006.229.13:17:35.61#ibcon#about to read 6, iclass 40, count 2 2006.229.13:17:35.61#ibcon#read 6, iclass 40, count 2 2006.229.13:17:35.61#ibcon#end of sib2, iclass 40, count 2 2006.229.13:17:35.61#ibcon#*after write, iclass 40, count 2 2006.229.13:17:35.61#ibcon#*before return 0, iclass 40, count 2 2006.229.13:17:35.61#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:35.61#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:35.61#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.13:17:35.61#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:35.61#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:35.73#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:35.73#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:35.73#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:17:35.73#ibcon#first serial, iclass 40, count 0 2006.229.13:17:35.73#ibcon#enter sib2, iclass 40, count 0 2006.229.13:17:35.73#ibcon#flushed, iclass 40, count 0 2006.229.13:17:35.73#ibcon#about to write, iclass 40, count 0 2006.229.13:17:35.73#ibcon#wrote, iclass 40, count 0 2006.229.13:17:35.73#ibcon#about to read 3, iclass 40, count 0 2006.229.13:17:35.75#ibcon#read 3, iclass 40, count 0 2006.229.13:17:35.75#ibcon#about to read 4, iclass 40, count 0 2006.229.13:17:35.75#ibcon#read 4, iclass 40, count 0 2006.229.13:17:35.75#ibcon#about to read 5, iclass 40, count 0 2006.229.13:17:35.75#ibcon#read 5, iclass 40, count 0 2006.229.13:17:35.75#ibcon#about to read 6, iclass 40, count 0 2006.229.13:17:35.75#ibcon#read 6, iclass 40, count 0 2006.229.13:17:35.75#ibcon#end of sib2, iclass 40, count 0 2006.229.13:17:35.75#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:17:35.75#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:17:35.75#ibcon#[25=USB\r\n] 2006.229.13:17:35.75#ibcon#*before write, iclass 40, count 0 2006.229.13:17:35.75#ibcon#enter sib2, iclass 40, count 0 2006.229.13:17:35.75#ibcon#flushed, iclass 40, count 0 2006.229.13:17:35.75#ibcon#about to write, iclass 40, count 0 2006.229.13:17:35.75#ibcon#wrote, iclass 40, count 0 2006.229.13:17:35.75#ibcon#about to read 3, iclass 40, count 0 2006.229.13:17:35.78#ibcon#read 3, iclass 40, count 0 2006.229.13:17:35.78#ibcon#about to read 4, iclass 40, count 0 2006.229.13:17:35.78#ibcon#read 4, iclass 40, count 0 2006.229.13:17:35.78#ibcon#about to read 5, iclass 40, count 0 2006.229.13:17:35.78#ibcon#read 5, iclass 40, count 0 2006.229.13:17:35.78#ibcon#about to read 6, iclass 40, count 0 2006.229.13:17:35.78#ibcon#read 6, iclass 40, count 0 2006.229.13:17:35.78#ibcon#end of sib2, iclass 40, count 0 2006.229.13:17:35.78#ibcon#*after write, iclass 40, count 0 2006.229.13:17:35.78#ibcon#*before return 0, iclass 40, count 0 2006.229.13:17:35.78#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:35.78#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:35.78#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:17:35.78#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:17:35.78$vck44/valo=3,564.99 2006.229.13:17:35.78#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.13:17:35.78#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.13:17:35.78#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:35.78#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:35.78#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:35.78#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:35.78#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:17:35.78#ibcon#first serial, iclass 4, count 0 2006.229.13:17:35.78#ibcon#enter sib2, iclass 4, count 0 2006.229.13:17:35.78#ibcon#flushed, iclass 4, count 0 2006.229.13:17:35.78#ibcon#about to write, iclass 4, count 0 2006.229.13:17:35.78#ibcon#wrote, iclass 4, count 0 2006.229.13:17:35.78#ibcon#about to read 3, iclass 4, count 0 2006.229.13:17:35.80#ibcon#read 3, iclass 4, count 0 2006.229.13:17:35.80#ibcon#about to read 4, iclass 4, count 0 2006.229.13:17:35.80#ibcon#read 4, iclass 4, count 0 2006.229.13:17:35.80#ibcon#about to read 5, iclass 4, count 0 2006.229.13:17:35.80#ibcon#read 5, iclass 4, count 0 2006.229.13:17:35.80#ibcon#about to read 6, iclass 4, count 0 2006.229.13:17:35.80#ibcon#read 6, iclass 4, count 0 2006.229.13:17:35.80#ibcon#end of sib2, iclass 4, count 0 2006.229.13:17:35.80#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:17:35.80#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:17:35.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:17:35.80#ibcon#*before write, iclass 4, count 0 2006.229.13:17:35.80#ibcon#enter sib2, iclass 4, count 0 2006.229.13:17:35.80#ibcon#flushed, iclass 4, count 0 2006.229.13:17:35.80#ibcon#about to write, iclass 4, count 0 2006.229.13:17:35.80#ibcon#wrote, iclass 4, count 0 2006.229.13:17:35.80#ibcon#about to read 3, iclass 4, count 0 2006.229.13:17:35.84#ibcon#read 3, iclass 4, count 0 2006.229.13:17:35.84#ibcon#about to read 4, iclass 4, count 0 2006.229.13:17:35.84#ibcon#read 4, iclass 4, count 0 2006.229.13:17:35.84#ibcon#about to read 5, iclass 4, count 0 2006.229.13:17:35.84#ibcon#read 5, iclass 4, count 0 2006.229.13:17:35.84#ibcon#about to read 6, iclass 4, count 0 2006.229.13:17:35.84#ibcon#read 6, iclass 4, count 0 2006.229.13:17:35.84#ibcon#end of sib2, iclass 4, count 0 2006.229.13:17:35.84#ibcon#*after write, iclass 4, count 0 2006.229.13:17:35.84#ibcon#*before return 0, iclass 4, count 0 2006.229.13:17:35.84#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:35.84#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:35.84#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:17:35.84#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:17:35.84$vck44/va=3,6 2006.229.13:17:35.84#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.13:17:35.84#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.13:17:35.84#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:35.84#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:35.90#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:35.90#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:35.90#ibcon#enter wrdev, iclass 6, count 2 2006.229.13:17:35.90#ibcon#first serial, iclass 6, count 2 2006.229.13:17:35.90#ibcon#enter sib2, iclass 6, count 2 2006.229.13:17:35.90#ibcon#flushed, iclass 6, count 2 2006.229.13:17:35.90#ibcon#about to write, iclass 6, count 2 2006.229.13:17:35.90#ibcon#wrote, iclass 6, count 2 2006.229.13:17:35.90#ibcon#about to read 3, iclass 6, count 2 2006.229.13:17:35.92#ibcon#read 3, iclass 6, count 2 2006.229.13:17:35.92#ibcon#about to read 4, iclass 6, count 2 2006.229.13:17:35.92#ibcon#read 4, iclass 6, count 2 2006.229.13:17:35.92#ibcon#about to read 5, iclass 6, count 2 2006.229.13:17:35.92#ibcon#read 5, iclass 6, count 2 2006.229.13:17:35.92#ibcon#about to read 6, iclass 6, count 2 2006.229.13:17:35.92#ibcon#read 6, iclass 6, count 2 2006.229.13:17:35.92#ibcon#end of sib2, iclass 6, count 2 2006.229.13:17:35.92#ibcon#*mode == 0, iclass 6, count 2 2006.229.13:17:35.92#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.13:17:35.92#ibcon#[25=AT03-06\r\n] 2006.229.13:17:35.92#ibcon#*before write, iclass 6, count 2 2006.229.13:17:35.92#ibcon#enter sib2, iclass 6, count 2 2006.229.13:17:35.92#ibcon#flushed, iclass 6, count 2 2006.229.13:17:35.92#ibcon#about to write, iclass 6, count 2 2006.229.13:17:35.92#ibcon#wrote, iclass 6, count 2 2006.229.13:17:35.92#ibcon#about to read 3, iclass 6, count 2 2006.229.13:17:35.95#ibcon#read 3, iclass 6, count 2 2006.229.13:17:35.95#ibcon#about to read 4, iclass 6, count 2 2006.229.13:17:35.95#ibcon#read 4, iclass 6, count 2 2006.229.13:17:35.95#ibcon#about to read 5, iclass 6, count 2 2006.229.13:17:35.95#ibcon#read 5, iclass 6, count 2 2006.229.13:17:35.95#ibcon#about to read 6, iclass 6, count 2 2006.229.13:17:35.95#ibcon#read 6, iclass 6, count 2 2006.229.13:17:35.95#ibcon#end of sib2, iclass 6, count 2 2006.229.13:17:35.95#ibcon#*after write, iclass 6, count 2 2006.229.13:17:35.95#ibcon#*before return 0, iclass 6, count 2 2006.229.13:17:35.95#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:35.95#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:35.95#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.13:17:35.95#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:35.95#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:36.07#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:36.07#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:36.07#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:17:36.07#ibcon#first serial, iclass 6, count 0 2006.229.13:17:36.07#ibcon#enter sib2, iclass 6, count 0 2006.229.13:17:36.07#ibcon#flushed, iclass 6, count 0 2006.229.13:17:36.07#ibcon#about to write, iclass 6, count 0 2006.229.13:17:36.07#ibcon#wrote, iclass 6, count 0 2006.229.13:17:36.07#ibcon#about to read 3, iclass 6, count 0 2006.229.13:17:36.09#ibcon#read 3, iclass 6, count 0 2006.229.13:17:36.09#ibcon#about to read 4, iclass 6, count 0 2006.229.13:17:36.09#ibcon#read 4, iclass 6, count 0 2006.229.13:17:36.09#ibcon#about to read 5, iclass 6, count 0 2006.229.13:17:36.09#ibcon#read 5, iclass 6, count 0 2006.229.13:17:36.09#ibcon#about to read 6, iclass 6, count 0 2006.229.13:17:36.09#ibcon#read 6, iclass 6, count 0 2006.229.13:17:36.09#ibcon#end of sib2, iclass 6, count 0 2006.229.13:17:36.09#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:17:36.09#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:17:36.09#ibcon#[25=USB\r\n] 2006.229.13:17:36.09#ibcon#*before write, iclass 6, count 0 2006.229.13:17:36.09#ibcon#enter sib2, iclass 6, count 0 2006.229.13:17:36.09#ibcon#flushed, iclass 6, count 0 2006.229.13:17:36.09#ibcon#about to write, iclass 6, count 0 2006.229.13:17:36.09#ibcon#wrote, iclass 6, count 0 2006.229.13:17:36.09#ibcon#about to read 3, iclass 6, count 0 2006.229.13:17:36.12#ibcon#read 3, iclass 6, count 0 2006.229.13:17:36.12#ibcon#about to read 4, iclass 6, count 0 2006.229.13:17:36.12#ibcon#read 4, iclass 6, count 0 2006.229.13:17:36.12#ibcon#about to read 5, iclass 6, count 0 2006.229.13:17:36.12#ibcon#read 5, iclass 6, count 0 2006.229.13:17:36.12#ibcon#about to read 6, iclass 6, count 0 2006.229.13:17:36.12#ibcon#read 6, iclass 6, count 0 2006.229.13:17:36.12#ibcon#end of sib2, iclass 6, count 0 2006.229.13:17:36.12#ibcon#*after write, iclass 6, count 0 2006.229.13:17:36.12#ibcon#*before return 0, iclass 6, count 0 2006.229.13:17:36.12#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:36.12#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:36.12#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:17:36.12#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:17:36.12$vck44/valo=4,624.99 2006.229.13:17:36.12#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.13:17:36.12#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.13:17:36.12#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:36.12#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:36.12#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:36.12#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:36.12#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:17:36.12#ibcon#first serial, iclass 10, count 0 2006.229.13:17:36.12#ibcon#enter sib2, iclass 10, count 0 2006.229.13:17:36.12#ibcon#flushed, iclass 10, count 0 2006.229.13:17:36.12#ibcon#about to write, iclass 10, count 0 2006.229.13:17:36.12#ibcon#wrote, iclass 10, count 0 2006.229.13:17:36.12#ibcon#about to read 3, iclass 10, count 0 2006.229.13:17:36.14#ibcon#read 3, iclass 10, count 0 2006.229.13:17:36.14#ibcon#about to read 4, iclass 10, count 0 2006.229.13:17:36.14#ibcon#read 4, iclass 10, count 0 2006.229.13:17:36.14#ibcon#about to read 5, iclass 10, count 0 2006.229.13:17:36.14#ibcon#read 5, iclass 10, count 0 2006.229.13:17:36.14#ibcon#about to read 6, iclass 10, count 0 2006.229.13:17:36.14#ibcon#read 6, iclass 10, count 0 2006.229.13:17:36.14#ibcon#end of sib2, iclass 10, count 0 2006.229.13:17:36.14#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:17:36.14#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:17:36.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:17:36.14#ibcon#*before write, iclass 10, count 0 2006.229.13:17:36.14#ibcon#enter sib2, iclass 10, count 0 2006.229.13:17:36.14#ibcon#flushed, iclass 10, count 0 2006.229.13:17:36.14#ibcon#about to write, iclass 10, count 0 2006.229.13:17:36.14#ibcon#wrote, iclass 10, count 0 2006.229.13:17:36.14#ibcon#about to read 3, iclass 10, count 0 2006.229.13:17:36.18#ibcon#read 3, iclass 10, count 0 2006.229.13:17:36.18#ibcon#about to read 4, iclass 10, count 0 2006.229.13:17:36.18#ibcon#read 4, iclass 10, count 0 2006.229.13:17:36.18#ibcon#about to read 5, iclass 10, count 0 2006.229.13:17:36.18#ibcon#read 5, iclass 10, count 0 2006.229.13:17:36.18#ibcon#about to read 6, iclass 10, count 0 2006.229.13:17:36.18#ibcon#read 6, iclass 10, count 0 2006.229.13:17:36.18#ibcon#end of sib2, iclass 10, count 0 2006.229.13:17:36.18#ibcon#*after write, iclass 10, count 0 2006.229.13:17:36.18#ibcon#*before return 0, iclass 10, count 0 2006.229.13:17:36.18#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:36.18#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:36.18#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:17:36.18#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:17:36.18$vck44/va=4,7 2006.229.13:17:36.18#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.13:17:36.18#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.13:17:36.18#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:36.18#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:36.24#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:36.24#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:36.24#ibcon#enter wrdev, iclass 12, count 2 2006.229.13:17:36.24#ibcon#first serial, iclass 12, count 2 2006.229.13:17:36.24#ibcon#enter sib2, iclass 12, count 2 2006.229.13:17:36.24#ibcon#flushed, iclass 12, count 2 2006.229.13:17:36.24#ibcon#about to write, iclass 12, count 2 2006.229.13:17:36.24#ibcon#wrote, iclass 12, count 2 2006.229.13:17:36.24#ibcon#about to read 3, iclass 12, count 2 2006.229.13:17:36.26#ibcon#read 3, iclass 12, count 2 2006.229.13:17:36.26#ibcon#about to read 4, iclass 12, count 2 2006.229.13:17:36.26#ibcon#read 4, iclass 12, count 2 2006.229.13:17:36.26#ibcon#about to read 5, iclass 12, count 2 2006.229.13:17:36.26#ibcon#read 5, iclass 12, count 2 2006.229.13:17:36.26#ibcon#about to read 6, iclass 12, count 2 2006.229.13:17:36.26#ibcon#read 6, iclass 12, count 2 2006.229.13:17:36.26#ibcon#end of sib2, iclass 12, count 2 2006.229.13:17:36.26#ibcon#*mode == 0, iclass 12, count 2 2006.229.13:17:36.26#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.13:17:36.26#ibcon#[25=AT04-07\r\n] 2006.229.13:17:36.26#ibcon#*before write, iclass 12, count 2 2006.229.13:17:36.26#ibcon#enter sib2, iclass 12, count 2 2006.229.13:17:36.26#ibcon#flushed, iclass 12, count 2 2006.229.13:17:36.26#ibcon#about to write, iclass 12, count 2 2006.229.13:17:36.26#ibcon#wrote, iclass 12, count 2 2006.229.13:17:36.26#ibcon#about to read 3, iclass 12, count 2 2006.229.13:17:36.29#ibcon#read 3, iclass 12, count 2 2006.229.13:17:36.29#ibcon#about to read 4, iclass 12, count 2 2006.229.13:17:36.29#ibcon#read 4, iclass 12, count 2 2006.229.13:17:36.29#ibcon#about to read 5, iclass 12, count 2 2006.229.13:17:36.29#ibcon#read 5, iclass 12, count 2 2006.229.13:17:36.29#ibcon#about to read 6, iclass 12, count 2 2006.229.13:17:36.29#ibcon#read 6, iclass 12, count 2 2006.229.13:17:36.29#ibcon#end of sib2, iclass 12, count 2 2006.229.13:17:36.29#ibcon#*after write, iclass 12, count 2 2006.229.13:17:36.29#ibcon#*before return 0, iclass 12, count 2 2006.229.13:17:36.29#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:36.29#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:36.29#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.13:17:36.29#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:36.29#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:36.41#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:36.41#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:36.41#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:17:36.41#ibcon#first serial, iclass 12, count 0 2006.229.13:17:36.41#ibcon#enter sib2, iclass 12, count 0 2006.229.13:17:36.41#ibcon#flushed, iclass 12, count 0 2006.229.13:17:36.41#ibcon#about to write, iclass 12, count 0 2006.229.13:17:36.41#ibcon#wrote, iclass 12, count 0 2006.229.13:17:36.41#ibcon#about to read 3, iclass 12, count 0 2006.229.13:17:36.43#ibcon#read 3, iclass 12, count 0 2006.229.13:17:36.43#ibcon#about to read 4, iclass 12, count 0 2006.229.13:17:36.43#ibcon#read 4, iclass 12, count 0 2006.229.13:17:36.43#ibcon#about to read 5, iclass 12, count 0 2006.229.13:17:36.43#ibcon#read 5, iclass 12, count 0 2006.229.13:17:36.43#ibcon#about to read 6, iclass 12, count 0 2006.229.13:17:36.43#ibcon#read 6, iclass 12, count 0 2006.229.13:17:36.43#ibcon#end of sib2, iclass 12, count 0 2006.229.13:17:36.43#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:17:36.43#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:17:36.43#ibcon#[25=USB\r\n] 2006.229.13:17:36.43#ibcon#*before write, iclass 12, count 0 2006.229.13:17:36.43#ibcon#enter sib2, iclass 12, count 0 2006.229.13:17:36.43#ibcon#flushed, iclass 12, count 0 2006.229.13:17:36.43#ibcon#about to write, iclass 12, count 0 2006.229.13:17:36.43#ibcon#wrote, iclass 12, count 0 2006.229.13:17:36.43#ibcon#about to read 3, iclass 12, count 0 2006.229.13:17:36.46#ibcon#read 3, iclass 12, count 0 2006.229.13:17:36.46#ibcon#about to read 4, iclass 12, count 0 2006.229.13:17:36.46#ibcon#read 4, iclass 12, count 0 2006.229.13:17:36.46#ibcon#about to read 5, iclass 12, count 0 2006.229.13:17:36.46#ibcon#read 5, iclass 12, count 0 2006.229.13:17:36.46#ibcon#about to read 6, iclass 12, count 0 2006.229.13:17:36.46#ibcon#read 6, iclass 12, count 0 2006.229.13:17:36.46#ibcon#end of sib2, iclass 12, count 0 2006.229.13:17:36.46#ibcon#*after write, iclass 12, count 0 2006.229.13:17:36.46#ibcon#*before return 0, iclass 12, count 0 2006.229.13:17:36.46#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:36.46#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:36.46#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:17:36.46#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:17:36.46$vck44/valo=5,734.99 2006.229.13:17:36.46#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.13:17:36.46#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.13:17:36.46#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:36.46#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:36.46#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:36.46#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:36.46#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:17:36.46#ibcon#first serial, iclass 14, count 0 2006.229.13:17:36.46#ibcon#enter sib2, iclass 14, count 0 2006.229.13:17:36.46#ibcon#flushed, iclass 14, count 0 2006.229.13:17:36.46#ibcon#about to write, iclass 14, count 0 2006.229.13:17:36.46#ibcon#wrote, iclass 14, count 0 2006.229.13:17:36.46#ibcon#about to read 3, iclass 14, count 0 2006.229.13:17:36.48#ibcon#read 3, iclass 14, count 0 2006.229.13:17:36.48#ibcon#about to read 4, iclass 14, count 0 2006.229.13:17:36.48#ibcon#read 4, iclass 14, count 0 2006.229.13:17:36.48#ibcon#about to read 5, iclass 14, count 0 2006.229.13:17:36.48#ibcon#read 5, iclass 14, count 0 2006.229.13:17:36.48#ibcon#about to read 6, iclass 14, count 0 2006.229.13:17:36.48#ibcon#read 6, iclass 14, count 0 2006.229.13:17:36.48#ibcon#end of sib2, iclass 14, count 0 2006.229.13:17:36.48#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:17:36.48#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:17:36.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:17:36.48#ibcon#*before write, iclass 14, count 0 2006.229.13:17:36.48#ibcon#enter sib2, iclass 14, count 0 2006.229.13:17:36.48#ibcon#flushed, iclass 14, count 0 2006.229.13:17:36.48#ibcon#about to write, iclass 14, count 0 2006.229.13:17:36.48#ibcon#wrote, iclass 14, count 0 2006.229.13:17:36.48#ibcon#about to read 3, iclass 14, count 0 2006.229.13:17:36.52#ibcon#read 3, iclass 14, count 0 2006.229.13:17:36.52#ibcon#about to read 4, iclass 14, count 0 2006.229.13:17:36.52#ibcon#read 4, iclass 14, count 0 2006.229.13:17:36.52#ibcon#about to read 5, iclass 14, count 0 2006.229.13:17:36.52#ibcon#read 5, iclass 14, count 0 2006.229.13:17:36.52#ibcon#about to read 6, iclass 14, count 0 2006.229.13:17:36.52#ibcon#read 6, iclass 14, count 0 2006.229.13:17:36.52#ibcon#end of sib2, iclass 14, count 0 2006.229.13:17:36.52#ibcon#*after write, iclass 14, count 0 2006.229.13:17:36.52#ibcon#*before return 0, iclass 14, count 0 2006.229.13:17:36.52#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:36.52#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:36.52#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:17:36.52#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:17:36.52$vck44/va=5,4 2006.229.13:17:36.52#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.13:17:36.52#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.13:17:36.52#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:36.52#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:36.58#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:36.58#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:36.58#ibcon#enter wrdev, iclass 16, count 2 2006.229.13:17:36.58#ibcon#first serial, iclass 16, count 2 2006.229.13:17:36.58#ibcon#enter sib2, iclass 16, count 2 2006.229.13:17:36.58#ibcon#flushed, iclass 16, count 2 2006.229.13:17:36.58#ibcon#about to write, iclass 16, count 2 2006.229.13:17:36.58#ibcon#wrote, iclass 16, count 2 2006.229.13:17:36.58#ibcon#about to read 3, iclass 16, count 2 2006.229.13:17:36.60#ibcon#read 3, iclass 16, count 2 2006.229.13:17:36.60#ibcon#about to read 4, iclass 16, count 2 2006.229.13:17:36.60#ibcon#read 4, iclass 16, count 2 2006.229.13:17:36.60#ibcon#about to read 5, iclass 16, count 2 2006.229.13:17:36.60#ibcon#read 5, iclass 16, count 2 2006.229.13:17:36.60#ibcon#about to read 6, iclass 16, count 2 2006.229.13:17:36.60#ibcon#read 6, iclass 16, count 2 2006.229.13:17:36.60#ibcon#end of sib2, iclass 16, count 2 2006.229.13:17:36.60#ibcon#*mode == 0, iclass 16, count 2 2006.229.13:17:36.60#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.13:17:36.60#ibcon#[25=AT05-04\r\n] 2006.229.13:17:36.60#ibcon#*before write, iclass 16, count 2 2006.229.13:17:36.60#ibcon#enter sib2, iclass 16, count 2 2006.229.13:17:36.60#ibcon#flushed, iclass 16, count 2 2006.229.13:17:36.60#ibcon#about to write, iclass 16, count 2 2006.229.13:17:36.60#ibcon#wrote, iclass 16, count 2 2006.229.13:17:36.60#ibcon#about to read 3, iclass 16, count 2 2006.229.13:17:36.63#ibcon#read 3, iclass 16, count 2 2006.229.13:17:36.63#ibcon#about to read 4, iclass 16, count 2 2006.229.13:17:36.63#ibcon#read 4, iclass 16, count 2 2006.229.13:17:36.63#ibcon#about to read 5, iclass 16, count 2 2006.229.13:17:36.63#ibcon#read 5, iclass 16, count 2 2006.229.13:17:36.63#ibcon#about to read 6, iclass 16, count 2 2006.229.13:17:36.63#ibcon#read 6, iclass 16, count 2 2006.229.13:17:36.63#ibcon#end of sib2, iclass 16, count 2 2006.229.13:17:36.63#ibcon#*after write, iclass 16, count 2 2006.229.13:17:36.63#ibcon#*before return 0, iclass 16, count 2 2006.229.13:17:36.63#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:36.63#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:36.63#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.13:17:36.63#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:36.63#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:36.75#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:36.75#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:36.75#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:17:36.75#ibcon#first serial, iclass 16, count 0 2006.229.13:17:36.75#ibcon#enter sib2, iclass 16, count 0 2006.229.13:17:36.75#ibcon#flushed, iclass 16, count 0 2006.229.13:17:36.75#ibcon#about to write, iclass 16, count 0 2006.229.13:17:36.75#ibcon#wrote, iclass 16, count 0 2006.229.13:17:36.75#ibcon#about to read 3, iclass 16, count 0 2006.229.13:17:36.77#ibcon#read 3, iclass 16, count 0 2006.229.13:17:36.77#ibcon#about to read 4, iclass 16, count 0 2006.229.13:17:36.77#ibcon#read 4, iclass 16, count 0 2006.229.13:17:36.77#ibcon#about to read 5, iclass 16, count 0 2006.229.13:17:36.77#ibcon#read 5, iclass 16, count 0 2006.229.13:17:36.77#ibcon#about to read 6, iclass 16, count 0 2006.229.13:17:36.77#ibcon#read 6, iclass 16, count 0 2006.229.13:17:36.77#ibcon#end of sib2, iclass 16, count 0 2006.229.13:17:36.77#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:17:36.77#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:17:36.77#ibcon#[25=USB\r\n] 2006.229.13:17:36.77#ibcon#*before write, iclass 16, count 0 2006.229.13:17:36.77#ibcon#enter sib2, iclass 16, count 0 2006.229.13:17:36.77#ibcon#flushed, iclass 16, count 0 2006.229.13:17:36.77#ibcon#about to write, iclass 16, count 0 2006.229.13:17:36.77#ibcon#wrote, iclass 16, count 0 2006.229.13:17:36.77#ibcon#about to read 3, iclass 16, count 0 2006.229.13:17:36.80#ibcon#read 3, iclass 16, count 0 2006.229.13:17:36.80#ibcon#about to read 4, iclass 16, count 0 2006.229.13:17:36.80#ibcon#read 4, iclass 16, count 0 2006.229.13:17:36.80#ibcon#about to read 5, iclass 16, count 0 2006.229.13:17:36.80#ibcon#read 5, iclass 16, count 0 2006.229.13:17:36.80#ibcon#about to read 6, iclass 16, count 0 2006.229.13:17:36.80#ibcon#read 6, iclass 16, count 0 2006.229.13:17:36.80#ibcon#end of sib2, iclass 16, count 0 2006.229.13:17:36.80#ibcon#*after write, iclass 16, count 0 2006.229.13:17:36.80#ibcon#*before return 0, iclass 16, count 0 2006.229.13:17:36.80#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:36.80#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:36.80#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:17:36.80#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:17:36.80$vck44/valo=6,814.99 2006.229.13:17:36.80#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.13:17:36.80#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.13:17:36.80#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:36.80#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:36.80#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:36.80#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:36.80#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:17:36.80#ibcon#first serial, iclass 18, count 0 2006.229.13:17:36.80#ibcon#enter sib2, iclass 18, count 0 2006.229.13:17:36.80#ibcon#flushed, iclass 18, count 0 2006.229.13:17:36.80#ibcon#about to write, iclass 18, count 0 2006.229.13:17:36.80#ibcon#wrote, iclass 18, count 0 2006.229.13:17:36.80#ibcon#about to read 3, iclass 18, count 0 2006.229.13:17:36.82#ibcon#read 3, iclass 18, count 0 2006.229.13:17:36.82#ibcon#about to read 4, iclass 18, count 0 2006.229.13:17:36.82#ibcon#read 4, iclass 18, count 0 2006.229.13:17:36.82#ibcon#about to read 5, iclass 18, count 0 2006.229.13:17:36.82#ibcon#read 5, iclass 18, count 0 2006.229.13:17:36.82#ibcon#about to read 6, iclass 18, count 0 2006.229.13:17:36.82#ibcon#read 6, iclass 18, count 0 2006.229.13:17:36.82#ibcon#end of sib2, iclass 18, count 0 2006.229.13:17:36.82#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:17:36.82#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:17:36.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:17:36.82#ibcon#*before write, iclass 18, count 0 2006.229.13:17:36.82#ibcon#enter sib2, iclass 18, count 0 2006.229.13:17:36.82#ibcon#flushed, iclass 18, count 0 2006.229.13:17:36.82#ibcon#about to write, iclass 18, count 0 2006.229.13:17:36.82#ibcon#wrote, iclass 18, count 0 2006.229.13:17:36.82#ibcon#about to read 3, iclass 18, count 0 2006.229.13:17:36.86#ibcon#read 3, iclass 18, count 0 2006.229.13:17:36.86#ibcon#about to read 4, iclass 18, count 0 2006.229.13:17:36.86#ibcon#read 4, iclass 18, count 0 2006.229.13:17:36.86#ibcon#about to read 5, iclass 18, count 0 2006.229.13:17:36.86#ibcon#read 5, iclass 18, count 0 2006.229.13:17:36.86#ibcon#about to read 6, iclass 18, count 0 2006.229.13:17:36.86#ibcon#read 6, iclass 18, count 0 2006.229.13:17:36.86#ibcon#end of sib2, iclass 18, count 0 2006.229.13:17:36.86#ibcon#*after write, iclass 18, count 0 2006.229.13:17:36.86#ibcon#*before return 0, iclass 18, count 0 2006.229.13:17:36.86#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:36.86#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:36.86#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:17:36.86#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:17:36.86$vck44/va=6,4 2006.229.13:17:36.86#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.13:17:36.86#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.13:17:36.86#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:36.86#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:36.92#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:36.92#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:36.92#ibcon#enter wrdev, iclass 20, count 2 2006.229.13:17:36.92#ibcon#first serial, iclass 20, count 2 2006.229.13:17:36.92#ibcon#enter sib2, iclass 20, count 2 2006.229.13:17:36.92#ibcon#flushed, iclass 20, count 2 2006.229.13:17:36.92#ibcon#about to write, iclass 20, count 2 2006.229.13:17:36.92#ibcon#wrote, iclass 20, count 2 2006.229.13:17:36.92#ibcon#about to read 3, iclass 20, count 2 2006.229.13:17:36.94#ibcon#read 3, iclass 20, count 2 2006.229.13:17:36.94#ibcon#about to read 4, iclass 20, count 2 2006.229.13:17:36.94#ibcon#read 4, iclass 20, count 2 2006.229.13:17:36.94#ibcon#about to read 5, iclass 20, count 2 2006.229.13:17:36.94#ibcon#read 5, iclass 20, count 2 2006.229.13:17:36.94#ibcon#about to read 6, iclass 20, count 2 2006.229.13:17:36.94#ibcon#read 6, iclass 20, count 2 2006.229.13:17:36.94#ibcon#end of sib2, iclass 20, count 2 2006.229.13:17:36.94#ibcon#*mode == 0, iclass 20, count 2 2006.229.13:17:36.94#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.13:17:36.94#ibcon#[25=AT06-04\r\n] 2006.229.13:17:36.94#ibcon#*before write, iclass 20, count 2 2006.229.13:17:36.94#ibcon#enter sib2, iclass 20, count 2 2006.229.13:17:36.94#ibcon#flushed, iclass 20, count 2 2006.229.13:17:36.94#ibcon#about to write, iclass 20, count 2 2006.229.13:17:36.94#ibcon#wrote, iclass 20, count 2 2006.229.13:17:36.94#ibcon#about to read 3, iclass 20, count 2 2006.229.13:17:36.97#ibcon#read 3, iclass 20, count 2 2006.229.13:17:36.97#ibcon#about to read 4, iclass 20, count 2 2006.229.13:17:36.97#ibcon#read 4, iclass 20, count 2 2006.229.13:17:36.97#ibcon#about to read 5, iclass 20, count 2 2006.229.13:17:36.97#ibcon#read 5, iclass 20, count 2 2006.229.13:17:36.97#ibcon#about to read 6, iclass 20, count 2 2006.229.13:17:36.97#ibcon#read 6, iclass 20, count 2 2006.229.13:17:36.97#ibcon#end of sib2, iclass 20, count 2 2006.229.13:17:36.97#ibcon#*after write, iclass 20, count 2 2006.229.13:17:36.97#ibcon#*before return 0, iclass 20, count 2 2006.229.13:17:36.97#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:36.97#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:36.97#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.13:17:36.97#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:36.97#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:37.09#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:37.09#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:37.09#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:17:37.09#ibcon#first serial, iclass 20, count 0 2006.229.13:17:37.09#ibcon#enter sib2, iclass 20, count 0 2006.229.13:17:37.09#ibcon#flushed, iclass 20, count 0 2006.229.13:17:37.09#ibcon#about to write, iclass 20, count 0 2006.229.13:17:37.09#ibcon#wrote, iclass 20, count 0 2006.229.13:17:37.09#ibcon#about to read 3, iclass 20, count 0 2006.229.13:17:37.11#ibcon#read 3, iclass 20, count 0 2006.229.13:17:37.11#ibcon#about to read 4, iclass 20, count 0 2006.229.13:17:37.11#ibcon#read 4, iclass 20, count 0 2006.229.13:17:37.11#ibcon#about to read 5, iclass 20, count 0 2006.229.13:17:37.11#ibcon#read 5, iclass 20, count 0 2006.229.13:17:37.11#ibcon#about to read 6, iclass 20, count 0 2006.229.13:17:37.11#ibcon#read 6, iclass 20, count 0 2006.229.13:17:37.11#ibcon#end of sib2, iclass 20, count 0 2006.229.13:17:37.11#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:17:37.11#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:17:37.11#ibcon#[25=USB\r\n] 2006.229.13:17:37.11#ibcon#*before write, iclass 20, count 0 2006.229.13:17:37.11#ibcon#enter sib2, iclass 20, count 0 2006.229.13:17:37.11#ibcon#flushed, iclass 20, count 0 2006.229.13:17:37.11#ibcon#about to write, iclass 20, count 0 2006.229.13:17:37.11#ibcon#wrote, iclass 20, count 0 2006.229.13:17:37.11#ibcon#about to read 3, iclass 20, count 0 2006.229.13:17:37.14#ibcon#read 3, iclass 20, count 0 2006.229.13:17:37.14#ibcon#about to read 4, iclass 20, count 0 2006.229.13:17:37.14#ibcon#read 4, iclass 20, count 0 2006.229.13:17:37.14#ibcon#about to read 5, iclass 20, count 0 2006.229.13:17:37.14#ibcon#read 5, iclass 20, count 0 2006.229.13:17:37.14#ibcon#about to read 6, iclass 20, count 0 2006.229.13:17:37.14#ibcon#read 6, iclass 20, count 0 2006.229.13:17:37.14#ibcon#end of sib2, iclass 20, count 0 2006.229.13:17:37.14#ibcon#*after write, iclass 20, count 0 2006.229.13:17:37.14#ibcon#*before return 0, iclass 20, count 0 2006.229.13:17:37.14#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:37.14#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:37.14#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:17:37.14#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:17:37.14$vck44/valo=7,864.99 2006.229.13:17:37.14#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.13:17:37.14#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.13:17:37.14#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:37.14#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:37.14#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:37.14#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:37.14#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:17:37.14#ibcon#first serial, iclass 22, count 0 2006.229.13:17:37.14#ibcon#enter sib2, iclass 22, count 0 2006.229.13:17:37.14#ibcon#flushed, iclass 22, count 0 2006.229.13:17:37.14#ibcon#about to write, iclass 22, count 0 2006.229.13:17:37.14#ibcon#wrote, iclass 22, count 0 2006.229.13:17:37.14#ibcon#about to read 3, iclass 22, count 0 2006.229.13:17:37.16#ibcon#read 3, iclass 22, count 0 2006.229.13:17:37.16#ibcon#about to read 4, iclass 22, count 0 2006.229.13:17:37.16#ibcon#read 4, iclass 22, count 0 2006.229.13:17:37.16#ibcon#about to read 5, iclass 22, count 0 2006.229.13:17:37.16#ibcon#read 5, iclass 22, count 0 2006.229.13:17:37.16#ibcon#about to read 6, iclass 22, count 0 2006.229.13:17:37.16#ibcon#read 6, iclass 22, count 0 2006.229.13:17:37.16#ibcon#end of sib2, iclass 22, count 0 2006.229.13:17:37.16#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:17:37.16#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:17:37.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:17:37.16#ibcon#*before write, iclass 22, count 0 2006.229.13:17:37.16#ibcon#enter sib2, iclass 22, count 0 2006.229.13:17:37.16#ibcon#flushed, iclass 22, count 0 2006.229.13:17:37.16#ibcon#about to write, iclass 22, count 0 2006.229.13:17:37.16#ibcon#wrote, iclass 22, count 0 2006.229.13:17:37.16#ibcon#about to read 3, iclass 22, count 0 2006.229.13:17:37.20#ibcon#read 3, iclass 22, count 0 2006.229.13:17:37.20#ibcon#about to read 4, iclass 22, count 0 2006.229.13:17:37.20#ibcon#read 4, iclass 22, count 0 2006.229.13:17:37.20#ibcon#about to read 5, iclass 22, count 0 2006.229.13:17:37.20#ibcon#read 5, iclass 22, count 0 2006.229.13:17:37.20#ibcon#about to read 6, iclass 22, count 0 2006.229.13:17:37.20#ibcon#read 6, iclass 22, count 0 2006.229.13:17:37.20#ibcon#end of sib2, iclass 22, count 0 2006.229.13:17:37.20#ibcon#*after write, iclass 22, count 0 2006.229.13:17:37.20#ibcon#*before return 0, iclass 22, count 0 2006.229.13:17:37.20#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:37.20#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:37.20#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:17:37.20#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:17:37.20$vck44/va=7,5 2006.229.13:17:37.20#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.13:17:37.20#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.13:17:37.20#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:37.20#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:37.26#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:37.26#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:37.26#ibcon#enter wrdev, iclass 24, count 2 2006.229.13:17:37.26#ibcon#first serial, iclass 24, count 2 2006.229.13:17:37.26#ibcon#enter sib2, iclass 24, count 2 2006.229.13:17:37.26#ibcon#flushed, iclass 24, count 2 2006.229.13:17:37.26#ibcon#about to write, iclass 24, count 2 2006.229.13:17:37.26#ibcon#wrote, iclass 24, count 2 2006.229.13:17:37.26#ibcon#about to read 3, iclass 24, count 2 2006.229.13:17:37.28#ibcon#read 3, iclass 24, count 2 2006.229.13:17:37.28#ibcon#about to read 4, iclass 24, count 2 2006.229.13:17:37.28#ibcon#read 4, iclass 24, count 2 2006.229.13:17:37.28#ibcon#about to read 5, iclass 24, count 2 2006.229.13:17:37.28#ibcon#read 5, iclass 24, count 2 2006.229.13:17:37.28#ibcon#about to read 6, iclass 24, count 2 2006.229.13:17:37.28#ibcon#read 6, iclass 24, count 2 2006.229.13:17:37.28#ibcon#end of sib2, iclass 24, count 2 2006.229.13:17:37.28#ibcon#*mode == 0, iclass 24, count 2 2006.229.13:17:37.28#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.13:17:37.28#ibcon#[25=AT07-05\r\n] 2006.229.13:17:37.28#ibcon#*before write, iclass 24, count 2 2006.229.13:17:37.28#ibcon#enter sib2, iclass 24, count 2 2006.229.13:17:37.28#ibcon#flushed, iclass 24, count 2 2006.229.13:17:37.28#ibcon#about to write, iclass 24, count 2 2006.229.13:17:37.28#ibcon#wrote, iclass 24, count 2 2006.229.13:17:37.28#ibcon#about to read 3, iclass 24, count 2 2006.229.13:17:37.31#ibcon#read 3, iclass 24, count 2 2006.229.13:17:37.31#ibcon#about to read 4, iclass 24, count 2 2006.229.13:17:37.31#ibcon#read 4, iclass 24, count 2 2006.229.13:17:37.31#ibcon#about to read 5, iclass 24, count 2 2006.229.13:17:37.31#ibcon#read 5, iclass 24, count 2 2006.229.13:17:37.31#ibcon#about to read 6, iclass 24, count 2 2006.229.13:17:37.31#ibcon#read 6, iclass 24, count 2 2006.229.13:17:37.31#ibcon#end of sib2, iclass 24, count 2 2006.229.13:17:37.31#ibcon#*after write, iclass 24, count 2 2006.229.13:17:37.31#ibcon#*before return 0, iclass 24, count 2 2006.229.13:17:37.31#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:37.31#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:37.31#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.13:17:37.31#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:37.31#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:37.43#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:37.43#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:37.43#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:17:37.43#ibcon#first serial, iclass 24, count 0 2006.229.13:17:37.43#ibcon#enter sib2, iclass 24, count 0 2006.229.13:17:37.43#ibcon#flushed, iclass 24, count 0 2006.229.13:17:37.43#ibcon#about to write, iclass 24, count 0 2006.229.13:17:37.43#ibcon#wrote, iclass 24, count 0 2006.229.13:17:37.43#ibcon#about to read 3, iclass 24, count 0 2006.229.13:17:37.45#ibcon#read 3, iclass 24, count 0 2006.229.13:17:37.45#ibcon#about to read 4, iclass 24, count 0 2006.229.13:17:37.45#ibcon#read 4, iclass 24, count 0 2006.229.13:17:37.45#ibcon#about to read 5, iclass 24, count 0 2006.229.13:17:37.45#ibcon#read 5, iclass 24, count 0 2006.229.13:17:37.45#ibcon#about to read 6, iclass 24, count 0 2006.229.13:17:37.45#ibcon#read 6, iclass 24, count 0 2006.229.13:17:37.45#ibcon#end of sib2, iclass 24, count 0 2006.229.13:17:37.45#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:17:37.45#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:17:37.45#ibcon#[25=USB\r\n] 2006.229.13:17:37.45#ibcon#*before write, iclass 24, count 0 2006.229.13:17:37.45#ibcon#enter sib2, iclass 24, count 0 2006.229.13:17:37.45#ibcon#flushed, iclass 24, count 0 2006.229.13:17:37.45#ibcon#about to write, iclass 24, count 0 2006.229.13:17:37.45#ibcon#wrote, iclass 24, count 0 2006.229.13:17:37.45#ibcon#about to read 3, iclass 24, count 0 2006.229.13:17:37.48#ibcon#read 3, iclass 24, count 0 2006.229.13:17:37.48#ibcon#about to read 4, iclass 24, count 0 2006.229.13:17:37.48#ibcon#read 4, iclass 24, count 0 2006.229.13:17:37.48#ibcon#about to read 5, iclass 24, count 0 2006.229.13:17:37.48#ibcon#read 5, iclass 24, count 0 2006.229.13:17:37.48#ibcon#about to read 6, iclass 24, count 0 2006.229.13:17:37.48#ibcon#read 6, iclass 24, count 0 2006.229.13:17:37.48#ibcon#end of sib2, iclass 24, count 0 2006.229.13:17:37.48#ibcon#*after write, iclass 24, count 0 2006.229.13:17:37.48#ibcon#*before return 0, iclass 24, count 0 2006.229.13:17:37.48#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:37.48#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:37.48#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:17:37.48#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:17:37.48$vck44/valo=8,884.99 2006.229.13:17:37.48#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.13:17:37.48#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.13:17:37.48#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:37.48#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:17:37.48#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:17:37.48#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:17:37.48#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:17:37.48#ibcon#first serial, iclass 26, count 0 2006.229.13:17:37.48#ibcon#enter sib2, iclass 26, count 0 2006.229.13:17:37.48#ibcon#flushed, iclass 26, count 0 2006.229.13:17:37.48#ibcon#about to write, iclass 26, count 0 2006.229.13:17:37.48#ibcon#wrote, iclass 26, count 0 2006.229.13:17:37.48#ibcon#about to read 3, iclass 26, count 0 2006.229.13:17:37.50#ibcon#read 3, iclass 26, count 0 2006.229.13:17:37.50#ibcon#about to read 4, iclass 26, count 0 2006.229.13:17:37.50#ibcon#read 4, iclass 26, count 0 2006.229.13:17:37.50#ibcon#about to read 5, iclass 26, count 0 2006.229.13:17:37.50#ibcon#read 5, iclass 26, count 0 2006.229.13:17:37.50#ibcon#about to read 6, iclass 26, count 0 2006.229.13:17:37.50#ibcon#read 6, iclass 26, count 0 2006.229.13:17:37.50#ibcon#end of sib2, iclass 26, count 0 2006.229.13:17:37.50#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:17:37.50#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:17:37.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:17:37.50#ibcon#*before write, iclass 26, count 0 2006.229.13:17:37.50#ibcon#enter sib2, iclass 26, count 0 2006.229.13:17:37.50#ibcon#flushed, iclass 26, count 0 2006.229.13:17:37.50#ibcon#about to write, iclass 26, count 0 2006.229.13:17:37.50#ibcon#wrote, iclass 26, count 0 2006.229.13:17:37.50#ibcon#about to read 3, iclass 26, count 0 2006.229.13:17:37.54#ibcon#read 3, iclass 26, count 0 2006.229.13:17:37.54#ibcon#about to read 4, iclass 26, count 0 2006.229.13:17:37.54#ibcon#read 4, iclass 26, count 0 2006.229.13:17:37.54#ibcon#about to read 5, iclass 26, count 0 2006.229.13:17:37.54#ibcon#read 5, iclass 26, count 0 2006.229.13:17:37.54#ibcon#about to read 6, iclass 26, count 0 2006.229.13:17:37.54#ibcon#read 6, iclass 26, count 0 2006.229.13:17:37.54#ibcon#end of sib2, iclass 26, count 0 2006.229.13:17:37.54#ibcon#*after write, iclass 26, count 0 2006.229.13:17:37.54#ibcon#*before return 0, iclass 26, count 0 2006.229.13:17:37.54#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:17:37.54#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:17:37.54#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:17:37.54#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:17:37.54$vck44/va=8,6 2006.229.13:17:37.54#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.13:17:37.54#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.13:17:37.54#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:37.54#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:17:37.60#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:17:37.60#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:17:37.60#ibcon#enter wrdev, iclass 28, count 2 2006.229.13:17:37.60#ibcon#first serial, iclass 28, count 2 2006.229.13:17:37.60#ibcon#enter sib2, iclass 28, count 2 2006.229.13:17:37.60#ibcon#flushed, iclass 28, count 2 2006.229.13:17:37.60#ibcon#about to write, iclass 28, count 2 2006.229.13:17:37.60#ibcon#wrote, iclass 28, count 2 2006.229.13:17:37.60#ibcon#about to read 3, iclass 28, count 2 2006.229.13:17:37.62#ibcon#read 3, iclass 28, count 2 2006.229.13:17:37.62#ibcon#about to read 4, iclass 28, count 2 2006.229.13:17:37.62#ibcon#read 4, iclass 28, count 2 2006.229.13:17:37.62#ibcon#about to read 5, iclass 28, count 2 2006.229.13:17:37.62#ibcon#read 5, iclass 28, count 2 2006.229.13:17:37.62#ibcon#about to read 6, iclass 28, count 2 2006.229.13:17:37.62#ibcon#read 6, iclass 28, count 2 2006.229.13:17:37.62#ibcon#end of sib2, iclass 28, count 2 2006.229.13:17:37.62#ibcon#*mode == 0, iclass 28, count 2 2006.229.13:17:37.62#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.13:17:37.62#ibcon#[25=AT08-06\r\n] 2006.229.13:17:37.62#ibcon#*before write, iclass 28, count 2 2006.229.13:17:37.62#ibcon#enter sib2, iclass 28, count 2 2006.229.13:17:37.62#ibcon#flushed, iclass 28, count 2 2006.229.13:17:37.62#ibcon#about to write, iclass 28, count 2 2006.229.13:17:37.62#ibcon#wrote, iclass 28, count 2 2006.229.13:17:37.62#ibcon#about to read 3, iclass 28, count 2 2006.229.13:17:37.65#ibcon#read 3, iclass 28, count 2 2006.229.13:17:37.65#ibcon#about to read 4, iclass 28, count 2 2006.229.13:17:37.65#ibcon#read 4, iclass 28, count 2 2006.229.13:17:37.65#ibcon#about to read 5, iclass 28, count 2 2006.229.13:17:37.65#ibcon#read 5, iclass 28, count 2 2006.229.13:17:37.65#ibcon#about to read 6, iclass 28, count 2 2006.229.13:17:37.65#ibcon#read 6, iclass 28, count 2 2006.229.13:17:37.65#ibcon#end of sib2, iclass 28, count 2 2006.229.13:17:37.65#ibcon#*after write, iclass 28, count 2 2006.229.13:17:37.65#ibcon#*before return 0, iclass 28, count 2 2006.229.13:17:37.65#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:17:37.65#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:17:37.65#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.13:17:37.65#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:37.65#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:17:37.77#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:17:37.77#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:17:37.77#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:17:37.77#ibcon#first serial, iclass 28, count 0 2006.229.13:17:37.77#ibcon#enter sib2, iclass 28, count 0 2006.229.13:17:37.77#ibcon#flushed, iclass 28, count 0 2006.229.13:17:37.77#ibcon#about to write, iclass 28, count 0 2006.229.13:17:37.77#ibcon#wrote, iclass 28, count 0 2006.229.13:17:37.77#ibcon#about to read 3, iclass 28, count 0 2006.229.13:17:37.79#ibcon#read 3, iclass 28, count 0 2006.229.13:17:37.79#ibcon#about to read 4, iclass 28, count 0 2006.229.13:17:37.79#ibcon#read 4, iclass 28, count 0 2006.229.13:17:37.79#ibcon#about to read 5, iclass 28, count 0 2006.229.13:17:37.79#ibcon#read 5, iclass 28, count 0 2006.229.13:17:37.79#ibcon#about to read 6, iclass 28, count 0 2006.229.13:17:37.79#ibcon#read 6, iclass 28, count 0 2006.229.13:17:37.79#ibcon#end of sib2, iclass 28, count 0 2006.229.13:17:37.79#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:17:37.79#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:17:37.79#ibcon#[25=USB\r\n] 2006.229.13:17:37.79#ibcon#*before write, iclass 28, count 0 2006.229.13:17:37.79#ibcon#enter sib2, iclass 28, count 0 2006.229.13:17:37.79#ibcon#flushed, iclass 28, count 0 2006.229.13:17:37.79#ibcon#about to write, iclass 28, count 0 2006.229.13:17:37.79#ibcon#wrote, iclass 28, count 0 2006.229.13:17:37.79#ibcon#about to read 3, iclass 28, count 0 2006.229.13:17:37.82#ibcon#read 3, iclass 28, count 0 2006.229.13:17:37.82#ibcon#about to read 4, iclass 28, count 0 2006.229.13:17:37.82#ibcon#read 4, iclass 28, count 0 2006.229.13:17:37.82#ibcon#about to read 5, iclass 28, count 0 2006.229.13:17:37.82#ibcon#read 5, iclass 28, count 0 2006.229.13:17:37.82#ibcon#about to read 6, iclass 28, count 0 2006.229.13:17:37.82#ibcon#read 6, iclass 28, count 0 2006.229.13:17:37.82#ibcon#end of sib2, iclass 28, count 0 2006.229.13:17:37.82#ibcon#*after write, iclass 28, count 0 2006.229.13:17:37.82#ibcon#*before return 0, iclass 28, count 0 2006.229.13:17:37.82#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:17:37.82#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:17:37.82#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:17:37.82#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:17:37.82$vck44/vblo=1,629.99 2006.229.13:17:37.82#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.13:17:37.82#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.13:17:37.82#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:37.82#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:17:37.82#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:17:37.82#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:17:37.82#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:17:37.82#ibcon#first serial, iclass 30, count 0 2006.229.13:17:37.82#ibcon#enter sib2, iclass 30, count 0 2006.229.13:17:37.82#ibcon#flushed, iclass 30, count 0 2006.229.13:17:37.82#ibcon#about to write, iclass 30, count 0 2006.229.13:17:37.82#ibcon#wrote, iclass 30, count 0 2006.229.13:17:37.82#ibcon#about to read 3, iclass 30, count 0 2006.229.13:17:37.84#ibcon#read 3, iclass 30, count 0 2006.229.13:17:37.84#ibcon#about to read 4, iclass 30, count 0 2006.229.13:17:37.84#ibcon#read 4, iclass 30, count 0 2006.229.13:17:37.84#ibcon#about to read 5, iclass 30, count 0 2006.229.13:17:37.84#ibcon#read 5, iclass 30, count 0 2006.229.13:17:37.84#ibcon#about to read 6, iclass 30, count 0 2006.229.13:17:37.84#ibcon#read 6, iclass 30, count 0 2006.229.13:17:37.84#ibcon#end of sib2, iclass 30, count 0 2006.229.13:17:37.84#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:17:37.84#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:17:37.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:17:37.84#ibcon#*before write, iclass 30, count 0 2006.229.13:17:37.84#ibcon#enter sib2, iclass 30, count 0 2006.229.13:17:37.84#ibcon#flushed, iclass 30, count 0 2006.229.13:17:37.84#ibcon#about to write, iclass 30, count 0 2006.229.13:17:37.84#ibcon#wrote, iclass 30, count 0 2006.229.13:17:37.84#ibcon#about to read 3, iclass 30, count 0 2006.229.13:17:37.88#ibcon#read 3, iclass 30, count 0 2006.229.13:17:37.88#ibcon#about to read 4, iclass 30, count 0 2006.229.13:17:37.88#ibcon#read 4, iclass 30, count 0 2006.229.13:17:37.88#ibcon#about to read 5, iclass 30, count 0 2006.229.13:17:37.88#ibcon#read 5, iclass 30, count 0 2006.229.13:17:37.88#ibcon#about to read 6, iclass 30, count 0 2006.229.13:17:37.88#ibcon#read 6, iclass 30, count 0 2006.229.13:17:37.88#ibcon#end of sib2, iclass 30, count 0 2006.229.13:17:37.88#ibcon#*after write, iclass 30, count 0 2006.229.13:17:37.88#ibcon#*before return 0, iclass 30, count 0 2006.229.13:17:37.88#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:17:37.88#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:17:37.88#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:17:37.88#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:17:37.88$vck44/vb=1,4 2006.229.13:17:37.88#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.13:17:37.88#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.13:17:37.88#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:37.88#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:17:37.88#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:17:37.88#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:17:37.88#ibcon#enter wrdev, iclass 32, count 2 2006.229.13:17:37.88#ibcon#first serial, iclass 32, count 2 2006.229.13:17:37.88#ibcon#enter sib2, iclass 32, count 2 2006.229.13:17:37.88#ibcon#flushed, iclass 32, count 2 2006.229.13:17:37.88#ibcon#about to write, iclass 32, count 2 2006.229.13:17:37.88#ibcon#wrote, iclass 32, count 2 2006.229.13:17:37.88#ibcon#about to read 3, iclass 32, count 2 2006.229.13:17:37.90#ibcon#read 3, iclass 32, count 2 2006.229.13:17:37.90#ibcon#about to read 4, iclass 32, count 2 2006.229.13:17:37.90#ibcon#read 4, iclass 32, count 2 2006.229.13:17:37.90#ibcon#about to read 5, iclass 32, count 2 2006.229.13:17:37.90#ibcon#read 5, iclass 32, count 2 2006.229.13:17:37.90#ibcon#about to read 6, iclass 32, count 2 2006.229.13:17:37.90#ibcon#read 6, iclass 32, count 2 2006.229.13:17:37.90#ibcon#end of sib2, iclass 32, count 2 2006.229.13:17:37.90#ibcon#*mode == 0, iclass 32, count 2 2006.229.13:17:37.90#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.13:17:37.90#ibcon#[27=AT01-04\r\n] 2006.229.13:17:37.90#ibcon#*before write, iclass 32, count 2 2006.229.13:17:37.90#ibcon#enter sib2, iclass 32, count 2 2006.229.13:17:37.90#ibcon#flushed, iclass 32, count 2 2006.229.13:17:37.90#ibcon#about to write, iclass 32, count 2 2006.229.13:17:37.90#ibcon#wrote, iclass 32, count 2 2006.229.13:17:37.90#ibcon#about to read 3, iclass 32, count 2 2006.229.13:17:37.93#ibcon#read 3, iclass 32, count 2 2006.229.13:17:37.93#ibcon#about to read 4, iclass 32, count 2 2006.229.13:17:37.93#ibcon#read 4, iclass 32, count 2 2006.229.13:17:37.93#ibcon#about to read 5, iclass 32, count 2 2006.229.13:17:37.93#ibcon#read 5, iclass 32, count 2 2006.229.13:17:37.93#ibcon#about to read 6, iclass 32, count 2 2006.229.13:17:37.93#ibcon#read 6, iclass 32, count 2 2006.229.13:17:37.93#ibcon#end of sib2, iclass 32, count 2 2006.229.13:17:37.93#ibcon#*after write, iclass 32, count 2 2006.229.13:17:37.93#ibcon#*before return 0, iclass 32, count 2 2006.229.13:17:37.93#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:17:37.93#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:17:37.93#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.13:17:37.93#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:37.93#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:17:38.05#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:17:38.05#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:17:38.05#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:17:38.05#ibcon#first serial, iclass 32, count 0 2006.229.13:17:38.05#ibcon#enter sib2, iclass 32, count 0 2006.229.13:17:38.05#ibcon#flushed, iclass 32, count 0 2006.229.13:17:38.05#ibcon#about to write, iclass 32, count 0 2006.229.13:17:38.05#ibcon#wrote, iclass 32, count 0 2006.229.13:17:38.05#ibcon#about to read 3, iclass 32, count 0 2006.229.13:17:38.07#ibcon#read 3, iclass 32, count 0 2006.229.13:17:38.07#ibcon#about to read 4, iclass 32, count 0 2006.229.13:17:38.07#ibcon#read 4, iclass 32, count 0 2006.229.13:17:38.07#ibcon#about to read 5, iclass 32, count 0 2006.229.13:17:38.07#ibcon#read 5, iclass 32, count 0 2006.229.13:17:38.07#ibcon#about to read 6, iclass 32, count 0 2006.229.13:17:38.07#ibcon#read 6, iclass 32, count 0 2006.229.13:17:38.07#ibcon#end of sib2, iclass 32, count 0 2006.229.13:17:38.07#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:17:38.07#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:17:38.07#ibcon#[27=USB\r\n] 2006.229.13:17:38.07#ibcon#*before write, iclass 32, count 0 2006.229.13:17:38.07#ibcon#enter sib2, iclass 32, count 0 2006.229.13:17:38.07#ibcon#flushed, iclass 32, count 0 2006.229.13:17:38.07#ibcon#about to write, iclass 32, count 0 2006.229.13:17:38.07#ibcon#wrote, iclass 32, count 0 2006.229.13:17:38.07#ibcon#about to read 3, iclass 32, count 0 2006.229.13:17:38.10#ibcon#read 3, iclass 32, count 0 2006.229.13:17:38.10#ibcon#about to read 4, iclass 32, count 0 2006.229.13:17:38.10#ibcon#read 4, iclass 32, count 0 2006.229.13:17:38.10#ibcon#about to read 5, iclass 32, count 0 2006.229.13:17:38.10#ibcon#read 5, iclass 32, count 0 2006.229.13:17:38.10#ibcon#about to read 6, iclass 32, count 0 2006.229.13:17:38.10#ibcon#read 6, iclass 32, count 0 2006.229.13:17:38.10#ibcon#end of sib2, iclass 32, count 0 2006.229.13:17:38.10#ibcon#*after write, iclass 32, count 0 2006.229.13:17:38.10#ibcon#*before return 0, iclass 32, count 0 2006.229.13:17:38.10#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:17:38.10#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:17:38.10#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:17:38.10#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:17:38.10$vck44/vblo=2,634.99 2006.229.13:17:38.10#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.13:17:38.10#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.13:17:38.10#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:38.10#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:38.10#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:38.10#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:38.10#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:17:38.10#ibcon#first serial, iclass 34, count 0 2006.229.13:17:38.10#ibcon#enter sib2, iclass 34, count 0 2006.229.13:17:38.10#ibcon#flushed, iclass 34, count 0 2006.229.13:17:38.10#ibcon#about to write, iclass 34, count 0 2006.229.13:17:38.10#ibcon#wrote, iclass 34, count 0 2006.229.13:17:38.10#ibcon#about to read 3, iclass 34, count 0 2006.229.13:17:38.12#ibcon#read 3, iclass 34, count 0 2006.229.13:17:38.12#ibcon#about to read 4, iclass 34, count 0 2006.229.13:17:38.12#ibcon#read 4, iclass 34, count 0 2006.229.13:17:38.12#ibcon#about to read 5, iclass 34, count 0 2006.229.13:17:38.12#ibcon#read 5, iclass 34, count 0 2006.229.13:17:38.12#ibcon#about to read 6, iclass 34, count 0 2006.229.13:17:38.12#ibcon#read 6, iclass 34, count 0 2006.229.13:17:38.12#ibcon#end of sib2, iclass 34, count 0 2006.229.13:17:38.12#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:17:38.12#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:17:38.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:17:38.12#ibcon#*before write, iclass 34, count 0 2006.229.13:17:38.12#ibcon#enter sib2, iclass 34, count 0 2006.229.13:17:38.12#ibcon#flushed, iclass 34, count 0 2006.229.13:17:38.12#ibcon#about to write, iclass 34, count 0 2006.229.13:17:38.12#ibcon#wrote, iclass 34, count 0 2006.229.13:17:38.12#ibcon#about to read 3, iclass 34, count 0 2006.229.13:17:38.16#ibcon#read 3, iclass 34, count 0 2006.229.13:17:38.16#ibcon#about to read 4, iclass 34, count 0 2006.229.13:17:38.16#ibcon#read 4, iclass 34, count 0 2006.229.13:17:38.16#ibcon#about to read 5, iclass 34, count 0 2006.229.13:17:38.16#ibcon#read 5, iclass 34, count 0 2006.229.13:17:38.16#ibcon#about to read 6, iclass 34, count 0 2006.229.13:17:38.16#ibcon#read 6, iclass 34, count 0 2006.229.13:17:38.16#ibcon#end of sib2, iclass 34, count 0 2006.229.13:17:38.16#ibcon#*after write, iclass 34, count 0 2006.229.13:17:38.16#ibcon#*before return 0, iclass 34, count 0 2006.229.13:17:38.16#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:38.16#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:17:38.16#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:17:38.16#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:17:38.16$vck44/vb=2,4 2006.229.13:17:38.16#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.13:17:38.16#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.13:17:38.16#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:38.16#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:38.22#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:38.22#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:38.22#ibcon#enter wrdev, iclass 36, count 2 2006.229.13:17:38.22#ibcon#first serial, iclass 36, count 2 2006.229.13:17:38.22#ibcon#enter sib2, iclass 36, count 2 2006.229.13:17:38.22#ibcon#flushed, iclass 36, count 2 2006.229.13:17:38.22#ibcon#about to write, iclass 36, count 2 2006.229.13:17:38.22#ibcon#wrote, iclass 36, count 2 2006.229.13:17:38.22#ibcon#about to read 3, iclass 36, count 2 2006.229.13:17:38.24#ibcon#read 3, iclass 36, count 2 2006.229.13:17:38.24#ibcon#about to read 4, iclass 36, count 2 2006.229.13:17:38.24#ibcon#read 4, iclass 36, count 2 2006.229.13:17:38.24#ibcon#about to read 5, iclass 36, count 2 2006.229.13:17:38.24#ibcon#read 5, iclass 36, count 2 2006.229.13:17:38.24#ibcon#about to read 6, iclass 36, count 2 2006.229.13:17:38.24#ibcon#read 6, iclass 36, count 2 2006.229.13:17:38.24#ibcon#end of sib2, iclass 36, count 2 2006.229.13:17:38.24#ibcon#*mode == 0, iclass 36, count 2 2006.229.13:17:38.24#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.13:17:38.24#ibcon#[27=AT02-04\r\n] 2006.229.13:17:38.24#ibcon#*before write, iclass 36, count 2 2006.229.13:17:38.24#ibcon#enter sib2, iclass 36, count 2 2006.229.13:17:38.24#ibcon#flushed, iclass 36, count 2 2006.229.13:17:38.24#ibcon#about to write, iclass 36, count 2 2006.229.13:17:38.24#ibcon#wrote, iclass 36, count 2 2006.229.13:17:38.24#ibcon#about to read 3, iclass 36, count 2 2006.229.13:17:38.27#ibcon#read 3, iclass 36, count 2 2006.229.13:17:38.27#ibcon#about to read 4, iclass 36, count 2 2006.229.13:17:38.27#ibcon#read 4, iclass 36, count 2 2006.229.13:17:38.27#ibcon#about to read 5, iclass 36, count 2 2006.229.13:17:38.27#ibcon#read 5, iclass 36, count 2 2006.229.13:17:38.27#ibcon#about to read 6, iclass 36, count 2 2006.229.13:17:38.27#ibcon#read 6, iclass 36, count 2 2006.229.13:17:38.27#ibcon#end of sib2, iclass 36, count 2 2006.229.13:17:38.27#ibcon#*after write, iclass 36, count 2 2006.229.13:17:38.27#ibcon#*before return 0, iclass 36, count 2 2006.229.13:17:38.27#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:38.27#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:17:38.27#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.13:17:38.27#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:38.27#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:38.39#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:38.39#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:38.39#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:17:38.39#ibcon#first serial, iclass 36, count 0 2006.229.13:17:38.39#ibcon#enter sib2, iclass 36, count 0 2006.229.13:17:38.39#ibcon#flushed, iclass 36, count 0 2006.229.13:17:38.39#ibcon#about to write, iclass 36, count 0 2006.229.13:17:38.39#ibcon#wrote, iclass 36, count 0 2006.229.13:17:38.39#ibcon#about to read 3, iclass 36, count 0 2006.229.13:17:38.41#ibcon#read 3, iclass 36, count 0 2006.229.13:17:38.41#ibcon#about to read 4, iclass 36, count 0 2006.229.13:17:38.41#ibcon#read 4, iclass 36, count 0 2006.229.13:17:38.41#ibcon#about to read 5, iclass 36, count 0 2006.229.13:17:38.41#ibcon#read 5, iclass 36, count 0 2006.229.13:17:38.41#ibcon#about to read 6, iclass 36, count 0 2006.229.13:17:38.41#ibcon#read 6, iclass 36, count 0 2006.229.13:17:38.41#ibcon#end of sib2, iclass 36, count 0 2006.229.13:17:38.41#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:17:38.41#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:17:38.41#ibcon#[27=USB\r\n] 2006.229.13:17:38.41#ibcon#*before write, iclass 36, count 0 2006.229.13:17:38.41#ibcon#enter sib2, iclass 36, count 0 2006.229.13:17:38.41#ibcon#flushed, iclass 36, count 0 2006.229.13:17:38.41#ibcon#about to write, iclass 36, count 0 2006.229.13:17:38.41#ibcon#wrote, iclass 36, count 0 2006.229.13:17:38.41#ibcon#about to read 3, iclass 36, count 0 2006.229.13:17:38.44#ibcon#read 3, iclass 36, count 0 2006.229.13:17:38.44#ibcon#about to read 4, iclass 36, count 0 2006.229.13:17:38.44#ibcon#read 4, iclass 36, count 0 2006.229.13:17:38.44#ibcon#about to read 5, iclass 36, count 0 2006.229.13:17:38.44#ibcon#read 5, iclass 36, count 0 2006.229.13:17:38.44#ibcon#about to read 6, iclass 36, count 0 2006.229.13:17:38.44#ibcon#read 6, iclass 36, count 0 2006.229.13:17:38.44#ibcon#end of sib2, iclass 36, count 0 2006.229.13:17:38.44#ibcon#*after write, iclass 36, count 0 2006.229.13:17:38.44#ibcon#*before return 0, iclass 36, count 0 2006.229.13:17:38.44#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:38.44#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:17:38.44#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:17:38.44#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:17:38.44$vck44/vblo=3,649.99 2006.229.13:17:38.44#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.13:17:38.44#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.13:17:38.44#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:38.44#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:38.44#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:38.44#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:38.44#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:17:38.44#ibcon#first serial, iclass 38, count 0 2006.229.13:17:38.44#ibcon#enter sib2, iclass 38, count 0 2006.229.13:17:38.44#ibcon#flushed, iclass 38, count 0 2006.229.13:17:38.44#ibcon#about to write, iclass 38, count 0 2006.229.13:17:38.44#ibcon#wrote, iclass 38, count 0 2006.229.13:17:38.44#ibcon#about to read 3, iclass 38, count 0 2006.229.13:17:38.46#ibcon#read 3, iclass 38, count 0 2006.229.13:17:38.46#ibcon#about to read 4, iclass 38, count 0 2006.229.13:17:38.46#ibcon#read 4, iclass 38, count 0 2006.229.13:17:38.46#ibcon#about to read 5, iclass 38, count 0 2006.229.13:17:38.46#ibcon#read 5, iclass 38, count 0 2006.229.13:17:38.46#ibcon#about to read 6, iclass 38, count 0 2006.229.13:17:38.46#ibcon#read 6, iclass 38, count 0 2006.229.13:17:38.46#ibcon#end of sib2, iclass 38, count 0 2006.229.13:17:38.46#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:17:38.46#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:17:38.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:17:38.46#ibcon#*before write, iclass 38, count 0 2006.229.13:17:38.46#ibcon#enter sib2, iclass 38, count 0 2006.229.13:17:38.46#ibcon#flushed, iclass 38, count 0 2006.229.13:17:38.46#ibcon#about to write, iclass 38, count 0 2006.229.13:17:38.46#ibcon#wrote, iclass 38, count 0 2006.229.13:17:38.46#ibcon#about to read 3, iclass 38, count 0 2006.229.13:17:38.50#ibcon#read 3, iclass 38, count 0 2006.229.13:17:38.50#ibcon#about to read 4, iclass 38, count 0 2006.229.13:17:38.50#ibcon#read 4, iclass 38, count 0 2006.229.13:17:38.50#ibcon#about to read 5, iclass 38, count 0 2006.229.13:17:38.50#ibcon#read 5, iclass 38, count 0 2006.229.13:17:38.50#ibcon#about to read 6, iclass 38, count 0 2006.229.13:17:38.50#ibcon#read 6, iclass 38, count 0 2006.229.13:17:38.50#ibcon#end of sib2, iclass 38, count 0 2006.229.13:17:38.50#ibcon#*after write, iclass 38, count 0 2006.229.13:17:38.50#ibcon#*before return 0, iclass 38, count 0 2006.229.13:17:38.50#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:38.50#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:17:38.50#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:17:38.50#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:17:38.50$vck44/vb=3,4 2006.229.13:17:38.50#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.13:17:38.50#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.13:17:38.50#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:38.50#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:38.56#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:38.56#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:38.56#ibcon#enter wrdev, iclass 40, count 2 2006.229.13:17:38.56#ibcon#first serial, iclass 40, count 2 2006.229.13:17:38.56#ibcon#enter sib2, iclass 40, count 2 2006.229.13:17:38.56#ibcon#flushed, iclass 40, count 2 2006.229.13:17:38.56#ibcon#about to write, iclass 40, count 2 2006.229.13:17:38.56#ibcon#wrote, iclass 40, count 2 2006.229.13:17:38.56#ibcon#about to read 3, iclass 40, count 2 2006.229.13:17:38.58#ibcon#read 3, iclass 40, count 2 2006.229.13:17:38.58#ibcon#about to read 4, iclass 40, count 2 2006.229.13:17:38.58#ibcon#read 4, iclass 40, count 2 2006.229.13:17:38.58#ibcon#about to read 5, iclass 40, count 2 2006.229.13:17:38.58#ibcon#read 5, iclass 40, count 2 2006.229.13:17:38.58#ibcon#about to read 6, iclass 40, count 2 2006.229.13:17:38.58#ibcon#read 6, iclass 40, count 2 2006.229.13:17:38.58#ibcon#end of sib2, iclass 40, count 2 2006.229.13:17:38.58#ibcon#*mode == 0, iclass 40, count 2 2006.229.13:17:38.58#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.13:17:38.58#ibcon#[27=AT03-04\r\n] 2006.229.13:17:38.58#ibcon#*before write, iclass 40, count 2 2006.229.13:17:38.58#ibcon#enter sib2, iclass 40, count 2 2006.229.13:17:38.58#ibcon#flushed, iclass 40, count 2 2006.229.13:17:38.58#ibcon#about to write, iclass 40, count 2 2006.229.13:17:38.58#ibcon#wrote, iclass 40, count 2 2006.229.13:17:38.58#ibcon#about to read 3, iclass 40, count 2 2006.229.13:17:38.61#ibcon#read 3, iclass 40, count 2 2006.229.13:17:38.61#ibcon#about to read 4, iclass 40, count 2 2006.229.13:17:38.61#ibcon#read 4, iclass 40, count 2 2006.229.13:17:38.61#ibcon#about to read 5, iclass 40, count 2 2006.229.13:17:38.61#ibcon#read 5, iclass 40, count 2 2006.229.13:17:38.61#ibcon#about to read 6, iclass 40, count 2 2006.229.13:17:38.61#ibcon#read 6, iclass 40, count 2 2006.229.13:17:38.61#ibcon#end of sib2, iclass 40, count 2 2006.229.13:17:38.61#ibcon#*after write, iclass 40, count 2 2006.229.13:17:38.61#ibcon#*before return 0, iclass 40, count 2 2006.229.13:17:38.61#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:38.61#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:17:38.61#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.13:17:38.61#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:38.61#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:38.73#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:38.73#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:38.73#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:17:38.73#ibcon#first serial, iclass 40, count 0 2006.229.13:17:38.73#ibcon#enter sib2, iclass 40, count 0 2006.229.13:17:38.73#ibcon#flushed, iclass 40, count 0 2006.229.13:17:38.73#ibcon#about to write, iclass 40, count 0 2006.229.13:17:38.73#ibcon#wrote, iclass 40, count 0 2006.229.13:17:38.73#ibcon#about to read 3, iclass 40, count 0 2006.229.13:17:38.75#ibcon#read 3, iclass 40, count 0 2006.229.13:17:38.75#ibcon#about to read 4, iclass 40, count 0 2006.229.13:17:38.75#ibcon#read 4, iclass 40, count 0 2006.229.13:17:38.75#ibcon#about to read 5, iclass 40, count 0 2006.229.13:17:38.75#ibcon#read 5, iclass 40, count 0 2006.229.13:17:38.75#ibcon#about to read 6, iclass 40, count 0 2006.229.13:17:38.75#ibcon#read 6, iclass 40, count 0 2006.229.13:17:38.75#ibcon#end of sib2, iclass 40, count 0 2006.229.13:17:38.75#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:17:38.75#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:17:38.75#ibcon#[27=USB\r\n] 2006.229.13:17:38.75#ibcon#*before write, iclass 40, count 0 2006.229.13:17:38.75#ibcon#enter sib2, iclass 40, count 0 2006.229.13:17:38.75#ibcon#flushed, iclass 40, count 0 2006.229.13:17:38.75#ibcon#about to write, iclass 40, count 0 2006.229.13:17:38.75#ibcon#wrote, iclass 40, count 0 2006.229.13:17:38.75#ibcon#about to read 3, iclass 40, count 0 2006.229.13:17:38.78#ibcon#read 3, iclass 40, count 0 2006.229.13:17:38.78#ibcon#about to read 4, iclass 40, count 0 2006.229.13:17:38.78#ibcon#read 4, iclass 40, count 0 2006.229.13:17:38.78#ibcon#about to read 5, iclass 40, count 0 2006.229.13:17:38.78#ibcon#read 5, iclass 40, count 0 2006.229.13:17:38.78#ibcon#about to read 6, iclass 40, count 0 2006.229.13:17:38.78#ibcon#read 6, iclass 40, count 0 2006.229.13:17:38.78#ibcon#end of sib2, iclass 40, count 0 2006.229.13:17:38.78#ibcon#*after write, iclass 40, count 0 2006.229.13:17:38.78#ibcon#*before return 0, iclass 40, count 0 2006.229.13:17:38.78#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:38.78#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:17:38.78#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:17:38.78#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:17:38.78$vck44/vblo=4,679.99 2006.229.13:17:38.78#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.13:17:38.78#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.13:17:38.78#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:38.78#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:38.78#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:38.78#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:38.78#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:17:38.78#ibcon#first serial, iclass 4, count 0 2006.229.13:17:38.78#ibcon#enter sib2, iclass 4, count 0 2006.229.13:17:38.78#ibcon#flushed, iclass 4, count 0 2006.229.13:17:38.78#ibcon#about to write, iclass 4, count 0 2006.229.13:17:38.78#ibcon#wrote, iclass 4, count 0 2006.229.13:17:38.78#ibcon#about to read 3, iclass 4, count 0 2006.229.13:17:38.80#ibcon#read 3, iclass 4, count 0 2006.229.13:17:38.80#ibcon#about to read 4, iclass 4, count 0 2006.229.13:17:38.80#ibcon#read 4, iclass 4, count 0 2006.229.13:17:38.80#ibcon#about to read 5, iclass 4, count 0 2006.229.13:17:38.80#ibcon#read 5, iclass 4, count 0 2006.229.13:17:38.80#ibcon#about to read 6, iclass 4, count 0 2006.229.13:17:38.80#ibcon#read 6, iclass 4, count 0 2006.229.13:17:38.80#ibcon#end of sib2, iclass 4, count 0 2006.229.13:17:38.80#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:17:38.80#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:17:38.80#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:17:38.80#ibcon#*before write, iclass 4, count 0 2006.229.13:17:38.80#ibcon#enter sib2, iclass 4, count 0 2006.229.13:17:38.80#ibcon#flushed, iclass 4, count 0 2006.229.13:17:38.80#ibcon#about to write, iclass 4, count 0 2006.229.13:17:38.80#ibcon#wrote, iclass 4, count 0 2006.229.13:17:38.80#ibcon#about to read 3, iclass 4, count 0 2006.229.13:17:38.84#ibcon#read 3, iclass 4, count 0 2006.229.13:17:38.84#ibcon#about to read 4, iclass 4, count 0 2006.229.13:17:38.84#ibcon#read 4, iclass 4, count 0 2006.229.13:17:38.84#ibcon#about to read 5, iclass 4, count 0 2006.229.13:17:38.84#ibcon#read 5, iclass 4, count 0 2006.229.13:17:38.84#ibcon#about to read 6, iclass 4, count 0 2006.229.13:17:38.84#ibcon#read 6, iclass 4, count 0 2006.229.13:17:38.84#ibcon#end of sib2, iclass 4, count 0 2006.229.13:17:38.84#ibcon#*after write, iclass 4, count 0 2006.229.13:17:38.84#ibcon#*before return 0, iclass 4, count 0 2006.229.13:17:38.84#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:38.84#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:17:38.84#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:17:38.84#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:17:38.84$vck44/vb=4,4 2006.229.13:17:38.84#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.13:17:38.84#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.13:17:38.84#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:38.84#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:38.90#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:38.90#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:38.90#ibcon#enter wrdev, iclass 6, count 2 2006.229.13:17:38.90#ibcon#first serial, iclass 6, count 2 2006.229.13:17:38.90#ibcon#enter sib2, iclass 6, count 2 2006.229.13:17:38.90#ibcon#flushed, iclass 6, count 2 2006.229.13:17:38.90#ibcon#about to write, iclass 6, count 2 2006.229.13:17:38.90#ibcon#wrote, iclass 6, count 2 2006.229.13:17:38.90#ibcon#about to read 3, iclass 6, count 2 2006.229.13:17:38.92#ibcon#read 3, iclass 6, count 2 2006.229.13:17:38.92#ibcon#about to read 4, iclass 6, count 2 2006.229.13:17:38.92#ibcon#read 4, iclass 6, count 2 2006.229.13:17:38.92#ibcon#about to read 5, iclass 6, count 2 2006.229.13:17:38.92#ibcon#read 5, iclass 6, count 2 2006.229.13:17:38.92#ibcon#about to read 6, iclass 6, count 2 2006.229.13:17:38.92#ibcon#read 6, iclass 6, count 2 2006.229.13:17:38.92#ibcon#end of sib2, iclass 6, count 2 2006.229.13:17:38.92#ibcon#*mode == 0, iclass 6, count 2 2006.229.13:17:38.92#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.13:17:38.92#ibcon#[27=AT04-04\r\n] 2006.229.13:17:38.92#ibcon#*before write, iclass 6, count 2 2006.229.13:17:38.92#ibcon#enter sib2, iclass 6, count 2 2006.229.13:17:38.92#ibcon#flushed, iclass 6, count 2 2006.229.13:17:38.92#ibcon#about to write, iclass 6, count 2 2006.229.13:17:38.92#ibcon#wrote, iclass 6, count 2 2006.229.13:17:38.92#ibcon#about to read 3, iclass 6, count 2 2006.229.13:17:38.95#ibcon#read 3, iclass 6, count 2 2006.229.13:17:38.95#ibcon#about to read 4, iclass 6, count 2 2006.229.13:17:38.95#ibcon#read 4, iclass 6, count 2 2006.229.13:17:38.95#ibcon#about to read 5, iclass 6, count 2 2006.229.13:17:38.95#ibcon#read 5, iclass 6, count 2 2006.229.13:17:38.95#ibcon#about to read 6, iclass 6, count 2 2006.229.13:17:38.95#ibcon#read 6, iclass 6, count 2 2006.229.13:17:38.95#ibcon#end of sib2, iclass 6, count 2 2006.229.13:17:38.95#ibcon#*after write, iclass 6, count 2 2006.229.13:17:38.95#ibcon#*before return 0, iclass 6, count 2 2006.229.13:17:38.95#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:38.95#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:17:38.95#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.13:17:38.95#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:38.95#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:39.07#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:39.07#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:39.07#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:17:39.07#ibcon#first serial, iclass 6, count 0 2006.229.13:17:39.07#ibcon#enter sib2, iclass 6, count 0 2006.229.13:17:39.07#ibcon#flushed, iclass 6, count 0 2006.229.13:17:39.07#ibcon#about to write, iclass 6, count 0 2006.229.13:17:39.07#ibcon#wrote, iclass 6, count 0 2006.229.13:17:39.07#ibcon#about to read 3, iclass 6, count 0 2006.229.13:17:39.09#ibcon#read 3, iclass 6, count 0 2006.229.13:17:39.09#ibcon#about to read 4, iclass 6, count 0 2006.229.13:17:39.09#ibcon#read 4, iclass 6, count 0 2006.229.13:17:39.09#ibcon#about to read 5, iclass 6, count 0 2006.229.13:17:39.09#ibcon#read 5, iclass 6, count 0 2006.229.13:17:39.09#ibcon#about to read 6, iclass 6, count 0 2006.229.13:17:39.09#ibcon#read 6, iclass 6, count 0 2006.229.13:17:39.09#ibcon#end of sib2, iclass 6, count 0 2006.229.13:17:39.09#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:17:39.09#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:17:39.09#ibcon#[27=USB\r\n] 2006.229.13:17:39.09#ibcon#*before write, iclass 6, count 0 2006.229.13:17:39.09#ibcon#enter sib2, iclass 6, count 0 2006.229.13:17:39.09#ibcon#flushed, iclass 6, count 0 2006.229.13:17:39.09#ibcon#about to write, iclass 6, count 0 2006.229.13:17:39.09#ibcon#wrote, iclass 6, count 0 2006.229.13:17:39.09#ibcon#about to read 3, iclass 6, count 0 2006.229.13:17:39.12#ibcon#read 3, iclass 6, count 0 2006.229.13:17:39.12#ibcon#about to read 4, iclass 6, count 0 2006.229.13:17:39.12#ibcon#read 4, iclass 6, count 0 2006.229.13:17:39.12#ibcon#about to read 5, iclass 6, count 0 2006.229.13:17:39.12#ibcon#read 5, iclass 6, count 0 2006.229.13:17:39.12#ibcon#about to read 6, iclass 6, count 0 2006.229.13:17:39.12#ibcon#read 6, iclass 6, count 0 2006.229.13:17:39.12#ibcon#end of sib2, iclass 6, count 0 2006.229.13:17:39.12#ibcon#*after write, iclass 6, count 0 2006.229.13:17:39.12#ibcon#*before return 0, iclass 6, count 0 2006.229.13:17:39.12#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:39.12#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:17:39.12#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:17:39.12#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:17:39.12$vck44/vblo=5,709.99 2006.229.13:17:39.12#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.13:17:39.12#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.13:17:39.12#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:39.12#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:39.12#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:39.12#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:39.12#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:17:39.12#ibcon#first serial, iclass 10, count 0 2006.229.13:17:39.12#ibcon#enter sib2, iclass 10, count 0 2006.229.13:17:39.12#ibcon#flushed, iclass 10, count 0 2006.229.13:17:39.12#ibcon#about to write, iclass 10, count 0 2006.229.13:17:39.12#ibcon#wrote, iclass 10, count 0 2006.229.13:17:39.12#ibcon#about to read 3, iclass 10, count 0 2006.229.13:17:39.14#ibcon#read 3, iclass 10, count 0 2006.229.13:17:39.14#ibcon#about to read 4, iclass 10, count 0 2006.229.13:17:39.14#ibcon#read 4, iclass 10, count 0 2006.229.13:17:39.14#ibcon#about to read 5, iclass 10, count 0 2006.229.13:17:39.14#ibcon#read 5, iclass 10, count 0 2006.229.13:17:39.14#ibcon#about to read 6, iclass 10, count 0 2006.229.13:17:39.14#ibcon#read 6, iclass 10, count 0 2006.229.13:17:39.14#ibcon#end of sib2, iclass 10, count 0 2006.229.13:17:39.14#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:17:39.14#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:17:39.14#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:17:39.14#ibcon#*before write, iclass 10, count 0 2006.229.13:17:39.14#ibcon#enter sib2, iclass 10, count 0 2006.229.13:17:39.14#ibcon#flushed, iclass 10, count 0 2006.229.13:17:39.14#ibcon#about to write, iclass 10, count 0 2006.229.13:17:39.14#ibcon#wrote, iclass 10, count 0 2006.229.13:17:39.14#ibcon#about to read 3, iclass 10, count 0 2006.229.13:17:39.18#ibcon#read 3, iclass 10, count 0 2006.229.13:17:39.18#ibcon#about to read 4, iclass 10, count 0 2006.229.13:17:39.18#ibcon#read 4, iclass 10, count 0 2006.229.13:17:39.18#ibcon#about to read 5, iclass 10, count 0 2006.229.13:17:39.18#ibcon#read 5, iclass 10, count 0 2006.229.13:17:39.18#ibcon#about to read 6, iclass 10, count 0 2006.229.13:17:39.18#ibcon#read 6, iclass 10, count 0 2006.229.13:17:39.18#ibcon#end of sib2, iclass 10, count 0 2006.229.13:17:39.18#ibcon#*after write, iclass 10, count 0 2006.229.13:17:39.18#ibcon#*before return 0, iclass 10, count 0 2006.229.13:17:39.18#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:39.18#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:17:39.18#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:17:39.18#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:17:39.18$vck44/vb=5,4 2006.229.13:17:39.18#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.13:17:39.18#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.13:17:39.18#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:39.18#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:39.24#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:39.24#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:39.24#ibcon#enter wrdev, iclass 12, count 2 2006.229.13:17:39.24#ibcon#first serial, iclass 12, count 2 2006.229.13:17:39.24#ibcon#enter sib2, iclass 12, count 2 2006.229.13:17:39.24#ibcon#flushed, iclass 12, count 2 2006.229.13:17:39.24#ibcon#about to write, iclass 12, count 2 2006.229.13:17:39.24#ibcon#wrote, iclass 12, count 2 2006.229.13:17:39.24#ibcon#about to read 3, iclass 12, count 2 2006.229.13:17:39.26#ibcon#read 3, iclass 12, count 2 2006.229.13:17:39.26#ibcon#about to read 4, iclass 12, count 2 2006.229.13:17:39.26#ibcon#read 4, iclass 12, count 2 2006.229.13:17:39.26#ibcon#about to read 5, iclass 12, count 2 2006.229.13:17:39.26#ibcon#read 5, iclass 12, count 2 2006.229.13:17:39.26#ibcon#about to read 6, iclass 12, count 2 2006.229.13:17:39.26#ibcon#read 6, iclass 12, count 2 2006.229.13:17:39.26#ibcon#end of sib2, iclass 12, count 2 2006.229.13:17:39.26#ibcon#*mode == 0, iclass 12, count 2 2006.229.13:17:39.26#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.13:17:39.26#ibcon#[27=AT05-04\r\n] 2006.229.13:17:39.26#ibcon#*before write, iclass 12, count 2 2006.229.13:17:39.26#ibcon#enter sib2, iclass 12, count 2 2006.229.13:17:39.26#ibcon#flushed, iclass 12, count 2 2006.229.13:17:39.26#ibcon#about to write, iclass 12, count 2 2006.229.13:17:39.26#ibcon#wrote, iclass 12, count 2 2006.229.13:17:39.26#ibcon#about to read 3, iclass 12, count 2 2006.229.13:17:39.29#ibcon#read 3, iclass 12, count 2 2006.229.13:17:39.29#ibcon#about to read 4, iclass 12, count 2 2006.229.13:17:39.29#ibcon#read 4, iclass 12, count 2 2006.229.13:17:39.29#ibcon#about to read 5, iclass 12, count 2 2006.229.13:17:39.29#ibcon#read 5, iclass 12, count 2 2006.229.13:17:39.29#ibcon#about to read 6, iclass 12, count 2 2006.229.13:17:39.29#ibcon#read 6, iclass 12, count 2 2006.229.13:17:39.29#ibcon#end of sib2, iclass 12, count 2 2006.229.13:17:39.29#ibcon#*after write, iclass 12, count 2 2006.229.13:17:39.29#ibcon#*before return 0, iclass 12, count 2 2006.229.13:17:39.29#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:39.29#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:17:39.29#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.13:17:39.29#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:39.29#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:39.41#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:39.41#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:39.41#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:17:39.41#ibcon#first serial, iclass 12, count 0 2006.229.13:17:39.41#ibcon#enter sib2, iclass 12, count 0 2006.229.13:17:39.41#ibcon#flushed, iclass 12, count 0 2006.229.13:17:39.41#ibcon#about to write, iclass 12, count 0 2006.229.13:17:39.41#ibcon#wrote, iclass 12, count 0 2006.229.13:17:39.41#ibcon#about to read 3, iclass 12, count 0 2006.229.13:17:39.43#ibcon#read 3, iclass 12, count 0 2006.229.13:17:39.43#ibcon#about to read 4, iclass 12, count 0 2006.229.13:17:39.43#ibcon#read 4, iclass 12, count 0 2006.229.13:17:39.43#ibcon#about to read 5, iclass 12, count 0 2006.229.13:17:39.43#ibcon#read 5, iclass 12, count 0 2006.229.13:17:39.43#ibcon#about to read 6, iclass 12, count 0 2006.229.13:17:39.43#ibcon#read 6, iclass 12, count 0 2006.229.13:17:39.43#ibcon#end of sib2, iclass 12, count 0 2006.229.13:17:39.43#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:17:39.43#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:17:39.43#ibcon#[27=USB\r\n] 2006.229.13:17:39.43#ibcon#*before write, iclass 12, count 0 2006.229.13:17:39.43#ibcon#enter sib2, iclass 12, count 0 2006.229.13:17:39.43#ibcon#flushed, iclass 12, count 0 2006.229.13:17:39.43#ibcon#about to write, iclass 12, count 0 2006.229.13:17:39.43#ibcon#wrote, iclass 12, count 0 2006.229.13:17:39.43#ibcon#about to read 3, iclass 12, count 0 2006.229.13:17:39.46#ibcon#read 3, iclass 12, count 0 2006.229.13:17:39.46#ibcon#about to read 4, iclass 12, count 0 2006.229.13:17:39.46#ibcon#read 4, iclass 12, count 0 2006.229.13:17:39.46#ibcon#about to read 5, iclass 12, count 0 2006.229.13:17:39.46#ibcon#read 5, iclass 12, count 0 2006.229.13:17:39.46#ibcon#about to read 6, iclass 12, count 0 2006.229.13:17:39.46#ibcon#read 6, iclass 12, count 0 2006.229.13:17:39.46#ibcon#end of sib2, iclass 12, count 0 2006.229.13:17:39.46#ibcon#*after write, iclass 12, count 0 2006.229.13:17:39.46#ibcon#*before return 0, iclass 12, count 0 2006.229.13:17:39.46#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:39.46#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:17:39.46#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:17:39.46#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:17:39.46$vck44/vblo=6,719.99 2006.229.13:17:39.46#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.13:17:39.46#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.13:17:39.46#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:39.46#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:39.46#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:39.46#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:39.46#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:17:39.46#ibcon#first serial, iclass 14, count 0 2006.229.13:17:39.46#ibcon#enter sib2, iclass 14, count 0 2006.229.13:17:39.46#ibcon#flushed, iclass 14, count 0 2006.229.13:17:39.46#ibcon#about to write, iclass 14, count 0 2006.229.13:17:39.46#ibcon#wrote, iclass 14, count 0 2006.229.13:17:39.46#ibcon#about to read 3, iclass 14, count 0 2006.229.13:17:39.48#ibcon#read 3, iclass 14, count 0 2006.229.13:17:39.48#ibcon#about to read 4, iclass 14, count 0 2006.229.13:17:39.48#ibcon#read 4, iclass 14, count 0 2006.229.13:17:39.48#ibcon#about to read 5, iclass 14, count 0 2006.229.13:17:39.48#ibcon#read 5, iclass 14, count 0 2006.229.13:17:39.48#ibcon#about to read 6, iclass 14, count 0 2006.229.13:17:39.48#ibcon#read 6, iclass 14, count 0 2006.229.13:17:39.48#ibcon#end of sib2, iclass 14, count 0 2006.229.13:17:39.48#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:17:39.48#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:17:39.48#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:17:39.48#ibcon#*before write, iclass 14, count 0 2006.229.13:17:39.48#ibcon#enter sib2, iclass 14, count 0 2006.229.13:17:39.48#ibcon#flushed, iclass 14, count 0 2006.229.13:17:39.48#ibcon#about to write, iclass 14, count 0 2006.229.13:17:39.48#ibcon#wrote, iclass 14, count 0 2006.229.13:17:39.48#ibcon#about to read 3, iclass 14, count 0 2006.229.13:17:39.52#ibcon#read 3, iclass 14, count 0 2006.229.13:17:39.52#ibcon#about to read 4, iclass 14, count 0 2006.229.13:17:39.52#ibcon#read 4, iclass 14, count 0 2006.229.13:17:39.52#ibcon#about to read 5, iclass 14, count 0 2006.229.13:17:39.52#ibcon#read 5, iclass 14, count 0 2006.229.13:17:39.52#ibcon#about to read 6, iclass 14, count 0 2006.229.13:17:39.52#ibcon#read 6, iclass 14, count 0 2006.229.13:17:39.52#ibcon#end of sib2, iclass 14, count 0 2006.229.13:17:39.52#ibcon#*after write, iclass 14, count 0 2006.229.13:17:39.52#ibcon#*before return 0, iclass 14, count 0 2006.229.13:17:39.52#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:39.52#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:17:39.52#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:17:39.52#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:17:39.52$vck44/vb=6,4 2006.229.13:17:39.52#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.13:17:39.52#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.13:17:39.52#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:39.52#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:39.58#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:39.58#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:39.58#ibcon#enter wrdev, iclass 16, count 2 2006.229.13:17:39.58#ibcon#first serial, iclass 16, count 2 2006.229.13:17:39.58#ibcon#enter sib2, iclass 16, count 2 2006.229.13:17:39.58#ibcon#flushed, iclass 16, count 2 2006.229.13:17:39.58#ibcon#about to write, iclass 16, count 2 2006.229.13:17:39.58#ibcon#wrote, iclass 16, count 2 2006.229.13:17:39.58#ibcon#about to read 3, iclass 16, count 2 2006.229.13:17:39.60#ibcon#read 3, iclass 16, count 2 2006.229.13:17:39.60#ibcon#about to read 4, iclass 16, count 2 2006.229.13:17:39.60#ibcon#read 4, iclass 16, count 2 2006.229.13:17:39.60#ibcon#about to read 5, iclass 16, count 2 2006.229.13:17:39.60#ibcon#read 5, iclass 16, count 2 2006.229.13:17:39.60#ibcon#about to read 6, iclass 16, count 2 2006.229.13:17:39.60#ibcon#read 6, iclass 16, count 2 2006.229.13:17:39.60#ibcon#end of sib2, iclass 16, count 2 2006.229.13:17:39.60#ibcon#*mode == 0, iclass 16, count 2 2006.229.13:17:39.60#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.13:17:39.60#ibcon#[27=AT06-04\r\n] 2006.229.13:17:39.60#ibcon#*before write, iclass 16, count 2 2006.229.13:17:39.60#ibcon#enter sib2, iclass 16, count 2 2006.229.13:17:39.60#ibcon#flushed, iclass 16, count 2 2006.229.13:17:39.60#ibcon#about to write, iclass 16, count 2 2006.229.13:17:39.60#ibcon#wrote, iclass 16, count 2 2006.229.13:17:39.60#ibcon#about to read 3, iclass 16, count 2 2006.229.13:17:39.63#ibcon#read 3, iclass 16, count 2 2006.229.13:17:39.63#ibcon#about to read 4, iclass 16, count 2 2006.229.13:17:39.63#ibcon#read 4, iclass 16, count 2 2006.229.13:17:39.63#ibcon#about to read 5, iclass 16, count 2 2006.229.13:17:39.63#ibcon#read 5, iclass 16, count 2 2006.229.13:17:39.63#ibcon#about to read 6, iclass 16, count 2 2006.229.13:17:39.63#ibcon#read 6, iclass 16, count 2 2006.229.13:17:39.63#ibcon#end of sib2, iclass 16, count 2 2006.229.13:17:39.63#ibcon#*after write, iclass 16, count 2 2006.229.13:17:39.63#ibcon#*before return 0, iclass 16, count 2 2006.229.13:17:39.63#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:39.63#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:17:39.63#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.13:17:39.63#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:39.63#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:39.75#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:39.75#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:39.75#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:17:39.75#ibcon#first serial, iclass 16, count 0 2006.229.13:17:39.75#ibcon#enter sib2, iclass 16, count 0 2006.229.13:17:39.75#ibcon#flushed, iclass 16, count 0 2006.229.13:17:39.75#ibcon#about to write, iclass 16, count 0 2006.229.13:17:39.75#ibcon#wrote, iclass 16, count 0 2006.229.13:17:39.75#ibcon#about to read 3, iclass 16, count 0 2006.229.13:17:39.77#ibcon#read 3, iclass 16, count 0 2006.229.13:17:39.77#ibcon#about to read 4, iclass 16, count 0 2006.229.13:17:39.77#ibcon#read 4, iclass 16, count 0 2006.229.13:17:39.77#ibcon#about to read 5, iclass 16, count 0 2006.229.13:17:39.77#ibcon#read 5, iclass 16, count 0 2006.229.13:17:39.77#ibcon#about to read 6, iclass 16, count 0 2006.229.13:17:39.77#ibcon#read 6, iclass 16, count 0 2006.229.13:17:39.77#ibcon#end of sib2, iclass 16, count 0 2006.229.13:17:39.77#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:17:39.77#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:17:39.77#ibcon#[27=USB\r\n] 2006.229.13:17:39.77#ibcon#*before write, iclass 16, count 0 2006.229.13:17:39.77#ibcon#enter sib2, iclass 16, count 0 2006.229.13:17:39.77#ibcon#flushed, iclass 16, count 0 2006.229.13:17:39.77#ibcon#about to write, iclass 16, count 0 2006.229.13:17:39.77#ibcon#wrote, iclass 16, count 0 2006.229.13:17:39.77#ibcon#about to read 3, iclass 16, count 0 2006.229.13:17:39.80#ibcon#read 3, iclass 16, count 0 2006.229.13:17:39.80#ibcon#about to read 4, iclass 16, count 0 2006.229.13:17:39.80#ibcon#read 4, iclass 16, count 0 2006.229.13:17:39.80#ibcon#about to read 5, iclass 16, count 0 2006.229.13:17:39.80#ibcon#read 5, iclass 16, count 0 2006.229.13:17:39.80#ibcon#about to read 6, iclass 16, count 0 2006.229.13:17:39.80#ibcon#read 6, iclass 16, count 0 2006.229.13:17:39.80#ibcon#end of sib2, iclass 16, count 0 2006.229.13:17:39.80#ibcon#*after write, iclass 16, count 0 2006.229.13:17:39.80#ibcon#*before return 0, iclass 16, count 0 2006.229.13:17:39.80#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:39.80#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:17:39.80#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:17:39.80#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:17:39.80$vck44/vblo=7,734.99 2006.229.13:17:39.80#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.13:17:39.80#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.13:17:39.80#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:39.80#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:39.80#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:39.80#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:39.80#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:17:39.80#ibcon#first serial, iclass 18, count 0 2006.229.13:17:39.80#ibcon#enter sib2, iclass 18, count 0 2006.229.13:17:39.80#ibcon#flushed, iclass 18, count 0 2006.229.13:17:39.80#ibcon#about to write, iclass 18, count 0 2006.229.13:17:39.80#ibcon#wrote, iclass 18, count 0 2006.229.13:17:39.80#ibcon#about to read 3, iclass 18, count 0 2006.229.13:17:39.82#ibcon#read 3, iclass 18, count 0 2006.229.13:17:39.82#ibcon#about to read 4, iclass 18, count 0 2006.229.13:17:39.82#ibcon#read 4, iclass 18, count 0 2006.229.13:17:39.82#ibcon#about to read 5, iclass 18, count 0 2006.229.13:17:39.82#ibcon#read 5, iclass 18, count 0 2006.229.13:17:39.82#ibcon#about to read 6, iclass 18, count 0 2006.229.13:17:39.82#ibcon#read 6, iclass 18, count 0 2006.229.13:17:39.82#ibcon#end of sib2, iclass 18, count 0 2006.229.13:17:39.82#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:17:39.82#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:17:39.82#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:17:39.82#ibcon#*before write, iclass 18, count 0 2006.229.13:17:39.82#ibcon#enter sib2, iclass 18, count 0 2006.229.13:17:39.82#ibcon#flushed, iclass 18, count 0 2006.229.13:17:39.82#ibcon#about to write, iclass 18, count 0 2006.229.13:17:39.82#ibcon#wrote, iclass 18, count 0 2006.229.13:17:39.82#ibcon#about to read 3, iclass 18, count 0 2006.229.13:17:39.86#ibcon#read 3, iclass 18, count 0 2006.229.13:17:39.86#ibcon#about to read 4, iclass 18, count 0 2006.229.13:17:39.86#ibcon#read 4, iclass 18, count 0 2006.229.13:17:39.86#ibcon#about to read 5, iclass 18, count 0 2006.229.13:17:39.86#ibcon#read 5, iclass 18, count 0 2006.229.13:17:39.86#ibcon#about to read 6, iclass 18, count 0 2006.229.13:17:39.86#ibcon#read 6, iclass 18, count 0 2006.229.13:17:39.86#ibcon#end of sib2, iclass 18, count 0 2006.229.13:17:39.86#ibcon#*after write, iclass 18, count 0 2006.229.13:17:39.86#ibcon#*before return 0, iclass 18, count 0 2006.229.13:17:39.86#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:39.86#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:17:39.86#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:17:39.86#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:17:39.86$vck44/vb=7,4 2006.229.13:17:39.86#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.13:17:39.86#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.13:17:39.86#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:39.86#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:39.92#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:39.92#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:39.92#ibcon#enter wrdev, iclass 20, count 2 2006.229.13:17:39.92#ibcon#first serial, iclass 20, count 2 2006.229.13:17:39.92#ibcon#enter sib2, iclass 20, count 2 2006.229.13:17:39.92#ibcon#flushed, iclass 20, count 2 2006.229.13:17:39.92#ibcon#about to write, iclass 20, count 2 2006.229.13:17:39.92#ibcon#wrote, iclass 20, count 2 2006.229.13:17:39.92#ibcon#about to read 3, iclass 20, count 2 2006.229.13:17:39.94#ibcon#read 3, iclass 20, count 2 2006.229.13:17:39.94#ibcon#about to read 4, iclass 20, count 2 2006.229.13:17:39.94#ibcon#read 4, iclass 20, count 2 2006.229.13:17:39.94#ibcon#about to read 5, iclass 20, count 2 2006.229.13:17:39.94#ibcon#read 5, iclass 20, count 2 2006.229.13:17:39.94#ibcon#about to read 6, iclass 20, count 2 2006.229.13:17:39.94#ibcon#read 6, iclass 20, count 2 2006.229.13:17:39.94#ibcon#end of sib2, iclass 20, count 2 2006.229.13:17:39.94#ibcon#*mode == 0, iclass 20, count 2 2006.229.13:17:39.94#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.13:17:39.94#ibcon#[27=AT07-04\r\n] 2006.229.13:17:39.94#ibcon#*before write, iclass 20, count 2 2006.229.13:17:39.94#ibcon#enter sib2, iclass 20, count 2 2006.229.13:17:39.94#ibcon#flushed, iclass 20, count 2 2006.229.13:17:39.94#ibcon#about to write, iclass 20, count 2 2006.229.13:17:39.94#ibcon#wrote, iclass 20, count 2 2006.229.13:17:39.94#ibcon#about to read 3, iclass 20, count 2 2006.229.13:17:39.97#ibcon#read 3, iclass 20, count 2 2006.229.13:17:39.97#ibcon#about to read 4, iclass 20, count 2 2006.229.13:17:39.97#ibcon#read 4, iclass 20, count 2 2006.229.13:17:39.97#ibcon#about to read 5, iclass 20, count 2 2006.229.13:17:39.97#ibcon#read 5, iclass 20, count 2 2006.229.13:17:39.97#ibcon#about to read 6, iclass 20, count 2 2006.229.13:17:39.97#ibcon#read 6, iclass 20, count 2 2006.229.13:17:39.97#ibcon#end of sib2, iclass 20, count 2 2006.229.13:17:39.97#ibcon#*after write, iclass 20, count 2 2006.229.13:17:39.97#ibcon#*before return 0, iclass 20, count 2 2006.229.13:17:39.97#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:39.97#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:17:39.97#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.13:17:39.97#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:39.97#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:40.09#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:40.09#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:40.09#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:17:40.09#ibcon#first serial, iclass 20, count 0 2006.229.13:17:40.09#ibcon#enter sib2, iclass 20, count 0 2006.229.13:17:40.09#ibcon#flushed, iclass 20, count 0 2006.229.13:17:40.09#ibcon#about to write, iclass 20, count 0 2006.229.13:17:40.09#ibcon#wrote, iclass 20, count 0 2006.229.13:17:40.09#ibcon#about to read 3, iclass 20, count 0 2006.229.13:17:40.11#ibcon#read 3, iclass 20, count 0 2006.229.13:17:40.11#ibcon#about to read 4, iclass 20, count 0 2006.229.13:17:40.11#ibcon#read 4, iclass 20, count 0 2006.229.13:17:40.11#ibcon#about to read 5, iclass 20, count 0 2006.229.13:17:40.11#ibcon#read 5, iclass 20, count 0 2006.229.13:17:40.11#ibcon#about to read 6, iclass 20, count 0 2006.229.13:17:40.11#ibcon#read 6, iclass 20, count 0 2006.229.13:17:40.11#ibcon#end of sib2, iclass 20, count 0 2006.229.13:17:40.11#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:17:40.11#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:17:40.11#ibcon#[27=USB\r\n] 2006.229.13:17:40.11#ibcon#*before write, iclass 20, count 0 2006.229.13:17:40.11#ibcon#enter sib2, iclass 20, count 0 2006.229.13:17:40.11#ibcon#flushed, iclass 20, count 0 2006.229.13:17:40.11#ibcon#about to write, iclass 20, count 0 2006.229.13:17:40.11#ibcon#wrote, iclass 20, count 0 2006.229.13:17:40.11#ibcon#about to read 3, iclass 20, count 0 2006.229.13:17:40.14#ibcon#read 3, iclass 20, count 0 2006.229.13:17:40.14#ibcon#about to read 4, iclass 20, count 0 2006.229.13:17:40.14#ibcon#read 4, iclass 20, count 0 2006.229.13:17:40.14#ibcon#about to read 5, iclass 20, count 0 2006.229.13:17:40.14#ibcon#read 5, iclass 20, count 0 2006.229.13:17:40.14#ibcon#about to read 6, iclass 20, count 0 2006.229.13:17:40.14#ibcon#read 6, iclass 20, count 0 2006.229.13:17:40.14#ibcon#end of sib2, iclass 20, count 0 2006.229.13:17:40.14#ibcon#*after write, iclass 20, count 0 2006.229.13:17:40.14#ibcon#*before return 0, iclass 20, count 0 2006.229.13:17:40.14#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:40.14#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:17:40.14#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:17:40.14#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:17:40.14$vck44/vblo=8,744.99 2006.229.13:17:40.14#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.13:17:40.14#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.13:17:40.14#ibcon#ireg 17 cls_cnt 0 2006.229.13:17:40.14#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:40.14#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:40.14#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:40.14#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:17:40.14#ibcon#first serial, iclass 22, count 0 2006.229.13:17:40.14#ibcon#enter sib2, iclass 22, count 0 2006.229.13:17:40.14#ibcon#flushed, iclass 22, count 0 2006.229.13:17:40.14#ibcon#about to write, iclass 22, count 0 2006.229.13:17:40.14#ibcon#wrote, iclass 22, count 0 2006.229.13:17:40.14#ibcon#about to read 3, iclass 22, count 0 2006.229.13:17:40.16#ibcon#read 3, iclass 22, count 0 2006.229.13:17:40.16#ibcon#about to read 4, iclass 22, count 0 2006.229.13:17:40.16#ibcon#read 4, iclass 22, count 0 2006.229.13:17:40.16#ibcon#about to read 5, iclass 22, count 0 2006.229.13:17:40.16#ibcon#read 5, iclass 22, count 0 2006.229.13:17:40.16#ibcon#about to read 6, iclass 22, count 0 2006.229.13:17:40.16#ibcon#read 6, iclass 22, count 0 2006.229.13:17:40.16#ibcon#end of sib2, iclass 22, count 0 2006.229.13:17:40.16#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:17:40.16#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:17:40.16#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:17:40.16#ibcon#*before write, iclass 22, count 0 2006.229.13:17:40.16#ibcon#enter sib2, iclass 22, count 0 2006.229.13:17:40.16#ibcon#flushed, iclass 22, count 0 2006.229.13:17:40.16#ibcon#about to write, iclass 22, count 0 2006.229.13:17:40.16#ibcon#wrote, iclass 22, count 0 2006.229.13:17:40.16#ibcon#about to read 3, iclass 22, count 0 2006.229.13:17:40.20#ibcon#read 3, iclass 22, count 0 2006.229.13:17:40.20#ibcon#about to read 4, iclass 22, count 0 2006.229.13:17:40.20#ibcon#read 4, iclass 22, count 0 2006.229.13:17:40.20#ibcon#about to read 5, iclass 22, count 0 2006.229.13:17:40.20#ibcon#read 5, iclass 22, count 0 2006.229.13:17:40.20#ibcon#about to read 6, iclass 22, count 0 2006.229.13:17:40.20#ibcon#read 6, iclass 22, count 0 2006.229.13:17:40.20#ibcon#end of sib2, iclass 22, count 0 2006.229.13:17:40.20#ibcon#*after write, iclass 22, count 0 2006.229.13:17:40.20#ibcon#*before return 0, iclass 22, count 0 2006.229.13:17:40.20#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:40.20#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:17:40.20#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:17:40.20#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:17:40.20$vck44/vb=8,4 2006.229.13:17:40.20#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.13:17:40.20#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.13:17:40.20#ibcon#ireg 11 cls_cnt 2 2006.229.13:17:40.20#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:40.26#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:40.26#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:40.26#ibcon#enter wrdev, iclass 24, count 2 2006.229.13:17:40.26#ibcon#first serial, iclass 24, count 2 2006.229.13:17:40.26#ibcon#enter sib2, iclass 24, count 2 2006.229.13:17:40.26#ibcon#flushed, iclass 24, count 2 2006.229.13:17:40.26#ibcon#about to write, iclass 24, count 2 2006.229.13:17:40.26#ibcon#wrote, iclass 24, count 2 2006.229.13:17:40.26#ibcon#about to read 3, iclass 24, count 2 2006.229.13:17:40.28#ibcon#read 3, iclass 24, count 2 2006.229.13:17:40.28#ibcon#about to read 4, iclass 24, count 2 2006.229.13:17:40.28#ibcon#read 4, iclass 24, count 2 2006.229.13:17:40.28#ibcon#about to read 5, iclass 24, count 2 2006.229.13:17:40.28#ibcon#read 5, iclass 24, count 2 2006.229.13:17:40.28#ibcon#about to read 6, iclass 24, count 2 2006.229.13:17:40.28#ibcon#read 6, iclass 24, count 2 2006.229.13:17:40.28#ibcon#end of sib2, iclass 24, count 2 2006.229.13:17:40.28#ibcon#*mode == 0, iclass 24, count 2 2006.229.13:17:40.28#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.13:17:40.28#ibcon#[27=AT08-04\r\n] 2006.229.13:17:40.28#ibcon#*before write, iclass 24, count 2 2006.229.13:17:40.28#ibcon#enter sib2, iclass 24, count 2 2006.229.13:17:40.28#ibcon#flushed, iclass 24, count 2 2006.229.13:17:40.28#ibcon#about to write, iclass 24, count 2 2006.229.13:17:40.28#ibcon#wrote, iclass 24, count 2 2006.229.13:17:40.28#ibcon#about to read 3, iclass 24, count 2 2006.229.13:17:40.31#ibcon#read 3, iclass 24, count 2 2006.229.13:17:40.31#ibcon#about to read 4, iclass 24, count 2 2006.229.13:17:40.31#ibcon#read 4, iclass 24, count 2 2006.229.13:17:40.31#ibcon#about to read 5, iclass 24, count 2 2006.229.13:17:40.31#ibcon#read 5, iclass 24, count 2 2006.229.13:17:40.31#ibcon#about to read 6, iclass 24, count 2 2006.229.13:17:40.31#ibcon#read 6, iclass 24, count 2 2006.229.13:17:40.31#ibcon#end of sib2, iclass 24, count 2 2006.229.13:17:40.31#ibcon#*after write, iclass 24, count 2 2006.229.13:17:40.31#ibcon#*before return 0, iclass 24, count 2 2006.229.13:17:40.31#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:40.31#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:17:40.31#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.13:17:40.31#ibcon#ireg 7 cls_cnt 0 2006.229.13:17:40.31#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:40.43#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:40.43#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:40.43#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:17:40.43#ibcon#first serial, iclass 24, count 0 2006.229.13:17:40.43#ibcon#enter sib2, iclass 24, count 0 2006.229.13:17:40.43#ibcon#flushed, iclass 24, count 0 2006.229.13:17:40.43#ibcon#about to write, iclass 24, count 0 2006.229.13:17:40.43#ibcon#wrote, iclass 24, count 0 2006.229.13:17:40.43#ibcon#about to read 3, iclass 24, count 0 2006.229.13:17:40.45#ibcon#read 3, iclass 24, count 0 2006.229.13:17:40.45#ibcon#about to read 4, iclass 24, count 0 2006.229.13:17:40.45#ibcon#read 4, iclass 24, count 0 2006.229.13:17:40.45#ibcon#about to read 5, iclass 24, count 0 2006.229.13:17:40.45#ibcon#read 5, iclass 24, count 0 2006.229.13:17:40.45#ibcon#about to read 6, iclass 24, count 0 2006.229.13:17:40.45#ibcon#read 6, iclass 24, count 0 2006.229.13:17:40.45#ibcon#end of sib2, iclass 24, count 0 2006.229.13:17:40.45#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:17:40.45#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:17:40.45#ibcon#[27=USB\r\n] 2006.229.13:17:40.45#ibcon#*before write, iclass 24, count 0 2006.229.13:17:40.45#ibcon#enter sib2, iclass 24, count 0 2006.229.13:17:40.45#ibcon#flushed, iclass 24, count 0 2006.229.13:17:40.45#ibcon#about to write, iclass 24, count 0 2006.229.13:17:40.45#ibcon#wrote, iclass 24, count 0 2006.229.13:17:40.45#ibcon#about to read 3, iclass 24, count 0 2006.229.13:17:40.48#ibcon#read 3, iclass 24, count 0 2006.229.13:17:40.48#ibcon#about to read 4, iclass 24, count 0 2006.229.13:17:40.48#ibcon#read 4, iclass 24, count 0 2006.229.13:17:40.48#ibcon#about to read 5, iclass 24, count 0 2006.229.13:17:40.48#ibcon#read 5, iclass 24, count 0 2006.229.13:17:40.48#ibcon#about to read 6, iclass 24, count 0 2006.229.13:17:40.48#ibcon#read 6, iclass 24, count 0 2006.229.13:17:40.48#ibcon#end of sib2, iclass 24, count 0 2006.229.13:17:40.48#ibcon#*after write, iclass 24, count 0 2006.229.13:17:40.48#ibcon#*before return 0, iclass 24, count 0 2006.229.13:17:40.48#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:40.48#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:17:40.48#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:17:40.48#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:17:40.48$vck44/vabw=wide 2006.229.13:17:40.48#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:17:40.48#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:17:40.48#ibcon#ireg 8 cls_cnt 0 2006.229.13:17:40.48#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:17:40.48#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:17:40.48#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:17:40.48#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:17:40.48#ibcon#first serial, iclass 27, count 0 2006.229.13:17:40.48#ibcon#enter sib2, iclass 27, count 0 2006.229.13:17:40.48#ibcon#flushed, iclass 27, count 0 2006.229.13:17:40.48#ibcon#about to write, iclass 27, count 0 2006.229.13:17:40.48#ibcon#wrote, iclass 27, count 0 2006.229.13:17:40.48#ibcon#about to read 3, iclass 27, count 0 2006.229.13:17:40.50#ibcon#read 3, iclass 27, count 0 2006.229.13:17:40.50#ibcon#about to read 4, iclass 27, count 0 2006.229.13:17:40.50#ibcon#read 4, iclass 27, count 0 2006.229.13:17:40.50#ibcon#about to read 5, iclass 27, count 0 2006.229.13:17:40.50#ibcon#read 5, iclass 27, count 0 2006.229.13:17:40.50#ibcon#about to read 6, iclass 27, count 0 2006.229.13:17:40.50#ibcon#read 6, iclass 27, count 0 2006.229.13:17:40.50#ibcon#end of sib2, iclass 27, count 0 2006.229.13:17:40.50#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:17:40.50#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:17:40.50#ibcon#[25=BW32\r\n] 2006.229.13:17:40.50#ibcon#*before write, iclass 27, count 0 2006.229.13:17:40.50#ibcon#enter sib2, iclass 27, count 0 2006.229.13:17:40.50#ibcon#flushed, iclass 27, count 0 2006.229.13:17:40.50#ibcon#about to write, iclass 27, count 0 2006.229.13:17:40.50#ibcon#wrote, iclass 27, count 0 2006.229.13:17:40.50#ibcon#about to read 3, iclass 27, count 0 2006.229.13:17:40.52#abcon#<5=/04 1.0 1.8 27.581001002.1\r\n> 2006.229.13:17:40.53#ibcon#read 3, iclass 27, count 0 2006.229.13:17:40.53#ibcon#about to read 4, iclass 27, count 0 2006.229.13:17:40.53#ibcon#read 4, iclass 27, count 0 2006.229.13:17:40.53#ibcon#about to read 5, iclass 27, count 0 2006.229.13:17:40.53#ibcon#read 5, iclass 27, count 0 2006.229.13:17:40.53#ibcon#about to read 6, iclass 27, count 0 2006.229.13:17:40.53#ibcon#read 6, iclass 27, count 0 2006.229.13:17:40.53#ibcon#end of sib2, iclass 27, count 0 2006.229.13:17:40.53#ibcon#*after write, iclass 27, count 0 2006.229.13:17:40.53#ibcon#*before return 0, iclass 27, count 0 2006.229.13:17:40.53#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:17:40.53#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:17:40.53#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:17:40.53#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:17:40.53$vck44/vbbw=wide 2006.229.13:17:40.53#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:17:40.53#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:17:40.53#ibcon#ireg 8 cls_cnt 0 2006.229.13:17:40.53#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:17:40.54#abcon#{5=INTERFACE CLEAR} 2006.229.13:17:40.60#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:17:40.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:17:40.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:17:40.60#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:17:40.60#ibcon#first serial, iclass 31, count 0 2006.229.13:17:40.60#ibcon#enter sib2, iclass 31, count 0 2006.229.13:17:40.60#ibcon#flushed, iclass 31, count 0 2006.229.13:17:40.60#ibcon#about to write, iclass 31, count 0 2006.229.13:17:40.60#ibcon#wrote, iclass 31, count 0 2006.229.13:17:40.60#ibcon#about to read 3, iclass 31, count 0 2006.229.13:17:40.62#ibcon#read 3, iclass 31, count 0 2006.229.13:17:40.62#ibcon#about to read 4, iclass 31, count 0 2006.229.13:17:40.62#ibcon#read 4, iclass 31, count 0 2006.229.13:17:40.62#ibcon#about to read 5, iclass 31, count 0 2006.229.13:17:40.62#ibcon#read 5, iclass 31, count 0 2006.229.13:17:40.62#ibcon#about to read 6, iclass 31, count 0 2006.229.13:17:40.62#ibcon#read 6, iclass 31, count 0 2006.229.13:17:40.62#ibcon#end of sib2, iclass 31, count 0 2006.229.13:17:40.62#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:17:40.62#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:17:40.62#ibcon#[27=BW32\r\n] 2006.229.13:17:40.62#ibcon#*before write, iclass 31, count 0 2006.229.13:17:40.62#ibcon#enter sib2, iclass 31, count 0 2006.229.13:17:40.62#ibcon#flushed, iclass 31, count 0 2006.229.13:17:40.62#ibcon#about to write, iclass 31, count 0 2006.229.13:17:40.62#ibcon#wrote, iclass 31, count 0 2006.229.13:17:40.62#ibcon#about to read 3, iclass 31, count 0 2006.229.13:17:40.65#ibcon#read 3, iclass 31, count 0 2006.229.13:17:40.65#ibcon#about to read 4, iclass 31, count 0 2006.229.13:17:40.65#ibcon#read 4, iclass 31, count 0 2006.229.13:17:40.65#ibcon#about to read 5, iclass 31, count 0 2006.229.13:17:40.65#ibcon#read 5, iclass 31, count 0 2006.229.13:17:40.65#ibcon#about to read 6, iclass 31, count 0 2006.229.13:17:40.65#ibcon#read 6, iclass 31, count 0 2006.229.13:17:40.65#ibcon#end of sib2, iclass 31, count 0 2006.229.13:17:40.65#ibcon#*after write, iclass 31, count 0 2006.229.13:17:40.65#ibcon#*before return 0, iclass 31, count 0 2006.229.13:17:40.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:17:40.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:17:40.65#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:17:40.65#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:17:40.65$setupk4/ifdk4 2006.229.13:17:40.65$ifdk4/lo= 2006.229.13:17:40.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:17:40.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:17:40.65$ifdk4/patch= 2006.229.13:17:40.65$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:17:40.65$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:17:40.65$setupk4/!*+20s 2006.229.13:17:50.69#abcon#<5=/04 1.0 1.8 27.581001002.1\r\n> 2006.229.13:17:50.71#abcon#{5=INTERFACE CLEAR} 2006.229.13:17:50.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:17:55.16$setupk4/"tpicd 2006.229.13:17:55.16$setupk4/echo=off 2006.229.13:17:55.16$setupk4/xlog=off 2006.229.13:17:55.16:!2006.229.13:20:22 2006.229.13:17:58.14#trakl#Source acquired 2006.229.13:18:00.13#flagr#flagr/antenna,acquired 2006.229.13:20:22.00:preob 2006.229.13:20:22.14/onsource/TRACKING 2006.229.13:20:22.14:!2006.229.13:20:32 2006.229.13:20:32.00:"tape 2006.229.13:20:32.00:"st=record 2006.229.13:20:32.00:data_valid=on 2006.229.13:20:32.00:midob 2006.229.13:20:33.14/onsource/TRACKING 2006.229.13:20:33.14/wx/27.57,1002.0,100 2006.229.13:20:33.31/cable/+6.4105E-03 2006.229.13:20:34.40/va/01,08,usb,yes,31,34 2006.229.13:20:34.40/va/02,07,usb,yes,34,35 2006.229.13:20:34.40/va/03,06,usb,yes,42,45 2006.229.13:20:34.40/va/04,07,usb,yes,35,37 2006.229.13:20:34.40/va/05,04,usb,yes,31,32 2006.229.13:20:34.40/va/06,04,usb,yes,35,35 2006.229.13:20:34.40/va/07,05,usb,yes,31,32 2006.229.13:20:34.40/va/08,06,usb,yes,23,28 2006.229.13:20:34.63/valo/01,524.99,yes,locked 2006.229.13:20:34.63/valo/02,534.99,yes,locked 2006.229.13:20:34.63/valo/03,564.99,yes,locked 2006.229.13:20:34.63/valo/04,624.99,yes,locked 2006.229.13:20:34.63/valo/05,734.99,yes,locked 2006.229.13:20:34.63/valo/06,814.99,yes,locked 2006.229.13:20:34.63/valo/07,864.99,yes,locked 2006.229.13:20:34.63/valo/08,884.99,yes,locked 2006.229.13:20:35.72/vb/01,04,usb,yes,33,30 2006.229.13:20:35.72/vb/02,04,usb,yes,34,35 2006.229.13:20:35.72/vb/03,04,usb,yes,31,35 2006.229.13:20:35.72/vb/04,04,usb,yes,36,35 2006.229.13:20:35.72/vb/05,04,usb,yes,28,30 2006.229.13:20:35.72/vb/06,04,usb,yes,33,29 2006.229.13:20:35.72/vb/07,04,usb,yes,32,32 2006.229.13:20:35.72/vb/08,04,usb,yes,30,33 2006.229.13:20:35.96/vblo/01,629.99,yes,locked 2006.229.13:20:35.96/vblo/02,634.99,yes,locked 2006.229.13:20:35.96/vblo/03,649.99,yes,locked 2006.229.13:20:35.96/vblo/04,679.99,yes,locked 2006.229.13:20:35.96/vblo/05,709.99,yes,locked 2006.229.13:20:35.96/vblo/06,719.99,yes,locked 2006.229.13:20:35.96/vblo/07,734.99,yes,locked 2006.229.13:20:35.96/vblo/08,744.99,yes,locked 2006.229.13:20:36.11/vabw/8 2006.229.13:20:36.26/vbbw/8 2006.229.13:20:36.35/xfe/off,on,12.0 2006.229.13:20:36.73/ifatt/23,28,28,28 2006.229.13:20:37.08/fmout-gps/S +4.70E-07 2006.229.13:20:37.12:!2006.229.13:24:52 2006.229.13:24:52.00:data_valid=off 2006.229.13:24:52.00:"et 2006.229.13:24:52.00:!+3s 2006.229.13:24:55.01:"tape 2006.229.13:24:55.01:postob 2006.229.13:24:55.23/cable/+6.4118E-03 2006.229.13:24:55.23/wx/27.57,1002.0,100 2006.229.13:24:56.08/fmout-gps/S +4.75E-07 2006.229.13:24:56.08:scan_name=229-1326,jd0608,40 2006.229.13:24:56.08:source=1954-388,195800.00,-384506.4,2000.0,cw 2006.229.13:24:57.14#flagr#flagr/antenna,new-source 2006.229.13:24:57.14:checkk5 2006.229.13:24:57.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:24:57.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:24:58.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:24:58.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:24:59.13/chk_obsdata//k5ts1/T2291320??a.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.13:24:59.54/chk_obsdata//k5ts2/T2291320??b.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.13:24:59.94/chk_obsdata//k5ts3/T2291320??c.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.13:25:00.34/chk_obsdata//k5ts4/T2291320??d.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.13:25:01.07/k5log//k5ts1_log_newline 2006.229.13:25:01.78/k5log//k5ts2_log_newline 2006.229.13:25:02.49/k5log//k5ts3_log_newline 2006.229.13:25:03.21/k5log//k5ts4_log_newline 2006.229.13:25:03.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:25:03.23:setupk4=1 2006.229.13:25:03.23$setupk4/echo=on 2006.229.13:25:03.23$setupk4/pcalon 2006.229.13:25:03.23$pcalon/"no phase cal control is implemented here 2006.229.13:25:03.23$setupk4/"tpicd=stop 2006.229.13:25:03.23$setupk4/"rec=synch_on 2006.229.13:25:03.23$setupk4/"rec_mode=128 2006.229.13:25:03.23$setupk4/!* 2006.229.13:25:03.23$setupk4/recpk4 2006.229.13:25:03.23$recpk4/recpatch= 2006.229.13:25:03.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:25:03.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:25:03.24$setupk4/vck44 2006.229.13:25:03.24$vck44/valo=1,524.99 2006.229.13:25:03.24#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:25:03.24#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:25:03.24#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:03.24#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:03.24#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:03.24#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:03.24#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:25:03.24#ibcon#first serial, iclass 29, count 0 2006.229.13:25:03.24#ibcon#enter sib2, iclass 29, count 0 2006.229.13:25:03.24#ibcon#flushed, iclass 29, count 0 2006.229.13:25:03.24#ibcon#about to write, iclass 29, count 0 2006.229.13:25:03.24#ibcon#wrote, iclass 29, count 0 2006.229.13:25:03.24#ibcon#about to read 3, iclass 29, count 0 2006.229.13:25:03.26#ibcon#read 3, iclass 29, count 0 2006.229.13:25:03.26#ibcon#about to read 4, iclass 29, count 0 2006.229.13:25:03.26#ibcon#read 4, iclass 29, count 0 2006.229.13:25:03.26#ibcon#about to read 5, iclass 29, count 0 2006.229.13:25:03.26#ibcon#read 5, iclass 29, count 0 2006.229.13:25:03.26#ibcon#about to read 6, iclass 29, count 0 2006.229.13:25:03.26#ibcon#read 6, iclass 29, count 0 2006.229.13:25:03.26#ibcon#end of sib2, iclass 29, count 0 2006.229.13:25:03.26#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:25:03.26#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:25:03.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:25:03.26#ibcon#*before write, iclass 29, count 0 2006.229.13:25:03.26#ibcon#enter sib2, iclass 29, count 0 2006.229.13:25:03.26#ibcon#flushed, iclass 29, count 0 2006.229.13:25:03.26#ibcon#about to write, iclass 29, count 0 2006.229.13:25:03.26#ibcon#wrote, iclass 29, count 0 2006.229.13:25:03.26#ibcon#about to read 3, iclass 29, count 0 2006.229.13:25:03.31#ibcon#read 3, iclass 29, count 0 2006.229.13:25:03.31#ibcon#about to read 4, iclass 29, count 0 2006.229.13:25:03.31#ibcon#read 4, iclass 29, count 0 2006.229.13:25:03.31#ibcon#about to read 5, iclass 29, count 0 2006.229.13:25:03.31#ibcon#read 5, iclass 29, count 0 2006.229.13:25:03.31#ibcon#about to read 6, iclass 29, count 0 2006.229.13:25:03.31#ibcon#read 6, iclass 29, count 0 2006.229.13:25:03.31#ibcon#end of sib2, iclass 29, count 0 2006.229.13:25:03.31#ibcon#*after write, iclass 29, count 0 2006.229.13:25:03.31#ibcon#*before return 0, iclass 29, count 0 2006.229.13:25:03.31#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:03.31#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:03.31#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:25:03.31#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:25:03.31$vck44/va=1,8 2006.229.13:25:03.31#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.13:25:03.31#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.13:25:03.31#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:03.31#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:03.31#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:03.31#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:03.31#ibcon#enter wrdev, iclass 31, count 2 2006.229.13:25:03.31#ibcon#first serial, iclass 31, count 2 2006.229.13:25:03.31#ibcon#enter sib2, iclass 31, count 2 2006.229.13:25:03.31#ibcon#flushed, iclass 31, count 2 2006.229.13:25:03.31#ibcon#about to write, iclass 31, count 2 2006.229.13:25:03.31#ibcon#wrote, iclass 31, count 2 2006.229.13:25:03.31#ibcon#about to read 3, iclass 31, count 2 2006.229.13:25:03.33#ibcon#read 3, iclass 31, count 2 2006.229.13:25:03.33#ibcon#about to read 4, iclass 31, count 2 2006.229.13:25:03.33#ibcon#read 4, iclass 31, count 2 2006.229.13:25:03.33#ibcon#about to read 5, iclass 31, count 2 2006.229.13:25:03.33#ibcon#read 5, iclass 31, count 2 2006.229.13:25:03.33#ibcon#about to read 6, iclass 31, count 2 2006.229.13:25:03.33#ibcon#read 6, iclass 31, count 2 2006.229.13:25:03.33#ibcon#end of sib2, iclass 31, count 2 2006.229.13:25:03.33#ibcon#*mode == 0, iclass 31, count 2 2006.229.13:25:03.33#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.13:25:03.33#ibcon#[25=AT01-08\r\n] 2006.229.13:25:03.33#ibcon#*before write, iclass 31, count 2 2006.229.13:25:03.33#ibcon#enter sib2, iclass 31, count 2 2006.229.13:25:03.33#ibcon#flushed, iclass 31, count 2 2006.229.13:25:03.33#ibcon#about to write, iclass 31, count 2 2006.229.13:25:03.33#ibcon#wrote, iclass 31, count 2 2006.229.13:25:03.33#ibcon#about to read 3, iclass 31, count 2 2006.229.13:25:03.36#ibcon#read 3, iclass 31, count 2 2006.229.13:25:03.36#ibcon#about to read 4, iclass 31, count 2 2006.229.13:25:03.36#ibcon#read 4, iclass 31, count 2 2006.229.13:25:03.36#ibcon#about to read 5, iclass 31, count 2 2006.229.13:25:03.36#ibcon#read 5, iclass 31, count 2 2006.229.13:25:03.36#ibcon#about to read 6, iclass 31, count 2 2006.229.13:25:03.36#ibcon#read 6, iclass 31, count 2 2006.229.13:25:03.36#ibcon#end of sib2, iclass 31, count 2 2006.229.13:25:03.36#ibcon#*after write, iclass 31, count 2 2006.229.13:25:03.36#ibcon#*before return 0, iclass 31, count 2 2006.229.13:25:03.36#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:03.36#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:03.36#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.13:25:03.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:03.36#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:03.48#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:03.48#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:03.48#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:25:03.48#ibcon#first serial, iclass 31, count 0 2006.229.13:25:03.48#ibcon#enter sib2, iclass 31, count 0 2006.229.13:25:03.48#ibcon#flushed, iclass 31, count 0 2006.229.13:25:03.48#ibcon#about to write, iclass 31, count 0 2006.229.13:25:03.48#ibcon#wrote, iclass 31, count 0 2006.229.13:25:03.48#ibcon#about to read 3, iclass 31, count 0 2006.229.13:25:03.50#ibcon#read 3, iclass 31, count 0 2006.229.13:25:03.50#ibcon#about to read 4, iclass 31, count 0 2006.229.13:25:03.50#ibcon#read 4, iclass 31, count 0 2006.229.13:25:03.50#ibcon#about to read 5, iclass 31, count 0 2006.229.13:25:03.50#ibcon#read 5, iclass 31, count 0 2006.229.13:25:03.50#ibcon#about to read 6, iclass 31, count 0 2006.229.13:25:03.50#ibcon#read 6, iclass 31, count 0 2006.229.13:25:03.50#ibcon#end of sib2, iclass 31, count 0 2006.229.13:25:03.50#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:25:03.50#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:25:03.50#ibcon#[25=USB\r\n] 2006.229.13:25:03.50#ibcon#*before write, iclass 31, count 0 2006.229.13:25:03.50#ibcon#enter sib2, iclass 31, count 0 2006.229.13:25:03.50#ibcon#flushed, iclass 31, count 0 2006.229.13:25:03.50#ibcon#about to write, iclass 31, count 0 2006.229.13:25:03.50#ibcon#wrote, iclass 31, count 0 2006.229.13:25:03.50#ibcon#about to read 3, iclass 31, count 0 2006.229.13:25:03.53#ibcon#read 3, iclass 31, count 0 2006.229.13:25:03.53#ibcon#about to read 4, iclass 31, count 0 2006.229.13:25:03.53#ibcon#read 4, iclass 31, count 0 2006.229.13:25:03.53#ibcon#about to read 5, iclass 31, count 0 2006.229.13:25:03.53#ibcon#read 5, iclass 31, count 0 2006.229.13:25:03.53#ibcon#about to read 6, iclass 31, count 0 2006.229.13:25:03.53#ibcon#read 6, iclass 31, count 0 2006.229.13:25:03.53#ibcon#end of sib2, iclass 31, count 0 2006.229.13:25:03.53#ibcon#*after write, iclass 31, count 0 2006.229.13:25:03.53#ibcon#*before return 0, iclass 31, count 0 2006.229.13:25:03.53#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:03.53#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:03.53#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:25:03.53#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:25:03.53$vck44/valo=2,534.99 2006.229.13:25:03.53#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.13:25:03.53#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.13:25:03.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:03.53#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:03.53#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:03.53#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:03.53#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:25:03.53#ibcon#first serial, iclass 33, count 0 2006.229.13:25:03.53#ibcon#enter sib2, iclass 33, count 0 2006.229.13:25:03.53#ibcon#flushed, iclass 33, count 0 2006.229.13:25:03.53#ibcon#about to write, iclass 33, count 0 2006.229.13:25:03.53#ibcon#wrote, iclass 33, count 0 2006.229.13:25:03.53#ibcon#about to read 3, iclass 33, count 0 2006.229.13:25:03.55#ibcon#read 3, iclass 33, count 0 2006.229.13:25:03.55#ibcon#about to read 4, iclass 33, count 0 2006.229.13:25:03.55#ibcon#read 4, iclass 33, count 0 2006.229.13:25:03.55#ibcon#about to read 5, iclass 33, count 0 2006.229.13:25:03.55#ibcon#read 5, iclass 33, count 0 2006.229.13:25:03.55#ibcon#about to read 6, iclass 33, count 0 2006.229.13:25:03.55#ibcon#read 6, iclass 33, count 0 2006.229.13:25:03.55#ibcon#end of sib2, iclass 33, count 0 2006.229.13:25:03.55#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:25:03.55#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:25:03.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:25:03.55#ibcon#*before write, iclass 33, count 0 2006.229.13:25:03.55#ibcon#enter sib2, iclass 33, count 0 2006.229.13:25:03.55#ibcon#flushed, iclass 33, count 0 2006.229.13:25:03.55#ibcon#about to write, iclass 33, count 0 2006.229.13:25:03.55#ibcon#wrote, iclass 33, count 0 2006.229.13:25:03.55#ibcon#about to read 3, iclass 33, count 0 2006.229.13:25:03.59#ibcon#read 3, iclass 33, count 0 2006.229.13:25:03.59#ibcon#about to read 4, iclass 33, count 0 2006.229.13:25:03.59#ibcon#read 4, iclass 33, count 0 2006.229.13:25:03.59#ibcon#about to read 5, iclass 33, count 0 2006.229.13:25:03.59#ibcon#read 5, iclass 33, count 0 2006.229.13:25:03.59#ibcon#about to read 6, iclass 33, count 0 2006.229.13:25:03.59#ibcon#read 6, iclass 33, count 0 2006.229.13:25:03.59#ibcon#end of sib2, iclass 33, count 0 2006.229.13:25:03.59#ibcon#*after write, iclass 33, count 0 2006.229.13:25:03.59#ibcon#*before return 0, iclass 33, count 0 2006.229.13:25:03.59#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:03.59#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:03.59#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:25:03.59#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:25:03.59$vck44/va=2,7 2006.229.13:25:03.59#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.13:25:03.59#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.13:25:03.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:03.59#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:03.65#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:03.65#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:03.65#ibcon#enter wrdev, iclass 35, count 2 2006.229.13:25:03.65#ibcon#first serial, iclass 35, count 2 2006.229.13:25:03.65#ibcon#enter sib2, iclass 35, count 2 2006.229.13:25:03.65#ibcon#flushed, iclass 35, count 2 2006.229.13:25:03.65#ibcon#about to write, iclass 35, count 2 2006.229.13:25:03.65#ibcon#wrote, iclass 35, count 2 2006.229.13:25:03.65#ibcon#about to read 3, iclass 35, count 2 2006.229.13:25:03.67#ibcon#read 3, iclass 35, count 2 2006.229.13:25:03.67#ibcon#about to read 4, iclass 35, count 2 2006.229.13:25:03.67#ibcon#read 4, iclass 35, count 2 2006.229.13:25:03.67#ibcon#about to read 5, iclass 35, count 2 2006.229.13:25:03.67#ibcon#read 5, iclass 35, count 2 2006.229.13:25:03.67#ibcon#about to read 6, iclass 35, count 2 2006.229.13:25:03.67#ibcon#read 6, iclass 35, count 2 2006.229.13:25:03.67#ibcon#end of sib2, iclass 35, count 2 2006.229.13:25:03.67#ibcon#*mode == 0, iclass 35, count 2 2006.229.13:25:03.67#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.13:25:03.67#ibcon#[25=AT02-07\r\n] 2006.229.13:25:03.67#ibcon#*before write, iclass 35, count 2 2006.229.13:25:03.67#ibcon#enter sib2, iclass 35, count 2 2006.229.13:25:03.67#ibcon#flushed, iclass 35, count 2 2006.229.13:25:03.67#ibcon#about to write, iclass 35, count 2 2006.229.13:25:03.67#ibcon#wrote, iclass 35, count 2 2006.229.13:25:03.67#ibcon#about to read 3, iclass 35, count 2 2006.229.13:25:03.70#ibcon#read 3, iclass 35, count 2 2006.229.13:25:03.70#ibcon#about to read 4, iclass 35, count 2 2006.229.13:25:03.70#ibcon#read 4, iclass 35, count 2 2006.229.13:25:03.70#ibcon#about to read 5, iclass 35, count 2 2006.229.13:25:03.70#ibcon#read 5, iclass 35, count 2 2006.229.13:25:03.70#ibcon#about to read 6, iclass 35, count 2 2006.229.13:25:03.70#ibcon#read 6, iclass 35, count 2 2006.229.13:25:03.70#ibcon#end of sib2, iclass 35, count 2 2006.229.13:25:03.70#ibcon#*after write, iclass 35, count 2 2006.229.13:25:03.70#ibcon#*before return 0, iclass 35, count 2 2006.229.13:25:03.70#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:03.70#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:03.70#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.13:25:03.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:03.70#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:03.82#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:03.82#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:03.82#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:25:03.82#ibcon#first serial, iclass 35, count 0 2006.229.13:25:03.82#ibcon#enter sib2, iclass 35, count 0 2006.229.13:25:03.82#ibcon#flushed, iclass 35, count 0 2006.229.13:25:03.82#ibcon#about to write, iclass 35, count 0 2006.229.13:25:03.82#ibcon#wrote, iclass 35, count 0 2006.229.13:25:03.82#ibcon#about to read 3, iclass 35, count 0 2006.229.13:25:03.84#ibcon#read 3, iclass 35, count 0 2006.229.13:25:03.84#ibcon#about to read 4, iclass 35, count 0 2006.229.13:25:03.84#ibcon#read 4, iclass 35, count 0 2006.229.13:25:03.84#ibcon#about to read 5, iclass 35, count 0 2006.229.13:25:03.84#ibcon#read 5, iclass 35, count 0 2006.229.13:25:03.84#ibcon#about to read 6, iclass 35, count 0 2006.229.13:25:03.84#ibcon#read 6, iclass 35, count 0 2006.229.13:25:03.84#ibcon#end of sib2, iclass 35, count 0 2006.229.13:25:03.84#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:25:03.84#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:25:03.84#ibcon#[25=USB\r\n] 2006.229.13:25:03.84#ibcon#*before write, iclass 35, count 0 2006.229.13:25:03.84#ibcon#enter sib2, iclass 35, count 0 2006.229.13:25:03.84#ibcon#flushed, iclass 35, count 0 2006.229.13:25:03.84#ibcon#about to write, iclass 35, count 0 2006.229.13:25:03.84#ibcon#wrote, iclass 35, count 0 2006.229.13:25:03.84#ibcon#about to read 3, iclass 35, count 0 2006.229.13:25:03.87#ibcon#read 3, iclass 35, count 0 2006.229.13:25:03.87#ibcon#about to read 4, iclass 35, count 0 2006.229.13:25:03.87#ibcon#read 4, iclass 35, count 0 2006.229.13:25:03.87#ibcon#about to read 5, iclass 35, count 0 2006.229.13:25:03.87#ibcon#read 5, iclass 35, count 0 2006.229.13:25:03.87#ibcon#about to read 6, iclass 35, count 0 2006.229.13:25:03.87#ibcon#read 6, iclass 35, count 0 2006.229.13:25:03.87#ibcon#end of sib2, iclass 35, count 0 2006.229.13:25:03.87#ibcon#*after write, iclass 35, count 0 2006.229.13:25:03.87#ibcon#*before return 0, iclass 35, count 0 2006.229.13:25:03.87#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:03.87#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:03.87#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:25:03.87#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:25:03.87$vck44/valo=3,564.99 2006.229.13:25:03.87#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.13:25:03.87#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.13:25:03.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:03.87#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:03.87#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:03.87#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:03.87#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:25:03.87#ibcon#first serial, iclass 37, count 0 2006.229.13:25:03.87#ibcon#enter sib2, iclass 37, count 0 2006.229.13:25:03.87#ibcon#flushed, iclass 37, count 0 2006.229.13:25:03.87#ibcon#about to write, iclass 37, count 0 2006.229.13:25:03.87#ibcon#wrote, iclass 37, count 0 2006.229.13:25:03.87#ibcon#about to read 3, iclass 37, count 0 2006.229.13:25:03.89#ibcon#read 3, iclass 37, count 0 2006.229.13:25:03.89#ibcon#about to read 4, iclass 37, count 0 2006.229.13:25:03.89#ibcon#read 4, iclass 37, count 0 2006.229.13:25:03.89#ibcon#about to read 5, iclass 37, count 0 2006.229.13:25:03.89#ibcon#read 5, iclass 37, count 0 2006.229.13:25:03.89#ibcon#about to read 6, iclass 37, count 0 2006.229.13:25:03.89#ibcon#read 6, iclass 37, count 0 2006.229.13:25:03.89#ibcon#end of sib2, iclass 37, count 0 2006.229.13:25:03.89#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:25:03.89#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:25:03.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:25:03.89#ibcon#*before write, iclass 37, count 0 2006.229.13:25:03.89#ibcon#enter sib2, iclass 37, count 0 2006.229.13:25:03.89#ibcon#flushed, iclass 37, count 0 2006.229.13:25:03.89#ibcon#about to write, iclass 37, count 0 2006.229.13:25:03.89#ibcon#wrote, iclass 37, count 0 2006.229.13:25:03.89#ibcon#about to read 3, iclass 37, count 0 2006.229.13:25:03.93#ibcon#read 3, iclass 37, count 0 2006.229.13:25:03.93#ibcon#about to read 4, iclass 37, count 0 2006.229.13:25:03.93#ibcon#read 4, iclass 37, count 0 2006.229.13:25:03.93#ibcon#about to read 5, iclass 37, count 0 2006.229.13:25:03.93#ibcon#read 5, iclass 37, count 0 2006.229.13:25:03.93#ibcon#about to read 6, iclass 37, count 0 2006.229.13:25:03.93#ibcon#read 6, iclass 37, count 0 2006.229.13:25:03.93#ibcon#end of sib2, iclass 37, count 0 2006.229.13:25:03.93#ibcon#*after write, iclass 37, count 0 2006.229.13:25:03.93#ibcon#*before return 0, iclass 37, count 0 2006.229.13:25:03.93#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:03.93#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:03.93#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:25:03.93#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:25:03.93$vck44/va=3,6 2006.229.13:25:03.93#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.13:25:03.93#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.13:25:03.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:03.93#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:03.99#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:03.99#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:03.99#ibcon#enter wrdev, iclass 39, count 2 2006.229.13:25:03.99#ibcon#first serial, iclass 39, count 2 2006.229.13:25:03.99#ibcon#enter sib2, iclass 39, count 2 2006.229.13:25:03.99#ibcon#flushed, iclass 39, count 2 2006.229.13:25:03.99#ibcon#about to write, iclass 39, count 2 2006.229.13:25:03.99#ibcon#wrote, iclass 39, count 2 2006.229.13:25:03.99#ibcon#about to read 3, iclass 39, count 2 2006.229.13:25:04.01#ibcon#read 3, iclass 39, count 2 2006.229.13:25:04.01#ibcon#about to read 4, iclass 39, count 2 2006.229.13:25:04.01#ibcon#read 4, iclass 39, count 2 2006.229.13:25:04.01#ibcon#about to read 5, iclass 39, count 2 2006.229.13:25:04.01#ibcon#read 5, iclass 39, count 2 2006.229.13:25:04.01#ibcon#about to read 6, iclass 39, count 2 2006.229.13:25:04.01#ibcon#read 6, iclass 39, count 2 2006.229.13:25:04.01#ibcon#end of sib2, iclass 39, count 2 2006.229.13:25:04.01#ibcon#*mode == 0, iclass 39, count 2 2006.229.13:25:04.01#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.13:25:04.01#ibcon#[25=AT03-06\r\n] 2006.229.13:25:04.01#ibcon#*before write, iclass 39, count 2 2006.229.13:25:04.01#ibcon#enter sib2, iclass 39, count 2 2006.229.13:25:04.01#ibcon#flushed, iclass 39, count 2 2006.229.13:25:04.01#ibcon#about to write, iclass 39, count 2 2006.229.13:25:04.01#ibcon#wrote, iclass 39, count 2 2006.229.13:25:04.01#ibcon#about to read 3, iclass 39, count 2 2006.229.13:25:04.04#ibcon#read 3, iclass 39, count 2 2006.229.13:25:04.04#ibcon#about to read 4, iclass 39, count 2 2006.229.13:25:04.04#ibcon#read 4, iclass 39, count 2 2006.229.13:25:04.04#ibcon#about to read 5, iclass 39, count 2 2006.229.13:25:04.04#ibcon#read 5, iclass 39, count 2 2006.229.13:25:04.04#ibcon#about to read 6, iclass 39, count 2 2006.229.13:25:04.04#ibcon#read 6, iclass 39, count 2 2006.229.13:25:04.04#ibcon#end of sib2, iclass 39, count 2 2006.229.13:25:04.04#ibcon#*after write, iclass 39, count 2 2006.229.13:25:04.04#ibcon#*before return 0, iclass 39, count 2 2006.229.13:25:04.04#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:04.04#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:04.04#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.13:25:04.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:04.04#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:04.16#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:04.16#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:04.16#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:25:04.16#ibcon#first serial, iclass 39, count 0 2006.229.13:25:04.16#ibcon#enter sib2, iclass 39, count 0 2006.229.13:25:04.16#ibcon#flushed, iclass 39, count 0 2006.229.13:25:04.16#ibcon#about to write, iclass 39, count 0 2006.229.13:25:04.16#ibcon#wrote, iclass 39, count 0 2006.229.13:25:04.16#ibcon#about to read 3, iclass 39, count 0 2006.229.13:25:04.18#ibcon#read 3, iclass 39, count 0 2006.229.13:25:04.18#ibcon#about to read 4, iclass 39, count 0 2006.229.13:25:04.18#ibcon#read 4, iclass 39, count 0 2006.229.13:25:04.18#ibcon#about to read 5, iclass 39, count 0 2006.229.13:25:04.18#ibcon#read 5, iclass 39, count 0 2006.229.13:25:04.18#ibcon#about to read 6, iclass 39, count 0 2006.229.13:25:04.18#ibcon#read 6, iclass 39, count 0 2006.229.13:25:04.18#ibcon#end of sib2, iclass 39, count 0 2006.229.13:25:04.18#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:25:04.18#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:25:04.18#ibcon#[25=USB\r\n] 2006.229.13:25:04.18#ibcon#*before write, iclass 39, count 0 2006.229.13:25:04.18#ibcon#enter sib2, iclass 39, count 0 2006.229.13:25:04.18#ibcon#flushed, iclass 39, count 0 2006.229.13:25:04.18#ibcon#about to write, iclass 39, count 0 2006.229.13:25:04.18#ibcon#wrote, iclass 39, count 0 2006.229.13:25:04.18#ibcon#about to read 3, iclass 39, count 0 2006.229.13:25:04.21#ibcon#read 3, iclass 39, count 0 2006.229.13:25:04.21#ibcon#about to read 4, iclass 39, count 0 2006.229.13:25:04.21#ibcon#read 4, iclass 39, count 0 2006.229.13:25:04.21#ibcon#about to read 5, iclass 39, count 0 2006.229.13:25:04.21#ibcon#read 5, iclass 39, count 0 2006.229.13:25:04.21#ibcon#about to read 6, iclass 39, count 0 2006.229.13:25:04.21#ibcon#read 6, iclass 39, count 0 2006.229.13:25:04.21#ibcon#end of sib2, iclass 39, count 0 2006.229.13:25:04.21#ibcon#*after write, iclass 39, count 0 2006.229.13:25:04.21#ibcon#*before return 0, iclass 39, count 0 2006.229.13:25:04.21#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:04.21#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:04.21#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:25:04.21#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:25:04.21$vck44/valo=4,624.99 2006.229.13:25:04.21#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:25:04.21#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:25:04.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:04.21#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:04.21#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:04.21#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:04.21#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:25:04.21#ibcon#first serial, iclass 3, count 0 2006.229.13:25:04.21#ibcon#enter sib2, iclass 3, count 0 2006.229.13:25:04.21#ibcon#flushed, iclass 3, count 0 2006.229.13:25:04.21#ibcon#about to write, iclass 3, count 0 2006.229.13:25:04.21#ibcon#wrote, iclass 3, count 0 2006.229.13:25:04.21#ibcon#about to read 3, iclass 3, count 0 2006.229.13:25:04.23#ibcon#read 3, iclass 3, count 0 2006.229.13:25:04.23#ibcon#about to read 4, iclass 3, count 0 2006.229.13:25:04.23#ibcon#read 4, iclass 3, count 0 2006.229.13:25:04.23#ibcon#about to read 5, iclass 3, count 0 2006.229.13:25:04.23#ibcon#read 5, iclass 3, count 0 2006.229.13:25:04.23#ibcon#about to read 6, iclass 3, count 0 2006.229.13:25:04.23#ibcon#read 6, iclass 3, count 0 2006.229.13:25:04.23#ibcon#end of sib2, iclass 3, count 0 2006.229.13:25:04.23#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:25:04.23#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:25:04.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:25:04.23#ibcon#*before write, iclass 3, count 0 2006.229.13:25:04.23#ibcon#enter sib2, iclass 3, count 0 2006.229.13:25:04.23#ibcon#flushed, iclass 3, count 0 2006.229.13:25:04.23#ibcon#about to write, iclass 3, count 0 2006.229.13:25:04.23#ibcon#wrote, iclass 3, count 0 2006.229.13:25:04.23#ibcon#about to read 3, iclass 3, count 0 2006.229.13:25:04.27#ibcon#read 3, iclass 3, count 0 2006.229.13:25:04.27#ibcon#about to read 4, iclass 3, count 0 2006.229.13:25:04.27#ibcon#read 4, iclass 3, count 0 2006.229.13:25:04.27#ibcon#about to read 5, iclass 3, count 0 2006.229.13:25:04.27#ibcon#read 5, iclass 3, count 0 2006.229.13:25:04.27#ibcon#about to read 6, iclass 3, count 0 2006.229.13:25:04.27#ibcon#read 6, iclass 3, count 0 2006.229.13:25:04.27#ibcon#end of sib2, iclass 3, count 0 2006.229.13:25:04.27#ibcon#*after write, iclass 3, count 0 2006.229.13:25:04.27#ibcon#*before return 0, iclass 3, count 0 2006.229.13:25:04.27#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:04.27#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:04.27#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:25:04.27#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:25:04.27$vck44/va=4,7 2006.229.13:25:04.27#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.13:25:04.27#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.13:25:04.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:04.27#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:04.33#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:04.33#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:04.33#ibcon#enter wrdev, iclass 5, count 2 2006.229.13:25:04.33#ibcon#first serial, iclass 5, count 2 2006.229.13:25:04.33#ibcon#enter sib2, iclass 5, count 2 2006.229.13:25:04.33#ibcon#flushed, iclass 5, count 2 2006.229.13:25:04.33#ibcon#about to write, iclass 5, count 2 2006.229.13:25:04.33#ibcon#wrote, iclass 5, count 2 2006.229.13:25:04.33#ibcon#about to read 3, iclass 5, count 2 2006.229.13:25:04.35#ibcon#read 3, iclass 5, count 2 2006.229.13:25:04.35#ibcon#about to read 4, iclass 5, count 2 2006.229.13:25:04.35#ibcon#read 4, iclass 5, count 2 2006.229.13:25:04.35#ibcon#about to read 5, iclass 5, count 2 2006.229.13:25:04.35#ibcon#read 5, iclass 5, count 2 2006.229.13:25:04.35#ibcon#about to read 6, iclass 5, count 2 2006.229.13:25:04.35#ibcon#read 6, iclass 5, count 2 2006.229.13:25:04.35#ibcon#end of sib2, iclass 5, count 2 2006.229.13:25:04.35#ibcon#*mode == 0, iclass 5, count 2 2006.229.13:25:04.35#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.13:25:04.35#ibcon#[25=AT04-07\r\n] 2006.229.13:25:04.35#ibcon#*before write, iclass 5, count 2 2006.229.13:25:04.35#ibcon#enter sib2, iclass 5, count 2 2006.229.13:25:04.35#ibcon#flushed, iclass 5, count 2 2006.229.13:25:04.35#ibcon#about to write, iclass 5, count 2 2006.229.13:25:04.35#ibcon#wrote, iclass 5, count 2 2006.229.13:25:04.35#ibcon#about to read 3, iclass 5, count 2 2006.229.13:25:04.38#ibcon#read 3, iclass 5, count 2 2006.229.13:25:04.38#ibcon#about to read 4, iclass 5, count 2 2006.229.13:25:04.38#ibcon#read 4, iclass 5, count 2 2006.229.13:25:04.38#ibcon#about to read 5, iclass 5, count 2 2006.229.13:25:04.38#ibcon#read 5, iclass 5, count 2 2006.229.13:25:04.38#ibcon#about to read 6, iclass 5, count 2 2006.229.13:25:04.38#ibcon#read 6, iclass 5, count 2 2006.229.13:25:04.38#ibcon#end of sib2, iclass 5, count 2 2006.229.13:25:04.38#ibcon#*after write, iclass 5, count 2 2006.229.13:25:04.38#ibcon#*before return 0, iclass 5, count 2 2006.229.13:25:04.38#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:04.38#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:04.38#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.13:25:04.38#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:04.38#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:04.50#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:04.50#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:04.50#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:25:04.50#ibcon#first serial, iclass 5, count 0 2006.229.13:25:04.50#ibcon#enter sib2, iclass 5, count 0 2006.229.13:25:04.50#ibcon#flushed, iclass 5, count 0 2006.229.13:25:04.50#ibcon#about to write, iclass 5, count 0 2006.229.13:25:04.50#ibcon#wrote, iclass 5, count 0 2006.229.13:25:04.50#ibcon#about to read 3, iclass 5, count 0 2006.229.13:25:04.52#ibcon#read 3, iclass 5, count 0 2006.229.13:25:04.52#ibcon#about to read 4, iclass 5, count 0 2006.229.13:25:04.52#ibcon#read 4, iclass 5, count 0 2006.229.13:25:04.52#ibcon#about to read 5, iclass 5, count 0 2006.229.13:25:04.52#ibcon#read 5, iclass 5, count 0 2006.229.13:25:04.52#ibcon#about to read 6, iclass 5, count 0 2006.229.13:25:04.52#ibcon#read 6, iclass 5, count 0 2006.229.13:25:04.52#ibcon#end of sib2, iclass 5, count 0 2006.229.13:25:04.52#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:25:04.52#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:25:04.52#ibcon#[25=USB\r\n] 2006.229.13:25:04.52#ibcon#*before write, iclass 5, count 0 2006.229.13:25:04.52#ibcon#enter sib2, iclass 5, count 0 2006.229.13:25:04.52#ibcon#flushed, iclass 5, count 0 2006.229.13:25:04.52#ibcon#about to write, iclass 5, count 0 2006.229.13:25:04.52#ibcon#wrote, iclass 5, count 0 2006.229.13:25:04.52#ibcon#about to read 3, iclass 5, count 0 2006.229.13:25:04.55#ibcon#read 3, iclass 5, count 0 2006.229.13:25:04.55#ibcon#about to read 4, iclass 5, count 0 2006.229.13:25:04.55#ibcon#read 4, iclass 5, count 0 2006.229.13:25:04.55#ibcon#about to read 5, iclass 5, count 0 2006.229.13:25:04.55#ibcon#read 5, iclass 5, count 0 2006.229.13:25:04.55#ibcon#about to read 6, iclass 5, count 0 2006.229.13:25:04.55#ibcon#read 6, iclass 5, count 0 2006.229.13:25:04.55#ibcon#end of sib2, iclass 5, count 0 2006.229.13:25:04.55#ibcon#*after write, iclass 5, count 0 2006.229.13:25:04.55#ibcon#*before return 0, iclass 5, count 0 2006.229.13:25:04.55#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:04.55#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:04.55#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:25:04.55#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:25:04.55$vck44/valo=5,734.99 2006.229.13:25:04.55#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:25:04.55#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:25:04.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:04.55#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:04.55#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:04.55#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:04.55#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:25:04.55#ibcon#first serial, iclass 7, count 0 2006.229.13:25:04.55#ibcon#enter sib2, iclass 7, count 0 2006.229.13:25:04.55#ibcon#flushed, iclass 7, count 0 2006.229.13:25:04.55#ibcon#about to write, iclass 7, count 0 2006.229.13:25:04.55#ibcon#wrote, iclass 7, count 0 2006.229.13:25:04.55#ibcon#about to read 3, iclass 7, count 0 2006.229.13:25:04.57#ibcon#read 3, iclass 7, count 0 2006.229.13:25:04.57#ibcon#about to read 4, iclass 7, count 0 2006.229.13:25:04.57#ibcon#read 4, iclass 7, count 0 2006.229.13:25:04.57#ibcon#about to read 5, iclass 7, count 0 2006.229.13:25:04.57#ibcon#read 5, iclass 7, count 0 2006.229.13:25:04.57#ibcon#about to read 6, iclass 7, count 0 2006.229.13:25:04.57#ibcon#read 6, iclass 7, count 0 2006.229.13:25:04.57#ibcon#end of sib2, iclass 7, count 0 2006.229.13:25:04.57#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:25:04.57#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:25:04.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:25:04.57#ibcon#*before write, iclass 7, count 0 2006.229.13:25:04.57#ibcon#enter sib2, iclass 7, count 0 2006.229.13:25:04.57#ibcon#flushed, iclass 7, count 0 2006.229.13:25:04.57#ibcon#about to write, iclass 7, count 0 2006.229.13:25:04.57#ibcon#wrote, iclass 7, count 0 2006.229.13:25:04.57#ibcon#about to read 3, iclass 7, count 0 2006.229.13:25:04.61#ibcon#read 3, iclass 7, count 0 2006.229.13:25:04.61#ibcon#about to read 4, iclass 7, count 0 2006.229.13:25:04.61#ibcon#read 4, iclass 7, count 0 2006.229.13:25:04.61#ibcon#about to read 5, iclass 7, count 0 2006.229.13:25:04.61#ibcon#read 5, iclass 7, count 0 2006.229.13:25:04.61#ibcon#about to read 6, iclass 7, count 0 2006.229.13:25:04.61#ibcon#read 6, iclass 7, count 0 2006.229.13:25:04.61#ibcon#end of sib2, iclass 7, count 0 2006.229.13:25:04.61#ibcon#*after write, iclass 7, count 0 2006.229.13:25:04.61#ibcon#*before return 0, iclass 7, count 0 2006.229.13:25:04.61#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:04.61#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:04.61#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:25:04.61#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:25:04.61$vck44/va=5,4 2006.229.13:25:04.61#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.13:25:04.61#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.13:25:04.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:04.61#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:04.67#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:04.67#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:04.67#ibcon#enter wrdev, iclass 11, count 2 2006.229.13:25:04.67#ibcon#first serial, iclass 11, count 2 2006.229.13:25:04.67#ibcon#enter sib2, iclass 11, count 2 2006.229.13:25:04.67#ibcon#flushed, iclass 11, count 2 2006.229.13:25:04.67#ibcon#about to write, iclass 11, count 2 2006.229.13:25:04.67#ibcon#wrote, iclass 11, count 2 2006.229.13:25:04.67#ibcon#about to read 3, iclass 11, count 2 2006.229.13:25:04.69#ibcon#read 3, iclass 11, count 2 2006.229.13:25:04.69#ibcon#about to read 4, iclass 11, count 2 2006.229.13:25:04.69#ibcon#read 4, iclass 11, count 2 2006.229.13:25:04.69#ibcon#about to read 5, iclass 11, count 2 2006.229.13:25:04.69#ibcon#read 5, iclass 11, count 2 2006.229.13:25:04.69#ibcon#about to read 6, iclass 11, count 2 2006.229.13:25:04.69#ibcon#read 6, iclass 11, count 2 2006.229.13:25:04.69#ibcon#end of sib2, iclass 11, count 2 2006.229.13:25:04.69#ibcon#*mode == 0, iclass 11, count 2 2006.229.13:25:04.69#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.13:25:04.69#ibcon#[25=AT05-04\r\n] 2006.229.13:25:04.69#ibcon#*before write, iclass 11, count 2 2006.229.13:25:04.69#ibcon#enter sib2, iclass 11, count 2 2006.229.13:25:04.69#ibcon#flushed, iclass 11, count 2 2006.229.13:25:04.69#ibcon#about to write, iclass 11, count 2 2006.229.13:25:04.69#ibcon#wrote, iclass 11, count 2 2006.229.13:25:04.69#ibcon#about to read 3, iclass 11, count 2 2006.229.13:25:04.72#ibcon#read 3, iclass 11, count 2 2006.229.13:25:04.72#ibcon#about to read 4, iclass 11, count 2 2006.229.13:25:04.72#ibcon#read 4, iclass 11, count 2 2006.229.13:25:04.72#ibcon#about to read 5, iclass 11, count 2 2006.229.13:25:04.72#ibcon#read 5, iclass 11, count 2 2006.229.13:25:04.72#ibcon#about to read 6, iclass 11, count 2 2006.229.13:25:04.72#ibcon#read 6, iclass 11, count 2 2006.229.13:25:04.72#ibcon#end of sib2, iclass 11, count 2 2006.229.13:25:04.72#ibcon#*after write, iclass 11, count 2 2006.229.13:25:04.72#ibcon#*before return 0, iclass 11, count 2 2006.229.13:25:04.72#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:04.72#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:04.72#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.13:25:04.72#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:04.72#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:04.84#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:04.84#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:04.84#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:25:04.84#ibcon#first serial, iclass 11, count 0 2006.229.13:25:04.84#ibcon#enter sib2, iclass 11, count 0 2006.229.13:25:04.84#ibcon#flushed, iclass 11, count 0 2006.229.13:25:04.84#ibcon#about to write, iclass 11, count 0 2006.229.13:25:04.84#ibcon#wrote, iclass 11, count 0 2006.229.13:25:04.84#ibcon#about to read 3, iclass 11, count 0 2006.229.13:25:04.86#ibcon#read 3, iclass 11, count 0 2006.229.13:25:04.86#ibcon#about to read 4, iclass 11, count 0 2006.229.13:25:04.86#ibcon#read 4, iclass 11, count 0 2006.229.13:25:04.86#ibcon#about to read 5, iclass 11, count 0 2006.229.13:25:04.86#ibcon#read 5, iclass 11, count 0 2006.229.13:25:04.86#ibcon#about to read 6, iclass 11, count 0 2006.229.13:25:04.86#ibcon#read 6, iclass 11, count 0 2006.229.13:25:04.86#ibcon#end of sib2, iclass 11, count 0 2006.229.13:25:04.86#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:25:04.86#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:25:04.86#ibcon#[25=USB\r\n] 2006.229.13:25:04.86#ibcon#*before write, iclass 11, count 0 2006.229.13:25:04.86#ibcon#enter sib2, iclass 11, count 0 2006.229.13:25:04.86#ibcon#flushed, iclass 11, count 0 2006.229.13:25:04.86#ibcon#about to write, iclass 11, count 0 2006.229.13:25:04.86#ibcon#wrote, iclass 11, count 0 2006.229.13:25:04.86#ibcon#about to read 3, iclass 11, count 0 2006.229.13:25:04.89#ibcon#read 3, iclass 11, count 0 2006.229.13:25:04.89#ibcon#about to read 4, iclass 11, count 0 2006.229.13:25:04.89#ibcon#read 4, iclass 11, count 0 2006.229.13:25:04.89#ibcon#about to read 5, iclass 11, count 0 2006.229.13:25:04.89#ibcon#read 5, iclass 11, count 0 2006.229.13:25:04.89#ibcon#about to read 6, iclass 11, count 0 2006.229.13:25:04.89#ibcon#read 6, iclass 11, count 0 2006.229.13:25:04.89#ibcon#end of sib2, iclass 11, count 0 2006.229.13:25:04.89#ibcon#*after write, iclass 11, count 0 2006.229.13:25:04.89#ibcon#*before return 0, iclass 11, count 0 2006.229.13:25:04.89#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:04.89#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:04.89#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:25:04.89#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:25:04.89$vck44/valo=6,814.99 2006.229.13:25:04.89#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:25:04.89#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:25:04.89#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:04.89#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:04.89#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:04.89#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:04.89#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:25:04.89#ibcon#first serial, iclass 13, count 0 2006.229.13:25:04.89#ibcon#enter sib2, iclass 13, count 0 2006.229.13:25:04.89#ibcon#flushed, iclass 13, count 0 2006.229.13:25:04.89#ibcon#about to write, iclass 13, count 0 2006.229.13:25:04.89#ibcon#wrote, iclass 13, count 0 2006.229.13:25:04.89#ibcon#about to read 3, iclass 13, count 0 2006.229.13:25:04.91#ibcon#read 3, iclass 13, count 0 2006.229.13:25:04.91#ibcon#about to read 4, iclass 13, count 0 2006.229.13:25:04.91#ibcon#read 4, iclass 13, count 0 2006.229.13:25:04.91#ibcon#about to read 5, iclass 13, count 0 2006.229.13:25:04.91#ibcon#read 5, iclass 13, count 0 2006.229.13:25:04.91#ibcon#about to read 6, iclass 13, count 0 2006.229.13:25:04.91#ibcon#read 6, iclass 13, count 0 2006.229.13:25:04.91#ibcon#end of sib2, iclass 13, count 0 2006.229.13:25:04.91#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:25:04.91#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:25:04.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:25:04.91#ibcon#*before write, iclass 13, count 0 2006.229.13:25:04.91#ibcon#enter sib2, iclass 13, count 0 2006.229.13:25:04.91#ibcon#flushed, iclass 13, count 0 2006.229.13:25:04.91#ibcon#about to write, iclass 13, count 0 2006.229.13:25:04.91#ibcon#wrote, iclass 13, count 0 2006.229.13:25:04.91#ibcon#about to read 3, iclass 13, count 0 2006.229.13:25:04.95#ibcon#read 3, iclass 13, count 0 2006.229.13:25:04.95#ibcon#about to read 4, iclass 13, count 0 2006.229.13:25:04.95#ibcon#read 4, iclass 13, count 0 2006.229.13:25:04.95#ibcon#about to read 5, iclass 13, count 0 2006.229.13:25:04.95#ibcon#read 5, iclass 13, count 0 2006.229.13:25:04.95#ibcon#about to read 6, iclass 13, count 0 2006.229.13:25:04.95#ibcon#read 6, iclass 13, count 0 2006.229.13:25:04.95#ibcon#end of sib2, iclass 13, count 0 2006.229.13:25:04.95#ibcon#*after write, iclass 13, count 0 2006.229.13:25:04.95#ibcon#*before return 0, iclass 13, count 0 2006.229.13:25:04.95#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:04.95#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:04.95#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:25:04.95#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:25:04.95$vck44/va=6,4 2006.229.13:25:04.95#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.13:25:04.95#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.13:25:04.95#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:04.95#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:05.01#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:05.01#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:05.01#ibcon#enter wrdev, iclass 15, count 2 2006.229.13:25:05.01#ibcon#first serial, iclass 15, count 2 2006.229.13:25:05.01#ibcon#enter sib2, iclass 15, count 2 2006.229.13:25:05.01#ibcon#flushed, iclass 15, count 2 2006.229.13:25:05.01#ibcon#about to write, iclass 15, count 2 2006.229.13:25:05.01#ibcon#wrote, iclass 15, count 2 2006.229.13:25:05.01#ibcon#about to read 3, iclass 15, count 2 2006.229.13:25:05.03#ibcon#read 3, iclass 15, count 2 2006.229.13:25:05.03#ibcon#about to read 4, iclass 15, count 2 2006.229.13:25:05.03#ibcon#read 4, iclass 15, count 2 2006.229.13:25:05.03#ibcon#about to read 5, iclass 15, count 2 2006.229.13:25:05.03#ibcon#read 5, iclass 15, count 2 2006.229.13:25:05.03#ibcon#about to read 6, iclass 15, count 2 2006.229.13:25:05.03#ibcon#read 6, iclass 15, count 2 2006.229.13:25:05.03#ibcon#end of sib2, iclass 15, count 2 2006.229.13:25:05.03#ibcon#*mode == 0, iclass 15, count 2 2006.229.13:25:05.03#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.13:25:05.03#ibcon#[25=AT06-04\r\n] 2006.229.13:25:05.03#ibcon#*before write, iclass 15, count 2 2006.229.13:25:05.03#ibcon#enter sib2, iclass 15, count 2 2006.229.13:25:05.03#ibcon#flushed, iclass 15, count 2 2006.229.13:25:05.03#ibcon#about to write, iclass 15, count 2 2006.229.13:25:05.03#ibcon#wrote, iclass 15, count 2 2006.229.13:25:05.03#ibcon#about to read 3, iclass 15, count 2 2006.229.13:25:05.06#ibcon#read 3, iclass 15, count 2 2006.229.13:25:05.06#ibcon#about to read 4, iclass 15, count 2 2006.229.13:25:05.06#ibcon#read 4, iclass 15, count 2 2006.229.13:25:05.06#ibcon#about to read 5, iclass 15, count 2 2006.229.13:25:05.06#ibcon#read 5, iclass 15, count 2 2006.229.13:25:05.06#ibcon#about to read 6, iclass 15, count 2 2006.229.13:25:05.06#ibcon#read 6, iclass 15, count 2 2006.229.13:25:05.06#ibcon#end of sib2, iclass 15, count 2 2006.229.13:25:05.06#ibcon#*after write, iclass 15, count 2 2006.229.13:25:05.06#ibcon#*before return 0, iclass 15, count 2 2006.229.13:25:05.06#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:05.06#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:05.06#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.13:25:05.06#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:05.06#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:05.18#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:05.18#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:05.18#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:25:05.18#ibcon#first serial, iclass 15, count 0 2006.229.13:25:05.18#ibcon#enter sib2, iclass 15, count 0 2006.229.13:25:05.18#ibcon#flushed, iclass 15, count 0 2006.229.13:25:05.18#ibcon#about to write, iclass 15, count 0 2006.229.13:25:05.18#ibcon#wrote, iclass 15, count 0 2006.229.13:25:05.18#ibcon#about to read 3, iclass 15, count 0 2006.229.13:25:05.20#ibcon#read 3, iclass 15, count 0 2006.229.13:25:05.20#ibcon#about to read 4, iclass 15, count 0 2006.229.13:25:05.20#ibcon#read 4, iclass 15, count 0 2006.229.13:25:05.20#ibcon#about to read 5, iclass 15, count 0 2006.229.13:25:05.20#ibcon#read 5, iclass 15, count 0 2006.229.13:25:05.20#ibcon#about to read 6, iclass 15, count 0 2006.229.13:25:05.20#ibcon#read 6, iclass 15, count 0 2006.229.13:25:05.20#ibcon#end of sib2, iclass 15, count 0 2006.229.13:25:05.20#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:25:05.20#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:25:05.20#ibcon#[25=USB\r\n] 2006.229.13:25:05.20#ibcon#*before write, iclass 15, count 0 2006.229.13:25:05.20#ibcon#enter sib2, iclass 15, count 0 2006.229.13:25:05.20#ibcon#flushed, iclass 15, count 0 2006.229.13:25:05.20#ibcon#about to write, iclass 15, count 0 2006.229.13:25:05.20#ibcon#wrote, iclass 15, count 0 2006.229.13:25:05.20#ibcon#about to read 3, iclass 15, count 0 2006.229.13:25:05.23#ibcon#read 3, iclass 15, count 0 2006.229.13:25:05.23#ibcon#about to read 4, iclass 15, count 0 2006.229.13:25:05.23#ibcon#read 4, iclass 15, count 0 2006.229.13:25:05.23#ibcon#about to read 5, iclass 15, count 0 2006.229.13:25:05.23#ibcon#read 5, iclass 15, count 0 2006.229.13:25:05.23#ibcon#about to read 6, iclass 15, count 0 2006.229.13:25:05.23#ibcon#read 6, iclass 15, count 0 2006.229.13:25:05.23#ibcon#end of sib2, iclass 15, count 0 2006.229.13:25:05.23#ibcon#*after write, iclass 15, count 0 2006.229.13:25:05.23#ibcon#*before return 0, iclass 15, count 0 2006.229.13:25:05.23#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:05.23#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:05.23#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:25:05.23#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:25:05.23$vck44/valo=7,864.99 2006.229.13:25:05.23#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.13:25:05.23#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.13:25:05.23#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:05.23#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:25:05.23#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:25:05.23#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:25:05.23#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:25:05.23#ibcon#first serial, iclass 17, count 0 2006.229.13:25:05.23#ibcon#enter sib2, iclass 17, count 0 2006.229.13:25:05.23#ibcon#flushed, iclass 17, count 0 2006.229.13:25:05.23#ibcon#about to write, iclass 17, count 0 2006.229.13:25:05.23#ibcon#wrote, iclass 17, count 0 2006.229.13:25:05.23#ibcon#about to read 3, iclass 17, count 0 2006.229.13:25:05.25#ibcon#read 3, iclass 17, count 0 2006.229.13:25:05.25#ibcon#about to read 4, iclass 17, count 0 2006.229.13:25:05.25#ibcon#read 4, iclass 17, count 0 2006.229.13:25:05.25#ibcon#about to read 5, iclass 17, count 0 2006.229.13:25:05.25#ibcon#read 5, iclass 17, count 0 2006.229.13:25:05.25#ibcon#about to read 6, iclass 17, count 0 2006.229.13:25:05.25#ibcon#read 6, iclass 17, count 0 2006.229.13:25:05.25#ibcon#end of sib2, iclass 17, count 0 2006.229.13:25:05.25#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:25:05.25#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:25:05.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:25:05.25#ibcon#*before write, iclass 17, count 0 2006.229.13:25:05.25#ibcon#enter sib2, iclass 17, count 0 2006.229.13:25:05.25#ibcon#flushed, iclass 17, count 0 2006.229.13:25:05.25#ibcon#about to write, iclass 17, count 0 2006.229.13:25:05.25#ibcon#wrote, iclass 17, count 0 2006.229.13:25:05.25#ibcon#about to read 3, iclass 17, count 0 2006.229.13:25:05.29#ibcon#read 3, iclass 17, count 0 2006.229.13:25:05.29#ibcon#about to read 4, iclass 17, count 0 2006.229.13:25:05.29#ibcon#read 4, iclass 17, count 0 2006.229.13:25:05.29#ibcon#about to read 5, iclass 17, count 0 2006.229.13:25:05.29#ibcon#read 5, iclass 17, count 0 2006.229.13:25:05.29#ibcon#about to read 6, iclass 17, count 0 2006.229.13:25:05.29#ibcon#read 6, iclass 17, count 0 2006.229.13:25:05.29#ibcon#end of sib2, iclass 17, count 0 2006.229.13:25:05.29#ibcon#*after write, iclass 17, count 0 2006.229.13:25:05.29#ibcon#*before return 0, iclass 17, count 0 2006.229.13:25:05.29#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:25:05.29#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:25:05.29#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:25:05.29#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:25:05.29$vck44/va=7,5 2006.229.13:25:05.29#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.13:25:05.29#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.13:25:05.29#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:05.29#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:25:05.35#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:25:05.35#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:25:05.35#ibcon#enter wrdev, iclass 19, count 2 2006.229.13:25:05.35#ibcon#first serial, iclass 19, count 2 2006.229.13:25:05.35#ibcon#enter sib2, iclass 19, count 2 2006.229.13:25:05.35#ibcon#flushed, iclass 19, count 2 2006.229.13:25:05.35#ibcon#about to write, iclass 19, count 2 2006.229.13:25:05.35#ibcon#wrote, iclass 19, count 2 2006.229.13:25:05.35#ibcon#about to read 3, iclass 19, count 2 2006.229.13:25:05.37#ibcon#read 3, iclass 19, count 2 2006.229.13:25:05.37#ibcon#about to read 4, iclass 19, count 2 2006.229.13:25:05.37#ibcon#read 4, iclass 19, count 2 2006.229.13:25:05.37#ibcon#about to read 5, iclass 19, count 2 2006.229.13:25:05.37#ibcon#read 5, iclass 19, count 2 2006.229.13:25:05.37#ibcon#about to read 6, iclass 19, count 2 2006.229.13:25:05.37#ibcon#read 6, iclass 19, count 2 2006.229.13:25:05.37#ibcon#end of sib2, iclass 19, count 2 2006.229.13:25:05.37#ibcon#*mode == 0, iclass 19, count 2 2006.229.13:25:05.37#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.13:25:05.37#ibcon#[25=AT07-05\r\n] 2006.229.13:25:05.37#ibcon#*before write, iclass 19, count 2 2006.229.13:25:05.37#ibcon#enter sib2, iclass 19, count 2 2006.229.13:25:05.37#ibcon#flushed, iclass 19, count 2 2006.229.13:25:05.37#ibcon#about to write, iclass 19, count 2 2006.229.13:25:05.37#ibcon#wrote, iclass 19, count 2 2006.229.13:25:05.37#ibcon#about to read 3, iclass 19, count 2 2006.229.13:25:05.40#ibcon#read 3, iclass 19, count 2 2006.229.13:25:05.40#ibcon#about to read 4, iclass 19, count 2 2006.229.13:25:05.40#ibcon#read 4, iclass 19, count 2 2006.229.13:25:05.40#ibcon#about to read 5, iclass 19, count 2 2006.229.13:25:05.40#ibcon#read 5, iclass 19, count 2 2006.229.13:25:05.40#ibcon#about to read 6, iclass 19, count 2 2006.229.13:25:05.40#ibcon#read 6, iclass 19, count 2 2006.229.13:25:05.40#ibcon#end of sib2, iclass 19, count 2 2006.229.13:25:05.40#ibcon#*after write, iclass 19, count 2 2006.229.13:25:05.40#ibcon#*before return 0, iclass 19, count 2 2006.229.13:25:05.40#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:25:05.40#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:25:05.40#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.13:25:05.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:05.40#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:25:05.52#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:25:05.52#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:25:05.52#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:25:05.52#ibcon#first serial, iclass 19, count 0 2006.229.13:25:05.52#ibcon#enter sib2, iclass 19, count 0 2006.229.13:25:05.52#ibcon#flushed, iclass 19, count 0 2006.229.13:25:05.52#ibcon#about to write, iclass 19, count 0 2006.229.13:25:05.52#ibcon#wrote, iclass 19, count 0 2006.229.13:25:05.52#ibcon#about to read 3, iclass 19, count 0 2006.229.13:25:05.54#ibcon#read 3, iclass 19, count 0 2006.229.13:25:05.54#ibcon#about to read 4, iclass 19, count 0 2006.229.13:25:05.54#ibcon#read 4, iclass 19, count 0 2006.229.13:25:05.54#ibcon#about to read 5, iclass 19, count 0 2006.229.13:25:05.54#ibcon#read 5, iclass 19, count 0 2006.229.13:25:05.54#ibcon#about to read 6, iclass 19, count 0 2006.229.13:25:05.54#ibcon#read 6, iclass 19, count 0 2006.229.13:25:05.54#ibcon#end of sib2, iclass 19, count 0 2006.229.13:25:05.54#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:25:05.54#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:25:05.54#ibcon#[25=USB\r\n] 2006.229.13:25:05.54#ibcon#*before write, iclass 19, count 0 2006.229.13:25:05.54#ibcon#enter sib2, iclass 19, count 0 2006.229.13:25:05.54#ibcon#flushed, iclass 19, count 0 2006.229.13:25:05.54#ibcon#about to write, iclass 19, count 0 2006.229.13:25:05.54#ibcon#wrote, iclass 19, count 0 2006.229.13:25:05.54#ibcon#about to read 3, iclass 19, count 0 2006.229.13:25:05.57#ibcon#read 3, iclass 19, count 0 2006.229.13:25:05.57#ibcon#about to read 4, iclass 19, count 0 2006.229.13:25:05.57#ibcon#read 4, iclass 19, count 0 2006.229.13:25:05.57#ibcon#about to read 5, iclass 19, count 0 2006.229.13:25:05.57#ibcon#read 5, iclass 19, count 0 2006.229.13:25:05.57#ibcon#about to read 6, iclass 19, count 0 2006.229.13:25:05.57#ibcon#read 6, iclass 19, count 0 2006.229.13:25:05.57#ibcon#end of sib2, iclass 19, count 0 2006.229.13:25:05.57#ibcon#*after write, iclass 19, count 0 2006.229.13:25:05.57#ibcon#*before return 0, iclass 19, count 0 2006.229.13:25:05.57#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:25:05.57#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:25:05.57#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:25:05.57#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:25:05.57$vck44/valo=8,884.99 2006.229.13:25:05.57#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.13:25:05.57#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.13:25:05.57#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:05.57#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:05.57#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:05.57#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:05.57#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:25:05.57#ibcon#first serial, iclass 21, count 0 2006.229.13:25:05.57#ibcon#enter sib2, iclass 21, count 0 2006.229.13:25:05.57#ibcon#flushed, iclass 21, count 0 2006.229.13:25:05.57#ibcon#about to write, iclass 21, count 0 2006.229.13:25:05.57#ibcon#wrote, iclass 21, count 0 2006.229.13:25:05.57#ibcon#about to read 3, iclass 21, count 0 2006.229.13:25:05.59#ibcon#read 3, iclass 21, count 0 2006.229.13:25:05.59#ibcon#about to read 4, iclass 21, count 0 2006.229.13:25:05.59#ibcon#read 4, iclass 21, count 0 2006.229.13:25:05.59#ibcon#about to read 5, iclass 21, count 0 2006.229.13:25:05.59#ibcon#read 5, iclass 21, count 0 2006.229.13:25:05.59#ibcon#about to read 6, iclass 21, count 0 2006.229.13:25:05.59#ibcon#read 6, iclass 21, count 0 2006.229.13:25:05.59#ibcon#end of sib2, iclass 21, count 0 2006.229.13:25:05.59#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:25:05.59#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:25:05.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:25:05.59#ibcon#*before write, iclass 21, count 0 2006.229.13:25:05.59#ibcon#enter sib2, iclass 21, count 0 2006.229.13:25:05.59#ibcon#flushed, iclass 21, count 0 2006.229.13:25:05.59#ibcon#about to write, iclass 21, count 0 2006.229.13:25:05.59#ibcon#wrote, iclass 21, count 0 2006.229.13:25:05.59#ibcon#about to read 3, iclass 21, count 0 2006.229.13:25:05.63#ibcon#read 3, iclass 21, count 0 2006.229.13:25:05.63#ibcon#about to read 4, iclass 21, count 0 2006.229.13:25:05.63#ibcon#read 4, iclass 21, count 0 2006.229.13:25:05.63#ibcon#about to read 5, iclass 21, count 0 2006.229.13:25:05.63#ibcon#read 5, iclass 21, count 0 2006.229.13:25:05.63#ibcon#about to read 6, iclass 21, count 0 2006.229.13:25:05.63#ibcon#read 6, iclass 21, count 0 2006.229.13:25:05.63#ibcon#end of sib2, iclass 21, count 0 2006.229.13:25:05.63#ibcon#*after write, iclass 21, count 0 2006.229.13:25:05.63#ibcon#*before return 0, iclass 21, count 0 2006.229.13:25:05.63#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:05.63#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:05.63#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:25:05.63#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:25:05.63$vck44/va=8,6 2006.229.13:25:05.63#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.13:25:05.63#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.13:25:05.63#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:05.63#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:05.69#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:05.69#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:05.69#ibcon#enter wrdev, iclass 23, count 2 2006.229.13:25:05.69#ibcon#first serial, iclass 23, count 2 2006.229.13:25:05.69#ibcon#enter sib2, iclass 23, count 2 2006.229.13:25:05.69#ibcon#flushed, iclass 23, count 2 2006.229.13:25:05.69#ibcon#about to write, iclass 23, count 2 2006.229.13:25:05.69#ibcon#wrote, iclass 23, count 2 2006.229.13:25:05.69#ibcon#about to read 3, iclass 23, count 2 2006.229.13:25:05.71#ibcon#read 3, iclass 23, count 2 2006.229.13:25:05.71#ibcon#about to read 4, iclass 23, count 2 2006.229.13:25:05.71#ibcon#read 4, iclass 23, count 2 2006.229.13:25:05.71#ibcon#about to read 5, iclass 23, count 2 2006.229.13:25:05.71#ibcon#read 5, iclass 23, count 2 2006.229.13:25:05.71#ibcon#about to read 6, iclass 23, count 2 2006.229.13:25:05.71#ibcon#read 6, iclass 23, count 2 2006.229.13:25:05.71#ibcon#end of sib2, iclass 23, count 2 2006.229.13:25:05.71#ibcon#*mode == 0, iclass 23, count 2 2006.229.13:25:05.71#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.13:25:05.71#ibcon#[25=AT08-06\r\n] 2006.229.13:25:05.71#ibcon#*before write, iclass 23, count 2 2006.229.13:25:05.71#ibcon#enter sib2, iclass 23, count 2 2006.229.13:25:05.71#ibcon#flushed, iclass 23, count 2 2006.229.13:25:05.71#ibcon#about to write, iclass 23, count 2 2006.229.13:25:05.71#ibcon#wrote, iclass 23, count 2 2006.229.13:25:05.71#ibcon#about to read 3, iclass 23, count 2 2006.229.13:25:05.74#ibcon#read 3, iclass 23, count 2 2006.229.13:25:05.74#ibcon#about to read 4, iclass 23, count 2 2006.229.13:25:05.74#ibcon#read 4, iclass 23, count 2 2006.229.13:25:05.74#ibcon#about to read 5, iclass 23, count 2 2006.229.13:25:05.74#ibcon#read 5, iclass 23, count 2 2006.229.13:25:05.74#ibcon#about to read 6, iclass 23, count 2 2006.229.13:25:05.74#ibcon#read 6, iclass 23, count 2 2006.229.13:25:05.74#ibcon#end of sib2, iclass 23, count 2 2006.229.13:25:05.74#ibcon#*after write, iclass 23, count 2 2006.229.13:25:05.74#ibcon#*before return 0, iclass 23, count 2 2006.229.13:25:05.74#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:05.74#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:05.74#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.13:25:05.74#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:05.74#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:05.86#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:05.86#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:05.86#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:25:05.86#ibcon#first serial, iclass 23, count 0 2006.229.13:25:05.86#ibcon#enter sib2, iclass 23, count 0 2006.229.13:25:05.86#ibcon#flushed, iclass 23, count 0 2006.229.13:25:05.86#ibcon#about to write, iclass 23, count 0 2006.229.13:25:05.86#ibcon#wrote, iclass 23, count 0 2006.229.13:25:05.86#ibcon#about to read 3, iclass 23, count 0 2006.229.13:25:05.88#ibcon#read 3, iclass 23, count 0 2006.229.13:25:05.88#ibcon#about to read 4, iclass 23, count 0 2006.229.13:25:05.88#ibcon#read 4, iclass 23, count 0 2006.229.13:25:05.88#ibcon#about to read 5, iclass 23, count 0 2006.229.13:25:05.88#ibcon#read 5, iclass 23, count 0 2006.229.13:25:05.88#ibcon#about to read 6, iclass 23, count 0 2006.229.13:25:05.88#ibcon#read 6, iclass 23, count 0 2006.229.13:25:05.88#ibcon#end of sib2, iclass 23, count 0 2006.229.13:25:05.88#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:25:05.88#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:25:05.88#ibcon#[25=USB\r\n] 2006.229.13:25:05.88#ibcon#*before write, iclass 23, count 0 2006.229.13:25:05.88#ibcon#enter sib2, iclass 23, count 0 2006.229.13:25:05.88#ibcon#flushed, iclass 23, count 0 2006.229.13:25:05.88#ibcon#about to write, iclass 23, count 0 2006.229.13:25:05.88#ibcon#wrote, iclass 23, count 0 2006.229.13:25:05.88#ibcon#about to read 3, iclass 23, count 0 2006.229.13:25:05.91#ibcon#read 3, iclass 23, count 0 2006.229.13:25:05.91#ibcon#about to read 4, iclass 23, count 0 2006.229.13:25:05.91#ibcon#read 4, iclass 23, count 0 2006.229.13:25:05.91#ibcon#about to read 5, iclass 23, count 0 2006.229.13:25:05.91#ibcon#read 5, iclass 23, count 0 2006.229.13:25:05.91#ibcon#about to read 6, iclass 23, count 0 2006.229.13:25:05.91#ibcon#read 6, iclass 23, count 0 2006.229.13:25:05.91#ibcon#end of sib2, iclass 23, count 0 2006.229.13:25:05.91#ibcon#*after write, iclass 23, count 0 2006.229.13:25:05.91#ibcon#*before return 0, iclass 23, count 0 2006.229.13:25:05.91#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:05.91#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:05.91#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:25:05.91#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:25:05.91$vck44/vblo=1,629.99 2006.229.13:25:05.91#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.13:25:05.91#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.13:25:05.91#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:05.91#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:05.91#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:05.91#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:05.91#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:25:05.91#ibcon#first serial, iclass 25, count 0 2006.229.13:25:05.91#ibcon#enter sib2, iclass 25, count 0 2006.229.13:25:05.91#ibcon#flushed, iclass 25, count 0 2006.229.13:25:05.91#ibcon#about to write, iclass 25, count 0 2006.229.13:25:05.91#ibcon#wrote, iclass 25, count 0 2006.229.13:25:05.91#ibcon#about to read 3, iclass 25, count 0 2006.229.13:25:05.93#ibcon#read 3, iclass 25, count 0 2006.229.13:25:05.93#ibcon#about to read 4, iclass 25, count 0 2006.229.13:25:05.93#ibcon#read 4, iclass 25, count 0 2006.229.13:25:05.93#ibcon#about to read 5, iclass 25, count 0 2006.229.13:25:05.93#ibcon#read 5, iclass 25, count 0 2006.229.13:25:05.93#ibcon#about to read 6, iclass 25, count 0 2006.229.13:25:05.93#ibcon#read 6, iclass 25, count 0 2006.229.13:25:05.93#ibcon#end of sib2, iclass 25, count 0 2006.229.13:25:05.93#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:25:05.93#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:25:05.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:25:05.93#ibcon#*before write, iclass 25, count 0 2006.229.13:25:05.93#ibcon#enter sib2, iclass 25, count 0 2006.229.13:25:05.93#ibcon#flushed, iclass 25, count 0 2006.229.13:25:05.93#ibcon#about to write, iclass 25, count 0 2006.229.13:25:05.93#ibcon#wrote, iclass 25, count 0 2006.229.13:25:05.93#ibcon#about to read 3, iclass 25, count 0 2006.229.13:25:05.97#ibcon#read 3, iclass 25, count 0 2006.229.13:25:05.97#ibcon#about to read 4, iclass 25, count 0 2006.229.13:25:05.97#ibcon#read 4, iclass 25, count 0 2006.229.13:25:05.97#ibcon#about to read 5, iclass 25, count 0 2006.229.13:25:05.97#ibcon#read 5, iclass 25, count 0 2006.229.13:25:05.97#ibcon#about to read 6, iclass 25, count 0 2006.229.13:25:05.97#ibcon#read 6, iclass 25, count 0 2006.229.13:25:05.97#ibcon#end of sib2, iclass 25, count 0 2006.229.13:25:05.97#ibcon#*after write, iclass 25, count 0 2006.229.13:25:05.97#ibcon#*before return 0, iclass 25, count 0 2006.229.13:25:05.97#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:05.97#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:05.97#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:25:05.97#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:25:05.97$vck44/vb=1,4 2006.229.13:25:05.97#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.13:25:05.97#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.13:25:05.97#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:05.97#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:25:05.97#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:25:05.97#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:25:05.97#ibcon#enter wrdev, iclass 27, count 2 2006.229.13:25:05.97#ibcon#first serial, iclass 27, count 2 2006.229.13:25:05.97#ibcon#enter sib2, iclass 27, count 2 2006.229.13:25:05.97#ibcon#flushed, iclass 27, count 2 2006.229.13:25:05.97#ibcon#about to write, iclass 27, count 2 2006.229.13:25:05.97#ibcon#wrote, iclass 27, count 2 2006.229.13:25:05.97#ibcon#about to read 3, iclass 27, count 2 2006.229.13:25:05.99#ibcon#read 3, iclass 27, count 2 2006.229.13:25:05.99#ibcon#about to read 4, iclass 27, count 2 2006.229.13:25:05.99#ibcon#read 4, iclass 27, count 2 2006.229.13:25:05.99#ibcon#about to read 5, iclass 27, count 2 2006.229.13:25:05.99#ibcon#read 5, iclass 27, count 2 2006.229.13:25:05.99#ibcon#about to read 6, iclass 27, count 2 2006.229.13:25:05.99#ibcon#read 6, iclass 27, count 2 2006.229.13:25:05.99#ibcon#end of sib2, iclass 27, count 2 2006.229.13:25:05.99#ibcon#*mode == 0, iclass 27, count 2 2006.229.13:25:05.99#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.13:25:05.99#ibcon#[27=AT01-04\r\n] 2006.229.13:25:05.99#ibcon#*before write, iclass 27, count 2 2006.229.13:25:05.99#ibcon#enter sib2, iclass 27, count 2 2006.229.13:25:05.99#ibcon#flushed, iclass 27, count 2 2006.229.13:25:05.99#ibcon#about to write, iclass 27, count 2 2006.229.13:25:05.99#ibcon#wrote, iclass 27, count 2 2006.229.13:25:05.99#ibcon#about to read 3, iclass 27, count 2 2006.229.13:25:06.02#ibcon#read 3, iclass 27, count 2 2006.229.13:25:06.02#ibcon#about to read 4, iclass 27, count 2 2006.229.13:25:06.02#ibcon#read 4, iclass 27, count 2 2006.229.13:25:06.02#ibcon#about to read 5, iclass 27, count 2 2006.229.13:25:06.02#ibcon#read 5, iclass 27, count 2 2006.229.13:25:06.02#ibcon#about to read 6, iclass 27, count 2 2006.229.13:25:06.02#ibcon#read 6, iclass 27, count 2 2006.229.13:25:06.02#ibcon#end of sib2, iclass 27, count 2 2006.229.13:25:06.02#ibcon#*after write, iclass 27, count 2 2006.229.13:25:06.02#ibcon#*before return 0, iclass 27, count 2 2006.229.13:25:06.02#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:25:06.02#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:25:06.02#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.13:25:06.02#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:06.02#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:25:06.14#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:25:06.14#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:25:06.14#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:25:06.14#ibcon#first serial, iclass 27, count 0 2006.229.13:25:06.14#ibcon#enter sib2, iclass 27, count 0 2006.229.13:25:06.14#ibcon#flushed, iclass 27, count 0 2006.229.13:25:06.14#ibcon#about to write, iclass 27, count 0 2006.229.13:25:06.14#ibcon#wrote, iclass 27, count 0 2006.229.13:25:06.14#ibcon#about to read 3, iclass 27, count 0 2006.229.13:25:06.16#ibcon#read 3, iclass 27, count 0 2006.229.13:25:06.16#ibcon#about to read 4, iclass 27, count 0 2006.229.13:25:06.16#ibcon#read 4, iclass 27, count 0 2006.229.13:25:06.16#ibcon#about to read 5, iclass 27, count 0 2006.229.13:25:06.16#ibcon#read 5, iclass 27, count 0 2006.229.13:25:06.16#ibcon#about to read 6, iclass 27, count 0 2006.229.13:25:06.16#ibcon#read 6, iclass 27, count 0 2006.229.13:25:06.16#ibcon#end of sib2, iclass 27, count 0 2006.229.13:25:06.16#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:25:06.16#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:25:06.16#ibcon#[27=USB\r\n] 2006.229.13:25:06.16#ibcon#*before write, iclass 27, count 0 2006.229.13:25:06.16#ibcon#enter sib2, iclass 27, count 0 2006.229.13:25:06.16#ibcon#flushed, iclass 27, count 0 2006.229.13:25:06.16#ibcon#about to write, iclass 27, count 0 2006.229.13:25:06.16#ibcon#wrote, iclass 27, count 0 2006.229.13:25:06.16#ibcon#about to read 3, iclass 27, count 0 2006.229.13:25:06.19#ibcon#read 3, iclass 27, count 0 2006.229.13:25:06.19#ibcon#about to read 4, iclass 27, count 0 2006.229.13:25:06.19#ibcon#read 4, iclass 27, count 0 2006.229.13:25:06.19#ibcon#about to read 5, iclass 27, count 0 2006.229.13:25:06.19#ibcon#read 5, iclass 27, count 0 2006.229.13:25:06.19#ibcon#about to read 6, iclass 27, count 0 2006.229.13:25:06.19#ibcon#read 6, iclass 27, count 0 2006.229.13:25:06.19#ibcon#end of sib2, iclass 27, count 0 2006.229.13:25:06.19#ibcon#*after write, iclass 27, count 0 2006.229.13:25:06.19#ibcon#*before return 0, iclass 27, count 0 2006.229.13:25:06.19#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:25:06.19#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:25:06.19#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:25:06.19#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:25:06.19$vck44/vblo=2,634.99 2006.229.13:25:06.19#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:25:06.19#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:25:06.19#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:06.19#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:06.19#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:06.19#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:06.19#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:25:06.19#ibcon#first serial, iclass 29, count 0 2006.229.13:25:06.19#ibcon#enter sib2, iclass 29, count 0 2006.229.13:25:06.19#ibcon#flushed, iclass 29, count 0 2006.229.13:25:06.19#ibcon#about to write, iclass 29, count 0 2006.229.13:25:06.19#ibcon#wrote, iclass 29, count 0 2006.229.13:25:06.19#ibcon#about to read 3, iclass 29, count 0 2006.229.13:25:06.21#ibcon#read 3, iclass 29, count 0 2006.229.13:25:06.21#ibcon#about to read 4, iclass 29, count 0 2006.229.13:25:06.21#ibcon#read 4, iclass 29, count 0 2006.229.13:25:06.21#ibcon#about to read 5, iclass 29, count 0 2006.229.13:25:06.21#ibcon#read 5, iclass 29, count 0 2006.229.13:25:06.21#ibcon#about to read 6, iclass 29, count 0 2006.229.13:25:06.21#ibcon#read 6, iclass 29, count 0 2006.229.13:25:06.21#ibcon#end of sib2, iclass 29, count 0 2006.229.13:25:06.21#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:25:06.21#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:25:06.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:25:06.21#ibcon#*before write, iclass 29, count 0 2006.229.13:25:06.21#ibcon#enter sib2, iclass 29, count 0 2006.229.13:25:06.21#ibcon#flushed, iclass 29, count 0 2006.229.13:25:06.21#ibcon#about to write, iclass 29, count 0 2006.229.13:25:06.21#ibcon#wrote, iclass 29, count 0 2006.229.13:25:06.21#ibcon#about to read 3, iclass 29, count 0 2006.229.13:25:06.25#ibcon#read 3, iclass 29, count 0 2006.229.13:25:06.25#ibcon#about to read 4, iclass 29, count 0 2006.229.13:25:06.25#ibcon#read 4, iclass 29, count 0 2006.229.13:25:06.25#ibcon#about to read 5, iclass 29, count 0 2006.229.13:25:06.25#ibcon#read 5, iclass 29, count 0 2006.229.13:25:06.25#ibcon#about to read 6, iclass 29, count 0 2006.229.13:25:06.25#ibcon#read 6, iclass 29, count 0 2006.229.13:25:06.25#ibcon#end of sib2, iclass 29, count 0 2006.229.13:25:06.25#ibcon#*after write, iclass 29, count 0 2006.229.13:25:06.25#ibcon#*before return 0, iclass 29, count 0 2006.229.13:25:06.25#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:06.25#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:25:06.25#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:25:06.25#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:25:06.25$vck44/vb=2,4 2006.229.13:25:06.25#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.13:25:06.25#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.13:25:06.25#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:06.25#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:06.31#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:06.31#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:06.31#ibcon#enter wrdev, iclass 31, count 2 2006.229.13:25:06.31#ibcon#first serial, iclass 31, count 2 2006.229.13:25:06.31#ibcon#enter sib2, iclass 31, count 2 2006.229.13:25:06.31#ibcon#flushed, iclass 31, count 2 2006.229.13:25:06.31#ibcon#about to write, iclass 31, count 2 2006.229.13:25:06.31#ibcon#wrote, iclass 31, count 2 2006.229.13:25:06.31#ibcon#about to read 3, iclass 31, count 2 2006.229.13:25:06.33#ibcon#read 3, iclass 31, count 2 2006.229.13:25:06.33#ibcon#about to read 4, iclass 31, count 2 2006.229.13:25:06.33#ibcon#read 4, iclass 31, count 2 2006.229.13:25:06.33#ibcon#about to read 5, iclass 31, count 2 2006.229.13:25:06.33#ibcon#read 5, iclass 31, count 2 2006.229.13:25:06.33#ibcon#about to read 6, iclass 31, count 2 2006.229.13:25:06.33#ibcon#read 6, iclass 31, count 2 2006.229.13:25:06.33#ibcon#end of sib2, iclass 31, count 2 2006.229.13:25:06.33#ibcon#*mode == 0, iclass 31, count 2 2006.229.13:25:06.33#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.13:25:06.33#ibcon#[27=AT02-04\r\n] 2006.229.13:25:06.33#ibcon#*before write, iclass 31, count 2 2006.229.13:25:06.33#ibcon#enter sib2, iclass 31, count 2 2006.229.13:25:06.33#ibcon#flushed, iclass 31, count 2 2006.229.13:25:06.33#ibcon#about to write, iclass 31, count 2 2006.229.13:25:06.33#ibcon#wrote, iclass 31, count 2 2006.229.13:25:06.33#ibcon#about to read 3, iclass 31, count 2 2006.229.13:25:06.36#ibcon#read 3, iclass 31, count 2 2006.229.13:25:06.36#ibcon#about to read 4, iclass 31, count 2 2006.229.13:25:06.36#ibcon#read 4, iclass 31, count 2 2006.229.13:25:06.36#ibcon#about to read 5, iclass 31, count 2 2006.229.13:25:06.36#ibcon#read 5, iclass 31, count 2 2006.229.13:25:06.36#ibcon#about to read 6, iclass 31, count 2 2006.229.13:25:06.36#ibcon#read 6, iclass 31, count 2 2006.229.13:25:06.36#ibcon#end of sib2, iclass 31, count 2 2006.229.13:25:06.36#ibcon#*after write, iclass 31, count 2 2006.229.13:25:06.36#ibcon#*before return 0, iclass 31, count 2 2006.229.13:25:06.36#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:06.36#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:25:06.36#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.13:25:06.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:06.36#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:06.48#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:06.48#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:06.48#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:25:06.48#ibcon#first serial, iclass 31, count 0 2006.229.13:25:06.48#ibcon#enter sib2, iclass 31, count 0 2006.229.13:25:06.48#ibcon#flushed, iclass 31, count 0 2006.229.13:25:06.48#ibcon#about to write, iclass 31, count 0 2006.229.13:25:06.48#ibcon#wrote, iclass 31, count 0 2006.229.13:25:06.48#ibcon#about to read 3, iclass 31, count 0 2006.229.13:25:06.50#ibcon#read 3, iclass 31, count 0 2006.229.13:25:06.50#ibcon#about to read 4, iclass 31, count 0 2006.229.13:25:06.50#ibcon#read 4, iclass 31, count 0 2006.229.13:25:06.50#ibcon#about to read 5, iclass 31, count 0 2006.229.13:25:06.50#ibcon#read 5, iclass 31, count 0 2006.229.13:25:06.50#ibcon#about to read 6, iclass 31, count 0 2006.229.13:25:06.50#ibcon#read 6, iclass 31, count 0 2006.229.13:25:06.50#ibcon#end of sib2, iclass 31, count 0 2006.229.13:25:06.50#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:25:06.50#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:25:06.50#ibcon#[27=USB\r\n] 2006.229.13:25:06.50#ibcon#*before write, iclass 31, count 0 2006.229.13:25:06.50#ibcon#enter sib2, iclass 31, count 0 2006.229.13:25:06.50#ibcon#flushed, iclass 31, count 0 2006.229.13:25:06.50#ibcon#about to write, iclass 31, count 0 2006.229.13:25:06.50#ibcon#wrote, iclass 31, count 0 2006.229.13:25:06.50#ibcon#about to read 3, iclass 31, count 0 2006.229.13:25:06.53#ibcon#read 3, iclass 31, count 0 2006.229.13:25:06.53#ibcon#about to read 4, iclass 31, count 0 2006.229.13:25:06.53#ibcon#read 4, iclass 31, count 0 2006.229.13:25:06.53#ibcon#about to read 5, iclass 31, count 0 2006.229.13:25:06.53#ibcon#read 5, iclass 31, count 0 2006.229.13:25:06.53#ibcon#about to read 6, iclass 31, count 0 2006.229.13:25:06.53#ibcon#read 6, iclass 31, count 0 2006.229.13:25:06.53#ibcon#end of sib2, iclass 31, count 0 2006.229.13:25:06.53#ibcon#*after write, iclass 31, count 0 2006.229.13:25:06.53#ibcon#*before return 0, iclass 31, count 0 2006.229.13:25:06.53#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:06.53#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:25:06.53#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:25:06.53#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:25:06.53$vck44/vblo=3,649.99 2006.229.13:25:06.53#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.13:25:06.53#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.13:25:06.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:06.53#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:06.53#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:06.53#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:06.53#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:25:06.53#ibcon#first serial, iclass 33, count 0 2006.229.13:25:06.53#ibcon#enter sib2, iclass 33, count 0 2006.229.13:25:06.53#ibcon#flushed, iclass 33, count 0 2006.229.13:25:06.53#ibcon#about to write, iclass 33, count 0 2006.229.13:25:06.53#ibcon#wrote, iclass 33, count 0 2006.229.13:25:06.53#ibcon#about to read 3, iclass 33, count 0 2006.229.13:25:06.55#ibcon#read 3, iclass 33, count 0 2006.229.13:25:06.55#ibcon#about to read 4, iclass 33, count 0 2006.229.13:25:06.55#ibcon#read 4, iclass 33, count 0 2006.229.13:25:06.55#ibcon#about to read 5, iclass 33, count 0 2006.229.13:25:06.55#ibcon#read 5, iclass 33, count 0 2006.229.13:25:06.55#ibcon#about to read 6, iclass 33, count 0 2006.229.13:25:06.55#ibcon#read 6, iclass 33, count 0 2006.229.13:25:06.55#ibcon#end of sib2, iclass 33, count 0 2006.229.13:25:06.55#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:25:06.55#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:25:06.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:25:06.55#ibcon#*before write, iclass 33, count 0 2006.229.13:25:06.55#ibcon#enter sib2, iclass 33, count 0 2006.229.13:25:06.55#ibcon#flushed, iclass 33, count 0 2006.229.13:25:06.55#ibcon#about to write, iclass 33, count 0 2006.229.13:25:06.55#ibcon#wrote, iclass 33, count 0 2006.229.13:25:06.55#ibcon#about to read 3, iclass 33, count 0 2006.229.13:25:06.59#ibcon#read 3, iclass 33, count 0 2006.229.13:25:06.59#ibcon#about to read 4, iclass 33, count 0 2006.229.13:25:06.59#ibcon#read 4, iclass 33, count 0 2006.229.13:25:06.59#ibcon#about to read 5, iclass 33, count 0 2006.229.13:25:06.59#ibcon#read 5, iclass 33, count 0 2006.229.13:25:06.59#ibcon#about to read 6, iclass 33, count 0 2006.229.13:25:06.59#ibcon#read 6, iclass 33, count 0 2006.229.13:25:06.59#ibcon#end of sib2, iclass 33, count 0 2006.229.13:25:06.59#ibcon#*after write, iclass 33, count 0 2006.229.13:25:06.59#ibcon#*before return 0, iclass 33, count 0 2006.229.13:25:06.59#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:06.59#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:25:06.59#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:25:06.59#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:25:06.59$vck44/vb=3,4 2006.229.13:25:06.59#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.13:25:06.59#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.13:25:06.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:06.59#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:06.65#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:06.65#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:06.65#ibcon#enter wrdev, iclass 35, count 2 2006.229.13:25:06.65#ibcon#first serial, iclass 35, count 2 2006.229.13:25:06.65#ibcon#enter sib2, iclass 35, count 2 2006.229.13:25:06.65#ibcon#flushed, iclass 35, count 2 2006.229.13:25:06.65#ibcon#about to write, iclass 35, count 2 2006.229.13:25:06.65#ibcon#wrote, iclass 35, count 2 2006.229.13:25:06.65#ibcon#about to read 3, iclass 35, count 2 2006.229.13:25:06.67#ibcon#read 3, iclass 35, count 2 2006.229.13:25:06.67#ibcon#about to read 4, iclass 35, count 2 2006.229.13:25:06.67#ibcon#read 4, iclass 35, count 2 2006.229.13:25:06.67#ibcon#about to read 5, iclass 35, count 2 2006.229.13:25:06.67#ibcon#read 5, iclass 35, count 2 2006.229.13:25:06.67#ibcon#about to read 6, iclass 35, count 2 2006.229.13:25:06.67#ibcon#read 6, iclass 35, count 2 2006.229.13:25:06.67#ibcon#end of sib2, iclass 35, count 2 2006.229.13:25:06.67#ibcon#*mode == 0, iclass 35, count 2 2006.229.13:25:06.67#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.13:25:06.67#ibcon#[27=AT03-04\r\n] 2006.229.13:25:06.67#ibcon#*before write, iclass 35, count 2 2006.229.13:25:06.67#ibcon#enter sib2, iclass 35, count 2 2006.229.13:25:06.67#ibcon#flushed, iclass 35, count 2 2006.229.13:25:06.67#ibcon#about to write, iclass 35, count 2 2006.229.13:25:06.67#ibcon#wrote, iclass 35, count 2 2006.229.13:25:06.67#ibcon#about to read 3, iclass 35, count 2 2006.229.13:25:06.70#ibcon#read 3, iclass 35, count 2 2006.229.13:25:06.70#ibcon#about to read 4, iclass 35, count 2 2006.229.13:25:06.70#ibcon#read 4, iclass 35, count 2 2006.229.13:25:06.70#ibcon#about to read 5, iclass 35, count 2 2006.229.13:25:06.70#ibcon#read 5, iclass 35, count 2 2006.229.13:25:06.70#ibcon#about to read 6, iclass 35, count 2 2006.229.13:25:06.70#ibcon#read 6, iclass 35, count 2 2006.229.13:25:06.70#ibcon#end of sib2, iclass 35, count 2 2006.229.13:25:06.70#ibcon#*after write, iclass 35, count 2 2006.229.13:25:06.70#ibcon#*before return 0, iclass 35, count 2 2006.229.13:25:06.70#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:06.70#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:25:06.70#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.13:25:06.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:06.70#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:06.82#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:06.82#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:06.82#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:25:06.82#ibcon#first serial, iclass 35, count 0 2006.229.13:25:06.82#ibcon#enter sib2, iclass 35, count 0 2006.229.13:25:06.82#ibcon#flushed, iclass 35, count 0 2006.229.13:25:06.82#ibcon#about to write, iclass 35, count 0 2006.229.13:25:06.82#ibcon#wrote, iclass 35, count 0 2006.229.13:25:06.82#ibcon#about to read 3, iclass 35, count 0 2006.229.13:25:06.84#ibcon#read 3, iclass 35, count 0 2006.229.13:25:06.84#ibcon#about to read 4, iclass 35, count 0 2006.229.13:25:06.84#ibcon#read 4, iclass 35, count 0 2006.229.13:25:06.84#ibcon#about to read 5, iclass 35, count 0 2006.229.13:25:06.84#ibcon#read 5, iclass 35, count 0 2006.229.13:25:06.84#ibcon#about to read 6, iclass 35, count 0 2006.229.13:25:06.84#ibcon#read 6, iclass 35, count 0 2006.229.13:25:06.84#ibcon#end of sib2, iclass 35, count 0 2006.229.13:25:06.84#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:25:06.84#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:25:06.84#ibcon#[27=USB\r\n] 2006.229.13:25:06.84#ibcon#*before write, iclass 35, count 0 2006.229.13:25:06.84#ibcon#enter sib2, iclass 35, count 0 2006.229.13:25:06.84#ibcon#flushed, iclass 35, count 0 2006.229.13:25:06.84#ibcon#about to write, iclass 35, count 0 2006.229.13:25:06.84#ibcon#wrote, iclass 35, count 0 2006.229.13:25:06.84#ibcon#about to read 3, iclass 35, count 0 2006.229.13:25:06.87#ibcon#read 3, iclass 35, count 0 2006.229.13:25:06.87#ibcon#about to read 4, iclass 35, count 0 2006.229.13:25:06.87#ibcon#read 4, iclass 35, count 0 2006.229.13:25:06.87#ibcon#about to read 5, iclass 35, count 0 2006.229.13:25:06.87#ibcon#read 5, iclass 35, count 0 2006.229.13:25:06.87#ibcon#about to read 6, iclass 35, count 0 2006.229.13:25:06.87#ibcon#read 6, iclass 35, count 0 2006.229.13:25:06.87#ibcon#end of sib2, iclass 35, count 0 2006.229.13:25:06.87#ibcon#*after write, iclass 35, count 0 2006.229.13:25:06.87#ibcon#*before return 0, iclass 35, count 0 2006.229.13:25:06.87#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:06.87#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:25:06.87#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:25:06.87#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:25:06.87$vck44/vblo=4,679.99 2006.229.13:25:06.87#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.13:25:06.87#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.13:25:06.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:06.87#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:06.87#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:06.87#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:06.87#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:25:06.87#ibcon#first serial, iclass 37, count 0 2006.229.13:25:06.87#ibcon#enter sib2, iclass 37, count 0 2006.229.13:25:06.87#ibcon#flushed, iclass 37, count 0 2006.229.13:25:06.87#ibcon#about to write, iclass 37, count 0 2006.229.13:25:06.87#ibcon#wrote, iclass 37, count 0 2006.229.13:25:06.87#ibcon#about to read 3, iclass 37, count 0 2006.229.13:25:06.89#ibcon#read 3, iclass 37, count 0 2006.229.13:25:06.89#ibcon#about to read 4, iclass 37, count 0 2006.229.13:25:06.89#ibcon#read 4, iclass 37, count 0 2006.229.13:25:06.89#ibcon#about to read 5, iclass 37, count 0 2006.229.13:25:06.89#ibcon#read 5, iclass 37, count 0 2006.229.13:25:06.89#ibcon#about to read 6, iclass 37, count 0 2006.229.13:25:06.89#ibcon#read 6, iclass 37, count 0 2006.229.13:25:06.89#ibcon#end of sib2, iclass 37, count 0 2006.229.13:25:06.89#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:25:06.89#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:25:06.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:25:06.89#ibcon#*before write, iclass 37, count 0 2006.229.13:25:06.89#ibcon#enter sib2, iclass 37, count 0 2006.229.13:25:06.89#ibcon#flushed, iclass 37, count 0 2006.229.13:25:06.89#ibcon#about to write, iclass 37, count 0 2006.229.13:25:06.89#ibcon#wrote, iclass 37, count 0 2006.229.13:25:06.89#ibcon#about to read 3, iclass 37, count 0 2006.229.13:25:06.93#ibcon#read 3, iclass 37, count 0 2006.229.13:25:06.93#ibcon#about to read 4, iclass 37, count 0 2006.229.13:25:06.93#ibcon#read 4, iclass 37, count 0 2006.229.13:25:06.93#ibcon#about to read 5, iclass 37, count 0 2006.229.13:25:06.93#ibcon#read 5, iclass 37, count 0 2006.229.13:25:06.93#ibcon#about to read 6, iclass 37, count 0 2006.229.13:25:06.93#ibcon#read 6, iclass 37, count 0 2006.229.13:25:06.93#ibcon#end of sib2, iclass 37, count 0 2006.229.13:25:06.93#ibcon#*after write, iclass 37, count 0 2006.229.13:25:06.93#ibcon#*before return 0, iclass 37, count 0 2006.229.13:25:06.93#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:06.93#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:25:06.93#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:25:06.93#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:25:06.93$vck44/vb=4,4 2006.229.13:25:06.93#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.13:25:06.93#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.13:25:06.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:06.93#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:06.99#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:06.99#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:06.99#ibcon#enter wrdev, iclass 39, count 2 2006.229.13:25:06.99#ibcon#first serial, iclass 39, count 2 2006.229.13:25:06.99#ibcon#enter sib2, iclass 39, count 2 2006.229.13:25:06.99#ibcon#flushed, iclass 39, count 2 2006.229.13:25:06.99#ibcon#about to write, iclass 39, count 2 2006.229.13:25:06.99#ibcon#wrote, iclass 39, count 2 2006.229.13:25:06.99#ibcon#about to read 3, iclass 39, count 2 2006.229.13:25:07.01#ibcon#read 3, iclass 39, count 2 2006.229.13:25:07.01#ibcon#about to read 4, iclass 39, count 2 2006.229.13:25:07.01#ibcon#read 4, iclass 39, count 2 2006.229.13:25:07.01#ibcon#about to read 5, iclass 39, count 2 2006.229.13:25:07.01#ibcon#read 5, iclass 39, count 2 2006.229.13:25:07.01#ibcon#about to read 6, iclass 39, count 2 2006.229.13:25:07.01#ibcon#read 6, iclass 39, count 2 2006.229.13:25:07.01#ibcon#end of sib2, iclass 39, count 2 2006.229.13:25:07.01#ibcon#*mode == 0, iclass 39, count 2 2006.229.13:25:07.01#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.13:25:07.01#ibcon#[27=AT04-04\r\n] 2006.229.13:25:07.01#ibcon#*before write, iclass 39, count 2 2006.229.13:25:07.01#ibcon#enter sib2, iclass 39, count 2 2006.229.13:25:07.01#ibcon#flushed, iclass 39, count 2 2006.229.13:25:07.01#ibcon#about to write, iclass 39, count 2 2006.229.13:25:07.01#ibcon#wrote, iclass 39, count 2 2006.229.13:25:07.01#ibcon#about to read 3, iclass 39, count 2 2006.229.13:25:07.04#ibcon#read 3, iclass 39, count 2 2006.229.13:25:07.04#ibcon#about to read 4, iclass 39, count 2 2006.229.13:25:07.04#ibcon#read 4, iclass 39, count 2 2006.229.13:25:07.04#ibcon#about to read 5, iclass 39, count 2 2006.229.13:25:07.04#ibcon#read 5, iclass 39, count 2 2006.229.13:25:07.04#ibcon#about to read 6, iclass 39, count 2 2006.229.13:25:07.04#ibcon#read 6, iclass 39, count 2 2006.229.13:25:07.04#ibcon#end of sib2, iclass 39, count 2 2006.229.13:25:07.04#ibcon#*after write, iclass 39, count 2 2006.229.13:25:07.04#ibcon#*before return 0, iclass 39, count 2 2006.229.13:25:07.04#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:07.04#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:25:07.04#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.13:25:07.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:07.04#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:07.16#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:07.16#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:07.16#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:25:07.16#ibcon#first serial, iclass 39, count 0 2006.229.13:25:07.16#ibcon#enter sib2, iclass 39, count 0 2006.229.13:25:07.16#ibcon#flushed, iclass 39, count 0 2006.229.13:25:07.16#ibcon#about to write, iclass 39, count 0 2006.229.13:25:07.16#ibcon#wrote, iclass 39, count 0 2006.229.13:25:07.16#ibcon#about to read 3, iclass 39, count 0 2006.229.13:25:07.18#ibcon#read 3, iclass 39, count 0 2006.229.13:25:07.18#ibcon#about to read 4, iclass 39, count 0 2006.229.13:25:07.18#ibcon#read 4, iclass 39, count 0 2006.229.13:25:07.18#ibcon#about to read 5, iclass 39, count 0 2006.229.13:25:07.18#ibcon#read 5, iclass 39, count 0 2006.229.13:25:07.18#ibcon#about to read 6, iclass 39, count 0 2006.229.13:25:07.18#ibcon#read 6, iclass 39, count 0 2006.229.13:25:07.18#ibcon#end of sib2, iclass 39, count 0 2006.229.13:25:07.18#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:25:07.18#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:25:07.18#ibcon#[27=USB\r\n] 2006.229.13:25:07.18#ibcon#*before write, iclass 39, count 0 2006.229.13:25:07.18#ibcon#enter sib2, iclass 39, count 0 2006.229.13:25:07.18#ibcon#flushed, iclass 39, count 0 2006.229.13:25:07.18#ibcon#about to write, iclass 39, count 0 2006.229.13:25:07.18#ibcon#wrote, iclass 39, count 0 2006.229.13:25:07.18#ibcon#about to read 3, iclass 39, count 0 2006.229.13:25:07.21#ibcon#read 3, iclass 39, count 0 2006.229.13:25:07.21#ibcon#about to read 4, iclass 39, count 0 2006.229.13:25:07.21#ibcon#read 4, iclass 39, count 0 2006.229.13:25:07.21#ibcon#about to read 5, iclass 39, count 0 2006.229.13:25:07.21#ibcon#read 5, iclass 39, count 0 2006.229.13:25:07.21#ibcon#about to read 6, iclass 39, count 0 2006.229.13:25:07.21#ibcon#read 6, iclass 39, count 0 2006.229.13:25:07.21#ibcon#end of sib2, iclass 39, count 0 2006.229.13:25:07.21#ibcon#*after write, iclass 39, count 0 2006.229.13:25:07.21#ibcon#*before return 0, iclass 39, count 0 2006.229.13:25:07.21#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:07.21#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:25:07.21#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:25:07.21#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:25:07.21$vck44/vblo=5,709.99 2006.229.13:25:07.21#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:25:07.21#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:25:07.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:07.21#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:07.21#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:07.21#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:07.21#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:25:07.21#ibcon#first serial, iclass 3, count 0 2006.229.13:25:07.21#ibcon#enter sib2, iclass 3, count 0 2006.229.13:25:07.21#ibcon#flushed, iclass 3, count 0 2006.229.13:25:07.21#ibcon#about to write, iclass 3, count 0 2006.229.13:25:07.21#ibcon#wrote, iclass 3, count 0 2006.229.13:25:07.21#ibcon#about to read 3, iclass 3, count 0 2006.229.13:25:07.23#ibcon#read 3, iclass 3, count 0 2006.229.13:25:07.23#ibcon#about to read 4, iclass 3, count 0 2006.229.13:25:07.23#ibcon#read 4, iclass 3, count 0 2006.229.13:25:07.23#ibcon#about to read 5, iclass 3, count 0 2006.229.13:25:07.23#ibcon#read 5, iclass 3, count 0 2006.229.13:25:07.23#ibcon#about to read 6, iclass 3, count 0 2006.229.13:25:07.23#ibcon#read 6, iclass 3, count 0 2006.229.13:25:07.23#ibcon#end of sib2, iclass 3, count 0 2006.229.13:25:07.23#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:25:07.23#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:25:07.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:25:07.23#ibcon#*before write, iclass 3, count 0 2006.229.13:25:07.23#ibcon#enter sib2, iclass 3, count 0 2006.229.13:25:07.23#ibcon#flushed, iclass 3, count 0 2006.229.13:25:07.23#ibcon#about to write, iclass 3, count 0 2006.229.13:25:07.23#ibcon#wrote, iclass 3, count 0 2006.229.13:25:07.23#ibcon#about to read 3, iclass 3, count 0 2006.229.13:25:07.27#ibcon#read 3, iclass 3, count 0 2006.229.13:25:07.27#ibcon#about to read 4, iclass 3, count 0 2006.229.13:25:07.27#ibcon#read 4, iclass 3, count 0 2006.229.13:25:07.27#ibcon#about to read 5, iclass 3, count 0 2006.229.13:25:07.27#ibcon#read 5, iclass 3, count 0 2006.229.13:25:07.27#ibcon#about to read 6, iclass 3, count 0 2006.229.13:25:07.27#ibcon#read 6, iclass 3, count 0 2006.229.13:25:07.27#ibcon#end of sib2, iclass 3, count 0 2006.229.13:25:07.27#ibcon#*after write, iclass 3, count 0 2006.229.13:25:07.27#ibcon#*before return 0, iclass 3, count 0 2006.229.13:25:07.27#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:07.27#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:25:07.27#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:25:07.27#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:25:07.27$vck44/vb=5,4 2006.229.13:25:07.27#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.13:25:07.27#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.13:25:07.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:07.27#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:07.33#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:07.33#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:07.33#ibcon#enter wrdev, iclass 5, count 2 2006.229.13:25:07.33#ibcon#first serial, iclass 5, count 2 2006.229.13:25:07.33#ibcon#enter sib2, iclass 5, count 2 2006.229.13:25:07.33#ibcon#flushed, iclass 5, count 2 2006.229.13:25:07.33#ibcon#about to write, iclass 5, count 2 2006.229.13:25:07.33#ibcon#wrote, iclass 5, count 2 2006.229.13:25:07.33#ibcon#about to read 3, iclass 5, count 2 2006.229.13:25:07.35#ibcon#read 3, iclass 5, count 2 2006.229.13:25:07.35#ibcon#about to read 4, iclass 5, count 2 2006.229.13:25:07.35#ibcon#read 4, iclass 5, count 2 2006.229.13:25:07.35#ibcon#about to read 5, iclass 5, count 2 2006.229.13:25:07.35#ibcon#read 5, iclass 5, count 2 2006.229.13:25:07.35#ibcon#about to read 6, iclass 5, count 2 2006.229.13:25:07.35#ibcon#read 6, iclass 5, count 2 2006.229.13:25:07.35#ibcon#end of sib2, iclass 5, count 2 2006.229.13:25:07.35#ibcon#*mode == 0, iclass 5, count 2 2006.229.13:25:07.35#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.13:25:07.35#ibcon#[27=AT05-04\r\n] 2006.229.13:25:07.35#ibcon#*before write, iclass 5, count 2 2006.229.13:25:07.35#ibcon#enter sib2, iclass 5, count 2 2006.229.13:25:07.35#ibcon#flushed, iclass 5, count 2 2006.229.13:25:07.35#ibcon#about to write, iclass 5, count 2 2006.229.13:25:07.35#ibcon#wrote, iclass 5, count 2 2006.229.13:25:07.35#ibcon#about to read 3, iclass 5, count 2 2006.229.13:25:07.38#ibcon#read 3, iclass 5, count 2 2006.229.13:25:07.38#ibcon#about to read 4, iclass 5, count 2 2006.229.13:25:07.38#ibcon#read 4, iclass 5, count 2 2006.229.13:25:07.38#ibcon#about to read 5, iclass 5, count 2 2006.229.13:25:07.38#ibcon#read 5, iclass 5, count 2 2006.229.13:25:07.38#ibcon#about to read 6, iclass 5, count 2 2006.229.13:25:07.38#ibcon#read 6, iclass 5, count 2 2006.229.13:25:07.38#ibcon#end of sib2, iclass 5, count 2 2006.229.13:25:07.38#ibcon#*after write, iclass 5, count 2 2006.229.13:25:07.38#ibcon#*before return 0, iclass 5, count 2 2006.229.13:25:07.38#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:07.38#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:25:07.38#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.13:25:07.38#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:07.38#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:07.50#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:07.50#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:07.50#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:25:07.50#ibcon#first serial, iclass 5, count 0 2006.229.13:25:07.50#ibcon#enter sib2, iclass 5, count 0 2006.229.13:25:07.50#ibcon#flushed, iclass 5, count 0 2006.229.13:25:07.50#ibcon#about to write, iclass 5, count 0 2006.229.13:25:07.50#ibcon#wrote, iclass 5, count 0 2006.229.13:25:07.50#ibcon#about to read 3, iclass 5, count 0 2006.229.13:25:07.52#ibcon#read 3, iclass 5, count 0 2006.229.13:25:07.52#ibcon#about to read 4, iclass 5, count 0 2006.229.13:25:07.52#ibcon#read 4, iclass 5, count 0 2006.229.13:25:07.52#ibcon#about to read 5, iclass 5, count 0 2006.229.13:25:07.52#ibcon#read 5, iclass 5, count 0 2006.229.13:25:07.52#ibcon#about to read 6, iclass 5, count 0 2006.229.13:25:07.52#ibcon#read 6, iclass 5, count 0 2006.229.13:25:07.52#ibcon#end of sib2, iclass 5, count 0 2006.229.13:25:07.52#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:25:07.52#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:25:07.52#ibcon#[27=USB\r\n] 2006.229.13:25:07.52#ibcon#*before write, iclass 5, count 0 2006.229.13:25:07.52#ibcon#enter sib2, iclass 5, count 0 2006.229.13:25:07.52#ibcon#flushed, iclass 5, count 0 2006.229.13:25:07.52#ibcon#about to write, iclass 5, count 0 2006.229.13:25:07.52#ibcon#wrote, iclass 5, count 0 2006.229.13:25:07.52#ibcon#about to read 3, iclass 5, count 0 2006.229.13:25:07.55#ibcon#read 3, iclass 5, count 0 2006.229.13:25:07.55#ibcon#about to read 4, iclass 5, count 0 2006.229.13:25:07.55#ibcon#read 4, iclass 5, count 0 2006.229.13:25:07.55#ibcon#about to read 5, iclass 5, count 0 2006.229.13:25:07.55#ibcon#read 5, iclass 5, count 0 2006.229.13:25:07.55#ibcon#about to read 6, iclass 5, count 0 2006.229.13:25:07.55#ibcon#read 6, iclass 5, count 0 2006.229.13:25:07.55#ibcon#end of sib2, iclass 5, count 0 2006.229.13:25:07.55#ibcon#*after write, iclass 5, count 0 2006.229.13:25:07.55#ibcon#*before return 0, iclass 5, count 0 2006.229.13:25:07.55#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:07.55#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:25:07.55#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:25:07.55#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:25:07.55$vck44/vblo=6,719.99 2006.229.13:25:07.55#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:25:07.55#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:25:07.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:07.55#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:07.55#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:07.55#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:07.55#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:25:07.55#ibcon#first serial, iclass 7, count 0 2006.229.13:25:07.55#ibcon#enter sib2, iclass 7, count 0 2006.229.13:25:07.55#ibcon#flushed, iclass 7, count 0 2006.229.13:25:07.55#ibcon#about to write, iclass 7, count 0 2006.229.13:25:07.55#ibcon#wrote, iclass 7, count 0 2006.229.13:25:07.55#ibcon#about to read 3, iclass 7, count 0 2006.229.13:25:07.57#ibcon#read 3, iclass 7, count 0 2006.229.13:25:07.57#ibcon#about to read 4, iclass 7, count 0 2006.229.13:25:07.57#ibcon#read 4, iclass 7, count 0 2006.229.13:25:07.57#ibcon#about to read 5, iclass 7, count 0 2006.229.13:25:07.57#ibcon#read 5, iclass 7, count 0 2006.229.13:25:07.57#ibcon#about to read 6, iclass 7, count 0 2006.229.13:25:07.57#ibcon#read 6, iclass 7, count 0 2006.229.13:25:07.57#ibcon#end of sib2, iclass 7, count 0 2006.229.13:25:07.57#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:25:07.57#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:25:07.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:25:07.57#ibcon#*before write, iclass 7, count 0 2006.229.13:25:07.57#ibcon#enter sib2, iclass 7, count 0 2006.229.13:25:07.57#ibcon#flushed, iclass 7, count 0 2006.229.13:25:07.57#ibcon#about to write, iclass 7, count 0 2006.229.13:25:07.57#ibcon#wrote, iclass 7, count 0 2006.229.13:25:07.57#ibcon#about to read 3, iclass 7, count 0 2006.229.13:25:07.61#ibcon#read 3, iclass 7, count 0 2006.229.13:25:07.61#ibcon#about to read 4, iclass 7, count 0 2006.229.13:25:07.61#ibcon#read 4, iclass 7, count 0 2006.229.13:25:07.61#ibcon#about to read 5, iclass 7, count 0 2006.229.13:25:07.61#ibcon#read 5, iclass 7, count 0 2006.229.13:25:07.61#ibcon#about to read 6, iclass 7, count 0 2006.229.13:25:07.61#ibcon#read 6, iclass 7, count 0 2006.229.13:25:07.61#ibcon#end of sib2, iclass 7, count 0 2006.229.13:25:07.61#ibcon#*after write, iclass 7, count 0 2006.229.13:25:07.61#ibcon#*before return 0, iclass 7, count 0 2006.229.13:25:07.61#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:07.61#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:25:07.61#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:25:07.61#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:25:07.61$vck44/vb=6,4 2006.229.13:25:07.61#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.13:25:07.61#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.13:25:07.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:07.61#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:07.67#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:07.67#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:07.67#ibcon#enter wrdev, iclass 11, count 2 2006.229.13:25:07.67#ibcon#first serial, iclass 11, count 2 2006.229.13:25:07.67#ibcon#enter sib2, iclass 11, count 2 2006.229.13:25:07.67#ibcon#flushed, iclass 11, count 2 2006.229.13:25:07.67#ibcon#about to write, iclass 11, count 2 2006.229.13:25:07.67#ibcon#wrote, iclass 11, count 2 2006.229.13:25:07.67#ibcon#about to read 3, iclass 11, count 2 2006.229.13:25:07.69#ibcon#read 3, iclass 11, count 2 2006.229.13:25:07.69#ibcon#about to read 4, iclass 11, count 2 2006.229.13:25:07.69#ibcon#read 4, iclass 11, count 2 2006.229.13:25:07.69#ibcon#about to read 5, iclass 11, count 2 2006.229.13:25:07.69#ibcon#read 5, iclass 11, count 2 2006.229.13:25:07.69#ibcon#about to read 6, iclass 11, count 2 2006.229.13:25:07.69#ibcon#read 6, iclass 11, count 2 2006.229.13:25:07.69#ibcon#end of sib2, iclass 11, count 2 2006.229.13:25:07.69#ibcon#*mode == 0, iclass 11, count 2 2006.229.13:25:07.69#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.13:25:07.69#ibcon#[27=AT06-04\r\n] 2006.229.13:25:07.69#ibcon#*before write, iclass 11, count 2 2006.229.13:25:07.69#ibcon#enter sib2, iclass 11, count 2 2006.229.13:25:07.69#ibcon#flushed, iclass 11, count 2 2006.229.13:25:07.69#ibcon#about to write, iclass 11, count 2 2006.229.13:25:07.69#ibcon#wrote, iclass 11, count 2 2006.229.13:25:07.69#ibcon#about to read 3, iclass 11, count 2 2006.229.13:25:07.72#ibcon#read 3, iclass 11, count 2 2006.229.13:25:07.72#ibcon#about to read 4, iclass 11, count 2 2006.229.13:25:07.72#ibcon#read 4, iclass 11, count 2 2006.229.13:25:07.72#ibcon#about to read 5, iclass 11, count 2 2006.229.13:25:07.72#ibcon#read 5, iclass 11, count 2 2006.229.13:25:07.72#ibcon#about to read 6, iclass 11, count 2 2006.229.13:25:07.72#ibcon#read 6, iclass 11, count 2 2006.229.13:25:07.72#ibcon#end of sib2, iclass 11, count 2 2006.229.13:25:07.72#ibcon#*after write, iclass 11, count 2 2006.229.13:25:07.72#ibcon#*before return 0, iclass 11, count 2 2006.229.13:25:07.72#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:07.72#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:25:07.72#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.13:25:07.72#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:07.72#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:07.84#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:07.84#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:07.84#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:25:07.84#ibcon#first serial, iclass 11, count 0 2006.229.13:25:07.84#ibcon#enter sib2, iclass 11, count 0 2006.229.13:25:07.84#ibcon#flushed, iclass 11, count 0 2006.229.13:25:07.84#ibcon#about to write, iclass 11, count 0 2006.229.13:25:07.84#ibcon#wrote, iclass 11, count 0 2006.229.13:25:07.84#ibcon#about to read 3, iclass 11, count 0 2006.229.13:25:07.86#ibcon#read 3, iclass 11, count 0 2006.229.13:25:07.86#ibcon#about to read 4, iclass 11, count 0 2006.229.13:25:07.86#ibcon#read 4, iclass 11, count 0 2006.229.13:25:07.86#ibcon#about to read 5, iclass 11, count 0 2006.229.13:25:07.86#ibcon#read 5, iclass 11, count 0 2006.229.13:25:07.86#ibcon#about to read 6, iclass 11, count 0 2006.229.13:25:07.86#ibcon#read 6, iclass 11, count 0 2006.229.13:25:07.86#ibcon#end of sib2, iclass 11, count 0 2006.229.13:25:07.86#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:25:07.86#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:25:07.86#ibcon#[27=USB\r\n] 2006.229.13:25:07.86#ibcon#*before write, iclass 11, count 0 2006.229.13:25:07.86#ibcon#enter sib2, iclass 11, count 0 2006.229.13:25:07.86#ibcon#flushed, iclass 11, count 0 2006.229.13:25:07.86#ibcon#about to write, iclass 11, count 0 2006.229.13:25:07.86#ibcon#wrote, iclass 11, count 0 2006.229.13:25:07.86#ibcon#about to read 3, iclass 11, count 0 2006.229.13:25:07.89#ibcon#read 3, iclass 11, count 0 2006.229.13:25:07.89#ibcon#about to read 4, iclass 11, count 0 2006.229.13:25:07.89#ibcon#read 4, iclass 11, count 0 2006.229.13:25:07.89#ibcon#about to read 5, iclass 11, count 0 2006.229.13:25:07.89#ibcon#read 5, iclass 11, count 0 2006.229.13:25:07.89#ibcon#about to read 6, iclass 11, count 0 2006.229.13:25:07.89#ibcon#read 6, iclass 11, count 0 2006.229.13:25:07.89#ibcon#end of sib2, iclass 11, count 0 2006.229.13:25:07.89#ibcon#*after write, iclass 11, count 0 2006.229.13:25:07.89#ibcon#*before return 0, iclass 11, count 0 2006.229.13:25:07.89#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:07.89#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:25:07.89#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:25:07.89#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:25:07.89$vck44/vblo=7,734.99 2006.229.13:25:07.89#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:25:07.89#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:25:07.89#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:07.89#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:07.89#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:07.89#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:07.89#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:25:07.89#ibcon#first serial, iclass 13, count 0 2006.229.13:25:07.89#ibcon#enter sib2, iclass 13, count 0 2006.229.13:25:07.89#ibcon#flushed, iclass 13, count 0 2006.229.13:25:07.89#ibcon#about to write, iclass 13, count 0 2006.229.13:25:07.89#ibcon#wrote, iclass 13, count 0 2006.229.13:25:07.89#ibcon#about to read 3, iclass 13, count 0 2006.229.13:25:07.91#ibcon#read 3, iclass 13, count 0 2006.229.13:25:07.91#ibcon#about to read 4, iclass 13, count 0 2006.229.13:25:07.91#ibcon#read 4, iclass 13, count 0 2006.229.13:25:07.91#ibcon#about to read 5, iclass 13, count 0 2006.229.13:25:07.91#ibcon#read 5, iclass 13, count 0 2006.229.13:25:07.91#ibcon#about to read 6, iclass 13, count 0 2006.229.13:25:07.91#ibcon#read 6, iclass 13, count 0 2006.229.13:25:07.91#ibcon#end of sib2, iclass 13, count 0 2006.229.13:25:07.91#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:25:07.91#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:25:07.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:25:07.91#ibcon#*before write, iclass 13, count 0 2006.229.13:25:07.91#ibcon#enter sib2, iclass 13, count 0 2006.229.13:25:07.91#ibcon#flushed, iclass 13, count 0 2006.229.13:25:07.91#ibcon#about to write, iclass 13, count 0 2006.229.13:25:07.91#ibcon#wrote, iclass 13, count 0 2006.229.13:25:07.91#ibcon#about to read 3, iclass 13, count 0 2006.229.13:25:07.95#ibcon#read 3, iclass 13, count 0 2006.229.13:25:07.95#ibcon#about to read 4, iclass 13, count 0 2006.229.13:25:07.95#ibcon#read 4, iclass 13, count 0 2006.229.13:25:07.95#ibcon#about to read 5, iclass 13, count 0 2006.229.13:25:07.95#ibcon#read 5, iclass 13, count 0 2006.229.13:25:07.95#ibcon#about to read 6, iclass 13, count 0 2006.229.13:25:07.95#ibcon#read 6, iclass 13, count 0 2006.229.13:25:07.95#ibcon#end of sib2, iclass 13, count 0 2006.229.13:25:07.95#ibcon#*after write, iclass 13, count 0 2006.229.13:25:07.95#ibcon#*before return 0, iclass 13, count 0 2006.229.13:25:07.95#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:07.95#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:25:07.95#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:25:07.95#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:25:07.95$vck44/vb=7,4 2006.229.13:25:07.95#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.13:25:07.95#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.13:25:07.95#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:07.95#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:08.01#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:08.01#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:08.01#ibcon#enter wrdev, iclass 15, count 2 2006.229.13:25:08.01#ibcon#first serial, iclass 15, count 2 2006.229.13:25:08.01#ibcon#enter sib2, iclass 15, count 2 2006.229.13:25:08.01#ibcon#flushed, iclass 15, count 2 2006.229.13:25:08.01#ibcon#about to write, iclass 15, count 2 2006.229.13:25:08.01#ibcon#wrote, iclass 15, count 2 2006.229.13:25:08.01#ibcon#about to read 3, iclass 15, count 2 2006.229.13:25:08.03#ibcon#read 3, iclass 15, count 2 2006.229.13:25:08.03#ibcon#about to read 4, iclass 15, count 2 2006.229.13:25:08.03#ibcon#read 4, iclass 15, count 2 2006.229.13:25:08.03#ibcon#about to read 5, iclass 15, count 2 2006.229.13:25:08.03#ibcon#read 5, iclass 15, count 2 2006.229.13:25:08.03#ibcon#about to read 6, iclass 15, count 2 2006.229.13:25:08.03#ibcon#read 6, iclass 15, count 2 2006.229.13:25:08.03#ibcon#end of sib2, iclass 15, count 2 2006.229.13:25:08.03#ibcon#*mode == 0, iclass 15, count 2 2006.229.13:25:08.03#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.13:25:08.03#ibcon#[27=AT07-04\r\n] 2006.229.13:25:08.03#ibcon#*before write, iclass 15, count 2 2006.229.13:25:08.03#ibcon#enter sib2, iclass 15, count 2 2006.229.13:25:08.03#ibcon#flushed, iclass 15, count 2 2006.229.13:25:08.03#ibcon#about to write, iclass 15, count 2 2006.229.13:25:08.03#ibcon#wrote, iclass 15, count 2 2006.229.13:25:08.03#ibcon#about to read 3, iclass 15, count 2 2006.229.13:25:08.06#abcon#<5=/05 1.4 2.2 27.571001002.0\r\n> 2006.229.13:25:08.06#ibcon#read 3, iclass 15, count 2 2006.229.13:25:08.06#ibcon#about to read 4, iclass 15, count 2 2006.229.13:25:08.06#ibcon#read 4, iclass 15, count 2 2006.229.13:25:08.06#ibcon#about to read 5, iclass 15, count 2 2006.229.13:25:08.06#ibcon#read 5, iclass 15, count 2 2006.229.13:25:08.06#ibcon#about to read 6, iclass 15, count 2 2006.229.13:25:08.06#ibcon#read 6, iclass 15, count 2 2006.229.13:25:08.06#ibcon#end of sib2, iclass 15, count 2 2006.229.13:25:08.06#ibcon#*after write, iclass 15, count 2 2006.229.13:25:08.06#ibcon#*before return 0, iclass 15, count 2 2006.229.13:25:08.06#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:08.06#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:25:08.06#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.13:25:08.06#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:08.06#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:08.08#abcon#{5=INTERFACE CLEAR} 2006.229.13:25:08.14#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:25:08.18#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:08.18#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:08.18#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:25:08.18#ibcon#first serial, iclass 15, count 0 2006.229.13:25:08.18#ibcon#enter sib2, iclass 15, count 0 2006.229.13:25:08.18#ibcon#flushed, iclass 15, count 0 2006.229.13:25:08.18#ibcon#about to write, iclass 15, count 0 2006.229.13:25:08.18#ibcon#wrote, iclass 15, count 0 2006.229.13:25:08.18#ibcon#about to read 3, iclass 15, count 0 2006.229.13:25:08.20#ibcon#read 3, iclass 15, count 0 2006.229.13:25:08.20#ibcon#about to read 4, iclass 15, count 0 2006.229.13:25:08.20#ibcon#read 4, iclass 15, count 0 2006.229.13:25:08.20#ibcon#about to read 5, iclass 15, count 0 2006.229.13:25:08.20#ibcon#read 5, iclass 15, count 0 2006.229.13:25:08.20#ibcon#about to read 6, iclass 15, count 0 2006.229.13:25:08.20#ibcon#read 6, iclass 15, count 0 2006.229.13:25:08.20#ibcon#end of sib2, iclass 15, count 0 2006.229.13:25:08.20#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:25:08.20#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:25:08.20#ibcon#[27=USB\r\n] 2006.229.13:25:08.20#ibcon#*before write, iclass 15, count 0 2006.229.13:25:08.20#ibcon#enter sib2, iclass 15, count 0 2006.229.13:25:08.20#ibcon#flushed, iclass 15, count 0 2006.229.13:25:08.20#ibcon#about to write, iclass 15, count 0 2006.229.13:25:08.20#ibcon#wrote, iclass 15, count 0 2006.229.13:25:08.20#ibcon#about to read 3, iclass 15, count 0 2006.229.13:25:08.23#ibcon#read 3, iclass 15, count 0 2006.229.13:25:08.23#ibcon#about to read 4, iclass 15, count 0 2006.229.13:25:08.23#ibcon#read 4, iclass 15, count 0 2006.229.13:25:08.23#ibcon#about to read 5, iclass 15, count 0 2006.229.13:25:08.23#ibcon#read 5, iclass 15, count 0 2006.229.13:25:08.23#ibcon#about to read 6, iclass 15, count 0 2006.229.13:25:08.23#ibcon#read 6, iclass 15, count 0 2006.229.13:25:08.23#ibcon#end of sib2, iclass 15, count 0 2006.229.13:25:08.23#ibcon#*after write, iclass 15, count 0 2006.229.13:25:08.23#ibcon#*before return 0, iclass 15, count 0 2006.229.13:25:08.23#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:08.23#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:25:08.23#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:25:08.23#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:25:08.23$vck44/vblo=8,744.99 2006.229.13:25:08.23#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.13:25:08.23#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.13:25:08.23#ibcon#ireg 17 cls_cnt 0 2006.229.13:25:08.23#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:08.23#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:08.23#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:08.23#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:25:08.23#ibcon#first serial, iclass 21, count 0 2006.229.13:25:08.23#ibcon#enter sib2, iclass 21, count 0 2006.229.13:25:08.23#ibcon#flushed, iclass 21, count 0 2006.229.13:25:08.23#ibcon#about to write, iclass 21, count 0 2006.229.13:25:08.23#ibcon#wrote, iclass 21, count 0 2006.229.13:25:08.23#ibcon#about to read 3, iclass 21, count 0 2006.229.13:25:08.25#ibcon#read 3, iclass 21, count 0 2006.229.13:25:08.25#ibcon#about to read 4, iclass 21, count 0 2006.229.13:25:08.25#ibcon#read 4, iclass 21, count 0 2006.229.13:25:08.25#ibcon#about to read 5, iclass 21, count 0 2006.229.13:25:08.25#ibcon#read 5, iclass 21, count 0 2006.229.13:25:08.25#ibcon#about to read 6, iclass 21, count 0 2006.229.13:25:08.25#ibcon#read 6, iclass 21, count 0 2006.229.13:25:08.25#ibcon#end of sib2, iclass 21, count 0 2006.229.13:25:08.25#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:25:08.25#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:25:08.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:25:08.25#ibcon#*before write, iclass 21, count 0 2006.229.13:25:08.25#ibcon#enter sib2, iclass 21, count 0 2006.229.13:25:08.25#ibcon#flushed, iclass 21, count 0 2006.229.13:25:08.25#ibcon#about to write, iclass 21, count 0 2006.229.13:25:08.25#ibcon#wrote, iclass 21, count 0 2006.229.13:25:08.25#ibcon#about to read 3, iclass 21, count 0 2006.229.13:25:08.29#ibcon#read 3, iclass 21, count 0 2006.229.13:25:08.29#ibcon#about to read 4, iclass 21, count 0 2006.229.13:25:08.29#ibcon#read 4, iclass 21, count 0 2006.229.13:25:08.29#ibcon#about to read 5, iclass 21, count 0 2006.229.13:25:08.29#ibcon#read 5, iclass 21, count 0 2006.229.13:25:08.29#ibcon#about to read 6, iclass 21, count 0 2006.229.13:25:08.29#ibcon#read 6, iclass 21, count 0 2006.229.13:25:08.29#ibcon#end of sib2, iclass 21, count 0 2006.229.13:25:08.29#ibcon#*after write, iclass 21, count 0 2006.229.13:25:08.29#ibcon#*before return 0, iclass 21, count 0 2006.229.13:25:08.29#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:08.29#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:25:08.29#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:25:08.29#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:25:08.29$vck44/vb=8,4 2006.229.13:25:08.29#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.13:25:08.29#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.13:25:08.29#ibcon#ireg 11 cls_cnt 2 2006.229.13:25:08.29#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:08.35#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:08.35#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:08.35#ibcon#enter wrdev, iclass 23, count 2 2006.229.13:25:08.35#ibcon#first serial, iclass 23, count 2 2006.229.13:25:08.35#ibcon#enter sib2, iclass 23, count 2 2006.229.13:25:08.35#ibcon#flushed, iclass 23, count 2 2006.229.13:25:08.35#ibcon#about to write, iclass 23, count 2 2006.229.13:25:08.35#ibcon#wrote, iclass 23, count 2 2006.229.13:25:08.35#ibcon#about to read 3, iclass 23, count 2 2006.229.13:25:08.37#ibcon#read 3, iclass 23, count 2 2006.229.13:25:08.37#ibcon#about to read 4, iclass 23, count 2 2006.229.13:25:08.37#ibcon#read 4, iclass 23, count 2 2006.229.13:25:08.37#ibcon#about to read 5, iclass 23, count 2 2006.229.13:25:08.37#ibcon#read 5, iclass 23, count 2 2006.229.13:25:08.37#ibcon#about to read 6, iclass 23, count 2 2006.229.13:25:08.37#ibcon#read 6, iclass 23, count 2 2006.229.13:25:08.37#ibcon#end of sib2, iclass 23, count 2 2006.229.13:25:08.37#ibcon#*mode == 0, iclass 23, count 2 2006.229.13:25:08.37#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.13:25:08.37#ibcon#[27=AT08-04\r\n] 2006.229.13:25:08.37#ibcon#*before write, iclass 23, count 2 2006.229.13:25:08.37#ibcon#enter sib2, iclass 23, count 2 2006.229.13:25:08.37#ibcon#flushed, iclass 23, count 2 2006.229.13:25:08.37#ibcon#about to write, iclass 23, count 2 2006.229.13:25:08.37#ibcon#wrote, iclass 23, count 2 2006.229.13:25:08.37#ibcon#about to read 3, iclass 23, count 2 2006.229.13:25:08.40#ibcon#read 3, iclass 23, count 2 2006.229.13:25:08.40#ibcon#about to read 4, iclass 23, count 2 2006.229.13:25:08.40#ibcon#read 4, iclass 23, count 2 2006.229.13:25:08.40#ibcon#about to read 5, iclass 23, count 2 2006.229.13:25:08.40#ibcon#read 5, iclass 23, count 2 2006.229.13:25:08.40#ibcon#about to read 6, iclass 23, count 2 2006.229.13:25:08.40#ibcon#read 6, iclass 23, count 2 2006.229.13:25:08.40#ibcon#end of sib2, iclass 23, count 2 2006.229.13:25:08.40#ibcon#*after write, iclass 23, count 2 2006.229.13:25:08.40#ibcon#*before return 0, iclass 23, count 2 2006.229.13:25:08.40#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:08.40#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:25:08.40#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.13:25:08.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:25:08.40#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:08.52#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:08.52#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:08.52#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:25:08.52#ibcon#first serial, iclass 23, count 0 2006.229.13:25:08.52#ibcon#enter sib2, iclass 23, count 0 2006.229.13:25:08.52#ibcon#flushed, iclass 23, count 0 2006.229.13:25:08.52#ibcon#about to write, iclass 23, count 0 2006.229.13:25:08.52#ibcon#wrote, iclass 23, count 0 2006.229.13:25:08.52#ibcon#about to read 3, iclass 23, count 0 2006.229.13:25:08.54#ibcon#read 3, iclass 23, count 0 2006.229.13:25:08.54#ibcon#about to read 4, iclass 23, count 0 2006.229.13:25:08.54#ibcon#read 4, iclass 23, count 0 2006.229.13:25:08.54#ibcon#about to read 5, iclass 23, count 0 2006.229.13:25:08.54#ibcon#read 5, iclass 23, count 0 2006.229.13:25:08.54#ibcon#about to read 6, iclass 23, count 0 2006.229.13:25:08.54#ibcon#read 6, iclass 23, count 0 2006.229.13:25:08.54#ibcon#end of sib2, iclass 23, count 0 2006.229.13:25:08.54#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:25:08.54#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:25:08.54#ibcon#[27=USB\r\n] 2006.229.13:25:08.54#ibcon#*before write, iclass 23, count 0 2006.229.13:25:08.54#ibcon#enter sib2, iclass 23, count 0 2006.229.13:25:08.54#ibcon#flushed, iclass 23, count 0 2006.229.13:25:08.54#ibcon#about to write, iclass 23, count 0 2006.229.13:25:08.54#ibcon#wrote, iclass 23, count 0 2006.229.13:25:08.54#ibcon#about to read 3, iclass 23, count 0 2006.229.13:25:08.57#ibcon#read 3, iclass 23, count 0 2006.229.13:25:08.57#ibcon#about to read 4, iclass 23, count 0 2006.229.13:25:08.57#ibcon#read 4, iclass 23, count 0 2006.229.13:25:08.57#ibcon#about to read 5, iclass 23, count 0 2006.229.13:25:08.57#ibcon#read 5, iclass 23, count 0 2006.229.13:25:08.57#ibcon#about to read 6, iclass 23, count 0 2006.229.13:25:08.57#ibcon#read 6, iclass 23, count 0 2006.229.13:25:08.57#ibcon#end of sib2, iclass 23, count 0 2006.229.13:25:08.57#ibcon#*after write, iclass 23, count 0 2006.229.13:25:08.57#ibcon#*before return 0, iclass 23, count 0 2006.229.13:25:08.57#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:08.57#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:25:08.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:25:08.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:25:08.57$vck44/vabw=wide 2006.229.13:25:08.57#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.13:25:08.57#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.13:25:08.57#ibcon#ireg 8 cls_cnt 0 2006.229.13:25:08.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:08.57#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:08.57#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:08.57#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:25:08.57#ibcon#first serial, iclass 25, count 0 2006.229.13:25:08.57#ibcon#enter sib2, iclass 25, count 0 2006.229.13:25:08.57#ibcon#flushed, iclass 25, count 0 2006.229.13:25:08.57#ibcon#about to write, iclass 25, count 0 2006.229.13:25:08.57#ibcon#wrote, iclass 25, count 0 2006.229.13:25:08.57#ibcon#about to read 3, iclass 25, count 0 2006.229.13:25:08.59#ibcon#read 3, iclass 25, count 0 2006.229.13:25:08.59#ibcon#about to read 4, iclass 25, count 0 2006.229.13:25:08.59#ibcon#read 4, iclass 25, count 0 2006.229.13:25:08.59#ibcon#about to read 5, iclass 25, count 0 2006.229.13:25:08.59#ibcon#read 5, iclass 25, count 0 2006.229.13:25:08.59#ibcon#about to read 6, iclass 25, count 0 2006.229.13:25:08.59#ibcon#read 6, iclass 25, count 0 2006.229.13:25:08.59#ibcon#end of sib2, iclass 25, count 0 2006.229.13:25:08.59#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:25:08.59#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:25:08.59#ibcon#[25=BW32\r\n] 2006.229.13:25:08.59#ibcon#*before write, iclass 25, count 0 2006.229.13:25:08.59#ibcon#enter sib2, iclass 25, count 0 2006.229.13:25:08.59#ibcon#flushed, iclass 25, count 0 2006.229.13:25:08.59#ibcon#about to write, iclass 25, count 0 2006.229.13:25:08.59#ibcon#wrote, iclass 25, count 0 2006.229.13:25:08.59#ibcon#about to read 3, iclass 25, count 0 2006.229.13:25:08.62#ibcon#read 3, iclass 25, count 0 2006.229.13:25:08.62#ibcon#about to read 4, iclass 25, count 0 2006.229.13:25:08.62#ibcon#read 4, iclass 25, count 0 2006.229.13:25:08.62#ibcon#about to read 5, iclass 25, count 0 2006.229.13:25:08.62#ibcon#read 5, iclass 25, count 0 2006.229.13:25:08.62#ibcon#about to read 6, iclass 25, count 0 2006.229.13:25:08.62#ibcon#read 6, iclass 25, count 0 2006.229.13:25:08.62#ibcon#end of sib2, iclass 25, count 0 2006.229.13:25:08.62#ibcon#*after write, iclass 25, count 0 2006.229.13:25:08.62#ibcon#*before return 0, iclass 25, count 0 2006.229.13:25:08.62#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:08.62#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:25:08.62#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:25:08.62#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:25:08.62$vck44/vbbw=wide 2006.229.13:25:08.62#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:25:08.62#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:25:08.62#ibcon#ireg 8 cls_cnt 0 2006.229.13:25:08.62#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:25:08.69#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:25:08.69#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:25:08.69#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:25:08.69#ibcon#first serial, iclass 27, count 0 2006.229.13:25:08.69#ibcon#enter sib2, iclass 27, count 0 2006.229.13:25:08.69#ibcon#flushed, iclass 27, count 0 2006.229.13:25:08.69#ibcon#about to write, iclass 27, count 0 2006.229.13:25:08.69#ibcon#wrote, iclass 27, count 0 2006.229.13:25:08.69#ibcon#about to read 3, iclass 27, count 0 2006.229.13:25:08.71#ibcon#read 3, iclass 27, count 0 2006.229.13:25:08.71#ibcon#about to read 4, iclass 27, count 0 2006.229.13:25:08.71#ibcon#read 4, iclass 27, count 0 2006.229.13:25:08.71#ibcon#about to read 5, iclass 27, count 0 2006.229.13:25:08.71#ibcon#read 5, iclass 27, count 0 2006.229.13:25:08.71#ibcon#about to read 6, iclass 27, count 0 2006.229.13:25:08.71#ibcon#read 6, iclass 27, count 0 2006.229.13:25:08.71#ibcon#end of sib2, iclass 27, count 0 2006.229.13:25:08.71#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:25:08.71#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:25:08.71#ibcon#[27=BW32\r\n] 2006.229.13:25:08.71#ibcon#*before write, iclass 27, count 0 2006.229.13:25:08.71#ibcon#enter sib2, iclass 27, count 0 2006.229.13:25:08.71#ibcon#flushed, iclass 27, count 0 2006.229.13:25:08.71#ibcon#about to write, iclass 27, count 0 2006.229.13:25:08.71#ibcon#wrote, iclass 27, count 0 2006.229.13:25:08.71#ibcon#about to read 3, iclass 27, count 0 2006.229.13:25:08.74#ibcon#read 3, iclass 27, count 0 2006.229.13:25:08.74#ibcon#about to read 4, iclass 27, count 0 2006.229.13:25:08.74#ibcon#read 4, iclass 27, count 0 2006.229.13:25:08.74#ibcon#about to read 5, iclass 27, count 0 2006.229.13:25:08.74#ibcon#read 5, iclass 27, count 0 2006.229.13:25:08.74#ibcon#about to read 6, iclass 27, count 0 2006.229.13:25:08.74#ibcon#read 6, iclass 27, count 0 2006.229.13:25:08.74#ibcon#end of sib2, iclass 27, count 0 2006.229.13:25:08.74#ibcon#*after write, iclass 27, count 0 2006.229.13:25:08.74#ibcon#*before return 0, iclass 27, count 0 2006.229.13:25:08.74#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:25:08.74#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:25:08.74#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:25:08.74#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:25:08.74$setupk4/ifdk4 2006.229.13:25:08.74$ifdk4/lo= 2006.229.13:25:08.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:25:08.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:25:08.74$ifdk4/patch= 2006.229.13:25:08.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:25:08.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:25:08.74$setupk4/!*+20s 2006.229.13:25:18.23#abcon#<5=/05 1.4 2.2 27.571001002.0\r\n> 2006.229.13:25:18.25#abcon#{5=INTERFACE CLEAR} 2006.229.13:25:18.31#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:25:23.24$setupk4/"tpicd 2006.229.13:25:23.24$setupk4/echo=off 2006.229.13:25:23.24$setupk4/xlog=off 2006.229.13:25:23.24:!2006.229.13:26:17 2006.229.13:25:57.14#trakl#Source acquired 2006.229.13:25:59.14#flagr#flagr/antenna,acquired 2006.229.13:26:17.00:preob 2006.229.13:26:18.14/onsource/TRACKING 2006.229.13:26:18.14:!2006.229.13:26:27 2006.229.13:26:27.00:"tape 2006.229.13:26:27.00:"st=record 2006.229.13:26:27.00:data_valid=on 2006.229.13:26:27.00:midob 2006.229.13:26:27.14/onsource/TRACKING 2006.229.13:26:27.14/wx/27.57,1002.0,100 2006.229.13:26:27.33/cable/+6.4121E-03 2006.229.13:26:28.42/va/01,08,usb,yes,33,35 2006.229.13:26:28.42/va/02,07,usb,yes,36,36 2006.229.13:26:28.42/va/03,06,usb,yes,44,47 2006.229.13:26:28.42/va/04,07,usb,yes,37,38 2006.229.13:26:28.42/va/05,04,usb,yes,33,33 2006.229.13:26:28.42/va/06,04,usb,yes,37,36 2006.229.13:26:28.42/va/07,05,usb,yes,33,33 2006.229.13:26:28.42/va/08,06,usb,yes,24,29 2006.229.13:26:28.65/valo/01,524.99,yes,locked 2006.229.13:26:28.65/valo/02,534.99,yes,locked 2006.229.13:26:28.65/valo/03,564.99,yes,locked 2006.229.13:26:28.65/valo/04,624.99,yes,locked 2006.229.13:26:28.65/valo/05,734.99,yes,locked 2006.229.13:26:28.65/valo/06,814.99,yes,locked 2006.229.13:26:28.65/valo/07,864.99,yes,locked 2006.229.13:26:28.65/valo/08,884.99,yes,locked 2006.229.13:26:29.74/vb/01,04,usb,yes,33,30 2006.229.13:26:29.74/vb/02,04,usb,yes,35,35 2006.229.13:26:29.74/vb/03,04,usb,yes,32,35 2006.229.13:26:29.74/vb/04,04,usb,yes,37,36 2006.229.13:26:29.74/vb/05,04,usb,yes,29,31 2006.229.13:26:29.74/vb/06,04,usb,yes,34,29 2006.229.13:26:29.74/vb/07,04,usb,yes,33,33 2006.229.13:26:29.74/vb/08,04,usb,yes,31,34 2006.229.13:26:29.97/vblo/01,629.99,yes,locked 2006.229.13:26:29.97/vblo/02,634.99,yes,locked 2006.229.13:26:29.97/vblo/03,649.99,yes,locked 2006.229.13:26:29.97/vblo/04,679.99,yes,locked 2006.229.13:26:29.97/vblo/05,709.99,yes,locked 2006.229.13:26:29.97/vblo/06,719.99,yes,locked 2006.229.13:26:29.97/vblo/07,734.99,yes,locked 2006.229.13:26:29.97/vblo/08,744.99,yes,locked 2006.229.13:26:30.12/vabw/8 2006.229.13:26:30.27/vbbw/8 2006.229.13:26:30.36/xfe/off,on,12.0 2006.229.13:26:30.73/ifatt/23,28,28,28 2006.229.13:26:31.08/fmout-gps/S +4.75E-07 2006.229.13:26:31.12:!2006.229.13:27:07 2006.229.13:27:07.00:data_valid=off 2006.229.13:27:07.00:"et 2006.229.13:27:07.00:!+3s 2006.229.13:27:10.01:"tape 2006.229.13:27:10.01:postob 2006.229.13:27:10.18/cable/+6.4119E-03 2006.229.13:27:10.18/wx/27.57,1002.0,100 2006.229.13:27:11.08/fmout-gps/S +4.75E-07 2006.229.13:27:11.08:scan_name=229-1332,jd0608,80 2006.229.13:27:11.08:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.13:27:12.13#flagr#flagr/antenna,new-source 2006.229.13:27:12.13:checkk5 2006.229.13:27:12.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:27:12.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:27:13.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:27:13.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:27:14.09/chk_obsdata//k5ts1/T2291326??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:27:14.48/chk_obsdata//k5ts2/T2291326??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:27:14.88/chk_obsdata//k5ts3/T2291326??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:27:15.30/chk_obsdata//k5ts4/T2291326??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:27:16.03/k5log//k5ts1_log_newline 2006.229.13:27:16.74/k5log//k5ts2_log_newline 2006.229.13:27:17.47/k5log//k5ts3_log_newline 2006.229.13:27:18.18/k5log//k5ts4_log_newline 2006.229.13:27:18.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:27:18.21:setupk4=1 2006.229.13:27:18.21$setupk4/echo=on 2006.229.13:27:18.21$setupk4/pcalon 2006.229.13:27:18.21$pcalon/"no phase cal control is implemented here 2006.229.13:27:18.21$setupk4/"tpicd=stop 2006.229.13:27:18.21$setupk4/"rec=synch_on 2006.229.13:27:18.21$setupk4/"rec_mode=128 2006.229.13:27:18.21$setupk4/!* 2006.229.13:27:18.21$setupk4/recpk4 2006.229.13:27:18.21$recpk4/recpatch= 2006.229.13:27:18.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:27:18.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:27:18.21$setupk4/vck44 2006.229.13:27:18.22$vck44/valo=1,524.99 2006.229.13:27:18.22#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:27:18.22#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:27:18.22#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:18.22#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:18.22#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:18.22#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:18.22#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:27:18.22#ibcon#first serial, iclass 6, count 0 2006.229.13:27:18.22#ibcon#enter sib2, iclass 6, count 0 2006.229.13:27:18.22#ibcon#flushed, iclass 6, count 0 2006.229.13:27:18.22#ibcon#about to write, iclass 6, count 0 2006.229.13:27:18.22#ibcon#wrote, iclass 6, count 0 2006.229.13:27:18.22#ibcon#about to read 3, iclass 6, count 0 2006.229.13:27:18.23#ibcon#read 3, iclass 6, count 0 2006.229.13:27:18.23#ibcon#about to read 4, iclass 6, count 0 2006.229.13:27:18.23#ibcon#read 4, iclass 6, count 0 2006.229.13:27:18.23#ibcon#about to read 5, iclass 6, count 0 2006.229.13:27:18.23#ibcon#read 5, iclass 6, count 0 2006.229.13:27:18.23#ibcon#about to read 6, iclass 6, count 0 2006.229.13:27:18.23#ibcon#read 6, iclass 6, count 0 2006.229.13:27:18.23#ibcon#end of sib2, iclass 6, count 0 2006.229.13:27:18.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:27:18.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:27:18.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:27:18.23#ibcon#*before write, iclass 6, count 0 2006.229.13:27:18.23#ibcon#enter sib2, iclass 6, count 0 2006.229.13:27:18.23#ibcon#flushed, iclass 6, count 0 2006.229.13:27:18.23#ibcon#about to write, iclass 6, count 0 2006.229.13:27:18.23#ibcon#wrote, iclass 6, count 0 2006.229.13:27:18.23#ibcon#about to read 3, iclass 6, count 0 2006.229.13:27:18.28#ibcon#read 3, iclass 6, count 0 2006.229.13:27:18.28#ibcon#about to read 4, iclass 6, count 0 2006.229.13:27:18.28#ibcon#read 4, iclass 6, count 0 2006.229.13:27:18.28#ibcon#about to read 5, iclass 6, count 0 2006.229.13:27:18.28#ibcon#read 5, iclass 6, count 0 2006.229.13:27:18.28#ibcon#about to read 6, iclass 6, count 0 2006.229.13:27:18.28#ibcon#read 6, iclass 6, count 0 2006.229.13:27:18.28#ibcon#end of sib2, iclass 6, count 0 2006.229.13:27:18.28#ibcon#*after write, iclass 6, count 0 2006.229.13:27:18.28#ibcon#*before return 0, iclass 6, count 0 2006.229.13:27:18.28#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:18.28#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:18.28#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:27:18.28#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:27:18.28$vck44/va=1,8 2006.229.13:27:18.28#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.13:27:18.28#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.13:27:18.28#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:18.28#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:18.28#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:18.28#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:18.28#ibcon#enter wrdev, iclass 10, count 2 2006.229.13:27:18.28#ibcon#first serial, iclass 10, count 2 2006.229.13:27:18.28#ibcon#enter sib2, iclass 10, count 2 2006.229.13:27:18.28#ibcon#flushed, iclass 10, count 2 2006.229.13:27:18.28#ibcon#about to write, iclass 10, count 2 2006.229.13:27:18.28#ibcon#wrote, iclass 10, count 2 2006.229.13:27:18.28#ibcon#about to read 3, iclass 10, count 2 2006.229.13:27:18.30#ibcon#read 3, iclass 10, count 2 2006.229.13:27:18.30#ibcon#about to read 4, iclass 10, count 2 2006.229.13:27:18.30#ibcon#read 4, iclass 10, count 2 2006.229.13:27:18.30#ibcon#about to read 5, iclass 10, count 2 2006.229.13:27:18.30#ibcon#read 5, iclass 10, count 2 2006.229.13:27:18.30#ibcon#about to read 6, iclass 10, count 2 2006.229.13:27:18.30#ibcon#read 6, iclass 10, count 2 2006.229.13:27:18.30#ibcon#end of sib2, iclass 10, count 2 2006.229.13:27:18.30#ibcon#*mode == 0, iclass 10, count 2 2006.229.13:27:18.30#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.13:27:18.30#ibcon#[25=AT01-08\r\n] 2006.229.13:27:18.30#ibcon#*before write, iclass 10, count 2 2006.229.13:27:18.30#ibcon#enter sib2, iclass 10, count 2 2006.229.13:27:18.30#ibcon#flushed, iclass 10, count 2 2006.229.13:27:18.30#ibcon#about to write, iclass 10, count 2 2006.229.13:27:18.30#ibcon#wrote, iclass 10, count 2 2006.229.13:27:18.30#ibcon#about to read 3, iclass 10, count 2 2006.229.13:27:18.33#ibcon#read 3, iclass 10, count 2 2006.229.13:27:18.33#ibcon#about to read 4, iclass 10, count 2 2006.229.13:27:18.33#ibcon#read 4, iclass 10, count 2 2006.229.13:27:18.33#ibcon#about to read 5, iclass 10, count 2 2006.229.13:27:18.33#ibcon#read 5, iclass 10, count 2 2006.229.13:27:18.33#ibcon#about to read 6, iclass 10, count 2 2006.229.13:27:18.33#ibcon#read 6, iclass 10, count 2 2006.229.13:27:18.33#ibcon#end of sib2, iclass 10, count 2 2006.229.13:27:18.33#ibcon#*after write, iclass 10, count 2 2006.229.13:27:18.33#ibcon#*before return 0, iclass 10, count 2 2006.229.13:27:18.33#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:18.33#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:18.33#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.13:27:18.33#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:18.33#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:18.45#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:18.45#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:18.45#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:27:18.45#ibcon#first serial, iclass 10, count 0 2006.229.13:27:18.45#ibcon#enter sib2, iclass 10, count 0 2006.229.13:27:18.45#ibcon#flushed, iclass 10, count 0 2006.229.13:27:18.45#ibcon#about to write, iclass 10, count 0 2006.229.13:27:18.45#ibcon#wrote, iclass 10, count 0 2006.229.13:27:18.45#ibcon#about to read 3, iclass 10, count 0 2006.229.13:27:18.47#ibcon#read 3, iclass 10, count 0 2006.229.13:27:18.47#ibcon#about to read 4, iclass 10, count 0 2006.229.13:27:18.47#ibcon#read 4, iclass 10, count 0 2006.229.13:27:18.47#ibcon#about to read 5, iclass 10, count 0 2006.229.13:27:18.47#ibcon#read 5, iclass 10, count 0 2006.229.13:27:18.47#ibcon#about to read 6, iclass 10, count 0 2006.229.13:27:18.47#ibcon#read 6, iclass 10, count 0 2006.229.13:27:18.47#ibcon#end of sib2, iclass 10, count 0 2006.229.13:27:18.47#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:27:18.47#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:27:18.47#ibcon#[25=USB\r\n] 2006.229.13:27:18.47#ibcon#*before write, iclass 10, count 0 2006.229.13:27:18.47#ibcon#enter sib2, iclass 10, count 0 2006.229.13:27:18.47#ibcon#flushed, iclass 10, count 0 2006.229.13:27:18.47#ibcon#about to write, iclass 10, count 0 2006.229.13:27:18.47#ibcon#wrote, iclass 10, count 0 2006.229.13:27:18.47#ibcon#about to read 3, iclass 10, count 0 2006.229.13:27:18.50#ibcon#read 3, iclass 10, count 0 2006.229.13:27:18.50#ibcon#about to read 4, iclass 10, count 0 2006.229.13:27:18.50#ibcon#read 4, iclass 10, count 0 2006.229.13:27:18.50#ibcon#about to read 5, iclass 10, count 0 2006.229.13:27:18.50#ibcon#read 5, iclass 10, count 0 2006.229.13:27:18.50#ibcon#about to read 6, iclass 10, count 0 2006.229.13:27:18.50#ibcon#read 6, iclass 10, count 0 2006.229.13:27:18.50#ibcon#end of sib2, iclass 10, count 0 2006.229.13:27:18.50#ibcon#*after write, iclass 10, count 0 2006.229.13:27:18.50#ibcon#*before return 0, iclass 10, count 0 2006.229.13:27:18.50#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:18.50#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:18.50#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:27:18.50#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:27:18.50$vck44/valo=2,534.99 2006.229.13:27:18.50#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:27:18.50#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:27:18.50#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:18.50#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:18.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:18.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:18.50#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:27:18.50#ibcon#first serial, iclass 12, count 0 2006.229.13:27:18.50#ibcon#enter sib2, iclass 12, count 0 2006.229.13:27:18.50#ibcon#flushed, iclass 12, count 0 2006.229.13:27:18.50#ibcon#about to write, iclass 12, count 0 2006.229.13:27:18.50#ibcon#wrote, iclass 12, count 0 2006.229.13:27:18.50#ibcon#about to read 3, iclass 12, count 0 2006.229.13:27:18.52#ibcon#read 3, iclass 12, count 0 2006.229.13:27:18.52#ibcon#about to read 4, iclass 12, count 0 2006.229.13:27:18.52#ibcon#read 4, iclass 12, count 0 2006.229.13:27:18.52#ibcon#about to read 5, iclass 12, count 0 2006.229.13:27:18.52#ibcon#read 5, iclass 12, count 0 2006.229.13:27:18.52#ibcon#about to read 6, iclass 12, count 0 2006.229.13:27:18.52#ibcon#read 6, iclass 12, count 0 2006.229.13:27:18.52#ibcon#end of sib2, iclass 12, count 0 2006.229.13:27:18.52#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:27:18.52#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:27:18.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:27:18.52#ibcon#*before write, iclass 12, count 0 2006.229.13:27:18.52#ibcon#enter sib2, iclass 12, count 0 2006.229.13:27:18.52#ibcon#flushed, iclass 12, count 0 2006.229.13:27:18.52#ibcon#about to write, iclass 12, count 0 2006.229.13:27:18.52#ibcon#wrote, iclass 12, count 0 2006.229.13:27:18.52#ibcon#about to read 3, iclass 12, count 0 2006.229.13:27:18.56#ibcon#read 3, iclass 12, count 0 2006.229.13:27:18.56#ibcon#about to read 4, iclass 12, count 0 2006.229.13:27:18.56#ibcon#read 4, iclass 12, count 0 2006.229.13:27:18.56#ibcon#about to read 5, iclass 12, count 0 2006.229.13:27:18.56#ibcon#read 5, iclass 12, count 0 2006.229.13:27:18.56#ibcon#about to read 6, iclass 12, count 0 2006.229.13:27:18.56#ibcon#read 6, iclass 12, count 0 2006.229.13:27:18.56#ibcon#end of sib2, iclass 12, count 0 2006.229.13:27:18.56#ibcon#*after write, iclass 12, count 0 2006.229.13:27:18.56#ibcon#*before return 0, iclass 12, count 0 2006.229.13:27:18.56#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:18.56#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:18.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:27:18.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:27:18.56$vck44/va=2,7 2006.229.13:27:18.56#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:27:18.56#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:27:18.56#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:18.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:18.62#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:18.62#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:18.62#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:27:18.62#ibcon#first serial, iclass 14, count 2 2006.229.13:27:18.62#ibcon#enter sib2, iclass 14, count 2 2006.229.13:27:18.62#ibcon#flushed, iclass 14, count 2 2006.229.13:27:18.62#ibcon#about to write, iclass 14, count 2 2006.229.13:27:18.62#ibcon#wrote, iclass 14, count 2 2006.229.13:27:18.62#ibcon#about to read 3, iclass 14, count 2 2006.229.13:27:18.64#ibcon#read 3, iclass 14, count 2 2006.229.13:27:18.64#ibcon#about to read 4, iclass 14, count 2 2006.229.13:27:18.64#ibcon#read 4, iclass 14, count 2 2006.229.13:27:18.64#ibcon#about to read 5, iclass 14, count 2 2006.229.13:27:18.64#ibcon#read 5, iclass 14, count 2 2006.229.13:27:18.64#ibcon#about to read 6, iclass 14, count 2 2006.229.13:27:18.64#ibcon#read 6, iclass 14, count 2 2006.229.13:27:18.64#ibcon#end of sib2, iclass 14, count 2 2006.229.13:27:18.64#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:27:18.64#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:27:18.64#ibcon#[25=AT02-07\r\n] 2006.229.13:27:18.64#ibcon#*before write, iclass 14, count 2 2006.229.13:27:18.64#ibcon#enter sib2, iclass 14, count 2 2006.229.13:27:18.64#ibcon#flushed, iclass 14, count 2 2006.229.13:27:18.64#ibcon#about to write, iclass 14, count 2 2006.229.13:27:18.64#ibcon#wrote, iclass 14, count 2 2006.229.13:27:18.64#ibcon#about to read 3, iclass 14, count 2 2006.229.13:27:18.67#ibcon#read 3, iclass 14, count 2 2006.229.13:27:18.67#ibcon#about to read 4, iclass 14, count 2 2006.229.13:27:18.67#ibcon#read 4, iclass 14, count 2 2006.229.13:27:18.67#ibcon#about to read 5, iclass 14, count 2 2006.229.13:27:18.67#ibcon#read 5, iclass 14, count 2 2006.229.13:27:18.67#ibcon#about to read 6, iclass 14, count 2 2006.229.13:27:18.67#ibcon#read 6, iclass 14, count 2 2006.229.13:27:18.67#ibcon#end of sib2, iclass 14, count 2 2006.229.13:27:18.67#ibcon#*after write, iclass 14, count 2 2006.229.13:27:18.67#ibcon#*before return 0, iclass 14, count 2 2006.229.13:27:18.67#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:18.67#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:18.67#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:27:18.67#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:18.67#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:18.79#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:18.79#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:18.79#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:27:18.79#ibcon#first serial, iclass 14, count 0 2006.229.13:27:18.79#ibcon#enter sib2, iclass 14, count 0 2006.229.13:27:18.79#ibcon#flushed, iclass 14, count 0 2006.229.13:27:18.79#ibcon#about to write, iclass 14, count 0 2006.229.13:27:18.79#ibcon#wrote, iclass 14, count 0 2006.229.13:27:18.79#ibcon#about to read 3, iclass 14, count 0 2006.229.13:27:18.81#ibcon#read 3, iclass 14, count 0 2006.229.13:27:18.81#ibcon#about to read 4, iclass 14, count 0 2006.229.13:27:18.81#ibcon#read 4, iclass 14, count 0 2006.229.13:27:18.81#ibcon#about to read 5, iclass 14, count 0 2006.229.13:27:18.81#ibcon#read 5, iclass 14, count 0 2006.229.13:27:18.81#ibcon#about to read 6, iclass 14, count 0 2006.229.13:27:18.81#ibcon#read 6, iclass 14, count 0 2006.229.13:27:18.81#ibcon#end of sib2, iclass 14, count 0 2006.229.13:27:18.81#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:27:18.81#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:27:18.81#ibcon#[25=USB\r\n] 2006.229.13:27:18.81#ibcon#*before write, iclass 14, count 0 2006.229.13:27:18.81#ibcon#enter sib2, iclass 14, count 0 2006.229.13:27:18.81#ibcon#flushed, iclass 14, count 0 2006.229.13:27:18.81#ibcon#about to write, iclass 14, count 0 2006.229.13:27:18.81#ibcon#wrote, iclass 14, count 0 2006.229.13:27:18.81#ibcon#about to read 3, iclass 14, count 0 2006.229.13:27:18.84#ibcon#read 3, iclass 14, count 0 2006.229.13:27:18.84#ibcon#about to read 4, iclass 14, count 0 2006.229.13:27:18.84#ibcon#read 4, iclass 14, count 0 2006.229.13:27:18.84#ibcon#about to read 5, iclass 14, count 0 2006.229.13:27:18.84#ibcon#read 5, iclass 14, count 0 2006.229.13:27:18.84#ibcon#about to read 6, iclass 14, count 0 2006.229.13:27:18.84#ibcon#read 6, iclass 14, count 0 2006.229.13:27:18.84#ibcon#end of sib2, iclass 14, count 0 2006.229.13:27:18.84#ibcon#*after write, iclass 14, count 0 2006.229.13:27:18.84#ibcon#*before return 0, iclass 14, count 0 2006.229.13:27:18.84#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:18.84#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:18.84#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:27:18.84#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:27:18.84$vck44/valo=3,564.99 2006.229.13:27:18.84#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:27:18.84#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:27:18.84#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:18.84#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:18.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:18.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:18.84#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:27:18.84#ibcon#first serial, iclass 16, count 0 2006.229.13:27:18.84#ibcon#enter sib2, iclass 16, count 0 2006.229.13:27:18.84#ibcon#flushed, iclass 16, count 0 2006.229.13:27:18.84#ibcon#about to write, iclass 16, count 0 2006.229.13:27:18.84#ibcon#wrote, iclass 16, count 0 2006.229.13:27:18.84#ibcon#about to read 3, iclass 16, count 0 2006.229.13:27:18.86#ibcon#read 3, iclass 16, count 0 2006.229.13:27:18.86#ibcon#about to read 4, iclass 16, count 0 2006.229.13:27:18.86#ibcon#read 4, iclass 16, count 0 2006.229.13:27:18.86#ibcon#about to read 5, iclass 16, count 0 2006.229.13:27:18.86#ibcon#read 5, iclass 16, count 0 2006.229.13:27:18.86#ibcon#about to read 6, iclass 16, count 0 2006.229.13:27:18.86#ibcon#read 6, iclass 16, count 0 2006.229.13:27:18.86#ibcon#end of sib2, iclass 16, count 0 2006.229.13:27:18.86#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:27:18.86#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:27:18.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:27:18.86#ibcon#*before write, iclass 16, count 0 2006.229.13:27:18.86#ibcon#enter sib2, iclass 16, count 0 2006.229.13:27:18.86#ibcon#flushed, iclass 16, count 0 2006.229.13:27:18.86#ibcon#about to write, iclass 16, count 0 2006.229.13:27:18.86#ibcon#wrote, iclass 16, count 0 2006.229.13:27:18.86#ibcon#about to read 3, iclass 16, count 0 2006.229.13:27:18.90#ibcon#read 3, iclass 16, count 0 2006.229.13:27:18.90#ibcon#about to read 4, iclass 16, count 0 2006.229.13:27:18.90#ibcon#read 4, iclass 16, count 0 2006.229.13:27:18.90#ibcon#about to read 5, iclass 16, count 0 2006.229.13:27:18.90#ibcon#read 5, iclass 16, count 0 2006.229.13:27:18.90#ibcon#about to read 6, iclass 16, count 0 2006.229.13:27:18.90#ibcon#read 6, iclass 16, count 0 2006.229.13:27:18.90#ibcon#end of sib2, iclass 16, count 0 2006.229.13:27:18.90#ibcon#*after write, iclass 16, count 0 2006.229.13:27:18.90#ibcon#*before return 0, iclass 16, count 0 2006.229.13:27:18.90#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:18.90#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:18.90#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:27:18.90#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:27:18.90$vck44/va=3,6 2006.229.13:27:18.90#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:27:18.90#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:27:18.90#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:18.90#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:18.96#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:18.96#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:18.96#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:27:18.96#ibcon#first serial, iclass 18, count 2 2006.229.13:27:18.96#ibcon#enter sib2, iclass 18, count 2 2006.229.13:27:18.96#ibcon#flushed, iclass 18, count 2 2006.229.13:27:18.96#ibcon#about to write, iclass 18, count 2 2006.229.13:27:18.96#ibcon#wrote, iclass 18, count 2 2006.229.13:27:18.96#ibcon#about to read 3, iclass 18, count 2 2006.229.13:27:18.98#ibcon#read 3, iclass 18, count 2 2006.229.13:27:18.98#ibcon#about to read 4, iclass 18, count 2 2006.229.13:27:18.98#ibcon#read 4, iclass 18, count 2 2006.229.13:27:18.98#ibcon#about to read 5, iclass 18, count 2 2006.229.13:27:18.98#ibcon#read 5, iclass 18, count 2 2006.229.13:27:18.98#ibcon#about to read 6, iclass 18, count 2 2006.229.13:27:18.98#ibcon#read 6, iclass 18, count 2 2006.229.13:27:18.98#ibcon#end of sib2, iclass 18, count 2 2006.229.13:27:18.98#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:27:18.98#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:27:18.98#ibcon#[25=AT03-06\r\n] 2006.229.13:27:18.98#ibcon#*before write, iclass 18, count 2 2006.229.13:27:18.98#ibcon#enter sib2, iclass 18, count 2 2006.229.13:27:18.98#ibcon#flushed, iclass 18, count 2 2006.229.13:27:18.98#ibcon#about to write, iclass 18, count 2 2006.229.13:27:18.98#ibcon#wrote, iclass 18, count 2 2006.229.13:27:18.98#ibcon#about to read 3, iclass 18, count 2 2006.229.13:27:19.01#ibcon#read 3, iclass 18, count 2 2006.229.13:27:19.01#ibcon#about to read 4, iclass 18, count 2 2006.229.13:27:19.01#ibcon#read 4, iclass 18, count 2 2006.229.13:27:19.01#ibcon#about to read 5, iclass 18, count 2 2006.229.13:27:19.01#ibcon#read 5, iclass 18, count 2 2006.229.13:27:19.01#ibcon#about to read 6, iclass 18, count 2 2006.229.13:27:19.01#ibcon#read 6, iclass 18, count 2 2006.229.13:27:19.01#ibcon#end of sib2, iclass 18, count 2 2006.229.13:27:19.01#ibcon#*after write, iclass 18, count 2 2006.229.13:27:19.01#ibcon#*before return 0, iclass 18, count 2 2006.229.13:27:19.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:19.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:19.01#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:27:19.01#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:19.01#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:19.13#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:19.13#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:19.13#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:27:19.13#ibcon#first serial, iclass 18, count 0 2006.229.13:27:19.13#ibcon#enter sib2, iclass 18, count 0 2006.229.13:27:19.13#ibcon#flushed, iclass 18, count 0 2006.229.13:27:19.13#ibcon#about to write, iclass 18, count 0 2006.229.13:27:19.13#ibcon#wrote, iclass 18, count 0 2006.229.13:27:19.13#ibcon#about to read 3, iclass 18, count 0 2006.229.13:27:19.15#ibcon#read 3, iclass 18, count 0 2006.229.13:27:19.15#ibcon#about to read 4, iclass 18, count 0 2006.229.13:27:19.15#ibcon#read 4, iclass 18, count 0 2006.229.13:27:19.15#ibcon#about to read 5, iclass 18, count 0 2006.229.13:27:19.15#ibcon#read 5, iclass 18, count 0 2006.229.13:27:19.15#ibcon#about to read 6, iclass 18, count 0 2006.229.13:27:19.15#ibcon#read 6, iclass 18, count 0 2006.229.13:27:19.15#ibcon#end of sib2, iclass 18, count 0 2006.229.13:27:19.15#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:27:19.15#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:27:19.15#ibcon#[25=USB\r\n] 2006.229.13:27:19.15#ibcon#*before write, iclass 18, count 0 2006.229.13:27:19.15#ibcon#enter sib2, iclass 18, count 0 2006.229.13:27:19.15#ibcon#flushed, iclass 18, count 0 2006.229.13:27:19.15#ibcon#about to write, iclass 18, count 0 2006.229.13:27:19.15#ibcon#wrote, iclass 18, count 0 2006.229.13:27:19.15#ibcon#about to read 3, iclass 18, count 0 2006.229.13:27:19.18#ibcon#read 3, iclass 18, count 0 2006.229.13:27:19.18#ibcon#about to read 4, iclass 18, count 0 2006.229.13:27:19.18#ibcon#read 4, iclass 18, count 0 2006.229.13:27:19.18#ibcon#about to read 5, iclass 18, count 0 2006.229.13:27:19.18#ibcon#read 5, iclass 18, count 0 2006.229.13:27:19.18#ibcon#about to read 6, iclass 18, count 0 2006.229.13:27:19.18#ibcon#read 6, iclass 18, count 0 2006.229.13:27:19.18#ibcon#end of sib2, iclass 18, count 0 2006.229.13:27:19.18#ibcon#*after write, iclass 18, count 0 2006.229.13:27:19.18#ibcon#*before return 0, iclass 18, count 0 2006.229.13:27:19.18#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:19.18#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:19.18#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:27:19.18#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:27:19.18$vck44/valo=4,624.99 2006.229.13:27:19.18#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:27:19.18#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:27:19.18#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:19.18#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:19.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:19.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:19.18#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:27:19.18#ibcon#first serial, iclass 20, count 0 2006.229.13:27:19.18#ibcon#enter sib2, iclass 20, count 0 2006.229.13:27:19.18#ibcon#flushed, iclass 20, count 0 2006.229.13:27:19.18#ibcon#about to write, iclass 20, count 0 2006.229.13:27:19.18#ibcon#wrote, iclass 20, count 0 2006.229.13:27:19.18#ibcon#about to read 3, iclass 20, count 0 2006.229.13:27:19.20#ibcon#read 3, iclass 20, count 0 2006.229.13:27:19.20#ibcon#about to read 4, iclass 20, count 0 2006.229.13:27:19.20#ibcon#read 4, iclass 20, count 0 2006.229.13:27:19.20#ibcon#about to read 5, iclass 20, count 0 2006.229.13:27:19.20#ibcon#read 5, iclass 20, count 0 2006.229.13:27:19.20#ibcon#about to read 6, iclass 20, count 0 2006.229.13:27:19.20#ibcon#read 6, iclass 20, count 0 2006.229.13:27:19.20#ibcon#end of sib2, iclass 20, count 0 2006.229.13:27:19.20#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:27:19.20#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:27:19.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:27:19.20#ibcon#*before write, iclass 20, count 0 2006.229.13:27:19.20#ibcon#enter sib2, iclass 20, count 0 2006.229.13:27:19.20#ibcon#flushed, iclass 20, count 0 2006.229.13:27:19.20#ibcon#about to write, iclass 20, count 0 2006.229.13:27:19.20#ibcon#wrote, iclass 20, count 0 2006.229.13:27:19.20#ibcon#about to read 3, iclass 20, count 0 2006.229.13:27:19.24#ibcon#read 3, iclass 20, count 0 2006.229.13:27:19.24#ibcon#about to read 4, iclass 20, count 0 2006.229.13:27:19.24#ibcon#read 4, iclass 20, count 0 2006.229.13:27:19.24#ibcon#about to read 5, iclass 20, count 0 2006.229.13:27:19.24#ibcon#read 5, iclass 20, count 0 2006.229.13:27:19.24#ibcon#about to read 6, iclass 20, count 0 2006.229.13:27:19.24#ibcon#read 6, iclass 20, count 0 2006.229.13:27:19.24#ibcon#end of sib2, iclass 20, count 0 2006.229.13:27:19.24#ibcon#*after write, iclass 20, count 0 2006.229.13:27:19.24#ibcon#*before return 0, iclass 20, count 0 2006.229.13:27:19.24#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:19.24#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:19.24#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:27:19.24#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:27:19.24$vck44/va=4,7 2006.229.13:27:19.24#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:27:19.24#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:27:19.24#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:19.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:19.30#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:19.30#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:19.30#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:27:19.30#ibcon#first serial, iclass 22, count 2 2006.229.13:27:19.30#ibcon#enter sib2, iclass 22, count 2 2006.229.13:27:19.30#ibcon#flushed, iclass 22, count 2 2006.229.13:27:19.30#ibcon#about to write, iclass 22, count 2 2006.229.13:27:19.30#ibcon#wrote, iclass 22, count 2 2006.229.13:27:19.30#ibcon#about to read 3, iclass 22, count 2 2006.229.13:27:19.32#ibcon#read 3, iclass 22, count 2 2006.229.13:27:19.32#ibcon#about to read 4, iclass 22, count 2 2006.229.13:27:19.32#ibcon#read 4, iclass 22, count 2 2006.229.13:27:19.32#ibcon#about to read 5, iclass 22, count 2 2006.229.13:27:19.32#ibcon#read 5, iclass 22, count 2 2006.229.13:27:19.32#ibcon#about to read 6, iclass 22, count 2 2006.229.13:27:19.32#ibcon#read 6, iclass 22, count 2 2006.229.13:27:19.32#ibcon#end of sib2, iclass 22, count 2 2006.229.13:27:19.32#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:27:19.32#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:27:19.32#ibcon#[25=AT04-07\r\n] 2006.229.13:27:19.32#ibcon#*before write, iclass 22, count 2 2006.229.13:27:19.32#ibcon#enter sib2, iclass 22, count 2 2006.229.13:27:19.32#ibcon#flushed, iclass 22, count 2 2006.229.13:27:19.32#ibcon#about to write, iclass 22, count 2 2006.229.13:27:19.32#ibcon#wrote, iclass 22, count 2 2006.229.13:27:19.32#ibcon#about to read 3, iclass 22, count 2 2006.229.13:27:19.35#ibcon#read 3, iclass 22, count 2 2006.229.13:27:19.35#ibcon#about to read 4, iclass 22, count 2 2006.229.13:27:19.35#ibcon#read 4, iclass 22, count 2 2006.229.13:27:19.35#ibcon#about to read 5, iclass 22, count 2 2006.229.13:27:19.35#ibcon#read 5, iclass 22, count 2 2006.229.13:27:19.35#ibcon#about to read 6, iclass 22, count 2 2006.229.13:27:19.35#ibcon#read 6, iclass 22, count 2 2006.229.13:27:19.35#ibcon#end of sib2, iclass 22, count 2 2006.229.13:27:19.35#ibcon#*after write, iclass 22, count 2 2006.229.13:27:19.35#ibcon#*before return 0, iclass 22, count 2 2006.229.13:27:19.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:19.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:19.35#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:27:19.35#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:19.35#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:19.47#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:19.47#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:19.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:27:19.47#ibcon#first serial, iclass 22, count 0 2006.229.13:27:19.47#ibcon#enter sib2, iclass 22, count 0 2006.229.13:27:19.47#ibcon#flushed, iclass 22, count 0 2006.229.13:27:19.47#ibcon#about to write, iclass 22, count 0 2006.229.13:27:19.47#ibcon#wrote, iclass 22, count 0 2006.229.13:27:19.47#ibcon#about to read 3, iclass 22, count 0 2006.229.13:27:19.49#ibcon#read 3, iclass 22, count 0 2006.229.13:27:19.49#ibcon#about to read 4, iclass 22, count 0 2006.229.13:27:19.49#ibcon#read 4, iclass 22, count 0 2006.229.13:27:19.49#ibcon#about to read 5, iclass 22, count 0 2006.229.13:27:19.49#ibcon#read 5, iclass 22, count 0 2006.229.13:27:19.49#ibcon#about to read 6, iclass 22, count 0 2006.229.13:27:19.49#ibcon#read 6, iclass 22, count 0 2006.229.13:27:19.49#ibcon#end of sib2, iclass 22, count 0 2006.229.13:27:19.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:27:19.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:27:19.49#ibcon#[25=USB\r\n] 2006.229.13:27:19.49#ibcon#*before write, iclass 22, count 0 2006.229.13:27:19.49#ibcon#enter sib2, iclass 22, count 0 2006.229.13:27:19.49#ibcon#flushed, iclass 22, count 0 2006.229.13:27:19.49#ibcon#about to write, iclass 22, count 0 2006.229.13:27:19.49#ibcon#wrote, iclass 22, count 0 2006.229.13:27:19.49#ibcon#about to read 3, iclass 22, count 0 2006.229.13:27:19.52#ibcon#read 3, iclass 22, count 0 2006.229.13:27:19.52#ibcon#about to read 4, iclass 22, count 0 2006.229.13:27:19.52#ibcon#read 4, iclass 22, count 0 2006.229.13:27:19.52#ibcon#about to read 5, iclass 22, count 0 2006.229.13:27:19.52#ibcon#read 5, iclass 22, count 0 2006.229.13:27:19.52#ibcon#about to read 6, iclass 22, count 0 2006.229.13:27:19.52#ibcon#read 6, iclass 22, count 0 2006.229.13:27:19.52#ibcon#end of sib2, iclass 22, count 0 2006.229.13:27:19.52#ibcon#*after write, iclass 22, count 0 2006.229.13:27:19.52#ibcon#*before return 0, iclass 22, count 0 2006.229.13:27:19.52#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:19.52#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:19.52#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:27:19.52#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:27:19.52$vck44/valo=5,734.99 2006.229.13:27:19.52#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:27:19.52#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:27:19.52#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:19.52#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:19.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:19.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:19.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:27:19.52#ibcon#first serial, iclass 24, count 0 2006.229.13:27:19.52#ibcon#enter sib2, iclass 24, count 0 2006.229.13:27:19.52#ibcon#flushed, iclass 24, count 0 2006.229.13:27:19.52#ibcon#about to write, iclass 24, count 0 2006.229.13:27:19.52#ibcon#wrote, iclass 24, count 0 2006.229.13:27:19.52#ibcon#about to read 3, iclass 24, count 0 2006.229.13:27:19.54#ibcon#read 3, iclass 24, count 0 2006.229.13:27:19.54#ibcon#about to read 4, iclass 24, count 0 2006.229.13:27:19.54#ibcon#read 4, iclass 24, count 0 2006.229.13:27:19.54#ibcon#about to read 5, iclass 24, count 0 2006.229.13:27:19.54#ibcon#read 5, iclass 24, count 0 2006.229.13:27:19.54#ibcon#about to read 6, iclass 24, count 0 2006.229.13:27:19.54#ibcon#read 6, iclass 24, count 0 2006.229.13:27:19.54#ibcon#end of sib2, iclass 24, count 0 2006.229.13:27:19.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:27:19.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:27:19.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:27:19.54#ibcon#*before write, iclass 24, count 0 2006.229.13:27:19.54#ibcon#enter sib2, iclass 24, count 0 2006.229.13:27:19.54#ibcon#flushed, iclass 24, count 0 2006.229.13:27:19.54#ibcon#about to write, iclass 24, count 0 2006.229.13:27:19.54#ibcon#wrote, iclass 24, count 0 2006.229.13:27:19.54#ibcon#about to read 3, iclass 24, count 0 2006.229.13:27:19.58#ibcon#read 3, iclass 24, count 0 2006.229.13:27:19.58#ibcon#about to read 4, iclass 24, count 0 2006.229.13:27:19.58#ibcon#read 4, iclass 24, count 0 2006.229.13:27:19.58#ibcon#about to read 5, iclass 24, count 0 2006.229.13:27:19.58#ibcon#read 5, iclass 24, count 0 2006.229.13:27:19.58#ibcon#about to read 6, iclass 24, count 0 2006.229.13:27:19.58#ibcon#read 6, iclass 24, count 0 2006.229.13:27:19.58#ibcon#end of sib2, iclass 24, count 0 2006.229.13:27:19.58#ibcon#*after write, iclass 24, count 0 2006.229.13:27:19.58#ibcon#*before return 0, iclass 24, count 0 2006.229.13:27:19.58#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:19.58#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:19.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:27:19.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:27:19.58$vck44/va=5,4 2006.229.13:27:19.58#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:27:19.58#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:27:19.58#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:19.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:19.64#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:19.64#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:19.64#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:27:19.64#ibcon#first serial, iclass 26, count 2 2006.229.13:27:19.64#ibcon#enter sib2, iclass 26, count 2 2006.229.13:27:19.64#ibcon#flushed, iclass 26, count 2 2006.229.13:27:19.64#ibcon#about to write, iclass 26, count 2 2006.229.13:27:19.64#ibcon#wrote, iclass 26, count 2 2006.229.13:27:19.64#ibcon#about to read 3, iclass 26, count 2 2006.229.13:27:19.66#ibcon#read 3, iclass 26, count 2 2006.229.13:27:19.66#ibcon#about to read 4, iclass 26, count 2 2006.229.13:27:19.66#ibcon#read 4, iclass 26, count 2 2006.229.13:27:19.66#ibcon#about to read 5, iclass 26, count 2 2006.229.13:27:19.66#ibcon#read 5, iclass 26, count 2 2006.229.13:27:19.66#ibcon#about to read 6, iclass 26, count 2 2006.229.13:27:19.66#ibcon#read 6, iclass 26, count 2 2006.229.13:27:19.66#ibcon#end of sib2, iclass 26, count 2 2006.229.13:27:19.66#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:27:19.66#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:27:19.66#ibcon#[25=AT05-04\r\n] 2006.229.13:27:19.66#ibcon#*before write, iclass 26, count 2 2006.229.13:27:19.66#ibcon#enter sib2, iclass 26, count 2 2006.229.13:27:19.66#ibcon#flushed, iclass 26, count 2 2006.229.13:27:19.66#ibcon#about to write, iclass 26, count 2 2006.229.13:27:19.66#ibcon#wrote, iclass 26, count 2 2006.229.13:27:19.66#ibcon#about to read 3, iclass 26, count 2 2006.229.13:27:19.69#ibcon#read 3, iclass 26, count 2 2006.229.13:27:19.69#ibcon#about to read 4, iclass 26, count 2 2006.229.13:27:19.69#ibcon#read 4, iclass 26, count 2 2006.229.13:27:19.69#ibcon#about to read 5, iclass 26, count 2 2006.229.13:27:19.69#ibcon#read 5, iclass 26, count 2 2006.229.13:27:19.69#ibcon#about to read 6, iclass 26, count 2 2006.229.13:27:19.69#ibcon#read 6, iclass 26, count 2 2006.229.13:27:19.69#ibcon#end of sib2, iclass 26, count 2 2006.229.13:27:19.69#ibcon#*after write, iclass 26, count 2 2006.229.13:27:19.69#ibcon#*before return 0, iclass 26, count 2 2006.229.13:27:19.69#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:19.69#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:19.69#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:27:19.69#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:19.69#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:19.81#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:19.81#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:19.81#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:27:19.81#ibcon#first serial, iclass 26, count 0 2006.229.13:27:19.81#ibcon#enter sib2, iclass 26, count 0 2006.229.13:27:19.81#ibcon#flushed, iclass 26, count 0 2006.229.13:27:19.81#ibcon#about to write, iclass 26, count 0 2006.229.13:27:19.81#ibcon#wrote, iclass 26, count 0 2006.229.13:27:19.81#ibcon#about to read 3, iclass 26, count 0 2006.229.13:27:19.83#ibcon#read 3, iclass 26, count 0 2006.229.13:27:19.83#ibcon#about to read 4, iclass 26, count 0 2006.229.13:27:19.83#ibcon#read 4, iclass 26, count 0 2006.229.13:27:19.83#ibcon#about to read 5, iclass 26, count 0 2006.229.13:27:19.83#ibcon#read 5, iclass 26, count 0 2006.229.13:27:19.83#ibcon#about to read 6, iclass 26, count 0 2006.229.13:27:19.83#ibcon#read 6, iclass 26, count 0 2006.229.13:27:19.83#ibcon#end of sib2, iclass 26, count 0 2006.229.13:27:19.83#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:27:19.83#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:27:19.83#ibcon#[25=USB\r\n] 2006.229.13:27:19.83#ibcon#*before write, iclass 26, count 0 2006.229.13:27:19.83#ibcon#enter sib2, iclass 26, count 0 2006.229.13:27:19.83#ibcon#flushed, iclass 26, count 0 2006.229.13:27:19.83#ibcon#about to write, iclass 26, count 0 2006.229.13:27:19.83#ibcon#wrote, iclass 26, count 0 2006.229.13:27:19.83#ibcon#about to read 3, iclass 26, count 0 2006.229.13:27:19.86#ibcon#read 3, iclass 26, count 0 2006.229.13:27:19.86#ibcon#about to read 4, iclass 26, count 0 2006.229.13:27:19.86#ibcon#read 4, iclass 26, count 0 2006.229.13:27:19.86#ibcon#about to read 5, iclass 26, count 0 2006.229.13:27:19.86#ibcon#read 5, iclass 26, count 0 2006.229.13:27:19.86#ibcon#about to read 6, iclass 26, count 0 2006.229.13:27:19.86#ibcon#read 6, iclass 26, count 0 2006.229.13:27:19.86#ibcon#end of sib2, iclass 26, count 0 2006.229.13:27:19.86#ibcon#*after write, iclass 26, count 0 2006.229.13:27:19.86#ibcon#*before return 0, iclass 26, count 0 2006.229.13:27:19.86#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:19.86#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:19.86#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:27:19.86#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:27:19.86$vck44/valo=6,814.99 2006.229.13:27:19.86#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:27:19.86#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:27:19.86#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:19.86#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:19.86#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:19.86#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:19.86#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:27:19.86#ibcon#first serial, iclass 28, count 0 2006.229.13:27:19.86#ibcon#enter sib2, iclass 28, count 0 2006.229.13:27:19.86#ibcon#flushed, iclass 28, count 0 2006.229.13:27:19.86#ibcon#about to write, iclass 28, count 0 2006.229.13:27:19.86#ibcon#wrote, iclass 28, count 0 2006.229.13:27:19.86#ibcon#about to read 3, iclass 28, count 0 2006.229.13:27:19.88#ibcon#read 3, iclass 28, count 0 2006.229.13:27:19.88#ibcon#about to read 4, iclass 28, count 0 2006.229.13:27:19.88#ibcon#read 4, iclass 28, count 0 2006.229.13:27:19.88#ibcon#about to read 5, iclass 28, count 0 2006.229.13:27:19.88#ibcon#read 5, iclass 28, count 0 2006.229.13:27:19.88#ibcon#about to read 6, iclass 28, count 0 2006.229.13:27:19.88#ibcon#read 6, iclass 28, count 0 2006.229.13:27:19.88#ibcon#end of sib2, iclass 28, count 0 2006.229.13:27:19.88#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:27:19.88#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:27:19.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:27:19.88#ibcon#*before write, iclass 28, count 0 2006.229.13:27:19.88#ibcon#enter sib2, iclass 28, count 0 2006.229.13:27:19.88#ibcon#flushed, iclass 28, count 0 2006.229.13:27:19.88#ibcon#about to write, iclass 28, count 0 2006.229.13:27:19.88#ibcon#wrote, iclass 28, count 0 2006.229.13:27:19.88#ibcon#about to read 3, iclass 28, count 0 2006.229.13:27:19.92#ibcon#read 3, iclass 28, count 0 2006.229.13:27:19.92#ibcon#about to read 4, iclass 28, count 0 2006.229.13:27:19.92#ibcon#read 4, iclass 28, count 0 2006.229.13:27:19.92#ibcon#about to read 5, iclass 28, count 0 2006.229.13:27:19.92#ibcon#read 5, iclass 28, count 0 2006.229.13:27:19.92#ibcon#about to read 6, iclass 28, count 0 2006.229.13:27:19.92#ibcon#read 6, iclass 28, count 0 2006.229.13:27:19.92#ibcon#end of sib2, iclass 28, count 0 2006.229.13:27:19.92#ibcon#*after write, iclass 28, count 0 2006.229.13:27:19.92#ibcon#*before return 0, iclass 28, count 0 2006.229.13:27:19.92#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:19.92#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:19.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:27:19.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:27:19.92$vck44/va=6,4 2006.229.13:27:19.92#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:27:19.92#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:27:19.92#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:19.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:19.98#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:19.98#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:19.98#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:27:19.98#ibcon#first serial, iclass 30, count 2 2006.229.13:27:19.98#ibcon#enter sib2, iclass 30, count 2 2006.229.13:27:19.98#ibcon#flushed, iclass 30, count 2 2006.229.13:27:19.98#ibcon#about to write, iclass 30, count 2 2006.229.13:27:19.98#ibcon#wrote, iclass 30, count 2 2006.229.13:27:19.98#ibcon#about to read 3, iclass 30, count 2 2006.229.13:27:20.00#ibcon#read 3, iclass 30, count 2 2006.229.13:27:20.00#ibcon#about to read 4, iclass 30, count 2 2006.229.13:27:20.00#ibcon#read 4, iclass 30, count 2 2006.229.13:27:20.00#ibcon#about to read 5, iclass 30, count 2 2006.229.13:27:20.00#ibcon#read 5, iclass 30, count 2 2006.229.13:27:20.00#ibcon#about to read 6, iclass 30, count 2 2006.229.13:27:20.00#ibcon#read 6, iclass 30, count 2 2006.229.13:27:20.00#ibcon#end of sib2, iclass 30, count 2 2006.229.13:27:20.00#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:27:20.00#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:27:20.00#ibcon#[25=AT06-04\r\n] 2006.229.13:27:20.00#ibcon#*before write, iclass 30, count 2 2006.229.13:27:20.00#ibcon#enter sib2, iclass 30, count 2 2006.229.13:27:20.00#ibcon#flushed, iclass 30, count 2 2006.229.13:27:20.00#ibcon#about to write, iclass 30, count 2 2006.229.13:27:20.00#ibcon#wrote, iclass 30, count 2 2006.229.13:27:20.00#ibcon#about to read 3, iclass 30, count 2 2006.229.13:27:20.03#ibcon#read 3, iclass 30, count 2 2006.229.13:27:20.03#ibcon#about to read 4, iclass 30, count 2 2006.229.13:27:20.03#ibcon#read 4, iclass 30, count 2 2006.229.13:27:20.03#ibcon#about to read 5, iclass 30, count 2 2006.229.13:27:20.03#ibcon#read 5, iclass 30, count 2 2006.229.13:27:20.03#ibcon#about to read 6, iclass 30, count 2 2006.229.13:27:20.03#ibcon#read 6, iclass 30, count 2 2006.229.13:27:20.03#ibcon#end of sib2, iclass 30, count 2 2006.229.13:27:20.03#ibcon#*after write, iclass 30, count 2 2006.229.13:27:20.03#ibcon#*before return 0, iclass 30, count 2 2006.229.13:27:20.03#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:20.03#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:20.03#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:27:20.03#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:20.03#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:20.15#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:20.15#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:20.15#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:27:20.15#ibcon#first serial, iclass 30, count 0 2006.229.13:27:20.15#ibcon#enter sib2, iclass 30, count 0 2006.229.13:27:20.15#ibcon#flushed, iclass 30, count 0 2006.229.13:27:20.15#ibcon#about to write, iclass 30, count 0 2006.229.13:27:20.15#ibcon#wrote, iclass 30, count 0 2006.229.13:27:20.15#ibcon#about to read 3, iclass 30, count 0 2006.229.13:27:20.17#ibcon#read 3, iclass 30, count 0 2006.229.13:27:20.17#ibcon#about to read 4, iclass 30, count 0 2006.229.13:27:20.17#ibcon#read 4, iclass 30, count 0 2006.229.13:27:20.17#ibcon#about to read 5, iclass 30, count 0 2006.229.13:27:20.17#ibcon#read 5, iclass 30, count 0 2006.229.13:27:20.17#ibcon#about to read 6, iclass 30, count 0 2006.229.13:27:20.17#ibcon#read 6, iclass 30, count 0 2006.229.13:27:20.17#ibcon#end of sib2, iclass 30, count 0 2006.229.13:27:20.17#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:27:20.17#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:27:20.17#ibcon#[25=USB\r\n] 2006.229.13:27:20.17#ibcon#*before write, iclass 30, count 0 2006.229.13:27:20.17#ibcon#enter sib2, iclass 30, count 0 2006.229.13:27:20.17#ibcon#flushed, iclass 30, count 0 2006.229.13:27:20.17#ibcon#about to write, iclass 30, count 0 2006.229.13:27:20.17#ibcon#wrote, iclass 30, count 0 2006.229.13:27:20.17#ibcon#about to read 3, iclass 30, count 0 2006.229.13:27:20.20#ibcon#read 3, iclass 30, count 0 2006.229.13:27:20.20#ibcon#about to read 4, iclass 30, count 0 2006.229.13:27:20.20#ibcon#read 4, iclass 30, count 0 2006.229.13:27:20.20#ibcon#about to read 5, iclass 30, count 0 2006.229.13:27:20.20#ibcon#read 5, iclass 30, count 0 2006.229.13:27:20.20#ibcon#about to read 6, iclass 30, count 0 2006.229.13:27:20.20#ibcon#read 6, iclass 30, count 0 2006.229.13:27:20.20#ibcon#end of sib2, iclass 30, count 0 2006.229.13:27:20.20#ibcon#*after write, iclass 30, count 0 2006.229.13:27:20.20#ibcon#*before return 0, iclass 30, count 0 2006.229.13:27:20.20#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:20.20#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:20.20#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:27:20.20#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:27:20.20$vck44/valo=7,864.99 2006.229.13:27:20.20#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:27:20.20#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:27:20.20#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:20.20#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:20.20#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:20.20#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:20.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:27:20.20#ibcon#first serial, iclass 32, count 0 2006.229.13:27:20.20#ibcon#enter sib2, iclass 32, count 0 2006.229.13:27:20.20#ibcon#flushed, iclass 32, count 0 2006.229.13:27:20.20#ibcon#about to write, iclass 32, count 0 2006.229.13:27:20.20#ibcon#wrote, iclass 32, count 0 2006.229.13:27:20.20#ibcon#about to read 3, iclass 32, count 0 2006.229.13:27:20.22#ibcon#read 3, iclass 32, count 0 2006.229.13:27:20.22#ibcon#about to read 4, iclass 32, count 0 2006.229.13:27:20.22#ibcon#read 4, iclass 32, count 0 2006.229.13:27:20.22#ibcon#about to read 5, iclass 32, count 0 2006.229.13:27:20.22#ibcon#read 5, iclass 32, count 0 2006.229.13:27:20.22#ibcon#about to read 6, iclass 32, count 0 2006.229.13:27:20.22#ibcon#read 6, iclass 32, count 0 2006.229.13:27:20.22#ibcon#end of sib2, iclass 32, count 0 2006.229.13:27:20.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:27:20.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:27:20.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:27:20.22#ibcon#*before write, iclass 32, count 0 2006.229.13:27:20.22#ibcon#enter sib2, iclass 32, count 0 2006.229.13:27:20.22#ibcon#flushed, iclass 32, count 0 2006.229.13:27:20.22#ibcon#about to write, iclass 32, count 0 2006.229.13:27:20.22#ibcon#wrote, iclass 32, count 0 2006.229.13:27:20.22#ibcon#about to read 3, iclass 32, count 0 2006.229.13:27:20.26#ibcon#read 3, iclass 32, count 0 2006.229.13:27:20.26#ibcon#about to read 4, iclass 32, count 0 2006.229.13:27:20.26#ibcon#read 4, iclass 32, count 0 2006.229.13:27:20.26#ibcon#about to read 5, iclass 32, count 0 2006.229.13:27:20.26#ibcon#read 5, iclass 32, count 0 2006.229.13:27:20.26#ibcon#about to read 6, iclass 32, count 0 2006.229.13:27:20.26#ibcon#read 6, iclass 32, count 0 2006.229.13:27:20.26#ibcon#end of sib2, iclass 32, count 0 2006.229.13:27:20.26#ibcon#*after write, iclass 32, count 0 2006.229.13:27:20.26#ibcon#*before return 0, iclass 32, count 0 2006.229.13:27:20.26#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:20.26#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:20.26#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:27:20.26#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:27:20.26$vck44/va=7,5 2006.229.13:27:20.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.13:27:20.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.13:27:20.26#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:20.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:27:20.27#abcon#<5=/04 1.5 2.2 27.571001002.0\r\n> 2006.229.13:27:20.29#abcon#{5=INTERFACE CLEAR} 2006.229.13:27:20.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:27:20.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:27:20.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.13:27:20.32#ibcon#first serial, iclass 35, count 2 2006.229.13:27:20.32#ibcon#enter sib2, iclass 35, count 2 2006.229.13:27:20.32#ibcon#flushed, iclass 35, count 2 2006.229.13:27:20.32#ibcon#about to write, iclass 35, count 2 2006.229.13:27:20.32#ibcon#wrote, iclass 35, count 2 2006.229.13:27:20.32#ibcon#about to read 3, iclass 35, count 2 2006.229.13:27:20.34#ibcon#read 3, iclass 35, count 2 2006.229.13:27:20.34#ibcon#about to read 4, iclass 35, count 2 2006.229.13:27:20.34#ibcon#read 4, iclass 35, count 2 2006.229.13:27:20.34#ibcon#about to read 5, iclass 35, count 2 2006.229.13:27:20.34#ibcon#read 5, iclass 35, count 2 2006.229.13:27:20.34#ibcon#about to read 6, iclass 35, count 2 2006.229.13:27:20.34#ibcon#read 6, iclass 35, count 2 2006.229.13:27:20.34#ibcon#end of sib2, iclass 35, count 2 2006.229.13:27:20.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.13:27:20.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.13:27:20.34#ibcon#[25=AT07-05\r\n] 2006.229.13:27:20.34#ibcon#*before write, iclass 35, count 2 2006.229.13:27:20.34#ibcon#enter sib2, iclass 35, count 2 2006.229.13:27:20.34#ibcon#flushed, iclass 35, count 2 2006.229.13:27:20.34#ibcon#about to write, iclass 35, count 2 2006.229.13:27:20.34#ibcon#wrote, iclass 35, count 2 2006.229.13:27:20.34#ibcon#about to read 3, iclass 35, count 2 2006.229.13:27:20.35#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:27:20.37#ibcon#read 3, iclass 35, count 2 2006.229.13:27:20.37#ibcon#about to read 4, iclass 35, count 2 2006.229.13:27:20.37#ibcon#read 4, iclass 35, count 2 2006.229.13:27:20.37#ibcon#about to read 5, iclass 35, count 2 2006.229.13:27:20.37#ibcon#read 5, iclass 35, count 2 2006.229.13:27:20.37#ibcon#about to read 6, iclass 35, count 2 2006.229.13:27:20.37#ibcon#read 6, iclass 35, count 2 2006.229.13:27:20.37#ibcon#end of sib2, iclass 35, count 2 2006.229.13:27:20.37#ibcon#*after write, iclass 35, count 2 2006.229.13:27:20.37#ibcon#*before return 0, iclass 35, count 2 2006.229.13:27:20.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:27:20.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:27:20.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.13:27:20.37#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:20.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:27:20.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:27:20.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:27:20.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:27:20.49#ibcon#first serial, iclass 35, count 0 2006.229.13:27:20.49#ibcon#enter sib2, iclass 35, count 0 2006.229.13:27:20.49#ibcon#flushed, iclass 35, count 0 2006.229.13:27:20.49#ibcon#about to write, iclass 35, count 0 2006.229.13:27:20.49#ibcon#wrote, iclass 35, count 0 2006.229.13:27:20.49#ibcon#about to read 3, iclass 35, count 0 2006.229.13:27:20.51#ibcon#read 3, iclass 35, count 0 2006.229.13:27:20.51#ibcon#about to read 4, iclass 35, count 0 2006.229.13:27:20.51#ibcon#read 4, iclass 35, count 0 2006.229.13:27:20.51#ibcon#about to read 5, iclass 35, count 0 2006.229.13:27:20.51#ibcon#read 5, iclass 35, count 0 2006.229.13:27:20.51#ibcon#about to read 6, iclass 35, count 0 2006.229.13:27:20.51#ibcon#read 6, iclass 35, count 0 2006.229.13:27:20.51#ibcon#end of sib2, iclass 35, count 0 2006.229.13:27:20.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:27:20.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:27:20.51#ibcon#[25=USB\r\n] 2006.229.13:27:20.51#ibcon#*before write, iclass 35, count 0 2006.229.13:27:20.51#ibcon#enter sib2, iclass 35, count 0 2006.229.13:27:20.51#ibcon#flushed, iclass 35, count 0 2006.229.13:27:20.51#ibcon#about to write, iclass 35, count 0 2006.229.13:27:20.51#ibcon#wrote, iclass 35, count 0 2006.229.13:27:20.51#ibcon#about to read 3, iclass 35, count 0 2006.229.13:27:20.54#ibcon#read 3, iclass 35, count 0 2006.229.13:27:20.54#ibcon#about to read 4, iclass 35, count 0 2006.229.13:27:20.54#ibcon#read 4, iclass 35, count 0 2006.229.13:27:20.54#ibcon#about to read 5, iclass 35, count 0 2006.229.13:27:20.54#ibcon#read 5, iclass 35, count 0 2006.229.13:27:20.54#ibcon#about to read 6, iclass 35, count 0 2006.229.13:27:20.54#ibcon#read 6, iclass 35, count 0 2006.229.13:27:20.54#ibcon#end of sib2, iclass 35, count 0 2006.229.13:27:20.54#ibcon#*after write, iclass 35, count 0 2006.229.13:27:20.54#ibcon#*before return 0, iclass 35, count 0 2006.229.13:27:20.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:27:20.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:27:20.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:27:20.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:27:20.54$vck44/valo=8,884.99 2006.229.13:27:20.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:27:20.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:27:20.54#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:20.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:20.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:20.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:20.54#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:27:20.54#ibcon#first serial, iclass 40, count 0 2006.229.13:27:20.54#ibcon#enter sib2, iclass 40, count 0 2006.229.13:27:20.54#ibcon#flushed, iclass 40, count 0 2006.229.13:27:20.54#ibcon#about to write, iclass 40, count 0 2006.229.13:27:20.54#ibcon#wrote, iclass 40, count 0 2006.229.13:27:20.54#ibcon#about to read 3, iclass 40, count 0 2006.229.13:27:20.56#ibcon#read 3, iclass 40, count 0 2006.229.13:27:20.56#ibcon#about to read 4, iclass 40, count 0 2006.229.13:27:20.56#ibcon#read 4, iclass 40, count 0 2006.229.13:27:20.56#ibcon#about to read 5, iclass 40, count 0 2006.229.13:27:20.56#ibcon#read 5, iclass 40, count 0 2006.229.13:27:20.56#ibcon#about to read 6, iclass 40, count 0 2006.229.13:27:20.56#ibcon#read 6, iclass 40, count 0 2006.229.13:27:20.56#ibcon#end of sib2, iclass 40, count 0 2006.229.13:27:20.56#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:27:20.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:27:20.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:27:20.56#ibcon#*before write, iclass 40, count 0 2006.229.13:27:20.56#ibcon#enter sib2, iclass 40, count 0 2006.229.13:27:20.56#ibcon#flushed, iclass 40, count 0 2006.229.13:27:20.56#ibcon#about to write, iclass 40, count 0 2006.229.13:27:20.56#ibcon#wrote, iclass 40, count 0 2006.229.13:27:20.56#ibcon#about to read 3, iclass 40, count 0 2006.229.13:27:20.60#ibcon#read 3, iclass 40, count 0 2006.229.13:27:20.60#ibcon#about to read 4, iclass 40, count 0 2006.229.13:27:20.60#ibcon#read 4, iclass 40, count 0 2006.229.13:27:20.60#ibcon#about to read 5, iclass 40, count 0 2006.229.13:27:20.60#ibcon#read 5, iclass 40, count 0 2006.229.13:27:20.60#ibcon#about to read 6, iclass 40, count 0 2006.229.13:27:20.60#ibcon#read 6, iclass 40, count 0 2006.229.13:27:20.60#ibcon#end of sib2, iclass 40, count 0 2006.229.13:27:20.60#ibcon#*after write, iclass 40, count 0 2006.229.13:27:20.60#ibcon#*before return 0, iclass 40, count 0 2006.229.13:27:20.60#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:20.60#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:20.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:27:20.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:27:20.60$vck44/va=8,6 2006.229.13:27:20.60#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.13:27:20.60#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.13:27:20.60#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:20.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:27:20.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:27:20.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:27:20.66#ibcon#enter wrdev, iclass 4, count 2 2006.229.13:27:20.66#ibcon#first serial, iclass 4, count 2 2006.229.13:27:20.66#ibcon#enter sib2, iclass 4, count 2 2006.229.13:27:20.66#ibcon#flushed, iclass 4, count 2 2006.229.13:27:20.66#ibcon#about to write, iclass 4, count 2 2006.229.13:27:20.66#ibcon#wrote, iclass 4, count 2 2006.229.13:27:20.66#ibcon#about to read 3, iclass 4, count 2 2006.229.13:27:20.68#ibcon#read 3, iclass 4, count 2 2006.229.13:27:20.68#ibcon#about to read 4, iclass 4, count 2 2006.229.13:27:20.68#ibcon#read 4, iclass 4, count 2 2006.229.13:27:20.68#ibcon#about to read 5, iclass 4, count 2 2006.229.13:27:20.68#ibcon#read 5, iclass 4, count 2 2006.229.13:27:20.68#ibcon#about to read 6, iclass 4, count 2 2006.229.13:27:20.68#ibcon#read 6, iclass 4, count 2 2006.229.13:27:20.68#ibcon#end of sib2, iclass 4, count 2 2006.229.13:27:20.68#ibcon#*mode == 0, iclass 4, count 2 2006.229.13:27:20.68#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.13:27:20.68#ibcon#[25=AT08-06\r\n] 2006.229.13:27:20.68#ibcon#*before write, iclass 4, count 2 2006.229.13:27:20.68#ibcon#enter sib2, iclass 4, count 2 2006.229.13:27:20.68#ibcon#flushed, iclass 4, count 2 2006.229.13:27:20.68#ibcon#about to write, iclass 4, count 2 2006.229.13:27:20.68#ibcon#wrote, iclass 4, count 2 2006.229.13:27:20.68#ibcon#about to read 3, iclass 4, count 2 2006.229.13:27:20.71#ibcon#read 3, iclass 4, count 2 2006.229.13:27:20.71#ibcon#about to read 4, iclass 4, count 2 2006.229.13:27:20.71#ibcon#read 4, iclass 4, count 2 2006.229.13:27:20.71#ibcon#about to read 5, iclass 4, count 2 2006.229.13:27:20.71#ibcon#read 5, iclass 4, count 2 2006.229.13:27:20.71#ibcon#about to read 6, iclass 4, count 2 2006.229.13:27:20.71#ibcon#read 6, iclass 4, count 2 2006.229.13:27:20.71#ibcon#end of sib2, iclass 4, count 2 2006.229.13:27:20.71#ibcon#*after write, iclass 4, count 2 2006.229.13:27:20.71#ibcon#*before return 0, iclass 4, count 2 2006.229.13:27:20.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:27:20.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:27:20.71#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.13:27:20.71#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:20.71#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:27:20.83#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:27:20.83#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:27:20.83#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:27:20.83#ibcon#first serial, iclass 4, count 0 2006.229.13:27:20.83#ibcon#enter sib2, iclass 4, count 0 2006.229.13:27:20.83#ibcon#flushed, iclass 4, count 0 2006.229.13:27:20.83#ibcon#about to write, iclass 4, count 0 2006.229.13:27:20.83#ibcon#wrote, iclass 4, count 0 2006.229.13:27:20.83#ibcon#about to read 3, iclass 4, count 0 2006.229.13:27:20.85#ibcon#read 3, iclass 4, count 0 2006.229.13:27:20.85#ibcon#about to read 4, iclass 4, count 0 2006.229.13:27:20.85#ibcon#read 4, iclass 4, count 0 2006.229.13:27:20.85#ibcon#about to read 5, iclass 4, count 0 2006.229.13:27:20.85#ibcon#read 5, iclass 4, count 0 2006.229.13:27:20.85#ibcon#about to read 6, iclass 4, count 0 2006.229.13:27:20.85#ibcon#read 6, iclass 4, count 0 2006.229.13:27:20.85#ibcon#end of sib2, iclass 4, count 0 2006.229.13:27:20.85#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:27:20.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:27:20.85#ibcon#[25=USB\r\n] 2006.229.13:27:20.85#ibcon#*before write, iclass 4, count 0 2006.229.13:27:20.85#ibcon#enter sib2, iclass 4, count 0 2006.229.13:27:20.85#ibcon#flushed, iclass 4, count 0 2006.229.13:27:20.85#ibcon#about to write, iclass 4, count 0 2006.229.13:27:20.85#ibcon#wrote, iclass 4, count 0 2006.229.13:27:20.85#ibcon#about to read 3, iclass 4, count 0 2006.229.13:27:20.88#ibcon#read 3, iclass 4, count 0 2006.229.13:27:20.88#ibcon#about to read 4, iclass 4, count 0 2006.229.13:27:20.88#ibcon#read 4, iclass 4, count 0 2006.229.13:27:20.88#ibcon#about to read 5, iclass 4, count 0 2006.229.13:27:20.88#ibcon#read 5, iclass 4, count 0 2006.229.13:27:20.88#ibcon#about to read 6, iclass 4, count 0 2006.229.13:27:20.88#ibcon#read 6, iclass 4, count 0 2006.229.13:27:20.88#ibcon#end of sib2, iclass 4, count 0 2006.229.13:27:20.88#ibcon#*after write, iclass 4, count 0 2006.229.13:27:20.88#ibcon#*before return 0, iclass 4, count 0 2006.229.13:27:20.88#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:27:20.88#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:27:20.88#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:27:20.88#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:27:20.88$vck44/vblo=1,629.99 2006.229.13:27:20.88#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:27:20.88#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:27:20.88#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:20.88#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:20.88#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:20.88#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:20.88#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:27:20.88#ibcon#first serial, iclass 6, count 0 2006.229.13:27:20.88#ibcon#enter sib2, iclass 6, count 0 2006.229.13:27:20.88#ibcon#flushed, iclass 6, count 0 2006.229.13:27:20.88#ibcon#about to write, iclass 6, count 0 2006.229.13:27:20.88#ibcon#wrote, iclass 6, count 0 2006.229.13:27:20.88#ibcon#about to read 3, iclass 6, count 0 2006.229.13:27:20.90#ibcon#read 3, iclass 6, count 0 2006.229.13:27:20.90#ibcon#about to read 4, iclass 6, count 0 2006.229.13:27:20.90#ibcon#read 4, iclass 6, count 0 2006.229.13:27:20.90#ibcon#about to read 5, iclass 6, count 0 2006.229.13:27:20.90#ibcon#read 5, iclass 6, count 0 2006.229.13:27:20.90#ibcon#about to read 6, iclass 6, count 0 2006.229.13:27:20.90#ibcon#read 6, iclass 6, count 0 2006.229.13:27:20.90#ibcon#end of sib2, iclass 6, count 0 2006.229.13:27:20.90#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:27:20.90#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:27:20.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:27:20.90#ibcon#*before write, iclass 6, count 0 2006.229.13:27:20.90#ibcon#enter sib2, iclass 6, count 0 2006.229.13:27:20.90#ibcon#flushed, iclass 6, count 0 2006.229.13:27:20.90#ibcon#about to write, iclass 6, count 0 2006.229.13:27:20.90#ibcon#wrote, iclass 6, count 0 2006.229.13:27:20.90#ibcon#about to read 3, iclass 6, count 0 2006.229.13:27:20.94#ibcon#read 3, iclass 6, count 0 2006.229.13:27:20.94#ibcon#about to read 4, iclass 6, count 0 2006.229.13:27:20.94#ibcon#read 4, iclass 6, count 0 2006.229.13:27:20.94#ibcon#about to read 5, iclass 6, count 0 2006.229.13:27:20.94#ibcon#read 5, iclass 6, count 0 2006.229.13:27:20.94#ibcon#about to read 6, iclass 6, count 0 2006.229.13:27:20.94#ibcon#read 6, iclass 6, count 0 2006.229.13:27:20.94#ibcon#end of sib2, iclass 6, count 0 2006.229.13:27:20.94#ibcon#*after write, iclass 6, count 0 2006.229.13:27:20.94#ibcon#*before return 0, iclass 6, count 0 2006.229.13:27:20.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:20.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:27:20.94#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:27:20.94#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:27:20.94$vck44/vb=1,4 2006.229.13:27:20.94#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.13:27:20.94#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.13:27:20.94#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:20.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:20.94#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:20.94#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:20.94#ibcon#enter wrdev, iclass 10, count 2 2006.229.13:27:20.94#ibcon#first serial, iclass 10, count 2 2006.229.13:27:20.94#ibcon#enter sib2, iclass 10, count 2 2006.229.13:27:20.94#ibcon#flushed, iclass 10, count 2 2006.229.13:27:20.94#ibcon#about to write, iclass 10, count 2 2006.229.13:27:20.94#ibcon#wrote, iclass 10, count 2 2006.229.13:27:20.94#ibcon#about to read 3, iclass 10, count 2 2006.229.13:27:20.96#ibcon#read 3, iclass 10, count 2 2006.229.13:27:20.96#ibcon#about to read 4, iclass 10, count 2 2006.229.13:27:20.96#ibcon#read 4, iclass 10, count 2 2006.229.13:27:20.96#ibcon#about to read 5, iclass 10, count 2 2006.229.13:27:20.96#ibcon#read 5, iclass 10, count 2 2006.229.13:27:20.96#ibcon#about to read 6, iclass 10, count 2 2006.229.13:27:20.96#ibcon#read 6, iclass 10, count 2 2006.229.13:27:20.96#ibcon#end of sib2, iclass 10, count 2 2006.229.13:27:20.96#ibcon#*mode == 0, iclass 10, count 2 2006.229.13:27:20.96#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.13:27:20.96#ibcon#[27=AT01-04\r\n] 2006.229.13:27:20.96#ibcon#*before write, iclass 10, count 2 2006.229.13:27:20.96#ibcon#enter sib2, iclass 10, count 2 2006.229.13:27:20.96#ibcon#flushed, iclass 10, count 2 2006.229.13:27:20.96#ibcon#about to write, iclass 10, count 2 2006.229.13:27:20.96#ibcon#wrote, iclass 10, count 2 2006.229.13:27:20.96#ibcon#about to read 3, iclass 10, count 2 2006.229.13:27:20.99#ibcon#read 3, iclass 10, count 2 2006.229.13:27:20.99#ibcon#about to read 4, iclass 10, count 2 2006.229.13:27:20.99#ibcon#read 4, iclass 10, count 2 2006.229.13:27:20.99#ibcon#about to read 5, iclass 10, count 2 2006.229.13:27:20.99#ibcon#read 5, iclass 10, count 2 2006.229.13:27:20.99#ibcon#about to read 6, iclass 10, count 2 2006.229.13:27:20.99#ibcon#read 6, iclass 10, count 2 2006.229.13:27:20.99#ibcon#end of sib2, iclass 10, count 2 2006.229.13:27:20.99#ibcon#*after write, iclass 10, count 2 2006.229.13:27:20.99#ibcon#*before return 0, iclass 10, count 2 2006.229.13:27:20.99#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:20.99#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:27:20.99#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.13:27:20.99#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:20.99#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:21.11#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:21.11#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:21.11#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:27:21.11#ibcon#first serial, iclass 10, count 0 2006.229.13:27:21.11#ibcon#enter sib2, iclass 10, count 0 2006.229.13:27:21.11#ibcon#flushed, iclass 10, count 0 2006.229.13:27:21.11#ibcon#about to write, iclass 10, count 0 2006.229.13:27:21.11#ibcon#wrote, iclass 10, count 0 2006.229.13:27:21.11#ibcon#about to read 3, iclass 10, count 0 2006.229.13:27:21.13#ibcon#read 3, iclass 10, count 0 2006.229.13:27:21.13#ibcon#about to read 4, iclass 10, count 0 2006.229.13:27:21.13#ibcon#read 4, iclass 10, count 0 2006.229.13:27:21.13#ibcon#about to read 5, iclass 10, count 0 2006.229.13:27:21.13#ibcon#read 5, iclass 10, count 0 2006.229.13:27:21.13#ibcon#about to read 6, iclass 10, count 0 2006.229.13:27:21.13#ibcon#read 6, iclass 10, count 0 2006.229.13:27:21.13#ibcon#end of sib2, iclass 10, count 0 2006.229.13:27:21.13#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:27:21.13#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:27:21.13#ibcon#[27=USB\r\n] 2006.229.13:27:21.13#ibcon#*before write, iclass 10, count 0 2006.229.13:27:21.13#ibcon#enter sib2, iclass 10, count 0 2006.229.13:27:21.13#ibcon#flushed, iclass 10, count 0 2006.229.13:27:21.13#ibcon#about to write, iclass 10, count 0 2006.229.13:27:21.13#ibcon#wrote, iclass 10, count 0 2006.229.13:27:21.13#ibcon#about to read 3, iclass 10, count 0 2006.229.13:27:21.16#ibcon#read 3, iclass 10, count 0 2006.229.13:27:21.16#ibcon#about to read 4, iclass 10, count 0 2006.229.13:27:21.16#ibcon#read 4, iclass 10, count 0 2006.229.13:27:21.16#ibcon#about to read 5, iclass 10, count 0 2006.229.13:27:21.16#ibcon#read 5, iclass 10, count 0 2006.229.13:27:21.16#ibcon#about to read 6, iclass 10, count 0 2006.229.13:27:21.16#ibcon#read 6, iclass 10, count 0 2006.229.13:27:21.16#ibcon#end of sib2, iclass 10, count 0 2006.229.13:27:21.16#ibcon#*after write, iclass 10, count 0 2006.229.13:27:21.16#ibcon#*before return 0, iclass 10, count 0 2006.229.13:27:21.16#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:21.16#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:27:21.16#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:27:21.16#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:27:21.16$vck44/vblo=2,634.99 2006.229.13:27:21.16#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:27:21.16#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:27:21.16#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:21.16#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:21.16#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:21.16#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:21.16#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:27:21.16#ibcon#first serial, iclass 12, count 0 2006.229.13:27:21.16#ibcon#enter sib2, iclass 12, count 0 2006.229.13:27:21.16#ibcon#flushed, iclass 12, count 0 2006.229.13:27:21.16#ibcon#about to write, iclass 12, count 0 2006.229.13:27:21.16#ibcon#wrote, iclass 12, count 0 2006.229.13:27:21.16#ibcon#about to read 3, iclass 12, count 0 2006.229.13:27:21.18#ibcon#read 3, iclass 12, count 0 2006.229.13:27:21.18#ibcon#about to read 4, iclass 12, count 0 2006.229.13:27:21.18#ibcon#read 4, iclass 12, count 0 2006.229.13:27:21.18#ibcon#about to read 5, iclass 12, count 0 2006.229.13:27:21.18#ibcon#read 5, iclass 12, count 0 2006.229.13:27:21.18#ibcon#about to read 6, iclass 12, count 0 2006.229.13:27:21.18#ibcon#read 6, iclass 12, count 0 2006.229.13:27:21.18#ibcon#end of sib2, iclass 12, count 0 2006.229.13:27:21.18#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:27:21.18#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:27:21.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:27:21.18#ibcon#*before write, iclass 12, count 0 2006.229.13:27:21.18#ibcon#enter sib2, iclass 12, count 0 2006.229.13:27:21.18#ibcon#flushed, iclass 12, count 0 2006.229.13:27:21.18#ibcon#about to write, iclass 12, count 0 2006.229.13:27:21.18#ibcon#wrote, iclass 12, count 0 2006.229.13:27:21.18#ibcon#about to read 3, iclass 12, count 0 2006.229.13:27:21.22#ibcon#read 3, iclass 12, count 0 2006.229.13:27:21.22#ibcon#about to read 4, iclass 12, count 0 2006.229.13:27:21.22#ibcon#read 4, iclass 12, count 0 2006.229.13:27:21.22#ibcon#about to read 5, iclass 12, count 0 2006.229.13:27:21.22#ibcon#read 5, iclass 12, count 0 2006.229.13:27:21.22#ibcon#about to read 6, iclass 12, count 0 2006.229.13:27:21.22#ibcon#read 6, iclass 12, count 0 2006.229.13:27:21.22#ibcon#end of sib2, iclass 12, count 0 2006.229.13:27:21.22#ibcon#*after write, iclass 12, count 0 2006.229.13:27:21.22#ibcon#*before return 0, iclass 12, count 0 2006.229.13:27:21.22#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:21.22#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:27:21.22#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:27:21.22#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:27:21.22$vck44/vb=2,4 2006.229.13:27:21.22#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:27:21.22#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:27:21.22#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:21.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:21.28#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:21.28#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:21.28#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:27:21.28#ibcon#first serial, iclass 14, count 2 2006.229.13:27:21.28#ibcon#enter sib2, iclass 14, count 2 2006.229.13:27:21.28#ibcon#flushed, iclass 14, count 2 2006.229.13:27:21.28#ibcon#about to write, iclass 14, count 2 2006.229.13:27:21.28#ibcon#wrote, iclass 14, count 2 2006.229.13:27:21.28#ibcon#about to read 3, iclass 14, count 2 2006.229.13:27:21.30#ibcon#read 3, iclass 14, count 2 2006.229.13:27:21.30#ibcon#about to read 4, iclass 14, count 2 2006.229.13:27:21.30#ibcon#read 4, iclass 14, count 2 2006.229.13:27:21.30#ibcon#about to read 5, iclass 14, count 2 2006.229.13:27:21.30#ibcon#read 5, iclass 14, count 2 2006.229.13:27:21.30#ibcon#about to read 6, iclass 14, count 2 2006.229.13:27:21.30#ibcon#read 6, iclass 14, count 2 2006.229.13:27:21.30#ibcon#end of sib2, iclass 14, count 2 2006.229.13:27:21.30#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:27:21.30#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:27:21.30#ibcon#[27=AT02-04\r\n] 2006.229.13:27:21.30#ibcon#*before write, iclass 14, count 2 2006.229.13:27:21.30#ibcon#enter sib2, iclass 14, count 2 2006.229.13:27:21.30#ibcon#flushed, iclass 14, count 2 2006.229.13:27:21.30#ibcon#about to write, iclass 14, count 2 2006.229.13:27:21.30#ibcon#wrote, iclass 14, count 2 2006.229.13:27:21.30#ibcon#about to read 3, iclass 14, count 2 2006.229.13:27:21.33#ibcon#read 3, iclass 14, count 2 2006.229.13:27:21.33#ibcon#about to read 4, iclass 14, count 2 2006.229.13:27:21.33#ibcon#read 4, iclass 14, count 2 2006.229.13:27:21.33#ibcon#about to read 5, iclass 14, count 2 2006.229.13:27:21.33#ibcon#read 5, iclass 14, count 2 2006.229.13:27:21.33#ibcon#about to read 6, iclass 14, count 2 2006.229.13:27:21.33#ibcon#read 6, iclass 14, count 2 2006.229.13:27:21.33#ibcon#end of sib2, iclass 14, count 2 2006.229.13:27:21.33#ibcon#*after write, iclass 14, count 2 2006.229.13:27:21.33#ibcon#*before return 0, iclass 14, count 2 2006.229.13:27:21.33#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:21.33#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:27:21.33#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:27:21.33#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:21.33#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:21.45#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:21.45#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:21.45#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:27:21.45#ibcon#first serial, iclass 14, count 0 2006.229.13:27:21.45#ibcon#enter sib2, iclass 14, count 0 2006.229.13:27:21.45#ibcon#flushed, iclass 14, count 0 2006.229.13:27:21.45#ibcon#about to write, iclass 14, count 0 2006.229.13:27:21.45#ibcon#wrote, iclass 14, count 0 2006.229.13:27:21.45#ibcon#about to read 3, iclass 14, count 0 2006.229.13:27:21.47#ibcon#read 3, iclass 14, count 0 2006.229.13:27:21.47#ibcon#about to read 4, iclass 14, count 0 2006.229.13:27:21.47#ibcon#read 4, iclass 14, count 0 2006.229.13:27:21.47#ibcon#about to read 5, iclass 14, count 0 2006.229.13:27:21.47#ibcon#read 5, iclass 14, count 0 2006.229.13:27:21.47#ibcon#about to read 6, iclass 14, count 0 2006.229.13:27:21.47#ibcon#read 6, iclass 14, count 0 2006.229.13:27:21.47#ibcon#end of sib2, iclass 14, count 0 2006.229.13:27:21.47#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:27:21.47#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:27:21.47#ibcon#[27=USB\r\n] 2006.229.13:27:21.47#ibcon#*before write, iclass 14, count 0 2006.229.13:27:21.47#ibcon#enter sib2, iclass 14, count 0 2006.229.13:27:21.47#ibcon#flushed, iclass 14, count 0 2006.229.13:27:21.47#ibcon#about to write, iclass 14, count 0 2006.229.13:27:21.47#ibcon#wrote, iclass 14, count 0 2006.229.13:27:21.47#ibcon#about to read 3, iclass 14, count 0 2006.229.13:27:21.50#ibcon#read 3, iclass 14, count 0 2006.229.13:27:21.50#ibcon#about to read 4, iclass 14, count 0 2006.229.13:27:21.50#ibcon#read 4, iclass 14, count 0 2006.229.13:27:21.50#ibcon#about to read 5, iclass 14, count 0 2006.229.13:27:21.50#ibcon#read 5, iclass 14, count 0 2006.229.13:27:21.50#ibcon#about to read 6, iclass 14, count 0 2006.229.13:27:21.50#ibcon#read 6, iclass 14, count 0 2006.229.13:27:21.50#ibcon#end of sib2, iclass 14, count 0 2006.229.13:27:21.50#ibcon#*after write, iclass 14, count 0 2006.229.13:27:21.50#ibcon#*before return 0, iclass 14, count 0 2006.229.13:27:21.50#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:21.50#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:27:21.50#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:27:21.50#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:27:21.50$vck44/vblo=3,649.99 2006.229.13:27:21.50#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:27:21.50#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:27:21.50#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:21.50#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:21.50#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:21.50#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:21.50#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:27:21.50#ibcon#first serial, iclass 16, count 0 2006.229.13:27:21.50#ibcon#enter sib2, iclass 16, count 0 2006.229.13:27:21.50#ibcon#flushed, iclass 16, count 0 2006.229.13:27:21.50#ibcon#about to write, iclass 16, count 0 2006.229.13:27:21.50#ibcon#wrote, iclass 16, count 0 2006.229.13:27:21.50#ibcon#about to read 3, iclass 16, count 0 2006.229.13:27:21.52#ibcon#read 3, iclass 16, count 0 2006.229.13:27:21.52#ibcon#about to read 4, iclass 16, count 0 2006.229.13:27:21.52#ibcon#read 4, iclass 16, count 0 2006.229.13:27:21.52#ibcon#about to read 5, iclass 16, count 0 2006.229.13:27:21.52#ibcon#read 5, iclass 16, count 0 2006.229.13:27:21.52#ibcon#about to read 6, iclass 16, count 0 2006.229.13:27:21.52#ibcon#read 6, iclass 16, count 0 2006.229.13:27:21.52#ibcon#end of sib2, iclass 16, count 0 2006.229.13:27:21.52#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:27:21.52#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:27:21.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:27:21.52#ibcon#*before write, iclass 16, count 0 2006.229.13:27:21.52#ibcon#enter sib2, iclass 16, count 0 2006.229.13:27:21.52#ibcon#flushed, iclass 16, count 0 2006.229.13:27:21.52#ibcon#about to write, iclass 16, count 0 2006.229.13:27:21.52#ibcon#wrote, iclass 16, count 0 2006.229.13:27:21.52#ibcon#about to read 3, iclass 16, count 0 2006.229.13:27:21.56#ibcon#read 3, iclass 16, count 0 2006.229.13:27:21.56#ibcon#about to read 4, iclass 16, count 0 2006.229.13:27:21.56#ibcon#read 4, iclass 16, count 0 2006.229.13:27:21.56#ibcon#about to read 5, iclass 16, count 0 2006.229.13:27:21.56#ibcon#read 5, iclass 16, count 0 2006.229.13:27:21.56#ibcon#about to read 6, iclass 16, count 0 2006.229.13:27:21.56#ibcon#read 6, iclass 16, count 0 2006.229.13:27:21.56#ibcon#end of sib2, iclass 16, count 0 2006.229.13:27:21.56#ibcon#*after write, iclass 16, count 0 2006.229.13:27:21.56#ibcon#*before return 0, iclass 16, count 0 2006.229.13:27:21.56#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:21.56#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:27:21.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:27:21.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:27:21.56$vck44/vb=3,4 2006.229.13:27:21.56#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:27:21.56#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:27:21.56#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:21.56#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:21.62#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:21.62#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:21.62#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:27:21.62#ibcon#first serial, iclass 18, count 2 2006.229.13:27:21.62#ibcon#enter sib2, iclass 18, count 2 2006.229.13:27:21.62#ibcon#flushed, iclass 18, count 2 2006.229.13:27:21.62#ibcon#about to write, iclass 18, count 2 2006.229.13:27:21.62#ibcon#wrote, iclass 18, count 2 2006.229.13:27:21.62#ibcon#about to read 3, iclass 18, count 2 2006.229.13:27:21.64#ibcon#read 3, iclass 18, count 2 2006.229.13:27:21.64#ibcon#about to read 4, iclass 18, count 2 2006.229.13:27:21.64#ibcon#read 4, iclass 18, count 2 2006.229.13:27:21.64#ibcon#about to read 5, iclass 18, count 2 2006.229.13:27:21.64#ibcon#read 5, iclass 18, count 2 2006.229.13:27:21.64#ibcon#about to read 6, iclass 18, count 2 2006.229.13:27:21.64#ibcon#read 6, iclass 18, count 2 2006.229.13:27:21.64#ibcon#end of sib2, iclass 18, count 2 2006.229.13:27:21.64#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:27:21.64#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:27:21.64#ibcon#[27=AT03-04\r\n] 2006.229.13:27:21.64#ibcon#*before write, iclass 18, count 2 2006.229.13:27:21.64#ibcon#enter sib2, iclass 18, count 2 2006.229.13:27:21.64#ibcon#flushed, iclass 18, count 2 2006.229.13:27:21.64#ibcon#about to write, iclass 18, count 2 2006.229.13:27:21.64#ibcon#wrote, iclass 18, count 2 2006.229.13:27:21.64#ibcon#about to read 3, iclass 18, count 2 2006.229.13:27:21.67#ibcon#read 3, iclass 18, count 2 2006.229.13:27:21.67#ibcon#about to read 4, iclass 18, count 2 2006.229.13:27:21.67#ibcon#read 4, iclass 18, count 2 2006.229.13:27:21.67#ibcon#about to read 5, iclass 18, count 2 2006.229.13:27:21.67#ibcon#read 5, iclass 18, count 2 2006.229.13:27:21.67#ibcon#about to read 6, iclass 18, count 2 2006.229.13:27:21.67#ibcon#read 6, iclass 18, count 2 2006.229.13:27:21.67#ibcon#end of sib2, iclass 18, count 2 2006.229.13:27:21.67#ibcon#*after write, iclass 18, count 2 2006.229.13:27:21.67#ibcon#*before return 0, iclass 18, count 2 2006.229.13:27:21.67#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:21.67#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:27:21.67#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:27:21.67#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:21.67#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:21.79#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:21.79#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:21.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:27:21.79#ibcon#first serial, iclass 18, count 0 2006.229.13:27:21.79#ibcon#enter sib2, iclass 18, count 0 2006.229.13:27:21.79#ibcon#flushed, iclass 18, count 0 2006.229.13:27:21.79#ibcon#about to write, iclass 18, count 0 2006.229.13:27:21.79#ibcon#wrote, iclass 18, count 0 2006.229.13:27:21.79#ibcon#about to read 3, iclass 18, count 0 2006.229.13:27:21.81#ibcon#read 3, iclass 18, count 0 2006.229.13:27:21.81#ibcon#about to read 4, iclass 18, count 0 2006.229.13:27:21.81#ibcon#read 4, iclass 18, count 0 2006.229.13:27:21.81#ibcon#about to read 5, iclass 18, count 0 2006.229.13:27:21.81#ibcon#read 5, iclass 18, count 0 2006.229.13:27:21.81#ibcon#about to read 6, iclass 18, count 0 2006.229.13:27:21.81#ibcon#read 6, iclass 18, count 0 2006.229.13:27:21.81#ibcon#end of sib2, iclass 18, count 0 2006.229.13:27:21.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:27:21.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:27:21.81#ibcon#[27=USB\r\n] 2006.229.13:27:21.81#ibcon#*before write, iclass 18, count 0 2006.229.13:27:21.81#ibcon#enter sib2, iclass 18, count 0 2006.229.13:27:21.81#ibcon#flushed, iclass 18, count 0 2006.229.13:27:21.81#ibcon#about to write, iclass 18, count 0 2006.229.13:27:21.81#ibcon#wrote, iclass 18, count 0 2006.229.13:27:21.81#ibcon#about to read 3, iclass 18, count 0 2006.229.13:27:21.84#ibcon#read 3, iclass 18, count 0 2006.229.13:27:21.84#ibcon#about to read 4, iclass 18, count 0 2006.229.13:27:21.84#ibcon#read 4, iclass 18, count 0 2006.229.13:27:21.84#ibcon#about to read 5, iclass 18, count 0 2006.229.13:27:21.84#ibcon#read 5, iclass 18, count 0 2006.229.13:27:21.84#ibcon#about to read 6, iclass 18, count 0 2006.229.13:27:21.84#ibcon#read 6, iclass 18, count 0 2006.229.13:27:21.84#ibcon#end of sib2, iclass 18, count 0 2006.229.13:27:21.84#ibcon#*after write, iclass 18, count 0 2006.229.13:27:21.84#ibcon#*before return 0, iclass 18, count 0 2006.229.13:27:21.84#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:21.84#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:27:21.84#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:27:21.84#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:27:21.84$vck44/vblo=4,679.99 2006.229.13:27:21.84#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:27:21.84#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:27:21.84#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:21.84#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:21.84#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:21.84#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:21.84#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:27:21.84#ibcon#first serial, iclass 20, count 0 2006.229.13:27:21.84#ibcon#enter sib2, iclass 20, count 0 2006.229.13:27:21.84#ibcon#flushed, iclass 20, count 0 2006.229.13:27:21.84#ibcon#about to write, iclass 20, count 0 2006.229.13:27:21.84#ibcon#wrote, iclass 20, count 0 2006.229.13:27:21.84#ibcon#about to read 3, iclass 20, count 0 2006.229.13:27:21.86#ibcon#read 3, iclass 20, count 0 2006.229.13:27:21.86#ibcon#about to read 4, iclass 20, count 0 2006.229.13:27:21.86#ibcon#read 4, iclass 20, count 0 2006.229.13:27:21.86#ibcon#about to read 5, iclass 20, count 0 2006.229.13:27:21.86#ibcon#read 5, iclass 20, count 0 2006.229.13:27:21.86#ibcon#about to read 6, iclass 20, count 0 2006.229.13:27:21.86#ibcon#read 6, iclass 20, count 0 2006.229.13:27:21.86#ibcon#end of sib2, iclass 20, count 0 2006.229.13:27:21.86#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:27:21.86#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:27:21.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:27:21.86#ibcon#*before write, iclass 20, count 0 2006.229.13:27:21.86#ibcon#enter sib2, iclass 20, count 0 2006.229.13:27:21.86#ibcon#flushed, iclass 20, count 0 2006.229.13:27:21.86#ibcon#about to write, iclass 20, count 0 2006.229.13:27:21.86#ibcon#wrote, iclass 20, count 0 2006.229.13:27:21.86#ibcon#about to read 3, iclass 20, count 0 2006.229.13:27:21.90#ibcon#read 3, iclass 20, count 0 2006.229.13:27:21.90#ibcon#about to read 4, iclass 20, count 0 2006.229.13:27:21.90#ibcon#read 4, iclass 20, count 0 2006.229.13:27:21.90#ibcon#about to read 5, iclass 20, count 0 2006.229.13:27:21.90#ibcon#read 5, iclass 20, count 0 2006.229.13:27:21.90#ibcon#about to read 6, iclass 20, count 0 2006.229.13:27:21.90#ibcon#read 6, iclass 20, count 0 2006.229.13:27:21.90#ibcon#end of sib2, iclass 20, count 0 2006.229.13:27:21.90#ibcon#*after write, iclass 20, count 0 2006.229.13:27:21.90#ibcon#*before return 0, iclass 20, count 0 2006.229.13:27:21.90#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:21.90#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:27:21.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:27:21.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:27:21.90$vck44/vb=4,4 2006.229.13:27:21.90#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:27:21.90#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:27:21.90#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:21.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:21.96#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:21.96#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:21.96#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:27:21.96#ibcon#first serial, iclass 22, count 2 2006.229.13:27:21.96#ibcon#enter sib2, iclass 22, count 2 2006.229.13:27:21.96#ibcon#flushed, iclass 22, count 2 2006.229.13:27:21.96#ibcon#about to write, iclass 22, count 2 2006.229.13:27:21.96#ibcon#wrote, iclass 22, count 2 2006.229.13:27:21.96#ibcon#about to read 3, iclass 22, count 2 2006.229.13:27:21.98#ibcon#read 3, iclass 22, count 2 2006.229.13:27:21.98#ibcon#about to read 4, iclass 22, count 2 2006.229.13:27:21.98#ibcon#read 4, iclass 22, count 2 2006.229.13:27:21.98#ibcon#about to read 5, iclass 22, count 2 2006.229.13:27:21.98#ibcon#read 5, iclass 22, count 2 2006.229.13:27:21.98#ibcon#about to read 6, iclass 22, count 2 2006.229.13:27:21.98#ibcon#read 6, iclass 22, count 2 2006.229.13:27:21.98#ibcon#end of sib2, iclass 22, count 2 2006.229.13:27:21.98#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:27:21.98#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:27:21.98#ibcon#[27=AT04-04\r\n] 2006.229.13:27:21.98#ibcon#*before write, iclass 22, count 2 2006.229.13:27:21.98#ibcon#enter sib2, iclass 22, count 2 2006.229.13:27:21.98#ibcon#flushed, iclass 22, count 2 2006.229.13:27:21.98#ibcon#about to write, iclass 22, count 2 2006.229.13:27:21.98#ibcon#wrote, iclass 22, count 2 2006.229.13:27:21.98#ibcon#about to read 3, iclass 22, count 2 2006.229.13:27:22.01#ibcon#read 3, iclass 22, count 2 2006.229.13:27:22.01#ibcon#about to read 4, iclass 22, count 2 2006.229.13:27:22.01#ibcon#read 4, iclass 22, count 2 2006.229.13:27:22.01#ibcon#about to read 5, iclass 22, count 2 2006.229.13:27:22.01#ibcon#read 5, iclass 22, count 2 2006.229.13:27:22.01#ibcon#about to read 6, iclass 22, count 2 2006.229.13:27:22.01#ibcon#read 6, iclass 22, count 2 2006.229.13:27:22.01#ibcon#end of sib2, iclass 22, count 2 2006.229.13:27:22.01#ibcon#*after write, iclass 22, count 2 2006.229.13:27:22.01#ibcon#*before return 0, iclass 22, count 2 2006.229.13:27:22.01#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:22.01#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:27:22.01#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:27:22.01#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:22.01#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:22.13#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:22.13#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:22.13#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:27:22.13#ibcon#first serial, iclass 22, count 0 2006.229.13:27:22.13#ibcon#enter sib2, iclass 22, count 0 2006.229.13:27:22.13#ibcon#flushed, iclass 22, count 0 2006.229.13:27:22.13#ibcon#about to write, iclass 22, count 0 2006.229.13:27:22.13#ibcon#wrote, iclass 22, count 0 2006.229.13:27:22.13#ibcon#about to read 3, iclass 22, count 0 2006.229.13:27:22.15#ibcon#read 3, iclass 22, count 0 2006.229.13:27:22.15#ibcon#about to read 4, iclass 22, count 0 2006.229.13:27:22.15#ibcon#read 4, iclass 22, count 0 2006.229.13:27:22.15#ibcon#about to read 5, iclass 22, count 0 2006.229.13:27:22.15#ibcon#read 5, iclass 22, count 0 2006.229.13:27:22.15#ibcon#about to read 6, iclass 22, count 0 2006.229.13:27:22.15#ibcon#read 6, iclass 22, count 0 2006.229.13:27:22.15#ibcon#end of sib2, iclass 22, count 0 2006.229.13:27:22.15#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:27:22.15#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:27:22.15#ibcon#[27=USB\r\n] 2006.229.13:27:22.15#ibcon#*before write, iclass 22, count 0 2006.229.13:27:22.15#ibcon#enter sib2, iclass 22, count 0 2006.229.13:27:22.15#ibcon#flushed, iclass 22, count 0 2006.229.13:27:22.15#ibcon#about to write, iclass 22, count 0 2006.229.13:27:22.15#ibcon#wrote, iclass 22, count 0 2006.229.13:27:22.15#ibcon#about to read 3, iclass 22, count 0 2006.229.13:27:22.18#ibcon#read 3, iclass 22, count 0 2006.229.13:27:22.18#ibcon#about to read 4, iclass 22, count 0 2006.229.13:27:22.18#ibcon#read 4, iclass 22, count 0 2006.229.13:27:22.18#ibcon#about to read 5, iclass 22, count 0 2006.229.13:27:22.18#ibcon#read 5, iclass 22, count 0 2006.229.13:27:22.18#ibcon#about to read 6, iclass 22, count 0 2006.229.13:27:22.18#ibcon#read 6, iclass 22, count 0 2006.229.13:27:22.18#ibcon#end of sib2, iclass 22, count 0 2006.229.13:27:22.18#ibcon#*after write, iclass 22, count 0 2006.229.13:27:22.18#ibcon#*before return 0, iclass 22, count 0 2006.229.13:27:22.18#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:22.18#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:27:22.18#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:27:22.18#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:27:22.18$vck44/vblo=5,709.99 2006.229.13:27:22.18#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:27:22.18#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:27:22.18#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:22.18#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:22.18#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:22.18#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:22.18#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:27:22.18#ibcon#first serial, iclass 24, count 0 2006.229.13:27:22.18#ibcon#enter sib2, iclass 24, count 0 2006.229.13:27:22.18#ibcon#flushed, iclass 24, count 0 2006.229.13:27:22.18#ibcon#about to write, iclass 24, count 0 2006.229.13:27:22.18#ibcon#wrote, iclass 24, count 0 2006.229.13:27:22.18#ibcon#about to read 3, iclass 24, count 0 2006.229.13:27:22.20#ibcon#read 3, iclass 24, count 0 2006.229.13:27:22.20#ibcon#about to read 4, iclass 24, count 0 2006.229.13:27:22.20#ibcon#read 4, iclass 24, count 0 2006.229.13:27:22.20#ibcon#about to read 5, iclass 24, count 0 2006.229.13:27:22.20#ibcon#read 5, iclass 24, count 0 2006.229.13:27:22.20#ibcon#about to read 6, iclass 24, count 0 2006.229.13:27:22.20#ibcon#read 6, iclass 24, count 0 2006.229.13:27:22.20#ibcon#end of sib2, iclass 24, count 0 2006.229.13:27:22.20#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:27:22.20#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:27:22.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:27:22.20#ibcon#*before write, iclass 24, count 0 2006.229.13:27:22.20#ibcon#enter sib2, iclass 24, count 0 2006.229.13:27:22.20#ibcon#flushed, iclass 24, count 0 2006.229.13:27:22.20#ibcon#about to write, iclass 24, count 0 2006.229.13:27:22.20#ibcon#wrote, iclass 24, count 0 2006.229.13:27:22.20#ibcon#about to read 3, iclass 24, count 0 2006.229.13:27:22.24#ibcon#read 3, iclass 24, count 0 2006.229.13:27:22.24#ibcon#about to read 4, iclass 24, count 0 2006.229.13:27:22.24#ibcon#read 4, iclass 24, count 0 2006.229.13:27:22.24#ibcon#about to read 5, iclass 24, count 0 2006.229.13:27:22.24#ibcon#read 5, iclass 24, count 0 2006.229.13:27:22.24#ibcon#about to read 6, iclass 24, count 0 2006.229.13:27:22.24#ibcon#read 6, iclass 24, count 0 2006.229.13:27:22.24#ibcon#end of sib2, iclass 24, count 0 2006.229.13:27:22.24#ibcon#*after write, iclass 24, count 0 2006.229.13:27:22.24#ibcon#*before return 0, iclass 24, count 0 2006.229.13:27:22.24#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:22.24#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:27:22.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:27:22.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:27:22.24$vck44/vb=5,4 2006.229.13:27:22.24#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:27:22.24#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:27:22.24#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:22.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:22.30#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:22.30#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:22.30#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:27:22.30#ibcon#first serial, iclass 26, count 2 2006.229.13:27:22.30#ibcon#enter sib2, iclass 26, count 2 2006.229.13:27:22.30#ibcon#flushed, iclass 26, count 2 2006.229.13:27:22.30#ibcon#about to write, iclass 26, count 2 2006.229.13:27:22.30#ibcon#wrote, iclass 26, count 2 2006.229.13:27:22.30#ibcon#about to read 3, iclass 26, count 2 2006.229.13:27:22.32#ibcon#read 3, iclass 26, count 2 2006.229.13:27:22.32#ibcon#about to read 4, iclass 26, count 2 2006.229.13:27:22.32#ibcon#read 4, iclass 26, count 2 2006.229.13:27:22.32#ibcon#about to read 5, iclass 26, count 2 2006.229.13:27:22.32#ibcon#read 5, iclass 26, count 2 2006.229.13:27:22.32#ibcon#about to read 6, iclass 26, count 2 2006.229.13:27:22.32#ibcon#read 6, iclass 26, count 2 2006.229.13:27:22.32#ibcon#end of sib2, iclass 26, count 2 2006.229.13:27:22.32#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:27:22.32#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:27:22.32#ibcon#[27=AT05-04\r\n] 2006.229.13:27:22.32#ibcon#*before write, iclass 26, count 2 2006.229.13:27:22.32#ibcon#enter sib2, iclass 26, count 2 2006.229.13:27:22.32#ibcon#flushed, iclass 26, count 2 2006.229.13:27:22.32#ibcon#about to write, iclass 26, count 2 2006.229.13:27:22.32#ibcon#wrote, iclass 26, count 2 2006.229.13:27:22.32#ibcon#about to read 3, iclass 26, count 2 2006.229.13:27:22.35#ibcon#read 3, iclass 26, count 2 2006.229.13:27:22.35#ibcon#about to read 4, iclass 26, count 2 2006.229.13:27:22.35#ibcon#read 4, iclass 26, count 2 2006.229.13:27:22.35#ibcon#about to read 5, iclass 26, count 2 2006.229.13:27:22.35#ibcon#read 5, iclass 26, count 2 2006.229.13:27:22.35#ibcon#about to read 6, iclass 26, count 2 2006.229.13:27:22.35#ibcon#read 6, iclass 26, count 2 2006.229.13:27:22.35#ibcon#end of sib2, iclass 26, count 2 2006.229.13:27:22.35#ibcon#*after write, iclass 26, count 2 2006.229.13:27:22.35#ibcon#*before return 0, iclass 26, count 2 2006.229.13:27:22.35#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:22.35#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:27:22.35#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:27:22.35#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:22.35#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:22.47#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:22.47#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:22.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:27:22.47#ibcon#first serial, iclass 26, count 0 2006.229.13:27:22.47#ibcon#enter sib2, iclass 26, count 0 2006.229.13:27:22.47#ibcon#flushed, iclass 26, count 0 2006.229.13:27:22.47#ibcon#about to write, iclass 26, count 0 2006.229.13:27:22.47#ibcon#wrote, iclass 26, count 0 2006.229.13:27:22.47#ibcon#about to read 3, iclass 26, count 0 2006.229.13:27:22.49#ibcon#read 3, iclass 26, count 0 2006.229.13:27:22.49#ibcon#about to read 4, iclass 26, count 0 2006.229.13:27:22.49#ibcon#read 4, iclass 26, count 0 2006.229.13:27:22.49#ibcon#about to read 5, iclass 26, count 0 2006.229.13:27:22.49#ibcon#read 5, iclass 26, count 0 2006.229.13:27:22.49#ibcon#about to read 6, iclass 26, count 0 2006.229.13:27:22.49#ibcon#read 6, iclass 26, count 0 2006.229.13:27:22.49#ibcon#end of sib2, iclass 26, count 0 2006.229.13:27:22.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:27:22.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:27:22.49#ibcon#[27=USB\r\n] 2006.229.13:27:22.49#ibcon#*before write, iclass 26, count 0 2006.229.13:27:22.49#ibcon#enter sib2, iclass 26, count 0 2006.229.13:27:22.49#ibcon#flushed, iclass 26, count 0 2006.229.13:27:22.49#ibcon#about to write, iclass 26, count 0 2006.229.13:27:22.49#ibcon#wrote, iclass 26, count 0 2006.229.13:27:22.49#ibcon#about to read 3, iclass 26, count 0 2006.229.13:27:22.52#ibcon#read 3, iclass 26, count 0 2006.229.13:27:22.52#ibcon#about to read 4, iclass 26, count 0 2006.229.13:27:22.52#ibcon#read 4, iclass 26, count 0 2006.229.13:27:22.52#ibcon#about to read 5, iclass 26, count 0 2006.229.13:27:22.52#ibcon#read 5, iclass 26, count 0 2006.229.13:27:22.52#ibcon#about to read 6, iclass 26, count 0 2006.229.13:27:22.52#ibcon#read 6, iclass 26, count 0 2006.229.13:27:22.52#ibcon#end of sib2, iclass 26, count 0 2006.229.13:27:22.52#ibcon#*after write, iclass 26, count 0 2006.229.13:27:22.52#ibcon#*before return 0, iclass 26, count 0 2006.229.13:27:22.52#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:22.52#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:27:22.52#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:27:22.52#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:27:22.52$vck44/vblo=6,719.99 2006.229.13:27:22.52#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:27:22.52#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:27:22.52#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:22.52#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:22.52#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:22.52#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:22.52#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:27:22.52#ibcon#first serial, iclass 28, count 0 2006.229.13:27:22.52#ibcon#enter sib2, iclass 28, count 0 2006.229.13:27:22.52#ibcon#flushed, iclass 28, count 0 2006.229.13:27:22.52#ibcon#about to write, iclass 28, count 0 2006.229.13:27:22.52#ibcon#wrote, iclass 28, count 0 2006.229.13:27:22.52#ibcon#about to read 3, iclass 28, count 0 2006.229.13:27:22.54#ibcon#read 3, iclass 28, count 0 2006.229.13:27:22.54#ibcon#about to read 4, iclass 28, count 0 2006.229.13:27:22.54#ibcon#read 4, iclass 28, count 0 2006.229.13:27:22.54#ibcon#about to read 5, iclass 28, count 0 2006.229.13:27:22.54#ibcon#read 5, iclass 28, count 0 2006.229.13:27:22.54#ibcon#about to read 6, iclass 28, count 0 2006.229.13:27:22.54#ibcon#read 6, iclass 28, count 0 2006.229.13:27:22.54#ibcon#end of sib2, iclass 28, count 0 2006.229.13:27:22.54#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:27:22.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:27:22.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:27:22.54#ibcon#*before write, iclass 28, count 0 2006.229.13:27:22.54#ibcon#enter sib2, iclass 28, count 0 2006.229.13:27:22.54#ibcon#flushed, iclass 28, count 0 2006.229.13:27:22.54#ibcon#about to write, iclass 28, count 0 2006.229.13:27:22.54#ibcon#wrote, iclass 28, count 0 2006.229.13:27:22.54#ibcon#about to read 3, iclass 28, count 0 2006.229.13:27:22.58#ibcon#read 3, iclass 28, count 0 2006.229.13:27:22.58#ibcon#about to read 4, iclass 28, count 0 2006.229.13:27:22.58#ibcon#read 4, iclass 28, count 0 2006.229.13:27:22.58#ibcon#about to read 5, iclass 28, count 0 2006.229.13:27:22.58#ibcon#read 5, iclass 28, count 0 2006.229.13:27:22.58#ibcon#about to read 6, iclass 28, count 0 2006.229.13:27:22.58#ibcon#read 6, iclass 28, count 0 2006.229.13:27:22.58#ibcon#end of sib2, iclass 28, count 0 2006.229.13:27:22.58#ibcon#*after write, iclass 28, count 0 2006.229.13:27:22.58#ibcon#*before return 0, iclass 28, count 0 2006.229.13:27:22.58#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:22.58#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:27:22.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:27:22.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:27:22.58$vck44/vb=6,4 2006.229.13:27:22.58#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:27:22.58#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:27:22.58#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:22.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:22.64#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:22.64#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:22.64#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:27:22.64#ibcon#first serial, iclass 30, count 2 2006.229.13:27:22.64#ibcon#enter sib2, iclass 30, count 2 2006.229.13:27:22.64#ibcon#flushed, iclass 30, count 2 2006.229.13:27:22.64#ibcon#about to write, iclass 30, count 2 2006.229.13:27:22.64#ibcon#wrote, iclass 30, count 2 2006.229.13:27:22.64#ibcon#about to read 3, iclass 30, count 2 2006.229.13:27:22.66#ibcon#read 3, iclass 30, count 2 2006.229.13:27:22.66#ibcon#about to read 4, iclass 30, count 2 2006.229.13:27:22.66#ibcon#read 4, iclass 30, count 2 2006.229.13:27:22.66#ibcon#about to read 5, iclass 30, count 2 2006.229.13:27:22.66#ibcon#read 5, iclass 30, count 2 2006.229.13:27:22.66#ibcon#about to read 6, iclass 30, count 2 2006.229.13:27:22.66#ibcon#read 6, iclass 30, count 2 2006.229.13:27:22.66#ibcon#end of sib2, iclass 30, count 2 2006.229.13:27:22.66#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:27:22.66#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:27:22.66#ibcon#[27=AT06-04\r\n] 2006.229.13:27:22.66#ibcon#*before write, iclass 30, count 2 2006.229.13:27:22.66#ibcon#enter sib2, iclass 30, count 2 2006.229.13:27:22.66#ibcon#flushed, iclass 30, count 2 2006.229.13:27:22.66#ibcon#about to write, iclass 30, count 2 2006.229.13:27:22.66#ibcon#wrote, iclass 30, count 2 2006.229.13:27:22.66#ibcon#about to read 3, iclass 30, count 2 2006.229.13:27:22.69#ibcon#read 3, iclass 30, count 2 2006.229.13:27:22.69#ibcon#about to read 4, iclass 30, count 2 2006.229.13:27:22.69#ibcon#read 4, iclass 30, count 2 2006.229.13:27:22.69#ibcon#about to read 5, iclass 30, count 2 2006.229.13:27:22.69#ibcon#read 5, iclass 30, count 2 2006.229.13:27:22.69#ibcon#about to read 6, iclass 30, count 2 2006.229.13:27:22.69#ibcon#read 6, iclass 30, count 2 2006.229.13:27:22.69#ibcon#end of sib2, iclass 30, count 2 2006.229.13:27:22.69#ibcon#*after write, iclass 30, count 2 2006.229.13:27:22.69#ibcon#*before return 0, iclass 30, count 2 2006.229.13:27:22.69#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:22.69#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:27:22.69#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:27:22.69#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:22.69#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:22.81#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:22.81#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:22.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:27:22.81#ibcon#first serial, iclass 30, count 0 2006.229.13:27:22.81#ibcon#enter sib2, iclass 30, count 0 2006.229.13:27:22.81#ibcon#flushed, iclass 30, count 0 2006.229.13:27:22.81#ibcon#about to write, iclass 30, count 0 2006.229.13:27:22.81#ibcon#wrote, iclass 30, count 0 2006.229.13:27:22.81#ibcon#about to read 3, iclass 30, count 0 2006.229.13:27:22.83#ibcon#read 3, iclass 30, count 0 2006.229.13:27:22.83#ibcon#about to read 4, iclass 30, count 0 2006.229.13:27:22.83#ibcon#read 4, iclass 30, count 0 2006.229.13:27:22.83#ibcon#about to read 5, iclass 30, count 0 2006.229.13:27:22.83#ibcon#read 5, iclass 30, count 0 2006.229.13:27:22.83#ibcon#about to read 6, iclass 30, count 0 2006.229.13:27:22.83#ibcon#read 6, iclass 30, count 0 2006.229.13:27:22.83#ibcon#end of sib2, iclass 30, count 0 2006.229.13:27:22.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:27:22.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:27:22.83#ibcon#[27=USB\r\n] 2006.229.13:27:22.83#ibcon#*before write, iclass 30, count 0 2006.229.13:27:22.83#ibcon#enter sib2, iclass 30, count 0 2006.229.13:27:22.83#ibcon#flushed, iclass 30, count 0 2006.229.13:27:22.83#ibcon#about to write, iclass 30, count 0 2006.229.13:27:22.83#ibcon#wrote, iclass 30, count 0 2006.229.13:27:22.83#ibcon#about to read 3, iclass 30, count 0 2006.229.13:27:22.86#ibcon#read 3, iclass 30, count 0 2006.229.13:27:22.86#ibcon#about to read 4, iclass 30, count 0 2006.229.13:27:22.86#ibcon#read 4, iclass 30, count 0 2006.229.13:27:22.86#ibcon#about to read 5, iclass 30, count 0 2006.229.13:27:22.86#ibcon#read 5, iclass 30, count 0 2006.229.13:27:22.86#ibcon#about to read 6, iclass 30, count 0 2006.229.13:27:22.86#ibcon#read 6, iclass 30, count 0 2006.229.13:27:22.86#ibcon#end of sib2, iclass 30, count 0 2006.229.13:27:22.86#ibcon#*after write, iclass 30, count 0 2006.229.13:27:22.86#ibcon#*before return 0, iclass 30, count 0 2006.229.13:27:22.86#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:22.86#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:27:22.86#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:27:22.86#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:27:22.86$vck44/vblo=7,734.99 2006.229.13:27:22.86#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:27:22.86#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:27:22.86#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:22.86#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:22.86#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:22.86#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:22.86#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:27:22.86#ibcon#first serial, iclass 32, count 0 2006.229.13:27:22.86#ibcon#enter sib2, iclass 32, count 0 2006.229.13:27:22.86#ibcon#flushed, iclass 32, count 0 2006.229.13:27:22.86#ibcon#about to write, iclass 32, count 0 2006.229.13:27:22.86#ibcon#wrote, iclass 32, count 0 2006.229.13:27:22.86#ibcon#about to read 3, iclass 32, count 0 2006.229.13:27:22.88#ibcon#read 3, iclass 32, count 0 2006.229.13:27:22.88#ibcon#about to read 4, iclass 32, count 0 2006.229.13:27:22.88#ibcon#read 4, iclass 32, count 0 2006.229.13:27:22.88#ibcon#about to read 5, iclass 32, count 0 2006.229.13:27:22.88#ibcon#read 5, iclass 32, count 0 2006.229.13:27:22.88#ibcon#about to read 6, iclass 32, count 0 2006.229.13:27:22.88#ibcon#read 6, iclass 32, count 0 2006.229.13:27:22.88#ibcon#end of sib2, iclass 32, count 0 2006.229.13:27:22.88#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:27:22.88#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:27:22.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:27:22.88#ibcon#*before write, iclass 32, count 0 2006.229.13:27:22.88#ibcon#enter sib2, iclass 32, count 0 2006.229.13:27:22.88#ibcon#flushed, iclass 32, count 0 2006.229.13:27:22.88#ibcon#about to write, iclass 32, count 0 2006.229.13:27:22.88#ibcon#wrote, iclass 32, count 0 2006.229.13:27:22.88#ibcon#about to read 3, iclass 32, count 0 2006.229.13:27:22.92#ibcon#read 3, iclass 32, count 0 2006.229.13:27:22.92#ibcon#about to read 4, iclass 32, count 0 2006.229.13:27:22.92#ibcon#read 4, iclass 32, count 0 2006.229.13:27:22.92#ibcon#about to read 5, iclass 32, count 0 2006.229.13:27:22.92#ibcon#read 5, iclass 32, count 0 2006.229.13:27:22.92#ibcon#about to read 6, iclass 32, count 0 2006.229.13:27:22.92#ibcon#read 6, iclass 32, count 0 2006.229.13:27:22.92#ibcon#end of sib2, iclass 32, count 0 2006.229.13:27:22.92#ibcon#*after write, iclass 32, count 0 2006.229.13:27:22.92#ibcon#*before return 0, iclass 32, count 0 2006.229.13:27:22.92#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:22.92#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:27:22.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:27:22.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:27:22.92$vck44/vb=7,4 2006.229.13:27:22.92#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:27:22.92#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:27:22.92#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:22.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:27:22.98#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:27:22.98#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:27:22.98#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:27:22.98#ibcon#first serial, iclass 34, count 2 2006.229.13:27:22.98#ibcon#enter sib2, iclass 34, count 2 2006.229.13:27:22.98#ibcon#flushed, iclass 34, count 2 2006.229.13:27:22.98#ibcon#about to write, iclass 34, count 2 2006.229.13:27:22.98#ibcon#wrote, iclass 34, count 2 2006.229.13:27:22.98#ibcon#about to read 3, iclass 34, count 2 2006.229.13:27:23.00#ibcon#read 3, iclass 34, count 2 2006.229.13:27:23.00#ibcon#about to read 4, iclass 34, count 2 2006.229.13:27:23.00#ibcon#read 4, iclass 34, count 2 2006.229.13:27:23.00#ibcon#about to read 5, iclass 34, count 2 2006.229.13:27:23.00#ibcon#read 5, iclass 34, count 2 2006.229.13:27:23.00#ibcon#about to read 6, iclass 34, count 2 2006.229.13:27:23.00#ibcon#read 6, iclass 34, count 2 2006.229.13:27:23.00#ibcon#end of sib2, iclass 34, count 2 2006.229.13:27:23.00#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:27:23.00#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:27:23.00#ibcon#[27=AT07-04\r\n] 2006.229.13:27:23.00#ibcon#*before write, iclass 34, count 2 2006.229.13:27:23.00#ibcon#enter sib2, iclass 34, count 2 2006.229.13:27:23.00#ibcon#flushed, iclass 34, count 2 2006.229.13:27:23.00#ibcon#about to write, iclass 34, count 2 2006.229.13:27:23.00#ibcon#wrote, iclass 34, count 2 2006.229.13:27:23.00#ibcon#about to read 3, iclass 34, count 2 2006.229.13:27:23.03#ibcon#read 3, iclass 34, count 2 2006.229.13:27:23.03#ibcon#about to read 4, iclass 34, count 2 2006.229.13:27:23.03#ibcon#read 4, iclass 34, count 2 2006.229.13:27:23.03#ibcon#about to read 5, iclass 34, count 2 2006.229.13:27:23.03#ibcon#read 5, iclass 34, count 2 2006.229.13:27:23.03#ibcon#about to read 6, iclass 34, count 2 2006.229.13:27:23.03#ibcon#read 6, iclass 34, count 2 2006.229.13:27:23.03#ibcon#end of sib2, iclass 34, count 2 2006.229.13:27:23.03#ibcon#*after write, iclass 34, count 2 2006.229.13:27:23.03#ibcon#*before return 0, iclass 34, count 2 2006.229.13:27:23.03#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:27:23.03#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:27:23.03#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:27:23.03#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:23.03#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:27:23.15#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:27:23.15#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:27:23.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:27:23.15#ibcon#first serial, iclass 34, count 0 2006.229.13:27:23.15#ibcon#enter sib2, iclass 34, count 0 2006.229.13:27:23.15#ibcon#flushed, iclass 34, count 0 2006.229.13:27:23.15#ibcon#about to write, iclass 34, count 0 2006.229.13:27:23.15#ibcon#wrote, iclass 34, count 0 2006.229.13:27:23.15#ibcon#about to read 3, iclass 34, count 0 2006.229.13:27:23.17#ibcon#read 3, iclass 34, count 0 2006.229.13:27:23.17#ibcon#about to read 4, iclass 34, count 0 2006.229.13:27:23.17#ibcon#read 4, iclass 34, count 0 2006.229.13:27:23.17#ibcon#about to read 5, iclass 34, count 0 2006.229.13:27:23.17#ibcon#read 5, iclass 34, count 0 2006.229.13:27:23.17#ibcon#about to read 6, iclass 34, count 0 2006.229.13:27:23.17#ibcon#read 6, iclass 34, count 0 2006.229.13:27:23.17#ibcon#end of sib2, iclass 34, count 0 2006.229.13:27:23.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:27:23.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:27:23.17#ibcon#[27=USB\r\n] 2006.229.13:27:23.17#ibcon#*before write, iclass 34, count 0 2006.229.13:27:23.17#ibcon#enter sib2, iclass 34, count 0 2006.229.13:27:23.17#ibcon#flushed, iclass 34, count 0 2006.229.13:27:23.17#ibcon#about to write, iclass 34, count 0 2006.229.13:27:23.17#ibcon#wrote, iclass 34, count 0 2006.229.13:27:23.17#ibcon#about to read 3, iclass 34, count 0 2006.229.13:27:23.20#ibcon#read 3, iclass 34, count 0 2006.229.13:27:23.20#ibcon#about to read 4, iclass 34, count 0 2006.229.13:27:23.20#ibcon#read 4, iclass 34, count 0 2006.229.13:27:23.20#ibcon#about to read 5, iclass 34, count 0 2006.229.13:27:23.20#ibcon#read 5, iclass 34, count 0 2006.229.13:27:23.20#ibcon#about to read 6, iclass 34, count 0 2006.229.13:27:23.20#ibcon#read 6, iclass 34, count 0 2006.229.13:27:23.20#ibcon#end of sib2, iclass 34, count 0 2006.229.13:27:23.20#ibcon#*after write, iclass 34, count 0 2006.229.13:27:23.20#ibcon#*before return 0, iclass 34, count 0 2006.229.13:27:23.20#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:27:23.20#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:27:23.20#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:27:23.20#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:27:23.20$vck44/vblo=8,744.99 2006.229.13:27:23.20#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:27:23.20#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:27:23.20#ibcon#ireg 17 cls_cnt 0 2006.229.13:27:23.20#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:27:23.20#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:27:23.20#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:27:23.20#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:27:23.20#ibcon#first serial, iclass 36, count 0 2006.229.13:27:23.20#ibcon#enter sib2, iclass 36, count 0 2006.229.13:27:23.20#ibcon#flushed, iclass 36, count 0 2006.229.13:27:23.20#ibcon#about to write, iclass 36, count 0 2006.229.13:27:23.20#ibcon#wrote, iclass 36, count 0 2006.229.13:27:23.20#ibcon#about to read 3, iclass 36, count 0 2006.229.13:27:23.22#ibcon#read 3, iclass 36, count 0 2006.229.13:27:23.22#ibcon#about to read 4, iclass 36, count 0 2006.229.13:27:23.22#ibcon#read 4, iclass 36, count 0 2006.229.13:27:23.22#ibcon#about to read 5, iclass 36, count 0 2006.229.13:27:23.22#ibcon#read 5, iclass 36, count 0 2006.229.13:27:23.22#ibcon#about to read 6, iclass 36, count 0 2006.229.13:27:23.22#ibcon#read 6, iclass 36, count 0 2006.229.13:27:23.22#ibcon#end of sib2, iclass 36, count 0 2006.229.13:27:23.22#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:27:23.22#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:27:23.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:27:23.22#ibcon#*before write, iclass 36, count 0 2006.229.13:27:23.22#ibcon#enter sib2, iclass 36, count 0 2006.229.13:27:23.22#ibcon#flushed, iclass 36, count 0 2006.229.13:27:23.22#ibcon#about to write, iclass 36, count 0 2006.229.13:27:23.22#ibcon#wrote, iclass 36, count 0 2006.229.13:27:23.22#ibcon#about to read 3, iclass 36, count 0 2006.229.13:27:23.26#ibcon#read 3, iclass 36, count 0 2006.229.13:27:23.26#ibcon#about to read 4, iclass 36, count 0 2006.229.13:27:23.26#ibcon#read 4, iclass 36, count 0 2006.229.13:27:23.26#ibcon#about to read 5, iclass 36, count 0 2006.229.13:27:23.26#ibcon#read 5, iclass 36, count 0 2006.229.13:27:23.26#ibcon#about to read 6, iclass 36, count 0 2006.229.13:27:23.26#ibcon#read 6, iclass 36, count 0 2006.229.13:27:23.26#ibcon#end of sib2, iclass 36, count 0 2006.229.13:27:23.26#ibcon#*after write, iclass 36, count 0 2006.229.13:27:23.26#ibcon#*before return 0, iclass 36, count 0 2006.229.13:27:23.26#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:27:23.26#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:27:23.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:27:23.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:27:23.26$vck44/vb=8,4 2006.229.13:27:23.26#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:27:23.26#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:27:23.26#ibcon#ireg 11 cls_cnt 2 2006.229.13:27:23.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:27:23.32#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:27:23.32#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:27:23.32#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:27:23.32#ibcon#first serial, iclass 38, count 2 2006.229.13:27:23.32#ibcon#enter sib2, iclass 38, count 2 2006.229.13:27:23.32#ibcon#flushed, iclass 38, count 2 2006.229.13:27:23.32#ibcon#about to write, iclass 38, count 2 2006.229.13:27:23.32#ibcon#wrote, iclass 38, count 2 2006.229.13:27:23.32#ibcon#about to read 3, iclass 38, count 2 2006.229.13:27:23.34#ibcon#read 3, iclass 38, count 2 2006.229.13:27:23.34#ibcon#about to read 4, iclass 38, count 2 2006.229.13:27:23.34#ibcon#read 4, iclass 38, count 2 2006.229.13:27:23.34#ibcon#about to read 5, iclass 38, count 2 2006.229.13:27:23.34#ibcon#read 5, iclass 38, count 2 2006.229.13:27:23.34#ibcon#about to read 6, iclass 38, count 2 2006.229.13:27:23.34#ibcon#read 6, iclass 38, count 2 2006.229.13:27:23.34#ibcon#end of sib2, iclass 38, count 2 2006.229.13:27:23.34#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:27:23.34#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:27:23.34#ibcon#[27=AT08-04\r\n] 2006.229.13:27:23.34#ibcon#*before write, iclass 38, count 2 2006.229.13:27:23.34#ibcon#enter sib2, iclass 38, count 2 2006.229.13:27:23.34#ibcon#flushed, iclass 38, count 2 2006.229.13:27:23.34#ibcon#about to write, iclass 38, count 2 2006.229.13:27:23.34#ibcon#wrote, iclass 38, count 2 2006.229.13:27:23.34#ibcon#about to read 3, iclass 38, count 2 2006.229.13:27:23.37#ibcon#read 3, iclass 38, count 2 2006.229.13:27:23.37#ibcon#about to read 4, iclass 38, count 2 2006.229.13:27:23.37#ibcon#read 4, iclass 38, count 2 2006.229.13:27:23.37#ibcon#about to read 5, iclass 38, count 2 2006.229.13:27:23.37#ibcon#read 5, iclass 38, count 2 2006.229.13:27:23.37#ibcon#about to read 6, iclass 38, count 2 2006.229.13:27:23.37#ibcon#read 6, iclass 38, count 2 2006.229.13:27:23.37#ibcon#end of sib2, iclass 38, count 2 2006.229.13:27:23.37#ibcon#*after write, iclass 38, count 2 2006.229.13:27:23.37#ibcon#*before return 0, iclass 38, count 2 2006.229.13:27:23.37#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:27:23.37#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:27:23.37#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:27:23.37#ibcon#ireg 7 cls_cnt 0 2006.229.13:27:23.37#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:27:23.49#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:27:23.49#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:27:23.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:27:23.49#ibcon#first serial, iclass 38, count 0 2006.229.13:27:23.49#ibcon#enter sib2, iclass 38, count 0 2006.229.13:27:23.49#ibcon#flushed, iclass 38, count 0 2006.229.13:27:23.49#ibcon#about to write, iclass 38, count 0 2006.229.13:27:23.49#ibcon#wrote, iclass 38, count 0 2006.229.13:27:23.49#ibcon#about to read 3, iclass 38, count 0 2006.229.13:27:23.51#ibcon#read 3, iclass 38, count 0 2006.229.13:27:23.51#ibcon#about to read 4, iclass 38, count 0 2006.229.13:27:23.51#ibcon#read 4, iclass 38, count 0 2006.229.13:27:23.51#ibcon#about to read 5, iclass 38, count 0 2006.229.13:27:23.51#ibcon#read 5, iclass 38, count 0 2006.229.13:27:23.51#ibcon#about to read 6, iclass 38, count 0 2006.229.13:27:23.51#ibcon#read 6, iclass 38, count 0 2006.229.13:27:23.51#ibcon#end of sib2, iclass 38, count 0 2006.229.13:27:23.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:27:23.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:27:23.51#ibcon#[27=USB\r\n] 2006.229.13:27:23.51#ibcon#*before write, iclass 38, count 0 2006.229.13:27:23.51#ibcon#enter sib2, iclass 38, count 0 2006.229.13:27:23.51#ibcon#flushed, iclass 38, count 0 2006.229.13:27:23.51#ibcon#about to write, iclass 38, count 0 2006.229.13:27:23.51#ibcon#wrote, iclass 38, count 0 2006.229.13:27:23.51#ibcon#about to read 3, iclass 38, count 0 2006.229.13:27:23.54#ibcon#read 3, iclass 38, count 0 2006.229.13:27:23.54#ibcon#about to read 4, iclass 38, count 0 2006.229.13:27:23.54#ibcon#read 4, iclass 38, count 0 2006.229.13:27:23.54#ibcon#about to read 5, iclass 38, count 0 2006.229.13:27:23.54#ibcon#read 5, iclass 38, count 0 2006.229.13:27:23.54#ibcon#about to read 6, iclass 38, count 0 2006.229.13:27:23.54#ibcon#read 6, iclass 38, count 0 2006.229.13:27:23.54#ibcon#end of sib2, iclass 38, count 0 2006.229.13:27:23.54#ibcon#*after write, iclass 38, count 0 2006.229.13:27:23.54#ibcon#*before return 0, iclass 38, count 0 2006.229.13:27:23.54#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:27:23.54#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:27:23.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:27:23.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:27:23.54$vck44/vabw=wide 2006.229.13:27:23.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:27:23.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:27:23.54#ibcon#ireg 8 cls_cnt 0 2006.229.13:27:23.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:23.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:23.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:23.54#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:27:23.54#ibcon#first serial, iclass 40, count 0 2006.229.13:27:23.54#ibcon#enter sib2, iclass 40, count 0 2006.229.13:27:23.54#ibcon#flushed, iclass 40, count 0 2006.229.13:27:23.54#ibcon#about to write, iclass 40, count 0 2006.229.13:27:23.54#ibcon#wrote, iclass 40, count 0 2006.229.13:27:23.54#ibcon#about to read 3, iclass 40, count 0 2006.229.13:27:23.56#ibcon#read 3, iclass 40, count 0 2006.229.13:27:23.56#ibcon#about to read 4, iclass 40, count 0 2006.229.13:27:23.56#ibcon#read 4, iclass 40, count 0 2006.229.13:27:23.56#ibcon#about to read 5, iclass 40, count 0 2006.229.13:27:23.56#ibcon#read 5, iclass 40, count 0 2006.229.13:27:23.56#ibcon#about to read 6, iclass 40, count 0 2006.229.13:27:23.56#ibcon#read 6, iclass 40, count 0 2006.229.13:27:23.56#ibcon#end of sib2, iclass 40, count 0 2006.229.13:27:23.56#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:27:23.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:27:23.56#ibcon#[25=BW32\r\n] 2006.229.13:27:23.56#ibcon#*before write, iclass 40, count 0 2006.229.13:27:23.56#ibcon#enter sib2, iclass 40, count 0 2006.229.13:27:23.56#ibcon#flushed, iclass 40, count 0 2006.229.13:27:23.56#ibcon#about to write, iclass 40, count 0 2006.229.13:27:23.56#ibcon#wrote, iclass 40, count 0 2006.229.13:27:23.56#ibcon#about to read 3, iclass 40, count 0 2006.229.13:27:23.59#ibcon#read 3, iclass 40, count 0 2006.229.13:27:23.59#ibcon#about to read 4, iclass 40, count 0 2006.229.13:27:23.59#ibcon#read 4, iclass 40, count 0 2006.229.13:27:23.59#ibcon#about to read 5, iclass 40, count 0 2006.229.13:27:23.59#ibcon#read 5, iclass 40, count 0 2006.229.13:27:23.59#ibcon#about to read 6, iclass 40, count 0 2006.229.13:27:23.59#ibcon#read 6, iclass 40, count 0 2006.229.13:27:23.59#ibcon#end of sib2, iclass 40, count 0 2006.229.13:27:23.59#ibcon#*after write, iclass 40, count 0 2006.229.13:27:23.59#ibcon#*before return 0, iclass 40, count 0 2006.229.13:27:23.59#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:23.59#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:27:23.59#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:27:23.59#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:27:23.59$vck44/vbbw=wide 2006.229.13:27:23.59#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.13:27:23.59#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.13:27:23.59#ibcon#ireg 8 cls_cnt 0 2006.229.13:27:23.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:27:23.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:27:23.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:27:23.66#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:27:23.66#ibcon#first serial, iclass 4, count 0 2006.229.13:27:23.66#ibcon#enter sib2, iclass 4, count 0 2006.229.13:27:23.66#ibcon#flushed, iclass 4, count 0 2006.229.13:27:23.66#ibcon#about to write, iclass 4, count 0 2006.229.13:27:23.66#ibcon#wrote, iclass 4, count 0 2006.229.13:27:23.66#ibcon#about to read 3, iclass 4, count 0 2006.229.13:27:23.68#ibcon#read 3, iclass 4, count 0 2006.229.13:27:23.68#ibcon#about to read 4, iclass 4, count 0 2006.229.13:27:23.68#ibcon#read 4, iclass 4, count 0 2006.229.13:27:23.68#ibcon#about to read 5, iclass 4, count 0 2006.229.13:27:23.68#ibcon#read 5, iclass 4, count 0 2006.229.13:27:23.68#ibcon#about to read 6, iclass 4, count 0 2006.229.13:27:23.68#ibcon#read 6, iclass 4, count 0 2006.229.13:27:23.68#ibcon#end of sib2, iclass 4, count 0 2006.229.13:27:23.68#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:27:23.68#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:27:23.68#ibcon#[27=BW32\r\n] 2006.229.13:27:23.68#ibcon#*before write, iclass 4, count 0 2006.229.13:27:23.68#ibcon#enter sib2, iclass 4, count 0 2006.229.13:27:23.68#ibcon#flushed, iclass 4, count 0 2006.229.13:27:23.68#ibcon#about to write, iclass 4, count 0 2006.229.13:27:23.68#ibcon#wrote, iclass 4, count 0 2006.229.13:27:23.68#ibcon#about to read 3, iclass 4, count 0 2006.229.13:27:23.71#ibcon#read 3, iclass 4, count 0 2006.229.13:27:23.71#ibcon#about to read 4, iclass 4, count 0 2006.229.13:27:23.71#ibcon#read 4, iclass 4, count 0 2006.229.13:27:23.71#ibcon#about to read 5, iclass 4, count 0 2006.229.13:27:23.71#ibcon#read 5, iclass 4, count 0 2006.229.13:27:23.71#ibcon#about to read 6, iclass 4, count 0 2006.229.13:27:23.71#ibcon#read 6, iclass 4, count 0 2006.229.13:27:23.71#ibcon#end of sib2, iclass 4, count 0 2006.229.13:27:23.71#ibcon#*after write, iclass 4, count 0 2006.229.13:27:23.71#ibcon#*before return 0, iclass 4, count 0 2006.229.13:27:23.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:27:23.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:27:23.71#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:27:23.71#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:27:23.71$setupk4/ifdk4 2006.229.13:27:23.71$ifdk4/lo= 2006.229.13:27:23.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:27:23.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:27:23.71$ifdk4/patch= 2006.229.13:27:23.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:27:23.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:27:23.71$setupk4/!*+20s 2006.229.13:27:30.44#abcon#<5=/04 1.5 2.3 27.571001002.0\r\n> 2006.229.13:27:30.46#abcon#{5=INTERFACE CLEAR} 2006.229.13:27:30.52#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:27:38.13#trakl#Source acquired 2006.229.13:27:38.22$setupk4/"tpicd 2006.229.13:27:38.22$setupk4/echo=off 2006.229.13:27:38.22$setupk4/xlog=off 2006.229.13:27:38.22:!2006.229.13:32:04 2006.229.13:27:40.13#flagr#flagr/antenna,acquired 2006.229.13:32:04.02:preob 2006.229.13:32:05.14/onsource/TRACKING 2006.229.13:32:05.14:!2006.229.13:32:14 2006.229.13:32:14.01:"tape 2006.229.13:32:14.02:"st=record 2006.229.13:32:14.02:data_valid=on 2006.229.13:32:14.02:midob 2006.229.13:32:15.14/onsource/TRACKING 2006.229.13:32:15.14/wx/27.56,1002.1,100 2006.229.13:32:15.23/cable/+6.4112E-03 2006.229.13:32:16.32/va/01,08,usb,yes,29,31 2006.229.13:32:16.32/va/02,07,usb,yes,31,32 2006.229.13:32:16.32/va/03,06,usb,yes,39,41 2006.229.13:32:16.32/va/04,07,usb,yes,32,34 2006.229.13:32:16.32/va/05,04,usb,yes,29,29 2006.229.13:32:16.32/va/06,04,usb,yes,32,32 2006.229.13:32:16.32/va/07,05,usb,yes,28,29 2006.229.13:32:16.32/va/08,06,usb,yes,21,26 2006.229.13:32:16.55/valo/01,524.99,yes,locked 2006.229.13:32:16.55/valo/02,534.99,yes,locked 2006.229.13:32:16.55/valo/03,564.99,yes,locked 2006.229.13:32:16.55/valo/04,624.99,yes,locked 2006.229.13:32:16.55/valo/05,734.99,yes,locked 2006.229.13:32:16.55/valo/06,814.99,yes,locked 2006.229.13:32:16.55/valo/07,864.99,yes,locked 2006.229.13:32:16.55/valo/08,884.99,yes,locked 2006.229.13:32:17.64/vb/01,04,usb,yes,30,28 2006.229.13:32:17.64/vb/02,04,usb,yes,33,33 2006.229.13:32:17.64/vb/03,04,usb,yes,30,33 2006.229.13:32:17.64/vb/04,04,usb,yes,34,33 2006.229.13:32:17.64/vb/05,04,usb,yes,26,29 2006.229.13:32:17.64/vb/06,04,usb,yes,31,27 2006.229.13:32:17.64/vb/07,04,usb,yes,31,31 2006.229.13:32:17.64/vb/08,04,usb,yes,28,32 2006.229.13:32:17.87/vblo/01,629.99,yes,locked 2006.229.13:32:17.87/vblo/02,634.99,yes,locked 2006.229.13:32:17.87/vblo/03,649.99,yes,locked 2006.229.13:32:17.87/vblo/04,679.99,yes,locked 2006.229.13:32:17.87/vblo/05,709.99,yes,locked 2006.229.13:32:17.87/vblo/06,719.99,yes,locked 2006.229.13:32:17.87/vblo/07,734.99,yes,locked 2006.229.13:32:17.87/vblo/08,744.99,yes,locked 2006.229.13:32:18.02/vabw/8 2006.229.13:32:18.17/vbbw/8 2006.229.13:32:18.26/xfe/off,on,12.0 2006.229.13:32:18.65/ifatt/23,28,28,28 2006.229.13:32:19.08/fmout-gps/S +4.67E-07 2006.229.13:32:19.12:!2006.229.13:33:34 2006.229.13:33:34.02:data_valid=off 2006.229.13:33:34.02:"et 2006.229.13:33:34.02:!+3s 2006.229.13:33:37.04:"tape 2006.229.13:33:37.05:postob 2006.229.13:33:37.25/cable/+6.4111E-03 2006.229.13:33:37.26/wx/27.56,1002.1,100 2006.229.13:33:37.31/fmout-gps/S +4.68E-07 2006.229.13:33:37.32:scan_name=229-1337,jd0608,40 2006.229.13:33:37.32:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.13:33:39.15#flagr#flagr/antenna,new-source 2006.229.13:33:39.15:checkk5 2006.229.13:33:39.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:33:39.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:33:40.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:33:40.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:33:41.14/chk_obsdata//k5ts1/T2291332??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.13:33:41.56/chk_obsdata//k5ts2/T2291332??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.13:33:41.95/chk_obsdata//k5ts3/T2291332??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.13:33:42.38/chk_obsdata//k5ts4/T2291332??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.13:33:43.10/k5log//k5ts1_log_newline 2006.229.13:33:43.81/k5log//k5ts2_log_newline 2006.229.13:33:44.51/k5log//k5ts3_log_newline 2006.229.13:33:45.23/k5log//k5ts4_log_newline 2006.229.13:33:45.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:33:45.25:setupk4=1 2006.229.13:33:45.25$setupk4/echo=on 2006.229.13:33:45.25$setupk4/pcalon 2006.229.13:33:45.25$pcalon/"no phase cal control is implemented here 2006.229.13:33:45.25$setupk4/"tpicd=stop 2006.229.13:33:45.25$setupk4/"rec=synch_on 2006.229.13:33:45.25$setupk4/"rec_mode=128 2006.229.13:33:45.25$setupk4/!* 2006.229.13:33:45.25$setupk4/recpk4 2006.229.13:33:45.25$recpk4/recpatch= 2006.229.13:33:45.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:33:45.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:33:45.26$setupk4/vck44 2006.229.13:33:45.26$vck44/valo=1,524.99 2006.229.13:33:45.26#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.13:33:45.26#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.13:33:45.26#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:45.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:45.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:45.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:45.26#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:33:45.26#ibcon#first serial, iclass 15, count 0 2006.229.13:33:45.26#ibcon#enter sib2, iclass 15, count 0 2006.229.13:33:45.26#ibcon#flushed, iclass 15, count 0 2006.229.13:33:45.26#ibcon#about to write, iclass 15, count 0 2006.229.13:33:45.26#ibcon#wrote, iclass 15, count 0 2006.229.13:33:45.26#ibcon#about to read 3, iclass 15, count 0 2006.229.13:33:45.27#ibcon#read 3, iclass 15, count 0 2006.229.13:33:45.27#ibcon#about to read 4, iclass 15, count 0 2006.229.13:33:45.27#ibcon#read 4, iclass 15, count 0 2006.229.13:33:45.27#ibcon#about to read 5, iclass 15, count 0 2006.229.13:33:45.27#ibcon#read 5, iclass 15, count 0 2006.229.13:33:45.27#ibcon#about to read 6, iclass 15, count 0 2006.229.13:33:45.27#ibcon#read 6, iclass 15, count 0 2006.229.13:33:45.27#ibcon#end of sib2, iclass 15, count 0 2006.229.13:33:45.27#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:33:45.27#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:33:45.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:33:45.27#ibcon#*before write, iclass 15, count 0 2006.229.13:33:45.27#ibcon#enter sib2, iclass 15, count 0 2006.229.13:33:45.27#ibcon#flushed, iclass 15, count 0 2006.229.13:33:45.27#ibcon#about to write, iclass 15, count 0 2006.229.13:33:45.27#ibcon#wrote, iclass 15, count 0 2006.229.13:33:45.27#ibcon#about to read 3, iclass 15, count 0 2006.229.13:33:45.32#ibcon#read 3, iclass 15, count 0 2006.229.13:33:45.32#ibcon#about to read 4, iclass 15, count 0 2006.229.13:33:45.32#ibcon#read 4, iclass 15, count 0 2006.229.13:33:45.32#ibcon#about to read 5, iclass 15, count 0 2006.229.13:33:45.32#ibcon#read 5, iclass 15, count 0 2006.229.13:33:45.32#ibcon#about to read 6, iclass 15, count 0 2006.229.13:33:45.32#ibcon#read 6, iclass 15, count 0 2006.229.13:33:45.32#ibcon#end of sib2, iclass 15, count 0 2006.229.13:33:45.32#ibcon#*after write, iclass 15, count 0 2006.229.13:33:45.32#ibcon#*before return 0, iclass 15, count 0 2006.229.13:33:45.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:45.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:45.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:33:45.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:33:45.33$vck44/va=1,8 2006.229.13:33:45.33#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.13:33:45.33#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.13:33:45.33#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:45.33#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:45.33#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:45.33#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:45.33#ibcon#enter wrdev, iclass 17, count 2 2006.229.13:33:45.33#ibcon#first serial, iclass 17, count 2 2006.229.13:33:45.33#ibcon#enter sib2, iclass 17, count 2 2006.229.13:33:45.33#ibcon#flushed, iclass 17, count 2 2006.229.13:33:45.33#ibcon#about to write, iclass 17, count 2 2006.229.13:33:45.33#ibcon#wrote, iclass 17, count 2 2006.229.13:33:45.33#ibcon#about to read 3, iclass 17, count 2 2006.229.13:33:45.34#ibcon#read 3, iclass 17, count 2 2006.229.13:33:45.34#ibcon#about to read 4, iclass 17, count 2 2006.229.13:33:45.34#ibcon#read 4, iclass 17, count 2 2006.229.13:33:45.34#ibcon#about to read 5, iclass 17, count 2 2006.229.13:33:45.34#ibcon#read 5, iclass 17, count 2 2006.229.13:33:45.34#ibcon#about to read 6, iclass 17, count 2 2006.229.13:33:45.34#ibcon#read 6, iclass 17, count 2 2006.229.13:33:45.34#ibcon#end of sib2, iclass 17, count 2 2006.229.13:33:45.34#ibcon#*mode == 0, iclass 17, count 2 2006.229.13:33:45.34#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.13:33:45.34#ibcon#[25=AT01-08\r\n] 2006.229.13:33:45.34#ibcon#*before write, iclass 17, count 2 2006.229.13:33:45.34#ibcon#enter sib2, iclass 17, count 2 2006.229.13:33:45.34#ibcon#flushed, iclass 17, count 2 2006.229.13:33:45.34#ibcon#about to write, iclass 17, count 2 2006.229.13:33:45.34#ibcon#wrote, iclass 17, count 2 2006.229.13:33:45.34#ibcon#about to read 3, iclass 17, count 2 2006.229.13:33:45.37#ibcon#read 3, iclass 17, count 2 2006.229.13:33:45.37#ibcon#about to read 4, iclass 17, count 2 2006.229.13:33:45.37#ibcon#read 4, iclass 17, count 2 2006.229.13:33:45.37#ibcon#about to read 5, iclass 17, count 2 2006.229.13:33:45.37#ibcon#read 5, iclass 17, count 2 2006.229.13:33:45.37#ibcon#about to read 6, iclass 17, count 2 2006.229.13:33:45.37#ibcon#read 6, iclass 17, count 2 2006.229.13:33:45.37#ibcon#end of sib2, iclass 17, count 2 2006.229.13:33:45.37#ibcon#*after write, iclass 17, count 2 2006.229.13:33:45.37#ibcon#*before return 0, iclass 17, count 2 2006.229.13:33:45.37#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:45.37#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:45.37#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.13:33:45.37#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:45.37#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:45.49#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:45.49#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:45.49#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:33:45.49#ibcon#first serial, iclass 17, count 0 2006.229.13:33:45.49#ibcon#enter sib2, iclass 17, count 0 2006.229.13:33:45.49#ibcon#flushed, iclass 17, count 0 2006.229.13:33:45.49#ibcon#about to write, iclass 17, count 0 2006.229.13:33:45.49#ibcon#wrote, iclass 17, count 0 2006.229.13:33:45.49#ibcon#about to read 3, iclass 17, count 0 2006.229.13:33:45.51#ibcon#read 3, iclass 17, count 0 2006.229.13:33:45.51#ibcon#about to read 4, iclass 17, count 0 2006.229.13:33:45.51#ibcon#read 4, iclass 17, count 0 2006.229.13:33:45.51#ibcon#about to read 5, iclass 17, count 0 2006.229.13:33:45.51#ibcon#read 5, iclass 17, count 0 2006.229.13:33:45.51#ibcon#about to read 6, iclass 17, count 0 2006.229.13:33:45.51#ibcon#read 6, iclass 17, count 0 2006.229.13:33:45.51#ibcon#end of sib2, iclass 17, count 0 2006.229.13:33:45.51#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:33:45.51#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:33:45.51#ibcon#[25=USB\r\n] 2006.229.13:33:45.51#ibcon#*before write, iclass 17, count 0 2006.229.13:33:45.51#ibcon#enter sib2, iclass 17, count 0 2006.229.13:33:45.51#ibcon#flushed, iclass 17, count 0 2006.229.13:33:45.51#ibcon#about to write, iclass 17, count 0 2006.229.13:33:45.51#ibcon#wrote, iclass 17, count 0 2006.229.13:33:45.51#ibcon#about to read 3, iclass 17, count 0 2006.229.13:33:45.54#ibcon#read 3, iclass 17, count 0 2006.229.13:33:45.54#ibcon#about to read 4, iclass 17, count 0 2006.229.13:33:45.54#ibcon#read 4, iclass 17, count 0 2006.229.13:33:45.54#ibcon#about to read 5, iclass 17, count 0 2006.229.13:33:45.54#ibcon#read 5, iclass 17, count 0 2006.229.13:33:45.54#ibcon#about to read 6, iclass 17, count 0 2006.229.13:33:45.54#ibcon#read 6, iclass 17, count 0 2006.229.13:33:45.54#ibcon#end of sib2, iclass 17, count 0 2006.229.13:33:45.54#ibcon#*after write, iclass 17, count 0 2006.229.13:33:45.54#ibcon#*before return 0, iclass 17, count 0 2006.229.13:33:45.54#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:45.54#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:45.54#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:33:45.54#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:33:45.55$vck44/valo=2,534.99 2006.229.13:33:45.55#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:33:45.55#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:33:45.55#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:45.55#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:45.55#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:45.55#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:45.55#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:33:45.55#ibcon#first serial, iclass 19, count 0 2006.229.13:33:45.55#ibcon#enter sib2, iclass 19, count 0 2006.229.13:33:45.55#ibcon#flushed, iclass 19, count 0 2006.229.13:33:45.55#ibcon#about to write, iclass 19, count 0 2006.229.13:33:45.55#ibcon#wrote, iclass 19, count 0 2006.229.13:33:45.55#ibcon#about to read 3, iclass 19, count 0 2006.229.13:33:45.56#ibcon#read 3, iclass 19, count 0 2006.229.13:33:45.56#ibcon#about to read 4, iclass 19, count 0 2006.229.13:33:45.56#ibcon#read 4, iclass 19, count 0 2006.229.13:33:45.56#ibcon#about to read 5, iclass 19, count 0 2006.229.13:33:45.56#ibcon#read 5, iclass 19, count 0 2006.229.13:33:45.56#ibcon#about to read 6, iclass 19, count 0 2006.229.13:33:45.56#ibcon#read 6, iclass 19, count 0 2006.229.13:33:45.56#ibcon#end of sib2, iclass 19, count 0 2006.229.13:33:45.56#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:33:45.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:33:45.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:33:45.56#ibcon#*before write, iclass 19, count 0 2006.229.13:33:45.56#ibcon#enter sib2, iclass 19, count 0 2006.229.13:33:45.56#ibcon#flushed, iclass 19, count 0 2006.229.13:33:45.56#ibcon#about to write, iclass 19, count 0 2006.229.13:33:45.56#ibcon#wrote, iclass 19, count 0 2006.229.13:33:45.56#ibcon#about to read 3, iclass 19, count 0 2006.229.13:33:45.60#ibcon#read 3, iclass 19, count 0 2006.229.13:33:45.60#ibcon#about to read 4, iclass 19, count 0 2006.229.13:33:45.60#ibcon#read 4, iclass 19, count 0 2006.229.13:33:45.60#ibcon#about to read 5, iclass 19, count 0 2006.229.13:33:45.60#ibcon#read 5, iclass 19, count 0 2006.229.13:33:45.60#ibcon#about to read 6, iclass 19, count 0 2006.229.13:33:45.60#ibcon#read 6, iclass 19, count 0 2006.229.13:33:45.60#ibcon#end of sib2, iclass 19, count 0 2006.229.13:33:45.60#ibcon#*after write, iclass 19, count 0 2006.229.13:33:45.60#ibcon#*before return 0, iclass 19, count 0 2006.229.13:33:45.60#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:45.60#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:45.60#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:33:45.60#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:33:45.61$vck44/va=2,7 2006.229.13:33:45.61#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:33:45.61#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:33:45.61#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:45.61#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:45.65#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:45.65#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:45.65#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:33:45.65#ibcon#first serial, iclass 21, count 2 2006.229.13:33:45.65#ibcon#enter sib2, iclass 21, count 2 2006.229.13:33:45.65#ibcon#flushed, iclass 21, count 2 2006.229.13:33:45.65#ibcon#about to write, iclass 21, count 2 2006.229.13:33:45.65#ibcon#wrote, iclass 21, count 2 2006.229.13:33:45.65#ibcon#about to read 3, iclass 21, count 2 2006.229.13:33:45.67#ibcon#read 3, iclass 21, count 2 2006.229.13:33:45.67#ibcon#about to read 4, iclass 21, count 2 2006.229.13:33:45.67#ibcon#read 4, iclass 21, count 2 2006.229.13:33:45.67#ibcon#about to read 5, iclass 21, count 2 2006.229.13:33:45.67#ibcon#read 5, iclass 21, count 2 2006.229.13:33:45.67#ibcon#about to read 6, iclass 21, count 2 2006.229.13:33:45.67#ibcon#read 6, iclass 21, count 2 2006.229.13:33:45.67#ibcon#end of sib2, iclass 21, count 2 2006.229.13:33:45.67#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:33:45.67#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:33:45.67#ibcon#[25=AT02-07\r\n] 2006.229.13:33:45.67#ibcon#*before write, iclass 21, count 2 2006.229.13:33:45.67#ibcon#enter sib2, iclass 21, count 2 2006.229.13:33:45.67#ibcon#flushed, iclass 21, count 2 2006.229.13:33:45.67#ibcon#about to write, iclass 21, count 2 2006.229.13:33:45.67#ibcon#wrote, iclass 21, count 2 2006.229.13:33:45.67#ibcon#about to read 3, iclass 21, count 2 2006.229.13:33:45.70#ibcon#read 3, iclass 21, count 2 2006.229.13:33:45.70#ibcon#about to read 4, iclass 21, count 2 2006.229.13:33:45.70#ibcon#read 4, iclass 21, count 2 2006.229.13:33:45.70#ibcon#about to read 5, iclass 21, count 2 2006.229.13:33:45.70#ibcon#read 5, iclass 21, count 2 2006.229.13:33:45.70#ibcon#about to read 6, iclass 21, count 2 2006.229.13:33:45.70#ibcon#read 6, iclass 21, count 2 2006.229.13:33:45.70#ibcon#end of sib2, iclass 21, count 2 2006.229.13:33:45.70#ibcon#*after write, iclass 21, count 2 2006.229.13:33:45.70#ibcon#*before return 0, iclass 21, count 2 2006.229.13:33:45.70#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:45.70#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:45.70#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:33:45.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:45.70#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:45.82#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:45.82#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:45.82#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:33:45.82#ibcon#first serial, iclass 21, count 0 2006.229.13:33:45.82#ibcon#enter sib2, iclass 21, count 0 2006.229.13:33:45.82#ibcon#flushed, iclass 21, count 0 2006.229.13:33:45.82#ibcon#about to write, iclass 21, count 0 2006.229.13:33:45.82#ibcon#wrote, iclass 21, count 0 2006.229.13:33:45.82#ibcon#about to read 3, iclass 21, count 0 2006.229.13:33:45.84#ibcon#read 3, iclass 21, count 0 2006.229.13:33:45.84#ibcon#about to read 4, iclass 21, count 0 2006.229.13:33:45.84#ibcon#read 4, iclass 21, count 0 2006.229.13:33:45.84#ibcon#about to read 5, iclass 21, count 0 2006.229.13:33:45.84#ibcon#read 5, iclass 21, count 0 2006.229.13:33:45.84#ibcon#about to read 6, iclass 21, count 0 2006.229.13:33:45.84#ibcon#read 6, iclass 21, count 0 2006.229.13:33:45.84#ibcon#end of sib2, iclass 21, count 0 2006.229.13:33:45.84#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:33:45.84#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:33:45.84#ibcon#[25=USB\r\n] 2006.229.13:33:45.84#ibcon#*before write, iclass 21, count 0 2006.229.13:33:45.84#ibcon#enter sib2, iclass 21, count 0 2006.229.13:33:45.84#ibcon#flushed, iclass 21, count 0 2006.229.13:33:45.84#ibcon#about to write, iclass 21, count 0 2006.229.13:33:45.84#ibcon#wrote, iclass 21, count 0 2006.229.13:33:45.84#ibcon#about to read 3, iclass 21, count 0 2006.229.13:33:45.87#ibcon#read 3, iclass 21, count 0 2006.229.13:33:45.87#ibcon#about to read 4, iclass 21, count 0 2006.229.13:33:45.87#ibcon#read 4, iclass 21, count 0 2006.229.13:33:45.87#ibcon#about to read 5, iclass 21, count 0 2006.229.13:33:45.87#ibcon#read 5, iclass 21, count 0 2006.229.13:33:45.87#ibcon#about to read 6, iclass 21, count 0 2006.229.13:33:45.87#ibcon#read 6, iclass 21, count 0 2006.229.13:33:45.87#ibcon#end of sib2, iclass 21, count 0 2006.229.13:33:45.87#ibcon#*after write, iclass 21, count 0 2006.229.13:33:45.87#ibcon#*before return 0, iclass 21, count 0 2006.229.13:33:45.87#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:45.87#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:45.87#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:33:45.87#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:33:45.87$vck44/valo=3,564.99 2006.229.13:33:45.88#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:33:45.88#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:33:45.88#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:45.88#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:45.88#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:45.88#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:45.88#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:33:45.88#ibcon#first serial, iclass 23, count 0 2006.229.13:33:45.88#ibcon#enter sib2, iclass 23, count 0 2006.229.13:33:45.88#ibcon#flushed, iclass 23, count 0 2006.229.13:33:45.88#ibcon#about to write, iclass 23, count 0 2006.229.13:33:45.88#ibcon#wrote, iclass 23, count 0 2006.229.13:33:45.88#ibcon#about to read 3, iclass 23, count 0 2006.229.13:33:45.89#ibcon#read 3, iclass 23, count 0 2006.229.13:33:45.89#ibcon#about to read 4, iclass 23, count 0 2006.229.13:33:45.89#ibcon#read 4, iclass 23, count 0 2006.229.13:33:45.89#ibcon#about to read 5, iclass 23, count 0 2006.229.13:33:45.89#ibcon#read 5, iclass 23, count 0 2006.229.13:33:45.89#ibcon#about to read 6, iclass 23, count 0 2006.229.13:33:45.89#ibcon#read 6, iclass 23, count 0 2006.229.13:33:45.89#ibcon#end of sib2, iclass 23, count 0 2006.229.13:33:45.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:33:45.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:33:45.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:33:45.89#ibcon#*before write, iclass 23, count 0 2006.229.13:33:45.89#ibcon#enter sib2, iclass 23, count 0 2006.229.13:33:45.89#ibcon#flushed, iclass 23, count 0 2006.229.13:33:45.89#ibcon#about to write, iclass 23, count 0 2006.229.13:33:45.89#ibcon#wrote, iclass 23, count 0 2006.229.13:33:45.89#ibcon#about to read 3, iclass 23, count 0 2006.229.13:33:45.93#ibcon#read 3, iclass 23, count 0 2006.229.13:33:45.93#ibcon#about to read 4, iclass 23, count 0 2006.229.13:33:45.93#ibcon#read 4, iclass 23, count 0 2006.229.13:33:45.93#ibcon#about to read 5, iclass 23, count 0 2006.229.13:33:45.93#ibcon#read 5, iclass 23, count 0 2006.229.13:33:45.93#ibcon#about to read 6, iclass 23, count 0 2006.229.13:33:45.93#ibcon#read 6, iclass 23, count 0 2006.229.13:33:45.93#ibcon#end of sib2, iclass 23, count 0 2006.229.13:33:45.93#ibcon#*after write, iclass 23, count 0 2006.229.13:33:45.93#ibcon#*before return 0, iclass 23, count 0 2006.229.13:33:45.93#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:45.93#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:45.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:33:45.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:33:45.94$vck44/va=3,6 2006.229.13:33:45.94#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:33:45.94#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:33:45.94#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:45.94#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:45.98#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:45.98#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:45.98#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:33:45.98#ibcon#first serial, iclass 25, count 2 2006.229.13:33:45.98#ibcon#enter sib2, iclass 25, count 2 2006.229.13:33:45.98#ibcon#flushed, iclass 25, count 2 2006.229.13:33:45.98#ibcon#about to write, iclass 25, count 2 2006.229.13:33:45.98#ibcon#wrote, iclass 25, count 2 2006.229.13:33:45.98#ibcon#about to read 3, iclass 25, count 2 2006.229.13:33:46.00#ibcon#read 3, iclass 25, count 2 2006.229.13:33:46.00#ibcon#about to read 4, iclass 25, count 2 2006.229.13:33:46.00#ibcon#read 4, iclass 25, count 2 2006.229.13:33:46.00#ibcon#about to read 5, iclass 25, count 2 2006.229.13:33:46.00#ibcon#read 5, iclass 25, count 2 2006.229.13:33:46.00#ibcon#about to read 6, iclass 25, count 2 2006.229.13:33:46.00#ibcon#read 6, iclass 25, count 2 2006.229.13:33:46.00#ibcon#end of sib2, iclass 25, count 2 2006.229.13:33:46.00#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:33:46.00#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:33:46.00#ibcon#[25=AT03-06\r\n] 2006.229.13:33:46.00#ibcon#*before write, iclass 25, count 2 2006.229.13:33:46.00#ibcon#enter sib2, iclass 25, count 2 2006.229.13:33:46.00#ibcon#flushed, iclass 25, count 2 2006.229.13:33:46.00#ibcon#about to write, iclass 25, count 2 2006.229.13:33:46.00#ibcon#wrote, iclass 25, count 2 2006.229.13:33:46.00#ibcon#about to read 3, iclass 25, count 2 2006.229.13:33:46.03#ibcon#read 3, iclass 25, count 2 2006.229.13:33:46.03#ibcon#about to read 4, iclass 25, count 2 2006.229.13:33:46.03#ibcon#read 4, iclass 25, count 2 2006.229.13:33:46.03#ibcon#about to read 5, iclass 25, count 2 2006.229.13:33:46.03#ibcon#read 5, iclass 25, count 2 2006.229.13:33:46.03#ibcon#about to read 6, iclass 25, count 2 2006.229.13:33:46.03#ibcon#read 6, iclass 25, count 2 2006.229.13:33:46.03#ibcon#end of sib2, iclass 25, count 2 2006.229.13:33:46.03#ibcon#*after write, iclass 25, count 2 2006.229.13:33:46.03#ibcon#*before return 0, iclass 25, count 2 2006.229.13:33:46.03#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:46.03#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:46.03#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:33:46.03#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:46.03#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:46.15#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:46.15#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:46.15#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:33:46.15#ibcon#first serial, iclass 25, count 0 2006.229.13:33:46.15#ibcon#enter sib2, iclass 25, count 0 2006.229.13:33:46.15#ibcon#flushed, iclass 25, count 0 2006.229.13:33:46.15#ibcon#about to write, iclass 25, count 0 2006.229.13:33:46.15#ibcon#wrote, iclass 25, count 0 2006.229.13:33:46.15#ibcon#about to read 3, iclass 25, count 0 2006.229.13:33:46.17#ibcon#read 3, iclass 25, count 0 2006.229.13:33:46.17#ibcon#about to read 4, iclass 25, count 0 2006.229.13:33:46.17#ibcon#read 4, iclass 25, count 0 2006.229.13:33:46.17#ibcon#about to read 5, iclass 25, count 0 2006.229.13:33:46.17#ibcon#read 5, iclass 25, count 0 2006.229.13:33:46.17#ibcon#about to read 6, iclass 25, count 0 2006.229.13:33:46.17#ibcon#read 6, iclass 25, count 0 2006.229.13:33:46.17#ibcon#end of sib2, iclass 25, count 0 2006.229.13:33:46.17#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:33:46.17#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:33:46.17#ibcon#[25=USB\r\n] 2006.229.13:33:46.17#ibcon#*before write, iclass 25, count 0 2006.229.13:33:46.17#ibcon#enter sib2, iclass 25, count 0 2006.229.13:33:46.17#ibcon#flushed, iclass 25, count 0 2006.229.13:33:46.17#ibcon#about to write, iclass 25, count 0 2006.229.13:33:46.17#ibcon#wrote, iclass 25, count 0 2006.229.13:33:46.17#ibcon#about to read 3, iclass 25, count 0 2006.229.13:33:46.20#ibcon#read 3, iclass 25, count 0 2006.229.13:33:46.20#ibcon#about to read 4, iclass 25, count 0 2006.229.13:33:46.20#ibcon#read 4, iclass 25, count 0 2006.229.13:33:46.20#ibcon#about to read 5, iclass 25, count 0 2006.229.13:33:46.20#ibcon#read 5, iclass 25, count 0 2006.229.13:33:46.20#ibcon#about to read 6, iclass 25, count 0 2006.229.13:33:46.20#ibcon#read 6, iclass 25, count 0 2006.229.13:33:46.20#ibcon#end of sib2, iclass 25, count 0 2006.229.13:33:46.20#ibcon#*after write, iclass 25, count 0 2006.229.13:33:46.20#ibcon#*before return 0, iclass 25, count 0 2006.229.13:33:46.20#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:46.20#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:46.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:33:46.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:33:46.21$vck44/valo=4,624.99 2006.229.13:33:46.21#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:33:46.21#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:33:46.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:46.21#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:46.21#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:46.21#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:46.21#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:33:46.21#ibcon#first serial, iclass 27, count 0 2006.229.13:33:46.21#ibcon#enter sib2, iclass 27, count 0 2006.229.13:33:46.21#ibcon#flushed, iclass 27, count 0 2006.229.13:33:46.21#ibcon#about to write, iclass 27, count 0 2006.229.13:33:46.21#ibcon#wrote, iclass 27, count 0 2006.229.13:33:46.21#ibcon#about to read 3, iclass 27, count 0 2006.229.13:33:46.22#ibcon#read 3, iclass 27, count 0 2006.229.13:33:46.22#ibcon#about to read 4, iclass 27, count 0 2006.229.13:33:46.22#ibcon#read 4, iclass 27, count 0 2006.229.13:33:46.22#ibcon#about to read 5, iclass 27, count 0 2006.229.13:33:46.22#ibcon#read 5, iclass 27, count 0 2006.229.13:33:46.22#ibcon#about to read 6, iclass 27, count 0 2006.229.13:33:46.22#ibcon#read 6, iclass 27, count 0 2006.229.13:33:46.22#ibcon#end of sib2, iclass 27, count 0 2006.229.13:33:46.22#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:33:46.22#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:33:46.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:33:46.22#ibcon#*before write, iclass 27, count 0 2006.229.13:33:46.22#ibcon#enter sib2, iclass 27, count 0 2006.229.13:33:46.22#ibcon#flushed, iclass 27, count 0 2006.229.13:33:46.22#ibcon#about to write, iclass 27, count 0 2006.229.13:33:46.22#ibcon#wrote, iclass 27, count 0 2006.229.13:33:46.22#ibcon#about to read 3, iclass 27, count 0 2006.229.13:33:46.26#ibcon#read 3, iclass 27, count 0 2006.229.13:33:46.26#ibcon#about to read 4, iclass 27, count 0 2006.229.13:33:46.26#ibcon#read 4, iclass 27, count 0 2006.229.13:33:46.26#ibcon#about to read 5, iclass 27, count 0 2006.229.13:33:46.26#ibcon#read 5, iclass 27, count 0 2006.229.13:33:46.26#ibcon#about to read 6, iclass 27, count 0 2006.229.13:33:46.26#ibcon#read 6, iclass 27, count 0 2006.229.13:33:46.26#ibcon#end of sib2, iclass 27, count 0 2006.229.13:33:46.26#ibcon#*after write, iclass 27, count 0 2006.229.13:33:46.26#ibcon#*before return 0, iclass 27, count 0 2006.229.13:33:46.26#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:46.26#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:46.26#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:33:46.26#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:33:46.27$vck44/va=4,7 2006.229.13:33:46.27#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:33:46.27#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:33:46.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:46.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:46.31#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:46.31#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:46.31#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:33:46.31#ibcon#first serial, iclass 29, count 2 2006.229.13:33:46.31#ibcon#enter sib2, iclass 29, count 2 2006.229.13:33:46.31#ibcon#flushed, iclass 29, count 2 2006.229.13:33:46.31#ibcon#about to write, iclass 29, count 2 2006.229.13:33:46.31#ibcon#wrote, iclass 29, count 2 2006.229.13:33:46.31#ibcon#about to read 3, iclass 29, count 2 2006.229.13:33:46.33#ibcon#read 3, iclass 29, count 2 2006.229.13:33:46.33#ibcon#about to read 4, iclass 29, count 2 2006.229.13:33:46.33#ibcon#read 4, iclass 29, count 2 2006.229.13:33:46.33#ibcon#about to read 5, iclass 29, count 2 2006.229.13:33:46.33#ibcon#read 5, iclass 29, count 2 2006.229.13:33:46.33#ibcon#about to read 6, iclass 29, count 2 2006.229.13:33:46.33#ibcon#read 6, iclass 29, count 2 2006.229.13:33:46.33#ibcon#end of sib2, iclass 29, count 2 2006.229.13:33:46.33#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:33:46.33#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:33:46.33#ibcon#[25=AT04-07\r\n] 2006.229.13:33:46.33#ibcon#*before write, iclass 29, count 2 2006.229.13:33:46.33#ibcon#enter sib2, iclass 29, count 2 2006.229.13:33:46.33#ibcon#flushed, iclass 29, count 2 2006.229.13:33:46.33#ibcon#about to write, iclass 29, count 2 2006.229.13:33:46.33#ibcon#wrote, iclass 29, count 2 2006.229.13:33:46.33#ibcon#about to read 3, iclass 29, count 2 2006.229.13:33:46.36#ibcon#read 3, iclass 29, count 2 2006.229.13:33:46.36#ibcon#about to read 4, iclass 29, count 2 2006.229.13:33:46.36#ibcon#read 4, iclass 29, count 2 2006.229.13:33:46.36#ibcon#about to read 5, iclass 29, count 2 2006.229.13:33:46.36#ibcon#read 5, iclass 29, count 2 2006.229.13:33:46.36#ibcon#about to read 6, iclass 29, count 2 2006.229.13:33:46.36#ibcon#read 6, iclass 29, count 2 2006.229.13:33:46.36#ibcon#end of sib2, iclass 29, count 2 2006.229.13:33:46.36#ibcon#*after write, iclass 29, count 2 2006.229.13:33:46.41#ibcon#*before return 0, iclass 29, count 2 2006.229.13:33:46.41#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:46.41#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:46.41#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:33:46.41#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:46.41#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:46.53#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:46.53#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:46.53#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:33:46.53#ibcon#first serial, iclass 29, count 0 2006.229.13:33:46.53#ibcon#enter sib2, iclass 29, count 0 2006.229.13:33:46.53#ibcon#flushed, iclass 29, count 0 2006.229.13:33:46.53#ibcon#about to write, iclass 29, count 0 2006.229.13:33:46.53#ibcon#wrote, iclass 29, count 0 2006.229.13:33:46.53#ibcon#about to read 3, iclass 29, count 0 2006.229.13:33:46.55#ibcon#read 3, iclass 29, count 0 2006.229.13:33:46.55#ibcon#about to read 4, iclass 29, count 0 2006.229.13:33:46.55#ibcon#read 4, iclass 29, count 0 2006.229.13:33:46.55#ibcon#about to read 5, iclass 29, count 0 2006.229.13:33:46.55#ibcon#read 5, iclass 29, count 0 2006.229.13:33:46.55#ibcon#about to read 6, iclass 29, count 0 2006.229.13:33:46.55#ibcon#read 6, iclass 29, count 0 2006.229.13:33:46.55#ibcon#end of sib2, iclass 29, count 0 2006.229.13:33:46.55#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:33:46.55#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:33:46.55#ibcon#[25=USB\r\n] 2006.229.13:33:46.55#ibcon#*before write, iclass 29, count 0 2006.229.13:33:46.55#ibcon#enter sib2, iclass 29, count 0 2006.229.13:33:46.55#ibcon#flushed, iclass 29, count 0 2006.229.13:33:46.55#ibcon#about to write, iclass 29, count 0 2006.229.13:33:46.55#ibcon#wrote, iclass 29, count 0 2006.229.13:33:46.55#ibcon#about to read 3, iclass 29, count 0 2006.229.13:33:46.58#ibcon#read 3, iclass 29, count 0 2006.229.13:33:46.58#ibcon#about to read 4, iclass 29, count 0 2006.229.13:33:46.58#ibcon#read 4, iclass 29, count 0 2006.229.13:33:46.58#ibcon#about to read 5, iclass 29, count 0 2006.229.13:33:46.58#ibcon#read 5, iclass 29, count 0 2006.229.13:33:46.58#ibcon#about to read 6, iclass 29, count 0 2006.229.13:33:46.58#ibcon#read 6, iclass 29, count 0 2006.229.13:33:46.58#ibcon#end of sib2, iclass 29, count 0 2006.229.13:33:46.58#ibcon#*after write, iclass 29, count 0 2006.229.13:33:46.58#ibcon#*before return 0, iclass 29, count 0 2006.229.13:33:46.58#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:46.58#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:46.58#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:33:46.58#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:33:46.58$vck44/valo=5,734.99 2006.229.13:33:46.59#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:33:46.59#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:33:46.59#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:46.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:46.59#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:46.59#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:46.59#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:33:46.59#ibcon#first serial, iclass 31, count 0 2006.229.13:33:46.59#ibcon#enter sib2, iclass 31, count 0 2006.229.13:33:46.59#ibcon#flushed, iclass 31, count 0 2006.229.13:33:46.59#ibcon#about to write, iclass 31, count 0 2006.229.13:33:46.59#ibcon#wrote, iclass 31, count 0 2006.229.13:33:46.59#ibcon#about to read 3, iclass 31, count 0 2006.229.13:33:46.60#ibcon#read 3, iclass 31, count 0 2006.229.13:33:46.60#ibcon#about to read 4, iclass 31, count 0 2006.229.13:33:46.60#ibcon#read 4, iclass 31, count 0 2006.229.13:33:46.60#ibcon#about to read 5, iclass 31, count 0 2006.229.13:33:46.60#ibcon#read 5, iclass 31, count 0 2006.229.13:33:46.60#ibcon#about to read 6, iclass 31, count 0 2006.229.13:33:46.60#ibcon#read 6, iclass 31, count 0 2006.229.13:33:46.60#ibcon#end of sib2, iclass 31, count 0 2006.229.13:33:46.60#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:33:46.60#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:33:46.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:33:46.60#ibcon#*before write, iclass 31, count 0 2006.229.13:33:46.60#ibcon#enter sib2, iclass 31, count 0 2006.229.13:33:46.60#ibcon#flushed, iclass 31, count 0 2006.229.13:33:46.60#ibcon#about to write, iclass 31, count 0 2006.229.13:33:46.60#ibcon#wrote, iclass 31, count 0 2006.229.13:33:46.60#ibcon#about to read 3, iclass 31, count 0 2006.229.13:33:46.64#ibcon#read 3, iclass 31, count 0 2006.229.13:33:46.64#ibcon#about to read 4, iclass 31, count 0 2006.229.13:33:46.64#ibcon#read 4, iclass 31, count 0 2006.229.13:33:46.64#ibcon#about to read 5, iclass 31, count 0 2006.229.13:33:46.64#ibcon#read 5, iclass 31, count 0 2006.229.13:33:46.64#ibcon#about to read 6, iclass 31, count 0 2006.229.13:33:46.64#ibcon#read 6, iclass 31, count 0 2006.229.13:33:46.64#ibcon#end of sib2, iclass 31, count 0 2006.229.13:33:46.64#ibcon#*after write, iclass 31, count 0 2006.229.13:33:46.64#ibcon#*before return 0, iclass 31, count 0 2006.229.13:33:46.64#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:46.64#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:46.64#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:33:46.64#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:33:46.65$vck44/va=5,4 2006.229.13:33:46.65#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:33:46.65#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:33:46.65#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:46.65#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:46.69#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:46.69#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:46.69#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:33:46.69#ibcon#first serial, iclass 33, count 2 2006.229.13:33:46.69#ibcon#enter sib2, iclass 33, count 2 2006.229.13:33:46.69#ibcon#flushed, iclass 33, count 2 2006.229.13:33:46.69#ibcon#about to write, iclass 33, count 2 2006.229.13:33:46.69#ibcon#wrote, iclass 33, count 2 2006.229.13:33:46.69#ibcon#about to read 3, iclass 33, count 2 2006.229.13:33:46.71#ibcon#read 3, iclass 33, count 2 2006.229.13:33:46.71#ibcon#about to read 4, iclass 33, count 2 2006.229.13:33:46.71#ibcon#read 4, iclass 33, count 2 2006.229.13:33:46.71#ibcon#about to read 5, iclass 33, count 2 2006.229.13:33:46.71#ibcon#read 5, iclass 33, count 2 2006.229.13:33:46.71#ibcon#about to read 6, iclass 33, count 2 2006.229.13:33:46.71#ibcon#read 6, iclass 33, count 2 2006.229.13:33:46.71#ibcon#end of sib2, iclass 33, count 2 2006.229.13:33:46.71#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:33:46.71#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:33:46.71#ibcon#[25=AT05-04\r\n] 2006.229.13:33:46.71#ibcon#*before write, iclass 33, count 2 2006.229.13:33:46.71#ibcon#enter sib2, iclass 33, count 2 2006.229.13:33:46.71#ibcon#flushed, iclass 33, count 2 2006.229.13:33:46.71#ibcon#about to write, iclass 33, count 2 2006.229.13:33:46.71#ibcon#wrote, iclass 33, count 2 2006.229.13:33:46.71#ibcon#about to read 3, iclass 33, count 2 2006.229.13:33:46.74#ibcon#read 3, iclass 33, count 2 2006.229.13:33:46.74#ibcon#about to read 4, iclass 33, count 2 2006.229.13:33:46.74#ibcon#read 4, iclass 33, count 2 2006.229.13:33:46.74#ibcon#about to read 5, iclass 33, count 2 2006.229.13:33:46.74#ibcon#read 5, iclass 33, count 2 2006.229.13:33:46.74#ibcon#about to read 6, iclass 33, count 2 2006.229.13:33:46.74#ibcon#read 6, iclass 33, count 2 2006.229.13:33:46.74#ibcon#end of sib2, iclass 33, count 2 2006.229.13:33:46.74#ibcon#*after write, iclass 33, count 2 2006.229.13:33:46.74#ibcon#*before return 0, iclass 33, count 2 2006.229.13:33:46.74#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:46.74#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:46.74#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:33:46.74#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:46.74#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:46.86#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:46.86#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:46.86#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:33:46.86#ibcon#first serial, iclass 33, count 0 2006.229.13:33:46.86#ibcon#enter sib2, iclass 33, count 0 2006.229.13:33:46.86#ibcon#flushed, iclass 33, count 0 2006.229.13:33:46.86#ibcon#about to write, iclass 33, count 0 2006.229.13:33:46.86#ibcon#wrote, iclass 33, count 0 2006.229.13:33:46.86#ibcon#about to read 3, iclass 33, count 0 2006.229.13:33:46.88#ibcon#read 3, iclass 33, count 0 2006.229.13:33:46.88#ibcon#about to read 4, iclass 33, count 0 2006.229.13:33:46.88#ibcon#read 4, iclass 33, count 0 2006.229.13:33:46.88#ibcon#about to read 5, iclass 33, count 0 2006.229.13:33:46.88#ibcon#read 5, iclass 33, count 0 2006.229.13:33:46.88#ibcon#about to read 6, iclass 33, count 0 2006.229.13:33:46.88#ibcon#read 6, iclass 33, count 0 2006.229.13:33:46.88#ibcon#end of sib2, iclass 33, count 0 2006.229.13:33:46.88#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:33:46.88#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:33:46.88#ibcon#[25=USB\r\n] 2006.229.13:33:46.88#ibcon#*before write, iclass 33, count 0 2006.229.13:33:46.88#ibcon#enter sib2, iclass 33, count 0 2006.229.13:33:46.88#ibcon#flushed, iclass 33, count 0 2006.229.13:33:46.88#ibcon#about to write, iclass 33, count 0 2006.229.13:33:46.88#ibcon#wrote, iclass 33, count 0 2006.229.13:33:46.88#ibcon#about to read 3, iclass 33, count 0 2006.229.13:33:46.91#ibcon#read 3, iclass 33, count 0 2006.229.13:33:46.91#ibcon#about to read 4, iclass 33, count 0 2006.229.13:33:46.91#ibcon#read 4, iclass 33, count 0 2006.229.13:33:46.91#ibcon#about to read 5, iclass 33, count 0 2006.229.13:33:46.91#ibcon#read 5, iclass 33, count 0 2006.229.13:33:46.91#ibcon#about to read 6, iclass 33, count 0 2006.229.13:33:46.91#ibcon#read 6, iclass 33, count 0 2006.229.13:33:46.91#ibcon#end of sib2, iclass 33, count 0 2006.229.13:33:46.91#ibcon#*after write, iclass 33, count 0 2006.229.13:33:46.91#ibcon#*before return 0, iclass 33, count 0 2006.229.13:33:46.91#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:46.91#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:46.91#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:33:46.91#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:33:46.91$vck44/valo=6,814.99 2006.229.13:33:46.92#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:33:46.92#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:33:46.92#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:46.92#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:46.92#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:46.92#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:46.92#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:33:46.92#ibcon#first serial, iclass 35, count 0 2006.229.13:33:46.92#ibcon#enter sib2, iclass 35, count 0 2006.229.13:33:46.92#ibcon#flushed, iclass 35, count 0 2006.229.13:33:46.92#ibcon#about to write, iclass 35, count 0 2006.229.13:33:46.92#ibcon#wrote, iclass 35, count 0 2006.229.13:33:46.92#ibcon#about to read 3, iclass 35, count 0 2006.229.13:33:46.93#ibcon#read 3, iclass 35, count 0 2006.229.13:33:46.93#ibcon#about to read 4, iclass 35, count 0 2006.229.13:33:46.93#ibcon#read 4, iclass 35, count 0 2006.229.13:33:46.93#ibcon#about to read 5, iclass 35, count 0 2006.229.13:33:46.93#ibcon#read 5, iclass 35, count 0 2006.229.13:33:46.93#ibcon#about to read 6, iclass 35, count 0 2006.229.13:33:46.93#ibcon#read 6, iclass 35, count 0 2006.229.13:33:46.93#ibcon#end of sib2, iclass 35, count 0 2006.229.13:33:46.93#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:33:46.93#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:33:46.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:33:46.93#ibcon#*before write, iclass 35, count 0 2006.229.13:33:46.93#ibcon#enter sib2, iclass 35, count 0 2006.229.13:33:46.93#ibcon#flushed, iclass 35, count 0 2006.229.13:33:46.93#ibcon#about to write, iclass 35, count 0 2006.229.13:33:46.93#ibcon#wrote, iclass 35, count 0 2006.229.13:33:46.93#ibcon#about to read 3, iclass 35, count 0 2006.229.13:33:46.97#ibcon#read 3, iclass 35, count 0 2006.229.13:33:46.97#ibcon#about to read 4, iclass 35, count 0 2006.229.13:33:46.97#ibcon#read 4, iclass 35, count 0 2006.229.13:33:46.97#ibcon#about to read 5, iclass 35, count 0 2006.229.13:33:46.97#ibcon#read 5, iclass 35, count 0 2006.229.13:33:46.97#ibcon#about to read 6, iclass 35, count 0 2006.229.13:33:46.97#ibcon#read 6, iclass 35, count 0 2006.229.13:33:46.97#ibcon#end of sib2, iclass 35, count 0 2006.229.13:33:46.97#ibcon#*after write, iclass 35, count 0 2006.229.13:33:46.97#ibcon#*before return 0, iclass 35, count 0 2006.229.13:33:46.97#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:46.97#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:46.97#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:33:46.97#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:33:46.98$vck44/va=6,4 2006.229.13:33:46.98#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:33:46.98#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:33:46.98#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:46.98#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:47.02#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:47.02#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:47.02#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:33:47.02#ibcon#first serial, iclass 37, count 2 2006.229.13:33:47.02#ibcon#enter sib2, iclass 37, count 2 2006.229.13:33:47.02#ibcon#flushed, iclass 37, count 2 2006.229.13:33:47.02#ibcon#about to write, iclass 37, count 2 2006.229.13:33:47.02#ibcon#wrote, iclass 37, count 2 2006.229.13:33:47.02#ibcon#about to read 3, iclass 37, count 2 2006.229.13:33:47.04#ibcon#read 3, iclass 37, count 2 2006.229.13:33:47.04#ibcon#about to read 4, iclass 37, count 2 2006.229.13:33:47.04#ibcon#read 4, iclass 37, count 2 2006.229.13:33:47.04#ibcon#about to read 5, iclass 37, count 2 2006.229.13:33:47.04#ibcon#read 5, iclass 37, count 2 2006.229.13:33:47.04#ibcon#about to read 6, iclass 37, count 2 2006.229.13:33:47.04#ibcon#read 6, iclass 37, count 2 2006.229.13:33:47.04#ibcon#end of sib2, iclass 37, count 2 2006.229.13:33:47.04#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:33:47.04#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:33:47.04#ibcon#[25=AT06-04\r\n] 2006.229.13:33:47.04#ibcon#*before write, iclass 37, count 2 2006.229.13:33:47.04#ibcon#enter sib2, iclass 37, count 2 2006.229.13:33:47.04#ibcon#flushed, iclass 37, count 2 2006.229.13:33:47.04#ibcon#about to write, iclass 37, count 2 2006.229.13:33:47.04#ibcon#wrote, iclass 37, count 2 2006.229.13:33:47.04#ibcon#about to read 3, iclass 37, count 2 2006.229.13:33:47.07#ibcon#read 3, iclass 37, count 2 2006.229.13:33:47.07#ibcon#about to read 4, iclass 37, count 2 2006.229.13:33:47.07#ibcon#read 4, iclass 37, count 2 2006.229.13:33:47.07#ibcon#about to read 5, iclass 37, count 2 2006.229.13:33:47.07#ibcon#read 5, iclass 37, count 2 2006.229.13:33:47.07#ibcon#about to read 6, iclass 37, count 2 2006.229.13:33:47.07#ibcon#read 6, iclass 37, count 2 2006.229.13:33:47.07#ibcon#end of sib2, iclass 37, count 2 2006.229.13:33:47.07#ibcon#*after write, iclass 37, count 2 2006.229.13:33:47.07#ibcon#*before return 0, iclass 37, count 2 2006.229.13:33:47.07#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:47.07#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:47.07#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:33:47.07#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:47.07#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:47.19#abcon#<5=/04 1.7 2.6 27.561001002.1\r\n> 2006.229.13:33:47.19#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:47.19#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:47.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:33:47.19#ibcon#first serial, iclass 37, count 0 2006.229.13:33:47.19#ibcon#enter sib2, iclass 37, count 0 2006.229.13:33:47.19#ibcon#flushed, iclass 37, count 0 2006.229.13:33:47.19#ibcon#about to write, iclass 37, count 0 2006.229.13:33:47.19#ibcon#wrote, iclass 37, count 0 2006.229.13:33:47.19#ibcon#about to read 3, iclass 37, count 0 2006.229.13:33:47.21#ibcon#read 3, iclass 37, count 0 2006.229.13:33:47.21#ibcon#about to read 4, iclass 37, count 0 2006.229.13:33:47.21#ibcon#read 4, iclass 37, count 0 2006.229.13:33:47.21#ibcon#about to read 5, iclass 37, count 0 2006.229.13:33:47.21#ibcon#read 5, iclass 37, count 0 2006.229.13:33:47.21#ibcon#about to read 6, iclass 37, count 0 2006.229.13:33:47.21#ibcon#read 6, iclass 37, count 0 2006.229.13:33:47.21#ibcon#end of sib2, iclass 37, count 0 2006.229.13:33:47.21#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:33:47.21#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:33:47.21#ibcon#[25=USB\r\n] 2006.229.13:33:47.21#ibcon#*before write, iclass 37, count 0 2006.229.13:33:47.21#ibcon#enter sib2, iclass 37, count 0 2006.229.13:33:47.21#ibcon#flushed, iclass 37, count 0 2006.229.13:33:47.21#ibcon#about to write, iclass 37, count 0 2006.229.13:33:47.21#ibcon#wrote, iclass 37, count 0 2006.229.13:33:47.21#ibcon#about to read 3, iclass 37, count 0 2006.229.13:33:47.21#abcon#{5=INTERFACE CLEAR} 2006.229.13:33:47.24#ibcon#read 3, iclass 37, count 0 2006.229.13:33:47.24#ibcon#about to read 4, iclass 37, count 0 2006.229.13:33:47.24#ibcon#read 4, iclass 37, count 0 2006.229.13:33:47.24#ibcon#about to read 5, iclass 37, count 0 2006.229.13:33:47.24#ibcon#read 5, iclass 37, count 0 2006.229.13:33:47.24#ibcon#about to read 6, iclass 37, count 0 2006.229.13:33:47.24#ibcon#read 6, iclass 37, count 0 2006.229.13:33:47.24#ibcon#end of sib2, iclass 37, count 0 2006.229.13:33:47.24#ibcon#*after write, iclass 37, count 0 2006.229.13:33:47.24#ibcon#*before return 0, iclass 37, count 0 2006.229.13:33:47.24#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:47.24#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:47.24#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:33:47.24#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:33:47.25$vck44/valo=7,864.99 2006.229.13:33:47.25#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.13:33:47.25#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.13:33:47.25#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:47.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:33:47.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:33:47.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:33:47.25#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:33:47.25#ibcon#first serial, iclass 4, count 0 2006.229.13:33:47.25#ibcon#enter sib2, iclass 4, count 0 2006.229.13:33:47.25#ibcon#flushed, iclass 4, count 0 2006.229.13:33:47.25#ibcon#about to write, iclass 4, count 0 2006.229.13:33:47.25#ibcon#wrote, iclass 4, count 0 2006.229.13:33:47.25#ibcon#about to read 3, iclass 4, count 0 2006.229.13:33:47.26#ibcon#read 3, iclass 4, count 0 2006.229.13:33:47.26#ibcon#about to read 4, iclass 4, count 0 2006.229.13:33:47.26#ibcon#read 4, iclass 4, count 0 2006.229.13:33:47.26#ibcon#about to read 5, iclass 4, count 0 2006.229.13:33:47.26#ibcon#read 5, iclass 4, count 0 2006.229.13:33:47.26#ibcon#about to read 6, iclass 4, count 0 2006.229.13:33:47.26#ibcon#read 6, iclass 4, count 0 2006.229.13:33:47.26#ibcon#end of sib2, iclass 4, count 0 2006.229.13:33:47.26#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:33:47.26#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:33:47.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:33:47.26#ibcon#*before write, iclass 4, count 0 2006.229.13:33:47.26#ibcon#enter sib2, iclass 4, count 0 2006.229.13:33:47.26#ibcon#flushed, iclass 4, count 0 2006.229.13:33:47.26#ibcon#about to write, iclass 4, count 0 2006.229.13:33:47.26#ibcon#wrote, iclass 4, count 0 2006.229.13:33:47.26#ibcon#about to read 3, iclass 4, count 0 2006.229.13:33:47.27#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:33:47.30#ibcon#read 3, iclass 4, count 0 2006.229.13:33:47.30#ibcon#about to read 4, iclass 4, count 0 2006.229.13:33:47.30#ibcon#read 4, iclass 4, count 0 2006.229.13:33:47.30#ibcon#about to read 5, iclass 4, count 0 2006.229.13:33:47.30#ibcon#read 5, iclass 4, count 0 2006.229.13:33:47.30#ibcon#about to read 6, iclass 4, count 0 2006.229.13:33:47.30#ibcon#read 6, iclass 4, count 0 2006.229.13:33:47.30#ibcon#end of sib2, iclass 4, count 0 2006.229.13:33:47.30#ibcon#*after write, iclass 4, count 0 2006.229.13:33:47.30#ibcon#*before return 0, iclass 4, count 0 2006.229.13:33:47.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:33:47.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:33:47.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:33:47.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:33:47.31$vck44/va=7,5 2006.229.13:33:47.31#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:33:47.31#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:33:47.31#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:47.31#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:47.35#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:47.35#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:47.35#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:33:47.35#ibcon#first serial, iclass 7, count 2 2006.229.13:33:47.35#ibcon#enter sib2, iclass 7, count 2 2006.229.13:33:47.35#ibcon#flushed, iclass 7, count 2 2006.229.13:33:47.35#ibcon#about to write, iclass 7, count 2 2006.229.13:33:47.35#ibcon#wrote, iclass 7, count 2 2006.229.13:33:47.35#ibcon#about to read 3, iclass 7, count 2 2006.229.13:33:47.37#ibcon#read 3, iclass 7, count 2 2006.229.13:33:47.37#ibcon#about to read 4, iclass 7, count 2 2006.229.13:33:47.37#ibcon#read 4, iclass 7, count 2 2006.229.13:33:47.37#ibcon#about to read 5, iclass 7, count 2 2006.229.13:33:47.37#ibcon#read 5, iclass 7, count 2 2006.229.13:33:47.37#ibcon#about to read 6, iclass 7, count 2 2006.229.13:33:47.37#ibcon#read 6, iclass 7, count 2 2006.229.13:33:47.37#ibcon#end of sib2, iclass 7, count 2 2006.229.13:33:47.37#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:33:47.37#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:33:47.37#ibcon#[25=AT07-05\r\n] 2006.229.13:33:47.37#ibcon#*before write, iclass 7, count 2 2006.229.13:33:47.37#ibcon#enter sib2, iclass 7, count 2 2006.229.13:33:47.37#ibcon#flushed, iclass 7, count 2 2006.229.13:33:47.37#ibcon#about to write, iclass 7, count 2 2006.229.13:33:47.37#ibcon#wrote, iclass 7, count 2 2006.229.13:33:47.37#ibcon#about to read 3, iclass 7, count 2 2006.229.13:33:47.40#ibcon#read 3, iclass 7, count 2 2006.229.13:33:47.40#ibcon#about to read 4, iclass 7, count 2 2006.229.13:33:47.40#ibcon#read 4, iclass 7, count 2 2006.229.13:33:47.40#ibcon#about to read 5, iclass 7, count 2 2006.229.13:33:47.40#ibcon#read 5, iclass 7, count 2 2006.229.13:33:47.40#ibcon#about to read 6, iclass 7, count 2 2006.229.13:33:47.40#ibcon#read 6, iclass 7, count 2 2006.229.13:33:47.40#ibcon#end of sib2, iclass 7, count 2 2006.229.13:33:47.40#ibcon#*after write, iclass 7, count 2 2006.229.13:33:47.40#ibcon#*before return 0, iclass 7, count 2 2006.229.13:33:47.40#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:47.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:47.40#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:33:47.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:47.40#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:47.52#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:47.52#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:47.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:33:47.52#ibcon#first serial, iclass 7, count 0 2006.229.13:33:47.52#ibcon#enter sib2, iclass 7, count 0 2006.229.13:33:47.52#ibcon#flushed, iclass 7, count 0 2006.229.13:33:47.52#ibcon#about to write, iclass 7, count 0 2006.229.13:33:47.52#ibcon#wrote, iclass 7, count 0 2006.229.13:33:47.52#ibcon#about to read 3, iclass 7, count 0 2006.229.13:33:47.54#ibcon#read 3, iclass 7, count 0 2006.229.13:33:47.54#ibcon#about to read 4, iclass 7, count 0 2006.229.13:33:47.54#ibcon#read 4, iclass 7, count 0 2006.229.13:33:47.54#ibcon#about to read 5, iclass 7, count 0 2006.229.13:33:47.54#ibcon#read 5, iclass 7, count 0 2006.229.13:33:47.54#ibcon#about to read 6, iclass 7, count 0 2006.229.13:33:47.54#ibcon#read 6, iclass 7, count 0 2006.229.13:33:47.54#ibcon#end of sib2, iclass 7, count 0 2006.229.13:33:47.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:33:47.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:33:47.54#ibcon#[25=USB\r\n] 2006.229.13:33:47.54#ibcon#*before write, iclass 7, count 0 2006.229.13:33:47.54#ibcon#enter sib2, iclass 7, count 0 2006.229.13:33:47.54#ibcon#flushed, iclass 7, count 0 2006.229.13:33:47.54#ibcon#about to write, iclass 7, count 0 2006.229.13:33:47.54#ibcon#wrote, iclass 7, count 0 2006.229.13:33:47.54#ibcon#about to read 3, iclass 7, count 0 2006.229.13:33:47.57#ibcon#read 3, iclass 7, count 0 2006.229.13:33:47.57#ibcon#about to read 4, iclass 7, count 0 2006.229.13:33:47.57#ibcon#read 4, iclass 7, count 0 2006.229.13:33:47.57#ibcon#about to read 5, iclass 7, count 0 2006.229.13:33:47.57#ibcon#read 5, iclass 7, count 0 2006.229.13:33:47.57#ibcon#about to read 6, iclass 7, count 0 2006.229.13:33:47.57#ibcon#read 6, iclass 7, count 0 2006.229.13:33:47.57#ibcon#end of sib2, iclass 7, count 0 2006.229.13:33:47.57#ibcon#*after write, iclass 7, count 0 2006.229.13:33:47.57#ibcon#*before return 0, iclass 7, count 0 2006.229.13:33:47.57#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:47.57#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:47.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:33:47.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:33:47.58$vck44/valo=8,884.99 2006.229.13:33:47.58#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:33:47.58#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:33:47.58#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:47.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:47.58#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:47.58#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:47.58#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:33:47.58#ibcon#first serial, iclass 11, count 0 2006.229.13:33:47.58#ibcon#enter sib2, iclass 11, count 0 2006.229.13:33:47.58#ibcon#flushed, iclass 11, count 0 2006.229.13:33:47.58#ibcon#about to write, iclass 11, count 0 2006.229.13:33:47.58#ibcon#wrote, iclass 11, count 0 2006.229.13:33:47.58#ibcon#about to read 3, iclass 11, count 0 2006.229.13:33:47.59#ibcon#read 3, iclass 11, count 0 2006.229.13:33:47.59#ibcon#about to read 4, iclass 11, count 0 2006.229.13:33:47.59#ibcon#read 4, iclass 11, count 0 2006.229.13:33:47.59#ibcon#about to read 5, iclass 11, count 0 2006.229.13:33:47.59#ibcon#read 5, iclass 11, count 0 2006.229.13:33:47.59#ibcon#about to read 6, iclass 11, count 0 2006.229.13:33:47.59#ibcon#read 6, iclass 11, count 0 2006.229.13:33:47.59#ibcon#end of sib2, iclass 11, count 0 2006.229.13:33:47.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:33:47.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:33:47.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:33:47.59#ibcon#*before write, iclass 11, count 0 2006.229.13:33:47.59#ibcon#enter sib2, iclass 11, count 0 2006.229.13:33:47.59#ibcon#flushed, iclass 11, count 0 2006.229.13:33:47.59#ibcon#about to write, iclass 11, count 0 2006.229.13:33:47.59#ibcon#wrote, iclass 11, count 0 2006.229.13:33:47.59#ibcon#about to read 3, iclass 11, count 0 2006.229.13:33:47.63#ibcon#read 3, iclass 11, count 0 2006.229.13:33:47.63#ibcon#about to read 4, iclass 11, count 0 2006.229.13:33:47.63#ibcon#read 4, iclass 11, count 0 2006.229.13:33:47.63#ibcon#about to read 5, iclass 11, count 0 2006.229.13:33:47.63#ibcon#read 5, iclass 11, count 0 2006.229.13:33:47.63#ibcon#about to read 6, iclass 11, count 0 2006.229.13:33:47.63#ibcon#read 6, iclass 11, count 0 2006.229.13:33:47.63#ibcon#end of sib2, iclass 11, count 0 2006.229.13:33:47.63#ibcon#*after write, iclass 11, count 0 2006.229.13:33:47.63#ibcon#*before return 0, iclass 11, count 0 2006.229.13:33:47.63#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:47.63#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:47.63#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:33:47.63#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:33:47.64$vck44/va=8,6 2006.229.13:33:47.64#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.13:33:47.64#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.13:33:47.64#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:47.64#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:33:47.68#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:33:47.68#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:33:47.68#ibcon#enter wrdev, iclass 13, count 2 2006.229.13:33:47.68#ibcon#first serial, iclass 13, count 2 2006.229.13:33:47.68#ibcon#enter sib2, iclass 13, count 2 2006.229.13:33:47.68#ibcon#flushed, iclass 13, count 2 2006.229.13:33:47.68#ibcon#about to write, iclass 13, count 2 2006.229.13:33:47.68#ibcon#wrote, iclass 13, count 2 2006.229.13:33:47.68#ibcon#about to read 3, iclass 13, count 2 2006.229.13:33:47.70#ibcon#read 3, iclass 13, count 2 2006.229.13:33:47.70#ibcon#about to read 4, iclass 13, count 2 2006.229.13:33:47.70#ibcon#read 4, iclass 13, count 2 2006.229.13:33:47.70#ibcon#about to read 5, iclass 13, count 2 2006.229.13:33:47.70#ibcon#read 5, iclass 13, count 2 2006.229.13:33:47.70#ibcon#about to read 6, iclass 13, count 2 2006.229.13:33:47.70#ibcon#read 6, iclass 13, count 2 2006.229.13:33:47.70#ibcon#end of sib2, iclass 13, count 2 2006.229.13:33:47.70#ibcon#*mode == 0, iclass 13, count 2 2006.229.13:33:47.70#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.13:33:47.70#ibcon#[25=AT08-06\r\n] 2006.229.13:33:47.70#ibcon#*before write, iclass 13, count 2 2006.229.13:33:47.70#ibcon#enter sib2, iclass 13, count 2 2006.229.13:33:47.70#ibcon#flushed, iclass 13, count 2 2006.229.13:33:47.70#ibcon#about to write, iclass 13, count 2 2006.229.13:33:47.70#ibcon#wrote, iclass 13, count 2 2006.229.13:33:47.70#ibcon#about to read 3, iclass 13, count 2 2006.229.13:33:47.73#ibcon#read 3, iclass 13, count 2 2006.229.13:33:47.73#ibcon#about to read 4, iclass 13, count 2 2006.229.13:33:47.73#ibcon#read 4, iclass 13, count 2 2006.229.13:33:47.73#ibcon#about to read 5, iclass 13, count 2 2006.229.13:33:47.73#ibcon#read 5, iclass 13, count 2 2006.229.13:33:47.73#ibcon#about to read 6, iclass 13, count 2 2006.229.13:33:47.73#ibcon#read 6, iclass 13, count 2 2006.229.13:33:47.73#ibcon#end of sib2, iclass 13, count 2 2006.229.13:33:47.73#ibcon#*after write, iclass 13, count 2 2006.229.13:33:47.73#ibcon#*before return 0, iclass 13, count 2 2006.229.13:33:47.73#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:33:47.73#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:33:47.73#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.13:33:47.73#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:47.73#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:33:47.85#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:33:47.85#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:33:47.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:33:47.85#ibcon#first serial, iclass 13, count 0 2006.229.13:33:47.85#ibcon#enter sib2, iclass 13, count 0 2006.229.13:33:47.85#ibcon#flushed, iclass 13, count 0 2006.229.13:33:47.85#ibcon#about to write, iclass 13, count 0 2006.229.13:33:47.85#ibcon#wrote, iclass 13, count 0 2006.229.13:33:47.85#ibcon#about to read 3, iclass 13, count 0 2006.229.13:33:47.87#ibcon#read 3, iclass 13, count 0 2006.229.13:33:47.87#ibcon#about to read 4, iclass 13, count 0 2006.229.13:33:47.87#ibcon#read 4, iclass 13, count 0 2006.229.13:33:47.87#ibcon#about to read 5, iclass 13, count 0 2006.229.13:33:47.87#ibcon#read 5, iclass 13, count 0 2006.229.13:33:47.87#ibcon#about to read 6, iclass 13, count 0 2006.229.13:33:47.87#ibcon#read 6, iclass 13, count 0 2006.229.13:33:47.87#ibcon#end of sib2, iclass 13, count 0 2006.229.13:33:47.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:33:47.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:33:47.87#ibcon#[25=USB\r\n] 2006.229.13:33:47.87#ibcon#*before write, iclass 13, count 0 2006.229.13:33:47.87#ibcon#enter sib2, iclass 13, count 0 2006.229.13:33:47.87#ibcon#flushed, iclass 13, count 0 2006.229.13:33:47.87#ibcon#about to write, iclass 13, count 0 2006.229.13:33:47.87#ibcon#wrote, iclass 13, count 0 2006.229.13:33:47.87#ibcon#about to read 3, iclass 13, count 0 2006.229.13:33:47.90#ibcon#read 3, iclass 13, count 0 2006.229.13:33:47.90#ibcon#about to read 4, iclass 13, count 0 2006.229.13:33:47.90#ibcon#read 4, iclass 13, count 0 2006.229.13:33:47.90#ibcon#about to read 5, iclass 13, count 0 2006.229.13:33:47.90#ibcon#read 5, iclass 13, count 0 2006.229.13:33:47.90#ibcon#about to read 6, iclass 13, count 0 2006.229.13:33:47.90#ibcon#read 6, iclass 13, count 0 2006.229.13:33:47.90#ibcon#end of sib2, iclass 13, count 0 2006.229.13:33:47.90#ibcon#*after write, iclass 13, count 0 2006.229.13:33:47.90#ibcon#*before return 0, iclass 13, count 0 2006.229.13:33:47.90#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:33:47.90#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:33:47.90#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:33:47.90#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:33:47.91$vck44/vblo=1,629.99 2006.229.13:33:47.91#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.13:33:47.91#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.13:33:47.91#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:47.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:47.91#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:47.91#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:47.91#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:33:47.91#ibcon#first serial, iclass 15, count 0 2006.229.13:33:47.91#ibcon#enter sib2, iclass 15, count 0 2006.229.13:33:47.91#ibcon#flushed, iclass 15, count 0 2006.229.13:33:47.91#ibcon#about to write, iclass 15, count 0 2006.229.13:33:47.91#ibcon#wrote, iclass 15, count 0 2006.229.13:33:47.91#ibcon#about to read 3, iclass 15, count 0 2006.229.13:33:47.92#ibcon#read 3, iclass 15, count 0 2006.229.13:33:47.92#ibcon#about to read 4, iclass 15, count 0 2006.229.13:33:47.92#ibcon#read 4, iclass 15, count 0 2006.229.13:33:47.92#ibcon#about to read 5, iclass 15, count 0 2006.229.13:33:47.92#ibcon#read 5, iclass 15, count 0 2006.229.13:33:47.92#ibcon#about to read 6, iclass 15, count 0 2006.229.13:33:47.92#ibcon#read 6, iclass 15, count 0 2006.229.13:33:47.92#ibcon#end of sib2, iclass 15, count 0 2006.229.13:33:47.92#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:33:47.92#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:33:47.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:33:47.92#ibcon#*before write, iclass 15, count 0 2006.229.13:33:47.92#ibcon#enter sib2, iclass 15, count 0 2006.229.13:33:47.92#ibcon#flushed, iclass 15, count 0 2006.229.13:33:47.92#ibcon#about to write, iclass 15, count 0 2006.229.13:33:47.92#ibcon#wrote, iclass 15, count 0 2006.229.13:33:47.92#ibcon#about to read 3, iclass 15, count 0 2006.229.13:33:47.96#ibcon#read 3, iclass 15, count 0 2006.229.13:33:47.96#ibcon#about to read 4, iclass 15, count 0 2006.229.13:33:47.96#ibcon#read 4, iclass 15, count 0 2006.229.13:33:47.96#ibcon#about to read 5, iclass 15, count 0 2006.229.13:33:47.96#ibcon#read 5, iclass 15, count 0 2006.229.13:33:47.96#ibcon#about to read 6, iclass 15, count 0 2006.229.13:33:47.96#ibcon#read 6, iclass 15, count 0 2006.229.13:33:47.96#ibcon#end of sib2, iclass 15, count 0 2006.229.13:33:47.96#ibcon#*after write, iclass 15, count 0 2006.229.13:33:47.96#ibcon#*before return 0, iclass 15, count 0 2006.229.13:33:47.96#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:47.96#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:33:47.96#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:33:47.96#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:33:47.96$vck44/vb=1,4 2006.229.13:33:47.97#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.13:33:47.97#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.13:33:47.97#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:47.97#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:47.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:47.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:47.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.13:33:47.97#ibcon#first serial, iclass 17, count 2 2006.229.13:33:47.97#ibcon#enter sib2, iclass 17, count 2 2006.229.13:33:47.97#ibcon#flushed, iclass 17, count 2 2006.229.13:33:47.97#ibcon#about to write, iclass 17, count 2 2006.229.13:33:47.97#ibcon#wrote, iclass 17, count 2 2006.229.13:33:47.97#ibcon#about to read 3, iclass 17, count 2 2006.229.13:33:47.98#ibcon#read 3, iclass 17, count 2 2006.229.13:33:47.98#ibcon#about to read 4, iclass 17, count 2 2006.229.13:33:47.98#ibcon#read 4, iclass 17, count 2 2006.229.13:33:47.98#ibcon#about to read 5, iclass 17, count 2 2006.229.13:33:47.98#ibcon#read 5, iclass 17, count 2 2006.229.13:33:47.98#ibcon#about to read 6, iclass 17, count 2 2006.229.13:33:47.98#ibcon#read 6, iclass 17, count 2 2006.229.13:33:47.98#ibcon#end of sib2, iclass 17, count 2 2006.229.13:33:47.98#ibcon#*mode == 0, iclass 17, count 2 2006.229.13:33:47.98#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.13:33:47.98#ibcon#[27=AT01-04\r\n] 2006.229.13:33:47.98#ibcon#*before write, iclass 17, count 2 2006.229.13:33:47.98#ibcon#enter sib2, iclass 17, count 2 2006.229.13:33:47.98#ibcon#flushed, iclass 17, count 2 2006.229.13:33:47.98#ibcon#about to write, iclass 17, count 2 2006.229.13:33:47.98#ibcon#wrote, iclass 17, count 2 2006.229.13:33:47.98#ibcon#about to read 3, iclass 17, count 2 2006.229.13:33:48.01#ibcon#read 3, iclass 17, count 2 2006.229.13:33:48.01#ibcon#about to read 4, iclass 17, count 2 2006.229.13:33:48.01#ibcon#read 4, iclass 17, count 2 2006.229.13:33:48.01#ibcon#about to read 5, iclass 17, count 2 2006.229.13:33:48.01#ibcon#read 5, iclass 17, count 2 2006.229.13:33:48.01#ibcon#about to read 6, iclass 17, count 2 2006.229.13:33:48.01#ibcon#read 6, iclass 17, count 2 2006.229.13:33:48.01#ibcon#end of sib2, iclass 17, count 2 2006.229.13:33:48.01#ibcon#*after write, iclass 17, count 2 2006.229.13:33:48.01#ibcon#*before return 0, iclass 17, count 2 2006.229.13:33:48.01#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:48.01#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:33:48.01#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.13:33:48.01#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:48.01#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:48.13#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:48.13#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:48.13#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:33:48.13#ibcon#first serial, iclass 17, count 0 2006.229.13:33:48.13#ibcon#enter sib2, iclass 17, count 0 2006.229.13:33:48.13#ibcon#flushed, iclass 17, count 0 2006.229.13:33:48.13#ibcon#about to write, iclass 17, count 0 2006.229.13:33:48.13#ibcon#wrote, iclass 17, count 0 2006.229.13:33:48.13#ibcon#about to read 3, iclass 17, count 0 2006.229.13:33:48.15#ibcon#read 3, iclass 17, count 0 2006.229.13:33:48.15#ibcon#about to read 4, iclass 17, count 0 2006.229.13:33:48.15#ibcon#read 4, iclass 17, count 0 2006.229.13:33:48.15#ibcon#about to read 5, iclass 17, count 0 2006.229.13:33:48.15#ibcon#read 5, iclass 17, count 0 2006.229.13:33:48.15#ibcon#about to read 6, iclass 17, count 0 2006.229.13:33:48.15#ibcon#read 6, iclass 17, count 0 2006.229.13:33:48.15#ibcon#end of sib2, iclass 17, count 0 2006.229.13:33:48.15#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:33:48.15#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:33:48.15#ibcon#[27=USB\r\n] 2006.229.13:33:48.15#ibcon#*before write, iclass 17, count 0 2006.229.13:33:48.15#ibcon#enter sib2, iclass 17, count 0 2006.229.13:33:48.15#ibcon#flushed, iclass 17, count 0 2006.229.13:33:48.15#ibcon#about to write, iclass 17, count 0 2006.229.13:33:48.15#ibcon#wrote, iclass 17, count 0 2006.229.13:33:48.15#ibcon#about to read 3, iclass 17, count 0 2006.229.13:33:48.18#ibcon#read 3, iclass 17, count 0 2006.229.13:33:48.18#ibcon#about to read 4, iclass 17, count 0 2006.229.13:33:48.18#ibcon#read 4, iclass 17, count 0 2006.229.13:33:48.18#ibcon#about to read 5, iclass 17, count 0 2006.229.13:33:48.18#ibcon#read 5, iclass 17, count 0 2006.229.13:33:48.18#ibcon#about to read 6, iclass 17, count 0 2006.229.13:33:48.18#ibcon#read 6, iclass 17, count 0 2006.229.13:33:48.18#ibcon#end of sib2, iclass 17, count 0 2006.229.13:33:48.18#ibcon#*after write, iclass 17, count 0 2006.229.13:33:48.18#ibcon#*before return 0, iclass 17, count 0 2006.229.13:33:48.18#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:48.18#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:33:48.18#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:33:48.18#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:33:48.19$vck44/vblo=2,634.99 2006.229.13:33:48.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:33:48.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:33:48.19#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:48.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:48.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:48.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:48.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:33:48.19#ibcon#first serial, iclass 19, count 0 2006.229.13:33:48.19#ibcon#enter sib2, iclass 19, count 0 2006.229.13:33:48.19#ibcon#flushed, iclass 19, count 0 2006.229.13:33:48.19#ibcon#about to write, iclass 19, count 0 2006.229.13:33:48.19#ibcon#wrote, iclass 19, count 0 2006.229.13:33:48.19#ibcon#about to read 3, iclass 19, count 0 2006.229.13:33:48.20#ibcon#read 3, iclass 19, count 0 2006.229.13:33:48.20#ibcon#about to read 4, iclass 19, count 0 2006.229.13:33:48.20#ibcon#read 4, iclass 19, count 0 2006.229.13:33:48.20#ibcon#about to read 5, iclass 19, count 0 2006.229.13:33:48.20#ibcon#read 5, iclass 19, count 0 2006.229.13:33:48.20#ibcon#about to read 6, iclass 19, count 0 2006.229.13:33:48.20#ibcon#read 6, iclass 19, count 0 2006.229.13:33:48.20#ibcon#end of sib2, iclass 19, count 0 2006.229.13:33:48.20#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:33:48.20#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:33:48.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:33:48.20#ibcon#*before write, iclass 19, count 0 2006.229.13:33:48.20#ibcon#enter sib2, iclass 19, count 0 2006.229.13:33:48.20#ibcon#flushed, iclass 19, count 0 2006.229.13:33:48.20#ibcon#about to write, iclass 19, count 0 2006.229.13:33:48.20#ibcon#wrote, iclass 19, count 0 2006.229.13:33:48.20#ibcon#about to read 3, iclass 19, count 0 2006.229.13:33:48.24#ibcon#read 3, iclass 19, count 0 2006.229.13:33:48.24#ibcon#about to read 4, iclass 19, count 0 2006.229.13:33:48.24#ibcon#read 4, iclass 19, count 0 2006.229.13:33:48.24#ibcon#about to read 5, iclass 19, count 0 2006.229.13:33:48.24#ibcon#read 5, iclass 19, count 0 2006.229.13:33:48.24#ibcon#about to read 6, iclass 19, count 0 2006.229.13:33:48.24#ibcon#read 6, iclass 19, count 0 2006.229.13:33:48.24#ibcon#end of sib2, iclass 19, count 0 2006.229.13:33:48.24#ibcon#*after write, iclass 19, count 0 2006.229.13:33:48.24#ibcon#*before return 0, iclass 19, count 0 2006.229.13:33:48.24#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:48.24#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:33:48.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:33:48.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:33:48.25$vck44/vb=2,4 2006.229.13:33:48.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:33:48.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:33:48.25#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:48.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:48.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:48.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:48.29#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:33:48.29#ibcon#first serial, iclass 21, count 2 2006.229.13:33:48.29#ibcon#enter sib2, iclass 21, count 2 2006.229.13:33:48.29#ibcon#flushed, iclass 21, count 2 2006.229.13:33:48.29#ibcon#about to write, iclass 21, count 2 2006.229.13:33:48.29#ibcon#wrote, iclass 21, count 2 2006.229.13:33:48.29#ibcon#about to read 3, iclass 21, count 2 2006.229.13:33:48.31#ibcon#read 3, iclass 21, count 2 2006.229.13:33:48.31#ibcon#about to read 4, iclass 21, count 2 2006.229.13:33:48.31#ibcon#read 4, iclass 21, count 2 2006.229.13:33:48.31#ibcon#about to read 5, iclass 21, count 2 2006.229.13:33:48.31#ibcon#read 5, iclass 21, count 2 2006.229.13:33:48.31#ibcon#about to read 6, iclass 21, count 2 2006.229.13:33:48.31#ibcon#read 6, iclass 21, count 2 2006.229.13:33:48.31#ibcon#end of sib2, iclass 21, count 2 2006.229.13:33:48.31#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:33:48.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:33:48.31#ibcon#[27=AT02-04\r\n] 2006.229.13:33:48.31#ibcon#*before write, iclass 21, count 2 2006.229.13:33:48.31#ibcon#enter sib2, iclass 21, count 2 2006.229.13:33:48.31#ibcon#flushed, iclass 21, count 2 2006.229.13:33:48.31#ibcon#about to write, iclass 21, count 2 2006.229.13:33:48.31#ibcon#wrote, iclass 21, count 2 2006.229.13:33:48.31#ibcon#about to read 3, iclass 21, count 2 2006.229.13:33:48.34#ibcon#read 3, iclass 21, count 2 2006.229.13:33:48.34#ibcon#about to read 4, iclass 21, count 2 2006.229.13:33:48.34#ibcon#read 4, iclass 21, count 2 2006.229.13:33:48.34#ibcon#about to read 5, iclass 21, count 2 2006.229.13:33:48.34#ibcon#read 5, iclass 21, count 2 2006.229.13:33:48.34#ibcon#about to read 6, iclass 21, count 2 2006.229.13:33:48.34#ibcon#read 6, iclass 21, count 2 2006.229.13:33:48.34#ibcon#end of sib2, iclass 21, count 2 2006.229.13:33:48.34#ibcon#*after write, iclass 21, count 2 2006.229.13:33:48.34#ibcon#*before return 0, iclass 21, count 2 2006.229.13:33:48.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:48.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:33:48.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:33:48.34#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:48.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:48.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:48.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:48.46#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:33:48.46#ibcon#first serial, iclass 21, count 0 2006.229.13:33:48.46#ibcon#enter sib2, iclass 21, count 0 2006.229.13:33:48.46#ibcon#flushed, iclass 21, count 0 2006.229.13:33:48.46#ibcon#about to write, iclass 21, count 0 2006.229.13:33:48.46#ibcon#wrote, iclass 21, count 0 2006.229.13:33:48.46#ibcon#about to read 3, iclass 21, count 0 2006.229.13:33:48.48#ibcon#read 3, iclass 21, count 0 2006.229.13:33:48.48#ibcon#about to read 4, iclass 21, count 0 2006.229.13:33:48.48#ibcon#read 4, iclass 21, count 0 2006.229.13:33:48.48#ibcon#about to read 5, iclass 21, count 0 2006.229.13:33:48.48#ibcon#read 5, iclass 21, count 0 2006.229.13:33:48.48#ibcon#about to read 6, iclass 21, count 0 2006.229.13:33:48.48#ibcon#read 6, iclass 21, count 0 2006.229.13:33:48.48#ibcon#end of sib2, iclass 21, count 0 2006.229.13:33:48.48#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:33:48.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:33:48.48#ibcon#[27=USB\r\n] 2006.229.13:33:48.48#ibcon#*before write, iclass 21, count 0 2006.229.13:33:48.48#ibcon#enter sib2, iclass 21, count 0 2006.229.13:33:48.48#ibcon#flushed, iclass 21, count 0 2006.229.13:33:48.48#ibcon#about to write, iclass 21, count 0 2006.229.13:33:48.48#ibcon#wrote, iclass 21, count 0 2006.229.13:33:48.48#ibcon#about to read 3, iclass 21, count 0 2006.229.13:33:48.51#ibcon#read 3, iclass 21, count 0 2006.229.13:33:48.51#ibcon#about to read 4, iclass 21, count 0 2006.229.13:33:48.51#ibcon#read 4, iclass 21, count 0 2006.229.13:33:48.51#ibcon#about to read 5, iclass 21, count 0 2006.229.13:33:48.51#ibcon#read 5, iclass 21, count 0 2006.229.13:33:48.51#ibcon#about to read 6, iclass 21, count 0 2006.229.13:33:48.51#ibcon#read 6, iclass 21, count 0 2006.229.13:33:48.51#ibcon#end of sib2, iclass 21, count 0 2006.229.13:33:48.51#ibcon#*after write, iclass 21, count 0 2006.229.13:33:48.51#ibcon#*before return 0, iclass 21, count 0 2006.229.13:33:48.51#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:48.51#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:33:48.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:33:48.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:33:48.52$vck44/vblo=3,649.99 2006.229.13:33:48.52#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:33:48.52#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:33:48.52#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:48.52#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:48.52#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:48.52#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:48.52#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:33:48.52#ibcon#first serial, iclass 23, count 0 2006.229.13:33:48.52#ibcon#enter sib2, iclass 23, count 0 2006.229.13:33:48.52#ibcon#flushed, iclass 23, count 0 2006.229.13:33:48.52#ibcon#about to write, iclass 23, count 0 2006.229.13:33:48.52#ibcon#wrote, iclass 23, count 0 2006.229.13:33:48.52#ibcon#about to read 3, iclass 23, count 0 2006.229.13:33:48.53#ibcon#read 3, iclass 23, count 0 2006.229.13:33:48.53#ibcon#about to read 4, iclass 23, count 0 2006.229.13:33:48.53#ibcon#read 4, iclass 23, count 0 2006.229.13:33:48.53#ibcon#about to read 5, iclass 23, count 0 2006.229.13:33:48.53#ibcon#read 5, iclass 23, count 0 2006.229.13:33:48.53#ibcon#about to read 6, iclass 23, count 0 2006.229.13:33:48.53#ibcon#read 6, iclass 23, count 0 2006.229.13:33:48.53#ibcon#end of sib2, iclass 23, count 0 2006.229.13:33:48.53#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:33:48.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:33:48.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:33:48.53#ibcon#*before write, iclass 23, count 0 2006.229.13:33:48.53#ibcon#enter sib2, iclass 23, count 0 2006.229.13:33:48.53#ibcon#flushed, iclass 23, count 0 2006.229.13:33:48.53#ibcon#about to write, iclass 23, count 0 2006.229.13:33:48.53#ibcon#wrote, iclass 23, count 0 2006.229.13:33:48.53#ibcon#about to read 3, iclass 23, count 0 2006.229.13:33:48.57#ibcon#read 3, iclass 23, count 0 2006.229.13:33:48.57#ibcon#about to read 4, iclass 23, count 0 2006.229.13:33:48.57#ibcon#read 4, iclass 23, count 0 2006.229.13:33:48.57#ibcon#about to read 5, iclass 23, count 0 2006.229.13:33:48.57#ibcon#read 5, iclass 23, count 0 2006.229.13:33:48.57#ibcon#about to read 6, iclass 23, count 0 2006.229.13:33:48.57#ibcon#read 6, iclass 23, count 0 2006.229.13:33:48.57#ibcon#end of sib2, iclass 23, count 0 2006.229.13:33:48.57#ibcon#*after write, iclass 23, count 0 2006.229.13:33:48.57#ibcon#*before return 0, iclass 23, count 0 2006.229.13:33:48.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:48.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:33:48.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:33:48.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:33:48.58$vck44/vb=3,4 2006.229.13:33:48.58#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:33:48.58#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:33:48.58#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:48.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:48.62#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:48.62#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:48.62#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:33:48.62#ibcon#first serial, iclass 25, count 2 2006.229.13:33:48.62#ibcon#enter sib2, iclass 25, count 2 2006.229.13:33:48.62#ibcon#flushed, iclass 25, count 2 2006.229.13:33:48.62#ibcon#about to write, iclass 25, count 2 2006.229.13:33:48.62#ibcon#wrote, iclass 25, count 2 2006.229.13:33:48.62#ibcon#about to read 3, iclass 25, count 2 2006.229.13:33:48.64#ibcon#read 3, iclass 25, count 2 2006.229.13:33:48.64#ibcon#about to read 4, iclass 25, count 2 2006.229.13:33:48.64#ibcon#read 4, iclass 25, count 2 2006.229.13:33:48.64#ibcon#about to read 5, iclass 25, count 2 2006.229.13:33:48.64#ibcon#read 5, iclass 25, count 2 2006.229.13:33:48.64#ibcon#about to read 6, iclass 25, count 2 2006.229.13:33:48.64#ibcon#read 6, iclass 25, count 2 2006.229.13:33:48.64#ibcon#end of sib2, iclass 25, count 2 2006.229.13:33:48.64#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:33:48.64#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:33:48.64#ibcon#[27=AT03-04\r\n] 2006.229.13:33:48.64#ibcon#*before write, iclass 25, count 2 2006.229.13:33:48.64#ibcon#enter sib2, iclass 25, count 2 2006.229.13:33:48.64#ibcon#flushed, iclass 25, count 2 2006.229.13:33:48.64#ibcon#about to write, iclass 25, count 2 2006.229.13:33:48.64#ibcon#wrote, iclass 25, count 2 2006.229.13:33:48.64#ibcon#about to read 3, iclass 25, count 2 2006.229.13:33:48.67#ibcon#read 3, iclass 25, count 2 2006.229.13:33:48.67#ibcon#about to read 4, iclass 25, count 2 2006.229.13:33:48.67#ibcon#read 4, iclass 25, count 2 2006.229.13:33:48.67#ibcon#about to read 5, iclass 25, count 2 2006.229.13:33:48.67#ibcon#read 5, iclass 25, count 2 2006.229.13:33:48.67#ibcon#about to read 6, iclass 25, count 2 2006.229.13:33:48.67#ibcon#read 6, iclass 25, count 2 2006.229.13:33:48.67#ibcon#end of sib2, iclass 25, count 2 2006.229.13:33:48.67#ibcon#*after write, iclass 25, count 2 2006.229.13:33:48.67#ibcon#*before return 0, iclass 25, count 2 2006.229.13:33:48.67#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:48.67#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:33:48.67#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:33:48.67#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:48.67#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:48.79#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:48.79#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:48.79#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:33:48.79#ibcon#first serial, iclass 25, count 0 2006.229.13:33:48.79#ibcon#enter sib2, iclass 25, count 0 2006.229.13:33:48.79#ibcon#flushed, iclass 25, count 0 2006.229.13:33:48.79#ibcon#about to write, iclass 25, count 0 2006.229.13:33:48.79#ibcon#wrote, iclass 25, count 0 2006.229.13:33:48.79#ibcon#about to read 3, iclass 25, count 0 2006.229.13:33:48.81#ibcon#read 3, iclass 25, count 0 2006.229.13:33:48.81#ibcon#about to read 4, iclass 25, count 0 2006.229.13:33:48.81#ibcon#read 4, iclass 25, count 0 2006.229.13:33:48.81#ibcon#about to read 5, iclass 25, count 0 2006.229.13:33:48.81#ibcon#read 5, iclass 25, count 0 2006.229.13:33:48.81#ibcon#about to read 6, iclass 25, count 0 2006.229.13:33:48.81#ibcon#read 6, iclass 25, count 0 2006.229.13:33:48.81#ibcon#end of sib2, iclass 25, count 0 2006.229.13:33:48.81#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:33:48.81#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:33:48.81#ibcon#[27=USB\r\n] 2006.229.13:33:48.81#ibcon#*before write, iclass 25, count 0 2006.229.13:33:48.81#ibcon#enter sib2, iclass 25, count 0 2006.229.13:33:48.81#ibcon#flushed, iclass 25, count 0 2006.229.13:33:48.81#ibcon#about to write, iclass 25, count 0 2006.229.13:33:48.81#ibcon#wrote, iclass 25, count 0 2006.229.13:33:48.81#ibcon#about to read 3, iclass 25, count 0 2006.229.13:33:48.84#ibcon#read 3, iclass 25, count 0 2006.229.13:33:48.84#ibcon#about to read 4, iclass 25, count 0 2006.229.13:33:48.84#ibcon#read 4, iclass 25, count 0 2006.229.13:33:48.84#ibcon#about to read 5, iclass 25, count 0 2006.229.13:33:48.84#ibcon#read 5, iclass 25, count 0 2006.229.13:33:48.84#ibcon#about to read 6, iclass 25, count 0 2006.229.13:33:48.84#ibcon#read 6, iclass 25, count 0 2006.229.13:33:48.84#ibcon#end of sib2, iclass 25, count 0 2006.229.13:33:48.84#ibcon#*after write, iclass 25, count 0 2006.229.13:33:48.84#ibcon#*before return 0, iclass 25, count 0 2006.229.13:33:48.84#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:48.84#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:33:48.84#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:33:48.84#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:33:48.85$vck44/vblo=4,679.99 2006.229.13:33:48.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:33:48.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:33:48.85#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:48.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:48.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:48.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:48.85#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:33:48.85#ibcon#first serial, iclass 27, count 0 2006.229.13:33:48.85#ibcon#enter sib2, iclass 27, count 0 2006.229.13:33:48.85#ibcon#flushed, iclass 27, count 0 2006.229.13:33:48.85#ibcon#about to write, iclass 27, count 0 2006.229.13:33:48.85#ibcon#wrote, iclass 27, count 0 2006.229.13:33:48.85#ibcon#about to read 3, iclass 27, count 0 2006.229.13:33:48.86#ibcon#read 3, iclass 27, count 0 2006.229.13:33:48.86#ibcon#about to read 4, iclass 27, count 0 2006.229.13:33:48.86#ibcon#read 4, iclass 27, count 0 2006.229.13:33:48.86#ibcon#about to read 5, iclass 27, count 0 2006.229.13:33:48.86#ibcon#read 5, iclass 27, count 0 2006.229.13:33:48.86#ibcon#about to read 6, iclass 27, count 0 2006.229.13:33:48.86#ibcon#read 6, iclass 27, count 0 2006.229.13:33:48.86#ibcon#end of sib2, iclass 27, count 0 2006.229.13:33:48.86#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:33:48.86#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:33:48.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:33:48.86#ibcon#*before write, iclass 27, count 0 2006.229.13:33:48.86#ibcon#enter sib2, iclass 27, count 0 2006.229.13:33:48.86#ibcon#flushed, iclass 27, count 0 2006.229.13:33:48.86#ibcon#about to write, iclass 27, count 0 2006.229.13:33:48.86#ibcon#wrote, iclass 27, count 0 2006.229.13:33:48.86#ibcon#about to read 3, iclass 27, count 0 2006.229.13:33:48.90#ibcon#read 3, iclass 27, count 0 2006.229.13:33:48.90#ibcon#about to read 4, iclass 27, count 0 2006.229.13:33:48.90#ibcon#read 4, iclass 27, count 0 2006.229.13:33:48.90#ibcon#about to read 5, iclass 27, count 0 2006.229.13:33:48.90#ibcon#read 5, iclass 27, count 0 2006.229.13:33:48.90#ibcon#about to read 6, iclass 27, count 0 2006.229.13:33:48.90#ibcon#read 6, iclass 27, count 0 2006.229.13:33:48.90#ibcon#end of sib2, iclass 27, count 0 2006.229.13:33:48.90#ibcon#*after write, iclass 27, count 0 2006.229.13:33:48.90#ibcon#*before return 0, iclass 27, count 0 2006.229.13:33:48.90#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:48.90#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:33:48.90#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:33:48.90#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:33:48.91$vck44/vb=4,4 2006.229.13:33:48.91#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:33:48.91#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:33:48.91#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:48.91#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:48.95#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:48.95#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:48.95#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:33:48.95#ibcon#first serial, iclass 29, count 2 2006.229.13:33:48.95#ibcon#enter sib2, iclass 29, count 2 2006.229.13:33:48.95#ibcon#flushed, iclass 29, count 2 2006.229.13:33:48.95#ibcon#about to write, iclass 29, count 2 2006.229.13:33:48.95#ibcon#wrote, iclass 29, count 2 2006.229.13:33:48.95#ibcon#about to read 3, iclass 29, count 2 2006.229.13:33:48.97#ibcon#read 3, iclass 29, count 2 2006.229.13:33:48.97#ibcon#about to read 4, iclass 29, count 2 2006.229.13:33:48.97#ibcon#read 4, iclass 29, count 2 2006.229.13:33:48.97#ibcon#about to read 5, iclass 29, count 2 2006.229.13:33:48.97#ibcon#read 5, iclass 29, count 2 2006.229.13:33:48.97#ibcon#about to read 6, iclass 29, count 2 2006.229.13:33:48.97#ibcon#read 6, iclass 29, count 2 2006.229.13:33:48.97#ibcon#end of sib2, iclass 29, count 2 2006.229.13:33:48.97#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:33:48.97#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:33:48.97#ibcon#[27=AT04-04\r\n] 2006.229.13:33:48.97#ibcon#*before write, iclass 29, count 2 2006.229.13:33:48.97#ibcon#enter sib2, iclass 29, count 2 2006.229.13:33:48.97#ibcon#flushed, iclass 29, count 2 2006.229.13:33:48.97#ibcon#about to write, iclass 29, count 2 2006.229.13:33:48.97#ibcon#wrote, iclass 29, count 2 2006.229.13:33:48.97#ibcon#about to read 3, iclass 29, count 2 2006.229.13:33:49.00#ibcon#read 3, iclass 29, count 2 2006.229.13:33:49.00#ibcon#about to read 4, iclass 29, count 2 2006.229.13:33:49.00#ibcon#read 4, iclass 29, count 2 2006.229.13:33:49.00#ibcon#about to read 5, iclass 29, count 2 2006.229.13:33:49.00#ibcon#read 5, iclass 29, count 2 2006.229.13:33:49.00#ibcon#about to read 6, iclass 29, count 2 2006.229.13:33:49.00#ibcon#read 6, iclass 29, count 2 2006.229.13:33:49.00#ibcon#end of sib2, iclass 29, count 2 2006.229.13:33:49.00#ibcon#*after write, iclass 29, count 2 2006.229.13:33:49.00#ibcon#*before return 0, iclass 29, count 2 2006.229.13:33:49.00#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:49.00#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:33:49.00#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:33:49.00#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:49.00#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:49.12#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:49.12#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:49.12#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:33:49.12#ibcon#first serial, iclass 29, count 0 2006.229.13:33:49.12#ibcon#enter sib2, iclass 29, count 0 2006.229.13:33:49.12#ibcon#flushed, iclass 29, count 0 2006.229.13:33:49.12#ibcon#about to write, iclass 29, count 0 2006.229.13:33:49.12#ibcon#wrote, iclass 29, count 0 2006.229.13:33:49.12#ibcon#about to read 3, iclass 29, count 0 2006.229.13:33:49.14#ibcon#read 3, iclass 29, count 0 2006.229.13:33:49.14#ibcon#about to read 4, iclass 29, count 0 2006.229.13:33:49.14#ibcon#read 4, iclass 29, count 0 2006.229.13:33:49.14#ibcon#about to read 5, iclass 29, count 0 2006.229.13:33:49.14#ibcon#read 5, iclass 29, count 0 2006.229.13:33:49.14#ibcon#about to read 6, iclass 29, count 0 2006.229.13:33:49.14#ibcon#read 6, iclass 29, count 0 2006.229.13:33:49.14#ibcon#end of sib2, iclass 29, count 0 2006.229.13:33:49.14#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:33:49.14#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:33:49.14#ibcon#[27=USB\r\n] 2006.229.13:33:49.14#ibcon#*before write, iclass 29, count 0 2006.229.13:33:49.14#ibcon#enter sib2, iclass 29, count 0 2006.229.13:33:49.14#ibcon#flushed, iclass 29, count 0 2006.229.13:33:49.14#ibcon#about to write, iclass 29, count 0 2006.229.13:33:49.14#ibcon#wrote, iclass 29, count 0 2006.229.13:33:49.14#ibcon#about to read 3, iclass 29, count 0 2006.229.13:33:49.17#ibcon#read 3, iclass 29, count 0 2006.229.13:33:49.17#ibcon#about to read 4, iclass 29, count 0 2006.229.13:33:49.17#ibcon#read 4, iclass 29, count 0 2006.229.13:33:49.17#ibcon#about to read 5, iclass 29, count 0 2006.229.13:33:49.17#ibcon#read 5, iclass 29, count 0 2006.229.13:33:49.17#ibcon#about to read 6, iclass 29, count 0 2006.229.13:33:49.17#ibcon#read 6, iclass 29, count 0 2006.229.13:33:49.17#ibcon#end of sib2, iclass 29, count 0 2006.229.13:33:49.17#ibcon#*after write, iclass 29, count 0 2006.229.13:33:49.17#ibcon#*before return 0, iclass 29, count 0 2006.229.13:33:49.17#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:49.17#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:33:49.17#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:33:49.17#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:33:49.18$vck44/vblo=5,709.99 2006.229.13:33:49.18#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:33:49.18#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:33:49.18#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:49.18#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:49.18#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:49.18#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:49.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:33:49.18#ibcon#first serial, iclass 31, count 0 2006.229.13:33:49.18#ibcon#enter sib2, iclass 31, count 0 2006.229.13:33:49.18#ibcon#flushed, iclass 31, count 0 2006.229.13:33:49.18#ibcon#about to write, iclass 31, count 0 2006.229.13:33:49.18#ibcon#wrote, iclass 31, count 0 2006.229.13:33:49.18#ibcon#about to read 3, iclass 31, count 0 2006.229.13:33:49.19#ibcon#read 3, iclass 31, count 0 2006.229.13:33:49.19#ibcon#about to read 4, iclass 31, count 0 2006.229.13:33:49.19#ibcon#read 4, iclass 31, count 0 2006.229.13:33:49.19#ibcon#about to read 5, iclass 31, count 0 2006.229.13:33:49.19#ibcon#read 5, iclass 31, count 0 2006.229.13:33:49.19#ibcon#about to read 6, iclass 31, count 0 2006.229.13:33:49.19#ibcon#read 6, iclass 31, count 0 2006.229.13:33:49.19#ibcon#end of sib2, iclass 31, count 0 2006.229.13:33:49.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:33:49.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:33:49.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:33:49.19#ibcon#*before write, iclass 31, count 0 2006.229.13:33:49.19#ibcon#enter sib2, iclass 31, count 0 2006.229.13:33:49.19#ibcon#flushed, iclass 31, count 0 2006.229.13:33:49.19#ibcon#about to write, iclass 31, count 0 2006.229.13:33:49.19#ibcon#wrote, iclass 31, count 0 2006.229.13:33:49.19#ibcon#about to read 3, iclass 31, count 0 2006.229.13:33:49.23#ibcon#read 3, iclass 31, count 0 2006.229.13:33:49.23#ibcon#about to read 4, iclass 31, count 0 2006.229.13:33:49.23#ibcon#read 4, iclass 31, count 0 2006.229.13:33:49.23#ibcon#about to read 5, iclass 31, count 0 2006.229.13:33:49.23#ibcon#read 5, iclass 31, count 0 2006.229.13:33:49.23#ibcon#about to read 6, iclass 31, count 0 2006.229.13:33:49.23#ibcon#read 6, iclass 31, count 0 2006.229.13:33:49.23#ibcon#end of sib2, iclass 31, count 0 2006.229.13:33:49.23#ibcon#*after write, iclass 31, count 0 2006.229.13:33:49.23#ibcon#*before return 0, iclass 31, count 0 2006.229.13:33:49.23#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:49.23#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:33:49.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:33:49.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:33:49.24$vck44/vb=5,4 2006.229.13:33:49.24#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:33:49.24#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:33:49.24#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:49.24#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:49.28#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:49.28#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:49.28#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:33:49.28#ibcon#first serial, iclass 33, count 2 2006.229.13:33:49.28#ibcon#enter sib2, iclass 33, count 2 2006.229.13:33:49.28#ibcon#flushed, iclass 33, count 2 2006.229.13:33:49.28#ibcon#about to write, iclass 33, count 2 2006.229.13:33:49.28#ibcon#wrote, iclass 33, count 2 2006.229.13:33:49.28#ibcon#about to read 3, iclass 33, count 2 2006.229.13:33:49.30#ibcon#read 3, iclass 33, count 2 2006.229.13:33:49.30#ibcon#about to read 4, iclass 33, count 2 2006.229.13:33:49.30#ibcon#read 4, iclass 33, count 2 2006.229.13:33:49.30#ibcon#about to read 5, iclass 33, count 2 2006.229.13:33:49.30#ibcon#read 5, iclass 33, count 2 2006.229.13:33:49.30#ibcon#about to read 6, iclass 33, count 2 2006.229.13:33:49.30#ibcon#read 6, iclass 33, count 2 2006.229.13:33:49.30#ibcon#end of sib2, iclass 33, count 2 2006.229.13:33:49.30#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:33:49.30#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:33:49.30#ibcon#[27=AT05-04\r\n] 2006.229.13:33:49.30#ibcon#*before write, iclass 33, count 2 2006.229.13:33:49.30#ibcon#enter sib2, iclass 33, count 2 2006.229.13:33:49.30#ibcon#flushed, iclass 33, count 2 2006.229.13:33:49.30#ibcon#about to write, iclass 33, count 2 2006.229.13:33:49.30#ibcon#wrote, iclass 33, count 2 2006.229.13:33:49.30#ibcon#about to read 3, iclass 33, count 2 2006.229.13:33:49.33#ibcon#read 3, iclass 33, count 2 2006.229.13:33:49.33#ibcon#about to read 4, iclass 33, count 2 2006.229.13:33:49.33#ibcon#read 4, iclass 33, count 2 2006.229.13:33:49.33#ibcon#about to read 5, iclass 33, count 2 2006.229.13:33:49.33#ibcon#read 5, iclass 33, count 2 2006.229.13:33:49.33#ibcon#about to read 6, iclass 33, count 2 2006.229.13:33:49.33#ibcon#read 6, iclass 33, count 2 2006.229.13:33:49.33#ibcon#end of sib2, iclass 33, count 2 2006.229.13:33:49.33#ibcon#*after write, iclass 33, count 2 2006.229.13:33:49.33#ibcon#*before return 0, iclass 33, count 2 2006.229.13:33:49.33#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:49.33#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:33:49.33#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:33:49.33#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:49.33#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:49.45#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:49.45#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:49.45#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:33:49.45#ibcon#first serial, iclass 33, count 0 2006.229.13:33:49.45#ibcon#enter sib2, iclass 33, count 0 2006.229.13:33:49.45#ibcon#flushed, iclass 33, count 0 2006.229.13:33:49.45#ibcon#about to write, iclass 33, count 0 2006.229.13:33:49.45#ibcon#wrote, iclass 33, count 0 2006.229.13:33:49.45#ibcon#about to read 3, iclass 33, count 0 2006.229.13:33:49.47#ibcon#read 3, iclass 33, count 0 2006.229.13:33:49.47#ibcon#about to read 4, iclass 33, count 0 2006.229.13:33:49.47#ibcon#read 4, iclass 33, count 0 2006.229.13:33:49.47#ibcon#about to read 5, iclass 33, count 0 2006.229.13:33:49.47#ibcon#read 5, iclass 33, count 0 2006.229.13:33:49.47#ibcon#about to read 6, iclass 33, count 0 2006.229.13:33:49.47#ibcon#read 6, iclass 33, count 0 2006.229.13:33:49.47#ibcon#end of sib2, iclass 33, count 0 2006.229.13:33:49.47#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:33:49.47#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:33:49.47#ibcon#[27=USB\r\n] 2006.229.13:33:49.47#ibcon#*before write, iclass 33, count 0 2006.229.13:33:49.47#ibcon#enter sib2, iclass 33, count 0 2006.229.13:33:49.47#ibcon#flushed, iclass 33, count 0 2006.229.13:33:49.47#ibcon#about to write, iclass 33, count 0 2006.229.13:33:49.47#ibcon#wrote, iclass 33, count 0 2006.229.13:33:49.47#ibcon#about to read 3, iclass 33, count 0 2006.229.13:33:49.50#ibcon#read 3, iclass 33, count 0 2006.229.13:33:49.50#ibcon#about to read 4, iclass 33, count 0 2006.229.13:33:49.50#ibcon#read 4, iclass 33, count 0 2006.229.13:33:49.50#ibcon#about to read 5, iclass 33, count 0 2006.229.13:33:49.50#ibcon#read 5, iclass 33, count 0 2006.229.13:33:49.50#ibcon#about to read 6, iclass 33, count 0 2006.229.13:33:49.50#ibcon#read 6, iclass 33, count 0 2006.229.13:33:49.50#ibcon#end of sib2, iclass 33, count 0 2006.229.13:33:49.50#ibcon#*after write, iclass 33, count 0 2006.229.13:33:49.50#ibcon#*before return 0, iclass 33, count 0 2006.229.13:33:49.50#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:49.50#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:33:49.50#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:33:49.50#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:33:49.51$vck44/vblo=6,719.99 2006.229.13:33:49.51#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:33:49.51#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:33:49.51#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:49.51#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:49.51#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:49.51#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:49.51#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:33:49.51#ibcon#first serial, iclass 35, count 0 2006.229.13:33:49.51#ibcon#enter sib2, iclass 35, count 0 2006.229.13:33:49.51#ibcon#flushed, iclass 35, count 0 2006.229.13:33:49.51#ibcon#about to write, iclass 35, count 0 2006.229.13:33:49.51#ibcon#wrote, iclass 35, count 0 2006.229.13:33:49.51#ibcon#about to read 3, iclass 35, count 0 2006.229.13:33:49.52#ibcon#read 3, iclass 35, count 0 2006.229.13:33:49.52#ibcon#about to read 4, iclass 35, count 0 2006.229.13:33:49.52#ibcon#read 4, iclass 35, count 0 2006.229.13:33:49.52#ibcon#about to read 5, iclass 35, count 0 2006.229.13:33:49.52#ibcon#read 5, iclass 35, count 0 2006.229.13:33:49.52#ibcon#about to read 6, iclass 35, count 0 2006.229.13:33:49.52#ibcon#read 6, iclass 35, count 0 2006.229.13:33:49.52#ibcon#end of sib2, iclass 35, count 0 2006.229.13:33:49.52#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:33:49.52#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:33:49.52#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:33:49.52#ibcon#*before write, iclass 35, count 0 2006.229.13:33:49.52#ibcon#enter sib2, iclass 35, count 0 2006.229.13:33:49.52#ibcon#flushed, iclass 35, count 0 2006.229.13:33:49.52#ibcon#about to write, iclass 35, count 0 2006.229.13:33:49.52#ibcon#wrote, iclass 35, count 0 2006.229.13:33:49.52#ibcon#about to read 3, iclass 35, count 0 2006.229.13:33:49.56#ibcon#read 3, iclass 35, count 0 2006.229.13:33:49.56#ibcon#about to read 4, iclass 35, count 0 2006.229.13:33:49.56#ibcon#read 4, iclass 35, count 0 2006.229.13:33:49.56#ibcon#about to read 5, iclass 35, count 0 2006.229.13:33:49.56#ibcon#read 5, iclass 35, count 0 2006.229.13:33:49.56#ibcon#about to read 6, iclass 35, count 0 2006.229.13:33:49.56#ibcon#read 6, iclass 35, count 0 2006.229.13:33:49.56#ibcon#end of sib2, iclass 35, count 0 2006.229.13:33:49.56#ibcon#*after write, iclass 35, count 0 2006.229.13:33:49.56#ibcon#*before return 0, iclass 35, count 0 2006.229.13:33:49.56#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:49.56#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:33:49.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:33:49.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:33:49.57$vck44/vb=6,4 2006.229.13:33:49.57#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:33:49.57#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:33:49.57#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:49.57#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:49.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:49.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:49.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:33:49.61#ibcon#first serial, iclass 37, count 2 2006.229.13:33:49.61#ibcon#enter sib2, iclass 37, count 2 2006.229.13:33:49.61#ibcon#flushed, iclass 37, count 2 2006.229.13:33:49.61#ibcon#about to write, iclass 37, count 2 2006.229.13:33:49.61#ibcon#wrote, iclass 37, count 2 2006.229.13:33:49.61#ibcon#about to read 3, iclass 37, count 2 2006.229.13:33:49.63#ibcon#read 3, iclass 37, count 2 2006.229.13:33:49.63#ibcon#about to read 4, iclass 37, count 2 2006.229.13:33:49.63#ibcon#read 4, iclass 37, count 2 2006.229.13:33:49.63#ibcon#about to read 5, iclass 37, count 2 2006.229.13:33:49.63#ibcon#read 5, iclass 37, count 2 2006.229.13:33:49.63#ibcon#about to read 6, iclass 37, count 2 2006.229.13:33:49.63#ibcon#read 6, iclass 37, count 2 2006.229.13:33:49.63#ibcon#end of sib2, iclass 37, count 2 2006.229.13:33:49.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:33:49.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:33:49.63#ibcon#[27=AT06-04\r\n] 2006.229.13:33:49.63#ibcon#*before write, iclass 37, count 2 2006.229.13:33:49.63#ibcon#enter sib2, iclass 37, count 2 2006.229.13:33:49.63#ibcon#flushed, iclass 37, count 2 2006.229.13:33:49.63#ibcon#about to write, iclass 37, count 2 2006.229.13:33:49.63#ibcon#wrote, iclass 37, count 2 2006.229.13:33:49.63#ibcon#about to read 3, iclass 37, count 2 2006.229.13:33:49.66#ibcon#read 3, iclass 37, count 2 2006.229.13:33:49.66#ibcon#about to read 4, iclass 37, count 2 2006.229.13:33:49.66#ibcon#read 4, iclass 37, count 2 2006.229.13:33:49.66#ibcon#about to read 5, iclass 37, count 2 2006.229.13:33:49.66#ibcon#read 5, iclass 37, count 2 2006.229.13:33:49.66#ibcon#about to read 6, iclass 37, count 2 2006.229.13:33:49.66#ibcon#read 6, iclass 37, count 2 2006.229.13:33:49.66#ibcon#end of sib2, iclass 37, count 2 2006.229.13:33:49.66#ibcon#*after write, iclass 37, count 2 2006.229.13:33:49.66#ibcon#*before return 0, iclass 37, count 2 2006.229.13:33:49.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:49.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:33:49.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:33:49.66#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:49.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:49.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:49.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:49.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:33:49.78#ibcon#first serial, iclass 37, count 0 2006.229.13:33:49.78#ibcon#enter sib2, iclass 37, count 0 2006.229.13:33:49.78#ibcon#flushed, iclass 37, count 0 2006.229.13:33:49.78#ibcon#about to write, iclass 37, count 0 2006.229.13:33:49.78#ibcon#wrote, iclass 37, count 0 2006.229.13:33:49.78#ibcon#about to read 3, iclass 37, count 0 2006.229.13:33:49.80#ibcon#read 3, iclass 37, count 0 2006.229.13:33:49.80#ibcon#about to read 4, iclass 37, count 0 2006.229.13:33:49.80#ibcon#read 4, iclass 37, count 0 2006.229.13:33:49.80#ibcon#about to read 5, iclass 37, count 0 2006.229.13:33:49.80#ibcon#read 5, iclass 37, count 0 2006.229.13:33:49.80#ibcon#about to read 6, iclass 37, count 0 2006.229.13:33:49.80#ibcon#read 6, iclass 37, count 0 2006.229.13:33:49.80#ibcon#end of sib2, iclass 37, count 0 2006.229.13:33:49.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:33:49.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:33:49.80#ibcon#[27=USB\r\n] 2006.229.13:33:49.80#ibcon#*before write, iclass 37, count 0 2006.229.13:33:49.80#ibcon#enter sib2, iclass 37, count 0 2006.229.13:33:49.80#ibcon#flushed, iclass 37, count 0 2006.229.13:33:49.80#ibcon#about to write, iclass 37, count 0 2006.229.13:33:49.80#ibcon#wrote, iclass 37, count 0 2006.229.13:33:49.80#ibcon#about to read 3, iclass 37, count 0 2006.229.13:33:49.83#ibcon#read 3, iclass 37, count 0 2006.229.13:33:49.83#ibcon#about to read 4, iclass 37, count 0 2006.229.13:33:49.83#ibcon#read 4, iclass 37, count 0 2006.229.13:33:49.83#ibcon#about to read 5, iclass 37, count 0 2006.229.13:33:49.83#ibcon#read 5, iclass 37, count 0 2006.229.13:33:49.83#ibcon#about to read 6, iclass 37, count 0 2006.229.13:33:49.83#ibcon#read 6, iclass 37, count 0 2006.229.13:33:49.83#ibcon#end of sib2, iclass 37, count 0 2006.229.13:33:49.83#ibcon#*after write, iclass 37, count 0 2006.229.13:33:49.83#ibcon#*before return 0, iclass 37, count 0 2006.229.13:33:49.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:49.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:33:49.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:33:49.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:33:49.83$vck44/vblo=7,734.99 2006.229.13:33:49.84#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:33:49.84#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:33:49.84#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:49.84#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:33:49.84#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:33:49.84#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:33:49.84#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:33:49.84#ibcon#first serial, iclass 39, count 0 2006.229.13:33:49.84#ibcon#enter sib2, iclass 39, count 0 2006.229.13:33:49.84#ibcon#flushed, iclass 39, count 0 2006.229.13:33:49.84#ibcon#about to write, iclass 39, count 0 2006.229.13:33:49.84#ibcon#wrote, iclass 39, count 0 2006.229.13:33:49.84#ibcon#about to read 3, iclass 39, count 0 2006.229.13:33:49.85#ibcon#read 3, iclass 39, count 0 2006.229.13:33:49.85#ibcon#about to read 4, iclass 39, count 0 2006.229.13:33:49.85#ibcon#read 4, iclass 39, count 0 2006.229.13:33:49.85#ibcon#about to read 5, iclass 39, count 0 2006.229.13:33:49.85#ibcon#read 5, iclass 39, count 0 2006.229.13:33:49.85#ibcon#about to read 6, iclass 39, count 0 2006.229.13:33:49.85#ibcon#read 6, iclass 39, count 0 2006.229.13:33:49.85#ibcon#end of sib2, iclass 39, count 0 2006.229.13:33:49.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:33:49.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:33:49.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:33:49.85#ibcon#*before write, iclass 39, count 0 2006.229.13:33:49.85#ibcon#enter sib2, iclass 39, count 0 2006.229.13:33:49.85#ibcon#flushed, iclass 39, count 0 2006.229.13:33:49.85#ibcon#about to write, iclass 39, count 0 2006.229.13:33:49.85#ibcon#wrote, iclass 39, count 0 2006.229.13:33:49.85#ibcon#about to read 3, iclass 39, count 0 2006.229.13:33:49.89#ibcon#read 3, iclass 39, count 0 2006.229.13:33:49.89#ibcon#about to read 4, iclass 39, count 0 2006.229.13:33:49.89#ibcon#read 4, iclass 39, count 0 2006.229.13:33:49.89#ibcon#about to read 5, iclass 39, count 0 2006.229.13:33:49.89#ibcon#read 5, iclass 39, count 0 2006.229.13:33:49.89#ibcon#about to read 6, iclass 39, count 0 2006.229.13:33:49.89#ibcon#read 6, iclass 39, count 0 2006.229.13:33:49.89#ibcon#end of sib2, iclass 39, count 0 2006.229.13:33:49.89#ibcon#*after write, iclass 39, count 0 2006.229.13:33:49.89#ibcon#*before return 0, iclass 39, count 0 2006.229.13:33:49.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:33:49.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:33:49.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:33:49.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:33:49.90$vck44/vb=7,4 2006.229.13:33:49.90#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.13:33:49.90#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.13:33:49.90#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:49.90#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:33:49.94#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:33:49.94#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:33:49.94#ibcon#enter wrdev, iclass 3, count 2 2006.229.13:33:49.94#ibcon#first serial, iclass 3, count 2 2006.229.13:33:49.94#ibcon#enter sib2, iclass 3, count 2 2006.229.13:33:49.94#ibcon#flushed, iclass 3, count 2 2006.229.13:33:49.94#ibcon#about to write, iclass 3, count 2 2006.229.13:33:49.94#ibcon#wrote, iclass 3, count 2 2006.229.13:33:49.94#ibcon#about to read 3, iclass 3, count 2 2006.229.13:33:49.96#ibcon#read 3, iclass 3, count 2 2006.229.13:33:49.96#ibcon#about to read 4, iclass 3, count 2 2006.229.13:33:49.96#ibcon#read 4, iclass 3, count 2 2006.229.13:33:49.96#ibcon#about to read 5, iclass 3, count 2 2006.229.13:33:49.96#ibcon#read 5, iclass 3, count 2 2006.229.13:33:49.96#ibcon#about to read 6, iclass 3, count 2 2006.229.13:33:49.96#ibcon#read 6, iclass 3, count 2 2006.229.13:33:49.96#ibcon#end of sib2, iclass 3, count 2 2006.229.13:33:49.96#ibcon#*mode == 0, iclass 3, count 2 2006.229.13:33:49.96#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.13:33:49.96#ibcon#[27=AT07-04\r\n] 2006.229.13:33:49.96#ibcon#*before write, iclass 3, count 2 2006.229.13:33:49.96#ibcon#enter sib2, iclass 3, count 2 2006.229.13:33:49.96#ibcon#flushed, iclass 3, count 2 2006.229.13:33:49.96#ibcon#about to write, iclass 3, count 2 2006.229.13:33:49.96#ibcon#wrote, iclass 3, count 2 2006.229.13:33:49.96#ibcon#about to read 3, iclass 3, count 2 2006.229.13:33:49.99#ibcon#read 3, iclass 3, count 2 2006.229.13:33:49.99#ibcon#about to read 4, iclass 3, count 2 2006.229.13:33:49.99#ibcon#read 4, iclass 3, count 2 2006.229.13:33:49.99#ibcon#about to read 5, iclass 3, count 2 2006.229.13:33:49.99#ibcon#read 5, iclass 3, count 2 2006.229.13:33:49.99#ibcon#about to read 6, iclass 3, count 2 2006.229.13:33:49.99#ibcon#read 6, iclass 3, count 2 2006.229.13:33:49.99#ibcon#end of sib2, iclass 3, count 2 2006.229.13:33:49.99#ibcon#*after write, iclass 3, count 2 2006.229.13:33:49.99#ibcon#*before return 0, iclass 3, count 2 2006.229.13:33:49.99#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:33:49.99#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:33:49.99#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.13:33:49.99#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:49.99#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:33:50.11#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:33:50.11#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:33:50.11#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:33:50.11#ibcon#first serial, iclass 3, count 0 2006.229.13:33:50.11#ibcon#enter sib2, iclass 3, count 0 2006.229.13:33:50.11#ibcon#flushed, iclass 3, count 0 2006.229.13:33:50.11#ibcon#about to write, iclass 3, count 0 2006.229.13:33:50.11#ibcon#wrote, iclass 3, count 0 2006.229.13:33:50.11#ibcon#about to read 3, iclass 3, count 0 2006.229.13:33:50.13#ibcon#read 3, iclass 3, count 0 2006.229.13:33:50.13#ibcon#about to read 4, iclass 3, count 0 2006.229.13:33:50.13#ibcon#read 4, iclass 3, count 0 2006.229.13:33:50.13#ibcon#about to read 5, iclass 3, count 0 2006.229.13:33:50.13#ibcon#read 5, iclass 3, count 0 2006.229.13:33:50.13#ibcon#about to read 6, iclass 3, count 0 2006.229.13:33:50.13#ibcon#read 6, iclass 3, count 0 2006.229.13:33:50.13#ibcon#end of sib2, iclass 3, count 0 2006.229.13:33:50.13#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:33:50.13#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:33:50.13#ibcon#[27=USB\r\n] 2006.229.13:33:50.13#ibcon#*before write, iclass 3, count 0 2006.229.13:33:50.13#ibcon#enter sib2, iclass 3, count 0 2006.229.13:33:50.13#ibcon#flushed, iclass 3, count 0 2006.229.13:33:50.13#ibcon#about to write, iclass 3, count 0 2006.229.13:33:50.13#ibcon#wrote, iclass 3, count 0 2006.229.13:33:50.13#ibcon#about to read 3, iclass 3, count 0 2006.229.13:33:50.16#ibcon#read 3, iclass 3, count 0 2006.229.13:33:50.16#ibcon#about to read 4, iclass 3, count 0 2006.229.13:33:50.16#ibcon#read 4, iclass 3, count 0 2006.229.13:33:50.16#ibcon#about to read 5, iclass 3, count 0 2006.229.13:33:50.16#ibcon#read 5, iclass 3, count 0 2006.229.13:33:50.16#ibcon#about to read 6, iclass 3, count 0 2006.229.13:33:50.16#ibcon#read 6, iclass 3, count 0 2006.229.13:33:50.16#ibcon#end of sib2, iclass 3, count 0 2006.229.13:33:50.16#ibcon#*after write, iclass 3, count 0 2006.229.13:33:50.16#ibcon#*before return 0, iclass 3, count 0 2006.229.13:33:50.16#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:33:50.16#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:33:50.16#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:33:50.16#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:33:50.17$vck44/vblo=8,744.99 2006.229.13:33:50.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:33:50.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:33:50.17#ibcon#ireg 17 cls_cnt 0 2006.229.13:33:50.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:33:50.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:33:50.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:33:50.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:33:50.17#ibcon#first serial, iclass 5, count 0 2006.229.13:33:50.17#ibcon#enter sib2, iclass 5, count 0 2006.229.13:33:50.17#ibcon#flushed, iclass 5, count 0 2006.229.13:33:50.17#ibcon#about to write, iclass 5, count 0 2006.229.13:33:50.17#ibcon#wrote, iclass 5, count 0 2006.229.13:33:50.17#ibcon#about to read 3, iclass 5, count 0 2006.229.13:33:50.18#ibcon#read 3, iclass 5, count 0 2006.229.13:33:50.18#ibcon#about to read 4, iclass 5, count 0 2006.229.13:33:50.18#ibcon#read 4, iclass 5, count 0 2006.229.13:33:50.18#ibcon#about to read 5, iclass 5, count 0 2006.229.13:33:50.18#ibcon#read 5, iclass 5, count 0 2006.229.13:33:50.18#ibcon#about to read 6, iclass 5, count 0 2006.229.13:33:50.18#ibcon#read 6, iclass 5, count 0 2006.229.13:33:50.18#ibcon#end of sib2, iclass 5, count 0 2006.229.13:33:50.18#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:33:50.18#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:33:50.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:33:50.18#ibcon#*before write, iclass 5, count 0 2006.229.13:33:50.18#ibcon#enter sib2, iclass 5, count 0 2006.229.13:33:50.18#ibcon#flushed, iclass 5, count 0 2006.229.13:33:50.18#ibcon#about to write, iclass 5, count 0 2006.229.13:33:50.18#ibcon#wrote, iclass 5, count 0 2006.229.13:33:50.18#ibcon#about to read 3, iclass 5, count 0 2006.229.13:33:50.22#ibcon#read 3, iclass 5, count 0 2006.229.13:33:50.22#ibcon#about to read 4, iclass 5, count 0 2006.229.13:33:50.22#ibcon#read 4, iclass 5, count 0 2006.229.13:33:50.22#ibcon#about to read 5, iclass 5, count 0 2006.229.13:33:50.22#ibcon#read 5, iclass 5, count 0 2006.229.13:33:50.22#ibcon#about to read 6, iclass 5, count 0 2006.229.13:33:50.22#ibcon#read 6, iclass 5, count 0 2006.229.13:33:50.22#ibcon#end of sib2, iclass 5, count 0 2006.229.13:33:50.22#ibcon#*after write, iclass 5, count 0 2006.229.13:33:50.22#ibcon#*before return 0, iclass 5, count 0 2006.229.13:33:50.22#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:33:50.22#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:33:50.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:33:50.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:33:50.23$vck44/vb=8,4 2006.229.13:33:50.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:33:50.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:33:50.23#ibcon#ireg 11 cls_cnt 2 2006.229.13:33:50.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:50.27#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:50.27#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:50.27#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:33:50.27#ibcon#first serial, iclass 7, count 2 2006.229.13:33:50.27#ibcon#enter sib2, iclass 7, count 2 2006.229.13:33:50.27#ibcon#flushed, iclass 7, count 2 2006.229.13:33:50.27#ibcon#about to write, iclass 7, count 2 2006.229.13:33:50.27#ibcon#wrote, iclass 7, count 2 2006.229.13:33:50.27#ibcon#about to read 3, iclass 7, count 2 2006.229.13:33:50.29#ibcon#read 3, iclass 7, count 2 2006.229.13:33:50.29#ibcon#about to read 4, iclass 7, count 2 2006.229.13:33:50.29#ibcon#read 4, iclass 7, count 2 2006.229.13:33:50.29#ibcon#about to read 5, iclass 7, count 2 2006.229.13:33:50.29#ibcon#read 5, iclass 7, count 2 2006.229.13:33:50.29#ibcon#about to read 6, iclass 7, count 2 2006.229.13:33:50.29#ibcon#read 6, iclass 7, count 2 2006.229.13:33:50.29#ibcon#end of sib2, iclass 7, count 2 2006.229.13:33:50.29#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:33:50.29#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:33:50.29#ibcon#[27=AT08-04\r\n] 2006.229.13:33:50.29#ibcon#*before write, iclass 7, count 2 2006.229.13:33:50.29#ibcon#enter sib2, iclass 7, count 2 2006.229.13:33:50.29#ibcon#flushed, iclass 7, count 2 2006.229.13:33:50.29#ibcon#about to write, iclass 7, count 2 2006.229.13:33:50.29#ibcon#wrote, iclass 7, count 2 2006.229.13:33:50.29#ibcon#about to read 3, iclass 7, count 2 2006.229.13:33:50.32#ibcon#read 3, iclass 7, count 2 2006.229.13:33:50.32#ibcon#about to read 4, iclass 7, count 2 2006.229.13:33:50.32#ibcon#read 4, iclass 7, count 2 2006.229.13:33:50.32#ibcon#about to read 5, iclass 7, count 2 2006.229.13:33:50.32#ibcon#read 5, iclass 7, count 2 2006.229.13:33:50.32#ibcon#about to read 6, iclass 7, count 2 2006.229.13:33:50.32#ibcon#read 6, iclass 7, count 2 2006.229.13:33:50.32#ibcon#end of sib2, iclass 7, count 2 2006.229.13:33:50.32#ibcon#*after write, iclass 7, count 2 2006.229.13:33:50.32#ibcon#*before return 0, iclass 7, count 2 2006.229.13:33:50.32#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:50.32#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:33:50.32#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:33:50.32#ibcon#ireg 7 cls_cnt 0 2006.229.13:33:50.32#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:50.44#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:50.44#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:50.44#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:33:50.44#ibcon#first serial, iclass 7, count 0 2006.229.13:33:50.44#ibcon#enter sib2, iclass 7, count 0 2006.229.13:33:50.44#ibcon#flushed, iclass 7, count 0 2006.229.13:33:50.44#ibcon#about to write, iclass 7, count 0 2006.229.13:33:50.44#ibcon#wrote, iclass 7, count 0 2006.229.13:33:50.44#ibcon#about to read 3, iclass 7, count 0 2006.229.13:33:50.46#ibcon#read 3, iclass 7, count 0 2006.229.13:33:50.46#ibcon#about to read 4, iclass 7, count 0 2006.229.13:33:50.46#ibcon#read 4, iclass 7, count 0 2006.229.13:33:50.46#ibcon#about to read 5, iclass 7, count 0 2006.229.13:33:50.46#ibcon#read 5, iclass 7, count 0 2006.229.13:33:50.46#ibcon#about to read 6, iclass 7, count 0 2006.229.13:33:50.46#ibcon#read 6, iclass 7, count 0 2006.229.13:33:50.46#ibcon#end of sib2, iclass 7, count 0 2006.229.13:33:50.46#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:33:50.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:33:50.46#ibcon#[27=USB\r\n] 2006.229.13:33:50.46#ibcon#*before write, iclass 7, count 0 2006.229.13:33:50.46#ibcon#enter sib2, iclass 7, count 0 2006.229.13:33:50.46#ibcon#flushed, iclass 7, count 0 2006.229.13:33:50.46#ibcon#about to write, iclass 7, count 0 2006.229.13:33:50.46#ibcon#wrote, iclass 7, count 0 2006.229.13:33:50.46#ibcon#about to read 3, iclass 7, count 0 2006.229.13:33:50.49#ibcon#read 3, iclass 7, count 0 2006.229.13:33:50.49#ibcon#about to read 4, iclass 7, count 0 2006.229.13:33:50.49#ibcon#read 4, iclass 7, count 0 2006.229.13:33:50.49#ibcon#about to read 5, iclass 7, count 0 2006.229.13:33:50.49#ibcon#read 5, iclass 7, count 0 2006.229.13:33:50.49#ibcon#about to read 6, iclass 7, count 0 2006.229.13:33:50.49#ibcon#read 6, iclass 7, count 0 2006.229.13:33:50.49#ibcon#end of sib2, iclass 7, count 0 2006.229.13:33:50.49#ibcon#*after write, iclass 7, count 0 2006.229.13:33:50.49#ibcon#*before return 0, iclass 7, count 0 2006.229.13:33:50.49#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:50.49#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:33:50.49#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:33:50.49#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:33:50.50$vck44/vabw=wide 2006.229.13:33:50.50#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:33:50.50#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:33:50.50#ibcon#ireg 8 cls_cnt 0 2006.229.13:33:50.50#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:50.50#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:50.50#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:50.50#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:33:50.50#ibcon#first serial, iclass 11, count 0 2006.229.13:33:50.50#ibcon#enter sib2, iclass 11, count 0 2006.229.13:33:50.50#ibcon#flushed, iclass 11, count 0 2006.229.13:33:50.50#ibcon#about to write, iclass 11, count 0 2006.229.13:33:50.50#ibcon#wrote, iclass 11, count 0 2006.229.13:33:50.50#ibcon#about to read 3, iclass 11, count 0 2006.229.13:33:50.51#ibcon#read 3, iclass 11, count 0 2006.229.13:33:50.51#ibcon#about to read 4, iclass 11, count 0 2006.229.13:33:50.51#ibcon#read 4, iclass 11, count 0 2006.229.13:33:50.51#ibcon#about to read 5, iclass 11, count 0 2006.229.13:33:50.51#ibcon#read 5, iclass 11, count 0 2006.229.13:33:50.51#ibcon#about to read 6, iclass 11, count 0 2006.229.13:33:50.51#ibcon#read 6, iclass 11, count 0 2006.229.13:33:50.51#ibcon#end of sib2, iclass 11, count 0 2006.229.13:33:50.51#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:33:50.51#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:33:50.51#ibcon#[25=BW32\r\n] 2006.229.13:33:50.51#ibcon#*before write, iclass 11, count 0 2006.229.13:33:50.51#ibcon#enter sib2, iclass 11, count 0 2006.229.13:33:50.51#ibcon#flushed, iclass 11, count 0 2006.229.13:33:50.51#ibcon#about to write, iclass 11, count 0 2006.229.13:33:50.51#ibcon#wrote, iclass 11, count 0 2006.229.13:33:50.51#ibcon#about to read 3, iclass 11, count 0 2006.229.13:33:50.54#ibcon#read 3, iclass 11, count 0 2006.229.13:33:50.54#ibcon#about to read 4, iclass 11, count 0 2006.229.13:33:50.54#ibcon#read 4, iclass 11, count 0 2006.229.13:33:50.54#ibcon#about to read 5, iclass 11, count 0 2006.229.13:33:50.54#ibcon#read 5, iclass 11, count 0 2006.229.13:33:50.54#ibcon#about to read 6, iclass 11, count 0 2006.229.13:33:50.54#ibcon#read 6, iclass 11, count 0 2006.229.13:33:50.54#ibcon#end of sib2, iclass 11, count 0 2006.229.13:33:50.54#ibcon#*after write, iclass 11, count 0 2006.229.13:33:50.54#ibcon#*before return 0, iclass 11, count 0 2006.229.13:33:50.54#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:50.54#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:33:50.54#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:33:50.54#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:33:50.55$vck44/vbbw=wide 2006.229.13:33:50.55#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:33:50.55#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:33:50.55#ibcon#ireg 8 cls_cnt 0 2006.229.13:33:50.55#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:33:50.60#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:33:50.60#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:33:50.60#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:33:50.60#ibcon#first serial, iclass 13, count 0 2006.229.13:33:50.60#ibcon#enter sib2, iclass 13, count 0 2006.229.13:33:50.60#ibcon#flushed, iclass 13, count 0 2006.229.13:33:50.60#ibcon#about to write, iclass 13, count 0 2006.229.13:33:50.60#ibcon#wrote, iclass 13, count 0 2006.229.13:33:50.60#ibcon#about to read 3, iclass 13, count 0 2006.229.13:33:50.62#ibcon#read 3, iclass 13, count 0 2006.229.13:33:50.62#ibcon#about to read 4, iclass 13, count 0 2006.229.13:33:50.62#ibcon#read 4, iclass 13, count 0 2006.229.13:33:50.62#ibcon#about to read 5, iclass 13, count 0 2006.229.13:33:50.62#ibcon#read 5, iclass 13, count 0 2006.229.13:33:50.62#ibcon#about to read 6, iclass 13, count 0 2006.229.13:33:50.62#ibcon#read 6, iclass 13, count 0 2006.229.13:33:50.62#ibcon#end of sib2, iclass 13, count 0 2006.229.13:33:50.62#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:33:50.62#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:33:50.62#ibcon#[27=BW32\r\n] 2006.229.13:33:50.62#ibcon#*before write, iclass 13, count 0 2006.229.13:33:50.62#ibcon#enter sib2, iclass 13, count 0 2006.229.13:33:50.62#ibcon#flushed, iclass 13, count 0 2006.229.13:33:50.62#ibcon#about to write, iclass 13, count 0 2006.229.13:33:50.62#ibcon#wrote, iclass 13, count 0 2006.229.13:33:50.62#ibcon#about to read 3, iclass 13, count 0 2006.229.13:33:50.65#ibcon#read 3, iclass 13, count 0 2006.229.13:33:50.65#ibcon#about to read 4, iclass 13, count 0 2006.229.13:33:50.65#ibcon#read 4, iclass 13, count 0 2006.229.13:33:50.65#ibcon#about to read 5, iclass 13, count 0 2006.229.13:33:50.65#ibcon#read 5, iclass 13, count 0 2006.229.13:33:50.65#ibcon#about to read 6, iclass 13, count 0 2006.229.13:33:50.65#ibcon#read 6, iclass 13, count 0 2006.229.13:33:50.65#ibcon#end of sib2, iclass 13, count 0 2006.229.13:33:50.65#ibcon#*after write, iclass 13, count 0 2006.229.13:33:50.65#ibcon#*before return 0, iclass 13, count 0 2006.229.13:33:50.65#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:33:50.65#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:33:50.65#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:33:50.65#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:33:50.66$setupk4/ifdk4 2006.229.13:33:50.66$ifdk4/lo= 2006.229.13:33:50.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:33:50.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:33:50.66$ifdk4/patch= 2006.229.13:33:50.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:33:50.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:33:50.66$setupk4/!*+20s 2006.229.13:33:57.36#abcon#<5=/04 1.7 2.6 27.561001002.1\r\n> 2006.229.13:33:57.38#abcon#{5=INTERFACE CLEAR} 2006.229.13:33:57.44#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:34:05.27$setupk4/"tpicd 2006.229.13:34:05.27$setupk4/echo=off 2006.229.13:34:05.27$setupk4/xlog=off 2006.229.13:34:05.27:!2006.229.13:37:47 2006.229.13:34:17.14#trakl#Source acquired 2006.229.13:34:19.14#flagr#flagr/antenna,acquired 2006.229.13:37:47.00:preob 2006.229.13:37:47.14/onsource/TRACKING 2006.229.13:37:47.14:!2006.229.13:37:57 2006.229.13:37:57.00:"tape 2006.229.13:37:57.00:"st=record 2006.229.13:37:57.00:data_valid=on 2006.229.13:37:57.00:midob 2006.229.13:37:58.14/onsource/TRACKING 2006.229.13:37:58.14/wx/27.55,1002.1,100 2006.229.13:37:58.21/cable/+6.4117E-03 2006.229.13:37:59.30/va/01,08,usb,yes,30,33 2006.229.13:37:59.30/va/02,07,usb,yes,33,33 2006.229.13:37:59.30/va/03,06,usb,yes,41,43 2006.229.13:37:59.30/va/04,07,usb,yes,34,35 2006.229.13:37:59.30/va/05,04,usb,yes,30,31 2006.229.13:37:59.30/va/06,04,usb,yes,34,33 2006.229.13:37:59.30/va/07,05,usb,yes,30,30 2006.229.13:37:59.30/va/08,06,usb,yes,22,27 2006.229.13:37:59.53/valo/01,524.99,yes,locked 2006.229.13:37:59.53/valo/02,534.99,yes,locked 2006.229.13:37:59.53/valo/03,564.99,yes,locked 2006.229.13:37:59.53/valo/04,624.99,yes,locked 2006.229.13:37:59.53/valo/05,734.99,yes,locked 2006.229.13:37:59.53/valo/06,814.99,yes,locked 2006.229.13:37:59.53/valo/07,864.99,yes,locked 2006.229.13:37:59.53/valo/08,884.99,yes,locked 2006.229.13:38:00.62/vb/01,04,usb,yes,33,29 2006.229.13:38:00.62/vb/02,04,usb,yes,34,35 2006.229.13:38:00.62/vb/03,04,usb,yes,31,34 2006.229.13:38:00.62/vb/04,04,usb,yes,35,34 2006.229.13:38:00.62/vb/05,04,usb,yes,27,30 2006.229.13:38:00.62/vb/06,04,usb,yes,32,28 2006.229.13:38:00.62/vb/07,04,usb,yes,32,32 2006.229.13:38:00.62/vb/08,04,usb,yes,29,33 2006.229.13:38:00.86/vblo/01,629.99,yes,locked 2006.229.13:38:00.86/vblo/02,634.99,yes,locked 2006.229.13:38:00.86/vblo/03,649.99,yes,locked 2006.229.13:38:00.86/vblo/04,679.99,yes,locked 2006.229.13:38:00.86/vblo/05,709.99,yes,locked 2006.229.13:38:00.86/vblo/06,719.99,yes,locked 2006.229.13:38:00.86/vblo/07,734.99,yes,locked 2006.229.13:38:00.86/vblo/08,744.99,yes,locked 2006.229.13:38:01.01/vabw/8 2006.229.13:38:01.16/vbbw/8 2006.229.13:38:01.25/xfe/off,on,12.0 2006.229.13:38:01.64/ifatt/23,28,28,28 2006.229.13:38:02.07/fmout-gps/S +4.64E-07 2006.229.13:38:02.11:!2006.229.13:38:37 2006.229.13:38:37.01:data_valid=off 2006.229.13:38:37.02:"et 2006.229.13:38:37.02:!+3s 2006.229.13:38:40.03:"tape 2006.229.13:38:40.04:postob 2006.229.13:38:40.18/cable/+6.4106E-03 2006.229.13:38:40.19/wx/27.55,1002.1,100 2006.229.13:38:40.25/fmout-gps/S +4.64E-07 2006.229.13:38:40.26:scan_name=229-1340,jd0608,70 2006.229.13:38:40.26:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.13:38:42.14#flagr#flagr/antenna,new-source 2006.229.13:38:42.15:checkk5 2006.229.13:38:42.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:38:42.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:38:43.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:38:43.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:38:44.15/chk_obsdata//k5ts1/T2291337??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:38:44.55/chk_obsdata//k5ts2/T2291337??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:38:44.97/chk_obsdata//k5ts3/T2291337??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:38:45.37/chk_obsdata//k5ts4/T2291337??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.13:38:46.09/k5log//k5ts1_log_newline 2006.229.13:38:46.81/k5log//k5ts2_log_newline 2006.229.13:38:47.50/k5log//k5ts3_log_newline 2006.229.13:38:48.22/k5log//k5ts4_log_newline 2006.229.13:38:48.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:38:48.24:setupk4=1 2006.229.13:38:48.24$setupk4/echo=on 2006.229.13:38:48.24$setupk4/pcalon 2006.229.13:38:48.24$pcalon/"no phase cal control is implemented here 2006.229.13:38:48.24$setupk4/"tpicd=stop 2006.229.13:38:48.24$setupk4/"rec=synch_on 2006.229.13:38:48.24$setupk4/"rec_mode=128 2006.229.13:38:48.24$setupk4/!* 2006.229.13:38:48.24$setupk4/recpk4 2006.229.13:38:48.24$recpk4/recpatch= 2006.229.13:38:48.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:38:48.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:38:48.25$setupk4/vck44 2006.229.13:38:48.25$vck44/valo=1,524.99 2006.229.13:38:48.25#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.13:38:48.25#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.13:38:48.25#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:48.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:48.25#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:48.25#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:48.25#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:38:48.25#ibcon#first serial, iclass 26, count 0 2006.229.13:38:48.25#ibcon#enter sib2, iclass 26, count 0 2006.229.13:38:48.25#ibcon#flushed, iclass 26, count 0 2006.229.13:38:48.25#ibcon#about to write, iclass 26, count 0 2006.229.13:38:48.25#ibcon#wrote, iclass 26, count 0 2006.229.13:38:48.25#ibcon#about to read 3, iclass 26, count 0 2006.229.13:38:48.26#ibcon#read 3, iclass 26, count 0 2006.229.13:38:48.26#ibcon#about to read 4, iclass 26, count 0 2006.229.13:38:48.26#ibcon#read 4, iclass 26, count 0 2006.229.13:38:48.26#ibcon#about to read 5, iclass 26, count 0 2006.229.13:38:48.26#ibcon#read 5, iclass 26, count 0 2006.229.13:38:48.26#ibcon#about to read 6, iclass 26, count 0 2006.229.13:38:48.26#ibcon#read 6, iclass 26, count 0 2006.229.13:38:48.26#ibcon#end of sib2, iclass 26, count 0 2006.229.13:38:48.26#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:38:48.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:38:48.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:38:48.26#ibcon#*before write, iclass 26, count 0 2006.229.13:38:48.26#ibcon#enter sib2, iclass 26, count 0 2006.229.13:38:48.26#ibcon#flushed, iclass 26, count 0 2006.229.13:38:48.26#ibcon#about to write, iclass 26, count 0 2006.229.13:38:48.26#ibcon#wrote, iclass 26, count 0 2006.229.13:38:48.26#ibcon#about to read 3, iclass 26, count 0 2006.229.13:38:48.31#ibcon#read 3, iclass 26, count 0 2006.229.13:38:48.31#ibcon#about to read 4, iclass 26, count 0 2006.229.13:38:48.31#ibcon#read 4, iclass 26, count 0 2006.229.13:38:48.31#ibcon#about to read 5, iclass 26, count 0 2006.229.13:38:48.31#ibcon#read 5, iclass 26, count 0 2006.229.13:38:48.31#ibcon#about to read 6, iclass 26, count 0 2006.229.13:38:48.31#ibcon#read 6, iclass 26, count 0 2006.229.13:38:48.31#ibcon#end of sib2, iclass 26, count 0 2006.229.13:38:48.31#ibcon#*after write, iclass 26, count 0 2006.229.13:38:48.31#ibcon#*before return 0, iclass 26, count 0 2006.229.13:38:48.31#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:48.31#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:48.31#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:38:48.31#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:38:48.31$vck44/va=1,8 2006.229.13:38:48.31#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.13:38:48.31#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.13:38:48.31#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:48.31#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:48.31#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:48.31#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:48.31#ibcon#enter wrdev, iclass 28, count 2 2006.229.13:38:48.31#ibcon#first serial, iclass 28, count 2 2006.229.13:38:48.31#ibcon#enter sib2, iclass 28, count 2 2006.229.13:38:48.31#ibcon#flushed, iclass 28, count 2 2006.229.13:38:48.31#ibcon#about to write, iclass 28, count 2 2006.229.13:38:48.31#ibcon#wrote, iclass 28, count 2 2006.229.13:38:48.31#ibcon#about to read 3, iclass 28, count 2 2006.229.13:38:48.33#ibcon#read 3, iclass 28, count 2 2006.229.13:38:48.33#ibcon#about to read 4, iclass 28, count 2 2006.229.13:38:48.33#ibcon#read 4, iclass 28, count 2 2006.229.13:38:48.33#ibcon#about to read 5, iclass 28, count 2 2006.229.13:38:48.33#ibcon#read 5, iclass 28, count 2 2006.229.13:38:48.33#ibcon#about to read 6, iclass 28, count 2 2006.229.13:38:48.33#ibcon#read 6, iclass 28, count 2 2006.229.13:38:48.33#ibcon#end of sib2, iclass 28, count 2 2006.229.13:38:48.33#ibcon#*mode == 0, iclass 28, count 2 2006.229.13:38:48.33#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.13:38:48.33#ibcon#[25=AT01-08\r\n] 2006.229.13:38:48.33#ibcon#*before write, iclass 28, count 2 2006.229.13:38:48.33#ibcon#enter sib2, iclass 28, count 2 2006.229.13:38:48.33#ibcon#flushed, iclass 28, count 2 2006.229.13:38:48.33#ibcon#about to write, iclass 28, count 2 2006.229.13:38:48.33#ibcon#wrote, iclass 28, count 2 2006.229.13:38:48.33#ibcon#about to read 3, iclass 28, count 2 2006.229.13:38:48.36#ibcon#read 3, iclass 28, count 2 2006.229.13:38:48.36#ibcon#about to read 4, iclass 28, count 2 2006.229.13:38:48.36#ibcon#read 4, iclass 28, count 2 2006.229.13:38:48.36#ibcon#about to read 5, iclass 28, count 2 2006.229.13:38:48.36#ibcon#read 5, iclass 28, count 2 2006.229.13:38:48.36#ibcon#about to read 6, iclass 28, count 2 2006.229.13:38:48.36#ibcon#read 6, iclass 28, count 2 2006.229.13:38:48.36#ibcon#end of sib2, iclass 28, count 2 2006.229.13:38:48.36#ibcon#*after write, iclass 28, count 2 2006.229.13:38:48.36#ibcon#*before return 0, iclass 28, count 2 2006.229.13:38:48.36#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:48.36#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:48.36#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.13:38:48.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:48.36#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:48.48#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:48.48#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:48.48#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:38:48.48#ibcon#first serial, iclass 28, count 0 2006.229.13:38:48.48#ibcon#enter sib2, iclass 28, count 0 2006.229.13:38:48.48#ibcon#flushed, iclass 28, count 0 2006.229.13:38:48.48#ibcon#about to write, iclass 28, count 0 2006.229.13:38:48.48#ibcon#wrote, iclass 28, count 0 2006.229.13:38:48.48#ibcon#about to read 3, iclass 28, count 0 2006.229.13:38:48.50#ibcon#read 3, iclass 28, count 0 2006.229.13:38:48.50#ibcon#about to read 4, iclass 28, count 0 2006.229.13:38:48.50#ibcon#read 4, iclass 28, count 0 2006.229.13:38:48.50#ibcon#about to read 5, iclass 28, count 0 2006.229.13:38:48.50#ibcon#read 5, iclass 28, count 0 2006.229.13:38:48.50#ibcon#about to read 6, iclass 28, count 0 2006.229.13:38:48.50#ibcon#read 6, iclass 28, count 0 2006.229.13:38:48.50#ibcon#end of sib2, iclass 28, count 0 2006.229.13:38:48.50#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:38:48.50#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:38:48.50#ibcon#[25=USB\r\n] 2006.229.13:38:48.50#ibcon#*before write, iclass 28, count 0 2006.229.13:38:48.50#ibcon#enter sib2, iclass 28, count 0 2006.229.13:38:48.50#ibcon#flushed, iclass 28, count 0 2006.229.13:38:48.50#ibcon#about to write, iclass 28, count 0 2006.229.13:38:48.50#ibcon#wrote, iclass 28, count 0 2006.229.13:38:48.50#ibcon#about to read 3, iclass 28, count 0 2006.229.13:38:48.53#ibcon#read 3, iclass 28, count 0 2006.229.13:38:48.53#ibcon#about to read 4, iclass 28, count 0 2006.229.13:38:48.53#ibcon#read 4, iclass 28, count 0 2006.229.13:38:48.53#ibcon#about to read 5, iclass 28, count 0 2006.229.13:38:48.53#ibcon#read 5, iclass 28, count 0 2006.229.13:38:48.53#ibcon#about to read 6, iclass 28, count 0 2006.229.13:38:48.53#ibcon#read 6, iclass 28, count 0 2006.229.13:38:48.53#ibcon#end of sib2, iclass 28, count 0 2006.229.13:38:48.53#ibcon#*after write, iclass 28, count 0 2006.229.13:38:48.53#ibcon#*before return 0, iclass 28, count 0 2006.229.13:38:48.53#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:48.53#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:48.53#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:38:48.53#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:38:48.53$vck44/valo=2,534.99 2006.229.13:38:48.53#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.13:38:48.53#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.13:38:48.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:48.53#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:48.53#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:48.53#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:48.53#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:38:48.53#ibcon#first serial, iclass 30, count 0 2006.229.13:38:48.53#ibcon#enter sib2, iclass 30, count 0 2006.229.13:38:48.53#ibcon#flushed, iclass 30, count 0 2006.229.13:38:48.53#ibcon#about to write, iclass 30, count 0 2006.229.13:38:48.53#ibcon#wrote, iclass 30, count 0 2006.229.13:38:48.53#ibcon#about to read 3, iclass 30, count 0 2006.229.13:38:48.55#ibcon#read 3, iclass 30, count 0 2006.229.13:38:48.55#ibcon#about to read 4, iclass 30, count 0 2006.229.13:38:48.55#ibcon#read 4, iclass 30, count 0 2006.229.13:38:48.55#ibcon#about to read 5, iclass 30, count 0 2006.229.13:38:48.55#ibcon#read 5, iclass 30, count 0 2006.229.13:38:48.55#ibcon#about to read 6, iclass 30, count 0 2006.229.13:38:48.55#ibcon#read 6, iclass 30, count 0 2006.229.13:38:48.55#ibcon#end of sib2, iclass 30, count 0 2006.229.13:38:48.55#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:38:48.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:38:48.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:38:48.55#ibcon#*before write, iclass 30, count 0 2006.229.13:38:48.55#ibcon#enter sib2, iclass 30, count 0 2006.229.13:38:48.55#ibcon#flushed, iclass 30, count 0 2006.229.13:38:48.55#ibcon#about to write, iclass 30, count 0 2006.229.13:38:48.55#ibcon#wrote, iclass 30, count 0 2006.229.13:38:48.55#ibcon#about to read 3, iclass 30, count 0 2006.229.13:38:48.59#ibcon#read 3, iclass 30, count 0 2006.229.13:38:48.59#ibcon#about to read 4, iclass 30, count 0 2006.229.13:38:48.59#ibcon#read 4, iclass 30, count 0 2006.229.13:38:48.59#ibcon#about to read 5, iclass 30, count 0 2006.229.13:38:48.59#ibcon#read 5, iclass 30, count 0 2006.229.13:38:48.59#ibcon#about to read 6, iclass 30, count 0 2006.229.13:38:48.59#ibcon#read 6, iclass 30, count 0 2006.229.13:38:48.59#ibcon#end of sib2, iclass 30, count 0 2006.229.13:38:48.59#ibcon#*after write, iclass 30, count 0 2006.229.13:38:48.59#ibcon#*before return 0, iclass 30, count 0 2006.229.13:38:48.59#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:48.59#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:48.59#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:38:48.59#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:38:48.59$vck44/va=2,7 2006.229.13:38:48.59#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.13:38:48.59#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.13:38:48.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:48.59#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:48.65#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:48.65#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:48.65#ibcon#enter wrdev, iclass 32, count 2 2006.229.13:38:48.65#ibcon#first serial, iclass 32, count 2 2006.229.13:38:48.65#ibcon#enter sib2, iclass 32, count 2 2006.229.13:38:48.65#ibcon#flushed, iclass 32, count 2 2006.229.13:38:48.65#ibcon#about to write, iclass 32, count 2 2006.229.13:38:48.65#ibcon#wrote, iclass 32, count 2 2006.229.13:38:48.65#ibcon#about to read 3, iclass 32, count 2 2006.229.13:38:48.67#ibcon#read 3, iclass 32, count 2 2006.229.13:38:48.67#ibcon#about to read 4, iclass 32, count 2 2006.229.13:38:48.67#ibcon#read 4, iclass 32, count 2 2006.229.13:38:48.67#ibcon#about to read 5, iclass 32, count 2 2006.229.13:38:48.67#ibcon#read 5, iclass 32, count 2 2006.229.13:38:48.67#ibcon#about to read 6, iclass 32, count 2 2006.229.13:38:48.67#ibcon#read 6, iclass 32, count 2 2006.229.13:38:48.67#ibcon#end of sib2, iclass 32, count 2 2006.229.13:38:48.67#ibcon#*mode == 0, iclass 32, count 2 2006.229.13:38:48.67#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.13:38:48.67#ibcon#[25=AT02-07\r\n] 2006.229.13:38:48.67#ibcon#*before write, iclass 32, count 2 2006.229.13:38:48.67#ibcon#enter sib2, iclass 32, count 2 2006.229.13:38:48.67#ibcon#flushed, iclass 32, count 2 2006.229.13:38:48.67#ibcon#about to write, iclass 32, count 2 2006.229.13:38:48.67#ibcon#wrote, iclass 32, count 2 2006.229.13:38:48.67#ibcon#about to read 3, iclass 32, count 2 2006.229.13:38:48.70#ibcon#read 3, iclass 32, count 2 2006.229.13:38:48.70#ibcon#about to read 4, iclass 32, count 2 2006.229.13:38:48.70#ibcon#read 4, iclass 32, count 2 2006.229.13:38:48.70#ibcon#about to read 5, iclass 32, count 2 2006.229.13:38:48.70#ibcon#read 5, iclass 32, count 2 2006.229.13:38:48.70#ibcon#about to read 6, iclass 32, count 2 2006.229.13:38:48.70#ibcon#read 6, iclass 32, count 2 2006.229.13:38:48.70#ibcon#end of sib2, iclass 32, count 2 2006.229.13:38:48.70#ibcon#*after write, iclass 32, count 2 2006.229.13:38:48.70#ibcon#*before return 0, iclass 32, count 2 2006.229.13:38:48.70#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:48.70#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:48.70#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.13:38:48.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:48.70#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:48.82#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:48.82#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:48.82#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:38:48.82#ibcon#first serial, iclass 32, count 0 2006.229.13:38:48.82#ibcon#enter sib2, iclass 32, count 0 2006.229.13:38:48.82#ibcon#flushed, iclass 32, count 0 2006.229.13:38:48.82#ibcon#about to write, iclass 32, count 0 2006.229.13:38:48.82#ibcon#wrote, iclass 32, count 0 2006.229.13:38:48.82#ibcon#about to read 3, iclass 32, count 0 2006.229.13:38:48.84#ibcon#read 3, iclass 32, count 0 2006.229.13:38:48.84#ibcon#about to read 4, iclass 32, count 0 2006.229.13:38:48.84#ibcon#read 4, iclass 32, count 0 2006.229.13:38:48.84#ibcon#about to read 5, iclass 32, count 0 2006.229.13:38:48.84#ibcon#read 5, iclass 32, count 0 2006.229.13:38:48.84#ibcon#about to read 6, iclass 32, count 0 2006.229.13:38:48.84#ibcon#read 6, iclass 32, count 0 2006.229.13:38:48.84#ibcon#end of sib2, iclass 32, count 0 2006.229.13:38:48.84#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:38:48.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:38:48.84#ibcon#[25=USB\r\n] 2006.229.13:38:48.84#ibcon#*before write, iclass 32, count 0 2006.229.13:38:48.84#ibcon#enter sib2, iclass 32, count 0 2006.229.13:38:48.84#ibcon#flushed, iclass 32, count 0 2006.229.13:38:48.84#ibcon#about to write, iclass 32, count 0 2006.229.13:38:48.84#ibcon#wrote, iclass 32, count 0 2006.229.13:38:48.84#ibcon#about to read 3, iclass 32, count 0 2006.229.13:38:48.87#ibcon#read 3, iclass 32, count 0 2006.229.13:38:48.87#ibcon#about to read 4, iclass 32, count 0 2006.229.13:38:48.87#ibcon#read 4, iclass 32, count 0 2006.229.13:38:48.87#ibcon#about to read 5, iclass 32, count 0 2006.229.13:38:48.87#ibcon#read 5, iclass 32, count 0 2006.229.13:38:48.87#ibcon#about to read 6, iclass 32, count 0 2006.229.13:38:48.87#ibcon#read 6, iclass 32, count 0 2006.229.13:38:48.87#ibcon#end of sib2, iclass 32, count 0 2006.229.13:38:48.87#ibcon#*after write, iclass 32, count 0 2006.229.13:38:48.87#ibcon#*before return 0, iclass 32, count 0 2006.229.13:38:48.87#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:48.87#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:48.87#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:38:48.87#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:38:48.87$vck44/valo=3,564.99 2006.229.13:38:48.87#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.13:38:48.87#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.13:38:48.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:48.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:48.87#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:48.87#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:48.87#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:38:48.87#ibcon#first serial, iclass 34, count 0 2006.229.13:38:48.87#ibcon#enter sib2, iclass 34, count 0 2006.229.13:38:48.87#ibcon#flushed, iclass 34, count 0 2006.229.13:38:48.87#ibcon#about to write, iclass 34, count 0 2006.229.13:38:48.87#ibcon#wrote, iclass 34, count 0 2006.229.13:38:48.87#ibcon#about to read 3, iclass 34, count 0 2006.229.13:38:48.89#ibcon#read 3, iclass 34, count 0 2006.229.13:38:48.89#ibcon#about to read 4, iclass 34, count 0 2006.229.13:38:48.89#ibcon#read 4, iclass 34, count 0 2006.229.13:38:48.89#ibcon#about to read 5, iclass 34, count 0 2006.229.13:38:48.89#ibcon#read 5, iclass 34, count 0 2006.229.13:38:48.89#ibcon#about to read 6, iclass 34, count 0 2006.229.13:38:48.89#ibcon#read 6, iclass 34, count 0 2006.229.13:38:48.89#ibcon#end of sib2, iclass 34, count 0 2006.229.13:38:48.89#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:38:48.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:38:48.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:38:48.89#ibcon#*before write, iclass 34, count 0 2006.229.13:38:48.89#ibcon#enter sib2, iclass 34, count 0 2006.229.13:38:48.89#ibcon#flushed, iclass 34, count 0 2006.229.13:38:48.89#ibcon#about to write, iclass 34, count 0 2006.229.13:38:48.89#ibcon#wrote, iclass 34, count 0 2006.229.13:38:48.89#ibcon#about to read 3, iclass 34, count 0 2006.229.13:38:48.93#ibcon#read 3, iclass 34, count 0 2006.229.13:38:48.93#ibcon#about to read 4, iclass 34, count 0 2006.229.13:38:48.93#ibcon#read 4, iclass 34, count 0 2006.229.13:38:48.93#ibcon#about to read 5, iclass 34, count 0 2006.229.13:38:48.93#ibcon#read 5, iclass 34, count 0 2006.229.13:38:48.93#ibcon#about to read 6, iclass 34, count 0 2006.229.13:38:48.93#ibcon#read 6, iclass 34, count 0 2006.229.13:38:48.93#ibcon#end of sib2, iclass 34, count 0 2006.229.13:38:48.93#ibcon#*after write, iclass 34, count 0 2006.229.13:38:48.93#ibcon#*before return 0, iclass 34, count 0 2006.229.13:38:48.93#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:48.93#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:48.93#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:38:48.93#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:38:48.93$vck44/va=3,6 2006.229.13:38:48.93#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.13:38:48.93#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.13:38:48.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:48.93#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:48.99#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:48.99#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:48.99#ibcon#enter wrdev, iclass 36, count 2 2006.229.13:38:48.99#ibcon#first serial, iclass 36, count 2 2006.229.13:38:48.99#ibcon#enter sib2, iclass 36, count 2 2006.229.13:38:48.99#ibcon#flushed, iclass 36, count 2 2006.229.13:38:48.99#ibcon#about to write, iclass 36, count 2 2006.229.13:38:48.99#ibcon#wrote, iclass 36, count 2 2006.229.13:38:48.99#ibcon#about to read 3, iclass 36, count 2 2006.229.13:38:49.01#ibcon#read 3, iclass 36, count 2 2006.229.13:38:49.01#ibcon#about to read 4, iclass 36, count 2 2006.229.13:38:49.01#ibcon#read 4, iclass 36, count 2 2006.229.13:38:49.01#ibcon#about to read 5, iclass 36, count 2 2006.229.13:38:49.01#ibcon#read 5, iclass 36, count 2 2006.229.13:38:49.01#ibcon#about to read 6, iclass 36, count 2 2006.229.13:38:49.01#ibcon#read 6, iclass 36, count 2 2006.229.13:38:49.01#ibcon#end of sib2, iclass 36, count 2 2006.229.13:38:49.01#ibcon#*mode == 0, iclass 36, count 2 2006.229.13:38:49.01#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.13:38:49.01#ibcon#[25=AT03-06\r\n] 2006.229.13:38:49.01#ibcon#*before write, iclass 36, count 2 2006.229.13:38:49.01#ibcon#enter sib2, iclass 36, count 2 2006.229.13:38:49.01#ibcon#flushed, iclass 36, count 2 2006.229.13:38:49.01#ibcon#about to write, iclass 36, count 2 2006.229.13:38:49.01#ibcon#wrote, iclass 36, count 2 2006.229.13:38:49.01#ibcon#about to read 3, iclass 36, count 2 2006.229.13:38:49.04#ibcon#read 3, iclass 36, count 2 2006.229.13:38:49.04#ibcon#about to read 4, iclass 36, count 2 2006.229.13:38:49.04#ibcon#read 4, iclass 36, count 2 2006.229.13:38:49.04#ibcon#about to read 5, iclass 36, count 2 2006.229.13:38:49.04#ibcon#read 5, iclass 36, count 2 2006.229.13:38:49.04#ibcon#about to read 6, iclass 36, count 2 2006.229.13:38:49.04#ibcon#read 6, iclass 36, count 2 2006.229.13:38:49.04#ibcon#end of sib2, iclass 36, count 2 2006.229.13:38:49.04#ibcon#*after write, iclass 36, count 2 2006.229.13:38:49.04#ibcon#*before return 0, iclass 36, count 2 2006.229.13:38:49.04#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:49.04#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:49.04#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.13:38:49.04#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:49.04#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:49.16#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:49.16#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:49.16#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:38:49.16#ibcon#first serial, iclass 36, count 0 2006.229.13:38:49.16#ibcon#enter sib2, iclass 36, count 0 2006.229.13:38:49.16#ibcon#flushed, iclass 36, count 0 2006.229.13:38:49.16#ibcon#about to write, iclass 36, count 0 2006.229.13:38:49.16#ibcon#wrote, iclass 36, count 0 2006.229.13:38:49.16#ibcon#about to read 3, iclass 36, count 0 2006.229.13:38:49.18#ibcon#read 3, iclass 36, count 0 2006.229.13:38:49.18#ibcon#about to read 4, iclass 36, count 0 2006.229.13:38:49.18#ibcon#read 4, iclass 36, count 0 2006.229.13:38:49.18#ibcon#about to read 5, iclass 36, count 0 2006.229.13:38:49.18#ibcon#read 5, iclass 36, count 0 2006.229.13:38:49.18#ibcon#about to read 6, iclass 36, count 0 2006.229.13:38:49.18#ibcon#read 6, iclass 36, count 0 2006.229.13:38:49.18#ibcon#end of sib2, iclass 36, count 0 2006.229.13:38:49.18#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:38:49.18#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:38:49.18#ibcon#[25=USB\r\n] 2006.229.13:38:49.18#ibcon#*before write, iclass 36, count 0 2006.229.13:38:49.18#ibcon#enter sib2, iclass 36, count 0 2006.229.13:38:49.18#ibcon#flushed, iclass 36, count 0 2006.229.13:38:49.18#ibcon#about to write, iclass 36, count 0 2006.229.13:38:49.18#ibcon#wrote, iclass 36, count 0 2006.229.13:38:49.18#ibcon#about to read 3, iclass 36, count 0 2006.229.13:38:49.21#ibcon#read 3, iclass 36, count 0 2006.229.13:38:49.21#ibcon#about to read 4, iclass 36, count 0 2006.229.13:38:49.21#ibcon#read 4, iclass 36, count 0 2006.229.13:38:49.21#ibcon#about to read 5, iclass 36, count 0 2006.229.13:38:49.21#ibcon#read 5, iclass 36, count 0 2006.229.13:38:49.21#ibcon#about to read 6, iclass 36, count 0 2006.229.13:38:49.21#ibcon#read 6, iclass 36, count 0 2006.229.13:38:49.21#ibcon#end of sib2, iclass 36, count 0 2006.229.13:38:49.21#ibcon#*after write, iclass 36, count 0 2006.229.13:38:49.21#ibcon#*before return 0, iclass 36, count 0 2006.229.13:38:49.21#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:49.21#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:49.21#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:38:49.21#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:38:49.21$vck44/valo=4,624.99 2006.229.13:38:49.21#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.13:38:49.21#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.13:38:49.21#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:49.21#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:49.21#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:49.21#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:49.21#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:38:49.21#ibcon#first serial, iclass 38, count 0 2006.229.13:38:49.21#ibcon#enter sib2, iclass 38, count 0 2006.229.13:38:49.21#ibcon#flushed, iclass 38, count 0 2006.229.13:38:49.21#ibcon#about to write, iclass 38, count 0 2006.229.13:38:49.21#ibcon#wrote, iclass 38, count 0 2006.229.13:38:49.21#ibcon#about to read 3, iclass 38, count 0 2006.229.13:38:49.23#ibcon#read 3, iclass 38, count 0 2006.229.13:38:49.23#ibcon#about to read 4, iclass 38, count 0 2006.229.13:38:49.23#ibcon#read 4, iclass 38, count 0 2006.229.13:38:49.23#ibcon#about to read 5, iclass 38, count 0 2006.229.13:38:49.23#ibcon#read 5, iclass 38, count 0 2006.229.13:38:49.23#ibcon#about to read 6, iclass 38, count 0 2006.229.13:38:49.23#ibcon#read 6, iclass 38, count 0 2006.229.13:38:49.23#ibcon#end of sib2, iclass 38, count 0 2006.229.13:38:49.23#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:38:49.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:38:49.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:38:49.23#ibcon#*before write, iclass 38, count 0 2006.229.13:38:49.23#ibcon#enter sib2, iclass 38, count 0 2006.229.13:38:49.23#ibcon#flushed, iclass 38, count 0 2006.229.13:38:49.23#ibcon#about to write, iclass 38, count 0 2006.229.13:38:49.23#ibcon#wrote, iclass 38, count 0 2006.229.13:38:49.23#ibcon#about to read 3, iclass 38, count 0 2006.229.13:38:49.27#ibcon#read 3, iclass 38, count 0 2006.229.13:38:49.27#ibcon#about to read 4, iclass 38, count 0 2006.229.13:38:49.27#ibcon#read 4, iclass 38, count 0 2006.229.13:38:49.27#ibcon#about to read 5, iclass 38, count 0 2006.229.13:38:49.27#ibcon#read 5, iclass 38, count 0 2006.229.13:38:49.27#ibcon#about to read 6, iclass 38, count 0 2006.229.13:38:49.27#ibcon#read 6, iclass 38, count 0 2006.229.13:38:49.27#ibcon#end of sib2, iclass 38, count 0 2006.229.13:38:49.27#ibcon#*after write, iclass 38, count 0 2006.229.13:38:49.27#ibcon#*before return 0, iclass 38, count 0 2006.229.13:38:49.27#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:49.27#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:49.27#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:38:49.27#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:38:49.27$vck44/va=4,7 2006.229.13:38:49.27#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.13:38:49.27#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.13:38:49.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:49.27#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:49.33#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:49.33#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:49.33#ibcon#enter wrdev, iclass 40, count 2 2006.229.13:38:49.33#ibcon#first serial, iclass 40, count 2 2006.229.13:38:49.33#ibcon#enter sib2, iclass 40, count 2 2006.229.13:38:49.33#ibcon#flushed, iclass 40, count 2 2006.229.13:38:49.33#ibcon#about to write, iclass 40, count 2 2006.229.13:38:49.33#ibcon#wrote, iclass 40, count 2 2006.229.13:38:49.33#ibcon#about to read 3, iclass 40, count 2 2006.229.13:38:49.35#ibcon#read 3, iclass 40, count 2 2006.229.13:38:49.35#ibcon#about to read 4, iclass 40, count 2 2006.229.13:38:49.35#ibcon#read 4, iclass 40, count 2 2006.229.13:38:49.35#ibcon#about to read 5, iclass 40, count 2 2006.229.13:38:49.35#ibcon#read 5, iclass 40, count 2 2006.229.13:38:49.35#ibcon#about to read 6, iclass 40, count 2 2006.229.13:38:49.35#ibcon#read 6, iclass 40, count 2 2006.229.13:38:49.35#ibcon#end of sib2, iclass 40, count 2 2006.229.13:38:49.35#ibcon#*mode == 0, iclass 40, count 2 2006.229.13:38:49.35#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.13:38:49.35#ibcon#[25=AT04-07\r\n] 2006.229.13:38:49.35#ibcon#*before write, iclass 40, count 2 2006.229.13:38:49.35#ibcon#enter sib2, iclass 40, count 2 2006.229.13:38:49.35#ibcon#flushed, iclass 40, count 2 2006.229.13:38:49.35#ibcon#about to write, iclass 40, count 2 2006.229.13:38:49.35#ibcon#wrote, iclass 40, count 2 2006.229.13:38:49.35#ibcon#about to read 3, iclass 40, count 2 2006.229.13:38:49.38#ibcon#read 3, iclass 40, count 2 2006.229.13:38:49.38#ibcon#about to read 4, iclass 40, count 2 2006.229.13:38:49.38#ibcon#read 4, iclass 40, count 2 2006.229.13:38:49.38#ibcon#about to read 5, iclass 40, count 2 2006.229.13:38:49.38#ibcon#read 5, iclass 40, count 2 2006.229.13:38:49.38#ibcon#about to read 6, iclass 40, count 2 2006.229.13:38:49.38#ibcon#read 6, iclass 40, count 2 2006.229.13:38:49.38#ibcon#end of sib2, iclass 40, count 2 2006.229.13:38:49.38#ibcon#*after write, iclass 40, count 2 2006.229.13:38:49.38#ibcon#*before return 0, iclass 40, count 2 2006.229.13:38:49.44#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:49.44#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:49.44#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.13:38:49.44#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:49.44#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:49.55#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:49.55#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:49.55#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:38:49.55#ibcon#first serial, iclass 40, count 0 2006.229.13:38:49.55#ibcon#enter sib2, iclass 40, count 0 2006.229.13:38:49.55#ibcon#flushed, iclass 40, count 0 2006.229.13:38:49.55#ibcon#about to write, iclass 40, count 0 2006.229.13:38:49.55#ibcon#wrote, iclass 40, count 0 2006.229.13:38:49.55#ibcon#about to read 3, iclass 40, count 0 2006.229.13:38:49.57#ibcon#read 3, iclass 40, count 0 2006.229.13:38:49.57#ibcon#about to read 4, iclass 40, count 0 2006.229.13:38:49.57#ibcon#read 4, iclass 40, count 0 2006.229.13:38:49.57#ibcon#about to read 5, iclass 40, count 0 2006.229.13:38:49.57#ibcon#read 5, iclass 40, count 0 2006.229.13:38:49.57#ibcon#about to read 6, iclass 40, count 0 2006.229.13:38:49.57#ibcon#read 6, iclass 40, count 0 2006.229.13:38:49.57#ibcon#end of sib2, iclass 40, count 0 2006.229.13:38:49.57#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:38:49.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:38:49.57#ibcon#[25=USB\r\n] 2006.229.13:38:49.57#ibcon#*before write, iclass 40, count 0 2006.229.13:38:49.57#ibcon#enter sib2, iclass 40, count 0 2006.229.13:38:49.57#ibcon#flushed, iclass 40, count 0 2006.229.13:38:49.57#ibcon#about to write, iclass 40, count 0 2006.229.13:38:49.57#ibcon#wrote, iclass 40, count 0 2006.229.13:38:49.57#ibcon#about to read 3, iclass 40, count 0 2006.229.13:38:49.60#ibcon#read 3, iclass 40, count 0 2006.229.13:38:49.60#ibcon#about to read 4, iclass 40, count 0 2006.229.13:38:49.60#ibcon#read 4, iclass 40, count 0 2006.229.13:38:49.60#ibcon#about to read 5, iclass 40, count 0 2006.229.13:38:49.60#ibcon#read 5, iclass 40, count 0 2006.229.13:38:49.60#ibcon#about to read 6, iclass 40, count 0 2006.229.13:38:49.60#ibcon#read 6, iclass 40, count 0 2006.229.13:38:49.60#ibcon#end of sib2, iclass 40, count 0 2006.229.13:38:49.60#ibcon#*after write, iclass 40, count 0 2006.229.13:38:49.60#ibcon#*before return 0, iclass 40, count 0 2006.229.13:38:49.60#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:49.60#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:49.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:38:49.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:38:49.60$vck44/valo=5,734.99 2006.229.13:38:49.60#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.13:38:49.60#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.13:38:49.60#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:49.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:38:49.60#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:38:49.60#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:38:49.60#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:38:49.60#ibcon#first serial, iclass 4, count 0 2006.229.13:38:49.60#ibcon#enter sib2, iclass 4, count 0 2006.229.13:38:49.60#ibcon#flushed, iclass 4, count 0 2006.229.13:38:49.60#ibcon#about to write, iclass 4, count 0 2006.229.13:38:49.60#ibcon#wrote, iclass 4, count 0 2006.229.13:38:49.60#ibcon#about to read 3, iclass 4, count 0 2006.229.13:38:49.62#ibcon#read 3, iclass 4, count 0 2006.229.13:38:49.62#ibcon#about to read 4, iclass 4, count 0 2006.229.13:38:49.62#ibcon#read 4, iclass 4, count 0 2006.229.13:38:49.62#ibcon#about to read 5, iclass 4, count 0 2006.229.13:38:49.62#ibcon#read 5, iclass 4, count 0 2006.229.13:38:49.62#ibcon#about to read 6, iclass 4, count 0 2006.229.13:38:49.62#ibcon#read 6, iclass 4, count 0 2006.229.13:38:49.62#ibcon#end of sib2, iclass 4, count 0 2006.229.13:38:49.62#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:38:49.62#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:38:49.62#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:38:49.62#ibcon#*before write, iclass 4, count 0 2006.229.13:38:49.62#ibcon#enter sib2, iclass 4, count 0 2006.229.13:38:49.62#ibcon#flushed, iclass 4, count 0 2006.229.13:38:49.62#ibcon#about to write, iclass 4, count 0 2006.229.13:38:49.62#ibcon#wrote, iclass 4, count 0 2006.229.13:38:49.62#ibcon#about to read 3, iclass 4, count 0 2006.229.13:38:49.66#ibcon#read 3, iclass 4, count 0 2006.229.13:38:49.66#ibcon#about to read 4, iclass 4, count 0 2006.229.13:38:49.66#ibcon#read 4, iclass 4, count 0 2006.229.13:38:49.66#ibcon#about to read 5, iclass 4, count 0 2006.229.13:38:49.66#ibcon#read 5, iclass 4, count 0 2006.229.13:38:49.66#ibcon#about to read 6, iclass 4, count 0 2006.229.13:38:49.66#ibcon#read 6, iclass 4, count 0 2006.229.13:38:49.66#ibcon#end of sib2, iclass 4, count 0 2006.229.13:38:49.66#ibcon#*after write, iclass 4, count 0 2006.229.13:38:49.66#ibcon#*before return 0, iclass 4, count 0 2006.229.13:38:49.66#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:38:49.66#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.13:38:49.66#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:38:49.66#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:38:49.66$vck44/va=5,4 2006.229.13:38:49.66#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.13:38:49.66#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.13:38:49.66#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:49.66#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:38:49.72#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:38:49.72#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:38:49.72#ibcon#enter wrdev, iclass 6, count 2 2006.229.13:38:49.72#ibcon#first serial, iclass 6, count 2 2006.229.13:38:49.72#ibcon#enter sib2, iclass 6, count 2 2006.229.13:38:49.72#ibcon#flushed, iclass 6, count 2 2006.229.13:38:49.72#ibcon#about to write, iclass 6, count 2 2006.229.13:38:49.72#ibcon#wrote, iclass 6, count 2 2006.229.13:38:49.72#ibcon#about to read 3, iclass 6, count 2 2006.229.13:38:49.74#ibcon#read 3, iclass 6, count 2 2006.229.13:38:49.74#ibcon#about to read 4, iclass 6, count 2 2006.229.13:38:49.74#ibcon#read 4, iclass 6, count 2 2006.229.13:38:49.74#ibcon#about to read 5, iclass 6, count 2 2006.229.13:38:49.74#ibcon#read 5, iclass 6, count 2 2006.229.13:38:49.74#ibcon#about to read 6, iclass 6, count 2 2006.229.13:38:49.74#ibcon#read 6, iclass 6, count 2 2006.229.13:38:49.74#ibcon#end of sib2, iclass 6, count 2 2006.229.13:38:49.74#ibcon#*mode == 0, iclass 6, count 2 2006.229.13:38:49.74#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.13:38:49.74#ibcon#[25=AT05-04\r\n] 2006.229.13:38:49.74#ibcon#*before write, iclass 6, count 2 2006.229.13:38:49.74#ibcon#enter sib2, iclass 6, count 2 2006.229.13:38:49.74#ibcon#flushed, iclass 6, count 2 2006.229.13:38:49.74#ibcon#about to write, iclass 6, count 2 2006.229.13:38:49.74#ibcon#wrote, iclass 6, count 2 2006.229.13:38:49.74#ibcon#about to read 3, iclass 6, count 2 2006.229.13:38:49.77#ibcon#read 3, iclass 6, count 2 2006.229.13:38:49.77#ibcon#about to read 4, iclass 6, count 2 2006.229.13:38:49.77#ibcon#read 4, iclass 6, count 2 2006.229.13:38:49.77#ibcon#about to read 5, iclass 6, count 2 2006.229.13:38:49.77#ibcon#read 5, iclass 6, count 2 2006.229.13:38:49.77#ibcon#about to read 6, iclass 6, count 2 2006.229.13:38:49.77#ibcon#read 6, iclass 6, count 2 2006.229.13:38:49.77#ibcon#end of sib2, iclass 6, count 2 2006.229.13:38:49.77#ibcon#*after write, iclass 6, count 2 2006.229.13:38:49.77#ibcon#*before return 0, iclass 6, count 2 2006.229.13:38:49.77#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:38:49.77#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.13:38:49.77#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.13:38:49.77#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:49.77#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:38:49.89#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:38:49.89#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:38:49.89#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:38:49.89#ibcon#first serial, iclass 6, count 0 2006.229.13:38:49.89#ibcon#enter sib2, iclass 6, count 0 2006.229.13:38:49.89#ibcon#flushed, iclass 6, count 0 2006.229.13:38:49.89#ibcon#about to write, iclass 6, count 0 2006.229.13:38:49.89#ibcon#wrote, iclass 6, count 0 2006.229.13:38:49.89#ibcon#about to read 3, iclass 6, count 0 2006.229.13:38:49.91#ibcon#read 3, iclass 6, count 0 2006.229.13:38:49.91#ibcon#about to read 4, iclass 6, count 0 2006.229.13:38:49.91#ibcon#read 4, iclass 6, count 0 2006.229.13:38:49.91#ibcon#about to read 5, iclass 6, count 0 2006.229.13:38:49.91#ibcon#read 5, iclass 6, count 0 2006.229.13:38:49.91#ibcon#about to read 6, iclass 6, count 0 2006.229.13:38:49.91#ibcon#read 6, iclass 6, count 0 2006.229.13:38:49.91#ibcon#end of sib2, iclass 6, count 0 2006.229.13:38:49.91#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:38:49.91#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:38:49.91#ibcon#[25=USB\r\n] 2006.229.13:38:49.91#ibcon#*before write, iclass 6, count 0 2006.229.13:38:49.91#ibcon#enter sib2, iclass 6, count 0 2006.229.13:38:49.91#ibcon#flushed, iclass 6, count 0 2006.229.13:38:49.91#ibcon#about to write, iclass 6, count 0 2006.229.13:38:49.91#ibcon#wrote, iclass 6, count 0 2006.229.13:38:49.91#ibcon#about to read 3, iclass 6, count 0 2006.229.13:38:49.94#ibcon#read 3, iclass 6, count 0 2006.229.13:38:49.94#ibcon#about to read 4, iclass 6, count 0 2006.229.13:38:49.94#ibcon#read 4, iclass 6, count 0 2006.229.13:38:49.94#ibcon#about to read 5, iclass 6, count 0 2006.229.13:38:49.94#ibcon#read 5, iclass 6, count 0 2006.229.13:38:49.94#ibcon#about to read 6, iclass 6, count 0 2006.229.13:38:49.94#ibcon#read 6, iclass 6, count 0 2006.229.13:38:49.94#ibcon#end of sib2, iclass 6, count 0 2006.229.13:38:49.94#ibcon#*after write, iclass 6, count 0 2006.229.13:38:49.94#ibcon#*before return 0, iclass 6, count 0 2006.229.13:38:49.94#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:38:49.94#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.13:38:49.94#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:38:49.94#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:38:49.94$vck44/valo=6,814.99 2006.229.13:38:49.94#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.13:38:49.94#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.13:38:49.94#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:49.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:38:49.94#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:38:49.94#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:38:49.94#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:38:49.94#ibcon#first serial, iclass 10, count 0 2006.229.13:38:49.94#ibcon#enter sib2, iclass 10, count 0 2006.229.13:38:49.94#ibcon#flushed, iclass 10, count 0 2006.229.13:38:49.94#ibcon#about to write, iclass 10, count 0 2006.229.13:38:49.94#ibcon#wrote, iclass 10, count 0 2006.229.13:38:49.94#ibcon#about to read 3, iclass 10, count 0 2006.229.13:38:49.96#ibcon#read 3, iclass 10, count 0 2006.229.13:38:49.96#ibcon#about to read 4, iclass 10, count 0 2006.229.13:38:49.96#ibcon#read 4, iclass 10, count 0 2006.229.13:38:49.96#ibcon#about to read 5, iclass 10, count 0 2006.229.13:38:49.96#ibcon#read 5, iclass 10, count 0 2006.229.13:38:49.96#ibcon#about to read 6, iclass 10, count 0 2006.229.13:38:49.96#ibcon#read 6, iclass 10, count 0 2006.229.13:38:49.96#ibcon#end of sib2, iclass 10, count 0 2006.229.13:38:49.96#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:38:49.96#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:38:49.96#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:38:49.96#ibcon#*before write, iclass 10, count 0 2006.229.13:38:49.96#ibcon#enter sib2, iclass 10, count 0 2006.229.13:38:49.96#ibcon#flushed, iclass 10, count 0 2006.229.13:38:49.96#ibcon#about to write, iclass 10, count 0 2006.229.13:38:49.96#ibcon#wrote, iclass 10, count 0 2006.229.13:38:49.96#ibcon#about to read 3, iclass 10, count 0 2006.229.13:38:50.00#ibcon#read 3, iclass 10, count 0 2006.229.13:38:50.00#ibcon#about to read 4, iclass 10, count 0 2006.229.13:38:50.00#ibcon#read 4, iclass 10, count 0 2006.229.13:38:50.00#ibcon#about to read 5, iclass 10, count 0 2006.229.13:38:50.00#ibcon#read 5, iclass 10, count 0 2006.229.13:38:50.00#ibcon#about to read 6, iclass 10, count 0 2006.229.13:38:50.00#ibcon#read 6, iclass 10, count 0 2006.229.13:38:50.00#ibcon#end of sib2, iclass 10, count 0 2006.229.13:38:50.00#ibcon#*after write, iclass 10, count 0 2006.229.13:38:50.00#ibcon#*before return 0, iclass 10, count 0 2006.229.13:38:50.00#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:38:50.00#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:38:50.00#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:38:50.00#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:38:50.00$vck44/va=6,4 2006.229.13:38:50.00#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.13:38:50.00#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.13:38:50.00#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:50.00#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:50.06#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:50.06#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:50.06#ibcon#enter wrdev, iclass 12, count 2 2006.229.13:38:50.06#ibcon#first serial, iclass 12, count 2 2006.229.13:38:50.06#ibcon#enter sib2, iclass 12, count 2 2006.229.13:38:50.06#ibcon#flushed, iclass 12, count 2 2006.229.13:38:50.06#ibcon#about to write, iclass 12, count 2 2006.229.13:38:50.06#ibcon#wrote, iclass 12, count 2 2006.229.13:38:50.06#ibcon#about to read 3, iclass 12, count 2 2006.229.13:38:50.08#ibcon#read 3, iclass 12, count 2 2006.229.13:38:50.08#ibcon#about to read 4, iclass 12, count 2 2006.229.13:38:50.08#ibcon#read 4, iclass 12, count 2 2006.229.13:38:50.08#ibcon#about to read 5, iclass 12, count 2 2006.229.13:38:50.08#ibcon#read 5, iclass 12, count 2 2006.229.13:38:50.08#ibcon#about to read 6, iclass 12, count 2 2006.229.13:38:50.08#ibcon#read 6, iclass 12, count 2 2006.229.13:38:50.08#ibcon#end of sib2, iclass 12, count 2 2006.229.13:38:50.08#ibcon#*mode == 0, iclass 12, count 2 2006.229.13:38:50.08#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.13:38:50.08#ibcon#[25=AT06-04\r\n] 2006.229.13:38:50.08#ibcon#*before write, iclass 12, count 2 2006.229.13:38:50.08#ibcon#enter sib2, iclass 12, count 2 2006.229.13:38:50.08#ibcon#flushed, iclass 12, count 2 2006.229.13:38:50.08#ibcon#about to write, iclass 12, count 2 2006.229.13:38:50.08#ibcon#wrote, iclass 12, count 2 2006.229.13:38:50.08#ibcon#about to read 3, iclass 12, count 2 2006.229.13:38:50.11#ibcon#read 3, iclass 12, count 2 2006.229.13:38:50.11#ibcon#about to read 4, iclass 12, count 2 2006.229.13:38:50.11#ibcon#read 4, iclass 12, count 2 2006.229.13:38:50.11#ibcon#about to read 5, iclass 12, count 2 2006.229.13:38:50.11#ibcon#read 5, iclass 12, count 2 2006.229.13:38:50.11#ibcon#about to read 6, iclass 12, count 2 2006.229.13:38:50.11#ibcon#read 6, iclass 12, count 2 2006.229.13:38:50.11#ibcon#end of sib2, iclass 12, count 2 2006.229.13:38:50.11#ibcon#*after write, iclass 12, count 2 2006.229.13:38:50.11#ibcon#*before return 0, iclass 12, count 2 2006.229.13:38:50.11#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:50.11#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:50.11#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.13:38:50.11#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:50.11#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:50.23#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:50.23#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:50.23#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:38:50.23#ibcon#first serial, iclass 12, count 0 2006.229.13:38:50.23#ibcon#enter sib2, iclass 12, count 0 2006.229.13:38:50.23#ibcon#flushed, iclass 12, count 0 2006.229.13:38:50.23#ibcon#about to write, iclass 12, count 0 2006.229.13:38:50.23#ibcon#wrote, iclass 12, count 0 2006.229.13:38:50.23#ibcon#about to read 3, iclass 12, count 0 2006.229.13:38:50.25#ibcon#read 3, iclass 12, count 0 2006.229.13:38:50.25#ibcon#about to read 4, iclass 12, count 0 2006.229.13:38:50.25#ibcon#read 4, iclass 12, count 0 2006.229.13:38:50.25#ibcon#about to read 5, iclass 12, count 0 2006.229.13:38:50.25#ibcon#read 5, iclass 12, count 0 2006.229.13:38:50.25#ibcon#about to read 6, iclass 12, count 0 2006.229.13:38:50.25#ibcon#read 6, iclass 12, count 0 2006.229.13:38:50.25#ibcon#end of sib2, iclass 12, count 0 2006.229.13:38:50.25#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:38:50.25#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:38:50.25#ibcon#[25=USB\r\n] 2006.229.13:38:50.25#ibcon#*before write, iclass 12, count 0 2006.229.13:38:50.25#ibcon#enter sib2, iclass 12, count 0 2006.229.13:38:50.25#ibcon#flushed, iclass 12, count 0 2006.229.13:38:50.25#ibcon#about to write, iclass 12, count 0 2006.229.13:38:50.25#ibcon#wrote, iclass 12, count 0 2006.229.13:38:50.25#ibcon#about to read 3, iclass 12, count 0 2006.229.13:38:50.28#ibcon#read 3, iclass 12, count 0 2006.229.13:38:50.28#ibcon#about to read 4, iclass 12, count 0 2006.229.13:38:50.28#ibcon#read 4, iclass 12, count 0 2006.229.13:38:50.28#ibcon#about to read 5, iclass 12, count 0 2006.229.13:38:50.28#ibcon#read 5, iclass 12, count 0 2006.229.13:38:50.28#ibcon#about to read 6, iclass 12, count 0 2006.229.13:38:50.28#ibcon#read 6, iclass 12, count 0 2006.229.13:38:50.28#ibcon#end of sib2, iclass 12, count 0 2006.229.13:38:50.28#ibcon#*after write, iclass 12, count 0 2006.229.13:38:50.28#ibcon#*before return 0, iclass 12, count 0 2006.229.13:38:50.28#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:50.28#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:50.28#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:38:50.28#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:38:50.28$vck44/valo=7,864.99 2006.229.13:38:50.28#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.13:38:50.28#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.13:38:50.28#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:50.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:50.28#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:50.28#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:50.28#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:38:50.28#ibcon#first serial, iclass 14, count 0 2006.229.13:38:50.28#ibcon#enter sib2, iclass 14, count 0 2006.229.13:38:50.28#ibcon#flushed, iclass 14, count 0 2006.229.13:38:50.28#ibcon#about to write, iclass 14, count 0 2006.229.13:38:50.28#ibcon#wrote, iclass 14, count 0 2006.229.13:38:50.28#ibcon#about to read 3, iclass 14, count 0 2006.229.13:38:50.30#ibcon#read 3, iclass 14, count 0 2006.229.13:38:50.30#ibcon#about to read 4, iclass 14, count 0 2006.229.13:38:50.30#ibcon#read 4, iclass 14, count 0 2006.229.13:38:50.30#ibcon#about to read 5, iclass 14, count 0 2006.229.13:38:50.30#ibcon#read 5, iclass 14, count 0 2006.229.13:38:50.30#ibcon#about to read 6, iclass 14, count 0 2006.229.13:38:50.30#ibcon#read 6, iclass 14, count 0 2006.229.13:38:50.30#ibcon#end of sib2, iclass 14, count 0 2006.229.13:38:50.30#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:38:50.30#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:38:50.30#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:38:50.30#ibcon#*before write, iclass 14, count 0 2006.229.13:38:50.30#ibcon#enter sib2, iclass 14, count 0 2006.229.13:38:50.30#ibcon#flushed, iclass 14, count 0 2006.229.13:38:50.30#ibcon#about to write, iclass 14, count 0 2006.229.13:38:50.30#ibcon#wrote, iclass 14, count 0 2006.229.13:38:50.30#ibcon#about to read 3, iclass 14, count 0 2006.229.13:38:50.34#ibcon#read 3, iclass 14, count 0 2006.229.13:38:50.34#ibcon#about to read 4, iclass 14, count 0 2006.229.13:38:50.34#ibcon#read 4, iclass 14, count 0 2006.229.13:38:50.34#ibcon#about to read 5, iclass 14, count 0 2006.229.13:38:50.34#ibcon#read 5, iclass 14, count 0 2006.229.13:38:50.34#ibcon#about to read 6, iclass 14, count 0 2006.229.13:38:50.34#ibcon#read 6, iclass 14, count 0 2006.229.13:38:50.34#ibcon#end of sib2, iclass 14, count 0 2006.229.13:38:50.34#ibcon#*after write, iclass 14, count 0 2006.229.13:38:50.34#ibcon#*before return 0, iclass 14, count 0 2006.229.13:38:50.34#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:50.34#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:50.34#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:38:50.34#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:38:50.34$vck44/va=7,5 2006.229.13:38:50.34#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.13:38:50.34#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.13:38:50.34#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:50.34#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:50.40#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:50.40#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:50.40#ibcon#enter wrdev, iclass 16, count 2 2006.229.13:38:50.40#ibcon#first serial, iclass 16, count 2 2006.229.13:38:50.40#ibcon#enter sib2, iclass 16, count 2 2006.229.13:38:50.40#ibcon#flushed, iclass 16, count 2 2006.229.13:38:50.40#ibcon#about to write, iclass 16, count 2 2006.229.13:38:50.40#ibcon#wrote, iclass 16, count 2 2006.229.13:38:50.40#ibcon#about to read 3, iclass 16, count 2 2006.229.13:38:50.42#ibcon#read 3, iclass 16, count 2 2006.229.13:38:50.42#ibcon#about to read 4, iclass 16, count 2 2006.229.13:38:50.42#ibcon#read 4, iclass 16, count 2 2006.229.13:38:50.42#ibcon#about to read 5, iclass 16, count 2 2006.229.13:38:50.42#ibcon#read 5, iclass 16, count 2 2006.229.13:38:50.42#ibcon#about to read 6, iclass 16, count 2 2006.229.13:38:50.42#ibcon#read 6, iclass 16, count 2 2006.229.13:38:50.42#ibcon#end of sib2, iclass 16, count 2 2006.229.13:38:50.42#ibcon#*mode == 0, iclass 16, count 2 2006.229.13:38:50.42#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.13:38:50.42#ibcon#[25=AT07-05\r\n] 2006.229.13:38:50.42#ibcon#*before write, iclass 16, count 2 2006.229.13:38:50.42#ibcon#enter sib2, iclass 16, count 2 2006.229.13:38:50.42#ibcon#flushed, iclass 16, count 2 2006.229.13:38:50.42#ibcon#about to write, iclass 16, count 2 2006.229.13:38:50.42#ibcon#wrote, iclass 16, count 2 2006.229.13:38:50.42#ibcon#about to read 3, iclass 16, count 2 2006.229.13:38:50.45#ibcon#read 3, iclass 16, count 2 2006.229.13:38:50.45#ibcon#about to read 4, iclass 16, count 2 2006.229.13:38:50.45#ibcon#read 4, iclass 16, count 2 2006.229.13:38:50.45#ibcon#about to read 5, iclass 16, count 2 2006.229.13:38:50.45#ibcon#read 5, iclass 16, count 2 2006.229.13:38:50.45#ibcon#about to read 6, iclass 16, count 2 2006.229.13:38:50.45#ibcon#read 6, iclass 16, count 2 2006.229.13:38:50.45#ibcon#end of sib2, iclass 16, count 2 2006.229.13:38:50.45#ibcon#*after write, iclass 16, count 2 2006.229.13:38:50.45#ibcon#*before return 0, iclass 16, count 2 2006.229.13:38:50.45#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:50.45#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:50.45#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.13:38:50.45#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:50.45#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:50.57#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:50.57#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:50.57#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:38:50.57#ibcon#first serial, iclass 16, count 0 2006.229.13:38:50.57#ibcon#enter sib2, iclass 16, count 0 2006.229.13:38:50.57#ibcon#flushed, iclass 16, count 0 2006.229.13:38:50.57#ibcon#about to write, iclass 16, count 0 2006.229.13:38:50.57#ibcon#wrote, iclass 16, count 0 2006.229.13:38:50.57#ibcon#about to read 3, iclass 16, count 0 2006.229.13:38:50.59#ibcon#read 3, iclass 16, count 0 2006.229.13:38:50.59#ibcon#about to read 4, iclass 16, count 0 2006.229.13:38:50.59#ibcon#read 4, iclass 16, count 0 2006.229.13:38:50.59#ibcon#about to read 5, iclass 16, count 0 2006.229.13:38:50.59#ibcon#read 5, iclass 16, count 0 2006.229.13:38:50.59#ibcon#about to read 6, iclass 16, count 0 2006.229.13:38:50.59#ibcon#read 6, iclass 16, count 0 2006.229.13:38:50.59#ibcon#end of sib2, iclass 16, count 0 2006.229.13:38:50.59#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:38:50.59#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:38:50.59#ibcon#[25=USB\r\n] 2006.229.13:38:50.59#ibcon#*before write, iclass 16, count 0 2006.229.13:38:50.59#ibcon#enter sib2, iclass 16, count 0 2006.229.13:38:50.59#ibcon#flushed, iclass 16, count 0 2006.229.13:38:50.59#ibcon#about to write, iclass 16, count 0 2006.229.13:38:50.59#ibcon#wrote, iclass 16, count 0 2006.229.13:38:50.59#ibcon#about to read 3, iclass 16, count 0 2006.229.13:38:50.62#ibcon#read 3, iclass 16, count 0 2006.229.13:38:50.62#ibcon#about to read 4, iclass 16, count 0 2006.229.13:38:50.62#ibcon#read 4, iclass 16, count 0 2006.229.13:38:50.62#ibcon#about to read 5, iclass 16, count 0 2006.229.13:38:50.62#ibcon#read 5, iclass 16, count 0 2006.229.13:38:50.62#ibcon#about to read 6, iclass 16, count 0 2006.229.13:38:50.62#ibcon#read 6, iclass 16, count 0 2006.229.13:38:50.62#ibcon#end of sib2, iclass 16, count 0 2006.229.13:38:50.62#ibcon#*after write, iclass 16, count 0 2006.229.13:38:50.62#ibcon#*before return 0, iclass 16, count 0 2006.229.13:38:50.62#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:50.62#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:50.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:38:50.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:38:50.62$vck44/valo=8,884.99 2006.229.13:38:50.62#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.13:38:50.62#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.13:38:50.62#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:50.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:50.62#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:50.62#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:50.62#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:38:50.62#ibcon#first serial, iclass 18, count 0 2006.229.13:38:50.62#ibcon#enter sib2, iclass 18, count 0 2006.229.13:38:50.62#ibcon#flushed, iclass 18, count 0 2006.229.13:38:50.62#ibcon#about to write, iclass 18, count 0 2006.229.13:38:50.62#ibcon#wrote, iclass 18, count 0 2006.229.13:38:50.62#ibcon#about to read 3, iclass 18, count 0 2006.229.13:38:50.64#ibcon#read 3, iclass 18, count 0 2006.229.13:38:50.64#ibcon#about to read 4, iclass 18, count 0 2006.229.13:38:50.64#ibcon#read 4, iclass 18, count 0 2006.229.13:38:50.64#ibcon#about to read 5, iclass 18, count 0 2006.229.13:38:50.64#ibcon#read 5, iclass 18, count 0 2006.229.13:38:50.64#ibcon#about to read 6, iclass 18, count 0 2006.229.13:38:50.64#ibcon#read 6, iclass 18, count 0 2006.229.13:38:50.64#ibcon#end of sib2, iclass 18, count 0 2006.229.13:38:50.64#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:38:50.64#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:38:50.64#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:38:50.64#ibcon#*before write, iclass 18, count 0 2006.229.13:38:50.64#ibcon#enter sib2, iclass 18, count 0 2006.229.13:38:50.64#ibcon#flushed, iclass 18, count 0 2006.229.13:38:50.64#ibcon#about to write, iclass 18, count 0 2006.229.13:38:50.64#ibcon#wrote, iclass 18, count 0 2006.229.13:38:50.64#ibcon#about to read 3, iclass 18, count 0 2006.229.13:38:50.68#ibcon#read 3, iclass 18, count 0 2006.229.13:38:50.68#ibcon#about to read 4, iclass 18, count 0 2006.229.13:38:50.68#ibcon#read 4, iclass 18, count 0 2006.229.13:38:50.68#ibcon#about to read 5, iclass 18, count 0 2006.229.13:38:50.68#ibcon#read 5, iclass 18, count 0 2006.229.13:38:50.68#ibcon#about to read 6, iclass 18, count 0 2006.229.13:38:50.68#ibcon#read 6, iclass 18, count 0 2006.229.13:38:50.68#ibcon#end of sib2, iclass 18, count 0 2006.229.13:38:50.68#ibcon#*after write, iclass 18, count 0 2006.229.13:38:50.68#ibcon#*before return 0, iclass 18, count 0 2006.229.13:38:50.68#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:50.68#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:50.68#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:38:50.68#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:38:50.68$vck44/va=8,6 2006.229.13:38:50.68#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.13:38:50.68#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.13:38:50.68#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:50.68#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:50.74#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:50.74#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:50.74#ibcon#enter wrdev, iclass 20, count 2 2006.229.13:38:50.74#ibcon#first serial, iclass 20, count 2 2006.229.13:38:50.74#ibcon#enter sib2, iclass 20, count 2 2006.229.13:38:50.74#ibcon#flushed, iclass 20, count 2 2006.229.13:38:50.74#ibcon#about to write, iclass 20, count 2 2006.229.13:38:50.74#ibcon#wrote, iclass 20, count 2 2006.229.13:38:50.74#ibcon#about to read 3, iclass 20, count 2 2006.229.13:38:50.76#ibcon#read 3, iclass 20, count 2 2006.229.13:38:50.76#ibcon#about to read 4, iclass 20, count 2 2006.229.13:38:50.76#ibcon#read 4, iclass 20, count 2 2006.229.13:38:50.76#ibcon#about to read 5, iclass 20, count 2 2006.229.13:38:50.76#ibcon#read 5, iclass 20, count 2 2006.229.13:38:50.76#ibcon#about to read 6, iclass 20, count 2 2006.229.13:38:50.76#ibcon#read 6, iclass 20, count 2 2006.229.13:38:50.76#ibcon#end of sib2, iclass 20, count 2 2006.229.13:38:50.76#ibcon#*mode == 0, iclass 20, count 2 2006.229.13:38:50.76#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.13:38:50.76#ibcon#[25=AT08-06\r\n] 2006.229.13:38:50.76#ibcon#*before write, iclass 20, count 2 2006.229.13:38:50.76#ibcon#enter sib2, iclass 20, count 2 2006.229.13:38:50.76#ibcon#flushed, iclass 20, count 2 2006.229.13:38:50.76#ibcon#about to write, iclass 20, count 2 2006.229.13:38:50.76#ibcon#wrote, iclass 20, count 2 2006.229.13:38:50.76#ibcon#about to read 3, iclass 20, count 2 2006.229.13:38:50.79#ibcon#read 3, iclass 20, count 2 2006.229.13:38:50.79#ibcon#about to read 4, iclass 20, count 2 2006.229.13:38:50.79#ibcon#read 4, iclass 20, count 2 2006.229.13:38:50.79#ibcon#about to read 5, iclass 20, count 2 2006.229.13:38:50.79#ibcon#read 5, iclass 20, count 2 2006.229.13:38:50.79#ibcon#about to read 6, iclass 20, count 2 2006.229.13:38:50.79#ibcon#read 6, iclass 20, count 2 2006.229.13:38:50.79#ibcon#end of sib2, iclass 20, count 2 2006.229.13:38:50.79#ibcon#*after write, iclass 20, count 2 2006.229.13:38:50.79#ibcon#*before return 0, iclass 20, count 2 2006.229.13:38:50.79#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:50.79#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:50.79#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.13:38:50.79#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:50.79#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:50.91#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:50.91#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:50.91#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:38:50.91#ibcon#first serial, iclass 20, count 0 2006.229.13:38:50.91#ibcon#enter sib2, iclass 20, count 0 2006.229.13:38:50.91#ibcon#flushed, iclass 20, count 0 2006.229.13:38:50.91#ibcon#about to write, iclass 20, count 0 2006.229.13:38:50.91#ibcon#wrote, iclass 20, count 0 2006.229.13:38:50.91#ibcon#about to read 3, iclass 20, count 0 2006.229.13:38:50.93#ibcon#read 3, iclass 20, count 0 2006.229.13:38:50.93#ibcon#about to read 4, iclass 20, count 0 2006.229.13:38:50.93#ibcon#read 4, iclass 20, count 0 2006.229.13:38:50.93#ibcon#about to read 5, iclass 20, count 0 2006.229.13:38:50.93#ibcon#read 5, iclass 20, count 0 2006.229.13:38:50.93#ibcon#about to read 6, iclass 20, count 0 2006.229.13:38:50.93#ibcon#read 6, iclass 20, count 0 2006.229.13:38:50.93#ibcon#end of sib2, iclass 20, count 0 2006.229.13:38:50.93#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:38:50.93#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:38:50.93#ibcon#[25=USB\r\n] 2006.229.13:38:50.93#ibcon#*before write, iclass 20, count 0 2006.229.13:38:50.93#ibcon#enter sib2, iclass 20, count 0 2006.229.13:38:50.93#ibcon#flushed, iclass 20, count 0 2006.229.13:38:50.93#ibcon#about to write, iclass 20, count 0 2006.229.13:38:50.93#ibcon#wrote, iclass 20, count 0 2006.229.13:38:50.93#ibcon#about to read 3, iclass 20, count 0 2006.229.13:38:50.96#ibcon#read 3, iclass 20, count 0 2006.229.13:38:50.96#ibcon#about to read 4, iclass 20, count 0 2006.229.13:38:50.96#ibcon#read 4, iclass 20, count 0 2006.229.13:38:50.96#ibcon#about to read 5, iclass 20, count 0 2006.229.13:38:50.96#ibcon#read 5, iclass 20, count 0 2006.229.13:38:50.96#ibcon#about to read 6, iclass 20, count 0 2006.229.13:38:50.96#ibcon#read 6, iclass 20, count 0 2006.229.13:38:50.96#ibcon#end of sib2, iclass 20, count 0 2006.229.13:38:50.96#ibcon#*after write, iclass 20, count 0 2006.229.13:38:50.96#ibcon#*before return 0, iclass 20, count 0 2006.229.13:38:50.96#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:50.96#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:50.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:38:50.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:38:50.96$vck44/vblo=1,629.99 2006.229.13:38:50.96#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.13:38:50.96#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.13:38:50.96#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:50.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:50.96#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:50.96#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:50.96#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:38:50.96#ibcon#first serial, iclass 22, count 0 2006.229.13:38:50.96#ibcon#enter sib2, iclass 22, count 0 2006.229.13:38:50.96#ibcon#flushed, iclass 22, count 0 2006.229.13:38:50.96#ibcon#about to write, iclass 22, count 0 2006.229.13:38:50.96#ibcon#wrote, iclass 22, count 0 2006.229.13:38:50.96#ibcon#about to read 3, iclass 22, count 0 2006.229.13:38:50.98#ibcon#read 3, iclass 22, count 0 2006.229.13:38:50.98#ibcon#about to read 4, iclass 22, count 0 2006.229.13:38:50.98#ibcon#read 4, iclass 22, count 0 2006.229.13:38:50.98#ibcon#about to read 5, iclass 22, count 0 2006.229.13:38:50.98#ibcon#read 5, iclass 22, count 0 2006.229.13:38:50.98#ibcon#about to read 6, iclass 22, count 0 2006.229.13:38:50.98#ibcon#read 6, iclass 22, count 0 2006.229.13:38:50.98#ibcon#end of sib2, iclass 22, count 0 2006.229.13:38:50.98#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:38:50.98#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:38:50.98#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:38:50.98#ibcon#*before write, iclass 22, count 0 2006.229.13:38:50.98#ibcon#enter sib2, iclass 22, count 0 2006.229.13:38:50.98#ibcon#flushed, iclass 22, count 0 2006.229.13:38:50.98#ibcon#about to write, iclass 22, count 0 2006.229.13:38:50.98#ibcon#wrote, iclass 22, count 0 2006.229.13:38:50.98#ibcon#about to read 3, iclass 22, count 0 2006.229.13:38:51.02#ibcon#read 3, iclass 22, count 0 2006.229.13:38:51.02#ibcon#about to read 4, iclass 22, count 0 2006.229.13:38:51.02#ibcon#read 4, iclass 22, count 0 2006.229.13:38:51.02#ibcon#about to read 5, iclass 22, count 0 2006.229.13:38:51.02#ibcon#read 5, iclass 22, count 0 2006.229.13:38:51.02#ibcon#about to read 6, iclass 22, count 0 2006.229.13:38:51.02#ibcon#read 6, iclass 22, count 0 2006.229.13:38:51.02#ibcon#end of sib2, iclass 22, count 0 2006.229.13:38:51.02#ibcon#*after write, iclass 22, count 0 2006.229.13:38:51.02#ibcon#*before return 0, iclass 22, count 0 2006.229.13:38:51.02#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:51.02#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:51.02#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:38:51.02#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:38:51.02$vck44/vb=1,4 2006.229.13:38:51.02#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.13:38:51.02#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.13:38:51.02#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:51.02#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:38:51.02#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:38:51.02#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:38:51.02#ibcon#enter wrdev, iclass 24, count 2 2006.229.13:38:51.02#ibcon#first serial, iclass 24, count 2 2006.229.13:38:51.02#ibcon#enter sib2, iclass 24, count 2 2006.229.13:38:51.02#ibcon#flushed, iclass 24, count 2 2006.229.13:38:51.02#ibcon#about to write, iclass 24, count 2 2006.229.13:38:51.02#ibcon#wrote, iclass 24, count 2 2006.229.13:38:51.02#ibcon#about to read 3, iclass 24, count 2 2006.229.13:38:51.04#ibcon#read 3, iclass 24, count 2 2006.229.13:38:51.04#ibcon#about to read 4, iclass 24, count 2 2006.229.13:38:51.04#ibcon#read 4, iclass 24, count 2 2006.229.13:38:51.04#ibcon#about to read 5, iclass 24, count 2 2006.229.13:38:51.04#ibcon#read 5, iclass 24, count 2 2006.229.13:38:51.04#ibcon#about to read 6, iclass 24, count 2 2006.229.13:38:51.04#ibcon#read 6, iclass 24, count 2 2006.229.13:38:51.04#ibcon#end of sib2, iclass 24, count 2 2006.229.13:38:51.04#ibcon#*mode == 0, iclass 24, count 2 2006.229.13:38:51.04#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.13:38:51.04#ibcon#[27=AT01-04\r\n] 2006.229.13:38:51.04#ibcon#*before write, iclass 24, count 2 2006.229.13:38:51.04#ibcon#enter sib2, iclass 24, count 2 2006.229.13:38:51.04#ibcon#flushed, iclass 24, count 2 2006.229.13:38:51.04#ibcon#about to write, iclass 24, count 2 2006.229.13:38:51.04#ibcon#wrote, iclass 24, count 2 2006.229.13:38:51.04#ibcon#about to read 3, iclass 24, count 2 2006.229.13:38:51.07#ibcon#read 3, iclass 24, count 2 2006.229.13:38:51.07#ibcon#about to read 4, iclass 24, count 2 2006.229.13:38:51.07#ibcon#read 4, iclass 24, count 2 2006.229.13:38:51.07#ibcon#about to read 5, iclass 24, count 2 2006.229.13:38:51.07#ibcon#read 5, iclass 24, count 2 2006.229.13:38:51.07#ibcon#about to read 6, iclass 24, count 2 2006.229.13:38:51.07#ibcon#read 6, iclass 24, count 2 2006.229.13:38:51.07#ibcon#end of sib2, iclass 24, count 2 2006.229.13:38:51.07#ibcon#*after write, iclass 24, count 2 2006.229.13:38:51.07#ibcon#*before return 0, iclass 24, count 2 2006.229.13:38:51.07#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:38:51.07#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.13:38:51.07#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.13:38:51.07#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:51.07#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:38:51.19#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:38:51.19#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:38:51.19#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:38:51.19#ibcon#first serial, iclass 24, count 0 2006.229.13:38:51.19#ibcon#enter sib2, iclass 24, count 0 2006.229.13:38:51.19#ibcon#flushed, iclass 24, count 0 2006.229.13:38:51.19#ibcon#about to write, iclass 24, count 0 2006.229.13:38:51.19#ibcon#wrote, iclass 24, count 0 2006.229.13:38:51.19#ibcon#about to read 3, iclass 24, count 0 2006.229.13:38:51.21#ibcon#read 3, iclass 24, count 0 2006.229.13:38:51.21#ibcon#about to read 4, iclass 24, count 0 2006.229.13:38:51.21#ibcon#read 4, iclass 24, count 0 2006.229.13:38:51.21#ibcon#about to read 5, iclass 24, count 0 2006.229.13:38:51.21#ibcon#read 5, iclass 24, count 0 2006.229.13:38:51.21#ibcon#about to read 6, iclass 24, count 0 2006.229.13:38:51.21#ibcon#read 6, iclass 24, count 0 2006.229.13:38:51.21#ibcon#end of sib2, iclass 24, count 0 2006.229.13:38:51.21#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:38:51.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:38:51.21#ibcon#[27=USB\r\n] 2006.229.13:38:51.21#ibcon#*before write, iclass 24, count 0 2006.229.13:38:51.21#ibcon#enter sib2, iclass 24, count 0 2006.229.13:38:51.21#ibcon#flushed, iclass 24, count 0 2006.229.13:38:51.21#ibcon#about to write, iclass 24, count 0 2006.229.13:38:51.21#ibcon#wrote, iclass 24, count 0 2006.229.13:38:51.21#ibcon#about to read 3, iclass 24, count 0 2006.229.13:38:51.24#ibcon#read 3, iclass 24, count 0 2006.229.13:38:51.24#ibcon#about to read 4, iclass 24, count 0 2006.229.13:38:51.24#ibcon#read 4, iclass 24, count 0 2006.229.13:38:51.24#ibcon#about to read 5, iclass 24, count 0 2006.229.13:38:51.24#ibcon#read 5, iclass 24, count 0 2006.229.13:38:51.24#ibcon#about to read 6, iclass 24, count 0 2006.229.13:38:51.24#ibcon#read 6, iclass 24, count 0 2006.229.13:38:51.24#ibcon#end of sib2, iclass 24, count 0 2006.229.13:38:51.24#ibcon#*after write, iclass 24, count 0 2006.229.13:38:51.24#ibcon#*before return 0, iclass 24, count 0 2006.229.13:38:51.24#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:38:51.24#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.13:38:51.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:38:51.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:38:51.24$vck44/vblo=2,634.99 2006.229.13:38:51.24#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.13:38:51.24#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.13:38:51.24#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:51.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:51.24#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:51.24#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:51.24#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:38:51.24#ibcon#first serial, iclass 26, count 0 2006.229.13:38:51.24#ibcon#enter sib2, iclass 26, count 0 2006.229.13:38:51.24#ibcon#flushed, iclass 26, count 0 2006.229.13:38:51.24#ibcon#about to write, iclass 26, count 0 2006.229.13:38:51.24#ibcon#wrote, iclass 26, count 0 2006.229.13:38:51.24#ibcon#about to read 3, iclass 26, count 0 2006.229.13:38:51.26#ibcon#read 3, iclass 26, count 0 2006.229.13:38:51.26#ibcon#about to read 4, iclass 26, count 0 2006.229.13:38:51.26#ibcon#read 4, iclass 26, count 0 2006.229.13:38:51.26#ibcon#about to read 5, iclass 26, count 0 2006.229.13:38:51.26#ibcon#read 5, iclass 26, count 0 2006.229.13:38:51.26#ibcon#about to read 6, iclass 26, count 0 2006.229.13:38:51.26#ibcon#read 6, iclass 26, count 0 2006.229.13:38:51.26#ibcon#end of sib2, iclass 26, count 0 2006.229.13:38:51.26#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:38:51.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:38:51.26#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:38:51.26#ibcon#*before write, iclass 26, count 0 2006.229.13:38:51.26#ibcon#enter sib2, iclass 26, count 0 2006.229.13:38:51.26#ibcon#flushed, iclass 26, count 0 2006.229.13:38:51.26#ibcon#about to write, iclass 26, count 0 2006.229.13:38:51.26#ibcon#wrote, iclass 26, count 0 2006.229.13:38:51.26#ibcon#about to read 3, iclass 26, count 0 2006.229.13:38:51.30#ibcon#read 3, iclass 26, count 0 2006.229.13:38:51.30#ibcon#about to read 4, iclass 26, count 0 2006.229.13:38:51.30#ibcon#read 4, iclass 26, count 0 2006.229.13:38:51.30#ibcon#about to read 5, iclass 26, count 0 2006.229.13:38:51.30#ibcon#read 5, iclass 26, count 0 2006.229.13:38:51.30#ibcon#about to read 6, iclass 26, count 0 2006.229.13:38:51.30#ibcon#read 6, iclass 26, count 0 2006.229.13:38:51.30#ibcon#end of sib2, iclass 26, count 0 2006.229.13:38:51.30#ibcon#*after write, iclass 26, count 0 2006.229.13:38:51.30#ibcon#*before return 0, iclass 26, count 0 2006.229.13:38:51.30#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:51.30#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.13:38:51.30#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:38:51.30#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:38:51.30$vck44/vb=2,4 2006.229.13:38:51.30#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.13:38:51.30#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.13:38:51.30#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:51.30#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:51.36#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:51.36#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:51.36#ibcon#enter wrdev, iclass 28, count 2 2006.229.13:38:51.36#ibcon#first serial, iclass 28, count 2 2006.229.13:38:51.36#ibcon#enter sib2, iclass 28, count 2 2006.229.13:38:51.36#ibcon#flushed, iclass 28, count 2 2006.229.13:38:51.36#ibcon#about to write, iclass 28, count 2 2006.229.13:38:51.36#ibcon#wrote, iclass 28, count 2 2006.229.13:38:51.36#ibcon#about to read 3, iclass 28, count 2 2006.229.13:38:51.38#ibcon#read 3, iclass 28, count 2 2006.229.13:38:51.38#ibcon#about to read 4, iclass 28, count 2 2006.229.13:38:51.38#ibcon#read 4, iclass 28, count 2 2006.229.13:38:51.38#ibcon#about to read 5, iclass 28, count 2 2006.229.13:38:51.38#ibcon#read 5, iclass 28, count 2 2006.229.13:38:51.38#ibcon#about to read 6, iclass 28, count 2 2006.229.13:38:51.38#ibcon#read 6, iclass 28, count 2 2006.229.13:38:51.38#ibcon#end of sib2, iclass 28, count 2 2006.229.13:38:51.38#ibcon#*mode == 0, iclass 28, count 2 2006.229.13:38:51.38#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.13:38:51.38#ibcon#[27=AT02-04\r\n] 2006.229.13:38:51.38#ibcon#*before write, iclass 28, count 2 2006.229.13:38:51.38#ibcon#enter sib2, iclass 28, count 2 2006.229.13:38:51.38#ibcon#flushed, iclass 28, count 2 2006.229.13:38:51.38#ibcon#about to write, iclass 28, count 2 2006.229.13:38:51.38#ibcon#wrote, iclass 28, count 2 2006.229.13:38:51.38#ibcon#about to read 3, iclass 28, count 2 2006.229.13:38:51.41#ibcon#read 3, iclass 28, count 2 2006.229.13:38:51.41#ibcon#about to read 4, iclass 28, count 2 2006.229.13:38:51.41#ibcon#read 4, iclass 28, count 2 2006.229.13:38:51.41#ibcon#about to read 5, iclass 28, count 2 2006.229.13:38:51.41#ibcon#read 5, iclass 28, count 2 2006.229.13:38:51.41#ibcon#about to read 6, iclass 28, count 2 2006.229.13:38:51.41#ibcon#read 6, iclass 28, count 2 2006.229.13:38:51.41#ibcon#end of sib2, iclass 28, count 2 2006.229.13:38:51.41#ibcon#*after write, iclass 28, count 2 2006.229.13:38:51.41#ibcon#*before return 0, iclass 28, count 2 2006.229.13:38:51.41#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:51.41#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.13:38:51.41#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.13:38:51.41#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:51.41#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:51.53#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:51.53#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:51.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:38:51.53#ibcon#first serial, iclass 28, count 0 2006.229.13:38:51.53#ibcon#enter sib2, iclass 28, count 0 2006.229.13:38:51.53#ibcon#flushed, iclass 28, count 0 2006.229.13:38:51.53#ibcon#about to write, iclass 28, count 0 2006.229.13:38:51.53#ibcon#wrote, iclass 28, count 0 2006.229.13:38:51.53#ibcon#about to read 3, iclass 28, count 0 2006.229.13:38:51.55#ibcon#read 3, iclass 28, count 0 2006.229.13:38:51.55#ibcon#about to read 4, iclass 28, count 0 2006.229.13:38:51.55#ibcon#read 4, iclass 28, count 0 2006.229.13:38:51.55#ibcon#about to read 5, iclass 28, count 0 2006.229.13:38:51.55#ibcon#read 5, iclass 28, count 0 2006.229.13:38:51.55#ibcon#about to read 6, iclass 28, count 0 2006.229.13:38:51.55#ibcon#read 6, iclass 28, count 0 2006.229.13:38:51.55#ibcon#end of sib2, iclass 28, count 0 2006.229.13:38:51.55#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:38:51.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:38:51.55#ibcon#[27=USB\r\n] 2006.229.13:38:51.55#ibcon#*before write, iclass 28, count 0 2006.229.13:38:51.55#ibcon#enter sib2, iclass 28, count 0 2006.229.13:38:51.55#ibcon#flushed, iclass 28, count 0 2006.229.13:38:51.55#ibcon#about to write, iclass 28, count 0 2006.229.13:38:51.55#ibcon#wrote, iclass 28, count 0 2006.229.13:38:51.55#ibcon#about to read 3, iclass 28, count 0 2006.229.13:38:51.58#ibcon#read 3, iclass 28, count 0 2006.229.13:38:51.58#ibcon#about to read 4, iclass 28, count 0 2006.229.13:38:51.58#ibcon#read 4, iclass 28, count 0 2006.229.13:38:51.58#ibcon#about to read 5, iclass 28, count 0 2006.229.13:38:51.58#ibcon#read 5, iclass 28, count 0 2006.229.13:38:51.58#ibcon#about to read 6, iclass 28, count 0 2006.229.13:38:51.58#ibcon#read 6, iclass 28, count 0 2006.229.13:38:51.58#ibcon#end of sib2, iclass 28, count 0 2006.229.13:38:51.58#ibcon#*after write, iclass 28, count 0 2006.229.13:38:51.58#ibcon#*before return 0, iclass 28, count 0 2006.229.13:38:51.58#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:51.58#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.13:38:51.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:38:51.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:38:51.58$vck44/vblo=3,649.99 2006.229.13:38:51.58#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.13:38:51.58#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.13:38:51.58#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:51.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:51.58#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:51.58#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:51.58#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:38:51.58#ibcon#first serial, iclass 30, count 0 2006.229.13:38:51.58#ibcon#enter sib2, iclass 30, count 0 2006.229.13:38:51.58#ibcon#flushed, iclass 30, count 0 2006.229.13:38:51.58#ibcon#about to write, iclass 30, count 0 2006.229.13:38:51.58#ibcon#wrote, iclass 30, count 0 2006.229.13:38:51.58#ibcon#about to read 3, iclass 30, count 0 2006.229.13:38:51.60#ibcon#read 3, iclass 30, count 0 2006.229.13:38:51.60#ibcon#about to read 4, iclass 30, count 0 2006.229.13:38:51.60#ibcon#read 4, iclass 30, count 0 2006.229.13:38:51.60#ibcon#about to read 5, iclass 30, count 0 2006.229.13:38:51.60#ibcon#read 5, iclass 30, count 0 2006.229.13:38:51.60#ibcon#about to read 6, iclass 30, count 0 2006.229.13:38:51.60#ibcon#read 6, iclass 30, count 0 2006.229.13:38:51.60#ibcon#end of sib2, iclass 30, count 0 2006.229.13:38:51.60#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:38:51.60#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:38:51.60#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:38:51.60#ibcon#*before write, iclass 30, count 0 2006.229.13:38:51.60#ibcon#enter sib2, iclass 30, count 0 2006.229.13:38:51.60#ibcon#flushed, iclass 30, count 0 2006.229.13:38:51.60#ibcon#about to write, iclass 30, count 0 2006.229.13:38:51.60#ibcon#wrote, iclass 30, count 0 2006.229.13:38:51.60#ibcon#about to read 3, iclass 30, count 0 2006.229.13:38:51.64#ibcon#read 3, iclass 30, count 0 2006.229.13:38:51.64#ibcon#about to read 4, iclass 30, count 0 2006.229.13:38:51.64#ibcon#read 4, iclass 30, count 0 2006.229.13:38:51.64#ibcon#about to read 5, iclass 30, count 0 2006.229.13:38:51.64#ibcon#read 5, iclass 30, count 0 2006.229.13:38:51.64#ibcon#about to read 6, iclass 30, count 0 2006.229.13:38:51.64#ibcon#read 6, iclass 30, count 0 2006.229.13:38:51.64#ibcon#end of sib2, iclass 30, count 0 2006.229.13:38:51.64#ibcon#*after write, iclass 30, count 0 2006.229.13:38:51.64#ibcon#*before return 0, iclass 30, count 0 2006.229.13:38:51.64#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:51.64#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.13:38:51.64#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:38:51.64#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:38:51.64$vck44/vb=3,4 2006.229.13:38:51.64#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.13:38:51.64#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.13:38:51.64#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:51.64#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:51.70#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:51.70#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:51.70#ibcon#enter wrdev, iclass 32, count 2 2006.229.13:38:51.70#ibcon#first serial, iclass 32, count 2 2006.229.13:38:51.70#ibcon#enter sib2, iclass 32, count 2 2006.229.13:38:51.70#ibcon#flushed, iclass 32, count 2 2006.229.13:38:51.70#ibcon#about to write, iclass 32, count 2 2006.229.13:38:51.70#ibcon#wrote, iclass 32, count 2 2006.229.13:38:51.70#ibcon#about to read 3, iclass 32, count 2 2006.229.13:38:51.72#ibcon#read 3, iclass 32, count 2 2006.229.13:38:51.72#ibcon#about to read 4, iclass 32, count 2 2006.229.13:38:51.72#ibcon#read 4, iclass 32, count 2 2006.229.13:38:51.72#ibcon#about to read 5, iclass 32, count 2 2006.229.13:38:51.72#ibcon#read 5, iclass 32, count 2 2006.229.13:38:51.72#ibcon#about to read 6, iclass 32, count 2 2006.229.13:38:51.72#ibcon#read 6, iclass 32, count 2 2006.229.13:38:51.72#ibcon#end of sib2, iclass 32, count 2 2006.229.13:38:51.72#ibcon#*mode == 0, iclass 32, count 2 2006.229.13:38:51.72#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.13:38:51.72#ibcon#[27=AT03-04\r\n] 2006.229.13:38:51.72#ibcon#*before write, iclass 32, count 2 2006.229.13:38:51.72#ibcon#enter sib2, iclass 32, count 2 2006.229.13:38:51.72#ibcon#flushed, iclass 32, count 2 2006.229.13:38:51.72#ibcon#about to write, iclass 32, count 2 2006.229.13:38:51.72#ibcon#wrote, iclass 32, count 2 2006.229.13:38:51.72#ibcon#about to read 3, iclass 32, count 2 2006.229.13:38:51.75#ibcon#read 3, iclass 32, count 2 2006.229.13:38:51.75#ibcon#about to read 4, iclass 32, count 2 2006.229.13:38:51.75#ibcon#read 4, iclass 32, count 2 2006.229.13:38:51.75#ibcon#about to read 5, iclass 32, count 2 2006.229.13:38:51.75#ibcon#read 5, iclass 32, count 2 2006.229.13:38:51.75#ibcon#about to read 6, iclass 32, count 2 2006.229.13:38:51.75#ibcon#read 6, iclass 32, count 2 2006.229.13:38:51.75#ibcon#end of sib2, iclass 32, count 2 2006.229.13:38:51.75#ibcon#*after write, iclass 32, count 2 2006.229.13:38:51.75#ibcon#*before return 0, iclass 32, count 2 2006.229.13:38:51.75#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:51.75#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.13:38:51.75#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.13:38:51.75#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:51.75#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:51.87#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:51.87#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:51.87#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:38:51.87#ibcon#first serial, iclass 32, count 0 2006.229.13:38:51.87#ibcon#enter sib2, iclass 32, count 0 2006.229.13:38:51.87#ibcon#flushed, iclass 32, count 0 2006.229.13:38:51.87#ibcon#about to write, iclass 32, count 0 2006.229.13:38:51.87#ibcon#wrote, iclass 32, count 0 2006.229.13:38:51.87#ibcon#about to read 3, iclass 32, count 0 2006.229.13:38:51.89#ibcon#read 3, iclass 32, count 0 2006.229.13:38:51.89#ibcon#about to read 4, iclass 32, count 0 2006.229.13:38:51.89#ibcon#read 4, iclass 32, count 0 2006.229.13:38:51.89#ibcon#about to read 5, iclass 32, count 0 2006.229.13:38:51.89#ibcon#read 5, iclass 32, count 0 2006.229.13:38:51.89#ibcon#about to read 6, iclass 32, count 0 2006.229.13:38:51.89#ibcon#read 6, iclass 32, count 0 2006.229.13:38:51.89#ibcon#end of sib2, iclass 32, count 0 2006.229.13:38:51.89#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:38:51.89#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:38:51.89#ibcon#[27=USB\r\n] 2006.229.13:38:51.89#ibcon#*before write, iclass 32, count 0 2006.229.13:38:51.89#ibcon#enter sib2, iclass 32, count 0 2006.229.13:38:51.89#ibcon#flushed, iclass 32, count 0 2006.229.13:38:51.89#ibcon#about to write, iclass 32, count 0 2006.229.13:38:51.89#ibcon#wrote, iclass 32, count 0 2006.229.13:38:51.89#ibcon#about to read 3, iclass 32, count 0 2006.229.13:38:51.92#ibcon#read 3, iclass 32, count 0 2006.229.13:38:51.92#ibcon#about to read 4, iclass 32, count 0 2006.229.13:38:51.92#ibcon#read 4, iclass 32, count 0 2006.229.13:38:51.92#ibcon#about to read 5, iclass 32, count 0 2006.229.13:38:51.92#ibcon#read 5, iclass 32, count 0 2006.229.13:38:51.92#ibcon#about to read 6, iclass 32, count 0 2006.229.13:38:51.92#ibcon#read 6, iclass 32, count 0 2006.229.13:38:51.92#ibcon#end of sib2, iclass 32, count 0 2006.229.13:38:51.92#ibcon#*after write, iclass 32, count 0 2006.229.13:38:51.92#ibcon#*before return 0, iclass 32, count 0 2006.229.13:38:51.92#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:51.92#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.13:38:51.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:38:51.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:38:51.92$vck44/vblo=4,679.99 2006.229.13:38:51.92#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.13:38:51.92#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.13:38:51.92#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:51.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:51.92#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:51.92#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:51.92#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:38:51.92#ibcon#first serial, iclass 34, count 0 2006.229.13:38:51.92#ibcon#enter sib2, iclass 34, count 0 2006.229.13:38:51.92#ibcon#flushed, iclass 34, count 0 2006.229.13:38:51.92#ibcon#about to write, iclass 34, count 0 2006.229.13:38:51.92#ibcon#wrote, iclass 34, count 0 2006.229.13:38:51.92#ibcon#about to read 3, iclass 34, count 0 2006.229.13:38:51.94#ibcon#read 3, iclass 34, count 0 2006.229.13:38:51.94#ibcon#about to read 4, iclass 34, count 0 2006.229.13:38:51.94#ibcon#read 4, iclass 34, count 0 2006.229.13:38:51.94#ibcon#about to read 5, iclass 34, count 0 2006.229.13:38:51.94#ibcon#read 5, iclass 34, count 0 2006.229.13:38:51.94#ibcon#about to read 6, iclass 34, count 0 2006.229.13:38:51.94#ibcon#read 6, iclass 34, count 0 2006.229.13:38:51.94#ibcon#end of sib2, iclass 34, count 0 2006.229.13:38:51.94#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:38:51.94#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:38:51.94#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:38:51.94#ibcon#*before write, iclass 34, count 0 2006.229.13:38:51.94#ibcon#enter sib2, iclass 34, count 0 2006.229.13:38:51.94#ibcon#flushed, iclass 34, count 0 2006.229.13:38:51.94#ibcon#about to write, iclass 34, count 0 2006.229.13:38:51.94#ibcon#wrote, iclass 34, count 0 2006.229.13:38:51.94#ibcon#about to read 3, iclass 34, count 0 2006.229.13:38:51.98#ibcon#read 3, iclass 34, count 0 2006.229.13:38:51.98#ibcon#about to read 4, iclass 34, count 0 2006.229.13:38:51.98#ibcon#read 4, iclass 34, count 0 2006.229.13:38:51.98#ibcon#about to read 5, iclass 34, count 0 2006.229.13:38:51.98#ibcon#read 5, iclass 34, count 0 2006.229.13:38:51.98#ibcon#about to read 6, iclass 34, count 0 2006.229.13:38:51.98#ibcon#read 6, iclass 34, count 0 2006.229.13:38:51.98#ibcon#end of sib2, iclass 34, count 0 2006.229.13:38:51.98#ibcon#*after write, iclass 34, count 0 2006.229.13:38:51.98#ibcon#*before return 0, iclass 34, count 0 2006.229.13:38:51.98#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:51.98#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.13:38:51.98#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:38:51.98#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:38:51.98$vck44/vb=4,4 2006.229.13:38:51.98#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.13:38:51.98#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.13:38:51.98#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:51.98#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:52.04#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:52.04#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:52.04#ibcon#enter wrdev, iclass 36, count 2 2006.229.13:38:52.04#ibcon#first serial, iclass 36, count 2 2006.229.13:38:52.04#ibcon#enter sib2, iclass 36, count 2 2006.229.13:38:52.04#ibcon#flushed, iclass 36, count 2 2006.229.13:38:52.04#ibcon#about to write, iclass 36, count 2 2006.229.13:38:52.04#ibcon#wrote, iclass 36, count 2 2006.229.13:38:52.04#ibcon#about to read 3, iclass 36, count 2 2006.229.13:38:52.06#ibcon#read 3, iclass 36, count 2 2006.229.13:38:52.06#ibcon#about to read 4, iclass 36, count 2 2006.229.13:38:52.06#ibcon#read 4, iclass 36, count 2 2006.229.13:38:52.06#ibcon#about to read 5, iclass 36, count 2 2006.229.13:38:52.06#ibcon#read 5, iclass 36, count 2 2006.229.13:38:52.06#ibcon#about to read 6, iclass 36, count 2 2006.229.13:38:52.06#ibcon#read 6, iclass 36, count 2 2006.229.13:38:52.06#ibcon#end of sib2, iclass 36, count 2 2006.229.13:38:52.06#ibcon#*mode == 0, iclass 36, count 2 2006.229.13:38:52.06#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.13:38:52.06#ibcon#[27=AT04-04\r\n] 2006.229.13:38:52.06#ibcon#*before write, iclass 36, count 2 2006.229.13:38:52.06#ibcon#enter sib2, iclass 36, count 2 2006.229.13:38:52.06#ibcon#flushed, iclass 36, count 2 2006.229.13:38:52.06#ibcon#about to write, iclass 36, count 2 2006.229.13:38:52.06#ibcon#wrote, iclass 36, count 2 2006.229.13:38:52.06#ibcon#about to read 3, iclass 36, count 2 2006.229.13:38:52.09#ibcon#read 3, iclass 36, count 2 2006.229.13:38:52.09#ibcon#about to read 4, iclass 36, count 2 2006.229.13:38:52.09#ibcon#read 4, iclass 36, count 2 2006.229.13:38:52.09#ibcon#about to read 5, iclass 36, count 2 2006.229.13:38:52.09#ibcon#read 5, iclass 36, count 2 2006.229.13:38:52.09#ibcon#about to read 6, iclass 36, count 2 2006.229.13:38:52.09#ibcon#read 6, iclass 36, count 2 2006.229.13:38:52.09#ibcon#end of sib2, iclass 36, count 2 2006.229.13:38:52.09#ibcon#*after write, iclass 36, count 2 2006.229.13:38:52.09#ibcon#*before return 0, iclass 36, count 2 2006.229.13:38:52.09#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:52.09#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.13:38:52.09#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.13:38:52.09#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:52.09#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:52.21#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:52.21#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:52.21#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:38:52.21#ibcon#first serial, iclass 36, count 0 2006.229.13:38:52.21#ibcon#enter sib2, iclass 36, count 0 2006.229.13:38:52.21#ibcon#flushed, iclass 36, count 0 2006.229.13:38:52.21#ibcon#about to write, iclass 36, count 0 2006.229.13:38:52.21#ibcon#wrote, iclass 36, count 0 2006.229.13:38:52.21#ibcon#about to read 3, iclass 36, count 0 2006.229.13:38:52.23#ibcon#read 3, iclass 36, count 0 2006.229.13:38:52.23#ibcon#about to read 4, iclass 36, count 0 2006.229.13:38:52.23#ibcon#read 4, iclass 36, count 0 2006.229.13:38:52.23#ibcon#about to read 5, iclass 36, count 0 2006.229.13:38:52.23#ibcon#read 5, iclass 36, count 0 2006.229.13:38:52.23#ibcon#about to read 6, iclass 36, count 0 2006.229.13:38:52.23#ibcon#read 6, iclass 36, count 0 2006.229.13:38:52.23#ibcon#end of sib2, iclass 36, count 0 2006.229.13:38:52.23#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:38:52.23#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:38:52.23#ibcon#[27=USB\r\n] 2006.229.13:38:52.23#ibcon#*before write, iclass 36, count 0 2006.229.13:38:52.23#ibcon#enter sib2, iclass 36, count 0 2006.229.13:38:52.23#ibcon#flushed, iclass 36, count 0 2006.229.13:38:52.23#ibcon#about to write, iclass 36, count 0 2006.229.13:38:52.23#ibcon#wrote, iclass 36, count 0 2006.229.13:38:52.23#ibcon#about to read 3, iclass 36, count 0 2006.229.13:38:52.26#ibcon#read 3, iclass 36, count 0 2006.229.13:38:52.26#ibcon#about to read 4, iclass 36, count 0 2006.229.13:38:52.26#ibcon#read 4, iclass 36, count 0 2006.229.13:38:52.26#ibcon#about to read 5, iclass 36, count 0 2006.229.13:38:52.26#ibcon#read 5, iclass 36, count 0 2006.229.13:38:52.26#ibcon#about to read 6, iclass 36, count 0 2006.229.13:38:52.26#ibcon#read 6, iclass 36, count 0 2006.229.13:38:52.26#ibcon#end of sib2, iclass 36, count 0 2006.229.13:38:52.26#ibcon#*after write, iclass 36, count 0 2006.229.13:38:52.26#ibcon#*before return 0, iclass 36, count 0 2006.229.13:38:52.26#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:52.26#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.13:38:52.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:38:52.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:38:52.26$vck44/vblo=5,709.99 2006.229.13:38:52.26#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.13:38:52.26#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.13:38:52.26#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:52.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:52.26#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:52.26#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:52.26#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:38:52.26#ibcon#first serial, iclass 38, count 0 2006.229.13:38:52.26#ibcon#enter sib2, iclass 38, count 0 2006.229.13:38:52.26#ibcon#flushed, iclass 38, count 0 2006.229.13:38:52.26#ibcon#about to write, iclass 38, count 0 2006.229.13:38:52.26#ibcon#wrote, iclass 38, count 0 2006.229.13:38:52.26#ibcon#about to read 3, iclass 38, count 0 2006.229.13:38:52.28#ibcon#read 3, iclass 38, count 0 2006.229.13:38:52.28#ibcon#about to read 4, iclass 38, count 0 2006.229.13:38:52.28#ibcon#read 4, iclass 38, count 0 2006.229.13:38:52.28#ibcon#about to read 5, iclass 38, count 0 2006.229.13:38:52.28#ibcon#read 5, iclass 38, count 0 2006.229.13:38:52.28#ibcon#about to read 6, iclass 38, count 0 2006.229.13:38:52.28#ibcon#read 6, iclass 38, count 0 2006.229.13:38:52.28#ibcon#end of sib2, iclass 38, count 0 2006.229.13:38:52.28#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:38:52.28#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:38:52.28#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:38:52.28#ibcon#*before write, iclass 38, count 0 2006.229.13:38:52.28#ibcon#enter sib2, iclass 38, count 0 2006.229.13:38:52.28#ibcon#flushed, iclass 38, count 0 2006.229.13:38:52.28#ibcon#about to write, iclass 38, count 0 2006.229.13:38:52.28#ibcon#wrote, iclass 38, count 0 2006.229.13:38:52.28#ibcon#about to read 3, iclass 38, count 0 2006.229.13:38:52.32#ibcon#read 3, iclass 38, count 0 2006.229.13:38:52.32#ibcon#about to read 4, iclass 38, count 0 2006.229.13:38:52.32#ibcon#read 4, iclass 38, count 0 2006.229.13:38:52.32#ibcon#about to read 5, iclass 38, count 0 2006.229.13:38:52.32#ibcon#read 5, iclass 38, count 0 2006.229.13:38:52.32#ibcon#about to read 6, iclass 38, count 0 2006.229.13:38:52.32#ibcon#read 6, iclass 38, count 0 2006.229.13:38:52.32#ibcon#end of sib2, iclass 38, count 0 2006.229.13:38:52.32#ibcon#*after write, iclass 38, count 0 2006.229.13:38:52.32#ibcon#*before return 0, iclass 38, count 0 2006.229.13:38:52.32#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:52.32#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.13:38:52.32#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:38:52.32#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:38:52.32$vck44/vb=5,4 2006.229.13:38:52.32#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.13:38:52.32#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.13:38:52.32#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:52.32#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:52.38#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:52.38#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:52.38#ibcon#enter wrdev, iclass 40, count 2 2006.229.13:38:52.38#ibcon#first serial, iclass 40, count 2 2006.229.13:38:52.38#ibcon#enter sib2, iclass 40, count 2 2006.229.13:38:52.38#ibcon#flushed, iclass 40, count 2 2006.229.13:38:52.38#ibcon#about to write, iclass 40, count 2 2006.229.13:38:52.38#ibcon#wrote, iclass 40, count 2 2006.229.13:38:52.38#ibcon#about to read 3, iclass 40, count 2 2006.229.13:38:52.40#ibcon#read 3, iclass 40, count 2 2006.229.13:38:52.40#ibcon#about to read 4, iclass 40, count 2 2006.229.13:38:52.40#ibcon#read 4, iclass 40, count 2 2006.229.13:38:52.40#ibcon#about to read 5, iclass 40, count 2 2006.229.13:38:52.40#ibcon#read 5, iclass 40, count 2 2006.229.13:38:52.40#ibcon#about to read 6, iclass 40, count 2 2006.229.13:38:52.40#ibcon#read 6, iclass 40, count 2 2006.229.13:38:52.40#ibcon#end of sib2, iclass 40, count 2 2006.229.13:38:52.40#ibcon#*mode == 0, iclass 40, count 2 2006.229.13:38:52.40#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.13:38:52.40#ibcon#[27=AT05-04\r\n] 2006.229.13:38:52.40#ibcon#*before write, iclass 40, count 2 2006.229.13:38:52.40#ibcon#enter sib2, iclass 40, count 2 2006.229.13:38:52.40#ibcon#flushed, iclass 40, count 2 2006.229.13:38:52.40#ibcon#about to write, iclass 40, count 2 2006.229.13:38:52.40#ibcon#wrote, iclass 40, count 2 2006.229.13:38:52.40#ibcon#about to read 3, iclass 40, count 2 2006.229.13:38:52.43#ibcon#read 3, iclass 40, count 2 2006.229.13:38:52.43#ibcon#about to read 4, iclass 40, count 2 2006.229.13:38:52.43#ibcon#read 4, iclass 40, count 2 2006.229.13:38:52.43#ibcon#about to read 5, iclass 40, count 2 2006.229.13:38:52.43#ibcon#read 5, iclass 40, count 2 2006.229.13:38:52.43#ibcon#about to read 6, iclass 40, count 2 2006.229.13:38:52.43#ibcon#read 6, iclass 40, count 2 2006.229.13:38:52.43#ibcon#end of sib2, iclass 40, count 2 2006.229.13:38:52.43#ibcon#*after write, iclass 40, count 2 2006.229.13:38:52.43#ibcon#*before return 0, iclass 40, count 2 2006.229.13:38:52.43#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:52.43#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.13:38:52.43#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.13:38:52.43#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:52.43#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:52.54#abcon#<5=/04 1.8 2.9 27.551001002.1\r\n> 2006.229.13:38:52.55#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:52.55#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:52.55#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:38:52.55#ibcon#first serial, iclass 40, count 0 2006.229.13:38:52.55#ibcon#enter sib2, iclass 40, count 0 2006.229.13:38:52.55#ibcon#flushed, iclass 40, count 0 2006.229.13:38:52.55#ibcon#about to write, iclass 40, count 0 2006.229.13:38:52.55#ibcon#wrote, iclass 40, count 0 2006.229.13:38:52.55#ibcon#about to read 3, iclass 40, count 0 2006.229.13:38:52.56#abcon#{5=INTERFACE CLEAR} 2006.229.13:38:52.57#ibcon#read 3, iclass 40, count 0 2006.229.13:38:52.57#ibcon#about to read 4, iclass 40, count 0 2006.229.13:38:52.57#ibcon#read 4, iclass 40, count 0 2006.229.13:38:52.57#ibcon#about to read 5, iclass 40, count 0 2006.229.13:38:52.57#ibcon#read 5, iclass 40, count 0 2006.229.13:38:52.57#ibcon#about to read 6, iclass 40, count 0 2006.229.13:38:52.57#ibcon#read 6, iclass 40, count 0 2006.229.13:38:52.57#ibcon#end of sib2, iclass 40, count 0 2006.229.13:38:52.57#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:38:52.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:38:52.57#ibcon#[27=USB\r\n] 2006.229.13:38:52.57#ibcon#*before write, iclass 40, count 0 2006.229.13:38:52.57#ibcon#enter sib2, iclass 40, count 0 2006.229.13:38:52.57#ibcon#flushed, iclass 40, count 0 2006.229.13:38:52.57#ibcon#about to write, iclass 40, count 0 2006.229.13:38:52.57#ibcon#wrote, iclass 40, count 0 2006.229.13:38:52.57#ibcon#about to read 3, iclass 40, count 0 2006.229.13:38:52.60#ibcon#read 3, iclass 40, count 0 2006.229.13:38:52.60#ibcon#about to read 4, iclass 40, count 0 2006.229.13:38:52.60#ibcon#read 4, iclass 40, count 0 2006.229.13:38:52.60#ibcon#about to read 5, iclass 40, count 0 2006.229.13:38:52.60#ibcon#read 5, iclass 40, count 0 2006.229.13:38:52.60#ibcon#about to read 6, iclass 40, count 0 2006.229.13:38:52.60#ibcon#read 6, iclass 40, count 0 2006.229.13:38:52.60#ibcon#end of sib2, iclass 40, count 0 2006.229.13:38:52.60#ibcon#*after write, iclass 40, count 0 2006.229.13:38:52.60#ibcon#*before return 0, iclass 40, count 0 2006.229.13:38:52.60#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:52.60#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.13:38:52.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:38:52.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:38:52.60$vck44/vblo=6,719.99 2006.229.13:38:52.60#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:38:52.60#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:38:52.60#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:52.60#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:38:52.60#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:38:52.60#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:38:52.60#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:38:52.60#ibcon#first serial, iclass 7, count 0 2006.229.13:38:52.60#ibcon#enter sib2, iclass 7, count 0 2006.229.13:38:52.60#ibcon#flushed, iclass 7, count 0 2006.229.13:38:52.60#ibcon#about to write, iclass 7, count 0 2006.229.13:38:52.60#ibcon#wrote, iclass 7, count 0 2006.229.13:38:52.60#ibcon#about to read 3, iclass 7, count 0 2006.229.13:38:52.62#ibcon#read 3, iclass 7, count 0 2006.229.13:38:52.62#ibcon#about to read 4, iclass 7, count 0 2006.229.13:38:52.62#ibcon#read 4, iclass 7, count 0 2006.229.13:38:52.62#ibcon#about to read 5, iclass 7, count 0 2006.229.13:38:52.62#ibcon#read 5, iclass 7, count 0 2006.229.13:38:52.62#ibcon#about to read 6, iclass 7, count 0 2006.229.13:38:52.62#ibcon#read 6, iclass 7, count 0 2006.229.13:38:52.62#ibcon#end of sib2, iclass 7, count 0 2006.229.13:38:52.62#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:38:52.62#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:38:52.62#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:38:52.62#ibcon#*before write, iclass 7, count 0 2006.229.13:38:52.62#ibcon#enter sib2, iclass 7, count 0 2006.229.13:38:52.62#ibcon#flushed, iclass 7, count 0 2006.229.13:38:52.62#ibcon#about to write, iclass 7, count 0 2006.229.13:38:52.62#ibcon#wrote, iclass 7, count 0 2006.229.13:38:52.62#ibcon#about to read 3, iclass 7, count 0 2006.229.13:38:52.62#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:38:52.66#ibcon#read 3, iclass 7, count 0 2006.229.13:38:52.66#ibcon#about to read 4, iclass 7, count 0 2006.229.13:38:52.66#ibcon#read 4, iclass 7, count 0 2006.229.13:38:52.66#ibcon#about to read 5, iclass 7, count 0 2006.229.13:38:52.66#ibcon#read 5, iclass 7, count 0 2006.229.13:38:52.66#ibcon#about to read 6, iclass 7, count 0 2006.229.13:38:52.66#ibcon#read 6, iclass 7, count 0 2006.229.13:38:52.66#ibcon#end of sib2, iclass 7, count 0 2006.229.13:38:52.66#ibcon#*after write, iclass 7, count 0 2006.229.13:38:52.66#ibcon#*before return 0, iclass 7, count 0 2006.229.13:38:52.66#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:38:52.66#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:38:52.66#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:38:52.66#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:38:52.66$vck44/vb=6,4 2006.229.13:38:52.66#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.13:38:52.66#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.13:38:52.66#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:52.66#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:52.72#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:52.72#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:52.72#ibcon#enter wrdev, iclass 12, count 2 2006.229.13:38:52.72#ibcon#first serial, iclass 12, count 2 2006.229.13:38:52.72#ibcon#enter sib2, iclass 12, count 2 2006.229.13:38:52.72#ibcon#flushed, iclass 12, count 2 2006.229.13:38:52.72#ibcon#about to write, iclass 12, count 2 2006.229.13:38:52.72#ibcon#wrote, iclass 12, count 2 2006.229.13:38:52.72#ibcon#about to read 3, iclass 12, count 2 2006.229.13:38:52.74#ibcon#read 3, iclass 12, count 2 2006.229.13:38:52.74#ibcon#about to read 4, iclass 12, count 2 2006.229.13:38:52.74#ibcon#read 4, iclass 12, count 2 2006.229.13:38:52.74#ibcon#about to read 5, iclass 12, count 2 2006.229.13:38:52.74#ibcon#read 5, iclass 12, count 2 2006.229.13:38:52.74#ibcon#about to read 6, iclass 12, count 2 2006.229.13:38:52.74#ibcon#read 6, iclass 12, count 2 2006.229.13:38:52.74#ibcon#end of sib2, iclass 12, count 2 2006.229.13:38:52.74#ibcon#*mode == 0, iclass 12, count 2 2006.229.13:38:52.74#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.13:38:52.74#ibcon#[27=AT06-04\r\n] 2006.229.13:38:52.74#ibcon#*before write, iclass 12, count 2 2006.229.13:38:52.74#ibcon#enter sib2, iclass 12, count 2 2006.229.13:38:52.74#ibcon#flushed, iclass 12, count 2 2006.229.13:38:52.74#ibcon#about to write, iclass 12, count 2 2006.229.13:38:52.74#ibcon#wrote, iclass 12, count 2 2006.229.13:38:52.74#ibcon#about to read 3, iclass 12, count 2 2006.229.13:38:52.77#ibcon#read 3, iclass 12, count 2 2006.229.13:38:52.77#ibcon#about to read 4, iclass 12, count 2 2006.229.13:38:52.77#ibcon#read 4, iclass 12, count 2 2006.229.13:38:52.77#ibcon#about to read 5, iclass 12, count 2 2006.229.13:38:52.77#ibcon#read 5, iclass 12, count 2 2006.229.13:38:52.77#ibcon#about to read 6, iclass 12, count 2 2006.229.13:38:52.77#ibcon#read 6, iclass 12, count 2 2006.229.13:38:52.77#ibcon#end of sib2, iclass 12, count 2 2006.229.13:38:52.77#ibcon#*after write, iclass 12, count 2 2006.229.13:38:52.77#ibcon#*before return 0, iclass 12, count 2 2006.229.13:38:52.77#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:52.77#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:38:52.77#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.13:38:52.77#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:52.77#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:52.89#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:52.89#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:52.89#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:38:52.89#ibcon#first serial, iclass 12, count 0 2006.229.13:38:52.89#ibcon#enter sib2, iclass 12, count 0 2006.229.13:38:52.89#ibcon#flushed, iclass 12, count 0 2006.229.13:38:52.89#ibcon#about to write, iclass 12, count 0 2006.229.13:38:52.89#ibcon#wrote, iclass 12, count 0 2006.229.13:38:52.89#ibcon#about to read 3, iclass 12, count 0 2006.229.13:38:52.91#ibcon#read 3, iclass 12, count 0 2006.229.13:38:52.91#ibcon#about to read 4, iclass 12, count 0 2006.229.13:38:52.91#ibcon#read 4, iclass 12, count 0 2006.229.13:38:52.91#ibcon#about to read 5, iclass 12, count 0 2006.229.13:38:52.91#ibcon#read 5, iclass 12, count 0 2006.229.13:38:52.91#ibcon#about to read 6, iclass 12, count 0 2006.229.13:38:52.91#ibcon#read 6, iclass 12, count 0 2006.229.13:38:52.91#ibcon#end of sib2, iclass 12, count 0 2006.229.13:38:52.91#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:38:52.91#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:38:52.91#ibcon#[27=USB\r\n] 2006.229.13:38:52.91#ibcon#*before write, iclass 12, count 0 2006.229.13:38:52.91#ibcon#enter sib2, iclass 12, count 0 2006.229.13:38:52.91#ibcon#flushed, iclass 12, count 0 2006.229.13:38:52.91#ibcon#about to write, iclass 12, count 0 2006.229.13:38:52.91#ibcon#wrote, iclass 12, count 0 2006.229.13:38:52.91#ibcon#about to read 3, iclass 12, count 0 2006.229.13:38:52.94#ibcon#read 3, iclass 12, count 0 2006.229.13:38:52.94#ibcon#about to read 4, iclass 12, count 0 2006.229.13:38:52.94#ibcon#read 4, iclass 12, count 0 2006.229.13:38:52.94#ibcon#about to read 5, iclass 12, count 0 2006.229.13:38:52.94#ibcon#read 5, iclass 12, count 0 2006.229.13:38:52.94#ibcon#about to read 6, iclass 12, count 0 2006.229.13:38:52.94#ibcon#read 6, iclass 12, count 0 2006.229.13:38:52.94#ibcon#end of sib2, iclass 12, count 0 2006.229.13:38:52.94#ibcon#*after write, iclass 12, count 0 2006.229.13:38:52.94#ibcon#*before return 0, iclass 12, count 0 2006.229.13:38:52.94#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:52.94#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:38:52.94#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:38:52.94#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:38:52.94$vck44/vblo=7,734.99 2006.229.13:38:52.94#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.13:38:52.94#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.13:38:52.94#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:52.94#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:52.94#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:52.94#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:52.94#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:38:52.94#ibcon#first serial, iclass 14, count 0 2006.229.13:38:52.94#ibcon#enter sib2, iclass 14, count 0 2006.229.13:38:52.94#ibcon#flushed, iclass 14, count 0 2006.229.13:38:52.94#ibcon#about to write, iclass 14, count 0 2006.229.13:38:52.94#ibcon#wrote, iclass 14, count 0 2006.229.13:38:52.94#ibcon#about to read 3, iclass 14, count 0 2006.229.13:38:52.96#ibcon#read 3, iclass 14, count 0 2006.229.13:38:52.96#ibcon#about to read 4, iclass 14, count 0 2006.229.13:38:52.96#ibcon#read 4, iclass 14, count 0 2006.229.13:38:52.96#ibcon#about to read 5, iclass 14, count 0 2006.229.13:38:52.96#ibcon#read 5, iclass 14, count 0 2006.229.13:38:52.96#ibcon#about to read 6, iclass 14, count 0 2006.229.13:38:52.96#ibcon#read 6, iclass 14, count 0 2006.229.13:38:52.96#ibcon#end of sib2, iclass 14, count 0 2006.229.13:38:52.96#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:38:52.96#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:38:52.96#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:38:52.96#ibcon#*before write, iclass 14, count 0 2006.229.13:38:52.96#ibcon#enter sib2, iclass 14, count 0 2006.229.13:38:52.96#ibcon#flushed, iclass 14, count 0 2006.229.13:38:52.96#ibcon#about to write, iclass 14, count 0 2006.229.13:38:52.96#ibcon#wrote, iclass 14, count 0 2006.229.13:38:52.96#ibcon#about to read 3, iclass 14, count 0 2006.229.13:38:53.00#ibcon#read 3, iclass 14, count 0 2006.229.13:38:53.00#ibcon#about to read 4, iclass 14, count 0 2006.229.13:38:53.00#ibcon#read 4, iclass 14, count 0 2006.229.13:38:53.00#ibcon#about to read 5, iclass 14, count 0 2006.229.13:38:53.00#ibcon#read 5, iclass 14, count 0 2006.229.13:38:53.00#ibcon#about to read 6, iclass 14, count 0 2006.229.13:38:53.00#ibcon#read 6, iclass 14, count 0 2006.229.13:38:53.00#ibcon#end of sib2, iclass 14, count 0 2006.229.13:38:53.00#ibcon#*after write, iclass 14, count 0 2006.229.13:38:53.00#ibcon#*before return 0, iclass 14, count 0 2006.229.13:38:53.00#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:53.00#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.13:38:53.00#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:38:53.00#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:38:53.00$vck44/vb=7,4 2006.229.13:38:53.00#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.13:38:53.00#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.13:38:53.00#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:53.00#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:53.06#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:53.06#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:53.06#ibcon#enter wrdev, iclass 16, count 2 2006.229.13:38:53.06#ibcon#first serial, iclass 16, count 2 2006.229.13:38:53.06#ibcon#enter sib2, iclass 16, count 2 2006.229.13:38:53.06#ibcon#flushed, iclass 16, count 2 2006.229.13:38:53.06#ibcon#about to write, iclass 16, count 2 2006.229.13:38:53.06#ibcon#wrote, iclass 16, count 2 2006.229.13:38:53.06#ibcon#about to read 3, iclass 16, count 2 2006.229.13:38:53.08#ibcon#read 3, iclass 16, count 2 2006.229.13:38:53.08#ibcon#about to read 4, iclass 16, count 2 2006.229.13:38:53.08#ibcon#read 4, iclass 16, count 2 2006.229.13:38:53.08#ibcon#about to read 5, iclass 16, count 2 2006.229.13:38:53.08#ibcon#read 5, iclass 16, count 2 2006.229.13:38:53.08#ibcon#about to read 6, iclass 16, count 2 2006.229.13:38:53.08#ibcon#read 6, iclass 16, count 2 2006.229.13:38:53.08#ibcon#end of sib2, iclass 16, count 2 2006.229.13:38:53.08#ibcon#*mode == 0, iclass 16, count 2 2006.229.13:38:53.08#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.13:38:53.08#ibcon#[27=AT07-04\r\n] 2006.229.13:38:53.08#ibcon#*before write, iclass 16, count 2 2006.229.13:38:53.08#ibcon#enter sib2, iclass 16, count 2 2006.229.13:38:53.08#ibcon#flushed, iclass 16, count 2 2006.229.13:38:53.08#ibcon#about to write, iclass 16, count 2 2006.229.13:38:53.08#ibcon#wrote, iclass 16, count 2 2006.229.13:38:53.08#ibcon#about to read 3, iclass 16, count 2 2006.229.13:38:53.11#ibcon#read 3, iclass 16, count 2 2006.229.13:38:53.11#ibcon#about to read 4, iclass 16, count 2 2006.229.13:38:53.11#ibcon#read 4, iclass 16, count 2 2006.229.13:38:53.11#ibcon#about to read 5, iclass 16, count 2 2006.229.13:38:53.11#ibcon#read 5, iclass 16, count 2 2006.229.13:38:53.11#ibcon#about to read 6, iclass 16, count 2 2006.229.13:38:53.11#ibcon#read 6, iclass 16, count 2 2006.229.13:38:53.11#ibcon#end of sib2, iclass 16, count 2 2006.229.13:38:53.11#ibcon#*after write, iclass 16, count 2 2006.229.13:38:53.11#ibcon#*before return 0, iclass 16, count 2 2006.229.13:38:53.11#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:53.11#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.13:38:53.11#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.13:38:53.11#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:53.11#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:53.23#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:53.23#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:53.23#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:38:53.23#ibcon#first serial, iclass 16, count 0 2006.229.13:38:53.23#ibcon#enter sib2, iclass 16, count 0 2006.229.13:38:53.23#ibcon#flushed, iclass 16, count 0 2006.229.13:38:53.23#ibcon#about to write, iclass 16, count 0 2006.229.13:38:53.23#ibcon#wrote, iclass 16, count 0 2006.229.13:38:53.23#ibcon#about to read 3, iclass 16, count 0 2006.229.13:38:53.25#ibcon#read 3, iclass 16, count 0 2006.229.13:38:53.25#ibcon#about to read 4, iclass 16, count 0 2006.229.13:38:53.25#ibcon#read 4, iclass 16, count 0 2006.229.13:38:53.25#ibcon#about to read 5, iclass 16, count 0 2006.229.13:38:53.25#ibcon#read 5, iclass 16, count 0 2006.229.13:38:53.25#ibcon#about to read 6, iclass 16, count 0 2006.229.13:38:53.25#ibcon#read 6, iclass 16, count 0 2006.229.13:38:53.25#ibcon#end of sib2, iclass 16, count 0 2006.229.13:38:53.25#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:38:53.25#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:38:53.25#ibcon#[27=USB\r\n] 2006.229.13:38:53.25#ibcon#*before write, iclass 16, count 0 2006.229.13:38:53.25#ibcon#enter sib2, iclass 16, count 0 2006.229.13:38:53.25#ibcon#flushed, iclass 16, count 0 2006.229.13:38:53.25#ibcon#about to write, iclass 16, count 0 2006.229.13:38:53.25#ibcon#wrote, iclass 16, count 0 2006.229.13:38:53.25#ibcon#about to read 3, iclass 16, count 0 2006.229.13:38:53.28#ibcon#read 3, iclass 16, count 0 2006.229.13:38:53.28#ibcon#about to read 4, iclass 16, count 0 2006.229.13:38:53.28#ibcon#read 4, iclass 16, count 0 2006.229.13:38:53.28#ibcon#about to read 5, iclass 16, count 0 2006.229.13:38:53.28#ibcon#read 5, iclass 16, count 0 2006.229.13:38:53.28#ibcon#about to read 6, iclass 16, count 0 2006.229.13:38:53.28#ibcon#read 6, iclass 16, count 0 2006.229.13:38:53.28#ibcon#end of sib2, iclass 16, count 0 2006.229.13:38:53.28#ibcon#*after write, iclass 16, count 0 2006.229.13:38:53.28#ibcon#*before return 0, iclass 16, count 0 2006.229.13:38:53.28#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:53.28#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.13:38:53.28#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:38:53.28#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:38:53.28$vck44/vblo=8,744.99 2006.229.13:38:53.28#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.13:38:53.28#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.13:38:53.28#ibcon#ireg 17 cls_cnt 0 2006.229.13:38:53.28#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:53.28#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:53.28#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:53.28#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:38:53.28#ibcon#first serial, iclass 18, count 0 2006.229.13:38:53.28#ibcon#enter sib2, iclass 18, count 0 2006.229.13:38:53.28#ibcon#flushed, iclass 18, count 0 2006.229.13:38:53.28#ibcon#about to write, iclass 18, count 0 2006.229.13:38:53.28#ibcon#wrote, iclass 18, count 0 2006.229.13:38:53.28#ibcon#about to read 3, iclass 18, count 0 2006.229.13:38:53.30#ibcon#read 3, iclass 18, count 0 2006.229.13:38:53.30#ibcon#about to read 4, iclass 18, count 0 2006.229.13:38:53.30#ibcon#read 4, iclass 18, count 0 2006.229.13:38:53.30#ibcon#about to read 5, iclass 18, count 0 2006.229.13:38:53.30#ibcon#read 5, iclass 18, count 0 2006.229.13:38:53.30#ibcon#about to read 6, iclass 18, count 0 2006.229.13:38:53.30#ibcon#read 6, iclass 18, count 0 2006.229.13:38:53.30#ibcon#end of sib2, iclass 18, count 0 2006.229.13:38:53.30#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:38:53.30#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:38:53.30#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:38:53.30#ibcon#*before write, iclass 18, count 0 2006.229.13:38:53.30#ibcon#enter sib2, iclass 18, count 0 2006.229.13:38:53.30#ibcon#flushed, iclass 18, count 0 2006.229.13:38:53.30#ibcon#about to write, iclass 18, count 0 2006.229.13:38:53.30#ibcon#wrote, iclass 18, count 0 2006.229.13:38:53.30#ibcon#about to read 3, iclass 18, count 0 2006.229.13:38:53.34#ibcon#read 3, iclass 18, count 0 2006.229.13:38:53.34#ibcon#about to read 4, iclass 18, count 0 2006.229.13:38:53.34#ibcon#read 4, iclass 18, count 0 2006.229.13:38:53.34#ibcon#about to read 5, iclass 18, count 0 2006.229.13:38:53.34#ibcon#read 5, iclass 18, count 0 2006.229.13:38:53.34#ibcon#about to read 6, iclass 18, count 0 2006.229.13:38:53.34#ibcon#read 6, iclass 18, count 0 2006.229.13:38:53.34#ibcon#end of sib2, iclass 18, count 0 2006.229.13:38:53.34#ibcon#*after write, iclass 18, count 0 2006.229.13:38:53.34#ibcon#*before return 0, iclass 18, count 0 2006.229.13:38:53.34#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:53.34#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.13:38:53.34#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:38:53.34#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:38:53.34$vck44/vb=8,4 2006.229.13:38:53.34#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.13:38:53.34#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.13:38:53.34#ibcon#ireg 11 cls_cnt 2 2006.229.13:38:53.34#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:53.40#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:53.40#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:53.40#ibcon#enter wrdev, iclass 20, count 2 2006.229.13:38:53.40#ibcon#first serial, iclass 20, count 2 2006.229.13:38:53.40#ibcon#enter sib2, iclass 20, count 2 2006.229.13:38:53.40#ibcon#flushed, iclass 20, count 2 2006.229.13:38:53.40#ibcon#about to write, iclass 20, count 2 2006.229.13:38:53.40#ibcon#wrote, iclass 20, count 2 2006.229.13:38:53.40#ibcon#about to read 3, iclass 20, count 2 2006.229.13:38:53.42#ibcon#read 3, iclass 20, count 2 2006.229.13:38:53.42#ibcon#about to read 4, iclass 20, count 2 2006.229.13:38:53.42#ibcon#read 4, iclass 20, count 2 2006.229.13:38:53.42#ibcon#about to read 5, iclass 20, count 2 2006.229.13:38:53.42#ibcon#read 5, iclass 20, count 2 2006.229.13:38:53.42#ibcon#about to read 6, iclass 20, count 2 2006.229.13:38:53.42#ibcon#read 6, iclass 20, count 2 2006.229.13:38:53.42#ibcon#end of sib2, iclass 20, count 2 2006.229.13:38:53.42#ibcon#*mode == 0, iclass 20, count 2 2006.229.13:38:53.42#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.13:38:53.42#ibcon#[27=AT08-04\r\n] 2006.229.13:38:53.42#ibcon#*before write, iclass 20, count 2 2006.229.13:38:53.42#ibcon#enter sib2, iclass 20, count 2 2006.229.13:38:53.42#ibcon#flushed, iclass 20, count 2 2006.229.13:38:53.42#ibcon#about to write, iclass 20, count 2 2006.229.13:38:53.42#ibcon#wrote, iclass 20, count 2 2006.229.13:38:53.42#ibcon#about to read 3, iclass 20, count 2 2006.229.13:38:53.45#ibcon#read 3, iclass 20, count 2 2006.229.13:38:53.45#ibcon#about to read 4, iclass 20, count 2 2006.229.13:38:53.45#ibcon#read 4, iclass 20, count 2 2006.229.13:38:53.45#ibcon#about to read 5, iclass 20, count 2 2006.229.13:38:53.45#ibcon#read 5, iclass 20, count 2 2006.229.13:38:53.45#ibcon#about to read 6, iclass 20, count 2 2006.229.13:38:53.45#ibcon#read 6, iclass 20, count 2 2006.229.13:38:53.45#ibcon#end of sib2, iclass 20, count 2 2006.229.13:38:53.45#ibcon#*after write, iclass 20, count 2 2006.229.13:38:53.45#ibcon#*before return 0, iclass 20, count 2 2006.229.13:38:53.45#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:53.45#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.13:38:53.45#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.13:38:53.45#ibcon#ireg 7 cls_cnt 0 2006.229.13:38:53.45#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:53.57#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:53.57#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:53.57#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:38:53.57#ibcon#first serial, iclass 20, count 0 2006.229.13:38:53.57#ibcon#enter sib2, iclass 20, count 0 2006.229.13:38:53.57#ibcon#flushed, iclass 20, count 0 2006.229.13:38:53.57#ibcon#about to write, iclass 20, count 0 2006.229.13:38:53.57#ibcon#wrote, iclass 20, count 0 2006.229.13:38:53.57#ibcon#about to read 3, iclass 20, count 0 2006.229.13:38:53.59#ibcon#read 3, iclass 20, count 0 2006.229.13:38:53.59#ibcon#about to read 4, iclass 20, count 0 2006.229.13:38:53.59#ibcon#read 4, iclass 20, count 0 2006.229.13:38:53.59#ibcon#about to read 5, iclass 20, count 0 2006.229.13:38:53.59#ibcon#read 5, iclass 20, count 0 2006.229.13:38:53.59#ibcon#about to read 6, iclass 20, count 0 2006.229.13:38:53.59#ibcon#read 6, iclass 20, count 0 2006.229.13:38:53.59#ibcon#end of sib2, iclass 20, count 0 2006.229.13:38:53.59#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:38:53.59#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:38:53.59#ibcon#[27=USB\r\n] 2006.229.13:38:53.59#ibcon#*before write, iclass 20, count 0 2006.229.13:38:53.59#ibcon#enter sib2, iclass 20, count 0 2006.229.13:38:53.59#ibcon#flushed, iclass 20, count 0 2006.229.13:38:53.59#ibcon#about to write, iclass 20, count 0 2006.229.13:38:53.59#ibcon#wrote, iclass 20, count 0 2006.229.13:38:53.59#ibcon#about to read 3, iclass 20, count 0 2006.229.13:38:53.62#ibcon#read 3, iclass 20, count 0 2006.229.13:38:53.62#ibcon#about to read 4, iclass 20, count 0 2006.229.13:38:53.62#ibcon#read 4, iclass 20, count 0 2006.229.13:38:53.62#ibcon#about to read 5, iclass 20, count 0 2006.229.13:38:53.62#ibcon#read 5, iclass 20, count 0 2006.229.13:38:53.62#ibcon#about to read 6, iclass 20, count 0 2006.229.13:38:53.62#ibcon#read 6, iclass 20, count 0 2006.229.13:38:53.62#ibcon#end of sib2, iclass 20, count 0 2006.229.13:38:53.62#ibcon#*after write, iclass 20, count 0 2006.229.13:38:53.62#ibcon#*before return 0, iclass 20, count 0 2006.229.13:38:53.62#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:53.62#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.13:38:53.62#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:38:53.62#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:38:53.62$vck44/vabw=wide 2006.229.13:38:53.62#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.13:38:53.62#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.13:38:53.62#ibcon#ireg 8 cls_cnt 0 2006.229.13:38:53.62#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:53.62#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:53.62#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:53.62#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:38:53.62#ibcon#first serial, iclass 22, count 0 2006.229.13:38:53.62#ibcon#enter sib2, iclass 22, count 0 2006.229.13:38:53.62#ibcon#flushed, iclass 22, count 0 2006.229.13:38:53.62#ibcon#about to write, iclass 22, count 0 2006.229.13:38:53.62#ibcon#wrote, iclass 22, count 0 2006.229.13:38:53.62#ibcon#about to read 3, iclass 22, count 0 2006.229.13:38:53.64#ibcon#read 3, iclass 22, count 0 2006.229.13:38:53.64#ibcon#about to read 4, iclass 22, count 0 2006.229.13:38:53.64#ibcon#read 4, iclass 22, count 0 2006.229.13:38:53.64#ibcon#about to read 5, iclass 22, count 0 2006.229.13:38:53.64#ibcon#read 5, iclass 22, count 0 2006.229.13:38:53.64#ibcon#about to read 6, iclass 22, count 0 2006.229.13:38:53.64#ibcon#read 6, iclass 22, count 0 2006.229.13:38:53.64#ibcon#end of sib2, iclass 22, count 0 2006.229.13:38:53.64#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:38:53.64#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:38:53.64#ibcon#[25=BW32\r\n] 2006.229.13:38:53.64#ibcon#*before write, iclass 22, count 0 2006.229.13:38:53.64#ibcon#enter sib2, iclass 22, count 0 2006.229.13:38:53.64#ibcon#flushed, iclass 22, count 0 2006.229.13:38:53.64#ibcon#about to write, iclass 22, count 0 2006.229.13:38:53.64#ibcon#wrote, iclass 22, count 0 2006.229.13:38:53.64#ibcon#about to read 3, iclass 22, count 0 2006.229.13:38:53.67#ibcon#read 3, iclass 22, count 0 2006.229.13:38:53.67#ibcon#about to read 4, iclass 22, count 0 2006.229.13:38:53.67#ibcon#read 4, iclass 22, count 0 2006.229.13:38:53.67#ibcon#about to read 5, iclass 22, count 0 2006.229.13:38:53.67#ibcon#read 5, iclass 22, count 0 2006.229.13:38:53.67#ibcon#about to read 6, iclass 22, count 0 2006.229.13:38:53.67#ibcon#read 6, iclass 22, count 0 2006.229.13:38:53.67#ibcon#end of sib2, iclass 22, count 0 2006.229.13:38:53.67#ibcon#*after write, iclass 22, count 0 2006.229.13:38:53.67#ibcon#*before return 0, iclass 22, count 0 2006.229.13:38:53.67#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:53.67#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.13:38:53.67#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:38:53.67#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:38:53.67$vck44/vbbw=wide 2006.229.13:38:53.67#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:38:53.67#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:38:53.67#ibcon#ireg 8 cls_cnt 0 2006.229.13:38:53.67#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:38:53.74#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:38:53.74#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:38:53.74#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:38:53.74#ibcon#first serial, iclass 24, count 0 2006.229.13:38:53.74#ibcon#enter sib2, iclass 24, count 0 2006.229.13:38:53.74#ibcon#flushed, iclass 24, count 0 2006.229.13:38:53.74#ibcon#about to write, iclass 24, count 0 2006.229.13:38:53.74#ibcon#wrote, iclass 24, count 0 2006.229.13:38:53.74#ibcon#about to read 3, iclass 24, count 0 2006.229.13:38:53.76#ibcon#read 3, iclass 24, count 0 2006.229.13:38:53.76#ibcon#about to read 4, iclass 24, count 0 2006.229.13:38:53.76#ibcon#read 4, iclass 24, count 0 2006.229.13:38:53.76#ibcon#about to read 5, iclass 24, count 0 2006.229.13:38:53.76#ibcon#read 5, iclass 24, count 0 2006.229.13:38:53.76#ibcon#about to read 6, iclass 24, count 0 2006.229.13:38:53.76#ibcon#read 6, iclass 24, count 0 2006.229.13:38:53.76#ibcon#end of sib2, iclass 24, count 0 2006.229.13:38:53.76#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:38:53.76#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:38:53.76#ibcon#[27=BW32\r\n] 2006.229.13:38:53.76#ibcon#*before write, iclass 24, count 0 2006.229.13:38:53.76#ibcon#enter sib2, iclass 24, count 0 2006.229.13:38:53.76#ibcon#flushed, iclass 24, count 0 2006.229.13:38:53.76#ibcon#about to write, iclass 24, count 0 2006.229.13:38:53.76#ibcon#wrote, iclass 24, count 0 2006.229.13:38:53.76#ibcon#about to read 3, iclass 24, count 0 2006.229.13:38:53.79#ibcon#read 3, iclass 24, count 0 2006.229.13:38:53.79#ibcon#about to read 4, iclass 24, count 0 2006.229.13:38:53.79#ibcon#read 4, iclass 24, count 0 2006.229.13:38:53.79#ibcon#about to read 5, iclass 24, count 0 2006.229.13:38:53.79#ibcon#read 5, iclass 24, count 0 2006.229.13:38:53.79#ibcon#about to read 6, iclass 24, count 0 2006.229.13:38:53.79#ibcon#read 6, iclass 24, count 0 2006.229.13:38:53.79#ibcon#end of sib2, iclass 24, count 0 2006.229.13:38:53.79#ibcon#*after write, iclass 24, count 0 2006.229.13:38:53.79#ibcon#*before return 0, iclass 24, count 0 2006.229.13:38:53.79#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:38:53.79#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:38:53.79#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:38:53.79#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:38:53.79$setupk4/ifdk4 2006.229.13:38:53.79$ifdk4/lo= 2006.229.13:38:53.79$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:38:53.79$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:38:53.79$ifdk4/patch= 2006.229.13:38:53.79$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:38:53.79$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:38:53.79$setupk4/!*+20s 2006.229.13:39:02.71#abcon#<5=/04 1.8 2.9 27.551001002.1\r\n> 2006.229.13:39:02.73#abcon#{5=INTERFACE CLEAR} 2006.229.13:39:02.79#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:39:08.25$setupk4/"tpicd 2006.229.13:39:08.25$setupk4/echo=off 2006.229.13:39:08.25$setupk4/xlog=off 2006.229.13:39:08.25:!2006.229.13:40:03 2006.229.13:39:15.14#trakl#Source acquired 2006.229.13:39:16.14#flagr#flagr/antenna,acquired 2006.229.13:40:03.00:preob 2006.229.13:40:03.14/onsource/TRACKING 2006.229.13:40:03.14:!2006.229.13:40:13 2006.229.13:40:13.00:"tape 2006.229.13:40:13.00:"st=record 2006.229.13:40:13.00:data_valid=on 2006.229.13:40:13.00:midob 2006.229.13:40:13.14/onsource/TRACKING 2006.229.13:40:13.14/wx/27.55,1002.1,100 2006.229.13:40:13.22/cable/+6.4112E-03 2006.229.13:40:14.31/va/01,08,usb,yes,29,31 2006.229.13:40:14.31/va/02,07,usb,yes,31,32 2006.229.13:40:14.31/va/03,06,usb,yes,39,41 2006.229.13:40:14.31/va/04,07,usb,yes,32,34 2006.229.13:40:14.31/va/05,04,usb,yes,29,29 2006.229.13:40:14.31/va/06,04,usb,yes,32,32 2006.229.13:40:14.31/va/07,05,usb,yes,29,29 2006.229.13:40:14.31/va/08,06,usb,yes,21,26 2006.229.13:40:14.54/valo/01,524.99,yes,locked 2006.229.13:40:14.54/valo/02,534.99,yes,locked 2006.229.13:40:14.54/valo/03,564.99,yes,locked 2006.229.13:40:14.54/valo/04,624.99,yes,locked 2006.229.13:40:14.54/valo/05,734.99,yes,locked 2006.229.13:40:14.54/valo/06,814.99,yes,locked 2006.229.13:40:14.54/valo/07,864.99,yes,locked 2006.229.13:40:14.54/valo/08,884.99,yes,locked 2006.229.13:40:15.63/vb/01,04,usb,yes,31,29 2006.229.13:40:15.63/vb/02,04,usb,yes,33,33 2006.229.13:40:15.63/vb/03,04,usb,yes,30,33 2006.229.13:40:15.63/vb/04,04,usb,yes,35,33 2006.229.13:40:15.63/vb/05,04,usb,yes,27,29 2006.229.13:40:15.63/vb/06,04,usb,yes,31,27 2006.229.13:40:15.63/vb/07,04,usb,yes,31,31 2006.229.13:40:15.63/vb/08,04,usb,yes,29,32 2006.229.13:40:15.87/vblo/01,629.99,yes,locked 2006.229.13:40:15.87/vblo/02,634.99,yes,locked 2006.229.13:40:15.87/vblo/03,649.99,yes,locked 2006.229.13:40:15.87/vblo/04,679.99,yes,locked 2006.229.13:40:15.87/vblo/05,709.99,yes,locked 2006.229.13:40:15.87/vblo/06,719.99,yes,locked 2006.229.13:40:15.87/vblo/07,734.99,yes,locked 2006.229.13:40:15.87/vblo/08,744.99,yes,locked 2006.229.13:40:16.02/vabw/8 2006.229.13:40:16.17/vbbw/8 2006.229.13:40:16.34/xfe/off,on,12.0 2006.229.13:40:16.72/ifatt/23,28,28,28 2006.229.13:40:17.07/fmout-gps/S +4.64E-07 2006.229.13:40:17.11:!2006.229.13:41:23 2006.229.13:41:23.00:data_valid=off 2006.229.13:41:23.00:"et 2006.229.13:41:23.00:!+3s 2006.229.13:41:26.01:"tape 2006.229.13:41:26.01:postob 2006.229.13:41:26.09/cable/+6.4122E-03 2006.229.13:41:26.09/wx/27.55,1002.1,100 2006.229.13:41:27.07/fmout-gps/S +4.64E-07 2006.229.13:41:27.07:scan_name=229-1343,jd0608,170 2006.229.13:41:27.07:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.13:41:28.14#flagr#flagr/antenna,new-source 2006.229.13:41:28.14:checkk5 2006.229.13:41:28.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:41:28.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:41:29.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:41:29.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:41:30.18/chk_obsdata//k5ts1/T2291340??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:41:30.58/chk_obsdata//k5ts2/T2291340??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:41:30.97/chk_obsdata//k5ts3/T2291340??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:41:31.39/chk_obsdata//k5ts4/T2291340??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.13:41:32.14/k5log//k5ts1_log_newline 2006.229.13:41:32.83/k5log//k5ts2_log_newline 2006.229.13:41:33.53/k5log//k5ts3_log_newline 2006.229.13:41:34.25/k5log//k5ts4_log_newline 2006.229.13:41:34.27/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:41:34.27:setupk4=1 2006.229.13:41:34.27$setupk4/echo=on 2006.229.13:41:34.27$setupk4/pcalon 2006.229.13:41:34.27$pcalon/"no phase cal control is implemented here 2006.229.13:41:34.27$setupk4/"tpicd=stop 2006.229.13:41:34.28$setupk4/"rec=synch_on 2006.229.13:41:34.28$setupk4/"rec_mode=128 2006.229.13:41:34.28$setupk4/!* 2006.229.13:41:34.28$setupk4/recpk4 2006.229.13:41:34.28$recpk4/recpatch= 2006.229.13:41:34.28$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:41:34.28$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:41:34.28$setupk4/vck44 2006.229.13:41:34.28$vck44/valo=1,524.99 2006.229.13:41:34.28#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:41:34.28#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:41:34.28#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:34.28#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:34.28#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:34.28#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:34.28#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:41:34.28#ibcon#first serial, iclass 12, count 0 2006.229.13:41:34.28#ibcon#enter sib2, iclass 12, count 0 2006.229.13:41:34.28#ibcon#flushed, iclass 12, count 0 2006.229.13:41:34.28#ibcon#about to write, iclass 12, count 0 2006.229.13:41:34.28#ibcon#wrote, iclass 12, count 0 2006.229.13:41:34.28#ibcon#about to read 3, iclass 12, count 0 2006.229.13:41:34.29#ibcon#read 3, iclass 12, count 0 2006.229.13:41:34.29#ibcon#about to read 4, iclass 12, count 0 2006.229.13:41:34.29#ibcon#read 4, iclass 12, count 0 2006.229.13:41:34.29#ibcon#about to read 5, iclass 12, count 0 2006.229.13:41:34.29#ibcon#read 5, iclass 12, count 0 2006.229.13:41:34.29#ibcon#about to read 6, iclass 12, count 0 2006.229.13:41:34.29#ibcon#read 6, iclass 12, count 0 2006.229.13:41:34.29#ibcon#end of sib2, iclass 12, count 0 2006.229.13:41:34.29#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:41:34.29#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:41:34.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:41:34.29#ibcon#*before write, iclass 12, count 0 2006.229.13:41:34.29#ibcon#enter sib2, iclass 12, count 0 2006.229.13:41:34.29#ibcon#flushed, iclass 12, count 0 2006.229.13:41:34.29#ibcon#about to write, iclass 12, count 0 2006.229.13:41:34.29#ibcon#wrote, iclass 12, count 0 2006.229.13:41:34.29#ibcon#about to read 3, iclass 12, count 0 2006.229.13:41:34.34#ibcon#read 3, iclass 12, count 0 2006.229.13:41:34.34#ibcon#about to read 4, iclass 12, count 0 2006.229.13:41:34.34#ibcon#read 4, iclass 12, count 0 2006.229.13:41:34.34#ibcon#about to read 5, iclass 12, count 0 2006.229.13:41:34.34#ibcon#read 5, iclass 12, count 0 2006.229.13:41:34.34#ibcon#about to read 6, iclass 12, count 0 2006.229.13:41:34.34#ibcon#read 6, iclass 12, count 0 2006.229.13:41:34.34#ibcon#end of sib2, iclass 12, count 0 2006.229.13:41:34.34#ibcon#*after write, iclass 12, count 0 2006.229.13:41:34.34#ibcon#*before return 0, iclass 12, count 0 2006.229.13:41:34.34#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:34.34#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:34.34#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:41:34.34#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:41:34.34$vck44/va=1,8 2006.229.13:41:34.34#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:41:34.34#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:41:34.34#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:34.34#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:34.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:34.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:34.34#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:41:34.34#ibcon#first serial, iclass 14, count 2 2006.229.13:41:34.34#ibcon#enter sib2, iclass 14, count 2 2006.229.13:41:34.34#ibcon#flushed, iclass 14, count 2 2006.229.13:41:34.34#ibcon#about to write, iclass 14, count 2 2006.229.13:41:34.34#ibcon#wrote, iclass 14, count 2 2006.229.13:41:34.34#ibcon#about to read 3, iclass 14, count 2 2006.229.13:41:34.36#ibcon#read 3, iclass 14, count 2 2006.229.13:41:34.36#ibcon#about to read 4, iclass 14, count 2 2006.229.13:41:34.36#ibcon#read 4, iclass 14, count 2 2006.229.13:41:34.36#ibcon#about to read 5, iclass 14, count 2 2006.229.13:41:34.36#ibcon#read 5, iclass 14, count 2 2006.229.13:41:34.36#ibcon#about to read 6, iclass 14, count 2 2006.229.13:41:34.36#ibcon#read 6, iclass 14, count 2 2006.229.13:41:34.36#ibcon#end of sib2, iclass 14, count 2 2006.229.13:41:34.36#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:41:34.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:41:34.36#ibcon#[25=AT01-08\r\n] 2006.229.13:41:34.36#ibcon#*before write, iclass 14, count 2 2006.229.13:41:34.36#ibcon#enter sib2, iclass 14, count 2 2006.229.13:41:34.36#ibcon#flushed, iclass 14, count 2 2006.229.13:41:34.36#ibcon#about to write, iclass 14, count 2 2006.229.13:41:34.36#ibcon#wrote, iclass 14, count 2 2006.229.13:41:34.36#ibcon#about to read 3, iclass 14, count 2 2006.229.13:41:34.39#ibcon#read 3, iclass 14, count 2 2006.229.13:41:34.39#ibcon#about to read 4, iclass 14, count 2 2006.229.13:41:34.39#ibcon#read 4, iclass 14, count 2 2006.229.13:41:34.39#ibcon#about to read 5, iclass 14, count 2 2006.229.13:41:34.39#ibcon#read 5, iclass 14, count 2 2006.229.13:41:34.39#ibcon#about to read 6, iclass 14, count 2 2006.229.13:41:34.39#ibcon#read 6, iclass 14, count 2 2006.229.13:41:34.39#ibcon#end of sib2, iclass 14, count 2 2006.229.13:41:34.39#ibcon#*after write, iclass 14, count 2 2006.229.13:41:34.39#ibcon#*before return 0, iclass 14, count 2 2006.229.13:41:34.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:34.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:34.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:41:34.39#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:34.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:34.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:34.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:34.51#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:41:34.51#ibcon#first serial, iclass 14, count 0 2006.229.13:41:34.51#ibcon#enter sib2, iclass 14, count 0 2006.229.13:41:34.51#ibcon#flushed, iclass 14, count 0 2006.229.13:41:34.51#ibcon#about to write, iclass 14, count 0 2006.229.13:41:34.51#ibcon#wrote, iclass 14, count 0 2006.229.13:41:34.51#ibcon#about to read 3, iclass 14, count 0 2006.229.13:41:34.53#ibcon#read 3, iclass 14, count 0 2006.229.13:41:34.53#ibcon#about to read 4, iclass 14, count 0 2006.229.13:41:34.53#ibcon#read 4, iclass 14, count 0 2006.229.13:41:34.53#ibcon#about to read 5, iclass 14, count 0 2006.229.13:41:34.53#ibcon#read 5, iclass 14, count 0 2006.229.13:41:34.53#ibcon#about to read 6, iclass 14, count 0 2006.229.13:41:34.53#ibcon#read 6, iclass 14, count 0 2006.229.13:41:34.53#ibcon#end of sib2, iclass 14, count 0 2006.229.13:41:34.53#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:41:34.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:41:34.53#ibcon#[25=USB\r\n] 2006.229.13:41:34.53#ibcon#*before write, iclass 14, count 0 2006.229.13:41:34.53#ibcon#enter sib2, iclass 14, count 0 2006.229.13:41:34.53#ibcon#flushed, iclass 14, count 0 2006.229.13:41:34.53#ibcon#about to write, iclass 14, count 0 2006.229.13:41:34.53#ibcon#wrote, iclass 14, count 0 2006.229.13:41:34.53#ibcon#about to read 3, iclass 14, count 0 2006.229.13:41:34.56#ibcon#read 3, iclass 14, count 0 2006.229.13:41:34.56#ibcon#about to read 4, iclass 14, count 0 2006.229.13:41:34.56#ibcon#read 4, iclass 14, count 0 2006.229.13:41:34.56#ibcon#about to read 5, iclass 14, count 0 2006.229.13:41:34.56#ibcon#read 5, iclass 14, count 0 2006.229.13:41:34.56#ibcon#about to read 6, iclass 14, count 0 2006.229.13:41:34.56#ibcon#read 6, iclass 14, count 0 2006.229.13:41:34.56#ibcon#end of sib2, iclass 14, count 0 2006.229.13:41:34.56#ibcon#*after write, iclass 14, count 0 2006.229.13:41:34.56#ibcon#*before return 0, iclass 14, count 0 2006.229.13:41:34.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:34.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:34.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:41:34.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:41:34.56$vck44/valo=2,534.99 2006.229.13:41:34.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:41:34.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:41:34.56#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:34.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:34.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:34.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:34.56#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:41:34.56#ibcon#first serial, iclass 16, count 0 2006.229.13:41:34.56#ibcon#enter sib2, iclass 16, count 0 2006.229.13:41:34.56#ibcon#flushed, iclass 16, count 0 2006.229.13:41:34.56#ibcon#about to write, iclass 16, count 0 2006.229.13:41:34.56#ibcon#wrote, iclass 16, count 0 2006.229.13:41:34.56#ibcon#about to read 3, iclass 16, count 0 2006.229.13:41:34.58#ibcon#read 3, iclass 16, count 0 2006.229.13:41:34.58#ibcon#about to read 4, iclass 16, count 0 2006.229.13:41:34.58#ibcon#read 4, iclass 16, count 0 2006.229.13:41:34.58#ibcon#about to read 5, iclass 16, count 0 2006.229.13:41:34.58#ibcon#read 5, iclass 16, count 0 2006.229.13:41:34.58#ibcon#about to read 6, iclass 16, count 0 2006.229.13:41:34.58#ibcon#read 6, iclass 16, count 0 2006.229.13:41:34.58#ibcon#end of sib2, iclass 16, count 0 2006.229.13:41:34.58#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:41:34.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:41:34.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:41:34.58#ibcon#*before write, iclass 16, count 0 2006.229.13:41:34.58#ibcon#enter sib2, iclass 16, count 0 2006.229.13:41:34.58#ibcon#flushed, iclass 16, count 0 2006.229.13:41:34.58#ibcon#about to write, iclass 16, count 0 2006.229.13:41:34.58#ibcon#wrote, iclass 16, count 0 2006.229.13:41:34.58#ibcon#about to read 3, iclass 16, count 0 2006.229.13:41:34.62#ibcon#read 3, iclass 16, count 0 2006.229.13:41:34.62#ibcon#about to read 4, iclass 16, count 0 2006.229.13:41:34.62#ibcon#read 4, iclass 16, count 0 2006.229.13:41:34.62#ibcon#about to read 5, iclass 16, count 0 2006.229.13:41:34.62#ibcon#read 5, iclass 16, count 0 2006.229.13:41:34.62#ibcon#about to read 6, iclass 16, count 0 2006.229.13:41:34.62#ibcon#read 6, iclass 16, count 0 2006.229.13:41:34.62#ibcon#end of sib2, iclass 16, count 0 2006.229.13:41:34.62#ibcon#*after write, iclass 16, count 0 2006.229.13:41:34.62#ibcon#*before return 0, iclass 16, count 0 2006.229.13:41:34.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:34.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:34.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:41:34.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:41:34.62$vck44/va=2,7 2006.229.13:41:34.62#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:41:34.62#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:41:34.62#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:34.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:34.68#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:34.68#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:34.68#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:41:34.68#ibcon#first serial, iclass 18, count 2 2006.229.13:41:34.68#ibcon#enter sib2, iclass 18, count 2 2006.229.13:41:34.68#ibcon#flushed, iclass 18, count 2 2006.229.13:41:34.68#ibcon#about to write, iclass 18, count 2 2006.229.13:41:34.68#ibcon#wrote, iclass 18, count 2 2006.229.13:41:34.68#ibcon#about to read 3, iclass 18, count 2 2006.229.13:41:34.70#ibcon#read 3, iclass 18, count 2 2006.229.13:41:34.70#ibcon#about to read 4, iclass 18, count 2 2006.229.13:41:34.70#ibcon#read 4, iclass 18, count 2 2006.229.13:41:34.70#ibcon#about to read 5, iclass 18, count 2 2006.229.13:41:34.70#ibcon#read 5, iclass 18, count 2 2006.229.13:41:34.70#ibcon#about to read 6, iclass 18, count 2 2006.229.13:41:34.70#ibcon#read 6, iclass 18, count 2 2006.229.13:41:34.70#ibcon#end of sib2, iclass 18, count 2 2006.229.13:41:34.70#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:41:34.70#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:41:34.70#ibcon#[25=AT02-07\r\n] 2006.229.13:41:34.70#ibcon#*before write, iclass 18, count 2 2006.229.13:41:34.70#ibcon#enter sib2, iclass 18, count 2 2006.229.13:41:34.70#ibcon#flushed, iclass 18, count 2 2006.229.13:41:34.70#ibcon#about to write, iclass 18, count 2 2006.229.13:41:34.70#ibcon#wrote, iclass 18, count 2 2006.229.13:41:34.70#ibcon#about to read 3, iclass 18, count 2 2006.229.13:41:34.73#ibcon#read 3, iclass 18, count 2 2006.229.13:41:34.73#ibcon#about to read 4, iclass 18, count 2 2006.229.13:41:34.73#ibcon#read 4, iclass 18, count 2 2006.229.13:41:34.73#ibcon#about to read 5, iclass 18, count 2 2006.229.13:41:34.73#ibcon#read 5, iclass 18, count 2 2006.229.13:41:34.73#ibcon#about to read 6, iclass 18, count 2 2006.229.13:41:34.73#ibcon#read 6, iclass 18, count 2 2006.229.13:41:34.73#ibcon#end of sib2, iclass 18, count 2 2006.229.13:41:34.73#ibcon#*after write, iclass 18, count 2 2006.229.13:41:34.73#ibcon#*before return 0, iclass 18, count 2 2006.229.13:41:34.73#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:34.73#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:34.73#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:41:34.73#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:34.73#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:34.85#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:34.85#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:34.85#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:41:34.85#ibcon#first serial, iclass 18, count 0 2006.229.13:41:34.85#ibcon#enter sib2, iclass 18, count 0 2006.229.13:41:34.85#ibcon#flushed, iclass 18, count 0 2006.229.13:41:34.85#ibcon#about to write, iclass 18, count 0 2006.229.13:41:34.85#ibcon#wrote, iclass 18, count 0 2006.229.13:41:34.85#ibcon#about to read 3, iclass 18, count 0 2006.229.13:41:34.87#ibcon#read 3, iclass 18, count 0 2006.229.13:41:34.87#ibcon#about to read 4, iclass 18, count 0 2006.229.13:41:34.87#ibcon#read 4, iclass 18, count 0 2006.229.13:41:34.87#ibcon#about to read 5, iclass 18, count 0 2006.229.13:41:34.87#ibcon#read 5, iclass 18, count 0 2006.229.13:41:34.87#ibcon#about to read 6, iclass 18, count 0 2006.229.13:41:34.87#ibcon#read 6, iclass 18, count 0 2006.229.13:41:34.87#ibcon#end of sib2, iclass 18, count 0 2006.229.13:41:34.87#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:41:34.87#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:41:34.87#ibcon#[25=USB\r\n] 2006.229.13:41:34.87#ibcon#*before write, iclass 18, count 0 2006.229.13:41:34.87#ibcon#enter sib2, iclass 18, count 0 2006.229.13:41:34.87#ibcon#flushed, iclass 18, count 0 2006.229.13:41:34.87#ibcon#about to write, iclass 18, count 0 2006.229.13:41:34.87#ibcon#wrote, iclass 18, count 0 2006.229.13:41:34.87#ibcon#about to read 3, iclass 18, count 0 2006.229.13:41:34.90#ibcon#read 3, iclass 18, count 0 2006.229.13:41:34.90#ibcon#about to read 4, iclass 18, count 0 2006.229.13:41:34.90#ibcon#read 4, iclass 18, count 0 2006.229.13:41:34.90#ibcon#about to read 5, iclass 18, count 0 2006.229.13:41:34.90#ibcon#read 5, iclass 18, count 0 2006.229.13:41:34.90#ibcon#about to read 6, iclass 18, count 0 2006.229.13:41:34.90#ibcon#read 6, iclass 18, count 0 2006.229.13:41:34.90#ibcon#end of sib2, iclass 18, count 0 2006.229.13:41:34.90#ibcon#*after write, iclass 18, count 0 2006.229.13:41:34.90#ibcon#*before return 0, iclass 18, count 0 2006.229.13:41:34.90#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:34.90#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:34.90#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:41:34.90#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:41:34.90$vck44/valo=3,564.99 2006.229.13:41:34.90#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:41:34.90#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:41:34.90#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:34.90#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:34.90#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:34.90#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:34.90#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:41:34.90#ibcon#first serial, iclass 20, count 0 2006.229.13:41:34.90#ibcon#enter sib2, iclass 20, count 0 2006.229.13:41:34.90#ibcon#flushed, iclass 20, count 0 2006.229.13:41:34.90#ibcon#about to write, iclass 20, count 0 2006.229.13:41:34.90#ibcon#wrote, iclass 20, count 0 2006.229.13:41:34.90#ibcon#about to read 3, iclass 20, count 0 2006.229.13:41:34.92#ibcon#read 3, iclass 20, count 0 2006.229.13:41:34.92#ibcon#about to read 4, iclass 20, count 0 2006.229.13:41:34.92#ibcon#read 4, iclass 20, count 0 2006.229.13:41:34.92#ibcon#about to read 5, iclass 20, count 0 2006.229.13:41:34.92#ibcon#read 5, iclass 20, count 0 2006.229.13:41:34.92#ibcon#about to read 6, iclass 20, count 0 2006.229.13:41:34.92#ibcon#read 6, iclass 20, count 0 2006.229.13:41:34.92#ibcon#end of sib2, iclass 20, count 0 2006.229.13:41:34.92#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:41:34.92#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:41:34.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:41:34.92#ibcon#*before write, iclass 20, count 0 2006.229.13:41:34.92#ibcon#enter sib2, iclass 20, count 0 2006.229.13:41:34.92#ibcon#flushed, iclass 20, count 0 2006.229.13:41:34.92#ibcon#about to write, iclass 20, count 0 2006.229.13:41:34.92#ibcon#wrote, iclass 20, count 0 2006.229.13:41:34.92#ibcon#about to read 3, iclass 20, count 0 2006.229.13:41:34.96#ibcon#read 3, iclass 20, count 0 2006.229.13:41:34.96#ibcon#about to read 4, iclass 20, count 0 2006.229.13:41:34.96#ibcon#read 4, iclass 20, count 0 2006.229.13:41:34.96#ibcon#about to read 5, iclass 20, count 0 2006.229.13:41:34.96#ibcon#read 5, iclass 20, count 0 2006.229.13:41:34.96#ibcon#about to read 6, iclass 20, count 0 2006.229.13:41:34.96#ibcon#read 6, iclass 20, count 0 2006.229.13:41:34.96#ibcon#end of sib2, iclass 20, count 0 2006.229.13:41:34.96#ibcon#*after write, iclass 20, count 0 2006.229.13:41:34.96#ibcon#*before return 0, iclass 20, count 0 2006.229.13:41:34.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:34.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:34.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:41:34.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:41:34.96$vck44/va=3,6 2006.229.13:41:34.96#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:41:34.96#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:41:34.96#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:34.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:35.02#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:35.02#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:35.02#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:41:35.02#ibcon#first serial, iclass 22, count 2 2006.229.13:41:35.02#ibcon#enter sib2, iclass 22, count 2 2006.229.13:41:35.02#ibcon#flushed, iclass 22, count 2 2006.229.13:41:35.02#ibcon#about to write, iclass 22, count 2 2006.229.13:41:35.02#ibcon#wrote, iclass 22, count 2 2006.229.13:41:35.02#ibcon#about to read 3, iclass 22, count 2 2006.229.13:41:35.04#ibcon#read 3, iclass 22, count 2 2006.229.13:41:35.04#ibcon#about to read 4, iclass 22, count 2 2006.229.13:41:35.04#ibcon#read 4, iclass 22, count 2 2006.229.13:41:35.04#ibcon#about to read 5, iclass 22, count 2 2006.229.13:41:35.04#ibcon#read 5, iclass 22, count 2 2006.229.13:41:35.04#ibcon#about to read 6, iclass 22, count 2 2006.229.13:41:35.04#ibcon#read 6, iclass 22, count 2 2006.229.13:41:35.04#ibcon#end of sib2, iclass 22, count 2 2006.229.13:41:35.04#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:41:35.04#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:41:35.04#ibcon#[25=AT03-06\r\n] 2006.229.13:41:35.04#ibcon#*before write, iclass 22, count 2 2006.229.13:41:35.04#ibcon#enter sib2, iclass 22, count 2 2006.229.13:41:35.04#ibcon#flushed, iclass 22, count 2 2006.229.13:41:35.04#ibcon#about to write, iclass 22, count 2 2006.229.13:41:35.04#ibcon#wrote, iclass 22, count 2 2006.229.13:41:35.04#ibcon#about to read 3, iclass 22, count 2 2006.229.13:41:35.07#ibcon#read 3, iclass 22, count 2 2006.229.13:41:35.07#ibcon#about to read 4, iclass 22, count 2 2006.229.13:41:35.07#ibcon#read 4, iclass 22, count 2 2006.229.13:41:35.07#ibcon#about to read 5, iclass 22, count 2 2006.229.13:41:35.07#ibcon#read 5, iclass 22, count 2 2006.229.13:41:35.07#ibcon#about to read 6, iclass 22, count 2 2006.229.13:41:35.07#ibcon#read 6, iclass 22, count 2 2006.229.13:41:35.07#ibcon#end of sib2, iclass 22, count 2 2006.229.13:41:35.07#ibcon#*after write, iclass 22, count 2 2006.229.13:41:35.07#ibcon#*before return 0, iclass 22, count 2 2006.229.13:41:35.07#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:35.07#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:35.07#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:41:35.07#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:35.07#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:35.19#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:35.19#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:35.19#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:41:35.19#ibcon#first serial, iclass 22, count 0 2006.229.13:41:35.19#ibcon#enter sib2, iclass 22, count 0 2006.229.13:41:35.19#ibcon#flushed, iclass 22, count 0 2006.229.13:41:35.19#ibcon#about to write, iclass 22, count 0 2006.229.13:41:35.19#ibcon#wrote, iclass 22, count 0 2006.229.13:41:35.19#ibcon#about to read 3, iclass 22, count 0 2006.229.13:41:35.21#ibcon#read 3, iclass 22, count 0 2006.229.13:41:35.21#ibcon#about to read 4, iclass 22, count 0 2006.229.13:41:35.21#ibcon#read 4, iclass 22, count 0 2006.229.13:41:35.21#ibcon#about to read 5, iclass 22, count 0 2006.229.13:41:35.21#ibcon#read 5, iclass 22, count 0 2006.229.13:41:35.21#ibcon#about to read 6, iclass 22, count 0 2006.229.13:41:35.21#ibcon#read 6, iclass 22, count 0 2006.229.13:41:35.21#ibcon#end of sib2, iclass 22, count 0 2006.229.13:41:35.21#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:41:35.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:41:35.21#ibcon#[25=USB\r\n] 2006.229.13:41:35.21#ibcon#*before write, iclass 22, count 0 2006.229.13:41:35.21#ibcon#enter sib2, iclass 22, count 0 2006.229.13:41:35.21#ibcon#flushed, iclass 22, count 0 2006.229.13:41:35.21#ibcon#about to write, iclass 22, count 0 2006.229.13:41:35.21#ibcon#wrote, iclass 22, count 0 2006.229.13:41:35.21#ibcon#about to read 3, iclass 22, count 0 2006.229.13:41:35.24#ibcon#read 3, iclass 22, count 0 2006.229.13:41:35.24#ibcon#about to read 4, iclass 22, count 0 2006.229.13:41:35.24#ibcon#read 4, iclass 22, count 0 2006.229.13:41:35.24#ibcon#about to read 5, iclass 22, count 0 2006.229.13:41:35.24#ibcon#read 5, iclass 22, count 0 2006.229.13:41:35.24#ibcon#about to read 6, iclass 22, count 0 2006.229.13:41:35.24#ibcon#read 6, iclass 22, count 0 2006.229.13:41:35.24#ibcon#end of sib2, iclass 22, count 0 2006.229.13:41:35.24#ibcon#*after write, iclass 22, count 0 2006.229.13:41:35.24#ibcon#*before return 0, iclass 22, count 0 2006.229.13:41:35.24#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:35.24#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:35.24#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:41:35.24#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:41:35.24$vck44/valo=4,624.99 2006.229.13:41:35.24#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:41:35.24#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:41:35.24#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:35.24#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:41:35.24#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:41:35.24#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:41:35.24#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:41:35.24#ibcon#first serial, iclass 24, count 0 2006.229.13:41:35.24#ibcon#enter sib2, iclass 24, count 0 2006.229.13:41:35.24#ibcon#flushed, iclass 24, count 0 2006.229.13:41:35.24#ibcon#about to write, iclass 24, count 0 2006.229.13:41:35.24#ibcon#wrote, iclass 24, count 0 2006.229.13:41:35.24#ibcon#about to read 3, iclass 24, count 0 2006.229.13:41:35.26#ibcon#read 3, iclass 24, count 0 2006.229.13:41:35.26#ibcon#about to read 4, iclass 24, count 0 2006.229.13:41:35.26#ibcon#read 4, iclass 24, count 0 2006.229.13:41:35.26#ibcon#about to read 5, iclass 24, count 0 2006.229.13:41:35.26#ibcon#read 5, iclass 24, count 0 2006.229.13:41:35.26#ibcon#about to read 6, iclass 24, count 0 2006.229.13:41:35.26#ibcon#read 6, iclass 24, count 0 2006.229.13:41:35.26#ibcon#end of sib2, iclass 24, count 0 2006.229.13:41:35.26#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:41:35.26#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:41:35.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:41:35.26#ibcon#*before write, iclass 24, count 0 2006.229.13:41:35.26#ibcon#enter sib2, iclass 24, count 0 2006.229.13:41:35.26#ibcon#flushed, iclass 24, count 0 2006.229.13:41:35.26#ibcon#about to write, iclass 24, count 0 2006.229.13:41:35.26#ibcon#wrote, iclass 24, count 0 2006.229.13:41:35.26#ibcon#about to read 3, iclass 24, count 0 2006.229.13:41:35.30#ibcon#read 3, iclass 24, count 0 2006.229.13:41:35.30#ibcon#about to read 4, iclass 24, count 0 2006.229.13:41:35.30#ibcon#read 4, iclass 24, count 0 2006.229.13:41:35.30#ibcon#about to read 5, iclass 24, count 0 2006.229.13:41:35.30#ibcon#read 5, iclass 24, count 0 2006.229.13:41:35.30#ibcon#about to read 6, iclass 24, count 0 2006.229.13:41:35.30#ibcon#read 6, iclass 24, count 0 2006.229.13:41:35.30#ibcon#end of sib2, iclass 24, count 0 2006.229.13:41:35.30#ibcon#*after write, iclass 24, count 0 2006.229.13:41:35.30#ibcon#*before return 0, iclass 24, count 0 2006.229.13:41:35.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:41:35.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:41:35.30#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:41:35.30#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:41:35.30$vck44/va=4,7 2006.229.13:41:35.30#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:41:35.30#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:41:35.30#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:35.30#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:41:35.36#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:41:35.36#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:41:35.36#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:41:35.36#ibcon#first serial, iclass 26, count 2 2006.229.13:41:35.36#ibcon#enter sib2, iclass 26, count 2 2006.229.13:41:35.36#ibcon#flushed, iclass 26, count 2 2006.229.13:41:35.36#ibcon#about to write, iclass 26, count 2 2006.229.13:41:35.36#ibcon#wrote, iclass 26, count 2 2006.229.13:41:35.36#ibcon#about to read 3, iclass 26, count 2 2006.229.13:41:35.38#ibcon#read 3, iclass 26, count 2 2006.229.13:41:35.38#ibcon#about to read 4, iclass 26, count 2 2006.229.13:41:35.38#ibcon#read 4, iclass 26, count 2 2006.229.13:41:35.38#ibcon#about to read 5, iclass 26, count 2 2006.229.13:41:35.38#ibcon#read 5, iclass 26, count 2 2006.229.13:41:35.38#ibcon#about to read 6, iclass 26, count 2 2006.229.13:41:35.38#ibcon#read 6, iclass 26, count 2 2006.229.13:41:35.38#ibcon#end of sib2, iclass 26, count 2 2006.229.13:41:35.38#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:41:35.38#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:41:35.38#ibcon#[25=AT04-07\r\n] 2006.229.13:41:35.38#ibcon#*before write, iclass 26, count 2 2006.229.13:41:35.38#ibcon#enter sib2, iclass 26, count 2 2006.229.13:41:35.38#ibcon#flushed, iclass 26, count 2 2006.229.13:41:35.38#ibcon#about to write, iclass 26, count 2 2006.229.13:41:35.38#ibcon#wrote, iclass 26, count 2 2006.229.13:41:35.38#ibcon#about to read 3, iclass 26, count 2 2006.229.13:41:35.41#ibcon#read 3, iclass 26, count 2 2006.229.13:41:35.41#ibcon#about to read 4, iclass 26, count 2 2006.229.13:41:35.41#ibcon#read 4, iclass 26, count 2 2006.229.13:41:35.41#ibcon#about to read 5, iclass 26, count 2 2006.229.13:41:35.41#ibcon#read 5, iclass 26, count 2 2006.229.13:41:35.41#ibcon#about to read 6, iclass 26, count 2 2006.229.13:41:35.41#ibcon#read 6, iclass 26, count 2 2006.229.13:41:35.41#ibcon#end of sib2, iclass 26, count 2 2006.229.13:41:35.41#ibcon#*after write, iclass 26, count 2 2006.229.13:41:35.41#ibcon#*before return 0, iclass 26, count 2 2006.229.13:41:35.41#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:41:35.41#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:41:35.41#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:41:35.41#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:35.41#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:41:35.53#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:41:35.53#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:41:35.53#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:41:35.53#ibcon#first serial, iclass 26, count 0 2006.229.13:41:35.53#ibcon#enter sib2, iclass 26, count 0 2006.229.13:41:35.53#ibcon#flushed, iclass 26, count 0 2006.229.13:41:35.53#ibcon#about to write, iclass 26, count 0 2006.229.13:41:35.53#ibcon#wrote, iclass 26, count 0 2006.229.13:41:35.53#ibcon#about to read 3, iclass 26, count 0 2006.229.13:41:35.55#ibcon#read 3, iclass 26, count 0 2006.229.13:41:35.55#ibcon#about to read 4, iclass 26, count 0 2006.229.13:41:35.55#ibcon#read 4, iclass 26, count 0 2006.229.13:41:35.55#ibcon#about to read 5, iclass 26, count 0 2006.229.13:41:35.55#ibcon#read 5, iclass 26, count 0 2006.229.13:41:35.55#ibcon#about to read 6, iclass 26, count 0 2006.229.13:41:35.55#ibcon#read 6, iclass 26, count 0 2006.229.13:41:35.55#ibcon#end of sib2, iclass 26, count 0 2006.229.13:41:35.55#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:41:35.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:41:35.55#ibcon#[25=USB\r\n] 2006.229.13:41:35.55#ibcon#*before write, iclass 26, count 0 2006.229.13:41:35.55#ibcon#enter sib2, iclass 26, count 0 2006.229.13:41:35.55#ibcon#flushed, iclass 26, count 0 2006.229.13:41:35.55#ibcon#about to write, iclass 26, count 0 2006.229.13:41:35.55#ibcon#wrote, iclass 26, count 0 2006.229.13:41:35.55#ibcon#about to read 3, iclass 26, count 0 2006.229.13:41:35.58#ibcon#read 3, iclass 26, count 0 2006.229.13:41:35.58#ibcon#about to read 4, iclass 26, count 0 2006.229.13:41:35.58#ibcon#read 4, iclass 26, count 0 2006.229.13:41:35.58#ibcon#about to read 5, iclass 26, count 0 2006.229.13:41:35.58#ibcon#read 5, iclass 26, count 0 2006.229.13:41:35.58#ibcon#about to read 6, iclass 26, count 0 2006.229.13:41:35.58#ibcon#read 6, iclass 26, count 0 2006.229.13:41:35.58#ibcon#end of sib2, iclass 26, count 0 2006.229.13:41:35.58#ibcon#*after write, iclass 26, count 0 2006.229.13:41:35.58#ibcon#*before return 0, iclass 26, count 0 2006.229.13:41:35.58#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:41:35.58#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:41:35.58#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:41:35.58#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:41:35.58$vck44/valo=5,734.99 2006.229.13:41:35.58#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:41:35.58#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:41:35.58#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:35.58#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:35.58#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:35.58#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:35.58#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:41:35.58#ibcon#first serial, iclass 28, count 0 2006.229.13:41:35.58#ibcon#enter sib2, iclass 28, count 0 2006.229.13:41:35.58#ibcon#flushed, iclass 28, count 0 2006.229.13:41:35.58#ibcon#about to write, iclass 28, count 0 2006.229.13:41:35.58#ibcon#wrote, iclass 28, count 0 2006.229.13:41:35.58#ibcon#about to read 3, iclass 28, count 0 2006.229.13:41:35.60#ibcon#read 3, iclass 28, count 0 2006.229.13:41:35.60#ibcon#about to read 4, iclass 28, count 0 2006.229.13:41:35.60#ibcon#read 4, iclass 28, count 0 2006.229.13:41:35.60#ibcon#about to read 5, iclass 28, count 0 2006.229.13:41:35.60#ibcon#read 5, iclass 28, count 0 2006.229.13:41:35.60#ibcon#about to read 6, iclass 28, count 0 2006.229.13:41:35.60#ibcon#read 6, iclass 28, count 0 2006.229.13:41:35.60#ibcon#end of sib2, iclass 28, count 0 2006.229.13:41:35.60#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:41:35.60#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:41:35.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:41:35.60#ibcon#*before write, iclass 28, count 0 2006.229.13:41:35.60#ibcon#enter sib2, iclass 28, count 0 2006.229.13:41:35.60#ibcon#flushed, iclass 28, count 0 2006.229.13:41:35.60#ibcon#about to write, iclass 28, count 0 2006.229.13:41:35.60#ibcon#wrote, iclass 28, count 0 2006.229.13:41:35.60#ibcon#about to read 3, iclass 28, count 0 2006.229.13:41:35.64#ibcon#read 3, iclass 28, count 0 2006.229.13:41:35.64#ibcon#about to read 4, iclass 28, count 0 2006.229.13:41:35.64#ibcon#read 4, iclass 28, count 0 2006.229.13:41:35.64#ibcon#about to read 5, iclass 28, count 0 2006.229.13:41:35.64#ibcon#read 5, iclass 28, count 0 2006.229.13:41:35.64#ibcon#about to read 6, iclass 28, count 0 2006.229.13:41:35.64#ibcon#read 6, iclass 28, count 0 2006.229.13:41:35.64#ibcon#end of sib2, iclass 28, count 0 2006.229.13:41:35.64#ibcon#*after write, iclass 28, count 0 2006.229.13:41:35.64#ibcon#*before return 0, iclass 28, count 0 2006.229.13:41:35.64#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:35.64#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:35.64#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:41:35.64#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:41:35.64$vck44/va=5,4 2006.229.13:41:35.64#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:41:35.64#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:41:35.64#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:35.64#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:35.70#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:35.70#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:35.70#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:41:35.70#ibcon#first serial, iclass 30, count 2 2006.229.13:41:35.70#ibcon#enter sib2, iclass 30, count 2 2006.229.13:41:35.70#ibcon#flushed, iclass 30, count 2 2006.229.13:41:35.70#ibcon#about to write, iclass 30, count 2 2006.229.13:41:35.70#ibcon#wrote, iclass 30, count 2 2006.229.13:41:35.70#ibcon#about to read 3, iclass 30, count 2 2006.229.13:41:35.72#ibcon#read 3, iclass 30, count 2 2006.229.13:41:35.72#ibcon#about to read 4, iclass 30, count 2 2006.229.13:41:35.72#ibcon#read 4, iclass 30, count 2 2006.229.13:41:35.72#ibcon#about to read 5, iclass 30, count 2 2006.229.13:41:35.72#ibcon#read 5, iclass 30, count 2 2006.229.13:41:35.72#ibcon#about to read 6, iclass 30, count 2 2006.229.13:41:35.72#ibcon#read 6, iclass 30, count 2 2006.229.13:41:35.72#ibcon#end of sib2, iclass 30, count 2 2006.229.13:41:35.72#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:41:35.72#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:41:35.72#ibcon#[25=AT05-04\r\n] 2006.229.13:41:35.72#ibcon#*before write, iclass 30, count 2 2006.229.13:41:35.72#ibcon#enter sib2, iclass 30, count 2 2006.229.13:41:35.72#ibcon#flushed, iclass 30, count 2 2006.229.13:41:35.72#ibcon#about to write, iclass 30, count 2 2006.229.13:41:35.72#ibcon#wrote, iclass 30, count 2 2006.229.13:41:35.72#ibcon#about to read 3, iclass 30, count 2 2006.229.13:41:35.75#ibcon#read 3, iclass 30, count 2 2006.229.13:41:35.75#ibcon#about to read 4, iclass 30, count 2 2006.229.13:41:35.75#ibcon#read 4, iclass 30, count 2 2006.229.13:41:35.75#ibcon#about to read 5, iclass 30, count 2 2006.229.13:41:35.75#ibcon#read 5, iclass 30, count 2 2006.229.13:41:35.75#ibcon#about to read 6, iclass 30, count 2 2006.229.13:41:35.75#ibcon#read 6, iclass 30, count 2 2006.229.13:41:35.75#ibcon#end of sib2, iclass 30, count 2 2006.229.13:41:35.75#ibcon#*after write, iclass 30, count 2 2006.229.13:41:35.75#ibcon#*before return 0, iclass 30, count 2 2006.229.13:41:35.75#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:35.75#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:35.75#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:41:35.75#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:35.75#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:35.87#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:35.87#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:35.87#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:41:35.87#ibcon#first serial, iclass 30, count 0 2006.229.13:41:35.87#ibcon#enter sib2, iclass 30, count 0 2006.229.13:41:35.87#ibcon#flushed, iclass 30, count 0 2006.229.13:41:35.87#ibcon#about to write, iclass 30, count 0 2006.229.13:41:35.87#ibcon#wrote, iclass 30, count 0 2006.229.13:41:35.87#ibcon#about to read 3, iclass 30, count 0 2006.229.13:41:35.89#ibcon#read 3, iclass 30, count 0 2006.229.13:41:35.89#ibcon#about to read 4, iclass 30, count 0 2006.229.13:41:35.89#ibcon#read 4, iclass 30, count 0 2006.229.13:41:35.89#ibcon#about to read 5, iclass 30, count 0 2006.229.13:41:35.89#ibcon#read 5, iclass 30, count 0 2006.229.13:41:35.89#ibcon#about to read 6, iclass 30, count 0 2006.229.13:41:35.89#ibcon#read 6, iclass 30, count 0 2006.229.13:41:35.89#ibcon#end of sib2, iclass 30, count 0 2006.229.13:41:35.89#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:41:35.89#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:41:35.89#ibcon#[25=USB\r\n] 2006.229.13:41:35.89#ibcon#*before write, iclass 30, count 0 2006.229.13:41:35.89#ibcon#enter sib2, iclass 30, count 0 2006.229.13:41:35.89#ibcon#flushed, iclass 30, count 0 2006.229.13:41:35.89#ibcon#about to write, iclass 30, count 0 2006.229.13:41:35.89#ibcon#wrote, iclass 30, count 0 2006.229.13:41:35.89#ibcon#about to read 3, iclass 30, count 0 2006.229.13:41:35.92#ibcon#read 3, iclass 30, count 0 2006.229.13:41:35.92#ibcon#about to read 4, iclass 30, count 0 2006.229.13:41:35.92#ibcon#read 4, iclass 30, count 0 2006.229.13:41:35.92#ibcon#about to read 5, iclass 30, count 0 2006.229.13:41:35.92#ibcon#read 5, iclass 30, count 0 2006.229.13:41:35.92#ibcon#about to read 6, iclass 30, count 0 2006.229.13:41:35.92#ibcon#read 6, iclass 30, count 0 2006.229.13:41:35.92#ibcon#end of sib2, iclass 30, count 0 2006.229.13:41:35.92#ibcon#*after write, iclass 30, count 0 2006.229.13:41:35.92#ibcon#*before return 0, iclass 30, count 0 2006.229.13:41:35.92#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:35.92#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:35.92#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:41:35.92#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:41:35.92$vck44/valo=6,814.99 2006.229.13:41:35.92#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:41:35.92#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:41:35.92#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:35.92#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:35.92#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:35.92#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:35.92#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:41:35.92#ibcon#first serial, iclass 32, count 0 2006.229.13:41:35.92#ibcon#enter sib2, iclass 32, count 0 2006.229.13:41:35.92#ibcon#flushed, iclass 32, count 0 2006.229.13:41:35.92#ibcon#about to write, iclass 32, count 0 2006.229.13:41:35.92#ibcon#wrote, iclass 32, count 0 2006.229.13:41:35.92#ibcon#about to read 3, iclass 32, count 0 2006.229.13:41:35.94#ibcon#read 3, iclass 32, count 0 2006.229.13:41:35.94#ibcon#about to read 4, iclass 32, count 0 2006.229.13:41:35.94#ibcon#read 4, iclass 32, count 0 2006.229.13:41:35.94#ibcon#about to read 5, iclass 32, count 0 2006.229.13:41:35.94#ibcon#read 5, iclass 32, count 0 2006.229.13:41:35.94#ibcon#about to read 6, iclass 32, count 0 2006.229.13:41:35.94#ibcon#read 6, iclass 32, count 0 2006.229.13:41:35.94#ibcon#end of sib2, iclass 32, count 0 2006.229.13:41:35.94#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:41:35.94#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:41:35.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:41:35.94#ibcon#*before write, iclass 32, count 0 2006.229.13:41:35.94#ibcon#enter sib2, iclass 32, count 0 2006.229.13:41:35.94#ibcon#flushed, iclass 32, count 0 2006.229.13:41:35.94#ibcon#about to write, iclass 32, count 0 2006.229.13:41:35.94#ibcon#wrote, iclass 32, count 0 2006.229.13:41:35.94#ibcon#about to read 3, iclass 32, count 0 2006.229.13:41:35.98#ibcon#read 3, iclass 32, count 0 2006.229.13:41:35.98#ibcon#about to read 4, iclass 32, count 0 2006.229.13:41:35.98#ibcon#read 4, iclass 32, count 0 2006.229.13:41:35.98#ibcon#about to read 5, iclass 32, count 0 2006.229.13:41:35.98#ibcon#read 5, iclass 32, count 0 2006.229.13:41:35.98#ibcon#about to read 6, iclass 32, count 0 2006.229.13:41:35.98#ibcon#read 6, iclass 32, count 0 2006.229.13:41:35.98#ibcon#end of sib2, iclass 32, count 0 2006.229.13:41:35.98#ibcon#*after write, iclass 32, count 0 2006.229.13:41:35.98#ibcon#*before return 0, iclass 32, count 0 2006.229.13:41:35.98#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:35.98#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:35.98#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:41:35.98#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:41:35.98$vck44/va=6,4 2006.229.13:41:35.98#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:41:35.98#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:41:35.98#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:35.98#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:36.04#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:36.04#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:36.04#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:41:36.04#ibcon#first serial, iclass 34, count 2 2006.229.13:41:36.04#ibcon#enter sib2, iclass 34, count 2 2006.229.13:41:36.04#ibcon#flushed, iclass 34, count 2 2006.229.13:41:36.04#ibcon#about to write, iclass 34, count 2 2006.229.13:41:36.04#ibcon#wrote, iclass 34, count 2 2006.229.13:41:36.04#ibcon#about to read 3, iclass 34, count 2 2006.229.13:41:36.06#ibcon#read 3, iclass 34, count 2 2006.229.13:41:36.06#ibcon#about to read 4, iclass 34, count 2 2006.229.13:41:36.06#ibcon#read 4, iclass 34, count 2 2006.229.13:41:36.06#ibcon#about to read 5, iclass 34, count 2 2006.229.13:41:36.06#ibcon#read 5, iclass 34, count 2 2006.229.13:41:36.06#ibcon#about to read 6, iclass 34, count 2 2006.229.13:41:36.06#ibcon#read 6, iclass 34, count 2 2006.229.13:41:36.06#ibcon#end of sib2, iclass 34, count 2 2006.229.13:41:36.06#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:41:36.06#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:41:36.06#ibcon#[25=AT06-04\r\n] 2006.229.13:41:36.06#ibcon#*before write, iclass 34, count 2 2006.229.13:41:36.06#ibcon#enter sib2, iclass 34, count 2 2006.229.13:41:36.06#ibcon#flushed, iclass 34, count 2 2006.229.13:41:36.06#ibcon#about to write, iclass 34, count 2 2006.229.13:41:36.06#ibcon#wrote, iclass 34, count 2 2006.229.13:41:36.06#ibcon#about to read 3, iclass 34, count 2 2006.229.13:41:36.09#ibcon#read 3, iclass 34, count 2 2006.229.13:41:36.09#ibcon#about to read 4, iclass 34, count 2 2006.229.13:41:36.09#ibcon#read 4, iclass 34, count 2 2006.229.13:41:36.09#ibcon#about to read 5, iclass 34, count 2 2006.229.13:41:36.09#ibcon#read 5, iclass 34, count 2 2006.229.13:41:36.09#ibcon#about to read 6, iclass 34, count 2 2006.229.13:41:36.09#ibcon#read 6, iclass 34, count 2 2006.229.13:41:36.09#ibcon#end of sib2, iclass 34, count 2 2006.229.13:41:36.09#ibcon#*after write, iclass 34, count 2 2006.229.13:41:36.09#ibcon#*before return 0, iclass 34, count 2 2006.229.13:41:36.09#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:36.09#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:36.09#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:41:36.09#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:36.09#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:36.21#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:36.21#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:36.21#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:41:36.21#ibcon#first serial, iclass 34, count 0 2006.229.13:41:36.21#ibcon#enter sib2, iclass 34, count 0 2006.229.13:41:36.21#ibcon#flushed, iclass 34, count 0 2006.229.13:41:36.21#ibcon#about to write, iclass 34, count 0 2006.229.13:41:36.21#ibcon#wrote, iclass 34, count 0 2006.229.13:41:36.21#ibcon#about to read 3, iclass 34, count 0 2006.229.13:41:36.23#ibcon#read 3, iclass 34, count 0 2006.229.13:41:36.23#ibcon#about to read 4, iclass 34, count 0 2006.229.13:41:36.23#ibcon#read 4, iclass 34, count 0 2006.229.13:41:36.23#ibcon#about to read 5, iclass 34, count 0 2006.229.13:41:36.23#ibcon#read 5, iclass 34, count 0 2006.229.13:41:36.23#ibcon#about to read 6, iclass 34, count 0 2006.229.13:41:36.23#ibcon#read 6, iclass 34, count 0 2006.229.13:41:36.23#ibcon#end of sib2, iclass 34, count 0 2006.229.13:41:36.23#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:41:36.23#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:41:36.23#ibcon#[25=USB\r\n] 2006.229.13:41:36.23#ibcon#*before write, iclass 34, count 0 2006.229.13:41:36.23#ibcon#enter sib2, iclass 34, count 0 2006.229.13:41:36.23#ibcon#flushed, iclass 34, count 0 2006.229.13:41:36.23#ibcon#about to write, iclass 34, count 0 2006.229.13:41:36.23#ibcon#wrote, iclass 34, count 0 2006.229.13:41:36.23#ibcon#about to read 3, iclass 34, count 0 2006.229.13:41:36.26#ibcon#read 3, iclass 34, count 0 2006.229.13:41:36.26#ibcon#about to read 4, iclass 34, count 0 2006.229.13:41:36.26#ibcon#read 4, iclass 34, count 0 2006.229.13:41:36.26#ibcon#about to read 5, iclass 34, count 0 2006.229.13:41:36.26#ibcon#read 5, iclass 34, count 0 2006.229.13:41:36.26#ibcon#about to read 6, iclass 34, count 0 2006.229.13:41:36.26#ibcon#read 6, iclass 34, count 0 2006.229.13:41:36.26#ibcon#end of sib2, iclass 34, count 0 2006.229.13:41:36.26#ibcon#*after write, iclass 34, count 0 2006.229.13:41:36.26#ibcon#*before return 0, iclass 34, count 0 2006.229.13:41:36.26#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:36.26#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:36.26#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:41:36.26#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:41:36.26$vck44/valo=7,864.99 2006.229.13:41:36.26#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:41:36.26#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:41:36.26#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:36.26#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:36.26#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:36.26#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:36.26#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:41:36.26#ibcon#first serial, iclass 36, count 0 2006.229.13:41:36.26#ibcon#enter sib2, iclass 36, count 0 2006.229.13:41:36.26#ibcon#flushed, iclass 36, count 0 2006.229.13:41:36.26#ibcon#about to write, iclass 36, count 0 2006.229.13:41:36.26#ibcon#wrote, iclass 36, count 0 2006.229.13:41:36.26#ibcon#about to read 3, iclass 36, count 0 2006.229.13:41:36.28#ibcon#read 3, iclass 36, count 0 2006.229.13:41:36.28#ibcon#about to read 4, iclass 36, count 0 2006.229.13:41:36.28#ibcon#read 4, iclass 36, count 0 2006.229.13:41:36.28#ibcon#about to read 5, iclass 36, count 0 2006.229.13:41:36.28#ibcon#read 5, iclass 36, count 0 2006.229.13:41:36.28#ibcon#about to read 6, iclass 36, count 0 2006.229.13:41:36.28#ibcon#read 6, iclass 36, count 0 2006.229.13:41:36.28#ibcon#end of sib2, iclass 36, count 0 2006.229.13:41:36.28#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:41:36.28#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:41:36.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:41:36.28#ibcon#*before write, iclass 36, count 0 2006.229.13:41:36.28#ibcon#enter sib2, iclass 36, count 0 2006.229.13:41:36.28#ibcon#flushed, iclass 36, count 0 2006.229.13:41:36.28#ibcon#about to write, iclass 36, count 0 2006.229.13:41:36.28#ibcon#wrote, iclass 36, count 0 2006.229.13:41:36.28#ibcon#about to read 3, iclass 36, count 0 2006.229.13:41:36.32#ibcon#read 3, iclass 36, count 0 2006.229.13:41:36.32#ibcon#about to read 4, iclass 36, count 0 2006.229.13:41:36.32#ibcon#read 4, iclass 36, count 0 2006.229.13:41:36.32#ibcon#about to read 5, iclass 36, count 0 2006.229.13:41:36.32#ibcon#read 5, iclass 36, count 0 2006.229.13:41:36.32#ibcon#about to read 6, iclass 36, count 0 2006.229.13:41:36.32#ibcon#read 6, iclass 36, count 0 2006.229.13:41:36.32#ibcon#end of sib2, iclass 36, count 0 2006.229.13:41:36.32#ibcon#*after write, iclass 36, count 0 2006.229.13:41:36.32#ibcon#*before return 0, iclass 36, count 0 2006.229.13:41:36.32#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:36.32#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:36.32#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:41:36.32#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:41:36.32$vck44/va=7,5 2006.229.13:41:36.32#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:41:36.32#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:41:36.32#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:36.32#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:36.38#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:36.38#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:36.38#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:41:36.38#ibcon#first serial, iclass 38, count 2 2006.229.13:41:36.38#ibcon#enter sib2, iclass 38, count 2 2006.229.13:41:36.38#ibcon#flushed, iclass 38, count 2 2006.229.13:41:36.38#ibcon#about to write, iclass 38, count 2 2006.229.13:41:36.38#ibcon#wrote, iclass 38, count 2 2006.229.13:41:36.38#ibcon#about to read 3, iclass 38, count 2 2006.229.13:41:36.40#ibcon#read 3, iclass 38, count 2 2006.229.13:41:36.40#ibcon#about to read 4, iclass 38, count 2 2006.229.13:41:36.40#ibcon#read 4, iclass 38, count 2 2006.229.13:41:36.40#ibcon#about to read 5, iclass 38, count 2 2006.229.13:41:36.40#ibcon#read 5, iclass 38, count 2 2006.229.13:41:36.40#ibcon#about to read 6, iclass 38, count 2 2006.229.13:41:36.40#ibcon#read 6, iclass 38, count 2 2006.229.13:41:36.40#ibcon#end of sib2, iclass 38, count 2 2006.229.13:41:36.40#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:41:36.40#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:41:36.40#ibcon#[25=AT07-05\r\n] 2006.229.13:41:36.40#ibcon#*before write, iclass 38, count 2 2006.229.13:41:36.40#ibcon#enter sib2, iclass 38, count 2 2006.229.13:41:36.40#ibcon#flushed, iclass 38, count 2 2006.229.13:41:36.40#ibcon#about to write, iclass 38, count 2 2006.229.13:41:36.40#ibcon#wrote, iclass 38, count 2 2006.229.13:41:36.40#ibcon#about to read 3, iclass 38, count 2 2006.229.13:41:36.43#ibcon#read 3, iclass 38, count 2 2006.229.13:41:36.43#ibcon#about to read 4, iclass 38, count 2 2006.229.13:41:36.43#ibcon#read 4, iclass 38, count 2 2006.229.13:41:36.43#ibcon#about to read 5, iclass 38, count 2 2006.229.13:41:36.43#ibcon#read 5, iclass 38, count 2 2006.229.13:41:36.43#ibcon#about to read 6, iclass 38, count 2 2006.229.13:41:36.43#ibcon#read 6, iclass 38, count 2 2006.229.13:41:36.43#ibcon#end of sib2, iclass 38, count 2 2006.229.13:41:36.43#ibcon#*after write, iclass 38, count 2 2006.229.13:41:36.43#ibcon#*before return 0, iclass 38, count 2 2006.229.13:41:36.43#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:36.43#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:36.43#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:41:36.43#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:36.43#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:36.55#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:36.55#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:36.55#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:41:36.55#ibcon#first serial, iclass 38, count 0 2006.229.13:41:36.55#ibcon#enter sib2, iclass 38, count 0 2006.229.13:41:36.55#ibcon#flushed, iclass 38, count 0 2006.229.13:41:36.55#ibcon#about to write, iclass 38, count 0 2006.229.13:41:36.55#ibcon#wrote, iclass 38, count 0 2006.229.13:41:36.55#ibcon#about to read 3, iclass 38, count 0 2006.229.13:41:36.57#ibcon#read 3, iclass 38, count 0 2006.229.13:41:36.57#ibcon#about to read 4, iclass 38, count 0 2006.229.13:41:36.57#ibcon#read 4, iclass 38, count 0 2006.229.13:41:36.57#ibcon#about to read 5, iclass 38, count 0 2006.229.13:41:36.57#ibcon#read 5, iclass 38, count 0 2006.229.13:41:36.57#ibcon#about to read 6, iclass 38, count 0 2006.229.13:41:36.57#ibcon#read 6, iclass 38, count 0 2006.229.13:41:36.57#ibcon#end of sib2, iclass 38, count 0 2006.229.13:41:36.57#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:41:36.57#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:41:36.57#ibcon#[25=USB\r\n] 2006.229.13:41:36.57#ibcon#*before write, iclass 38, count 0 2006.229.13:41:36.57#ibcon#enter sib2, iclass 38, count 0 2006.229.13:41:36.57#ibcon#flushed, iclass 38, count 0 2006.229.13:41:36.57#ibcon#about to write, iclass 38, count 0 2006.229.13:41:36.57#ibcon#wrote, iclass 38, count 0 2006.229.13:41:36.57#ibcon#about to read 3, iclass 38, count 0 2006.229.13:41:36.60#ibcon#read 3, iclass 38, count 0 2006.229.13:41:36.60#ibcon#about to read 4, iclass 38, count 0 2006.229.13:41:36.60#ibcon#read 4, iclass 38, count 0 2006.229.13:41:36.60#ibcon#about to read 5, iclass 38, count 0 2006.229.13:41:36.60#ibcon#read 5, iclass 38, count 0 2006.229.13:41:36.60#ibcon#about to read 6, iclass 38, count 0 2006.229.13:41:36.60#ibcon#read 6, iclass 38, count 0 2006.229.13:41:36.60#ibcon#end of sib2, iclass 38, count 0 2006.229.13:41:36.60#ibcon#*after write, iclass 38, count 0 2006.229.13:41:36.60#ibcon#*before return 0, iclass 38, count 0 2006.229.13:41:36.60#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:36.60#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:36.60#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:41:36.60#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:41:36.60$vck44/valo=8,884.99 2006.229.13:41:36.60#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:41:36.60#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:41:36.60#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:36.60#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:36.60#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:36.60#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:36.60#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:41:36.60#ibcon#first serial, iclass 40, count 0 2006.229.13:41:36.60#ibcon#enter sib2, iclass 40, count 0 2006.229.13:41:36.60#ibcon#flushed, iclass 40, count 0 2006.229.13:41:36.60#ibcon#about to write, iclass 40, count 0 2006.229.13:41:36.60#ibcon#wrote, iclass 40, count 0 2006.229.13:41:36.60#ibcon#about to read 3, iclass 40, count 0 2006.229.13:41:36.62#ibcon#read 3, iclass 40, count 0 2006.229.13:41:36.62#ibcon#about to read 4, iclass 40, count 0 2006.229.13:41:36.62#ibcon#read 4, iclass 40, count 0 2006.229.13:41:36.62#ibcon#about to read 5, iclass 40, count 0 2006.229.13:41:36.62#ibcon#read 5, iclass 40, count 0 2006.229.13:41:36.62#ibcon#about to read 6, iclass 40, count 0 2006.229.13:41:36.62#ibcon#read 6, iclass 40, count 0 2006.229.13:41:36.62#ibcon#end of sib2, iclass 40, count 0 2006.229.13:41:36.62#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:41:36.62#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:41:36.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:41:36.62#ibcon#*before write, iclass 40, count 0 2006.229.13:41:36.62#ibcon#enter sib2, iclass 40, count 0 2006.229.13:41:36.62#ibcon#flushed, iclass 40, count 0 2006.229.13:41:36.62#ibcon#about to write, iclass 40, count 0 2006.229.13:41:36.62#ibcon#wrote, iclass 40, count 0 2006.229.13:41:36.62#ibcon#about to read 3, iclass 40, count 0 2006.229.13:41:36.66#ibcon#read 3, iclass 40, count 0 2006.229.13:41:36.66#ibcon#about to read 4, iclass 40, count 0 2006.229.13:41:36.66#ibcon#read 4, iclass 40, count 0 2006.229.13:41:36.66#ibcon#about to read 5, iclass 40, count 0 2006.229.13:41:36.66#ibcon#read 5, iclass 40, count 0 2006.229.13:41:36.66#ibcon#about to read 6, iclass 40, count 0 2006.229.13:41:36.66#ibcon#read 6, iclass 40, count 0 2006.229.13:41:36.66#ibcon#end of sib2, iclass 40, count 0 2006.229.13:41:36.66#ibcon#*after write, iclass 40, count 0 2006.229.13:41:36.66#ibcon#*before return 0, iclass 40, count 0 2006.229.13:41:36.66#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:36.66#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:36.66#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:41:36.66#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:41:36.66$vck44/va=8,6 2006.229.13:41:36.66#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.13:41:36.66#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.13:41:36.66#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:36.66#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:36.72#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:36.72#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:36.72#ibcon#enter wrdev, iclass 4, count 2 2006.229.13:41:36.72#ibcon#first serial, iclass 4, count 2 2006.229.13:41:36.72#ibcon#enter sib2, iclass 4, count 2 2006.229.13:41:36.72#ibcon#flushed, iclass 4, count 2 2006.229.13:41:36.72#ibcon#about to write, iclass 4, count 2 2006.229.13:41:36.72#ibcon#wrote, iclass 4, count 2 2006.229.13:41:36.72#ibcon#about to read 3, iclass 4, count 2 2006.229.13:41:36.74#ibcon#read 3, iclass 4, count 2 2006.229.13:41:36.74#ibcon#about to read 4, iclass 4, count 2 2006.229.13:41:36.74#ibcon#read 4, iclass 4, count 2 2006.229.13:41:36.74#ibcon#about to read 5, iclass 4, count 2 2006.229.13:41:36.74#ibcon#read 5, iclass 4, count 2 2006.229.13:41:36.74#ibcon#about to read 6, iclass 4, count 2 2006.229.13:41:36.74#ibcon#read 6, iclass 4, count 2 2006.229.13:41:36.74#ibcon#end of sib2, iclass 4, count 2 2006.229.13:41:36.74#ibcon#*mode == 0, iclass 4, count 2 2006.229.13:41:36.74#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.13:41:36.74#ibcon#[25=AT08-06\r\n] 2006.229.13:41:36.74#ibcon#*before write, iclass 4, count 2 2006.229.13:41:36.74#ibcon#enter sib2, iclass 4, count 2 2006.229.13:41:36.74#ibcon#flushed, iclass 4, count 2 2006.229.13:41:36.74#ibcon#about to write, iclass 4, count 2 2006.229.13:41:36.74#ibcon#wrote, iclass 4, count 2 2006.229.13:41:36.74#ibcon#about to read 3, iclass 4, count 2 2006.229.13:41:36.77#ibcon#read 3, iclass 4, count 2 2006.229.13:41:36.77#ibcon#about to read 4, iclass 4, count 2 2006.229.13:41:36.77#ibcon#read 4, iclass 4, count 2 2006.229.13:41:36.77#ibcon#about to read 5, iclass 4, count 2 2006.229.13:41:36.77#ibcon#read 5, iclass 4, count 2 2006.229.13:41:36.77#ibcon#about to read 6, iclass 4, count 2 2006.229.13:41:36.77#ibcon#read 6, iclass 4, count 2 2006.229.13:41:36.77#ibcon#end of sib2, iclass 4, count 2 2006.229.13:41:36.77#ibcon#*after write, iclass 4, count 2 2006.229.13:41:36.77#ibcon#*before return 0, iclass 4, count 2 2006.229.13:41:36.77#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:36.77#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:36.77#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.13:41:36.77#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:36.77#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:36.89#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:36.89#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:36.89#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:41:36.89#ibcon#first serial, iclass 4, count 0 2006.229.13:41:36.89#ibcon#enter sib2, iclass 4, count 0 2006.229.13:41:36.89#ibcon#flushed, iclass 4, count 0 2006.229.13:41:36.89#ibcon#about to write, iclass 4, count 0 2006.229.13:41:36.89#ibcon#wrote, iclass 4, count 0 2006.229.13:41:36.89#ibcon#about to read 3, iclass 4, count 0 2006.229.13:41:36.91#ibcon#read 3, iclass 4, count 0 2006.229.13:41:36.91#ibcon#about to read 4, iclass 4, count 0 2006.229.13:41:36.91#ibcon#read 4, iclass 4, count 0 2006.229.13:41:36.91#ibcon#about to read 5, iclass 4, count 0 2006.229.13:41:36.91#ibcon#read 5, iclass 4, count 0 2006.229.13:41:36.91#ibcon#about to read 6, iclass 4, count 0 2006.229.13:41:36.91#ibcon#read 6, iclass 4, count 0 2006.229.13:41:36.91#ibcon#end of sib2, iclass 4, count 0 2006.229.13:41:36.91#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:41:36.91#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:41:36.91#ibcon#[25=USB\r\n] 2006.229.13:41:36.91#ibcon#*before write, iclass 4, count 0 2006.229.13:41:36.91#ibcon#enter sib2, iclass 4, count 0 2006.229.13:41:36.91#ibcon#flushed, iclass 4, count 0 2006.229.13:41:36.91#ibcon#about to write, iclass 4, count 0 2006.229.13:41:36.91#ibcon#wrote, iclass 4, count 0 2006.229.13:41:36.91#ibcon#about to read 3, iclass 4, count 0 2006.229.13:41:36.94#ibcon#read 3, iclass 4, count 0 2006.229.13:41:36.94#ibcon#about to read 4, iclass 4, count 0 2006.229.13:41:36.94#ibcon#read 4, iclass 4, count 0 2006.229.13:41:36.94#ibcon#about to read 5, iclass 4, count 0 2006.229.13:41:36.94#ibcon#read 5, iclass 4, count 0 2006.229.13:41:36.94#ibcon#about to read 6, iclass 4, count 0 2006.229.13:41:36.94#ibcon#read 6, iclass 4, count 0 2006.229.13:41:36.94#ibcon#end of sib2, iclass 4, count 0 2006.229.13:41:36.94#ibcon#*after write, iclass 4, count 0 2006.229.13:41:36.94#ibcon#*before return 0, iclass 4, count 0 2006.229.13:41:36.94#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:36.94#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:36.94#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:41:36.94#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:41:36.94$vck44/vblo=1,629.99 2006.229.13:41:36.94#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:41:36.94#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:41:36.94#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:36.94#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:36.94#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:36.94#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:36.94#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:41:36.94#ibcon#first serial, iclass 6, count 0 2006.229.13:41:36.94#ibcon#enter sib2, iclass 6, count 0 2006.229.13:41:36.94#ibcon#flushed, iclass 6, count 0 2006.229.13:41:36.94#ibcon#about to write, iclass 6, count 0 2006.229.13:41:36.94#ibcon#wrote, iclass 6, count 0 2006.229.13:41:36.94#ibcon#about to read 3, iclass 6, count 0 2006.229.13:41:36.96#ibcon#read 3, iclass 6, count 0 2006.229.13:41:36.96#ibcon#about to read 4, iclass 6, count 0 2006.229.13:41:36.96#ibcon#read 4, iclass 6, count 0 2006.229.13:41:36.96#ibcon#about to read 5, iclass 6, count 0 2006.229.13:41:36.96#ibcon#read 5, iclass 6, count 0 2006.229.13:41:36.96#ibcon#about to read 6, iclass 6, count 0 2006.229.13:41:36.96#ibcon#read 6, iclass 6, count 0 2006.229.13:41:36.96#ibcon#end of sib2, iclass 6, count 0 2006.229.13:41:36.96#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:41:36.96#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:41:36.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:41:36.96#ibcon#*before write, iclass 6, count 0 2006.229.13:41:36.96#ibcon#enter sib2, iclass 6, count 0 2006.229.13:41:36.96#ibcon#flushed, iclass 6, count 0 2006.229.13:41:36.96#ibcon#about to write, iclass 6, count 0 2006.229.13:41:36.96#ibcon#wrote, iclass 6, count 0 2006.229.13:41:36.96#ibcon#about to read 3, iclass 6, count 0 2006.229.13:41:37.00#ibcon#read 3, iclass 6, count 0 2006.229.13:41:37.00#ibcon#about to read 4, iclass 6, count 0 2006.229.13:41:37.00#ibcon#read 4, iclass 6, count 0 2006.229.13:41:37.00#ibcon#about to read 5, iclass 6, count 0 2006.229.13:41:37.00#ibcon#read 5, iclass 6, count 0 2006.229.13:41:37.00#ibcon#about to read 6, iclass 6, count 0 2006.229.13:41:37.00#ibcon#read 6, iclass 6, count 0 2006.229.13:41:37.00#ibcon#end of sib2, iclass 6, count 0 2006.229.13:41:37.00#ibcon#*after write, iclass 6, count 0 2006.229.13:41:37.00#ibcon#*before return 0, iclass 6, count 0 2006.229.13:41:37.00#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:37.00#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:37.00#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:41:37.00#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:41:37.00$vck44/vb=1,4 2006.229.13:41:37.00#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.13:41:37.00#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.13:41:37.00#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:37.00#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:41:37.00#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:41:37.00#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:41:37.00#ibcon#enter wrdev, iclass 10, count 2 2006.229.13:41:37.00#ibcon#first serial, iclass 10, count 2 2006.229.13:41:37.00#ibcon#enter sib2, iclass 10, count 2 2006.229.13:41:37.00#ibcon#flushed, iclass 10, count 2 2006.229.13:41:37.00#ibcon#about to write, iclass 10, count 2 2006.229.13:41:37.00#ibcon#wrote, iclass 10, count 2 2006.229.13:41:37.00#ibcon#about to read 3, iclass 10, count 2 2006.229.13:41:37.02#ibcon#read 3, iclass 10, count 2 2006.229.13:41:37.02#ibcon#about to read 4, iclass 10, count 2 2006.229.13:41:37.02#ibcon#read 4, iclass 10, count 2 2006.229.13:41:37.02#ibcon#about to read 5, iclass 10, count 2 2006.229.13:41:37.02#ibcon#read 5, iclass 10, count 2 2006.229.13:41:37.02#ibcon#about to read 6, iclass 10, count 2 2006.229.13:41:37.02#ibcon#read 6, iclass 10, count 2 2006.229.13:41:37.02#ibcon#end of sib2, iclass 10, count 2 2006.229.13:41:37.02#ibcon#*mode == 0, iclass 10, count 2 2006.229.13:41:37.02#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.13:41:37.02#ibcon#[27=AT01-04\r\n] 2006.229.13:41:37.02#ibcon#*before write, iclass 10, count 2 2006.229.13:41:37.02#ibcon#enter sib2, iclass 10, count 2 2006.229.13:41:37.02#ibcon#flushed, iclass 10, count 2 2006.229.13:41:37.02#ibcon#about to write, iclass 10, count 2 2006.229.13:41:37.02#ibcon#wrote, iclass 10, count 2 2006.229.13:41:37.02#ibcon#about to read 3, iclass 10, count 2 2006.229.13:41:37.05#ibcon#read 3, iclass 10, count 2 2006.229.13:41:37.05#ibcon#about to read 4, iclass 10, count 2 2006.229.13:41:37.05#ibcon#read 4, iclass 10, count 2 2006.229.13:41:37.05#ibcon#about to read 5, iclass 10, count 2 2006.229.13:41:37.05#ibcon#read 5, iclass 10, count 2 2006.229.13:41:37.05#ibcon#about to read 6, iclass 10, count 2 2006.229.13:41:37.05#ibcon#read 6, iclass 10, count 2 2006.229.13:41:37.05#ibcon#end of sib2, iclass 10, count 2 2006.229.13:41:37.05#ibcon#*after write, iclass 10, count 2 2006.229.13:41:37.05#ibcon#*before return 0, iclass 10, count 2 2006.229.13:41:37.05#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:41:37.05#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:41:37.05#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.13:41:37.05#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:37.05#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:41:37.17#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:41:37.17#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:41:37.17#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:41:37.17#ibcon#first serial, iclass 10, count 0 2006.229.13:41:37.17#ibcon#enter sib2, iclass 10, count 0 2006.229.13:41:37.17#ibcon#flushed, iclass 10, count 0 2006.229.13:41:37.17#ibcon#about to write, iclass 10, count 0 2006.229.13:41:37.17#ibcon#wrote, iclass 10, count 0 2006.229.13:41:37.17#ibcon#about to read 3, iclass 10, count 0 2006.229.13:41:37.19#ibcon#read 3, iclass 10, count 0 2006.229.13:41:37.19#ibcon#about to read 4, iclass 10, count 0 2006.229.13:41:37.19#ibcon#read 4, iclass 10, count 0 2006.229.13:41:37.19#ibcon#about to read 5, iclass 10, count 0 2006.229.13:41:37.19#ibcon#read 5, iclass 10, count 0 2006.229.13:41:37.19#ibcon#about to read 6, iclass 10, count 0 2006.229.13:41:37.19#ibcon#read 6, iclass 10, count 0 2006.229.13:41:37.19#ibcon#end of sib2, iclass 10, count 0 2006.229.13:41:37.19#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:41:37.19#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:41:37.19#ibcon#[27=USB\r\n] 2006.229.13:41:37.19#ibcon#*before write, iclass 10, count 0 2006.229.13:41:37.19#ibcon#enter sib2, iclass 10, count 0 2006.229.13:41:37.19#ibcon#flushed, iclass 10, count 0 2006.229.13:41:37.19#ibcon#about to write, iclass 10, count 0 2006.229.13:41:37.19#ibcon#wrote, iclass 10, count 0 2006.229.13:41:37.19#ibcon#about to read 3, iclass 10, count 0 2006.229.13:41:37.22#ibcon#read 3, iclass 10, count 0 2006.229.13:41:37.22#ibcon#about to read 4, iclass 10, count 0 2006.229.13:41:37.22#ibcon#read 4, iclass 10, count 0 2006.229.13:41:37.22#ibcon#about to read 5, iclass 10, count 0 2006.229.13:41:37.22#ibcon#read 5, iclass 10, count 0 2006.229.13:41:37.22#ibcon#about to read 6, iclass 10, count 0 2006.229.13:41:37.22#ibcon#read 6, iclass 10, count 0 2006.229.13:41:37.22#ibcon#end of sib2, iclass 10, count 0 2006.229.13:41:37.22#ibcon#*after write, iclass 10, count 0 2006.229.13:41:37.22#ibcon#*before return 0, iclass 10, count 0 2006.229.13:41:37.22#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:41:37.22#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:41:37.22#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:41:37.22#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:41:37.22$vck44/vblo=2,634.99 2006.229.13:41:37.22#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:41:37.22#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:41:37.22#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:37.22#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:37.22#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:37.22#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:37.22#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:41:37.22#ibcon#first serial, iclass 12, count 0 2006.229.13:41:37.22#ibcon#enter sib2, iclass 12, count 0 2006.229.13:41:37.22#ibcon#flushed, iclass 12, count 0 2006.229.13:41:37.22#ibcon#about to write, iclass 12, count 0 2006.229.13:41:37.22#ibcon#wrote, iclass 12, count 0 2006.229.13:41:37.22#ibcon#about to read 3, iclass 12, count 0 2006.229.13:41:37.24#ibcon#read 3, iclass 12, count 0 2006.229.13:41:37.24#ibcon#about to read 4, iclass 12, count 0 2006.229.13:41:37.24#ibcon#read 4, iclass 12, count 0 2006.229.13:41:37.24#ibcon#about to read 5, iclass 12, count 0 2006.229.13:41:37.24#ibcon#read 5, iclass 12, count 0 2006.229.13:41:37.24#ibcon#about to read 6, iclass 12, count 0 2006.229.13:41:37.24#ibcon#read 6, iclass 12, count 0 2006.229.13:41:37.24#ibcon#end of sib2, iclass 12, count 0 2006.229.13:41:37.24#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:41:37.24#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:41:37.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:41:37.24#ibcon#*before write, iclass 12, count 0 2006.229.13:41:37.24#ibcon#enter sib2, iclass 12, count 0 2006.229.13:41:37.24#ibcon#flushed, iclass 12, count 0 2006.229.13:41:37.24#ibcon#about to write, iclass 12, count 0 2006.229.13:41:37.24#ibcon#wrote, iclass 12, count 0 2006.229.13:41:37.24#ibcon#about to read 3, iclass 12, count 0 2006.229.13:41:37.28#ibcon#read 3, iclass 12, count 0 2006.229.13:41:37.28#ibcon#about to read 4, iclass 12, count 0 2006.229.13:41:37.28#ibcon#read 4, iclass 12, count 0 2006.229.13:41:37.28#ibcon#about to read 5, iclass 12, count 0 2006.229.13:41:37.28#ibcon#read 5, iclass 12, count 0 2006.229.13:41:37.28#ibcon#about to read 6, iclass 12, count 0 2006.229.13:41:37.28#ibcon#read 6, iclass 12, count 0 2006.229.13:41:37.28#ibcon#end of sib2, iclass 12, count 0 2006.229.13:41:37.28#ibcon#*after write, iclass 12, count 0 2006.229.13:41:37.28#ibcon#*before return 0, iclass 12, count 0 2006.229.13:41:37.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:37.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:41:37.28#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:41:37.28#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:41:37.28$vck44/vb=2,4 2006.229.13:41:37.28#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:41:37.28#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:41:37.28#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:37.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:37.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:37.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:37.34#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:41:37.34#ibcon#first serial, iclass 14, count 2 2006.229.13:41:37.34#ibcon#enter sib2, iclass 14, count 2 2006.229.13:41:37.34#ibcon#flushed, iclass 14, count 2 2006.229.13:41:37.34#ibcon#about to write, iclass 14, count 2 2006.229.13:41:37.34#ibcon#wrote, iclass 14, count 2 2006.229.13:41:37.34#ibcon#about to read 3, iclass 14, count 2 2006.229.13:41:37.36#ibcon#read 3, iclass 14, count 2 2006.229.13:41:37.36#ibcon#about to read 4, iclass 14, count 2 2006.229.13:41:37.36#ibcon#read 4, iclass 14, count 2 2006.229.13:41:37.36#ibcon#about to read 5, iclass 14, count 2 2006.229.13:41:37.36#ibcon#read 5, iclass 14, count 2 2006.229.13:41:37.36#ibcon#about to read 6, iclass 14, count 2 2006.229.13:41:37.36#ibcon#read 6, iclass 14, count 2 2006.229.13:41:37.36#ibcon#end of sib2, iclass 14, count 2 2006.229.13:41:37.36#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:41:37.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:41:37.36#ibcon#[27=AT02-04\r\n] 2006.229.13:41:37.36#ibcon#*before write, iclass 14, count 2 2006.229.13:41:37.36#ibcon#enter sib2, iclass 14, count 2 2006.229.13:41:37.36#ibcon#flushed, iclass 14, count 2 2006.229.13:41:37.36#ibcon#about to write, iclass 14, count 2 2006.229.13:41:37.36#ibcon#wrote, iclass 14, count 2 2006.229.13:41:37.36#ibcon#about to read 3, iclass 14, count 2 2006.229.13:41:37.39#ibcon#read 3, iclass 14, count 2 2006.229.13:41:37.39#ibcon#about to read 4, iclass 14, count 2 2006.229.13:41:37.39#ibcon#read 4, iclass 14, count 2 2006.229.13:41:37.39#ibcon#about to read 5, iclass 14, count 2 2006.229.13:41:37.39#ibcon#read 5, iclass 14, count 2 2006.229.13:41:37.39#ibcon#about to read 6, iclass 14, count 2 2006.229.13:41:37.39#ibcon#read 6, iclass 14, count 2 2006.229.13:41:37.39#ibcon#end of sib2, iclass 14, count 2 2006.229.13:41:37.39#ibcon#*after write, iclass 14, count 2 2006.229.13:41:37.39#ibcon#*before return 0, iclass 14, count 2 2006.229.13:41:37.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:37.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:41:37.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:41:37.39#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:37.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:37.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:37.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:37.51#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:41:37.51#ibcon#first serial, iclass 14, count 0 2006.229.13:41:37.51#ibcon#enter sib2, iclass 14, count 0 2006.229.13:41:37.51#ibcon#flushed, iclass 14, count 0 2006.229.13:41:37.51#ibcon#about to write, iclass 14, count 0 2006.229.13:41:37.51#ibcon#wrote, iclass 14, count 0 2006.229.13:41:37.51#ibcon#about to read 3, iclass 14, count 0 2006.229.13:41:37.53#ibcon#read 3, iclass 14, count 0 2006.229.13:41:37.53#ibcon#about to read 4, iclass 14, count 0 2006.229.13:41:37.53#ibcon#read 4, iclass 14, count 0 2006.229.13:41:37.53#ibcon#about to read 5, iclass 14, count 0 2006.229.13:41:37.53#ibcon#read 5, iclass 14, count 0 2006.229.13:41:37.53#ibcon#about to read 6, iclass 14, count 0 2006.229.13:41:37.53#ibcon#read 6, iclass 14, count 0 2006.229.13:41:37.53#ibcon#end of sib2, iclass 14, count 0 2006.229.13:41:37.53#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:41:37.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:41:37.53#ibcon#[27=USB\r\n] 2006.229.13:41:37.53#ibcon#*before write, iclass 14, count 0 2006.229.13:41:37.53#ibcon#enter sib2, iclass 14, count 0 2006.229.13:41:37.53#ibcon#flushed, iclass 14, count 0 2006.229.13:41:37.53#ibcon#about to write, iclass 14, count 0 2006.229.13:41:37.53#ibcon#wrote, iclass 14, count 0 2006.229.13:41:37.53#ibcon#about to read 3, iclass 14, count 0 2006.229.13:41:37.56#ibcon#read 3, iclass 14, count 0 2006.229.13:41:37.56#ibcon#about to read 4, iclass 14, count 0 2006.229.13:41:37.56#ibcon#read 4, iclass 14, count 0 2006.229.13:41:37.56#ibcon#about to read 5, iclass 14, count 0 2006.229.13:41:37.56#ibcon#read 5, iclass 14, count 0 2006.229.13:41:37.56#ibcon#about to read 6, iclass 14, count 0 2006.229.13:41:37.56#ibcon#read 6, iclass 14, count 0 2006.229.13:41:37.56#ibcon#end of sib2, iclass 14, count 0 2006.229.13:41:37.56#ibcon#*after write, iclass 14, count 0 2006.229.13:41:37.56#ibcon#*before return 0, iclass 14, count 0 2006.229.13:41:37.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:37.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:41:37.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:41:37.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:41:37.56$vck44/vblo=3,649.99 2006.229.13:41:37.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:41:37.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:41:37.56#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:37.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:37.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:37.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:37.56#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:41:37.56#ibcon#first serial, iclass 16, count 0 2006.229.13:41:37.56#ibcon#enter sib2, iclass 16, count 0 2006.229.13:41:37.56#ibcon#flushed, iclass 16, count 0 2006.229.13:41:37.56#ibcon#about to write, iclass 16, count 0 2006.229.13:41:37.56#ibcon#wrote, iclass 16, count 0 2006.229.13:41:37.56#ibcon#about to read 3, iclass 16, count 0 2006.229.13:41:37.58#ibcon#read 3, iclass 16, count 0 2006.229.13:41:37.58#ibcon#about to read 4, iclass 16, count 0 2006.229.13:41:37.58#ibcon#read 4, iclass 16, count 0 2006.229.13:41:37.58#ibcon#about to read 5, iclass 16, count 0 2006.229.13:41:37.58#ibcon#read 5, iclass 16, count 0 2006.229.13:41:37.58#ibcon#about to read 6, iclass 16, count 0 2006.229.13:41:37.58#ibcon#read 6, iclass 16, count 0 2006.229.13:41:37.58#ibcon#end of sib2, iclass 16, count 0 2006.229.13:41:37.58#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:41:37.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:41:37.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:41:37.58#ibcon#*before write, iclass 16, count 0 2006.229.13:41:37.58#ibcon#enter sib2, iclass 16, count 0 2006.229.13:41:37.58#ibcon#flushed, iclass 16, count 0 2006.229.13:41:37.58#ibcon#about to write, iclass 16, count 0 2006.229.13:41:37.58#ibcon#wrote, iclass 16, count 0 2006.229.13:41:37.58#ibcon#about to read 3, iclass 16, count 0 2006.229.13:41:37.62#ibcon#read 3, iclass 16, count 0 2006.229.13:41:37.62#ibcon#about to read 4, iclass 16, count 0 2006.229.13:41:37.62#ibcon#read 4, iclass 16, count 0 2006.229.13:41:37.62#ibcon#about to read 5, iclass 16, count 0 2006.229.13:41:37.62#ibcon#read 5, iclass 16, count 0 2006.229.13:41:37.62#ibcon#about to read 6, iclass 16, count 0 2006.229.13:41:37.62#ibcon#read 6, iclass 16, count 0 2006.229.13:41:37.62#ibcon#end of sib2, iclass 16, count 0 2006.229.13:41:37.62#ibcon#*after write, iclass 16, count 0 2006.229.13:41:37.62#ibcon#*before return 0, iclass 16, count 0 2006.229.13:41:37.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:37.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:41:37.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:41:37.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:41:37.62$vck44/vb=3,4 2006.229.13:41:37.62#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:41:37.62#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:41:37.62#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:37.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:37.68#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:37.68#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:37.68#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:41:37.68#ibcon#first serial, iclass 18, count 2 2006.229.13:41:37.68#ibcon#enter sib2, iclass 18, count 2 2006.229.13:41:37.68#ibcon#flushed, iclass 18, count 2 2006.229.13:41:37.68#ibcon#about to write, iclass 18, count 2 2006.229.13:41:37.68#ibcon#wrote, iclass 18, count 2 2006.229.13:41:37.68#ibcon#about to read 3, iclass 18, count 2 2006.229.13:41:37.70#ibcon#read 3, iclass 18, count 2 2006.229.13:41:37.70#ibcon#about to read 4, iclass 18, count 2 2006.229.13:41:37.70#ibcon#read 4, iclass 18, count 2 2006.229.13:41:37.70#ibcon#about to read 5, iclass 18, count 2 2006.229.13:41:37.70#ibcon#read 5, iclass 18, count 2 2006.229.13:41:37.70#ibcon#about to read 6, iclass 18, count 2 2006.229.13:41:37.70#ibcon#read 6, iclass 18, count 2 2006.229.13:41:37.70#ibcon#end of sib2, iclass 18, count 2 2006.229.13:41:37.70#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:41:37.70#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:41:37.70#ibcon#[27=AT03-04\r\n] 2006.229.13:41:37.70#ibcon#*before write, iclass 18, count 2 2006.229.13:41:37.70#ibcon#enter sib2, iclass 18, count 2 2006.229.13:41:37.70#ibcon#flushed, iclass 18, count 2 2006.229.13:41:37.70#ibcon#about to write, iclass 18, count 2 2006.229.13:41:37.70#ibcon#wrote, iclass 18, count 2 2006.229.13:41:37.70#ibcon#about to read 3, iclass 18, count 2 2006.229.13:41:37.73#ibcon#read 3, iclass 18, count 2 2006.229.13:41:37.73#ibcon#about to read 4, iclass 18, count 2 2006.229.13:41:37.73#ibcon#read 4, iclass 18, count 2 2006.229.13:41:37.73#ibcon#about to read 5, iclass 18, count 2 2006.229.13:41:37.73#ibcon#read 5, iclass 18, count 2 2006.229.13:41:37.73#ibcon#about to read 6, iclass 18, count 2 2006.229.13:41:37.73#ibcon#read 6, iclass 18, count 2 2006.229.13:41:37.73#ibcon#end of sib2, iclass 18, count 2 2006.229.13:41:37.73#ibcon#*after write, iclass 18, count 2 2006.229.13:41:37.73#ibcon#*before return 0, iclass 18, count 2 2006.229.13:41:37.73#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:37.73#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:41:37.73#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:41:37.73#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:37.73#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:37.85#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:37.85#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:37.85#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:41:37.85#ibcon#first serial, iclass 18, count 0 2006.229.13:41:37.85#ibcon#enter sib2, iclass 18, count 0 2006.229.13:41:37.85#ibcon#flushed, iclass 18, count 0 2006.229.13:41:37.85#ibcon#about to write, iclass 18, count 0 2006.229.13:41:37.85#ibcon#wrote, iclass 18, count 0 2006.229.13:41:37.85#ibcon#about to read 3, iclass 18, count 0 2006.229.13:41:37.87#ibcon#read 3, iclass 18, count 0 2006.229.13:41:37.87#ibcon#about to read 4, iclass 18, count 0 2006.229.13:41:37.87#ibcon#read 4, iclass 18, count 0 2006.229.13:41:37.87#ibcon#about to read 5, iclass 18, count 0 2006.229.13:41:37.87#ibcon#read 5, iclass 18, count 0 2006.229.13:41:37.87#ibcon#about to read 6, iclass 18, count 0 2006.229.13:41:37.87#ibcon#read 6, iclass 18, count 0 2006.229.13:41:37.87#ibcon#end of sib2, iclass 18, count 0 2006.229.13:41:37.87#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:41:37.87#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:41:37.87#ibcon#[27=USB\r\n] 2006.229.13:41:37.87#ibcon#*before write, iclass 18, count 0 2006.229.13:41:37.87#ibcon#enter sib2, iclass 18, count 0 2006.229.13:41:37.87#ibcon#flushed, iclass 18, count 0 2006.229.13:41:37.87#ibcon#about to write, iclass 18, count 0 2006.229.13:41:37.87#ibcon#wrote, iclass 18, count 0 2006.229.13:41:37.87#ibcon#about to read 3, iclass 18, count 0 2006.229.13:41:37.90#ibcon#read 3, iclass 18, count 0 2006.229.13:41:37.90#ibcon#about to read 4, iclass 18, count 0 2006.229.13:41:37.90#ibcon#read 4, iclass 18, count 0 2006.229.13:41:37.90#ibcon#about to read 5, iclass 18, count 0 2006.229.13:41:37.90#ibcon#read 5, iclass 18, count 0 2006.229.13:41:37.90#ibcon#about to read 6, iclass 18, count 0 2006.229.13:41:37.90#ibcon#read 6, iclass 18, count 0 2006.229.13:41:37.90#ibcon#end of sib2, iclass 18, count 0 2006.229.13:41:37.90#ibcon#*after write, iclass 18, count 0 2006.229.13:41:37.90#ibcon#*before return 0, iclass 18, count 0 2006.229.13:41:37.90#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:37.90#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:41:37.90#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:41:37.90#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:41:37.90$vck44/vblo=4,679.99 2006.229.13:41:37.90#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:41:37.90#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:41:37.90#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:37.90#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:37.90#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:37.90#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:37.90#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:41:37.90#ibcon#first serial, iclass 20, count 0 2006.229.13:41:37.90#ibcon#enter sib2, iclass 20, count 0 2006.229.13:41:37.90#ibcon#flushed, iclass 20, count 0 2006.229.13:41:37.90#ibcon#about to write, iclass 20, count 0 2006.229.13:41:37.90#ibcon#wrote, iclass 20, count 0 2006.229.13:41:37.90#ibcon#about to read 3, iclass 20, count 0 2006.229.13:41:37.92#ibcon#read 3, iclass 20, count 0 2006.229.13:41:37.92#ibcon#about to read 4, iclass 20, count 0 2006.229.13:41:37.92#ibcon#read 4, iclass 20, count 0 2006.229.13:41:37.92#ibcon#about to read 5, iclass 20, count 0 2006.229.13:41:37.92#ibcon#read 5, iclass 20, count 0 2006.229.13:41:37.92#ibcon#about to read 6, iclass 20, count 0 2006.229.13:41:37.92#ibcon#read 6, iclass 20, count 0 2006.229.13:41:37.92#ibcon#end of sib2, iclass 20, count 0 2006.229.13:41:37.92#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:41:37.92#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:41:37.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:41:37.92#ibcon#*before write, iclass 20, count 0 2006.229.13:41:37.92#ibcon#enter sib2, iclass 20, count 0 2006.229.13:41:37.92#ibcon#flushed, iclass 20, count 0 2006.229.13:41:37.92#ibcon#about to write, iclass 20, count 0 2006.229.13:41:37.92#ibcon#wrote, iclass 20, count 0 2006.229.13:41:37.92#ibcon#about to read 3, iclass 20, count 0 2006.229.13:41:37.96#ibcon#read 3, iclass 20, count 0 2006.229.13:41:37.96#ibcon#about to read 4, iclass 20, count 0 2006.229.13:41:37.96#ibcon#read 4, iclass 20, count 0 2006.229.13:41:37.96#ibcon#about to read 5, iclass 20, count 0 2006.229.13:41:37.96#ibcon#read 5, iclass 20, count 0 2006.229.13:41:37.96#ibcon#about to read 6, iclass 20, count 0 2006.229.13:41:37.96#ibcon#read 6, iclass 20, count 0 2006.229.13:41:37.96#ibcon#end of sib2, iclass 20, count 0 2006.229.13:41:37.96#ibcon#*after write, iclass 20, count 0 2006.229.13:41:37.96#ibcon#*before return 0, iclass 20, count 0 2006.229.13:41:37.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:37.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:41:37.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:41:37.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:41:37.96$vck44/vb=4,4 2006.229.13:41:37.96#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:41:37.96#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:41:37.96#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:37.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:38.02#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:38.02#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:38.02#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:41:38.02#ibcon#first serial, iclass 22, count 2 2006.229.13:41:38.02#ibcon#enter sib2, iclass 22, count 2 2006.229.13:41:38.02#ibcon#flushed, iclass 22, count 2 2006.229.13:41:38.02#ibcon#about to write, iclass 22, count 2 2006.229.13:41:38.02#ibcon#wrote, iclass 22, count 2 2006.229.13:41:38.02#ibcon#about to read 3, iclass 22, count 2 2006.229.13:41:38.04#ibcon#read 3, iclass 22, count 2 2006.229.13:41:38.04#ibcon#about to read 4, iclass 22, count 2 2006.229.13:41:38.04#ibcon#read 4, iclass 22, count 2 2006.229.13:41:38.04#ibcon#about to read 5, iclass 22, count 2 2006.229.13:41:38.04#ibcon#read 5, iclass 22, count 2 2006.229.13:41:38.04#ibcon#about to read 6, iclass 22, count 2 2006.229.13:41:38.04#ibcon#read 6, iclass 22, count 2 2006.229.13:41:38.04#ibcon#end of sib2, iclass 22, count 2 2006.229.13:41:38.04#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:41:38.04#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:41:38.04#ibcon#[27=AT04-04\r\n] 2006.229.13:41:38.04#ibcon#*before write, iclass 22, count 2 2006.229.13:41:38.04#ibcon#enter sib2, iclass 22, count 2 2006.229.13:41:38.04#ibcon#flushed, iclass 22, count 2 2006.229.13:41:38.04#ibcon#about to write, iclass 22, count 2 2006.229.13:41:38.04#ibcon#wrote, iclass 22, count 2 2006.229.13:41:38.04#ibcon#about to read 3, iclass 22, count 2 2006.229.13:41:38.07#ibcon#read 3, iclass 22, count 2 2006.229.13:41:38.07#ibcon#about to read 4, iclass 22, count 2 2006.229.13:41:38.07#ibcon#read 4, iclass 22, count 2 2006.229.13:41:38.07#ibcon#about to read 5, iclass 22, count 2 2006.229.13:41:38.07#ibcon#read 5, iclass 22, count 2 2006.229.13:41:38.07#ibcon#about to read 6, iclass 22, count 2 2006.229.13:41:38.07#ibcon#read 6, iclass 22, count 2 2006.229.13:41:38.07#ibcon#end of sib2, iclass 22, count 2 2006.229.13:41:38.07#ibcon#*after write, iclass 22, count 2 2006.229.13:41:38.07#ibcon#*before return 0, iclass 22, count 2 2006.229.13:41:38.07#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:38.07#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:41:38.07#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:41:38.07#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:38.07#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:38.09#abcon#<5=/04 1.7 2.9 27.551001002.1\r\n> 2006.229.13:41:38.11#abcon#{5=INTERFACE CLEAR} 2006.229.13:41:38.17#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:41:38.19#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:38.19#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:38.19#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:41:38.19#ibcon#first serial, iclass 22, count 0 2006.229.13:41:38.19#ibcon#enter sib2, iclass 22, count 0 2006.229.13:41:38.19#ibcon#flushed, iclass 22, count 0 2006.229.13:41:38.19#ibcon#about to write, iclass 22, count 0 2006.229.13:41:38.19#ibcon#wrote, iclass 22, count 0 2006.229.13:41:38.19#ibcon#about to read 3, iclass 22, count 0 2006.229.13:41:38.21#ibcon#read 3, iclass 22, count 0 2006.229.13:41:38.21#ibcon#about to read 4, iclass 22, count 0 2006.229.13:41:38.21#ibcon#read 4, iclass 22, count 0 2006.229.13:41:38.21#ibcon#about to read 5, iclass 22, count 0 2006.229.13:41:38.21#ibcon#read 5, iclass 22, count 0 2006.229.13:41:38.21#ibcon#about to read 6, iclass 22, count 0 2006.229.13:41:38.21#ibcon#read 6, iclass 22, count 0 2006.229.13:41:38.21#ibcon#end of sib2, iclass 22, count 0 2006.229.13:41:38.21#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:41:38.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:41:38.21#ibcon#[27=USB\r\n] 2006.229.13:41:38.21#ibcon#*before write, iclass 22, count 0 2006.229.13:41:38.21#ibcon#enter sib2, iclass 22, count 0 2006.229.13:41:38.21#ibcon#flushed, iclass 22, count 0 2006.229.13:41:38.21#ibcon#about to write, iclass 22, count 0 2006.229.13:41:38.21#ibcon#wrote, iclass 22, count 0 2006.229.13:41:38.21#ibcon#about to read 3, iclass 22, count 0 2006.229.13:41:38.24#ibcon#read 3, iclass 22, count 0 2006.229.13:41:38.24#ibcon#about to read 4, iclass 22, count 0 2006.229.13:41:38.24#ibcon#read 4, iclass 22, count 0 2006.229.13:41:38.24#ibcon#about to read 5, iclass 22, count 0 2006.229.13:41:38.24#ibcon#read 5, iclass 22, count 0 2006.229.13:41:38.24#ibcon#about to read 6, iclass 22, count 0 2006.229.13:41:38.24#ibcon#read 6, iclass 22, count 0 2006.229.13:41:38.24#ibcon#end of sib2, iclass 22, count 0 2006.229.13:41:38.24#ibcon#*after write, iclass 22, count 0 2006.229.13:41:38.24#ibcon#*before return 0, iclass 22, count 0 2006.229.13:41:38.24#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:38.24#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:41:38.24#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:41:38.24#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:41:38.24$vck44/vblo=5,709.99 2006.229.13:41:38.24#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:41:38.24#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:41:38.24#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:38.24#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:38.24#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:38.24#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:38.24#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:41:38.24#ibcon#first serial, iclass 28, count 0 2006.229.13:41:38.24#ibcon#enter sib2, iclass 28, count 0 2006.229.13:41:38.24#ibcon#flushed, iclass 28, count 0 2006.229.13:41:38.24#ibcon#about to write, iclass 28, count 0 2006.229.13:41:38.24#ibcon#wrote, iclass 28, count 0 2006.229.13:41:38.24#ibcon#about to read 3, iclass 28, count 0 2006.229.13:41:38.26#ibcon#read 3, iclass 28, count 0 2006.229.13:41:38.26#ibcon#about to read 4, iclass 28, count 0 2006.229.13:41:38.26#ibcon#read 4, iclass 28, count 0 2006.229.13:41:38.26#ibcon#about to read 5, iclass 28, count 0 2006.229.13:41:38.26#ibcon#read 5, iclass 28, count 0 2006.229.13:41:38.26#ibcon#about to read 6, iclass 28, count 0 2006.229.13:41:38.26#ibcon#read 6, iclass 28, count 0 2006.229.13:41:38.26#ibcon#end of sib2, iclass 28, count 0 2006.229.13:41:38.26#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:41:38.26#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:41:38.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:41:38.26#ibcon#*before write, iclass 28, count 0 2006.229.13:41:38.26#ibcon#enter sib2, iclass 28, count 0 2006.229.13:41:38.26#ibcon#flushed, iclass 28, count 0 2006.229.13:41:38.26#ibcon#about to write, iclass 28, count 0 2006.229.13:41:38.26#ibcon#wrote, iclass 28, count 0 2006.229.13:41:38.26#ibcon#about to read 3, iclass 28, count 0 2006.229.13:41:38.30#ibcon#read 3, iclass 28, count 0 2006.229.13:41:38.30#ibcon#about to read 4, iclass 28, count 0 2006.229.13:41:38.30#ibcon#read 4, iclass 28, count 0 2006.229.13:41:38.30#ibcon#about to read 5, iclass 28, count 0 2006.229.13:41:38.30#ibcon#read 5, iclass 28, count 0 2006.229.13:41:38.30#ibcon#about to read 6, iclass 28, count 0 2006.229.13:41:38.30#ibcon#read 6, iclass 28, count 0 2006.229.13:41:38.30#ibcon#end of sib2, iclass 28, count 0 2006.229.13:41:38.30#ibcon#*after write, iclass 28, count 0 2006.229.13:41:38.30#ibcon#*before return 0, iclass 28, count 0 2006.229.13:41:38.30#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:38.30#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:41:38.30#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:41:38.30#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:41:38.30$vck44/vb=5,4 2006.229.13:41:38.30#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:41:38.30#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:41:38.30#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:38.30#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:38.36#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:38.36#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:38.36#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:41:38.36#ibcon#first serial, iclass 30, count 2 2006.229.13:41:38.36#ibcon#enter sib2, iclass 30, count 2 2006.229.13:41:38.36#ibcon#flushed, iclass 30, count 2 2006.229.13:41:38.36#ibcon#about to write, iclass 30, count 2 2006.229.13:41:38.36#ibcon#wrote, iclass 30, count 2 2006.229.13:41:38.36#ibcon#about to read 3, iclass 30, count 2 2006.229.13:41:38.38#ibcon#read 3, iclass 30, count 2 2006.229.13:41:38.38#ibcon#about to read 4, iclass 30, count 2 2006.229.13:41:38.38#ibcon#read 4, iclass 30, count 2 2006.229.13:41:38.38#ibcon#about to read 5, iclass 30, count 2 2006.229.13:41:38.38#ibcon#read 5, iclass 30, count 2 2006.229.13:41:38.38#ibcon#about to read 6, iclass 30, count 2 2006.229.13:41:38.38#ibcon#read 6, iclass 30, count 2 2006.229.13:41:38.38#ibcon#end of sib2, iclass 30, count 2 2006.229.13:41:38.38#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:41:38.38#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:41:38.38#ibcon#[27=AT05-04\r\n] 2006.229.13:41:38.38#ibcon#*before write, iclass 30, count 2 2006.229.13:41:38.38#ibcon#enter sib2, iclass 30, count 2 2006.229.13:41:38.38#ibcon#flushed, iclass 30, count 2 2006.229.13:41:38.38#ibcon#about to write, iclass 30, count 2 2006.229.13:41:38.38#ibcon#wrote, iclass 30, count 2 2006.229.13:41:38.38#ibcon#about to read 3, iclass 30, count 2 2006.229.13:41:38.41#ibcon#read 3, iclass 30, count 2 2006.229.13:41:38.41#ibcon#about to read 4, iclass 30, count 2 2006.229.13:41:38.41#ibcon#read 4, iclass 30, count 2 2006.229.13:41:38.41#ibcon#about to read 5, iclass 30, count 2 2006.229.13:41:38.41#ibcon#read 5, iclass 30, count 2 2006.229.13:41:38.41#ibcon#about to read 6, iclass 30, count 2 2006.229.13:41:38.41#ibcon#read 6, iclass 30, count 2 2006.229.13:41:38.41#ibcon#end of sib2, iclass 30, count 2 2006.229.13:41:38.41#ibcon#*after write, iclass 30, count 2 2006.229.13:41:38.41#ibcon#*before return 0, iclass 30, count 2 2006.229.13:41:38.41#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:38.41#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:41:38.41#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:41:38.41#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:38.41#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:38.53#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:38.53#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:38.53#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:41:38.53#ibcon#first serial, iclass 30, count 0 2006.229.13:41:38.53#ibcon#enter sib2, iclass 30, count 0 2006.229.13:41:38.53#ibcon#flushed, iclass 30, count 0 2006.229.13:41:38.53#ibcon#about to write, iclass 30, count 0 2006.229.13:41:38.53#ibcon#wrote, iclass 30, count 0 2006.229.13:41:38.53#ibcon#about to read 3, iclass 30, count 0 2006.229.13:41:38.55#ibcon#read 3, iclass 30, count 0 2006.229.13:41:38.55#ibcon#about to read 4, iclass 30, count 0 2006.229.13:41:38.55#ibcon#read 4, iclass 30, count 0 2006.229.13:41:38.55#ibcon#about to read 5, iclass 30, count 0 2006.229.13:41:38.55#ibcon#read 5, iclass 30, count 0 2006.229.13:41:38.55#ibcon#about to read 6, iclass 30, count 0 2006.229.13:41:38.55#ibcon#read 6, iclass 30, count 0 2006.229.13:41:38.55#ibcon#end of sib2, iclass 30, count 0 2006.229.13:41:38.55#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:41:38.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:41:38.55#ibcon#[27=USB\r\n] 2006.229.13:41:38.55#ibcon#*before write, iclass 30, count 0 2006.229.13:41:38.55#ibcon#enter sib2, iclass 30, count 0 2006.229.13:41:38.55#ibcon#flushed, iclass 30, count 0 2006.229.13:41:38.55#ibcon#about to write, iclass 30, count 0 2006.229.13:41:38.55#ibcon#wrote, iclass 30, count 0 2006.229.13:41:38.55#ibcon#about to read 3, iclass 30, count 0 2006.229.13:41:38.58#ibcon#read 3, iclass 30, count 0 2006.229.13:41:38.58#ibcon#about to read 4, iclass 30, count 0 2006.229.13:41:38.58#ibcon#read 4, iclass 30, count 0 2006.229.13:41:38.58#ibcon#about to read 5, iclass 30, count 0 2006.229.13:41:38.58#ibcon#read 5, iclass 30, count 0 2006.229.13:41:38.58#ibcon#about to read 6, iclass 30, count 0 2006.229.13:41:38.58#ibcon#read 6, iclass 30, count 0 2006.229.13:41:38.58#ibcon#end of sib2, iclass 30, count 0 2006.229.13:41:38.58#ibcon#*after write, iclass 30, count 0 2006.229.13:41:38.58#ibcon#*before return 0, iclass 30, count 0 2006.229.13:41:38.58#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:38.58#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:41:38.58#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:41:38.58#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:41:38.58$vck44/vblo=6,719.99 2006.229.13:41:38.58#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:41:38.58#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:41:38.58#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:38.58#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:38.58#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:38.58#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:38.58#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:41:38.58#ibcon#first serial, iclass 32, count 0 2006.229.13:41:38.58#ibcon#enter sib2, iclass 32, count 0 2006.229.13:41:38.58#ibcon#flushed, iclass 32, count 0 2006.229.13:41:38.58#ibcon#about to write, iclass 32, count 0 2006.229.13:41:38.58#ibcon#wrote, iclass 32, count 0 2006.229.13:41:38.58#ibcon#about to read 3, iclass 32, count 0 2006.229.13:41:38.60#ibcon#read 3, iclass 32, count 0 2006.229.13:41:38.60#ibcon#about to read 4, iclass 32, count 0 2006.229.13:41:38.60#ibcon#read 4, iclass 32, count 0 2006.229.13:41:38.60#ibcon#about to read 5, iclass 32, count 0 2006.229.13:41:38.60#ibcon#read 5, iclass 32, count 0 2006.229.13:41:38.60#ibcon#about to read 6, iclass 32, count 0 2006.229.13:41:38.60#ibcon#read 6, iclass 32, count 0 2006.229.13:41:38.60#ibcon#end of sib2, iclass 32, count 0 2006.229.13:41:38.60#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:41:38.60#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:41:38.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:41:38.60#ibcon#*before write, iclass 32, count 0 2006.229.13:41:38.60#ibcon#enter sib2, iclass 32, count 0 2006.229.13:41:38.60#ibcon#flushed, iclass 32, count 0 2006.229.13:41:38.60#ibcon#about to write, iclass 32, count 0 2006.229.13:41:38.60#ibcon#wrote, iclass 32, count 0 2006.229.13:41:38.60#ibcon#about to read 3, iclass 32, count 0 2006.229.13:41:38.64#ibcon#read 3, iclass 32, count 0 2006.229.13:41:38.64#ibcon#about to read 4, iclass 32, count 0 2006.229.13:41:38.64#ibcon#read 4, iclass 32, count 0 2006.229.13:41:38.64#ibcon#about to read 5, iclass 32, count 0 2006.229.13:41:38.64#ibcon#read 5, iclass 32, count 0 2006.229.13:41:38.64#ibcon#about to read 6, iclass 32, count 0 2006.229.13:41:38.64#ibcon#read 6, iclass 32, count 0 2006.229.13:41:38.64#ibcon#end of sib2, iclass 32, count 0 2006.229.13:41:38.64#ibcon#*after write, iclass 32, count 0 2006.229.13:41:38.64#ibcon#*before return 0, iclass 32, count 0 2006.229.13:41:38.64#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:38.64#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:41:38.64#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:41:38.64#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:41:38.64$vck44/vb=6,4 2006.229.13:41:38.64#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:41:38.64#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:41:38.64#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:38.64#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:38.70#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:38.70#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:38.70#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:41:38.70#ibcon#first serial, iclass 34, count 2 2006.229.13:41:38.70#ibcon#enter sib2, iclass 34, count 2 2006.229.13:41:38.70#ibcon#flushed, iclass 34, count 2 2006.229.13:41:38.70#ibcon#about to write, iclass 34, count 2 2006.229.13:41:38.70#ibcon#wrote, iclass 34, count 2 2006.229.13:41:38.70#ibcon#about to read 3, iclass 34, count 2 2006.229.13:41:38.72#ibcon#read 3, iclass 34, count 2 2006.229.13:41:38.72#ibcon#about to read 4, iclass 34, count 2 2006.229.13:41:38.72#ibcon#read 4, iclass 34, count 2 2006.229.13:41:38.72#ibcon#about to read 5, iclass 34, count 2 2006.229.13:41:38.72#ibcon#read 5, iclass 34, count 2 2006.229.13:41:38.72#ibcon#about to read 6, iclass 34, count 2 2006.229.13:41:38.72#ibcon#read 6, iclass 34, count 2 2006.229.13:41:38.72#ibcon#end of sib2, iclass 34, count 2 2006.229.13:41:38.72#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:41:38.72#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:41:38.72#ibcon#[27=AT06-04\r\n] 2006.229.13:41:38.72#ibcon#*before write, iclass 34, count 2 2006.229.13:41:38.72#ibcon#enter sib2, iclass 34, count 2 2006.229.13:41:38.72#ibcon#flushed, iclass 34, count 2 2006.229.13:41:38.72#ibcon#about to write, iclass 34, count 2 2006.229.13:41:38.72#ibcon#wrote, iclass 34, count 2 2006.229.13:41:38.72#ibcon#about to read 3, iclass 34, count 2 2006.229.13:41:38.75#ibcon#read 3, iclass 34, count 2 2006.229.13:41:38.75#ibcon#about to read 4, iclass 34, count 2 2006.229.13:41:38.75#ibcon#read 4, iclass 34, count 2 2006.229.13:41:38.75#ibcon#about to read 5, iclass 34, count 2 2006.229.13:41:38.75#ibcon#read 5, iclass 34, count 2 2006.229.13:41:38.75#ibcon#about to read 6, iclass 34, count 2 2006.229.13:41:38.75#ibcon#read 6, iclass 34, count 2 2006.229.13:41:38.75#ibcon#end of sib2, iclass 34, count 2 2006.229.13:41:38.75#ibcon#*after write, iclass 34, count 2 2006.229.13:41:38.75#ibcon#*before return 0, iclass 34, count 2 2006.229.13:41:38.75#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:38.75#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:41:38.75#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:41:38.75#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:38.75#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:38.87#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:38.87#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:38.87#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:41:38.87#ibcon#first serial, iclass 34, count 0 2006.229.13:41:38.87#ibcon#enter sib2, iclass 34, count 0 2006.229.13:41:38.87#ibcon#flushed, iclass 34, count 0 2006.229.13:41:38.87#ibcon#about to write, iclass 34, count 0 2006.229.13:41:38.87#ibcon#wrote, iclass 34, count 0 2006.229.13:41:38.87#ibcon#about to read 3, iclass 34, count 0 2006.229.13:41:38.89#ibcon#read 3, iclass 34, count 0 2006.229.13:41:38.89#ibcon#about to read 4, iclass 34, count 0 2006.229.13:41:38.89#ibcon#read 4, iclass 34, count 0 2006.229.13:41:38.89#ibcon#about to read 5, iclass 34, count 0 2006.229.13:41:38.89#ibcon#read 5, iclass 34, count 0 2006.229.13:41:38.89#ibcon#about to read 6, iclass 34, count 0 2006.229.13:41:38.89#ibcon#read 6, iclass 34, count 0 2006.229.13:41:38.89#ibcon#end of sib2, iclass 34, count 0 2006.229.13:41:38.89#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:41:38.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:41:38.89#ibcon#[27=USB\r\n] 2006.229.13:41:38.89#ibcon#*before write, iclass 34, count 0 2006.229.13:41:38.89#ibcon#enter sib2, iclass 34, count 0 2006.229.13:41:38.89#ibcon#flushed, iclass 34, count 0 2006.229.13:41:38.89#ibcon#about to write, iclass 34, count 0 2006.229.13:41:38.89#ibcon#wrote, iclass 34, count 0 2006.229.13:41:38.89#ibcon#about to read 3, iclass 34, count 0 2006.229.13:41:38.92#ibcon#read 3, iclass 34, count 0 2006.229.13:41:38.92#ibcon#about to read 4, iclass 34, count 0 2006.229.13:41:38.92#ibcon#read 4, iclass 34, count 0 2006.229.13:41:38.92#ibcon#about to read 5, iclass 34, count 0 2006.229.13:41:38.92#ibcon#read 5, iclass 34, count 0 2006.229.13:41:38.92#ibcon#about to read 6, iclass 34, count 0 2006.229.13:41:38.92#ibcon#read 6, iclass 34, count 0 2006.229.13:41:38.92#ibcon#end of sib2, iclass 34, count 0 2006.229.13:41:38.92#ibcon#*after write, iclass 34, count 0 2006.229.13:41:38.92#ibcon#*before return 0, iclass 34, count 0 2006.229.13:41:38.92#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:38.92#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:41:38.92#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:41:38.92#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:41:38.92$vck44/vblo=7,734.99 2006.229.13:41:38.92#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:41:38.92#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:41:38.92#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:38.92#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:38.92#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:38.92#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:38.92#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:41:38.92#ibcon#first serial, iclass 36, count 0 2006.229.13:41:38.92#ibcon#enter sib2, iclass 36, count 0 2006.229.13:41:38.92#ibcon#flushed, iclass 36, count 0 2006.229.13:41:38.92#ibcon#about to write, iclass 36, count 0 2006.229.13:41:38.92#ibcon#wrote, iclass 36, count 0 2006.229.13:41:38.92#ibcon#about to read 3, iclass 36, count 0 2006.229.13:41:38.94#ibcon#read 3, iclass 36, count 0 2006.229.13:41:38.94#ibcon#about to read 4, iclass 36, count 0 2006.229.13:41:38.94#ibcon#read 4, iclass 36, count 0 2006.229.13:41:38.94#ibcon#about to read 5, iclass 36, count 0 2006.229.13:41:38.94#ibcon#read 5, iclass 36, count 0 2006.229.13:41:38.94#ibcon#about to read 6, iclass 36, count 0 2006.229.13:41:38.94#ibcon#read 6, iclass 36, count 0 2006.229.13:41:38.94#ibcon#end of sib2, iclass 36, count 0 2006.229.13:41:38.94#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:41:38.94#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:41:38.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:41:38.94#ibcon#*before write, iclass 36, count 0 2006.229.13:41:38.94#ibcon#enter sib2, iclass 36, count 0 2006.229.13:41:38.94#ibcon#flushed, iclass 36, count 0 2006.229.13:41:38.94#ibcon#about to write, iclass 36, count 0 2006.229.13:41:38.94#ibcon#wrote, iclass 36, count 0 2006.229.13:41:38.94#ibcon#about to read 3, iclass 36, count 0 2006.229.13:41:38.98#ibcon#read 3, iclass 36, count 0 2006.229.13:41:38.98#ibcon#about to read 4, iclass 36, count 0 2006.229.13:41:38.98#ibcon#read 4, iclass 36, count 0 2006.229.13:41:38.98#ibcon#about to read 5, iclass 36, count 0 2006.229.13:41:38.98#ibcon#read 5, iclass 36, count 0 2006.229.13:41:38.98#ibcon#about to read 6, iclass 36, count 0 2006.229.13:41:38.98#ibcon#read 6, iclass 36, count 0 2006.229.13:41:38.98#ibcon#end of sib2, iclass 36, count 0 2006.229.13:41:38.98#ibcon#*after write, iclass 36, count 0 2006.229.13:41:38.98#ibcon#*before return 0, iclass 36, count 0 2006.229.13:41:38.98#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:38.98#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:41:38.98#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:41:38.98#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:41:38.98$vck44/vb=7,4 2006.229.13:41:38.98#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:41:38.98#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:41:38.98#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:38.98#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:39.04#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:39.04#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:39.04#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:41:39.04#ibcon#first serial, iclass 38, count 2 2006.229.13:41:39.04#ibcon#enter sib2, iclass 38, count 2 2006.229.13:41:39.04#ibcon#flushed, iclass 38, count 2 2006.229.13:41:39.04#ibcon#about to write, iclass 38, count 2 2006.229.13:41:39.04#ibcon#wrote, iclass 38, count 2 2006.229.13:41:39.04#ibcon#about to read 3, iclass 38, count 2 2006.229.13:41:39.06#ibcon#read 3, iclass 38, count 2 2006.229.13:41:39.06#ibcon#about to read 4, iclass 38, count 2 2006.229.13:41:39.06#ibcon#read 4, iclass 38, count 2 2006.229.13:41:39.06#ibcon#about to read 5, iclass 38, count 2 2006.229.13:41:39.06#ibcon#read 5, iclass 38, count 2 2006.229.13:41:39.06#ibcon#about to read 6, iclass 38, count 2 2006.229.13:41:39.06#ibcon#read 6, iclass 38, count 2 2006.229.13:41:39.06#ibcon#end of sib2, iclass 38, count 2 2006.229.13:41:39.06#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:41:39.06#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:41:39.06#ibcon#[27=AT07-04\r\n] 2006.229.13:41:39.06#ibcon#*before write, iclass 38, count 2 2006.229.13:41:39.06#ibcon#enter sib2, iclass 38, count 2 2006.229.13:41:39.06#ibcon#flushed, iclass 38, count 2 2006.229.13:41:39.06#ibcon#about to write, iclass 38, count 2 2006.229.13:41:39.06#ibcon#wrote, iclass 38, count 2 2006.229.13:41:39.06#ibcon#about to read 3, iclass 38, count 2 2006.229.13:41:39.09#ibcon#read 3, iclass 38, count 2 2006.229.13:41:39.09#ibcon#about to read 4, iclass 38, count 2 2006.229.13:41:39.09#ibcon#read 4, iclass 38, count 2 2006.229.13:41:39.09#ibcon#about to read 5, iclass 38, count 2 2006.229.13:41:39.09#ibcon#read 5, iclass 38, count 2 2006.229.13:41:39.09#ibcon#about to read 6, iclass 38, count 2 2006.229.13:41:39.09#ibcon#read 6, iclass 38, count 2 2006.229.13:41:39.09#ibcon#end of sib2, iclass 38, count 2 2006.229.13:41:39.09#ibcon#*after write, iclass 38, count 2 2006.229.13:41:39.09#ibcon#*before return 0, iclass 38, count 2 2006.229.13:41:39.09#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:39.09#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:41:39.09#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:41:39.09#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:39.09#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:39.21#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:39.21#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:39.21#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:41:39.21#ibcon#first serial, iclass 38, count 0 2006.229.13:41:39.21#ibcon#enter sib2, iclass 38, count 0 2006.229.13:41:39.21#ibcon#flushed, iclass 38, count 0 2006.229.13:41:39.21#ibcon#about to write, iclass 38, count 0 2006.229.13:41:39.21#ibcon#wrote, iclass 38, count 0 2006.229.13:41:39.21#ibcon#about to read 3, iclass 38, count 0 2006.229.13:41:39.23#ibcon#read 3, iclass 38, count 0 2006.229.13:41:39.23#ibcon#about to read 4, iclass 38, count 0 2006.229.13:41:39.23#ibcon#read 4, iclass 38, count 0 2006.229.13:41:39.23#ibcon#about to read 5, iclass 38, count 0 2006.229.13:41:39.23#ibcon#read 5, iclass 38, count 0 2006.229.13:41:39.23#ibcon#about to read 6, iclass 38, count 0 2006.229.13:41:39.23#ibcon#read 6, iclass 38, count 0 2006.229.13:41:39.23#ibcon#end of sib2, iclass 38, count 0 2006.229.13:41:39.23#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:41:39.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:41:39.23#ibcon#[27=USB\r\n] 2006.229.13:41:39.23#ibcon#*before write, iclass 38, count 0 2006.229.13:41:39.23#ibcon#enter sib2, iclass 38, count 0 2006.229.13:41:39.23#ibcon#flushed, iclass 38, count 0 2006.229.13:41:39.23#ibcon#about to write, iclass 38, count 0 2006.229.13:41:39.23#ibcon#wrote, iclass 38, count 0 2006.229.13:41:39.23#ibcon#about to read 3, iclass 38, count 0 2006.229.13:41:39.26#ibcon#read 3, iclass 38, count 0 2006.229.13:41:39.26#ibcon#about to read 4, iclass 38, count 0 2006.229.13:41:39.26#ibcon#read 4, iclass 38, count 0 2006.229.13:41:39.26#ibcon#about to read 5, iclass 38, count 0 2006.229.13:41:39.26#ibcon#read 5, iclass 38, count 0 2006.229.13:41:39.26#ibcon#about to read 6, iclass 38, count 0 2006.229.13:41:39.26#ibcon#read 6, iclass 38, count 0 2006.229.13:41:39.26#ibcon#end of sib2, iclass 38, count 0 2006.229.13:41:39.26#ibcon#*after write, iclass 38, count 0 2006.229.13:41:39.26#ibcon#*before return 0, iclass 38, count 0 2006.229.13:41:39.26#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:39.26#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:41:39.26#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:41:39.26#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:41:39.26$vck44/vblo=8,744.99 2006.229.13:41:39.26#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:41:39.26#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:41:39.26#ibcon#ireg 17 cls_cnt 0 2006.229.13:41:39.26#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:39.26#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:39.26#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:39.26#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:41:39.26#ibcon#first serial, iclass 40, count 0 2006.229.13:41:39.26#ibcon#enter sib2, iclass 40, count 0 2006.229.13:41:39.26#ibcon#flushed, iclass 40, count 0 2006.229.13:41:39.26#ibcon#about to write, iclass 40, count 0 2006.229.13:41:39.26#ibcon#wrote, iclass 40, count 0 2006.229.13:41:39.26#ibcon#about to read 3, iclass 40, count 0 2006.229.13:41:39.28#ibcon#read 3, iclass 40, count 0 2006.229.13:41:39.28#ibcon#about to read 4, iclass 40, count 0 2006.229.13:41:39.28#ibcon#read 4, iclass 40, count 0 2006.229.13:41:39.28#ibcon#about to read 5, iclass 40, count 0 2006.229.13:41:39.28#ibcon#read 5, iclass 40, count 0 2006.229.13:41:39.28#ibcon#about to read 6, iclass 40, count 0 2006.229.13:41:39.28#ibcon#read 6, iclass 40, count 0 2006.229.13:41:39.28#ibcon#end of sib2, iclass 40, count 0 2006.229.13:41:39.28#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:41:39.28#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:41:39.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:41:39.28#ibcon#*before write, iclass 40, count 0 2006.229.13:41:39.28#ibcon#enter sib2, iclass 40, count 0 2006.229.13:41:39.28#ibcon#flushed, iclass 40, count 0 2006.229.13:41:39.28#ibcon#about to write, iclass 40, count 0 2006.229.13:41:39.28#ibcon#wrote, iclass 40, count 0 2006.229.13:41:39.28#ibcon#about to read 3, iclass 40, count 0 2006.229.13:41:39.32#ibcon#read 3, iclass 40, count 0 2006.229.13:41:39.32#ibcon#about to read 4, iclass 40, count 0 2006.229.13:41:39.32#ibcon#read 4, iclass 40, count 0 2006.229.13:41:39.32#ibcon#about to read 5, iclass 40, count 0 2006.229.13:41:39.32#ibcon#read 5, iclass 40, count 0 2006.229.13:41:39.32#ibcon#about to read 6, iclass 40, count 0 2006.229.13:41:39.32#ibcon#read 6, iclass 40, count 0 2006.229.13:41:39.32#ibcon#end of sib2, iclass 40, count 0 2006.229.13:41:39.32#ibcon#*after write, iclass 40, count 0 2006.229.13:41:39.32#ibcon#*before return 0, iclass 40, count 0 2006.229.13:41:39.32#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:39.32#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:41:39.32#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:41:39.32#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:41:39.32$vck44/vb=8,4 2006.229.13:41:39.32#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.13:41:39.32#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.13:41:39.32#ibcon#ireg 11 cls_cnt 2 2006.229.13:41:39.32#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:39.38#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:39.38#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:39.38#ibcon#enter wrdev, iclass 4, count 2 2006.229.13:41:39.38#ibcon#first serial, iclass 4, count 2 2006.229.13:41:39.38#ibcon#enter sib2, iclass 4, count 2 2006.229.13:41:39.38#ibcon#flushed, iclass 4, count 2 2006.229.13:41:39.38#ibcon#about to write, iclass 4, count 2 2006.229.13:41:39.38#ibcon#wrote, iclass 4, count 2 2006.229.13:41:39.38#ibcon#about to read 3, iclass 4, count 2 2006.229.13:41:39.40#ibcon#read 3, iclass 4, count 2 2006.229.13:41:39.40#ibcon#about to read 4, iclass 4, count 2 2006.229.13:41:39.40#ibcon#read 4, iclass 4, count 2 2006.229.13:41:39.40#ibcon#about to read 5, iclass 4, count 2 2006.229.13:41:39.40#ibcon#read 5, iclass 4, count 2 2006.229.13:41:39.40#ibcon#about to read 6, iclass 4, count 2 2006.229.13:41:39.40#ibcon#read 6, iclass 4, count 2 2006.229.13:41:39.40#ibcon#end of sib2, iclass 4, count 2 2006.229.13:41:39.40#ibcon#*mode == 0, iclass 4, count 2 2006.229.13:41:39.40#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.13:41:39.40#ibcon#[27=AT08-04\r\n] 2006.229.13:41:39.40#ibcon#*before write, iclass 4, count 2 2006.229.13:41:39.40#ibcon#enter sib2, iclass 4, count 2 2006.229.13:41:39.40#ibcon#flushed, iclass 4, count 2 2006.229.13:41:39.40#ibcon#about to write, iclass 4, count 2 2006.229.13:41:39.40#ibcon#wrote, iclass 4, count 2 2006.229.13:41:39.40#ibcon#about to read 3, iclass 4, count 2 2006.229.13:41:39.43#ibcon#read 3, iclass 4, count 2 2006.229.13:41:39.43#ibcon#about to read 4, iclass 4, count 2 2006.229.13:41:39.43#ibcon#read 4, iclass 4, count 2 2006.229.13:41:39.43#ibcon#about to read 5, iclass 4, count 2 2006.229.13:41:39.43#ibcon#read 5, iclass 4, count 2 2006.229.13:41:39.43#ibcon#about to read 6, iclass 4, count 2 2006.229.13:41:39.43#ibcon#read 6, iclass 4, count 2 2006.229.13:41:39.43#ibcon#end of sib2, iclass 4, count 2 2006.229.13:41:39.43#ibcon#*after write, iclass 4, count 2 2006.229.13:41:39.43#ibcon#*before return 0, iclass 4, count 2 2006.229.13:41:39.43#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:39.43#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:41:39.43#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.13:41:39.43#ibcon#ireg 7 cls_cnt 0 2006.229.13:41:39.43#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:39.55#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:39.55#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:39.55#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:41:39.55#ibcon#first serial, iclass 4, count 0 2006.229.13:41:39.55#ibcon#enter sib2, iclass 4, count 0 2006.229.13:41:39.55#ibcon#flushed, iclass 4, count 0 2006.229.13:41:39.55#ibcon#about to write, iclass 4, count 0 2006.229.13:41:39.55#ibcon#wrote, iclass 4, count 0 2006.229.13:41:39.55#ibcon#about to read 3, iclass 4, count 0 2006.229.13:41:39.57#ibcon#read 3, iclass 4, count 0 2006.229.13:41:39.57#ibcon#about to read 4, iclass 4, count 0 2006.229.13:41:39.57#ibcon#read 4, iclass 4, count 0 2006.229.13:41:39.57#ibcon#about to read 5, iclass 4, count 0 2006.229.13:41:39.57#ibcon#read 5, iclass 4, count 0 2006.229.13:41:39.57#ibcon#about to read 6, iclass 4, count 0 2006.229.13:41:39.57#ibcon#read 6, iclass 4, count 0 2006.229.13:41:39.57#ibcon#end of sib2, iclass 4, count 0 2006.229.13:41:39.57#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:41:39.57#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:41:39.57#ibcon#[27=USB\r\n] 2006.229.13:41:39.57#ibcon#*before write, iclass 4, count 0 2006.229.13:41:39.57#ibcon#enter sib2, iclass 4, count 0 2006.229.13:41:39.57#ibcon#flushed, iclass 4, count 0 2006.229.13:41:39.57#ibcon#about to write, iclass 4, count 0 2006.229.13:41:39.57#ibcon#wrote, iclass 4, count 0 2006.229.13:41:39.57#ibcon#about to read 3, iclass 4, count 0 2006.229.13:41:39.60#ibcon#read 3, iclass 4, count 0 2006.229.13:41:39.60#ibcon#about to read 4, iclass 4, count 0 2006.229.13:41:39.60#ibcon#read 4, iclass 4, count 0 2006.229.13:41:39.60#ibcon#about to read 5, iclass 4, count 0 2006.229.13:41:39.60#ibcon#read 5, iclass 4, count 0 2006.229.13:41:39.60#ibcon#about to read 6, iclass 4, count 0 2006.229.13:41:39.60#ibcon#read 6, iclass 4, count 0 2006.229.13:41:39.60#ibcon#end of sib2, iclass 4, count 0 2006.229.13:41:39.60#ibcon#*after write, iclass 4, count 0 2006.229.13:41:39.60#ibcon#*before return 0, iclass 4, count 0 2006.229.13:41:39.60#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:39.60#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:41:39.60#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:41:39.60#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:41:39.60$vck44/vabw=wide 2006.229.13:41:39.60#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:41:39.60#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:41:39.60#ibcon#ireg 8 cls_cnt 0 2006.229.13:41:39.60#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:39.60#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:39.60#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:39.60#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:41:39.60#ibcon#first serial, iclass 6, count 0 2006.229.13:41:39.60#ibcon#enter sib2, iclass 6, count 0 2006.229.13:41:39.60#ibcon#flushed, iclass 6, count 0 2006.229.13:41:39.60#ibcon#about to write, iclass 6, count 0 2006.229.13:41:39.60#ibcon#wrote, iclass 6, count 0 2006.229.13:41:39.60#ibcon#about to read 3, iclass 6, count 0 2006.229.13:41:39.62#ibcon#read 3, iclass 6, count 0 2006.229.13:41:39.62#ibcon#about to read 4, iclass 6, count 0 2006.229.13:41:39.62#ibcon#read 4, iclass 6, count 0 2006.229.13:41:39.62#ibcon#about to read 5, iclass 6, count 0 2006.229.13:41:39.62#ibcon#read 5, iclass 6, count 0 2006.229.13:41:39.62#ibcon#about to read 6, iclass 6, count 0 2006.229.13:41:39.62#ibcon#read 6, iclass 6, count 0 2006.229.13:41:39.62#ibcon#end of sib2, iclass 6, count 0 2006.229.13:41:39.62#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:41:39.62#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:41:39.62#ibcon#[25=BW32\r\n] 2006.229.13:41:39.62#ibcon#*before write, iclass 6, count 0 2006.229.13:41:39.62#ibcon#enter sib2, iclass 6, count 0 2006.229.13:41:39.62#ibcon#flushed, iclass 6, count 0 2006.229.13:41:39.62#ibcon#about to write, iclass 6, count 0 2006.229.13:41:39.62#ibcon#wrote, iclass 6, count 0 2006.229.13:41:39.62#ibcon#about to read 3, iclass 6, count 0 2006.229.13:41:39.65#ibcon#read 3, iclass 6, count 0 2006.229.13:41:39.65#ibcon#about to read 4, iclass 6, count 0 2006.229.13:41:39.65#ibcon#read 4, iclass 6, count 0 2006.229.13:41:39.65#ibcon#about to read 5, iclass 6, count 0 2006.229.13:41:39.65#ibcon#read 5, iclass 6, count 0 2006.229.13:41:39.65#ibcon#about to read 6, iclass 6, count 0 2006.229.13:41:39.65#ibcon#read 6, iclass 6, count 0 2006.229.13:41:39.65#ibcon#end of sib2, iclass 6, count 0 2006.229.13:41:39.65#ibcon#*after write, iclass 6, count 0 2006.229.13:41:39.65#ibcon#*before return 0, iclass 6, count 0 2006.229.13:41:39.65#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:39.65#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:41:39.65#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:41:39.65#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:41:39.65$vck44/vbbw=wide 2006.229.13:41:39.65#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.13:41:39.65#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.13:41:39.65#ibcon#ireg 8 cls_cnt 0 2006.229.13:41:39.65#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:41:39.72#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:41:39.72#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:41:39.72#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:41:39.72#ibcon#first serial, iclass 10, count 0 2006.229.13:41:39.72#ibcon#enter sib2, iclass 10, count 0 2006.229.13:41:39.72#ibcon#flushed, iclass 10, count 0 2006.229.13:41:39.72#ibcon#about to write, iclass 10, count 0 2006.229.13:41:39.72#ibcon#wrote, iclass 10, count 0 2006.229.13:41:39.72#ibcon#about to read 3, iclass 10, count 0 2006.229.13:41:39.74#ibcon#read 3, iclass 10, count 0 2006.229.13:41:39.74#ibcon#about to read 4, iclass 10, count 0 2006.229.13:41:39.74#ibcon#read 4, iclass 10, count 0 2006.229.13:41:39.74#ibcon#about to read 5, iclass 10, count 0 2006.229.13:41:39.74#ibcon#read 5, iclass 10, count 0 2006.229.13:41:39.74#ibcon#about to read 6, iclass 10, count 0 2006.229.13:41:39.74#ibcon#read 6, iclass 10, count 0 2006.229.13:41:39.74#ibcon#end of sib2, iclass 10, count 0 2006.229.13:41:39.74#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:41:39.74#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:41:39.74#ibcon#[27=BW32\r\n] 2006.229.13:41:39.74#ibcon#*before write, iclass 10, count 0 2006.229.13:41:39.74#ibcon#enter sib2, iclass 10, count 0 2006.229.13:41:39.74#ibcon#flushed, iclass 10, count 0 2006.229.13:41:39.74#ibcon#about to write, iclass 10, count 0 2006.229.13:41:39.74#ibcon#wrote, iclass 10, count 0 2006.229.13:41:39.74#ibcon#about to read 3, iclass 10, count 0 2006.229.13:41:39.77#ibcon#read 3, iclass 10, count 0 2006.229.13:41:39.77#ibcon#about to read 4, iclass 10, count 0 2006.229.13:41:39.77#ibcon#read 4, iclass 10, count 0 2006.229.13:41:39.77#ibcon#about to read 5, iclass 10, count 0 2006.229.13:41:39.77#ibcon#read 5, iclass 10, count 0 2006.229.13:41:39.77#ibcon#about to read 6, iclass 10, count 0 2006.229.13:41:39.77#ibcon#read 6, iclass 10, count 0 2006.229.13:41:39.77#ibcon#end of sib2, iclass 10, count 0 2006.229.13:41:39.77#ibcon#*after write, iclass 10, count 0 2006.229.13:41:39.77#ibcon#*before return 0, iclass 10, count 0 2006.229.13:41:39.77#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:41:39.77#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:41:39.77#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:41:39.77#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:41:39.77$setupk4/ifdk4 2006.229.13:41:39.77$ifdk4/lo= 2006.229.13:41:39.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:41:39.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:41:39.77$ifdk4/patch= 2006.229.13:41:39.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:41:39.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:41:39.77$setupk4/!*+20s 2006.229.13:41:45.14#trakl#Source acquired 2006.229.13:41:47.14#flagr#flagr/antenna,acquired 2006.229.13:41:48.26#abcon#<5=/04 1.7 2.9 27.551001002.1\r\n> 2006.229.13:41:48.28#abcon#{5=INTERFACE CLEAR} 2006.229.13:41:48.34#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:41:54.29$setupk4/"tpicd 2006.229.13:41:54.29$setupk4/echo=off 2006.229.13:41:54.29$setupk4/xlog=off 2006.229.13:41:54.29:!2006.229.13:42:50 2006.229.13:42:50.00:preob 2006.229.13:42:51.14/onsource/TRACKING 2006.229.13:42:51.14:!2006.229.13:43:00 2006.229.13:43:00.00:"tape 2006.229.13:43:00.00:"st=record 2006.229.13:43:00.00:data_valid=on 2006.229.13:43:00.00:midob 2006.229.13:43:00.14/onsource/TRACKING 2006.229.13:43:00.14/wx/27.55,1002.1,100 2006.229.13:43:00.29/cable/+6.4134E-03 2006.229.13:43:01.38/va/01,08,usb,yes,30,32 2006.229.13:43:01.38/va/02,07,usb,yes,32,33 2006.229.13:43:01.38/va/03,06,usb,yes,40,42 2006.229.13:43:01.38/va/04,07,usb,yes,33,35 2006.229.13:43:01.38/va/05,04,usb,yes,30,30 2006.229.13:43:01.38/va/06,04,usb,yes,33,33 2006.229.13:43:01.38/va/07,05,usb,yes,29,30 2006.229.13:43:01.38/va/08,06,usb,yes,21,26 2006.229.13:43:01.61/valo/01,524.99,yes,locked 2006.229.13:43:01.61/valo/02,534.99,yes,locked 2006.229.13:43:01.61/valo/03,564.99,yes,locked 2006.229.13:43:01.61/valo/04,624.99,yes,locked 2006.229.13:43:01.61/valo/05,734.99,yes,locked 2006.229.13:43:01.61/valo/06,814.99,yes,locked 2006.229.13:43:01.61/valo/07,864.99,yes,locked 2006.229.13:43:01.61/valo/08,884.99,yes,locked 2006.229.13:43:02.70/vb/01,04,usb,yes,31,29 2006.229.13:43:02.70/vb/02,04,usb,yes,34,33 2006.229.13:43:02.70/vb/03,04,usb,yes,31,34 2006.229.13:43:02.70/vb/04,04,usb,yes,35,34 2006.229.13:43:02.70/vb/05,04,usb,yes,27,30 2006.229.13:43:02.70/vb/06,04,usb,yes,32,28 2006.229.13:43:02.70/vb/07,04,usb,yes,32,31 2006.229.13:43:02.70/vb/08,04,usb,yes,29,32 2006.229.13:43:02.94/vblo/01,629.99,yes,locked 2006.229.13:43:02.94/vblo/02,634.99,yes,locked 2006.229.13:43:02.94/vblo/03,649.99,yes,locked 2006.229.13:43:02.94/vblo/04,679.99,yes,locked 2006.229.13:43:02.94/vblo/05,709.99,yes,locked 2006.229.13:43:02.94/vblo/06,719.99,yes,locked 2006.229.13:43:02.94/vblo/07,734.99,yes,locked 2006.229.13:43:02.94/vblo/08,744.99,yes,locked 2006.229.13:43:03.09/vabw/8 2006.229.13:43:03.24/vbbw/8 2006.229.13:43:03.33/xfe/off,on,12.2 2006.229.13:43:03.71/ifatt/23,28,28,28 2006.229.13:43:04.07/fmout-gps/S +4.62E-07 2006.229.13:43:04.11:!2006.229.13:45:50 2006.229.13:45:50.00:data_valid=off 2006.229.13:45:50.00:"et 2006.229.13:45:50.00:!+3s 2006.229.13:45:53.01:"tape 2006.229.13:45:53.01:postob 2006.229.13:45:53.22/cable/+6.4116E-03 2006.229.13:45:53.22/wx/27.54,1002.1,100 2006.229.13:45:54.07/fmout-gps/S +4.62E-07 2006.229.13:45:54.07:scan_name=229-1348,jd0608,40 2006.229.13:45:54.07:source=1921-293,192451.06,-291430.1,2000.0,cw 2006.229.13:45:55.14#flagr#flagr/antenna,new-source 2006.229.13:45:55.14:checkk5 2006.229.13:45:55.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:45:55.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:45:56.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:45:56.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:45:57.11/chk_obsdata//k5ts1/T2291343??a.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.13:45:57.53/chk_obsdata//k5ts2/T2291343??b.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.13:45:57.94/chk_obsdata//k5ts3/T2291343??c.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.13:45:58.34/chk_obsdata//k5ts4/T2291343??d.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.13:45:59.06/k5log//k5ts1_log_newline 2006.229.13:45:59.77/k5log//k5ts2_log_newline 2006.229.13:46:00.52/k5log//k5ts3_log_newline 2006.229.13:46:01.25/k5log//k5ts4_log_newline 2006.229.13:46:01.27/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:46:01.27:setupk4=1 2006.229.13:46:01.27$setupk4/echo=on 2006.229.13:46:01.27$setupk4/pcalon 2006.229.13:46:01.27$pcalon/"no phase cal control is implemented here 2006.229.13:46:01.27$setupk4/"tpicd=stop 2006.229.13:46:01.27$setupk4/"rec=synch_on 2006.229.13:46:01.27$setupk4/"rec_mode=128 2006.229.13:46:01.27$setupk4/!* 2006.229.13:46:01.27$setupk4/recpk4 2006.229.13:46:01.27$recpk4/recpatch= 2006.229.13:46:01.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:46:01.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:46:01.27$setupk4/vck44 2006.229.13:46:01.27$vck44/valo=1,524.99 2006.229.13:46:01.27#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:46:01.27#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:46:01.27#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:01.27#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:01.27#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:01.27#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:01.27#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:46:01.27#ibcon#first serial, iclass 5, count 0 2006.229.13:46:01.27#ibcon#enter sib2, iclass 5, count 0 2006.229.13:46:01.27#ibcon#flushed, iclass 5, count 0 2006.229.13:46:01.27#ibcon#about to write, iclass 5, count 0 2006.229.13:46:01.27#ibcon#wrote, iclass 5, count 0 2006.229.13:46:01.27#ibcon#about to read 3, iclass 5, count 0 2006.229.13:46:01.29#ibcon#read 3, iclass 5, count 0 2006.229.13:46:01.29#ibcon#about to read 4, iclass 5, count 0 2006.229.13:46:01.29#ibcon#read 4, iclass 5, count 0 2006.229.13:46:01.29#ibcon#about to read 5, iclass 5, count 0 2006.229.13:46:01.29#ibcon#read 5, iclass 5, count 0 2006.229.13:46:01.29#ibcon#about to read 6, iclass 5, count 0 2006.229.13:46:01.29#ibcon#read 6, iclass 5, count 0 2006.229.13:46:01.29#ibcon#end of sib2, iclass 5, count 0 2006.229.13:46:01.29#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:46:01.29#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:46:01.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:46:01.29#ibcon#*before write, iclass 5, count 0 2006.229.13:46:01.29#ibcon#enter sib2, iclass 5, count 0 2006.229.13:46:01.29#ibcon#flushed, iclass 5, count 0 2006.229.13:46:01.29#ibcon#about to write, iclass 5, count 0 2006.229.13:46:01.29#ibcon#wrote, iclass 5, count 0 2006.229.13:46:01.29#ibcon#about to read 3, iclass 5, count 0 2006.229.13:46:01.34#ibcon#read 3, iclass 5, count 0 2006.229.13:46:01.34#ibcon#about to read 4, iclass 5, count 0 2006.229.13:46:01.34#ibcon#read 4, iclass 5, count 0 2006.229.13:46:01.34#ibcon#about to read 5, iclass 5, count 0 2006.229.13:46:01.34#ibcon#read 5, iclass 5, count 0 2006.229.13:46:01.34#ibcon#about to read 6, iclass 5, count 0 2006.229.13:46:01.34#ibcon#read 6, iclass 5, count 0 2006.229.13:46:01.34#ibcon#end of sib2, iclass 5, count 0 2006.229.13:46:01.34#ibcon#*after write, iclass 5, count 0 2006.229.13:46:01.34#ibcon#*before return 0, iclass 5, count 0 2006.229.13:46:01.34#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:01.34#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:01.34#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:46:01.34#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:46:01.34$vck44/va=1,8 2006.229.13:46:01.34#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:46:01.34#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:46:01.34#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:01.34#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:01.34#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:01.34#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:01.34#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:46:01.34#ibcon#first serial, iclass 7, count 2 2006.229.13:46:01.34#ibcon#enter sib2, iclass 7, count 2 2006.229.13:46:01.34#ibcon#flushed, iclass 7, count 2 2006.229.13:46:01.34#ibcon#about to write, iclass 7, count 2 2006.229.13:46:01.34#ibcon#wrote, iclass 7, count 2 2006.229.13:46:01.34#ibcon#about to read 3, iclass 7, count 2 2006.229.13:46:01.36#ibcon#read 3, iclass 7, count 2 2006.229.13:46:01.36#ibcon#about to read 4, iclass 7, count 2 2006.229.13:46:01.36#ibcon#read 4, iclass 7, count 2 2006.229.13:46:01.36#ibcon#about to read 5, iclass 7, count 2 2006.229.13:46:01.36#ibcon#read 5, iclass 7, count 2 2006.229.13:46:01.36#ibcon#about to read 6, iclass 7, count 2 2006.229.13:46:01.36#ibcon#read 6, iclass 7, count 2 2006.229.13:46:01.36#ibcon#end of sib2, iclass 7, count 2 2006.229.13:46:01.36#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:46:01.36#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:46:01.36#ibcon#[25=AT01-08\r\n] 2006.229.13:46:01.36#ibcon#*before write, iclass 7, count 2 2006.229.13:46:01.36#ibcon#enter sib2, iclass 7, count 2 2006.229.13:46:01.36#ibcon#flushed, iclass 7, count 2 2006.229.13:46:01.36#ibcon#about to write, iclass 7, count 2 2006.229.13:46:01.36#ibcon#wrote, iclass 7, count 2 2006.229.13:46:01.36#ibcon#about to read 3, iclass 7, count 2 2006.229.13:46:01.39#ibcon#read 3, iclass 7, count 2 2006.229.13:46:01.39#ibcon#about to read 4, iclass 7, count 2 2006.229.13:46:01.39#ibcon#read 4, iclass 7, count 2 2006.229.13:46:01.39#ibcon#about to read 5, iclass 7, count 2 2006.229.13:46:01.39#ibcon#read 5, iclass 7, count 2 2006.229.13:46:01.39#ibcon#about to read 6, iclass 7, count 2 2006.229.13:46:01.39#ibcon#read 6, iclass 7, count 2 2006.229.13:46:01.39#ibcon#end of sib2, iclass 7, count 2 2006.229.13:46:01.39#ibcon#*after write, iclass 7, count 2 2006.229.13:46:01.39#ibcon#*before return 0, iclass 7, count 2 2006.229.13:46:01.39#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:01.39#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:01.39#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:46:01.39#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:01.39#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:01.51#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:01.51#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:01.51#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:46:01.51#ibcon#first serial, iclass 7, count 0 2006.229.13:46:01.51#ibcon#enter sib2, iclass 7, count 0 2006.229.13:46:01.51#ibcon#flushed, iclass 7, count 0 2006.229.13:46:01.51#ibcon#about to write, iclass 7, count 0 2006.229.13:46:01.51#ibcon#wrote, iclass 7, count 0 2006.229.13:46:01.51#ibcon#about to read 3, iclass 7, count 0 2006.229.13:46:01.53#ibcon#read 3, iclass 7, count 0 2006.229.13:46:01.53#ibcon#about to read 4, iclass 7, count 0 2006.229.13:46:01.53#ibcon#read 4, iclass 7, count 0 2006.229.13:46:01.53#ibcon#about to read 5, iclass 7, count 0 2006.229.13:46:01.53#ibcon#read 5, iclass 7, count 0 2006.229.13:46:01.53#ibcon#about to read 6, iclass 7, count 0 2006.229.13:46:01.53#ibcon#read 6, iclass 7, count 0 2006.229.13:46:01.53#ibcon#end of sib2, iclass 7, count 0 2006.229.13:46:01.53#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:46:01.53#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:46:01.53#ibcon#[25=USB\r\n] 2006.229.13:46:01.53#ibcon#*before write, iclass 7, count 0 2006.229.13:46:01.53#ibcon#enter sib2, iclass 7, count 0 2006.229.13:46:01.53#ibcon#flushed, iclass 7, count 0 2006.229.13:46:01.53#ibcon#about to write, iclass 7, count 0 2006.229.13:46:01.53#ibcon#wrote, iclass 7, count 0 2006.229.13:46:01.53#ibcon#about to read 3, iclass 7, count 0 2006.229.13:46:01.56#ibcon#read 3, iclass 7, count 0 2006.229.13:46:01.56#ibcon#about to read 4, iclass 7, count 0 2006.229.13:46:01.56#ibcon#read 4, iclass 7, count 0 2006.229.13:46:01.56#ibcon#about to read 5, iclass 7, count 0 2006.229.13:46:01.56#ibcon#read 5, iclass 7, count 0 2006.229.13:46:01.56#ibcon#about to read 6, iclass 7, count 0 2006.229.13:46:01.56#ibcon#read 6, iclass 7, count 0 2006.229.13:46:01.56#ibcon#end of sib2, iclass 7, count 0 2006.229.13:46:01.56#ibcon#*after write, iclass 7, count 0 2006.229.13:46:01.56#ibcon#*before return 0, iclass 7, count 0 2006.229.13:46:01.56#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:01.56#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:01.56#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:46:01.56#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:46:01.56$vck44/valo=2,534.99 2006.229.13:46:01.56#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:46:01.56#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:46:01.56#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:01.56#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:01.56#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:01.56#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:01.56#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:46:01.56#ibcon#first serial, iclass 11, count 0 2006.229.13:46:01.56#ibcon#enter sib2, iclass 11, count 0 2006.229.13:46:01.56#ibcon#flushed, iclass 11, count 0 2006.229.13:46:01.56#ibcon#about to write, iclass 11, count 0 2006.229.13:46:01.56#ibcon#wrote, iclass 11, count 0 2006.229.13:46:01.56#ibcon#about to read 3, iclass 11, count 0 2006.229.13:46:01.58#ibcon#read 3, iclass 11, count 0 2006.229.13:46:01.58#ibcon#about to read 4, iclass 11, count 0 2006.229.13:46:01.58#ibcon#read 4, iclass 11, count 0 2006.229.13:46:01.58#ibcon#about to read 5, iclass 11, count 0 2006.229.13:46:01.58#ibcon#read 5, iclass 11, count 0 2006.229.13:46:01.58#ibcon#about to read 6, iclass 11, count 0 2006.229.13:46:01.58#ibcon#read 6, iclass 11, count 0 2006.229.13:46:01.58#ibcon#end of sib2, iclass 11, count 0 2006.229.13:46:01.58#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:46:01.58#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:46:01.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:46:01.58#ibcon#*before write, iclass 11, count 0 2006.229.13:46:01.58#ibcon#enter sib2, iclass 11, count 0 2006.229.13:46:01.58#ibcon#flushed, iclass 11, count 0 2006.229.13:46:01.58#ibcon#about to write, iclass 11, count 0 2006.229.13:46:01.58#ibcon#wrote, iclass 11, count 0 2006.229.13:46:01.58#ibcon#about to read 3, iclass 11, count 0 2006.229.13:46:01.62#ibcon#read 3, iclass 11, count 0 2006.229.13:46:01.62#ibcon#about to read 4, iclass 11, count 0 2006.229.13:46:01.62#ibcon#read 4, iclass 11, count 0 2006.229.13:46:01.62#ibcon#about to read 5, iclass 11, count 0 2006.229.13:46:01.62#ibcon#read 5, iclass 11, count 0 2006.229.13:46:01.62#ibcon#about to read 6, iclass 11, count 0 2006.229.13:46:01.62#ibcon#read 6, iclass 11, count 0 2006.229.13:46:01.62#ibcon#end of sib2, iclass 11, count 0 2006.229.13:46:01.62#ibcon#*after write, iclass 11, count 0 2006.229.13:46:01.62#ibcon#*before return 0, iclass 11, count 0 2006.229.13:46:01.62#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:01.62#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:01.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:46:01.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:46:01.62$vck44/va=2,7 2006.229.13:46:01.62#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.13:46:01.62#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.13:46:01.62#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:01.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:01.68#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:01.68#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:01.68#ibcon#enter wrdev, iclass 13, count 2 2006.229.13:46:01.68#ibcon#first serial, iclass 13, count 2 2006.229.13:46:01.68#ibcon#enter sib2, iclass 13, count 2 2006.229.13:46:01.68#ibcon#flushed, iclass 13, count 2 2006.229.13:46:01.68#ibcon#about to write, iclass 13, count 2 2006.229.13:46:01.68#ibcon#wrote, iclass 13, count 2 2006.229.13:46:01.68#ibcon#about to read 3, iclass 13, count 2 2006.229.13:46:01.70#ibcon#read 3, iclass 13, count 2 2006.229.13:46:01.70#ibcon#about to read 4, iclass 13, count 2 2006.229.13:46:01.70#ibcon#read 4, iclass 13, count 2 2006.229.13:46:01.70#ibcon#about to read 5, iclass 13, count 2 2006.229.13:46:01.70#ibcon#read 5, iclass 13, count 2 2006.229.13:46:01.70#ibcon#about to read 6, iclass 13, count 2 2006.229.13:46:01.70#ibcon#read 6, iclass 13, count 2 2006.229.13:46:01.70#ibcon#end of sib2, iclass 13, count 2 2006.229.13:46:01.70#ibcon#*mode == 0, iclass 13, count 2 2006.229.13:46:01.70#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.13:46:01.70#ibcon#[25=AT02-07\r\n] 2006.229.13:46:01.70#ibcon#*before write, iclass 13, count 2 2006.229.13:46:01.70#ibcon#enter sib2, iclass 13, count 2 2006.229.13:46:01.70#ibcon#flushed, iclass 13, count 2 2006.229.13:46:01.70#ibcon#about to write, iclass 13, count 2 2006.229.13:46:01.70#ibcon#wrote, iclass 13, count 2 2006.229.13:46:01.70#ibcon#about to read 3, iclass 13, count 2 2006.229.13:46:01.73#ibcon#read 3, iclass 13, count 2 2006.229.13:46:01.73#ibcon#about to read 4, iclass 13, count 2 2006.229.13:46:01.73#ibcon#read 4, iclass 13, count 2 2006.229.13:46:01.73#ibcon#about to read 5, iclass 13, count 2 2006.229.13:46:01.73#ibcon#read 5, iclass 13, count 2 2006.229.13:46:01.73#ibcon#about to read 6, iclass 13, count 2 2006.229.13:46:01.73#ibcon#read 6, iclass 13, count 2 2006.229.13:46:01.73#ibcon#end of sib2, iclass 13, count 2 2006.229.13:46:01.73#ibcon#*after write, iclass 13, count 2 2006.229.13:46:01.73#ibcon#*before return 0, iclass 13, count 2 2006.229.13:46:01.73#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:01.73#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:01.73#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.13:46:01.73#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:01.73#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:01.85#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:01.85#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:01.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:46:01.85#ibcon#first serial, iclass 13, count 0 2006.229.13:46:01.85#ibcon#enter sib2, iclass 13, count 0 2006.229.13:46:01.85#ibcon#flushed, iclass 13, count 0 2006.229.13:46:01.85#ibcon#about to write, iclass 13, count 0 2006.229.13:46:01.85#ibcon#wrote, iclass 13, count 0 2006.229.13:46:01.85#ibcon#about to read 3, iclass 13, count 0 2006.229.13:46:01.87#ibcon#read 3, iclass 13, count 0 2006.229.13:46:01.87#ibcon#about to read 4, iclass 13, count 0 2006.229.13:46:01.87#ibcon#read 4, iclass 13, count 0 2006.229.13:46:01.87#ibcon#about to read 5, iclass 13, count 0 2006.229.13:46:01.87#ibcon#read 5, iclass 13, count 0 2006.229.13:46:01.87#ibcon#about to read 6, iclass 13, count 0 2006.229.13:46:01.87#ibcon#read 6, iclass 13, count 0 2006.229.13:46:01.87#ibcon#end of sib2, iclass 13, count 0 2006.229.13:46:01.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:46:01.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:46:01.87#ibcon#[25=USB\r\n] 2006.229.13:46:01.87#ibcon#*before write, iclass 13, count 0 2006.229.13:46:01.87#ibcon#enter sib2, iclass 13, count 0 2006.229.13:46:01.87#ibcon#flushed, iclass 13, count 0 2006.229.13:46:01.87#ibcon#about to write, iclass 13, count 0 2006.229.13:46:01.87#ibcon#wrote, iclass 13, count 0 2006.229.13:46:01.87#ibcon#about to read 3, iclass 13, count 0 2006.229.13:46:01.90#ibcon#read 3, iclass 13, count 0 2006.229.13:46:01.90#ibcon#about to read 4, iclass 13, count 0 2006.229.13:46:01.90#ibcon#read 4, iclass 13, count 0 2006.229.13:46:01.90#ibcon#about to read 5, iclass 13, count 0 2006.229.13:46:01.90#ibcon#read 5, iclass 13, count 0 2006.229.13:46:01.90#ibcon#about to read 6, iclass 13, count 0 2006.229.13:46:01.90#ibcon#read 6, iclass 13, count 0 2006.229.13:46:01.90#ibcon#end of sib2, iclass 13, count 0 2006.229.13:46:01.90#ibcon#*after write, iclass 13, count 0 2006.229.13:46:01.90#ibcon#*before return 0, iclass 13, count 0 2006.229.13:46:01.90#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:01.90#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:01.90#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:46:01.90#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:46:01.90$vck44/valo=3,564.99 2006.229.13:46:01.90#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.13:46:01.90#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.13:46:01.90#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:01.90#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:01.90#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:01.90#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:01.90#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:46:01.90#ibcon#first serial, iclass 15, count 0 2006.229.13:46:01.90#ibcon#enter sib2, iclass 15, count 0 2006.229.13:46:01.90#ibcon#flushed, iclass 15, count 0 2006.229.13:46:01.90#ibcon#about to write, iclass 15, count 0 2006.229.13:46:01.90#ibcon#wrote, iclass 15, count 0 2006.229.13:46:01.90#ibcon#about to read 3, iclass 15, count 0 2006.229.13:46:01.92#ibcon#read 3, iclass 15, count 0 2006.229.13:46:01.92#ibcon#about to read 4, iclass 15, count 0 2006.229.13:46:01.92#ibcon#read 4, iclass 15, count 0 2006.229.13:46:01.92#ibcon#about to read 5, iclass 15, count 0 2006.229.13:46:01.92#ibcon#read 5, iclass 15, count 0 2006.229.13:46:01.92#ibcon#about to read 6, iclass 15, count 0 2006.229.13:46:01.92#ibcon#read 6, iclass 15, count 0 2006.229.13:46:01.92#ibcon#end of sib2, iclass 15, count 0 2006.229.13:46:01.92#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:46:01.92#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:46:01.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:46:01.92#ibcon#*before write, iclass 15, count 0 2006.229.13:46:01.92#ibcon#enter sib2, iclass 15, count 0 2006.229.13:46:01.92#ibcon#flushed, iclass 15, count 0 2006.229.13:46:01.92#ibcon#about to write, iclass 15, count 0 2006.229.13:46:01.92#ibcon#wrote, iclass 15, count 0 2006.229.13:46:01.92#ibcon#about to read 3, iclass 15, count 0 2006.229.13:46:01.96#ibcon#read 3, iclass 15, count 0 2006.229.13:46:01.96#ibcon#about to read 4, iclass 15, count 0 2006.229.13:46:01.96#ibcon#read 4, iclass 15, count 0 2006.229.13:46:01.96#ibcon#about to read 5, iclass 15, count 0 2006.229.13:46:01.96#ibcon#read 5, iclass 15, count 0 2006.229.13:46:01.96#ibcon#about to read 6, iclass 15, count 0 2006.229.13:46:01.96#ibcon#read 6, iclass 15, count 0 2006.229.13:46:01.96#ibcon#end of sib2, iclass 15, count 0 2006.229.13:46:01.96#ibcon#*after write, iclass 15, count 0 2006.229.13:46:01.96#ibcon#*before return 0, iclass 15, count 0 2006.229.13:46:01.96#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:01.96#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:01.96#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:46:01.96#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:46:01.96$vck44/va=3,6 2006.229.13:46:01.96#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.13:46:01.96#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.13:46:01.96#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:01.96#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:02.02#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:02.02#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:02.02#ibcon#enter wrdev, iclass 17, count 2 2006.229.13:46:02.02#ibcon#first serial, iclass 17, count 2 2006.229.13:46:02.02#ibcon#enter sib2, iclass 17, count 2 2006.229.13:46:02.02#ibcon#flushed, iclass 17, count 2 2006.229.13:46:02.02#ibcon#about to write, iclass 17, count 2 2006.229.13:46:02.02#ibcon#wrote, iclass 17, count 2 2006.229.13:46:02.02#ibcon#about to read 3, iclass 17, count 2 2006.229.13:46:02.04#ibcon#read 3, iclass 17, count 2 2006.229.13:46:02.04#ibcon#about to read 4, iclass 17, count 2 2006.229.13:46:02.04#ibcon#read 4, iclass 17, count 2 2006.229.13:46:02.04#ibcon#about to read 5, iclass 17, count 2 2006.229.13:46:02.04#ibcon#read 5, iclass 17, count 2 2006.229.13:46:02.04#ibcon#about to read 6, iclass 17, count 2 2006.229.13:46:02.04#ibcon#read 6, iclass 17, count 2 2006.229.13:46:02.04#ibcon#end of sib2, iclass 17, count 2 2006.229.13:46:02.04#ibcon#*mode == 0, iclass 17, count 2 2006.229.13:46:02.04#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.13:46:02.04#ibcon#[25=AT03-06\r\n] 2006.229.13:46:02.04#ibcon#*before write, iclass 17, count 2 2006.229.13:46:02.04#ibcon#enter sib2, iclass 17, count 2 2006.229.13:46:02.04#ibcon#flushed, iclass 17, count 2 2006.229.13:46:02.04#ibcon#about to write, iclass 17, count 2 2006.229.13:46:02.04#ibcon#wrote, iclass 17, count 2 2006.229.13:46:02.04#ibcon#about to read 3, iclass 17, count 2 2006.229.13:46:02.07#ibcon#read 3, iclass 17, count 2 2006.229.13:46:02.07#ibcon#about to read 4, iclass 17, count 2 2006.229.13:46:02.07#ibcon#read 4, iclass 17, count 2 2006.229.13:46:02.07#ibcon#about to read 5, iclass 17, count 2 2006.229.13:46:02.07#ibcon#read 5, iclass 17, count 2 2006.229.13:46:02.07#ibcon#about to read 6, iclass 17, count 2 2006.229.13:46:02.07#ibcon#read 6, iclass 17, count 2 2006.229.13:46:02.07#ibcon#end of sib2, iclass 17, count 2 2006.229.13:46:02.07#ibcon#*after write, iclass 17, count 2 2006.229.13:46:02.07#ibcon#*before return 0, iclass 17, count 2 2006.229.13:46:02.07#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:02.07#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:02.07#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.13:46:02.07#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:02.07#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:02.19#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:02.19#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:02.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:46:02.19#ibcon#first serial, iclass 17, count 0 2006.229.13:46:02.19#ibcon#enter sib2, iclass 17, count 0 2006.229.13:46:02.19#ibcon#flushed, iclass 17, count 0 2006.229.13:46:02.19#ibcon#about to write, iclass 17, count 0 2006.229.13:46:02.19#ibcon#wrote, iclass 17, count 0 2006.229.13:46:02.19#ibcon#about to read 3, iclass 17, count 0 2006.229.13:46:02.21#ibcon#read 3, iclass 17, count 0 2006.229.13:46:02.21#ibcon#about to read 4, iclass 17, count 0 2006.229.13:46:02.21#ibcon#read 4, iclass 17, count 0 2006.229.13:46:02.21#ibcon#about to read 5, iclass 17, count 0 2006.229.13:46:02.21#ibcon#read 5, iclass 17, count 0 2006.229.13:46:02.21#ibcon#about to read 6, iclass 17, count 0 2006.229.13:46:02.21#ibcon#read 6, iclass 17, count 0 2006.229.13:46:02.21#ibcon#end of sib2, iclass 17, count 0 2006.229.13:46:02.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:46:02.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:46:02.21#ibcon#[25=USB\r\n] 2006.229.13:46:02.21#ibcon#*before write, iclass 17, count 0 2006.229.13:46:02.21#ibcon#enter sib2, iclass 17, count 0 2006.229.13:46:02.21#ibcon#flushed, iclass 17, count 0 2006.229.13:46:02.21#ibcon#about to write, iclass 17, count 0 2006.229.13:46:02.21#ibcon#wrote, iclass 17, count 0 2006.229.13:46:02.21#ibcon#about to read 3, iclass 17, count 0 2006.229.13:46:02.24#ibcon#read 3, iclass 17, count 0 2006.229.13:46:02.24#ibcon#about to read 4, iclass 17, count 0 2006.229.13:46:02.24#ibcon#read 4, iclass 17, count 0 2006.229.13:46:02.24#ibcon#about to read 5, iclass 17, count 0 2006.229.13:46:02.24#ibcon#read 5, iclass 17, count 0 2006.229.13:46:02.24#ibcon#about to read 6, iclass 17, count 0 2006.229.13:46:02.24#ibcon#read 6, iclass 17, count 0 2006.229.13:46:02.24#ibcon#end of sib2, iclass 17, count 0 2006.229.13:46:02.24#ibcon#*after write, iclass 17, count 0 2006.229.13:46:02.24#ibcon#*before return 0, iclass 17, count 0 2006.229.13:46:02.24#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:02.24#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:02.24#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:46:02.24#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:46:02.24$vck44/valo=4,624.99 2006.229.13:46:02.24#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:46:02.24#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:46:02.24#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:02.24#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:02.24#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:02.24#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:02.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:46:02.24#ibcon#first serial, iclass 19, count 0 2006.229.13:46:02.24#ibcon#enter sib2, iclass 19, count 0 2006.229.13:46:02.24#ibcon#flushed, iclass 19, count 0 2006.229.13:46:02.24#ibcon#about to write, iclass 19, count 0 2006.229.13:46:02.24#ibcon#wrote, iclass 19, count 0 2006.229.13:46:02.24#ibcon#about to read 3, iclass 19, count 0 2006.229.13:46:02.26#ibcon#read 3, iclass 19, count 0 2006.229.13:46:02.26#ibcon#about to read 4, iclass 19, count 0 2006.229.13:46:02.26#ibcon#read 4, iclass 19, count 0 2006.229.13:46:02.26#ibcon#about to read 5, iclass 19, count 0 2006.229.13:46:02.26#ibcon#read 5, iclass 19, count 0 2006.229.13:46:02.26#ibcon#about to read 6, iclass 19, count 0 2006.229.13:46:02.26#ibcon#read 6, iclass 19, count 0 2006.229.13:46:02.26#ibcon#end of sib2, iclass 19, count 0 2006.229.13:46:02.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:46:02.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:46:02.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:46:02.26#ibcon#*before write, iclass 19, count 0 2006.229.13:46:02.26#ibcon#enter sib2, iclass 19, count 0 2006.229.13:46:02.26#ibcon#flushed, iclass 19, count 0 2006.229.13:46:02.26#ibcon#about to write, iclass 19, count 0 2006.229.13:46:02.26#ibcon#wrote, iclass 19, count 0 2006.229.13:46:02.26#ibcon#about to read 3, iclass 19, count 0 2006.229.13:46:02.30#ibcon#read 3, iclass 19, count 0 2006.229.13:46:02.30#ibcon#about to read 4, iclass 19, count 0 2006.229.13:46:02.30#ibcon#read 4, iclass 19, count 0 2006.229.13:46:02.30#ibcon#about to read 5, iclass 19, count 0 2006.229.13:46:02.30#ibcon#read 5, iclass 19, count 0 2006.229.13:46:02.30#ibcon#about to read 6, iclass 19, count 0 2006.229.13:46:02.30#ibcon#read 6, iclass 19, count 0 2006.229.13:46:02.30#ibcon#end of sib2, iclass 19, count 0 2006.229.13:46:02.30#ibcon#*after write, iclass 19, count 0 2006.229.13:46:02.30#ibcon#*before return 0, iclass 19, count 0 2006.229.13:46:02.30#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:02.30#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:02.30#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:46:02.30#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:46:02.30$vck44/va=4,7 2006.229.13:46:02.30#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:46:02.30#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:46:02.30#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:02.30#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:02.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:02.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:02.36#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:46:02.36#ibcon#first serial, iclass 21, count 2 2006.229.13:46:02.36#ibcon#enter sib2, iclass 21, count 2 2006.229.13:46:02.36#ibcon#flushed, iclass 21, count 2 2006.229.13:46:02.36#ibcon#about to write, iclass 21, count 2 2006.229.13:46:02.36#ibcon#wrote, iclass 21, count 2 2006.229.13:46:02.36#ibcon#about to read 3, iclass 21, count 2 2006.229.13:46:02.38#ibcon#read 3, iclass 21, count 2 2006.229.13:46:02.38#ibcon#about to read 4, iclass 21, count 2 2006.229.13:46:02.38#ibcon#read 4, iclass 21, count 2 2006.229.13:46:02.38#ibcon#about to read 5, iclass 21, count 2 2006.229.13:46:02.38#ibcon#read 5, iclass 21, count 2 2006.229.13:46:02.38#ibcon#about to read 6, iclass 21, count 2 2006.229.13:46:02.38#ibcon#read 6, iclass 21, count 2 2006.229.13:46:02.38#ibcon#end of sib2, iclass 21, count 2 2006.229.13:46:02.38#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:46:02.38#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:46:02.38#ibcon#[25=AT04-07\r\n] 2006.229.13:46:02.38#ibcon#*before write, iclass 21, count 2 2006.229.13:46:02.38#ibcon#enter sib2, iclass 21, count 2 2006.229.13:46:02.38#ibcon#flushed, iclass 21, count 2 2006.229.13:46:02.38#ibcon#about to write, iclass 21, count 2 2006.229.13:46:02.38#ibcon#wrote, iclass 21, count 2 2006.229.13:46:02.38#ibcon#about to read 3, iclass 21, count 2 2006.229.13:46:02.41#ibcon#read 3, iclass 21, count 2 2006.229.13:46:02.41#ibcon#about to read 4, iclass 21, count 2 2006.229.13:46:02.41#ibcon#read 4, iclass 21, count 2 2006.229.13:46:02.41#ibcon#about to read 5, iclass 21, count 2 2006.229.13:46:02.41#ibcon#read 5, iclass 21, count 2 2006.229.13:46:02.41#ibcon#about to read 6, iclass 21, count 2 2006.229.13:46:02.41#ibcon#read 6, iclass 21, count 2 2006.229.13:46:02.41#ibcon#end of sib2, iclass 21, count 2 2006.229.13:46:02.41#ibcon#*after write, iclass 21, count 2 2006.229.13:46:02.46#ibcon#*before return 0, iclass 21, count 2 2006.229.13:46:02.46#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:02.46#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:02.46#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:46:02.46#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:02.46#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:02.51#abcon#<5=/04 1.4 2.9 27.551001002.1\r\n> 2006.229.13:46:02.53#abcon#{5=INTERFACE CLEAR} 2006.229.13:46:02.58#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:02.58#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:02.58#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:46:02.58#ibcon#first serial, iclass 21, count 0 2006.229.13:46:02.58#ibcon#enter sib2, iclass 21, count 0 2006.229.13:46:02.58#ibcon#flushed, iclass 21, count 0 2006.229.13:46:02.58#ibcon#about to write, iclass 21, count 0 2006.229.13:46:02.58#ibcon#wrote, iclass 21, count 0 2006.229.13:46:02.58#ibcon#about to read 3, iclass 21, count 0 2006.229.13:46:02.59#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:46:02.60#ibcon#read 3, iclass 21, count 0 2006.229.13:46:02.60#ibcon#about to read 4, iclass 21, count 0 2006.229.13:46:02.60#ibcon#read 4, iclass 21, count 0 2006.229.13:46:02.60#ibcon#about to read 5, iclass 21, count 0 2006.229.13:46:02.60#ibcon#read 5, iclass 21, count 0 2006.229.13:46:02.60#ibcon#about to read 6, iclass 21, count 0 2006.229.13:46:02.60#ibcon#read 6, iclass 21, count 0 2006.229.13:46:02.60#ibcon#end of sib2, iclass 21, count 0 2006.229.13:46:02.60#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:46:02.60#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:46:02.60#ibcon#[25=USB\r\n] 2006.229.13:46:02.60#ibcon#*before write, iclass 21, count 0 2006.229.13:46:02.60#ibcon#enter sib2, iclass 21, count 0 2006.229.13:46:02.60#ibcon#flushed, iclass 21, count 0 2006.229.13:46:02.60#ibcon#about to write, iclass 21, count 0 2006.229.13:46:02.60#ibcon#wrote, iclass 21, count 0 2006.229.13:46:02.60#ibcon#about to read 3, iclass 21, count 0 2006.229.13:46:02.63#ibcon#read 3, iclass 21, count 0 2006.229.13:46:02.63#ibcon#about to read 4, iclass 21, count 0 2006.229.13:46:02.63#ibcon#read 4, iclass 21, count 0 2006.229.13:46:02.63#ibcon#about to read 5, iclass 21, count 0 2006.229.13:46:02.63#ibcon#read 5, iclass 21, count 0 2006.229.13:46:02.63#ibcon#about to read 6, iclass 21, count 0 2006.229.13:46:02.63#ibcon#read 6, iclass 21, count 0 2006.229.13:46:02.63#ibcon#end of sib2, iclass 21, count 0 2006.229.13:46:02.63#ibcon#*after write, iclass 21, count 0 2006.229.13:46:02.63#ibcon#*before return 0, iclass 21, count 0 2006.229.13:46:02.63#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:02.63#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:02.63#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:46:02.63#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:46:02.63$vck44/valo=5,734.99 2006.229.13:46:02.63#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:46:02.63#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:46:02.63#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:02.63#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:02.63#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:02.63#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:02.63#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:46:02.63#ibcon#first serial, iclass 27, count 0 2006.229.13:46:02.63#ibcon#enter sib2, iclass 27, count 0 2006.229.13:46:02.63#ibcon#flushed, iclass 27, count 0 2006.229.13:46:02.63#ibcon#about to write, iclass 27, count 0 2006.229.13:46:02.63#ibcon#wrote, iclass 27, count 0 2006.229.13:46:02.63#ibcon#about to read 3, iclass 27, count 0 2006.229.13:46:02.65#ibcon#read 3, iclass 27, count 0 2006.229.13:46:02.65#ibcon#about to read 4, iclass 27, count 0 2006.229.13:46:02.65#ibcon#read 4, iclass 27, count 0 2006.229.13:46:02.65#ibcon#about to read 5, iclass 27, count 0 2006.229.13:46:02.65#ibcon#read 5, iclass 27, count 0 2006.229.13:46:02.65#ibcon#about to read 6, iclass 27, count 0 2006.229.13:46:02.65#ibcon#read 6, iclass 27, count 0 2006.229.13:46:02.65#ibcon#end of sib2, iclass 27, count 0 2006.229.13:46:02.65#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:46:02.65#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:46:02.65#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:46:02.65#ibcon#*before write, iclass 27, count 0 2006.229.13:46:02.65#ibcon#enter sib2, iclass 27, count 0 2006.229.13:46:02.65#ibcon#flushed, iclass 27, count 0 2006.229.13:46:02.65#ibcon#about to write, iclass 27, count 0 2006.229.13:46:02.65#ibcon#wrote, iclass 27, count 0 2006.229.13:46:02.65#ibcon#about to read 3, iclass 27, count 0 2006.229.13:46:02.69#ibcon#read 3, iclass 27, count 0 2006.229.13:46:02.69#ibcon#about to read 4, iclass 27, count 0 2006.229.13:46:02.69#ibcon#read 4, iclass 27, count 0 2006.229.13:46:02.69#ibcon#about to read 5, iclass 27, count 0 2006.229.13:46:02.69#ibcon#read 5, iclass 27, count 0 2006.229.13:46:02.69#ibcon#about to read 6, iclass 27, count 0 2006.229.13:46:02.69#ibcon#read 6, iclass 27, count 0 2006.229.13:46:02.69#ibcon#end of sib2, iclass 27, count 0 2006.229.13:46:02.69#ibcon#*after write, iclass 27, count 0 2006.229.13:46:02.69#ibcon#*before return 0, iclass 27, count 0 2006.229.13:46:02.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:02.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:02.69#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:46:02.69#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:46:02.69$vck44/va=5,4 2006.229.13:46:02.69#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:46:02.69#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:46:02.69#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:02.69#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:02.75#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:02.75#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:02.75#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:46:02.75#ibcon#first serial, iclass 29, count 2 2006.229.13:46:02.75#ibcon#enter sib2, iclass 29, count 2 2006.229.13:46:02.75#ibcon#flushed, iclass 29, count 2 2006.229.13:46:02.75#ibcon#about to write, iclass 29, count 2 2006.229.13:46:02.75#ibcon#wrote, iclass 29, count 2 2006.229.13:46:02.75#ibcon#about to read 3, iclass 29, count 2 2006.229.13:46:02.77#ibcon#read 3, iclass 29, count 2 2006.229.13:46:02.77#ibcon#about to read 4, iclass 29, count 2 2006.229.13:46:02.77#ibcon#read 4, iclass 29, count 2 2006.229.13:46:02.77#ibcon#about to read 5, iclass 29, count 2 2006.229.13:46:02.77#ibcon#read 5, iclass 29, count 2 2006.229.13:46:02.77#ibcon#about to read 6, iclass 29, count 2 2006.229.13:46:02.77#ibcon#read 6, iclass 29, count 2 2006.229.13:46:02.77#ibcon#end of sib2, iclass 29, count 2 2006.229.13:46:02.77#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:46:02.77#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:46:02.77#ibcon#[25=AT05-04\r\n] 2006.229.13:46:02.77#ibcon#*before write, iclass 29, count 2 2006.229.13:46:02.77#ibcon#enter sib2, iclass 29, count 2 2006.229.13:46:02.77#ibcon#flushed, iclass 29, count 2 2006.229.13:46:02.77#ibcon#about to write, iclass 29, count 2 2006.229.13:46:02.77#ibcon#wrote, iclass 29, count 2 2006.229.13:46:02.77#ibcon#about to read 3, iclass 29, count 2 2006.229.13:46:02.80#ibcon#read 3, iclass 29, count 2 2006.229.13:46:02.80#ibcon#about to read 4, iclass 29, count 2 2006.229.13:46:02.80#ibcon#read 4, iclass 29, count 2 2006.229.13:46:02.80#ibcon#about to read 5, iclass 29, count 2 2006.229.13:46:02.80#ibcon#read 5, iclass 29, count 2 2006.229.13:46:02.80#ibcon#about to read 6, iclass 29, count 2 2006.229.13:46:02.80#ibcon#read 6, iclass 29, count 2 2006.229.13:46:02.80#ibcon#end of sib2, iclass 29, count 2 2006.229.13:46:02.80#ibcon#*after write, iclass 29, count 2 2006.229.13:46:02.80#ibcon#*before return 0, iclass 29, count 2 2006.229.13:46:02.80#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:02.80#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:02.80#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:46:02.80#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:02.80#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:02.92#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:02.92#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:02.92#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:46:02.92#ibcon#first serial, iclass 29, count 0 2006.229.13:46:02.92#ibcon#enter sib2, iclass 29, count 0 2006.229.13:46:02.92#ibcon#flushed, iclass 29, count 0 2006.229.13:46:02.92#ibcon#about to write, iclass 29, count 0 2006.229.13:46:02.92#ibcon#wrote, iclass 29, count 0 2006.229.13:46:02.92#ibcon#about to read 3, iclass 29, count 0 2006.229.13:46:02.94#ibcon#read 3, iclass 29, count 0 2006.229.13:46:02.94#ibcon#about to read 4, iclass 29, count 0 2006.229.13:46:02.94#ibcon#read 4, iclass 29, count 0 2006.229.13:46:02.94#ibcon#about to read 5, iclass 29, count 0 2006.229.13:46:02.94#ibcon#read 5, iclass 29, count 0 2006.229.13:46:02.94#ibcon#about to read 6, iclass 29, count 0 2006.229.13:46:02.94#ibcon#read 6, iclass 29, count 0 2006.229.13:46:02.94#ibcon#end of sib2, iclass 29, count 0 2006.229.13:46:02.94#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:46:02.94#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:46:02.94#ibcon#[25=USB\r\n] 2006.229.13:46:02.94#ibcon#*before write, iclass 29, count 0 2006.229.13:46:02.94#ibcon#enter sib2, iclass 29, count 0 2006.229.13:46:02.94#ibcon#flushed, iclass 29, count 0 2006.229.13:46:02.94#ibcon#about to write, iclass 29, count 0 2006.229.13:46:02.94#ibcon#wrote, iclass 29, count 0 2006.229.13:46:02.94#ibcon#about to read 3, iclass 29, count 0 2006.229.13:46:02.97#ibcon#read 3, iclass 29, count 0 2006.229.13:46:02.97#ibcon#about to read 4, iclass 29, count 0 2006.229.13:46:02.97#ibcon#read 4, iclass 29, count 0 2006.229.13:46:02.97#ibcon#about to read 5, iclass 29, count 0 2006.229.13:46:02.97#ibcon#read 5, iclass 29, count 0 2006.229.13:46:02.97#ibcon#about to read 6, iclass 29, count 0 2006.229.13:46:02.97#ibcon#read 6, iclass 29, count 0 2006.229.13:46:02.97#ibcon#end of sib2, iclass 29, count 0 2006.229.13:46:02.97#ibcon#*after write, iclass 29, count 0 2006.229.13:46:02.97#ibcon#*before return 0, iclass 29, count 0 2006.229.13:46:02.97#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:02.97#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:02.97#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:46:02.97#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:46:02.97$vck44/valo=6,814.99 2006.229.13:46:02.97#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:46:02.97#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:46:02.97#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:02.97#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:02.97#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:02.97#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:02.97#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:46:02.97#ibcon#first serial, iclass 31, count 0 2006.229.13:46:02.97#ibcon#enter sib2, iclass 31, count 0 2006.229.13:46:02.97#ibcon#flushed, iclass 31, count 0 2006.229.13:46:02.97#ibcon#about to write, iclass 31, count 0 2006.229.13:46:02.97#ibcon#wrote, iclass 31, count 0 2006.229.13:46:02.97#ibcon#about to read 3, iclass 31, count 0 2006.229.13:46:02.99#ibcon#read 3, iclass 31, count 0 2006.229.13:46:02.99#ibcon#about to read 4, iclass 31, count 0 2006.229.13:46:02.99#ibcon#read 4, iclass 31, count 0 2006.229.13:46:02.99#ibcon#about to read 5, iclass 31, count 0 2006.229.13:46:02.99#ibcon#read 5, iclass 31, count 0 2006.229.13:46:02.99#ibcon#about to read 6, iclass 31, count 0 2006.229.13:46:02.99#ibcon#read 6, iclass 31, count 0 2006.229.13:46:02.99#ibcon#end of sib2, iclass 31, count 0 2006.229.13:46:02.99#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:46:02.99#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:46:02.99#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:46:02.99#ibcon#*before write, iclass 31, count 0 2006.229.13:46:02.99#ibcon#enter sib2, iclass 31, count 0 2006.229.13:46:02.99#ibcon#flushed, iclass 31, count 0 2006.229.13:46:02.99#ibcon#about to write, iclass 31, count 0 2006.229.13:46:02.99#ibcon#wrote, iclass 31, count 0 2006.229.13:46:02.99#ibcon#about to read 3, iclass 31, count 0 2006.229.13:46:03.03#ibcon#read 3, iclass 31, count 0 2006.229.13:46:03.03#ibcon#about to read 4, iclass 31, count 0 2006.229.13:46:03.03#ibcon#read 4, iclass 31, count 0 2006.229.13:46:03.03#ibcon#about to read 5, iclass 31, count 0 2006.229.13:46:03.03#ibcon#read 5, iclass 31, count 0 2006.229.13:46:03.03#ibcon#about to read 6, iclass 31, count 0 2006.229.13:46:03.03#ibcon#read 6, iclass 31, count 0 2006.229.13:46:03.03#ibcon#end of sib2, iclass 31, count 0 2006.229.13:46:03.03#ibcon#*after write, iclass 31, count 0 2006.229.13:46:03.03#ibcon#*before return 0, iclass 31, count 0 2006.229.13:46:03.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:03.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:03.03#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:46:03.03#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:46:03.03$vck44/va=6,4 2006.229.13:46:03.03#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:46:03.03#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:46:03.03#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:03.03#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:03.09#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:03.09#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:03.09#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:46:03.09#ibcon#first serial, iclass 33, count 2 2006.229.13:46:03.09#ibcon#enter sib2, iclass 33, count 2 2006.229.13:46:03.09#ibcon#flushed, iclass 33, count 2 2006.229.13:46:03.09#ibcon#about to write, iclass 33, count 2 2006.229.13:46:03.09#ibcon#wrote, iclass 33, count 2 2006.229.13:46:03.09#ibcon#about to read 3, iclass 33, count 2 2006.229.13:46:03.11#ibcon#read 3, iclass 33, count 2 2006.229.13:46:03.11#ibcon#about to read 4, iclass 33, count 2 2006.229.13:46:03.11#ibcon#read 4, iclass 33, count 2 2006.229.13:46:03.11#ibcon#about to read 5, iclass 33, count 2 2006.229.13:46:03.11#ibcon#read 5, iclass 33, count 2 2006.229.13:46:03.11#ibcon#about to read 6, iclass 33, count 2 2006.229.13:46:03.11#ibcon#read 6, iclass 33, count 2 2006.229.13:46:03.11#ibcon#end of sib2, iclass 33, count 2 2006.229.13:46:03.11#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:46:03.11#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:46:03.11#ibcon#[25=AT06-04\r\n] 2006.229.13:46:03.11#ibcon#*before write, iclass 33, count 2 2006.229.13:46:03.11#ibcon#enter sib2, iclass 33, count 2 2006.229.13:46:03.11#ibcon#flushed, iclass 33, count 2 2006.229.13:46:03.11#ibcon#about to write, iclass 33, count 2 2006.229.13:46:03.11#ibcon#wrote, iclass 33, count 2 2006.229.13:46:03.11#ibcon#about to read 3, iclass 33, count 2 2006.229.13:46:03.14#ibcon#read 3, iclass 33, count 2 2006.229.13:46:03.14#ibcon#about to read 4, iclass 33, count 2 2006.229.13:46:03.14#ibcon#read 4, iclass 33, count 2 2006.229.13:46:03.14#ibcon#about to read 5, iclass 33, count 2 2006.229.13:46:03.14#ibcon#read 5, iclass 33, count 2 2006.229.13:46:03.14#ibcon#about to read 6, iclass 33, count 2 2006.229.13:46:03.14#ibcon#read 6, iclass 33, count 2 2006.229.13:46:03.14#ibcon#end of sib2, iclass 33, count 2 2006.229.13:46:03.14#ibcon#*after write, iclass 33, count 2 2006.229.13:46:03.14#ibcon#*before return 0, iclass 33, count 2 2006.229.13:46:03.14#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:03.14#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:03.14#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:46:03.14#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:03.14#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:03.26#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:03.26#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:03.26#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:46:03.26#ibcon#first serial, iclass 33, count 0 2006.229.13:46:03.26#ibcon#enter sib2, iclass 33, count 0 2006.229.13:46:03.26#ibcon#flushed, iclass 33, count 0 2006.229.13:46:03.26#ibcon#about to write, iclass 33, count 0 2006.229.13:46:03.26#ibcon#wrote, iclass 33, count 0 2006.229.13:46:03.26#ibcon#about to read 3, iclass 33, count 0 2006.229.13:46:03.28#ibcon#read 3, iclass 33, count 0 2006.229.13:46:03.28#ibcon#about to read 4, iclass 33, count 0 2006.229.13:46:03.28#ibcon#read 4, iclass 33, count 0 2006.229.13:46:03.28#ibcon#about to read 5, iclass 33, count 0 2006.229.13:46:03.28#ibcon#read 5, iclass 33, count 0 2006.229.13:46:03.28#ibcon#about to read 6, iclass 33, count 0 2006.229.13:46:03.28#ibcon#read 6, iclass 33, count 0 2006.229.13:46:03.28#ibcon#end of sib2, iclass 33, count 0 2006.229.13:46:03.28#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:46:03.28#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:46:03.28#ibcon#[25=USB\r\n] 2006.229.13:46:03.28#ibcon#*before write, iclass 33, count 0 2006.229.13:46:03.28#ibcon#enter sib2, iclass 33, count 0 2006.229.13:46:03.28#ibcon#flushed, iclass 33, count 0 2006.229.13:46:03.28#ibcon#about to write, iclass 33, count 0 2006.229.13:46:03.28#ibcon#wrote, iclass 33, count 0 2006.229.13:46:03.28#ibcon#about to read 3, iclass 33, count 0 2006.229.13:46:03.31#ibcon#read 3, iclass 33, count 0 2006.229.13:46:03.31#ibcon#about to read 4, iclass 33, count 0 2006.229.13:46:03.31#ibcon#read 4, iclass 33, count 0 2006.229.13:46:03.31#ibcon#about to read 5, iclass 33, count 0 2006.229.13:46:03.31#ibcon#read 5, iclass 33, count 0 2006.229.13:46:03.31#ibcon#about to read 6, iclass 33, count 0 2006.229.13:46:03.31#ibcon#read 6, iclass 33, count 0 2006.229.13:46:03.31#ibcon#end of sib2, iclass 33, count 0 2006.229.13:46:03.31#ibcon#*after write, iclass 33, count 0 2006.229.13:46:03.31#ibcon#*before return 0, iclass 33, count 0 2006.229.13:46:03.31#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:03.31#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:03.31#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:46:03.31#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:46:03.31$vck44/valo=7,864.99 2006.229.13:46:03.31#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:46:03.31#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:46:03.31#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:03.31#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:03.31#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:03.31#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:03.31#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:46:03.31#ibcon#first serial, iclass 35, count 0 2006.229.13:46:03.31#ibcon#enter sib2, iclass 35, count 0 2006.229.13:46:03.31#ibcon#flushed, iclass 35, count 0 2006.229.13:46:03.31#ibcon#about to write, iclass 35, count 0 2006.229.13:46:03.31#ibcon#wrote, iclass 35, count 0 2006.229.13:46:03.31#ibcon#about to read 3, iclass 35, count 0 2006.229.13:46:03.33#ibcon#read 3, iclass 35, count 0 2006.229.13:46:03.33#ibcon#about to read 4, iclass 35, count 0 2006.229.13:46:03.33#ibcon#read 4, iclass 35, count 0 2006.229.13:46:03.33#ibcon#about to read 5, iclass 35, count 0 2006.229.13:46:03.33#ibcon#read 5, iclass 35, count 0 2006.229.13:46:03.33#ibcon#about to read 6, iclass 35, count 0 2006.229.13:46:03.33#ibcon#read 6, iclass 35, count 0 2006.229.13:46:03.33#ibcon#end of sib2, iclass 35, count 0 2006.229.13:46:03.33#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:46:03.33#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:46:03.33#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:46:03.33#ibcon#*before write, iclass 35, count 0 2006.229.13:46:03.33#ibcon#enter sib2, iclass 35, count 0 2006.229.13:46:03.33#ibcon#flushed, iclass 35, count 0 2006.229.13:46:03.33#ibcon#about to write, iclass 35, count 0 2006.229.13:46:03.33#ibcon#wrote, iclass 35, count 0 2006.229.13:46:03.33#ibcon#about to read 3, iclass 35, count 0 2006.229.13:46:03.37#ibcon#read 3, iclass 35, count 0 2006.229.13:46:03.37#ibcon#about to read 4, iclass 35, count 0 2006.229.13:46:03.37#ibcon#read 4, iclass 35, count 0 2006.229.13:46:03.37#ibcon#about to read 5, iclass 35, count 0 2006.229.13:46:03.37#ibcon#read 5, iclass 35, count 0 2006.229.13:46:03.37#ibcon#about to read 6, iclass 35, count 0 2006.229.13:46:03.37#ibcon#read 6, iclass 35, count 0 2006.229.13:46:03.37#ibcon#end of sib2, iclass 35, count 0 2006.229.13:46:03.37#ibcon#*after write, iclass 35, count 0 2006.229.13:46:03.37#ibcon#*before return 0, iclass 35, count 0 2006.229.13:46:03.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:03.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:03.37#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:46:03.37#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:46:03.37$vck44/va=7,5 2006.229.13:46:03.37#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:46:03.37#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:46:03.37#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:03.37#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:03.43#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:03.43#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:03.43#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:46:03.43#ibcon#first serial, iclass 37, count 2 2006.229.13:46:03.43#ibcon#enter sib2, iclass 37, count 2 2006.229.13:46:03.43#ibcon#flushed, iclass 37, count 2 2006.229.13:46:03.43#ibcon#about to write, iclass 37, count 2 2006.229.13:46:03.43#ibcon#wrote, iclass 37, count 2 2006.229.13:46:03.43#ibcon#about to read 3, iclass 37, count 2 2006.229.13:46:03.45#ibcon#read 3, iclass 37, count 2 2006.229.13:46:03.45#ibcon#about to read 4, iclass 37, count 2 2006.229.13:46:03.45#ibcon#read 4, iclass 37, count 2 2006.229.13:46:03.45#ibcon#about to read 5, iclass 37, count 2 2006.229.13:46:03.45#ibcon#read 5, iclass 37, count 2 2006.229.13:46:03.45#ibcon#about to read 6, iclass 37, count 2 2006.229.13:46:03.45#ibcon#read 6, iclass 37, count 2 2006.229.13:46:03.45#ibcon#end of sib2, iclass 37, count 2 2006.229.13:46:03.45#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:46:03.45#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:46:03.45#ibcon#[25=AT07-05\r\n] 2006.229.13:46:03.45#ibcon#*before write, iclass 37, count 2 2006.229.13:46:03.45#ibcon#enter sib2, iclass 37, count 2 2006.229.13:46:03.45#ibcon#flushed, iclass 37, count 2 2006.229.13:46:03.45#ibcon#about to write, iclass 37, count 2 2006.229.13:46:03.45#ibcon#wrote, iclass 37, count 2 2006.229.13:46:03.45#ibcon#about to read 3, iclass 37, count 2 2006.229.13:46:03.48#ibcon#read 3, iclass 37, count 2 2006.229.13:46:03.48#ibcon#about to read 4, iclass 37, count 2 2006.229.13:46:03.48#ibcon#read 4, iclass 37, count 2 2006.229.13:46:03.48#ibcon#about to read 5, iclass 37, count 2 2006.229.13:46:03.48#ibcon#read 5, iclass 37, count 2 2006.229.13:46:03.48#ibcon#about to read 6, iclass 37, count 2 2006.229.13:46:03.48#ibcon#read 6, iclass 37, count 2 2006.229.13:46:03.48#ibcon#end of sib2, iclass 37, count 2 2006.229.13:46:03.48#ibcon#*after write, iclass 37, count 2 2006.229.13:46:03.48#ibcon#*before return 0, iclass 37, count 2 2006.229.13:46:03.48#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:03.48#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:03.48#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:46:03.48#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:03.48#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:03.60#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:03.60#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:03.60#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:46:03.60#ibcon#first serial, iclass 37, count 0 2006.229.13:46:03.60#ibcon#enter sib2, iclass 37, count 0 2006.229.13:46:03.60#ibcon#flushed, iclass 37, count 0 2006.229.13:46:03.60#ibcon#about to write, iclass 37, count 0 2006.229.13:46:03.60#ibcon#wrote, iclass 37, count 0 2006.229.13:46:03.60#ibcon#about to read 3, iclass 37, count 0 2006.229.13:46:03.62#ibcon#read 3, iclass 37, count 0 2006.229.13:46:03.62#ibcon#about to read 4, iclass 37, count 0 2006.229.13:46:03.62#ibcon#read 4, iclass 37, count 0 2006.229.13:46:03.62#ibcon#about to read 5, iclass 37, count 0 2006.229.13:46:03.62#ibcon#read 5, iclass 37, count 0 2006.229.13:46:03.62#ibcon#about to read 6, iclass 37, count 0 2006.229.13:46:03.62#ibcon#read 6, iclass 37, count 0 2006.229.13:46:03.62#ibcon#end of sib2, iclass 37, count 0 2006.229.13:46:03.62#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:46:03.62#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:46:03.62#ibcon#[25=USB\r\n] 2006.229.13:46:03.62#ibcon#*before write, iclass 37, count 0 2006.229.13:46:03.62#ibcon#enter sib2, iclass 37, count 0 2006.229.13:46:03.62#ibcon#flushed, iclass 37, count 0 2006.229.13:46:03.62#ibcon#about to write, iclass 37, count 0 2006.229.13:46:03.62#ibcon#wrote, iclass 37, count 0 2006.229.13:46:03.62#ibcon#about to read 3, iclass 37, count 0 2006.229.13:46:03.65#ibcon#read 3, iclass 37, count 0 2006.229.13:46:03.65#ibcon#about to read 4, iclass 37, count 0 2006.229.13:46:03.65#ibcon#read 4, iclass 37, count 0 2006.229.13:46:03.65#ibcon#about to read 5, iclass 37, count 0 2006.229.13:46:03.65#ibcon#read 5, iclass 37, count 0 2006.229.13:46:03.65#ibcon#about to read 6, iclass 37, count 0 2006.229.13:46:03.65#ibcon#read 6, iclass 37, count 0 2006.229.13:46:03.65#ibcon#end of sib2, iclass 37, count 0 2006.229.13:46:03.65#ibcon#*after write, iclass 37, count 0 2006.229.13:46:03.65#ibcon#*before return 0, iclass 37, count 0 2006.229.13:46:03.65#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:03.65#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:03.65#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:46:03.65#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:46:03.65$vck44/valo=8,884.99 2006.229.13:46:03.65#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:46:03.65#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:46:03.65#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:03.65#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:03.65#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:03.65#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:03.65#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:46:03.65#ibcon#first serial, iclass 39, count 0 2006.229.13:46:03.65#ibcon#enter sib2, iclass 39, count 0 2006.229.13:46:03.65#ibcon#flushed, iclass 39, count 0 2006.229.13:46:03.65#ibcon#about to write, iclass 39, count 0 2006.229.13:46:03.65#ibcon#wrote, iclass 39, count 0 2006.229.13:46:03.65#ibcon#about to read 3, iclass 39, count 0 2006.229.13:46:03.67#ibcon#read 3, iclass 39, count 0 2006.229.13:46:03.67#ibcon#about to read 4, iclass 39, count 0 2006.229.13:46:03.67#ibcon#read 4, iclass 39, count 0 2006.229.13:46:03.67#ibcon#about to read 5, iclass 39, count 0 2006.229.13:46:03.67#ibcon#read 5, iclass 39, count 0 2006.229.13:46:03.67#ibcon#about to read 6, iclass 39, count 0 2006.229.13:46:03.67#ibcon#read 6, iclass 39, count 0 2006.229.13:46:03.67#ibcon#end of sib2, iclass 39, count 0 2006.229.13:46:03.67#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:46:03.67#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:46:03.67#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:46:03.67#ibcon#*before write, iclass 39, count 0 2006.229.13:46:03.67#ibcon#enter sib2, iclass 39, count 0 2006.229.13:46:03.67#ibcon#flushed, iclass 39, count 0 2006.229.13:46:03.67#ibcon#about to write, iclass 39, count 0 2006.229.13:46:03.67#ibcon#wrote, iclass 39, count 0 2006.229.13:46:03.67#ibcon#about to read 3, iclass 39, count 0 2006.229.13:46:03.71#ibcon#read 3, iclass 39, count 0 2006.229.13:46:03.71#ibcon#about to read 4, iclass 39, count 0 2006.229.13:46:03.71#ibcon#read 4, iclass 39, count 0 2006.229.13:46:03.71#ibcon#about to read 5, iclass 39, count 0 2006.229.13:46:03.71#ibcon#read 5, iclass 39, count 0 2006.229.13:46:03.71#ibcon#about to read 6, iclass 39, count 0 2006.229.13:46:03.71#ibcon#read 6, iclass 39, count 0 2006.229.13:46:03.71#ibcon#end of sib2, iclass 39, count 0 2006.229.13:46:03.71#ibcon#*after write, iclass 39, count 0 2006.229.13:46:03.71#ibcon#*before return 0, iclass 39, count 0 2006.229.13:46:03.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:03.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:03.71#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:46:03.71#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:46:03.71$vck44/va=8,6 2006.229.13:46:03.71#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.13:46:03.71#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.13:46:03.71#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:03.71#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:46:03.77#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:46:03.77#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:46:03.77#ibcon#enter wrdev, iclass 3, count 2 2006.229.13:46:03.77#ibcon#first serial, iclass 3, count 2 2006.229.13:46:03.77#ibcon#enter sib2, iclass 3, count 2 2006.229.13:46:03.77#ibcon#flushed, iclass 3, count 2 2006.229.13:46:03.77#ibcon#about to write, iclass 3, count 2 2006.229.13:46:03.77#ibcon#wrote, iclass 3, count 2 2006.229.13:46:03.77#ibcon#about to read 3, iclass 3, count 2 2006.229.13:46:03.79#ibcon#read 3, iclass 3, count 2 2006.229.13:46:03.79#ibcon#about to read 4, iclass 3, count 2 2006.229.13:46:03.79#ibcon#read 4, iclass 3, count 2 2006.229.13:46:03.79#ibcon#about to read 5, iclass 3, count 2 2006.229.13:46:03.79#ibcon#read 5, iclass 3, count 2 2006.229.13:46:03.79#ibcon#about to read 6, iclass 3, count 2 2006.229.13:46:03.79#ibcon#read 6, iclass 3, count 2 2006.229.13:46:03.79#ibcon#end of sib2, iclass 3, count 2 2006.229.13:46:03.79#ibcon#*mode == 0, iclass 3, count 2 2006.229.13:46:03.79#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.13:46:03.79#ibcon#[25=AT08-06\r\n] 2006.229.13:46:03.79#ibcon#*before write, iclass 3, count 2 2006.229.13:46:03.79#ibcon#enter sib2, iclass 3, count 2 2006.229.13:46:03.79#ibcon#flushed, iclass 3, count 2 2006.229.13:46:03.79#ibcon#about to write, iclass 3, count 2 2006.229.13:46:03.79#ibcon#wrote, iclass 3, count 2 2006.229.13:46:03.79#ibcon#about to read 3, iclass 3, count 2 2006.229.13:46:03.82#ibcon#read 3, iclass 3, count 2 2006.229.13:46:03.82#ibcon#about to read 4, iclass 3, count 2 2006.229.13:46:03.82#ibcon#read 4, iclass 3, count 2 2006.229.13:46:03.82#ibcon#about to read 5, iclass 3, count 2 2006.229.13:46:03.82#ibcon#read 5, iclass 3, count 2 2006.229.13:46:03.82#ibcon#about to read 6, iclass 3, count 2 2006.229.13:46:03.82#ibcon#read 6, iclass 3, count 2 2006.229.13:46:03.82#ibcon#end of sib2, iclass 3, count 2 2006.229.13:46:03.82#ibcon#*after write, iclass 3, count 2 2006.229.13:46:03.82#ibcon#*before return 0, iclass 3, count 2 2006.229.13:46:03.82#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:46:03.82#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:46:03.82#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.13:46:03.82#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:03.82#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:46:03.94#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:46:03.94#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:46:03.94#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:46:03.94#ibcon#first serial, iclass 3, count 0 2006.229.13:46:03.94#ibcon#enter sib2, iclass 3, count 0 2006.229.13:46:03.94#ibcon#flushed, iclass 3, count 0 2006.229.13:46:03.94#ibcon#about to write, iclass 3, count 0 2006.229.13:46:03.94#ibcon#wrote, iclass 3, count 0 2006.229.13:46:03.94#ibcon#about to read 3, iclass 3, count 0 2006.229.13:46:03.96#ibcon#read 3, iclass 3, count 0 2006.229.13:46:03.96#ibcon#about to read 4, iclass 3, count 0 2006.229.13:46:03.96#ibcon#read 4, iclass 3, count 0 2006.229.13:46:03.96#ibcon#about to read 5, iclass 3, count 0 2006.229.13:46:03.96#ibcon#read 5, iclass 3, count 0 2006.229.13:46:03.96#ibcon#about to read 6, iclass 3, count 0 2006.229.13:46:03.96#ibcon#read 6, iclass 3, count 0 2006.229.13:46:03.96#ibcon#end of sib2, iclass 3, count 0 2006.229.13:46:03.96#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:46:03.96#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:46:03.96#ibcon#[25=USB\r\n] 2006.229.13:46:03.96#ibcon#*before write, iclass 3, count 0 2006.229.13:46:03.96#ibcon#enter sib2, iclass 3, count 0 2006.229.13:46:03.96#ibcon#flushed, iclass 3, count 0 2006.229.13:46:03.96#ibcon#about to write, iclass 3, count 0 2006.229.13:46:03.96#ibcon#wrote, iclass 3, count 0 2006.229.13:46:03.96#ibcon#about to read 3, iclass 3, count 0 2006.229.13:46:03.99#ibcon#read 3, iclass 3, count 0 2006.229.13:46:03.99#ibcon#about to read 4, iclass 3, count 0 2006.229.13:46:03.99#ibcon#read 4, iclass 3, count 0 2006.229.13:46:03.99#ibcon#about to read 5, iclass 3, count 0 2006.229.13:46:03.99#ibcon#read 5, iclass 3, count 0 2006.229.13:46:03.99#ibcon#about to read 6, iclass 3, count 0 2006.229.13:46:03.99#ibcon#read 6, iclass 3, count 0 2006.229.13:46:03.99#ibcon#end of sib2, iclass 3, count 0 2006.229.13:46:03.99#ibcon#*after write, iclass 3, count 0 2006.229.13:46:03.99#ibcon#*before return 0, iclass 3, count 0 2006.229.13:46:03.99#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:46:03.99#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:46:03.99#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:46:03.99#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:46:03.99$vck44/vblo=1,629.99 2006.229.13:46:03.99#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:46:03.99#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:46:03.99#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:03.99#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:03.99#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:03.99#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:03.99#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:46:03.99#ibcon#first serial, iclass 5, count 0 2006.229.13:46:03.99#ibcon#enter sib2, iclass 5, count 0 2006.229.13:46:03.99#ibcon#flushed, iclass 5, count 0 2006.229.13:46:03.99#ibcon#about to write, iclass 5, count 0 2006.229.13:46:03.99#ibcon#wrote, iclass 5, count 0 2006.229.13:46:03.99#ibcon#about to read 3, iclass 5, count 0 2006.229.13:46:04.01#ibcon#read 3, iclass 5, count 0 2006.229.13:46:04.01#ibcon#about to read 4, iclass 5, count 0 2006.229.13:46:04.01#ibcon#read 4, iclass 5, count 0 2006.229.13:46:04.01#ibcon#about to read 5, iclass 5, count 0 2006.229.13:46:04.01#ibcon#read 5, iclass 5, count 0 2006.229.13:46:04.01#ibcon#about to read 6, iclass 5, count 0 2006.229.13:46:04.01#ibcon#read 6, iclass 5, count 0 2006.229.13:46:04.01#ibcon#end of sib2, iclass 5, count 0 2006.229.13:46:04.01#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:46:04.01#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:46:04.01#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:46:04.01#ibcon#*before write, iclass 5, count 0 2006.229.13:46:04.01#ibcon#enter sib2, iclass 5, count 0 2006.229.13:46:04.01#ibcon#flushed, iclass 5, count 0 2006.229.13:46:04.01#ibcon#about to write, iclass 5, count 0 2006.229.13:46:04.01#ibcon#wrote, iclass 5, count 0 2006.229.13:46:04.01#ibcon#about to read 3, iclass 5, count 0 2006.229.13:46:04.05#ibcon#read 3, iclass 5, count 0 2006.229.13:46:04.05#ibcon#about to read 4, iclass 5, count 0 2006.229.13:46:04.05#ibcon#read 4, iclass 5, count 0 2006.229.13:46:04.05#ibcon#about to read 5, iclass 5, count 0 2006.229.13:46:04.05#ibcon#read 5, iclass 5, count 0 2006.229.13:46:04.05#ibcon#about to read 6, iclass 5, count 0 2006.229.13:46:04.05#ibcon#read 6, iclass 5, count 0 2006.229.13:46:04.05#ibcon#end of sib2, iclass 5, count 0 2006.229.13:46:04.05#ibcon#*after write, iclass 5, count 0 2006.229.13:46:04.05#ibcon#*before return 0, iclass 5, count 0 2006.229.13:46:04.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:04.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:46:04.05#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:46:04.05#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:46:04.05$vck44/vb=1,4 2006.229.13:46:04.05#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:46:04.05#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:46:04.05#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:04.05#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:04.05#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:04.05#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:04.05#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:46:04.05#ibcon#first serial, iclass 7, count 2 2006.229.13:46:04.05#ibcon#enter sib2, iclass 7, count 2 2006.229.13:46:04.05#ibcon#flushed, iclass 7, count 2 2006.229.13:46:04.05#ibcon#about to write, iclass 7, count 2 2006.229.13:46:04.05#ibcon#wrote, iclass 7, count 2 2006.229.13:46:04.05#ibcon#about to read 3, iclass 7, count 2 2006.229.13:46:04.07#ibcon#read 3, iclass 7, count 2 2006.229.13:46:04.07#ibcon#about to read 4, iclass 7, count 2 2006.229.13:46:04.07#ibcon#read 4, iclass 7, count 2 2006.229.13:46:04.07#ibcon#about to read 5, iclass 7, count 2 2006.229.13:46:04.07#ibcon#read 5, iclass 7, count 2 2006.229.13:46:04.07#ibcon#about to read 6, iclass 7, count 2 2006.229.13:46:04.07#ibcon#read 6, iclass 7, count 2 2006.229.13:46:04.07#ibcon#end of sib2, iclass 7, count 2 2006.229.13:46:04.07#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:46:04.07#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:46:04.07#ibcon#[27=AT01-04\r\n] 2006.229.13:46:04.07#ibcon#*before write, iclass 7, count 2 2006.229.13:46:04.07#ibcon#enter sib2, iclass 7, count 2 2006.229.13:46:04.07#ibcon#flushed, iclass 7, count 2 2006.229.13:46:04.07#ibcon#about to write, iclass 7, count 2 2006.229.13:46:04.07#ibcon#wrote, iclass 7, count 2 2006.229.13:46:04.07#ibcon#about to read 3, iclass 7, count 2 2006.229.13:46:04.10#ibcon#read 3, iclass 7, count 2 2006.229.13:46:04.10#ibcon#about to read 4, iclass 7, count 2 2006.229.13:46:04.10#ibcon#read 4, iclass 7, count 2 2006.229.13:46:04.10#ibcon#about to read 5, iclass 7, count 2 2006.229.13:46:04.10#ibcon#read 5, iclass 7, count 2 2006.229.13:46:04.10#ibcon#about to read 6, iclass 7, count 2 2006.229.13:46:04.10#ibcon#read 6, iclass 7, count 2 2006.229.13:46:04.10#ibcon#end of sib2, iclass 7, count 2 2006.229.13:46:04.10#ibcon#*after write, iclass 7, count 2 2006.229.13:46:04.10#ibcon#*before return 0, iclass 7, count 2 2006.229.13:46:04.10#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:04.10#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:46:04.10#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:46:04.10#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:04.10#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:04.22#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:04.22#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:04.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:46:04.22#ibcon#first serial, iclass 7, count 0 2006.229.13:46:04.22#ibcon#enter sib2, iclass 7, count 0 2006.229.13:46:04.22#ibcon#flushed, iclass 7, count 0 2006.229.13:46:04.22#ibcon#about to write, iclass 7, count 0 2006.229.13:46:04.22#ibcon#wrote, iclass 7, count 0 2006.229.13:46:04.22#ibcon#about to read 3, iclass 7, count 0 2006.229.13:46:04.24#ibcon#read 3, iclass 7, count 0 2006.229.13:46:04.24#ibcon#about to read 4, iclass 7, count 0 2006.229.13:46:04.24#ibcon#read 4, iclass 7, count 0 2006.229.13:46:04.24#ibcon#about to read 5, iclass 7, count 0 2006.229.13:46:04.24#ibcon#read 5, iclass 7, count 0 2006.229.13:46:04.24#ibcon#about to read 6, iclass 7, count 0 2006.229.13:46:04.24#ibcon#read 6, iclass 7, count 0 2006.229.13:46:04.24#ibcon#end of sib2, iclass 7, count 0 2006.229.13:46:04.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:46:04.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:46:04.24#ibcon#[27=USB\r\n] 2006.229.13:46:04.24#ibcon#*before write, iclass 7, count 0 2006.229.13:46:04.24#ibcon#enter sib2, iclass 7, count 0 2006.229.13:46:04.24#ibcon#flushed, iclass 7, count 0 2006.229.13:46:04.24#ibcon#about to write, iclass 7, count 0 2006.229.13:46:04.24#ibcon#wrote, iclass 7, count 0 2006.229.13:46:04.24#ibcon#about to read 3, iclass 7, count 0 2006.229.13:46:04.27#ibcon#read 3, iclass 7, count 0 2006.229.13:46:04.27#ibcon#about to read 4, iclass 7, count 0 2006.229.13:46:04.27#ibcon#read 4, iclass 7, count 0 2006.229.13:46:04.27#ibcon#about to read 5, iclass 7, count 0 2006.229.13:46:04.27#ibcon#read 5, iclass 7, count 0 2006.229.13:46:04.27#ibcon#about to read 6, iclass 7, count 0 2006.229.13:46:04.27#ibcon#read 6, iclass 7, count 0 2006.229.13:46:04.27#ibcon#end of sib2, iclass 7, count 0 2006.229.13:46:04.27#ibcon#*after write, iclass 7, count 0 2006.229.13:46:04.27#ibcon#*before return 0, iclass 7, count 0 2006.229.13:46:04.27#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:04.27#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:46:04.27#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:46:04.27#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:46:04.27$vck44/vblo=2,634.99 2006.229.13:46:04.27#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:46:04.27#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:46:04.27#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:04.27#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:04.27#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:04.27#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:04.27#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:46:04.27#ibcon#first serial, iclass 11, count 0 2006.229.13:46:04.27#ibcon#enter sib2, iclass 11, count 0 2006.229.13:46:04.27#ibcon#flushed, iclass 11, count 0 2006.229.13:46:04.27#ibcon#about to write, iclass 11, count 0 2006.229.13:46:04.27#ibcon#wrote, iclass 11, count 0 2006.229.13:46:04.27#ibcon#about to read 3, iclass 11, count 0 2006.229.13:46:04.29#ibcon#read 3, iclass 11, count 0 2006.229.13:46:04.29#ibcon#about to read 4, iclass 11, count 0 2006.229.13:46:04.29#ibcon#read 4, iclass 11, count 0 2006.229.13:46:04.29#ibcon#about to read 5, iclass 11, count 0 2006.229.13:46:04.29#ibcon#read 5, iclass 11, count 0 2006.229.13:46:04.29#ibcon#about to read 6, iclass 11, count 0 2006.229.13:46:04.29#ibcon#read 6, iclass 11, count 0 2006.229.13:46:04.29#ibcon#end of sib2, iclass 11, count 0 2006.229.13:46:04.29#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:46:04.29#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:46:04.29#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:46:04.29#ibcon#*before write, iclass 11, count 0 2006.229.13:46:04.29#ibcon#enter sib2, iclass 11, count 0 2006.229.13:46:04.29#ibcon#flushed, iclass 11, count 0 2006.229.13:46:04.29#ibcon#about to write, iclass 11, count 0 2006.229.13:46:04.29#ibcon#wrote, iclass 11, count 0 2006.229.13:46:04.29#ibcon#about to read 3, iclass 11, count 0 2006.229.13:46:04.33#ibcon#read 3, iclass 11, count 0 2006.229.13:46:04.33#ibcon#about to read 4, iclass 11, count 0 2006.229.13:46:04.33#ibcon#read 4, iclass 11, count 0 2006.229.13:46:04.33#ibcon#about to read 5, iclass 11, count 0 2006.229.13:46:04.33#ibcon#read 5, iclass 11, count 0 2006.229.13:46:04.33#ibcon#about to read 6, iclass 11, count 0 2006.229.13:46:04.33#ibcon#read 6, iclass 11, count 0 2006.229.13:46:04.33#ibcon#end of sib2, iclass 11, count 0 2006.229.13:46:04.33#ibcon#*after write, iclass 11, count 0 2006.229.13:46:04.33#ibcon#*before return 0, iclass 11, count 0 2006.229.13:46:04.33#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:04.33#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:46:04.33#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:46:04.33#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:46:04.33$vck44/vb=2,4 2006.229.13:46:04.33#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.13:46:04.33#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.13:46:04.33#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:04.33#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:04.39#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:04.39#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:04.39#ibcon#enter wrdev, iclass 13, count 2 2006.229.13:46:04.39#ibcon#first serial, iclass 13, count 2 2006.229.13:46:04.39#ibcon#enter sib2, iclass 13, count 2 2006.229.13:46:04.39#ibcon#flushed, iclass 13, count 2 2006.229.13:46:04.39#ibcon#about to write, iclass 13, count 2 2006.229.13:46:04.39#ibcon#wrote, iclass 13, count 2 2006.229.13:46:04.39#ibcon#about to read 3, iclass 13, count 2 2006.229.13:46:04.41#ibcon#read 3, iclass 13, count 2 2006.229.13:46:04.41#ibcon#about to read 4, iclass 13, count 2 2006.229.13:46:04.41#ibcon#read 4, iclass 13, count 2 2006.229.13:46:04.41#ibcon#about to read 5, iclass 13, count 2 2006.229.13:46:04.41#ibcon#read 5, iclass 13, count 2 2006.229.13:46:04.41#ibcon#about to read 6, iclass 13, count 2 2006.229.13:46:04.41#ibcon#read 6, iclass 13, count 2 2006.229.13:46:04.41#ibcon#end of sib2, iclass 13, count 2 2006.229.13:46:04.41#ibcon#*mode == 0, iclass 13, count 2 2006.229.13:46:04.41#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.13:46:04.41#ibcon#[27=AT02-04\r\n] 2006.229.13:46:04.41#ibcon#*before write, iclass 13, count 2 2006.229.13:46:04.41#ibcon#enter sib2, iclass 13, count 2 2006.229.13:46:04.41#ibcon#flushed, iclass 13, count 2 2006.229.13:46:04.41#ibcon#about to write, iclass 13, count 2 2006.229.13:46:04.41#ibcon#wrote, iclass 13, count 2 2006.229.13:46:04.41#ibcon#about to read 3, iclass 13, count 2 2006.229.13:46:04.44#ibcon#read 3, iclass 13, count 2 2006.229.13:46:04.44#ibcon#about to read 4, iclass 13, count 2 2006.229.13:46:04.44#ibcon#read 4, iclass 13, count 2 2006.229.13:46:04.44#ibcon#about to read 5, iclass 13, count 2 2006.229.13:46:04.44#ibcon#read 5, iclass 13, count 2 2006.229.13:46:04.44#ibcon#about to read 6, iclass 13, count 2 2006.229.13:46:04.44#ibcon#read 6, iclass 13, count 2 2006.229.13:46:04.44#ibcon#end of sib2, iclass 13, count 2 2006.229.13:46:04.44#ibcon#*after write, iclass 13, count 2 2006.229.13:46:04.44#ibcon#*before return 0, iclass 13, count 2 2006.229.13:46:04.44#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:04.44#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:46:04.44#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.13:46:04.44#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:04.44#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:04.56#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:04.56#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:04.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:46:04.56#ibcon#first serial, iclass 13, count 0 2006.229.13:46:04.56#ibcon#enter sib2, iclass 13, count 0 2006.229.13:46:04.56#ibcon#flushed, iclass 13, count 0 2006.229.13:46:04.56#ibcon#about to write, iclass 13, count 0 2006.229.13:46:04.56#ibcon#wrote, iclass 13, count 0 2006.229.13:46:04.56#ibcon#about to read 3, iclass 13, count 0 2006.229.13:46:04.58#ibcon#read 3, iclass 13, count 0 2006.229.13:46:04.58#ibcon#about to read 4, iclass 13, count 0 2006.229.13:46:04.58#ibcon#read 4, iclass 13, count 0 2006.229.13:46:04.58#ibcon#about to read 5, iclass 13, count 0 2006.229.13:46:04.58#ibcon#read 5, iclass 13, count 0 2006.229.13:46:04.58#ibcon#about to read 6, iclass 13, count 0 2006.229.13:46:04.58#ibcon#read 6, iclass 13, count 0 2006.229.13:46:04.58#ibcon#end of sib2, iclass 13, count 0 2006.229.13:46:04.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:46:04.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:46:04.58#ibcon#[27=USB\r\n] 2006.229.13:46:04.58#ibcon#*before write, iclass 13, count 0 2006.229.13:46:04.58#ibcon#enter sib2, iclass 13, count 0 2006.229.13:46:04.58#ibcon#flushed, iclass 13, count 0 2006.229.13:46:04.58#ibcon#about to write, iclass 13, count 0 2006.229.13:46:04.58#ibcon#wrote, iclass 13, count 0 2006.229.13:46:04.58#ibcon#about to read 3, iclass 13, count 0 2006.229.13:46:04.61#ibcon#read 3, iclass 13, count 0 2006.229.13:46:04.61#ibcon#about to read 4, iclass 13, count 0 2006.229.13:46:04.61#ibcon#read 4, iclass 13, count 0 2006.229.13:46:04.61#ibcon#about to read 5, iclass 13, count 0 2006.229.13:46:04.61#ibcon#read 5, iclass 13, count 0 2006.229.13:46:04.61#ibcon#about to read 6, iclass 13, count 0 2006.229.13:46:04.61#ibcon#read 6, iclass 13, count 0 2006.229.13:46:04.61#ibcon#end of sib2, iclass 13, count 0 2006.229.13:46:04.61#ibcon#*after write, iclass 13, count 0 2006.229.13:46:04.61#ibcon#*before return 0, iclass 13, count 0 2006.229.13:46:04.61#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:04.61#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:46:04.61#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:46:04.61#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:46:04.61$vck44/vblo=3,649.99 2006.229.13:46:04.61#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.13:46:04.61#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.13:46:04.61#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:04.61#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:04.61#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:04.61#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:04.61#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:46:04.61#ibcon#first serial, iclass 15, count 0 2006.229.13:46:04.61#ibcon#enter sib2, iclass 15, count 0 2006.229.13:46:04.61#ibcon#flushed, iclass 15, count 0 2006.229.13:46:04.61#ibcon#about to write, iclass 15, count 0 2006.229.13:46:04.61#ibcon#wrote, iclass 15, count 0 2006.229.13:46:04.61#ibcon#about to read 3, iclass 15, count 0 2006.229.13:46:04.63#ibcon#read 3, iclass 15, count 0 2006.229.13:46:04.63#ibcon#about to read 4, iclass 15, count 0 2006.229.13:46:04.63#ibcon#read 4, iclass 15, count 0 2006.229.13:46:04.63#ibcon#about to read 5, iclass 15, count 0 2006.229.13:46:04.63#ibcon#read 5, iclass 15, count 0 2006.229.13:46:04.63#ibcon#about to read 6, iclass 15, count 0 2006.229.13:46:04.63#ibcon#read 6, iclass 15, count 0 2006.229.13:46:04.63#ibcon#end of sib2, iclass 15, count 0 2006.229.13:46:04.63#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:46:04.63#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:46:04.63#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:46:04.63#ibcon#*before write, iclass 15, count 0 2006.229.13:46:04.63#ibcon#enter sib2, iclass 15, count 0 2006.229.13:46:04.63#ibcon#flushed, iclass 15, count 0 2006.229.13:46:04.63#ibcon#about to write, iclass 15, count 0 2006.229.13:46:04.63#ibcon#wrote, iclass 15, count 0 2006.229.13:46:04.63#ibcon#about to read 3, iclass 15, count 0 2006.229.13:46:04.67#ibcon#read 3, iclass 15, count 0 2006.229.13:46:04.67#ibcon#about to read 4, iclass 15, count 0 2006.229.13:46:04.67#ibcon#read 4, iclass 15, count 0 2006.229.13:46:04.67#ibcon#about to read 5, iclass 15, count 0 2006.229.13:46:04.67#ibcon#read 5, iclass 15, count 0 2006.229.13:46:04.67#ibcon#about to read 6, iclass 15, count 0 2006.229.13:46:04.67#ibcon#read 6, iclass 15, count 0 2006.229.13:46:04.67#ibcon#end of sib2, iclass 15, count 0 2006.229.13:46:04.67#ibcon#*after write, iclass 15, count 0 2006.229.13:46:04.67#ibcon#*before return 0, iclass 15, count 0 2006.229.13:46:04.67#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:04.67#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:46:04.67#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:46:04.67#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:46:04.67$vck44/vb=3,4 2006.229.13:46:04.67#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.13:46:04.67#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.13:46:04.67#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:04.67#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:04.73#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:04.73#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:04.73#ibcon#enter wrdev, iclass 17, count 2 2006.229.13:46:04.73#ibcon#first serial, iclass 17, count 2 2006.229.13:46:04.73#ibcon#enter sib2, iclass 17, count 2 2006.229.13:46:04.73#ibcon#flushed, iclass 17, count 2 2006.229.13:46:04.73#ibcon#about to write, iclass 17, count 2 2006.229.13:46:04.73#ibcon#wrote, iclass 17, count 2 2006.229.13:46:04.73#ibcon#about to read 3, iclass 17, count 2 2006.229.13:46:04.75#ibcon#read 3, iclass 17, count 2 2006.229.13:46:04.75#ibcon#about to read 4, iclass 17, count 2 2006.229.13:46:04.75#ibcon#read 4, iclass 17, count 2 2006.229.13:46:04.75#ibcon#about to read 5, iclass 17, count 2 2006.229.13:46:04.75#ibcon#read 5, iclass 17, count 2 2006.229.13:46:04.75#ibcon#about to read 6, iclass 17, count 2 2006.229.13:46:04.75#ibcon#read 6, iclass 17, count 2 2006.229.13:46:04.75#ibcon#end of sib2, iclass 17, count 2 2006.229.13:46:04.75#ibcon#*mode == 0, iclass 17, count 2 2006.229.13:46:04.75#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.13:46:04.75#ibcon#[27=AT03-04\r\n] 2006.229.13:46:04.75#ibcon#*before write, iclass 17, count 2 2006.229.13:46:04.75#ibcon#enter sib2, iclass 17, count 2 2006.229.13:46:04.75#ibcon#flushed, iclass 17, count 2 2006.229.13:46:04.75#ibcon#about to write, iclass 17, count 2 2006.229.13:46:04.75#ibcon#wrote, iclass 17, count 2 2006.229.13:46:04.75#ibcon#about to read 3, iclass 17, count 2 2006.229.13:46:04.78#ibcon#read 3, iclass 17, count 2 2006.229.13:46:04.78#ibcon#about to read 4, iclass 17, count 2 2006.229.13:46:04.78#ibcon#read 4, iclass 17, count 2 2006.229.13:46:04.78#ibcon#about to read 5, iclass 17, count 2 2006.229.13:46:04.78#ibcon#read 5, iclass 17, count 2 2006.229.13:46:04.78#ibcon#about to read 6, iclass 17, count 2 2006.229.13:46:04.78#ibcon#read 6, iclass 17, count 2 2006.229.13:46:04.78#ibcon#end of sib2, iclass 17, count 2 2006.229.13:46:04.78#ibcon#*after write, iclass 17, count 2 2006.229.13:46:04.78#ibcon#*before return 0, iclass 17, count 2 2006.229.13:46:04.78#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:04.78#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:46:04.78#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.13:46:04.78#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:04.78#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:04.90#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:04.90#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:04.90#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:46:04.90#ibcon#first serial, iclass 17, count 0 2006.229.13:46:04.90#ibcon#enter sib2, iclass 17, count 0 2006.229.13:46:04.90#ibcon#flushed, iclass 17, count 0 2006.229.13:46:04.90#ibcon#about to write, iclass 17, count 0 2006.229.13:46:04.90#ibcon#wrote, iclass 17, count 0 2006.229.13:46:04.90#ibcon#about to read 3, iclass 17, count 0 2006.229.13:46:04.92#ibcon#read 3, iclass 17, count 0 2006.229.13:46:04.92#ibcon#about to read 4, iclass 17, count 0 2006.229.13:46:04.92#ibcon#read 4, iclass 17, count 0 2006.229.13:46:04.92#ibcon#about to read 5, iclass 17, count 0 2006.229.13:46:04.92#ibcon#read 5, iclass 17, count 0 2006.229.13:46:04.92#ibcon#about to read 6, iclass 17, count 0 2006.229.13:46:04.92#ibcon#read 6, iclass 17, count 0 2006.229.13:46:04.92#ibcon#end of sib2, iclass 17, count 0 2006.229.13:46:04.92#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:46:04.92#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:46:04.92#ibcon#[27=USB\r\n] 2006.229.13:46:04.92#ibcon#*before write, iclass 17, count 0 2006.229.13:46:04.92#ibcon#enter sib2, iclass 17, count 0 2006.229.13:46:04.92#ibcon#flushed, iclass 17, count 0 2006.229.13:46:04.92#ibcon#about to write, iclass 17, count 0 2006.229.13:46:04.92#ibcon#wrote, iclass 17, count 0 2006.229.13:46:04.92#ibcon#about to read 3, iclass 17, count 0 2006.229.13:46:04.95#ibcon#read 3, iclass 17, count 0 2006.229.13:46:04.95#ibcon#about to read 4, iclass 17, count 0 2006.229.13:46:04.95#ibcon#read 4, iclass 17, count 0 2006.229.13:46:04.95#ibcon#about to read 5, iclass 17, count 0 2006.229.13:46:04.95#ibcon#read 5, iclass 17, count 0 2006.229.13:46:04.95#ibcon#about to read 6, iclass 17, count 0 2006.229.13:46:04.95#ibcon#read 6, iclass 17, count 0 2006.229.13:46:04.95#ibcon#end of sib2, iclass 17, count 0 2006.229.13:46:04.95#ibcon#*after write, iclass 17, count 0 2006.229.13:46:04.95#ibcon#*before return 0, iclass 17, count 0 2006.229.13:46:04.95#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:04.95#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:46:04.95#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:46:04.95#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:46:04.95$vck44/vblo=4,679.99 2006.229.13:46:04.95#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:46:04.95#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:46:04.95#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:04.95#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:04.95#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:04.95#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:04.95#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:46:04.95#ibcon#first serial, iclass 19, count 0 2006.229.13:46:04.95#ibcon#enter sib2, iclass 19, count 0 2006.229.13:46:04.95#ibcon#flushed, iclass 19, count 0 2006.229.13:46:04.95#ibcon#about to write, iclass 19, count 0 2006.229.13:46:04.95#ibcon#wrote, iclass 19, count 0 2006.229.13:46:04.95#ibcon#about to read 3, iclass 19, count 0 2006.229.13:46:04.97#ibcon#read 3, iclass 19, count 0 2006.229.13:46:04.97#ibcon#about to read 4, iclass 19, count 0 2006.229.13:46:04.97#ibcon#read 4, iclass 19, count 0 2006.229.13:46:04.97#ibcon#about to read 5, iclass 19, count 0 2006.229.13:46:04.97#ibcon#read 5, iclass 19, count 0 2006.229.13:46:04.97#ibcon#about to read 6, iclass 19, count 0 2006.229.13:46:04.97#ibcon#read 6, iclass 19, count 0 2006.229.13:46:04.97#ibcon#end of sib2, iclass 19, count 0 2006.229.13:46:04.97#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:46:04.97#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:46:04.97#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:46:04.97#ibcon#*before write, iclass 19, count 0 2006.229.13:46:04.97#ibcon#enter sib2, iclass 19, count 0 2006.229.13:46:04.97#ibcon#flushed, iclass 19, count 0 2006.229.13:46:04.97#ibcon#about to write, iclass 19, count 0 2006.229.13:46:04.97#ibcon#wrote, iclass 19, count 0 2006.229.13:46:04.97#ibcon#about to read 3, iclass 19, count 0 2006.229.13:46:05.01#ibcon#read 3, iclass 19, count 0 2006.229.13:46:05.01#ibcon#about to read 4, iclass 19, count 0 2006.229.13:46:05.01#ibcon#read 4, iclass 19, count 0 2006.229.13:46:05.01#ibcon#about to read 5, iclass 19, count 0 2006.229.13:46:05.01#ibcon#read 5, iclass 19, count 0 2006.229.13:46:05.01#ibcon#about to read 6, iclass 19, count 0 2006.229.13:46:05.01#ibcon#read 6, iclass 19, count 0 2006.229.13:46:05.01#ibcon#end of sib2, iclass 19, count 0 2006.229.13:46:05.01#ibcon#*after write, iclass 19, count 0 2006.229.13:46:05.01#ibcon#*before return 0, iclass 19, count 0 2006.229.13:46:05.01#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:05.01#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:46:05.01#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:46:05.01#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:46:05.01$vck44/vb=4,4 2006.229.13:46:05.01#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:46:05.01#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:46:05.01#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:05.01#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:05.07#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:05.07#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:05.07#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:46:05.07#ibcon#first serial, iclass 21, count 2 2006.229.13:46:05.07#ibcon#enter sib2, iclass 21, count 2 2006.229.13:46:05.07#ibcon#flushed, iclass 21, count 2 2006.229.13:46:05.07#ibcon#about to write, iclass 21, count 2 2006.229.13:46:05.07#ibcon#wrote, iclass 21, count 2 2006.229.13:46:05.07#ibcon#about to read 3, iclass 21, count 2 2006.229.13:46:05.09#ibcon#read 3, iclass 21, count 2 2006.229.13:46:05.09#ibcon#about to read 4, iclass 21, count 2 2006.229.13:46:05.09#ibcon#read 4, iclass 21, count 2 2006.229.13:46:05.09#ibcon#about to read 5, iclass 21, count 2 2006.229.13:46:05.09#ibcon#read 5, iclass 21, count 2 2006.229.13:46:05.09#ibcon#about to read 6, iclass 21, count 2 2006.229.13:46:05.09#ibcon#read 6, iclass 21, count 2 2006.229.13:46:05.09#ibcon#end of sib2, iclass 21, count 2 2006.229.13:46:05.09#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:46:05.09#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:46:05.09#ibcon#[27=AT04-04\r\n] 2006.229.13:46:05.09#ibcon#*before write, iclass 21, count 2 2006.229.13:46:05.09#ibcon#enter sib2, iclass 21, count 2 2006.229.13:46:05.09#ibcon#flushed, iclass 21, count 2 2006.229.13:46:05.09#ibcon#about to write, iclass 21, count 2 2006.229.13:46:05.09#ibcon#wrote, iclass 21, count 2 2006.229.13:46:05.09#ibcon#about to read 3, iclass 21, count 2 2006.229.13:46:05.12#ibcon#read 3, iclass 21, count 2 2006.229.13:46:05.12#ibcon#about to read 4, iclass 21, count 2 2006.229.13:46:05.12#ibcon#read 4, iclass 21, count 2 2006.229.13:46:05.12#ibcon#about to read 5, iclass 21, count 2 2006.229.13:46:05.12#ibcon#read 5, iclass 21, count 2 2006.229.13:46:05.12#ibcon#about to read 6, iclass 21, count 2 2006.229.13:46:05.12#ibcon#read 6, iclass 21, count 2 2006.229.13:46:05.12#ibcon#end of sib2, iclass 21, count 2 2006.229.13:46:05.12#ibcon#*after write, iclass 21, count 2 2006.229.13:46:05.12#ibcon#*before return 0, iclass 21, count 2 2006.229.13:46:05.12#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:05.12#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:46:05.12#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:46:05.12#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:05.12#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:05.24#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:05.24#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:05.24#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:46:05.24#ibcon#first serial, iclass 21, count 0 2006.229.13:46:05.24#ibcon#enter sib2, iclass 21, count 0 2006.229.13:46:05.24#ibcon#flushed, iclass 21, count 0 2006.229.13:46:05.24#ibcon#about to write, iclass 21, count 0 2006.229.13:46:05.24#ibcon#wrote, iclass 21, count 0 2006.229.13:46:05.24#ibcon#about to read 3, iclass 21, count 0 2006.229.13:46:05.26#ibcon#read 3, iclass 21, count 0 2006.229.13:46:05.26#ibcon#about to read 4, iclass 21, count 0 2006.229.13:46:05.26#ibcon#read 4, iclass 21, count 0 2006.229.13:46:05.26#ibcon#about to read 5, iclass 21, count 0 2006.229.13:46:05.26#ibcon#read 5, iclass 21, count 0 2006.229.13:46:05.26#ibcon#about to read 6, iclass 21, count 0 2006.229.13:46:05.26#ibcon#read 6, iclass 21, count 0 2006.229.13:46:05.26#ibcon#end of sib2, iclass 21, count 0 2006.229.13:46:05.26#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:46:05.26#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:46:05.26#ibcon#[27=USB\r\n] 2006.229.13:46:05.26#ibcon#*before write, iclass 21, count 0 2006.229.13:46:05.26#ibcon#enter sib2, iclass 21, count 0 2006.229.13:46:05.26#ibcon#flushed, iclass 21, count 0 2006.229.13:46:05.26#ibcon#about to write, iclass 21, count 0 2006.229.13:46:05.26#ibcon#wrote, iclass 21, count 0 2006.229.13:46:05.26#ibcon#about to read 3, iclass 21, count 0 2006.229.13:46:05.29#ibcon#read 3, iclass 21, count 0 2006.229.13:46:05.29#ibcon#about to read 4, iclass 21, count 0 2006.229.13:46:05.29#ibcon#read 4, iclass 21, count 0 2006.229.13:46:05.29#ibcon#about to read 5, iclass 21, count 0 2006.229.13:46:05.29#ibcon#read 5, iclass 21, count 0 2006.229.13:46:05.29#ibcon#about to read 6, iclass 21, count 0 2006.229.13:46:05.29#ibcon#read 6, iclass 21, count 0 2006.229.13:46:05.29#ibcon#end of sib2, iclass 21, count 0 2006.229.13:46:05.29#ibcon#*after write, iclass 21, count 0 2006.229.13:46:05.29#ibcon#*before return 0, iclass 21, count 0 2006.229.13:46:05.29#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:05.29#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:46:05.29#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:46:05.29#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:46:05.29$vck44/vblo=5,709.99 2006.229.13:46:05.29#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:46:05.29#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:46:05.29#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:05.29#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:46:05.29#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:46:05.29#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:46:05.29#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:46:05.29#ibcon#first serial, iclass 23, count 0 2006.229.13:46:05.29#ibcon#enter sib2, iclass 23, count 0 2006.229.13:46:05.29#ibcon#flushed, iclass 23, count 0 2006.229.13:46:05.29#ibcon#about to write, iclass 23, count 0 2006.229.13:46:05.29#ibcon#wrote, iclass 23, count 0 2006.229.13:46:05.29#ibcon#about to read 3, iclass 23, count 0 2006.229.13:46:05.31#ibcon#read 3, iclass 23, count 0 2006.229.13:46:05.31#ibcon#about to read 4, iclass 23, count 0 2006.229.13:46:05.31#ibcon#read 4, iclass 23, count 0 2006.229.13:46:05.31#ibcon#about to read 5, iclass 23, count 0 2006.229.13:46:05.31#ibcon#read 5, iclass 23, count 0 2006.229.13:46:05.31#ibcon#about to read 6, iclass 23, count 0 2006.229.13:46:05.31#ibcon#read 6, iclass 23, count 0 2006.229.13:46:05.31#ibcon#end of sib2, iclass 23, count 0 2006.229.13:46:05.31#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:46:05.31#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:46:05.31#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:46:05.31#ibcon#*before write, iclass 23, count 0 2006.229.13:46:05.31#ibcon#enter sib2, iclass 23, count 0 2006.229.13:46:05.31#ibcon#flushed, iclass 23, count 0 2006.229.13:46:05.31#ibcon#about to write, iclass 23, count 0 2006.229.13:46:05.31#ibcon#wrote, iclass 23, count 0 2006.229.13:46:05.31#ibcon#about to read 3, iclass 23, count 0 2006.229.13:46:05.35#ibcon#read 3, iclass 23, count 0 2006.229.13:46:05.35#ibcon#about to read 4, iclass 23, count 0 2006.229.13:46:05.35#ibcon#read 4, iclass 23, count 0 2006.229.13:46:05.35#ibcon#about to read 5, iclass 23, count 0 2006.229.13:46:05.35#ibcon#read 5, iclass 23, count 0 2006.229.13:46:05.35#ibcon#about to read 6, iclass 23, count 0 2006.229.13:46:05.35#ibcon#read 6, iclass 23, count 0 2006.229.13:46:05.35#ibcon#end of sib2, iclass 23, count 0 2006.229.13:46:05.35#ibcon#*after write, iclass 23, count 0 2006.229.13:46:05.35#ibcon#*before return 0, iclass 23, count 0 2006.229.13:46:05.35#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:46:05.35#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:46:05.35#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:46:05.35#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:46:05.35$vck44/vb=5,4 2006.229.13:46:05.35#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:46:05.35#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:46:05.35#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:05.35#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:46:05.41#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:46:05.41#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:46:05.41#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:46:05.41#ibcon#first serial, iclass 25, count 2 2006.229.13:46:05.41#ibcon#enter sib2, iclass 25, count 2 2006.229.13:46:05.41#ibcon#flushed, iclass 25, count 2 2006.229.13:46:05.41#ibcon#about to write, iclass 25, count 2 2006.229.13:46:05.41#ibcon#wrote, iclass 25, count 2 2006.229.13:46:05.41#ibcon#about to read 3, iclass 25, count 2 2006.229.13:46:05.43#ibcon#read 3, iclass 25, count 2 2006.229.13:46:05.43#ibcon#about to read 4, iclass 25, count 2 2006.229.13:46:05.43#ibcon#read 4, iclass 25, count 2 2006.229.13:46:05.43#ibcon#about to read 5, iclass 25, count 2 2006.229.13:46:05.43#ibcon#read 5, iclass 25, count 2 2006.229.13:46:05.43#ibcon#about to read 6, iclass 25, count 2 2006.229.13:46:05.43#ibcon#read 6, iclass 25, count 2 2006.229.13:46:05.43#ibcon#end of sib2, iclass 25, count 2 2006.229.13:46:05.43#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:46:05.43#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:46:05.43#ibcon#[27=AT05-04\r\n] 2006.229.13:46:05.43#ibcon#*before write, iclass 25, count 2 2006.229.13:46:05.43#ibcon#enter sib2, iclass 25, count 2 2006.229.13:46:05.43#ibcon#flushed, iclass 25, count 2 2006.229.13:46:05.43#ibcon#about to write, iclass 25, count 2 2006.229.13:46:05.43#ibcon#wrote, iclass 25, count 2 2006.229.13:46:05.43#ibcon#about to read 3, iclass 25, count 2 2006.229.13:46:05.46#ibcon#read 3, iclass 25, count 2 2006.229.13:46:05.46#ibcon#about to read 4, iclass 25, count 2 2006.229.13:46:05.46#ibcon#read 4, iclass 25, count 2 2006.229.13:46:05.46#ibcon#about to read 5, iclass 25, count 2 2006.229.13:46:05.46#ibcon#read 5, iclass 25, count 2 2006.229.13:46:05.46#ibcon#about to read 6, iclass 25, count 2 2006.229.13:46:05.46#ibcon#read 6, iclass 25, count 2 2006.229.13:46:05.46#ibcon#end of sib2, iclass 25, count 2 2006.229.13:46:05.46#ibcon#*after write, iclass 25, count 2 2006.229.13:46:05.46#ibcon#*before return 0, iclass 25, count 2 2006.229.13:46:05.46#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:46:05.46#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:46:05.46#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:46:05.46#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:05.46#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:46:05.58#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:46:05.58#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:46:05.58#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:46:05.58#ibcon#first serial, iclass 25, count 0 2006.229.13:46:05.58#ibcon#enter sib2, iclass 25, count 0 2006.229.13:46:05.58#ibcon#flushed, iclass 25, count 0 2006.229.13:46:05.58#ibcon#about to write, iclass 25, count 0 2006.229.13:46:05.58#ibcon#wrote, iclass 25, count 0 2006.229.13:46:05.58#ibcon#about to read 3, iclass 25, count 0 2006.229.13:46:05.60#ibcon#read 3, iclass 25, count 0 2006.229.13:46:05.60#ibcon#about to read 4, iclass 25, count 0 2006.229.13:46:05.60#ibcon#read 4, iclass 25, count 0 2006.229.13:46:05.60#ibcon#about to read 5, iclass 25, count 0 2006.229.13:46:05.60#ibcon#read 5, iclass 25, count 0 2006.229.13:46:05.60#ibcon#about to read 6, iclass 25, count 0 2006.229.13:46:05.60#ibcon#read 6, iclass 25, count 0 2006.229.13:46:05.60#ibcon#end of sib2, iclass 25, count 0 2006.229.13:46:05.60#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:46:05.60#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:46:05.60#ibcon#[27=USB\r\n] 2006.229.13:46:05.60#ibcon#*before write, iclass 25, count 0 2006.229.13:46:05.60#ibcon#enter sib2, iclass 25, count 0 2006.229.13:46:05.60#ibcon#flushed, iclass 25, count 0 2006.229.13:46:05.60#ibcon#about to write, iclass 25, count 0 2006.229.13:46:05.60#ibcon#wrote, iclass 25, count 0 2006.229.13:46:05.60#ibcon#about to read 3, iclass 25, count 0 2006.229.13:46:05.63#ibcon#read 3, iclass 25, count 0 2006.229.13:46:05.63#ibcon#about to read 4, iclass 25, count 0 2006.229.13:46:05.63#ibcon#read 4, iclass 25, count 0 2006.229.13:46:05.63#ibcon#about to read 5, iclass 25, count 0 2006.229.13:46:05.63#ibcon#read 5, iclass 25, count 0 2006.229.13:46:05.63#ibcon#about to read 6, iclass 25, count 0 2006.229.13:46:05.63#ibcon#read 6, iclass 25, count 0 2006.229.13:46:05.63#ibcon#end of sib2, iclass 25, count 0 2006.229.13:46:05.63#ibcon#*after write, iclass 25, count 0 2006.229.13:46:05.63#ibcon#*before return 0, iclass 25, count 0 2006.229.13:46:05.63#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:46:05.63#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:46:05.63#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:46:05.63#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:46:05.63$vck44/vblo=6,719.99 2006.229.13:46:05.63#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:46:05.63#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:46:05.63#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:05.63#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:05.63#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:05.63#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:05.63#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:46:05.63#ibcon#first serial, iclass 27, count 0 2006.229.13:46:05.63#ibcon#enter sib2, iclass 27, count 0 2006.229.13:46:05.63#ibcon#flushed, iclass 27, count 0 2006.229.13:46:05.63#ibcon#about to write, iclass 27, count 0 2006.229.13:46:05.63#ibcon#wrote, iclass 27, count 0 2006.229.13:46:05.63#ibcon#about to read 3, iclass 27, count 0 2006.229.13:46:05.65#ibcon#read 3, iclass 27, count 0 2006.229.13:46:05.65#ibcon#about to read 4, iclass 27, count 0 2006.229.13:46:05.65#ibcon#read 4, iclass 27, count 0 2006.229.13:46:05.65#ibcon#about to read 5, iclass 27, count 0 2006.229.13:46:05.65#ibcon#read 5, iclass 27, count 0 2006.229.13:46:05.65#ibcon#about to read 6, iclass 27, count 0 2006.229.13:46:05.65#ibcon#read 6, iclass 27, count 0 2006.229.13:46:05.65#ibcon#end of sib2, iclass 27, count 0 2006.229.13:46:05.65#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:46:05.65#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:46:05.65#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:46:05.65#ibcon#*before write, iclass 27, count 0 2006.229.13:46:05.65#ibcon#enter sib2, iclass 27, count 0 2006.229.13:46:05.65#ibcon#flushed, iclass 27, count 0 2006.229.13:46:05.65#ibcon#about to write, iclass 27, count 0 2006.229.13:46:05.65#ibcon#wrote, iclass 27, count 0 2006.229.13:46:05.65#ibcon#about to read 3, iclass 27, count 0 2006.229.13:46:05.69#ibcon#read 3, iclass 27, count 0 2006.229.13:46:05.69#ibcon#about to read 4, iclass 27, count 0 2006.229.13:46:05.69#ibcon#read 4, iclass 27, count 0 2006.229.13:46:05.69#ibcon#about to read 5, iclass 27, count 0 2006.229.13:46:05.69#ibcon#read 5, iclass 27, count 0 2006.229.13:46:05.69#ibcon#about to read 6, iclass 27, count 0 2006.229.13:46:05.69#ibcon#read 6, iclass 27, count 0 2006.229.13:46:05.69#ibcon#end of sib2, iclass 27, count 0 2006.229.13:46:05.69#ibcon#*after write, iclass 27, count 0 2006.229.13:46:05.69#ibcon#*before return 0, iclass 27, count 0 2006.229.13:46:05.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:05.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:46:05.69#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:46:05.69#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:46:05.69$vck44/vb=6,4 2006.229.13:46:05.69#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:46:05.69#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:46:05.69#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:05.69#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:05.75#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:05.75#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:05.75#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:46:05.75#ibcon#first serial, iclass 29, count 2 2006.229.13:46:05.75#ibcon#enter sib2, iclass 29, count 2 2006.229.13:46:05.75#ibcon#flushed, iclass 29, count 2 2006.229.13:46:05.75#ibcon#about to write, iclass 29, count 2 2006.229.13:46:05.75#ibcon#wrote, iclass 29, count 2 2006.229.13:46:05.75#ibcon#about to read 3, iclass 29, count 2 2006.229.13:46:05.77#ibcon#read 3, iclass 29, count 2 2006.229.13:46:05.77#ibcon#about to read 4, iclass 29, count 2 2006.229.13:46:05.77#ibcon#read 4, iclass 29, count 2 2006.229.13:46:05.77#ibcon#about to read 5, iclass 29, count 2 2006.229.13:46:05.77#ibcon#read 5, iclass 29, count 2 2006.229.13:46:05.77#ibcon#about to read 6, iclass 29, count 2 2006.229.13:46:05.77#ibcon#read 6, iclass 29, count 2 2006.229.13:46:05.77#ibcon#end of sib2, iclass 29, count 2 2006.229.13:46:05.77#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:46:05.77#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:46:05.77#ibcon#[27=AT06-04\r\n] 2006.229.13:46:05.77#ibcon#*before write, iclass 29, count 2 2006.229.13:46:05.77#ibcon#enter sib2, iclass 29, count 2 2006.229.13:46:05.77#ibcon#flushed, iclass 29, count 2 2006.229.13:46:05.77#ibcon#about to write, iclass 29, count 2 2006.229.13:46:05.77#ibcon#wrote, iclass 29, count 2 2006.229.13:46:05.77#ibcon#about to read 3, iclass 29, count 2 2006.229.13:46:05.80#ibcon#read 3, iclass 29, count 2 2006.229.13:46:05.80#ibcon#about to read 4, iclass 29, count 2 2006.229.13:46:05.80#ibcon#read 4, iclass 29, count 2 2006.229.13:46:05.80#ibcon#about to read 5, iclass 29, count 2 2006.229.13:46:05.80#ibcon#read 5, iclass 29, count 2 2006.229.13:46:05.80#ibcon#about to read 6, iclass 29, count 2 2006.229.13:46:05.80#ibcon#read 6, iclass 29, count 2 2006.229.13:46:05.80#ibcon#end of sib2, iclass 29, count 2 2006.229.13:46:05.80#ibcon#*after write, iclass 29, count 2 2006.229.13:46:05.80#ibcon#*before return 0, iclass 29, count 2 2006.229.13:46:05.80#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:05.80#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:46:05.80#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:46:05.80#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:05.80#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:05.92#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:05.92#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:05.92#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:46:05.92#ibcon#first serial, iclass 29, count 0 2006.229.13:46:05.92#ibcon#enter sib2, iclass 29, count 0 2006.229.13:46:05.92#ibcon#flushed, iclass 29, count 0 2006.229.13:46:05.92#ibcon#about to write, iclass 29, count 0 2006.229.13:46:05.92#ibcon#wrote, iclass 29, count 0 2006.229.13:46:05.92#ibcon#about to read 3, iclass 29, count 0 2006.229.13:46:05.94#ibcon#read 3, iclass 29, count 0 2006.229.13:46:05.94#ibcon#about to read 4, iclass 29, count 0 2006.229.13:46:05.94#ibcon#read 4, iclass 29, count 0 2006.229.13:46:05.94#ibcon#about to read 5, iclass 29, count 0 2006.229.13:46:05.94#ibcon#read 5, iclass 29, count 0 2006.229.13:46:05.94#ibcon#about to read 6, iclass 29, count 0 2006.229.13:46:05.94#ibcon#read 6, iclass 29, count 0 2006.229.13:46:05.94#ibcon#end of sib2, iclass 29, count 0 2006.229.13:46:05.94#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:46:05.94#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:46:05.94#ibcon#[27=USB\r\n] 2006.229.13:46:05.94#ibcon#*before write, iclass 29, count 0 2006.229.13:46:05.94#ibcon#enter sib2, iclass 29, count 0 2006.229.13:46:05.94#ibcon#flushed, iclass 29, count 0 2006.229.13:46:05.94#ibcon#about to write, iclass 29, count 0 2006.229.13:46:05.94#ibcon#wrote, iclass 29, count 0 2006.229.13:46:05.94#ibcon#about to read 3, iclass 29, count 0 2006.229.13:46:05.97#ibcon#read 3, iclass 29, count 0 2006.229.13:46:05.97#ibcon#about to read 4, iclass 29, count 0 2006.229.13:46:05.97#ibcon#read 4, iclass 29, count 0 2006.229.13:46:05.97#ibcon#about to read 5, iclass 29, count 0 2006.229.13:46:05.97#ibcon#read 5, iclass 29, count 0 2006.229.13:46:05.97#ibcon#about to read 6, iclass 29, count 0 2006.229.13:46:05.97#ibcon#read 6, iclass 29, count 0 2006.229.13:46:05.97#ibcon#end of sib2, iclass 29, count 0 2006.229.13:46:05.97#ibcon#*after write, iclass 29, count 0 2006.229.13:46:05.97#ibcon#*before return 0, iclass 29, count 0 2006.229.13:46:05.97#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:05.97#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:46:05.97#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:46:05.97#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:46:05.97$vck44/vblo=7,734.99 2006.229.13:46:05.97#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:46:05.97#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:46:05.97#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:05.97#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:05.97#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:05.97#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:05.97#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:46:05.97#ibcon#first serial, iclass 31, count 0 2006.229.13:46:05.97#ibcon#enter sib2, iclass 31, count 0 2006.229.13:46:05.97#ibcon#flushed, iclass 31, count 0 2006.229.13:46:05.97#ibcon#about to write, iclass 31, count 0 2006.229.13:46:05.97#ibcon#wrote, iclass 31, count 0 2006.229.13:46:05.97#ibcon#about to read 3, iclass 31, count 0 2006.229.13:46:05.99#ibcon#read 3, iclass 31, count 0 2006.229.13:46:05.99#ibcon#about to read 4, iclass 31, count 0 2006.229.13:46:05.99#ibcon#read 4, iclass 31, count 0 2006.229.13:46:05.99#ibcon#about to read 5, iclass 31, count 0 2006.229.13:46:05.99#ibcon#read 5, iclass 31, count 0 2006.229.13:46:05.99#ibcon#about to read 6, iclass 31, count 0 2006.229.13:46:05.99#ibcon#read 6, iclass 31, count 0 2006.229.13:46:05.99#ibcon#end of sib2, iclass 31, count 0 2006.229.13:46:05.99#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:46:05.99#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:46:05.99#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:46:05.99#ibcon#*before write, iclass 31, count 0 2006.229.13:46:05.99#ibcon#enter sib2, iclass 31, count 0 2006.229.13:46:05.99#ibcon#flushed, iclass 31, count 0 2006.229.13:46:05.99#ibcon#about to write, iclass 31, count 0 2006.229.13:46:05.99#ibcon#wrote, iclass 31, count 0 2006.229.13:46:05.99#ibcon#about to read 3, iclass 31, count 0 2006.229.13:46:06.03#ibcon#read 3, iclass 31, count 0 2006.229.13:46:06.03#ibcon#about to read 4, iclass 31, count 0 2006.229.13:46:06.03#ibcon#read 4, iclass 31, count 0 2006.229.13:46:06.03#ibcon#about to read 5, iclass 31, count 0 2006.229.13:46:06.03#ibcon#read 5, iclass 31, count 0 2006.229.13:46:06.03#ibcon#about to read 6, iclass 31, count 0 2006.229.13:46:06.03#ibcon#read 6, iclass 31, count 0 2006.229.13:46:06.03#ibcon#end of sib2, iclass 31, count 0 2006.229.13:46:06.03#ibcon#*after write, iclass 31, count 0 2006.229.13:46:06.03#ibcon#*before return 0, iclass 31, count 0 2006.229.13:46:06.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:06.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:46:06.03#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:46:06.03#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:46:06.03$vck44/vb=7,4 2006.229.13:46:06.03#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:46:06.03#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:46:06.03#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:06.03#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:06.09#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:06.09#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:06.09#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:46:06.09#ibcon#first serial, iclass 33, count 2 2006.229.13:46:06.09#ibcon#enter sib2, iclass 33, count 2 2006.229.13:46:06.09#ibcon#flushed, iclass 33, count 2 2006.229.13:46:06.09#ibcon#about to write, iclass 33, count 2 2006.229.13:46:06.09#ibcon#wrote, iclass 33, count 2 2006.229.13:46:06.09#ibcon#about to read 3, iclass 33, count 2 2006.229.13:46:06.11#ibcon#read 3, iclass 33, count 2 2006.229.13:46:06.11#ibcon#about to read 4, iclass 33, count 2 2006.229.13:46:06.11#ibcon#read 4, iclass 33, count 2 2006.229.13:46:06.11#ibcon#about to read 5, iclass 33, count 2 2006.229.13:46:06.11#ibcon#read 5, iclass 33, count 2 2006.229.13:46:06.11#ibcon#about to read 6, iclass 33, count 2 2006.229.13:46:06.11#ibcon#read 6, iclass 33, count 2 2006.229.13:46:06.11#ibcon#end of sib2, iclass 33, count 2 2006.229.13:46:06.11#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:46:06.11#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:46:06.11#ibcon#[27=AT07-04\r\n] 2006.229.13:46:06.11#ibcon#*before write, iclass 33, count 2 2006.229.13:46:06.11#ibcon#enter sib2, iclass 33, count 2 2006.229.13:46:06.11#ibcon#flushed, iclass 33, count 2 2006.229.13:46:06.11#ibcon#about to write, iclass 33, count 2 2006.229.13:46:06.11#ibcon#wrote, iclass 33, count 2 2006.229.13:46:06.11#ibcon#about to read 3, iclass 33, count 2 2006.229.13:46:06.14#ibcon#read 3, iclass 33, count 2 2006.229.13:46:06.14#ibcon#about to read 4, iclass 33, count 2 2006.229.13:46:06.14#ibcon#read 4, iclass 33, count 2 2006.229.13:46:06.14#ibcon#about to read 5, iclass 33, count 2 2006.229.13:46:06.14#ibcon#read 5, iclass 33, count 2 2006.229.13:46:06.14#ibcon#about to read 6, iclass 33, count 2 2006.229.13:46:06.14#ibcon#read 6, iclass 33, count 2 2006.229.13:46:06.14#ibcon#end of sib2, iclass 33, count 2 2006.229.13:46:06.14#ibcon#*after write, iclass 33, count 2 2006.229.13:46:06.14#ibcon#*before return 0, iclass 33, count 2 2006.229.13:46:06.14#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:06.14#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:46:06.14#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:46:06.14#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:06.14#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:06.26#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:06.26#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:06.26#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:46:06.26#ibcon#first serial, iclass 33, count 0 2006.229.13:46:06.26#ibcon#enter sib2, iclass 33, count 0 2006.229.13:46:06.26#ibcon#flushed, iclass 33, count 0 2006.229.13:46:06.26#ibcon#about to write, iclass 33, count 0 2006.229.13:46:06.26#ibcon#wrote, iclass 33, count 0 2006.229.13:46:06.26#ibcon#about to read 3, iclass 33, count 0 2006.229.13:46:06.28#ibcon#read 3, iclass 33, count 0 2006.229.13:46:06.28#ibcon#about to read 4, iclass 33, count 0 2006.229.13:46:06.28#ibcon#read 4, iclass 33, count 0 2006.229.13:46:06.28#ibcon#about to read 5, iclass 33, count 0 2006.229.13:46:06.28#ibcon#read 5, iclass 33, count 0 2006.229.13:46:06.28#ibcon#about to read 6, iclass 33, count 0 2006.229.13:46:06.28#ibcon#read 6, iclass 33, count 0 2006.229.13:46:06.28#ibcon#end of sib2, iclass 33, count 0 2006.229.13:46:06.28#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:46:06.28#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:46:06.28#ibcon#[27=USB\r\n] 2006.229.13:46:06.28#ibcon#*before write, iclass 33, count 0 2006.229.13:46:06.28#ibcon#enter sib2, iclass 33, count 0 2006.229.13:46:06.28#ibcon#flushed, iclass 33, count 0 2006.229.13:46:06.28#ibcon#about to write, iclass 33, count 0 2006.229.13:46:06.28#ibcon#wrote, iclass 33, count 0 2006.229.13:46:06.28#ibcon#about to read 3, iclass 33, count 0 2006.229.13:46:06.31#ibcon#read 3, iclass 33, count 0 2006.229.13:46:06.31#ibcon#about to read 4, iclass 33, count 0 2006.229.13:46:06.31#ibcon#read 4, iclass 33, count 0 2006.229.13:46:06.31#ibcon#about to read 5, iclass 33, count 0 2006.229.13:46:06.31#ibcon#read 5, iclass 33, count 0 2006.229.13:46:06.31#ibcon#about to read 6, iclass 33, count 0 2006.229.13:46:06.31#ibcon#read 6, iclass 33, count 0 2006.229.13:46:06.31#ibcon#end of sib2, iclass 33, count 0 2006.229.13:46:06.31#ibcon#*after write, iclass 33, count 0 2006.229.13:46:06.31#ibcon#*before return 0, iclass 33, count 0 2006.229.13:46:06.31#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:06.31#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:46:06.31#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:46:06.31#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:46:06.31$vck44/vblo=8,744.99 2006.229.13:46:06.31#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:46:06.31#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:46:06.31#ibcon#ireg 17 cls_cnt 0 2006.229.13:46:06.31#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:06.31#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:06.31#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:06.31#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:46:06.31#ibcon#first serial, iclass 35, count 0 2006.229.13:46:06.31#ibcon#enter sib2, iclass 35, count 0 2006.229.13:46:06.31#ibcon#flushed, iclass 35, count 0 2006.229.13:46:06.31#ibcon#about to write, iclass 35, count 0 2006.229.13:46:06.31#ibcon#wrote, iclass 35, count 0 2006.229.13:46:06.31#ibcon#about to read 3, iclass 35, count 0 2006.229.13:46:06.33#ibcon#read 3, iclass 35, count 0 2006.229.13:46:06.33#ibcon#about to read 4, iclass 35, count 0 2006.229.13:46:06.33#ibcon#read 4, iclass 35, count 0 2006.229.13:46:06.33#ibcon#about to read 5, iclass 35, count 0 2006.229.13:46:06.33#ibcon#read 5, iclass 35, count 0 2006.229.13:46:06.33#ibcon#about to read 6, iclass 35, count 0 2006.229.13:46:06.33#ibcon#read 6, iclass 35, count 0 2006.229.13:46:06.33#ibcon#end of sib2, iclass 35, count 0 2006.229.13:46:06.33#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:46:06.33#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:46:06.33#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:46:06.33#ibcon#*before write, iclass 35, count 0 2006.229.13:46:06.33#ibcon#enter sib2, iclass 35, count 0 2006.229.13:46:06.33#ibcon#flushed, iclass 35, count 0 2006.229.13:46:06.33#ibcon#about to write, iclass 35, count 0 2006.229.13:46:06.33#ibcon#wrote, iclass 35, count 0 2006.229.13:46:06.33#ibcon#about to read 3, iclass 35, count 0 2006.229.13:46:06.37#ibcon#read 3, iclass 35, count 0 2006.229.13:46:06.37#ibcon#about to read 4, iclass 35, count 0 2006.229.13:46:06.37#ibcon#read 4, iclass 35, count 0 2006.229.13:46:06.37#ibcon#about to read 5, iclass 35, count 0 2006.229.13:46:06.37#ibcon#read 5, iclass 35, count 0 2006.229.13:46:06.37#ibcon#about to read 6, iclass 35, count 0 2006.229.13:46:06.37#ibcon#read 6, iclass 35, count 0 2006.229.13:46:06.37#ibcon#end of sib2, iclass 35, count 0 2006.229.13:46:06.37#ibcon#*after write, iclass 35, count 0 2006.229.13:46:06.37#ibcon#*before return 0, iclass 35, count 0 2006.229.13:46:06.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:06.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:46:06.37#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:46:06.37#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:46:06.37$vck44/vb=8,4 2006.229.13:46:06.37#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:46:06.37#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:46:06.37#ibcon#ireg 11 cls_cnt 2 2006.229.13:46:06.37#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:06.43#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:06.43#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:06.43#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:46:06.43#ibcon#first serial, iclass 37, count 2 2006.229.13:46:06.43#ibcon#enter sib2, iclass 37, count 2 2006.229.13:46:06.43#ibcon#flushed, iclass 37, count 2 2006.229.13:46:06.43#ibcon#about to write, iclass 37, count 2 2006.229.13:46:06.43#ibcon#wrote, iclass 37, count 2 2006.229.13:46:06.43#ibcon#about to read 3, iclass 37, count 2 2006.229.13:46:06.45#ibcon#read 3, iclass 37, count 2 2006.229.13:46:06.45#ibcon#about to read 4, iclass 37, count 2 2006.229.13:46:06.45#ibcon#read 4, iclass 37, count 2 2006.229.13:46:06.45#ibcon#about to read 5, iclass 37, count 2 2006.229.13:46:06.45#ibcon#read 5, iclass 37, count 2 2006.229.13:46:06.45#ibcon#about to read 6, iclass 37, count 2 2006.229.13:46:06.45#ibcon#read 6, iclass 37, count 2 2006.229.13:46:06.45#ibcon#end of sib2, iclass 37, count 2 2006.229.13:46:06.45#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:46:06.45#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:46:06.45#ibcon#[27=AT08-04\r\n] 2006.229.13:46:06.45#ibcon#*before write, iclass 37, count 2 2006.229.13:46:06.45#ibcon#enter sib2, iclass 37, count 2 2006.229.13:46:06.45#ibcon#flushed, iclass 37, count 2 2006.229.13:46:06.45#ibcon#about to write, iclass 37, count 2 2006.229.13:46:06.45#ibcon#wrote, iclass 37, count 2 2006.229.13:46:06.45#ibcon#about to read 3, iclass 37, count 2 2006.229.13:46:06.48#ibcon#read 3, iclass 37, count 2 2006.229.13:46:06.48#ibcon#about to read 4, iclass 37, count 2 2006.229.13:46:06.48#ibcon#read 4, iclass 37, count 2 2006.229.13:46:06.48#ibcon#about to read 5, iclass 37, count 2 2006.229.13:46:06.48#ibcon#read 5, iclass 37, count 2 2006.229.13:46:06.48#ibcon#about to read 6, iclass 37, count 2 2006.229.13:46:06.48#ibcon#read 6, iclass 37, count 2 2006.229.13:46:06.48#ibcon#end of sib2, iclass 37, count 2 2006.229.13:46:06.48#ibcon#*after write, iclass 37, count 2 2006.229.13:46:06.48#ibcon#*before return 0, iclass 37, count 2 2006.229.13:46:06.48#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:06.48#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:46:06.48#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:46:06.48#ibcon#ireg 7 cls_cnt 0 2006.229.13:46:06.48#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:06.60#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:06.60#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:06.60#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:46:06.60#ibcon#first serial, iclass 37, count 0 2006.229.13:46:06.60#ibcon#enter sib2, iclass 37, count 0 2006.229.13:46:06.60#ibcon#flushed, iclass 37, count 0 2006.229.13:46:06.60#ibcon#about to write, iclass 37, count 0 2006.229.13:46:06.60#ibcon#wrote, iclass 37, count 0 2006.229.13:46:06.60#ibcon#about to read 3, iclass 37, count 0 2006.229.13:46:06.62#ibcon#read 3, iclass 37, count 0 2006.229.13:46:06.62#ibcon#about to read 4, iclass 37, count 0 2006.229.13:46:06.62#ibcon#read 4, iclass 37, count 0 2006.229.13:46:06.62#ibcon#about to read 5, iclass 37, count 0 2006.229.13:46:06.62#ibcon#read 5, iclass 37, count 0 2006.229.13:46:06.62#ibcon#about to read 6, iclass 37, count 0 2006.229.13:46:06.62#ibcon#read 6, iclass 37, count 0 2006.229.13:46:06.62#ibcon#end of sib2, iclass 37, count 0 2006.229.13:46:06.62#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:46:06.62#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:46:06.62#ibcon#[27=USB\r\n] 2006.229.13:46:06.62#ibcon#*before write, iclass 37, count 0 2006.229.13:46:06.62#ibcon#enter sib2, iclass 37, count 0 2006.229.13:46:06.62#ibcon#flushed, iclass 37, count 0 2006.229.13:46:06.62#ibcon#about to write, iclass 37, count 0 2006.229.13:46:06.62#ibcon#wrote, iclass 37, count 0 2006.229.13:46:06.62#ibcon#about to read 3, iclass 37, count 0 2006.229.13:46:06.65#ibcon#read 3, iclass 37, count 0 2006.229.13:46:06.65#ibcon#about to read 4, iclass 37, count 0 2006.229.13:46:06.65#ibcon#read 4, iclass 37, count 0 2006.229.13:46:06.65#ibcon#about to read 5, iclass 37, count 0 2006.229.13:46:06.65#ibcon#read 5, iclass 37, count 0 2006.229.13:46:06.65#ibcon#about to read 6, iclass 37, count 0 2006.229.13:46:06.65#ibcon#read 6, iclass 37, count 0 2006.229.13:46:06.65#ibcon#end of sib2, iclass 37, count 0 2006.229.13:46:06.65#ibcon#*after write, iclass 37, count 0 2006.229.13:46:06.65#ibcon#*before return 0, iclass 37, count 0 2006.229.13:46:06.65#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:06.65#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:46:06.65#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:46:06.65#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:46:06.65$vck44/vabw=wide 2006.229.13:46:06.65#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:46:06.65#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:46:06.65#ibcon#ireg 8 cls_cnt 0 2006.229.13:46:06.65#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:06.65#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:06.65#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:06.65#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:46:06.65#ibcon#first serial, iclass 39, count 0 2006.229.13:46:06.65#ibcon#enter sib2, iclass 39, count 0 2006.229.13:46:06.65#ibcon#flushed, iclass 39, count 0 2006.229.13:46:06.65#ibcon#about to write, iclass 39, count 0 2006.229.13:46:06.65#ibcon#wrote, iclass 39, count 0 2006.229.13:46:06.65#ibcon#about to read 3, iclass 39, count 0 2006.229.13:46:06.67#ibcon#read 3, iclass 39, count 0 2006.229.13:46:06.67#ibcon#about to read 4, iclass 39, count 0 2006.229.13:46:06.67#ibcon#read 4, iclass 39, count 0 2006.229.13:46:06.67#ibcon#about to read 5, iclass 39, count 0 2006.229.13:46:06.67#ibcon#read 5, iclass 39, count 0 2006.229.13:46:06.67#ibcon#about to read 6, iclass 39, count 0 2006.229.13:46:06.67#ibcon#read 6, iclass 39, count 0 2006.229.13:46:06.67#ibcon#end of sib2, iclass 39, count 0 2006.229.13:46:06.67#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:46:06.67#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:46:06.67#ibcon#[25=BW32\r\n] 2006.229.13:46:06.67#ibcon#*before write, iclass 39, count 0 2006.229.13:46:06.67#ibcon#enter sib2, iclass 39, count 0 2006.229.13:46:06.67#ibcon#flushed, iclass 39, count 0 2006.229.13:46:06.67#ibcon#about to write, iclass 39, count 0 2006.229.13:46:06.67#ibcon#wrote, iclass 39, count 0 2006.229.13:46:06.67#ibcon#about to read 3, iclass 39, count 0 2006.229.13:46:06.70#ibcon#read 3, iclass 39, count 0 2006.229.13:46:06.70#ibcon#about to read 4, iclass 39, count 0 2006.229.13:46:06.70#ibcon#read 4, iclass 39, count 0 2006.229.13:46:06.70#ibcon#about to read 5, iclass 39, count 0 2006.229.13:46:06.70#ibcon#read 5, iclass 39, count 0 2006.229.13:46:06.70#ibcon#about to read 6, iclass 39, count 0 2006.229.13:46:06.70#ibcon#read 6, iclass 39, count 0 2006.229.13:46:06.70#ibcon#end of sib2, iclass 39, count 0 2006.229.13:46:06.70#ibcon#*after write, iclass 39, count 0 2006.229.13:46:06.70#ibcon#*before return 0, iclass 39, count 0 2006.229.13:46:06.70#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:06.70#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:46:06.70#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:46:06.70#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:46:06.70$vck44/vbbw=wide 2006.229.13:46:06.70#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:46:06.70#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:46:06.70#ibcon#ireg 8 cls_cnt 0 2006.229.13:46:06.70#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:46:06.77#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:46:06.77#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:46:06.77#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:46:06.77#ibcon#first serial, iclass 3, count 0 2006.229.13:46:06.77#ibcon#enter sib2, iclass 3, count 0 2006.229.13:46:06.77#ibcon#flushed, iclass 3, count 0 2006.229.13:46:06.77#ibcon#about to write, iclass 3, count 0 2006.229.13:46:06.77#ibcon#wrote, iclass 3, count 0 2006.229.13:46:06.77#ibcon#about to read 3, iclass 3, count 0 2006.229.13:46:06.79#ibcon#read 3, iclass 3, count 0 2006.229.13:46:06.79#ibcon#about to read 4, iclass 3, count 0 2006.229.13:46:06.79#ibcon#read 4, iclass 3, count 0 2006.229.13:46:06.79#ibcon#about to read 5, iclass 3, count 0 2006.229.13:46:06.79#ibcon#read 5, iclass 3, count 0 2006.229.13:46:06.79#ibcon#about to read 6, iclass 3, count 0 2006.229.13:46:06.79#ibcon#read 6, iclass 3, count 0 2006.229.13:46:06.79#ibcon#end of sib2, iclass 3, count 0 2006.229.13:46:06.79#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:46:06.79#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:46:06.79#ibcon#[27=BW32\r\n] 2006.229.13:46:06.79#ibcon#*before write, iclass 3, count 0 2006.229.13:46:06.79#ibcon#enter sib2, iclass 3, count 0 2006.229.13:46:06.79#ibcon#flushed, iclass 3, count 0 2006.229.13:46:06.79#ibcon#about to write, iclass 3, count 0 2006.229.13:46:06.79#ibcon#wrote, iclass 3, count 0 2006.229.13:46:06.79#ibcon#about to read 3, iclass 3, count 0 2006.229.13:46:06.82#ibcon#read 3, iclass 3, count 0 2006.229.13:46:06.82#ibcon#about to read 4, iclass 3, count 0 2006.229.13:46:06.82#ibcon#read 4, iclass 3, count 0 2006.229.13:46:06.82#ibcon#about to read 5, iclass 3, count 0 2006.229.13:46:06.82#ibcon#read 5, iclass 3, count 0 2006.229.13:46:06.82#ibcon#about to read 6, iclass 3, count 0 2006.229.13:46:06.82#ibcon#read 6, iclass 3, count 0 2006.229.13:46:06.82#ibcon#end of sib2, iclass 3, count 0 2006.229.13:46:06.82#ibcon#*after write, iclass 3, count 0 2006.229.13:46:06.82#ibcon#*before return 0, iclass 3, count 0 2006.229.13:46:06.82#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:46:06.82#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:46:06.82#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:46:06.82#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:46:06.82$setupk4/ifdk4 2006.229.13:46:06.82$ifdk4/lo= 2006.229.13:46:06.82$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:46:06.82$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:46:06.82$ifdk4/patch= 2006.229.13:46:06.82$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:46:06.82$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:46:06.82$setupk4/!*+20s 2006.229.13:46:12.68#abcon#<5=/04 1.4 2.9 27.551001002.1\r\n> 2006.229.13:46:12.70#abcon#{5=INTERFACE CLEAR} 2006.229.13:46:12.76#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:46:21.28$setupk4/"tpicd 2006.229.13:46:21.28$setupk4/echo=off 2006.229.13:46:21.28$setupk4/xlog=off 2006.229.13:46:21.28:!2006.229.13:48:17 2006.229.13:46:22.14#trakl#Source acquired 2006.229.13:46:24.14#flagr#flagr/antenna,acquired 2006.229.13:48:17.00:preob 2006.229.13:48:17.14/onsource/TRACKING 2006.229.13:48:17.14:!2006.229.13:48:27 2006.229.13:48:27.00:"tape 2006.229.13:48:27.00:"st=record 2006.229.13:48:27.00:data_valid=on 2006.229.13:48:27.00:midob 2006.229.13:48:27.14/onsource/TRACKING 2006.229.13:48:27.14/wx/27.55,1002.1,100 2006.229.13:48:27.21/cable/+6.4114E-03 2006.229.13:48:28.30/va/01,08,usb,yes,32,34 2006.229.13:48:28.30/va/02,07,usb,yes,34,35 2006.229.13:48:28.30/va/03,06,usb,yes,43,45 2006.229.13:48:28.30/va/04,07,usb,yes,35,37 2006.229.13:48:28.30/va/05,04,usb,yes,32,32 2006.229.13:48:28.30/va/06,04,usb,yes,35,35 2006.229.13:48:28.30/va/07,05,usb,yes,31,32 2006.229.13:48:28.30/va/08,06,usb,yes,23,28 2006.229.13:48:28.53/valo/01,524.99,yes,locked 2006.229.13:48:28.53/valo/02,534.99,yes,locked 2006.229.13:48:28.53/valo/03,564.99,yes,locked 2006.229.13:48:28.53/valo/04,624.99,yes,locked 2006.229.13:48:28.53/valo/05,734.99,yes,locked 2006.229.13:48:28.53/valo/06,814.99,yes,locked 2006.229.13:48:28.53/valo/07,864.99,yes,locked 2006.229.13:48:28.53/valo/08,884.99,yes,locked 2006.229.13:48:29.62/vb/01,04,usb,yes,32,30 2006.229.13:48:29.62/vb/02,04,usb,yes,35,34 2006.229.13:48:29.62/vb/03,04,usb,yes,32,35 2006.229.13:48:29.62/vb/04,04,usb,yes,36,35 2006.229.13:48:29.62/vb/05,04,usb,yes,28,31 2006.229.13:48:29.62/vb/06,04,usb,yes,33,29 2006.229.13:48:29.62/vb/07,04,usb,yes,33,33 2006.229.13:48:29.62/vb/08,04,usb,yes,30,34 2006.229.13:48:29.85/vblo/01,629.99,yes,locked 2006.229.13:48:29.85/vblo/02,634.99,yes,locked 2006.229.13:48:29.85/vblo/03,649.99,yes,locked 2006.229.13:48:29.85/vblo/04,679.99,yes,locked 2006.229.13:48:29.85/vblo/05,709.99,yes,locked 2006.229.13:48:29.85/vblo/06,719.99,yes,locked 2006.229.13:48:29.85/vblo/07,734.99,yes,locked 2006.229.13:48:29.85/vblo/08,744.99,yes,locked 2006.229.13:48:30.00/vabw/8 2006.229.13:48:30.15/vbbw/8 2006.229.13:48:30.24/xfe/off,on,12.0 2006.229.13:48:30.63/ifatt/23,28,28,28 2006.229.13:48:31.08/fmout-gps/S +4.62E-07 2006.229.13:48:31.12:!2006.229.13:49:07 2006.229.13:49:07.00:data_valid=off 2006.229.13:49:07.00:"et 2006.229.13:49:07.00:!+3s 2006.229.13:49:10.01:"tape 2006.229.13:49:10.01:postob 2006.229.13:49:10.25/cable/+6.4116E-03 2006.229.13:49:10.25/wx/27.54,1002.1,100 2006.229.13:49:11.07/fmout-gps/S +4.61E-07 2006.229.13:49:11.07:scan_name=229-1350,jd0608,190 2006.229.13:49:11.07:source=1958-179,200057.09,-174857.7,2000.0,cw 2006.229.13:49:12.14#flagr#flagr/antenna,new-source 2006.229.13:49:12.14:checkk5 2006.229.13:49:12.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:49:12.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:49:13.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:49:13.67/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:49:14.06/chk_obsdata//k5ts1/T2291348??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.13:49:14.45/chk_obsdata//k5ts2/T2291348??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.13:49:14.86/chk_obsdata//k5ts3/T2291348??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.13:49:15.26/chk_obsdata//k5ts4/T2291348??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.13:49:15.99/k5log//k5ts1_log_newline 2006.229.13:49:16.70/k5log//k5ts2_log_newline 2006.229.13:49:17.41/k5log//k5ts3_log_newline 2006.229.13:49:18.14/k5log//k5ts4_log_newline 2006.229.13:49:18.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:49:18.16:setupk4=1 2006.229.13:49:18.16$setupk4/echo=on 2006.229.13:49:18.16$setupk4/pcalon 2006.229.13:49:18.16$pcalon/"no phase cal control is implemented here 2006.229.13:49:18.16$setupk4/"tpicd=stop 2006.229.13:49:18.16$setupk4/"rec=synch_on 2006.229.13:49:18.16$setupk4/"rec_mode=128 2006.229.13:49:18.16$setupk4/!* 2006.229.13:49:18.16$setupk4/recpk4 2006.229.13:49:18.16$recpk4/recpatch= 2006.229.13:49:18.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:49:18.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:49:18.17$setupk4/vck44 2006.229.13:49:18.17$vck44/valo=1,524.99 2006.229.13:49:18.17#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:49:18.17#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:49:18.17#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:18.17#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:18.17#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:18.17#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:18.17#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:49:18.17#ibcon#first serial, iclass 3, count 0 2006.229.13:49:18.17#ibcon#enter sib2, iclass 3, count 0 2006.229.13:49:18.17#ibcon#flushed, iclass 3, count 0 2006.229.13:49:18.17#ibcon#about to write, iclass 3, count 0 2006.229.13:49:18.17#ibcon#wrote, iclass 3, count 0 2006.229.13:49:18.17#ibcon#about to read 3, iclass 3, count 0 2006.229.13:49:18.19#ibcon#read 3, iclass 3, count 0 2006.229.13:49:18.19#ibcon#about to read 4, iclass 3, count 0 2006.229.13:49:18.19#ibcon#read 4, iclass 3, count 0 2006.229.13:49:18.19#ibcon#about to read 5, iclass 3, count 0 2006.229.13:49:18.19#ibcon#read 5, iclass 3, count 0 2006.229.13:49:18.19#ibcon#about to read 6, iclass 3, count 0 2006.229.13:49:18.19#ibcon#read 6, iclass 3, count 0 2006.229.13:49:18.19#ibcon#end of sib2, iclass 3, count 0 2006.229.13:49:18.19#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:49:18.19#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:49:18.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:49:18.19#ibcon#*before write, iclass 3, count 0 2006.229.13:49:18.19#ibcon#enter sib2, iclass 3, count 0 2006.229.13:49:18.19#ibcon#flushed, iclass 3, count 0 2006.229.13:49:18.19#ibcon#about to write, iclass 3, count 0 2006.229.13:49:18.19#ibcon#wrote, iclass 3, count 0 2006.229.13:49:18.19#ibcon#about to read 3, iclass 3, count 0 2006.229.13:49:18.24#ibcon#read 3, iclass 3, count 0 2006.229.13:49:18.24#ibcon#about to read 4, iclass 3, count 0 2006.229.13:49:18.24#ibcon#read 4, iclass 3, count 0 2006.229.13:49:18.24#ibcon#about to read 5, iclass 3, count 0 2006.229.13:49:18.24#ibcon#read 5, iclass 3, count 0 2006.229.13:49:18.24#ibcon#about to read 6, iclass 3, count 0 2006.229.13:49:18.24#ibcon#read 6, iclass 3, count 0 2006.229.13:49:18.24#ibcon#end of sib2, iclass 3, count 0 2006.229.13:49:18.24#ibcon#*after write, iclass 3, count 0 2006.229.13:49:18.24#ibcon#*before return 0, iclass 3, count 0 2006.229.13:49:18.24#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:18.24#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:18.24#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:49:18.24#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:49:18.24$vck44/va=1,8 2006.229.13:49:18.24#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.13:49:18.24#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.13:49:18.24#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:18.24#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:18.24#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:18.24#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:18.24#ibcon#enter wrdev, iclass 5, count 2 2006.229.13:49:18.24#ibcon#first serial, iclass 5, count 2 2006.229.13:49:18.24#ibcon#enter sib2, iclass 5, count 2 2006.229.13:49:18.24#ibcon#flushed, iclass 5, count 2 2006.229.13:49:18.24#ibcon#about to write, iclass 5, count 2 2006.229.13:49:18.24#ibcon#wrote, iclass 5, count 2 2006.229.13:49:18.24#ibcon#about to read 3, iclass 5, count 2 2006.229.13:49:18.26#ibcon#read 3, iclass 5, count 2 2006.229.13:49:18.26#ibcon#about to read 4, iclass 5, count 2 2006.229.13:49:18.26#ibcon#read 4, iclass 5, count 2 2006.229.13:49:18.26#ibcon#about to read 5, iclass 5, count 2 2006.229.13:49:18.26#ibcon#read 5, iclass 5, count 2 2006.229.13:49:18.26#ibcon#about to read 6, iclass 5, count 2 2006.229.13:49:18.26#ibcon#read 6, iclass 5, count 2 2006.229.13:49:18.26#ibcon#end of sib2, iclass 5, count 2 2006.229.13:49:18.26#ibcon#*mode == 0, iclass 5, count 2 2006.229.13:49:18.26#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.13:49:18.26#ibcon#[25=AT01-08\r\n] 2006.229.13:49:18.26#ibcon#*before write, iclass 5, count 2 2006.229.13:49:18.26#ibcon#enter sib2, iclass 5, count 2 2006.229.13:49:18.26#ibcon#flushed, iclass 5, count 2 2006.229.13:49:18.26#ibcon#about to write, iclass 5, count 2 2006.229.13:49:18.26#ibcon#wrote, iclass 5, count 2 2006.229.13:49:18.26#ibcon#about to read 3, iclass 5, count 2 2006.229.13:49:18.29#ibcon#read 3, iclass 5, count 2 2006.229.13:49:18.29#ibcon#about to read 4, iclass 5, count 2 2006.229.13:49:18.29#ibcon#read 4, iclass 5, count 2 2006.229.13:49:18.29#ibcon#about to read 5, iclass 5, count 2 2006.229.13:49:18.29#ibcon#read 5, iclass 5, count 2 2006.229.13:49:18.29#ibcon#about to read 6, iclass 5, count 2 2006.229.13:49:18.29#ibcon#read 6, iclass 5, count 2 2006.229.13:49:18.29#ibcon#end of sib2, iclass 5, count 2 2006.229.13:49:18.29#ibcon#*after write, iclass 5, count 2 2006.229.13:49:18.29#ibcon#*before return 0, iclass 5, count 2 2006.229.13:49:18.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:18.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:18.29#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.13:49:18.29#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:18.29#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:18.41#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:18.41#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:18.41#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:49:18.41#ibcon#first serial, iclass 5, count 0 2006.229.13:49:18.41#ibcon#enter sib2, iclass 5, count 0 2006.229.13:49:18.41#ibcon#flushed, iclass 5, count 0 2006.229.13:49:18.41#ibcon#about to write, iclass 5, count 0 2006.229.13:49:18.41#ibcon#wrote, iclass 5, count 0 2006.229.13:49:18.41#ibcon#about to read 3, iclass 5, count 0 2006.229.13:49:18.43#ibcon#read 3, iclass 5, count 0 2006.229.13:49:18.43#ibcon#about to read 4, iclass 5, count 0 2006.229.13:49:18.43#ibcon#read 4, iclass 5, count 0 2006.229.13:49:18.43#ibcon#about to read 5, iclass 5, count 0 2006.229.13:49:18.43#ibcon#read 5, iclass 5, count 0 2006.229.13:49:18.43#ibcon#about to read 6, iclass 5, count 0 2006.229.13:49:18.43#ibcon#read 6, iclass 5, count 0 2006.229.13:49:18.43#ibcon#end of sib2, iclass 5, count 0 2006.229.13:49:18.43#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:49:18.43#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:49:18.43#ibcon#[25=USB\r\n] 2006.229.13:49:18.43#ibcon#*before write, iclass 5, count 0 2006.229.13:49:18.43#ibcon#enter sib2, iclass 5, count 0 2006.229.13:49:18.43#ibcon#flushed, iclass 5, count 0 2006.229.13:49:18.43#ibcon#about to write, iclass 5, count 0 2006.229.13:49:18.43#ibcon#wrote, iclass 5, count 0 2006.229.13:49:18.43#ibcon#about to read 3, iclass 5, count 0 2006.229.13:49:18.46#ibcon#read 3, iclass 5, count 0 2006.229.13:49:18.46#ibcon#about to read 4, iclass 5, count 0 2006.229.13:49:18.46#ibcon#read 4, iclass 5, count 0 2006.229.13:49:18.46#ibcon#about to read 5, iclass 5, count 0 2006.229.13:49:18.46#ibcon#read 5, iclass 5, count 0 2006.229.13:49:18.46#ibcon#about to read 6, iclass 5, count 0 2006.229.13:49:18.46#ibcon#read 6, iclass 5, count 0 2006.229.13:49:18.46#ibcon#end of sib2, iclass 5, count 0 2006.229.13:49:18.46#ibcon#*after write, iclass 5, count 0 2006.229.13:49:18.46#ibcon#*before return 0, iclass 5, count 0 2006.229.13:49:18.46#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:18.46#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:18.46#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:49:18.46#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:49:18.46$vck44/valo=2,534.99 2006.229.13:49:18.46#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:49:18.46#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:49:18.46#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:18.46#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:18.46#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:18.46#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:18.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:49:18.46#ibcon#first serial, iclass 7, count 0 2006.229.13:49:18.46#ibcon#enter sib2, iclass 7, count 0 2006.229.13:49:18.46#ibcon#flushed, iclass 7, count 0 2006.229.13:49:18.46#ibcon#about to write, iclass 7, count 0 2006.229.13:49:18.46#ibcon#wrote, iclass 7, count 0 2006.229.13:49:18.46#ibcon#about to read 3, iclass 7, count 0 2006.229.13:49:18.48#ibcon#read 3, iclass 7, count 0 2006.229.13:49:18.48#ibcon#about to read 4, iclass 7, count 0 2006.229.13:49:18.48#ibcon#read 4, iclass 7, count 0 2006.229.13:49:18.48#ibcon#about to read 5, iclass 7, count 0 2006.229.13:49:18.48#ibcon#read 5, iclass 7, count 0 2006.229.13:49:18.48#ibcon#about to read 6, iclass 7, count 0 2006.229.13:49:18.48#ibcon#read 6, iclass 7, count 0 2006.229.13:49:18.48#ibcon#end of sib2, iclass 7, count 0 2006.229.13:49:18.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:49:18.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:49:18.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:49:18.48#ibcon#*before write, iclass 7, count 0 2006.229.13:49:18.48#ibcon#enter sib2, iclass 7, count 0 2006.229.13:49:18.48#ibcon#flushed, iclass 7, count 0 2006.229.13:49:18.48#ibcon#about to write, iclass 7, count 0 2006.229.13:49:18.48#ibcon#wrote, iclass 7, count 0 2006.229.13:49:18.48#ibcon#about to read 3, iclass 7, count 0 2006.229.13:49:18.52#ibcon#read 3, iclass 7, count 0 2006.229.13:49:18.52#ibcon#about to read 4, iclass 7, count 0 2006.229.13:49:18.52#ibcon#read 4, iclass 7, count 0 2006.229.13:49:18.52#ibcon#about to read 5, iclass 7, count 0 2006.229.13:49:18.52#ibcon#read 5, iclass 7, count 0 2006.229.13:49:18.52#ibcon#about to read 6, iclass 7, count 0 2006.229.13:49:18.52#ibcon#read 6, iclass 7, count 0 2006.229.13:49:18.52#ibcon#end of sib2, iclass 7, count 0 2006.229.13:49:18.52#ibcon#*after write, iclass 7, count 0 2006.229.13:49:18.52#ibcon#*before return 0, iclass 7, count 0 2006.229.13:49:18.52#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:18.52#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:18.52#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:49:18.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:49:18.52$vck44/va=2,7 2006.229.13:49:18.52#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.13:49:18.52#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.13:49:18.52#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:18.52#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:49:18.57#abcon#<5=/04 1.2 2.4 27.541001002.1\r\n> 2006.229.13:49:18.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:49:18.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:49:18.58#ibcon#enter wrdev, iclass 12, count 2 2006.229.13:49:18.58#ibcon#first serial, iclass 12, count 2 2006.229.13:49:18.58#ibcon#enter sib2, iclass 12, count 2 2006.229.13:49:18.58#ibcon#flushed, iclass 12, count 2 2006.229.13:49:18.58#ibcon#about to write, iclass 12, count 2 2006.229.13:49:18.58#ibcon#wrote, iclass 12, count 2 2006.229.13:49:18.58#ibcon#about to read 3, iclass 12, count 2 2006.229.13:49:18.59#abcon#{5=INTERFACE CLEAR} 2006.229.13:49:18.60#ibcon#read 3, iclass 12, count 2 2006.229.13:49:18.60#ibcon#about to read 4, iclass 12, count 2 2006.229.13:49:18.60#ibcon#read 4, iclass 12, count 2 2006.229.13:49:18.60#ibcon#about to read 5, iclass 12, count 2 2006.229.13:49:18.60#ibcon#read 5, iclass 12, count 2 2006.229.13:49:18.60#ibcon#about to read 6, iclass 12, count 2 2006.229.13:49:18.60#ibcon#read 6, iclass 12, count 2 2006.229.13:49:18.60#ibcon#end of sib2, iclass 12, count 2 2006.229.13:49:18.60#ibcon#*mode == 0, iclass 12, count 2 2006.229.13:49:18.60#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.13:49:18.60#ibcon#[25=AT02-07\r\n] 2006.229.13:49:18.60#ibcon#*before write, iclass 12, count 2 2006.229.13:49:18.60#ibcon#enter sib2, iclass 12, count 2 2006.229.13:49:18.60#ibcon#flushed, iclass 12, count 2 2006.229.13:49:18.60#ibcon#about to write, iclass 12, count 2 2006.229.13:49:18.60#ibcon#wrote, iclass 12, count 2 2006.229.13:49:18.60#ibcon#about to read 3, iclass 12, count 2 2006.229.13:49:18.63#ibcon#read 3, iclass 12, count 2 2006.229.13:49:18.63#ibcon#about to read 4, iclass 12, count 2 2006.229.13:49:18.63#ibcon#read 4, iclass 12, count 2 2006.229.13:49:18.63#ibcon#about to read 5, iclass 12, count 2 2006.229.13:49:18.63#ibcon#read 5, iclass 12, count 2 2006.229.13:49:18.63#ibcon#about to read 6, iclass 12, count 2 2006.229.13:49:18.63#ibcon#read 6, iclass 12, count 2 2006.229.13:49:18.63#ibcon#end of sib2, iclass 12, count 2 2006.229.13:49:18.63#ibcon#*after write, iclass 12, count 2 2006.229.13:49:18.63#ibcon#*before return 0, iclass 12, count 2 2006.229.13:49:18.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:49:18.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.13:49:18.63#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.13:49:18.63#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:18.63#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:49:18.65#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:49:18.75#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:49:18.75#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:49:18.75#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:49:18.75#ibcon#first serial, iclass 12, count 0 2006.229.13:49:18.75#ibcon#enter sib2, iclass 12, count 0 2006.229.13:49:18.75#ibcon#flushed, iclass 12, count 0 2006.229.13:49:18.75#ibcon#about to write, iclass 12, count 0 2006.229.13:49:18.75#ibcon#wrote, iclass 12, count 0 2006.229.13:49:18.75#ibcon#about to read 3, iclass 12, count 0 2006.229.13:49:18.77#ibcon#read 3, iclass 12, count 0 2006.229.13:49:18.77#ibcon#about to read 4, iclass 12, count 0 2006.229.13:49:18.77#ibcon#read 4, iclass 12, count 0 2006.229.13:49:18.77#ibcon#about to read 5, iclass 12, count 0 2006.229.13:49:18.77#ibcon#read 5, iclass 12, count 0 2006.229.13:49:18.77#ibcon#about to read 6, iclass 12, count 0 2006.229.13:49:18.77#ibcon#read 6, iclass 12, count 0 2006.229.13:49:18.77#ibcon#end of sib2, iclass 12, count 0 2006.229.13:49:18.77#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:49:18.77#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:49:18.77#ibcon#[25=USB\r\n] 2006.229.13:49:18.77#ibcon#*before write, iclass 12, count 0 2006.229.13:49:18.77#ibcon#enter sib2, iclass 12, count 0 2006.229.13:49:18.77#ibcon#flushed, iclass 12, count 0 2006.229.13:49:18.77#ibcon#about to write, iclass 12, count 0 2006.229.13:49:18.77#ibcon#wrote, iclass 12, count 0 2006.229.13:49:18.77#ibcon#about to read 3, iclass 12, count 0 2006.229.13:49:18.80#ibcon#read 3, iclass 12, count 0 2006.229.13:49:18.80#ibcon#about to read 4, iclass 12, count 0 2006.229.13:49:18.80#ibcon#read 4, iclass 12, count 0 2006.229.13:49:18.80#ibcon#about to read 5, iclass 12, count 0 2006.229.13:49:18.80#ibcon#read 5, iclass 12, count 0 2006.229.13:49:18.80#ibcon#about to read 6, iclass 12, count 0 2006.229.13:49:18.80#ibcon#read 6, iclass 12, count 0 2006.229.13:49:18.80#ibcon#end of sib2, iclass 12, count 0 2006.229.13:49:18.80#ibcon#*after write, iclass 12, count 0 2006.229.13:49:18.80#ibcon#*before return 0, iclass 12, count 0 2006.229.13:49:18.80#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:49:18.80#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.13:49:18.80#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:49:18.80#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:49:18.80$vck44/valo=3,564.99 2006.229.13:49:18.80#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.13:49:18.80#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.13:49:18.80#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:18.80#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:18.80#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:18.80#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:18.80#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:49:18.80#ibcon#first serial, iclass 17, count 0 2006.229.13:49:18.80#ibcon#enter sib2, iclass 17, count 0 2006.229.13:49:18.80#ibcon#flushed, iclass 17, count 0 2006.229.13:49:18.80#ibcon#about to write, iclass 17, count 0 2006.229.13:49:18.80#ibcon#wrote, iclass 17, count 0 2006.229.13:49:18.80#ibcon#about to read 3, iclass 17, count 0 2006.229.13:49:18.82#ibcon#read 3, iclass 17, count 0 2006.229.13:49:18.82#ibcon#about to read 4, iclass 17, count 0 2006.229.13:49:18.82#ibcon#read 4, iclass 17, count 0 2006.229.13:49:18.82#ibcon#about to read 5, iclass 17, count 0 2006.229.13:49:18.82#ibcon#read 5, iclass 17, count 0 2006.229.13:49:18.82#ibcon#about to read 6, iclass 17, count 0 2006.229.13:49:18.82#ibcon#read 6, iclass 17, count 0 2006.229.13:49:18.82#ibcon#end of sib2, iclass 17, count 0 2006.229.13:49:18.82#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:49:18.82#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:49:18.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:49:18.82#ibcon#*before write, iclass 17, count 0 2006.229.13:49:18.82#ibcon#enter sib2, iclass 17, count 0 2006.229.13:49:18.82#ibcon#flushed, iclass 17, count 0 2006.229.13:49:18.82#ibcon#about to write, iclass 17, count 0 2006.229.13:49:18.82#ibcon#wrote, iclass 17, count 0 2006.229.13:49:18.82#ibcon#about to read 3, iclass 17, count 0 2006.229.13:49:18.86#ibcon#read 3, iclass 17, count 0 2006.229.13:49:18.86#ibcon#about to read 4, iclass 17, count 0 2006.229.13:49:18.86#ibcon#read 4, iclass 17, count 0 2006.229.13:49:18.86#ibcon#about to read 5, iclass 17, count 0 2006.229.13:49:18.86#ibcon#read 5, iclass 17, count 0 2006.229.13:49:18.86#ibcon#about to read 6, iclass 17, count 0 2006.229.13:49:18.86#ibcon#read 6, iclass 17, count 0 2006.229.13:49:18.86#ibcon#end of sib2, iclass 17, count 0 2006.229.13:49:18.86#ibcon#*after write, iclass 17, count 0 2006.229.13:49:18.86#ibcon#*before return 0, iclass 17, count 0 2006.229.13:49:18.86#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:18.86#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:18.86#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:49:18.86#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:49:18.86$vck44/va=3,6 2006.229.13:49:18.86#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.13:49:18.86#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.13:49:18.86#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:18.86#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:18.92#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:18.92#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:18.92#ibcon#enter wrdev, iclass 19, count 2 2006.229.13:49:18.92#ibcon#first serial, iclass 19, count 2 2006.229.13:49:18.92#ibcon#enter sib2, iclass 19, count 2 2006.229.13:49:18.92#ibcon#flushed, iclass 19, count 2 2006.229.13:49:18.92#ibcon#about to write, iclass 19, count 2 2006.229.13:49:18.92#ibcon#wrote, iclass 19, count 2 2006.229.13:49:18.92#ibcon#about to read 3, iclass 19, count 2 2006.229.13:49:18.94#ibcon#read 3, iclass 19, count 2 2006.229.13:49:18.94#ibcon#about to read 4, iclass 19, count 2 2006.229.13:49:18.94#ibcon#read 4, iclass 19, count 2 2006.229.13:49:18.94#ibcon#about to read 5, iclass 19, count 2 2006.229.13:49:18.94#ibcon#read 5, iclass 19, count 2 2006.229.13:49:18.94#ibcon#about to read 6, iclass 19, count 2 2006.229.13:49:18.94#ibcon#read 6, iclass 19, count 2 2006.229.13:49:18.94#ibcon#end of sib2, iclass 19, count 2 2006.229.13:49:18.94#ibcon#*mode == 0, iclass 19, count 2 2006.229.13:49:18.94#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.13:49:18.94#ibcon#[25=AT03-06\r\n] 2006.229.13:49:18.94#ibcon#*before write, iclass 19, count 2 2006.229.13:49:18.94#ibcon#enter sib2, iclass 19, count 2 2006.229.13:49:18.94#ibcon#flushed, iclass 19, count 2 2006.229.13:49:18.94#ibcon#about to write, iclass 19, count 2 2006.229.13:49:18.94#ibcon#wrote, iclass 19, count 2 2006.229.13:49:18.94#ibcon#about to read 3, iclass 19, count 2 2006.229.13:49:18.97#ibcon#read 3, iclass 19, count 2 2006.229.13:49:18.97#ibcon#about to read 4, iclass 19, count 2 2006.229.13:49:18.97#ibcon#read 4, iclass 19, count 2 2006.229.13:49:18.97#ibcon#about to read 5, iclass 19, count 2 2006.229.13:49:18.97#ibcon#read 5, iclass 19, count 2 2006.229.13:49:18.97#ibcon#about to read 6, iclass 19, count 2 2006.229.13:49:18.97#ibcon#read 6, iclass 19, count 2 2006.229.13:49:18.97#ibcon#end of sib2, iclass 19, count 2 2006.229.13:49:18.97#ibcon#*after write, iclass 19, count 2 2006.229.13:49:18.97#ibcon#*before return 0, iclass 19, count 2 2006.229.13:49:18.97#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:18.97#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:18.97#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.13:49:18.97#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:18.97#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:19.09#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:19.09#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:19.09#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:49:19.09#ibcon#first serial, iclass 19, count 0 2006.229.13:49:19.09#ibcon#enter sib2, iclass 19, count 0 2006.229.13:49:19.09#ibcon#flushed, iclass 19, count 0 2006.229.13:49:19.09#ibcon#about to write, iclass 19, count 0 2006.229.13:49:19.09#ibcon#wrote, iclass 19, count 0 2006.229.13:49:19.09#ibcon#about to read 3, iclass 19, count 0 2006.229.13:49:19.11#ibcon#read 3, iclass 19, count 0 2006.229.13:49:19.11#ibcon#about to read 4, iclass 19, count 0 2006.229.13:49:19.11#ibcon#read 4, iclass 19, count 0 2006.229.13:49:19.11#ibcon#about to read 5, iclass 19, count 0 2006.229.13:49:19.11#ibcon#read 5, iclass 19, count 0 2006.229.13:49:19.11#ibcon#about to read 6, iclass 19, count 0 2006.229.13:49:19.11#ibcon#read 6, iclass 19, count 0 2006.229.13:49:19.11#ibcon#end of sib2, iclass 19, count 0 2006.229.13:49:19.11#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:49:19.11#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:49:19.11#ibcon#[25=USB\r\n] 2006.229.13:49:19.11#ibcon#*before write, iclass 19, count 0 2006.229.13:49:19.11#ibcon#enter sib2, iclass 19, count 0 2006.229.13:49:19.11#ibcon#flushed, iclass 19, count 0 2006.229.13:49:19.11#ibcon#about to write, iclass 19, count 0 2006.229.13:49:19.11#ibcon#wrote, iclass 19, count 0 2006.229.13:49:19.11#ibcon#about to read 3, iclass 19, count 0 2006.229.13:49:19.14#ibcon#read 3, iclass 19, count 0 2006.229.13:49:19.14#ibcon#about to read 4, iclass 19, count 0 2006.229.13:49:19.14#ibcon#read 4, iclass 19, count 0 2006.229.13:49:19.14#ibcon#about to read 5, iclass 19, count 0 2006.229.13:49:19.14#ibcon#read 5, iclass 19, count 0 2006.229.13:49:19.14#ibcon#about to read 6, iclass 19, count 0 2006.229.13:49:19.14#ibcon#read 6, iclass 19, count 0 2006.229.13:49:19.14#ibcon#end of sib2, iclass 19, count 0 2006.229.13:49:19.14#ibcon#*after write, iclass 19, count 0 2006.229.13:49:19.14#ibcon#*before return 0, iclass 19, count 0 2006.229.13:49:19.14#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:19.14#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:19.14#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:49:19.14#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:49:19.14$vck44/valo=4,624.99 2006.229.13:49:19.14#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.13:49:19.14#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.13:49:19.14#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:19.14#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:19.14#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:19.14#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:19.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:49:19.14#ibcon#first serial, iclass 21, count 0 2006.229.13:49:19.14#ibcon#enter sib2, iclass 21, count 0 2006.229.13:49:19.14#ibcon#flushed, iclass 21, count 0 2006.229.13:49:19.14#ibcon#about to write, iclass 21, count 0 2006.229.13:49:19.14#ibcon#wrote, iclass 21, count 0 2006.229.13:49:19.14#ibcon#about to read 3, iclass 21, count 0 2006.229.13:49:19.16#ibcon#read 3, iclass 21, count 0 2006.229.13:49:19.16#ibcon#about to read 4, iclass 21, count 0 2006.229.13:49:19.16#ibcon#read 4, iclass 21, count 0 2006.229.13:49:19.16#ibcon#about to read 5, iclass 21, count 0 2006.229.13:49:19.16#ibcon#read 5, iclass 21, count 0 2006.229.13:49:19.16#ibcon#about to read 6, iclass 21, count 0 2006.229.13:49:19.16#ibcon#read 6, iclass 21, count 0 2006.229.13:49:19.16#ibcon#end of sib2, iclass 21, count 0 2006.229.13:49:19.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:49:19.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:49:19.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:49:19.16#ibcon#*before write, iclass 21, count 0 2006.229.13:49:19.16#ibcon#enter sib2, iclass 21, count 0 2006.229.13:49:19.16#ibcon#flushed, iclass 21, count 0 2006.229.13:49:19.16#ibcon#about to write, iclass 21, count 0 2006.229.13:49:19.16#ibcon#wrote, iclass 21, count 0 2006.229.13:49:19.16#ibcon#about to read 3, iclass 21, count 0 2006.229.13:49:19.20#ibcon#read 3, iclass 21, count 0 2006.229.13:49:19.20#ibcon#about to read 4, iclass 21, count 0 2006.229.13:49:19.20#ibcon#read 4, iclass 21, count 0 2006.229.13:49:19.20#ibcon#about to read 5, iclass 21, count 0 2006.229.13:49:19.20#ibcon#read 5, iclass 21, count 0 2006.229.13:49:19.20#ibcon#about to read 6, iclass 21, count 0 2006.229.13:49:19.20#ibcon#read 6, iclass 21, count 0 2006.229.13:49:19.20#ibcon#end of sib2, iclass 21, count 0 2006.229.13:49:19.20#ibcon#*after write, iclass 21, count 0 2006.229.13:49:19.20#ibcon#*before return 0, iclass 21, count 0 2006.229.13:49:19.20#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:19.20#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:19.20#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:49:19.20#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:49:19.20$vck44/va=4,7 2006.229.13:49:19.20#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.13:49:19.20#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.13:49:19.20#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:19.20#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:19.26#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:19.26#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:19.26#ibcon#enter wrdev, iclass 23, count 2 2006.229.13:49:19.26#ibcon#first serial, iclass 23, count 2 2006.229.13:49:19.26#ibcon#enter sib2, iclass 23, count 2 2006.229.13:49:19.26#ibcon#flushed, iclass 23, count 2 2006.229.13:49:19.26#ibcon#about to write, iclass 23, count 2 2006.229.13:49:19.26#ibcon#wrote, iclass 23, count 2 2006.229.13:49:19.26#ibcon#about to read 3, iclass 23, count 2 2006.229.13:49:19.28#ibcon#read 3, iclass 23, count 2 2006.229.13:49:19.28#ibcon#about to read 4, iclass 23, count 2 2006.229.13:49:19.28#ibcon#read 4, iclass 23, count 2 2006.229.13:49:19.28#ibcon#about to read 5, iclass 23, count 2 2006.229.13:49:19.28#ibcon#read 5, iclass 23, count 2 2006.229.13:49:19.28#ibcon#about to read 6, iclass 23, count 2 2006.229.13:49:19.28#ibcon#read 6, iclass 23, count 2 2006.229.13:49:19.28#ibcon#end of sib2, iclass 23, count 2 2006.229.13:49:19.28#ibcon#*mode == 0, iclass 23, count 2 2006.229.13:49:19.28#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.13:49:19.28#ibcon#[25=AT04-07\r\n] 2006.229.13:49:19.28#ibcon#*before write, iclass 23, count 2 2006.229.13:49:19.28#ibcon#enter sib2, iclass 23, count 2 2006.229.13:49:19.28#ibcon#flushed, iclass 23, count 2 2006.229.13:49:19.28#ibcon#about to write, iclass 23, count 2 2006.229.13:49:19.28#ibcon#wrote, iclass 23, count 2 2006.229.13:49:19.28#ibcon#about to read 3, iclass 23, count 2 2006.229.13:49:19.31#ibcon#read 3, iclass 23, count 2 2006.229.13:49:19.31#ibcon#about to read 4, iclass 23, count 2 2006.229.13:49:19.31#ibcon#read 4, iclass 23, count 2 2006.229.13:49:19.31#ibcon#about to read 5, iclass 23, count 2 2006.229.13:49:19.31#ibcon#read 5, iclass 23, count 2 2006.229.13:49:19.31#ibcon#about to read 6, iclass 23, count 2 2006.229.13:49:19.31#ibcon#read 6, iclass 23, count 2 2006.229.13:49:19.31#ibcon#end of sib2, iclass 23, count 2 2006.229.13:49:19.31#ibcon#*after write, iclass 23, count 2 2006.229.13:49:19.31#ibcon#*before return 0, iclass 23, count 2 2006.229.13:49:19.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:19.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:19.31#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.13:49:19.31#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:19.31#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:19.43#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:19.43#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:19.43#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:49:19.43#ibcon#first serial, iclass 23, count 0 2006.229.13:49:19.43#ibcon#enter sib2, iclass 23, count 0 2006.229.13:49:19.43#ibcon#flushed, iclass 23, count 0 2006.229.13:49:19.43#ibcon#about to write, iclass 23, count 0 2006.229.13:49:19.43#ibcon#wrote, iclass 23, count 0 2006.229.13:49:19.43#ibcon#about to read 3, iclass 23, count 0 2006.229.13:49:19.45#ibcon#read 3, iclass 23, count 0 2006.229.13:49:19.45#ibcon#about to read 4, iclass 23, count 0 2006.229.13:49:19.45#ibcon#read 4, iclass 23, count 0 2006.229.13:49:19.45#ibcon#about to read 5, iclass 23, count 0 2006.229.13:49:19.45#ibcon#read 5, iclass 23, count 0 2006.229.13:49:19.45#ibcon#about to read 6, iclass 23, count 0 2006.229.13:49:19.45#ibcon#read 6, iclass 23, count 0 2006.229.13:49:19.45#ibcon#end of sib2, iclass 23, count 0 2006.229.13:49:19.45#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:49:19.45#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:49:19.45#ibcon#[25=USB\r\n] 2006.229.13:49:19.45#ibcon#*before write, iclass 23, count 0 2006.229.13:49:19.45#ibcon#enter sib2, iclass 23, count 0 2006.229.13:49:19.45#ibcon#flushed, iclass 23, count 0 2006.229.13:49:19.45#ibcon#about to write, iclass 23, count 0 2006.229.13:49:19.45#ibcon#wrote, iclass 23, count 0 2006.229.13:49:19.45#ibcon#about to read 3, iclass 23, count 0 2006.229.13:49:19.48#ibcon#read 3, iclass 23, count 0 2006.229.13:49:19.48#ibcon#about to read 4, iclass 23, count 0 2006.229.13:49:19.48#ibcon#read 4, iclass 23, count 0 2006.229.13:49:19.48#ibcon#about to read 5, iclass 23, count 0 2006.229.13:49:19.48#ibcon#read 5, iclass 23, count 0 2006.229.13:49:19.48#ibcon#about to read 6, iclass 23, count 0 2006.229.13:49:19.48#ibcon#read 6, iclass 23, count 0 2006.229.13:49:19.48#ibcon#end of sib2, iclass 23, count 0 2006.229.13:49:19.48#ibcon#*after write, iclass 23, count 0 2006.229.13:49:19.48#ibcon#*before return 0, iclass 23, count 0 2006.229.13:49:19.48#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:19.48#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:19.48#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:49:19.48#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:49:19.48$vck44/valo=5,734.99 2006.229.13:49:19.48#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.13:49:19.48#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.13:49:19.48#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:19.48#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:19.48#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:19.48#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:19.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:49:19.48#ibcon#first serial, iclass 25, count 0 2006.229.13:49:19.48#ibcon#enter sib2, iclass 25, count 0 2006.229.13:49:19.48#ibcon#flushed, iclass 25, count 0 2006.229.13:49:19.48#ibcon#about to write, iclass 25, count 0 2006.229.13:49:19.48#ibcon#wrote, iclass 25, count 0 2006.229.13:49:19.48#ibcon#about to read 3, iclass 25, count 0 2006.229.13:49:19.50#ibcon#read 3, iclass 25, count 0 2006.229.13:49:19.50#ibcon#about to read 4, iclass 25, count 0 2006.229.13:49:19.50#ibcon#read 4, iclass 25, count 0 2006.229.13:49:19.50#ibcon#about to read 5, iclass 25, count 0 2006.229.13:49:19.50#ibcon#read 5, iclass 25, count 0 2006.229.13:49:19.50#ibcon#about to read 6, iclass 25, count 0 2006.229.13:49:19.50#ibcon#read 6, iclass 25, count 0 2006.229.13:49:19.50#ibcon#end of sib2, iclass 25, count 0 2006.229.13:49:19.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:49:19.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:49:19.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:49:19.50#ibcon#*before write, iclass 25, count 0 2006.229.13:49:19.50#ibcon#enter sib2, iclass 25, count 0 2006.229.13:49:19.50#ibcon#flushed, iclass 25, count 0 2006.229.13:49:19.50#ibcon#about to write, iclass 25, count 0 2006.229.13:49:19.50#ibcon#wrote, iclass 25, count 0 2006.229.13:49:19.50#ibcon#about to read 3, iclass 25, count 0 2006.229.13:49:19.54#ibcon#read 3, iclass 25, count 0 2006.229.13:49:19.54#ibcon#about to read 4, iclass 25, count 0 2006.229.13:49:19.54#ibcon#read 4, iclass 25, count 0 2006.229.13:49:19.54#ibcon#about to read 5, iclass 25, count 0 2006.229.13:49:19.54#ibcon#read 5, iclass 25, count 0 2006.229.13:49:19.54#ibcon#about to read 6, iclass 25, count 0 2006.229.13:49:19.54#ibcon#read 6, iclass 25, count 0 2006.229.13:49:19.54#ibcon#end of sib2, iclass 25, count 0 2006.229.13:49:19.54#ibcon#*after write, iclass 25, count 0 2006.229.13:49:19.54#ibcon#*before return 0, iclass 25, count 0 2006.229.13:49:19.54#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:19.54#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:19.54#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:49:19.54#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:49:19.54$vck44/va=5,4 2006.229.13:49:19.54#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.13:49:19.54#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.13:49:19.54#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:19.54#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:19.60#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:19.60#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:19.60#ibcon#enter wrdev, iclass 27, count 2 2006.229.13:49:19.60#ibcon#first serial, iclass 27, count 2 2006.229.13:49:19.60#ibcon#enter sib2, iclass 27, count 2 2006.229.13:49:19.60#ibcon#flushed, iclass 27, count 2 2006.229.13:49:19.60#ibcon#about to write, iclass 27, count 2 2006.229.13:49:19.60#ibcon#wrote, iclass 27, count 2 2006.229.13:49:19.60#ibcon#about to read 3, iclass 27, count 2 2006.229.13:49:19.62#ibcon#read 3, iclass 27, count 2 2006.229.13:49:19.62#ibcon#about to read 4, iclass 27, count 2 2006.229.13:49:19.62#ibcon#read 4, iclass 27, count 2 2006.229.13:49:19.62#ibcon#about to read 5, iclass 27, count 2 2006.229.13:49:19.62#ibcon#read 5, iclass 27, count 2 2006.229.13:49:19.62#ibcon#about to read 6, iclass 27, count 2 2006.229.13:49:19.62#ibcon#read 6, iclass 27, count 2 2006.229.13:49:19.62#ibcon#end of sib2, iclass 27, count 2 2006.229.13:49:19.62#ibcon#*mode == 0, iclass 27, count 2 2006.229.13:49:19.62#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.13:49:19.62#ibcon#[25=AT05-04\r\n] 2006.229.13:49:19.62#ibcon#*before write, iclass 27, count 2 2006.229.13:49:19.62#ibcon#enter sib2, iclass 27, count 2 2006.229.13:49:19.62#ibcon#flushed, iclass 27, count 2 2006.229.13:49:19.62#ibcon#about to write, iclass 27, count 2 2006.229.13:49:19.62#ibcon#wrote, iclass 27, count 2 2006.229.13:49:19.62#ibcon#about to read 3, iclass 27, count 2 2006.229.13:49:19.65#ibcon#read 3, iclass 27, count 2 2006.229.13:49:19.65#ibcon#about to read 4, iclass 27, count 2 2006.229.13:49:19.65#ibcon#read 4, iclass 27, count 2 2006.229.13:49:19.65#ibcon#about to read 5, iclass 27, count 2 2006.229.13:49:19.65#ibcon#read 5, iclass 27, count 2 2006.229.13:49:19.65#ibcon#about to read 6, iclass 27, count 2 2006.229.13:49:19.65#ibcon#read 6, iclass 27, count 2 2006.229.13:49:19.65#ibcon#end of sib2, iclass 27, count 2 2006.229.13:49:19.65#ibcon#*after write, iclass 27, count 2 2006.229.13:49:19.65#ibcon#*before return 0, iclass 27, count 2 2006.229.13:49:19.65#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:19.65#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:19.65#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.13:49:19.65#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:19.65#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:19.77#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:19.77#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:19.77#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:49:19.77#ibcon#first serial, iclass 27, count 0 2006.229.13:49:19.77#ibcon#enter sib2, iclass 27, count 0 2006.229.13:49:19.77#ibcon#flushed, iclass 27, count 0 2006.229.13:49:19.77#ibcon#about to write, iclass 27, count 0 2006.229.13:49:19.77#ibcon#wrote, iclass 27, count 0 2006.229.13:49:19.77#ibcon#about to read 3, iclass 27, count 0 2006.229.13:49:19.79#ibcon#read 3, iclass 27, count 0 2006.229.13:49:19.79#ibcon#about to read 4, iclass 27, count 0 2006.229.13:49:19.79#ibcon#read 4, iclass 27, count 0 2006.229.13:49:19.79#ibcon#about to read 5, iclass 27, count 0 2006.229.13:49:19.79#ibcon#read 5, iclass 27, count 0 2006.229.13:49:19.79#ibcon#about to read 6, iclass 27, count 0 2006.229.13:49:19.79#ibcon#read 6, iclass 27, count 0 2006.229.13:49:19.79#ibcon#end of sib2, iclass 27, count 0 2006.229.13:49:19.79#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:49:19.79#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:49:19.79#ibcon#[25=USB\r\n] 2006.229.13:49:19.79#ibcon#*before write, iclass 27, count 0 2006.229.13:49:19.79#ibcon#enter sib2, iclass 27, count 0 2006.229.13:49:19.79#ibcon#flushed, iclass 27, count 0 2006.229.13:49:19.79#ibcon#about to write, iclass 27, count 0 2006.229.13:49:19.79#ibcon#wrote, iclass 27, count 0 2006.229.13:49:19.79#ibcon#about to read 3, iclass 27, count 0 2006.229.13:49:19.82#ibcon#read 3, iclass 27, count 0 2006.229.13:49:19.82#ibcon#about to read 4, iclass 27, count 0 2006.229.13:49:19.82#ibcon#read 4, iclass 27, count 0 2006.229.13:49:19.82#ibcon#about to read 5, iclass 27, count 0 2006.229.13:49:19.82#ibcon#read 5, iclass 27, count 0 2006.229.13:49:19.82#ibcon#about to read 6, iclass 27, count 0 2006.229.13:49:19.82#ibcon#read 6, iclass 27, count 0 2006.229.13:49:19.82#ibcon#end of sib2, iclass 27, count 0 2006.229.13:49:19.82#ibcon#*after write, iclass 27, count 0 2006.229.13:49:19.82#ibcon#*before return 0, iclass 27, count 0 2006.229.13:49:19.82#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:19.82#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:19.82#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:49:19.82#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:49:19.82$vck44/valo=6,814.99 2006.229.13:49:19.82#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:49:19.82#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:49:19.82#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:19.82#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:19.82#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:19.82#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:19.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:49:19.82#ibcon#first serial, iclass 29, count 0 2006.229.13:49:19.82#ibcon#enter sib2, iclass 29, count 0 2006.229.13:49:19.82#ibcon#flushed, iclass 29, count 0 2006.229.13:49:19.82#ibcon#about to write, iclass 29, count 0 2006.229.13:49:19.82#ibcon#wrote, iclass 29, count 0 2006.229.13:49:19.82#ibcon#about to read 3, iclass 29, count 0 2006.229.13:49:19.84#ibcon#read 3, iclass 29, count 0 2006.229.13:49:19.84#ibcon#about to read 4, iclass 29, count 0 2006.229.13:49:19.84#ibcon#read 4, iclass 29, count 0 2006.229.13:49:19.84#ibcon#about to read 5, iclass 29, count 0 2006.229.13:49:19.84#ibcon#read 5, iclass 29, count 0 2006.229.13:49:19.84#ibcon#about to read 6, iclass 29, count 0 2006.229.13:49:19.84#ibcon#read 6, iclass 29, count 0 2006.229.13:49:19.84#ibcon#end of sib2, iclass 29, count 0 2006.229.13:49:19.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:49:19.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:49:19.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:49:19.84#ibcon#*before write, iclass 29, count 0 2006.229.13:49:19.84#ibcon#enter sib2, iclass 29, count 0 2006.229.13:49:19.84#ibcon#flushed, iclass 29, count 0 2006.229.13:49:19.84#ibcon#about to write, iclass 29, count 0 2006.229.13:49:19.84#ibcon#wrote, iclass 29, count 0 2006.229.13:49:19.84#ibcon#about to read 3, iclass 29, count 0 2006.229.13:49:19.88#ibcon#read 3, iclass 29, count 0 2006.229.13:49:19.88#ibcon#about to read 4, iclass 29, count 0 2006.229.13:49:19.88#ibcon#read 4, iclass 29, count 0 2006.229.13:49:19.88#ibcon#about to read 5, iclass 29, count 0 2006.229.13:49:19.88#ibcon#read 5, iclass 29, count 0 2006.229.13:49:19.88#ibcon#about to read 6, iclass 29, count 0 2006.229.13:49:19.88#ibcon#read 6, iclass 29, count 0 2006.229.13:49:19.88#ibcon#end of sib2, iclass 29, count 0 2006.229.13:49:19.88#ibcon#*after write, iclass 29, count 0 2006.229.13:49:19.88#ibcon#*before return 0, iclass 29, count 0 2006.229.13:49:19.88#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:19.88#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:19.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:49:19.88#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:49:19.88$vck44/va=6,4 2006.229.13:49:19.88#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.13:49:19.88#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.13:49:19.88#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:19.88#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:19.94#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:19.94#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:19.94#ibcon#enter wrdev, iclass 31, count 2 2006.229.13:49:19.94#ibcon#first serial, iclass 31, count 2 2006.229.13:49:19.94#ibcon#enter sib2, iclass 31, count 2 2006.229.13:49:19.94#ibcon#flushed, iclass 31, count 2 2006.229.13:49:19.94#ibcon#about to write, iclass 31, count 2 2006.229.13:49:19.94#ibcon#wrote, iclass 31, count 2 2006.229.13:49:19.94#ibcon#about to read 3, iclass 31, count 2 2006.229.13:49:19.96#ibcon#read 3, iclass 31, count 2 2006.229.13:49:19.96#ibcon#about to read 4, iclass 31, count 2 2006.229.13:49:19.96#ibcon#read 4, iclass 31, count 2 2006.229.13:49:19.96#ibcon#about to read 5, iclass 31, count 2 2006.229.13:49:19.96#ibcon#read 5, iclass 31, count 2 2006.229.13:49:19.96#ibcon#about to read 6, iclass 31, count 2 2006.229.13:49:19.96#ibcon#read 6, iclass 31, count 2 2006.229.13:49:19.96#ibcon#end of sib2, iclass 31, count 2 2006.229.13:49:19.96#ibcon#*mode == 0, iclass 31, count 2 2006.229.13:49:19.96#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.13:49:19.96#ibcon#[25=AT06-04\r\n] 2006.229.13:49:19.96#ibcon#*before write, iclass 31, count 2 2006.229.13:49:19.96#ibcon#enter sib2, iclass 31, count 2 2006.229.13:49:19.96#ibcon#flushed, iclass 31, count 2 2006.229.13:49:19.96#ibcon#about to write, iclass 31, count 2 2006.229.13:49:19.96#ibcon#wrote, iclass 31, count 2 2006.229.13:49:19.96#ibcon#about to read 3, iclass 31, count 2 2006.229.13:49:19.99#ibcon#read 3, iclass 31, count 2 2006.229.13:49:19.99#ibcon#about to read 4, iclass 31, count 2 2006.229.13:49:19.99#ibcon#read 4, iclass 31, count 2 2006.229.13:49:19.99#ibcon#about to read 5, iclass 31, count 2 2006.229.13:49:19.99#ibcon#read 5, iclass 31, count 2 2006.229.13:49:19.99#ibcon#about to read 6, iclass 31, count 2 2006.229.13:49:19.99#ibcon#read 6, iclass 31, count 2 2006.229.13:49:19.99#ibcon#end of sib2, iclass 31, count 2 2006.229.13:49:19.99#ibcon#*after write, iclass 31, count 2 2006.229.13:49:19.99#ibcon#*before return 0, iclass 31, count 2 2006.229.13:49:19.99#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:19.99#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:19.99#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.13:49:19.99#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:19.99#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:20.11#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:20.11#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:20.11#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:49:20.11#ibcon#first serial, iclass 31, count 0 2006.229.13:49:20.11#ibcon#enter sib2, iclass 31, count 0 2006.229.13:49:20.11#ibcon#flushed, iclass 31, count 0 2006.229.13:49:20.11#ibcon#about to write, iclass 31, count 0 2006.229.13:49:20.11#ibcon#wrote, iclass 31, count 0 2006.229.13:49:20.11#ibcon#about to read 3, iclass 31, count 0 2006.229.13:49:20.13#ibcon#read 3, iclass 31, count 0 2006.229.13:49:20.13#ibcon#about to read 4, iclass 31, count 0 2006.229.13:49:20.13#ibcon#read 4, iclass 31, count 0 2006.229.13:49:20.13#ibcon#about to read 5, iclass 31, count 0 2006.229.13:49:20.13#ibcon#read 5, iclass 31, count 0 2006.229.13:49:20.13#ibcon#about to read 6, iclass 31, count 0 2006.229.13:49:20.13#ibcon#read 6, iclass 31, count 0 2006.229.13:49:20.13#ibcon#end of sib2, iclass 31, count 0 2006.229.13:49:20.13#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:49:20.13#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:49:20.13#ibcon#[25=USB\r\n] 2006.229.13:49:20.13#ibcon#*before write, iclass 31, count 0 2006.229.13:49:20.13#ibcon#enter sib2, iclass 31, count 0 2006.229.13:49:20.13#ibcon#flushed, iclass 31, count 0 2006.229.13:49:20.13#ibcon#about to write, iclass 31, count 0 2006.229.13:49:20.13#ibcon#wrote, iclass 31, count 0 2006.229.13:49:20.13#ibcon#about to read 3, iclass 31, count 0 2006.229.13:49:20.16#ibcon#read 3, iclass 31, count 0 2006.229.13:49:20.16#ibcon#about to read 4, iclass 31, count 0 2006.229.13:49:20.16#ibcon#read 4, iclass 31, count 0 2006.229.13:49:20.16#ibcon#about to read 5, iclass 31, count 0 2006.229.13:49:20.16#ibcon#read 5, iclass 31, count 0 2006.229.13:49:20.16#ibcon#about to read 6, iclass 31, count 0 2006.229.13:49:20.16#ibcon#read 6, iclass 31, count 0 2006.229.13:49:20.16#ibcon#end of sib2, iclass 31, count 0 2006.229.13:49:20.16#ibcon#*after write, iclass 31, count 0 2006.229.13:49:20.16#ibcon#*before return 0, iclass 31, count 0 2006.229.13:49:20.16#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:20.16#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:20.16#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:49:20.16#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:49:20.16$vck44/valo=7,864.99 2006.229.13:49:20.16#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.13:49:20.16#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.13:49:20.16#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:20.16#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:20.16#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:20.16#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:20.16#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:49:20.16#ibcon#first serial, iclass 33, count 0 2006.229.13:49:20.16#ibcon#enter sib2, iclass 33, count 0 2006.229.13:49:20.16#ibcon#flushed, iclass 33, count 0 2006.229.13:49:20.16#ibcon#about to write, iclass 33, count 0 2006.229.13:49:20.16#ibcon#wrote, iclass 33, count 0 2006.229.13:49:20.16#ibcon#about to read 3, iclass 33, count 0 2006.229.13:49:20.18#ibcon#read 3, iclass 33, count 0 2006.229.13:49:20.18#ibcon#about to read 4, iclass 33, count 0 2006.229.13:49:20.18#ibcon#read 4, iclass 33, count 0 2006.229.13:49:20.18#ibcon#about to read 5, iclass 33, count 0 2006.229.13:49:20.18#ibcon#read 5, iclass 33, count 0 2006.229.13:49:20.18#ibcon#about to read 6, iclass 33, count 0 2006.229.13:49:20.18#ibcon#read 6, iclass 33, count 0 2006.229.13:49:20.18#ibcon#end of sib2, iclass 33, count 0 2006.229.13:49:20.18#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:49:20.18#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:49:20.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:49:20.18#ibcon#*before write, iclass 33, count 0 2006.229.13:49:20.18#ibcon#enter sib2, iclass 33, count 0 2006.229.13:49:20.18#ibcon#flushed, iclass 33, count 0 2006.229.13:49:20.18#ibcon#about to write, iclass 33, count 0 2006.229.13:49:20.18#ibcon#wrote, iclass 33, count 0 2006.229.13:49:20.18#ibcon#about to read 3, iclass 33, count 0 2006.229.13:49:20.22#ibcon#read 3, iclass 33, count 0 2006.229.13:49:20.22#ibcon#about to read 4, iclass 33, count 0 2006.229.13:49:20.22#ibcon#read 4, iclass 33, count 0 2006.229.13:49:20.22#ibcon#about to read 5, iclass 33, count 0 2006.229.13:49:20.22#ibcon#read 5, iclass 33, count 0 2006.229.13:49:20.22#ibcon#about to read 6, iclass 33, count 0 2006.229.13:49:20.22#ibcon#read 6, iclass 33, count 0 2006.229.13:49:20.22#ibcon#end of sib2, iclass 33, count 0 2006.229.13:49:20.22#ibcon#*after write, iclass 33, count 0 2006.229.13:49:20.22#ibcon#*before return 0, iclass 33, count 0 2006.229.13:49:20.22#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:20.22#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:20.22#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:49:20.22#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:49:20.22$vck44/va=7,5 2006.229.13:49:20.22#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.13:49:20.22#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.13:49:20.22#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:20.22#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:20.28#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:20.28#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:20.28#ibcon#enter wrdev, iclass 35, count 2 2006.229.13:49:20.28#ibcon#first serial, iclass 35, count 2 2006.229.13:49:20.28#ibcon#enter sib2, iclass 35, count 2 2006.229.13:49:20.28#ibcon#flushed, iclass 35, count 2 2006.229.13:49:20.28#ibcon#about to write, iclass 35, count 2 2006.229.13:49:20.28#ibcon#wrote, iclass 35, count 2 2006.229.13:49:20.28#ibcon#about to read 3, iclass 35, count 2 2006.229.13:49:20.30#ibcon#read 3, iclass 35, count 2 2006.229.13:49:20.30#ibcon#about to read 4, iclass 35, count 2 2006.229.13:49:20.30#ibcon#read 4, iclass 35, count 2 2006.229.13:49:20.30#ibcon#about to read 5, iclass 35, count 2 2006.229.13:49:20.30#ibcon#read 5, iclass 35, count 2 2006.229.13:49:20.30#ibcon#about to read 6, iclass 35, count 2 2006.229.13:49:20.30#ibcon#read 6, iclass 35, count 2 2006.229.13:49:20.30#ibcon#end of sib2, iclass 35, count 2 2006.229.13:49:20.30#ibcon#*mode == 0, iclass 35, count 2 2006.229.13:49:20.30#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.13:49:20.30#ibcon#[25=AT07-05\r\n] 2006.229.13:49:20.30#ibcon#*before write, iclass 35, count 2 2006.229.13:49:20.30#ibcon#enter sib2, iclass 35, count 2 2006.229.13:49:20.30#ibcon#flushed, iclass 35, count 2 2006.229.13:49:20.30#ibcon#about to write, iclass 35, count 2 2006.229.13:49:20.30#ibcon#wrote, iclass 35, count 2 2006.229.13:49:20.30#ibcon#about to read 3, iclass 35, count 2 2006.229.13:49:20.33#ibcon#read 3, iclass 35, count 2 2006.229.13:49:20.33#ibcon#about to read 4, iclass 35, count 2 2006.229.13:49:20.33#ibcon#read 4, iclass 35, count 2 2006.229.13:49:20.33#ibcon#about to read 5, iclass 35, count 2 2006.229.13:49:20.33#ibcon#read 5, iclass 35, count 2 2006.229.13:49:20.33#ibcon#about to read 6, iclass 35, count 2 2006.229.13:49:20.33#ibcon#read 6, iclass 35, count 2 2006.229.13:49:20.33#ibcon#end of sib2, iclass 35, count 2 2006.229.13:49:20.33#ibcon#*after write, iclass 35, count 2 2006.229.13:49:20.33#ibcon#*before return 0, iclass 35, count 2 2006.229.13:49:20.33#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:20.33#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:20.33#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.13:49:20.33#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:20.33#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:20.45#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:20.45#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:20.45#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:49:20.45#ibcon#first serial, iclass 35, count 0 2006.229.13:49:20.45#ibcon#enter sib2, iclass 35, count 0 2006.229.13:49:20.45#ibcon#flushed, iclass 35, count 0 2006.229.13:49:20.45#ibcon#about to write, iclass 35, count 0 2006.229.13:49:20.45#ibcon#wrote, iclass 35, count 0 2006.229.13:49:20.45#ibcon#about to read 3, iclass 35, count 0 2006.229.13:49:20.47#ibcon#read 3, iclass 35, count 0 2006.229.13:49:20.47#ibcon#about to read 4, iclass 35, count 0 2006.229.13:49:20.47#ibcon#read 4, iclass 35, count 0 2006.229.13:49:20.47#ibcon#about to read 5, iclass 35, count 0 2006.229.13:49:20.47#ibcon#read 5, iclass 35, count 0 2006.229.13:49:20.47#ibcon#about to read 6, iclass 35, count 0 2006.229.13:49:20.47#ibcon#read 6, iclass 35, count 0 2006.229.13:49:20.47#ibcon#end of sib2, iclass 35, count 0 2006.229.13:49:20.47#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:49:20.47#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:49:20.47#ibcon#[25=USB\r\n] 2006.229.13:49:20.47#ibcon#*before write, iclass 35, count 0 2006.229.13:49:20.47#ibcon#enter sib2, iclass 35, count 0 2006.229.13:49:20.47#ibcon#flushed, iclass 35, count 0 2006.229.13:49:20.47#ibcon#about to write, iclass 35, count 0 2006.229.13:49:20.47#ibcon#wrote, iclass 35, count 0 2006.229.13:49:20.47#ibcon#about to read 3, iclass 35, count 0 2006.229.13:49:20.50#ibcon#read 3, iclass 35, count 0 2006.229.13:49:20.50#ibcon#about to read 4, iclass 35, count 0 2006.229.13:49:20.50#ibcon#read 4, iclass 35, count 0 2006.229.13:49:20.50#ibcon#about to read 5, iclass 35, count 0 2006.229.13:49:20.50#ibcon#read 5, iclass 35, count 0 2006.229.13:49:20.50#ibcon#about to read 6, iclass 35, count 0 2006.229.13:49:20.50#ibcon#read 6, iclass 35, count 0 2006.229.13:49:20.50#ibcon#end of sib2, iclass 35, count 0 2006.229.13:49:20.50#ibcon#*after write, iclass 35, count 0 2006.229.13:49:20.50#ibcon#*before return 0, iclass 35, count 0 2006.229.13:49:20.50#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:20.50#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:20.50#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:49:20.50#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:49:20.50$vck44/valo=8,884.99 2006.229.13:49:20.50#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.13:49:20.50#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.13:49:20.50#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:20.50#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:20.50#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:20.50#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:20.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:49:20.50#ibcon#first serial, iclass 37, count 0 2006.229.13:49:20.50#ibcon#enter sib2, iclass 37, count 0 2006.229.13:49:20.50#ibcon#flushed, iclass 37, count 0 2006.229.13:49:20.50#ibcon#about to write, iclass 37, count 0 2006.229.13:49:20.50#ibcon#wrote, iclass 37, count 0 2006.229.13:49:20.50#ibcon#about to read 3, iclass 37, count 0 2006.229.13:49:20.52#ibcon#read 3, iclass 37, count 0 2006.229.13:49:20.52#ibcon#about to read 4, iclass 37, count 0 2006.229.13:49:20.52#ibcon#read 4, iclass 37, count 0 2006.229.13:49:20.52#ibcon#about to read 5, iclass 37, count 0 2006.229.13:49:20.52#ibcon#read 5, iclass 37, count 0 2006.229.13:49:20.52#ibcon#about to read 6, iclass 37, count 0 2006.229.13:49:20.52#ibcon#read 6, iclass 37, count 0 2006.229.13:49:20.52#ibcon#end of sib2, iclass 37, count 0 2006.229.13:49:20.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:49:20.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:49:20.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:49:20.52#ibcon#*before write, iclass 37, count 0 2006.229.13:49:20.52#ibcon#enter sib2, iclass 37, count 0 2006.229.13:49:20.52#ibcon#flushed, iclass 37, count 0 2006.229.13:49:20.52#ibcon#about to write, iclass 37, count 0 2006.229.13:49:20.52#ibcon#wrote, iclass 37, count 0 2006.229.13:49:20.52#ibcon#about to read 3, iclass 37, count 0 2006.229.13:49:20.56#ibcon#read 3, iclass 37, count 0 2006.229.13:49:20.56#ibcon#about to read 4, iclass 37, count 0 2006.229.13:49:20.56#ibcon#read 4, iclass 37, count 0 2006.229.13:49:20.56#ibcon#about to read 5, iclass 37, count 0 2006.229.13:49:20.56#ibcon#read 5, iclass 37, count 0 2006.229.13:49:20.56#ibcon#about to read 6, iclass 37, count 0 2006.229.13:49:20.56#ibcon#read 6, iclass 37, count 0 2006.229.13:49:20.56#ibcon#end of sib2, iclass 37, count 0 2006.229.13:49:20.56#ibcon#*after write, iclass 37, count 0 2006.229.13:49:20.56#ibcon#*before return 0, iclass 37, count 0 2006.229.13:49:20.56#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:20.56#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:20.56#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:49:20.56#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:49:20.56$vck44/va=8,6 2006.229.13:49:20.56#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.13:49:20.56#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.13:49:20.56#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:20.56#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:49:20.62#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:49:20.62#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:49:20.62#ibcon#enter wrdev, iclass 39, count 2 2006.229.13:49:20.62#ibcon#first serial, iclass 39, count 2 2006.229.13:49:20.62#ibcon#enter sib2, iclass 39, count 2 2006.229.13:49:20.62#ibcon#flushed, iclass 39, count 2 2006.229.13:49:20.62#ibcon#about to write, iclass 39, count 2 2006.229.13:49:20.62#ibcon#wrote, iclass 39, count 2 2006.229.13:49:20.62#ibcon#about to read 3, iclass 39, count 2 2006.229.13:49:20.64#ibcon#read 3, iclass 39, count 2 2006.229.13:49:20.64#ibcon#about to read 4, iclass 39, count 2 2006.229.13:49:20.64#ibcon#read 4, iclass 39, count 2 2006.229.13:49:20.64#ibcon#about to read 5, iclass 39, count 2 2006.229.13:49:20.64#ibcon#read 5, iclass 39, count 2 2006.229.13:49:20.64#ibcon#about to read 6, iclass 39, count 2 2006.229.13:49:20.64#ibcon#read 6, iclass 39, count 2 2006.229.13:49:20.64#ibcon#end of sib2, iclass 39, count 2 2006.229.13:49:20.64#ibcon#*mode == 0, iclass 39, count 2 2006.229.13:49:20.64#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.13:49:20.64#ibcon#[25=AT08-06\r\n] 2006.229.13:49:20.64#ibcon#*before write, iclass 39, count 2 2006.229.13:49:20.64#ibcon#enter sib2, iclass 39, count 2 2006.229.13:49:20.64#ibcon#flushed, iclass 39, count 2 2006.229.13:49:20.64#ibcon#about to write, iclass 39, count 2 2006.229.13:49:20.64#ibcon#wrote, iclass 39, count 2 2006.229.13:49:20.64#ibcon#about to read 3, iclass 39, count 2 2006.229.13:49:20.67#ibcon#read 3, iclass 39, count 2 2006.229.13:49:20.67#ibcon#about to read 4, iclass 39, count 2 2006.229.13:49:20.67#ibcon#read 4, iclass 39, count 2 2006.229.13:49:20.67#ibcon#about to read 5, iclass 39, count 2 2006.229.13:49:20.67#ibcon#read 5, iclass 39, count 2 2006.229.13:49:20.67#ibcon#about to read 6, iclass 39, count 2 2006.229.13:49:20.67#ibcon#read 6, iclass 39, count 2 2006.229.13:49:20.67#ibcon#end of sib2, iclass 39, count 2 2006.229.13:49:20.67#ibcon#*after write, iclass 39, count 2 2006.229.13:49:20.67#ibcon#*before return 0, iclass 39, count 2 2006.229.13:49:20.67#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:49:20.67#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.13:49:20.67#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.13:49:20.67#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:20.67#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:49:20.79#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:49:20.79#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:49:20.79#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:49:20.79#ibcon#first serial, iclass 39, count 0 2006.229.13:49:20.79#ibcon#enter sib2, iclass 39, count 0 2006.229.13:49:20.79#ibcon#flushed, iclass 39, count 0 2006.229.13:49:20.79#ibcon#about to write, iclass 39, count 0 2006.229.13:49:20.79#ibcon#wrote, iclass 39, count 0 2006.229.13:49:20.79#ibcon#about to read 3, iclass 39, count 0 2006.229.13:49:20.81#ibcon#read 3, iclass 39, count 0 2006.229.13:49:20.81#ibcon#about to read 4, iclass 39, count 0 2006.229.13:49:20.81#ibcon#read 4, iclass 39, count 0 2006.229.13:49:20.81#ibcon#about to read 5, iclass 39, count 0 2006.229.13:49:20.81#ibcon#read 5, iclass 39, count 0 2006.229.13:49:20.81#ibcon#about to read 6, iclass 39, count 0 2006.229.13:49:20.81#ibcon#read 6, iclass 39, count 0 2006.229.13:49:20.81#ibcon#end of sib2, iclass 39, count 0 2006.229.13:49:20.81#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:49:20.81#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:49:20.81#ibcon#[25=USB\r\n] 2006.229.13:49:20.81#ibcon#*before write, iclass 39, count 0 2006.229.13:49:20.81#ibcon#enter sib2, iclass 39, count 0 2006.229.13:49:20.81#ibcon#flushed, iclass 39, count 0 2006.229.13:49:20.81#ibcon#about to write, iclass 39, count 0 2006.229.13:49:20.81#ibcon#wrote, iclass 39, count 0 2006.229.13:49:20.81#ibcon#about to read 3, iclass 39, count 0 2006.229.13:49:20.84#ibcon#read 3, iclass 39, count 0 2006.229.13:49:20.84#ibcon#about to read 4, iclass 39, count 0 2006.229.13:49:20.84#ibcon#read 4, iclass 39, count 0 2006.229.13:49:20.84#ibcon#about to read 5, iclass 39, count 0 2006.229.13:49:20.84#ibcon#read 5, iclass 39, count 0 2006.229.13:49:20.84#ibcon#about to read 6, iclass 39, count 0 2006.229.13:49:20.84#ibcon#read 6, iclass 39, count 0 2006.229.13:49:20.84#ibcon#end of sib2, iclass 39, count 0 2006.229.13:49:20.84#ibcon#*after write, iclass 39, count 0 2006.229.13:49:20.84#ibcon#*before return 0, iclass 39, count 0 2006.229.13:49:20.84#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:49:20.84#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.13:49:20.84#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:49:20.84#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:49:20.84$vck44/vblo=1,629.99 2006.229.13:49:20.84#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.13:49:20.84#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.13:49:20.84#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:20.84#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:20.84#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:20.84#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:20.84#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:49:20.84#ibcon#first serial, iclass 3, count 0 2006.229.13:49:20.84#ibcon#enter sib2, iclass 3, count 0 2006.229.13:49:20.84#ibcon#flushed, iclass 3, count 0 2006.229.13:49:20.84#ibcon#about to write, iclass 3, count 0 2006.229.13:49:20.84#ibcon#wrote, iclass 3, count 0 2006.229.13:49:20.84#ibcon#about to read 3, iclass 3, count 0 2006.229.13:49:20.86#ibcon#read 3, iclass 3, count 0 2006.229.13:49:20.86#ibcon#about to read 4, iclass 3, count 0 2006.229.13:49:20.86#ibcon#read 4, iclass 3, count 0 2006.229.13:49:20.86#ibcon#about to read 5, iclass 3, count 0 2006.229.13:49:20.86#ibcon#read 5, iclass 3, count 0 2006.229.13:49:20.86#ibcon#about to read 6, iclass 3, count 0 2006.229.13:49:20.86#ibcon#read 6, iclass 3, count 0 2006.229.13:49:20.86#ibcon#end of sib2, iclass 3, count 0 2006.229.13:49:20.86#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:49:20.86#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:49:20.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:49:20.86#ibcon#*before write, iclass 3, count 0 2006.229.13:49:20.86#ibcon#enter sib2, iclass 3, count 0 2006.229.13:49:20.86#ibcon#flushed, iclass 3, count 0 2006.229.13:49:20.86#ibcon#about to write, iclass 3, count 0 2006.229.13:49:20.86#ibcon#wrote, iclass 3, count 0 2006.229.13:49:20.86#ibcon#about to read 3, iclass 3, count 0 2006.229.13:49:20.90#ibcon#read 3, iclass 3, count 0 2006.229.13:49:20.90#ibcon#about to read 4, iclass 3, count 0 2006.229.13:49:20.90#ibcon#read 4, iclass 3, count 0 2006.229.13:49:20.90#ibcon#about to read 5, iclass 3, count 0 2006.229.13:49:20.90#ibcon#read 5, iclass 3, count 0 2006.229.13:49:20.90#ibcon#about to read 6, iclass 3, count 0 2006.229.13:49:20.90#ibcon#read 6, iclass 3, count 0 2006.229.13:49:20.90#ibcon#end of sib2, iclass 3, count 0 2006.229.13:49:20.90#ibcon#*after write, iclass 3, count 0 2006.229.13:49:20.90#ibcon#*before return 0, iclass 3, count 0 2006.229.13:49:20.90#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:20.90#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.13:49:20.90#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:49:20.90#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:49:20.90$vck44/vb=1,4 2006.229.13:49:20.90#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.13:49:20.90#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.13:49:20.90#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:20.90#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:20.90#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:20.90#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:20.90#ibcon#enter wrdev, iclass 5, count 2 2006.229.13:49:20.90#ibcon#first serial, iclass 5, count 2 2006.229.13:49:20.90#ibcon#enter sib2, iclass 5, count 2 2006.229.13:49:20.90#ibcon#flushed, iclass 5, count 2 2006.229.13:49:20.90#ibcon#about to write, iclass 5, count 2 2006.229.13:49:20.90#ibcon#wrote, iclass 5, count 2 2006.229.13:49:20.90#ibcon#about to read 3, iclass 5, count 2 2006.229.13:49:20.92#ibcon#read 3, iclass 5, count 2 2006.229.13:49:20.92#ibcon#about to read 4, iclass 5, count 2 2006.229.13:49:20.92#ibcon#read 4, iclass 5, count 2 2006.229.13:49:20.92#ibcon#about to read 5, iclass 5, count 2 2006.229.13:49:20.92#ibcon#read 5, iclass 5, count 2 2006.229.13:49:20.92#ibcon#about to read 6, iclass 5, count 2 2006.229.13:49:20.92#ibcon#read 6, iclass 5, count 2 2006.229.13:49:20.92#ibcon#end of sib2, iclass 5, count 2 2006.229.13:49:20.92#ibcon#*mode == 0, iclass 5, count 2 2006.229.13:49:20.92#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.13:49:20.92#ibcon#[27=AT01-04\r\n] 2006.229.13:49:20.92#ibcon#*before write, iclass 5, count 2 2006.229.13:49:20.92#ibcon#enter sib2, iclass 5, count 2 2006.229.13:49:20.92#ibcon#flushed, iclass 5, count 2 2006.229.13:49:20.92#ibcon#about to write, iclass 5, count 2 2006.229.13:49:20.92#ibcon#wrote, iclass 5, count 2 2006.229.13:49:20.92#ibcon#about to read 3, iclass 5, count 2 2006.229.13:49:20.95#ibcon#read 3, iclass 5, count 2 2006.229.13:49:20.95#ibcon#about to read 4, iclass 5, count 2 2006.229.13:49:20.95#ibcon#read 4, iclass 5, count 2 2006.229.13:49:20.95#ibcon#about to read 5, iclass 5, count 2 2006.229.13:49:20.95#ibcon#read 5, iclass 5, count 2 2006.229.13:49:20.95#ibcon#about to read 6, iclass 5, count 2 2006.229.13:49:20.95#ibcon#read 6, iclass 5, count 2 2006.229.13:49:20.95#ibcon#end of sib2, iclass 5, count 2 2006.229.13:49:20.95#ibcon#*after write, iclass 5, count 2 2006.229.13:49:20.95#ibcon#*before return 0, iclass 5, count 2 2006.229.13:49:20.95#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:20.95#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.13:49:20.95#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.13:49:20.95#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:20.95#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:21.07#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:21.07#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:21.07#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:49:21.07#ibcon#first serial, iclass 5, count 0 2006.229.13:49:21.07#ibcon#enter sib2, iclass 5, count 0 2006.229.13:49:21.07#ibcon#flushed, iclass 5, count 0 2006.229.13:49:21.07#ibcon#about to write, iclass 5, count 0 2006.229.13:49:21.07#ibcon#wrote, iclass 5, count 0 2006.229.13:49:21.07#ibcon#about to read 3, iclass 5, count 0 2006.229.13:49:21.09#ibcon#read 3, iclass 5, count 0 2006.229.13:49:21.09#ibcon#about to read 4, iclass 5, count 0 2006.229.13:49:21.09#ibcon#read 4, iclass 5, count 0 2006.229.13:49:21.09#ibcon#about to read 5, iclass 5, count 0 2006.229.13:49:21.09#ibcon#read 5, iclass 5, count 0 2006.229.13:49:21.09#ibcon#about to read 6, iclass 5, count 0 2006.229.13:49:21.09#ibcon#read 6, iclass 5, count 0 2006.229.13:49:21.09#ibcon#end of sib2, iclass 5, count 0 2006.229.13:49:21.09#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:49:21.09#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:49:21.09#ibcon#[27=USB\r\n] 2006.229.13:49:21.09#ibcon#*before write, iclass 5, count 0 2006.229.13:49:21.09#ibcon#enter sib2, iclass 5, count 0 2006.229.13:49:21.09#ibcon#flushed, iclass 5, count 0 2006.229.13:49:21.09#ibcon#about to write, iclass 5, count 0 2006.229.13:49:21.09#ibcon#wrote, iclass 5, count 0 2006.229.13:49:21.09#ibcon#about to read 3, iclass 5, count 0 2006.229.13:49:21.12#ibcon#read 3, iclass 5, count 0 2006.229.13:49:21.12#ibcon#about to read 4, iclass 5, count 0 2006.229.13:49:21.12#ibcon#read 4, iclass 5, count 0 2006.229.13:49:21.12#ibcon#about to read 5, iclass 5, count 0 2006.229.13:49:21.12#ibcon#read 5, iclass 5, count 0 2006.229.13:49:21.12#ibcon#about to read 6, iclass 5, count 0 2006.229.13:49:21.12#ibcon#read 6, iclass 5, count 0 2006.229.13:49:21.12#ibcon#end of sib2, iclass 5, count 0 2006.229.13:49:21.12#ibcon#*after write, iclass 5, count 0 2006.229.13:49:21.12#ibcon#*before return 0, iclass 5, count 0 2006.229.13:49:21.12#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:21.12#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.13:49:21.12#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:49:21.12#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:49:21.12$vck44/vblo=2,634.99 2006.229.13:49:21.12#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.13:49:21.12#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.13:49:21.12#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:21.12#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:21.12#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:21.12#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:21.12#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:49:21.12#ibcon#first serial, iclass 7, count 0 2006.229.13:49:21.12#ibcon#enter sib2, iclass 7, count 0 2006.229.13:49:21.12#ibcon#flushed, iclass 7, count 0 2006.229.13:49:21.12#ibcon#about to write, iclass 7, count 0 2006.229.13:49:21.12#ibcon#wrote, iclass 7, count 0 2006.229.13:49:21.12#ibcon#about to read 3, iclass 7, count 0 2006.229.13:49:21.14#ibcon#read 3, iclass 7, count 0 2006.229.13:49:21.14#ibcon#about to read 4, iclass 7, count 0 2006.229.13:49:21.14#ibcon#read 4, iclass 7, count 0 2006.229.13:49:21.14#ibcon#about to read 5, iclass 7, count 0 2006.229.13:49:21.14#ibcon#read 5, iclass 7, count 0 2006.229.13:49:21.14#ibcon#about to read 6, iclass 7, count 0 2006.229.13:49:21.14#ibcon#read 6, iclass 7, count 0 2006.229.13:49:21.14#ibcon#end of sib2, iclass 7, count 0 2006.229.13:49:21.14#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:49:21.14#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:49:21.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:49:21.14#ibcon#*before write, iclass 7, count 0 2006.229.13:49:21.14#ibcon#enter sib2, iclass 7, count 0 2006.229.13:49:21.14#ibcon#flushed, iclass 7, count 0 2006.229.13:49:21.14#ibcon#about to write, iclass 7, count 0 2006.229.13:49:21.14#ibcon#wrote, iclass 7, count 0 2006.229.13:49:21.14#ibcon#about to read 3, iclass 7, count 0 2006.229.13:49:21.18#ibcon#read 3, iclass 7, count 0 2006.229.13:49:21.18#ibcon#about to read 4, iclass 7, count 0 2006.229.13:49:21.18#ibcon#read 4, iclass 7, count 0 2006.229.13:49:21.18#ibcon#about to read 5, iclass 7, count 0 2006.229.13:49:21.18#ibcon#read 5, iclass 7, count 0 2006.229.13:49:21.18#ibcon#about to read 6, iclass 7, count 0 2006.229.13:49:21.18#ibcon#read 6, iclass 7, count 0 2006.229.13:49:21.18#ibcon#end of sib2, iclass 7, count 0 2006.229.13:49:21.18#ibcon#*after write, iclass 7, count 0 2006.229.13:49:21.18#ibcon#*before return 0, iclass 7, count 0 2006.229.13:49:21.18#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:21.18#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.13:49:21.18#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:49:21.18#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:49:21.18$vck44/vb=2,4 2006.229.13:49:21.18#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.13:49:21.18#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.13:49:21.18#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:21.18#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:49:21.24#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:49:21.24#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:49:21.24#ibcon#enter wrdev, iclass 11, count 2 2006.229.13:49:21.24#ibcon#first serial, iclass 11, count 2 2006.229.13:49:21.24#ibcon#enter sib2, iclass 11, count 2 2006.229.13:49:21.24#ibcon#flushed, iclass 11, count 2 2006.229.13:49:21.24#ibcon#about to write, iclass 11, count 2 2006.229.13:49:21.24#ibcon#wrote, iclass 11, count 2 2006.229.13:49:21.24#ibcon#about to read 3, iclass 11, count 2 2006.229.13:49:21.26#ibcon#read 3, iclass 11, count 2 2006.229.13:49:21.26#ibcon#about to read 4, iclass 11, count 2 2006.229.13:49:21.26#ibcon#read 4, iclass 11, count 2 2006.229.13:49:21.26#ibcon#about to read 5, iclass 11, count 2 2006.229.13:49:21.26#ibcon#read 5, iclass 11, count 2 2006.229.13:49:21.26#ibcon#about to read 6, iclass 11, count 2 2006.229.13:49:21.26#ibcon#read 6, iclass 11, count 2 2006.229.13:49:21.26#ibcon#end of sib2, iclass 11, count 2 2006.229.13:49:21.26#ibcon#*mode == 0, iclass 11, count 2 2006.229.13:49:21.26#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.13:49:21.26#ibcon#[27=AT02-04\r\n] 2006.229.13:49:21.26#ibcon#*before write, iclass 11, count 2 2006.229.13:49:21.26#ibcon#enter sib2, iclass 11, count 2 2006.229.13:49:21.26#ibcon#flushed, iclass 11, count 2 2006.229.13:49:21.26#ibcon#about to write, iclass 11, count 2 2006.229.13:49:21.26#ibcon#wrote, iclass 11, count 2 2006.229.13:49:21.26#ibcon#about to read 3, iclass 11, count 2 2006.229.13:49:21.29#ibcon#read 3, iclass 11, count 2 2006.229.13:49:21.29#ibcon#about to read 4, iclass 11, count 2 2006.229.13:49:21.29#ibcon#read 4, iclass 11, count 2 2006.229.13:49:21.29#ibcon#about to read 5, iclass 11, count 2 2006.229.13:49:21.29#ibcon#read 5, iclass 11, count 2 2006.229.13:49:21.29#ibcon#about to read 6, iclass 11, count 2 2006.229.13:49:21.29#ibcon#read 6, iclass 11, count 2 2006.229.13:49:21.29#ibcon#end of sib2, iclass 11, count 2 2006.229.13:49:21.29#ibcon#*after write, iclass 11, count 2 2006.229.13:49:21.29#ibcon#*before return 0, iclass 11, count 2 2006.229.13:49:21.29#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:49:21.29#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.13:49:21.29#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.13:49:21.29#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:21.29#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:49:21.41#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:49:21.41#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:49:21.41#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:49:21.41#ibcon#first serial, iclass 11, count 0 2006.229.13:49:21.41#ibcon#enter sib2, iclass 11, count 0 2006.229.13:49:21.41#ibcon#flushed, iclass 11, count 0 2006.229.13:49:21.41#ibcon#about to write, iclass 11, count 0 2006.229.13:49:21.41#ibcon#wrote, iclass 11, count 0 2006.229.13:49:21.41#ibcon#about to read 3, iclass 11, count 0 2006.229.13:49:21.43#ibcon#read 3, iclass 11, count 0 2006.229.13:49:21.43#ibcon#about to read 4, iclass 11, count 0 2006.229.13:49:21.43#ibcon#read 4, iclass 11, count 0 2006.229.13:49:21.43#ibcon#about to read 5, iclass 11, count 0 2006.229.13:49:21.43#ibcon#read 5, iclass 11, count 0 2006.229.13:49:21.43#ibcon#about to read 6, iclass 11, count 0 2006.229.13:49:21.43#ibcon#read 6, iclass 11, count 0 2006.229.13:49:21.43#ibcon#end of sib2, iclass 11, count 0 2006.229.13:49:21.43#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:49:21.43#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:49:21.43#ibcon#[27=USB\r\n] 2006.229.13:49:21.43#ibcon#*before write, iclass 11, count 0 2006.229.13:49:21.43#ibcon#enter sib2, iclass 11, count 0 2006.229.13:49:21.43#ibcon#flushed, iclass 11, count 0 2006.229.13:49:21.43#ibcon#about to write, iclass 11, count 0 2006.229.13:49:21.43#ibcon#wrote, iclass 11, count 0 2006.229.13:49:21.43#ibcon#about to read 3, iclass 11, count 0 2006.229.13:49:21.46#ibcon#read 3, iclass 11, count 0 2006.229.13:49:21.46#ibcon#about to read 4, iclass 11, count 0 2006.229.13:49:21.46#ibcon#read 4, iclass 11, count 0 2006.229.13:49:21.46#ibcon#about to read 5, iclass 11, count 0 2006.229.13:49:21.46#ibcon#read 5, iclass 11, count 0 2006.229.13:49:21.46#ibcon#about to read 6, iclass 11, count 0 2006.229.13:49:21.46#ibcon#read 6, iclass 11, count 0 2006.229.13:49:21.46#ibcon#end of sib2, iclass 11, count 0 2006.229.13:49:21.46#ibcon#*after write, iclass 11, count 0 2006.229.13:49:21.46#ibcon#*before return 0, iclass 11, count 0 2006.229.13:49:21.46#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:49:21.46#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.13:49:21.46#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:49:21.46#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:49:21.46$vck44/vblo=3,649.99 2006.229.13:49:21.46#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.13:49:21.46#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.13:49:21.46#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:21.46#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:49:21.46#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:49:21.46#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:49:21.46#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:49:21.46#ibcon#first serial, iclass 13, count 0 2006.229.13:49:21.46#ibcon#enter sib2, iclass 13, count 0 2006.229.13:49:21.46#ibcon#flushed, iclass 13, count 0 2006.229.13:49:21.46#ibcon#about to write, iclass 13, count 0 2006.229.13:49:21.46#ibcon#wrote, iclass 13, count 0 2006.229.13:49:21.46#ibcon#about to read 3, iclass 13, count 0 2006.229.13:49:21.48#ibcon#read 3, iclass 13, count 0 2006.229.13:49:21.48#ibcon#about to read 4, iclass 13, count 0 2006.229.13:49:21.48#ibcon#read 4, iclass 13, count 0 2006.229.13:49:21.48#ibcon#about to read 5, iclass 13, count 0 2006.229.13:49:21.48#ibcon#read 5, iclass 13, count 0 2006.229.13:49:21.48#ibcon#about to read 6, iclass 13, count 0 2006.229.13:49:21.48#ibcon#read 6, iclass 13, count 0 2006.229.13:49:21.48#ibcon#end of sib2, iclass 13, count 0 2006.229.13:49:21.48#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:49:21.48#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:49:21.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:49:21.48#ibcon#*before write, iclass 13, count 0 2006.229.13:49:21.48#ibcon#enter sib2, iclass 13, count 0 2006.229.13:49:21.48#ibcon#flushed, iclass 13, count 0 2006.229.13:49:21.48#ibcon#about to write, iclass 13, count 0 2006.229.13:49:21.48#ibcon#wrote, iclass 13, count 0 2006.229.13:49:21.48#ibcon#about to read 3, iclass 13, count 0 2006.229.13:49:21.52#ibcon#read 3, iclass 13, count 0 2006.229.13:49:21.52#ibcon#about to read 4, iclass 13, count 0 2006.229.13:49:21.52#ibcon#read 4, iclass 13, count 0 2006.229.13:49:21.52#ibcon#about to read 5, iclass 13, count 0 2006.229.13:49:21.52#ibcon#read 5, iclass 13, count 0 2006.229.13:49:21.52#ibcon#about to read 6, iclass 13, count 0 2006.229.13:49:21.52#ibcon#read 6, iclass 13, count 0 2006.229.13:49:21.52#ibcon#end of sib2, iclass 13, count 0 2006.229.13:49:21.52#ibcon#*after write, iclass 13, count 0 2006.229.13:49:21.52#ibcon#*before return 0, iclass 13, count 0 2006.229.13:49:21.52#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:49:21.52#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.13:49:21.52#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:49:21.52#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:49:21.52$vck44/vb=3,4 2006.229.13:49:21.52#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.13:49:21.52#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.13:49:21.52#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:21.52#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:49:21.58#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:49:21.58#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:49:21.58#ibcon#enter wrdev, iclass 15, count 2 2006.229.13:49:21.58#ibcon#first serial, iclass 15, count 2 2006.229.13:49:21.58#ibcon#enter sib2, iclass 15, count 2 2006.229.13:49:21.58#ibcon#flushed, iclass 15, count 2 2006.229.13:49:21.58#ibcon#about to write, iclass 15, count 2 2006.229.13:49:21.58#ibcon#wrote, iclass 15, count 2 2006.229.13:49:21.58#ibcon#about to read 3, iclass 15, count 2 2006.229.13:49:21.60#ibcon#read 3, iclass 15, count 2 2006.229.13:49:21.60#ibcon#about to read 4, iclass 15, count 2 2006.229.13:49:21.60#ibcon#read 4, iclass 15, count 2 2006.229.13:49:21.60#ibcon#about to read 5, iclass 15, count 2 2006.229.13:49:21.60#ibcon#read 5, iclass 15, count 2 2006.229.13:49:21.60#ibcon#about to read 6, iclass 15, count 2 2006.229.13:49:21.60#ibcon#read 6, iclass 15, count 2 2006.229.13:49:21.60#ibcon#end of sib2, iclass 15, count 2 2006.229.13:49:21.60#ibcon#*mode == 0, iclass 15, count 2 2006.229.13:49:21.60#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.13:49:21.60#ibcon#[27=AT03-04\r\n] 2006.229.13:49:21.60#ibcon#*before write, iclass 15, count 2 2006.229.13:49:21.60#ibcon#enter sib2, iclass 15, count 2 2006.229.13:49:21.60#ibcon#flushed, iclass 15, count 2 2006.229.13:49:21.60#ibcon#about to write, iclass 15, count 2 2006.229.13:49:21.60#ibcon#wrote, iclass 15, count 2 2006.229.13:49:21.60#ibcon#about to read 3, iclass 15, count 2 2006.229.13:49:21.63#ibcon#read 3, iclass 15, count 2 2006.229.13:49:21.63#ibcon#about to read 4, iclass 15, count 2 2006.229.13:49:21.63#ibcon#read 4, iclass 15, count 2 2006.229.13:49:21.63#ibcon#about to read 5, iclass 15, count 2 2006.229.13:49:21.63#ibcon#read 5, iclass 15, count 2 2006.229.13:49:21.63#ibcon#about to read 6, iclass 15, count 2 2006.229.13:49:21.63#ibcon#read 6, iclass 15, count 2 2006.229.13:49:21.63#ibcon#end of sib2, iclass 15, count 2 2006.229.13:49:21.63#ibcon#*after write, iclass 15, count 2 2006.229.13:49:21.63#ibcon#*before return 0, iclass 15, count 2 2006.229.13:49:21.63#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:49:21.63#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.13:49:21.63#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.13:49:21.63#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:21.63#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:49:21.75#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:49:21.75#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:49:21.75#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:49:21.75#ibcon#first serial, iclass 15, count 0 2006.229.13:49:21.75#ibcon#enter sib2, iclass 15, count 0 2006.229.13:49:21.75#ibcon#flushed, iclass 15, count 0 2006.229.13:49:21.75#ibcon#about to write, iclass 15, count 0 2006.229.13:49:21.75#ibcon#wrote, iclass 15, count 0 2006.229.13:49:21.75#ibcon#about to read 3, iclass 15, count 0 2006.229.13:49:21.77#ibcon#read 3, iclass 15, count 0 2006.229.13:49:21.77#ibcon#about to read 4, iclass 15, count 0 2006.229.13:49:21.77#ibcon#read 4, iclass 15, count 0 2006.229.13:49:21.77#ibcon#about to read 5, iclass 15, count 0 2006.229.13:49:21.77#ibcon#read 5, iclass 15, count 0 2006.229.13:49:21.77#ibcon#about to read 6, iclass 15, count 0 2006.229.13:49:21.77#ibcon#read 6, iclass 15, count 0 2006.229.13:49:21.77#ibcon#end of sib2, iclass 15, count 0 2006.229.13:49:21.77#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:49:21.77#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:49:21.77#ibcon#[27=USB\r\n] 2006.229.13:49:21.77#ibcon#*before write, iclass 15, count 0 2006.229.13:49:21.77#ibcon#enter sib2, iclass 15, count 0 2006.229.13:49:21.77#ibcon#flushed, iclass 15, count 0 2006.229.13:49:21.77#ibcon#about to write, iclass 15, count 0 2006.229.13:49:21.77#ibcon#wrote, iclass 15, count 0 2006.229.13:49:21.77#ibcon#about to read 3, iclass 15, count 0 2006.229.13:49:21.80#ibcon#read 3, iclass 15, count 0 2006.229.13:49:21.80#ibcon#about to read 4, iclass 15, count 0 2006.229.13:49:21.80#ibcon#read 4, iclass 15, count 0 2006.229.13:49:21.80#ibcon#about to read 5, iclass 15, count 0 2006.229.13:49:21.80#ibcon#read 5, iclass 15, count 0 2006.229.13:49:21.80#ibcon#about to read 6, iclass 15, count 0 2006.229.13:49:21.80#ibcon#read 6, iclass 15, count 0 2006.229.13:49:21.80#ibcon#end of sib2, iclass 15, count 0 2006.229.13:49:21.80#ibcon#*after write, iclass 15, count 0 2006.229.13:49:21.80#ibcon#*before return 0, iclass 15, count 0 2006.229.13:49:21.80#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:49:21.80#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.13:49:21.80#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:49:21.80#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:49:21.80$vck44/vblo=4,679.99 2006.229.13:49:21.80#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.13:49:21.80#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.13:49:21.80#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:21.80#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:21.80#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:21.80#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:21.80#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:49:21.80#ibcon#first serial, iclass 17, count 0 2006.229.13:49:21.80#ibcon#enter sib2, iclass 17, count 0 2006.229.13:49:21.80#ibcon#flushed, iclass 17, count 0 2006.229.13:49:21.80#ibcon#about to write, iclass 17, count 0 2006.229.13:49:21.80#ibcon#wrote, iclass 17, count 0 2006.229.13:49:21.80#ibcon#about to read 3, iclass 17, count 0 2006.229.13:49:21.82#ibcon#read 3, iclass 17, count 0 2006.229.13:49:21.82#ibcon#about to read 4, iclass 17, count 0 2006.229.13:49:21.82#ibcon#read 4, iclass 17, count 0 2006.229.13:49:21.82#ibcon#about to read 5, iclass 17, count 0 2006.229.13:49:21.82#ibcon#read 5, iclass 17, count 0 2006.229.13:49:21.82#ibcon#about to read 6, iclass 17, count 0 2006.229.13:49:21.82#ibcon#read 6, iclass 17, count 0 2006.229.13:49:21.82#ibcon#end of sib2, iclass 17, count 0 2006.229.13:49:21.82#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:49:21.82#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:49:21.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:49:21.82#ibcon#*before write, iclass 17, count 0 2006.229.13:49:21.82#ibcon#enter sib2, iclass 17, count 0 2006.229.13:49:21.82#ibcon#flushed, iclass 17, count 0 2006.229.13:49:21.82#ibcon#about to write, iclass 17, count 0 2006.229.13:49:21.82#ibcon#wrote, iclass 17, count 0 2006.229.13:49:21.82#ibcon#about to read 3, iclass 17, count 0 2006.229.13:49:21.86#ibcon#read 3, iclass 17, count 0 2006.229.13:49:21.86#ibcon#about to read 4, iclass 17, count 0 2006.229.13:49:21.86#ibcon#read 4, iclass 17, count 0 2006.229.13:49:21.86#ibcon#about to read 5, iclass 17, count 0 2006.229.13:49:21.86#ibcon#read 5, iclass 17, count 0 2006.229.13:49:21.86#ibcon#about to read 6, iclass 17, count 0 2006.229.13:49:21.86#ibcon#read 6, iclass 17, count 0 2006.229.13:49:21.86#ibcon#end of sib2, iclass 17, count 0 2006.229.13:49:21.86#ibcon#*after write, iclass 17, count 0 2006.229.13:49:21.86#ibcon#*before return 0, iclass 17, count 0 2006.229.13:49:21.86#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:21.86#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.13:49:21.86#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:49:21.86#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:49:21.86$vck44/vb=4,4 2006.229.13:49:21.86#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.13:49:21.86#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.13:49:21.86#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:21.86#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:21.92#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:21.92#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:21.92#ibcon#enter wrdev, iclass 19, count 2 2006.229.13:49:21.92#ibcon#first serial, iclass 19, count 2 2006.229.13:49:21.92#ibcon#enter sib2, iclass 19, count 2 2006.229.13:49:21.92#ibcon#flushed, iclass 19, count 2 2006.229.13:49:21.92#ibcon#about to write, iclass 19, count 2 2006.229.13:49:21.92#ibcon#wrote, iclass 19, count 2 2006.229.13:49:21.92#ibcon#about to read 3, iclass 19, count 2 2006.229.13:49:21.94#ibcon#read 3, iclass 19, count 2 2006.229.13:49:21.94#ibcon#about to read 4, iclass 19, count 2 2006.229.13:49:21.94#ibcon#read 4, iclass 19, count 2 2006.229.13:49:21.94#ibcon#about to read 5, iclass 19, count 2 2006.229.13:49:21.94#ibcon#read 5, iclass 19, count 2 2006.229.13:49:21.94#ibcon#about to read 6, iclass 19, count 2 2006.229.13:49:21.94#ibcon#read 6, iclass 19, count 2 2006.229.13:49:21.94#ibcon#end of sib2, iclass 19, count 2 2006.229.13:49:21.94#ibcon#*mode == 0, iclass 19, count 2 2006.229.13:49:21.94#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.13:49:21.94#ibcon#[27=AT04-04\r\n] 2006.229.13:49:21.94#ibcon#*before write, iclass 19, count 2 2006.229.13:49:21.94#ibcon#enter sib2, iclass 19, count 2 2006.229.13:49:21.94#ibcon#flushed, iclass 19, count 2 2006.229.13:49:21.94#ibcon#about to write, iclass 19, count 2 2006.229.13:49:21.94#ibcon#wrote, iclass 19, count 2 2006.229.13:49:21.94#ibcon#about to read 3, iclass 19, count 2 2006.229.13:49:21.97#ibcon#read 3, iclass 19, count 2 2006.229.13:49:21.97#ibcon#about to read 4, iclass 19, count 2 2006.229.13:49:21.97#ibcon#read 4, iclass 19, count 2 2006.229.13:49:21.97#ibcon#about to read 5, iclass 19, count 2 2006.229.13:49:21.97#ibcon#read 5, iclass 19, count 2 2006.229.13:49:21.97#ibcon#about to read 6, iclass 19, count 2 2006.229.13:49:21.97#ibcon#read 6, iclass 19, count 2 2006.229.13:49:21.97#ibcon#end of sib2, iclass 19, count 2 2006.229.13:49:21.97#ibcon#*after write, iclass 19, count 2 2006.229.13:49:21.97#ibcon#*before return 0, iclass 19, count 2 2006.229.13:49:21.97#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:21.97#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.13:49:21.97#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.13:49:21.97#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:21.97#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:22.09#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:22.09#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:22.09#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:49:22.09#ibcon#first serial, iclass 19, count 0 2006.229.13:49:22.09#ibcon#enter sib2, iclass 19, count 0 2006.229.13:49:22.09#ibcon#flushed, iclass 19, count 0 2006.229.13:49:22.09#ibcon#about to write, iclass 19, count 0 2006.229.13:49:22.09#ibcon#wrote, iclass 19, count 0 2006.229.13:49:22.09#ibcon#about to read 3, iclass 19, count 0 2006.229.13:49:22.11#ibcon#read 3, iclass 19, count 0 2006.229.13:49:22.11#ibcon#about to read 4, iclass 19, count 0 2006.229.13:49:22.11#ibcon#read 4, iclass 19, count 0 2006.229.13:49:22.11#ibcon#about to read 5, iclass 19, count 0 2006.229.13:49:22.11#ibcon#read 5, iclass 19, count 0 2006.229.13:49:22.11#ibcon#about to read 6, iclass 19, count 0 2006.229.13:49:22.11#ibcon#read 6, iclass 19, count 0 2006.229.13:49:22.11#ibcon#end of sib2, iclass 19, count 0 2006.229.13:49:22.11#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:49:22.11#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:49:22.11#ibcon#[27=USB\r\n] 2006.229.13:49:22.11#ibcon#*before write, iclass 19, count 0 2006.229.13:49:22.11#ibcon#enter sib2, iclass 19, count 0 2006.229.13:49:22.11#ibcon#flushed, iclass 19, count 0 2006.229.13:49:22.11#ibcon#about to write, iclass 19, count 0 2006.229.13:49:22.11#ibcon#wrote, iclass 19, count 0 2006.229.13:49:22.11#ibcon#about to read 3, iclass 19, count 0 2006.229.13:49:22.14#ibcon#read 3, iclass 19, count 0 2006.229.13:49:22.14#ibcon#about to read 4, iclass 19, count 0 2006.229.13:49:22.14#ibcon#read 4, iclass 19, count 0 2006.229.13:49:22.14#ibcon#about to read 5, iclass 19, count 0 2006.229.13:49:22.14#ibcon#read 5, iclass 19, count 0 2006.229.13:49:22.14#ibcon#about to read 6, iclass 19, count 0 2006.229.13:49:22.14#ibcon#read 6, iclass 19, count 0 2006.229.13:49:22.14#ibcon#end of sib2, iclass 19, count 0 2006.229.13:49:22.14#ibcon#*after write, iclass 19, count 0 2006.229.13:49:22.14#ibcon#*before return 0, iclass 19, count 0 2006.229.13:49:22.14#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:22.14#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.13:49:22.14#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:49:22.14#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:49:22.14$vck44/vblo=5,709.99 2006.229.13:49:22.14#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.13:49:22.14#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.13:49:22.14#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:22.14#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:22.14#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:22.14#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:22.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:49:22.14#ibcon#first serial, iclass 21, count 0 2006.229.13:49:22.14#ibcon#enter sib2, iclass 21, count 0 2006.229.13:49:22.14#ibcon#flushed, iclass 21, count 0 2006.229.13:49:22.14#ibcon#about to write, iclass 21, count 0 2006.229.13:49:22.14#ibcon#wrote, iclass 21, count 0 2006.229.13:49:22.14#ibcon#about to read 3, iclass 21, count 0 2006.229.13:49:22.16#ibcon#read 3, iclass 21, count 0 2006.229.13:49:22.16#ibcon#about to read 4, iclass 21, count 0 2006.229.13:49:22.16#ibcon#read 4, iclass 21, count 0 2006.229.13:49:22.16#ibcon#about to read 5, iclass 21, count 0 2006.229.13:49:22.16#ibcon#read 5, iclass 21, count 0 2006.229.13:49:22.16#ibcon#about to read 6, iclass 21, count 0 2006.229.13:49:22.16#ibcon#read 6, iclass 21, count 0 2006.229.13:49:22.16#ibcon#end of sib2, iclass 21, count 0 2006.229.13:49:22.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:49:22.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:49:22.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:49:22.16#ibcon#*before write, iclass 21, count 0 2006.229.13:49:22.16#ibcon#enter sib2, iclass 21, count 0 2006.229.13:49:22.16#ibcon#flushed, iclass 21, count 0 2006.229.13:49:22.16#ibcon#about to write, iclass 21, count 0 2006.229.13:49:22.16#ibcon#wrote, iclass 21, count 0 2006.229.13:49:22.16#ibcon#about to read 3, iclass 21, count 0 2006.229.13:49:22.20#ibcon#read 3, iclass 21, count 0 2006.229.13:49:22.20#ibcon#about to read 4, iclass 21, count 0 2006.229.13:49:22.20#ibcon#read 4, iclass 21, count 0 2006.229.13:49:22.20#ibcon#about to read 5, iclass 21, count 0 2006.229.13:49:22.20#ibcon#read 5, iclass 21, count 0 2006.229.13:49:22.20#ibcon#about to read 6, iclass 21, count 0 2006.229.13:49:22.20#ibcon#read 6, iclass 21, count 0 2006.229.13:49:22.20#ibcon#end of sib2, iclass 21, count 0 2006.229.13:49:22.20#ibcon#*after write, iclass 21, count 0 2006.229.13:49:22.20#ibcon#*before return 0, iclass 21, count 0 2006.229.13:49:22.20#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:22.20#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.13:49:22.20#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:49:22.20#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:49:22.20$vck44/vb=5,4 2006.229.13:49:22.20#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.13:49:22.20#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.13:49:22.20#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:22.20#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:22.26#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:22.26#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:22.26#ibcon#enter wrdev, iclass 23, count 2 2006.229.13:49:22.26#ibcon#first serial, iclass 23, count 2 2006.229.13:49:22.26#ibcon#enter sib2, iclass 23, count 2 2006.229.13:49:22.26#ibcon#flushed, iclass 23, count 2 2006.229.13:49:22.26#ibcon#about to write, iclass 23, count 2 2006.229.13:49:22.26#ibcon#wrote, iclass 23, count 2 2006.229.13:49:22.26#ibcon#about to read 3, iclass 23, count 2 2006.229.13:49:22.28#ibcon#read 3, iclass 23, count 2 2006.229.13:49:22.28#ibcon#about to read 4, iclass 23, count 2 2006.229.13:49:22.28#ibcon#read 4, iclass 23, count 2 2006.229.13:49:22.28#ibcon#about to read 5, iclass 23, count 2 2006.229.13:49:22.28#ibcon#read 5, iclass 23, count 2 2006.229.13:49:22.28#ibcon#about to read 6, iclass 23, count 2 2006.229.13:49:22.28#ibcon#read 6, iclass 23, count 2 2006.229.13:49:22.28#ibcon#end of sib2, iclass 23, count 2 2006.229.13:49:22.28#ibcon#*mode == 0, iclass 23, count 2 2006.229.13:49:22.28#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.13:49:22.28#ibcon#[27=AT05-04\r\n] 2006.229.13:49:22.28#ibcon#*before write, iclass 23, count 2 2006.229.13:49:22.28#ibcon#enter sib2, iclass 23, count 2 2006.229.13:49:22.28#ibcon#flushed, iclass 23, count 2 2006.229.13:49:22.28#ibcon#about to write, iclass 23, count 2 2006.229.13:49:22.28#ibcon#wrote, iclass 23, count 2 2006.229.13:49:22.28#ibcon#about to read 3, iclass 23, count 2 2006.229.13:49:22.31#ibcon#read 3, iclass 23, count 2 2006.229.13:49:22.31#ibcon#about to read 4, iclass 23, count 2 2006.229.13:49:22.31#ibcon#read 4, iclass 23, count 2 2006.229.13:49:22.31#ibcon#about to read 5, iclass 23, count 2 2006.229.13:49:22.31#ibcon#read 5, iclass 23, count 2 2006.229.13:49:22.31#ibcon#about to read 6, iclass 23, count 2 2006.229.13:49:22.31#ibcon#read 6, iclass 23, count 2 2006.229.13:49:22.31#ibcon#end of sib2, iclass 23, count 2 2006.229.13:49:22.31#ibcon#*after write, iclass 23, count 2 2006.229.13:49:22.31#ibcon#*before return 0, iclass 23, count 2 2006.229.13:49:22.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:22.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.13:49:22.31#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.13:49:22.31#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:22.31#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:22.43#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:22.43#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:22.43#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:49:22.43#ibcon#first serial, iclass 23, count 0 2006.229.13:49:22.43#ibcon#enter sib2, iclass 23, count 0 2006.229.13:49:22.43#ibcon#flushed, iclass 23, count 0 2006.229.13:49:22.43#ibcon#about to write, iclass 23, count 0 2006.229.13:49:22.43#ibcon#wrote, iclass 23, count 0 2006.229.13:49:22.43#ibcon#about to read 3, iclass 23, count 0 2006.229.13:49:22.45#ibcon#read 3, iclass 23, count 0 2006.229.13:49:22.45#ibcon#about to read 4, iclass 23, count 0 2006.229.13:49:22.45#ibcon#read 4, iclass 23, count 0 2006.229.13:49:22.45#ibcon#about to read 5, iclass 23, count 0 2006.229.13:49:22.45#ibcon#read 5, iclass 23, count 0 2006.229.13:49:22.45#ibcon#about to read 6, iclass 23, count 0 2006.229.13:49:22.45#ibcon#read 6, iclass 23, count 0 2006.229.13:49:22.45#ibcon#end of sib2, iclass 23, count 0 2006.229.13:49:22.45#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:49:22.45#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:49:22.45#ibcon#[27=USB\r\n] 2006.229.13:49:22.45#ibcon#*before write, iclass 23, count 0 2006.229.13:49:22.45#ibcon#enter sib2, iclass 23, count 0 2006.229.13:49:22.45#ibcon#flushed, iclass 23, count 0 2006.229.13:49:22.45#ibcon#about to write, iclass 23, count 0 2006.229.13:49:22.45#ibcon#wrote, iclass 23, count 0 2006.229.13:49:22.45#ibcon#about to read 3, iclass 23, count 0 2006.229.13:49:22.48#ibcon#read 3, iclass 23, count 0 2006.229.13:49:22.48#ibcon#about to read 4, iclass 23, count 0 2006.229.13:49:22.48#ibcon#read 4, iclass 23, count 0 2006.229.13:49:22.48#ibcon#about to read 5, iclass 23, count 0 2006.229.13:49:22.48#ibcon#read 5, iclass 23, count 0 2006.229.13:49:22.48#ibcon#about to read 6, iclass 23, count 0 2006.229.13:49:22.48#ibcon#read 6, iclass 23, count 0 2006.229.13:49:22.48#ibcon#end of sib2, iclass 23, count 0 2006.229.13:49:22.48#ibcon#*after write, iclass 23, count 0 2006.229.13:49:22.48#ibcon#*before return 0, iclass 23, count 0 2006.229.13:49:22.48#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:22.48#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.13:49:22.48#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:49:22.48#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:49:22.48$vck44/vblo=6,719.99 2006.229.13:49:22.48#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.13:49:22.48#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.13:49:22.48#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:22.48#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:22.48#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:22.48#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:22.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:49:22.48#ibcon#first serial, iclass 25, count 0 2006.229.13:49:22.48#ibcon#enter sib2, iclass 25, count 0 2006.229.13:49:22.48#ibcon#flushed, iclass 25, count 0 2006.229.13:49:22.48#ibcon#about to write, iclass 25, count 0 2006.229.13:49:22.48#ibcon#wrote, iclass 25, count 0 2006.229.13:49:22.48#ibcon#about to read 3, iclass 25, count 0 2006.229.13:49:22.50#ibcon#read 3, iclass 25, count 0 2006.229.13:49:22.50#ibcon#about to read 4, iclass 25, count 0 2006.229.13:49:22.50#ibcon#read 4, iclass 25, count 0 2006.229.13:49:22.50#ibcon#about to read 5, iclass 25, count 0 2006.229.13:49:22.50#ibcon#read 5, iclass 25, count 0 2006.229.13:49:22.50#ibcon#about to read 6, iclass 25, count 0 2006.229.13:49:22.50#ibcon#read 6, iclass 25, count 0 2006.229.13:49:22.50#ibcon#end of sib2, iclass 25, count 0 2006.229.13:49:22.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:49:22.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:49:22.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:49:22.50#ibcon#*before write, iclass 25, count 0 2006.229.13:49:22.50#ibcon#enter sib2, iclass 25, count 0 2006.229.13:49:22.50#ibcon#flushed, iclass 25, count 0 2006.229.13:49:22.50#ibcon#about to write, iclass 25, count 0 2006.229.13:49:22.50#ibcon#wrote, iclass 25, count 0 2006.229.13:49:22.50#ibcon#about to read 3, iclass 25, count 0 2006.229.13:49:22.54#ibcon#read 3, iclass 25, count 0 2006.229.13:49:22.54#ibcon#about to read 4, iclass 25, count 0 2006.229.13:49:22.54#ibcon#read 4, iclass 25, count 0 2006.229.13:49:22.54#ibcon#about to read 5, iclass 25, count 0 2006.229.13:49:22.54#ibcon#read 5, iclass 25, count 0 2006.229.13:49:22.54#ibcon#about to read 6, iclass 25, count 0 2006.229.13:49:22.54#ibcon#read 6, iclass 25, count 0 2006.229.13:49:22.54#ibcon#end of sib2, iclass 25, count 0 2006.229.13:49:22.54#ibcon#*after write, iclass 25, count 0 2006.229.13:49:22.54#ibcon#*before return 0, iclass 25, count 0 2006.229.13:49:22.54#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:22.54#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.13:49:22.54#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:49:22.54#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:49:22.54$vck44/vb=6,4 2006.229.13:49:22.54#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.13:49:22.54#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.13:49:22.54#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:22.54#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:22.60#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:22.60#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:22.60#ibcon#enter wrdev, iclass 27, count 2 2006.229.13:49:22.60#ibcon#first serial, iclass 27, count 2 2006.229.13:49:22.60#ibcon#enter sib2, iclass 27, count 2 2006.229.13:49:22.60#ibcon#flushed, iclass 27, count 2 2006.229.13:49:22.60#ibcon#about to write, iclass 27, count 2 2006.229.13:49:22.60#ibcon#wrote, iclass 27, count 2 2006.229.13:49:22.60#ibcon#about to read 3, iclass 27, count 2 2006.229.13:49:22.62#ibcon#read 3, iclass 27, count 2 2006.229.13:49:22.62#ibcon#about to read 4, iclass 27, count 2 2006.229.13:49:22.62#ibcon#read 4, iclass 27, count 2 2006.229.13:49:22.62#ibcon#about to read 5, iclass 27, count 2 2006.229.13:49:22.62#ibcon#read 5, iclass 27, count 2 2006.229.13:49:22.62#ibcon#about to read 6, iclass 27, count 2 2006.229.13:49:22.62#ibcon#read 6, iclass 27, count 2 2006.229.13:49:22.62#ibcon#end of sib2, iclass 27, count 2 2006.229.13:49:22.62#ibcon#*mode == 0, iclass 27, count 2 2006.229.13:49:22.62#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.13:49:22.62#ibcon#[27=AT06-04\r\n] 2006.229.13:49:22.62#ibcon#*before write, iclass 27, count 2 2006.229.13:49:22.62#ibcon#enter sib2, iclass 27, count 2 2006.229.13:49:22.62#ibcon#flushed, iclass 27, count 2 2006.229.13:49:22.62#ibcon#about to write, iclass 27, count 2 2006.229.13:49:22.62#ibcon#wrote, iclass 27, count 2 2006.229.13:49:22.62#ibcon#about to read 3, iclass 27, count 2 2006.229.13:49:22.65#ibcon#read 3, iclass 27, count 2 2006.229.13:49:22.65#ibcon#about to read 4, iclass 27, count 2 2006.229.13:49:22.65#ibcon#read 4, iclass 27, count 2 2006.229.13:49:22.65#ibcon#about to read 5, iclass 27, count 2 2006.229.13:49:22.65#ibcon#read 5, iclass 27, count 2 2006.229.13:49:22.65#ibcon#about to read 6, iclass 27, count 2 2006.229.13:49:22.65#ibcon#read 6, iclass 27, count 2 2006.229.13:49:22.65#ibcon#end of sib2, iclass 27, count 2 2006.229.13:49:22.65#ibcon#*after write, iclass 27, count 2 2006.229.13:49:22.65#ibcon#*before return 0, iclass 27, count 2 2006.229.13:49:22.65#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:22.65#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.13:49:22.65#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.13:49:22.65#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:22.65#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:22.77#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:22.77#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:22.77#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:49:22.77#ibcon#first serial, iclass 27, count 0 2006.229.13:49:22.77#ibcon#enter sib2, iclass 27, count 0 2006.229.13:49:22.77#ibcon#flushed, iclass 27, count 0 2006.229.13:49:22.77#ibcon#about to write, iclass 27, count 0 2006.229.13:49:22.77#ibcon#wrote, iclass 27, count 0 2006.229.13:49:22.77#ibcon#about to read 3, iclass 27, count 0 2006.229.13:49:22.79#ibcon#read 3, iclass 27, count 0 2006.229.13:49:22.79#ibcon#about to read 4, iclass 27, count 0 2006.229.13:49:22.79#ibcon#read 4, iclass 27, count 0 2006.229.13:49:22.79#ibcon#about to read 5, iclass 27, count 0 2006.229.13:49:22.79#ibcon#read 5, iclass 27, count 0 2006.229.13:49:22.79#ibcon#about to read 6, iclass 27, count 0 2006.229.13:49:22.79#ibcon#read 6, iclass 27, count 0 2006.229.13:49:22.79#ibcon#end of sib2, iclass 27, count 0 2006.229.13:49:22.79#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:49:22.79#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:49:22.79#ibcon#[27=USB\r\n] 2006.229.13:49:22.79#ibcon#*before write, iclass 27, count 0 2006.229.13:49:22.79#ibcon#enter sib2, iclass 27, count 0 2006.229.13:49:22.79#ibcon#flushed, iclass 27, count 0 2006.229.13:49:22.79#ibcon#about to write, iclass 27, count 0 2006.229.13:49:22.79#ibcon#wrote, iclass 27, count 0 2006.229.13:49:22.79#ibcon#about to read 3, iclass 27, count 0 2006.229.13:49:22.82#ibcon#read 3, iclass 27, count 0 2006.229.13:49:22.82#ibcon#about to read 4, iclass 27, count 0 2006.229.13:49:22.82#ibcon#read 4, iclass 27, count 0 2006.229.13:49:22.82#ibcon#about to read 5, iclass 27, count 0 2006.229.13:49:22.82#ibcon#read 5, iclass 27, count 0 2006.229.13:49:22.82#ibcon#about to read 6, iclass 27, count 0 2006.229.13:49:22.82#ibcon#read 6, iclass 27, count 0 2006.229.13:49:22.82#ibcon#end of sib2, iclass 27, count 0 2006.229.13:49:22.82#ibcon#*after write, iclass 27, count 0 2006.229.13:49:22.82#ibcon#*before return 0, iclass 27, count 0 2006.229.13:49:22.82#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:22.82#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.13:49:22.82#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:49:22.82#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:49:22.82$vck44/vblo=7,734.99 2006.229.13:49:22.82#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:49:22.82#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:49:22.82#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:22.82#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:22.82#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:22.82#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:22.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:49:22.82#ibcon#first serial, iclass 29, count 0 2006.229.13:49:22.82#ibcon#enter sib2, iclass 29, count 0 2006.229.13:49:22.82#ibcon#flushed, iclass 29, count 0 2006.229.13:49:22.82#ibcon#about to write, iclass 29, count 0 2006.229.13:49:22.82#ibcon#wrote, iclass 29, count 0 2006.229.13:49:22.82#ibcon#about to read 3, iclass 29, count 0 2006.229.13:49:22.84#ibcon#read 3, iclass 29, count 0 2006.229.13:49:22.84#ibcon#about to read 4, iclass 29, count 0 2006.229.13:49:22.84#ibcon#read 4, iclass 29, count 0 2006.229.13:49:22.84#ibcon#about to read 5, iclass 29, count 0 2006.229.13:49:22.84#ibcon#read 5, iclass 29, count 0 2006.229.13:49:22.84#ibcon#about to read 6, iclass 29, count 0 2006.229.13:49:22.84#ibcon#read 6, iclass 29, count 0 2006.229.13:49:22.84#ibcon#end of sib2, iclass 29, count 0 2006.229.13:49:22.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:49:22.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:49:22.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:49:22.84#ibcon#*before write, iclass 29, count 0 2006.229.13:49:22.84#ibcon#enter sib2, iclass 29, count 0 2006.229.13:49:22.84#ibcon#flushed, iclass 29, count 0 2006.229.13:49:22.84#ibcon#about to write, iclass 29, count 0 2006.229.13:49:22.84#ibcon#wrote, iclass 29, count 0 2006.229.13:49:22.84#ibcon#about to read 3, iclass 29, count 0 2006.229.13:49:22.88#ibcon#read 3, iclass 29, count 0 2006.229.13:49:22.88#ibcon#about to read 4, iclass 29, count 0 2006.229.13:49:22.88#ibcon#read 4, iclass 29, count 0 2006.229.13:49:22.88#ibcon#about to read 5, iclass 29, count 0 2006.229.13:49:22.88#ibcon#read 5, iclass 29, count 0 2006.229.13:49:22.88#ibcon#about to read 6, iclass 29, count 0 2006.229.13:49:22.88#ibcon#read 6, iclass 29, count 0 2006.229.13:49:22.88#ibcon#end of sib2, iclass 29, count 0 2006.229.13:49:22.88#ibcon#*after write, iclass 29, count 0 2006.229.13:49:22.88#ibcon#*before return 0, iclass 29, count 0 2006.229.13:49:22.88#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:22.88#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:49:22.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:49:22.88#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:49:22.88$vck44/vb=7,4 2006.229.13:49:22.88#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.13:49:22.88#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.13:49:22.88#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:22.88#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:22.94#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:22.94#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:22.94#ibcon#enter wrdev, iclass 31, count 2 2006.229.13:49:22.94#ibcon#first serial, iclass 31, count 2 2006.229.13:49:22.94#ibcon#enter sib2, iclass 31, count 2 2006.229.13:49:22.94#ibcon#flushed, iclass 31, count 2 2006.229.13:49:22.94#ibcon#about to write, iclass 31, count 2 2006.229.13:49:22.94#ibcon#wrote, iclass 31, count 2 2006.229.13:49:22.94#ibcon#about to read 3, iclass 31, count 2 2006.229.13:49:22.96#ibcon#read 3, iclass 31, count 2 2006.229.13:49:22.96#ibcon#about to read 4, iclass 31, count 2 2006.229.13:49:22.96#ibcon#read 4, iclass 31, count 2 2006.229.13:49:22.96#ibcon#about to read 5, iclass 31, count 2 2006.229.13:49:22.96#ibcon#read 5, iclass 31, count 2 2006.229.13:49:22.96#ibcon#about to read 6, iclass 31, count 2 2006.229.13:49:22.96#ibcon#read 6, iclass 31, count 2 2006.229.13:49:22.96#ibcon#end of sib2, iclass 31, count 2 2006.229.13:49:22.96#ibcon#*mode == 0, iclass 31, count 2 2006.229.13:49:22.96#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.13:49:22.96#ibcon#[27=AT07-04\r\n] 2006.229.13:49:22.96#ibcon#*before write, iclass 31, count 2 2006.229.13:49:22.96#ibcon#enter sib2, iclass 31, count 2 2006.229.13:49:22.96#ibcon#flushed, iclass 31, count 2 2006.229.13:49:22.96#ibcon#about to write, iclass 31, count 2 2006.229.13:49:22.96#ibcon#wrote, iclass 31, count 2 2006.229.13:49:22.96#ibcon#about to read 3, iclass 31, count 2 2006.229.13:49:22.99#ibcon#read 3, iclass 31, count 2 2006.229.13:49:22.99#ibcon#about to read 4, iclass 31, count 2 2006.229.13:49:22.99#ibcon#read 4, iclass 31, count 2 2006.229.13:49:22.99#ibcon#about to read 5, iclass 31, count 2 2006.229.13:49:22.99#ibcon#read 5, iclass 31, count 2 2006.229.13:49:22.99#ibcon#about to read 6, iclass 31, count 2 2006.229.13:49:22.99#ibcon#read 6, iclass 31, count 2 2006.229.13:49:22.99#ibcon#end of sib2, iclass 31, count 2 2006.229.13:49:22.99#ibcon#*after write, iclass 31, count 2 2006.229.13:49:22.99#ibcon#*before return 0, iclass 31, count 2 2006.229.13:49:22.99#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:22.99#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.13:49:22.99#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.13:49:22.99#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:22.99#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:23.11#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:23.11#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:23.11#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:49:23.11#ibcon#first serial, iclass 31, count 0 2006.229.13:49:23.11#ibcon#enter sib2, iclass 31, count 0 2006.229.13:49:23.11#ibcon#flushed, iclass 31, count 0 2006.229.13:49:23.11#ibcon#about to write, iclass 31, count 0 2006.229.13:49:23.11#ibcon#wrote, iclass 31, count 0 2006.229.13:49:23.11#ibcon#about to read 3, iclass 31, count 0 2006.229.13:49:23.13#ibcon#read 3, iclass 31, count 0 2006.229.13:49:23.13#ibcon#about to read 4, iclass 31, count 0 2006.229.13:49:23.13#ibcon#read 4, iclass 31, count 0 2006.229.13:49:23.13#ibcon#about to read 5, iclass 31, count 0 2006.229.13:49:23.13#ibcon#read 5, iclass 31, count 0 2006.229.13:49:23.13#ibcon#about to read 6, iclass 31, count 0 2006.229.13:49:23.13#ibcon#read 6, iclass 31, count 0 2006.229.13:49:23.13#ibcon#end of sib2, iclass 31, count 0 2006.229.13:49:23.13#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:49:23.13#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:49:23.13#ibcon#[27=USB\r\n] 2006.229.13:49:23.13#ibcon#*before write, iclass 31, count 0 2006.229.13:49:23.13#ibcon#enter sib2, iclass 31, count 0 2006.229.13:49:23.13#ibcon#flushed, iclass 31, count 0 2006.229.13:49:23.13#ibcon#about to write, iclass 31, count 0 2006.229.13:49:23.13#ibcon#wrote, iclass 31, count 0 2006.229.13:49:23.13#ibcon#about to read 3, iclass 31, count 0 2006.229.13:49:23.16#ibcon#read 3, iclass 31, count 0 2006.229.13:49:23.16#ibcon#about to read 4, iclass 31, count 0 2006.229.13:49:23.16#ibcon#read 4, iclass 31, count 0 2006.229.13:49:23.16#ibcon#about to read 5, iclass 31, count 0 2006.229.13:49:23.16#ibcon#read 5, iclass 31, count 0 2006.229.13:49:23.16#ibcon#about to read 6, iclass 31, count 0 2006.229.13:49:23.16#ibcon#read 6, iclass 31, count 0 2006.229.13:49:23.16#ibcon#end of sib2, iclass 31, count 0 2006.229.13:49:23.16#ibcon#*after write, iclass 31, count 0 2006.229.13:49:23.16#ibcon#*before return 0, iclass 31, count 0 2006.229.13:49:23.16#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:23.16#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.13:49:23.16#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:49:23.16#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:49:23.16$vck44/vblo=8,744.99 2006.229.13:49:23.16#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.13:49:23.16#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.13:49:23.16#ibcon#ireg 17 cls_cnt 0 2006.229.13:49:23.16#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:23.16#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:23.16#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:23.16#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:49:23.16#ibcon#first serial, iclass 33, count 0 2006.229.13:49:23.16#ibcon#enter sib2, iclass 33, count 0 2006.229.13:49:23.16#ibcon#flushed, iclass 33, count 0 2006.229.13:49:23.16#ibcon#about to write, iclass 33, count 0 2006.229.13:49:23.16#ibcon#wrote, iclass 33, count 0 2006.229.13:49:23.16#ibcon#about to read 3, iclass 33, count 0 2006.229.13:49:23.18#ibcon#read 3, iclass 33, count 0 2006.229.13:49:23.18#ibcon#about to read 4, iclass 33, count 0 2006.229.13:49:23.18#ibcon#read 4, iclass 33, count 0 2006.229.13:49:23.18#ibcon#about to read 5, iclass 33, count 0 2006.229.13:49:23.18#ibcon#read 5, iclass 33, count 0 2006.229.13:49:23.18#ibcon#about to read 6, iclass 33, count 0 2006.229.13:49:23.18#ibcon#read 6, iclass 33, count 0 2006.229.13:49:23.18#ibcon#end of sib2, iclass 33, count 0 2006.229.13:49:23.18#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:49:23.18#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:49:23.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:49:23.18#ibcon#*before write, iclass 33, count 0 2006.229.13:49:23.18#ibcon#enter sib2, iclass 33, count 0 2006.229.13:49:23.18#ibcon#flushed, iclass 33, count 0 2006.229.13:49:23.18#ibcon#about to write, iclass 33, count 0 2006.229.13:49:23.18#ibcon#wrote, iclass 33, count 0 2006.229.13:49:23.18#ibcon#about to read 3, iclass 33, count 0 2006.229.13:49:23.22#ibcon#read 3, iclass 33, count 0 2006.229.13:49:23.22#ibcon#about to read 4, iclass 33, count 0 2006.229.13:49:23.22#ibcon#read 4, iclass 33, count 0 2006.229.13:49:23.22#ibcon#about to read 5, iclass 33, count 0 2006.229.13:49:23.22#ibcon#read 5, iclass 33, count 0 2006.229.13:49:23.22#ibcon#about to read 6, iclass 33, count 0 2006.229.13:49:23.22#ibcon#read 6, iclass 33, count 0 2006.229.13:49:23.22#ibcon#end of sib2, iclass 33, count 0 2006.229.13:49:23.22#ibcon#*after write, iclass 33, count 0 2006.229.13:49:23.22#ibcon#*before return 0, iclass 33, count 0 2006.229.13:49:23.22#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:23.22#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.13:49:23.22#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:49:23.22#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:49:23.22$vck44/vb=8,4 2006.229.13:49:23.22#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.13:49:23.22#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.13:49:23.22#ibcon#ireg 11 cls_cnt 2 2006.229.13:49:23.22#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:23.28#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:23.28#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:23.28#ibcon#enter wrdev, iclass 35, count 2 2006.229.13:49:23.28#ibcon#first serial, iclass 35, count 2 2006.229.13:49:23.28#ibcon#enter sib2, iclass 35, count 2 2006.229.13:49:23.28#ibcon#flushed, iclass 35, count 2 2006.229.13:49:23.28#ibcon#about to write, iclass 35, count 2 2006.229.13:49:23.28#ibcon#wrote, iclass 35, count 2 2006.229.13:49:23.28#ibcon#about to read 3, iclass 35, count 2 2006.229.13:49:23.30#ibcon#read 3, iclass 35, count 2 2006.229.13:49:23.30#ibcon#about to read 4, iclass 35, count 2 2006.229.13:49:23.30#ibcon#read 4, iclass 35, count 2 2006.229.13:49:23.30#ibcon#about to read 5, iclass 35, count 2 2006.229.13:49:23.30#ibcon#read 5, iclass 35, count 2 2006.229.13:49:23.30#ibcon#about to read 6, iclass 35, count 2 2006.229.13:49:23.30#ibcon#read 6, iclass 35, count 2 2006.229.13:49:23.30#ibcon#end of sib2, iclass 35, count 2 2006.229.13:49:23.30#ibcon#*mode == 0, iclass 35, count 2 2006.229.13:49:23.30#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.13:49:23.30#ibcon#[27=AT08-04\r\n] 2006.229.13:49:23.30#ibcon#*before write, iclass 35, count 2 2006.229.13:49:23.30#ibcon#enter sib2, iclass 35, count 2 2006.229.13:49:23.30#ibcon#flushed, iclass 35, count 2 2006.229.13:49:23.30#ibcon#about to write, iclass 35, count 2 2006.229.13:49:23.30#ibcon#wrote, iclass 35, count 2 2006.229.13:49:23.30#ibcon#about to read 3, iclass 35, count 2 2006.229.13:49:23.33#ibcon#read 3, iclass 35, count 2 2006.229.13:49:23.33#ibcon#about to read 4, iclass 35, count 2 2006.229.13:49:23.33#ibcon#read 4, iclass 35, count 2 2006.229.13:49:23.33#ibcon#about to read 5, iclass 35, count 2 2006.229.13:49:23.33#ibcon#read 5, iclass 35, count 2 2006.229.13:49:23.33#ibcon#about to read 6, iclass 35, count 2 2006.229.13:49:23.33#ibcon#read 6, iclass 35, count 2 2006.229.13:49:23.33#ibcon#end of sib2, iclass 35, count 2 2006.229.13:49:23.33#ibcon#*after write, iclass 35, count 2 2006.229.13:49:23.33#ibcon#*before return 0, iclass 35, count 2 2006.229.13:49:23.33#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:23.33#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.13:49:23.33#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.13:49:23.33#ibcon#ireg 7 cls_cnt 0 2006.229.13:49:23.33#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:23.45#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:23.45#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:23.45#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:49:23.45#ibcon#first serial, iclass 35, count 0 2006.229.13:49:23.45#ibcon#enter sib2, iclass 35, count 0 2006.229.13:49:23.45#ibcon#flushed, iclass 35, count 0 2006.229.13:49:23.45#ibcon#about to write, iclass 35, count 0 2006.229.13:49:23.45#ibcon#wrote, iclass 35, count 0 2006.229.13:49:23.45#ibcon#about to read 3, iclass 35, count 0 2006.229.13:49:23.47#ibcon#read 3, iclass 35, count 0 2006.229.13:49:23.47#ibcon#about to read 4, iclass 35, count 0 2006.229.13:49:23.47#ibcon#read 4, iclass 35, count 0 2006.229.13:49:23.47#ibcon#about to read 5, iclass 35, count 0 2006.229.13:49:23.47#ibcon#read 5, iclass 35, count 0 2006.229.13:49:23.47#ibcon#about to read 6, iclass 35, count 0 2006.229.13:49:23.47#ibcon#read 6, iclass 35, count 0 2006.229.13:49:23.47#ibcon#end of sib2, iclass 35, count 0 2006.229.13:49:23.47#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:49:23.47#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:49:23.47#ibcon#[27=USB\r\n] 2006.229.13:49:23.47#ibcon#*before write, iclass 35, count 0 2006.229.13:49:23.47#ibcon#enter sib2, iclass 35, count 0 2006.229.13:49:23.47#ibcon#flushed, iclass 35, count 0 2006.229.13:49:23.47#ibcon#about to write, iclass 35, count 0 2006.229.13:49:23.47#ibcon#wrote, iclass 35, count 0 2006.229.13:49:23.47#ibcon#about to read 3, iclass 35, count 0 2006.229.13:49:23.50#ibcon#read 3, iclass 35, count 0 2006.229.13:49:23.50#ibcon#about to read 4, iclass 35, count 0 2006.229.13:49:23.50#ibcon#read 4, iclass 35, count 0 2006.229.13:49:23.50#ibcon#about to read 5, iclass 35, count 0 2006.229.13:49:23.50#ibcon#read 5, iclass 35, count 0 2006.229.13:49:23.50#ibcon#about to read 6, iclass 35, count 0 2006.229.13:49:23.50#ibcon#read 6, iclass 35, count 0 2006.229.13:49:23.50#ibcon#end of sib2, iclass 35, count 0 2006.229.13:49:23.50#ibcon#*after write, iclass 35, count 0 2006.229.13:49:23.50#ibcon#*before return 0, iclass 35, count 0 2006.229.13:49:23.50#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:23.50#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.13:49:23.50#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:49:23.50#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:49:23.50$vck44/vabw=wide 2006.229.13:49:23.50#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.13:49:23.50#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.13:49:23.50#ibcon#ireg 8 cls_cnt 0 2006.229.13:49:23.50#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:23.50#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:23.50#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:23.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:49:23.50#ibcon#first serial, iclass 37, count 0 2006.229.13:49:23.50#ibcon#enter sib2, iclass 37, count 0 2006.229.13:49:23.50#ibcon#flushed, iclass 37, count 0 2006.229.13:49:23.50#ibcon#about to write, iclass 37, count 0 2006.229.13:49:23.50#ibcon#wrote, iclass 37, count 0 2006.229.13:49:23.50#ibcon#about to read 3, iclass 37, count 0 2006.229.13:49:23.52#ibcon#read 3, iclass 37, count 0 2006.229.13:49:23.52#ibcon#about to read 4, iclass 37, count 0 2006.229.13:49:23.52#ibcon#read 4, iclass 37, count 0 2006.229.13:49:23.52#ibcon#about to read 5, iclass 37, count 0 2006.229.13:49:23.52#ibcon#read 5, iclass 37, count 0 2006.229.13:49:23.52#ibcon#about to read 6, iclass 37, count 0 2006.229.13:49:23.52#ibcon#read 6, iclass 37, count 0 2006.229.13:49:23.52#ibcon#end of sib2, iclass 37, count 0 2006.229.13:49:23.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:49:23.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:49:23.52#ibcon#[25=BW32\r\n] 2006.229.13:49:23.52#ibcon#*before write, iclass 37, count 0 2006.229.13:49:23.52#ibcon#enter sib2, iclass 37, count 0 2006.229.13:49:23.52#ibcon#flushed, iclass 37, count 0 2006.229.13:49:23.52#ibcon#about to write, iclass 37, count 0 2006.229.13:49:23.52#ibcon#wrote, iclass 37, count 0 2006.229.13:49:23.52#ibcon#about to read 3, iclass 37, count 0 2006.229.13:49:23.55#ibcon#read 3, iclass 37, count 0 2006.229.13:49:23.55#ibcon#about to read 4, iclass 37, count 0 2006.229.13:49:23.55#ibcon#read 4, iclass 37, count 0 2006.229.13:49:23.55#ibcon#about to read 5, iclass 37, count 0 2006.229.13:49:23.55#ibcon#read 5, iclass 37, count 0 2006.229.13:49:23.55#ibcon#about to read 6, iclass 37, count 0 2006.229.13:49:23.55#ibcon#read 6, iclass 37, count 0 2006.229.13:49:23.55#ibcon#end of sib2, iclass 37, count 0 2006.229.13:49:23.55#ibcon#*after write, iclass 37, count 0 2006.229.13:49:23.55#ibcon#*before return 0, iclass 37, count 0 2006.229.13:49:23.55#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:23.55#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.13:49:23.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:49:23.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:49:23.55$vck44/vbbw=wide 2006.229.13:49:23.55#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:49:23.55#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:49:23.55#ibcon#ireg 8 cls_cnt 0 2006.229.13:49:23.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:49:23.62#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:49:23.62#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:49:23.62#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:49:23.62#ibcon#first serial, iclass 39, count 0 2006.229.13:49:23.62#ibcon#enter sib2, iclass 39, count 0 2006.229.13:49:23.62#ibcon#flushed, iclass 39, count 0 2006.229.13:49:23.62#ibcon#about to write, iclass 39, count 0 2006.229.13:49:23.62#ibcon#wrote, iclass 39, count 0 2006.229.13:49:23.62#ibcon#about to read 3, iclass 39, count 0 2006.229.13:49:23.64#ibcon#read 3, iclass 39, count 0 2006.229.13:49:23.64#ibcon#about to read 4, iclass 39, count 0 2006.229.13:49:23.64#ibcon#read 4, iclass 39, count 0 2006.229.13:49:23.64#ibcon#about to read 5, iclass 39, count 0 2006.229.13:49:23.64#ibcon#read 5, iclass 39, count 0 2006.229.13:49:23.64#ibcon#about to read 6, iclass 39, count 0 2006.229.13:49:23.64#ibcon#read 6, iclass 39, count 0 2006.229.13:49:23.64#ibcon#end of sib2, iclass 39, count 0 2006.229.13:49:23.64#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:49:23.64#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:49:23.64#ibcon#[27=BW32\r\n] 2006.229.13:49:23.64#ibcon#*before write, iclass 39, count 0 2006.229.13:49:23.64#ibcon#enter sib2, iclass 39, count 0 2006.229.13:49:23.64#ibcon#flushed, iclass 39, count 0 2006.229.13:49:23.64#ibcon#about to write, iclass 39, count 0 2006.229.13:49:23.64#ibcon#wrote, iclass 39, count 0 2006.229.13:49:23.64#ibcon#about to read 3, iclass 39, count 0 2006.229.13:49:23.67#ibcon#read 3, iclass 39, count 0 2006.229.13:49:23.67#ibcon#about to read 4, iclass 39, count 0 2006.229.13:49:23.67#ibcon#read 4, iclass 39, count 0 2006.229.13:49:23.67#ibcon#about to read 5, iclass 39, count 0 2006.229.13:49:23.67#ibcon#read 5, iclass 39, count 0 2006.229.13:49:23.67#ibcon#about to read 6, iclass 39, count 0 2006.229.13:49:23.67#ibcon#read 6, iclass 39, count 0 2006.229.13:49:23.67#ibcon#end of sib2, iclass 39, count 0 2006.229.13:49:23.67#ibcon#*after write, iclass 39, count 0 2006.229.13:49:23.67#ibcon#*before return 0, iclass 39, count 0 2006.229.13:49:23.67#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:49:23.67#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:49:23.67#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:49:23.67#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:49:23.67$setupk4/ifdk4 2006.229.13:49:23.67$ifdk4/lo= 2006.229.13:49:23.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:49:23.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:49:23.67$ifdk4/patch= 2006.229.13:49:23.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:49:23.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:49:23.67$setupk4/!*+20s 2006.229.13:49:27.14#trakl#Source acquired 2006.229.13:49:28.14#flagr#flagr/antenna,acquired 2006.229.13:49:28.74#abcon#<5=/04 1.3 2.4 27.541001002.1\r\n> 2006.229.13:49:28.76#abcon#{5=INTERFACE CLEAR} 2006.229.13:49:28.82#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:49:38.17$setupk4/"tpicd 2006.229.13:49:38.17$setupk4/echo=off 2006.229.13:49:38.17$setupk4/xlog=off 2006.229.13:49:38.17:!2006.229.13:50:44 2006.229.13:50:44.00:preob 2006.229.13:50:44.14/onsource/TRACKING 2006.229.13:50:44.14:!2006.229.13:50:54 2006.229.13:50:54.00:"tape 2006.229.13:50:54.00:"st=record 2006.229.13:50:54.00:data_valid=on 2006.229.13:50:54.00:midob 2006.229.13:50:55.14/onsource/TRACKING 2006.229.13:50:55.14/wx/27.54,1002.1,100 2006.229.13:50:55.26/cable/+6.4137E-03 2006.229.13:50:56.35/va/01,08,usb,yes,30,32 2006.229.13:50:56.35/va/02,07,usb,yes,32,33 2006.229.13:50:56.35/va/03,06,usb,yes,40,43 2006.229.13:50:56.35/va/04,07,usb,yes,33,35 2006.229.13:50:56.35/va/05,04,usb,yes,30,30 2006.229.13:50:56.35/va/06,04,usb,yes,33,33 2006.229.13:50:56.35/va/07,05,usb,yes,29,30 2006.229.13:50:56.35/va/08,06,usb,yes,21,26 2006.229.13:50:56.58/valo/01,524.99,yes,locked 2006.229.13:50:56.58/valo/02,534.99,yes,locked 2006.229.13:50:56.58/valo/03,564.99,yes,locked 2006.229.13:50:56.58/valo/04,624.99,yes,locked 2006.229.13:50:56.58/valo/05,734.99,yes,locked 2006.229.13:50:56.58/valo/06,814.99,yes,locked 2006.229.13:50:56.58/valo/07,864.99,yes,locked 2006.229.13:50:56.58/valo/08,884.99,yes,locked 2006.229.13:50:57.67/vb/01,04,usb,yes,31,29 2006.229.13:50:57.67/vb/02,04,usb,yes,33,33 2006.229.13:50:57.67/vb/03,04,usb,yes,30,33 2006.229.13:50:57.67/vb/04,04,usb,yes,35,34 2006.229.13:50:57.67/vb/05,04,usb,yes,27,30 2006.229.13:50:57.67/vb/06,04,usb,yes,32,28 2006.229.13:50:57.67/vb/07,04,usb,yes,31,31 2006.229.13:50:57.67/vb/08,04,usb,yes,29,32 2006.229.13:50:57.91/vblo/01,629.99,yes,locked 2006.229.13:50:57.91/vblo/02,634.99,yes,locked 2006.229.13:50:57.91/vblo/03,649.99,yes,locked 2006.229.13:50:57.91/vblo/04,679.99,yes,locked 2006.229.13:50:57.91/vblo/05,709.99,yes,locked 2006.229.13:50:57.91/vblo/06,719.99,yes,locked 2006.229.13:50:57.91/vblo/07,734.99,yes,locked 2006.229.13:50:57.91/vblo/08,744.99,yes,locked 2006.229.13:50:58.06/vabw/8 2006.229.13:50:58.21/vbbw/8 2006.229.13:50:58.30/xfe/off,on,12.2 2006.229.13:50:58.67/ifatt/23,28,28,28 2006.229.13:50:59.07/fmout-gps/S +4.60E-07 2006.229.13:50:59.11:!2006.229.13:54:04 2006.229.13:54:04.01:data_valid=off 2006.229.13:54:04.01:"et 2006.229.13:54:04.02:!+3s 2006.229.13:54:07.03:"tape 2006.229.13:54:07.03:postob 2006.229.13:54:07.15/cable/+6.4125E-03 2006.229.13:54:07.15/wx/27.54,1002.0,100 2006.229.13:54:07.21/fmout-gps/S +4.58E-07 2006.229.13:54:07.21:scan_name=229-1356,jd0608,60 2006.229.13:54:07.21:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.13:54:09.14#flagr#flagr/antenna,new-source 2006.229.13:54:09.14:checkk5 2006.229.13:54:09.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:54:09.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:54:10.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:54:10.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:54:11.17/chk_obsdata//k5ts1/T2291350??a.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:54:11.57/chk_obsdata//k5ts2/T2291350??b.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:54:11.97/chk_obsdata//k5ts3/T2291350??c.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:54:12.38/chk_obsdata//k5ts4/T2291350??d.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.13:54:13.10/k5log//k5ts1_log_newline 2006.229.13:54:13.79/k5log//k5ts2_log_newline 2006.229.13:54:14.51/k5log//k5ts3_log_newline 2006.229.13:54:15.25/k5log//k5ts4_log_newline 2006.229.13:54:15.28/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:54:15.28:setupk4=1 2006.229.13:54:15.28$setupk4/echo=on 2006.229.13:54:15.28$setupk4/pcalon 2006.229.13:54:15.28$pcalon/"no phase cal control is implemented here 2006.229.13:54:15.28$setupk4/"tpicd=stop 2006.229.13:54:15.28$setupk4/"rec=synch_on 2006.229.13:54:15.28$setupk4/"rec_mode=128 2006.229.13:54:15.28$setupk4/!* 2006.229.13:54:15.28$setupk4/recpk4 2006.229.13:54:15.28$recpk4/recpatch= 2006.229.13:54:15.28$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:54:15.28$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:54:15.28$setupk4/vck44 2006.229.13:54:15.28$vck44/valo=1,524.99 2006.229.13:54:15.28#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:54:15.28#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:54:15.28#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:15.28#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:15.28#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:15.28#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:15.28#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:54:15.28#ibcon#first serial, iclass 16, count 0 2006.229.13:54:15.28#ibcon#enter sib2, iclass 16, count 0 2006.229.13:54:15.28#ibcon#flushed, iclass 16, count 0 2006.229.13:54:15.28#ibcon#about to write, iclass 16, count 0 2006.229.13:54:15.28#ibcon#wrote, iclass 16, count 0 2006.229.13:54:15.28#ibcon#about to read 3, iclass 16, count 0 2006.229.13:54:15.30#ibcon#read 3, iclass 16, count 0 2006.229.13:54:15.30#ibcon#about to read 4, iclass 16, count 0 2006.229.13:54:15.30#ibcon#read 4, iclass 16, count 0 2006.229.13:54:15.30#ibcon#about to read 5, iclass 16, count 0 2006.229.13:54:15.30#ibcon#read 5, iclass 16, count 0 2006.229.13:54:15.30#ibcon#about to read 6, iclass 16, count 0 2006.229.13:54:15.30#ibcon#read 6, iclass 16, count 0 2006.229.13:54:15.30#ibcon#end of sib2, iclass 16, count 0 2006.229.13:54:15.30#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:54:15.30#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:54:15.30#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:54:15.30#ibcon#*before write, iclass 16, count 0 2006.229.13:54:15.30#ibcon#enter sib2, iclass 16, count 0 2006.229.13:54:15.30#ibcon#flushed, iclass 16, count 0 2006.229.13:54:15.30#ibcon#about to write, iclass 16, count 0 2006.229.13:54:15.30#ibcon#wrote, iclass 16, count 0 2006.229.13:54:15.30#ibcon#about to read 3, iclass 16, count 0 2006.229.13:54:15.35#ibcon#read 3, iclass 16, count 0 2006.229.13:54:15.35#ibcon#about to read 4, iclass 16, count 0 2006.229.13:54:15.35#ibcon#read 4, iclass 16, count 0 2006.229.13:54:15.35#ibcon#about to read 5, iclass 16, count 0 2006.229.13:54:15.35#ibcon#read 5, iclass 16, count 0 2006.229.13:54:15.35#ibcon#about to read 6, iclass 16, count 0 2006.229.13:54:15.35#ibcon#read 6, iclass 16, count 0 2006.229.13:54:15.35#ibcon#end of sib2, iclass 16, count 0 2006.229.13:54:15.35#ibcon#*after write, iclass 16, count 0 2006.229.13:54:15.35#ibcon#*before return 0, iclass 16, count 0 2006.229.13:54:15.35#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:15.35#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:15.35#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:54:15.35#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:54:15.35$vck44/va=1,8 2006.229.13:54:15.35#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:54:15.35#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:54:15.35#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:15.35#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:15.35#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:15.35#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:15.35#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:54:15.35#ibcon#first serial, iclass 18, count 2 2006.229.13:54:15.35#ibcon#enter sib2, iclass 18, count 2 2006.229.13:54:15.35#ibcon#flushed, iclass 18, count 2 2006.229.13:54:15.35#ibcon#about to write, iclass 18, count 2 2006.229.13:54:15.35#ibcon#wrote, iclass 18, count 2 2006.229.13:54:15.35#ibcon#about to read 3, iclass 18, count 2 2006.229.13:54:15.37#ibcon#read 3, iclass 18, count 2 2006.229.13:54:15.37#ibcon#about to read 4, iclass 18, count 2 2006.229.13:54:15.37#ibcon#read 4, iclass 18, count 2 2006.229.13:54:15.37#ibcon#about to read 5, iclass 18, count 2 2006.229.13:54:15.37#ibcon#read 5, iclass 18, count 2 2006.229.13:54:15.37#ibcon#about to read 6, iclass 18, count 2 2006.229.13:54:15.37#ibcon#read 6, iclass 18, count 2 2006.229.13:54:15.37#ibcon#end of sib2, iclass 18, count 2 2006.229.13:54:15.37#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:54:15.37#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:54:15.37#ibcon#[25=AT01-08\r\n] 2006.229.13:54:15.37#ibcon#*before write, iclass 18, count 2 2006.229.13:54:15.37#ibcon#enter sib2, iclass 18, count 2 2006.229.13:54:15.37#ibcon#flushed, iclass 18, count 2 2006.229.13:54:15.37#ibcon#about to write, iclass 18, count 2 2006.229.13:54:15.37#ibcon#wrote, iclass 18, count 2 2006.229.13:54:15.37#ibcon#about to read 3, iclass 18, count 2 2006.229.13:54:15.40#ibcon#read 3, iclass 18, count 2 2006.229.13:54:15.40#ibcon#about to read 4, iclass 18, count 2 2006.229.13:54:15.40#ibcon#read 4, iclass 18, count 2 2006.229.13:54:15.40#ibcon#about to read 5, iclass 18, count 2 2006.229.13:54:15.40#ibcon#read 5, iclass 18, count 2 2006.229.13:54:15.40#ibcon#about to read 6, iclass 18, count 2 2006.229.13:54:15.40#ibcon#read 6, iclass 18, count 2 2006.229.13:54:15.40#ibcon#end of sib2, iclass 18, count 2 2006.229.13:54:15.40#ibcon#*after write, iclass 18, count 2 2006.229.13:54:15.40#ibcon#*before return 0, iclass 18, count 2 2006.229.13:54:15.40#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:15.40#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:15.40#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:54:15.40#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:15.40#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:15.52#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:15.52#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:15.52#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:54:15.52#ibcon#first serial, iclass 18, count 0 2006.229.13:54:15.52#ibcon#enter sib2, iclass 18, count 0 2006.229.13:54:15.52#ibcon#flushed, iclass 18, count 0 2006.229.13:54:15.52#ibcon#about to write, iclass 18, count 0 2006.229.13:54:15.52#ibcon#wrote, iclass 18, count 0 2006.229.13:54:15.52#ibcon#about to read 3, iclass 18, count 0 2006.229.13:54:15.54#ibcon#read 3, iclass 18, count 0 2006.229.13:54:15.54#ibcon#about to read 4, iclass 18, count 0 2006.229.13:54:15.54#ibcon#read 4, iclass 18, count 0 2006.229.13:54:15.54#ibcon#about to read 5, iclass 18, count 0 2006.229.13:54:15.54#ibcon#read 5, iclass 18, count 0 2006.229.13:54:15.54#ibcon#about to read 6, iclass 18, count 0 2006.229.13:54:15.54#ibcon#read 6, iclass 18, count 0 2006.229.13:54:15.54#ibcon#end of sib2, iclass 18, count 0 2006.229.13:54:15.54#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:54:15.54#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:54:15.54#ibcon#[25=USB\r\n] 2006.229.13:54:15.54#ibcon#*before write, iclass 18, count 0 2006.229.13:54:15.54#ibcon#enter sib2, iclass 18, count 0 2006.229.13:54:15.54#ibcon#flushed, iclass 18, count 0 2006.229.13:54:15.54#ibcon#about to write, iclass 18, count 0 2006.229.13:54:15.54#ibcon#wrote, iclass 18, count 0 2006.229.13:54:15.54#ibcon#about to read 3, iclass 18, count 0 2006.229.13:54:15.57#ibcon#read 3, iclass 18, count 0 2006.229.13:54:15.57#ibcon#about to read 4, iclass 18, count 0 2006.229.13:54:15.57#ibcon#read 4, iclass 18, count 0 2006.229.13:54:15.57#ibcon#about to read 5, iclass 18, count 0 2006.229.13:54:15.57#ibcon#read 5, iclass 18, count 0 2006.229.13:54:15.57#ibcon#about to read 6, iclass 18, count 0 2006.229.13:54:15.57#ibcon#read 6, iclass 18, count 0 2006.229.13:54:15.57#ibcon#end of sib2, iclass 18, count 0 2006.229.13:54:15.57#ibcon#*after write, iclass 18, count 0 2006.229.13:54:15.57#ibcon#*before return 0, iclass 18, count 0 2006.229.13:54:15.57#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:15.57#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:15.57#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:54:15.57#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:54:15.57$vck44/valo=2,534.99 2006.229.13:54:15.57#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:54:15.57#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:54:15.57#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:15.57#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:15.57#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:15.57#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:15.57#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:54:15.57#ibcon#first serial, iclass 20, count 0 2006.229.13:54:15.57#ibcon#enter sib2, iclass 20, count 0 2006.229.13:54:15.57#ibcon#flushed, iclass 20, count 0 2006.229.13:54:15.57#ibcon#about to write, iclass 20, count 0 2006.229.13:54:15.57#ibcon#wrote, iclass 20, count 0 2006.229.13:54:15.57#ibcon#about to read 3, iclass 20, count 0 2006.229.13:54:15.59#ibcon#read 3, iclass 20, count 0 2006.229.13:54:15.59#ibcon#about to read 4, iclass 20, count 0 2006.229.13:54:15.59#ibcon#read 4, iclass 20, count 0 2006.229.13:54:15.59#ibcon#about to read 5, iclass 20, count 0 2006.229.13:54:15.59#ibcon#read 5, iclass 20, count 0 2006.229.13:54:15.59#ibcon#about to read 6, iclass 20, count 0 2006.229.13:54:15.59#ibcon#read 6, iclass 20, count 0 2006.229.13:54:15.59#ibcon#end of sib2, iclass 20, count 0 2006.229.13:54:15.59#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:54:15.59#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:54:15.59#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:54:15.59#ibcon#*before write, iclass 20, count 0 2006.229.13:54:15.59#ibcon#enter sib2, iclass 20, count 0 2006.229.13:54:15.59#ibcon#flushed, iclass 20, count 0 2006.229.13:54:15.59#ibcon#about to write, iclass 20, count 0 2006.229.13:54:15.59#ibcon#wrote, iclass 20, count 0 2006.229.13:54:15.59#ibcon#about to read 3, iclass 20, count 0 2006.229.13:54:15.63#ibcon#read 3, iclass 20, count 0 2006.229.13:54:15.63#ibcon#about to read 4, iclass 20, count 0 2006.229.13:54:15.63#ibcon#read 4, iclass 20, count 0 2006.229.13:54:15.63#ibcon#about to read 5, iclass 20, count 0 2006.229.13:54:15.63#ibcon#read 5, iclass 20, count 0 2006.229.13:54:15.63#ibcon#about to read 6, iclass 20, count 0 2006.229.13:54:15.63#ibcon#read 6, iclass 20, count 0 2006.229.13:54:15.63#ibcon#end of sib2, iclass 20, count 0 2006.229.13:54:15.63#ibcon#*after write, iclass 20, count 0 2006.229.13:54:15.63#ibcon#*before return 0, iclass 20, count 0 2006.229.13:54:15.63#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:15.63#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:15.63#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:54:15.63#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:54:15.63$vck44/va=2,7 2006.229.13:54:15.63#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:54:15.63#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:54:15.63#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:15.63#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:15.69#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:15.69#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:15.69#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:54:15.69#ibcon#first serial, iclass 22, count 2 2006.229.13:54:15.69#ibcon#enter sib2, iclass 22, count 2 2006.229.13:54:15.69#ibcon#flushed, iclass 22, count 2 2006.229.13:54:15.69#ibcon#about to write, iclass 22, count 2 2006.229.13:54:15.69#ibcon#wrote, iclass 22, count 2 2006.229.13:54:15.69#ibcon#about to read 3, iclass 22, count 2 2006.229.13:54:15.71#ibcon#read 3, iclass 22, count 2 2006.229.13:54:15.71#ibcon#about to read 4, iclass 22, count 2 2006.229.13:54:15.71#ibcon#read 4, iclass 22, count 2 2006.229.13:54:15.71#ibcon#about to read 5, iclass 22, count 2 2006.229.13:54:15.71#ibcon#read 5, iclass 22, count 2 2006.229.13:54:15.71#ibcon#about to read 6, iclass 22, count 2 2006.229.13:54:15.71#ibcon#read 6, iclass 22, count 2 2006.229.13:54:15.71#ibcon#end of sib2, iclass 22, count 2 2006.229.13:54:15.71#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:54:15.71#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:54:15.71#ibcon#[25=AT02-07\r\n] 2006.229.13:54:15.71#ibcon#*before write, iclass 22, count 2 2006.229.13:54:15.71#ibcon#enter sib2, iclass 22, count 2 2006.229.13:54:15.71#ibcon#flushed, iclass 22, count 2 2006.229.13:54:15.71#ibcon#about to write, iclass 22, count 2 2006.229.13:54:15.71#ibcon#wrote, iclass 22, count 2 2006.229.13:54:15.71#ibcon#about to read 3, iclass 22, count 2 2006.229.13:54:15.74#ibcon#read 3, iclass 22, count 2 2006.229.13:54:15.74#ibcon#about to read 4, iclass 22, count 2 2006.229.13:54:15.74#ibcon#read 4, iclass 22, count 2 2006.229.13:54:15.74#ibcon#about to read 5, iclass 22, count 2 2006.229.13:54:15.74#ibcon#read 5, iclass 22, count 2 2006.229.13:54:15.74#ibcon#about to read 6, iclass 22, count 2 2006.229.13:54:15.74#ibcon#read 6, iclass 22, count 2 2006.229.13:54:15.74#ibcon#end of sib2, iclass 22, count 2 2006.229.13:54:15.74#ibcon#*after write, iclass 22, count 2 2006.229.13:54:15.74#ibcon#*before return 0, iclass 22, count 2 2006.229.13:54:15.74#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:15.74#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:15.74#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:54:15.74#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:15.74#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:15.86#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:15.86#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:15.86#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:54:15.86#ibcon#first serial, iclass 22, count 0 2006.229.13:54:15.86#ibcon#enter sib2, iclass 22, count 0 2006.229.13:54:15.86#ibcon#flushed, iclass 22, count 0 2006.229.13:54:15.86#ibcon#about to write, iclass 22, count 0 2006.229.13:54:15.86#ibcon#wrote, iclass 22, count 0 2006.229.13:54:15.86#ibcon#about to read 3, iclass 22, count 0 2006.229.13:54:15.88#ibcon#read 3, iclass 22, count 0 2006.229.13:54:15.88#ibcon#about to read 4, iclass 22, count 0 2006.229.13:54:15.88#ibcon#read 4, iclass 22, count 0 2006.229.13:54:15.88#ibcon#about to read 5, iclass 22, count 0 2006.229.13:54:15.88#ibcon#read 5, iclass 22, count 0 2006.229.13:54:15.88#ibcon#about to read 6, iclass 22, count 0 2006.229.13:54:15.88#ibcon#read 6, iclass 22, count 0 2006.229.13:54:15.88#ibcon#end of sib2, iclass 22, count 0 2006.229.13:54:15.88#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:54:15.88#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:54:15.88#ibcon#[25=USB\r\n] 2006.229.13:54:15.88#ibcon#*before write, iclass 22, count 0 2006.229.13:54:15.88#ibcon#enter sib2, iclass 22, count 0 2006.229.13:54:15.88#ibcon#flushed, iclass 22, count 0 2006.229.13:54:15.88#ibcon#about to write, iclass 22, count 0 2006.229.13:54:15.88#ibcon#wrote, iclass 22, count 0 2006.229.13:54:15.88#ibcon#about to read 3, iclass 22, count 0 2006.229.13:54:15.91#ibcon#read 3, iclass 22, count 0 2006.229.13:54:15.91#ibcon#about to read 4, iclass 22, count 0 2006.229.13:54:15.91#ibcon#read 4, iclass 22, count 0 2006.229.13:54:15.91#ibcon#about to read 5, iclass 22, count 0 2006.229.13:54:15.91#ibcon#read 5, iclass 22, count 0 2006.229.13:54:15.91#ibcon#about to read 6, iclass 22, count 0 2006.229.13:54:15.91#ibcon#read 6, iclass 22, count 0 2006.229.13:54:15.91#ibcon#end of sib2, iclass 22, count 0 2006.229.13:54:15.91#ibcon#*after write, iclass 22, count 0 2006.229.13:54:15.91#ibcon#*before return 0, iclass 22, count 0 2006.229.13:54:15.91#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:15.91#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:15.91#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:54:15.91#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:54:15.91$vck44/valo=3,564.99 2006.229.13:54:15.91#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:54:15.91#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:54:15.91#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:15.91#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:15.91#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:15.91#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:15.91#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:54:15.91#ibcon#first serial, iclass 24, count 0 2006.229.13:54:15.91#ibcon#enter sib2, iclass 24, count 0 2006.229.13:54:15.91#ibcon#flushed, iclass 24, count 0 2006.229.13:54:15.91#ibcon#about to write, iclass 24, count 0 2006.229.13:54:15.91#ibcon#wrote, iclass 24, count 0 2006.229.13:54:15.91#ibcon#about to read 3, iclass 24, count 0 2006.229.13:54:15.93#ibcon#read 3, iclass 24, count 0 2006.229.13:54:15.93#ibcon#about to read 4, iclass 24, count 0 2006.229.13:54:15.93#ibcon#read 4, iclass 24, count 0 2006.229.13:54:15.93#ibcon#about to read 5, iclass 24, count 0 2006.229.13:54:15.93#ibcon#read 5, iclass 24, count 0 2006.229.13:54:15.93#ibcon#about to read 6, iclass 24, count 0 2006.229.13:54:15.93#ibcon#read 6, iclass 24, count 0 2006.229.13:54:15.93#ibcon#end of sib2, iclass 24, count 0 2006.229.13:54:15.93#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:54:15.93#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:54:15.93#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:54:15.93#ibcon#*before write, iclass 24, count 0 2006.229.13:54:15.93#ibcon#enter sib2, iclass 24, count 0 2006.229.13:54:15.93#ibcon#flushed, iclass 24, count 0 2006.229.13:54:15.93#ibcon#about to write, iclass 24, count 0 2006.229.13:54:15.93#ibcon#wrote, iclass 24, count 0 2006.229.13:54:15.93#ibcon#about to read 3, iclass 24, count 0 2006.229.13:54:15.97#ibcon#read 3, iclass 24, count 0 2006.229.13:54:15.97#ibcon#about to read 4, iclass 24, count 0 2006.229.13:54:15.97#ibcon#read 4, iclass 24, count 0 2006.229.13:54:15.97#ibcon#about to read 5, iclass 24, count 0 2006.229.13:54:15.97#ibcon#read 5, iclass 24, count 0 2006.229.13:54:15.97#ibcon#about to read 6, iclass 24, count 0 2006.229.13:54:15.97#ibcon#read 6, iclass 24, count 0 2006.229.13:54:15.97#ibcon#end of sib2, iclass 24, count 0 2006.229.13:54:15.97#ibcon#*after write, iclass 24, count 0 2006.229.13:54:15.97#ibcon#*before return 0, iclass 24, count 0 2006.229.13:54:15.97#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:15.97#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:15.97#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:54:15.97#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:54:15.97$vck44/va=3,6 2006.229.13:54:15.97#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:54:15.97#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:54:15.97#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:15.97#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:16.03#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:16.03#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:16.03#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:54:16.03#ibcon#first serial, iclass 26, count 2 2006.229.13:54:16.03#ibcon#enter sib2, iclass 26, count 2 2006.229.13:54:16.03#ibcon#flushed, iclass 26, count 2 2006.229.13:54:16.03#ibcon#about to write, iclass 26, count 2 2006.229.13:54:16.03#ibcon#wrote, iclass 26, count 2 2006.229.13:54:16.03#ibcon#about to read 3, iclass 26, count 2 2006.229.13:54:16.05#ibcon#read 3, iclass 26, count 2 2006.229.13:54:16.05#ibcon#about to read 4, iclass 26, count 2 2006.229.13:54:16.05#ibcon#read 4, iclass 26, count 2 2006.229.13:54:16.05#ibcon#about to read 5, iclass 26, count 2 2006.229.13:54:16.05#ibcon#read 5, iclass 26, count 2 2006.229.13:54:16.05#ibcon#about to read 6, iclass 26, count 2 2006.229.13:54:16.05#ibcon#read 6, iclass 26, count 2 2006.229.13:54:16.05#ibcon#end of sib2, iclass 26, count 2 2006.229.13:54:16.05#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:54:16.05#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:54:16.05#ibcon#[25=AT03-06\r\n] 2006.229.13:54:16.05#ibcon#*before write, iclass 26, count 2 2006.229.13:54:16.05#ibcon#enter sib2, iclass 26, count 2 2006.229.13:54:16.05#ibcon#flushed, iclass 26, count 2 2006.229.13:54:16.05#ibcon#about to write, iclass 26, count 2 2006.229.13:54:16.05#ibcon#wrote, iclass 26, count 2 2006.229.13:54:16.05#ibcon#about to read 3, iclass 26, count 2 2006.229.13:54:16.08#ibcon#read 3, iclass 26, count 2 2006.229.13:54:16.08#ibcon#about to read 4, iclass 26, count 2 2006.229.13:54:16.08#ibcon#read 4, iclass 26, count 2 2006.229.13:54:16.08#ibcon#about to read 5, iclass 26, count 2 2006.229.13:54:16.08#ibcon#read 5, iclass 26, count 2 2006.229.13:54:16.08#ibcon#about to read 6, iclass 26, count 2 2006.229.13:54:16.08#ibcon#read 6, iclass 26, count 2 2006.229.13:54:16.08#ibcon#end of sib2, iclass 26, count 2 2006.229.13:54:16.08#ibcon#*after write, iclass 26, count 2 2006.229.13:54:16.08#ibcon#*before return 0, iclass 26, count 2 2006.229.13:54:16.08#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:16.08#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:16.08#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:54:16.08#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:16.08#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:16.20#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:16.20#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:16.20#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:54:16.20#ibcon#first serial, iclass 26, count 0 2006.229.13:54:16.20#ibcon#enter sib2, iclass 26, count 0 2006.229.13:54:16.20#ibcon#flushed, iclass 26, count 0 2006.229.13:54:16.20#ibcon#about to write, iclass 26, count 0 2006.229.13:54:16.20#ibcon#wrote, iclass 26, count 0 2006.229.13:54:16.20#ibcon#about to read 3, iclass 26, count 0 2006.229.13:54:16.22#ibcon#read 3, iclass 26, count 0 2006.229.13:54:16.22#ibcon#about to read 4, iclass 26, count 0 2006.229.13:54:16.22#ibcon#read 4, iclass 26, count 0 2006.229.13:54:16.22#ibcon#about to read 5, iclass 26, count 0 2006.229.13:54:16.22#ibcon#read 5, iclass 26, count 0 2006.229.13:54:16.22#ibcon#about to read 6, iclass 26, count 0 2006.229.13:54:16.22#ibcon#read 6, iclass 26, count 0 2006.229.13:54:16.22#ibcon#end of sib2, iclass 26, count 0 2006.229.13:54:16.22#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:54:16.22#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:54:16.22#ibcon#[25=USB\r\n] 2006.229.13:54:16.22#ibcon#*before write, iclass 26, count 0 2006.229.13:54:16.22#ibcon#enter sib2, iclass 26, count 0 2006.229.13:54:16.22#ibcon#flushed, iclass 26, count 0 2006.229.13:54:16.22#ibcon#about to write, iclass 26, count 0 2006.229.13:54:16.22#ibcon#wrote, iclass 26, count 0 2006.229.13:54:16.22#ibcon#about to read 3, iclass 26, count 0 2006.229.13:54:16.25#ibcon#read 3, iclass 26, count 0 2006.229.13:54:16.25#ibcon#about to read 4, iclass 26, count 0 2006.229.13:54:16.25#ibcon#read 4, iclass 26, count 0 2006.229.13:54:16.25#ibcon#about to read 5, iclass 26, count 0 2006.229.13:54:16.25#ibcon#read 5, iclass 26, count 0 2006.229.13:54:16.25#ibcon#about to read 6, iclass 26, count 0 2006.229.13:54:16.25#ibcon#read 6, iclass 26, count 0 2006.229.13:54:16.25#ibcon#end of sib2, iclass 26, count 0 2006.229.13:54:16.25#ibcon#*after write, iclass 26, count 0 2006.229.13:54:16.25#ibcon#*before return 0, iclass 26, count 0 2006.229.13:54:16.25#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:16.25#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:16.25#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:54:16.25#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:54:16.25$vck44/valo=4,624.99 2006.229.13:54:16.25#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:54:16.25#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:54:16.25#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:16.25#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:16.25#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:16.25#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:16.25#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:54:16.25#ibcon#first serial, iclass 28, count 0 2006.229.13:54:16.25#ibcon#enter sib2, iclass 28, count 0 2006.229.13:54:16.25#ibcon#flushed, iclass 28, count 0 2006.229.13:54:16.25#ibcon#about to write, iclass 28, count 0 2006.229.13:54:16.25#ibcon#wrote, iclass 28, count 0 2006.229.13:54:16.25#ibcon#about to read 3, iclass 28, count 0 2006.229.13:54:16.27#ibcon#read 3, iclass 28, count 0 2006.229.13:54:16.27#ibcon#about to read 4, iclass 28, count 0 2006.229.13:54:16.27#ibcon#read 4, iclass 28, count 0 2006.229.13:54:16.27#ibcon#about to read 5, iclass 28, count 0 2006.229.13:54:16.27#ibcon#read 5, iclass 28, count 0 2006.229.13:54:16.27#ibcon#about to read 6, iclass 28, count 0 2006.229.13:54:16.27#ibcon#read 6, iclass 28, count 0 2006.229.13:54:16.27#ibcon#end of sib2, iclass 28, count 0 2006.229.13:54:16.27#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:54:16.27#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:54:16.27#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:54:16.27#ibcon#*before write, iclass 28, count 0 2006.229.13:54:16.27#ibcon#enter sib2, iclass 28, count 0 2006.229.13:54:16.27#ibcon#flushed, iclass 28, count 0 2006.229.13:54:16.27#ibcon#about to write, iclass 28, count 0 2006.229.13:54:16.27#ibcon#wrote, iclass 28, count 0 2006.229.13:54:16.27#ibcon#about to read 3, iclass 28, count 0 2006.229.13:54:16.31#ibcon#read 3, iclass 28, count 0 2006.229.13:54:16.31#ibcon#about to read 4, iclass 28, count 0 2006.229.13:54:16.31#ibcon#read 4, iclass 28, count 0 2006.229.13:54:16.31#ibcon#about to read 5, iclass 28, count 0 2006.229.13:54:16.31#ibcon#read 5, iclass 28, count 0 2006.229.13:54:16.31#ibcon#about to read 6, iclass 28, count 0 2006.229.13:54:16.31#ibcon#read 6, iclass 28, count 0 2006.229.13:54:16.31#ibcon#end of sib2, iclass 28, count 0 2006.229.13:54:16.31#ibcon#*after write, iclass 28, count 0 2006.229.13:54:16.31#ibcon#*before return 0, iclass 28, count 0 2006.229.13:54:16.31#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:16.31#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:16.31#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:54:16.31#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:54:16.31$vck44/va=4,7 2006.229.13:54:16.31#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:54:16.31#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:54:16.31#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:16.31#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:16.37#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:16.37#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:16.37#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:54:16.37#ibcon#first serial, iclass 30, count 2 2006.229.13:54:16.37#ibcon#enter sib2, iclass 30, count 2 2006.229.13:54:16.37#ibcon#flushed, iclass 30, count 2 2006.229.13:54:16.37#ibcon#about to write, iclass 30, count 2 2006.229.13:54:16.37#ibcon#wrote, iclass 30, count 2 2006.229.13:54:16.37#ibcon#about to read 3, iclass 30, count 2 2006.229.13:54:16.39#ibcon#read 3, iclass 30, count 2 2006.229.13:54:16.39#ibcon#about to read 4, iclass 30, count 2 2006.229.13:54:16.39#ibcon#read 4, iclass 30, count 2 2006.229.13:54:16.39#ibcon#about to read 5, iclass 30, count 2 2006.229.13:54:16.39#ibcon#read 5, iclass 30, count 2 2006.229.13:54:16.39#ibcon#about to read 6, iclass 30, count 2 2006.229.13:54:16.39#ibcon#read 6, iclass 30, count 2 2006.229.13:54:16.39#ibcon#end of sib2, iclass 30, count 2 2006.229.13:54:16.39#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:54:16.39#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:54:16.39#ibcon#[25=AT04-07\r\n] 2006.229.13:54:16.39#ibcon#*before write, iclass 30, count 2 2006.229.13:54:16.39#ibcon#enter sib2, iclass 30, count 2 2006.229.13:54:16.39#ibcon#flushed, iclass 30, count 2 2006.229.13:54:16.39#ibcon#about to write, iclass 30, count 2 2006.229.13:54:16.39#ibcon#wrote, iclass 30, count 2 2006.229.13:54:16.39#ibcon#about to read 3, iclass 30, count 2 2006.229.13:54:16.42#ibcon#read 3, iclass 30, count 2 2006.229.13:54:16.42#ibcon#about to read 4, iclass 30, count 2 2006.229.13:54:16.42#ibcon#read 4, iclass 30, count 2 2006.229.13:54:16.42#ibcon#about to read 5, iclass 30, count 2 2006.229.13:54:16.42#ibcon#read 5, iclass 30, count 2 2006.229.13:54:16.42#ibcon#about to read 6, iclass 30, count 2 2006.229.13:54:16.42#ibcon#read 6, iclass 30, count 2 2006.229.13:54:16.42#ibcon#end of sib2, iclass 30, count 2 2006.229.13:54:16.42#ibcon#*after write, iclass 30, count 2 2006.229.13:54:16.42#ibcon#*before return 0, iclass 30, count 2 2006.229.13:54:16.50#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:16.50#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:16.50#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:54:16.50#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:16.50#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:16.61#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:16.61#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:16.61#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:54:16.61#ibcon#first serial, iclass 30, count 0 2006.229.13:54:16.61#ibcon#enter sib2, iclass 30, count 0 2006.229.13:54:16.61#ibcon#flushed, iclass 30, count 0 2006.229.13:54:16.61#ibcon#about to write, iclass 30, count 0 2006.229.13:54:16.61#ibcon#wrote, iclass 30, count 0 2006.229.13:54:16.61#ibcon#about to read 3, iclass 30, count 0 2006.229.13:54:16.63#ibcon#read 3, iclass 30, count 0 2006.229.13:54:16.63#ibcon#about to read 4, iclass 30, count 0 2006.229.13:54:16.63#ibcon#read 4, iclass 30, count 0 2006.229.13:54:16.63#ibcon#about to read 5, iclass 30, count 0 2006.229.13:54:16.63#ibcon#read 5, iclass 30, count 0 2006.229.13:54:16.63#ibcon#about to read 6, iclass 30, count 0 2006.229.13:54:16.63#ibcon#read 6, iclass 30, count 0 2006.229.13:54:16.63#ibcon#end of sib2, iclass 30, count 0 2006.229.13:54:16.63#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:54:16.63#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:54:16.63#ibcon#[25=USB\r\n] 2006.229.13:54:16.63#ibcon#*before write, iclass 30, count 0 2006.229.13:54:16.63#ibcon#enter sib2, iclass 30, count 0 2006.229.13:54:16.63#ibcon#flushed, iclass 30, count 0 2006.229.13:54:16.63#ibcon#about to write, iclass 30, count 0 2006.229.13:54:16.63#ibcon#wrote, iclass 30, count 0 2006.229.13:54:16.63#ibcon#about to read 3, iclass 30, count 0 2006.229.13:54:16.66#ibcon#read 3, iclass 30, count 0 2006.229.13:54:16.66#ibcon#about to read 4, iclass 30, count 0 2006.229.13:54:16.66#ibcon#read 4, iclass 30, count 0 2006.229.13:54:16.66#ibcon#about to read 5, iclass 30, count 0 2006.229.13:54:16.66#ibcon#read 5, iclass 30, count 0 2006.229.13:54:16.66#ibcon#about to read 6, iclass 30, count 0 2006.229.13:54:16.66#ibcon#read 6, iclass 30, count 0 2006.229.13:54:16.66#ibcon#end of sib2, iclass 30, count 0 2006.229.13:54:16.66#ibcon#*after write, iclass 30, count 0 2006.229.13:54:16.66#ibcon#*before return 0, iclass 30, count 0 2006.229.13:54:16.66#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:16.66#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:16.66#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:54:16.66#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:54:16.66$vck44/valo=5,734.99 2006.229.13:54:16.66#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:54:16.66#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:54:16.66#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:16.66#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:16.66#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:16.66#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:16.66#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:54:16.66#ibcon#first serial, iclass 32, count 0 2006.229.13:54:16.66#ibcon#enter sib2, iclass 32, count 0 2006.229.13:54:16.66#ibcon#flushed, iclass 32, count 0 2006.229.13:54:16.66#ibcon#about to write, iclass 32, count 0 2006.229.13:54:16.66#ibcon#wrote, iclass 32, count 0 2006.229.13:54:16.66#ibcon#about to read 3, iclass 32, count 0 2006.229.13:54:16.68#ibcon#read 3, iclass 32, count 0 2006.229.13:54:16.68#ibcon#about to read 4, iclass 32, count 0 2006.229.13:54:16.68#ibcon#read 4, iclass 32, count 0 2006.229.13:54:16.68#ibcon#about to read 5, iclass 32, count 0 2006.229.13:54:16.68#ibcon#read 5, iclass 32, count 0 2006.229.13:54:16.68#ibcon#about to read 6, iclass 32, count 0 2006.229.13:54:16.68#ibcon#read 6, iclass 32, count 0 2006.229.13:54:16.68#ibcon#end of sib2, iclass 32, count 0 2006.229.13:54:16.68#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:54:16.68#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:54:16.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:54:16.68#ibcon#*before write, iclass 32, count 0 2006.229.13:54:16.68#ibcon#enter sib2, iclass 32, count 0 2006.229.13:54:16.68#ibcon#flushed, iclass 32, count 0 2006.229.13:54:16.68#ibcon#about to write, iclass 32, count 0 2006.229.13:54:16.68#ibcon#wrote, iclass 32, count 0 2006.229.13:54:16.68#ibcon#about to read 3, iclass 32, count 0 2006.229.13:54:16.72#ibcon#read 3, iclass 32, count 0 2006.229.13:54:16.72#ibcon#about to read 4, iclass 32, count 0 2006.229.13:54:16.72#ibcon#read 4, iclass 32, count 0 2006.229.13:54:16.72#ibcon#about to read 5, iclass 32, count 0 2006.229.13:54:16.72#ibcon#read 5, iclass 32, count 0 2006.229.13:54:16.72#ibcon#about to read 6, iclass 32, count 0 2006.229.13:54:16.72#ibcon#read 6, iclass 32, count 0 2006.229.13:54:16.72#ibcon#end of sib2, iclass 32, count 0 2006.229.13:54:16.72#ibcon#*after write, iclass 32, count 0 2006.229.13:54:16.72#ibcon#*before return 0, iclass 32, count 0 2006.229.13:54:16.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:16.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:16.72#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:54:16.72#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:54:16.72$vck44/va=5,4 2006.229.13:54:16.72#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:54:16.72#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:54:16.72#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:16.72#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:16.78#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:16.78#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:16.78#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:54:16.78#ibcon#first serial, iclass 34, count 2 2006.229.13:54:16.78#ibcon#enter sib2, iclass 34, count 2 2006.229.13:54:16.78#ibcon#flushed, iclass 34, count 2 2006.229.13:54:16.78#ibcon#about to write, iclass 34, count 2 2006.229.13:54:16.78#ibcon#wrote, iclass 34, count 2 2006.229.13:54:16.78#ibcon#about to read 3, iclass 34, count 2 2006.229.13:54:16.80#ibcon#read 3, iclass 34, count 2 2006.229.13:54:16.80#ibcon#about to read 4, iclass 34, count 2 2006.229.13:54:16.80#ibcon#read 4, iclass 34, count 2 2006.229.13:54:16.80#ibcon#about to read 5, iclass 34, count 2 2006.229.13:54:16.80#ibcon#read 5, iclass 34, count 2 2006.229.13:54:16.80#ibcon#about to read 6, iclass 34, count 2 2006.229.13:54:16.80#ibcon#read 6, iclass 34, count 2 2006.229.13:54:16.80#ibcon#end of sib2, iclass 34, count 2 2006.229.13:54:16.80#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:54:16.80#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:54:16.80#ibcon#[25=AT05-04\r\n] 2006.229.13:54:16.80#ibcon#*before write, iclass 34, count 2 2006.229.13:54:16.80#ibcon#enter sib2, iclass 34, count 2 2006.229.13:54:16.80#ibcon#flushed, iclass 34, count 2 2006.229.13:54:16.80#ibcon#about to write, iclass 34, count 2 2006.229.13:54:16.80#ibcon#wrote, iclass 34, count 2 2006.229.13:54:16.80#ibcon#about to read 3, iclass 34, count 2 2006.229.13:54:16.83#ibcon#read 3, iclass 34, count 2 2006.229.13:54:16.83#ibcon#about to read 4, iclass 34, count 2 2006.229.13:54:16.83#ibcon#read 4, iclass 34, count 2 2006.229.13:54:16.83#ibcon#about to read 5, iclass 34, count 2 2006.229.13:54:16.83#ibcon#read 5, iclass 34, count 2 2006.229.13:54:16.83#ibcon#about to read 6, iclass 34, count 2 2006.229.13:54:16.83#ibcon#read 6, iclass 34, count 2 2006.229.13:54:16.83#ibcon#end of sib2, iclass 34, count 2 2006.229.13:54:16.83#ibcon#*after write, iclass 34, count 2 2006.229.13:54:16.83#ibcon#*before return 0, iclass 34, count 2 2006.229.13:54:16.83#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:16.83#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:16.83#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:54:16.83#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:16.83#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:16.95#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:16.95#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:16.95#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:54:16.95#ibcon#first serial, iclass 34, count 0 2006.229.13:54:16.95#ibcon#enter sib2, iclass 34, count 0 2006.229.13:54:16.95#ibcon#flushed, iclass 34, count 0 2006.229.13:54:16.95#ibcon#about to write, iclass 34, count 0 2006.229.13:54:16.95#ibcon#wrote, iclass 34, count 0 2006.229.13:54:16.95#ibcon#about to read 3, iclass 34, count 0 2006.229.13:54:16.97#ibcon#read 3, iclass 34, count 0 2006.229.13:54:16.97#ibcon#about to read 4, iclass 34, count 0 2006.229.13:54:16.97#ibcon#read 4, iclass 34, count 0 2006.229.13:54:16.97#ibcon#about to read 5, iclass 34, count 0 2006.229.13:54:16.97#ibcon#read 5, iclass 34, count 0 2006.229.13:54:16.97#ibcon#about to read 6, iclass 34, count 0 2006.229.13:54:16.97#ibcon#read 6, iclass 34, count 0 2006.229.13:54:16.97#ibcon#end of sib2, iclass 34, count 0 2006.229.13:54:16.97#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:54:16.97#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:54:16.97#ibcon#[25=USB\r\n] 2006.229.13:54:16.97#ibcon#*before write, iclass 34, count 0 2006.229.13:54:16.97#ibcon#enter sib2, iclass 34, count 0 2006.229.13:54:16.97#ibcon#flushed, iclass 34, count 0 2006.229.13:54:16.97#ibcon#about to write, iclass 34, count 0 2006.229.13:54:16.97#ibcon#wrote, iclass 34, count 0 2006.229.13:54:16.97#ibcon#about to read 3, iclass 34, count 0 2006.229.13:54:17.00#ibcon#read 3, iclass 34, count 0 2006.229.13:54:17.00#ibcon#about to read 4, iclass 34, count 0 2006.229.13:54:17.00#ibcon#read 4, iclass 34, count 0 2006.229.13:54:17.00#ibcon#about to read 5, iclass 34, count 0 2006.229.13:54:17.00#ibcon#read 5, iclass 34, count 0 2006.229.13:54:17.00#ibcon#about to read 6, iclass 34, count 0 2006.229.13:54:17.00#ibcon#read 6, iclass 34, count 0 2006.229.13:54:17.00#ibcon#end of sib2, iclass 34, count 0 2006.229.13:54:17.00#ibcon#*after write, iclass 34, count 0 2006.229.13:54:17.00#ibcon#*before return 0, iclass 34, count 0 2006.229.13:54:17.00#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:17.00#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:17.00#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:54:17.00#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:54:17.00$vck44/valo=6,814.99 2006.229.13:54:17.00#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:54:17.00#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:54:17.00#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:17.00#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:17.00#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:17.00#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:17.00#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:54:17.00#ibcon#first serial, iclass 36, count 0 2006.229.13:54:17.00#ibcon#enter sib2, iclass 36, count 0 2006.229.13:54:17.00#ibcon#flushed, iclass 36, count 0 2006.229.13:54:17.00#ibcon#about to write, iclass 36, count 0 2006.229.13:54:17.00#ibcon#wrote, iclass 36, count 0 2006.229.13:54:17.00#ibcon#about to read 3, iclass 36, count 0 2006.229.13:54:17.02#ibcon#read 3, iclass 36, count 0 2006.229.13:54:17.02#ibcon#about to read 4, iclass 36, count 0 2006.229.13:54:17.02#ibcon#read 4, iclass 36, count 0 2006.229.13:54:17.02#ibcon#about to read 5, iclass 36, count 0 2006.229.13:54:17.02#ibcon#read 5, iclass 36, count 0 2006.229.13:54:17.02#ibcon#about to read 6, iclass 36, count 0 2006.229.13:54:17.02#ibcon#read 6, iclass 36, count 0 2006.229.13:54:17.02#ibcon#end of sib2, iclass 36, count 0 2006.229.13:54:17.02#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:54:17.02#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:54:17.02#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:54:17.02#ibcon#*before write, iclass 36, count 0 2006.229.13:54:17.02#ibcon#enter sib2, iclass 36, count 0 2006.229.13:54:17.02#ibcon#flushed, iclass 36, count 0 2006.229.13:54:17.02#ibcon#about to write, iclass 36, count 0 2006.229.13:54:17.02#ibcon#wrote, iclass 36, count 0 2006.229.13:54:17.02#ibcon#about to read 3, iclass 36, count 0 2006.229.13:54:17.06#ibcon#read 3, iclass 36, count 0 2006.229.13:54:17.06#ibcon#about to read 4, iclass 36, count 0 2006.229.13:54:17.06#ibcon#read 4, iclass 36, count 0 2006.229.13:54:17.06#ibcon#about to read 5, iclass 36, count 0 2006.229.13:54:17.06#ibcon#read 5, iclass 36, count 0 2006.229.13:54:17.06#ibcon#about to read 6, iclass 36, count 0 2006.229.13:54:17.06#ibcon#read 6, iclass 36, count 0 2006.229.13:54:17.06#ibcon#end of sib2, iclass 36, count 0 2006.229.13:54:17.06#ibcon#*after write, iclass 36, count 0 2006.229.13:54:17.06#ibcon#*before return 0, iclass 36, count 0 2006.229.13:54:17.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:17.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:17.06#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:54:17.06#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:54:17.06$vck44/va=6,4 2006.229.13:54:17.06#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:54:17.06#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:54:17.06#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:17.06#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:17.12#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:17.12#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:17.12#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:54:17.12#ibcon#first serial, iclass 38, count 2 2006.229.13:54:17.12#ibcon#enter sib2, iclass 38, count 2 2006.229.13:54:17.12#ibcon#flushed, iclass 38, count 2 2006.229.13:54:17.12#ibcon#about to write, iclass 38, count 2 2006.229.13:54:17.12#ibcon#wrote, iclass 38, count 2 2006.229.13:54:17.12#ibcon#about to read 3, iclass 38, count 2 2006.229.13:54:17.14#ibcon#read 3, iclass 38, count 2 2006.229.13:54:17.14#ibcon#about to read 4, iclass 38, count 2 2006.229.13:54:17.14#ibcon#read 4, iclass 38, count 2 2006.229.13:54:17.14#ibcon#about to read 5, iclass 38, count 2 2006.229.13:54:17.14#ibcon#read 5, iclass 38, count 2 2006.229.13:54:17.14#ibcon#about to read 6, iclass 38, count 2 2006.229.13:54:17.14#ibcon#read 6, iclass 38, count 2 2006.229.13:54:17.14#ibcon#end of sib2, iclass 38, count 2 2006.229.13:54:17.14#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:54:17.14#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:54:17.14#ibcon#[25=AT06-04\r\n] 2006.229.13:54:17.14#ibcon#*before write, iclass 38, count 2 2006.229.13:54:17.14#ibcon#enter sib2, iclass 38, count 2 2006.229.13:54:17.14#ibcon#flushed, iclass 38, count 2 2006.229.13:54:17.14#ibcon#about to write, iclass 38, count 2 2006.229.13:54:17.14#ibcon#wrote, iclass 38, count 2 2006.229.13:54:17.14#ibcon#about to read 3, iclass 38, count 2 2006.229.13:54:17.17#ibcon#read 3, iclass 38, count 2 2006.229.13:54:17.17#ibcon#about to read 4, iclass 38, count 2 2006.229.13:54:17.17#ibcon#read 4, iclass 38, count 2 2006.229.13:54:17.17#ibcon#about to read 5, iclass 38, count 2 2006.229.13:54:17.17#ibcon#read 5, iclass 38, count 2 2006.229.13:54:17.17#ibcon#about to read 6, iclass 38, count 2 2006.229.13:54:17.17#ibcon#read 6, iclass 38, count 2 2006.229.13:54:17.17#ibcon#end of sib2, iclass 38, count 2 2006.229.13:54:17.17#ibcon#*after write, iclass 38, count 2 2006.229.13:54:17.17#ibcon#*before return 0, iclass 38, count 2 2006.229.13:54:17.17#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:17.17#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:17.17#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:54:17.17#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:17.17#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:17.29#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:17.29#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:17.29#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:54:17.29#ibcon#first serial, iclass 38, count 0 2006.229.13:54:17.29#ibcon#enter sib2, iclass 38, count 0 2006.229.13:54:17.29#ibcon#flushed, iclass 38, count 0 2006.229.13:54:17.29#ibcon#about to write, iclass 38, count 0 2006.229.13:54:17.29#ibcon#wrote, iclass 38, count 0 2006.229.13:54:17.29#ibcon#about to read 3, iclass 38, count 0 2006.229.13:54:17.31#ibcon#read 3, iclass 38, count 0 2006.229.13:54:17.31#ibcon#about to read 4, iclass 38, count 0 2006.229.13:54:17.31#ibcon#read 4, iclass 38, count 0 2006.229.13:54:17.31#ibcon#about to read 5, iclass 38, count 0 2006.229.13:54:17.31#ibcon#read 5, iclass 38, count 0 2006.229.13:54:17.31#ibcon#about to read 6, iclass 38, count 0 2006.229.13:54:17.31#ibcon#read 6, iclass 38, count 0 2006.229.13:54:17.31#ibcon#end of sib2, iclass 38, count 0 2006.229.13:54:17.31#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:54:17.31#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:54:17.31#ibcon#[25=USB\r\n] 2006.229.13:54:17.31#ibcon#*before write, iclass 38, count 0 2006.229.13:54:17.31#ibcon#enter sib2, iclass 38, count 0 2006.229.13:54:17.31#ibcon#flushed, iclass 38, count 0 2006.229.13:54:17.31#ibcon#about to write, iclass 38, count 0 2006.229.13:54:17.31#ibcon#wrote, iclass 38, count 0 2006.229.13:54:17.31#ibcon#about to read 3, iclass 38, count 0 2006.229.13:54:17.34#ibcon#read 3, iclass 38, count 0 2006.229.13:54:17.34#ibcon#about to read 4, iclass 38, count 0 2006.229.13:54:17.34#ibcon#read 4, iclass 38, count 0 2006.229.13:54:17.34#ibcon#about to read 5, iclass 38, count 0 2006.229.13:54:17.34#ibcon#read 5, iclass 38, count 0 2006.229.13:54:17.34#ibcon#about to read 6, iclass 38, count 0 2006.229.13:54:17.34#ibcon#read 6, iclass 38, count 0 2006.229.13:54:17.34#ibcon#end of sib2, iclass 38, count 0 2006.229.13:54:17.34#ibcon#*after write, iclass 38, count 0 2006.229.13:54:17.34#ibcon#*before return 0, iclass 38, count 0 2006.229.13:54:17.34#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:17.34#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:17.34#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:54:17.34#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:54:17.34$vck44/valo=7,864.99 2006.229.13:54:17.34#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:54:17.34#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:54:17.34#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:17.34#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:17.34#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:17.34#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:17.34#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:54:17.34#ibcon#first serial, iclass 40, count 0 2006.229.13:54:17.34#ibcon#enter sib2, iclass 40, count 0 2006.229.13:54:17.34#ibcon#flushed, iclass 40, count 0 2006.229.13:54:17.34#ibcon#about to write, iclass 40, count 0 2006.229.13:54:17.34#ibcon#wrote, iclass 40, count 0 2006.229.13:54:17.34#ibcon#about to read 3, iclass 40, count 0 2006.229.13:54:17.36#ibcon#read 3, iclass 40, count 0 2006.229.13:54:17.36#ibcon#about to read 4, iclass 40, count 0 2006.229.13:54:17.36#ibcon#read 4, iclass 40, count 0 2006.229.13:54:17.36#ibcon#about to read 5, iclass 40, count 0 2006.229.13:54:17.36#ibcon#read 5, iclass 40, count 0 2006.229.13:54:17.36#ibcon#about to read 6, iclass 40, count 0 2006.229.13:54:17.36#ibcon#read 6, iclass 40, count 0 2006.229.13:54:17.36#ibcon#end of sib2, iclass 40, count 0 2006.229.13:54:17.36#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:54:17.36#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:54:17.36#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:54:17.36#ibcon#*before write, iclass 40, count 0 2006.229.13:54:17.36#ibcon#enter sib2, iclass 40, count 0 2006.229.13:54:17.36#ibcon#flushed, iclass 40, count 0 2006.229.13:54:17.36#ibcon#about to write, iclass 40, count 0 2006.229.13:54:17.36#ibcon#wrote, iclass 40, count 0 2006.229.13:54:17.36#ibcon#about to read 3, iclass 40, count 0 2006.229.13:54:17.40#ibcon#read 3, iclass 40, count 0 2006.229.13:54:17.40#ibcon#about to read 4, iclass 40, count 0 2006.229.13:54:17.40#ibcon#read 4, iclass 40, count 0 2006.229.13:54:17.40#ibcon#about to read 5, iclass 40, count 0 2006.229.13:54:17.40#ibcon#read 5, iclass 40, count 0 2006.229.13:54:17.40#ibcon#about to read 6, iclass 40, count 0 2006.229.13:54:17.40#ibcon#read 6, iclass 40, count 0 2006.229.13:54:17.40#ibcon#end of sib2, iclass 40, count 0 2006.229.13:54:17.40#ibcon#*after write, iclass 40, count 0 2006.229.13:54:17.40#ibcon#*before return 0, iclass 40, count 0 2006.229.13:54:17.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:17.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:17.40#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:54:17.40#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:54:17.40$vck44/va=7,5 2006.229.13:54:17.40#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.13:54:17.40#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.13:54:17.40#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:17.40#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:17.46#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:17.46#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:17.46#ibcon#enter wrdev, iclass 4, count 2 2006.229.13:54:17.46#ibcon#first serial, iclass 4, count 2 2006.229.13:54:17.46#ibcon#enter sib2, iclass 4, count 2 2006.229.13:54:17.46#ibcon#flushed, iclass 4, count 2 2006.229.13:54:17.46#ibcon#about to write, iclass 4, count 2 2006.229.13:54:17.46#ibcon#wrote, iclass 4, count 2 2006.229.13:54:17.46#ibcon#about to read 3, iclass 4, count 2 2006.229.13:54:17.48#ibcon#read 3, iclass 4, count 2 2006.229.13:54:17.48#ibcon#about to read 4, iclass 4, count 2 2006.229.13:54:17.48#ibcon#read 4, iclass 4, count 2 2006.229.13:54:17.48#ibcon#about to read 5, iclass 4, count 2 2006.229.13:54:17.48#ibcon#read 5, iclass 4, count 2 2006.229.13:54:17.48#ibcon#about to read 6, iclass 4, count 2 2006.229.13:54:17.48#ibcon#read 6, iclass 4, count 2 2006.229.13:54:17.48#ibcon#end of sib2, iclass 4, count 2 2006.229.13:54:17.48#ibcon#*mode == 0, iclass 4, count 2 2006.229.13:54:17.48#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.13:54:17.48#ibcon#[25=AT07-05\r\n] 2006.229.13:54:17.48#ibcon#*before write, iclass 4, count 2 2006.229.13:54:17.48#ibcon#enter sib2, iclass 4, count 2 2006.229.13:54:17.48#ibcon#flushed, iclass 4, count 2 2006.229.13:54:17.48#ibcon#about to write, iclass 4, count 2 2006.229.13:54:17.48#ibcon#wrote, iclass 4, count 2 2006.229.13:54:17.48#ibcon#about to read 3, iclass 4, count 2 2006.229.13:54:17.51#ibcon#read 3, iclass 4, count 2 2006.229.13:54:17.51#ibcon#about to read 4, iclass 4, count 2 2006.229.13:54:17.51#ibcon#read 4, iclass 4, count 2 2006.229.13:54:17.51#ibcon#about to read 5, iclass 4, count 2 2006.229.13:54:17.51#ibcon#read 5, iclass 4, count 2 2006.229.13:54:17.51#ibcon#about to read 6, iclass 4, count 2 2006.229.13:54:17.51#ibcon#read 6, iclass 4, count 2 2006.229.13:54:17.51#ibcon#end of sib2, iclass 4, count 2 2006.229.13:54:17.51#ibcon#*after write, iclass 4, count 2 2006.229.13:54:17.51#ibcon#*before return 0, iclass 4, count 2 2006.229.13:54:17.51#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:17.51#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:17.51#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.13:54:17.51#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:17.51#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:17.63#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:17.63#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:17.63#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:54:17.63#ibcon#first serial, iclass 4, count 0 2006.229.13:54:17.63#ibcon#enter sib2, iclass 4, count 0 2006.229.13:54:17.63#ibcon#flushed, iclass 4, count 0 2006.229.13:54:17.63#ibcon#about to write, iclass 4, count 0 2006.229.13:54:17.63#ibcon#wrote, iclass 4, count 0 2006.229.13:54:17.63#ibcon#about to read 3, iclass 4, count 0 2006.229.13:54:17.65#ibcon#read 3, iclass 4, count 0 2006.229.13:54:17.65#ibcon#about to read 4, iclass 4, count 0 2006.229.13:54:17.65#ibcon#read 4, iclass 4, count 0 2006.229.13:54:17.65#ibcon#about to read 5, iclass 4, count 0 2006.229.13:54:17.65#ibcon#read 5, iclass 4, count 0 2006.229.13:54:17.65#ibcon#about to read 6, iclass 4, count 0 2006.229.13:54:17.65#ibcon#read 6, iclass 4, count 0 2006.229.13:54:17.65#ibcon#end of sib2, iclass 4, count 0 2006.229.13:54:17.65#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:54:17.65#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:54:17.65#ibcon#[25=USB\r\n] 2006.229.13:54:17.65#ibcon#*before write, iclass 4, count 0 2006.229.13:54:17.65#ibcon#enter sib2, iclass 4, count 0 2006.229.13:54:17.65#ibcon#flushed, iclass 4, count 0 2006.229.13:54:17.65#ibcon#about to write, iclass 4, count 0 2006.229.13:54:17.65#ibcon#wrote, iclass 4, count 0 2006.229.13:54:17.65#ibcon#about to read 3, iclass 4, count 0 2006.229.13:54:17.68#ibcon#read 3, iclass 4, count 0 2006.229.13:54:17.68#ibcon#about to read 4, iclass 4, count 0 2006.229.13:54:17.68#ibcon#read 4, iclass 4, count 0 2006.229.13:54:17.68#ibcon#about to read 5, iclass 4, count 0 2006.229.13:54:17.68#ibcon#read 5, iclass 4, count 0 2006.229.13:54:17.68#ibcon#about to read 6, iclass 4, count 0 2006.229.13:54:17.68#ibcon#read 6, iclass 4, count 0 2006.229.13:54:17.68#ibcon#end of sib2, iclass 4, count 0 2006.229.13:54:17.68#ibcon#*after write, iclass 4, count 0 2006.229.13:54:17.68#ibcon#*before return 0, iclass 4, count 0 2006.229.13:54:17.68#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:17.68#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:17.68#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:54:17.68#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:54:17.68$vck44/valo=8,884.99 2006.229.13:54:17.68#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:54:17.68#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:54:17.68#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:17.68#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:17.68#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:17.68#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:17.68#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:54:17.68#ibcon#first serial, iclass 6, count 0 2006.229.13:54:17.68#ibcon#enter sib2, iclass 6, count 0 2006.229.13:54:17.68#ibcon#flushed, iclass 6, count 0 2006.229.13:54:17.68#ibcon#about to write, iclass 6, count 0 2006.229.13:54:17.68#ibcon#wrote, iclass 6, count 0 2006.229.13:54:17.68#ibcon#about to read 3, iclass 6, count 0 2006.229.13:54:17.70#ibcon#read 3, iclass 6, count 0 2006.229.13:54:17.70#ibcon#about to read 4, iclass 6, count 0 2006.229.13:54:17.70#ibcon#read 4, iclass 6, count 0 2006.229.13:54:17.70#ibcon#about to read 5, iclass 6, count 0 2006.229.13:54:17.70#ibcon#read 5, iclass 6, count 0 2006.229.13:54:17.70#ibcon#about to read 6, iclass 6, count 0 2006.229.13:54:17.70#ibcon#read 6, iclass 6, count 0 2006.229.13:54:17.70#ibcon#end of sib2, iclass 6, count 0 2006.229.13:54:17.70#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:54:17.70#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:54:17.70#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:54:17.70#ibcon#*before write, iclass 6, count 0 2006.229.13:54:17.70#ibcon#enter sib2, iclass 6, count 0 2006.229.13:54:17.70#ibcon#flushed, iclass 6, count 0 2006.229.13:54:17.70#ibcon#about to write, iclass 6, count 0 2006.229.13:54:17.70#ibcon#wrote, iclass 6, count 0 2006.229.13:54:17.70#ibcon#about to read 3, iclass 6, count 0 2006.229.13:54:17.74#ibcon#read 3, iclass 6, count 0 2006.229.13:54:17.74#ibcon#about to read 4, iclass 6, count 0 2006.229.13:54:17.74#ibcon#read 4, iclass 6, count 0 2006.229.13:54:17.74#ibcon#about to read 5, iclass 6, count 0 2006.229.13:54:17.74#ibcon#read 5, iclass 6, count 0 2006.229.13:54:17.74#ibcon#about to read 6, iclass 6, count 0 2006.229.13:54:17.74#ibcon#read 6, iclass 6, count 0 2006.229.13:54:17.74#ibcon#end of sib2, iclass 6, count 0 2006.229.13:54:17.74#ibcon#*after write, iclass 6, count 0 2006.229.13:54:17.74#ibcon#*before return 0, iclass 6, count 0 2006.229.13:54:17.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:17.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:17.74#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:54:17.74#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:54:17.74$vck44/va=8,6 2006.229.13:54:17.74#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.13:54:17.74#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.13:54:17.74#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:17.74#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:54:17.80#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:54:17.80#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:54:17.80#ibcon#enter wrdev, iclass 10, count 2 2006.229.13:54:17.80#ibcon#first serial, iclass 10, count 2 2006.229.13:54:17.80#ibcon#enter sib2, iclass 10, count 2 2006.229.13:54:17.80#ibcon#flushed, iclass 10, count 2 2006.229.13:54:17.80#ibcon#about to write, iclass 10, count 2 2006.229.13:54:17.80#ibcon#wrote, iclass 10, count 2 2006.229.13:54:17.80#ibcon#about to read 3, iclass 10, count 2 2006.229.13:54:17.82#ibcon#read 3, iclass 10, count 2 2006.229.13:54:17.82#ibcon#about to read 4, iclass 10, count 2 2006.229.13:54:17.82#ibcon#read 4, iclass 10, count 2 2006.229.13:54:17.82#ibcon#about to read 5, iclass 10, count 2 2006.229.13:54:17.82#ibcon#read 5, iclass 10, count 2 2006.229.13:54:17.82#ibcon#about to read 6, iclass 10, count 2 2006.229.13:54:17.82#ibcon#read 6, iclass 10, count 2 2006.229.13:54:17.82#ibcon#end of sib2, iclass 10, count 2 2006.229.13:54:17.82#ibcon#*mode == 0, iclass 10, count 2 2006.229.13:54:17.82#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.13:54:17.82#ibcon#[25=AT08-06\r\n] 2006.229.13:54:17.82#ibcon#*before write, iclass 10, count 2 2006.229.13:54:17.82#ibcon#enter sib2, iclass 10, count 2 2006.229.13:54:17.82#ibcon#flushed, iclass 10, count 2 2006.229.13:54:17.82#ibcon#about to write, iclass 10, count 2 2006.229.13:54:17.82#ibcon#wrote, iclass 10, count 2 2006.229.13:54:17.82#ibcon#about to read 3, iclass 10, count 2 2006.229.13:54:17.85#ibcon#read 3, iclass 10, count 2 2006.229.13:54:17.85#ibcon#about to read 4, iclass 10, count 2 2006.229.13:54:17.85#ibcon#read 4, iclass 10, count 2 2006.229.13:54:17.85#ibcon#about to read 5, iclass 10, count 2 2006.229.13:54:17.85#ibcon#read 5, iclass 10, count 2 2006.229.13:54:17.85#ibcon#about to read 6, iclass 10, count 2 2006.229.13:54:17.85#ibcon#read 6, iclass 10, count 2 2006.229.13:54:17.85#ibcon#end of sib2, iclass 10, count 2 2006.229.13:54:17.85#ibcon#*after write, iclass 10, count 2 2006.229.13:54:17.85#ibcon#*before return 0, iclass 10, count 2 2006.229.13:54:17.85#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:54:17.85#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.13:54:17.85#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.13:54:17.85#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:17.85#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:54:17.97#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:54:17.97#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:54:17.97#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:54:17.97#ibcon#first serial, iclass 10, count 0 2006.229.13:54:17.97#ibcon#enter sib2, iclass 10, count 0 2006.229.13:54:17.97#ibcon#flushed, iclass 10, count 0 2006.229.13:54:17.97#ibcon#about to write, iclass 10, count 0 2006.229.13:54:17.97#ibcon#wrote, iclass 10, count 0 2006.229.13:54:17.97#ibcon#about to read 3, iclass 10, count 0 2006.229.13:54:17.99#ibcon#read 3, iclass 10, count 0 2006.229.13:54:17.99#ibcon#about to read 4, iclass 10, count 0 2006.229.13:54:17.99#ibcon#read 4, iclass 10, count 0 2006.229.13:54:17.99#ibcon#about to read 5, iclass 10, count 0 2006.229.13:54:17.99#ibcon#read 5, iclass 10, count 0 2006.229.13:54:17.99#ibcon#about to read 6, iclass 10, count 0 2006.229.13:54:17.99#ibcon#read 6, iclass 10, count 0 2006.229.13:54:17.99#ibcon#end of sib2, iclass 10, count 0 2006.229.13:54:17.99#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:54:17.99#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:54:17.99#ibcon#[25=USB\r\n] 2006.229.13:54:17.99#ibcon#*before write, iclass 10, count 0 2006.229.13:54:17.99#ibcon#enter sib2, iclass 10, count 0 2006.229.13:54:17.99#ibcon#flushed, iclass 10, count 0 2006.229.13:54:17.99#ibcon#about to write, iclass 10, count 0 2006.229.13:54:17.99#ibcon#wrote, iclass 10, count 0 2006.229.13:54:17.99#ibcon#about to read 3, iclass 10, count 0 2006.229.13:54:18.02#ibcon#read 3, iclass 10, count 0 2006.229.13:54:18.02#ibcon#about to read 4, iclass 10, count 0 2006.229.13:54:18.02#ibcon#read 4, iclass 10, count 0 2006.229.13:54:18.02#ibcon#about to read 5, iclass 10, count 0 2006.229.13:54:18.02#ibcon#read 5, iclass 10, count 0 2006.229.13:54:18.02#ibcon#about to read 6, iclass 10, count 0 2006.229.13:54:18.02#ibcon#read 6, iclass 10, count 0 2006.229.13:54:18.02#ibcon#end of sib2, iclass 10, count 0 2006.229.13:54:18.02#ibcon#*after write, iclass 10, count 0 2006.229.13:54:18.02#ibcon#*before return 0, iclass 10, count 0 2006.229.13:54:18.02#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:54:18.02#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.13:54:18.02#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:54:18.02#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:54:18.02$vck44/vblo=1,629.99 2006.229.13:54:18.02#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.13:54:18.02#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.13:54:18.02#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:18.02#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:54:18.02#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:54:18.02#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:54:18.02#ibcon#enter wrdev, iclass 12, count 0 2006.229.13:54:18.02#ibcon#first serial, iclass 12, count 0 2006.229.13:54:18.02#ibcon#enter sib2, iclass 12, count 0 2006.229.13:54:18.02#ibcon#flushed, iclass 12, count 0 2006.229.13:54:18.02#ibcon#about to write, iclass 12, count 0 2006.229.13:54:18.02#ibcon#wrote, iclass 12, count 0 2006.229.13:54:18.02#ibcon#about to read 3, iclass 12, count 0 2006.229.13:54:18.04#ibcon#read 3, iclass 12, count 0 2006.229.13:54:18.04#ibcon#about to read 4, iclass 12, count 0 2006.229.13:54:18.04#ibcon#read 4, iclass 12, count 0 2006.229.13:54:18.04#ibcon#about to read 5, iclass 12, count 0 2006.229.13:54:18.04#ibcon#read 5, iclass 12, count 0 2006.229.13:54:18.04#ibcon#about to read 6, iclass 12, count 0 2006.229.13:54:18.04#ibcon#read 6, iclass 12, count 0 2006.229.13:54:18.04#ibcon#end of sib2, iclass 12, count 0 2006.229.13:54:18.04#ibcon#*mode == 0, iclass 12, count 0 2006.229.13:54:18.04#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.13:54:18.04#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:54:18.04#ibcon#*before write, iclass 12, count 0 2006.229.13:54:18.04#ibcon#enter sib2, iclass 12, count 0 2006.229.13:54:18.04#ibcon#flushed, iclass 12, count 0 2006.229.13:54:18.04#ibcon#about to write, iclass 12, count 0 2006.229.13:54:18.04#ibcon#wrote, iclass 12, count 0 2006.229.13:54:18.04#ibcon#about to read 3, iclass 12, count 0 2006.229.13:54:18.08#ibcon#read 3, iclass 12, count 0 2006.229.13:54:18.08#ibcon#about to read 4, iclass 12, count 0 2006.229.13:54:18.08#ibcon#read 4, iclass 12, count 0 2006.229.13:54:18.08#ibcon#about to read 5, iclass 12, count 0 2006.229.13:54:18.08#ibcon#read 5, iclass 12, count 0 2006.229.13:54:18.08#ibcon#about to read 6, iclass 12, count 0 2006.229.13:54:18.08#ibcon#read 6, iclass 12, count 0 2006.229.13:54:18.08#ibcon#end of sib2, iclass 12, count 0 2006.229.13:54:18.08#ibcon#*after write, iclass 12, count 0 2006.229.13:54:18.08#ibcon#*before return 0, iclass 12, count 0 2006.229.13:54:18.08#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:54:18.08#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.13:54:18.08#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.13:54:18.08#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.13:54:18.08$vck44/vb=1,4 2006.229.13:54:18.08#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.13:54:18.08#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.13:54:18.08#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:18.08#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:54:18.08#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:54:18.08#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:54:18.08#ibcon#enter wrdev, iclass 14, count 2 2006.229.13:54:18.08#ibcon#first serial, iclass 14, count 2 2006.229.13:54:18.08#ibcon#enter sib2, iclass 14, count 2 2006.229.13:54:18.08#ibcon#flushed, iclass 14, count 2 2006.229.13:54:18.08#ibcon#about to write, iclass 14, count 2 2006.229.13:54:18.08#ibcon#wrote, iclass 14, count 2 2006.229.13:54:18.08#ibcon#about to read 3, iclass 14, count 2 2006.229.13:54:18.10#ibcon#read 3, iclass 14, count 2 2006.229.13:54:18.10#ibcon#about to read 4, iclass 14, count 2 2006.229.13:54:18.10#ibcon#read 4, iclass 14, count 2 2006.229.13:54:18.10#ibcon#about to read 5, iclass 14, count 2 2006.229.13:54:18.10#ibcon#read 5, iclass 14, count 2 2006.229.13:54:18.10#ibcon#about to read 6, iclass 14, count 2 2006.229.13:54:18.10#ibcon#read 6, iclass 14, count 2 2006.229.13:54:18.10#ibcon#end of sib2, iclass 14, count 2 2006.229.13:54:18.10#ibcon#*mode == 0, iclass 14, count 2 2006.229.13:54:18.10#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.13:54:18.10#ibcon#[27=AT01-04\r\n] 2006.229.13:54:18.10#ibcon#*before write, iclass 14, count 2 2006.229.13:54:18.10#ibcon#enter sib2, iclass 14, count 2 2006.229.13:54:18.10#ibcon#flushed, iclass 14, count 2 2006.229.13:54:18.10#ibcon#about to write, iclass 14, count 2 2006.229.13:54:18.10#ibcon#wrote, iclass 14, count 2 2006.229.13:54:18.10#ibcon#about to read 3, iclass 14, count 2 2006.229.13:54:18.13#ibcon#read 3, iclass 14, count 2 2006.229.13:54:18.13#ibcon#about to read 4, iclass 14, count 2 2006.229.13:54:18.13#ibcon#read 4, iclass 14, count 2 2006.229.13:54:18.13#ibcon#about to read 5, iclass 14, count 2 2006.229.13:54:18.13#ibcon#read 5, iclass 14, count 2 2006.229.13:54:18.13#ibcon#about to read 6, iclass 14, count 2 2006.229.13:54:18.13#ibcon#read 6, iclass 14, count 2 2006.229.13:54:18.13#ibcon#end of sib2, iclass 14, count 2 2006.229.13:54:18.13#ibcon#*after write, iclass 14, count 2 2006.229.13:54:18.13#ibcon#*before return 0, iclass 14, count 2 2006.229.13:54:18.13#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:54:18.13#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.13:54:18.13#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.13:54:18.13#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:18.13#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:54:18.25#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:54:18.25#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:54:18.25#ibcon#enter wrdev, iclass 14, count 0 2006.229.13:54:18.25#ibcon#first serial, iclass 14, count 0 2006.229.13:54:18.25#ibcon#enter sib2, iclass 14, count 0 2006.229.13:54:18.25#ibcon#flushed, iclass 14, count 0 2006.229.13:54:18.25#ibcon#about to write, iclass 14, count 0 2006.229.13:54:18.25#ibcon#wrote, iclass 14, count 0 2006.229.13:54:18.25#ibcon#about to read 3, iclass 14, count 0 2006.229.13:54:18.27#ibcon#read 3, iclass 14, count 0 2006.229.13:54:18.27#ibcon#about to read 4, iclass 14, count 0 2006.229.13:54:18.27#ibcon#read 4, iclass 14, count 0 2006.229.13:54:18.27#ibcon#about to read 5, iclass 14, count 0 2006.229.13:54:18.27#ibcon#read 5, iclass 14, count 0 2006.229.13:54:18.27#ibcon#about to read 6, iclass 14, count 0 2006.229.13:54:18.27#ibcon#read 6, iclass 14, count 0 2006.229.13:54:18.27#ibcon#end of sib2, iclass 14, count 0 2006.229.13:54:18.27#ibcon#*mode == 0, iclass 14, count 0 2006.229.13:54:18.27#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.13:54:18.27#ibcon#[27=USB\r\n] 2006.229.13:54:18.27#ibcon#*before write, iclass 14, count 0 2006.229.13:54:18.27#ibcon#enter sib2, iclass 14, count 0 2006.229.13:54:18.27#ibcon#flushed, iclass 14, count 0 2006.229.13:54:18.27#ibcon#about to write, iclass 14, count 0 2006.229.13:54:18.27#ibcon#wrote, iclass 14, count 0 2006.229.13:54:18.27#ibcon#about to read 3, iclass 14, count 0 2006.229.13:54:18.30#ibcon#read 3, iclass 14, count 0 2006.229.13:54:18.30#ibcon#about to read 4, iclass 14, count 0 2006.229.13:54:18.30#ibcon#read 4, iclass 14, count 0 2006.229.13:54:18.30#ibcon#about to read 5, iclass 14, count 0 2006.229.13:54:18.30#ibcon#read 5, iclass 14, count 0 2006.229.13:54:18.30#ibcon#about to read 6, iclass 14, count 0 2006.229.13:54:18.30#ibcon#read 6, iclass 14, count 0 2006.229.13:54:18.30#ibcon#end of sib2, iclass 14, count 0 2006.229.13:54:18.30#ibcon#*after write, iclass 14, count 0 2006.229.13:54:18.30#ibcon#*before return 0, iclass 14, count 0 2006.229.13:54:18.30#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:54:18.30#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.13:54:18.30#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.13:54:18.30#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.13:54:18.30$vck44/vblo=2,634.99 2006.229.13:54:18.30#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.13:54:18.30#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.13:54:18.30#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:18.30#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:18.30#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:18.30#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:18.30#ibcon#enter wrdev, iclass 16, count 0 2006.229.13:54:18.30#ibcon#first serial, iclass 16, count 0 2006.229.13:54:18.30#ibcon#enter sib2, iclass 16, count 0 2006.229.13:54:18.30#ibcon#flushed, iclass 16, count 0 2006.229.13:54:18.30#ibcon#about to write, iclass 16, count 0 2006.229.13:54:18.30#ibcon#wrote, iclass 16, count 0 2006.229.13:54:18.30#ibcon#about to read 3, iclass 16, count 0 2006.229.13:54:18.32#ibcon#read 3, iclass 16, count 0 2006.229.13:54:18.32#ibcon#about to read 4, iclass 16, count 0 2006.229.13:54:18.32#ibcon#read 4, iclass 16, count 0 2006.229.13:54:18.32#ibcon#about to read 5, iclass 16, count 0 2006.229.13:54:18.32#ibcon#read 5, iclass 16, count 0 2006.229.13:54:18.32#ibcon#about to read 6, iclass 16, count 0 2006.229.13:54:18.32#ibcon#read 6, iclass 16, count 0 2006.229.13:54:18.32#ibcon#end of sib2, iclass 16, count 0 2006.229.13:54:18.32#ibcon#*mode == 0, iclass 16, count 0 2006.229.13:54:18.32#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.13:54:18.32#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:54:18.32#ibcon#*before write, iclass 16, count 0 2006.229.13:54:18.32#ibcon#enter sib2, iclass 16, count 0 2006.229.13:54:18.32#ibcon#flushed, iclass 16, count 0 2006.229.13:54:18.32#ibcon#about to write, iclass 16, count 0 2006.229.13:54:18.32#ibcon#wrote, iclass 16, count 0 2006.229.13:54:18.32#ibcon#about to read 3, iclass 16, count 0 2006.229.13:54:18.36#ibcon#read 3, iclass 16, count 0 2006.229.13:54:18.36#ibcon#about to read 4, iclass 16, count 0 2006.229.13:54:18.36#ibcon#read 4, iclass 16, count 0 2006.229.13:54:18.36#ibcon#about to read 5, iclass 16, count 0 2006.229.13:54:18.36#ibcon#read 5, iclass 16, count 0 2006.229.13:54:18.36#ibcon#about to read 6, iclass 16, count 0 2006.229.13:54:18.36#ibcon#read 6, iclass 16, count 0 2006.229.13:54:18.36#ibcon#end of sib2, iclass 16, count 0 2006.229.13:54:18.36#ibcon#*after write, iclass 16, count 0 2006.229.13:54:18.36#ibcon#*before return 0, iclass 16, count 0 2006.229.13:54:18.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:18.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.13:54:18.36#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.13:54:18.36#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.13:54:18.36$vck44/vb=2,4 2006.229.13:54:18.36#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.13:54:18.36#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.13:54:18.36#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:18.36#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:18.42#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:18.42#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:18.42#ibcon#enter wrdev, iclass 18, count 2 2006.229.13:54:18.42#ibcon#first serial, iclass 18, count 2 2006.229.13:54:18.42#ibcon#enter sib2, iclass 18, count 2 2006.229.13:54:18.42#ibcon#flushed, iclass 18, count 2 2006.229.13:54:18.42#ibcon#about to write, iclass 18, count 2 2006.229.13:54:18.42#ibcon#wrote, iclass 18, count 2 2006.229.13:54:18.42#ibcon#about to read 3, iclass 18, count 2 2006.229.13:54:18.44#ibcon#read 3, iclass 18, count 2 2006.229.13:54:18.44#ibcon#about to read 4, iclass 18, count 2 2006.229.13:54:18.44#ibcon#read 4, iclass 18, count 2 2006.229.13:54:18.44#ibcon#about to read 5, iclass 18, count 2 2006.229.13:54:18.44#ibcon#read 5, iclass 18, count 2 2006.229.13:54:18.44#ibcon#about to read 6, iclass 18, count 2 2006.229.13:54:18.44#ibcon#read 6, iclass 18, count 2 2006.229.13:54:18.44#ibcon#end of sib2, iclass 18, count 2 2006.229.13:54:18.44#ibcon#*mode == 0, iclass 18, count 2 2006.229.13:54:18.44#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.13:54:18.44#ibcon#[27=AT02-04\r\n] 2006.229.13:54:18.44#ibcon#*before write, iclass 18, count 2 2006.229.13:54:18.44#ibcon#enter sib2, iclass 18, count 2 2006.229.13:54:18.44#ibcon#flushed, iclass 18, count 2 2006.229.13:54:18.44#ibcon#about to write, iclass 18, count 2 2006.229.13:54:18.44#ibcon#wrote, iclass 18, count 2 2006.229.13:54:18.44#ibcon#about to read 3, iclass 18, count 2 2006.229.13:54:18.47#ibcon#read 3, iclass 18, count 2 2006.229.13:54:18.47#ibcon#about to read 4, iclass 18, count 2 2006.229.13:54:18.47#ibcon#read 4, iclass 18, count 2 2006.229.13:54:18.47#ibcon#about to read 5, iclass 18, count 2 2006.229.13:54:18.47#ibcon#read 5, iclass 18, count 2 2006.229.13:54:18.47#ibcon#about to read 6, iclass 18, count 2 2006.229.13:54:18.47#ibcon#read 6, iclass 18, count 2 2006.229.13:54:18.47#ibcon#end of sib2, iclass 18, count 2 2006.229.13:54:18.47#ibcon#*after write, iclass 18, count 2 2006.229.13:54:18.47#ibcon#*before return 0, iclass 18, count 2 2006.229.13:54:18.47#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:18.47#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.13:54:18.47#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.13:54:18.47#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:18.47#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:18.59#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:18.59#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:18.59#ibcon#enter wrdev, iclass 18, count 0 2006.229.13:54:18.59#ibcon#first serial, iclass 18, count 0 2006.229.13:54:18.59#ibcon#enter sib2, iclass 18, count 0 2006.229.13:54:18.59#ibcon#flushed, iclass 18, count 0 2006.229.13:54:18.59#ibcon#about to write, iclass 18, count 0 2006.229.13:54:18.59#ibcon#wrote, iclass 18, count 0 2006.229.13:54:18.59#ibcon#about to read 3, iclass 18, count 0 2006.229.13:54:18.61#ibcon#read 3, iclass 18, count 0 2006.229.13:54:18.61#ibcon#about to read 4, iclass 18, count 0 2006.229.13:54:18.61#ibcon#read 4, iclass 18, count 0 2006.229.13:54:18.61#ibcon#about to read 5, iclass 18, count 0 2006.229.13:54:18.61#ibcon#read 5, iclass 18, count 0 2006.229.13:54:18.61#ibcon#about to read 6, iclass 18, count 0 2006.229.13:54:18.61#ibcon#read 6, iclass 18, count 0 2006.229.13:54:18.61#ibcon#end of sib2, iclass 18, count 0 2006.229.13:54:18.61#ibcon#*mode == 0, iclass 18, count 0 2006.229.13:54:18.61#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.13:54:18.61#ibcon#[27=USB\r\n] 2006.229.13:54:18.61#ibcon#*before write, iclass 18, count 0 2006.229.13:54:18.61#ibcon#enter sib2, iclass 18, count 0 2006.229.13:54:18.61#ibcon#flushed, iclass 18, count 0 2006.229.13:54:18.61#ibcon#about to write, iclass 18, count 0 2006.229.13:54:18.61#ibcon#wrote, iclass 18, count 0 2006.229.13:54:18.61#ibcon#about to read 3, iclass 18, count 0 2006.229.13:54:18.64#ibcon#read 3, iclass 18, count 0 2006.229.13:54:18.64#ibcon#about to read 4, iclass 18, count 0 2006.229.13:54:18.64#ibcon#read 4, iclass 18, count 0 2006.229.13:54:18.64#ibcon#about to read 5, iclass 18, count 0 2006.229.13:54:18.64#ibcon#read 5, iclass 18, count 0 2006.229.13:54:18.64#ibcon#about to read 6, iclass 18, count 0 2006.229.13:54:18.64#ibcon#read 6, iclass 18, count 0 2006.229.13:54:18.64#ibcon#end of sib2, iclass 18, count 0 2006.229.13:54:18.64#ibcon#*after write, iclass 18, count 0 2006.229.13:54:18.64#ibcon#*before return 0, iclass 18, count 0 2006.229.13:54:18.64#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:18.64#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.13:54:18.64#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.13:54:18.64#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.13:54:18.64$vck44/vblo=3,649.99 2006.229.13:54:18.64#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.13:54:18.64#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.13:54:18.64#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:18.64#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:18.64#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:18.64#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:18.64#ibcon#enter wrdev, iclass 20, count 0 2006.229.13:54:18.64#ibcon#first serial, iclass 20, count 0 2006.229.13:54:18.64#ibcon#enter sib2, iclass 20, count 0 2006.229.13:54:18.64#ibcon#flushed, iclass 20, count 0 2006.229.13:54:18.64#ibcon#about to write, iclass 20, count 0 2006.229.13:54:18.64#ibcon#wrote, iclass 20, count 0 2006.229.13:54:18.64#ibcon#about to read 3, iclass 20, count 0 2006.229.13:54:18.66#ibcon#read 3, iclass 20, count 0 2006.229.13:54:18.66#ibcon#about to read 4, iclass 20, count 0 2006.229.13:54:18.66#ibcon#read 4, iclass 20, count 0 2006.229.13:54:18.66#ibcon#about to read 5, iclass 20, count 0 2006.229.13:54:18.66#ibcon#read 5, iclass 20, count 0 2006.229.13:54:18.66#ibcon#about to read 6, iclass 20, count 0 2006.229.13:54:18.66#ibcon#read 6, iclass 20, count 0 2006.229.13:54:18.66#ibcon#end of sib2, iclass 20, count 0 2006.229.13:54:18.66#ibcon#*mode == 0, iclass 20, count 0 2006.229.13:54:18.66#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.13:54:18.66#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:54:18.66#ibcon#*before write, iclass 20, count 0 2006.229.13:54:18.66#ibcon#enter sib2, iclass 20, count 0 2006.229.13:54:18.66#ibcon#flushed, iclass 20, count 0 2006.229.13:54:18.66#ibcon#about to write, iclass 20, count 0 2006.229.13:54:18.66#ibcon#wrote, iclass 20, count 0 2006.229.13:54:18.66#ibcon#about to read 3, iclass 20, count 0 2006.229.13:54:18.70#ibcon#read 3, iclass 20, count 0 2006.229.13:54:18.70#ibcon#about to read 4, iclass 20, count 0 2006.229.13:54:18.70#ibcon#read 4, iclass 20, count 0 2006.229.13:54:18.70#ibcon#about to read 5, iclass 20, count 0 2006.229.13:54:18.70#ibcon#read 5, iclass 20, count 0 2006.229.13:54:18.70#ibcon#about to read 6, iclass 20, count 0 2006.229.13:54:18.70#ibcon#read 6, iclass 20, count 0 2006.229.13:54:18.70#ibcon#end of sib2, iclass 20, count 0 2006.229.13:54:18.70#ibcon#*after write, iclass 20, count 0 2006.229.13:54:18.70#ibcon#*before return 0, iclass 20, count 0 2006.229.13:54:18.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:18.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.13:54:18.70#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.13:54:18.70#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.13:54:18.70$vck44/vb=3,4 2006.229.13:54:18.70#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.13:54:18.70#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.13:54:18.70#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:18.70#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:18.76#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:18.76#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:18.76#ibcon#enter wrdev, iclass 22, count 2 2006.229.13:54:18.76#ibcon#first serial, iclass 22, count 2 2006.229.13:54:18.76#ibcon#enter sib2, iclass 22, count 2 2006.229.13:54:18.76#ibcon#flushed, iclass 22, count 2 2006.229.13:54:18.76#ibcon#about to write, iclass 22, count 2 2006.229.13:54:18.76#ibcon#wrote, iclass 22, count 2 2006.229.13:54:18.76#ibcon#about to read 3, iclass 22, count 2 2006.229.13:54:18.78#ibcon#read 3, iclass 22, count 2 2006.229.13:54:18.78#ibcon#about to read 4, iclass 22, count 2 2006.229.13:54:18.78#ibcon#read 4, iclass 22, count 2 2006.229.13:54:18.78#ibcon#about to read 5, iclass 22, count 2 2006.229.13:54:18.78#ibcon#read 5, iclass 22, count 2 2006.229.13:54:18.78#ibcon#about to read 6, iclass 22, count 2 2006.229.13:54:18.78#ibcon#read 6, iclass 22, count 2 2006.229.13:54:18.78#ibcon#end of sib2, iclass 22, count 2 2006.229.13:54:18.78#ibcon#*mode == 0, iclass 22, count 2 2006.229.13:54:18.78#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.13:54:18.78#ibcon#[27=AT03-04\r\n] 2006.229.13:54:18.78#ibcon#*before write, iclass 22, count 2 2006.229.13:54:18.78#ibcon#enter sib2, iclass 22, count 2 2006.229.13:54:18.78#ibcon#flushed, iclass 22, count 2 2006.229.13:54:18.78#ibcon#about to write, iclass 22, count 2 2006.229.13:54:18.78#ibcon#wrote, iclass 22, count 2 2006.229.13:54:18.78#ibcon#about to read 3, iclass 22, count 2 2006.229.13:54:18.81#ibcon#read 3, iclass 22, count 2 2006.229.13:54:18.81#ibcon#about to read 4, iclass 22, count 2 2006.229.13:54:18.81#ibcon#read 4, iclass 22, count 2 2006.229.13:54:18.81#ibcon#about to read 5, iclass 22, count 2 2006.229.13:54:18.81#ibcon#read 5, iclass 22, count 2 2006.229.13:54:18.81#ibcon#about to read 6, iclass 22, count 2 2006.229.13:54:18.81#ibcon#read 6, iclass 22, count 2 2006.229.13:54:18.81#ibcon#end of sib2, iclass 22, count 2 2006.229.13:54:18.81#ibcon#*after write, iclass 22, count 2 2006.229.13:54:18.81#ibcon#*before return 0, iclass 22, count 2 2006.229.13:54:18.81#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:18.81#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.13:54:18.81#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.13:54:18.81#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:18.81#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:18.93#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:18.93#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:18.93#ibcon#enter wrdev, iclass 22, count 0 2006.229.13:54:18.93#ibcon#first serial, iclass 22, count 0 2006.229.13:54:18.93#ibcon#enter sib2, iclass 22, count 0 2006.229.13:54:18.93#ibcon#flushed, iclass 22, count 0 2006.229.13:54:18.93#ibcon#about to write, iclass 22, count 0 2006.229.13:54:18.93#ibcon#wrote, iclass 22, count 0 2006.229.13:54:18.93#ibcon#about to read 3, iclass 22, count 0 2006.229.13:54:18.95#ibcon#read 3, iclass 22, count 0 2006.229.13:54:18.95#ibcon#about to read 4, iclass 22, count 0 2006.229.13:54:18.95#ibcon#read 4, iclass 22, count 0 2006.229.13:54:18.95#ibcon#about to read 5, iclass 22, count 0 2006.229.13:54:18.95#ibcon#read 5, iclass 22, count 0 2006.229.13:54:18.95#ibcon#about to read 6, iclass 22, count 0 2006.229.13:54:18.95#ibcon#read 6, iclass 22, count 0 2006.229.13:54:18.95#ibcon#end of sib2, iclass 22, count 0 2006.229.13:54:18.95#ibcon#*mode == 0, iclass 22, count 0 2006.229.13:54:18.95#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.13:54:18.95#ibcon#[27=USB\r\n] 2006.229.13:54:18.95#ibcon#*before write, iclass 22, count 0 2006.229.13:54:18.95#ibcon#enter sib2, iclass 22, count 0 2006.229.13:54:18.95#ibcon#flushed, iclass 22, count 0 2006.229.13:54:18.95#ibcon#about to write, iclass 22, count 0 2006.229.13:54:18.95#ibcon#wrote, iclass 22, count 0 2006.229.13:54:18.95#ibcon#about to read 3, iclass 22, count 0 2006.229.13:54:18.98#ibcon#read 3, iclass 22, count 0 2006.229.13:54:18.98#ibcon#about to read 4, iclass 22, count 0 2006.229.13:54:18.98#ibcon#read 4, iclass 22, count 0 2006.229.13:54:18.98#ibcon#about to read 5, iclass 22, count 0 2006.229.13:54:18.98#ibcon#read 5, iclass 22, count 0 2006.229.13:54:18.98#ibcon#about to read 6, iclass 22, count 0 2006.229.13:54:18.98#ibcon#read 6, iclass 22, count 0 2006.229.13:54:18.98#ibcon#end of sib2, iclass 22, count 0 2006.229.13:54:18.98#ibcon#*after write, iclass 22, count 0 2006.229.13:54:18.98#ibcon#*before return 0, iclass 22, count 0 2006.229.13:54:18.98#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:18.98#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.13:54:18.98#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.13:54:18.98#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.13:54:18.98$vck44/vblo=4,679.99 2006.229.13:54:18.98#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.13:54:18.98#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.13:54:18.98#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:18.98#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:18.98#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:18.98#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:18.98#ibcon#enter wrdev, iclass 24, count 0 2006.229.13:54:18.98#ibcon#first serial, iclass 24, count 0 2006.229.13:54:18.98#ibcon#enter sib2, iclass 24, count 0 2006.229.13:54:18.98#ibcon#flushed, iclass 24, count 0 2006.229.13:54:18.98#ibcon#about to write, iclass 24, count 0 2006.229.13:54:18.98#ibcon#wrote, iclass 24, count 0 2006.229.13:54:18.98#ibcon#about to read 3, iclass 24, count 0 2006.229.13:54:19.00#ibcon#read 3, iclass 24, count 0 2006.229.13:54:19.00#ibcon#about to read 4, iclass 24, count 0 2006.229.13:54:19.00#ibcon#read 4, iclass 24, count 0 2006.229.13:54:19.00#ibcon#about to read 5, iclass 24, count 0 2006.229.13:54:19.00#ibcon#read 5, iclass 24, count 0 2006.229.13:54:19.00#ibcon#about to read 6, iclass 24, count 0 2006.229.13:54:19.00#ibcon#read 6, iclass 24, count 0 2006.229.13:54:19.00#ibcon#end of sib2, iclass 24, count 0 2006.229.13:54:19.00#ibcon#*mode == 0, iclass 24, count 0 2006.229.13:54:19.00#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.13:54:19.00#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:54:19.00#ibcon#*before write, iclass 24, count 0 2006.229.13:54:19.00#ibcon#enter sib2, iclass 24, count 0 2006.229.13:54:19.00#ibcon#flushed, iclass 24, count 0 2006.229.13:54:19.00#ibcon#about to write, iclass 24, count 0 2006.229.13:54:19.00#ibcon#wrote, iclass 24, count 0 2006.229.13:54:19.00#ibcon#about to read 3, iclass 24, count 0 2006.229.13:54:19.04#ibcon#read 3, iclass 24, count 0 2006.229.13:54:19.04#ibcon#about to read 4, iclass 24, count 0 2006.229.13:54:19.04#ibcon#read 4, iclass 24, count 0 2006.229.13:54:19.04#ibcon#about to read 5, iclass 24, count 0 2006.229.13:54:19.04#ibcon#read 5, iclass 24, count 0 2006.229.13:54:19.04#ibcon#about to read 6, iclass 24, count 0 2006.229.13:54:19.04#ibcon#read 6, iclass 24, count 0 2006.229.13:54:19.04#ibcon#end of sib2, iclass 24, count 0 2006.229.13:54:19.04#ibcon#*after write, iclass 24, count 0 2006.229.13:54:19.04#ibcon#*before return 0, iclass 24, count 0 2006.229.13:54:19.04#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:19.04#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.13:54:19.04#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.13:54:19.04#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.13:54:19.04$vck44/vb=4,4 2006.229.13:54:19.04#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.13:54:19.04#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.13:54:19.04#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:19.04#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:19.10#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:19.10#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:19.10#ibcon#enter wrdev, iclass 26, count 2 2006.229.13:54:19.10#ibcon#first serial, iclass 26, count 2 2006.229.13:54:19.10#ibcon#enter sib2, iclass 26, count 2 2006.229.13:54:19.10#ibcon#flushed, iclass 26, count 2 2006.229.13:54:19.10#ibcon#about to write, iclass 26, count 2 2006.229.13:54:19.10#ibcon#wrote, iclass 26, count 2 2006.229.13:54:19.10#ibcon#about to read 3, iclass 26, count 2 2006.229.13:54:19.12#ibcon#read 3, iclass 26, count 2 2006.229.13:54:19.12#ibcon#about to read 4, iclass 26, count 2 2006.229.13:54:19.12#ibcon#read 4, iclass 26, count 2 2006.229.13:54:19.12#ibcon#about to read 5, iclass 26, count 2 2006.229.13:54:19.12#ibcon#read 5, iclass 26, count 2 2006.229.13:54:19.12#ibcon#about to read 6, iclass 26, count 2 2006.229.13:54:19.12#ibcon#read 6, iclass 26, count 2 2006.229.13:54:19.12#ibcon#end of sib2, iclass 26, count 2 2006.229.13:54:19.12#ibcon#*mode == 0, iclass 26, count 2 2006.229.13:54:19.12#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.13:54:19.12#ibcon#[27=AT04-04\r\n] 2006.229.13:54:19.12#ibcon#*before write, iclass 26, count 2 2006.229.13:54:19.12#ibcon#enter sib2, iclass 26, count 2 2006.229.13:54:19.12#ibcon#flushed, iclass 26, count 2 2006.229.13:54:19.12#ibcon#about to write, iclass 26, count 2 2006.229.13:54:19.12#ibcon#wrote, iclass 26, count 2 2006.229.13:54:19.12#ibcon#about to read 3, iclass 26, count 2 2006.229.13:54:19.15#ibcon#read 3, iclass 26, count 2 2006.229.13:54:19.15#ibcon#about to read 4, iclass 26, count 2 2006.229.13:54:19.15#ibcon#read 4, iclass 26, count 2 2006.229.13:54:19.15#ibcon#about to read 5, iclass 26, count 2 2006.229.13:54:19.15#ibcon#read 5, iclass 26, count 2 2006.229.13:54:19.15#ibcon#about to read 6, iclass 26, count 2 2006.229.13:54:19.15#ibcon#read 6, iclass 26, count 2 2006.229.13:54:19.15#ibcon#end of sib2, iclass 26, count 2 2006.229.13:54:19.15#ibcon#*after write, iclass 26, count 2 2006.229.13:54:19.15#ibcon#*before return 0, iclass 26, count 2 2006.229.13:54:19.15#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:19.15#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.13:54:19.15#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.13:54:19.15#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:19.15#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:19.27#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:19.27#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:19.27#ibcon#enter wrdev, iclass 26, count 0 2006.229.13:54:19.27#ibcon#first serial, iclass 26, count 0 2006.229.13:54:19.27#ibcon#enter sib2, iclass 26, count 0 2006.229.13:54:19.27#ibcon#flushed, iclass 26, count 0 2006.229.13:54:19.27#ibcon#about to write, iclass 26, count 0 2006.229.13:54:19.27#ibcon#wrote, iclass 26, count 0 2006.229.13:54:19.27#ibcon#about to read 3, iclass 26, count 0 2006.229.13:54:19.29#ibcon#read 3, iclass 26, count 0 2006.229.13:54:19.29#ibcon#about to read 4, iclass 26, count 0 2006.229.13:54:19.29#ibcon#read 4, iclass 26, count 0 2006.229.13:54:19.29#ibcon#about to read 5, iclass 26, count 0 2006.229.13:54:19.29#ibcon#read 5, iclass 26, count 0 2006.229.13:54:19.29#ibcon#about to read 6, iclass 26, count 0 2006.229.13:54:19.29#ibcon#read 6, iclass 26, count 0 2006.229.13:54:19.29#ibcon#end of sib2, iclass 26, count 0 2006.229.13:54:19.29#ibcon#*mode == 0, iclass 26, count 0 2006.229.13:54:19.29#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.13:54:19.29#ibcon#[27=USB\r\n] 2006.229.13:54:19.29#ibcon#*before write, iclass 26, count 0 2006.229.13:54:19.29#ibcon#enter sib2, iclass 26, count 0 2006.229.13:54:19.29#ibcon#flushed, iclass 26, count 0 2006.229.13:54:19.29#ibcon#about to write, iclass 26, count 0 2006.229.13:54:19.29#ibcon#wrote, iclass 26, count 0 2006.229.13:54:19.29#ibcon#about to read 3, iclass 26, count 0 2006.229.13:54:19.32#ibcon#read 3, iclass 26, count 0 2006.229.13:54:19.32#ibcon#about to read 4, iclass 26, count 0 2006.229.13:54:19.32#ibcon#read 4, iclass 26, count 0 2006.229.13:54:19.32#ibcon#about to read 5, iclass 26, count 0 2006.229.13:54:19.32#ibcon#read 5, iclass 26, count 0 2006.229.13:54:19.32#ibcon#about to read 6, iclass 26, count 0 2006.229.13:54:19.32#ibcon#read 6, iclass 26, count 0 2006.229.13:54:19.32#ibcon#end of sib2, iclass 26, count 0 2006.229.13:54:19.32#ibcon#*after write, iclass 26, count 0 2006.229.13:54:19.32#ibcon#*before return 0, iclass 26, count 0 2006.229.13:54:19.32#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:19.32#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.13:54:19.32#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.13:54:19.32#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.13:54:19.32$vck44/vblo=5,709.99 2006.229.13:54:19.32#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.13:54:19.32#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.13:54:19.32#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:19.32#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:19.32#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:19.32#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:19.32#ibcon#enter wrdev, iclass 28, count 0 2006.229.13:54:19.32#ibcon#first serial, iclass 28, count 0 2006.229.13:54:19.32#ibcon#enter sib2, iclass 28, count 0 2006.229.13:54:19.32#ibcon#flushed, iclass 28, count 0 2006.229.13:54:19.32#ibcon#about to write, iclass 28, count 0 2006.229.13:54:19.32#ibcon#wrote, iclass 28, count 0 2006.229.13:54:19.32#ibcon#about to read 3, iclass 28, count 0 2006.229.13:54:19.34#ibcon#read 3, iclass 28, count 0 2006.229.13:54:19.34#ibcon#about to read 4, iclass 28, count 0 2006.229.13:54:19.34#ibcon#read 4, iclass 28, count 0 2006.229.13:54:19.34#ibcon#about to read 5, iclass 28, count 0 2006.229.13:54:19.34#ibcon#read 5, iclass 28, count 0 2006.229.13:54:19.34#ibcon#about to read 6, iclass 28, count 0 2006.229.13:54:19.34#ibcon#read 6, iclass 28, count 0 2006.229.13:54:19.34#ibcon#end of sib2, iclass 28, count 0 2006.229.13:54:19.34#ibcon#*mode == 0, iclass 28, count 0 2006.229.13:54:19.34#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.13:54:19.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:54:19.34#ibcon#*before write, iclass 28, count 0 2006.229.13:54:19.34#ibcon#enter sib2, iclass 28, count 0 2006.229.13:54:19.34#ibcon#flushed, iclass 28, count 0 2006.229.13:54:19.34#ibcon#about to write, iclass 28, count 0 2006.229.13:54:19.34#ibcon#wrote, iclass 28, count 0 2006.229.13:54:19.34#ibcon#about to read 3, iclass 28, count 0 2006.229.13:54:19.38#ibcon#read 3, iclass 28, count 0 2006.229.13:54:19.38#ibcon#about to read 4, iclass 28, count 0 2006.229.13:54:19.38#ibcon#read 4, iclass 28, count 0 2006.229.13:54:19.38#ibcon#about to read 5, iclass 28, count 0 2006.229.13:54:19.38#ibcon#read 5, iclass 28, count 0 2006.229.13:54:19.38#ibcon#about to read 6, iclass 28, count 0 2006.229.13:54:19.38#ibcon#read 6, iclass 28, count 0 2006.229.13:54:19.38#ibcon#end of sib2, iclass 28, count 0 2006.229.13:54:19.38#ibcon#*after write, iclass 28, count 0 2006.229.13:54:19.38#ibcon#*before return 0, iclass 28, count 0 2006.229.13:54:19.38#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:19.38#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.13:54:19.38#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.13:54:19.38#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.13:54:19.38$vck44/vb=5,4 2006.229.13:54:19.38#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.13:54:19.38#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.13:54:19.38#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:19.38#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:19.44#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:19.44#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:19.44#ibcon#enter wrdev, iclass 30, count 2 2006.229.13:54:19.44#ibcon#first serial, iclass 30, count 2 2006.229.13:54:19.44#ibcon#enter sib2, iclass 30, count 2 2006.229.13:54:19.44#ibcon#flushed, iclass 30, count 2 2006.229.13:54:19.44#ibcon#about to write, iclass 30, count 2 2006.229.13:54:19.44#ibcon#wrote, iclass 30, count 2 2006.229.13:54:19.44#ibcon#about to read 3, iclass 30, count 2 2006.229.13:54:19.46#ibcon#read 3, iclass 30, count 2 2006.229.13:54:19.46#ibcon#about to read 4, iclass 30, count 2 2006.229.13:54:19.46#ibcon#read 4, iclass 30, count 2 2006.229.13:54:19.46#ibcon#about to read 5, iclass 30, count 2 2006.229.13:54:19.46#ibcon#read 5, iclass 30, count 2 2006.229.13:54:19.46#ibcon#about to read 6, iclass 30, count 2 2006.229.13:54:19.46#ibcon#read 6, iclass 30, count 2 2006.229.13:54:19.46#ibcon#end of sib2, iclass 30, count 2 2006.229.13:54:19.46#ibcon#*mode == 0, iclass 30, count 2 2006.229.13:54:19.46#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.13:54:19.46#ibcon#[27=AT05-04\r\n] 2006.229.13:54:19.46#ibcon#*before write, iclass 30, count 2 2006.229.13:54:19.46#ibcon#enter sib2, iclass 30, count 2 2006.229.13:54:19.46#ibcon#flushed, iclass 30, count 2 2006.229.13:54:19.46#ibcon#about to write, iclass 30, count 2 2006.229.13:54:19.46#ibcon#wrote, iclass 30, count 2 2006.229.13:54:19.46#ibcon#about to read 3, iclass 30, count 2 2006.229.13:54:19.49#ibcon#read 3, iclass 30, count 2 2006.229.13:54:19.49#ibcon#about to read 4, iclass 30, count 2 2006.229.13:54:19.49#ibcon#read 4, iclass 30, count 2 2006.229.13:54:19.49#ibcon#about to read 5, iclass 30, count 2 2006.229.13:54:19.49#ibcon#read 5, iclass 30, count 2 2006.229.13:54:19.49#ibcon#about to read 6, iclass 30, count 2 2006.229.13:54:19.49#ibcon#read 6, iclass 30, count 2 2006.229.13:54:19.49#ibcon#end of sib2, iclass 30, count 2 2006.229.13:54:19.49#ibcon#*after write, iclass 30, count 2 2006.229.13:54:19.49#ibcon#*before return 0, iclass 30, count 2 2006.229.13:54:19.49#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:19.49#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.13:54:19.49#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.13:54:19.49#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:19.49#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:19.61#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:19.61#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:19.61#ibcon#enter wrdev, iclass 30, count 0 2006.229.13:54:19.61#ibcon#first serial, iclass 30, count 0 2006.229.13:54:19.61#ibcon#enter sib2, iclass 30, count 0 2006.229.13:54:19.61#ibcon#flushed, iclass 30, count 0 2006.229.13:54:19.61#ibcon#about to write, iclass 30, count 0 2006.229.13:54:19.61#ibcon#wrote, iclass 30, count 0 2006.229.13:54:19.61#ibcon#about to read 3, iclass 30, count 0 2006.229.13:54:19.63#ibcon#read 3, iclass 30, count 0 2006.229.13:54:19.63#ibcon#about to read 4, iclass 30, count 0 2006.229.13:54:19.63#ibcon#read 4, iclass 30, count 0 2006.229.13:54:19.63#ibcon#about to read 5, iclass 30, count 0 2006.229.13:54:19.63#ibcon#read 5, iclass 30, count 0 2006.229.13:54:19.63#ibcon#about to read 6, iclass 30, count 0 2006.229.13:54:19.63#ibcon#read 6, iclass 30, count 0 2006.229.13:54:19.63#ibcon#end of sib2, iclass 30, count 0 2006.229.13:54:19.63#ibcon#*mode == 0, iclass 30, count 0 2006.229.13:54:19.63#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.13:54:19.63#ibcon#[27=USB\r\n] 2006.229.13:54:19.63#ibcon#*before write, iclass 30, count 0 2006.229.13:54:19.63#ibcon#enter sib2, iclass 30, count 0 2006.229.13:54:19.63#ibcon#flushed, iclass 30, count 0 2006.229.13:54:19.63#ibcon#about to write, iclass 30, count 0 2006.229.13:54:19.63#ibcon#wrote, iclass 30, count 0 2006.229.13:54:19.63#ibcon#about to read 3, iclass 30, count 0 2006.229.13:54:19.66#ibcon#read 3, iclass 30, count 0 2006.229.13:54:19.66#ibcon#about to read 4, iclass 30, count 0 2006.229.13:54:19.66#ibcon#read 4, iclass 30, count 0 2006.229.13:54:19.66#ibcon#about to read 5, iclass 30, count 0 2006.229.13:54:19.66#ibcon#read 5, iclass 30, count 0 2006.229.13:54:19.66#ibcon#about to read 6, iclass 30, count 0 2006.229.13:54:19.66#ibcon#read 6, iclass 30, count 0 2006.229.13:54:19.66#ibcon#end of sib2, iclass 30, count 0 2006.229.13:54:19.66#ibcon#*after write, iclass 30, count 0 2006.229.13:54:19.66#ibcon#*before return 0, iclass 30, count 0 2006.229.13:54:19.66#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:19.66#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.13:54:19.66#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.13:54:19.66#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.13:54:19.66$vck44/vblo=6,719.99 2006.229.13:54:19.66#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.13:54:19.66#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.13:54:19.66#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:19.66#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:19.66#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:19.66#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:19.66#ibcon#enter wrdev, iclass 32, count 0 2006.229.13:54:19.66#ibcon#first serial, iclass 32, count 0 2006.229.13:54:19.66#ibcon#enter sib2, iclass 32, count 0 2006.229.13:54:19.66#ibcon#flushed, iclass 32, count 0 2006.229.13:54:19.66#ibcon#about to write, iclass 32, count 0 2006.229.13:54:19.66#ibcon#wrote, iclass 32, count 0 2006.229.13:54:19.66#ibcon#about to read 3, iclass 32, count 0 2006.229.13:54:19.68#ibcon#read 3, iclass 32, count 0 2006.229.13:54:19.68#ibcon#about to read 4, iclass 32, count 0 2006.229.13:54:19.68#ibcon#read 4, iclass 32, count 0 2006.229.13:54:19.68#ibcon#about to read 5, iclass 32, count 0 2006.229.13:54:19.68#ibcon#read 5, iclass 32, count 0 2006.229.13:54:19.68#ibcon#about to read 6, iclass 32, count 0 2006.229.13:54:19.68#ibcon#read 6, iclass 32, count 0 2006.229.13:54:19.68#ibcon#end of sib2, iclass 32, count 0 2006.229.13:54:19.68#ibcon#*mode == 0, iclass 32, count 0 2006.229.13:54:19.68#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.13:54:19.68#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:54:19.68#ibcon#*before write, iclass 32, count 0 2006.229.13:54:19.68#ibcon#enter sib2, iclass 32, count 0 2006.229.13:54:19.68#ibcon#flushed, iclass 32, count 0 2006.229.13:54:19.68#ibcon#about to write, iclass 32, count 0 2006.229.13:54:19.68#ibcon#wrote, iclass 32, count 0 2006.229.13:54:19.68#ibcon#about to read 3, iclass 32, count 0 2006.229.13:54:19.72#ibcon#read 3, iclass 32, count 0 2006.229.13:54:19.72#ibcon#about to read 4, iclass 32, count 0 2006.229.13:54:19.72#ibcon#read 4, iclass 32, count 0 2006.229.13:54:19.72#ibcon#about to read 5, iclass 32, count 0 2006.229.13:54:19.72#ibcon#read 5, iclass 32, count 0 2006.229.13:54:19.72#ibcon#about to read 6, iclass 32, count 0 2006.229.13:54:19.72#ibcon#read 6, iclass 32, count 0 2006.229.13:54:19.72#ibcon#end of sib2, iclass 32, count 0 2006.229.13:54:19.72#ibcon#*after write, iclass 32, count 0 2006.229.13:54:19.72#ibcon#*before return 0, iclass 32, count 0 2006.229.13:54:19.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:19.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.13:54:19.72#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.13:54:19.72#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.13:54:19.72$vck44/vb=6,4 2006.229.13:54:19.72#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.13:54:19.72#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.13:54:19.72#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:19.72#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:19.78#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:19.78#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:19.78#ibcon#enter wrdev, iclass 34, count 2 2006.229.13:54:19.78#ibcon#first serial, iclass 34, count 2 2006.229.13:54:19.78#ibcon#enter sib2, iclass 34, count 2 2006.229.13:54:19.78#ibcon#flushed, iclass 34, count 2 2006.229.13:54:19.78#ibcon#about to write, iclass 34, count 2 2006.229.13:54:19.78#ibcon#wrote, iclass 34, count 2 2006.229.13:54:19.78#ibcon#about to read 3, iclass 34, count 2 2006.229.13:54:19.80#ibcon#read 3, iclass 34, count 2 2006.229.13:54:19.80#ibcon#about to read 4, iclass 34, count 2 2006.229.13:54:19.80#ibcon#read 4, iclass 34, count 2 2006.229.13:54:19.80#ibcon#about to read 5, iclass 34, count 2 2006.229.13:54:19.80#ibcon#read 5, iclass 34, count 2 2006.229.13:54:19.80#ibcon#about to read 6, iclass 34, count 2 2006.229.13:54:19.80#ibcon#read 6, iclass 34, count 2 2006.229.13:54:19.80#ibcon#end of sib2, iclass 34, count 2 2006.229.13:54:19.80#ibcon#*mode == 0, iclass 34, count 2 2006.229.13:54:19.80#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.13:54:19.80#ibcon#[27=AT06-04\r\n] 2006.229.13:54:19.80#ibcon#*before write, iclass 34, count 2 2006.229.13:54:19.80#ibcon#enter sib2, iclass 34, count 2 2006.229.13:54:19.80#ibcon#flushed, iclass 34, count 2 2006.229.13:54:19.80#ibcon#about to write, iclass 34, count 2 2006.229.13:54:19.80#ibcon#wrote, iclass 34, count 2 2006.229.13:54:19.80#ibcon#about to read 3, iclass 34, count 2 2006.229.13:54:19.83#ibcon#read 3, iclass 34, count 2 2006.229.13:54:19.83#ibcon#about to read 4, iclass 34, count 2 2006.229.13:54:19.83#ibcon#read 4, iclass 34, count 2 2006.229.13:54:19.83#ibcon#about to read 5, iclass 34, count 2 2006.229.13:54:19.83#ibcon#read 5, iclass 34, count 2 2006.229.13:54:19.83#ibcon#about to read 6, iclass 34, count 2 2006.229.13:54:19.83#ibcon#read 6, iclass 34, count 2 2006.229.13:54:19.83#ibcon#end of sib2, iclass 34, count 2 2006.229.13:54:19.83#ibcon#*after write, iclass 34, count 2 2006.229.13:54:19.83#ibcon#*before return 0, iclass 34, count 2 2006.229.13:54:19.83#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:19.83#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.13:54:19.83#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.13:54:19.83#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:19.83#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:19.95#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:19.95#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:19.95#ibcon#enter wrdev, iclass 34, count 0 2006.229.13:54:19.95#ibcon#first serial, iclass 34, count 0 2006.229.13:54:19.95#ibcon#enter sib2, iclass 34, count 0 2006.229.13:54:19.95#ibcon#flushed, iclass 34, count 0 2006.229.13:54:19.95#ibcon#about to write, iclass 34, count 0 2006.229.13:54:19.95#ibcon#wrote, iclass 34, count 0 2006.229.13:54:19.95#ibcon#about to read 3, iclass 34, count 0 2006.229.13:54:19.97#ibcon#read 3, iclass 34, count 0 2006.229.13:54:19.97#ibcon#about to read 4, iclass 34, count 0 2006.229.13:54:19.97#ibcon#read 4, iclass 34, count 0 2006.229.13:54:19.97#ibcon#about to read 5, iclass 34, count 0 2006.229.13:54:19.97#ibcon#read 5, iclass 34, count 0 2006.229.13:54:19.97#ibcon#about to read 6, iclass 34, count 0 2006.229.13:54:19.97#ibcon#read 6, iclass 34, count 0 2006.229.13:54:19.97#ibcon#end of sib2, iclass 34, count 0 2006.229.13:54:19.97#ibcon#*mode == 0, iclass 34, count 0 2006.229.13:54:19.97#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.13:54:19.97#ibcon#[27=USB\r\n] 2006.229.13:54:19.97#ibcon#*before write, iclass 34, count 0 2006.229.13:54:19.97#ibcon#enter sib2, iclass 34, count 0 2006.229.13:54:19.97#ibcon#flushed, iclass 34, count 0 2006.229.13:54:19.97#ibcon#about to write, iclass 34, count 0 2006.229.13:54:19.97#ibcon#wrote, iclass 34, count 0 2006.229.13:54:19.97#ibcon#about to read 3, iclass 34, count 0 2006.229.13:54:20.00#ibcon#read 3, iclass 34, count 0 2006.229.13:54:20.00#ibcon#about to read 4, iclass 34, count 0 2006.229.13:54:20.00#ibcon#read 4, iclass 34, count 0 2006.229.13:54:20.00#ibcon#about to read 5, iclass 34, count 0 2006.229.13:54:20.00#ibcon#read 5, iclass 34, count 0 2006.229.13:54:20.00#ibcon#about to read 6, iclass 34, count 0 2006.229.13:54:20.00#ibcon#read 6, iclass 34, count 0 2006.229.13:54:20.00#ibcon#end of sib2, iclass 34, count 0 2006.229.13:54:20.00#ibcon#*after write, iclass 34, count 0 2006.229.13:54:20.00#ibcon#*before return 0, iclass 34, count 0 2006.229.13:54:20.00#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:20.00#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.13:54:20.00#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.13:54:20.00#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.13:54:20.00$vck44/vblo=7,734.99 2006.229.13:54:20.00#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.13:54:20.00#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.13:54:20.00#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:20.00#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:20.00#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:20.00#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:20.00#ibcon#enter wrdev, iclass 36, count 0 2006.229.13:54:20.00#ibcon#first serial, iclass 36, count 0 2006.229.13:54:20.00#ibcon#enter sib2, iclass 36, count 0 2006.229.13:54:20.00#ibcon#flushed, iclass 36, count 0 2006.229.13:54:20.00#ibcon#about to write, iclass 36, count 0 2006.229.13:54:20.00#ibcon#wrote, iclass 36, count 0 2006.229.13:54:20.00#ibcon#about to read 3, iclass 36, count 0 2006.229.13:54:20.02#ibcon#read 3, iclass 36, count 0 2006.229.13:54:20.02#ibcon#about to read 4, iclass 36, count 0 2006.229.13:54:20.02#ibcon#read 4, iclass 36, count 0 2006.229.13:54:20.02#ibcon#about to read 5, iclass 36, count 0 2006.229.13:54:20.02#ibcon#read 5, iclass 36, count 0 2006.229.13:54:20.02#ibcon#about to read 6, iclass 36, count 0 2006.229.13:54:20.02#ibcon#read 6, iclass 36, count 0 2006.229.13:54:20.02#ibcon#end of sib2, iclass 36, count 0 2006.229.13:54:20.02#ibcon#*mode == 0, iclass 36, count 0 2006.229.13:54:20.02#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.13:54:20.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:54:20.02#ibcon#*before write, iclass 36, count 0 2006.229.13:54:20.02#ibcon#enter sib2, iclass 36, count 0 2006.229.13:54:20.02#ibcon#flushed, iclass 36, count 0 2006.229.13:54:20.02#ibcon#about to write, iclass 36, count 0 2006.229.13:54:20.02#ibcon#wrote, iclass 36, count 0 2006.229.13:54:20.02#ibcon#about to read 3, iclass 36, count 0 2006.229.13:54:20.06#ibcon#read 3, iclass 36, count 0 2006.229.13:54:20.06#ibcon#about to read 4, iclass 36, count 0 2006.229.13:54:20.06#ibcon#read 4, iclass 36, count 0 2006.229.13:54:20.06#ibcon#about to read 5, iclass 36, count 0 2006.229.13:54:20.06#ibcon#read 5, iclass 36, count 0 2006.229.13:54:20.06#ibcon#about to read 6, iclass 36, count 0 2006.229.13:54:20.06#ibcon#read 6, iclass 36, count 0 2006.229.13:54:20.06#ibcon#end of sib2, iclass 36, count 0 2006.229.13:54:20.06#ibcon#*after write, iclass 36, count 0 2006.229.13:54:20.06#ibcon#*before return 0, iclass 36, count 0 2006.229.13:54:20.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:20.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.13:54:20.06#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.13:54:20.06#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.13:54:20.06$vck44/vb=7,4 2006.229.13:54:20.06#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.13:54:20.06#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.13:54:20.06#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:20.06#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:20.12#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:20.12#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:20.12#ibcon#enter wrdev, iclass 38, count 2 2006.229.13:54:20.12#ibcon#first serial, iclass 38, count 2 2006.229.13:54:20.12#ibcon#enter sib2, iclass 38, count 2 2006.229.13:54:20.12#ibcon#flushed, iclass 38, count 2 2006.229.13:54:20.12#ibcon#about to write, iclass 38, count 2 2006.229.13:54:20.12#ibcon#wrote, iclass 38, count 2 2006.229.13:54:20.12#ibcon#about to read 3, iclass 38, count 2 2006.229.13:54:20.14#ibcon#read 3, iclass 38, count 2 2006.229.13:54:20.14#ibcon#about to read 4, iclass 38, count 2 2006.229.13:54:20.14#ibcon#read 4, iclass 38, count 2 2006.229.13:54:20.14#ibcon#about to read 5, iclass 38, count 2 2006.229.13:54:20.14#ibcon#read 5, iclass 38, count 2 2006.229.13:54:20.14#ibcon#about to read 6, iclass 38, count 2 2006.229.13:54:20.14#ibcon#read 6, iclass 38, count 2 2006.229.13:54:20.14#ibcon#end of sib2, iclass 38, count 2 2006.229.13:54:20.14#ibcon#*mode == 0, iclass 38, count 2 2006.229.13:54:20.14#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.13:54:20.14#ibcon#[27=AT07-04\r\n] 2006.229.13:54:20.14#ibcon#*before write, iclass 38, count 2 2006.229.13:54:20.14#ibcon#enter sib2, iclass 38, count 2 2006.229.13:54:20.14#ibcon#flushed, iclass 38, count 2 2006.229.13:54:20.14#ibcon#about to write, iclass 38, count 2 2006.229.13:54:20.14#ibcon#wrote, iclass 38, count 2 2006.229.13:54:20.14#ibcon#about to read 3, iclass 38, count 2 2006.229.13:54:20.17#ibcon#read 3, iclass 38, count 2 2006.229.13:54:20.17#ibcon#about to read 4, iclass 38, count 2 2006.229.13:54:20.17#ibcon#read 4, iclass 38, count 2 2006.229.13:54:20.17#ibcon#about to read 5, iclass 38, count 2 2006.229.13:54:20.17#ibcon#read 5, iclass 38, count 2 2006.229.13:54:20.17#ibcon#about to read 6, iclass 38, count 2 2006.229.13:54:20.17#ibcon#read 6, iclass 38, count 2 2006.229.13:54:20.17#ibcon#end of sib2, iclass 38, count 2 2006.229.13:54:20.17#ibcon#*after write, iclass 38, count 2 2006.229.13:54:20.17#ibcon#*before return 0, iclass 38, count 2 2006.229.13:54:20.17#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:20.17#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.13:54:20.17#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.13:54:20.17#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:20.17#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:20.29#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:20.29#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:20.29#ibcon#enter wrdev, iclass 38, count 0 2006.229.13:54:20.29#ibcon#first serial, iclass 38, count 0 2006.229.13:54:20.29#ibcon#enter sib2, iclass 38, count 0 2006.229.13:54:20.29#ibcon#flushed, iclass 38, count 0 2006.229.13:54:20.29#ibcon#about to write, iclass 38, count 0 2006.229.13:54:20.29#ibcon#wrote, iclass 38, count 0 2006.229.13:54:20.29#ibcon#about to read 3, iclass 38, count 0 2006.229.13:54:20.31#ibcon#read 3, iclass 38, count 0 2006.229.13:54:20.31#ibcon#about to read 4, iclass 38, count 0 2006.229.13:54:20.31#ibcon#read 4, iclass 38, count 0 2006.229.13:54:20.31#ibcon#about to read 5, iclass 38, count 0 2006.229.13:54:20.31#ibcon#read 5, iclass 38, count 0 2006.229.13:54:20.31#ibcon#about to read 6, iclass 38, count 0 2006.229.13:54:20.31#ibcon#read 6, iclass 38, count 0 2006.229.13:54:20.31#ibcon#end of sib2, iclass 38, count 0 2006.229.13:54:20.31#ibcon#*mode == 0, iclass 38, count 0 2006.229.13:54:20.31#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.13:54:20.31#ibcon#[27=USB\r\n] 2006.229.13:54:20.31#ibcon#*before write, iclass 38, count 0 2006.229.13:54:20.31#ibcon#enter sib2, iclass 38, count 0 2006.229.13:54:20.31#ibcon#flushed, iclass 38, count 0 2006.229.13:54:20.31#ibcon#about to write, iclass 38, count 0 2006.229.13:54:20.31#ibcon#wrote, iclass 38, count 0 2006.229.13:54:20.31#ibcon#about to read 3, iclass 38, count 0 2006.229.13:54:20.34#ibcon#read 3, iclass 38, count 0 2006.229.13:54:20.34#ibcon#about to read 4, iclass 38, count 0 2006.229.13:54:20.34#ibcon#read 4, iclass 38, count 0 2006.229.13:54:20.34#ibcon#about to read 5, iclass 38, count 0 2006.229.13:54:20.34#ibcon#read 5, iclass 38, count 0 2006.229.13:54:20.34#ibcon#about to read 6, iclass 38, count 0 2006.229.13:54:20.34#ibcon#read 6, iclass 38, count 0 2006.229.13:54:20.34#ibcon#end of sib2, iclass 38, count 0 2006.229.13:54:20.34#ibcon#*after write, iclass 38, count 0 2006.229.13:54:20.34#ibcon#*before return 0, iclass 38, count 0 2006.229.13:54:20.34#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:20.34#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.13:54:20.34#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.13:54:20.34#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.13:54:20.34$vck44/vblo=8,744.99 2006.229.13:54:20.34#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.13:54:20.34#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.13:54:20.34#ibcon#ireg 17 cls_cnt 0 2006.229.13:54:20.34#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:20.34#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:20.34#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:20.34#ibcon#enter wrdev, iclass 40, count 0 2006.229.13:54:20.34#ibcon#first serial, iclass 40, count 0 2006.229.13:54:20.34#ibcon#enter sib2, iclass 40, count 0 2006.229.13:54:20.34#ibcon#flushed, iclass 40, count 0 2006.229.13:54:20.34#ibcon#about to write, iclass 40, count 0 2006.229.13:54:20.34#ibcon#wrote, iclass 40, count 0 2006.229.13:54:20.34#ibcon#about to read 3, iclass 40, count 0 2006.229.13:54:20.36#ibcon#read 3, iclass 40, count 0 2006.229.13:54:20.36#ibcon#about to read 4, iclass 40, count 0 2006.229.13:54:20.36#ibcon#read 4, iclass 40, count 0 2006.229.13:54:20.36#ibcon#about to read 5, iclass 40, count 0 2006.229.13:54:20.36#ibcon#read 5, iclass 40, count 0 2006.229.13:54:20.36#ibcon#about to read 6, iclass 40, count 0 2006.229.13:54:20.36#ibcon#read 6, iclass 40, count 0 2006.229.13:54:20.36#ibcon#end of sib2, iclass 40, count 0 2006.229.13:54:20.36#ibcon#*mode == 0, iclass 40, count 0 2006.229.13:54:20.36#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.13:54:20.36#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:54:20.36#ibcon#*before write, iclass 40, count 0 2006.229.13:54:20.36#ibcon#enter sib2, iclass 40, count 0 2006.229.13:54:20.36#ibcon#flushed, iclass 40, count 0 2006.229.13:54:20.36#ibcon#about to write, iclass 40, count 0 2006.229.13:54:20.36#ibcon#wrote, iclass 40, count 0 2006.229.13:54:20.36#ibcon#about to read 3, iclass 40, count 0 2006.229.13:54:20.40#ibcon#read 3, iclass 40, count 0 2006.229.13:54:20.40#ibcon#about to read 4, iclass 40, count 0 2006.229.13:54:20.40#ibcon#read 4, iclass 40, count 0 2006.229.13:54:20.40#ibcon#about to read 5, iclass 40, count 0 2006.229.13:54:20.40#ibcon#read 5, iclass 40, count 0 2006.229.13:54:20.40#ibcon#about to read 6, iclass 40, count 0 2006.229.13:54:20.40#ibcon#read 6, iclass 40, count 0 2006.229.13:54:20.40#ibcon#end of sib2, iclass 40, count 0 2006.229.13:54:20.40#ibcon#*after write, iclass 40, count 0 2006.229.13:54:20.40#ibcon#*before return 0, iclass 40, count 0 2006.229.13:54:20.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:20.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.13:54:20.40#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.13:54:20.40#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.13:54:20.40$vck44/vb=8,4 2006.229.13:54:20.40#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.13:54:20.40#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.13:54:20.40#ibcon#ireg 11 cls_cnt 2 2006.229.13:54:20.40#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:20.46#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:20.46#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:20.46#ibcon#enter wrdev, iclass 4, count 2 2006.229.13:54:20.46#ibcon#first serial, iclass 4, count 2 2006.229.13:54:20.46#ibcon#enter sib2, iclass 4, count 2 2006.229.13:54:20.46#ibcon#flushed, iclass 4, count 2 2006.229.13:54:20.46#ibcon#about to write, iclass 4, count 2 2006.229.13:54:20.46#ibcon#wrote, iclass 4, count 2 2006.229.13:54:20.46#ibcon#about to read 3, iclass 4, count 2 2006.229.13:54:20.48#ibcon#read 3, iclass 4, count 2 2006.229.13:54:20.48#ibcon#about to read 4, iclass 4, count 2 2006.229.13:54:20.48#ibcon#read 4, iclass 4, count 2 2006.229.13:54:20.48#ibcon#about to read 5, iclass 4, count 2 2006.229.13:54:20.48#ibcon#read 5, iclass 4, count 2 2006.229.13:54:20.48#ibcon#about to read 6, iclass 4, count 2 2006.229.13:54:20.48#ibcon#read 6, iclass 4, count 2 2006.229.13:54:20.48#ibcon#end of sib2, iclass 4, count 2 2006.229.13:54:20.48#ibcon#*mode == 0, iclass 4, count 2 2006.229.13:54:20.48#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.13:54:20.48#ibcon#[27=AT08-04\r\n] 2006.229.13:54:20.48#ibcon#*before write, iclass 4, count 2 2006.229.13:54:20.48#ibcon#enter sib2, iclass 4, count 2 2006.229.13:54:20.48#ibcon#flushed, iclass 4, count 2 2006.229.13:54:20.48#ibcon#about to write, iclass 4, count 2 2006.229.13:54:20.48#ibcon#wrote, iclass 4, count 2 2006.229.13:54:20.48#ibcon#about to read 3, iclass 4, count 2 2006.229.13:54:20.51#ibcon#read 3, iclass 4, count 2 2006.229.13:54:20.51#ibcon#about to read 4, iclass 4, count 2 2006.229.13:54:20.51#ibcon#read 4, iclass 4, count 2 2006.229.13:54:20.51#ibcon#about to read 5, iclass 4, count 2 2006.229.13:54:20.51#ibcon#read 5, iclass 4, count 2 2006.229.13:54:20.51#ibcon#about to read 6, iclass 4, count 2 2006.229.13:54:20.51#ibcon#read 6, iclass 4, count 2 2006.229.13:54:20.51#ibcon#end of sib2, iclass 4, count 2 2006.229.13:54:20.51#ibcon#*after write, iclass 4, count 2 2006.229.13:54:20.51#ibcon#*before return 0, iclass 4, count 2 2006.229.13:54:20.51#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:20.51#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.13:54:20.51#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.13:54:20.51#ibcon#ireg 7 cls_cnt 0 2006.229.13:54:20.51#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:20.63#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:20.63#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:20.63#ibcon#enter wrdev, iclass 4, count 0 2006.229.13:54:20.63#ibcon#first serial, iclass 4, count 0 2006.229.13:54:20.63#ibcon#enter sib2, iclass 4, count 0 2006.229.13:54:20.63#ibcon#flushed, iclass 4, count 0 2006.229.13:54:20.63#ibcon#about to write, iclass 4, count 0 2006.229.13:54:20.63#ibcon#wrote, iclass 4, count 0 2006.229.13:54:20.63#ibcon#about to read 3, iclass 4, count 0 2006.229.13:54:20.65#ibcon#read 3, iclass 4, count 0 2006.229.13:54:20.65#ibcon#about to read 4, iclass 4, count 0 2006.229.13:54:20.65#ibcon#read 4, iclass 4, count 0 2006.229.13:54:20.65#ibcon#about to read 5, iclass 4, count 0 2006.229.13:54:20.65#ibcon#read 5, iclass 4, count 0 2006.229.13:54:20.65#ibcon#about to read 6, iclass 4, count 0 2006.229.13:54:20.65#ibcon#read 6, iclass 4, count 0 2006.229.13:54:20.65#ibcon#end of sib2, iclass 4, count 0 2006.229.13:54:20.65#ibcon#*mode == 0, iclass 4, count 0 2006.229.13:54:20.65#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.13:54:20.65#ibcon#[27=USB\r\n] 2006.229.13:54:20.65#ibcon#*before write, iclass 4, count 0 2006.229.13:54:20.65#ibcon#enter sib2, iclass 4, count 0 2006.229.13:54:20.65#ibcon#flushed, iclass 4, count 0 2006.229.13:54:20.65#ibcon#about to write, iclass 4, count 0 2006.229.13:54:20.65#ibcon#wrote, iclass 4, count 0 2006.229.13:54:20.65#ibcon#about to read 3, iclass 4, count 0 2006.229.13:54:20.68#ibcon#read 3, iclass 4, count 0 2006.229.13:54:20.68#ibcon#about to read 4, iclass 4, count 0 2006.229.13:54:20.68#ibcon#read 4, iclass 4, count 0 2006.229.13:54:20.68#ibcon#about to read 5, iclass 4, count 0 2006.229.13:54:20.68#ibcon#read 5, iclass 4, count 0 2006.229.13:54:20.68#ibcon#about to read 6, iclass 4, count 0 2006.229.13:54:20.68#ibcon#read 6, iclass 4, count 0 2006.229.13:54:20.68#ibcon#end of sib2, iclass 4, count 0 2006.229.13:54:20.68#ibcon#*after write, iclass 4, count 0 2006.229.13:54:20.68#ibcon#*before return 0, iclass 4, count 0 2006.229.13:54:20.68#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:20.68#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.13:54:20.68#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.13:54:20.68#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.13:54:20.68$vck44/vabw=wide 2006.229.13:54:20.68#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.13:54:20.68#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.13:54:20.68#ibcon#ireg 8 cls_cnt 0 2006.229.13:54:20.68#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:20.68#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:20.68#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:20.68#ibcon#enter wrdev, iclass 6, count 0 2006.229.13:54:20.68#ibcon#first serial, iclass 6, count 0 2006.229.13:54:20.68#ibcon#enter sib2, iclass 6, count 0 2006.229.13:54:20.68#ibcon#flushed, iclass 6, count 0 2006.229.13:54:20.68#ibcon#about to write, iclass 6, count 0 2006.229.13:54:20.68#ibcon#wrote, iclass 6, count 0 2006.229.13:54:20.68#ibcon#about to read 3, iclass 6, count 0 2006.229.13:54:20.70#ibcon#read 3, iclass 6, count 0 2006.229.13:54:20.70#ibcon#about to read 4, iclass 6, count 0 2006.229.13:54:20.70#ibcon#read 4, iclass 6, count 0 2006.229.13:54:20.70#ibcon#about to read 5, iclass 6, count 0 2006.229.13:54:20.70#ibcon#read 5, iclass 6, count 0 2006.229.13:54:20.70#ibcon#about to read 6, iclass 6, count 0 2006.229.13:54:20.70#ibcon#read 6, iclass 6, count 0 2006.229.13:54:20.70#ibcon#end of sib2, iclass 6, count 0 2006.229.13:54:20.70#ibcon#*mode == 0, iclass 6, count 0 2006.229.13:54:20.70#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.13:54:20.70#ibcon#[25=BW32\r\n] 2006.229.13:54:20.70#ibcon#*before write, iclass 6, count 0 2006.229.13:54:20.70#ibcon#enter sib2, iclass 6, count 0 2006.229.13:54:20.70#ibcon#flushed, iclass 6, count 0 2006.229.13:54:20.70#ibcon#about to write, iclass 6, count 0 2006.229.13:54:20.70#ibcon#wrote, iclass 6, count 0 2006.229.13:54:20.70#ibcon#about to read 3, iclass 6, count 0 2006.229.13:54:20.73#ibcon#read 3, iclass 6, count 0 2006.229.13:54:20.73#ibcon#about to read 4, iclass 6, count 0 2006.229.13:54:20.73#ibcon#read 4, iclass 6, count 0 2006.229.13:54:20.73#ibcon#about to read 5, iclass 6, count 0 2006.229.13:54:20.73#ibcon#read 5, iclass 6, count 0 2006.229.13:54:20.73#ibcon#about to read 6, iclass 6, count 0 2006.229.13:54:20.73#ibcon#read 6, iclass 6, count 0 2006.229.13:54:20.73#ibcon#end of sib2, iclass 6, count 0 2006.229.13:54:20.73#ibcon#*after write, iclass 6, count 0 2006.229.13:54:20.73#ibcon#*before return 0, iclass 6, count 0 2006.229.13:54:20.73#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:20.73#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.13:54:20.73#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.13:54:20.73#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.13:54:20.73$vck44/vbbw=wide 2006.229.13:54:20.73#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.13:54:20.73#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.13:54:20.73#ibcon#ireg 8 cls_cnt 0 2006.229.13:54:20.73#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:54:20.80#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:54:20.80#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:54:20.80#ibcon#enter wrdev, iclass 10, count 0 2006.229.13:54:20.80#ibcon#first serial, iclass 10, count 0 2006.229.13:54:20.80#ibcon#enter sib2, iclass 10, count 0 2006.229.13:54:20.80#ibcon#flushed, iclass 10, count 0 2006.229.13:54:20.80#ibcon#about to write, iclass 10, count 0 2006.229.13:54:20.80#ibcon#wrote, iclass 10, count 0 2006.229.13:54:20.80#ibcon#about to read 3, iclass 10, count 0 2006.229.13:54:20.82#ibcon#read 3, iclass 10, count 0 2006.229.13:54:20.82#ibcon#about to read 4, iclass 10, count 0 2006.229.13:54:20.82#ibcon#read 4, iclass 10, count 0 2006.229.13:54:20.82#ibcon#about to read 5, iclass 10, count 0 2006.229.13:54:20.82#ibcon#read 5, iclass 10, count 0 2006.229.13:54:20.82#ibcon#about to read 6, iclass 10, count 0 2006.229.13:54:20.82#ibcon#read 6, iclass 10, count 0 2006.229.13:54:20.82#ibcon#end of sib2, iclass 10, count 0 2006.229.13:54:20.82#ibcon#*mode == 0, iclass 10, count 0 2006.229.13:54:20.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.13:54:20.82#ibcon#[27=BW32\r\n] 2006.229.13:54:20.82#ibcon#*before write, iclass 10, count 0 2006.229.13:54:20.82#ibcon#enter sib2, iclass 10, count 0 2006.229.13:54:20.82#ibcon#flushed, iclass 10, count 0 2006.229.13:54:20.82#ibcon#about to write, iclass 10, count 0 2006.229.13:54:20.82#ibcon#wrote, iclass 10, count 0 2006.229.13:54:20.82#ibcon#about to read 3, iclass 10, count 0 2006.229.13:54:20.85#ibcon#read 3, iclass 10, count 0 2006.229.13:54:20.85#ibcon#about to read 4, iclass 10, count 0 2006.229.13:54:20.85#ibcon#read 4, iclass 10, count 0 2006.229.13:54:20.85#ibcon#about to read 5, iclass 10, count 0 2006.229.13:54:20.85#ibcon#read 5, iclass 10, count 0 2006.229.13:54:20.85#ibcon#about to read 6, iclass 10, count 0 2006.229.13:54:20.85#ibcon#read 6, iclass 10, count 0 2006.229.13:54:20.85#ibcon#end of sib2, iclass 10, count 0 2006.229.13:54:20.85#ibcon#*after write, iclass 10, count 0 2006.229.13:54:20.85#ibcon#*before return 0, iclass 10, count 0 2006.229.13:54:20.85#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:54:20.85#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.13:54:20.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.13:54:20.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.13:54:20.85$setupk4/ifdk4 2006.229.13:54:20.85$ifdk4/lo= 2006.229.13:54:20.85$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:54:20.85$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:54:20.85$ifdk4/patch= 2006.229.13:54:20.85$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:54:20.85$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:54:20.85$setupk4/!*+20s 2006.229.13:54:23.97#abcon#<5=/04 1.1 2.2 27.541001002.0\r\n> 2006.229.13:54:23.99#abcon#{5=INTERFACE CLEAR} 2006.229.13:54:24.05#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:54:34.14#abcon#<5=/04 1.1 2.2 27.541001002.0\r\n> 2006.229.13:54:34.16#abcon#{5=INTERFACE CLEAR} 2006.229.13:54:34.22#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:54:35.29$setupk4/"tpicd 2006.229.13:54:35.29$setupk4/echo=off 2006.229.13:54:35.29$setupk4/xlog=off 2006.229.13:54:35.29:!2006.229.13:56:45 2006.229.13:54:48.14#trakl#Source acquired 2006.229.13:54:49.14#flagr#flagr/antenna,acquired 2006.229.13:56:45.00:preob 2006.229.13:56:45.14/onsource/TRACKING 2006.229.13:56:45.14:!2006.229.13:56:55 2006.229.13:56:55.00:"tape 2006.229.13:56:55.00:"st=record 2006.229.13:56:55.00:data_valid=on 2006.229.13:56:55.00:midob 2006.229.13:56:55.14/onsource/TRACKING 2006.229.13:56:55.14/wx/27.54,1002.0,100 2006.229.13:56:55.29/cable/+6.4131E-03 2006.229.13:56:56.38/va/01,08,usb,yes,30,32 2006.229.13:56:56.38/va/02,07,usb,yes,33,33 2006.229.13:56:56.38/va/03,06,usb,yes,40,43 2006.229.13:56:56.38/va/04,07,usb,yes,34,35 2006.229.13:56:56.38/va/05,04,usb,yes,30,30 2006.229.13:56:56.38/va/06,04,usb,yes,34,33 2006.229.13:56:56.38/va/07,05,usb,yes,30,30 2006.229.13:56:56.38/va/08,06,usb,yes,22,27 2006.229.13:56:56.61/valo/01,524.99,yes,locked 2006.229.13:56:56.61/valo/02,534.99,yes,locked 2006.229.13:56:56.61/valo/03,564.99,yes,locked 2006.229.13:56:56.61/valo/04,624.99,yes,locked 2006.229.13:56:56.61/valo/05,734.99,yes,locked 2006.229.13:56:56.61/valo/06,814.99,yes,locked 2006.229.13:56:56.61/valo/07,864.99,yes,locked 2006.229.13:56:56.61/valo/08,884.99,yes,locked 2006.229.13:56:57.70/vb/01,04,usb,yes,31,29 2006.229.13:56:57.70/vb/02,04,usb,yes,34,34 2006.229.13:56:57.70/vb/03,04,usb,yes,31,34 2006.229.13:56:57.70/vb/04,04,usb,yes,35,34 2006.229.13:56:57.70/vb/05,04,usb,yes,27,30 2006.229.13:56:57.70/vb/06,04,usb,yes,32,28 2006.229.13:56:57.70/vb/07,04,usb,yes,32,32 2006.229.13:56:57.70/vb/08,04,usb,yes,29,33 2006.229.13:56:57.93/vblo/01,629.99,yes,locked 2006.229.13:56:57.93/vblo/02,634.99,yes,locked 2006.229.13:56:57.93/vblo/03,649.99,yes,locked 2006.229.13:56:57.93/vblo/04,679.99,yes,locked 2006.229.13:56:57.93/vblo/05,709.99,yes,locked 2006.229.13:56:57.93/vblo/06,719.99,yes,locked 2006.229.13:56:57.93/vblo/07,734.99,yes,locked 2006.229.13:56:57.93/vblo/08,744.99,yes,locked 2006.229.13:56:58.08/vabw/8 2006.229.13:56:58.23/vbbw/8 2006.229.13:56:58.32/xfe/off,on,12.2 2006.229.13:56:58.71/ifatt/23,28,28,28 2006.229.13:56:59.08/fmout-gps/S +4.60E-07 2006.229.13:56:59.12:!2006.229.13:57:55 2006.229.13:57:55.00:data_valid=off 2006.229.13:57:55.00:"et 2006.229.13:57:55.00:!+3s 2006.229.13:57:58.01:"tape 2006.229.13:57:58.01:postob 2006.229.13:57:58.13/cable/+6.4130E-03 2006.229.13:57:58.13/wx/27.54,1002.0,100 2006.229.13:57:59.07/fmout-gps/S +4.59E-07 2006.229.13:57:59.07:scan_name=229-1401,jd0608,170 2006.229.13:57:59.07:source=2201+315,220314.98,314538.3,2000.0,cw 2006.229.13:57:59.14#flagr#flagr/antenna,new-source 2006.229.13:58:00.14:checkk5 2006.229.13:58:00.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.13:58:00.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.13:58:01.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.13:58:01.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.13:58:02.09/chk_obsdata//k5ts1/T2291356??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.13:58:02.50/chk_obsdata//k5ts2/T2291356??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.13:58:02.90/chk_obsdata//k5ts3/T2291356??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.13:58:03.31/chk_obsdata//k5ts4/T2291356??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.13:58:04.04/k5log//k5ts1_log_newline 2006.229.13:58:04.74/k5log//k5ts2_log_newline 2006.229.13:58:05.46/k5log//k5ts3_log_newline 2006.229.13:58:06.17/k5log//k5ts4_log_newline 2006.229.13:58:06.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.13:58:06.20:setupk4=1 2006.229.13:58:06.20$setupk4/echo=on 2006.229.13:58:06.20$setupk4/pcalon 2006.229.13:58:06.20$pcalon/"no phase cal control is implemented here 2006.229.13:58:06.20$setupk4/"tpicd=stop 2006.229.13:58:06.20$setupk4/"rec=synch_on 2006.229.13:58:06.20$setupk4/"rec_mode=128 2006.229.13:58:06.20$setupk4/!* 2006.229.13:58:06.20$setupk4/recpk4 2006.229.13:58:06.20$recpk4/recpatch= 2006.229.13:58:06.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.13:58:06.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.13:58:06.20$setupk4/vck44 2006.229.13:58:06.20$vck44/valo=1,524.99 2006.229.13:58:06.20#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:58:06.20#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:58:06.20#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:06.20#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:06.20#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:06.20#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:06.20#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:58:06.20#ibcon#first serial, iclass 31, count 0 2006.229.13:58:06.20#ibcon#enter sib2, iclass 31, count 0 2006.229.13:58:06.20#ibcon#flushed, iclass 31, count 0 2006.229.13:58:06.20#ibcon#about to write, iclass 31, count 0 2006.229.13:58:06.20#ibcon#wrote, iclass 31, count 0 2006.229.13:58:06.20#ibcon#about to read 3, iclass 31, count 0 2006.229.13:58:06.22#ibcon#read 3, iclass 31, count 0 2006.229.13:58:06.22#ibcon#about to read 4, iclass 31, count 0 2006.229.13:58:06.22#ibcon#read 4, iclass 31, count 0 2006.229.13:58:06.22#ibcon#about to read 5, iclass 31, count 0 2006.229.13:58:06.22#ibcon#read 5, iclass 31, count 0 2006.229.13:58:06.22#ibcon#about to read 6, iclass 31, count 0 2006.229.13:58:06.22#ibcon#read 6, iclass 31, count 0 2006.229.13:58:06.22#ibcon#end of sib2, iclass 31, count 0 2006.229.13:58:06.22#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:58:06.22#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:58:06.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.13:58:06.22#ibcon#*before write, iclass 31, count 0 2006.229.13:58:06.22#ibcon#enter sib2, iclass 31, count 0 2006.229.13:58:06.22#ibcon#flushed, iclass 31, count 0 2006.229.13:58:06.22#ibcon#about to write, iclass 31, count 0 2006.229.13:58:06.22#ibcon#wrote, iclass 31, count 0 2006.229.13:58:06.22#ibcon#about to read 3, iclass 31, count 0 2006.229.13:58:06.27#ibcon#read 3, iclass 31, count 0 2006.229.13:58:06.27#ibcon#about to read 4, iclass 31, count 0 2006.229.13:58:06.27#ibcon#read 4, iclass 31, count 0 2006.229.13:58:06.27#ibcon#about to read 5, iclass 31, count 0 2006.229.13:58:06.27#ibcon#read 5, iclass 31, count 0 2006.229.13:58:06.27#ibcon#about to read 6, iclass 31, count 0 2006.229.13:58:06.27#ibcon#read 6, iclass 31, count 0 2006.229.13:58:06.27#ibcon#end of sib2, iclass 31, count 0 2006.229.13:58:06.27#ibcon#*after write, iclass 31, count 0 2006.229.13:58:06.27#ibcon#*before return 0, iclass 31, count 0 2006.229.13:58:06.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:06.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:06.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:58:06.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:58:06.27$vck44/va=1,8 2006.229.13:58:06.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:58:06.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:58:06.27#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:06.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:06.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:06.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:06.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:58:06.27#ibcon#first serial, iclass 33, count 2 2006.229.13:58:06.27#ibcon#enter sib2, iclass 33, count 2 2006.229.13:58:06.27#ibcon#flushed, iclass 33, count 2 2006.229.13:58:06.27#ibcon#about to write, iclass 33, count 2 2006.229.13:58:06.27#ibcon#wrote, iclass 33, count 2 2006.229.13:58:06.27#ibcon#about to read 3, iclass 33, count 2 2006.229.13:58:06.29#ibcon#read 3, iclass 33, count 2 2006.229.13:58:06.29#ibcon#about to read 4, iclass 33, count 2 2006.229.13:58:06.29#ibcon#read 4, iclass 33, count 2 2006.229.13:58:06.29#ibcon#about to read 5, iclass 33, count 2 2006.229.13:58:06.29#ibcon#read 5, iclass 33, count 2 2006.229.13:58:06.29#ibcon#about to read 6, iclass 33, count 2 2006.229.13:58:06.29#ibcon#read 6, iclass 33, count 2 2006.229.13:58:06.29#ibcon#end of sib2, iclass 33, count 2 2006.229.13:58:06.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:58:06.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:58:06.29#ibcon#[25=AT01-08\r\n] 2006.229.13:58:06.29#ibcon#*before write, iclass 33, count 2 2006.229.13:58:06.29#ibcon#enter sib2, iclass 33, count 2 2006.229.13:58:06.29#ibcon#flushed, iclass 33, count 2 2006.229.13:58:06.29#ibcon#about to write, iclass 33, count 2 2006.229.13:58:06.29#ibcon#wrote, iclass 33, count 2 2006.229.13:58:06.29#ibcon#about to read 3, iclass 33, count 2 2006.229.13:58:06.32#ibcon#read 3, iclass 33, count 2 2006.229.13:58:06.32#ibcon#about to read 4, iclass 33, count 2 2006.229.13:58:06.32#ibcon#read 4, iclass 33, count 2 2006.229.13:58:06.32#ibcon#about to read 5, iclass 33, count 2 2006.229.13:58:06.32#ibcon#read 5, iclass 33, count 2 2006.229.13:58:06.32#ibcon#about to read 6, iclass 33, count 2 2006.229.13:58:06.32#ibcon#read 6, iclass 33, count 2 2006.229.13:58:06.32#ibcon#end of sib2, iclass 33, count 2 2006.229.13:58:06.32#ibcon#*after write, iclass 33, count 2 2006.229.13:58:06.32#ibcon#*before return 0, iclass 33, count 2 2006.229.13:58:06.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:06.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:06.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:58:06.32#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:06.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:06.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:06.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:06.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:58:06.44#ibcon#first serial, iclass 33, count 0 2006.229.13:58:06.44#ibcon#enter sib2, iclass 33, count 0 2006.229.13:58:06.44#ibcon#flushed, iclass 33, count 0 2006.229.13:58:06.44#ibcon#about to write, iclass 33, count 0 2006.229.13:58:06.44#ibcon#wrote, iclass 33, count 0 2006.229.13:58:06.44#ibcon#about to read 3, iclass 33, count 0 2006.229.13:58:06.46#ibcon#read 3, iclass 33, count 0 2006.229.13:58:06.46#ibcon#about to read 4, iclass 33, count 0 2006.229.13:58:06.46#ibcon#read 4, iclass 33, count 0 2006.229.13:58:06.46#ibcon#about to read 5, iclass 33, count 0 2006.229.13:58:06.46#ibcon#read 5, iclass 33, count 0 2006.229.13:58:06.46#ibcon#about to read 6, iclass 33, count 0 2006.229.13:58:06.46#ibcon#read 6, iclass 33, count 0 2006.229.13:58:06.46#ibcon#end of sib2, iclass 33, count 0 2006.229.13:58:06.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:58:06.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:58:06.46#ibcon#[25=USB\r\n] 2006.229.13:58:06.46#ibcon#*before write, iclass 33, count 0 2006.229.13:58:06.46#ibcon#enter sib2, iclass 33, count 0 2006.229.13:58:06.46#ibcon#flushed, iclass 33, count 0 2006.229.13:58:06.46#ibcon#about to write, iclass 33, count 0 2006.229.13:58:06.46#ibcon#wrote, iclass 33, count 0 2006.229.13:58:06.46#ibcon#about to read 3, iclass 33, count 0 2006.229.13:58:06.49#ibcon#read 3, iclass 33, count 0 2006.229.13:58:06.49#ibcon#about to read 4, iclass 33, count 0 2006.229.13:58:06.49#ibcon#read 4, iclass 33, count 0 2006.229.13:58:06.49#ibcon#about to read 5, iclass 33, count 0 2006.229.13:58:06.49#ibcon#read 5, iclass 33, count 0 2006.229.13:58:06.49#ibcon#about to read 6, iclass 33, count 0 2006.229.13:58:06.49#ibcon#read 6, iclass 33, count 0 2006.229.13:58:06.49#ibcon#end of sib2, iclass 33, count 0 2006.229.13:58:06.49#ibcon#*after write, iclass 33, count 0 2006.229.13:58:06.49#ibcon#*before return 0, iclass 33, count 0 2006.229.13:58:06.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:06.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:06.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:58:06.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:58:06.49$vck44/valo=2,534.99 2006.229.13:58:06.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:58:06.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:58:06.49#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:06.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:06.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:06.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:06.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:58:06.49#ibcon#first serial, iclass 35, count 0 2006.229.13:58:06.49#ibcon#enter sib2, iclass 35, count 0 2006.229.13:58:06.49#ibcon#flushed, iclass 35, count 0 2006.229.13:58:06.49#ibcon#about to write, iclass 35, count 0 2006.229.13:58:06.49#ibcon#wrote, iclass 35, count 0 2006.229.13:58:06.49#ibcon#about to read 3, iclass 35, count 0 2006.229.13:58:06.51#ibcon#read 3, iclass 35, count 0 2006.229.13:58:06.51#ibcon#about to read 4, iclass 35, count 0 2006.229.13:58:06.51#ibcon#read 4, iclass 35, count 0 2006.229.13:58:06.51#ibcon#about to read 5, iclass 35, count 0 2006.229.13:58:06.51#ibcon#read 5, iclass 35, count 0 2006.229.13:58:06.51#ibcon#about to read 6, iclass 35, count 0 2006.229.13:58:06.51#ibcon#read 6, iclass 35, count 0 2006.229.13:58:06.51#ibcon#end of sib2, iclass 35, count 0 2006.229.13:58:06.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:58:06.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:58:06.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.13:58:06.51#ibcon#*before write, iclass 35, count 0 2006.229.13:58:06.51#ibcon#enter sib2, iclass 35, count 0 2006.229.13:58:06.51#ibcon#flushed, iclass 35, count 0 2006.229.13:58:06.51#ibcon#about to write, iclass 35, count 0 2006.229.13:58:06.51#ibcon#wrote, iclass 35, count 0 2006.229.13:58:06.51#ibcon#about to read 3, iclass 35, count 0 2006.229.13:58:06.55#ibcon#read 3, iclass 35, count 0 2006.229.13:58:06.55#ibcon#about to read 4, iclass 35, count 0 2006.229.13:58:06.55#ibcon#read 4, iclass 35, count 0 2006.229.13:58:06.55#ibcon#about to read 5, iclass 35, count 0 2006.229.13:58:06.55#ibcon#read 5, iclass 35, count 0 2006.229.13:58:06.55#ibcon#about to read 6, iclass 35, count 0 2006.229.13:58:06.55#ibcon#read 6, iclass 35, count 0 2006.229.13:58:06.55#ibcon#end of sib2, iclass 35, count 0 2006.229.13:58:06.55#ibcon#*after write, iclass 35, count 0 2006.229.13:58:06.55#ibcon#*before return 0, iclass 35, count 0 2006.229.13:58:06.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:06.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:06.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:58:06.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:58:06.55$vck44/va=2,7 2006.229.13:58:06.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:58:06.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:58:06.55#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:06.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:06.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:06.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:06.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:58:06.61#ibcon#first serial, iclass 37, count 2 2006.229.13:58:06.61#ibcon#enter sib2, iclass 37, count 2 2006.229.13:58:06.61#ibcon#flushed, iclass 37, count 2 2006.229.13:58:06.61#ibcon#about to write, iclass 37, count 2 2006.229.13:58:06.61#ibcon#wrote, iclass 37, count 2 2006.229.13:58:06.61#ibcon#about to read 3, iclass 37, count 2 2006.229.13:58:06.63#ibcon#read 3, iclass 37, count 2 2006.229.13:58:06.63#ibcon#about to read 4, iclass 37, count 2 2006.229.13:58:06.63#ibcon#read 4, iclass 37, count 2 2006.229.13:58:06.63#ibcon#about to read 5, iclass 37, count 2 2006.229.13:58:06.63#ibcon#read 5, iclass 37, count 2 2006.229.13:58:06.63#ibcon#about to read 6, iclass 37, count 2 2006.229.13:58:06.63#ibcon#read 6, iclass 37, count 2 2006.229.13:58:06.63#ibcon#end of sib2, iclass 37, count 2 2006.229.13:58:06.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:58:06.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:58:06.63#ibcon#[25=AT02-07\r\n] 2006.229.13:58:06.63#ibcon#*before write, iclass 37, count 2 2006.229.13:58:06.63#ibcon#enter sib2, iclass 37, count 2 2006.229.13:58:06.63#ibcon#flushed, iclass 37, count 2 2006.229.13:58:06.63#ibcon#about to write, iclass 37, count 2 2006.229.13:58:06.63#ibcon#wrote, iclass 37, count 2 2006.229.13:58:06.63#ibcon#about to read 3, iclass 37, count 2 2006.229.13:58:06.66#ibcon#read 3, iclass 37, count 2 2006.229.13:58:06.66#ibcon#about to read 4, iclass 37, count 2 2006.229.13:58:06.66#ibcon#read 4, iclass 37, count 2 2006.229.13:58:06.66#ibcon#about to read 5, iclass 37, count 2 2006.229.13:58:06.66#ibcon#read 5, iclass 37, count 2 2006.229.13:58:06.66#ibcon#about to read 6, iclass 37, count 2 2006.229.13:58:06.66#ibcon#read 6, iclass 37, count 2 2006.229.13:58:06.66#ibcon#end of sib2, iclass 37, count 2 2006.229.13:58:06.66#ibcon#*after write, iclass 37, count 2 2006.229.13:58:06.66#ibcon#*before return 0, iclass 37, count 2 2006.229.13:58:06.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:06.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:06.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:58:06.66#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:06.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:06.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:06.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:06.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:58:06.78#ibcon#first serial, iclass 37, count 0 2006.229.13:58:06.78#ibcon#enter sib2, iclass 37, count 0 2006.229.13:58:06.78#ibcon#flushed, iclass 37, count 0 2006.229.13:58:06.78#ibcon#about to write, iclass 37, count 0 2006.229.13:58:06.78#ibcon#wrote, iclass 37, count 0 2006.229.13:58:06.78#ibcon#about to read 3, iclass 37, count 0 2006.229.13:58:06.80#ibcon#read 3, iclass 37, count 0 2006.229.13:58:06.80#ibcon#about to read 4, iclass 37, count 0 2006.229.13:58:06.80#ibcon#read 4, iclass 37, count 0 2006.229.13:58:06.80#ibcon#about to read 5, iclass 37, count 0 2006.229.13:58:06.80#ibcon#read 5, iclass 37, count 0 2006.229.13:58:06.80#ibcon#about to read 6, iclass 37, count 0 2006.229.13:58:06.80#ibcon#read 6, iclass 37, count 0 2006.229.13:58:06.80#ibcon#end of sib2, iclass 37, count 0 2006.229.13:58:06.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:58:06.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:58:06.80#ibcon#[25=USB\r\n] 2006.229.13:58:06.80#ibcon#*before write, iclass 37, count 0 2006.229.13:58:06.80#ibcon#enter sib2, iclass 37, count 0 2006.229.13:58:06.80#ibcon#flushed, iclass 37, count 0 2006.229.13:58:06.80#ibcon#about to write, iclass 37, count 0 2006.229.13:58:06.80#ibcon#wrote, iclass 37, count 0 2006.229.13:58:06.80#ibcon#about to read 3, iclass 37, count 0 2006.229.13:58:06.83#ibcon#read 3, iclass 37, count 0 2006.229.13:58:06.83#ibcon#about to read 4, iclass 37, count 0 2006.229.13:58:06.83#ibcon#read 4, iclass 37, count 0 2006.229.13:58:06.83#ibcon#about to read 5, iclass 37, count 0 2006.229.13:58:06.83#ibcon#read 5, iclass 37, count 0 2006.229.13:58:06.83#ibcon#about to read 6, iclass 37, count 0 2006.229.13:58:06.83#ibcon#read 6, iclass 37, count 0 2006.229.13:58:06.83#ibcon#end of sib2, iclass 37, count 0 2006.229.13:58:06.83#ibcon#*after write, iclass 37, count 0 2006.229.13:58:06.83#ibcon#*before return 0, iclass 37, count 0 2006.229.13:58:06.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:06.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:06.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:58:06.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:58:06.83$vck44/valo=3,564.99 2006.229.13:58:06.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:58:06.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:58:06.83#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:06.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:06.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:06.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:06.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:58:06.83#ibcon#first serial, iclass 39, count 0 2006.229.13:58:06.83#ibcon#enter sib2, iclass 39, count 0 2006.229.13:58:06.83#ibcon#flushed, iclass 39, count 0 2006.229.13:58:06.83#ibcon#about to write, iclass 39, count 0 2006.229.13:58:06.83#ibcon#wrote, iclass 39, count 0 2006.229.13:58:06.83#ibcon#about to read 3, iclass 39, count 0 2006.229.13:58:06.85#ibcon#read 3, iclass 39, count 0 2006.229.13:58:06.85#ibcon#about to read 4, iclass 39, count 0 2006.229.13:58:06.85#ibcon#read 4, iclass 39, count 0 2006.229.13:58:06.85#ibcon#about to read 5, iclass 39, count 0 2006.229.13:58:06.85#ibcon#read 5, iclass 39, count 0 2006.229.13:58:06.85#ibcon#about to read 6, iclass 39, count 0 2006.229.13:58:06.85#ibcon#read 6, iclass 39, count 0 2006.229.13:58:06.85#ibcon#end of sib2, iclass 39, count 0 2006.229.13:58:06.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:58:06.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:58:06.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.13:58:06.85#ibcon#*before write, iclass 39, count 0 2006.229.13:58:06.85#ibcon#enter sib2, iclass 39, count 0 2006.229.13:58:06.85#ibcon#flushed, iclass 39, count 0 2006.229.13:58:06.85#ibcon#about to write, iclass 39, count 0 2006.229.13:58:06.85#ibcon#wrote, iclass 39, count 0 2006.229.13:58:06.85#ibcon#about to read 3, iclass 39, count 0 2006.229.13:58:06.89#ibcon#read 3, iclass 39, count 0 2006.229.13:58:06.89#ibcon#about to read 4, iclass 39, count 0 2006.229.13:58:06.89#ibcon#read 4, iclass 39, count 0 2006.229.13:58:06.89#ibcon#about to read 5, iclass 39, count 0 2006.229.13:58:06.89#ibcon#read 5, iclass 39, count 0 2006.229.13:58:06.89#ibcon#about to read 6, iclass 39, count 0 2006.229.13:58:06.89#ibcon#read 6, iclass 39, count 0 2006.229.13:58:06.89#ibcon#end of sib2, iclass 39, count 0 2006.229.13:58:06.89#ibcon#*after write, iclass 39, count 0 2006.229.13:58:06.89#ibcon#*before return 0, iclass 39, count 0 2006.229.13:58:06.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:06.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:06.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:58:06.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:58:06.89$vck44/va=3,6 2006.229.13:58:06.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.13:58:06.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.13:58:06.89#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:06.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:06.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:06.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:06.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.13:58:06.95#ibcon#first serial, iclass 3, count 2 2006.229.13:58:06.95#ibcon#enter sib2, iclass 3, count 2 2006.229.13:58:06.95#ibcon#flushed, iclass 3, count 2 2006.229.13:58:06.95#ibcon#about to write, iclass 3, count 2 2006.229.13:58:06.95#ibcon#wrote, iclass 3, count 2 2006.229.13:58:06.95#ibcon#about to read 3, iclass 3, count 2 2006.229.13:58:06.97#ibcon#read 3, iclass 3, count 2 2006.229.13:58:06.97#ibcon#about to read 4, iclass 3, count 2 2006.229.13:58:06.97#ibcon#read 4, iclass 3, count 2 2006.229.13:58:06.97#ibcon#about to read 5, iclass 3, count 2 2006.229.13:58:06.97#ibcon#read 5, iclass 3, count 2 2006.229.13:58:06.97#ibcon#about to read 6, iclass 3, count 2 2006.229.13:58:06.97#ibcon#read 6, iclass 3, count 2 2006.229.13:58:06.97#ibcon#end of sib2, iclass 3, count 2 2006.229.13:58:06.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.13:58:06.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.13:58:06.97#ibcon#[25=AT03-06\r\n] 2006.229.13:58:06.97#ibcon#*before write, iclass 3, count 2 2006.229.13:58:06.97#ibcon#enter sib2, iclass 3, count 2 2006.229.13:58:06.97#ibcon#flushed, iclass 3, count 2 2006.229.13:58:06.97#ibcon#about to write, iclass 3, count 2 2006.229.13:58:06.97#ibcon#wrote, iclass 3, count 2 2006.229.13:58:06.97#ibcon#about to read 3, iclass 3, count 2 2006.229.13:58:07.00#ibcon#read 3, iclass 3, count 2 2006.229.13:58:07.00#ibcon#about to read 4, iclass 3, count 2 2006.229.13:58:07.00#ibcon#read 4, iclass 3, count 2 2006.229.13:58:07.00#ibcon#about to read 5, iclass 3, count 2 2006.229.13:58:07.00#ibcon#read 5, iclass 3, count 2 2006.229.13:58:07.00#ibcon#about to read 6, iclass 3, count 2 2006.229.13:58:07.00#ibcon#read 6, iclass 3, count 2 2006.229.13:58:07.00#ibcon#end of sib2, iclass 3, count 2 2006.229.13:58:07.00#ibcon#*after write, iclass 3, count 2 2006.229.13:58:07.00#ibcon#*before return 0, iclass 3, count 2 2006.229.13:58:07.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:07.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:07.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.13:58:07.00#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:07.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:07.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:07.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:07.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:58:07.12#ibcon#first serial, iclass 3, count 0 2006.229.13:58:07.12#ibcon#enter sib2, iclass 3, count 0 2006.229.13:58:07.12#ibcon#flushed, iclass 3, count 0 2006.229.13:58:07.12#ibcon#about to write, iclass 3, count 0 2006.229.13:58:07.12#ibcon#wrote, iclass 3, count 0 2006.229.13:58:07.12#ibcon#about to read 3, iclass 3, count 0 2006.229.13:58:07.14#ibcon#read 3, iclass 3, count 0 2006.229.13:58:07.14#ibcon#about to read 4, iclass 3, count 0 2006.229.13:58:07.14#ibcon#read 4, iclass 3, count 0 2006.229.13:58:07.14#ibcon#about to read 5, iclass 3, count 0 2006.229.13:58:07.14#ibcon#read 5, iclass 3, count 0 2006.229.13:58:07.14#ibcon#about to read 6, iclass 3, count 0 2006.229.13:58:07.14#ibcon#read 6, iclass 3, count 0 2006.229.13:58:07.14#ibcon#end of sib2, iclass 3, count 0 2006.229.13:58:07.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:58:07.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:58:07.14#ibcon#[25=USB\r\n] 2006.229.13:58:07.14#ibcon#*before write, iclass 3, count 0 2006.229.13:58:07.14#ibcon#enter sib2, iclass 3, count 0 2006.229.13:58:07.14#ibcon#flushed, iclass 3, count 0 2006.229.13:58:07.14#ibcon#about to write, iclass 3, count 0 2006.229.13:58:07.14#ibcon#wrote, iclass 3, count 0 2006.229.13:58:07.14#ibcon#about to read 3, iclass 3, count 0 2006.229.13:58:07.17#ibcon#read 3, iclass 3, count 0 2006.229.13:58:07.17#ibcon#about to read 4, iclass 3, count 0 2006.229.13:58:07.17#ibcon#read 4, iclass 3, count 0 2006.229.13:58:07.17#ibcon#about to read 5, iclass 3, count 0 2006.229.13:58:07.17#ibcon#read 5, iclass 3, count 0 2006.229.13:58:07.17#ibcon#about to read 6, iclass 3, count 0 2006.229.13:58:07.17#ibcon#read 6, iclass 3, count 0 2006.229.13:58:07.17#ibcon#end of sib2, iclass 3, count 0 2006.229.13:58:07.17#ibcon#*after write, iclass 3, count 0 2006.229.13:58:07.17#ibcon#*before return 0, iclass 3, count 0 2006.229.13:58:07.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:07.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:07.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:58:07.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:58:07.17$vck44/valo=4,624.99 2006.229.13:58:07.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:58:07.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:58:07.17#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:07.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:07.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:07.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:07.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:58:07.17#ibcon#first serial, iclass 5, count 0 2006.229.13:58:07.17#ibcon#enter sib2, iclass 5, count 0 2006.229.13:58:07.17#ibcon#flushed, iclass 5, count 0 2006.229.13:58:07.17#ibcon#about to write, iclass 5, count 0 2006.229.13:58:07.17#ibcon#wrote, iclass 5, count 0 2006.229.13:58:07.17#ibcon#about to read 3, iclass 5, count 0 2006.229.13:58:07.19#ibcon#read 3, iclass 5, count 0 2006.229.13:58:07.19#ibcon#about to read 4, iclass 5, count 0 2006.229.13:58:07.19#ibcon#read 4, iclass 5, count 0 2006.229.13:58:07.19#ibcon#about to read 5, iclass 5, count 0 2006.229.13:58:07.19#ibcon#read 5, iclass 5, count 0 2006.229.13:58:07.19#ibcon#about to read 6, iclass 5, count 0 2006.229.13:58:07.19#ibcon#read 6, iclass 5, count 0 2006.229.13:58:07.19#ibcon#end of sib2, iclass 5, count 0 2006.229.13:58:07.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:58:07.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:58:07.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.13:58:07.19#ibcon#*before write, iclass 5, count 0 2006.229.13:58:07.19#ibcon#enter sib2, iclass 5, count 0 2006.229.13:58:07.19#ibcon#flushed, iclass 5, count 0 2006.229.13:58:07.19#ibcon#about to write, iclass 5, count 0 2006.229.13:58:07.19#ibcon#wrote, iclass 5, count 0 2006.229.13:58:07.19#ibcon#about to read 3, iclass 5, count 0 2006.229.13:58:07.23#ibcon#read 3, iclass 5, count 0 2006.229.13:58:07.23#ibcon#about to read 4, iclass 5, count 0 2006.229.13:58:07.23#ibcon#read 4, iclass 5, count 0 2006.229.13:58:07.23#ibcon#about to read 5, iclass 5, count 0 2006.229.13:58:07.23#ibcon#read 5, iclass 5, count 0 2006.229.13:58:07.23#ibcon#about to read 6, iclass 5, count 0 2006.229.13:58:07.23#ibcon#read 6, iclass 5, count 0 2006.229.13:58:07.23#ibcon#end of sib2, iclass 5, count 0 2006.229.13:58:07.23#ibcon#*after write, iclass 5, count 0 2006.229.13:58:07.23#ibcon#*before return 0, iclass 5, count 0 2006.229.13:58:07.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:07.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:07.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:58:07.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:58:07.23$vck44/va=4,7 2006.229.13:58:07.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:58:07.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:58:07.23#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:07.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:07.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:07.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:07.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:58:07.29#ibcon#first serial, iclass 7, count 2 2006.229.13:58:07.29#ibcon#enter sib2, iclass 7, count 2 2006.229.13:58:07.29#ibcon#flushed, iclass 7, count 2 2006.229.13:58:07.29#ibcon#about to write, iclass 7, count 2 2006.229.13:58:07.29#ibcon#wrote, iclass 7, count 2 2006.229.13:58:07.29#ibcon#about to read 3, iclass 7, count 2 2006.229.13:58:07.31#ibcon#read 3, iclass 7, count 2 2006.229.13:58:07.31#ibcon#about to read 4, iclass 7, count 2 2006.229.13:58:07.31#ibcon#read 4, iclass 7, count 2 2006.229.13:58:07.31#ibcon#about to read 5, iclass 7, count 2 2006.229.13:58:07.31#ibcon#read 5, iclass 7, count 2 2006.229.13:58:07.31#ibcon#about to read 6, iclass 7, count 2 2006.229.13:58:07.31#ibcon#read 6, iclass 7, count 2 2006.229.13:58:07.31#ibcon#end of sib2, iclass 7, count 2 2006.229.13:58:07.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:58:07.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:58:07.31#ibcon#[25=AT04-07\r\n] 2006.229.13:58:07.31#ibcon#*before write, iclass 7, count 2 2006.229.13:58:07.31#ibcon#enter sib2, iclass 7, count 2 2006.229.13:58:07.31#ibcon#flushed, iclass 7, count 2 2006.229.13:58:07.31#ibcon#about to write, iclass 7, count 2 2006.229.13:58:07.31#ibcon#wrote, iclass 7, count 2 2006.229.13:58:07.31#ibcon#about to read 3, iclass 7, count 2 2006.229.13:58:07.34#ibcon#read 3, iclass 7, count 2 2006.229.13:58:07.34#ibcon#about to read 4, iclass 7, count 2 2006.229.13:58:07.34#ibcon#read 4, iclass 7, count 2 2006.229.13:58:07.34#ibcon#about to read 5, iclass 7, count 2 2006.229.13:58:07.34#ibcon#read 5, iclass 7, count 2 2006.229.13:58:07.34#ibcon#about to read 6, iclass 7, count 2 2006.229.13:58:07.34#ibcon#read 6, iclass 7, count 2 2006.229.13:58:07.34#ibcon#end of sib2, iclass 7, count 2 2006.229.13:58:07.34#ibcon#*after write, iclass 7, count 2 2006.229.13:58:07.34#ibcon#*before return 0, iclass 7, count 2 2006.229.13:58:07.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:07.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:07.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:58:07.34#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:07.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:07.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:07.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:07.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:58:07.46#ibcon#first serial, iclass 7, count 0 2006.229.13:58:07.46#ibcon#enter sib2, iclass 7, count 0 2006.229.13:58:07.46#ibcon#flushed, iclass 7, count 0 2006.229.13:58:07.46#ibcon#about to write, iclass 7, count 0 2006.229.13:58:07.46#ibcon#wrote, iclass 7, count 0 2006.229.13:58:07.46#ibcon#about to read 3, iclass 7, count 0 2006.229.13:58:07.48#ibcon#read 3, iclass 7, count 0 2006.229.13:58:07.48#ibcon#about to read 4, iclass 7, count 0 2006.229.13:58:07.48#ibcon#read 4, iclass 7, count 0 2006.229.13:58:07.48#ibcon#about to read 5, iclass 7, count 0 2006.229.13:58:07.48#ibcon#read 5, iclass 7, count 0 2006.229.13:58:07.48#ibcon#about to read 6, iclass 7, count 0 2006.229.13:58:07.48#ibcon#read 6, iclass 7, count 0 2006.229.13:58:07.48#ibcon#end of sib2, iclass 7, count 0 2006.229.13:58:07.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:58:07.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:58:07.48#ibcon#[25=USB\r\n] 2006.229.13:58:07.48#ibcon#*before write, iclass 7, count 0 2006.229.13:58:07.48#ibcon#enter sib2, iclass 7, count 0 2006.229.13:58:07.48#ibcon#flushed, iclass 7, count 0 2006.229.13:58:07.48#ibcon#about to write, iclass 7, count 0 2006.229.13:58:07.48#ibcon#wrote, iclass 7, count 0 2006.229.13:58:07.48#ibcon#about to read 3, iclass 7, count 0 2006.229.13:58:07.51#ibcon#read 3, iclass 7, count 0 2006.229.13:58:07.51#ibcon#about to read 4, iclass 7, count 0 2006.229.13:58:07.51#ibcon#read 4, iclass 7, count 0 2006.229.13:58:07.51#ibcon#about to read 5, iclass 7, count 0 2006.229.13:58:07.51#ibcon#read 5, iclass 7, count 0 2006.229.13:58:07.51#ibcon#about to read 6, iclass 7, count 0 2006.229.13:58:07.51#ibcon#read 6, iclass 7, count 0 2006.229.13:58:07.51#ibcon#end of sib2, iclass 7, count 0 2006.229.13:58:07.51#ibcon#*after write, iclass 7, count 0 2006.229.13:58:07.51#ibcon#*before return 0, iclass 7, count 0 2006.229.13:58:07.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:07.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:07.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:58:07.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:58:07.51$vck44/valo=5,734.99 2006.229.13:58:07.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:58:07.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:58:07.51#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:07.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:07.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:07.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:07.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:58:07.51#ibcon#first serial, iclass 11, count 0 2006.229.13:58:07.51#ibcon#enter sib2, iclass 11, count 0 2006.229.13:58:07.51#ibcon#flushed, iclass 11, count 0 2006.229.13:58:07.51#ibcon#about to write, iclass 11, count 0 2006.229.13:58:07.51#ibcon#wrote, iclass 11, count 0 2006.229.13:58:07.51#ibcon#about to read 3, iclass 11, count 0 2006.229.13:58:07.53#ibcon#read 3, iclass 11, count 0 2006.229.13:58:07.53#ibcon#about to read 4, iclass 11, count 0 2006.229.13:58:07.53#ibcon#read 4, iclass 11, count 0 2006.229.13:58:07.53#ibcon#about to read 5, iclass 11, count 0 2006.229.13:58:07.53#ibcon#read 5, iclass 11, count 0 2006.229.13:58:07.53#ibcon#about to read 6, iclass 11, count 0 2006.229.13:58:07.53#ibcon#read 6, iclass 11, count 0 2006.229.13:58:07.53#ibcon#end of sib2, iclass 11, count 0 2006.229.13:58:07.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:58:07.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:58:07.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.13:58:07.53#ibcon#*before write, iclass 11, count 0 2006.229.13:58:07.53#ibcon#enter sib2, iclass 11, count 0 2006.229.13:58:07.53#ibcon#flushed, iclass 11, count 0 2006.229.13:58:07.53#ibcon#about to write, iclass 11, count 0 2006.229.13:58:07.53#ibcon#wrote, iclass 11, count 0 2006.229.13:58:07.53#ibcon#about to read 3, iclass 11, count 0 2006.229.13:58:07.57#ibcon#read 3, iclass 11, count 0 2006.229.13:58:07.57#ibcon#about to read 4, iclass 11, count 0 2006.229.13:58:07.57#ibcon#read 4, iclass 11, count 0 2006.229.13:58:07.57#ibcon#about to read 5, iclass 11, count 0 2006.229.13:58:07.57#ibcon#read 5, iclass 11, count 0 2006.229.13:58:07.57#ibcon#about to read 6, iclass 11, count 0 2006.229.13:58:07.57#ibcon#read 6, iclass 11, count 0 2006.229.13:58:07.57#ibcon#end of sib2, iclass 11, count 0 2006.229.13:58:07.57#ibcon#*after write, iclass 11, count 0 2006.229.13:58:07.57#ibcon#*before return 0, iclass 11, count 0 2006.229.13:58:07.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:07.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:07.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:58:07.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:58:07.57$vck44/va=5,4 2006.229.13:58:07.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.13:58:07.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.13:58:07.57#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:07.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:07.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:07.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:07.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.13:58:07.63#ibcon#first serial, iclass 13, count 2 2006.229.13:58:07.63#ibcon#enter sib2, iclass 13, count 2 2006.229.13:58:07.63#ibcon#flushed, iclass 13, count 2 2006.229.13:58:07.63#ibcon#about to write, iclass 13, count 2 2006.229.13:58:07.63#ibcon#wrote, iclass 13, count 2 2006.229.13:58:07.63#ibcon#about to read 3, iclass 13, count 2 2006.229.13:58:07.65#ibcon#read 3, iclass 13, count 2 2006.229.13:58:07.65#ibcon#about to read 4, iclass 13, count 2 2006.229.13:58:07.65#ibcon#read 4, iclass 13, count 2 2006.229.13:58:07.65#ibcon#about to read 5, iclass 13, count 2 2006.229.13:58:07.65#ibcon#read 5, iclass 13, count 2 2006.229.13:58:07.65#ibcon#about to read 6, iclass 13, count 2 2006.229.13:58:07.65#ibcon#read 6, iclass 13, count 2 2006.229.13:58:07.65#ibcon#end of sib2, iclass 13, count 2 2006.229.13:58:07.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.13:58:07.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.13:58:07.65#ibcon#[25=AT05-04\r\n] 2006.229.13:58:07.65#ibcon#*before write, iclass 13, count 2 2006.229.13:58:07.65#ibcon#enter sib2, iclass 13, count 2 2006.229.13:58:07.65#ibcon#flushed, iclass 13, count 2 2006.229.13:58:07.65#ibcon#about to write, iclass 13, count 2 2006.229.13:58:07.65#ibcon#wrote, iclass 13, count 2 2006.229.13:58:07.65#ibcon#about to read 3, iclass 13, count 2 2006.229.13:58:07.68#ibcon#read 3, iclass 13, count 2 2006.229.13:58:07.68#ibcon#about to read 4, iclass 13, count 2 2006.229.13:58:07.68#ibcon#read 4, iclass 13, count 2 2006.229.13:58:07.68#ibcon#about to read 5, iclass 13, count 2 2006.229.13:58:07.68#ibcon#read 5, iclass 13, count 2 2006.229.13:58:07.68#ibcon#about to read 6, iclass 13, count 2 2006.229.13:58:07.68#ibcon#read 6, iclass 13, count 2 2006.229.13:58:07.68#ibcon#end of sib2, iclass 13, count 2 2006.229.13:58:07.68#ibcon#*after write, iclass 13, count 2 2006.229.13:58:07.68#ibcon#*before return 0, iclass 13, count 2 2006.229.13:58:07.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:07.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:07.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.13:58:07.68#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:07.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:07.71#abcon#<5=/04 1.3 2.2 27.531001002.0\r\n> 2006.229.13:58:07.73#abcon#{5=INTERFACE CLEAR} 2006.229.13:58:07.79#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:58:07.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:07.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:07.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:58:07.80#ibcon#first serial, iclass 13, count 0 2006.229.13:58:07.80#ibcon#enter sib2, iclass 13, count 0 2006.229.13:58:07.80#ibcon#flushed, iclass 13, count 0 2006.229.13:58:07.80#ibcon#about to write, iclass 13, count 0 2006.229.13:58:07.80#ibcon#wrote, iclass 13, count 0 2006.229.13:58:07.80#ibcon#about to read 3, iclass 13, count 0 2006.229.13:58:07.82#ibcon#read 3, iclass 13, count 0 2006.229.13:58:07.82#ibcon#about to read 4, iclass 13, count 0 2006.229.13:58:07.82#ibcon#read 4, iclass 13, count 0 2006.229.13:58:07.82#ibcon#about to read 5, iclass 13, count 0 2006.229.13:58:07.82#ibcon#read 5, iclass 13, count 0 2006.229.13:58:07.82#ibcon#about to read 6, iclass 13, count 0 2006.229.13:58:07.82#ibcon#read 6, iclass 13, count 0 2006.229.13:58:07.82#ibcon#end of sib2, iclass 13, count 0 2006.229.13:58:07.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:58:07.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:58:07.82#ibcon#[25=USB\r\n] 2006.229.13:58:07.82#ibcon#*before write, iclass 13, count 0 2006.229.13:58:07.82#ibcon#enter sib2, iclass 13, count 0 2006.229.13:58:07.82#ibcon#flushed, iclass 13, count 0 2006.229.13:58:07.82#ibcon#about to write, iclass 13, count 0 2006.229.13:58:07.82#ibcon#wrote, iclass 13, count 0 2006.229.13:58:07.82#ibcon#about to read 3, iclass 13, count 0 2006.229.13:58:07.85#ibcon#read 3, iclass 13, count 0 2006.229.13:58:07.85#ibcon#about to read 4, iclass 13, count 0 2006.229.13:58:07.85#ibcon#read 4, iclass 13, count 0 2006.229.13:58:07.85#ibcon#about to read 5, iclass 13, count 0 2006.229.13:58:07.85#ibcon#read 5, iclass 13, count 0 2006.229.13:58:07.85#ibcon#about to read 6, iclass 13, count 0 2006.229.13:58:07.85#ibcon#read 6, iclass 13, count 0 2006.229.13:58:07.85#ibcon#end of sib2, iclass 13, count 0 2006.229.13:58:07.85#ibcon#*after write, iclass 13, count 0 2006.229.13:58:07.85#ibcon#*before return 0, iclass 13, count 0 2006.229.13:58:07.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:07.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:07.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:58:07.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:58:07.85$vck44/valo=6,814.99 2006.229.13:58:07.85#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:58:07.85#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:58:07.85#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:07.85#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:07.85#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:07.85#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:07.85#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:58:07.85#ibcon#first serial, iclass 19, count 0 2006.229.13:58:07.85#ibcon#enter sib2, iclass 19, count 0 2006.229.13:58:07.85#ibcon#flushed, iclass 19, count 0 2006.229.13:58:07.85#ibcon#about to write, iclass 19, count 0 2006.229.13:58:07.85#ibcon#wrote, iclass 19, count 0 2006.229.13:58:07.85#ibcon#about to read 3, iclass 19, count 0 2006.229.13:58:07.87#ibcon#read 3, iclass 19, count 0 2006.229.13:58:07.87#ibcon#about to read 4, iclass 19, count 0 2006.229.13:58:07.87#ibcon#read 4, iclass 19, count 0 2006.229.13:58:07.87#ibcon#about to read 5, iclass 19, count 0 2006.229.13:58:07.87#ibcon#read 5, iclass 19, count 0 2006.229.13:58:07.87#ibcon#about to read 6, iclass 19, count 0 2006.229.13:58:07.87#ibcon#read 6, iclass 19, count 0 2006.229.13:58:07.87#ibcon#end of sib2, iclass 19, count 0 2006.229.13:58:07.87#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:58:07.87#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:58:07.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.13:58:07.87#ibcon#*before write, iclass 19, count 0 2006.229.13:58:07.87#ibcon#enter sib2, iclass 19, count 0 2006.229.13:58:07.87#ibcon#flushed, iclass 19, count 0 2006.229.13:58:07.87#ibcon#about to write, iclass 19, count 0 2006.229.13:58:07.87#ibcon#wrote, iclass 19, count 0 2006.229.13:58:07.87#ibcon#about to read 3, iclass 19, count 0 2006.229.13:58:07.91#ibcon#read 3, iclass 19, count 0 2006.229.13:58:07.91#ibcon#about to read 4, iclass 19, count 0 2006.229.13:58:07.91#ibcon#read 4, iclass 19, count 0 2006.229.13:58:07.91#ibcon#about to read 5, iclass 19, count 0 2006.229.13:58:07.91#ibcon#read 5, iclass 19, count 0 2006.229.13:58:07.91#ibcon#about to read 6, iclass 19, count 0 2006.229.13:58:07.91#ibcon#read 6, iclass 19, count 0 2006.229.13:58:07.91#ibcon#end of sib2, iclass 19, count 0 2006.229.13:58:07.91#ibcon#*after write, iclass 19, count 0 2006.229.13:58:07.91#ibcon#*before return 0, iclass 19, count 0 2006.229.13:58:07.91#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:07.91#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:07.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:58:07.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:58:07.91$vck44/va=6,4 2006.229.13:58:07.91#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:58:07.91#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:58:07.91#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:07.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:07.97#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:07.97#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:07.97#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:58:07.97#ibcon#first serial, iclass 21, count 2 2006.229.13:58:07.97#ibcon#enter sib2, iclass 21, count 2 2006.229.13:58:07.97#ibcon#flushed, iclass 21, count 2 2006.229.13:58:07.97#ibcon#about to write, iclass 21, count 2 2006.229.13:58:07.97#ibcon#wrote, iclass 21, count 2 2006.229.13:58:07.97#ibcon#about to read 3, iclass 21, count 2 2006.229.13:58:07.99#ibcon#read 3, iclass 21, count 2 2006.229.13:58:07.99#ibcon#about to read 4, iclass 21, count 2 2006.229.13:58:07.99#ibcon#read 4, iclass 21, count 2 2006.229.13:58:07.99#ibcon#about to read 5, iclass 21, count 2 2006.229.13:58:07.99#ibcon#read 5, iclass 21, count 2 2006.229.13:58:07.99#ibcon#about to read 6, iclass 21, count 2 2006.229.13:58:07.99#ibcon#read 6, iclass 21, count 2 2006.229.13:58:07.99#ibcon#end of sib2, iclass 21, count 2 2006.229.13:58:07.99#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:58:07.99#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:58:07.99#ibcon#[25=AT06-04\r\n] 2006.229.13:58:07.99#ibcon#*before write, iclass 21, count 2 2006.229.13:58:07.99#ibcon#enter sib2, iclass 21, count 2 2006.229.13:58:07.99#ibcon#flushed, iclass 21, count 2 2006.229.13:58:07.99#ibcon#about to write, iclass 21, count 2 2006.229.13:58:07.99#ibcon#wrote, iclass 21, count 2 2006.229.13:58:07.99#ibcon#about to read 3, iclass 21, count 2 2006.229.13:58:08.02#ibcon#read 3, iclass 21, count 2 2006.229.13:58:08.02#ibcon#about to read 4, iclass 21, count 2 2006.229.13:58:08.02#ibcon#read 4, iclass 21, count 2 2006.229.13:58:08.02#ibcon#about to read 5, iclass 21, count 2 2006.229.13:58:08.02#ibcon#read 5, iclass 21, count 2 2006.229.13:58:08.02#ibcon#about to read 6, iclass 21, count 2 2006.229.13:58:08.02#ibcon#read 6, iclass 21, count 2 2006.229.13:58:08.02#ibcon#end of sib2, iclass 21, count 2 2006.229.13:58:08.02#ibcon#*after write, iclass 21, count 2 2006.229.13:58:08.02#ibcon#*before return 0, iclass 21, count 2 2006.229.13:58:08.02#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:08.02#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:08.02#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:58:08.02#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:08.02#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:08.14#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:08.14#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:08.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:58:08.14#ibcon#first serial, iclass 21, count 0 2006.229.13:58:08.14#ibcon#enter sib2, iclass 21, count 0 2006.229.13:58:08.14#ibcon#flushed, iclass 21, count 0 2006.229.13:58:08.14#ibcon#about to write, iclass 21, count 0 2006.229.13:58:08.14#ibcon#wrote, iclass 21, count 0 2006.229.13:58:08.14#ibcon#about to read 3, iclass 21, count 0 2006.229.13:58:08.16#ibcon#read 3, iclass 21, count 0 2006.229.13:58:08.16#ibcon#about to read 4, iclass 21, count 0 2006.229.13:58:08.16#ibcon#read 4, iclass 21, count 0 2006.229.13:58:08.16#ibcon#about to read 5, iclass 21, count 0 2006.229.13:58:08.16#ibcon#read 5, iclass 21, count 0 2006.229.13:58:08.16#ibcon#about to read 6, iclass 21, count 0 2006.229.13:58:08.16#ibcon#read 6, iclass 21, count 0 2006.229.13:58:08.16#ibcon#end of sib2, iclass 21, count 0 2006.229.13:58:08.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:58:08.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:58:08.16#ibcon#[25=USB\r\n] 2006.229.13:58:08.16#ibcon#*before write, iclass 21, count 0 2006.229.13:58:08.16#ibcon#enter sib2, iclass 21, count 0 2006.229.13:58:08.16#ibcon#flushed, iclass 21, count 0 2006.229.13:58:08.16#ibcon#about to write, iclass 21, count 0 2006.229.13:58:08.16#ibcon#wrote, iclass 21, count 0 2006.229.13:58:08.16#ibcon#about to read 3, iclass 21, count 0 2006.229.13:58:08.19#ibcon#read 3, iclass 21, count 0 2006.229.13:58:08.19#ibcon#about to read 4, iclass 21, count 0 2006.229.13:58:08.19#ibcon#read 4, iclass 21, count 0 2006.229.13:58:08.19#ibcon#about to read 5, iclass 21, count 0 2006.229.13:58:08.19#ibcon#read 5, iclass 21, count 0 2006.229.13:58:08.19#ibcon#about to read 6, iclass 21, count 0 2006.229.13:58:08.19#ibcon#read 6, iclass 21, count 0 2006.229.13:58:08.19#ibcon#end of sib2, iclass 21, count 0 2006.229.13:58:08.19#ibcon#*after write, iclass 21, count 0 2006.229.13:58:08.19#ibcon#*before return 0, iclass 21, count 0 2006.229.13:58:08.19#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:08.19#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:08.19#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:58:08.19#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:58:08.19$vck44/valo=7,864.99 2006.229.13:58:08.19#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:58:08.19#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:58:08.19#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:08.19#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:08.19#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:08.19#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:08.19#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:58:08.19#ibcon#first serial, iclass 23, count 0 2006.229.13:58:08.19#ibcon#enter sib2, iclass 23, count 0 2006.229.13:58:08.19#ibcon#flushed, iclass 23, count 0 2006.229.13:58:08.19#ibcon#about to write, iclass 23, count 0 2006.229.13:58:08.19#ibcon#wrote, iclass 23, count 0 2006.229.13:58:08.19#ibcon#about to read 3, iclass 23, count 0 2006.229.13:58:08.21#ibcon#read 3, iclass 23, count 0 2006.229.13:58:08.21#ibcon#about to read 4, iclass 23, count 0 2006.229.13:58:08.21#ibcon#read 4, iclass 23, count 0 2006.229.13:58:08.21#ibcon#about to read 5, iclass 23, count 0 2006.229.13:58:08.21#ibcon#read 5, iclass 23, count 0 2006.229.13:58:08.21#ibcon#about to read 6, iclass 23, count 0 2006.229.13:58:08.21#ibcon#read 6, iclass 23, count 0 2006.229.13:58:08.21#ibcon#end of sib2, iclass 23, count 0 2006.229.13:58:08.21#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:58:08.21#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:58:08.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.13:58:08.21#ibcon#*before write, iclass 23, count 0 2006.229.13:58:08.21#ibcon#enter sib2, iclass 23, count 0 2006.229.13:58:08.21#ibcon#flushed, iclass 23, count 0 2006.229.13:58:08.21#ibcon#about to write, iclass 23, count 0 2006.229.13:58:08.21#ibcon#wrote, iclass 23, count 0 2006.229.13:58:08.21#ibcon#about to read 3, iclass 23, count 0 2006.229.13:58:08.25#ibcon#read 3, iclass 23, count 0 2006.229.13:58:08.25#ibcon#about to read 4, iclass 23, count 0 2006.229.13:58:08.25#ibcon#read 4, iclass 23, count 0 2006.229.13:58:08.25#ibcon#about to read 5, iclass 23, count 0 2006.229.13:58:08.25#ibcon#read 5, iclass 23, count 0 2006.229.13:58:08.25#ibcon#about to read 6, iclass 23, count 0 2006.229.13:58:08.25#ibcon#read 6, iclass 23, count 0 2006.229.13:58:08.25#ibcon#end of sib2, iclass 23, count 0 2006.229.13:58:08.25#ibcon#*after write, iclass 23, count 0 2006.229.13:58:08.25#ibcon#*before return 0, iclass 23, count 0 2006.229.13:58:08.25#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:08.25#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:08.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:58:08.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:58:08.25$vck44/va=7,5 2006.229.13:58:08.25#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:58:08.25#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:58:08.25#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:08.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:08.31#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:08.31#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:08.31#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:58:08.31#ibcon#first serial, iclass 25, count 2 2006.229.13:58:08.31#ibcon#enter sib2, iclass 25, count 2 2006.229.13:58:08.31#ibcon#flushed, iclass 25, count 2 2006.229.13:58:08.31#ibcon#about to write, iclass 25, count 2 2006.229.13:58:08.31#ibcon#wrote, iclass 25, count 2 2006.229.13:58:08.31#ibcon#about to read 3, iclass 25, count 2 2006.229.13:58:08.33#ibcon#read 3, iclass 25, count 2 2006.229.13:58:08.33#ibcon#about to read 4, iclass 25, count 2 2006.229.13:58:08.33#ibcon#read 4, iclass 25, count 2 2006.229.13:58:08.33#ibcon#about to read 5, iclass 25, count 2 2006.229.13:58:08.33#ibcon#read 5, iclass 25, count 2 2006.229.13:58:08.33#ibcon#about to read 6, iclass 25, count 2 2006.229.13:58:08.33#ibcon#read 6, iclass 25, count 2 2006.229.13:58:08.33#ibcon#end of sib2, iclass 25, count 2 2006.229.13:58:08.33#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:58:08.33#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:58:08.33#ibcon#[25=AT07-05\r\n] 2006.229.13:58:08.33#ibcon#*before write, iclass 25, count 2 2006.229.13:58:08.33#ibcon#enter sib2, iclass 25, count 2 2006.229.13:58:08.33#ibcon#flushed, iclass 25, count 2 2006.229.13:58:08.33#ibcon#about to write, iclass 25, count 2 2006.229.13:58:08.33#ibcon#wrote, iclass 25, count 2 2006.229.13:58:08.33#ibcon#about to read 3, iclass 25, count 2 2006.229.13:58:08.36#ibcon#read 3, iclass 25, count 2 2006.229.13:58:08.36#ibcon#about to read 4, iclass 25, count 2 2006.229.13:58:08.36#ibcon#read 4, iclass 25, count 2 2006.229.13:58:08.36#ibcon#about to read 5, iclass 25, count 2 2006.229.13:58:08.36#ibcon#read 5, iclass 25, count 2 2006.229.13:58:08.36#ibcon#about to read 6, iclass 25, count 2 2006.229.13:58:08.36#ibcon#read 6, iclass 25, count 2 2006.229.13:58:08.36#ibcon#end of sib2, iclass 25, count 2 2006.229.13:58:08.36#ibcon#*after write, iclass 25, count 2 2006.229.13:58:08.36#ibcon#*before return 0, iclass 25, count 2 2006.229.13:58:08.36#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:08.36#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:08.36#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:58:08.36#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:08.36#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:08.48#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:08.48#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:08.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:58:08.48#ibcon#first serial, iclass 25, count 0 2006.229.13:58:08.48#ibcon#enter sib2, iclass 25, count 0 2006.229.13:58:08.48#ibcon#flushed, iclass 25, count 0 2006.229.13:58:08.48#ibcon#about to write, iclass 25, count 0 2006.229.13:58:08.48#ibcon#wrote, iclass 25, count 0 2006.229.13:58:08.48#ibcon#about to read 3, iclass 25, count 0 2006.229.13:58:08.50#ibcon#read 3, iclass 25, count 0 2006.229.13:58:08.50#ibcon#about to read 4, iclass 25, count 0 2006.229.13:58:08.50#ibcon#read 4, iclass 25, count 0 2006.229.13:58:08.50#ibcon#about to read 5, iclass 25, count 0 2006.229.13:58:08.50#ibcon#read 5, iclass 25, count 0 2006.229.13:58:08.50#ibcon#about to read 6, iclass 25, count 0 2006.229.13:58:08.50#ibcon#read 6, iclass 25, count 0 2006.229.13:58:08.50#ibcon#end of sib2, iclass 25, count 0 2006.229.13:58:08.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:58:08.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:58:08.50#ibcon#[25=USB\r\n] 2006.229.13:58:08.50#ibcon#*before write, iclass 25, count 0 2006.229.13:58:08.50#ibcon#enter sib2, iclass 25, count 0 2006.229.13:58:08.50#ibcon#flushed, iclass 25, count 0 2006.229.13:58:08.50#ibcon#about to write, iclass 25, count 0 2006.229.13:58:08.50#ibcon#wrote, iclass 25, count 0 2006.229.13:58:08.50#ibcon#about to read 3, iclass 25, count 0 2006.229.13:58:08.53#ibcon#read 3, iclass 25, count 0 2006.229.13:58:08.53#ibcon#about to read 4, iclass 25, count 0 2006.229.13:58:08.53#ibcon#read 4, iclass 25, count 0 2006.229.13:58:08.53#ibcon#about to read 5, iclass 25, count 0 2006.229.13:58:08.53#ibcon#read 5, iclass 25, count 0 2006.229.13:58:08.53#ibcon#about to read 6, iclass 25, count 0 2006.229.13:58:08.53#ibcon#read 6, iclass 25, count 0 2006.229.13:58:08.53#ibcon#end of sib2, iclass 25, count 0 2006.229.13:58:08.53#ibcon#*after write, iclass 25, count 0 2006.229.13:58:08.53#ibcon#*before return 0, iclass 25, count 0 2006.229.13:58:08.53#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:08.53#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:08.53#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:58:08.53#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:58:08.53$vck44/valo=8,884.99 2006.229.13:58:08.53#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:58:08.53#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:58:08.53#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:08.53#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:08.53#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:08.53#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:08.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:58:08.53#ibcon#first serial, iclass 27, count 0 2006.229.13:58:08.53#ibcon#enter sib2, iclass 27, count 0 2006.229.13:58:08.53#ibcon#flushed, iclass 27, count 0 2006.229.13:58:08.53#ibcon#about to write, iclass 27, count 0 2006.229.13:58:08.53#ibcon#wrote, iclass 27, count 0 2006.229.13:58:08.53#ibcon#about to read 3, iclass 27, count 0 2006.229.13:58:08.55#ibcon#read 3, iclass 27, count 0 2006.229.13:58:08.55#ibcon#about to read 4, iclass 27, count 0 2006.229.13:58:08.55#ibcon#read 4, iclass 27, count 0 2006.229.13:58:08.55#ibcon#about to read 5, iclass 27, count 0 2006.229.13:58:08.55#ibcon#read 5, iclass 27, count 0 2006.229.13:58:08.55#ibcon#about to read 6, iclass 27, count 0 2006.229.13:58:08.55#ibcon#read 6, iclass 27, count 0 2006.229.13:58:08.55#ibcon#end of sib2, iclass 27, count 0 2006.229.13:58:08.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:58:08.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:58:08.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.13:58:08.55#ibcon#*before write, iclass 27, count 0 2006.229.13:58:08.55#ibcon#enter sib2, iclass 27, count 0 2006.229.13:58:08.55#ibcon#flushed, iclass 27, count 0 2006.229.13:58:08.55#ibcon#about to write, iclass 27, count 0 2006.229.13:58:08.55#ibcon#wrote, iclass 27, count 0 2006.229.13:58:08.55#ibcon#about to read 3, iclass 27, count 0 2006.229.13:58:08.59#ibcon#read 3, iclass 27, count 0 2006.229.13:58:08.59#ibcon#about to read 4, iclass 27, count 0 2006.229.13:58:08.59#ibcon#read 4, iclass 27, count 0 2006.229.13:58:08.59#ibcon#about to read 5, iclass 27, count 0 2006.229.13:58:08.59#ibcon#read 5, iclass 27, count 0 2006.229.13:58:08.59#ibcon#about to read 6, iclass 27, count 0 2006.229.13:58:08.59#ibcon#read 6, iclass 27, count 0 2006.229.13:58:08.59#ibcon#end of sib2, iclass 27, count 0 2006.229.13:58:08.59#ibcon#*after write, iclass 27, count 0 2006.229.13:58:08.59#ibcon#*before return 0, iclass 27, count 0 2006.229.13:58:08.59#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:08.59#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:08.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:58:08.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:58:08.59$vck44/va=8,6 2006.229.13:58:08.59#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.13:58:08.59#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.13:58:08.59#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:08.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:58:08.65#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:58:08.65#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:58:08.65#ibcon#enter wrdev, iclass 29, count 2 2006.229.13:58:08.65#ibcon#first serial, iclass 29, count 2 2006.229.13:58:08.65#ibcon#enter sib2, iclass 29, count 2 2006.229.13:58:08.65#ibcon#flushed, iclass 29, count 2 2006.229.13:58:08.65#ibcon#about to write, iclass 29, count 2 2006.229.13:58:08.65#ibcon#wrote, iclass 29, count 2 2006.229.13:58:08.65#ibcon#about to read 3, iclass 29, count 2 2006.229.13:58:08.67#ibcon#read 3, iclass 29, count 2 2006.229.13:58:08.67#ibcon#about to read 4, iclass 29, count 2 2006.229.13:58:08.67#ibcon#read 4, iclass 29, count 2 2006.229.13:58:08.67#ibcon#about to read 5, iclass 29, count 2 2006.229.13:58:08.67#ibcon#read 5, iclass 29, count 2 2006.229.13:58:08.67#ibcon#about to read 6, iclass 29, count 2 2006.229.13:58:08.67#ibcon#read 6, iclass 29, count 2 2006.229.13:58:08.67#ibcon#end of sib2, iclass 29, count 2 2006.229.13:58:08.67#ibcon#*mode == 0, iclass 29, count 2 2006.229.13:58:08.67#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.13:58:08.67#ibcon#[25=AT08-06\r\n] 2006.229.13:58:08.67#ibcon#*before write, iclass 29, count 2 2006.229.13:58:08.67#ibcon#enter sib2, iclass 29, count 2 2006.229.13:58:08.67#ibcon#flushed, iclass 29, count 2 2006.229.13:58:08.67#ibcon#about to write, iclass 29, count 2 2006.229.13:58:08.67#ibcon#wrote, iclass 29, count 2 2006.229.13:58:08.67#ibcon#about to read 3, iclass 29, count 2 2006.229.13:58:08.70#ibcon#read 3, iclass 29, count 2 2006.229.13:58:08.70#ibcon#about to read 4, iclass 29, count 2 2006.229.13:58:08.70#ibcon#read 4, iclass 29, count 2 2006.229.13:58:08.70#ibcon#about to read 5, iclass 29, count 2 2006.229.13:58:08.70#ibcon#read 5, iclass 29, count 2 2006.229.13:58:08.70#ibcon#about to read 6, iclass 29, count 2 2006.229.13:58:08.70#ibcon#read 6, iclass 29, count 2 2006.229.13:58:08.70#ibcon#end of sib2, iclass 29, count 2 2006.229.13:58:08.70#ibcon#*after write, iclass 29, count 2 2006.229.13:58:08.70#ibcon#*before return 0, iclass 29, count 2 2006.229.13:58:08.70#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:58:08.70#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.13:58:08.70#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.13:58:08.70#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:08.70#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:58:08.82#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:58:08.82#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:58:08.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:58:08.82#ibcon#first serial, iclass 29, count 0 2006.229.13:58:08.82#ibcon#enter sib2, iclass 29, count 0 2006.229.13:58:08.82#ibcon#flushed, iclass 29, count 0 2006.229.13:58:08.82#ibcon#about to write, iclass 29, count 0 2006.229.13:58:08.82#ibcon#wrote, iclass 29, count 0 2006.229.13:58:08.82#ibcon#about to read 3, iclass 29, count 0 2006.229.13:58:08.84#ibcon#read 3, iclass 29, count 0 2006.229.13:58:08.84#ibcon#about to read 4, iclass 29, count 0 2006.229.13:58:08.84#ibcon#read 4, iclass 29, count 0 2006.229.13:58:08.84#ibcon#about to read 5, iclass 29, count 0 2006.229.13:58:08.84#ibcon#read 5, iclass 29, count 0 2006.229.13:58:08.84#ibcon#about to read 6, iclass 29, count 0 2006.229.13:58:08.84#ibcon#read 6, iclass 29, count 0 2006.229.13:58:08.84#ibcon#end of sib2, iclass 29, count 0 2006.229.13:58:08.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:58:08.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:58:08.84#ibcon#[25=USB\r\n] 2006.229.13:58:08.84#ibcon#*before write, iclass 29, count 0 2006.229.13:58:08.84#ibcon#enter sib2, iclass 29, count 0 2006.229.13:58:08.84#ibcon#flushed, iclass 29, count 0 2006.229.13:58:08.84#ibcon#about to write, iclass 29, count 0 2006.229.13:58:08.84#ibcon#wrote, iclass 29, count 0 2006.229.13:58:08.84#ibcon#about to read 3, iclass 29, count 0 2006.229.13:58:08.87#ibcon#read 3, iclass 29, count 0 2006.229.13:58:08.87#ibcon#about to read 4, iclass 29, count 0 2006.229.13:58:08.87#ibcon#read 4, iclass 29, count 0 2006.229.13:58:08.87#ibcon#about to read 5, iclass 29, count 0 2006.229.13:58:08.87#ibcon#read 5, iclass 29, count 0 2006.229.13:58:08.87#ibcon#about to read 6, iclass 29, count 0 2006.229.13:58:08.87#ibcon#read 6, iclass 29, count 0 2006.229.13:58:08.87#ibcon#end of sib2, iclass 29, count 0 2006.229.13:58:08.87#ibcon#*after write, iclass 29, count 0 2006.229.13:58:08.87#ibcon#*before return 0, iclass 29, count 0 2006.229.13:58:08.87#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:58:08.87#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.13:58:08.87#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:58:08.87#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:58:08.87$vck44/vblo=1,629.99 2006.229.13:58:08.87#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.13:58:08.87#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.13:58:08.87#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:08.87#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:08.87#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:08.87#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:08.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.13:58:08.87#ibcon#first serial, iclass 31, count 0 2006.229.13:58:08.87#ibcon#enter sib2, iclass 31, count 0 2006.229.13:58:08.87#ibcon#flushed, iclass 31, count 0 2006.229.13:58:08.87#ibcon#about to write, iclass 31, count 0 2006.229.13:58:08.87#ibcon#wrote, iclass 31, count 0 2006.229.13:58:08.87#ibcon#about to read 3, iclass 31, count 0 2006.229.13:58:08.89#ibcon#read 3, iclass 31, count 0 2006.229.13:58:08.89#ibcon#about to read 4, iclass 31, count 0 2006.229.13:58:08.89#ibcon#read 4, iclass 31, count 0 2006.229.13:58:08.89#ibcon#about to read 5, iclass 31, count 0 2006.229.13:58:08.89#ibcon#read 5, iclass 31, count 0 2006.229.13:58:08.89#ibcon#about to read 6, iclass 31, count 0 2006.229.13:58:08.89#ibcon#read 6, iclass 31, count 0 2006.229.13:58:08.89#ibcon#end of sib2, iclass 31, count 0 2006.229.13:58:08.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.13:58:08.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.13:58:08.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.13:58:08.89#ibcon#*before write, iclass 31, count 0 2006.229.13:58:08.89#ibcon#enter sib2, iclass 31, count 0 2006.229.13:58:08.89#ibcon#flushed, iclass 31, count 0 2006.229.13:58:08.89#ibcon#about to write, iclass 31, count 0 2006.229.13:58:08.89#ibcon#wrote, iclass 31, count 0 2006.229.13:58:08.89#ibcon#about to read 3, iclass 31, count 0 2006.229.13:58:08.93#ibcon#read 3, iclass 31, count 0 2006.229.13:58:08.93#ibcon#about to read 4, iclass 31, count 0 2006.229.13:58:08.93#ibcon#read 4, iclass 31, count 0 2006.229.13:58:08.93#ibcon#about to read 5, iclass 31, count 0 2006.229.13:58:08.93#ibcon#read 5, iclass 31, count 0 2006.229.13:58:08.93#ibcon#about to read 6, iclass 31, count 0 2006.229.13:58:08.93#ibcon#read 6, iclass 31, count 0 2006.229.13:58:08.93#ibcon#end of sib2, iclass 31, count 0 2006.229.13:58:08.93#ibcon#*after write, iclass 31, count 0 2006.229.13:58:08.93#ibcon#*before return 0, iclass 31, count 0 2006.229.13:58:08.93#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:08.93#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.13:58:08.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.13:58:08.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.13:58:08.93$vck44/vb=1,4 2006.229.13:58:08.93#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.13:58:08.93#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.13:58:08.93#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:08.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:08.93#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:08.93#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:08.93#ibcon#enter wrdev, iclass 33, count 2 2006.229.13:58:08.93#ibcon#first serial, iclass 33, count 2 2006.229.13:58:08.93#ibcon#enter sib2, iclass 33, count 2 2006.229.13:58:08.93#ibcon#flushed, iclass 33, count 2 2006.229.13:58:08.93#ibcon#about to write, iclass 33, count 2 2006.229.13:58:08.93#ibcon#wrote, iclass 33, count 2 2006.229.13:58:08.93#ibcon#about to read 3, iclass 33, count 2 2006.229.13:58:08.95#ibcon#read 3, iclass 33, count 2 2006.229.13:58:08.95#ibcon#about to read 4, iclass 33, count 2 2006.229.13:58:08.95#ibcon#read 4, iclass 33, count 2 2006.229.13:58:08.95#ibcon#about to read 5, iclass 33, count 2 2006.229.13:58:08.95#ibcon#read 5, iclass 33, count 2 2006.229.13:58:08.95#ibcon#about to read 6, iclass 33, count 2 2006.229.13:58:08.95#ibcon#read 6, iclass 33, count 2 2006.229.13:58:08.95#ibcon#end of sib2, iclass 33, count 2 2006.229.13:58:08.95#ibcon#*mode == 0, iclass 33, count 2 2006.229.13:58:08.95#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.13:58:08.95#ibcon#[27=AT01-04\r\n] 2006.229.13:58:08.95#ibcon#*before write, iclass 33, count 2 2006.229.13:58:08.95#ibcon#enter sib2, iclass 33, count 2 2006.229.13:58:08.95#ibcon#flushed, iclass 33, count 2 2006.229.13:58:08.95#ibcon#about to write, iclass 33, count 2 2006.229.13:58:08.95#ibcon#wrote, iclass 33, count 2 2006.229.13:58:08.95#ibcon#about to read 3, iclass 33, count 2 2006.229.13:58:08.98#ibcon#read 3, iclass 33, count 2 2006.229.13:58:08.98#ibcon#about to read 4, iclass 33, count 2 2006.229.13:58:08.98#ibcon#read 4, iclass 33, count 2 2006.229.13:58:08.98#ibcon#about to read 5, iclass 33, count 2 2006.229.13:58:08.98#ibcon#read 5, iclass 33, count 2 2006.229.13:58:08.98#ibcon#about to read 6, iclass 33, count 2 2006.229.13:58:08.98#ibcon#read 6, iclass 33, count 2 2006.229.13:58:08.98#ibcon#end of sib2, iclass 33, count 2 2006.229.13:58:08.98#ibcon#*after write, iclass 33, count 2 2006.229.13:58:08.98#ibcon#*before return 0, iclass 33, count 2 2006.229.13:58:08.98#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:08.98#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.13:58:08.98#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.13:58:08.98#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:08.98#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:09.10#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:09.10#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:09.10#ibcon#enter wrdev, iclass 33, count 0 2006.229.13:58:09.10#ibcon#first serial, iclass 33, count 0 2006.229.13:58:09.10#ibcon#enter sib2, iclass 33, count 0 2006.229.13:58:09.10#ibcon#flushed, iclass 33, count 0 2006.229.13:58:09.10#ibcon#about to write, iclass 33, count 0 2006.229.13:58:09.10#ibcon#wrote, iclass 33, count 0 2006.229.13:58:09.10#ibcon#about to read 3, iclass 33, count 0 2006.229.13:58:09.12#ibcon#read 3, iclass 33, count 0 2006.229.13:58:09.12#ibcon#about to read 4, iclass 33, count 0 2006.229.13:58:09.12#ibcon#read 4, iclass 33, count 0 2006.229.13:58:09.12#ibcon#about to read 5, iclass 33, count 0 2006.229.13:58:09.12#ibcon#read 5, iclass 33, count 0 2006.229.13:58:09.12#ibcon#about to read 6, iclass 33, count 0 2006.229.13:58:09.12#ibcon#read 6, iclass 33, count 0 2006.229.13:58:09.12#ibcon#end of sib2, iclass 33, count 0 2006.229.13:58:09.12#ibcon#*mode == 0, iclass 33, count 0 2006.229.13:58:09.12#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.13:58:09.12#ibcon#[27=USB\r\n] 2006.229.13:58:09.12#ibcon#*before write, iclass 33, count 0 2006.229.13:58:09.12#ibcon#enter sib2, iclass 33, count 0 2006.229.13:58:09.12#ibcon#flushed, iclass 33, count 0 2006.229.13:58:09.12#ibcon#about to write, iclass 33, count 0 2006.229.13:58:09.12#ibcon#wrote, iclass 33, count 0 2006.229.13:58:09.12#ibcon#about to read 3, iclass 33, count 0 2006.229.13:58:09.15#ibcon#read 3, iclass 33, count 0 2006.229.13:58:09.15#ibcon#about to read 4, iclass 33, count 0 2006.229.13:58:09.15#ibcon#read 4, iclass 33, count 0 2006.229.13:58:09.15#ibcon#about to read 5, iclass 33, count 0 2006.229.13:58:09.15#ibcon#read 5, iclass 33, count 0 2006.229.13:58:09.15#ibcon#about to read 6, iclass 33, count 0 2006.229.13:58:09.15#ibcon#read 6, iclass 33, count 0 2006.229.13:58:09.15#ibcon#end of sib2, iclass 33, count 0 2006.229.13:58:09.15#ibcon#*after write, iclass 33, count 0 2006.229.13:58:09.15#ibcon#*before return 0, iclass 33, count 0 2006.229.13:58:09.15#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:09.15#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.13:58:09.15#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.13:58:09.15#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.13:58:09.15$vck44/vblo=2,634.99 2006.229.13:58:09.15#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.13:58:09.15#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.13:58:09.15#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:09.15#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:09.15#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:09.15#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:09.15#ibcon#enter wrdev, iclass 35, count 0 2006.229.13:58:09.15#ibcon#first serial, iclass 35, count 0 2006.229.13:58:09.15#ibcon#enter sib2, iclass 35, count 0 2006.229.13:58:09.15#ibcon#flushed, iclass 35, count 0 2006.229.13:58:09.15#ibcon#about to write, iclass 35, count 0 2006.229.13:58:09.15#ibcon#wrote, iclass 35, count 0 2006.229.13:58:09.15#ibcon#about to read 3, iclass 35, count 0 2006.229.13:58:09.17#ibcon#read 3, iclass 35, count 0 2006.229.13:58:09.17#ibcon#about to read 4, iclass 35, count 0 2006.229.13:58:09.17#ibcon#read 4, iclass 35, count 0 2006.229.13:58:09.17#ibcon#about to read 5, iclass 35, count 0 2006.229.13:58:09.17#ibcon#read 5, iclass 35, count 0 2006.229.13:58:09.17#ibcon#about to read 6, iclass 35, count 0 2006.229.13:58:09.17#ibcon#read 6, iclass 35, count 0 2006.229.13:58:09.17#ibcon#end of sib2, iclass 35, count 0 2006.229.13:58:09.17#ibcon#*mode == 0, iclass 35, count 0 2006.229.13:58:09.17#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.13:58:09.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.13:58:09.17#ibcon#*before write, iclass 35, count 0 2006.229.13:58:09.17#ibcon#enter sib2, iclass 35, count 0 2006.229.13:58:09.17#ibcon#flushed, iclass 35, count 0 2006.229.13:58:09.17#ibcon#about to write, iclass 35, count 0 2006.229.13:58:09.17#ibcon#wrote, iclass 35, count 0 2006.229.13:58:09.17#ibcon#about to read 3, iclass 35, count 0 2006.229.13:58:09.21#ibcon#read 3, iclass 35, count 0 2006.229.13:58:09.21#ibcon#about to read 4, iclass 35, count 0 2006.229.13:58:09.21#ibcon#read 4, iclass 35, count 0 2006.229.13:58:09.21#ibcon#about to read 5, iclass 35, count 0 2006.229.13:58:09.21#ibcon#read 5, iclass 35, count 0 2006.229.13:58:09.21#ibcon#about to read 6, iclass 35, count 0 2006.229.13:58:09.21#ibcon#read 6, iclass 35, count 0 2006.229.13:58:09.21#ibcon#end of sib2, iclass 35, count 0 2006.229.13:58:09.21#ibcon#*after write, iclass 35, count 0 2006.229.13:58:09.21#ibcon#*before return 0, iclass 35, count 0 2006.229.13:58:09.21#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:09.21#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.13:58:09.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.13:58:09.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.13:58:09.21$vck44/vb=2,4 2006.229.13:58:09.21#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.13:58:09.21#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.13:58:09.21#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:09.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:09.27#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:09.27#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:09.27#ibcon#enter wrdev, iclass 37, count 2 2006.229.13:58:09.27#ibcon#first serial, iclass 37, count 2 2006.229.13:58:09.27#ibcon#enter sib2, iclass 37, count 2 2006.229.13:58:09.27#ibcon#flushed, iclass 37, count 2 2006.229.13:58:09.27#ibcon#about to write, iclass 37, count 2 2006.229.13:58:09.27#ibcon#wrote, iclass 37, count 2 2006.229.13:58:09.27#ibcon#about to read 3, iclass 37, count 2 2006.229.13:58:09.29#ibcon#read 3, iclass 37, count 2 2006.229.13:58:09.29#ibcon#about to read 4, iclass 37, count 2 2006.229.13:58:09.29#ibcon#read 4, iclass 37, count 2 2006.229.13:58:09.29#ibcon#about to read 5, iclass 37, count 2 2006.229.13:58:09.29#ibcon#read 5, iclass 37, count 2 2006.229.13:58:09.29#ibcon#about to read 6, iclass 37, count 2 2006.229.13:58:09.29#ibcon#read 6, iclass 37, count 2 2006.229.13:58:09.29#ibcon#end of sib2, iclass 37, count 2 2006.229.13:58:09.29#ibcon#*mode == 0, iclass 37, count 2 2006.229.13:58:09.29#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.13:58:09.29#ibcon#[27=AT02-04\r\n] 2006.229.13:58:09.29#ibcon#*before write, iclass 37, count 2 2006.229.13:58:09.29#ibcon#enter sib2, iclass 37, count 2 2006.229.13:58:09.29#ibcon#flushed, iclass 37, count 2 2006.229.13:58:09.29#ibcon#about to write, iclass 37, count 2 2006.229.13:58:09.29#ibcon#wrote, iclass 37, count 2 2006.229.13:58:09.29#ibcon#about to read 3, iclass 37, count 2 2006.229.13:58:09.32#ibcon#read 3, iclass 37, count 2 2006.229.13:58:09.32#ibcon#about to read 4, iclass 37, count 2 2006.229.13:58:09.32#ibcon#read 4, iclass 37, count 2 2006.229.13:58:09.32#ibcon#about to read 5, iclass 37, count 2 2006.229.13:58:09.32#ibcon#read 5, iclass 37, count 2 2006.229.13:58:09.32#ibcon#about to read 6, iclass 37, count 2 2006.229.13:58:09.32#ibcon#read 6, iclass 37, count 2 2006.229.13:58:09.32#ibcon#end of sib2, iclass 37, count 2 2006.229.13:58:09.32#ibcon#*after write, iclass 37, count 2 2006.229.13:58:09.32#ibcon#*before return 0, iclass 37, count 2 2006.229.13:58:09.32#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:09.32#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.13:58:09.32#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.13:58:09.32#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:09.32#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:09.44#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:09.44#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:09.44#ibcon#enter wrdev, iclass 37, count 0 2006.229.13:58:09.44#ibcon#first serial, iclass 37, count 0 2006.229.13:58:09.44#ibcon#enter sib2, iclass 37, count 0 2006.229.13:58:09.44#ibcon#flushed, iclass 37, count 0 2006.229.13:58:09.44#ibcon#about to write, iclass 37, count 0 2006.229.13:58:09.44#ibcon#wrote, iclass 37, count 0 2006.229.13:58:09.44#ibcon#about to read 3, iclass 37, count 0 2006.229.13:58:09.46#ibcon#read 3, iclass 37, count 0 2006.229.13:58:09.46#ibcon#about to read 4, iclass 37, count 0 2006.229.13:58:09.46#ibcon#read 4, iclass 37, count 0 2006.229.13:58:09.46#ibcon#about to read 5, iclass 37, count 0 2006.229.13:58:09.46#ibcon#read 5, iclass 37, count 0 2006.229.13:58:09.46#ibcon#about to read 6, iclass 37, count 0 2006.229.13:58:09.46#ibcon#read 6, iclass 37, count 0 2006.229.13:58:09.46#ibcon#end of sib2, iclass 37, count 0 2006.229.13:58:09.46#ibcon#*mode == 0, iclass 37, count 0 2006.229.13:58:09.46#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.13:58:09.46#ibcon#[27=USB\r\n] 2006.229.13:58:09.46#ibcon#*before write, iclass 37, count 0 2006.229.13:58:09.46#ibcon#enter sib2, iclass 37, count 0 2006.229.13:58:09.46#ibcon#flushed, iclass 37, count 0 2006.229.13:58:09.46#ibcon#about to write, iclass 37, count 0 2006.229.13:58:09.46#ibcon#wrote, iclass 37, count 0 2006.229.13:58:09.46#ibcon#about to read 3, iclass 37, count 0 2006.229.13:58:09.49#ibcon#read 3, iclass 37, count 0 2006.229.13:58:09.49#ibcon#about to read 4, iclass 37, count 0 2006.229.13:58:09.49#ibcon#read 4, iclass 37, count 0 2006.229.13:58:09.49#ibcon#about to read 5, iclass 37, count 0 2006.229.13:58:09.49#ibcon#read 5, iclass 37, count 0 2006.229.13:58:09.49#ibcon#about to read 6, iclass 37, count 0 2006.229.13:58:09.49#ibcon#read 6, iclass 37, count 0 2006.229.13:58:09.49#ibcon#end of sib2, iclass 37, count 0 2006.229.13:58:09.49#ibcon#*after write, iclass 37, count 0 2006.229.13:58:09.49#ibcon#*before return 0, iclass 37, count 0 2006.229.13:58:09.49#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:09.49#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.13:58:09.49#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.13:58:09.49#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.13:58:09.49$vck44/vblo=3,649.99 2006.229.13:58:09.49#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.13:58:09.49#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.13:58:09.49#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:09.49#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:09.49#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:09.49#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:09.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.13:58:09.49#ibcon#first serial, iclass 39, count 0 2006.229.13:58:09.49#ibcon#enter sib2, iclass 39, count 0 2006.229.13:58:09.49#ibcon#flushed, iclass 39, count 0 2006.229.13:58:09.49#ibcon#about to write, iclass 39, count 0 2006.229.13:58:09.49#ibcon#wrote, iclass 39, count 0 2006.229.13:58:09.49#ibcon#about to read 3, iclass 39, count 0 2006.229.13:58:09.51#ibcon#read 3, iclass 39, count 0 2006.229.13:58:09.51#ibcon#about to read 4, iclass 39, count 0 2006.229.13:58:09.51#ibcon#read 4, iclass 39, count 0 2006.229.13:58:09.51#ibcon#about to read 5, iclass 39, count 0 2006.229.13:58:09.51#ibcon#read 5, iclass 39, count 0 2006.229.13:58:09.51#ibcon#about to read 6, iclass 39, count 0 2006.229.13:58:09.51#ibcon#read 6, iclass 39, count 0 2006.229.13:58:09.51#ibcon#end of sib2, iclass 39, count 0 2006.229.13:58:09.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.13:58:09.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.13:58:09.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.13:58:09.51#ibcon#*before write, iclass 39, count 0 2006.229.13:58:09.51#ibcon#enter sib2, iclass 39, count 0 2006.229.13:58:09.51#ibcon#flushed, iclass 39, count 0 2006.229.13:58:09.51#ibcon#about to write, iclass 39, count 0 2006.229.13:58:09.51#ibcon#wrote, iclass 39, count 0 2006.229.13:58:09.51#ibcon#about to read 3, iclass 39, count 0 2006.229.13:58:09.55#ibcon#read 3, iclass 39, count 0 2006.229.13:58:09.55#ibcon#about to read 4, iclass 39, count 0 2006.229.13:58:09.55#ibcon#read 4, iclass 39, count 0 2006.229.13:58:09.55#ibcon#about to read 5, iclass 39, count 0 2006.229.13:58:09.55#ibcon#read 5, iclass 39, count 0 2006.229.13:58:09.55#ibcon#about to read 6, iclass 39, count 0 2006.229.13:58:09.55#ibcon#read 6, iclass 39, count 0 2006.229.13:58:09.55#ibcon#end of sib2, iclass 39, count 0 2006.229.13:58:09.55#ibcon#*after write, iclass 39, count 0 2006.229.13:58:09.55#ibcon#*before return 0, iclass 39, count 0 2006.229.13:58:09.55#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:09.55#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.13:58:09.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.13:58:09.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.13:58:09.55$vck44/vb=3,4 2006.229.13:58:09.55#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.13:58:09.55#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.13:58:09.55#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:09.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:09.61#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:09.61#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:09.61#ibcon#enter wrdev, iclass 3, count 2 2006.229.13:58:09.61#ibcon#first serial, iclass 3, count 2 2006.229.13:58:09.61#ibcon#enter sib2, iclass 3, count 2 2006.229.13:58:09.61#ibcon#flushed, iclass 3, count 2 2006.229.13:58:09.61#ibcon#about to write, iclass 3, count 2 2006.229.13:58:09.61#ibcon#wrote, iclass 3, count 2 2006.229.13:58:09.61#ibcon#about to read 3, iclass 3, count 2 2006.229.13:58:09.63#ibcon#read 3, iclass 3, count 2 2006.229.13:58:09.63#ibcon#about to read 4, iclass 3, count 2 2006.229.13:58:09.63#ibcon#read 4, iclass 3, count 2 2006.229.13:58:09.63#ibcon#about to read 5, iclass 3, count 2 2006.229.13:58:09.63#ibcon#read 5, iclass 3, count 2 2006.229.13:58:09.63#ibcon#about to read 6, iclass 3, count 2 2006.229.13:58:09.63#ibcon#read 6, iclass 3, count 2 2006.229.13:58:09.63#ibcon#end of sib2, iclass 3, count 2 2006.229.13:58:09.63#ibcon#*mode == 0, iclass 3, count 2 2006.229.13:58:09.63#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.13:58:09.63#ibcon#[27=AT03-04\r\n] 2006.229.13:58:09.63#ibcon#*before write, iclass 3, count 2 2006.229.13:58:09.63#ibcon#enter sib2, iclass 3, count 2 2006.229.13:58:09.63#ibcon#flushed, iclass 3, count 2 2006.229.13:58:09.63#ibcon#about to write, iclass 3, count 2 2006.229.13:58:09.63#ibcon#wrote, iclass 3, count 2 2006.229.13:58:09.63#ibcon#about to read 3, iclass 3, count 2 2006.229.13:58:09.66#ibcon#read 3, iclass 3, count 2 2006.229.13:58:09.66#ibcon#about to read 4, iclass 3, count 2 2006.229.13:58:09.66#ibcon#read 4, iclass 3, count 2 2006.229.13:58:09.66#ibcon#about to read 5, iclass 3, count 2 2006.229.13:58:09.66#ibcon#read 5, iclass 3, count 2 2006.229.13:58:09.66#ibcon#about to read 6, iclass 3, count 2 2006.229.13:58:09.66#ibcon#read 6, iclass 3, count 2 2006.229.13:58:09.66#ibcon#end of sib2, iclass 3, count 2 2006.229.13:58:09.66#ibcon#*after write, iclass 3, count 2 2006.229.13:58:09.66#ibcon#*before return 0, iclass 3, count 2 2006.229.13:58:09.66#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:09.66#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.13:58:09.66#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.13:58:09.66#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:09.66#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:09.78#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:09.78#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:09.78#ibcon#enter wrdev, iclass 3, count 0 2006.229.13:58:09.78#ibcon#first serial, iclass 3, count 0 2006.229.13:58:09.78#ibcon#enter sib2, iclass 3, count 0 2006.229.13:58:09.78#ibcon#flushed, iclass 3, count 0 2006.229.13:58:09.78#ibcon#about to write, iclass 3, count 0 2006.229.13:58:09.78#ibcon#wrote, iclass 3, count 0 2006.229.13:58:09.78#ibcon#about to read 3, iclass 3, count 0 2006.229.13:58:09.80#ibcon#read 3, iclass 3, count 0 2006.229.13:58:09.80#ibcon#about to read 4, iclass 3, count 0 2006.229.13:58:09.80#ibcon#read 4, iclass 3, count 0 2006.229.13:58:09.80#ibcon#about to read 5, iclass 3, count 0 2006.229.13:58:09.80#ibcon#read 5, iclass 3, count 0 2006.229.13:58:09.80#ibcon#about to read 6, iclass 3, count 0 2006.229.13:58:09.80#ibcon#read 6, iclass 3, count 0 2006.229.13:58:09.80#ibcon#end of sib2, iclass 3, count 0 2006.229.13:58:09.80#ibcon#*mode == 0, iclass 3, count 0 2006.229.13:58:09.80#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.13:58:09.80#ibcon#[27=USB\r\n] 2006.229.13:58:09.80#ibcon#*before write, iclass 3, count 0 2006.229.13:58:09.80#ibcon#enter sib2, iclass 3, count 0 2006.229.13:58:09.80#ibcon#flushed, iclass 3, count 0 2006.229.13:58:09.80#ibcon#about to write, iclass 3, count 0 2006.229.13:58:09.80#ibcon#wrote, iclass 3, count 0 2006.229.13:58:09.80#ibcon#about to read 3, iclass 3, count 0 2006.229.13:58:09.83#ibcon#read 3, iclass 3, count 0 2006.229.13:58:09.83#ibcon#about to read 4, iclass 3, count 0 2006.229.13:58:09.83#ibcon#read 4, iclass 3, count 0 2006.229.13:58:09.83#ibcon#about to read 5, iclass 3, count 0 2006.229.13:58:09.83#ibcon#read 5, iclass 3, count 0 2006.229.13:58:09.83#ibcon#about to read 6, iclass 3, count 0 2006.229.13:58:09.83#ibcon#read 6, iclass 3, count 0 2006.229.13:58:09.83#ibcon#end of sib2, iclass 3, count 0 2006.229.13:58:09.83#ibcon#*after write, iclass 3, count 0 2006.229.13:58:09.83#ibcon#*before return 0, iclass 3, count 0 2006.229.13:58:09.83#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:09.83#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.13:58:09.83#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.13:58:09.83#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.13:58:09.83$vck44/vblo=4,679.99 2006.229.13:58:09.83#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.13:58:09.83#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.13:58:09.83#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:09.83#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:09.83#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:09.83#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:09.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.13:58:09.83#ibcon#first serial, iclass 5, count 0 2006.229.13:58:09.83#ibcon#enter sib2, iclass 5, count 0 2006.229.13:58:09.83#ibcon#flushed, iclass 5, count 0 2006.229.13:58:09.83#ibcon#about to write, iclass 5, count 0 2006.229.13:58:09.83#ibcon#wrote, iclass 5, count 0 2006.229.13:58:09.83#ibcon#about to read 3, iclass 5, count 0 2006.229.13:58:09.85#ibcon#read 3, iclass 5, count 0 2006.229.13:58:09.85#ibcon#about to read 4, iclass 5, count 0 2006.229.13:58:09.85#ibcon#read 4, iclass 5, count 0 2006.229.13:58:09.85#ibcon#about to read 5, iclass 5, count 0 2006.229.13:58:09.85#ibcon#read 5, iclass 5, count 0 2006.229.13:58:09.85#ibcon#about to read 6, iclass 5, count 0 2006.229.13:58:09.85#ibcon#read 6, iclass 5, count 0 2006.229.13:58:09.85#ibcon#end of sib2, iclass 5, count 0 2006.229.13:58:09.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.13:58:09.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.13:58:09.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.13:58:09.85#ibcon#*before write, iclass 5, count 0 2006.229.13:58:09.85#ibcon#enter sib2, iclass 5, count 0 2006.229.13:58:09.85#ibcon#flushed, iclass 5, count 0 2006.229.13:58:09.85#ibcon#about to write, iclass 5, count 0 2006.229.13:58:09.85#ibcon#wrote, iclass 5, count 0 2006.229.13:58:09.85#ibcon#about to read 3, iclass 5, count 0 2006.229.13:58:09.89#ibcon#read 3, iclass 5, count 0 2006.229.13:58:09.89#ibcon#about to read 4, iclass 5, count 0 2006.229.13:58:09.89#ibcon#read 4, iclass 5, count 0 2006.229.13:58:09.89#ibcon#about to read 5, iclass 5, count 0 2006.229.13:58:09.89#ibcon#read 5, iclass 5, count 0 2006.229.13:58:09.89#ibcon#about to read 6, iclass 5, count 0 2006.229.13:58:09.89#ibcon#read 6, iclass 5, count 0 2006.229.13:58:09.89#ibcon#end of sib2, iclass 5, count 0 2006.229.13:58:09.89#ibcon#*after write, iclass 5, count 0 2006.229.13:58:10.40#ibcon#*before return 0, iclass 5, count 0 2006.229.13:58:10.40#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:10.40#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.13:58:10.40#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.13:58:10.40#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.13:58:10.40$vck44/vb=4,4 2006.229.13:58:10.40#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.13:58:10.40#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.13:58:10.40#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:10.40#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:10.40#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:10.40#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:10.40#ibcon#enter wrdev, iclass 7, count 2 2006.229.13:58:10.40#ibcon#first serial, iclass 7, count 2 2006.229.13:58:10.40#ibcon#enter sib2, iclass 7, count 2 2006.229.13:58:10.40#ibcon#flushed, iclass 7, count 2 2006.229.13:58:10.40#ibcon#about to write, iclass 7, count 2 2006.229.13:58:10.40#ibcon#wrote, iclass 7, count 2 2006.229.13:58:10.40#ibcon#about to read 3, iclass 7, count 2 2006.229.13:58:10.42#ibcon#read 3, iclass 7, count 2 2006.229.13:58:10.42#ibcon#about to read 4, iclass 7, count 2 2006.229.13:58:10.42#ibcon#read 4, iclass 7, count 2 2006.229.13:58:10.42#ibcon#about to read 5, iclass 7, count 2 2006.229.13:58:10.42#ibcon#read 5, iclass 7, count 2 2006.229.13:58:10.42#ibcon#about to read 6, iclass 7, count 2 2006.229.13:58:10.42#ibcon#read 6, iclass 7, count 2 2006.229.13:58:10.42#ibcon#end of sib2, iclass 7, count 2 2006.229.13:58:10.42#ibcon#*mode == 0, iclass 7, count 2 2006.229.13:58:10.42#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.13:58:10.42#ibcon#[27=AT04-04\r\n] 2006.229.13:58:10.42#ibcon#*before write, iclass 7, count 2 2006.229.13:58:10.42#ibcon#enter sib2, iclass 7, count 2 2006.229.13:58:10.42#ibcon#flushed, iclass 7, count 2 2006.229.13:58:10.42#ibcon#about to write, iclass 7, count 2 2006.229.13:58:10.42#ibcon#wrote, iclass 7, count 2 2006.229.13:58:10.42#ibcon#about to read 3, iclass 7, count 2 2006.229.13:58:10.45#ibcon#read 3, iclass 7, count 2 2006.229.13:58:10.45#ibcon#about to read 4, iclass 7, count 2 2006.229.13:58:10.45#ibcon#read 4, iclass 7, count 2 2006.229.13:58:10.45#ibcon#about to read 5, iclass 7, count 2 2006.229.13:58:10.45#ibcon#read 5, iclass 7, count 2 2006.229.13:58:10.45#ibcon#about to read 6, iclass 7, count 2 2006.229.13:58:10.45#ibcon#read 6, iclass 7, count 2 2006.229.13:58:10.45#ibcon#end of sib2, iclass 7, count 2 2006.229.13:58:10.45#ibcon#*after write, iclass 7, count 2 2006.229.13:58:10.45#ibcon#*before return 0, iclass 7, count 2 2006.229.13:58:10.45#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:10.45#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.13:58:10.45#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.13:58:10.45#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:10.45#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:10.57#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:10.57#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:10.57#ibcon#enter wrdev, iclass 7, count 0 2006.229.13:58:10.57#ibcon#first serial, iclass 7, count 0 2006.229.13:58:10.57#ibcon#enter sib2, iclass 7, count 0 2006.229.13:58:10.57#ibcon#flushed, iclass 7, count 0 2006.229.13:58:10.57#ibcon#about to write, iclass 7, count 0 2006.229.13:58:10.57#ibcon#wrote, iclass 7, count 0 2006.229.13:58:10.57#ibcon#about to read 3, iclass 7, count 0 2006.229.13:58:10.59#ibcon#read 3, iclass 7, count 0 2006.229.13:58:10.59#ibcon#about to read 4, iclass 7, count 0 2006.229.13:58:10.59#ibcon#read 4, iclass 7, count 0 2006.229.13:58:10.59#ibcon#about to read 5, iclass 7, count 0 2006.229.13:58:10.59#ibcon#read 5, iclass 7, count 0 2006.229.13:58:10.59#ibcon#about to read 6, iclass 7, count 0 2006.229.13:58:10.59#ibcon#read 6, iclass 7, count 0 2006.229.13:58:10.59#ibcon#end of sib2, iclass 7, count 0 2006.229.13:58:10.59#ibcon#*mode == 0, iclass 7, count 0 2006.229.13:58:10.59#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.13:58:10.59#ibcon#[27=USB\r\n] 2006.229.13:58:10.59#ibcon#*before write, iclass 7, count 0 2006.229.13:58:10.59#ibcon#enter sib2, iclass 7, count 0 2006.229.13:58:10.59#ibcon#flushed, iclass 7, count 0 2006.229.13:58:10.59#ibcon#about to write, iclass 7, count 0 2006.229.13:58:10.59#ibcon#wrote, iclass 7, count 0 2006.229.13:58:10.59#ibcon#about to read 3, iclass 7, count 0 2006.229.13:58:10.62#ibcon#read 3, iclass 7, count 0 2006.229.13:58:10.62#ibcon#about to read 4, iclass 7, count 0 2006.229.13:58:10.62#ibcon#read 4, iclass 7, count 0 2006.229.13:58:10.62#ibcon#about to read 5, iclass 7, count 0 2006.229.13:58:10.62#ibcon#read 5, iclass 7, count 0 2006.229.13:58:10.62#ibcon#about to read 6, iclass 7, count 0 2006.229.13:58:10.62#ibcon#read 6, iclass 7, count 0 2006.229.13:58:10.62#ibcon#end of sib2, iclass 7, count 0 2006.229.13:58:10.62#ibcon#*after write, iclass 7, count 0 2006.229.13:58:10.62#ibcon#*before return 0, iclass 7, count 0 2006.229.13:58:10.62#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:10.62#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.13:58:10.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.13:58:10.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.13:58:10.62$vck44/vblo=5,709.99 2006.229.13:58:10.62#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.13:58:10.62#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.13:58:10.62#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:10.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:10.62#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:10.62#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:10.62#ibcon#enter wrdev, iclass 11, count 0 2006.229.13:58:10.62#ibcon#first serial, iclass 11, count 0 2006.229.13:58:10.62#ibcon#enter sib2, iclass 11, count 0 2006.229.13:58:10.62#ibcon#flushed, iclass 11, count 0 2006.229.13:58:10.62#ibcon#about to write, iclass 11, count 0 2006.229.13:58:10.62#ibcon#wrote, iclass 11, count 0 2006.229.13:58:10.62#ibcon#about to read 3, iclass 11, count 0 2006.229.13:58:10.64#ibcon#read 3, iclass 11, count 0 2006.229.13:58:10.64#ibcon#about to read 4, iclass 11, count 0 2006.229.13:58:10.64#ibcon#read 4, iclass 11, count 0 2006.229.13:58:10.64#ibcon#about to read 5, iclass 11, count 0 2006.229.13:58:10.64#ibcon#read 5, iclass 11, count 0 2006.229.13:58:10.64#ibcon#about to read 6, iclass 11, count 0 2006.229.13:58:10.64#ibcon#read 6, iclass 11, count 0 2006.229.13:58:10.64#ibcon#end of sib2, iclass 11, count 0 2006.229.13:58:10.64#ibcon#*mode == 0, iclass 11, count 0 2006.229.13:58:10.64#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.13:58:10.64#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.13:58:10.64#ibcon#*before write, iclass 11, count 0 2006.229.13:58:10.64#ibcon#enter sib2, iclass 11, count 0 2006.229.13:58:10.64#ibcon#flushed, iclass 11, count 0 2006.229.13:58:10.64#ibcon#about to write, iclass 11, count 0 2006.229.13:58:10.64#ibcon#wrote, iclass 11, count 0 2006.229.13:58:10.64#ibcon#about to read 3, iclass 11, count 0 2006.229.13:58:10.68#ibcon#read 3, iclass 11, count 0 2006.229.13:58:10.68#ibcon#about to read 4, iclass 11, count 0 2006.229.13:58:10.68#ibcon#read 4, iclass 11, count 0 2006.229.13:58:10.68#ibcon#about to read 5, iclass 11, count 0 2006.229.13:58:10.68#ibcon#read 5, iclass 11, count 0 2006.229.13:58:10.68#ibcon#about to read 6, iclass 11, count 0 2006.229.13:58:10.68#ibcon#read 6, iclass 11, count 0 2006.229.13:58:10.68#ibcon#end of sib2, iclass 11, count 0 2006.229.13:58:10.68#ibcon#*after write, iclass 11, count 0 2006.229.13:58:10.68#ibcon#*before return 0, iclass 11, count 0 2006.229.13:58:10.68#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:10.68#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.13:58:10.68#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.13:58:10.68#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.13:58:10.68$vck44/vb=5,4 2006.229.13:58:10.68#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.13:58:10.68#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.13:58:10.68#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:10.68#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:10.74#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:10.74#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:10.74#ibcon#enter wrdev, iclass 13, count 2 2006.229.13:58:10.74#ibcon#first serial, iclass 13, count 2 2006.229.13:58:10.74#ibcon#enter sib2, iclass 13, count 2 2006.229.13:58:10.74#ibcon#flushed, iclass 13, count 2 2006.229.13:58:10.74#ibcon#about to write, iclass 13, count 2 2006.229.13:58:10.74#ibcon#wrote, iclass 13, count 2 2006.229.13:58:10.74#ibcon#about to read 3, iclass 13, count 2 2006.229.13:58:10.76#ibcon#read 3, iclass 13, count 2 2006.229.13:58:10.76#ibcon#about to read 4, iclass 13, count 2 2006.229.13:58:10.76#ibcon#read 4, iclass 13, count 2 2006.229.13:58:10.76#ibcon#about to read 5, iclass 13, count 2 2006.229.13:58:10.76#ibcon#read 5, iclass 13, count 2 2006.229.13:58:10.76#ibcon#about to read 6, iclass 13, count 2 2006.229.13:58:10.76#ibcon#read 6, iclass 13, count 2 2006.229.13:58:10.76#ibcon#end of sib2, iclass 13, count 2 2006.229.13:58:10.76#ibcon#*mode == 0, iclass 13, count 2 2006.229.13:58:10.76#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.13:58:10.76#ibcon#[27=AT05-04\r\n] 2006.229.13:58:10.76#ibcon#*before write, iclass 13, count 2 2006.229.13:58:10.76#ibcon#enter sib2, iclass 13, count 2 2006.229.13:58:10.76#ibcon#flushed, iclass 13, count 2 2006.229.13:58:10.76#ibcon#about to write, iclass 13, count 2 2006.229.13:58:10.76#ibcon#wrote, iclass 13, count 2 2006.229.13:58:10.76#ibcon#about to read 3, iclass 13, count 2 2006.229.13:58:10.79#ibcon#read 3, iclass 13, count 2 2006.229.13:58:10.79#ibcon#about to read 4, iclass 13, count 2 2006.229.13:58:10.79#ibcon#read 4, iclass 13, count 2 2006.229.13:58:10.79#ibcon#about to read 5, iclass 13, count 2 2006.229.13:58:10.79#ibcon#read 5, iclass 13, count 2 2006.229.13:58:10.79#ibcon#about to read 6, iclass 13, count 2 2006.229.13:58:10.79#ibcon#read 6, iclass 13, count 2 2006.229.13:58:10.79#ibcon#end of sib2, iclass 13, count 2 2006.229.13:58:10.79#ibcon#*after write, iclass 13, count 2 2006.229.13:58:10.79#ibcon#*before return 0, iclass 13, count 2 2006.229.13:58:10.79#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:10.79#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.13:58:10.79#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.13:58:10.79#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:10.79#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:10.91#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:10.91#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:10.91#ibcon#enter wrdev, iclass 13, count 0 2006.229.13:58:10.91#ibcon#first serial, iclass 13, count 0 2006.229.13:58:10.91#ibcon#enter sib2, iclass 13, count 0 2006.229.13:58:10.91#ibcon#flushed, iclass 13, count 0 2006.229.13:58:10.91#ibcon#about to write, iclass 13, count 0 2006.229.13:58:10.91#ibcon#wrote, iclass 13, count 0 2006.229.13:58:10.91#ibcon#about to read 3, iclass 13, count 0 2006.229.13:58:10.93#ibcon#read 3, iclass 13, count 0 2006.229.13:58:10.93#ibcon#about to read 4, iclass 13, count 0 2006.229.13:58:10.93#ibcon#read 4, iclass 13, count 0 2006.229.13:58:10.93#ibcon#about to read 5, iclass 13, count 0 2006.229.13:58:10.93#ibcon#read 5, iclass 13, count 0 2006.229.13:58:10.93#ibcon#about to read 6, iclass 13, count 0 2006.229.13:58:10.93#ibcon#read 6, iclass 13, count 0 2006.229.13:58:10.93#ibcon#end of sib2, iclass 13, count 0 2006.229.13:58:10.93#ibcon#*mode == 0, iclass 13, count 0 2006.229.13:58:10.93#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.13:58:10.93#ibcon#[27=USB\r\n] 2006.229.13:58:10.93#ibcon#*before write, iclass 13, count 0 2006.229.13:58:10.93#ibcon#enter sib2, iclass 13, count 0 2006.229.13:58:10.93#ibcon#flushed, iclass 13, count 0 2006.229.13:58:10.93#ibcon#about to write, iclass 13, count 0 2006.229.13:58:10.93#ibcon#wrote, iclass 13, count 0 2006.229.13:58:10.93#ibcon#about to read 3, iclass 13, count 0 2006.229.13:58:10.96#ibcon#read 3, iclass 13, count 0 2006.229.13:58:10.96#ibcon#about to read 4, iclass 13, count 0 2006.229.13:58:10.96#ibcon#read 4, iclass 13, count 0 2006.229.13:58:10.96#ibcon#about to read 5, iclass 13, count 0 2006.229.13:58:10.96#ibcon#read 5, iclass 13, count 0 2006.229.13:58:10.96#ibcon#about to read 6, iclass 13, count 0 2006.229.13:58:10.96#ibcon#read 6, iclass 13, count 0 2006.229.13:58:10.96#ibcon#end of sib2, iclass 13, count 0 2006.229.13:58:10.96#ibcon#*after write, iclass 13, count 0 2006.229.13:58:10.96#ibcon#*before return 0, iclass 13, count 0 2006.229.13:58:10.96#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:10.96#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.13:58:10.96#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.13:58:10.96#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.13:58:10.96$vck44/vblo=6,719.99 2006.229.13:58:10.96#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.13:58:10.96#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.13:58:10.96#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:10.96#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:58:10.96#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:58:10.96#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:58:10.96#ibcon#enter wrdev, iclass 15, count 0 2006.229.13:58:10.96#ibcon#first serial, iclass 15, count 0 2006.229.13:58:10.96#ibcon#enter sib2, iclass 15, count 0 2006.229.13:58:10.96#ibcon#flushed, iclass 15, count 0 2006.229.13:58:10.96#ibcon#about to write, iclass 15, count 0 2006.229.13:58:10.96#ibcon#wrote, iclass 15, count 0 2006.229.13:58:10.96#ibcon#about to read 3, iclass 15, count 0 2006.229.13:58:10.98#ibcon#read 3, iclass 15, count 0 2006.229.13:58:10.98#ibcon#about to read 4, iclass 15, count 0 2006.229.13:58:10.98#ibcon#read 4, iclass 15, count 0 2006.229.13:58:10.98#ibcon#about to read 5, iclass 15, count 0 2006.229.13:58:10.98#ibcon#read 5, iclass 15, count 0 2006.229.13:58:10.98#ibcon#about to read 6, iclass 15, count 0 2006.229.13:58:10.98#ibcon#read 6, iclass 15, count 0 2006.229.13:58:10.98#ibcon#end of sib2, iclass 15, count 0 2006.229.13:58:10.98#ibcon#*mode == 0, iclass 15, count 0 2006.229.13:58:10.98#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.13:58:10.98#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.13:58:10.98#ibcon#*before write, iclass 15, count 0 2006.229.13:58:10.98#ibcon#enter sib2, iclass 15, count 0 2006.229.13:58:10.98#ibcon#flushed, iclass 15, count 0 2006.229.13:58:10.98#ibcon#about to write, iclass 15, count 0 2006.229.13:58:10.98#ibcon#wrote, iclass 15, count 0 2006.229.13:58:10.98#ibcon#about to read 3, iclass 15, count 0 2006.229.13:58:11.02#ibcon#read 3, iclass 15, count 0 2006.229.13:58:11.02#ibcon#about to read 4, iclass 15, count 0 2006.229.13:58:11.02#ibcon#read 4, iclass 15, count 0 2006.229.13:58:11.02#ibcon#about to read 5, iclass 15, count 0 2006.229.13:58:11.02#ibcon#read 5, iclass 15, count 0 2006.229.13:58:11.02#ibcon#about to read 6, iclass 15, count 0 2006.229.13:58:11.02#ibcon#read 6, iclass 15, count 0 2006.229.13:58:11.02#ibcon#end of sib2, iclass 15, count 0 2006.229.13:58:11.02#ibcon#*after write, iclass 15, count 0 2006.229.13:58:11.02#ibcon#*before return 0, iclass 15, count 0 2006.229.13:58:11.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:58:11.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.13:58:11.02#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.13:58:11.02#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.13:58:11.02$vck44/vb=6,4 2006.229.13:58:11.02#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.13:58:11.02#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.13:58:11.02#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:11.02#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:58:11.08#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:58:11.08#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:58:11.08#ibcon#enter wrdev, iclass 17, count 2 2006.229.13:58:11.08#ibcon#first serial, iclass 17, count 2 2006.229.13:58:11.08#ibcon#enter sib2, iclass 17, count 2 2006.229.13:58:11.08#ibcon#flushed, iclass 17, count 2 2006.229.13:58:11.08#ibcon#about to write, iclass 17, count 2 2006.229.13:58:11.08#ibcon#wrote, iclass 17, count 2 2006.229.13:58:11.08#ibcon#about to read 3, iclass 17, count 2 2006.229.13:58:11.10#ibcon#read 3, iclass 17, count 2 2006.229.13:58:11.10#ibcon#about to read 4, iclass 17, count 2 2006.229.13:58:11.10#ibcon#read 4, iclass 17, count 2 2006.229.13:58:11.10#ibcon#about to read 5, iclass 17, count 2 2006.229.13:58:11.10#ibcon#read 5, iclass 17, count 2 2006.229.13:58:11.10#ibcon#about to read 6, iclass 17, count 2 2006.229.13:58:11.10#ibcon#read 6, iclass 17, count 2 2006.229.13:58:11.10#ibcon#end of sib2, iclass 17, count 2 2006.229.13:58:11.10#ibcon#*mode == 0, iclass 17, count 2 2006.229.13:58:11.10#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.13:58:11.10#ibcon#[27=AT06-04\r\n] 2006.229.13:58:11.10#ibcon#*before write, iclass 17, count 2 2006.229.13:58:11.10#ibcon#enter sib2, iclass 17, count 2 2006.229.13:58:11.10#ibcon#flushed, iclass 17, count 2 2006.229.13:58:11.10#ibcon#about to write, iclass 17, count 2 2006.229.13:58:11.10#ibcon#wrote, iclass 17, count 2 2006.229.13:58:11.10#ibcon#about to read 3, iclass 17, count 2 2006.229.13:58:11.13#ibcon#read 3, iclass 17, count 2 2006.229.13:58:11.13#ibcon#about to read 4, iclass 17, count 2 2006.229.13:58:11.13#ibcon#read 4, iclass 17, count 2 2006.229.13:58:11.13#ibcon#about to read 5, iclass 17, count 2 2006.229.13:58:11.13#ibcon#read 5, iclass 17, count 2 2006.229.13:58:11.13#ibcon#about to read 6, iclass 17, count 2 2006.229.13:58:11.13#ibcon#read 6, iclass 17, count 2 2006.229.13:58:11.13#ibcon#end of sib2, iclass 17, count 2 2006.229.13:58:11.13#ibcon#*after write, iclass 17, count 2 2006.229.13:58:11.13#ibcon#*before return 0, iclass 17, count 2 2006.229.13:58:11.13#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:58:11.13#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.13:58:11.13#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.13:58:11.13#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:11.13#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:58:11.25#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:58:11.25#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:58:11.25#ibcon#enter wrdev, iclass 17, count 0 2006.229.13:58:11.25#ibcon#first serial, iclass 17, count 0 2006.229.13:58:11.25#ibcon#enter sib2, iclass 17, count 0 2006.229.13:58:11.25#ibcon#flushed, iclass 17, count 0 2006.229.13:58:11.25#ibcon#about to write, iclass 17, count 0 2006.229.13:58:11.25#ibcon#wrote, iclass 17, count 0 2006.229.13:58:11.25#ibcon#about to read 3, iclass 17, count 0 2006.229.13:58:11.27#ibcon#read 3, iclass 17, count 0 2006.229.13:58:11.27#ibcon#about to read 4, iclass 17, count 0 2006.229.13:58:11.27#ibcon#read 4, iclass 17, count 0 2006.229.13:58:11.27#ibcon#about to read 5, iclass 17, count 0 2006.229.13:58:11.27#ibcon#read 5, iclass 17, count 0 2006.229.13:58:11.27#ibcon#about to read 6, iclass 17, count 0 2006.229.13:58:11.27#ibcon#read 6, iclass 17, count 0 2006.229.13:58:11.27#ibcon#end of sib2, iclass 17, count 0 2006.229.13:58:11.27#ibcon#*mode == 0, iclass 17, count 0 2006.229.13:58:11.27#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.13:58:11.27#ibcon#[27=USB\r\n] 2006.229.13:58:11.27#ibcon#*before write, iclass 17, count 0 2006.229.13:58:11.27#ibcon#enter sib2, iclass 17, count 0 2006.229.13:58:11.27#ibcon#flushed, iclass 17, count 0 2006.229.13:58:11.27#ibcon#about to write, iclass 17, count 0 2006.229.13:58:11.27#ibcon#wrote, iclass 17, count 0 2006.229.13:58:11.27#ibcon#about to read 3, iclass 17, count 0 2006.229.13:58:11.30#ibcon#read 3, iclass 17, count 0 2006.229.13:58:11.30#ibcon#about to read 4, iclass 17, count 0 2006.229.13:58:11.30#ibcon#read 4, iclass 17, count 0 2006.229.13:58:11.30#ibcon#about to read 5, iclass 17, count 0 2006.229.13:58:11.30#ibcon#read 5, iclass 17, count 0 2006.229.13:58:11.30#ibcon#about to read 6, iclass 17, count 0 2006.229.13:58:11.30#ibcon#read 6, iclass 17, count 0 2006.229.13:58:11.30#ibcon#end of sib2, iclass 17, count 0 2006.229.13:58:11.30#ibcon#*after write, iclass 17, count 0 2006.229.13:58:11.30#ibcon#*before return 0, iclass 17, count 0 2006.229.13:58:11.30#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:58:11.30#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.13:58:11.30#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.13:58:11.30#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.13:58:11.30$vck44/vblo=7,734.99 2006.229.13:58:11.30#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.13:58:11.30#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.13:58:11.30#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:11.30#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:11.30#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:11.30#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:11.30#ibcon#enter wrdev, iclass 19, count 0 2006.229.13:58:11.30#ibcon#first serial, iclass 19, count 0 2006.229.13:58:11.30#ibcon#enter sib2, iclass 19, count 0 2006.229.13:58:11.30#ibcon#flushed, iclass 19, count 0 2006.229.13:58:11.30#ibcon#about to write, iclass 19, count 0 2006.229.13:58:11.30#ibcon#wrote, iclass 19, count 0 2006.229.13:58:11.30#ibcon#about to read 3, iclass 19, count 0 2006.229.13:58:11.32#ibcon#read 3, iclass 19, count 0 2006.229.13:58:11.32#ibcon#about to read 4, iclass 19, count 0 2006.229.13:58:11.32#ibcon#read 4, iclass 19, count 0 2006.229.13:58:11.32#ibcon#about to read 5, iclass 19, count 0 2006.229.13:58:11.32#ibcon#read 5, iclass 19, count 0 2006.229.13:58:11.32#ibcon#about to read 6, iclass 19, count 0 2006.229.13:58:11.32#ibcon#read 6, iclass 19, count 0 2006.229.13:58:11.32#ibcon#end of sib2, iclass 19, count 0 2006.229.13:58:11.32#ibcon#*mode == 0, iclass 19, count 0 2006.229.13:58:11.32#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.13:58:11.32#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.13:58:11.32#ibcon#*before write, iclass 19, count 0 2006.229.13:58:11.32#ibcon#enter sib2, iclass 19, count 0 2006.229.13:58:11.32#ibcon#flushed, iclass 19, count 0 2006.229.13:58:11.32#ibcon#about to write, iclass 19, count 0 2006.229.13:58:11.32#ibcon#wrote, iclass 19, count 0 2006.229.13:58:11.32#ibcon#about to read 3, iclass 19, count 0 2006.229.13:58:11.36#ibcon#read 3, iclass 19, count 0 2006.229.13:58:11.36#ibcon#about to read 4, iclass 19, count 0 2006.229.13:58:11.36#ibcon#read 4, iclass 19, count 0 2006.229.13:58:11.36#ibcon#about to read 5, iclass 19, count 0 2006.229.13:58:11.36#ibcon#read 5, iclass 19, count 0 2006.229.13:58:11.36#ibcon#about to read 6, iclass 19, count 0 2006.229.13:58:11.36#ibcon#read 6, iclass 19, count 0 2006.229.13:58:11.36#ibcon#end of sib2, iclass 19, count 0 2006.229.13:58:11.36#ibcon#*after write, iclass 19, count 0 2006.229.13:58:11.36#ibcon#*before return 0, iclass 19, count 0 2006.229.13:58:11.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:11.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.13:58:11.36#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.13:58:11.36#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.13:58:11.36$vck44/vb=7,4 2006.229.13:58:11.36#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.13:58:11.36#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.13:58:11.36#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:11.36#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:11.42#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:11.42#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:11.42#ibcon#enter wrdev, iclass 21, count 2 2006.229.13:58:11.42#ibcon#first serial, iclass 21, count 2 2006.229.13:58:11.42#ibcon#enter sib2, iclass 21, count 2 2006.229.13:58:11.42#ibcon#flushed, iclass 21, count 2 2006.229.13:58:11.42#ibcon#about to write, iclass 21, count 2 2006.229.13:58:11.42#ibcon#wrote, iclass 21, count 2 2006.229.13:58:11.42#ibcon#about to read 3, iclass 21, count 2 2006.229.13:58:11.44#ibcon#read 3, iclass 21, count 2 2006.229.13:58:11.44#ibcon#about to read 4, iclass 21, count 2 2006.229.13:58:11.44#ibcon#read 4, iclass 21, count 2 2006.229.13:58:11.44#ibcon#about to read 5, iclass 21, count 2 2006.229.13:58:11.44#ibcon#read 5, iclass 21, count 2 2006.229.13:58:11.44#ibcon#about to read 6, iclass 21, count 2 2006.229.13:58:11.44#ibcon#read 6, iclass 21, count 2 2006.229.13:58:11.44#ibcon#end of sib2, iclass 21, count 2 2006.229.13:58:11.44#ibcon#*mode == 0, iclass 21, count 2 2006.229.13:58:11.44#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.13:58:11.44#ibcon#[27=AT07-04\r\n] 2006.229.13:58:11.44#ibcon#*before write, iclass 21, count 2 2006.229.13:58:11.44#ibcon#enter sib2, iclass 21, count 2 2006.229.13:58:11.44#ibcon#flushed, iclass 21, count 2 2006.229.13:58:11.44#ibcon#about to write, iclass 21, count 2 2006.229.13:58:11.44#ibcon#wrote, iclass 21, count 2 2006.229.13:58:11.44#ibcon#about to read 3, iclass 21, count 2 2006.229.13:58:11.47#ibcon#read 3, iclass 21, count 2 2006.229.13:58:11.47#ibcon#about to read 4, iclass 21, count 2 2006.229.13:58:11.47#ibcon#read 4, iclass 21, count 2 2006.229.13:58:11.47#ibcon#about to read 5, iclass 21, count 2 2006.229.13:58:11.47#ibcon#read 5, iclass 21, count 2 2006.229.13:58:11.47#ibcon#about to read 6, iclass 21, count 2 2006.229.13:58:11.47#ibcon#read 6, iclass 21, count 2 2006.229.13:58:11.47#ibcon#end of sib2, iclass 21, count 2 2006.229.13:58:11.47#ibcon#*after write, iclass 21, count 2 2006.229.13:58:11.47#ibcon#*before return 0, iclass 21, count 2 2006.229.13:58:11.47#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:11.47#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.13:58:11.47#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.13:58:11.47#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:11.47#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:11.59#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:11.59#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:11.59#ibcon#enter wrdev, iclass 21, count 0 2006.229.13:58:11.59#ibcon#first serial, iclass 21, count 0 2006.229.13:58:11.59#ibcon#enter sib2, iclass 21, count 0 2006.229.13:58:11.59#ibcon#flushed, iclass 21, count 0 2006.229.13:58:11.59#ibcon#about to write, iclass 21, count 0 2006.229.13:58:11.59#ibcon#wrote, iclass 21, count 0 2006.229.13:58:11.59#ibcon#about to read 3, iclass 21, count 0 2006.229.13:58:11.61#ibcon#read 3, iclass 21, count 0 2006.229.13:58:11.61#ibcon#about to read 4, iclass 21, count 0 2006.229.13:58:11.61#ibcon#read 4, iclass 21, count 0 2006.229.13:58:11.61#ibcon#about to read 5, iclass 21, count 0 2006.229.13:58:11.61#ibcon#read 5, iclass 21, count 0 2006.229.13:58:11.61#ibcon#about to read 6, iclass 21, count 0 2006.229.13:58:11.61#ibcon#read 6, iclass 21, count 0 2006.229.13:58:11.61#ibcon#end of sib2, iclass 21, count 0 2006.229.13:58:11.61#ibcon#*mode == 0, iclass 21, count 0 2006.229.13:58:11.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.13:58:11.61#ibcon#[27=USB\r\n] 2006.229.13:58:11.61#ibcon#*before write, iclass 21, count 0 2006.229.13:58:11.61#ibcon#enter sib2, iclass 21, count 0 2006.229.13:58:11.61#ibcon#flushed, iclass 21, count 0 2006.229.13:58:11.61#ibcon#about to write, iclass 21, count 0 2006.229.13:58:11.61#ibcon#wrote, iclass 21, count 0 2006.229.13:58:11.61#ibcon#about to read 3, iclass 21, count 0 2006.229.13:58:11.64#ibcon#read 3, iclass 21, count 0 2006.229.13:58:11.64#ibcon#about to read 4, iclass 21, count 0 2006.229.13:58:11.64#ibcon#read 4, iclass 21, count 0 2006.229.13:58:11.64#ibcon#about to read 5, iclass 21, count 0 2006.229.13:58:11.64#ibcon#read 5, iclass 21, count 0 2006.229.13:58:11.64#ibcon#about to read 6, iclass 21, count 0 2006.229.13:58:11.64#ibcon#read 6, iclass 21, count 0 2006.229.13:58:11.64#ibcon#end of sib2, iclass 21, count 0 2006.229.13:58:11.64#ibcon#*after write, iclass 21, count 0 2006.229.13:58:11.64#ibcon#*before return 0, iclass 21, count 0 2006.229.13:58:11.64#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:11.64#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.13:58:11.64#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.13:58:11.64#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.13:58:11.64$vck44/vblo=8,744.99 2006.229.13:58:11.64#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.13:58:11.64#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.13:58:11.64#ibcon#ireg 17 cls_cnt 0 2006.229.13:58:11.64#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:11.64#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:11.64#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:11.64#ibcon#enter wrdev, iclass 23, count 0 2006.229.13:58:11.64#ibcon#first serial, iclass 23, count 0 2006.229.13:58:11.64#ibcon#enter sib2, iclass 23, count 0 2006.229.13:58:11.64#ibcon#flushed, iclass 23, count 0 2006.229.13:58:11.64#ibcon#about to write, iclass 23, count 0 2006.229.13:58:11.64#ibcon#wrote, iclass 23, count 0 2006.229.13:58:11.64#ibcon#about to read 3, iclass 23, count 0 2006.229.13:58:11.66#ibcon#read 3, iclass 23, count 0 2006.229.13:58:11.66#ibcon#about to read 4, iclass 23, count 0 2006.229.13:58:11.66#ibcon#read 4, iclass 23, count 0 2006.229.13:58:11.66#ibcon#about to read 5, iclass 23, count 0 2006.229.13:58:11.66#ibcon#read 5, iclass 23, count 0 2006.229.13:58:11.66#ibcon#about to read 6, iclass 23, count 0 2006.229.13:58:11.66#ibcon#read 6, iclass 23, count 0 2006.229.13:58:11.66#ibcon#end of sib2, iclass 23, count 0 2006.229.13:58:11.66#ibcon#*mode == 0, iclass 23, count 0 2006.229.13:58:11.66#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.13:58:11.66#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.13:58:11.66#ibcon#*before write, iclass 23, count 0 2006.229.13:58:11.66#ibcon#enter sib2, iclass 23, count 0 2006.229.13:58:11.66#ibcon#flushed, iclass 23, count 0 2006.229.13:58:11.66#ibcon#about to write, iclass 23, count 0 2006.229.13:58:11.66#ibcon#wrote, iclass 23, count 0 2006.229.13:58:11.66#ibcon#about to read 3, iclass 23, count 0 2006.229.13:58:11.70#ibcon#read 3, iclass 23, count 0 2006.229.13:58:11.70#ibcon#about to read 4, iclass 23, count 0 2006.229.13:58:11.70#ibcon#read 4, iclass 23, count 0 2006.229.13:58:11.70#ibcon#about to read 5, iclass 23, count 0 2006.229.13:58:11.70#ibcon#read 5, iclass 23, count 0 2006.229.13:58:11.70#ibcon#about to read 6, iclass 23, count 0 2006.229.13:58:11.70#ibcon#read 6, iclass 23, count 0 2006.229.13:58:11.70#ibcon#end of sib2, iclass 23, count 0 2006.229.13:58:11.70#ibcon#*after write, iclass 23, count 0 2006.229.13:58:11.70#ibcon#*before return 0, iclass 23, count 0 2006.229.13:58:11.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:11.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.13:58:11.70#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.13:58:11.70#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.13:58:11.70$vck44/vb=8,4 2006.229.13:58:11.70#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.13:58:11.70#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.13:58:11.70#ibcon#ireg 11 cls_cnt 2 2006.229.13:58:11.70#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:11.76#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:11.76#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:11.76#ibcon#enter wrdev, iclass 25, count 2 2006.229.13:58:11.76#ibcon#first serial, iclass 25, count 2 2006.229.13:58:11.76#ibcon#enter sib2, iclass 25, count 2 2006.229.13:58:11.76#ibcon#flushed, iclass 25, count 2 2006.229.13:58:11.76#ibcon#about to write, iclass 25, count 2 2006.229.13:58:11.76#ibcon#wrote, iclass 25, count 2 2006.229.13:58:11.76#ibcon#about to read 3, iclass 25, count 2 2006.229.13:58:11.78#ibcon#read 3, iclass 25, count 2 2006.229.13:58:11.78#ibcon#about to read 4, iclass 25, count 2 2006.229.13:58:11.78#ibcon#read 4, iclass 25, count 2 2006.229.13:58:11.78#ibcon#about to read 5, iclass 25, count 2 2006.229.13:58:11.78#ibcon#read 5, iclass 25, count 2 2006.229.13:58:11.78#ibcon#about to read 6, iclass 25, count 2 2006.229.13:58:11.78#ibcon#read 6, iclass 25, count 2 2006.229.13:58:11.78#ibcon#end of sib2, iclass 25, count 2 2006.229.13:58:11.78#ibcon#*mode == 0, iclass 25, count 2 2006.229.13:58:11.78#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.13:58:11.78#ibcon#[27=AT08-04\r\n] 2006.229.13:58:11.78#ibcon#*before write, iclass 25, count 2 2006.229.13:58:11.78#ibcon#enter sib2, iclass 25, count 2 2006.229.13:58:11.78#ibcon#flushed, iclass 25, count 2 2006.229.13:58:11.78#ibcon#about to write, iclass 25, count 2 2006.229.13:58:11.78#ibcon#wrote, iclass 25, count 2 2006.229.13:58:11.78#ibcon#about to read 3, iclass 25, count 2 2006.229.13:58:11.81#ibcon#read 3, iclass 25, count 2 2006.229.13:58:11.81#ibcon#about to read 4, iclass 25, count 2 2006.229.13:58:11.81#ibcon#read 4, iclass 25, count 2 2006.229.13:58:11.81#ibcon#about to read 5, iclass 25, count 2 2006.229.13:58:11.81#ibcon#read 5, iclass 25, count 2 2006.229.13:58:11.81#ibcon#about to read 6, iclass 25, count 2 2006.229.13:58:11.81#ibcon#read 6, iclass 25, count 2 2006.229.13:58:11.81#ibcon#end of sib2, iclass 25, count 2 2006.229.13:58:11.81#ibcon#*after write, iclass 25, count 2 2006.229.13:58:11.81#ibcon#*before return 0, iclass 25, count 2 2006.229.13:58:11.81#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:11.81#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.13:58:11.81#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.13:58:11.81#ibcon#ireg 7 cls_cnt 0 2006.229.13:58:11.81#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:11.93#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:11.93#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:11.93#ibcon#enter wrdev, iclass 25, count 0 2006.229.13:58:11.93#ibcon#first serial, iclass 25, count 0 2006.229.13:58:11.93#ibcon#enter sib2, iclass 25, count 0 2006.229.13:58:11.93#ibcon#flushed, iclass 25, count 0 2006.229.13:58:11.93#ibcon#about to write, iclass 25, count 0 2006.229.13:58:11.93#ibcon#wrote, iclass 25, count 0 2006.229.13:58:11.93#ibcon#about to read 3, iclass 25, count 0 2006.229.13:58:11.95#ibcon#read 3, iclass 25, count 0 2006.229.13:58:11.95#ibcon#about to read 4, iclass 25, count 0 2006.229.13:58:11.95#ibcon#read 4, iclass 25, count 0 2006.229.13:58:11.95#ibcon#about to read 5, iclass 25, count 0 2006.229.13:58:11.95#ibcon#read 5, iclass 25, count 0 2006.229.13:58:11.95#ibcon#about to read 6, iclass 25, count 0 2006.229.13:58:11.95#ibcon#read 6, iclass 25, count 0 2006.229.13:58:11.95#ibcon#end of sib2, iclass 25, count 0 2006.229.13:58:11.95#ibcon#*mode == 0, iclass 25, count 0 2006.229.13:58:11.95#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.13:58:11.95#ibcon#[27=USB\r\n] 2006.229.13:58:11.95#ibcon#*before write, iclass 25, count 0 2006.229.13:58:11.95#ibcon#enter sib2, iclass 25, count 0 2006.229.13:58:11.95#ibcon#flushed, iclass 25, count 0 2006.229.13:58:11.95#ibcon#about to write, iclass 25, count 0 2006.229.13:58:11.95#ibcon#wrote, iclass 25, count 0 2006.229.13:58:11.95#ibcon#about to read 3, iclass 25, count 0 2006.229.13:58:11.98#ibcon#read 3, iclass 25, count 0 2006.229.13:58:11.98#ibcon#about to read 4, iclass 25, count 0 2006.229.13:58:11.98#ibcon#read 4, iclass 25, count 0 2006.229.13:58:11.98#ibcon#about to read 5, iclass 25, count 0 2006.229.13:58:11.98#ibcon#read 5, iclass 25, count 0 2006.229.13:58:11.98#ibcon#about to read 6, iclass 25, count 0 2006.229.13:58:11.98#ibcon#read 6, iclass 25, count 0 2006.229.13:58:11.98#ibcon#end of sib2, iclass 25, count 0 2006.229.13:58:11.98#ibcon#*after write, iclass 25, count 0 2006.229.13:58:11.98#ibcon#*before return 0, iclass 25, count 0 2006.229.13:58:11.98#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:11.98#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.13:58:11.98#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.13:58:11.98#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.13:58:11.98$vck44/vabw=wide 2006.229.13:58:11.98#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.13:58:11.98#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.13:58:11.98#ibcon#ireg 8 cls_cnt 0 2006.229.13:58:11.98#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:11.98#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:11.98#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:11.98#ibcon#enter wrdev, iclass 27, count 0 2006.229.13:58:11.98#ibcon#first serial, iclass 27, count 0 2006.229.13:58:11.98#ibcon#enter sib2, iclass 27, count 0 2006.229.13:58:11.98#ibcon#flushed, iclass 27, count 0 2006.229.13:58:11.98#ibcon#about to write, iclass 27, count 0 2006.229.13:58:11.98#ibcon#wrote, iclass 27, count 0 2006.229.13:58:11.98#ibcon#about to read 3, iclass 27, count 0 2006.229.13:58:12.00#ibcon#read 3, iclass 27, count 0 2006.229.13:58:12.00#ibcon#about to read 4, iclass 27, count 0 2006.229.13:58:12.00#ibcon#read 4, iclass 27, count 0 2006.229.13:58:12.00#ibcon#about to read 5, iclass 27, count 0 2006.229.13:58:12.00#ibcon#read 5, iclass 27, count 0 2006.229.13:58:12.00#ibcon#about to read 6, iclass 27, count 0 2006.229.13:58:12.00#ibcon#read 6, iclass 27, count 0 2006.229.13:58:12.00#ibcon#end of sib2, iclass 27, count 0 2006.229.13:58:12.00#ibcon#*mode == 0, iclass 27, count 0 2006.229.13:58:12.00#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.13:58:12.00#ibcon#[25=BW32\r\n] 2006.229.13:58:12.00#ibcon#*before write, iclass 27, count 0 2006.229.13:58:12.00#ibcon#enter sib2, iclass 27, count 0 2006.229.13:58:12.00#ibcon#flushed, iclass 27, count 0 2006.229.13:58:12.00#ibcon#about to write, iclass 27, count 0 2006.229.13:58:12.00#ibcon#wrote, iclass 27, count 0 2006.229.13:58:12.00#ibcon#about to read 3, iclass 27, count 0 2006.229.13:58:12.03#ibcon#read 3, iclass 27, count 0 2006.229.13:58:12.03#ibcon#about to read 4, iclass 27, count 0 2006.229.13:58:12.03#ibcon#read 4, iclass 27, count 0 2006.229.13:58:12.03#ibcon#about to read 5, iclass 27, count 0 2006.229.13:58:12.03#ibcon#read 5, iclass 27, count 0 2006.229.13:58:12.03#ibcon#about to read 6, iclass 27, count 0 2006.229.13:58:12.03#ibcon#read 6, iclass 27, count 0 2006.229.13:58:12.03#ibcon#end of sib2, iclass 27, count 0 2006.229.13:58:12.03#ibcon#*after write, iclass 27, count 0 2006.229.13:58:12.03#ibcon#*before return 0, iclass 27, count 0 2006.229.13:58:12.03#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:12.03#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.13:58:12.03#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.13:58:12.03#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.13:58:12.03$vck44/vbbw=wide 2006.229.13:58:12.03#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.13:58:12.03#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.13:58:12.03#ibcon#ireg 8 cls_cnt 0 2006.229.13:58:12.03#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:58:12.10#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:58:12.10#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:58:12.10#ibcon#enter wrdev, iclass 29, count 0 2006.229.13:58:12.10#ibcon#first serial, iclass 29, count 0 2006.229.13:58:12.10#ibcon#enter sib2, iclass 29, count 0 2006.229.13:58:12.10#ibcon#flushed, iclass 29, count 0 2006.229.13:58:12.10#ibcon#about to write, iclass 29, count 0 2006.229.13:58:12.10#ibcon#wrote, iclass 29, count 0 2006.229.13:58:12.10#ibcon#about to read 3, iclass 29, count 0 2006.229.13:58:12.12#ibcon#read 3, iclass 29, count 0 2006.229.13:58:12.12#ibcon#about to read 4, iclass 29, count 0 2006.229.13:58:12.12#ibcon#read 4, iclass 29, count 0 2006.229.13:58:12.12#ibcon#about to read 5, iclass 29, count 0 2006.229.13:58:12.12#ibcon#read 5, iclass 29, count 0 2006.229.13:58:12.12#ibcon#about to read 6, iclass 29, count 0 2006.229.13:58:12.12#ibcon#read 6, iclass 29, count 0 2006.229.13:58:12.12#ibcon#end of sib2, iclass 29, count 0 2006.229.13:58:12.12#ibcon#*mode == 0, iclass 29, count 0 2006.229.13:58:12.12#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.13:58:12.12#ibcon#[27=BW32\r\n] 2006.229.13:58:12.12#ibcon#*before write, iclass 29, count 0 2006.229.13:58:12.12#ibcon#enter sib2, iclass 29, count 0 2006.229.13:58:12.12#ibcon#flushed, iclass 29, count 0 2006.229.13:58:12.12#ibcon#about to write, iclass 29, count 0 2006.229.13:58:12.12#ibcon#wrote, iclass 29, count 0 2006.229.13:58:12.12#ibcon#about to read 3, iclass 29, count 0 2006.229.13:58:12.15#ibcon#read 3, iclass 29, count 0 2006.229.13:58:12.15#ibcon#about to read 4, iclass 29, count 0 2006.229.13:58:12.15#ibcon#read 4, iclass 29, count 0 2006.229.13:58:12.15#ibcon#about to read 5, iclass 29, count 0 2006.229.13:58:12.15#ibcon#read 5, iclass 29, count 0 2006.229.13:58:12.15#ibcon#about to read 6, iclass 29, count 0 2006.229.13:58:12.15#ibcon#read 6, iclass 29, count 0 2006.229.13:58:12.15#ibcon#end of sib2, iclass 29, count 0 2006.229.13:58:12.15#ibcon#*after write, iclass 29, count 0 2006.229.13:58:12.15#ibcon#*before return 0, iclass 29, count 0 2006.229.13:58:12.15#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:58:12.15#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.13:58:12.15#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.13:58:12.15#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.13:58:12.15$setupk4/ifdk4 2006.229.13:58:12.15$ifdk4/lo= 2006.229.13:58:12.15$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.13:58:12.15$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.13:58:12.15$ifdk4/patch= 2006.229.13:58:12.15$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.13:58:12.15$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.13:58:12.15$setupk4/!*+20s 2006.229.13:58:17.88#abcon#<5=/04 1.3 2.2 27.531001002.0\r\n> 2006.229.13:58:17.90#abcon#{5=INTERFACE CLEAR} 2006.229.13:58:17.96#abcon#[5=S1D000X0/0*\r\n] 2006.229.13:58:26.21$setupk4/"tpicd 2006.229.13:58:26.21$setupk4/echo=off 2006.229.13:58:26.21$setupk4/xlog=off 2006.229.13:58:26.21:!2006.229.14:01:22 2006.229.13:59:03.14#trakl#Source acquired 2006.229.13:59:05.14#flagr#flagr/antenna,acquired 2006.229.14:01:22.00:preob 2006.229.14:01:22.13/onsource/TRACKING 2006.229.14:01:22.13:!2006.229.14:01:32 2006.229.14:01:32.00:"tape 2006.229.14:01:32.00:"st=record 2006.229.14:01:32.00:data_valid=on 2006.229.14:01:32.00:midob 2006.229.14:01:32.13/onsource/TRACKING 2006.229.14:01:32.13/wx/27.53,1002.0,100 2006.229.14:01:32.34/cable/+6.4109E-03 2006.229.14:01:33.43/va/01,08,usb,yes,29,31 2006.229.14:01:33.43/va/02,07,usb,yes,31,32 2006.229.14:01:33.43/va/03,06,usb,yes,39,41 2006.229.14:01:33.43/va/04,07,usb,yes,32,34 2006.229.14:01:33.43/va/05,04,usb,yes,29,29 2006.229.14:01:33.43/va/06,04,usb,yes,32,32 2006.229.14:01:33.43/va/07,05,usb,yes,29,29 2006.229.14:01:33.43/va/08,06,usb,yes,21,26 2006.229.14:01:33.66/valo/01,524.99,yes,locked 2006.229.14:01:33.66/valo/02,534.99,yes,locked 2006.229.14:01:33.66/valo/03,564.99,yes,locked 2006.229.14:01:33.66/valo/04,624.99,yes,locked 2006.229.14:01:33.66/valo/05,734.99,yes,locked 2006.229.14:01:33.66/valo/06,814.99,yes,locked 2006.229.14:01:33.66/valo/07,864.99,yes,locked 2006.229.14:01:33.66/valo/08,884.99,yes,locked 2006.229.14:01:34.75/vb/01,04,usb,yes,30,28 2006.229.14:01:34.75/vb/02,04,usb,yes,33,33 2006.229.14:01:34.75/vb/03,04,usb,yes,30,33 2006.229.14:01:34.75/vb/04,04,usb,yes,34,33 2006.229.14:01:34.75/vb/05,04,usb,yes,27,29 2006.229.14:01:34.75/vb/06,04,usb,yes,31,27 2006.229.14:01:34.75/vb/07,04,usb,yes,31,31 2006.229.14:01:34.75/vb/08,04,usb,yes,28,32 2006.229.14:01:34.98/vblo/01,629.99,yes,locked 2006.229.14:01:34.98/vblo/02,634.99,yes,locked 2006.229.14:01:34.98/vblo/03,649.99,yes,locked 2006.229.14:01:34.98/vblo/04,679.99,yes,locked 2006.229.14:01:34.98/vblo/05,709.99,yes,locked 2006.229.14:01:34.98/vblo/06,719.99,yes,locked 2006.229.14:01:34.98/vblo/07,734.99,yes,locked 2006.229.14:01:34.98/vblo/08,744.99,yes,locked 2006.229.14:01:35.13/vabw/8 2006.229.14:01:35.28/vbbw/8 2006.229.14:01:35.37/xfe/off,on,12.2 2006.229.14:01:35.75/ifatt/23,28,28,28 2006.229.14:01:36.08/fmout-gps/S +4.61E-07 2006.229.14:01:36.12:!2006.229.14:04:22 2006.229.14:04:22.00:data_valid=off 2006.229.14:04:22.00:"et 2006.229.14:04:22.00:!+3s 2006.229.14:04:25.01:"tape 2006.229.14:04:25.01:postob 2006.229.14:04:25.14/cable/+6.4120E-03 2006.229.14:04:25.14/wx/27.52,1002.1,100 2006.229.14:04:26.08/fmout-gps/S +4.60E-07 2006.229.14:04:26.08:scan_name=229-1411,jd0608,150 2006.229.14:04:26.08:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.14:04:27.14#flagr#flagr/antenna,new-source 2006.229.14:04:27.14:checkk5 2006.229.14:04:27.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:04:27.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:04:28.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:04:28.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:04:29.14/chk_obsdata//k5ts1/T2291401??a.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.14:04:29.53/chk_obsdata//k5ts2/T2291401??b.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.14:04:29.94/chk_obsdata//k5ts3/T2291401??c.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.14:04:30.34/chk_obsdata//k5ts4/T2291401??d.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.14:04:31.07/k5log//k5ts1_log_newline 2006.229.14:04:31.79/k5log//k5ts2_log_newline 2006.229.14:04:32.50/k5log//k5ts3_log_newline 2006.229.14:04:33.21/k5log//k5ts4_log_newline 2006.229.14:04:33.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:04:33.23:setupk4=1 2006.229.14:04:33.23$setupk4/echo=on 2006.229.14:04:33.23$setupk4/pcalon 2006.229.14:04:33.23$pcalon/"no phase cal control is implemented here 2006.229.14:04:33.23$setupk4/"tpicd=stop 2006.229.14:04:33.23$setupk4/"rec=synch_on 2006.229.14:04:33.23$setupk4/"rec_mode=128 2006.229.14:04:33.23$setupk4/!* 2006.229.14:04:33.23$setupk4/recpk4 2006.229.14:04:33.23$recpk4/recpatch= 2006.229.14:04:33.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:04:33.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:04:33.24$setupk4/vck44 2006.229.14:04:33.24$vck44/valo=1,524.99 2006.229.14:04:33.24#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.14:04:33.24#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.14:04:33.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:33.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:33.24#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:33.24#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:33.24#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:04:33.24#ibcon#first serial, iclass 38, count 0 2006.229.14:04:33.24#ibcon#enter sib2, iclass 38, count 0 2006.229.14:04:33.24#ibcon#flushed, iclass 38, count 0 2006.229.14:04:33.24#ibcon#about to write, iclass 38, count 0 2006.229.14:04:33.24#ibcon#wrote, iclass 38, count 0 2006.229.14:04:33.24#ibcon#about to read 3, iclass 38, count 0 2006.229.14:04:33.26#ibcon#read 3, iclass 38, count 0 2006.229.14:04:33.26#ibcon#about to read 4, iclass 38, count 0 2006.229.14:04:33.26#ibcon#read 4, iclass 38, count 0 2006.229.14:04:33.26#ibcon#about to read 5, iclass 38, count 0 2006.229.14:04:33.26#ibcon#read 5, iclass 38, count 0 2006.229.14:04:33.26#ibcon#about to read 6, iclass 38, count 0 2006.229.14:04:33.26#ibcon#read 6, iclass 38, count 0 2006.229.14:04:33.26#ibcon#end of sib2, iclass 38, count 0 2006.229.14:04:33.26#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:04:33.26#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:04:33.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:04:33.26#ibcon#*before write, iclass 38, count 0 2006.229.14:04:33.26#ibcon#enter sib2, iclass 38, count 0 2006.229.14:04:33.26#ibcon#flushed, iclass 38, count 0 2006.229.14:04:33.26#ibcon#about to write, iclass 38, count 0 2006.229.14:04:33.26#ibcon#wrote, iclass 38, count 0 2006.229.14:04:33.26#ibcon#about to read 3, iclass 38, count 0 2006.229.14:04:33.31#ibcon#read 3, iclass 38, count 0 2006.229.14:04:33.31#ibcon#about to read 4, iclass 38, count 0 2006.229.14:04:33.31#ibcon#read 4, iclass 38, count 0 2006.229.14:04:33.31#ibcon#about to read 5, iclass 38, count 0 2006.229.14:04:33.31#ibcon#read 5, iclass 38, count 0 2006.229.14:04:33.31#ibcon#about to read 6, iclass 38, count 0 2006.229.14:04:33.31#ibcon#read 6, iclass 38, count 0 2006.229.14:04:33.31#ibcon#end of sib2, iclass 38, count 0 2006.229.14:04:33.31#ibcon#*after write, iclass 38, count 0 2006.229.14:04:33.31#ibcon#*before return 0, iclass 38, count 0 2006.229.14:04:33.31#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:33.31#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:33.31#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:04:33.31#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:04:33.31$vck44/va=1,8 2006.229.14:04:33.31#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.14:04:33.31#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.14:04:33.31#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:33.31#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:33.31#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:33.31#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:33.31#ibcon#enter wrdev, iclass 40, count 2 2006.229.14:04:33.31#ibcon#first serial, iclass 40, count 2 2006.229.14:04:33.31#ibcon#enter sib2, iclass 40, count 2 2006.229.14:04:33.31#ibcon#flushed, iclass 40, count 2 2006.229.14:04:33.31#ibcon#about to write, iclass 40, count 2 2006.229.14:04:33.31#ibcon#wrote, iclass 40, count 2 2006.229.14:04:33.31#ibcon#about to read 3, iclass 40, count 2 2006.229.14:04:33.33#ibcon#read 3, iclass 40, count 2 2006.229.14:04:33.33#ibcon#about to read 4, iclass 40, count 2 2006.229.14:04:33.33#ibcon#read 4, iclass 40, count 2 2006.229.14:04:33.33#ibcon#about to read 5, iclass 40, count 2 2006.229.14:04:33.33#ibcon#read 5, iclass 40, count 2 2006.229.14:04:33.33#ibcon#about to read 6, iclass 40, count 2 2006.229.14:04:33.33#ibcon#read 6, iclass 40, count 2 2006.229.14:04:33.33#ibcon#end of sib2, iclass 40, count 2 2006.229.14:04:33.33#ibcon#*mode == 0, iclass 40, count 2 2006.229.14:04:33.33#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.14:04:33.33#ibcon#[25=AT01-08\r\n] 2006.229.14:04:33.33#ibcon#*before write, iclass 40, count 2 2006.229.14:04:33.33#ibcon#enter sib2, iclass 40, count 2 2006.229.14:04:33.33#ibcon#flushed, iclass 40, count 2 2006.229.14:04:33.33#ibcon#about to write, iclass 40, count 2 2006.229.14:04:33.33#ibcon#wrote, iclass 40, count 2 2006.229.14:04:33.33#ibcon#about to read 3, iclass 40, count 2 2006.229.14:04:33.36#ibcon#read 3, iclass 40, count 2 2006.229.14:04:33.36#ibcon#about to read 4, iclass 40, count 2 2006.229.14:04:33.36#ibcon#read 4, iclass 40, count 2 2006.229.14:04:33.36#ibcon#about to read 5, iclass 40, count 2 2006.229.14:04:33.36#ibcon#read 5, iclass 40, count 2 2006.229.14:04:33.36#ibcon#about to read 6, iclass 40, count 2 2006.229.14:04:33.36#ibcon#read 6, iclass 40, count 2 2006.229.14:04:33.36#ibcon#end of sib2, iclass 40, count 2 2006.229.14:04:33.36#ibcon#*after write, iclass 40, count 2 2006.229.14:04:33.36#ibcon#*before return 0, iclass 40, count 2 2006.229.14:04:33.36#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:33.36#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:33.36#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.14:04:33.36#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:33.36#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:33.48#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:33.48#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:33.48#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:04:33.48#ibcon#first serial, iclass 40, count 0 2006.229.14:04:33.48#ibcon#enter sib2, iclass 40, count 0 2006.229.14:04:33.48#ibcon#flushed, iclass 40, count 0 2006.229.14:04:33.48#ibcon#about to write, iclass 40, count 0 2006.229.14:04:33.48#ibcon#wrote, iclass 40, count 0 2006.229.14:04:33.48#ibcon#about to read 3, iclass 40, count 0 2006.229.14:04:33.50#ibcon#read 3, iclass 40, count 0 2006.229.14:04:33.50#ibcon#about to read 4, iclass 40, count 0 2006.229.14:04:33.50#ibcon#read 4, iclass 40, count 0 2006.229.14:04:33.50#ibcon#about to read 5, iclass 40, count 0 2006.229.14:04:33.50#ibcon#read 5, iclass 40, count 0 2006.229.14:04:33.50#ibcon#about to read 6, iclass 40, count 0 2006.229.14:04:33.50#ibcon#read 6, iclass 40, count 0 2006.229.14:04:33.50#ibcon#end of sib2, iclass 40, count 0 2006.229.14:04:33.50#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:04:33.50#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:04:33.50#ibcon#[25=USB\r\n] 2006.229.14:04:33.50#ibcon#*before write, iclass 40, count 0 2006.229.14:04:33.50#ibcon#enter sib2, iclass 40, count 0 2006.229.14:04:33.50#ibcon#flushed, iclass 40, count 0 2006.229.14:04:33.50#ibcon#about to write, iclass 40, count 0 2006.229.14:04:33.50#ibcon#wrote, iclass 40, count 0 2006.229.14:04:33.50#ibcon#about to read 3, iclass 40, count 0 2006.229.14:04:33.53#ibcon#read 3, iclass 40, count 0 2006.229.14:04:33.53#ibcon#about to read 4, iclass 40, count 0 2006.229.14:04:33.53#ibcon#read 4, iclass 40, count 0 2006.229.14:04:33.53#ibcon#about to read 5, iclass 40, count 0 2006.229.14:04:33.53#ibcon#read 5, iclass 40, count 0 2006.229.14:04:33.53#ibcon#about to read 6, iclass 40, count 0 2006.229.14:04:33.53#ibcon#read 6, iclass 40, count 0 2006.229.14:04:33.53#ibcon#end of sib2, iclass 40, count 0 2006.229.14:04:33.53#ibcon#*after write, iclass 40, count 0 2006.229.14:04:33.53#ibcon#*before return 0, iclass 40, count 0 2006.229.14:04:33.53#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:33.53#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:33.53#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:04:33.53#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:04:33.53$vck44/valo=2,534.99 2006.229.14:04:33.53#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:04:33.53#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:04:33.53#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:33.53#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:33.53#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:33.53#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:33.53#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:04:33.53#ibcon#first serial, iclass 4, count 0 2006.229.14:04:33.53#ibcon#enter sib2, iclass 4, count 0 2006.229.14:04:33.53#ibcon#flushed, iclass 4, count 0 2006.229.14:04:33.53#ibcon#about to write, iclass 4, count 0 2006.229.14:04:33.53#ibcon#wrote, iclass 4, count 0 2006.229.14:04:33.53#ibcon#about to read 3, iclass 4, count 0 2006.229.14:04:33.55#ibcon#read 3, iclass 4, count 0 2006.229.14:04:33.55#ibcon#about to read 4, iclass 4, count 0 2006.229.14:04:33.55#ibcon#read 4, iclass 4, count 0 2006.229.14:04:33.55#ibcon#about to read 5, iclass 4, count 0 2006.229.14:04:33.55#ibcon#read 5, iclass 4, count 0 2006.229.14:04:33.55#ibcon#about to read 6, iclass 4, count 0 2006.229.14:04:33.55#ibcon#read 6, iclass 4, count 0 2006.229.14:04:33.55#ibcon#end of sib2, iclass 4, count 0 2006.229.14:04:33.55#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:04:33.55#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:04:33.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:04:33.55#ibcon#*before write, iclass 4, count 0 2006.229.14:04:33.55#ibcon#enter sib2, iclass 4, count 0 2006.229.14:04:33.55#ibcon#flushed, iclass 4, count 0 2006.229.14:04:33.55#ibcon#about to write, iclass 4, count 0 2006.229.14:04:33.55#ibcon#wrote, iclass 4, count 0 2006.229.14:04:33.55#ibcon#about to read 3, iclass 4, count 0 2006.229.14:04:33.59#ibcon#read 3, iclass 4, count 0 2006.229.14:04:33.59#ibcon#about to read 4, iclass 4, count 0 2006.229.14:04:33.59#ibcon#read 4, iclass 4, count 0 2006.229.14:04:33.59#ibcon#about to read 5, iclass 4, count 0 2006.229.14:04:33.59#ibcon#read 5, iclass 4, count 0 2006.229.14:04:33.59#ibcon#about to read 6, iclass 4, count 0 2006.229.14:04:33.59#ibcon#read 6, iclass 4, count 0 2006.229.14:04:33.59#ibcon#end of sib2, iclass 4, count 0 2006.229.14:04:33.59#ibcon#*after write, iclass 4, count 0 2006.229.14:04:33.59#ibcon#*before return 0, iclass 4, count 0 2006.229.14:04:33.59#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:33.59#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:33.59#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:04:33.59#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:04:33.59$vck44/va=2,7 2006.229.14:04:33.59#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.14:04:33.59#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.14:04:33.59#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:33.59#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:33.65#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:33.65#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:33.65#ibcon#enter wrdev, iclass 6, count 2 2006.229.14:04:33.65#ibcon#first serial, iclass 6, count 2 2006.229.14:04:33.65#ibcon#enter sib2, iclass 6, count 2 2006.229.14:04:33.65#ibcon#flushed, iclass 6, count 2 2006.229.14:04:33.65#ibcon#about to write, iclass 6, count 2 2006.229.14:04:33.65#ibcon#wrote, iclass 6, count 2 2006.229.14:04:33.65#ibcon#about to read 3, iclass 6, count 2 2006.229.14:04:33.67#ibcon#read 3, iclass 6, count 2 2006.229.14:04:33.67#ibcon#about to read 4, iclass 6, count 2 2006.229.14:04:33.67#ibcon#read 4, iclass 6, count 2 2006.229.14:04:33.67#ibcon#about to read 5, iclass 6, count 2 2006.229.14:04:33.67#ibcon#read 5, iclass 6, count 2 2006.229.14:04:33.67#ibcon#about to read 6, iclass 6, count 2 2006.229.14:04:33.67#ibcon#read 6, iclass 6, count 2 2006.229.14:04:33.67#ibcon#end of sib2, iclass 6, count 2 2006.229.14:04:33.67#ibcon#*mode == 0, iclass 6, count 2 2006.229.14:04:33.67#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.14:04:33.67#ibcon#[25=AT02-07\r\n] 2006.229.14:04:33.67#ibcon#*before write, iclass 6, count 2 2006.229.14:04:33.67#ibcon#enter sib2, iclass 6, count 2 2006.229.14:04:33.67#ibcon#flushed, iclass 6, count 2 2006.229.14:04:33.67#ibcon#about to write, iclass 6, count 2 2006.229.14:04:33.67#ibcon#wrote, iclass 6, count 2 2006.229.14:04:33.67#ibcon#about to read 3, iclass 6, count 2 2006.229.14:04:33.70#ibcon#read 3, iclass 6, count 2 2006.229.14:04:33.70#ibcon#about to read 4, iclass 6, count 2 2006.229.14:04:33.70#ibcon#read 4, iclass 6, count 2 2006.229.14:04:33.70#ibcon#about to read 5, iclass 6, count 2 2006.229.14:04:33.70#ibcon#read 5, iclass 6, count 2 2006.229.14:04:33.70#ibcon#about to read 6, iclass 6, count 2 2006.229.14:04:33.70#ibcon#read 6, iclass 6, count 2 2006.229.14:04:33.70#ibcon#end of sib2, iclass 6, count 2 2006.229.14:04:33.70#ibcon#*after write, iclass 6, count 2 2006.229.14:04:33.70#ibcon#*before return 0, iclass 6, count 2 2006.229.14:04:33.70#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:33.70#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:33.70#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.14:04:33.70#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:33.70#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:33.82#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:33.82#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:33.82#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:04:33.82#ibcon#first serial, iclass 6, count 0 2006.229.14:04:33.82#ibcon#enter sib2, iclass 6, count 0 2006.229.14:04:33.82#ibcon#flushed, iclass 6, count 0 2006.229.14:04:33.82#ibcon#about to write, iclass 6, count 0 2006.229.14:04:33.82#ibcon#wrote, iclass 6, count 0 2006.229.14:04:33.82#ibcon#about to read 3, iclass 6, count 0 2006.229.14:04:33.84#ibcon#read 3, iclass 6, count 0 2006.229.14:04:33.84#ibcon#about to read 4, iclass 6, count 0 2006.229.14:04:33.84#ibcon#read 4, iclass 6, count 0 2006.229.14:04:33.84#ibcon#about to read 5, iclass 6, count 0 2006.229.14:04:33.84#ibcon#read 5, iclass 6, count 0 2006.229.14:04:33.84#ibcon#about to read 6, iclass 6, count 0 2006.229.14:04:33.84#ibcon#read 6, iclass 6, count 0 2006.229.14:04:33.84#ibcon#end of sib2, iclass 6, count 0 2006.229.14:04:33.84#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:04:33.84#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:04:33.84#ibcon#[25=USB\r\n] 2006.229.14:04:33.84#ibcon#*before write, iclass 6, count 0 2006.229.14:04:33.84#ibcon#enter sib2, iclass 6, count 0 2006.229.14:04:33.84#ibcon#flushed, iclass 6, count 0 2006.229.14:04:33.84#ibcon#about to write, iclass 6, count 0 2006.229.14:04:33.84#ibcon#wrote, iclass 6, count 0 2006.229.14:04:33.84#ibcon#about to read 3, iclass 6, count 0 2006.229.14:04:33.87#ibcon#read 3, iclass 6, count 0 2006.229.14:04:33.87#ibcon#about to read 4, iclass 6, count 0 2006.229.14:04:33.87#ibcon#read 4, iclass 6, count 0 2006.229.14:04:33.87#ibcon#about to read 5, iclass 6, count 0 2006.229.14:04:33.87#ibcon#read 5, iclass 6, count 0 2006.229.14:04:33.87#ibcon#about to read 6, iclass 6, count 0 2006.229.14:04:33.87#ibcon#read 6, iclass 6, count 0 2006.229.14:04:33.87#ibcon#end of sib2, iclass 6, count 0 2006.229.14:04:33.87#ibcon#*after write, iclass 6, count 0 2006.229.14:04:33.87#ibcon#*before return 0, iclass 6, count 0 2006.229.14:04:33.87#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:33.87#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:33.87#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:04:33.87#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:04:33.87$vck44/valo=3,564.99 2006.229.14:04:33.87#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.14:04:33.87#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.14:04:33.87#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:33.87#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:33.87#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:33.87#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:33.87#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:04:33.87#ibcon#first serial, iclass 10, count 0 2006.229.14:04:33.87#ibcon#enter sib2, iclass 10, count 0 2006.229.14:04:33.87#ibcon#flushed, iclass 10, count 0 2006.229.14:04:33.87#ibcon#about to write, iclass 10, count 0 2006.229.14:04:33.87#ibcon#wrote, iclass 10, count 0 2006.229.14:04:33.87#ibcon#about to read 3, iclass 10, count 0 2006.229.14:04:33.89#ibcon#read 3, iclass 10, count 0 2006.229.14:04:33.89#ibcon#about to read 4, iclass 10, count 0 2006.229.14:04:33.89#ibcon#read 4, iclass 10, count 0 2006.229.14:04:33.89#ibcon#about to read 5, iclass 10, count 0 2006.229.14:04:33.89#ibcon#read 5, iclass 10, count 0 2006.229.14:04:33.89#ibcon#about to read 6, iclass 10, count 0 2006.229.14:04:33.89#ibcon#read 6, iclass 10, count 0 2006.229.14:04:33.89#ibcon#end of sib2, iclass 10, count 0 2006.229.14:04:33.89#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:04:33.89#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:04:33.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:04:33.89#ibcon#*before write, iclass 10, count 0 2006.229.14:04:33.89#ibcon#enter sib2, iclass 10, count 0 2006.229.14:04:33.89#ibcon#flushed, iclass 10, count 0 2006.229.14:04:33.89#ibcon#about to write, iclass 10, count 0 2006.229.14:04:33.89#ibcon#wrote, iclass 10, count 0 2006.229.14:04:33.89#ibcon#about to read 3, iclass 10, count 0 2006.229.14:04:33.93#ibcon#read 3, iclass 10, count 0 2006.229.14:04:33.93#ibcon#about to read 4, iclass 10, count 0 2006.229.14:04:33.93#ibcon#read 4, iclass 10, count 0 2006.229.14:04:33.93#ibcon#about to read 5, iclass 10, count 0 2006.229.14:04:33.93#ibcon#read 5, iclass 10, count 0 2006.229.14:04:33.93#ibcon#about to read 6, iclass 10, count 0 2006.229.14:04:33.93#ibcon#read 6, iclass 10, count 0 2006.229.14:04:33.93#ibcon#end of sib2, iclass 10, count 0 2006.229.14:04:33.93#ibcon#*after write, iclass 10, count 0 2006.229.14:04:33.93#ibcon#*before return 0, iclass 10, count 0 2006.229.14:04:33.93#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:33.93#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:33.93#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:04:33.93#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:04:33.93$vck44/va=3,6 2006.229.14:04:33.93#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.14:04:33.93#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.14:04:33.93#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:33.93#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:33.99#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:33.99#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:33.99#ibcon#enter wrdev, iclass 12, count 2 2006.229.14:04:33.99#ibcon#first serial, iclass 12, count 2 2006.229.14:04:33.99#ibcon#enter sib2, iclass 12, count 2 2006.229.14:04:33.99#ibcon#flushed, iclass 12, count 2 2006.229.14:04:33.99#ibcon#about to write, iclass 12, count 2 2006.229.14:04:33.99#ibcon#wrote, iclass 12, count 2 2006.229.14:04:33.99#ibcon#about to read 3, iclass 12, count 2 2006.229.14:04:34.01#ibcon#read 3, iclass 12, count 2 2006.229.14:04:34.01#ibcon#about to read 4, iclass 12, count 2 2006.229.14:04:34.01#ibcon#read 4, iclass 12, count 2 2006.229.14:04:34.01#ibcon#about to read 5, iclass 12, count 2 2006.229.14:04:34.01#ibcon#read 5, iclass 12, count 2 2006.229.14:04:34.01#ibcon#about to read 6, iclass 12, count 2 2006.229.14:04:34.01#ibcon#read 6, iclass 12, count 2 2006.229.14:04:34.01#ibcon#end of sib2, iclass 12, count 2 2006.229.14:04:34.01#ibcon#*mode == 0, iclass 12, count 2 2006.229.14:04:34.01#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.14:04:34.01#ibcon#[25=AT03-06\r\n] 2006.229.14:04:34.01#ibcon#*before write, iclass 12, count 2 2006.229.14:04:34.01#ibcon#enter sib2, iclass 12, count 2 2006.229.14:04:34.01#ibcon#flushed, iclass 12, count 2 2006.229.14:04:34.01#ibcon#about to write, iclass 12, count 2 2006.229.14:04:34.01#ibcon#wrote, iclass 12, count 2 2006.229.14:04:34.01#ibcon#about to read 3, iclass 12, count 2 2006.229.14:04:34.04#ibcon#read 3, iclass 12, count 2 2006.229.14:04:34.04#ibcon#about to read 4, iclass 12, count 2 2006.229.14:04:34.04#ibcon#read 4, iclass 12, count 2 2006.229.14:04:34.04#ibcon#about to read 5, iclass 12, count 2 2006.229.14:04:34.04#ibcon#read 5, iclass 12, count 2 2006.229.14:04:34.04#ibcon#about to read 6, iclass 12, count 2 2006.229.14:04:34.04#ibcon#read 6, iclass 12, count 2 2006.229.14:04:34.04#ibcon#end of sib2, iclass 12, count 2 2006.229.14:04:34.04#ibcon#*after write, iclass 12, count 2 2006.229.14:04:34.04#ibcon#*before return 0, iclass 12, count 2 2006.229.14:04:34.04#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:34.04#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:34.04#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.14:04:34.04#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:34.04#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:34.16#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:34.16#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:34.16#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:04:34.16#ibcon#first serial, iclass 12, count 0 2006.229.14:04:34.16#ibcon#enter sib2, iclass 12, count 0 2006.229.14:04:34.16#ibcon#flushed, iclass 12, count 0 2006.229.14:04:34.16#ibcon#about to write, iclass 12, count 0 2006.229.14:04:34.16#ibcon#wrote, iclass 12, count 0 2006.229.14:04:34.16#ibcon#about to read 3, iclass 12, count 0 2006.229.14:04:34.18#ibcon#read 3, iclass 12, count 0 2006.229.14:04:34.18#ibcon#about to read 4, iclass 12, count 0 2006.229.14:04:34.18#ibcon#read 4, iclass 12, count 0 2006.229.14:04:34.18#ibcon#about to read 5, iclass 12, count 0 2006.229.14:04:34.18#ibcon#read 5, iclass 12, count 0 2006.229.14:04:34.18#ibcon#about to read 6, iclass 12, count 0 2006.229.14:04:34.18#ibcon#read 6, iclass 12, count 0 2006.229.14:04:34.18#ibcon#end of sib2, iclass 12, count 0 2006.229.14:04:34.18#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:04:34.18#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:04:34.18#ibcon#[25=USB\r\n] 2006.229.14:04:34.18#ibcon#*before write, iclass 12, count 0 2006.229.14:04:34.18#ibcon#enter sib2, iclass 12, count 0 2006.229.14:04:34.18#ibcon#flushed, iclass 12, count 0 2006.229.14:04:34.18#ibcon#about to write, iclass 12, count 0 2006.229.14:04:34.18#ibcon#wrote, iclass 12, count 0 2006.229.14:04:34.18#ibcon#about to read 3, iclass 12, count 0 2006.229.14:04:34.21#ibcon#read 3, iclass 12, count 0 2006.229.14:04:34.21#ibcon#about to read 4, iclass 12, count 0 2006.229.14:04:34.21#ibcon#read 4, iclass 12, count 0 2006.229.14:04:34.21#ibcon#about to read 5, iclass 12, count 0 2006.229.14:04:34.21#ibcon#read 5, iclass 12, count 0 2006.229.14:04:34.21#ibcon#about to read 6, iclass 12, count 0 2006.229.14:04:34.21#ibcon#read 6, iclass 12, count 0 2006.229.14:04:34.21#ibcon#end of sib2, iclass 12, count 0 2006.229.14:04:34.21#ibcon#*after write, iclass 12, count 0 2006.229.14:04:34.21#ibcon#*before return 0, iclass 12, count 0 2006.229.14:04:34.21#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:34.21#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:34.21#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:04:34.21#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:04:34.21$vck44/valo=4,624.99 2006.229.14:04:34.21#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.14:04:34.21#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.14:04:34.21#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:34.21#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:34.21#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:34.21#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:34.21#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:04:34.21#ibcon#first serial, iclass 14, count 0 2006.229.14:04:34.21#ibcon#enter sib2, iclass 14, count 0 2006.229.14:04:34.21#ibcon#flushed, iclass 14, count 0 2006.229.14:04:34.21#ibcon#about to write, iclass 14, count 0 2006.229.14:04:34.21#ibcon#wrote, iclass 14, count 0 2006.229.14:04:34.21#ibcon#about to read 3, iclass 14, count 0 2006.229.14:04:34.23#ibcon#read 3, iclass 14, count 0 2006.229.14:04:34.23#ibcon#about to read 4, iclass 14, count 0 2006.229.14:04:34.23#ibcon#read 4, iclass 14, count 0 2006.229.14:04:34.23#ibcon#about to read 5, iclass 14, count 0 2006.229.14:04:34.23#ibcon#read 5, iclass 14, count 0 2006.229.14:04:34.23#ibcon#about to read 6, iclass 14, count 0 2006.229.14:04:34.23#ibcon#read 6, iclass 14, count 0 2006.229.14:04:34.23#ibcon#end of sib2, iclass 14, count 0 2006.229.14:04:34.23#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:04:34.23#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:04:34.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:04:34.23#ibcon#*before write, iclass 14, count 0 2006.229.14:04:34.23#ibcon#enter sib2, iclass 14, count 0 2006.229.14:04:34.23#ibcon#flushed, iclass 14, count 0 2006.229.14:04:34.23#ibcon#about to write, iclass 14, count 0 2006.229.14:04:34.23#ibcon#wrote, iclass 14, count 0 2006.229.14:04:34.23#ibcon#about to read 3, iclass 14, count 0 2006.229.14:04:34.27#ibcon#read 3, iclass 14, count 0 2006.229.14:04:34.27#ibcon#about to read 4, iclass 14, count 0 2006.229.14:04:34.27#ibcon#read 4, iclass 14, count 0 2006.229.14:04:34.27#ibcon#about to read 5, iclass 14, count 0 2006.229.14:04:34.27#ibcon#read 5, iclass 14, count 0 2006.229.14:04:34.27#ibcon#about to read 6, iclass 14, count 0 2006.229.14:04:34.27#ibcon#read 6, iclass 14, count 0 2006.229.14:04:34.27#ibcon#end of sib2, iclass 14, count 0 2006.229.14:04:34.27#ibcon#*after write, iclass 14, count 0 2006.229.14:04:34.27#ibcon#*before return 0, iclass 14, count 0 2006.229.14:04:34.27#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:34.27#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:34.27#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:04:34.27#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:04:34.27$vck44/va=4,7 2006.229.14:04:34.27#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.14:04:34.27#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.14:04:34.27#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:34.27#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:04:34.31#abcon#<5=/05 1.6 2.3 27.521001002.1\r\n> 2006.229.14:04:34.33#abcon#{5=INTERFACE CLEAR} 2006.229.14:04:34.33#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:04:34.33#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:04:34.33#ibcon#enter wrdev, iclass 17, count 2 2006.229.14:04:34.33#ibcon#first serial, iclass 17, count 2 2006.229.14:04:34.33#ibcon#enter sib2, iclass 17, count 2 2006.229.14:04:34.33#ibcon#flushed, iclass 17, count 2 2006.229.14:04:34.33#ibcon#about to write, iclass 17, count 2 2006.229.14:04:34.33#ibcon#wrote, iclass 17, count 2 2006.229.14:04:34.33#ibcon#about to read 3, iclass 17, count 2 2006.229.14:04:34.35#ibcon#read 3, iclass 17, count 2 2006.229.14:04:34.35#ibcon#about to read 4, iclass 17, count 2 2006.229.14:04:34.35#ibcon#read 4, iclass 17, count 2 2006.229.14:04:34.35#ibcon#about to read 5, iclass 17, count 2 2006.229.14:04:34.35#ibcon#read 5, iclass 17, count 2 2006.229.14:04:34.35#ibcon#about to read 6, iclass 17, count 2 2006.229.14:04:34.35#ibcon#read 6, iclass 17, count 2 2006.229.14:04:34.35#ibcon#end of sib2, iclass 17, count 2 2006.229.14:04:34.35#ibcon#*mode == 0, iclass 17, count 2 2006.229.14:04:34.35#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.14:04:34.35#ibcon#[25=AT04-07\r\n] 2006.229.14:04:34.35#ibcon#*before write, iclass 17, count 2 2006.229.14:04:34.35#ibcon#enter sib2, iclass 17, count 2 2006.229.14:04:34.35#ibcon#flushed, iclass 17, count 2 2006.229.14:04:34.35#ibcon#about to write, iclass 17, count 2 2006.229.14:04:34.35#ibcon#wrote, iclass 17, count 2 2006.229.14:04:34.35#ibcon#about to read 3, iclass 17, count 2 2006.229.14:04:34.38#ibcon#read 3, iclass 17, count 2 2006.229.14:04:34.38#ibcon#about to read 4, iclass 17, count 2 2006.229.14:04:34.38#ibcon#read 4, iclass 17, count 2 2006.229.14:04:34.38#ibcon#about to read 5, iclass 17, count 2 2006.229.14:04:34.38#ibcon#read 5, iclass 17, count 2 2006.229.14:04:34.38#ibcon#about to read 6, iclass 17, count 2 2006.229.14:04:34.38#ibcon#read 6, iclass 17, count 2 2006.229.14:04:34.38#ibcon#end of sib2, iclass 17, count 2 2006.229.14:04:34.38#ibcon#*after write, iclass 17, count 2 2006.229.14:04:34.38#ibcon#*before return 0, iclass 17, count 2 2006.229.14:04:34.38#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:04:34.38#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:04:34.38#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.14:04:34.38#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:34.38#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:04:34.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:04:34.50#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:04:34.50#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:04:34.50#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:04:34.50#ibcon#first serial, iclass 17, count 0 2006.229.14:04:34.50#ibcon#enter sib2, iclass 17, count 0 2006.229.14:04:34.50#ibcon#flushed, iclass 17, count 0 2006.229.14:04:34.50#ibcon#about to write, iclass 17, count 0 2006.229.14:04:34.50#ibcon#wrote, iclass 17, count 0 2006.229.14:04:34.50#ibcon#about to read 3, iclass 17, count 0 2006.229.14:04:34.52#ibcon#read 3, iclass 17, count 0 2006.229.14:04:34.52#ibcon#about to read 4, iclass 17, count 0 2006.229.14:04:34.52#ibcon#read 4, iclass 17, count 0 2006.229.14:04:34.52#ibcon#about to read 5, iclass 17, count 0 2006.229.14:04:34.52#ibcon#read 5, iclass 17, count 0 2006.229.14:04:34.52#ibcon#about to read 6, iclass 17, count 0 2006.229.14:04:34.52#ibcon#read 6, iclass 17, count 0 2006.229.14:04:34.52#ibcon#end of sib2, iclass 17, count 0 2006.229.14:04:34.52#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:04:34.52#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:04:34.52#ibcon#[25=USB\r\n] 2006.229.14:04:34.52#ibcon#*before write, iclass 17, count 0 2006.229.14:04:34.52#ibcon#enter sib2, iclass 17, count 0 2006.229.14:04:34.52#ibcon#flushed, iclass 17, count 0 2006.229.14:04:34.52#ibcon#about to write, iclass 17, count 0 2006.229.14:04:34.52#ibcon#wrote, iclass 17, count 0 2006.229.14:04:34.52#ibcon#about to read 3, iclass 17, count 0 2006.229.14:04:34.55#ibcon#read 3, iclass 17, count 0 2006.229.14:04:34.55#ibcon#about to read 4, iclass 17, count 0 2006.229.14:04:34.55#ibcon#read 4, iclass 17, count 0 2006.229.14:04:34.55#ibcon#about to read 5, iclass 17, count 0 2006.229.14:04:34.55#ibcon#read 5, iclass 17, count 0 2006.229.14:04:34.55#ibcon#about to read 6, iclass 17, count 0 2006.229.14:04:34.55#ibcon#read 6, iclass 17, count 0 2006.229.14:04:34.55#ibcon#end of sib2, iclass 17, count 0 2006.229.14:04:34.55#ibcon#*after write, iclass 17, count 0 2006.229.14:04:34.55#ibcon#*before return 0, iclass 17, count 0 2006.229.14:04:34.55#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:04:34.55#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:04:34.55#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:04:34.55#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:04:34.55$vck44/valo=5,734.99 2006.229.14:04:34.55#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:04:34.55#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:04:34.55#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:34.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:34.55#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:34.55#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:34.55#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:04:34.55#ibcon#first serial, iclass 22, count 0 2006.229.14:04:34.55#ibcon#enter sib2, iclass 22, count 0 2006.229.14:04:34.55#ibcon#flushed, iclass 22, count 0 2006.229.14:04:34.55#ibcon#about to write, iclass 22, count 0 2006.229.14:04:34.55#ibcon#wrote, iclass 22, count 0 2006.229.14:04:34.55#ibcon#about to read 3, iclass 22, count 0 2006.229.14:04:34.57#ibcon#read 3, iclass 22, count 0 2006.229.14:04:34.57#ibcon#about to read 4, iclass 22, count 0 2006.229.14:04:34.57#ibcon#read 4, iclass 22, count 0 2006.229.14:04:34.57#ibcon#about to read 5, iclass 22, count 0 2006.229.14:04:34.57#ibcon#read 5, iclass 22, count 0 2006.229.14:04:34.57#ibcon#about to read 6, iclass 22, count 0 2006.229.14:04:34.57#ibcon#read 6, iclass 22, count 0 2006.229.14:04:34.57#ibcon#end of sib2, iclass 22, count 0 2006.229.14:04:34.57#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:04:34.57#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:04:34.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:04:34.57#ibcon#*before write, iclass 22, count 0 2006.229.14:04:34.57#ibcon#enter sib2, iclass 22, count 0 2006.229.14:04:34.57#ibcon#flushed, iclass 22, count 0 2006.229.14:04:34.57#ibcon#about to write, iclass 22, count 0 2006.229.14:04:34.57#ibcon#wrote, iclass 22, count 0 2006.229.14:04:34.57#ibcon#about to read 3, iclass 22, count 0 2006.229.14:04:34.61#ibcon#read 3, iclass 22, count 0 2006.229.14:04:34.61#ibcon#about to read 4, iclass 22, count 0 2006.229.14:04:34.61#ibcon#read 4, iclass 22, count 0 2006.229.14:04:34.61#ibcon#about to read 5, iclass 22, count 0 2006.229.14:04:34.61#ibcon#read 5, iclass 22, count 0 2006.229.14:04:34.61#ibcon#about to read 6, iclass 22, count 0 2006.229.14:04:34.61#ibcon#read 6, iclass 22, count 0 2006.229.14:04:34.61#ibcon#end of sib2, iclass 22, count 0 2006.229.14:04:34.61#ibcon#*after write, iclass 22, count 0 2006.229.14:04:34.61#ibcon#*before return 0, iclass 22, count 0 2006.229.14:04:34.61#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:34.61#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:34.61#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:04:34.61#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:04:34.61$vck44/va=5,4 2006.229.14:04:34.61#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.14:04:34.61#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.14:04:34.61#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:34.61#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:34.67#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:34.67#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:34.67#ibcon#enter wrdev, iclass 24, count 2 2006.229.14:04:34.67#ibcon#first serial, iclass 24, count 2 2006.229.14:04:34.67#ibcon#enter sib2, iclass 24, count 2 2006.229.14:04:34.67#ibcon#flushed, iclass 24, count 2 2006.229.14:04:34.67#ibcon#about to write, iclass 24, count 2 2006.229.14:04:34.67#ibcon#wrote, iclass 24, count 2 2006.229.14:04:34.67#ibcon#about to read 3, iclass 24, count 2 2006.229.14:04:34.69#ibcon#read 3, iclass 24, count 2 2006.229.14:04:34.69#ibcon#about to read 4, iclass 24, count 2 2006.229.14:04:34.69#ibcon#read 4, iclass 24, count 2 2006.229.14:04:34.69#ibcon#about to read 5, iclass 24, count 2 2006.229.14:04:34.69#ibcon#read 5, iclass 24, count 2 2006.229.14:04:34.69#ibcon#about to read 6, iclass 24, count 2 2006.229.14:04:34.69#ibcon#read 6, iclass 24, count 2 2006.229.14:04:34.69#ibcon#end of sib2, iclass 24, count 2 2006.229.14:04:34.69#ibcon#*mode == 0, iclass 24, count 2 2006.229.14:04:34.69#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.14:04:34.69#ibcon#[25=AT05-04\r\n] 2006.229.14:04:34.69#ibcon#*before write, iclass 24, count 2 2006.229.14:04:34.69#ibcon#enter sib2, iclass 24, count 2 2006.229.14:04:34.69#ibcon#flushed, iclass 24, count 2 2006.229.14:04:34.69#ibcon#about to write, iclass 24, count 2 2006.229.14:04:34.69#ibcon#wrote, iclass 24, count 2 2006.229.14:04:34.69#ibcon#about to read 3, iclass 24, count 2 2006.229.14:04:34.72#ibcon#read 3, iclass 24, count 2 2006.229.14:04:34.72#ibcon#about to read 4, iclass 24, count 2 2006.229.14:04:34.72#ibcon#read 4, iclass 24, count 2 2006.229.14:04:34.72#ibcon#about to read 5, iclass 24, count 2 2006.229.14:04:34.72#ibcon#read 5, iclass 24, count 2 2006.229.14:04:34.72#ibcon#about to read 6, iclass 24, count 2 2006.229.14:04:34.72#ibcon#read 6, iclass 24, count 2 2006.229.14:04:34.72#ibcon#end of sib2, iclass 24, count 2 2006.229.14:04:34.72#ibcon#*after write, iclass 24, count 2 2006.229.14:04:34.72#ibcon#*before return 0, iclass 24, count 2 2006.229.14:04:34.72#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:34.72#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:34.72#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.14:04:34.72#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:34.72#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:34.84#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:34.84#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:34.84#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:04:34.84#ibcon#first serial, iclass 24, count 0 2006.229.14:04:34.84#ibcon#enter sib2, iclass 24, count 0 2006.229.14:04:34.84#ibcon#flushed, iclass 24, count 0 2006.229.14:04:34.84#ibcon#about to write, iclass 24, count 0 2006.229.14:04:34.84#ibcon#wrote, iclass 24, count 0 2006.229.14:04:34.84#ibcon#about to read 3, iclass 24, count 0 2006.229.14:04:34.86#ibcon#read 3, iclass 24, count 0 2006.229.14:04:34.86#ibcon#about to read 4, iclass 24, count 0 2006.229.14:04:34.86#ibcon#read 4, iclass 24, count 0 2006.229.14:04:34.86#ibcon#about to read 5, iclass 24, count 0 2006.229.14:04:34.86#ibcon#read 5, iclass 24, count 0 2006.229.14:04:34.86#ibcon#about to read 6, iclass 24, count 0 2006.229.14:04:34.86#ibcon#read 6, iclass 24, count 0 2006.229.14:04:34.86#ibcon#end of sib2, iclass 24, count 0 2006.229.14:04:34.86#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:04:34.86#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:04:34.86#ibcon#[25=USB\r\n] 2006.229.14:04:34.86#ibcon#*before write, iclass 24, count 0 2006.229.14:04:34.86#ibcon#enter sib2, iclass 24, count 0 2006.229.14:04:34.86#ibcon#flushed, iclass 24, count 0 2006.229.14:04:34.86#ibcon#about to write, iclass 24, count 0 2006.229.14:04:34.86#ibcon#wrote, iclass 24, count 0 2006.229.14:04:34.86#ibcon#about to read 3, iclass 24, count 0 2006.229.14:04:34.89#ibcon#read 3, iclass 24, count 0 2006.229.14:04:34.89#ibcon#about to read 4, iclass 24, count 0 2006.229.14:04:34.89#ibcon#read 4, iclass 24, count 0 2006.229.14:04:34.89#ibcon#about to read 5, iclass 24, count 0 2006.229.14:04:34.89#ibcon#read 5, iclass 24, count 0 2006.229.14:04:34.89#ibcon#about to read 6, iclass 24, count 0 2006.229.14:04:34.89#ibcon#read 6, iclass 24, count 0 2006.229.14:04:34.89#ibcon#end of sib2, iclass 24, count 0 2006.229.14:04:34.89#ibcon#*after write, iclass 24, count 0 2006.229.14:04:34.89#ibcon#*before return 0, iclass 24, count 0 2006.229.14:04:34.89#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:34.89#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:34.89#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:04:34.89#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:04:34.89$vck44/valo=6,814.99 2006.229.14:04:34.89#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.14:04:34.89#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.14:04:34.89#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:34.89#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:34.89#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:34.89#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:34.89#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:04:34.89#ibcon#first serial, iclass 26, count 0 2006.229.14:04:34.89#ibcon#enter sib2, iclass 26, count 0 2006.229.14:04:34.89#ibcon#flushed, iclass 26, count 0 2006.229.14:04:34.89#ibcon#about to write, iclass 26, count 0 2006.229.14:04:34.89#ibcon#wrote, iclass 26, count 0 2006.229.14:04:34.89#ibcon#about to read 3, iclass 26, count 0 2006.229.14:04:34.91#ibcon#read 3, iclass 26, count 0 2006.229.14:04:34.91#ibcon#about to read 4, iclass 26, count 0 2006.229.14:04:34.91#ibcon#read 4, iclass 26, count 0 2006.229.14:04:34.91#ibcon#about to read 5, iclass 26, count 0 2006.229.14:04:34.91#ibcon#read 5, iclass 26, count 0 2006.229.14:04:34.91#ibcon#about to read 6, iclass 26, count 0 2006.229.14:04:34.91#ibcon#read 6, iclass 26, count 0 2006.229.14:04:34.91#ibcon#end of sib2, iclass 26, count 0 2006.229.14:04:34.91#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:04:34.91#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:04:34.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:04:34.91#ibcon#*before write, iclass 26, count 0 2006.229.14:04:34.91#ibcon#enter sib2, iclass 26, count 0 2006.229.14:04:34.91#ibcon#flushed, iclass 26, count 0 2006.229.14:04:34.91#ibcon#about to write, iclass 26, count 0 2006.229.14:04:34.91#ibcon#wrote, iclass 26, count 0 2006.229.14:04:34.91#ibcon#about to read 3, iclass 26, count 0 2006.229.14:04:34.95#ibcon#read 3, iclass 26, count 0 2006.229.14:04:34.95#ibcon#about to read 4, iclass 26, count 0 2006.229.14:04:34.95#ibcon#read 4, iclass 26, count 0 2006.229.14:04:34.95#ibcon#about to read 5, iclass 26, count 0 2006.229.14:04:34.95#ibcon#read 5, iclass 26, count 0 2006.229.14:04:34.95#ibcon#about to read 6, iclass 26, count 0 2006.229.14:04:34.95#ibcon#read 6, iclass 26, count 0 2006.229.14:04:34.95#ibcon#end of sib2, iclass 26, count 0 2006.229.14:04:34.95#ibcon#*after write, iclass 26, count 0 2006.229.14:04:34.95#ibcon#*before return 0, iclass 26, count 0 2006.229.14:04:34.95#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:34.95#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:34.95#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:04:34.95#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:04:34.95$vck44/va=6,4 2006.229.14:04:34.95#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.14:04:34.95#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.14:04:34.95#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:34.95#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:35.01#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:35.01#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:35.01#ibcon#enter wrdev, iclass 28, count 2 2006.229.14:04:35.01#ibcon#first serial, iclass 28, count 2 2006.229.14:04:35.01#ibcon#enter sib2, iclass 28, count 2 2006.229.14:04:35.01#ibcon#flushed, iclass 28, count 2 2006.229.14:04:35.01#ibcon#about to write, iclass 28, count 2 2006.229.14:04:35.01#ibcon#wrote, iclass 28, count 2 2006.229.14:04:35.01#ibcon#about to read 3, iclass 28, count 2 2006.229.14:04:35.03#ibcon#read 3, iclass 28, count 2 2006.229.14:04:35.03#ibcon#about to read 4, iclass 28, count 2 2006.229.14:04:35.03#ibcon#read 4, iclass 28, count 2 2006.229.14:04:35.03#ibcon#about to read 5, iclass 28, count 2 2006.229.14:04:35.03#ibcon#read 5, iclass 28, count 2 2006.229.14:04:35.03#ibcon#about to read 6, iclass 28, count 2 2006.229.14:04:35.03#ibcon#read 6, iclass 28, count 2 2006.229.14:04:35.03#ibcon#end of sib2, iclass 28, count 2 2006.229.14:04:35.03#ibcon#*mode == 0, iclass 28, count 2 2006.229.14:04:35.03#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.14:04:35.03#ibcon#[25=AT06-04\r\n] 2006.229.14:04:35.03#ibcon#*before write, iclass 28, count 2 2006.229.14:04:35.03#ibcon#enter sib2, iclass 28, count 2 2006.229.14:04:35.03#ibcon#flushed, iclass 28, count 2 2006.229.14:04:35.03#ibcon#about to write, iclass 28, count 2 2006.229.14:04:35.03#ibcon#wrote, iclass 28, count 2 2006.229.14:04:35.03#ibcon#about to read 3, iclass 28, count 2 2006.229.14:04:35.06#ibcon#read 3, iclass 28, count 2 2006.229.14:04:35.06#ibcon#about to read 4, iclass 28, count 2 2006.229.14:04:35.06#ibcon#read 4, iclass 28, count 2 2006.229.14:04:35.06#ibcon#about to read 5, iclass 28, count 2 2006.229.14:04:35.06#ibcon#read 5, iclass 28, count 2 2006.229.14:04:35.06#ibcon#about to read 6, iclass 28, count 2 2006.229.14:04:35.06#ibcon#read 6, iclass 28, count 2 2006.229.14:04:35.06#ibcon#end of sib2, iclass 28, count 2 2006.229.14:04:35.06#ibcon#*after write, iclass 28, count 2 2006.229.14:04:35.06#ibcon#*before return 0, iclass 28, count 2 2006.229.14:04:35.06#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:35.06#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:35.06#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.14:04:35.06#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:35.06#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:35.18#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:35.18#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:35.18#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:04:35.18#ibcon#first serial, iclass 28, count 0 2006.229.14:04:35.18#ibcon#enter sib2, iclass 28, count 0 2006.229.14:04:35.18#ibcon#flushed, iclass 28, count 0 2006.229.14:04:35.18#ibcon#about to write, iclass 28, count 0 2006.229.14:04:35.18#ibcon#wrote, iclass 28, count 0 2006.229.14:04:35.18#ibcon#about to read 3, iclass 28, count 0 2006.229.14:04:35.20#ibcon#read 3, iclass 28, count 0 2006.229.14:04:35.20#ibcon#about to read 4, iclass 28, count 0 2006.229.14:04:35.20#ibcon#read 4, iclass 28, count 0 2006.229.14:04:35.20#ibcon#about to read 5, iclass 28, count 0 2006.229.14:04:35.20#ibcon#read 5, iclass 28, count 0 2006.229.14:04:35.20#ibcon#about to read 6, iclass 28, count 0 2006.229.14:04:35.20#ibcon#read 6, iclass 28, count 0 2006.229.14:04:35.20#ibcon#end of sib2, iclass 28, count 0 2006.229.14:04:35.20#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:04:35.20#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:04:35.20#ibcon#[25=USB\r\n] 2006.229.14:04:35.20#ibcon#*before write, iclass 28, count 0 2006.229.14:04:35.20#ibcon#enter sib2, iclass 28, count 0 2006.229.14:04:35.20#ibcon#flushed, iclass 28, count 0 2006.229.14:04:35.20#ibcon#about to write, iclass 28, count 0 2006.229.14:04:35.20#ibcon#wrote, iclass 28, count 0 2006.229.14:04:35.20#ibcon#about to read 3, iclass 28, count 0 2006.229.14:04:35.23#ibcon#read 3, iclass 28, count 0 2006.229.14:04:35.23#ibcon#about to read 4, iclass 28, count 0 2006.229.14:04:35.23#ibcon#read 4, iclass 28, count 0 2006.229.14:04:35.23#ibcon#about to read 5, iclass 28, count 0 2006.229.14:04:35.23#ibcon#read 5, iclass 28, count 0 2006.229.14:04:35.23#ibcon#about to read 6, iclass 28, count 0 2006.229.14:04:35.23#ibcon#read 6, iclass 28, count 0 2006.229.14:04:35.23#ibcon#end of sib2, iclass 28, count 0 2006.229.14:04:35.23#ibcon#*after write, iclass 28, count 0 2006.229.14:04:35.23#ibcon#*before return 0, iclass 28, count 0 2006.229.14:04:35.23#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:35.23#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:35.23#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:04:35.23#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:04:35.23$vck44/valo=7,864.99 2006.229.14:04:35.23#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.14:04:35.23#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.14:04:35.23#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:35.23#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:35.23#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:35.23#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:35.23#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:04:35.23#ibcon#first serial, iclass 30, count 0 2006.229.14:04:35.23#ibcon#enter sib2, iclass 30, count 0 2006.229.14:04:35.23#ibcon#flushed, iclass 30, count 0 2006.229.14:04:35.23#ibcon#about to write, iclass 30, count 0 2006.229.14:04:35.23#ibcon#wrote, iclass 30, count 0 2006.229.14:04:35.23#ibcon#about to read 3, iclass 30, count 0 2006.229.14:04:35.25#ibcon#read 3, iclass 30, count 0 2006.229.14:04:35.25#ibcon#about to read 4, iclass 30, count 0 2006.229.14:04:35.25#ibcon#read 4, iclass 30, count 0 2006.229.14:04:35.25#ibcon#about to read 5, iclass 30, count 0 2006.229.14:04:35.25#ibcon#read 5, iclass 30, count 0 2006.229.14:04:35.25#ibcon#about to read 6, iclass 30, count 0 2006.229.14:04:35.25#ibcon#read 6, iclass 30, count 0 2006.229.14:04:35.25#ibcon#end of sib2, iclass 30, count 0 2006.229.14:04:35.25#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:04:35.25#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:04:35.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:04:35.25#ibcon#*before write, iclass 30, count 0 2006.229.14:04:35.25#ibcon#enter sib2, iclass 30, count 0 2006.229.14:04:35.25#ibcon#flushed, iclass 30, count 0 2006.229.14:04:35.25#ibcon#about to write, iclass 30, count 0 2006.229.14:04:35.25#ibcon#wrote, iclass 30, count 0 2006.229.14:04:35.25#ibcon#about to read 3, iclass 30, count 0 2006.229.14:04:35.29#ibcon#read 3, iclass 30, count 0 2006.229.14:04:35.29#ibcon#about to read 4, iclass 30, count 0 2006.229.14:04:35.29#ibcon#read 4, iclass 30, count 0 2006.229.14:04:35.29#ibcon#about to read 5, iclass 30, count 0 2006.229.14:04:35.29#ibcon#read 5, iclass 30, count 0 2006.229.14:04:35.29#ibcon#about to read 6, iclass 30, count 0 2006.229.14:04:35.29#ibcon#read 6, iclass 30, count 0 2006.229.14:04:35.29#ibcon#end of sib2, iclass 30, count 0 2006.229.14:04:35.29#ibcon#*after write, iclass 30, count 0 2006.229.14:04:35.29#ibcon#*before return 0, iclass 30, count 0 2006.229.14:04:35.29#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:35.29#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:35.29#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:04:35.29#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:04:35.29$vck44/va=7,5 2006.229.14:04:35.29#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.14:04:35.29#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.14:04:35.29#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:35.29#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:35.35#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:35.35#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:35.35#ibcon#enter wrdev, iclass 32, count 2 2006.229.14:04:35.35#ibcon#first serial, iclass 32, count 2 2006.229.14:04:35.35#ibcon#enter sib2, iclass 32, count 2 2006.229.14:04:35.35#ibcon#flushed, iclass 32, count 2 2006.229.14:04:35.35#ibcon#about to write, iclass 32, count 2 2006.229.14:04:35.35#ibcon#wrote, iclass 32, count 2 2006.229.14:04:35.35#ibcon#about to read 3, iclass 32, count 2 2006.229.14:04:35.37#ibcon#read 3, iclass 32, count 2 2006.229.14:04:35.37#ibcon#about to read 4, iclass 32, count 2 2006.229.14:04:35.37#ibcon#read 4, iclass 32, count 2 2006.229.14:04:35.37#ibcon#about to read 5, iclass 32, count 2 2006.229.14:04:35.37#ibcon#read 5, iclass 32, count 2 2006.229.14:04:35.37#ibcon#about to read 6, iclass 32, count 2 2006.229.14:04:35.37#ibcon#read 6, iclass 32, count 2 2006.229.14:04:35.37#ibcon#end of sib2, iclass 32, count 2 2006.229.14:04:35.37#ibcon#*mode == 0, iclass 32, count 2 2006.229.14:04:35.37#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.14:04:35.37#ibcon#[25=AT07-05\r\n] 2006.229.14:04:35.37#ibcon#*before write, iclass 32, count 2 2006.229.14:04:35.37#ibcon#enter sib2, iclass 32, count 2 2006.229.14:04:35.37#ibcon#flushed, iclass 32, count 2 2006.229.14:04:35.37#ibcon#about to write, iclass 32, count 2 2006.229.14:04:35.37#ibcon#wrote, iclass 32, count 2 2006.229.14:04:35.37#ibcon#about to read 3, iclass 32, count 2 2006.229.14:04:35.40#ibcon#read 3, iclass 32, count 2 2006.229.14:04:35.40#ibcon#about to read 4, iclass 32, count 2 2006.229.14:04:35.40#ibcon#read 4, iclass 32, count 2 2006.229.14:04:35.40#ibcon#about to read 5, iclass 32, count 2 2006.229.14:04:35.40#ibcon#read 5, iclass 32, count 2 2006.229.14:04:35.40#ibcon#about to read 6, iclass 32, count 2 2006.229.14:04:35.40#ibcon#read 6, iclass 32, count 2 2006.229.14:04:35.40#ibcon#end of sib2, iclass 32, count 2 2006.229.14:04:35.40#ibcon#*after write, iclass 32, count 2 2006.229.14:04:35.40#ibcon#*before return 0, iclass 32, count 2 2006.229.14:04:35.40#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:35.40#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:35.40#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.14:04:35.40#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:35.40#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:35.52#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:35.52#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:35.52#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:04:35.52#ibcon#first serial, iclass 32, count 0 2006.229.14:04:35.52#ibcon#enter sib2, iclass 32, count 0 2006.229.14:04:35.52#ibcon#flushed, iclass 32, count 0 2006.229.14:04:35.52#ibcon#about to write, iclass 32, count 0 2006.229.14:04:35.52#ibcon#wrote, iclass 32, count 0 2006.229.14:04:35.52#ibcon#about to read 3, iclass 32, count 0 2006.229.14:04:35.54#ibcon#read 3, iclass 32, count 0 2006.229.14:04:35.54#ibcon#about to read 4, iclass 32, count 0 2006.229.14:04:35.54#ibcon#read 4, iclass 32, count 0 2006.229.14:04:35.54#ibcon#about to read 5, iclass 32, count 0 2006.229.14:04:35.54#ibcon#read 5, iclass 32, count 0 2006.229.14:04:35.54#ibcon#about to read 6, iclass 32, count 0 2006.229.14:04:35.54#ibcon#read 6, iclass 32, count 0 2006.229.14:04:35.54#ibcon#end of sib2, iclass 32, count 0 2006.229.14:04:35.54#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:04:35.54#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:04:35.54#ibcon#[25=USB\r\n] 2006.229.14:04:35.54#ibcon#*before write, iclass 32, count 0 2006.229.14:04:35.54#ibcon#enter sib2, iclass 32, count 0 2006.229.14:04:35.54#ibcon#flushed, iclass 32, count 0 2006.229.14:04:35.54#ibcon#about to write, iclass 32, count 0 2006.229.14:04:35.54#ibcon#wrote, iclass 32, count 0 2006.229.14:04:35.54#ibcon#about to read 3, iclass 32, count 0 2006.229.14:04:35.57#ibcon#read 3, iclass 32, count 0 2006.229.14:04:35.57#ibcon#about to read 4, iclass 32, count 0 2006.229.14:04:35.57#ibcon#read 4, iclass 32, count 0 2006.229.14:04:35.57#ibcon#about to read 5, iclass 32, count 0 2006.229.14:04:35.57#ibcon#read 5, iclass 32, count 0 2006.229.14:04:35.57#ibcon#about to read 6, iclass 32, count 0 2006.229.14:04:35.57#ibcon#read 6, iclass 32, count 0 2006.229.14:04:35.57#ibcon#end of sib2, iclass 32, count 0 2006.229.14:04:35.57#ibcon#*after write, iclass 32, count 0 2006.229.14:04:35.57#ibcon#*before return 0, iclass 32, count 0 2006.229.14:04:35.57#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:35.57#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:35.57#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:04:35.57#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:04:35.57$vck44/valo=8,884.99 2006.229.14:04:35.57#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.14:04:35.57#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.14:04:35.57#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:35.57#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:35.57#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:35.57#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:35.57#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:04:35.57#ibcon#first serial, iclass 34, count 0 2006.229.14:04:35.57#ibcon#enter sib2, iclass 34, count 0 2006.229.14:04:35.57#ibcon#flushed, iclass 34, count 0 2006.229.14:04:35.57#ibcon#about to write, iclass 34, count 0 2006.229.14:04:35.57#ibcon#wrote, iclass 34, count 0 2006.229.14:04:35.57#ibcon#about to read 3, iclass 34, count 0 2006.229.14:04:35.59#ibcon#read 3, iclass 34, count 0 2006.229.14:04:35.59#ibcon#about to read 4, iclass 34, count 0 2006.229.14:04:35.59#ibcon#read 4, iclass 34, count 0 2006.229.14:04:35.59#ibcon#about to read 5, iclass 34, count 0 2006.229.14:04:35.59#ibcon#read 5, iclass 34, count 0 2006.229.14:04:35.59#ibcon#about to read 6, iclass 34, count 0 2006.229.14:04:35.59#ibcon#read 6, iclass 34, count 0 2006.229.14:04:35.59#ibcon#end of sib2, iclass 34, count 0 2006.229.14:04:35.59#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:04:35.59#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:04:35.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:04:35.59#ibcon#*before write, iclass 34, count 0 2006.229.14:04:35.59#ibcon#enter sib2, iclass 34, count 0 2006.229.14:04:35.59#ibcon#flushed, iclass 34, count 0 2006.229.14:04:35.59#ibcon#about to write, iclass 34, count 0 2006.229.14:04:35.59#ibcon#wrote, iclass 34, count 0 2006.229.14:04:35.59#ibcon#about to read 3, iclass 34, count 0 2006.229.14:04:35.63#ibcon#read 3, iclass 34, count 0 2006.229.14:04:35.63#ibcon#about to read 4, iclass 34, count 0 2006.229.14:04:35.63#ibcon#read 4, iclass 34, count 0 2006.229.14:04:35.63#ibcon#about to read 5, iclass 34, count 0 2006.229.14:04:35.63#ibcon#read 5, iclass 34, count 0 2006.229.14:04:35.63#ibcon#about to read 6, iclass 34, count 0 2006.229.14:04:35.63#ibcon#read 6, iclass 34, count 0 2006.229.14:04:35.63#ibcon#end of sib2, iclass 34, count 0 2006.229.14:04:35.63#ibcon#*after write, iclass 34, count 0 2006.229.14:04:35.63#ibcon#*before return 0, iclass 34, count 0 2006.229.14:04:35.63#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:35.63#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:35.63#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:04:35.63#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:04:35.63$vck44/va=8,6 2006.229.14:04:35.63#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.14:04:35.63#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.14:04:35.63#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:35.63#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:04:35.69#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:04:35.69#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:04:35.69#ibcon#enter wrdev, iclass 36, count 2 2006.229.14:04:35.69#ibcon#first serial, iclass 36, count 2 2006.229.14:04:35.69#ibcon#enter sib2, iclass 36, count 2 2006.229.14:04:35.69#ibcon#flushed, iclass 36, count 2 2006.229.14:04:35.69#ibcon#about to write, iclass 36, count 2 2006.229.14:04:35.69#ibcon#wrote, iclass 36, count 2 2006.229.14:04:35.69#ibcon#about to read 3, iclass 36, count 2 2006.229.14:04:35.71#ibcon#read 3, iclass 36, count 2 2006.229.14:04:35.71#ibcon#about to read 4, iclass 36, count 2 2006.229.14:04:35.71#ibcon#read 4, iclass 36, count 2 2006.229.14:04:35.71#ibcon#about to read 5, iclass 36, count 2 2006.229.14:04:35.71#ibcon#read 5, iclass 36, count 2 2006.229.14:04:35.71#ibcon#about to read 6, iclass 36, count 2 2006.229.14:04:35.71#ibcon#read 6, iclass 36, count 2 2006.229.14:04:35.71#ibcon#end of sib2, iclass 36, count 2 2006.229.14:04:35.71#ibcon#*mode == 0, iclass 36, count 2 2006.229.14:04:35.71#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.14:04:35.71#ibcon#[25=AT08-06\r\n] 2006.229.14:04:35.71#ibcon#*before write, iclass 36, count 2 2006.229.14:04:35.71#ibcon#enter sib2, iclass 36, count 2 2006.229.14:04:35.71#ibcon#flushed, iclass 36, count 2 2006.229.14:04:35.71#ibcon#about to write, iclass 36, count 2 2006.229.14:04:35.71#ibcon#wrote, iclass 36, count 2 2006.229.14:04:35.71#ibcon#about to read 3, iclass 36, count 2 2006.229.14:04:35.74#ibcon#read 3, iclass 36, count 2 2006.229.14:04:35.74#ibcon#about to read 4, iclass 36, count 2 2006.229.14:04:35.74#ibcon#read 4, iclass 36, count 2 2006.229.14:04:35.74#ibcon#about to read 5, iclass 36, count 2 2006.229.14:04:35.74#ibcon#read 5, iclass 36, count 2 2006.229.14:04:35.74#ibcon#about to read 6, iclass 36, count 2 2006.229.14:04:35.74#ibcon#read 6, iclass 36, count 2 2006.229.14:04:35.74#ibcon#end of sib2, iclass 36, count 2 2006.229.14:04:35.74#ibcon#*after write, iclass 36, count 2 2006.229.14:04:35.74#ibcon#*before return 0, iclass 36, count 2 2006.229.14:04:35.74#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:04:35.74#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:04:35.74#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.14:04:35.74#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:35.74#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:04:35.86#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:04:35.86#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:04:35.86#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:04:35.86#ibcon#first serial, iclass 36, count 0 2006.229.14:04:35.86#ibcon#enter sib2, iclass 36, count 0 2006.229.14:04:35.86#ibcon#flushed, iclass 36, count 0 2006.229.14:04:35.86#ibcon#about to write, iclass 36, count 0 2006.229.14:04:35.86#ibcon#wrote, iclass 36, count 0 2006.229.14:04:35.86#ibcon#about to read 3, iclass 36, count 0 2006.229.14:04:35.88#ibcon#read 3, iclass 36, count 0 2006.229.14:04:35.88#ibcon#about to read 4, iclass 36, count 0 2006.229.14:04:35.88#ibcon#read 4, iclass 36, count 0 2006.229.14:04:35.88#ibcon#about to read 5, iclass 36, count 0 2006.229.14:04:35.88#ibcon#read 5, iclass 36, count 0 2006.229.14:04:35.88#ibcon#about to read 6, iclass 36, count 0 2006.229.14:04:35.88#ibcon#read 6, iclass 36, count 0 2006.229.14:04:35.88#ibcon#end of sib2, iclass 36, count 0 2006.229.14:04:35.88#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:04:35.88#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:04:35.88#ibcon#[25=USB\r\n] 2006.229.14:04:35.88#ibcon#*before write, iclass 36, count 0 2006.229.14:04:35.88#ibcon#enter sib2, iclass 36, count 0 2006.229.14:04:35.88#ibcon#flushed, iclass 36, count 0 2006.229.14:04:35.88#ibcon#about to write, iclass 36, count 0 2006.229.14:04:35.88#ibcon#wrote, iclass 36, count 0 2006.229.14:04:35.88#ibcon#about to read 3, iclass 36, count 0 2006.229.14:04:35.91#ibcon#read 3, iclass 36, count 0 2006.229.14:04:35.91#ibcon#about to read 4, iclass 36, count 0 2006.229.14:04:35.91#ibcon#read 4, iclass 36, count 0 2006.229.14:04:35.91#ibcon#about to read 5, iclass 36, count 0 2006.229.14:04:35.91#ibcon#read 5, iclass 36, count 0 2006.229.14:04:35.91#ibcon#about to read 6, iclass 36, count 0 2006.229.14:04:35.91#ibcon#read 6, iclass 36, count 0 2006.229.14:04:35.91#ibcon#end of sib2, iclass 36, count 0 2006.229.14:04:35.91#ibcon#*after write, iclass 36, count 0 2006.229.14:04:35.91#ibcon#*before return 0, iclass 36, count 0 2006.229.14:04:35.91#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:04:35.91#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:04:35.91#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:04:35.91#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:04:35.91$vck44/vblo=1,629.99 2006.229.14:04:35.91#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.14:04:35.91#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.14:04:35.91#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:35.91#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:35.91#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:35.91#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:35.91#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:04:35.91#ibcon#first serial, iclass 38, count 0 2006.229.14:04:35.91#ibcon#enter sib2, iclass 38, count 0 2006.229.14:04:35.91#ibcon#flushed, iclass 38, count 0 2006.229.14:04:35.91#ibcon#about to write, iclass 38, count 0 2006.229.14:04:35.91#ibcon#wrote, iclass 38, count 0 2006.229.14:04:35.91#ibcon#about to read 3, iclass 38, count 0 2006.229.14:04:35.93#ibcon#read 3, iclass 38, count 0 2006.229.14:04:35.93#ibcon#about to read 4, iclass 38, count 0 2006.229.14:04:35.93#ibcon#read 4, iclass 38, count 0 2006.229.14:04:35.93#ibcon#about to read 5, iclass 38, count 0 2006.229.14:04:35.93#ibcon#read 5, iclass 38, count 0 2006.229.14:04:35.93#ibcon#about to read 6, iclass 38, count 0 2006.229.14:04:35.93#ibcon#read 6, iclass 38, count 0 2006.229.14:04:35.93#ibcon#end of sib2, iclass 38, count 0 2006.229.14:04:35.93#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:04:35.93#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:04:35.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:04:35.93#ibcon#*before write, iclass 38, count 0 2006.229.14:04:35.93#ibcon#enter sib2, iclass 38, count 0 2006.229.14:04:35.93#ibcon#flushed, iclass 38, count 0 2006.229.14:04:35.93#ibcon#about to write, iclass 38, count 0 2006.229.14:04:35.93#ibcon#wrote, iclass 38, count 0 2006.229.14:04:35.93#ibcon#about to read 3, iclass 38, count 0 2006.229.14:04:35.97#ibcon#read 3, iclass 38, count 0 2006.229.14:04:35.97#ibcon#about to read 4, iclass 38, count 0 2006.229.14:04:35.97#ibcon#read 4, iclass 38, count 0 2006.229.14:04:35.97#ibcon#about to read 5, iclass 38, count 0 2006.229.14:04:35.97#ibcon#read 5, iclass 38, count 0 2006.229.14:04:35.97#ibcon#about to read 6, iclass 38, count 0 2006.229.14:04:35.97#ibcon#read 6, iclass 38, count 0 2006.229.14:04:35.97#ibcon#end of sib2, iclass 38, count 0 2006.229.14:04:35.97#ibcon#*after write, iclass 38, count 0 2006.229.14:04:35.97#ibcon#*before return 0, iclass 38, count 0 2006.229.14:04:35.97#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:35.97#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:04:35.97#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:04:35.97#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:04:35.97$vck44/vb=1,4 2006.229.14:04:35.97#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.14:04:35.97#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.14:04:35.97#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:35.97#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:35.97#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:35.97#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:35.97#ibcon#enter wrdev, iclass 40, count 2 2006.229.14:04:35.97#ibcon#first serial, iclass 40, count 2 2006.229.14:04:35.97#ibcon#enter sib2, iclass 40, count 2 2006.229.14:04:35.97#ibcon#flushed, iclass 40, count 2 2006.229.14:04:35.97#ibcon#about to write, iclass 40, count 2 2006.229.14:04:35.97#ibcon#wrote, iclass 40, count 2 2006.229.14:04:35.97#ibcon#about to read 3, iclass 40, count 2 2006.229.14:04:35.99#ibcon#read 3, iclass 40, count 2 2006.229.14:04:35.99#ibcon#about to read 4, iclass 40, count 2 2006.229.14:04:35.99#ibcon#read 4, iclass 40, count 2 2006.229.14:04:35.99#ibcon#about to read 5, iclass 40, count 2 2006.229.14:04:35.99#ibcon#read 5, iclass 40, count 2 2006.229.14:04:35.99#ibcon#about to read 6, iclass 40, count 2 2006.229.14:04:35.99#ibcon#read 6, iclass 40, count 2 2006.229.14:04:35.99#ibcon#end of sib2, iclass 40, count 2 2006.229.14:04:35.99#ibcon#*mode == 0, iclass 40, count 2 2006.229.14:04:35.99#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.14:04:35.99#ibcon#[27=AT01-04\r\n] 2006.229.14:04:35.99#ibcon#*before write, iclass 40, count 2 2006.229.14:04:35.99#ibcon#enter sib2, iclass 40, count 2 2006.229.14:04:35.99#ibcon#flushed, iclass 40, count 2 2006.229.14:04:35.99#ibcon#about to write, iclass 40, count 2 2006.229.14:04:35.99#ibcon#wrote, iclass 40, count 2 2006.229.14:04:35.99#ibcon#about to read 3, iclass 40, count 2 2006.229.14:04:36.02#ibcon#read 3, iclass 40, count 2 2006.229.14:04:36.02#ibcon#about to read 4, iclass 40, count 2 2006.229.14:04:36.02#ibcon#read 4, iclass 40, count 2 2006.229.14:04:36.02#ibcon#about to read 5, iclass 40, count 2 2006.229.14:04:36.02#ibcon#read 5, iclass 40, count 2 2006.229.14:04:36.02#ibcon#about to read 6, iclass 40, count 2 2006.229.14:04:36.02#ibcon#read 6, iclass 40, count 2 2006.229.14:04:36.02#ibcon#end of sib2, iclass 40, count 2 2006.229.14:04:36.02#ibcon#*after write, iclass 40, count 2 2006.229.14:04:36.02#ibcon#*before return 0, iclass 40, count 2 2006.229.14:04:36.02#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:36.02#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:04:36.02#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.14:04:36.02#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:36.02#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:36.14#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:36.14#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:36.14#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:04:36.14#ibcon#first serial, iclass 40, count 0 2006.229.14:04:36.14#ibcon#enter sib2, iclass 40, count 0 2006.229.14:04:36.14#ibcon#flushed, iclass 40, count 0 2006.229.14:04:36.14#ibcon#about to write, iclass 40, count 0 2006.229.14:04:36.14#ibcon#wrote, iclass 40, count 0 2006.229.14:04:36.14#ibcon#about to read 3, iclass 40, count 0 2006.229.14:04:36.16#ibcon#read 3, iclass 40, count 0 2006.229.14:04:36.16#ibcon#about to read 4, iclass 40, count 0 2006.229.14:04:36.16#ibcon#read 4, iclass 40, count 0 2006.229.14:04:36.16#ibcon#about to read 5, iclass 40, count 0 2006.229.14:04:36.16#ibcon#read 5, iclass 40, count 0 2006.229.14:04:36.16#ibcon#about to read 6, iclass 40, count 0 2006.229.14:04:36.16#ibcon#read 6, iclass 40, count 0 2006.229.14:04:36.16#ibcon#end of sib2, iclass 40, count 0 2006.229.14:04:36.16#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:04:36.16#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:04:36.16#ibcon#[27=USB\r\n] 2006.229.14:04:36.16#ibcon#*before write, iclass 40, count 0 2006.229.14:04:36.16#ibcon#enter sib2, iclass 40, count 0 2006.229.14:04:36.16#ibcon#flushed, iclass 40, count 0 2006.229.14:04:36.16#ibcon#about to write, iclass 40, count 0 2006.229.14:04:36.16#ibcon#wrote, iclass 40, count 0 2006.229.14:04:36.16#ibcon#about to read 3, iclass 40, count 0 2006.229.14:04:36.19#ibcon#read 3, iclass 40, count 0 2006.229.14:04:36.19#ibcon#about to read 4, iclass 40, count 0 2006.229.14:04:36.19#ibcon#read 4, iclass 40, count 0 2006.229.14:04:36.19#ibcon#about to read 5, iclass 40, count 0 2006.229.14:04:36.19#ibcon#read 5, iclass 40, count 0 2006.229.14:04:36.19#ibcon#about to read 6, iclass 40, count 0 2006.229.14:04:36.19#ibcon#read 6, iclass 40, count 0 2006.229.14:04:36.19#ibcon#end of sib2, iclass 40, count 0 2006.229.14:04:36.19#ibcon#*after write, iclass 40, count 0 2006.229.14:04:36.19#ibcon#*before return 0, iclass 40, count 0 2006.229.14:04:36.19#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:36.19#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:04:36.19#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:04:36.19#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:04:36.19$vck44/vblo=2,634.99 2006.229.14:04:36.19#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:04:36.19#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:04:36.19#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:36.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:36.19#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:36.19#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:36.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:04:36.19#ibcon#first serial, iclass 4, count 0 2006.229.14:04:36.19#ibcon#enter sib2, iclass 4, count 0 2006.229.14:04:36.19#ibcon#flushed, iclass 4, count 0 2006.229.14:04:36.19#ibcon#about to write, iclass 4, count 0 2006.229.14:04:36.19#ibcon#wrote, iclass 4, count 0 2006.229.14:04:36.19#ibcon#about to read 3, iclass 4, count 0 2006.229.14:04:36.21#ibcon#read 3, iclass 4, count 0 2006.229.14:04:36.21#ibcon#about to read 4, iclass 4, count 0 2006.229.14:04:36.21#ibcon#read 4, iclass 4, count 0 2006.229.14:04:36.21#ibcon#about to read 5, iclass 4, count 0 2006.229.14:04:36.21#ibcon#read 5, iclass 4, count 0 2006.229.14:04:36.21#ibcon#about to read 6, iclass 4, count 0 2006.229.14:04:36.21#ibcon#read 6, iclass 4, count 0 2006.229.14:04:36.21#ibcon#end of sib2, iclass 4, count 0 2006.229.14:04:36.21#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:04:36.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:04:36.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:04:36.21#ibcon#*before write, iclass 4, count 0 2006.229.14:04:36.21#ibcon#enter sib2, iclass 4, count 0 2006.229.14:04:36.21#ibcon#flushed, iclass 4, count 0 2006.229.14:04:36.21#ibcon#about to write, iclass 4, count 0 2006.229.14:04:36.21#ibcon#wrote, iclass 4, count 0 2006.229.14:04:36.21#ibcon#about to read 3, iclass 4, count 0 2006.229.14:04:36.25#ibcon#read 3, iclass 4, count 0 2006.229.14:04:36.25#ibcon#about to read 4, iclass 4, count 0 2006.229.14:04:36.25#ibcon#read 4, iclass 4, count 0 2006.229.14:04:36.25#ibcon#about to read 5, iclass 4, count 0 2006.229.14:04:36.25#ibcon#read 5, iclass 4, count 0 2006.229.14:04:36.25#ibcon#about to read 6, iclass 4, count 0 2006.229.14:04:36.25#ibcon#read 6, iclass 4, count 0 2006.229.14:04:36.25#ibcon#end of sib2, iclass 4, count 0 2006.229.14:04:36.25#ibcon#*after write, iclass 4, count 0 2006.229.14:04:36.25#ibcon#*before return 0, iclass 4, count 0 2006.229.14:04:36.25#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:36.25#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:04:36.25#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:04:36.25#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:04:36.25$vck44/vb=2,4 2006.229.14:04:36.25#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.14:04:36.25#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.14:04:36.25#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:36.25#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:36.31#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:36.31#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:36.31#ibcon#enter wrdev, iclass 6, count 2 2006.229.14:04:36.31#ibcon#first serial, iclass 6, count 2 2006.229.14:04:36.31#ibcon#enter sib2, iclass 6, count 2 2006.229.14:04:36.31#ibcon#flushed, iclass 6, count 2 2006.229.14:04:36.31#ibcon#about to write, iclass 6, count 2 2006.229.14:04:36.31#ibcon#wrote, iclass 6, count 2 2006.229.14:04:36.31#ibcon#about to read 3, iclass 6, count 2 2006.229.14:04:36.33#ibcon#read 3, iclass 6, count 2 2006.229.14:04:36.33#ibcon#about to read 4, iclass 6, count 2 2006.229.14:04:36.33#ibcon#read 4, iclass 6, count 2 2006.229.14:04:36.33#ibcon#about to read 5, iclass 6, count 2 2006.229.14:04:36.33#ibcon#read 5, iclass 6, count 2 2006.229.14:04:36.33#ibcon#about to read 6, iclass 6, count 2 2006.229.14:04:36.33#ibcon#read 6, iclass 6, count 2 2006.229.14:04:36.33#ibcon#end of sib2, iclass 6, count 2 2006.229.14:04:36.33#ibcon#*mode == 0, iclass 6, count 2 2006.229.14:04:36.33#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.14:04:36.33#ibcon#[27=AT02-04\r\n] 2006.229.14:04:36.33#ibcon#*before write, iclass 6, count 2 2006.229.14:04:36.33#ibcon#enter sib2, iclass 6, count 2 2006.229.14:04:36.33#ibcon#flushed, iclass 6, count 2 2006.229.14:04:36.33#ibcon#about to write, iclass 6, count 2 2006.229.14:04:36.33#ibcon#wrote, iclass 6, count 2 2006.229.14:04:36.33#ibcon#about to read 3, iclass 6, count 2 2006.229.14:04:36.36#ibcon#read 3, iclass 6, count 2 2006.229.14:04:36.36#ibcon#about to read 4, iclass 6, count 2 2006.229.14:04:36.36#ibcon#read 4, iclass 6, count 2 2006.229.14:04:36.36#ibcon#about to read 5, iclass 6, count 2 2006.229.14:04:36.36#ibcon#read 5, iclass 6, count 2 2006.229.14:04:36.36#ibcon#about to read 6, iclass 6, count 2 2006.229.14:04:36.36#ibcon#read 6, iclass 6, count 2 2006.229.14:04:36.36#ibcon#end of sib2, iclass 6, count 2 2006.229.14:04:36.36#ibcon#*after write, iclass 6, count 2 2006.229.14:04:36.36#ibcon#*before return 0, iclass 6, count 2 2006.229.14:04:36.36#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:36.37#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:04:36.37#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.14:04:36.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:36.37#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:36.49#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:36.49#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:36.49#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:04:36.49#ibcon#first serial, iclass 6, count 0 2006.229.14:04:36.49#ibcon#enter sib2, iclass 6, count 0 2006.229.14:04:36.49#ibcon#flushed, iclass 6, count 0 2006.229.14:04:36.49#ibcon#about to write, iclass 6, count 0 2006.229.14:04:36.49#ibcon#wrote, iclass 6, count 0 2006.229.14:04:36.49#ibcon#about to read 3, iclass 6, count 0 2006.229.14:04:36.51#ibcon#read 3, iclass 6, count 0 2006.229.14:04:36.51#ibcon#about to read 4, iclass 6, count 0 2006.229.14:04:36.51#ibcon#read 4, iclass 6, count 0 2006.229.14:04:36.51#ibcon#about to read 5, iclass 6, count 0 2006.229.14:04:36.51#ibcon#read 5, iclass 6, count 0 2006.229.14:04:36.51#ibcon#about to read 6, iclass 6, count 0 2006.229.14:04:36.51#ibcon#read 6, iclass 6, count 0 2006.229.14:04:36.51#ibcon#end of sib2, iclass 6, count 0 2006.229.14:04:36.51#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:04:36.51#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:04:36.51#ibcon#[27=USB\r\n] 2006.229.14:04:36.51#ibcon#*before write, iclass 6, count 0 2006.229.14:04:36.51#ibcon#enter sib2, iclass 6, count 0 2006.229.14:04:36.51#ibcon#flushed, iclass 6, count 0 2006.229.14:04:36.51#ibcon#about to write, iclass 6, count 0 2006.229.14:04:36.51#ibcon#wrote, iclass 6, count 0 2006.229.14:04:36.51#ibcon#about to read 3, iclass 6, count 0 2006.229.14:04:36.54#ibcon#read 3, iclass 6, count 0 2006.229.14:04:36.54#ibcon#about to read 4, iclass 6, count 0 2006.229.14:04:36.54#ibcon#read 4, iclass 6, count 0 2006.229.14:04:36.54#ibcon#about to read 5, iclass 6, count 0 2006.229.14:04:36.54#ibcon#read 5, iclass 6, count 0 2006.229.14:04:36.54#ibcon#about to read 6, iclass 6, count 0 2006.229.14:04:36.54#ibcon#read 6, iclass 6, count 0 2006.229.14:04:36.54#ibcon#end of sib2, iclass 6, count 0 2006.229.14:04:36.54#ibcon#*after write, iclass 6, count 0 2006.229.14:04:36.54#ibcon#*before return 0, iclass 6, count 0 2006.229.14:04:36.54#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:36.54#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:04:36.54#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:04:36.54#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:04:36.54$vck44/vblo=3,649.99 2006.229.14:04:36.54#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.14:04:36.54#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.14:04:36.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:36.54#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:36.54#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:36.54#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:36.54#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:04:36.54#ibcon#first serial, iclass 10, count 0 2006.229.14:04:36.54#ibcon#enter sib2, iclass 10, count 0 2006.229.14:04:36.54#ibcon#flushed, iclass 10, count 0 2006.229.14:04:36.54#ibcon#about to write, iclass 10, count 0 2006.229.14:04:36.54#ibcon#wrote, iclass 10, count 0 2006.229.14:04:36.54#ibcon#about to read 3, iclass 10, count 0 2006.229.14:04:36.56#ibcon#read 3, iclass 10, count 0 2006.229.14:04:36.56#ibcon#about to read 4, iclass 10, count 0 2006.229.14:04:36.56#ibcon#read 4, iclass 10, count 0 2006.229.14:04:36.56#ibcon#about to read 5, iclass 10, count 0 2006.229.14:04:36.56#ibcon#read 5, iclass 10, count 0 2006.229.14:04:36.56#ibcon#about to read 6, iclass 10, count 0 2006.229.14:04:36.56#ibcon#read 6, iclass 10, count 0 2006.229.14:04:36.56#ibcon#end of sib2, iclass 10, count 0 2006.229.14:04:36.56#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:04:36.56#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:04:36.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:04:36.56#ibcon#*before write, iclass 10, count 0 2006.229.14:04:36.56#ibcon#enter sib2, iclass 10, count 0 2006.229.14:04:36.56#ibcon#flushed, iclass 10, count 0 2006.229.14:04:36.56#ibcon#about to write, iclass 10, count 0 2006.229.14:04:36.56#ibcon#wrote, iclass 10, count 0 2006.229.14:04:36.56#ibcon#about to read 3, iclass 10, count 0 2006.229.14:04:36.60#ibcon#read 3, iclass 10, count 0 2006.229.14:04:36.60#ibcon#about to read 4, iclass 10, count 0 2006.229.14:04:36.60#ibcon#read 4, iclass 10, count 0 2006.229.14:04:36.60#ibcon#about to read 5, iclass 10, count 0 2006.229.14:04:36.60#ibcon#read 5, iclass 10, count 0 2006.229.14:04:36.60#ibcon#about to read 6, iclass 10, count 0 2006.229.14:04:36.60#ibcon#read 6, iclass 10, count 0 2006.229.14:04:36.60#ibcon#end of sib2, iclass 10, count 0 2006.229.14:04:36.60#ibcon#*after write, iclass 10, count 0 2006.229.14:04:36.60#ibcon#*before return 0, iclass 10, count 0 2006.229.14:04:36.60#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:36.60#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:04:36.60#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:04:36.60#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:04:36.60$vck44/vb=3,4 2006.229.14:04:36.60#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.14:04:36.60#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.14:04:36.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:36.60#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:36.66#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:36.66#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:36.66#ibcon#enter wrdev, iclass 12, count 2 2006.229.14:04:36.66#ibcon#first serial, iclass 12, count 2 2006.229.14:04:36.66#ibcon#enter sib2, iclass 12, count 2 2006.229.14:04:36.66#ibcon#flushed, iclass 12, count 2 2006.229.14:04:36.66#ibcon#about to write, iclass 12, count 2 2006.229.14:04:36.66#ibcon#wrote, iclass 12, count 2 2006.229.14:04:36.66#ibcon#about to read 3, iclass 12, count 2 2006.229.14:04:36.68#ibcon#read 3, iclass 12, count 2 2006.229.14:04:36.68#ibcon#about to read 4, iclass 12, count 2 2006.229.14:04:36.68#ibcon#read 4, iclass 12, count 2 2006.229.14:04:36.68#ibcon#about to read 5, iclass 12, count 2 2006.229.14:04:36.68#ibcon#read 5, iclass 12, count 2 2006.229.14:04:36.68#ibcon#about to read 6, iclass 12, count 2 2006.229.14:04:36.68#ibcon#read 6, iclass 12, count 2 2006.229.14:04:36.68#ibcon#end of sib2, iclass 12, count 2 2006.229.14:04:36.68#ibcon#*mode == 0, iclass 12, count 2 2006.229.14:04:36.68#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.14:04:36.68#ibcon#[27=AT03-04\r\n] 2006.229.14:04:36.68#ibcon#*before write, iclass 12, count 2 2006.229.14:04:36.68#ibcon#enter sib2, iclass 12, count 2 2006.229.14:04:36.68#ibcon#flushed, iclass 12, count 2 2006.229.14:04:36.68#ibcon#about to write, iclass 12, count 2 2006.229.14:04:36.68#ibcon#wrote, iclass 12, count 2 2006.229.14:04:36.68#ibcon#about to read 3, iclass 12, count 2 2006.229.14:04:36.71#ibcon#read 3, iclass 12, count 2 2006.229.14:04:36.71#ibcon#about to read 4, iclass 12, count 2 2006.229.14:04:36.71#ibcon#read 4, iclass 12, count 2 2006.229.14:04:36.71#ibcon#about to read 5, iclass 12, count 2 2006.229.14:04:36.71#ibcon#read 5, iclass 12, count 2 2006.229.14:04:36.71#ibcon#about to read 6, iclass 12, count 2 2006.229.14:04:36.71#ibcon#read 6, iclass 12, count 2 2006.229.14:04:36.71#ibcon#end of sib2, iclass 12, count 2 2006.229.14:04:36.71#ibcon#*after write, iclass 12, count 2 2006.229.14:04:36.71#ibcon#*before return 0, iclass 12, count 2 2006.229.14:04:36.71#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:36.71#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:04:36.71#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.14:04:36.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:36.71#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:36.83#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:36.83#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:36.83#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:04:36.83#ibcon#first serial, iclass 12, count 0 2006.229.14:04:36.83#ibcon#enter sib2, iclass 12, count 0 2006.229.14:04:36.83#ibcon#flushed, iclass 12, count 0 2006.229.14:04:36.83#ibcon#about to write, iclass 12, count 0 2006.229.14:04:36.83#ibcon#wrote, iclass 12, count 0 2006.229.14:04:36.83#ibcon#about to read 3, iclass 12, count 0 2006.229.14:04:36.85#ibcon#read 3, iclass 12, count 0 2006.229.14:04:36.85#ibcon#about to read 4, iclass 12, count 0 2006.229.14:04:36.85#ibcon#read 4, iclass 12, count 0 2006.229.14:04:36.85#ibcon#about to read 5, iclass 12, count 0 2006.229.14:04:36.85#ibcon#read 5, iclass 12, count 0 2006.229.14:04:36.85#ibcon#about to read 6, iclass 12, count 0 2006.229.14:04:36.85#ibcon#read 6, iclass 12, count 0 2006.229.14:04:36.85#ibcon#end of sib2, iclass 12, count 0 2006.229.14:04:36.85#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:04:36.85#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:04:36.85#ibcon#[27=USB\r\n] 2006.229.14:04:36.85#ibcon#*before write, iclass 12, count 0 2006.229.14:04:36.85#ibcon#enter sib2, iclass 12, count 0 2006.229.14:04:36.85#ibcon#flushed, iclass 12, count 0 2006.229.14:04:36.85#ibcon#about to write, iclass 12, count 0 2006.229.14:04:36.85#ibcon#wrote, iclass 12, count 0 2006.229.14:04:36.85#ibcon#about to read 3, iclass 12, count 0 2006.229.14:04:36.88#ibcon#read 3, iclass 12, count 0 2006.229.14:04:36.88#ibcon#about to read 4, iclass 12, count 0 2006.229.14:04:36.88#ibcon#read 4, iclass 12, count 0 2006.229.14:04:36.88#ibcon#about to read 5, iclass 12, count 0 2006.229.14:04:36.88#ibcon#read 5, iclass 12, count 0 2006.229.14:04:36.88#ibcon#about to read 6, iclass 12, count 0 2006.229.14:04:36.88#ibcon#read 6, iclass 12, count 0 2006.229.14:04:36.88#ibcon#end of sib2, iclass 12, count 0 2006.229.14:04:36.88#ibcon#*after write, iclass 12, count 0 2006.229.14:04:36.88#ibcon#*before return 0, iclass 12, count 0 2006.229.14:04:36.88#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:36.88#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:04:36.88#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:04:36.88#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:04:36.88$vck44/vblo=4,679.99 2006.229.14:04:36.88#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.14:04:36.88#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.14:04:36.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:36.88#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:36.88#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:36.88#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:36.88#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:04:36.88#ibcon#first serial, iclass 14, count 0 2006.229.14:04:36.88#ibcon#enter sib2, iclass 14, count 0 2006.229.14:04:36.88#ibcon#flushed, iclass 14, count 0 2006.229.14:04:36.88#ibcon#about to write, iclass 14, count 0 2006.229.14:04:36.88#ibcon#wrote, iclass 14, count 0 2006.229.14:04:36.88#ibcon#about to read 3, iclass 14, count 0 2006.229.14:04:36.90#ibcon#read 3, iclass 14, count 0 2006.229.14:04:36.90#ibcon#about to read 4, iclass 14, count 0 2006.229.14:04:36.90#ibcon#read 4, iclass 14, count 0 2006.229.14:04:36.90#ibcon#about to read 5, iclass 14, count 0 2006.229.14:04:36.90#ibcon#read 5, iclass 14, count 0 2006.229.14:04:36.90#ibcon#about to read 6, iclass 14, count 0 2006.229.14:04:36.90#ibcon#read 6, iclass 14, count 0 2006.229.14:04:36.90#ibcon#end of sib2, iclass 14, count 0 2006.229.14:04:36.90#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:04:36.90#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:04:36.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:04:36.90#ibcon#*before write, iclass 14, count 0 2006.229.14:04:36.90#ibcon#enter sib2, iclass 14, count 0 2006.229.14:04:36.90#ibcon#flushed, iclass 14, count 0 2006.229.14:04:36.90#ibcon#about to write, iclass 14, count 0 2006.229.14:04:36.90#ibcon#wrote, iclass 14, count 0 2006.229.14:04:36.90#ibcon#about to read 3, iclass 14, count 0 2006.229.14:04:36.94#ibcon#read 3, iclass 14, count 0 2006.229.14:04:36.94#ibcon#about to read 4, iclass 14, count 0 2006.229.14:04:36.94#ibcon#read 4, iclass 14, count 0 2006.229.14:04:36.94#ibcon#about to read 5, iclass 14, count 0 2006.229.14:04:36.94#ibcon#read 5, iclass 14, count 0 2006.229.14:04:36.94#ibcon#about to read 6, iclass 14, count 0 2006.229.14:04:36.94#ibcon#read 6, iclass 14, count 0 2006.229.14:04:36.94#ibcon#end of sib2, iclass 14, count 0 2006.229.14:04:36.94#ibcon#*after write, iclass 14, count 0 2006.229.14:04:36.94#ibcon#*before return 0, iclass 14, count 0 2006.229.14:04:36.94#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:36.94#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:04:36.94#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:04:36.94#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:04:36.94$vck44/vb=4,4 2006.229.14:04:36.94#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.14:04:36.94#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.14:04:36.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:36.94#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:04:37.00#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:04:37.00#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:04:37.00#ibcon#enter wrdev, iclass 16, count 2 2006.229.14:04:37.00#ibcon#first serial, iclass 16, count 2 2006.229.14:04:37.00#ibcon#enter sib2, iclass 16, count 2 2006.229.14:04:37.00#ibcon#flushed, iclass 16, count 2 2006.229.14:04:37.00#ibcon#about to write, iclass 16, count 2 2006.229.14:04:37.00#ibcon#wrote, iclass 16, count 2 2006.229.14:04:37.00#ibcon#about to read 3, iclass 16, count 2 2006.229.14:04:37.02#ibcon#read 3, iclass 16, count 2 2006.229.14:04:37.02#ibcon#about to read 4, iclass 16, count 2 2006.229.14:04:37.02#ibcon#read 4, iclass 16, count 2 2006.229.14:04:37.02#ibcon#about to read 5, iclass 16, count 2 2006.229.14:04:37.02#ibcon#read 5, iclass 16, count 2 2006.229.14:04:37.02#ibcon#about to read 6, iclass 16, count 2 2006.229.14:04:37.02#ibcon#read 6, iclass 16, count 2 2006.229.14:04:37.02#ibcon#end of sib2, iclass 16, count 2 2006.229.14:04:37.02#ibcon#*mode == 0, iclass 16, count 2 2006.229.14:04:37.02#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.14:04:37.02#ibcon#[27=AT04-04\r\n] 2006.229.14:04:37.02#ibcon#*before write, iclass 16, count 2 2006.229.14:04:37.02#ibcon#enter sib2, iclass 16, count 2 2006.229.14:04:37.02#ibcon#flushed, iclass 16, count 2 2006.229.14:04:37.02#ibcon#about to write, iclass 16, count 2 2006.229.14:04:37.02#ibcon#wrote, iclass 16, count 2 2006.229.14:04:37.02#ibcon#about to read 3, iclass 16, count 2 2006.229.14:04:37.05#ibcon#read 3, iclass 16, count 2 2006.229.14:04:37.05#ibcon#about to read 4, iclass 16, count 2 2006.229.14:04:37.05#ibcon#read 4, iclass 16, count 2 2006.229.14:04:37.05#ibcon#about to read 5, iclass 16, count 2 2006.229.14:04:37.05#ibcon#read 5, iclass 16, count 2 2006.229.14:04:37.05#ibcon#about to read 6, iclass 16, count 2 2006.229.14:04:37.05#ibcon#read 6, iclass 16, count 2 2006.229.14:04:37.05#ibcon#end of sib2, iclass 16, count 2 2006.229.14:04:37.05#ibcon#*after write, iclass 16, count 2 2006.229.14:04:37.05#ibcon#*before return 0, iclass 16, count 2 2006.229.14:04:37.05#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:04:37.05#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:04:37.05#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.14:04:37.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:37.05#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:04:37.17#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:04:37.17#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:04:37.17#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:04:37.17#ibcon#first serial, iclass 16, count 0 2006.229.14:04:37.17#ibcon#enter sib2, iclass 16, count 0 2006.229.14:04:37.17#ibcon#flushed, iclass 16, count 0 2006.229.14:04:37.17#ibcon#about to write, iclass 16, count 0 2006.229.14:04:37.17#ibcon#wrote, iclass 16, count 0 2006.229.14:04:37.17#ibcon#about to read 3, iclass 16, count 0 2006.229.14:04:37.19#ibcon#read 3, iclass 16, count 0 2006.229.14:04:37.19#ibcon#about to read 4, iclass 16, count 0 2006.229.14:04:37.19#ibcon#read 4, iclass 16, count 0 2006.229.14:04:37.19#ibcon#about to read 5, iclass 16, count 0 2006.229.14:04:37.19#ibcon#read 5, iclass 16, count 0 2006.229.14:04:37.19#ibcon#about to read 6, iclass 16, count 0 2006.229.14:04:37.19#ibcon#read 6, iclass 16, count 0 2006.229.14:04:37.19#ibcon#end of sib2, iclass 16, count 0 2006.229.14:04:37.19#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:04:37.19#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:04:37.19#ibcon#[27=USB\r\n] 2006.229.14:04:37.19#ibcon#*before write, iclass 16, count 0 2006.229.14:04:37.19#ibcon#enter sib2, iclass 16, count 0 2006.229.14:04:37.19#ibcon#flushed, iclass 16, count 0 2006.229.14:04:37.19#ibcon#about to write, iclass 16, count 0 2006.229.14:04:37.19#ibcon#wrote, iclass 16, count 0 2006.229.14:04:37.19#ibcon#about to read 3, iclass 16, count 0 2006.229.14:04:37.22#ibcon#read 3, iclass 16, count 0 2006.229.14:04:37.22#ibcon#about to read 4, iclass 16, count 0 2006.229.14:04:37.22#ibcon#read 4, iclass 16, count 0 2006.229.14:04:37.22#ibcon#about to read 5, iclass 16, count 0 2006.229.14:04:37.22#ibcon#read 5, iclass 16, count 0 2006.229.14:04:37.22#ibcon#about to read 6, iclass 16, count 0 2006.229.14:04:37.22#ibcon#read 6, iclass 16, count 0 2006.229.14:04:37.22#ibcon#end of sib2, iclass 16, count 0 2006.229.14:04:37.22#ibcon#*after write, iclass 16, count 0 2006.229.14:04:37.22#ibcon#*before return 0, iclass 16, count 0 2006.229.14:04:37.22#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:04:37.22#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:04:37.22#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:04:37.22#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:04:37.22$vck44/vblo=5,709.99 2006.229.14:04:37.22#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.14:04:37.22#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.14:04:37.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:37.22#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:04:37.22#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:04:37.22#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:04:37.22#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:04:37.22#ibcon#first serial, iclass 18, count 0 2006.229.14:04:37.22#ibcon#enter sib2, iclass 18, count 0 2006.229.14:04:37.22#ibcon#flushed, iclass 18, count 0 2006.229.14:04:37.22#ibcon#about to write, iclass 18, count 0 2006.229.14:04:37.22#ibcon#wrote, iclass 18, count 0 2006.229.14:04:37.22#ibcon#about to read 3, iclass 18, count 0 2006.229.14:04:37.24#ibcon#read 3, iclass 18, count 0 2006.229.14:04:37.24#ibcon#about to read 4, iclass 18, count 0 2006.229.14:04:37.24#ibcon#read 4, iclass 18, count 0 2006.229.14:04:37.24#ibcon#about to read 5, iclass 18, count 0 2006.229.14:04:37.24#ibcon#read 5, iclass 18, count 0 2006.229.14:04:37.24#ibcon#about to read 6, iclass 18, count 0 2006.229.14:04:37.24#ibcon#read 6, iclass 18, count 0 2006.229.14:04:37.24#ibcon#end of sib2, iclass 18, count 0 2006.229.14:04:37.24#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:04:37.24#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:04:37.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:04:37.24#ibcon#*before write, iclass 18, count 0 2006.229.14:04:37.24#ibcon#enter sib2, iclass 18, count 0 2006.229.14:04:37.24#ibcon#flushed, iclass 18, count 0 2006.229.14:04:37.24#ibcon#about to write, iclass 18, count 0 2006.229.14:04:37.24#ibcon#wrote, iclass 18, count 0 2006.229.14:04:37.24#ibcon#about to read 3, iclass 18, count 0 2006.229.14:04:37.28#ibcon#read 3, iclass 18, count 0 2006.229.14:04:37.28#ibcon#about to read 4, iclass 18, count 0 2006.229.14:04:37.28#ibcon#read 4, iclass 18, count 0 2006.229.14:04:37.28#ibcon#about to read 5, iclass 18, count 0 2006.229.14:04:37.28#ibcon#read 5, iclass 18, count 0 2006.229.14:04:37.28#ibcon#about to read 6, iclass 18, count 0 2006.229.14:04:37.28#ibcon#read 6, iclass 18, count 0 2006.229.14:04:37.28#ibcon#end of sib2, iclass 18, count 0 2006.229.14:04:37.28#ibcon#*after write, iclass 18, count 0 2006.229.14:04:37.28#ibcon#*before return 0, iclass 18, count 0 2006.229.14:04:37.28#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:04:37.28#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:04:37.28#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:04:37.28#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:04:37.28$vck44/vb=5,4 2006.229.14:04:37.28#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.14:04:37.28#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.14:04:37.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:37.28#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:04:37.34#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:04:37.34#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:04:37.34#ibcon#enter wrdev, iclass 20, count 2 2006.229.14:04:37.34#ibcon#first serial, iclass 20, count 2 2006.229.14:04:37.34#ibcon#enter sib2, iclass 20, count 2 2006.229.14:04:37.34#ibcon#flushed, iclass 20, count 2 2006.229.14:04:37.34#ibcon#about to write, iclass 20, count 2 2006.229.14:04:37.34#ibcon#wrote, iclass 20, count 2 2006.229.14:04:37.34#ibcon#about to read 3, iclass 20, count 2 2006.229.14:04:37.36#ibcon#read 3, iclass 20, count 2 2006.229.14:04:37.36#ibcon#about to read 4, iclass 20, count 2 2006.229.14:04:37.36#ibcon#read 4, iclass 20, count 2 2006.229.14:04:37.36#ibcon#about to read 5, iclass 20, count 2 2006.229.14:04:37.36#ibcon#read 5, iclass 20, count 2 2006.229.14:04:37.36#ibcon#about to read 6, iclass 20, count 2 2006.229.14:04:37.36#ibcon#read 6, iclass 20, count 2 2006.229.14:04:37.36#ibcon#end of sib2, iclass 20, count 2 2006.229.14:04:37.36#ibcon#*mode == 0, iclass 20, count 2 2006.229.14:04:37.36#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.14:04:37.36#ibcon#[27=AT05-04\r\n] 2006.229.14:04:37.36#ibcon#*before write, iclass 20, count 2 2006.229.14:04:37.36#ibcon#enter sib2, iclass 20, count 2 2006.229.14:04:37.36#ibcon#flushed, iclass 20, count 2 2006.229.14:04:37.36#ibcon#about to write, iclass 20, count 2 2006.229.14:04:37.36#ibcon#wrote, iclass 20, count 2 2006.229.14:04:37.36#ibcon#about to read 3, iclass 20, count 2 2006.229.14:04:37.39#ibcon#read 3, iclass 20, count 2 2006.229.14:04:37.39#ibcon#about to read 4, iclass 20, count 2 2006.229.14:04:37.39#ibcon#read 4, iclass 20, count 2 2006.229.14:04:37.39#ibcon#about to read 5, iclass 20, count 2 2006.229.14:04:37.39#ibcon#read 5, iclass 20, count 2 2006.229.14:04:37.39#ibcon#about to read 6, iclass 20, count 2 2006.229.14:04:37.39#ibcon#read 6, iclass 20, count 2 2006.229.14:04:37.39#ibcon#end of sib2, iclass 20, count 2 2006.229.14:04:37.39#ibcon#*after write, iclass 20, count 2 2006.229.14:04:37.39#ibcon#*before return 0, iclass 20, count 2 2006.229.14:04:37.39#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:04:37.39#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:04:37.39#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.14:04:37.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:37.39#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:04:37.51#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:04:37.51#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:04:37.51#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:04:37.51#ibcon#first serial, iclass 20, count 0 2006.229.14:04:37.51#ibcon#enter sib2, iclass 20, count 0 2006.229.14:04:37.51#ibcon#flushed, iclass 20, count 0 2006.229.14:04:37.51#ibcon#about to write, iclass 20, count 0 2006.229.14:04:37.51#ibcon#wrote, iclass 20, count 0 2006.229.14:04:37.51#ibcon#about to read 3, iclass 20, count 0 2006.229.14:04:37.53#ibcon#read 3, iclass 20, count 0 2006.229.14:04:37.53#ibcon#about to read 4, iclass 20, count 0 2006.229.14:04:37.53#ibcon#read 4, iclass 20, count 0 2006.229.14:04:37.53#ibcon#about to read 5, iclass 20, count 0 2006.229.14:04:37.53#ibcon#read 5, iclass 20, count 0 2006.229.14:04:37.53#ibcon#about to read 6, iclass 20, count 0 2006.229.14:04:37.53#ibcon#read 6, iclass 20, count 0 2006.229.14:04:37.53#ibcon#end of sib2, iclass 20, count 0 2006.229.14:04:37.53#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:04:37.53#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:04:37.53#ibcon#[27=USB\r\n] 2006.229.14:04:37.53#ibcon#*before write, iclass 20, count 0 2006.229.14:04:37.53#ibcon#enter sib2, iclass 20, count 0 2006.229.14:04:37.53#ibcon#flushed, iclass 20, count 0 2006.229.14:04:37.53#ibcon#about to write, iclass 20, count 0 2006.229.14:04:37.53#ibcon#wrote, iclass 20, count 0 2006.229.14:04:37.53#ibcon#about to read 3, iclass 20, count 0 2006.229.14:04:37.56#ibcon#read 3, iclass 20, count 0 2006.229.14:04:37.56#ibcon#about to read 4, iclass 20, count 0 2006.229.14:04:37.56#ibcon#read 4, iclass 20, count 0 2006.229.14:04:37.56#ibcon#about to read 5, iclass 20, count 0 2006.229.14:04:37.56#ibcon#read 5, iclass 20, count 0 2006.229.14:04:37.56#ibcon#about to read 6, iclass 20, count 0 2006.229.14:04:37.56#ibcon#read 6, iclass 20, count 0 2006.229.14:04:37.56#ibcon#end of sib2, iclass 20, count 0 2006.229.14:04:37.56#ibcon#*after write, iclass 20, count 0 2006.229.14:04:37.56#ibcon#*before return 0, iclass 20, count 0 2006.229.14:04:37.56#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:04:37.56#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:04:37.56#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:04:37.56#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:04:37.56$vck44/vblo=6,719.99 2006.229.14:04:37.56#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:04:37.56#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:04:37.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:37.56#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:37.56#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:37.56#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:37.56#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:04:37.56#ibcon#first serial, iclass 22, count 0 2006.229.14:04:37.56#ibcon#enter sib2, iclass 22, count 0 2006.229.14:04:37.56#ibcon#flushed, iclass 22, count 0 2006.229.14:04:37.56#ibcon#about to write, iclass 22, count 0 2006.229.14:04:37.56#ibcon#wrote, iclass 22, count 0 2006.229.14:04:37.56#ibcon#about to read 3, iclass 22, count 0 2006.229.14:04:37.58#ibcon#read 3, iclass 22, count 0 2006.229.14:04:37.58#ibcon#about to read 4, iclass 22, count 0 2006.229.14:04:37.58#ibcon#read 4, iclass 22, count 0 2006.229.14:04:37.58#ibcon#about to read 5, iclass 22, count 0 2006.229.14:04:37.58#ibcon#read 5, iclass 22, count 0 2006.229.14:04:37.58#ibcon#about to read 6, iclass 22, count 0 2006.229.14:04:37.58#ibcon#read 6, iclass 22, count 0 2006.229.14:04:37.58#ibcon#end of sib2, iclass 22, count 0 2006.229.14:04:37.58#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:04:37.58#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:04:37.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:04:37.58#ibcon#*before write, iclass 22, count 0 2006.229.14:04:37.58#ibcon#enter sib2, iclass 22, count 0 2006.229.14:04:37.58#ibcon#flushed, iclass 22, count 0 2006.229.14:04:37.58#ibcon#about to write, iclass 22, count 0 2006.229.14:04:37.58#ibcon#wrote, iclass 22, count 0 2006.229.14:04:37.58#ibcon#about to read 3, iclass 22, count 0 2006.229.14:04:37.62#ibcon#read 3, iclass 22, count 0 2006.229.14:04:37.62#ibcon#about to read 4, iclass 22, count 0 2006.229.14:04:37.62#ibcon#read 4, iclass 22, count 0 2006.229.14:04:37.62#ibcon#about to read 5, iclass 22, count 0 2006.229.14:04:37.62#ibcon#read 5, iclass 22, count 0 2006.229.14:04:37.62#ibcon#about to read 6, iclass 22, count 0 2006.229.14:04:37.62#ibcon#read 6, iclass 22, count 0 2006.229.14:04:37.62#ibcon#end of sib2, iclass 22, count 0 2006.229.14:04:37.62#ibcon#*after write, iclass 22, count 0 2006.229.14:04:37.62#ibcon#*before return 0, iclass 22, count 0 2006.229.14:04:37.62#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:37.62#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:04:37.62#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:04:37.62#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:04:37.62$vck44/vb=6,4 2006.229.14:04:37.62#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.14:04:37.62#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.14:04:37.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:37.62#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:37.68#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:37.68#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:37.68#ibcon#enter wrdev, iclass 24, count 2 2006.229.14:04:37.68#ibcon#first serial, iclass 24, count 2 2006.229.14:04:37.68#ibcon#enter sib2, iclass 24, count 2 2006.229.14:04:37.68#ibcon#flushed, iclass 24, count 2 2006.229.14:04:37.68#ibcon#about to write, iclass 24, count 2 2006.229.14:04:37.68#ibcon#wrote, iclass 24, count 2 2006.229.14:04:37.68#ibcon#about to read 3, iclass 24, count 2 2006.229.14:04:37.70#ibcon#read 3, iclass 24, count 2 2006.229.14:04:37.70#ibcon#about to read 4, iclass 24, count 2 2006.229.14:04:37.70#ibcon#read 4, iclass 24, count 2 2006.229.14:04:37.70#ibcon#about to read 5, iclass 24, count 2 2006.229.14:04:37.70#ibcon#read 5, iclass 24, count 2 2006.229.14:04:37.70#ibcon#about to read 6, iclass 24, count 2 2006.229.14:04:37.70#ibcon#read 6, iclass 24, count 2 2006.229.14:04:37.70#ibcon#end of sib2, iclass 24, count 2 2006.229.14:04:37.70#ibcon#*mode == 0, iclass 24, count 2 2006.229.14:04:37.70#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.14:04:37.70#ibcon#[27=AT06-04\r\n] 2006.229.14:04:37.70#ibcon#*before write, iclass 24, count 2 2006.229.14:04:37.70#ibcon#enter sib2, iclass 24, count 2 2006.229.14:04:37.70#ibcon#flushed, iclass 24, count 2 2006.229.14:04:37.70#ibcon#about to write, iclass 24, count 2 2006.229.14:04:37.70#ibcon#wrote, iclass 24, count 2 2006.229.14:04:37.70#ibcon#about to read 3, iclass 24, count 2 2006.229.14:04:37.73#ibcon#read 3, iclass 24, count 2 2006.229.14:04:37.73#ibcon#about to read 4, iclass 24, count 2 2006.229.14:04:37.73#ibcon#read 4, iclass 24, count 2 2006.229.14:04:37.73#ibcon#about to read 5, iclass 24, count 2 2006.229.14:04:37.73#ibcon#read 5, iclass 24, count 2 2006.229.14:04:37.73#ibcon#about to read 6, iclass 24, count 2 2006.229.14:04:37.73#ibcon#read 6, iclass 24, count 2 2006.229.14:04:37.73#ibcon#end of sib2, iclass 24, count 2 2006.229.14:04:37.73#ibcon#*after write, iclass 24, count 2 2006.229.14:04:37.73#ibcon#*before return 0, iclass 24, count 2 2006.229.14:04:37.73#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:37.73#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:04:37.73#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.14:04:37.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:37.73#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:37.85#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:37.85#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:37.85#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:04:37.85#ibcon#first serial, iclass 24, count 0 2006.229.14:04:37.85#ibcon#enter sib2, iclass 24, count 0 2006.229.14:04:37.85#ibcon#flushed, iclass 24, count 0 2006.229.14:04:37.85#ibcon#about to write, iclass 24, count 0 2006.229.14:04:37.85#ibcon#wrote, iclass 24, count 0 2006.229.14:04:37.85#ibcon#about to read 3, iclass 24, count 0 2006.229.14:04:37.87#ibcon#read 3, iclass 24, count 0 2006.229.14:04:37.87#ibcon#about to read 4, iclass 24, count 0 2006.229.14:04:37.87#ibcon#read 4, iclass 24, count 0 2006.229.14:04:37.87#ibcon#about to read 5, iclass 24, count 0 2006.229.14:04:37.87#ibcon#read 5, iclass 24, count 0 2006.229.14:04:37.87#ibcon#about to read 6, iclass 24, count 0 2006.229.14:04:37.87#ibcon#read 6, iclass 24, count 0 2006.229.14:04:37.87#ibcon#end of sib2, iclass 24, count 0 2006.229.14:04:37.87#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:04:37.87#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:04:37.87#ibcon#[27=USB\r\n] 2006.229.14:04:37.87#ibcon#*before write, iclass 24, count 0 2006.229.14:04:37.87#ibcon#enter sib2, iclass 24, count 0 2006.229.14:04:37.87#ibcon#flushed, iclass 24, count 0 2006.229.14:04:37.87#ibcon#about to write, iclass 24, count 0 2006.229.14:04:37.87#ibcon#wrote, iclass 24, count 0 2006.229.14:04:37.87#ibcon#about to read 3, iclass 24, count 0 2006.229.14:04:37.90#ibcon#read 3, iclass 24, count 0 2006.229.14:04:37.90#ibcon#about to read 4, iclass 24, count 0 2006.229.14:04:37.90#ibcon#read 4, iclass 24, count 0 2006.229.14:04:37.90#ibcon#about to read 5, iclass 24, count 0 2006.229.14:04:37.90#ibcon#read 5, iclass 24, count 0 2006.229.14:04:37.90#ibcon#about to read 6, iclass 24, count 0 2006.229.14:04:37.90#ibcon#read 6, iclass 24, count 0 2006.229.14:04:37.90#ibcon#end of sib2, iclass 24, count 0 2006.229.14:04:37.90#ibcon#*after write, iclass 24, count 0 2006.229.14:04:37.90#ibcon#*before return 0, iclass 24, count 0 2006.229.14:04:37.90#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:37.90#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:04:37.90#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:04:37.90#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:04:37.90$vck44/vblo=7,734.99 2006.229.14:04:37.90#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.14:04:37.90#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.14:04:37.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:37.90#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:37.90#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:37.90#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:37.90#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:04:37.90#ibcon#first serial, iclass 26, count 0 2006.229.14:04:37.90#ibcon#enter sib2, iclass 26, count 0 2006.229.14:04:37.90#ibcon#flushed, iclass 26, count 0 2006.229.14:04:37.90#ibcon#about to write, iclass 26, count 0 2006.229.14:04:37.90#ibcon#wrote, iclass 26, count 0 2006.229.14:04:37.90#ibcon#about to read 3, iclass 26, count 0 2006.229.14:04:37.92#ibcon#read 3, iclass 26, count 0 2006.229.14:04:37.92#ibcon#about to read 4, iclass 26, count 0 2006.229.14:04:37.92#ibcon#read 4, iclass 26, count 0 2006.229.14:04:37.92#ibcon#about to read 5, iclass 26, count 0 2006.229.14:04:37.92#ibcon#read 5, iclass 26, count 0 2006.229.14:04:37.92#ibcon#about to read 6, iclass 26, count 0 2006.229.14:04:37.92#ibcon#read 6, iclass 26, count 0 2006.229.14:04:37.92#ibcon#end of sib2, iclass 26, count 0 2006.229.14:04:37.92#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:04:37.92#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:04:37.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:04:37.92#ibcon#*before write, iclass 26, count 0 2006.229.14:04:37.92#ibcon#enter sib2, iclass 26, count 0 2006.229.14:04:37.92#ibcon#flushed, iclass 26, count 0 2006.229.14:04:37.92#ibcon#about to write, iclass 26, count 0 2006.229.14:04:37.92#ibcon#wrote, iclass 26, count 0 2006.229.14:04:37.92#ibcon#about to read 3, iclass 26, count 0 2006.229.14:04:37.96#ibcon#read 3, iclass 26, count 0 2006.229.14:04:37.96#ibcon#about to read 4, iclass 26, count 0 2006.229.14:04:37.96#ibcon#read 4, iclass 26, count 0 2006.229.14:04:37.96#ibcon#about to read 5, iclass 26, count 0 2006.229.14:04:37.96#ibcon#read 5, iclass 26, count 0 2006.229.14:04:37.96#ibcon#about to read 6, iclass 26, count 0 2006.229.14:04:37.96#ibcon#read 6, iclass 26, count 0 2006.229.14:04:37.96#ibcon#end of sib2, iclass 26, count 0 2006.229.14:04:37.96#ibcon#*after write, iclass 26, count 0 2006.229.14:04:37.96#ibcon#*before return 0, iclass 26, count 0 2006.229.14:04:37.96#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:37.96#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:04:37.96#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:04:37.96#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:04:37.96$vck44/vb=7,4 2006.229.14:04:37.96#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.14:04:37.96#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.14:04:37.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:37.96#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:38.02#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:38.02#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:38.02#ibcon#enter wrdev, iclass 28, count 2 2006.229.14:04:38.02#ibcon#first serial, iclass 28, count 2 2006.229.14:04:38.02#ibcon#enter sib2, iclass 28, count 2 2006.229.14:04:38.02#ibcon#flushed, iclass 28, count 2 2006.229.14:04:38.02#ibcon#about to write, iclass 28, count 2 2006.229.14:04:38.02#ibcon#wrote, iclass 28, count 2 2006.229.14:04:38.02#ibcon#about to read 3, iclass 28, count 2 2006.229.14:04:38.04#ibcon#read 3, iclass 28, count 2 2006.229.14:04:38.04#ibcon#about to read 4, iclass 28, count 2 2006.229.14:04:38.04#ibcon#read 4, iclass 28, count 2 2006.229.14:04:38.04#ibcon#about to read 5, iclass 28, count 2 2006.229.14:04:38.04#ibcon#read 5, iclass 28, count 2 2006.229.14:04:38.04#ibcon#about to read 6, iclass 28, count 2 2006.229.14:04:38.04#ibcon#read 6, iclass 28, count 2 2006.229.14:04:38.04#ibcon#end of sib2, iclass 28, count 2 2006.229.14:04:38.04#ibcon#*mode == 0, iclass 28, count 2 2006.229.14:04:38.04#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.14:04:38.04#ibcon#[27=AT07-04\r\n] 2006.229.14:04:38.04#ibcon#*before write, iclass 28, count 2 2006.229.14:04:38.04#ibcon#enter sib2, iclass 28, count 2 2006.229.14:04:38.04#ibcon#flushed, iclass 28, count 2 2006.229.14:04:38.04#ibcon#about to write, iclass 28, count 2 2006.229.14:04:38.04#ibcon#wrote, iclass 28, count 2 2006.229.14:04:38.04#ibcon#about to read 3, iclass 28, count 2 2006.229.14:04:38.07#ibcon#read 3, iclass 28, count 2 2006.229.14:04:38.07#ibcon#about to read 4, iclass 28, count 2 2006.229.14:04:38.07#ibcon#read 4, iclass 28, count 2 2006.229.14:04:38.07#ibcon#about to read 5, iclass 28, count 2 2006.229.14:04:38.07#ibcon#read 5, iclass 28, count 2 2006.229.14:04:38.07#ibcon#about to read 6, iclass 28, count 2 2006.229.14:04:38.07#ibcon#read 6, iclass 28, count 2 2006.229.14:04:38.07#ibcon#end of sib2, iclass 28, count 2 2006.229.14:04:38.07#ibcon#*after write, iclass 28, count 2 2006.229.14:04:38.07#ibcon#*before return 0, iclass 28, count 2 2006.229.14:04:38.07#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:38.07#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:04:38.07#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.14:04:38.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:38.07#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:38.19#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:38.19#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:38.19#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:04:38.19#ibcon#first serial, iclass 28, count 0 2006.229.14:04:38.19#ibcon#enter sib2, iclass 28, count 0 2006.229.14:04:38.19#ibcon#flushed, iclass 28, count 0 2006.229.14:04:38.19#ibcon#about to write, iclass 28, count 0 2006.229.14:04:38.19#ibcon#wrote, iclass 28, count 0 2006.229.14:04:38.19#ibcon#about to read 3, iclass 28, count 0 2006.229.14:04:38.21#ibcon#read 3, iclass 28, count 0 2006.229.14:04:38.21#ibcon#about to read 4, iclass 28, count 0 2006.229.14:04:38.21#ibcon#read 4, iclass 28, count 0 2006.229.14:04:38.21#ibcon#about to read 5, iclass 28, count 0 2006.229.14:04:38.21#ibcon#read 5, iclass 28, count 0 2006.229.14:04:38.21#ibcon#about to read 6, iclass 28, count 0 2006.229.14:04:38.21#ibcon#read 6, iclass 28, count 0 2006.229.14:04:38.21#ibcon#end of sib2, iclass 28, count 0 2006.229.14:04:38.21#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:04:38.21#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:04:38.21#ibcon#[27=USB\r\n] 2006.229.14:04:38.21#ibcon#*before write, iclass 28, count 0 2006.229.14:04:38.21#ibcon#enter sib2, iclass 28, count 0 2006.229.14:04:38.21#ibcon#flushed, iclass 28, count 0 2006.229.14:04:38.21#ibcon#about to write, iclass 28, count 0 2006.229.14:04:38.21#ibcon#wrote, iclass 28, count 0 2006.229.14:04:38.21#ibcon#about to read 3, iclass 28, count 0 2006.229.14:04:38.24#ibcon#read 3, iclass 28, count 0 2006.229.14:04:38.24#ibcon#about to read 4, iclass 28, count 0 2006.229.14:04:38.24#ibcon#read 4, iclass 28, count 0 2006.229.14:04:38.24#ibcon#about to read 5, iclass 28, count 0 2006.229.14:04:38.24#ibcon#read 5, iclass 28, count 0 2006.229.14:04:38.24#ibcon#about to read 6, iclass 28, count 0 2006.229.14:04:38.24#ibcon#read 6, iclass 28, count 0 2006.229.14:04:38.24#ibcon#end of sib2, iclass 28, count 0 2006.229.14:04:38.24#ibcon#*after write, iclass 28, count 0 2006.229.14:04:38.24#ibcon#*before return 0, iclass 28, count 0 2006.229.14:04:38.24#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:38.24#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:04:38.24#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:04:38.24#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:04:38.24$vck44/vblo=8,744.99 2006.229.14:04:38.24#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.14:04:38.24#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.14:04:38.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:04:38.24#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:38.24#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:38.24#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:38.24#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:04:38.24#ibcon#first serial, iclass 30, count 0 2006.229.14:04:38.24#ibcon#enter sib2, iclass 30, count 0 2006.229.14:04:38.24#ibcon#flushed, iclass 30, count 0 2006.229.14:04:38.24#ibcon#about to write, iclass 30, count 0 2006.229.14:04:38.24#ibcon#wrote, iclass 30, count 0 2006.229.14:04:38.24#ibcon#about to read 3, iclass 30, count 0 2006.229.14:04:38.26#ibcon#read 3, iclass 30, count 0 2006.229.14:04:38.26#ibcon#about to read 4, iclass 30, count 0 2006.229.14:04:38.26#ibcon#read 4, iclass 30, count 0 2006.229.14:04:38.26#ibcon#about to read 5, iclass 30, count 0 2006.229.14:04:38.26#ibcon#read 5, iclass 30, count 0 2006.229.14:04:38.26#ibcon#about to read 6, iclass 30, count 0 2006.229.14:04:38.26#ibcon#read 6, iclass 30, count 0 2006.229.14:04:38.26#ibcon#end of sib2, iclass 30, count 0 2006.229.14:04:38.26#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:04:38.26#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:04:38.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:04:38.26#ibcon#*before write, iclass 30, count 0 2006.229.14:04:38.26#ibcon#enter sib2, iclass 30, count 0 2006.229.14:04:38.26#ibcon#flushed, iclass 30, count 0 2006.229.14:04:38.26#ibcon#about to write, iclass 30, count 0 2006.229.14:04:38.26#ibcon#wrote, iclass 30, count 0 2006.229.14:04:38.26#ibcon#about to read 3, iclass 30, count 0 2006.229.14:04:38.30#ibcon#read 3, iclass 30, count 0 2006.229.14:04:38.30#ibcon#about to read 4, iclass 30, count 0 2006.229.14:04:38.30#ibcon#read 4, iclass 30, count 0 2006.229.14:04:38.30#ibcon#about to read 5, iclass 30, count 0 2006.229.14:04:38.30#ibcon#read 5, iclass 30, count 0 2006.229.14:04:38.30#ibcon#about to read 6, iclass 30, count 0 2006.229.14:04:38.30#ibcon#read 6, iclass 30, count 0 2006.229.14:04:38.30#ibcon#end of sib2, iclass 30, count 0 2006.229.14:04:38.30#ibcon#*after write, iclass 30, count 0 2006.229.14:04:38.30#ibcon#*before return 0, iclass 30, count 0 2006.229.14:04:38.30#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:38.30#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:04:38.30#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:04:38.30#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:04:38.30$vck44/vb=8,4 2006.229.14:04:38.30#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.14:04:38.30#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.14:04:38.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:04:38.30#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:38.36#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:38.36#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:38.36#ibcon#enter wrdev, iclass 32, count 2 2006.229.14:04:38.36#ibcon#first serial, iclass 32, count 2 2006.229.14:04:38.36#ibcon#enter sib2, iclass 32, count 2 2006.229.14:04:38.36#ibcon#flushed, iclass 32, count 2 2006.229.14:04:38.36#ibcon#about to write, iclass 32, count 2 2006.229.14:04:38.36#ibcon#wrote, iclass 32, count 2 2006.229.14:04:38.36#ibcon#about to read 3, iclass 32, count 2 2006.229.14:04:38.38#ibcon#read 3, iclass 32, count 2 2006.229.14:04:38.38#ibcon#about to read 4, iclass 32, count 2 2006.229.14:04:38.38#ibcon#read 4, iclass 32, count 2 2006.229.14:04:38.38#ibcon#about to read 5, iclass 32, count 2 2006.229.14:04:38.38#ibcon#read 5, iclass 32, count 2 2006.229.14:04:38.38#ibcon#about to read 6, iclass 32, count 2 2006.229.14:04:38.38#ibcon#read 6, iclass 32, count 2 2006.229.14:04:38.38#ibcon#end of sib2, iclass 32, count 2 2006.229.14:04:38.38#ibcon#*mode == 0, iclass 32, count 2 2006.229.14:04:38.38#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.14:04:38.38#ibcon#[27=AT08-04\r\n] 2006.229.14:04:38.38#ibcon#*before write, iclass 32, count 2 2006.229.14:04:38.38#ibcon#enter sib2, iclass 32, count 2 2006.229.14:04:38.38#ibcon#flushed, iclass 32, count 2 2006.229.14:04:38.38#ibcon#about to write, iclass 32, count 2 2006.229.14:04:38.38#ibcon#wrote, iclass 32, count 2 2006.229.14:04:38.38#ibcon#about to read 3, iclass 32, count 2 2006.229.14:04:38.41#ibcon#read 3, iclass 32, count 2 2006.229.14:04:38.41#ibcon#about to read 4, iclass 32, count 2 2006.229.14:04:38.41#ibcon#read 4, iclass 32, count 2 2006.229.14:04:38.41#ibcon#about to read 5, iclass 32, count 2 2006.229.14:04:38.41#ibcon#read 5, iclass 32, count 2 2006.229.14:04:38.41#ibcon#about to read 6, iclass 32, count 2 2006.229.14:04:38.41#ibcon#read 6, iclass 32, count 2 2006.229.14:04:38.41#ibcon#end of sib2, iclass 32, count 2 2006.229.14:04:38.41#ibcon#*after write, iclass 32, count 2 2006.229.14:04:38.41#ibcon#*before return 0, iclass 32, count 2 2006.229.14:04:38.41#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:38.41#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:04:38.41#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.14:04:38.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:04:38.41#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:38.53#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:38.53#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:38.53#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:04:38.53#ibcon#first serial, iclass 32, count 0 2006.229.14:04:38.53#ibcon#enter sib2, iclass 32, count 0 2006.229.14:04:38.53#ibcon#flushed, iclass 32, count 0 2006.229.14:04:38.53#ibcon#about to write, iclass 32, count 0 2006.229.14:04:38.53#ibcon#wrote, iclass 32, count 0 2006.229.14:04:38.53#ibcon#about to read 3, iclass 32, count 0 2006.229.14:04:38.55#ibcon#read 3, iclass 32, count 0 2006.229.14:04:38.55#ibcon#about to read 4, iclass 32, count 0 2006.229.14:04:38.55#ibcon#read 4, iclass 32, count 0 2006.229.14:04:38.55#ibcon#about to read 5, iclass 32, count 0 2006.229.14:04:38.55#ibcon#read 5, iclass 32, count 0 2006.229.14:04:38.55#ibcon#about to read 6, iclass 32, count 0 2006.229.14:04:38.55#ibcon#read 6, iclass 32, count 0 2006.229.14:04:38.55#ibcon#end of sib2, iclass 32, count 0 2006.229.14:04:38.55#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:04:38.55#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:04:38.55#ibcon#[27=USB\r\n] 2006.229.14:04:38.55#ibcon#*before write, iclass 32, count 0 2006.229.14:04:38.55#ibcon#enter sib2, iclass 32, count 0 2006.229.14:04:38.55#ibcon#flushed, iclass 32, count 0 2006.229.14:04:38.55#ibcon#about to write, iclass 32, count 0 2006.229.14:04:38.55#ibcon#wrote, iclass 32, count 0 2006.229.14:04:38.55#ibcon#about to read 3, iclass 32, count 0 2006.229.14:04:38.58#ibcon#read 3, iclass 32, count 0 2006.229.14:04:38.58#ibcon#about to read 4, iclass 32, count 0 2006.229.14:04:38.58#ibcon#read 4, iclass 32, count 0 2006.229.14:04:38.58#ibcon#about to read 5, iclass 32, count 0 2006.229.14:04:38.58#ibcon#read 5, iclass 32, count 0 2006.229.14:04:38.58#ibcon#about to read 6, iclass 32, count 0 2006.229.14:04:38.58#ibcon#read 6, iclass 32, count 0 2006.229.14:04:38.58#ibcon#end of sib2, iclass 32, count 0 2006.229.14:04:38.58#ibcon#*after write, iclass 32, count 0 2006.229.14:04:38.58#ibcon#*before return 0, iclass 32, count 0 2006.229.14:04:38.58#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:38.58#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:04:38.58#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:04:38.58#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:04:38.58$vck44/vabw=wide 2006.229.14:04:38.58#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.14:04:38.58#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.14:04:38.58#ibcon#ireg 8 cls_cnt 0 2006.229.14:04:38.58#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:38.58#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:38.58#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:38.58#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:04:38.58#ibcon#first serial, iclass 34, count 0 2006.229.14:04:38.58#ibcon#enter sib2, iclass 34, count 0 2006.229.14:04:38.58#ibcon#flushed, iclass 34, count 0 2006.229.14:04:38.58#ibcon#about to write, iclass 34, count 0 2006.229.14:04:38.58#ibcon#wrote, iclass 34, count 0 2006.229.14:04:38.58#ibcon#about to read 3, iclass 34, count 0 2006.229.14:04:38.60#ibcon#read 3, iclass 34, count 0 2006.229.14:04:38.60#ibcon#about to read 4, iclass 34, count 0 2006.229.14:04:38.60#ibcon#read 4, iclass 34, count 0 2006.229.14:04:38.60#ibcon#about to read 5, iclass 34, count 0 2006.229.14:04:38.60#ibcon#read 5, iclass 34, count 0 2006.229.14:04:38.60#ibcon#about to read 6, iclass 34, count 0 2006.229.14:04:38.60#ibcon#read 6, iclass 34, count 0 2006.229.14:04:38.60#ibcon#end of sib2, iclass 34, count 0 2006.229.14:04:38.60#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:04:38.60#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:04:38.60#ibcon#[25=BW32\r\n] 2006.229.14:04:38.60#ibcon#*before write, iclass 34, count 0 2006.229.14:04:38.60#ibcon#enter sib2, iclass 34, count 0 2006.229.14:04:38.60#ibcon#flushed, iclass 34, count 0 2006.229.14:04:38.60#ibcon#about to write, iclass 34, count 0 2006.229.14:04:38.60#ibcon#wrote, iclass 34, count 0 2006.229.14:04:38.60#ibcon#about to read 3, iclass 34, count 0 2006.229.14:04:38.63#ibcon#read 3, iclass 34, count 0 2006.229.14:04:38.63#ibcon#about to read 4, iclass 34, count 0 2006.229.14:04:38.63#ibcon#read 4, iclass 34, count 0 2006.229.14:04:38.63#ibcon#about to read 5, iclass 34, count 0 2006.229.14:04:38.63#ibcon#read 5, iclass 34, count 0 2006.229.14:04:38.63#ibcon#about to read 6, iclass 34, count 0 2006.229.14:04:38.63#ibcon#read 6, iclass 34, count 0 2006.229.14:04:38.63#ibcon#end of sib2, iclass 34, count 0 2006.229.14:04:38.63#ibcon#*after write, iclass 34, count 0 2006.229.14:04:38.63#ibcon#*before return 0, iclass 34, count 0 2006.229.14:04:38.63#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:38.63#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:04:38.63#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:04:38.63#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:04:38.63$vck44/vbbw=wide 2006.229.14:04:38.63#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.14:04:38.63#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.14:04:38.63#ibcon#ireg 8 cls_cnt 0 2006.229.14:04:38.63#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:04:38.70#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:04:38.70#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:04:38.70#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:04:38.70#ibcon#first serial, iclass 36, count 0 2006.229.14:04:38.70#ibcon#enter sib2, iclass 36, count 0 2006.229.14:04:38.70#ibcon#flushed, iclass 36, count 0 2006.229.14:04:38.70#ibcon#about to write, iclass 36, count 0 2006.229.14:04:38.70#ibcon#wrote, iclass 36, count 0 2006.229.14:04:38.70#ibcon#about to read 3, iclass 36, count 0 2006.229.14:04:38.72#ibcon#read 3, iclass 36, count 0 2006.229.14:04:38.72#ibcon#about to read 4, iclass 36, count 0 2006.229.14:04:38.72#ibcon#read 4, iclass 36, count 0 2006.229.14:04:38.72#ibcon#about to read 5, iclass 36, count 0 2006.229.14:04:38.72#ibcon#read 5, iclass 36, count 0 2006.229.14:04:38.72#ibcon#about to read 6, iclass 36, count 0 2006.229.14:04:38.72#ibcon#read 6, iclass 36, count 0 2006.229.14:04:38.72#ibcon#end of sib2, iclass 36, count 0 2006.229.14:04:38.72#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:04:38.72#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:04:38.72#ibcon#[27=BW32\r\n] 2006.229.14:04:38.72#ibcon#*before write, iclass 36, count 0 2006.229.14:04:38.72#ibcon#enter sib2, iclass 36, count 0 2006.229.14:04:38.72#ibcon#flushed, iclass 36, count 0 2006.229.14:04:38.72#ibcon#about to write, iclass 36, count 0 2006.229.14:04:38.72#ibcon#wrote, iclass 36, count 0 2006.229.14:04:38.72#ibcon#about to read 3, iclass 36, count 0 2006.229.14:04:38.75#ibcon#read 3, iclass 36, count 0 2006.229.14:04:38.75#ibcon#about to read 4, iclass 36, count 0 2006.229.14:04:38.75#ibcon#read 4, iclass 36, count 0 2006.229.14:04:38.75#ibcon#about to read 5, iclass 36, count 0 2006.229.14:04:38.75#ibcon#read 5, iclass 36, count 0 2006.229.14:04:38.75#ibcon#about to read 6, iclass 36, count 0 2006.229.14:04:38.75#ibcon#read 6, iclass 36, count 0 2006.229.14:04:38.75#ibcon#end of sib2, iclass 36, count 0 2006.229.14:04:38.75#ibcon#*after write, iclass 36, count 0 2006.229.14:04:38.75#ibcon#*before return 0, iclass 36, count 0 2006.229.14:04:38.75#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:04:38.75#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:04:38.75#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:04:38.75#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:04:38.75$setupk4/ifdk4 2006.229.14:04:38.75$ifdk4/lo= 2006.229.14:04:38.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:04:38.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:04:38.75$ifdk4/patch= 2006.229.14:04:38.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:04:38.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:04:38.75$setupk4/!*+20s 2006.229.14:04:44.48#abcon#<5=/05 1.6 2.3 27.521001002.1\r\n> 2006.229.14:04:44.50#abcon#{5=INTERFACE CLEAR} 2006.229.14:04:44.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:04:53.24$setupk4/"tpicd 2006.229.14:04:53.24$setupk4/echo=off 2006.229.14:04:53.24$setupk4/xlog=off 2006.229.14:04:53.24:!2006.229.14:11:29 2006.229.14:04:57.14#trakl#Source acquired 2006.229.14:04:59.14#flagr#flagr/antenna,acquired 2006.229.14:11:29.00:preob 2006.229.14:11:30.14/onsource/TRACKING 2006.229.14:11:30.14:!2006.229.14:11:39 2006.229.14:11:39.00:"tape 2006.229.14:11:39.00:"st=record 2006.229.14:11:39.00:data_valid=on 2006.229.14:11:39.00:midob 2006.229.14:11:39.14/onsource/TRACKING 2006.229.14:11:39.14/wx/27.52,1002.0,100 2006.229.14:11:39.29/cable/+6.4124E-03 2006.229.14:11:40.38/va/01,08,usb,yes,29,32 2006.229.14:11:40.38/va/02,07,usb,yes,32,32 2006.229.14:11:40.38/va/03,06,usb,yes,39,42 2006.229.14:11:40.38/va/04,07,usb,yes,33,34 2006.229.14:11:40.38/va/05,04,usb,yes,29,30 2006.229.14:11:40.38/va/06,04,usb,yes,33,32 2006.229.14:11:40.38/va/07,05,usb,yes,29,29 2006.229.14:11:40.38/va/08,06,usb,yes,21,26 2006.229.14:11:40.61/valo/01,524.99,yes,locked 2006.229.14:11:40.61/valo/02,534.99,yes,locked 2006.229.14:11:40.61/valo/03,564.99,yes,locked 2006.229.14:11:40.61/valo/04,624.99,yes,locked 2006.229.14:11:40.61/valo/05,734.99,yes,locked 2006.229.14:11:40.61/valo/06,814.99,yes,locked 2006.229.14:11:40.61/valo/07,864.99,yes,locked 2006.229.14:11:40.61/valo/08,884.99,yes,locked 2006.229.14:11:41.70/vb/01,04,usb,yes,31,29 2006.229.14:11:41.70/vb/02,04,usb,yes,33,33 2006.229.14:11:41.70/vb/03,04,usb,yes,30,33 2006.229.14:11:41.70/vb/04,04,usb,yes,35,34 2006.229.14:11:41.70/vb/05,04,usb,yes,27,29 2006.229.14:11:41.70/vb/06,04,usb,yes,32,28 2006.229.14:11:41.70/vb/07,04,usb,yes,31,31 2006.229.14:11:41.70/vb/08,04,usb,yes,29,32 2006.229.14:11:41.94/vblo/01,629.99,yes,locked 2006.229.14:11:41.94/vblo/02,634.99,yes,locked 2006.229.14:11:41.94/vblo/03,649.99,yes,locked 2006.229.14:11:41.94/vblo/04,679.99,yes,locked 2006.229.14:11:41.94/vblo/05,709.99,yes,locked 2006.229.14:11:41.94/vblo/06,719.99,yes,locked 2006.229.14:11:41.94/vblo/07,734.99,yes,locked 2006.229.14:11:41.94/vblo/08,744.99,yes,locked 2006.229.14:11:42.09/vabw/8 2006.229.14:11:42.24/vbbw/8 2006.229.14:11:42.33/xfe/off,on,12.2 2006.229.14:11:42.70/ifatt/23,28,28,28 2006.229.14:11:43.07/fmout-gps/S +4.59E-07 2006.229.14:11:43.11:!2006.229.14:14:09 2006.229.14:14:09.01:data_valid=off 2006.229.14:14:09.02:"et 2006.229.14:14:09.02:!+3s 2006.229.14:14:12.03:"tape 2006.229.14:14:12.04:postob 2006.229.14:14:12.09/cable/+6.4115E-03 2006.229.14:14:12.10/wx/27.52,1002.1,100 2006.229.14:14:12.15/fmout-gps/S +4.56E-07 2006.229.14:14:12.16:scan_name=229-1417,jd0608,70 2006.229.14:14:12.16:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.14:14:13.14#flagr#flagr/antenna,new-source 2006.229.14:14:13.15:checkk5 2006.229.14:14:13.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:14:13.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:14:14.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:14:14.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:14:15.17/chk_obsdata//k5ts1/T2291411??a.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.14:14:15.56/chk_obsdata//k5ts2/T2291411??b.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.14:14:15.97/chk_obsdata//k5ts3/T2291411??c.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.14:14:16.39/chk_obsdata//k5ts4/T2291411??d.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.14:14:17.13/k5log//k5ts1_log_newline 2006.229.14:14:17.83/k5log//k5ts2_log_newline 2006.229.14:14:18.52/k5log//k5ts3_log_newline 2006.229.14:14:19.25/k5log//k5ts4_log_newline 2006.229.14:14:19.27/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:14:19.27:setupk4=1 2006.229.14:14:19.27$setupk4/echo=on 2006.229.14:14:19.27$setupk4/pcalon 2006.229.14:14:19.27$pcalon/"no phase cal control is implemented here 2006.229.14:14:19.27$setupk4/"tpicd=stop 2006.229.14:14:19.27$setupk4/"rec=synch_on 2006.229.14:14:19.27$setupk4/"rec_mode=128 2006.229.14:14:19.27$setupk4/!* 2006.229.14:14:19.27$setupk4/recpk4 2006.229.14:14:19.27$recpk4/recpatch= 2006.229.14:14:19.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:14:19.28$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:14:19.28$setupk4/vck44 2006.229.14:14:19.28$vck44/valo=1,524.99 2006.229.14:14:19.28#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.14:14:19.28#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.14:14:19.28#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:19.28#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:19.28#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:19.28#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:19.28#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:14:19.28#ibcon#first serial, iclass 17, count 0 2006.229.14:14:19.28#ibcon#enter sib2, iclass 17, count 0 2006.229.14:14:19.28#ibcon#flushed, iclass 17, count 0 2006.229.14:14:19.28#ibcon#about to write, iclass 17, count 0 2006.229.14:14:19.28#ibcon#wrote, iclass 17, count 0 2006.229.14:14:19.28#ibcon#about to read 3, iclass 17, count 0 2006.229.14:14:19.29#ibcon#read 3, iclass 17, count 0 2006.229.14:14:19.29#ibcon#about to read 4, iclass 17, count 0 2006.229.14:14:19.29#ibcon#read 4, iclass 17, count 0 2006.229.14:14:19.29#ibcon#about to read 5, iclass 17, count 0 2006.229.14:14:19.29#ibcon#read 5, iclass 17, count 0 2006.229.14:14:19.29#ibcon#about to read 6, iclass 17, count 0 2006.229.14:14:19.29#ibcon#read 6, iclass 17, count 0 2006.229.14:14:19.29#ibcon#end of sib2, iclass 17, count 0 2006.229.14:14:19.29#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:14:19.29#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:14:19.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:14:19.29#ibcon#*before write, iclass 17, count 0 2006.229.14:14:19.29#ibcon#enter sib2, iclass 17, count 0 2006.229.14:14:19.29#ibcon#flushed, iclass 17, count 0 2006.229.14:14:19.29#ibcon#about to write, iclass 17, count 0 2006.229.14:14:19.29#ibcon#wrote, iclass 17, count 0 2006.229.14:14:19.29#ibcon#about to read 3, iclass 17, count 0 2006.229.14:14:19.34#ibcon#read 3, iclass 17, count 0 2006.229.14:14:19.34#ibcon#about to read 4, iclass 17, count 0 2006.229.14:14:19.34#ibcon#read 4, iclass 17, count 0 2006.229.14:14:19.34#ibcon#about to read 5, iclass 17, count 0 2006.229.14:14:19.34#ibcon#read 5, iclass 17, count 0 2006.229.14:14:19.34#ibcon#about to read 6, iclass 17, count 0 2006.229.14:14:19.34#ibcon#read 6, iclass 17, count 0 2006.229.14:14:19.34#ibcon#end of sib2, iclass 17, count 0 2006.229.14:14:19.34#ibcon#*after write, iclass 17, count 0 2006.229.14:14:19.34#ibcon#*before return 0, iclass 17, count 0 2006.229.14:14:19.34#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:19.34#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:19.34#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:14:19.34#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:14:19.34$vck44/va=1,8 2006.229.14:14:19.34#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.14:14:19.34#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.14:14:19.34#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:19.34#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:19.34#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:19.34#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:19.34#ibcon#enter wrdev, iclass 19, count 2 2006.229.14:14:19.34#ibcon#first serial, iclass 19, count 2 2006.229.14:14:19.34#ibcon#enter sib2, iclass 19, count 2 2006.229.14:14:19.34#ibcon#flushed, iclass 19, count 2 2006.229.14:14:19.34#ibcon#about to write, iclass 19, count 2 2006.229.14:14:19.34#ibcon#wrote, iclass 19, count 2 2006.229.14:14:19.34#ibcon#about to read 3, iclass 19, count 2 2006.229.14:14:19.36#ibcon#read 3, iclass 19, count 2 2006.229.14:14:19.36#ibcon#about to read 4, iclass 19, count 2 2006.229.14:14:19.36#ibcon#read 4, iclass 19, count 2 2006.229.14:14:19.36#ibcon#about to read 5, iclass 19, count 2 2006.229.14:14:19.36#ibcon#read 5, iclass 19, count 2 2006.229.14:14:19.36#ibcon#about to read 6, iclass 19, count 2 2006.229.14:14:19.36#ibcon#read 6, iclass 19, count 2 2006.229.14:14:19.36#ibcon#end of sib2, iclass 19, count 2 2006.229.14:14:19.36#ibcon#*mode == 0, iclass 19, count 2 2006.229.14:14:19.36#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.14:14:19.36#ibcon#[25=AT01-08\r\n] 2006.229.14:14:19.36#ibcon#*before write, iclass 19, count 2 2006.229.14:14:19.36#ibcon#enter sib2, iclass 19, count 2 2006.229.14:14:19.36#ibcon#flushed, iclass 19, count 2 2006.229.14:14:19.36#ibcon#about to write, iclass 19, count 2 2006.229.14:14:19.36#ibcon#wrote, iclass 19, count 2 2006.229.14:14:19.36#ibcon#about to read 3, iclass 19, count 2 2006.229.14:14:19.39#ibcon#read 3, iclass 19, count 2 2006.229.14:14:19.39#ibcon#about to read 4, iclass 19, count 2 2006.229.14:14:19.39#ibcon#read 4, iclass 19, count 2 2006.229.14:14:19.39#ibcon#about to read 5, iclass 19, count 2 2006.229.14:14:19.39#ibcon#read 5, iclass 19, count 2 2006.229.14:14:19.39#ibcon#about to read 6, iclass 19, count 2 2006.229.14:14:19.39#ibcon#read 6, iclass 19, count 2 2006.229.14:14:19.39#ibcon#end of sib2, iclass 19, count 2 2006.229.14:14:19.39#ibcon#*after write, iclass 19, count 2 2006.229.14:14:19.39#ibcon#*before return 0, iclass 19, count 2 2006.229.14:14:19.39#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:19.39#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:19.39#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.14:14:19.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:19.39#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:19.51#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:19.51#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:19.51#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:14:19.51#ibcon#first serial, iclass 19, count 0 2006.229.14:14:19.51#ibcon#enter sib2, iclass 19, count 0 2006.229.14:14:19.51#ibcon#flushed, iclass 19, count 0 2006.229.14:14:19.51#ibcon#about to write, iclass 19, count 0 2006.229.14:14:19.51#ibcon#wrote, iclass 19, count 0 2006.229.14:14:19.51#ibcon#about to read 3, iclass 19, count 0 2006.229.14:14:19.53#ibcon#read 3, iclass 19, count 0 2006.229.14:14:19.53#ibcon#about to read 4, iclass 19, count 0 2006.229.14:14:19.53#ibcon#read 4, iclass 19, count 0 2006.229.14:14:19.53#ibcon#about to read 5, iclass 19, count 0 2006.229.14:14:19.53#ibcon#read 5, iclass 19, count 0 2006.229.14:14:19.53#ibcon#about to read 6, iclass 19, count 0 2006.229.14:14:19.53#ibcon#read 6, iclass 19, count 0 2006.229.14:14:19.53#ibcon#end of sib2, iclass 19, count 0 2006.229.14:14:19.53#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:14:19.53#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:14:19.53#ibcon#[25=USB\r\n] 2006.229.14:14:19.53#ibcon#*before write, iclass 19, count 0 2006.229.14:14:19.53#ibcon#enter sib2, iclass 19, count 0 2006.229.14:14:19.53#ibcon#flushed, iclass 19, count 0 2006.229.14:14:19.53#ibcon#about to write, iclass 19, count 0 2006.229.14:14:19.53#ibcon#wrote, iclass 19, count 0 2006.229.14:14:19.53#ibcon#about to read 3, iclass 19, count 0 2006.229.14:14:19.56#ibcon#read 3, iclass 19, count 0 2006.229.14:14:19.56#ibcon#about to read 4, iclass 19, count 0 2006.229.14:14:19.56#ibcon#read 4, iclass 19, count 0 2006.229.14:14:19.56#ibcon#about to read 5, iclass 19, count 0 2006.229.14:14:19.56#ibcon#read 5, iclass 19, count 0 2006.229.14:14:19.56#ibcon#about to read 6, iclass 19, count 0 2006.229.14:14:19.56#ibcon#read 6, iclass 19, count 0 2006.229.14:14:19.56#ibcon#end of sib2, iclass 19, count 0 2006.229.14:14:19.56#ibcon#*after write, iclass 19, count 0 2006.229.14:14:19.56#ibcon#*before return 0, iclass 19, count 0 2006.229.14:14:19.56#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:19.56#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:19.56#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:14:19.56#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:14:19.56$vck44/valo=2,534.99 2006.229.14:14:19.56#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.14:14:19.56#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.14:14:19.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:19.56#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:19.56#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:19.56#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:19.56#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:14:19.56#ibcon#first serial, iclass 21, count 0 2006.229.14:14:19.56#ibcon#enter sib2, iclass 21, count 0 2006.229.14:14:19.56#ibcon#flushed, iclass 21, count 0 2006.229.14:14:19.56#ibcon#about to write, iclass 21, count 0 2006.229.14:14:19.56#ibcon#wrote, iclass 21, count 0 2006.229.14:14:19.56#ibcon#about to read 3, iclass 21, count 0 2006.229.14:14:19.58#ibcon#read 3, iclass 21, count 0 2006.229.14:14:19.58#ibcon#about to read 4, iclass 21, count 0 2006.229.14:14:19.58#ibcon#read 4, iclass 21, count 0 2006.229.14:14:19.58#ibcon#about to read 5, iclass 21, count 0 2006.229.14:14:19.58#ibcon#read 5, iclass 21, count 0 2006.229.14:14:19.58#ibcon#about to read 6, iclass 21, count 0 2006.229.14:14:19.58#ibcon#read 6, iclass 21, count 0 2006.229.14:14:19.58#ibcon#end of sib2, iclass 21, count 0 2006.229.14:14:19.58#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:14:19.58#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:14:19.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:14:19.58#ibcon#*before write, iclass 21, count 0 2006.229.14:14:19.58#ibcon#enter sib2, iclass 21, count 0 2006.229.14:14:19.58#ibcon#flushed, iclass 21, count 0 2006.229.14:14:19.58#ibcon#about to write, iclass 21, count 0 2006.229.14:14:19.58#ibcon#wrote, iclass 21, count 0 2006.229.14:14:19.58#ibcon#about to read 3, iclass 21, count 0 2006.229.14:14:19.62#ibcon#read 3, iclass 21, count 0 2006.229.14:14:19.62#ibcon#about to read 4, iclass 21, count 0 2006.229.14:14:19.62#ibcon#read 4, iclass 21, count 0 2006.229.14:14:19.62#ibcon#about to read 5, iclass 21, count 0 2006.229.14:14:19.62#ibcon#read 5, iclass 21, count 0 2006.229.14:14:19.62#ibcon#about to read 6, iclass 21, count 0 2006.229.14:14:19.62#ibcon#read 6, iclass 21, count 0 2006.229.14:14:19.62#ibcon#end of sib2, iclass 21, count 0 2006.229.14:14:19.62#ibcon#*after write, iclass 21, count 0 2006.229.14:14:19.62#ibcon#*before return 0, iclass 21, count 0 2006.229.14:14:19.62#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:19.62#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:19.62#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:14:19.62#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:14:19.62$vck44/va=2,7 2006.229.14:14:19.62#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.14:14:19.62#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.14:14:19.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:19.62#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:19.68#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:19.68#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:19.68#ibcon#enter wrdev, iclass 23, count 2 2006.229.14:14:19.68#ibcon#first serial, iclass 23, count 2 2006.229.14:14:19.68#ibcon#enter sib2, iclass 23, count 2 2006.229.14:14:19.68#ibcon#flushed, iclass 23, count 2 2006.229.14:14:19.68#ibcon#about to write, iclass 23, count 2 2006.229.14:14:19.68#ibcon#wrote, iclass 23, count 2 2006.229.14:14:19.68#ibcon#about to read 3, iclass 23, count 2 2006.229.14:14:19.70#ibcon#read 3, iclass 23, count 2 2006.229.14:14:19.70#ibcon#about to read 4, iclass 23, count 2 2006.229.14:14:19.70#ibcon#read 4, iclass 23, count 2 2006.229.14:14:19.70#ibcon#about to read 5, iclass 23, count 2 2006.229.14:14:19.70#ibcon#read 5, iclass 23, count 2 2006.229.14:14:19.70#ibcon#about to read 6, iclass 23, count 2 2006.229.14:14:19.70#ibcon#read 6, iclass 23, count 2 2006.229.14:14:19.70#ibcon#end of sib2, iclass 23, count 2 2006.229.14:14:19.70#ibcon#*mode == 0, iclass 23, count 2 2006.229.14:14:19.70#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.14:14:19.70#ibcon#[25=AT02-07\r\n] 2006.229.14:14:19.70#ibcon#*before write, iclass 23, count 2 2006.229.14:14:19.70#ibcon#enter sib2, iclass 23, count 2 2006.229.14:14:19.70#ibcon#flushed, iclass 23, count 2 2006.229.14:14:19.70#ibcon#about to write, iclass 23, count 2 2006.229.14:14:19.70#ibcon#wrote, iclass 23, count 2 2006.229.14:14:19.70#ibcon#about to read 3, iclass 23, count 2 2006.229.14:14:19.73#ibcon#read 3, iclass 23, count 2 2006.229.14:14:19.73#ibcon#about to read 4, iclass 23, count 2 2006.229.14:14:19.73#ibcon#read 4, iclass 23, count 2 2006.229.14:14:19.73#ibcon#about to read 5, iclass 23, count 2 2006.229.14:14:19.73#ibcon#read 5, iclass 23, count 2 2006.229.14:14:19.73#ibcon#about to read 6, iclass 23, count 2 2006.229.14:14:19.73#ibcon#read 6, iclass 23, count 2 2006.229.14:14:19.73#ibcon#end of sib2, iclass 23, count 2 2006.229.14:14:19.73#ibcon#*after write, iclass 23, count 2 2006.229.14:14:19.73#ibcon#*before return 0, iclass 23, count 2 2006.229.14:14:19.73#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:19.73#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:19.73#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.14:14:19.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:19.73#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:19.85#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:19.85#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:19.85#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:14:19.85#ibcon#first serial, iclass 23, count 0 2006.229.14:14:19.85#ibcon#enter sib2, iclass 23, count 0 2006.229.14:14:19.85#ibcon#flushed, iclass 23, count 0 2006.229.14:14:19.85#ibcon#about to write, iclass 23, count 0 2006.229.14:14:19.85#ibcon#wrote, iclass 23, count 0 2006.229.14:14:19.85#ibcon#about to read 3, iclass 23, count 0 2006.229.14:14:19.87#ibcon#read 3, iclass 23, count 0 2006.229.14:14:19.87#ibcon#about to read 4, iclass 23, count 0 2006.229.14:14:19.87#ibcon#read 4, iclass 23, count 0 2006.229.14:14:19.87#ibcon#about to read 5, iclass 23, count 0 2006.229.14:14:19.87#ibcon#read 5, iclass 23, count 0 2006.229.14:14:19.87#ibcon#about to read 6, iclass 23, count 0 2006.229.14:14:19.87#ibcon#read 6, iclass 23, count 0 2006.229.14:14:19.87#ibcon#end of sib2, iclass 23, count 0 2006.229.14:14:19.87#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:14:19.87#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:14:19.87#ibcon#[25=USB\r\n] 2006.229.14:14:19.87#ibcon#*before write, iclass 23, count 0 2006.229.14:14:19.87#ibcon#enter sib2, iclass 23, count 0 2006.229.14:14:19.87#ibcon#flushed, iclass 23, count 0 2006.229.14:14:19.87#ibcon#about to write, iclass 23, count 0 2006.229.14:14:19.87#ibcon#wrote, iclass 23, count 0 2006.229.14:14:19.87#ibcon#about to read 3, iclass 23, count 0 2006.229.14:14:19.90#ibcon#read 3, iclass 23, count 0 2006.229.14:14:19.90#ibcon#about to read 4, iclass 23, count 0 2006.229.14:14:19.90#ibcon#read 4, iclass 23, count 0 2006.229.14:14:19.90#ibcon#about to read 5, iclass 23, count 0 2006.229.14:14:19.90#ibcon#read 5, iclass 23, count 0 2006.229.14:14:19.90#ibcon#about to read 6, iclass 23, count 0 2006.229.14:14:19.90#ibcon#read 6, iclass 23, count 0 2006.229.14:14:19.90#ibcon#end of sib2, iclass 23, count 0 2006.229.14:14:19.90#ibcon#*after write, iclass 23, count 0 2006.229.14:14:19.90#ibcon#*before return 0, iclass 23, count 0 2006.229.14:14:19.90#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:19.90#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:19.90#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:14:19.90#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:14:19.90$vck44/valo=3,564.99 2006.229.14:14:19.90#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:14:19.90#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:14:19.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:19.90#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:19.90#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:19.90#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:19.90#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:14:19.90#ibcon#first serial, iclass 25, count 0 2006.229.14:14:19.90#ibcon#enter sib2, iclass 25, count 0 2006.229.14:14:19.90#ibcon#flushed, iclass 25, count 0 2006.229.14:14:19.90#ibcon#about to write, iclass 25, count 0 2006.229.14:14:19.90#ibcon#wrote, iclass 25, count 0 2006.229.14:14:19.90#ibcon#about to read 3, iclass 25, count 0 2006.229.14:14:19.92#ibcon#read 3, iclass 25, count 0 2006.229.14:14:19.92#ibcon#about to read 4, iclass 25, count 0 2006.229.14:14:19.92#ibcon#read 4, iclass 25, count 0 2006.229.14:14:19.92#ibcon#about to read 5, iclass 25, count 0 2006.229.14:14:19.92#ibcon#read 5, iclass 25, count 0 2006.229.14:14:19.92#ibcon#about to read 6, iclass 25, count 0 2006.229.14:14:19.92#ibcon#read 6, iclass 25, count 0 2006.229.14:14:19.92#ibcon#end of sib2, iclass 25, count 0 2006.229.14:14:19.92#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:14:19.92#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:14:19.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:14:19.92#ibcon#*before write, iclass 25, count 0 2006.229.14:14:19.92#ibcon#enter sib2, iclass 25, count 0 2006.229.14:14:19.92#ibcon#flushed, iclass 25, count 0 2006.229.14:14:19.92#ibcon#about to write, iclass 25, count 0 2006.229.14:14:19.92#ibcon#wrote, iclass 25, count 0 2006.229.14:14:19.92#ibcon#about to read 3, iclass 25, count 0 2006.229.14:14:19.96#ibcon#read 3, iclass 25, count 0 2006.229.14:14:19.96#ibcon#about to read 4, iclass 25, count 0 2006.229.14:14:19.96#ibcon#read 4, iclass 25, count 0 2006.229.14:14:19.96#ibcon#about to read 5, iclass 25, count 0 2006.229.14:14:19.96#ibcon#read 5, iclass 25, count 0 2006.229.14:14:19.96#ibcon#about to read 6, iclass 25, count 0 2006.229.14:14:19.96#ibcon#read 6, iclass 25, count 0 2006.229.14:14:19.96#ibcon#end of sib2, iclass 25, count 0 2006.229.14:14:19.96#ibcon#*after write, iclass 25, count 0 2006.229.14:14:19.96#ibcon#*before return 0, iclass 25, count 0 2006.229.14:14:19.96#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:19.96#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:19.96#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:14:19.96#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:14:19.96$vck44/va=3,6 2006.229.14:14:19.96#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.14:14:19.96#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.14:14:19.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:19.96#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:20.02#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:20.02#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:20.02#ibcon#enter wrdev, iclass 27, count 2 2006.229.14:14:20.02#ibcon#first serial, iclass 27, count 2 2006.229.14:14:20.02#ibcon#enter sib2, iclass 27, count 2 2006.229.14:14:20.02#ibcon#flushed, iclass 27, count 2 2006.229.14:14:20.02#ibcon#about to write, iclass 27, count 2 2006.229.14:14:20.02#ibcon#wrote, iclass 27, count 2 2006.229.14:14:20.02#ibcon#about to read 3, iclass 27, count 2 2006.229.14:14:20.04#ibcon#read 3, iclass 27, count 2 2006.229.14:14:20.04#ibcon#about to read 4, iclass 27, count 2 2006.229.14:14:20.04#ibcon#read 4, iclass 27, count 2 2006.229.14:14:20.04#ibcon#about to read 5, iclass 27, count 2 2006.229.14:14:20.04#ibcon#read 5, iclass 27, count 2 2006.229.14:14:20.04#ibcon#about to read 6, iclass 27, count 2 2006.229.14:14:20.04#ibcon#read 6, iclass 27, count 2 2006.229.14:14:20.04#ibcon#end of sib2, iclass 27, count 2 2006.229.14:14:20.04#ibcon#*mode == 0, iclass 27, count 2 2006.229.14:14:20.04#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.14:14:20.04#ibcon#[25=AT03-06\r\n] 2006.229.14:14:20.04#ibcon#*before write, iclass 27, count 2 2006.229.14:14:20.04#ibcon#enter sib2, iclass 27, count 2 2006.229.14:14:20.04#ibcon#flushed, iclass 27, count 2 2006.229.14:14:20.04#ibcon#about to write, iclass 27, count 2 2006.229.14:14:20.04#ibcon#wrote, iclass 27, count 2 2006.229.14:14:20.04#ibcon#about to read 3, iclass 27, count 2 2006.229.14:14:20.07#ibcon#read 3, iclass 27, count 2 2006.229.14:14:20.07#ibcon#about to read 4, iclass 27, count 2 2006.229.14:14:20.07#ibcon#read 4, iclass 27, count 2 2006.229.14:14:20.07#ibcon#about to read 5, iclass 27, count 2 2006.229.14:14:20.07#ibcon#read 5, iclass 27, count 2 2006.229.14:14:20.07#ibcon#about to read 6, iclass 27, count 2 2006.229.14:14:20.07#ibcon#read 6, iclass 27, count 2 2006.229.14:14:20.07#ibcon#end of sib2, iclass 27, count 2 2006.229.14:14:20.07#ibcon#*after write, iclass 27, count 2 2006.229.14:14:20.07#ibcon#*before return 0, iclass 27, count 2 2006.229.14:14:20.07#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:20.07#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:20.07#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.14:14:20.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:20.07#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:20.19#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:20.19#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:20.19#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:14:20.19#ibcon#first serial, iclass 27, count 0 2006.229.14:14:20.19#ibcon#enter sib2, iclass 27, count 0 2006.229.14:14:20.19#ibcon#flushed, iclass 27, count 0 2006.229.14:14:20.19#ibcon#about to write, iclass 27, count 0 2006.229.14:14:20.19#ibcon#wrote, iclass 27, count 0 2006.229.14:14:20.19#ibcon#about to read 3, iclass 27, count 0 2006.229.14:14:20.21#ibcon#read 3, iclass 27, count 0 2006.229.14:14:20.21#ibcon#about to read 4, iclass 27, count 0 2006.229.14:14:20.21#ibcon#read 4, iclass 27, count 0 2006.229.14:14:20.21#ibcon#about to read 5, iclass 27, count 0 2006.229.14:14:20.21#ibcon#read 5, iclass 27, count 0 2006.229.14:14:20.21#ibcon#about to read 6, iclass 27, count 0 2006.229.14:14:20.21#ibcon#read 6, iclass 27, count 0 2006.229.14:14:20.21#ibcon#end of sib2, iclass 27, count 0 2006.229.14:14:20.21#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:14:20.21#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:14:20.21#ibcon#[25=USB\r\n] 2006.229.14:14:20.21#ibcon#*before write, iclass 27, count 0 2006.229.14:14:20.21#ibcon#enter sib2, iclass 27, count 0 2006.229.14:14:20.21#ibcon#flushed, iclass 27, count 0 2006.229.14:14:20.21#ibcon#about to write, iclass 27, count 0 2006.229.14:14:20.21#ibcon#wrote, iclass 27, count 0 2006.229.14:14:20.21#ibcon#about to read 3, iclass 27, count 0 2006.229.14:14:20.24#ibcon#read 3, iclass 27, count 0 2006.229.14:14:20.24#ibcon#about to read 4, iclass 27, count 0 2006.229.14:14:20.24#ibcon#read 4, iclass 27, count 0 2006.229.14:14:20.24#ibcon#about to read 5, iclass 27, count 0 2006.229.14:14:20.24#ibcon#read 5, iclass 27, count 0 2006.229.14:14:20.24#ibcon#about to read 6, iclass 27, count 0 2006.229.14:14:20.24#ibcon#read 6, iclass 27, count 0 2006.229.14:14:20.24#ibcon#end of sib2, iclass 27, count 0 2006.229.14:14:20.24#ibcon#*after write, iclass 27, count 0 2006.229.14:14:20.24#ibcon#*before return 0, iclass 27, count 0 2006.229.14:14:20.24#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:20.24#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:20.24#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:14:20.24#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:14:20.24$vck44/valo=4,624.99 2006.229.14:14:20.24#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:14:20.24#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:14:20.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:20.24#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:20.24#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:20.24#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:20.24#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:14:20.24#ibcon#first serial, iclass 29, count 0 2006.229.14:14:20.24#ibcon#enter sib2, iclass 29, count 0 2006.229.14:14:20.24#ibcon#flushed, iclass 29, count 0 2006.229.14:14:20.24#ibcon#about to write, iclass 29, count 0 2006.229.14:14:20.24#ibcon#wrote, iclass 29, count 0 2006.229.14:14:20.24#ibcon#about to read 3, iclass 29, count 0 2006.229.14:14:20.26#ibcon#read 3, iclass 29, count 0 2006.229.14:14:20.26#ibcon#about to read 4, iclass 29, count 0 2006.229.14:14:20.26#ibcon#read 4, iclass 29, count 0 2006.229.14:14:20.26#ibcon#about to read 5, iclass 29, count 0 2006.229.14:14:20.26#ibcon#read 5, iclass 29, count 0 2006.229.14:14:20.26#ibcon#about to read 6, iclass 29, count 0 2006.229.14:14:20.26#ibcon#read 6, iclass 29, count 0 2006.229.14:14:20.26#ibcon#end of sib2, iclass 29, count 0 2006.229.14:14:20.26#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:14:20.26#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:14:20.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:14:20.26#ibcon#*before write, iclass 29, count 0 2006.229.14:14:20.26#ibcon#enter sib2, iclass 29, count 0 2006.229.14:14:20.26#ibcon#flushed, iclass 29, count 0 2006.229.14:14:20.26#ibcon#about to write, iclass 29, count 0 2006.229.14:14:20.26#ibcon#wrote, iclass 29, count 0 2006.229.14:14:20.26#ibcon#about to read 3, iclass 29, count 0 2006.229.14:14:20.30#ibcon#read 3, iclass 29, count 0 2006.229.14:14:20.30#ibcon#about to read 4, iclass 29, count 0 2006.229.14:14:20.30#ibcon#read 4, iclass 29, count 0 2006.229.14:14:20.30#ibcon#about to read 5, iclass 29, count 0 2006.229.14:14:20.30#ibcon#read 5, iclass 29, count 0 2006.229.14:14:20.30#ibcon#about to read 6, iclass 29, count 0 2006.229.14:14:20.30#ibcon#read 6, iclass 29, count 0 2006.229.14:14:20.30#ibcon#end of sib2, iclass 29, count 0 2006.229.14:14:20.30#ibcon#*after write, iclass 29, count 0 2006.229.14:14:20.30#ibcon#*before return 0, iclass 29, count 0 2006.229.14:14:20.30#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:20.30#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:20.30#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:14:20.30#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:14:20.30$vck44/va=4,7 2006.229.14:14:20.30#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.14:14:20.30#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.14:14:20.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:20.30#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:20.36#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:20.36#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:20.36#ibcon#enter wrdev, iclass 31, count 2 2006.229.14:14:20.36#ibcon#first serial, iclass 31, count 2 2006.229.14:14:20.36#ibcon#enter sib2, iclass 31, count 2 2006.229.14:14:20.36#ibcon#flushed, iclass 31, count 2 2006.229.14:14:20.36#ibcon#about to write, iclass 31, count 2 2006.229.14:14:20.36#ibcon#wrote, iclass 31, count 2 2006.229.14:14:20.36#ibcon#about to read 3, iclass 31, count 2 2006.229.14:14:20.38#ibcon#read 3, iclass 31, count 2 2006.229.14:14:20.38#ibcon#about to read 4, iclass 31, count 2 2006.229.14:14:20.38#ibcon#read 4, iclass 31, count 2 2006.229.14:14:20.38#ibcon#about to read 5, iclass 31, count 2 2006.229.14:14:20.38#ibcon#read 5, iclass 31, count 2 2006.229.14:14:20.38#ibcon#about to read 6, iclass 31, count 2 2006.229.14:14:20.38#ibcon#read 6, iclass 31, count 2 2006.229.14:14:20.38#ibcon#end of sib2, iclass 31, count 2 2006.229.14:14:20.38#ibcon#*mode == 0, iclass 31, count 2 2006.229.14:14:20.38#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.14:14:20.38#ibcon#[25=AT04-07\r\n] 2006.229.14:14:20.38#ibcon#*before write, iclass 31, count 2 2006.229.14:14:20.38#ibcon#enter sib2, iclass 31, count 2 2006.229.14:14:20.38#ibcon#flushed, iclass 31, count 2 2006.229.14:14:20.38#ibcon#about to write, iclass 31, count 2 2006.229.14:14:20.38#ibcon#wrote, iclass 31, count 2 2006.229.14:14:20.38#ibcon#about to read 3, iclass 31, count 2 2006.229.14:14:20.41#ibcon#read 3, iclass 31, count 2 2006.229.14:14:20.41#ibcon#about to read 4, iclass 31, count 2 2006.229.14:14:20.41#ibcon#read 4, iclass 31, count 2 2006.229.14:14:20.41#ibcon#about to read 5, iclass 31, count 2 2006.229.14:14:20.41#ibcon#read 5, iclass 31, count 2 2006.229.14:14:20.41#ibcon#about to read 6, iclass 31, count 2 2006.229.14:14:20.41#ibcon#read 6, iclass 31, count 2 2006.229.14:14:20.41#ibcon#end of sib2, iclass 31, count 2 2006.229.14:14:20.41#ibcon#*after write, iclass 31, count 2 2006.229.14:14:20.44#ibcon#*before return 0, iclass 31, count 2 2006.229.14:14:20.45#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:20.45#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:20.45#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.14:14:20.45#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:20.45#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:20.56#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:20.56#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:20.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:14:20.56#ibcon#first serial, iclass 31, count 0 2006.229.14:14:20.56#ibcon#enter sib2, iclass 31, count 0 2006.229.14:14:20.56#ibcon#flushed, iclass 31, count 0 2006.229.14:14:20.56#ibcon#about to write, iclass 31, count 0 2006.229.14:14:20.56#ibcon#wrote, iclass 31, count 0 2006.229.14:14:20.56#ibcon#about to read 3, iclass 31, count 0 2006.229.14:14:20.58#ibcon#read 3, iclass 31, count 0 2006.229.14:14:20.58#ibcon#about to read 4, iclass 31, count 0 2006.229.14:14:20.58#ibcon#read 4, iclass 31, count 0 2006.229.14:14:20.58#ibcon#about to read 5, iclass 31, count 0 2006.229.14:14:20.58#ibcon#read 5, iclass 31, count 0 2006.229.14:14:20.58#ibcon#about to read 6, iclass 31, count 0 2006.229.14:14:20.58#ibcon#read 6, iclass 31, count 0 2006.229.14:14:20.58#ibcon#end of sib2, iclass 31, count 0 2006.229.14:14:20.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:14:20.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:14:20.58#ibcon#[25=USB\r\n] 2006.229.14:14:20.58#ibcon#*before write, iclass 31, count 0 2006.229.14:14:20.58#ibcon#enter sib2, iclass 31, count 0 2006.229.14:14:20.58#ibcon#flushed, iclass 31, count 0 2006.229.14:14:20.58#ibcon#about to write, iclass 31, count 0 2006.229.14:14:20.58#ibcon#wrote, iclass 31, count 0 2006.229.14:14:20.58#ibcon#about to read 3, iclass 31, count 0 2006.229.14:14:20.61#ibcon#read 3, iclass 31, count 0 2006.229.14:14:20.61#ibcon#about to read 4, iclass 31, count 0 2006.229.14:14:20.61#ibcon#read 4, iclass 31, count 0 2006.229.14:14:20.61#ibcon#about to read 5, iclass 31, count 0 2006.229.14:14:20.61#ibcon#read 5, iclass 31, count 0 2006.229.14:14:20.61#ibcon#about to read 6, iclass 31, count 0 2006.229.14:14:20.61#ibcon#read 6, iclass 31, count 0 2006.229.14:14:20.61#ibcon#end of sib2, iclass 31, count 0 2006.229.14:14:20.61#ibcon#*after write, iclass 31, count 0 2006.229.14:14:20.61#ibcon#*before return 0, iclass 31, count 0 2006.229.14:14:20.61#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:20.61#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:20.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:14:20.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:14:20.61$vck44/valo=5,734.99 2006.229.14:14:20.61#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.14:14:20.61#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.14:14:20.61#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:20.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:20.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:20.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:20.61#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:14:20.61#ibcon#first serial, iclass 33, count 0 2006.229.14:14:20.61#ibcon#enter sib2, iclass 33, count 0 2006.229.14:14:20.61#ibcon#flushed, iclass 33, count 0 2006.229.14:14:20.61#ibcon#about to write, iclass 33, count 0 2006.229.14:14:20.61#ibcon#wrote, iclass 33, count 0 2006.229.14:14:20.61#ibcon#about to read 3, iclass 33, count 0 2006.229.14:14:20.63#ibcon#read 3, iclass 33, count 0 2006.229.14:14:20.63#ibcon#about to read 4, iclass 33, count 0 2006.229.14:14:20.63#ibcon#read 4, iclass 33, count 0 2006.229.14:14:20.63#ibcon#about to read 5, iclass 33, count 0 2006.229.14:14:20.63#ibcon#read 5, iclass 33, count 0 2006.229.14:14:20.63#ibcon#about to read 6, iclass 33, count 0 2006.229.14:14:20.63#ibcon#read 6, iclass 33, count 0 2006.229.14:14:20.63#ibcon#end of sib2, iclass 33, count 0 2006.229.14:14:20.63#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:14:20.63#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:14:20.63#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:14:20.63#ibcon#*before write, iclass 33, count 0 2006.229.14:14:20.63#ibcon#enter sib2, iclass 33, count 0 2006.229.14:14:20.63#ibcon#flushed, iclass 33, count 0 2006.229.14:14:20.63#ibcon#about to write, iclass 33, count 0 2006.229.14:14:20.63#ibcon#wrote, iclass 33, count 0 2006.229.14:14:20.63#ibcon#about to read 3, iclass 33, count 0 2006.229.14:14:20.67#ibcon#read 3, iclass 33, count 0 2006.229.14:14:20.67#ibcon#about to read 4, iclass 33, count 0 2006.229.14:14:20.67#ibcon#read 4, iclass 33, count 0 2006.229.14:14:20.67#ibcon#about to read 5, iclass 33, count 0 2006.229.14:14:20.67#ibcon#read 5, iclass 33, count 0 2006.229.14:14:20.67#ibcon#about to read 6, iclass 33, count 0 2006.229.14:14:20.67#ibcon#read 6, iclass 33, count 0 2006.229.14:14:20.67#ibcon#end of sib2, iclass 33, count 0 2006.229.14:14:20.67#ibcon#*after write, iclass 33, count 0 2006.229.14:14:20.67#ibcon#*before return 0, iclass 33, count 0 2006.229.14:14:20.67#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:20.67#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:20.67#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:14:20.67#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:14:20.67$vck44/va=5,4 2006.229.14:14:20.67#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.14:14:20.67#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.14:14:20.67#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:20.67#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:20.73#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:20.73#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:20.73#ibcon#enter wrdev, iclass 35, count 2 2006.229.14:14:20.73#ibcon#first serial, iclass 35, count 2 2006.229.14:14:20.73#ibcon#enter sib2, iclass 35, count 2 2006.229.14:14:20.73#ibcon#flushed, iclass 35, count 2 2006.229.14:14:20.73#ibcon#about to write, iclass 35, count 2 2006.229.14:14:20.73#ibcon#wrote, iclass 35, count 2 2006.229.14:14:20.73#ibcon#about to read 3, iclass 35, count 2 2006.229.14:14:20.75#ibcon#read 3, iclass 35, count 2 2006.229.14:14:20.75#ibcon#about to read 4, iclass 35, count 2 2006.229.14:14:20.75#ibcon#read 4, iclass 35, count 2 2006.229.14:14:20.75#ibcon#about to read 5, iclass 35, count 2 2006.229.14:14:20.75#ibcon#read 5, iclass 35, count 2 2006.229.14:14:20.75#ibcon#about to read 6, iclass 35, count 2 2006.229.14:14:20.75#ibcon#read 6, iclass 35, count 2 2006.229.14:14:20.75#ibcon#end of sib2, iclass 35, count 2 2006.229.14:14:20.75#ibcon#*mode == 0, iclass 35, count 2 2006.229.14:14:20.75#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.14:14:20.75#ibcon#[25=AT05-04\r\n] 2006.229.14:14:20.75#ibcon#*before write, iclass 35, count 2 2006.229.14:14:20.75#ibcon#enter sib2, iclass 35, count 2 2006.229.14:14:20.75#ibcon#flushed, iclass 35, count 2 2006.229.14:14:20.75#ibcon#about to write, iclass 35, count 2 2006.229.14:14:20.75#ibcon#wrote, iclass 35, count 2 2006.229.14:14:20.75#ibcon#about to read 3, iclass 35, count 2 2006.229.14:14:20.78#ibcon#read 3, iclass 35, count 2 2006.229.14:14:20.78#ibcon#about to read 4, iclass 35, count 2 2006.229.14:14:20.78#ibcon#read 4, iclass 35, count 2 2006.229.14:14:20.78#ibcon#about to read 5, iclass 35, count 2 2006.229.14:14:20.78#ibcon#read 5, iclass 35, count 2 2006.229.14:14:20.78#ibcon#about to read 6, iclass 35, count 2 2006.229.14:14:20.78#ibcon#read 6, iclass 35, count 2 2006.229.14:14:20.78#ibcon#end of sib2, iclass 35, count 2 2006.229.14:14:20.78#ibcon#*after write, iclass 35, count 2 2006.229.14:14:20.78#ibcon#*before return 0, iclass 35, count 2 2006.229.14:14:20.78#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:20.78#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:20.78#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.14:14:20.78#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:20.78#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:20.90#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:20.90#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:20.90#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:14:20.90#ibcon#first serial, iclass 35, count 0 2006.229.14:14:20.90#ibcon#enter sib2, iclass 35, count 0 2006.229.14:14:20.90#ibcon#flushed, iclass 35, count 0 2006.229.14:14:20.90#ibcon#about to write, iclass 35, count 0 2006.229.14:14:20.90#ibcon#wrote, iclass 35, count 0 2006.229.14:14:20.90#ibcon#about to read 3, iclass 35, count 0 2006.229.14:14:20.92#ibcon#read 3, iclass 35, count 0 2006.229.14:14:20.92#ibcon#about to read 4, iclass 35, count 0 2006.229.14:14:20.92#ibcon#read 4, iclass 35, count 0 2006.229.14:14:20.92#ibcon#about to read 5, iclass 35, count 0 2006.229.14:14:20.92#ibcon#read 5, iclass 35, count 0 2006.229.14:14:20.92#ibcon#about to read 6, iclass 35, count 0 2006.229.14:14:20.92#ibcon#read 6, iclass 35, count 0 2006.229.14:14:20.92#ibcon#end of sib2, iclass 35, count 0 2006.229.14:14:20.92#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:14:20.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:14:20.92#ibcon#[25=USB\r\n] 2006.229.14:14:20.92#ibcon#*before write, iclass 35, count 0 2006.229.14:14:20.92#ibcon#enter sib2, iclass 35, count 0 2006.229.14:14:20.92#ibcon#flushed, iclass 35, count 0 2006.229.14:14:20.92#ibcon#about to write, iclass 35, count 0 2006.229.14:14:20.92#ibcon#wrote, iclass 35, count 0 2006.229.14:14:20.92#ibcon#about to read 3, iclass 35, count 0 2006.229.14:14:20.95#ibcon#read 3, iclass 35, count 0 2006.229.14:14:20.95#ibcon#about to read 4, iclass 35, count 0 2006.229.14:14:20.95#ibcon#read 4, iclass 35, count 0 2006.229.14:14:20.95#ibcon#about to read 5, iclass 35, count 0 2006.229.14:14:20.95#ibcon#read 5, iclass 35, count 0 2006.229.14:14:20.95#ibcon#about to read 6, iclass 35, count 0 2006.229.14:14:20.95#ibcon#read 6, iclass 35, count 0 2006.229.14:14:20.95#ibcon#end of sib2, iclass 35, count 0 2006.229.14:14:20.95#ibcon#*after write, iclass 35, count 0 2006.229.14:14:20.95#ibcon#*before return 0, iclass 35, count 0 2006.229.14:14:20.95#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:20.95#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:20.95#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:14:20.95#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:14:20.95$vck44/valo=6,814.99 2006.229.14:14:20.95#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:14:20.95#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:14:20.95#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:20.95#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:20.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:20.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:20.95#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:14:20.95#ibcon#first serial, iclass 37, count 0 2006.229.14:14:20.95#ibcon#enter sib2, iclass 37, count 0 2006.229.14:14:20.95#ibcon#flushed, iclass 37, count 0 2006.229.14:14:20.95#ibcon#about to write, iclass 37, count 0 2006.229.14:14:20.95#ibcon#wrote, iclass 37, count 0 2006.229.14:14:20.95#ibcon#about to read 3, iclass 37, count 0 2006.229.14:14:20.97#ibcon#read 3, iclass 37, count 0 2006.229.14:14:20.97#ibcon#about to read 4, iclass 37, count 0 2006.229.14:14:20.97#ibcon#read 4, iclass 37, count 0 2006.229.14:14:20.97#ibcon#about to read 5, iclass 37, count 0 2006.229.14:14:20.97#ibcon#read 5, iclass 37, count 0 2006.229.14:14:20.97#ibcon#about to read 6, iclass 37, count 0 2006.229.14:14:20.97#ibcon#read 6, iclass 37, count 0 2006.229.14:14:20.97#ibcon#end of sib2, iclass 37, count 0 2006.229.14:14:20.97#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:14:20.97#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:14:20.97#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:14:20.97#ibcon#*before write, iclass 37, count 0 2006.229.14:14:20.97#ibcon#enter sib2, iclass 37, count 0 2006.229.14:14:20.97#ibcon#flushed, iclass 37, count 0 2006.229.14:14:20.97#ibcon#about to write, iclass 37, count 0 2006.229.14:14:20.97#ibcon#wrote, iclass 37, count 0 2006.229.14:14:20.97#ibcon#about to read 3, iclass 37, count 0 2006.229.14:14:21.01#ibcon#read 3, iclass 37, count 0 2006.229.14:14:21.01#ibcon#about to read 4, iclass 37, count 0 2006.229.14:14:21.01#ibcon#read 4, iclass 37, count 0 2006.229.14:14:21.01#ibcon#about to read 5, iclass 37, count 0 2006.229.14:14:21.01#ibcon#read 5, iclass 37, count 0 2006.229.14:14:21.01#ibcon#about to read 6, iclass 37, count 0 2006.229.14:14:21.01#ibcon#read 6, iclass 37, count 0 2006.229.14:14:21.01#ibcon#end of sib2, iclass 37, count 0 2006.229.14:14:21.01#ibcon#*after write, iclass 37, count 0 2006.229.14:14:21.01#ibcon#*before return 0, iclass 37, count 0 2006.229.14:14:21.01#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:21.01#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:21.01#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:14:21.01#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:14:21.01$vck44/va=6,4 2006.229.14:14:21.01#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.14:14:21.01#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.14:14:21.01#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:21.01#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:21.07#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:21.07#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:21.07#ibcon#enter wrdev, iclass 39, count 2 2006.229.14:14:21.07#ibcon#first serial, iclass 39, count 2 2006.229.14:14:21.07#ibcon#enter sib2, iclass 39, count 2 2006.229.14:14:21.07#ibcon#flushed, iclass 39, count 2 2006.229.14:14:21.07#ibcon#about to write, iclass 39, count 2 2006.229.14:14:21.07#ibcon#wrote, iclass 39, count 2 2006.229.14:14:21.07#ibcon#about to read 3, iclass 39, count 2 2006.229.14:14:21.09#ibcon#read 3, iclass 39, count 2 2006.229.14:14:21.09#ibcon#about to read 4, iclass 39, count 2 2006.229.14:14:21.09#ibcon#read 4, iclass 39, count 2 2006.229.14:14:21.09#ibcon#about to read 5, iclass 39, count 2 2006.229.14:14:21.09#ibcon#read 5, iclass 39, count 2 2006.229.14:14:21.09#ibcon#about to read 6, iclass 39, count 2 2006.229.14:14:21.09#ibcon#read 6, iclass 39, count 2 2006.229.14:14:21.09#ibcon#end of sib2, iclass 39, count 2 2006.229.14:14:21.09#ibcon#*mode == 0, iclass 39, count 2 2006.229.14:14:21.09#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.14:14:21.09#ibcon#[25=AT06-04\r\n] 2006.229.14:14:21.09#ibcon#*before write, iclass 39, count 2 2006.229.14:14:21.09#ibcon#enter sib2, iclass 39, count 2 2006.229.14:14:21.09#ibcon#flushed, iclass 39, count 2 2006.229.14:14:21.09#ibcon#about to write, iclass 39, count 2 2006.229.14:14:21.09#ibcon#wrote, iclass 39, count 2 2006.229.14:14:21.09#ibcon#about to read 3, iclass 39, count 2 2006.229.14:14:21.12#ibcon#read 3, iclass 39, count 2 2006.229.14:14:21.12#ibcon#about to read 4, iclass 39, count 2 2006.229.14:14:21.12#ibcon#read 4, iclass 39, count 2 2006.229.14:14:21.12#ibcon#about to read 5, iclass 39, count 2 2006.229.14:14:21.12#ibcon#read 5, iclass 39, count 2 2006.229.14:14:21.12#ibcon#about to read 6, iclass 39, count 2 2006.229.14:14:21.12#ibcon#read 6, iclass 39, count 2 2006.229.14:14:21.12#ibcon#end of sib2, iclass 39, count 2 2006.229.14:14:21.12#ibcon#*after write, iclass 39, count 2 2006.229.14:14:21.12#ibcon#*before return 0, iclass 39, count 2 2006.229.14:14:21.12#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:21.12#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:21.12#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.14:14:21.12#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:21.12#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:21.24#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:21.24#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:21.24#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:14:21.24#ibcon#first serial, iclass 39, count 0 2006.229.14:14:21.24#ibcon#enter sib2, iclass 39, count 0 2006.229.14:14:21.24#ibcon#flushed, iclass 39, count 0 2006.229.14:14:21.24#ibcon#about to write, iclass 39, count 0 2006.229.14:14:21.24#ibcon#wrote, iclass 39, count 0 2006.229.14:14:21.24#ibcon#about to read 3, iclass 39, count 0 2006.229.14:14:21.26#ibcon#read 3, iclass 39, count 0 2006.229.14:14:21.26#ibcon#about to read 4, iclass 39, count 0 2006.229.14:14:21.26#ibcon#read 4, iclass 39, count 0 2006.229.14:14:21.26#ibcon#about to read 5, iclass 39, count 0 2006.229.14:14:21.26#ibcon#read 5, iclass 39, count 0 2006.229.14:14:21.26#ibcon#about to read 6, iclass 39, count 0 2006.229.14:14:21.26#ibcon#read 6, iclass 39, count 0 2006.229.14:14:21.26#ibcon#end of sib2, iclass 39, count 0 2006.229.14:14:21.26#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:14:21.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:14:21.26#ibcon#[25=USB\r\n] 2006.229.14:14:21.26#ibcon#*before write, iclass 39, count 0 2006.229.14:14:21.26#ibcon#enter sib2, iclass 39, count 0 2006.229.14:14:21.26#ibcon#flushed, iclass 39, count 0 2006.229.14:14:21.26#ibcon#about to write, iclass 39, count 0 2006.229.14:14:21.26#ibcon#wrote, iclass 39, count 0 2006.229.14:14:21.26#ibcon#about to read 3, iclass 39, count 0 2006.229.14:14:21.29#ibcon#read 3, iclass 39, count 0 2006.229.14:14:21.29#ibcon#about to read 4, iclass 39, count 0 2006.229.14:14:21.29#ibcon#read 4, iclass 39, count 0 2006.229.14:14:21.29#ibcon#about to read 5, iclass 39, count 0 2006.229.14:14:21.29#ibcon#read 5, iclass 39, count 0 2006.229.14:14:21.29#ibcon#about to read 6, iclass 39, count 0 2006.229.14:14:21.29#ibcon#read 6, iclass 39, count 0 2006.229.14:14:21.29#ibcon#end of sib2, iclass 39, count 0 2006.229.14:14:21.29#ibcon#*after write, iclass 39, count 0 2006.229.14:14:21.29#ibcon#*before return 0, iclass 39, count 0 2006.229.14:14:21.29#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:21.29#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:21.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:14:21.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:14:21.29$vck44/valo=7,864.99 2006.229.14:14:21.29#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.14:14:21.29#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.14:14:21.29#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:21.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:14:21.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:14:21.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:14:21.29#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:14:21.29#ibcon#first serial, iclass 3, count 0 2006.229.14:14:21.29#ibcon#enter sib2, iclass 3, count 0 2006.229.14:14:21.29#ibcon#flushed, iclass 3, count 0 2006.229.14:14:21.29#ibcon#about to write, iclass 3, count 0 2006.229.14:14:21.29#ibcon#wrote, iclass 3, count 0 2006.229.14:14:21.29#ibcon#about to read 3, iclass 3, count 0 2006.229.14:14:21.31#ibcon#read 3, iclass 3, count 0 2006.229.14:14:21.31#ibcon#about to read 4, iclass 3, count 0 2006.229.14:14:21.31#ibcon#read 4, iclass 3, count 0 2006.229.14:14:21.31#ibcon#about to read 5, iclass 3, count 0 2006.229.14:14:21.31#ibcon#read 5, iclass 3, count 0 2006.229.14:14:21.31#ibcon#about to read 6, iclass 3, count 0 2006.229.14:14:21.31#ibcon#read 6, iclass 3, count 0 2006.229.14:14:21.31#ibcon#end of sib2, iclass 3, count 0 2006.229.14:14:21.31#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:14:21.31#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:14:21.31#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:14:21.31#ibcon#*before write, iclass 3, count 0 2006.229.14:14:21.31#ibcon#enter sib2, iclass 3, count 0 2006.229.14:14:21.31#ibcon#flushed, iclass 3, count 0 2006.229.14:14:21.31#ibcon#about to write, iclass 3, count 0 2006.229.14:14:21.31#ibcon#wrote, iclass 3, count 0 2006.229.14:14:21.31#ibcon#about to read 3, iclass 3, count 0 2006.229.14:14:21.35#ibcon#read 3, iclass 3, count 0 2006.229.14:14:21.35#ibcon#about to read 4, iclass 3, count 0 2006.229.14:14:21.35#ibcon#read 4, iclass 3, count 0 2006.229.14:14:21.35#ibcon#about to read 5, iclass 3, count 0 2006.229.14:14:21.35#ibcon#read 5, iclass 3, count 0 2006.229.14:14:21.35#ibcon#about to read 6, iclass 3, count 0 2006.229.14:14:21.35#ibcon#read 6, iclass 3, count 0 2006.229.14:14:21.35#ibcon#end of sib2, iclass 3, count 0 2006.229.14:14:21.35#ibcon#*after write, iclass 3, count 0 2006.229.14:14:21.35#ibcon#*before return 0, iclass 3, count 0 2006.229.14:14:21.35#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:14:21.35#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:14:21.35#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:14:21.35#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:14:21.35$vck44/va=7,5 2006.229.14:14:21.35#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.14:14:21.35#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.14:14:21.35#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:21.35#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:14:21.41#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:14:21.41#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:14:21.41#ibcon#enter wrdev, iclass 5, count 2 2006.229.14:14:21.41#ibcon#first serial, iclass 5, count 2 2006.229.14:14:21.41#ibcon#enter sib2, iclass 5, count 2 2006.229.14:14:21.41#ibcon#flushed, iclass 5, count 2 2006.229.14:14:21.41#ibcon#about to write, iclass 5, count 2 2006.229.14:14:21.41#ibcon#wrote, iclass 5, count 2 2006.229.14:14:21.41#ibcon#about to read 3, iclass 5, count 2 2006.229.14:14:21.43#ibcon#read 3, iclass 5, count 2 2006.229.14:14:21.43#ibcon#about to read 4, iclass 5, count 2 2006.229.14:14:21.43#ibcon#read 4, iclass 5, count 2 2006.229.14:14:21.43#ibcon#about to read 5, iclass 5, count 2 2006.229.14:14:21.43#ibcon#read 5, iclass 5, count 2 2006.229.14:14:21.43#ibcon#about to read 6, iclass 5, count 2 2006.229.14:14:21.43#ibcon#read 6, iclass 5, count 2 2006.229.14:14:21.43#ibcon#end of sib2, iclass 5, count 2 2006.229.14:14:21.43#ibcon#*mode == 0, iclass 5, count 2 2006.229.14:14:21.43#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.14:14:21.43#ibcon#[25=AT07-05\r\n] 2006.229.14:14:21.43#ibcon#*before write, iclass 5, count 2 2006.229.14:14:21.43#ibcon#enter sib2, iclass 5, count 2 2006.229.14:14:21.43#ibcon#flushed, iclass 5, count 2 2006.229.14:14:21.43#ibcon#about to write, iclass 5, count 2 2006.229.14:14:21.43#ibcon#wrote, iclass 5, count 2 2006.229.14:14:21.43#ibcon#about to read 3, iclass 5, count 2 2006.229.14:14:21.46#ibcon#read 3, iclass 5, count 2 2006.229.14:14:21.46#ibcon#about to read 4, iclass 5, count 2 2006.229.14:14:21.46#ibcon#read 4, iclass 5, count 2 2006.229.14:14:21.46#ibcon#about to read 5, iclass 5, count 2 2006.229.14:14:21.46#ibcon#read 5, iclass 5, count 2 2006.229.14:14:21.46#ibcon#about to read 6, iclass 5, count 2 2006.229.14:14:21.46#ibcon#read 6, iclass 5, count 2 2006.229.14:14:21.46#ibcon#end of sib2, iclass 5, count 2 2006.229.14:14:21.46#ibcon#*after write, iclass 5, count 2 2006.229.14:14:21.46#ibcon#*before return 0, iclass 5, count 2 2006.229.14:14:21.46#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:14:21.46#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:14:21.46#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.14:14:21.46#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:21.46#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:14:21.58#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:14:21.58#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:14:21.58#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:14:21.58#ibcon#first serial, iclass 5, count 0 2006.229.14:14:21.58#ibcon#enter sib2, iclass 5, count 0 2006.229.14:14:21.58#ibcon#flushed, iclass 5, count 0 2006.229.14:14:21.58#ibcon#about to write, iclass 5, count 0 2006.229.14:14:21.58#ibcon#wrote, iclass 5, count 0 2006.229.14:14:21.58#ibcon#about to read 3, iclass 5, count 0 2006.229.14:14:21.60#ibcon#read 3, iclass 5, count 0 2006.229.14:14:21.60#ibcon#about to read 4, iclass 5, count 0 2006.229.14:14:21.60#ibcon#read 4, iclass 5, count 0 2006.229.14:14:21.60#ibcon#about to read 5, iclass 5, count 0 2006.229.14:14:21.60#ibcon#read 5, iclass 5, count 0 2006.229.14:14:21.60#ibcon#about to read 6, iclass 5, count 0 2006.229.14:14:21.60#ibcon#read 6, iclass 5, count 0 2006.229.14:14:21.60#ibcon#end of sib2, iclass 5, count 0 2006.229.14:14:21.60#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:14:21.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:14:21.60#ibcon#[25=USB\r\n] 2006.229.14:14:21.60#ibcon#*before write, iclass 5, count 0 2006.229.14:14:21.60#ibcon#enter sib2, iclass 5, count 0 2006.229.14:14:21.60#ibcon#flushed, iclass 5, count 0 2006.229.14:14:21.60#ibcon#about to write, iclass 5, count 0 2006.229.14:14:21.60#ibcon#wrote, iclass 5, count 0 2006.229.14:14:21.60#ibcon#about to read 3, iclass 5, count 0 2006.229.14:14:21.63#ibcon#read 3, iclass 5, count 0 2006.229.14:14:21.63#ibcon#about to read 4, iclass 5, count 0 2006.229.14:14:21.63#ibcon#read 4, iclass 5, count 0 2006.229.14:14:21.63#ibcon#about to read 5, iclass 5, count 0 2006.229.14:14:21.63#ibcon#read 5, iclass 5, count 0 2006.229.14:14:21.63#ibcon#about to read 6, iclass 5, count 0 2006.229.14:14:21.63#ibcon#read 6, iclass 5, count 0 2006.229.14:14:21.63#ibcon#end of sib2, iclass 5, count 0 2006.229.14:14:21.63#ibcon#*after write, iclass 5, count 0 2006.229.14:14:21.63#ibcon#*before return 0, iclass 5, count 0 2006.229.14:14:21.63#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:14:21.63#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:14:21.63#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:14:21.63#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:14:21.63$vck44/valo=8,884.99 2006.229.14:14:21.63#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.14:14:21.63#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.14:14:21.63#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:21.63#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:14:21.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:14:21.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:14:21.63#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:14:21.63#ibcon#first serial, iclass 7, count 0 2006.229.14:14:21.63#ibcon#enter sib2, iclass 7, count 0 2006.229.14:14:21.63#ibcon#flushed, iclass 7, count 0 2006.229.14:14:21.63#ibcon#about to write, iclass 7, count 0 2006.229.14:14:21.63#ibcon#wrote, iclass 7, count 0 2006.229.14:14:21.63#ibcon#about to read 3, iclass 7, count 0 2006.229.14:14:21.65#ibcon#read 3, iclass 7, count 0 2006.229.14:14:21.65#ibcon#about to read 4, iclass 7, count 0 2006.229.14:14:21.65#ibcon#read 4, iclass 7, count 0 2006.229.14:14:21.65#ibcon#about to read 5, iclass 7, count 0 2006.229.14:14:21.65#ibcon#read 5, iclass 7, count 0 2006.229.14:14:21.65#ibcon#about to read 6, iclass 7, count 0 2006.229.14:14:21.65#ibcon#read 6, iclass 7, count 0 2006.229.14:14:21.65#ibcon#end of sib2, iclass 7, count 0 2006.229.14:14:21.65#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:14:21.65#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:14:21.65#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:14:21.65#ibcon#*before write, iclass 7, count 0 2006.229.14:14:21.65#ibcon#enter sib2, iclass 7, count 0 2006.229.14:14:21.65#ibcon#flushed, iclass 7, count 0 2006.229.14:14:21.65#ibcon#about to write, iclass 7, count 0 2006.229.14:14:21.65#ibcon#wrote, iclass 7, count 0 2006.229.14:14:21.65#ibcon#about to read 3, iclass 7, count 0 2006.229.14:14:21.69#ibcon#read 3, iclass 7, count 0 2006.229.14:14:21.69#ibcon#about to read 4, iclass 7, count 0 2006.229.14:14:21.69#ibcon#read 4, iclass 7, count 0 2006.229.14:14:21.69#ibcon#about to read 5, iclass 7, count 0 2006.229.14:14:21.69#ibcon#read 5, iclass 7, count 0 2006.229.14:14:21.69#ibcon#about to read 6, iclass 7, count 0 2006.229.14:14:21.69#ibcon#read 6, iclass 7, count 0 2006.229.14:14:21.69#ibcon#end of sib2, iclass 7, count 0 2006.229.14:14:21.69#ibcon#*after write, iclass 7, count 0 2006.229.14:14:21.69#ibcon#*before return 0, iclass 7, count 0 2006.229.14:14:21.69#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:14:21.69#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:14:21.69#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:14:21.69#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:14:21.69$vck44/va=8,6 2006.229.14:14:21.69#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.14:14:21.69#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.14:14:21.69#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:21.69#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:14:21.75#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:14:21.75#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:14:21.75#ibcon#enter wrdev, iclass 11, count 2 2006.229.14:14:21.75#ibcon#first serial, iclass 11, count 2 2006.229.14:14:21.75#ibcon#enter sib2, iclass 11, count 2 2006.229.14:14:21.75#ibcon#flushed, iclass 11, count 2 2006.229.14:14:21.75#ibcon#about to write, iclass 11, count 2 2006.229.14:14:21.75#ibcon#wrote, iclass 11, count 2 2006.229.14:14:21.75#ibcon#about to read 3, iclass 11, count 2 2006.229.14:14:21.77#ibcon#read 3, iclass 11, count 2 2006.229.14:14:21.77#ibcon#about to read 4, iclass 11, count 2 2006.229.14:14:21.77#ibcon#read 4, iclass 11, count 2 2006.229.14:14:21.77#ibcon#about to read 5, iclass 11, count 2 2006.229.14:14:21.77#ibcon#read 5, iclass 11, count 2 2006.229.14:14:21.77#ibcon#about to read 6, iclass 11, count 2 2006.229.14:14:21.77#ibcon#read 6, iclass 11, count 2 2006.229.14:14:21.77#ibcon#end of sib2, iclass 11, count 2 2006.229.14:14:21.77#ibcon#*mode == 0, iclass 11, count 2 2006.229.14:14:21.77#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.14:14:21.77#ibcon#[25=AT08-06\r\n] 2006.229.14:14:21.77#ibcon#*before write, iclass 11, count 2 2006.229.14:14:21.77#ibcon#enter sib2, iclass 11, count 2 2006.229.14:14:21.77#ibcon#flushed, iclass 11, count 2 2006.229.14:14:21.77#ibcon#about to write, iclass 11, count 2 2006.229.14:14:21.77#ibcon#wrote, iclass 11, count 2 2006.229.14:14:21.77#ibcon#about to read 3, iclass 11, count 2 2006.229.14:14:21.80#ibcon#read 3, iclass 11, count 2 2006.229.14:14:21.80#ibcon#about to read 4, iclass 11, count 2 2006.229.14:14:21.80#ibcon#read 4, iclass 11, count 2 2006.229.14:14:21.80#ibcon#about to read 5, iclass 11, count 2 2006.229.14:14:21.80#ibcon#read 5, iclass 11, count 2 2006.229.14:14:21.80#ibcon#about to read 6, iclass 11, count 2 2006.229.14:14:21.80#ibcon#read 6, iclass 11, count 2 2006.229.14:14:21.80#ibcon#end of sib2, iclass 11, count 2 2006.229.14:14:21.80#ibcon#*after write, iclass 11, count 2 2006.229.14:14:21.80#ibcon#*before return 0, iclass 11, count 2 2006.229.14:14:21.80#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:14:21.80#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:14:21.80#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.14:14:21.80#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:21.80#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:14:21.92#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:14:21.92#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:14:21.92#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:14:21.92#ibcon#first serial, iclass 11, count 0 2006.229.14:14:21.92#ibcon#enter sib2, iclass 11, count 0 2006.229.14:14:21.92#ibcon#flushed, iclass 11, count 0 2006.229.14:14:21.92#ibcon#about to write, iclass 11, count 0 2006.229.14:14:21.92#ibcon#wrote, iclass 11, count 0 2006.229.14:14:21.92#ibcon#about to read 3, iclass 11, count 0 2006.229.14:14:21.94#ibcon#read 3, iclass 11, count 0 2006.229.14:14:21.94#ibcon#about to read 4, iclass 11, count 0 2006.229.14:14:21.94#ibcon#read 4, iclass 11, count 0 2006.229.14:14:21.94#ibcon#about to read 5, iclass 11, count 0 2006.229.14:14:21.94#ibcon#read 5, iclass 11, count 0 2006.229.14:14:21.94#ibcon#about to read 6, iclass 11, count 0 2006.229.14:14:21.94#ibcon#read 6, iclass 11, count 0 2006.229.14:14:21.94#ibcon#end of sib2, iclass 11, count 0 2006.229.14:14:21.94#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:14:21.94#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:14:21.94#ibcon#[25=USB\r\n] 2006.229.14:14:21.94#ibcon#*before write, iclass 11, count 0 2006.229.14:14:21.94#ibcon#enter sib2, iclass 11, count 0 2006.229.14:14:21.94#ibcon#flushed, iclass 11, count 0 2006.229.14:14:21.94#ibcon#about to write, iclass 11, count 0 2006.229.14:14:21.94#ibcon#wrote, iclass 11, count 0 2006.229.14:14:21.94#ibcon#about to read 3, iclass 11, count 0 2006.229.14:14:21.97#ibcon#read 3, iclass 11, count 0 2006.229.14:14:21.97#ibcon#about to read 4, iclass 11, count 0 2006.229.14:14:21.97#ibcon#read 4, iclass 11, count 0 2006.229.14:14:21.97#ibcon#about to read 5, iclass 11, count 0 2006.229.14:14:21.97#ibcon#read 5, iclass 11, count 0 2006.229.14:14:21.97#ibcon#about to read 6, iclass 11, count 0 2006.229.14:14:21.97#ibcon#read 6, iclass 11, count 0 2006.229.14:14:21.97#ibcon#end of sib2, iclass 11, count 0 2006.229.14:14:21.97#ibcon#*after write, iclass 11, count 0 2006.229.14:14:21.97#ibcon#*before return 0, iclass 11, count 0 2006.229.14:14:21.97#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:14:21.97#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:14:21.97#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:14:21.97#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:14:21.97$vck44/vblo=1,629.99 2006.229.14:14:21.97#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.14:14:21.97#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.14:14:21.97#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:21.97#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:21.97#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:21.97#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:21.97#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:14:21.97#ibcon#first serial, iclass 13, count 0 2006.229.14:14:21.97#ibcon#enter sib2, iclass 13, count 0 2006.229.14:14:21.97#ibcon#flushed, iclass 13, count 0 2006.229.14:14:21.97#ibcon#about to write, iclass 13, count 0 2006.229.14:14:21.97#ibcon#wrote, iclass 13, count 0 2006.229.14:14:21.97#ibcon#about to read 3, iclass 13, count 0 2006.229.14:14:21.99#ibcon#read 3, iclass 13, count 0 2006.229.14:14:21.99#ibcon#about to read 4, iclass 13, count 0 2006.229.14:14:21.99#ibcon#read 4, iclass 13, count 0 2006.229.14:14:21.99#ibcon#about to read 5, iclass 13, count 0 2006.229.14:14:21.99#ibcon#read 5, iclass 13, count 0 2006.229.14:14:21.99#ibcon#about to read 6, iclass 13, count 0 2006.229.14:14:21.99#ibcon#read 6, iclass 13, count 0 2006.229.14:14:21.99#ibcon#end of sib2, iclass 13, count 0 2006.229.14:14:21.99#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:14:21.99#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:14:21.99#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:14:21.99#ibcon#*before write, iclass 13, count 0 2006.229.14:14:21.99#ibcon#enter sib2, iclass 13, count 0 2006.229.14:14:21.99#ibcon#flushed, iclass 13, count 0 2006.229.14:14:21.99#ibcon#about to write, iclass 13, count 0 2006.229.14:14:21.99#ibcon#wrote, iclass 13, count 0 2006.229.14:14:21.99#ibcon#about to read 3, iclass 13, count 0 2006.229.14:14:22.03#ibcon#read 3, iclass 13, count 0 2006.229.14:14:22.03#ibcon#about to read 4, iclass 13, count 0 2006.229.14:14:22.03#ibcon#read 4, iclass 13, count 0 2006.229.14:14:22.03#ibcon#about to read 5, iclass 13, count 0 2006.229.14:14:22.03#ibcon#read 5, iclass 13, count 0 2006.229.14:14:22.03#ibcon#about to read 6, iclass 13, count 0 2006.229.14:14:22.03#ibcon#read 6, iclass 13, count 0 2006.229.14:14:22.03#ibcon#end of sib2, iclass 13, count 0 2006.229.14:14:22.03#ibcon#*after write, iclass 13, count 0 2006.229.14:14:22.03#ibcon#*before return 0, iclass 13, count 0 2006.229.14:14:22.03#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:22.03#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:22.03#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:14:22.03#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:14:22.03$vck44/vb=1,4 2006.229.14:14:22.03#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.14:14:22.03#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.14:14:22.03#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:22.03#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:14:22.03#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:14:22.03#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:14:22.03#ibcon#enter wrdev, iclass 15, count 2 2006.229.14:14:22.03#ibcon#first serial, iclass 15, count 2 2006.229.14:14:22.03#ibcon#enter sib2, iclass 15, count 2 2006.229.14:14:22.03#ibcon#flushed, iclass 15, count 2 2006.229.14:14:22.03#ibcon#about to write, iclass 15, count 2 2006.229.14:14:22.03#ibcon#wrote, iclass 15, count 2 2006.229.14:14:22.03#ibcon#about to read 3, iclass 15, count 2 2006.229.14:14:22.05#ibcon#read 3, iclass 15, count 2 2006.229.14:14:22.05#ibcon#about to read 4, iclass 15, count 2 2006.229.14:14:22.05#ibcon#read 4, iclass 15, count 2 2006.229.14:14:22.05#ibcon#about to read 5, iclass 15, count 2 2006.229.14:14:22.05#ibcon#read 5, iclass 15, count 2 2006.229.14:14:22.05#ibcon#about to read 6, iclass 15, count 2 2006.229.14:14:22.05#ibcon#read 6, iclass 15, count 2 2006.229.14:14:22.05#ibcon#end of sib2, iclass 15, count 2 2006.229.14:14:22.05#ibcon#*mode == 0, iclass 15, count 2 2006.229.14:14:22.05#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.14:14:22.05#ibcon#[27=AT01-04\r\n] 2006.229.14:14:22.05#ibcon#*before write, iclass 15, count 2 2006.229.14:14:22.05#ibcon#enter sib2, iclass 15, count 2 2006.229.14:14:22.05#ibcon#flushed, iclass 15, count 2 2006.229.14:14:22.05#ibcon#about to write, iclass 15, count 2 2006.229.14:14:22.05#ibcon#wrote, iclass 15, count 2 2006.229.14:14:22.05#ibcon#about to read 3, iclass 15, count 2 2006.229.14:14:22.08#ibcon#read 3, iclass 15, count 2 2006.229.14:14:22.08#ibcon#about to read 4, iclass 15, count 2 2006.229.14:14:22.08#ibcon#read 4, iclass 15, count 2 2006.229.14:14:22.08#ibcon#about to read 5, iclass 15, count 2 2006.229.14:14:22.08#ibcon#read 5, iclass 15, count 2 2006.229.14:14:22.08#ibcon#about to read 6, iclass 15, count 2 2006.229.14:14:22.08#ibcon#read 6, iclass 15, count 2 2006.229.14:14:22.08#ibcon#end of sib2, iclass 15, count 2 2006.229.14:14:22.08#ibcon#*after write, iclass 15, count 2 2006.229.14:14:22.08#ibcon#*before return 0, iclass 15, count 2 2006.229.14:14:22.08#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:14:22.08#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:14:22.08#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.14:14:22.08#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:22.08#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:14:22.20#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:14:22.20#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:14:22.20#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:14:22.20#ibcon#first serial, iclass 15, count 0 2006.229.14:14:22.20#ibcon#enter sib2, iclass 15, count 0 2006.229.14:14:22.20#ibcon#flushed, iclass 15, count 0 2006.229.14:14:22.20#ibcon#about to write, iclass 15, count 0 2006.229.14:14:22.20#ibcon#wrote, iclass 15, count 0 2006.229.14:14:22.20#ibcon#about to read 3, iclass 15, count 0 2006.229.14:14:22.22#ibcon#read 3, iclass 15, count 0 2006.229.14:14:22.22#ibcon#about to read 4, iclass 15, count 0 2006.229.14:14:22.22#ibcon#read 4, iclass 15, count 0 2006.229.14:14:22.22#ibcon#about to read 5, iclass 15, count 0 2006.229.14:14:22.22#ibcon#read 5, iclass 15, count 0 2006.229.14:14:22.22#ibcon#about to read 6, iclass 15, count 0 2006.229.14:14:22.22#ibcon#read 6, iclass 15, count 0 2006.229.14:14:22.22#ibcon#end of sib2, iclass 15, count 0 2006.229.14:14:22.22#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:14:22.22#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:14:22.22#ibcon#[27=USB\r\n] 2006.229.14:14:22.22#ibcon#*before write, iclass 15, count 0 2006.229.14:14:22.22#ibcon#enter sib2, iclass 15, count 0 2006.229.14:14:22.22#ibcon#flushed, iclass 15, count 0 2006.229.14:14:22.22#ibcon#about to write, iclass 15, count 0 2006.229.14:14:22.22#ibcon#wrote, iclass 15, count 0 2006.229.14:14:22.22#ibcon#about to read 3, iclass 15, count 0 2006.229.14:14:22.25#ibcon#read 3, iclass 15, count 0 2006.229.14:14:22.25#ibcon#about to read 4, iclass 15, count 0 2006.229.14:14:22.25#ibcon#read 4, iclass 15, count 0 2006.229.14:14:22.25#ibcon#about to read 5, iclass 15, count 0 2006.229.14:14:22.25#ibcon#read 5, iclass 15, count 0 2006.229.14:14:22.25#ibcon#about to read 6, iclass 15, count 0 2006.229.14:14:22.25#ibcon#read 6, iclass 15, count 0 2006.229.14:14:22.25#ibcon#end of sib2, iclass 15, count 0 2006.229.14:14:22.25#ibcon#*after write, iclass 15, count 0 2006.229.14:14:22.25#ibcon#*before return 0, iclass 15, count 0 2006.229.14:14:22.25#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:14:22.25#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:14:22.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:14:22.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:14:22.25$vck44/vblo=2,634.99 2006.229.14:14:22.25#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.14:14:22.25#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.14:14:22.25#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:22.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:22.25#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:22.25#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:22.25#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:14:22.25#ibcon#first serial, iclass 17, count 0 2006.229.14:14:22.25#ibcon#enter sib2, iclass 17, count 0 2006.229.14:14:22.25#ibcon#flushed, iclass 17, count 0 2006.229.14:14:22.25#ibcon#about to write, iclass 17, count 0 2006.229.14:14:22.25#ibcon#wrote, iclass 17, count 0 2006.229.14:14:22.25#ibcon#about to read 3, iclass 17, count 0 2006.229.14:14:22.27#ibcon#read 3, iclass 17, count 0 2006.229.14:14:22.27#ibcon#about to read 4, iclass 17, count 0 2006.229.14:14:22.27#ibcon#read 4, iclass 17, count 0 2006.229.14:14:22.27#ibcon#about to read 5, iclass 17, count 0 2006.229.14:14:22.27#ibcon#read 5, iclass 17, count 0 2006.229.14:14:22.27#ibcon#about to read 6, iclass 17, count 0 2006.229.14:14:22.27#ibcon#read 6, iclass 17, count 0 2006.229.14:14:22.27#ibcon#end of sib2, iclass 17, count 0 2006.229.14:14:22.27#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:14:22.27#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:14:22.27#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:14:22.27#ibcon#*before write, iclass 17, count 0 2006.229.14:14:22.27#ibcon#enter sib2, iclass 17, count 0 2006.229.14:14:22.27#ibcon#flushed, iclass 17, count 0 2006.229.14:14:22.27#ibcon#about to write, iclass 17, count 0 2006.229.14:14:22.27#ibcon#wrote, iclass 17, count 0 2006.229.14:14:22.27#ibcon#about to read 3, iclass 17, count 0 2006.229.14:14:22.31#ibcon#read 3, iclass 17, count 0 2006.229.14:14:22.31#ibcon#about to read 4, iclass 17, count 0 2006.229.14:14:22.31#ibcon#read 4, iclass 17, count 0 2006.229.14:14:22.31#ibcon#about to read 5, iclass 17, count 0 2006.229.14:14:22.31#ibcon#read 5, iclass 17, count 0 2006.229.14:14:22.31#ibcon#about to read 6, iclass 17, count 0 2006.229.14:14:22.31#ibcon#read 6, iclass 17, count 0 2006.229.14:14:22.31#ibcon#end of sib2, iclass 17, count 0 2006.229.14:14:22.31#ibcon#*after write, iclass 17, count 0 2006.229.14:14:22.31#ibcon#*before return 0, iclass 17, count 0 2006.229.14:14:22.31#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:22.31#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:14:22.31#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:14:22.31#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:14:22.31$vck44/vb=2,4 2006.229.14:14:22.31#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.14:14:22.31#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.14:14:22.31#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:22.31#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:22.37#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:22.37#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:22.37#ibcon#enter wrdev, iclass 19, count 2 2006.229.14:14:22.37#ibcon#first serial, iclass 19, count 2 2006.229.14:14:22.37#ibcon#enter sib2, iclass 19, count 2 2006.229.14:14:22.37#ibcon#flushed, iclass 19, count 2 2006.229.14:14:22.37#ibcon#about to write, iclass 19, count 2 2006.229.14:14:22.37#ibcon#wrote, iclass 19, count 2 2006.229.14:14:22.37#ibcon#about to read 3, iclass 19, count 2 2006.229.14:14:22.39#ibcon#read 3, iclass 19, count 2 2006.229.14:14:22.39#ibcon#about to read 4, iclass 19, count 2 2006.229.14:14:22.39#ibcon#read 4, iclass 19, count 2 2006.229.14:14:22.39#ibcon#about to read 5, iclass 19, count 2 2006.229.14:14:22.39#ibcon#read 5, iclass 19, count 2 2006.229.14:14:22.39#ibcon#about to read 6, iclass 19, count 2 2006.229.14:14:22.39#ibcon#read 6, iclass 19, count 2 2006.229.14:14:22.39#ibcon#end of sib2, iclass 19, count 2 2006.229.14:14:22.39#ibcon#*mode == 0, iclass 19, count 2 2006.229.14:14:22.39#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.14:14:22.39#ibcon#[27=AT02-04\r\n] 2006.229.14:14:22.39#ibcon#*before write, iclass 19, count 2 2006.229.14:14:22.39#ibcon#enter sib2, iclass 19, count 2 2006.229.14:14:22.39#ibcon#flushed, iclass 19, count 2 2006.229.14:14:22.39#ibcon#about to write, iclass 19, count 2 2006.229.14:14:22.39#ibcon#wrote, iclass 19, count 2 2006.229.14:14:22.39#ibcon#about to read 3, iclass 19, count 2 2006.229.14:14:22.42#ibcon#read 3, iclass 19, count 2 2006.229.14:14:22.42#ibcon#about to read 4, iclass 19, count 2 2006.229.14:14:22.42#ibcon#read 4, iclass 19, count 2 2006.229.14:14:22.42#ibcon#about to read 5, iclass 19, count 2 2006.229.14:14:22.42#ibcon#read 5, iclass 19, count 2 2006.229.14:14:22.42#ibcon#about to read 6, iclass 19, count 2 2006.229.14:14:22.42#ibcon#read 6, iclass 19, count 2 2006.229.14:14:22.42#ibcon#end of sib2, iclass 19, count 2 2006.229.14:14:22.42#ibcon#*after write, iclass 19, count 2 2006.229.14:14:22.42#ibcon#*before return 0, iclass 19, count 2 2006.229.14:14:22.42#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:22.42#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:14:22.42#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.14:14:22.42#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:22.42#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:22.54#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:22.54#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:22.54#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:14:22.54#ibcon#first serial, iclass 19, count 0 2006.229.14:14:22.54#ibcon#enter sib2, iclass 19, count 0 2006.229.14:14:22.54#ibcon#flushed, iclass 19, count 0 2006.229.14:14:22.54#ibcon#about to write, iclass 19, count 0 2006.229.14:14:22.54#ibcon#wrote, iclass 19, count 0 2006.229.14:14:22.54#ibcon#about to read 3, iclass 19, count 0 2006.229.14:14:22.56#ibcon#read 3, iclass 19, count 0 2006.229.14:14:22.56#ibcon#about to read 4, iclass 19, count 0 2006.229.14:14:22.56#ibcon#read 4, iclass 19, count 0 2006.229.14:14:22.56#ibcon#about to read 5, iclass 19, count 0 2006.229.14:14:22.56#ibcon#read 5, iclass 19, count 0 2006.229.14:14:22.56#ibcon#about to read 6, iclass 19, count 0 2006.229.14:14:22.56#ibcon#read 6, iclass 19, count 0 2006.229.14:14:22.56#ibcon#end of sib2, iclass 19, count 0 2006.229.14:14:22.56#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:14:22.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:14:22.56#ibcon#[27=USB\r\n] 2006.229.14:14:22.56#ibcon#*before write, iclass 19, count 0 2006.229.14:14:22.56#ibcon#enter sib2, iclass 19, count 0 2006.229.14:14:22.56#ibcon#flushed, iclass 19, count 0 2006.229.14:14:22.56#ibcon#about to write, iclass 19, count 0 2006.229.14:14:22.56#ibcon#wrote, iclass 19, count 0 2006.229.14:14:22.56#ibcon#about to read 3, iclass 19, count 0 2006.229.14:14:22.59#ibcon#read 3, iclass 19, count 0 2006.229.14:14:22.59#ibcon#about to read 4, iclass 19, count 0 2006.229.14:14:22.59#ibcon#read 4, iclass 19, count 0 2006.229.14:14:22.59#ibcon#about to read 5, iclass 19, count 0 2006.229.14:14:22.59#ibcon#read 5, iclass 19, count 0 2006.229.14:14:22.59#ibcon#about to read 6, iclass 19, count 0 2006.229.14:14:22.59#ibcon#read 6, iclass 19, count 0 2006.229.14:14:22.59#ibcon#end of sib2, iclass 19, count 0 2006.229.14:14:22.59#ibcon#*after write, iclass 19, count 0 2006.229.14:14:22.59#ibcon#*before return 0, iclass 19, count 0 2006.229.14:14:22.59#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:22.59#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:14:22.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:14:22.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:14:22.59$vck44/vblo=3,649.99 2006.229.14:14:22.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.14:14:22.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.14:14:22.59#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:22.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:22.59#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:22.59#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:22.59#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:14:22.59#ibcon#first serial, iclass 21, count 0 2006.229.14:14:22.59#ibcon#enter sib2, iclass 21, count 0 2006.229.14:14:22.59#ibcon#flushed, iclass 21, count 0 2006.229.14:14:22.59#ibcon#about to write, iclass 21, count 0 2006.229.14:14:22.59#ibcon#wrote, iclass 21, count 0 2006.229.14:14:22.59#ibcon#about to read 3, iclass 21, count 0 2006.229.14:14:22.61#ibcon#read 3, iclass 21, count 0 2006.229.14:14:22.61#ibcon#about to read 4, iclass 21, count 0 2006.229.14:14:22.61#ibcon#read 4, iclass 21, count 0 2006.229.14:14:22.61#ibcon#about to read 5, iclass 21, count 0 2006.229.14:14:22.61#ibcon#read 5, iclass 21, count 0 2006.229.14:14:22.61#ibcon#about to read 6, iclass 21, count 0 2006.229.14:14:22.61#ibcon#read 6, iclass 21, count 0 2006.229.14:14:22.61#ibcon#end of sib2, iclass 21, count 0 2006.229.14:14:22.61#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:14:22.61#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:14:22.61#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:14:22.61#ibcon#*before write, iclass 21, count 0 2006.229.14:14:22.61#ibcon#enter sib2, iclass 21, count 0 2006.229.14:14:22.61#ibcon#flushed, iclass 21, count 0 2006.229.14:14:22.61#ibcon#about to write, iclass 21, count 0 2006.229.14:14:22.61#ibcon#wrote, iclass 21, count 0 2006.229.14:14:22.61#ibcon#about to read 3, iclass 21, count 0 2006.229.14:14:22.65#ibcon#read 3, iclass 21, count 0 2006.229.14:14:22.65#ibcon#about to read 4, iclass 21, count 0 2006.229.14:14:22.65#ibcon#read 4, iclass 21, count 0 2006.229.14:14:22.65#ibcon#about to read 5, iclass 21, count 0 2006.229.14:14:22.65#ibcon#read 5, iclass 21, count 0 2006.229.14:14:22.65#ibcon#about to read 6, iclass 21, count 0 2006.229.14:14:22.65#ibcon#read 6, iclass 21, count 0 2006.229.14:14:22.65#ibcon#end of sib2, iclass 21, count 0 2006.229.14:14:22.65#ibcon#*after write, iclass 21, count 0 2006.229.14:14:22.65#ibcon#*before return 0, iclass 21, count 0 2006.229.14:14:22.65#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:22.65#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:14:22.65#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:14:22.65#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:14:22.65$vck44/vb=3,4 2006.229.14:14:22.65#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.14:14:22.65#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.14:14:22.65#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:22.65#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:22.71#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:22.71#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:22.71#ibcon#enter wrdev, iclass 23, count 2 2006.229.14:14:22.71#ibcon#first serial, iclass 23, count 2 2006.229.14:14:22.71#ibcon#enter sib2, iclass 23, count 2 2006.229.14:14:22.71#ibcon#flushed, iclass 23, count 2 2006.229.14:14:22.71#ibcon#about to write, iclass 23, count 2 2006.229.14:14:22.71#ibcon#wrote, iclass 23, count 2 2006.229.14:14:22.71#ibcon#about to read 3, iclass 23, count 2 2006.229.14:14:22.73#ibcon#read 3, iclass 23, count 2 2006.229.14:14:22.73#ibcon#about to read 4, iclass 23, count 2 2006.229.14:14:22.73#ibcon#read 4, iclass 23, count 2 2006.229.14:14:22.73#ibcon#about to read 5, iclass 23, count 2 2006.229.14:14:22.73#ibcon#read 5, iclass 23, count 2 2006.229.14:14:22.73#ibcon#about to read 6, iclass 23, count 2 2006.229.14:14:22.73#ibcon#read 6, iclass 23, count 2 2006.229.14:14:22.73#ibcon#end of sib2, iclass 23, count 2 2006.229.14:14:22.73#ibcon#*mode == 0, iclass 23, count 2 2006.229.14:14:22.73#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.14:14:22.73#ibcon#[27=AT03-04\r\n] 2006.229.14:14:22.73#ibcon#*before write, iclass 23, count 2 2006.229.14:14:22.73#ibcon#enter sib2, iclass 23, count 2 2006.229.14:14:22.73#ibcon#flushed, iclass 23, count 2 2006.229.14:14:22.73#ibcon#about to write, iclass 23, count 2 2006.229.14:14:22.73#ibcon#wrote, iclass 23, count 2 2006.229.14:14:22.73#ibcon#about to read 3, iclass 23, count 2 2006.229.14:14:22.76#ibcon#read 3, iclass 23, count 2 2006.229.14:14:22.76#ibcon#about to read 4, iclass 23, count 2 2006.229.14:14:22.76#ibcon#read 4, iclass 23, count 2 2006.229.14:14:22.76#ibcon#about to read 5, iclass 23, count 2 2006.229.14:14:22.76#ibcon#read 5, iclass 23, count 2 2006.229.14:14:22.76#ibcon#about to read 6, iclass 23, count 2 2006.229.14:14:22.76#ibcon#read 6, iclass 23, count 2 2006.229.14:14:22.76#ibcon#end of sib2, iclass 23, count 2 2006.229.14:14:22.76#ibcon#*after write, iclass 23, count 2 2006.229.14:14:22.76#ibcon#*before return 0, iclass 23, count 2 2006.229.14:14:22.76#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:22.76#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:14:22.76#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.14:14:22.76#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:22.76#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:22.88#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:22.88#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:22.88#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:14:22.88#ibcon#first serial, iclass 23, count 0 2006.229.14:14:22.88#ibcon#enter sib2, iclass 23, count 0 2006.229.14:14:22.88#ibcon#flushed, iclass 23, count 0 2006.229.14:14:22.88#ibcon#about to write, iclass 23, count 0 2006.229.14:14:22.88#ibcon#wrote, iclass 23, count 0 2006.229.14:14:22.88#ibcon#about to read 3, iclass 23, count 0 2006.229.14:14:22.90#ibcon#read 3, iclass 23, count 0 2006.229.14:14:22.90#ibcon#about to read 4, iclass 23, count 0 2006.229.14:14:22.90#ibcon#read 4, iclass 23, count 0 2006.229.14:14:22.90#ibcon#about to read 5, iclass 23, count 0 2006.229.14:14:22.90#ibcon#read 5, iclass 23, count 0 2006.229.14:14:22.90#ibcon#about to read 6, iclass 23, count 0 2006.229.14:14:22.90#ibcon#read 6, iclass 23, count 0 2006.229.14:14:22.90#ibcon#end of sib2, iclass 23, count 0 2006.229.14:14:22.90#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:14:22.90#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:14:22.90#ibcon#[27=USB\r\n] 2006.229.14:14:22.90#ibcon#*before write, iclass 23, count 0 2006.229.14:14:22.90#ibcon#enter sib2, iclass 23, count 0 2006.229.14:14:22.90#ibcon#flushed, iclass 23, count 0 2006.229.14:14:22.90#ibcon#about to write, iclass 23, count 0 2006.229.14:14:22.90#ibcon#wrote, iclass 23, count 0 2006.229.14:14:22.90#ibcon#about to read 3, iclass 23, count 0 2006.229.14:14:22.93#ibcon#read 3, iclass 23, count 0 2006.229.14:14:22.93#ibcon#about to read 4, iclass 23, count 0 2006.229.14:14:22.93#ibcon#read 4, iclass 23, count 0 2006.229.14:14:22.93#ibcon#about to read 5, iclass 23, count 0 2006.229.14:14:22.93#ibcon#read 5, iclass 23, count 0 2006.229.14:14:22.93#ibcon#about to read 6, iclass 23, count 0 2006.229.14:14:22.93#ibcon#read 6, iclass 23, count 0 2006.229.14:14:22.93#ibcon#end of sib2, iclass 23, count 0 2006.229.14:14:22.93#ibcon#*after write, iclass 23, count 0 2006.229.14:14:22.93#ibcon#*before return 0, iclass 23, count 0 2006.229.14:14:22.93#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:22.93#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:14:22.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:14:22.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:14:22.93$vck44/vblo=4,679.99 2006.229.14:14:22.93#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:14:22.93#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:14:22.93#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:22.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:22.93#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:22.93#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:22.93#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:14:22.93#ibcon#first serial, iclass 25, count 0 2006.229.14:14:22.93#ibcon#enter sib2, iclass 25, count 0 2006.229.14:14:22.93#ibcon#flushed, iclass 25, count 0 2006.229.14:14:22.93#ibcon#about to write, iclass 25, count 0 2006.229.14:14:22.93#ibcon#wrote, iclass 25, count 0 2006.229.14:14:22.93#ibcon#about to read 3, iclass 25, count 0 2006.229.14:14:22.95#ibcon#read 3, iclass 25, count 0 2006.229.14:14:22.95#ibcon#about to read 4, iclass 25, count 0 2006.229.14:14:22.95#ibcon#read 4, iclass 25, count 0 2006.229.14:14:22.95#ibcon#about to read 5, iclass 25, count 0 2006.229.14:14:22.95#ibcon#read 5, iclass 25, count 0 2006.229.14:14:22.95#ibcon#about to read 6, iclass 25, count 0 2006.229.14:14:22.95#ibcon#read 6, iclass 25, count 0 2006.229.14:14:22.95#ibcon#end of sib2, iclass 25, count 0 2006.229.14:14:22.95#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:14:22.95#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:14:22.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:14:22.95#ibcon#*before write, iclass 25, count 0 2006.229.14:14:22.95#ibcon#enter sib2, iclass 25, count 0 2006.229.14:14:22.95#ibcon#flushed, iclass 25, count 0 2006.229.14:14:22.95#ibcon#about to write, iclass 25, count 0 2006.229.14:14:22.95#ibcon#wrote, iclass 25, count 0 2006.229.14:14:22.95#ibcon#about to read 3, iclass 25, count 0 2006.229.14:14:22.99#ibcon#read 3, iclass 25, count 0 2006.229.14:14:22.99#ibcon#about to read 4, iclass 25, count 0 2006.229.14:14:22.99#ibcon#read 4, iclass 25, count 0 2006.229.14:14:22.99#ibcon#about to read 5, iclass 25, count 0 2006.229.14:14:22.99#ibcon#read 5, iclass 25, count 0 2006.229.14:14:22.99#ibcon#about to read 6, iclass 25, count 0 2006.229.14:14:22.99#ibcon#read 6, iclass 25, count 0 2006.229.14:14:22.99#ibcon#end of sib2, iclass 25, count 0 2006.229.14:14:22.99#ibcon#*after write, iclass 25, count 0 2006.229.14:14:22.99#ibcon#*before return 0, iclass 25, count 0 2006.229.14:14:22.99#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:22.99#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:14:22.99#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:14:22.99#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:14:22.99$vck44/vb=4,4 2006.229.14:14:22.99#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.14:14:22.99#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.14:14:22.99#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:22.99#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:23.05#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:23.05#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:23.05#ibcon#enter wrdev, iclass 27, count 2 2006.229.14:14:23.05#ibcon#first serial, iclass 27, count 2 2006.229.14:14:23.05#ibcon#enter sib2, iclass 27, count 2 2006.229.14:14:23.05#ibcon#flushed, iclass 27, count 2 2006.229.14:14:23.05#ibcon#about to write, iclass 27, count 2 2006.229.14:14:23.05#ibcon#wrote, iclass 27, count 2 2006.229.14:14:23.05#ibcon#about to read 3, iclass 27, count 2 2006.229.14:14:23.07#ibcon#read 3, iclass 27, count 2 2006.229.14:14:23.07#ibcon#about to read 4, iclass 27, count 2 2006.229.14:14:23.07#ibcon#read 4, iclass 27, count 2 2006.229.14:14:23.07#ibcon#about to read 5, iclass 27, count 2 2006.229.14:14:23.07#ibcon#read 5, iclass 27, count 2 2006.229.14:14:23.07#ibcon#about to read 6, iclass 27, count 2 2006.229.14:14:23.07#ibcon#read 6, iclass 27, count 2 2006.229.14:14:23.07#ibcon#end of sib2, iclass 27, count 2 2006.229.14:14:23.07#ibcon#*mode == 0, iclass 27, count 2 2006.229.14:14:23.07#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.14:14:23.07#ibcon#[27=AT04-04\r\n] 2006.229.14:14:23.07#ibcon#*before write, iclass 27, count 2 2006.229.14:14:23.07#ibcon#enter sib2, iclass 27, count 2 2006.229.14:14:23.07#ibcon#flushed, iclass 27, count 2 2006.229.14:14:23.07#ibcon#about to write, iclass 27, count 2 2006.229.14:14:23.07#ibcon#wrote, iclass 27, count 2 2006.229.14:14:23.07#ibcon#about to read 3, iclass 27, count 2 2006.229.14:14:23.10#ibcon#read 3, iclass 27, count 2 2006.229.14:14:23.10#ibcon#about to read 4, iclass 27, count 2 2006.229.14:14:23.10#ibcon#read 4, iclass 27, count 2 2006.229.14:14:23.10#ibcon#about to read 5, iclass 27, count 2 2006.229.14:14:23.10#ibcon#read 5, iclass 27, count 2 2006.229.14:14:23.10#ibcon#about to read 6, iclass 27, count 2 2006.229.14:14:23.10#ibcon#read 6, iclass 27, count 2 2006.229.14:14:23.10#ibcon#end of sib2, iclass 27, count 2 2006.229.14:14:23.10#ibcon#*after write, iclass 27, count 2 2006.229.14:14:23.10#ibcon#*before return 0, iclass 27, count 2 2006.229.14:14:23.10#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:23.10#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:14:23.10#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.14:14:23.10#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:23.10#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:23.22#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:23.22#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:23.22#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:14:23.22#ibcon#first serial, iclass 27, count 0 2006.229.14:14:23.22#ibcon#enter sib2, iclass 27, count 0 2006.229.14:14:23.22#ibcon#flushed, iclass 27, count 0 2006.229.14:14:23.22#ibcon#about to write, iclass 27, count 0 2006.229.14:14:23.22#ibcon#wrote, iclass 27, count 0 2006.229.14:14:23.22#ibcon#about to read 3, iclass 27, count 0 2006.229.14:14:23.24#ibcon#read 3, iclass 27, count 0 2006.229.14:14:23.24#ibcon#about to read 4, iclass 27, count 0 2006.229.14:14:23.24#ibcon#read 4, iclass 27, count 0 2006.229.14:14:23.24#ibcon#about to read 5, iclass 27, count 0 2006.229.14:14:23.24#ibcon#read 5, iclass 27, count 0 2006.229.14:14:23.24#ibcon#about to read 6, iclass 27, count 0 2006.229.14:14:23.24#ibcon#read 6, iclass 27, count 0 2006.229.14:14:23.24#ibcon#end of sib2, iclass 27, count 0 2006.229.14:14:23.24#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:14:23.24#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:14:23.24#ibcon#[27=USB\r\n] 2006.229.14:14:23.24#ibcon#*before write, iclass 27, count 0 2006.229.14:14:23.24#ibcon#enter sib2, iclass 27, count 0 2006.229.14:14:23.24#ibcon#flushed, iclass 27, count 0 2006.229.14:14:23.24#ibcon#about to write, iclass 27, count 0 2006.229.14:14:23.24#ibcon#wrote, iclass 27, count 0 2006.229.14:14:23.24#ibcon#about to read 3, iclass 27, count 0 2006.229.14:14:23.27#ibcon#read 3, iclass 27, count 0 2006.229.14:14:23.27#ibcon#about to read 4, iclass 27, count 0 2006.229.14:14:23.27#ibcon#read 4, iclass 27, count 0 2006.229.14:14:23.27#ibcon#about to read 5, iclass 27, count 0 2006.229.14:14:23.27#ibcon#read 5, iclass 27, count 0 2006.229.14:14:23.27#ibcon#about to read 6, iclass 27, count 0 2006.229.14:14:23.27#ibcon#read 6, iclass 27, count 0 2006.229.14:14:23.27#ibcon#end of sib2, iclass 27, count 0 2006.229.14:14:23.27#ibcon#*after write, iclass 27, count 0 2006.229.14:14:23.27#ibcon#*before return 0, iclass 27, count 0 2006.229.14:14:23.27#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:23.27#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:14:23.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:14:23.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:14:23.27$vck44/vblo=5,709.99 2006.229.14:14:23.27#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:14:23.27#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:14:23.27#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:23.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:23.27#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:23.27#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:23.27#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:14:23.27#ibcon#first serial, iclass 29, count 0 2006.229.14:14:23.27#ibcon#enter sib2, iclass 29, count 0 2006.229.14:14:23.27#ibcon#flushed, iclass 29, count 0 2006.229.14:14:23.27#ibcon#about to write, iclass 29, count 0 2006.229.14:14:23.27#ibcon#wrote, iclass 29, count 0 2006.229.14:14:23.27#ibcon#about to read 3, iclass 29, count 0 2006.229.14:14:23.29#ibcon#read 3, iclass 29, count 0 2006.229.14:14:23.29#ibcon#about to read 4, iclass 29, count 0 2006.229.14:14:23.29#ibcon#read 4, iclass 29, count 0 2006.229.14:14:23.29#ibcon#about to read 5, iclass 29, count 0 2006.229.14:14:23.29#ibcon#read 5, iclass 29, count 0 2006.229.14:14:23.29#ibcon#about to read 6, iclass 29, count 0 2006.229.14:14:23.29#ibcon#read 6, iclass 29, count 0 2006.229.14:14:23.29#ibcon#end of sib2, iclass 29, count 0 2006.229.14:14:23.29#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:14:23.29#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:14:23.29#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:14:23.29#ibcon#*before write, iclass 29, count 0 2006.229.14:14:23.29#ibcon#enter sib2, iclass 29, count 0 2006.229.14:14:23.29#ibcon#flushed, iclass 29, count 0 2006.229.14:14:23.29#ibcon#about to write, iclass 29, count 0 2006.229.14:14:23.29#ibcon#wrote, iclass 29, count 0 2006.229.14:14:23.29#ibcon#about to read 3, iclass 29, count 0 2006.229.14:14:23.33#ibcon#read 3, iclass 29, count 0 2006.229.14:14:23.33#ibcon#about to read 4, iclass 29, count 0 2006.229.14:14:23.33#ibcon#read 4, iclass 29, count 0 2006.229.14:14:23.33#ibcon#about to read 5, iclass 29, count 0 2006.229.14:14:23.33#ibcon#read 5, iclass 29, count 0 2006.229.14:14:23.33#ibcon#about to read 6, iclass 29, count 0 2006.229.14:14:23.33#ibcon#read 6, iclass 29, count 0 2006.229.14:14:23.33#ibcon#end of sib2, iclass 29, count 0 2006.229.14:14:23.33#ibcon#*after write, iclass 29, count 0 2006.229.14:14:23.33#ibcon#*before return 0, iclass 29, count 0 2006.229.14:14:23.33#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:23.33#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:14:23.33#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:14:23.33#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:14:23.33$vck44/vb=5,4 2006.229.14:14:23.33#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.14:14:23.33#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.14:14:23.33#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:23.33#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:23.39#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:23.39#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:23.39#ibcon#enter wrdev, iclass 31, count 2 2006.229.14:14:23.39#ibcon#first serial, iclass 31, count 2 2006.229.14:14:23.39#ibcon#enter sib2, iclass 31, count 2 2006.229.14:14:23.39#ibcon#flushed, iclass 31, count 2 2006.229.14:14:23.39#ibcon#about to write, iclass 31, count 2 2006.229.14:14:23.39#ibcon#wrote, iclass 31, count 2 2006.229.14:14:23.39#ibcon#about to read 3, iclass 31, count 2 2006.229.14:14:23.41#ibcon#read 3, iclass 31, count 2 2006.229.14:14:23.41#ibcon#about to read 4, iclass 31, count 2 2006.229.14:14:23.41#ibcon#read 4, iclass 31, count 2 2006.229.14:14:23.41#ibcon#about to read 5, iclass 31, count 2 2006.229.14:14:23.41#ibcon#read 5, iclass 31, count 2 2006.229.14:14:23.41#ibcon#about to read 6, iclass 31, count 2 2006.229.14:14:23.41#ibcon#read 6, iclass 31, count 2 2006.229.14:14:23.41#ibcon#end of sib2, iclass 31, count 2 2006.229.14:14:23.41#ibcon#*mode == 0, iclass 31, count 2 2006.229.14:14:23.41#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.14:14:23.41#ibcon#[27=AT05-04\r\n] 2006.229.14:14:23.41#ibcon#*before write, iclass 31, count 2 2006.229.14:14:23.41#ibcon#enter sib2, iclass 31, count 2 2006.229.14:14:23.41#ibcon#flushed, iclass 31, count 2 2006.229.14:14:23.41#ibcon#about to write, iclass 31, count 2 2006.229.14:14:23.41#ibcon#wrote, iclass 31, count 2 2006.229.14:14:23.41#ibcon#about to read 3, iclass 31, count 2 2006.229.14:14:23.44#ibcon#read 3, iclass 31, count 2 2006.229.14:14:23.44#ibcon#about to read 4, iclass 31, count 2 2006.229.14:14:23.44#ibcon#read 4, iclass 31, count 2 2006.229.14:14:23.44#ibcon#about to read 5, iclass 31, count 2 2006.229.14:14:23.44#ibcon#read 5, iclass 31, count 2 2006.229.14:14:23.44#ibcon#about to read 6, iclass 31, count 2 2006.229.14:14:23.44#ibcon#read 6, iclass 31, count 2 2006.229.14:14:23.44#ibcon#end of sib2, iclass 31, count 2 2006.229.14:14:23.44#ibcon#*after write, iclass 31, count 2 2006.229.14:14:23.44#ibcon#*before return 0, iclass 31, count 2 2006.229.14:14:23.44#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:23.44#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:14:23.44#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.14:14:23.44#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:23.44#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:23.56#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:23.56#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:23.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:14:23.56#ibcon#first serial, iclass 31, count 0 2006.229.14:14:23.56#ibcon#enter sib2, iclass 31, count 0 2006.229.14:14:23.56#ibcon#flushed, iclass 31, count 0 2006.229.14:14:23.56#ibcon#about to write, iclass 31, count 0 2006.229.14:14:23.56#ibcon#wrote, iclass 31, count 0 2006.229.14:14:23.56#ibcon#about to read 3, iclass 31, count 0 2006.229.14:14:23.58#ibcon#read 3, iclass 31, count 0 2006.229.14:14:23.58#ibcon#about to read 4, iclass 31, count 0 2006.229.14:14:23.58#ibcon#read 4, iclass 31, count 0 2006.229.14:14:23.58#ibcon#about to read 5, iclass 31, count 0 2006.229.14:14:23.58#ibcon#read 5, iclass 31, count 0 2006.229.14:14:23.58#ibcon#about to read 6, iclass 31, count 0 2006.229.14:14:23.58#ibcon#read 6, iclass 31, count 0 2006.229.14:14:23.58#ibcon#end of sib2, iclass 31, count 0 2006.229.14:14:23.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:14:23.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:14:23.58#ibcon#[27=USB\r\n] 2006.229.14:14:23.58#ibcon#*before write, iclass 31, count 0 2006.229.14:14:23.58#ibcon#enter sib2, iclass 31, count 0 2006.229.14:14:23.58#ibcon#flushed, iclass 31, count 0 2006.229.14:14:23.58#ibcon#about to write, iclass 31, count 0 2006.229.14:14:23.58#ibcon#wrote, iclass 31, count 0 2006.229.14:14:23.58#ibcon#about to read 3, iclass 31, count 0 2006.229.14:14:23.61#ibcon#read 3, iclass 31, count 0 2006.229.14:14:23.61#ibcon#about to read 4, iclass 31, count 0 2006.229.14:14:23.61#ibcon#read 4, iclass 31, count 0 2006.229.14:14:23.61#ibcon#about to read 5, iclass 31, count 0 2006.229.14:14:23.61#ibcon#read 5, iclass 31, count 0 2006.229.14:14:23.61#ibcon#about to read 6, iclass 31, count 0 2006.229.14:14:23.61#ibcon#read 6, iclass 31, count 0 2006.229.14:14:23.61#ibcon#end of sib2, iclass 31, count 0 2006.229.14:14:23.61#ibcon#*after write, iclass 31, count 0 2006.229.14:14:23.61#ibcon#*before return 0, iclass 31, count 0 2006.229.14:14:23.61#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:23.61#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:14:23.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:14:23.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:14:23.61$vck44/vblo=6,719.99 2006.229.14:14:23.61#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.14:14:23.61#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.14:14:23.61#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:23.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:23.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:23.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:23.61#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:14:23.61#ibcon#first serial, iclass 33, count 0 2006.229.14:14:23.61#ibcon#enter sib2, iclass 33, count 0 2006.229.14:14:23.61#ibcon#flushed, iclass 33, count 0 2006.229.14:14:23.61#ibcon#about to write, iclass 33, count 0 2006.229.14:14:23.61#ibcon#wrote, iclass 33, count 0 2006.229.14:14:23.61#ibcon#about to read 3, iclass 33, count 0 2006.229.14:14:23.63#ibcon#read 3, iclass 33, count 0 2006.229.14:14:23.63#ibcon#about to read 4, iclass 33, count 0 2006.229.14:14:23.63#ibcon#read 4, iclass 33, count 0 2006.229.14:14:23.63#ibcon#about to read 5, iclass 33, count 0 2006.229.14:14:23.63#ibcon#read 5, iclass 33, count 0 2006.229.14:14:23.63#ibcon#about to read 6, iclass 33, count 0 2006.229.14:14:23.63#ibcon#read 6, iclass 33, count 0 2006.229.14:14:23.63#ibcon#end of sib2, iclass 33, count 0 2006.229.14:14:23.63#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:14:23.63#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:14:23.63#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:14:23.63#ibcon#*before write, iclass 33, count 0 2006.229.14:14:23.63#ibcon#enter sib2, iclass 33, count 0 2006.229.14:14:23.63#ibcon#flushed, iclass 33, count 0 2006.229.14:14:23.63#ibcon#about to write, iclass 33, count 0 2006.229.14:14:23.63#ibcon#wrote, iclass 33, count 0 2006.229.14:14:23.63#ibcon#about to read 3, iclass 33, count 0 2006.229.14:14:23.67#ibcon#read 3, iclass 33, count 0 2006.229.14:14:23.67#ibcon#about to read 4, iclass 33, count 0 2006.229.14:14:23.67#ibcon#read 4, iclass 33, count 0 2006.229.14:14:23.67#ibcon#about to read 5, iclass 33, count 0 2006.229.14:14:23.67#ibcon#read 5, iclass 33, count 0 2006.229.14:14:23.67#ibcon#about to read 6, iclass 33, count 0 2006.229.14:14:23.67#ibcon#read 6, iclass 33, count 0 2006.229.14:14:23.67#ibcon#end of sib2, iclass 33, count 0 2006.229.14:14:23.67#ibcon#*after write, iclass 33, count 0 2006.229.14:14:23.67#ibcon#*before return 0, iclass 33, count 0 2006.229.14:14:23.67#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:23.67#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:14:23.67#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:14:23.67#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:14:23.67$vck44/vb=6,4 2006.229.14:14:23.67#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.14:14:23.67#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.14:14:23.67#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:23.67#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:23.73#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:23.73#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:23.73#ibcon#enter wrdev, iclass 35, count 2 2006.229.14:14:23.73#ibcon#first serial, iclass 35, count 2 2006.229.14:14:23.73#ibcon#enter sib2, iclass 35, count 2 2006.229.14:14:23.73#ibcon#flushed, iclass 35, count 2 2006.229.14:14:23.73#ibcon#about to write, iclass 35, count 2 2006.229.14:14:23.73#ibcon#wrote, iclass 35, count 2 2006.229.14:14:23.73#ibcon#about to read 3, iclass 35, count 2 2006.229.14:14:23.75#ibcon#read 3, iclass 35, count 2 2006.229.14:14:23.75#ibcon#about to read 4, iclass 35, count 2 2006.229.14:14:23.75#ibcon#read 4, iclass 35, count 2 2006.229.14:14:23.75#ibcon#about to read 5, iclass 35, count 2 2006.229.14:14:23.75#ibcon#read 5, iclass 35, count 2 2006.229.14:14:23.75#ibcon#about to read 6, iclass 35, count 2 2006.229.14:14:23.75#ibcon#read 6, iclass 35, count 2 2006.229.14:14:23.75#ibcon#end of sib2, iclass 35, count 2 2006.229.14:14:23.75#ibcon#*mode == 0, iclass 35, count 2 2006.229.14:14:23.75#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.14:14:23.75#ibcon#[27=AT06-04\r\n] 2006.229.14:14:23.75#ibcon#*before write, iclass 35, count 2 2006.229.14:14:23.75#ibcon#enter sib2, iclass 35, count 2 2006.229.14:14:23.75#ibcon#flushed, iclass 35, count 2 2006.229.14:14:23.75#ibcon#about to write, iclass 35, count 2 2006.229.14:14:23.75#ibcon#wrote, iclass 35, count 2 2006.229.14:14:23.75#ibcon#about to read 3, iclass 35, count 2 2006.229.14:14:23.78#ibcon#read 3, iclass 35, count 2 2006.229.14:14:23.78#ibcon#about to read 4, iclass 35, count 2 2006.229.14:14:23.78#ibcon#read 4, iclass 35, count 2 2006.229.14:14:23.78#ibcon#about to read 5, iclass 35, count 2 2006.229.14:14:23.78#ibcon#read 5, iclass 35, count 2 2006.229.14:14:23.78#ibcon#about to read 6, iclass 35, count 2 2006.229.14:14:23.78#ibcon#read 6, iclass 35, count 2 2006.229.14:14:23.78#ibcon#end of sib2, iclass 35, count 2 2006.229.14:14:23.78#ibcon#*after write, iclass 35, count 2 2006.229.14:14:23.78#ibcon#*before return 0, iclass 35, count 2 2006.229.14:14:23.78#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:23.78#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:14:23.78#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.14:14:23.78#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:23.78#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:23.90#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:23.90#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:23.90#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:14:23.90#ibcon#first serial, iclass 35, count 0 2006.229.14:14:23.90#ibcon#enter sib2, iclass 35, count 0 2006.229.14:14:23.90#ibcon#flushed, iclass 35, count 0 2006.229.14:14:23.90#ibcon#about to write, iclass 35, count 0 2006.229.14:14:23.90#ibcon#wrote, iclass 35, count 0 2006.229.14:14:23.90#ibcon#about to read 3, iclass 35, count 0 2006.229.14:14:23.92#ibcon#read 3, iclass 35, count 0 2006.229.14:14:23.92#ibcon#about to read 4, iclass 35, count 0 2006.229.14:14:23.92#ibcon#read 4, iclass 35, count 0 2006.229.14:14:23.92#ibcon#about to read 5, iclass 35, count 0 2006.229.14:14:23.92#ibcon#read 5, iclass 35, count 0 2006.229.14:14:23.92#ibcon#about to read 6, iclass 35, count 0 2006.229.14:14:23.92#ibcon#read 6, iclass 35, count 0 2006.229.14:14:23.92#ibcon#end of sib2, iclass 35, count 0 2006.229.14:14:23.92#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:14:23.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:14:23.92#ibcon#[27=USB\r\n] 2006.229.14:14:23.92#ibcon#*before write, iclass 35, count 0 2006.229.14:14:23.92#ibcon#enter sib2, iclass 35, count 0 2006.229.14:14:23.92#ibcon#flushed, iclass 35, count 0 2006.229.14:14:23.92#ibcon#about to write, iclass 35, count 0 2006.229.14:14:23.92#ibcon#wrote, iclass 35, count 0 2006.229.14:14:23.92#ibcon#about to read 3, iclass 35, count 0 2006.229.14:14:23.95#ibcon#read 3, iclass 35, count 0 2006.229.14:14:23.95#ibcon#about to read 4, iclass 35, count 0 2006.229.14:14:23.95#ibcon#read 4, iclass 35, count 0 2006.229.14:14:23.95#ibcon#about to read 5, iclass 35, count 0 2006.229.14:14:23.95#ibcon#read 5, iclass 35, count 0 2006.229.14:14:23.95#ibcon#about to read 6, iclass 35, count 0 2006.229.14:14:23.95#ibcon#read 6, iclass 35, count 0 2006.229.14:14:23.95#ibcon#end of sib2, iclass 35, count 0 2006.229.14:14:23.95#ibcon#*after write, iclass 35, count 0 2006.229.14:14:23.95#ibcon#*before return 0, iclass 35, count 0 2006.229.14:14:23.95#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:23.95#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:14:23.95#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:14:23.95#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:14:23.95$vck44/vblo=7,734.99 2006.229.14:14:23.95#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:14:23.95#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:14:23.95#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:23.95#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:23.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:23.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:23.95#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:14:23.95#ibcon#first serial, iclass 37, count 0 2006.229.14:14:23.95#ibcon#enter sib2, iclass 37, count 0 2006.229.14:14:23.95#ibcon#flushed, iclass 37, count 0 2006.229.14:14:23.95#ibcon#about to write, iclass 37, count 0 2006.229.14:14:23.95#ibcon#wrote, iclass 37, count 0 2006.229.14:14:23.95#ibcon#about to read 3, iclass 37, count 0 2006.229.14:14:23.97#ibcon#read 3, iclass 37, count 0 2006.229.14:14:23.97#ibcon#about to read 4, iclass 37, count 0 2006.229.14:14:23.97#ibcon#read 4, iclass 37, count 0 2006.229.14:14:23.97#ibcon#about to read 5, iclass 37, count 0 2006.229.14:14:23.97#ibcon#read 5, iclass 37, count 0 2006.229.14:14:23.97#ibcon#about to read 6, iclass 37, count 0 2006.229.14:14:23.97#ibcon#read 6, iclass 37, count 0 2006.229.14:14:23.97#ibcon#end of sib2, iclass 37, count 0 2006.229.14:14:23.97#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:14:23.97#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:14:23.97#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:14:23.97#ibcon#*before write, iclass 37, count 0 2006.229.14:14:23.97#ibcon#enter sib2, iclass 37, count 0 2006.229.14:14:23.97#ibcon#flushed, iclass 37, count 0 2006.229.14:14:23.97#ibcon#about to write, iclass 37, count 0 2006.229.14:14:23.97#ibcon#wrote, iclass 37, count 0 2006.229.14:14:23.97#ibcon#about to read 3, iclass 37, count 0 2006.229.14:14:24.01#ibcon#read 3, iclass 37, count 0 2006.229.14:14:24.01#ibcon#about to read 4, iclass 37, count 0 2006.229.14:14:24.01#ibcon#read 4, iclass 37, count 0 2006.229.14:14:24.01#ibcon#about to read 5, iclass 37, count 0 2006.229.14:14:24.01#ibcon#read 5, iclass 37, count 0 2006.229.14:14:24.01#ibcon#about to read 6, iclass 37, count 0 2006.229.14:14:24.01#ibcon#read 6, iclass 37, count 0 2006.229.14:14:24.01#ibcon#end of sib2, iclass 37, count 0 2006.229.14:14:24.01#ibcon#*after write, iclass 37, count 0 2006.229.14:14:24.01#ibcon#*before return 0, iclass 37, count 0 2006.229.14:14:24.01#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:24.01#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:14:24.01#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:14:24.01#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:14:24.01$vck44/vb=7,4 2006.229.14:14:24.01#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.14:14:24.01#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.14:14:24.01#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:24.01#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:24.07#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:24.07#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:24.07#ibcon#enter wrdev, iclass 39, count 2 2006.229.14:14:24.07#ibcon#first serial, iclass 39, count 2 2006.229.14:14:24.07#ibcon#enter sib2, iclass 39, count 2 2006.229.14:14:24.07#ibcon#flushed, iclass 39, count 2 2006.229.14:14:24.07#ibcon#about to write, iclass 39, count 2 2006.229.14:14:24.07#ibcon#wrote, iclass 39, count 2 2006.229.14:14:24.07#ibcon#about to read 3, iclass 39, count 2 2006.229.14:14:24.09#ibcon#read 3, iclass 39, count 2 2006.229.14:14:24.09#ibcon#about to read 4, iclass 39, count 2 2006.229.14:14:24.09#ibcon#read 4, iclass 39, count 2 2006.229.14:14:24.09#ibcon#about to read 5, iclass 39, count 2 2006.229.14:14:24.09#ibcon#read 5, iclass 39, count 2 2006.229.14:14:24.09#ibcon#about to read 6, iclass 39, count 2 2006.229.14:14:24.09#ibcon#read 6, iclass 39, count 2 2006.229.14:14:24.09#ibcon#end of sib2, iclass 39, count 2 2006.229.14:14:24.09#ibcon#*mode == 0, iclass 39, count 2 2006.229.14:14:24.09#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.14:14:24.09#ibcon#[27=AT07-04\r\n] 2006.229.14:14:24.09#ibcon#*before write, iclass 39, count 2 2006.229.14:14:24.09#ibcon#enter sib2, iclass 39, count 2 2006.229.14:14:24.09#ibcon#flushed, iclass 39, count 2 2006.229.14:14:24.09#ibcon#about to write, iclass 39, count 2 2006.229.14:14:24.09#ibcon#wrote, iclass 39, count 2 2006.229.14:14:24.09#ibcon#about to read 3, iclass 39, count 2 2006.229.14:14:24.12#ibcon#read 3, iclass 39, count 2 2006.229.14:14:24.12#ibcon#about to read 4, iclass 39, count 2 2006.229.14:14:24.12#ibcon#read 4, iclass 39, count 2 2006.229.14:14:24.12#ibcon#about to read 5, iclass 39, count 2 2006.229.14:14:24.12#ibcon#read 5, iclass 39, count 2 2006.229.14:14:24.12#ibcon#about to read 6, iclass 39, count 2 2006.229.14:14:24.12#ibcon#read 6, iclass 39, count 2 2006.229.14:14:24.12#ibcon#end of sib2, iclass 39, count 2 2006.229.14:14:24.12#ibcon#*after write, iclass 39, count 2 2006.229.14:14:24.12#ibcon#*before return 0, iclass 39, count 2 2006.229.14:14:24.12#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:24.12#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:14:24.12#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.14:14:24.12#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:24.12#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:24.24#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:24.24#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:24.24#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:14:24.24#ibcon#first serial, iclass 39, count 0 2006.229.14:14:24.24#ibcon#enter sib2, iclass 39, count 0 2006.229.14:14:24.24#ibcon#flushed, iclass 39, count 0 2006.229.14:14:24.24#ibcon#about to write, iclass 39, count 0 2006.229.14:14:24.24#ibcon#wrote, iclass 39, count 0 2006.229.14:14:24.24#ibcon#about to read 3, iclass 39, count 0 2006.229.14:14:24.26#ibcon#read 3, iclass 39, count 0 2006.229.14:14:24.26#ibcon#about to read 4, iclass 39, count 0 2006.229.14:14:24.26#ibcon#read 4, iclass 39, count 0 2006.229.14:14:24.26#ibcon#about to read 5, iclass 39, count 0 2006.229.14:14:24.26#ibcon#read 5, iclass 39, count 0 2006.229.14:14:24.26#ibcon#about to read 6, iclass 39, count 0 2006.229.14:14:24.26#ibcon#read 6, iclass 39, count 0 2006.229.14:14:24.26#ibcon#end of sib2, iclass 39, count 0 2006.229.14:14:24.26#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:14:24.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:14:24.26#ibcon#[27=USB\r\n] 2006.229.14:14:24.26#ibcon#*before write, iclass 39, count 0 2006.229.14:14:24.26#ibcon#enter sib2, iclass 39, count 0 2006.229.14:14:24.26#ibcon#flushed, iclass 39, count 0 2006.229.14:14:24.26#ibcon#about to write, iclass 39, count 0 2006.229.14:14:24.26#ibcon#wrote, iclass 39, count 0 2006.229.14:14:24.26#ibcon#about to read 3, iclass 39, count 0 2006.229.14:14:24.29#ibcon#read 3, iclass 39, count 0 2006.229.14:14:24.29#ibcon#about to read 4, iclass 39, count 0 2006.229.14:14:24.29#ibcon#read 4, iclass 39, count 0 2006.229.14:14:24.29#ibcon#about to read 5, iclass 39, count 0 2006.229.14:14:24.29#ibcon#read 5, iclass 39, count 0 2006.229.14:14:24.29#ibcon#about to read 6, iclass 39, count 0 2006.229.14:14:24.29#ibcon#read 6, iclass 39, count 0 2006.229.14:14:24.29#ibcon#end of sib2, iclass 39, count 0 2006.229.14:14:24.29#ibcon#*after write, iclass 39, count 0 2006.229.14:14:24.29#ibcon#*before return 0, iclass 39, count 0 2006.229.14:14:24.29#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:24.29#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:14:24.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:14:24.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:14:24.29$vck44/vblo=8,744.99 2006.229.14:14:24.29#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:14:24.29#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:14:24.29#ibcon#ireg 17 cls_cnt 0 2006.229.14:14:24.29#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:14:24.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:14:24.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:14:24.29#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:14:24.29#ibcon#first serial, iclass 4, count 0 2006.229.14:14:24.29#ibcon#enter sib2, iclass 4, count 0 2006.229.14:14:24.29#ibcon#flushed, iclass 4, count 0 2006.229.14:14:24.29#ibcon#about to write, iclass 4, count 0 2006.229.14:14:24.29#ibcon#wrote, iclass 4, count 0 2006.229.14:14:24.29#ibcon#about to read 3, iclass 4, count 0 2006.229.14:14:24.30#abcon#<5=/06 1.2 1.9 27.521001002.1\r\n> 2006.229.14:14:24.31#ibcon#read 3, iclass 4, count 0 2006.229.14:14:24.31#ibcon#about to read 4, iclass 4, count 0 2006.229.14:14:24.31#ibcon#read 4, iclass 4, count 0 2006.229.14:14:24.31#ibcon#about to read 5, iclass 4, count 0 2006.229.14:14:24.31#ibcon#read 5, iclass 4, count 0 2006.229.14:14:24.31#ibcon#about to read 6, iclass 4, count 0 2006.229.14:14:24.31#ibcon#read 6, iclass 4, count 0 2006.229.14:14:24.31#ibcon#end of sib2, iclass 4, count 0 2006.229.14:14:24.31#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:14:24.31#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:14:24.31#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:14:24.31#ibcon#*before write, iclass 4, count 0 2006.229.14:14:24.31#ibcon#enter sib2, iclass 4, count 0 2006.229.14:14:24.31#ibcon#flushed, iclass 4, count 0 2006.229.14:14:24.31#ibcon#about to write, iclass 4, count 0 2006.229.14:14:24.31#ibcon#wrote, iclass 4, count 0 2006.229.14:14:24.31#ibcon#about to read 3, iclass 4, count 0 2006.229.14:14:24.32#abcon#{5=INTERFACE CLEAR} 2006.229.14:14:24.35#ibcon#read 3, iclass 4, count 0 2006.229.14:14:24.35#ibcon#about to read 4, iclass 4, count 0 2006.229.14:14:24.35#ibcon#read 4, iclass 4, count 0 2006.229.14:14:24.35#ibcon#about to read 5, iclass 4, count 0 2006.229.14:14:24.35#ibcon#read 5, iclass 4, count 0 2006.229.14:14:24.35#ibcon#about to read 6, iclass 4, count 0 2006.229.14:14:24.35#ibcon#read 6, iclass 4, count 0 2006.229.14:14:24.35#ibcon#end of sib2, iclass 4, count 0 2006.229.14:14:24.35#ibcon#*after write, iclass 4, count 0 2006.229.14:14:24.35#ibcon#*before return 0, iclass 4, count 0 2006.229.14:14:24.35#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:14:24.35#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:14:24.35#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:14:24.35#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:14:24.35$vck44/vb=8,4 2006.229.14:14:24.35#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.14:14:24.35#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.14:14:24.35#ibcon#ireg 11 cls_cnt 2 2006.229.14:14:24.35#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:14:24.38#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:14:24.41#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:14:24.41#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:14:24.41#ibcon#enter wrdev, iclass 10, count 2 2006.229.14:14:24.41#ibcon#first serial, iclass 10, count 2 2006.229.14:14:24.41#ibcon#enter sib2, iclass 10, count 2 2006.229.14:14:24.41#ibcon#flushed, iclass 10, count 2 2006.229.14:14:24.41#ibcon#about to write, iclass 10, count 2 2006.229.14:14:24.41#ibcon#wrote, iclass 10, count 2 2006.229.14:14:24.41#ibcon#about to read 3, iclass 10, count 2 2006.229.14:14:24.43#ibcon#read 3, iclass 10, count 2 2006.229.14:14:24.43#ibcon#about to read 4, iclass 10, count 2 2006.229.14:14:24.43#ibcon#read 4, iclass 10, count 2 2006.229.14:14:24.43#ibcon#about to read 5, iclass 10, count 2 2006.229.14:14:24.43#ibcon#read 5, iclass 10, count 2 2006.229.14:14:24.43#ibcon#about to read 6, iclass 10, count 2 2006.229.14:14:24.43#ibcon#read 6, iclass 10, count 2 2006.229.14:14:24.43#ibcon#end of sib2, iclass 10, count 2 2006.229.14:14:24.43#ibcon#*mode == 0, iclass 10, count 2 2006.229.14:14:24.43#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.14:14:24.43#ibcon#[27=AT08-04\r\n] 2006.229.14:14:24.43#ibcon#*before write, iclass 10, count 2 2006.229.14:14:24.43#ibcon#enter sib2, iclass 10, count 2 2006.229.14:14:24.43#ibcon#flushed, iclass 10, count 2 2006.229.14:14:24.43#ibcon#about to write, iclass 10, count 2 2006.229.14:14:24.43#ibcon#wrote, iclass 10, count 2 2006.229.14:14:24.43#ibcon#about to read 3, iclass 10, count 2 2006.229.14:14:24.46#ibcon#read 3, iclass 10, count 2 2006.229.14:14:24.46#ibcon#about to read 4, iclass 10, count 2 2006.229.14:14:24.46#ibcon#read 4, iclass 10, count 2 2006.229.14:14:24.46#ibcon#about to read 5, iclass 10, count 2 2006.229.14:14:24.46#ibcon#read 5, iclass 10, count 2 2006.229.14:14:24.46#ibcon#about to read 6, iclass 10, count 2 2006.229.14:14:24.46#ibcon#read 6, iclass 10, count 2 2006.229.14:14:24.46#ibcon#end of sib2, iclass 10, count 2 2006.229.14:14:24.46#ibcon#*after write, iclass 10, count 2 2006.229.14:14:24.46#ibcon#*before return 0, iclass 10, count 2 2006.229.14:14:24.46#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:14:24.46#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:14:24.46#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.14:14:24.46#ibcon#ireg 7 cls_cnt 0 2006.229.14:14:24.46#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:14:24.58#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:14:24.58#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:14:24.58#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:14:24.58#ibcon#first serial, iclass 10, count 0 2006.229.14:14:24.58#ibcon#enter sib2, iclass 10, count 0 2006.229.14:14:24.58#ibcon#flushed, iclass 10, count 0 2006.229.14:14:24.58#ibcon#about to write, iclass 10, count 0 2006.229.14:14:24.58#ibcon#wrote, iclass 10, count 0 2006.229.14:14:24.58#ibcon#about to read 3, iclass 10, count 0 2006.229.14:14:24.60#ibcon#read 3, iclass 10, count 0 2006.229.14:14:24.60#ibcon#about to read 4, iclass 10, count 0 2006.229.14:14:24.60#ibcon#read 4, iclass 10, count 0 2006.229.14:14:24.60#ibcon#about to read 5, iclass 10, count 0 2006.229.14:14:24.60#ibcon#read 5, iclass 10, count 0 2006.229.14:14:24.60#ibcon#about to read 6, iclass 10, count 0 2006.229.14:14:24.60#ibcon#read 6, iclass 10, count 0 2006.229.14:14:24.60#ibcon#end of sib2, iclass 10, count 0 2006.229.14:14:24.60#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:14:24.60#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:14:24.60#ibcon#[27=USB\r\n] 2006.229.14:14:24.60#ibcon#*before write, iclass 10, count 0 2006.229.14:14:24.60#ibcon#enter sib2, iclass 10, count 0 2006.229.14:14:24.60#ibcon#flushed, iclass 10, count 0 2006.229.14:14:24.60#ibcon#about to write, iclass 10, count 0 2006.229.14:14:24.60#ibcon#wrote, iclass 10, count 0 2006.229.14:14:24.60#ibcon#about to read 3, iclass 10, count 0 2006.229.14:14:24.63#ibcon#read 3, iclass 10, count 0 2006.229.14:14:24.63#ibcon#about to read 4, iclass 10, count 0 2006.229.14:14:24.63#ibcon#read 4, iclass 10, count 0 2006.229.14:14:24.63#ibcon#about to read 5, iclass 10, count 0 2006.229.14:14:24.63#ibcon#read 5, iclass 10, count 0 2006.229.14:14:24.63#ibcon#about to read 6, iclass 10, count 0 2006.229.14:14:24.63#ibcon#read 6, iclass 10, count 0 2006.229.14:14:24.63#ibcon#end of sib2, iclass 10, count 0 2006.229.14:14:24.63#ibcon#*after write, iclass 10, count 0 2006.229.14:14:24.63#ibcon#*before return 0, iclass 10, count 0 2006.229.14:14:24.63#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:14:24.63#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:14:24.63#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:14:24.63#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:14:24.63$vck44/vabw=wide 2006.229.14:14:24.63#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.14:14:24.63#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.14:14:24.63#ibcon#ireg 8 cls_cnt 0 2006.229.14:14:24.63#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:24.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:24.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:24.63#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:14:24.63#ibcon#first serial, iclass 13, count 0 2006.229.14:14:24.63#ibcon#enter sib2, iclass 13, count 0 2006.229.14:14:24.63#ibcon#flushed, iclass 13, count 0 2006.229.14:14:24.63#ibcon#about to write, iclass 13, count 0 2006.229.14:14:24.63#ibcon#wrote, iclass 13, count 0 2006.229.14:14:24.63#ibcon#about to read 3, iclass 13, count 0 2006.229.14:14:24.65#ibcon#read 3, iclass 13, count 0 2006.229.14:14:24.65#ibcon#about to read 4, iclass 13, count 0 2006.229.14:14:24.65#ibcon#read 4, iclass 13, count 0 2006.229.14:14:24.65#ibcon#about to read 5, iclass 13, count 0 2006.229.14:14:24.65#ibcon#read 5, iclass 13, count 0 2006.229.14:14:24.65#ibcon#about to read 6, iclass 13, count 0 2006.229.14:14:24.65#ibcon#read 6, iclass 13, count 0 2006.229.14:14:24.65#ibcon#end of sib2, iclass 13, count 0 2006.229.14:14:24.65#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:14:24.65#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:14:24.65#ibcon#[25=BW32\r\n] 2006.229.14:14:24.65#ibcon#*before write, iclass 13, count 0 2006.229.14:14:24.65#ibcon#enter sib2, iclass 13, count 0 2006.229.14:14:24.65#ibcon#flushed, iclass 13, count 0 2006.229.14:14:24.65#ibcon#about to write, iclass 13, count 0 2006.229.14:14:24.65#ibcon#wrote, iclass 13, count 0 2006.229.14:14:24.65#ibcon#about to read 3, iclass 13, count 0 2006.229.14:14:24.68#ibcon#read 3, iclass 13, count 0 2006.229.14:14:24.68#ibcon#about to read 4, iclass 13, count 0 2006.229.14:14:24.68#ibcon#read 4, iclass 13, count 0 2006.229.14:14:24.68#ibcon#about to read 5, iclass 13, count 0 2006.229.14:14:24.68#ibcon#read 5, iclass 13, count 0 2006.229.14:14:24.68#ibcon#about to read 6, iclass 13, count 0 2006.229.14:14:24.68#ibcon#read 6, iclass 13, count 0 2006.229.14:14:24.68#ibcon#end of sib2, iclass 13, count 0 2006.229.14:14:24.68#ibcon#*after write, iclass 13, count 0 2006.229.14:14:24.68#ibcon#*before return 0, iclass 13, count 0 2006.229.14:14:24.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:24.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:14:24.68#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:14:24.68#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:14:24.68$vck44/vbbw=wide 2006.229.14:14:24.68#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.14:14:24.68#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.14:14:24.68#ibcon#ireg 8 cls_cnt 0 2006.229.14:14:24.68#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:14:24.75#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:14:24.75#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:14:24.75#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:14:24.75#ibcon#first serial, iclass 15, count 0 2006.229.14:14:24.75#ibcon#enter sib2, iclass 15, count 0 2006.229.14:14:24.75#ibcon#flushed, iclass 15, count 0 2006.229.14:14:24.75#ibcon#about to write, iclass 15, count 0 2006.229.14:14:24.75#ibcon#wrote, iclass 15, count 0 2006.229.14:14:24.75#ibcon#about to read 3, iclass 15, count 0 2006.229.14:14:24.77#ibcon#read 3, iclass 15, count 0 2006.229.14:14:24.77#ibcon#about to read 4, iclass 15, count 0 2006.229.14:14:24.77#ibcon#read 4, iclass 15, count 0 2006.229.14:14:24.77#ibcon#about to read 5, iclass 15, count 0 2006.229.14:14:24.77#ibcon#read 5, iclass 15, count 0 2006.229.14:14:24.77#ibcon#about to read 6, iclass 15, count 0 2006.229.14:14:24.77#ibcon#read 6, iclass 15, count 0 2006.229.14:14:24.77#ibcon#end of sib2, iclass 15, count 0 2006.229.14:14:24.77#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:14:24.77#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:14:24.77#ibcon#[27=BW32\r\n] 2006.229.14:14:24.77#ibcon#*before write, iclass 15, count 0 2006.229.14:14:24.77#ibcon#enter sib2, iclass 15, count 0 2006.229.14:14:24.77#ibcon#flushed, iclass 15, count 0 2006.229.14:14:24.77#ibcon#about to write, iclass 15, count 0 2006.229.14:14:24.77#ibcon#wrote, iclass 15, count 0 2006.229.14:14:24.77#ibcon#about to read 3, iclass 15, count 0 2006.229.14:14:24.80#ibcon#read 3, iclass 15, count 0 2006.229.14:14:24.80#ibcon#about to read 4, iclass 15, count 0 2006.229.14:14:24.80#ibcon#read 4, iclass 15, count 0 2006.229.14:14:24.80#ibcon#about to read 5, iclass 15, count 0 2006.229.14:14:24.80#ibcon#read 5, iclass 15, count 0 2006.229.14:14:24.80#ibcon#about to read 6, iclass 15, count 0 2006.229.14:14:24.80#ibcon#read 6, iclass 15, count 0 2006.229.14:14:24.80#ibcon#end of sib2, iclass 15, count 0 2006.229.14:14:24.80#ibcon#*after write, iclass 15, count 0 2006.229.14:14:24.80#ibcon#*before return 0, iclass 15, count 0 2006.229.14:14:24.80#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:14:24.80#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:14:24.80#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:14:24.80#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:14:24.80$setupk4/ifdk4 2006.229.14:14:24.80$ifdk4/lo= 2006.229.14:14:24.80$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:14:24.80$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:14:24.80$ifdk4/patch= 2006.229.14:14:24.80$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:14:24.80$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:14:24.80$setupk4/!*+20s 2006.229.14:14:34.47#abcon#<5=/06 1.2 1.9 27.521001002.0\r\n> 2006.229.14:14:34.49#abcon#{5=INTERFACE CLEAR} 2006.229.14:14:34.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:14:39.28$setupk4/"tpicd 2006.229.14:14:39.28$setupk4/echo=off 2006.229.14:14:39.28$setupk4/xlog=off 2006.229.14:14:39.28:!2006.229.14:17:05 2006.229.14:15:05.14#trakl#Source acquired 2006.229.14:15:06.14#flagr#flagr/antenna,acquired 2006.229.14:17:05.00:preob 2006.229.14:17:05.14/onsource/TRACKING 2006.229.14:17:05.14:!2006.229.14:17:15 2006.229.14:17:15.00:"tape 2006.229.14:17:15.00:"st=record 2006.229.14:17:15.00:data_valid=on 2006.229.14:17:15.00:midob 2006.229.14:17:15.13/onsource/TRACKING 2006.229.14:17:15.13/wx/27.51,1002.1,100 2006.229.14:17:15.34/cable/+6.4126E-03 2006.229.14:17:16.43/va/01,08,usb,yes,29,31 2006.229.14:17:16.43/va/02,07,usb,yes,31,32 2006.229.14:17:16.43/va/03,06,usb,yes,39,42 2006.229.14:17:16.43/va/04,07,usb,yes,32,34 2006.229.14:17:16.43/va/05,04,usb,yes,29,29 2006.229.14:17:16.43/va/06,04,usb,yes,32,32 2006.229.14:17:16.43/va/07,05,usb,yes,29,29 2006.229.14:17:16.43/va/08,06,usb,yes,21,26 2006.229.14:17:16.66/valo/01,524.99,yes,locked 2006.229.14:17:16.66/valo/02,534.99,yes,locked 2006.229.14:17:16.66/valo/03,564.99,yes,locked 2006.229.14:17:16.66/valo/04,624.99,yes,locked 2006.229.14:17:16.66/valo/05,734.99,yes,locked 2006.229.14:17:16.66/valo/06,814.99,yes,locked 2006.229.14:17:16.66/valo/07,864.99,yes,locked 2006.229.14:17:16.66/valo/08,884.99,yes,locked 2006.229.14:17:17.75/vb/01,04,usb,yes,31,28 2006.229.14:17:17.75/vb/02,04,usb,yes,33,33 2006.229.14:17:17.75/vb/03,04,usb,yes,30,33 2006.229.14:17:17.75/vb/04,04,usb,yes,34,33 2006.229.14:17:17.75/vb/05,04,usb,yes,27,29 2006.229.14:17:17.75/vb/06,04,usb,yes,31,27 2006.229.14:17:17.75/vb/07,04,usb,yes,31,31 2006.229.14:17:17.75/vb/08,04,usb,yes,28,32 2006.229.14:17:17.98/vblo/01,629.99,yes,locked 2006.229.14:17:17.98/vblo/02,634.99,yes,locked 2006.229.14:17:17.98/vblo/03,649.99,yes,locked 2006.229.14:17:17.98/vblo/04,679.99,yes,locked 2006.229.14:17:17.98/vblo/05,709.99,yes,locked 2006.229.14:17:17.98/vblo/06,719.99,yes,locked 2006.229.14:17:17.98/vblo/07,734.99,yes,locked 2006.229.14:17:17.98/vblo/08,744.99,yes,locked 2006.229.14:17:18.13/vabw/8 2006.229.14:17:18.28/vbbw/8 2006.229.14:17:18.37/xfe/off,on,12.2 2006.229.14:17:18.75/ifatt/23,28,28,28 2006.229.14:17:19.07/fmout-gps/S +4.59E-07 2006.229.14:17:19.11:!2006.229.14:18:25 2006.229.14:18:25.01:data_valid=off 2006.229.14:18:25.02:"et 2006.229.14:18:25.02:!+3s 2006.229.14:18:28.03:"tape 2006.229.14:18:28.03:postob 2006.229.14:18:28.09/cable/+6.4131E-03 2006.229.14:18:28.09/wx/27.51,1002.1,100 2006.229.14:18:28.15/fmout-gps/S +4.60E-07 2006.229.14:18:28.15:scan_name=229-1420,jd0608,40 2006.229.14:18:28.15:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.14:18:29.13#flagr#flagr/antenna,new-source 2006.229.14:18:29.13:checkk5 2006.229.14:18:29.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:18:29.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:18:30.28/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:18:30.67/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:18:31.06/chk_obsdata//k5ts1/T2291417??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.14:18:31.48/chk_obsdata//k5ts2/T2291417??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.14:18:31.87/chk_obsdata//k5ts3/T2291417??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.14:18:32.29/chk_obsdata//k5ts4/T2291417??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.14:18:33.01/k5log//k5ts1_log_newline 2006.229.14:18:33.73/k5log//k5ts2_log_newline 2006.229.14:18:34.44/k5log//k5ts3_log_newline 2006.229.14:18:35.14/k5log//k5ts4_log_newline 2006.229.14:18:35.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:18:35.17:setupk4=1 2006.229.14:18:35.17$setupk4/echo=on 2006.229.14:18:35.17$setupk4/pcalon 2006.229.14:18:35.17$pcalon/"no phase cal control is implemented here 2006.229.14:18:35.17$setupk4/"tpicd=stop 2006.229.14:18:35.17$setupk4/"rec=synch_on 2006.229.14:18:35.17$setupk4/"rec_mode=128 2006.229.14:18:35.17$setupk4/!* 2006.229.14:18:35.17$setupk4/recpk4 2006.229.14:18:35.17$recpk4/recpatch= 2006.229.14:18:35.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:18:35.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:18:35.18$setupk4/vck44 2006.229.14:18:35.18$vck44/valo=1,524.99 2006.229.14:18:35.18#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.14:18:35.18#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.14:18:35.18#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:35.18#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:35.18#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:35.18#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:35.18#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:18:35.18#ibcon#first serial, iclass 6, count 0 2006.229.14:18:35.18#ibcon#enter sib2, iclass 6, count 0 2006.229.14:18:35.18#ibcon#flushed, iclass 6, count 0 2006.229.14:18:35.18#ibcon#about to write, iclass 6, count 0 2006.229.14:18:35.18#ibcon#wrote, iclass 6, count 0 2006.229.14:18:35.18#ibcon#about to read 3, iclass 6, count 0 2006.229.14:18:35.19#ibcon#read 3, iclass 6, count 0 2006.229.14:18:35.19#ibcon#about to read 4, iclass 6, count 0 2006.229.14:18:35.19#ibcon#read 4, iclass 6, count 0 2006.229.14:18:35.19#ibcon#about to read 5, iclass 6, count 0 2006.229.14:18:35.19#ibcon#read 5, iclass 6, count 0 2006.229.14:18:35.19#ibcon#about to read 6, iclass 6, count 0 2006.229.14:18:35.19#ibcon#read 6, iclass 6, count 0 2006.229.14:18:35.19#ibcon#end of sib2, iclass 6, count 0 2006.229.14:18:35.19#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:18:35.19#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:18:35.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:18:35.19#ibcon#*before write, iclass 6, count 0 2006.229.14:18:35.19#ibcon#enter sib2, iclass 6, count 0 2006.229.14:18:35.19#ibcon#flushed, iclass 6, count 0 2006.229.14:18:35.19#ibcon#about to write, iclass 6, count 0 2006.229.14:18:35.19#ibcon#wrote, iclass 6, count 0 2006.229.14:18:35.19#ibcon#about to read 3, iclass 6, count 0 2006.229.14:18:35.24#ibcon#read 3, iclass 6, count 0 2006.229.14:18:35.24#ibcon#about to read 4, iclass 6, count 0 2006.229.14:18:35.24#ibcon#read 4, iclass 6, count 0 2006.229.14:18:35.24#ibcon#about to read 5, iclass 6, count 0 2006.229.14:18:35.24#ibcon#read 5, iclass 6, count 0 2006.229.14:18:35.24#ibcon#about to read 6, iclass 6, count 0 2006.229.14:18:35.24#ibcon#read 6, iclass 6, count 0 2006.229.14:18:35.24#ibcon#end of sib2, iclass 6, count 0 2006.229.14:18:35.24#ibcon#*after write, iclass 6, count 0 2006.229.14:18:35.24#ibcon#*before return 0, iclass 6, count 0 2006.229.14:18:35.24#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:35.24#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:35.24#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:18:35.24#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:18:35.24$vck44/va=1,8 2006.229.14:18:35.24#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.14:18:35.24#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.14:18:35.24#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:35.24#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:35.24#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:35.24#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:35.24#ibcon#enter wrdev, iclass 10, count 2 2006.229.14:18:35.24#ibcon#first serial, iclass 10, count 2 2006.229.14:18:35.24#ibcon#enter sib2, iclass 10, count 2 2006.229.14:18:35.24#ibcon#flushed, iclass 10, count 2 2006.229.14:18:35.24#ibcon#about to write, iclass 10, count 2 2006.229.14:18:35.24#ibcon#wrote, iclass 10, count 2 2006.229.14:18:35.24#ibcon#about to read 3, iclass 10, count 2 2006.229.14:18:35.26#ibcon#read 3, iclass 10, count 2 2006.229.14:18:35.26#ibcon#about to read 4, iclass 10, count 2 2006.229.14:18:35.26#ibcon#read 4, iclass 10, count 2 2006.229.14:18:35.26#ibcon#about to read 5, iclass 10, count 2 2006.229.14:18:35.26#ibcon#read 5, iclass 10, count 2 2006.229.14:18:35.26#ibcon#about to read 6, iclass 10, count 2 2006.229.14:18:35.26#ibcon#read 6, iclass 10, count 2 2006.229.14:18:35.26#ibcon#end of sib2, iclass 10, count 2 2006.229.14:18:35.26#ibcon#*mode == 0, iclass 10, count 2 2006.229.14:18:35.26#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.14:18:35.26#ibcon#[25=AT01-08\r\n] 2006.229.14:18:35.26#ibcon#*before write, iclass 10, count 2 2006.229.14:18:35.26#ibcon#enter sib2, iclass 10, count 2 2006.229.14:18:35.26#ibcon#flushed, iclass 10, count 2 2006.229.14:18:35.26#ibcon#about to write, iclass 10, count 2 2006.229.14:18:35.26#ibcon#wrote, iclass 10, count 2 2006.229.14:18:35.26#ibcon#about to read 3, iclass 10, count 2 2006.229.14:18:35.29#ibcon#read 3, iclass 10, count 2 2006.229.14:18:35.29#ibcon#about to read 4, iclass 10, count 2 2006.229.14:18:35.29#ibcon#read 4, iclass 10, count 2 2006.229.14:18:35.29#ibcon#about to read 5, iclass 10, count 2 2006.229.14:18:35.29#ibcon#read 5, iclass 10, count 2 2006.229.14:18:35.29#ibcon#about to read 6, iclass 10, count 2 2006.229.14:18:35.29#ibcon#read 6, iclass 10, count 2 2006.229.14:18:35.29#ibcon#end of sib2, iclass 10, count 2 2006.229.14:18:35.29#ibcon#*after write, iclass 10, count 2 2006.229.14:18:35.29#ibcon#*before return 0, iclass 10, count 2 2006.229.14:18:35.29#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:35.29#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:35.29#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.14:18:35.29#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:35.29#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:35.41#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:35.41#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:35.41#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:18:35.41#ibcon#first serial, iclass 10, count 0 2006.229.14:18:35.41#ibcon#enter sib2, iclass 10, count 0 2006.229.14:18:35.41#ibcon#flushed, iclass 10, count 0 2006.229.14:18:35.41#ibcon#about to write, iclass 10, count 0 2006.229.14:18:35.41#ibcon#wrote, iclass 10, count 0 2006.229.14:18:35.41#ibcon#about to read 3, iclass 10, count 0 2006.229.14:18:35.43#ibcon#read 3, iclass 10, count 0 2006.229.14:18:35.43#ibcon#about to read 4, iclass 10, count 0 2006.229.14:18:35.43#ibcon#read 4, iclass 10, count 0 2006.229.14:18:35.43#ibcon#about to read 5, iclass 10, count 0 2006.229.14:18:35.43#ibcon#read 5, iclass 10, count 0 2006.229.14:18:35.43#ibcon#about to read 6, iclass 10, count 0 2006.229.14:18:35.43#ibcon#read 6, iclass 10, count 0 2006.229.14:18:35.43#ibcon#end of sib2, iclass 10, count 0 2006.229.14:18:35.43#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:18:35.43#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:18:35.43#ibcon#[25=USB\r\n] 2006.229.14:18:35.43#ibcon#*before write, iclass 10, count 0 2006.229.14:18:35.43#ibcon#enter sib2, iclass 10, count 0 2006.229.14:18:35.43#ibcon#flushed, iclass 10, count 0 2006.229.14:18:35.43#ibcon#about to write, iclass 10, count 0 2006.229.14:18:35.43#ibcon#wrote, iclass 10, count 0 2006.229.14:18:35.43#ibcon#about to read 3, iclass 10, count 0 2006.229.14:18:35.46#ibcon#read 3, iclass 10, count 0 2006.229.14:18:35.46#ibcon#about to read 4, iclass 10, count 0 2006.229.14:18:35.46#ibcon#read 4, iclass 10, count 0 2006.229.14:18:35.46#ibcon#about to read 5, iclass 10, count 0 2006.229.14:18:35.46#ibcon#read 5, iclass 10, count 0 2006.229.14:18:35.46#ibcon#about to read 6, iclass 10, count 0 2006.229.14:18:35.46#ibcon#read 6, iclass 10, count 0 2006.229.14:18:35.46#ibcon#end of sib2, iclass 10, count 0 2006.229.14:18:35.46#ibcon#*after write, iclass 10, count 0 2006.229.14:18:35.46#ibcon#*before return 0, iclass 10, count 0 2006.229.14:18:35.46#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:35.46#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:35.46#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:18:35.46#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:18:35.46$vck44/valo=2,534.99 2006.229.14:18:35.46#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.14:18:35.46#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.14:18:35.46#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:35.46#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:35.46#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:35.46#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:35.46#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:18:35.46#ibcon#first serial, iclass 12, count 0 2006.229.14:18:35.46#ibcon#enter sib2, iclass 12, count 0 2006.229.14:18:35.46#ibcon#flushed, iclass 12, count 0 2006.229.14:18:35.46#ibcon#about to write, iclass 12, count 0 2006.229.14:18:35.46#ibcon#wrote, iclass 12, count 0 2006.229.14:18:35.46#ibcon#about to read 3, iclass 12, count 0 2006.229.14:18:35.48#ibcon#read 3, iclass 12, count 0 2006.229.14:18:35.48#ibcon#about to read 4, iclass 12, count 0 2006.229.14:18:35.48#ibcon#read 4, iclass 12, count 0 2006.229.14:18:35.48#ibcon#about to read 5, iclass 12, count 0 2006.229.14:18:35.48#ibcon#read 5, iclass 12, count 0 2006.229.14:18:35.48#ibcon#about to read 6, iclass 12, count 0 2006.229.14:18:35.48#ibcon#read 6, iclass 12, count 0 2006.229.14:18:35.48#ibcon#end of sib2, iclass 12, count 0 2006.229.14:18:35.48#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:18:35.48#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:18:35.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:18:35.48#ibcon#*before write, iclass 12, count 0 2006.229.14:18:35.48#ibcon#enter sib2, iclass 12, count 0 2006.229.14:18:35.48#ibcon#flushed, iclass 12, count 0 2006.229.14:18:35.48#ibcon#about to write, iclass 12, count 0 2006.229.14:18:35.48#ibcon#wrote, iclass 12, count 0 2006.229.14:18:35.48#ibcon#about to read 3, iclass 12, count 0 2006.229.14:18:35.52#ibcon#read 3, iclass 12, count 0 2006.229.14:18:35.52#ibcon#about to read 4, iclass 12, count 0 2006.229.14:18:35.52#ibcon#read 4, iclass 12, count 0 2006.229.14:18:35.52#ibcon#about to read 5, iclass 12, count 0 2006.229.14:18:35.52#ibcon#read 5, iclass 12, count 0 2006.229.14:18:35.52#ibcon#about to read 6, iclass 12, count 0 2006.229.14:18:35.52#ibcon#read 6, iclass 12, count 0 2006.229.14:18:35.52#ibcon#end of sib2, iclass 12, count 0 2006.229.14:18:35.52#ibcon#*after write, iclass 12, count 0 2006.229.14:18:35.52#ibcon#*before return 0, iclass 12, count 0 2006.229.14:18:35.52#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:35.52#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:35.52#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:18:35.52#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:18:35.52$vck44/va=2,7 2006.229.14:18:35.52#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.14:18:35.52#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.14:18:35.52#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:35.52#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:18:35.58#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:18:35.58#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:18:35.58#ibcon#enter wrdev, iclass 14, count 2 2006.229.14:18:35.58#ibcon#first serial, iclass 14, count 2 2006.229.14:18:35.58#ibcon#enter sib2, iclass 14, count 2 2006.229.14:18:35.58#ibcon#flushed, iclass 14, count 2 2006.229.14:18:35.58#ibcon#about to write, iclass 14, count 2 2006.229.14:18:35.58#ibcon#wrote, iclass 14, count 2 2006.229.14:18:35.58#ibcon#about to read 3, iclass 14, count 2 2006.229.14:18:35.60#ibcon#read 3, iclass 14, count 2 2006.229.14:18:35.60#ibcon#about to read 4, iclass 14, count 2 2006.229.14:18:35.60#ibcon#read 4, iclass 14, count 2 2006.229.14:18:35.60#ibcon#about to read 5, iclass 14, count 2 2006.229.14:18:35.60#ibcon#read 5, iclass 14, count 2 2006.229.14:18:35.60#ibcon#about to read 6, iclass 14, count 2 2006.229.14:18:35.60#ibcon#read 6, iclass 14, count 2 2006.229.14:18:35.60#ibcon#end of sib2, iclass 14, count 2 2006.229.14:18:35.60#ibcon#*mode == 0, iclass 14, count 2 2006.229.14:18:35.60#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.14:18:35.60#ibcon#[25=AT02-07\r\n] 2006.229.14:18:35.60#ibcon#*before write, iclass 14, count 2 2006.229.14:18:35.60#ibcon#enter sib2, iclass 14, count 2 2006.229.14:18:35.60#ibcon#flushed, iclass 14, count 2 2006.229.14:18:35.60#ibcon#about to write, iclass 14, count 2 2006.229.14:18:35.60#ibcon#wrote, iclass 14, count 2 2006.229.14:18:35.60#ibcon#about to read 3, iclass 14, count 2 2006.229.14:18:35.63#ibcon#read 3, iclass 14, count 2 2006.229.14:18:35.63#ibcon#about to read 4, iclass 14, count 2 2006.229.14:18:35.63#ibcon#read 4, iclass 14, count 2 2006.229.14:18:35.63#ibcon#about to read 5, iclass 14, count 2 2006.229.14:18:35.63#ibcon#read 5, iclass 14, count 2 2006.229.14:18:35.63#ibcon#about to read 6, iclass 14, count 2 2006.229.14:18:35.63#ibcon#read 6, iclass 14, count 2 2006.229.14:18:35.63#ibcon#end of sib2, iclass 14, count 2 2006.229.14:18:35.63#ibcon#*after write, iclass 14, count 2 2006.229.14:18:35.63#ibcon#*before return 0, iclass 14, count 2 2006.229.14:18:35.63#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:18:35.63#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:18:35.63#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.14:18:35.63#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:35.63#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:18:35.75#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:18:35.75#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:18:35.75#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:18:35.75#ibcon#first serial, iclass 14, count 0 2006.229.14:18:35.75#ibcon#enter sib2, iclass 14, count 0 2006.229.14:18:35.75#ibcon#flushed, iclass 14, count 0 2006.229.14:18:35.75#ibcon#about to write, iclass 14, count 0 2006.229.14:18:35.75#ibcon#wrote, iclass 14, count 0 2006.229.14:18:35.75#ibcon#about to read 3, iclass 14, count 0 2006.229.14:18:35.77#ibcon#read 3, iclass 14, count 0 2006.229.14:18:35.77#ibcon#about to read 4, iclass 14, count 0 2006.229.14:18:35.77#ibcon#read 4, iclass 14, count 0 2006.229.14:18:35.77#ibcon#about to read 5, iclass 14, count 0 2006.229.14:18:35.77#ibcon#read 5, iclass 14, count 0 2006.229.14:18:35.77#ibcon#about to read 6, iclass 14, count 0 2006.229.14:18:35.77#ibcon#read 6, iclass 14, count 0 2006.229.14:18:35.77#ibcon#end of sib2, iclass 14, count 0 2006.229.14:18:35.77#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:18:35.77#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:18:35.77#ibcon#[25=USB\r\n] 2006.229.14:18:35.77#ibcon#*before write, iclass 14, count 0 2006.229.14:18:35.77#ibcon#enter sib2, iclass 14, count 0 2006.229.14:18:35.77#ibcon#flushed, iclass 14, count 0 2006.229.14:18:35.77#ibcon#about to write, iclass 14, count 0 2006.229.14:18:35.77#ibcon#wrote, iclass 14, count 0 2006.229.14:18:35.77#ibcon#about to read 3, iclass 14, count 0 2006.229.14:18:35.80#ibcon#read 3, iclass 14, count 0 2006.229.14:18:35.80#ibcon#about to read 4, iclass 14, count 0 2006.229.14:18:35.80#ibcon#read 4, iclass 14, count 0 2006.229.14:18:35.80#ibcon#about to read 5, iclass 14, count 0 2006.229.14:18:35.80#ibcon#read 5, iclass 14, count 0 2006.229.14:18:35.80#ibcon#about to read 6, iclass 14, count 0 2006.229.14:18:35.80#ibcon#read 6, iclass 14, count 0 2006.229.14:18:35.80#ibcon#end of sib2, iclass 14, count 0 2006.229.14:18:35.80#ibcon#*after write, iclass 14, count 0 2006.229.14:18:35.80#ibcon#*before return 0, iclass 14, count 0 2006.229.14:18:35.80#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:18:35.80#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:18:35.80#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:18:35.80#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:18:35.80$vck44/valo=3,564.99 2006.229.14:18:35.80#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.14:18:35.80#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.14:18:35.80#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:35.80#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:18:35.80#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:18:35.80#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:18:35.80#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:18:35.80#ibcon#first serial, iclass 16, count 0 2006.229.14:18:35.80#ibcon#enter sib2, iclass 16, count 0 2006.229.14:18:35.80#ibcon#flushed, iclass 16, count 0 2006.229.14:18:35.80#ibcon#about to write, iclass 16, count 0 2006.229.14:18:35.80#ibcon#wrote, iclass 16, count 0 2006.229.14:18:35.80#ibcon#about to read 3, iclass 16, count 0 2006.229.14:18:35.82#ibcon#read 3, iclass 16, count 0 2006.229.14:18:35.82#ibcon#about to read 4, iclass 16, count 0 2006.229.14:18:35.82#ibcon#read 4, iclass 16, count 0 2006.229.14:18:35.82#ibcon#about to read 5, iclass 16, count 0 2006.229.14:18:35.82#ibcon#read 5, iclass 16, count 0 2006.229.14:18:35.82#ibcon#about to read 6, iclass 16, count 0 2006.229.14:18:35.82#ibcon#read 6, iclass 16, count 0 2006.229.14:18:35.82#ibcon#end of sib2, iclass 16, count 0 2006.229.14:18:35.82#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:18:35.82#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:18:35.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:18:35.82#ibcon#*before write, iclass 16, count 0 2006.229.14:18:35.82#ibcon#enter sib2, iclass 16, count 0 2006.229.14:18:35.82#ibcon#flushed, iclass 16, count 0 2006.229.14:18:35.82#ibcon#about to write, iclass 16, count 0 2006.229.14:18:35.82#ibcon#wrote, iclass 16, count 0 2006.229.14:18:35.82#ibcon#about to read 3, iclass 16, count 0 2006.229.14:18:35.86#ibcon#read 3, iclass 16, count 0 2006.229.14:18:35.86#ibcon#about to read 4, iclass 16, count 0 2006.229.14:18:35.86#ibcon#read 4, iclass 16, count 0 2006.229.14:18:35.86#ibcon#about to read 5, iclass 16, count 0 2006.229.14:18:35.86#ibcon#read 5, iclass 16, count 0 2006.229.14:18:35.86#ibcon#about to read 6, iclass 16, count 0 2006.229.14:18:35.86#ibcon#read 6, iclass 16, count 0 2006.229.14:18:35.86#ibcon#end of sib2, iclass 16, count 0 2006.229.14:18:35.86#ibcon#*after write, iclass 16, count 0 2006.229.14:18:35.86#ibcon#*before return 0, iclass 16, count 0 2006.229.14:18:35.86#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:18:35.86#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:18:35.86#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:18:35.86#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:18:35.86$vck44/va=3,6 2006.229.14:18:35.86#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.14:18:35.86#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.14:18:35.86#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:35.86#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:18:35.92#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:18:35.92#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:18:35.92#ibcon#enter wrdev, iclass 18, count 2 2006.229.14:18:35.92#ibcon#first serial, iclass 18, count 2 2006.229.14:18:35.92#ibcon#enter sib2, iclass 18, count 2 2006.229.14:18:35.92#ibcon#flushed, iclass 18, count 2 2006.229.14:18:35.92#ibcon#about to write, iclass 18, count 2 2006.229.14:18:35.92#ibcon#wrote, iclass 18, count 2 2006.229.14:18:35.92#ibcon#about to read 3, iclass 18, count 2 2006.229.14:18:35.94#ibcon#read 3, iclass 18, count 2 2006.229.14:18:35.94#ibcon#about to read 4, iclass 18, count 2 2006.229.14:18:35.94#ibcon#read 4, iclass 18, count 2 2006.229.14:18:35.94#ibcon#about to read 5, iclass 18, count 2 2006.229.14:18:35.94#ibcon#read 5, iclass 18, count 2 2006.229.14:18:35.94#ibcon#about to read 6, iclass 18, count 2 2006.229.14:18:35.94#ibcon#read 6, iclass 18, count 2 2006.229.14:18:35.94#ibcon#end of sib2, iclass 18, count 2 2006.229.14:18:35.94#ibcon#*mode == 0, iclass 18, count 2 2006.229.14:18:35.94#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.14:18:35.94#ibcon#[25=AT03-06\r\n] 2006.229.14:18:35.94#ibcon#*before write, iclass 18, count 2 2006.229.14:18:35.94#ibcon#enter sib2, iclass 18, count 2 2006.229.14:18:35.94#ibcon#flushed, iclass 18, count 2 2006.229.14:18:35.94#ibcon#about to write, iclass 18, count 2 2006.229.14:18:35.94#ibcon#wrote, iclass 18, count 2 2006.229.14:18:35.94#ibcon#about to read 3, iclass 18, count 2 2006.229.14:18:35.97#ibcon#read 3, iclass 18, count 2 2006.229.14:18:35.97#ibcon#about to read 4, iclass 18, count 2 2006.229.14:18:35.97#ibcon#read 4, iclass 18, count 2 2006.229.14:18:35.97#ibcon#about to read 5, iclass 18, count 2 2006.229.14:18:35.97#ibcon#read 5, iclass 18, count 2 2006.229.14:18:35.97#ibcon#about to read 6, iclass 18, count 2 2006.229.14:18:35.97#ibcon#read 6, iclass 18, count 2 2006.229.14:18:35.97#ibcon#end of sib2, iclass 18, count 2 2006.229.14:18:35.97#ibcon#*after write, iclass 18, count 2 2006.229.14:18:35.97#ibcon#*before return 0, iclass 18, count 2 2006.229.14:18:35.97#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:18:35.97#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:18:35.97#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.14:18:35.97#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:35.97#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:18:36.09#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:18:36.09#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:18:36.09#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:18:36.09#ibcon#first serial, iclass 18, count 0 2006.229.14:18:36.09#ibcon#enter sib2, iclass 18, count 0 2006.229.14:18:36.09#ibcon#flushed, iclass 18, count 0 2006.229.14:18:36.09#ibcon#about to write, iclass 18, count 0 2006.229.14:18:36.09#ibcon#wrote, iclass 18, count 0 2006.229.14:18:36.09#ibcon#about to read 3, iclass 18, count 0 2006.229.14:18:36.11#ibcon#read 3, iclass 18, count 0 2006.229.14:18:36.11#ibcon#about to read 4, iclass 18, count 0 2006.229.14:18:36.11#ibcon#read 4, iclass 18, count 0 2006.229.14:18:36.11#ibcon#about to read 5, iclass 18, count 0 2006.229.14:18:36.11#ibcon#read 5, iclass 18, count 0 2006.229.14:18:36.11#ibcon#about to read 6, iclass 18, count 0 2006.229.14:18:36.11#ibcon#read 6, iclass 18, count 0 2006.229.14:18:36.11#ibcon#end of sib2, iclass 18, count 0 2006.229.14:18:36.11#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:18:36.11#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:18:36.11#ibcon#[25=USB\r\n] 2006.229.14:18:36.11#ibcon#*before write, iclass 18, count 0 2006.229.14:18:36.11#ibcon#enter sib2, iclass 18, count 0 2006.229.14:18:36.11#ibcon#flushed, iclass 18, count 0 2006.229.14:18:36.11#ibcon#about to write, iclass 18, count 0 2006.229.14:18:36.11#ibcon#wrote, iclass 18, count 0 2006.229.14:18:36.11#ibcon#about to read 3, iclass 18, count 0 2006.229.14:18:36.14#ibcon#read 3, iclass 18, count 0 2006.229.14:18:36.14#ibcon#about to read 4, iclass 18, count 0 2006.229.14:18:36.14#ibcon#read 4, iclass 18, count 0 2006.229.14:18:36.14#ibcon#about to read 5, iclass 18, count 0 2006.229.14:18:36.14#ibcon#read 5, iclass 18, count 0 2006.229.14:18:36.14#ibcon#about to read 6, iclass 18, count 0 2006.229.14:18:36.14#ibcon#read 6, iclass 18, count 0 2006.229.14:18:36.14#ibcon#end of sib2, iclass 18, count 0 2006.229.14:18:36.14#ibcon#*after write, iclass 18, count 0 2006.229.14:18:36.14#ibcon#*before return 0, iclass 18, count 0 2006.229.14:18:36.14#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:18:36.14#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:18:36.14#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:18:36.14#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:18:36.14$vck44/valo=4,624.99 2006.229.14:18:36.14#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.14:18:36.14#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.14:18:36.14#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:36.14#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:36.14#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:36.14#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:36.14#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:18:36.14#ibcon#first serial, iclass 20, count 0 2006.229.14:18:36.14#ibcon#enter sib2, iclass 20, count 0 2006.229.14:18:36.14#ibcon#flushed, iclass 20, count 0 2006.229.14:18:36.14#ibcon#about to write, iclass 20, count 0 2006.229.14:18:36.14#ibcon#wrote, iclass 20, count 0 2006.229.14:18:36.14#ibcon#about to read 3, iclass 20, count 0 2006.229.14:18:36.16#ibcon#read 3, iclass 20, count 0 2006.229.14:18:36.16#ibcon#about to read 4, iclass 20, count 0 2006.229.14:18:36.16#ibcon#read 4, iclass 20, count 0 2006.229.14:18:36.16#ibcon#about to read 5, iclass 20, count 0 2006.229.14:18:36.16#ibcon#read 5, iclass 20, count 0 2006.229.14:18:36.16#ibcon#about to read 6, iclass 20, count 0 2006.229.14:18:36.16#ibcon#read 6, iclass 20, count 0 2006.229.14:18:36.16#ibcon#end of sib2, iclass 20, count 0 2006.229.14:18:36.16#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:18:36.16#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:18:36.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:18:36.16#ibcon#*before write, iclass 20, count 0 2006.229.14:18:36.16#ibcon#enter sib2, iclass 20, count 0 2006.229.14:18:36.16#ibcon#flushed, iclass 20, count 0 2006.229.14:18:36.16#ibcon#about to write, iclass 20, count 0 2006.229.14:18:36.16#ibcon#wrote, iclass 20, count 0 2006.229.14:18:36.16#ibcon#about to read 3, iclass 20, count 0 2006.229.14:18:36.20#ibcon#read 3, iclass 20, count 0 2006.229.14:18:36.20#ibcon#about to read 4, iclass 20, count 0 2006.229.14:18:36.20#ibcon#read 4, iclass 20, count 0 2006.229.14:18:36.20#ibcon#about to read 5, iclass 20, count 0 2006.229.14:18:36.20#ibcon#read 5, iclass 20, count 0 2006.229.14:18:36.20#ibcon#about to read 6, iclass 20, count 0 2006.229.14:18:36.20#ibcon#read 6, iclass 20, count 0 2006.229.14:18:36.20#ibcon#end of sib2, iclass 20, count 0 2006.229.14:18:36.20#ibcon#*after write, iclass 20, count 0 2006.229.14:18:36.20#ibcon#*before return 0, iclass 20, count 0 2006.229.14:18:36.20#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:36.20#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:36.20#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:18:36.20#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:18:36.20$vck44/va=4,7 2006.229.14:18:36.20#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.14:18:36.20#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.14:18:36.20#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:36.20#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:36.26#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:36.26#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:36.26#ibcon#enter wrdev, iclass 22, count 2 2006.229.14:18:36.26#ibcon#first serial, iclass 22, count 2 2006.229.14:18:36.26#ibcon#enter sib2, iclass 22, count 2 2006.229.14:18:36.26#ibcon#flushed, iclass 22, count 2 2006.229.14:18:36.26#ibcon#about to write, iclass 22, count 2 2006.229.14:18:36.26#ibcon#wrote, iclass 22, count 2 2006.229.14:18:36.26#ibcon#about to read 3, iclass 22, count 2 2006.229.14:18:36.28#ibcon#read 3, iclass 22, count 2 2006.229.14:18:36.28#ibcon#about to read 4, iclass 22, count 2 2006.229.14:18:36.28#ibcon#read 4, iclass 22, count 2 2006.229.14:18:36.28#ibcon#about to read 5, iclass 22, count 2 2006.229.14:18:36.28#ibcon#read 5, iclass 22, count 2 2006.229.14:18:36.28#ibcon#about to read 6, iclass 22, count 2 2006.229.14:18:36.28#ibcon#read 6, iclass 22, count 2 2006.229.14:18:36.28#ibcon#end of sib2, iclass 22, count 2 2006.229.14:18:36.28#ibcon#*mode == 0, iclass 22, count 2 2006.229.14:18:36.28#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.14:18:36.28#ibcon#[25=AT04-07\r\n] 2006.229.14:18:36.28#ibcon#*before write, iclass 22, count 2 2006.229.14:18:36.28#ibcon#enter sib2, iclass 22, count 2 2006.229.14:18:36.28#ibcon#flushed, iclass 22, count 2 2006.229.14:18:36.28#ibcon#about to write, iclass 22, count 2 2006.229.14:18:36.28#ibcon#wrote, iclass 22, count 2 2006.229.14:18:36.28#ibcon#about to read 3, iclass 22, count 2 2006.229.14:18:36.31#ibcon#read 3, iclass 22, count 2 2006.229.14:18:36.31#ibcon#about to read 4, iclass 22, count 2 2006.229.14:18:36.31#ibcon#read 4, iclass 22, count 2 2006.229.14:18:36.31#ibcon#about to read 5, iclass 22, count 2 2006.229.14:18:36.31#ibcon#read 5, iclass 22, count 2 2006.229.14:18:36.31#ibcon#about to read 6, iclass 22, count 2 2006.229.14:18:36.31#ibcon#read 6, iclass 22, count 2 2006.229.14:18:36.31#ibcon#end of sib2, iclass 22, count 2 2006.229.14:18:36.31#ibcon#*after write, iclass 22, count 2 2006.229.14:18:36.31#ibcon#*before return 0, iclass 22, count 2 2006.229.14:18:36.31#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:36.31#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:36.31#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.14:18:36.31#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:36.31#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:36.43#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:36.43#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:36.43#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:18:36.43#ibcon#first serial, iclass 22, count 0 2006.229.14:18:36.43#ibcon#enter sib2, iclass 22, count 0 2006.229.14:18:36.43#ibcon#flushed, iclass 22, count 0 2006.229.14:18:36.43#ibcon#about to write, iclass 22, count 0 2006.229.14:18:36.43#ibcon#wrote, iclass 22, count 0 2006.229.14:18:36.43#ibcon#about to read 3, iclass 22, count 0 2006.229.14:18:36.45#ibcon#read 3, iclass 22, count 0 2006.229.14:18:36.45#ibcon#about to read 4, iclass 22, count 0 2006.229.14:18:36.45#ibcon#read 4, iclass 22, count 0 2006.229.14:18:36.45#ibcon#about to read 5, iclass 22, count 0 2006.229.14:18:36.45#ibcon#read 5, iclass 22, count 0 2006.229.14:18:36.45#ibcon#about to read 6, iclass 22, count 0 2006.229.14:18:36.45#ibcon#read 6, iclass 22, count 0 2006.229.14:18:36.45#ibcon#end of sib2, iclass 22, count 0 2006.229.14:18:36.45#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:18:36.45#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:18:36.45#ibcon#[25=USB\r\n] 2006.229.14:18:36.45#ibcon#*before write, iclass 22, count 0 2006.229.14:18:36.45#ibcon#enter sib2, iclass 22, count 0 2006.229.14:18:36.45#ibcon#flushed, iclass 22, count 0 2006.229.14:18:36.45#ibcon#about to write, iclass 22, count 0 2006.229.14:18:36.45#ibcon#wrote, iclass 22, count 0 2006.229.14:18:36.45#ibcon#about to read 3, iclass 22, count 0 2006.229.14:18:36.48#ibcon#read 3, iclass 22, count 0 2006.229.14:18:36.48#ibcon#about to read 4, iclass 22, count 0 2006.229.14:18:36.48#ibcon#read 4, iclass 22, count 0 2006.229.14:18:36.48#ibcon#about to read 5, iclass 22, count 0 2006.229.14:18:36.48#ibcon#read 5, iclass 22, count 0 2006.229.14:18:36.48#ibcon#about to read 6, iclass 22, count 0 2006.229.14:18:36.48#ibcon#read 6, iclass 22, count 0 2006.229.14:18:36.48#ibcon#end of sib2, iclass 22, count 0 2006.229.14:18:36.48#ibcon#*after write, iclass 22, count 0 2006.229.14:18:36.48#ibcon#*before return 0, iclass 22, count 0 2006.229.14:18:36.48#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:36.48#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:36.48#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:18:36.48#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:18:36.48$vck44/valo=5,734.99 2006.229.14:18:36.48#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.14:18:36.48#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.14:18:36.48#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:36.48#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:36.48#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:36.48#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:36.48#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:18:36.48#ibcon#first serial, iclass 24, count 0 2006.229.14:18:36.48#ibcon#enter sib2, iclass 24, count 0 2006.229.14:18:36.48#ibcon#flushed, iclass 24, count 0 2006.229.14:18:36.48#ibcon#about to write, iclass 24, count 0 2006.229.14:18:36.48#ibcon#wrote, iclass 24, count 0 2006.229.14:18:36.48#ibcon#about to read 3, iclass 24, count 0 2006.229.14:18:36.50#ibcon#read 3, iclass 24, count 0 2006.229.14:18:36.50#ibcon#about to read 4, iclass 24, count 0 2006.229.14:18:36.50#ibcon#read 4, iclass 24, count 0 2006.229.14:18:36.50#ibcon#about to read 5, iclass 24, count 0 2006.229.14:18:36.50#ibcon#read 5, iclass 24, count 0 2006.229.14:18:36.50#ibcon#about to read 6, iclass 24, count 0 2006.229.14:18:36.50#ibcon#read 6, iclass 24, count 0 2006.229.14:18:36.50#ibcon#end of sib2, iclass 24, count 0 2006.229.14:18:36.50#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:18:36.50#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:18:36.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:18:36.50#ibcon#*before write, iclass 24, count 0 2006.229.14:18:36.50#ibcon#enter sib2, iclass 24, count 0 2006.229.14:18:36.50#ibcon#flushed, iclass 24, count 0 2006.229.14:18:36.50#ibcon#about to write, iclass 24, count 0 2006.229.14:18:36.50#ibcon#wrote, iclass 24, count 0 2006.229.14:18:36.50#ibcon#about to read 3, iclass 24, count 0 2006.229.14:18:36.54#ibcon#read 3, iclass 24, count 0 2006.229.14:18:36.54#ibcon#about to read 4, iclass 24, count 0 2006.229.14:18:36.54#ibcon#read 4, iclass 24, count 0 2006.229.14:18:36.54#ibcon#about to read 5, iclass 24, count 0 2006.229.14:18:36.54#ibcon#read 5, iclass 24, count 0 2006.229.14:18:36.54#ibcon#about to read 6, iclass 24, count 0 2006.229.14:18:36.54#ibcon#read 6, iclass 24, count 0 2006.229.14:18:36.54#ibcon#end of sib2, iclass 24, count 0 2006.229.14:18:36.54#ibcon#*after write, iclass 24, count 0 2006.229.14:18:36.54#ibcon#*before return 0, iclass 24, count 0 2006.229.14:18:36.54#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:36.54#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:36.54#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:18:36.54#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:18:36.54$vck44/va=5,4 2006.229.14:18:36.54#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.14:18:36.54#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.14:18:36.54#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:36.54#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:36.60#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:36.60#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:36.60#ibcon#enter wrdev, iclass 26, count 2 2006.229.14:18:36.60#ibcon#first serial, iclass 26, count 2 2006.229.14:18:36.60#ibcon#enter sib2, iclass 26, count 2 2006.229.14:18:36.60#ibcon#flushed, iclass 26, count 2 2006.229.14:18:36.60#ibcon#about to write, iclass 26, count 2 2006.229.14:18:36.60#ibcon#wrote, iclass 26, count 2 2006.229.14:18:36.60#ibcon#about to read 3, iclass 26, count 2 2006.229.14:18:36.62#ibcon#read 3, iclass 26, count 2 2006.229.14:18:36.62#ibcon#about to read 4, iclass 26, count 2 2006.229.14:18:36.62#ibcon#read 4, iclass 26, count 2 2006.229.14:18:36.62#ibcon#about to read 5, iclass 26, count 2 2006.229.14:18:36.62#ibcon#read 5, iclass 26, count 2 2006.229.14:18:36.62#ibcon#about to read 6, iclass 26, count 2 2006.229.14:18:36.62#ibcon#read 6, iclass 26, count 2 2006.229.14:18:36.62#ibcon#end of sib2, iclass 26, count 2 2006.229.14:18:36.62#ibcon#*mode == 0, iclass 26, count 2 2006.229.14:18:36.62#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.14:18:36.62#ibcon#[25=AT05-04\r\n] 2006.229.14:18:36.62#ibcon#*before write, iclass 26, count 2 2006.229.14:18:36.62#ibcon#enter sib2, iclass 26, count 2 2006.229.14:18:36.62#ibcon#flushed, iclass 26, count 2 2006.229.14:18:36.62#ibcon#about to write, iclass 26, count 2 2006.229.14:18:36.62#ibcon#wrote, iclass 26, count 2 2006.229.14:18:36.62#ibcon#about to read 3, iclass 26, count 2 2006.229.14:18:36.65#ibcon#read 3, iclass 26, count 2 2006.229.14:18:36.65#ibcon#about to read 4, iclass 26, count 2 2006.229.14:18:36.65#ibcon#read 4, iclass 26, count 2 2006.229.14:18:36.65#ibcon#about to read 5, iclass 26, count 2 2006.229.14:18:36.65#ibcon#read 5, iclass 26, count 2 2006.229.14:18:36.65#ibcon#about to read 6, iclass 26, count 2 2006.229.14:18:36.65#ibcon#read 6, iclass 26, count 2 2006.229.14:18:36.65#ibcon#end of sib2, iclass 26, count 2 2006.229.14:18:36.65#ibcon#*after write, iclass 26, count 2 2006.229.14:18:36.65#ibcon#*before return 0, iclass 26, count 2 2006.229.14:18:36.65#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:36.65#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:36.65#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.14:18:36.65#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:36.65#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:36.77#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:36.77#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:36.77#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:18:36.77#ibcon#first serial, iclass 26, count 0 2006.229.14:18:36.77#ibcon#enter sib2, iclass 26, count 0 2006.229.14:18:36.77#ibcon#flushed, iclass 26, count 0 2006.229.14:18:36.77#ibcon#about to write, iclass 26, count 0 2006.229.14:18:36.77#ibcon#wrote, iclass 26, count 0 2006.229.14:18:36.77#ibcon#about to read 3, iclass 26, count 0 2006.229.14:18:36.79#ibcon#read 3, iclass 26, count 0 2006.229.14:18:36.79#ibcon#about to read 4, iclass 26, count 0 2006.229.14:18:36.79#ibcon#read 4, iclass 26, count 0 2006.229.14:18:36.79#ibcon#about to read 5, iclass 26, count 0 2006.229.14:18:36.79#ibcon#read 5, iclass 26, count 0 2006.229.14:18:36.79#ibcon#about to read 6, iclass 26, count 0 2006.229.14:18:36.79#ibcon#read 6, iclass 26, count 0 2006.229.14:18:36.79#ibcon#end of sib2, iclass 26, count 0 2006.229.14:18:36.79#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:18:36.79#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:18:36.79#ibcon#[25=USB\r\n] 2006.229.14:18:36.79#ibcon#*before write, iclass 26, count 0 2006.229.14:18:36.79#ibcon#enter sib2, iclass 26, count 0 2006.229.14:18:36.79#ibcon#flushed, iclass 26, count 0 2006.229.14:18:36.79#ibcon#about to write, iclass 26, count 0 2006.229.14:18:36.79#ibcon#wrote, iclass 26, count 0 2006.229.14:18:36.79#ibcon#about to read 3, iclass 26, count 0 2006.229.14:18:36.82#ibcon#read 3, iclass 26, count 0 2006.229.14:18:36.82#ibcon#about to read 4, iclass 26, count 0 2006.229.14:18:36.82#ibcon#read 4, iclass 26, count 0 2006.229.14:18:36.82#ibcon#about to read 5, iclass 26, count 0 2006.229.14:18:36.82#ibcon#read 5, iclass 26, count 0 2006.229.14:18:36.82#ibcon#about to read 6, iclass 26, count 0 2006.229.14:18:36.82#ibcon#read 6, iclass 26, count 0 2006.229.14:18:36.82#ibcon#end of sib2, iclass 26, count 0 2006.229.14:18:36.82#ibcon#*after write, iclass 26, count 0 2006.229.14:18:36.82#ibcon#*before return 0, iclass 26, count 0 2006.229.14:18:36.82#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:36.82#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:36.82#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:18:36.82#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:18:36.82$vck44/valo=6,814.99 2006.229.14:18:36.82#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.14:18:36.82#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.14:18:36.82#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:36.82#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:36.82#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:36.82#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:36.82#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:18:36.82#ibcon#first serial, iclass 28, count 0 2006.229.14:18:36.82#ibcon#enter sib2, iclass 28, count 0 2006.229.14:18:36.82#ibcon#flushed, iclass 28, count 0 2006.229.14:18:36.82#ibcon#about to write, iclass 28, count 0 2006.229.14:18:36.82#ibcon#wrote, iclass 28, count 0 2006.229.14:18:36.82#ibcon#about to read 3, iclass 28, count 0 2006.229.14:18:36.84#ibcon#read 3, iclass 28, count 0 2006.229.14:18:36.84#ibcon#about to read 4, iclass 28, count 0 2006.229.14:18:36.84#ibcon#read 4, iclass 28, count 0 2006.229.14:18:36.84#ibcon#about to read 5, iclass 28, count 0 2006.229.14:18:36.84#ibcon#read 5, iclass 28, count 0 2006.229.14:18:36.84#ibcon#about to read 6, iclass 28, count 0 2006.229.14:18:36.84#ibcon#read 6, iclass 28, count 0 2006.229.14:18:36.84#ibcon#end of sib2, iclass 28, count 0 2006.229.14:18:36.84#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:18:36.84#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:18:36.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:18:36.84#ibcon#*before write, iclass 28, count 0 2006.229.14:18:36.84#ibcon#enter sib2, iclass 28, count 0 2006.229.14:18:36.84#ibcon#flushed, iclass 28, count 0 2006.229.14:18:36.84#ibcon#about to write, iclass 28, count 0 2006.229.14:18:36.84#ibcon#wrote, iclass 28, count 0 2006.229.14:18:36.84#ibcon#about to read 3, iclass 28, count 0 2006.229.14:18:36.88#ibcon#read 3, iclass 28, count 0 2006.229.14:18:36.88#ibcon#about to read 4, iclass 28, count 0 2006.229.14:18:36.88#ibcon#read 4, iclass 28, count 0 2006.229.14:18:36.88#ibcon#about to read 5, iclass 28, count 0 2006.229.14:18:36.88#ibcon#read 5, iclass 28, count 0 2006.229.14:18:36.88#ibcon#about to read 6, iclass 28, count 0 2006.229.14:18:36.88#ibcon#read 6, iclass 28, count 0 2006.229.14:18:36.88#ibcon#end of sib2, iclass 28, count 0 2006.229.14:18:36.88#ibcon#*after write, iclass 28, count 0 2006.229.14:18:36.88#ibcon#*before return 0, iclass 28, count 0 2006.229.14:18:36.88#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:36.88#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:36.88#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:18:36.88#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:18:36.88$vck44/va=6,4 2006.229.14:18:36.88#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.14:18:36.88#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.14:18:36.88#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:36.88#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:36.94#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:36.94#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:36.94#ibcon#enter wrdev, iclass 30, count 2 2006.229.14:18:36.94#ibcon#first serial, iclass 30, count 2 2006.229.14:18:36.94#ibcon#enter sib2, iclass 30, count 2 2006.229.14:18:36.94#ibcon#flushed, iclass 30, count 2 2006.229.14:18:36.94#ibcon#about to write, iclass 30, count 2 2006.229.14:18:36.94#ibcon#wrote, iclass 30, count 2 2006.229.14:18:36.94#ibcon#about to read 3, iclass 30, count 2 2006.229.14:18:36.96#ibcon#read 3, iclass 30, count 2 2006.229.14:18:36.96#ibcon#about to read 4, iclass 30, count 2 2006.229.14:18:36.96#ibcon#read 4, iclass 30, count 2 2006.229.14:18:36.96#ibcon#about to read 5, iclass 30, count 2 2006.229.14:18:36.96#ibcon#read 5, iclass 30, count 2 2006.229.14:18:36.96#ibcon#about to read 6, iclass 30, count 2 2006.229.14:18:36.96#ibcon#read 6, iclass 30, count 2 2006.229.14:18:36.96#ibcon#end of sib2, iclass 30, count 2 2006.229.14:18:36.96#ibcon#*mode == 0, iclass 30, count 2 2006.229.14:18:36.96#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.14:18:36.96#ibcon#[25=AT06-04\r\n] 2006.229.14:18:36.96#ibcon#*before write, iclass 30, count 2 2006.229.14:18:36.96#ibcon#enter sib2, iclass 30, count 2 2006.229.14:18:36.96#ibcon#flushed, iclass 30, count 2 2006.229.14:18:36.96#ibcon#about to write, iclass 30, count 2 2006.229.14:18:36.96#ibcon#wrote, iclass 30, count 2 2006.229.14:18:36.96#ibcon#about to read 3, iclass 30, count 2 2006.229.14:18:36.99#ibcon#read 3, iclass 30, count 2 2006.229.14:18:36.99#ibcon#about to read 4, iclass 30, count 2 2006.229.14:18:36.99#ibcon#read 4, iclass 30, count 2 2006.229.14:18:36.99#ibcon#about to read 5, iclass 30, count 2 2006.229.14:18:36.99#ibcon#read 5, iclass 30, count 2 2006.229.14:18:36.99#ibcon#about to read 6, iclass 30, count 2 2006.229.14:18:36.99#ibcon#read 6, iclass 30, count 2 2006.229.14:18:36.99#ibcon#end of sib2, iclass 30, count 2 2006.229.14:18:36.99#ibcon#*after write, iclass 30, count 2 2006.229.14:18:36.99#ibcon#*before return 0, iclass 30, count 2 2006.229.14:18:36.99#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:36.99#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:36.99#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.14:18:36.99#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:36.99#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:37.11#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:37.11#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:37.11#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:18:37.11#ibcon#first serial, iclass 30, count 0 2006.229.14:18:37.11#ibcon#enter sib2, iclass 30, count 0 2006.229.14:18:37.11#ibcon#flushed, iclass 30, count 0 2006.229.14:18:37.11#ibcon#about to write, iclass 30, count 0 2006.229.14:18:37.11#ibcon#wrote, iclass 30, count 0 2006.229.14:18:37.11#ibcon#about to read 3, iclass 30, count 0 2006.229.14:18:37.13#ibcon#read 3, iclass 30, count 0 2006.229.14:18:37.13#ibcon#about to read 4, iclass 30, count 0 2006.229.14:18:37.13#ibcon#read 4, iclass 30, count 0 2006.229.14:18:37.13#ibcon#about to read 5, iclass 30, count 0 2006.229.14:18:37.13#ibcon#read 5, iclass 30, count 0 2006.229.14:18:37.13#ibcon#about to read 6, iclass 30, count 0 2006.229.14:18:37.13#ibcon#read 6, iclass 30, count 0 2006.229.14:18:37.13#ibcon#end of sib2, iclass 30, count 0 2006.229.14:18:37.13#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:18:37.13#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:18:37.13#ibcon#[25=USB\r\n] 2006.229.14:18:37.13#ibcon#*before write, iclass 30, count 0 2006.229.14:18:37.13#ibcon#enter sib2, iclass 30, count 0 2006.229.14:18:37.13#ibcon#flushed, iclass 30, count 0 2006.229.14:18:37.13#ibcon#about to write, iclass 30, count 0 2006.229.14:18:37.13#ibcon#wrote, iclass 30, count 0 2006.229.14:18:37.13#ibcon#about to read 3, iclass 30, count 0 2006.229.14:18:37.16#ibcon#read 3, iclass 30, count 0 2006.229.14:18:37.16#ibcon#about to read 4, iclass 30, count 0 2006.229.14:18:37.16#ibcon#read 4, iclass 30, count 0 2006.229.14:18:37.16#ibcon#about to read 5, iclass 30, count 0 2006.229.14:18:37.16#ibcon#read 5, iclass 30, count 0 2006.229.14:18:37.16#ibcon#about to read 6, iclass 30, count 0 2006.229.14:18:37.16#ibcon#read 6, iclass 30, count 0 2006.229.14:18:37.16#ibcon#end of sib2, iclass 30, count 0 2006.229.14:18:37.16#ibcon#*after write, iclass 30, count 0 2006.229.14:18:37.16#ibcon#*before return 0, iclass 30, count 0 2006.229.14:18:37.16#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:37.16#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:37.16#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:18:37.16#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:18:37.16$vck44/valo=7,864.99 2006.229.14:18:37.16#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.14:18:37.16#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.14:18:37.16#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:37.16#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:37.16#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:37.16#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:37.16#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:18:37.16#ibcon#first serial, iclass 32, count 0 2006.229.14:18:37.16#ibcon#enter sib2, iclass 32, count 0 2006.229.14:18:37.16#ibcon#flushed, iclass 32, count 0 2006.229.14:18:37.16#ibcon#about to write, iclass 32, count 0 2006.229.14:18:37.16#ibcon#wrote, iclass 32, count 0 2006.229.14:18:37.16#ibcon#about to read 3, iclass 32, count 0 2006.229.14:18:37.18#ibcon#read 3, iclass 32, count 0 2006.229.14:18:37.18#ibcon#about to read 4, iclass 32, count 0 2006.229.14:18:37.18#ibcon#read 4, iclass 32, count 0 2006.229.14:18:37.18#ibcon#about to read 5, iclass 32, count 0 2006.229.14:18:37.18#ibcon#read 5, iclass 32, count 0 2006.229.14:18:37.18#ibcon#about to read 6, iclass 32, count 0 2006.229.14:18:37.18#ibcon#read 6, iclass 32, count 0 2006.229.14:18:37.18#ibcon#end of sib2, iclass 32, count 0 2006.229.14:18:37.18#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:18:37.18#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:18:37.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:18:37.18#ibcon#*before write, iclass 32, count 0 2006.229.14:18:37.18#ibcon#enter sib2, iclass 32, count 0 2006.229.14:18:37.18#ibcon#flushed, iclass 32, count 0 2006.229.14:18:37.18#ibcon#about to write, iclass 32, count 0 2006.229.14:18:37.18#ibcon#wrote, iclass 32, count 0 2006.229.14:18:37.18#ibcon#about to read 3, iclass 32, count 0 2006.229.14:18:37.22#ibcon#read 3, iclass 32, count 0 2006.229.14:18:37.22#ibcon#about to read 4, iclass 32, count 0 2006.229.14:18:37.22#ibcon#read 4, iclass 32, count 0 2006.229.14:18:37.22#ibcon#about to read 5, iclass 32, count 0 2006.229.14:18:37.22#ibcon#read 5, iclass 32, count 0 2006.229.14:18:37.22#ibcon#about to read 6, iclass 32, count 0 2006.229.14:18:37.22#ibcon#read 6, iclass 32, count 0 2006.229.14:18:37.22#ibcon#end of sib2, iclass 32, count 0 2006.229.14:18:37.22#ibcon#*after write, iclass 32, count 0 2006.229.14:18:37.22#ibcon#*before return 0, iclass 32, count 0 2006.229.14:18:37.22#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:37.22#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:37.22#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:18:37.22#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:18:37.22$vck44/va=7,5 2006.229.14:18:37.22#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.14:18:37.22#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.14:18:37.22#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:37.22#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:37.28#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:37.28#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:37.28#ibcon#enter wrdev, iclass 34, count 2 2006.229.14:18:37.28#ibcon#first serial, iclass 34, count 2 2006.229.14:18:37.28#ibcon#enter sib2, iclass 34, count 2 2006.229.14:18:37.28#ibcon#flushed, iclass 34, count 2 2006.229.14:18:37.28#ibcon#about to write, iclass 34, count 2 2006.229.14:18:37.28#ibcon#wrote, iclass 34, count 2 2006.229.14:18:37.28#ibcon#about to read 3, iclass 34, count 2 2006.229.14:18:37.30#ibcon#read 3, iclass 34, count 2 2006.229.14:18:37.30#ibcon#about to read 4, iclass 34, count 2 2006.229.14:18:37.30#ibcon#read 4, iclass 34, count 2 2006.229.14:18:37.30#ibcon#about to read 5, iclass 34, count 2 2006.229.14:18:37.30#ibcon#read 5, iclass 34, count 2 2006.229.14:18:37.30#ibcon#about to read 6, iclass 34, count 2 2006.229.14:18:37.30#ibcon#read 6, iclass 34, count 2 2006.229.14:18:37.30#ibcon#end of sib2, iclass 34, count 2 2006.229.14:18:37.30#ibcon#*mode == 0, iclass 34, count 2 2006.229.14:18:37.30#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.14:18:37.30#ibcon#[25=AT07-05\r\n] 2006.229.14:18:37.30#ibcon#*before write, iclass 34, count 2 2006.229.14:18:37.30#ibcon#enter sib2, iclass 34, count 2 2006.229.14:18:37.30#ibcon#flushed, iclass 34, count 2 2006.229.14:18:37.30#ibcon#about to write, iclass 34, count 2 2006.229.14:18:37.30#ibcon#wrote, iclass 34, count 2 2006.229.14:18:37.30#ibcon#about to read 3, iclass 34, count 2 2006.229.14:18:37.33#ibcon#read 3, iclass 34, count 2 2006.229.14:18:37.33#ibcon#about to read 4, iclass 34, count 2 2006.229.14:18:37.33#ibcon#read 4, iclass 34, count 2 2006.229.14:18:37.33#ibcon#about to read 5, iclass 34, count 2 2006.229.14:18:37.33#ibcon#read 5, iclass 34, count 2 2006.229.14:18:37.33#ibcon#about to read 6, iclass 34, count 2 2006.229.14:18:37.33#ibcon#read 6, iclass 34, count 2 2006.229.14:18:37.33#ibcon#end of sib2, iclass 34, count 2 2006.229.14:18:37.33#ibcon#*after write, iclass 34, count 2 2006.229.14:18:37.33#ibcon#*before return 0, iclass 34, count 2 2006.229.14:18:37.33#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:37.33#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:37.33#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.14:18:37.33#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:37.33#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:37.45#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:37.45#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:37.45#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:18:37.45#ibcon#first serial, iclass 34, count 0 2006.229.14:18:37.45#ibcon#enter sib2, iclass 34, count 0 2006.229.14:18:37.45#ibcon#flushed, iclass 34, count 0 2006.229.14:18:37.45#ibcon#about to write, iclass 34, count 0 2006.229.14:18:37.45#ibcon#wrote, iclass 34, count 0 2006.229.14:18:37.45#ibcon#about to read 3, iclass 34, count 0 2006.229.14:18:37.47#ibcon#read 3, iclass 34, count 0 2006.229.14:18:37.47#ibcon#about to read 4, iclass 34, count 0 2006.229.14:18:37.47#ibcon#read 4, iclass 34, count 0 2006.229.14:18:37.47#ibcon#about to read 5, iclass 34, count 0 2006.229.14:18:37.47#ibcon#read 5, iclass 34, count 0 2006.229.14:18:37.47#ibcon#about to read 6, iclass 34, count 0 2006.229.14:18:37.47#ibcon#read 6, iclass 34, count 0 2006.229.14:18:37.47#ibcon#end of sib2, iclass 34, count 0 2006.229.14:18:37.47#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:18:37.47#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:18:37.47#ibcon#[25=USB\r\n] 2006.229.14:18:37.47#ibcon#*before write, iclass 34, count 0 2006.229.14:18:37.47#ibcon#enter sib2, iclass 34, count 0 2006.229.14:18:37.47#ibcon#flushed, iclass 34, count 0 2006.229.14:18:37.47#ibcon#about to write, iclass 34, count 0 2006.229.14:18:37.47#ibcon#wrote, iclass 34, count 0 2006.229.14:18:37.47#ibcon#about to read 3, iclass 34, count 0 2006.229.14:18:37.50#ibcon#read 3, iclass 34, count 0 2006.229.14:18:37.50#ibcon#about to read 4, iclass 34, count 0 2006.229.14:18:37.50#ibcon#read 4, iclass 34, count 0 2006.229.14:18:37.50#ibcon#about to read 5, iclass 34, count 0 2006.229.14:18:37.50#ibcon#read 5, iclass 34, count 0 2006.229.14:18:37.50#ibcon#about to read 6, iclass 34, count 0 2006.229.14:18:37.50#ibcon#read 6, iclass 34, count 0 2006.229.14:18:37.50#ibcon#end of sib2, iclass 34, count 0 2006.229.14:18:37.50#ibcon#*after write, iclass 34, count 0 2006.229.14:18:37.50#ibcon#*before return 0, iclass 34, count 0 2006.229.14:18:37.50#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:37.50#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:37.50#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:18:37.50#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:18:37.50$vck44/valo=8,884.99 2006.229.14:18:37.50#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.14:18:37.50#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.14:18:37.50#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:37.50#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:37.50#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:37.50#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:37.50#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:18:37.50#ibcon#first serial, iclass 36, count 0 2006.229.14:18:37.50#ibcon#enter sib2, iclass 36, count 0 2006.229.14:18:37.50#ibcon#flushed, iclass 36, count 0 2006.229.14:18:37.50#ibcon#about to write, iclass 36, count 0 2006.229.14:18:37.50#ibcon#wrote, iclass 36, count 0 2006.229.14:18:37.50#ibcon#about to read 3, iclass 36, count 0 2006.229.14:18:37.52#ibcon#read 3, iclass 36, count 0 2006.229.14:18:37.52#ibcon#about to read 4, iclass 36, count 0 2006.229.14:18:37.52#ibcon#read 4, iclass 36, count 0 2006.229.14:18:37.52#ibcon#about to read 5, iclass 36, count 0 2006.229.14:18:37.52#ibcon#read 5, iclass 36, count 0 2006.229.14:18:37.52#ibcon#about to read 6, iclass 36, count 0 2006.229.14:18:37.52#ibcon#read 6, iclass 36, count 0 2006.229.14:18:37.52#ibcon#end of sib2, iclass 36, count 0 2006.229.14:18:37.52#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:18:37.52#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:18:37.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:18:37.52#ibcon#*before write, iclass 36, count 0 2006.229.14:18:37.52#ibcon#enter sib2, iclass 36, count 0 2006.229.14:18:37.52#ibcon#flushed, iclass 36, count 0 2006.229.14:18:37.52#ibcon#about to write, iclass 36, count 0 2006.229.14:18:37.52#ibcon#wrote, iclass 36, count 0 2006.229.14:18:37.52#ibcon#about to read 3, iclass 36, count 0 2006.229.14:18:37.56#ibcon#read 3, iclass 36, count 0 2006.229.14:18:37.56#ibcon#about to read 4, iclass 36, count 0 2006.229.14:18:37.56#ibcon#read 4, iclass 36, count 0 2006.229.14:18:37.56#ibcon#about to read 5, iclass 36, count 0 2006.229.14:18:37.56#ibcon#read 5, iclass 36, count 0 2006.229.14:18:37.56#ibcon#about to read 6, iclass 36, count 0 2006.229.14:18:37.56#ibcon#read 6, iclass 36, count 0 2006.229.14:18:37.56#ibcon#end of sib2, iclass 36, count 0 2006.229.14:18:37.56#ibcon#*after write, iclass 36, count 0 2006.229.14:18:37.56#ibcon#*before return 0, iclass 36, count 0 2006.229.14:18:37.56#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:37.56#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:37.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:18:37.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:18:37.56$vck44/va=8,6 2006.229.14:18:37.56#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.14:18:37.56#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.14:18:37.56#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:37.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:37.62#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:37.62#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:37.62#ibcon#enter wrdev, iclass 38, count 2 2006.229.14:18:37.62#ibcon#first serial, iclass 38, count 2 2006.229.14:18:37.62#ibcon#enter sib2, iclass 38, count 2 2006.229.14:18:37.62#ibcon#flushed, iclass 38, count 2 2006.229.14:18:37.62#ibcon#about to write, iclass 38, count 2 2006.229.14:18:37.62#ibcon#wrote, iclass 38, count 2 2006.229.14:18:37.62#ibcon#about to read 3, iclass 38, count 2 2006.229.14:18:37.64#ibcon#read 3, iclass 38, count 2 2006.229.14:18:37.64#ibcon#about to read 4, iclass 38, count 2 2006.229.14:18:37.64#ibcon#read 4, iclass 38, count 2 2006.229.14:18:37.64#ibcon#about to read 5, iclass 38, count 2 2006.229.14:18:37.64#ibcon#read 5, iclass 38, count 2 2006.229.14:18:37.64#ibcon#about to read 6, iclass 38, count 2 2006.229.14:18:37.64#ibcon#read 6, iclass 38, count 2 2006.229.14:18:37.64#ibcon#end of sib2, iclass 38, count 2 2006.229.14:18:37.64#ibcon#*mode == 0, iclass 38, count 2 2006.229.14:18:37.64#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.14:18:37.64#ibcon#[25=AT08-06\r\n] 2006.229.14:18:37.64#ibcon#*before write, iclass 38, count 2 2006.229.14:18:37.64#ibcon#enter sib2, iclass 38, count 2 2006.229.14:18:37.64#ibcon#flushed, iclass 38, count 2 2006.229.14:18:37.64#ibcon#about to write, iclass 38, count 2 2006.229.14:18:37.64#ibcon#wrote, iclass 38, count 2 2006.229.14:18:37.64#ibcon#about to read 3, iclass 38, count 2 2006.229.14:18:37.67#ibcon#read 3, iclass 38, count 2 2006.229.14:18:37.67#ibcon#about to read 4, iclass 38, count 2 2006.229.14:18:37.67#ibcon#read 4, iclass 38, count 2 2006.229.14:18:37.67#ibcon#about to read 5, iclass 38, count 2 2006.229.14:18:37.67#ibcon#read 5, iclass 38, count 2 2006.229.14:18:37.67#ibcon#about to read 6, iclass 38, count 2 2006.229.14:18:37.67#ibcon#read 6, iclass 38, count 2 2006.229.14:18:37.67#ibcon#end of sib2, iclass 38, count 2 2006.229.14:18:37.67#ibcon#*after write, iclass 38, count 2 2006.229.14:18:37.67#ibcon#*before return 0, iclass 38, count 2 2006.229.14:18:37.67#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:37.67#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:37.67#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.14:18:37.67#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:37.67#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:37.79#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:37.79#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:37.79#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:18:37.79#ibcon#first serial, iclass 38, count 0 2006.229.14:18:37.79#ibcon#enter sib2, iclass 38, count 0 2006.229.14:18:37.79#ibcon#flushed, iclass 38, count 0 2006.229.14:18:37.79#ibcon#about to write, iclass 38, count 0 2006.229.14:18:37.79#ibcon#wrote, iclass 38, count 0 2006.229.14:18:37.79#ibcon#about to read 3, iclass 38, count 0 2006.229.14:18:37.81#ibcon#read 3, iclass 38, count 0 2006.229.14:18:37.81#ibcon#about to read 4, iclass 38, count 0 2006.229.14:18:37.81#ibcon#read 4, iclass 38, count 0 2006.229.14:18:37.81#ibcon#about to read 5, iclass 38, count 0 2006.229.14:18:37.81#ibcon#read 5, iclass 38, count 0 2006.229.14:18:37.81#ibcon#about to read 6, iclass 38, count 0 2006.229.14:18:37.81#ibcon#read 6, iclass 38, count 0 2006.229.14:18:37.81#ibcon#end of sib2, iclass 38, count 0 2006.229.14:18:37.81#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:18:37.81#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:18:37.81#ibcon#[25=USB\r\n] 2006.229.14:18:37.81#ibcon#*before write, iclass 38, count 0 2006.229.14:18:37.81#ibcon#enter sib2, iclass 38, count 0 2006.229.14:18:37.81#ibcon#flushed, iclass 38, count 0 2006.229.14:18:37.81#ibcon#about to write, iclass 38, count 0 2006.229.14:18:37.81#ibcon#wrote, iclass 38, count 0 2006.229.14:18:37.81#ibcon#about to read 3, iclass 38, count 0 2006.229.14:18:37.84#ibcon#read 3, iclass 38, count 0 2006.229.14:18:37.84#ibcon#about to read 4, iclass 38, count 0 2006.229.14:18:37.84#ibcon#read 4, iclass 38, count 0 2006.229.14:18:37.84#ibcon#about to read 5, iclass 38, count 0 2006.229.14:18:37.84#ibcon#read 5, iclass 38, count 0 2006.229.14:18:37.84#ibcon#about to read 6, iclass 38, count 0 2006.229.14:18:37.84#ibcon#read 6, iclass 38, count 0 2006.229.14:18:37.84#ibcon#end of sib2, iclass 38, count 0 2006.229.14:18:37.84#ibcon#*after write, iclass 38, count 0 2006.229.14:18:37.84#ibcon#*before return 0, iclass 38, count 0 2006.229.14:18:37.84#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:37.84#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:37.84#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:18:37.84#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:18:37.84$vck44/vblo=1,629.99 2006.229.14:18:37.84#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.14:18:37.84#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.14:18:37.84#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:37.84#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:37.84#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:37.84#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:37.84#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:18:37.84#ibcon#first serial, iclass 40, count 0 2006.229.14:18:37.84#ibcon#enter sib2, iclass 40, count 0 2006.229.14:18:37.84#ibcon#flushed, iclass 40, count 0 2006.229.14:18:37.84#ibcon#about to write, iclass 40, count 0 2006.229.14:18:37.84#ibcon#wrote, iclass 40, count 0 2006.229.14:18:37.84#ibcon#about to read 3, iclass 40, count 0 2006.229.14:18:37.86#ibcon#read 3, iclass 40, count 0 2006.229.14:18:37.86#ibcon#about to read 4, iclass 40, count 0 2006.229.14:18:37.86#ibcon#read 4, iclass 40, count 0 2006.229.14:18:37.86#ibcon#about to read 5, iclass 40, count 0 2006.229.14:18:37.86#ibcon#read 5, iclass 40, count 0 2006.229.14:18:37.86#ibcon#about to read 6, iclass 40, count 0 2006.229.14:18:37.86#ibcon#read 6, iclass 40, count 0 2006.229.14:18:37.86#ibcon#end of sib2, iclass 40, count 0 2006.229.14:18:37.86#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:18:37.86#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:18:37.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:18:37.86#ibcon#*before write, iclass 40, count 0 2006.229.14:18:37.86#ibcon#enter sib2, iclass 40, count 0 2006.229.14:18:37.86#ibcon#flushed, iclass 40, count 0 2006.229.14:18:37.86#ibcon#about to write, iclass 40, count 0 2006.229.14:18:37.86#ibcon#wrote, iclass 40, count 0 2006.229.14:18:37.86#ibcon#about to read 3, iclass 40, count 0 2006.229.14:18:37.90#ibcon#read 3, iclass 40, count 0 2006.229.14:18:37.90#ibcon#about to read 4, iclass 40, count 0 2006.229.14:18:37.90#ibcon#read 4, iclass 40, count 0 2006.229.14:18:37.90#ibcon#about to read 5, iclass 40, count 0 2006.229.14:18:37.90#ibcon#read 5, iclass 40, count 0 2006.229.14:18:37.90#ibcon#about to read 6, iclass 40, count 0 2006.229.14:18:37.90#ibcon#read 6, iclass 40, count 0 2006.229.14:18:37.90#ibcon#end of sib2, iclass 40, count 0 2006.229.14:18:37.90#ibcon#*after write, iclass 40, count 0 2006.229.14:18:37.90#ibcon#*before return 0, iclass 40, count 0 2006.229.14:18:37.90#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:37.90#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:37.90#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:18:37.90#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:18:37.90$vck44/vb=1,4 2006.229.14:18:37.90#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.14:18:37.90#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.14:18:37.90#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:37.90#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:18:37.90#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:18:37.90#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:18:37.90#ibcon#enter wrdev, iclass 4, count 2 2006.229.14:18:37.90#ibcon#first serial, iclass 4, count 2 2006.229.14:18:37.90#ibcon#enter sib2, iclass 4, count 2 2006.229.14:18:37.90#ibcon#flushed, iclass 4, count 2 2006.229.14:18:37.90#ibcon#about to write, iclass 4, count 2 2006.229.14:18:37.90#ibcon#wrote, iclass 4, count 2 2006.229.14:18:37.90#ibcon#about to read 3, iclass 4, count 2 2006.229.14:18:37.92#ibcon#read 3, iclass 4, count 2 2006.229.14:18:37.92#ibcon#about to read 4, iclass 4, count 2 2006.229.14:18:37.92#ibcon#read 4, iclass 4, count 2 2006.229.14:18:37.92#ibcon#about to read 5, iclass 4, count 2 2006.229.14:18:37.92#ibcon#read 5, iclass 4, count 2 2006.229.14:18:37.92#ibcon#about to read 6, iclass 4, count 2 2006.229.14:18:37.92#ibcon#read 6, iclass 4, count 2 2006.229.14:18:37.92#ibcon#end of sib2, iclass 4, count 2 2006.229.14:18:37.92#ibcon#*mode == 0, iclass 4, count 2 2006.229.14:18:37.92#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.14:18:37.92#ibcon#[27=AT01-04\r\n] 2006.229.14:18:37.92#ibcon#*before write, iclass 4, count 2 2006.229.14:18:37.92#ibcon#enter sib2, iclass 4, count 2 2006.229.14:18:37.92#ibcon#flushed, iclass 4, count 2 2006.229.14:18:37.92#ibcon#about to write, iclass 4, count 2 2006.229.14:18:37.92#ibcon#wrote, iclass 4, count 2 2006.229.14:18:37.92#ibcon#about to read 3, iclass 4, count 2 2006.229.14:18:37.95#ibcon#read 3, iclass 4, count 2 2006.229.14:18:37.95#ibcon#about to read 4, iclass 4, count 2 2006.229.14:18:37.95#ibcon#read 4, iclass 4, count 2 2006.229.14:18:37.95#ibcon#about to read 5, iclass 4, count 2 2006.229.14:18:37.95#ibcon#read 5, iclass 4, count 2 2006.229.14:18:37.95#ibcon#about to read 6, iclass 4, count 2 2006.229.14:18:37.95#ibcon#read 6, iclass 4, count 2 2006.229.14:18:37.95#ibcon#end of sib2, iclass 4, count 2 2006.229.14:18:37.95#ibcon#*after write, iclass 4, count 2 2006.229.14:18:37.95#ibcon#*before return 0, iclass 4, count 2 2006.229.14:18:37.95#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:18:37.95#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:18:37.95#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.14:18:37.95#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:37.95#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:18:38.07#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:18:38.07#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:18:38.07#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:18:38.07#ibcon#first serial, iclass 4, count 0 2006.229.14:18:38.07#ibcon#enter sib2, iclass 4, count 0 2006.229.14:18:38.07#ibcon#flushed, iclass 4, count 0 2006.229.14:18:38.07#ibcon#about to write, iclass 4, count 0 2006.229.14:18:38.07#ibcon#wrote, iclass 4, count 0 2006.229.14:18:38.07#ibcon#about to read 3, iclass 4, count 0 2006.229.14:18:38.09#ibcon#read 3, iclass 4, count 0 2006.229.14:18:38.09#ibcon#about to read 4, iclass 4, count 0 2006.229.14:18:38.09#ibcon#read 4, iclass 4, count 0 2006.229.14:18:38.09#ibcon#about to read 5, iclass 4, count 0 2006.229.14:18:38.09#ibcon#read 5, iclass 4, count 0 2006.229.14:18:38.09#ibcon#about to read 6, iclass 4, count 0 2006.229.14:18:38.09#ibcon#read 6, iclass 4, count 0 2006.229.14:18:38.09#ibcon#end of sib2, iclass 4, count 0 2006.229.14:18:38.09#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:18:38.09#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:18:38.09#ibcon#[27=USB\r\n] 2006.229.14:18:38.09#ibcon#*before write, iclass 4, count 0 2006.229.14:18:38.09#ibcon#enter sib2, iclass 4, count 0 2006.229.14:18:38.09#ibcon#flushed, iclass 4, count 0 2006.229.14:18:38.09#ibcon#about to write, iclass 4, count 0 2006.229.14:18:38.09#ibcon#wrote, iclass 4, count 0 2006.229.14:18:38.09#ibcon#about to read 3, iclass 4, count 0 2006.229.14:18:38.12#ibcon#read 3, iclass 4, count 0 2006.229.14:18:38.12#ibcon#about to read 4, iclass 4, count 0 2006.229.14:18:38.12#ibcon#read 4, iclass 4, count 0 2006.229.14:18:38.12#ibcon#about to read 5, iclass 4, count 0 2006.229.14:18:38.12#ibcon#read 5, iclass 4, count 0 2006.229.14:18:38.12#ibcon#about to read 6, iclass 4, count 0 2006.229.14:18:38.12#ibcon#read 6, iclass 4, count 0 2006.229.14:18:38.12#ibcon#end of sib2, iclass 4, count 0 2006.229.14:18:38.12#ibcon#*after write, iclass 4, count 0 2006.229.14:18:38.12#ibcon#*before return 0, iclass 4, count 0 2006.229.14:18:38.12#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:18:38.12#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:18:38.12#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:18:38.12#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:18:38.12$vck44/vblo=2,634.99 2006.229.14:18:38.12#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.14:18:38.12#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.14:18:38.12#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:38.12#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:38.12#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:38.12#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:38.12#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:18:38.12#ibcon#first serial, iclass 6, count 0 2006.229.14:18:38.12#ibcon#enter sib2, iclass 6, count 0 2006.229.14:18:38.12#ibcon#flushed, iclass 6, count 0 2006.229.14:18:38.12#ibcon#about to write, iclass 6, count 0 2006.229.14:18:38.12#ibcon#wrote, iclass 6, count 0 2006.229.14:18:38.12#ibcon#about to read 3, iclass 6, count 0 2006.229.14:18:38.14#ibcon#read 3, iclass 6, count 0 2006.229.14:18:38.14#ibcon#about to read 4, iclass 6, count 0 2006.229.14:18:38.14#ibcon#read 4, iclass 6, count 0 2006.229.14:18:38.14#ibcon#about to read 5, iclass 6, count 0 2006.229.14:18:38.14#ibcon#read 5, iclass 6, count 0 2006.229.14:18:38.14#ibcon#about to read 6, iclass 6, count 0 2006.229.14:18:38.14#ibcon#read 6, iclass 6, count 0 2006.229.14:18:38.14#ibcon#end of sib2, iclass 6, count 0 2006.229.14:18:38.14#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:18:38.14#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:18:38.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:18:38.14#ibcon#*before write, iclass 6, count 0 2006.229.14:18:38.14#ibcon#enter sib2, iclass 6, count 0 2006.229.14:18:38.14#ibcon#flushed, iclass 6, count 0 2006.229.14:18:38.14#ibcon#about to write, iclass 6, count 0 2006.229.14:18:38.14#ibcon#wrote, iclass 6, count 0 2006.229.14:18:38.14#ibcon#about to read 3, iclass 6, count 0 2006.229.14:18:38.18#ibcon#read 3, iclass 6, count 0 2006.229.14:18:38.18#ibcon#about to read 4, iclass 6, count 0 2006.229.14:18:38.18#ibcon#read 4, iclass 6, count 0 2006.229.14:18:38.18#ibcon#about to read 5, iclass 6, count 0 2006.229.14:18:38.18#ibcon#read 5, iclass 6, count 0 2006.229.14:18:38.18#ibcon#about to read 6, iclass 6, count 0 2006.229.14:18:38.18#ibcon#read 6, iclass 6, count 0 2006.229.14:18:38.18#ibcon#end of sib2, iclass 6, count 0 2006.229.14:18:38.18#ibcon#*after write, iclass 6, count 0 2006.229.14:18:38.18#ibcon#*before return 0, iclass 6, count 0 2006.229.14:18:38.18#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:38.18#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:18:38.18#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:18:38.18#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:18:38.18$vck44/vb=2,4 2006.229.14:18:38.18#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.14:18:38.18#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.14:18:38.18#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:38.18#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:38.24#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:38.24#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:38.24#ibcon#enter wrdev, iclass 10, count 2 2006.229.14:18:38.24#ibcon#first serial, iclass 10, count 2 2006.229.14:18:38.24#ibcon#enter sib2, iclass 10, count 2 2006.229.14:18:38.24#ibcon#flushed, iclass 10, count 2 2006.229.14:18:38.24#ibcon#about to write, iclass 10, count 2 2006.229.14:18:38.24#ibcon#wrote, iclass 10, count 2 2006.229.14:18:38.24#ibcon#about to read 3, iclass 10, count 2 2006.229.14:18:38.26#ibcon#read 3, iclass 10, count 2 2006.229.14:18:38.26#ibcon#about to read 4, iclass 10, count 2 2006.229.14:18:38.26#ibcon#read 4, iclass 10, count 2 2006.229.14:18:38.26#ibcon#about to read 5, iclass 10, count 2 2006.229.14:18:38.26#ibcon#read 5, iclass 10, count 2 2006.229.14:18:38.26#ibcon#about to read 6, iclass 10, count 2 2006.229.14:18:38.26#ibcon#read 6, iclass 10, count 2 2006.229.14:18:38.26#ibcon#end of sib2, iclass 10, count 2 2006.229.14:18:38.26#ibcon#*mode == 0, iclass 10, count 2 2006.229.14:18:38.26#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.14:18:38.26#ibcon#[27=AT02-04\r\n] 2006.229.14:18:38.26#ibcon#*before write, iclass 10, count 2 2006.229.14:18:38.26#ibcon#enter sib2, iclass 10, count 2 2006.229.14:18:38.26#ibcon#flushed, iclass 10, count 2 2006.229.14:18:38.26#ibcon#about to write, iclass 10, count 2 2006.229.14:18:38.26#ibcon#wrote, iclass 10, count 2 2006.229.14:18:38.26#ibcon#about to read 3, iclass 10, count 2 2006.229.14:18:38.29#ibcon#read 3, iclass 10, count 2 2006.229.14:18:38.29#ibcon#about to read 4, iclass 10, count 2 2006.229.14:18:38.29#ibcon#read 4, iclass 10, count 2 2006.229.14:18:38.29#ibcon#about to read 5, iclass 10, count 2 2006.229.14:18:38.29#ibcon#read 5, iclass 10, count 2 2006.229.14:18:38.29#ibcon#about to read 6, iclass 10, count 2 2006.229.14:18:38.29#ibcon#read 6, iclass 10, count 2 2006.229.14:18:38.29#ibcon#end of sib2, iclass 10, count 2 2006.229.14:18:38.29#ibcon#*after write, iclass 10, count 2 2006.229.14:18:38.29#ibcon#*before return 0, iclass 10, count 2 2006.229.14:18:38.29#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:38.29#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:18:38.29#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.14:18:38.29#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:38.29#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:38.41#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:38.41#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:38.41#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:18:38.41#ibcon#first serial, iclass 10, count 0 2006.229.14:18:38.41#ibcon#enter sib2, iclass 10, count 0 2006.229.14:18:38.41#ibcon#flushed, iclass 10, count 0 2006.229.14:18:38.41#ibcon#about to write, iclass 10, count 0 2006.229.14:18:38.41#ibcon#wrote, iclass 10, count 0 2006.229.14:18:38.41#ibcon#about to read 3, iclass 10, count 0 2006.229.14:18:38.43#ibcon#read 3, iclass 10, count 0 2006.229.14:18:38.43#ibcon#about to read 4, iclass 10, count 0 2006.229.14:18:38.43#ibcon#read 4, iclass 10, count 0 2006.229.14:18:38.43#ibcon#about to read 5, iclass 10, count 0 2006.229.14:18:38.43#ibcon#read 5, iclass 10, count 0 2006.229.14:18:38.43#ibcon#about to read 6, iclass 10, count 0 2006.229.14:18:38.43#ibcon#read 6, iclass 10, count 0 2006.229.14:18:38.43#ibcon#end of sib2, iclass 10, count 0 2006.229.14:18:38.43#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:18:38.43#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:18:38.43#ibcon#[27=USB\r\n] 2006.229.14:18:38.43#ibcon#*before write, iclass 10, count 0 2006.229.14:18:38.43#ibcon#enter sib2, iclass 10, count 0 2006.229.14:18:38.43#ibcon#flushed, iclass 10, count 0 2006.229.14:18:38.43#ibcon#about to write, iclass 10, count 0 2006.229.14:18:38.43#ibcon#wrote, iclass 10, count 0 2006.229.14:18:38.43#ibcon#about to read 3, iclass 10, count 0 2006.229.14:18:38.46#ibcon#read 3, iclass 10, count 0 2006.229.14:18:38.46#ibcon#about to read 4, iclass 10, count 0 2006.229.14:18:38.46#ibcon#read 4, iclass 10, count 0 2006.229.14:18:38.46#ibcon#about to read 5, iclass 10, count 0 2006.229.14:18:38.46#ibcon#read 5, iclass 10, count 0 2006.229.14:18:38.46#ibcon#about to read 6, iclass 10, count 0 2006.229.14:18:38.46#ibcon#read 6, iclass 10, count 0 2006.229.14:18:38.46#ibcon#end of sib2, iclass 10, count 0 2006.229.14:18:38.46#ibcon#*after write, iclass 10, count 0 2006.229.14:18:38.46#ibcon#*before return 0, iclass 10, count 0 2006.229.14:18:38.46#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:38.46#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:18:38.46#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:18:38.46#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:18:38.46$vck44/vblo=3,649.99 2006.229.14:18:38.46#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.14:18:38.46#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.14:18:38.46#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:38.46#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:38.46#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:38.46#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:38.46#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:18:38.46#ibcon#first serial, iclass 12, count 0 2006.229.14:18:38.46#ibcon#enter sib2, iclass 12, count 0 2006.229.14:18:38.46#ibcon#flushed, iclass 12, count 0 2006.229.14:18:38.46#ibcon#about to write, iclass 12, count 0 2006.229.14:18:38.46#ibcon#wrote, iclass 12, count 0 2006.229.14:18:38.46#ibcon#about to read 3, iclass 12, count 0 2006.229.14:18:38.48#ibcon#read 3, iclass 12, count 0 2006.229.14:18:38.48#ibcon#about to read 4, iclass 12, count 0 2006.229.14:18:38.48#ibcon#read 4, iclass 12, count 0 2006.229.14:18:38.48#ibcon#about to read 5, iclass 12, count 0 2006.229.14:18:38.48#ibcon#read 5, iclass 12, count 0 2006.229.14:18:38.48#ibcon#about to read 6, iclass 12, count 0 2006.229.14:18:38.48#ibcon#read 6, iclass 12, count 0 2006.229.14:18:38.48#ibcon#end of sib2, iclass 12, count 0 2006.229.14:18:38.48#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:18:38.48#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:18:38.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:18:38.48#ibcon#*before write, iclass 12, count 0 2006.229.14:18:38.48#ibcon#enter sib2, iclass 12, count 0 2006.229.14:18:38.48#ibcon#flushed, iclass 12, count 0 2006.229.14:18:38.48#ibcon#about to write, iclass 12, count 0 2006.229.14:18:38.48#ibcon#wrote, iclass 12, count 0 2006.229.14:18:38.48#ibcon#about to read 3, iclass 12, count 0 2006.229.14:18:38.52#ibcon#read 3, iclass 12, count 0 2006.229.14:18:38.52#ibcon#about to read 4, iclass 12, count 0 2006.229.14:18:38.52#ibcon#read 4, iclass 12, count 0 2006.229.14:18:38.52#ibcon#about to read 5, iclass 12, count 0 2006.229.14:18:38.52#ibcon#read 5, iclass 12, count 0 2006.229.14:18:38.52#ibcon#about to read 6, iclass 12, count 0 2006.229.14:18:38.52#ibcon#read 6, iclass 12, count 0 2006.229.14:18:38.52#ibcon#end of sib2, iclass 12, count 0 2006.229.14:18:38.52#ibcon#*after write, iclass 12, count 0 2006.229.14:18:38.52#ibcon#*before return 0, iclass 12, count 0 2006.229.14:18:38.52#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:38.52#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:18:38.52#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:18:38.52#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:18:38.52$vck44/vb=3,4 2006.229.14:18:38.52#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.14:18:38.52#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.14:18:38.52#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:38.52#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:18:38.55#abcon#<5=/06 1.4 2.3 27.511001002.1\r\n> 2006.229.14:18:38.57#abcon#{5=INTERFACE CLEAR} 2006.229.14:18:38.58#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:18:38.58#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:18:38.58#ibcon#enter wrdev, iclass 15, count 2 2006.229.14:18:38.58#ibcon#first serial, iclass 15, count 2 2006.229.14:18:38.58#ibcon#enter sib2, iclass 15, count 2 2006.229.14:18:38.58#ibcon#flushed, iclass 15, count 2 2006.229.14:18:38.58#ibcon#about to write, iclass 15, count 2 2006.229.14:18:38.58#ibcon#wrote, iclass 15, count 2 2006.229.14:18:38.58#ibcon#about to read 3, iclass 15, count 2 2006.229.14:18:38.60#ibcon#read 3, iclass 15, count 2 2006.229.14:18:38.60#ibcon#about to read 4, iclass 15, count 2 2006.229.14:18:38.60#ibcon#read 4, iclass 15, count 2 2006.229.14:18:38.60#ibcon#about to read 5, iclass 15, count 2 2006.229.14:18:38.60#ibcon#read 5, iclass 15, count 2 2006.229.14:18:38.60#ibcon#about to read 6, iclass 15, count 2 2006.229.14:18:38.60#ibcon#read 6, iclass 15, count 2 2006.229.14:18:38.60#ibcon#end of sib2, iclass 15, count 2 2006.229.14:18:38.60#ibcon#*mode == 0, iclass 15, count 2 2006.229.14:18:38.60#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.14:18:38.60#ibcon#[27=AT03-04\r\n] 2006.229.14:18:38.60#ibcon#*before write, iclass 15, count 2 2006.229.14:18:38.60#ibcon#enter sib2, iclass 15, count 2 2006.229.14:18:38.60#ibcon#flushed, iclass 15, count 2 2006.229.14:18:38.60#ibcon#about to write, iclass 15, count 2 2006.229.14:18:38.60#ibcon#wrote, iclass 15, count 2 2006.229.14:18:38.60#ibcon#about to read 3, iclass 15, count 2 2006.229.14:18:38.63#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:18:38.63#ibcon#read 3, iclass 15, count 2 2006.229.14:18:38.63#ibcon#about to read 4, iclass 15, count 2 2006.229.14:18:38.63#ibcon#read 4, iclass 15, count 2 2006.229.14:18:38.63#ibcon#about to read 5, iclass 15, count 2 2006.229.14:18:38.63#ibcon#read 5, iclass 15, count 2 2006.229.14:18:38.63#ibcon#about to read 6, iclass 15, count 2 2006.229.14:18:38.63#ibcon#read 6, iclass 15, count 2 2006.229.14:18:38.63#ibcon#end of sib2, iclass 15, count 2 2006.229.14:18:38.63#ibcon#*after write, iclass 15, count 2 2006.229.14:18:38.63#ibcon#*before return 0, iclass 15, count 2 2006.229.14:18:38.63#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:18:38.63#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:18:38.63#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.14:18:38.63#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:38.63#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:18:38.75#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:18:38.75#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:18:38.75#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:18:38.75#ibcon#first serial, iclass 15, count 0 2006.229.14:18:38.75#ibcon#enter sib2, iclass 15, count 0 2006.229.14:18:38.75#ibcon#flushed, iclass 15, count 0 2006.229.14:18:38.75#ibcon#about to write, iclass 15, count 0 2006.229.14:18:38.75#ibcon#wrote, iclass 15, count 0 2006.229.14:18:38.75#ibcon#about to read 3, iclass 15, count 0 2006.229.14:18:38.77#ibcon#read 3, iclass 15, count 0 2006.229.14:18:38.77#ibcon#about to read 4, iclass 15, count 0 2006.229.14:18:38.77#ibcon#read 4, iclass 15, count 0 2006.229.14:18:38.77#ibcon#about to read 5, iclass 15, count 0 2006.229.14:18:38.77#ibcon#read 5, iclass 15, count 0 2006.229.14:18:38.77#ibcon#about to read 6, iclass 15, count 0 2006.229.14:18:38.77#ibcon#read 6, iclass 15, count 0 2006.229.14:18:38.77#ibcon#end of sib2, iclass 15, count 0 2006.229.14:18:38.77#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:18:38.77#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:18:38.77#ibcon#[27=USB\r\n] 2006.229.14:18:38.77#ibcon#*before write, iclass 15, count 0 2006.229.14:18:38.77#ibcon#enter sib2, iclass 15, count 0 2006.229.14:18:38.77#ibcon#flushed, iclass 15, count 0 2006.229.14:18:38.77#ibcon#about to write, iclass 15, count 0 2006.229.14:18:38.77#ibcon#wrote, iclass 15, count 0 2006.229.14:18:38.77#ibcon#about to read 3, iclass 15, count 0 2006.229.14:18:38.80#ibcon#read 3, iclass 15, count 0 2006.229.14:18:38.80#ibcon#about to read 4, iclass 15, count 0 2006.229.14:18:38.80#ibcon#read 4, iclass 15, count 0 2006.229.14:18:38.80#ibcon#about to read 5, iclass 15, count 0 2006.229.14:18:38.80#ibcon#read 5, iclass 15, count 0 2006.229.14:18:38.80#ibcon#about to read 6, iclass 15, count 0 2006.229.14:18:38.80#ibcon#read 6, iclass 15, count 0 2006.229.14:18:38.80#ibcon#end of sib2, iclass 15, count 0 2006.229.14:18:38.80#ibcon#*after write, iclass 15, count 0 2006.229.14:18:38.80#ibcon#*before return 0, iclass 15, count 0 2006.229.14:18:38.80#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:18:38.80#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:18:38.80#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:18:38.80#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:18:38.80$vck44/vblo=4,679.99 2006.229.14:18:38.80#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.14:18:38.80#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.14:18:38.80#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:38.80#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:38.80#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:38.80#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:38.80#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:18:38.80#ibcon#first serial, iclass 20, count 0 2006.229.14:18:38.80#ibcon#enter sib2, iclass 20, count 0 2006.229.14:18:38.80#ibcon#flushed, iclass 20, count 0 2006.229.14:18:38.80#ibcon#about to write, iclass 20, count 0 2006.229.14:18:38.80#ibcon#wrote, iclass 20, count 0 2006.229.14:18:38.80#ibcon#about to read 3, iclass 20, count 0 2006.229.14:18:38.82#ibcon#read 3, iclass 20, count 0 2006.229.14:18:38.82#ibcon#about to read 4, iclass 20, count 0 2006.229.14:18:38.82#ibcon#read 4, iclass 20, count 0 2006.229.14:18:38.82#ibcon#about to read 5, iclass 20, count 0 2006.229.14:18:38.82#ibcon#read 5, iclass 20, count 0 2006.229.14:18:38.82#ibcon#about to read 6, iclass 20, count 0 2006.229.14:18:38.82#ibcon#read 6, iclass 20, count 0 2006.229.14:18:38.82#ibcon#end of sib2, iclass 20, count 0 2006.229.14:18:38.82#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:18:38.82#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:18:38.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:18:38.82#ibcon#*before write, iclass 20, count 0 2006.229.14:18:38.82#ibcon#enter sib2, iclass 20, count 0 2006.229.14:18:38.82#ibcon#flushed, iclass 20, count 0 2006.229.14:18:38.82#ibcon#about to write, iclass 20, count 0 2006.229.14:18:38.82#ibcon#wrote, iclass 20, count 0 2006.229.14:18:38.82#ibcon#about to read 3, iclass 20, count 0 2006.229.14:18:38.86#ibcon#read 3, iclass 20, count 0 2006.229.14:18:38.86#ibcon#about to read 4, iclass 20, count 0 2006.229.14:18:38.86#ibcon#read 4, iclass 20, count 0 2006.229.14:18:38.86#ibcon#about to read 5, iclass 20, count 0 2006.229.14:18:38.86#ibcon#read 5, iclass 20, count 0 2006.229.14:18:38.86#ibcon#about to read 6, iclass 20, count 0 2006.229.14:18:38.86#ibcon#read 6, iclass 20, count 0 2006.229.14:18:38.86#ibcon#end of sib2, iclass 20, count 0 2006.229.14:18:38.86#ibcon#*after write, iclass 20, count 0 2006.229.14:18:38.86#ibcon#*before return 0, iclass 20, count 0 2006.229.14:18:38.86#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:38.86#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:18:38.86#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:18:38.86#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:18:38.86$vck44/vb=4,4 2006.229.14:18:38.86#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.14:18:38.86#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.14:18:38.86#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:38.86#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:38.92#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:38.92#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:38.92#ibcon#enter wrdev, iclass 22, count 2 2006.229.14:18:38.92#ibcon#first serial, iclass 22, count 2 2006.229.14:18:38.92#ibcon#enter sib2, iclass 22, count 2 2006.229.14:18:38.92#ibcon#flushed, iclass 22, count 2 2006.229.14:18:38.92#ibcon#about to write, iclass 22, count 2 2006.229.14:18:38.92#ibcon#wrote, iclass 22, count 2 2006.229.14:18:38.92#ibcon#about to read 3, iclass 22, count 2 2006.229.14:18:38.94#ibcon#read 3, iclass 22, count 2 2006.229.14:18:38.94#ibcon#about to read 4, iclass 22, count 2 2006.229.14:18:38.94#ibcon#read 4, iclass 22, count 2 2006.229.14:18:38.94#ibcon#about to read 5, iclass 22, count 2 2006.229.14:18:38.94#ibcon#read 5, iclass 22, count 2 2006.229.14:18:38.94#ibcon#about to read 6, iclass 22, count 2 2006.229.14:18:38.94#ibcon#read 6, iclass 22, count 2 2006.229.14:18:38.94#ibcon#end of sib2, iclass 22, count 2 2006.229.14:18:38.94#ibcon#*mode == 0, iclass 22, count 2 2006.229.14:18:38.94#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.14:18:38.94#ibcon#[27=AT04-04\r\n] 2006.229.14:18:38.94#ibcon#*before write, iclass 22, count 2 2006.229.14:18:38.94#ibcon#enter sib2, iclass 22, count 2 2006.229.14:18:38.94#ibcon#flushed, iclass 22, count 2 2006.229.14:18:38.94#ibcon#about to write, iclass 22, count 2 2006.229.14:18:38.94#ibcon#wrote, iclass 22, count 2 2006.229.14:18:38.94#ibcon#about to read 3, iclass 22, count 2 2006.229.14:18:38.97#ibcon#read 3, iclass 22, count 2 2006.229.14:18:38.97#ibcon#about to read 4, iclass 22, count 2 2006.229.14:18:38.97#ibcon#read 4, iclass 22, count 2 2006.229.14:18:38.97#ibcon#about to read 5, iclass 22, count 2 2006.229.14:18:38.97#ibcon#read 5, iclass 22, count 2 2006.229.14:18:38.97#ibcon#about to read 6, iclass 22, count 2 2006.229.14:18:38.97#ibcon#read 6, iclass 22, count 2 2006.229.14:18:38.97#ibcon#end of sib2, iclass 22, count 2 2006.229.14:18:38.97#ibcon#*after write, iclass 22, count 2 2006.229.14:18:38.97#ibcon#*before return 0, iclass 22, count 2 2006.229.14:18:38.97#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:38.97#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:18:38.97#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.14:18:38.97#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:38.97#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:39.09#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:39.09#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:39.09#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:18:39.09#ibcon#first serial, iclass 22, count 0 2006.229.14:18:39.09#ibcon#enter sib2, iclass 22, count 0 2006.229.14:18:39.09#ibcon#flushed, iclass 22, count 0 2006.229.14:18:39.09#ibcon#about to write, iclass 22, count 0 2006.229.14:18:39.09#ibcon#wrote, iclass 22, count 0 2006.229.14:18:39.09#ibcon#about to read 3, iclass 22, count 0 2006.229.14:18:39.11#ibcon#read 3, iclass 22, count 0 2006.229.14:18:39.11#ibcon#about to read 4, iclass 22, count 0 2006.229.14:18:39.11#ibcon#read 4, iclass 22, count 0 2006.229.14:18:39.11#ibcon#about to read 5, iclass 22, count 0 2006.229.14:18:39.11#ibcon#read 5, iclass 22, count 0 2006.229.14:18:39.11#ibcon#about to read 6, iclass 22, count 0 2006.229.14:18:39.11#ibcon#read 6, iclass 22, count 0 2006.229.14:18:39.11#ibcon#end of sib2, iclass 22, count 0 2006.229.14:18:39.11#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:18:39.11#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:18:39.11#ibcon#[27=USB\r\n] 2006.229.14:18:39.11#ibcon#*before write, iclass 22, count 0 2006.229.14:18:39.11#ibcon#enter sib2, iclass 22, count 0 2006.229.14:18:39.11#ibcon#flushed, iclass 22, count 0 2006.229.14:18:39.11#ibcon#about to write, iclass 22, count 0 2006.229.14:18:39.11#ibcon#wrote, iclass 22, count 0 2006.229.14:18:39.11#ibcon#about to read 3, iclass 22, count 0 2006.229.14:18:39.14#ibcon#read 3, iclass 22, count 0 2006.229.14:18:39.14#ibcon#about to read 4, iclass 22, count 0 2006.229.14:18:39.14#ibcon#read 4, iclass 22, count 0 2006.229.14:18:39.14#ibcon#about to read 5, iclass 22, count 0 2006.229.14:18:39.14#ibcon#read 5, iclass 22, count 0 2006.229.14:18:39.14#ibcon#about to read 6, iclass 22, count 0 2006.229.14:18:39.14#ibcon#read 6, iclass 22, count 0 2006.229.14:18:39.14#ibcon#end of sib2, iclass 22, count 0 2006.229.14:18:39.14#ibcon#*after write, iclass 22, count 0 2006.229.14:18:39.14#ibcon#*before return 0, iclass 22, count 0 2006.229.14:18:39.14#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:39.14#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:18:39.14#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:18:39.14#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:18:39.14$vck44/vblo=5,709.99 2006.229.14:18:39.14#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.14:18:39.14#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.14:18:39.14#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:39.14#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:39.14#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:39.14#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:39.14#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:18:39.14#ibcon#first serial, iclass 24, count 0 2006.229.14:18:39.14#ibcon#enter sib2, iclass 24, count 0 2006.229.14:18:39.14#ibcon#flushed, iclass 24, count 0 2006.229.14:18:39.14#ibcon#about to write, iclass 24, count 0 2006.229.14:18:39.14#ibcon#wrote, iclass 24, count 0 2006.229.14:18:39.14#ibcon#about to read 3, iclass 24, count 0 2006.229.14:18:39.16#ibcon#read 3, iclass 24, count 0 2006.229.14:18:39.16#ibcon#about to read 4, iclass 24, count 0 2006.229.14:18:39.16#ibcon#read 4, iclass 24, count 0 2006.229.14:18:39.16#ibcon#about to read 5, iclass 24, count 0 2006.229.14:18:39.16#ibcon#read 5, iclass 24, count 0 2006.229.14:18:39.16#ibcon#about to read 6, iclass 24, count 0 2006.229.14:18:39.16#ibcon#read 6, iclass 24, count 0 2006.229.14:18:39.16#ibcon#end of sib2, iclass 24, count 0 2006.229.14:18:39.16#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:18:39.16#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:18:39.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:18:39.16#ibcon#*before write, iclass 24, count 0 2006.229.14:18:39.16#ibcon#enter sib2, iclass 24, count 0 2006.229.14:18:39.16#ibcon#flushed, iclass 24, count 0 2006.229.14:18:39.16#ibcon#about to write, iclass 24, count 0 2006.229.14:18:39.16#ibcon#wrote, iclass 24, count 0 2006.229.14:18:39.16#ibcon#about to read 3, iclass 24, count 0 2006.229.14:18:39.20#ibcon#read 3, iclass 24, count 0 2006.229.14:18:39.20#ibcon#about to read 4, iclass 24, count 0 2006.229.14:18:39.20#ibcon#read 4, iclass 24, count 0 2006.229.14:18:39.20#ibcon#about to read 5, iclass 24, count 0 2006.229.14:18:39.20#ibcon#read 5, iclass 24, count 0 2006.229.14:18:39.20#ibcon#about to read 6, iclass 24, count 0 2006.229.14:18:39.20#ibcon#read 6, iclass 24, count 0 2006.229.14:18:39.20#ibcon#end of sib2, iclass 24, count 0 2006.229.14:18:39.20#ibcon#*after write, iclass 24, count 0 2006.229.14:18:39.20#ibcon#*before return 0, iclass 24, count 0 2006.229.14:18:39.20#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:39.20#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:18:39.20#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:18:39.20#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:18:39.20$vck44/vb=5,4 2006.229.14:18:39.20#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.14:18:39.20#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.14:18:39.20#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:39.20#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:39.26#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:39.26#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:39.26#ibcon#enter wrdev, iclass 26, count 2 2006.229.14:18:39.26#ibcon#first serial, iclass 26, count 2 2006.229.14:18:39.26#ibcon#enter sib2, iclass 26, count 2 2006.229.14:18:39.26#ibcon#flushed, iclass 26, count 2 2006.229.14:18:39.26#ibcon#about to write, iclass 26, count 2 2006.229.14:18:39.26#ibcon#wrote, iclass 26, count 2 2006.229.14:18:39.26#ibcon#about to read 3, iclass 26, count 2 2006.229.14:18:39.28#ibcon#read 3, iclass 26, count 2 2006.229.14:18:39.28#ibcon#about to read 4, iclass 26, count 2 2006.229.14:18:39.28#ibcon#read 4, iclass 26, count 2 2006.229.14:18:39.28#ibcon#about to read 5, iclass 26, count 2 2006.229.14:18:39.28#ibcon#read 5, iclass 26, count 2 2006.229.14:18:39.28#ibcon#about to read 6, iclass 26, count 2 2006.229.14:18:39.28#ibcon#read 6, iclass 26, count 2 2006.229.14:18:39.28#ibcon#end of sib2, iclass 26, count 2 2006.229.14:18:39.28#ibcon#*mode == 0, iclass 26, count 2 2006.229.14:18:39.28#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.14:18:39.28#ibcon#[27=AT05-04\r\n] 2006.229.14:18:39.28#ibcon#*before write, iclass 26, count 2 2006.229.14:18:39.28#ibcon#enter sib2, iclass 26, count 2 2006.229.14:18:39.28#ibcon#flushed, iclass 26, count 2 2006.229.14:18:39.28#ibcon#about to write, iclass 26, count 2 2006.229.14:18:39.28#ibcon#wrote, iclass 26, count 2 2006.229.14:18:39.28#ibcon#about to read 3, iclass 26, count 2 2006.229.14:18:39.31#ibcon#read 3, iclass 26, count 2 2006.229.14:18:39.31#ibcon#about to read 4, iclass 26, count 2 2006.229.14:18:39.31#ibcon#read 4, iclass 26, count 2 2006.229.14:18:39.31#ibcon#about to read 5, iclass 26, count 2 2006.229.14:18:39.31#ibcon#read 5, iclass 26, count 2 2006.229.14:18:39.31#ibcon#about to read 6, iclass 26, count 2 2006.229.14:18:39.31#ibcon#read 6, iclass 26, count 2 2006.229.14:18:39.31#ibcon#end of sib2, iclass 26, count 2 2006.229.14:18:39.31#ibcon#*after write, iclass 26, count 2 2006.229.14:18:39.31#ibcon#*before return 0, iclass 26, count 2 2006.229.14:18:39.31#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:39.31#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:18:39.31#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.14:18:39.31#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:39.31#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:39.43#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:39.43#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:39.43#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:18:39.43#ibcon#first serial, iclass 26, count 0 2006.229.14:18:39.43#ibcon#enter sib2, iclass 26, count 0 2006.229.14:18:39.43#ibcon#flushed, iclass 26, count 0 2006.229.14:18:39.43#ibcon#about to write, iclass 26, count 0 2006.229.14:18:39.43#ibcon#wrote, iclass 26, count 0 2006.229.14:18:39.43#ibcon#about to read 3, iclass 26, count 0 2006.229.14:18:39.45#ibcon#read 3, iclass 26, count 0 2006.229.14:18:39.45#ibcon#about to read 4, iclass 26, count 0 2006.229.14:18:39.45#ibcon#read 4, iclass 26, count 0 2006.229.14:18:39.45#ibcon#about to read 5, iclass 26, count 0 2006.229.14:18:39.45#ibcon#read 5, iclass 26, count 0 2006.229.14:18:39.45#ibcon#about to read 6, iclass 26, count 0 2006.229.14:18:39.45#ibcon#read 6, iclass 26, count 0 2006.229.14:18:39.45#ibcon#end of sib2, iclass 26, count 0 2006.229.14:18:39.45#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:18:39.45#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:18:39.45#ibcon#[27=USB\r\n] 2006.229.14:18:39.45#ibcon#*before write, iclass 26, count 0 2006.229.14:18:39.45#ibcon#enter sib2, iclass 26, count 0 2006.229.14:18:39.45#ibcon#flushed, iclass 26, count 0 2006.229.14:18:39.45#ibcon#about to write, iclass 26, count 0 2006.229.14:18:39.45#ibcon#wrote, iclass 26, count 0 2006.229.14:18:39.45#ibcon#about to read 3, iclass 26, count 0 2006.229.14:18:39.48#ibcon#read 3, iclass 26, count 0 2006.229.14:18:39.48#ibcon#about to read 4, iclass 26, count 0 2006.229.14:18:39.48#ibcon#read 4, iclass 26, count 0 2006.229.14:18:39.48#ibcon#about to read 5, iclass 26, count 0 2006.229.14:18:39.48#ibcon#read 5, iclass 26, count 0 2006.229.14:18:39.48#ibcon#about to read 6, iclass 26, count 0 2006.229.14:18:39.48#ibcon#read 6, iclass 26, count 0 2006.229.14:18:39.48#ibcon#end of sib2, iclass 26, count 0 2006.229.14:18:39.48#ibcon#*after write, iclass 26, count 0 2006.229.14:18:39.48#ibcon#*before return 0, iclass 26, count 0 2006.229.14:18:39.48#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:39.48#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:18:39.48#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:18:39.48#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:18:39.48$vck44/vblo=6,719.99 2006.229.14:18:39.48#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.14:18:39.48#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.14:18:39.48#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:39.48#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:39.48#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:39.48#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:39.48#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:18:39.48#ibcon#first serial, iclass 28, count 0 2006.229.14:18:39.48#ibcon#enter sib2, iclass 28, count 0 2006.229.14:18:39.48#ibcon#flushed, iclass 28, count 0 2006.229.14:18:39.48#ibcon#about to write, iclass 28, count 0 2006.229.14:18:39.48#ibcon#wrote, iclass 28, count 0 2006.229.14:18:39.48#ibcon#about to read 3, iclass 28, count 0 2006.229.14:18:39.50#ibcon#read 3, iclass 28, count 0 2006.229.14:18:39.50#ibcon#about to read 4, iclass 28, count 0 2006.229.14:18:39.50#ibcon#read 4, iclass 28, count 0 2006.229.14:18:39.50#ibcon#about to read 5, iclass 28, count 0 2006.229.14:18:39.50#ibcon#read 5, iclass 28, count 0 2006.229.14:18:39.50#ibcon#about to read 6, iclass 28, count 0 2006.229.14:18:39.50#ibcon#read 6, iclass 28, count 0 2006.229.14:18:39.50#ibcon#end of sib2, iclass 28, count 0 2006.229.14:18:39.50#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:18:39.50#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:18:39.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:18:39.50#ibcon#*before write, iclass 28, count 0 2006.229.14:18:39.50#ibcon#enter sib2, iclass 28, count 0 2006.229.14:18:39.50#ibcon#flushed, iclass 28, count 0 2006.229.14:18:39.50#ibcon#about to write, iclass 28, count 0 2006.229.14:18:39.50#ibcon#wrote, iclass 28, count 0 2006.229.14:18:39.50#ibcon#about to read 3, iclass 28, count 0 2006.229.14:18:39.54#ibcon#read 3, iclass 28, count 0 2006.229.14:18:39.54#ibcon#about to read 4, iclass 28, count 0 2006.229.14:18:39.54#ibcon#read 4, iclass 28, count 0 2006.229.14:18:39.54#ibcon#about to read 5, iclass 28, count 0 2006.229.14:18:39.54#ibcon#read 5, iclass 28, count 0 2006.229.14:18:39.54#ibcon#about to read 6, iclass 28, count 0 2006.229.14:18:39.54#ibcon#read 6, iclass 28, count 0 2006.229.14:18:39.54#ibcon#end of sib2, iclass 28, count 0 2006.229.14:18:39.54#ibcon#*after write, iclass 28, count 0 2006.229.14:18:39.54#ibcon#*before return 0, iclass 28, count 0 2006.229.14:18:39.54#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:39.54#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:18:39.54#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:18:39.54#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:18:39.54$vck44/vb=6,4 2006.229.14:18:39.54#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.14:18:39.54#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.14:18:39.54#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:39.54#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:39.60#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:39.60#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:39.60#ibcon#enter wrdev, iclass 30, count 2 2006.229.14:18:39.60#ibcon#first serial, iclass 30, count 2 2006.229.14:18:39.60#ibcon#enter sib2, iclass 30, count 2 2006.229.14:18:39.60#ibcon#flushed, iclass 30, count 2 2006.229.14:18:39.60#ibcon#about to write, iclass 30, count 2 2006.229.14:18:39.60#ibcon#wrote, iclass 30, count 2 2006.229.14:18:39.60#ibcon#about to read 3, iclass 30, count 2 2006.229.14:18:39.62#ibcon#read 3, iclass 30, count 2 2006.229.14:18:39.62#ibcon#about to read 4, iclass 30, count 2 2006.229.14:18:39.62#ibcon#read 4, iclass 30, count 2 2006.229.14:18:39.62#ibcon#about to read 5, iclass 30, count 2 2006.229.14:18:39.62#ibcon#read 5, iclass 30, count 2 2006.229.14:18:39.62#ibcon#about to read 6, iclass 30, count 2 2006.229.14:18:39.62#ibcon#read 6, iclass 30, count 2 2006.229.14:18:39.62#ibcon#end of sib2, iclass 30, count 2 2006.229.14:18:39.62#ibcon#*mode == 0, iclass 30, count 2 2006.229.14:18:39.62#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.14:18:39.62#ibcon#[27=AT06-04\r\n] 2006.229.14:18:39.62#ibcon#*before write, iclass 30, count 2 2006.229.14:18:39.62#ibcon#enter sib2, iclass 30, count 2 2006.229.14:18:39.62#ibcon#flushed, iclass 30, count 2 2006.229.14:18:39.62#ibcon#about to write, iclass 30, count 2 2006.229.14:18:39.62#ibcon#wrote, iclass 30, count 2 2006.229.14:18:39.62#ibcon#about to read 3, iclass 30, count 2 2006.229.14:18:39.65#ibcon#read 3, iclass 30, count 2 2006.229.14:18:39.65#ibcon#about to read 4, iclass 30, count 2 2006.229.14:18:39.65#ibcon#read 4, iclass 30, count 2 2006.229.14:18:39.65#ibcon#about to read 5, iclass 30, count 2 2006.229.14:18:39.65#ibcon#read 5, iclass 30, count 2 2006.229.14:18:39.65#ibcon#about to read 6, iclass 30, count 2 2006.229.14:18:39.65#ibcon#read 6, iclass 30, count 2 2006.229.14:18:39.65#ibcon#end of sib2, iclass 30, count 2 2006.229.14:18:39.65#ibcon#*after write, iclass 30, count 2 2006.229.14:18:39.65#ibcon#*before return 0, iclass 30, count 2 2006.229.14:18:39.65#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:39.65#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:18:39.65#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.14:18:39.65#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:39.65#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:39.77#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:39.77#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:39.77#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:18:39.77#ibcon#first serial, iclass 30, count 0 2006.229.14:18:39.77#ibcon#enter sib2, iclass 30, count 0 2006.229.14:18:39.77#ibcon#flushed, iclass 30, count 0 2006.229.14:18:39.77#ibcon#about to write, iclass 30, count 0 2006.229.14:18:39.77#ibcon#wrote, iclass 30, count 0 2006.229.14:18:39.77#ibcon#about to read 3, iclass 30, count 0 2006.229.14:18:39.79#ibcon#read 3, iclass 30, count 0 2006.229.14:18:39.79#ibcon#about to read 4, iclass 30, count 0 2006.229.14:18:39.79#ibcon#read 4, iclass 30, count 0 2006.229.14:18:39.79#ibcon#about to read 5, iclass 30, count 0 2006.229.14:18:39.79#ibcon#read 5, iclass 30, count 0 2006.229.14:18:39.79#ibcon#about to read 6, iclass 30, count 0 2006.229.14:18:39.79#ibcon#read 6, iclass 30, count 0 2006.229.14:18:39.79#ibcon#end of sib2, iclass 30, count 0 2006.229.14:18:39.79#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:18:39.79#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:18:39.79#ibcon#[27=USB\r\n] 2006.229.14:18:39.79#ibcon#*before write, iclass 30, count 0 2006.229.14:18:39.79#ibcon#enter sib2, iclass 30, count 0 2006.229.14:18:39.79#ibcon#flushed, iclass 30, count 0 2006.229.14:18:39.79#ibcon#about to write, iclass 30, count 0 2006.229.14:18:39.79#ibcon#wrote, iclass 30, count 0 2006.229.14:18:39.79#ibcon#about to read 3, iclass 30, count 0 2006.229.14:18:39.82#ibcon#read 3, iclass 30, count 0 2006.229.14:18:39.82#ibcon#about to read 4, iclass 30, count 0 2006.229.14:18:39.82#ibcon#read 4, iclass 30, count 0 2006.229.14:18:39.82#ibcon#about to read 5, iclass 30, count 0 2006.229.14:18:39.82#ibcon#read 5, iclass 30, count 0 2006.229.14:18:39.82#ibcon#about to read 6, iclass 30, count 0 2006.229.14:18:39.82#ibcon#read 6, iclass 30, count 0 2006.229.14:18:39.82#ibcon#end of sib2, iclass 30, count 0 2006.229.14:18:39.82#ibcon#*after write, iclass 30, count 0 2006.229.14:18:39.82#ibcon#*before return 0, iclass 30, count 0 2006.229.14:18:39.82#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:39.82#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:18:39.82#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:18:39.82#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:18:39.82$vck44/vblo=7,734.99 2006.229.14:18:39.82#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.14:18:39.82#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.14:18:39.82#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:39.82#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:39.82#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:39.82#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:39.82#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:18:39.82#ibcon#first serial, iclass 32, count 0 2006.229.14:18:39.82#ibcon#enter sib2, iclass 32, count 0 2006.229.14:18:39.82#ibcon#flushed, iclass 32, count 0 2006.229.14:18:39.82#ibcon#about to write, iclass 32, count 0 2006.229.14:18:39.82#ibcon#wrote, iclass 32, count 0 2006.229.14:18:39.82#ibcon#about to read 3, iclass 32, count 0 2006.229.14:18:39.84#ibcon#read 3, iclass 32, count 0 2006.229.14:18:39.84#ibcon#about to read 4, iclass 32, count 0 2006.229.14:18:39.84#ibcon#read 4, iclass 32, count 0 2006.229.14:18:39.84#ibcon#about to read 5, iclass 32, count 0 2006.229.14:18:39.84#ibcon#read 5, iclass 32, count 0 2006.229.14:18:39.84#ibcon#about to read 6, iclass 32, count 0 2006.229.14:18:39.84#ibcon#read 6, iclass 32, count 0 2006.229.14:18:39.84#ibcon#end of sib2, iclass 32, count 0 2006.229.14:18:39.84#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:18:39.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:18:39.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:18:39.84#ibcon#*before write, iclass 32, count 0 2006.229.14:18:39.84#ibcon#enter sib2, iclass 32, count 0 2006.229.14:18:39.84#ibcon#flushed, iclass 32, count 0 2006.229.14:18:39.84#ibcon#about to write, iclass 32, count 0 2006.229.14:18:39.84#ibcon#wrote, iclass 32, count 0 2006.229.14:18:39.84#ibcon#about to read 3, iclass 32, count 0 2006.229.14:18:39.88#ibcon#read 3, iclass 32, count 0 2006.229.14:18:39.88#ibcon#about to read 4, iclass 32, count 0 2006.229.14:18:39.88#ibcon#read 4, iclass 32, count 0 2006.229.14:18:39.88#ibcon#about to read 5, iclass 32, count 0 2006.229.14:18:39.88#ibcon#read 5, iclass 32, count 0 2006.229.14:18:39.88#ibcon#about to read 6, iclass 32, count 0 2006.229.14:18:39.88#ibcon#read 6, iclass 32, count 0 2006.229.14:18:39.88#ibcon#end of sib2, iclass 32, count 0 2006.229.14:18:39.88#ibcon#*after write, iclass 32, count 0 2006.229.14:18:39.88#ibcon#*before return 0, iclass 32, count 0 2006.229.14:18:39.88#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:39.88#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:18:39.88#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:18:39.88#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:18:39.88$vck44/vb=7,4 2006.229.14:18:39.88#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.14:18:39.88#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.14:18:39.88#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:39.88#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:39.94#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:39.94#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:39.94#ibcon#enter wrdev, iclass 34, count 2 2006.229.14:18:39.94#ibcon#first serial, iclass 34, count 2 2006.229.14:18:39.94#ibcon#enter sib2, iclass 34, count 2 2006.229.14:18:39.94#ibcon#flushed, iclass 34, count 2 2006.229.14:18:39.94#ibcon#about to write, iclass 34, count 2 2006.229.14:18:39.94#ibcon#wrote, iclass 34, count 2 2006.229.14:18:39.94#ibcon#about to read 3, iclass 34, count 2 2006.229.14:18:39.96#ibcon#read 3, iclass 34, count 2 2006.229.14:18:39.96#ibcon#about to read 4, iclass 34, count 2 2006.229.14:18:39.96#ibcon#read 4, iclass 34, count 2 2006.229.14:18:39.96#ibcon#about to read 5, iclass 34, count 2 2006.229.14:18:39.96#ibcon#read 5, iclass 34, count 2 2006.229.14:18:39.96#ibcon#about to read 6, iclass 34, count 2 2006.229.14:18:39.96#ibcon#read 6, iclass 34, count 2 2006.229.14:18:39.96#ibcon#end of sib2, iclass 34, count 2 2006.229.14:18:39.96#ibcon#*mode == 0, iclass 34, count 2 2006.229.14:18:39.96#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.14:18:39.96#ibcon#[27=AT07-04\r\n] 2006.229.14:18:39.96#ibcon#*before write, iclass 34, count 2 2006.229.14:18:39.96#ibcon#enter sib2, iclass 34, count 2 2006.229.14:18:39.96#ibcon#flushed, iclass 34, count 2 2006.229.14:18:39.96#ibcon#about to write, iclass 34, count 2 2006.229.14:18:39.96#ibcon#wrote, iclass 34, count 2 2006.229.14:18:39.96#ibcon#about to read 3, iclass 34, count 2 2006.229.14:18:39.99#ibcon#read 3, iclass 34, count 2 2006.229.14:18:39.99#ibcon#about to read 4, iclass 34, count 2 2006.229.14:18:39.99#ibcon#read 4, iclass 34, count 2 2006.229.14:18:39.99#ibcon#about to read 5, iclass 34, count 2 2006.229.14:18:39.99#ibcon#read 5, iclass 34, count 2 2006.229.14:18:39.99#ibcon#about to read 6, iclass 34, count 2 2006.229.14:18:39.99#ibcon#read 6, iclass 34, count 2 2006.229.14:18:39.99#ibcon#end of sib2, iclass 34, count 2 2006.229.14:18:39.99#ibcon#*after write, iclass 34, count 2 2006.229.14:18:39.99#ibcon#*before return 0, iclass 34, count 2 2006.229.14:18:39.99#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:39.99#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:18:39.99#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.14:18:39.99#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:39.99#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:40.11#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:40.11#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:40.11#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:18:40.11#ibcon#first serial, iclass 34, count 0 2006.229.14:18:40.11#ibcon#enter sib2, iclass 34, count 0 2006.229.14:18:40.11#ibcon#flushed, iclass 34, count 0 2006.229.14:18:40.11#ibcon#about to write, iclass 34, count 0 2006.229.14:18:40.11#ibcon#wrote, iclass 34, count 0 2006.229.14:18:40.11#ibcon#about to read 3, iclass 34, count 0 2006.229.14:18:40.13#ibcon#read 3, iclass 34, count 0 2006.229.14:18:40.13#ibcon#about to read 4, iclass 34, count 0 2006.229.14:18:40.13#ibcon#read 4, iclass 34, count 0 2006.229.14:18:40.13#ibcon#about to read 5, iclass 34, count 0 2006.229.14:18:40.13#ibcon#read 5, iclass 34, count 0 2006.229.14:18:40.13#ibcon#about to read 6, iclass 34, count 0 2006.229.14:18:40.13#ibcon#read 6, iclass 34, count 0 2006.229.14:18:40.13#ibcon#end of sib2, iclass 34, count 0 2006.229.14:18:40.13#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:18:40.13#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:18:40.13#ibcon#[27=USB\r\n] 2006.229.14:18:40.13#ibcon#*before write, iclass 34, count 0 2006.229.14:18:40.13#ibcon#enter sib2, iclass 34, count 0 2006.229.14:18:40.13#ibcon#flushed, iclass 34, count 0 2006.229.14:18:40.13#ibcon#about to write, iclass 34, count 0 2006.229.14:18:40.13#ibcon#wrote, iclass 34, count 0 2006.229.14:18:40.13#ibcon#about to read 3, iclass 34, count 0 2006.229.14:18:40.16#ibcon#read 3, iclass 34, count 0 2006.229.14:18:40.16#ibcon#about to read 4, iclass 34, count 0 2006.229.14:18:40.16#ibcon#read 4, iclass 34, count 0 2006.229.14:18:40.16#ibcon#about to read 5, iclass 34, count 0 2006.229.14:18:40.16#ibcon#read 5, iclass 34, count 0 2006.229.14:18:40.16#ibcon#about to read 6, iclass 34, count 0 2006.229.14:18:40.16#ibcon#read 6, iclass 34, count 0 2006.229.14:18:40.16#ibcon#end of sib2, iclass 34, count 0 2006.229.14:18:40.16#ibcon#*after write, iclass 34, count 0 2006.229.14:18:40.16#ibcon#*before return 0, iclass 34, count 0 2006.229.14:18:40.16#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:40.16#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:18:40.16#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:18:40.16#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:18:40.16$vck44/vblo=8,744.99 2006.229.14:18:40.16#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.14:18:40.16#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.14:18:40.16#ibcon#ireg 17 cls_cnt 0 2006.229.14:18:40.16#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:40.16#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:40.16#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:40.16#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:18:40.16#ibcon#first serial, iclass 36, count 0 2006.229.14:18:40.16#ibcon#enter sib2, iclass 36, count 0 2006.229.14:18:40.16#ibcon#flushed, iclass 36, count 0 2006.229.14:18:40.16#ibcon#about to write, iclass 36, count 0 2006.229.14:18:40.16#ibcon#wrote, iclass 36, count 0 2006.229.14:18:40.16#ibcon#about to read 3, iclass 36, count 0 2006.229.14:18:40.18#ibcon#read 3, iclass 36, count 0 2006.229.14:18:40.18#ibcon#about to read 4, iclass 36, count 0 2006.229.14:18:40.18#ibcon#read 4, iclass 36, count 0 2006.229.14:18:40.18#ibcon#about to read 5, iclass 36, count 0 2006.229.14:18:40.18#ibcon#read 5, iclass 36, count 0 2006.229.14:18:40.18#ibcon#about to read 6, iclass 36, count 0 2006.229.14:18:40.18#ibcon#read 6, iclass 36, count 0 2006.229.14:18:40.18#ibcon#end of sib2, iclass 36, count 0 2006.229.14:18:40.18#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:18:40.18#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:18:40.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:18:40.18#ibcon#*before write, iclass 36, count 0 2006.229.14:18:40.18#ibcon#enter sib2, iclass 36, count 0 2006.229.14:18:40.18#ibcon#flushed, iclass 36, count 0 2006.229.14:18:40.18#ibcon#about to write, iclass 36, count 0 2006.229.14:18:40.18#ibcon#wrote, iclass 36, count 0 2006.229.14:18:40.18#ibcon#about to read 3, iclass 36, count 0 2006.229.14:18:40.22#ibcon#read 3, iclass 36, count 0 2006.229.14:18:40.22#ibcon#about to read 4, iclass 36, count 0 2006.229.14:18:40.22#ibcon#read 4, iclass 36, count 0 2006.229.14:18:40.22#ibcon#about to read 5, iclass 36, count 0 2006.229.14:18:40.22#ibcon#read 5, iclass 36, count 0 2006.229.14:18:40.22#ibcon#about to read 6, iclass 36, count 0 2006.229.14:18:40.22#ibcon#read 6, iclass 36, count 0 2006.229.14:18:40.22#ibcon#end of sib2, iclass 36, count 0 2006.229.14:18:40.22#ibcon#*after write, iclass 36, count 0 2006.229.14:18:40.22#ibcon#*before return 0, iclass 36, count 0 2006.229.14:18:40.22#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:40.22#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:18:40.22#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:18:40.22#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:18:40.22$vck44/vb=8,4 2006.229.14:18:40.22#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.14:18:40.22#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.14:18:40.22#ibcon#ireg 11 cls_cnt 2 2006.229.14:18:40.22#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:40.28#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:40.28#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:40.28#ibcon#enter wrdev, iclass 38, count 2 2006.229.14:18:40.28#ibcon#first serial, iclass 38, count 2 2006.229.14:18:40.28#ibcon#enter sib2, iclass 38, count 2 2006.229.14:18:40.28#ibcon#flushed, iclass 38, count 2 2006.229.14:18:40.28#ibcon#about to write, iclass 38, count 2 2006.229.14:18:40.28#ibcon#wrote, iclass 38, count 2 2006.229.14:18:40.28#ibcon#about to read 3, iclass 38, count 2 2006.229.14:18:40.30#ibcon#read 3, iclass 38, count 2 2006.229.14:18:40.30#ibcon#about to read 4, iclass 38, count 2 2006.229.14:18:40.30#ibcon#read 4, iclass 38, count 2 2006.229.14:18:40.30#ibcon#about to read 5, iclass 38, count 2 2006.229.14:18:40.30#ibcon#read 5, iclass 38, count 2 2006.229.14:18:40.30#ibcon#about to read 6, iclass 38, count 2 2006.229.14:18:40.30#ibcon#read 6, iclass 38, count 2 2006.229.14:18:40.30#ibcon#end of sib2, iclass 38, count 2 2006.229.14:18:40.30#ibcon#*mode == 0, iclass 38, count 2 2006.229.14:18:40.30#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.14:18:40.30#ibcon#[27=AT08-04\r\n] 2006.229.14:18:40.30#ibcon#*before write, iclass 38, count 2 2006.229.14:18:40.30#ibcon#enter sib2, iclass 38, count 2 2006.229.14:18:40.30#ibcon#flushed, iclass 38, count 2 2006.229.14:18:40.30#ibcon#about to write, iclass 38, count 2 2006.229.14:18:40.30#ibcon#wrote, iclass 38, count 2 2006.229.14:18:40.30#ibcon#about to read 3, iclass 38, count 2 2006.229.14:18:40.33#ibcon#read 3, iclass 38, count 2 2006.229.14:18:40.33#ibcon#about to read 4, iclass 38, count 2 2006.229.14:18:40.33#ibcon#read 4, iclass 38, count 2 2006.229.14:18:40.33#ibcon#about to read 5, iclass 38, count 2 2006.229.14:18:40.33#ibcon#read 5, iclass 38, count 2 2006.229.14:18:40.33#ibcon#about to read 6, iclass 38, count 2 2006.229.14:18:40.33#ibcon#read 6, iclass 38, count 2 2006.229.14:18:40.33#ibcon#end of sib2, iclass 38, count 2 2006.229.14:18:40.33#ibcon#*after write, iclass 38, count 2 2006.229.14:18:40.33#ibcon#*before return 0, iclass 38, count 2 2006.229.14:18:40.33#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:40.33#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:18:40.33#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.14:18:40.33#ibcon#ireg 7 cls_cnt 0 2006.229.14:18:40.33#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:40.45#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:40.45#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:40.45#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:18:40.45#ibcon#first serial, iclass 38, count 0 2006.229.14:18:40.45#ibcon#enter sib2, iclass 38, count 0 2006.229.14:18:40.45#ibcon#flushed, iclass 38, count 0 2006.229.14:18:40.45#ibcon#about to write, iclass 38, count 0 2006.229.14:18:40.45#ibcon#wrote, iclass 38, count 0 2006.229.14:18:40.45#ibcon#about to read 3, iclass 38, count 0 2006.229.14:18:40.47#ibcon#read 3, iclass 38, count 0 2006.229.14:18:40.47#ibcon#about to read 4, iclass 38, count 0 2006.229.14:18:40.47#ibcon#read 4, iclass 38, count 0 2006.229.14:18:40.47#ibcon#about to read 5, iclass 38, count 0 2006.229.14:18:40.47#ibcon#read 5, iclass 38, count 0 2006.229.14:18:40.47#ibcon#about to read 6, iclass 38, count 0 2006.229.14:18:40.47#ibcon#read 6, iclass 38, count 0 2006.229.14:18:40.47#ibcon#end of sib2, iclass 38, count 0 2006.229.14:18:40.47#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:18:40.47#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:18:40.47#ibcon#[27=USB\r\n] 2006.229.14:18:40.47#ibcon#*before write, iclass 38, count 0 2006.229.14:18:40.47#ibcon#enter sib2, iclass 38, count 0 2006.229.14:18:40.47#ibcon#flushed, iclass 38, count 0 2006.229.14:18:40.47#ibcon#about to write, iclass 38, count 0 2006.229.14:18:40.47#ibcon#wrote, iclass 38, count 0 2006.229.14:18:40.47#ibcon#about to read 3, iclass 38, count 0 2006.229.14:18:40.50#ibcon#read 3, iclass 38, count 0 2006.229.14:18:40.50#ibcon#about to read 4, iclass 38, count 0 2006.229.14:18:40.50#ibcon#read 4, iclass 38, count 0 2006.229.14:18:40.50#ibcon#about to read 5, iclass 38, count 0 2006.229.14:18:40.50#ibcon#read 5, iclass 38, count 0 2006.229.14:18:40.50#ibcon#about to read 6, iclass 38, count 0 2006.229.14:18:40.50#ibcon#read 6, iclass 38, count 0 2006.229.14:18:40.50#ibcon#end of sib2, iclass 38, count 0 2006.229.14:18:40.50#ibcon#*after write, iclass 38, count 0 2006.229.14:18:40.50#ibcon#*before return 0, iclass 38, count 0 2006.229.14:18:40.50#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:40.50#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:18:40.50#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:18:40.50#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:18:40.50$vck44/vabw=wide 2006.229.14:18:40.50#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.14:18:40.50#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.14:18:40.50#ibcon#ireg 8 cls_cnt 0 2006.229.14:18:40.50#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:40.50#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:40.50#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:40.50#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:18:40.50#ibcon#first serial, iclass 40, count 0 2006.229.14:18:40.50#ibcon#enter sib2, iclass 40, count 0 2006.229.14:18:40.50#ibcon#flushed, iclass 40, count 0 2006.229.14:18:40.50#ibcon#about to write, iclass 40, count 0 2006.229.14:18:40.50#ibcon#wrote, iclass 40, count 0 2006.229.14:18:40.50#ibcon#about to read 3, iclass 40, count 0 2006.229.14:18:40.52#ibcon#read 3, iclass 40, count 0 2006.229.14:18:40.52#ibcon#about to read 4, iclass 40, count 0 2006.229.14:18:40.52#ibcon#read 4, iclass 40, count 0 2006.229.14:18:40.52#ibcon#about to read 5, iclass 40, count 0 2006.229.14:18:40.52#ibcon#read 5, iclass 40, count 0 2006.229.14:18:40.52#ibcon#about to read 6, iclass 40, count 0 2006.229.14:18:40.52#ibcon#read 6, iclass 40, count 0 2006.229.14:18:40.52#ibcon#end of sib2, iclass 40, count 0 2006.229.14:18:40.52#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:18:40.52#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:18:40.52#ibcon#[25=BW32\r\n] 2006.229.14:18:40.52#ibcon#*before write, iclass 40, count 0 2006.229.14:18:40.52#ibcon#enter sib2, iclass 40, count 0 2006.229.14:18:40.52#ibcon#flushed, iclass 40, count 0 2006.229.14:18:40.52#ibcon#about to write, iclass 40, count 0 2006.229.14:18:40.52#ibcon#wrote, iclass 40, count 0 2006.229.14:18:40.52#ibcon#about to read 3, iclass 40, count 0 2006.229.14:18:40.55#ibcon#read 3, iclass 40, count 0 2006.229.14:18:40.55#ibcon#about to read 4, iclass 40, count 0 2006.229.14:18:40.55#ibcon#read 4, iclass 40, count 0 2006.229.14:18:40.55#ibcon#about to read 5, iclass 40, count 0 2006.229.14:18:40.55#ibcon#read 5, iclass 40, count 0 2006.229.14:18:40.55#ibcon#about to read 6, iclass 40, count 0 2006.229.14:18:40.55#ibcon#read 6, iclass 40, count 0 2006.229.14:18:40.55#ibcon#end of sib2, iclass 40, count 0 2006.229.14:18:40.55#ibcon#*after write, iclass 40, count 0 2006.229.14:18:40.55#ibcon#*before return 0, iclass 40, count 0 2006.229.14:18:40.55#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:40.55#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:18:40.55#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:18:40.55#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:18:40.55$vck44/vbbw=wide 2006.229.14:18:40.55#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:18:40.55#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:18:40.55#ibcon#ireg 8 cls_cnt 0 2006.229.14:18:40.55#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:18:40.62#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:18:40.62#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:18:40.62#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:18:40.62#ibcon#first serial, iclass 4, count 0 2006.229.14:18:40.62#ibcon#enter sib2, iclass 4, count 0 2006.229.14:18:40.62#ibcon#flushed, iclass 4, count 0 2006.229.14:18:40.62#ibcon#about to write, iclass 4, count 0 2006.229.14:18:40.62#ibcon#wrote, iclass 4, count 0 2006.229.14:18:40.62#ibcon#about to read 3, iclass 4, count 0 2006.229.14:18:40.64#ibcon#read 3, iclass 4, count 0 2006.229.14:18:40.64#ibcon#about to read 4, iclass 4, count 0 2006.229.14:18:40.64#ibcon#read 4, iclass 4, count 0 2006.229.14:18:40.64#ibcon#about to read 5, iclass 4, count 0 2006.229.14:18:40.64#ibcon#read 5, iclass 4, count 0 2006.229.14:18:40.64#ibcon#about to read 6, iclass 4, count 0 2006.229.14:18:40.64#ibcon#read 6, iclass 4, count 0 2006.229.14:18:40.64#ibcon#end of sib2, iclass 4, count 0 2006.229.14:18:40.64#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:18:40.64#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:18:40.64#ibcon#[27=BW32\r\n] 2006.229.14:18:40.64#ibcon#*before write, iclass 4, count 0 2006.229.14:18:40.64#ibcon#enter sib2, iclass 4, count 0 2006.229.14:18:40.64#ibcon#flushed, iclass 4, count 0 2006.229.14:18:40.64#ibcon#about to write, iclass 4, count 0 2006.229.14:18:40.64#ibcon#wrote, iclass 4, count 0 2006.229.14:18:40.64#ibcon#about to read 3, iclass 4, count 0 2006.229.14:18:40.67#ibcon#read 3, iclass 4, count 0 2006.229.14:18:40.67#ibcon#about to read 4, iclass 4, count 0 2006.229.14:18:40.67#ibcon#read 4, iclass 4, count 0 2006.229.14:18:40.67#ibcon#about to read 5, iclass 4, count 0 2006.229.14:18:40.67#ibcon#read 5, iclass 4, count 0 2006.229.14:18:40.67#ibcon#about to read 6, iclass 4, count 0 2006.229.14:18:40.67#ibcon#read 6, iclass 4, count 0 2006.229.14:18:40.67#ibcon#end of sib2, iclass 4, count 0 2006.229.14:18:40.67#ibcon#*after write, iclass 4, count 0 2006.229.14:18:40.67#ibcon#*before return 0, iclass 4, count 0 2006.229.14:18:40.67#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:18:40.67#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:18:40.67#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:18:40.67#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:18:40.67$setupk4/ifdk4 2006.229.14:18:40.67$ifdk4/lo= 2006.229.14:18:40.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:18:40.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:18:40.67$ifdk4/patch= 2006.229.14:18:40.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:18:40.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:18:40.67$setupk4/!*+20s 2006.229.14:18:48.72#abcon#<5=/06 1.4 2.3 27.511001002.1\r\n> 2006.229.14:18:48.74#abcon#{5=INTERFACE CLEAR} 2006.229.14:18:48.80#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:18:55.18$setupk4/"tpicd 2006.229.14:18:55.18$setupk4/echo=off 2006.229.14:18:55.18$setupk4/xlog=off 2006.229.14:18:55.18:!2006.229.14:19:58 2006.229.14:18:59.13#trakl#Source acquired 2006.229.14:19:00.13#flagr#flagr/antenna,acquired 2006.229.14:19:58.00:preob 2006.229.14:19:58.14/onsource/TRACKING 2006.229.14:19:58.14:!2006.229.14:20:08 2006.229.14:20:08.00:"tape 2006.229.14:20:08.00:"st=record 2006.229.14:20:08.00:data_valid=on 2006.229.14:20:08.00:midob 2006.229.14:20:09.14/onsource/TRACKING 2006.229.14:20:09.14/wx/27.51,1002.1,100 2006.229.14:20:09.25/cable/+6.4139E-03 2006.229.14:20:10.34/va/01,08,usb,yes,31,33 2006.229.14:20:10.34/va/02,07,usb,yes,33,34 2006.229.14:20:10.34/va/03,06,usb,yes,41,44 2006.229.14:20:10.34/va/04,07,usb,yes,35,36 2006.229.14:20:10.34/va/05,04,usb,yes,31,31 2006.229.14:20:10.34/va/06,04,usb,yes,35,34 2006.229.14:20:10.34/va/07,05,usb,yes,31,31 2006.229.14:20:10.34/va/08,06,usb,yes,22,27 2006.229.14:20:10.57/valo/01,524.99,yes,locked 2006.229.14:20:10.57/valo/02,534.99,yes,locked 2006.229.14:20:10.57/valo/03,564.99,yes,locked 2006.229.14:20:10.57/valo/04,624.99,yes,locked 2006.229.14:20:10.57/valo/05,734.99,yes,locked 2006.229.14:20:10.57/valo/06,814.99,yes,locked 2006.229.14:20:10.57/valo/07,864.99,yes,locked 2006.229.14:20:10.57/valo/08,884.99,yes,locked 2006.229.14:20:11.66/vb/01,04,usb,yes,32,29 2006.229.14:20:11.66/vb/02,04,usb,yes,34,34 2006.229.14:20:11.66/vb/03,04,usb,yes,31,34 2006.229.14:20:11.66/vb/04,04,usb,yes,36,34 2006.229.14:20:11.66/vb/05,04,usb,yes,28,30 2006.229.14:20:11.66/vb/06,04,usb,yes,32,28 2006.229.14:20:11.66/vb/07,04,usb,yes,32,32 2006.229.14:20:11.66/vb/08,04,usb,yes,30,33 2006.229.14:20:11.90/vblo/01,629.99,yes,locked 2006.229.14:20:11.90/vblo/02,634.99,yes,locked 2006.229.14:20:11.90/vblo/03,649.99,yes,locked 2006.229.14:20:11.90/vblo/04,679.99,yes,locked 2006.229.14:20:11.90/vblo/05,709.99,yes,locked 2006.229.14:20:11.90/vblo/06,719.99,yes,locked 2006.229.14:20:11.90/vblo/07,734.99,yes,locked 2006.229.14:20:11.90/vblo/08,744.99,yes,locked 2006.229.14:20:12.05/vabw/8 2006.229.14:20:12.20/vbbw/8 2006.229.14:20:12.29/xfe/off,on,12.2 2006.229.14:20:12.67/ifatt/23,28,28,28 2006.229.14:20:13.08/fmout-gps/S +4.58E-07 2006.229.14:20:13.12:!2006.229.14:20:48 2006.229.14:20:48.00:data_valid=off 2006.229.14:20:48.00:"et 2006.229.14:20:48.00:!+3s 2006.229.14:20:51.01:"tape 2006.229.14:20:51.01:postob 2006.229.14:20:51.17/cable/+6.4150E-03 2006.229.14:20:51.17/wx/27.51,1002.0,100 2006.229.14:20:52.09/fmout-gps/S +4.59E-07 2006.229.14:20:52.09:scan_name=229-1422,jd0608,170 2006.229.14:20:52.09:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.14:20:53.14#flagr#flagr/antenna,new-source 2006.229.14:20:53.14:checkk5 2006.229.14:20:53.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:20:53.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:20:54.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:20:54.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:20:55.15/chk_obsdata//k5ts1/T2291420??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:20:55.57/chk_obsdata//k5ts2/T2291420??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:20:55.98/chk_obsdata//k5ts3/T2291420??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:20:56.38/chk_obsdata//k5ts4/T2291420??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:20:57.11/k5log//k5ts1_log_newline 2006.229.14:20:57.82/k5log//k5ts2_log_newline 2006.229.14:20:58.53/k5log//k5ts3_log_newline 2006.229.14:20:59.23/k5log//k5ts4_log_newline 2006.229.14:20:59.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:20:59.25:setupk4=1 2006.229.14:20:59.25$setupk4/echo=on 2006.229.14:20:59.25$setupk4/pcalon 2006.229.14:20:59.25$pcalon/"no phase cal control is implemented here 2006.229.14:20:59.25$setupk4/"tpicd=stop 2006.229.14:20:59.25$setupk4/"rec=synch_on 2006.229.14:20:59.25$setupk4/"rec_mode=128 2006.229.14:20:59.25$setupk4/!* 2006.229.14:20:59.25$setupk4/recpk4 2006.229.14:20:59.25$recpk4/recpatch= 2006.229.14:20:59.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:20:59.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:20:59.25$setupk4/vck44 2006.229.14:20:59.26$vck44/valo=1,524.99 2006.229.14:20:59.26#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.14:20:59.26#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.14:20:59.26#ibcon#ireg 17 cls_cnt 0 2006.229.14:20:59.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:20:59.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:20:59.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:20:59.26#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:20:59.26#ibcon#first serial, iclass 27, count 0 2006.229.14:20:59.26#ibcon#enter sib2, iclass 27, count 0 2006.229.14:20:59.26#ibcon#flushed, iclass 27, count 0 2006.229.14:20:59.26#ibcon#about to write, iclass 27, count 0 2006.229.14:20:59.26#ibcon#wrote, iclass 27, count 0 2006.229.14:20:59.26#ibcon#about to read 3, iclass 27, count 0 2006.229.14:20:59.27#ibcon#read 3, iclass 27, count 0 2006.229.14:20:59.27#ibcon#about to read 4, iclass 27, count 0 2006.229.14:20:59.27#ibcon#read 4, iclass 27, count 0 2006.229.14:20:59.27#ibcon#about to read 5, iclass 27, count 0 2006.229.14:20:59.27#ibcon#read 5, iclass 27, count 0 2006.229.14:20:59.27#ibcon#about to read 6, iclass 27, count 0 2006.229.14:20:59.27#ibcon#read 6, iclass 27, count 0 2006.229.14:20:59.27#ibcon#end of sib2, iclass 27, count 0 2006.229.14:20:59.27#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:20:59.27#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:20:59.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:20:59.27#ibcon#*before write, iclass 27, count 0 2006.229.14:20:59.27#ibcon#enter sib2, iclass 27, count 0 2006.229.14:20:59.27#ibcon#flushed, iclass 27, count 0 2006.229.14:20:59.27#ibcon#about to write, iclass 27, count 0 2006.229.14:20:59.27#ibcon#wrote, iclass 27, count 0 2006.229.14:20:59.27#ibcon#about to read 3, iclass 27, count 0 2006.229.14:20:59.32#ibcon#read 3, iclass 27, count 0 2006.229.14:20:59.32#ibcon#about to read 4, iclass 27, count 0 2006.229.14:20:59.32#ibcon#read 4, iclass 27, count 0 2006.229.14:20:59.32#ibcon#about to read 5, iclass 27, count 0 2006.229.14:20:59.32#ibcon#read 5, iclass 27, count 0 2006.229.14:20:59.32#ibcon#about to read 6, iclass 27, count 0 2006.229.14:20:59.32#ibcon#read 6, iclass 27, count 0 2006.229.14:20:59.32#ibcon#end of sib2, iclass 27, count 0 2006.229.14:20:59.32#ibcon#*after write, iclass 27, count 0 2006.229.14:20:59.32#ibcon#*before return 0, iclass 27, count 0 2006.229.14:20:59.32#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:20:59.32#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:20:59.32#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:20:59.32#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:20:59.32$vck44/va=1,8 2006.229.14:20:59.32#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.14:20:59.32#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.14:20:59.32#ibcon#ireg 11 cls_cnt 2 2006.229.14:20:59.32#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:20:59.32#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:20:59.32#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:20:59.32#ibcon#enter wrdev, iclass 29, count 2 2006.229.14:20:59.32#ibcon#first serial, iclass 29, count 2 2006.229.14:20:59.32#ibcon#enter sib2, iclass 29, count 2 2006.229.14:20:59.32#ibcon#flushed, iclass 29, count 2 2006.229.14:20:59.32#ibcon#about to write, iclass 29, count 2 2006.229.14:20:59.32#ibcon#wrote, iclass 29, count 2 2006.229.14:20:59.32#ibcon#about to read 3, iclass 29, count 2 2006.229.14:20:59.34#ibcon#read 3, iclass 29, count 2 2006.229.14:20:59.34#ibcon#about to read 4, iclass 29, count 2 2006.229.14:20:59.34#ibcon#read 4, iclass 29, count 2 2006.229.14:20:59.34#ibcon#about to read 5, iclass 29, count 2 2006.229.14:20:59.34#ibcon#read 5, iclass 29, count 2 2006.229.14:20:59.34#ibcon#about to read 6, iclass 29, count 2 2006.229.14:20:59.34#ibcon#read 6, iclass 29, count 2 2006.229.14:20:59.34#ibcon#end of sib2, iclass 29, count 2 2006.229.14:20:59.34#ibcon#*mode == 0, iclass 29, count 2 2006.229.14:20:59.34#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.14:20:59.34#ibcon#[25=AT01-08\r\n] 2006.229.14:20:59.34#ibcon#*before write, iclass 29, count 2 2006.229.14:20:59.34#ibcon#enter sib2, iclass 29, count 2 2006.229.14:20:59.34#ibcon#flushed, iclass 29, count 2 2006.229.14:20:59.34#ibcon#about to write, iclass 29, count 2 2006.229.14:20:59.34#ibcon#wrote, iclass 29, count 2 2006.229.14:20:59.34#ibcon#about to read 3, iclass 29, count 2 2006.229.14:20:59.37#ibcon#read 3, iclass 29, count 2 2006.229.14:20:59.37#ibcon#about to read 4, iclass 29, count 2 2006.229.14:20:59.37#ibcon#read 4, iclass 29, count 2 2006.229.14:20:59.37#ibcon#about to read 5, iclass 29, count 2 2006.229.14:20:59.37#ibcon#read 5, iclass 29, count 2 2006.229.14:20:59.37#ibcon#about to read 6, iclass 29, count 2 2006.229.14:20:59.37#ibcon#read 6, iclass 29, count 2 2006.229.14:20:59.37#ibcon#end of sib2, iclass 29, count 2 2006.229.14:20:59.37#ibcon#*after write, iclass 29, count 2 2006.229.14:20:59.37#ibcon#*before return 0, iclass 29, count 2 2006.229.14:20:59.37#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:20:59.37#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:20:59.37#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.14:20:59.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:20:59.37#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:20:59.49#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:20:59.49#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:20:59.49#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:20:59.49#ibcon#first serial, iclass 29, count 0 2006.229.14:20:59.49#ibcon#enter sib2, iclass 29, count 0 2006.229.14:20:59.49#ibcon#flushed, iclass 29, count 0 2006.229.14:20:59.49#ibcon#about to write, iclass 29, count 0 2006.229.14:20:59.49#ibcon#wrote, iclass 29, count 0 2006.229.14:20:59.49#ibcon#about to read 3, iclass 29, count 0 2006.229.14:20:59.51#ibcon#read 3, iclass 29, count 0 2006.229.14:20:59.51#ibcon#about to read 4, iclass 29, count 0 2006.229.14:20:59.51#ibcon#read 4, iclass 29, count 0 2006.229.14:20:59.51#ibcon#about to read 5, iclass 29, count 0 2006.229.14:20:59.51#ibcon#read 5, iclass 29, count 0 2006.229.14:20:59.51#ibcon#about to read 6, iclass 29, count 0 2006.229.14:20:59.51#ibcon#read 6, iclass 29, count 0 2006.229.14:20:59.51#ibcon#end of sib2, iclass 29, count 0 2006.229.14:20:59.51#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:20:59.51#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:20:59.51#ibcon#[25=USB\r\n] 2006.229.14:20:59.51#ibcon#*before write, iclass 29, count 0 2006.229.14:20:59.51#ibcon#enter sib2, iclass 29, count 0 2006.229.14:20:59.51#ibcon#flushed, iclass 29, count 0 2006.229.14:20:59.51#ibcon#about to write, iclass 29, count 0 2006.229.14:20:59.51#ibcon#wrote, iclass 29, count 0 2006.229.14:20:59.51#ibcon#about to read 3, iclass 29, count 0 2006.229.14:20:59.54#ibcon#read 3, iclass 29, count 0 2006.229.14:20:59.54#ibcon#about to read 4, iclass 29, count 0 2006.229.14:20:59.54#ibcon#read 4, iclass 29, count 0 2006.229.14:20:59.54#ibcon#about to read 5, iclass 29, count 0 2006.229.14:20:59.54#ibcon#read 5, iclass 29, count 0 2006.229.14:20:59.54#ibcon#about to read 6, iclass 29, count 0 2006.229.14:20:59.54#ibcon#read 6, iclass 29, count 0 2006.229.14:20:59.54#ibcon#end of sib2, iclass 29, count 0 2006.229.14:20:59.54#ibcon#*after write, iclass 29, count 0 2006.229.14:20:59.54#ibcon#*before return 0, iclass 29, count 0 2006.229.14:20:59.54#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:20:59.54#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:20:59.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:20:59.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:20:59.54$vck44/valo=2,534.99 2006.229.14:20:59.54#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.14:20:59.54#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.14:20:59.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:20:59.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:20:59.54#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:20:59.54#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:20:59.54#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:20:59.54#ibcon#first serial, iclass 31, count 0 2006.229.14:20:59.54#ibcon#enter sib2, iclass 31, count 0 2006.229.14:20:59.54#ibcon#flushed, iclass 31, count 0 2006.229.14:20:59.54#ibcon#about to write, iclass 31, count 0 2006.229.14:20:59.54#ibcon#wrote, iclass 31, count 0 2006.229.14:20:59.54#ibcon#about to read 3, iclass 31, count 0 2006.229.14:20:59.56#ibcon#read 3, iclass 31, count 0 2006.229.14:20:59.56#ibcon#about to read 4, iclass 31, count 0 2006.229.14:20:59.56#ibcon#read 4, iclass 31, count 0 2006.229.14:20:59.56#ibcon#about to read 5, iclass 31, count 0 2006.229.14:20:59.56#ibcon#read 5, iclass 31, count 0 2006.229.14:20:59.56#ibcon#about to read 6, iclass 31, count 0 2006.229.14:20:59.56#ibcon#read 6, iclass 31, count 0 2006.229.14:20:59.56#ibcon#end of sib2, iclass 31, count 0 2006.229.14:20:59.56#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:20:59.56#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:20:59.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:20:59.56#ibcon#*before write, iclass 31, count 0 2006.229.14:20:59.56#ibcon#enter sib2, iclass 31, count 0 2006.229.14:20:59.56#ibcon#flushed, iclass 31, count 0 2006.229.14:20:59.56#ibcon#about to write, iclass 31, count 0 2006.229.14:20:59.56#ibcon#wrote, iclass 31, count 0 2006.229.14:20:59.56#ibcon#about to read 3, iclass 31, count 0 2006.229.14:20:59.60#ibcon#read 3, iclass 31, count 0 2006.229.14:20:59.60#ibcon#about to read 4, iclass 31, count 0 2006.229.14:20:59.60#ibcon#read 4, iclass 31, count 0 2006.229.14:20:59.60#ibcon#about to read 5, iclass 31, count 0 2006.229.14:20:59.60#ibcon#read 5, iclass 31, count 0 2006.229.14:20:59.60#ibcon#about to read 6, iclass 31, count 0 2006.229.14:20:59.60#ibcon#read 6, iclass 31, count 0 2006.229.14:20:59.60#ibcon#end of sib2, iclass 31, count 0 2006.229.14:20:59.60#ibcon#*after write, iclass 31, count 0 2006.229.14:20:59.60#ibcon#*before return 0, iclass 31, count 0 2006.229.14:20:59.60#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:20:59.60#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:20:59.60#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:20:59.60#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:20:59.60$vck44/va=2,7 2006.229.14:20:59.60#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.14:20:59.60#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.14:20:59.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:20:59.60#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:20:59.66#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:20:59.66#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:20:59.66#ibcon#enter wrdev, iclass 33, count 2 2006.229.14:20:59.66#ibcon#first serial, iclass 33, count 2 2006.229.14:20:59.66#ibcon#enter sib2, iclass 33, count 2 2006.229.14:20:59.66#ibcon#flushed, iclass 33, count 2 2006.229.14:20:59.66#ibcon#about to write, iclass 33, count 2 2006.229.14:20:59.66#ibcon#wrote, iclass 33, count 2 2006.229.14:20:59.66#ibcon#about to read 3, iclass 33, count 2 2006.229.14:20:59.68#ibcon#read 3, iclass 33, count 2 2006.229.14:20:59.68#ibcon#about to read 4, iclass 33, count 2 2006.229.14:20:59.68#ibcon#read 4, iclass 33, count 2 2006.229.14:20:59.68#ibcon#about to read 5, iclass 33, count 2 2006.229.14:20:59.68#ibcon#read 5, iclass 33, count 2 2006.229.14:20:59.68#ibcon#about to read 6, iclass 33, count 2 2006.229.14:20:59.68#ibcon#read 6, iclass 33, count 2 2006.229.14:20:59.68#ibcon#end of sib2, iclass 33, count 2 2006.229.14:20:59.68#ibcon#*mode == 0, iclass 33, count 2 2006.229.14:20:59.68#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.14:20:59.68#ibcon#[25=AT02-07\r\n] 2006.229.14:20:59.68#ibcon#*before write, iclass 33, count 2 2006.229.14:20:59.68#ibcon#enter sib2, iclass 33, count 2 2006.229.14:20:59.68#ibcon#flushed, iclass 33, count 2 2006.229.14:20:59.68#ibcon#about to write, iclass 33, count 2 2006.229.14:20:59.68#ibcon#wrote, iclass 33, count 2 2006.229.14:20:59.68#ibcon#about to read 3, iclass 33, count 2 2006.229.14:20:59.71#ibcon#read 3, iclass 33, count 2 2006.229.14:20:59.71#ibcon#about to read 4, iclass 33, count 2 2006.229.14:20:59.71#ibcon#read 4, iclass 33, count 2 2006.229.14:20:59.71#ibcon#about to read 5, iclass 33, count 2 2006.229.14:20:59.71#ibcon#read 5, iclass 33, count 2 2006.229.14:20:59.71#ibcon#about to read 6, iclass 33, count 2 2006.229.14:20:59.71#ibcon#read 6, iclass 33, count 2 2006.229.14:20:59.71#ibcon#end of sib2, iclass 33, count 2 2006.229.14:20:59.71#ibcon#*after write, iclass 33, count 2 2006.229.14:20:59.71#ibcon#*before return 0, iclass 33, count 2 2006.229.14:20:59.71#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:20:59.71#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:20:59.71#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.14:20:59.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:20:59.71#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:20:59.83#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:20:59.83#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:20:59.83#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:20:59.83#ibcon#first serial, iclass 33, count 0 2006.229.14:20:59.83#ibcon#enter sib2, iclass 33, count 0 2006.229.14:20:59.83#ibcon#flushed, iclass 33, count 0 2006.229.14:20:59.83#ibcon#about to write, iclass 33, count 0 2006.229.14:20:59.83#ibcon#wrote, iclass 33, count 0 2006.229.14:20:59.83#ibcon#about to read 3, iclass 33, count 0 2006.229.14:20:59.85#ibcon#read 3, iclass 33, count 0 2006.229.14:20:59.85#ibcon#about to read 4, iclass 33, count 0 2006.229.14:20:59.85#ibcon#read 4, iclass 33, count 0 2006.229.14:20:59.85#ibcon#about to read 5, iclass 33, count 0 2006.229.14:20:59.85#ibcon#read 5, iclass 33, count 0 2006.229.14:20:59.85#ibcon#about to read 6, iclass 33, count 0 2006.229.14:20:59.85#ibcon#read 6, iclass 33, count 0 2006.229.14:20:59.85#ibcon#end of sib2, iclass 33, count 0 2006.229.14:20:59.85#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:20:59.85#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:20:59.85#ibcon#[25=USB\r\n] 2006.229.14:20:59.85#ibcon#*before write, iclass 33, count 0 2006.229.14:20:59.85#ibcon#enter sib2, iclass 33, count 0 2006.229.14:20:59.85#ibcon#flushed, iclass 33, count 0 2006.229.14:20:59.85#ibcon#about to write, iclass 33, count 0 2006.229.14:20:59.85#ibcon#wrote, iclass 33, count 0 2006.229.14:20:59.85#ibcon#about to read 3, iclass 33, count 0 2006.229.14:20:59.88#ibcon#read 3, iclass 33, count 0 2006.229.14:20:59.88#ibcon#about to read 4, iclass 33, count 0 2006.229.14:20:59.88#ibcon#read 4, iclass 33, count 0 2006.229.14:20:59.88#ibcon#about to read 5, iclass 33, count 0 2006.229.14:20:59.88#ibcon#read 5, iclass 33, count 0 2006.229.14:20:59.88#ibcon#about to read 6, iclass 33, count 0 2006.229.14:20:59.88#ibcon#read 6, iclass 33, count 0 2006.229.14:20:59.88#ibcon#end of sib2, iclass 33, count 0 2006.229.14:20:59.88#ibcon#*after write, iclass 33, count 0 2006.229.14:20:59.88#ibcon#*before return 0, iclass 33, count 0 2006.229.14:20:59.88#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:20:59.88#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:20:59.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:20:59.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:20:59.88$vck44/valo=3,564.99 2006.229.14:20:59.88#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.14:20:59.88#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.14:20:59.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:20:59.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:20:59.88#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:20:59.88#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:20:59.88#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:20:59.88#ibcon#first serial, iclass 35, count 0 2006.229.14:20:59.88#ibcon#enter sib2, iclass 35, count 0 2006.229.14:20:59.88#ibcon#flushed, iclass 35, count 0 2006.229.14:20:59.88#ibcon#about to write, iclass 35, count 0 2006.229.14:20:59.88#ibcon#wrote, iclass 35, count 0 2006.229.14:20:59.88#ibcon#about to read 3, iclass 35, count 0 2006.229.14:20:59.90#ibcon#read 3, iclass 35, count 0 2006.229.14:20:59.90#ibcon#about to read 4, iclass 35, count 0 2006.229.14:20:59.90#ibcon#read 4, iclass 35, count 0 2006.229.14:20:59.90#ibcon#about to read 5, iclass 35, count 0 2006.229.14:20:59.90#ibcon#read 5, iclass 35, count 0 2006.229.14:20:59.90#ibcon#about to read 6, iclass 35, count 0 2006.229.14:20:59.90#ibcon#read 6, iclass 35, count 0 2006.229.14:20:59.90#ibcon#end of sib2, iclass 35, count 0 2006.229.14:20:59.90#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:20:59.90#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:20:59.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:20:59.90#ibcon#*before write, iclass 35, count 0 2006.229.14:20:59.90#ibcon#enter sib2, iclass 35, count 0 2006.229.14:20:59.90#ibcon#flushed, iclass 35, count 0 2006.229.14:20:59.90#ibcon#about to write, iclass 35, count 0 2006.229.14:20:59.90#ibcon#wrote, iclass 35, count 0 2006.229.14:20:59.90#ibcon#about to read 3, iclass 35, count 0 2006.229.14:20:59.94#ibcon#read 3, iclass 35, count 0 2006.229.14:20:59.94#ibcon#about to read 4, iclass 35, count 0 2006.229.14:20:59.94#ibcon#read 4, iclass 35, count 0 2006.229.14:20:59.94#ibcon#about to read 5, iclass 35, count 0 2006.229.14:20:59.94#ibcon#read 5, iclass 35, count 0 2006.229.14:20:59.94#ibcon#about to read 6, iclass 35, count 0 2006.229.14:20:59.94#ibcon#read 6, iclass 35, count 0 2006.229.14:20:59.94#ibcon#end of sib2, iclass 35, count 0 2006.229.14:20:59.94#ibcon#*after write, iclass 35, count 0 2006.229.14:20:59.94#ibcon#*before return 0, iclass 35, count 0 2006.229.14:20:59.94#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:20:59.94#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:20:59.94#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:20:59.94#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:20:59.94$vck44/va=3,6 2006.229.14:20:59.94#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.14:20:59.94#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.14:20:59.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:20:59.94#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:00.00#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:00.00#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:00.00#ibcon#enter wrdev, iclass 37, count 2 2006.229.14:21:00.00#ibcon#first serial, iclass 37, count 2 2006.229.14:21:00.00#ibcon#enter sib2, iclass 37, count 2 2006.229.14:21:00.00#ibcon#flushed, iclass 37, count 2 2006.229.14:21:00.00#ibcon#about to write, iclass 37, count 2 2006.229.14:21:00.00#ibcon#wrote, iclass 37, count 2 2006.229.14:21:00.00#ibcon#about to read 3, iclass 37, count 2 2006.229.14:21:00.02#ibcon#read 3, iclass 37, count 2 2006.229.14:21:00.02#ibcon#about to read 4, iclass 37, count 2 2006.229.14:21:00.02#ibcon#read 4, iclass 37, count 2 2006.229.14:21:00.02#ibcon#about to read 5, iclass 37, count 2 2006.229.14:21:00.02#ibcon#read 5, iclass 37, count 2 2006.229.14:21:00.02#ibcon#about to read 6, iclass 37, count 2 2006.229.14:21:00.02#ibcon#read 6, iclass 37, count 2 2006.229.14:21:00.02#ibcon#end of sib2, iclass 37, count 2 2006.229.14:21:00.02#ibcon#*mode == 0, iclass 37, count 2 2006.229.14:21:00.02#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.14:21:00.02#ibcon#[25=AT03-06\r\n] 2006.229.14:21:00.02#ibcon#*before write, iclass 37, count 2 2006.229.14:21:00.02#ibcon#enter sib2, iclass 37, count 2 2006.229.14:21:00.02#ibcon#flushed, iclass 37, count 2 2006.229.14:21:00.02#ibcon#about to write, iclass 37, count 2 2006.229.14:21:00.02#ibcon#wrote, iclass 37, count 2 2006.229.14:21:00.02#ibcon#about to read 3, iclass 37, count 2 2006.229.14:21:00.05#ibcon#read 3, iclass 37, count 2 2006.229.14:21:00.05#ibcon#about to read 4, iclass 37, count 2 2006.229.14:21:00.05#ibcon#read 4, iclass 37, count 2 2006.229.14:21:00.05#ibcon#about to read 5, iclass 37, count 2 2006.229.14:21:00.05#ibcon#read 5, iclass 37, count 2 2006.229.14:21:00.05#ibcon#about to read 6, iclass 37, count 2 2006.229.14:21:00.05#ibcon#read 6, iclass 37, count 2 2006.229.14:21:00.05#ibcon#end of sib2, iclass 37, count 2 2006.229.14:21:00.05#ibcon#*after write, iclass 37, count 2 2006.229.14:21:00.05#ibcon#*before return 0, iclass 37, count 2 2006.229.14:21:00.05#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:00.05#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:00.05#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.14:21:00.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:00.05#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:00.17#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:00.17#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:00.17#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:21:00.17#ibcon#first serial, iclass 37, count 0 2006.229.14:21:00.17#ibcon#enter sib2, iclass 37, count 0 2006.229.14:21:00.17#ibcon#flushed, iclass 37, count 0 2006.229.14:21:00.17#ibcon#about to write, iclass 37, count 0 2006.229.14:21:00.17#ibcon#wrote, iclass 37, count 0 2006.229.14:21:00.17#ibcon#about to read 3, iclass 37, count 0 2006.229.14:21:00.19#ibcon#read 3, iclass 37, count 0 2006.229.14:21:00.19#ibcon#about to read 4, iclass 37, count 0 2006.229.14:21:00.19#ibcon#read 4, iclass 37, count 0 2006.229.14:21:00.19#ibcon#about to read 5, iclass 37, count 0 2006.229.14:21:00.19#ibcon#read 5, iclass 37, count 0 2006.229.14:21:00.19#ibcon#about to read 6, iclass 37, count 0 2006.229.14:21:00.19#ibcon#read 6, iclass 37, count 0 2006.229.14:21:00.19#ibcon#end of sib2, iclass 37, count 0 2006.229.14:21:00.19#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:21:00.19#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:21:00.19#ibcon#[25=USB\r\n] 2006.229.14:21:00.19#ibcon#*before write, iclass 37, count 0 2006.229.14:21:00.19#ibcon#enter sib2, iclass 37, count 0 2006.229.14:21:00.19#ibcon#flushed, iclass 37, count 0 2006.229.14:21:00.19#ibcon#about to write, iclass 37, count 0 2006.229.14:21:00.19#ibcon#wrote, iclass 37, count 0 2006.229.14:21:00.19#ibcon#about to read 3, iclass 37, count 0 2006.229.14:21:00.22#ibcon#read 3, iclass 37, count 0 2006.229.14:21:00.22#ibcon#about to read 4, iclass 37, count 0 2006.229.14:21:00.22#ibcon#read 4, iclass 37, count 0 2006.229.14:21:00.22#ibcon#about to read 5, iclass 37, count 0 2006.229.14:21:00.22#ibcon#read 5, iclass 37, count 0 2006.229.14:21:00.22#ibcon#about to read 6, iclass 37, count 0 2006.229.14:21:00.22#ibcon#read 6, iclass 37, count 0 2006.229.14:21:00.22#ibcon#end of sib2, iclass 37, count 0 2006.229.14:21:00.22#ibcon#*after write, iclass 37, count 0 2006.229.14:21:00.22#ibcon#*before return 0, iclass 37, count 0 2006.229.14:21:00.22#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:00.22#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:00.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:21:00.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:21:00.22$vck44/valo=4,624.99 2006.229.14:21:00.22#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.14:21:00.22#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.14:21:00.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:00.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:00.22#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:00.22#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:00.22#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:21:00.22#ibcon#first serial, iclass 39, count 0 2006.229.14:21:00.22#ibcon#enter sib2, iclass 39, count 0 2006.229.14:21:00.22#ibcon#flushed, iclass 39, count 0 2006.229.14:21:00.22#ibcon#about to write, iclass 39, count 0 2006.229.14:21:00.22#ibcon#wrote, iclass 39, count 0 2006.229.14:21:00.22#ibcon#about to read 3, iclass 39, count 0 2006.229.14:21:00.24#ibcon#read 3, iclass 39, count 0 2006.229.14:21:00.24#ibcon#about to read 4, iclass 39, count 0 2006.229.14:21:00.24#ibcon#read 4, iclass 39, count 0 2006.229.14:21:00.24#ibcon#about to read 5, iclass 39, count 0 2006.229.14:21:00.24#ibcon#read 5, iclass 39, count 0 2006.229.14:21:00.24#ibcon#about to read 6, iclass 39, count 0 2006.229.14:21:00.24#ibcon#read 6, iclass 39, count 0 2006.229.14:21:00.24#ibcon#end of sib2, iclass 39, count 0 2006.229.14:21:00.24#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:21:00.24#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:21:00.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:21:00.24#ibcon#*before write, iclass 39, count 0 2006.229.14:21:00.24#ibcon#enter sib2, iclass 39, count 0 2006.229.14:21:00.24#ibcon#flushed, iclass 39, count 0 2006.229.14:21:00.24#ibcon#about to write, iclass 39, count 0 2006.229.14:21:00.24#ibcon#wrote, iclass 39, count 0 2006.229.14:21:00.24#ibcon#about to read 3, iclass 39, count 0 2006.229.14:21:00.28#ibcon#read 3, iclass 39, count 0 2006.229.14:21:00.28#ibcon#about to read 4, iclass 39, count 0 2006.229.14:21:00.28#ibcon#read 4, iclass 39, count 0 2006.229.14:21:00.28#ibcon#about to read 5, iclass 39, count 0 2006.229.14:21:00.28#ibcon#read 5, iclass 39, count 0 2006.229.14:21:00.28#ibcon#about to read 6, iclass 39, count 0 2006.229.14:21:00.28#ibcon#read 6, iclass 39, count 0 2006.229.14:21:00.28#ibcon#end of sib2, iclass 39, count 0 2006.229.14:21:00.28#ibcon#*after write, iclass 39, count 0 2006.229.14:21:00.28#ibcon#*before return 0, iclass 39, count 0 2006.229.14:21:00.28#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:00.28#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:00.28#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:21:00.28#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:21:00.28$vck44/va=4,7 2006.229.14:21:00.28#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.14:21:00.28#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.14:21:00.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:00.28#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:00.34#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:00.34#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:00.34#ibcon#enter wrdev, iclass 3, count 2 2006.229.14:21:00.34#ibcon#first serial, iclass 3, count 2 2006.229.14:21:00.34#ibcon#enter sib2, iclass 3, count 2 2006.229.14:21:00.34#ibcon#flushed, iclass 3, count 2 2006.229.14:21:00.34#ibcon#about to write, iclass 3, count 2 2006.229.14:21:00.34#ibcon#wrote, iclass 3, count 2 2006.229.14:21:00.34#ibcon#about to read 3, iclass 3, count 2 2006.229.14:21:00.36#ibcon#read 3, iclass 3, count 2 2006.229.14:21:00.36#ibcon#about to read 4, iclass 3, count 2 2006.229.14:21:00.36#ibcon#read 4, iclass 3, count 2 2006.229.14:21:00.36#ibcon#about to read 5, iclass 3, count 2 2006.229.14:21:00.36#ibcon#read 5, iclass 3, count 2 2006.229.14:21:00.36#ibcon#about to read 6, iclass 3, count 2 2006.229.14:21:00.36#ibcon#read 6, iclass 3, count 2 2006.229.14:21:00.36#ibcon#end of sib2, iclass 3, count 2 2006.229.14:21:00.36#ibcon#*mode == 0, iclass 3, count 2 2006.229.14:21:00.36#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.14:21:00.36#ibcon#[25=AT04-07\r\n] 2006.229.14:21:00.36#ibcon#*before write, iclass 3, count 2 2006.229.14:21:00.36#ibcon#enter sib2, iclass 3, count 2 2006.229.14:21:00.36#ibcon#flushed, iclass 3, count 2 2006.229.14:21:00.36#ibcon#about to write, iclass 3, count 2 2006.229.14:21:00.36#ibcon#wrote, iclass 3, count 2 2006.229.14:21:00.36#ibcon#about to read 3, iclass 3, count 2 2006.229.14:21:00.39#ibcon#read 3, iclass 3, count 2 2006.229.14:21:00.39#ibcon#about to read 4, iclass 3, count 2 2006.229.14:21:00.39#ibcon#read 4, iclass 3, count 2 2006.229.14:21:00.39#ibcon#about to read 5, iclass 3, count 2 2006.229.14:21:00.39#ibcon#read 5, iclass 3, count 2 2006.229.14:21:00.39#ibcon#about to read 6, iclass 3, count 2 2006.229.14:21:00.39#ibcon#read 6, iclass 3, count 2 2006.229.14:21:00.39#ibcon#end of sib2, iclass 3, count 2 2006.229.14:21:00.39#ibcon#*after write, iclass 3, count 2 2006.229.14:21:00.39#ibcon#*before return 0, iclass 3, count 2 2006.229.14:21:00.39#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:00.39#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:00.39#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.14:21:00.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:00.39#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:00.51#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:00.51#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:00.51#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:21:00.51#ibcon#first serial, iclass 3, count 0 2006.229.14:21:00.51#ibcon#enter sib2, iclass 3, count 0 2006.229.14:21:00.51#ibcon#flushed, iclass 3, count 0 2006.229.14:21:00.51#ibcon#about to write, iclass 3, count 0 2006.229.14:21:00.51#ibcon#wrote, iclass 3, count 0 2006.229.14:21:00.51#ibcon#about to read 3, iclass 3, count 0 2006.229.14:21:00.53#ibcon#read 3, iclass 3, count 0 2006.229.14:21:00.53#ibcon#about to read 4, iclass 3, count 0 2006.229.14:21:00.53#ibcon#read 4, iclass 3, count 0 2006.229.14:21:00.53#ibcon#about to read 5, iclass 3, count 0 2006.229.14:21:00.53#ibcon#read 5, iclass 3, count 0 2006.229.14:21:00.53#ibcon#about to read 6, iclass 3, count 0 2006.229.14:21:00.53#ibcon#read 6, iclass 3, count 0 2006.229.14:21:00.53#ibcon#end of sib2, iclass 3, count 0 2006.229.14:21:00.53#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:21:00.53#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:21:00.53#ibcon#[25=USB\r\n] 2006.229.14:21:00.53#ibcon#*before write, iclass 3, count 0 2006.229.14:21:00.53#ibcon#enter sib2, iclass 3, count 0 2006.229.14:21:00.53#ibcon#flushed, iclass 3, count 0 2006.229.14:21:00.53#ibcon#about to write, iclass 3, count 0 2006.229.14:21:00.53#ibcon#wrote, iclass 3, count 0 2006.229.14:21:00.53#ibcon#about to read 3, iclass 3, count 0 2006.229.14:21:00.56#ibcon#read 3, iclass 3, count 0 2006.229.14:21:00.56#ibcon#about to read 4, iclass 3, count 0 2006.229.14:21:00.56#ibcon#read 4, iclass 3, count 0 2006.229.14:21:00.56#ibcon#about to read 5, iclass 3, count 0 2006.229.14:21:00.56#ibcon#read 5, iclass 3, count 0 2006.229.14:21:00.56#ibcon#about to read 6, iclass 3, count 0 2006.229.14:21:00.56#ibcon#read 6, iclass 3, count 0 2006.229.14:21:00.56#ibcon#end of sib2, iclass 3, count 0 2006.229.14:21:00.56#ibcon#*after write, iclass 3, count 0 2006.229.14:21:00.56#ibcon#*before return 0, iclass 3, count 0 2006.229.14:21:00.56#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:00.56#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:00.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:21:00.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:21:00.56$vck44/valo=5,734.99 2006.229.14:21:00.56#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.14:21:00.56#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.14:21:00.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:00.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:00.56#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:00.56#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:00.56#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:21:00.56#ibcon#first serial, iclass 5, count 0 2006.229.14:21:00.56#ibcon#enter sib2, iclass 5, count 0 2006.229.14:21:00.56#ibcon#flushed, iclass 5, count 0 2006.229.14:21:00.56#ibcon#about to write, iclass 5, count 0 2006.229.14:21:00.56#ibcon#wrote, iclass 5, count 0 2006.229.14:21:00.56#ibcon#about to read 3, iclass 5, count 0 2006.229.14:21:00.58#ibcon#read 3, iclass 5, count 0 2006.229.14:21:00.58#ibcon#about to read 4, iclass 5, count 0 2006.229.14:21:00.58#ibcon#read 4, iclass 5, count 0 2006.229.14:21:00.58#ibcon#about to read 5, iclass 5, count 0 2006.229.14:21:00.58#ibcon#read 5, iclass 5, count 0 2006.229.14:21:00.58#ibcon#about to read 6, iclass 5, count 0 2006.229.14:21:00.58#ibcon#read 6, iclass 5, count 0 2006.229.14:21:00.58#ibcon#end of sib2, iclass 5, count 0 2006.229.14:21:00.58#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:21:00.58#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:21:00.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:21:00.58#ibcon#*before write, iclass 5, count 0 2006.229.14:21:00.58#ibcon#enter sib2, iclass 5, count 0 2006.229.14:21:00.58#ibcon#flushed, iclass 5, count 0 2006.229.14:21:00.58#ibcon#about to write, iclass 5, count 0 2006.229.14:21:00.58#ibcon#wrote, iclass 5, count 0 2006.229.14:21:00.58#ibcon#about to read 3, iclass 5, count 0 2006.229.14:21:00.62#ibcon#read 3, iclass 5, count 0 2006.229.14:21:00.62#ibcon#about to read 4, iclass 5, count 0 2006.229.14:21:00.62#ibcon#read 4, iclass 5, count 0 2006.229.14:21:00.62#ibcon#about to read 5, iclass 5, count 0 2006.229.14:21:00.62#ibcon#read 5, iclass 5, count 0 2006.229.14:21:00.62#ibcon#about to read 6, iclass 5, count 0 2006.229.14:21:00.62#ibcon#read 6, iclass 5, count 0 2006.229.14:21:00.62#ibcon#end of sib2, iclass 5, count 0 2006.229.14:21:00.62#ibcon#*after write, iclass 5, count 0 2006.229.14:21:00.62#ibcon#*before return 0, iclass 5, count 0 2006.229.14:21:00.62#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:00.62#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:00.62#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:21:00.62#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:21:00.62$vck44/va=5,4 2006.229.14:21:00.62#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.14:21:00.62#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.14:21:00.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:00.62#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:00.68#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:00.68#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:00.68#ibcon#enter wrdev, iclass 7, count 2 2006.229.14:21:00.68#ibcon#first serial, iclass 7, count 2 2006.229.14:21:00.68#ibcon#enter sib2, iclass 7, count 2 2006.229.14:21:00.68#ibcon#flushed, iclass 7, count 2 2006.229.14:21:00.68#ibcon#about to write, iclass 7, count 2 2006.229.14:21:00.68#ibcon#wrote, iclass 7, count 2 2006.229.14:21:00.68#ibcon#about to read 3, iclass 7, count 2 2006.229.14:21:00.70#ibcon#read 3, iclass 7, count 2 2006.229.14:21:00.70#ibcon#about to read 4, iclass 7, count 2 2006.229.14:21:00.70#ibcon#read 4, iclass 7, count 2 2006.229.14:21:00.70#ibcon#about to read 5, iclass 7, count 2 2006.229.14:21:00.70#ibcon#read 5, iclass 7, count 2 2006.229.14:21:00.70#ibcon#about to read 6, iclass 7, count 2 2006.229.14:21:00.70#ibcon#read 6, iclass 7, count 2 2006.229.14:21:00.70#ibcon#end of sib2, iclass 7, count 2 2006.229.14:21:00.70#ibcon#*mode == 0, iclass 7, count 2 2006.229.14:21:00.70#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.14:21:00.70#ibcon#[25=AT05-04\r\n] 2006.229.14:21:00.70#ibcon#*before write, iclass 7, count 2 2006.229.14:21:00.70#ibcon#enter sib2, iclass 7, count 2 2006.229.14:21:00.70#ibcon#flushed, iclass 7, count 2 2006.229.14:21:00.70#ibcon#about to write, iclass 7, count 2 2006.229.14:21:00.70#ibcon#wrote, iclass 7, count 2 2006.229.14:21:00.70#ibcon#about to read 3, iclass 7, count 2 2006.229.14:21:00.73#ibcon#read 3, iclass 7, count 2 2006.229.14:21:00.73#ibcon#about to read 4, iclass 7, count 2 2006.229.14:21:00.73#ibcon#read 4, iclass 7, count 2 2006.229.14:21:00.73#ibcon#about to read 5, iclass 7, count 2 2006.229.14:21:00.73#ibcon#read 5, iclass 7, count 2 2006.229.14:21:00.73#ibcon#about to read 6, iclass 7, count 2 2006.229.14:21:00.73#ibcon#read 6, iclass 7, count 2 2006.229.14:21:00.73#ibcon#end of sib2, iclass 7, count 2 2006.229.14:21:00.73#ibcon#*after write, iclass 7, count 2 2006.229.14:21:00.73#ibcon#*before return 0, iclass 7, count 2 2006.229.14:21:00.73#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:00.73#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:00.73#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.14:21:00.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:00.73#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:00.85#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:00.85#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:00.85#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:21:00.85#ibcon#first serial, iclass 7, count 0 2006.229.14:21:00.85#ibcon#enter sib2, iclass 7, count 0 2006.229.14:21:00.85#ibcon#flushed, iclass 7, count 0 2006.229.14:21:00.85#ibcon#about to write, iclass 7, count 0 2006.229.14:21:00.85#ibcon#wrote, iclass 7, count 0 2006.229.14:21:00.85#ibcon#about to read 3, iclass 7, count 0 2006.229.14:21:00.87#ibcon#read 3, iclass 7, count 0 2006.229.14:21:00.87#ibcon#about to read 4, iclass 7, count 0 2006.229.14:21:00.87#ibcon#read 4, iclass 7, count 0 2006.229.14:21:00.87#ibcon#about to read 5, iclass 7, count 0 2006.229.14:21:00.87#ibcon#read 5, iclass 7, count 0 2006.229.14:21:00.87#ibcon#about to read 6, iclass 7, count 0 2006.229.14:21:00.87#ibcon#read 6, iclass 7, count 0 2006.229.14:21:00.87#ibcon#end of sib2, iclass 7, count 0 2006.229.14:21:00.87#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:21:00.87#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:21:00.87#ibcon#[25=USB\r\n] 2006.229.14:21:00.87#ibcon#*before write, iclass 7, count 0 2006.229.14:21:00.87#ibcon#enter sib2, iclass 7, count 0 2006.229.14:21:00.87#ibcon#flushed, iclass 7, count 0 2006.229.14:21:00.87#ibcon#about to write, iclass 7, count 0 2006.229.14:21:00.87#ibcon#wrote, iclass 7, count 0 2006.229.14:21:00.87#ibcon#about to read 3, iclass 7, count 0 2006.229.14:21:00.90#ibcon#read 3, iclass 7, count 0 2006.229.14:21:00.90#ibcon#about to read 4, iclass 7, count 0 2006.229.14:21:00.90#ibcon#read 4, iclass 7, count 0 2006.229.14:21:00.90#ibcon#about to read 5, iclass 7, count 0 2006.229.14:21:00.90#ibcon#read 5, iclass 7, count 0 2006.229.14:21:00.90#ibcon#about to read 6, iclass 7, count 0 2006.229.14:21:00.90#ibcon#read 6, iclass 7, count 0 2006.229.14:21:00.90#ibcon#end of sib2, iclass 7, count 0 2006.229.14:21:00.90#ibcon#*after write, iclass 7, count 0 2006.229.14:21:00.90#ibcon#*before return 0, iclass 7, count 0 2006.229.14:21:00.90#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:00.90#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:00.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:21:00.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:21:00.90$vck44/valo=6,814.99 2006.229.14:21:00.90#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.14:21:00.90#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.14:21:00.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:00.90#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:21:00.90#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:21:00.90#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:21:00.90#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:21:00.90#ibcon#first serial, iclass 12, count 0 2006.229.14:21:00.90#ibcon#enter sib2, iclass 12, count 0 2006.229.14:21:00.90#ibcon#flushed, iclass 12, count 0 2006.229.14:21:00.90#ibcon#about to write, iclass 12, count 0 2006.229.14:21:00.90#ibcon#wrote, iclass 12, count 0 2006.229.14:21:00.90#ibcon#about to read 3, iclass 12, count 0 2006.229.14:21:00.92#ibcon#read 3, iclass 12, count 0 2006.229.14:21:00.92#ibcon#about to read 4, iclass 12, count 0 2006.229.14:21:00.92#ibcon#read 4, iclass 12, count 0 2006.229.14:21:00.92#ibcon#about to read 5, iclass 12, count 0 2006.229.14:21:00.92#ibcon#read 5, iclass 12, count 0 2006.229.14:21:00.92#ibcon#about to read 6, iclass 12, count 0 2006.229.14:21:00.92#ibcon#read 6, iclass 12, count 0 2006.229.14:21:00.92#ibcon#end of sib2, iclass 12, count 0 2006.229.14:21:00.92#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:21:00.92#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:21:00.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:21:00.92#ibcon#*before write, iclass 12, count 0 2006.229.14:21:00.92#ibcon#enter sib2, iclass 12, count 0 2006.229.14:21:00.92#ibcon#flushed, iclass 12, count 0 2006.229.14:21:00.92#ibcon#about to write, iclass 12, count 0 2006.229.14:21:00.92#ibcon#wrote, iclass 12, count 0 2006.229.14:21:00.92#ibcon#about to read 3, iclass 12, count 0 2006.229.14:21:00.93#abcon#<5=/06 1.4 2.3 27.511001002.0\r\n> 2006.229.14:21:00.95#abcon#{5=INTERFACE CLEAR} 2006.229.14:21:00.96#ibcon#read 3, iclass 12, count 0 2006.229.14:21:00.96#ibcon#about to read 4, iclass 12, count 0 2006.229.14:21:00.96#ibcon#read 4, iclass 12, count 0 2006.229.14:21:00.96#ibcon#about to read 5, iclass 12, count 0 2006.229.14:21:00.96#ibcon#read 5, iclass 12, count 0 2006.229.14:21:00.96#ibcon#about to read 6, iclass 12, count 0 2006.229.14:21:00.96#ibcon#read 6, iclass 12, count 0 2006.229.14:21:00.96#ibcon#end of sib2, iclass 12, count 0 2006.229.14:21:00.96#ibcon#*after write, iclass 12, count 0 2006.229.14:21:00.96#ibcon#*before return 0, iclass 12, count 0 2006.229.14:21:00.96#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:21:00.96#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:21:00.96#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:21:00.96#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:21:00.96$vck44/va=6,4 2006.229.14:21:00.96#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.14:21:00.96#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.14:21:00.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:00.96#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:21:01.01#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:21:01.02#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:21:01.02#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:21:01.02#ibcon#enter wrdev, iclass 16, count 2 2006.229.14:21:01.02#ibcon#first serial, iclass 16, count 2 2006.229.14:21:01.02#ibcon#enter sib2, iclass 16, count 2 2006.229.14:21:01.02#ibcon#flushed, iclass 16, count 2 2006.229.14:21:01.02#ibcon#about to write, iclass 16, count 2 2006.229.14:21:01.02#ibcon#wrote, iclass 16, count 2 2006.229.14:21:01.02#ibcon#about to read 3, iclass 16, count 2 2006.229.14:21:01.04#ibcon#read 3, iclass 16, count 2 2006.229.14:21:01.04#ibcon#about to read 4, iclass 16, count 2 2006.229.14:21:01.04#ibcon#read 4, iclass 16, count 2 2006.229.14:21:01.04#ibcon#about to read 5, iclass 16, count 2 2006.229.14:21:01.04#ibcon#read 5, iclass 16, count 2 2006.229.14:21:01.04#ibcon#about to read 6, iclass 16, count 2 2006.229.14:21:01.04#ibcon#read 6, iclass 16, count 2 2006.229.14:21:01.04#ibcon#end of sib2, iclass 16, count 2 2006.229.14:21:01.04#ibcon#*mode == 0, iclass 16, count 2 2006.229.14:21:01.04#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.14:21:01.04#ibcon#[25=AT06-04\r\n] 2006.229.14:21:01.04#ibcon#*before write, iclass 16, count 2 2006.229.14:21:01.04#ibcon#enter sib2, iclass 16, count 2 2006.229.14:21:01.04#ibcon#flushed, iclass 16, count 2 2006.229.14:21:01.04#ibcon#about to write, iclass 16, count 2 2006.229.14:21:01.04#ibcon#wrote, iclass 16, count 2 2006.229.14:21:01.04#ibcon#about to read 3, iclass 16, count 2 2006.229.14:21:01.07#ibcon#read 3, iclass 16, count 2 2006.229.14:21:01.07#ibcon#about to read 4, iclass 16, count 2 2006.229.14:21:01.07#ibcon#read 4, iclass 16, count 2 2006.229.14:21:01.07#ibcon#about to read 5, iclass 16, count 2 2006.229.14:21:01.07#ibcon#read 5, iclass 16, count 2 2006.229.14:21:01.07#ibcon#about to read 6, iclass 16, count 2 2006.229.14:21:01.07#ibcon#read 6, iclass 16, count 2 2006.229.14:21:01.07#ibcon#end of sib2, iclass 16, count 2 2006.229.14:21:01.07#ibcon#*after write, iclass 16, count 2 2006.229.14:21:01.07#ibcon#*before return 0, iclass 16, count 2 2006.229.14:21:01.07#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:21:01.07#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:21:01.07#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.14:21:01.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:01.07#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:21:01.19#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:21:01.19#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:21:01.19#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:21:01.19#ibcon#first serial, iclass 16, count 0 2006.229.14:21:01.19#ibcon#enter sib2, iclass 16, count 0 2006.229.14:21:01.19#ibcon#flushed, iclass 16, count 0 2006.229.14:21:01.19#ibcon#about to write, iclass 16, count 0 2006.229.14:21:01.19#ibcon#wrote, iclass 16, count 0 2006.229.14:21:01.19#ibcon#about to read 3, iclass 16, count 0 2006.229.14:21:01.21#ibcon#read 3, iclass 16, count 0 2006.229.14:21:01.21#ibcon#about to read 4, iclass 16, count 0 2006.229.14:21:01.21#ibcon#read 4, iclass 16, count 0 2006.229.14:21:01.21#ibcon#about to read 5, iclass 16, count 0 2006.229.14:21:01.21#ibcon#read 5, iclass 16, count 0 2006.229.14:21:01.21#ibcon#about to read 6, iclass 16, count 0 2006.229.14:21:01.21#ibcon#read 6, iclass 16, count 0 2006.229.14:21:01.21#ibcon#end of sib2, iclass 16, count 0 2006.229.14:21:01.21#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:21:01.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:21:01.21#ibcon#[25=USB\r\n] 2006.229.14:21:01.21#ibcon#*before write, iclass 16, count 0 2006.229.14:21:01.21#ibcon#enter sib2, iclass 16, count 0 2006.229.14:21:01.21#ibcon#flushed, iclass 16, count 0 2006.229.14:21:01.21#ibcon#about to write, iclass 16, count 0 2006.229.14:21:01.21#ibcon#wrote, iclass 16, count 0 2006.229.14:21:01.21#ibcon#about to read 3, iclass 16, count 0 2006.229.14:21:01.24#ibcon#read 3, iclass 16, count 0 2006.229.14:21:01.24#ibcon#about to read 4, iclass 16, count 0 2006.229.14:21:01.24#ibcon#read 4, iclass 16, count 0 2006.229.14:21:01.24#ibcon#about to read 5, iclass 16, count 0 2006.229.14:21:01.24#ibcon#read 5, iclass 16, count 0 2006.229.14:21:01.24#ibcon#about to read 6, iclass 16, count 0 2006.229.14:21:01.24#ibcon#read 6, iclass 16, count 0 2006.229.14:21:01.24#ibcon#end of sib2, iclass 16, count 0 2006.229.14:21:01.24#ibcon#*after write, iclass 16, count 0 2006.229.14:21:01.24#ibcon#*before return 0, iclass 16, count 0 2006.229.14:21:01.24#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:21:01.24#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:21:01.24#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:21:01.24#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:21:01.24$vck44/valo=7,864.99 2006.229.14:21:01.24#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.14:21:01.24#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.14:21:01.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:01.24#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:01.24#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:01.24#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:01.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:21:01.24#ibcon#first serial, iclass 19, count 0 2006.229.14:21:01.24#ibcon#enter sib2, iclass 19, count 0 2006.229.14:21:01.24#ibcon#flushed, iclass 19, count 0 2006.229.14:21:01.24#ibcon#about to write, iclass 19, count 0 2006.229.14:21:01.24#ibcon#wrote, iclass 19, count 0 2006.229.14:21:01.24#ibcon#about to read 3, iclass 19, count 0 2006.229.14:21:01.26#ibcon#read 3, iclass 19, count 0 2006.229.14:21:01.26#ibcon#about to read 4, iclass 19, count 0 2006.229.14:21:01.26#ibcon#read 4, iclass 19, count 0 2006.229.14:21:01.26#ibcon#about to read 5, iclass 19, count 0 2006.229.14:21:01.26#ibcon#read 5, iclass 19, count 0 2006.229.14:21:01.26#ibcon#about to read 6, iclass 19, count 0 2006.229.14:21:01.26#ibcon#read 6, iclass 19, count 0 2006.229.14:21:01.26#ibcon#end of sib2, iclass 19, count 0 2006.229.14:21:01.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:21:01.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:21:01.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:21:01.26#ibcon#*before write, iclass 19, count 0 2006.229.14:21:01.26#ibcon#enter sib2, iclass 19, count 0 2006.229.14:21:01.26#ibcon#flushed, iclass 19, count 0 2006.229.14:21:01.26#ibcon#about to write, iclass 19, count 0 2006.229.14:21:01.26#ibcon#wrote, iclass 19, count 0 2006.229.14:21:01.26#ibcon#about to read 3, iclass 19, count 0 2006.229.14:21:01.30#ibcon#read 3, iclass 19, count 0 2006.229.14:21:01.30#ibcon#about to read 4, iclass 19, count 0 2006.229.14:21:01.30#ibcon#read 4, iclass 19, count 0 2006.229.14:21:01.30#ibcon#about to read 5, iclass 19, count 0 2006.229.14:21:01.30#ibcon#read 5, iclass 19, count 0 2006.229.14:21:01.30#ibcon#about to read 6, iclass 19, count 0 2006.229.14:21:01.30#ibcon#read 6, iclass 19, count 0 2006.229.14:21:01.30#ibcon#end of sib2, iclass 19, count 0 2006.229.14:21:01.30#ibcon#*after write, iclass 19, count 0 2006.229.14:21:01.30#ibcon#*before return 0, iclass 19, count 0 2006.229.14:21:01.30#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:01.30#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:01.30#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:21:01.30#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:21:01.30$vck44/va=7,5 2006.229.14:21:01.30#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.14:21:01.30#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.14:21:01.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:01.30#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:01.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:01.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:01.36#ibcon#enter wrdev, iclass 21, count 2 2006.229.14:21:01.36#ibcon#first serial, iclass 21, count 2 2006.229.14:21:01.36#ibcon#enter sib2, iclass 21, count 2 2006.229.14:21:01.36#ibcon#flushed, iclass 21, count 2 2006.229.14:21:01.36#ibcon#about to write, iclass 21, count 2 2006.229.14:21:01.36#ibcon#wrote, iclass 21, count 2 2006.229.14:21:01.36#ibcon#about to read 3, iclass 21, count 2 2006.229.14:21:01.38#ibcon#read 3, iclass 21, count 2 2006.229.14:21:01.38#ibcon#about to read 4, iclass 21, count 2 2006.229.14:21:01.38#ibcon#read 4, iclass 21, count 2 2006.229.14:21:01.38#ibcon#about to read 5, iclass 21, count 2 2006.229.14:21:01.38#ibcon#read 5, iclass 21, count 2 2006.229.14:21:01.38#ibcon#about to read 6, iclass 21, count 2 2006.229.14:21:01.38#ibcon#read 6, iclass 21, count 2 2006.229.14:21:01.38#ibcon#end of sib2, iclass 21, count 2 2006.229.14:21:01.38#ibcon#*mode == 0, iclass 21, count 2 2006.229.14:21:01.38#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.14:21:01.38#ibcon#[25=AT07-05\r\n] 2006.229.14:21:01.38#ibcon#*before write, iclass 21, count 2 2006.229.14:21:01.38#ibcon#enter sib2, iclass 21, count 2 2006.229.14:21:01.38#ibcon#flushed, iclass 21, count 2 2006.229.14:21:01.38#ibcon#about to write, iclass 21, count 2 2006.229.14:21:01.38#ibcon#wrote, iclass 21, count 2 2006.229.14:21:01.38#ibcon#about to read 3, iclass 21, count 2 2006.229.14:21:01.41#ibcon#read 3, iclass 21, count 2 2006.229.14:21:01.41#ibcon#about to read 4, iclass 21, count 2 2006.229.14:21:01.41#ibcon#read 4, iclass 21, count 2 2006.229.14:21:01.41#ibcon#about to read 5, iclass 21, count 2 2006.229.14:21:01.41#ibcon#read 5, iclass 21, count 2 2006.229.14:21:01.41#ibcon#about to read 6, iclass 21, count 2 2006.229.14:21:01.41#ibcon#read 6, iclass 21, count 2 2006.229.14:21:01.41#ibcon#end of sib2, iclass 21, count 2 2006.229.14:21:01.41#ibcon#*after write, iclass 21, count 2 2006.229.14:21:01.41#ibcon#*before return 0, iclass 21, count 2 2006.229.14:21:01.41#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:01.41#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:01.41#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.14:21:01.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:01.41#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:01.53#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:01.53#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:01.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:21:01.53#ibcon#first serial, iclass 21, count 0 2006.229.14:21:01.53#ibcon#enter sib2, iclass 21, count 0 2006.229.14:21:01.53#ibcon#flushed, iclass 21, count 0 2006.229.14:21:01.53#ibcon#about to write, iclass 21, count 0 2006.229.14:21:01.53#ibcon#wrote, iclass 21, count 0 2006.229.14:21:01.53#ibcon#about to read 3, iclass 21, count 0 2006.229.14:21:01.55#ibcon#read 3, iclass 21, count 0 2006.229.14:21:01.55#ibcon#about to read 4, iclass 21, count 0 2006.229.14:21:01.55#ibcon#read 4, iclass 21, count 0 2006.229.14:21:01.55#ibcon#about to read 5, iclass 21, count 0 2006.229.14:21:01.55#ibcon#read 5, iclass 21, count 0 2006.229.14:21:01.55#ibcon#about to read 6, iclass 21, count 0 2006.229.14:21:01.55#ibcon#read 6, iclass 21, count 0 2006.229.14:21:01.55#ibcon#end of sib2, iclass 21, count 0 2006.229.14:21:01.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:21:01.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:21:01.55#ibcon#[25=USB\r\n] 2006.229.14:21:01.55#ibcon#*before write, iclass 21, count 0 2006.229.14:21:01.55#ibcon#enter sib2, iclass 21, count 0 2006.229.14:21:01.55#ibcon#flushed, iclass 21, count 0 2006.229.14:21:01.55#ibcon#about to write, iclass 21, count 0 2006.229.14:21:01.55#ibcon#wrote, iclass 21, count 0 2006.229.14:21:01.55#ibcon#about to read 3, iclass 21, count 0 2006.229.14:21:01.58#ibcon#read 3, iclass 21, count 0 2006.229.14:21:01.58#ibcon#about to read 4, iclass 21, count 0 2006.229.14:21:01.58#ibcon#read 4, iclass 21, count 0 2006.229.14:21:01.58#ibcon#about to read 5, iclass 21, count 0 2006.229.14:21:01.58#ibcon#read 5, iclass 21, count 0 2006.229.14:21:01.58#ibcon#about to read 6, iclass 21, count 0 2006.229.14:21:01.58#ibcon#read 6, iclass 21, count 0 2006.229.14:21:01.58#ibcon#end of sib2, iclass 21, count 0 2006.229.14:21:01.58#ibcon#*after write, iclass 21, count 0 2006.229.14:21:01.58#ibcon#*before return 0, iclass 21, count 0 2006.229.14:21:01.58#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:01.58#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:01.58#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:21:01.58#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:21:01.58$vck44/valo=8,884.99 2006.229.14:21:01.58#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.14:21:01.58#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.14:21:01.58#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:01.58#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:01.58#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:01.58#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:01.58#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:21:01.58#ibcon#first serial, iclass 23, count 0 2006.229.14:21:01.58#ibcon#enter sib2, iclass 23, count 0 2006.229.14:21:01.58#ibcon#flushed, iclass 23, count 0 2006.229.14:21:01.58#ibcon#about to write, iclass 23, count 0 2006.229.14:21:01.58#ibcon#wrote, iclass 23, count 0 2006.229.14:21:01.58#ibcon#about to read 3, iclass 23, count 0 2006.229.14:21:01.60#ibcon#read 3, iclass 23, count 0 2006.229.14:21:01.60#ibcon#about to read 4, iclass 23, count 0 2006.229.14:21:01.60#ibcon#read 4, iclass 23, count 0 2006.229.14:21:01.60#ibcon#about to read 5, iclass 23, count 0 2006.229.14:21:01.60#ibcon#read 5, iclass 23, count 0 2006.229.14:21:01.60#ibcon#about to read 6, iclass 23, count 0 2006.229.14:21:01.60#ibcon#read 6, iclass 23, count 0 2006.229.14:21:01.60#ibcon#end of sib2, iclass 23, count 0 2006.229.14:21:01.60#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:21:01.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:21:01.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:21:01.60#ibcon#*before write, iclass 23, count 0 2006.229.14:21:01.60#ibcon#enter sib2, iclass 23, count 0 2006.229.14:21:01.60#ibcon#flushed, iclass 23, count 0 2006.229.14:21:01.60#ibcon#about to write, iclass 23, count 0 2006.229.14:21:01.60#ibcon#wrote, iclass 23, count 0 2006.229.14:21:01.60#ibcon#about to read 3, iclass 23, count 0 2006.229.14:21:01.64#ibcon#read 3, iclass 23, count 0 2006.229.14:21:01.64#ibcon#about to read 4, iclass 23, count 0 2006.229.14:21:01.64#ibcon#read 4, iclass 23, count 0 2006.229.14:21:01.64#ibcon#about to read 5, iclass 23, count 0 2006.229.14:21:01.64#ibcon#read 5, iclass 23, count 0 2006.229.14:21:01.64#ibcon#about to read 6, iclass 23, count 0 2006.229.14:21:01.64#ibcon#read 6, iclass 23, count 0 2006.229.14:21:01.64#ibcon#end of sib2, iclass 23, count 0 2006.229.14:21:01.64#ibcon#*after write, iclass 23, count 0 2006.229.14:21:01.64#ibcon#*before return 0, iclass 23, count 0 2006.229.14:21:01.64#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:01.64#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:01.64#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:21:01.64#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:21:01.64$vck44/va=8,6 2006.229.14:21:01.64#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.14:21:01.64#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.14:21:01.64#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:01.64#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:21:01.70#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:21:01.70#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:21:01.70#ibcon#enter wrdev, iclass 25, count 2 2006.229.14:21:01.70#ibcon#first serial, iclass 25, count 2 2006.229.14:21:01.70#ibcon#enter sib2, iclass 25, count 2 2006.229.14:21:01.70#ibcon#flushed, iclass 25, count 2 2006.229.14:21:01.70#ibcon#about to write, iclass 25, count 2 2006.229.14:21:01.70#ibcon#wrote, iclass 25, count 2 2006.229.14:21:01.70#ibcon#about to read 3, iclass 25, count 2 2006.229.14:21:01.72#ibcon#read 3, iclass 25, count 2 2006.229.14:21:01.72#ibcon#about to read 4, iclass 25, count 2 2006.229.14:21:01.72#ibcon#read 4, iclass 25, count 2 2006.229.14:21:01.72#ibcon#about to read 5, iclass 25, count 2 2006.229.14:21:01.72#ibcon#read 5, iclass 25, count 2 2006.229.14:21:01.72#ibcon#about to read 6, iclass 25, count 2 2006.229.14:21:01.72#ibcon#read 6, iclass 25, count 2 2006.229.14:21:01.72#ibcon#end of sib2, iclass 25, count 2 2006.229.14:21:01.72#ibcon#*mode == 0, iclass 25, count 2 2006.229.14:21:01.72#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.14:21:01.72#ibcon#[25=AT08-06\r\n] 2006.229.14:21:01.72#ibcon#*before write, iclass 25, count 2 2006.229.14:21:01.72#ibcon#enter sib2, iclass 25, count 2 2006.229.14:21:01.72#ibcon#flushed, iclass 25, count 2 2006.229.14:21:01.72#ibcon#about to write, iclass 25, count 2 2006.229.14:21:01.72#ibcon#wrote, iclass 25, count 2 2006.229.14:21:01.72#ibcon#about to read 3, iclass 25, count 2 2006.229.14:21:01.75#ibcon#read 3, iclass 25, count 2 2006.229.14:21:01.75#ibcon#about to read 4, iclass 25, count 2 2006.229.14:21:01.75#ibcon#read 4, iclass 25, count 2 2006.229.14:21:01.75#ibcon#about to read 5, iclass 25, count 2 2006.229.14:21:01.75#ibcon#read 5, iclass 25, count 2 2006.229.14:21:01.75#ibcon#about to read 6, iclass 25, count 2 2006.229.14:21:01.75#ibcon#read 6, iclass 25, count 2 2006.229.14:21:01.75#ibcon#end of sib2, iclass 25, count 2 2006.229.14:21:01.75#ibcon#*after write, iclass 25, count 2 2006.229.14:21:01.75#ibcon#*before return 0, iclass 25, count 2 2006.229.14:21:01.75#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:21:01.75#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:21:01.75#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.14:21:01.75#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:01.75#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:21:01.87#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:21:01.87#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:21:01.87#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:21:01.87#ibcon#first serial, iclass 25, count 0 2006.229.14:21:01.87#ibcon#enter sib2, iclass 25, count 0 2006.229.14:21:01.87#ibcon#flushed, iclass 25, count 0 2006.229.14:21:01.87#ibcon#about to write, iclass 25, count 0 2006.229.14:21:01.87#ibcon#wrote, iclass 25, count 0 2006.229.14:21:01.87#ibcon#about to read 3, iclass 25, count 0 2006.229.14:21:01.89#ibcon#read 3, iclass 25, count 0 2006.229.14:21:01.89#ibcon#about to read 4, iclass 25, count 0 2006.229.14:21:01.89#ibcon#read 4, iclass 25, count 0 2006.229.14:21:01.89#ibcon#about to read 5, iclass 25, count 0 2006.229.14:21:01.89#ibcon#read 5, iclass 25, count 0 2006.229.14:21:01.89#ibcon#about to read 6, iclass 25, count 0 2006.229.14:21:01.89#ibcon#read 6, iclass 25, count 0 2006.229.14:21:01.89#ibcon#end of sib2, iclass 25, count 0 2006.229.14:21:01.89#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:21:01.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:21:01.89#ibcon#[25=USB\r\n] 2006.229.14:21:01.89#ibcon#*before write, iclass 25, count 0 2006.229.14:21:01.89#ibcon#enter sib2, iclass 25, count 0 2006.229.14:21:01.89#ibcon#flushed, iclass 25, count 0 2006.229.14:21:01.89#ibcon#about to write, iclass 25, count 0 2006.229.14:21:01.89#ibcon#wrote, iclass 25, count 0 2006.229.14:21:01.89#ibcon#about to read 3, iclass 25, count 0 2006.229.14:21:01.92#ibcon#read 3, iclass 25, count 0 2006.229.14:21:01.92#ibcon#about to read 4, iclass 25, count 0 2006.229.14:21:01.92#ibcon#read 4, iclass 25, count 0 2006.229.14:21:01.92#ibcon#about to read 5, iclass 25, count 0 2006.229.14:21:01.92#ibcon#read 5, iclass 25, count 0 2006.229.14:21:01.92#ibcon#about to read 6, iclass 25, count 0 2006.229.14:21:01.92#ibcon#read 6, iclass 25, count 0 2006.229.14:21:01.92#ibcon#end of sib2, iclass 25, count 0 2006.229.14:21:01.92#ibcon#*after write, iclass 25, count 0 2006.229.14:21:01.92#ibcon#*before return 0, iclass 25, count 0 2006.229.14:21:01.92#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:21:01.92#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:21:01.92#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:21:01.92#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:21:01.92$vck44/vblo=1,629.99 2006.229.14:21:01.92#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.14:21:01.92#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.14:21:01.92#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:01.92#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:21:01.92#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:21:01.92#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:21:01.92#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:21:01.92#ibcon#first serial, iclass 27, count 0 2006.229.14:21:01.92#ibcon#enter sib2, iclass 27, count 0 2006.229.14:21:01.92#ibcon#flushed, iclass 27, count 0 2006.229.14:21:01.92#ibcon#about to write, iclass 27, count 0 2006.229.14:21:01.92#ibcon#wrote, iclass 27, count 0 2006.229.14:21:01.92#ibcon#about to read 3, iclass 27, count 0 2006.229.14:21:01.94#ibcon#read 3, iclass 27, count 0 2006.229.14:21:01.94#ibcon#about to read 4, iclass 27, count 0 2006.229.14:21:01.94#ibcon#read 4, iclass 27, count 0 2006.229.14:21:01.94#ibcon#about to read 5, iclass 27, count 0 2006.229.14:21:01.94#ibcon#read 5, iclass 27, count 0 2006.229.14:21:01.94#ibcon#about to read 6, iclass 27, count 0 2006.229.14:21:01.94#ibcon#read 6, iclass 27, count 0 2006.229.14:21:01.94#ibcon#end of sib2, iclass 27, count 0 2006.229.14:21:01.94#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:21:01.94#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:21:01.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:21:01.94#ibcon#*before write, iclass 27, count 0 2006.229.14:21:01.94#ibcon#enter sib2, iclass 27, count 0 2006.229.14:21:01.94#ibcon#flushed, iclass 27, count 0 2006.229.14:21:01.94#ibcon#about to write, iclass 27, count 0 2006.229.14:21:01.94#ibcon#wrote, iclass 27, count 0 2006.229.14:21:01.94#ibcon#about to read 3, iclass 27, count 0 2006.229.14:21:01.98#ibcon#read 3, iclass 27, count 0 2006.229.14:21:01.98#ibcon#about to read 4, iclass 27, count 0 2006.229.14:21:01.98#ibcon#read 4, iclass 27, count 0 2006.229.14:21:01.98#ibcon#about to read 5, iclass 27, count 0 2006.229.14:21:01.98#ibcon#read 5, iclass 27, count 0 2006.229.14:21:01.98#ibcon#about to read 6, iclass 27, count 0 2006.229.14:21:01.98#ibcon#read 6, iclass 27, count 0 2006.229.14:21:01.98#ibcon#end of sib2, iclass 27, count 0 2006.229.14:21:01.98#ibcon#*after write, iclass 27, count 0 2006.229.14:21:01.98#ibcon#*before return 0, iclass 27, count 0 2006.229.14:21:01.98#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:21:01.98#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:21:01.98#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:21:01.98#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:21:01.98$vck44/vb=1,4 2006.229.14:21:01.98#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.14:21:01.98#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.14:21:01.98#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:01.98#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:21:01.98#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:21:01.98#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:21:01.98#ibcon#enter wrdev, iclass 29, count 2 2006.229.14:21:01.98#ibcon#first serial, iclass 29, count 2 2006.229.14:21:01.98#ibcon#enter sib2, iclass 29, count 2 2006.229.14:21:01.98#ibcon#flushed, iclass 29, count 2 2006.229.14:21:01.98#ibcon#about to write, iclass 29, count 2 2006.229.14:21:01.98#ibcon#wrote, iclass 29, count 2 2006.229.14:21:01.98#ibcon#about to read 3, iclass 29, count 2 2006.229.14:21:02.00#ibcon#read 3, iclass 29, count 2 2006.229.14:21:02.00#ibcon#about to read 4, iclass 29, count 2 2006.229.14:21:02.00#ibcon#read 4, iclass 29, count 2 2006.229.14:21:02.00#ibcon#about to read 5, iclass 29, count 2 2006.229.14:21:02.00#ibcon#read 5, iclass 29, count 2 2006.229.14:21:02.00#ibcon#about to read 6, iclass 29, count 2 2006.229.14:21:02.00#ibcon#read 6, iclass 29, count 2 2006.229.14:21:02.00#ibcon#end of sib2, iclass 29, count 2 2006.229.14:21:02.00#ibcon#*mode == 0, iclass 29, count 2 2006.229.14:21:02.00#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.14:21:02.00#ibcon#[27=AT01-04\r\n] 2006.229.14:21:02.00#ibcon#*before write, iclass 29, count 2 2006.229.14:21:02.00#ibcon#enter sib2, iclass 29, count 2 2006.229.14:21:02.00#ibcon#flushed, iclass 29, count 2 2006.229.14:21:02.00#ibcon#about to write, iclass 29, count 2 2006.229.14:21:02.00#ibcon#wrote, iclass 29, count 2 2006.229.14:21:02.00#ibcon#about to read 3, iclass 29, count 2 2006.229.14:21:02.03#ibcon#read 3, iclass 29, count 2 2006.229.14:21:02.03#ibcon#about to read 4, iclass 29, count 2 2006.229.14:21:02.03#ibcon#read 4, iclass 29, count 2 2006.229.14:21:02.03#ibcon#about to read 5, iclass 29, count 2 2006.229.14:21:02.03#ibcon#read 5, iclass 29, count 2 2006.229.14:21:02.03#ibcon#about to read 6, iclass 29, count 2 2006.229.14:21:02.03#ibcon#read 6, iclass 29, count 2 2006.229.14:21:02.03#ibcon#end of sib2, iclass 29, count 2 2006.229.14:21:02.03#ibcon#*after write, iclass 29, count 2 2006.229.14:21:02.03#ibcon#*before return 0, iclass 29, count 2 2006.229.14:21:02.03#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:21:02.03#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:21:02.03#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.14:21:02.03#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:02.03#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:21:02.15#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:21:02.15#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:21:02.15#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:21:02.15#ibcon#first serial, iclass 29, count 0 2006.229.14:21:02.15#ibcon#enter sib2, iclass 29, count 0 2006.229.14:21:02.15#ibcon#flushed, iclass 29, count 0 2006.229.14:21:02.15#ibcon#about to write, iclass 29, count 0 2006.229.14:21:02.15#ibcon#wrote, iclass 29, count 0 2006.229.14:21:02.15#ibcon#about to read 3, iclass 29, count 0 2006.229.14:21:02.17#ibcon#read 3, iclass 29, count 0 2006.229.14:21:02.17#ibcon#about to read 4, iclass 29, count 0 2006.229.14:21:02.17#ibcon#read 4, iclass 29, count 0 2006.229.14:21:02.17#ibcon#about to read 5, iclass 29, count 0 2006.229.14:21:02.17#ibcon#read 5, iclass 29, count 0 2006.229.14:21:02.17#ibcon#about to read 6, iclass 29, count 0 2006.229.14:21:02.17#ibcon#read 6, iclass 29, count 0 2006.229.14:21:02.17#ibcon#end of sib2, iclass 29, count 0 2006.229.14:21:02.17#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:21:02.17#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:21:02.17#ibcon#[27=USB\r\n] 2006.229.14:21:02.17#ibcon#*before write, iclass 29, count 0 2006.229.14:21:02.17#ibcon#enter sib2, iclass 29, count 0 2006.229.14:21:02.17#ibcon#flushed, iclass 29, count 0 2006.229.14:21:02.17#ibcon#about to write, iclass 29, count 0 2006.229.14:21:02.17#ibcon#wrote, iclass 29, count 0 2006.229.14:21:02.17#ibcon#about to read 3, iclass 29, count 0 2006.229.14:21:02.20#ibcon#read 3, iclass 29, count 0 2006.229.14:21:02.20#ibcon#about to read 4, iclass 29, count 0 2006.229.14:21:02.20#ibcon#read 4, iclass 29, count 0 2006.229.14:21:02.20#ibcon#about to read 5, iclass 29, count 0 2006.229.14:21:02.20#ibcon#read 5, iclass 29, count 0 2006.229.14:21:02.20#ibcon#about to read 6, iclass 29, count 0 2006.229.14:21:02.20#ibcon#read 6, iclass 29, count 0 2006.229.14:21:02.20#ibcon#end of sib2, iclass 29, count 0 2006.229.14:21:02.20#ibcon#*after write, iclass 29, count 0 2006.229.14:21:02.20#ibcon#*before return 0, iclass 29, count 0 2006.229.14:21:02.20#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:21:02.20#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:21:02.20#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:21:02.20#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:21:02.20$vck44/vblo=2,634.99 2006.229.14:21:02.20#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.14:21:02.20#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.14:21:02.20#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:02.20#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:21:02.20#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:21:02.20#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:21:02.20#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:21:02.20#ibcon#first serial, iclass 31, count 0 2006.229.14:21:02.20#ibcon#enter sib2, iclass 31, count 0 2006.229.14:21:02.20#ibcon#flushed, iclass 31, count 0 2006.229.14:21:02.20#ibcon#about to write, iclass 31, count 0 2006.229.14:21:02.20#ibcon#wrote, iclass 31, count 0 2006.229.14:21:02.20#ibcon#about to read 3, iclass 31, count 0 2006.229.14:21:02.22#ibcon#read 3, iclass 31, count 0 2006.229.14:21:02.22#ibcon#about to read 4, iclass 31, count 0 2006.229.14:21:02.22#ibcon#read 4, iclass 31, count 0 2006.229.14:21:02.22#ibcon#about to read 5, iclass 31, count 0 2006.229.14:21:02.22#ibcon#read 5, iclass 31, count 0 2006.229.14:21:02.22#ibcon#about to read 6, iclass 31, count 0 2006.229.14:21:02.22#ibcon#read 6, iclass 31, count 0 2006.229.14:21:02.22#ibcon#end of sib2, iclass 31, count 0 2006.229.14:21:02.22#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:21:02.22#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:21:02.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:21:02.22#ibcon#*before write, iclass 31, count 0 2006.229.14:21:02.22#ibcon#enter sib2, iclass 31, count 0 2006.229.14:21:02.22#ibcon#flushed, iclass 31, count 0 2006.229.14:21:02.22#ibcon#about to write, iclass 31, count 0 2006.229.14:21:02.22#ibcon#wrote, iclass 31, count 0 2006.229.14:21:02.22#ibcon#about to read 3, iclass 31, count 0 2006.229.14:21:02.26#ibcon#read 3, iclass 31, count 0 2006.229.14:21:02.26#ibcon#about to read 4, iclass 31, count 0 2006.229.14:21:02.26#ibcon#read 4, iclass 31, count 0 2006.229.14:21:02.26#ibcon#about to read 5, iclass 31, count 0 2006.229.14:21:02.26#ibcon#read 5, iclass 31, count 0 2006.229.14:21:02.26#ibcon#about to read 6, iclass 31, count 0 2006.229.14:21:02.26#ibcon#read 6, iclass 31, count 0 2006.229.14:21:02.26#ibcon#end of sib2, iclass 31, count 0 2006.229.14:21:02.26#ibcon#*after write, iclass 31, count 0 2006.229.14:21:02.26#ibcon#*before return 0, iclass 31, count 0 2006.229.14:21:02.26#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:21:02.26#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:21:02.26#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:21:02.26#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:21:02.26$vck44/vb=2,4 2006.229.14:21:02.26#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.14:21:02.26#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.14:21:02.26#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:02.26#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:21:02.32#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:21:02.32#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:21:02.32#ibcon#enter wrdev, iclass 33, count 2 2006.229.14:21:02.32#ibcon#first serial, iclass 33, count 2 2006.229.14:21:02.32#ibcon#enter sib2, iclass 33, count 2 2006.229.14:21:02.32#ibcon#flushed, iclass 33, count 2 2006.229.14:21:02.32#ibcon#about to write, iclass 33, count 2 2006.229.14:21:02.32#ibcon#wrote, iclass 33, count 2 2006.229.14:21:02.32#ibcon#about to read 3, iclass 33, count 2 2006.229.14:21:02.34#ibcon#read 3, iclass 33, count 2 2006.229.14:21:02.34#ibcon#about to read 4, iclass 33, count 2 2006.229.14:21:02.34#ibcon#read 4, iclass 33, count 2 2006.229.14:21:02.34#ibcon#about to read 5, iclass 33, count 2 2006.229.14:21:02.34#ibcon#read 5, iclass 33, count 2 2006.229.14:21:02.34#ibcon#about to read 6, iclass 33, count 2 2006.229.14:21:02.34#ibcon#read 6, iclass 33, count 2 2006.229.14:21:02.34#ibcon#end of sib2, iclass 33, count 2 2006.229.14:21:02.34#ibcon#*mode == 0, iclass 33, count 2 2006.229.14:21:02.34#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.14:21:02.34#ibcon#[27=AT02-04\r\n] 2006.229.14:21:02.34#ibcon#*before write, iclass 33, count 2 2006.229.14:21:02.34#ibcon#enter sib2, iclass 33, count 2 2006.229.14:21:02.34#ibcon#flushed, iclass 33, count 2 2006.229.14:21:02.34#ibcon#about to write, iclass 33, count 2 2006.229.14:21:02.34#ibcon#wrote, iclass 33, count 2 2006.229.14:21:02.34#ibcon#about to read 3, iclass 33, count 2 2006.229.14:21:02.37#ibcon#read 3, iclass 33, count 2 2006.229.14:21:02.37#ibcon#about to read 4, iclass 33, count 2 2006.229.14:21:02.37#ibcon#read 4, iclass 33, count 2 2006.229.14:21:02.37#ibcon#about to read 5, iclass 33, count 2 2006.229.14:21:02.37#ibcon#read 5, iclass 33, count 2 2006.229.14:21:02.37#ibcon#about to read 6, iclass 33, count 2 2006.229.14:21:02.37#ibcon#read 6, iclass 33, count 2 2006.229.14:21:02.37#ibcon#end of sib2, iclass 33, count 2 2006.229.14:21:02.37#ibcon#*after write, iclass 33, count 2 2006.229.14:21:02.37#ibcon#*before return 0, iclass 33, count 2 2006.229.14:21:02.37#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:21:02.37#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:21:02.37#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.14:21:02.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:02.37#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:21:02.49#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:21:02.49#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:21:02.49#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:21:02.49#ibcon#first serial, iclass 33, count 0 2006.229.14:21:02.49#ibcon#enter sib2, iclass 33, count 0 2006.229.14:21:02.49#ibcon#flushed, iclass 33, count 0 2006.229.14:21:02.49#ibcon#about to write, iclass 33, count 0 2006.229.14:21:02.49#ibcon#wrote, iclass 33, count 0 2006.229.14:21:02.49#ibcon#about to read 3, iclass 33, count 0 2006.229.14:21:02.51#ibcon#read 3, iclass 33, count 0 2006.229.14:21:02.51#ibcon#about to read 4, iclass 33, count 0 2006.229.14:21:02.51#ibcon#read 4, iclass 33, count 0 2006.229.14:21:02.51#ibcon#about to read 5, iclass 33, count 0 2006.229.14:21:02.51#ibcon#read 5, iclass 33, count 0 2006.229.14:21:02.51#ibcon#about to read 6, iclass 33, count 0 2006.229.14:21:02.51#ibcon#read 6, iclass 33, count 0 2006.229.14:21:02.51#ibcon#end of sib2, iclass 33, count 0 2006.229.14:21:02.51#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:21:02.51#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:21:02.51#ibcon#[27=USB\r\n] 2006.229.14:21:02.51#ibcon#*before write, iclass 33, count 0 2006.229.14:21:02.51#ibcon#enter sib2, iclass 33, count 0 2006.229.14:21:02.51#ibcon#flushed, iclass 33, count 0 2006.229.14:21:02.51#ibcon#about to write, iclass 33, count 0 2006.229.14:21:02.51#ibcon#wrote, iclass 33, count 0 2006.229.14:21:02.51#ibcon#about to read 3, iclass 33, count 0 2006.229.14:21:02.54#ibcon#read 3, iclass 33, count 0 2006.229.14:21:02.54#ibcon#about to read 4, iclass 33, count 0 2006.229.14:21:02.54#ibcon#read 4, iclass 33, count 0 2006.229.14:21:02.54#ibcon#about to read 5, iclass 33, count 0 2006.229.14:21:02.54#ibcon#read 5, iclass 33, count 0 2006.229.14:21:02.54#ibcon#about to read 6, iclass 33, count 0 2006.229.14:21:02.54#ibcon#read 6, iclass 33, count 0 2006.229.14:21:02.54#ibcon#end of sib2, iclass 33, count 0 2006.229.14:21:02.54#ibcon#*after write, iclass 33, count 0 2006.229.14:21:02.54#ibcon#*before return 0, iclass 33, count 0 2006.229.14:21:02.54#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:21:02.54#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:21:02.54#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:21:02.54#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:21:02.54$vck44/vblo=3,649.99 2006.229.14:21:02.54#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.14:21:02.54#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.14:21:02.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:02.54#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:21:02.54#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:21:02.54#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:21:02.54#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:21:02.54#ibcon#first serial, iclass 35, count 0 2006.229.14:21:02.54#ibcon#enter sib2, iclass 35, count 0 2006.229.14:21:02.54#ibcon#flushed, iclass 35, count 0 2006.229.14:21:02.54#ibcon#about to write, iclass 35, count 0 2006.229.14:21:02.54#ibcon#wrote, iclass 35, count 0 2006.229.14:21:02.54#ibcon#about to read 3, iclass 35, count 0 2006.229.14:21:02.56#ibcon#read 3, iclass 35, count 0 2006.229.14:21:02.56#ibcon#about to read 4, iclass 35, count 0 2006.229.14:21:02.56#ibcon#read 4, iclass 35, count 0 2006.229.14:21:02.56#ibcon#about to read 5, iclass 35, count 0 2006.229.14:21:02.56#ibcon#read 5, iclass 35, count 0 2006.229.14:21:02.56#ibcon#about to read 6, iclass 35, count 0 2006.229.14:21:02.56#ibcon#read 6, iclass 35, count 0 2006.229.14:21:02.56#ibcon#end of sib2, iclass 35, count 0 2006.229.14:21:02.56#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:21:02.56#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:21:02.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:21:02.56#ibcon#*before write, iclass 35, count 0 2006.229.14:21:02.56#ibcon#enter sib2, iclass 35, count 0 2006.229.14:21:02.56#ibcon#flushed, iclass 35, count 0 2006.229.14:21:02.56#ibcon#about to write, iclass 35, count 0 2006.229.14:21:02.56#ibcon#wrote, iclass 35, count 0 2006.229.14:21:02.56#ibcon#about to read 3, iclass 35, count 0 2006.229.14:21:02.60#ibcon#read 3, iclass 35, count 0 2006.229.14:21:02.60#ibcon#about to read 4, iclass 35, count 0 2006.229.14:21:02.60#ibcon#read 4, iclass 35, count 0 2006.229.14:21:02.60#ibcon#about to read 5, iclass 35, count 0 2006.229.14:21:02.60#ibcon#read 5, iclass 35, count 0 2006.229.14:21:02.60#ibcon#about to read 6, iclass 35, count 0 2006.229.14:21:02.60#ibcon#read 6, iclass 35, count 0 2006.229.14:21:02.60#ibcon#end of sib2, iclass 35, count 0 2006.229.14:21:02.60#ibcon#*after write, iclass 35, count 0 2006.229.14:21:02.60#ibcon#*before return 0, iclass 35, count 0 2006.229.14:21:02.60#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:21:02.60#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:21:02.60#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:21:02.60#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:21:02.60$vck44/vb=3,4 2006.229.14:21:02.60#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.14:21:02.60#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.14:21:02.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:02.60#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:02.66#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:02.66#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:02.66#ibcon#enter wrdev, iclass 37, count 2 2006.229.14:21:02.66#ibcon#first serial, iclass 37, count 2 2006.229.14:21:02.66#ibcon#enter sib2, iclass 37, count 2 2006.229.14:21:02.66#ibcon#flushed, iclass 37, count 2 2006.229.14:21:02.66#ibcon#about to write, iclass 37, count 2 2006.229.14:21:02.66#ibcon#wrote, iclass 37, count 2 2006.229.14:21:02.66#ibcon#about to read 3, iclass 37, count 2 2006.229.14:21:02.68#ibcon#read 3, iclass 37, count 2 2006.229.14:21:02.68#ibcon#about to read 4, iclass 37, count 2 2006.229.14:21:02.68#ibcon#read 4, iclass 37, count 2 2006.229.14:21:02.68#ibcon#about to read 5, iclass 37, count 2 2006.229.14:21:02.68#ibcon#read 5, iclass 37, count 2 2006.229.14:21:02.68#ibcon#about to read 6, iclass 37, count 2 2006.229.14:21:02.68#ibcon#read 6, iclass 37, count 2 2006.229.14:21:02.68#ibcon#end of sib2, iclass 37, count 2 2006.229.14:21:02.68#ibcon#*mode == 0, iclass 37, count 2 2006.229.14:21:02.68#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.14:21:02.68#ibcon#[27=AT03-04\r\n] 2006.229.14:21:02.68#ibcon#*before write, iclass 37, count 2 2006.229.14:21:02.68#ibcon#enter sib2, iclass 37, count 2 2006.229.14:21:02.68#ibcon#flushed, iclass 37, count 2 2006.229.14:21:02.68#ibcon#about to write, iclass 37, count 2 2006.229.14:21:02.68#ibcon#wrote, iclass 37, count 2 2006.229.14:21:02.68#ibcon#about to read 3, iclass 37, count 2 2006.229.14:21:02.71#ibcon#read 3, iclass 37, count 2 2006.229.14:21:02.71#ibcon#about to read 4, iclass 37, count 2 2006.229.14:21:02.71#ibcon#read 4, iclass 37, count 2 2006.229.14:21:02.71#ibcon#about to read 5, iclass 37, count 2 2006.229.14:21:02.71#ibcon#read 5, iclass 37, count 2 2006.229.14:21:02.71#ibcon#about to read 6, iclass 37, count 2 2006.229.14:21:02.71#ibcon#read 6, iclass 37, count 2 2006.229.14:21:02.71#ibcon#end of sib2, iclass 37, count 2 2006.229.14:21:02.71#ibcon#*after write, iclass 37, count 2 2006.229.14:21:02.71#ibcon#*before return 0, iclass 37, count 2 2006.229.14:21:02.71#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:02.71#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:21:02.71#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.14:21:02.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:02.71#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:02.83#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:02.83#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:02.83#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:21:02.83#ibcon#first serial, iclass 37, count 0 2006.229.14:21:02.83#ibcon#enter sib2, iclass 37, count 0 2006.229.14:21:02.83#ibcon#flushed, iclass 37, count 0 2006.229.14:21:02.83#ibcon#about to write, iclass 37, count 0 2006.229.14:21:02.83#ibcon#wrote, iclass 37, count 0 2006.229.14:21:02.83#ibcon#about to read 3, iclass 37, count 0 2006.229.14:21:02.85#ibcon#read 3, iclass 37, count 0 2006.229.14:21:02.85#ibcon#about to read 4, iclass 37, count 0 2006.229.14:21:02.85#ibcon#read 4, iclass 37, count 0 2006.229.14:21:02.85#ibcon#about to read 5, iclass 37, count 0 2006.229.14:21:02.85#ibcon#read 5, iclass 37, count 0 2006.229.14:21:02.85#ibcon#about to read 6, iclass 37, count 0 2006.229.14:21:02.85#ibcon#read 6, iclass 37, count 0 2006.229.14:21:02.85#ibcon#end of sib2, iclass 37, count 0 2006.229.14:21:02.85#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:21:02.85#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:21:02.85#ibcon#[27=USB\r\n] 2006.229.14:21:02.85#ibcon#*before write, iclass 37, count 0 2006.229.14:21:02.85#ibcon#enter sib2, iclass 37, count 0 2006.229.14:21:02.85#ibcon#flushed, iclass 37, count 0 2006.229.14:21:02.85#ibcon#about to write, iclass 37, count 0 2006.229.14:21:02.85#ibcon#wrote, iclass 37, count 0 2006.229.14:21:02.85#ibcon#about to read 3, iclass 37, count 0 2006.229.14:21:02.88#ibcon#read 3, iclass 37, count 0 2006.229.14:21:02.88#ibcon#about to read 4, iclass 37, count 0 2006.229.14:21:02.88#ibcon#read 4, iclass 37, count 0 2006.229.14:21:02.88#ibcon#about to read 5, iclass 37, count 0 2006.229.14:21:02.88#ibcon#read 5, iclass 37, count 0 2006.229.14:21:02.88#ibcon#about to read 6, iclass 37, count 0 2006.229.14:21:02.88#ibcon#read 6, iclass 37, count 0 2006.229.14:21:02.88#ibcon#end of sib2, iclass 37, count 0 2006.229.14:21:02.88#ibcon#*after write, iclass 37, count 0 2006.229.14:21:02.88#ibcon#*before return 0, iclass 37, count 0 2006.229.14:21:02.88#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:02.88#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:21:02.88#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:21:02.88#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:21:02.88$vck44/vblo=4,679.99 2006.229.14:21:02.88#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.14:21:02.88#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.14:21:02.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:02.88#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:02.88#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:02.88#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:02.88#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:21:02.88#ibcon#first serial, iclass 39, count 0 2006.229.14:21:02.88#ibcon#enter sib2, iclass 39, count 0 2006.229.14:21:02.88#ibcon#flushed, iclass 39, count 0 2006.229.14:21:02.88#ibcon#about to write, iclass 39, count 0 2006.229.14:21:02.88#ibcon#wrote, iclass 39, count 0 2006.229.14:21:02.88#ibcon#about to read 3, iclass 39, count 0 2006.229.14:21:02.90#ibcon#read 3, iclass 39, count 0 2006.229.14:21:02.90#ibcon#about to read 4, iclass 39, count 0 2006.229.14:21:02.90#ibcon#read 4, iclass 39, count 0 2006.229.14:21:02.90#ibcon#about to read 5, iclass 39, count 0 2006.229.14:21:02.90#ibcon#read 5, iclass 39, count 0 2006.229.14:21:02.90#ibcon#about to read 6, iclass 39, count 0 2006.229.14:21:02.90#ibcon#read 6, iclass 39, count 0 2006.229.14:21:02.90#ibcon#end of sib2, iclass 39, count 0 2006.229.14:21:02.90#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:21:02.90#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:21:02.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:21:02.90#ibcon#*before write, iclass 39, count 0 2006.229.14:21:02.90#ibcon#enter sib2, iclass 39, count 0 2006.229.14:21:02.90#ibcon#flushed, iclass 39, count 0 2006.229.14:21:02.90#ibcon#about to write, iclass 39, count 0 2006.229.14:21:02.90#ibcon#wrote, iclass 39, count 0 2006.229.14:21:02.90#ibcon#about to read 3, iclass 39, count 0 2006.229.14:21:02.94#ibcon#read 3, iclass 39, count 0 2006.229.14:21:02.94#ibcon#about to read 4, iclass 39, count 0 2006.229.14:21:02.94#ibcon#read 4, iclass 39, count 0 2006.229.14:21:02.94#ibcon#about to read 5, iclass 39, count 0 2006.229.14:21:02.94#ibcon#read 5, iclass 39, count 0 2006.229.14:21:02.94#ibcon#about to read 6, iclass 39, count 0 2006.229.14:21:02.94#ibcon#read 6, iclass 39, count 0 2006.229.14:21:02.94#ibcon#end of sib2, iclass 39, count 0 2006.229.14:21:02.94#ibcon#*after write, iclass 39, count 0 2006.229.14:21:02.94#ibcon#*before return 0, iclass 39, count 0 2006.229.14:21:02.94#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:02.94#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:21:02.94#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:21:02.94#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:21:02.94$vck44/vb=4,4 2006.229.14:21:02.94#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.14:21:02.94#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.14:21:02.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:02.94#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:03.00#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:03.00#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:03.00#ibcon#enter wrdev, iclass 3, count 2 2006.229.14:21:03.00#ibcon#first serial, iclass 3, count 2 2006.229.14:21:03.00#ibcon#enter sib2, iclass 3, count 2 2006.229.14:21:03.00#ibcon#flushed, iclass 3, count 2 2006.229.14:21:03.00#ibcon#about to write, iclass 3, count 2 2006.229.14:21:03.00#ibcon#wrote, iclass 3, count 2 2006.229.14:21:03.00#ibcon#about to read 3, iclass 3, count 2 2006.229.14:21:03.02#ibcon#read 3, iclass 3, count 2 2006.229.14:21:03.02#ibcon#about to read 4, iclass 3, count 2 2006.229.14:21:03.02#ibcon#read 4, iclass 3, count 2 2006.229.14:21:03.02#ibcon#about to read 5, iclass 3, count 2 2006.229.14:21:03.02#ibcon#read 5, iclass 3, count 2 2006.229.14:21:03.02#ibcon#about to read 6, iclass 3, count 2 2006.229.14:21:03.02#ibcon#read 6, iclass 3, count 2 2006.229.14:21:03.02#ibcon#end of sib2, iclass 3, count 2 2006.229.14:21:03.02#ibcon#*mode == 0, iclass 3, count 2 2006.229.14:21:03.02#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.14:21:03.02#ibcon#[27=AT04-04\r\n] 2006.229.14:21:03.02#ibcon#*before write, iclass 3, count 2 2006.229.14:21:03.02#ibcon#enter sib2, iclass 3, count 2 2006.229.14:21:03.02#ibcon#flushed, iclass 3, count 2 2006.229.14:21:03.02#ibcon#about to write, iclass 3, count 2 2006.229.14:21:03.02#ibcon#wrote, iclass 3, count 2 2006.229.14:21:03.02#ibcon#about to read 3, iclass 3, count 2 2006.229.14:21:03.05#ibcon#read 3, iclass 3, count 2 2006.229.14:21:03.05#ibcon#about to read 4, iclass 3, count 2 2006.229.14:21:03.05#ibcon#read 4, iclass 3, count 2 2006.229.14:21:03.05#ibcon#about to read 5, iclass 3, count 2 2006.229.14:21:03.05#ibcon#read 5, iclass 3, count 2 2006.229.14:21:03.05#ibcon#about to read 6, iclass 3, count 2 2006.229.14:21:03.05#ibcon#read 6, iclass 3, count 2 2006.229.14:21:03.05#ibcon#end of sib2, iclass 3, count 2 2006.229.14:21:03.05#ibcon#*after write, iclass 3, count 2 2006.229.14:21:03.05#ibcon#*before return 0, iclass 3, count 2 2006.229.14:21:03.05#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:03.05#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:21:03.05#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.14:21:03.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:03.05#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:03.17#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:03.17#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:03.17#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:21:03.17#ibcon#first serial, iclass 3, count 0 2006.229.14:21:03.17#ibcon#enter sib2, iclass 3, count 0 2006.229.14:21:03.17#ibcon#flushed, iclass 3, count 0 2006.229.14:21:03.17#ibcon#about to write, iclass 3, count 0 2006.229.14:21:03.17#ibcon#wrote, iclass 3, count 0 2006.229.14:21:03.17#ibcon#about to read 3, iclass 3, count 0 2006.229.14:21:03.19#ibcon#read 3, iclass 3, count 0 2006.229.14:21:03.19#ibcon#about to read 4, iclass 3, count 0 2006.229.14:21:03.19#ibcon#read 4, iclass 3, count 0 2006.229.14:21:03.19#ibcon#about to read 5, iclass 3, count 0 2006.229.14:21:03.19#ibcon#read 5, iclass 3, count 0 2006.229.14:21:03.19#ibcon#about to read 6, iclass 3, count 0 2006.229.14:21:03.19#ibcon#read 6, iclass 3, count 0 2006.229.14:21:03.19#ibcon#end of sib2, iclass 3, count 0 2006.229.14:21:03.19#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:21:03.19#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:21:03.19#ibcon#[27=USB\r\n] 2006.229.14:21:03.19#ibcon#*before write, iclass 3, count 0 2006.229.14:21:03.19#ibcon#enter sib2, iclass 3, count 0 2006.229.14:21:03.19#ibcon#flushed, iclass 3, count 0 2006.229.14:21:03.19#ibcon#about to write, iclass 3, count 0 2006.229.14:21:03.19#ibcon#wrote, iclass 3, count 0 2006.229.14:21:03.19#ibcon#about to read 3, iclass 3, count 0 2006.229.14:21:03.22#ibcon#read 3, iclass 3, count 0 2006.229.14:21:03.22#ibcon#about to read 4, iclass 3, count 0 2006.229.14:21:03.22#ibcon#read 4, iclass 3, count 0 2006.229.14:21:03.22#ibcon#about to read 5, iclass 3, count 0 2006.229.14:21:03.22#ibcon#read 5, iclass 3, count 0 2006.229.14:21:03.22#ibcon#about to read 6, iclass 3, count 0 2006.229.14:21:03.22#ibcon#read 6, iclass 3, count 0 2006.229.14:21:03.22#ibcon#end of sib2, iclass 3, count 0 2006.229.14:21:03.22#ibcon#*after write, iclass 3, count 0 2006.229.14:21:03.22#ibcon#*before return 0, iclass 3, count 0 2006.229.14:21:03.22#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:03.22#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:21:03.22#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:21:03.22#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:21:03.22$vck44/vblo=5,709.99 2006.229.14:21:03.22#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.14:21:03.22#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.14:21:03.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:03.22#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:03.22#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:03.22#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:03.22#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:21:03.22#ibcon#first serial, iclass 5, count 0 2006.229.14:21:03.22#ibcon#enter sib2, iclass 5, count 0 2006.229.14:21:03.22#ibcon#flushed, iclass 5, count 0 2006.229.14:21:03.22#ibcon#about to write, iclass 5, count 0 2006.229.14:21:03.22#ibcon#wrote, iclass 5, count 0 2006.229.14:21:03.22#ibcon#about to read 3, iclass 5, count 0 2006.229.14:21:03.24#ibcon#read 3, iclass 5, count 0 2006.229.14:21:03.24#ibcon#about to read 4, iclass 5, count 0 2006.229.14:21:03.24#ibcon#read 4, iclass 5, count 0 2006.229.14:21:03.24#ibcon#about to read 5, iclass 5, count 0 2006.229.14:21:03.24#ibcon#read 5, iclass 5, count 0 2006.229.14:21:03.24#ibcon#about to read 6, iclass 5, count 0 2006.229.14:21:03.24#ibcon#read 6, iclass 5, count 0 2006.229.14:21:03.24#ibcon#end of sib2, iclass 5, count 0 2006.229.14:21:03.24#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:21:03.24#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:21:03.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:21:03.24#ibcon#*before write, iclass 5, count 0 2006.229.14:21:03.24#ibcon#enter sib2, iclass 5, count 0 2006.229.14:21:03.24#ibcon#flushed, iclass 5, count 0 2006.229.14:21:03.24#ibcon#about to write, iclass 5, count 0 2006.229.14:21:03.24#ibcon#wrote, iclass 5, count 0 2006.229.14:21:03.24#ibcon#about to read 3, iclass 5, count 0 2006.229.14:21:03.28#ibcon#read 3, iclass 5, count 0 2006.229.14:21:03.28#ibcon#about to read 4, iclass 5, count 0 2006.229.14:21:03.28#ibcon#read 4, iclass 5, count 0 2006.229.14:21:03.28#ibcon#about to read 5, iclass 5, count 0 2006.229.14:21:03.28#ibcon#read 5, iclass 5, count 0 2006.229.14:21:03.28#ibcon#about to read 6, iclass 5, count 0 2006.229.14:21:03.28#ibcon#read 6, iclass 5, count 0 2006.229.14:21:03.28#ibcon#end of sib2, iclass 5, count 0 2006.229.14:21:03.28#ibcon#*after write, iclass 5, count 0 2006.229.14:21:03.28#ibcon#*before return 0, iclass 5, count 0 2006.229.14:21:03.28#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:03.28#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:21:03.28#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:21:03.28#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:21:03.28$vck44/vb=5,4 2006.229.14:21:03.28#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.14:21:03.28#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.14:21:03.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:03.28#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:03.34#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:03.34#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:03.34#ibcon#enter wrdev, iclass 7, count 2 2006.229.14:21:03.34#ibcon#first serial, iclass 7, count 2 2006.229.14:21:03.34#ibcon#enter sib2, iclass 7, count 2 2006.229.14:21:03.34#ibcon#flushed, iclass 7, count 2 2006.229.14:21:03.34#ibcon#about to write, iclass 7, count 2 2006.229.14:21:03.34#ibcon#wrote, iclass 7, count 2 2006.229.14:21:03.34#ibcon#about to read 3, iclass 7, count 2 2006.229.14:21:03.36#ibcon#read 3, iclass 7, count 2 2006.229.14:21:03.36#ibcon#about to read 4, iclass 7, count 2 2006.229.14:21:03.36#ibcon#read 4, iclass 7, count 2 2006.229.14:21:03.36#ibcon#about to read 5, iclass 7, count 2 2006.229.14:21:03.36#ibcon#read 5, iclass 7, count 2 2006.229.14:21:03.36#ibcon#about to read 6, iclass 7, count 2 2006.229.14:21:03.36#ibcon#read 6, iclass 7, count 2 2006.229.14:21:03.36#ibcon#end of sib2, iclass 7, count 2 2006.229.14:21:03.36#ibcon#*mode == 0, iclass 7, count 2 2006.229.14:21:03.36#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.14:21:03.36#ibcon#[27=AT05-04\r\n] 2006.229.14:21:03.36#ibcon#*before write, iclass 7, count 2 2006.229.14:21:03.36#ibcon#enter sib2, iclass 7, count 2 2006.229.14:21:03.36#ibcon#flushed, iclass 7, count 2 2006.229.14:21:03.36#ibcon#about to write, iclass 7, count 2 2006.229.14:21:03.36#ibcon#wrote, iclass 7, count 2 2006.229.14:21:03.36#ibcon#about to read 3, iclass 7, count 2 2006.229.14:21:03.39#ibcon#read 3, iclass 7, count 2 2006.229.14:21:03.39#ibcon#about to read 4, iclass 7, count 2 2006.229.14:21:03.39#ibcon#read 4, iclass 7, count 2 2006.229.14:21:03.39#ibcon#about to read 5, iclass 7, count 2 2006.229.14:21:03.39#ibcon#read 5, iclass 7, count 2 2006.229.14:21:03.39#ibcon#about to read 6, iclass 7, count 2 2006.229.14:21:03.39#ibcon#read 6, iclass 7, count 2 2006.229.14:21:03.39#ibcon#end of sib2, iclass 7, count 2 2006.229.14:21:03.39#ibcon#*after write, iclass 7, count 2 2006.229.14:21:03.39#ibcon#*before return 0, iclass 7, count 2 2006.229.14:21:03.39#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:03.39#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:21:03.39#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.14:21:03.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:03.39#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:03.51#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:03.51#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:03.51#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:21:03.51#ibcon#first serial, iclass 7, count 0 2006.229.14:21:03.51#ibcon#enter sib2, iclass 7, count 0 2006.229.14:21:03.51#ibcon#flushed, iclass 7, count 0 2006.229.14:21:03.51#ibcon#about to write, iclass 7, count 0 2006.229.14:21:03.51#ibcon#wrote, iclass 7, count 0 2006.229.14:21:03.51#ibcon#about to read 3, iclass 7, count 0 2006.229.14:21:03.53#ibcon#read 3, iclass 7, count 0 2006.229.14:21:03.53#ibcon#about to read 4, iclass 7, count 0 2006.229.14:21:03.53#ibcon#read 4, iclass 7, count 0 2006.229.14:21:03.53#ibcon#about to read 5, iclass 7, count 0 2006.229.14:21:03.53#ibcon#read 5, iclass 7, count 0 2006.229.14:21:03.53#ibcon#about to read 6, iclass 7, count 0 2006.229.14:21:03.53#ibcon#read 6, iclass 7, count 0 2006.229.14:21:03.53#ibcon#end of sib2, iclass 7, count 0 2006.229.14:21:03.53#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:21:03.53#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:21:03.53#ibcon#[27=USB\r\n] 2006.229.14:21:03.53#ibcon#*before write, iclass 7, count 0 2006.229.14:21:03.53#ibcon#enter sib2, iclass 7, count 0 2006.229.14:21:03.53#ibcon#flushed, iclass 7, count 0 2006.229.14:21:03.53#ibcon#about to write, iclass 7, count 0 2006.229.14:21:03.53#ibcon#wrote, iclass 7, count 0 2006.229.14:21:03.53#ibcon#about to read 3, iclass 7, count 0 2006.229.14:21:03.56#ibcon#read 3, iclass 7, count 0 2006.229.14:21:03.56#ibcon#about to read 4, iclass 7, count 0 2006.229.14:21:03.56#ibcon#read 4, iclass 7, count 0 2006.229.14:21:03.56#ibcon#about to read 5, iclass 7, count 0 2006.229.14:21:03.56#ibcon#read 5, iclass 7, count 0 2006.229.14:21:03.56#ibcon#about to read 6, iclass 7, count 0 2006.229.14:21:03.56#ibcon#read 6, iclass 7, count 0 2006.229.14:21:03.56#ibcon#end of sib2, iclass 7, count 0 2006.229.14:21:03.56#ibcon#*after write, iclass 7, count 0 2006.229.14:21:03.56#ibcon#*before return 0, iclass 7, count 0 2006.229.14:21:03.56#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:03.56#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:21:03.56#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:21:03.56#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:21:03.56$vck44/vblo=6,719.99 2006.229.14:21:03.56#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.14:21:03.56#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.14:21:03.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:03.56#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:21:03.56#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:21:03.56#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:21:03.56#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:21:03.56#ibcon#first serial, iclass 11, count 0 2006.229.14:21:03.56#ibcon#enter sib2, iclass 11, count 0 2006.229.14:21:03.56#ibcon#flushed, iclass 11, count 0 2006.229.14:21:03.56#ibcon#about to write, iclass 11, count 0 2006.229.14:21:03.56#ibcon#wrote, iclass 11, count 0 2006.229.14:21:03.56#ibcon#about to read 3, iclass 11, count 0 2006.229.14:21:03.58#ibcon#read 3, iclass 11, count 0 2006.229.14:21:03.58#ibcon#about to read 4, iclass 11, count 0 2006.229.14:21:03.58#ibcon#read 4, iclass 11, count 0 2006.229.14:21:03.58#ibcon#about to read 5, iclass 11, count 0 2006.229.14:21:03.58#ibcon#read 5, iclass 11, count 0 2006.229.14:21:03.58#ibcon#about to read 6, iclass 11, count 0 2006.229.14:21:03.58#ibcon#read 6, iclass 11, count 0 2006.229.14:21:03.58#ibcon#end of sib2, iclass 11, count 0 2006.229.14:21:03.58#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:21:03.58#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:21:03.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:21:03.58#ibcon#*before write, iclass 11, count 0 2006.229.14:21:03.58#ibcon#enter sib2, iclass 11, count 0 2006.229.14:21:03.58#ibcon#flushed, iclass 11, count 0 2006.229.14:21:03.58#ibcon#about to write, iclass 11, count 0 2006.229.14:21:03.58#ibcon#wrote, iclass 11, count 0 2006.229.14:21:03.58#ibcon#about to read 3, iclass 11, count 0 2006.229.14:21:03.62#ibcon#read 3, iclass 11, count 0 2006.229.14:21:03.62#ibcon#about to read 4, iclass 11, count 0 2006.229.14:21:03.62#ibcon#read 4, iclass 11, count 0 2006.229.14:21:03.62#ibcon#about to read 5, iclass 11, count 0 2006.229.14:21:03.62#ibcon#read 5, iclass 11, count 0 2006.229.14:21:03.62#ibcon#about to read 6, iclass 11, count 0 2006.229.14:21:03.62#ibcon#read 6, iclass 11, count 0 2006.229.14:21:03.62#ibcon#end of sib2, iclass 11, count 0 2006.229.14:21:03.62#ibcon#*after write, iclass 11, count 0 2006.229.14:21:03.62#ibcon#*before return 0, iclass 11, count 0 2006.229.14:21:03.62#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:21:03.62#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:21:03.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:21:03.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:21:03.62$vck44/vb=6,4 2006.229.14:21:03.62#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.14:21:03.62#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.14:21:03.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:03.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:21:03.68#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:21:03.68#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:21:03.68#ibcon#enter wrdev, iclass 13, count 2 2006.229.14:21:03.68#ibcon#first serial, iclass 13, count 2 2006.229.14:21:03.68#ibcon#enter sib2, iclass 13, count 2 2006.229.14:21:03.68#ibcon#flushed, iclass 13, count 2 2006.229.14:21:03.68#ibcon#about to write, iclass 13, count 2 2006.229.14:21:03.68#ibcon#wrote, iclass 13, count 2 2006.229.14:21:03.68#ibcon#about to read 3, iclass 13, count 2 2006.229.14:21:03.70#ibcon#read 3, iclass 13, count 2 2006.229.14:21:03.70#ibcon#about to read 4, iclass 13, count 2 2006.229.14:21:03.70#ibcon#read 4, iclass 13, count 2 2006.229.14:21:03.70#ibcon#about to read 5, iclass 13, count 2 2006.229.14:21:03.70#ibcon#read 5, iclass 13, count 2 2006.229.14:21:03.70#ibcon#about to read 6, iclass 13, count 2 2006.229.14:21:03.70#ibcon#read 6, iclass 13, count 2 2006.229.14:21:03.70#ibcon#end of sib2, iclass 13, count 2 2006.229.14:21:03.70#ibcon#*mode == 0, iclass 13, count 2 2006.229.14:21:03.70#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.14:21:03.70#ibcon#[27=AT06-04\r\n] 2006.229.14:21:03.70#ibcon#*before write, iclass 13, count 2 2006.229.14:21:03.70#ibcon#enter sib2, iclass 13, count 2 2006.229.14:21:03.70#ibcon#flushed, iclass 13, count 2 2006.229.14:21:03.70#ibcon#about to write, iclass 13, count 2 2006.229.14:21:03.70#ibcon#wrote, iclass 13, count 2 2006.229.14:21:03.70#ibcon#about to read 3, iclass 13, count 2 2006.229.14:21:03.73#ibcon#read 3, iclass 13, count 2 2006.229.14:21:03.73#ibcon#about to read 4, iclass 13, count 2 2006.229.14:21:03.73#ibcon#read 4, iclass 13, count 2 2006.229.14:21:03.73#ibcon#about to read 5, iclass 13, count 2 2006.229.14:21:03.73#ibcon#read 5, iclass 13, count 2 2006.229.14:21:03.73#ibcon#about to read 6, iclass 13, count 2 2006.229.14:21:03.73#ibcon#read 6, iclass 13, count 2 2006.229.14:21:03.73#ibcon#end of sib2, iclass 13, count 2 2006.229.14:21:03.73#ibcon#*after write, iclass 13, count 2 2006.229.14:21:03.73#ibcon#*before return 0, iclass 13, count 2 2006.229.14:21:03.73#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:21:03.73#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:21:03.73#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.14:21:03.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:03.73#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:21:03.85#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:21:03.85#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:21:03.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:21:03.85#ibcon#first serial, iclass 13, count 0 2006.229.14:21:03.85#ibcon#enter sib2, iclass 13, count 0 2006.229.14:21:03.85#ibcon#flushed, iclass 13, count 0 2006.229.14:21:03.85#ibcon#about to write, iclass 13, count 0 2006.229.14:21:03.85#ibcon#wrote, iclass 13, count 0 2006.229.14:21:03.85#ibcon#about to read 3, iclass 13, count 0 2006.229.14:21:03.87#ibcon#read 3, iclass 13, count 0 2006.229.14:21:03.87#ibcon#about to read 4, iclass 13, count 0 2006.229.14:21:03.87#ibcon#read 4, iclass 13, count 0 2006.229.14:21:03.87#ibcon#about to read 5, iclass 13, count 0 2006.229.14:21:03.87#ibcon#read 5, iclass 13, count 0 2006.229.14:21:03.87#ibcon#about to read 6, iclass 13, count 0 2006.229.14:21:03.87#ibcon#read 6, iclass 13, count 0 2006.229.14:21:03.87#ibcon#end of sib2, iclass 13, count 0 2006.229.14:21:03.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:21:03.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:21:03.87#ibcon#[27=USB\r\n] 2006.229.14:21:03.87#ibcon#*before write, iclass 13, count 0 2006.229.14:21:03.87#ibcon#enter sib2, iclass 13, count 0 2006.229.14:21:03.87#ibcon#flushed, iclass 13, count 0 2006.229.14:21:03.87#ibcon#about to write, iclass 13, count 0 2006.229.14:21:03.87#ibcon#wrote, iclass 13, count 0 2006.229.14:21:03.87#ibcon#about to read 3, iclass 13, count 0 2006.229.14:21:03.90#ibcon#read 3, iclass 13, count 0 2006.229.14:21:03.90#ibcon#about to read 4, iclass 13, count 0 2006.229.14:21:03.90#ibcon#read 4, iclass 13, count 0 2006.229.14:21:03.90#ibcon#about to read 5, iclass 13, count 0 2006.229.14:21:03.90#ibcon#read 5, iclass 13, count 0 2006.229.14:21:03.90#ibcon#about to read 6, iclass 13, count 0 2006.229.14:21:03.90#ibcon#read 6, iclass 13, count 0 2006.229.14:21:03.90#ibcon#end of sib2, iclass 13, count 0 2006.229.14:21:03.90#ibcon#*after write, iclass 13, count 0 2006.229.14:21:03.90#ibcon#*before return 0, iclass 13, count 0 2006.229.14:21:03.90#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:21:03.90#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:21:03.90#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:21:03.90#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:21:03.90$vck44/vblo=7,734.99 2006.229.14:21:03.90#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.14:21:03.90#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.14:21:03.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:03.90#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:21:03.90#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:21:03.90#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:21:03.90#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:21:03.90#ibcon#first serial, iclass 15, count 0 2006.229.14:21:03.90#ibcon#enter sib2, iclass 15, count 0 2006.229.14:21:03.90#ibcon#flushed, iclass 15, count 0 2006.229.14:21:03.90#ibcon#about to write, iclass 15, count 0 2006.229.14:21:03.90#ibcon#wrote, iclass 15, count 0 2006.229.14:21:03.90#ibcon#about to read 3, iclass 15, count 0 2006.229.14:21:03.92#ibcon#read 3, iclass 15, count 0 2006.229.14:21:03.92#ibcon#about to read 4, iclass 15, count 0 2006.229.14:21:03.92#ibcon#read 4, iclass 15, count 0 2006.229.14:21:03.92#ibcon#about to read 5, iclass 15, count 0 2006.229.14:21:03.92#ibcon#read 5, iclass 15, count 0 2006.229.14:21:03.92#ibcon#about to read 6, iclass 15, count 0 2006.229.14:21:03.92#ibcon#read 6, iclass 15, count 0 2006.229.14:21:03.92#ibcon#end of sib2, iclass 15, count 0 2006.229.14:21:03.92#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:21:03.92#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:21:03.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:21:03.92#ibcon#*before write, iclass 15, count 0 2006.229.14:21:03.92#ibcon#enter sib2, iclass 15, count 0 2006.229.14:21:03.92#ibcon#flushed, iclass 15, count 0 2006.229.14:21:03.92#ibcon#about to write, iclass 15, count 0 2006.229.14:21:03.92#ibcon#wrote, iclass 15, count 0 2006.229.14:21:03.92#ibcon#about to read 3, iclass 15, count 0 2006.229.14:21:03.96#ibcon#read 3, iclass 15, count 0 2006.229.14:21:03.96#ibcon#about to read 4, iclass 15, count 0 2006.229.14:21:03.96#ibcon#read 4, iclass 15, count 0 2006.229.14:21:03.96#ibcon#about to read 5, iclass 15, count 0 2006.229.14:21:03.96#ibcon#read 5, iclass 15, count 0 2006.229.14:21:03.96#ibcon#about to read 6, iclass 15, count 0 2006.229.14:21:03.96#ibcon#read 6, iclass 15, count 0 2006.229.14:21:03.96#ibcon#end of sib2, iclass 15, count 0 2006.229.14:21:03.96#ibcon#*after write, iclass 15, count 0 2006.229.14:21:03.96#ibcon#*before return 0, iclass 15, count 0 2006.229.14:21:03.96#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:21:03.96#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:21:03.96#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:21:03.96#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:21:03.96$vck44/vb=7,4 2006.229.14:21:03.96#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.14:21:03.96#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.14:21:03.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:03.96#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:21:04.02#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:21:04.02#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:21:04.02#ibcon#enter wrdev, iclass 17, count 2 2006.229.14:21:04.02#ibcon#first serial, iclass 17, count 2 2006.229.14:21:04.02#ibcon#enter sib2, iclass 17, count 2 2006.229.14:21:04.02#ibcon#flushed, iclass 17, count 2 2006.229.14:21:04.02#ibcon#about to write, iclass 17, count 2 2006.229.14:21:04.02#ibcon#wrote, iclass 17, count 2 2006.229.14:21:04.02#ibcon#about to read 3, iclass 17, count 2 2006.229.14:21:04.04#ibcon#read 3, iclass 17, count 2 2006.229.14:21:04.04#ibcon#about to read 4, iclass 17, count 2 2006.229.14:21:04.04#ibcon#read 4, iclass 17, count 2 2006.229.14:21:04.04#ibcon#about to read 5, iclass 17, count 2 2006.229.14:21:04.04#ibcon#read 5, iclass 17, count 2 2006.229.14:21:04.04#ibcon#about to read 6, iclass 17, count 2 2006.229.14:21:04.04#ibcon#read 6, iclass 17, count 2 2006.229.14:21:04.04#ibcon#end of sib2, iclass 17, count 2 2006.229.14:21:04.04#ibcon#*mode == 0, iclass 17, count 2 2006.229.14:21:04.04#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.14:21:04.04#ibcon#[27=AT07-04\r\n] 2006.229.14:21:04.04#ibcon#*before write, iclass 17, count 2 2006.229.14:21:04.04#ibcon#enter sib2, iclass 17, count 2 2006.229.14:21:04.04#ibcon#flushed, iclass 17, count 2 2006.229.14:21:04.04#ibcon#about to write, iclass 17, count 2 2006.229.14:21:04.04#ibcon#wrote, iclass 17, count 2 2006.229.14:21:04.04#ibcon#about to read 3, iclass 17, count 2 2006.229.14:21:04.07#ibcon#read 3, iclass 17, count 2 2006.229.14:21:04.07#ibcon#about to read 4, iclass 17, count 2 2006.229.14:21:04.07#ibcon#read 4, iclass 17, count 2 2006.229.14:21:04.07#ibcon#about to read 5, iclass 17, count 2 2006.229.14:21:04.07#ibcon#read 5, iclass 17, count 2 2006.229.14:21:04.07#ibcon#about to read 6, iclass 17, count 2 2006.229.14:21:04.07#ibcon#read 6, iclass 17, count 2 2006.229.14:21:04.07#ibcon#end of sib2, iclass 17, count 2 2006.229.14:21:04.07#ibcon#*after write, iclass 17, count 2 2006.229.14:21:04.07#ibcon#*before return 0, iclass 17, count 2 2006.229.14:21:04.07#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:21:04.07#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:21:04.07#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.14:21:04.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:04.07#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:21:04.19#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:21:04.19#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:21:04.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:21:04.19#ibcon#first serial, iclass 17, count 0 2006.229.14:21:04.19#ibcon#enter sib2, iclass 17, count 0 2006.229.14:21:04.19#ibcon#flushed, iclass 17, count 0 2006.229.14:21:04.19#ibcon#about to write, iclass 17, count 0 2006.229.14:21:04.19#ibcon#wrote, iclass 17, count 0 2006.229.14:21:04.19#ibcon#about to read 3, iclass 17, count 0 2006.229.14:21:04.21#ibcon#read 3, iclass 17, count 0 2006.229.14:21:04.21#ibcon#about to read 4, iclass 17, count 0 2006.229.14:21:04.21#ibcon#read 4, iclass 17, count 0 2006.229.14:21:04.21#ibcon#about to read 5, iclass 17, count 0 2006.229.14:21:04.21#ibcon#read 5, iclass 17, count 0 2006.229.14:21:04.21#ibcon#about to read 6, iclass 17, count 0 2006.229.14:21:04.21#ibcon#read 6, iclass 17, count 0 2006.229.14:21:04.21#ibcon#end of sib2, iclass 17, count 0 2006.229.14:21:04.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:21:04.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:21:04.21#ibcon#[27=USB\r\n] 2006.229.14:21:04.21#ibcon#*before write, iclass 17, count 0 2006.229.14:21:04.21#ibcon#enter sib2, iclass 17, count 0 2006.229.14:21:04.21#ibcon#flushed, iclass 17, count 0 2006.229.14:21:04.21#ibcon#about to write, iclass 17, count 0 2006.229.14:21:04.21#ibcon#wrote, iclass 17, count 0 2006.229.14:21:04.21#ibcon#about to read 3, iclass 17, count 0 2006.229.14:21:04.24#ibcon#read 3, iclass 17, count 0 2006.229.14:21:04.24#ibcon#about to read 4, iclass 17, count 0 2006.229.14:21:04.24#ibcon#read 4, iclass 17, count 0 2006.229.14:21:04.24#ibcon#about to read 5, iclass 17, count 0 2006.229.14:21:04.24#ibcon#read 5, iclass 17, count 0 2006.229.14:21:04.24#ibcon#about to read 6, iclass 17, count 0 2006.229.14:21:04.24#ibcon#read 6, iclass 17, count 0 2006.229.14:21:04.24#ibcon#end of sib2, iclass 17, count 0 2006.229.14:21:04.24#ibcon#*after write, iclass 17, count 0 2006.229.14:21:04.24#ibcon#*before return 0, iclass 17, count 0 2006.229.14:21:04.24#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:21:04.24#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:21:04.24#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:21:04.24#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:21:04.24$vck44/vblo=8,744.99 2006.229.14:21:04.24#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.14:21:04.24#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.14:21:04.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:21:04.24#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:04.24#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:04.24#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:04.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:21:04.24#ibcon#first serial, iclass 19, count 0 2006.229.14:21:04.24#ibcon#enter sib2, iclass 19, count 0 2006.229.14:21:04.24#ibcon#flushed, iclass 19, count 0 2006.229.14:21:04.24#ibcon#about to write, iclass 19, count 0 2006.229.14:21:04.24#ibcon#wrote, iclass 19, count 0 2006.229.14:21:04.24#ibcon#about to read 3, iclass 19, count 0 2006.229.14:21:04.26#ibcon#read 3, iclass 19, count 0 2006.229.14:21:04.26#ibcon#about to read 4, iclass 19, count 0 2006.229.14:21:04.26#ibcon#read 4, iclass 19, count 0 2006.229.14:21:04.26#ibcon#about to read 5, iclass 19, count 0 2006.229.14:21:04.26#ibcon#read 5, iclass 19, count 0 2006.229.14:21:04.26#ibcon#about to read 6, iclass 19, count 0 2006.229.14:21:04.26#ibcon#read 6, iclass 19, count 0 2006.229.14:21:04.26#ibcon#end of sib2, iclass 19, count 0 2006.229.14:21:04.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:21:04.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:21:04.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:21:04.26#ibcon#*before write, iclass 19, count 0 2006.229.14:21:04.26#ibcon#enter sib2, iclass 19, count 0 2006.229.14:21:04.26#ibcon#flushed, iclass 19, count 0 2006.229.14:21:04.26#ibcon#about to write, iclass 19, count 0 2006.229.14:21:04.26#ibcon#wrote, iclass 19, count 0 2006.229.14:21:04.26#ibcon#about to read 3, iclass 19, count 0 2006.229.14:21:04.30#ibcon#read 3, iclass 19, count 0 2006.229.14:21:04.30#ibcon#about to read 4, iclass 19, count 0 2006.229.14:21:04.30#ibcon#read 4, iclass 19, count 0 2006.229.14:21:04.30#ibcon#about to read 5, iclass 19, count 0 2006.229.14:21:04.30#ibcon#read 5, iclass 19, count 0 2006.229.14:21:04.30#ibcon#about to read 6, iclass 19, count 0 2006.229.14:21:04.30#ibcon#read 6, iclass 19, count 0 2006.229.14:21:04.30#ibcon#end of sib2, iclass 19, count 0 2006.229.14:21:04.30#ibcon#*after write, iclass 19, count 0 2006.229.14:21:04.30#ibcon#*before return 0, iclass 19, count 0 2006.229.14:21:04.30#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:04.30#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:21:04.30#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:21:04.30#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:21:04.30$vck44/vb=8,4 2006.229.14:21:04.30#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.14:21:04.30#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.14:21:04.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:21:04.30#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:04.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:04.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:04.36#ibcon#enter wrdev, iclass 21, count 2 2006.229.14:21:04.36#ibcon#first serial, iclass 21, count 2 2006.229.14:21:04.36#ibcon#enter sib2, iclass 21, count 2 2006.229.14:21:04.36#ibcon#flushed, iclass 21, count 2 2006.229.14:21:04.36#ibcon#about to write, iclass 21, count 2 2006.229.14:21:04.36#ibcon#wrote, iclass 21, count 2 2006.229.14:21:04.36#ibcon#about to read 3, iclass 21, count 2 2006.229.14:21:04.38#ibcon#read 3, iclass 21, count 2 2006.229.14:21:04.38#ibcon#about to read 4, iclass 21, count 2 2006.229.14:21:04.38#ibcon#read 4, iclass 21, count 2 2006.229.14:21:04.38#ibcon#about to read 5, iclass 21, count 2 2006.229.14:21:04.38#ibcon#read 5, iclass 21, count 2 2006.229.14:21:04.38#ibcon#about to read 6, iclass 21, count 2 2006.229.14:21:04.38#ibcon#read 6, iclass 21, count 2 2006.229.14:21:04.38#ibcon#end of sib2, iclass 21, count 2 2006.229.14:21:04.38#ibcon#*mode == 0, iclass 21, count 2 2006.229.14:21:04.38#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.14:21:04.38#ibcon#[27=AT08-04\r\n] 2006.229.14:21:04.38#ibcon#*before write, iclass 21, count 2 2006.229.14:21:04.38#ibcon#enter sib2, iclass 21, count 2 2006.229.14:21:04.38#ibcon#flushed, iclass 21, count 2 2006.229.14:21:04.38#ibcon#about to write, iclass 21, count 2 2006.229.14:21:04.38#ibcon#wrote, iclass 21, count 2 2006.229.14:21:04.38#ibcon#about to read 3, iclass 21, count 2 2006.229.14:21:04.41#ibcon#read 3, iclass 21, count 2 2006.229.14:21:04.41#ibcon#about to read 4, iclass 21, count 2 2006.229.14:21:04.41#ibcon#read 4, iclass 21, count 2 2006.229.14:21:04.41#ibcon#about to read 5, iclass 21, count 2 2006.229.14:21:04.41#ibcon#read 5, iclass 21, count 2 2006.229.14:21:04.41#ibcon#about to read 6, iclass 21, count 2 2006.229.14:21:04.41#ibcon#read 6, iclass 21, count 2 2006.229.14:21:04.41#ibcon#end of sib2, iclass 21, count 2 2006.229.14:21:04.41#ibcon#*after write, iclass 21, count 2 2006.229.14:21:04.41#ibcon#*before return 0, iclass 21, count 2 2006.229.14:21:04.41#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:04.41#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:21:04.41#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.14:21:04.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:21:04.41#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:04.53#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:04.53#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:04.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:21:04.53#ibcon#first serial, iclass 21, count 0 2006.229.14:21:04.53#ibcon#enter sib2, iclass 21, count 0 2006.229.14:21:04.53#ibcon#flushed, iclass 21, count 0 2006.229.14:21:04.53#ibcon#about to write, iclass 21, count 0 2006.229.14:21:04.53#ibcon#wrote, iclass 21, count 0 2006.229.14:21:04.53#ibcon#about to read 3, iclass 21, count 0 2006.229.14:21:04.55#ibcon#read 3, iclass 21, count 0 2006.229.14:21:04.55#ibcon#about to read 4, iclass 21, count 0 2006.229.14:21:04.55#ibcon#read 4, iclass 21, count 0 2006.229.14:21:04.55#ibcon#about to read 5, iclass 21, count 0 2006.229.14:21:04.55#ibcon#read 5, iclass 21, count 0 2006.229.14:21:04.55#ibcon#about to read 6, iclass 21, count 0 2006.229.14:21:04.55#ibcon#read 6, iclass 21, count 0 2006.229.14:21:04.55#ibcon#end of sib2, iclass 21, count 0 2006.229.14:21:04.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:21:04.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:21:04.55#ibcon#[27=USB\r\n] 2006.229.14:21:04.55#ibcon#*before write, iclass 21, count 0 2006.229.14:21:04.55#ibcon#enter sib2, iclass 21, count 0 2006.229.14:21:04.55#ibcon#flushed, iclass 21, count 0 2006.229.14:21:04.55#ibcon#about to write, iclass 21, count 0 2006.229.14:21:04.55#ibcon#wrote, iclass 21, count 0 2006.229.14:21:04.55#ibcon#about to read 3, iclass 21, count 0 2006.229.14:21:04.58#ibcon#read 3, iclass 21, count 0 2006.229.14:21:04.58#ibcon#about to read 4, iclass 21, count 0 2006.229.14:21:04.58#ibcon#read 4, iclass 21, count 0 2006.229.14:21:04.58#ibcon#about to read 5, iclass 21, count 0 2006.229.14:21:04.58#ibcon#read 5, iclass 21, count 0 2006.229.14:21:04.58#ibcon#about to read 6, iclass 21, count 0 2006.229.14:21:04.58#ibcon#read 6, iclass 21, count 0 2006.229.14:21:04.58#ibcon#end of sib2, iclass 21, count 0 2006.229.14:21:04.58#ibcon#*after write, iclass 21, count 0 2006.229.14:21:04.58#ibcon#*before return 0, iclass 21, count 0 2006.229.14:21:04.58#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:04.58#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:21:04.58#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:21:04.58#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:21:04.58$vck44/vabw=wide 2006.229.14:21:04.58#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.14:21:04.58#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.14:21:04.58#ibcon#ireg 8 cls_cnt 0 2006.229.14:21:04.58#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:04.58#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:04.58#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:04.58#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:21:04.58#ibcon#first serial, iclass 23, count 0 2006.229.14:21:04.58#ibcon#enter sib2, iclass 23, count 0 2006.229.14:21:04.58#ibcon#flushed, iclass 23, count 0 2006.229.14:21:04.58#ibcon#about to write, iclass 23, count 0 2006.229.14:21:04.58#ibcon#wrote, iclass 23, count 0 2006.229.14:21:04.58#ibcon#about to read 3, iclass 23, count 0 2006.229.14:21:04.60#ibcon#read 3, iclass 23, count 0 2006.229.14:21:04.60#ibcon#about to read 4, iclass 23, count 0 2006.229.14:21:04.60#ibcon#read 4, iclass 23, count 0 2006.229.14:21:04.60#ibcon#about to read 5, iclass 23, count 0 2006.229.14:21:04.60#ibcon#read 5, iclass 23, count 0 2006.229.14:21:04.60#ibcon#about to read 6, iclass 23, count 0 2006.229.14:21:04.60#ibcon#read 6, iclass 23, count 0 2006.229.14:21:04.60#ibcon#end of sib2, iclass 23, count 0 2006.229.14:21:04.60#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:21:04.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:21:04.60#ibcon#[25=BW32\r\n] 2006.229.14:21:04.60#ibcon#*before write, iclass 23, count 0 2006.229.14:21:04.60#ibcon#enter sib2, iclass 23, count 0 2006.229.14:21:04.60#ibcon#flushed, iclass 23, count 0 2006.229.14:21:04.60#ibcon#about to write, iclass 23, count 0 2006.229.14:21:04.60#ibcon#wrote, iclass 23, count 0 2006.229.14:21:04.60#ibcon#about to read 3, iclass 23, count 0 2006.229.14:21:04.63#ibcon#read 3, iclass 23, count 0 2006.229.14:21:04.63#ibcon#about to read 4, iclass 23, count 0 2006.229.14:21:04.63#ibcon#read 4, iclass 23, count 0 2006.229.14:21:04.63#ibcon#about to read 5, iclass 23, count 0 2006.229.14:21:04.63#ibcon#read 5, iclass 23, count 0 2006.229.14:21:04.63#ibcon#about to read 6, iclass 23, count 0 2006.229.14:21:04.63#ibcon#read 6, iclass 23, count 0 2006.229.14:21:04.63#ibcon#end of sib2, iclass 23, count 0 2006.229.14:21:04.63#ibcon#*after write, iclass 23, count 0 2006.229.14:21:04.63#ibcon#*before return 0, iclass 23, count 0 2006.229.14:21:04.63#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:04.63#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:21:04.63#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:21:04.63#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:21:04.63$vck44/vbbw=wide 2006.229.14:21:04.63#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:21:04.63#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:21:04.63#ibcon#ireg 8 cls_cnt 0 2006.229.14:21:04.63#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:21:04.70#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:21:04.70#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:21:04.70#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:21:04.70#ibcon#first serial, iclass 25, count 0 2006.229.14:21:04.70#ibcon#enter sib2, iclass 25, count 0 2006.229.14:21:04.70#ibcon#flushed, iclass 25, count 0 2006.229.14:21:04.70#ibcon#about to write, iclass 25, count 0 2006.229.14:21:04.70#ibcon#wrote, iclass 25, count 0 2006.229.14:21:04.70#ibcon#about to read 3, iclass 25, count 0 2006.229.14:21:04.72#ibcon#read 3, iclass 25, count 0 2006.229.14:21:04.72#ibcon#about to read 4, iclass 25, count 0 2006.229.14:21:04.72#ibcon#read 4, iclass 25, count 0 2006.229.14:21:04.72#ibcon#about to read 5, iclass 25, count 0 2006.229.14:21:04.72#ibcon#read 5, iclass 25, count 0 2006.229.14:21:04.72#ibcon#about to read 6, iclass 25, count 0 2006.229.14:21:04.72#ibcon#read 6, iclass 25, count 0 2006.229.14:21:04.72#ibcon#end of sib2, iclass 25, count 0 2006.229.14:21:04.72#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:21:04.72#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:21:04.72#ibcon#[27=BW32\r\n] 2006.229.14:21:04.72#ibcon#*before write, iclass 25, count 0 2006.229.14:21:04.72#ibcon#enter sib2, iclass 25, count 0 2006.229.14:21:04.72#ibcon#flushed, iclass 25, count 0 2006.229.14:21:04.72#ibcon#about to write, iclass 25, count 0 2006.229.14:21:04.72#ibcon#wrote, iclass 25, count 0 2006.229.14:21:04.72#ibcon#about to read 3, iclass 25, count 0 2006.229.14:21:04.75#ibcon#read 3, iclass 25, count 0 2006.229.14:21:04.75#ibcon#about to read 4, iclass 25, count 0 2006.229.14:21:04.75#ibcon#read 4, iclass 25, count 0 2006.229.14:21:04.75#ibcon#about to read 5, iclass 25, count 0 2006.229.14:21:04.75#ibcon#read 5, iclass 25, count 0 2006.229.14:21:04.75#ibcon#about to read 6, iclass 25, count 0 2006.229.14:21:04.75#ibcon#read 6, iclass 25, count 0 2006.229.14:21:04.75#ibcon#end of sib2, iclass 25, count 0 2006.229.14:21:04.75#ibcon#*after write, iclass 25, count 0 2006.229.14:21:04.75#ibcon#*before return 0, iclass 25, count 0 2006.229.14:21:04.75#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:21:04.75#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:21:04.75#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:21:04.75#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:21:04.75$setupk4/ifdk4 2006.229.14:21:04.75$ifdk4/lo= 2006.229.14:21:04.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:21:04.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:21:04.75$ifdk4/patch= 2006.229.14:21:04.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:21:04.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:21:04.75$setupk4/!*+20s 2006.229.14:21:11.10#abcon#<5=/06 1.4 2.3 27.511001002.0\r\n> 2006.229.14:21:11.12#abcon#{5=INTERFACE CLEAR} 2006.229.14:21:11.18#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:21:19.26$setupk4/"tpicd 2006.229.14:21:19.26$setupk4/echo=off 2006.229.14:21:19.26$setupk4/xlog=off 2006.229.14:21:19.26:!2006.229.14:22:27 2006.229.14:21:29.14#trakl#Source acquired 2006.229.14:21:30.14#flagr#flagr/antenna,acquired 2006.229.14:22:27.00:preob 2006.229.14:22:28.14/onsource/TRACKING 2006.229.14:22:28.14:!2006.229.14:22:37 2006.229.14:22:37.00:"tape 2006.229.14:22:37.00:"st=record 2006.229.14:22:37.00:data_valid=on 2006.229.14:22:37.00:midob 2006.229.14:22:37.14/onsource/TRACKING 2006.229.14:22:37.14/wx/27.51,1002.0,100 2006.229.14:22:37.26/cable/+6.4127E-03 2006.229.14:22:38.35/va/01,08,usb,yes,29,32 2006.229.14:22:38.35/va/02,07,usb,yes,32,33 2006.229.14:22:38.35/va/03,06,usb,yes,40,42 2006.229.14:22:38.35/va/04,07,usb,yes,33,34 2006.229.14:22:38.35/va/05,04,usb,yes,29,30 2006.229.14:22:38.35/va/06,04,usb,yes,33,33 2006.229.14:22:38.35/va/07,05,usb,yes,29,30 2006.229.14:22:38.35/va/08,06,usb,yes,21,26 2006.229.14:22:38.58/valo/01,524.99,yes,locked 2006.229.14:22:38.58/valo/02,534.99,yes,locked 2006.229.14:22:38.58/valo/03,564.99,yes,locked 2006.229.14:22:38.58/valo/04,624.99,yes,locked 2006.229.14:22:38.58/valo/05,734.99,yes,locked 2006.229.14:22:38.58/valo/06,814.99,yes,locked 2006.229.14:22:38.58/valo/07,864.99,yes,locked 2006.229.14:22:38.58/valo/08,884.99,yes,locked 2006.229.14:22:39.67/vb/01,04,usb,yes,31,29 2006.229.14:22:39.67/vb/02,04,usb,yes,33,33 2006.229.14:22:39.67/vb/03,04,usb,yes,30,33 2006.229.14:22:39.67/vb/04,04,usb,yes,35,33 2006.229.14:22:39.67/vb/05,04,usb,yes,27,29 2006.229.14:22:39.67/vb/06,04,usb,yes,31,28 2006.229.14:22:39.67/vb/07,04,usb,yes,31,31 2006.229.14:22:39.67/vb/08,04,usb,yes,29,32 2006.229.14:22:39.91/vblo/01,629.99,yes,locked 2006.229.14:22:39.91/vblo/02,634.99,yes,locked 2006.229.14:22:39.91/vblo/03,649.99,yes,locked 2006.229.14:22:39.91/vblo/04,679.99,yes,locked 2006.229.14:22:39.91/vblo/05,709.99,yes,locked 2006.229.14:22:39.91/vblo/06,719.99,yes,locked 2006.229.14:22:39.91/vblo/07,734.99,yes,locked 2006.229.14:22:39.91/vblo/08,744.99,yes,locked 2006.229.14:22:40.06/vabw/8 2006.229.14:22:40.21/vbbw/8 2006.229.14:22:40.30/xfe/off,on,12.2 2006.229.14:22:40.67/ifatt/23,28,28,28 2006.229.14:22:41.07/fmout-gps/S +4.61E-07 2006.229.14:22:41.11:!2006.229.14:25:27 2006.229.14:25:27.00:data_valid=off 2006.229.14:25:27.00:"et 2006.229.14:25:27.00:!+3s 2006.229.14:25:30.01:"tape 2006.229.14:25:30.01:postob 2006.229.14:25:30.10/cable/+6.4127E-03 2006.229.14:25:30.10/wx/27.48,1002.1,100 2006.229.14:25:31.07/fmout-gps/S +4.59E-07 2006.229.14:25:31.07:scan_name=229-1428,jd0608,80 2006.229.14:25:31.07:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.14:25:32.14#flagr#flagr/antenna,new-source 2006.229.14:25:32.14:checkk5 2006.229.14:25:32.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:25:32.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:25:33.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:25:33.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:25:34.13/chk_obsdata//k5ts1/T2291422??a.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.14:25:34.53/chk_obsdata//k5ts2/T2291422??b.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.14:25:34.93/chk_obsdata//k5ts3/T2291422??c.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.14:25:35.33/chk_obsdata//k5ts4/T2291422??d.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.14:25:36.08/k5log//k5ts1_log_newline 2006.229.14:25:36.78/k5log//k5ts2_log_newline 2006.229.14:25:37.49/k5log//k5ts3_log_newline 2006.229.14:25:38.21/k5log//k5ts4_log_newline 2006.229.14:25:38.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:25:38.24:setupk4=1 2006.229.14:25:38.24$setupk4/echo=on 2006.229.14:25:38.24$setupk4/pcalon 2006.229.14:25:38.24$pcalon/"no phase cal control is implemented here 2006.229.14:25:38.24$setupk4/"tpicd=stop 2006.229.14:25:38.24$setupk4/"rec=synch_on 2006.229.14:25:38.24$setupk4/"rec_mode=128 2006.229.14:25:38.24$setupk4/!* 2006.229.14:25:38.24$setupk4/recpk4 2006.229.14:25:38.24$recpk4/recpatch= 2006.229.14:25:38.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:25:38.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:25:38.24$setupk4/vck44 2006.229.14:25:38.24$vck44/valo=1,524.99 2006.229.14:25:38.24#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.14:25:38.24#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.14:25:38.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:38.24#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:38.24#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:38.24#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:38.24#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:25:38.24#ibcon#first serial, iclass 30, count 0 2006.229.14:25:38.24#ibcon#enter sib2, iclass 30, count 0 2006.229.14:25:38.24#ibcon#flushed, iclass 30, count 0 2006.229.14:25:38.24#ibcon#about to write, iclass 30, count 0 2006.229.14:25:38.24#ibcon#wrote, iclass 30, count 0 2006.229.14:25:38.24#ibcon#about to read 3, iclass 30, count 0 2006.229.14:25:38.26#ibcon#read 3, iclass 30, count 0 2006.229.14:25:38.26#ibcon#about to read 4, iclass 30, count 0 2006.229.14:25:38.26#ibcon#read 4, iclass 30, count 0 2006.229.14:25:38.26#ibcon#about to read 5, iclass 30, count 0 2006.229.14:25:38.26#ibcon#read 5, iclass 30, count 0 2006.229.14:25:38.26#ibcon#about to read 6, iclass 30, count 0 2006.229.14:25:38.26#ibcon#read 6, iclass 30, count 0 2006.229.14:25:38.26#ibcon#end of sib2, iclass 30, count 0 2006.229.14:25:38.26#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:25:38.26#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:25:38.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:25:38.26#ibcon#*before write, iclass 30, count 0 2006.229.14:25:38.26#ibcon#enter sib2, iclass 30, count 0 2006.229.14:25:38.26#ibcon#flushed, iclass 30, count 0 2006.229.14:25:38.26#ibcon#about to write, iclass 30, count 0 2006.229.14:25:38.26#ibcon#wrote, iclass 30, count 0 2006.229.14:25:38.26#ibcon#about to read 3, iclass 30, count 0 2006.229.14:25:38.31#ibcon#read 3, iclass 30, count 0 2006.229.14:25:38.31#ibcon#about to read 4, iclass 30, count 0 2006.229.14:25:38.31#ibcon#read 4, iclass 30, count 0 2006.229.14:25:38.31#ibcon#about to read 5, iclass 30, count 0 2006.229.14:25:38.31#ibcon#read 5, iclass 30, count 0 2006.229.14:25:38.31#ibcon#about to read 6, iclass 30, count 0 2006.229.14:25:38.31#ibcon#read 6, iclass 30, count 0 2006.229.14:25:38.31#ibcon#end of sib2, iclass 30, count 0 2006.229.14:25:38.31#ibcon#*after write, iclass 30, count 0 2006.229.14:25:38.31#ibcon#*before return 0, iclass 30, count 0 2006.229.14:25:38.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:38.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:38.31#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:25:38.31#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:25:38.31$vck44/va=1,8 2006.229.14:25:38.31#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.14:25:38.31#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.14:25:38.31#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:38.31#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:38.31#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:38.31#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:38.31#ibcon#enter wrdev, iclass 32, count 2 2006.229.14:25:38.31#ibcon#first serial, iclass 32, count 2 2006.229.14:25:38.31#ibcon#enter sib2, iclass 32, count 2 2006.229.14:25:38.31#ibcon#flushed, iclass 32, count 2 2006.229.14:25:38.31#ibcon#about to write, iclass 32, count 2 2006.229.14:25:38.31#ibcon#wrote, iclass 32, count 2 2006.229.14:25:38.31#ibcon#about to read 3, iclass 32, count 2 2006.229.14:25:38.33#ibcon#read 3, iclass 32, count 2 2006.229.14:25:38.33#ibcon#about to read 4, iclass 32, count 2 2006.229.14:25:38.33#ibcon#read 4, iclass 32, count 2 2006.229.14:25:38.33#ibcon#about to read 5, iclass 32, count 2 2006.229.14:25:38.33#ibcon#read 5, iclass 32, count 2 2006.229.14:25:38.33#ibcon#about to read 6, iclass 32, count 2 2006.229.14:25:38.33#ibcon#read 6, iclass 32, count 2 2006.229.14:25:38.33#ibcon#end of sib2, iclass 32, count 2 2006.229.14:25:38.33#ibcon#*mode == 0, iclass 32, count 2 2006.229.14:25:38.33#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.14:25:38.33#ibcon#[25=AT01-08\r\n] 2006.229.14:25:38.33#ibcon#*before write, iclass 32, count 2 2006.229.14:25:38.33#ibcon#enter sib2, iclass 32, count 2 2006.229.14:25:38.33#ibcon#flushed, iclass 32, count 2 2006.229.14:25:38.33#ibcon#about to write, iclass 32, count 2 2006.229.14:25:38.33#ibcon#wrote, iclass 32, count 2 2006.229.14:25:38.33#ibcon#about to read 3, iclass 32, count 2 2006.229.14:25:38.36#ibcon#read 3, iclass 32, count 2 2006.229.14:25:38.36#ibcon#about to read 4, iclass 32, count 2 2006.229.14:25:38.36#ibcon#read 4, iclass 32, count 2 2006.229.14:25:38.36#ibcon#about to read 5, iclass 32, count 2 2006.229.14:25:38.36#ibcon#read 5, iclass 32, count 2 2006.229.14:25:38.36#ibcon#about to read 6, iclass 32, count 2 2006.229.14:25:38.36#ibcon#read 6, iclass 32, count 2 2006.229.14:25:38.36#ibcon#end of sib2, iclass 32, count 2 2006.229.14:25:38.36#ibcon#*after write, iclass 32, count 2 2006.229.14:25:38.36#ibcon#*before return 0, iclass 32, count 2 2006.229.14:25:38.36#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:38.36#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:38.36#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.14:25:38.36#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:38.36#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:38.48#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:38.48#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:38.48#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:25:38.48#ibcon#first serial, iclass 32, count 0 2006.229.14:25:38.48#ibcon#enter sib2, iclass 32, count 0 2006.229.14:25:38.48#ibcon#flushed, iclass 32, count 0 2006.229.14:25:38.48#ibcon#about to write, iclass 32, count 0 2006.229.14:25:38.48#ibcon#wrote, iclass 32, count 0 2006.229.14:25:38.48#ibcon#about to read 3, iclass 32, count 0 2006.229.14:25:38.50#ibcon#read 3, iclass 32, count 0 2006.229.14:25:38.50#ibcon#about to read 4, iclass 32, count 0 2006.229.14:25:38.50#ibcon#read 4, iclass 32, count 0 2006.229.14:25:38.50#ibcon#about to read 5, iclass 32, count 0 2006.229.14:25:38.50#ibcon#read 5, iclass 32, count 0 2006.229.14:25:38.50#ibcon#about to read 6, iclass 32, count 0 2006.229.14:25:38.50#ibcon#read 6, iclass 32, count 0 2006.229.14:25:38.50#ibcon#end of sib2, iclass 32, count 0 2006.229.14:25:38.50#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:25:38.50#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:25:38.50#ibcon#[25=USB\r\n] 2006.229.14:25:38.50#ibcon#*before write, iclass 32, count 0 2006.229.14:25:38.50#ibcon#enter sib2, iclass 32, count 0 2006.229.14:25:38.50#ibcon#flushed, iclass 32, count 0 2006.229.14:25:38.50#ibcon#about to write, iclass 32, count 0 2006.229.14:25:38.50#ibcon#wrote, iclass 32, count 0 2006.229.14:25:38.50#ibcon#about to read 3, iclass 32, count 0 2006.229.14:25:38.53#ibcon#read 3, iclass 32, count 0 2006.229.14:25:38.53#ibcon#about to read 4, iclass 32, count 0 2006.229.14:25:38.53#ibcon#read 4, iclass 32, count 0 2006.229.14:25:38.53#ibcon#about to read 5, iclass 32, count 0 2006.229.14:25:38.53#ibcon#read 5, iclass 32, count 0 2006.229.14:25:38.53#ibcon#about to read 6, iclass 32, count 0 2006.229.14:25:38.53#ibcon#read 6, iclass 32, count 0 2006.229.14:25:38.53#ibcon#end of sib2, iclass 32, count 0 2006.229.14:25:38.53#ibcon#*after write, iclass 32, count 0 2006.229.14:25:38.53#ibcon#*before return 0, iclass 32, count 0 2006.229.14:25:38.53#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:38.53#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:38.53#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:25:38.53#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:25:38.53$vck44/valo=2,534.99 2006.229.14:25:38.53#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.14:25:38.53#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.14:25:38.53#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:38.53#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:38.53#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:38.53#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:38.53#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:25:38.53#ibcon#first serial, iclass 34, count 0 2006.229.14:25:38.53#ibcon#enter sib2, iclass 34, count 0 2006.229.14:25:38.53#ibcon#flushed, iclass 34, count 0 2006.229.14:25:38.53#ibcon#about to write, iclass 34, count 0 2006.229.14:25:38.53#ibcon#wrote, iclass 34, count 0 2006.229.14:25:38.53#ibcon#about to read 3, iclass 34, count 0 2006.229.14:25:38.55#ibcon#read 3, iclass 34, count 0 2006.229.14:25:38.55#ibcon#about to read 4, iclass 34, count 0 2006.229.14:25:38.55#ibcon#read 4, iclass 34, count 0 2006.229.14:25:38.55#ibcon#about to read 5, iclass 34, count 0 2006.229.14:25:38.55#ibcon#read 5, iclass 34, count 0 2006.229.14:25:38.55#ibcon#about to read 6, iclass 34, count 0 2006.229.14:25:38.55#ibcon#read 6, iclass 34, count 0 2006.229.14:25:38.55#ibcon#end of sib2, iclass 34, count 0 2006.229.14:25:38.55#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:25:38.55#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:25:38.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:25:38.55#ibcon#*before write, iclass 34, count 0 2006.229.14:25:38.55#ibcon#enter sib2, iclass 34, count 0 2006.229.14:25:38.55#ibcon#flushed, iclass 34, count 0 2006.229.14:25:38.55#ibcon#about to write, iclass 34, count 0 2006.229.14:25:38.55#ibcon#wrote, iclass 34, count 0 2006.229.14:25:38.55#ibcon#about to read 3, iclass 34, count 0 2006.229.14:25:38.59#ibcon#read 3, iclass 34, count 0 2006.229.14:25:38.59#ibcon#about to read 4, iclass 34, count 0 2006.229.14:25:38.59#ibcon#read 4, iclass 34, count 0 2006.229.14:25:38.59#ibcon#about to read 5, iclass 34, count 0 2006.229.14:25:38.59#ibcon#read 5, iclass 34, count 0 2006.229.14:25:38.59#ibcon#about to read 6, iclass 34, count 0 2006.229.14:25:38.59#ibcon#read 6, iclass 34, count 0 2006.229.14:25:38.59#ibcon#end of sib2, iclass 34, count 0 2006.229.14:25:38.59#ibcon#*after write, iclass 34, count 0 2006.229.14:25:38.59#ibcon#*before return 0, iclass 34, count 0 2006.229.14:25:38.59#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:38.59#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:38.59#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:25:38.59#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:25:38.59$vck44/va=2,7 2006.229.14:25:38.59#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.14:25:38.59#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.14:25:38.59#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:38.59#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:38.65#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:38.65#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:38.65#ibcon#enter wrdev, iclass 36, count 2 2006.229.14:25:38.65#ibcon#first serial, iclass 36, count 2 2006.229.14:25:38.65#ibcon#enter sib2, iclass 36, count 2 2006.229.14:25:38.65#ibcon#flushed, iclass 36, count 2 2006.229.14:25:38.65#ibcon#about to write, iclass 36, count 2 2006.229.14:25:38.65#ibcon#wrote, iclass 36, count 2 2006.229.14:25:38.65#ibcon#about to read 3, iclass 36, count 2 2006.229.14:25:38.67#ibcon#read 3, iclass 36, count 2 2006.229.14:25:38.67#ibcon#about to read 4, iclass 36, count 2 2006.229.14:25:38.67#ibcon#read 4, iclass 36, count 2 2006.229.14:25:38.67#ibcon#about to read 5, iclass 36, count 2 2006.229.14:25:38.67#ibcon#read 5, iclass 36, count 2 2006.229.14:25:38.67#ibcon#about to read 6, iclass 36, count 2 2006.229.14:25:38.67#ibcon#read 6, iclass 36, count 2 2006.229.14:25:38.67#ibcon#end of sib2, iclass 36, count 2 2006.229.14:25:38.67#ibcon#*mode == 0, iclass 36, count 2 2006.229.14:25:38.67#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.14:25:38.67#ibcon#[25=AT02-07\r\n] 2006.229.14:25:38.67#ibcon#*before write, iclass 36, count 2 2006.229.14:25:38.67#ibcon#enter sib2, iclass 36, count 2 2006.229.14:25:38.67#ibcon#flushed, iclass 36, count 2 2006.229.14:25:38.67#ibcon#about to write, iclass 36, count 2 2006.229.14:25:38.67#ibcon#wrote, iclass 36, count 2 2006.229.14:25:38.67#ibcon#about to read 3, iclass 36, count 2 2006.229.14:25:38.70#ibcon#read 3, iclass 36, count 2 2006.229.14:25:38.70#ibcon#about to read 4, iclass 36, count 2 2006.229.14:25:38.70#ibcon#read 4, iclass 36, count 2 2006.229.14:25:38.70#ibcon#about to read 5, iclass 36, count 2 2006.229.14:25:38.70#ibcon#read 5, iclass 36, count 2 2006.229.14:25:38.70#ibcon#about to read 6, iclass 36, count 2 2006.229.14:25:38.70#ibcon#read 6, iclass 36, count 2 2006.229.14:25:38.70#ibcon#end of sib2, iclass 36, count 2 2006.229.14:25:38.70#ibcon#*after write, iclass 36, count 2 2006.229.14:25:38.70#ibcon#*before return 0, iclass 36, count 2 2006.229.14:25:38.70#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:38.70#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:38.70#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.14:25:38.70#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:38.70#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:38.82#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:38.82#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:38.82#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:25:38.82#ibcon#first serial, iclass 36, count 0 2006.229.14:25:38.82#ibcon#enter sib2, iclass 36, count 0 2006.229.14:25:38.82#ibcon#flushed, iclass 36, count 0 2006.229.14:25:38.82#ibcon#about to write, iclass 36, count 0 2006.229.14:25:38.82#ibcon#wrote, iclass 36, count 0 2006.229.14:25:38.82#ibcon#about to read 3, iclass 36, count 0 2006.229.14:25:38.84#ibcon#read 3, iclass 36, count 0 2006.229.14:25:38.84#ibcon#about to read 4, iclass 36, count 0 2006.229.14:25:38.84#ibcon#read 4, iclass 36, count 0 2006.229.14:25:38.84#ibcon#about to read 5, iclass 36, count 0 2006.229.14:25:38.84#ibcon#read 5, iclass 36, count 0 2006.229.14:25:38.84#ibcon#about to read 6, iclass 36, count 0 2006.229.14:25:38.84#ibcon#read 6, iclass 36, count 0 2006.229.14:25:38.84#ibcon#end of sib2, iclass 36, count 0 2006.229.14:25:38.84#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:25:38.84#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:25:38.84#ibcon#[25=USB\r\n] 2006.229.14:25:38.84#ibcon#*before write, iclass 36, count 0 2006.229.14:25:38.84#ibcon#enter sib2, iclass 36, count 0 2006.229.14:25:38.84#ibcon#flushed, iclass 36, count 0 2006.229.14:25:38.84#ibcon#about to write, iclass 36, count 0 2006.229.14:25:38.84#ibcon#wrote, iclass 36, count 0 2006.229.14:25:38.84#ibcon#about to read 3, iclass 36, count 0 2006.229.14:25:38.87#ibcon#read 3, iclass 36, count 0 2006.229.14:25:38.87#ibcon#about to read 4, iclass 36, count 0 2006.229.14:25:38.87#ibcon#read 4, iclass 36, count 0 2006.229.14:25:38.87#ibcon#about to read 5, iclass 36, count 0 2006.229.14:25:38.87#ibcon#read 5, iclass 36, count 0 2006.229.14:25:38.87#ibcon#about to read 6, iclass 36, count 0 2006.229.14:25:38.87#ibcon#read 6, iclass 36, count 0 2006.229.14:25:38.87#ibcon#end of sib2, iclass 36, count 0 2006.229.14:25:38.87#ibcon#*after write, iclass 36, count 0 2006.229.14:25:38.87#ibcon#*before return 0, iclass 36, count 0 2006.229.14:25:38.87#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:38.87#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:38.87#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:25:38.87#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:25:38.87$vck44/valo=3,564.99 2006.229.14:25:38.87#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.14:25:38.87#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.14:25:38.87#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:38.87#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:38.87#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:38.87#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:38.87#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:25:38.87#ibcon#first serial, iclass 38, count 0 2006.229.14:25:38.87#ibcon#enter sib2, iclass 38, count 0 2006.229.14:25:38.87#ibcon#flushed, iclass 38, count 0 2006.229.14:25:38.87#ibcon#about to write, iclass 38, count 0 2006.229.14:25:38.87#ibcon#wrote, iclass 38, count 0 2006.229.14:25:38.87#ibcon#about to read 3, iclass 38, count 0 2006.229.14:25:38.89#ibcon#read 3, iclass 38, count 0 2006.229.14:25:38.89#ibcon#about to read 4, iclass 38, count 0 2006.229.14:25:38.89#ibcon#read 4, iclass 38, count 0 2006.229.14:25:38.89#ibcon#about to read 5, iclass 38, count 0 2006.229.14:25:38.89#ibcon#read 5, iclass 38, count 0 2006.229.14:25:38.89#ibcon#about to read 6, iclass 38, count 0 2006.229.14:25:38.89#ibcon#read 6, iclass 38, count 0 2006.229.14:25:38.89#ibcon#end of sib2, iclass 38, count 0 2006.229.14:25:38.89#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:25:38.89#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:25:38.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:25:38.89#ibcon#*before write, iclass 38, count 0 2006.229.14:25:38.89#ibcon#enter sib2, iclass 38, count 0 2006.229.14:25:38.89#ibcon#flushed, iclass 38, count 0 2006.229.14:25:38.89#ibcon#about to write, iclass 38, count 0 2006.229.14:25:38.89#ibcon#wrote, iclass 38, count 0 2006.229.14:25:38.89#ibcon#about to read 3, iclass 38, count 0 2006.229.14:25:38.93#ibcon#read 3, iclass 38, count 0 2006.229.14:25:38.93#ibcon#about to read 4, iclass 38, count 0 2006.229.14:25:38.93#ibcon#read 4, iclass 38, count 0 2006.229.14:25:38.93#ibcon#about to read 5, iclass 38, count 0 2006.229.14:25:38.93#ibcon#read 5, iclass 38, count 0 2006.229.14:25:38.93#ibcon#about to read 6, iclass 38, count 0 2006.229.14:25:38.93#ibcon#read 6, iclass 38, count 0 2006.229.14:25:38.93#ibcon#end of sib2, iclass 38, count 0 2006.229.14:25:38.93#ibcon#*after write, iclass 38, count 0 2006.229.14:25:38.93#ibcon#*before return 0, iclass 38, count 0 2006.229.14:25:38.93#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:38.93#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:38.93#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:25:38.93#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:25:38.93$vck44/va=3,6 2006.229.14:25:38.93#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.14:25:38.93#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.14:25:38.93#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:38.93#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:38.99#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:38.99#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:38.99#ibcon#enter wrdev, iclass 40, count 2 2006.229.14:25:38.99#ibcon#first serial, iclass 40, count 2 2006.229.14:25:38.99#ibcon#enter sib2, iclass 40, count 2 2006.229.14:25:38.99#ibcon#flushed, iclass 40, count 2 2006.229.14:25:38.99#ibcon#about to write, iclass 40, count 2 2006.229.14:25:38.99#ibcon#wrote, iclass 40, count 2 2006.229.14:25:38.99#ibcon#about to read 3, iclass 40, count 2 2006.229.14:25:39.01#ibcon#read 3, iclass 40, count 2 2006.229.14:25:39.01#ibcon#about to read 4, iclass 40, count 2 2006.229.14:25:39.01#ibcon#read 4, iclass 40, count 2 2006.229.14:25:39.01#ibcon#about to read 5, iclass 40, count 2 2006.229.14:25:39.01#ibcon#read 5, iclass 40, count 2 2006.229.14:25:39.01#ibcon#about to read 6, iclass 40, count 2 2006.229.14:25:39.01#ibcon#read 6, iclass 40, count 2 2006.229.14:25:39.01#ibcon#end of sib2, iclass 40, count 2 2006.229.14:25:39.01#ibcon#*mode == 0, iclass 40, count 2 2006.229.14:25:39.01#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.14:25:39.01#ibcon#[25=AT03-06\r\n] 2006.229.14:25:39.01#ibcon#*before write, iclass 40, count 2 2006.229.14:25:39.01#ibcon#enter sib2, iclass 40, count 2 2006.229.14:25:39.01#ibcon#flushed, iclass 40, count 2 2006.229.14:25:39.01#ibcon#about to write, iclass 40, count 2 2006.229.14:25:39.01#ibcon#wrote, iclass 40, count 2 2006.229.14:25:39.01#ibcon#about to read 3, iclass 40, count 2 2006.229.14:25:39.04#ibcon#read 3, iclass 40, count 2 2006.229.14:25:39.04#ibcon#about to read 4, iclass 40, count 2 2006.229.14:25:39.04#ibcon#read 4, iclass 40, count 2 2006.229.14:25:39.04#ibcon#about to read 5, iclass 40, count 2 2006.229.14:25:39.04#ibcon#read 5, iclass 40, count 2 2006.229.14:25:39.04#ibcon#about to read 6, iclass 40, count 2 2006.229.14:25:39.04#ibcon#read 6, iclass 40, count 2 2006.229.14:25:39.04#ibcon#end of sib2, iclass 40, count 2 2006.229.14:25:39.04#ibcon#*after write, iclass 40, count 2 2006.229.14:25:39.04#ibcon#*before return 0, iclass 40, count 2 2006.229.14:25:39.04#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:39.04#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:39.04#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.14:25:39.04#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:39.04#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:39.16#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:39.16#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:39.16#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:25:39.16#ibcon#first serial, iclass 40, count 0 2006.229.14:25:39.16#ibcon#enter sib2, iclass 40, count 0 2006.229.14:25:39.16#ibcon#flushed, iclass 40, count 0 2006.229.14:25:39.16#ibcon#about to write, iclass 40, count 0 2006.229.14:25:39.16#ibcon#wrote, iclass 40, count 0 2006.229.14:25:39.16#ibcon#about to read 3, iclass 40, count 0 2006.229.14:25:39.18#ibcon#read 3, iclass 40, count 0 2006.229.14:25:39.18#ibcon#about to read 4, iclass 40, count 0 2006.229.14:25:39.18#ibcon#read 4, iclass 40, count 0 2006.229.14:25:39.18#ibcon#about to read 5, iclass 40, count 0 2006.229.14:25:39.18#ibcon#read 5, iclass 40, count 0 2006.229.14:25:39.18#ibcon#about to read 6, iclass 40, count 0 2006.229.14:25:39.18#ibcon#read 6, iclass 40, count 0 2006.229.14:25:39.18#ibcon#end of sib2, iclass 40, count 0 2006.229.14:25:39.18#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:25:39.18#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:25:39.18#ibcon#[25=USB\r\n] 2006.229.14:25:39.18#ibcon#*before write, iclass 40, count 0 2006.229.14:25:39.18#ibcon#enter sib2, iclass 40, count 0 2006.229.14:25:39.18#ibcon#flushed, iclass 40, count 0 2006.229.14:25:39.18#ibcon#about to write, iclass 40, count 0 2006.229.14:25:39.18#ibcon#wrote, iclass 40, count 0 2006.229.14:25:39.18#ibcon#about to read 3, iclass 40, count 0 2006.229.14:25:39.21#ibcon#read 3, iclass 40, count 0 2006.229.14:25:39.21#ibcon#about to read 4, iclass 40, count 0 2006.229.14:25:39.21#ibcon#read 4, iclass 40, count 0 2006.229.14:25:39.21#ibcon#about to read 5, iclass 40, count 0 2006.229.14:25:39.21#ibcon#read 5, iclass 40, count 0 2006.229.14:25:39.21#ibcon#about to read 6, iclass 40, count 0 2006.229.14:25:39.21#ibcon#read 6, iclass 40, count 0 2006.229.14:25:39.21#ibcon#end of sib2, iclass 40, count 0 2006.229.14:25:39.21#ibcon#*after write, iclass 40, count 0 2006.229.14:25:39.21#ibcon#*before return 0, iclass 40, count 0 2006.229.14:25:39.21#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:39.21#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:39.21#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:25:39.21#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:25:39.21$vck44/valo=4,624.99 2006.229.14:25:39.21#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:25:39.21#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:25:39.21#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:39.21#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:39.21#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:39.21#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:39.21#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:25:39.21#ibcon#first serial, iclass 4, count 0 2006.229.14:25:39.21#ibcon#enter sib2, iclass 4, count 0 2006.229.14:25:39.21#ibcon#flushed, iclass 4, count 0 2006.229.14:25:39.21#ibcon#about to write, iclass 4, count 0 2006.229.14:25:39.21#ibcon#wrote, iclass 4, count 0 2006.229.14:25:39.21#ibcon#about to read 3, iclass 4, count 0 2006.229.14:25:39.23#ibcon#read 3, iclass 4, count 0 2006.229.14:25:39.23#ibcon#about to read 4, iclass 4, count 0 2006.229.14:25:39.23#ibcon#read 4, iclass 4, count 0 2006.229.14:25:39.23#ibcon#about to read 5, iclass 4, count 0 2006.229.14:25:39.23#ibcon#read 5, iclass 4, count 0 2006.229.14:25:39.23#ibcon#about to read 6, iclass 4, count 0 2006.229.14:25:39.23#ibcon#read 6, iclass 4, count 0 2006.229.14:25:39.23#ibcon#end of sib2, iclass 4, count 0 2006.229.14:25:39.23#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:25:39.23#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:25:39.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:25:39.23#ibcon#*before write, iclass 4, count 0 2006.229.14:25:39.23#ibcon#enter sib2, iclass 4, count 0 2006.229.14:25:39.23#ibcon#flushed, iclass 4, count 0 2006.229.14:25:39.23#ibcon#about to write, iclass 4, count 0 2006.229.14:25:39.23#ibcon#wrote, iclass 4, count 0 2006.229.14:25:39.23#ibcon#about to read 3, iclass 4, count 0 2006.229.14:25:39.27#ibcon#read 3, iclass 4, count 0 2006.229.14:25:39.27#ibcon#about to read 4, iclass 4, count 0 2006.229.14:25:39.27#ibcon#read 4, iclass 4, count 0 2006.229.14:25:39.27#ibcon#about to read 5, iclass 4, count 0 2006.229.14:25:39.27#ibcon#read 5, iclass 4, count 0 2006.229.14:25:39.27#ibcon#about to read 6, iclass 4, count 0 2006.229.14:25:39.27#ibcon#read 6, iclass 4, count 0 2006.229.14:25:39.27#ibcon#end of sib2, iclass 4, count 0 2006.229.14:25:39.27#ibcon#*after write, iclass 4, count 0 2006.229.14:25:39.27#ibcon#*before return 0, iclass 4, count 0 2006.229.14:25:39.27#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:39.27#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:39.27#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:25:39.27#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:25:39.27$vck44/va=4,7 2006.229.14:25:39.27#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.14:25:39.27#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.14:25:39.27#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:39.27#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:39.33#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:39.33#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:39.33#ibcon#enter wrdev, iclass 6, count 2 2006.229.14:25:39.33#ibcon#first serial, iclass 6, count 2 2006.229.14:25:39.33#ibcon#enter sib2, iclass 6, count 2 2006.229.14:25:39.33#ibcon#flushed, iclass 6, count 2 2006.229.14:25:39.33#ibcon#about to write, iclass 6, count 2 2006.229.14:25:39.33#ibcon#wrote, iclass 6, count 2 2006.229.14:25:39.33#ibcon#about to read 3, iclass 6, count 2 2006.229.14:25:39.35#ibcon#read 3, iclass 6, count 2 2006.229.14:25:39.35#ibcon#about to read 4, iclass 6, count 2 2006.229.14:25:39.35#ibcon#read 4, iclass 6, count 2 2006.229.14:25:39.35#ibcon#about to read 5, iclass 6, count 2 2006.229.14:25:39.35#ibcon#read 5, iclass 6, count 2 2006.229.14:25:39.35#ibcon#about to read 6, iclass 6, count 2 2006.229.14:25:39.35#ibcon#read 6, iclass 6, count 2 2006.229.14:25:39.35#ibcon#end of sib2, iclass 6, count 2 2006.229.14:25:39.35#ibcon#*mode == 0, iclass 6, count 2 2006.229.14:25:39.35#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.14:25:39.35#ibcon#[25=AT04-07\r\n] 2006.229.14:25:39.35#ibcon#*before write, iclass 6, count 2 2006.229.14:25:39.35#ibcon#enter sib2, iclass 6, count 2 2006.229.14:25:39.35#ibcon#flushed, iclass 6, count 2 2006.229.14:25:39.35#ibcon#about to write, iclass 6, count 2 2006.229.14:25:39.35#ibcon#wrote, iclass 6, count 2 2006.229.14:25:39.35#ibcon#about to read 3, iclass 6, count 2 2006.229.14:25:39.38#ibcon#read 3, iclass 6, count 2 2006.229.14:25:39.38#ibcon#about to read 4, iclass 6, count 2 2006.229.14:25:39.38#ibcon#read 4, iclass 6, count 2 2006.229.14:25:39.38#ibcon#about to read 5, iclass 6, count 2 2006.229.14:25:39.38#ibcon#read 5, iclass 6, count 2 2006.229.14:25:39.38#ibcon#about to read 6, iclass 6, count 2 2006.229.14:25:39.38#ibcon#read 6, iclass 6, count 2 2006.229.14:25:39.38#ibcon#end of sib2, iclass 6, count 2 2006.229.14:25:39.38#ibcon#*after write, iclass 6, count 2 2006.229.14:25:39.38#ibcon#*before return 0, iclass 6, count 2 2006.229.14:25:39.40#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:39.40#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:39.41#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.14:25:39.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:39.41#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:39.51#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:39.51#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:39.51#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:25:39.51#ibcon#first serial, iclass 6, count 0 2006.229.14:25:39.51#ibcon#enter sib2, iclass 6, count 0 2006.229.14:25:39.51#ibcon#flushed, iclass 6, count 0 2006.229.14:25:39.51#ibcon#about to write, iclass 6, count 0 2006.229.14:25:39.51#ibcon#wrote, iclass 6, count 0 2006.229.14:25:39.51#ibcon#about to read 3, iclass 6, count 0 2006.229.14:25:39.53#ibcon#read 3, iclass 6, count 0 2006.229.14:25:39.53#ibcon#about to read 4, iclass 6, count 0 2006.229.14:25:39.53#ibcon#read 4, iclass 6, count 0 2006.229.14:25:39.53#ibcon#about to read 5, iclass 6, count 0 2006.229.14:25:39.53#ibcon#read 5, iclass 6, count 0 2006.229.14:25:39.53#ibcon#about to read 6, iclass 6, count 0 2006.229.14:25:39.53#ibcon#read 6, iclass 6, count 0 2006.229.14:25:39.53#ibcon#end of sib2, iclass 6, count 0 2006.229.14:25:39.53#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:25:39.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:25:39.53#ibcon#[25=USB\r\n] 2006.229.14:25:39.53#ibcon#*before write, iclass 6, count 0 2006.229.14:25:39.53#ibcon#enter sib2, iclass 6, count 0 2006.229.14:25:39.53#ibcon#flushed, iclass 6, count 0 2006.229.14:25:39.53#ibcon#about to write, iclass 6, count 0 2006.229.14:25:39.53#ibcon#wrote, iclass 6, count 0 2006.229.14:25:39.53#ibcon#about to read 3, iclass 6, count 0 2006.229.14:25:39.56#ibcon#read 3, iclass 6, count 0 2006.229.14:25:39.56#ibcon#about to read 4, iclass 6, count 0 2006.229.14:25:39.56#ibcon#read 4, iclass 6, count 0 2006.229.14:25:39.56#ibcon#about to read 5, iclass 6, count 0 2006.229.14:25:39.56#ibcon#read 5, iclass 6, count 0 2006.229.14:25:39.56#ibcon#about to read 6, iclass 6, count 0 2006.229.14:25:39.56#ibcon#read 6, iclass 6, count 0 2006.229.14:25:39.56#ibcon#end of sib2, iclass 6, count 0 2006.229.14:25:39.56#ibcon#*after write, iclass 6, count 0 2006.229.14:25:39.56#ibcon#*before return 0, iclass 6, count 0 2006.229.14:25:39.56#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:39.56#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:39.56#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:25:39.56#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:25:39.56$vck44/valo=5,734.99 2006.229.14:25:39.56#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.14:25:39.56#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.14:25:39.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:39.56#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:39.56#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:39.56#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:39.56#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:25:39.56#ibcon#first serial, iclass 10, count 0 2006.229.14:25:39.56#ibcon#enter sib2, iclass 10, count 0 2006.229.14:25:39.56#ibcon#flushed, iclass 10, count 0 2006.229.14:25:39.56#ibcon#about to write, iclass 10, count 0 2006.229.14:25:39.56#ibcon#wrote, iclass 10, count 0 2006.229.14:25:39.56#ibcon#about to read 3, iclass 10, count 0 2006.229.14:25:39.58#ibcon#read 3, iclass 10, count 0 2006.229.14:25:39.58#ibcon#about to read 4, iclass 10, count 0 2006.229.14:25:39.58#ibcon#read 4, iclass 10, count 0 2006.229.14:25:39.58#ibcon#about to read 5, iclass 10, count 0 2006.229.14:25:39.58#ibcon#read 5, iclass 10, count 0 2006.229.14:25:39.58#ibcon#about to read 6, iclass 10, count 0 2006.229.14:25:39.58#ibcon#read 6, iclass 10, count 0 2006.229.14:25:39.58#ibcon#end of sib2, iclass 10, count 0 2006.229.14:25:39.58#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:25:39.58#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:25:39.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:25:39.58#ibcon#*before write, iclass 10, count 0 2006.229.14:25:39.58#ibcon#enter sib2, iclass 10, count 0 2006.229.14:25:39.58#ibcon#flushed, iclass 10, count 0 2006.229.14:25:39.58#ibcon#about to write, iclass 10, count 0 2006.229.14:25:39.58#ibcon#wrote, iclass 10, count 0 2006.229.14:25:39.58#ibcon#about to read 3, iclass 10, count 0 2006.229.14:25:39.62#ibcon#read 3, iclass 10, count 0 2006.229.14:25:39.62#ibcon#about to read 4, iclass 10, count 0 2006.229.14:25:39.62#ibcon#read 4, iclass 10, count 0 2006.229.14:25:39.62#ibcon#about to read 5, iclass 10, count 0 2006.229.14:25:39.62#ibcon#read 5, iclass 10, count 0 2006.229.14:25:39.62#ibcon#about to read 6, iclass 10, count 0 2006.229.14:25:39.62#ibcon#read 6, iclass 10, count 0 2006.229.14:25:39.62#ibcon#end of sib2, iclass 10, count 0 2006.229.14:25:39.62#ibcon#*after write, iclass 10, count 0 2006.229.14:25:39.62#ibcon#*before return 0, iclass 10, count 0 2006.229.14:25:39.62#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:39.62#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:39.62#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:25:39.62#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:25:39.62$vck44/va=5,4 2006.229.14:25:39.62#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.14:25:39.62#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.14:25:39.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:39.62#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:39.68#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:39.68#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:39.68#ibcon#enter wrdev, iclass 12, count 2 2006.229.14:25:39.68#ibcon#first serial, iclass 12, count 2 2006.229.14:25:39.68#ibcon#enter sib2, iclass 12, count 2 2006.229.14:25:39.68#ibcon#flushed, iclass 12, count 2 2006.229.14:25:39.68#ibcon#about to write, iclass 12, count 2 2006.229.14:25:39.68#ibcon#wrote, iclass 12, count 2 2006.229.14:25:39.68#ibcon#about to read 3, iclass 12, count 2 2006.229.14:25:39.70#ibcon#read 3, iclass 12, count 2 2006.229.14:25:39.70#ibcon#about to read 4, iclass 12, count 2 2006.229.14:25:39.70#ibcon#read 4, iclass 12, count 2 2006.229.14:25:39.70#ibcon#about to read 5, iclass 12, count 2 2006.229.14:25:39.70#ibcon#read 5, iclass 12, count 2 2006.229.14:25:39.70#ibcon#about to read 6, iclass 12, count 2 2006.229.14:25:39.70#ibcon#read 6, iclass 12, count 2 2006.229.14:25:39.70#ibcon#end of sib2, iclass 12, count 2 2006.229.14:25:39.70#ibcon#*mode == 0, iclass 12, count 2 2006.229.14:25:39.70#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.14:25:39.70#ibcon#[25=AT05-04\r\n] 2006.229.14:25:39.70#ibcon#*before write, iclass 12, count 2 2006.229.14:25:39.70#ibcon#enter sib2, iclass 12, count 2 2006.229.14:25:39.70#ibcon#flushed, iclass 12, count 2 2006.229.14:25:39.70#ibcon#about to write, iclass 12, count 2 2006.229.14:25:39.70#ibcon#wrote, iclass 12, count 2 2006.229.14:25:39.70#ibcon#about to read 3, iclass 12, count 2 2006.229.14:25:39.73#ibcon#read 3, iclass 12, count 2 2006.229.14:25:39.73#ibcon#about to read 4, iclass 12, count 2 2006.229.14:25:39.73#ibcon#read 4, iclass 12, count 2 2006.229.14:25:39.73#ibcon#about to read 5, iclass 12, count 2 2006.229.14:25:39.73#ibcon#read 5, iclass 12, count 2 2006.229.14:25:39.73#ibcon#about to read 6, iclass 12, count 2 2006.229.14:25:39.73#ibcon#read 6, iclass 12, count 2 2006.229.14:25:39.73#ibcon#end of sib2, iclass 12, count 2 2006.229.14:25:39.73#ibcon#*after write, iclass 12, count 2 2006.229.14:25:39.73#ibcon#*before return 0, iclass 12, count 2 2006.229.14:25:39.73#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:39.73#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:39.73#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.14:25:39.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:39.73#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:39.85#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:39.85#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:39.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:25:39.85#ibcon#first serial, iclass 12, count 0 2006.229.14:25:39.85#ibcon#enter sib2, iclass 12, count 0 2006.229.14:25:39.85#ibcon#flushed, iclass 12, count 0 2006.229.14:25:39.85#ibcon#about to write, iclass 12, count 0 2006.229.14:25:39.85#ibcon#wrote, iclass 12, count 0 2006.229.14:25:39.85#ibcon#about to read 3, iclass 12, count 0 2006.229.14:25:39.87#ibcon#read 3, iclass 12, count 0 2006.229.14:25:39.87#ibcon#about to read 4, iclass 12, count 0 2006.229.14:25:39.87#ibcon#read 4, iclass 12, count 0 2006.229.14:25:39.87#ibcon#about to read 5, iclass 12, count 0 2006.229.14:25:39.87#ibcon#read 5, iclass 12, count 0 2006.229.14:25:39.87#ibcon#about to read 6, iclass 12, count 0 2006.229.14:25:39.87#ibcon#read 6, iclass 12, count 0 2006.229.14:25:39.87#ibcon#end of sib2, iclass 12, count 0 2006.229.14:25:39.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:25:39.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:25:39.87#ibcon#[25=USB\r\n] 2006.229.14:25:39.87#ibcon#*before write, iclass 12, count 0 2006.229.14:25:39.87#ibcon#enter sib2, iclass 12, count 0 2006.229.14:25:39.87#ibcon#flushed, iclass 12, count 0 2006.229.14:25:39.87#ibcon#about to write, iclass 12, count 0 2006.229.14:25:39.87#ibcon#wrote, iclass 12, count 0 2006.229.14:25:39.87#ibcon#about to read 3, iclass 12, count 0 2006.229.14:25:39.90#ibcon#read 3, iclass 12, count 0 2006.229.14:25:39.90#ibcon#about to read 4, iclass 12, count 0 2006.229.14:25:39.90#ibcon#read 4, iclass 12, count 0 2006.229.14:25:39.90#ibcon#about to read 5, iclass 12, count 0 2006.229.14:25:39.90#ibcon#read 5, iclass 12, count 0 2006.229.14:25:39.90#ibcon#about to read 6, iclass 12, count 0 2006.229.14:25:39.90#ibcon#read 6, iclass 12, count 0 2006.229.14:25:39.90#ibcon#end of sib2, iclass 12, count 0 2006.229.14:25:39.90#ibcon#*after write, iclass 12, count 0 2006.229.14:25:39.90#ibcon#*before return 0, iclass 12, count 0 2006.229.14:25:39.90#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:39.90#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:39.90#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:25:39.90#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:25:39.90$vck44/valo=6,814.99 2006.229.14:25:39.90#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.14:25:39.90#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.14:25:39.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:39.90#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:39.90#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:39.90#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:39.90#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:25:39.90#ibcon#first serial, iclass 14, count 0 2006.229.14:25:39.90#ibcon#enter sib2, iclass 14, count 0 2006.229.14:25:39.90#ibcon#flushed, iclass 14, count 0 2006.229.14:25:39.90#ibcon#about to write, iclass 14, count 0 2006.229.14:25:39.90#ibcon#wrote, iclass 14, count 0 2006.229.14:25:39.90#ibcon#about to read 3, iclass 14, count 0 2006.229.14:25:39.92#ibcon#read 3, iclass 14, count 0 2006.229.14:25:39.92#ibcon#about to read 4, iclass 14, count 0 2006.229.14:25:39.92#ibcon#read 4, iclass 14, count 0 2006.229.14:25:39.92#ibcon#about to read 5, iclass 14, count 0 2006.229.14:25:39.92#ibcon#read 5, iclass 14, count 0 2006.229.14:25:39.92#ibcon#about to read 6, iclass 14, count 0 2006.229.14:25:39.92#ibcon#read 6, iclass 14, count 0 2006.229.14:25:39.92#ibcon#end of sib2, iclass 14, count 0 2006.229.14:25:39.92#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:25:39.92#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:25:39.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:25:39.92#ibcon#*before write, iclass 14, count 0 2006.229.14:25:39.92#ibcon#enter sib2, iclass 14, count 0 2006.229.14:25:39.92#ibcon#flushed, iclass 14, count 0 2006.229.14:25:39.92#ibcon#about to write, iclass 14, count 0 2006.229.14:25:39.92#ibcon#wrote, iclass 14, count 0 2006.229.14:25:39.92#ibcon#about to read 3, iclass 14, count 0 2006.229.14:25:39.96#ibcon#read 3, iclass 14, count 0 2006.229.14:25:39.96#ibcon#about to read 4, iclass 14, count 0 2006.229.14:25:39.96#ibcon#read 4, iclass 14, count 0 2006.229.14:25:39.96#ibcon#about to read 5, iclass 14, count 0 2006.229.14:25:39.96#ibcon#read 5, iclass 14, count 0 2006.229.14:25:39.96#ibcon#about to read 6, iclass 14, count 0 2006.229.14:25:39.96#ibcon#read 6, iclass 14, count 0 2006.229.14:25:39.96#ibcon#end of sib2, iclass 14, count 0 2006.229.14:25:39.96#ibcon#*after write, iclass 14, count 0 2006.229.14:25:39.96#ibcon#*before return 0, iclass 14, count 0 2006.229.14:25:39.96#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:39.96#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:39.96#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:25:39.96#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:25:39.96$vck44/va=6,4 2006.229.14:25:39.96#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.14:25:39.96#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.14:25:39.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:39.96#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:40.02#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:40.02#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:40.02#ibcon#enter wrdev, iclass 16, count 2 2006.229.14:25:40.02#ibcon#first serial, iclass 16, count 2 2006.229.14:25:40.02#ibcon#enter sib2, iclass 16, count 2 2006.229.14:25:40.02#ibcon#flushed, iclass 16, count 2 2006.229.14:25:40.02#ibcon#about to write, iclass 16, count 2 2006.229.14:25:40.02#ibcon#wrote, iclass 16, count 2 2006.229.14:25:40.02#ibcon#about to read 3, iclass 16, count 2 2006.229.14:25:40.04#ibcon#read 3, iclass 16, count 2 2006.229.14:25:40.04#ibcon#about to read 4, iclass 16, count 2 2006.229.14:25:40.04#ibcon#read 4, iclass 16, count 2 2006.229.14:25:40.04#ibcon#about to read 5, iclass 16, count 2 2006.229.14:25:40.04#ibcon#read 5, iclass 16, count 2 2006.229.14:25:40.04#ibcon#about to read 6, iclass 16, count 2 2006.229.14:25:40.04#ibcon#read 6, iclass 16, count 2 2006.229.14:25:40.04#ibcon#end of sib2, iclass 16, count 2 2006.229.14:25:40.04#ibcon#*mode == 0, iclass 16, count 2 2006.229.14:25:40.04#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.14:25:40.04#ibcon#[25=AT06-04\r\n] 2006.229.14:25:40.04#ibcon#*before write, iclass 16, count 2 2006.229.14:25:40.04#ibcon#enter sib2, iclass 16, count 2 2006.229.14:25:40.04#ibcon#flushed, iclass 16, count 2 2006.229.14:25:40.04#ibcon#about to write, iclass 16, count 2 2006.229.14:25:40.04#ibcon#wrote, iclass 16, count 2 2006.229.14:25:40.04#ibcon#about to read 3, iclass 16, count 2 2006.229.14:25:40.07#ibcon#read 3, iclass 16, count 2 2006.229.14:25:40.07#ibcon#about to read 4, iclass 16, count 2 2006.229.14:25:40.07#ibcon#read 4, iclass 16, count 2 2006.229.14:25:40.07#ibcon#about to read 5, iclass 16, count 2 2006.229.14:25:40.07#ibcon#read 5, iclass 16, count 2 2006.229.14:25:40.07#ibcon#about to read 6, iclass 16, count 2 2006.229.14:25:40.07#ibcon#read 6, iclass 16, count 2 2006.229.14:25:40.07#ibcon#end of sib2, iclass 16, count 2 2006.229.14:25:40.07#ibcon#*after write, iclass 16, count 2 2006.229.14:25:40.07#ibcon#*before return 0, iclass 16, count 2 2006.229.14:25:40.07#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:40.07#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:40.07#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.14:25:40.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:40.07#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:40.19#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:40.19#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:40.19#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:25:40.19#ibcon#first serial, iclass 16, count 0 2006.229.14:25:40.19#ibcon#enter sib2, iclass 16, count 0 2006.229.14:25:40.19#ibcon#flushed, iclass 16, count 0 2006.229.14:25:40.19#ibcon#about to write, iclass 16, count 0 2006.229.14:25:40.19#ibcon#wrote, iclass 16, count 0 2006.229.14:25:40.19#ibcon#about to read 3, iclass 16, count 0 2006.229.14:25:40.21#ibcon#read 3, iclass 16, count 0 2006.229.14:25:40.21#ibcon#about to read 4, iclass 16, count 0 2006.229.14:25:40.21#ibcon#read 4, iclass 16, count 0 2006.229.14:25:40.21#ibcon#about to read 5, iclass 16, count 0 2006.229.14:25:40.21#ibcon#read 5, iclass 16, count 0 2006.229.14:25:40.21#ibcon#about to read 6, iclass 16, count 0 2006.229.14:25:40.21#ibcon#read 6, iclass 16, count 0 2006.229.14:25:40.21#ibcon#end of sib2, iclass 16, count 0 2006.229.14:25:40.21#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:25:40.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:25:40.21#ibcon#[25=USB\r\n] 2006.229.14:25:40.21#ibcon#*before write, iclass 16, count 0 2006.229.14:25:40.21#ibcon#enter sib2, iclass 16, count 0 2006.229.14:25:40.21#ibcon#flushed, iclass 16, count 0 2006.229.14:25:40.21#ibcon#about to write, iclass 16, count 0 2006.229.14:25:40.21#ibcon#wrote, iclass 16, count 0 2006.229.14:25:40.21#ibcon#about to read 3, iclass 16, count 0 2006.229.14:25:40.24#ibcon#read 3, iclass 16, count 0 2006.229.14:25:40.24#ibcon#about to read 4, iclass 16, count 0 2006.229.14:25:40.24#ibcon#read 4, iclass 16, count 0 2006.229.14:25:40.24#ibcon#about to read 5, iclass 16, count 0 2006.229.14:25:40.24#ibcon#read 5, iclass 16, count 0 2006.229.14:25:40.24#ibcon#about to read 6, iclass 16, count 0 2006.229.14:25:40.24#ibcon#read 6, iclass 16, count 0 2006.229.14:25:40.24#ibcon#end of sib2, iclass 16, count 0 2006.229.14:25:40.24#ibcon#*after write, iclass 16, count 0 2006.229.14:25:40.24#ibcon#*before return 0, iclass 16, count 0 2006.229.14:25:40.24#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:40.24#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:40.24#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:25:40.24#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:25:40.24$vck44/valo=7,864.99 2006.229.14:25:40.24#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.14:25:40.24#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.14:25:40.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:40.24#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:40.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:40.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:40.24#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:25:40.24#ibcon#first serial, iclass 18, count 0 2006.229.14:25:40.24#ibcon#enter sib2, iclass 18, count 0 2006.229.14:25:40.24#ibcon#flushed, iclass 18, count 0 2006.229.14:25:40.24#ibcon#about to write, iclass 18, count 0 2006.229.14:25:40.24#ibcon#wrote, iclass 18, count 0 2006.229.14:25:40.24#ibcon#about to read 3, iclass 18, count 0 2006.229.14:25:40.26#ibcon#read 3, iclass 18, count 0 2006.229.14:25:40.26#ibcon#about to read 4, iclass 18, count 0 2006.229.14:25:40.26#ibcon#read 4, iclass 18, count 0 2006.229.14:25:40.26#ibcon#about to read 5, iclass 18, count 0 2006.229.14:25:40.26#ibcon#read 5, iclass 18, count 0 2006.229.14:25:40.26#ibcon#about to read 6, iclass 18, count 0 2006.229.14:25:40.26#ibcon#read 6, iclass 18, count 0 2006.229.14:25:40.26#ibcon#end of sib2, iclass 18, count 0 2006.229.14:25:40.26#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:25:40.26#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:25:40.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:25:40.26#ibcon#*before write, iclass 18, count 0 2006.229.14:25:40.26#ibcon#enter sib2, iclass 18, count 0 2006.229.14:25:40.26#ibcon#flushed, iclass 18, count 0 2006.229.14:25:40.26#ibcon#about to write, iclass 18, count 0 2006.229.14:25:40.26#ibcon#wrote, iclass 18, count 0 2006.229.14:25:40.26#ibcon#about to read 3, iclass 18, count 0 2006.229.14:25:40.30#ibcon#read 3, iclass 18, count 0 2006.229.14:25:40.30#ibcon#about to read 4, iclass 18, count 0 2006.229.14:25:40.30#ibcon#read 4, iclass 18, count 0 2006.229.14:25:40.30#ibcon#about to read 5, iclass 18, count 0 2006.229.14:25:40.30#ibcon#read 5, iclass 18, count 0 2006.229.14:25:40.30#ibcon#about to read 6, iclass 18, count 0 2006.229.14:25:40.30#ibcon#read 6, iclass 18, count 0 2006.229.14:25:40.30#ibcon#end of sib2, iclass 18, count 0 2006.229.14:25:40.30#ibcon#*after write, iclass 18, count 0 2006.229.14:25:40.30#ibcon#*before return 0, iclass 18, count 0 2006.229.14:25:40.30#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:40.30#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:40.30#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:25:40.30#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:25:40.30$vck44/va=7,5 2006.229.14:25:40.30#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.14:25:40.30#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.14:25:40.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:40.30#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:40.36#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:40.36#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:40.36#ibcon#enter wrdev, iclass 20, count 2 2006.229.14:25:40.36#ibcon#first serial, iclass 20, count 2 2006.229.14:25:40.36#ibcon#enter sib2, iclass 20, count 2 2006.229.14:25:40.36#ibcon#flushed, iclass 20, count 2 2006.229.14:25:40.36#ibcon#about to write, iclass 20, count 2 2006.229.14:25:40.36#ibcon#wrote, iclass 20, count 2 2006.229.14:25:40.36#ibcon#about to read 3, iclass 20, count 2 2006.229.14:25:40.38#ibcon#read 3, iclass 20, count 2 2006.229.14:25:40.38#ibcon#about to read 4, iclass 20, count 2 2006.229.14:25:40.38#ibcon#read 4, iclass 20, count 2 2006.229.14:25:40.38#ibcon#about to read 5, iclass 20, count 2 2006.229.14:25:40.38#ibcon#read 5, iclass 20, count 2 2006.229.14:25:40.38#ibcon#about to read 6, iclass 20, count 2 2006.229.14:25:40.38#ibcon#read 6, iclass 20, count 2 2006.229.14:25:40.38#ibcon#end of sib2, iclass 20, count 2 2006.229.14:25:40.38#ibcon#*mode == 0, iclass 20, count 2 2006.229.14:25:40.38#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.14:25:40.38#ibcon#[25=AT07-05\r\n] 2006.229.14:25:40.38#ibcon#*before write, iclass 20, count 2 2006.229.14:25:40.38#ibcon#enter sib2, iclass 20, count 2 2006.229.14:25:40.38#ibcon#flushed, iclass 20, count 2 2006.229.14:25:40.38#ibcon#about to write, iclass 20, count 2 2006.229.14:25:40.38#ibcon#wrote, iclass 20, count 2 2006.229.14:25:40.38#ibcon#about to read 3, iclass 20, count 2 2006.229.14:25:40.41#ibcon#read 3, iclass 20, count 2 2006.229.14:25:40.41#ibcon#about to read 4, iclass 20, count 2 2006.229.14:25:40.41#ibcon#read 4, iclass 20, count 2 2006.229.14:25:40.41#ibcon#about to read 5, iclass 20, count 2 2006.229.14:25:40.41#ibcon#read 5, iclass 20, count 2 2006.229.14:25:40.41#ibcon#about to read 6, iclass 20, count 2 2006.229.14:25:40.41#ibcon#read 6, iclass 20, count 2 2006.229.14:25:40.41#ibcon#end of sib2, iclass 20, count 2 2006.229.14:25:40.41#ibcon#*after write, iclass 20, count 2 2006.229.14:25:40.41#ibcon#*before return 0, iclass 20, count 2 2006.229.14:25:40.41#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:40.41#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:40.41#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.14:25:40.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:40.41#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:40.53#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:40.53#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:40.53#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:25:40.53#ibcon#first serial, iclass 20, count 0 2006.229.14:25:40.53#ibcon#enter sib2, iclass 20, count 0 2006.229.14:25:40.53#ibcon#flushed, iclass 20, count 0 2006.229.14:25:40.53#ibcon#about to write, iclass 20, count 0 2006.229.14:25:40.53#ibcon#wrote, iclass 20, count 0 2006.229.14:25:40.53#ibcon#about to read 3, iclass 20, count 0 2006.229.14:25:40.55#ibcon#read 3, iclass 20, count 0 2006.229.14:25:40.55#ibcon#about to read 4, iclass 20, count 0 2006.229.14:25:40.55#ibcon#read 4, iclass 20, count 0 2006.229.14:25:40.55#ibcon#about to read 5, iclass 20, count 0 2006.229.14:25:40.55#ibcon#read 5, iclass 20, count 0 2006.229.14:25:40.55#ibcon#about to read 6, iclass 20, count 0 2006.229.14:25:40.55#ibcon#read 6, iclass 20, count 0 2006.229.14:25:40.55#ibcon#end of sib2, iclass 20, count 0 2006.229.14:25:40.55#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:25:40.55#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:25:40.55#ibcon#[25=USB\r\n] 2006.229.14:25:40.55#ibcon#*before write, iclass 20, count 0 2006.229.14:25:40.55#ibcon#enter sib2, iclass 20, count 0 2006.229.14:25:40.55#ibcon#flushed, iclass 20, count 0 2006.229.14:25:40.55#ibcon#about to write, iclass 20, count 0 2006.229.14:25:40.55#ibcon#wrote, iclass 20, count 0 2006.229.14:25:40.55#ibcon#about to read 3, iclass 20, count 0 2006.229.14:25:40.58#ibcon#read 3, iclass 20, count 0 2006.229.14:25:40.58#ibcon#about to read 4, iclass 20, count 0 2006.229.14:25:40.58#ibcon#read 4, iclass 20, count 0 2006.229.14:25:40.58#ibcon#about to read 5, iclass 20, count 0 2006.229.14:25:40.58#ibcon#read 5, iclass 20, count 0 2006.229.14:25:40.58#ibcon#about to read 6, iclass 20, count 0 2006.229.14:25:40.58#ibcon#read 6, iclass 20, count 0 2006.229.14:25:40.58#ibcon#end of sib2, iclass 20, count 0 2006.229.14:25:40.58#ibcon#*after write, iclass 20, count 0 2006.229.14:25:40.58#ibcon#*before return 0, iclass 20, count 0 2006.229.14:25:40.58#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:40.58#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:40.58#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:25:40.58#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:25:40.58$vck44/valo=8,884.99 2006.229.14:25:40.58#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:25:40.58#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:25:40.58#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:40.58#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:40.58#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:40.58#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:40.58#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:25:40.58#ibcon#first serial, iclass 22, count 0 2006.229.14:25:40.58#ibcon#enter sib2, iclass 22, count 0 2006.229.14:25:40.58#ibcon#flushed, iclass 22, count 0 2006.229.14:25:40.58#ibcon#about to write, iclass 22, count 0 2006.229.14:25:40.58#ibcon#wrote, iclass 22, count 0 2006.229.14:25:40.58#ibcon#about to read 3, iclass 22, count 0 2006.229.14:25:40.60#ibcon#read 3, iclass 22, count 0 2006.229.14:25:40.60#ibcon#about to read 4, iclass 22, count 0 2006.229.14:25:40.60#ibcon#read 4, iclass 22, count 0 2006.229.14:25:40.60#ibcon#about to read 5, iclass 22, count 0 2006.229.14:25:40.60#ibcon#read 5, iclass 22, count 0 2006.229.14:25:40.60#ibcon#about to read 6, iclass 22, count 0 2006.229.14:25:40.60#ibcon#read 6, iclass 22, count 0 2006.229.14:25:40.60#ibcon#end of sib2, iclass 22, count 0 2006.229.14:25:40.60#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:25:40.60#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:25:40.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:25:40.60#ibcon#*before write, iclass 22, count 0 2006.229.14:25:40.60#ibcon#enter sib2, iclass 22, count 0 2006.229.14:25:40.60#ibcon#flushed, iclass 22, count 0 2006.229.14:25:40.60#ibcon#about to write, iclass 22, count 0 2006.229.14:25:40.60#ibcon#wrote, iclass 22, count 0 2006.229.14:25:40.60#ibcon#about to read 3, iclass 22, count 0 2006.229.14:25:40.64#ibcon#read 3, iclass 22, count 0 2006.229.14:25:40.64#ibcon#about to read 4, iclass 22, count 0 2006.229.14:25:40.64#ibcon#read 4, iclass 22, count 0 2006.229.14:25:40.64#ibcon#about to read 5, iclass 22, count 0 2006.229.14:25:40.64#ibcon#read 5, iclass 22, count 0 2006.229.14:25:40.64#ibcon#about to read 6, iclass 22, count 0 2006.229.14:25:40.64#ibcon#read 6, iclass 22, count 0 2006.229.14:25:40.64#ibcon#end of sib2, iclass 22, count 0 2006.229.14:25:40.64#ibcon#*after write, iclass 22, count 0 2006.229.14:25:40.64#ibcon#*before return 0, iclass 22, count 0 2006.229.14:25:40.64#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:40.64#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:40.64#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:25:40.64#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:25:40.64$vck44/va=8,6 2006.229.14:25:40.64#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.14:25:40.64#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.14:25:40.64#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:40.64#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:25:40.70#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:25:40.70#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:25:40.70#ibcon#enter wrdev, iclass 24, count 2 2006.229.14:25:40.70#ibcon#first serial, iclass 24, count 2 2006.229.14:25:40.70#ibcon#enter sib2, iclass 24, count 2 2006.229.14:25:40.70#ibcon#flushed, iclass 24, count 2 2006.229.14:25:40.70#ibcon#about to write, iclass 24, count 2 2006.229.14:25:40.70#ibcon#wrote, iclass 24, count 2 2006.229.14:25:40.70#ibcon#about to read 3, iclass 24, count 2 2006.229.14:25:40.72#ibcon#read 3, iclass 24, count 2 2006.229.14:25:40.72#ibcon#about to read 4, iclass 24, count 2 2006.229.14:25:40.72#ibcon#read 4, iclass 24, count 2 2006.229.14:25:40.72#ibcon#about to read 5, iclass 24, count 2 2006.229.14:25:40.72#ibcon#read 5, iclass 24, count 2 2006.229.14:25:40.72#ibcon#about to read 6, iclass 24, count 2 2006.229.14:25:40.72#ibcon#read 6, iclass 24, count 2 2006.229.14:25:40.72#ibcon#end of sib2, iclass 24, count 2 2006.229.14:25:40.72#ibcon#*mode == 0, iclass 24, count 2 2006.229.14:25:40.72#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.14:25:40.72#ibcon#[25=AT08-06\r\n] 2006.229.14:25:40.72#ibcon#*before write, iclass 24, count 2 2006.229.14:25:40.72#ibcon#enter sib2, iclass 24, count 2 2006.229.14:25:40.72#ibcon#flushed, iclass 24, count 2 2006.229.14:25:40.72#ibcon#about to write, iclass 24, count 2 2006.229.14:25:40.72#ibcon#wrote, iclass 24, count 2 2006.229.14:25:40.72#ibcon#about to read 3, iclass 24, count 2 2006.229.14:25:40.75#ibcon#read 3, iclass 24, count 2 2006.229.14:25:40.75#ibcon#about to read 4, iclass 24, count 2 2006.229.14:25:40.75#ibcon#read 4, iclass 24, count 2 2006.229.14:25:40.75#ibcon#about to read 5, iclass 24, count 2 2006.229.14:25:40.75#ibcon#read 5, iclass 24, count 2 2006.229.14:25:40.75#ibcon#about to read 6, iclass 24, count 2 2006.229.14:25:40.75#ibcon#read 6, iclass 24, count 2 2006.229.14:25:40.75#ibcon#end of sib2, iclass 24, count 2 2006.229.14:25:40.75#ibcon#*after write, iclass 24, count 2 2006.229.14:25:40.75#ibcon#*before return 0, iclass 24, count 2 2006.229.14:25:40.75#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:25:40.75#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:25:40.75#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.14:25:40.75#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:40.75#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:25:40.87#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:25:40.87#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:25:40.87#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:25:40.87#ibcon#first serial, iclass 24, count 0 2006.229.14:25:40.87#ibcon#enter sib2, iclass 24, count 0 2006.229.14:25:40.87#ibcon#flushed, iclass 24, count 0 2006.229.14:25:40.87#ibcon#about to write, iclass 24, count 0 2006.229.14:25:40.87#ibcon#wrote, iclass 24, count 0 2006.229.14:25:40.87#ibcon#about to read 3, iclass 24, count 0 2006.229.14:25:40.89#ibcon#read 3, iclass 24, count 0 2006.229.14:25:40.89#ibcon#about to read 4, iclass 24, count 0 2006.229.14:25:40.89#ibcon#read 4, iclass 24, count 0 2006.229.14:25:40.89#ibcon#about to read 5, iclass 24, count 0 2006.229.14:25:40.89#ibcon#read 5, iclass 24, count 0 2006.229.14:25:40.89#ibcon#about to read 6, iclass 24, count 0 2006.229.14:25:40.89#ibcon#read 6, iclass 24, count 0 2006.229.14:25:40.89#ibcon#end of sib2, iclass 24, count 0 2006.229.14:25:40.89#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:25:40.89#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:25:40.89#ibcon#[25=USB\r\n] 2006.229.14:25:40.89#ibcon#*before write, iclass 24, count 0 2006.229.14:25:40.89#ibcon#enter sib2, iclass 24, count 0 2006.229.14:25:40.89#ibcon#flushed, iclass 24, count 0 2006.229.14:25:40.89#ibcon#about to write, iclass 24, count 0 2006.229.14:25:40.89#ibcon#wrote, iclass 24, count 0 2006.229.14:25:40.89#ibcon#about to read 3, iclass 24, count 0 2006.229.14:25:40.92#ibcon#read 3, iclass 24, count 0 2006.229.14:25:40.92#ibcon#about to read 4, iclass 24, count 0 2006.229.14:25:40.92#ibcon#read 4, iclass 24, count 0 2006.229.14:25:40.92#ibcon#about to read 5, iclass 24, count 0 2006.229.14:25:40.92#ibcon#read 5, iclass 24, count 0 2006.229.14:25:40.92#ibcon#about to read 6, iclass 24, count 0 2006.229.14:25:40.92#ibcon#read 6, iclass 24, count 0 2006.229.14:25:40.92#ibcon#end of sib2, iclass 24, count 0 2006.229.14:25:40.92#ibcon#*after write, iclass 24, count 0 2006.229.14:25:40.92#ibcon#*before return 0, iclass 24, count 0 2006.229.14:25:40.92#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:25:40.92#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:25:40.92#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:25:40.92#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:25:40.92$vck44/vblo=1,629.99 2006.229.14:25:40.92#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.14:25:40.92#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.14:25:40.92#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:40.92#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:25:40.92#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:25:40.92#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:25:40.92#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:25:40.92#ibcon#first serial, iclass 26, count 0 2006.229.14:25:40.92#ibcon#enter sib2, iclass 26, count 0 2006.229.14:25:40.92#ibcon#flushed, iclass 26, count 0 2006.229.14:25:40.92#ibcon#about to write, iclass 26, count 0 2006.229.14:25:40.92#ibcon#wrote, iclass 26, count 0 2006.229.14:25:40.92#ibcon#about to read 3, iclass 26, count 0 2006.229.14:25:40.94#ibcon#read 3, iclass 26, count 0 2006.229.14:25:40.94#ibcon#about to read 4, iclass 26, count 0 2006.229.14:25:40.94#ibcon#read 4, iclass 26, count 0 2006.229.14:25:40.94#ibcon#about to read 5, iclass 26, count 0 2006.229.14:25:40.94#ibcon#read 5, iclass 26, count 0 2006.229.14:25:40.94#ibcon#about to read 6, iclass 26, count 0 2006.229.14:25:40.94#ibcon#read 6, iclass 26, count 0 2006.229.14:25:40.94#ibcon#end of sib2, iclass 26, count 0 2006.229.14:25:40.94#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:25:40.94#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:25:40.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:25:40.94#ibcon#*before write, iclass 26, count 0 2006.229.14:25:40.94#ibcon#enter sib2, iclass 26, count 0 2006.229.14:25:40.94#ibcon#flushed, iclass 26, count 0 2006.229.14:25:40.94#ibcon#about to write, iclass 26, count 0 2006.229.14:25:40.94#ibcon#wrote, iclass 26, count 0 2006.229.14:25:40.94#ibcon#about to read 3, iclass 26, count 0 2006.229.14:25:40.98#ibcon#read 3, iclass 26, count 0 2006.229.14:25:40.98#ibcon#about to read 4, iclass 26, count 0 2006.229.14:25:40.98#ibcon#read 4, iclass 26, count 0 2006.229.14:25:40.98#ibcon#about to read 5, iclass 26, count 0 2006.229.14:25:40.98#ibcon#read 5, iclass 26, count 0 2006.229.14:25:40.98#ibcon#about to read 6, iclass 26, count 0 2006.229.14:25:40.98#ibcon#read 6, iclass 26, count 0 2006.229.14:25:40.98#ibcon#end of sib2, iclass 26, count 0 2006.229.14:25:40.98#ibcon#*after write, iclass 26, count 0 2006.229.14:25:40.98#ibcon#*before return 0, iclass 26, count 0 2006.229.14:25:40.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:25:40.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:25:40.98#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:25:40.98#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:25:40.98$vck44/vb=1,4 2006.229.14:25:40.98#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.14:25:40.98#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.14:25:40.98#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:40.98#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:25:40.98#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:25:40.98#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:25:40.98#ibcon#enter wrdev, iclass 28, count 2 2006.229.14:25:40.98#ibcon#first serial, iclass 28, count 2 2006.229.14:25:40.98#ibcon#enter sib2, iclass 28, count 2 2006.229.14:25:40.98#ibcon#flushed, iclass 28, count 2 2006.229.14:25:40.98#ibcon#about to write, iclass 28, count 2 2006.229.14:25:40.98#ibcon#wrote, iclass 28, count 2 2006.229.14:25:40.98#ibcon#about to read 3, iclass 28, count 2 2006.229.14:25:41.00#ibcon#read 3, iclass 28, count 2 2006.229.14:25:41.00#ibcon#about to read 4, iclass 28, count 2 2006.229.14:25:41.00#ibcon#read 4, iclass 28, count 2 2006.229.14:25:41.00#ibcon#about to read 5, iclass 28, count 2 2006.229.14:25:41.00#ibcon#read 5, iclass 28, count 2 2006.229.14:25:41.00#ibcon#about to read 6, iclass 28, count 2 2006.229.14:25:41.00#ibcon#read 6, iclass 28, count 2 2006.229.14:25:41.00#ibcon#end of sib2, iclass 28, count 2 2006.229.14:25:41.00#ibcon#*mode == 0, iclass 28, count 2 2006.229.14:25:41.00#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.14:25:41.00#ibcon#[27=AT01-04\r\n] 2006.229.14:25:41.00#ibcon#*before write, iclass 28, count 2 2006.229.14:25:41.00#ibcon#enter sib2, iclass 28, count 2 2006.229.14:25:41.00#ibcon#flushed, iclass 28, count 2 2006.229.14:25:41.00#ibcon#about to write, iclass 28, count 2 2006.229.14:25:41.00#ibcon#wrote, iclass 28, count 2 2006.229.14:25:41.00#ibcon#about to read 3, iclass 28, count 2 2006.229.14:25:41.03#ibcon#read 3, iclass 28, count 2 2006.229.14:25:41.03#ibcon#about to read 4, iclass 28, count 2 2006.229.14:25:41.03#ibcon#read 4, iclass 28, count 2 2006.229.14:25:41.03#ibcon#about to read 5, iclass 28, count 2 2006.229.14:25:41.03#ibcon#read 5, iclass 28, count 2 2006.229.14:25:41.03#ibcon#about to read 6, iclass 28, count 2 2006.229.14:25:41.03#ibcon#read 6, iclass 28, count 2 2006.229.14:25:41.03#ibcon#end of sib2, iclass 28, count 2 2006.229.14:25:41.03#ibcon#*after write, iclass 28, count 2 2006.229.14:25:41.03#ibcon#*before return 0, iclass 28, count 2 2006.229.14:25:41.03#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:25:41.03#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:25:41.03#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.14:25:41.03#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:41.03#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:25:41.15#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:25:41.15#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:25:41.15#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:25:41.15#ibcon#first serial, iclass 28, count 0 2006.229.14:25:41.15#ibcon#enter sib2, iclass 28, count 0 2006.229.14:25:41.15#ibcon#flushed, iclass 28, count 0 2006.229.14:25:41.15#ibcon#about to write, iclass 28, count 0 2006.229.14:25:41.15#ibcon#wrote, iclass 28, count 0 2006.229.14:25:41.15#ibcon#about to read 3, iclass 28, count 0 2006.229.14:25:41.17#ibcon#read 3, iclass 28, count 0 2006.229.14:25:41.17#ibcon#about to read 4, iclass 28, count 0 2006.229.14:25:41.17#ibcon#read 4, iclass 28, count 0 2006.229.14:25:41.17#ibcon#about to read 5, iclass 28, count 0 2006.229.14:25:41.17#ibcon#read 5, iclass 28, count 0 2006.229.14:25:41.17#ibcon#about to read 6, iclass 28, count 0 2006.229.14:25:41.17#ibcon#read 6, iclass 28, count 0 2006.229.14:25:41.17#ibcon#end of sib2, iclass 28, count 0 2006.229.14:25:41.17#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:25:41.17#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:25:41.17#ibcon#[27=USB\r\n] 2006.229.14:25:41.17#ibcon#*before write, iclass 28, count 0 2006.229.14:25:41.17#ibcon#enter sib2, iclass 28, count 0 2006.229.14:25:41.17#ibcon#flushed, iclass 28, count 0 2006.229.14:25:41.17#ibcon#about to write, iclass 28, count 0 2006.229.14:25:41.17#ibcon#wrote, iclass 28, count 0 2006.229.14:25:41.17#ibcon#about to read 3, iclass 28, count 0 2006.229.14:25:41.20#ibcon#read 3, iclass 28, count 0 2006.229.14:25:41.20#ibcon#about to read 4, iclass 28, count 0 2006.229.14:25:41.20#ibcon#read 4, iclass 28, count 0 2006.229.14:25:41.20#ibcon#about to read 5, iclass 28, count 0 2006.229.14:25:41.20#ibcon#read 5, iclass 28, count 0 2006.229.14:25:41.20#ibcon#about to read 6, iclass 28, count 0 2006.229.14:25:41.20#ibcon#read 6, iclass 28, count 0 2006.229.14:25:41.20#ibcon#end of sib2, iclass 28, count 0 2006.229.14:25:41.20#ibcon#*after write, iclass 28, count 0 2006.229.14:25:41.20#ibcon#*before return 0, iclass 28, count 0 2006.229.14:25:41.20#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:25:41.20#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:25:41.20#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:25:41.20#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:25:41.20$vck44/vblo=2,634.99 2006.229.14:25:41.20#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.14:25:41.20#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.14:25:41.20#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:41.20#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:41.20#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:41.20#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:41.20#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:25:41.20#ibcon#first serial, iclass 30, count 0 2006.229.14:25:41.20#ibcon#enter sib2, iclass 30, count 0 2006.229.14:25:41.20#ibcon#flushed, iclass 30, count 0 2006.229.14:25:41.20#ibcon#about to write, iclass 30, count 0 2006.229.14:25:41.20#ibcon#wrote, iclass 30, count 0 2006.229.14:25:41.20#ibcon#about to read 3, iclass 30, count 0 2006.229.14:25:41.22#ibcon#read 3, iclass 30, count 0 2006.229.14:25:41.22#ibcon#about to read 4, iclass 30, count 0 2006.229.14:25:41.22#ibcon#read 4, iclass 30, count 0 2006.229.14:25:41.22#ibcon#about to read 5, iclass 30, count 0 2006.229.14:25:41.22#ibcon#read 5, iclass 30, count 0 2006.229.14:25:41.22#ibcon#about to read 6, iclass 30, count 0 2006.229.14:25:41.22#ibcon#read 6, iclass 30, count 0 2006.229.14:25:41.22#ibcon#end of sib2, iclass 30, count 0 2006.229.14:25:41.22#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:25:41.22#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:25:41.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:25:41.22#ibcon#*before write, iclass 30, count 0 2006.229.14:25:41.22#ibcon#enter sib2, iclass 30, count 0 2006.229.14:25:41.22#ibcon#flushed, iclass 30, count 0 2006.229.14:25:41.22#ibcon#about to write, iclass 30, count 0 2006.229.14:25:41.22#ibcon#wrote, iclass 30, count 0 2006.229.14:25:41.22#ibcon#about to read 3, iclass 30, count 0 2006.229.14:25:41.26#ibcon#read 3, iclass 30, count 0 2006.229.14:25:41.26#ibcon#about to read 4, iclass 30, count 0 2006.229.14:25:41.26#ibcon#read 4, iclass 30, count 0 2006.229.14:25:41.26#ibcon#about to read 5, iclass 30, count 0 2006.229.14:25:41.26#ibcon#read 5, iclass 30, count 0 2006.229.14:25:41.26#ibcon#about to read 6, iclass 30, count 0 2006.229.14:25:41.26#ibcon#read 6, iclass 30, count 0 2006.229.14:25:41.26#ibcon#end of sib2, iclass 30, count 0 2006.229.14:25:41.26#ibcon#*after write, iclass 30, count 0 2006.229.14:25:41.26#ibcon#*before return 0, iclass 30, count 0 2006.229.14:25:41.26#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:41.26#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:25:41.26#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:25:41.26#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:25:41.26$vck44/vb=2,4 2006.229.14:25:41.26#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.14:25:41.26#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.14:25:41.26#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:41.26#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:41.32#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:41.32#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:41.32#ibcon#enter wrdev, iclass 32, count 2 2006.229.14:25:41.32#ibcon#first serial, iclass 32, count 2 2006.229.14:25:41.32#ibcon#enter sib2, iclass 32, count 2 2006.229.14:25:41.32#ibcon#flushed, iclass 32, count 2 2006.229.14:25:41.32#ibcon#about to write, iclass 32, count 2 2006.229.14:25:41.32#ibcon#wrote, iclass 32, count 2 2006.229.14:25:41.32#ibcon#about to read 3, iclass 32, count 2 2006.229.14:25:41.34#ibcon#read 3, iclass 32, count 2 2006.229.14:25:41.34#ibcon#about to read 4, iclass 32, count 2 2006.229.14:25:41.34#ibcon#read 4, iclass 32, count 2 2006.229.14:25:41.34#ibcon#about to read 5, iclass 32, count 2 2006.229.14:25:41.34#ibcon#read 5, iclass 32, count 2 2006.229.14:25:41.34#ibcon#about to read 6, iclass 32, count 2 2006.229.14:25:41.34#ibcon#read 6, iclass 32, count 2 2006.229.14:25:41.34#ibcon#end of sib2, iclass 32, count 2 2006.229.14:25:41.34#ibcon#*mode == 0, iclass 32, count 2 2006.229.14:25:41.34#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.14:25:41.34#ibcon#[27=AT02-04\r\n] 2006.229.14:25:41.34#ibcon#*before write, iclass 32, count 2 2006.229.14:25:41.34#ibcon#enter sib2, iclass 32, count 2 2006.229.14:25:41.34#ibcon#flushed, iclass 32, count 2 2006.229.14:25:41.34#ibcon#about to write, iclass 32, count 2 2006.229.14:25:41.34#ibcon#wrote, iclass 32, count 2 2006.229.14:25:41.34#ibcon#about to read 3, iclass 32, count 2 2006.229.14:25:41.37#ibcon#read 3, iclass 32, count 2 2006.229.14:25:41.37#ibcon#about to read 4, iclass 32, count 2 2006.229.14:25:41.37#ibcon#read 4, iclass 32, count 2 2006.229.14:25:41.37#ibcon#about to read 5, iclass 32, count 2 2006.229.14:25:41.37#ibcon#read 5, iclass 32, count 2 2006.229.14:25:41.37#ibcon#about to read 6, iclass 32, count 2 2006.229.14:25:41.37#ibcon#read 6, iclass 32, count 2 2006.229.14:25:41.37#ibcon#end of sib2, iclass 32, count 2 2006.229.14:25:41.37#ibcon#*after write, iclass 32, count 2 2006.229.14:25:41.37#ibcon#*before return 0, iclass 32, count 2 2006.229.14:25:41.37#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:41.37#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:25:41.37#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.14:25:41.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:41.37#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:41.49#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:41.49#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:41.49#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:25:41.49#ibcon#first serial, iclass 32, count 0 2006.229.14:25:41.49#ibcon#enter sib2, iclass 32, count 0 2006.229.14:25:41.49#ibcon#flushed, iclass 32, count 0 2006.229.14:25:41.49#ibcon#about to write, iclass 32, count 0 2006.229.14:25:41.49#ibcon#wrote, iclass 32, count 0 2006.229.14:25:41.49#ibcon#about to read 3, iclass 32, count 0 2006.229.14:25:41.51#ibcon#read 3, iclass 32, count 0 2006.229.14:25:41.51#ibcon#about to read 4, iclass 32, count 0 2006.229.14:25:41.51#ibcon#read 4, iclass 32, count 0 2006.229.14:25:41.51#ibcon#about to read 5, iclass 32, count 0 2006.229.14:25:41.51#ibcon#read 5, iclass 32, count 0 2006.229.14:25:41.51#ibcon#about to read 6, iclass 32, count 0 2006.229.14:25:41.51#ibcon#read 6, iclass 32, count 0 2006.229.14:25:41.51#ibcon#end of sib2, iclass 32, count 0 2006.229.14:25:41.51#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:25:41.51#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:25:41.51#ibcon#[27=USB\r\n] 2006.229.14:25:41.51#ibcon#*before write, iclass 32, count 0 2006.229.14:25:41.51#ibcon#enter sib2, iclass 32, count 0 2006.229.14:25:41.51#ibcon#flushed, iclass 32, count 0 2006.229.14:25:41.51#ibcon#about to write, iclass 32, count 0 2006.229.14:25:41.51#ibcon#wrote, iclass 32, count 0 2006.229.14:25:41.51#ibcon#about to read 3, iclass 32, count 0 2006.229.14:25:41.54#ibcon#read 3, iclass 32, count 0 2006.229.14:25:41.54#ibcon#about to read 4, iclass 32, count 0 2006.229.14:25:41.54#ibcon#read 4, iclass 32, count 0 2006.229.14:25:41.54#ibcon#about to read 5, iclass 32, count 0 2006.229.14:25:41.54#ibcon#read 5, iclass 32, count 0 2006.229.14:25:41.54#ibcon#about to read 6, iclass 32, count 0 2006.229.14:25:41.54#ibcon#read 6, iclass 32, count 0 2006.229.14:25:41.54#ibcon#end of sib2, iclass 32, count 0 2006.229.14:25:41.54#ibcon#*after write, iclass 32, count 0 2006.229.14:25:41.54#ibcon#*before return 0, iclass 32, count 0 2006.229.14:25:41.54#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:41.54#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:25:41.54#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:25:41.54#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:25:41.54$vck44/vblo=3,649.99 2006.229.14:25:41.54#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.14:25:41.54#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.14:25:41.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:41.54#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:41.54#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:41.54#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:41.54#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:25:41.54#ibcon#first serial, iclass 34, count 0 2006.229.14:25:41.54#ibcon#enter sib2, iclass 34, count 0 2006.229.14:25:41.54#ibcon#flushed, iclass 34, count 0 2006.229.14:25:41.54#ibcon#about to write, iclass 34, count 0 2006.229.14:25:41.54#ibcon#wrote, iclass 34, count 0 2006.229.14:25:41.54#ibcon#about to read 3, iclass 34, count 0 2006.229.14:25:41.56#ibcon#read 3, iclass 34, count 0 2006.229.14:25:41.56#ibcon#about to read 4, iclass 34, count 0 2006.229.14:25:41.56#ibcon#read 4, iclass 34, count 0 2006.229.14:25:41.56#ibcon#about to read 5, iclass 34, count 0 2006.229.14:25:41.56#ibcon#read 5, iclass 34, count 0 2006.229.14:25:41.56#ibcon#about to read 6, iclass 34, count 0 2006.229.14:25:41.56#ibcon#read 6, iclass 34, count 0 2006.229.14:25:41.56#ibcon#end of sib2, iclass 34, count 0 2006.229.14:25:41.56#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:25:41.56#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:25:41.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:25:41.56#ibcon#*before write, iclass 34, count 0 2006.229.14:25:41.56#ibcon#enter sib2, iclass 34, count 0 2006.229.14:25:41.56#ibcon#flushed, iclass 34, count 0 2006.229.14:25:41.56#ibcon#about to write, iclass 34, count 0 2006.229.14:25:41.56#ibcon#wrote, iclass 34, count 0 2006.229.14:25:41.56#ibcon#about to read 3, iclass 34, count 0 2006.229.14:25:41.60#ibcon#read 3, iclass 34, count 0 2006.229.14:25:41.60#ibcon#about to read 4, iclass 34, count 0 2006.229.14:25:41.60#ibcon#read 4, iclass 34, count 0 2006.229.14:25:41.60#ibcon#about to read 5, iclass 34, count 0 2006.229.14:25:41.60#ibcon#read 5, iclass 34, count 0 2006.229.14:25:41.60#ibcon#about to read 6, iclass 34, count 0 2006.229.14:25:41.60#ibcon#read 6, iclass 34, count 0 2006.229.14:25:41.60#ibcon#end of sib2, iclass 34, count 0 2006.229.14:25:41.60#ibcon#*after write, iclass 34, count 0 2006.229.14:25:41.60#ibcon#*before return 0, iclass 34, count 0 2006.229.14:25:41.60#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:41.60#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:25:41.60#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:25:41.60#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:25:41.60$vck44/vb=3,4 2006.229.14:25:41.60#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.14:25:41.60#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.14:25:41.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:41.60#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:41.66#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:41.66#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:41.66#ibcon#enter wrdev, iclass 36, count 2 2006.229.14:25:41.66#ibcon#first serial, iclass 36, count 2 2006.229.14:25:41.66#ibcon#enter sib2, iclass 36, count 2 2006.229.14:25:41.66#ibcon#flushed, iclass 36, count 2 2006.229.14:25:41.66#ibcon#about to write, iclass 36, count 2 2006.229.14:25:41.66#ibcon#wrote, iclass 36, count 2 2006.229.14:25:41.66#ibcon#about to read 3, iclass 36, count 2 2006.229.14:25:41.68#ibcon#read 3, iclass 36, count 2 2006.229.14:25:41.68#ibcon#about to read 4, iclass 36, count 2 2006.229.14:25:41.68#ibcon#read 4, iclass 36, count 2 2006.229.14:25:41.68#ibcon#about to read 5, iclass 36, count 2 2006.229.14:25:41.68#ibcon#read 5, iclass 36, count 2 2006.229.14:25:41.68#ibcon#about to read 6, iclass 36, count 2 2006.229.14:25:41.68#ibcon#read 6, iclass 36, count 2 2006.229.14:25:41.68#ibcon#end of sib2, iclass 36, count 2 2006.229.14:25:41.68#ibcon#*mode == 0, iclass 36, count 2 2006.229.14:25:41.68#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.14:25:41.68#ibcon#[27=AT03-04\r\n] 2006.229.14:25:41.68#ibcon#*before write, iclass 36, count 2 2006.229.14:25:41.68#ibcon#enter sib2, iclass 36, count 2 2006.229.14:25:41.68#ibcon#flushed, iclass 36, count 2 2006.229.14:25:41.68#ibcon#about to write, iclass 36, count 2 2006.229.14:25:41.68#ibcon#wrote, iclass 36, count 2 2006.229.14:25:41.68#ibcon#about to read 3, iclass 36, count 2 2006.229.14:25:41.71#ibcon#read 3, iclass 36, count 2 2006.229.14:25:41.71#ibcon#about to read 4, iclass 36, count 2 2006.229.14:25:41.71#ibcon#read 4, iclass 36, count 2 2006.229.14:25:41.71#ibcon#about to read 5, iclass 36, count 2 2006.229.14:25:41.71#ibcon#read 5, iclass 36, count 2 2006.229.14:25:41.71#ibcon#about to read 6, iclass 36, count 2 2006.229.14:25:41.71#ibcon#read 6, iclass 36, count 2 2006.229.14:25:41.71#ibcon#end of sib2, iclass 36, count 2 2006.229.14:25:41.71#ibcon#*after write, iclass 36, count 2 2006.229.14:25:41.71#ibcon#*before return 0, iclass 36, count 2 2006.229.14:25:41.71#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:41.71#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:25:41.71#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.14:25:41.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:41.71#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:41.83#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:41.83#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:41.83#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:25:41.83#ibcon#first serial, iclass 36, count 0 2006.229.14:25:41.83#ibcon#enter sib2, iclass 36, count 0 2006.229.14:25:41.83#ibcon#flushed, iclass 36, count 0 2006.229.14:25:41.83#ibcon#about to write, iclass 36, count 0 2006.229.14:25:41.83#ibcon#wrote, iclass 36, count 0 2006.229.14:25:41.83#ibcon#about to read 3, iclass 36, count 0 2006.229.14:25:41.85#ibcon#read 3, iclass 36, count 0 2006.229.14:25:41.85#ibcon#about to read 4, iclass 36, count 0 2006.229.14:25:41.85#ibcon#read 4, iclass 36, count 0 2006.229.14:25:41.85#ibcon#about to read 5, iclass 36, count 0 2006.229.14:25:41.85#ibcon#read 5, iclass 36, count 0 2006.229.14:25:41.85#ibcon#about to read 6, iclass 36, count 0 2006.229.14:25:41.85#ibcon#read 6, iclass 36, count 0 2006.229.14:25:41.85#ibcon#end of sib2, iclass 36, count 0 2006.229.14:25:41.85#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:25:41.85#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:25:41.85#ibcon#[27=USB\r\n] 2006.229.14:25:41.85#ibcon#*before write, iclass 36, count 0 2006.229.14:25:41.85#ibcon#enter sib2, iclass 36, count 0 2006.229.14:25:41.85#ibcon#flushed, iclass 36, count 0 2006.229.14:25:41.85#ibcon#about to write, iclass 36, count 0 2006.229.14:25:41.85#ibcon#wrote, iclass 36, count 0 2006.229.14:25:41.85#ibcon#about to read 3, iclass 36, count 0 2006.229.14:25:41.88#ibcon#read 3, iclass 36, count 0 2006.229.14:25:41.88#ibcon#about to read 4, iclass 36, count 0 2006.229.14:25:41.88#ibcon#read 4, iclass 36, count 0 2006.229.14:25:41.88#ibcon#about to read 5, iclass 36, count 0 2006.229.14:25:41.88#ibcon#read 5, iclass 36, count 0 2006.229.14:25:41.88#ibcon#about to read 6, iclass 36, count 0 2006.229.14:25:41.88#ibcon#read 6, iclass 36, count 0 2006.229.14:25:41.88#ibcon#end of sib2, iclass 36, count 0 2006.229.14:25:41.88#ibcon#*after write, iclass 36, count 0 2006.229.14:25:41.88#ibcon#*before return 0, iclass 36, count 0 2006.229.14:25:41.88#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:41.88#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:25:41.88#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:25:41.88#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:25:41.88$vck44/vblo=4,679.99 2006.229.14:25:41.88#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.14:25:41.88#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.14:25:41.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:41.88#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:41.88#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:41.88#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:41.88#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:25:41.88#ibcon#first serial, iclass 38, count 0 2006.229.14:25:41.88#ibcon#enter sib2, iclass 38, count 0 2006.229.14:25:41.88#ibcon#flushed, iclass 38, count 0 2006.229.14:25:41.88#ibcon#about to write, iclass 38, count 0 2006.229.14:25:41.88#ibcon#wrote, iclass 38, count 0 2006.229.14:25:41.88#ibcon#about to read 3, iclass 38, count 0 2006.229.14:25:41.90#ibcon#read 3, iclass 38, count 0 2006.229.14:25:41.90#ibcon#about to read 4, iclass 38, count 0 2006.229.14:25:41.90#ibcon#read 4, iclass 38, count 0 2006.229.14:25:41.90#ibcon#about to read 5, iclass 38, count 0 2006.229.14:25:41.90#ibcon#read 5, iclass 38, count 0 2006.229.14:25:41.90#ibcon#about to read 6, iclass 38, count 0 2006.229.14:25:41.90#ibcon#read 6, iclass 38, count 0 2006.229.14:25:41.90#ibcon#end of sib2, iclass 38, count 0 2006.229.14:25:41.90#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:25:41.90#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:25:41.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:25:41.90#ibcon#*before write, iclass 38, count 0 2006.229.14:25:41.90#ibcon#enter sib2, iclass 38, count 0 2006.229.14:25:41.90#ibcon#flushed, iclass 38, count 0 2006.229.14:25:41.90#ibcon#about to write, iclass 38, count 0 2006.229.14:25:41.90#ibcon#wrote, iclass 38, count 0 2006.229.14:25:41.90#ibcon#about to read 3, iclass 38, count 0 2006.229.14:25:41.94#ibcon#read 3, iclass 38, count 0 2006.229.14:25:41.94#ibcon#about to read 4, iclass 38, count 0 2006.229.14:25:41.94#ibcon#read 4, iclass 38, count 0 2006.229.14:25:41.94#ibcon#about to read 5, iclass 38, count 0 2006.229.14:25:41.94#ibcon#read 5, iclass 38, count 0 2006.229.14:25:41.94#ibcon#about to read 6, iclass 38, count 0 2006.229.14:25:41.94#ibcon#read 6, iclass 38, count 0 2006.229.14:25:41.94#ibcon#end of sib2, iclass 38, count 0 2006.229.14:25:41.94#ibcon#*after write, iclass 38, count 0 2006.229.14:25:41.94#ibcon#*before return 0, iclass 38, count 0 2006.229.14:25:41.94#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:41.94#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:25:41.94#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:25:41.94#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:25:41.94$vck44/vb=4,4 2006.229.14:25:41.94#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.14:25:41.94#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.14:25:41.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:41.94#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:42.00#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:42.00#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:42.00#ibcon#enter wrdev, iclass 40, count 2 2006.229.14:25:42.00#ibcon#first serial, iclass 40, count 2 2006.229.14:25:42.00#ibcon#enter sib2, iclass 40, count 2 2006.229.14:25:42.00#ibcon#flushed, iclass 40, count 2 2006.229.14:25:42.00#ibcon#about to write, iclass 40, count 2 2006.229.14:25:42.00#ibcon#wrote, iclass 40, count 2 2006.229.14:25:42.00#ibcon#about to read 3, iclass 40, count 2 2006.229.14:25:42.02#ibcon#read 3, iclass 40, count 2 2006.229.14:25:42.02#ibcon#about to read 4, iclass 40, count 2 2006.229.14:25:42.02#ibcon#read 4, iclass 40, count 2 2006.229.14:25:42.02#ibcon#about to read 5, iclass 40, count 2 2006.229.14:25:42.02#ibcon#read 5, iclass 40, count 2 2006.229.14:25:42.02#ibcon#about to read 6, iclass 40, count 2 2006.229.14:25:42.02#ibcon#read 6, iclass 40, count 2 2006.229.14:25:42.02#ibcon#end of sib2, iclass 40, count 2 2006.229.14:25:42.02#ibcon#*mode == 0, iclass 40, count 2 2006.229.14:25:42.02#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.14:25:42.02#ibcon#[27=AT04-04\r\n] 2006.229.14:25:42.02#ibcon#*before write, iclass 40, count 2 2006.229.14:25:42.02#ibcon#enter sib2, iclass 40, count 2 2006.229.14:25:42.02#ibcon#flushed, iclass 40, count 2 2006.229.14:25:42.02#ibcon#about to write, iclass 40, count 2 2006.229.14:25:42.02#ibcon#wrote, iclass 40, count 2 2006.229.14:25:42.02#ibcon#about to read 3, iclass 40, count 2 2006.229.14:25:42.05#ibcon#read 3, iclass 40, count 2 2006.229.14:25:42.05#ibcon#about to read 4, iclass 40, count 2 2006.229.14:25:42.05#ibcon#read 4, iclass 40, count 2 2006.229.14:25:42.05#ibcon#about to read 5, iclass 40, count 2 2006.229.14:25:42.05#ibcon#read 5, iclass 40, count 2 2006.229.14:25:42.05#ibcon#about to read 6, iclass 40, count 2 2006.229.14:25:42.05#ibcon#read 6, iclass 40, count 2 2006.229.14:25:42.05#ibcon#end of sib2, iclass 40, count 2 2006.229.14:25:42.05#ibcon#*after write, iclass 40, count 2 2006.229.14:25:42.05#ibcon#*before return 0, iclass 40, count 2 2006.229.14:25:42.05#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:42.05#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:25:42.05#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.14:25:42.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:42.05#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:42.17#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:42.17#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:42.17#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:25:42.17#ibcon#first serial, iclass 40, count 0 2006.229.14:25:42.17#ibcon#enter sib2, iclass 40, count 0 2006.229.14:25:42.17#ibcon#flushed, iclass 40, count 0 2006.229.14:25:42.17#ibcon#about to write, iclass 40, count 0 2006.229.14:25:42.17#ibcon#wrote, iclass 40, count 0 2006.229.14:25:42.17#ibcon#about to read 3, iclass 40, count 0 2006.229.14:25:42.19#ibcon#read 3, iclass 40, count 0 2006.229.14:25:42.19#ibcon#about to read 4, iclass 40, count 0 2006.229.14:25:42.19#ibcon#read 4, iclass 40, count 0 2006.229.14:25:42.19#ibcon#about to read 5, iclass 40, count 0 2006.229.14:25:42.19#ibcon#read 5, iclass 40, count 0 2006.229.14:25:42.19#ibcon#about to read 6, iclass 40, count 0 2006.229.14:25:42.19#ibcon#read 6, iclass 40, count 0 2006.229.14:25:42.19#ibcon#end of sib2, iclass 40, count 0 2006.229.14:25:42.19#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:25:42.19#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:25:42.19#ibcon#[27=USB\r\n] 2006.229.14:25:42.19#ibcon#*before write, iclass 40, count 0 2006.229.14:25:42.19#ibcon#enter sib2, iclass 40, count 0 2006.229.14:25:42.19#ibcon#flushed, iclass 40, count 0 2006.229.14:25:42.19#ibcon#about to write, iclass 40, count 0 2006.229.14:25:42.19#ibcon#wrote, iclass 40, count 0 2006.229.14:25:42.19#ibcon#about to read 3, iclass 40, count 0 2006.229.14:25:42.22#ibcon#read 3, iclass 40, count 0 2006.229.14:25:42.22#ibcon#about to read 4, iclass 40, count 0 2006.229.14:25:42.22#ibcon#read 4, iclass 40, count 0 2006.229.14:25:42.22#ibcon#about to read 5, iclass 40, count 0 2006.229.14:25:42.22#ibcon#read 5, iclass 40, count 0 2006.229.14:25:42.22#ibcon#about to read 6, iclass 40, count 0 2006.229.14:25:42.22#ibcon#read 6, iclass 40, count 0 2006.229.14:25:42.22#ibcon#end of sib2, iclass 40, count 0 2006.229.14:25:42.22#ibcon#*after write, iclass 40, count 0 2006.229.14:25:42.22#ibcon#*before return 0, iclass 40, count 0 2006.229.14:25:42.22#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:42.22#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:25:42.22#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:25:42.22#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:25:42.22$vck44/vblo=5,709.99 2006.229.14:25:42.22#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:25:42.22#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:25:42.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:42.22#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:42.22#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:42.22#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:42.22#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:25:42.22#ibcon#first serial, iclass 4, count 0 2006.229.14:25:42.22#ibcon#enter sib2, iclass 4, count 0 2006.229.14:25:42.22#ibcon#flushed, iclass 4, count 0 2006.229.14:25:42.22#ibcon#about to write, iclass 4, count 0 2006.229.14:25:42.22#ibcon#wrote, iclass 4, count 0 2006.229.14:25:42.22#ibcon#about to read 3, iclass 4, count 0 2006.229.14:25:42.24#ibcon#read 3, iclass 4, count 0 2006.229.14:25:42.24#ibcon#about to read 4, iclass 4, count 0 2006.229.14:25:42.24#ibcon#read 4, iclass 4, count 0 2006.229.14:25:42.24#ibcon#about to read 5, iclass 4, count 0 2006.229.14:25:42.24#ibcon#read 5, iclass 4, count 0 2006.229.14:25:42.24#ibcon#about to read 6, iclass 4, count 0 2006.229.14:25:42.24#ibcon#read 6, iclass 4, count 0 2006.229.14:25:42.24#ibcon#end of sib2, iclass 4, count 0 2006.229.14:25:42.24#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:25:42.24#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:25:42.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:25:42.24#ibcon#*before write, iclass 4, count 0 2006.229.14:25:42.24#ibcon#enter sib2, iclass 4, count 0 2006.229.14:25:42.24#ibcon#flushed, iclass 4, count 0 2006.229.14:25:42.24#ibcon#about to write, iclass 4, count 0 2006.229.14:25:42.24#ibcon#wrote, iclass 4, count 0 2006.229.14:25:42.24#ibcon#about to read 3, iclass 4, count 0 2006.229.14:25:42.28#ibcon#read 3, iclass 4, count 0 2006.229.14:25:42.28#ibcon#about to read 4, iclass 4, count 0 2006.229.14:25:42.28#ibcon#read 4, iclass 4, count 0 2006.229.14:25:42.28#ibcon#about to read 5, iclass 4, count 0 2006.229.14:25:42.28#ibcon#read 5, iclass 4, count 0 2006.229.14:25:42.28#ibcon#about to read 6, iclass 4, count 0 2006.229.14:25:42.28#ibcon#read 6, iclass 4, count 0 2006.229.14:25:42.28#ibcon#end of sib2, iclass 4, count 0 2006.229.14:25:42.28#ibcon#*after write, iclass 4, count 0 2006.229.14:25:42.28#ibcon#*before return 0, iclass 4, count 0 2006.229.14:25:42.28#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:42.28#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:25:42.28#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:25:42.28#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:25:42.28$vck44/vb=5,4 2006.229.14:25:42.28#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.14:25:42.28#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.14:25:42.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:42.28#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:42.34#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:42.34#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:42.34#ibcon#enter wrdev, iclass 6, count 2 2006.229.14:25:42.34#ibcon#first serial, iclass 6, count 2 2006.229.14:25:42.34#ibcon#enter sib2, iclass 6, count 2 2006.229.14:25:42.34#ibcon#flushed, iclass 6, count 2 2006.229.14:25:42.34#ibcon#about to write, iclass 6, count 2 2006.229.14:25:42.34#ibcon#wrote, iclass 6, count 2 2006.229.14:25:42.34#ibcon#about to read 3, iclass 6, count 2 2006.229.14:25:42.36#ibcon#read 3, iclass 6, count 2 2006.229.14:25:42.36#ibcon#about to read 4, iclass 6, count 2 2006.229.14:25:42.36#ibcon#read 4, iclass 6, count 2 2006.229.14:25:42.36#ibcon#about to read 5, iclass 6, count 2 2006.229.14:25:42.36#ibcon#read 5, iclass 6, count 2 2006.229.14:25:42.36#ibcon#about to read 6, iclass 6, count 2 2006.229.14:25:42.36#ibcon#read 6, iclass 6, count 2 2006.229.14:25:42.36#ibcon#end of sib2, iclass 6, count 2 2006.229.14:25:42.36#ibcon#*mode == 0, iclass 6, count 2 2006.229.14:25:42.36#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.14:25:42.36#ibcon#[27=AT05-04\r\n] 2006.229.14:25:42.36#ibcon#*before write, iclass 6, count 2 2006.229.14:25:42.36#ibcon#enter sib2, iclass 6, count 2 2006.229.14:25:42.36#ibcon#flushed, iclass 6, count 2 2006.229.14:25:42.36#ibcon#about to write, iclass 6, count 2 2006.229.14:25:42.36#ibcon#wrote, iclass 6, count 2 2006.229.14:25:42.36#ibcon#about to read 3, iclass 6, count 2 2006.229.14:25:42.39#ibcon#read 3, iclass 6, count 2 2006.229.14:25:42.39#ibcon#about to read 4, iclass 6, count 2 2006.229.14:25:42.39#ibcon#read 4, iclass 6, count 2 2006.229.14:25:42.39#ibcon#about to read 5, iclass 6, count 2 2006.229.14:25:42.39#ibcon#read 5, iclass 6, count 2 2006.229.14:25:42.39#ibcon#about to read 6, iclass 6, count 2 2006.229.14:25:42.39#ibcon#read 6, iclass 6, count 2 2006.229.14:25:42.39#ibcon#end of sib2, iclass 6, count 2 2006.229.14:25:42.39#ibcon#*after write, iclass 6, count 2 2006.229.14:25:42.39#ibcon#*before return 0, iclass 6, count 2 2006.229.14:25:42.39#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:42.39#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:25:42.39#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.14:25:42.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:42.39#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:42.51#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:42.51#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:42.51#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:25:42.51#ibcon#first serial, iclass 6, count 0 2006.229.14:25:42.51#ibcon#enter sib2, iclass 6, count 0 2006.229.14:25:42.51#ibcon#flushed, iclass 6, count 0 2006.229.14:25:42.51#ibcon#about to write, iclass 6, count 0 2006.229.14:25:42.51#ibcon#wrote, iclass 6, count 0 2006.229.14:25:42.51#ibcon#about to read 3, iclass 6, count 0 2006.229.14:25:42.53#ibcon#read 3, iclass 6, count 0 2006.229.14:25:42.53#ibcon#about to read 4, iclass 6, count 0 2006.229.14:25:42.53#ibcon#read 4, iclass 6, count 0 2006.229.14:25:42.53#ibcon#about to read 5, iclass 6, count 0 2006.229.14:25:42.53#ibcon#read 5, iclass 6, count 0 2006.229.14:25:42.53#ibcon#about to read 6, iclass 6, count 0 2006.229.14:25:42.53#ibcon#read 6, iclass 6, count 0 2006.229.14:25:42.53#ibcon#end of sib2, iclass 6, count 0 2006.229.14:25:42.53#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:25:42.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:25:42.53#ibcon#[27=USB\r\n] 2006.229.14:25:42.53#ibcon#*before write, iclass 6, count 0 2006.229.14:25:42.53#ibcon#enter sib2, iclass 6, count 0 2006.229.14:25:42.53#ibcon#flushed, iclass 6, count 0 2006.229.14:25:42.53#ibcon#about to write, iclass 6, count 0 2006.229.14:25:42.53#ibcon#wrote, iclass 6, count 0 2006.229.14:25:42.53#ibcon#about to read 3, iclass 6, count 0 2006.229.14:25:42.56#ibcon#read 3, iclass 6, count 0 2006.229.14:25:42.56#ibcon#about to read 4, iclass 6, count 0 2006.229.14:25:42.56#ibcon#read 4, iclass 6, count 0 2006.229.14:25:42.56#ibcon#about to read 5, iclass 6, count 0 2006.229.14:25:42.56#ibcon#read 5, iclass 6, count 0 2006.229.14:25:42.56#ibcon#about to read 6, iclass 6, count 0 2006.229.14:25:42.56#ibcon#read 6, iclass 6, count 0 2006.229.14:25:42.56#ibcon#end of sib2, iclass 6, count 0 2006.229.14:25:42.56#ibcon#*after write, iclass 6, count 0 2006.229.14:25:42.56#ibcon#*before return 0, iclass 6, count 0 2006.229.14:25:42.56#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:42.56#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:25:42.56#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:25:42.56#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:25:42.56$vck44/vblo=6,719.99 2006.229.14:25:42.56#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.14:25:42.56#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.14:25:42.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:42.56#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:42.56#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:42.56#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:42.56#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:25:42.56#ibcon#first serial, iclass 10, count 0 2006.229.14:25:42.56#ibcon#enter sib2, iclass 10, count 0 2006.229.14:25:42.56#ibcon#flushed, iclass 10, count 0 2006.229.14:25:42.56#ibcon#about to write, iclass 10, count 0 2006.229.14:25:42.56#ibcon#wrote, iclass 10, count 0 2006.229.14:25:42.56#ibcon#about to read 3, iclass 10, count 0 2006.229.14:25:42.58#ibcon#read 3, iclass 10, count 0 2006.229.14:25:42.58#ibcon#about to read 4, iclass 10, count 0 2006.229.14:25:42.58#ibcon#read 4, iclass 10, count 0 2006.229.14:25:42.58#ibcon#about to read 5, iclass 10, count 0 2006.229.14:25:42.58#ibcon#read 5, iclass 10, count 0 2006.229.14:25:42.58#ibcon#about to read 6, iclass 10, count 0 2006.229.14:25:42.58#ibcon#read 6, iclass 10, count 0 2006.229.14:25:42.58#ibcon#end of sib2, iclass 10, count 0 2006.229.14:25:42.58#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:25:42.58#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:25:42.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:25:42.58#ibcon#*before write, iclass 10, count 0 2006.229.14:25:42.58#ibcon#enter sib2, iclass 10, count 0 2006.229.14:25:42.58#ibcon#flushed, iclass 10, count 0 2006.229.14:25:42.58#ibcon#about to write, iclass 10, count 0 2006.229.14:25:42.58#ibcon#wrote, iclass 10, count 0 2006.229.14:25:42.58#ibcon#about to read 3, iclass 10, count 0 2006.229.14:25:42.62#ibcon#read 3, iclass 10, count 0 2006.229.14:25:42.62#ibcon#about to read 4, iclass 10, count 0 2006.229.14:25:42.62#ibcon#read 4, iclass 10, count 0 2006.229.14:25:42.62#ibcon#about to read 5, iclass 10, count 0 2006.229.14:25:42.62#ibcon#read 5, iclass 10, count 0 2006.229.14:25:42.62#ibcon#about to read 6, iclass 10, count 0 2006.229.14:25:42.62#ibcon#read 6, iclass 10, count 0 2006.229.14:25:42.62#ibcon#end of sib2, iclass 10, count 0 2006.229.14:25:42.62#ibcon#*after write, iclass 10, count 0 2006.229.14:25:42.62#ibcon#*before return 0, iclass 10, count 0 2006.229.14:25:42.62#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:42.62#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:25:42.62#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:25:42.62#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:25:42.62$vck44/vb=6,4 2006.229.14:25:42.62#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.14:25:42.62#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.14:25:42.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:42.62#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:42.68#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:42.68#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:42.68#ibcon#enter wrdev, iclass 12, count 2 2006.229.14:25:42.68#ibcon#first serial, iclass 12, count 2 2006.229.14:25:42.68#ibcon#enter sib2, iclass 12, count 2 2006.229.14:25:42.68#ibcon#flushed, iclass 12, count 2 2006.229.14:25:42.68#ibcon#about to write, iclass 12, count 2 2006.229.14:25:42.68#ibcon#wrote, iclass 12, count 2 2006.229.14:25:42.68#ibcon#about to read 3, iclass 12, count 2 2006.229.14:25:42.70#ibcon#read 3, iclass 12, count 2 2006.229.14:25:42.70#ibcon#about to read 4, iclass 12, count 2 2006.229.14:25:42.70#ibcon#read 4, iclass 12, count 2 2006.229.14:25:42.70#ibcon#about to read 5, iclass 12, count 2 2006.229.14:25:42.70#ibcon#read 5, iclass 12, count 2 2006.229.14:25:42.70#ibcon#about to read 6, iclass 12, count 2 2006.229.14:25:42.70#ibcon#read 6, iclass 12, count 2 2006.229.14:25:42.70#ibcon#end of sib2, iclass 12, count 2 2006.229.14:25:42.70#ibcon#*mode == 0, iclass 12, count 2 2006.229.14:25:42.70#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.14:25:42.70#ibcon#[27=AT06-04\r\n] 2006.229.14:25:42.70#ibcon#*before write, iclass 12, count 2 2006.229.14:25:42.70#ibcon#enter sib2, iclass 12, count 2 2006.229.14:25:42.70#ibcon#flushed, iclass 12, count 2 2006.229.14:25:42.70#ibcon#about to write, iclass 12, count 2 2006.229.14:25:42.70#ibcon#wrote, iclass 12, count 2 2006.229.14:25:42.70#ibcon#about to read 3, iclass 12, count 2 2006.229.14:25:42.73#ibcon#read 3, iclass 12, count 2 2006.229.14:25:42.73#ibcon#about to read 4, iclass 12, count 2 2006.229.14:25:42.73#ibcon#read 4, iclass 12, count 2 2006.229.14:25:42.73#ibcon#about to read 5, iclass 12, count 2 2006.229.14:25:42.73#ibcon#read 5, iclass 12, count 2 2006.229.14:25:42.73#ibcon#about to read 6, iclass 12, count 2 2006.229.14:25:42.73#ibcon#read 6, iclass 12, count 2 2006.229.14:25:42.73#ibcon#end of sib2, iclass 12, count 2 2006.229.14:25:42.73#ibcon#*after write, iclass 12, count 2 2006.229.14:25:42.73#ibcon#*before return 0, iclass 12, count 2 2006.229.14:25:42.73#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:42.73#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:25:42.73#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.14:25:42.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:42.73#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:42.85#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:42.85#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:42.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:25:42.85#ibcon#first serial, iclass 12, count 0 2006.229.14:25:42.85#ibcon#enter sib2, iclass 12, count 0 2006.229.14:25:42.85#ibcon#flushed, iclass 12, count 0 2006.229.14:25:42.85#ibcon#about to write, iclass 12, count 0 2006.229.14:25:42.85#ibcon#wrote, iclass 12, count 0 2006.229.14:25:42.85#ibcon#about to read 3, iclass 12, count 0 2006.229.14:25:42.87#ibcon#read 3, iclass 12, count 0 2006.229.14:25:42.87#ibcon#about to read 4, iclass 12, count 0 2006.229.14:25:42.87#ibcon#read 4, iclass 12, count 0 2006.229.14:25:42.87#ibcon#about to read 5, iclass 12, count 0 2006.229.14:25:42.87#ibcon#read 5, iclass 12, count 0 2006.229.14:25:42.87#ibcon#about to read 6, iclass 12, count 0 2006.229.14:25:42.87#ibcon#read 6, iclass 12, count 0 2006.229.14:25:42.87#ibcon#end of sib2, iclass 12, count 0 2006.229.14:25:42.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:25:42.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:25:42.87#ibcon#[27=USB\r\n] 2006.229.14:25:42.87#ibcon#*before write, iclass 12, count 0 2006.229.14:25:42.87#ibcon#enter sib2, iclass 12, count 0 2006.229.14:25:42.87#ibcon#flushed, iclass 12, count 0 2006.229.14:25:42.87#ibcon#about to write, iclass 12, count 0 2006.229.14:25:42.87#ibcon#wrote, iclass 12, count 0 2006.229.14:25:42.87#ibcon#about to read 3, iclass 12, count 0 2006.229.14:25:42.90#ibcon#read 3, iclass 12, count 0 2006.229.14:25:42.90#ibcon#about to read 4, iclass 12, count 0 2006.229.14:25:42.90#ibcon#read 4, iclass 12, count 0 2006.229.14:25:42.90#ibcon#about to read 5, iclass 12, count 0 2006.229.14:25:42.90#ibcon#read 5, iclass 12, count 0 2006.229.14:25:42.90#ibcon#about to read 6, iclass 12, count 0 2006.229.14:25:42.90#ibcon#read 6, iclass 12, count 0 2006.229.14:25:42.90#ibcon#end of sib2, iclass 12, count 0 2006.229.14:25:42.90#ibcon#*after write, iclass 12, count 0 2006.229.14:25:42.90#ibcon#*before return 0, iclass 12, count 0 2006.229.14:25:42.90#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:42.90#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:25:42.90#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:25:42.90#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:25:42.90$vck44/vblo=7,734.99 2006.229.14:25:42.90#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.14:25:42.90#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.14:25:42.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:42.90#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:42.90#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:42.90#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:42.90#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:25:42.90#ibcon#first serial, iclass 14, count 0 2006.229.14:25:42.90#ibcon#enter sib2, iclass 14, count 0 2006.229.14:25:42.90#ibcon#flushed, iclass 14, count 0 2006.229.14:25:42.90#ibcon#about to write, iclass 14, count 0 2006.229.14:25:42.90#ibcon#wrote, iclass 14, count 0 2006.229.14:25:42.90#ibcon#about to read 3, iclass 14, count 0 2006.229.14:25:42.92#ibcon#read 3, iclass 14, count 0 2006.229.14:25:42.92#ibcon#about to read 4, iclass 14, count 0 2006.229.14:25:42.92#ibcon#read 4, iclass 14, count 0 2006.229.14:25:42.92#ibcon#about to read 5, iclass 14, count 0 2006.229.14:25:42.92#ibcon#read 5, iclass 14, count 0 2006.229.14:25:42.92#ibcon#about to read 6, iclass 14, count 0 2006.229.14:25:42.92#ibcon#read 6, iclass 14, count 0 2006.229.14:25:42.92#ibcon#end of sib2, iclass 14, count 0 2006.229.14:25:42.92#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:25:42.92#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:25:42.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:25:42.92#ibcon#*before write, iclass 14, count 0 2006.229.14:25:42.92#ibcon#enter sib2, iclass 14, count 0 2006.229.14:25:42.92#ibcon#flushed, iclass 14, count 0 2006.229.14:25:42.92#ibcon#about to write, iclass 14, count 0 2006.229.14:25:42.92#ibcon#wrote, iclass 14, count 0 2006.229.14:25:42.92#ibcon#about to read 3, iclass 14, count 0 2006.229.14:25:42.96#ibcon#read 3, iclass 14, count 0 2006.229.14:25:42.96#ibcon#about to read 4, iclass 14, count 0 2006.229.14:25:42.96#ibcon#read 4, iclass 14, count 0 2006.229.14:25:42.96#ibcon#about to read 5, iclass 14, count 0 2006.229.14:25:42.96#ibcon#read 5, iclass 14, count 0 2006.229.14:25:42.96#ibcon#about to read 6, iclass 14, count 0 2006.229.14:25:42.96#ibcon#read 6, iclass 14, count 0 2006.229.14:25:42.96#ibcon#end of sib2, iclass 14, count 0 2006.229.14:25:42.96#ibcon#*after write, iclass 14, count 0 2006.229.14:25:42.96#ibcon#*before return 0, iclass 14, count 0 2006.229.14:25:42.96#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:42.96#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:25:42.96#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:25:42.96#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:25:42.96$vck44/vb=7,4 2006.229.14:25:42.96#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.14:25:42.96#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.14:25:42.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:42.96#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:43.02#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:43.02#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:43.02#ibcon#enter wrdev, iclass 16, count 2 2006.229.14:25:43.02#ibcon#first serial, iclass 16, count 2 2006.229.14:25:43.02#ibcon#enter sib2, iclass 16, count 2 2006.229.14:25:43.02#ibcon#flushed, iclass 16, count 2 2006.229.14:25:43.02#ibcon#about to write, iclass 16, count 2 2006.229.14:25:43.02#ibcon#wrote, iclass 16, count 2 2006.229.14:25:43.02#ibcon#about to read 3, iclass 16, count 2 2006.229.14:25:43.04#ibcon#read 3, iclass 16, count 2 2006.229.14:25:43.04#ibcon#about to read 4, iclass 16, count 2 2006.229.14:25:43.04#ibcon#read 4, iclass 16, count 2 2006.229.14:25:43.04#ibcon#about to read 5, iclass 16, count 2 2006.229.14:25:43.04#ibcon#read 5, iclass 16, count 2 2006.229.14:25:43.04#ibcon#about to read 6, iclass 16, count 2 2006.229.14:25:43.04#ibcon#read 6, iclass 16, count 2 2006.229.14:25:43.04#ibcon#end of sib2, iclass 16, count 2 2006.229.14:25:43.04#ibcon#*mode == 0, iclass 16, count 2 2006.229.14:25:43.04#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.14:25:43.04#ibcon#[27=AT07-04\r\n] 2006.229.14:25:43.04#ibcon#*before write, iclass 16, count 2 2006.229.14:25:43.04#ibcon#enter sib2, iclass 16, count 2 2006.229.14:25:43.04#ibcon#flushed, iclass 16, count 2 2006.229.14:25:43.04#ibcon#about to write, iclass 16, count 2 2006.229.14:25:43.04#ibcon#wrote, iclass 16, count 2 2006.229.14:25:43.04#ibcon#about to read 3, iclass 16, count 2 2006.229.14:25:43.07#ibcon#read 3, iclass 16, count 2 2006.229.14:25:43.07#ibcon#about to read 4, iclass 16, count 2 2006.229.14:25:43.07#ibcon#read 4, iclass 16, count 2 2006.229.14:25:43.07#ibcon#about to read 5, iclass 16, count 2 2006.229.14:25:43.07#ibcon#read 5, iclass 16, count 2 2006.229.14:25:43.07#ibcon#about to read 6, iclass 16, count 2 2006.229.14:25:43.07#ibcon#read 6, iclass 16, count 2 2006.229.14:25:43.07#ibcon#end of sib2, iclass 16, count 2 2006.229.14:25:43.07#ibcon#*after write, iclass 16, count 2 2006.229.14:25:43.07#ibcon#*before return 0, iclass 16, count 2 2006.229.14:25:43.07#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:43.07#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:25:43.07#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.14:25:43.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:43.07#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:43.19#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:43.19#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:43.19#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:25:43.19#ibcon#first serial, iclass 16, count 0 2006.229.14:25:43.19#ibcon#enter sib2, iclass 16, count 0 2006.229.14:25:43.19#ibcon#flushed, iclass 16, count 0 2006.229.14:25:43.19#ibcon#about to write, iclass 16, count 0 2006.229.14:25:43.19#ibcon#wrote, iclass 16, count 0 2006.229.14:25:43.19#ibcon#about to read 3, iclass 16, count 0 2006.229.14:25:43.21#ibcon#read 3, iclass 16, count 0 2006.229.14:25:43.21#ibcon#about to read 4, iclass 16, count 0 2006.229.14:25:43.21#ibcon#read 4, iclass 16, count 0 2006.229.14:25:43.21#ibcon#about to read 5, iclass 16, count 0 2006.229.14:25:43.21#ibcon#read 5, iclass 16, count 0 2006.229.14:25:43.21#ibcon#about to read 6, iclass 16, count 0 2006.229.14:25:43.21#ibcon#read 6, iclass 16, count 0 2006.229.14:25:43.21#ibcon#end of sib2, iclass 16, count 0 2006.229.14:25:43.21#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:25:43.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:25:43.21#ibcon#[27=USB\r\n] 2006.229.14:25:43.21#ibcon#*before write, iclass 16, count 0 2006.229.14:25:43.21#ibcon#enter sib2, iclass 16, count 0 2006.229.14:25:43.21#ibcon#flushed, iclass 16, count 0 2006.229.14:25:43.21#ibcon#about to write, iclass 16, count 0 2006.229.14:25:43.21#ibcon#wrote, iclass 16, count 0 2006.229.14:25:43.21#ibcon#about to read 3, iclass 16, count 0 2006.229.14:25:43.24#ibcon#read 3, iclass 16, count 0 2006.229.14:25:43.24#ibcon#about to read 4, iclass 16, count 0 2006.229.14:25:43.24#ibcon#read 4, iclass 16, count 0 2006.229.14:25:43.24#ibcon#about to read 5, iclass 16, count 0 2006.229.14:25:43.24#ibcon#read 5, iclass 16, count 0 2006.229.14:25:43.24#ibcon#about to read 6, iclass 16, count 0 2006.229.14:25:43.24#ibcon#read 6, iclass 16, count 0 2006.229.14:25:43.24#ibcon#end of sib2, iclass 16, count 0 2006.229.14:25:43.24#ibcon#*after write, iclass 16, count 0 2006.229.14:25:43.24#ibcon#*before return 0, iclass 16, count 0 2006.229.14:25:43.24#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:43.24#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:25:43.24#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:25:43.24#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:25:43.24$vck44/vblo=8,744.99 2006.229.14:25:43.24#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.14:25:43.24#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.14:25:43.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:25:43.24#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:43.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:43.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:43.24#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:25:43.24#ibcon#first serial, iclass 18, count 0 2006.229.14:25:43.24#ibcon#enter sib2, iclass 18, count 0 2006.229.14:25:43.24#ibcon#flushed, iclass 18, count 0 2006.229.14:25:43.24#ibcon#about to write, iclass 18, count 0 2006.229.14:25:43.24#ibcon#wrote, iclass 18, count 0 2006.229.14:25:43.24#ibcon#about to read 3, iclass 18, count 0 2006.229.14:25:43.26#ibcon#read 3, iclass 18, count 0 2006.229.14:25:43.26#ibcon#about to read 4, iclass 18, count 0 2006.229.14:25:43.26#ibcon#read 4, iclass 18, count 0 2006.229.14:25:43.26#ibcon#about to read 5, iclass 18, count 0 2006.229.14:25:43.26#ibcon#read 5, iclass 18, count 0 2006.229.14:25:43.26#ibcon#about to read 6, iclass 18, count 0 2006.229.14:25:43.26#ibcon#read 6, iclass 18, count 0 2006.229.14:25:43.26#ibcon#end of sib2, iclass 18, count 0 2006.229.14:25:43.26#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:25:43.26#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:25:43.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:25:43.26#ibcon#*before write, iclass 18, count 0 2006.229.14:25:43.26#ibcon#enter sib2, iclass 18, count 0 2006.229.14:25:43.26#ibcon#flushed, iclass 18, count 0 2006.229.14:25:43.26#ibcon#about to write, iclass 18, count 0 2006.229.14:25:43.26#ibcon#wrote, iclass 18, count 0 2006.229.14:25:43.26#ibcon#about to read 3, iclass 18, count 0 2006.229.14:25:43.30#ibcon#read 3, iclass 18, count 0 2006.229.14:25:43.30#ibcon#about to read 4, iclass 18, count 0 2006.229.14:25:43.30#ibcon#read 4, iclass 18, count 0 2006.229.14:25:43.30#ibcon#about to read 5, iclass 18, count 0 2006.229.14:25:43.30#ibcon#read 5, iclass 18, count 0 2006.229.14:25:43.30#ibcon#about to read 6, iclass 18, count 0 2006.229.14:25:43.30#ibcon#read 6, iclass 18, count 0 2006.229.14:25:43.30#ibcon#end of sib2, iclass 18, count 0 2006.229.14:25:43.30#ibcon#*after write, iclass 18, count 0 2006.229.14:25:43.30#ibcon#*before return 0, iclass 18, count 0 2006.229.14:25:43.30#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:43.30#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:25:43.30#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:25:43.30#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:25:43.30$vck44/vb=8,4 2006.229.14:25:43.30#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.14:25:43.30#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.14:25:43.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:25:43.30#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:43.36#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:43.36#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:43.36#ibcon#enter wrdev, iclass 20, count 2 2006.229.14:25:43.36#ibcon#first serial, iclass 20, count 2 2006.229.14:25:43.36#ibcon#enter sib2, iclass 20, count 2 2006.229.14:25:43.36#ibcon#flushed, iclass 20, count 2 2006.229.14:25:43.36#ibcon#about to write, iclass 20, count 2 2006.229.14:25:43.36#ibcon#wrote, iclass 20, count 2 2006.229.14:25:43.36#ibcon#about to read 3, iclass 20, count 2 2006.229.14:25:43.38#ibcon#read 3, iclass 20, count 2 2006.229.14:25:43.38#ibcon#about to read 4, iclass 20, count 2 2006.229.14:25:43.38#ibcon#read 4, iclass 20, count 2 2006.229.14:25:43.38#ibcon#about to read 5, iclass 20, count 2 2006.229.14:25:43.38#ibcon#read 5, iclass 20, count 2 2006.229.14:25:43.38#ibcon#about to read 6, iclass 20, count 2 2006.229.14:25:43.38#ibcon#read 6, iclass 20, count 2 2006.229.14:25:43.38#ibcon#end of sib2, iclass 20, count 2 2006.229.14:25:43.38#ibcon#*mode == 0, iclass 20, count 2 2006.229.14:25:43.38#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.14:25:43.38#ibcon#[27=AT08-04\r\n] 2006.229.14:25:43.38#ibcon#*before write, iclass 20, count 2 2006.229.14:25:43.38#ibcon#enter sib2, iclass 20, count 2 2006.229.14:25:43.38#ibcon#flushed, iclass 20, count 2 2006.229.14:25:43.38#ibcon#about to write, iclass 20, count 2 2006.229.14:25:43.38#ibcon#wrote, iclass 20, count 2 2006.229.14:25:43.38#ibcon#about to read 3, iclass 20, count 2 2006.229.14:25:43.41#ibcon#read 3, iclass 20, count 2 2006.229.14:25:43.41#ibcon#about to read 4, iclass 20, count 2 2006.229.14:25:43.41#ibcon#read 4, iclass 20, count 2 2006.229.14:25:43.41#ibcon#about to read 5, iclass 20, count 2 2006.229.14:25:43.41#ibcon#read 5, iclass 20, count 2 2006.229.14:25:43.41#ibcon#about to read 6, iclass 20, count 2 2006.229.14:25:43.41#ibcon#read 6, iclass 20, count 2 2006.229.14:25:43.41#ibcon#end of sib2, iclass 20, count 2 2006.229.14:25:43.41#ibcon#*after write, iclass 20, count 2 2006.229.14:25:43.41#ibcon#*before return 0, iclass 20, count 2 2006.229.14:25:43.41#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:43.41#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:25:43.41#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.14:25:43.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:25:43.41#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:43.53#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:43.53#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:43.53#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:25:43.53#ibcon#first serial, iclass 20, count 0 2006.229.14:25:43.53#ibcon#enter sib2, iclass 20, count 0 2006.229.14:25:43.53#ibcon#flushed, iclass 20, count 0 2006.229.14:25:43.53#ibcon#about to write, iclass 20, count 0 2006.229.14:25:43.53#ibcon#wrote, iclass 20, count 0 2006.229.14:25:43.53#ibcon#about to read 3, iclass 20, count 0 2006.229.14:25:43.55#ibcon#read 3, iclass 20, count 0 2006.229.14:25:43.55#ibcon#about to read 4, iclass 20, count 0 2006.229.14:25:43.55#ibcon#read 4, iclass 20, count 0 2006.229.14:25:43.55#ibcon#about to read 5, iclass 20, count 0 2006.229.14:25:43.55#ibcon#read 5, iclass 20, count 0 2006.229.14:25:43.55#ibcon#about to read 6, iclass 20, count 0 2006.229.14:25:43.55#ibcon#read 6, iclass 20, count 0 2006.229.14:25:43.55#ibcon#end of sib2, iclass 20, count 0 2006.229.14:25:43.55#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:25:43.55#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:25:43.55#ibcon#[27=USB\r\n] 2006.229.14:25:43.55#ibcon#*before write, iclass 20, count 0 2006.229.14:25:43.55#ibcon#enter sib2, iclass 20, count 0 2006.229.14:25:43.55#ibcon#flushed, iclass 20, count 0 2006.229.14:25:43.55#ibcon#about to write, iclass 20, count 0 2006.229.14:25:43.55#ibcon#wrote, iclass 20, count 0 2006.229.14:25:43.55#ibcon#about to read 3, iclass 20, count 0 2006.229.14:25:43.58#ibcon#read 3, iclass 20, count 0 2006.229.14:25:43.58#ibcon#about to read 4, iclass 20, count 0 2006.229.14:25:43.58#ibcon#read 4, iclass 20, count 0 2006.229.14:25:43.58#ibcon#about to read 5, iclass 20, count 0 2006.229.14:25:43.58#ibcon#read 5, iclass 20, count 0 2006.229.14:25:43.58#ibcon#about to read 6, iclass 20, count 0 2006.229.14:25:43.58#ibcon#read 6, iclass 20, count 0 2006.229.14:25:43.58#ibcon#end of sib2, iclass 20, count 0 2006.229.14:25:43.58#ibcon#*after write, iclass 20, count 0 2006.229.14:25:43.58#ibcon#*before return 0, iclass 20, count 0 2006.229.14:25:43.58#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:43.58#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:25:43.58#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:25:43.58#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:25:43.58$vck44/vabw=wide 2006.229.14:25:43.58#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:25:43.58#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:25:43.58#ibcon#ireg 8 cls_cnt 0 2006.229.14:25:43.58#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:43.58#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:43.58#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:43.58#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:25:43.58#ibcon#first serial, iclass 22, count 0 2006.229.14:25:43.58#ibcon#enter sib2, iclass 22, count 0 2006.229.14:25:43.58#ibcon#flushed, iclass 22, count 0 2006.229.14:25:43.58#ibcon#about to write, iclass 22, count 0 2006.229.14:25:43.58#ibcon#wrote, iclass 22, count 0 2006.229.14:25:43.58#ibcon#about to read 3, iclass 22, count 0 2006.229.14:25:43.60#ibcon#read 3, iclass 22, count 0 2006.229.14:25:43.60#ibcon#about to read 4, iclass 22, count 0 2006.229.14:25:43.60#ibcon#read 4, iclass 22, count 0 2006.229.14:25:43.60#ibcon#about to read 5, iclass 22, count 0 2006.229.14:25:43.60#ibcon#read 5, iclass 22, count 0 2006.229.14:25:43.60#ibcon#about to read 6, iclass 22, count 0 2006.229.14:25:43.60#ibcon#read 6, iclass 22, count 0 2006.229.14:25:43.60#ibcon#end of sib2, iclass 22, count 0 2006.229.14:25:43.60#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:25:43.60#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:25:43.60#ibcon#[25=BW32\r\n] 2006.229.14:25:43.60#ibcon#*before write, iclass 22, count 0 2006.229.14:25:43.60#ibcon#enter sib2, iclass 22, count 0 2006.229.14:25:43.60#ibcon#flushed, iclass 22, count 0 2006.229.14:25:43.60#ibcon#about to write, iclass 22, count 0 2006.229.14:25:43.60#ibcon#wrote, iclass 22, count 0 2006.229.14:25:43.60#ibcon#about to read 3, iclass 22, count 0 2006.229.14:25:43.63#ibcon#read 3, iclass 22, count 0 2006.229.14:25:43.63#ibcon#about to read 4, iclass 22, count 0 2006.229.14:25:43.63#ibcon#read 4, iclass 22, count 0 2006.229.14:25:43.63#ibcon#about to read 5, iclass 22, count 0 2006.229.14:25:43.63#ibcon#read 5, iclass 22, count 0 2006.229.14:25:43.63#ibcon#about to read 6, iclass 22, count 0 2006.229.14:25:43.63#ibcon#read 6, iclass 22, count 0 2006.229.14:25:43.63#ibcon#end of sib2, iclass 22, count 0 2006.229.14:25:43.63#ibcon#*after write, iclass 22, count 0 2006.229.14:25:43.63#ibcon#*before return 0, iclass 22, count 0 2006.229.14:25:43.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:43.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:25:43.63#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:25:43.63#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:25:43.63$vck44/vbbw=wide 2006.229.14:25:43.63#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.14:25:43.63#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.14:25:43.63#ibcon#ireg 8 cls_cnt 0 2006.229.14:25:43.63#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:25:43.70#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:25:43.70#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:25:43.70#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:25:43.70#ibcon#first serial, iclass 24, count 0 2006.229.14:25:43.70#ibcon#enter sib2, iclass 24, count 0 2006.229.14:25:43.70#ibcon#flushed, iclass 24, count 0 2006.229.14:25:43.70#ibcon#about to write, iclass 24, count 0 2006.229.14:25:43.70#ibcon#wrote, iclass 24, count 0 2006.229.14:25:43.70#ibcon#about to read 3, iclass 24, count 0 2006.229.14:25:43.72#ibcon#read 3, iclass 24, count 0 2006.229.14:25:43.72#ibcon#about to read 4, iclass 24, count 0 2006.229.14:25:43.72#ibcon#read 4, iclass 24, count 0 2006.229.14:25:43.72#ibcon#about to read 5, iclass 24, count 0 2006.229.14:25:43.72#ibcon#read 5, iclass 24, count 0 2006.229.14:25:43.72#ibcon#about to read 6, iclass 24, count 0 2006.229.14:25:43.72#ibcon#read 6, iclass 24, count 0 2006.229.14:25:43.72#ibcon#end of sib2, iclass 24, count 0 2006.229.14:25:43.72#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:25:43.72#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:25:43.72#ibcon#[27=BW32\r\n] 2006.229.14:25:43.72#ibcon#*before write, iclass 24, count 0 2006.229.14:25:43.72#ibcon#enter sib2, iclass 24, count 0 2006.229.14:25:43.72#ibcon#flushed, iclass 24, count 0 2006.229.14:25:43.72#ibcon#about to write, iclass 24, count 0 2006.229.14:25:43.72#ibcon#wrote, iclass 24, count 0 2006.229.14:25:43.72#ibcon#about to read 3, iclass 24, count 0 2006.229.14:25:43.75#ibcon#read 3, iclass 24, count 0 2006.229.14:25:43.75#ibcon#about to read 4, iclass 24, count 0 2006.229.14:25:43.75#ibcon#read 4, iclass 24, count 0 2006.229.14:25:43.75#ibcon#about to read 5, iclass 24, count 0 2006.229.14:25:43.75#ibcon#read 5, iclass 24, count 0 2006.229.14:25:43.75#ibcon#about to read 6, iclass 24, count 0 2006.229.14:25:43.75#ibcon#read 6, iclass 24, count 0 2006.229.14:25:43.75#ibcon#end of sib2, iclass 24, count 0 2006.229.14:25:43.75#ibcon#*after write, iclass 24, count 0 2006.229.14:25:43.75#ibcon#*before return 0, iclass 24, count 0 2006.229.14:25:43.75#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:25:43.75#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:25:43.75#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:25:43.75#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:25:43.75$setupk4/ifdk4 2006.229.14:25:43.75$ifdk4/lo= 2006.229.14:25:43.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:25:43.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:25:43.75$ifdk4/patch= 2006.229.14:25:43.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:25:43.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:25:43.75$setupk4/!*+20s 2006.229.14:25:45.83#abcon#<5=/06 1.3 2.3 27.481001002.1\r\n> 2006.229.14:25:45.85#abcon#{5=INTERFACE CLEAR} 2006.229.14:25:45.91#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:25:49.13#trakl#Source acquired 2006.229.14:25:49.13#flagr#flagr/antenna,acquired 2006.229.14:25:56.00#abcon#<5=/06 1.3 2.3 27.481001002.1\r\n> 2006.229.14:25:56.02#abcon#{5=INTERFACE CLEAR} 2006.229.14:25:56.08#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:25:58.25$setupk4/"tpicd 2006.229.14:25:58.25$setupk4/echo=off 2006.229.14:25:58.25$setupk4/xlog=off 2006.229.14:25:58.25:!2006.229.14:27:54 2006.229.14:27:54.00:preob 2006.229.14:27:54.14/onsource/TRACKING 2006.229.14:27:54.14:!2006.229.14:28:04 2006.229.14:28:04.00:"tape 2006.229.14:28:04.00:"st=record 2006.229.14:28:04.00:data_valid=on 2006.229.14:28:04.00:midob 2006.229.14:28:04.14/onsource/TRACKING 2006.229.14:28:04.14/wx/27.46,1002.1,100 2006.229.14:28:04.23/cable/+6.4145E-03 2006.229.14:28:05.32/va/01,08,usb,yes,29,31 2006.229.14:28:05.32/va/02,07,usb,yes,31,32 2006.229.14:28:05.32/va/03,06,usb,yes,39,41 2006.229.14:28:05.32/va/04,07,usb,yes,32,34 2006.229.14:28:05.32/va/05,04,usb,yes,29,29 2006.229.14:28:05.32/va/06,04,usb,yes,32,32 2006.229.14:28:05.32/va/07,05,usb,yes,29,29 2006.229.14:28:05.32/va/08,06,usb,yes,21,26 2006.229.14:28:05.55/valo/01,524.99,yes,locked 2006.229.14:28:05.55/valo/02,534.99,yes,locked 2006.229.14:28:05.55/valo/03,564.99,yes,locked 2006.229.14:28:05.55/valo/04,624.99,yes,locked 2006.229.14:28:05.55/valo/05,734.99,yes,locked 2006.229.14:28:05.55/valo/06,814.99,yes,locked 2006.229.14:28:05.55/valo/07,864.99,yes,locked 2006.229.14:28:05.55/valo/08,884.99,yes,locked 2006.229.14:28:06.64/vb/01,04,usb,yes,30,28 2006.229.14:28:06.64/vb/02,04,usb,yes,33,33 2006.229.14:28:06.64/vb/03,04,usb,yes,30,33 2006.229.14:28:06.64/vb/04,04,usb,yes,34,33 2006.229.14:28:06.64/vb/05,04,usb,yes,26,29 2006.229.14:28:06.64/vb/06,04,usb,yes,31,27 2006.229.14:28:06.64/vb/07,04,usb,yes,31,31 2006.229.14:28:06.64/vb/08,04,usb,yes,28,32 2006.229.14:28:06.88/vblo/01,629.99,yes,locked 2006.229.14:28:06.88/vblo/02,634.99,yes,locked 2006.229.14:28:06.88/vblo/03,649.99,yes,locked 2006.229.14:28:06.88/vblo/04,679.99,yes,locked 2006.229.14:28:06.88/vblo/05,709.99,yes,locked 2006.229.14:28:06.88/vblo/06,719.99,yes,locked 2006.229.14:28:06.88/vblo/07,734.99,yes,locked 2006.229.14:28:06.88/vblo/08,744.99,yes,locked 2006.229.14:28:07.03/vabw/8 2006.229.14:28:07.18/vbbw/8 2006.229.14:28:07.27/xfe/off,on,12.5 2006.229.14:28:07.67/ifatt/23,28,28,28 2006.229.14:28:08.08/fmout-gps/S +4.56E-07 2006.229.14:28:08.12:!2006.229.14:29:24 2006.229.14:29:24.00:data_valid=off 2006.229.14:29:24.00:"et 2006.229.14:29:24.00:!+3s 2006.229.14:29:27.01:"tape 2006.229.14:29:27.01:postob 2006.229.14:29:27.14/cable/+6.4123E-03 2006.229.14:29:27.14/wx/27.45,1002.1,100 2006.229.14:29:28.08/fmout-gps/S +4.57E-07 2006.229.14:29:28.08:scan_name=229-1433,jd0608,190 2006.229.14:29:28.08:source=1958-179,200057.09,-174857.7,2000.0,cw 2006.229.14:29:29.14#flagr#flagr/antenna,new-source 2006.229.14:29:29.14:checkk5 2006.229.14:29:29.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:29:29.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:29:30.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:29:30.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:29:31.11/chk_obsdata//k5ts1/T2291428??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.14:29:31.53/chk_obsdata//k5ts2/T2291428??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.14:29:31.95/chk_obsdata//k5ts3/T2291428??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.14:29:32.35/chk_obsdata//k5ts4/T2291428??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.14:29:33.07/k5log//k5ts1_log_newline 2006.229.14:29:33.80/k5log//k5ts2_log_newline 2006.229.14:29:34.51/k5log//k5ts3_log_newline 2006.229.14:29:35.22/k5log//k5ts4_log_newline 2006.229.14:29:35.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:29:35.24:setupk4=1 2006.229.14:29:35.24$setupk4/echo=on 2006.229.14:29:35.24$setupk4/pcalon 2006.229.14:29:35.24$pcalon/"no phase cal control is implemented here 2006.229.14:29:35.24$setupk4/"tpicd=stop 2006.229.14:29:35.24$setupk4/"rec=synch_on 2006.229.14:29:35.24$setupk4/"rec_mode=128 2006.229.14:29:35.24$setupk4/!* 2006.229.14:29:35.24$setupk4/recpk4 2006.229.14:29:35.24$recpk4/recpatch= 2006.229.14:29:35.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:29:35.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:29:35.25$setupk4/vck44 2006.229.14:29:35.25$vck44/valo=1,524.99 2006.229.14:29:35.25#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.14:29:35.25#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.14:29:35.25#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:35.25#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:35.25#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:35.25#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:35.25#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:29:35.25#ibcon#first serial, iclass 13, count 0 2006.229.14:29:35.25#ibcon#enter sib2, iclass 13, count 0 2006.229.14:29:35.25#ibcon#flushed, iclass 13, count 0 2006.229.14:29:35.25#ibcon#about to write, iclass 13, count 0 2006.229.14:29:35.25#ibcon#wrote, iclass 13, count 0 2006.229.14:29:35.25#ibcon#about to read 3, iclass 13, count 0 2006.229.14:29:35.27#ibcon#read 3, iclass 13, count 0 2006.229.14:29:35.27#ibcon#about to read 4, iclass 13, count 0 2006.229.14:29:35.27#ibcon#read 4, iclass 13, count 0 2006.229.14:29:35.27#ibcon#about to read 5, iclass 13, count 0 2006.229.14:29:35.27#ibcon#read 5, iclass 13, count 0 2006.229.14:29:35.27#ibcon#about to read 6, iclass 13, count 0 2006.229.14:29:35.27#ibcon#read 6, iclass 13, count 0 2006.229.14:29:35.27#ibcon#end of sib2, iclass 13, count 0 2006.229.14:29:35.27#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:29:35.27#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:29:35.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:29:35.27#ibcon#*before write, iclass 13, count 0 2006.229.14:29:35.27#ibcon#enter sib2, iclass 13, count 0 2006.229.14:29:35.27#ibcon#flushed, iclass 13, count 0 2006.229.14:29:35.27#ibcon#about to write, iclass 13, count 0 2006.229.14:29:35.27#ibcon#wrote, iclass 13, count 0 2006.229.14:29:35.27#ibcon#about to read 3, iclass 13, count 0 2006.229.14:29:35.32#ibcon#read 3, iclass 13, count 0 2006.229.14:29:35.32#ibcon#about to read 4, iclass 13, count 0 2006.229.14:29:35.32#ibcon#read 4, iclass 13, count 0 2006.229.14:29:35.32#ibcon#about to read 5, iclass 13, count 0 2006.229.14:29:35.32#ibcon#read 5, iclass 13, count 0 2006.229.14:29:35.32#ibcon#about to read 6, iclass 13, count 0 2006.229.14:29:35.32#ibcon#read 6, iclass 13, count 0 2006.229.14:29:35.32#ibcon#end of sib2, iclass 13, count 0 2006.229.14:29:35.32#ibcon#*after write, iclass 13, count 0 2006.229.14:29:35.32#ibcon#*before return 0, iclass 13, count 0 2006.229.14:29:35.32#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:35.32#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:35.32#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:29:35.32#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:29:35.32$vck44/va=1,8 2006.229.14:29:35.32#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.14:29:35.32#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.14:29:35.32#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:35.32#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:35.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:35.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:35.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.14:29:35.32#ibcon#first serial, iclass 15, count 2 2006.229.14:29:35.32#ibcon#enter sib2, iclass 15, count 2 2006.229.14:29:35.32#ibcon#flushed, iclass 15, count 2 2006.229.14:29:35.32#ibcon#about to write, iclass 15, count 2 2006.229.14:29:35.32#ibcon#wrote, iclass 15, count 2 2006.229.14:29:35.32#ibcon#about to read 3, iclass 15, count 2 2006.229.14:29:35.34#ibcon#read 3, iclass 15, count 2 2006.229.14:29:35.34#ibcon#about to read 4, iclass 15, count 2 2006.229.14:29:35.34#ibcon#read 4, iclass 15, count 2 2006.229.14:29:35.34#ibcon#about to read 5, iclass 15, count 2 2006.229.14:29:35.34#ibcon#read 5, iclass 15, count 2 2006.229.14:29:35.34#ibcon#about to read 6, iclass 15, count 2 2006.229.14:29:35.34#ibcon#read 6, iclass 15, count 2 2006.229.14:29:35.34#ibcon#end of sib2, iclass 15, count 2 2006.229.14:29:35.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.14:29:35.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.14:29:35.34#ibcon#[25=AT01-08\r\n] 2006.229.14:29:35.34#ibcon#*before write, iclass 15, count 2 2006.229.14:29:35.34#ibcon#enter sib2, iclass 15, count 2 2006.229.14:29:35.34#ibcon#flushed, iclass 15, count 2 2006.229.14:29:35.34#ibcon#about to write, iclass 15, count 2 2006.229.14:29:35.34#ibcon#wrote, iclass 15, count 2 2006.229.14:29:35.34#ibcon#about to read 3, iclass 15, count 2 2006.229.14:29:35.37#ibcon#read 3, iclass 15, count 2 2006.229.14:29:35.37#ibcon#about to read 4, iclass 15, count 2 2006.229.14:29:35.37#ibcon#read 4, iclass 15, count 2 2006.229.14:29:35.37#ibcon#about to read 5, iclass 15, count 2 2006.229.14:29:35.37#ibcon#read 5, iclass 15, count 2 2006.229.14:29:35.37#ibcon#about to read 6, iclass 15, count 2 2006.229.14:29:35.37#ibcon#read 6, iclass 15, count 2 2006.229.14:29:35.37#ibcon#end of sib2, iclass 15, count 2 2006.229.14:29:35.37#ibcon#*after write, iclass 15, count 2 2006.229.14:29:35.37#ibcon#*before return 0, iclass 15, count 2 2006.229.14:29:35.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:35.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:35.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.14:29:35.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:35.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:35.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:35.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:35.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:29:35.49#ibcon#first serial, iclass 15, count 0 2006.229.14:29:35.49#ibcon#enter sib2, iclass 15, count 0 2006.229.14:29:35.49#ibcon#flushed, iclass 15, count 0 2006.229.14:29:35.49#ibcon#about to write, iclass 15, count 0 2006.229.14:29:35.49#ibcon#wrote, iclass 15, count 0 2006.229.14:29:35.49#ibcon#about to read 3, iclass 15, count 0 2006.229.14:29:35.51#ibcon#read 3, iclass 15, count 0 2006.229.14:29:35.51#ibcon#about to read 4, iclass 15, count 0 2006.229.14:29:35.51#ibcon#read 4, iclass 15, count 0 2006.229.14:29:35.51#ibcon#about to read 5, iclass 15, count 0 2006.229.14:29:35.51#ibcon#read 5, iclass 15, count 0 2006.229.14:29:35.51#ibcon#about to read 6, iclass 15, count 0 2006.229.14:29:35.51#ibcon#read 6, iclass 15, count 0 2006.229.14:29:35.51#ibcon#end of sib2, iclass 15, count 0 2006.229.14:29:35.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:29:35.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:29:35.51#ibcon#[25=USB\r\n] 2006.229.14:29:35.51#ibcon#*before write, iclass 15, count 0 2006.229.14:29:35.51#ibcon#enter sib2, iclass 15, count 0 2006.229.14:29:35.51#ibcon#flushed, iclass 15, count 0 2006.229.14:29:35.51#ibcon#about to write, iclass 15, count 0 2006.229.14:29:35.51#ibcon#wrote, iclass 15, count 0 2006.229.14:29:35.51#ibcon#about to read 3, iclass 15, count 0 2006.229.14:29:35.54#ibcon#read 3, iclass 15, count 0 2006.229.14:29:35.54#ibcon#about to read 4, iclass 15, count 0 2006.229.14:29:35.54#ibcon#read 4, iclass 15, count 0 2006.229.14:29:35.54#ibcon#about to read 5, iclass 15, count 0 2006.229.14:29:35.54#ibcon#read 5, iclass 15, count 0 2006.229.14:29:35.54#ibcon#about to read 6, iclass 15, count 0 2006.229.14:29:35.54#ibcon#read 6, iclass 15, count 0 2006.229.14:29:35.54#ibcon#end of sib2, iclass 15, count 0 2006.229.14:29:35.54#ibcon#*after write, iclass 15, count 0 2006.229.14:29:35.54#ibcon#*before return 0, iclass 15, count 0 2006.229.14:29:35.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:35.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:35.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:29:35.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:29:35.54$vck44/valo=2,534.99 2006.229.14:29:35.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.14:29:35.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.14:29:35.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:35.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:35.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:35.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:35.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:29:35.54#ibcon#first serial, iclass 17, count 0 2006.229.14:29:35.54#ibcon#enter sib2, iclass 17, count 0 2006.229.14:29:35.54#ibcon#flushed, iclass 17, count 0 2006.229.14:29:35.54#ibcon#about to write, iclass 17, count 0 2006.229.14:29:35.54#ibcon#wrote, iclass 17, count 0 2006.229.14:29:35.54#ibcon#about to read 3, iclass 17, count 0 2006.229.14:29:35.56#ibcon#read 3, iclass 17, count 0 2006.229.14:29:35.56#ibcon#about to read 4, iclass 17, count 0 2006.229.14:29:35.56#ibcon#read 4, iclass 17, count 0 2006.229.14:29:35.56#ibcon#about to read 5, iclass 17, count 0 2006.229.14:29:35.56#ibcon#read 5, iclass 17, count 0 2006.229.14:29:35.56#ibcon#about to read 6, iclass 17, count 0 2006.229.14:29:35.56#ibcon#read 6, iclass 17, count 0 2006.229.14:29:35.56#ibcon#end of sib2, iclass 17, count 0 2006.229.14:29:35.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:29:35.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:29:35.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:29:35.56#ibcon#*before write, iclass 17, count 0 2006.229.14:29:35.56#ibcon#enter sib2, iclass 17, count 0 2006.229.14:29:35.56#ibcon#flushed, iclass 17, count 0 2006.229.14:29:35.56#ibcon#about to write, iclass 17, count 0 2006.229.14:29:35.56#ibcon#wrote, iclass 17, count 0 2006.229.14:29:35.56#ibcon#about to read 3, iclass 17, count 0 2006.229.14:29:35.60#ibcon#read 3, iclass 17, count 0 2006.229.14:29:35.60#ibcon#about to read 4, iclass 17, count 0 2006.229.14:29:35.60#ibcon#read 4, iclass 17, count 0 2006.229.14:29:35.60#ibcon#about to read 5, iclass 17, count 0 2006.229.14:29:35.60#ibcon#read 5, iclass 17, count 0 2006.229.14:29:35.60#ibcon#about to read 6, iclass 17, count 0 2006.229.14:29:35.60#ibcon#read 6, iclass 17, count 0 2006.229.14:29:35.60#ibcon#end of sib2, iclass 17, count 0 2006.229.14:29:35.60#ibcon#*after write, iclass 17, count 0 2006.229.14:29:35.60#ibcon#*before return 0, iclass 17, count 0 2006.229.14:29:35.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:35.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:35.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:29:35.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:29:35.60$vck44/va=2,7 2006.229.14:29:35.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.14:29:35.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.14:29:35.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:35.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:35.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:35.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:35.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.14:29:35.66#ibcon#first serial, iclass 19, count 2 2006.229.14:29:35.66#ibcon#enter sib2, iclass 19, count 2 2006.229.14:29:35.66#ibcon#flushed, iclass 19, count 2 2006.229.14:29:35.66#ibcon#about to write, iclass 19, count 2 2006.229.14:29:35.66#ibcon#wrote, iclass 19, count 2 2006.229.14:29:35.66#ibcon#about to read 3, iclass 19, count 2 2006.229.14:29:35.68#ibcon#read 3, iclass 19, count 2 2006.229.14:29:35.68#ibcon#about to read 4, iclass 19, count 2 2006.229.14:29:35.68#ibcon#read 4, iclass 19, count 2 2006.229.14:29:35.68#ibcon#about to read 5, iclass 19, count 2 2006.229.14:29:35.68#ibcon#read 5, iclass 19, count 2 2006.229.14:29:35.68#ibcon#about to read 6, iclass 19, count 2 2006.229.14:29:35.68#ibcon#read 6, iclass 19, count 2 2006.229.14:29:35.68#ibcon#end of sib2, iclass 19, count 2 2006.229.14:29:35.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.14:29:35.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.14:29:35.68#ibcon#[25=AT02-07\r\n] 2006.229.14:29:35.68#ibcon#*before write, iclass 19, count 2 2006.229.14:29:35.68#ibcon#enter sib2, iclass 19, count 2 2006.229.14:29:35.68#ibcon#flushed, iclass 19, count 2 2006.229.14:29:35.68#ibcon#about to write, iclass 19, count 2 2006.229.14:29:35.68#ibcon#wrote, iclass 19, count 2 2006.229.14:29:35.68#ibcon#about to read 3, iclass 19, count 2 2006.229.14:29:35.71#ibcon#read 3, iclass 19, count 2 2006.229.14:29:35.71#ibcon#about to read 4, iclass 19, count 2 2006.229.14:29:35.71#ibcon#read 4, iclass 19, count 2 2006.229.14:29:35.71#ibcon#about to read 5, iclass 19, count 2 2006.229.14:29:35.71#ibcon#read 5, iclass 19, count 2 2006.229.14:29:35.71#ibcon#about to read 6, iclass 19, count 2 2006.229.14:29:35.71#ibcon#read 6, iclass 19, count 2 2006.229.14:29:35.71#ibcon#end of sib2, iclass 19, count 2 2006.229.14:29:35.71#ibcon#*after write, iclass 19, count 2 2006.229.14:29:35.71#ibcon#*before return 0, iclass 19, count 2 2006.229.14:29:35.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:35.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:35.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.14:29:35.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:35.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:35.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:35.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:35.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:29:35.83#ibcon#first serial, iclass 19, count 0 2006.229.14:29:35.83#ibcon#enter sib2, iclass 19, count 0 2006.229.14:29:35.83#ibcon#flushed, iclass 19, count 0 2006.229.14:29:35.83#ibcon#about to write, iclass 19, count 0 2006.229.14:29:35.83#ibcon#wrote, iclass 19, count 0 2006.229.14:29:35.83#ibcon#about to read 3, iclass 19, count 0 2006.229.14:29:35.85#ibcon#read 3, iclass 19, count 0 2006.229.14:29:35.85#ibcon#about to read 4, iclass 19, count 0 2006.229.14:29:35.85#ibcon#read 4, iclass 19, count 0 2006.229.14:29:35.85#ibcon#about to read 5, iclass 19, count 0 2006.229.14:29:35.85#ibcon#read 5, iclass 19, count 0 2006.229.14:29:35.85#ibcon#about to read 6, iclass 19, count 0 2006.229.14:29:35.85#ibcon#read 6, iclass 19, count 0 2006.229.14:29:35.85#ibcon#end of sib2, iclass 19, count 0 2006.229.14:29:35.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:29:35.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:29:35.85#ibcon#[25=USB\r\n] 2006.229.14:29:35.85#ibcon#*before write, iclass 19, count 0 2006.229.14:29:35.85#ibcon#enter sib2, iclass 19, count 0 2006.229.14:29:35.85#ibcon#flushed, iclass 19, count 0 2006.229.14:29:35.85#ibcon#about to write, iclass 19, count 0 2006.229.14:29:35.85#ibcon#wrote, iclass 19, count 0 2006.229.14:29:35.85#ibcon#about to read 3, iclass 19, count 0 2006.229.14:29:35.88#ibcon#read 3, iclass 19, count 0 2006.229.14:29:35.88#ibcon#about to read 4, iclass 19, count 0 2006.229.14:29:35.88#ibcon#read 4, iclass 19, count 0 2006.229.14:29:35.88#ibcon#about to read 5, iclass 19, count 0 2006.229.14:29:35.88#ibcon#read 5, iclass 19, count 0 2006.229.14:29:35.88#ibcon#about to read 6, iclass 19, count 0 2006.229.14:29:35.88#ibcon#read 6, iclass 19, count 0 2006.229.14:29:35.88#ibcon#end of sib2, iclass 19, count 0 2006.229.14:29:35.88#ibcon#*after write, iclass 19, count 0 2006.229.14:29:35.88#ibcon#*before return 0, iclass 19, count 0 2006.229.14:29:35.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:35.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:35.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:29:35.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:29:35.88$vck44/valo=3,564.99 2006.229.14:29:35.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.14:29:35.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.14:29:35.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:35.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:35.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:35.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:35.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:29:35.88#ibcon#first serial, iclass 21, count 0 2006.229.14:29:35.88#ibcon#enter sib2, iclass 21, count 0 2006.229.14:29:35.88#ibcon#flushed, iclass 21, count 0 2006.229.14:29:35.88#ibcon#about to write, iclass 21, count 0 2006.229.14:29:35.88#ibcon#wrote, iclass 21, count 0 2006.229.14:29:35.88#ibcon#about to read 3, iclass 21, count 0 2006.229.14:29:35.90#ibcon#read 3, iclass 21, count 0 2006.229.14:29:35.90#ibcon#about to read 4, iclass 21, count 0 2006.229.14:29:35.90#ibcon#read 4, iclass 21, count 0 2006.229.14:29:35.90#ibcon#about to read 5, iclass 21, count 0 2006.229.14:29:35.90#ibcon#read 5, iclass 21, count 0 2006.229.14:29:35.90#ibcon#about to read 6, iclass 21, count 0 2006.229.14:29:35.90#ibcon#read 6, iclass 21, count 0 2006.229.14:29:35.90#ibcon#end of sib2, iclass 21, count 0 2006.229.14:29:35.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:29:35.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:29:35.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:29:35.90#ibcon#*before write, iclass 21, count 0 2006.229.14:29:35.90#ibcon#enter sib2, iclass 21, count 0 2006.229.14:29:35.90#ibcon#flushed, iclass 21, count 0 2006.229.14:29:35.90#ibcon#about to write, iclass 21, count 0 2006.229.14:29:35.90#ibcon#wrote, iclass 21, count 0 2006.229.14:29:35.90#ibcon#about to read 3, iclass 21, count 0 2006.229.14:29:35.94#ibcon#read 3, iclass 21, count 0 2006.229.14:29:35.94#ibcon#about to read 4, iclass 21, count 0 2006.229.14:29:35.94#ibcon#read 4, iclass 21, count 0 2006.229.14:29:35.94#ibcon#about to read 5, iclass 21, count 0 2006.229.14:29:35.94#ibcon#read 5, iclass 21, count 0 2006.229.14:29:35.94#ibcon#about to read 6, iclass 21, count 0 2006.229.14:29:35.94#ibcon#read 6, iclass 21, count 0 2006.229.14:29:35.94#ibcon#end of sib2, iclass 21, count 0 2006.229.14:29:35.94#ibcon#*after write, iclass 21, count 0 2006.229.14:29:35.94#ibcon#*before return 0, iclass 21, count 0 2006.229.14:29:35.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:35.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:35.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:29:35.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:29:35.94$vck44/va=3,6 2006.229.14:29:35.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.14:29:35.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.14:29:35.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:35.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:36.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:36.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:36.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.14:29:36.00#ibcon#first serial, iclass 23, count 2 2006.229.14:29:36.00#ibcon#enter sib2, iclass 23, count 2 2006.229.14:29:36.00#ibcon#flushed, iclass 23, count 2 2006.229.14:29:36.00#ibcon#about to write, iclass 23, count 2 2006.229.14:29:36.00#ibcon#wrote, iclass 23, count 2 2006.229.14:29:36.00#ibcon#about to read 3, iclass 23, count 2 2006.229.14:29:36.02#ibcon#read 3, iclass 23, count 2 2006.229.14:29:36.02#ibcon#about to read 4, iclass 23, count 2 2006.229.14:29:36.02#ibcon#read 4, iclass 23, count 2 2006.229.14:29:36.02#ibcon#about to read 5, iclass 23, count 2 2006.229.14:29:36.02#ibcon#read 5, iclass 23, count 2 2006.229.14:29:36.02#ibcon#about to read 6, iclass 23, count 2 2006.229.14:29:36.02#ibcon#read 6, iclass 23, count 2 2006.229.14:29:36.02#ibcon#end of sib2, iclass 23, count 2 2006.229.14:29:36.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.14:29:36.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.14:29:36.02#ibcon#[25=AT03-06\r\n] 2006.229.14:29:36.02#ibcon#*before write, iclass 23, count 2 2006.229.14:29:36.02#ibcon#enter sib2, iclass 23, count 2 2006.229.14:29:36.02#ibcon#flushed, iclass 23, count 2 2006.229.14:29:36.02#ibcon#about to write, iclass 23, count 2 2006.229.14:29:36.02#ibcon#wrote, iclass 23, count 2 2006.229.14:29:36.02#ibcon#about to read 3, iclass 23, count 2 2006.229.14:29:36.05#ibcon#read 3, iclass 23, count 2 2006.229.14:29:36.05#ibcon#about to read 4, iclass 23, count 2 2006.229.14:29:36.05#ibcon#read 4, iclass 23, count 2 2006.229.14:29:36.05#ibcon#about to read 5, iclass 23, count 2 2006.229.14:29:36.05#ibcon#read 5, iclass 23, count 2 2006.229.14:29:36.05#ibcon#about to read 6, iclass 23, count 2 2006.229.14:29:36.05#ibcon#read 6, iclass 23, count 2 2006.229.14:29:36.05#ibcon#end of sib2, iclass 23, count 2 2006.229.14:29:36.05#ibcon#*after write, iclass 23, count 2 2006.229.14:29:36.05#ibcon#*before return 0, iclass 23, count 2 2006.229.14:29:36.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:36.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:36.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.14:29:36.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:36.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:36.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:36.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:36.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:29:36.17#ibcon#first serial, iclass 23, count 0 2006.229.14:29:36.17#ibcon#enter sib2, iclass 23, count 0 2006.229.14:29:36.17#ibcon#flushed, iclass 23, count 0 2006.229.14:29:36.17#ibcon#about to write, iclass 23, count 0 2006.229.14:29:36.17#ibcon#wrote, iclass 23, count 0 2006.229.14:29:36.17#ibcon#about to read 3, iclass 23, count 0 2006.229.14:29:36.19#ibcon#read 3, iclass 23, count 0 2006.229.14:29:36.19#ibcon#about to read 4, iclass 23, count 0 2006.229.14:29:36.19#ibcon#read 4, iclass 23, count 0 2006.229.14:29:36.19#ibcon#about to read 5, iclass 23, count 0 2006.229.14:29:36.19#ibcon#read 5, iclass 23, count 0 2006.229.14:29:36.19#ibcon#about to read 6, iclass 23, count 0 2006.229.14:29:36.19#ibcon#read 6, iclass 23, count 0 2006.229.14:29:36.19#ibcon#end of sib2, iclass 23, count 0 2006.229.14:29:36.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:29:36.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:29:36.19#ibcon#[25=USB\r\n] 2006.229.14:29:36.19#ibcon#*before write, iclass 23, count 0 2006.229.14:29:36.19#ibcon#enter sib2, iclass 23, count 0 2006.229.14:29:36.19#ibcon#flushed, iclass 23, count 0 2006.229.14:29:36.19#ibcon#about to write, iclass 23, count 0 2006.229.14:29:36.19#ibcon#wrote, iclass 23, count 0 2006.229.14:29:36.19#ibcon#about to read 3, iclass 23, count 0 2006.229.14:29:36.22#ibcon#read 3, iclass 23, count 0 2006.229.14:29:36.22#ibcon#about to read 4, iclass 23, count 0 2006.229.14:29:36.22#ibcon#read 4, iclass 23, count 0 2006.229.14:29:36.22#ibcon#about to read 5, iclass 23, count 0 2006.229.14:29:36.22#ibcon#read 5, iclass 23, count 0 2006.229.14:29:36.22#ibcon#about to read 6, iclass 23, count 0 2006.229.14:29:36.22#ibcon#read 6, iclass 23, count 0 2006.229.14:29:36.22#ibcon#end of sib2, iclass 23, count 0 2006.229.14:29:36.22#ibcon#*after write, iclass 23, count 0 2006.229.14:29:36.22#ibcon#*before return 0, iclass 23, count 0 2006.229.14:29:36.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:36.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:36.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:29:36.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:29:36.22$vck44/valo=4,624.99 2006.229.14:29:36.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:29:36.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:29:36.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:36.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:36.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:36.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:36.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:29:36.22#ibcon#first serial, iclass 25, count 0 2006.229.14:29:36.22#ibcon#enter sib2, iclass 25, count 0 2006.229.14:29:36.22#ibcon#flushed, iclass 25, count 0 2006.229.14:29:36.22#ibcon#about to write, iclass 25, count 0 2006.229.14:29:36.22#ibcon#wrote, iclass 25, count 0 2006.229.14:29:36.22#ibcon#about to read 3, iclass 25, count 0 2006.229.14:29:36.24#ibcon#read 3, iclass 25, count 0 2006.229.14:29:36.24#ibcon#about to read 4, iclass 25, count 0 2006.229.14:29:36.24#ibcon#read 4, iclass 25, count 0 2006.229.14:29:36.24#ibcon#about to read 5, iclass 25, count 0 2006.229.14:29:36.24#ibcon#read 5, iclass 25, count 0 2006.229.14:29:36.24#ibcon#about to read 6, iclass 25, count 0 2006.229.14:29:36.24#ibcon#read 6, iclass 25, count 0 2006.229.14:29:36.24#ibcon#end of sib2, iclass 25, count 0 2006.229.14:29:36.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:29:36.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:29:36.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:29:36.24#ibcon#*before write, iclass 25, count 0 2006.229.14:29:36.24#ibcon#enter sib2, iclass 25, count 0 2006.229.14:29:36.24#ibcon#flushed, iclass 25, count 0 2006.229.14:29:36.24#ibcon#about to write, iclass 25, count 0 2006.229.14:29:36.24#ibcon#wrote, iclass 25, count 0 2006.229.14:29:36.24#ibcon#about to read 3, iclass 25, count 0 2006.229.14:29:36.28#ibcon#read 3, iclass 25, count 0 2006.229.14:29:36.28#ibcon#about to read 4, iclass 25, count 0 2006.229.14:29:36.28#ibcon#read 4, iclass 25, count 0 2006.229.14:29:36.28#ibcon#about to read 5, iclass 25, count 0 2006.229.14:29:36.28#ibcon#read 5, iclass 25, count 0 2006.229.14:29:36.28#ibcon#about to read 6, iclass 25, count 0 2006.229.14:29:36.28#ibcon#read 6, iclass 25, count 0 2006.229.14:29:36.28#ibcon#end of sib2, iclass 25, count 0 2006.229.14:29:36.28#ibcon#*after write, iclass 25, count 0 2006.229.14:29:36.28#ibcon#*before return 0, iclass 25, count 0 2006.229.14:29:36.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:36.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:36.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:29:36.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:29:36.28$vck44/va=4,7 2006.229.14:29:36.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.14:29:36.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.14:29:36.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:36.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:36.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:36.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:36.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.14:29:36.34#ibcon#first serial, iclass 27, count 2 2006.229.14:29:36.34#ibcon#enter sib2, iclass 27, count 2 2006.229.14:29:36.34#ibcon#flushed, iclass 27, count 2 2006.229.14:29:36.34#ibcon#about to write, iclass 27, count 2 2006.229.14:29:36.34#ibcon#wrote, iclass 27, count 2 2006.229.14:29:36.34#ibcon#about to read 3, iclass 27, count 2 2006.229.14:29:36.36#ibcon#read 3, iclass 27, count 2 2006.229.14:29:36.36#ibcon#about to read 4, iclass 27, count 2 2006.229.14:29:36.36#ibcon#read 4, iclass 27, count 2 2006.229.14:29:36.36#ibcon#about to read 5, iclass 27, count 2 2006.229.14:29:36.36#ibcon#read 5, iclass 27, count 2 2006.229.14:29:36.36#ibcon#about to read 6, iclass 27, count 2 2006.229.14:29:36.36#ibcon#read 6, iclass 27, count 2 2006.229.14:29:36.36#ibcon#end of sib2, iclass 27, count 2 2006.229.14:29:36.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.14:29:36.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.14:29:36.36#ibcon#[25=AT04-07\r\n] 2006.229.14:29:36.36#ibcon#*before write, iclass 27, count 2 2006.229.14:29:36.36#ibcon#enter sib2, iclass 27, count 2 2006.229.14:29:36.36#ibcon#flushed, iclass 27, count 2 2006.229.14:29:36.36#ibcon#about to write, iclass 27, count 2 2006.229.14:29:36.36#ibcon#wrote, iclass 27, count 2 2006.229.14:29:36.36#ibcon#about to read 3, iclass 27, count 2 2006.229.14:29:36.39#ibcon#read 3, iclass 27, count 2 2006.229.14:29:36.39#ibcon#about to read 4, iclass 27, count 2 2006.229.14:29:36.39#ibcon#read 4, iclass 27, count 2 2006.229.14:29:36.39#ibcon#about to read 5, iclass 27, count 2 2006.229.14:29:36.39#ibcon#read 5, iclass 27, count 2 2006.229.14:29:36.39#ibcon#about to read 6, iclass 27, count 2 2006.229.14:29:36.39#ibcon#read 6, iclass 27, count 2 2006.229.14:29:36.39#ibcon#end of sib2, iclass 27, count 2 2006.229.14:29:36.39#ibcon#*after write, iclass 27, count 2 2006.229.14:29:36.39#ibcon#*before return 0, iclass 27, count 2 2006.229.14:29:36.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:36.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:36.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.14:29:36.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:36.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:36.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:36.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:36.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:29:36.51#ibcon#first serial, iclass 27, count 0 2006.229.14:29:36.51#ibcon#enter sib2, iclass 27, count 0 2006.229.14:29:36.51#ibcon#flushed, iclass 27, count 0 2006.229.14:29:36.51#ibcon#about to write, iclass 27, count 0 2006.229.14:29:36.51#ibcon#wrote, iclass 27, count 0 2006.229.14:29:36.51#ibcon#about to read 3, iclass 27, count 0 2006.229.14:29:36.53#ibcon#read 3, iclass 27, count 0 2006.229.14:29:36.53#ibcon#about to read 4, iclass 27, count 0 2006.229.14:29:36.53#ibcon#read 4, iclass 27, count 0 2006.229.14:29:36.53#ibcon#about to read 5, iclass 27, count 0 2006.229.14:29:36.53#ibcon#read 5, iclass 27, count 0 2006.229.14:29:36.53#ibcon#about to read 6, iclass 27, count 0 2006.229.14:29:36.53#ibcon#read 6, iclass 27, count 0 2006.229.14:29:36.53#ibcon#end of sib2, iclass 27, count 0 2006.229.14:29:36.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:29:36.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:29:36.53#ibcon#[25=USB\r\n] 2006.229.14:29:36.53#ibcon#*before write, iclass 27, count 0 2006.229.14:29:36.53#ibcon#enter sib2, iclass 27, count 0 2006.229.14:29:36.53#ibcon#flushed, iclass 27, count 0 2006.229.14:29:36.53#ibcon#about to write, iclass 27, count 0 2006.229.14:29:36.53#ibcon#wrote, iclass 27, count 0 2006.229.14:29:36.53#ibcon#about to read 3, iclass 27, count 0 2006.229.14:29:36.56#ibcon#read 3, iclass 27, count 0 2006.229.14:29:36.56#ibcon#about to read 4, iclass 27, count 0 2006.229.14:29:36.56#ibcon#read 4, iclass 27, count 0 2006.229.14:29:36.56#ibcon#about to read 5, iclass 27, count 0 2006.229.14:29:36.56#ibcon#read 5, iclass 27, count 0 2006.229.14:29:36.56#ibcon#about to read 6, iclass 27, count 0 2006.229.14:29:36.56#ibcon#read 6, iclass 27, count 0 2006.229.14:29:36.56#ibcon#end of sib2, iclass 27, count 0 2006.229.14:29:36.56#ibcon#*after write, iclass 27, count 0 2006.229.14:29:36.56#ibcon#*before return 0, iclass 27, count 0 2006.229.14:29:36.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:36.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:36.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:29:36.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:29:36.56$vck44/valo=5,734.99 2006.229.14:29:36.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:29:36.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:29:36.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:36.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:36.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:36.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:36.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:29:36.56#ibcon#first serial, iclass 29, count 0 2006.229.14:29:36.56#ibcon#enter sib2, iclass 29, count 0 2006.229.14:29:36.56#ibcon#flushed, iclass 29, count 0 2006.229.14:29:36.56#ibcon#about to write, iclass 29, count 0 2006.229.14:29:36.56#ibcon#wrote, iclass 29, count 0 2006.229.14:29:36.56#ibcon#about to read 3, iclass 29, count 0 2006.229.14:29:36.58#ibcon#read 3, iclass 29, count 0 2006.229.14:29:36.58#ibcon#about to read 4, iclass 29, count 0 2006.229.14:29:36.58#ibcon#read 4, iclass 29, count 0 2006.229.14:29:36.58#ibcon#about to read 5, iclass 29, count 0 2006.229.14:29:36.58#ibcon#read 5, iclass 29, count 0 2006.229.14:29:36.58#ibcon#about to read 6, iclass 29, count 0 2006.229.14:29:36.58#ibcon#read 6, iclass 29, count 0 2006.229.14:29:36.58#ibcon#end of sib2, iclass 29, count 0 2006.229.14:29:36.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:29:36.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:29:36.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:29:36.58#ibcon#*before write, iclass 29, count 0 2006.229.14:29:36.58#ibcon#enter sib2, iclass 29, count 0 2006.229.14:29:36.58#ibcon#flushed, iclass 29, count 0 2006.229.14:29:36.58#ibcon#about to write, iclass 29, count 0 2006.229.14:29:36.58#ibcon#wrote, iclass 29, count 0 2006.229.14:29:36.58#ibcon#about to read 3, iclass 29, count 0 2006.229.14:29:36.62#ibcon#read 3, iclass 29, count 0 2006.229.14:29:36.62#ibcon#about to read 4, iclass 29, count 0 2006.229.14:29:36.62#ibcon#read 4, iclass 29, count 0 2006.229.14:29:36.62#ibcon#about to read 5, iclass 29, count 0 2006.229.14:29:36.62#ibcon#read 5, iclass 29, count 0 2006.229.14:29:36.62#ibcon#about to read 6, iclass 29, count 0 2006.229.14:29:36.62#ibcon#read 6, iclass 29, count 0 2006.229.14:29:36.62#ibcon#end of sib2, iclass 29, count 0 2006.229.14:29:36.62#ibcon#*after write, iclass 29, count 0 2006.229.14:29:36.62#ibcon#*before return 0, iclass 29, count 0 2006.229.14:29:36.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:36.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:36.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:29:36.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:29:36.62$vck44/va=5,4 2006.229.14:29:36.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.14:29:36.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.14:29:36.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:36.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:36.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:36.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:36.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.14:29:36.68#ibcon#first serial, iclass 31, count 2 2006.229.14:29:36.68#ibcon#enter sib2, iclass 31, count 2 2006.229.14:29:36.68#ibcon#flushed, iclass 31, count 2 2006.229.14:29:36.68#ibcon#about to write, iclass 31, count 2 2006.229.14:29:36.68#ibcon#wrote, iclass 31, count 2 2006.229.14:29:36.68#ibcon#about to read 3, iclass 31, count 2 2006.229.14:29:36.70#ibcon#read 3, iclass 31, count 2 2006.229.14:29:36.70#ibcon#about to read 4, iclass 31, count 2 2006.229.14:29:36.70#ibcon#read 4, iclass 31, count 2 2006.229.14:29:36.70#ibcon#about to read 5, iclass 31, count 2 2006.229.14:29:36.70#ibcon#read 5, iclass 31, count 2 2006.229.14:29:36.70#ibcon#about to read 6, iclass 31, count 2 2006.229.14:29:36.70#ibcon#read 6, iclass 31, count 2 2006.229.14:29:36.70#ibcon#end of sib2, iclass 31, count 2 2006.229.14:29:36.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.14:29:36.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.14:29:36.70#ibcon#[25=AT05-04\r\n] 2006.229.14:29:36.70#ibcon#*before write, iclass 31, count 2 2006.229.14:29:36.70#ibcon#enter sib2, iclass 31, count 2 2006.229.14:29:36.70#ibcon#flushed, iclass 31, count 2 2006.229.14:29:36.70#ibcon#about to write, iclass 31, count 2 2006.229.14:29:36.70#ibcon#wrote, iclass 31, count 2 2006.229.14:29:36.70#ibcon#about to read 3, iclass 31, count 2 2006.229.14:29:36.73#ibcon#read 3, iclass 31, count 2 2006.229.14:29:36.73#ibcon#about to read 4, iclass 31, count 2 2006.229.14:29:36.73#ibcon#read 4, iclass 31, count 2 2006.229.14:29:36.73#ibcon#about to read 5, iclass 31, count 2 2006.229.14:29:36.73#ibcon#read 5, iclass 31, count 2 2006.229.14:29:36.73#ibcon#about to read 6, iclass 31, count 2 2006.229.14:29:36.73#ibcon#read 6, iclass 31, count 2 2006.229.14:29:36.73#ibcon#end of sib2, iclass 31, count 2 2006.229.14:29:36.73#ibcon#*after write, iclass 31, count 2 2006.229.14:29:36.73#ibcon#*before return 0, iclass 31, count 2 2006.229.14:29:36.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:36.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:36.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.14:29:36.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:36.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:36.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:36.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:36.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:29:36.85#ibcon#first serial, iclass 31, count 0 2006.229.14:29:36.85#ibcon#enter sib2, iclass 31, count 0 2006.229.14:29:36.85#ibcon#flushed, iclass 31, count 0 2006.229.14:29:36.85#ibcon#about to write, iclass 31, count 0 2006.229.14:29:36.85#ibcon#wrote, iclass 31, count 0 2006.229.14:29:36.85#ibcon#about to read 3, iclass 31, count 0 2006.229.14:29:36.87#ibcon#read 3, iclass 31, count 0 2006.229.14:29:36.87#ibcon#about to read 4, iclass 31, count 0 2006.229.14:29:36.87#ibcon#read 4, iclass 31, count 0 2006.229.14:29:36.87#ibcon#about to read 5, iclass 31, count 0 2006.229.14:29:36.87#ibcon#read 5, iclass 31, count 0 2006.229.14:29:36.87#ibcon#about to read 6, iclass 31, count 0 2006.229.14:29:36.87#ibcon#read 6, iclass 31, count 0 2006.229.14:29:36.87#ibcon#end of sib2, iclass 31, count 0 2006.229.14:29:36.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:29:36.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:29:36.87#ibcon#[25=USB\r\n] 2006.229.14:29:36.87#ibcon#*before write, iclass 31, count 0 2006.229.14:29:36.87#ibcon#enter sib2, iclass 31, count 0 2006.229.14:29:36.87#ibcon#flushed, iclass 31, count 0 2006.229.14:29:36.87#ibcon#about to write, iclass 31, count 0 2006.229.14:29:36.87#ibcon#wrote, iclass 31, count 0 2006.229.14:29:36.87#ibcon#about to read 3, iclass 31, count 0 2006.229.14:29:36.90#ibcon#read 3, iclass 31, count 0 2006.229.14:29:36.90#ibcon#about to read 4, iclass 31, count 0 2006.229.14:29:36.90#ibcon#read 4, iclass 31, count 0 2006.229.14:29:36.90#ibcon#about to read 5, iclass 31, count 0 2006.229.14:29:36.90#ibcon#read 5, iclass 31, count 0 2006.229.14:29:36.90#ibcon#about to read 6, iclass 31, count 0 2006.229.14:29:36.90#ibcon#read 6, iclass 31, count 0 2006.229.14:29:36.90#ibcon#end of sib2, iclass 31, count 0 2006.229.14:29:36.90#ibcon#*after write, iclass 31, count 0 2006.229.14:29:36.90#ibcon#*before return 0, iclass 31, count 0 2006.229.14:29:36.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:36.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:36.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:29:36.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:29:36.90$vck44/valo=6,814.99 2006.229.14:29:36.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.14:29:36.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.14:29:36.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:36.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:29:36.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:29:36.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:29:36.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:29:36.90#ibcon#first serial, iclass 33, count 0 2006.229.14:29:36.90#ibcon#enter sib2, iclass 33, count 0 2006.229.14:29:36.90#ibcon#flushed, iclass 33, count 0 2006.229.14:29:36.90#ibcon#about to write, iclass 33, count 0 2006.229.14:29:36.90#ibcon#wrote, iclass 33, count 0 2006.229.14:29:36.90#ibcon#about to read 3, iclass 33, count 0 2006.229.14:29:36.92#ibcon#read 3, iclass 33, count 0 2006.229.14:29:36.92#ibcon#about to read 4, iclass 33, count 0 2006.229.14:29:36.92#ibcon#read 4, iclass 33, count 0 2006.229.14:29:36.92#ibcon#about to read 5, iclass 33, count 0 2006.229.14:29:36.92#ibcon#read 5, iclass 33, count 0 2006.229.14:29:36.92#ibcon#about to read 6, iclass 33, count 0 2006.229.14:29:36.92#ibcon#read 6, iclass 33, count 0 2006.229.14:29:36.92#ibcon#end of sib2, iclass 33, count 0 2006.229.14:29:36.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:29:36.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:29:36.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:29:36.92#ibcon#*before write, iclass 33, count 0 2006.229.14:29:36.92#ibcon#enter sib2, iclass 33, count 0 2006.229.14:29:36.92#ibcon#flushed, iclass 33, count 0 2006.229.14:29:36.92#ibcon#about to write, iclass 33, count 0 2006.229.14:29:36.92#ibcon#wrote, iclass 33, count 0 2006.229.14:29:36.92#ibcon#about to read 3, iclass 33, count 0 2006.229.14:29:36.96#ibcon#read 3, iclass 33, count 0 2006.229.14:29:36.96#ibcon#about to read 4, iclass 33, count 0 2006.229.14:29:36.96#ibcon#read 4, iclass 33, count 0 2006.229.14:29:36.96#ibcon#about to read 5, iclass 33, count 0 2006.229.14:29:36.96#ibcon#read 5, iclass 33, count 0 2006.229.14:29:36.96#ibcon#about to read 6, iclass 33, count 0 2006.229.14:29:36.96#ibcon#read 6, iclass 33, count 0 2006.229.14:29:36.96#ibcon#end of sib2, iclass 33, count 0 2006.229.14:29:36.96#ibcon#*after write, iclass 33, count 0 2006.229.14:29:36.96#ibcon#*before return 0, iclass 33, count 0 2006.229.14:29:36.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:29:36.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:29:36.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:29:36.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:29:36.96$vck44/va=6,4 2006.229.14:29:36.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.14:29:36.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.14:29:36.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:36.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:29:37.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:29:37.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:29:37.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.14:29:37.02#ibcon#first serial, iclass 35, count 2 2006.229.14:29:37.02#ibcon#enter sib2, iclass 35, count 2 2006.229.14:29:37.02#ibcon#flushed, iclass 35, count 2 2006.229.14:29:37.02#ibcon#about to write, iclass 35, count 2 2006.229.14:29:37.02#ibcon#wrote, iclass 35, count 2 2006.229.14:29:37.02#ibcon#about to read 3, iclass 35, count 2 2006.229.14:29:37.04#ibcon#read 3, iclass 35, count 2 2006.229.14:29:37.04#ibcon#about to read 4, iclass 35, count 2 2006.229.14:29:37.04#ibcon#read 4, iclass 35, count 2 2006.229.14:29:37.04#ibcon#about to read 5, iclass 35, count 2 2006.229.14:29:37.04#ibcon#read 5, iclass 35, count 2 2006.229.14:29:37.04#ibcon#about to read 6, iclass 35, count 2 2006.229.14:29:37.04#ibcon#read 6, iclass 35, count 2 2006.229.14:29:37.04#ibcon#end of sib2, iclass 35, count 2 2006.229.14:29:37.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.14:29:37.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.14:29:37.04#ibcon#[25=AT06-04\r\n] 2006.229.14:29:37.04#ibcon#*before write, iclass 35, count 2 2006.229.14:29:37.04#ibcon#enter sib2, iclass 35, count 2 2006.229.14:29:37.04#ibcon#flushed, iclass 35, count 2 2006.229.14:29:37.04#ibcon#about to write, iclass 35, count 2 2006.229.14:29:37.04#ibcon#wrote, iclass 35, count 2 2006.229.14:29:37.04#ibcon#about to read 3, iclass 35, count 2 2006.229.14:29:37.07#ibcon#read 3, iclass 35, count 2 2006.229.14:29:37.07#ibcon#about to read 4, iclass 35, count 2 2006.229.14:29:37.07#ibcon#read 4, iclass 35, count 2 2006.229.14:29:37.07#ibcon#about to read 5, iclass 35, count 2 2006.229.14:29:37.07#ibcon#read 5, iclass 35, count 2 2006.229.14:29:37.07#ibcon#about to read 6, iclass 35, count 2 2006.229.14:29:37.07#ibcon#read 6, iclass 35, count 2 2006.229.14:29:37.07#ibcon#end of sib2, iclass 35, count 2 2006.229.14:29:37.07#ibcon#*after write, iclass 35, count 2 2006.229.14:29:37.07#ibcon#*before return 0, iclass 35, count 2 2006.229.14:29:37.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:29:37.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:29:37.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.14:29:37.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:37.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:29:37.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:29:37.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:29:37.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:29:37.19#ibcon#first serial, iclass 35, count 0 2006.229.14:29:37.19#ibcon#enter sib2, iclass 35, count 0 2006.229.14:29:37.19#ibcon#flushed, iclass 35, count 0 2006.229.14:29:37.19#ibcon#about to write, iclass 35, count 0 2006.229.14:29:37.19#ibcon#wrote, iclass 35, count 0 2006.229.14:29:37.19#ibcon#about to read 3, iclass 35, count 0 2006.229.14:29:37.21#ibcon#read 3, iclass 35, count 0 2006.229.14:29:37.21#ibcon#about to read 4, iclass 35, count 0 2006.229.14:29:37.21#ibcon#read 4, iclass 35, count 0 2006.229.14:29:37.21#ibcon#about to read 5, iclass 35, count 0 2006.229.14:29:37.21#ibcon#read 5, iclass 35, count 0 2006.229.14:29:37.21#ibcon#about to read 6, iclass 35, count 0 2006.229.14:29:37.21#ibcon#read 6, iclass 35, count 0 2006.229.14:29:37.21#ibcon#end of sib2, iclass 35, count 0 2006.229.14:29:37.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:29:37.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:29:37.21#ibcon#[25=USB\r\n] 2006.229.14:29:37.21#ibcon#*before write, iclass 35, count 0 2006.229.14:29:37.21#ibcon#enter sib2, iclass 35, count 0 2006.229.14:29:37.21#ibcon#flushed, iclass 35, count 0 2006.229.14:29:37.21#ibcon#about to write, iclass 35, count 0 2006.229.14:29:37.21#ibcon#wrote, iclass 35, count 0 2006.229.14:29:37.21#ibcon#about to read 3, iclass 35, count 0 2006.229.14:29:37.24#ibcon#read 3, iclass 35, count 0 2006.229.14:29:37.24#ibcon#about to read 4, iclass 35, count 0 2006.229.14:29:37.24#ibcon#read 4, iclass 35, count 0 2006.229.14:29:37.24#ibcon#about to read 5, iclass 35, count 0 2006.229.14:29:37.24#ibcon#read 5, iclass 35, count 0 2006.229.14:29:37.24#ibcon#about to read 6, iclass 35, count 0 2006.229.14:29:37.24#ibcon#read 6, iclass 35, count 0 2006.229.14:29:37.24#ibcon#end of sib2, iclass 35, count 0 2006.229.14:29:37.24#ibcon#*after write, iclass 35, count 0 2006.229.14:29:37.24#ibcon#*before return 0, iclass 35, count 0 2006.229.14:29:37.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:29:37.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:29:37.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:29:37.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:29:37.24$vck44/valo=7,864.99 2006.229.14:29:37.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:29:37.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:29:37.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:37.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:37.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:37.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:37.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:29:37.24#ibcon#first serial, iclass 37, count 0 2006.229.14:29:37.24#ibcon#enter sib2, iclass 37, count 0 2006.229.14:29:37.24#ibcon#flushed, iclass 37, count 0 2006.229.14:29:37.24#ibcon#about to write, iclass 37, count 0 2006.229.14:29:37.24#ibcon#wrote, iclass 37, count 0 2006.229.14:29:37.24#ibcon#about to read 3, iclass 37, count 0 2006.229.14:29:37.26#ibcon#read 3, iclass 37, count 0 2006.229.14:29:37.26#ibcon#about to read 4, iclass 37, count 0 2006.229.14:29:37.26#ibcon#read 4, iclass 37, count 0 2006.229.14:29:37.26#ibcon#about to read 5, iclass 37, count 0 2006.229.14:29:37.26#ibcon#read 5, iclass 37, count 0 2006.229.14:29:37.26#ibcon#about to read 6, iclass 37, count 0 2006.229.14:29:37.26#ibcon#read 6, iclass 37, count 0 2006.229.14:29:37.26#ibcon#end of sib2, iclass 37, count 0 2006.229.14:29:37.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:29:37.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:29:37.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:29:37.26#ibcon#*before write, iclass 37, count 0 2006.229.14:29:37.26#ibcon#enter sib2, iclass 37, count 0 2006.229.14:29:37.26#ibcon#flushed, iclass 37, count 0 2006.229.14:29:37.26#ibcon#about to write, iclass 37, count 0 2006.229.14:29:37.26#ibcon#wrote, iclass 37, count 0 2006.229.14:29:37.26#ibcon#about to read 3, iclass 37, count 0 2006.229.14:29:37.30#ibcon#read 3, iclass 37, count 0 2006.229.14:29:37.30#ibcon#about to read 4, iclass 37, count 0 2006.229.14:29:37.30#ibcon#read 4, iclass 37, count 0 2006.229.14:29:37.30#ibcon#about to read 5, iclass 37, count 0 2006.229.14:29:37.30#ibcon#read 5, iclass 37, count 0 2006.229.14:29:37.30#ibcon#about to read 6, iclass 37, count 0 2006.229.14:29:37.30#ibcon#read 6, iclass 37, count 0 2006.229.14:29:37.30#ibcon#end of sib2, iclass 37, count 0 2006.229.14:29:37.30#ibcon#*after write, iclass 37, count 0 2006.229.14:29:37.30#ibcon#*before return 0, iclass 37, count 0 2006.229.14:29:37.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:37.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:37.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:29:37.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:29:37.30$vck44/va=7,5 2006.229.14:29:37.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.14:29:37.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.14:29:37.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:37.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:37.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:37.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:37.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.14:29:37.36#ibcon#first serial, iclass 39, count 2 2006.229.14:29:37.36#ibcon#enter sib2, iclass 39, count 2 2006.229.14:29:37.36#ibcon#flushed, iclass 39, count 2 2006.229.14:29:37.36#ibcon#about to write, iclass 39, count 2 2006.229.14:29:37.36#ibcon#wrote, iclass 39, count 2 2006.229.14:29:37.36#ibcon#about to read 3, iclass 39, count 2 2006.229.14:29:37.38#ibcon#read 3, iclass 39, count 2 2006.229.14:29:37.38#ibcon#about to read 4, iclass 39, count 2 2006.229.14:29:37.38#ibcon#read 4, iclass 39, count 2 2006.229.14:29:37.38#ibcon#about to read 5, iclass 39, count 2 2006.229.14:29:37.38#ibcon#read 5, iclass 39, count 2 2006.229.14:29:37.38#ibcon#about to read 6, iclass 39, count 2 2006.229.14:29:37.38#ibcon#read 6, iclass 39, count 2 2006.229.14:29:37.38#ibcon#end of sib2, iclass 39, count 2 2006.229.14:29:37.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.14:29:37.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.14:29:37.38#ibcon#[25=AT07-05\r\n] 2006.229.14:29:37.38#ibcon#*before write, iclass 39, count 2 2006.229.14:29:37.38#ibcon#enter sib2, iclass 39, count 2 2006.229.14:29:37.38#ibcon#flushed, iclass 39, count 2 2006.229.14:29:37.38#ibcon#about to write, iclass 39, count 2 2006.229.14:29:37.38#ibcon#wrote, iclass 39, count 2 2006.229.14:29:37.38#ibcon#about to read 3, iclass 39, count 2 2006.229.14:29:37.41#ibcon#read 3, iclass 39, count 2 2006.229.14:29:37.41#ibcon#about to read 4, iclass 39, count 2 2006.229.14:29:37.41#ibcon#read 4, iclass 39, count 2 2006.229.14:29:37.41#ibcon#about to read 5, iclass 39, count 2 2006.229.14:29:37.41#ibcon#read 5, iclass 39, count 2 2006.229.14:29:37.41#ibcon#about to read 6, iclass 39, count 2 2006.229.14:29:37.41#ibcon#read 6, iclass 39, count 2 2006.229.14:29:37.41#ibcon#end of sib2, iclass 39, count 2 2006.229.14:29:37.41#ibcon#*after write, iclass 39, count 2 2006.229.14:29:37.41#ibcon#*before return 0, iclass 39, count 2 2006.229.14:29:37.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:37.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:37.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.14:29:37.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:37.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:37.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:37.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:37.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:29:37.53#ibcon#first serial, iclass 39, count 0 2006.229.14:29:37.53#ibcon#enter sib2, iclass 39, count 0 2006.229.14:29:37.53#ibcon#flushed, iclass 39, count 0 2006.229.14:29:37.53#ibcon#about to write, iclass 39, count 0 2006.229.14:29:37.53#ibcon#wrote, iclass 39, count 0 2006.229.14:29:37.53#ibcon#about to read 3, iclass 39, count 0 2006.229.14:29:37.55#ibcon#read 3, iclass 39, count 0 2006.229.14:29:37.55#ibcon#about to read 4, iclass 39, count 0 2006.229.14:29:37.55#ibcon#read 4, iclass 39, count 0 2006.229.14:29:37.55#ibcon#about to read 5, iclass 39, count 0 2006.229.14:29:37.55#ibcon#read 5, iclass 39, count 0 2006.229.14:29:37.55#ibcon#about to read 6, iclass 39, count 0 2006.229.14:29:37.55#ibcon#read 6, iclass 39, count 0 2006.229.14:29:37.55#ibcon#end of sib2, iclass 39, count 0 2006.229.14:29:37.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:29:37.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:29:37.55#ibcon#[25=USB\r\n] 2006.229.14:29:37.55#ibcon#*before write, iclass 39, count 0 2006.229.14:29:37.55#ibcon#enter sib2, iclass 39, count 0 2006.229.14:29:37.55#ibcon#flushed, iclass 39, count 0 2006.229.14:29:37.55#ibcon#about to write, iclass 39, count 0 2006.229.14:29:37.55#ibcon#wrote, iclass 39, count 0 2006.229.14:29:37.55#ibcon#about to read 3, iclass 39, count 0 2006.229.14:29:37.58#ibcon#read 3, iclass 39, count 0 2006.229.14:29:37.58#ibcon#about to read 4, iclass 39, count 0 2006.229.14:29:37.58#ibcon#read 4, iclass 39, count 0 2006.229.14:29:37.58#ibcon#about to read 5, iclass 39, count 0 2006.229.14:29:37.58#ibcon#read 5, iclass 39, count 0 2006.229.14:29:37.58#ibcon#about to read 6, iclass 39, count 0 2006.229.14:29:37.58#ibcon#read 6, iclass 39, count 0 2006.229.14:29:37.58#ibcon#end of sib2, iclass 39, count 0 2006.229.14:29:37.58#ibcon#*after write, iclass 39, count 0 2006.229.14:29:37.58#ibcon#*before return 0, iclass 39, count 0 2006.229.14:29:37.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:37.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:37.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:29:37.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:29:37.58$vck44/valo=8,884.99 2006.229.14:29:37.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.14:29:37.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.14:29:37.58#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:37.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:37.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:37.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:37.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:29:37.58#ibcon#first serial, iclass 3, count 0 2006.229.14:29:37.58#ibcon#enter sib2, iclass 3, count 0 2006.229.14:29:37.58#ibcon#flushed, iclass 3, count 0 2006.229.14:29:37.58#ibcon#about to write, iclass 3, count 0 2006.229.14:29:37.58#ibcon#wrote, iclass 3, count 0 2006.229.14:29:37.58#ibcon#about to read 3, iclass 3, count 0 2006.229.14:29:37.60#ibcon#read 3, iclass 3, count 0 2006.229.14:29:37.60#ibcon#about to read 4, iclass 3, count 0 2006.229.14:29:37.60#ibcon#read 4, iclass 3, count 0 2006.229.14:29:37.60#ibcon#about to read 5, iclass 3, count 0 2006.229.14:29:37.60#ibcon#read 5, iclass 3, count 0 2006.229.14:29:37.60#ibcon#about to read 6, iclass 3, count 0 2006.229.14:29:37.60#ibcon#read 6, iclass 3, count 0 2006.229.14:29:37.60#ibcon#end of sib2, iclass 3, count 0 2006.229.14:29:37.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:29:37.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:29:37.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:29:37.60#ibcon#*before write, iclass 3, count 0 2006.229.14:29:37.60#ibcon#enter sib2, iclass 3, count 0 2006.229.14:29:37.60#ibcon#flushed, iclass 3, count 0 2006.229.14:29:37.60#ibcon#about to write, iclass 3, count 0 2006.229.14:29:37.60#ibcon#wrote, iclass 3, count 0 2006.229.14:29:37.60#ibcon#about to read 3, iclass 3, count 0 2006.229.14:29:37.64#ibcon#read 3, iclass 3, count 0 2006.229.14:29:37.64#ibcon#about to read 4, iclass 3, count 0 2006.229.14:29:37.64#ibcon#read 4, iclass 3, count 0 2006.229.14:29:37.64#ibcon#about to read 5, iclass 3, count 0 2006.229.14:29:37.64#ibcon#read 5, iclass 3, count 0 2006.229.14:29:37.64#ibcon#about to read 6, iclass 3, count 0 2006.229.14:29:37.64#ibcon#read 6, iclass 3, count 0 2006.229.14:29:37.64#ibcon#end of sib2, iclass 3, count 0 2006.229.14:29:37.64#ibcon#*after write, iclass 3, count 0 2006.229.14:29:37.64#ibcon#*before return 0, iclass 3, count 0 2006.229.14:29:37.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:37.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:37.64#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:29:37.64#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:29:37.64$vck44/va=8,6 2006.229.14:29:37.64#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.14:29:37.64#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.14:29:37.64#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:37.64#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:37.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:37.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:37.70#ibcon#enter wrdev, iclass 5, count 2 2006.229.14:29:37.70#ibcon#first serial, iclass 5, count 2 2006.229.14:29:37.70#ibcon#enter sib2, iclass 5, count 2 2006.229.14:29:37.70#ibcon#flushed, iclass 5, count 2 2006.229.14:29:37.70#ibcon#about to write, iclass 5, count 2 2006.229.14:29:37.70#ibcon#wrote, iclass 5, count 2 2006.229.14:29:37.70#ibcon#about to read 3, iclass 5, count 2 2006.229.14:29:37.72#ibcon#read 3, iclass 5, count 2 2006.229.14:29:37.72#ibcon#about to read 4, iclass 5, count 2 2006.229.14:29:37.72#ibcon#read 4, iclass 5, count 2 2006.229.14:29:37.72#ibcon#about to read 5, iclass 5, count 2 2006.229.14:29:37.72#ibcon#read 5, iclass 5, count 2 2006.229.14:29:37.72#ibcon#about to read 6, iclass 5, count 2 2006.229.14:29:37.72#ibcon#read 6, iclass 5, count 2 2006.229.14:29:37.72#ibcon#end of sib2, iclass 5, count 2 2006.229.14:29:37.72#ibcon#*mode == 0, iclass 5, count 2 2006.229.14:29:37.72#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.14:29:37.72#ibcon#[25=AT08-06\r\n] 2006.229.14:29:37.72#ibcon#*before write, iclass 5, count 2 2006.229.14:29:37.72#ibcon#enter sib2, iclass 5, count 2 2006.229.14:29:37.72#ibcon#flushed, iclass 5, count 2 2006.229.14:29:37.72#ibcon#about to write, iclass 5, count 2 2006.229.14:29:37.72#ibcon#wrote, iclass 5, count 2 2006.229.14:29:37.72#ibcon#about to read 3, iclass 5, count 2 2006.229.14:29:37.75#ibcon#read 3, iclass 5, count 2 2006.229.14:29:37.75#ibcon#about to read 4, iclass 5, count 2 2006.229.14:29:37.75#ibcon#read 4, iclass 5, count 2 2006.229.14:29:37.75#ibcon#about to read 5, iclass 5, count 2 2006.229.14:29:37.75#ibcon#read 5, iclass 5, count 2 2006.229.14:29:37.75#ibcon#about to read 6, iclass 5, count 2 2006.229.14:29:37.75#ibcon#read 6, iclass 5, count 2 2006.229.14:29:37.75#ibcon#end of sib2, iclass 5, count 2 2006.229.14:29:37.75#ibcon#*after write, iclass 5, count 2 2006.229.14:29:37.75#ibcon#*before return 0, iclass 5, count 2 2006.229.14:29:37.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:37.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:37.75#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.14:29:37.75#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:37.75#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:37.87#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:37.87#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:37.87#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:29:37.87#ibcon#first serial, iclass 5, count 0 2006.229.14:29:37.87#ibcon#enter sib2, iclass 5, count 0 2006.229.14:29:37.87#ibcon#flushed, iclass 5, count 0 2006.229.14:29:37.87#ibcon#about to write, iclass 5, count 0 2006.229.14:29:37.87#ibcon#wrote, iclass 5, count 0 2006.229.14:29:37.87#ibcon#about to read 3, iclass 5, count 0 2006.229.14:29:37.89#ibcon#read 3, iclass 5, count 0 2006.229.14:29:37.89#ibcon#about to read 4, iclass 5, count 0 2006.229.14:29:37.89#ibcon#read 4, iclass 5, count 0 2006.229.14:29:37.89#ibcon#about to read 5, iclass 5, count 0 2006.229.14:29:37.89#ibcon#read 5, iclass 5, count 0 2006.229.14:29:37.89#ibcon#about to read 6, iclass 5, count 0 2006.229.14:29:37.89#ibcon#read 6, iclass 5, count 0 2006.229.14:29:37.89#ibcon#end of sib2, iclass 5, count 0 2006.229.14:29:37.89#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:29:37.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:29:37.89#ibcon#[25=USB\r\n] 2006.229.14:29:37.89#ibcon#*before write, iclass 5, count 0 2006.229.14:29:37.89#ibcon#enter sib2, iclass 5, count 0 2006.229.14:29:37.89#ibcon#flushed, iclass 5, count 0 2006.229.14:29:37.89#ibcon#about to write, iclass 5, count 0 2006.229.14:29:37.89#ibcon#wrote, iclass 5, count 0 2006.229.14:29:37.89#ibcon#about to read 3, iclass 5, count 0 2006.229.14:29:37.92#ibcon#read 3, iclass 5, count 0 2006.229.14:29:37.92#ibcon#about to read 4, iclass 5, count 0 2006.229.14:29:37.92#ibcon#read 4, iclass 5, count 0 2006.229.14:29:37.92#ibcon#about to read 5, iclass 5, count 0 2006.229.14:29:37.92#ibcon#read 5, iclass 5, count 0 2006.229.14:29:37.92#ibcon#about to read 6, iclass 5, count 0 2006.229.14:29:37.92#ibcon#read 6, iclass 5, count 0 2006.229.14:29:37.92#ibcon#end of sib2, iclass 5, count 0 2006.229.14:29:37.92#ibcon#*after write, iclass 5, count 0 2006.229.14:29:37.92#ibcon#*before return 0, iclass 5, count 0 2006.229.14:29:37.92#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:37.92#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:37.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:29:37.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:29:37.92$vck44/vblo=1,629.99 2006.229.14:29:37.92#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.14:29:37.92#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.14:29:37.92#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:37.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:37.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:37.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:37.92#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:29:37.92#ibcon#first serial, iclass 7, count 0 2006.229.14:29:37.92#ibcon#enter sib2, iclass 7, count 0 2006.229.14:29:37.92#ibcon#flushed, iclass 7, count 0 2006.229.14:29:37.92#ibcon#about to write, iclass 7, count 0 2006.229.14:29:37.92#ibcon#wrote, iclass 7, count 0 2006.229.14:29:37.92#ibcon#about to read 3, iclass 7, count 0 2006.229.14:29:37.94#ibcon#read 3, iclass 7, count 0 2006.229.14:29:37.94#ibcon#about to read 4, iclass 7, count 0 2006.229.14:29:37.94#ibcon#read 4, iclass 7, count 0 2006.229.14:29:37.94#ibcon#about to read 5, iclass 7, count 0 2006.229.14:29:37.94#ibcon#read 5, iclass 7, count 0 2006.229.14:29:37.94#ibcon#about to read 6, iclass 7, count 0 2006.229.14:29:37.94#ibcon#read 6, iclass 7, count 0 2006.229.14:29:37.94#ibcon#end of sib2, iclass 7, count 0 2006.229.14:29:37.94#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:29:37.94#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:29:37.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:29:37.94#ibcon#*before write, iclass 7, count 0 2006.229.14:29:37.94#ibcon#enter sib2, iclass 7, count 0 2006.229.14:29:37.94#ibcon#flushed, iclass 7, count 0 2006.229.14:29:37.94#ibcon#about to write, iclass 7, count 0 2006.229.14:29:37.94#ibcon#wrote, iclass 7, count 0 2006.229.14:29:37.94#ibcon#about to read 3, iclass 7, count 0 2006.229.14:29:37.98#ibcon#read 3, iclass 7, count 0 2006.229.14:29:37.98#ibcon#about to read 4, iclass 7, count 0 2006.229.14:29:37.98#ibcon#read 4, iclass 7, count 0 2006.229.14:29:37.98#ibcon#about to read 5, iclass 7, count 0 2006.229.14:29:37.98#ibcon#read 5, iclass 7, count 0 2006.229.14:29:37.98#ibcon#about to read 6, iclass 7, count 0 2006.229.14:29:37.98#ibcon#read 6, iclass 7, count 0 2006.229.14:29:37.98#ibcon#end of sib2, iclass 7, count 0 2006.229.14:29:37.98#ibcon#*after write, iclass 7, count 0 2006.229.14:29:37.98#ibcon#*before return 0, iclass 7, count 0 2006.229.14:29:37.98#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:37.98#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:37.98#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:29:37.98#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:29:37.98$vck44/vb=1,4 2006.229.14:29:37.98#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.14:29:37.98#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.14:29:37.98#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:37.98#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:29:37.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:29:37.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:29:37.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.14:29:37.98#ibcon#first serial, iclass 11, count 2 2006.229.14:29:37.98#ibcon#enter sib2, iclass 11, count 2 2006.229.14:29:37.98#ibcon#flushed, iclass 11, count 2 2006.229.14:29:37.98#ibcon#about to write, iclass 11, count 2 2006.229.14:29:37.98#ibcon#wrote, iclass 11, count 2 2006.229.14:29:37.98#ibcon#about to read 3, iclass 11, count 2 2006.229.14:29:38.00#ibcon#read 3, iclass 11, count 2 2006.229.14:29:38.00#ibcon#about to read 4, iclass 11, count 2 2006.229.14:29:38.00#ibcon#read 4, iclass 11, count 2 2006.229.14:29:38.00#ibcon#about to read 5, iclass 11, count 2 2006.229.14:29:38.00#ibcon#read 5, iclass 11, count 2 2006.229.14:29:38.00#ibcon#about to read 6, iclass 11, count 2 2006.229.14:29:38.00#ibcon#read 6, iclass 11, count 2 2006.229.14:29:38.00#ibcon#end of sib2, iclass 11, count 2 2006.229.14:29:38.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.14:29:38.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.14:29:38.00#ibcon#[27=AT01-04\r\n] 2006.229.14:29:38.00#ibcon#*before write, iclass 11, count 2 2006.229.14:29:38.00#ibcon#enter sib2, iclass 11, count 2 2006.229.14:29:38.00#ibcon#flushed, iclass 11, count 2 2006.229.14:29:38.00#ibcon#about to write, iclass 11, count 2 2006.229.14:29:38.00#ibcon#wrote, iclass 11, count 2 2006.229.14:29:38.00#ibcon#about to read 3, iclass 11, count 2 2006.229.14:29:38.03#ibcon#read 3, iclass 11, count 2 2006.229.14:29:38.03#ibcon#about to read 4, iclass 11, count 2 2006.229.14:29:38.03#ibcon#read 4, iclass 11, count 2 2006.229.14:29:38.03#ibcon#about to read 5, iclass 11, count 2 2006.229.14:29:38.03#ibcon#read 5, iclass 11, count 2 2006.229.14:29:38.03#ibcon#about to read 6, iclass 11, count 2 2006.229.14:29:38.03#ibcon#read 6, iclass 11, count 2 2006.229.14:29:38.03#ibcon#end of sib2, iclass 11, count 2 2006.229.14:29:38.03#ibcon#*after write, iclass 11, count 2 2006.229.14:29:38.03#ibcon#*before return 0, iclass 11, count 2 2006.229.14:29:38.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:29:38.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:29:38.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.14:29:38.03#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:38.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:29:38.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:29:38.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:29:38.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:29:38.15#ibcon#first serial, iclass 11, count 0 2006.229.14:29:38.15#ibcon#enter sib2, iclass 11, count 0 2006.229.14:29:38.15#ibcon#flushed, iclass 11, count 0 2006.229.14:29:38.15#ibcon#about to write, iclass 11, count 0 2006.229.14:29:38.15#ibcon#wrote, iclass 11, count 0 2006.229.14:29:38.15#ibcon#about to read 3, iclass 11, count 0 2006.229.14:29:38.17#ibcon#read 3, iclass 11, count 0 2006.229.14:29:38.17#ibcon#about to read 4, iclass 11, count 0 2006.229.14:29:38.17#ibcon#read 4, iclass 11, count 0 2006.229.14:29:38.17#ibcon#about to read 5, iclass 11, count 0 2006.229.14:29:38.17#ibcon#read 5, iclass 11, count 0 2006.229.14:29:38.17#ibcon#about to read 6, iclass 11, count 0 2006.229.14:29:38.17#ibcon#read 6, iclass 11, count 0 2006.229.14:29:38.17#ibcon#end of sib2, iclass 11, count 0 2006.229.14:29:38.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:29:38.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:29:38.17#ibcon#[27=USB\r\n] 2006.229.14:29:38.17#ibcon#*before write, iclass 11, count 0 2006.229.14:29:38.17#ibcon#enter sib2, iclass 11, count 0 2006.229.14:29:38.17#ibcon#flushed, iclass 11, count 0 2006.229.14:29:38.17#ibcon#about to write, iclass 11, count 0 2006.229.14:29:38.17#ibcon#wrote, iclass 11, count 0 2006.229.14:29:38.17#ibcon#about to read 3, iclass 11, count 0 2006.229.14:29:38.20#ibcon#read 3, iclass 11, count 0 2006.229.14:29:38.20#ibcon#about to read 4, iclass 11, count 0 2006.229.14:29:38.20#ibcon#read 4, iclass 11, count 0 2006.229.14:29:38.20#ibcon#about to read 5, iclass 11, count 0 2006.229.14:29:38.20#ibcon#read 5, iclass 11, count 0 2006.229.14:29:38.20#ibcon#about to read 6, iclass 11, count 0 2006.229.14:29:38.20#ibcon#read 6, iclass 11, count 0 2006.229.14:29:38.20#ibcon#end of sib2, iclass 11, count 0 2006.229.14:29:38.20#ibcon#*after write, iclass 11, count 0 2006.229.14:29:38.20#ibcon#*before return 0, iclass 11, count 0 2006.229.14:29:38.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:29:38.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:29:38.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:29:38.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:29:38.20$vck44/vblo=2,634.99 2006.229.14:29:38.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.14:29:38.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.14:29:38.20#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:38.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:38.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:38.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:38.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:29:38.20#ibcon#first serial, iclass 13, count 0 2006.229.14:29:38.20#ibcon#enter sib2, iclass 13, count 0 2006.229.14:29:38.20#ibcon#flushed, iclass 13, count 0 2006.229.14:29:38.20#ibcon#about to write, iclass 13, count 0 2006.229.14:29:38.20#ibcon#wrote, iclass 13, count 0 2006.229.14:29:38.20#ibcon#about to read 3, iclass 13, count 0 2006.229.14:29:38.22#ibcon#read 3, iclass 13, count 0 2006.229.14:29:38.22#ibcon#about to read 4, iclass 13, count 0 2006.229.14:29:38.22#ibcon#read 4, iclass 13, count 0 2006.229.14:29:38.22#ibcon#about to read 5, iclass 13, count 0 2006.229.14:29:38.22#ibcon#read 5, iclass 13, count 0 2006.229.14:29:38.22#ibcon#about to read 6, iclass 13, count 0 2006.229.14:29:38.22#ibcon#read 6, iclass 13, count 0 2006.229.14:29:38.22#ibcon#end of sib2, iclass 13, count 0 2006.229.14:29:38.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:29:38.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:29:38.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:29:38.22#ibcon#*before write, iclass 13, count 0 2006.229.14:29:38.22#ibcon#enter sib2, iclass 13, count 0 2006.229.14:29:38.22#ibcon#flushed, iclass 13, count 0 2006.229.14:29:38.22#ibcon#about to write, iclass 13, count 0 2006.229.14:29:38.22#ibcon#wrote, iclass 13, count 0 2006.229.14:29:38.22#ibcon#about to read 3, iclass 13, count 0 2006.229.14:29:38.26#ibcon#read 3, iclass 13, count 0 2006.229.14:29:38.26#ibcon#about to read 4, iclass 13, count 0 2006.229.14:29:38.26#ibcon#read 4, iclass 13, count 0 2006.229.14:29:38.26#ibcon#about to read 5, iclass 13, count 0 2006.229.14:29:38.26#ibcon#read 5, iclass 13, count 0 2006.229.14:29:38.26#ibcon#about to read 6, iclass 13, count 0 2006.229.14:29:38.26#ibcon#read 6, iclass 13, count 0 2006.229.14:29:38.26#ibcon#end of sib2, iclass 13, count 0 2006.229.14:29:38.26#ibcon#*after write, iclass 13, count 0 2006.229.14:29:38.26#ibcon#*before return 0, iclass 13, count 0 2006.229.14:29:38.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:38.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:29:38.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:29:38.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:29:38.26$vck44/vb=2,4 2006.229.14:29:38.26#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.14:29:38.26#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.14:29:38.26#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:38.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:38.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:38.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:38.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.14:29:38.32#ibcon#first serial, iclass 15, count 2 2006.229.14:29:38.32#ibcon#enter sib2, iclass 15, count 2 2006.229.14:29:38.32#ibcon#flushed, iclass 15, count 2 2006.229.14:29:38.32#ibcon#about to write, iclass 15, count 2 2006.229.14:29:38.32#ibcon#wrote, iclass 15, count 2 2006.229.14:29:38.32#ibcon#about to read 3, iclass 15, count 2 2006.229.14:29:38.34#ibcon#read 3, iclass 15, count 2 2006.229.14:29:38.34#ibcon#about to read 4, iclass 15, count 2 2006.229.14:29:38.34#ibcon#read 4, iclass 15, count 2 2006.229.14:29:38.34#ibcon#about to read 5, iclass 15, count 2 2006.229.14:29:38.34#ibcon#read 5, iclass 15, count 2 2006.229.14:29:38.34#ibcon#about to read 6, iclass 15, count 2 2006.229.14:29:38.34#ibcon#read 6, iclass 15, count 2 2006.229.14:29:38.34#ibcon#end of sib2, iclass 15, count 2 2006.229.14:29:38.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.14:29:38.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.14:29:38.34#ibcon#[27=AT02-04\r\n] 2006.229.14:29:38.34#ibcon#*before write, iclass 15, count 2 2006.229.14:29:38.34#ibcon#enter sib2, iclass 15, count 2 2006.229.14:29:38.34#ibcon#flushed, iclass 15, count 2 2006.229.14:29:38.34#ibcon#about to write, iclass 15, count 2 2006.229.14:29:38.34#ibcon#wrote, iclass 15, count 2 2006.229.14:29:38.34#ibcon#about to read 3, iclass 15, count 2 2006.229.14:29:38.37#ibcon#read 3, iclass 15, count 2 2006.229.14:29:38.37#ibcon#about to read 4, iclass 15, count 2 2006.229.14:29:38.37#ibcon#read 4, iclass 15, count 2 2006.229.14:29:38.37#ibcon#about to read 5, iclass 15, count 2 2006.229.14:29:38.37#ibcon#read 5, iclass 15, count 2 2006.229.14:29:38.37#ibcon#about to read 6, iclass 15, count 2 2006.229.14:29:38.37#ibcon#read 6, iclass 15, count 2 2006.229.14:29:38.37#ibcon#end of sib2, iclass 15, count 2 2006.229.14:29:38.37#ibcon#*after write, iclass 15, count 2 2006.229.14:29:38.37#ibcon#*before return 0, iclass 15, count 2 2006.229.14:29:38.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:38.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:29:38.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.14:29:38.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:38.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:38.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:38.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:38.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:29:38.49#ibcon#first serial, iclass 15, count 0 2006.229.14:29:38.49#ibcon#enter sib2, iclass 15, count 0 2006.229.14:29:38.49#ibcon#flushed, iclass 15, count 0 2006.229.14:29:38.49#ibcon#about to write, iclass 15, count 0 2006.229.14:29:38.49#ibcon#wrote, iclass 15, count 0 2006.229.14:29:38.49#ibcon#about to read 3, iclass 15, count 0 2006.229.14:29:38.51#ibcon#read 3, iclass 15, count 0 2006.229.14:29:38.51#ibcon#about to read 4, iclass 15, count 0 2006.229.14:29:38.51#ibcon#read 4, iclass 15, count 0 2006.229.14:29:38.51#ibcon#about to read 5, iclass 15, count 0 2006.229.14:29:38.51#ibcon#read 5, iclass 15, count 0 2006.229.14:29:38.51#ibcon#about to read 6, iclass 15, count 0 2006.229.14:29:38.51#ibcon#read 6, iclass 15, count 0 2006.229.14:29:38.51#ibcon#end of sib2, iclass 15, count 0 2006.229.14:29:38.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:29:38.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:29:38.51#ibcon#[27=USB\r\n] 2006.229.14:29:38.51#ibcon#*before write, iclass 15, count 0 2006.229.14:29:38.51#ibcon#enter sib2, iclass 15, count 0 2006.229.14:29:38.51#ibcon#flushed, iclass 15, count 0 2006.229.14:29:38.51#ibcon#about to write, iclass 15, count 0 2006.229.14:29:38.51#ibcon#wrote, iclass 15, count 0 2006.229.14:29:38.51#ibcon#about to read 3, iclass 15, count 0 2006.229.14:29:38.54#ibcon#read 3, iclass 15, count 0 2006.229.14:29:38.54#ibcon#about to read 4, iclass 15, count 0 2006.229.14:29:38.54#ibcon#read 4, iclass 15, count 0 2006.229.14:29:38.54#ibcon#about to read 5, iclass 15, count 0 2006.229.14:29:38.54#ibcon#read 5, iclass 15, count 0 2006.229.14:29:38.54#ibcon#about to read 6, iclass 15, count 0 2006.229.14:29:38.54#ibcon#read 6, iclass 15, count 0 2006.229.14:29:38.54#ibcon#end of sib2, iclass 15, count 0 2006.229.14:29:38.54#ibcon#*after write, iclass 15, count 0 2006.229.14:29:38.54#ibcon#*before return 0, iclass 15, count 0 2006.229.14:29:38.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:38.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:29:38.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:29:38.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:29:38.54$vck44/vblo=3,649.99 2006.229.14:29:38.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.14:29:38.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.14:29:38.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:38.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:38.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:38.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:38.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:29:38.54#ibcon#first serial, iclass 17, count 0 2006.229.14:29:38.54#ibcon#enter sib2, iclass 17, count 0 2006.229.14:29:38.54#ibcon#flushed, iclass 17, count 0 2006.229.14:29:38.54#ibcon#about to write, iclass 17, count 0 2006.229.14:29:38.54#ibcon#wrote, iclass 17, count 0 2006.229.14:29:38.54#ibcon#about to read 3, iclass 17, count 0 2006.229.14:29:38.56#ibcon#read 3, iclass 17, count 0 2006.229.14:29:38.56#ibcon#about to read 4, iclass 17, count 0 2006.229.14:29:38.56#ibcon#read 4, iclass 17, count 0 2006.229.14:29:38.56#ibcon#about to read 5, iclass 17, count 0 2006.229.14:29:38.56#ibcon#read 5, iclass 17, count 0 2006.229.14:29:38.56#ibcon#about to read 6, iclass 17, count 0 2006.229.14:29:38.56#ibcon#read 6, iclass 17, count 0 2006.229.14:29:38.56#ibcon#end of sib2, iclass 17, count 0 2006.229.14:29:38.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:29:38.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:29:38.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:29:38.56#ibcon#*before write, iclass 17, count 0 2006.229.14:29:38.56#ibcon#enter sib2, iclass 17, count 0 2006.229.14:29:38.56#ibcon#flushed, iclass 17, count 0 2006.229.14:29:38.56#ibcon#about to write, iclass 17, count 0 2006.229.14:29:38.56#ibcon#wrote, iclass 17, count 0 2006.229.14:29:38.56#ibcon#about to read 3, iclass 17, count 0 2006.229.14:29:38.60#ibcon#read 3, iclass 17, count 0 2006.229.14:29:38.60#ibcon#about to read 4, iclass 17, count 0 2006.229.14:29:38.60#ibcon#read 4, iclass 17, count 0 2006.229.14:29:38.60#ibcon#about to read 5, iclass 17, count 0 2006.229.14:29:38.60#ibcon#read 5, iclass 17, count 0 2006.229.14:29:38.60#ibcon#about to read 6, iclass 17, count 0 2006.229.14:29:38.60#ibcon#read 6, iclass 17, count 0 2006.229.14:29:38.60#ibcon#end of sib2, iclass 17, count 0 2006.229.14:29:38.60#ibcon#*after write, iclass 17, count 0 2006.229.14:29:38.60#ibcon#*before return 0, iclass 17, count 0 2006.229.14:29:38.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:38.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:29:38.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:29:38.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:29:38.60$vck44/vb=3,4 2006.229.14:29:38.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.14:29:38.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.14:29:38.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:38.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:38.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:38.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:38.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.14:29:38.66#ibcon#first serial, iclass 19, count 2 2006.229.14:29:38.66#ibcon#enter sib2, iclass 19, count 2 2006.229.14:29:38.66#ibcon#flushed, iclass 19, count 2 2006.229.14:29:38.66#ibcon#about to write, iclass 19, count 2 2006.229.14:29:38.66#ibcon#wrote, iclass 19, count 2 2006.229.14:29:38.66#ibcon#about to read 3, iclass 19, count 2 2006.229.14:29:38.68#ibcon#read 3, iclass 19, count 2 2006.229.14:29:38.68#ibcon#about to read 4, iclass 19, count 2 2006.229.14:29:38.68#ibcon#read 4, iclass 19, count 2 2006.229.14:29:38.68#ibcon#about to read 5, iclass 19, count 2 2006.229.14:29:38.68#ibcon#read 5, iclass 19, count 2 2006.229.14:29:38.68#ibcon#about to read 6, iclass 19, count 2 2006.229.14:29:38.68#ibcon#read 6, iclass 19, count 2 2006.229.14:29:38.68#ibcon#end of sib2, iclass 19, count 2 2006.229.14:29:38.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.14:29:38.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.14:29:38.68#ibcon#[27=AT03-04\r\n] 2006.229.14:29:38.68#ibcon#*before write, iclass 19, count 2 2006.229.14:29:38.68#ibcon#enter sib2, iclass 19, count 2 2006.229.14:29:38.68#ibcon#flushed, iclass 19, count 2 2006.229.14:29:38.68#ibcon#about to write, iclass 19, count 2 2006.229.14:29:38.68#ibcon#wrote, iclass 19, count 2 2006.229.14:29:38.68#ibcon#about to read 3, iclass 19, count 2 2006.229.14:29:38.71#ibcon#read 3, iclass 19, count 2 2006.229.14:29:38.71#ibcon#about to read 4, iclass 19, count 2 2006.229.14:29:38.71#ibcon#read 4, iclass 19, count 2 2006.229.14:29:38.71#ibcon#about to read 5, iclass 19, count 2 2006.229.14:29:38.71#ibcon#read 5, iclass 19, count 2 2006.229.14:29:38.71#ibcon#about to read 6, iclass 19, count 2 2006.229.14:29:38.71#ibcon#read 6, iclass 19, count 2 2006.229.14:29:38.71#ibcon#end of sib2, iclass 19, count 2 2006.229.14:29:38.71#ibcon#*after write, iclass 19, count 2 2006.229.14:29:38.71#ibcon#*before return 0, iclass 19, count 2 2006.229.14:29:38.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:38.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:29:38.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.14:29:38.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:38.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:38.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:38.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:38.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:29:38.83#ibcon#first serial, iclass 19, count 0 2006.229.14:29:38.83#ibcon#enter sib2, iclass 19, count 0 2006.229.14:29:38.83#ibcon#flushed, iclass 19, count 0 2006.229.14:29:38.83#ibcon#about to write, iclass 19, count 0 2006.229.14:29:38.83#ibcon#wrote, iclass 19, count 0 2006.229.14:29:38.83#ibcon#about to read 3, iclass 19, count 0 2006.229.14:29:38.85#ibcon#read 3, iclass 19, count 0 2006.229.14:29:38.85#ibcon#about to read 4, iclass 19, count 0 2006.229.14:29:38.85#ibcon#read 4, iclass 19, count 0 2006.229.14:29:38.85#ibcon#about to read 5, iclass 19, count 0 2006.229.14:29:38.85#ibcon#read 5, iclass 19, count 0 2006.229.14:29:38.85#ibcon#about to read 6, iclass 19, count 0 2006.229.14:29:38.85#ibcon#read 6, iclass 19, count 0 2006.229.14:29:38.85#ibcon#end of sib2, iclass 19, count 0 2006.229.14:29:38.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:29:38.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:29:38.85#ibcon#[27=USB\r\n] 2006.229.14:29:38.85#ibcon#*before write, iclass 19, count 0 2006.229.14:29:38.85#ibcon#enter sib2, iclass 19, count 0 2006.229.14:29:38.85#ibcon#flushed, iclass 19, count 0 2006.229.14:29:38.85#ibcon#about to write, iclass 19, count 0 2006.229.14:29:38.85#ibcon#wrote, iclass 19, count 0 2006.229.14:29:38.85#ibcon#about to read 3, iclass 19, count 0 2006.229.14:29:38.88#ibcon#read 3, iclass 19, count 0 2006.229.14:29:38.88#ibcon#about to read 4, iclass 19, count 0 2006.229.14:29:38.88#ibcon#read 4, iclass 19, count 0 2006.229.14:29:38.88#ibcon#about to read 5, iclass 19, count 0 2006.229.14:29:38.88#ibcon#read 5, iclass 19, count 0 2006.229.14:29:38.88#ibcon#about to read 6, iclass 19, count 0 2006.229.14:29:38.88#ibcon#read 6, iclass 19, count 0 2006.229.14:29:38.88#ibcon#end of sib2, iclass 19, count 0 2006.229.14:29:38.88#ibcon#*after write, iclass 19, count 0 2006.229.14:29:38.88#ibcon#*before return 0, iclass 19, count 0 2006.229.14:29:38.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:38.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:29:38.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:29:38.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:29:38.88$vck44/vblo=4,679.99 2006.229.14:29:38.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.14:29:38.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.14:29:38.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:38.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:38.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:38.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:38.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:29:38.88#ibcon#first serial, iclass 21, count 0 2006.229.14:29:38.88#ibcon#enter sib2, iclass 21, count 0 2006.229.14:29:38.88#ibcon#flushed, iclass 21, count 0 2006.229.14:29:38.88#ibcon#about to write, iclass 21, count 0 2006.229.14:29:38.88#ibcon#wrote, iclass 21, count 0 2006.229.14:29:38.88#ibcon#about to read 3, iclass 21, count 0 2006.229.14:29:38.90#ibcon#read 3, iclass 21, count 0 2006.229.14:29:38.90#ibcon#about to read 4, iclass 21, count 0 2006.229.14:29:38.90#ibcon#read 4, iclass 21, count 0 2006.229.14:29:38.90#ibcon#about to read 5, iclass 21, count 0 2006.229.14:29:38.90#ibcon#read 5, iclass 21, count 0 2006.229.14:29:38.90#ibcon#about to read 6, iclass 21, count 0 2006.229.14:29:38.90#ibcon#read 6, iclass 21, count 0 2006.229.14:29:38.90#ibcon#end of sib2, iclass 21, count 0 2006.229.14:29:38.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:29:38.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:29:38.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:29:38.90#ibcon#*before write, iclass 21, count 0 2006.229.14:29:38.90#ibcon#enter sib2, iclass 21, count 0 2006.229.14:29:38.90#ibcon#flushed, iclass 21, count 0 2006.229.14:29:38.90#ibcon#about to write, iclass 21, count 0 2006.229.14:29:38.90#ibcon#wrote, iclass 21, count 0 2006.229.14:29:38.90#ibcon#about to read 3, iclass 21, count 0 2006.229.14:29:38.94#ibcon#read 3, iclass 21, count 0 2006.229.14:29:38.94#ibcon#about to read 4, iclass 21, count 0 2006.229.14:29:38.94#ibcon#read 4, iclass 21, count 0 2006.229.14:29:38.94#ibcon#about to read 5, iclass 21, count 0 2006.229.14:29:38.94#ibcon#read 5, iclass 21, count 0 2006.229.14:29:38.94#ibcon#about to read 6, iclass 21, count 0 2006.229.14:29:38.94#ibcon#read 6, iclass 21, count 0 2006.229.14:29:38.94#ibcon#end of sib2, iclass 21, count 0 2006.229.14:29:38.94#ibcon#*after write, iclass 21, count 0 2006.229.14:29:38.94#ibcon#*before return 0, iclass 21, count 0 2006.229.14:29:38.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:38.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:29:38.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:29:38.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:29:38.94$vck44/vb=4,4 2006.229.14:29:38.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.14:29:38.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.14:29:38.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:38.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:39.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:39.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:39.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.14:29:39.00#ibcon#first serial, iclass 23, count 2 2006.229.14:29:39.00#ibcon#enter sib2, iclass 23, count 2 2006.229.14:29:39.00#ibcon#flushed, iclass 23, count 2 2006.229.14:29:39.00#ibcon#about to write, iclass 23, count 2 2006.229.14:29:39.00#ibcon#wrote, iclass 23, count 2 2006.229.14:29:39.00#ibcon#about to read 3, iclass 23, count 2 2006.229.14:29:39.02#ibcon#read 3, iclass 23, count 2 2006.229.14:29:39.02#ibcon#about to read 4, iclass 23, count 2 2006.229.14:29:39.02#ibcon#read 4, iclass 23, count 2 2006.229.14:29:39.02#ibcon#about to read 5, iclass 23, count 2 2006.229.14:29:39.02#ibcon#read 5, iclass 23, count 2 2006.229.14:29:39.02#ibcon#about to read 6, iclass 23, count 2 2006.229.14:29:39.02#ibcon#read 6, iclass 23, count 2 2006.229.14:29:39.02#ibcon#end of sib2, iclass 23, count 2 2006.229.14:29:39.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.14:29:39.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.14:29:39.02#ibcon#[27=AT04-04\r\n] 2006.229.14:29:39.02#ibcon#*before write, iclass 23, count 2 2006.229.14:29:39.02#ibcon#enter sib2, iclass 23, count 2 2006.229.14:29:39.02#ibcon#flushed, iclass 23, count 2 2006.229.14:29:39.02#ibcon#about to write, iclass 23, count 2 2006.229.14:29:39.02#ibcon#wrote, iclass 23, count 2 2006.229.14:29:39.02#ibcon#about to read 3, iclass 23, count 2 2006.229.14:29:39.05#ibcon#read 3, iclass 23, count 2 2006.229.14:29:39.05#ibcon#about to read 4, iclass 23, count 2 2006.229.14:29:39.05#ibcon#read 4, iclass 23, count 2 2006.229.14:29:39.05#ibcon#about to read 5, iclass 23, count 2 2006.229.14:29:39.05#ibcon#read 5, iclass 23, count 2 2006.229.14:29:39.05#ibcon#about to read 6, iclass 23, count 2 2006.229.14:29:39.05#ibcon#read 6, iclass 23, count 2 2006.229.14:29:39.05#ibcon#end of sib2, iclass 23, count 2 2006.229.14:29:39.05#ibcon#*after write, iclass 23, count 2 2006.229.14:29:39.05#ibcon#*before return 0, iclass 23, count 2 2006.229.14:29:39.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:39.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:29:39.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.14:29:39.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:39.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:39.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:39.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:39.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:29:39.17#ibcon#first serial, iclass 23, count 0 2006.229.14:29:39.17#ibcon#enter sib2, iclass 23, count 0 2006.229.14:29:39.17#ibcon#flushed, iclass 23, count 0 2006.229.14:29:39.17#ibcon#about to write, iclass 23, count 0 2006.229.14:29:39.17#ibcon#wrote, iclass 23, count 0 2006.229.14:29:39.17#ibcon#about to read 3, iclass 23, count 0 2006.229.14:29:39.19#ibcon#read 3, iclass 23, count 0 2006.229.14:29:39.19#ibcon#about to read 4, iclass 23, count 0 2006.229.14:29:39.19#ibcon#read 4, iclass 23, count 0 2006.229.14:29:39.19#ibcon#about to read 5, iclass 23, count 0 2006.229.14:29:39.19#ibcon#read 5, iclass 23, count 0 2006.229.14:29:39.19#ibcon#about to read 6, iclass 23, count 0 2006.229.14:29:39.19#ibcon#read 6, iclass 23, count 0 2006.229.14:29:39.19#ibcon#end of sib2, iclass 23, count 0 2006.229.14:29:39.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:29:39.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:29:39.19#ibcon#[27=USB\r\n] 2006.229.14:29:39.19#ibcon#*before write, iclass 23, count 0 2006.229.14:29:39.19#ibcon#enter sib2, iclass 23, count 0 2006.229.14:29:39.19#ibcon#flushed, iclass 23, count 0 2006.229.14:29:39.19#ibcon#about to write, iclass 23, count 0 2006.229.14:29:39.19#ibcon#wrote, iclass 23, count 0 2006.229.14:29:39.19#ibcon#about to read 3, iclass 23, count 0 2006.229.14:29:39.22#ibcon#read 3, iclass 23, count 0 2006.229.14:29:39.22#ibcon#about to read 4, iclass 23, count 0 2006.229.14:29:39.22#ibcon#read 4, iclass 23, count 0 2006.229.14:29:39.22#ibcon#about to read 5, iclass 23, count 0 2006.229.14:29:39.22#ibcon#read 5, iclass 23, count 0 2006.229.14:29:39.22#ibcon#about to read 6, iclass 23, count 0 2006.229.14:29:39.22#ibcon#read 6, iclass 23, count 0 2006.229.14:29:39.22#ibcon#end of sib2, iclass 23, count 0 2006.229.14:29:39.22#ibcon#*after write, iclass 23, count 0 2006.229.14:29:39.22#ibcon#*before return 0, iclass 23, count 0 2006.229.14:29:39.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:39.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:29:39.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:29:39.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:29:39.22$vck44/vblo=5,709.99 2006.229.14:29:39.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:29:39.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:29:39.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:39.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:39.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:39.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:39.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:29:39.22#ibcon#first serial, iclass 25, count 0 2006.229.14:29:39.22#ibcon#enter sib2, iclass 25, count 0 2006.229.14:29:39.22#ibcon#flushed, iclass 25, count 0 2006.229.14:29:39.22#ibcon#about to write, iclass 25, count 0 2006.229.14:29:39.22#ibcon#wrote, iclass 25, count 0 2006.229.14:29:39.22#ibcon#about to read 3, iclass 25, count 0 2006.229.14:29:39.24#ibcon#read 3, iclass 25, count 0 2006.229.14:29:39.24#ibcon#about to read 4, iclass 25, count 0 2006.229.14:29:39.24#ibcon#read 4, iclass 25, count 0 2006.229.14:29:39.24#ibcon#about to read 5, iclass 25, count 0 2006.229.14:29:39.24#ibcon#read 5, iclass 25, count 0 2006.229.14:29:39.24#ibcon#about to read 6, iclass 25, count 0 2006.229.14:29:39.24#ibcon#read 6, iclass 25, count 0 2006.229.14:29:39.24#ibcon#end of sib2, iclass 25, count 0 2006.229.14:29:39.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:29:39.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:29:39.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:29:39.24#ibcon#*before write, iclass 25, count 0 2006.229.14:29:39.24#ibcon#enter sib2, iclass 25, count 0 2006.229.14:29:39.24#ibcon#flushed, iclass 25, count 0 2006.229.14:29:39.24#ibcon#about to write, iclass 25, count 0 2006.229.14:29:39.24#ibcon#wrote, iclass 25, count 0 2006.229.14:29:39.24#ibcon#about to read 3, iclass 25, count 0 2006.229.14:29:39.28#ibcon#read 3, iclass 25, count 0 2006.229.14:29:39.28#ibcon#about to read 4, iclass 25, count 0 2006.229.14:29:39.28#ibcon#read 4, iclass 25, count 0 2006.229.14:29:39.28#ibcon#about to read 5, iclass 25, count 0 2006.229.14:29:39.28#ibcon#read 5, iclass 25, count 0 2006.229.14:29:39.28#ibcon#about to read 6, iclass 25, count 0 2006.229.14:29:39.28#ibcon#read 6, iclass 25, count 0 2006.229.14:29:39.28#ibcon#end of sib2, iclass 25, count 0 2006.229.14:29:39.28#ibcon#*after write, iclass 25, count 0 2006.229.14:29:39.28#ibcon#*before return 0, iclass 25, count 0 2006.229.14:29:39.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:39.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:29:39.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:29:39.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:29:39.28$vck44/vb=5,4 2006.229.14:29:39.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.14:29:39.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.14:29:39.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:39.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:39.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:39.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:39.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.14:29:39.34#ibcon#first serial, iclass 27, count 2 2006.229.14:29:39.34#ibcon#enter sib2, iclass 27, count 2 2006.229.14:29:39.34#ibcon#flushed, iclass 27, count 2 2006.229.14:29:39.34#ibcon#about to write, iclass 27, count 2 2006.229.14:29:39.34#ibcon#wrote, iclass 27, count 2 2006.229.14:29:39.34#ibcon#about to read 3, iclass 27, count 2 2006.229.14:29:39.36#ibcon#read 3, iclass 27, count 2 2006.229.14:29:39.36#ibcon#about to read 4, iclass 27, count 2 2006.229.14:29:39.36#ibcon#read 4, iclass 27, count 2 2006.229.14:29:39.36#ibcon#about to read 5, iclass 27, count 2 2006.229.14:29:39.36#ibcon#read 5, iclass 27, count 2 2006.229.14:29:39.36#ibcon#about to read 6, iclass 27, count 2 2006.229.14:29:39.36#ibcon#read 6, iclass 27, count 2 2006.229.14:29:39.36#ibcon#end of sib2, iclass 27, count 2 2006.229.14:29:39.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.14:29:39.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.14:29:39.36#ibcon#[27=AT05-04\r\n] 2006.229.14:29:39.36#ibcon#*before write, iclass 27, count 2 2006.229.14:29:39.36#ibcon#enter sib2, iclass 27, count 2 2006.229.14:29:39.36#ibcon#flushed, iclass 27, count 2 2006.229.14:29:39.36#ibcon#about to write, iclass 27, count 2 2006.229.14:29:39.36#ibcon#wrote, iclass 27, count 2 2006.229.14:29:39.36#ibcon#about to read 3, iclass 27, count 2 2006.229.14:29:39.39#ibcon#read 3, iclass 27, count 2 2006.229.14:29:39.39#ibcon#about to read 4, iclass 27, count 2 2006.229.14:29:39.39#ibcon#read 4, iclass 27, count 2 2006.229.14:29:39.39#ibcon#about to read 5, iclass 27, count 2 2006.229.14:29:39.39#ibcon#read 5, iclass 27, count 2 2006.229.14:29:39.39#ibcon#about to read 6, iclass 27, count 2 2006.229.14:29:39.39#ibcon#read 6, iclass 27, count 2 2006.229.14:29:39.39#ibcon#end of sib2, iclass 27, count 2 2006.229.14:29:39.39#ibcon#*after write, iclass 27, count 2 2006.229.14:29:39.39#ibcon#*before return 0, iclass 27, count 2 2006.229.14:29:39.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:39.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:29:39.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.14:29:39.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:39.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:39.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:39.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:39.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:29:39.51#ibcon#first serial, iclass 27, count 0 2006.229.14:29:39.51#ibcon#enter sib2, iclass 27, count 0 2006.229.14:29:39.51#ibcon#flushed, iclass 27, count 0 2006.229.14:29:39.51#ibcon#about to write, iclass 27, count 0 2006.229.14:29:39.51#ibcon#wrote, iclass 27, count 0 2006.229.14:29:39.51#ibcon#about to read 3, iclass 27, count 0 2006.229.14:29:39.53#ibcon#read 3, iclass 27, count 0 2006.229.14:29:39.53#ibcon#about to read 4, iclass 27, count 0 2006.229.14:29:39.53#ibcon#read 4, iclass 27, count 0 2006.229.14:29:39.53#ibcon#about to read 5, iclass 27, count 0 2006.229.14:29:39.53#ibcon#read 5, iclass 27, count 0 2006.229.14:29:39.53#ibcon#about to read 6, iclass 27, count 0 2006.229.14:29:39.53#ibcon#read 6, iclass 27, count 0 2006.229.14:29:39.53#ibcon#end of sib2, iclass 27, count 0 2006.229.14:29:39.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:29:39.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:29:39.53#ibcon#[27=USB\r\n] 2006.229.14:29:39.53#ibcon#*before write, iclass 27, count 0 2006.229.14:29:39.53#ibcon#enter sib2, iclass 27, count 0 2006.229.14:29:39.53#ibcon#flushed, iclass 27, count 0 2006.229.14:29:39.53#ibcon#about to write, iclass 27, count 0 2006.229.14:29:39.53#ibcon#wrote, iclass 27, count 0 2006.229.14:29:39.53#ibcon#about to read 3, iclass 27, count 0 2006.229.14:29:39.56#ibcon#read 3, iclass 27, count 0 2006.229.14:29:39.56#ibcon#about to read 4, iclass 27, count 0 2006.229.14:29:39.56#ibcon#read 4, iclass 27, count 0 2006.229.14:29:39.56#ibcon#about to read 5, iclass 27, count 0 2006.229.14:29:39.56#ibcon#read 5, iclass 27, count 0 2006.229.14:29:39.56#ibcon#about to read 6, iclass 27, count 0 2006.229.14:29:39.56#ibcon#read 6, iclass 27, count 0 2006.229.14:29:39.56#ibcon#end of sib2, iclass 27, count 0 2006.229.14:29:39.56#ibcon#*after write, iclass 27, count 0 2006.229.14:29:39.56#ibcon#*before return 0, iclass 27, count 0 2006.229.14:29:39.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:39.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:29:39.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:29:39.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:29:39.56$vck44/vblo=6,719.99 2006.229.14:29:39.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:29:39.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:29:39.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:39.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:39.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:39.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:39.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:29:39.56#ibcon#first serial, iclass 29, count 0 2006.229.14:29:39.56#ibcon#enter sib2, iclass 29, count 0 2006.229.14:29:39.56#ibcon#flushed, iclass 29, count 0 2006.229.14:29:39.56#ibcon#about to write, iclass 29, count 0 2006.229.14:29:39.56#ibcon#wrote, iclass 29, count 0 2006.229.14:29:39.56#ibcon#about to read 3, iclass 29, count 0 2006.229.14:29:39.58#ibcon#read 3, iclass 29, count 0 2006.229.14:29:39.58#ibcon#about to read 4, iclass 29, count 0 2006.229.14:29:39.58#ibcon#read 4, iclass 29, count 0 2006.229.14:29:39.58#ibcon#about to read 5, iclass 29, count 0 2006.229.14:29:39.58#ibcon#read 5, iclass 29, count 0 2006.229.14:29:39.58#ibcon#about to read 6, iclass 29, count 0 2006.229.14:29:39.58#ibcon#read 6, iclass 29, count 0 2006.229.14:29:39.58#ibcon#end of sib2, iclass 29, count 0 2006.229.14:29:39.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:29:39.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:29:39.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:29:39.58#ibcon#*before write, iclass 29, count 0 2006.229.14:29:39.58#ibcon#enter sib2, iclass 29, count 0 2006.229.14:29:39.58#ibcon#flushed, iclass 29, count 0 2006.229.14:29:39.58#ibcon#about to write, iclass 29, count 0 2006.229.14:29:39.58#ibcon#wrote, iclass 29, count 0 2006.229.14:29:39.58#ibcon#about to read 3, iclass 29, count 0 2006.229.14:29:39.62#ibcon#read 3, iclass 29, count 0 2006.229.14:29:39.62#ibcon#about to read 4, iclass 29, count 0 2006.229.14:29:39.62#ibcon#read 4, iclass 29, count 0 2006.229.14:29:39.62#ibcon#about to read 5, iclass 29, count 0 2006.229.14:29:39.62#ibcon#read 5, iclass 29, count 0 2006.229.14:29:39.62#ibcon#about to read 6, iclass 29, count 0 2006.229.14:29:39.62#ibcon#read 6, iclass 29, count 0 2006.229.14:29:39.62#ibcon#end of sib2, iclass 29, count 0 2006.229.14:29:39.62#ibcon#*after write, iclass 29, count 0 2006.229.14:29:39.62#ibcon#*before return 0, iclass 29, count 0 2006.229.14:29:39.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:39.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:29:39.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:29:39.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:29:39.62$vck44/vb=6,4 2006.229.14:29:39.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.14:29:39.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.14:29:39.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:39.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:39.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:39.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:39.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.14:29:39.68#ibcon#first serial, iclass 31, count 2 2006.229.14:29:39.68#ibcon#enter sib2, iclass 31, count 2 2006.229.14:29:39.68#ibcon#flushed, iclass 31, count 2 2006.229.14:29:39.68#ibcon#about to write, iclass 31, count 2 2006.229.14:29:39.68#ibcon#wrote, iclass 31, count 2 2006.229.14:29:39.68#ibcon#about to read 3, iclass 31, count 2 2006.229.14:29:39.70#ibcon#read 3, iclass 31, count 2 2006.229.14:29:39.70#ibcon#about to read 4, iclass 31, count 2 2006.229.14:29:39.70#ibcon#read 4, iclass 31, count 2 2006.229.14:29:39.70#ibcon#about to read 5, iclass 31, count 2 2006.229.14:29:39.70#ibcon#read 5, iclass 31, count 2 2006.229.14:29:39.70#ibcon#about to read 6, iclass 31, count 2 2006.229.14:29:39.70#ibcon#read 6, iclass 31, count 2 2006.229.14:29:39.70#ibcon#end of sib2, iclass 31, count 2 2006.229.14:29:39.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.14:29:39.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.14:29:39.70#ibcon#[27=AT06-04\r\n] 2006.229.14:29:39.70#ibcon#*before write, iclass 31, count 2 2006.229.14:29:39.70#ibcon#enter sib2, iclass 31, count 2 2006.229.14:29:39.70#ibcon#flushed, iclass 31, count 2 2006.229.14:29:39.70#ibcon#about to write, iclass 31, count 2 2006.229.14:29:39.70#ibcon#wrote, iclass 31, count 2 2006.229.14:29:39.70#ibcon#about to read 3, iclass 31, count 2 2006.229.14:29:39.73#ibcon#read 3, iclass 31, count 2 2006.229.14:29:39.73#ibcon#about to read 4, iclass 31, count 2 2006.229.14:29:39.73#ibcon#read 4, iclass 31, count 2 2006.229.14:29:39.73#ibcon#about to read 5, iclass 31, count 2 2006.229.14:29:39.73#ibcon#read 5, iclass 31, count 2 2006.229.14:29:39.73#ibcon#about to read 6, iclass 31, count 2 2006.229.14:29:39.73#ibcon#read 6, iclass 31, count 2 2006.229.14:29:39.73#ibcon#end of sib2, iclass 31, count 2 2006.229.14:29:39.73#ibcon#*after write, iclass 31, count 2 2006.229.14:29:39.73#ibcon#*before return 0, iclass 31, count 2 2006.229.14:29:39.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:39.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:29:39.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.14:29:39.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:39.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:39.75#abcon#<5=/06 1.4 2.3 27.441001002.1\r\n> 2006.229.14:29:39.77#abcon#{5=INTERFACE CLEAR} 2006.229.14:29:39.83#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:29:39.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:39.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:39.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:29:39.85#ibcon#first serial, iclass 31, count 0 2006.229.14:29:39.85#ibcon#enter sib2, iclass 31, count 0 2006.229.14:29:39.85#ibcon#flushed, iclass 31, count 0 2006.229.14:29:39.85#ibcon#about to write, iclass 31, count 0 2006.229.14:29:39.85#ibcon#wrote, iclass 31, count 0 2006.229.14:29:39.85#ibcon#about to read 3, iclass 31, count 0 2006.229.14:29:39.87#ibcon#read 3, iclass 31, count 0 2006.229.14:29:39.87#ibcon#about to read 4, iclass 31, count 0 2006.229.14:29:39.87#ibcon#read 4, iclass 31, count 0 2006.229.14:29:39.87#ibcon#about to read 5, iclass 31, count 0 2006.229.14:29:39.87#ibcon#read 5, iclass 31, count 0 2006.229.14:29:39.87#ibcon#about to read 6, iclass 31, count 0 2006.229.14:29:39.87#ibcon#read 6, iclass 31, count 0 2006.229.14:29:39.87#ibcon#end of sib2, iclass 31, count 0 2006.229.14:29:39.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:29:39.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:29:39.87#ibcon#[27=USB\r\n] 2006.229.14:29:39.87#ibcon#*before write, iclass 31, count 0 2006.229.14:29:39.87#ibcon#enter sib2, iclass 31, count 0 2006.229.14:29:39.87#ibcon#flushed, iclass 31, count 0 2006.229.14:29:39.87#ibcon#about to write, iclass 31, count 0 2006.229.14:29:39.87#ibcon#wrote, iclass 31, count 0 2006.229.14:29:39.87#ibcon#about to read 3, iclass 31, count 0 2006.229.14:29:39.90#ibcon#read 3, iclass 31, count 0 2006.229.14:29:39.90#ibcon#about to read 4, iclass 31, count 0 2006.229.14:29:39.90#ibcon#read 4, iclass 31, count 0 2006.229.14:29:39.90#ibcon#about to read 5, iclass 31, count 0 2006.229.14:29:39.90#ibcon#read 5, iclass 31, count 0 2006.229.14:29:39.90#ibcon#about to read 6, iclass 31, count 0 2006.229.14:29:39.90#ibcon#read 6, iclass 31, count 0 2006.229.14:29:39.90#ibcon#end of sib2, iclass 31, count 0 2006.229.14:29:39.90#ibcon#*after write, iclass 31, count 0 2006.229.14:29:39.90#ibcon#*before return 0, iclass 31, count 0 2006.229.14:29:39.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:39.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:29:39.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:29:39.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:29:39.90$vck44/vblo=7,734.99 2006.229.14:29:39.90#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:29:39.90#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:29:39.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:39.90#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:39.90#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:39.90#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:39.90#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:29:39.90#ibcon#first serial, iclass 37, count 0 2006.229.14:29:39.90#ibcon#enter sib2, iclass 37, count 0 2006.229.14:29:39.90#ibcon#flushed, iclass 37, count 0 2006.229.14:29:39.90#ibcon#about to write, iclass 37, count 0 2006.229.14:29:39.90#ibcon#wrote, iclass 37, count 0 2006.229.14:29:39.90#ibcon#about to read 3, iclass 37, count 0 2006.229.14:29:39.92#ibcon#read 3, iclass 37, count 0 2006.229.14:29:39.92#ibcon#about to read 4, iclass 37, count 0 2006.229.14:29:39.92#ibcon#read 4, iclass 37, count 0 2006.229.14:29:39.92#ibcon#about to read 5, iclass 37, count 0 2006.229.14:29:39.92#ibcon#read 5, iclass 37, count 0 2006.229.14:29:39.92#ibcon#about to read 6, iclass 37, count 0 2006.229.14:29:39.92#ibcon#read 6, iclass 37, count 0 2006.229.14:29:39.92#ibcon#end of sib2, iclass 37, count 0 2006.229.14:29:39.92#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:29:39.92#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:29:39.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:29:39.92#ibcon#*before write, iclass 37, count 0 2006.229.14:29:39.92#ibcon#enter sib2, iclass 37, count 0 2006.229.14:29:39.92#ibcon#flushed, iclass 37, count 0 2006.229.14:29:39.92#ibcon#about to write, iclass 37, count 0 2006.229.14:29:39.92#ibcon#wrote, iclass 37, count 0 2006.229.14:29:39.92#ibcon#about to read 3, iclass 37, count 0 2006.229.14:29:39.96#ibcon#read 3, iclass 37, count 0 2006.229.14:29:39.96#ibcon#about to read 4, iclass 37, count 0 2006.229.14:29:39.96#ibcon#read 4, iclass 37, count 0 2006.229.14:29:39.96#ibcon#about to read 5, iclass 37, count 0 2006.229.14:29:39.96#ibcon#read 5, iclass 37, count 0 2006.229.14:29:39.96#ibcon#about to read 6, iclass 37, count 0 2006.229.14:29:39.96#ibcon#read 6, iclass 37, count 0 2006.229.14:29:39.96#ibcon#end of sib2, iclass 37, count 0 2006.229.14:29:39.96#ibcon#*after write, iclass 37, count 0 2006.229.14:29:39.96#ibcon#*before return 0, iclass 37, count 0 2006.229.14:29:39.96#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:39.96#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:29:39.96#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:29:39.96#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:29:39.96$vck44/vb=7,4 2006.229.14:29:39.96#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.14:29:39.96#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.14:29:39.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:39.96#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:40.02#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:40.02#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:40.02#ibcon#enter wrdev, iclass 39, count 2 2006.229.14:29:40.02#ibcon#first serial, iclass 39, count 2 2006.229.14:29:40.02#ibcon#enter sib2, iclass 39, count 2 2006.229.14:29:40.02#ibcon#flushed, iclass 39, count 2 2006.229.14:29:40.02#ibcon#about to write, iclass 39, count 2 2006.229.14:29:40.02#ibcon#wrote, iclass 39, count 2 2006.229.14:29:40.02#ibcon#about to read 3, iclass 39, count 2 2006.229.14:29:40.04#ibcon#read 3, iclass 39, count 2 2006.229.14:29:40.04#ibcon#about to read 4, iclass 39, count 2 2006.229.14:29:40.04#ibcon#read 4, iclass 39, count 2 2006.229.14:29:40.04#ibcon#about to read 5, iclass 39, count 2 2006.229.14:29:40.04#ibcon#read 5, iclass 39, count 2 2006.229.14:29:40.04#ibcon#about to read 6, iclass 39, count 2 2006.229.14:29:40.04#ibcon#read 6, iclass 39, count 2 2006.229.14:29:40.04#ibcon#end of sib2, iclass 39, count 2 2006.229.14:29:40.04#ibcon#*mode == 0, iclass 39, count 2 2006.229.14:29:40.04#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.14:29:40.04#ibcon#[27=AT07-04\r\n] 2006.229.14:29:40.04#ibcon#*before write, iclass 39, count 2 2006.229.14:29:40.04#ibcon#enter sib2, iclass 39, count 2 2006.229.14:29:40.04#ibcon#flushed, iclass 39, count 2 2006.229.14:29:40.04#ibcon#about to write, iclass 39, count 2 2006.229.14:29:40.04#ibcon#wrote, iclass 39, count 2 2006.229.14:29:40.04#ibcon#about to read 3, iclass 39, count 2 2006.229.14:29:40.07#ibcon#read 3, iclass 39, count 2 2006.229.14:29:40.07#ibcon#about to read 4, iclass 39, count 2 2006.229.14:29:40.07#ibcon#read 4, iclass 39, count 2 2006.229.14:29:40.07#ibcon#about to read 5, iclass 39, count 2 2006.229.14:29:40.07#ibcon#read 5, iclass 39, count 2 2006.229.14:29:40.07#ibcon#about to read 6, iclass 39, count 2 2006.229.14:29:40.07#ibcon#read 6, iclass 39, count 2 2006.229.14:29:40.07#ibcon#end of sib2, iclass 39, count 2 2006.229.14:29:40.07#ibcon#*after write, iclass 39, count 2 2006.229.14:29:40.07#ibcon#*before return 0, iclass 39, count 2 2006.229.14:29:40.07#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:40.07#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:29:40.07#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.14:29:40.07#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:40.07#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:40.19#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:40.19#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:40.19#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:29:40.19#ibcon#first serial, iclass 39, count 0 2006.229.14:29:40.19#ibcon#enter sib2, iclass 39, count 0 2006.229.14:29:40.19#ibcon#flushed, iclass 39, count 0 2006.229.14:29:40.19#ibcon#about to write, iclass 39, count 0 2006.229.14:29:40.19#ibcon#wrote, iclass 39, count 0 2006.229.14:29:40.19#ibcon#about to read 3, iclass 39, count 0 2006.229.14:29:40.21#ibcon#read 3, iclass 39, count 0 2006.229.14:29:40.21#ibcon#about to read 4, iclass 39, count 0 2006.229.14:29:40.21#ibcon#read 4, iclass 39, count 0 2006.229.14:29:40.21#ibcon#about to read 5, iclass 39, count 0 2006.229.14:29:40.21#ibcon#read 5, iclass 39, count 0 2006.229.14:29:40.21#ibcon#about to read 6, iclass 39, count 0 2006.229.14:29:40.21#ibcon#read 6, iclass 39, count 0 2006.229.14:29:40.21#ibcon#end of sib2, iclass 39, count 0 2006.229.14:29:40.21#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:29:40.21#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:29:40.21#ibcon#[27=USB\r\n] 2006.229.14:29:40.21#ibcon#*before write, iclass 39, count 0 2006.229.14:29:40.21#ibcon#enter sib2, iclass 39, count 0 2006.229.14:29:40.21#ibcon#flushed, iclass 39, count 0 2006.229.14:29:40.21#ibcon#about to write, iclass 39, count 0 2006.229.14:29:40.21#ibcon#wrote, iclass 39, count 0 2006.229.14:29:40.21#ibcon#about to read 3, iclass 39, count 0 2006.229.14:29:40.24#ibcon#read 3, iclass 39, count 0 2006.229.14:29:40.24#ibcon#about to read 4, iclass 39, count 0 2006.229.14:29:40.24#ibcon#read 4, iclass 39, count 0 2006.229.14:29:40.24#ibcon#about to read 5, iclass 39, count 0 2006.229.14:29:40.24#ibcon#read 5, iclass 39, count 0 2006.229.14:29:40.24#ibcon#about to read 6, iclass 39, count 0 2006.229.14:29:40.24#ibcon#read 6, iclass 39, count 0 2006.229.14:29:40.24#ibcon#end of sib2, iclass 39, count 0 2006.229.14:29:40.24#ibcon#*after write, iclass 39, count 0 2006.229.14:29:40.24#ibcon#*before return 0, iclass 39, count 0 2006.229.14:29:40.24#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:40.24#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:29:40.24#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:29:40.24#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:29:40.24$vck44/vblo=8,744.99 2006.229.14:29:40.24#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.14:29:40.24#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.14:29:40.24#ibcon#ireg 17 cls_cnt 0 2006.229.14:29:40.24#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:40.24#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:40.24#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:40.24#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:29:40.24#ibcon#first serial, iclass 3, count 0 2006.229.14:29:40.24#ibcon#enter sib2, iclass 3, count 0 2006.229.14:29:40.24#ibcon#flushed, iclass 3, count 0 2006.229.14:29:40.24#ibcon#about to write, iclass 3, count 0 2006.229.14:29:40.24#ibcon#wrote, iclass 3, count 0 2006.229.14:29:40.24#ibcon#about to read 3, iclass 3, count 0 2006.229.14:29:40.26#ibcon#read 3, iclass 3, count 0 2006.229.14:29:40.26#ibcon#about to read 4, iclass 3, count 0 2006.229.14:29:40.26#ibcon#read 4, iclass 3, count 0 2006.229.14:29:40.26#ibcon#about to read 5, iclass 3, count 0 2006.229.14:29:40.26#ibcon#read 5, iclass 3, count 0 2006.229.14:29:40.26#ibcon#about to read 6, iclass 3, count 0 2006.229.14:29:40.26#ibcon#read 6, iclass 3, count 0 2006.229.14:29:40.26#ibcon#end of sib2, iclass 3, count 0 2006.229.14:29:40.26#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:29:40.26#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:29:40.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:29:40.26#ibcon#*before write, iclass 3, count 0 2006.229.14:29:40.26#ibcon#enter sib2, iclass 3, count 0 2006.229.14:29:40.26#ibcon#flushed, iclass 3, count 0 2006.229.14:29:40.26#ibcon#about to write, iclass 3, count 0 2006.229.14:29:40.26#ibcon#wrote, iclass 3, count 0 2006.229.14:29:40.26#ibcon#about to read 3, iclass 3, count 0 2006.229.14:29:40.30#ibcon#read 3, iclass 3, count 0 2006.229.14:29:40.30#ibcon#about to read 4, iclass 3, count 0 2006.229.14:29:40.30#ibcon#read 4, iclass 3, count 0 2006.229.14:29:40.30#ibcon#about to read 5, iclass 3, count 0 2006.229.14:29:40.30#ibcon#read 5, iclass 3, count 0 2006.229.14:29:40.30#ibcon#about to read 6, iclass 3, count 0 2006.229.14:29:40.30#ibcon#read 6, iclass 3, count 0 2006.229.14:29:40.30#ibcon#end of sib2, iclass 3, count 0 2006.229.14:29:40.30#ibcon#*after write, iclass 3, count 0 2006.229.14:29:40.30#ibcon#*before return 0, iclass 3, count 0 2006.229.14:29:40.30#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:40.30#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:29:40.30#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:29:40.30#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:29:40.30$vck44/vb=8,4 2006.229.14:29:40.30#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.14:29:40.30#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.14:29:40.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:29:40.30#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:40.36#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:40.36#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:40.36#ibcon#enter wrdev, iclass 5, count 2 2006.229.14:29:40.36#ibcon#first serial, iclass 5, count 2 2006.229.14:29:40.36#ibcon#enter sib2, iclass 5, count 2 2006.229.14:29:40.36#ibcon#flushed, iclass 5, count 2 2006.229.14:29:40.36#ibcon#about to write, iclass 5, count 2 2006.229.14:29:40.36#ibcon#wrote, iclass 5, count 2 2006.229.14:29:40.36#ibcon#about to read 3, iclass 5, count 2 2006.229.14:29:40.38#ibcon#read 3, iclass 5, count 2 2006.229.14:29:40.38#ibcon#about to read 4, iclass 5, count 2 2006.229.14:29:40.38#ibcon#read 4, iclass 5, count 2 2006.229.14:29:40.38#ibcon#about to read 5, iclass 5, count 2 2006.229.14:29:40.38#ibcon#read 5, iclass 5, count 2 2006.229.14:29:40.38#ibcon#about to read 6, iclass 5, count 2 2006.229.14:29:40.38#ibcon#read 6, iclass 5, count 2 2006.229.14:29:40.38#ibcon#end of sib2, iclass 5, count 2 2006.229.14:29:40.38#ibcon#*mode == 0, iclass 5, count 2 2006.229.14:29:40.38#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.14:29:40.38#ibcon#[27=AT08-04\r\n] 2006.229.14:29:40.38#ibcon#*before write, iclass 5, count 2 2006.229.14:29:40.38#ibcon#enter sib2, iclass 5, count 2 2006.229.14:29:40.38#ibcon#flushed, iclass 5, count 2 2006.229.14:29:40.38#ibcon#about to write, iclass 5, count 2 2006.229.14:29:40.38#ibcon#wrote, iclass 5, count 2 2006.229.14:29:40.38#ibcon#about to read 3, iclass 5, count 2 2006.229.14:29:40.41#ibcon#read 3, iclass 5, count 2 2006.229.14:29:40.41#ibcon#about to read 4, iclass 5, count 2 2006.229.14:29:40.41#ibcon#read 4, iclass 5, count 2 2006.229.14:29:40.41#ibcon#about to read 5, iclass 5, count 2 2006.229.14:29:40.41#ibcon#read 5, iclass 5, count 2 2006.229.14:29:40.41#ibcon#about to read 6, iclass 5, count 2 2006.229.14:29:40.41#ibcon#read 6, iclass 5, count 2 2006.229.14:29:40.41#ibcon#end of sib2, iclass 5, count 2 2006.229.14:29:40.41#ibcon#*after write, iclass 5, count 2 2006.229.14:29:40.41#ibcon#*before return 0, iclass 5, count 2 2006.229.14:29:40.41#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:40.41#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:29:40.41#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.14:29:40.41#ibcon#ireg 7 cls_cnt 0 2006.229.14:29:40.41#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:40.53#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:40.53#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:40.53#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:29:40.53#ibcon#first serial, iclass 5, count 0 2006.229.14:29:40.53#ibcon#enter sib2, iclass 5, count 0 2006.229.14:29:40.53#ibcon#flushed, iclass 5, count 0 2006.229.14:29:40.53#ibcon#about to write, iclass 5, count 0 2006.229.14:29:40.53#ibcon#wrote, iclass 5, count 0 2006.229.14:29:40.53#ibcon#about to read 3, iclass 5, count 0 2006.229.14:29:40.55#ibcon#read 3, iclass 5, count 0 2006.229.14:29:40.55#ibcon#about to read 4, iclass 5, count 0 2006.229.14:29:40.55#ibcon#read 4, iclass 5, count 0 2006.229.14:29:40.55#ibcon#about to read 5, iclass 5, count 0 2006.229.14:29:40.55#ibcon#read 5, iclass 5, count 0 2006.229.14:29:40.55#ibcon#about to read 6, iclass 5, count 0 2006.229.14:29:40.55#ibcon#read 6, iclass 5, count 0 2006.229.14:29:40.55#ibcon#end of sib2, iclass 5, count 0 2006.229.14:29:40.55#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:29:40.55#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:29:40.55#ibcon#[27=USB\r\n] 2006.229.14:29:40.55#ibcon#*before write, iclass 5, count 0 2006.229.14:29:40.55#ibcon#enter sib2, iclass 5, count 0 2006.229.14:29:40.55#ibcon#flushed, iclass 5, count 0 2006.229.14:29:40.55#ibcon#about to write, iclass 5, count 0 2006.229.14:29:40.55#ibcon#wrote, iclass 5, count 0 2006.229.14:29:40.55#ibcon#about to read 3, iclass 5, count 0 2006.229.14:29:40.58#ibcon#read 3, iclass 5, count 0 2006.229.14:29:40.58#ibcon#about to read 4, iclass 5, count 0 2006.229.14:29:40.58#ibcon#read 4, iclass 5, count 0 2006.229.14:29:40.58#ibcon#about to read 5, iclass 5, count 0 2006.229.14:29:40.58#ibcon#read 5, iclass 5, count 0 2006.229.14:29:40.58#ibcon#about to read 6, iclass 5, count 0 2006.229.14:29:40.58#ibcon#read 6, iclass 5, count 0 2006.229.14:29:40.58#ibcon#end of sib2, iclass 5, count 0 2006.229.14:29:40.58#ibcon#*after write, iclass 5, count 0 2006.229.14:29:40.58#ibcon#*before return 0, iclass 5, count 0 2006.229.14:29:40.58#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:40.58#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:29:40.58#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:29:40.58#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:29:40.58$vck44/vabw=wide 2006.229.14:29:40.58#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.14:29:40.58#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.14:29:40.58#ibcon#ireg 8 cls_cnt 0 2006.229.14:29:40.58#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:40.58#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:40.58#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:40.58#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:29:40.58#ibcon#first serial, iclass 7, count 0 2006.229.14:29:40.58#ibcon#enter sib2, iclass 7, count 0 2006.229.14:29:40.58#ibcon#flushed, iclass 7, count 0 2006.229.14:29:40.58#ibcon#about to write, iclass 7, count 0 2006.229.14:29:40.58#ibcon#wrote, iclass 7, count 0 2006.229.14:29:40.58#ibcon#about to read 3, iclass 7, count 0 2006.229.14:29:40.60#ibcon#read 3, iclass 7, count 0 2006.229.14:29:40.60#ibcon#about to read 4, iclass 7, count 0 2006.229.14:29:40.60#ibcon#read 4, iclass 7, count 0 2006.229.14:29:40.60#ibcon#about to read 5, iclass 7, count 0 2006.229.14:29:40.60#ibcon#read 5, iclass 7, count 0 2006.229.14:29:40.60#ibcon#about to read 6, iclass 7, count 0 2006.229.14:29:40.60#ibcon#read 6, iclass 7, count 0 2006.229.14:29:40.60#ibcon#end of sib2, iclass 7, count 0 2006.229.14:29:40.60#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:29:40.60#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:29:40.60#ibcon#[25=BW32\r\n] 2006.229.14:29:40.60#ibcon#*before write, iclass 7, count 0 2006.229.14:29:40.60#ibcon#enter sib2, iclass 7, count 0 2006.229.14:29:40.60#ibcon#flushed, iclass 7, count 0 2006.229.14:29:40.60#ibcon#about to write, iclass 7, count 0 2006.229.14:29:40.60#ibcon#wrote, iclass 7, count 0 2006.229.14:29:40.60#ibcon#about to read 3, iclass 7, count 0 2006.229.14:29:40.63#ibcon#read 3, iclass 7, count 0 2006.229.14:29:40.63#ibcon#about to read 4, iclass 7, count 0 2006.229.14:29:40.63#ibcon#read 4, iclass 7, count 0 2006.229.14:29:40.63#ibcon#about to read 5, iclass 7, count 0 2006.229.14:29:40.63#ibcon#read 5, iclass 7, count 0 2006.229.14:29:40.63#ibcon#about to read 6, iclass 7, count 0 2006.229.14:29:40.63#ibcon#read 6, iclass 7, count 0 2006.229.14:29:40.63#ibcon#end of sib2, iclass 7, count 0 2006.229.14:29:40.63#ibcon#*after write, iclass 7, count 0 2006.229.14:29:40.63#ibcon#*before return 0, iclass 7, count 0 2006.229.14:29:40.63#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:40.63#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:29:40.63#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:29:40.63#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:29:40.63$vck44/vbbw=wide 2006.229.14:29:40.63#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.14:29:40.63#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.14:29:40.63#ibcon#ireg 8 cls_cnt 0 2006.229.14:29:40.63#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:29:40.70#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:29:40.70#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:29:40.70#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:29:40.70#ibcon#first serial, iclass 11, count 0 2006.229.14:29:40.70#ibcon#enter sib2, iclass 11, count 0 2006.229.14:29:40.70#ibcon#flushed, iclass 11, count 0 2006.229.14:29:40.70#ibcon#about to write, iclass 11, count 0 2006.229.14:29:40.70#ibcon#wrote, iclass 11, count 0 2006.229.14:29:40.70#ibcon#about to read 3, iclass 11, count 0 2006.229.14:29:40.72#ibcon#read 3, iclass 11, count 0 2006.229.14:29:40.72#ibcon#about to read 4, iclass 11, count 0 2006.229.14:29:40.72#ibcon#read 4, iclass 11, count 0 2006.229.14:29:40.72#ibcon#about to read 5, iclass 11, count 0 2006.229.14:29:40.72#ibcon#read 5, iclass 11, count 0 2006.229.14:29:40.72#ibcon#about to read 6, iclass 11, count 0 2006.229.14:29:40.72#ibcon#read 6, iclass 11, count 0 2006.229.14:29:40.72#ibcon#end of sib2, iclass 11, count 0 2006.229.14:29:40.72#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:29:40.72#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:29:40.72#ibcon#[27=BW32\r\n] 2006.229.14:29:40.72#ibcon#*before write, iclass 11, count 0 2006.229.14:29:40.72#ibcon#enter sib2, iclass 11, count 0 2006.229.14:29:40.72#ibcon#flushed, iclass 11, count 0 2006.229.14:29:40.72#ibcon#about to write, iclass 11, count 0 2006.229.14:29:40.72#ibcon#wrote, iclass 11, count 0 2006.229.14:29:40.72#ibcon#about to read 3, iclass 11, count 0 2006.229.14:29:40.75#ibcon#read 3, iclass 11, count 0 2006.229.14:29:40.75#ibcon#about to read 4, iclass 11, count 0 2006.229.14:29:40.75#ibcon#read 4, iclass 11, count 0 2006.229.14:29:40.75#ibcon#about to read 5, iclass 11, count 0 2006.229.14:29:40.75#ibcon#read 5, iclass 11, count 0 2006.229.14:29:40.75#ibcon#about to read 6, iclass 11, count 0 2006.229.14:29:40.75#ibcon#read 6, iclass 11, count 0 2006.229.14:29:40.75#ibcon#end of sib2, iclass 11, count 0 2006.229.14:29:40.75#ibcon#*after write, iclass 11, count 0 2006.229.14:29:40.75#ibcon#*before return 0, iclass 11, count 0 2006.229.14:29:40.75#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:29:40.75#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:29:40.75#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:29:40.75#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:29:40.75$setupk4/ifdk4 2006.229.14:29:40.75$ifdk4/lo= 2006.229.14:29:40.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:29:40.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:29:40.75$ifdk4/patch= 2006.229.14:29:40.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:29:40.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:29:40.75$setupk4/!*+20s 2006.229.14:29:49.92#abcon#<5=/06 1.3 2.3 27.441001002.1\r\n> 2006.229.14:29:49.94#abcon#{5=INTERFACE CLEAR} 2006.229.14:29:50.00#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:29:51.14#trakl#Source acquired 2006.229.14:29:52.14#flagr#flagr/antenna,acquired 2006.229.14:29:55.25$setupk4/"tpicd 2006.229.14:29:55.25$setupk4/echo=off 2006.229.14:29:55.25$setupk4/xlog=off 2006.229.14:29:55.25:!2006.229.14:33:21 2006.229.14:33:21.00:preob 2006.229.14:33:21.14/onsource/TRACKING 2006.229.14:33:21.14:!2006.229.14:33:31 2006.229.14:33:31.00:"tape 2006.229.14:33:31.00:"st=record 2006.229.14:33:31.00:data_valid=on 2006.229.14:33:31.00:midob 2006.229.14:33:31.14/onsource/TRACKING 2006.229.14:33:31.14/wx/27.44,1002.1,100 2006.229.14:33:31.35/cable/+6.4128E-03 2006.229.14:33:32.44/va/01,08,usb,yes,30,32 2006.229.14:33:32.44/va/02,07,usb,yes,33,33 2006.229.14:33:32.44/va/03,06,usb,yes,40,43 2006.229.14:33:32.44/va/04,07,usb,yes,34,35 2006.229.14:33:32.44/va/05,04,usb,yes,30,30 2006.229.14:33:32.44/va/06,04,usb,yes,34,33 2006.229.14:33:32.44/va/07,05,usb,yes,30,30 2006.229.14:33:32.44/va/08,06,usb,yes,22,27 2006.229.14:33:32.67/valo/01,524.99,yes,locked 2006.229.14:33:32.67/valo/02,534.99,yes,locked 2006.229.14:33:32.67/valo/03,564.99,yes,locked 2006.229.14:33:32.67/valo/04,624.99,yes,locked 2006.229.14:33:32.67/valo/05,734.99,yes,locked 2006.229.14:33:32.67/valo/06,814.99,yes,locked 2006.229.14:33:32.67/valo/07,864.99,yes,locked 2006.229.14:33:32.67/valo/08,884.99,yes,locked 2006.229.14:33:33.76/vb/01,04,usb,yes,31,29 2006.229.14:33:33.76/vb/02,04,usb,yes,34,33 2006.229.14:33:33.76/vb/03,04,usb,yes,31,34 2006.229.14:33:33.76/vb/04,04,usb,yes,35,34 2006.229.14:33:33.76/vb/05,04,usb,yes,27,30 2006.229.14:33:33.76/vb/06,04,usb,yes,32,28 2006.229.14:33:33.76/vb/07,04,usb,yes,32,31 2006.229.14:33:33.76/vb/08,04,usb,yes,29,33 2006.229.14:33:33.99/vblo/01,629.99,yes,locked 2006.229.14:33:33.99/vblo/02,634.99,yes,locked 2006.229.14:33:33.99/vblo/03,649.99,yes,locked 2006.229.14:33:33.99/vblo/04,679.99,yes,locked 2006.229.14:33:33.99/vblo/05,709.99,yes,locked 2006.229.14:33:33.99/vblo/06,719.99,yes,locked 2006.229.14:33:33.99/vblo/07,734.99,yes,locked 2006.229.14:33:33.99/vblo/08,744.99,yes,locked 2006.229.14:33:34.14/vabw/8 2006.229.14:33:34.29/vbbw/8 2006.229.14:33:36.74/xfe/off,on,12.2 2006.229.14:33:37.11/ifatt/23,28,28,28 2006.229.14:33:38.08/fmout-gps/S +4.57E-07 2006.229.14:33:38.12:!2006.229.14:36:41 2006.229.14:36:41.00:data_valid=off 2006.229.14:36:41.00:"et 2006.229.14:36:41.00:!+3s 2006.229.14:36:44.01:"tape 2006.229.14:36:44.01:postob 2006.229.14:36:44.10/cable/+6.4140E-03 2006.229.14:36:44.10/wx/27.44,1002.1,100 2006.229.14:36:45.08/fmout-gps/S +4.55E-07 2006.229.14:36:45.08:scan_name=229-1439,jd0608,60 2006.229.14:36:45.08:source=1611+343,161341.06,341247.9,2000.0,cw 2006.229.14:36:46.14#flagr#flagr/antenna,new-source 2006.229.14:36:46.14:checkk5 2006.229.14:36:46.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:36:46.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:36:47.28/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:36:47.68/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:36:48.08/chk_obsdata//k5ts1/T2291433??a.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.14:36:48.47/chk_obsdata//k5ts2/T2291433??b.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.14:36:48.88/chk_obsdata//k5ts3/T2291433??c.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.14:36:49.27/chk_obsdata//k5ts4/T2291433??d.dat file size is correct (nominal:760MB, actual:760MB). 2006.229.14:36:50.02/k5log//k5ts1_log_newline 2006.229.14:36:50.72/k5log//k5ts2_log_newline 2006.229.14:36:51.44/k5log//k5ts3_log_newline 2006.229.14:36:52.14/k5log//k5ts4_log_newline 2006.229.14:36:52.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:36:52.17:setupk4=1 2006.229.14:36:52.17$setupk4/echo=on 2006.229.14:36:52.17$setupk4/pcalon 2006.229.14:36:52.17$pcalon/"no phase cal control is implemented here 2006.229.14:36:52.17$setupk4/"tpicd=stop 2006.229.14:36:52.17$setupk4/"rec=synch_on 2006.229.14:36:52.17$setupk4/"rec_mode=128 2006.229.14:36:52.17$setupk4/!* 2006.229.14:36:52.17$setupk4/recpk4 2006.229.14:36:52.17$recpk4/recpatch= 2006.229.14:36:52.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:36:52.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:36:52.17$setupk4/vck44 2006.229.14:36:52.17$vck44/valo=1,524.99 2006.229.14:36:52.17#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.14:36:52.17#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.14:36:52.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:52.17#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:52.17#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:52.17#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:52.17#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:36:52.17#ibcon#first serial, iclass 35, count 0 2006.229.14:36:52.17#ibcon#enter sib2, iclass 35, count 0 2006.229.14:36:52.17#ibcon#flushed, iclass 35, count 0 2006.229.14:36:52.17#ibcon#about to write, iclass 35, count 0 2006.229.14:36:52.17#ibcon#wrote, iclass 35, count 0 2006.229.14:36:52.17#ibcon#about to read 3, iclass 35, count 0 2006.229.14:36:52.19#ibcon#read 3, iclass 35, count 0 2006.229.14:36:52.19#ibcon#about to read 4, iclass 35, count 0 2006.229.14:36:52.19#ibcon#read 4, iclass 35, count 0 2006.229.14:36:52.19#ibcon#about to read 5, iclass 35, count 0 2006.229.14:36:52.19#ibcon#read 5, iclass 35, count 0 2006.229.14:36:52.19#ibcon#about to read 6, iclass 35, count 0 2006.229.14:36:52.19#ibcon#read 6, iclass 35, count 0 2006.229.14:36:52.19#ibcon#end of sib2, iclass 35, count 0 2006.229.14:36:52.19#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:36:52.19#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:36:52.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:36:52.19#ibcon#*before write, iclass 35, count 0 2006.229.14:36:52.19#ibcon#enter sib2, iclass 35, count 0 2006.229.14:36:52.19#ibcon#flushed, iclass 35, count 0 2006.229.14:36:52.19#ibcon#about to write, iclass 35, count 0 2006.229.14:36:52.19#ibcon#wrote, iclass 35, count 0 2006.229.14:36:52.19#ibcon#about to read 3, iclass 35, count 0 2006.229.14:36:52.24#ibcon#read 3, iclass 35, count 0 2006.229.14:36:52.24#ibcon#about to read 4, iclass 35, count 0 2006.229.14:36:52.24#ibcon#read 4, iclass 35, count 0 2006.229.14:36:52.24#ibcon#about to read 5, iclass 35, count 0 2006.229.14:36:52.24#ibcon#read 5, iclass 35, count 0 2006.229.14:36:52.24#ibcon#about to read 6, iclass 35, count 0 2006.229.14:36:52.24#ibcon#read 6, iclass 35, count 0 2006.229.14:36:52.24#ibcon#end of sib2, iclass 35, count 0 2006.229.14:36:52.24#ibcon#*after write, iclass 35, count 0 2006.229.14:36:52.24#ibcon#*before return 0, iclass 35, count 0 2006.229.14:36:52.24#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:52.24#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:52.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:36:52.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:36:52.24$vck44/va=1,8 2006.229.14:36:52.24#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.14:36:52.24#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.14:36:52.24#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:52.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:52.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:52.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:52.24#ibcon#enter wrdev, iclass 37, count 2 2006.229.14:36:52.24#ibcon#first serial, iclass 37, count 2 2006.229.14:36:52.24#ibcon#enter sib2, iclass 37, count 2 2006.229.14:36:52.24#ibcon#flushed, iclass 37, count 2 2006.229.14:36:52.24#ibcon#about to write, iclass 37, count 2 2006.229.14:36:52.24#ibcon#wrote, iclass 37, count 2 2006.229.14:36:52.24#ibcon#about to read 3, iclass 37, count 2 2006.229.14:36:52.26#ibcon#read 3, iclass 37, count 2 2006.229.14:36:52.26#ibcon#about to read 4, iclass 37, count 2 2006.229.14:36:52.26#ibcon#read 4, iclass 37, count 2 2006.229.14:36:52.26#ibcon#about to read 5, iclass 37, count 2 2006.229.14:36:52.26#ibcon#read 5, iclass 37, count 2 2006.229.14:36:52.26#ibcon#about to read 6, iclass 37, count 2 2006.229.14:36:52.26#ibcon#read 6, iclass 37, count 2 2006.229.14:36:52.26#ibcon#end of sib2, iclass 37, count 2 2006.229.14:36:52.26#ibcon#*mode == 0, iclass 37, count 2 2006.229.14:36:52.26#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.14:36:52.26#ibcon#[25=AT01-08\r\n] 2006.229.14:36:52.26#ibcon#*before write, iclass 37, count 2 2006.229.14:36:52.26#ibcon#enter sib2, iclass 37, count 2 2006.229.14:36:52.26#ibcon#flushed, iclass 37, count 2 2006.229.14:36:52.26#ibcon#about to write, iclass 37, count 2 2006.229.14:36:52.26#ibcon#wrote, iclass 37, count 2 2006.229.14:36:52.26#ibcon#about to read 3, iclass 37, count 2 2006.229.14:36:52.29#ibcon#read 3, iclass 37, count 2 2006.229.14:36:52.29#ibcon#about to read 4, iclass 37, count 2 2006.229.14:36:52.29#ibcon#read 4, iclass 37, count 2 2006.229.14:36:52.29#ibcon#about to read 5, iclass 37, count 2 2006.229.14:36:52.29#ibcon#read 5, iclass 37, count 2 2006.229.14:36:52.29#ibcon#about to read 6, iclass 37, count 2 2006.229.14:36:52.29#ibcon#read 6, iclass 37, count 2 2006.229.14:36:52.29#ibcon#end of sib2, iclass 37, count 2 2006.229.14:36:52.29#ibcon#*after write, iclass 37, count 2 2006.229.14:36:52.29#ibcon#*before return 0, iclass 37, count 2 2006.229.14:36:52.29#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:52.29#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:52.29#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.14:36:52.29#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:52.29#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:52.41#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:52.41#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:52.41#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:36:52.41#ibcon#first serial, iclass 37, count 0 2006.229.14:36:52.41#ibcon#enter sib2, iclass 37, count 0 2006.229.14:36:52.41#ibcon#flushed, iclass 37, count 0 2006.229.14:36:52.41#ibcon#about to write, iclass 37, count 0 2006.229.14:36:52.41#ibcon#wrote, iclass 37, count 0 2006.229.14:36:52.41#ibcon#about to read 3, iclass 37, count 0 2006.229.14:36:52.43#ibcon#read 3, iclass 37, count 0 2006.229.14:36:52.43#ibcon#about to read 4, iclass 37, count 0 2006.229.14:36:52.43#ibcon#read 4, iclass 37, count 0 2006.229.14:36:52.43#ibcon#about to read 5, iclass 37, count 0 2006.229.14:36:52.43#ibcon#read 5, iclass 37, count 0 2006.229.14:36:52.43#ibcon#about to read 6, iclass 37, count 0 2006.229.14:36:52.43#ibcon#read 6, iclass 37, count 0 2006.229.14:36:52.43#ibcon#end of sib2, iclass 37, count 0 2006.229.14:36:52.43#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:36:52.43#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:36:52.43#ibcon#[25=USB\r\n] 2006.229.14:36:52.43#ibcon#*before write, iclass 37, count 0 2006.229.14:36:52.43#ibcon#enter sib2, iclass 37, count 0 2006.229.14:36:52.43#ibcon#flushed, iclass 37, count 0 2006.229.14:36:52.43#ibcon#about to write, iclass 37, count 0 2006.229.14:36:52.43#ibcon#wrote, iclass 37, count 0 2006.229.14:36:52.43#ibcon#about to read 3, iclass 37, count 0 2006.229.14:36:52.46#ibcon#read 3, iclass 37, count 0 2006.229.14:36:52.46#ibcon#about to read 4, iclass 37, count 0 2006.229.14:36:52.46#ibcon#read 4, iclass 37, count 0 2006.229.14:36:52.46#ibcon#about to read 5, iclass 37, count 0 2006.229.14:36:52.46#ibcon#read 5, iclass 37, count 0 2006.229.14:36:52.46#ibcon#about to read 6, iclass 37, count 0 2006.229.14:36:52.46#ibcon#read 6, iclass 37, count 0 2006.229.14:36:52.46#ibcon#end of sib2, iclass 37, count 0 2006.229.14:36:52.46#ibcon#*after write, iclass 37, count 0 2006.229.14:36:52.46#ibcon#*before return 0, iclass 37, count 0 2006.229.14:36:52.46#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:52.46#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:52.46#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:36:52.46#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:36:52.46$vck44/valo=2,534.99 2006.229.14:36:52.46#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.14:36:52.46#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.14:36:52.46#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:52.46#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:52.46#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:52.46#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:52.46#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:36:52.46#ibcon#first serial, iclass 39, count 0 2006.229.14:36:52.46#ibcon#enter sib2, iclass 39, count 0 2006.229.14:36:52.46#ibcon#flushed, iclass 39, count 0 2006.229.14:36:52.46#ibcon#about to write, iclass 39, count 0 2006.229.14:36:52.46#ibcon#wrote, iclass 39, count 0 2006.229.14:36:52.46#ibcon#about to read 3, iclass 39, count 0 2006.229.14:36:52.48#ibcon#read 3, iclass 39, count 0 2006.229.14:36:52.48#ibcon#about to read 4, iclass 39, count 0 2006.229.14:36:52.48#ibcon#read 4, iclass 39, count 0 2006.229.14:36:52.48#ibcon#about to read 5, iclass 39, count 0 2006.229.14:36:52.48#ibcon#read 5, iclass 39, count 0 2006.229.14:36:52.48#ibcon#about to read 6, iclass 39, count 0 2006.229.14:36:52.48#ibcon#read 6, iclass 39, count 0 2006.229.14:36:52.48#ibcon#end of sib2, iclass 39, count 0 2006.229.14:36:52.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:36:52.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:36:52.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:36:52.48#ibcon#*before write, iclass 39, count 0 2006.229.14:36:52.48#ibcon#enter sib2, iclass 39, count 0 2006.229.14:36:52.48#ibcon#flushed, iclass 39, count 0 2006.229.14:36:52.48#ibcon#about to write, iclass 39, count 0 2006.229.14:36:52.48#ibcon#wrote, iclass 39, count 0 2006.229.14:36:52.48#ibcon#about to read 3, iclass 39, count 0 2006.229.14:36:52.52#ibcon#read 3, iclass 39, count 0 2006.229.14:36:52.52#ibcon#about to read 4, iclass 39, count 0 2006.229.14:36:52.52#ibcon#read 4, iclass 39, count 0 2006.229.14:36:52.52#ibcon#about to read 5, iclass 39, count 0 2006.229.14:36:52.52#ibcon#read 5, iclass 39, count 0 2006.229.14:36:52.52#ibcon#about to read 6, iclass 39, count 0 2006.229.14:36:52.52#ibcon#read 6, iclass 39, count 0 2006.229.14:36:52.52#ibcon#end of sib2, iclass 39, count 0 2006.229.14:36:52.52#ibcon#*after write, iclass 39, count 0 2006.229.14:36:52.52#ibcon#*before return 0, iclass 39, count 0 2006.229.14:36:52.52#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:52.52#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:52.52#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:36:52.52#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:36:52.52$vck44/va=2,7 2006.229.14:36:52.52#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.14:36:52.52#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.14:36:52.52#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:52.52#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:52.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:52.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:52.58#ibcon#enter wrdev, iclass 3, count 2 2006.229.14:36:52.58#ibcon#first serial, iclass 3, count 2 2006.229.14:36:52.58#ibcon#enter sib2, iclass 3, count 2 2006.229.14:36:52.58#ibcon#flushed, iclass 3, count 2 2006.229.14:36:52.58#ibcon#about to write, iclass 3, count 2 2006.229.14:36:52.58#ibcon#wrote, iclass 3, count 2 2006.229.14:36:52.58#ibcon#about to read 3, iclass 3, count 2 2006.229.14:36:52.60#ibcon#read 3, iclass 3, count 2 2006.229.14:36:52.60#ibcon#about to read 4, iclass 3, count 2 2006.229.14:36:52.60#ibcon#read 4, iclass 3, count 2 2006.229.14:36:52.60#ibcon#about to read 5, iclass 3, count 2 2006.229.14:36:52.60#ibcon#read 5, iclass 3, count 2 2006.229.14:36:52.60#ibcon#about to read 6, iclass 3, count 2 2006.229.14:36:52.60#ibcon#read 6, iclass 3, count 2 2006.229.14:36:52.60#ibcon#end of sib2, iclass 3, count 2 2006.229.14:36:52.60#ibcon#*mode == 0, iclass 3, count 2 2006.229.14:36:52.60#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.14:36:52.60#ibcon#[25=AT02-07\r\n] 2006.229.14:36:52.60#ibcon#*before write, iclass 3, count 2 2006.229.14:36:52.60#ibcon#enter sib2, iclass 3, count 2 2006.229.14:36:52.60#ibcon#flushed, iclass 3, count 2 2006.229.14:36:52.60#ibcon#about to write, iclass 3, count 2 2006.229.14:36:52.60#ibcon#wrote, iclass 3, count 2 2006.229.14:36:52.60#ibcon#about to read 3, iclass 3, count 2 2006.229.14:36:52.63#ibcon#read 3, iclass 3, count 2 2006.229.14:36:52.63#ibcon#about to read 4, iclass 3, count 2 2006.229.14:36:52.63#ibcon#read 4, iclass 3, count 2 2006.229.14:36:52.63#ibcon#about to read 5, iclass 3, count 2 2006.229.14:36:52.63#ibcon#read 5, iclass 3, count 2 2006.229.14:36:52.63#ibcon#about to read 6, iclass 3, count 2 2006.229.14:36:52.63#ibcon#read 6, iclass 3, count 2 2006.229.14:36:52.63#ibcon#end of sib2, iclass 3, count 2 2006.229.14:36:52.63#ibcon#*after write, iclass 3, count 2 2006.229.14:36:52.63#ibcon#*before return 0, iclass 3, count 2 2006.229.14:36:52.63#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:52.63#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:52.63#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.14:36:52.63#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:52.63#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:52.75#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:52.75#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:52.75#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:36:52.75#ibcon#first serial, iclass 3, count 0 2006.229.14:36:52.75#ibcon#enter sib2, iclass 3, count 0 2006.229.14:36:52.75#ibcon#flushed, iclass 3, count 0 2006.229.14:36:52.75#ibcon#about to write, iclass 3, count 0 2006.229.14:36:52.75#ibcon#wrote, iclass 3, count 0 2006.229.14:36:52.75#ibcon#about to read 3, iclass 3, count 0 2006.229.14:36:52.77#ibcon#read 3, iclass 3, count 0 2006.229.14:36:52.77#ibcon#about to read 4, iclass 3, count 0 2006.229.14:36:52.77#ibcon#read 4, iclass 3, count 0 2006.229.14:36:52.77#ibcon#about to read 5, iclass 3, count 0 2006.229.14:36:52.77#ibcon#read 5, iclass 3, count 0 2006.229.14:36:52.77#ibcon#about to read 6, iclass 3, count 0 2006.229.14:36:52.77#ibcon#read 6, iclass 3, count 0 2006.229.14:36:52.77#ibcon#end of sib2, iclass 3, count 0 2006.229.14:36:52.77#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:36:52.77#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:36:52.77#ibcon#[25=USB\r\n] 2006.229.14:36:52.77#ibcon#*before write, iclass 3, count 0 2006.229.14:36:52.77#ibcon#enter sib2, iclass 3, count 0 2006.229.14:36:52.77#ibcon#flushed, iclass 3, count 0 2006.229.14:36:52.77#ibcon#about to write, iclass 3, count 0 2006.229.14:36:52.77#ibcon#wrote, iclass 3, count 0 2006.229.14:36:52.77#ibcon#about to read 3, iclass 3, count 0 2006.229.14:36:52.80#ibcon#read 3, iclass 3, count 0 2006.229.14:36:52.80#ibcon#about to read 4, iclass 3, count 0 2006.229.14:36:52.80#ibcon#read 4, iclass 3, count 0 2006.229.14:36:52.80#ibcon#about to read 5, iclass 3, count 0 2006.229.14:36:52.80#ibcon#read 5, iclass 3, count 0 2006.229.14:36:52.80#ibcon#about to read 6, iclass 3, count 0 2006.229.14:36:52.80#ibcon#read 6, iclass 3, count 0 2006.229.14:36:52.80#ibcon#end of sib2, iclass 3, count 0 2006.229.14:36:52.80#ibcon#*after write, iclass 3, count 0 2006.229.14:36:52.80#ibcon#*before return 0, iclass 3, count 0 2006.229.14:36:52.80#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:52.80#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:52.80#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:36:52.80#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:36:52.80$vck44/valo=3,564.99 2006.229.14:36:52.80#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.14:36:52.80#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.14:36:52.80#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:52.80#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:52.80#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:52.80#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:52.80#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:36:52.80#ibcon#first serial, iclass 5, count 0 2006.229.14:36:52.80#ibcon#enter sib2, iclass 5, count 0 2006.229.14:36:52.80#ibcon#flushed, iclass 5, count 0 2006.229.14:36:52.80#ibcon#about to write, iclass 5, count 0 2006.229.14:36:52.80#ibcon#wrote, iclass 5, count 0 2006.229.14:36:52.80#ibcon#about to read 3, iclass 5, count 0 2006.229.14:36:52.82#ibcon#read 3, iclass 5, count 0 2006.229.14:36:52.82#ibcon#about to read 4, iclass 5, count 0 2006.229.14:36:52.82#ibcon#read 4, iclass 5, count 0 2006.229.14:36:52.82#ibcon#about to read 5, iclass 5, count 0 2006.229.14:36:52.82#ibcon#read 5, iclass 5, count 0 2006.229.14:36:52.82#ibcon#about to read 6, iclass 5, count 0 2006.229.14:36:52.82#ibcon#read 6, iclass 5, count 0 2006.229.14:36:52.82#ibcon#end of sib2, iclass 5, count 0 2006.229.14:36:52.82#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:36:52.82#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:36:52.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:36:52.82#ibcon#*before write, iclass 5, count 0 2006.229.14:36:52.82#ibcon#enter sib2, iclass 5, count 0 2006.229.14:36:52.82#ibcon#flushed, iclass 5, count 0 2006.229.14:36:52.82#ibcon#about to write, iclass 5, count 0 2006.229.14:36:52.82#ibcon#wrote, iclass 5, count 0 2006.229.14:36:52.82#ibcon#about to read 3, iclass 5, count 0 2006.229.14:36:52.86#ibcon#read 3, iclass 5, count 0 2006.229.14:36:52.86#ibcon#about to read 4, iclass 5, count 0 2006.229.14:36:52.86#ibcon#read 4, iclass 5, count 0 2006.229.14:36:52.86#ibcon#about to read 5, iclass 5, count 0 2006.229.14:36:52.86#ibcon#read 5, iclass 5, count 0 2006.229.14:36:52.86#ibcon#about to read 6, iclass 5, count 0 2006.229.14:36:52.86#ibcon#read 6, iclass 5, count 0 2006.229.14:36:52.86#ibcon#end of sib2, iclass 5, count 0 2006.229.14:36:52.86#ibcon#*after write, iclass 5, count 0 2006.229.14:36:52.86#ibcon#*before return 0, iclass 5, count 0 2006.229.14:36:52.86#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:52.86#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:52.86#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:36:52.86#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:36:52.86$vck44/va=3,6 2006.229.14:36:52.86#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.14:36:52.86#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.14:36:52.86#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:52.86#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:52.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:52.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:52.92#ibcon#enter wrdev, iclass 7, count 2 2006.229.14:36:52.92#ibcon#first serial, iclass 7, count 2 2006.229.14:36:52.92#ibcon#enter sib2, iclass 7, count 2 2006.229.14:36:52.92#ibcon#flushed, iclass 7, count 2 2006.229.14:36:52.92#ibcon#about to write, iclass 7, count 2 2006.229.14:36:52.92#ibcon#wrote, iclass 7, count 2 2006.229.14:36:52.92#ibcon#about to read 3, iclass 7, count 2 2006.229.14:36:52.94#ibcon#read 3, iclass 7, count 2 2006.229.14:36:52.94#ibcon#about to read 4, iclass 7, count 2 2006.229.14:36:52.94#ibcon#read 4, iclass 7, count 2 2006.229.14:36:52.94#ibcon#about to read 5, iclass 7, count 2 2006.229.14:36:52.94#ibcon#read 5, iclass 7, count 2 2006.229.14:36:52.94#ibcon#about to read 6, iclass 7, count 2 2006.229.14:36:52.94#ibcon#read 6, iclass 7, count 2 2006.229.14:36:52.94#ibcon#end of sib2, iclass 7, count 2 2006.229.14:36:52.94#ibcon#*mode == 0, iclass 7, count 2 2006.229.14:36:52.94#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.14:36:52.94#ibcon#[25=AT03-06\r\n] 2006.229.14:36:52.94#ibcon#*before write, iclass 7, count 2 2006.229.14:36:52.94#ibcon#enter sib2, iclass 7, count 2 2006.229.14:36:52.94#ibcon#flushed, iclass 7, count 2 2006.229.14:36:52.94#ibcon#about to write, iclass 7, count 2 2006.229.14:36:52.94#ibcon#wrote, iclass 7, count 2 2006.229.14:36:52.94#ibcon#about to read 3, iclass 7, count 2 2006.229.14:36:52.97#ibcon#read 3, iclass 7, count 2 2006.229.14:36:52.97#ibcon#about to read 4, iclass 7, count 2 2006.229.14:36:52.97#ibcon#read 4, iclass 7, count 2 2006.229.14:36:52.97#ibcon#about to read 5, iclass 7, count 2 2006.229.14:36:52.97#ibcon#read 5, iclass 7, count 2 2006.229.14:36:52.97#ibcon#about to read 6, iclass 7, count 2 2006.229.14:36:52.97#ibcon#read 6, iclass 7, count 2 2006.229.14:36:52.97#ibcon#end of sib2, iclass 7, count 2 2006.229.14:36:52.97#ibcon#*after write, iclass 7, count 2 2006.229.14:36:52.97#ibcon#*before return 0, iclass 7, count 2 2006.229.14:36:52.97#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:52.97#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:52.97#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.14:36:52.97#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:52.97#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:53.09#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:53.09#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:53.09#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:36:53.09#ibcon#first serial, iclass 7, count 0 2006.229.14:36:53.09#ibcon#enter sib2, iclass 7, count 0 2006.229.14:36:53.09#ibcon#flushed, iclass 7, count 0 2006.229.14:36:53.09#ibcon#about to write, iclass 7, count 0 2006.229.14:36:53.09#ibcon#wrote, iclass 7, count 0 2006.229.14:36:53.09#ibcon#about to read 3, iclass 7, count 0 2006.229.14:36:53.11#ibcon#read 3, iclass 7, count 0 2006.229.14:36:53.11#ibcon#about to read 4, iclass 7, count 0 2006.229.14:36:53.11#ibcon#read 4, iclass 7, count 0 2006.229.14:36:53.11#ibcon#about to read 5, iclass 7, count 0 2006.229.14:36:53.11#ibcon#read 5, iclass 7, count 0 2006.229.14:36:53.11#ibcon#about to read 6, iclass 7, count 0 2006.229.14:36:53.11#ibcon#read 6, iclass 7, count 0 2006.229.14:36:53.11#ibcon#end of sib2, iclass 7, count 0 2006.229.14:36:53.11#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:36:53.11#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:36:53.11#ibcon#[25=USB\r\n] 2006.229.14:36:53.11#ibcon#*before write, iclass 7, count 0 2006.229.14:36:53.11#ibcon#enter sib2, iclass 7, count 0 2006.229.14:36:53.11#ibcon#flushed, iclass 7, count 0 2006.229.14:36:53.11#ibcon#about to write, iclass 7, count 0 2006.229.14:36:53.11#ibcon#wrote, iclass 7, count 0 2006.229.14:36:53.11#ibcon#about to read 3, iclass 7, count 0 2006.229.14:36:53.14#ibcon#read 3, iclass 7, count 0 2006.229.14:36:53.14#ibcon#about to read 4, iclass 7, count 0 2006.229.14:36:53.14#ibcon#read 4, iclass 7, count 0 2006.229.14:36:53.14#ibcon#about to read 5, iclass 7, count 0 2006.229.14:36:53.14#ibcon#read 5, iclass 7, count 0 2006.229.14:36:53.14#ibcon#about to read 6, iclass 7, count 0 2006.229.14:36:53.14#ibcon#read 6, iclass 7, count 0 2006.229.14:36:53.14#ibcon#end of sib2, iclass 7, count 0 2006.229.14:36:53.14#ibcon#*after write, iclass 7, count 0 2006.229.14:36:53.14#ibcon#*before return 0, iclass 7, count 0 2006.229.14:36:53.14#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:53.14#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:53.14#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:36:53.14#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:36:53.14$vck44/valo=4,624.99 2006.229.14:36:53.14#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.14:36:53.14#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.14:36:53.14#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:53.14#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:53.14#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:53.14#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:53.14#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:36:53.14#ibcon#first serial, iclass 11, count 0 2006.229.14:36:53.14#ibcon#enter sib2, iclass 11, count 0 2006.229.14:36:53.14#ibcon#flushed, iclass 11, count 0 2006.229.14:36:53.14#ibcon#about to write, iclass 11, count 0 2006.229.14:36:53.14#ibcon#wrote, iclass 11, count 0 2006.229.14:36:53.14#ibcon#about to read 3, iclass 11, count 0 2006.229.14:36:53.16#ibcon#read 3, iclass 11, count 0 2006.229.14:36:53.16#ibcon#about to read 4, iclass 11, count 0 2006.229.14:36:53.16#ibcon#read 4, iclass 11, count 0 2006.229.14:36:53.16#ibcon#about to read 5, iclass 11, count 0 2006.229.14:36:53.16#ibcon#read 5, iclass 11, count 0 2006.229.14:36:53.16#ibcon#about to read 6, iclass 11, count 0 2006.229.14:36:53.16#ibcon#read 6, iclass 11, count 0 2006.229.14:36:53.16#ibcon#end of sib2, iclass 11, count 0 2006.229.14:36:53.16#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:36:53.16#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:36:53.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:36:53.16#ibcon#*before write, iclass 11, count 0 2006.229.14:36:53.16#ibcon#enter sib2, iclass 11, count 0 2006.229.14:36:53.16#ibcon#flushed, iclass 11, count 0 2006.229.14:36:53.16#ibcon#about to write, iclass 11, count 0 2006.229.14:36:53.16#ibcon#wrote, iclass 11, count 0 2006.229.14:36:53.16#ibcon#about to read 3, iclass 11, count 0 2006.229.14:36:53.20#ibcon#read 3, iclass 11, count 0 2006.229.14:36:53.20#ibcon#about to read 4, iclass 11, count 0 2006.229.14:36:53.20#ibcon#read 4, iclass 11, count 0 2006.229.14:36:53.20#ibcon#about to read 5, iclass 11, count 0 2006.229.14:36:53.20#ibcon#read 5, iclass 11, count 0 2006.229.14:36:53.20#ibcon#about to read 6, iclass 11, count 0 2006.229.14:36:53.20#ibcon#read 6, iclass 11, count 0 2006.229.14:36:53.20#ibcon#end of sib2, iclass 11, count 0 2006.229.14:36:53.20#ibcon#*after write, iclass 11, count 0 2006.229.14:36:53.20#ibcon#*before return 0, iclass 11, count 0 2006.229.14:36:53.20#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:53.20#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:53.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:36:53.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:36:53.20$vck44/va=4,7 2006.229.14:36:53.20#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.14:36:53.20#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.14:36:53.20#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:53.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:53.26#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:53.26#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:53.26#ibcon#enter wrdev, iclass 13, count 2 2006.229.14:36:53.26#ibcon#first serial, iclass 13, count 2 2006.229.14:36:53.26#ibcon#enter sib2, iclass 13, count 2 2006.229.14:36:53.26#ibcon#flushed, iclass 13, count 2 2006.229.14:36:53.26#ibcon#about to write, iclass 13, count 2 2006.229.14:36:53.26#ibcon#wrote, iclass 13, count 2 2006.229.14:36:53.26#ibcon#about to read 3, iclass 13, count 2 2006.229.14:36:53.28#ibcon#read 3, iclass 13, count 2 2006.229.14:36:53.28#ibcon#about to read 4, iclass 13, count 2 2006.229.14:36:53.28#ibcon#read 4, iclass 13, count 2 2006.229.14:36:53.28#ibcon#about to read 5, iclass 13, count 2 2006.229.14:36:53.28#ibcon#read 5, iclass 13, count 2 2006.229.14:36:53.28#ibcon#about to read 6, iclass 13, count 2 2006.229.14:36:53.28#ibcon#read 6, iclass 13, count 2 2006.229.14:36:53.28#ibcon#end of sib2, iclass 13, count 2 2006.229.14:36:53.28#ibcon#*mode == 0, iclass 13, count 2 2006.229.14:36:53.28#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.14:36:53.28#ibcon#[25=AT04-07\r\n] 2006.229.14:36:53.28#ibcon#*before write, iclass 13, count 2 2006.229.14:36:53.28#ibcon#enter sib2, iclass 13, count 2 2006.229.14:36:53.28#ibcon#flushed, iclass 13, count 2 2006.229.14:36:53.28#ibcon#about to write, iclass 13, count 2 2006.229.14:36:53.28#ibcon#wrote, iclass 13, count 2 2006.229.14:36:53.28#ibcon#about to read 3, iclass 13, count 2 2006.229.14:36:53.31#ibcon#read 3, iclass 13, count 2 2006.229.14:36:53.31#ibcon#about to read 4, iclass 13, count 2 2006.229.14:36:53.31#ibcon#read 4, iclass 13, count 2 2006.229.14:36:53.31#ibcon#about to read 5, iclass 13, count 2 2006.229.14:36:53.31#ibcon#read 5, iclass 13, count 2 2006.229.14:36:53.31#ibcon#about to read 6, iclass 13, count 2 2006.229.14:36:53.31#ibcon#read 6, iclass 13, count 2 2006.229.14:36:53.31#ibcon#end of sib2, iclass 13, count 2 2006.229.14:36:53.31#ibcon#*after write, iclass 13, count 2 2006.229.14:36:53.31#ibcon#*before return 0, iclass 13, count 2 2006.229.14:36:53.31#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:53.31#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:53.31#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.14:36:53.31#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:53.31#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:53.43#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:53.43#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:53.43#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:36:53.43#ibcon#first serial, iclass 13, count 0 2006.229.14:36:53.43#ibcon#enter sib2, iclass 13, count 0 2006.229.14:36:53.43#ibcon#flushed, iclass 13, count 0 2006.229.14:36:53.43#ibcon#about to write, iclass 13, count 0 2006.229.14:36:53.43#ibcon#wrote, iclass 13, count 0 2006.229.14:36:53.43#ibcon#about to read 3, iclass 13, count 0 2006.229.14:36:53.45#ibcon#read 3, iclass 13, count 0 2006.229.14:36:53.45#ibcon#about to read 4, iclass 13, count 0 2006.229.14:36:53.45#ibcon#read 4, iclass 13, count 0 2006.229.14:36:53.45#ibcon#about to read 5, iclass 13, count 0 2006.229.14:36:53.45#ibcon#read 5, iclass 13, count 0 2006.229.14:36:53.45#ibcon#about to read 6, iclass 13, count 0 2006.229.14:36:53.45#ibcon#read 6, iclass 13, count 0 2006.229.14:36:53.45#ibcon#end of sib2, iclass 13, count 0 2006.229.14:36:53.45#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:36:53.45#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:36:53.45#ibcon#[25=USB\r\n] 2006.229.14:36:53.45#ibcon#*before write, iclass 13, count 0 2006.229.14:36:53.45#ibcon#enter sib2, iclass 13, count 0 2006.229.14:36:53.45#ibcon#flushed, iclass 13, count 0 2006.229.14:36:53.45#ibcon#about to write, iclass 13, count 0 2006.229.14:36:53.45#ibcon#wrote, iclass 13, count 0 2006.229.14:36:53.45#ibcon#about to read 3, iclass 13, count 0 2006.229.14:36:53.48#ibcon#read 3, iclass 13, count 0 2006.229.14:36:53.48#ibcon#about to read 4, iclass 13, count 0 2006.229.14:36:53.48#ibcon#read 4, iclass 13, count 0 2006.229.14:36:53.48#ibcon#about to read 5, iclass 13, count 0 2006.229.14:36:53.48#ibcon#read 5, iclass 13, count 0 2006.229.14:36:53.48#ibcon#about to read 6, iclass 13, count 0 2006.229.14:36:53.48#ibcon#read 6, iclass 13, count 0 2006.229.14:36:53.48#ibcon#end of sib2, iclass 13, count 0 2006.229.14:36:53.48#ibcon#*after write, iclass 13, count 0 2006.229.14:36:53.48#ibcon#*before return 0, iclass 13, count 0 2006.229.14:36:53.48#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:53.48#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:53.48#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:36:53.48#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:36:53.48$vck44/valo=5,734.99 2006.229.14:36:53.48#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.14:36:53.48#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.14:36:53.48#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:53.48#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:53.48#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:53.48#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:53.48#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:36:53.48#ibcon#first serial, iclass 15, count 0 2006.229.14:36:53.48#ibcon#enter sib2, iclass 15, count 0 2006.229.14:36:53.48#ibcon#flushed, iclass 15, count 0 2006.229.14:36:53.48#ibcon#about to write, iclass 15, count 0 2006.229.14:36:53.48#ibcon#wrote, iclass 15, count 0 2006.229.14:36:53.48#ibcon#about to read 3, iclass 15, count 0 2006.229.14:36:53.50#ibcon#read 3, iclass 15, count 0 2006.229.14:36:53.50#ibcon#about to read 4, iclass 15, count 0 2006.229.14:36:53.50#ibcon#read 4, iclass 15, count 0 2006.229.14:36:53.50#ibcon#about to read 5, iclass 15, count 0 2006.229.14:36:53.50#ibcon#read 5, iclass 15, count 0 2006.229.14:36:53.50#ibcon#about to read 6, iclass 15, count 0 2006.229.14:36:53.50#ibcon#read 6, iclass 15, count 0 2006.229.14:36:53.50#ibcon#end of sib2, iclass 15, count 0 2006.229.14:36:53.50#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:36:53.50#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:36:53.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:36:53.50#ibcon#*before write, iclass 15, count 0 2006.229.14:36:53.50#ibcon#enter sib2, iclass 15, count 0 2006.229.14:36:53.50#ibcon#flushed, iclass 15, count 0 2006.229.14:36:53.50#ibcon#about to write, iclass 15, count 0 2006.229.14:36:53.50#ibcon#wrote, iclass 15, count 0 2006.229.14:36:53.50#ibcon#about to read 3, iclass 15, count 0 2006.229.14:36:53.54#ibcon#read 3, iclass 15, count 0 2006.229.14:36:53.54#ibcon#about to read 4, iclass 15, count 0 2006.229.14:36:53.54#ibcon#read 4, iclass 15, count 0 2006.229.14:36:53.54#ibcon#about to read 5, iclass 15, count 0 2006.229.14:36:53.54#ibcon#read 5, iclass 15, count 0 2006.229.14:36:53.54#ibcon#about to read 6, iclass 15, count 0 2006.229.14:36:53.54#ibcon#read 6, iclass 15, count 0 2006.229.14:36:53.54#ibcon#end of sib2, iclass 15, count 0 2006.229.14:36:53.54#ibcon#*after write, iclass 15, count 0 2006.229.14:36:53.54#ibcon#*before return 0, iclass 15, count 0 2006.229.14:36:53.54#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:53.54#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:53.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:36:53.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:36:53.54$vck44/va=5,4 2006.229.14:36:53.54#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.14:36:53.54#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.14:36:53.54#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:53.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:53.60#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:53.60#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:53.60#ibcon#enter wrdev, iclass 17, count 2 2006.229.14:36:53.60#ibcon#first serial, iclass 17, count 2 2006.229.14:36:53.60#ibcon#enter sib2, iclass 17, count 2 2006.229.14:36:53.60#ibcon#flushed, iclass 17, count 2 2006.229.14:36:53.60#ibcon#about to write, iclass 17, count 2 2006.229.14:36:53.60#ibcon#wrote, iclass 17, count 2 2006.229.14:36:53.60#ibcon#about to read 3, iclass 17, count 2 2006.229.14:36:53.62#ibcon#read 3, iclass 17, count 2 2006.229.14:36:53.62#ibcon#about to read 4, iclass 17, count 2 2006.229.14:36:53.62#ibcon#read 4, iclass 17, count 2 2006.229.14:36:53.62#ibcon#about to read 5, iclass 17, count 2 2006.229.14:36:53.62#ibcon#read 5, iclass 17, count 2 2006.229.14:36:53.62#ibcon#about to read 6, iclass 17, count 2 2006.229.14:36:53.62#ibcon#read 6, iclass 17, count 2 2006.229.14:36:53.62#ibcon#end of sib2, iclass 17, count 2 2006.229.14:36:53.62#ibcon#*mode == 0, iclass 17, count 2 2006.229.14:36:53.62#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.14:36:53.62#ibcon#[25=AT05-04\r\n] 2006.229.14:36:53.62#ibcon#*before write, iclass 17, count 2 2006.229.14:36:53.62#ibcon#enter sib2, iclass 17, count 2 2006.229.14:36:53.62#ibcon#flushed, iclass 17, count 2 2006.229.14:36:53.62#ibcon#about to write, iclass 17, count 2 2006.229.14:36:53.62#ibcon#wrote, iclass 17, count 2 2006.229.14:36:53.62#ibcon#about to read 3, iclass 17, count 2 2006.229.14:36:53.65#ibcon#read 3, iclass 17, count 2 2006.229.14:36:53.65#ibcon#about to read 4, iclass 17, count 2 2006.229.14:36:53.65#ibcon#read 4, iclass 17, count 2 2006.229.14:36:53.65#ibcon#about to read 5, iclass 17, count 2 2006.229.14:36:53.65#ibcon#read 5, iclass 17, count 2 2006.229.14:36:53.65#ibcon#about to read 6, iclass 17, count 2 2006.229.14:36:53.65#ibcon#read 6, iclass 17, count 2 2006.229.14:36:53.65#ibcon#end of sib2, iclass 17, count 2 2006.229.14:36:53.65#ibcon#*after write, iclass 17, count 2 2006.229.14:36:53.65#ibcon#*before return 0, iclass 17, count 2 2006.229.14:36:53.65#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:53.65#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:53.65#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.14:36:53.65#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:53.65#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:53.77#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:53.77#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:53.77#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:36:53.77#ibcon#first serial, iclass 17, count 0 2006.229.14:36:53.77#ibcon#enter sib2, iclass 17, count 0 2006.229.14:36:53.77#ibcon#flushed, iclass 17, count 0 2006.229.14:36:53.77#ibcon#about to write, iclass 17, count 0 2006.229.14:36:53.77#ibcon#wrote, iclass 17, count 0 2006.229.14:36:53.77#ibcon#about to read 3, iclass 17, count 0 2006.229.14:36:53.79#ibcon#read 3, iclass 17, count 0 2006.229.14:36:53.79#ibcon#about to read 4, iclass 17, count 0 2006.229.14:36:53.79#ibcon#read 4, iclass 17, count 0 2006.229.14:36:53.79#ibcon#about to read 5, iclass 17, count 0 2006.229.14:36:53.79#ibcon#read 5, iclass 17, count 0 2006.229.14:36:53.79#ibcon#about to read 6, iclass 17, count 0 2006.229.14:36:53.79#ibcon#read 6, iclass 17, count 0 2006.229.14:36:53.79#ibcon#end of sib2, iclass 17, count 0 2006.229.14:36:53.79#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:36:53.79#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:36:53.79#ibcon#[25=USB\r\n] 2006.229.14:36:53.79#ibcon#*before write, iclass 17, count 0 2006.229.14:36:53.79#ibcon#enter sib2, iclass 17, count 0 2006.229.14:36:53.79#ibcon#flushed, iclass 17, count 0 2006.229.14:36:53.79#ibcon#about to write, iclass 17, count 0 2006.229.14:36:53.79#ibcon#wrote, iclass 17, count 0 2006.229.14:36:53.79#ibcon#about to read 3, iclass 17, count 0 2006.229.14:36:53.82#ibcon#read 3, iclass 17, count 0 2006.229.14:36:53.82#ibcon#about to read 4, iclass 17, count 0 2006.229.14:36:53.82#ibcon#read 4, iclass 17, count 0 2006.229.14:36:53.82#ibcon#about to read 5, iclass 17, count 0 2006.229.14:36:53.82#ibcon#read 5, iclass 17, count 0 2006.229.14:36:53.82#ibcon#about to read 6, iclass 17, count 0 2006.229.14:36:53.82#ibcon#read 6, iclass 17, count 0 2006.229.14:36:53.82#ibcon#end of sib2, iclass 17, count 0 2006.229.14:36:53.82#ibcon#*after write, iclass 17, count 0 2006.229.14:36:53.82#ibcon#*before return 0, iclass 17, count 0 2006.229.14:36:53.82#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:53.82#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:53.82#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:36:53.82#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:36:53.82$vck44/valo=6,814.99 2006.229.14:36:53.82#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.14:36:53.82#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.14:36:53.82#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:53.82#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:53.82#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:53.82#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:53.82#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:36:53.82#ibcon#first serial, iclass 19, count 0 2006.229.14:36:53.82#ibcon#enter sib2, iclass 19, count 0 2006.229.14:36:53.82#ibcon#flushed, iclass 19, count 0 2006.229.14:36:53.82#ibcon#about to write, iclass 19, count 0 2006.229.14:36:53.82#ibcon#wrote, iclass 19, count 0 2006.229.14:36:53.82#ibcon#about to read 3, iclass 19, count 0 2006.229.14:36:53.84#ibcon#read 3, iclass 19, count 0 2006.229.14:36:53.84#ibcon#about to read 4, iclass 19, count 0 2006.229.14:36:53.84#ibcon#read 4, iclass 19, count 0 2006.229.14:36:53.84#ibcon#about to read 5, iclass 19, count 0 2006.229.14:36:53.84#ibcon#read 5, iclass 19, count 0 2006.229.14:36:53.84#ibcon#about to read 6, iclass 19, count 0 2006.229.14:36:53.84#ibcon#read 6, iclass 19, count 0 2006.229.14:36:53.84#ibcon#end of sib2, iclass 19, count 0 2006.229.14:36:53.84#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:36:53.84#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:36:53.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:36:53.84#ibcon#*before write, iclass 19, count 0 2006.229.14:36:53.84#ibcon#enter sib2, iclass 19, count 0 2006.229.14:36:53.84#ibcon#flushed, iclass 19, count 0 2006.229.14:36:53.84#ibcon#about to write, iclass 19, count 0 2006.229.14:36:53.84#ibcon#wrote, iclass 19, count 0 2006.229.14:36:53.84#ibcon#about to read 3, iclass 19, count 0 2006.229.14:36:53.88#ibcon#read 3, iclass 19, count 0 2006.229.14:36:53.88#ibcon#about to read 4, iclass 19, count 0 2006.229.14:36:53.88#ibcon#read 4, iclass 19, count 0 2006.229.14:36:53.88#ibcon#about to read 5, iclass 19, count 0 2006.229.14:36:53.88#ibcon#read 5, iclass 19, count 0 2006.229.14:36:53.88#ibcon#about to read 6, iclass 19, count 0 2006.229.14:36:53.88#ibcon#read 6, iclass 19, count 0 2006.229.14:36:53.88#ibcon#end of sib2, iclass 19, count 0 2006.229.14:36:53.88#ibcon#*after write, iclass 19, count 0 2006.229.14:36:53.88#ibcon#*before return 0, iclass 19, count 0 2006.229.14:36:53.88#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:53.88#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:53.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:36:53.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:36:53.88$vck44/va=6,4 2006.229.14:36:53.88#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.14:36:53.88#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.14:36:53.88#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:53.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:53.94#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:53.94#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:53.94#ibcon#enter wrdev, iclass 21, count 2 2006.229.14:36:53.94#ibcon#first serial, iclass 21, count 2 2006.229.14:36:53.94#ibcon#enter sib2, iclass 21, count 2 2006.229.14:36:53.94#ibcon#flushed, iclass 21, count 2 2006.229.14:36:53.94#ibcon#about to write, iclass 21, count 2 2006.229.14:36:53.94#ibcon#wrote, iclass 21, count 2 2006.229.14:36:53.94#ibcon#about to read 3, iclass 21, count 2 2006.229.14:36:53.96#ibcon#read 3, iclass 21, count 2 2006.229.14:36:53.96#ibcon#about to read 4, iclass 21, count 2 2006.229.14:36:53.96#ibcon#read 4, iclass 21, count 2 2006.229.14:36:53.96#ibcon#about to read 5, iclass 21, count 2 2006.229.14:36:53.96#ibcon#read 5, iclass 21, count 2 2006.229.14:36:53.96#ibcon#about to read 6, iclass 21, count 2 2006.229.14:36:53.96#ibcon#read 6, iclass 21, count 2 2006.229.14:36:53.96#ibcon#end of sib2, iclass 21, count 2 2006.229.14:36:53.96#ibcon#*mode == 0, iclass 21, count 2 2006.229.14:36:53.96#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.14:36:53.96#ibcon#[25=AT06-04\r\n] 2006.229.14:36:53.96#ibcon#*before write, iclass 21, count 2 2006.229.14:36:53.96#ibcon#enter sib2, iclass 21, count 2 2006.229.14:36:53.96#ibcon#flushed, iclass 21, count 2 2006.229.14:36:53.96#ibcon#about to write, iclass 21, count 2 2006.229.14:36:53.96#ibcon#wrote, iclass 21, count 2 2006.229.14:36:53.96#ibcon#about to read 3, iclass 21, count 2 2006.229.14:36:53.99#ibcon#read 3, iclass 21, count 2 2006.229.14:36:53.99#ibcon#about to read 4, iclass 21, count 2 2006.229.14:36:53.99#ibcon#read 4, iclass 21, count 2 2006.229.14:36:53.99#ibcon#about to read 5, iclass 21, count 2 2006.229.14:36:53.99#ibcon#read 5, iclass 21, count 2 2006.229.14:36:53.99#ibcon#about to read 6, iclass 21, count 2 2006.229.14:36:53.99#ibcon#read 6, iclass 21, count 2 2006.229.14:36:53.99#ibcon#end of sib2, iclass 21, count 2 2006.229.14:36:53.99#ibcon#*after write, iclass 21, count 2 2006.229.14:36:53.99#ibcon#*before return 0, iclass 21, count 2 2006.229.14:36:53.99#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:53.99#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:53.99#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.14:36:53.99#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:53.99#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:54.11#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:54.11#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:54.11#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:36:54.11#ibcon#first serial, iclass 21, count 0 2006.229.14:36:54.11#ibcon#enter sib2, iclass 21, count 0 2006.229.14:36:54.11#ibcon#flushed, iclass 21, count 0 2006.229.14:36:54.11#ibcon#about to write, iclass 21, count 0 2006.229.14:36:54.11#ibcon#wrote, iclass 21, count 0 2006.229.14:36:54.11#ibcon#about to read 3, iclass 21, count 0 2006.229.14:36:54.13#ibcon#read 3, iclass 21, count 0 2006.229.14:36:54.13#ibcon#about to read 4, iclass 21, count 0 2006.229.14:36:54.13#ibcon#read 4, iclass 21, count 0 2006.229.14:36:54.13#ibcon#about to read 5, iclass 21, count 0 2006.229.14:36:54.13#ibcon#read 5, iclass 21, count 0 2006.229.14:36:54.13#ibcon#about to read 6, iclass 21, count 0 2006.229.14:36:54.13#ibcon#read 6, iclass 21, count 0 2006.229.14:36:54.13#ibcon#end of sib2, iclass 21, count 0 2006.229.14:36:54.13#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:36:54.13#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:36:54.13#ibcon#[25=USB\r\n] 2006.229.14:36:54.13#ibcon#*before write, iclass 21, count 0 2006.229.14:36:54.13#ibcon#enter sib2, iclass 21, count 0 2006.229.14:36:54.13#ibcon#flushed, iclass 21, count 0 2006.229.14:36:54.13#ibcon#about to write, iclass 21, count 0 2006.229.14:36:54.13#ibcon#wrote, iclass 21, count 0 2006.229.14:36:54.13#ibcon#about to read 3, iclass 21, count 0 2006.229.14:36:54.16#ibcon#read 3, iclass 21, count 0 2006.229.14:36:54.16#ibcon#about to read 4, iclass 21, count 0 2006.229.14:36:54.16#ibcon#read 4, iclass 21, count 0 2006.229.14:36:54.16#ibcon#about to read 5, iclass 21, count 0 2006.229.14:36:54.16#ibcon#read 5, iclass 21, count 0 2006.229.14:36:54.16#ibcon#about to read 6, iclass 21, count 0 2006.229.14:36:54.16#ibcon#read 6, iclass 21, count 0 2006.229.14:36:54.16#ibcon#end of sib2, iclass 21, count 0 2006.229.14:36:54.16#ibcon#*after write, iclass 21, count 0 2006.229.14:36:54.16#ibcon#*before return 0, iclass 21, count 0 2006.229.14:36:54.16#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:54.16#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:54.16#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:36:54.16#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:36:54.16$vck44/valo=7,864.99 2006.229.14:36:54.16#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.14:36:54.16#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.14:36:54.16#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:54.16#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:54.16#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:54.16#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:54.16#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:36:54.16#ibcon#first serial, iclass 23, count 0 2006.229.14:36:54.16#ibcon#enter sib2, iclass 23, count 0 2006.229.14:36:54.16#ibcon#flushed, iclass 23, count 0 2006.229.14:36:54.16#ibcon#about to write, iclass 23, count 0 2006.229.14:36:54.16#ibcon#wrote, iclass 23, count 0 2006.229.14:36:54.16#ibcon#about to read 3, iclass 23, count 0 2006.229.14:36:54.18#ibcon#read 3, iclass 23, count 0 2006.229.14:36:54.18#ibcon#about to read 4, iclass 23, count 0 2006.229.14:36:54.18#ibcon#read 4, iclass 23, count 0 2006.229.14:36:54.18#ibcon#about to read 5, iclass 23, count 0 2006.229.14:36:54.18#ibcon#read 5, iclass 23, count 0 2006.229.14:36:54.18#ibcon#about to read 6, iclass 23, count 0 2006.229.14:36:54.18#ibcon#read 6, iclass 23, count 0 2006.229.14:36:54.18#ibcon#end of sib2, iclass 23, count 0 2006.229.14:36:54.18#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:36:54.18#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:36:54.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:36:54.18#ibcon#*before write, iclass 23, count 0 2006.229.14:36:54.18#ibcon#enter sib2, iclass 23, count 0 2006.229.14:36:54.18#ibcon#flushed, iclass 23, count 0 2006.229.14:36:54.18#ibcon#about to write, iclass 23, count 0 2006.229.14:36:54.18#ibcon#wrote, iclass 23, count 0 2006.229.14:36:54.18#ibcon#about to read 3, iclass 23, count 0 2006.229.14:36:54.22#ibcon#read 3, iclass 23, count 0 2006.229.14:36:54.22#ibcon#about to read 4, iclass 23, count 0 2006.229.14:36:54.22#ibcon#read 4, iclass 23, count 0 2006.229.14:36:54.22#ibcon#about to read 5, iclass 23, count 0 2006.229.14:36:54.22#ibcon#read 5, iclass 23, count 0 2006.229.14:36:54.22#ibcon#about to read 6, iclass 23, count 0 2006.229.14:36:54.22#ibcon#read 6, iclass 23, count 0 2006.229.14:36:54.22#ibcon#end of sib2, iclass 23, count 0 2006.229.14:36:54.22#ibcon#*after write, iclass 23, count 0 2006.229.14:36:54.22#ibcon#*before return 0, iclass 23, count 0 2006.229.14:36:54.22#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:54.22#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:54.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:36:54.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:36:54.22$vck44/va=7,5 2006.229.14:36:54.22#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.14:36:54.22#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.14:36:54.22#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:54.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:54.28#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:54.28#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:54.28#ibcon#enter wrdev, iclass 25, count 2 2006.229.14:36:54.28#ibcon#first serial, iclass 25, count 2 2006.229.14:36:54.28#ibcon#enter sib2, iclass 25, count 2 2006.229.14:36:54.28#ibcon#flushed, iclass 25, count 2 2006.229.14:36:54.28#ibcon#about to write, iclass 25, count 2 2006.229.14:36:54.28#ibcon#wrote, iclass 25, count 2 2006.229.14:36:54.28#ibcon#about to read 3, iclass 25, count 2 2006.229.14:36:54.30#ibcon#read 3, iclass 25, count 2 2006.229.14:36:54.30#ibcon#about to read 4, iclass 25, count 2 2006.229.14:36:54.30#ibcon#read 4, iclass 25, count 2 2006.229.14:36:54.30#ibcon#about to read 5, iclass 25, count 2 2006.229.14:36:54.30#ibcon#read 5, iclass 25, count 2 2006.229.14:36:54.30#ibcon#about to read 6, iclass 25, count 2 2006.229.14:36:54.30#ibcon#read 6, iclass 25, count 2 2006.229.14:36:54.30#ibcon#end of sib2, iclass 25, count 2 2006.229.14:36:54.30#ibcon#*mode == 0, iclass 25, count 2 2006.229.14:36:54.30#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.14:36:54.30#ibcon#[25=AT07-05\r\n] 2006.229.14:36:54.30#ibcon#*before write, iclass 25, count 2 2006.229.14:36:54.30#ibcon#enter sib2, iclass 25, count 2 2006.229.14:36:54.30#ibcon#flushed, iclass 25, count 2 2006.229.14:36:54.30#ibcon#about to write, iclass 25, count 2 2006.229.14:36:54.30#ibcon#wrote, iclass 25, count 2 2006.229.14:36:54.30#ibcon#about to read 3, iclass 25, count 2 2006.229.14:36:54.33#ibcon#read 3, iclass 25, count 2 2006.229.14:36:54.33#ibcon#about to read 4, iclass 25, count 2 2006.229.14:36:54.33#ibcon#read 4, iclass 25, count 2 2006.229.14:36:54.33#ibcon#about to read 5, iclass 25, count 2 2006.229.14:36:54.33#ibcon#read 5, iclass 25, count 2 2006.229.14:36:54.33#ibcon#about to read 6, iclass 25, count 2 2006.229.14:36:54.33#ibcon#read 6, iclass 25, count 2 2006.229.14:36:54.33#ibcon#end of sib2, iclass 25, count 2 2006.229.14:36:54.33#ibcon#*after write, iclass 25, count 2 2006.229.14:36:54.33#ibcon#*before return 0, iclass 25, count 2 2006.229.14:36:54.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:54.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:54.33#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.14:36:54.33#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:54.33#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:54.45#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:54.45#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:54.45#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:36:54.45#ibcon#first serial, iclass 25, count 0 2006.229.14:36:54.45#ibcon#enter sib2, iclass 25, count 0 2006.229.14:36:54.45#ibcon#flushed, iclass 25, count 0 2006.229.14:36:54.45#ibcon#about to write, iclass 25, count 0 2006.229.14:36:54.45#ibcon#wrote, iclass 25, count 0 2006.229.14:36:54.45#ibcon#about to read 3, iclass 25, count 0 2006.229.14:36:54.47#ibcon#read 3, iclass 25, count 0 2006.229.14:36:54.47#ibcon#about to read 4, iclass 25, count 0 2006.229.14:36:54.47#ibcon#read 4, iclass 25, count 0 2006.229.14:36:54.47#ibcon#about to read 5, iclass 25, count 0 2006.229.14:36:54.47#ibcon#read 5, iclass 25, count 0 2006.229.14:36:54.47#ibcon#about to read 6, iclass 25, count 0 2006.229.14:36:54.47#ibcon#read 6, iclass 25, count 0 2006.229.14:36:54.47#ibcon#end of sib2, iclass 25, count 0 2006.229.14:36:54.47#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:36:54.47#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:36:54.47#ibcon#[25=USB\r\n] 2006.229.14:36:54.47#ibcon#*before write, iclass 25, count 0 2006.229.14:36:54.47#ibcon#enter sib2, iclass 25, count 0 2006.229.14:36:54.47#ibcon#flushed, iclass 25, count 0 2006.229.14:36:54.47#ibcon#about to write, iclass 25, count 0 2006.229.14:36:54.47#ibcon#wrote, iclass 25, count 0 2006.229.14:36:54.47#ibcon#about to read 3, iclass 25, count 0 2006.229.14:36:54.50#ibcon#read 3, iclass 25, count 0 2006.229.14:36:54.50#ibcon#about to read 4, iclass 25, count 0 2006.229.14:36:54.50#ibcon#read 4, iclass 25, count 0 2006.229.14:36:54.50#ibcon#about to read 5, iclass 25, count 0 2006.229.14:36:54.50#ibcon#read 5, iclass 25, count 0 2006.229.14:36:54.50#ibcon#about to read 6, iclass 25, count 0 2006.229.14:36:54.50#ibcon#read 6, iclass 25, count 0 2006.229.14:36:54.50#ibcon#end of sib2, iclass 25, count 0 2006.229.14:36:54.50#ibcon#*after write, iclass 25, count 0 2006.229.14:36:54.50#ibcon#*before return 0, iclass 25, count 0 2006.229.14:36:54.50#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:54.50#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:54.50#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:36:54.50#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:36:54.50$vck44/valo=8,884.99 2006.229.14:36:54.50#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.14:36:54.50#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.14:36:54.50#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:54.50#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:54.50#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:54.50#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:54.50#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:36:54.50#ibcon#first serial, iclass 27, count 0 2006.229.14:36:54.50#ibcon#enter sib2, iclass 27, count 0 2006.229.14:36:54.50#ibcon#flushed, iclass 27, count 0 2006.229.14:36:54.50#ibcon#about to write, iclass 27, count 0 2006.229.14:36:54.50#ibcon#wrote, iclass 27, count 0 2006.229.14:36:54.50#ibcon#about to read 3, iclass 27, count 0 2006.229.14:36:54.52#ibcon#read 3, iclass 27, count 0 2006.229.14:36:54.52#ibcon#about to read 4, iclass 27, count 0 2006.229.14:36:54.52#ibcon#read 4, iclass 27, count 0 2006.229.14:36:54.52#ibcon#about to read 5, iclass 27, count 0 2006.229.14:36:54.52#ibcon#read 5, iclass 27, count 0 2006.229.14:36:54.52#ibcon#about to read 6, iclass 27, count 0 2006.229.14:36:54.52#ibcon#read 6, iclass 27, count 0 2006.229.14:36:54.52#ibcon#end of sib2, iclass 27, count 0 2006.229.14:36:54.52#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:36:54.52#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:36:54.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:36:54.52#ibcon#*before write, iclass 27, count 0 2006.229.14:36:54.52#ibcon#enter sib2, iclass 27, count 0 2006.229.14:36:54.52#ibcon#flushed, iclass 27, count 0 2006.229.14:36:54.52#ibcon#about to write, iclass 27, count 0 2006.229.14:36:54.52#ibcon#wrote, iclass 27, count 0 2006.229.14:36:54.52#ibcon#about to read 3, iclass 27, count 0 2006.229.14:36:54.56#ibcon#read 3, iclass 27, count 0 2006.229.14:36:54.56#ibcon#about to read 4, iclass 27, count 0 2006.229.14:36:54.56#ibcon#read 4, iclass 27, count 0 2006.229.14:36:54.56#ibcon#about to read 5, iclass 27, count 0 2006.229.14:36:54.56#ibcon#read 5, iclass 27, count 0 2006.229.14:36:54.56#ibcon#about to read 6, iclass 27, count 0 2006.229.14:36:54.56#ibcon#read 6, iclass 27, count 0 2006.229.14:36:54.56#ibcon#end of sib2, iclass 27, count 0 2006.229.14:36:54.56#ibcon#*after write, iclass 27, count 0 2006.229.14:36:54.56#ibcon#*before return 0, iclass 27, count 0 2006.229.14:36:54.56#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:54.56#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:54.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:36:54.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:36:54.56$vck44/va=8,6 2006.229.14:36:54.56#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.14:36:54.56#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.14:36:54.56#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:54.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:36:54.62#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:36:54.62#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:36:54.62#ibcon#enter wrdev, iclass 29, count 2 2006.229.14:36:54.62#ibcon#first serial, iclass 29, count 2 2006.229.14:36:54.62#ibcon#enter sib2, iclass 29, count 2 2006.229.14:36:54.62#ibcon#flushed, iclass 29, count 2 2006.229.14:36:54.62#ibcon#about to write, iclass 29, count 2 2006.229.14:36:54.62#ibcon#wrote, iclass 29, count 2 2006.229.14:36:54.62#ibcon#about to read 3, iclass 29, count 2 2006.229.14:36:54.64#ibcon#read 3, iclass 29, count 2 2006.229.14:36:54.64#ibcon#about to read 4, iclass 29, count 2 2006.229.14:36:54.64#ibcon#read 4, iclass 29, count 2 2006.229.14:36:54.64#ibcon#about to read 5, iclass 29, count 2 2006.229.14:36:54.64#ibcon#read 5, iclass 29, count 2 2006.229.14:36:54.64#ibcon#about to read 6, iclass 29, count 2 2006.229.14:36:54.64#ibcon#read 6, iclass 29, count 2 2006.229.14:36:54.64#ibcon#end of sib2, iclass 29, count 2 2006.229.14:36:54.64#ibcon#*mode == 0, iclass 29, count 2 2006.229.14:36:54.64#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.14:36:54.64#ibcon#[25=AT08-06\r\n] 2006.229.14:36:54.64#ibcon#*before write, iclass 29, count 2 2006.229.14:36:54.64#ibcon#enter sib2, iclass 29, count 2 2006.229.14:36:54.64#ibcon#flushed, iclass 29, count 2 2006.229.14:36:54.64#ibcon#about to write, iclass 29, count 2 2006.229.14:36:54.64#ibcon#wrote, iclass 29, count 2 2006.229.14:36:54.64#ibcon#about to read 3, iclass 29, count 2 2006.229.14:36:54.67#ibcon#read 3, iclass 29, count 2 2006.229.14:36:54.67#ibcon#about to read 4, iclass 29, count 2 2006.229.14:36:54.67#ibcon#read 4, iclass 29, count 2 2006.229.14:36:54.67#ibcon#about to read 5, iclass 29, count 2 2006.229.14:36:54.67#ibcon#read 5, iclass 29, count 2 2006.229.14:36:54.67#ibcon#about to read 6, iclass 29, count 2 2006.229.14:36:54.67#ibcon#read 6, iclass 29, count 2 2006.229.14:36:54.67#ibcon#end of sib2, iclass 29, count 2 2006.229.14:36:54.67#ibcon#*after write, iclass 29, count 2 2006.229.14:36:54.67#ibcon#*before return 0, iclass 29, count 2 2006.229.14:36:54.67#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:36:54.67#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:36:54.67#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.14:36:54.67#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:54.67#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:36:54.79#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:36:54.79#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:36:54.79#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:36:54.79#ibcon#first serial, iclass 29, count 0 2006.229.14:36:54.79#ibcon#enter sib2, iclass 29, count 0 2006.229.14:36:54.79#ibcon#flushed, iclass 29, count 0 2006.229.14:36:54.79#ibcon#about to write, iclass 29, count 0 2006.229.14:36:54.79#ibcon#wrote, iclass 29, count 0 2006.229.14:36:54.79#ibcon#about to read 3, iclass 29, count 0 2006.229.14:36:54.81#ibcon#read 3, iclass 29, count 0 2006.229.14:36:54.81#ibcon#about to read 4, iclass 29, count 0 2006.229.14:36:54.81#ibcon#read 4, iclass 29, count 0 2006.229.14:36:54.81#ibcon#about to read 5, iclass 29, count 0 2006.229.14:36:54.81#ibcon#read 5, iclass 29, count 0 2006.229.14:36:54.81#ibcon#about to read 6, iclass 29, count 0 2006.229.14:36:54.81#ibcon#read 6, iclass 29, count 0 2006.229.14:36:54.81#ibcon#end of sib2, iclass 29, count 0 2006.229.14:36:54.81#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:36:54.81#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:36:54.81#ibcon#[25=USB\r\n] 2006.229.14:36:54.81#ibcon#*before write, iclass 29, count 0 2006.229.14:36:54.81#ibcon#enter sib2, iclass 29, count 0 2006.229.14:36:54.81#ibcon#flushed, iclass 29, count 0 2006.229.14:36:54.81#ibcon#about to write, iclass 29, count 0 2006.229.14:36:54.81#ibcon#wrote, iclass 29, count 0 2006.229.14:36:54.81#ibcon#about to read 3, iclass 29, count 0 2006.229.14:36:54.84#ibcon#read 3, iclass 29, count 0 2006.229.14:36:54.84#ibcon#about to read 4, iclass 29, count 0 2006.229.14:36:54.84#ibcon#read 4, iclass 29, count 0 2006.229.14:36:54.84#ibcon#about to read 5, iclass 29, count 0 2006.229.14:36:54.84#ibcon#read 5, iclass 29, count 0 2006.229.14:36:54.84#ibcon#about to read 6, iclass 29, count 0 2006.229.14:36:54.84#ibcon#read 6, iclass 29, count 0 2006.229.14:36:54.84#ibcon#end of sib2, iclass 29, count 0 2006.229.14:36:54.84#ibcon#*after write, iclass 29, count 0 2006.229.14:36:54.84#ibcon#*before return 0, iclass 29, count 0 2006.229.14:36:54.84#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:36:54.84#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:36:54.84#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:36:54.84#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:36:54.84$vck44/vblo=1,629.99 2006.229.14:36:54.84#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.14:36:54.84#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.14:36:54.84#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:54.84#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:36:54.84#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:36:54.84#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:36:54.84#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:36:54.84#ibcon#first serial, iclass 31, count 0 2006.229.14:36:54.84#ibcon#enter sib2, iclass 31, count 0 2006.229.14:36:54.84#ibcon#flushed, iclass 31, count 0 2006.229.14:36:54.84#ibcon#about to write, iclass 31, count 0 2006.229.14:36:54.84#ibcon#wrote, iclass 31, count 0 2006.229.14:36:54.84#ibcon#about to read 3, iclass 31, count 0 2006.229.14:36:54.86#ibcon#read 3, iclass 31, count 0 2006.229.14:36:54.86#ibcon#about to read 4, iclass 31, count 0 2006.229.14:36:54.86#ibcon#read 4, iclass 31, count 0 2006.229.14:36:54.86#ibcon#about to read 5, iclass 31, count 0 2006.229.14:36:54.86#ibcon#read 5, iclass 31, count 0 2006.229.14:36:54.86#ibcon#about to read 6, iclass 31, count 0 2006.229.14:36:54.86#ibcon#read 6, iclass 31, count 0 2006.229.14:36:54.86#ibcon#end of sib2, iclass 31, count 0 2006.229.14:36:54.86#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:36:54.86#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:36:54.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:36:54.86#ibcon#*before write, iclass 31, count 0 2006.229.14:36:54.86#ibcon#enter sib2, iclass 31, count 0 2006.229.14:36:54.86#ibcon#flushed, iclass 31, count 0 2006.229.14:36:54.86#ibcon#about to write, iclass 31, count 0 2006.229.14:36:54.86#ibcon#wrote, iclass 31, count 0 2006.229.14:36:54.86#ibcon#about to read 3, iclass 31, count 0 2006.229.14:36:54.90#ibcon#read 3, iclass 31, count 0 2006.229.14:36:54.90#ibcon#about to read 4, iclass 31, count 0 2006.229.14:36:54.90#ibcon#read 4, iclass 31, count 0 2006.229.14:36:54.90#ibcon#about to read 5, iclass 31, count 0 2006.229.14:36:54.90#ibcon#read 5, iclass 31, count 0 2006.229.14:36:54.90#ibcon#about to read 6, iclass 31, count 0 2006.229.14:36:54.90#ibcon#read 6, iclass 31, count 0 2006.229.14:36:54.90#ibcon#end of sib2, iclass 31, count 0 2006.229.14:36:54.90#ibcon#*after write, iclass 31, count 0 2006.229.14:36:54.90#ibcon#*before return 0, iclass 31, count 0 2006.229.14:36:54.90#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:36:54.90#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:36:54.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:36:54.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:36:54.90$vck44/vb=1,4 2006.229.14:36:54.90#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.14:36:54.90#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.14:36:54.90#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:54.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:36:54.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:36:54.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:36:54.90#ibcon#enter wrdev, iclass 33, count 2 2006.229.14:36:54.90#ibcon#first serial, iclass 33, count 2 2006.229.14:36:54.90#ibcon#enter sib2, iclass 33, count 2 2006.229.14:36:54.90#ibcon#flushed, iclass 33, count 2 2006.229.14:36:54.90#ibcon#about to write, iclass 33, count 2 2006.229.14:36:54.90#ibcon#wrote, iclass 33, count 2 2006.229.14:36:54.90#ibcon#about to read 3, iclass 33, count 2 2006.229.14:36:54.92#ibcon#read 3, iclass 33, count 2 2006.229.14:36:54.92#ibcon#about to read 4, iclass 33, count 2 2006.229.14:36:54.92#ibcon#read 4, iclass 33, count 2 2006.229.14:36:54.92#ibcon#about to read 5, iclass 33, count 2 2006.229.14:36:54.92#ibcon#read 5, iclass 33, count 2 2006.229.14:36:54.92#ibcon#about to read 6, iclass 33, count 2 2006.229.14:36:54.92#ibcon#read 6, iclass 33, count 2 2006.229.14:36:54.92#ibcon#end of sib2, iclass 33, count 2 2006.229.14:36:54.92#ibcon#*mode == 0, iclass 33, count 2 2006.229.14:36:54.92#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.14:36:54.92#ibcon#[27=AT01-04\r\n] 2006.229.14:36:54.92#ibcon#*before write, iclass 33, count 2 2006.229.14:36:54.92#ibcon#enter sib2, iclass 33, count 2 2006.229.14:36:54.92#ibcon#flushed, iclass 33, count 2 2006.229.14:36:54.92#ibcon#about to write, iclass 33, count 2 2006.229.14:36:54.92#ibcon#wrote, iclass 33, count 2 2006.229.14:36:54.92#ibcon#about to read 3, iclass 33, count 2 2006.229.14:36:54.95#ibcon#read 3, iclass 33, count 2 2006.229.14:36:54.95#ibcon#about to read 4, iclass 33, count 2 2006.229.14:36:54.95#ibcon#read 4, iclass 33, count 2 2006.229.14:36:54.95#ibcon#about to read 5, iclass 33, count 2 2006.229.14:36:54.95#ibcon#read 5, iclass 33, count 2 2006.229.14:36:54.95#ibcon#about to read 6, iclass 33, count 2 2006.229.14:36:54.95#ibcon#read 6, iclass 33, count 2 2006.229.14:36:54.95#ibcon#end of sib2, iclass 33, count 2 2006.229.14:36:54.95#ibcon#*after write, iclass 33, count 2 2006.229.14:36:54.95#ibcon#*before return 0, iclass 33, count 2 2006.229.14:36:54.95#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:36:54.95#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:36:54.95#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.14:36:54.95#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:54.95#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:36:55.07#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:36:55.07#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:36:55.07#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:36:55.07#ibcon#first serial, iclass 33, count 0 2006.229.14:36:55.07#ibcon#enter sib2, iclass 33, count 0 2006.229.14:36:55.07#ibcon#flushed, iclass 33, count 0 2006.229.14:36:55.07#ibcon#about to write, iclass 33, count 0 2006.229.14:36:55.07#ibcon#wrote, iclass 33, count 0 2006.229.14:36:55.07#ibcon#about to read 3, iclass 33, count 0 2006.229.14:36:55.09#ibcon#read 3, iclass 33, count 0 2006.229.14:36:55.09#ibcon#about to read 4, iclass 33, count 0 2006.229.14:36:55.09#ibcon#read 4, iclass 33, count 0 2006.229.14:36:55.09#ibcon#about to read 5, iclass 33, count 0 2006.229.14:36:55.09#ibcon#read 5, iclass 33, count 0 2006.229.14:36:55.09#ibcon#about to read 6, iclass 33, count 0 2006.229.14:36:55.09#ibcon#read 6, iclass 33, count 0 2006.229.14:36:55.09#ibcon#end of sib2, iclass 33, count 0 2006.229.14:36:55.09#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:36:55.09#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:36:55.09#ibcon#[27=USB\r\n] 2006.229.14:36:55.09#ibcon#*before write, iclass 33, count 0 2006.229.14:36:55.09#ibcon#enter sib2, iclass 33, count 0 2006.229.14:36:55.09#ibcon#flushed, iclass 33, count 0 2006.229.14:36:55.09#ibcon#about to write, iclass 33, count 0 2006.229.14:36:55.09#ibcon#wrote, iclass 33, count 0 2006.229.14:36:55.09#ibcon#about to read 3, iclass 33, count 0 2006.229.14:36:55.12#ibcon#read 3, iclass 33, count 0 2006.229.14:36:55.12#ibcon#about to read 4, iclass 33, count 0 2006.229.14:36:55.12#ibcon#read 4, iclass 33, count 0 2006.229.14:36:55.12#ibcon#about to read 5, iclass 33, count 0 2006.229.14:36:55.12#ibcon#read 5, iclass 33, count 0 2006.229.14:36:55.12#ibcon#about to read 6, iclass 33, count 0 2006.229.14:36:55.12#ibcon#read 6, iclass 33, count 0 2006.229.14:36:55.12#ibcon#end of sib2, iclass 33, count 0 2006.229.14:36:55.12#ibcon#*after write, iclass 33, count 0 2006.229.14:36:55.12#ibcon#*before return 0, iclass 33, count 0 2006.229.14:36:55.12#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:36:55.12#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:36:55.12#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:36:55.12#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:36:55.12$vck44/vblo=2,634.99 2006.229.14:36:55.12#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.14:36:55.12#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.14:36:55.12#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:55.12#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:55.12#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:55.12#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:55.12#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:36:55.12#ibcon#first serial, iclass 35, count 0 2006.229.14:36:55.12#ibcon#enter sib2, iclass 35, count 0 2006.229.14:36:55.12#ibcon#flushed, iclass 35, count 0 2006.229.14:36:55.12#ibcon#about to write, iclass 35, count 0 2006.229.14:36:55.12#ibcon#wrote, iclass 35, count 0 2006.229.14:36:55.12#ibcon#about to read 3, iclass 35, count 0 2006.229.14:36:55.14#ibcon#read 3, iclass 35, count 0 2006.229.14:36:55.14#ibcon#about to read 4, iclass 35, count 0 2006.229.14:36:55.14#ibcon#read 4, iclass 35, count 0 2006.229.14:36:55.14#ibcon#about to read 5, iclass 35, count 0 2006.229.14:36:55.14#ibcon#read 5, iclass 35, count 0 2006.229.14:36:55.14#ibcon#about to read 6, iclass 35, count 0 2006.229.14:36:55.14#ibcon#read 6, iclass 35, count 0 2006.229.14:36:55.14#ibcon#end of sib2, iclass 35, count 0 2006.229.14:36:55.14#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:36:55.14#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:36:55.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:36:55.14#ibcon#*before write, iclass 35, count 0 2006.229.14:36:55.14#ibcon#enter sib2, iclass 35, count 0 2006.229.14:36:55.14#ibcon#flushed, iclass 35, count 0 2006.229.14:36:55.14#ibcon#about to write, iclass 35, count 0 2006.229.14:36:55.14#ibcon#wrote, iclass 35, count 0 2006.229.14:36:55.14#ibcon#about to read 3, iclass 35, count 0 2006.229.14:36:55.18#ibcon#read 3, iclass 35, count 0 2006.229.14:36:55.18#ibcon#about to read 4, iclass 35, count 0 2006.229.14:36:55.18#ibcon#read 4, iclass 35, count 0 2006.229.14:36:55.18#ibcon#about to read 5, iclass 35, count 0 2006.229.14:36:55.18#ibcon#read 5, iclass 35, count 0 2006.229.14:36:55.18#ibcon#about to read 6, iclass 35, count 0 2006.229.14:36:55.18#ibcon#read 6, iclass 35, count 0 2006.229.14:36:55.18#ibcon#end of sib2, iclass 35, count 0 2006.229.14:36:55.18#ibcon#*after write, iclass 35, count 0 2006.229.14:36:55.18#ibcon#*before return 0, iclass 35, count 0 2006.229.14:36:55.18#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:55.18#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:36:55.18#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:36:55.18#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:36:55.18$vck44/vb=2,4 2006.229.14:36:55.18#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.14:36:55.18#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.14:36:55.18#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:55.18#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:55.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:55.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:55.24#ibcon#enter wrdev, iclass 37, count 2 2006.229.14:36:55.24#ibcon#first serial, iclass 37, count 2 2006.229.14:36:55.24#ibcon#enter sib2, iclass 37, count 2 2006.229.14:36:55.24#ibcon#flushed, iclass 37, count 2 2006.229.14:36:55.24#ibcon#about to write, iclass 37, count 2 2006.229.14:36:55.24#ibcon#wrote, iclass 37, count 2 2006.229.14:36:55.24#ibcon#about to read 3, iclass 37, count 2 2006.229.14:36:55.26#ibcon#read 3, iclass 37, count 2 2006.229.14:36:55.26#ibcon#about to read 4, iclass 37, count 2 2006.229.14:36:55.26#ibcon#read 4, iclass 37, count 2 2006.229.14:36:55.26#ibcon#about to read 5, iclass 37, count 2 2006.229.14:36:55.26#ibcon#read 5, iclass 37, count 2 2006.229.14:36:55.26#ibcon#about to read 6, iclass 37, count 2 2006.229.14:36:55.26#ibcon#read 6, iclass 37, count 2 2006.229.14:36:55.26#ibcon#end of sib2, iclass 37, count 2 2006.229.14:36:55.26#ibcon#*mode == 0, iclass 37, count 2 2006.229.14:36:55.26#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.14:36:55.26#ibcon#[27=AT02-04\r\n] 2006.229.14:36:55.26#ibcon#*before write, iclass 37, count 2 2006.229.14:36:55.26#ibcon#enter sib2, iclass 37, count 2 2006.229.14:36:55.26#ibcon#flushed, iclass 37, count 2 2006.229.14:36:55.26#ibcon#about to write, iclass 37, count 2 2006.229.14:36:55.26#ibcon#wrote, iclass 37, count 2 2006.229.14:36:55.26#ibcon#about to read 3, iclass 37, count 2 2006.229.14:36:55.29#ibcon#read 3, iclass 37, count 2 2006.229.14:36:55.29#ibcon#about to read 4, iclass 37, count 2 2006.229.14:36:55.29#ibcon#read 4, iclass 37, count 2 2006.229.14:36:55.29#ibcon#about to read 5, iclass 37, count 2 2006.229.14:36:55.29#ibcon#read 5, iclass 37, count 2 2006.229.14:36:55.29#ibcon#about to read 6, iclass 37, count 2 2006.229.14:36:55.29#ibcon#read 6, iclass 37, count 2 2006.229.14:36:55.29#ibcon#end of sib2, iclass 37, count 2 2006.229.14:36:55.29#ibcon#*after write, iclass 37, count 2 2006.229.14:36:55.29#ibcon#*before return 0, iclass 37, count 2 2006.229.14:36:55.29#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:55.29#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:36:55.29#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.14:36:55.29#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:55.29#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:55.41#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:55.41#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:55.41#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:36:55.41#ibcon#first serial, iclass 37, count 0 2006.229.14:36:55.41#ibcon#enter sib2, iclass 37, count 0 2006.229.14:36:55.41#ibcon#flushed, iclass 37, count 0 2006.229.14:36:55.41#ibcon#about to write, iclass 37, count 0 2006.229.14:36:55.41#ibcon#wrote, iclass 37, count 0 2006.229.14:36:55.41#ibcon#about to read 3, iclass 37, count 0 2006.229.14:36:55.43#ibcon#read 3, iclass 37, count 0 2006.229.14:36:55.43#ibcon#about to read 4, iclass 37, count 0 2006.229.14:36:55.43#ibcon#read 4, iclass 37, count 0 2006.229.14:36:55.43#ibcon#about to read 5, iclass 37, count 0 2006.229.14:36:55.43#ibcon#read 5, iclass 37, count 0 2006.229.14:36:55.43#ibcon#about to read 6, iclass 37, count 0 2006.229.14:36:55.43#ibcon#read 6, iclass 37, count 0 2006.229.14:36:55.43#ibcon#end of sib2, iclass 37, count 0 2006.229.14:36:55.43#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:36:55.43#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:36:55.43#ibcon#[27=USB\r\n] 2006.229.14:36:55.43#ibcon#*before write, iclass 37, count 0 2006.229.14:36:55.43#ibcon#enter sib2, iclass 37, count 0 2006.229.14:36:55.43#ibcon#flushed, iclass 37, count 0 2006.229.14:36:55.43#ibcon#about to write, iclass 37, count 0 2006.229.14:36:55.43#ibcon#wrote, iclass 37, count 0 2006.229.14:36:55.43#ibcon#about to read 3, iclass 37, count 0 2006.229.14:36:55.46#ibcon#read 3, iclass 37, count 0 2006.229.14:36:55.46#ibcon#about to read 4, iclass 37, count 0 2006.229.14:36:55.46#ibcon#read 4, iclass 37, count 0 2006.229.14:36:55.46#ibcon#about to read 5, iclass 37, count 0 2006.229.14:36:55.46#ibcon#read 5, iclass 37, count 0 2006.229.14:36:55.46#ibcon#about to read 6, iclass 37, count 0 2006.229.14:36:55.46#ibcon#read 6, iclass 37, count 0 2006.229.14:36:55.46#ibcon#end of sib2, iclass 37, count 0 2006.229.14:36:55.46#ibcon#*after write, iclass 37, count 0 2006.229.14:36:55.46#ibcon#*before return 0, iclass 37, count 0 2006.229.14:36:55.46#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:55.46#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:36:55.46#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:36:55.46#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:36:55.46$vck44/vblo=3,649.99 2006.229.14:36:55.46#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.14:36:55.46#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.14:36:55.46#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:55.46#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:55.46#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:55.46#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:55.46#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:36:55.46#ibcon#first serial, iclass 39, count 0 2006.229.14:36:55.46#ibcon#enter sib2, iclass 39, count 0 2006.229.14:36:55.46#ibcon#flushed, iclass 39, count 0 2006.229.14:36:55.46#ibcon#about to write, iclass 39, count 0 2006.229.14:36:55.46#ibcon#wrote, iclass 39, count 0 2006.229.14:36:55.46#ibcon#about to read 3, iclass 39, count 0 2006.229.14:36:55.48#ibcon#read 3, iclass 39, count 0 2006.229.14:36:55.48#ibcon#about to read 4, iclass 39, count 0 2006.229.14:36:55.48#ibcon#read 4, iclass 39, count 0 2006.229.14:36:55.48#ibcon#about to read 5, iclass 39, count 0 2006.229.14:36:55.48#ibcon#read 5, iclass 39, count 0 2006.229.14:36:55.48#ibcon#about to read 6, iclass 39, count 0 2006.229.14:36:55.48#ibcon#read 6, iclass 39, count 0 2006.229.14:36:55.48#ibcon#end of sib2, iclass 39, count 0 2006.229.14:36:55.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:36:55.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:36:55.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:36:55.48#ibcon#*before write, iclass 39, count 0 2006.229.14:36:55.48#ibcon#enter sib2, iclass 39, count 0 2006.229.14:36:55.48#ibcon#flushed, iclass 39, count 0 2006.229.14:36:55.48#ibcon#about to write, iclass 39, count 0 2006.229.14:36:55.48#ibcon#wrote, iclass 39, count 0 2006.229.14:36:55.48#ibcon#about to read 3, iclass 39, count 0 2006.229.14:36:55.52#ibcon#read 3, iclass 39, count 0 2006.229.14:36:55.52#ibcon#about to read 4, iclass 39, count 0 2006.229.14:36:55.52#ibcon#read 4, iclass 39, count 0 2006.229.14:36:55.52#ibcon#about to read 5, iclass 39, count 0 2006.229.14:36:55.52#ibcon#read 5, iclass 39, count 0 2006.229.14:36:55.52#ibcon#about to read 6, iclass 39, count 0 2006.229.14:36:55.52#ibcon#read 6, iclass 39, count 0 2006.229.14:36:55.52#ibcon#end of sib2, iclass 39, count 0 2006.229.14:36:55.52#ibcon#*after write, iclass 39, count 0 2006.229.14:36:55.52#ibcon#*before return 0, iclass 39, count 0 2006.229.14:36:55.52#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:55.52#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:36:55.52#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:36:55.52#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:36:55.52$vck44/vb=3,4 2006.229.14:36:55.52#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.14:36:55.52#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.14:36:55.52#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:55.52#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:55.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:55.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:55.58#ibcon#enter wrdev, iclass 3, count 2 2006.229.14:36:55.58#ibcon#first serial, iclass 3, count 2 2006.229.14:36:55.58#ibcon#enter sib2, iclass 3, count 2 2006.229.14:36:55.58#ibcon#flushed, iclass 3, count 2 2006.229.14:36:55.58#ibcon#about to write, iclass 3, count 2 2006.229.14:36:55.58#ibcon#wrote, iclass 3, count 2 2006.229.14:36:55.58#ibcon#about to read 3, iclass 3, count 2 2006.229.14:36:55.60#ibcon#read 3, iclass 3, count 2 2006.229.14:36:55.60#ibcon#about to read 4, iclass 3, count 2 2006.229.14:36:55.60#ibcon#read 4, iclass 3, count 2 2006.229.14:36:55.60#ibcon#about to read 5, iclass 3, count 2 2006.229.14:36:55.60#ibcon#read 5, iclass 3, count 2 2006.229.14:36:55.60#ibcon#about to read 6, iclass 3, count 2 2006.229.14:36:55.60#ibcon#read 6, iclass 3, count 2 2006.229.14:36:55.60#ibcon#end of sib2, iclass 3, count 2 2006.229.14:36:55.60#ibcon#*mode == 0, iclass 3, count 2 2006.229.14:36:55.60#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.14:36:55.60#ibcon#[27=AT03-04\r\n] 2006.229.14:36:55.60#ibcon#*before write, iclass 3, count 2 2006.229.14:36:55.60#ibcon#enter sib2, iclass 3, count 2 2006.229.14:36:55.60#ibcon#flushed, iclass 3, count 2 2006.229.14:36:55.60#ibcon#about to write, iclass 3, count 2 2006.229.14:36:55.60#ibcon#wrote, iclass 3, count 2 2006.229.14:36:55.60#ibcon#about to read 3, iclass 3, count 2 2006.229.14:36:55.63#ibcon#read 3, iclass 3, count 2 2006.229.14:36:55.63#ibcon#about to read 4, iclass 3, count 2 2006.229.14:36:55.63#ibcon#read 4, iclass 3, count 2 2006.229.14:36:55.63#ibcon#about to read 5, iclass 3, count 2 2006.229.14:36:55.63#ibcon#read 5, iclass 3, count 2 2006.229.14:36:55.63#ibcon#about to read 6, iclass 3, count 2 2006.229.14:36:55.63#ibcon#read 6, iclass 3, count 2 2006.229.14:36:55.63#ibcon#end of sib2, iclass 3, count 2 2006.229.14:36:55.63#ibcon#*after write, iclass 3, count 2 2006.229.14:36:55.63#ibcon#*before return 0, iclass 3, count 2 2006.229.14:36:55.63#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:55.63#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:36:55.63#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.14:36:55.63#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:55.63#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:55.75#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:55.75#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:55.75#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:36:55.75#ibcon#first serial, iclass 3, count 0 2006.229.14:36:55.75#ibcon#enter sib2, iclass 3, count 0 2006.229.14:36:55.75#ibcon#flushed, iclass 3, count 0 2006.229.14:36:55.75#ibcon#about to write, iclass 3, count 0 2006.229.14:36:55.75#ibcon#wrote, iclass 3, count 0 2006.229.14:36:55.75#ibcon#about to read 3, iclass 3, count 0 2006.229.14:36:55.77#ibcon#read 3, iclass 3, count 0 2006.229.14:36:55.77#ibcon#about to read 4, iclass 3, count 0 2006.229.14:36:55.77#ibcon#read 4, iclass 3, count 0 2006.229.14:36:55.77#ibcon#about to read 5, iclass 3, count 0 2006.229.14:36:55.77#ibcon#read 5, iclass 3, count 0 2006.229.14:36:55.77#ibcon#about to read 6, iclass 3, count 0 2006.229.14:36:55.77#ibcon#read 6, iclass 3, count 0 2006.229.14:36:55.77#ibcon#end of sib2, iclass 3, count 0 2006.229.14:36:55.77#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:36:55.77#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:36:55.77#ibcon#[27=USB\r\n] 2006.229.14:36:55.77#ibcon#*before write, iclass 3, count 0 2006.229.14:36:55.77#ibcon#enter sib2, iclass 3, count 0 2006.229.14:36:55.77#ibcon#flushed, iclass 3, count 0 2006.229.14:36:55.77#ibcon#about to write, iclass 3, count 0 2006.229.14:36:55.77#ibcon#wrote, iclass 3, count 0 2006.229.14:36:55.77#ibcon#about to read 3, iclass 3, count 0 2006.229.14:36:55.80#ibcon#read 3, iclass 3, count 0 2006.229.14:36:55.80#ibcon#about to read 4, iclass 3, count 0 2006.229.14:36:55.80#ibcon#read 4, iclass 3, count 0 2006.229.14:36:55.80#ibcon#about to read 5, iclass 3, count 0 2006.229.14:36:55.80#ibcon#read 5, iclass 3, count 0 2006.229.14:36:55.80#ibcon#about to read 6, iclass 3, count 0 2006.229.14:36:55.80#ibcon#read 6, iclass 3, count 0 2006.229.14:36:55.80#ibcon#end of sib2, iclass 3, count 0 2006.229.14:36:55.80#ibcon#*after write, iclass 3, count 0 2006.229.14:36:55.80#ibcon#*before return 0, iclass 3, count 0 2006.229.14:36:55.80#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:55.80#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:36:55.80#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:36:55.80#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:36:55.80$vck44/vblo=4,679.99 2006.229.14:36:55.80#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.14:36:55.80#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.14:36:55.80#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:55.80#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:55.80#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:55.80#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:55.80#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:36:55.80#ibcon#first serial, iclass 5, count 0 2006.229.14:36:55.80#ibcon#enter sib2, iclass 5, count 0 2006.229.14:36:55.80#ibcon#flushed, iclass 5, count 0 2006.229.14:36:55.80#ibcon#about to write, iclass 5, count 0 2006.229.14:36:55.80#ibcon#wrote, iclass 5, count 0 2006.229.14:36:55.80#ibcon#about to read 3, iclass 5, count 0 2006.229.14:36:55.82#ibcon#read 3, iclass 5, count 0 2006.229.14:36:55.82#ibcon#about to read 4, iclass 5, count 0 2006.229.14:36:55.82#ibcon#read 4, iclass 5, count 0 2006.229.14:36:55.82#ibcon#about to read 5, iclass 5, count 0 2006.229.14:36:55.82#ibcon#read 5, iclass 5, count 0 2006.229.14:36:55.82#ibcon#about to read 6, iclass 5, count 0 2006.229.14:36:55.82#ibcon#read 6, iclass 5, count 0 2006.229.14:36:55.82#ibcon#end of sib2, iclass 5, count 0 2006.229.14:36:55.82#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:36:55.82#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:36:55.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:36:55.82#ibcon#*before write, iclass 5, count 0 2006.229.14:36:55.82#ibcon#enter sib2, iclass 5, count 0 2006.229.14:36:55.82#ibcon#flushed, iclass 5, count 0 2006.229.14:36:55.82#ibcon#about to write, iclass 5, count 0 2006.229.14:36:55.82#ibcon#wrote, iclass 5, count 0 2006.229.14:36:55.82#ibcon#about to read 3, iclass 5, count 0 2006.229.14:36:55.86#ibcon#read 3, iclass 5, count 0 2006.229.14:36:55.86#ibcon#about to read 4, iclass 5, count 0 2006.229.14:36:55.86#ibcon#read 4, iclass 5, count 0 2006.229.14:36:55.86#ibcon#about to read 5, iclass 5, count 0 2006.229.14:36:55.86#ibcon#read 5, iclass 5, count 0 2006.229.14:36:55.86#ibcon#about to read 6, iclass 5, count 0 2006.229.14:36:55.86#ibcon#read 6, iclass 5, count 0 2006.229.14:36:55.86#ibcon#end of sib2, iclass 5, count 0 2006.229.14:36:55.86#ibcon#*after write, iclass 5, count 0 2006.229.14:36:55.86#ibcon#*before return 0, iclass 5, count 0 2006.229.14:36:55.86#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:55.86#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:36:55.86#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:36:55.86#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:36:55.86$vck44/vb=4,4 2006.229.14:36:55.86#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.14:36:55.86#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.14:36:55.86#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:55.86#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:55.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:55.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:55.92#ibcon#enter wrdev, iclass 7, count 2 2006.229.14:36:55.92#ibcon#first serial, iclass 7, count 2 2006.229.14:36:55.92#ibcon#enter sib2, iclass 7, count 2 2006.229.14:36:55.92#ibcon#flushed, iclass 7, count 2 2006.229.14:36:55.92#ibcon#about to write, iclass 7, count 2 2006.229.14:36:55.92#ibcon#wrote, iclass 7, count 2 2006.229.14:36:55.92#ibcon#about to read 3, iclass 7, count 2 2006.229.14:36:55.94#ibcon#read 3, iclass 7, count 2 2006.229.14:36:55.94#ibcon#about to read 4, iclass 7, count 2 2006.229.14:36:55.94#ibcon#read 4, iclass 7, count 2 2006.229.14:36:55.94#ibcon#about to read 5, iclass 7, count 2 2006.229.14:36:55.94#ibcon#read 5, iclass 7, count 2 2006.229.14:36:55.94#ibcon#about to read 6, iclass 7, count 2 2006.229.14:36:55.94#ibcon#read 6, iclass 7, count 2 2006.229.14:36:55.94#ibcon#end of sib2, iclass 7, count 2 2006.229.14:36:55.94#ibcon#*mode == 0, iclass 7, count 2 2006.229.14:36:55.94#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.14:36:55.94#ibcon#[27=AT04-04\r\n] 2006.229.14:36:55.94#ibcon#*before write, iclass 7, count 2 2006.229.14:36:55.94#ibcon#enter sib2, iclass 7, count 2 2006.229.14:36:55.94#ibcon#flushed, iclass 7, count 2 2006.229.14:36:55.94#ibcon#about to write, iclass 7, count 2 2006.229.14:36:55.94#ibcon#wrote, iclass 7, count 2 2006.229.14:36:55.94#ibcon#about to read 3, iclass 7, count 2 2006.229.14:36:55.97#ibcon#read 3, iclass 7, count 2 2006.229.14:36:55.97#ibcon#about to read 4, iclass 7, count 2 2006.229.14:36:55.97#ibcon#read 4, iclass 7, count 2 2006.229.14:36:55.97#ibcon#about to read 5, iclass 7, count 2 2006.229.14:36:55.97#ibcon#read 5, iclass 7, count 2 2006.229.14:36:55.97#ibcon#about to read 6, iclass 7, count 2 2006.229.14:36:55.97#ibcon#read 6, iclass 7, count 2 2006.229.14:36:55.97#ibcon#end of sib2, iclass 7, count 2 2006.229.14:36:55.97#ibcon#*after write, iclass 7, count 2 2006.229.14:36:55.97#ibcon#*before return 0, iclass 7, count 2 2006.229.14:36:55.97#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:55.97#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:36:55.97#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.14:36:55.97#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:55.97#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:56.09#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:56.09#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:56.09#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:36:56.09#ibcon#first serial, iclass 7, count 0 2006.229.14:36:56.09#ibcon#enter sib2, iclass 7, count 0 2006.229.14:36:56.09#ibcon#flushed, iclass 7, count 0 2006.229.14:36:56.09#ibcon#about to write, iclass 7, count 0 2006.229.14:36:56.09#ibcon#wrote, iclass 7, count 0 2006.229.14:36:56.09#ibcon#about to read 3, iclass 7, count 0 2006.229.14:36:56.11#ibcon#read 3, iclass 7, count 0 2006.229.14:36:56.11#ibcon#about to read 4, iclass 7, count 0 2006.229.14:36:56.11#ibcon#read 4, iclass 7, count 0 2006.229.14:36:56.11#ibcon#about to read 5, iclass 7, count 0 2006.229.14:36:56.11#ibcon#read 5, iclass 7, count 0 2006.229.14:36:56.11#ibcon#about to read 6, iclass 7, count 0 2006.229.14:36:56.11#ibcon#read 6, iclass 7, count 0 2006.229.14:36:56.11#ibcon#end of sib2, iclass 7, count 0 2006.229.14:36:56.11#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:36:56.11#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:36:56.11#ibcon#[27=USB\r\n] 2006.229.14:36:56.11#ibcon#*before write, iclass 7, count 0 2006.229.14:36:56.11#ibcon#enter sib2, iclass 7, count 0 2006.229.14:36:56.11#ibcon#flushed, iclass 7, count 0 2006.229.14:36:56.11#ibcon#about to write, iclass 7, count 0 2006.229.14:36:56.11#ibcon#wrote, iclass 7, count 0 2006.229.14:36:56.11#ibcon#about to read 3, iclass 7, count 0 2006.229.14:36:56.14#ibcon#read 3, iclass 7, count 0 2006.229.14:36:56.14#ibcon#about to read 4, iclass 7, count 0 2006.229.14:36:56.14#ibcon#read 4, iclass 7, count 0 2006.229.14:36:56.14#ibcon#about to read 5, iclass 7, count 0 2006.229.14:36:56.14#ibcon#read 5, iclass 7, count 0 2006.229.14:36:56.14#ibcon#about to read 6, iclass 7, count 0 2006.229.14:36:56.14#ibcon#read 6, iclass 7, count 0 2006.229.14:36:56.14#ibcon#end of sib2, iclass 7, count 0 2006.229.14:36:56.14#ibcon#*after write, iclass 7, count 0 2006.229.14:36:56.14#ibcon#*before return 0, iclass 7, count 0 2006.229.14:36:56.14#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:56.14#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:36:56.14#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:36:56.14#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:36:56.14$vck44/vblo=5,709.99 2006.229.14:36:56.14#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.14:36:56.14#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.14:36:56.14#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:56.14#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:56.14#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:56.14#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:56.14#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:36:56.14#ibcon#first serial, iclass 11, count 0 2006.229.14:36:56.14#ibcon#enter sib2, iclass 11, count 0 2006.229.14:36:56.14#ibcon#flushed, iclass 11, count 0 2006.229.14:36:56.14#ibcon#about to write, iclass 11, count 0 2006.229.14:36:56.14#ibcon#wrote, iclass 11, count 0 2006.229.14:36:56.14#ibcon#about to read 3, iclass 11, count 0 2006.229.14:36:56.16#ibcon#read 3, iclass 11, count 0 2006.229.14:36:56.16#ibcon#about to read 4, iclass 11, count 0 2006.229.14:36:56.16#ibcon#read 4, iclass 11, count 0 2006.229.14:36:56.16#ibcon#about to read 5, iclass 11, count 0 2006.229.14:36:56.16#ibcon#read 5, iclass 11, count 0 2006.229.14:36:56.16#ibcon#about to read 6, iclass 11, count 0 2006.229.14:36:56.16#ibcon#read 6, iclass 11, count 0 2006.229.14:36:56.16#ibcon#end of sib2, iclass 11, count 0 2006.229.14:36:56.16#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:36:56.16#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:36:56.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:36:56.16#ibcon#*before write, iclass 11, count 0 2006.229.14:36:56.16#ibcon#enter sib2, iclass 11, count 0 2006.229.14:36:56.16#ibcon#flushed, iclass 11, count 0 2006.229.14:36:56.16#ibcon#about to write, iclass 11, count 0 2006.229.14:36:56.16#ibcon#wrote, iclass 11, count 0 2006.229.14:36:56.16#ibcon#about to read 3, iclass 11, count 0 2006.229.14:36:56.20#ibcon#read 3, iclass 11, count 0 2006.229.14:36:56.20#ibcon#about to read 4, iclass 11, count 0 2006.229.14:36:56.20#ibcon#read 4, iclass 11, count 0 2006.229.14:36:56.20#ibcon#about to read 5, iclass 11, count 0 2006.229.14:36:56.20#ibcon#read 5, iclass 11, count 0 2006.229.14:36:56.20#ibcon#about to read 6, iclass 11, count 0 2006.229.14:36:56.20#ibcon#read 6, iclass 11, count 0 2006.229.14:36:56.20#ibcon#end of sib2, iclass 11, count 0 2006.229.14:36:56.20#ibcon#*after write, iclass 11, count 0 2006.229.14:36:56.20#ibcon#*before return 0, iclass 11, count 0 2006.229.14:36:56.20#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:56.20#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:36:56.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:36:56.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:36:56.20$vck44/vb=5,4 2006.229.14:36:56.20#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.14:36:56.20#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.14:36:56.20#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:56.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:56.26#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:56.26#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:56.26#ibcon#enter wrdev, iclass 13, count 2 2006.229.14:36:56.26#ibcon#first serial, iclass 13, count 2 2006.229.14:36:56.26#ibcon#enter sib2, iclass 13, count 2 2006.229.14:36:56.26#ibcon#flushed, iclass 13, count 2 2006.229.14:36:56.26#ibcon#about to write, iclass 13, count 2 2006.229.14:36:56.26#ibcon#wrote, iclass 13, count 2 2006.229.14:36:56.26#ibcon#about to read 3, iclass 13, count 2 2006.229.14:36:56.28#ibcon#read 3, iclass 13, count 2 2006.229.14:36:56.28#ibcon#about to read 4, iclass 13, count 2 2006.229.14:36:56.28#ibcon#read 4, iclass 13, count 2 2006.229.14:36:56.28#ibcon#about to read 5, iclass 13, count 2 2006.229.14:36:56.28#ibcon#read 5, iclass 13, count 2 2006.229.14:36:56.28#ibcon#about to read 6, iclass 13, count 2 2006.229.14:36:56.28#ibcon#read 6, iclass 13, count 2 2006.229.14:36:56.28#ibcon#end of sib2, iclass 13, count 2 2006.229.14:36:56.28#ibcon#*mode == 0, iclass 13, count 2 2006.229.14:36:56.28#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.14:36:56.28#ibcon#[27=AT05-04\r\n] 2006.229.14:36:56.28#ibcon#*before write, iclass 13, count 2 2006.229.14:36:56.28#ibcon#enter sib2, iclass 13, count 2 2006.229.14:36:56.28#ibcon#flushed, iclass 13, count 2 2006.229.14:36:56.28#ibcon#about to write, iclass 13, count 2 2006.229.14:36:56.28#ibcon#wrote, iclass 13, count 2 2006.229.14:36:56.28#ibcon#about to read 3, iclass 13, count 2 2006.229.14:36:56.31#ibcon#read 3, iclass 13, count 2 2006.229.14:36:56.31#ibcon#about to read 4, iclass 13, count 2 2006.229.14:36:56.31#ibcon#read 4, iclass 13, count 2 2006.229.14:36:56.31#ibcon#about to read 5, iclass 13, count 2 2006.229.14:36:56.31#ibcon#read 5, iclass 13, count 2 2006.229.14:36:56.31#ibcon#about to read 6, iclass 13, count 2 2006.229.14:36:56.31#ibcon#read 6, iclass 13, count 2 2006.229.14:36:56.31#ibcon#end of sib2, iclass 13, count 2 2006.229.14:36:56.31#ibcon#*after write, iclass 13, count 2 2006.229.14:36:56.31#ibcon#*before return 0, iclass 13, count 2 2006.229.14:36:56.31#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:56.31#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:36:56.31#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.14:36:56.31#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:56.31#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:56.43#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:56.43#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:56.43#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:36:56.43#ibcon#first serial, iclass 13, count 0 2006.229.14:36:56.43#ibcon#enter sib2, iclass 13, count 0 2006.229.14:36:56.43#ibcon#flushed, iclass 13, count 0 2006.229.14:36:56.43#ibcon#about to write, iclass 13, count 0 2006.229.14:36:56.43#ibcon#wrote, iclass 13, count 0 2006.229.14:36:56.43#ibcon#about to read 3, iclass 13, count 0 2006.229.14:36:56.45#ibcon#read 3, iclass 13, count 0 2006.229.14:36:56.45#ibcon#about to read 4, iclass 13, count 0 2006.229.14:36:56.45#ibcon#read 4, iclass 13, count 0 2006.229.14:36:56.45#ibcon#about to read 5, iclass 13, count 0 2006.229.14:36:56.45#ibcon#read 5, iclass 13, count 0 2006.229.14:36:56.45#ibcon#about to read 6, iclass 13, count 0 2006.229.14:36:56.45#ibcon#read 6, iclass 13, count 0 2006.229.14:36:56.45#ibcon#end of sib2, iclass 13, count 0 2006.229.14:36:56.45#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:36:56.45#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:36:56.45#ibcon#[27=USB\r\n] 2006.229.14:36:56.45#ibcon#*before write, iclass 13, count 0 2006.229.14:36:56.45#ibcon#enter sib2, iclass 13, count 0 2006.229.14:36:56.45#ibcon#flushed, iclass 13, count 0 2006.229.14:36:56.45#ibcon#about to write, iclass 13, count 0 2006.229.14:36:56.45#ibcon#wrote, iclass 13, count 0 2006.229.14:36:56.45#ibcon#about to read 3, iclass 13, count 0 2006.229.14:36:56.48#ibcon#read 3, iclass 13, count 0 2006.229.14:36:56.48#ibcon#about to read 4, iclass 13, count 0 2006.229.14:36:56.48#ibcon#read 4, iclass 13, count 0 2006.229.14:36:56.48#ibcon#about to read 5, iclass 13, count 0 2006.229.14:36:56.48#ibcon#read 5, iclass 13, count 0 2006.229.14:36:56.48#ibcon#about to read 6, iclass 13, count 0 2006.229.14:36:56.48#ibcon#read 6, iclass 13, count 0 2006.229.14:36:56.48#ibcon#end of sib2, iclass 13, count 0 2006.229.14:36:56.48#ibcon#*after write, iclass 13, count 0 2006.229.14:36:56.48#ibcon#*before return 0, iclass 13, count 0 2006.229.14:36:56.48#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:56.48#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:36:56.48#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:36:56.48#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:36:56.48$vck44/vblo=6,719.99 2006.229.14:36:56.48#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.14:36:56.48#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.14:36:56.48#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:56.48#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:56.48#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:56.48#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:56.48#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:36:56.48#ibcon#first serial, iclass 15, count 0 2006.229.14:36:56.48#ibcon#enter sib2, iclass 15, count 0 2006.229.14:36:56.48#ibcon#flushed, iclass 15, count 0 2006.229.14:36:56.48#ibcon#about to write, iclass 15, count 0 2006.229.14:36:56.48#ibcon#wrote, iclass 15, count 0 2006.229.14:36:56.48#ibcon#about to read 3, iclass 15, count 0 2006.229.14:36:56.50#ibcon#read 3, iclass 15, count 0 2006.229.14:36:56.50#ibcon#about to read 4, iclass 15, count 0 2006.229.14:36:56.50#ibcon#read 4, iclass 15, count 0 2006.229.14:36:56.50#ibcon#about to read 5, iclass 15, count 0 2006.229.14:36:56.50#ibcon#read 5, iclass 15, count 0 2006.229.14:36:56.50#ibcon#about to read 6, iclass 15, count 0 2006.229.14:36:56.50#ibcon#read 6, iclass 15, count 0 2006.229.14:36:56.50#ibcon#end of sib2, iclass 15, count 0 2006.229.14:36:56.50#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:36:56.50#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:36:56.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:36:56.50#ibcon#*before write, iclass 15, count 0 2006.229.14:36:56.50#ibcon#enter sib2, iclass 15, count 0 2006.229.14:36:56.50#ibcon#flushed, iclass 15, count 0 2006.229.14:36:56.50#ibcon#about to write, iclass 15, count 0 2006.229.14:36:56.50#ibcon#wrote, iclass 15, count 0 2006.229.14:36:56.50#ibcon#about to read 3, iclass 15, count 0 2006.229.14:36:56.54#ibcon#read 3, iclass 15, count 0 2006.229.14:36:56.54#ibcon#about to read 4, iclass 15, count 0 2006.229.14:36:56.54#ibcon#read 4, iclass 15, count 0 2006.229.14:36:56.54#ibcon#about to read 5, iclass 15, count 0 2006.229.14:36:56.54#ibcon#read 5, iclass 15, count 0 2006.229.14:36:56.54#ibcon#about to read 6, iclass 15, count 0 2006.229.14:36:56.54#ibcon#read 6, iclass 15, count 0 2006.229.14:36:56.54#ibcon#end of sib2, iclass 15, count 0 2006.229.14:36:56.54#ibcon#*after write, iclass 15, count 0 2006.229.14:36:56.54#ibcon#*before return 0, iclass 15, count 0 2006.229.14:36:56.54#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:56.54#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:36:56.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:36:56.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:36:56.54$vck44/vb=6,4 2006.229.14:36:56.54#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.14:36:56.54#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.14:36:56.54#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:56.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:56.60#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:56.60#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:56.60#ibcon#enter wrdev, iclass 17, count 2 2006.229.14:36:56.60#ibcon#first serial, iclass 17, count 2 2006.229.14:36:56.60#ibcon#enter sib2, iclass 17, count 2 2006.229.14:36:56.60#ibcon#flushed, iclass 17, count 2 2006.229.14:36:56.60#ibcon#about to write, iclass 17, count 2 2006.229.14:36:56.60#ibcon#wrote, iclass 17, count 2 2006.229.14:36:56.60#ibcon#about to read 3, iclass 17, count 2 2006.229.14:36:56.62#ibcon#read 3, iclass 17, count 2 2006.229.14:36:56.62#ibcon#about to read 4, iclass 17, count 2 2006.229.14:36:56.62#ibcon#read 4, iclass 17, count 2 2006.229.14:36:56.62#ibcon#about to read 5, iclass 17, count 2 2006.229.14:36:56.62#ibcon#read 5, iclass 17, count 2 2006.229.14:36:56.62#ibcon#about to read 6, iclass 17, count 2 2006.229.14:36:56.62#ibcon#read 6, iclass 17, count 2 2006.229.14:36:56.62#ibcon#end of sib2, iclass 17, count 2 2006.229.14:36:56.62#ibcon#*mode == 0, iclass 17, count 2 2006.229.14:36:56.62#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.14:36:56.62#ibcon#[27=AT06-04\r\n] 2006.229.14:36:56.62#ibcon#*before write, iclass 17, count 2 2006.229.14:36:56.62#ibcon#enter sib2, iclass 17, count 2 2006.229.14:36:56.62#ibcon#flushed, iclass 17, count 2 2006.229.14:36:56.62#ibcon#about to write, iclass 17, count 2 2006.229.14:36:56.62#ibcon#wrote, iclass 17, count 2 2006.229.14:36:56.62#ibcon#about to read 3, iclass 17, count 2 2006.229.14:36:56.65#ibcon#read 3, iclass 17, count 2 2006.229.14:36:56.65#ibcon#about to read 4, iclass 17, count 2 2006.229.14:36:56.65#ibcon#read 4, iclass 17, count 2 2006.229.14:36:56.65#ibcon#about to read 5, iclass 17, count 2 2006.229.14:36:56.65#ibcon#read 5, iclass 17, count 2 2006.229.14:36:56.65#ibcon#about to read 6, iclass 17, count 2 2006.229.14:36:56.65#ibcon#read 6, iclass 17, count 2 2006.229.14:36:56.65#ibcon#end of sib2, iclass 17, count 2 2006.229.14:36:56.65#ibcon#*after write, iclass 17, count 2 2006.229.14:36:56.65#ibcon#*before return 0, iclass 17, count 2 2006.229.14:36:56.65#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:56.65#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:36:56.65#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.14:36:56.65#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:56.65#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:56.77#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:56.77#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:56.77#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:36:56.77#ibcon#first serial, iclass 17, count 0 2006.229.14:36:56.77#ibcon#enter sib2, iclass 17, count 0 2006.229.14:36:56.77#ibcon#flushed, iclass 17, count 0 2006.229.14:36:56.77#ibcon#about to write, iclass 17, count 0 2006.229.14:36:56.77#ibcon#wrote, iclass 17, count 0 2006.229.14:36:56.77#ibcon#about to read 3, iclass 17, count 0 2006.229.14:36:56.79#ibcon#read 3, iclass 17, count 0 2006.229.14:36:56.79#ibcon#about to read 4, iclass 17, count 0 2006.229.14:36:56.79#ibcon#read 4, iclass 17, count 0 2006.229.14:36:56.79#ibcon#about to read 5, iclass 17, count 0 2006.229.14:36:56.79#ibcon#read 5, iclass 17, count 0 2006.229.14:36:56.79#ibcon#about to read 6, iclass 17, count 0 2006.229.14:36:56.79#ibcon#read 6, iclass 17, count 0 2006.229.14:36:56.79#ibcon#end of sib2, iclass 17, count 0 2006.229.14:36:56.79#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:36:56.79#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:36:56.79#ibcon#[27=USB\r\n] 2006.229.14:36:56.79#ibcon#*before write, iclass 17, count 0 2006.229.14:36:56.79#ibcon#enter sib2, iclass 17, count 0 2006.229.14:36:56.79#ibcon#flushed, iclass 17, count 0 2006.229.14:36:56.79#ibcon#about to write, iclass 17, count 0 2006.229.14:36:56.79#ibcon#wrote, iclass 17, count 0 2006.229.14:36:56.79#ibcon#about to read 3, iclass 17, count 0 2006.229.14:36:56.82#ibcon#read 3, iclass 17, count 0 2006.229.14:36:56.82#ibcon#about to read 4, iclass 17, count 0 2006.229.14:36:56.82#ibcon#read 4, iclass 17, count 0 2006.229.14:36:56.82#ibcon#about to read 5, iclass 17, count 0 2006.229.14:36:56.82#ibcon#read 5, iclass 17, count 0 2006.229.14:36:56.82#ibcon#about to read 6, iclass 17, count 0 2006.229.14:36:56.82#ibcon#read 6, iclass 17, count 0 2006.229.14:36:56.82#ibcon#end of sib2, iclass 17, count 0 2006.229.14:36:56.82#ibcon#*after write, iclass 17, count 0 2006.229.14:36:56.82#ibcon#*before return 0, iclass 17, count 0 2006.229.14:36:56.82#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:56.82#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:36:56.82#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:36:56.82#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:36:56.82$vck44/vblo=7,734.99 2006.229.14:36:56.82#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.14:36:56.82#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.14:36:56.82#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:56.82#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:56.82#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:56.82#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:56.82#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:36:56.82#ibcon#first serial, iclass 19, count 0 2006.229.14:36:56.82#ibcon#enter sib2, iclass 19, count 0 2006.229.14:36:56.82#ibcon#flushed, iclass 19, count 0 2006.229.14:36:56.82#ibcon#about to write, iclass 19, count 0 2006.229.14:36:56.82#ibcon#wrote, iclass 19, count 0 2006.229.14:36:56.82#ibcon#about to read 3, iclass 19, count 0 2006.229.14:36:56.84#ibcon#read 3, iclass 19, count 0 2006.229.14:36:56.84#ibcon#about to read 4, iclass 19, count 0 2006.229.14:36:56.84#ibcon#read 4, iclass 19, count 0 2006.229.14:36:56.84#ibcon#about to read 5, iclass 19, count 0 2006.229.14:36:56.84#ibcon#read 5, iclass 19, count 0 2006.229.14:36:56.84#ibcon#about to read 6, iclass 19, count 0 2006.229.14:36:56.84#ibcon#read 6, iclass 19, count 0 2006.229.14:36:56.84#ibcon#end of sib2, iclass 19, count 0 2006.229.14:36:56.84#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:36:56.84#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:36:56.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:36:56.84#ibcon#*before write, iclass 19, count 0 2006.229.14:36:56.84#ibcon#enter sib2, iclass 19, count 0 2006.229.14:36:56.84#ibcon#flushed, iclass 19, count 0 2006.229.14:36:56.84#ibcon#about to write, iclass 19, count 0 2006.229.14:36:56.84#ibcon#wrote, iclass 19, count 0 2006.229.14:36:56.84#ibcon#about to read 3, iclass 19, count 0 2006.229.14:36:56.88#ibcon#read 3, iclass 19, count 0 2006.229.14:36:56.88#ibcon#about to read 4, iclass 19, count 0 2006.229.14:36:56.88#ibcon#read 4, iclass 19, count 0 2006.229.14:36:56.88#ibcon#about to read 5, iclass 19, count 0 2006.229.14:36:56.88#ibcon#read 5, iclass 19, count 0 2006.229.14:36:56.88#ibcon#about to read 6, iclass 19, count 0 2006.229.14:36:56.88#ibcon#read 6, iclass 19, count 0 2006.229.14:36:56.88#ibcon#end of sib2, iclass 19, count 0 2006.229.14:36:56.88#ibcon#*after write, iclass 19, count 0 2006.229.14:36:56.88#ibcon#*before return 0, iclass 19, count 0 2006.229.14:36:56.88#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:56.88#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:36:56.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:36:56.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:36:56.88$vck44/vb=7,4 2006.229.14:36:56.88#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.14:36:56.88#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.14:36:56.88#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:56.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:56.94#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:56.94#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:56.94#ibcon#enter wrdev, iclass 21, count 2 2006.229.14:36:56.94#ibcon#first serial, iclass 21, count 2 2006.229.14:36:56.94#ibcon#enter sib2, iclass 21, count 2 2006.229.14:36:56.94#ibcon#flushed, iclass 21, count 2 2006.229.14:36:56.94#ibcon#about to write, iclass 21, count 2 2006.229.14:36:56.94#ibcon#wrote, iclass 21, count 2 2006.229.14:36:56.94#ibcon#about to read 3, iclass 21, count 2 2006.229.14:36:56.96#ibcon#read 3, iclass 21, count 2 2006.229.14:36:56.96#ibcon#about to read 4, iclass 21, count 2 2006.229.14:36:56.96#ibcon#read 4, iclass 21, count 2 2006.229.14:36:56.96#ibcon#about to read 5, iclass 21, count 2 2006.229.14:36:56.96#ibcon#read 5, iclass 21, count 2 2006.229.14:36:56.96#ibcon#about to read 6, iclass 21, count 2 2006.229.14:36:56.96#ibcon#read 6, iclass 21, count 2 2006.229.14:36:56.96#ibcon#end of sib2, iclass 21, count 2 2006.229.14:36:56.96#ibcon#*mode == 0, iclass 21, count 2 2006.229.14:36:56.96#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.14:36:56.96#ibcon#[27=AT07-04\r\n] 2006.229.14:36:56.96#ibcon#*before write, iclass 21, count 2 2006.229.14:36:56.96#ibcon#enter sib2, iclass 21, count 2 2006.229.14:36:56.96#ibcon#flushed, iclass 21, count 2 2006.229.14:36:56.96#ibcon#about to write, iclass 21, count 2 2006.229.14:36:56.96#ibcon#wrote, iclass 21, count 2 2006.229.14:36:56.96#ibcon#about to read 3, iclass 21, count 2 2006.229.14:36:56.99#ibcon#read 3, iclass 21, count 2 2006.229.14:36:56.99#ibcon#about to read 4, iclass 21, count 2 2006.229.14:36:56.99#ibcon#read 4, iclass 21, count 2 2006.229.14:36:56.99#ibcon#about to read 5, iclass 21, count 2 2006.229.14:36:56.99#ibcon#read 5, iclass 21, count 2 2006.229.14:36:56.99#ibcon#about to read 6, iclass 21, count 2 2006.229.14:36:56.99#ibcon#read 6, iclass 21, count 2 2006.229.14:36:56.99#ibcon#end of sib2, iclass 21, count 2 2006.229.14:36:56.99#ibcon#*after write, iclass 21, count 2 2006.229.14:36:56.99#ibcon#*before return 0, iclass 21, count 2 2006.229.14:36:56.99#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:56.99#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:36:56.99#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.14:36:56.99#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:56.99#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:57.11#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:57.11#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:57.11#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:36:57.11#ibcon#first serial, iclass 21, count 0 2006.229.14:36:57.11#ibcon#enter sib2, iclass 21, count 0 2006.229.14:36:57.11#ibcon#flushed, iclass 21, count 0 2006.229.14:36:57.11#ibcon#about to write, iclass 21, count 0 2006.229.14:36:57.11#ibcon#wrote, iclass 21, count 0 2006.229.14:36:57.11#ibcon#about to read 3, iclass 21, count 0 2006.229.14:36:57.13#ibcon#read 3, iclass 21, count 0 2006.229.14:36:57.13#ibcon#about to read 4, iclass 21, count 0 2006.229.14:36:57.13#ibcon#read 4, iclass 21, count 0 2006.229.14:36:57.13#ibcon#about to read 5, iclass 21, count 0 2006.229.14:36:57.13#ibcon#read 5, iclass 21, count 0 2006.229.14:36:57.13#ibcon#about to read 6, iclass 21, count 0 2006.229.14:36:57.13#ibcon#read 6, iclass 21, count 0 2006.229.14:36:57.13#ibcon#end of sib2, iclass 21, count 0 2006.229.14:36:57.13#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:36:57.13#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:36:57.13#ibcon#[27=USB\r\n] 2006.229.14:36:57.13#ibcon#*before write, iclass 21, count 0 2006.229.14:36:57.13#ibcon#enter sib2, iclass 21, count 0 2006.229.14:36:57.13#ibcon#flushed, iclass 21, count 0 2006.229.14:36:57.13#ibcon#about to write, iclass 21, count 0 2006.229.14:36:57.13#ibcon#wrote, iclass 21, count 0 2006.229.14:36:57.13#ibcon#about to read 3, iclass 21, count 0 2006.229.14:36:57.16#ibcon#read 3, iclass 21, count 0 2006.229.14:36:57.16#ibcon#about to read 4, iclass 21, count 0 2006.229.14:36:57.16#ibcon#read 4, iclass 21, count 0 2006.229.14:36:57.16#ibcon#about to read 5, iclass 21, count 0 2006.229.14:36:57.16#ibcon#read 5, iclass 21, count 0 2006.229.14:36:57.16#ibcon#about to read 6, iclass 21, count 0 2006.229.14:36:57.16#ibcon#read 6, iclass 21, count 0 2006.229.14:36:57.16#ibcon#end of sib2, iclass 21, count 0 2006.229.14:36:57.16#ibcon#*after write, iclass 21, count 0 2006.229.14:36:57.16#ibcon#*before return 0, iclass 21, count 0 2006.229.14:36:57.16#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:57.16#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:36:57.16#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:36:57.16#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:36:57.16$vck44/vblo=8,744.99 2006.229.14:36:57.16#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.14:36:57.16#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.14:36:57.16#ibcon#ireg 17 cls_cnt 0 2006.229.14:36:57.16#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:57.16#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:57.16#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:57.16#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:36:57.16#ibcon#first serial, iclass 23, count 0 2006.229.14:36:57.16#ibcon#enter sib2, iclass 23, count 0 2006.229.14:36:57.16#ibcon#flushed, iclass 23, count 0 2006.229.14:36:57.16#ibcon#about to write, iclass 23, count 0 2006.229.14:36:57.16#ibcon#wrote, iclass 23, count 0 2006.229.14:36:57.16#ibcon#about to read 3, iclass 23, count 0 2006.229.14:36:57.18#ibcon#read 3, iclass 23, count 0 2006.229.14:36:57.18#ibcon#about to read 4, iclass 23, count 0 2006.229.14:36:57.18#ibcon#read 4, iclass 23, count 0 2006.229.14:36:57.18#ibcon#about to read 5, iclass 23, count 0 2006.229.14:36:57.18#ibcon#read 5, iclass 23, count 0 2006.229.14:36:57.18#ibcon#about to read 6, iclass 23, count 0 2006.229.14:36:57.18#ibcon#read 6, iclass 23, count 0 2006.229.14:36:57.18#ibcon#end of sib2, iclass 23, count 0 2006.229.14:36:57.18#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:36:57.18#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:36:57.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:36:57.18#ibcon#*before write, iclass 23, count 0 2006.229.14:36:57.18#ibcon#enter sib2, iclass 23, count 0 2006.229.14:36:57.18#ibcon#flushed, iclass 23, count 0 2006.229.14:36:57.18#ibcon#about to write, iclass 23, count 0 2006.229.14:36:57.18#ibcon#wrote, iclass 23, count 0 2006.229.14:36:57.18#ibcon#about to read 3, iclass 23, count 0 2006.229.14:36:57.22#ibcon#read 3, iclass 23, count 0 2006.229.14:36:57.22#ibcon#about to read 4, iclass 23, count 0 2006.229.14:36:57.22#ibcon#read 4, iclass 23, count 0 2006.229.14:36:57.22#ibcon#about to read 5, iclass 23, count 0 2006.229.14:36:57.22#ibcon#read 5, iclass 23, count 0 2006.229.14:36:57.22#ibcon#about to read 6, iclass 23, count 0 2006.229.14:36:57.22#ibcon#read 6, iclass 23, count 0 2006.229.14:36:57.22#ibcon#end of sib2, iclass 23, count 0 2006.229.14:36:57.22#ibcon#*after write, iclass 23, count 0 2006.229.14:36:57.22#ibcon#*before return 0, iclass 23, count 0 2006.229.14:36:57.22#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:57.22#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:36:57.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:36:57.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:36:57.22$vck44/vb=8,4 2006.229.14:36:57.22#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.14:36:57.22#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.14:36:57.22#ibcon#ireg 11 cls_cnt 2 2006.229.14:36:57.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:57.28#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:57.28#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:57.28#ibcon#enter wrdev, iclass 25, count 2 2006.229.14:36:57.28#ibcon#first serial, iclass 25, count 2 2006.229.14:36:57.28#ibcon#enter sib2, iclass 25, count 2 2006.229.14:36:57.28#ibcon#flushed, iclass 25, count 2 2006.229.14:36:57.28#ibcon#about to write, iclass 25, count 2 2006.229.14:36:57.28#ibcon#wrote, iclass 25, count 2 2006.229.14:36:57.28#ibcon#about to read 3, iclass 25, count 2 2006.229.14:36:57.30#ibcon#read 3, iclass 25, count 2 2006.229.14:36:57.30#ibcon#about to read 4, iclass 25, count 2 2006.229.14:36:57.30#ibcon#read 4, iclass 25, count 2 2006.229.14:36:57.30#ibcon#about to read 5, iclass 25, count 2 2006.229.14:36:57.30#ibcon#read 5, iclass 25, count 2 2006.229.14:36:57.30#ibcon#about to read 6, iclass 25, count 2 2006.229.14:36:57.30#ibcon#read 6, iclass 25, count 2 2006.229.14:36:57.30#ibcon#end of sib2, iclass 25, count 2 2006.229.14:36:57.30#ibcon#*mode == 0, iclass 25, count 2 2006.229.14:36:57.30#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.14:36:57.30#ibcon#[27=AT08-04\r\n] 2006.229.14:36:57.30#ibcon#*before write, iclass 25, count 2 2006.229.14:36:57.30#ibcon#enter sib2, iclass 25, count 2 2006.229.14:36:57.30#ibcon#flushed, iclass 25, count 2 2006.229.14:36:57.30#ibcon#about to write, iclass 25, count 2 2006.229.14:36:57.30#ibcon#wrote, iclass 25, count 2 2006.229.14:36:57.30#ibcon#about to read 3, iclass 25, count 2 2006.229.14:36:57.33#ibcon#read 3, iclass 25, count 2 2006.229.14:36:57.33#ibcon#about to read 4, iclass 25, count 2 2006.229.14:36:57.33#ibcon#read 4, iclass 25, count 2 2006.229.14:36:57.33#ibcon#about to read 5, iclass 25, count 2 2006.229.14:36:57.33#ibcon#read 5, iclass 25, count 2 2006.229.14:36:57.33#ibcon#about to read 6, iclass 25, count 2 2006.229.14:36:57.33#ibcon#read 6, iclass 25, count 2 2006.229.14:36:57.33#ibcon#end of sib2, iclass 25, count 2 2006.229.14:36:57.33#ibcon#*after write, iclass 25, count 2 2006.229.14:36:57.33#ibcon#*before return 0, iclass 25, count 2 2006.229.14:36:57.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:57.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:36:57.33#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.14:36:57.33#ibcon#ireg 7 cls_cnt 0 2006.229.14:36:57.33#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:57.45#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:57.45#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:57.45#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:36:57.45#ibcon#first serial, iclass 25, count 0 2006.229.14:36:57.45#ibcon#enter sib2, iclass 25, count 0 2006.229.14:36:57.45#ibcon#flushed, iclass 25, count 0 2006.229.14:36:57.45#ibcon#about to write, iclass 25, count 0 2006.229.14:36:57.45#ibcon#wrote, iclass 25, count 0 2006.229.14:36:57.45#ibcon#about to read 3, iclass 25, count 0 2006.229.14:36:57.47#ibcon#read 3, iclass 25, count 0 2006.229.14:36:57.47#ibcon#about to read 4, iclass 25, count 0 2006.229.14:36:57.47#ibcon#read 4, iclass 25, count 0 2006.229.14:36:57.47#ibcon#about to read 5, iclass 25, count 0 2006.229.14:36:57.47#ibcon#read 5, iclass 25, count 0 2006.229.14:36:57.47#ibcon#about to read 6, iclass 25, count 0 2006.229.14:36:57.47#ibcon#read 6, iclass 25, count 0 2006.229.14:36:57.47#ibcon#end of sib2, iclass 25, count 0 2006.229.14:36:57.47#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:36:57.47#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:36:57.47#ibcon#[27=USB\r\n] 2006.229.14:36:57.47#ibcon#*before write, iclass 25, count 0 2006.229.14:36:57.47#ibcon#enter sib2, iclass 25, count 0 2006.229.14:36:57.47#ibcon#flushed, iclass 25, count 0 2006.229.14:36:57.47#ibcon#about to write, iclass 25, count 0 2006.229.14:36:57.47#ibcon#wrote, iclass 25, count 0 2006.229.14:36:57.47#ibcon#about to read 3, iclass 25, count 0 2006.229.14:36:57.50#ibcon#read 3, iclass 25, count 0 2006.229.14:36:57.50#ibcon#about to read 4, iclass 25, count 0 2006.229.14:36:57.50#ibcon#read 4, iclass 25, count 0 2006.229.14:36:57.50#ibcon#about to read 5, iclass 25, count 0 2006.229.14:36:57.50#ibcon#read 5, iclass 25, count 0 2006.229.14:36:57.50#ibcon#about to read 6, iclass 25, count 0 2006.229.14:36:57.50#ibcon#read 6, iclass 25, count 0 2006.229.14:36:57.50#ibcon#end of sib2, iclass 25, count 0 2006.229.14:36:57.50#ibcon#*after write, iclass 25, count 0 2006.229.14:36:57.50#ibcon#*before return 0, iclass 25, count 0 2006.229.14:36:57.50#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:57.50#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:36:57.50#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:36:57.50#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:36:57.50$vck44/vabw=wide 2006.229.14:36:57.50#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.14:36:57.50#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.14:36:57.50#ibcon#ireg 8 cls_cnt 0 2006.229.14:36:57.50#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:57.50#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:57.50#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:57.50#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:36:57.50#ibcon#first serial, iclass 27, count 0 2006.229.14:36:57.50#ibcon#enter sib2, iclass 27, count 0 2006.229.14:36:57.50#ibcon#flushed, iclass 27, count 0 2006.229.14:36:57.50#ibcon#about to write, iclass 27, count 0 2006.229.14:36:57.50#ibcon#wrote, iclass 27, count 0 2006.229.14:36:57.50#ibcon#about to read 3, iclass 27, count 0 2006.229.14:36:57.52#ibcon#read 3, iclass 27, count 0 2006.229.14:36:57.52#ibcon#about to read 4, iclass 27, count 0 2006.229.14:36:57.52#ibcon#read 4, iclass 27, count 0 2006.229.14:36:57.52#ibcon#about to read 5, iclass 27, count 0 2006.229.14:36:57.52#ibcon#read 5, iclass 27, count 0 2006.229.14:36:57.52#ibcon#about to read 6, iclass 27, count 0 2006.229.14:36:57.52#ibcon#read 6, iclass 27, count 0 2006.229.14:36:57.52#ibcon#end of sib2, iclass 27, count 0 2006.229.14:36:57.52#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:36:57.52#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:36:57.52#ibcon#[25=BW32\r\n] 2006.229.14:36:57.52#ibcon#*before write, iclass 27, count 0 2006.229.14:36:57.52#ibcon#enter sib2, iclass 27, count 0 2006.229.14:36:57.52#ibcon#flushed, iclass 27, count 0 2006.229.14:36:57.52#ibcon#about to write, iclass 27, count 0 2006.229.14:36:57.52#ibcon#wrote, iclass 27, count 0 2006.229.14:36:57.52#ibcon#about to read 3, iclass 27, count 0 2006.229.14:36:57.55#ibcon#read 3, iclass 27, count 0 2006.229.14:36:57.55#ibcon#about to read 4, iclass 27, count 0 2006.229.14:36:57.55#ibcon#read 4, iclass 27, count 0 2006.229.14:36:57.55#ibcon#about to read 5, iclass 27, count 0 2006.229.14:36:57.55#ibcon#read 5, iclass 27, count 0 2006.229.14:36:57.55#ibcon#about to read 6, iclass 27, count 0 2006.229.14:36:57.55#ibcon#read 6, iclass 27, count 0 2006.229.14:36:57.55#ibcon#end of sib2, iclass 27, count 0 2006.229.14:36:57.55#ibcon#*after write, iclass 27, count 0 2006.229.14:36:57.55#ibcon#*before return 0, iclass 27, count 0 2006.229.14:36:57.55#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:57.55#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:36:57.55#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:36:57.55#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:36:57.55$vck44/vbbw=wide 2006.229.14:36:57.55#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:36:57.55#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:36:57.55#ibcon#ireg 8 cls_cnt 0 2006.229.14:36:57.55#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:36:57.62#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:36:57.62#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:36:57.62#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:36:57.62#ibcon#first serial, iclass 29, count 0 2006.229.14:36:57.62#ibcon#enter sib2, iclass 29, count 0 2006.229.14:36:57.62#ibcon#flushed, iclass 29, count 0 2006.229.14:36:57.62#ibcon#about to write, iclass 29, count 0 2006.229.14:36:57.62#ibcon#wrote, iclass 29, count 0 2006.229.14:36:57.62#ibcon#about to read 3, iclass 29, count 0 2006.229.14:36:57.64#ibcon#read 3, iclass 29, count 0 2006.229.14:36:57.64#ibcon#about to read 4, iclass 29, count 0 2006.229.14:36:57.64#ibcon#read 4, iclass 29, count 0 2006.229.14:36:57.64#ibcon#about to read 5, iclass 29, count 0 2006.229.14:36:57.64#ibcon#read 5, iclass 29, count 0 2006.229.14:36:57.64#ibcon#about to read 6, iclass 29, count 0 2006.229.14:36:57.64#ibcon#read 6, iclass 29, count 0 2006.229.14:36:57.64#ibcon#end of sib2, iclass 29, count 0 2006.229.14:36:57.64#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:36:57.64#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:36:57.64#ibcon#[27=BW32\r\n] 2006.229.14:36:57.64#ibcon#*before write, iclass 29, count 0 2006.229.14:36:57.64#ibcon#enter sib2, iclass 29, count 0 2006.229.14:36:57.64#ibcon#flushed, iclass 29, count 0 2006.229.14:36:57.64#ibcon#about to write, iclass 29, count 0 2006.229.14:36:57.64#ibcon#wrote, iclass 29, count 0 2006.229.14:36:57.64#ibcon#about to read 3, iclass 29, count 0 2006.229.14:36:57.67#ibcon#read 3, iclass 29, count 0 2006.229.14:36:57.67#ibcon#about to read 4, iclass 29, count 0 2006.229.14:36:57.67#ibcon#read 4, iclass 29, count 0 2006.229.14:36:57.67#ibcon#about to read 5, iclass 29, count 0 2006.229.14:36:57.67#ibcon#read 5, iclass 29, count 0 2006.229.14:36:57.67#ibcon#about to read 6, iclass 29, count 0 2006.229.14:36:57.67#ibcon#read 6, iclass 29, count 0 2006.229.14:36:57.67#ibcon#end of sib2, iclass 29, count 0 2006.229.14:36:57.67#ibcon#*after write, iclass 29, count 0 2006.229.14:36:57.67#ibcon#*before return 0, iclass 29, count 0 2006.229.14:36:57.67#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:36:57.67#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:36:57.67#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:36:57.67#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:36:57.67$setupk4/ifdk4 2006.229.14:36:57.67$ifdk4/lo= 2006.229.14:36:57.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:36:57.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:36:57.67$ifdk4/patch= 2006.229.14:36:57.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:36:57.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:36:57.67$setupk4/!*+20s 2006.229.14:36:59.89#abcon#<5=/06 1.4 2.5 27.441001002.1\r\n> 2006.229.14:36:59.91#abcon#{5=INTERFACE CLEAR} 2006.229.14:36:59.97#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:37:10.06#abcon#<5=/06 1.4 2.5 27.441001002.1\r\n> 2006.229.14:37:10.08#abcon#{5=INTERFACE CLEAR} 2006.229.14:37:10.14#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:37:12.18$setupk4/"tpicd 2006.229.14:37:12.18$setupk4/echo=off 2006.229.14:37:12.18$setupk4/xlog=off 2006.229.14:37:12.18:!2006.229.14:39:19 2006.229.14:37:22.14#trakl#Source acquired 2006.229.14:37:23.14#flagr#flagr/antenna,acquired 2006.229.14:39:19.00:preob 2006.229.14:39:19.14/onsource/TRACKING 2006.229.14:39:19.14:!2006.229.14:39:29 2006.229.14:39:29.00:"tape 2006.229.14:39:29.00:"st=record 2006.229.14:39:29.00:data_valid=on 2006.229.14:39:29.00:midob 2006.229.14:39:29.14/onsource/TRACKING 2006.229.14:39:29.14/wx/27.44,1002.1,100 2006.229.14:39:29.38/cable/+6.4134E-03 2006.229.14:39:30.47/va/01,08,usb,yes,32,34 2006.229.14:39:30.47/va/02,07,usb,yes,34,35 2006.229.14:39:30.47/va/03,06,usb,yes,42,45 2006.229.14:39:30.47/va/04,07,usb,yes,35,37 2006.229.14:39:30.47/va/05,04,usb,yes,32,32 2006.229.14:39:30.47/va/06,04,usb,yes,35,35 2006.229.14:39:30.47/va/07,05,usb,yes,31,32 2006.229.14:39:30.47/va/08,06,usb,yes,23,28 2006.229.14:39:30.70/valo/01,524.99,yes,locked 2006.229.14:39:30.70/valo/02,534.99,yes,locked 2006.229.14:39:30.70/valo/03,564.99,yes,locked 2006.229.14:39:30.70/valo/04,624.99,yes,locked 2006.229.14:39:30.70/valo/05,734.99,yes,locked 2006.229.14:39:30.70/valo/06,814.99,yes,locked 2006.229.14:39:30.70/valo/07,864.99,yes,locked 2006.229.14:39:30.70/valo/08,884.99,yes,locked 2006.229.14:39:31.79/vb/01,04,usb,yes,32,30 2006.229.14:39:31.79/vb/02,04,usb,yes,34,34 2006.229.14:39:31.79/vb/03,04,usb,yes,31,34 2006.229.14:39:31.79/vb/04,04,usb,yes,36,35 2006.229.14:39:31.79/vb/05,04,usb,yes,28,30 2006.229.14:39:31.79/vb/06,04,usb,yes,32,28 2006.229.14:39:31.79/vb/07,04,usb,yes,32,32 2006.229.14:39:31.79/vb/08,04,usb,yes,30,33 2006.229.14:39:32.02/vblo/01,629.99,yes,locked 2006.229.14:39:32.02/vblo/02,634.99,yes,locked 2006.229.14:39:32.02/vblo/03,649.99,yes,locked 2006.229.14:39:32.02/vblo/04,679.99,yes,locked 2006.229.14:39:32.02/vblo/05,709.99,yes,locked 2006.229.14:39:32.02/vblo/06,719.99,yes,locked 2006.229.14:39:32.02/vblo/07,734.99,yes,locked 2006.229.14:39:32.02/vblo/08,744.99,yes,locked 2006.229.14:39:32.17/vabw/8 2006.229.14:39:32.32/vbbw/8 2006.229.14:39:32.41/xfe/off,on,12.2 2006.229.14:39:32.86/ifatt/23,28,28,28 2006.229.14:39:33.08/fmout-gps/S +4.56E-07 2006.229.14:39:33.12:!2006.229.14:40:29 2006.229.14:40:29.00:data_valid=off 2006.229.14:40:29.00:"et 2006.229.14:40:29.00:!+3s 2006.229.14:40:32.02:"tape 2006.229.14:40:32.02:postob 2006.229.14:40:32.18/cable/+6.4136E-03 2006.229.14:40:32.18/wx/27.44,1002.1,100 2006.229.14:40:33.08/fmout-gps/S +4.55E-07 2006.229.14:40:33.08:scan_name=229-1444,jd0608,100 2006.229.14:40:33.08:source=1908-201,191109.65,-200655.1,2000.0,cw 2006.229.14:40:33.14#flagr#flagr/antenna,new-source 2006.229.14:40:34.14:checkk5 2006.229.14:40:34.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:40:34.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:40:35.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:40:35.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:40:36.13/chk_obsdata//k5ts1/T2291439??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.14:40:36.55/chk_obsdata//k5ts2/T2291439??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.14:40:36.96/chk_obsdata//k5ts3/T2291439??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.14:40:37.35/chk_obsdata//k5ts4/T2291439??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.14:40:38.07/k5log//k5ts1_log_newline 2006.229.14:40:38.78/k5log//k5ts2_log_newline 2006.229.14:40:39.49/k5log//k5ts3_log_newline 2006.229.14:40:40.20/k5log//k5ts4_log_newline 2006.229.14:40:40.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:40:40.23:setupk4=1 2006.229.14:40:40.23$setupk4/echo=on 2006.229.14:40:40.23$setupk4/pcalon 2006.229.14:40:40.23$pcalon/"no phase cal control is implemented here 2006.229.14:40:40.23$setupk4/"tpicd=stop 2006.229.14:40:40.23$setupk4/"rec=synch_on 2006.229.14:40:40.23$setupk4/"rec_mode=128 2006.229.14:40:40.23$setupk4/!* 2006.229.14:40:40.23$setupk4/recpk4 2006.229.14:40:40.23$recpk4/recpatch= 2006.229.14:40:40.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:40:40.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:40:40.23$setupk4/vck44 2006.229.14:40:40.23$vck44/valo=1,524.99 2006.229.14:40:40.23#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.14:40:40.23#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.14:40:40.23#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:40.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:40.23#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:40.23#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:40.23#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:40:40.23#ibcon#first serial, iclass 7, count 0 2006.229.14:40:40.23#ibcon#enter sib2, iclass 7, count 0 2006.229.14:40:40.23#ibcon#flushed, iclass 7, count 0 2006.229.14:40:40.23#ibcon#about to write, iclass 7, count 0 2006.229.14:40:40.23#ibcon#wrote, iclass 7, count 0 2006.229.14:40:40.23#ibcon#about to read 3, iclass 7, count 0 2006.229.14:40:40.25#ibcon#read 3, iclass 7, count 0 2006.229.14:40:40.25#ibcon#about to read 4, iclass 7, count 0 2006.229.14:40:40.25#ibcon#read 4, iclass 7, count 0 2006.229.14:40:40.25#ibcon#about to read 5, iclass 7, count 0 2006.229.14:40:40.25#ibcon#read 5, iclass 7, count 0 2006.229.14:40:40.25#ibcon#about to read 6, iclass 7, count 0 2006.229.14:40:40.25#ibcon#read 6, iclass 7, count 0 2006.229.14:40:40.25#ibcon#end of sib2, iclass 7, count 0 2006.229.14:40:40.25#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:40:40.25#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:40:40.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:40:40.25#ibcon#*before write, iclass 7, count 0 2006.229.14:40:40.25#ibcon#enter sib2, iclass 7, count 0 2006.229.14:40:40.25#ibcon#flushed, iclass 7, count 0 2006.229.14:40:40.25#ibcon#about to write, iclass 7, count 0 2006.229.14:40:40.25#ibcon#wrote, iclass 7, count 0 2006.229.14:40:40.25#ibcon#about to read 3, iclass 7, count 0 2006.229.14:40:40.30#ibcon#read 3, iclass 7, count 0 2006.229.14:40:40.30#ibcon#about to read 4, iclass 7, count 0 2006.229.14:40:40.30#ibcon#read 4, iclass 7, count 0 2006.229.14:40:40.30#ibcon#about to read 5, iclass 7, count 0 2006.229.14:40:40.30#ibcon#read 5, iclass 7, count 0 2006.229.14:40:40.30#ibcon#about to read 6, iclass 7, count 0 2006.229.14:40:40.30#ibcon#read 6, iclass 7, count 0 2006.229.14:40:40.30#ibcon#end of sib2, iclass 7, count 0 2006.229.14:40:40.30#ibcon#*after write, iclass 7, count 0 2006.229.14:40:40.30#ibcon#*before return 0, iclass 7, count 0 2006.229.14:40:40.30#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:40.30#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:40.30#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:40:40.30#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:40:40.30$vck44/va=1,8 2006.229.14:40:40.30#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.14:40:40.30#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.14:40:40.30#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:40.30#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:40.30#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:40.30#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:40.30#ibcon#enter wrdev, iclass 11, count 2 2006.229.14:40:40.30#ibcon#first serial, iclass 11, count 2 2006.229.14:40:40.30#ibcon#enter sib2, iclass 11, count 2 2006.229.14:40:40.30#ibcon#flushed, iclass 11, count 2 2006.229.14:40:40.30#ibcon#about to write, iclass 11, count 2 2006.229.14:40:40.30#ibcon#wrote, iclass 11, count 2 2006.229.14:40:40.30#ibcon#about to read 3, iclass 11, count 2 2006.229.14:40:40.32#ibcon#read 3, iclass 11, count 2 2006.229.14:40:40.32#ibcon#about to read 4, iclass 11, count 2 2006.229.14:40:40.32#ibcon#read 4, iclass 11, count 2 2006.229.14:40:40.32#ibcon#about to read 5, iclass 11, count 2 2006.229.14:40:40.32#ibcon#read 5, iclass 11, count 2 2006.229.14:40:40.32#ibcon#about to read 6, iclass 11, count 2 2006.229.14:40:40.32#ibcon#read 6, iclass 11, count 2 2006.229.14:40:40.32#ibcon#end of sib2, iclass 11, count 2 2006.229.14:40:40.32#ibcon#*mode == 0, iclass 11, count 2 2006.229.14:40:40.32#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.14:40:40.32#ibcon#[25=AT01-08\r\n] 2006.229.14:40:40.32#ibcon#*before write, iclass 11, count 2 2006.229.14:40:40.32#ibcon#enter sib2, iclass 11, count 2 2006.229.14:40:40.32#ibcon#flushed, iclass 11, count 2 2006.229.14:40:40.32#ibcon#about to write, iclass 11, count 2 2006.229.14:40:40.32#ibcon#wrote, iclass 11, count 2 2006.229.14:40:40.32#ibcon#about to read 3, iclass 11, count 2 2006.229.14:40:40.35#ibcon#read 3, iclass 11, count 2 2006.229.14:40:40.35#ibcon#about to read 4, iclass 11, count 2 2006.229.14:40:40.35#ibcon#read 4, iclass 11, count 2 2006.229.14:40:40.35#ibcon#about to read 5, iclass 11, count 2 2006.229.14:40:40.35#ibcon#read 5, iclass 11, count 2 2006.229.14:40:40.35#ibcon#about to read 6, iclass 11, count 2 2006.229.14:40:40.35#ibcon#read 6, iclass 11, count 2 2006.229.14:40:40.35#ibcon#end of sib2, iclass 11, count 2 2006.229.14:40:40.35#ibcon#*after write, iclass 11, count 2 2006.229.14:40:40.35#ibcon#*before return 0, iclass 11, count 2 2006.229.14:40:40.35#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:40.35#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:40.35#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.14:40:40.35#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:40.35#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:40.47#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:40.47#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:40.47#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:40:40.47#ibcon#first serial, iclass 11, count 0 2006.229.14:40:40.47#ibcon#enter sib2, iclass 11, count 0 2006.229.14:40:40.47#ibcon#flushed, iclass 11, count 0 2006.229.14:40:40.47#ibcon#about to write, iclass 11, count 0 2006.229.14:40:40.47#ibcon#wrote, iclass 11, count 0 2006.229.14:40:40.47#ibcon#about to read 3, iclass 11, count 0 2006.229.14:40:40.49#ibcon#read 3, iclass 11, count 0 2006.229.14:40:40.49#ibcon#about to read 4, iclass 11, count 0 2006.229.14:40:40.49#ibcon#read 4, iclass 11, count 0 2006.229.14:40:40.49#ibcon#about to read 5, iclass 11, count 0 2006.229.14:40:40.49#ibcon#read 5, iclass 11, count 0 2006.229.14:40:40.49#ibcon#about to read 6, iclass 11, count 0 2006.229.14:40:40.49#ibcon#read 6, iclass 11, count 0 2006.229.14:40:40.49#ibcon#end of sib2, iclass 11, count 0 2006.229.14:40:40.49#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:40:40.49#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:40:40.49#ibcon#[25=USB\r\n] 2006.229.14:40:40.49#ibcon#*before write, iclass 11, count 0 2006.229.14:40:40.49#ibcon#enter sib2, iclass 11, count 0 2006.229.14:40:40.49#ibcon#flushed, iclass 11, count 0 2006.229.14:40:40.49#ibcon#about to write, iclass 11, count 0 2006.229.14:40:40.49#ibcon#wrote, iclass 11, count 0 2006.229.14:40:40.49#ibcon#about to read 3, iclass 11, count 0 2006.229.14:40:40.52#ibcon#read 3, iclass 11, count 0 2006.229.14:40:40.52#ibcon#about to read 4, iclass 11, count 0 2006.229.14:40:40.52#ibcon#read 4, iclass 11, count 0 2006.229.14:40:40.52#ibcon#about to read 5, iclass 11, count 0 2006.229.14:40:40.52#ibcon#read 5, iclass 11, count 0 2006.229.14:40:40.52#ibcon#about to read 6, iclass 11, count 0 2006.229.14:40:40.52#ibcon#read 6, iclass 11, count 0 2006.229.14:40:40.52#ibcon#end of sib2, iclass 11, count 0 2006.229.14:40:40.52#ibcon#*after write, iclass 11, count 0 2006.229.14:40:40.52#ibcon#*before return 0, iclass 11, count 0 2006.229.14:40:40.52#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:40.52#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:40.52#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:40:40.52#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:40:40.52$vck44/valo=2,534.99 2006.229.14:40:40.52#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.14:40:40.52#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.14:40:40.52#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:40.52#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:40.52#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:40.52#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:40.52#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:40:40.52#ibcon#first serial, iclass 13, count 0 2006.229.14:40:40.52#ibcon#enter sib2, iclass 13, count 0 2006.229.14:40:40.52#ibcon#flushed, iclass 13, count 0 2006.229.14:40:40.52#ibcon#about to write, iclass 13, count 0 2006.229.14:40:40.52#ibcon#wrote, iclass 13, count 0 2006.229.14:40:40.52#ibcon#about to read 3, iclass 13, count 0 2006.229.14:40:40.54#ibcon#read 3, iclass 13, count 0 2006.229.14:40:40.54#ibcon#about to read 4, iclass 13, count 0 2006.229.14:40:40.54#ibcon#read 4, iclass 13, count 0 2006.229.14:40:40.54#ibcon#about to read 5, iclass 13, count 0 2006.229.14:40:40.54#ibcon#read 5, iclass 13, count 0 2006.229.14:40:40.54#ibcon#about to read 6, iclass 13, count 0 2006.229.14:40:40.54#ibcon#read 6, iclass 13, count 0 2006.229.14:40:40.54#ibcon#end of sib2, iclass 13, count 0 2006.229.14:40:40.54#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:40:40.54#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:40:40.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:40:40.54#ibcon#*before write, iclass 13, count 0 2006.229.14:40:40.54#ibcon#enter sib2, iclass 13, count 0 2006.229.14:40:40.54#ibcon#flushed, iclass 13, count 0 2006.229.14:40:40.54#ibcon#about to write, iclass 13, count 0 2006.229.14:40:40.54#ibcon#wrote, iclass 13, count 0 2006.229.14:40:40.54#ibcon#about to read 3, iclass 13, count 0 2006.229.14:40:40.58#ibcon#read 3, iclass 13, count 0 2006.229.14:40:40.58#ibcon#about to read 4, iclass 13, count 0 2006.229.14:40:40.58#ibcon#read 4, iclass 13, count 0 2006.229.14:40:40.58#ibcon#about to read 5, iclass 13, count 0 2006.229.14:40:40.58#ibcon#read 5, iclass 13, count 0 2006.229.14:40:40.58#ibcon#about to read 6, iclass 13, count 0 2006.229.14:40:40.58#ibcon#read 6, iclass 13, count 0 2006.229.14:40:40.58#ibcon#end of sib2, iclass 13, count 0 2006.229.14:40:40.58#ibcon#*after write, iclass 13, count 0 2006.229.14:40:40.58#ibcon#*before return 0, iclass 13, count 0 2006.229.14:40:40.58#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:40.58#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:40.58#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:40:40.58#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:40:40.58$vck44/va=2,7 2006.229.14:40:40.58#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.14:40:40.58#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.14:40:40.58#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:40.58#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:40.64#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:40.64#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:40.64#ibcon#enter wrdev, iclass 15, count 2 2006.229.14:40:40.64#ibcon#first serial, iclass 15, count 2 2006.229.14:40:40.64#ibcon#enter sib2, iclass 15, count 2 2006.229.14:40:40.64#ibcon#flushed, iclass 15, count 2 2006.229.14:40:40.64#ibcon#about to write, iclass 15, count 2 2006.229.14:40:40.64#ibcon#wrote, iclass 15, count 2 2006.229.14:40:40.64#ibcon#about to read 3, iclass 15, count 2 2006.229.14:40:40.66#ibcon#read 3, iclass 15, count 2 2006.229.14:40:40.66#ibcon#about to read 4, iclass 15, count 2 2006.229.14:40:40.66#ibcon#read 4, iclass 15, count 2 2006.229.14:40:40.66#ibcon#about to read 5, iclass 15, count 2 2006.229.14:40:40.66#ibcon#read 5, iclass 15, count 2 2006.229.14:40:40.66#ibcon#about to read 6, iclass 15, count 2 2006.229.14:40:40.66#ibcon#read 6, iclass 15, count 2 2006.229.14:40:40.66#ibcon#end of sib2, iclass 15, count 2 2006.229.14:40:40.66#ibcon#*mode == 0, iclass 15, count 2 2006.229.14:40:40.66#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.14:40:40.66#ibcon#[25=AT02-07\r\n] 2006.229.14:40:40.66#ibcon#*before write, iclass 15, count 2 2006.229.14:40:40.66#ibcon#enter sib2, iclass 15, count 2 2006.229.14:40:40.66#ibcon#flushed, iclass 15, count 2 2006.229.14:40:40.66#ibcon#about to write, iclass 15, count 2 2006.229.14:40:40.66#ibcon#wrote, iclass 15, count 2 2006.229.14:40:40.66#ibcon#about to read 3, iclass 15, count 2 2006.229.14:40:40.69#ibcon#read 3, iclass 15, count 2 2006.229.14:40:40.69#ibcon#about to read 4, iclass 15, count 2 2006.229.14:40:40.69#ibcon#read 4, iclass 15, count 2 2006.229.14:40:40.69#ibcon#about to read 5, iclass 15, count 2 2006.229.14:40:40.69#ibcon#read 5, iclass 15, count 2 2006.229.14:40:40.69#ibcon#about to read 6, iclass 15, count 2 2006.229.14:40:40.69#ibcon#read 6, iclass 15, count 2 2006.229.14:40:40.69#ibcon#end of sib2, iclass 15, count 2 2006.229.14:40:40.69#ibcon#*after write, iclass 15, count 2 2006.229.14:40:40.69#ibcon#*before return 0, iclass 15, count 2 2006.229.14:40:40.69#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:40.69#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:40.69#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.14:40:40.69#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:40.69#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:40.81#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:40.81#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:40.81#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:40:40.81#ibcon#first serial, iclass 15, count 0 2006.229.14:40:40.81#ibcon#enter sib2, iclass 15, count 0 2006.229.14:40:40.81#ibcon#flushed, iclass 15, count 0 2006.229.14:40:40.81#ibcon#about to write, iclass 15, count 0 2006.229.14:40:40.81#ibcon#wrote, iclass 15, count 0 2006.229.14:40:40.81#ibcon#about to read 3, iclass 15, count 0 2006.229.14:40:40.83#ibcon#read 3, iclass 15, count 0 2006.229.14:40:40.83#ibcon#about to read 4, iclass 15, count 0 2006.229.14:40:40.83#ibcon#read 4, iclass 15, count 0 2006.229.14:40:40.83#ibcon#about to read 5, iclass 15, count 0 2006.229.14:40:40.83#ibcon#read 5, iclass 15, count 0 2006.229.14:40:40.83#ibcon#about to read 6, iclass 15, count 0 2006.229.14:40:40.83#ibcon#read 6, iclass 15, count 0 2006.229.14:40:40.83#ibcon#end of sib2, iclass 15, count 0 2006.229.14:40:40.83#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:40:40.83#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:40:40.83#ibcon#[25=USB\r\n] 2006.229.14:40:40.83#ibcon#*before write, iclass 15, count 0 2006.229.14:40:40.83#ibcon#enter sib2, iclass 15, count 0 2006.229.14:40:40.83#ibcon#flushed, iclass 15, count 0 2006.229.14:40:40.83#ibcon#about to write, iclass 15, count 0 2006.229.14:40:40.83#ibcon#wrote, iclass 15, count 0 2006.229.14:40:40.83#ibcon#about to read 3, iclass 15, count 0 2006.229.14:40:40.86#ibcon#read 3, iclass 15, count 0 2006.229.14:40:40.86#ibcon#about to read 4, iclass 15, count 0 2006.229.14:40:40.86#ibcon#read 4, iclass 15, count 0 2006.229.14:40:40.86#ibcon#about to read 5, iclass 15, count 0 2006.229.14:40:40.86#ibcon#read 5, iclass 15, count 0 2006.229.14:40:40.86#ibcon#about to read 6, iclass 15, count 0 2006.229.14:40:40.86#ibcon#read 6, iclass 15, count 0 2006.229.14:40:40.86#ibcon#end of sib2, iclass 15, count 0 2006.229.14:40:40.86#ibcon#*after write, iclass 15, count 0 2006.229.14:40:40.86#ibcon#*before return 0, iclass 15, count 0 2006.229.14:40:40.86#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:40.86#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:40.86#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:40:40.86#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:40:40.86$vck44/valo=3,564.99 2006.229.14:40:40.86#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.14:40:40.86#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.14:40:40.86#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:40.86#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:40.86#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:40.86#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:40.86#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:40:40.86#ibcon#first serial, iclass 17, count 0 2006.229.14:40:40.86#ibcon#enter sib2, iclass 17, count 0 2006.229.14:40:40.86#ibcon#flushed, iclass 17, count 0 2006.229.14:40:40.86#ibcon#about to write, iclass 17, count 0 2006.229.14:40:40.86#ibcon#wrote, iclass 17, count 0 2006.229.14:40:40.86#ibcon#about to read 3, iclass 17, count 0 2006.229.14:40:40.88#ibcon#read 3, iclass 17, count 0 2006.229.14:40:40.88#ibcon#about to read 4, iclass 17, count 0 2006.229.14:40:40.88#ibcon#read 4, iclass 17, count 0 2006.229.14:40:40.88#ibcon#about to read 5, iclass 17, count 0 2006.229.14:40:40.88#ibcon#read 5, iclass 17, count 0 2006.229.14:40:40.88#ibcon#about to read 6, iclass 17, count 0 2006.229.14:40:40.88#ibcon#read 6, iclass 17, count 0 2006.229.14:40:40.88#ibcon#end of sib2, iclass 17, count 0 2006.229.14:40:40.88#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:40:40.88#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:40:40.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:40:40.88#ibcon#*before write, iclass 17, count 0 2006.229.14:40:40.88#ibcon#enter sib2, iclass 17, count 0 2006.229.14:40:40.88#ibcon#flushed, iclass 17, count 0 2006.229.14:40:40.88#ibcon#about to write, iclass 17, count 0 2006.229.14:40:40.88#ibcon#wrote, iclass 17, count 0 2006.229.14:40:40.88#ibcon#about to read 3, iclass 17, count 0 2006.229.14:40:40.92#ibcon#read 3, iclass 17, count 0 2006.229.14:40:40.92#ibcon#about to read 4, iclass 17, count 0 2006.229.14:40:40.92#ibcon#read 4, iclass 17, count 0 2006.229.14:40:40.92#ibcon#about to read 5, iclass 17, count 0 2006.229.14:40:40.92#ibcon#read 5, iclass 17, count 0 2006.229.14:40:40.92#ibcon#about to read 6, iclass 17, count 0 2006.229.14:40:40.92#ibcon#read 6, iclass 17, count 0 2006.229.14:40:40.92#ibcon#end of sib2, iclass 17, count 0 2006.229.14:40:40.92#ibcon#*after write, iclass 17, count 0 2006.229.14:40:40.92#ibcon#*before return 0, iclass 17, count 0 2006.229.14:40:40.92#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:40.92#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:40.92#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:40:40.92#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:40:40.92$vck44/va=3,6 2006.229.14:40:40.92#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.14:40:40.92#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.14:40:40.92#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:40.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:40.98#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:40.98#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:40.98#ibcon#enter wrdev, iclass 19, count 2 2006.229.14:40:40.98#ibcon#first serial, iclass 19, count 2 2006.229.14:40:40.98#ibcon#enter sib2, iclass 19, count 2 2006.229.14:40:40.98#ibcon#flushed, iclass 19, count 2 2006.229.14:40:40.98#ibcon#about to write, iclass 19, count 2 2006.229.14:40:40.98#ibcon#wrote, iclass 19, count 2 2006.229.14:40:40.98#ibcon#about to read 3, iclass 19, count 2 2006.229.14:40:41.00#ibcon#read 3, iclass 19, count 2 2006.229.14:40:41.00#ibcon#about to read 4, iclass 19, count 2 2006.229.14:40:41.00#ibcon#read 4, iclass 19, count 2 2006.229.14:40:41.00#ibcon#about to read 5, iclass 19, count 2 2006.229.14:40:41.00#ibcon#read 5, iclass 19, count 2 2006.229.14:40:41.00#ibcon#about to read 6, iclass 19, count 2 2006.229.14:40:41.00#ibcon#read 6, iclass 19, count 2 2006.229.14:40:41.00#ibcon#end of sib2, iclass 19, count 2 2006.229.14:40:41.00#ibcon#*mode == 0, iclass 19, count 2 2006.229.14:40:41.00#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.14:40:41.00#ibcon#[25=AT03-06\r\n] 2006.229.14:40:41.00#ibcon#*before write, iclass 19, count 2 2006.229.14:40:41.00#ibcon#enter sib2, iclass 19, count 2 2006.229.14:40:41.00#ibcon#flushed, iclass 19, count 2 2006.229.14:40:41.00#ibcon#about to write, iclass 19, count 2 2006.229.14:40:41.00#ibcon#wrote, iclass 19, count 2 2006.229.14:40:41.00#ibcon#about to read 3, iclass 19, count 2 2006.229.14:40:41.03#ibcon#read 3, iclass 19, count 2 2006.229.14:40:41.03#ibcon#about to read 4, iclass 19, count 2 2006.229.14:40:41.03#ibcon#read 4, iclass 19, count 2 2006.229.14:40:41.03#ibcon#about to read 5, iclass 19, count 2 2006.229.14:40:41.03#ibcon#read 5, iclass 19, count 2 2006.229.14:40:41.03#ibcon#about to read 6, iclass 19, count 2 2006.229.14:40:41.03#ibcon#read 6, iclass 19, count 2 2006.229.14:40:41.03#ibcon#end of sib2, iclass 19, count 2 2006.229.14:40:41.03#ibcon#*after write, iclass 19, count 2 2006.229.14:40:41.03#ibcon#*before return 0, iclass 19, count 2 2006.229.14:40:41.03#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:41.03#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:41.03#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.14:40:41.03#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:41.03#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:41.15#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:41.15#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:41.15#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:40:41.15#ibcon#first serial, iclass 19, count 0 2006.229.14:40:41.15#ibcon#enter sib2, iclass 19, count 0 2006.229.14:40:41.15#ibcon#flushed, iclass 19, count 0 2006.229.14:40:41.15#ibcon#about to write, iclass 19, count 0 2006.229.14:40:41.15#ibcon#wrote, iclass 19, count 0 2006.229.14:40:41.15#ibcon#about to read 3, iclass 19, count 0 2006.229.14:40:41.17#ibcon#read 3, iclass 19, count 0 2006.229.14:40:41.17#ibcon#about to read 4, iclass 19, count 0 2006.229.14:40:41.17#ibcon#read 4, iclass 19, count 0 2006.229.14:40:41.17#ibcon#about to read 5, iclass 19, count 0 2006.229.14:40:41.17#ibcon#read 5, iclass 19, count 0 2006.229.14:40:41.17#ibcon#about to read 6, iclass 19, count 0 2006.229.14:40:41.17#ibcon#read 6, iclass 19, count 0 2006.229.14:40:41.17#ibcon#end of sib2, iclass 19, count 0 2006.229.14:40:41.17#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:40:41.17#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:40:41.17#ibcon#[25=USB\r\n] 2006.229.14:40:41.17#ibcon#*before write, iclass 19, count 0 2006.229.14:40:41.17#ibcon#enter sib2, iclass 19, count 0 2006.229.14:40:41.17#ibcon#flushed, iclass 19, count 0 2006.229.14:40:41.17#ibcon#about to write, iclass 19, count 0 2006.229.14:40:41.17#ibcon#wrote, iclass 19, count 0 2006.229.14:40:41.17#ibcon#about to read 3, iclass 19, count 0 2006.229.14:40:41.20#ibcon#read 3, iclass 19, count 0 2006.229.14:40:41.20#ibcon#about to read 4, iclass 19, count 0 2006.229.14:40:41.20#ibcon#read 4, iclass 19, count 0 2006.229.14:40:41.20#ibcon#about to read 5, iclass 19, count 0 2006.229.14:40:41.20#ibcon#read 5, iclass 19, count 0 2006.229.14:40:41.20#ibcon#about to read 6, iclass 19, count 0 2006.229.14:40:41.20#ibcon#read 6, iclass 19, count 0 2006.229.14:40:41.20#ibcon#end of sib2, iclass 19, count 0 2006.229.14:40:41.20#ibcon#*after write, iclass 19, count 0 2006.229.14:40:41.20#ibcon#*before return 0, iclass 19, count 0 2006.229.14:40:41.20#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:41.20#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:41.20#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:40:41.20#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:40:41.20$vck44/valo=4,624.99 2006.229.14:40:41.20#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.14:40:41.20#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.14:40:41.20#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:41.20#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:41.20#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:41.20#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:41.20#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:40:41.20#ibcon#first serial, iclass 21, count 0 2006.229.14:40:41.20#ibcon#enter sib2, iclass 21, count 0 2006.229.14:40:41.20#ibcon#flushed, iclass 21, count 0 2006.229.14:40:41.20#ibcon#about to write, iclass 21, count 0 2006.229.14:40:41.20#ibcon#wrote, iclass 21, count 0 2006.229.14:40:41.20#ibcon#about to read 3, iclass 21, count 0 2006.229.14:40:41.22#ibcon#read 3, iclass 21, count 0 2006.229.14:40:41.22#ibcon#about to read 4, iclass 21, count 0 2006.229.14:40:41.22#ibcon#read 4, iclass 21, count 0 2006.229.14:40:41.22#ibcon#about to read 5, iclass 21, count 0 2006.229.14:40:41.22#ibcon#read 5, iclass 21, count 0 2006.229.14:40:41.22#ibcon#about to read 6, iclass 21, count 0 2006.229.14:40:41.22#ibcon#read 6, iclass 21, count 0 2006.229.14:40:41.22#ibcon#end of sib2, iclass 21, count 0 2006.229.14:40:41.22#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:40:41.22#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:40:41.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:40:41.22#ibcon#*before write, iclass 21, count 0 2006.229.14:40:41.22#ibcon#enter sib2, iclass 21, count 0 2006.229.14:40:41.22#ibcon#flushed, iclass 21, count 0 2006.229.14:40:41.22#ibcon#about to write, iclass 21, count 0 2006.229.14:40:41.22#ibcon#wrote, iclass 21, count 0 2006.229.14:40:41.22#ibcon#about to read 3, iclass 21, count 0 2006.229.14:40:41.26#ibcon#read 3, iclass 21, count 0 2006.229.14:40:41.26#ibcon#about to read 4, iclass 21, count 0 2006.229.14:40:41.26#ibcon#read 4, iclass 21, count 0 2006.229.14:40:41.26#ibcon#about to read 5, iclass 21, count 0 2006.229.14:40:41.26#ibcon#read 5, iclass 21, count 0 2006.229.14:40:41.26#ibcon#about to read 6, iclass 21, count 0 2006.229.14:40:41.26#ibcon#read 6, iclass 21, count 0 2006.229.14:40:41.26#ibcon#end of sib2, iclass 21, count 0 2006.229.14:40:41.26#ibcon#*after write, iclass 21, count 0 2006.229.14:40:41.26#ibcon#*before return 0, iclass 21, count 0 2006.229.14:40:41.26#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:41.26#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:41.26#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:40:41.26#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:40:41.26$vck44/va=4,7 2006.229.14:40:41.26#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.14:40:41.26#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.14:40:41.26#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:41.26#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:41.32#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:41.32#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:41.32#ibcon#enter wrdev, iclass 23, count 2 2006.229.14:40:41.32#ibcon#first serial, iclass 23, count 2 2006.229.14:40:41.32#ibcon#enter sib2, iclass 23, count 2 2006.229.14:40:41.32#ibcon#flushed, iclass 23, count 2 2006.229.14:40:41.32#ibcon#about to write, iclass 23, count 2 2006.229.14:40:41.32#ibcon#wrote, iclass 23, count 2 2006.229.14:40:41.32#ibcon#about to read 3, iclass 23, count 2 2006.229.14:40:41.34#ibcon#read 3, iclass 23, count 2 2006.229.14:40:41.34#ibcon#about to read 4, iclass 23, count 2 2006.229.14:40:41.34#ibcon#read 4, iclass 23, count 2 2006.229.14:40:41.34#ibcon#about to read 5, iclass 23, count 2 2006.229.14:40:41.34#ibcon#read 5, iclass 23, count 2 2006.229.14:40:41.34#ibcon#about to read 6, iclass 23, count 2 2006.229.14:40:41.34#ibcon#read 6, iclass 23, count 2 2006.229.14:40:41.34#ibcon#end of sib2, iclass 23, count 2 2006.229.14:40:41.34#ibcon#*mode == 0, iclass 23, count 2 2006.229.14:40:41.34#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.14:40:41.34#ibcon#[25=AT04-07\r\n] 2006.229.14:40:41.34#ibcon#*before write, iclass 23, count 2 2006.229.14:40:41.34#ibcon#enter sib2, iclass 23, count 2 2006.229.14:40:41.34#ibcon#flushed, iclass 23, count 2 2006.229.14:40:41.34#ibcon#about to write, iclass 23, count 2 2006.229.14:40:41.34#ibcon#wrote, iclass 23, count 2 2006.229.14:40:41.34#ibcon#about to read 3, iclass 23, count 2 2006.229.14:40:41.37#ibcon#read 3, iclass 23, count 2 2006.229.14:40:41.37#ibcon#about to read 4, iclass 23, count 2 2006.229.14:40:41.37#ibcon#read 4, iclass 23, count 2 2006.229.14:40:41.37#ibcon#about to read 5, iclass 23, count 2 2006.229.14:40:41.37#ibcon#read 5, iclass 23, count 2 2006.229.14:40:41.37#ibcon#about to read 6, iclass 23, count 2 2006.229.14:40:41.37#ibcon#read 6, iclass 23, count 2 2006.229.14:40:41.37#ibcon#end of sib2, iclass 23, count 2 2006.229.14:40:41.37#ibcon#*after write, iclass 23, count 2 2006.229.14:40:41.37#ibcon#*before return 0, iclass 23, count 2 2006.229.14:40:41.37#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:41.37#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:41.37#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.14:40:41.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:41.37#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:41.49#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:41.49#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:41.49#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:40:41.49#ibcon#first serial, iclass 23, count 0 2006.229.14:40:41.49#ibcon#enter sib2, iclass 23, count 0 2006.229.14:40:41.49#ibcon#flushed, iclass 23, count 0 2006.229.14:40:41.49#ibcon#about to write, iclass 23, count 0 2006.229.14:40:41.49#ibcon#wrote, iclass 23, count 0 2006.229.14:40:41.49#ibcon#about to read 3, iclass 23, count 0 2006.229.14:40:41.51#ibcon#read 3, iclass 23, count 0 2006.229.14:40:41.51#ibcon#about to read 4, iclass 23, count 0 2006.229.14:40:41.51#ibcon#read 4, iclass 23, count 0 2006.229.14:40:41.51#ibcon#about to read 5, iclass 23, count 0 2006.229.14:40:41.51#ibcon#read 5, iclass 23, count 0 2006.229.14:40:41.51#ibcon#about to read 6, iclass 23, count 0 2006.229.14:40:41.51#ibcon#read 6, iclass 23, count 0 2006.229.14:40:41.51#ibcon#end of sib2, iclass 23, count 0 2006.229.14:40:41.51#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:40:41.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:40:41.51#ibcon#[25=USB\r\n] 2006.229.14:40:41.51#ibcon#*before write, iclass 23, count 0 2006.229.14:40:41.51#ibcon#enter sib2, iclass 23, count 0 2006.229.14:40:41.51#ibcon#flushed, iclass 23, count 0 2006.229.14:40:41.51#ibcon#about to write, iclass 23, count 0 2006.229.14:40:41.51#ibcon#wrote, iclass 23, count 0 2006.229.14:40:41.51#ibcon#about to read 3, iclass 23, count 0 2006.229.14:40:41.54#ibcon#read 3, iclass 23, count 0 2006.229.14:40:41.54#ibcon#about to read 4, iclass 23, count 0 2006.229.14:40:41.54#ibcon#read 4, iclass 23, count 0 2006.229.14:40:41.54#ibcon#about to read 5, iclass 23, count 0 2006.229.14:40:41.54#ibcon#read 5, iclass 23, count 0 2006.229.14:40:41.54#ibcon#about to read 6, iclass 23, count 0 2006.229.14:40:41.54#ibcon#read 6, iclass 23, count 0 2006.229.14:40:41.54#ibcon#end of sib2, iclass 23, count 0 2006.229.14:40:41.54#ibcon#*after write, iclass 23, count 0 2006.229.14:40:41.54#ibcon#*before return 0, iclass 23, count 0 2006.229.14:40:41.54#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:41.54#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:41.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:40:41.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:40:41.54$vck44/valo=5,734.99 2006.229.14:40:41.54#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:40:41.54#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:40:41.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:41.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:41.54#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:41.54#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:41.54#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:40:41.54#ibcon#first serial, iclass 25, count 0 2006.229.14:40:41.54#ibcon#enter sib2, iclass 25, count 0 2006.229.14:40:41.54#ibcon#flushed, iclass 25, count 0 2006.229.14:40:41.54#ibcon#about to write, iclass 25, count 0 2006.229.14:40:41.54#ibcon#wrote, iclass 25, count 0 2006.229.14:40:41.54#ibcon#about to read 3, iclass 25, count 0 2006.229.14:40:41.56#ibcon#read 3, iclass 25, count 0 2006.229.14:40:41.56#ibcon#about to read 4, iclass 25, count 0 2006.229.14:40:41.56#ibcon#read 4, iclass 25, count 0 2006.229.14:40:41.56#ibcon#about to read 5, iclass 25, count 0 2006.229.14:40:41.56#ibcon#read 5, iclass 25, count 0 2006.229.14:40:41.56#ibcon#about to read 6, iclass 25, count 0 2006.229.14:40:41.56#ibcon#read 6, iclass 25, count 0 2006.229.14:40:41.56#ibcon#end of sib2, iclass 25, count 0 2006.229.14:40:41.56#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:40:41.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:40:41.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:40:41.56#ibcon#*before write, iclass 25, count 0 2006.229.14:40:41.56#ibcon#enter sib2, iclass 25, count 0 2006.229.14:40:41.56#ibcon#flushed, iclass 25, count 0 2006.229.14:40:41.56#ibcon#about to write, iclass 25, count 0 2006.229.14:40:41.56#ibcon#wrote, iclass 25, count 0 2006.229.14:40:41.56#ibcon#about to read 3, iclass 25, count 0 2006.229.14:40:41.60#ibcon#read 3, iclass 25, count 0 2006.229.14:40:41.60#ibcon#about to read 4, iclass 25, count 0 2006.229.14:40:41.60#ibcon#read 4, iclass 25, count 0 2006.229.14:40:41.60#ibcon#about to read 5, iclass 25, count 0 2006.229.14:40:41.60#ibcon#read 5, iclass 25, count 0 2006.229.14:40:41.60#ibcon#about to read 6, iclass 25, count 0 2006.229.14:40:41.60#ibcon#read 6, iclass 25, count 0 2006.229.14:40:41.60#ibcon#end of sib2, iclass 25, count 0 2006.229.14:40:41.60#ibcon#*after write, iclass 25, count 0 2006.229.14:40:41.60#ibcon#*before return 0, iclass 25, count 0 2006.229.14:40:41.60#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:41.60#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:41.60#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:40:41.60#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:40:41.60$vck44/va=5,4 2006.229.14:40:41.60#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.14:40:41.60#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.14:40:41.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:41.60#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:41.66#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:41.66#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:41.66#ibcon#enter wrdev, iclass 27, count 2 2006.229.14:40:41.66#ibcon#first serial, iclass 27, count 2 2006.229.14:40:41.66#ibcon#enter sib2, iclass 27, count 2 2006.229.14:40:41.66#ibcon#flushed, iclass 27, count 2 2006.229.14:40:41.66#ibcon#about to write, iclass 27, count 2 2006.229.14:40:41.66#ibcon#wrote, iclass 27, count 2 2006.229.14:40:41.66#ibcon#about to read 3, iclass 27, count 2 2006.229.14:40:41.68#ibcon#read 3, iclass 27, count 2 2006.229.14:40:41.68#ibcon#about to read 4, iclass 27, count 2 2006.229.14:40:41.68#ibcon#read 4, iclass 27, count 2 2006.229.14:40:41.68#ibcon#about to read 5, iclass 27, count 2 2006.229.14:40:41.68#ibcon#read 5, iclass 27, count 2 2006.229.14:40:41.68#ibcon#about to read 6, iclass 27, count 2 2006.229.14:40:41.68#ibcon#read 6, iclass 27, count 2 2006.229.14:40:41.68#ibcon#end of sib2, iclass 27, count 2 2006.229.14:40:41.68#ibcon#*mode == 0, iclass 27, count 2 2006.229.14:40:41.68#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.14:40:41.68#ibcon#[25=AT05-04\r\n] 2006.229.14:40:41.68#ibcon#*before write, iclass 27, count 2 2006.229.14:40:41.68#ibcon#enter sib2, iclass 27, count 2 2006.229.14:40:41.68#ibcon#flushed, iclass 27, count 2 2006.229.14:40:41.68#ibcon#about to write, iclass 27, count 2 2006.229.14:40:41.68#ibcon#wrote, iclass 27, count 2 2006.229.14:40:41.68#ibcon#about to read 3, iclass 27, count 2 2006.229.14:40:41.71#ibcon#read 3, iclass 27, count 2 2006.229.14:40:41.71#ibcon#about to read 4, iclass 27, count 2 2006.229.14:40:41.71#ibcon#read 4, iclass 27, count 2 2006.229.14:40:41.71#ibcon#about to read 5, iclass 27, count 2 2006.229.14:40:41.71#ibcon#read 5, iclass 27, count 2 2006.229.14:40:41.71#ibcon#about to read 6, iclass 27, count 2 2006.229.14:40:41.71#ibcon#read 6, iclass 27, count 2 2006.229.14:40:41.71#ibcon#end of sib2, iclass 27, count 2 2006.229.14:40:41.71#ibcon#*after write, iclass 27, count 2 2006.229.14:40:41.71#ibcon#*before return 0, iclass 27, count 2 2006.229.14:40:41.71#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:41.71#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:41.71#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.14:40:41.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:41.71#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:41.83#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:41.83#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:41.83#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:40:41.83#ibcon#first serial, iclass 27, count 0 2006.229.14:40:41.83#ibcon#enter sib2, iclass 27, count 0 2006.229.14:40:41.83#ibcon#flushed, iclass 27, count 0 2006.229.14:40:41.83#ibcon#about to write, iclass 27, count 0 2006.229.14:40:41.83#ibcon#wrote, iclass 27, count 0 2006.229.14:40:41.83#ibcon#about to read 3, iclass 27, count 0 2006.229.14:40:41.85#ibcon#read 3, iclass 27, count 0 2006.229.14:40:41.85#ibcon#about to read 4, iclass 27, count 0 2006.229.14:40:41.85#ibcon#read 4, iclass 27, count 0 2006.229.14:40:41.85#ibcon#about to read 5, iclass 27, count 0 2006.229.14:40:41.85#ibcon#read 5, iclass 27, count 0 2006.229.14:40:41.85#ibcon#about to read 6, iclass 27, count 0 2006.229.14:40:41.85#ibcon#read 6, iclass 27, count 0 2006.229.14:40:41.85#ibcon#end of sib2, iclass 27, count 0 2006.229.14:40:41.85#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:40:41.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:40:41.85#ibcon#[25=USB\r\n] 2006.229.14:40:41.85#ibcon#*before write, iclass 27, count 0 2006.229.14:40:41.85#ibcon#enter sib2, iclass 27, count 0 2006.229.14:40:41.85#ibcon#flushed, iclass 27, count 0 2006.229.14:40:41.85#ibcon#about to write, iclass 27, count 0 2006.229.14:40:41.85#ibcon#wrote, iclass 27, count 0 2006.229.14:40:41.85#ibcon#about to read 3, iclass 27, count 0 2006.229.14:40:41.88#ibcon#read 3, iclass 27, count 0 2006.229.14:40:41.88#ibcon#about to read 4, iclass 27, count 0 2006.229.14:40:41.88#ibcon#read 4, iclass 27, count 0 2006.229.14:40:41.88#ibcon#about to read 5, iclass 27, count 0 2006.229.14:40:41.88#ibcon#read 5, iclass 27, count 0 2006.229.14:40:41.88#ibcon#about to read 6, iclass 27, count 0 2006.229.14:40:41.88#ibcon#read 6, iclass 27, count 0 2006.229.14:40:41.88#ibcon#end of sib2, iclass 27, count 0 2006.229.14:40:41.88#ibcon#*after write, iclass 27, count 0 2006.229.14:40:41.88#ibcon#*before return 0, iclass 27, count 0 2006.229.14:40:41.88#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:41.88#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:41.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:40:41.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:40:41.88$vck44/valo=6,814.99 2006.229.14:40:41.88#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:40:41.88#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:40:41.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:41.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:41.88#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:41.88#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:41.88#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:40:41.88#ibcon#first serial, iclass 29, count 0 2006.229.14:40:41.88#ibcon#enter sib2, iclass 29, count 0 2006.229.14:40:41.88#ibcon#flushed, iclass 29, count 0 2006.229.14:40:41.88#ibcon#about to write, iclass 29, count 0 2006.229.14:40:41.88#ibcon#wrote, iclass 29, count 0 2006.229.14:40:41.88#ibcon#about to read 3, iclass 29, count 0 2006.229.14:40:41.90#ibcon#read 3, iclass 29, count 0 2006.229.14:40:41.90#ibcon#about to read 4, iclass 29, count 0 2006.229.14:40:41.90#ibcon#read 4, iclass 29, count 0 2006.229.14:40:41.90#ibcon#about to read 5, iclass 29, count 0 2006.229.14:40:41.90#ibcon#read 5, iclass 29, count 0 2006.229.14:40:41.90#ibcon#about to read 6, iclass 29, count 0 2006.229.14:40:41.90#ibcon#read 6, iclass 29, count 0 2006.229.14:40:41.90#ibcon#end of sib2, iclass 29, count 0 2006.229.14:40:41.90#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:40:41.90#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:40:41.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:40:41.90#ibcon#*before write, iclass 29, count 0 2006.229.14:40:41.90#ibcon#enter sib2, iclass 29, count 0 2006.229.14:40:41.90#ibcon#flushed, iclass 29, count 0 2006.229.14:40:41.90#ibcon#about to write, iclass 29, count 0 2006.229.14:40:41.90#ibcon#wrote, iclass 29, count 0 2006.229.14:40:41.90#ibcon#about to read 3, iclass 29, count 0 2006.229.14:40:41.94#ibcon#read 3, iclass 29, count 0 2006.229.14:40:41.94#ibcon#about to read 4, iclass 29, count 0 2006.229.14:40:41.94#ibcon#read 4, iclass 29, count 0 2006.229.14:40:41.94#ibcon#about to read 5, iclass 29, count 0 2006.229.14:40:41.94#ibcon#read 5, iclass 29, count 0 2006.229.14:40:41.94#ibcon#about to read 6, iclass 29, count 0 2006.229.14:40:41.94#ibcon#read 6, iclass 29, count 0 2006.229.14:40:41.94#ibcon#end of sib2, iclass 29, count 0 2006.229.14:40:41.94#ibcon#*after write, iclass 29, count 0 2006.229.14:40:41.94#ibcon#*before return 0, iclass 29, count 0 2006.229.14:40:41.94#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:41.94#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:41.94#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:40:41.94#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:40:41.94$vck44/va=6,4 2006.229.14:40:41.94#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.14:40:41.94#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.14:40:41.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:41.94#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:42.00#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:42.00#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:42.00#ibcon#enter wrdev, iclass 31, count 2 2006.229.14:40:42.00#ibcon#first serial, iclass 31, count 2 2006.229.14:40:42.00#ibcon#enter sib2, iclass 31, count 2 2006.229.14:40:42.00#ibcon#flushed, iclass 31, count 2 2006.229.14:40:42.00#ibcon#about to write, iclass 31, count 2 2006.229.14:40:42.00#ibcon#wrote, iclass 31, count 2 2006.229.14:40:42.00#ibcon#about to read 3, iclass 31, count 2 2006.229.14:40:42.02#ibcon#read 3, iclass 31, count 2 2006.229.14:40:42.02#ibcon#about to read 4, iclass 31, count 2 2006.229.14:40:42.02#ibcon#read 4, iclass 31, count 2 2006.229.14:40:42.02#ibcon#about to read 5, iclass 31, count 2 2006.229.14:40:42.02#ibcon#read 5, iclass 31, count 2 2006.229.14:40:42.02#ibcon#about to read 6, iclass 31, count 2 2006.229.14:40:42.02#ibcon#read 6, iclass 31, count 2 2006.229.14:40:42.02#ibcon#end of sib2, iclass 31, count 2 2006.229.14:40:42.02#ibcon#*mode == 0, iclass 31, count 2 2006.229.14:40:42.02#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.14:40:42.02#ibcon#[25=AT06-04\r\n] 2006.229.14:40:42.02#ibcon#*before write, iclass 31, count 2 2006.229.14:40:42.02#ibcon#enter sib2, iclass 31, count 2 2006.229.14:40:42.02#ibcon#flushed, iclass 31, count 2 2006.229.14:40:42.02#ibcon#about to write, iclass 31, count 2 2006.229.14:40:42.02#ibcon#wrote, iclass 31, count 2 2006.229.14:40:42.02#ibcon#about to read 3, iclass 31, count 2 2006.229.14:40:42.05#ibcon#read 3, iclass 31, count 2 2006.229.14:40:42.05#ibcon#about to read 4, iclass 31, count 2 2006.229.14:40:42.05#ibcon#read 4, iclass 31, count 2 2006.229.14:40:42.05#ibcon#about to read 5, iclass 31, count 2 2006.229.14:40:42.05#ibcon#read 5, iclass 31, count 2 2006.229.14:40:42.05#ibcon#about to read 6, iclass 31, count 2 2006.229.14:40:42.05#ibcon#read 6, iclass 31, count 2 2006.229.14:40:42.05#ibcon#end of sib2, iclass 31, count 2 2006.229.14:40:42.05#ibcon#*after write, iclass 31, count 2 2006.229.14:40:42.05#ibcon#*before return 0, iclass 31, count 2 2006.229.14:40:42.05#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:42.05#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:42.05#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.14:40:42.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:42.05#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:42.17#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:42.17#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:42.17#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:40:42.17#ibcon#first serial, iclass 31, count 0 2006.229.14:40:42.17#ibcon#enter sib2, iclass 31, count 0 2006.229.14:40:42.17#ibcon#flushed, iclass 31, count 0 2006.229.14:40:42.17#ibcon#about to write, iclass 31, count 0 2006.229.14:40:42.17#ibcon#wrote, iclass 31, count 0 2006.229.14:40:42.17#ibcon#about to read 3, iclass 31, count 0 2006.229.14:40:42.19#ibcon#read 3, iclass 31, count 0 2006.229.14:40:42.19#ibcon#about to read 4, iclass 31, count 0 2006.229.14:40:42.19#ibcon#read 4, iclass 31, count 0 2006.229.14:40:42.19#ibcon#about to read 5, iclass 31, count 0 2006.229.14:40:42.19#ibcon#read 5, iclass 31, count 0 2006.229.14:40:42.19#ibcon#about to read 6, iclass 31, count 0 2006.229.14:40:42.19#ibcon#read 6, iclass 31, count 0 2006.229.14:40:42.19#ibcon#end of sib2, iclass 31, count 0 2006.229.14:40:42.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:40:42.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:40:42.19#ibcon#[25=USB\r\n] 2006.229.14:40:42.19#ibcon#*before write, iclass 31, count 0 2006.229.14:40:42.19#ibcon#enter sib2, iclass 31, count 0 2006.229.14:40:42.19#ibcon#flushed, iclass 31, count 0 2006.229.14:40:42.19#ibcon#about to write, iclass 31, count 0 2006.229.14:40:42.19#ibcon#wrote, iclass 31, count 0 2006.229.14:40:42.19#ibcon#about to read 3, iclass 31, count 0 2006.229.14:40:42.22#ibcon#read 3, iclass 31, count 0 2006.229.14:40:42.22#ibcon#about to read 4, iclass 31, count 0 2006.229.14:40:42.22#ibcon#read 4, iclass 31, count 0 2006.229.14:40:42.22#ibcon#about to read 5, iclass 31, count 0 2006.229.14:40:42.22#ibcon#read 5, iclass 31, count 0 2006.229.14:40:42.22#ibcon#about to read 6, iclass 31, count 0 2006.229.14:40:42.22#ibcon#read 6, iclass 31, count 0 2006.229.14:40:42.22#ibcon#end of sib2, iclass 31, count 0 2006.229.14:40:42.22#ibcon#*after write, iclass 31, count 0 2006.229.14:40:42.22#ibcon#*before return 0, iclass 31, count 0 2006.229.14:40:42.22#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:42.22#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:42.22#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:40:42.22#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:40:42.22$vck44/valo=7,864.99 2006.229.14:40:42.22#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.14:40:42.22#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.14:40:42.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:42.22#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:42.22#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:42.22#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:42.22#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:40:42.22#ibcon#first serial, iclass 33, count 0 2006.229.14:40:42.22#ibcon#enter sib2, iclass 33, count 0 2006.229.14:40:42.22#ibcon#flushed, iclass 33, count 0 2006.229.14:40:42.22#ibcon#about to write, iclass 33, count 0 2006.229.14:40:42.22#ibcon#wrote, iclass 33, count 0 2006.229.14:40:42.22#ibcon#about to read 3, iclass 33, count 0 2006.229.14:40:42.24#ibcon#read 3, iclass 33, count 0 2006.229.14:40:42.24#ibcon#about to read 4, iclass 33, count 0 2006.229.14:40:42.24#ibcon#read 4, iclass 33, count 0 2006.229.14:40:42.24#ibcon#about to read 5, iclass 33, count 0 2006.229.14:40:42.24#ibcon#read 5, iclass 33, count 0 2006.229.14:40:42.24#ibcon#about to read 6, iclass 33, count 0 2006.229.14:40:42.24#ibcon#read 6, iclass 33, count 0 2006.229.14:40:42.24#ibcon#end of sib2, iclass 33, count 0 2006.229.14:40:42.24#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:40:42.24#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:40:42.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:40:42.24#ibcon#*before write, iclass 33, count 0 2006.229.14:40:42.24#ibcon#enter sib2, iclass 33, count 0 2006.229.14:40:42.24#ibcon#flushed, iclass 33, count 0 2006.229.14:40:42.24#ibcon#about to write, iclass 33, count 0 2006.229.14:40:42.24#ibcon#wrote, iclass 33, count 0 2006.229.14:40:42.24#ibcon#about to read 3, iclass 33, count 0 2006.229.14:40:42.28#ibcon#read 3, iclass 33, count 0 2006.229.14:40:42.28#ibcon#about to read 4, iclass 33, count 0 2006.229.14:40:42.28#ibcon#read 4, iclass 33, count 0 2006.229.14:40:42.28#ibcon#about to read 5, iclass 33, count 0 2006.229.14:40:42.28#ibcon#read 5, iclass 33, count 0 2006.229.14:40:42.28#ibcon#about to read 6, iclass 33, count 0 2006.229.14:40:42.28#ibcon#read 6, iclass 33, count 0 2006.229.14:40:42.28#ibcon#end of sib2, iclass 33, count 0 2006.229.14:40:42.28#ibcon#*after write, iclass 33, count 0 2006.229.14:40:42.28#ibcon#*before return 0, iclass 33, count 0 2006.229.14:40:42.28#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:42.28#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:42.28#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:40:42.28#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:40:42.28$vck44/va=7,5 2006.229.14:40:42.28#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.14:40:42.28#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.14:40:42.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:42.28#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:42.34#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:42.34#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:42.34#ibcon#enter wrdev, iclass 35, count 2 2006.229.14:40:42.34#ibcon#first serial, iclass 35, count 2 2006.229.14:40:42.34#ibcon#enter sib2, iclass 35, count 2 2006.229.14:40:42.34#ibcon#flushed, iclass 35, count 2 2006.229.14:40:42.34#ibcon#about to write, iclass 35, count 2 2006.229.14:40:42.34#ibcon#wrote, iclass 35, count 2 2006.229.14:40:42.34#ibcon#about to read 3, iclass 35, count 2 2006.229.14:40:42.36#ibcon#read 3, iclass 35, count 2 2006.229.14:40:42.36#ibcon#about to read 4, iclass 35, count 2 2006.229.14:40:42.36#ibcon#read 4, iclass 35, count 2 2006.229.14:40:42.36#ibcon#about to read 5, iclass 35, count 2 2006.229.14:40:42.36#ibcon#read 5, iclass 35, count 2 2006.229.14:40:42.36#ibcon#about to read 6, iclass 35, count 2 2006.229.14:40:42.36#ibcon#read 6, iclass 35, count 2 2006.229.14:40:42.36#ibcon#end of sib2, iclass 35, count 2 2006.229.14:40:42.36#ibcon#*mode == 0, iclass 35, count 2 2006.229.14:40:42.36#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.14:40:42.36#ibcon#[25=AT07-05\r\n] 2006.229.14:40:42.36#ibcon#*before write, iclass 35, count 2 2006.229.14:40:42.36#ibcon#enter sib2, iclass 35, count 2 2006.229.14:40:42.36#ibcon#flushed, iclass 35, count 2 2006.229.14:40:42.36#ibcon#about to write, iclass 35, count 2 2006.229.14:40:42.36#ibcon#wrote, iclass 35, count 2 2006.229.14:40:42.36#ibcon#about to read 3, iclass 35, count 2 2006.229.14:40:42.39#ibcon#read 3, iclass 35, count 2 2006.229.14:40:42.39#ibcon#about to read 4, iclass 35, count 2 2006.229.14:40:42.39#ibcon#read 4, iclass 35, count 2 2006.229.14:40:42.39#ibcon#about to read 5, iclass 35, count 2 2006.229.14:40:42.39#ibcon#read 5, iclass 35, count 2 2006.229.14:40:42.39#ibcon#about to read 6, iclass 35, count 2 2006.229.14:40:42.39#ibcon#read 6, iclass 35, count 2 2006.229.14:40:42.39#ibcon#end of sib2, iclass 35, count 2 2006.229.14:40:42.39#ibcon#*after write, iclass 35, count 2 2006.229.14:40:42.39#ibcon#*before return 0, iclass 35, count 2 2006.229.14:40:42.39#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:42.39#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:42.39#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.14:40:42.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:42.39#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:42.51#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:42.51#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:42.51#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:40:42.51#ibcon#first serial, iclass 35, count 0 2006.229.14:40:42.51#ibcon#enter sib2, iclass 35, count 0 2006.229.14:40:42.51#ibcon#flushed, iclass 35, count 0 2006.229.14:40:42.51#ibcon#about to write, iclass 35, count 0 2006.229.14:40:42.51#ibcon#wrote, iclass 35, count 0 2006.229.14:40:42.51#ibcon#about to read 3, iclass 35, count 0 2006.229.14:40:42.53#ibcon#read 3, iclass 35, count 0 2006.229.14:40:42.53#ibcon#about to read 4, iclass 35, count 0 2006.229.14:40:42.53#ibcon#read 4, iclass 35, count 0 2006.229.14:40:42.53#ibcon#about to read 5, iclass 35, count 0 2006.229.14:40:42.53#ibcon#read 5, iclass 35, count 0 2006.229.14:40:42.53#ibcon#about to read 6, iclass 35, count 0 2006.229.14:40:42.53#ibcon#read 6, iclass 35, count 0 2006.229.14:40:42.53#ibcon#end of sib2, iclass 35, count 0 2006.229.14:40:42.53#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:40:42.53#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:40:42.53#ibcon#[25=USB\r\n] 2006.229.14:40:42.53#ibcon#*before write, iclass 35, count 0 2006.229.14:40:42.53#ibcon#enter sib2, iclass 35, count 0 2006.229.14:40:42.53#ibcon#flushed, iclass 35, count 0 2006.229.14:40:42.53#ibcon#about to write, iclass 35, count 0 2006.229.14:40:42.53#ibcon#wrote, iclass 35, count 0 2006.229.14:40:42.53#ibcon#about to read 3, iclass 35, count 0 2006.229.14:40:42.56#ibcon#read 3, iclass 35, count 0 2006.229.14:40:42.56#ibcon#about to read 4, iclass 35, count 0 2006.229.14:40:42.56#ibcon#read 4, iclass 35, count 0 2006.229.14:40:42.56#ibcon#about to read 5, iclass 35, count 0 2006.229.14:40:42.56#ibcon#read 5, iclass 35, count 0 2006.229.14:40:42.56#ibcon#about to read 6, iclass 35, count 0 2006.229.14:40:42.56#ibcon#read 6, iclass 35, count 0 2006.229.14:40:42.56#ibcon#end of sib2, iclass 35, count 0 2006.229.14:40:42.56#ibcon#*after write, iclass 35, count 0 2006.229.14:40:42.56#ibcon#*before return 0, iclass 35, count 0 2006.229.14:40:42.56#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:42.56#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:42.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:40:42.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:40:42.56$vck44/valo=8,884.99 2006.229.14:40:42.56#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:40:42.56#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:40:42.56#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:42.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:42.56#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:42.56#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:42.56#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:40:42.56#ibcon#first serial, iclass 37, count 0 2006.229.14:40:42.56#ibcon#enter sib2, iclass 37, count 0 2006.229.14:40:42.56#ibcon#flushed, iclass 37, count 0 2006.229.14:40:42.56#ibcon#about to write, iclass 37, count 0 2006.229.14:40:42.56#ibcon#wrote, iclass 37, count 0 2006.229.14:40:42.56#ibcon#about to read 3, iclass 37, count 0 2006.229.14:40:42.58#ibcon#read 3, iclass 37, count 0 2006.229.14:40:42.58#ibcon#about to read 4, iclass 37, count 0 2006.229.14:40:42.58#ibcon#read 4, iclass 37, count 0 2006.229.14:40:42.58#ibcon#about to read 5, iclass 37, count 0 2006.229.14:40:42.58#ibcon#read 5, iclass 37, count 0 2006.229.14:40:42.58#ibcon#about to read 6, iclass 37, count 0 2006.229.14:40:42.58#ibcon#read 6, iclass 37, count 0 2006.229.14:40:42.58#ibcon#end of sib2, iclass 37, count 0 2006.229.14:40:42.58#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:40:42.58#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:40:42.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:40:42.58#ibcon#*before write, iclass 37, count 0 2006.229.14:40:42.58#ibcon#enter sib2, iclass 37, count 0 2006.229.14:40:42.58#ibcon#flushed, iclass 37, count 0 2006.229.14:40:42.58#ibcon#about to write, iclass 37, count 0 2006.229.14:40:42.58#ibcon#wrote, iclass 37, count 0 2006.229.14:40:42.58#ibcon#about to read 3, iclass 37, count 0 2006.229.14:40:42.62#ibcon#read 3, iclass 37, count 0 2006.229.14:40:42.62#ibcon#about to read 4, iclass 37, count 0 2006.229.14:40:42.62#ibcon#read 4, iclass 37, count 0 2006.229.14:40:42.62#ibcon#about to read 5, iclass 37, count 0 2006.229.14:40:42.62#ibcon#read 5, iclass 37, count 0 2006.229.14:40:42.62#ibcon#about to read 6, iclass 37, count 0 2006.229.14:40:42.62#ibcon#read 6, iclass 37, count 0 2006.229.14:40:42.62#ibcon#end of sib2, iclass 37, count 0 2006.229.14:40:42.62#ibcon#*after write, iclass 37, count 0 2006.229.14:40:42.62#ibcon#*before return 0, iclass 37, count 0 2006.229.14:40:42.62#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:42.62#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:42.62#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:40:42.62#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:40:42.62$vck44/va=8,6 2006.229.14:40:42.62#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.14:40:42.62#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.14:40:42.62#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:42.62#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:40:42.68#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:40:42.68#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:40:42.68#ibcon#enter wrdev, iclass 39, count 2 2006.229.14:40:42.68#ibcon#first serial, iclass 39, count 2 2006.229.14:40:42.68#ibcon#enter sib2, iclass 39, count 2 2006.229.14:40:42.68#ibcon#flushed, iclass 39, count 2 2006.229.14:40:42.68#ibcon#about to write, iclass 39, count 2 2006.229.14:40:42.68#ibcon#wrote, iclass 39, count 2 2006.229.14:40:42.68#ibcon#about to read 3, iclass 39, count 2 2006.229.14:40:42.70#ibcon#read 3, iclass 39, count 2 2006.229.14:40:42.70#ibcon#about to read 4, iclass 39, count 2 2006.229.14:40:42.70#ibcon#read 4, iclass 39, count 2 2006.229.14:40:42.70#ibcon#about to read 5, iclass 39, count 2 2006.229.14:40:42.70#ibcon#read 5, iclass 39, count 2 2006.229.14:40:42.70#ibcon#about to read 6, iclass 39, count 2 2006.229.14:40:42.70#ibcon#read 6, iclass 39, count 2 2006.229.14:40:42.70#ibcon#end of sib2, iclass 39, count 2 2006.229.14:40:42.70#ibcon#*mode == 0, iclass 39, count 2 2006.229.14:40:42.70#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.14:40:42.70#ibcon#[25=AT08-06\r\n] 2006.229.14:40:42.70#ibcon#*before write, iclass 39, count 2 2006.229.14:40:42.70#ibcon#enter sib2, iclass 39, count 2 2006.229.14:40:42.70#ibcon#flushed, iclass 39, count 2 2006.229.14:40:42.70#ibcon#about to write, iclass 39, count 2 2006.229.14:40:42.70#ibcon#wrote, iclass 39, count 2 2006.229.14:40:42.70#ibcon#about to read 3, iclass 39, count 2 2006.229.14:40:42.73#ibcon#read 3, iclass 39, count 2 2006.229.14:40:42.73#ibcon#about to read 4, iclass 39, count 2 2006.229.14:40:42.73#ibcon#read 4, iclass 39, count 2 2006.229.14:40:42.73#ibcon#about to read 5, iclass 39, count 2 2006.229.14:40:42.73#ibcon#read 5, iclass 39, count 2 2006.229.14:40:42.73#ibcon#about to read 6, iclass 39, count 2 2006.229.14:40:42.73#ibcon#read 6, iclass 39, count 2 2006.229.14:40:42.73#ibcon#end of sib2, iclass 39, count 2 2006.229.14:40:42.73#ibcon#*after write, iclass 39, count 2 2006.229.14:40:42.73#ibcon#*before return 0, iclass 39, count 2 2006.229.14:40:42.73#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:40:42.73#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.14:40:42.73#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.14:40:42.73#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:42.73#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:40:42.85#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:40:42.85#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:40:42.85#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:40:42.85#ibcon#first serial, iclass 39, count 0 2006.229.14:40:42.85#ibcon#enter sib2, iclass 39, count 0 2006.229.14:40:42.85#ibcon#flushed, iclass 39, count 0 2006.229.14:40:42.85#ibcon#about to write, iclass 39, count 0 2006.229.14:40:42.85#ibcon#wrote, iclass 39, count 0 2006.229.14:40:42.85#ibcon#about to read 3, iclass 39, count 0 2006.229.14:40:42.87#ibcon#read 3, iclass 39, count 0 2006.229.14:40:42.87#ibcon#about to read 4, iclass 39, count 0 2006.229.14:40:42.87#ibcon#read 4, iclass 39, count 0 2006.229.14:40:42.87#ibcon#about to read 5, iclass 39, count 0 2006.229.14:40:42.87#ibcon#read 5, iclass 39, count 0 2006.229.14:40:42.87#ibcon#about to read 6, iclass 39, count 0 2006.229.14:40:42.87#ibcon#read 6, iclass 39, count 0 2006.229.14:40:42.87#ibcon#end of sib2, iclass 39, count 0 2006.229.14:40:42.87#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:40:42.87#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:40:42.87#ibcon#[25=USB\r\n] 2006.229.14:40:42.87#ibcon#*before write, iclass 39, count 0 2006.229.14:40:42.87#ibcon#enter sib2, iclass 39, count 0 2006.229.14:40:42.87#ibcon#flushed, iclass 39, count 0 2006.229.14:40:42.87#ibcon#about to write, iclass 39, count 0 2006.229.14:40:42.87#ibcon#wrote, iclass 39, count 0 2006.229.14:40:42.87#ibcon#about to read 3, iclass 39, count 0 2006.229.14:40:42.90#ibcon#read 3, iclass 39, count 0 2006.229.14:40:42.90#ibcon#about to read 4, iclass 39, count 0 2006.229.14:40:42.90#ibcon#read 4, iclass 39, count 0 2006.229.14:40:42.90#ibcon#about to read 5, iclass 39, count 0 2006.229.14:40:42.90#ibcon#read 5, iclass 39, count 0 2006.229.14:40:42.90#ibcon#about to read 6, iclass 39, count 0 2006.229.14:40:42.90#ibcon#read 6, iclass 39, count 0 2006.229.14:40:42.90#ibcon#end of sib2, iclass 39, count 0 2006.229.14:40:42.90#ibcon#*after write, iclass 39, count 0 2006.229.14:40:42.90#ibcon#*before return 0, iclass 39, count 0 2006.229.14:40:42.90#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:40:42.90#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.14:40:42.90#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:40:42.90#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:40:42.90$vck44/vblo=1,629.99 2006.229.14:40:42.90#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.14:40:42.90#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.14:40:42.90#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:42.90#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:40:42.90#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:40:42.90#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:40:42.90#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:40:42.90#ibcon#first serial, iclass 3, count 0 2006.229.14:40:42.90#ibcon#enter sib2, iclass 3, count 0 2006.229.14:40:42.90#ibcon#flushed, iclass 3, count 0 2006.229.14:40:42.90#ibcon#about to write, iclass 3, count 0 2006.229.14:40:42.90#ibcon#wrote, iclass 3, count 0 2006.229.14:40:42.90#ibcon#about to read 3, iclass 3, count 0 2006.229.14:40:42.92#ibcon#read 3, iclass 3, count 0 2006.229.14:40:42.92#ibcon#about to read 4, iclass 3, count 0 2006.229.14:40:42.92#ibcon#read 4, iclass 3, count 0 2006.229.14:40:42.92#ibcon#about to read 5, iclass 3, count 0 2006.229.14:40:42.92#ibcon#read 5, iclass 3, count 0 2006.229.14:40:42.92#ibcon#about to read 6, iclass 3, count 0 2006.229.14:40:42.92#ibcon#read 6, iclass 3, count 0 2006.229.14:40:42.92#ibcon#end of sib2, iclass 3, count 0 2006.229.14:40:42.92#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:40:42.92#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:40:42.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:40:42.92#ibcon#*before write, iclass 3, count 0 2006.229.14:40:42.92#ibcon#enter sib2, iclass 3, count 0 2006.229.14:40:42.92#ibcon#flushed, iclass 3, count 0 2006.229.14:40:42.92#ibcon#about to write, iclass 3, count 0 2006.229.14:40:42.92#ibcon#wrote, iclass 3, count 0 2006.229.14:40:42.92#ibcon#about to read 3, iclass 3, count 0 2006.229.14:40:42.96#ibcon#read 3, iclass 3, count 0 2006.229.14:40:42.96#ibcon#about to read 4, iclass 3, count 0 2006.229.14:40:42.96#ibcon#read 4, iclass 3, count 0 2006.229.14:40:42.96#ibcon#about to read 5, iclass 3, count 0 2006.229.14:40:42.96#ibcon#read 5, iclass 3, count 0 2006.229.14:40:42.96#ibcon#about to read 6, iclass 3, count 0 2006.229.14:40:42.96#ibcon#read 6, iclass 3, count 0 2006.229.14:40:42.96#ibcon#end of sib2, iclass 3, count 0 2006.229.14:40:42.96#ibcon#*after write, iclass 3, count 0 2006.229.14:40:42.96#ibcon#*before return 0, iclass 3, count 0 2006.229.14:40:42.96#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:40:42.96#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.14:40:42.96#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:40:42.96#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:40:42.96$vck44/vb=1,4 2006.229.14:40:42.96#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.14:40:42.96#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.14:40:42.96#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:42.96#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:40:42.96#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:40:42.96#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:40:42.96#ibcon#enter wrdev, iclass 5, count 2 2006.229.14:40:42.96#ibcon#first serial, iclass 5, count 2 2006.229.14:40:42.96#ibcon#enter sib2, iclass 5, count 2 2006.229.14:40:42.96#ibcon#flushed, iclass 5, count 2 2006.229.14:40:42.96#ibcon#about to write, iclass 5, count 2 2006.229.14:40:42.96#ibcon#wrote, iclass 5, count 2 2006.229.14:40:42.96#ibcon#about to read 3, iclass 5, count 2 2006.229.14:40:42.98#ibcon#read 3, iclass 5, count 2 2006.229.14:40:42.98#ibcon#about to read 4, iclass 5, count 2 2006.229.14:40:42.98#ibcon#read 4, iclass 5, count 2 2006.229.14:40:42.98#ibcon#about to read 5, iclass 5, count 2 2006.229.14:40:42.98#ibcon#read 5, iclass 5, count 2 2006.229.14:40:42.98#ibcon#about to read 6, iclass 5, count 2 2006.229.14:40:42.98#ibcon#read 6, iclass 5, count 2 2006.229.14:40:42.98#ibcon#end of sib2, iclass 5, count 2 2006.229.14:40:42.98#ibcon#*mode == 0, iclass 5, count 2 2006.229.14:40:42.98#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.14:40:42.98#ibcon#[27=AT01-04\r\n] 2006.229.14:40:42.98#ibcon#*before write, iclass 5, count 2 2006.229.14:40:42.98#ibcon#enter sib2, iclass 5, count 2 2006.229.14:40:42.98#ibcon#flushed, iclass 5, count 2 2006.229.14:40:42.98#ibcon#about to write, iclass 5, count 2 2006.229.14:40:42.98#ibcon#wrote, iclass 5, count 2 2006.229.14:40:42.98#ibcon#about to read 3, iclass 5, count 2 2006.229.14:40:43.01#ibcon#read 3, iclass 5, count 2 2006.229.14:40:43.01#ibcon#about to read 4, iclass 5, count 2 2006.229.14:40:43.01#ibcon#read 4, iclass 5, count 2 2006.229.14:40:43.01#ibcon#about to read 5, iclass 5, count 2 2006.229.14:40:43.01#ibcon#read 5, iclass 5, count 2 2006.229.14:40:43.01#ibcon#about to read 6, iclass 5, count 2 2006.229.14:40:43.01#ibcon#read 6, iclass 5, count 2 2006.229.14:40:43.01#ibcon#end of sib2, iclass 5, count 2 2006.229.14:40:43.01#ibcon#*after write, iclass 5, count 2 2006.229.14:40:43.01#ibcon#*before return 0, iclass 5, count 2 2006.229.14:40:43.01#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:40:43.01#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.14:40:43.01#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.14:40:43.01#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:43.01#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:40:43.13#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:40:43.13#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:40:43.13#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:40:43.13#ibcon#first serial, iclass 5, count 0 2006.229.14:40:43.13#ibcon#enter sib2, iclass 5, count 0 2006.229.14:40:43.13#ibcon#flushed, iclass 5, count 0 2006.229.14:40:43.13#ibcon#about to write, iclass 5, count 0 2006.229.14:40:43.13#ibcon#wrote, iclass 5, count 0 2006.229.14:40:43.13#ibcon#about to read 3, iclass 5, count 0 2006.229.14:40:43.15#ibcon#read 3, iclass 5, count 0 2006.229.14:40:43.15#ibcon#about to read 4, iclass 5, count 0 2006.229.14:40:43.15#ibcon#read 4, iclass 5, count 0 2006.229.14:40:43.15#ibcon#about to read 5, iclass 5, count 0 2006.229.14:40:43.15#ibcon#read 5, iclass 5, count 0 2006.229.14:40:43.15#ibcon#about to read 6, iclass 5, count 0 2006.229.14:40:43.15#ibcon#read 6, iclass 5, count 0 2006.229.14:40:43.15#ibcon#end of sib2, iclass 5, count 0 2006.229.14:40:43.15#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:40:43.15#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:40:43.15#ibcon#[27=USB\r\n] 2006.229.14:40:43.15#ibcon#*before write, iclass 5, count 0 2006.229.14:40:43.15#ibcon#enter sib2, iclass 5, count 0 2006.229.14:40:43.15#ibcon#flushed, iclass 5, count 0 2006.229.14:40:43.15#ibcon#about to write, iclass 5, count 0 2006.229.14:40:43.15#ibcon#wrote, iclass 5, count 0 2006.229.14:40:43.15#ibcon#about to read 3, iclass 5, count 0 2006.229.14:40:43.18#ibcon#read 3, iclass 5, count 0 2006.229.14:40:43.18#ibcon#about to read 4, iclass 5, count 0 2006.229.14:40:43.18#ibcon#read 4, iclass 5, count 0 2006.229.14:40:43.18#ibcon#about to read 5, iclass 5, count 0 2006.229.14:40:43.18#ibcon#read 5, iclass 5, count 0 2006.229.14:40:43.18#ibcon#about to read 6, iclass 5, count 0 2006.229.14:40:43.18#ibcon#read 6, iclass 5, count 0 2006.229.14:40:43.18#ibcon#end of sib2, iclass 5, count 0 2006.229.14:40:43.18#ibcon#*after write, iclass 5, count 0 2006.229.14:40:43.18#ibcon#*before return 0, iclass 5, count 0 2006.229.14:40:43.18#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:40:43.18#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.14:40:43.18#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:40:43.18#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:40:43.18$vck44/vblo=2,634.99 2006.229.14:40:43.18#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.14:40:43.18#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.14:40:43.18#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:43.18#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:43.18#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:43.18#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:43.18#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:40:43.18#ibcon#first serial, iclass 7, count 0 2006.229.14:40:43.18#ibcon#enter sib2, iclass 7, count 0 2006.229.14:40:43.18#ibcon#flushed, iclass 7, count 0 2006.229.14:40:43.18#ibcon#about to write, iclass 7, count 0 2006.229.14:40:43.18#ibcon#wrote, iclass 7, count 0 2006.229.14:40:43.18#ibcon#about to read 3, iclass 7, count 0 2006.229.14:40:43.20#ibcon#read 3, iclass 7, count 0 2006.229.14:40:43.20#ibcon#about to read 4, iclass 7, count 0 2006.229.14:40:43.20#ibcon#read 4, iclass 7, count 0 2006.229.14:40:43.20#ibcon#about to read 5, iclass 7, count 0 2006.229.14:40:43.20#ibcon#read 5, iclass 7, count 0 2006.229.14:40:43.20#ibcon#about to read 6, iclass 7, count 0 2006.229.14:40:43.20#ibcon#read 6, iclass 7, count 0 2006.229.14:40:43.20#ibcon#end of sib2, iclass 7, count 0 2006.229.14:40:43.20#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:40:43.20#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:40:43.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:40:43.20#ibcon#*before write, iclass 7, count 0 2006.229.14:40:43.20#ibcon#enter sib2, iclass 7, count 0 2006.229.14:40:43.20#ibcon#flushed, iclass 7, count 0 2006.229.14:40:43.20#ibcon#about to write, iclass 7, count 0 2006.229.14:40:43.20#ibcon#wrote, iclass 7, count 0 2006.229.14:40:43.20#ibcon#about to read 3, iclass 7, count 0 2006.229.14:40:43.24#ibcon#read 3, iclass 7, count 0 2006.229.14:40:43.24#ibcon#about to read 4, iclass 7, count 0 2006.229.14:40:43.24#ibcon#read 4, iclass 7, count 0 2006.229.14:40:43.24#ibcon#about to read 5, iclass 7, count 0 2006.229.14:40:43.24#ibcon#read 5, iclass 7, count 0 2006.229.14:40:43.24#ibcon#about to read 6, iclass 7, count 0 2006.229.14:40:43.24#ibcon#read 6, iclass 7, count 0 2006.229.14:40:43.24#ibcon#end of sib2, iclass 7, count 0 2006.229.14:40:43.24#ibcon#*after write, iclass 7, count 0 2006.229.14:40:43.24#ibcon#*before return 0, iclass 7, count 0 2006.229.14:40:43.24#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:43.24#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.14:40:43.24#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:40:43.24#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:40:43.24$vck44/vb=2,4 2006.229.14:40:43.24#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.14:40:43.24#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.14:40:43.24#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:43.24#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:43.30#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:43.30#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:43.30#ibcon#enter wrdev, iclass 11, count 2 2006.229.14:40:43.30#ibcon#first serial, iclass 11, count 2 2006.229.14:40:43.30#ibcon#enter sib2, iclass 11, count 2 2006.229.14:40:43.30#ibcon#flushed, iclass 11, count 2 2006.229.14:40:43.30#ibcon#about to write, iclass 11, count 2 2006.229.14:40:43.30#ibcon#wrote, iclass 11, count 2 2006.229.14:40:43.30#ibcon#about to read 3, iclass 11, count 2 2006.229.14:40:43.32#ibcon#read 3, iclass 11, count 2 2006.229.14:40:43.32#ibcon#about to read 4, iclass 11, count 2 2006.229.14:40:43.32#ibcon#read 4, iclass 11, count 2 2006.229.14:40:43.32#ibcon#about to read 5, iclass 11, count 2 2006.229.14:40:43.32#ibcon#read 5, iclass 11, count 2 2006.229.14:40:43.32#ibcon#about to read 6, iclass 11, count 2 2006.229.14:40:43.32#ibcon#read 6, iclass 11, count 2 2006.229.14:40:43.32#ibcon#end of sib2, iclass 11, count 2 2006.229.14:40:43.32#ibcon#*mode == 0, iclass 11, count 2 2006.229.14:40:43.32#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.14:40:43.32#ibcon#[27=AT02-04\r\n] 2006.229.14:40:43.32#ibcon#*before write, iclass 11, count 2 2006.229.14:40:43.32#ibcon#enter sib2, iclass 11, count 2 2006.229.14:40:43.32#ibcon#flushed, iclass 11, count 2 2006.229.14:40:43.32#ibcon#about to write, iclass 11, count 2 2006.229.14:40:43.32#ibcon#wrote, iclass 11, count 2 2006.229.14:40:43.32#ibcon#about to read 3, iclass 11, count 2 2006.229.14:40:43.35#ibcon#read 3, iclass 11, count 2 2006.229.14:40:43.35#ibcon#about to read 4, iclass 11, count 2 2006.229.14:40:43.35#ibcon#read 4, iclass 11, count 2 2006.229.14:40:43.35#ibcon#about to read 5, iclass 11, count 2 2006.229.14:40:43.35#ibcon#read 5, iclass 11, count 2 2006.229.14:40:43.35#ibcon#about to read 6, iclass 11, count 2 2006.229.14:40:43.35#ibcon#read 6, iclass 11, count 2 2006.229.14:40:43.35#ibcon#end of sib2, iclass 11, count 2 2006.229.14:40:43.35#ibcon#*after write, iclass 11, count 2 2006.229.14:40:43.35#ibcon#*before return 0, iclass 11, count 2 2006.229.14:40:43.35#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:43.35#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.14:40:43.35#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.14:40:43.35#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:43.35#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:43.47#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:43.47#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:43.47#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:40:43.47#ibcon#first serial, iclass 11, count 0 2006.229.14:40:43.47#ibcon#enter sib2, iclass 11, count 0 2006.229.14:40:43.47#ibcon#flushed, iclass 11, count 0 2006.229.14:40:43.47#ibcon#about to write, iclass 11, count 0 2006.229.14:40:43.47#ibcon#wrote, iclass 11, count 0 2006.229.14:40:43.47#ibcon#about to read 3, iclass 11, count 0 2006.229.14:40:43.49#ibcon#read 3, iclass 11, count 0 2006.229.14:40:43.49#ibcon#about to read 4, iclass 11, count 0 2006.229.14:40:43.49#ibcon#read 4, iclass 11, count 0 2006.229.14:40:43.49#ibcon#about to read 5, iclass 11, count 0 2006.229.14:40:43.49#ibcon#read 5, iclass 11, count 0 2006.229.14:40:43.49#ibcon#about to read 6, iclass 11, count 0 2006.229.14:40:43.49#ibcon#read 6, iclass 11, count 0 2006.229.14:40:43.49#ibcon#end of sib2, iclass 11, count 0 2006.229.14:40:43.49#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:40:43.49#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:40:43.49#ibcon#[27=USB\r\n] 2006.229.14:40:43.49#ibcon#*before write, iclass 11, count 0 2006.229.14:40:43.49#ibcon#enter sib2, iclass 11, count 0 2006.229.14:40:43.49#ibcon#flushed, iclass 11, count 0 2006.229.14:40:43.49#ibcon#about to write, iclass 11, count 0 2006.229.14:40:43.49#ibcon#wrote, iclass 11, count 0 2006.229.14:40:43.49#ibcon#about to read 3, iclass 11, count 0 2006.229.14:40:43.52#ibcon#read 3, iclass 11, count 0 2006.229.14:40:43.52#ibcon#about to read 4, iclass 11, count 0 2006.229.14:40:43.52#ibcon#read 4, iclass 11, count 0 2006.229.14:40:43.52#ibcon#about to read 5, iclass 11, count 0 2006.229.14:40:43.52#ibcon#read 5, iclass 11, count 0 2006.229.14:40:43.52#ibcon#about to read 6, iclass 11, count 0 2006.229.14:40:43.52#ibcon#read 6, iclass 11, count 0 2006.229.14:40:43.52#ibcon#end of sib2, iclass 11, count 0 2006.229.14:40:43.52#ibcon#*after write, iclass 11, count 0 2006.229.14:40:43.52#ibcon#*before return 0, iclass 11, count 0 2006.229.14:40:43.52#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:43.52#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.14:40:43.52#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:40:43.52#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:40:43.52$vck44/vblo=3,649.99 2006.229.14:40:43.52#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.14:40:43.52#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.14:40:43.52#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:43.52#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:43.52#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:43.52#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:43.52#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:40:43.52#ibcon#first serial, iclass 13, count 0 2006.229.14:40:43.52#ibcon#enter sib2, iclass 13, count 0 2006.229.14:40:43.52#ibcon#flushed, iclass 13, count 0 2006.229.14:40:43.52#ibcon#about to write, iclass 13, count 0 2006.229.14:40:43.52#ibcon#wrote, iclass 13, count 0 2006.229.14:40:43.52#ibcon#about to read 3, iclass 13, count 0 2006.229.14:40:43.54#ibcon#read 3, iclass 13, count 0 2006.229.14:40:43.54#ibcon#about to read 4, iclass 13, count 0 2006.229.14:40:43.54#ibcon#read 4, iclass 13, count 0 2006.229.14:40:43.54#ibcon#about to read 5, iclass 13, count 0 2006.229.14:40:43.54#ibcon#read 5, iclass 13, count 0 2006.229.14:40:43.54#ibcon#about to read 6, iclass 13, count 0 2006.229.14:40:43.54#ibcon#read 6, iclass 13, count 0 2006.229.14:40:43.54#ibcon#end of sib2, iclass 13, count 0 2006.229.14:40:43.54#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:40:43.54#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:40:43.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:40:43.54#ibcon#*before write, iclass 13, count 0 2006.229.14:40:43.54#ibcon#enter sib2, iclass 13, count 0 2006.229.14:40:43.54#ibcon#flushed, iclass 13, count 0 2006.229.14:40:43.54#ibcon#about to write, iclass 13, count 0 2006.229.14:40:43.54#ibcon#wrote, iclass 13, count 0 2006.229.14:40:43.54#ibcon#about to read 3, iclass 13, count 0 2006.229.14:40:43.58#ibcon#read 3, iclass 13, count 0 2006.229.14:40:43.58#ibcon#about to read 4, iclass 13, count 0 2006.229.14:40:43.58#ibcon#read 4, iclass 13, count 0 2006.229.14:40:43.58#ibcon#about to read 5, iclass 13, count 0 2006.229.14:40:43.58#ibcon#read 5, iclass 13, count 0 2006.229.14:40:43.58#ibcon#about to read 6, iclass 13, count 0 2006.229.14:40:43.58#ibcon#read 6, iclass 13, count 0 2006.229.14:40:43.58#ibcon#end of sib2, iclass 13, count 0 2006.229.14:40:43.58#ibcon#*after write, iclass 13, count 0 2006.229.14:40:43.58#ibcon#*before return 0, iclass 13, count 0 2006.229.14:40:43.58#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:43.58#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.14:40:43.58#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:40:43.58#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:40:43.58$vck44/vb=3,4 2006.229.14:40:43.58#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.14:40:43.58#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.14:40:43.58#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:43.58#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:43.64#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:43.64#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:43.64#ibcon#enter wrdev, iclass 15, count 2 2006.229.14:40:43.64#ibcon#first serial, iclass 15, count 2 2006.229.14:40:43.64#ibcon#enter sib2, iclass 15, count 2 2006.229.14:40:43.64#ibcon#flushed, iclass 15, count 2 2006.229.14:40:43.64#ibcon#about to write, iclass 15, count 2 2006.229.14:40:43.64#ibcon#wrote, iclass 15, count 2 2006.229.14:40:43.64#ibcon#about to read 3, iclass 15, count 2 2006.229.14:40:43.66#ibcon#read 3, iclass 15, count 2 2006.229.14:40:43.66#ibcon#about to read 4, iclass 15, count 2 2006.229.14:40:43.66#ibcon#read 4, iclass 15, count 2 2006.229.14:40:43.66#ibcon#about to read 5, iclass 15, count 2 2006.229.14:40:43.66#ibcon#read 5, iclass 15, count 2 2006.229.14:40:43.66#ibcon#about to read 6, iclass 15, count 2 2006.229.14:40:43.66#ibcon#read 6, iclass 15, count 2 2006.229.14:40:43.66#ibcon#end of sib2, iclass 15, count 2 2006.229.14:40:43.66#ibcon#*mode == 0, iclass 15, count 2 2006.229.14:40:43.66#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.14:40:43.66#ibcon#[27=AT03-04\r\n] 2006.229.14:40:43.66#ibcon#*before write, iclass 15, count 2 2006.229.14:40:43.66#ibcon#enter sib2, iclass 15, count 2 2006.229.14:40:43.66#ibcon#flushed, iclass 15, count 2 2006.229.14:40:43.66#ibcon#about to write, iclass 15, count 2 2006.229.14:40:43.66#ibcon#wrote, iclass 15, count 2 2006.229.14:40:43.66#ibcon#about to read 3, iclass 15, count 2 2006.229.14:40:43.69#ibcon#read 3, iclass 15, count 2 2006.229.14:40:43.69#ibcon#about to read 4, iclass 15, count 2 2006.229.14:40:43.69#ibcon#read 4, iclass 15, count 2 2006.229.14:40:43.69#ibcon#about to read 5, iclass 15, count 2 2006.229.14:40:43.69#ibcon#read 5, iclass 15, count 2 2006.229.14:40:43.69#ibcon#about to read 6, iclass 15, count 2 2006.229.14:40:43.69#ibcon#read 6, iclass 15, count 2 2006.229.14:40:43.69#ibcon#end of sib2, iclass 15, count 2 2006.229.14:40:43.69#ibcon#*after write, iclass 15, count 2 2006.229.14:40:43.69#ibcon#*before return 0, iclass 15, count 2 2006.229.14:40:43.69#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:43.69#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.14:40:43.69#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.14:40:43.69#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:43.69#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:43.81#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:43.81#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:43.81#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:40:43.81#ibcon#first serial, iclass 15, count 0 2006.229.14:40:43.81#ibcon#enter sib2, iclass 15, count 0 2006.229.14:40:43.81#ibcon#flushed, iclass 15, count 0 2006.229.14:40:43.81#ibcon#about to write, iclass 15, count 0 2006.229.14:40:43.81#ibcon#wrote, iclass 15, count 0 2006.229.14:40:43.81#ibcon#about to read 3, iclass 15, count 0 2006.229.14:40:43.83#ibcon#read 3, iclass 15, count 0 2006.229.14:40:43.83#ibcon#about to read 4, iclass 15, count 0 2006.229.14:40:43.83#ibcon#read 4, iclass 15, count 0 2006.229.14:40:43.83#ibcon#about to read 5, iclass 15, count 0 2006.229.14:40:43.83#ibcon#read 5, iclass 15, count 0 2006.229.14:40:43.83#ibcon#about to read 6, iclass 15, count 0 2006.229.14:40:43.83#ibcon#read 6, iclass 15, count 0 2006.229.14:40:43.83#ibcon#end of sib2, iclass 15, count 0 2006.229.14:40:43.83#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:40:43.83#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:40:43.83#ibcon#[27=USB\r\n] 2006.229.14:40:43.83#ibcon#*before write, iclass 15, count 0 2006.229.14:40:43.83#ibcon#enter sib2, iclass 15, count 0 2006.229.14:40:43.83#ibcon#flushed, iclass 15, count 0 2006.229.14:40:43.83#ibcon#about to write, iclass 15, count 0 2006.229.14:40:43.83#ibcon#wrote, iclass 15, count 0 2006.229.14:40:43.83#ibcon#about to read 3, iclass 15, count 0 2006.229.14:40:43.86#ibcon#read 3, iclass 15, count 0 2006.229.14:40:43.86#ibcon#about to read 4, iclass 15, count 0 2006.229.14:40:43.86#ibcon#read 4, iclass 15, count 0 2006.229.14:40:43.86#ibcon#about to read 5, iclass 15, count 0 2006.229.14:40:43.86#ibcon#read 5, iclass 15, count 0 2006.229.14:40:43.86#ibcon#about to read 6, iclass 15, count 0 2006.229.14:40:43.86#ibcon#read 6, iclass 15, count 0 2006.229.14:40:43.86#ibcon#end of sib2, iclass 15, count 0 2006.229.14:40:43.86#ibcon#*after write, iclass 15, count 0 2006.229.14:40:43.86#ibcon#*before return 0, iclass 15, count 0 2006.229.14:40:43.86#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:43.86#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.14:40:43.86#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:40:43.86#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:40:43.86$vck44/vblo=4,679.99 2006.229.14:40:43.86#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.14:40:43.86#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.14:40:43.86#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:43.86#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:43.86#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:43.86#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:43.86#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:40:43.86#ibcon#first serial, iclass 17, count 0 2006.229.14:40:43.86#ibcon#enter sib2, iclass 17, count 0 2006.229.14:40:43.86#ibcon#flushed, iclass 17, count 0 2006.229.14:40:43.86#ibcon#about to write, iclass 17, count 0 2006.229.14:40:43.86#ibcon#wrote, iclass 17, count 0 2006.229.14:40:43.86#ibcon#about to read 3, iclass 17, count 0 2006.229.14:40:43.88#ibcon#read 3, iclass 17, count 0 2006.229.14:40:43.88#ibcon#about to read 4, iclass 17, count 0 2006.229.14:40:43.88#ibcon#read 4, iclass 17, count 0 2006.229.14:40:43.88#ibcon#about to read 5, iclass 17, count 0 2006.229.14:40:43.88#ibcon#read 5, iclass 17, count 0 2006.229.14:40:43.88#ibcon#about to read 6, iclass 17, count 0 2006.229.14:40:43.88#ibcon#read 6, iclass 17, count 0 2006.229.14:40:43.88#ibcon#end of sib2, iclass 17, count 0 2006.229.14:40:43.88#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:40:43.88#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:40:43.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:40:43.88#ibcon#*before write, iclass 17, count 0 2006.229.14:40:43.88#ibcon#enter sib2, iclass 17, count 0 2006.229.14:40:43.88#ibcon#flushed, iclass 17, count 0 2006.229.14:40:43.88#ibcon#about to write, iclass 17, count 0 2006.229.14:40:43.88#ibcon#wrote, iclass 17, count 0 2006.229.14:40:43.88#ibcon#about to read 3, iclass 17, count 0 2006.229.14:40:43.92#ibcon#read 3, iclass 17, count 0 2006.229.14:40:43.92#ibcon#about to read 4, iclass 17, count 0 2006.229.14:40:43.92#ibcon#read 4, iclass 17, count 0 2006.229.14:40:43.92#ibcon#about to read 5, iclass 17, count 0 2006.229.14:40:43.92#ibcon#read 5, iclass 17, count 0 2006.229.14:40:43.92#ibcon#about to read 6, iclass 17, count 0 2006.229.14:40:43.92#ibcon#read 6, iclass 17, count 0 2006.229.14:40:43.92#ibcon#end of sib2, iclass 17, count 0 2006.229.14:40:43.92#ibcon#*after write, iclass 17, count 0 2006.229.14:40:43.92#ibcon#*before return 0, iclass 17, count 0 2006.229.14:40:43.92#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:43.92#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.14:40:43.92#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:40:43.92#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:40:43.92$vck44/vb=4,4 2006.229.14:40:43.92#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.14:40:43.92#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.14:40:43.92#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:43.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:43.98#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:43.98#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:43.98#ibcon#enter wrdev, iclass 19, count 2 2006.229.14:40:43.98#ibcon#first serial, iclass 19, count 2 2006.229.14:40:43.98#ibcon#enter sib2, iclass 19, count 2 2006.229.14:40:43.98#ibcon#flushed, iclass 19, count 2 2006.229.14:40:43.98#ibcon#about to write, iclass 19, count 2 2006.229.14:40:43.98#ibcon#wrote, iclass 19, count 2 2006.229.14:40:43.98#ibcon#about to read 3, iclass 19, count 2 2006.229.14:40:44.00#ibcon#read 3, iclass 19, count 2 2006.229.14:40:44.00#ibcon#about to read 4, iclass 19, count 2 2006.229.14:40:44.00#ibcon#read 4, iclass 19, count 2 2006.229.14:40:44.00#ibcon#about to read 5, iclass 19, count 2 2006.229.14:40:44.00#ibcon#read 5, iclass 19, count 2 2006.229.14:40:44.00#ibcon#about to read 6, iclass 19, count 2 2006.229.14:40:44.00#ibcon#read 6, iclass 19, count 2 2006.229.14:40:44.00#ibcon#end of sib2, iclass 19, count 2 2006.229.14:40:44.00#ibcon#*mode == 0, iclass 19, count 2 2006.229.14:40:44.00#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.14:40:44.00#ibcon#[27=AT04-04\r\n] 2006.229.14:40:44.00#ibcon#*before write, iclass 19, count 2 2006.229.14:40:44.00#ibcon#enter sib2, iclass 19, count 2 2006.229.14:40:44.00#ibcon#flushed, iclass 19, count 2 2006.229.14:40:44.00#ibcon#about to write, iclass 19, count 2 2006.229.14:40:44.00#ibcon#wrote, iclass 19, count 2 2006.229.14:40:44.00#ibcon#about to read 3, iclass 19, count 2 2006.229.14:40:44.03#ibcon#read 3, iclass 19, count 2 2006.229.14:40:44.03#ibcon#about to read 4, iclass 19, count 2 2006.229.14:40:44.03#ibcon#read 4, iclass 19, count 2 2006.229.14:40:44.03#ibcon#about to read 5, iclass 19, count 2 2006.229.14:40:44.03#ibcon#read 5, iclass 19, count 2 2006.229.14:40:44.03#ibcon#about to read 6, iclass 19, count 2 2006.229.14:40:44.03#ibcon#read 6, iclass 19, count 2 2006.229.14:40:44.03#ibcon#end of sib2, iclass 19, count 2 2006.229.14:40:44.03#ibcon#*after write, iclass 19, count 2 2006.229.14:40:44.03#ibcon#*before return 0, iclass 19, count 2 2006.229.14:40:44.03#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:44.03#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.14:40:44.03#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.14:40:44.03#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:44.03#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:44.15#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:44.15#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:44.15#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:40:44.15#ibcon#first serial, iclass 19, count 0 2006.229.14:40:44.15#ibcon#enter sib2, iclass 19, count 0 2006.229.14:40:44.15#ibcon#flushed, iclass 19, count 0 2006.229.14:40:44.15#ibcon#about to write, iclass 19, count 0 2006.229.14:40:44.15#ibcon#wrote, iclass 19, count 0 2006.229.14:40:44.15#ibcon#about to read 3, iclass 19, count 0 2006.229.14:40:44.17#ibcon#read 3, iclass 19, count 0 2006.229.14:40:44.17#ibcon#about to read 4, iclass 19, count 0 2006.229.14:40:44.17#ibcon#read 4, iclass 19, count 0 2006.229.14:40:44.17#ibcon#about to read 5, iclass 19, count 0 2006.229.14:40:44.17#ibcon#read 5, iclass 19, count 0 2006.229.14:40:44.17#ibcon#about to read 6, iclass 19, count 0 2006.229.14:40:44.17#ibcon#read 6, iclass 19, count 0 2006.229.14:40:44.17#ibcon#end of sib2, iclass 19, count 0 2006.229.14:40:44.17#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:40:44.17#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:40:44.17#ibcon#[27=USB\r\n] 2006.229.14:40:44.17#ibcon#*before write, iclass 19, count 0 2006.229.14:40:44.17#ibcon#enter sib2, iclass 19, count 0 2006.229.14:40:44.17#ibcon#flushed, iclass 19, count 0 2006.229.14:40:44.17#ibcon#about to write, iclass 19, count 0 2006.229.14:40:44.17#ibcon#wrote, iclass 19, count 0 2006.229.14:40:44.17#ibcon#about to read 3, iclass 19, count 0 2006.229.14:40:44.20#ibcon#read 3, iclass 19, count 0 2006.229.14:40:44.20#ibcon#about to read 4, iclass 19, count 0 2006.229.14:40:44.20#ibcon#read 4, iclass 19, count 0 2006.229.14:40:44.20#ibcon#about to read 5, iclass 19, count 0 2006.229.14:40:44.20#ibcon#read 5, iclass 19, count 0 2006.229.14:40:44.20#ibcon#about to read 6, iclass 19, count 0 2006.229.14:40:44.20#ibcon#read 6, iclass 19, count 0 2006.229.14:40:44.20#ibcon#end of sib2, iclass 19, count 0 2006.229.14:40:44.20#ibcon#*after write, iclass 19, count 0 2006.229.14:40:44.20#ibcon#*before return 0, iclass 19, count 0 2006.229.14:40:44.20#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:44.20#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.14:40:44.20#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:40:44.20#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:40:44.20$vck44/vblo=5,709.99 2006.229.14:40:44.20#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.14:40:44.20#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.14:40:44.20#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:44.20#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:44.20#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:44.20#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:44.20#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:40:44.20#ibcon#first serial, iclass 21, count 0 2006.229.14:40:44.20#ibcon#enter sib2, iclass 21, count 0 2006.229.14:40:44.20#ibcon#flushed, iclass 21, count 0 2006.229.14:40:44.20#ibcon#about to write, iclass 21, count 0 2006.229.14:40:44.20#ibcon#wrote, iclass 21, count 0 2006.229.14:40:44.20#ibcon#about to read 3, iclass 21, count 0 2006.229.14:40:44.22#ibcon#read 3, iclass 21, count 0 2006.229.14:40:44.22#ibcon#about to read 4, iclass 21, count 0 2006.229.14:40:44.22#ibcon#read 4, iclass 21, count 0 2006.229.14:40:44.22#ibcon#about to read 5, iclass 21, count 0 2006.229.14:40:44.22#ibcon#read 5, iclass 21, count 0 2006.229.14:40:44.22#ibcon#about to read 6, iclass 21, count 0 2006.229.14:40:44.22#ibcon#read 6, iclass 21, count 0 2006.229.14:40:44.22#ibcon#end of sib2, iclass 21, count 0 2006.229.14:40:44.22#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:40:44.22#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:40:44.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:40:44.22#ibcon#*before write, iclass 21, count 0 2006.229.14:40:44.22#ibcon#enter sib2, iclass 21, count 0 2006.229.14:40:44.22#ibcon#flushed, iclass 21, count 0 2006.229.14:40:44.22#ibcon#about to write, iclass 21, count 0 2006.229.14:40:44.22#ibcon#wrote, iclass 21, count 0 2006.229.14:40:44.22#ibcon#about to read 3, iclass 21, count 0 2006.229.14:40:44.26#ibcon#read 3, iclass 21, count 0 2006.229.14:40:44.26#ibcon#about to read 4, iclass 21, count 0 2006.229.14:40:44.26#ibcon#read 4, iclass 21, count 0 2006.229.14:40:44.26#ibcon#about to read 5, iclass 21, count 0 2006.229.14:40:44.26#ibcon#read 5, iclass 21, count 0 2006.229.14:40:44.26#ibcon#about to read 6, iclass 21, count 0 2006.229.14:40:44.26#ibcon#read 6, iclass 21, count 0 2006.229.14:40:44.26#ibcon#end of sib2, iclass 21, count 0 2006.229.14:40:44.26#ibcon#*after write, iclass 21, count 0 2006.229.14:40:44.26#ibcon#*before return 0, iclass 21, count 0 2006.229.14:40:44.26#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:44.26#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.14:40:44.26#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:40:44.26#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:40:44.26$vck44/vb=5,4 2006.229.14:40:44.26#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.14:40:44.26#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.14:40:44.26#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:44.26#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:44.32#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:44.32#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:44.32#ibcon#enter wrdev, iclass 23, count 2 2006.229.14:40:44.32#ibcon#first serial, iclass 23, count 2 2006.229.14:40:44.32#ibcon#enter sib2, iclass 23, count 2 2006.229.14:40:44.32#ibcon#flushed, iclass 23, count 2 2006.229.14:40:44.32#ibcon#about to write, iclass 23, count 2 2006.229.14:40:44.32#ibcon#wrote, iclass 23, count 2 2006.229.14:40:44.32#ibcon#about to read 3, iclass 23, count 2 2006.229.14:40:44.34#ibcon#read 3, iclass 23, count 2 2006.229.14:40:44.34#ibcon#about to read 4, iclass 23, count 2 2006.229.14:40:44.34#ibcon#read 4, iclass 23, count 2 2006.229.14:40:44.34#ibcon#about to read 5, iclass 23, count 2 2006.229.14:40:44.34#ibcon#read 5, iclass 23, count 2 2006.229.14:40:44.34#ibcon#about to read 6, iclass 23, count 2 2006.229.14:40:44.34#ibcon#read 6, iclass 23, count 2 2006.229.14:40:44.34#ibcon#end of sib2, iclass 23, count 2 2006.229.14:40:44.34#ibcon#*mode == 0, iclass 23, count 2 2006.229.14:40:44.34#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.14:40:44.34#ibcon#[27=AT05-04\r\n] 2006.229.14:40:44.34#ibcon#*before write, iclass 23, count 2 2006.229.14:40:44.34#ibcon#enter sib2, iclass 23, count 2 2006.229.14:40:44.34#ibcon#flushed, iclass 23, count 2 2006.229.14:40:44.34#ibcon#about to write, iclass 23, count 2 2006.229.14:40:44.34#ibcon#wrote, iclass 23, count 2 2006.229.14:40:44.34#ibcon#about to read 3, iclass 23, count 2 2006.229.14:40:44.37#ibcon#read 3, iclass 23, count 2 2006.229.14:40:44.37#ibcon#about to read 4, iclass 23, count 2 2006.229.14:40:44.37#ibcon#read 4, iclass 23, count 2 2006.229.14:40:44.37#ibcon#about to read 5, iclass 23, count 2 2006.229.14:40:44.37#ibcon#read 5, iclass 23, count 2 2006.229.14:40:44.37#ibcon#about to read 6, iclass 23, count 2 2006.229.14:40:44.37#ibcon#read 6, iclass 23, count 2 2006.229.14:40:44.37#ibcon#end of sib2, iclass 23, count 2 2006.229.14:40:44.37#ibcon#*after write, iclass 23, count 2 2006.229.14:40:44.37#ibcon#*before return 0, iclass 23, count 2 2006.229.14:40:44.37#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:44.37#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.14:40:44.37#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.14:40:44.37#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:44.37#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:44.49#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:44.49#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:44.49#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:40:44.49#ibcon#first serial, iclass 23, count 0 2006.229.14:40:44.49#ibcon#enter sib2, iclass 23, count 0 2006.229.14:40:44.49#ibcon#flushed, iclass 23, count 0 2006.229.14:40:44.49#ibcon#about to write, iclass 23, count 0 2006.229.14:40:44.49#ibcon#wrote, iclass 23, count 0 2006.229.14:40:44.49#ibcon#about to read 3, iclass 23, count 0 2006.229.14:40:44.51#ibcon#read 3, iclass 23, count 0 2006.229.14:40:44.51#ibcon#about to read 4, iclass 23, count 0 2006.229.14:40:44.51#ibcon#read 4, iclass 23, count 0 2006.229.14:40:44.51#ibcon#about to read 5, iclass 23, count 0 2006.229.14:40:44.51#ibcon#read 5, iclass 23, count 0 2006.229.14:40:44.51#ibcon#about to read 6, iclass 23, count 0 2006.229.14:40:44.51#ibcon#read 6, iclass 23, count 0 2006.229.14:40:44.51#ibcon#end of sib2, iclass 23, count 0 2006.229.14:40:44.51#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:40:44.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:40:44.51#ibcon#[27=USB\r\n] 2006.229.14:40:44.51#ibcon#*before write, iclass 23, count 0 2006.229.14:40:44.51#ibcon#enter sib2, iclass 23, count 0 2006.229.14:40:44.51#ibcon#flushed, iclass 23, count 0 2006.229.14:40:44.51#ibcon#about to write, iclass 23, count 0 2006.229.14:40:44.51#ibcon#wrote, iclass 23, count 0 2006.229.14:40:44.51#ibcon#about to read 3, iclass 23, count 0 2006.229.14:40:44.54#ibcon#read 3, iclass 23, count 0 2006.229.14:40:44.54#ibcon#about to read 4, iclass 23, count 0 2006.229.14:40:44.54#ibcon#read 4, iclass 23, count 0 2006.229.14:40:44.54#ibcon#about to read 5, iclass 23, count 0 2006.229.14:40:44.54#ibcon#read 5, iclass 23, count 0 2006.229.14:40:44.54#ibcon#about to read 6, iclass 23, count 0 2006.229.14:40:44.54#ibcon#read 6, iclass 23, count 0 2006.229.14:40:44.54#ibcon#end of sib2, iclass 23, count 0 2006.229.14:40:44.54#ibcon#*after write, iclass 23, count 0 2006.229.14:40:44.54#ibcon#*before return 0, iclass 23, count 0 2006.229.14:40:44.54#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:44.54#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.14:40:44.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:40:44.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:40:44.54$vck44/vblo=6,719.99 2006.229.14:40:44.54#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.14:40:44.54#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.14:40:44.54#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:44.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:44.54#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:44.54#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:44.54#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:40:44.54#ibcon#first serial, iclass 25, count 0 2006.229.14:40:44.54#ibcon#enter sib2, iclass 25, count 0 2006.229.14:40:44.54#ibcon#flushed, iclass 25, count 0 2006.229.14:40:44.54#ibcon#about to write, iclass 25, count 0 2006.229.14:40:44.54#ibcon#wrote, iclass 25, count 0 2006.229.14:40:44.54#ibcon#about to read 3, iclass 25, count 0 2006.229.14:40:44.56#ibcon#read 3, iclass 25, count 0 2006.229.14:40:44.56#ibcon#about to read 4, iclass 25, count 0 2006.229.14:40:44.56#ibcon#read 4, iclass 25, count 0 2006.229.14:40:44.56#ibcon#about to read 5, iclass 25, count 0 2006.229.14:40:44.56#ibcon#read 5, iclass 25, count 0 2006.229.14:40:44.56#ibcon#about to read 6, iclass 25, count 0 2006.229.14:40:44.56#ibcon#read 6, iclass 25, count 0 2006.229.14:40:44.56#ibcon#end of sib2, iclass 25, count 0 2006.229.14:40:44.56#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:40:44.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:40:44.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:40:44.56#ibcon#*before write, iclass 25, count 0 2006.229.14:40:44.56#ibcon#enter sib2, iclass 25, count 0 2006.229.14:40:44.56#ibcon#flushed, iclass 25, count 0 2006.229.14:40:44.56#ibcon#about to write, iclass 25, count 0 2006.229.14:40:44.56#ibcon#wrote, iclass 25, count 0 2006.229.14:40:44.56#ibcon#about to read 3, iclass 25, count 0 2006.229.14:40:44.60#ibcon#read 3, iclass 25, count 0 2006.229.14:40:44.60#ibcon#about to read 4, iclass 25, count 0 2006.229.14:40:44.60#ibcon#read 4, iclass 25, count 0 2006.229.14:40:44.60#ibcon#about to read 5, iclass 25, count 0 2006.229.14:40:44.60#ibcon#read 5, iclass 25, count 0 2006.229.14:40:44.60#ibcon#about to read 6, iclass 25, count 0 2006.229.14:40:44.60#ibcon#read 6, iclass 25, count 0 2006.229.14:40:44.60#ibcon#end of sib2, iclass 25, count 0 2006.229.14:40:44.60#ibcon#*after write, iclass 25, count 0 2006.229.14:40:44.60#ibcon#*before return 0, iclass 25, count 0 2006.229.14:40:44.60#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:44.60#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.14:40:44.60#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:40:44.60#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:40:44.60$vck44/vb=6,4 2006.229.14:40:44.60#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.14:40:44.60#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.14:40:44.60#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:44.60#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:44.66#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:44.66#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:44.66#ibcon#enter wrdev, iclass 27, count 2 2006.229.14:40:44.66#ibcon#first serial, iclass 27, count 2 2006.229.14:40:44.66#ibcon#enter sib2, iclass 27, count 2 2006.229.14:40:44.66#ibcon#flushed, iclass 27, count 2 2006.229.14:40:44.66#ibcon#about to write, iclass 27, count 2 2006.229.14:40:44.66#ibcon#wrote, iclass 27, count 2 2006.229.14:40:44.66#ibcon#about to read 3, iclass 27, count 2 2006.229.14:40:44.68#ibcon#read 3, iclass 27, count 2 2006.229.14:40:44.68#ibcon#about to read 4, iclass 27, count 2 2006.229.14:40:44.68#ibcon#read 4, iclass 27, count 2 2006.229.14:40:44.68#ibcon#about to read 5, iclass 27, count 2 2006.229.14:40:44.68#ibcon#read 5, iclass 27, count 2 2006.229.14:40:44.68#ibcon#about to read 6, iclass 27, count 2 2006.229.14:40:44.68#ibcon#read 6, iclass 27, count 2 2006.229.14:40:44.68#ibcon#end of sib2, iclass 27, count 2 2006.229.14:40:44.68#ibcon#*mode == 0, iclass 27, count 2 2006.229.14:40:44.68#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.14:40:44.68#ibcon#[27=AT06-04\r\n] 2006.229.14:40:44.68#ibcon#*before write, iclass 27, count 2 2006.229.14:40:44.68#ibcon#enter sib2, iclass 27, count 2 2006.229.14:40:44.68#ibcon#flushed, iclass 27, count 2 2006.229.14:40:44.68#ibcon#about to write, iclass 27, count 2 2006.229.14:40:44.68#ibcon#wrote, iclass 27, count 2 2006.229.14:40:44.68#ibcon#about to read 3, iclass 27, count 2 2006.229.14:40:44.71#ibcon#read 3, iclass 27, count 2 2006.229.14:40:44.71#ibcon#about to read 4, iclass 27, count 2 2006.229.14:40:44.71#ibcon#read 4, iclass 27, count 2 2006.229.14:40:44.71#ibcon#about to read 5, iclass 27, count 2 2006.229.14:40:44.71#ibcon#read 5, iclass 27, count 2 2006.229.14:40:44.71#ibcon#about to read 6, iclass 27, count 2 2006.229.14:40:44.71#ibcon#read 6, iclass 27, count 2 2006.229.14:40:44.71#ibcon#end of sib2, iclass 27, count 2 2006.229.14:40:44.71#ibcon#*after write, iclass 27, count 2 2006.229.14:40:44.71#ibcon#*before return 0, iclass 27, count 2 2006.229.14:40:44.71#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:44.71#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.14:40:44.71#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.14:40:44.71#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:44.71#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:44.83#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:44.83#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:44.83#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:40:44.83#ibcon#first serial, iclass 27, count 0 2006.229.14:40:44.83#ibcon#enter sib2, iclass 27, count 0 2006.229.14:40:44.83#ibcon#flushed, iclass 27, count 0 2006.229.14:40:44.83#ibcon#about to write, iclass 27, count 0 2006.229.14:40:44.83#ibcon#wrote, iclass 27, count 0 2006.229.14:40:44.83#ibcon#about to read 3, iclass 27, count 0 2006.229.14:40:44.85#ibcon#read 3, iclass 27, count 0 2006.229.14:40:44.85#ibcon#about to read 4, iclass 27, count 0 2006.229.14:40:44.85#ibcon#read 4, iclass 27, count 0 2006.229.14:40:44.85#ibcon#about to read 5, iclass 27, count 0 2006.229.14:40:44.85#ibcon#read 5, iclass 27, count 0 2006.229.14:40:44.85#ibcon#about to read 6, iclass 27, count 0 2006.229.14:40:44.85#ibcon#read 6, iclass 27, count 0 2006.229.14:40:44.85#ibcon#end of sib2, iclass 27, count 0 2006.229.14:40:44.85#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:40:44.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:40:44.85#ibcon#[27=USB\r\n] 2006.229.14:40:44.85#ibcon#*before write, iclass 27, count 0 2006.229.14:40:44.85#ibcon#enter sib2, iclass 27, count 0 2006.229.14:40:44.85#ibcon#flushed, iclass 27, count 0 2006.229.14:40:44.85#ibcon#about to write, iclass 27, count 0 2006.229.14:40:44.85#ibcon#wrote, iclass 27, count 0 2006.229.14:40:44.85#ibcon#about to read 3, iclass 27, count 0 2006.229.14:40:44.88#ibcon#read 3, iclass 27, count 0 2006.229.14:40:44.88#ibcon#about to read 4, iclass 27, count 0 2006.229.14:40:44.88#ibcon#read 4, iclass 27, count 0 2006.229.14:40:44.88#ibcon#about to read 5, iclass 27, count 0 2006.229.14:40:44.88#ibcon#read 5, iclass 27, count 0 2006.229.14:40:44.88#ibcon#about to read 6, iclass 27, count 0 2006.229.14:40:44.88#ibcon#read 6, iclass 27, count 0 2006.229.14:40:44.88#ibcon#end of sib2, iclass 27, count 0 2006.229.14:40:44.88#ibcon#*after write, iclass 27, count 0 2006.229.14:40:44.88#ibcon#*before return 0, iclass 27, count 0 2006.229.14:40:44.88#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:44.88#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.14:40:44.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:40:44.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:40:44.88$vck44/vblo=7,734.99 2006.229.14:40:44.88#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.14:40:44.88#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.14:40:44.88#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:44.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:44.88#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:44.88#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:44.88#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:40:44.88#ibcon#first serial, iclass 29, count 0 2006.229.14:40:44.88#ibcon#enter sib2, iclass 29, count 0 2006.229.14:40:44.88#ibcon#flushed, iclass 29, count 0 2006.229.14:40:44.88#ibcon#about to write, iclass 29, count 0 2006.229.14:40:44.88#ibcon#wrote, iclass 29, count 0 2006.229.14:40:44.88#ibcon#about to read 3, iclass 29, count 0 2006.229.14:40:44.90#ibcon#read 3, iclass 29, count 0 2006.229.14:40:44.90#ibcon#about to read 4, iclass 29, count 0 2006.229.14:40:44.90#ibcon#read 4, iclass 29, count 0 2006.229.14:40:44.90#ibcon#about to read 5, iclass 29, count 0 2006.229.14:40:44.90#ibcon#read 5, iclass 29, count 0 2006.229.14:40:44.90#ibcon#about to read 6, iclass 29, count 0 2006.229.14:40:44.90#ibcon#read 6, iclass 29, count 0 2006.229.14:40:44.90#ibcon#end of sib2, iclass 29, count 0 2006.229.14:40:44.90#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:40:44.90#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:40:44.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:40:44.90#ibcon#*before write, iclass 29, count 0 2006.229.14:40:44.90#ibcon#enter sib2, iclass 29, count 0 2006.229.14:40:44.90#ibcon#flushed, iclass 29, count 0 2006.229.14:40:44.90#ibcon#about to write, iclass 29, count 0 2006.229.14:40:44.90#ibcon#wrote, iclass 29, count 0 2006.229.14:40:44.90#ibcon#about to read 3, iclass 29, count 0 2006.229.14:40:44.94#ibcon#read 3, iclass 29, count 0 2006.229.14:40:44.94#ibcon#about to read 4, iclass 29, count 0 2006.229.14:40:44.94#ibcon#read 4, iclass 29, count 0 2006.229.14:40:44.94#ibcon#about to read 5, iclass 29, count 0 2006.229.14:40:44.94#ibcon#read 5, iclass 29, count 0 2006.229.14:40:44.94#ibcon#about to read 6, iclass 29, count 0 2006.229.14:40:44.94#ibcon#read 6, iclass 29, count 0 2006.229.14:40:44.94#ibcon#end of sib2, iclass 29, count 0 2006.229.14:40:44.94#ibcon#*after write, iclass 29, count 0 2006.229.14:40:44.94#ibcon#*before return 0, iclass 29, count 0 2006.229.14:40:44.94#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:44.94#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.14:40:44.94#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:40:44.94#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:40:44.94$vck44/vb=7,4 2006.229.14:40:44.94#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.14:40:44.94#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.14:40:44.94#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:44.94#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:45.00#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:45.00#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:45.00#ibcon#enter wrdev, iclass 31, count 2 2006.229.14:40:45.00#ibcon#first serial, iclass 31, count 2 2006.229.14:40:45.00#ibcon#enter sib2, iclass 31, count 2 2006.229.14:40:45.00#ibcon#flushed, iclass 31, count 2 2006.229.14:40:45.00#ibcon#about to write, iclass 31, count 2 2006.229.14:40:45.00#ibcon#wrote, iclass 31, count 2 2006.229.14:40:45.00#ibcon#about to read 3, iclass 31, count 2 2006.229.14:40:45.02#ibcon#read 3, iclass 31, count 2 2006.229.14:40:45.02#ibcon#about to read 4, iclass 31, count 2 2006.229.14:40:45.02#ibcon#read 4, iclass 31, count 2 2006.229.14:40:45.02#ibcon#about to read 5, iclass 31, count 2 2006.229.14:40:45.02#ibcon#read 5, iclass 31, count 2 2006.229.14:40:45.02#ibcon#about to read 6, iclass 31, count 2 2006.229.14:40:45.02#ibcon#read 6, iclass 31, count 2 2006.229.14:40:45.02#ibcon#end of sib2, iclass 31, count 2 2006.229.14:40:45.02#ibcon#*mode == 0, iclass 31, count 2 2006.229.14:40:45.02#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.14:40:45.02#ibcon#[27=AT07-04\r\n] 2006.229.14:40:45.02#ibcon#*before write, iclass 31, count 2 2006.229.14:40:45.02#ibcon#enter sib2, iclass 31, count 2 2006.229.14:40:45.02#ibcon#flushed, iclass 31, count 2 2006.229.14:40:45.02#ibcon#about to write, iclass 31, count 2 2006.229.14:40:45.02#ibcon#wrote, iclass 31, count 2 2006.229.14:40:45.02#ibcon#about to read 3, iclass 31, count 2 2006.229.14:40:45.05#ibcon#read 3, iclass 31, count 2 2006.229.14:40:45.05#ibcon#about to read 4, iclass 31, count 2 2006.229.14:40:45.05#ibcon#read 4, iclass 31, count 2 2006.229.14:40:45.05#ibcon#about to read 5, iclass 31, count 2 2006.229.14:40:45.05#ibcon#read 5, iclass 31, count 2 2006.229.14:40:45.05#ibcon#about to read 6, iclass 31, count 2 2006.229.14:40:45.05#ibcon#read 6, iclass 31, count 2 2006.229.14:40:45.05#ibcon#end of sib2, iclass 31, count 2 2006.229.14:40:45.05#ibcon#*after write, iclass 31, count 2 2006.229.14:40:45.05#ibcon#*before return 0, iclass 31, count 2 2006.229.14:40:45.05#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:45.05#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.14:40:45.05#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.14:40:45.05#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:45.05#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:45.17#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:45.17#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:45.17#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:40:45.17#ibcon#first serial, iclass 31, count 0 2006.229.14:40:45.17#ibcon#enter sib2, iclass 31, count 0 2006.229.14:40:45.17#ibcon#flushed, iclass 31, count 0 2006.229.14:40:45.17#ibcon#about to write, iclass 31, count 0 2006.229.14:40:45.17#ibcon#wrote, iclass 31, count 0 2006.229.14:40:45.17#ibcon#about to read 3, iclass 31, count 0 2006.229.14:40:45.19#ibcon#read 3, iclass 31, count 0 2006.229.14:40:45.19#ibcon#about to read 4, iclass 31, count 0 2006.229.14:40:45.19#ibcon#read 4, iclass 31, count 0 2006.229.14:40:45.19#ibcon#about to read 5, iclass 31, count 0 2006.229.14:40:45.19#ibcon#read 5, iclass 31, count 0 2006.229.14:40:45.19#ibcon#about to read 6, iclass 31, count 0 2006.229.14:40:45.19#ibcon#read 6, iclass 31, count 0 2006.229.14:40:45.19#ibcon#end of sib2, iclass 31, count 0 2006.229.14:40:45.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:40:45.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:40:45.19#ibcon#[27=USB\r\n] 2006.229.14:40:45.19#ibcon#*before write, iclass 31, count 0 2006.229.14:40:45.19#ibcon#enter sib2, iclass 31, count 0 2006.229.14:40:45.19#ibcon#flushed, iclass 31, count 0 2006.229.14:40:45.19#ibcon#about to write, iclass 31, count 0 2006.229.14:40:45.19#ibcon#wrote, iclass 31, count 0 2006.229.14:40:45.19#ibcon#about to read 3, iclass 31, count 0 2006.229.14:40:45.22#ibcon#read 3, iclass 31, count 0 2006.229.14:40:45.22#ibcon#about to read 4, iclass 31, count 0 2006.229.14:40:45.22#ibcon#read 4, iclass 31, count 0 2006.229.14:40:45.22#ibcon#about to read 5, iclass 31, count 0 2006.229.14:40:45.22#ibcon#read 5, iclass 31, count 0 2006.229.14:40:45.22#ibcon#about to read 6, iclass 31, count 0 2006.229.14:40:45.22#ibcon#read 6, iclass 31, count 0 2006.229.14:40:45.22#ibcon#end of sib2, iclass 31, count 0 2006.229.14:40:45.22#ibcon#*after write, iclass 31, count 0 2006.229.14:40:45.22#ibcon#*before return 0, iclass 31, count 0 2006.229.14:40:45.22#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:45.22#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.14:40:45.22#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:40:45.22#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:40:45.22$vck44/vblo=8,744.99 2006.229.14:40:45.22#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.14:40:45.22#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.14:40:45.22#ibcon#ireg 17 cls_cnt 0 2006.229.14:40:45.22#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:45.22#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:45.22#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:45.22#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:40:45.22#ibcon#first serial, iclass 33, count 0 2006.229.14:40:45.22#ibcon#enter sib2, iclass 33, count 0 2006.229.14:40:45.22#ibcon#flushed, iclass 33, count 0 2006.229.14:40:45.22#ibcon#about to write, iclass 33, count 0 2006.229.14:40:45.22#ibcon#wrote, iclass 33, count 0 2006.229.14:40:45.22#ibcon#about to read 3, iclass 33, count 0 2006.229.14:40:45.24#ibcon#read 3, iclass 33, count 0 2006.229.14:40:45.24#ibcon#about to read 4, iclass 33, count 0 2006.229.14:40:45.24#ibcon#read 4, iclass 33, count 0 2006.229.14:40:45.24#ibcon#about to read 5, iclass 33, count 0 2006.229.14:40:45.24#ibcon#read 5, iclass 33, count 0 2006.229.14:40:45.24#ibcon#about to read 6, iclass 33, count 0 2006.229.14:40:45.24#ibcon#read 6, iclass 33, count 0 2006.229.14:40:45.24#ibcon#end of sib2, iclass 33, count 0 2006.229.14:40:45.24#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:40:45.24#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:40:45.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:40:45.24#ibcon#*before write, iclass 33, count 0 2006.229.14:40:45.24#ibcon#enter sib2, iclass 33, count 0 2006.229.14:40:45.24#ibcon#flushed, iclass 33, count 0 2006.229.14:40:45.24#ibcon#about to write, iclass 33, count 0 2006.229.14:40:45.24#ibcon#wrote, iclass 33, count 0 2006.229.14:40:45.24#ibcon#about to read 3, iclass 33, count 0 2006.229.14:40:45.28#ibcon#read 3, iclass 33, count 0 2006.229.14:40:45.28#ibcon#about to read 4, iclass 33, count 0 2006.229.14:40:45.28#ibcon#read 4, iclass 33, count 0 2006.229.14:40:45.28#ibcon#about to read 5, iclass 33, count 0 2006.229.14:40:45.28#ibcon#read 5, iclass 33, count 0 2006.229.14:40:45.28#ibcon#about to read 6, iclass 33, count 0 2006.229.14:40:45.28#ibcon#read 6, iclass 33, count 0 2006.229.14:40:45.28#ibcon#end of sib2, iclass 33, count 0 2006.229.14:40:45.28#ibcon#*after write, iclass 33, count 0 2006.229.14:40:45.28#ibcon#*before return 0, iclass 33, count 0 2006.229.14:40:45.28#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:45.28#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.14:40:45.28#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:40:45.28#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:40:45.28$vck44/vb=8,4 2006.229.14:40:45.28#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.14:40:45.28#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.14:40:45.28#ibcon#ireg 11 cls_cnt 2 2006.229.14:40:45.28#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:45.34#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:45.34#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:45.34#ibcon#enter wrdev, iclass 35, count 2 2006.229.14:40:45.34#ibcon#first serial, iclass 35, count 2 2006.229.14:40:45.34#ibcon#enter sib2, iclass 35, count 2 2006.229.14:40:45.34#ibcon#flushed, iclass 35, count 2 2006.229.14:40:45.34#ibcon#about to write, iclass 35, count 2 2006.229.14:40:45.34#ibcon#wrote, iclass 35, count 2 2006.229.14:40:45.34#ibcon#about to read 3, iclass 35, count 2 2006.229.14:40:45.36#ibcon#read 3, iclass 35, count 2 2006.229.14:40:45.36#ibcon#about to read 4, iclass 35, count 2 2006.229.14:40:45.36#ibcon#read 4, iclass 35, count 2 2006.229.14:40:45.36#ibcon#about to read 5, iclass 35, count 2 2006.229.14:40:45.36#ibcon#read 5, iclass 35, count 2 2006.229.14:40:45.36#ibcon#about to read 6, iclass 35, count 2 2006.229.14:40:45.36#ibcon#read 6, iclass 35, count 2 2006.229.14:40:45.36#ibcon#end of sib2, iclass 35, count 2 2006.229.14:40:45.36#ibcon#*mode == 0, iclass 35, count 2 2006.229.14:40:45.36#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.14:40:45.36#ibcon#[27=AT08-04\r\n] 2006.229.14:40:45.36#ibcon#*before write, iclass 35, count 2 2006.229.14:40:45.36#ibcon#enter sib2, iclass 35, count 2 2006.229.14:40:45.36#ibcon#flushed, iclass 35, count 2 2006.229.14:40:45.36#ibcon#about to write, iclass 35, count 2 2006.229.14:40:45.36#ibcon#wrote, iclass 35, count 2 2006.229.14:40:45.36#ibcon#about to read 3, iclass 35, count 2 2006.229.14:40:45.39#ibcon#read 3, iclass 35, count 2 2006.229.14:40:45.39#ibcon#about to read 4, iclass 35, count 2 2006.229.14:40:45.39#ibcon#read 4, iclass 35, count 2 2006.229.14:40:45.39#ibcon#about to read 5, iclass 35, count 2 2006.229.14:40:45.39#ibcon#read 5, iclass 35, count 2 2006.229.14:40:45.39#ibcon#about to read 6, iclass 35, count 2 2006.229.14:40:45.39#ibcon#read 6, iclass 35, count 2 2006.229.14:40:45.39#ibcon#end of sib2, iclass 35, count 2 2006.229.14:40:45.39#ibcon#*after write, iclass 35, count 2 2006.229.14:40:45.39#ibcon#*before return 0, iclass 35, count 2 2006.229.14:40:45.39#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:45.39#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.14:40:45.39#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.14:40:45.39#ibcon#ireg 7 cls_cnt 0 2006.229.14:40:45.39#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:45.51#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:45.51#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:45.51#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:40:45.51#ibcon#first serial, iclass 35, count 0 2006.229.14:40:45.51#ibcon#enter sib2, iclass 35, count 0 2006.229.14:40:45.51#ibcon#flushed, iclass 35, count 0 2006.229.14:40:45.51#ibcon#about to write, iclass 35, count 0 2006.229.14:40:45.51#ibcon#wrote, iclass 35, count 0 2006.229.14:40:45.51#ibcon#about to read 3, iclass 35, count 0 2006.229.14:40:45.53#ibcon#read 3, iclass 35, count 0 2006.229.14:40:45.53#ibcon#about to read 4, iclass 35, count 0 2006.229.14:40:45.53#ibcon#read 4, iclass 35, count 0 2006.229.14:40:45.53#ibcon#about to read 5, iclass 35, count 0 2006.229.14:40:45.53#ibcon#read 5, iclass 35, count 0 2006.229.14:40:45.53#ibcon#about to read 6, iclass 35, count 0 2006.229.14:40:45.53#ibcon#read 6, iclass 35, count 0 2006.229.14:40:45.53#ibcon#end of sib2, iclass 35, count 0 2006.229.14:40:45.53#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:40:45.53#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:40:45.53#ibcon#[27=USB\r\n] 2006.229.14:40:45.53#ibcon#*before write, iclass 35, count 0 2006.229.14:40:45.53#ibcon#enter sib2, iclass 35, count 0 2006.229.14:40:45.53#ibcon#flushed, iclass 35, count 0 2006.229.14:40:45.53#ibcon#about to write, iclass 35, count 0 2006.229.14:40:45.53#ibcon#wrote, iclass 35, count 0 2006.229.14:40:45.53#ibcon#about to read 3, iclass 35, count 0 2006.229.14:40:45.56#ibcon#read 3, iclass 35, count 0 2006.229.14:40:45.56#ibcon#about to read 4, iclass 35, count 0 2006.229.14:40:45.56#ibcon#read 4, iclass 35, count 0 2006.229.14:40:45.56#ibcon#about to read 5, iclass 35, count 0 2006.229.14:40:45.56#ibcon#read 5, iclass 35, count 0 2006.229.14:40:45.56#ibcon#about to read 6, iclass 35, count 0 2006.229.14:40:45.56#ibcon#read 6, iclass 35, count 0 2006.229.14:40:45.56#ibcon#end of sib2, iclass 35, count 0 2006.229.14:40:45.56#ibcon#*after write, iclass 35, count 0 2006.229.14:40:45.56#ibcon#*before return 0, iclass 35, count 0 2006.229.14:40:45.56#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:45.56#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.14:40:45.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:40:45.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:40:45.56$vck44/vabw=wide 2006.229.14:40:45.56#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:40:45.56#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:40:45.56#ibcon#ireg 8 cls_cnt 0 2006.229.14:40:45.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:45.56#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:45.56#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:45.56#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:40:45.56#ibcon#first serial, iclass 37, count 0 2006.229.14:40:45.56#ibcon#enter sib2, iclass 37, count 0 2006.229.14:40:45.56#ibcon#flushed, iclass 37, count 0 2006.229.14:40:45.56#ibcon#about to write, iclass 37, count 0 2006.229.14:40:45.56#ibcon#wrote, iclass 37, count 0 2006.229.14:40:45.56#ibcon#about to read 3, iclass 37, count 0 2006.229.14:40:45.58#ibcon#read 3, iclass 37, count 0 2006.229.14:40:45.58#ibcon#about to read 4, iclass 37, count 0 2006.229.14:40:45.58#ibcon#read 4, iclass 37, count 0 2006.229.14:40:45.58#ibcon#about to read 5, iclass 37, count 0 2006.229.14:40:45.58#ibcon#read 5, iclass 37, count 0 2006.229.14:40:45.58#ibcon#about to read 6, iclass 37, count 0 2006.229.14:40:45.58#ibcon#read 6, iclass 37, count 0 2006.229.14:40:45.58#ibcon#end of sib2, iclass 37, count 0 2006.229.14:40:45.58#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:40:45.58#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:40:45.58#ibcon#[25=BW32\r\n] 2006.229.14:40:45.58#ibcon#*before write, iclass 37, count 0 2006.229.14:40:45.58#ibcon#enter sib2, iclass 37, count 0 2006.229.14:40:45.58#ibcon#flushed, iclass 37, count 0 2006.229.14:40:45.58#ibcon#about to write, iclass 37, count 0 2006.229.14:40:45.58#ibcon#wrote, iclass 37, count 0 2006.229.14:40:45.58#ibcon#about to read 3, iclass 37, count 0 2006.229.14:40:45.61#ibcon#read 3, iclass 37, count 0 2006.229.14:40:45.61#ibcon#about to read 4, iclass 37, count 0 2006.229.14:40:45.61#ibcon#read 4, iclass 37, count 0 2006.229.14:40:45.61#ibcon#about to read 5, iclass 37, count 0 2006.229.14:40:45.61#ibcon#read 5, iclass 37, count 0 2006.229.14:40:45.61#ibcon#about to read 6, iclass 37, count 0 2006.229.14:40:45.61#ibcon#read 6, iclass 37, count 0 2006.229.14:40:45.61#ibcon#end of sib2, iclass 37, count 0 2006.229.14:40:45.61#ibcon#*after write, iclass 37, count 0 2006.229.14:40:45.61#ibcon#*before return 0, iclass 37, count 0 2006.229.14:40:45.61#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:45.61#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:40:45.61#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:40:45.61#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:40:45.61$vck44/vbbw=wide 2006.229.14:40:45.61#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.14:40:45.61#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.14:40:45.61#ibcon#ireg 8 cls_cnt 0 2006.229.14:40:45.61#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:40:45.68#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:40:45.68#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:40:45.68#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:40:45.68#ibcon#first serial, iclass 39, count 0 2006.229.14:40:45.68#ibcon#enter sib2, iclass 39, count 0 2006.229.14:40:45.68#ibcon#flushed, iclass 39, count 0 2006.229.14:40:45.68#ibcon#about to write, iclass 39, count 0 2006.229.14:40:45.68#ibcon#wrote, iclass 39, count 0 2006.229.14:40:45.68#ibcon#about to read 3, iclass 39, count 0 2006.229.14:40:45.70#ibcon#read 3, iclass 39, count 0 2006.229.14:40:45.70#ibcon#about to read 4, iclass 39, count 0 2006.229.14:40:45.70#ibcon#read 4, iclass 39, count 0 2006.229.14:40:45.70#ibcon#about to read 5, iclass 39, count 0 2006.229.14:40:45.70#ibcon#read 5, iclass 39, count 0 2006.229.14:40:45.70#ibcon#about to read 6, iclass 39, count 0 2006.229.14:40:45.70#ibcon#read 6, iclass 39, count 0 2006.229.14:40:45.70#ibcon#end of sib2, iclass 39, count 0 2006.229.14:40:45.70#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:40:45.70#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:40:45.70#ibcon#[27=BW32\r\n] 2006.229.14:40:45.70#ibcon#*before write, iclass 39, count 0 2006.229.14:40:45.70#ibcon#enter sib2, iclass 39, count 0 2006.229.14:40:45.70#ibcon#flushed, iclass 39, count 0 2006.229.14:40:45.70#ibcon#about to write, iclass 39, count 0 2006.229.14:40:45.70#ibcon#wrote, iclass 39, count 0 2006.229.14:40:45.70#ibcon#about to read 3, iclass 39, count 0 2006.229.14:40:45.73#ibcon#read 3, iclass 39, count 0 2006.229.14:40:45.73#ibcon#about to read 4, iclass 39, count 0 2006.229.14:40:45.73#ibcon#read 4, iclass 39, count 0 2006.229.14:40:45.73#ibcon#about to read 5, iclass 39, count 0 2006.229.14:40:45.73#ibcon#read 5, iclass 39, count 0 2006.229.14:40:45.73#ibcon#about to read 6, iclass 39, count 0 2006.229.14:40:45.73#ibcon#read 6, iclass 39, count 0 2006.229.14:40:45.73#ibcon#end of sib2, iclass 39, count 0 2006.229.14:40:45.73#ibcon#*after write, iclass 39, count 0 2006.229.14:40:45.73#ibcon#*before return 0, iclass 39, count 0 2006.229.14:40:45.73#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:40:45.73#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:40:45.73#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:40:45.73#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:40:45.73$setupk4/ifdk4 2006.229.14:40:45.73$ifdk4/lo= 2006.229.14:40:45.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:40:45.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:40:45.73$ifdk4/patch= 2006.229.14:40:45.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:40:45.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:40:45.73$setupk4/!*+20s 2006.229.14:40:46.88#abcon#<5=/07 1.0 2.5 27.451001002.1\r\n> 2006.229.14:40:46.90#abcon#{5=INTERFACE CLEAR} 2006.229.14:40:46.96#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:40:57.05#abcon#<5=/07 1.0 2.5 27.451001002.2\r\n> 2006.229.14:40:57.07#abcon#{5=INTERFACE CLEAR} 2006.229.14:40:57.13#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:41:00.24$setupk4/"tpicd 2006.229.14:41:00.24$setupk4/echo=off 2006.229.14:41:00.24$setupk4/xlog=off 2006.229.14:41:00.24:!2006.229.14:44:03 2006.229.14:41:07.14#trakl#Source acquired 2006.229.14:41:09.14#flagr#flagr/antenna,acquired 2006.229.14:44:03.02:preob 2006.229.14:44:04.14/onsource/TRACKING 2006.229.14:44:04.14:!2006.229.14:44:13 2006.229.14:44:13.02:"tape 2006.229.14:44:13.02:"st=record 2006.229.14:44:13.02:data_valid=on 2006.229.14:44:13.02:midob 2006.229.14:44:14.14/onsource/TRACKING 2006.229.14:44:14.14/wx/27.44,1002.2,100 2006.229.14:44:14.28/cable/+6.4130E-03 2006.229.14:44:15.37/va/01,08,usb,yes,32,34 2006.229.14:44:15.37/va/02,07,usb,yes,34,35 2006.229.14:44:15.37/va/03,06,usb,yes,42,45 2006.229.14:44:15.37/va/04,07,usb,yes,35,37 2006.229.14:44:15.37/va/05,04,usb,yes,32,32 2006.229.14:44:15.37/va/06,04,usb,yes,35,35 2006.229.14:44:15.37/va/07,05,usb,yes,31,32 2006.229.14:44:15.37/va/08,06,usb,yes,23,28 2006.229.14:44:15.60/valo/01,524.99,yes,locked 2006.229.14:44:15.60/valo/02,534.99,yes,locked 2006.229.14:44:15.60/valo/03,564.99,yes,locked 2006.229.14:44:15.60/valo/04,624.99,yes,locked 2006.229.14:44:15.60/valo/05,734.99,yes,locked 2006.229.14:44:15.60/valo/06,814.99,yes,locked 2006.229.14:44:15.60/valo/07,864.99,yes,locked 2006.229.14:44:15.60/valo/08,884.99,yes,locked 2006.229.14:44:16.69/vb/01,04,usb,yes,32,30 2006.229.14:44:16.69/vb/02,04,usb,yes,34,34 2006.229.14:44:16.69/vb/03,04,usb,yes,31,34 2006.229.14:44:16.69/vb/04,04,usb,yes,36,35 2006.229.14:44:16.69/vb/05,04,usb,yes,28,30 2006.229.14:44:16.69/vb/06,04,usb,yes,32,28 2006.229.14:44:16.69/vb/07,04,usb,yes,32,32 2006.229.14:44:16.69/vb/08,04,usb,yes,30,33 2006.229.14:44:16.93/vblo/01,629.99,yes,locked 2006.229.14:44:16.93/vblo/02,634.99,yes,locked 2006.229.14:44:16.93/vblo/03,649.99,yes,locked 2006.229.14:44:16.93/vblo/04,679.99,yes,locked 2006.229.14:44:16.93/vblo/05,709.99,yes,locked 2006.229.14:44:16.93/vblo/06,719.99,yes,locked 2006.229.14:44:16.93/vblo/07,734.99,yes,locked 2006.229.14:44:16.93/vblo/08,744.99,yes,locked 2006.229.14:44:17.08/vabw/8 2006.229.14:44:17.23/vbbw/8 2006.229.14:44:17.32/xfe/off,on,12.2 2006.229.14:44:17.70/ifatt/23,28,28,28 2006.229.14:44:18.07/fmout-gps/S +4.56E-07 2006.229.14:44:18.12:!2006.229.14:45:53 2006.229.14:45:53.01:data_valid=off 2006.229.14:45:53.02:"et 2006.229.14:45:53.02:!+3s 2006.229.14:45:56.05:"tape 2006.229.14:45:56.05:postob 2006.229.14:45:56.17/cable/+6.4128E-03 2006.229.14:45:56.17/wx/27.43,1002.1,100 2006.229.14:45:56.23/fmout-gps/S +4.55E-07 2006.229.14:45:56.23:scan_name=229-1450,jd0608,40 2006.229.14:45:56.24:source=1954-388,195800.00,-384506.4,2000.0,cw 2006.229.14:45:57.14#flagr#flagr/antenna,new-source 2006.229.14:45:57.15:checkk5 2006.229.14:45:57.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:45:57.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:45:58.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:45:58.69/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:45:59.09/chk_obsdata//k5ts1/T2291444??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.14:45:59.49/chk_obsdata//k5ts2/T2291444??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.14:45:59.88/chk_obsdata//k5ts3/T2291444??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.14:46:00.30/chk_obsdata//k5ts4/T2291444??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.14:46:01.02/k5log//k5ts1_log_newline 2006.229.14:46:01.76/k5log//k5ts2_log_newline 2006.229.14:46:02.46/k5log//k5ts3_log_newline 2006.229.14:46:03.18/k5log//k5ts4_log_newline 2006.229.14:46:03.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:46:03.20:setupk4=1 2006.229.14:46:03.20$setupk4/echo=on 2006.229.14:46:03.20$setupk4/pcalon 2006.229.14:46:03.20$pcalon/"no phase cal control is implemented here 2006.229.14:46:03.20$setupk4/"tpicd=stop 2006.229.14:46:03.20$setupk4/"rec=synch_on 2006.229.14:46:03.20$setupk4/"rec_mode=128 2006.229.14:46:03.20$setupk4/!* 2006.229.14:46:03.20$setupk4/recpk4 2006.229.14:46:03.20$recpk4/recpatch= 2006.229.14:46:03.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:46:03.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:46:03.21$setupk4/vck44 2006.229.14:46:03.21$vck44/valo=1,524.99 2006.229.14:46:03.21#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.14:46:03.21#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.14:46:03.21#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:03.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:03.21#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:03.21#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:03.21#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:46:03.21#ibcon#first serial, iclass 28, count 0 2006.229.14:46:03.21#ibcon#enter sib2, iclass 28, count 0 2006.229.14:46:03.21#ibcon#flushed, iclass 28, count 0 2006.229.14:46:03.21#ibcon#about to write, iclass 28, count 0 2006.229.14:46:03.21#ibcon#wrote, iclass 28, count 0 2006.229.14:46:03.21#ibcon#about to read 3, iclass 28, count 0 2006.229.14:46:03.22#ibcon#read 3, iclass 28, count 0 2006.229.14:46:03.22#ibcon#about to read 4, iclass 28, count 0 2006.229.14:46:03.22#ibcon#read 4, iclass 28, count 0 2006.229.14:46:03.22#ibcon#about to read 5, iclass 28, count 0 2006.229.14:46:03.22#ibcon#read 5, iclass 28, count 0 2006.229.14:46:03.22#ibcon#about to read 6, iclass 28, count 0 2006.229.14:46:03.22#ibcon#read 6, iclass 28, count 0 2006.229.14:46:03.22#ibcon#end of sib2, iclass 28, count 0 2006.229.14:46:03.22#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:46:03.22#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:46:03.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:46:03.22#ibcon#*before write, iclass 28, count 0 2006.229.14:46:03.22#ibcon#enter sib2, iclass 28, count 0 2006.229.14:46:03.22#ibcon#flushed, iclass 28, count 0 2006.229.14:46:03.22#ibcon#about to write, iclass 28, count 0 2006.229.14:46:03.22#ibcon#wrote, iclass 28, count 0 2006.229.14:46:03.22#ibcon#about to read 3, iclass 28, count 0 2006.229.14:46:03.27#ibcon#read 3, iclass 28, count 0 2006.229.14:46:03.27#ibcon#about to read 4, iclass 28, count 0 2006.229.14:46:03.27#ibcon#read 4, iclass 28, count 0 2006.229.14:46:03.27#ibcon#about to read 5, iclass 28, count 0 2006.229.14:46:03.27#ibcon#read 5, iclass 28, count 0 2006.229.14:46:03.27#ibcon#about to read 6, iclass 28, count 0 2006.229.14:46:03.27#ibcon#read 6, iclass 28, count 0 2006.229.14:46:03.27#ibcon#end of sib2, iclass 28, count 0 2006.229.14:46:03.27#ibcon#*after write, iclass 28, count 0 2006.229.14:46:03.27#ibcon#*before return 0, iclass 28, count 0 2006.229.14:46:03.27#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:03.27#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:03.27#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:46:03.27#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:46:03.27$vck44/va=1,8 2006.229.14:46:03.27#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.14:46:03.27#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.14:46:03.27#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:03.27#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:03.27#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:03.27#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:03.27#ibcon#enter wrdev, iclass 30, count 2 2006.229.14:46:03.27#ibcon#first serial, iclass 30, count 2 2006.229.14:46:03.27#ibcon#enter sib2, iclass 30, count 2 2006.229.14:46:03.27#ibcon#flushed, iclass 30, count 2 2006.229.14:46:03.27#ibcon#about to write, iclass 30, count 2 2006.229.14:46:03.27#ibcon#wrote, iclass 30, count 2 2006.229.14:46:03.27#ibcon#about to read 3, iclass 30, count 2 2006.229.14:46:03.29#ibcon#read 3, iclass 30, count 2 2006.229.14:46:03.29#ibcon#about to read 4, iclass 30, count 2 2006.229.14:46:03.29#ibcon#read 4, iclass 30, count 2 2006.229.14:46:03.29#ibcon#about to read 5, iclass 30, count 2 2006.229.14:46:03.29#ibcon#read 5, iclass 30, count 2 2006.229.14:46:03.29#ibcon#about to read 6, iclass 30, count 2 2006.229.14:46:03.29#ibcon#read 6, iclass 30, count 2 2006.229.14:46:03.29#ibcon#end of sib2, iclass 30, count 2 2006.229.14:46:03.29#ibcon#*mode == 0, iclass 30, count 2 2006.229.14:46:03.29#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.14:46:03.29#ibcon#[25=AT01-08\r\n] 2006.229.14:46:03.29#ibcon#*before write, iclass 30, count 2 2006.229.14:46:03.29#ibcon#enter sib2, iclass 30, count 2 2006.229.14:46:03.29#ibcon#flushed, iclass 30, count 2 2006.229.14:46:03.29#ibcon#about to write, iclass 30, count 2 2006.229.14:46:03.29#ibcon#wrote, iclass 30, count 2 2006.229.14:46:03.29#ibcon#about to read 3, iclass 30, count 2 2006.229.14:46:03.32#ibcon#read 3, iclass 30, count 2 2006.229.14:46:03.32#ibcon#about to read 4, iclass 30, count 2 2006.229.14:46:03.32#ibcon#read 4, iclass 30, count 2 2006.229.14:46:03.32#ibcon#about to read 5, iclass 30, count 2 2006.229.14:46:03.32#ibcon#read 5, iclass 30, count 2 2006.229.14:46:03.32#ibcon#about to read 6, iclass 30, count 2 2006.229.14:46:03.32#ibcon#read 6, iclass 30, count 2 2006.229.14:46:03.32#ibcon#end of sib2, iclass 30, count 2 2006.229.14:46:03.32#ibcon#*after write, iclass 30, count 2 2006.229.14:46:03.32#ibcon#*before return 0, iclass 30, count 2 2006.229.14:46:03.32#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:03.32#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:03.32#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.14:46:03.32#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:03.32#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:03.44#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:03.44#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:03.44#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:46:03.44#ibcon#first serial, iclass 30, count 0 2006.229.14:46:03.44#ibcon#enter sib2, iclass 30, count 0 2006.229.14:46:03.44#ibcon#flushed, iclass 30, count 0 2006.229.14:46:03.44#ibcon#about to write, iclass 30, count 0 2006.229.14:46:03.44#ibcon#wrote, iclass 30, count 0 2006.229.14:46:03.44#ibcon#about to read 3, iclass 30, count 0 2006.229.14:46:03.46#ibcon#read 3, iclass 30, count 0 2006.229.14:46:03.46#ibcon#about to read 4, iclass 30, count 0 2006.229.14:46:03.46#ibcon#read 4, iclass 30, count 0 2006.229.14:46:03.46#ibcon#about to read 5, iclass 30, count 0 2006.229.14:46:03.46#ibcon#read 5, iclass 30, count 0 2006.229.14:46:03.46#ibcon#about to read 6, iclass 30, count 0 2006.229.14:46:03.46#ibcon#read 6, iclass 30, count 0 2006.229.14:46:03.46#ibcon#end of sib2, iclass 30, count 0 2006.229.14:46:03.46#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:46:03.46#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:46:03.46#ibcon#[25=USB\r\n] 2006.229.14:46:03.46#ibcon#*before write, iclass 30, count 0 2006.229.14:46:03.46#ibcon#enter sib2, iclass 30, count 0 2006.229.14:46:03.46#ibcon#flushed, iclass 30, count 0 2006.229.14:46:03.46#ibcon#about to write, iclass 30, count 0 2006.229.14:46:03.46#ibcon#wrote, iclass 30, count 0 2006.229.14:46:03.46#ibcon#about to read 3, iclass 30, count 0 2006.229.14:46:03.49#ibcon#read 3, iclass 30, count 0 2006.229.14:46:03.49#ibcon#about to read 4, iclass 30, count 0 2006.229.14:46:03.49#ibcon#read 4, iclass 30, count 0 2006.229.14:46:03.49#ibcon#about to read 5, iclass 30, count 0 2006.229.14:46:03.49#ibcon#read 5, iclass 30, count 0 2006.229.14:46:03.49#ibcon#about to read 6, iclass 30, count 0 2006.229.14:46:03.49#ibcon#read 6, iclass 30, count 0 2006.229.14:46:03.49#ibcon#end of sib2, iclass 30, count 0 2006.229.14:46:03.49#ibcon#*after write, iclass 30, count 0 2006.229.14:46:03.49#ibcon#*before return 0, iclass 30, count 0 2006.229.14:46:03.49#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:03.49#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:03.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:46:03.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:46:03.49$vck44/valo=2,534.99 2006.229.14:46:03.49#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.14:46:03.49#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.14:46:03.49#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:03.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:03.49#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:03.49#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:03.49#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:46:03.49#ibcon#first serial, iclass 32, count 0 2006.229.14:46:03.49#ibcon#enter sib2, iclass 32, count 0 2006.229.14:46:03.49#ibcon#flushed, iclass 32, count 0 2006.229.14:46:03.49#ibcon#about to write, iclass 32, count 0 2006.229.14:46:03.49#ibcon#wrote, iclass 32, count 0 2006.229.14:46:03.49#ibcon#about to read 3, iclass 32, count 0 2006.229.14:46:03.51#ibcon#read 3, iclass 32, count 0 2006.229.14:46:03.51#ibcon#about to read 4, iclass 32, count 0 2006.229.14:46:03.51#ibcon#read 4, iclass 32, count 0 2006.229.14:46:03.51#ibcon#about to read 5, iclass 32, count 0 2006.229.14:46:03.51#ibcon#read 5, iclass 32, count 0 2006.229.14:46:03.51#ibcon#about to read 6, iclass 32, count 0 2006.229.14:46:03.51#ibcon#read 6, iclass 32, count 0 2006.229.14:46:03.51#ibcon#end of sib2, iclass 32, count 0 2006.229.14:46:03.51#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:46:03.51#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:46:03.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:46:03.51#ibcon#*before write, iclass 32, count 0 2006.229.14:46:03.51#ibcon#enter sib2, iclass 32, count 0 2006.229.14:46:03.51#ibcon#flushed, iclass 32, count 0 2006.229.14:46:03.51#ibcon#about to write, iclass 32, count 0 2006.229.14:46:03.51#ibcon#wrote, iclass 32, count 0 2006.229.14:46:03.51#ibcon#about to read 3, iclass 32, count 0 2006.229.14:46:03.55#ibcon#read 3, iclass 32, count 0 2006.229.14:46:03.55#ibcon#about to read 4, iclass 32, count 0 2006.229.14:46:03.55#ibcon#read 4, iclass 32, count 0 2006.229.14:46:03.55#ibcon#about to read 5, iclass 32, count 0 2006.229.14:46:03.55#ibcon#read 5, iclass 32, count 0 2006.229.14:46:03.55#ibcon#about to read 6, iclass 32, count 0 2006.229.14:46:03.55#ibcon#read 6, iclass 32, count 0 2006.229.14:46:03.55#ibcon#end of sib2, iclass 32, count 0 2006.229.14:46:03.55#ibcon#*after write, iclass 32, count 0 2006.229.14:46:03.55#ibcon#*before return 0, iclass 32, count 0 2006.229.14:46:03.55#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:03.55#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:03.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:46:03.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:46:03.55$vck44/va=2,7 2006.229.14:46:03.55#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.14:46:03.55#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.14:46:03.55#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:03.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:03.61#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:03.61#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:03.61#ibcon#enter wrdev, iclass 34, count 2 2006.229.14:46:03.61#ibcon#first serial, iclass 34, count 2 2006.229.14:46:03.61#ibcon#enter sib2, iclass 34, count 2 2006.229.14:46:03.61#ibcon#flushed, iclass 34, count 2 2006.229.14:46:03.61#ibcon#about to write, iclass 34, count 2 2006.229.14:46:03.61#ibcon#wrote, iclass 34, count 2 2006.229.14:46:03.61#ibcon#about to read 3, iclass 34, count 2 2006.229.14:46:03.63#ibcon#read 3, iclass 34, count 2 2006.229.14:46:03.63#ibcon#about to read 4, iclass 34, count 2 2006.229.14:46:03.63#ibcon#read 4, iclass 34, count 2 2006.229.14:46:03.63#ibcon#about to read 5, iclass 34, count 2 2006.229.14:46:03.63#ibcon#read 5, iclass 34, count 2 2006.229.14:46:03.63#ibcon#about to read 6, iclass 34, count 2 2006.229.14:46:03.63#ibcon#read 6, iclass 34, count 2 2006.229.14:46:03.63#ibcon#end of sib2, iclass 34, count 2 2006.229.14:46:03.63#ibcon#*mode == 0, iclass 34, count 2 2006.229.14:46:03.63#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.14:46:03.63#ibcon#[25=AT02-07\r\n] 2006.229.14:46:03.63#ibcon#*before write, iclass 34, count 2 2006.229.14:46:03.63#ibcon#enter sib2, iclass 34, count 2 2006.229.14:46:03.63#ibcon#flushed, iclass 34, count 2 2006.229.14:46:03.63#ibcon#about to write, iclass 34, count 2 2006.229.14:46:03.63#ibcon#wrote, iclass 34, count 2 2006.229.14:46:03.63#ibcon#about to read 3, iclass 34, count 2 2006.229.14:46:03.66#ibcon#read 3, iclass 34, count 2 2006.229.14:46:03.66#ibcon#about to read 4, iclass 34, count 2 2006.229.14:46:03.66#ibcon#read 4, iclass 34, count 2 2006.229.14:46:03.66#ibcon#about to read 5, iclass 34, count 2 2006.229.14:46:03.66#ibcon#read 5, iclass 34, count 2 2006.229.14:46:03.66#ibcon#about to read 6, iclass 34, count 2 2006.229.14:46:03.66#ibcon#read 6, iclass 34, count 2 2006.229.14:46:03.66#ibcon#end of sib2, iclass 34, count 2 2006.229.14:46:03.66#ibcon#*after write, iclass 34, count 2 2006.229.14:46:03.66#ibcon#*before return 0, iclass 34, count 2 2006.229.14:46:03.66#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:03.66#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:03.66#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.14:46:03.66#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:03.66#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:03.78#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:03.78#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:03.78#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:46:03.78#ibcon#first serial, iclass 34, count 0 2006.229.14:46:03.78#ibcon#enter sib2, iclass 34, count 0 2006.229.14:46:03.78#ibcon#flushed, iclass 34, count 0 2006.229.14:46:03.78#ibcon#about to write, iclass 34, count 0 2006.229.14:46:03.78#ibcon#wrote, iclass 34, count 0 2006.229.14:46:03.78#ibcon#about to read 3, iclass 34, count 0 2006.229.14:46:03.80#ibcon#read 3, iclass 34, count 0 2006.229.14:46:03.80#ibcon#about to read 4, iclass 34, count 0 2006.229.14:46:03.80#ibcon#read 4, iclass 34, count 0 2006.229.14:46:03.80#ibcon#about to read 5, iclass 34, count 0 2006.229.14:46:03.80#ibcon#read 5, iclass 34, count 0 2006.229.14:46:03.80#ibcon#about to read 6, iclass 34, count 0 2006.229.14:46:03.80#ibcon#read 6, iclass 34, count 0 2006.229.14:46:03.80#ibcon#end of sib2, iclass 34, count 0 2006.229.14:46:03.80#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:46:03.80#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:46:03.80#ibcon#[25=USB\r\n] 2006.229.14:46:03.80#ibcon#*before write, iclass 34, count 0 2006.229.14:46:03.80#ibcon#enter sib2, iclass 34, count 0 2006.229.14:46:03.80#ibcon#flushed, iclass 34, count 0 2006.229.14:46:03.80#ibcon#about to write, iclass 34, count 0 2006.229.14:46:03.80#ibcon#wrote, iclass 34, count 0 2006.229.14:46:03.80#ibcon#about to read 3, iclass 34, count 0 2006.229.14:46:03.83#ibcon#read 3, iclass 34, count 0 2006.229.14:46:03.83#ibcon#about to read 4, iclass 34, count 0 2006.229.14:46:03.83#ibcon#read 4, iclass 34, count 0 2006.229.14:46:03.83#ibcon#about to read 5, iclass 34, count 0 2006.229.14:46:03.83#ibcon#read 5, iclass 34, count 0 2006.229.14:46:03.83#ibcon#about to read 6, iclass 34, count 0 2006.229.14:46:03.83#ibcon#read 6, iclass 34, count 0 2006.229.14:46:03.83#ibcon#end of sib2, iclass 34, count 0 2006.229.14:46:03.83#ibcon#*after write, iclass 34, count 0 2006.229.14:46:03.83#ibcon#*before return 0, iclass 34, count 0 2006.229.14:46:03.83#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:03.83#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:03.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:46:03.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:46:03.83$vck44/valo=3,564.99 2006.229.14:46:03.83#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.14:46:03.83#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.14:46:03.83#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:03.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:03.83#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:03.83#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:03.83#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:46:03.83#ibcon#first serial, iclass 36, count 0 2006.229.14:46:03.83#ibcon#enter sib2, iclass 36, count 0 2006.229.14:46:03.83#ibcon#flushed, iclass 36, count 0 2006.229.14:46:03.83#ibcon#about to write, iclass 36, count 0 2006.229.14:46:03.83#ibcon#wrote, iclass 36, count 0 2006.229.14:46:03.83#ibcon#about to read 3, iclass 36, count 0 2006.229.14:46:03.85#ibcon#read 3, iclass 36, count 0 2006.229.14:46:03.85#ibcon#about to read 4, iclass 36, count 0 2006.229.14:46:03.85#ibcon#read 4, iclass 36, count 0 2006.229.14:46:03.85#ibcon#about to read 5, iclass 36, count 0 2006.229.14:46:03.85#ibcon#read 5, iclass 36, count 0 2006.229.14:46:03.85#ibcon#about to read 6, iclass 36, count 0 2006.229.14:46:03.85#ibcon#read 6, iclass 36, count 0 2006.229.14:46:03.85#ibcon#end of sib2, iclass 36, count 0 2006.229.14:46:03.85#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:46:03.85#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:46:03.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:46:03.85#ibcon#*before write, iclass 36, count 0 2006.229.14:46:03.85#ibcon#enter sib2, iclass 36, count 0 2006.229.14:46:03.85#ibcon#flushed, iclass 36, count 0 2006.229.14:46:03.85#ibcon#about to write, iclass 36, count 0 2006.229.14:46:03.85#ibcon#wrote, iclass 36, count 0 2006.229.14:46:03.85#ibcon#about to read 3, iclass 36, count 0 2006.229.14:46:03.89#ibcon#read 3, iclass 36, count 0 2006.229.14:46:03.89#ibcon#about to read 4, iclass 36, count 0 2006.229.14:46:03.89#ibcon#read 4, iclass 36, count 0 2006.229.14:46:03.89#ibcon#about to read 5, iclass 36, count 0 2006.229.14:46:03.89#ibcon#read 5, iclass 36, count 0 2006.229.14:46:03.89#ibcon#about to read 6, iclass 36, count 0 2006.229.14:46:03.89#ibcon#read 6, iclass 36, count 0 2006.229.14:46:03.89#ibcon#end of sib2, iclass 36, count 0 2006.229.14:46:03.89#ibcon#*after write, iclass 36, count 0 2006.229.14:46:03.89#ibcon#*before return 0, iclass 36, count 0 2006.229.14:46:03.89#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:03.89#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:03.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:46:03.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:46:03.89$vck44/va=3,6 2006.229.14:46:03.89#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.14:46:03.89#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.14:46:03.89#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:03.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:03.95#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:03.95#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:03.95#ibcon#enter wrdev, iclass 38, count 2 2006.229.14:46:03.95#ibcon#first serial, iclass 38, count 2 2006.229.14:46:03.95#ibcon#enter sib2, iclass 38, count 2 2006.229.14:46:03.95#ibcon#flushed, iclass 38, count 2 2006.229.14:46:03.95#ibcon#about to write, iclass 38, count 2 2006.229.14:46:03.95#ibcon#wrote, iclass 38, count 2 2006.229.14:46:03.95#ibcon#about to read 3, iclass 38, count 2 2006.229.14:46:03.97#ibcon#read 3, iclass 38, count 2 2006.229.14:46:03.97#ibcon#about to read 4, iclass 38, count 2 2006.229.14:46:03.97#ibcon#read 4, iclass 38, count 2 2006.229.14:46:03.97#ibcon#about to read 5, iclass 38, count 2 2006.229.14:46:03.97#ibcon#read 5, iclass 38, count 2 2006.229.14:46:03.97#ibcon#about to read 6, iclass 38, count 2 2006.229.14:46:03.97#ibcon#read 6, iclass 38, count 2 2006.229.14:46:03.97#ibcon#end of sib2, iclass 38, count 2 2006.229.14:46:03.97#ibcon#*mode == 0, iclass 38, count 2 2006.229.14:46:03.97#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.14:46:03.97#ibcon#[25=AT03-06\r\n] 2006.229.14:46:03.97#ibcon#*before write, iclass 38, count 2 2006.229.14:46:03.97#ibcon#enter sib2, iclass 38, count 2 2006.229.14:46:03.97#ibcon#flushed, iclass 38, count 2 2006.229.14:46:03.97#ibcon#about to write, iclass 38, count 2 2006.229.14:46:03.97#ibcon#wrote, iclass 38, count 2 2006.229.14:46:03.97#ibcon#about to read 3, iclass 38, count 2 2006.229.14:46:04.00#ibcon#read 3, iclass 38, count 2 2006.229.14:46:04.00#ibcon#about to read 4, iclass 38, count 2 2006.229.14:46:04.00#ibcon#read 4, iclass 38, count 2 2006.229.14:46:04.00#ibcon#about to read 5, iclass 38, count 2 2006.229.14:46:04.00#ibcon#read 5, iclass 38, count 2 2006.229.14:46:04.00#ibcon#about to read 6, iclass 38, count 2 2006.229.14:46:04.00#ibcon#read 6, iclass 38, count 2 2006.229.14:46:04.00#ibcon#end of sib2, iclass 38, count 2 2006.229.14:46:04.00#ibcon#*after write, iclass 38, count 2 2006.229.14:46:04.00#ibcon#*before return 0, iclass 38, count 2 2006.229.14:46:04.00#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:04.00#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:04.00#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.14:46:04.00#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:04.00#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:04.12#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:04.12#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:04.12#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:46:04.12#ibcon#first serial, iclass 38, count 0 2006.229.14:46:04.12#ibcon#enter sib2, iclass 38, count 0 2006.229.14:46:04.12#ibcon#flushed, iclass 38, count 0 2006.229.14:46:04.12#ibcon#about to write, iclass 38, count 0 2006.229.14:46:04.12#ibcon#wrote, iclass 38, count 0 2006.229.14:46:04.12#ibcon#about to read 3, iclass 38, count 0 2006.229.14:46:04.14#ibcon#read 3, iclass 38, count 0 2006.229.14:46:04.14#ibcon#about to read 4, iclass 38, count 0 2006.229.14:46:04.14#ibcon#read 4, iclass 38, count 0 2006.229.14:46:04.14#ibcon#about to read 5, iclass 38, count 0 2006.229.14:46:04.14#ibcon#read 5, iclass 38, count 0 2006.229.14:46:04.14#ibcon#about to read 6, iclass 38, count 0 2006.229.14:46:04.14#ibcon#read 6, iclass 38, count 0 2006.229.14:46:04.14#ibcon#end of sib2, iclass 38, count 0 2006.229.14:46:04.14#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:46:04.14#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:46:04.14#ibcon#[25=USB\r\n] 2006.229.14:46:04.14#ibcon#*before write, iclass 38, count 0 2006.229.14:46:04.14#ibcon#enter sib2, iclass 38, count 0 2006.229.14:46:04.14#ibcon#flushed, iclass 38, count 0 2006.229.14:46:04.14#ibcon#about to write, iclass 38, count 0 2006.229.14:46:04.14#ibcon#wrote, iclass 38, count 0 2006.229.14:46:04.14#ibcon#about to read 3, iclass 38, count 0 2006.229.14:46:04.17#ibcon#read 3, iclass 38, count 0 2006.229.14:46:04.17#ibcon#about to read 4, iclass 38, count 0 2006.229.14:46:04.17#ibcon#read 4, iclass 38, count 0 2006.229.14:46:04.17#ibcon#about to read 5, iclass 38, count 0 2006.229.14:46:04.17#ibcon#read 5, iclass 38, count 0 2006.229.14:46:04.17#ibcon#about to read 6, iclass 38, count 0 2006.229.14:46:04.17#ibcon#read 6, iclass 38, count 0 2006.229.14:46:04.17#ibcon#end of sib2, iclass 38, count 0 2006.229.14:46:04.17#ibcon#*after write, iclass 38, count 0 2006.229.14:46:04.17#ibcon#*before return 0, iclass 38, count 0 2006.229.14:46:04.17#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:04.17#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:04.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:46:04.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:46:04.17$vck44/valo=4,624.99 2006.229.14:46:04.17#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.14:46:04.17#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.14:46:04.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:04.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:04.17#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:04.17#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:04.17#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:46:04.17#ibcon#first serial, iclass 40, count 0 2006.229.14:46:04.17#ibcon#enter sib2, iclass 40, count 0 2006.229.14:46:04.17#ibcon#flushed, iclass 40, count 0 2006.229.14:46:04.17#ibcon#about to write, iclass 40, count 0 2006.229.14:46:04.17#ibcon#wrote, iclass 40, count 0 2006.229.14:46:04.17#ibcon#about to read 3, iclass 40, count 0 2006.229.14:46:04.19#ibcon#read 3, iclass 40, count 0 2006.229.14:46:04.19#ibcon#about to read 4, iclass 40, count 0 2006.229.14:46:04.19#ibcon#read 4, iclass 40, count 0 2006.229.14:46:04.19#ibcon#about to read 5, iclass 40, count 0 2006.229.14:46:04.19#ibcon#read 5, iclass 40, count 0 2006.229.14:46:04.19#ibcon#about to read 6, iclass 40, count 0 2006.229.14:46:04.19#ibcon#read 6, iclass 40, count 0 2006.229.14:46:04.19#ibcon#end of sib2, iclass 40, count 0 2006.229.14:46:04.19#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:46:04.19#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:46:04.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:46:04.19#ibcon#*before write, iclass 40, count 0 2006.229.14:46:04.19#ibcon#enter sib2, iclass 40, count 0 2006.229.14:46:04.19#ibcon#flushed, iclass 40, count 0 2006.229.14:46:04.19#ibcon#about to write, iclass 40, count 0 2006.229.14:46:04.19#ibcon#wrote, iclass 40, count 0 2006.229.14:46:04.19#ibcon#about to read 3, iclass 40, count 0 2006.229.14:46:04.23#ibcon#read 3, iclass 40, count 0 2006.229.14:46:04.23#ibcon#about to read 4, iclass 40, count 0 2006.229.14:46:04.23#ibcon#read 4, iclass 40, count 0 2006.229.14:46:04.23#ibcon#about to read 5, iclass 40, count 0 2006.229.14:46:04.23#ibcon#read 5, iclass 40, count 0 2006.229.14:46:04.23#ibcon#about to read 6, iclass 40, count 0 2006.229.14:46:04.23#ibcon#read 6, iclass 40, count 0 2006.229.14:46:04.23#ibcon#end of sib2, iclass 40, count 0 2006.229.14:46:04.23#ibcon#*after write, iclass 40, count 0 2006.229.14:46:04.23#ibcon#*before return 0, iclass 40, count 0 2006.229.14:46:04.23#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:04.23#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:04.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:46:04.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:46:04.23$vck44/va=4,7 2006.229.14:46:04.23#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.14:46:04.23#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.14:46:04.23#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:04.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:04.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:04.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:04.29#ibcon#enter wrdev, iclass 4, count 2 2006.229.14:46:04.29#ibcon#first serial, iclass 4, count 2 2006.229.14:46:04.29#ibcon#enter sib2, iclass 4, count 2 2006.229.14:46:04.29#ibcon#flushed, iclass 4, count 2 2006.229.14:46:04.29#ibcon#about to write, iclass 4, count 2 2006.229.14:46:04.29#ibcon#wrote, iclass 4, count 2 2006.229.14:46:04.29#ibcon#about to read 3, iclass 4, count 2 2006.229.14:46:04.31#ibcon#read 3, iclass 4, count 2 2006.229.14:46:04.31#ibcon#about to read 4, iclass 4, count 2 2006.229.14:46:04.31#ibcon#read 4, iclass 4, count 2 2006.229.14:46:04.31#ibcon#about to read 5, iclass 4, count 2 2006.229.14:46:04.31#ibcon#read 5, iclass 4, count 2 2006.229.14:46:04.31#ibcon#about to read 6, iclass 4, count 2 2006.229.14:46:04.31#ibcon#read 6, iclass 4, count 2 2006.229.14:46:04.31#ibcon#end of sib2, iclass 4, count 2 2006.229.14:46:04.31#ibcon#*mode == 0, iclass 4, count 2 2006.229.14:46:04.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.14:46:04.31#ibcon#[25=AT04-07\r\n] 2006.229.14:46:04.31#ibcon#*before write, iclass 4, count 2 2006.229.14:46:04.31#ibcon#enter sib2, iclass 4, count 2 2006.229.14:46:04.31#ibcon#flushed, iclass 4, count 2 2006.229.14:46:04.31#ibcon#about to write, iclass 4, count 2 2006.229.14:46:04.31#ibcon#wrote, iclass 4, count 2 2006.229.14:46:04.31#ibcon#about to read 3, iclass 4, count 2 2006.229.14:46:04.34#ibcon#read 3, iclass 4, count 2 2006.229.14:46:04.34#ibcon#about to read 4, iclass 4, count 2 2006.229.14:46:04.34#ibcon#read 4, iclass 4, count 2 2006.229.14:46:04.34#ibcon#about to read 5, iclass 4, count 2 2006.229.14:46:04.34#ibcon#read 5, iclass 4, count 2 2006.229.14:46:04.34#ibcon#about to read 6, iclass 4, count 2 2006.229.14:46:04.34#ibcon#read 6, iclass 4, count 2 2006.229.14:46:04.34#ibcon#end of sib2, iclass 4, count 2 2006.229.14:46:04.34#ibcon#*after write, iclass 4, count 2 2006.229.14:46:04.34#ibcon#*before return 0, iclass 4, count 2 2006.229.14:46:04.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:04.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:04.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.14:46:04.34#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:04.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:04.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:04.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:04.46#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:46:04.46#ibcon#first serial, iclass 4, count 0 2006.229.14:46:04.46#ibcon#enter sib2, iclass 4, count 0 2006.229.14:46:04.46#ibcon#flushed, iclass 4, count 0 2006.229.14:46:04.46#ibcon#about to write, iclass 4, count 0 2006.229.14:46:04.46#ibcon#wrote, iclass 4, count 0 2006.229.14:46:04.46#ibcon#about to read 3, iclass 4, count 0 2006.229.14:46:04.48#ibcon#read 3, iclass 4, count 0 2006.229.14:46:04.48#ibcon#about to read 4, iclass 4, count 0 2006.229.14:46:04.48#ibcon#read 4, iclass 4, count 0 2006.229.14:46:04.48#ibcon#about to read 5, iclass 4, count 0 2006.229.14:46:04.48#ibcon#read 5, iclass 4, count 0 2006.229.14:46:04.48#ibcon#about to read 6, iclass 4, count 0 2006.229.14:46:04.48#ibcon#read 6, iclass 4, count 0 2006.229.14:46:04.48#ibcon#end of sib2, iclass 4, count 0 2006.229.14:46:04.48#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:46:04.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:46:04.48#ibcon#[25=USB\r\n] 2006.229.14:46:04.48#ibcon#*before write, iclass 4, count 0 2006.229.14:46:04.48#ibcon#enter sib2, iclass 4, count 0 2006.229.14:46:04.48#ibcon#flushed, iclass 4, count 0 2006.229.14:46:04.48#ibcon#about to write, iclass 4, count 0 2006.229.14:46:04.48#ibcon#wrote, iclass 4, count 0 2006.229.14:46:04.48#ibcon#about to read 3, iclass 4, count 0 2006.229.14:46:04.51#ibcon#read 3, iclass 4, count 0 2006.229.14:46:04.51#ibcon#about to read 4, iclass 4, count 0 2006.229.14:46:04.51#ibcon#read 4, iclass 4, count 0 2006.229.14:46:04.51#ibcon#about to read 5, iclass 4, count 0 2006.229.14:46:04.51#ibcon#read 5, iclass 4, count 0 2006.229.14:46:04.51#ibcon#about to read 6, iclass 4, count 0 2006.229.14:46:04.51#ibcon#read 6, iclass 4, count 0 2006.229.14:46:04.51#ibcon#end of sib2, iclass 4, count 0 2006.229.14:46:04.51#ibcon#*after write, iclass 4, count 0 2006.229.14:46:04.51#ibcon#*before return 0, iclass 4, count 0 2006.229.14:46:04.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:04.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:04.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:46:04.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:46:04.51$vck44/valo=5,734.99 2006.229.14:46:04.51#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.14:46:04.51#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.14:46:04.51#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:04.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:04.51#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:04.51#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:04.51#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:46:04.51#ibcon#first serial, iclass 6, count 0 2006.229.14:46:04.51#ibcon#enter sib2, iclass 6, count 0 2006.229.14:46:04.51#ibcon#flushed, iclass 6, count 0 2006.229.14:46:04.51#ibcon#about to write, iclass 6, count 0 2006.229.14:46:04.51#ibcon#wrote, iclass 6, count 0 2006.229.14:46:04.51#ibcon#about to read 3, iclass 6, count 0 2006.229.14:46:04.53#ibcon#read 3, iclass 6, count 0 2006.229.14:46:04.53#ibcon#about to read 4, iclass 6, count 0 2006.229.14:46:04.53#ibcon#read 4, iclass 6, count 0 2006.229.14:46:04.53#ibcon#about to read 5, iclass 6, count 0 2006.229.14:46:04.53#ibcon#read 5, iclass 6, count 0 2006.229.14:46:04.53#ibcon#about to read 6, iclass 6, count 0 2006.229.14:46:04.53#ibcon#read 6, iclass 6, count 0 2006.229.14:46:04.53#ibcon#end of sib2, iclass 6, count 0 2006.229.14:46:04.53#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:46:04.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:46:04.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:46:04.53#ibcon#*before write, iclass 6, count 0 2006.229.14:46:04.53#ibcon#enter sib2, iclass 6, count 0 2006.229.14:46:04.53#ibcon#flushed, iclass 6, count 0 2006.229.14:46:04.53#ibcon#about to write, iclass 6, count 0 2006.229.14:46:04.53#ibcon#wrote, iclass 6, count 0 2006.229.14:46:04.53#ibcon#about to read 3, iclass 6, count 0 2006.229.14:46:04.57#ibcon#read 3, iclass 6, count 0 2006.229.14:46:04.57#ibcon#about to read 4, iclass 6, count 0 2006.229.14:46:04.57#ibcon#read 4, iclass 6, count 0 2006.229.14:46:04.57#ibcon#about to read 5, iclass 6, count 0 2006.229.14:46:04.57#ibcon#read 5, iclass 6, count 0 2006.229.14:46:04.57#ibcon#about to read 6, iclass 6, count 0 2006.229.14:46:04.57#ibcon#read 6, iclass 6, count 0 2006.229.14:46:04.57#ibcon#end of sib2, iclass 6, count 0 2006.229.14:46:04.57#ibcon#*after write, iclass 6, count 0 2006.229.14:46:04.57#ibcon#*before return 0, iclass 6, count 0 2006.229.14:46:04.57#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:04.57#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:04.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:46:04.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:46:04.57$vck44/va=5,4 2006.229.14:46:04.57#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.14:46:04.57#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.14:46:04.57#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:04.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:04.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:04.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:04.63#ibcon#enter wrdev, iclass 10, count 2 2006.229.14:46:04.63#ibcon#first serial, iclass 10, count 2 2006.229.14:46:04.63#ibcon#enter sib2, iclass 10, count 2 2006.229.14:46:04.63#ibcon#flushed, iclass 10, count 2 2006.229.14:46:04.63#ibcon#about to write, iclass 10, count 2 2006.229.14:46:04.63#ibcon#wrote, iclass 10, count 2 2006.229.14:46:04.63#ibcon#about to read 3, iclass 10, count 2 2006.229.14:46:04.65#ibcon#read 3, iclass 10, count 2 2006.229.14:46:04.65#ibcon#about to read 4, iclass 10, count 2 2006.229.14:46:04.65#ibcon#read 4, iclass 10, count 2 2006.229.14:46:04.65#ibcon#about to read 5, iclass 10, count 2 2006.229.14:46:04.65#ibcon#read 5, iclass 10, count 2 2006.229.14:46:04.65#ibcon#about to read 6, iclass 10, count 2 2006.229.14:46:04.65#ibcon#read 6, iclass 10, count 2 2006.229.14:46:04.65#ibcon#end of sib2, iclass 10, count 2 2006.229.14:46:04.65#ibcon#*mode == 0, iclass 10, count 2 2006.229.14:46:04.65#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.14:46:04.65#ibcon#[25=AT05-04\r\n] 2006.229.14:46:04.65#ibcon#*before write, iclass 10, count 2 2006.229.14:46:04.65#ibcon#enter sib2, iclass 10, count 2 2006.229.14:46:04.65#ibcon#flushed, iclass 10, count 2 2006.229.14:46:04.65#ibcon#about to write, iclass 10, count 2 2006.229.14:46:04.65#ibcon#wrote, iclass 10, count 2 2006.229.14:46:04.65#ibcon#about to read 3, iclass 10, count 2 2006.229.14:46:04.68#ibcon#read 3, iclass 10, count 2 2006.229.14:46:04.68#ibcon#about to read 4, iclass 10, count 2 2006.229.14:46:04.68#ibcon#read 4, iclass 10, count 2 2006.229.14:46:04.68#ibcon#about to read 5, iclass 10, count 2 2006.229.14:46:04.68#ibcon#read 5, iclass 10, count 2 2006.229.14:46:04.68#ibcon#about to read 6, iclass 10, count 2 2006.229.14:46:04.68#ibcon#read 6, iclass 10, count 2 2006.229.14:46:04.68#ibcon#end of sib2, iclass 10, count 2 2006.229.14:46:04.68#ibcon#*after write, iclass 10, count 2 2006.229.14:46:04.68#ibcon#*before return 0, iclass 10, count 2 2006.229.14:46:04.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:04.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:04.68#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.14:46:04.68#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:04.68#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:04.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:04.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:04.80#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:46:04.80#ibcon#first serial, iclass 10, count 0 2006.229.14:46:04.80#ibcon#enter sib2, iclass 10, count 0 2006.229.14:46:04.80#ibcon#flushed, iclass 10, count 0 2006.229.14:46:04.80#ibcon#about to write, iclass 10, count 0 2006.229.14:46:04.80#ibcon#wrote, iclass 10, count 0 2006.229.14:46:04.80#ibcon#about to read 3, iclass 10, count 0 2006.229.14:46:04.82#ibcon#read 3, iclass 10, count 0 2006.229.14:46:04.82#ibcon#about to read 4, iclass 10, count 0 2006.229.14:46:04.82#ibcon#read 4, iclass 10, count 0 2006.229.14:46:04.82#ibcon#about to read 5, iclass 10, count 0 2006.229.14:46:04.82#ibcon#read 5, iclass 10, count 0 2006.229.14:46:04.82#ibcon#about to read 6, iclass 10, count 0 2006.229.14:46:04.82#ibcon#read 6, iclass 10, count 0 2006.229.14:46:04.82#ibcon#end of sib2, iclass 10, count 0 2006.229.14:46:04.82#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:46:04.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:46:04.82#ibcon#[25=USB\r\n] 2006.229.14:46:04.82#ibcon#*before write, iclass 10, count 0 2006.229.14:46:04.82#ibcon#enter sib2, iclass 10, count 0 2006.229.14:46:04.82#ibcon#flushed, iclass 10, count 0 2006.229.14:46:04.82#ibcon#about to write, iclass 10, count 0 2006.229.14:46:04.82#ibcon#wrote, iclass 10, count 0 2006.229.14:46:04.82#ibcon#about to read 3, iclass 10, count 0 2006.229.14:46:04.85#ibcon#read 3, iclass 10, count 0 2006.229.14:46:04.85#ibcon#about to read 4, iclass 10, count 0 2006.229.14:46:04.85#ibcon#read 4, iclass 10, count 0 2006.229.14:46:04.85#ibcon#about to read 5, iclass 10, count 0 2006.229.14:46:04.85#ibcon#read 5, iclass 10, count 0 2006.229.14:46:04.85#ibcon#about to read 6, iclass 10, count 0 2006.229.14:46:04.85#ibcon#read 6, iclass 10, count 0 2006.229.14:46:04.85#ibcon#end of sib2, iclass 10, count 0 2006.229.14:46:04.85#ibcon#*after write, iclass 10, count 0 2006.229.14:46:04.85#ibcon#*before return 0, iclass 10, count 0 2006.229.14:46:04.85#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:04.85#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:04.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:46:04.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:46:04.85$vck44/valo=6,814.99 2006.229.14:46:04.85#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.14:46:04.85#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.14:46:04.85#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:04.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:04.85#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:04.85#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:04.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:46:04.85#ibcon#first serial, iclass 12, count 0 2006.229.14:46:04.85#ibcon#enter sib2, iclass 12, count 0 2006.229.14:46:04.85#ibcon#flushed, iclass 12, count 0 2006.229.14:46:04.85#ibcon#about to write, iclass 12, count 0 2006.229.14:46:04.85#ibcon#wrote, iclass 12, count 0 2006.229.14:46:04.85#ibcon#about to read 3, iclass 12, count 0 2006.229.14:46:04.87#ibcon#read 3, iclass 12, count 0 2006.229.14:46:04.87#ibcon#about to read 4, iclass 12, count 0 2006.229.14:46:04.87#ibcon#read 4, iclass 12, count 0 2006.229.14:46:04.87#ibcon#about to read 5, iclass 12, count 0 2006.229.14:46:04.87#ibcon#read 5, iclass 12, count 0 2006.229.14:46:04.87#ibcon#about to read 6, iclass 12, count 0 2006.229.14:46:04.87#ibcon#read 6, iclass 12, count 0 2006.229.14:46:04.87#ibcon#end of sib2, iclass 12, count 0 2006.229.14:46:04.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:46:04.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:46:04.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:46:04.87#ibcon#*before write, iclass 12, count 0 2006.229.14:46:04.87#ibcon#enter sib2, iclass 12, count 0 2006.229.14:46:04.87#ibcon#flushed, iclass 12, count 0 2006.229.14:46:04.87#ibcon#about to write, iclass 12, count 0 2006.229.14:46:04.87#ibcon#wrote, iclass 12, count 0 2006.229.14:46:04.87#ibcon#about to read 3, iclass 12, count 0 2006.229.14:46:04.91#ibcon#read 3, iclass 12, count 0 2006.229.14:46:04.91#ibcon#about to read 4, iclass 12, count 0 2006.229.14:46:04.91#ibcon#read 4, iclass 12, count 0 2006.229.14:46:04.91#ibcon#about to read 5, iclass 12, count 0 2006.229.14:46:04.91#ibcon#read 5, iclass 12, count 0 2006.229.14:46:04.91#ibcon#about to read 6, iclass 12, count 0 2006.229.14:46:04.91#ibcon#read 6, iclass 12, count 0 2006.229.14:46:04.91#ibcon#end of sib2, iclass 12, count 0 2006.229.14:46:04.91#ibcon#*after write, iclass 12, count 0 2006.229.14:46:04.91#ibcon#*before return 0, iclass 12, count 0 2006.229.14:46:04.91#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:04.91#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:04.91#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:46:04.91#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:46:04.91$vck44/va=6,4 2006.229.14:46:04.91#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.14:46:04.91#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.14:46:04.91#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:04.91#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:04.97#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:04.97#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:04.97#ibcon#enter wrdev, iclass 14, count 2 2006.229.14:46:04.97#ibcon#first serial, iclass 14, count 2 2006.229.14:46:04.97#ibcon#enter sib2, iclass 14, count 2 2006.229.14:46:04.97#ibcon#flushed, iclass 14, count 2 2006.229.14:46:04.97#ibcon#about to write, iclass 14, count 2 2006.229.14:46:04.97#ibcon#wrote, iclass 14, count 2 2006.229.14:46:04.97#ibcon#about to read 3, iclass 14, count 2 2006.229.14:46:04.99#ibcon#read 3, iclass 14, count 2 2006.229.14:46:04.99#ibcon#about to read 4, iclass 14, count 2 2006.229.14:46:04.99#ibcon#read 4, iclass 14, count 2 2006.229.14:46:04.99#ibcon#about to read 5, iclass 14, count 2 2006.229.14:46:04.99#ibcon#read 5, iclass 14, count 2 2006.229.14:46:04.99#ibcon#about to read 6, iclass 14, count 2 2006.229.14:46:04.99#ibcon#read 6, iclass 14, count 2 2006.229.14:46:04.99#ibcon#end of sib2, iclass 14, count 2 2006.229.14:46:04.99#ibcon#*mode == 0, iclass 14, count 2 2006.229.14:46:04.99#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.14:46:04.99#ibcon#[25=AT06-04\r\n] 2006.229.14:46:04.99#ibcon#*before write, iclass 14, count 2 2006.229.14:46:04.99#ibcon#enter sib2, iclass 14, count 2 2006.229.14:46:04.99#ibcon#flushed, iclass 14, count 2 2006.229.14:46:04.99#ibcon#about to write, iclass 14, count 2 2006.229.14:46:04.99#ibcon#wrote, iclass 14, count 2 2006.229.14:46:04.99#ibcon#about to read 3, iclass 14, count 2 2006.229.14:46:05.02#ibcon#read 3, iclass 14, count 2 2006.229.14:46:05.02#ibcon#about to read 4, iclass 14, count 2 2006.229.14:46:05.02#ibcon#read 4, iclass 14, count 2 2006.229.14:46:05.02#ibcon#about to read 5, iclass 14, count 2 2006.229.14:46:05.02#ibcon#read 5, iclass 14, count 2 2006.229.14:46:05.02#ibcon#about to read 6, iclass 14, count 2 2006.229.14:46:05.02#ibcon#read 6, iclass 14, count 2 2006.229.14:46:05.02#ibcon#end of sib2, iclass 14, count 2 2006.229.14:46:05.02#ibcon#*after write, iclass 14, count 2 2006.229.14:46:05.02#ibcon#*before return 0, iclass 14, count 2 2006.229.14:46:05.02#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:05.02#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:05.02#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.14:46:05.02#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:05.02#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:05.14#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:05.14#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:05.14#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:46:05.14#ibcon#first serial, iclass 14, count 0 2006.229.14:46:05.14#ibcon#enter sib2, iclass 14, count 0 2006.229.14:46:05.14#ibcon#flushed, iclass 14, count 0 2006.229.14:46:05.14#ibcon#about to write, iclass 14, count 0 2006.229.14:46:05.15#ibcon#wrote, iclass 14, count 0 2006.229.14:46:05.15#ibcon#about to read 3, iclass 14, count 0 2006.229.14:46:05.16#ibcon#read 3, iclass 14, count 0 2006.229.14:46:05.16#ibcon#about to read 4, iclass 14, count 0 2006.229.14:46:05.16#ibcon#read 4, iclass 14, count 0 2006.229.14:46:05.16#ibcon#about to read 5, iclass 14, count 0 2006.229.14:46:05.16#ibcon#read 5, iclass 14, count 0 2006.229.14:46:05.16#ibcon#about to read 6, iclass 14, count 0 2006.229.14:46:05.16#ibcon#read 6, iclass 14, count 0 2006.229.14:46:05.16#ibcon#end of sib2, iclass 14, count 0 2006.229.14:46:05.16#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:46:05.16#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:46:05.16#ibcon#[25=USB\r\n] 2006.229.14:46:05.16#ibcon#*before write, iclass 14, count 0 2006.229.14:46:05.16#ibcon#enter sib2, iclass 14, count 0 2006.229.14:46:05.16#ibcon#flushed, iclass 14, count 0 2006.229.14:46:05.16#ibcon#about to write, iclass 14, count 0 2006.229.14:46:05.16#ibcon#wrote, iclass 14, count 0 2006.229.14:46:05.16#ibcon#about to read 3, iclass 14, count 0 2006.229.14:46:05.19#ibcon#read 3, iclass 14, count 0 2006.229.14:46:05.19#ibcon#about to read 4, iclass 14, count 0 2006.229.14:46:05.19#ibcon#read 4, iclass 14, count 0 2006.229.14:46:05.19#ibcon#about to read 5, iclass 14, count 0 2006.229.14:46:05.19#ibcon#read 5, iclass 14, count 0 2006.229.14:46:05.19#ibcon#about to read 6, iclass 14, count 0 2006.229.14:46:05.19#ibcon#read 6, iclass 14, count 0 2006.229.14:46:05.19#ibcon#end of sib2, iclass 14, count 0 2006.229.14:46:05.19#ibcon#*after write, iclass 14, count 0 2006.229.14:46:05.19#ibcon#*before return 0, iclass 14, count 0 2006.229.14:46:05.19#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:05.19#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:05.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:46:05.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:46:05.19$vck44/valo=7,864.99 2006.229.14:46:05.19#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.14:46:05.19#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.14:46:05.19#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:05.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:05.19#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:05.19#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:05.19#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:46:05.19#ibcon#first serial, iclass 16, count 0 2006.229.14:46:05.19#ibcon#enter sib2, iclass 16, count 0 2006.229.14:46:05.19#ibcon#flushed, iclass 16, count 0 2006.229.14:46:05.19#ibcon#about to write, iclass 16, count 0 2006.229.14:46:05.19#ibcon#wrote, iclass 16, count 0 2006.229.14:46:05.19#ibcon#about to read 3, iclass 16, count 0 2006.229.14:46:05.21#ibcon#read 3, iclass 16, count 0 2006.229.14:46:05.21#ibcon#about to read 4, iclass 16, count 0 2006.229.14:46:05.21#ibcon#read 4, iclass 16, count 0 2006.229.14:46:05.21#ibcon#about to read 5, iclass 16, count 0 2006.229.14:46:05.21#ibcon#read 5, iclass 16, count 0 2006.229.14:46:05.21#ibcon#about to read 6, iclass 16, count 0 2006.229.14:46:05.21#ibcon#read 6, iclass 16, count 0 2006.229.14:46:05.21#ibcon#end of sib2, iclass 16, count 0 2006.229.14:46:05.21#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:46:05.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:46:05.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:46:05.21#ibcon#*before write, iclass 16, count 0 2006.229.14:46:05.21#ibcon#enter sib2, iclass 16, count 0 2006.229.14:46:05.21#ibcon#flushed, iclass 16, count 0 2006.229.14:46:05.21#ibcon#about to write, iclass 16, count 0 2006.229.14:46:05.21#ibcon#wrote, iclass 16, count 0 2006.229.14:46:05.21#ibcon#about to read 3, iclass 16, count 0 2006.229.14:46:05.25#ibcon#read 3, iclass 16, count 0 2006.229.14:46:05.25#ibcon#about to read 4, iclass 16, count 0 2006.229.14:46:05.25#ibcon#read 4, iclass 16, count 0 2006.229.14:46:05.25#ibcon#about to read 5, iclass 16, count 0 2006.229.14:46:05.25#ibcon#read 5, iclass 16, count 0 2006.229.14:46:05.25#ibcon#about to read 6, iclass 16, count 0 2006.229.14:46:05.25#ibcon#read 6, iclass 16, count 0 2006.229.14:46:05.25#ibcon#end of sib2, iclass 16, count 0 2006.229.14:46:05.25#ibcon#*after write, iclass 16, count 0 2006.229.14:46:05.25#ibcon#*before return 0, iclass 16, count 0 2006.229.14:46:05.25#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:05.25#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:05.25#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:46:05.25#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:46:05.25$vck44/va=7,5 2006.229.14:46:05.25#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.14:46:05.25#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.14:46:05.25#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:05.25#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:05.31#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:05.31#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:05.31#ibcon#enter wrdev, iclass 18, count 2 2006.229.14:46:05.31#ibcon#first serial, iclass 18, count 2 2006.229.14:46:05.31#ibcon#enter sib2, iclass 18, count 2 2006.229.14:46:05.31#ibcon#flushed, iclass 18, count 2 2006.229.14:46:05.31#ibcon#about to write, iclass 18, count 2 2006.229.14:46:05.31#ibcon#wrote, iclass 18, count 2 2006.229.14:46:05.31#ibcon#about to read 3, iclass 18, count 2 2006.229.14:46:05.33#ibcon#read 3, iclass 18, count 2 2006.229.14:46:05.33#ibcon#about to read 4, iclass 18, count 2 2006.229.14:46:05.33#ibcon#read 4, iclass 18, count 2 2006.229.14:46:05.33#ibcon#about to read 5, iclass 18, count 2 2006.229.14:46:05.33#ibcon#read 5, iclass 18, count 2 2006.229.14:46:05.33#ibcon#about to read 6, iclass 18, count 2 2006.229.14:46:05.33#ibcon#read 6, iclass 18, count 2 2006.229.14:46:05.33#ibcon#end of sib2, iclass 18, count 2 2006.229.14:46:05.33#ibcon#*mode == 0, iclass 18, count 2 2006.229.14:46:05.33#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.14:46:05.33#ibcon#[25=AT07-05\r\n] 2006.229.14:46:05.33#ibcon#*before write, iclass 18, count 2 2006.229.14:46:05.33#ibcon#enter sib2, iclass 18, count 2 2006.229.14:46:05.33#ibcon#flushed, iclass 18, count 2 2006.229.14:46:05.33#ibcon#about to write, iclass 18, count 2 2006.229.14:46:05.33#ibcon#wrote, iclass 18, count 2 2006.229.14:46:05.33#ibcon#about to read 3, iclass 18, count 2 2006.229.14:46:05.36#ibcon#read 3, iclass 18, count 2 2006.229.14:46:05.36#ibcon#about to read 4, iclass 18, count 2 2006.229.14:46:05.36#ibcon#read 4, iclass 18, count 2 2006.229.14:46:05.36#ibcon#about to read 5, iclass 18, count 2 2006.229.14:46:05.36#ibcon#read 5, iclass 18, count 2 2006.229.14:46:05.36#ibcon#about to read 6, iclass 18, count 2 2006.229.14:46:05.36#ibcon#read 6, iclass 18, count 2 2006.229.14:46:05.36#ibcon#end of sib2, iclass 18, count 2 2006.229.14:46:05.36#ibcon#*after write, iclass 18, count 2 2006.229.14:46:05.36#ibcon#*before return 0, iclass 18, count 2 2006.229.14:46:05.36#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:05.36#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:05.36#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.14:46:05.36#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:05.36#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:05.48#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:05.48#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:05.48#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:46:05.48#ibcon#first serial, iclass 18, count 0 2006.229.14:46:05.48#ibcon#enter sib2, iclass 18, count 0 2006.229.14:46:05.48#ibcon#flushed, iclass 18, count 0 2006.229.14:46:05.48#ibcon#about to write, iclass 18, count 0 2006.229.14:46:05.48#ibcon#wrote, iclass 18, count 0 2006.229.14:46:05.48#ibcon#about to read 3, iclass 18, count 0 2006.229.14:46:05.50#ibcon#read 3, iclass 18, count 0 2006.229.14:46:05.50#ibcon#about to read 4, iclass 18, count 0 2006.229.14:46:05.50#ibcon#read 4, iclass 18, count 0 2006.229.14:46:05.50#ibcon#about to read 5, iclass 18, count 0 2006.229.14:46:05.50#ibcon#read 5, iclass 18, count 0 2006.229.14:46:05.50#ibcon#about to read 6, iclass 18, count 0 2006.229.14:46:05.50#ibcon#read 6, iclass 18, count 0 2006.229.14:46:05.50#ibcon#end of sib2, iclass 18, count 0 2006.229.14:46:05.50#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:46:05.50#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:46:05.50#ibcon#[25=USB\r\n] 2006.229.14:46:05.50#ibcon#*before write, iclass 18, count 0 2006.229.14:46:05.50#ibcon#enter sib2, iclass 18, count 0 2006.229.14:46:05.50#ibcon#flushed, iclass 18, count 0 2006.229.14:46:05.50#ibcon#about to write, iclass 18, count 0 2006.229.14:46:05.50#ibcon#wrote, iclass 18, count 0 2006.229.14:46:05.50#ibcon#about to read 3, iclass 18, count 0 2006.229.14:46:05.53#ibcon#read 3, iclass 18, count 0 2006.229.14:46:05.53#ibcon#about to read 4, iclass 18, count 0 2006.229.14:46:05.53#ibcon#read 4, iclass 18, count 0 2006.229.14:46:05.53#ibcon#about to read 5, iclass 18, count 0 2006.229.14:46:05.53#ibcon#read 5, iclass 18, count 0 2006.229.14:46:05.53#ibcon#about to read 6, iclass 18, count 0 2006.229.14:46:05.53#ibcon#read 6, iclass 18, count 0 2006.229.14:46:05.53#ibcon#end of sib2, iclass 18, count 0 2006.229.14:46:05.53#ibcon#*after write, iclass 18, count 0 2006.229.14:46:05.53#ibcon#*before return 0, iclass 18, count 0 2006.229.14:46:05.53#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:05.53#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:05.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:46:05.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:46:05.53$vck44/valo=8,884.99 2006.229.14:46:05.53#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.14:46:05.53#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.14:46:05.53#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:05.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:05.53#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:05.53#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:05.53#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:46:05.53#ibcon#first serial, iclass 20, count 0 2006.229.14:46:05.53#ibcon#enter sib2, iclass 20, count 0 2006.229.14:46:05.53#ibcon#flushed, iclass 20, count 0 2006.229.14:46:05.53#ibcon#about to write, iclass 20, count 0 2006.229.14:46:05.53#ibcon#wrote, iclass 20, count 0 2006.229.14:46:05.53#ibcon#about to read 3, iclass 20, count 0 2006.229.14:46:05.55#ibcon#read 3, iclass 20, count 0 2006.229.14:46:05.55#ibcon#about to read 4, iclass 20, count 0 2006.229.14:46:05.55#ibcon#read 4, iclass 20, count 0 2006.229.14:46:05.55#ibcon#about to read 5, iclass 20, count 0 2006.229.14:46:05.55#ibcon#read 5, iclass 20, count 0 2006.229.14:46:05.55#ibcon#about to read 6, iclass 20, count 0 2006.229.14:46:05.55#ibcon#read 6, iclass 20, count 0 2006.229.14:46:05.55#ibcon#end of sib2, iclass 20, count 0 2006.229.14:46:05.55#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:46:05.55#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:46:05.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:46:05.55#ibcon#*before write, iclass 20, count 0 2006.229.14:46:05.55#ibcon#enter sib2, iclass 20, count 0 2006.229.14:46:05.55#ibcon#flushed, iclass 20, count 0 2006.229.14:46:05.55#ibcon#about to write, iclass 20, count 0 2006.229.14:46:05.55#ibcon#wrote, iclass 20, count 0 2006.229.14:46:05.55#ibcon#about to read 3, iclass 20, count 0 2006.229.14:46:05.59#ibcon#read 3, iclass 20, count 0 2006.229.14:46:05.59#ibcon#about to read 4, iclass 20, count 0 2006.229.14:46:05.59#ibcon#read 4, iclass 20, count 0 2006.229.14:46:05.59#ibcon#about to read 5, iclass 20, count 0 2006.229.14:46:05.59#ibcon#read 5, iclass 20, count 0 2006.229.14:46:05.59#ibcon#about to read 6, iclass 20, count 0 2006.229.14:46:05.59#ibcon#read 6, iclass 20, count 0 2006.229.14:46:05.59#ibcon#end of sib2, iclass 20, count 0 2006.229.14:46:05.59#ibcon#*after write, iclass 20, count 0 2006.229.14:46:05.59#ibcon#*before return 0, iclass 20, count 0 2006.229.14:46:05.59#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:05.59#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:05.59#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:46:05.59#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:46:05.59$vck44/va=8,6 2006.229.14:46:05.59#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.14:46:05.59#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.14:46:05.59#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:05.59#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:46:05.65#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:46:05.65#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:46:05.65#ibcon#enter wrdev, iclass 22, count 2 2006.229.14:46:05.65#ibcon#first serial, iclass 22, count 2 2006.229.14:46:05.65#ibcon#enter sib2, iclass 22, count 2 2006.229.14:46:05.65#ibcon#flushed, iclass 22, count 2 2006.229.14:46:05.65#ibcon#about to write, iclass 22, count 2 2006.229.14:46:05.65#ibcon#wrote, iclass 22, count 2 2006.229.14:46:05.65#ibcon#about to read 3, iclass 22, count 2 2006.229.14:46:05.67#ibcon#read 3, iclass 22, count 2 2006.229.14:46:05.67#ibcon#about to read 4, iclass 22, count 2 2006.229.14:46:05.67#ibcon#read 4, iclass 22, count 2 2006.229.14:46:05.67#ibcon#about to read 5, iclass 22, count 2 2006.229.14:46:05.67#ibcon#read 5, iclass 22, count 2 2006.229.14:46:05.67#ibcon#about to read 6, iclass 22, count 2 2006.229.14:46:05.67#ibcon#read 6, iclass 22, count 2 2006.229.14:46:05.67#ibcon#end of sib2, iclass 22, count 2 2006.229.14:46:05.67#ibcon#*mode == 0, iclass 22, count 2 2006.229.14:46:05.67#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.14:46:05.67#ibcon#[25=AT08-06\r\n] 2006.229.14:46:05.67#ibcon#*before write, iclass 22, count 2 2006.229.14:46:05.67#ibcon#enter sib2, iclass 22, count 2 2006.229.14:46:05.67#ibcon#flushed, iclass 22, count 2 2006.229.14:46:05.67#ibcon#about to write, iclass 22, count 2 2006.229.14:46:05.67#ibcon#wrote, iclass 22, count 2 2006.229.14:46:05.67#ibcon#about to read 3, iclass 22, count 2 2006.229.14:46:05.70#ibcon#read 3, iclass 22, count 2 2006.229.14:46:05.70#ibcon#about to read 4, iclass 22, count 2 2006.229.14:46:05.70#ibcon#read 4, iclass 22, count 2 2006.229.14:46:05.70#ibcon#about to read 5, iclass 22, count 2 2006.229.14:46:05.70#ibcon#read 5, iclass 22, count 2 2006.229.14:46:05.70#ibcon#about to read 6, iclass 22, count 2 2006.229.14:46:05.70#ibcon#read 6, iclass 22, count 2 2006.229.14:46:05.70#ibcon#end of sib2, iclass 22, count 2 2006.229.14:46:05.70#ibcon#*after write, iclass 22, count 2 2006.229.14:46:05.70#ibcon#*before return 0, iclass 22, count 2 2006.229.14:46:05.70#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:46:05.70#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.14:46:05.70#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.14:46:05.70#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:05.70#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:46:05.82#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:46:05.82#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:46:05.82#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:46:05.82#ibcon#first serial, iclass 22, count 0 2006.229.14:46:05.82#ibcon#enter sib2, iclass 22, count 0 2006.229.14:46:05.82#ibcon#flushed, iclass 22, count 0 2006.229.14:46:05.82#ibcon#about to write, iclass 22, count 0 2006.229.14:46:05.82#ibcon#wrote, iclass 22, count 0 2006.229.14:46:05.82#ibcon#about to read 3, iclass 22, count 0 2006.229.14:46:05.84#ibcon#read 3, iclass 22, count 0 2006.229.14:46:05.84#ibcon#about to read 4, iclass 22, count 0 2006.229.14:46:05.84#ibcon#read 4, iclass 22, count 0 2006.229.14:46:05.84#ibcon#about to read 5, iclass 22, count 0 2006.229.14:46:05.84#ibcon#read 5, iclass 22, count 0 2006.229.14:46:05.84#ibcon#about to read 6, iclass 22, count 0 2006.229.14:46:05.84#ibcon#read 6, iclass 22, count 0 2006.229.14:46:05.84#ibcon#end of sib2, iclass 22, count 0 2006.229.14:46:05.84#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:46:05.84#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:46:05.84#ibcon#[25=USB\r\n] 2006.229.14:46:05.84#ibcon#*before write, iclass 22, count 0 2006.229.14:46:05.84#ibcon#enter sib2, iclass 22, count 0 2006.229.14:46:05.84#ibcon#flushed, iclass 22, count 0 2006.229.14:46:05.84#ibcon#about to write, iclass 22, count 0 2006.229.14:46:05.84#ibcon#wrote, iclass 22, count 0 2006.229.14:46:05.84#ibcon#about to read 3, iclass 22, count 0 2006.229.14:46:05.87#ibcon#read 3, iclass 22, count 0 2006.229.14:46:05.87#ibcon#about to read 4, iclass 22, count 0 2006.229.14:46:05.87#ibcon#read 4, iclass 22, count 0 2006.229.14:46:05.87#ibcon#about to read 5, iclass 22, count 0 2006.229.14:46:05.87#ibcon#read 5, iclass 22, count 0 2006.229.14:46:05.87#ibcon#about to read 6, iclass 22, count 0 2006.229.14:46:05.87#ibcon#read 6, iclass 22, count 0 2006.229.14:46:05.87#ibcon#end of sib2, iclass 22, count 0 2006.229.14:46:05.87#ibcon#*after write, iclass 22, count 0 2006.229.14:46:05.87#ibcon#*before return 0, iclass 22, count 0 2006.229.14:46:05.87#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:46:05.87#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.14:46:05.87#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:46:05.87#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:46:05.87$vck44/vblo=1,629.99 2006.229.14:46:05.87#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.14:46:05.87#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.14:46:05.87#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:05.87#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:46:05.87#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:46:05.87#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:46:05.87#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:46:05.87#ibcon#first serial, iclass 24, count 0 2006.229.14:46:05.87#ibcon#enter sib2, iclass 24, count 0 2006.229.14:46:05.87#ibcon#flushed, iclass 24, count 0 2006.229.14:46:05.87#ibcon#about to write, iclass 24, count 0 2006.229.14:46:05.87#ibcon#wrote, iclass 24, count 0 2006.229.14:46:05.87#ibcon#about to read 3, iclass 24, count 0 2006.229.14:46:05.89#ibcon#read 3, iclass 24, count 0 2006.229.14:46:05.89#ibcon#about to read 4, iclass 24, count 0 2006.229.14:46:05.89#ibcon#read 4, iclass 24, count 0 2006.229.14:46:05.89#ibcon#about to read 5, iclass 24, count 0 2006.229.14:46:05.89#ibcon#read 5, iclass 24, count 0 2006.229.14:46:05.89#ibcon#about to read 6, iclass 24, count 0 2006.229.14:46:05.89#ibcon#read 6, iclass 24, count 0 2006.229.14:46:05.89#ibcon#end of sib2, iclass 24, count 0 2006.229.14:46:05.89#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:46:05.89#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:46:05.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:46:05.89#ibcon#*before write, iclass 24, count 0 2006.229.14:46:05.89#ibcon#enter sib2, iclass 24, count 0 2006.229.14:46:05.89#ibcon#flushed, iclass 24, count 0 2006.229.14:46:05.89#ibcon#about to write, iclass 24, count 0 2006.229.14:46:05.89#ibcon#wrote, iclass 24, count 0 2006.229.14:46:05.89#ibcon#about to read 3, iclass 24, count 0 2006.229.14:46:05.93#ibcon#read 3, iclass 24, count 0 2006.229.14:46:05.93#ibcon#about to read 4, iclass 24, count 0 2006.229.14:46:05.93#ibcon#read 4, iclass 24, count 0 2006.229.14:46:05.93#ibcon#about to read 5, iclass 24, count 0 2006.229.14:46:05.93#ibcon#read 5, iclass 24, count 0 2006.229.14:46:05.93#ibcon#about to read 6, iclass 24, count 0 2006.229.14:46:05.93#ibcon#read 6, iclass 24, count 0 2006.229.14:46:05.93#ibcon#end of sib2, iclass 24, count 0 2006.229.14:46:05.93#ibcon#*after write, iclass 24, count 0 2006.229.14:46:05.93#ibcon#*before return 0, iclass 24, count 0 2006.229.14:46:05.93#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:46:05.93#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.14:46:05.93#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:46:05.93#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:46:05.93$vck44/vb=1,4 2006.229.14:46:05.93#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.14:46:05.93#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.14:46:05.93#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:05.93#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:46:05.93#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:46:05.93#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:46:05.93#ibcon#enter wrdev, iclass 26, count 2 2006.229.14:46:05.93#ibcon#first serial, iclass 26, count 2 2006.229.14:46:05.93#ibcon#enter sib2, iclass 26, count 2 2006.229.14:46:05.93#ibcon#flushed, iclass 26, count 2 2006.229.14:46:05.93#ibcon#about to write, iclass 26, count 2 2006.229.14:46:05.93#ibcon#wrote, iclass 26, count 2 2006.229.14:46:05.93#ibcon#about to read 3, iclass 26, count 2 2006.229.14:46:05.95#ibcon#read 3, iclass 26, count 2 2006.229.14:46:05.95#ibcon#about to read 4, iclass 26, count 2 2006.229.14:46:05.95#ibcon#read 4, iclass 26, count 2 2006.229.14:46:05.95#ibcon#about to read 5, iclass 26, count 2 2006.229.14:46:05.95#ibcon#read 5, iclass 26, count 2 2006.229.14:46:05.95#ibcon#about to read 6, iclass 26, count 2 2006.229.14:46:05.95#ibcon#read 6, iclass 26, count 2 2006.229.14:46:05.95#ibcon#end of sib2, iclass 26, count 2 2006.229.14:46:05.95#ibcon#*mode == 0, iclass 26, count 2 2006.229.14:46:05.95#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.14:46:05.95#ibcon#[27=AT01-04\r\n] 2006.229.14:46:05.95#ibcon#*before write, iclass 26, count 2 2006.229.14:46:05.95#ibcon#enter sib2, iclass 26, count 2 2006.229.14:46:05.95#ibcon#flushed, iclass 26, count 2 2006.229.14:46:05.95#ibcon#about to write, iclass 26, count 2 2006.229.14:46:05.95#ibcon#wrote, iclass 26, count 2 2006.229.14:46:05.95#ibcon#about to read 3, iclass 26, count 2 2006.229.14:46:05.98#ibcon#read 3, iclass 26, count 2 2006.229.14:46:05.98#ibcon#about to read 4, iclass 26, count 2 2006.229.14:46:05.98#ibcon#read 4, iclass 26, count 2 2006.229.14:46:05.98#ibcon#about to read 5, iclass 26, count 2 2006.229.14:46:05.98#ibcon#read 5, iclass 26, count 2 2006.229.14:46:05.98#ibcon#about to read 6, iclass 26, count 2 2006.229.14:46:05.98#ibcon#read 6, iclass 26, count 2 2006.229.14:46:05.98#ibcon#end of sib2, iclass 26, count 2 2006.229.14:46:05.98#ibcon#*after write, iclass 26, count 2 2006.229.14:46:05.98#ibcon#*before return 0, iclass 26, count 2 2006.229.14:46:05.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:46:05.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.14:46:05.98#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.14:46:05.98#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:05.98#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:46:06.10#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:46:06.10#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:46:06.10#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:46:06.10#ibcon#first serial, iclass 26, count 0 2006.229.14:46:06.10#ibcon#enter sib2, iclass 26, count 0 2006.229.14:46:06.10#ibcon#flushed, iclass 26, count 0 2006.229.14:46:06.10#ibcon#about to write, iclass 26, count 0 2006.229.14:46:06.10#ibcon#wrote, iclass 26, count 0 2006.229.14:46:06.10#ibcon#about to read 3, iclass 26, count 0 2006.229.14:46:06.12#ibcon#read 3, iclass 26, count 0 2006.229.14:46:06.12#ibcon#about to read 4, iclass 26, count 0 2006.229.14:46:06.12#ibcon#read 4, iclass 26, count 0 2006.229.14:46:06.12#ibcon#about to read 5, iclass 26, count 0 2006.229.14:46:06.12#ibcon#read 5, iclass 26, count 0 2006.229.14:46:06.12#ibcon#about to read 6, iclass 26, count 0 2006.229.14:46:06.12#ibcon#read 6, iclass 26, count 0 2006.229.14:46:06.12#ibcon#end of sib2, iclass 26, count 0 2006.229.14:46:06.12#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:46:06.12#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:46:06.12#ibcon#[27=USB\r\n] 2006.229.14:46:06.12#ibcon#*before write, iclass 26, count 0 2006.229.14:46:06.12#ibcon#enter sib2, iclass 26, count 0 2006.229.14:46:06.12#ibcon#flushed, iclass 26, count 0 2006.229.14:46:06.12#ibcon#about to write, iclass 26, count 0 2006.229.14:46:06.12#ibcon#wrote, iclass 26, count 0 2006.229.14:46:06.12#ibcon#about to read 3, iclass 26, count 0 2006.229.14:46:06.15#ibcon#read 3, iclass 26, count 0 2006.229.14:46:06.15#ibcon#about to read 4, iclass 26, count 0 2006.229.14:46:06.15#ibcon#read 4, iclass 26, count 0 2006.229.14:46:06.15#ibcon#about to read 5, iclass 26, count 0 2006.229.14:46:06.15#ibcon#read 5, iclass 26, count 0 2006.229.14:46:06.15#ibcon#about to read 6, iclass 26, count 0 2006.229.14:46:06.15#ibcon#read 6, iclass 26, count 0 2006.229.14:46:06.15#ibcon#end of sib2, iclass 26, count 0 2006.229.14:46:06.15#ibcon#*after write, iclass 26, count 0 2006.229.14:46:06.15#ibcon#*before return 0, iclass 26, count 0 2006.229.14:46:06.15#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:46:06.15#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.14:46:06.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:46:06.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:46:06.15$vck44/vblo=2,634.99 2006.229.14:46:06.15#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.14:46:06.15#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.14:46:06.15#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:06.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:06.15#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:06.15#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:06.15#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:46:06.15#ibcon#first serial, iclass 28, count 0 2006.229.14:46:06.15#ibcon#enter sib2, iclass 28, count 0 2006.229.14:46:06.15#ibcon#flushed, iclass 28, count 0 2006.229.14:46:06.15#ibcon#about to write, iclass 28, count 0 2006.229.14:46:06.15#ibcon#wrote, iclass 28, count 0 2006.229.14:46:06.15#ibcon#about to read 3, iclass 28, count 0 2006.229.14:46:06.17#ibcon#read 3, iclass 28, count 0 2006.229.14:46:06.17#ibcon#about to read 4, iclass 28, count 0 2006.229.14:46:06.17#ibcon#read 4, iclass 28, count 0 2006.229.14:46:06.17#ibcon#about to read 5, iclass 28, count 0 2006.229.14:46:06.17#ibcon#read 5, iclass 28, count 0 2006.229.14:46:06.17#ibcon#about to read 6, iclass 28, count 0 2006.229.14:46:06.17#ibcon#read 6, iclass 28, count 0 2006.229.14:46:06.17#ibcon#end of sib2, iclass 28, count 0 2006.229.14:46:06.17#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:46:06.17#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:46:06.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:46:06.17#ibcon#*before write, iclass 28, count 0 2006.229.14:46:06.17#ibcon#enter sib2, iclass 28, count 0 2006.229.14:46:06.17#ibcon#flushed, iclass 28, count 0 2006.229.14:46:06.17#ibcon#about to write, iclass 28, count 0 2006.229.14:46:06.17#ibcon#wrote, iclass 28, count 0 2006.229.14:46:06.17#ibcon#about to read 3, iclass 28, count 0 2006.229.14:46:06.21#ibcon#read 3, iclass 28, count 0 2006.229.14:46:06.21#ibcon#about to read 4, iclass 28, count 0 2006.229.14:46:06.21#ibcon#read 4, iclass 28, count 0 2006.229.14:46:06.21#ibcon#about to read 5, iclass 28, count 0 2006.229.14:46:06.21#ibcon#read 5, iclass 28, count 0 2006.229.14:46:06.21#ibcon#about to read 6, iclass 28, count 0 2006.229.14:46:06.21#ibcon#read 6, iclass 28, count 0 2006.229.14:46:06.21#ibcon#end of sib2, iclass 28, count 0 2006.229.14:46:06.21#ibcon#*after write, iclass 28, count 0 2006.229.14:46:06.21#ibcon#*before return 0, iclass 28, count 0 2006.229.14:46:06.21#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:06.21#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.14:46:06.21#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:46:06.21#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:46:06.21$vck44/vb=2,4 2006.229.14:46:06.21#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.14:46:06.21#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.14:46:06.21#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:06.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:06.27#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:06.27#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:06.27#ibcon#enter wrdev, iclass 30, count 2 2006.229.14:46:06.27#ibcon#first serial, iclass 30, count 2 2006.229.14:46:06.27#ibcon#enter sib2, iclass 30, count 2 2006.229.14:46:06.27#ibcon#flushed, iclass 30, count 2 2006.229.14:46:06.27#ibcon#about to write, iclass 30, count 2 2006.229.14:46:06.27#ibcon#wrote, iclass 30, count 2 2006.229.14:46:06.27#ibcon#about to read 3, iclass 30, count 2 2006.229.14:46:06.29#ibcon#read 3, iclass 30, count 2 2006.229.14:46:06.29#ibcon#about to read 4, iclass 30, count 2 2006.229.14:46:06.29#ibcon#read 4, iclass 30, count 2 2006.229.14:46:06.29#ibcon#about to read 5, iclass 30, count 2 2006.229.14:46:06.29#ibcon#read 5, iclass 30, count 2 2006.229.14:46:06.29#ibcon#about to read 6, iclass 30, count 2 2006.229.14:46:06.29#ibcon#read 6, iclass 30, count 2 2006.229.14:46:06.29#ibcon#end of sib2, iclass 30, count 2 2006.229.14:46:06.29#ibcon#*mode == 0, iclass 30, count 2 2006.229.14:46:06.29#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.14:46:06.29#ibcon#[27=AT02-04\r\n] 2006.229.14:46:06.29#ibcon#*before write, iclass 30, count 2 2006.229.14:46:06.29#ibcon#enter sib2, iclass 30, count 2 2006.229.14:46:06.29#ibcon#flushed, iclass 30, count 2 2006.229.14:46:06.29#ibcon#about to write, iclass 30, count 2 2006.229.14:46:06.29#ibcon#wrote, iclass 30, count 2 2006.229.14:46:06.29#ibcon#about to read 3, iclass 30, count 2 2006.229.14:46:06.32#ibcon#read 3, iclass 30, count 2 2006.229.14:46:06.32#ibcon#about to read 4, iclass 30, count 2 2006.229.14:46:06.32#ibcon#read 4, iclass 30, count 2 2006.229.14:46:06.32#ibcon#about to read 5, iclass 30, count 2 2006.229.14:46:06.32#ibcon#read 5, iclass 30, count 2 2006.229.14:46:06.32#ibcon#about to read 6, iclass 30, count 2 2006.229.14:46:06.32#ibcon#read 6, iclass 30, count 2 2006.229.14:46:06.32#ibcon#end of sib2, iclass 30, count 2 2006.229.14:46:06.32#ibcon#*after write, iclass 30, count 2 2006.229.14:46:06.32#ibcon#*before return 0, iclass 30, count 2 2006.229.14:46:06.32#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:06.32#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.14:46:06.32#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.14:46:06.32#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:06.32#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:06.44#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:06.44#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:06.44#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:46:06.44#ibcon#first serial, iclass 30, count 0 2006.229.14:46:06.44#ibcon#enter sib2, iclass 30, count 0 2006.229.14:46:06.44#ibcon#flushed, iclass 30, count 0 2006.229.14:46:06.44#ibcon#about to write, iclass 30, count 0 2006.229.14:46:06.44#ibcon#wrote, iclass 30, count 0 2006.229.14:46:06.44#ibcon#about to read 3, iclass 30, count 0 2006.229.14:46:06.46#ibcon#read 3, iclass 30, count 0 2006.229.14:46:06.46#ibcon#about to read 4, iclass 30, count 0 2006.229.14:46:06.46#ibcon#read 4, iclass 30, count 0 2006.229.14:46:06.46#ibcon#about to read 5, iclass 30, count 0 2006.229.14:46:06.46#ibcon#read 5, iclass 30, count 0 2006.229.14:46:06.46#ibcon#about to read 6, iclass 30, count 0 2006.229.14:46:06.46#ibcon#read 6, iclass 30, count 0 2006.229.14:46:06.46#ibcon#end of sib2, iclass 30, count 0 2006.229.14:46:06.46#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:46:06.46#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:46:06.46#ibcon#[27=USB\r\n] 2006.229.14:46:06.46#ibcon#*before write, iclass 30, count 0 2006.229.14:46:06.46#ibcon#enter sib2, iclass 30, count 0 2006.229.14:46:06.46#ibcon#flushed, iclass 30, count 0 2006.229.14:46:06.46#ibcon#about to write, iclass 30, count 0 2006.229.14:46:06.46#ibcon#wrote, iclass 30, count 0 2006.229.14:46:06.46#ibcon#about to read 3, iclass 30, count 0 2006.229.14:46:06.49#ibcon#read 3, iclass 30, count 0 2006.229.14:46:06.49#ibcon#about to read 4, iclass 30, count 0 2006.229.14:46:06.49#ibcon#read 4, iclass 30, count 0 2006.229.14:46:06.49#ibcon#about to read 5, iclass 30, count 0 2006.229.14:46:06.49#ibcon#read 5, iclass 30, count 0 2006.229.14:46:06.49#ibcon#about to read 6, iclass 30, count 0 2006.229.14:46:06.49#ibcon#read 6, iclass 30, count 0 2006.229.14:46:06.49#ibcon#end of sib2, iclass 30, count 0 2006.229.14:46:06.49#ibcon#*after write, iclass 30, count 0 2006.229.14:46:06.49#ibcon#*before return 0, iclass 30, count 0 2006.229.14:46:06.49#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:06.49#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.14:46:06.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:46:06.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:46:06.49$vck44/vblo=3,649.99 2006.229.14:46:06.49#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.14:46:06.49#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.14:46:06.49#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:06.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:06.49#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:06.49#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:06.49#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:46:06.49#ibcon#first serial, iclass 32, count 0 2006.229.14:46:06.49#ibcon#enter sib2, iclass 32, count 0 2006.229.14:46:06.49#ibcon#flushed, iclass 32, count 0 2006.229.14:46:06.49#ibcon#about to write, iclass 32, count 0 2006.229.14:46:06.49#ibcon#wrote, iclass 32, count 0 2006.229.14:46:06.49#ibcon#about to read 3, iclass 32, count 0 2006.229.14:46:06.51#ibcon#read 3, iclass 32, count 0 2006.229.14:46:06.51#ibcon#about to read 4, iclass 32, count 0 2006.229.14:46:06.51#ibcon#read 4, iclass 32, count 0 2006.229.14:46:06.51#ibcon#about to read 5, iclass 32, count 0 2006.229.14:46:06.51#ibcon#read 5, iclass 32, count 0 2006.229.14:46:06.51#ibcon#about to read 6, iclass 32, count 0 2006.229.14:46:06.51#ibcon#read 6, iclass 32, count 0 2006.229.14:46:06.51#ibcon#end of sib2, iclass 32, count 0 2006.229.14:46:06.51#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:46:06.51#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:46:06.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:46:06.51#ibcon#*before write, iclass 32, count 0 2006.229.14:46:06.51#ibcon#enter sib2, iclass 32, count 0 2006.229.14:46:06.51#ibcon#flushed, iclass 32, count 0 2006.229.14:46:06.51#ibcon#about to write, iclass 32, count 0 2006.229.14:46:06.51#ibcon#wrote, iclass 32, count 0 2006.229.14:46:06.51#ibcon#about to read 3, iclass 32, count 0 2006.229.14:46:06.55#ibcon#read 3, iclass 32, count 0 2006.229.14:46:06.55#ibcon#about to read 4, iclass 32, count 0 2006.229.14:46:06.55#ibcon#read 4, iclass 32, count 0 2006.229.14:46:06.55#ibcon#about to read 5, iclass 32, count 0 2006.229.14:46:06.55#ibcon#read 5, iclass 32, count 0 2006.229.14:46:06.55#ibcon#about to read 6, iclass 32, count 0 2006.229.14:46:06.55#ibcon#read 6, iclass 32, count 0 2006.229.14:46:06.55#ibcon#end of sib2, iclass 32, count 0 2006.229.14:46:06.55#ibcon#*after write, iclass 32, count 0 2006.229.14:46:06.55#ibcon#*before return 0, iclass 32, count 0 2006.229.14:46:06.55#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:06.55#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.14:46:06.55#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:46:06.55#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:46:06.55$vck44/vb=3,4 2006.229.14:46:06.55#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.14:46:06.55#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.14:46:06.55#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:06.55#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:06.61#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:06.61#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:06.61#ibcon#enter wrdev, iclass 34, count 2 2006.229.14:46:06.61#ibcon#first serial, iclass 34, count 2 2006.229.14:46:06.61#ibcon#enter sib2, iclass 34, count 2 2006.229.14:46:06.61#ibcon#flushed, iclass 34, count 2 2006.229.14:46:06.61#ibcon#about to write, iclass 34, count 2 2006.229.14:46:06.61#ibcon#wrote, iclass 34, count 2 2006.229.14:46:06.61#ibcon#about to read 3, iclass 34, count 2 2006.229.14:46:06.63#ibcon#read 3, iclass 34, count 2 2006.229.14:46:06.63#ibcon#about to read 4, iclass 34, count 2 2006.229.14:46:06.63#ibcon#read 4, iclass 34, count 2 2006.229.14:46:06.63#ibcon#about to read 5, iclass 34, count 2 2006.229.14:46:06.63#ibcon#read 5, iclass 34, count 2 2006.229.14:46:06.63#ibcon#about to read 6, iclass 34, count 2 2006.229.14:46:06.63#ibcon#read 6, iclass 34, count 2 2006.229.14:46:06.63#ibcon#end of sib2, iclass 34, count 2 2006.229.14:46:06.63#ibcon#*mode == 0, iclass 34, count 2 2006.229.14:46:06.63#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.14:46:06.63#ibcon#[27=AT03-04\r\n] 2006.229.14:46:06.63#ibcon#*before write, iclass 34, count 2 2006.229.14:46:06.63#ibcon#enter sib2, iclass 34, count 2 2006.229.14:46:06.63#ibcon#flushed, iclass 34, count 2 2006.229.14:46:06.63#ibcon#about to write, iclass 34, count 2 2006.229.14:46:06.63#ibcon#wrote, iclass 34, count 2 2006.229.14:46:06.63#ibcon#about to read 3, iclass 34, count 2 2006.229.14:46:06.66#ibcon#read 3, iclass 34, count 2 2006.229.14:46:06.66#ibcon#about to read 4, iclass 34, count 2 2006.229.14:46:06.66#ibcon#read 4, iclass 34, count 2 2006.229.14:46:06.66#ibcon#about to read 5, iclass 34, count 2 2006.229.14:46:06.66#ibcon#read 5, iclass 34, count 2 2006.229.14:46:06.66#ibcon#about to read 6, iclass 34, count 2 2006.229.14:46:06.66#ibcon#read 6, iclass 34, count 2 2006.229.14:46:06.66#ibcon#end of sib2, iclass 34, count 2 2006.229.14:46:06.66#ibcon#*after write, iclass 34, count 2 2006.229.14:46:06.66#ibcon#*before return 0, iclass 34, count 2 2006.229.14:46:06.66#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:06.66#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.14:46:06.66#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.14:46:06.66#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:06.66#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:06.78#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:06.78#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:06.78#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:46:06.78#ibcon#first serial, iclass 34, count 0 2006.229.14:46:06.78#ibcon#enter sib2, iclass 34, count 0 2006.229.14:46:06.78#ibcon#flushed, iclass 34, count 0 2006.229.14:46:06.78#ibcon#about to write, iclass 34, count 0 2006.229.14:46:06.78#ibcon#wrote, iclass 34, count 0 2006.229.14:46:06.78#ibcon#about to read 3, iclass 34, count 0 2006.229.14:46:06.80#ibcon#read 3, iclass 34, count 0 2006.229.14:46:06.80#ibcon#about to read 4, iclass 34, count 0 2006.229.14:46:06.80#ibcon#read 4, iclass 34, count 0 2006.229.14:46:06.80#ibcon#about to read 5, iclass 34, count 0 2006.229.14:46:06.80#ibcon#read 5, iclass 34, count 0 2006.229.14:46:06.80#ibcon#about to read 6, iclass 34, count 0 2006.229.14:46:06.80#ibcon#read 6, iclass 34, count 0 2006.229.14:46:06.80#ibcon#end of sib2, iclass 34, count 0 2006.229.14:46:06.80#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:46:06.80#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:46:06.80#ibcon#[27=USB\r\n] 2006.229.14:46:06.80#ibcon#*before write, iclass 34, count 0 2006.229.14:46:06.80#ibcon#enter sib2, iclass 34, count 0 2006.229.14:46:06.80#ibcon#flushed, iclass 34, count 0 2006.229.14:46:06.80#ibcon#about to write, iclass 34, count 0 2006.229.14:46:06.80#ibcon#wrote, iclass 34, count 0 2006.229.14:46:06.80#ibcon#about to read 3, iclass 34, count 0 2006.229.14:46:06.83#ibcon#read 3, iclass 34, count 0 2006.229.14:46:06.83#ibcon#about to read 4, iclass 34, count 0 2006.229.14:46:06.83#ibcon#read 4, iclass 34, count 0 2006.229.14:46:06.83#ibcon#about to read 5, iclass 34, count 0 2006.229.14:46:06.83#ibcon#read 5, iclass 34, count 0 2006.229.14:46:06.83#ibcon#about to read 6, iclass 34, count 0 2006.229.14:46:06.83#ibcon#read 6, iclass 34, count 0 2006.229.14:46:06.83#ibcon#end of sib2, iclass 34, count 0 2006.229.14:46:06.83#ibcon#*after write, iclass 34, count 0 2006.229.14:46:06.83#ibcon#*before return 0, iclass 34, count 0 2006.229.14:46:06.83#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:06.83#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.14:46:06.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:46:06.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:46:06.83$vck44/vblo=4,679.99 2006.229.14:46:06.83#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.14:46:06.83#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.14:46:06.83#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:06.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:06.83#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:06.83#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:06.83#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:46:06.83#ibcon#first serial, iclass 36, count 0 2006.229.14:46:06.83#ibcon#enter sib2, iclass 36, count 0 2006.229.14:46:06.83#ibcon#flushed, iclass 36, count 0 2006.229.14:46:06.83#ibcon#about to write, iclass 36, count 0 2006.229.14:46:06.83#ibcon#wrote, iclass 36, count 0 2006.229.14:46:06.83#ibcon#about to read 3, iclass 36, count 0 2006.229.14:46:06.85#ibcon#read 3, iclass 36, count 0 2006.229.14:46:06.85#ibcon#about to read 4, iclass 36, count 0 2006.229.14:46:06.85#ibcon#read 4, iclass 36, count 0 2006.229.14:46:06.85#ibcon#about to read 5, iclass 36, count 0 2006.229.14:46:06.85#ibcon#read 5, iclass 36, count 0 2006.229.14:46:06.85#ibcon#about to read 6, iclass 36, count 0 2006.229.14:46:06.85#ibcon#read 6, iclass 36, count 0 2006.229.14:46:06.85#ibcon#end of sib2, iclass 36, count 0 2006.229.14:46:06.85#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:46:06.85#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:46:06.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:46:06.85#ibcon#*before write, iclass 36, count 0 2006.229.14:46:06.85#ibcon#enter sib2, iclass 36, count 0 2006.229.14:46:06.85#ibcon#flushed, iclass 36, count 0 2006.229.14:46:06.85#ibcon#about to write, iclass 36, count 0 2006.229.14:46:06.85#ibcon#wrote, iclass 36, count 0 2006.229.14:46:06.85#ibcon#about to read 3, iclass 36, count 0 2006.229.14:46:06.89#ibcon#read 3, iclass 36, count 0 2006.229.14:46:06.89#ibcon#about to read 4, iclass 36, count 0 2006.229.14:46:06.89#ibcon#read 4, iclass 36, count 0 2006.229.14:46:06.89#ibcon#about to read 5, iclass 36, count 0 2006.229.14:46:06.89#ibcon#read 5, iclass 36, count 0 2006.229.14:46:06.89#ibcon#about to read 6, iclass 36, count 0 2006.229.14:46:06.89#ibcon#read 6, iclass 36, count 0 2006.229.14:46:06.89#ibcon#end of sib2, iclass 36, count 0 2006.229.14:46:06.89#ibcon#*after write, iclass 36, count 0 2006.229.14:46:06.89#ibcon#*before return 0, iclass 36, count 0 2006.229.14:46:06.89#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:06.89#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.14:46:06.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:46:06.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:46:06.89$vck44/vb=4,4 2006.229.14:46:06.89#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.14:46:06.89#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.14:46:06.89#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:06.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:06.95#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:06.95#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:06.95#ibcon#enter wrdev, iclass 38, count 2 2006.229.14:46:06.95#ibcon#first serial, iclass 38, count 2 2006.229.14:46:06.95#ibcon#enter sib2, iclass 38, count 2 2006.229.14:46:06.95#ibcon#flushed, iclass 38, count 2 2006.229.14:46:06.95#ibcon#about to write, iclass 38, count 2 2006.229.14:46:06.95#ibcon#wrote, iclass 38, count 2 2006.229.14:46:06.95#ibcon#about to read 3, iclass 38, count 2 2006.229.14:46:06.97#ibcon#read 3, iclass 38, count 2 2006.229.14:46:06.97#ibcon#about to read 4, iclass 38, count 2 2006.229.14:46:06.97#ibcon#read 4, iclass 38, count 2 2006.229.14:46:06.97#ibcon#about to read 5, iclass 38, count 2 2006.229.14:46:06.97#ibcon#read 5, iclass 38, count 2 2006.229.14:46:06.97#ibcon#about to read 6, iclass 38, count 2 2006.229.14:46:06.97#ibcon#read 6, iclass 38, count 2 2006.229.14:46:06.97#ibcon#end of sib2, iclass 38, count 2 2006.229.14:46:06.97#ibcon#*mode == 0, iclass 38, count 2 2006.229.14:46:06.97#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.14:46:06.97#ibcon#[27=AT04-04\r\n] 2006.229.14:46:06.97#ibcon#*before write, iclass 38, count 2 2006.229.14:46:06.97#ibcon#enter sib2, iclass 38, count 2 2006.229.14:46:06.97#ibcon#flushed, iclass 38, count 2 2006.229.14:46:06.97#ibcon#about to write, iclass 38, count 2 2006.229.14:46:06.97#ibcon#wrote, iclass 38, count 2 2006.229.14:46:06.97#ibcon#about to read 3, iclass 38, count 2 2006.229.14:46:07.00#ibcon#read 3, iclass 38, count 2 2006.229.14:46:07.00#ibcon#about to read 4, iclass 38, count 2 2006.229.14:46:07.00#ibcon#read 4, iclass 38, count 2 2006.229.14:46:07.00#ibcon#about to read 5, iclass 38, count 2 2006.229.14:46:07.00#ibcon#read 5, iclass 38, count 2 2006.229.14:46:07.00#ibcon#about to read 6, iclass 38, count 2 2006.229.14:46:07.00#ibcon#read 6, iclass 38, count 2 2006.229.14:46:07.00#ibcon#end of sib2, iclass 38, count 2 2006.229.14:46:07.00#ibcon#*after write, iclass 38, count 2 2006.229.14:46:07.00#ibcon#*before return 0, iclass 38, count 2 2006.229.14:46:07.00#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:07.00#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.14:46:07.00#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.14:46:07.00#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:07.00#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:07.12#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:07.12#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:07.12#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:46:07.12#ibcon#first serial, iclass 38, count 0 2006.229.14:46:07.12#ibcon#enter sib2, iclass 38, count 0 2006.229.14:46:07.12#ibcon#flushed, iclass 38, count 0 2006.229.14:46:07.12#ibcon#about to write, iclass 38, count 0 2006.229.14:46:07.12#ibcon#wrote, iclass 38, count 0 2006.229.14:46:07.12#ibcon#about to read 3, iclass 38, count 0 2006.229.14:46:07.14#ibcon#read 3, iclass 38, count 0 2006.229.14:46:07.14#ibcon#about to read 4, iclass 38, count 0 2006.229.14:46:07.14#ibcon#read 4, iclass 38, count 0 2006.229.14:46:07.14#ibcon#about to read 5, iclass 38, count 0 2006.229.14:46:07.14#ibcon#read 5, iclass 38, count 0 2006.229.14:46:07.14#ibcon#about to read 6, iclass 38, count 0 2006.229.14:46:07.14#ibcon#read 6, iclass 38, count 0 2006.229.14:46:07.14#ibcon#end of sib2, iclass 38, count 0 2006.229.14:46:07.14#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:46:07.14#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:46:07.14#ibcon#[27=USB\r\n] 2006.229.14:46:07.14#ibcon#*before write, iclass 38, count 0 2006.229.14:46:07.14#ibcon#enter sib2, iclass 38, count 0 2006.229.14:46:07.14#ibcon#flushed, iclass 38, count 0 2006.229.14:46:07.14#ibcon#about to write, iclass 38, count 0 2006.229.14:46:07.14#ibcon#wrote, iclass 38, count 0 2006.229.14:46:07.14#ibcon#about to read 3, iclass 38, count 0 2006.229.14:46:07.17#ibcon#read 3, iclass 38, count 0 2006.229.14:46:07.17#ibcon#about to read 4, iclass 38, count 0 2006.229.14:46:07.17#ibcon#read 4, iclass 38, count 0 2006.229.14:46:07.17#ibcon#about to read 5, iclass 38, count 0 2006.229.14:46:07.17#ibcon#read 5, iclass 38, count 0 2006.229.14:46:07.17#ibcon#about to read 6, iclass 38, count 0 2006.229.14:46:07.17#ibcon#read 6, iclass 38, count 0 2006.229.14:46:07.17#ibcon#end of sib2, iclass 38, count 0 2006.229.14:46:07.17#ibcon#*after write, iclass 38, count 0 2006.229.14:46:07.17#ibcon#*before return 0, iclass 38, count 0 2006.229.14:46:07.17#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:07.17#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.14:46:07.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:46:07.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:46:07.17$vck44/vblo=5,709.99 2006.229.14:46:07.17#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.14:46:07.17#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.14:46:07.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:07.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:07.17#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:07.17#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:07.17#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:46:07.17#ibcon#first serial, iclass 40, count 0 2006.229.14:46:07.17#ibcon#enter sib2, iclass 40, count 0 2006.229.14:46:07.17#ibcon#flushed, iclass 40, count 0 2006.229.14:46:07.17#ibcon#about to write, iclass 40, count 0 2006.229.14:46:07.17#ibcon#wrote, iclass 40, count 0 2006.229.14:46:07.17#ibcon#about to read 3, iclass 40, count 0 2006.229.14:46:07.19#ibcon#read 3, iclass 40, count 0 2006.229.14:46:07.19#ibcon#about to read 4, iclass 40, count 0 2006.229.14:46:07.19#ibcon#read 4, iclass 40, count 0 2006.229.14:46:07.19#ibcon#about to read 5, iclass 40, count 0 2006.229.14:46:07.19#ibcon#read 5, iclass 40, count 0 2006.229.14:46:07.19#ibcon#about to read 6, iclass 40, count 0 2006.229.14:46:07.19#ibcon#read 6, iclass 40, count 0 2006.229.14:46:07.19#ibcon#end of sib2, iclass 40, count 0 2006.229.14:46:07.19#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:46:07.19#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:46:07.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:46:07.19#ibcon#*before write, iclass 40, count 0 2006.229.14:46:07.19#ibcon#enter sib2, iclass 40, count 0 2006.229.14:46:07.19#ibcon#flushed, iclass 40, count 0 2006.229.14:46:07.19#ibcon#about to write, iclass 40, count 0 2006.229.14:46:07.19#ibcon#wrote, iclass 40, count 0 2006.229.14:46:07.19#ibcon#about to read 3, iclass 40, count 0 2006.229.14:46:07.23#ibcon#read 3, iclass 40, count 0 2006.229.14:46:07.23#ibcon#about to read 4, iclass 40, count 0 2006.229.14:46:07.23#ibcon#read 4, iclass 40, count 0 2006.229.14:46:07.23#ibcon#about to read 5, iclass 40, count 0 2006.229.14:46:07.23#ibcon#read 5, iclass 40, count 0 2006.229.14:46:07.23#ibcon#about to read 6, iclass 40, count 0 2006.229.14:46:07.23#ibcon#read 6, iclass 40, count 0 2006.229.14:46:07.23#ibcon#end of sib2, iclass 40, count 0 2006.229.14:46:07.23#ibcon#*after write, iclass 40, count 0 2006.229.14:46:07.23#ibcon#*before return 0, iclass 40, count 0 2006.229.14:46:07.23#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:07.23#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:46:07.23#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:46:07.23#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:46:07.23$vck44/vb=5,4 2006.229.14:46:07.23#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.14:46:07.23#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.14:46:07.23#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:07.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:07.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:07.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:07.29#ibcon#enter wrdev, iclass 4, count 2 2006.229.14:46:07.29#ibcon#first serial, iclass 4, count 2 2006.229.14:46:07.29#ibcon#enter sib2, iclass 4, count 2 2006.229.14:46:07.29#ibcon#flushed, iclass 4, count 2 2006.229.14:46:07.29#ibcon#about to write, iclass 4, count 2 2006.229.14:46:07.29#ibcon#wrote, iclass 4, count 2 2006.229.14:46:07.29#ibcon#about to read 3, iclass 4, count 2 2006.229.14:46:07.31#ibcon#read 3, iclass 4, count 2 2006.229.14:46:07.31#ibcon#about to read 4, iclass 4, count 2 2006.229.14:46:07.31#ibcon#read 4, iclass 4, count 2 2006.229.14:46:07.31#ibcon#about to read 5, iclass 4, count 2 2006.229.14:46:07.31#ibcon#read 5, iclass 4, count 2 2006.229.14:46:07.31#ibcon#about to read 6, iclass 4, count 2 2006.229.14:46:07.31#ibcon#read 6, iclass 4, count 2 2006.229.14:46:07.31#ibcon#end of sib2, iclass 4, count 2 2006.229.14:46:07.31#ibcon#*mode == 0, iclass 4, count 2 2006.229.14:46:07.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.14:46:07.31#ibcon#[27=AT05-04\r\n] 2006.229.14:46:07.31#ibcon#*before write, iclass 4, count 2 2006.229.14:46:07.31#ibcon#enter sib2, iclass 4, count 2 2006.229.14:46:07.31#ibcon#flushed, iclass 4, count 2 2006.229.14:46:07.31#ibcon#about to write, iclass 4, count 2 2006.229.14:46:07.31#ibcon#wrote, iclass 4, count 2 2006.229.14:46:07.31#ibcon#about to read 3, iclass 4, count 2 2006.229.14:46:07.34#ibcon#read 3, iclass 4, count 2 2006.229.14:46:07.34#ibcon#about to read 4, iclass 4, count 2 2006.229.14:46:07.34#ibcon#read 4, iclass 4, count 2 2006.229.14:46:07.34#ibcon#about to read 5, iclass 4, count 2 2006.229.14:46:07.34#ibcon#read 5, iclass 4, count 2 2006.229.14:46:07.34#ibcon#about to read 6, iclass 4, count 2 2006.229.14:46:07.34#ibcon#read 6, iclass 4, count 2 2006.229.14:46:07.34#ibcon#end of sib2, iclass 4, count 2 2006.229.14:46:07.34#ibcon#*after write, iclass 4, count 2 2006.229.14:46:07.34#ibcon#*before return 0, iclass 4, count 2 2006.229.14:46:07.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:07.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.14:46:07.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.14:46:07.34#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:07.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:07.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:07.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:07.46#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:46:07.46#ibcon#first serial, iclass 4, count 0 2006.229.14:46:07.46#ibcon#enter sib2, iclass 4, count 0 2006.229.14:46:07.46#ibcon#flushed, iclass 4, count 0 2006.229.14:46:07.46#ibcon#about to write, iclass 4, count 0 2006.229.14:46:07.46#ibcon#wrote, iclass 4, count 0 2006.229.14:46:07.46#ibcon#about to read 3, iclass 4, count 0 2006.229.14:46:07.48#ibcon#read 3, iclass 4, count 0 2006.229.14:46:07.48#ibcon#about to read 4, iclass 4, count 0 2006.229.14:46:07.48#ibcon#read 4, iclass 4, count 0 2006.229.14:46:07.48#ibcon#about to read 5, iclass 4, count 0 2006.229.14:46:07.48#ibcon#read 5, iclass 4, count 0 2006.229.14:46:07.48#ibcon#about to read 6, iclass 4, count 0 2006.229.14:46:07.48#ibcon#read 6, iclass 4, count 0 2006.229.14:46:07.48#ibcon#end of sib2, iclass 4, count 0 2006.229.14:46:07.48#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:46:07.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:46:07.48#ibcon#[27=USB\r\n] 2006.229.14:46:07.48#ibcon#*before write, iclass 4, count 0 2006.229.14:46:07.48#ibcon#enter sib2, iclass 4, count 0 2006.229.14:46:07.48#ibcon#flushed, iclass 4, count 0 2006.229.14:46:07.48#ibcon#about to write, iclass 4, count 0 2006.229.14:46:07.48#ibcon#wrote, iclass 4, count 0 2006.229.14:46:07.48#ibcon#about to read 3, iclass 4, count 0 2006.229.14:46:07.51#ibcon#read 3, iclass 4, count 0 2006.229.14:46:07.51#ibcon#about to read 4, iclass 4, count 0 2006.229.14:46:07.51#ibcon#read 4, iclass 4, count 0 2006.229.14:46:07.51#ibcon#about to read 5, iclass 4, count 0 2006.229.14:46:07.51#ibcon#read 5, iclass 4, count 0 2006.229.14:46:07.51#ibcon#about to read 6, iclass 4, count 0 2006.229.14:46:07.51#ibcon#read 6, iclass 4, count 0 2006.229.14:46:07.51#ibcon#end of sib2, iclass 4, count 0 2006.229.14:46:07.51#ibcon#*after write, iclass 4, count 0 2006.229.14:46:07.51#ibcon#*before return 0, iclass 4, count 0 2006.229.14:46:07.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:07.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.14:46:07.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:46:07.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:46:07.51$vck44/vblo=6,719.99 2006.229.14:46:07.51#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.14:46:07.51#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.14:46:07.51#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:07.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:07.51#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:07.51#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:07.51#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:46:07.51#ibcon#first serial, iclass 6, count 0 2006.229.14:46:07.51#ibcon#enter sib2, iclass 6, count 0 2006.229.14:46:07.51#ibcon#flushed, iclass 6, count 0 2006.229.14:46:07.51#ibcon#about to write, iclass 6, count 0 2006.229.14:46:07.51#ibcon#wrote, iclass 6, count 0 2006.229.14:46:07.51#ibcon#about to read 3, iclass 6, count 0 2006.229.14:46:07.53#ibcon#read 3, iclass 6, count 0 2006.229.14:46:07.53#ibcon#about to read 4, iclass 6, count 0 2006.229.14:46:07.53#ibcon#read 4, iclass 6, count 0 2006.229.14:46:07.53#ibcon#about to read 5, iclass 6, count 0 2006.229.14:46:07.53#ibcon#read 5, iclass 6, count 0 2006.229.14:46:07.53#ibcon#about to read 6, iclass 6, count 0 2006.229.14:46:07.53#ibcon#read 6, iclass 6, count 0 2006.229.14:46:07.53#ibcon#end of sib2, iclass 6, count 0 2006.229.14:46:07.53#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:46:07.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:46:07.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:46:07.53#ibcon#*before write, iclass 6, count 0 2006.229.14:46:07.53#ibcon#enter sib2, iclass 6, count 0 2006.229.14:46:07.53#ibcon#flushed, iclass 6, count 0 2006.229.14:46:07.53#ibcon#about to write, iclass 6, count 0 2006.229.14:46:07.53#ibcon#wrote, iclass 6, count 0 2006.229.14:46:07.53#ibcon#about to read 3, iclass 6, count 0 2006.229.14:46:07.57#ibcon#read 3, iclass 6, count 0 2006.229.14:46:07.57#ibcon#about to read 4, iclass 6, count 0 2006.229.14:46:07.57#ibcon#read 4, iclass 6, count 0 2006.229.14:46:07.57#ibcon#about to read 5, iclass 6, count 0 2006.229.14:46:07.57#ibcon#read 5, iclass 6, count 0 2006.229.14:46:07.57#ibcon#about to read 6, iclass 6, count 0 2006.229.14:46:07.57#ibcon#read 6, iclass 6, count 0 2006.229.14:46:07.57#ibcon#end of sib2, iclass 6, count 0 2006.229.14:46:07.57#ibcon#*after write, iclass 6, count 0 2006.229.14:46:07.57#ibcon#*before return 0, iclass 6, count 0 2006.229.14:46:07.57#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:07.57#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.14:46:07.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:46:07.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:46:07.57$vck44/vb=6,4 2006.229.14:46:07.57#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.14:46:07.57#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.14:46:07.57#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:07.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:07.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:07.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:07.63#ibcon#enter wrdev, iclass 10, count 2 2006.229.14:46:07.63#ibcon#first serial, iclass 10, count 2 2006.229.14:46:07.63#ibcon#enter sib2, iclass 10, count 2 2006.229.14:46:07.63#ibcon#flushed, iclass 10, count 2 2006.229.14:46:07.63#ibcon#about to write, iclass 10, count 2 2006.229.14:46:07.63#ibcon#wrote, iclass 10, count 2 2006.229.14:46:07.63#ibcon#about to read 3, iclass 10, count 2 2006.229.14:46:07.65#ibcon#read 3, iclass 10, count 2 2006.229.14:46:07.65#ibcon#about to read 4, iclass 10, count 2 2006.229.14:46:07.65#ibcon#read 4, iclass 10, count 2 2006.229.14:46:07.65#ibcon#about to read 5, iclass 10, count 2 2006.229.14:46:07.65#ibcon#read 5, iclass 10, count 2 2006.229.14:46:07.65#ibcon#about to read 6, iclass 10, count 2 2006.229.14:46:07.65#ibcon#read 6, iclass 10, count 2 2006.229.14:46:07.65#ibcon#end of sib2, iclass 10, count 2 2006.229.14:46:07.65#ibcon#*mode == 0, iclass 10, count 2 2006.229.14:46:07.65#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.14:46:07.65#ibcon#[27=AT06-04\r\n] 2006.229.14:46:07.65#ibcon#*before write, iclass 10, count 2 2006.229.14:46:07.65#ibcon#enter sib2, iclass 10, count 2 2006.229.14:46:07.65#ibcon#flushed, iclass 10, count 2 2006.229.14:46:07.65#ibcon#about to write, iclass 10, count 2 2006.229.14:46:07.65#ibcon#wrote, iclass 10, count 2 2006.229.14:46:07.65#ibcon#about to read 3, iclass 10, count 2 2006.229.14:46:07.68#ibcon#read 3, iclass 10, count 2 2006.229.14:46:07.68#ibcon#about to read 4, iclass 10, count 2 2006.229.14:46:07.68#ibcon#read 4, iclass 10, count 2 2006.229.14:46:07.68#ibcon#about to read 5, iclass 10, count 2 2006.229.14:46:07.68#ibcon#read 5, iclass 10, count 2 2006.229.14:46:07.68#ibcon#about to read 6, iclass 10, count 2 2006.229.14:46:07.68#ibcon#read 6, iclass 10, count 2 2006.229.14:46:07.68#ibcon#end of sib2, iclass 10, count 2 2006.229.14:46:07.68#ibcon#*after write, iclass 10, count 2 2006.229.14:46:07.68#ibcon#*before return 0, iclass 10, count 2 2006.229.14:46:07.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:07.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.14:46:07.68#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.14:46:07.68#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:07.68#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:07.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:07.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:07.80#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:46:07.80#ibcon#first serial, iclass 10, count 0 2006.229.14:46:07.80#ibcon#enter sib2, iclass 10, count 0 2006.229.14:46:07.80#ibcon#flushed, iclass 10, count 0 2006.229.14:46:07.80#ibcon#about to write, iclass 10, count 0 2006.229.14:46:07.80#ibcon#wrote, iclass 10, count 0 2006.229.14:46:07.80#ibcon#about to read 3, iclass 10, count 0 2006.229.14:46:07.82#ibcon#read 3, iclass 10, count 0 2006.229.14:46:07.82#ibcon#about to read 4, iclass 10, count 0 2006.229.14:46:07.82#ibcon#read 4, iclass 10, count 0 2006.229.14:46:07.82#ibcon#about to read 5, iclass 10, count 0 2006.229.14:46:07.82#ibcon#read 5, iclass 10, count 0 2006.229.14:46:07.82#ibcon#about to read 6, iclass 10, count 0 2006.229.14:46:07.82#ibcon#read 6, iclass 10, count 0 2006.229.14:46:07.82#ibcon#end of sib2, iclass 10, count 0 2006.229.14:46:07.82#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:46:07.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:46:07.82#ibcon#[27=USB\r\n] 2006.229.14:46:07.82#ibcon#*before write, iclass 10, count 0 2006.229.14:46:07.82#ibcon#enter sib2, iclass 10, count 0 2006.229.14:46:07.82#ibcon#flushed, iclass 10, count 0 2006.229.14:46:07.82#ibcon#about to write, iclass 10, count 0 2006.229.14:46:07.82#ibcon#wrote, iclass 10, count 0 2006.229.14:46:07.82#ibcon#about to read 3, iclass 10, count 0 2006.229.14:46:07.85#ibcon#read 3, iclass 10, count 0 2006.229.14:46:07.85#ibcon#about to read 4, iclass 10, count 0 2006.229.14:46:07.85#ibcon#read 4, iclass 10, count 0 2006.229.14:46:07.85#ibcon#about to read 5, iclass 10, count 0 2006.229.14:46:07.85#ibcon#read 5, iclass 10, count 0 2006.229.14:46:07.85#ibcon#about to read 6, iclass 10, count 0 2006.229.14:46:07.85#ibcon#read 6, iclass 10, count 0 2006.229.14:46:07.85#ibcon#end of sib2, iclass 10, count 0 2006.229.14:46:07.85#ibcon#*after write, iclass 10, count 0 2006.229.14:46:07.85#ibcon#*before return 0, iclass 10, count 0 2006.229.14:46:07.85#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:07.85#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.14:46:07.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:46:07.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:46:07.85$vck44/vblo=7,734.99 2006.229.14:46:07.85#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.14:46:07.85#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.14:46:07.85#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:07.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:07.85#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:07.85#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:07.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:46:07.85#ibcon#first serial, iclass 12, count 0 2006.229.14:46:07.85#ibcon#enter sib2, iclass 12, count 0 2006.229.14:46:07.85#ibcon#flushed, iclass 12, count 0 2006.229.14:46:07.85#ibcon#about to write, iclass 12, count 0 2006.229.14:46:07.85#ibcon#wrote, iclass 12, count 0 2006.229.14:46:07.85#ibcon#about to read 3, iclass 12, count 0 2006.229.14:46:07.87#ibcon#read 3, iclass 12, count 0 2006.229.14:46:07.87#ibcon#about to read 4, iclass 12, count 0 2006.229.14:46:07.87#ibcon#read 4, iclass 12, count 0 2006.229.14:46:07.87#ibcon#about to read 5, iclass 12, count 0 2006.229.14:46:07.87#ibcon#read 5, iclass 12, count 0 2006.229.14:46:07.87#ibcon#about to read 6, iclass 12, count 0 2006.229.14:46:07.87#ibcon#read 6, iclass 12, count 0 2006.229.14:46:07.87#ibcon#end of sib2, iclass 12, count 0 2006.229.14:46:07.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:46:07.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:46:07.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:46:07.87#ibcon#*before write, iclass 12, count 0 2006.229.14:46:07.87#ibcon#enter sib2, iclass 12, count 0 2006.229.14:46:07.87#ibcon#flushed, iclass 12, count 0 2006.229.14:46:07.87#ibcon#about to write, iclass 12, count 0 2006.229.14:46:07.87#ibcon#wrote, iclass 12, count 0 2006.229.14:46:07.87#ibcon#about to read 3, iclass 12, count 0 2006.229.14:46:07.91#ibcon#read 3, iclass 12, count 0 2006.229.14:46:07.91#ibcon#about to read 4, iclass 12, count 0 2006.229.14:46:07.91#ibcon#read 4, iclass 12, count 0 2006.229.14:46:07.91#ibcon#about to read 5, iclass 12, count 0 2006.229.14:46:07.91#ibcon#read 5, iclass 12, count 0 2006.229.14:46:07.91#ibcon#about to read 6, iclass 12, count 0 2006.229.14:46:07.91#ibcon#read 6, iclass 12, count 0 2006.229.14:46:07.91#ibcon#end of sib2, iclass 12, count 0 2006.229.14:46:07.91#ibcon#*after write, iclass 12, count 0 2006.229.14:46:07.91#ibcon#*before return 0, iclass 12, count 0 2006.229.14:46:07.91#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:07.91#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.14:46:07.91#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:46:07.91#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:46:07.91$vck44/vb=7,4 2006.229.14:46:07.91#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.14:46:07.91#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.14:46:07.91#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:07.91#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:07.97#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:07.97#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:07.97#ibcon#enter wrdev, iclass 14, count 2 2006.229.14:46:07.97#ibcon#first serial, iclass 14, count 2 2006.229.14:46:07.97#ibcon#enter sib2, iclass 14, count 2 2006.229.14:46:07.97#ibcon#flushed, iclass 14, count 2 2006.229.14:46:07.97#ibcon#about to write, iclass 14, count 2 2006.229.14:46:07.97#ibcon#wrote, iclass 14, count 2 2006.229.14:46:07.97#ibcon#about to read 3, iclass 14, count 2 2006.229.14:46:07.99#ibcon#read 3, iclass 14, count 2 2006.229.14:46:07.99#ibcon#about to read 4, iclass 14, count 2 2006.229.14:46:07.99#ibcon#read 4, iclass 14, count 2 2006.229.14:46:07.99#ibcon#about to read 5, iclass 14, count 2 2006.229.14:46:07.99#ibcon#read 5, iclass 14, count 2 2006.229.14:46:07.99#ibcon#about to read 6, iclass 14, count 2 2006.229.14:46:07.99#ibcon#read 6, iclass 14, count 2 2006.229.14:46:07.99#ibcon#end of sib2, iclass 14, count 2 2006.229.14:46:07.99#ibcon#*mode == 0, iclass 14, count 2 2006.229.14:46:07.99#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.14:46:07.99#ibcon#[27=AT07-04\r\n] 2006.229.14:46:07.99#ibcon#*before write, iclass 14, count 2 2006.229.14:46:07.99#ibcon#enter sib2, iclass 14, count 2 2006.229.14:46:07.99#ibcon#flushed, iclass 14, count 2 2006.229.14:46:07.99#ibcon#about to write, iclass 14, count 2 2006.229.14:46:07.99#ibcon#wrote, iclass 14, count 2 2006.229.14:46:07.99#ibcon#about to read 3, iclass 14, count 2 2006.229.14:46:08.02#ibcon#read 3, iclass 14, count 2 2006.229.14:46:08.02#ibcon#about to read 4, iclass 14, count 2 2006.229.14:46:08.02#ibcon#read 4, iclass 14, count 2 2006.229.14:46:08.02#ibcon#about to read 5, iclass 14, count 2 2006.229.14:46:08.02#ibcon#read 5, iclass 14, count 2 2006.229.14:46:08.02#ibcon#about to read 6, iclass 14, count 2 2006.229.14:46:08.02#ibcon#read 6, iclass 14, count 2 2006.229.14:46:08.02#ibcon#end of sib2, iclass 14, count 2 2006.229.14:46:08.02#ibcon#*after write, iclass 14, count 2 2006.229.14:46:08.02#ibcon#*before return 0, iclass 14, count 2 2006.229.14:46:08.02#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:08.02#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.14:46:08.02#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.14:46:08.02#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:08.02#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:08.14#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:08.14#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:08.14#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:46:08.14#ibcon#first serial, iclass 14, count 0 2006.229.14:46:08.14#ibcon#enter sib2, iclass 14, count 0 2006.229.14:46:08.14#ibcon#flushed, iclass 14, count 0 2006.229.14:46:08.14#ibcon#about to write, iclass 14, count 0 2006.229.14:46:08.14#ibcon#wrote, iclass 14, count 0 2006.229.14:46:08.14#ibcon#about to read 3, iclass 14, count 0 2006.229.14:46:08.16#ibcon#read 3, iclass 14, count 0 2006.229.14:46:08.16#ibcon#about to read 4, iclass 14, count 0 2006.229.14:46:08.16#ibcon#read 4, iclass 14, count 0 2006.229.14:46:08.16#ibcon#about to read 5, iclass 14, count 0 2006.229.14:46:08.16#ibcon#read 5, iclass 14, count 0 2006.229.14:46:08.16#ibcon#about to read 6, iclass 14, count 0 2006.229.14:46:08.16#ibcon#read 6, iclass 14, count 0 2006.229.14:46:08.16#ibcon#end of sib2, iclass 14, count 0 2006.229.14:46:08.16#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:46:08.16#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:46:08.16#ibcon#[27=USB\r\n] 2006.229.14:46:08.16#ibcon#*before write, iclass 14, count 0 2006.229.14:46:08.16#ibcon#enter sib2, iclass 14, count 0 2006.229.14:46:08.16#ibcon#flushed, iclass 14, count 0 2006.229.14:46:08.16#ibcon#about to write, iclass 14, count 0 2006.229.14:46:08.16#ibcon#wrote, iclass 14, count 0 2006.229.14:46:08.16#ibcon#about to read 3, iclass 14, count 0 2006.229.14:46:08.19#ibcon#read 3, iclass 14, count 0 2006.229.14:46:08.19#ibcon#about to read 4, iclass 14, count 0 2006.229.14:46:08.19#ibcon#read 4, iclass 14, count 0 2006.229.14:46:08.19#ibcon#about to read 5, iclass 14, count 0 2006.229.14:46:08.19#ibcon#read 5, iclass 14, count 0 2006.229.14:46:08.19#ibcon#about to read 6, iclass 14, count 0 2006.229.14:46:08.19#ibcon#read 6, iclass 14, count 0 2006.229.14:46:08.19#ibcon#end of sib2, iclass 14, count 0 2006.229.14:46:08.19#ibcon#*after write, iclass 14, count 0 2006.229.14:46:08.19#ibcon#*before return 0, iclass 14, count 0 2006.229.14:46:08.19#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:08.19#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.14:46:08.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:46:08.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:46:08.19$vck44/vblo=8,744.99 2006.229.14:46:08.19#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.14:46:08.19#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.14:46:08.19#ibcon#ireg 17 cls_cnt 0 2006.229.14:46:08.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:08.19#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:08.19#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:08.19#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:46:08.19#ibcon#first serial, iclass 16, count 0 2006.229.14:46:08.19#ibcon#enter sib2, iclass 16, count 0 2006.229.14:46:08.19#ibcon#flushed, iclass 16, count 0 2006.229.14:46:08.19#ibcon#about to write, iclass 16, count 0 2006.229.14:46:08.19#ibcon#wrote, iclass 16, count 0 2006.229.14:46:08.19#ibcon#about to read 3, iclass 16, count 0 2006.229.14:46:08.21#ibcon#read 3, iclass 16, count 0 2006.229.14:46:08.21#ibcon#about to read 4, iclass 16, count 0 2006.229.14:46:08.21#ibcon#read 4, iclass 16, count 0 2006.229.14:46:08.21#ibcon#about to read 5, iclass 16, count 0 2006.229.14:46:08.21#ibcon#read 5, iclass 16, count 0 2006.229.14:46:08.21#ibcon#about to read 6, iclass 16, count 0 2006.229.14:46:08.21#ibcon#read 6, iclass 16, count 0 2006.229.14:46:08.21#ibcon#end of sib2, iclass 16, count 0 2006.229.14:46:08.21#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:46:08.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:46:08.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:46:08.21#ibcon#*before write, iclass 16, count 0 2006.229.14:46:08.21#ibcon#enter sib2, iclass 16, count 0 2006.229.14:46:08.21#ibcon#flushed, iclass 16, count 0 2006.229.14:46:08.21#ibcon#about to write, iclass 16, count 0 2006.229.14:46:08.21#ibcon#wrote, iclass 16, count 0 2006.229.14:46:08.21#ibcon#about to read 3, iclass 16, count 0 2006.229.14:46:08.25#ibcon#read 3, iclass 16, count 0 2006.229.14:46:08.25#ibcon#about to read 4, iclass 16, count 0 2006.229.14:46:08.25#ibcon#read 4, iclass 16, count 0 2006.229.14:46:08.25#ibcon#about to read 5, iclass 16, count 0 2006.229.14:46:08.25#ibcon#read 5, iclass 16, count 0 2006.229.14:46:08.25#ibcon#about to read 6, iclass 16, count 0 2006.229.14:46:08.25#ibcon#read 6, iclass 16, count 0 2006.229.14:46:08.25#ibcon#end of sib2, iclass 16, count 0 2006.229.14:46:08.25#ibcon#*after write, iclass 16, count 0 2006.229.14:46:08.25#ibcon#*before return 0, iclass 16, count 0 2006.229.14:46:08.25#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:08.25#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.14:46:08.25#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:46:08.25#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:46:08.25$vck44/vb=8,4 2006.229.14:46:08.25#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.14:46:08.25#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.14:46:08.25#ibcon#ireg 11 cls_cnt 2 2006.229.14:46:08.25#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:08.31#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:08.31#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:08.31#ibcon#enter wrdev, iclass 18, count 2 2006.229.14:46:08.31#ibcon#first serial, iclass 18, count 2 2006.229.14:46:08.31#ibcon#enter sib2, iclass 18, count 2 2006.229.14:46:08.31#ibcon#flushed, iclass 18, count 2 2006.229.14:46:08.31#ibcon#about to write, iclass 18, count 2 2006.229.14:46:08.31#ibcon#wrote, iclass 18, count 2 2006.229.14:46:08.31#ibcon#about to read 3, iclass 18, count 2 2006.229.14:46:08.33#ibcon#read 3, iclass 18, count 2 2006.229.14:46:08.33#ibcon#about to read 4, iclass 18, count 2 2006.229.14:46:08.33#ibcon#read 4, iclass 18, count 2 2006.229.14:46:08.33#ibcon#about to read 5, iclass 18, count 2 2006.229.14:46:08.33#ibcon#read 5, iclass 18, count 2 2006.229.14:46:08.33#ibcon#about to read 6, iclass 18, count 2 2006.229.14:46:08.33#ibcon#read 6, iclass 18, count 2 2006.229.14:46:08.33#ibcon#end of sib2, iclass 18, count 2 2006.229.14:46:08.33#ibcon#*mode == 0, iclass 18, count 2 2006.229.14:46:08.33#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.14:46:08.33#ibcon#[27=AT08-04\r\n] 2006.229.14:46:08.33#ibcon#*before write, iclass 18, count 2 2006.229.14:46:08.33#ibcon#enter sib2, iclass 18, count 2 2006.229.14:46:08.33#ibcon#flushed, iclass 18, count 2 2006.229.14:46:08.33#ibcon#about to write, iclass 18, count 2 2006.229.14:46:08.33#ibcon#wrote, iclass 18, count 2 2006.229.14:46:08.33#ibcon#about to read 3, iclass 18, count 2 2006.229.14:46:08.36#ibcon#read 3, iclass 18, count 2 2006.229.14:46:08.36#ibcon#about to read 4, iclass 18, count 2 2006.229.14:46:08.36#ibcon#read 4, iclass 18, count 2 2006.229.14:46:08.36#ibcon#about to read 5, iclass 18, count 2 2006.229.14:46:08.36#ibcon#read 5, iclass 18, count 2 2006.229.14:46:08.36#ibcon#about to read 6, iclass 18, count 2 2006.229.14:46:08.36#ibcon#read 6, iclass 18, count 2 2006.229.14:46:08.36#ibcon#end of sib2, iclass 18, count 2 2006.229.14:46:08.36#ibcon#*after write, iclass 18, count 2 2006.229.14:46:08.36#ibcon#*before return 0, iclass 18, count 2 2006.229.14:46:08.36#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:08.36#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.14:46:08.36#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.14:46:08.36#ibcon#ireg 7 cls_cnt 0 2006.229.14:46:08.36#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:08.48#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:08.48#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:08.48#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:46:08.48#ibcon#first serial, iclass 18, count 0 2006.229.14:46:08.48#ibcon#enter sib2, iclass 18, count 0 2006.229.14:46:08.48#ibcon#flushed, iclass 18, count 0 2006.229.14:46:08.48#ibcon#about to write, iclass 18, count 0 2006.229.14:46:08.48#ibcon#wrote, iclass 18, count 0 2006.229.14:46:08.48#ibcon#about to read 3, iclass 18, count 0 2006.229.14:46:08.50#ibcon#read 3, iclass 18, count 0 2006.229.14:46:08.50#ibcon#about to read 4, iclass 18, count 0 2006.229.14:46:08.50#ibcon#read 4, iclass 18, count 0 2006.229.14:46:08.50#ibcon#about to read 5, iclass 18, count 0 2006.229.14:46:08.50#ibcon#read 5, iclass 18, count 0 2006.229.14:46:08.50#ibcon#about to read 6, iclass 18, count 0 2006.229.14:46:08.50#ibcon#read 6, iclass 18, count 0 2006.229.14:46:08.50#ibcon#end of sib2, iclass 18, count 0 2006.229.14:46:08.50#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:46:08.50#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:46:08.50#ibcon#[27=USB\r\n] 2006.229.14:46:08.50#ibcon#*before write, iclass 18, count 0 2006.229.14:46:08.50#ibcon#enter sib2, iclass 18, count 0 2006.229.14:46:08.50#ibcon#flushed, iclass 18, count 0 2006.229.14:46:08.50#ibcon#about to write, iclass 18, count 0 2006.229.14:46:08.50#ibcon#wrote, iclass 18, count 0 2006.229.14:46:08.50#ibcon#about to read 3, iclass 18, count 0 2006.229.14:46:08.53#ibcon#read 3, iclass 18, count 0 2006.229.14:46:08.53#ibcon#about to read 4, iclass 18, count 0 2006.229.14:46:08.53#ibcon#read 4, iclass 18, count 0 2006.229.14:46:08.53#ibcon#about to read 5, iclass 18, count 0 2006.229.14:46:08.53#ibcon#read 5, iclass 18, count 0 2006.229.14:46:08.53#ibcon#about to read 6, iclass 18, count 0 2006.229.14:46:08.53#ibcon#read 6, iclass 18, count 0 2006.229.14:46:08.53#ibcon#end of sib2, iclass 18, count 0 2006.229.14:46:08.53#ibcon#*after write, iclass 18, count 0 2006.229.14:46:08.53#ibcon#*before return 0, iclass 18, count 0 2006.229.14:46:08.53#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:08.53#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.14:46:08.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:46:08.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:46:08.53$vck44/vabw=wide 2006.229.14:46:08.53#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.14:46:08.53#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.14:46:08.53#ibcon#ireg 8 cls_cnt 0 2006.229.14:46:08.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:08.53#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:08.53#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:08.53#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:46:08.53#ibcon#first serial, iclass 20, count 0 2006.229.14:46:08.53#ibcon#enter sib2, iclass 20, count 0 2006.229.14:46:08.53#ibcon#flushed, iclass 20, count 0 2006.229.14:46:08.53#ibcon#about to write, iclass 20, count 0 2006.229.14:46:08.53#ibcon#wrote, iclass 20, count 0 2006.229.14:46:08.53#ibcon#about to read 3, iclass 20, count 0 2006.229.14:46:08.55#ibcon#read 3, iclass 20, count 0 2006.229.14:46:08.55#ibcon#about to read 4, iclass 20, count 0 2006.229.14:46:08.55#ibcon#read 4, iclass 20, count 0 2006.229.14:46:08.55#ibcon#about to read 5, iclass 20, count 0 2006.229.14:46:08.55#ibcon#read 5, iclass 20, count 0 2006.229.14:46:08.55#ibcon#about to read 6, iclass 20, count 0 2006.229.14:46:08.55#ibcon#read 6, iclass 20, count 0 2006.229.14:46:08.55#ibcon#end of sib2, iclass 20, count 0 2006.229.14:46:08.55#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:46:08.55#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:46:08.55#ibcon#[25=BW32\r\n] 2006.229.14:46:08.55#ibcon#*before write, iclass 20, count 0 2006.229.14:46:08.55#ibcon#enter sib2, iclass 20, count 0 2006.229.14:46:08.55#ibcon#flushed, iclass 20, count 0 2006.229.14:46:08.55#ibcon#about to write, iclass 20, count 0 2006.229.14:46:08.55#ibcon#wrote, iclass 20, count 0 2006.229.14:46:08.55#ibcon#about to read 3, iclass 20, count 0 2006.229.14:46:08.58#ibcon#read 3, iclass 20, count 0 2006.229.14:46:08.58#ibcon#about to read 4, iclass 20, count 0 2006.229.14:46:08.58#ibcon#read 4, iclass 20, count 0 2006.229.14:46:08.58#ibcon#about to read 5, iclass 20, count 0 2006.229.14:46:08.58#ibcon#read 5, iclass 20, count 0 2006.229.14:46:08.58#ibcon#about to read 6, iclass 20, count 0 2006.229.14:46:08.58#ibcon#read 6, iclass 20, count 0 2006.229.14:46:08.58#ibcon#end of sib2, iclass 20, count 0 2006.229.14:46:08.58#ibcon#*after write, iclass 20, count 0 2006.229.14:46:08.58#ibcon#*before return 0, iclass 20, count 0 2006.229.14:46:08.58#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:08.58#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.14:46:08.58#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:46:08.58#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:46:08.58$vck44/vbbw=wide 2006.229.14:46:08.58#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:46:08.58#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:46:08.58#ibcon#ireg 8 cls_cnt 0 2006.229.14:46:08.58#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:46:08.65#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:46:08.65#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:46:08.65#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:46:08.65#ibcon#first serial, iclass 22, count 0 2006.229.14:46:08.65#ibcon#enter sib2, iclass 22, count 0 2006.229.14:46:08.65#ibcon#flushed, iclass 22, count 0 2006.229.14:46:08.65#ibcon#about to write, iclass 22, count 0 2006.229.14:46:08.65#ibcon#wrote, iclass 22, count 0 2006.229.14:46:08.65#ibcon#about to read 3, iclass 22, count 0 2006.229.14:46:08.67#ibcon#read 3, iclass 22, count 0 2006.229.14:46:08.67#ibcon#about to read 4, iclass 22, count 0 2006.229.14:46:08.67#ibcon#read 4, iclass 22, count 0 2006.229.14:46:08.67#ibcon#about to read 5, iclass 22, count 0 2006.229.14:46:08.67#ibcon#read 5, iclass 22, count 0 2006.229.14:46:08.67#ibcon#about to read 6, iclass 22, count 0 2006.229.14:46:08.67#ibcon#read 6, iclass 22, count 0 2006.229.14:46:08.67#ibcon#end of sib2, iclass 22, count 0 2006.229.14:46:08.67#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:46:08.67#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:46:08.67#ibcon#[27=BW32\r\n] 2006.229.14:46:08.67#ibcon#*before write, iclass 22, count 0 2006.229.14:46:08.67#ibcon#enter sib2, iclass 22, count 0 2006.229.14:46:08.67#ibcon#flushed, iclass 22, count 0 2006.229.14:46:08.67#ibcon#about to write, iclass 22, count 0 2006.229.14:46:08.67#ibcon#wrote, iclass 22, count 0 2006.229.14:46:08.67#ibcon#about to read 3, iclass 22, count 0 2006.229.14:46:08.70#ibcon#read 3, iclass 22, count 0 2006.229.14:46:08.70#ibcon#about to read 4, iclass 22, count 0 2006.229.14:46:08.70#ibcon#read 4, iclass 22, count 0 2006.229.14:46:08.70#ibcon#about to read 5, iclass 22, count 0 2006.229.14:46:08.70#ibcon#read 5, iclass 22, count 0 2006.229.14:46:08.70#ibcon#about to read 6, iclass 22, count 0 2006.229.14:46:08.70#ibcon#read 6, iclass 22, count 0 2006.229.14:46:08.70#ibcon#end of sib2, iclass 22, count 0 2006.229.14:46:08.70#ibcon#*after write, iclass 22, count 0 2006.229.14:46:08.70#ibcon#*before return 0, iclass 22, count 0 2006.229.14:46:08.70#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:46:08.70#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:46:08.70#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:46:08.70#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:46:08.70$setupk4/ifdk4 2006.229.14:46:08.70$ifdk4/lo= 2006.229.14:46:08.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:46:08.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:46:08.71$ifdk4/patch= 2006.229.14:46:08.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:46:08.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:46:08.71$setupk4/!*+20s 2006.229.14:46:12.50#abcon#<5=/07 0.7 2.4 27.431001002.1\r\n> 2006.229.14:46:12.52#abcon#{5=INTERFACE CLEAR} 2006.229.14:46:12.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:46:13.14#trakl#Source acquired 2006.229.14:46:14.14#flagr#flagr/antenna,acquired 2006.229.14:46:22.67#abcon#<5=/07 0.7 2.4 27.431001002.2\r\n> 2006.229.14:46:22.69#abcon#{5=INTERFACE CLEAR} 2006.229.14:46:22.75#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:46:23.22$setupk4/"tpicd 2006.229.14:46:23.22$setupk4/echo=off 2006.229.14:46:23.22$setupk4/xlog=off 2006.229.14:46:23.22:!2006.229.14:50:20 2006.229.14:50:20.00:preob 2006.229.14:50:21.14/onsource/TRACKING 2006.229.14:50:21.14:!2006.229.14:50:30 2006.229.14:50:30.00:"tape 2006.229.14:50:30.00:"st=record 2006.229.14:50:30.00:data_valid=on 2006.229.14:50:30.00:midob 2006.229.14:50:30.14/onsource/TRACKING 2006.229.14:50:30.14/wx/27.42,1002.1,100 2006.229.14:50:30.30/cable/+6.4132E-03 2006.229.14:50:31.39/va/01,08,usb,yes,36,39 2006.229.14:50:31.39/va/02,07,usb,yes,39,40 2006.229.14:50:31.39/va/03,06,usb,yes,48,51 2006.229.14:50:31.39/va/04,07,usb,yes,40,42 2006.229.14:50:31.39/va/05,04,usb,yes,36,37 2006.229.14:50:31.39/va/06,04,usb,yes,40,40 2006.229.14:50:31.39/va/07,05,usb,yes,36,37 2006.229.14:50:31.39/va/08,06,usb,yes,26,32 2006.229.14:50:31.62/valo/01,524.99,yes,locked 2006.229.14:50:31.62/valo/02,534.99,yes,locked 2006.229.14:50:31.62/valo/03,564.99,yes,locked 2006.229.14:50:31.62/valo/04,624.99,yes,locked 2006.229.14:50:31.62/valo/05,734.99,yes,locked 2006.229.14:50:31.62/valo/06,814.99,yes,locked 2006.229.14:50:31.62/valo/07,864.99,yes,locked 2006.229.14:50:31.62/valo/08,884.99,yes,locked 2006.229.14:50:32.71/vb/01,04,usb,yes,34,32 2006.229.14:50:32.71/vb/02,04,usb,yes,37,36 2006.229.14:50:32.71/vb/03,04,usb,yes,33,37 2006.229.14:50:32.71/vb/04,04,usb,yes,38,37 2006.229.14:50:32.71/vb/05,04,usb,yes,30,33 2006.229.14:50:32.71/vb/06,04,usb,yes,35,31 2006.229.14:50:32.71/vb/07,04,usb,yes,35,35 2006.229.14:50:32.71/vb/08,04,usb,yes,32,36 2006.229.14:50:32.95/vblo/01,629.99,yes,locked 2006.229.14:50:32.95/vblo/02,634.99,yes,locked 2006.229.14:50:32.95/vblo/03,649.99,yes,locked 2006.229.14:50:32.95/vblo/04,679.99,yes,locked 2006.229.14:50:32.95/vblo/05,709.99,yes,locked 2006.229.14:50:32.95/vblo/06,719.99,yes,locked 2006.229.14:50:32.95/vblo/07,734.99,yes,locked 2006.229.14:50:32.95/vblo/08,744.99,yes,locked 2006.229.14:50:33.10/vabw/8 2006.229.14:50:33.25/vbbw/8 2006.229.14:50:33.34/xfe/off,on,12.0 2006.229.14:50:33.72/ifatt/23,28,28,28 2006.229.14:50:34.07/fmout-gps/S +4.54E-07 2006.229.14:50:34.11:!2006.229.14:51:10 2006.229.14:51:10.00:data_valid=off 2006.229.14:51:10.00:"et 2006.229.14:51:10.00:!+3s 2006.229.14:51:13.01:"tape 2006.229.14:51:13.01:postob 2006.229.14:51:13.17/cable/+6.4116E-03 2006.229.14:51:13.17/wx/27.42,1002.2,100 2006.229.14:51:14.07/fmout-gps/S +4.54E-07 2006.229.14:51:14.07:scan_name=229-1456,jd0608,40 2006.229.14:51:14.07:source=1741-038,174358.86,-035004.6,2000.0,cw 2006.229.14:51:15.13#flagr#flagr/antenna,new-source 2006.229.14:51:15.13:checkk5 2006.229.14:51:15.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:51:15.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:51:16.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:51:16.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:51:17.10/chk_obsdata//k5ts1/T2291450??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:51:17.51/chk_obsdata//k5ts2/T2291450??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:51:17.92/chk_obsdata//k5ts3/T2291450??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:51:18.32/chk_obsdata//k5ts4/T2291450??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.14:51:19.05/k5log//k5ts1_log_newline 2006.229.14:51:19.76/k5log//k5ts2_log_newline 2006.229.14:51:20.48/k5log//k5ts3_log_newline 2006.229.14:51:21.17/k5log//k5ts4_log_newline 2006.229.14:51:21.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:51:21.20:setupk4=1 2006.229.14:51:21.20$setupk4/echo=on 2006.229.14:51:21.20$setupk4/pcalon 2006.229.14:51:21.20$pcalon/"no phase cal control is implemented here 2006.229.14:51:21.20$setupk4/"tpicd=stop 2006.229.14:51:21.20$setupk4/"rec=synch_on 2006.229.14:51:21.20$setupk4/"rec_mode=128 2006.229.14:51:21.20$setupk4/!* 2006.229.14:51:21.20$setupk4/recpk4 2006.229.14:51:21.20$recpk4/recpatch= 2006.229.14:51:21.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:51:21.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:51:21.21$setupk4/vck44 2006.229.14:51:21.21$vck44/valo=1,524.99 2006.229.14:51:21.21#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.14:51:21.21#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.14:51:21.21#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:21.21#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:21.21#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:21.21#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:21.21#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:51:21.21#ibcon#first serial, iclass 5, count 0 2006.229.14:51:21.21#ibcon#enter sib2, iclass 5, count 0 2006.229.14:51:21.21#ibcon#flushed, iclass 5, count 0 2006.229.14:51:21.21#ibcon#about to write, iclass 5, count 0 2006.229.14:51:21.21#ibcon#wrote, iclass 5, count 0 2006.229.14:51:21.21#ibcon#about to read 3, iclass 5, count 0 2006.229.14:51:21.22#ibcon#read 3, iclass 5, count 0 2006.229.14:51:21.22#ibcon#about to read 4, iclass 5, count 0 2006.229.14:51:21.22#ibcon#read 4, iclass 5, count 0 2006.229.14:51:21.22#ibcon#about to read 5, iclass 5, count 0 2006.229.14:51:21.22#ibcon#read 5, iclass 5, count 0 2006.229.14:51:21.22#ibcon#about to read 6, iclass 5, count 0 2006.229.14:51:21.22#ibcon#read 6, iclass 5, count 0 2006.229.14:51:21.22#ibcon#end of sib2, iclass 5, count 0 2006.229.14:51:21.22#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:51:21.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:51:21.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:51:21.22#ibcon#*before write, iclass 5, count 0 2006.229.14:51:21.22#ibcon#enter sib2, iclass 5, count 0 2006.229.14:51:21.22#ibcon#flushed, iclass 5, count 0 2006.229.14:51:21.22#ibcon#about to write, iclass 5, count 0 2006.229.14:51:21.22#ibcon#wrote, iclass 5, count 0 2006.229.14:51:21.22#ibcon#about to read 3, iclass 5, count 0 2006.229.14:51:21.27#ibcon#read 3, iclass 5, count 0 2006.229.14:51:21.27#ibcon#about to read 4, iclass 5, count 0 2006.229.14:51:21.27#ibcon#read 4, iclass 5, count 0 2006.229.14:51:21.27#ibcon#about to read 5, iclass 5, count 0 2006.229.14:51:21.27#ibcon#read 5, iclass 5, count 0 2006.229.14:51:21.27#ibcon#about to read 6, iclass 5, count 0 2006.229.14:51:21.27#ibcon#read 6, iclass 5, count 0 2006.229.14:51:21.27#ibcon#end of sib2, iclass 5, count 0 2006.229.14:51:21.27#ibcon#*after write, iclass 5, count 0 2006.229.14:51:21.27#ibcon#*before return 0, iclass 5, count 0 2006.229.14:51:21.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:21.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:21.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:51:21.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:51:21.27$vck44/va=1,8 2006.229.14:51:21.27#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.14:51:21.27#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.14:51:21.27#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:21.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:21.27#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:21.27#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:21.27#ibcon#enter wrdev, iclass 7, count 2 2006.229.14:51:21.27#ibcon#first serial, iclass 7, count 2 2006.229.14:51:21.27#ibcon#enter sib2, iclass 7, count 2 2006.229.14:51:21.27#ibcon#flushed, iclass 7, count 2 2006.229.14:51:21.27#ibcon#about to write, iclass 7, count 2 2006.229.14:51:21.27#ibcon#wrote, iclass 7, count 2 2006.229.14:51:21.27#ibcon#about to read 3, iclass 7, count 2 2006.229.14:51:21.29#ibcon#read 3, iclass 7, count 2 2006.229.14:51:21.29#ibcon#about to read 4, iclass 7, count 2 2006.229.14:51:21.29#ibcon#read 4, iclass 7, count 2 2006.229.14:51:21.29#ibcon#about to read 5, iclass 7, count 2 2006.229.14:51:21.29#ibcon#read 5, iclass 7, count 2 2006.229.14:51:21.29#ibcon#about to read 6, iclass 7, count 2 2006.229.14:51:21.29#ibcon#read 6, iclass 7, count 2 2006.229.14:51:21.29#ibcon#end of sib2, iclass 7, count 2 2006.229.14:51:21.29#ibcon#*mode == 0, iclass 7, count 2 2006.229.14:51:21.29#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.14:51:21.29#ibcon#[25=AT01-08\r\n] 2006.229.14:51:21.29#ibcon#*before write, iclass 7, count 2 2006.229.14:51:21.29#ibcon#enter sib2, iclass 7, count 2 2006.229.14:51:21.29#ibcon#flushed, iclass 7, count 2 2006.229.14:51:21.29#ibcon#about to write, iclass 7, count 2 2006.229.14:51:21.29#ibcon#wrote, iclass 7, count 2 2006.229.14:51:21.29#ibcon#about to read 3, iclass 7, count 2 2006.229.14:51:21.32#ibcon#read 3, iclass 7, count 2 2006.229.14:51:21.32#ibcon#about to read 4, iclass 7, count 2 2006.229.14:51:21.32#ibcon#read 4, iclass 7, count 2 2006.229.14:51:21.32#ibcon#about to read 5, iclass 7, count 2 2006.229.14:51:21.32#ibcon#read 5, iclass 7, count 2 2006.229.14:51:21.32#ibcon#about to read 6, iclass 7, count 2 2006.229.14:51:21.32#ibcon#read 6, iclass 7, count 2 2006.229.14:51:21.32#ibcon#end of sib2, iclass 7, count 2 2006.229.14:51:21.32#ibcon#*after write, iclass 7, count 2 2006.229.14:51:21.32#ibcon#*before return 0, iclass 7, count 2 2006.229.14:51:21.32#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:21.32#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:21.32#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.14:51:21.32#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:21.32#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:21.44#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:21.44#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:21.44#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:51:21.44#ibcon#first serial, iclass 7, count 0 2006.229.14:51:21.44#ibcon#enter sib2, iclass 7, count 0 2006.229.14:51:21.44#ibcon#flushed, iclass 7, count 0 2006.229.14:51:21.44#ibcon#about to write, iclass 7, count 0 2006.229.14:51:21.44#ibcon#wrote, iclass 7, count 0 2006.229.14:51:21.44#ibcon#about to read 3, iclass 7, count 0 2006.229.14:51:21.46#ibcon#read 3, iclass 7, count 0 2006.229.14:51:21.46#ibcon#about to read 4, iclass 7, count 0 2006.229.14:51:21.46#ibcon#read 4, iclass 7, count 0 2006.229.14:51:21.46#ibcon#about to read 5, iclass 7, count 0 2006.229.14:51:21.46#ibcon#read 5, iclass 7, count 0 2006.229.14:51:21.46#ibcon#about to read 6, iclass 7, count 0 2006.229.14:51:21.46#ibcon#read 6, iclass 7, count 0 2006.229.14:51:21.46#ibcon#end of sib2, iclass 7, count 0 2006.229.14:51:21.46#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:51:21.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:51:21.46#ibcon#[25=USB\r\n] 2006.229.14:51:21.46#ibcon#*before write, iclass 7, count 0 2006.229.14:51:21.46#ibcon#enter sib2, iclass 7, count 0 2006.229.14:51:21.46#ibcon#flushed, iclass 7, count 0 2006.229.14:51:21.46#ibcon#about to write, iclass 7, count 0 2006.229.14:51:21.46#ibcon#wrote, iclass 7, count 0 2006.229.14:51:21.46#ibcon#about to read 3, iclass 7, count 0 2006.229.14:51:21.49#ibcon#read 3, iclass 7, count 0 2006.229.14:51:21.49#ibcon#about to read 4, iclass 7, count 0 2006.229.14:51:21.49#ibcon#read 4, iclass 7, count 0 2006.229.14:51:21.49#ibcon#about to read 5, iclass 7, count 0 2006.229.14:51:21.49#ibcon#read 5, iclass 7, count 0 2006.229.14:51:21.49#ibcon#about to read 6, iclass 7, count 0 2006.229.14:51:21.49#ibcon#read 6, iclass 7, count 0 2006.229.14:51:21.49#ibcon#end of sib2, iclass 7, count 0 2006.229.14:51:21.49#ibcon#*after write, iclass 7, count 0 2006.229.14:51:21.49#ibcon#*before return 0, iclass 7, count 0 2006.229.14:51:21.49#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:21.49#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:21.49#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:51:21.49#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:51:21.49$vck44/valo=2,534.99 2006.229.14:51:21.49#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.14:51:21.49#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.14:51:21.49#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:21.49#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:21.49#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:21.49#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:21.49#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:51:21.49#ibcon#first serial, iclass 11, count 0 2006.229.14:51:21.49#ibcon#enter sib2, iclass 11, count 0 2006.229.14:51:21.49#ibcon#flushed, iclass 11, count 0 2006.229.14:51:21.49#ibcon#about to write, iclass 11, count 0 2006.229.14:51:21.49#ibcon#wrote, iclass 11, count 0 2006.229.14:51:21.49#ibcon#about to read 3, iclass 11, count 0 2006.229.14:51:21.51#ibcon#read 3, iclass 11, count 0 2006.229.14:51:21.51#ibcon#about to read 4, iclass 11, count 0 2006.229.14:51:21.51#ibcon#read 4, iclass 11, count 0 2006.229.14:51:21.51#ibcon#about to read 5, iclass 11, count 0 2006.229.14:51:21.51#ibcon#read 5, iclass 11, count 0 2006.229.14:51:21.51#ibcon#about to read 6, iclass 11, count 0 2006.229.14:51:21.51#ibcon#read 6, iclass 11, count 0 2006.229.14:51:21.51#ibcon#end of sib2, iclass 11, count 0 2006.229.14:51:21.51#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:51:21.51#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:51:21.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:51:21.51#ibcon#*before write, iclass 11, count 0 2006.229.14:51:21.51#ibcon#enter sib2, iclass 11, count 0 2006.229.14:51:21.51#ibcon#flushed, iclass 11, count 0 2006.229.14:51:21.51#ibcon#about to write, iclass 11, count 0 2006.229.14:51:21.51#ibcon#wrote, iclass 11, count 0 2006.229.14:51:21.51#ibcon#about to read 3, iclass 11, count 0 2006.229.14:51:21.55#ibcon#read 3, iclass 11, count 0 2006.229.14:51:21.55#ibcon#about to read 4, iclass 11, count 0 2006.229.14:51:21.55#ibcon#read 4, iclass 11, count 0 2006.229.14:51:21.55#ibcon#about to read 5, iclass 11, count 0 2006.229.14:51:21.55#ibcon#read 5, iclass 11, count 0 2006.229.14:51:21.55#ibcon#about to read 6, iclass 11, count 0 2006.229.14:51:21.55#ibcon#read 6, iclass 11, count 0 2006.229.14:51:21.55#ibcon#end of sib2, iclass 11, count 0 2006.229.14:51:21.55#ibcon#*after write, iclass 11, count 0 2006.229.14:51:21.55#ibcon#*before return 0, iclass 11, count 0 2006.229.14:51:21.55#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:21.55#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:21.55#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:51:21.55#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:51:21.55$vck44/va=2,7 2006.229.14:51:21.55#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.14:51:21.55#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.14:51:21.55#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:21.55#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:21.61#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:21.61#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:21.61#ibcon#enter wrdev, iclass 13, count 2 2006.229.14:51:21.61#ibcon#first serial, iclass 13, count 2 2006.229.14:51:21.61#ibcon#enter sib2, iclass 13, count 2 2006.229.14:51:21.61#ibcon#flushed, iclass 13, count 2 2006.229.14:51:21.61#ibcon#about to write, iclass 13, count 2 2006.229.14:51:21.61#ibcon#wrote, iclass 13, count 2 2006.229.14:51:21.61#ibcon#about to read 3, iclass 13, count 2 2006.229.14:51:21.63#ibcon#read 3, iclass 13, count 2 2006.229.14:51:21.63#ibcon#about to read 4, iclass 13, count 2 2006.229.14:51:21.63#ibcon#read 4, iclass 13, count 2 2006.229.14:51:21.63#ibcon#about to read 5, iclass 13, count 2 2006.229.14:51:21.63#ibcon#read 5, iclass 13, count 2 2006.229.14:51:21.63#ibcon#about to read 6, iclass 13, count 2 2006.229.14:51:21.63#ibcon#read 6, iclass 13, count 2 2006.229.14:51:21.63#ibcon#end of sib2, iclass 13, count 2 2006.229.14:51:21.63#ibcon#*mode == 0, iclass 13, count 2 2006.229.14:51:21.63#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.14:51:21.63#ibcon#[25=AT02-07\r\n] 2006.229.14:51:21.63#ibcon#*before write, iclass 13, count 2 2006.229.14:51:21.63#ibcon#enter sib2, iclass 13, count 2 2006.229.14:51:21.63#ibcon#flushed, iclass 13, count 2 2006.229.14:51:21.63#ibcon#about to write, iclass 13, count 2 2006.229.14:51:21.63#ibcon#wrote, iclass 13, count 2 2006.229.14:51:21.63#ibcon#about to read 3, iclass 13, count 2 2006.229.14:51:21.66#ibcon#read 3, iclass 13, count 2 2006.229.14:51:21.66#ibcon#about to read 4, iclass 13, count 2 2006.229.14:51:21.66#ibcon#read 4, iclass 13, count 2 2006.229.14:51:21.66#ibcon#about to read 5, iclass 13, count 2 2006.229.14:51:21.66#ibcon#read 5, iclass 13, count 2 2006.229.14:51:21.66#ibcon#about to read 6, iclass 13, count 2 2006.229.14:51:21.66#ibcon#read 6, iclass 13, count 2 2006.229.14:51:21.66#ibcon#end of sib2, iclass 13, count 2 2006.229.14:51:21.66#ibcon#*after write, iclass 13, count 2 2006.229.14:51:21.66#ibcon#*before return 0, iclass 13, count 2 2006.229.14:51:21.66#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:21.66#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:21.66#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.14:51:21.66#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:21.66#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:21.78#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:21.78#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:21.78#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:51:21.78#ibcon#first serial, iclass 13, count 0 2006.229.14:51:21.78#ibcon#enter sib2, iclass 13, count 0 2006.229.14:51:21.78#ibcon#flushed, iclass 13, count 0 2006.229.14:51:21.78#ibcon#about to write, iclass 13, count 0 2006.229.14:51:21.78#ibcon#wrote, iclass 13, count 0 2006.229.14:51:21.78#ibcon#about to read 3, iclass 13, count 0 2006.229.14:51:21.80#ibcon#read 3, iclass 13, count 0 2006.229.14:51:21.80#ibcon#about to read 4, iclass 13, count 0 2006.229.14:51:21.80#ibcon#read 4, iclass 13, count 0 2006.229.14:51:21.80#ibcon#about to read 5, iclass 13, count 0 2006.229.14:51:21.80#ibcon#read 5, iclass 13, count 0 2006.229.14:51:21.80#ibcon#about to read 6, iclass 13, count 0 2006.229.14:51:21.80#ibcon#read 6, iclass 13, count 0 2006.229.14:51:21.80#ibcon#end of sib2, iclass 13, count 0 2006.229.14:51:21.80#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:51:21.80#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:51:21.80#ibcon#[25=USB\r\n] 2006.229.14:51:21.80#ibcon#*before write, iclass 13, count 0 2006.229.14:51:21.80#ibcon#enter sib2, iclass 13, count 0 2006.229.14:51:21.80#ibcon#flushed, iclass 13, count 0 2006.229.14:51:21.80#ibcon#about to write, iclass 13, count 0 2006.229.14:51:21.80#ibcon#wrote, iclass 13, count 0 2006.229.14:51:21.80#ibcon#about to read 3, iclass 13, count 0 2006.229.14:51:21.83#ibcon#read 3, iclass 13, count 0 2006.229.14:51:21.83#ibcon#about to read 4, iclass 13, count 0 2006.229.14:51:21.83#ibcon#read 4, iclass 13, count 0 2006.229.14:51:21.83#ibcon#about to read 5, iclass 13, count 0 2006.229.14:51:21.83#ibcon#read 5, iclass 13, count 0 2006.229.14:51:21.83#ibcon#about to read 6, iclass 13, count 0 2006.229.14:51:21.83#ibcon#read 6, iclass 13, count 0 2006.229.14:51:21.83#ibcon#end of sib2, iclass 13, count 0 2006.229.14:51:21.83#ibcon#*after write, iclass 13, count 0 2006.229.14:51:21.83#ibcon#*before return 0, iclass 13, count 0 2006.229.14:51:21.83#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:21.83#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:21.83#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:51:21.83#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:51:21.83$vck44/valo=3,564.99 2006.229.14:51:21.83#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.14:51:21.83#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.14:51:21.83#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:21.83#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:21.83#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:21.83#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:21.83#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:51:21.83#ibcon#first serial, iclass 15, count 0 2006.229.14:51:21.83#ibcon#enter sib2, iclass 15, count 0 2006.229.14:51:21.83#ibcon#flushed, iclass 15, count 0 2006.229.14:51:21.83#ibcon#about to write, iclass 15, count 0 2006.229.14:51:21.83#ibcon#wrote, iclass 15, count 0 2006.229.14:51:21.83#ibcon#about to read 3, iclass 15, count 0 2006.229.14:51:21.85#ibcon#read 3, iclass 15, count 0 2006.229.14:51:21.85#ibcon#about to read 4, iclass 15, count 0 2006.229.14:51:21.85#ibcon#read 4, iclass 15, count 0 2006.229.14:51:21.85#ibcon#about to read 5, iclass 15, count 0 2006.229.14:51:21.85#ibcon#read 5, iclass 15, count 0 2006.229.14:51:21.85#ibcon#about to read 6, iclass 15, count 0 2006.229.14:51:21.85#ibcon#read 6, iclass 15, count 0 2006.229.14:51:21.85#ibcon#end of sib2, iclass 15, count 0 2006.229.14:51:21.85#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:51:21.85#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:51:21.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:51:21.85#ibcon#*before write, iclass 15, count 0 2006.229.14:51:21.85#ibcon#enter sib2, iclass 15, count 0 2006.229.14:51:21.85#ibcon#flushed, iclass 15, count 0 2006.229.14:51:21.85#ibcon#about to write, iclass 15, count 0 2006.229.14:51:21.85#ibcon#wrote, iclass 15, count 0 2006.229.14:51:21.85#ibcon#about to read 3, iclass 15, count 0 2006.229.14:51:21.89#ibcon#read 3, iclass 15, count 0 2006.229.14:51:21.89#ibcon#about to read 4, iclass 15, count 0 2006.229.14:51:21.89#ibcon#read 4, iclass 15, count 0 2006.229.14:51:21.89#ibcon#about to read 5, iclass 15, count 0 2006.229.14:51:21.89#ibcon#read 5, iclass 15, count 0 2006.229.14:51:21.89#ibcon#about to read 6, iclass 15, count 0 2006.229.14:51:21.89#ibcon#read 6, iclass 15, count 0 2006.229.14:51:21.89#ibcon#end of sib2, iclass 15, count 0 2006.229.14:51:21.89#ibcon#*after write, iclass 15, count 0 2006.229.14:51:21.89#ibcon#*before return 0, iclass 15, count 0 2006.229.14:51:21.89#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:21.89#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:21.89#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:51:21.89#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:51:21.89$vck44/va=3,6 2006.229.14:51:21.89#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.14:51:21.89#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.14:51:21.89#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:21.89#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:21.95#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:21.95#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:21.95#ibcon#enter wrdev, iclass 17, count 2 2006.229.14:51:21.95#ibcon#first serial, iclass 17, count 2 2006.229.14:51:21.95#ibcon#enter sib2, iclass 17, count 2 2006.229.14:51:21.95#ibcon#flushed, iclass 17, count 2 2006.229.14:51:21.95#ibcon#about to write, iclass 17, count 2 2006.229.14:51:21.95#ibcon#wrote, iclass 17, count 2 2006.229.14:51:21.95#ibcon#about to read 3, iclass 17, count 2 2006.229.14:51:21.97#ibcon#read 3, iclass 17, count 2 2006.229.14:51:21.97#ibcon#about to read 4, iclass 17, count 2 2006.229.14:51:21.97#ibcon#read 4, iclass 17, count 2 2006.229.14:51:21.97#ibcon#about to read 5, iclass 17, count 2 2006.229.14:51:21.97#ibcon#read 5, iclass 17, count 2 2006.229.14:51:21.97#ibcon#about to read 6, iclass 17, count 2 2006.229.14:51:21.97#ibcon#read 6, iclass 17, count 2 2006.229.14:51:21.97#ibcon#end of sib2, iclass 17, count 2 2006.229.14:51:21.97#ibcon#*mode == 0, iclass 17, count 2 2006.229.14:51:21.97#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.14:51:21.97#ibcon#[25=AT03-06\r\n] 2006.229.14:51:21.97#ibcon#*before write, iclass 17, count 2 2006.229.14:51:21.97#ibcon#enter sib2, iclass 17, count 2 2006.229.14:51:21.97#ibcon#flushed, iclass 17, count 2 2006.229.14:51:21.97#ibcon#about to write, iclass 17, count 2 2006.229.14:51:21.97#ibcon#wrote, iclass 17, count 2 2006.229.14:51:21.97#ibcon#about to read 3, iclass 17, count 2 2006.229.14:51:22.00#ibcon#read 3, iclass 17, count 2 2006.229.14:51:22.00#ibcon#about to read 4, iclass 17, count 2 2006.229.14:51:22.00#ibcon#read 4, iclass 17, count 2 2006.229.14:51:22.00#ibcon#about to read 5, iclass 17, count 2 2006.229.14:51:22.00#ibcon#read 5, iclass 17, count 2 2006.229.14:51:22.00#ibcon#about to read 6, iclass 17, count 2 2006.229.14:51:22.00#ibcon#read 6, iclass 17, count 2 2006.229.14:51:22.00#ibcon#end of sib2, iclass 17, count 2 2006.229.14:51:22.00#ibcon#*after write, iclass 17, count 2 2006.229.14:51:22.00#ibcon#*before return 0, iclass 17, count 2 2006.229.14:51:22.00#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:22.00#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:22.00#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.14:51:22.00#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:22.00#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:22.12#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:22.12#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:22.12#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:51:22.12#ibcon#first serial, iclass 17, count 0 2006.229.14:51:22.12#ibcon#enter sib2, iclass 17, count 0 2006.229.14:51:22.12#ibcon#flushed, iclass 17, count 0 2006.229.14:51:22.12#ibcon#about to write, iclass 17, count 0 2006.229.14:51:22.12#ibcon#wrote, iclass 17, count 0 2006.229.14:51:22.12#ibcon#about to read 3, iclass 17, count 0 2006.229.14:51:22.14#ibcon#read 3, iclass 17, count 0 2006.229.14:51:22.14#ibcon#about to read 4, iclass 17, count 0 2006.229.14:51:22.14#ibcon#read 4, iclass 17, count 0 2006.229.14:51:22.14#ibcon#about to read 5, iclass 17, count 0 2006.229.14:51:22.14#ibcon#read 5, iclass 17, count 0 2006.229.14:51:22.14#ibcon#about to read 6, iclass 17, count 0 2006.229.14:51:22.14#ibcon#read 6, iclass 17, count 0 2006.229.14:51:22.14#ibcon#end of sib2, iclass 17, count 0 2006.229.14:51:22.14#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:51:22.14#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:51:22.14#ibcon#[25=USB\r\n] 2006.229.14:51:22.14#ibcon#*before write, iclass 17, count 0 2006.229.14:51:22.14#ibcon#enter sib2, iclass 17, count 0 2006.229.14:51:22.14#ibcon#flushed, iclass 17, count 0 2006.229.14:51:22.14#ibcon#about to write, iclass 17, count 0 2006.229.14:51:22.14#ibcon#wrote, iclass 17, count 0 2006.229.14:51:22.14#ibcon#about to read 3, iclass 17, count 0 2006.229.14:51:22.17#ibcon#read 3, iclass 17, count 0 2006.229.14:51:22.17#ibcon#about to read 4, iclass 17, count 0 2006.229.14:51:22.17#ibcon#read 4, iclass 17, count 0 2006.229.14:51:22.17#ibcon#about to read 5, iclass 17, count 0 2006.229.14:51:22.17#ibcon#read 5, iclass 17, count 0 2006.229.14:51:22.17#ibcon#about to read 6, iclass 17, count 0 2006.229.14:51:22.17#ibcon#read 6, iclass 17, count 0 2006.229.14:51:22.17#ibcon#end of sib2, iclass 17, count 0 2006.229.14:51:22.17#ibcon#*after write, iclass 17, count 0 2006.229.14:51:22.17#ibcon#*before return 0, iclass 17, count 0 2006.229.14:51:22.17#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:22.17#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:22.17#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:51:22.17#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:51:22.17$vck44/valo=4,624.99 2006.229.14:51:22.17#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.14:51:22.17#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.14:51:22.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:22.17#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:22.17#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:22.17#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:22.17#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:51:22.17#ibcon#first serial, iclass 19, count 0 2006.229.14:51:22.17#ibcon#enter sib2, iclass 19, count 0 2006.229.14:51:22.17#ibcon#flushed, iclass 19, count 0 2006.229.14:51:22.17#ibcon#about to write, iclass 19, count 0 2006.229.14:51:22.17#ibcon#wrote, iclass 19, count 0 2006.229.14:51:22.17#ibcon#about to read 3, iclass 19, count 0 2006.229.14:51:22.19#ibcon#read 3, iclass 19, count 0 2006.229.14:51:22.19#ibcon#about to read 4, iclass 19, count 0 2006.229.14:51:22.19#ibcon#read 4, iclass 19, count 0 2006.229.14:51:22.19#ibcon#about to read 5, iclass 19, count 0 2006.229.14:51:22.19#ibcon#read 5, iclass 19, count 0 2006.229.14:51:22.19#ibcon#about to read 6, iclass 19, count 0 2006.229.14:51:22.19#ibcon#read 6, iclass 19, count 0 2006.229.14:51:22.19#ibcon#end of sib2, iclass 19, count 0 2006.229.14:51:22.19#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:51:22.19#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:51:22.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:51:22.19#ibcon#*before write, iclass 19, count 0 2006.229.14:51:22.19#ibcon#enter sib2, iclass 19, count 0 2006.229.14:51:22.19#ibcon#flushed, iclass 19, count 0 2006.229.14:51:22.19#ibcon#about to write, iclass 19, count 0 2006.229.14:51:22.19#ibcon#wrote, iclass 19, count 0 2006.229.14:51:22.19#ibcon#about to read 3, iclass 19, count 0 2006.229.14:51:22.23#ibcon#read 3, iclass 19, count 0 2006.229.14:51:22.23#ibcon#about to read 4, iclass 19, count 0 2006.229.14:51:22.23#ibcon#read 4, iclass 19, count 0 2006.229.14:51:22.23#ibcon#about to read 5, iclass 19, count 0 2006.229.14:51:22.23#ibcon#read 5, iclass 19, count 0 2006.229.14:51:22.23#ibcon#about to read 6, iclass 19, count 0 2006.229.14:51:22.23#ibcon#read 6, iclass 19, count 0 2006.229.14:51:22.23#ibcon#end of sib2, iclass 19, count 0 2006.229.14:51:22.23#ibcon#*after write, iclass 19, count 0 2006.229.14:51:22.23#ibcon#*before return 0, iclass 19, count 0 2006.229.14:51:22.23#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:22.23#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:22.23#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:51:22.23#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:51:22.23$vck44/va=4,7 2006.229.14:51:22.23#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.14:51:22.23#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.14:51:22.23#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:22.23#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:22.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:22.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:22.29#ibcon#enter wrdev, iclass 21, count 2 2006.229.14:51:22.29#ibcon#first serial, iclass 21, count 2 2006.229.14:51:22.29#ibcon#enter sib2, iclass 21, count 2 2006.229.14:51:22.29#ibcon#flushed, iclass 21, count 2 2006.229.14:51:22.29#ibcon#about to write, iclass 21, count 2 2006.229.14:51:22.29#ibcon#wrote, iclass 21, count 2 2006.229.14:51:22.29#ibcon#about to read 3, iclass 21, count 2 2006.229.14:51:22.31#ibcon#read 3, iclass 21, count 2 2006.229.14:51:22.31#ibcon#about to read 4, iclass 21, count 2 2006.229.14:51:22.31#ibcon#read 4, iclass 21, count 2 2006.229.14:51:22.31#ibcon#about to read 5, iclass 21, count 2 2006.229.14:51:22.31#ibcon#read 5, iclass 21, count 2 2006.229.14:51:22.31#ibcon#about to read 6, iclass 21, count 2 2006.229.14:51:22.31#ibcon#read 6, iclass 21, count 2 2006.229.14:51:22.31#ibcon#end of sib2, iclass 21, count 2 2006.229.14:51:22.31#ibcon#*mode == 0, iclass 21, count 2 2006.229.14:51:22.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.14:51:22.31#ibcon#[25=AT04-07\r\n] 2006.229.14:51:22.31#ibcon#*before write, iclass 21, count 2 2006.229.14:51:22.31#ibcon#enter sib2, iclass 21, count 2 2006.229.14:51:22.31#ibcon#flushed, iclass 21, count 2 2006.229.14:51:22.31#ibcon#about to write, iclass 21, count 2 2006.229.14:51:22.31#ibcon#wrote, iclass 21, count 2 2006.229.14:51:22.31#ibcon#about to read 3, iclass 21, count 2 2006.229.14:51:22.34#ibcon#read 3, iclass 21, count 2 2006.229.14:51:22.34#ibcon#about to read 4, iclass 21, count 2 2006.229.14:51:22.34#ibcon#read 4, iclass 21, count 2 2006.229.14:51:22.34#ibcon#about to read 5, iclass 21, count 2 2006.229.14:51:22.34#ibcon#read 5, iclass 21, count 2 2006.229.14:51:22.34#ibcon#about to read 6, iclass 21, count 2 2006.229.14:51:22.34#ibcon#read 6, iclass 21, count 2 2006.229.14:51:22.34#ibcon#end of sib2, iclass 21, count 2 2006.229.14:51:22.34#ibcon#*after write, iclass 21, count 2 2006.229.14:51:22.34#ibcon#*before return 0, iclass 21, count 2 2006.229.14:51:22.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:22.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:22.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.14:51:22.34#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:22.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:22.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:22.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:22.46#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:51:22.46#ibcon#first serial, iclass 21, count 0 2006.229.14:51:22.46#ibcon#enter sib2, iclass 21, count 0 2006.229.14:51:22.46#ibcon#flushed, iclass 21, count 0 2006.229.14:51:22.46#ibcon#about to write, iclass 21, count 0 2006.229.14:51:22.46#ibcon#wrote, iclass 21, count 0 2006.229.14:51:22.46#ibcon#about to read 3, iclass 21, count 0 2006.229.14:51:22.48#ibcon#read 3, iclass 21, count 0 2006.229.14:51:22.48#ibcon#about to read 4, iclass 21, count 0 2006.229.14:51:22.48#ibcon#read 4, iclass 21, count 0 2006.229.14:51:22.48#ibcon#about to read 5, iclass 21, count 0 2006.229.14:51:22.48#ibcon#read 5, iclass 21, count 0 2006.229.14:51:22.48#ibcon#about to read 6, iclass 21, count 0 2006.229.14:51:22.48#ibcon#read 6, iclass 21, count 0 2006.229.14:51:22.48#ibcon#end of sib2, iclass 21, count 0 2006.229.14:51:22.48#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:51:22.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:51:22.48#ibcon#[25=USB\r\n] 2006.229.14:51:22.48#ibcon#*before write, iclass 21, count 0 2006.229.14:51:22.48#ibcon#enter sib2, iclass 21, count 0 2006.229.14:51:22.48#ibcon#flushed, iclass 21, count 0 2006.229.14:51:22.48#ibcon#about to write, iclass 21, count 0 2006.229.14:51:22.48#ibcon#wrote, iclass 21, count 0 2006.229.14:51:22.48#ibcon#about to read 3, iclass 21, count 0 2006.229.14:51:22.51#ibcon#read 3, iclass 21, count 0 2006.229.14:51:22.51#ibcon#about to read 4, iclass 21, count 0 2006.229.14:51:22.51#ibcon#read 4, iclass 21, count 0 2006.229.14:51:22.51#ibcon#about to read 5, iclass 21, count 0 2006.229.14:51:22.51#ibcon#read 5, iclass 21, count 0 2006.229.14:51:22.51#ibcon#about to read 6, iclass 21, count 0 2006.229.14:51:22.51#ibcon#read 6, iclass 21, count 0 2006.229.14:51:22.51#ibcon#end of sib2, iclass 21, count 0 2006.229.14:51:22.51#ibcon#*after write, iclass 21, count 0 2006.229.14:51:22.51#ibcon#*before return 0, iclass 21, count 0 2006.229.14:51:22.51#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:22.51#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:22.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:51:22.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:51:22.51$vck44/valo=5,734.99 2006.229.14:51:22.51#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.14:51:22.51#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.14:51:22.51#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:22.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:22.51#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:22.51#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:22.51#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:51:22.51#ibcon#first serial, iclass 23, count 0 2006.229.14:51:22.51#ibcon#enter sib2, iclass 23, count 0 2006.229.14:51:22.51#ibcon#flushed, iclass 23, count 0 2006.229.14:51:22.51#ibcon#about to write, iclass 23, count 0 2006.229.14:51:22.51#ibcon#wrote, iclass 23, count 0 2006.229.14:51:22.51#ibcon#about to read 3, iclass 23, count 0 2006.229.14:51:22.53#ibcon#read 3, iclass 23, count 0 2006.229.14:51:22.53#ibcon#about to read 4, iclass 23, count 0 2006.229.14:51:22.53#ibcon#read 4, iclass 23, count 0 2006.229.14:51:22.53#ibcon#about to read 5, iclass 23, count 0 2006.229.14:51:22.53#ibcon#read 5, iclass 23, count 0 2006.229.14:51:22.53#ibcon#about to read 6, iclass 23, count 0 2006.229.14:51:22.53#ibcon#read 6, iclass 23, count 0 2006.229.14:51:22.53#ibcon#end of sib2, iclass 23, count 0 2006.229.14:51:22.53#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:51:22.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:51:22.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:51:22.53#ibcon#*before write, iclass 23, count 0 2006.229.14:51:22.53#ibcon#enter sib2, iclass 23, count 0 2006.229.14:51:22.53#ibcon#flushed, iclass 23, count 0 2006.229.14:51:22.53#ibcon#about to write, iclass 23, count 0 2006.229.14:51:22.53#ibcon#wrote, iclass 23, count 0 2006.229.14:51:22.53#ibcon#about to read 3, iclass 23, count 0 2006.229.14:51:22.57#ibcon#read 3, iclass 23, count 0 2006.229.14:51:22.57#ibcon#about to read 4, iclass 23, count 0 2006.229.14:51:22.57#ibcon#read 4, iclass 23, count 0 2006.229.14:51:22.57#ibcon#about to read 5, iclass 23, count 0 2006.229.14:51:22.57#ibcon#read 5, iclass 23, count 0 2006.229.14:51:22.57#ibcon#about to read 6, iclass 23, count 0 2006.229.14:51:22.57#ibcon#read 6, iclass 23, count 0 2006.229.14:51:22.57#ibcon#end of sib2, iclass 23, count 0 2006.229.14:51:22.57#ibcon#*after write, iclass 23, count 0 2006.229.14:51:22.57#ibcon#*before return 0, iclass 23, count 0 2006.229.14:51:22.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:22.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:22.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:51:22.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:51:22.57$vck44/va=5,4 2006.229.14:51:22.57#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.14:51:22.57#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.14:51:22.57#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:22.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:22.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:22.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:22.63#ibcon#enter wrdev, iclass 25, count 2 2006.229.14:51:22.63#ibcon#first serial, iclass 25, count 2 2006.229.14:51:22.63#ibcon#enter sib2, iclass 25, count 2 2006.229.14:51:22.63#ibcon#flushed, iclass 25, count 2 2006.229.14:51:22.63#ibcon#about to write, iclass 25, count 2 2006.229.14:51:22.63#ibcon#wrote, iclass 25, count 2 2006.229.14:51:22.63#ibcon#about to read 3, iclass 25, count 2 2006.229.14:51:22.65#ibcon#read 3, iclass 25, count 2 2006.229.14:51:22.65#ibcon#about to read 4, iclass 25, count 2 2006.229.14:51:22.65#ibcon#read 4, iclass 25, count 2 2006.229.14:51:22.65#ibcon#about to read 5, iclass 25, count 2 2006.229.14:51:22.65#ibcon#read 5, iclass 25, count 2 2006.229.14:51:22.65#ibcon#about to read 6, iclass 25, count 2 2006.229.14:51:22.65#ibcon#read 6, iclass 25, count 2 2006.229.14:51:22.65#ibcon#end of sib2, iclass 25, count 2 2006.229.14:51:22.65#ibcon#*mode == 0, iclass 25, count 2 2006.229.14:51:22.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.14:51:22.65#ibcon#[25=AT05-04\r\n] 2006.229.14:51:22.65#ibcon#*before write, iclass 25, count 2 2006.229.14:51:22.65#ibcon#enter sib2, iclass 25, count 2 2006.229.14:51:22.65#ibcon#flushed, iclass 25, count 2 2006.229.14:51:22.65#ibcon#about to write, iclass 25, count 2 2006.229.14:51:22.65#ibcon#wrote, iclass 25, count 2 2006.229.14:51:22.65#ibcon#about to read 3, iclass 25, count 2 2006.229.14:51:22.68#ibcon#read 3, iclass 25, count 2 2006.229.14:51:22.68#ibcon#about to read 4, iclass 25, count 2 2006.229.14:51:22.68#ibcon#read 4, iclass 25, count 2 2006.229.14:51:22.68#ibcon#about to read 5, iclass 25, count 2 2006.229.14:51:22.68#ibcon#read 5, iclass 25, count 2 2006.229.14:51:22.68#ibcon#about to read 6, iclass 25, count 2 2006.229.14:51:22.68#ibcon#read 6, iclass 25, count 2 2006.229.14:51:22.68#ibcon#end of sib2, iclass 25, count 2 2006.229.14:51:22.68#ibcon#*after write, iclass 25, count 2 2006.229.14:51:22.68#ibcon#*before return 0, iclass 25, count 2 2006.229.14:51:22.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:22.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:22.68#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.14:51:22.68#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:22.68#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:22.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:22.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:22.80#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:51:22.80#ibcon#first serial, iclass 25, count 0 2006.229.14:51:22.80#ibcon#enter sib2, iclass 25, count 0 2006.229.14:51:22.80#ibcon#flushed, iclass 25, count 0 2006.229.14:51:22.80#ibcon#about to write, iclass 25, count 0 2006.229.14:51:22.80#ibcon#wrote, iclass 25, count 0 2006.229.14:51:22.80#ibcon#about to read 3, iclass 25, count 0 2006.229.14:51:22.82#ibcon#read 3, iclass 25, count 0 2006.229.14:51:22.82#ibcon#about to read 4, iclass 25, count 0 2006.229.14:51:22.82#ibcon#read 4, iclass 25, count 0 2006.229.14:51:22.82#ibcon#about to read 5, iclass 25, count 0 2006.229.14:51:22.82#ibcon#read 5, iclass 25, count 0 2006.229.14:51:22.82#ibcon#about to read 6, iclass 25, count 0 2006.229.14:51:22.82#ibcon#read 6, iclass 25, count 0 2006.229.14:51:22.82#ibcon#end of sib2, iclass 25, count 0 2006.229.14:51:22.82#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:51:22.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:51:22.82#ibcon#[25=USB\r\n] 2006.229.14:51:22.82#ibcon#*before write, iclass 25, count 0 2006.229.14:51:22.82#ibcon#enter sib2, iclass 25, count 0 2006.229.14:51:22.82#ibcon#flushed, iclass 25, count 0 2006.229.14:51:22.82#ibcon#about to write, iclass 25, count 0 2006.229.14:51:22.82#ibcon#wrote, iclass 25, count 0 2006.229.14:51:22.82#ibcon#about to read 3, iclass 25, count 0 2006.229.14:51:22.85#ibcon#read 3, iclass 25, count 0 2006.229.14:51:22.85#ibcon#about to read 4, iclass 25, count 0 2006.229.14:51:22.85#ibcon#read 4, iclass 25, count 0 2006.229.14:51:22.85#ibcon#about to read 5, iclass 25, count 0 2006.229.14:51:22.85#ibcon#read 5, iclass 25, count 0 2006.229.14:51:22.85#ibcon#about to read 6, iclass 25, count 0 2006.229.14:51:22.85#ibcon#read 6, iclass 25, count 0 2006.229.14:51:22.85#ibcon#end of sib2, iclass 25, count 0 2006.229.14:51:22.85#ibcon#*after write, iclass 25, count 0 2006.229.14:51:22.85#ibcon#*before return 0, iclass 25, count 0 2006.229.14:51:22.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:22.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:22.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:51:22.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:51:22.85$vck44/valo=6,814.99 2006.229.14:51:22.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.14:51:22.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.14:51:22.85#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:22.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:22.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:22.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:22.85#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:51:22.85#ibcon#first serial, iclass 27, count 0 2006.229.14:51:22.85#ibcon#enter sib2, iclass 27, count 0 2006.229.14:51:22.85#ibcon#flushed, iclass 27, count 0 2006.229.14:51:22.85#ibcon#about to write, iclass 27, count 0 2006.229.14:51:22.85#ibcon#wrote, iclass 27, count 0 2006.229.14:51:22.85#ibcon#about to read 3, iclass 27, count 0 2006.229.14:51:22.87#ibcon#read 3, iclass 27, count 0 2006.229.14:51:22.87#ibcon#about to read 4, iclass 27, count 0 2006.229.14:51:22.87#ibcon#read 4, iclass 27, count 0 2006.229.14:51:22.87#ibcon#about to read 5, iclass 27, count 0 2006.229.14:51:22.87#ibcon#read 5, iclass 27, count 0 2006.229.14:51:22.87#ibcon#about to read 6, iclass 27, count 0 2006.229.14:51:22.87#ibcon#read 6, iclass 27, count 0 2006.229.14:51:22.87#ibcon#end of sib2, iclass 27, count 0 2006.229.14:51:22.87#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:51:22.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:51:22.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:51:22.87#ibcon#*before write, iclass 27, count 0 2006.229.14:51:22.87#ibcon#enter sib2, iclass 27, count 0 2006.229.14:51:22.87#ibcon#flushed, iclass 27, count 0 2006.229.14:51:22.87#ibcon#about to write, iclass 27, count 0 2006.229.14:51:22.87#ibcon#wrote, iclass 27, count 0 2006.229.14:51:22.87#ibcon#about to read 3, iclass 27, count 0 2006.229.14:51:22.91#ibcon#read 3, iclass 27, count 0 2006.229.14:51:22.91#ibcon#about to read 4, iclass 27, count 0 2006.229.14:51:22.91#ibcon#read 4, iclass 27, count 0 2006.229.14:51:22.91#ibcon#about to read 5, iclass 27, count 0 2006.229.14:51:22.91#ibcon#read 5, iclass 27, count 0 2006.229.14:51:22.91#ibcon#about to read 6, iclass 27, count 0 2006.229.14:51:22.91#ibcon#read 6, iclass 27, count 0 2006.229.14:51:22.91#ibcon#end of sib2, iclass 27, count 0 2006.229.14:51:22.91#ibcon#*after write, iclass 27, count 0 2006.229.14:51:22.91#ibcon#*before return 0, iclass 27, count 0 2006.229.14:51:22.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:22.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:22.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:51:22.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:51:22.91$vck44/va=6,4 2006.229.14:51:22.91#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.14:51:22.91#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.14:51:22.91#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:22.91#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:22.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:22.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:22.97#ibcon#enter wrdev, iclass 29, count 2 2006.229.14:51:22.97#ibcon#first serial, iclass 29, count 2 2006.229.14:51:22.97#ibcon#enter sib2, iclass 29, count 2 2006.229.14:51:22.97#ibcon#flushed, iclass 29, count 2 2006.229.14:51:22.97#ibcon#about to write, iclass 29, count 2 2006.229.14:51:22.97#ibcon#wrote, iclass 29, count 2 2006.229.14:51:22.97#ibcon#about to read 3, iclass 29, count 2 2006.229.14:51:22.99#ibcon#read 3, iclass 29, count 2 2006.229.14:51:22.99#ibcon#about to read 4, iclass 29, count 2 2006.229.14:51:22.99#ibcon#read 4, iclass 29, count 2 2006.229.14:51:22.99#ibcon#about to read 5, iclass 29, count 2 2006.229.14:51:22.99#ibcon#read 5, iclass 29, count 2 2006.229.14:51:22.99#ibcon#about to read 6, iclass 29, count 2 2006.229.14:51:22.99#ibcon#read 6, iclass 29, count 2 2006.229.14:51:22.99#ibcon#end of sib2, iclass 29, count 2 2006.229.14:51:22.99#ibcon#*mode == 0, iclass 29, count 2 2006.229.14:51:22.99#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.14:51:22.99#ibcon#[25=AT06-04\r\n] 2006.229.14:51:22.99#ibcon#*before write, iclass 29, count 2 2006.229.14:51:22.99#ibcon#enter sib2, iclass 29, count 2 2006.229.14:51:22.99#ibcon#flushed, iclass 29, count 2 2006.229.14:51:22.99#ibcon#about to write, iclass 29, count 2 2006.229.14:51:22.99#ibcon#wrote, iclass 29, count 2 2006.229.14:51:22.99#ibcon#about to read 3, iclass 29, count 2 2006.229.14:51:23.02#ibcon#read 3, iclass 29, count 2 2006.229.14:51:23.02#ibcon#about to read 4, iclass 29, count 2 2006.229.14:51:23.02#ibcon#read 4, iclass 29, count 2 2006.229.14:51:23.02#ibcon#about to read 5, iclass 29, count 2 2006.229.14:51:23.02#ibcon#read 5, iclass 29, count 2 2006.229.14:51:23.02#ibcon#about to read 6, iclass 29, count 2 2006.229.14:51:23.02#ibcon#read 6, iclass 29, count 2 2006.229.14:51:23.02#ibcon#end of sib2, iclass 29, count 2 2006.229.14:51:23.02#ibcon#*after write, iclass 29, count 2 2006.229.14:51:23.02#ibcon#*before return 0, iclass 29, count 2 2006.229.14:51:23.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:23.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:23.02#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.14:51:23.02#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:23.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:23.14#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:23.14#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:23.14#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:51:23.14#ibcon#first serial, iclass 29, count 0 2006.229.14:51:23.14#ibcon#enter sib2, iclass 29, count 0 2006.229.14:51:23.14#ibcon#flushed, iclass 29, count 0 2006.229.14:51:23.14#ibcon#about to write, iclass 29, count 0 2006.229.14:51:23.14#ibcon#wrote, iclass 29, count 0 2006.229.14:51:23.14#ibcon#about to read 3, iclass 29, count 0 2006.229.14:51:23.16#ibcon#read 3, iclass 29, count 0 2006.229.14:51:23.16#ibcon#about to read 4, iclass 29, count 0 2006.229.14:51:23.16#ibcon#read 4, iclass 29, count 0 2006.229.14:51:23.16#ibcon#about to read 5, iclass 29, count 0 2006.229.14:51:23.16#ibcon#read 5, iclass 29, count 0 2006.229.14:51:23.16#ibcon#about to read 6, iclass 29, count 0 2006.229.14:51:23.16#ibcon#read 6, iclass 29, count 0 2006.229.14:51:23.16#ibcon#end of sib2, iclass 29, count 0 2006.229.14:51:23.16#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:51:23.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:51:23.16#ibcon#[25=USB\r\n] 2006.229.14:51:23.16#ibcon#*before write, iclass 29, count 0 2006.229.14:51:23.16#ibcon#enter sib2, iclass 29, count 0 2006.229.14:51:23.16#ibcon#flushed, iclass 29, count 0 2006.229.14:51:23.16#ibcon#about to write, iclass 29, count 0 2006.229.14:51:23.16#ibcon#wrote, iclass 29, count 0 2006.229.14:51:23.16#ibcon#about to read 3, iclass 29, count 0 2006.229.14:51:23.19#ibcon#read 3, iclass 29, count 0 2006.229.14:51:23.19#ibcon#about to read 4, iclass 29, count 0 2006.229.14:51:23.19#ibcon#read 4, iclass 29, count 0 2006.229.14:51:23.19#ibcon#about to read 5, iclass 29, count 0 2006.229.14:51:23.19#ibcon#read 5, iclass 29, count 0 2006.229.14:51:23.19#ibcon#about to read 6, iclass 29, count 0 2006.229.14:51:23.19#ibcon#read 6, iclass 29, count 0 2006.229.14:51:23.19#ibcon#end of sib2, iclass 29, count 0 2006.229.14:51:23.19#ibcon#*after write, iclass 29, count 0 2006.229.14:51:23.19#ibcon#*before return 0, iclass 29, count 0 2006.229.14:51:23.19#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:23.19#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:23.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:51:23.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:51:23.19$vck44/valo=7,864.99 2006.229.14:51:23.19#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.14:51:23.19#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.14:51:23.19#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:23.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:23.19#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:23.19#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:23.19#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:51:23.19#ibcon#first serial, iclass 31, count 0 2006.229.14:51:23.19#ibcon#enter sib2, iclass 31, count 0 2006.229.14:51:23.19#ibcon#flushed, iclass 31, count 0 2006.229.14:51:23.19#ibcon#about to write, iclass 31, count 0 2006.229.14:51:23.19#ibcon#wrote, iclass 31, count 0 2006.229.14:51:23.19#ibcon#about to read 3, iclass 31, count 0 2006.229.14:51:23.21#ibcon#read 3, iclass 31, count 0 2006.229.14:51:23.21#ibcon#about to read 4, iclass 31, count 0 2006.229.14:51:23.21#ibcon#read 4, iclass 31, count 0 2006.229.14:51:23.21#ibcon#about to read 5, iclass 31, count 0 2006.229.14:51:23.21#ibcon#read 5, iclass 31, count 0 2006.229.14:51:23.21#ibcon#about to read 6, iclass 31, count 0 2006.229.14:51:23.21#ibcon#read 6, iclass 31, count 0 2006.229.14:51:23.21#ibcon#end of sib2, iclass 31, count 0 2006.229.14:51:23.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:51:23.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:51:23.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:51:23.21#ibcon#*before write, iclass 31, count 0 2006.229.14:51:23.21#ibcon#enter sib2, iclass 31, count 0 2006.229.14:51:23.21#ibcon#flushed, iclass 31, count 0 2006.229.14:51:23.21#ibcon#about to write, iclass 31, count 0 2006.229.14:51:23.21#ibcon#wrote, iclass 31, count 0 2006.229.14:51:23.21#ibcon#about to read 3, iclass 31, count 0 2006.229.14:51:23.25#ibcon#read 3, iclass 31, count 0 2006.229.14:51:23.25#ibcon#about to read 4, iclass 31, count 0 2006.229.14:51:23.25#ibcon#read 4, iclass 31, count 0 2006.229.14:51:23.25#ibcon#about to read 5, iclass 31, count 0 2006.229.14:51:23.25#ibcon#read 5, iclass 31, count 0 2006.229.14:51:23.25#ibcon#about to read 6, iclass 31, count 0 2006.229.14:51:23.25#ibcon#read 6, iclass 31, count 0 2006.229.14:51:23.25#ibcon#end of sib2, iclass 31, count 0 2006.229.14:51:23.25#ibcon#*after write, iclass 31, count 0 2006.229.14:51:23.25#ibcon#*before return 0, iclass 31, count 0 2006.229.14:51:23.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:23.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:23.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:51:23.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:51:23.25$vck44/va=7,5 2006.229.14:51:23.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.14:51:23.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.14:51:23.25#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:23.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:23.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:23.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:23.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.14:51:23.31#ibcon#first serial, iclass 33, count 2 2006.229.14:51:23.31#ibcon#enter sib2, iclass 33, count 2 2006.229.14:51:23.31#ibcon#flushed, iclass 33, count 2 2006.229.14:51:23.31#ibcon#about to write, iclass 33, count 2 2006.229.14:51:23.31#ibcon#wrote, iclass 33, count 2 2006.229.14:51:23.31#ibcon#about to read 3, iclass 33, count 2 2006.229.14:51:23.33#ibcon#read 3, iclass 33, count 2 2006.229.14:51:23.33#ibcon#about to read 4, iclass 33, count 2 2006.229.14:51:23.33#ibcon#read 4, iclass 33, count 2 2006.229.14:51:23.33#ibcon#about to read 5, iclass 33, count 2 2006.229.14:51:23.33#ibcon#read 5, iclass 33, count 2 2006.229.14:51:23.33#ibcon#about to read 6, iclass 33, count 2 2006.229.14:51:23.33#ibcon#read 6, iclass 33, count 2 2006.229.14:51:23.33#ibcon#end of sib2, iclass 33, count 2 2006.229.14:51:23.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.14:51:23.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.14:51:23.33#ibcon#[25=AT07-05\r\n] 2006.229.14:51:23.33#ibcon#*before write, iclass 33, count 2 2006.229.14:51:23.33#ibcon#enter sib2, iclass 33, count 2 2006.229.14:51:23.33#ibcon#flushed, iclass 33, count 2 2006.229.14:51:23.33#ibcon#about to write, iclass 33, count 2 2006.229.14:51:23.33#ibcon#wrote, iclass 33, count 2 2006.229.14:51:23.33#ibcon#about to read 3, iclass 33, count 2 2006.229.14:51:23.36#ibcon#read 3, iclass 33, count 2 2006.229.14:51:23.36#ibcon#about to read 4, iclass 33, count 2 2006.229.14:51:23.36#ibcon#read 4, iclass 33, count 2 2006.229.14:51:23.36#ibcon#about to read 5, iclass 33, count 2 2006.229.14:51:23.36#ibcon#read 5, iclass 33, count 2 2006.229.14:51:23.36#ibcon#about to read 6, iclass 33, count 2 2006.229.14:51:23.36#ibcon#read 6, iclass 33, count 2 2006.229.14:51:23.36#ibcon#end of sib2, iclass 33, count 2 2006.229.14:51:23.36#ibcon#*after write, iclass 33, count 2 2006.229.14:51:23.36#ibcon#*before return 0, iclass 33, count 2 2006.229.14:51:23.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:23.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:23.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.14:51:23.36#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:23.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:23.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:23.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:23.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:51:23.48#ibcon#first serial, iclass 33, count 0 2006.229.14:51:23.48#ibcon#enter sib2, iclass 33, count 0 2006.229.14:51:23.48#ibcon#flushed, iclass 33, count 0 2006.229.14:51:23.48#ibcon#about to write, iclass 33, count 0 2006.229.14:51:23.48#ibcon#wrote, iclass 33, count 0 2006.229.14:51:23.48#ibcon#about to read 3, iclass 33, count 0 2006.229.14:51:23.50#ibcon#read 3, iclass 33, count 0 2006.229.14:51:23.50#ibcon#about to read 4, iclass 33, count 0 2006.229.14:51:23.50#ibcon#read 4, iclass 33, count 0 2006.229.14:51:23.50#ibcon#about to read 5, iclass 33, count 0 2006.229.14:51:23.50#ibcon#read 5, iclass 33, count 0 2006.229.14:51:23.50#ibcon#about to read 6, iclass 33, count 0 2006.229.14:51:23.50#ibcon#read 6, iclass 33, count 0 2006.229.14:51:23.50#ibcon#end of sib2, iclass 33, count 0 2006.229.14:51:23.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:51:23.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:51:23.50#ibcon#[25=USB\r\n] 2006.229.14:51:23.50#ibcon#*before write, iclass 33, count 0 2006.229.14:51:23.50#ibcon#enter sib2, iclass 33, count 0 2006.229.14:51:23.50#ibcon#flushed, iclass 33, count 0 2006.229.14:51:23.50#ibcon#about to write, iclass 33, count 0 2006.229.14:51:23.50#ibcon#wrote, iclass 33, count 0 2006.229.14:51:23.50#ibcon#about to read 3, iclass 33, count 0 2006.229.14:51:23.53#ibcon#read 3, iclass 33, count 0 2006.229.14:51:23.53#ibcon#about to read 4, iclass 33, count 0 2006.229.14:51:23.53#ibcon#read 4, iclass 33, count 0 2006.229.14:51:23.53#ibcon#about to read 5, iclass 33, count 0 2006.229.14:51:23.53#ibcon#read 5, iclass 33, count 0 2006.229.14:51:23.53#ibcon#about to read 6, iclass 33, count 0 2006.229.14:51:23.53#ibcon#read 6, iclass 33, count 0 2006.229.14:51:23.53#ibcon#end of sib2, iclass 33, count 0 2006.229.14:51:23.53#ibcon#*after write, iclass 33, count 0 2006.229.14:51:23.53#ibcon#*before return 0, iclass 33, count 0 2006.229.14:51:23.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:23.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:23.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:51:23.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:51:23.53$vck44/valo=8,884.99 2006.229.14:51:23.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.14:51:23.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.14:51:23.53#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:23.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:23.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:23.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:23.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:51:23.53#ibcon#first serial, iclass 35, count 0 2006.229.14:51:23.53#ibcon#enter sib2, iclass 35, count 0 2006.229.14:51:23.53#ibcon#flushed, iclass 35, count 0 2006.229.14:51:23.53#ibcon#about to write, iclass 35, count 0 2006.229.14:51:23.53#ibcon#wrote, iclass 35, count 0 2006.229.14:51:23.53#ibcon#about to read 3, iclass 35, count 0 2006.229.14:51:23.55#ibcon#read 3, iclass 35, count 0 2006.229.14:51:23.55#ibcon#about to read 4, iclass 35, count 0 2006.229.14:51:23.55#ibcon#read 4, iclass 35, count 0 2006.229.14:51:23.55#ibcon#about to read 5, iclass 35, count 0 2006.229.14:51:23.55#ibcon#read 5, iclass 35, count 0 2006.229.14:51:23.55#ibcon#about to read 6, iclass 35, count 0 2006.229.14:51:23.55#ibcon#read 6, iclass 35, count 0 2006.229.14:51:23.55#ibcon#end of sib2, iclass 35, count 0 2006.229.14:51:23.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:51:23.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:51:23.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:51:23.55#ibcon#*before write, iclass 35, count 0 2006.229.14:51:23.55#ibcon#enter sib2, iclass 35, count 0 2006.229.14:51:23.55#ibcon#flushed, iclass 35, count 0 2006.229.14:51:23.55#ibcon#about to write, iclass 35, count 0 2006.229.14:51:23.55#ibcon#wrote, iclass 35, count 0 2006.229.14:51:23.55#ibcon#about to read 3, iclass 35, count 0 2006.229.14:51:23.59#ibcon#read 3, iclass 35, count 0 2006.229.14:51:23.59#ibcon#about to read 4, iclass 35, count 0 2006.229.14:51:23.59#ibcon#read 4, iclass 35, count 0 2006.229.14:51:23.59#ibcon#about to read 5, iclass 35, count 0 2006.229.14:51:23.59#ibcon#read 5, iclass 35, count 0 2006.229.14:51:23.59#ibcon#about to read 6, iclass 35, count 0 2006.229.14:51:23.59#ibcon#read 6, iclass 35, count 0 2006.229.14:51:23.59#ibcon#end of sib2, iclass 35, count 0 2006.229.14:51:23.59#ibcon#*after write, iclass 35, count 0 2006.229.14:51:23.59#ibcon#*before return 0, iclass 35, count 0 2006.229.14:51:23.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:23.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:23.59#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:51:23.59#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:51:23.59$vck44/va=8,6 2006.229.14:51:23.59#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.14:51:23.59#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.14:51:23.59#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:23.59#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:51:23.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:51:23.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:51:23.65#ibcon#enter wrdev, iclass 37, count 2 2006.229.14:51:23.65#ibcon#first serial, iclass 37, count 2 2006.229.14:51:23.65#ibcon#enter sib2, iclass 37, count 2 2006.229.14:51:23.65#ibcon#flushed, iclass 37, count 2 2006.229.14:51:23.65#ibcon#about to write, iclass 37, count 2 2006.229.14:51:23.65#ibcon#wrote, iclass 37, count 2 2006.229.14:51:23.65#ibcon#about to read 3, iclass 37, count 2 2006.229.14:51:23.67#ibcon#read 3, iclass 37, count 2 2006.229.14:51:23.67#ibcon#about to read 4, iclass 37, count 2 2006.229.14:51:23.67#ibcon#read 4, iclass 37, count 2 2006.229.14:51:23.67#ibcon#about to read 5, iclass 37, count 2 2006.229.14:51:23.67#ibcon#read 5, iclass 37, count 2 2006.229.14:51:23.67#ibcon#about to read 6, iclass 37, count 2 2006.229.14:51:23.67#ibcon#read 6, iclass 37, count 2 2006.229.14:51:23.67#ibcon#end of sib2, iclass 37, count 2 2006.229.14:51:23.67#ibcon#*mode == 0, iclass 37, count 2 2006.229.14:51:23.67#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.14:51:23.67#ibcon#[25=AT08-06\r\n] 2006.229.14:51:23.67#ibcon#*before write, iclass 37, count 2 2006.229.14:51:23.67#ibcon#enter sib2, iclass 37, count 2 2006.229.14:51:23.67#ibcon#flushed, iclass 37, count 2 2006.229.14:51:23.67#ibcon#about to write, iclass 37, count 2 2006.229.14:51:23.67#ibcon#wrote, iclass 37, count 2 2006.229.14:51:23.67#ibcon#about to read 3, iclass 37, count 2 2006.229.14:51:23.70#ibcon#read 3, iclass 37, count 2 2006.229.14:51:23.70#ibcon#about to read 4, iclass 37, count 2 2006.229.14:51:23.70#ibcon#read 4, iclass 37, count 2 2006.229.14:51:23.70#ibcon#about to read 5, iclass 37, count 2 2006.229.14:51:23.70#ibcon#read 5, iclass 37, count 2 2006.229.14:51:23.70#ibcon#about to read 6, iclass 37, count 2 2006.229.14:51:23.70#ibcon#read 6, iclass 37, count 2 2006.229.14:51:23.70#ibcon#end of sib2, iclass 37, count 2 2006.229.14:51:23.70#ibcon#*after write, iclass 37, count 2 2006.229.14:51:23.70#ibcon#*before return 0, iclass 37, count 2 2006.229.14:51:23.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:51:23.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.14:51:23.70#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.14:51:23.70#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:23.70#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:51:23.82#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:51:23.82#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:51:23.82#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:51:23.82#ibcon#first serial, iclass 37, count 0 2006.229.14:51:23.82#ibcon#enter sib2, iclass 37, count 0 2006.229.14:51:23.82#ibcon#flushed, iclass 37, count 0 2006.229.14:51:23.82#ibcon#about to write, iclass 37, count 0 2006.229.14:51:23.82#ibcon#wrote, iclass 37, count 0 2006.229.14:51:23.82#ibcon#about to read 3, iclass 37, count 0 2006.229.14:51:23.84#ibcon#read 3, iclass 37, count 0 2006.229.14:51:23.84#ibcon#about to read 4, iclass 37, count 0 2006.229.14:51:23.84#ibcon#read 4, iclass 37, count 0 2006.229.14:51:23.84#ibcon#about to read 5, iclass 37, count 0 2006.229.14:51:23.84#ibcon#read 5, iclass 37, count 0 2006.229.14:51:23.84#ibcon#about to read 6, iclass 37, count 0 2006.229.14:51:23.84#ibcon#read 6, iclass 37, count 0 2006.229.14:51:23.84#ibcon#end of sib2, iclass 37, count 0 2006.229.14:51:23.84#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:51:23.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:51:23.84#ibcon#[25=USB\r\n] 2006.229.14:51:23.84#ibcon#*before write, iclass 37, count 0 2006.229.14:51:23.84#ibcon#enter sib2, iclass 37, count 0 2006.229.14:51:23.84#ibcon#flushed, iclass 37, count 0 2006.229.14:51:23.84#ibcon#about to write, iclass 37, count 0 2006.229.14:51:23.84#ibcon#wrote, iclass 37, count 0 2006.229.14:51:23.84#ibcon#about to read 3, iclass 37, count 0 2006.229.14:51:23.87#ibcon#read 3, iclass 37, count 0 2006.229.14:51:23.87#ibcon#about to read 4, iclass 37, count 0 2006.229.14:51:23.87#ibcon#read 4, iclass 37, count 0 2006.229.14:51:23.87#ibcon#about to read 5, iclass 37, count 0 2006.229.14:51:23.87#ibcon#read 5, iclass 37, count 0 2006.229.14:51:23.87#ibcon#about to read 6, iclass 37, count 0 2006.229.14:51:23.87#ibcon#read 6, iclass 37, count 0 2006.229.14:51:23.87#ibcon#end of sib2, iclass 37, count 0 2006.229.14:51:23.87#ibcon#*after write, iclass 37, count 0 2006.229.14:51:23.87#ibcon#*before return 0, iclass 37, count 0 2006.229.14:51:23.87#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:51:23.87#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.14:51:23.87#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:51:23.87#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:51:23.87$vck44/vblo=1,629.99 2006.229.14:51:23.87#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.14:51:23.87#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.14:51:23.87#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:23.87#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:51:23.87#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:51:23.87#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:51:23.87#ibcon#enter wrdev, iclass 39, count 0 2006.229.14:51:23.87#ibcon#first serial, iclass 39, count 0 2006.229.14:51:23.87#ibcon#enter sib2, iclass 39, count 0 2006.229.14:51:23.87#ibcon#flushed, iclass 39, count 0 2006.229.14:51:23.87#ibcon#about to write, iclass 39, count 0 2006.229.14:51:23.87#ibcon#wrote, iclass 39, count 0 2006.229.14:51:23.87#ibcon#about to read 3, iclass 39, count 0 2006.229.14:51:23.89#ibcon#read 3, iclass 39, count 0 2006.229.14:51:23.89#ibcon#about to read 4, iclass 39, count 0 2006.229.14:51:23.89#ibcon#read 4, iclass 39, count 0 2006.229.14:51:23.89#ibcon#about to read 5, iclass 39, count 0 2006.229.14:51:23.89#ibcon#read 5, iclass 39, count 0 2006.229.14:51:23.89#ibcon#about to read 6, iclass 39, count 0 2006.229.14:51:23.89#ibcon#read 6, iclass 39, count 0 2006.229.14:51:23.89#ibcon#end of sib2, iclass 39, count 0 2006.229.14:51:23.89#ibcon#*mode == 0, iclass 39, count 0 2006.229.14:51:23.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.14:51:23.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:51:23.89#ibcon#*before write, iclass 39, count 0 2006.229.14:51:23.89#ibcon#enter sib2, iclass 39, count 0 2006.229.14:51:23.89#ibcon#flushed, iclass 39, count 0 2006.229.14:51:23.89#ibcon#about to write, iclass 39, count 0 2006.229.14:51:23.89#ibcon#wrote, iclass 39, count 0 2006.229.14:51:23.89#ibcon#about to read 3, iclass 39, count 0 2006.229.14:51:23.93#ibcon#read 3, iclass 39, count 0 2006.229.14:51:23.93#ibcon#about to read 4, iclass 39, count 0 2006.229.14:51:23.93#ibcon#read 4, iclass 39, count 0 2006.229.14:51:23.93#ibcon#about to read 5, iclass 39, count 0 2006.229.14:51:23.93#ibcon#read 5, iclass 39, count 0 2006.229.14:51:23.93#ibcon#about to read 6, iclass 39, count 0 2006.229.14:51:23.93#ibcon#read 6, iclass 39, count 0 2006.229.14:51:23.93#ibcon#end of sib2, iclass 39, count 0 2006.229.14:51:23.93#ibcon#*after write, iclass 39, count 0 2006.229.14:51:23.93#ibcon#*before return 0, iclass 39, count 0 2006.229.14:51:23.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:51:23.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.14:51:23.93#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.14:51:23.93#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.14:51:23.93$vck44/vb=1,4 2006.229.14:51:23.93#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.14:51:23.93#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.14:51:23.93#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:23.93#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:51:23.93#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:51:23.93#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:51:23.93#ibcon#enter wrdev, iclass 3, count 2 2006.229.14:51:23.93#ibcon#first serial, iclass 3, count 2 2006.229.14:51:23.93#ibcon#enter sib2, iclass 3, count 2 2006.229.14:51:23.93#ibcon#flushed, iclass 3, count 2 2006.229.14:51:23.93#ibcon#about to write, iclass 3, count 2 2006.229.14:51:23.93#ibcon#wrote, iclass 3, count 2 2006.229.14:51:23.93#ibcon#about to read 3, iclass 3, count 2 2006.229.14:51:23.95#ibcon#read 3, iclass 3, count 2 2006.229.14:51:23.95#ibcon#about to read 4, iclass 3, count 2 2006.229.14:51:23.95#ibcon#read 4, iclass 3, count 2 2006.229.14:51:23.95#ibcon#about to read 5, iclass 3, count 2 2006.229.14:51:23.95#ibcon#read 5, iclass 3, count 2 2006.229.14:51:23.95#ibcon#about to read 6, iclass 3, count 2 2006.229.14:51:23.95#ibcon#read 6, iclass 3, count 2 2006.229.14:51:23.95#ibcon#end of sib2, iclass 3, count 2 2006.229.14:51:23.95#ibcon#*mode == 0, iclass 3, count 2 2006.229.14:51:23.95#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.14:51:23.95#ibcon#[27=AT01-04\r\n] 2006.229.14:51:23.95#ibcon#*before write, iclass 3, count 2 2006.229.14:51:23.95#ibcon#enter sib2, iclass 3, count 2 2006.229.14:51:23.95#ibcon#flushed, iclass 3, count 2 2006.229.14:51:23.95#ibcon#about to write, iclass 3, count 2 2006.229.14:51:23.95#ibcon#wrote, iclass 3, count 2 2006.229.14:51:23.95#ibcon#about to read 3, iclass 3, count 2 2006.229.14:51:23.98#ibcon#read 3, iclass 3, count 2 2006.229.14:51:23.98#ibcon#about to read 4, iclass 3, count 2 2006.229.14:51:23.98#ibcon#read 4, iclass 3, count 2 2006.229.14:51:23.98#ibcon#about to read 5, iclass 3, count 2 2006.229.14:51:23.98#ibcon#read 5, iclass 3, count 2 2006.229.14:51:23.98#ibcon#about to read 6, iclass 3, count 2 2006.229.14:51:23.98#ibcon#read 6, iclass 3, count 2 2006.229.14:51:23.98#ibcon#end of sib2, iclass 3, count 2 2006.229.14:51:23.98#ibcon#*after write, iclass 3, count 2 2006.229.14:51:23.98#ibcon#*before return 0, iclass 3, count 2 2006.229.14:51:23.98#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:51:23.98#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.14:51:23.98#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.14:51:23.98#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:23.98#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:51:24.10#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:51:24.10#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:51:24.10#ibcon#enter wrdev, iclass 3, count 0 2006.229.14:51:24.10#ibcon#first serial, iclass 3, count 0 2006.229.14:51:24.10#ibcon#enter sib2, iclass 3, count 0 2006.229.14:51:24.10#ibcon#flushed, iclass 3, count 0 2006.229.14:51:24.10#ibcon#about to write, iclass 3, count 0 2006.229.14:51:24.10#ibcon#wrote, iclass 3, count 0 2006.229.14:51:24.10#ibcon#about to read 3, iclass 3, count 0 2006.229.14:51:24.12#ibcon#read 3, iclass 3, count 0 2006.229.14:51:24.12#ibcon#about to read 4, iclass 3, count 0 2006.229.14:51:24.12#ibcon#read 4, iclass 3, count 0 2006.229.14:51:24.12#ibcon#about to read 5, iclass 3, count 0 2006.229.14:51:24.12#ibcon#read 5, iclass 3, count 0 2006.229.14:51:24.12#ibcon#about to read 6, iclass 3, count 0 2006.229.14:51:24.12#ibcon#read 6, iclass 3, count 0 2006.229.14:51:24.12#ibcon#end of sib2, iclass 3, count 0 2006.229.14:51:24.12#ibcon#*mode == 0, iclass 3, count 0 2006.229.14:51:24.12#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.14:51:24.12#ibcon#[27=USB\r\n] 2006.229.14:51:24.12#ibcon#*before write, iclass 3, count 0 2006.229.14:51:24.12#ibcon#enter sib2, iclass 3, count 0 2006.229.14:51:24.12#ibcon#flushed, iclass 3, count 0 2006.229.14:51:24.12#ibcon#about to write, iclass 3, count 0 2006.229.14:51:24.12#ibcon#wrote, iclass 3, count 0 2006.229.14:51:24.12#ibcon#about to read 3, iclass 3, count 0 2006.229.14:51:24.15#ibcon#read 3, iclass 3, count 0 2006.229.14:51:24.15#ibcon#about to read 4, iclass 3, count 0 2006.229.14:51:24.15#ibcon#read 4, iclass 3, count 0 2006.229.14:51:24.15#ibcon#about to read 5, iclass 3, count 0 2006.229.14:51:24.15#ibcon#read 5, iclass 3, count 0 2006.229.14:51:24.15#ibcon#about to read 6, iclass 3, count 0 2006.229.14:51:24.15#ibcon#read 6, iclass 3, count 0 2006.229.14:51:24.15#ibcon#end of sib2, iclass 3, count 0 2006.229.14:51:24.15#ibcon#*after write, iclass 3, count 0 2006.229.14:51:24.15#ibcon#*before return 0, iclass 3, count 0 2006.229.14:51:24.15#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:51:24.15#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.14:51:24.15#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.14:51:24.15#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.14:51:24.15$vck44/vblo=2,634.99 2006.229.14:51:24.15#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.14:51:24.15#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.14:51:24.15#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:24.15#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:24.15#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:24.15#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:24.15#ibcon#enter wrdev, iclass 5, count 0 2006.229.14:51:24.15#ibcon#first serial, iclass 5, count 0 2006.229.14:51:24.15#ibcon#enter sib2, iclass 5, count 0 2006.229.14:51:24.15#ibcon#flushed, iclass 5, count 0 2006.229.14:51:24.15#ibcon#about to write, iclass 5, count 0 2006.229.14:51:24.15#ibcon#wrote, iclass 5, count 0 2006.229.14:51:24.15#ibcon#about to read 3, iclass 5, count 0 2006.229.14:51:24.17#ibcon#read 3, iclass 5, count 0 2006.229.14:51:24.17#ibcon#about to read 4, iclass 5, count 0 2006.229.14:51:24.17#ibcon#read 4, iclass 5, count 0 2006.229.14:51:24.17#ibcon#about to read 5, iclass 5, count 0 2006.229.14:51:24.17#ibcon#read 5, iclass 5, count 0 2006.229.14:51:24.17#ibcon#about to read 6, iclass 5, count 0 2006.229.14:51:24.17#ibcon#read 6, iclass 5, count 0 2006.229.14:51:24.17#ibcon#end of sib2, iclass 5, count 0 2006.229.14:51:24.17#ibcon#*mode == 0, iclass 5, count 0 2006.229.14:51:24.17#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.14:51:24.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:51:24.17#ibcon#*before write, iclass 5, count 0 2006.229.14:51:24.17#ibcon#enter sib2, iclass 5, count 0 2006.229.14:51:24.17#ibcon#flushed, iclass 5, count 0 2006.229.14:51:24.17#ibcon#about to write, iclass 5, count 0 2006.229.14:51:24.17#ibcon#wrote, iclass 5, count 0 2006.229.14:51:24.17#ibcon#about to read 3, iclass 5, count 0 2006.229.14:51:24.21#ibcon#read 3, iclass 5, count 0 2006.229.14:51:24.21#ibcon#about to read 4, iclass 5, count 0 2006.229.14:51:24.21#ibcon#read 4, iclass 5, count 0 2006.229.14:51:24.21#ibcon#about to read 5, iclass 5, count 0 2006.229.14:51:24.21#ibcon#read 5, iclass 5, count 0 2006.229.14:51:24.21#ibcon#about to read 6, iclass 5, count 0 2006.229.14:51:24.21#ibcon#read 6, iclass 5, count 0 2006.229.14:51:24.21#ibcon#end of sib2, iclass 5, count 0 2006.229.14:51:24.21#ibcon#*after write, iclass 5, count 0 2006.229.14:51:24.21#ibcon#*before return 0, iclass 5, count 0 2006.229.14:51:24.21#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:24.21#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.14:51:24.21#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.14:51:24.21#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.14:51:24.21$vck44/vb=2,4 2006.229.14:51:24.21#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.14:51:24.21#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.14:51:24.21#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:24.21#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:24.27#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:24.27#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:24.27#ibcon#enter wrdev, iclass 7, count 2 2006.229.14:51:24.27#ibcon#first serial, iclass 7, count 2 2006.229.14:51:24.27#ibcon#enter sib2, iclass 7, count 2 2006.229.14:51:24.27#ibcon#flushed, iclass 7, count 2 2006.229.14:51:24.27#ibcon#about to write, iclass 7, count 2 2006.229.14:51:24.27#ibcon#wrote, iclass 7, count 2 2006.229.14:51:24.27#ibcon#about to read 3, iclass 7, count 2 2006.229.14:51:24.29#ibcon#read 3, iclass 7, count 2 2006.229.14:51:24.29#ibcon#about to read 4, iclass 7, count 2 2006.229.14:51:24.29#ibcon#read 4, iclass 7, count 2 2006.229.14:51:24.29#ibcon#about to read 5, iclass 7, count 2 2006.229.14:51:24.29#ibcon#read 5, iclass 7, count 2 2006.229.14:51:24.29#ibcon#about to read 6, iclass 7, count 2 2006.229.14:51:24.29#ibcon#read 6, iclass 7, count 2 2006.229.14:51:24.29#ibcon#end of sib2, iclass 7, count 2 2006.229.14:51:24.29#ibcon#*mode == 0, iclass 7, count 2 2006.229.14:51:24.29#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.14:51:24.29#ibcon#[27=AT02-04\r\n] 2006.229.14:51:24.29#ibcon#*before write, iclass 7, count 2 2006.229.14:51:24.29#ibcon#enter sib2, iclass 7, count 2 2006.229.14:51:24.29#ibcon#flushed, iclass 7, count 2 2006.229.14:51:24.29#ibcon#about to write, iclass 7, count 2 2006.229.14:51:24.29#ibcon#wrote, iclass 7, count 2 2006.229.14:51:24.29#ibcon#about to read 3, iclass 7, count 2 2006.229.14:51:24.32#ibcon#read 3, iclass 7, count 2 2006.229.14:51:24.32#ibcon#about to read 4, iclass 7, count 2 2006.229.14:51:24.32#ibcon#read 4, iclass 7, count 2 2006.229.14:51:24.32#ibcon#about to read 5, iclass 7, count 2 2006.229.14:51:24.32#ibcon#read 5, iclass 7, count 2 2006.229.14:51:24.32#ibcon#about to read 6, iclass 7, count 2 2006.229.14:51:24.32#ibcon#read 6, iclass 7, count 2 2006.229.14:51:24.32#ibcon#end of sib2, iclass 7, count 2 2006.229.14:51:24.32#ibcon#*after write, iclass 7, count 2 2006.229.14:51:24.32#ibcon#*before return 0, iclass 7, count 2 2006.229.14:51:24.32#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:24.32#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.14:51:24.32#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.14:51:24.32#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:24.32#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:24.44#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:24.44#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:24.44#ibcon#enter wrdev, iclass 7, count 0 2006.229.14:51:24.44#ibcon#first serial, iclass 7, count 0 2006.229.14:51:24.44#ibcon#enter sib2, iclass 7, count 0 2006.229.14:51:24.44#ibcon#flushed, iclass 7, count 0 2006.229.14:51:24.44#ibcon#about to write, iclass 7, count 0 2006.229.14:51:24.44#ibcon#wrote, iclass 7, count 0 2006.229.14:51:24.44#ibcon#about to read 3, iclass 7, count 0 2006.229.14:51:24.46#ibcon#read 3, iclass 7, count 0 2006.229.14:51:24.46#ibcon#about to read 4, iclass 7, count 0 2006.229.14:51:24.46#ibcon#read 4, iclass 7, count 0 2006.229.14:51:24.46#ibcon#about to read 5, iclass 7, count 0 2006.229.14:51:24.46#ibcon#read 5, iclass 7, count 0 2006.229.14:51:24.46#ibcon#about to read 6, iclass 7, count 0 2006.229.14:51:24.46#ibcon#read 6, iclass 7, count 0 2006.229.14:51:24.46#ibcon#end of sib2, iclass 7, count 0 2006.229.14:51:24.46#ibcon#*mode == 0, iclass 7, count 0 2006.229.14:51:24.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.14:51:24.46#ibcon#[27=USB\r\n] 2006.229.14:51:24.46#ibcon#*before write, iclass 7, count 0 2006.229.14:51:24.46#ibcon#enter sib2, iclass 7, count 0 2006.229.14:51:24.46#ibcon#flushed, iclass 7, count 0 2006.229.14:51:24.46#ibcon#about to write, iclass 7, count 0 2006.229.14:51:24.46#ibcon#wrote, iclass 7, count 0 2006.229.14:51:24.46#ibcon#about to read 3, iclass 7, count 0 2006.229.14:51:24.49#ibcon#read 3, iclass 7, count 0 2006.229.14:51:24.49#ibcon#about to read 4, iclass 7, count 0 2006.229.14:51:24.49#ibcon#read 4, iclass 7, count 0 2006.229.14:51:24.49#ibcon#about to read 5, iclass 7, count 0 2006.229.14:51:24.49#ibcon#read 5, iclass 7, count 0 2006.229.14:51:24.49#ibcon#about to read 6, iclass 7, count 0 2006.229.14:51:24.49#ibcon#read 6, iclass 7, count 0 2006.229.14:51:24.49#ibcon#end of sib2, iclass 7, count 0 2006.229.14:51:24.49#ibcon#*after write, iclass 7, count 0 2006.229.14:51:24.49#ibcon#*before return 0, iclass 7, count 0 2006.229.14:51:24.49#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:24.49#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.14:51:24.49#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.14:51:24.49#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.14:51:24.49$vck44/vblo=3,649.99 2006.229.14:51:24.49#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.14:51:24.49#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.14:51:24.49#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:24.49#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:24.49#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:24.49#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:24.49#ibcon#enter wrdev, iclass 11, count 0 2006.229.14:51:24.49#ibcon#first serial, iclass 11, count 0 2006.229.14:51:24.49#ibcon#enter sib2, iclass 11, count 0 2006.229.14:51:24.49#ibcon#flushed, iclass 11, count 0 2006.229.14:51:24.49#ibcon#about to write, iclass 11, count 0 2006.229.14:51:24.49#ibcon#wrote, iclass 11, count 0 2006.229.14:51:24.49#ibcon#about to read 3, iclass 11, count 0 2006.229.14:51:24.51#ibcon#read 3, iclass 11, count 0 2006.229.14:51:24.51#ibcon#about to read 4, iclass 11, count 0 2006.229.14:51:24.51#ibcon#read 4, iclass 11, count 0 2006.229.14:51:24.51#ibcon#about to read 5, iclass 11, count 0 2006.229.14:51:24.51#ibcon#read 5, iclass 11, count 0 2006.229.14:51:24.51#ibcon#about to read 6, iclass 11, count 0 2006.229.14:51:24.51#ibcon#read 6, iclass 11, count 0 2006.229.14:51:24.51#ibcon#end of sib2, iclass 11, count 0 2006.229.14:51:24.51#ibcon#*mode == 0, iclass 11, count 0 2006.229.14:51:24.51#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.14:51:24.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:51:24.51#ibcon#*before write, iclass 11, count 0 2006.229.14:51:24.51#ibcon#enter sib2, iclass 11, count 0 2006.229.14:51:24.51#ibcon#flushed, iclass 11, count 0 2006.229.14:51:24.51#ibcon#about to write, iclass 11, count 0 2006.229.14:51:24.51#ibcon#wrote, iclass 11, count 0 2006.229.14:51:24.51#ibcon#about to read 3, iclass 11, count 0 2006.229.14:51:24.55#ibcon#read 3, iclass 11, count 0 2006.229.14:51:24.55#ibcon#about to read 4, iclass 11, count 0 2006.229.14:51:24.55#ibcon#read 4, iclass 11, count 0 2006.229.14:51:24.55#ibcon#about to read 5, iclass 11, count 0 2006.229.14:51:24.55#ibcon#read 5, iclass 11, count 0 2006.229.14:51:24.55#ibcon#about to read 6, iclass 11, count 0 2006.229.14:51:24.55#ibcon#read 6, iclass 11, count 0 2006.229.14:51:24.55#ibcon#end of sib2, iclass 11, count 0 2006.229.14:51:24.55#ibcon#*after write, iclass 11, count 0 2006.229.14:51:24.55#ibcon#*before return 0, iclass 11, count 0 2006.229.14:51:24.55#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:24.55#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.14:51:24.55#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.14:51:24.55#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.14:51:24.55$vck44/vb=3,4 2006.229.14:51:24.55#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.14:51:24.55#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.14:51:24.55#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:24.55#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:24.61#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:24.61#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:24.61#ibcon#enter wrdev, iclass 13, count 2 2006.229.14:51:24.61#ibcon#first serial, iclass 13, count 2 2006.229.14:51:24.61#ibcon#enter sib2, iclass 13, count 2 2006.229.14:51:24.61#ibcon#flushed, iclass 13, count 2 2006.229.14:51:24.61#ibcon#about to write, iclass 13, count 2 2006.229.14:51:24.61#ibcon#wrote, iclass 13, count 2 2006.229.14:51:24.61#ibcon#about to read 3, iclass 13, count 2 2006.229.14:51:24.63#ibcon#read 3, iclass 13, count 2 2006.229.14:51:24.63#ibcon#about to read 4, iclass 13, count 2 2006.229.14:51:24.63#ibcon#read 4, iclass 13, count 2 2006.229.14:51:24.63#ibcon#about to read 5, iclass 13, count 2 2006.229.14:51:24.63#ibcon#read 5, iclass 13, count 2 2006.229.14:51:24.63#ibcon#about to read 6, iclass 13, count 2 2006.229.14:51:24.63#ibcon#read 6, iclass 13, count 2 2006.229.14:51:24.63#ibcon#end of sib2, iclass 13, count 2 2006.229.14:51:24.63#ibcon#*mode == 0, iclass 13, count 2 2006.229.14:51:24.63#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.14:51:24.63#ibcon#[27=AT03-04\r\n] 2006.229.14:51:24.63#ibcon#*before write, iclass 13, count 2 2006.229.14:51:24.63#ibcon#enter sib2, iclass 13, count 2 2006.229.14:51:24.63#ibcon#flushed, iclass 13, count 2 2006.229.14:51:24.63#ibcon#about to write, iclass 13, count 2 2006.229.14:51:24.63#ibcon#wrote, iclass 13, count 2 2006.229.14:51:24.63#ibcon#about to read 3, iclass 13, count 2 2006.229.14:51:24.66#ibcon#read 3, iclass 13, count 2 2006.229.14:51:24.66#ibcon#about to read 4, iclass 13, count 2 2006.229.14:51:24.66#ibcon#read 4, iclass 13, count 2 2006.229.14:51:24.66#ibcon#about to read 5, iclass 13, count 2 2006.229.14:51:24.66#ibcon#read 5, iclass 13, count 2 2006.229.14:51:24.66#ibcon#about to read 6, iclass 13, count 2 2006.229.14:51:24.66#ibcon#read 6, iclass 13, count 2 2006.229.14:51:24.66#ibcon#end of sib2, iclass 13, count 2 2006.229.14:51:24.66#ibcon#*after write, iclass 13, count 2 2006.229.14:51:24.66#ibcon#*before return 0, iclass 13, count 2 2006.229.14:51:24.66#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:24.66#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.14:51:24.66#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.14:51:24.66#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:24.66#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:24.78#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:24.78#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:24.78#ibcon#enter wrdev, iclass 13, count 0 2006.229.14:51:24.78#ibcon#first serial, iclass 13, count 0 2006.229.14:51:24.78#ibcon#enter sib2, iclass 13, count 0 2006.229.14:51:24.78#ibcon#flushed, iclass 13, count 0 2006.229.14:51:24.78#ibcon#about to write, iclass 13, count 0 2006.229.14:51:24.78#ibcon#wrote, iclass 13, count 0 2006.229.14:51:24.78#ibcon#about to read 3, iclass 13, count 0 2006.229.14:51:24.80#ibcon#read 3, iclass 13, count 0 2006.229.14:51:24.80#ibcon#about to read 4, iclass 13, count 0 2006.229.14:51:24.80#ibcon#read 4, iclass 13, count 0 2006.229.14:51:24.80#ibcon#about to read 5, iclass 13, count 0 2006.229.14:51:24.80#ibcon#read 5, iclass 13, count 0 2006.229.14:51:24.80#ibcon#about to read 6, iclass 13, count 0 2006.229.14:51:24.80#ibcon#read 6, iclass 13, count 0 2006.229.14:51:24.80#ibcon#end of sib2, iclass 13, count 0 2006.229.14:51:24.80#ibcon#*mode == 0, iclass 13, count 0 2006.229.14:51:24.80#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.14:51:24.80#ibcon#[27=USB\r\n] 2006.229.14:51:24.80#ibcon#*before write, iclass 13, count 0 2006.229.14:51:24.80#ibcon#enter sib2, iclass 13, count 0 2006.229.14:51:24.80#ibcon#flushed, iclass 13, count 0 2006.229.14:51:24.80#ibcon#about to write, iclass 13, count 0 2006.229.14:51:24.80#ibcon#wrote, iclass 13, count 0 2006.229.14:51:24.80#ibcon#about to read 3, iclass 13, count 0 2006.229.14:51:24.83#ibcon#read 3, iclass 13, count 0 2006.229.14:51:24.83#ibcon#about to read 4, iclass 13, count 0 2006.229.14:51:24.83#ibcon#read 4, iclass 13, count 0 2006.229.14:51:24.83#ibcon#about to read 5, iclass 13, count 0 2006.229.14:51:24.83#ibcon#read 5, iclass 13, count 0 2006.229.14:51:24.83#ibcon#about to read 6, iclass 13, count 0 2006.229.14:51:24.83#ibcon#read 6, iclass 13, count 0 2006.229.14:51:24.83#ibcon#end of sib2, iclass 13, count 0 2006.229.14:51:24.83#ibcon#*after write, iclass 13, count 0 2006.229.14:51:24.83#ibcon#*before return 0, iclass 13, count 0 2006.229.14:51:24.83#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:24.83#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.14:51:24.83#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.14:51:24.83#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.14:51:24.83$vck44/vblo=4,679.99 2006.229.14:51:24.83#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.14:51:24.83#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.14:51:24.83#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:24.83#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:24.83#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:24.83#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:24.83#ibcon#enter wrdev, iclass 15, count 0 2006.229.14:51:24.83#ibcon#first serial, iclass 15, count 0 2006.229.14:51:24.83#ibcon#enter sib2, iclass 15, count 0 2006.229.14:51:24.83#ibcon#flushed, iclass 15, count 0 2006.229.14:51:24.83#ibcon#about to write, iclass 15, count 0 2006.229.14:51:24.83#ibcon#wrote, iclass 15, count 0 2006.229.14:51:24.83#ibcon#about to read 3, iclass 15, count 0 2006.229.14:51:24.85#ibcon#read 3, iclass 15, count 0 2006.229.14:51:24.85#ibcon#about to read 4, iclass 15, count 0 2006.229.14:51:24.85#ibcon#read 4, iclass 15, count 0 2006.229.14:51:24.85#ibcon#about to read 5, iclass 15, count 0 2006.229.14:51:24.85#ibcon#read 5, iclass 15, count 0 2006.229.14:51:24.85#ibcon#about to read 6, iclass 15, count 0 2006.229.14:51:24.85#ibcon#read 6, iclass 15, count 0 2006.229.14:51:24.85#ibcon#end of sib2, iclass 15, count 0 2006.229.14:51:24.85#ibcon#*mode == 0, iclass 15, count 0 2006.229.14:51:24.85#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.14:51:24.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:51:24.85#ibcon#*before write, iclass 15, count 0 2006.229.14:51:24.85#ibcon#enter sib2, iclass 15, count 0 2006.229.14:51:24.85#ibcon#flushed, iclass 15, count 0 2006.229.14:51:24.85#ibcon#about to write, iclass 15, count 0 2006.229.14:51:24.85#ibcon#wrote, iclass 15, count 0 2006.229.14:51:24.85#ibcon#about to read 3, iclass 15, count 0 2006.229.14:51:24.89#ibcon#read 3, iclass 15, count 0 2006.229.14:51:24.89#ibcon#about to read 4, iclass 15, count 0 2006.229.14:51:24.89#ibcon#read 4, iclass 15, count 0 2006.229.14:51:24.89#ibcon#about to read 5, iclass 15, count 0 2006.229.14:51:24.89#ibcon#read 5, iclass 15, count 0 2006.229.14:51:24.89#ibcon#about to read 6, iclass 15, count 0 2006.229.14:51:24.89#ibcon#read 6, iclass 15, count 0 2006.229.14:51:24.89#ibcon#end of sib2, iclass 15, count 0 2006.229.14:51:24.89#ibcon#*after write, iclass 15, count 0 2006.229.14:51:24.89#ibcon#*before return 0, iclass 15, count 0 2006.229.14:51:24.89#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:24.89#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.14:51:24.89#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.14:51:24.89#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.14:51:24.89$vck44/vb=4,4 2006.229.14:51:24.89#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.14:51:24.89#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.14:51:24.89#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:24.89#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:24.95#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:24.95#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:24.95#ibcon#enter wrdev, iclass 17, count 2 2006.229.14:51:24.95#ibcon#first serial, iclass 17, count 2 2006.229.14:51:24.95#ibcon#enter sib2, iclass 17, count 2 2006.229.14:51:24.95#ibcon#flushed, iclass 17, count 2 2006.229.14:51:24.95#ibcon#about to write, iclass 17, count 2 2006.229.14:51:24.95#ibcon#wrote, iclass 17, count 2 2006.229.14:51:24.95#ibcon#about to read 3, iclass 17, count 2 2006.229.14:51:24.97#ibcon#read 3, iclass 17, count 2 2006.229.14:51:24.97#ibcon#about to read 4, iclass 17, count 2 2006.229.14:51:24.97#ibcon#read 4, iclass 17, count 2 2006.229.14:51:24.97#ibcon#about to read 5, iclass 17, count 2 2006.229.14:51:24.97#ibcon#read 5, iclass 17, count 2 2006.229.14:51:24.97#ibcon#about to read 6, iclass 17, count 2 2006.229.14:51:24.97#ibcon#read 6, iclass 17, count 2 2006.229.14:51:24.97#ibcon#end of sib2, iclass 17, count 2 2006.229.14:51:24.97#ibcon#*mode == 0, iclass 17, count 2 2006.229.14:51:24.97#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.14:51:24.97#ibcon#[27=AT04-04\r\n] 2006.229.14:51:24.97#ibcon#*before write, iclass 17, count 2 2006.229.14:51:24.97#ibcon#enter sib2, iclass 17, count 2 2006.229.14:51:24.97#ibcon#flushed, iclass 17, count 2 2006.229.14:51:24.97#ibcon#about to write, iclass 17, count 2 2006.229.14:51:24.97#ibcon#wrote, iclass 17, count 2 2006.229.14:51:24.97#ibcon#about to read 3, iclass 17, count 2 2006.229.14:51:25.00#ibcon#read 3, iclass 17, count 2 2006.229.14:51:25.00#ibcon#about to read 4, iclass 17, count 2 2006.229.14:51:25.00#ibcon#read 4, iclass 17, count 2 2006.229.14:51:25.00#ibcon#about to read 5, iclass 17, count 2 2006.229.14:51:25.00#ibcon#read 5, iclass 17, count 2 2006.229.14:51:25.00#ibcon#about to read 6, iclass 17, count 2 2006.229.14:51:25.00#ibcon#read 6, iclass 17, count 2 2006.229.14:51:25.00#ibcon#end of sib2, iclass 17, count 2 2006.229.14:51:25.00#ibcon#*after write, iclass 17, count 2 2006.229.14:51:25.00#ibcon#*before return 0, iclass 17, count 2 2006.229.14:51:25.00#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:25.00#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.14:51:25.00#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.14:51:25.00#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:25.00#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:25.12#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:25.12#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:25.12#ibcon#enter wrdev, iclass 17, count 0 2006.229.14:51:25.12#ibcon#first serial, iclass 17, count 0 2006.229.14:51:25.12#ibcon#enter sib2, iclass 17, count 0 2006.229.14:51:25.12#ibcon#flushed, iclass 17, count 0 2006.229.14:51:25.12#ibcon#about to write, iclass 17, count 0 2006.229.14:51:25.12#ibcon#wrote, iclass 17, count 0 2006.229.14:51:25.12#ibcon#about to read 3, iclass 17, count 0 2006.229.14:51:25.14#ibcon#read 3, iclass 17, count 0 2006.229.14:51:25.14#ibcon#about to read 4, iclass 17, count 0 2006.229.14:51:25.14#ibcon#read 4, iclass 17, count 0 2006.229.14:51:25.14#ibcon#about to read 5, iclass 17, count 0 2006.229.14:51:25.14#ibcon#read 5, iclass 17, count 0 2006.229.14:51:25.14#ibcon#about to read 6, iclass 17, count 0 2006.229.14:51:25.14#ibcon#read 6, iclass 17, count 0 2006.229.14:51:25.14#ibcon#end of sib2, iclass 17, count 0 2006.229.14:51:25.14#ibcon#*mode == 0, iclass 17, count 0 2006.229.14:51:25.14#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.14:51:25.14#ibcon#[27=USB\r\n] 2006.229.14:51:25.14#ibcon#*before write, iclass 17, count 0 2006.229.14:51:25.14#ibcon#enter sib2, iclass 17, count 0 2006.229.14:51:25.14#ibcon#flushed, iclass 17, count 0 2006.229.14:51:25.14#ibcon#about to write, iclass 17, count 0 2006.229.14:51:25.14#ibcon#wrote, iclass 17, count 0 2006.229.14:51:25.14#ibcon#about to read 3, iclass 17, count 0 2006.229.14:51:25.17#ibcon#read 3, iclass 17, count 0 2006.229.14:51:25.17#ibcon#about to read 4, iclass 17, count 0 2006.229.14:51:25.17#ibcon#read 4, iclass 17, count 0 2006.229.14:51:25.17#ibcon#about to read 5, iclass 17, count 0 2006.229.14:51:25.17#ibcon#read 5, iclass 17, count 0 2006.229.14:51:25.17#ibcon#about to read 6, iclass 17, count 0 2006.229.14:51:25.17#ibcon#read 6, iclass 17, count 0 2006.229.14:51:25.17#ibcon#end of sib2, iclass 17, count 0 2006.229.14:51:25.17#ibcon#*after write, iclass 17, count 0 2006.229.14:51:25.17#ibcon#*before return 0, iclass 17, count 0 2006.229.14:51:25.17#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:25.17#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.14:51:25.17#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.14:51:25.17#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.14:51:25.17$vck44/vblo=5,709.99 2006.229.14:51:25.17#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.14:51:25.17#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.14:51:25.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:25.17#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:25.17#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:25.17#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:25.17#ibcon#enter wrdev, iclass 19, count 0 2006.229.14:51:25.17#ibcon#first serial, iclass 19, count 0 2006.229.14:51:25.17#ibcon#enter sib2, iclass 19, count 0 2006.229.14:51:25.17#ibcon#flushed, iclass 19, count 0 2006.229.14:51:25.17#ibcon#about to write, iclass 19, count 0 2006.229.14:51:25.17#ibcon#wrote, iclass 19, count 0 2006.229.14:51:25.17#ibcon#about to read 3, iclass 19, count 0 2006.229.14:51:25.19#ibcon#read 3, iclass 19, count 0 2006.229.14:51:25.19#ibcon#about to read 4, iclass 19, count 0 2006.229.14:51:25.19#ibcon#read 4, iclass 19, count 0 2006.229.14:51:25.19#ibcon#about to read 5, iclass 19, count 0 2006.229.14:51:25.19#ibcon#read 5, iclass 19, count 0 2006.229.14:51:25.19#ibcon#about to read 6, iclass 19, count 0 2006.229.14:51:25.19#ibcon#read 6, iclass 19, count 0 2006.229.14:51:25.19#ibcon#end of sib2, iclass 19, count 0 2006.229.14:51:25.19#ibcon#*mode == 0, iclass 19, count 0 2006.229.14:51:25.19#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.14:51:25.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:51:25.19#ibcon#*before write, iclass 19, count 0 2006.229.14:51:25.19#ibcon#enter sib2, iclass 19, count 0 2006.229.14:51:25.19#ibcon#flushed, iclass 19, count 0 2006.229.14:51:25.19#ibcon#about to write, iclass 19, count 0 2006.229.14:51:25.19#ibcon#wrote, iclass 19, count 0 2006.229.14:51:25.19#ibcon#about to read 3, iclass 19, count 0 2006.229.14:51:25.23#ibcon#read 3, iclass 19, count 0 2006.229.14:51:25.23#ibcon#about to read 4, iclass 19, count 0 2006.229.14:51:25.23#ibcon#read 4, iclass 19, count 0 2006.229.14:51:25.23#ibcon#about to read 5, iclass 19, count 0 2006.229.14:51:25.23#ibcon#read 5, iclass 19, count 0 2006.229.14:51:25.23#ibcon#about to read 6, iclass 19, count 0 2006.229.14:51:25.23#ibcon#read 6, iclass 19, count 0 2006.229.14:51:25.23#ibcon#end of sib2, iclass 19, count 0 2006.229.14:51:25.23#ibcon#*after write, iclass 19, count 0 2006.229.14:51:25.23#ibcon#*before return 0, iclass 19, count 0 2006.229.14:51:25.23#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:25.23#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.14:51:25.23#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.14:51:25.23#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.14:51:25.23$vck44/vb=5,4 2006.229.14:51:25.23#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.14:51:25.23#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.14:51:25.23#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:25.23#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:25.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:25.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:25.29#ibcon#enter wrdev, iclass 21, count 2 2006.229.14:51:25.29#ibcon#first serial, iclass 21, count 2 2006.229.14:51:25.29#ibcon#enter sib2, iclass 21, count 2 2006.229.14:51:25.29#ibcon#flushed, iclass 21, count 2 2006.229.14:51:25.29#ibcon#about to write, iclass 21, count 2 2006.229.14:51:25.29#ibcon#wrote, iclass 21, count 2 2006.229.14:51:25.29#ibcon#about to read 3, iclass 21, count 2 2006.229.14:51:25.31#ibcon#read 3, iclass 21, count 2 2006.229.14:51:25.31#ibcon#about to read 4, iclass 21, count 2 2006.229.14:51:25.31#ibcon#read 4, iclass 21, count 2 2006.229.14:51:25.31#ibcon#about to read 5, iclass 21, count 2 2006.229.14:51:25.31#ibcon#read 5, iclass 21, count 2 2006.229.14:51:25.31#ibcon#about to read 6, iclass 21, count 2 2006.229.14:51:25.31#ibcon#read 6, iclass 21, count 2 2006.229.14:51:25.31#ibcon#end of sib2, iclass 21, count 2 2006.229.14:51:25.31#ibcon#*mode == 0, iclass 21, count 2 2006.229.14:51:25.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.14:51:25.31#ibcon#[27=AT05-04\r\n] 2006.229.14:51:25.31#ibcon#*before write, iclass 21, count 2 2006.229.14:51:25.31#ibcon#enter sib2, iclass 21, count 2 2006.229.14:51:25.31#ibcon#flushed, iclass 21, count 2 2006.229.14:51:25.31#ibcon#about to write, iclass 21, count 2 2006.229.14:51:25.31#ibcon#wrote, iclass 21, count 2 2006.229.14:51:25.31#ibcon#about to read 3, iclass 21, count 2 2006.229.14:51:25.34#ibcon#read 3, iclass 21, count 2 2006.229.14:51:25.34#ibcon#about to read 4, iclass 21, count 2 2006.229.14:51:25.34#ibcon#read 4, iclass 21, count 2 2006.229.14:51:25.34#ibcon#about to read 5, iclass 21, count 2 2006.229.14:51:25.34#ibcon#read 5, iclass 21, count 2 2006.229.14:51:25.34#ibcon#about to read 6, iclass 21, count 2 2006.229.14:51:25.34#ibcon#read 6, iclass 21, count 2 2006.229.14:51:25.34#ibcon#end of sib2, iclass 21, count 2 2006.229.14:51:25.34#ibcon#*after write, iclass 21, count 2 2006.229.14:51:25.34#ibcon#*before return 0, iclass 21, count 2 2006.229.14:51:25.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:25.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.14:51:25.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.14:51:25.34#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:25.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:25.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:25.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:25.46#ibcon#enter wrdev, iclass 21, count 0 2006.229.14:51:25.46#ibcon#first serial, iclass 21, count 0 2006.229.14:51:25.46#ibcon#enter sib2, iclass 21, count 0 2006.229.14:51:25.46#ibcon#flushed, iclass 21, count 0 2006.229.14:51:25.46#ibcon#about to write, iclass 21, count 0 2006.229.14:51:25.46#ibcon#wrote, iclass 21, count 0 2006.229.14:51:25.46#ibcon#about to read 3, iclass 21, count 0 2006.229.14:51:25.48#ibcon#read 3, iclass 21, count 0 2006.229.14:51:25.48#ibcon#about to read 4, iclass 21, count 0 2006.229.14:51:25.48#ibcon#read 4, iclass 21, count 0 2006.229.14:51:25.48#ibcon#about to read 5, iclass 21, count 0 2006.229.14:51:25.48#ibcon#read 5, iclass 21, count 0 2006.229.14:51:25.48#ibcon#about to read 6, iclass 21, count 0 2006.229.14:51:25.48#ibcon#read 6, iclass 21, count 0 2006.229.14:51:25.48#ibcon#end of sib2, iclass 21, count 0 2006.229.14:51:25.48#ibcon#*mode == 0, iclass 21, count 0 2006.229.14:51:25.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.14:51:25.48#ibcon#[27=USB\r\n] 2006.229.14:51:25.48#ibcon#*before write, iclass 21, count 0 2006.229.14:51:25.48#ibcon#enter sib2, iclass 21, count 0 2006.229.14:51:25.48#ibcon#flushed, iclass 21, count 0 2006.229.14:51:25.48#ibcon#about to write, iclass 21, count 0 2006.229.14:51:25.48#ibcon#wrote, iclass 21, count 0 2006.229.14:51:25.48#ibcon#about to read 3, iclass 21, count 0 2006.229.14:51:25.51#ibcon#read 3, iclass 21, count 0 2006.229.14:51:25.51#ibcon#about to read 4, iclass 21, count 0 2006.229.14:51:25.51#ibcon#read 4, iclass 21, count 0 2006.229.14:51:25.51#ibcon#about to read 5, iclass 21, count 0 2006.229.14:51:25.51#ibcon#read 5, iclass 21, count 0 2006.229.14:51:25.51#ibcon#about to read 6, iclass 21, count 0 2006.229.14:51:25.51#ibcon#read 6, iclass 21, count 0 2006.229.14:51:25.51#ibcon#end of sib2, iclass 21, count 0 2006.229.14:51:25.51#ibcon#*after write, iclass 21, count 0 2006.229.14:51:25.51#ibcon#*before return 0, iclass 21, count 0 2006.229.14:51:25.51#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:25.51#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.14:51:25.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.14:51:25.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.14:51:25.51$vck44/vblo=6,719.99 2006.229.14:51:25.51#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.14:51:25.51#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.14:51:25.51#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:25.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:25.51#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:25.51#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:25.51#ibcon#enter wrdev, iclass 23, count 0 2006.229.14:51:25.51#ibcon#first serial, iclass 23, count 0 2006.229.14:51:25.51#ibcon#enter sib2, iclass 23, count 0 2006.229.14:51:25.51#ibcon#flushed, iclass 23, count 0 2006.229.14:51:25.51#ibcon#about to write, iclass 23, count 0 2006.229.14:51:25.51#ibcon#wrote, iclass 23, count 0 2006.229.14:51:25.51#ibcon#about to read 3, iclass 23, count 0 2006.229.14:51:25.53#ibcon#read 3, iclass 23, count 0 2006.229.14:51:25.53#ibcon#about to read 4, iclass 23, count 0 2006.229.14:51:25.53#ibcon#read 4, iclass 23, count 0 2006.229.14:51:25.53#ibcon#about to read 5, iclass 23, count 0 2006.229.14:51:25.53#ibcon#read 5, iclass 23, count 0 2006.229.14:51:25.53#ibcon#about to read 6, iclass 23, count 0 2006.229.14:51:25.53#ibcon#read 6, iclass 23, count 0 2006.229.14:51:25.53#ibcon#end of sib2, iclass 23, count 0 2006.229.14:51:25.53#ibcon#*mode == 0, iclass 23, count 0 2006.229.14:51:25.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.14:51:25.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:51:25.53#ibcon#*before write, iclass 23, count 0 2006.229.14:51:25.53#ibcon#enter sib2, iclass 23, count 0 2006.229.14:51:25.53#ibcon#flushed, iclass 23, count 0 2006.229.14:51:25.53#ibcon#about to write, iclass 23, count 0 2006.229.14:51:25.53#ibcon#wrote, iclass 23, count 0 2006.229.14:51:25.53#ibcon#about to read 3, iclass 23, count 0 2006.229.14:51:25.57#ibcon#read 3, iclass 23, count 0 2006.229.14:51:25.57#ibcon#about to read 4, iclass 23, count 0 2006.229.14:51:25.57#ibcon#read 4, iclass 23, count 0 2006.229.14:51:25.57#ibcon#about to read 5, iclass 23, count 0 2006.229.14:51:25.57#ibcon#read 5, iclass 23, count 0 2006.229.14:51:25.57#ibcon#about to read 6, iclass 23, count 0 2006.229.14:51:25.57#ibcon#read 6, iclass 23, count 0 2006.229.14:51:25.57#ibcon#end of sib2, iclass 23, count 0 2006.229.14:51:25.57#ibcon#*after write, iclass 23, count 0 2006.229.14:51:25.57#ibcon#*before return 0, iclass 23, count 0 2006.229.14:51:25.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:25.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.14:51:25.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.14:51:25.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.14:51:25.57$vck44/vb=6,4 2006.229.14:51:25.57#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.14:51:25.57#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.14:51:25.57#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:25.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:25.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:25.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:25.63#ibcon#enter wrdev, iclass 25, count 2 2006.229.14:51:25.63#ibcon#first serial, iclass 25, count 2 2006.229.14:51:25.63#ibcon#enter sib2, iclass 25, count 2 2006.229.14:51:25.63#ibcon#flushed, iclass 25, count 2 2006.229.14:51:25.63#ibcon#about to write, iclass 25, count 2 2006.229.14:51:25.63#ibcon#wrote, iclass 25, count 2 2006.229.14:51:25.63#ibcon#about to read 3, iclass 25, count 2 2006.229.14:51:25.65#ibcon#read 3, iclass 25, count 2 2006.229.14:51:25.65#ibcon#about to read 4, iclass 25, count 2 2006.229.14:51:25.65#ibcon#read 4, iclass 25, count 2 2006.229.14:51:25.65#ibcon#about to read 5, iclass 25, count 2 2006.229.14:51:25.65#ibcon#read 5, iclass 25, count 2 2006.229.14:51:25.65#ibcon#about to read 6, iclass 25, count 2 2006.229.14:51:25.65#ibcon#read 6, iclass 25, count 2 2006.229.14:51:25.65#ibcon#end of sib2, iclass 25, count 2 2006.229.14:51:25.65#ibcon#*mode == 0, iclass 25, count 2 2006.229.14:51:25.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.14:51:25.65#ibcon#[27=AT06-04\r\n] 2006.229.14:51:25.65#ibcon#*before write, iclass 25, count 2 2006.229.14:51:25.65#ibcon#enter sib2, iclass 25, count 2 2006.229.14:51:25.65#ibcon#flushed, iclass 25, count 2 2006.229.14:51:25.65#ibcon#about to write, iclass 25, count 2 2006.229.14:51:25.65#ibcon#wrote, iclass 25, count 2 2006.229.14:51:25.65#ibcon#about to read 3, iclass 25, count 2 2006.229.14:51:25.68#ibcon#read 3, iclass 25, count 2 2006.229.14:51:25.68#ibcon#about to read 4, iclass 25, count 2 2006.229.14:51:25.68#ibcon#read 4, iclass 25, count 2 2006.229.14:51:25.68#ibcon#about to read 5, iclass 25, count 2 2006.229.14:51:25.68#ibcon#read 5, iclass 25, count 2 2006.229.14:51:25.68#ibcon#about to read 6, iclass 25, count 2 2006.229.14:51:25.68#ibcon#read 6, iclass 25, count 2 2006.229.14:51:25.68#ibcon#end of sib2, iclass 25, count 2 2006.229.14:51:25.68#ibcon#*after write, iclass 25, count 2 2006.229.14:51:25.68#ibcon#*before return 0, iclass 25, count 2 2006.229.14:51:25.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:25.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.14:51:25.68#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.14:51:25.68#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:25.68#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:25.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:25.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:25.80#ibcon#enter wrdev, iclass 25, count 0 2006.229.14:51:25.80#ibcon#first serial, iclass 25, count 0 2006.229.14:51:25.80#ibcon#enter sib2, iclass 25, count 0 2006.229.14:51:25.80#ibcon#flushed, iclass 25, count 0 2006.229.14:51:25.80#ibcon#about to write, iclass 25, count 0 2006.229.14:51:25.80#ibcon#wrote, iclass 25, count 0 2006.229.14:51:25.80#ibcon#about to read 3, iclass 25, count 0 2006.229.14:51:25.82#ibcon#read 3, iclass 25, count 0 2006.229.14:51:25.82#ibcon#about to read 4, iclass 25, count 0 2006.229.14:51:25.82#ibcon#read 4, iclass 25, count 0 2006.229.14:51:25.82#ibcon#about to read 5, iclass 25, count 0 2006.229.14:51:25.82#ibcon#read 5, iclass 25, count 0 2006.229.14:51:25.82#ibcon#about to read 6, iclass 25, count 0 2006.229.14:51:25.82#ibcon#read 6, iclass 25, count 0 2006.229.14:51:25.82#ibcon#end of sib2, iclass 25, count 0 2006.229.14:51:25.82#ibcon#*mode == 0, iclass 25, count 0 2006.229.14:51:25.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.14:51:25.82#ibcon#[27=USB\r\n] 2006.229.14:51:25.82#ibcon#*before write, iclass 25, count 0 2006.229.14:51:25.82#ibcon#enter sib2, iclass 25, count 0 2006.229.14:51:25.82#ibcon#flushed, iclass 25, count 0 2006.229.14:51:25.82#ibcon#about to write, iclass 25, count 0 2006.229.14:51:25.82#ibcon#wrote, iclass 25, count 0 2006.229.14:51:25.82#ibcon#about to read 3, iclass 25, count 0 2006.229.14:51:25.85#ibcon#read 3, iclass 25, count 0 2006.229.14:51:25.85#ibcon#about to read 4, iclass 25, count 0 2006.229.14:51:25.85#ibcon#read 4, iclass 25, count 0 2006.229.14:51:25.85#ibcon#about to read 5, iclass 25, count 0 2006.229.14:51:25.85#ibcon#read 5, iclass 25, count 0 2006.229.14:51:25.85#ibcon#about to read 6, iclass 25, count 0 2006.229.14:51:25.85#ibcon#read 6, iclass 25, count 0 2006.229.14:51:25.85#ibcon#end of sib2, iclass 25, count 0 2006.229.14:51:25.85#ibcon#*after write, iclass 25, count 0 2006.229.14:51:25.85#ibcon#*before return 0, iclass 25, count 0 2006.229.14:51:25.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:25.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.14:51:25.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.14:51:25.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.14:51:25.85$vck44/vblo=7,734.99 2006.229.14:51:25.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.14:51:25.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.14:51:25.85#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:25.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:25.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:25.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:25.85#ibcon#enter wrdev, iclass 27, count 0 2006.229.14:51:25.85#ibcon#first serial, iclass 27, count 0 2006.229.14:51:25.85#ibcon#enter sib2, iclass 27, count 0 2006.229.14:51:25.85#ibcon#flushed, iclass 27, count 0 2006.229.14:51:25.85#ibcon#about to write, iclass 27, count 0 2006.229.14:51:25.85#ibcon#wrote, iclass 27, count 0 2006.229.14:51:25.85#ibcon#about to read 3, iclass 27, count 0 2006.229.14:51:25.87#ibcon#read 3, iclass 27, count 0 2006.229.14:51:25.87#ibcon#about to read 4, iclass 27, count 0 2006.229.14:51:25.87#ibcon#read 4, iclass 27, count 0 2006.229.14:51:25.87#ibcon#about to read 5, iclass 27, count 0 2006.229.14:51:25.87#ibcon#read 5, iclass 27, count 0 2006.229.14:51:25.87#ibcon#about to read 6, iclass 27, count 0 2006.229.14:51:25.87#ibcon#read 6, iclass 27, count 0 2006.229.14:51:25.87#ibcon#end of sib2, iclass 27, count 0 2006.229.14:51:25.87#ibcon#*mode == 0, iclass 27, count 0 2006.229.14:51:25.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.14:51:25.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:51:25.87#ibcon#*before write, iclass 27, count 0 2006.229.14:51:25.87#ibcon#enter sib2, iclass 27, count 0 2006.229.14:51:25.87#ibcon#flushed, iclass 27, count 0 2006.229.14:51:25.87#ibcon#about to write, iclass 27, count 0 2006.229.14:51:25.87#ibcon#wrote, iclass 27, count 0 2006.229.14:51:25.87#ibcon#about to read 3, iclass 27, count 0 2006.229.14:51:25.91#ibcon#read 3, iclass 27, count 0 2006.229.14:51:25.91#ibcon#about to read 4, iclass 27, count 0 2006.229.14:51:25.91#ibcon#read 4, iclass 27, count 0 2006.229.14:51:25.91#ibcon#about to read 5, iclass 27, count 0 2006.229.14:51:25.91#ibcon#read 5, iclass 27, count 0 2006.229.14:51:25.91#ibcon#about to read 6, iclass 27, count 0 2006.229.14:51:25.91#ibcon#read 6, iclass 27, count 0 2006.229.14:51:25.91#ibcon#end of sib2, iclass 27, count 0 2006.229.14:51:25.91#ibcon#*after write, iclass 27, count 0 2006.229.14:51:25.91#ibcon#*before return 0, iclass 27, count 0 2006.229.14:51:25.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:25.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.14:51:25.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.14:51:25.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.14:51:25.91$vck44/vb=7,4 2006.229.14:51:25.91#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.14:51:25.91#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.14:51:25.91#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:25.91#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:25.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:25.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:25.97#ibcon#enter wrdev, iclass 29, count 2 2006.229.14:51:25.97#ibcon#first serial, iclass 29, count 2 2006.229.14:51:25.97#ibcon#enter sib2, iclass 29, count 2 2006.229.14:51:25.97#ibcon#flushed, iclass 29, count 2 2006.229.14:51:25.97#ibcon#about to write, iclass 29, count 2 2006.229.14:51:25.97#ibcon#wrote, iclass 29, count 2 2006.229.14:51:25.97#ibcon#about to read 3, iclass 29, count 2 2006.229.14:51:25.99#ibcon#read 3, iclass 29, count 2 2006.229.14:51:25.99#ibcon#about to read 4, iclass 29, count 2 2006.229.14:51:25.99#ibcon#read 4, iclass 29, count 2 2006.229.14:51:25.99#ibcon#about to read 5, iclass 29, count 2 2006.229.14:51:25.99#ibcon#read 5, iclass 29, count 2 2006.229.14:51:25.99#ibcon#about to read 6, iclass 29, count 2 2006.229.14:51:25.99#ibcon#read 6, iclass 29, count 2 2006.229.14:51:25.99#ibcon#end of sib2, iclass 29, count 2 2006.229.14:51:25.99#ibcon#*mode == 0, iclass 29, count 2 2006.229.14:51:25.99#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.14:51:25.99#ibcon#[27=AT07-04\r\n] 2006.229.14:51:25.99#ibcon#*before write, iclass 29, count 2 2006.229.14:51:25.99#ibcon#enter sib2, iclass 29, count 2 2006.229.14:51:25.99#ibcon#flushed, iclass 29, count 2 2006.229.14:51:25.99#ibcon#about to write, iclass 29, count 2 2006.229.14:51:25.99#ibcon#wrote, iclass 29, count 2 2006.229.14:51:25.99#ibcon#about to read 3, iclass 29, count 2 2006.229.14:51:26.02#ibcon#read 3, iclass 29, count 2 2006.229.14:51:26.02#ibcon#about to read 4, iclass 29, count 2 2006.229.14:51:26.02#ibcon#read 4, iclass 29, count 2 2006.229.14:51:26.02#ibcon#about to read 5, iclass 29, count 2 2006.229.14:51:26.02#ibcon#read 5, iclass 29, count 2 2006.229.14:51:26.02#ibcon#about to read 6, iclass 29, count 2 2006.229.14:51:26.02#ibcon#read 6, iclass 29, count 2 2006.229.14:51:26.02#ibcon#end of sib2, iclass 29, count 2 2006.229.14:51:26.02#ibcon#*after write, iclass 29, count 2 2006.229.14:51:26.02#ibcon#*before return 0, iclass 29, count 2 2006.229.14:51:26.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:26.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.14:51:26.02#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.14:51:26.02#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:26.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:26.14#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:26.14#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:26.14#ibcon#enter wrdev, iclass 29, count 0 2006.229.14:51:26.14#ibcon#first serial, iclass 29, count 0 2006.229.14:51:26.14#ibcon#enter sib2, iclass 29, count 0 2006.229.14:51:26.14#ibcon#flushed, iclass 29, count 0 2006.229.14:51:26.14#ibcon#about to write, iclass 29, count 0 2006.229.14:51:26.14#ibcon#wrote, iclass 29, count 0 2006.229.14:51:26.14#ibcon#about to read 3, iclass 29, count 0 2006.229.14:51:26.16#ibcon#read 3, iclass 29, count 0 2006.229.14:51:26.16#ibcon#about to read 4, iclass 29, count 0 2006.229.14:51:26.16#ibcon#read 4, iclass 29, count 0 2006.229.14:51:26.16#ibcon#about to read 5, iclass 29, count 0 2006.229.14:51:26.16#ibcon#read 5, iclass 29, count 0 2006.229.14:51:26.16#ibcon#about to read 6, iclass 29, count 0 2006.229.14:51:26.16#ibcon#read 6, iclass 29, count 0 2006.229.14:51:26.16#ibcon#end of sib2, iclass 29, count 0 2006.229.14:51:26.16#ibcon#*mode == 0, iclass 29, count 0 2006.229.14:51:26.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.14:51:26.16#ibcon#[27=USB\r\n] 2006.229.14:51:26.16#ibcon#*before write, iclass 29, count 0 2006.229.14:51:26.16#ibcon#enter sib2, iclass 29, count 0 2006.229.14:51:26.16#ibcon#flushed, iclass 29, count 0 2006.229.14:51:26.16#ibcon#about to write, iclass 29, count 0 2006.229.14:51:26.16#ibcon#wrote, iclass 29, count 0 2006.229.14:51:26.16#ibcon#about to read 3, iclass 29, count 0 2006.229.14:51:26.19#ibcon#read 3, iclass 29, count 0 2006.229.14:51:26.19#ibcon#about to read 4, iclass 29, count 0 2006.229.14:51:26.19#ibcon#read 4, iclass 29, count 0 2006.229.14:51:26.19#ibcon#about to read 5, iclass 29, count 0 2006.229.14:51:26.19#ibcon#read 5, iclass 29, count 0 2006.229.14:51:26.19#ibcon#about to read 6, iclass 29, count 0 2006.229.14:51:26.19#ibcon#read 6, iclass 29, count 0 2006.229.14:51:26.19#ibcon#end of sib2, iclass 29, count 0 2006.229.14:51:26.19#ibcon#*after write, iclass 29, count 0 2006.229.14:51:26.19#ibcon#*before return 0, iclass 29, count 0 2006.229.14:51:26.19#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:26.19#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.14:51:26.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.14:51:26.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.14:51:26.19$vck44/vblo=8,744.99 2006.229.14:51:26.19#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.14:51:26.19#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.14:51:26.19#ibcon#ireg 17 cls_cnt 0 2006.229.14:51:26.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:26.19#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:26.19#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:26.19#ibcon#enter wrdev, iclass 31, count 0 2006.229.14:51:26.19#ibcon#first serial, iclass 31, count 0 2006.229.14:51:26.19#ibcon#enter sib2, iclass 31, count 0 2006.229.14:51:26.19#ibcon#flushed, iclass 31, count 0 2006.229.14:51:26.19#ibcon#about to write, iclass 31, count 0 2006.229.14:51:26.19#ibcon#wrote, iclass 31, count 0 2006.229.14:51:26.19#ibcon#about to read 3, iclass 31, count 0 2006.229.14:51:26.21#ibcon#read 3, iclass 31, count 0 2006.229.14:51:26.21#ibcon#about to read 4, iclass 31, count 0 2006.229.14:51:26.21#ibcon#read 4, iclass 31, count 0 2006.229.14:51:26.21#ibcon#about to read 5, iclass 31, count 0 2006.229.14:51:26.21#ibcon#read 5, iclass 31, count 0 2006.229.14:51:26.21#ibcon#about to read 6, iclass 31, count 0 2006.229.14:51:26.21#ibcon#read 6, iclass 31, count 0 2006.229.14:51:26.21#ibcon#end of sib2, iclass 31, count 0 2006.229.14:51:26.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.14:51:26.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.14:51:26.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:51:26.21#ibcon#*before write, iclass 31, count 0 2006.229.14:51:26.21#ibcon#enter sib2, iclass 31, count 0 2006.229.14:51:26.21#ibcon#flushed, iclass 31, count 0 2006.229.14:51:26.21#ibcon#about to write, iclass 31, count 0 2006.229.14:51:26.21#ibcon#wrote, iclass 31, count 0 2006.229.14:51:26.21#ibcon#about to read 3, iclass 31, count 0 2006.229.14:51:26.25#ibcon#read 3, iclass 31, count 0 2006.229.14:51:26.25#ibcon#about to read 4, iclass 31, count 0 2006.229.14:51:26.25#ibcon#read 4, iclass 31, count 0 2006.229.14:51:26.25#ibcon#about to read 5, iclass 31, count 0 2006.229.14:51:26.25#ibcon#read 5, iclass 31, count 0 2006.229.14:51:26.25#ibcon#about to read 6, iclass 31, count 0 2006.229.14:51:26.25#ibcon#read 6, iclass 31, count 0 2006.229.14:51:26.25#ibcon#end of sib2, iclass 31, count 0 2006.229.14:51:26.25#ibcon#*after write, iclass 31, count 0 2006.229.14:51:26.25#ibcon#*before return 0, iclass 31, count 0 2006.229.14:51:26.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:26.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.14:51:26.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.14:51:26.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.14:51:26.25$vck44/vb=8,4 2006.229.14:51:26.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.14:51:26.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.14:51:26.25#ibcon#ireg 11 cls_cnt 2 2006.229.14:51:26.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:26.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:26.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:26.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.14:51:26.31#ibcon#first serial, iclass 33, count 2 2006.229.14:51:26.31#ibcon#enter sib2, iclass 33, count 2 2006.229.14:51:26.31#ibcon#flushed, iclass 33, count 2 2006.229.14:51:26.31#ibcon#about to write, iclass 33, count 2 2006.229.14:51:26.31#ibcon#wrote, iclass 33, count 2 2006.229.14:51:26.31#ibcon#about to read 3, iclass 33, count 2 2006.229.14:51:26.33#ibcon#read 3, iclass 33, count 2 2006.229.14:51:26.33#ibcon#about to read 4, iclass 33, count 2 2006.229.14:51:26.33#ibcon#read 4, iclass 33, count 2 2006.229.14:51:26.33#ibcon#about to read 5, iclass 33, count 2 2006.229.14:51:26.33#ibcon#read 5, iclass 33, count 2 2006.229.14:51:26.33#ibcon#about to read 6, iclass 33, count 2 2006.229.14:51:26.33#ibcon#read 6, iclass 33, count 2 2006.229.14:51:26.33#ibcon#end of sib2, iclass 33, count 2 2006.229.14:51:26.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.14:51:26.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.14:51:26.33#ibcon#[27=AT08-04\r\n] 2006.229.14:51:26.33#ibcon#*before write, iclass 33, count 2 2006.229.14:51:26.33#ibcon#enter sib2, iclass 33, count 2 2006.229.14:51:26.33#ibcon#flushed, iclass 33, count 2 2006.229.14:51:26.33#ibcon#about to write, iclass 33, count 2 2006.229.14:51:26.33#ibcon#wrote, iclass 33, count 2 2006.229.14:51:26.33#ibcon#about to read 3, iclass 33, count 2 2006.229.14:51:26.36#ibcon#read 3, iclass 33, count 2 2006.229.14:51:26.36#ibcon#about to read 4, iclass 33, count 2 2006.229.14:51:26.36#ibcon#read 4, iclass 33, count 2 2006.229.14:51:26.36#ibcon#about to read 5, iclass 33, count 2 2006.229.14:51:26.36#ibcon#read 5, iclass 33, count 2 2006.229.14:51:26.36#ibcon#about to read 6, iclass 33, count 2 2006.229.14:51:26.36#ibcon#read 6, iclass 33, count 2 2006.229.14:51:26.36#ibcon#end of sib2, iclass 33, count 2 2006.229.14:51:26.36#ibcon#*after write, iclass 33, count 2 2006.229.14:51:26.36#ibcon#*before return 0, iclass 33, count 2 2006.229.14:51:26.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:26.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.14:51:26.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.14:51:26.36#ibcon#ireg 7 cls_cnt 0 2006.229.14:51:26.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:26.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:26.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:26.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.14:51:26.48#ibcon#first serial, iclass 33, count 0 2006.229.14:51:26.48#ibcon#enter sib2, iclass 33, count 0 2006.229.14:51:26.48#ibcon#flushed, iclass 33, count 0 2006.229.14:51:26.48#ibcon#about to write, iclass 33, count 0 2006.229.14:51:26.48#ibcon#wrote, iclass 33, count 0 2006.229.14:51:26.48#ibcon#about to read 3, iclass 33, count 0 2006.229.14:51:26.50#ibcon#read 3, iclass 33, count 0 2006.229.14:51:26.50#ibcon#about to read 4, iclass 33, count 0 2006.229.14:51:26.50#ibcon#read 4, iclass 33, count 0 2006.229.14:51:26.50#ibcon#about to read 5, iclass 33, count 0 2006.229.14:51:26.50#ibcon#read 5, iclass 33, count 0 2006.229.14:51:26.50#ibcon#about to read 6, iclass 33, count 0 2006.229.14:51:26.50#ibcon#read 6, iclass 33, count 0 2006.229.14:51:26.50#ibcon#end of sib2, iclass 33, count 0 2006.229.14:51:26.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.14:51:26.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.14:51:26.50#ibcon#[27=USB\r\n] 2006.229.14:51:26.50#ibcon#*before write, iclass 33, count 0 2006.229.14:51:26.50#ibcon#enter sib2, iclass 33, count 0 2006.229.14:51:26.50#ibcon#flushed, iclass 33, count 0 2006.229.14:51:26.50#ibcon#about to write, iclass 33, count 0 2006.229.14:51:26.50#ibcon#wrote, iclass 33, count 0 2006.229.14:51:26.50#ibcon#about to read 3, iclass 33, count 0 2006.229.14:51:26.53#ibcon#read 3, iclass 33, count 0 2006.229.14:51:26.53#ibcon#about to read 4, iclass 33, count 0 2006.229.14:51:26.53#ibcon#read 4, iclass 33, count 0 2006.229.14:51:26.53#ibcon#about to read 5, iclass 33, count 0 2006.229.14:51:26.53#ibcon#read 5, iclass 33, count 0 2006.229.14:51:26.53#ibcon#about to read 6, iclass 33, count 0 2006.229.14:51:26.53#ibcon#read 6, iclass 33, count 0 2006.229.14:51:26.53#ibcon#end of sib2, iclass 33, count 0 2006.229.14:51:26.53#ibcon#*after write, iclass 33, count 0 2006.229.14:51:26.53#ibcon#*before return 0, iclass 33, count 0 2006.229.14:51:26.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:26.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.14:51:26.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.14:51:26.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.14:51:26.53$vck44/vabw=wide 2006.229.14:51:26.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.14:51:26.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.14:51:26.53#ibcon#ireg 8 cls_cnt 0 2006.229.14:51:26.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:26.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:26.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:26.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.14:51:26.53#ibcon#first serial, iclass 35, count 0 2006.229.14:51:26.53#ibcon#enter sib2, iclass 35, count 0 2006.229.14:51:26.53#ibcon#flushed, iclass 35, count 0 2006.229.14:51:26.53#ibcon#about to write, iclass 35, count 0 2006.229.14:51:26.53#ibcon#wrote, iclass 35, count 0 2006.229.14:51:26.53#ibcon#about to read 3, iclass 35, count 0 2006.229.14:51:26.55#ibcon#read 3, iclass 35, count 0 2006.229.14:51:26.55#ibcon#about to read 4, iclass 35, count 0 2006.229.14:51:26.55#ibcon#read 4, iclass 35, count 0 2006.229.14:51:26.55#ibcon#about to read 5, iclass 35, count 0 2006.229.14:51:26.55#ibcon#read 5, iclass 35, count 0 2006.229.14:51:26.55#ibcon#about to read 6, iclass 35, count 0 2006.229.14:51:26.55#ibcon#read 6, iclass 35, count 0 2006.229.14:51:26.55#ibcon#end of sib2, iclass 35, count 0 2006.229.14:51:26.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.14:51:26.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.14:51:26.55#ibcon#[25=BW32\r\n] 2006.229.14:51:26.55#ibcon#*before write, iclass 35, count 0 2006.229.14:51:26.55#ibcon#enter sib2, iclass 35, count 0 2006.229.14:51:26.55#ibcon#flushed, iclass 35, count 0 2006.229.14:51:26.55#ibcon#about to write, iclass 35, count 0 2006.229.14:51:26.55#ibcon#wrote, iclass 35, count 0 2006.229.14:51:26.55#ibcon#about to read 3, iclass 35, count 0 2006.229.14:51:26.58#ibcon#read 3, iclass 35, count 0 2006.229.14:51:26.58#ibcon#about to read 4, iclass 35, count 0 2006.229.14:51:26.58#ibcon#read 4, iclass 35, count 0 2006.229.14:51:26.58#ibcon#about to read 5, iclass 35, count 0 2006.229.14:51:26.58#ibcon#read 5, iclass 35, count 0 2006.229.14:51:26.58#ibcon#about to read 6, iclass 35, count 0 2006.229.14:51:26.58#ibcon#read 6, iclass 35, count 0 2006.229.14:51:26.58#ibcon#end of sib2, iclass 35, count 0 2006.229.14:51:26.58#ibcon#*after write, iclass 35, count 0 2006.229.14:51:26.58#ibcon#*before return 0, iclass 35, count 0 2006.229.14:51:26.58#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:26.58#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.14:51:26.58#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.14:51:26.58#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.14:51:26.58$vck44/vbbw=wide 2006.229.14:51:26.58#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.14:51:26.58#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.14:51:26.58#ibcon#ireg 8 cls_cnt 0 2006.229.14:51:26.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:51:26.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:51:26.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:51:26.65#ibcon#enter wrdev, iclass 37, count 0 2006.229.14:51:26.65#ibcon#first serial, iclass 37, count 0 2006.229.14:51:26.65#ibcon#enter sib2, iclass 37, count 0 2006.229.14:51:26.65#ibcon#flushed, iclass 37, count 0 2006.229.14:51:26.65#ibcon#about to write, iclass 37, count 0 2006.229.14:51:26.65#ibcon#wrote, iclass 37, count 0 2006.229.14:51:26.65#ibcon#about to read 3, iclass 37, count 0 2006.229.14:51:26.67#ibcon#read 3, iclass 37, count 0 2006.229.14:51:26.67#ibcon#about to read 4, iclass 37, count 0 2006.229.14:51:26.67#ibcon#read 4, iclass 37, count 0 2006.229.14:51:26.67#ibcon#about to read 5, iclass 37, count 0 2006.229.14:51:26.67#ibcon#read 5, iclass 37, count 0 2006.229.14:51:26.67#ibcon#about to read 6, iclass 37, count 0 2006.229.14:51:26.67#ibcon#read 6, iclass 37, count 0 2006.229.14:51:26.67#ibcon#end of sib2, iclass 37, count 0 2006.229.14:51:26.67#ibcon#*mode == 0, iclass 37, count 0 2006.229.14:51:26.67#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.14:51:26.67#ibcon#[27=BW32\r\n] 2006.229.14:51:26.67#ibcon#*before write, iclass 37, count 0 2006.229.14:51:26.67#ibcon#enter sib2, iclass 37, count 0 2006.229.14:51:26.67#ibcon#flushed, iclass 37, count 0 2006.229.14:51:26.67#ibcon#about to write, iclass 37, count 0 2006.229.14:51:26.67#ibcon#wrote, iclass 37, count 0 2006.229.14:51:26.67#ibcon#about to read 3, iclass 37, count 0 2006.229.14:51:26.70#ibcon#read 3, iclass 37, count 0 2006.229.14:51:26.70#ibcon#about to read 4, iclass 37, count 0 2006.229.14:51:26.70#ibcon#read 4, iclass 37, count 0 2006.229.14:51:26.70#ibcon#about to read 5, iclass 37, count 0 2006.229.14:51:26.70#ibcon#read 5, iclass 37, count 0 2006.229.14:51:26.70#ibcon#about to read 6, iclass 37, count 0 2006.229.14:51:26.70#ibcon#read 6, iclass 37, count 0 2006.229.14:51:26.70#ibcon#end of sib2, iclass 37, count 0 2006.229.14:51:26.70#ibcon#*after write, iclass 37, count 0 2006.229.14:51:26.70#ibcon#*before return 0, iclass 37, count 0 2006.229.14:51:26.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:51:26.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.14:51:26.70#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.14:51:26.70#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.14:51:26.70$setupk4/ifdk4 2006.229.14:51:26.70$ifdk4/lo= 2006.229.14:51:26.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:51:26.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:51:26.70$ifdk4/patch= 2006.229.14:51:26.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:51:26.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:51:26.70$setupk4/!*+20s 2006.229.14:51:27.86#abcon#<5=/07 0.9 2.4 27.421001002.1\r\n> 2006.229.14:51:27.88#abcon#{5=INTERFACE CLEAR} 2006.229.14:51:27.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:51:38.03#abcon#<5=/07 0.9 2.4 27.421001002.1\r\n> 2006.229.14:51:38.05#abcon#{5=INTERFACE CLEAR} 2006.229.14:51:38.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:51:39.13#trakl#Source acquired 2006.229.14:51:40.13#flagr#flagr/antenna,acquired 2006.229.14:51:41.21$setupk4/"tpicd 2006.229.14:51:41.21$setupk4/echo=off 2006.229.14:51:41.21$setupk4/xlog=off 2006.229.14:51:41.21:!2006.229.14:56:37 2006.229.14:56:37.00:preob 2006.229.14:56:38.14/onsource/TRACKING 2006.229.14:56:38.14:!2006.229.14:56:47 2006.229.14:56:47.00:"tape 2006.229.14:56:47.00:"st=record 2006.229.14:56:47.00:data_valid=on 2006.229.14:56:47.00:midob 2006.229.14:56:47.14/onsource/TRACKING 2006.229.14:56:47.14/wx/27.41,1002.1,100 2006.229.14:56:47.30/cable/+6.4141E-03 2006.229.14:56:48.39/va/01,08,usb,yes,33,35 2006.229.14:56:48.39/va/02,07,usb,yes,35,36 2006.229.14:56:48.39/va/03,06,usb,yes,44,46 2006.229.14:56:48.39/va/04,07,usb,yes,36,38 2006.229.14:56:48.39/va/05,04,usb,yes,33,33 2006.229.14:56:48.39/va/06,04,usb,yes,37,36 2006.229.14:56:48.39/va/07,05,usb,yes,32,33 2006.229.14:56:48.39/va/08,06,usb,yes,24,29 2006.229.14:56:48.62/valo/01,524.99,yes,locked 2006.229.14:56:48.62/valo/02,534.99,yes,locked 2006.229.14:56:48.62/valo/03,564.99,yes,locked 2006.229.14:56:48.62/valo/04,624.99,yes,locked 2006.229.14:56:48.62/valo/05,734.99,yes,locked 2006.229.14:56:48.62/valo/06,814.99,yes,locked 2006.229.14:56:48.62/valo/07,864.99,yes,locked 2006.229.14:56:48.62/valo/08,884.99,yes,locked 2006.229.14:56:49.71/vb/01,04,usb,yes,33,30 2006.229.14:56:49.71/vb/02,04,usb,yes,35,35 2006.229.14:56:49.71/vb/03,04,usb,yes,32,35 2006.229.14:56:49.71/vb/04,04,usb,yes,36,35 2006.229.14:56:49.71/vb/05,04,usb,yes,28,31 2006.229.14:56:49.71/vb/06,04,usb,yes,33,29 2006.229.14:56:49.71/vb/07,04,usb,yes,33,33 2006.229.14:56:49.71/vb/08,04,usb,yes,30,34 2006.229.14:56:49.94/vblo/01,629.99,yes,locked 2006.229.14:56:49.94/vblo/02,634.99,yes,locked 2006.229.14:56:49.94/vblo/03,649.99,yes,locked 2006.229.14:56:49.94/vblo/04,679.99,yes,locked 2006.229.14:56:49.94/vblo/05,709.99,yes,locked 2006.229.14:56:49.94/vblo/06,719.99,yes,locked 2006.229.14:56:49.94/vblo/07,734.99,yes,locked 2006.229.14:56:49.94/vblo/08,744.99,yes,locked 2006.229.14:56:50.09/vabw/8 2006.229.14:56:50.24/vbbw/8 2006.229.14:56:50.33/xfe/off,on,12.2 2006.229.14:56:50.71/ifatt/23,28,28,28 2006.229.14:56:51.07/fmout-gps/S +4.55E-07 2006.229.14:56:51.11:!2006.229.14:57:27 2006.229.14:57:27.00:data_valid=off 2006.229.14:57:27.00:"et 2006.229.14:57:27.00:!+3s 2006.229.14:57:30.01:"tape 2006.229.14:57:30.01:postob 2006.229.14:57:30.22/cable/+6.4141E-03 2006.229.14:57:30.22/wx/27.41,1002.1,100 2006.229.14:57:31.07/fmout-gps/S +4.55E-07 2006.229.14:57:31.07:scan_name=229-1459,jd0608,70 2006.229.14:57:31.07:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.14:57:32.14#flagr#flagr/antenna,new-source 2006.229.14:57:32.14:checkk5 2006.229.14:57:32.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.14:57:32.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.14:57:33.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.14:57:33.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.14:57:34.09/chk_obsdata//k5ts1/T2291456??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.14:57:34.49/chk_obsdata//k5ts2/T2291456??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.14:57:34.88/chk_obsdata//k5ts3/T2291456??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.14:57:35.31/chk_obsdata//k5ts4/T2291456??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.14:57:36.01/k5log//k5ts1_log_newline 2006.229.14:57:36.73/k5log//k5ts2_log_newline 2006.229.14:57:37.45/k5log//k5ts3_log_newline 2006.229.14:57:38.16/k5log//k5ts4_log_newline 2006.229.14:57:38.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.14:57:38.19:setupk4=1 2006.229.14:57:38.19$setupk4/echo=on 2006.229.14:57:38.19$setupk4/pcalon 2006.229.14:57:38.19$pcalon/"no phase cal control is implemented here 2006.229.14:57:38.19$setupk4/"tpicd=stop 2006.229.14:57:38.19$setupk4/"rec=synch_on 2006.229.14:57:38.19$setupk4/"rec_mode=128 2006.229.14:57:38.19$setupk4/!* 2006.229.14:57:38.19$setupk4/recpk4 2006.229.14:57:38.19$recpk4/recpatch= 2006.229.14:57:38.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.14:57:38.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.14:57:38.19$setupk4/vck44 2006.229.14:57:38.19$vck44/valo=1,524.99 2006.229.14:57:38.19#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.14:57:38.19#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.14:57:38.19#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:38.19#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:38.19#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:38.19#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:38.19#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:57:38.19#ibcon#first serial, iclass 10, count 0 2006.229.14:57:38.19#ibcon#enter sib2, iclass 10, count 0 2006.229.14:57:38.19#ibcon#flushed, iclass 10, count 0 2006.229.14:57:38.19#ibcon#about to write, iclass 10, count 0 2006.229.14:57:38.19#ibcon#wrote, iclass 10, count 0 2006.229.14:57:38.19#ibcon#about to read 3, iclass 10, count 0 2006.229.14:57:38.20#ibcon#read 3, iclass 10, count 0 2006.229.14:57:38.20#ibcon#about to read 4, iclass 10, count 0 2006.229.14:57:38.20#ibcon#read 4, iclass 10, count 0 2006.229.14:57:38.20#ibcon#about to read 5, iclass 10, count 0 2006.229.14:57:38.20#ibcon#read 5, iclass 10, count 0 2006.229.14:57:38.20#ibcon#about to read 6, iclass 10, count 0 2006.229.14:57:38.20#ibcon#read 6, iclass 10, count 0 2006.229.14:57:38.20#ibcon#end of sib2, iclass 10, count 0 2006.229.14:57:38.20#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:57:38.20#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:57:38.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.14:57:38.20#ibcon#*before write, iclass 10, count 0 2006.229.14:57:38.20#ibcon#enter sib2, iclass 10, count 0 2006.229.14:57:38.20#ibcon#flushed, iclass 10, count 0 2006.229.14:57:38.20#ibcon#about to write, iclass 10, count 0 2006.229.14:57:38.20#ibcon#wrote, iclass 10, count 0 2006.229.14:57:38.20#ibcon#about to read 3, iclass 10, count 0 2006.229.14:57:38.25#ibcon#read 3, iclass 10, count 0 2006.229.14:57:38.25#ibcon#about to read 4, iclass 10, count 0 2006.229.14:57:38.25#ibcon#read 4, iclass 10, count 0 2006.229.14:57:38.25#ibcon#about to read 5, iclass 10, count 0 2006.229.14:57:38.25#ibcon#read 5, iclass 10, count 0 2006.229.14:57:38.25#ibcon#about to read 6, iclass 10, count 0 2006.229.14:57:38.25#ibcon#read 6, iclass 10, count 0 2006.229.14:57:38.25#ibcon#end of sib2, iclass 10, count 0 2006.229.14:57:38.25#ibcon#*after write, iclass 10, count 0 2006.229.14:57:38.25#ibcon#*before return 0, iclass 10, count 0 2006.229.14:57:38.25#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:38.25#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:38.25#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:57:38.25#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:57:38.25$vck44/va=1,8 2006.229.14:57:38.25#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.14:57:38.25#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.14:57:38.25#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:38.25#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:38.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:38.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:38.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.14:57:38.25#ibcon#first serial, iclass 12, count 2 2006.229.14:57:38.25#ibcon#enter sib2, iclass 12, count 2 2006.229.14:57:38.25#ibcon#flushed, iclass 12, count 2 2006.229.14:57:38.25#ibcon#about to write, iclass 12, count 2 2006.229.14:57:38.25#ibcon#wrote, iclass 12, count 2 2006.229.14:57:38.25#ibcon#about to read 3, iclass 12, count 2 2006.229.14:57:38.27#ibcon#read 3, iclass 12, count 2 2006.229.14:57:38.27#ibcon#about to read 4, iclass 12, count 2 2006.229.14:57:38.27#ibcon#read 4, iclass 12, count 2 2006.229.14:57:38.27#ibcon#about to read 5, iclass 12, count 2 2006.229.14:57:38.27#ibcon#read 5, iclass 12, count 2 2006.229.14:57:38.27#ibcon#about to read 6, iclass 12, count 2 2006.229.14:57:38.27#ibcon#read 6, iclass 12, count 2 2006.229.14:57:38.27#ibcon#end of sib2, iclass 12, count 2 2006.229.14:57:38.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.14:57:38.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.14:57:38.27#ibcon#[25=AT01-08\r\n] 2006.229.14:57:38.27#ibcon#*before write, iclass 12, count 2 2006.229.14:57:38.27#ibcon#enter sib2, iclass 12, count 2 2006.229.14:57:38.27#ibcon#flushed, iclass 12, count 2 2006.229.14:57:38.27#ibcon#about to write, iclass 12, count 2 2006.229.14:57:38.27#ibcon#wrote, iclass 12, count 2 2006.229.14:57:38.27#ibcon#about to read 3, iclass 12, count 2 2006.229.14:57:38.30#ibcon#read 3, iclass 12, count 2 2006.229.14:57:38.30#ibcon#about to read 4, iclass 12, count 2 2006.229.14:57:38.30#ibcon#read 4, iclass 12, count 2 2006.229.14:57:38.30#ibcon#about to read 5, iclass 12, count 2 2006.229.14:57:38.30#ibcon#read 5, iclass 12, count 2 2006.229.14:57:38.30#ibcon#about to read 6, iclass 12, count 2 2006.229.14:57:38.30#ibcon#read 6, iclass 12, count 2 2006.229.14:57:38.30#ibcon#end of sib2, iclass 12, count 2 2006.229.14:57:38.30#ibcon#*after write, iclass 12, count 2 2006.229.14:57:38.30#ibcon#*before return 0, iclass 12, count 2 2006.229.14:57:38.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:38.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:38.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.14:57:38.30#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:38.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:38.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:38.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:38.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:57:38.42#ibcon#first serial, iclass 12, count 0 2006.229.14:57:38.42#ibcon#enter sib2, iclass 12, count 0 2006.229.14:57:38.42#ibcon#flushed, iclass 12, count 0 2006.229.14:57:38.42#ibcon#about to write, iclass 12, count 0 2006.229.14:57:38.42#ibcon#wrote, iclass 12, count 0 2006.229.14:57:38.42#ibcon#about to read 3, iclass 12, count 0 2006.229.14:57:38.44#ibcon#read 3, iclass 12, count 0 2006.229.14:57:38.44#ibcon#about to read 4, iclass 12, count 0 2006.229.14:57:38.44#ibcon#read 4, iclass 12, count 0 2006.229.14:57:38.44#ibcon#about to read 5, iclass 12, count 0 2006.229.14:57:38.44#ibcon#read 5, iclass 12, count 0 2006.229.14:57:38.44#ibcon#about to read 6, iclass 12, count 0 2006.229.14:57:38.44#ibcon#read 6, iclass 12, count 0 2006.229.14:57:38.44#ibcon#end of sib2, iclass 12, count 0 2006.229.14:57:38.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:57:38.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:57:38.44#ibcon#[25=USB\r\n] 2006.229.14:57:38.44#ibcon#*before write, iclass 12, count 0 2006.229.14:57:38.44#ibcon#enter sib2, iclass 12, count 0 2006.229.14:57:38.44#ibcon#flushed, iclass 12, count 0 2006.229.14:57:38.44#ibcon#about to write, iclass 12, count 0 2006.229.14:57:38.44#ibcon#wrote, iclass 12, count 0 2006.229.14:57:38.44#ibcon#about to read 3, iclass 12, count 0 2006.229.14:57:38.47#ibcon#read 3, iclass 12, count 0 2006.229.14:57:38.47#ibcon#about to read 4, iclass 12, count 0 2006.229.14:57:38.47#ibcon#read 4, iclass 12, count 0 2006.229.14:57:38.47#ibcon#about to read 5, iclass 12, count 0 2006.229.14:57:38.47#ibcon#read 5, iclass 12, count 0 2006.229.14:57:38.47#ibcon#about to read 6, iclass 12, count 0 2006.229.14:57:38.47#ibcon#read 6, iclass 12, count 0 2006.229.14:57:38.47#ibcon#end of sib2, iclass 12, count 0 2006.229.14:57:38.47#ibcon#*after write, iclass 12, count 0 2006.229.14:57:38.47#ibcon#*before return 0, iclass 12, count 0 2006.229.14:57:38.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:38.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:38.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:57:38.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:57:38.47$vck44/valo=2,534.99 2006.229.14:57:38.47#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.14:57:38.47#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.14:57:38.47#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:38.47#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:38.47#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:38.47#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:38.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:57:38.47#ibcon#first serial, iclass 14, count 0 2006.229.14:57:38.47#ibcon#enter sib2, iclass 14, count 0 2006.229.14:57:38.47#ibcon#flushed, iclass 14, count 0 2006.229.14:57:38.47#ibcon#about to write, iclass 14, count 0 2006.229.14:57:38.47#ibcon#wrote, iclass 14, count 0 2006.229.14:57:38.47#ibcon#about to read 3, iclass 14, count 0 2006.229.14:57:38.49#ibcon#read 3, iclass 14, count 0 2006.229.14:57:38.49#ibcon#about to read 4, iclass 14, count 0 2006.229.14:57:38.49#ibcon#read 4, iclass 14, count 0 2006.229.14:57:38.49#ibcon#about to read 5, iclass 14, count 0 2006.229.14:57:38.49#ibcon#read 5, iclass 14, count 0 2006.229.14:57:38.49#ibcon#about to read 6, iclass 14, count 0 2006.229.14:57:38.49#ibcon#read 6, iclass 14, count 0 2006.229.14:57:38.49#ibcon#end of sib2, iclass 14, count 0 2006.229.14:57:38.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:57:38.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:57:38.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.14:57:38.49#ibcon#*before write, iclass 14, count 0 2006.229.14:57:38.49#ibcon#enter sib2, iclass 14, count 0 2006.229.14:57:38.49#ibcon#flushed, iclass 14, count 0 2006.229.14:57:38.49#ibcon#about to write, iclass 14, count 0 2006.229.14:57:38.49#ibcon#wrote, iclass 14, count 0 2006.229.14:57:38.49#ibcon#about to read 3, iclass 14, count 0 2006.229.14:57:38.53#ibcon#read 3, iclass 14, count 0 2006.229.14:57:38.53#ibcon#about to read 4, iclass 14, count 0 2006.229.14:57:38.53#ibcon#read 4, iclass 14, count 0 2006.229.14:57:38.53#ibcon#about to read 5, iclass 14, count 0 2006.229.14:57:38.53#ibcon#read 5, iclass 14, count 0 2006.229.14:57:38.53#ibcon#about to read 6, iclass 14, count 0 2006.229.14:57:38.53#ibcon#read 6, iclass 14, count 0 2006.229.14:57:38.53#ibcon#end of sib2, iclass 14, count 0 2006.229.14:57:38.53#ibcon#*after write, iclass 14, count 0 2006.229.14:57:38.53#ibcon#*before return 0, iclass 14, count 0 2006.229.14:57:38.53#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:38.53#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:38.53#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:57:38.53#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:57:38.53$vck44/va=2,7 2006.229.14:57:38.53#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.14:57:38.53#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.14:57:38.53#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:38.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:38.59#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:38.59#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:38.59#ibcon#enter wrdev, iclass 16, count 2 2006.229.14:57:38.59#ibcon#first serial, iclass 16, count 2 2006.229.14:57:38.59#ibcon#enter sib2, iclass 16, count 2 2006.229.14:57:38.59#ibcon#flushed, iclass 16, count 2 2006.229.14:57:38.59#ibcon#about to write, iclass 16, count 2 2006.229.14:57:38.59#ibcon#wrote, iclass 16, count 2 2006.229.14:57:38.59#ibcon#about to read 3, iclass 16, count 2 2006.229.14:57:38.61#ibcon#read 3, iclass 16, count 2 2006.229.14:57:38.61#ibcon#about to read 4, iclass 16, count 2 2006.229.14:57:38.61#ibcon#read 4, iclass 16, count 2 2006.229.14:57:38.61#ibcon#about to read 5, iclass 16, count 2 2006.229.14:57:38.61#ibcon#read 5, iclass 16, count 2 2006.229.14:57:38.61#ibcon#about to read 6, iclass 16, count 2 2006.229.14:57:38.61#ibcon#read 6, iclass 16, count 2 2006.229.14:57:38.61#ibcon#end of sib2, iclass 16, count 2 2006.229.14:57:38.61#ibcon#*mode == 0, iclass 16, count 2 2006.229.14:57:38.61#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.14:57:38.61#ibcon#[25=AT02-07\r\n] 2006.229.14:57:38.61#ibcon#*before write, iclass 16, count 2 2006.229.14:57:38.61#ibcon#enter sib2, iclass 16, count 2 2006.229.14:57:38.61#ibcon#flushed, iclass 16, count 2 2006.229.14:57:38.61#ibcon#about to write, iclass 16, count 2 2006.229.14:57:38.61#ibcon#wrote, iclass 16, count 2 2006.229.14:57:38.61#ibcon#about to read 3, iclass 16, count 2 2006.229.14:57:38.64#ibcon#read 3, iclass 16, count 2 2006.229.14:57:38.64#ibcon#about to read 4, iclass 16, count 2 2006.229.14:57:38.64#ibcon#read 4, iclass 16, count 2 2006.229.14:57:38.64#ibcon#about to read 5, iclass 16, count 2 2006.229.14:57:38.64#ibcon#read 5, iclass 16, count 2 2006.229.14:57:38.64#ibcon#about to read 6, iclass 16, count 2 2006.229.14:57:38.64#ibcon#read 6, iclass 16, count 2 2006.229.14:57:38.64#ibcon#end of sib2, iclass 16, count 2 2006.229.14:57:38.64#ibcon#*after write, iclass 16, count 2 2006.229.14:57:38.64#ibcon#*before return 0, iclass 16, count 2 2006.229.14:57:38.64#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:38.64#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:38.64#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.14:57:38.64#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:38.64#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:38.76#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:38.76#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:38.76#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:57:38.76#ibcon#first serial, iclass 16, count 0 2006.229.14:57:38.76#ibcon#enter sib2, iclass 16, count 0 2006.229.14:57:38.76#ibcon#flushed, iclass 16, count 0 2006.229.14:57:38.76#ibcon#about to write, iclass 16, count 0 2006.229.14:57:38.76#ibcon#wrote, iclass 16, count 0 2006.229.14:57:38.76#ibcon#about to read 3, iclass 16, count 0 2006.229.14:57:38.78#ibcon#read 3, iclass 16, count 0 2006.229.14:57:38.78#ibcon#about to read 4, iclass 16, count 0 2006.229.14:57:38.78#ibcon#read 4, iclass 16, count 0 2006.229.14:57:38.78#ibcon#about to read 5, iclass 16, count 0 2006.229.14:57:38.78#ibcon#read 5, iclass 16, count 0 2006.229.14:57:38.78#ibcon#about to read 6, iclass 16, count 0 2006.229.14:57:38.78#ibcon#read 6, iclass 16, count 0 2006.229.14:57:38.78#ibcon#end of sib2, iclass 16, count 0 2006.229.14:57:38.78#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:57:38.78#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:57:38.78#ibcon#[25=USB\r\n] 2006.229.14:57:38.78#ibcon#*before write, iclass 16, count 0 2006.229.14:57:38.78#ibcon#enter sib2, iclass 16, count 0 2006.229.14:57:38.78#ibcon#flushed, iclass 16, count 0 2006.229.14:57:38.78#ibcon#about to write, iclass 16, count 0 2006.229.14:57:38.78#ibcon#wrote, iclass 16, count 0 2006.229.14:57:38.78#ibcon#about to read 3, iclass 16, count 0 2006.229.14:57:38.81#ibcon#read 3, iclass 16, count 0 2006.229.14:57:38.81#ibcon#about to read 4, iclass 16, count 0 2006.229.14:57:38.81#ibcon#read 4, iclass 16, count 0 2006.229.14:57:38.81#ibcon#about to read 5, iclass 16, count 0 2006.229.14:57:38.81#ibcon#read 5, iclass 16, count 0 2006.229.14:57:38.81#ibcon#about to read 6, iclass 16, count 0 2006.229.14:57:38.81#ibcon#read 6, iclass 16, count 0 2006.229.14:57:38.81#ibcon#end of sib2, iclass 16, count 0 2006.229.14:57:38.81#ibcon#*after write, iclass 16, count 0 2006.229.14:57:38.81#ibcon#*before return 0, iclass 16, count 0 2006.229.14:57:38.81#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:38.81#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:38.81#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:57:38.81#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:57:38.81$vck44/valo=3,564.99 2006.229.14:57:38.81#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.14:57:38.81#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.14:57:38.81#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:38.81#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:38.81#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:38.81#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:38.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:57:38.81#ibcon#first serial, iclass 18, count 0 2006.229.14:57:38.81#ibcon#enter sib2, iclass 18, count 0 2006.229.14:57:38.81#ibcon#flushed, iclass 18, count 0 2006.229.14:57:38.81#ibcon#about to write, iclass 18, count 0 2006.229.14:57:38.81#ibcon#wrote, iclass 18, count 0 2006.229.14:57:38.81#ibcon#about to read 3, iclass 18, count 0 2006.229.14:57:38.83#ibcon#read 3, iclass 18, count 0 2006.229.14:57:38.83#ibcon#about to read 4, iclass 18, count 0 2006.229.14:57:38.83#ibcon#read 4, iclass 18, count 0 2006.229.14:57:38.83#ibcon#about to read 5, iclass 18, count 0 2006.229.14:57:38.83#ibcon#read 5, iclass 18, count 0 2006.229.14:57:38.83#ibcon#about to read 6, iclass 18, count 0 2006.229.14:57:38.83#ibcon#read 6, iclass 18, count 0 2006.229.14:57:38.83#ibcon#end of sib2, iclass 18, count 0 2006.229.14:57:38.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:57:38.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:57:38.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.14:57:38.83#ibcon#*before write, iclass 18, count 0 2006.229.14:57:38.83#ibcon#enter sib2, iclass 18, count 0 2006.229.14:57:38.83#ibcon#flushed, iclass 18, count 0 2006.229.14:57:38.83#ibcon#about to write, iclass 18, count 0 2006.229.14:57:38.83#ibcon#wrote, iclass 18, count 0 2006.229.14:57:38.83#ibcon#about to read 3, iclass 18, count 0 2006.229.14:57:38.87#ibcon#read 3, iclass 18, count 0 2006.229.14:57:38.87#ibcon#about to read 4, iclass 18, count 0 2006.229.14:57:38.87#ibcon#read 4, iclass 18, count 0 2006.229.14:57:38.87#ibcon#about to read 5, iclass 18, count 0 2006.229.14:57:38.87#ibcon#read 5, iclass 18, count 0 2006.229.14:57:38.87#ibcon#about to read 6, iclass 18, count 0 2006.229.14:57:38.87#ibcon#read 6, iclass 18, count 0 2006.229.14:57:38.87#ibcon#end of sib2, iclass 18, count 0 2006.229.14:57:38.87#ibcon#*after write, iclass 18, count 0 2006.229.14:57:38.87#ibcon#*before return 0, iclass 18, count 0 2006.229.14:57:38.87#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:38.87#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:38.87#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:57:38.87#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:57:38.87$vck44/va=3,6 2006.229.14:57:38.87#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.14:57:38.87#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.14:57:38.87#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:38.87#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:38.93#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:38.93#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:38.93#ibcon#enter wrdev, iclass 20, count 2 2006.229.14:57:38.93#ibcon#first serial, iclass 20, count 2 2006.229.14:57:38.93#ibcon#enter sib2, iclass 20, count 2 2006.229.14:57:38.93#ibcon#flushed, iclass 20, count 2 2006.229.14:57:38.93#ibcon#about to write, iclass 20, count 2 2006.229.14:57:38.93#ibcon#wrote, iclass 20, count 2 2006.229.14:57:38.93#ibcon#about to read 3, iclass 20, count 2 2006.229.14:57:38.95#ibcon#read 3, iclass 20, count 2 2006.229.14:57:38.95#ibcon#about to read 4, iclass 20, count 2 2006.229.14:57:38.95#ibcon#read 4, iclass 20, count 2 2006.229.14:57:38.95#ibcon#about to read 5, iclass 20, count 2 2006.229.14:57:38.95#ibcon#read 5, iclass 20, count 2 2006.229.14:57:38.95#ibcon#about to read 6, iclass 20, count 2 2006.229.14:57:38.95#ibcon#read 6, iclass 20, count 2 2006.229.14:57:38.95#ibcon#end of sib2, iclass 20, count 2 2006.229.14:57:38.95#ibcon#*mode == 0, iclass 20, count 2 2006.229.14:57:38.95#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.14:57:38.95#ibcon#[25=AT03-06\r\n] 2006.229.14:57:38.95#ibcon#*before write, iclass 20, count 2 2006.229.14:57:38.95#ibcon#enter sib2, iclass 20, count 2 2006.229.14:57:38.95#ibcon#flushed, iclass 20, count 2 2006.229.14:57:38.95#ibcon#about to write, iclass 20, count 2 2006.229.14:57:38.95#ibcon#wrote, iclass 20, count 2 2006.229.14:57:38.95#ibcon#about to read 3, iclass 20, count 2 2006.229.14:57:38.98#ibcon#read 3, iclass 20, count 2 2006.229.14:57:38.98#ibcon#about to read 4, iclass 20, count 2 2006.229.14:57:38.98#ibcon#read 4, iclass 20, count 2 2006.229.14:57:38.98#ibcon#about to read 5, iclass 20, count 2 2006.229.14:57:38.98#ibcon#read 5, iclass 20, count 2 2006.229.14:57:38.98#ibcon#about to read 6, iclass 20, count 2 2006.229.14:57:38.98#ibcon#read 6, iclass 20, count 2 2006.229.14:57:38.98#ibcon#end of sib2, iclass 20, count 2 2006.229.14:57:38.98#ibcon#*after write, iclass 20, count 2 2006.229.14:57:38.98#ibcon#*before return 0, iclass 20, count 2 2006.229.14:57:38.98#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:38.98#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:38.98#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.14:57:38.98#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:38.98#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:39.10#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:39.10#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:39.10#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:57:39.10#ibcon#first serial, iclass 20, count 0 2006.229.14:57:39.10#ibcon#enter sib2, iclass 20, count 0 2006.229.14:57:39.10#ibcon#flushed, iclass 20, count 0 2006.229.14:57:39.10#ibcon#about to write, iclass 20, count 0 2006.229.14:57:39.10#ibcon#wrote, iclass 20, count 0 2006.229.14:57:39.10#ibcon#about to read 3, iclass 20, count 0 2006.229.14:57:39.12#ibcon#read 3, iclass 20, count 0 2006.229.14:57:39.12#ibcon#about to read 4, iclass 20, count 0 2006.229.14:57:39.12#ibcon#read 4, iclass 20, count 0 2006.229.14:57:39.12#ibcon#about to read 5, iclass 20, count 0 2006.229.14:57:39.12#ibcon#read 5, iclass 20, count 0 2006.229.14:57:39.12#ibcon#about to read 6, iclass 20, count 0 2006.229.14:57:39.12#ibcon#read 6, iclass 20, count 0 2006.229.14:57:39.12#ibcon#end of sib2, iclass 20, count 0 2006.229.14:57:39.12#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:57:39.12#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:57:39.12#ibcon#[25=USB\r\n] 2006.229.14:57:39.12#ibcon#*before write, iclass 20, count 0 2006.229.14:57:39.12#ibcon#enter sib2, iclass 20, count 0 2006.229.14:57:39.12#ibcon#flushed, iclass 20, count 0 2006.229.14:57:39.12#ibcon#about to write, iclass 20, count 0 2006.229.14:57:39.12#ibcon#wrote, iclass 20, count 0 2006.229.14:57:39.12#ibcon#about to read 3, iclass 20, count 0 2006.229.14:57:39.15#ibcon#read 3, iclass 20, count 0 2006.229.14:57:39.15#ibcon#about to read 4, iclass 20, count 0 2006.229.14:57:39.15#ibcon#read 4, iclass 20, count 0 2006.229.14:57:39.15#ibcon#about to read 5, iclass 20, count 0 2006.229.14:57:39.15#ibcon#read 5, iclass 20, count 0 2006.229.14:57:39.15#ibcon#about to read 6, iclass 20, count 0 2006.229.14:57:39.15#ibcon#read 6, iclass 20, count 0 2006.229.14:57:39.15#ibcon#end of sib2, iclass 20, count 0 2006.229.14:57:39.15#ibcon#*after write, iclass 20, count 0 2006.229.14:57:39.15#ibcon#*before return 0, iclass 20, count 0 2006.229.14:57:39.15#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:39.15#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:39.15#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:57:39.15#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:57:39.15$vck44/valo=4,624.99 2006.229.14:57:39.15#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:57:39.15#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:57:39.15#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:39.15#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:39.15#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:39.15#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:39.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:57:39.15#ibcon#first serial, iclass 22, count 0 2006.229.14:57:39.15#ibcon#enter sib2, iclass 22, count 0 2006.229.14:57:39.15#ibcon#flushed, iclass 22, count 0 2006.229.14:57:39.15#ibcon#about to write, iclass 22, count 0 2006.229.14:57:39.15#ibcon#wrote, iclass 22, count 0 2006.229.14:57:39.15#ibcon#about to read 3, iclass 22, count 0 2006.229.14:57:39.17#ibcon#read 3, iclass 22, count 0 2006.229.14:57:39.17#ibcon#about to read 4, iclass 22, count 0 2006.229.14:57:39.17#ibcon#read 4, iclass 22, count 0 2006.229.14:57:39.17#ibcon#about to read 5, iclass 22, count 0 2006.229.14:57:39.17#ibcon#read 5, iclass 22, count 0 2006.229.14:57:39.17#ibcon#about to read 6, iclass 22, count 0 2006.229.14:57:39.17#ibcon#read 6, iclass 22, count 0 2006.229.14:57:39.17#ibcon#end of sib2, iclass 22, count 0 2006.229.14:57:39.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:57:39.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:57:39.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.14:57:39.17#ibcon#*before write, iclass 22, count 0 2006.229.14:57:39.17#ibcon#enter sib2, iclass 22, count 0 2006.229.14:57:39.17#ibcon#flushed, iclass 22, count 0 2006.229.14:57:39.17#ibcon#about to write, iclass 22, count 0 2006.229.14:57:39.17#ibcon#wrote, iclass 22, count 0 2006.229.14:57:39.17#ibcon#about to read 3, iclass 22, count 0 2006.229.14:57:39.21#ibcon#read 3, iclass 22, count 0 2006.229.14:57:39.21#ibcon#about to read 4, iclass 22, count 0 2006.229.14:57:39.21#ibcon#read 4, iclass 22, count 0 2006.229.14:57:39.21#ibcon#about to read 5, iclass 22, count 0 2006.229.14:57:39.21#ibcon#read 5, iclass 22, count 0 2006.229.14:57:39.21#ibcon#about to read 6, iclass 22, count 0 2006.229.14:57:39.21#ibcon#read 6, iclass 22, count 0 2006.229.14:57:39.21#ibcon#end of sib2, iclass 22, count 0 2006.229.14:57:39.21#ibcon#*after write, iclass 22, count 0 2006.229.14:57:39.21#ibcon#*before return 0, iclass 22, count 0 2006.229.14:57:39.21#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:39.21#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:39.21#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:57:39.21#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:57:39.21$vck44/va=4,7 2006.229.14:57:39.21#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.14:57:39.21#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.14:57:39.21#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:39.21#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:39.27#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:39.27#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:39.27#ibcon#enter wrdev, iclass 24, count 2 2006.229.14:57:39.27#ibcon#first serial, iclass 24, count 2 2006.229.14:57:39.27#ibcon#enter sib2, iclass 24, count 2 2006.229.14:57:39.27#ibcon#flushed, iclass 24, count 2 2006.229.14:57:39.27#ibcon#about to write, iclass 24, count 2 2006.229.14:57:39.27#ibcon#wrote, iclass 24, count 2 2006.229.14:57:39.27#ibcon#about to read 3, iclass 24, count 2 2006.229.14:57:39.29#ibcon#read 3, iclass 24, count 2 2006.229.14:57:39.29#ibcon#about to read 4, iclass 24, count 2 2006.229.14:57:39.29#ibcon#read 4, iclass 24, count 2 2006.229.14:57:39.29#ibcon#about to read 5, iclass 24, count 2 2006.229.14:57:39.29#ibcon#read 5, iclass 24, count 2 2006.229.14:57:39.29#ibcon#about to read 6, iclass 24, count 2 2006.229.14:57:39.29#ibcon#read 6, iclass 24, count 2 2006.229.14:57:39.29#ibcon#end of sib2, iclass 24, count 2 2006.229.14:57:39.29#ibcon#*mode == 0, iclass 24, count 2 2006.229.14:57:39.29#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.14:57:39.29#ibcon#[25=AT04-07\r\n] 2006.229.14:57:39.29#ibcon#*before write, iclass 24, count 2 2006.229.14:57:39.29#ibcon#enter sib2, iclass 24, count 2 2006.229.14:57:39.29#ibcon#flushed, iclass 24, count 2 2006.229.14:57:39.29#ibcon#about to write, iclass 24, count 2 2006.229.14:57:39.29#ibcon#wrote, iclass 24, count 2 2006.229.14:57:39.29#ibcon#about to read 3, iclass 24, count 2 2006.229.14:57:39.32#ibcon#read 3, iclass 24, count 2 2006.229.14:57:39.32#ibcon#about to read 4, iclass 24, count 2 2006.229.14:57:39.32#ibcon#read 4, iclass 24, count 2 2006.229.14:57:39.32#ibcon#about to read 5, iclass 24, count 2 2006.229.14:57:39.32#ibcon#read 5, iclass 24, count 2 2006.229.14:57:39.32#ibcon#about to read 6, iclass 24, count 2 2006.229.14:57:39.32#ibcon#read 6, iclass 24, count 2 2006.229.14:57:39.32#ibcon#end of sib2, iclass 24, count 2 2006.229.14:57:39.32#ibcon#*after write, iclass 24, count 2 2006.229.14:57:39.32#ibcon#*before return 0, iclass 24, count 2 2006.229.14:57:39.32#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:39.32#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:39.32#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.14:57:39.32#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:39.32#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:39.44#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:39.44#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:39.44#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:57:39.44#ibcon#first serial, iclass 24, count 0 2006.229.14:57:39.44#ibcon#enter sib2, iclass 24, count 0 2006.229.14:57:39.44#ibcon#flushed, iclass 24, count 0 2006.229.14:57:39.44#ibcon#about to write, iclass 24, count 0 2006.229.14:57:39.44#ibcon#wrote, iclass 24, count 0 2006.229.14:57:39.44#ibcon#about to read 3, iclass 24, count 0 2006.229.14:57:39.46#ibcon#read 3, iclass 24, count 0 2006.229.14:57:39.46#ibcon#about to read 4, iclass 24, count 0 2006.229.14:57:39.46#ibcon#read 4, iclass 24, count 0 2006.229.14:57:39.46#ibcon#about to read 5, iclass 24, count 0 2006.229.14:57:39.46#ibcon#read 5, iclass 24, count 0 2006.229.14:57:39.46#ibcon#about to read 6, iclass 24, count 0 2006.229.14:57:39.46#ibcon#read 6, iclass 24, count 0 2006.229.14:57:39.46#ibcon#end of sib2, iclass 24, count 0 2006.229.14:57:39.46#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:57:39.46#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:57:39.46#ibcon#[25=USB\r\n] 2006.229.14:57:39.46#ibcon#*before write, iclass 24, count 0 2006.229.14:57:39.46#ibcon#enter sib2, iclass 24, count 0 2006.229.14:57:39.46#ibcon#flushed, iclass 24, count 0 2006.229.14:57:39.46#ibcon#about to write, iclass 24, count 0 2006.229.14:57:39.46#ibcon#wrote, iclass 24, count 0 2006.229.14:57:39.46#ibcon#about to read 3, iclass 24, count 0 2006.229.14:57:39.49#ibcon#read 3, iclass 24, count 0 2006.229.14:57:39.49#ibcon#about to read 4, iclass 24, count 0 2006.229.14:57:39.49#ibcon#read 4, iclass 24, count 0 2006.229.14:57:39.49#ibcon#about to read 5, iclass 24, count 0 2006.229.14:57:39.49#ibcon#read 5, iclass 24, count 0 2006.229.14:57:39.49#ibcon#about to read 6, iclass 24, count 0 2006.229.14:57:39.49#ibcon#read 6, iclass 24, count 0 2006.229.14:57:39.49#ibcon#end of sib2, iclass 24, count 0 2006.229.14:57:39.49#ibcon#*after write, iclass 24, count 0 2006.229.14:57:39.49#ibcon#*before return 0, iclass 24, count 0 2006.229.14:57:39.49#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:39.49#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:39.49#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:57:39.49#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:57:39.49$vck44/valo=5,734.99 2006.229.14:57:39.49#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.14:57:39.49#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.14:57:39.49#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:39.49#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:39.49#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:39.49#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:39.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:57:39.49#ibcon#first serial, iclass 26, count 0 2006.229.14:57:39.49#ibcon#enter sib2, iclass 26, count 0 2006.229.14:57:39.49#ibcon#flushed, iclass 26, count 0 2006.229.14:57:39.49#ibcon#about to write, iclass 26, count 0 2006.229.14:57:39.49#ibcon#wrote, iclass 26, count 0 2006.229.14:57:39.49#ibcon#about to read 3, iclass 26, count 0 2006.229.14:57:39.51#ibcon#read 3, iclass 26, count 0 2006.229.14:57:39.51#ibcon#about to read 4, iclass 26, count 0 2006.229.14:57:39.51#ibcon#read 4, iclass 26, count 0 2006.229.14:57:39.51#ibcon#about to read 5, iclass 26, count 0 2006.229.14:57:39.51#ibcon#read 5, iclass 26, count 0 2006.229.14:57:39.51#ibcon#about to read 6, iclass 26, count 0 2006.229.14:57:39.51#ibcon#read 6, iclass 26, count 0 2006.229.14:57:39.51#ibcon#end of sib2, iclass 26, count 0 2006.229.14:57:39.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:57:39.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:57:39.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.14:57:39.51#ibcon#*before write, iclass 26, count 0 2006.229.14:57:39.51#ibcon#enter sib2, iclass 26, count 0 2006.229.14:57:39.51#ibcon#flushed, iclass 26, count 0 2006.229.14:57:39.51#ibcon#about to write, iclass 26, count 0 2006.229.14:57:39.51#ibcon#wrote, iclass 26, count 0 2006.229.14:57:39.51#ibcon#about to read 3, iclass 26, count 0 2006.229.14:57:39.55#ibcon#read 3, iclass 26, count 0 2006.229.14:57:39.55#ibcon#about to read 4, iclass 26, count 0 2006.229.14:57:39.55#ibcon#read 4, iclass 26, count 0 2006.229.14:57:39.55#ibcon#about to read 5, iclass 26, count 0 2006.229.14:57:39.55#ibcon#read 5, iclass 26, count 0 2006.229.14:57:39.55#ibcon#about to read 6, iclass 26, count 0 2006.229.14:57:39.55#ibcon#read 6, iclass 26, count 0 2006.229.14:57:39.55#ibcon#end of sib2, iclass 26, count 0 2006.229.14:57:39.55#ibcon#*after write, iclass 26, count 0 2006.229.14:57:39.55#ibcon#*before return 0, iclass 26, count 0 2006.229.14:57:39.55#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:39.55#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:39.55#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:57:39.55#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:57:39.55$vck44/va=5,4 2006.229.14:57:39.55#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.14:57:39.55#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.14:57:39.55#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:39.55#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:39.61#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:39.61#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:39.61#ibcon#enter wrdev, iclass 28, count 2 2006.229.14:57:39.61#ibcon#first serial, iclass 28, count 2 2006.229.14:57:39.61#ibcon#enter sib2, iclass 28, count 2 2006.229.14:57:39.61#ibcon#flushed, iclass 28, count 2 2006.229.14:57:39.61#ibcon#about to write, iclass 28, count 2 2006.229.14:57:39.61#ibcon#wrote, iclass 28, count 2 2006.229.14:57:39.61#ibcon#about to read 3, iclass 28, count 2 2006.229.14:57:39.63#ibcon#read 3, iclass 28, count 2 2006.229.14:57:39.63#ibcon#about to read 4, iclass 28, count 2 2006.229.14:57:39.63#ibcon#read 4, iclass 28, count 2 2006.229.14:57:39.63#ibcon#about to read 5, iclass 28, count 2 2006.229.14:57:39.63#ibcon#read 5, iclass 28, count 2 2006.229.14:57:39.63#ibcon#about to read 6, iclass 28, count 2 2006.229.14:57:39.63#ibcon#read 6, iclass 28, count 2 2006.229.14:57:39.63#ibcon#end of sib2, iclass 28, count 2 2006.229.14:57:39.63#ibcon#*mode == 0, iclass 28, count 2 2006.229.14:57:39.63#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.14:57:39.63#ibcon#[25=AT05-04\r\n] 2006.229.14:57:39.63#ibcon#*before write, iclass 28, count 2 2006.229.14:57:39.63#ibcon#enter sib2, iclass 28, count 2 2006.229.14:57:39.63#ibcon#flushed, iclass 28, count 2 2006.229.14:57:39.63#ibcon#about to write, iclass 28, count 2 2006.229.14:57:39.63#ibcon#wrote, iclass 28, count 2 2006.229.14:57:39.63#ibcon#about to read 3, iclass 28, count 2 2006.229.14:57:39.66#ibcon#read 3, iclass 28, count 2 2006.229.14:57:39.66#ibcon#about to read 4, iclass 28, count 2 2006.229.14:57:39.66#ibcon#read 4, iclass 28, count 2 2006.229.14:57:39.66#ibcon#about to read 5, iclass 28, count 2 2006.229.14:57:39.66#ibcon#read 5, iclass 28, count 2 2006.229.14:57:39.66#ibcon#about to read 6, iclass 28, count 2 2006.229.14:57:39.66#ibcon#read 6, iclass 28, count 2 2006.229.14:57:39.66#ibcon#end of sib2, iclass 28, count 2 2006.229.14:57:39.66#ibcon#*after write, iclass 28, count 2 2006.229.14:57:39.66#ibcon#*before return 0, iclass 28, count 2 2006.229.14:57:39.66#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:39.66#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:39.66#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.14:57:39.66#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:39.66#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:39.78#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:39.78#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:39.78#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:57:39.78#ibcon#first serial, iclass 28, count 0 2006.229.14:57:39.78#ibcon#enter sib2, iclass 28, count 0 2006.229.14:57:39.78#ibcon#flushed, iclass 28, count 0 2006.229.14:57:39.78#ibcon#about to write, iclass 28, count 0 2006.229.14:57:39.78#ibcon#wrote, iclass 28, count 0 2006.229.14:57:39.78#ibcon#about to read 3, iclass 28, count 0 2006.229.14:57:39.80#ibcon#read 3, iclass 28, count 0 2006.229.14:57:39.80#ibcon#about to read 4, iclass 28, count 0 2006.229.14:57:39.80#ibcon#read 4, iclass 28, count 0 2006.229.14:57:39.80#ibcon#about to read 5, iclass 28, count 0 2006.229.14:57:39.80#ibcon#read 5, iclass 28, count 0 2006.229.14:57:39.80#ibcon#about to read 6, iclass 28, count 0 2006.229.14:57:39.80#ibcon#read 6, iclass 28, count 0 2006.229.14:57:39.80#ibcon#end of sib2, iclass 28, count 0 2006.229.14:57:39.80#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:57:39.80#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:57:39.80#ibcon#[25=USB\r\n] 2006.229.14:57:39.80#ibcon#*before write, iclass 28, count 0 2006.229.14:57:39.80#ibcon#enter sib2, iclass 28, count 0 2006.229.14:57:39.80#ibcon#flushed, iclass 28, count 0 2006.229.14:57:39.80#ibcon#about to write, iclass 28, count 0 2006.229.14:57:39.80#ibcon#wrote, iclass 28, count 0 2006.229.14:57:39.80#ibcon#about to read 3, iclass 28, count 0 2006.229.14:57:39.83#ibcon#read 3, iclass 28, count 0 2006.229.14:57:39.83#ibcon#about to read 4, iclass 28, count 0 2006.229.14:57:39.83#ibcon#read 4, iclass 28, count 0 2006.229.14:57:39.83#ibcon#about to read 5, iclass 28, count 0 2006.229.14:57:39.83#ibcon#read 5, iclass 28, count 0 2006.229.14:57:39.83#ibcon#about to read 6, iclass 28, count 0 2006.229.14:57:39.83#ibcon#read 6, iclass 28, count 0 2006.229.14:57:39.83#ibcon#end of sib2, iclass 28, count 0 2006.229.14:57:39.83#ibcon#*after write, iclass 28, count 0 2006.229.14:57:39.83#ibcon#*before return 0, iclass 28, count 0 2006.229.14:57:39.83#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:39.83#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:39.83#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:57:39.83#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:57:39.83$vck44/valo=6,814.99 2006.229.14:57:39.83#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.14:57:39.83#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.14:57:39.83#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:39.83#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:39.83#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:39.83#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:39.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:57:39.83#ibcon#first serial, iclass 30, count 0 2006.229.14:57:39.83#ibcon#enter sib2, iclass 30, count 0 2006.229.14:57:39.83#ibcon#flushed, iclass 30, count 0 2006.229.14:57:39.83#ibcon#about to write, iclass 30, count 0 2006.229.14:57:39.83#ibcon#wrote, iclass 30, count 0 2006.229.14:57:39.83#ibcon#about to read 3, iclass 30, count 0 2006.229.14:57:39.85#ibcon#read 3, iclass 30, count 0 2006.229.14:57:39.85#ibcon#about to read 4, iclass 30, count 0 2006.229.14:57:39.85#ibcon#read 4, iclass 30, count 0 2006.229.14:57:39.85#ibcon#about to read 5, iclass 30, count 0 2006.229.14:57:39.85#ibcon#read 5, iclass 30, count 0 2006.229.14:57:39.85#ibcon#about to read 6, iclass 30, count 0 2006.229.14:57:39.85#ibcon#read 6, iclass 30, count 0 2006.229.14:57:39.85#ibcon#end of sib2, iclass 30, count 0 2006.229.14:57:39.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:57:39.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:57:39.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.14:57:39.85#ibcon#*before write, iclass 30, count 0 2006.229.14:57:39.85#ibcon#enter sib2, iclass 30, count 0 2006.229.14:57:39.85#ibcon#flushed, iclass 30, count 0 2006.229.14:57:39.85#ibcon#about to write, iclass 30, count 0 2006.229.14:57:39.85#ibcon#wrote, iclass 30, count 0 2006.229.14:57:39.85#ibcon#about to read 3, iclass 30, count 0 2006.229.14:57:39.89#ibcon#read 3, iclass 30, count 0 2006.229.14:57:39.89#ibcon#about to read 4, iclass 30, count 0 2006.229.14:57:39.89#ibcon#read 4, iclass 30, count 0 2006.229.14:57:39.89#ibcon#about to read 5, iclass 30, count 0 2006.229.14:57:39.89#ibcon#read 5, iclass 30, count 0 2006.229.14:57:39.89#ibcon#about to read 6, iclass 30, count 0 2006.229.14:57:39.89#ibcon#read 6, iclass 30, count 0 2006.229.14:57:39.89#ibcon#end of sib2, iclass 30, count 0 2006.229.14:57:39.89#ibcon#*after write, iclass 30, count 0 2006.229.14:57:39.89#ibcon#*before return 0, iclass 30, count 0 2006.229.14:57:39.89#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:39.89#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:39.89#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:57:39.89#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:57:39.89$vck44/va=6,4 2006.229.14:57:39.89#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.14:57:39.89#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.14:57:39.89#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:39.89#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:39.95#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:39.95#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:39.95#ibcon#enter wrdev, iclass 32, count 2 2006.229.14:57:39.95#ibcon#first serial, iclass 32, count 2 2006.229.14:57:39.95#ibcon#enter sib2, iclass 32, count 2 2006.229.14:57:39.95#ibcon#flushed, iclass 32, count 2 2006.229.14:57:39.95#ibcon#about to write, iclass 32, count 2 2006.229.14:57:39.95#ibcon#wrote, iclass 32, count 2 2006.229.14:57:39.95#ibcon#about to read 3, iclass 32, count 2 2006.229.14:57:39.97#ibcon#read 3, iclass 32, count 2 2006.229.14:57:39.97#ibcon#about to read 4, iclass 32, count 2 2006.229.14:57:39.97#ibcon#read 4, iclass 32, count 2 2006.229.14:57:39.97#ibcon#about to read 5, iclass 32, count 2 2006.229.14:57:39.97#ibcon#read 5, iclass 32, count 2 2006.229.14:57:39.97#ibcon#about to read 6, iclass 32, count 2 2006.229.14:57:39.97#ibcon#read 6, iclass 32, count 2 2006.229.14:57:39.97#ibcon#end of sib2, iclass 32, count 2 2006.229.14:57:39.97#ibcon#*mode == 0, iclass 32, count 2 2006.229.14:57:39.97#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.14:57:39.97#ibcon#[25=AT06-04\r\n] 2006.229.14:57:39.97#ibcon#*before write, iclass 32, count 2 2006.229.14:57:39.97#ibcon#enter sib2, iclass 32, count 2 2006.229.14:57:39.97#ibcon#flushed, iclass 32, count 2 2006.229.14:57:39.97#ibcon#about to write, iclass 32, count 2 2006.229.14:57:39.97#ibcon#wrote, iclass 32, count 2 2006.229.14:57:39.97#ibcon#about to read 3, iclass 32, count 2 2006.229.14:57:40.00#ibcon#read 3, iclass 32, count 2 2006.229.14:57:40.00#ibcon#about to read 4, iclass 32, count 2 2006.229.14:57:40.00#ibcon#read 4, iclass 32, count 2 2006.229.14:57:40.00#ibcon#about to read 5, iclass 32, count 2 2006.229.14:57:40.00#ibcon#read 5, iclass 32, count 2 2006.229.14:57:40.00#ibcon#about to read 6, iclass 32, count 2 2006.229.14:57:40.00#ibcon#read 6, iclass 32, count 2 2006.229.14:57:40.00#ibcon#end of sib2, iclass 32, count 2 2006.229.14:57:40.00#ibcon#*after write, iclass 32, count 2 2006.229.14:57:40.00#ibcon#*before return 0, iclass 32, count 2 2006.229.14:57:40.00#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:40.00#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:40.00#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.14:57:40.00#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:40.00#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:40.12#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:40.12#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:40.12#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:57:40.12#ibcon#first serial, iclass 32, count 0 2006.229.14:57:40.12#ibcon#enter sib2, iclass 32, count 0 2006.229.14:57:40.12#ibcon#flushed, iclass 32, count 0 2006.229.14:57:40.12#ibcon#about to write, iclass 32, count 0 2006.229.14:57:40.12#ibcon#wrote, iclass 32, count 0 2006.229.14:57:40.12#ibcon#about to read 3, iclass 32, count 0 2006.229.14:57:40.14#ibcon#read 3, iclass 32, count 0 2006.229.14:57:40.14#ibcon#about to read 4, iclass 32, count 0 2006.229.14:57:40.14#ibcon#read 4, iclass 32, count 0 2006.229.14:57:40.14#ibcon#about to read 5, iclass 32, count 0 2006.229.14:57:40.14#ibcon#read 5, iclass 32, count 0 2006.229.14:57:40.14#ibcon#about to read 6, iclass 32, count 0 2006.229.14:57:40.14#ibcon#read 6, iclass 32, count 0 2006.229.14:57:40.14#ibcon#end of sib2, iclass 32, count 0 2006.229.14:57:40.14#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:57:40.14#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:57:40.14#ibcon#[25=USB\r\n] 2006.229.14:57:40.14#ibcon#*before write, iclass 32, count 0 2006.229.14:57:40.14#ibcon#enter sib2, iclass 32, count 0 2006.229.14:57:40.14#ibcon#flushed, iclass 32, count 0 2006.229.14:57:40.14#ibcon#about to write, iclass 32, count 0 2006.229.14:57:40.14#ibcon#wrote, iclass 32, count 0 2006.229.14:57:40.14#ibcon#about to read 3, iclass 32, count 0 2006.229.14:57:40.17#ibcon#read 3, iclass 32, count 0 2006.229.14:57:40.17#ibcon#about to read 4, iclass 32, count 0 2006.229.14:57:40.17#ibcon#read 4, iclass 32, count 0 2006.229.14:57:40.17#ibcon#about to read 5, iclass 32, count 0 2006.229.14:57:40.17#ibcon#read 5, iclass 32, count 0 2006.229.14:57:40.17#ibcon#about to read 6, iclass 32, count 0 2006.229.14:57:40.17#ibcon#read 6, iclass 32, count 0 2006.229.14:57:40.17#ibcon#end of sib2, iclass 32, count 0 2006.229.14:57:40.17#ibcon#*after write, iclass 32, count 0 2006.229.14:57:40.17#ibcon#*before return 0, iclass 32, count 0 2006.229.14:57:40.17#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:40.17#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:40.17#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:57:40.17#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:57:40.17$vck44/valo=7,864.99 2006.229.14:57:40.17#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.14:57:40.17#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.14:57:40.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:40.17#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:40.17#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:40.17#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:40.17#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:57:40.17#ibcon#first serial, iclass 34, count 0 2006.229.14:57:40.17#ibcon#enter sib2, iclass 34, count 0 2006.229.14:57:40.17#ibcon#flushed, iclass 34, count 0 2006.229.14:57:40.17#ibcon#about to write, iclass 34, count 0 2006.229.14:57:40.17#ibcon#wrote, iclass 34, count 0 2006.229.14:57:40.17#ibcon#about to read 3, iclass 34, count 0 2006.229.14:57:40.19#ibcon#read 3, iclass 34, count 0 2006.229.14:57:40.19#ibcon#about to read 4, iclass 34, count 0 2006.229.14:57:40.19#ibcon#read 4, iclass 34, count 0 2006.229.14:57:40.19#ibcon#about to read 5, iclass 34, count 0 2006.229.14:57:40.19#ibcon#read 5, iclass 34, count 0 2006.229.14:57:40.19#ibcon#about to read 6, iclass 34, count 0 2006.229.14:57:40.19#ibcon#read 6, iclass 34, count 0 2006.229.14:57:40.19#ibcon#end of sib2, iclass 34, count 0 2006.229.14:57:40.19#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:57:40.19#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:57:40.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.14:57:40.19#ibcon#*before write, iclass 34, count 0 2006.229.14:57:40.19#ibcon#enter sib2, iclass 34, count 0 2006.229.14:57:40.19#ibcon#flushed, iclass 34, count 0 2006.229.14:57:40.19#ibcon#about to write, iclass 34, count 0 2006.229.14:57:40.19#ibcon#wrote, iclass 34, count 0 2006.229.14:57:40.19#ibcon#about to read 3, iclass 34, count 0 2006.229.14:57:40.23#ibcon#read 3, iclass 34, count 0 2006.229.14:57:40.23#ibcon#about to read 4, iclass 34, count 0 2006.229.14:57:40.23#ibcon#read 4, iclass 34, count 0 2006.229.14:57:40.23#ibcon#about to read 5, iclass 34, count 0 2006.229.14:57:40.23#ibcon#read 5, iclass 34, count 0 2006.229.14:57:40.23#ibcon#about to read 6, iclass 34, count 0 2006.229.14:57:40.23#ibcon#read 6, iclass 34, count 0 2006.229.14:57:40.23#ibcon#end of sib2, iclass 34, count 0 2006.229.14:57:40.23#ibcon#*after write, iclass 34, count 0 2006.229.14:57:40.23#ibcon#*before return 0, iclass 34, count 0 2006.229.14:57:40.23#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:40.23#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:40.23#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:57:40.23#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:57:40.23$vck44/va=7,5 2006.229.14:57:40.23#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.14:57:40.23#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.14:57:40.23#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:40.23#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:40.29#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:40.29#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:40.29#ibcon#enter wrdev, iclass 36, count 2 2006.229.14:57:40.29#ibcon#first serial, iclass 36, count 2 2006.229.14:57:40.29#ibcon#enter sib2, iclass 36, count 2 2006.229.14:57:40.29#ibcon#flushed, iclass 36, count 2 2006.229.14:57:40.29#ibcon#about to write, iclass 36, count 2 2006.229.14:57:40.29#ibcon#wrote, iclass 36, count 2 2006.229.14:57:40.29#ibcon#about to read 3, iclass 36, count 2 2006.229.14:57:40.31#ibcon#read 3, iclass 36, count 2 2006.229.14:57:40.31#ibcon#about to read 4, iclass 36, count 2 2006.229.14:57:40.31#ibcon#read 4, iclass 36, count 2 2006.229.14:57:40.31#ibcon#about to read 5, iclass 36, count 2 2006.229.14:57:40.31#ibcon#read 5, iclass 36, count 2 2006.229.14:57:40.31#ibcon#about to read 6, iclass 36, count 2 2006.229.14:57:40.31#ibcon#read 6, iclass 36, count 2 2006.229.14:57:40.31#ibcon#end of sib2, iclass 36, count 2 2006.229.14:57:40.31#ibcon#*mode == 0, iclass 36, count 2 2006.229.14:57:40.31#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.14:57:40.31#ibcon#[25=AT07-05\r\n] 2006.229.14:57:40.31#ibcon#*before write, iclass 36, count 2 2006.229.14:57:40.31#ibcon#enter sib2, iclass 36, count 2 2006.229.14:57:40.31#ibcon#flushed, iclass 36, count 2 2006.229.14:57:40.31#ibcon#about to write, iclass 36, count 2 2006.229.14:57:40.31#ibcon#wrote, iclass 36, count 2 2006.229.14:57:40.31#ibcon#about to read 3, iclass 36, count 2 2006.229.14:57:40.34#ibcon#read 3, iclass 36, count 2 2006.229.14:57:40.34#ibcon#about to read 4, iclass 36, count 2 2006.229.14:57:40.34#ibcon#read 4, iclass 36, count 2 2006.229.14:57:40.34#ibcon#about to read 5, iclass 36, count 2 2006.229.14:57:40.34#ibcon#read 5, iclass 36, count 2 2006.229.14:57:40.34#ibcon#about to read 6, iclass 36, count 2 2006.229.14:57:40.34#ibcon#read 6, iclass 36, count 2 2006.229.14:57:40.34#ibcon#end of sib2, iclass 36, count 2 2006.229.14:57:40.34#ibcon#*after write, iclass 36, count 2 2006.229.14:57:40.34#ibcon#*before return 0, iclass 36, count 2 2006.229.14:57:40.34#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:40.34#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:40.34#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.14:57:40.34#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:40.34#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:40.46#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:40.46#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:40.46#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:57:40.46#ibcon#first serial, iclass 36, count 0 2006.229.14:57:40.46#ibcon#enter sib2, iclass 36, count 0 2006.229.14:57:40.46#ibcon#flushed, iclass 36, count 0 2006.229.14:57:40.46#ibcon#about to write, iclass 36, count 0 2006.229.14:57:40.46#ibcon#wrote, iclass 36, count 0 2006.229.14:57:40.46#ibcon#about to read 3, iclass 36, count 0 2006.229.14:57:40.48#ibcon#read 3, iclass 36, count 0 2006.229.14:57:40.48#ibcon#about to read 4, iclass 36, count 0 2006.229.14:57:40.48#ibcon#read 4, iclass 36, count 0 2006.229.14:57:40.48#ibcon#about to read 5, iclass 36, count 0 2006.229.14:57:40.48#ibcon#read 5, iclass 36, count 0 2006.229.14:57:40.48#ibcon#about to read 6, iclass 36, count 0 2006.229.14:57:40.48#ibcon#read 6, iclass 36, count 0 2006.229.14:57:40.48#ibcon#end of sib2, iclass 36, count 0 2006.229.14:57:40.48#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:57:40.48#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:57:40.48#ibcon#[25=USB\r\n] 2006.229.14:57:40.48#ibcon#*before write, iclass 36, count 0 2006.229.14:57:40.48#ibcon#enter sib2, iclass 36, count 0 2006.229.14:57:40.48#ibcon#flushed, iclass 36, count 0 2006.229.14:57:40.48#ibcon#about to write, iclass 36, count 0 2006.229.14:57:40.48#ibcon#wrote, iclass 36, count 0 2006.229.14:57:40.48#ibcon#about to read 3, iclass 36, count 0 2006.229.14:57:40.51#ibcon#read 3, iclass 36, count 0 2006.229.14:57:40.51#ibcon#about to read 4, iclass 36, count 0 2006.229.14:57:40.51#ibcon#read 4, iclass 36, count 0 2006.229.14:57:40.51#ibcon#about to read 5, iclass 36, count 0 2006.229.14:57:40.51#ibcon#read 5, iclass 36, count 0 2006.229.14:57:40.51#ibcon#about to read 6, iclass 36, count 0 2006.229.14:57:40.51#ibcon#read 6, iclass 36, count 0 2006.229.14:57:40.51#ibcon#end of sib2, iclass 36, count 0 2006.229.14:57:40.51#ibcon#*after write, iclass 36, count 0 2006.229.14:57:40.51#ibcon#*before return 0, iclass 36, count 0 2006.229.14:57:40.51#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:40.51#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:40.51#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:57:40.51#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:57:40.51$vck44/valo=8,884.99 2006.229.14:57:40.51#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.14:57:40.51#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.14:57:40.51#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:40.51#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:40.51#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:40.51#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:40.51#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:57:40.51#ibcon#first serial, iclass 38, count 0 2006.229.14:57:40.51#ibcon#enter sib2, iclass 38, count 0 2006.229.14:57:40.51#ibcon#flushed, iclass 38, count 0 2006.229.14:57:40.51#ibcon#about to write, iclass 38, count 0 2006.229.14:57:40.51#ibcon#wrote, iclass 38, count 0 2006.229.14:57:40.51#ibcon#about to read 3, iclass 38, count 0 2006.229.14:57:40.53#ibcon#read 3, iclass 38, count 0 2006.229.14:57:40.53#ibcon#about to read 4, iclass 38, count 0 2006.229.14:57:40.53#ibcon#read 4, iclass 38, count 0 2006.229.14:57:40.53#ibcon#about to read 5, iclass 38, count 0 2006.229.14:57:40.53#ibcon#read 5, iclass 38, count 0 2006.229.14:57:40.53#ibcon#about to read 6, iclass 38, count 0 2006.229.14:57:40.53#ibcon#read 6, iclass 38, count 0 2006.229.14:57:40.53#ibcon#end of sib2, iclass 38, count 0 2006.229.14:57:40.53#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:57:40.53#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:57:40.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.14:57:40.53#ibcon#*before write, iclass 38, count 0 2006.229.14:57:40.53#ibcon#enter sib2, iclass 38, count 0 2006.229.14:57:40.53#ibcon#flushed, iclass 38, count 0 2006.229.14:57:40.53#ibcon#about to write, iclass 38, count 0 2006.229.14:57:40.53#ibcon#wrote, iclass 38, count 0 2006.229.14:57:40.53#ibcon#about to read 3, iclass 38, count 0 2006.229.14:57:40.57#ibcon#read 3, iclass 38, count 0 2006.229.14:57:40.57#ibcon#about to read 4, iclass 38, count 0 2006.229.14:57:40.57#ibcon#read 4, iclass 38, count 0 2006.229.14:57:40.57#ibcon#about to read 5, iclass 38, count 0 2006.229.14:57:40.57#ibcon#read 5, iclass 38, count 0 2006.229.14:57:40.57#ibcon#about to read 6, iclass 38, count 0 2006.229.14:57:40.57#ibcon#read 6, iclass 38, count 0 2006.229.14:57:40.57#ibcon#end of sib2, iclass 38, count 0 2006.229.14:57:40.57#ibcon#*after write, iclass 38, count 0 2006.229.14:57:40.57#ibcon#*before return 0, iclass 38, count 0 2006.229.14:57:40.57#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:40.57#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:40.57#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:57:40.57#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:57:40.57$vck44/va=8,6 2006.229.14:57:40.57#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.14:57:40.57#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.14:57:40.57#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:40.57#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:57:40.63#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:57:40.63#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:57:40.63#ibcon#enter wrdev, iclass 40, count 2 2006.229.14:57:40.63#ibcon#first serial, iclass 40, count 2 2006.229.14:57:40.63#ibcon#enter sib2, iclass 40, count 2 2006.229.14:57:40.63#ibcon#flushed, iclass 40, count 2 2006.229.14:57:40.63#ibcon#about to write, iclass 40, count 2 2006.229.14:57:40.63#ibcon#wrote, iclass 40, count 2 2006.229.14:57:40.63#ibcon#about to read 3, iclass 40, count 2 2006.229.14:57:40.65#ibcon#read 3, iclass 40, count 2 2006.229.14:57:40.65#ibcon#about to read 4, iclass 40, count 2 2006.229.14:57:40.65#ibcon#read 4, iclass 40, count 2 2006.229.14:57:40.65#ibcon#about to read 5, iclass 40, count 2 2006.229.14:57:40.65#ibcon#read 5, iclass 40, count 2 2006.229.14:57:40.65#ibcon#about to read 6, iclass 40, count 2 2006.229.14:57:40.65#ibcon#read 6, iclass 40, count 2 2006.229.14:57:40.65#ibcon#end of sib2, iclass 40, count 2 2006.229.14:57:40.65#ibcon#*mode == 0, iclass 40, count 2 2006.229.14:57:40.65#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.14:57:40.65#ibcon#[25=AT08-06\r\n] 2006.229.14:57:40.65#ibcon#*before write, iclass 40, count 2 2006.229.14:57:40.65#ibcon#enter sib2, iclass 40, count 2 2006.229.14:57:40.65#ibcon#flushed, iclass 40, count 2 2006.229.14:57:40.65#ibcon#about to write, iclass 40, count 2 2006.229.14:57:40.65#ibcon#wrote, iclass 40, count 2 2006.229.14:57:40.65#ibcon#about to read 3, iclass 40, count 2 2006.229.14:57:40.68#ibcon#read 3, iclass 40, count 2 2006.229.14:57:40.68#ibcon#about to read 4, iclass 40, count 2 2006.229.14:57:40.68#ibcon#read 4, iclass 40, count 2 2006.229.14:57:40.68#ibcon#about to read 5, iclass 40, count 2 2006.229.14:57:40.68#ibcon#read 5, iclass 40, count 2 2006.229.14:57:40.68#ibcon#about to read 6, iclass 40, count 2 2006.229.14:57:40.68#ibcon#read 6, iclass 40, count 2 2006.229.14:57:40.68#ibcon#end of sib2, iclass 40, count 2 2006.229.14:57:40.68#ibcon#*after write, iclass 40, count 2 2006.229.14:57:40.68#ibcon#*before return 0, iclass 40, count 2 2006.229.14:57:40.68#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:57:40.68#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.14:57:40.68#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.14:57:40.68#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:40.68#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:57:40.80#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:57:40.80#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:57:40.80#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:57:40.80#ibcon#first serial, iclass 40, count 0 2006.229.14:57:40.80#ibcon#enter sib2, iclass 40, count 0 2006.229.14:57:40.80#ibcon#flushed, iclass 40, count 0 2006.229.14:57:40.80#ibcon#about to write, iclass 40, count 0 2006.229.14:57:40.80#ibcon#wrote, iclass 40, count 0 2006.229.14:57:40.80#ibcon#about to read 3, iclass 40, count 0 2006.229.14:57:40.82#ibcon#read 3, iclass 40, count 0 2006.229.14:57:40.82#ibcon#about to read 4, iclass 40, count 0 2006.229.14:57:40.82#ibcon#read 4, iclass 40, count 0 2006.229.14:57:40.82#ibcon#about to read 5, iclass 40, count 0 2006.229.14:57:40.82#ibcon#read 5, iclass 40, count 0 2006.229.14:57:40.82#ibcon#about to read 6, iclass 40, count 0 2006.229.14:57:40.82#ibcon#read 6, iclass 40, count 0 2006.229.14:57:40.82#ibcon#end of sib2, iclass 40, count 0 2006.229.14:57:40.82#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:57:40.82#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:57:40.82#ibcon#[25=USB\r\n] 2006.229.14:57:40.82#ibcon#*before write, iclass 40, count 0 2006.229.14:57:40.82#ibcon#enter sib2, iclass 40, count 0 2006.229.14:57:40.82#ibcon#flushed, iclass 40, count 0 2006.229.14:57:40.82#ibcon#about to write, iclass 40, count 0 2006.229.14:57:40.82#ibcon#wrote, iclass 40, count 0 2006.229.14:57:40.82#ibcon#about to read 3, iclass 40, count 0 2006.229.14:57:40.85#ibcon#read 3, iclass 40, count 0 2006.229.14:57:40.85#ibcon#about to read 4, iclass 40, count 0 2006.229.14:57:40.85#ibcon#read 4, iclass 40, count 0 2006.229.14:57:40.85#ibcon#about to read 5, iclass 40, count 0 2006.229.14:57:40.85#ibcon#read 5, iclass 40, count 0 2006.229.14:57:40.85#ibcon#about to read 6, iclass 40, count 0 2006.229.14:57:40.85#ibcon#read 6, iclass 40, count 0 2006.229.14:57:40.85#ibcon#end of sib2, iclass 40, count 0 2006.229.14:57:40.85#ibcon#*after write, iclass 40, count 0 2006.229.14:57:40.85#ibcon#*before return 0, iclass 40, count 0 2006.229.14:57:40.85#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:57:40.85#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.14:57:40.85#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:57:40.85#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:57:40.85$vck44/vblo=1,629.99 2006.229.14:57:40.85#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.14:57:40.85#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.14:57:40.85#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:40.85#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:57:40.85#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:57:40.85#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:57:40.85#ibcon#enter wrdev, iclass 4, count 0 2006.229.14:57:40.85#ibcon#first serial, iclass 4, count 0 2006.229.14:57:40.85#ibcon#enter sib2, iclass 4, count 0 2006.229.14:57:40.85#ibcon#flushed, iclass 4, count 0 2006.229.14:57:40.85#ibcon#about to write, iclass 4, count 0 2006.229.14:57:40.85#ibcon#wrote, iclass 4, count 0 2006.229.14:57:40.85#ibcon#about to read 3, iclass 4, count 0 2006.229.14:57:40.87#ibcon#read 3, iclass 4, count 0 2006.229.14:57:40.87#ibcon#about to read 4, iclass 4, count 0 2006.229.14:57:40.87#ibcon#read 4, iclass 4, count 0 2006.229.14:57:40.87#ibcon#about to read 5, iclass 4, count 0 2006.229.14:57:40.87#ibcon#read 5, iclass 4, count 0 2006.229.14:57:40.87#ibcon#about to read 6, iclass 4, count 0 2006.229.14:57:40.87#ibcon#read 6, iclass 4, count 0 2006.229.14:57:40.87#ibcon#end of sib2, iclass 4, count 0 2006.229.14:57:40.87#ibcon#*mode == 0, iclass 4, count 0 2006.229.14:57:40.87#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.14:57:40.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.14:57:40.87#ibcon#*before write, iclass 4, count 0 2006.229.14:57:40.87#ibcon#enter sib2, iclass 4, count 0 2006.229.14:57:40.87#ibcon#flushed, iclass 4, count 0 2006.229.14:57:40.87#ibcon#about to write, iclass 4, count 0 2006.229.14:57:40.87#ibcon#wrote, iclass 4, count 0 2006.229.14:57:40.87#ibcon#about to read 3, iclass 4, count 0 2006.229.14:57:40.91#ibcon#read 3, iclass 4, count 0 2006.229.14:57:40.91#ibcon#about to read 4, iclass 4, count 0 2006.229.14:57:40.91#ibcon#read 4, iclass 4, count 0 2006.229.14:57:40.91#ibcon#about to read 5, iclass 4, count 0 2006.229.14:57:40.91#ibcon#read 5, iclass 4, count 0 2006.229.14:57:40.91#ibcon#about to read 6, iclass 4, count 0 2006.229.14:57:40.91#ibcon#read 6, iclass 4, count 0 2006.229.14:57:40.91#ibcon#end of sib2, iclass 4, count 0 2006.229.14:57:40.91#ibcon#*after write, iclass 4, count 0 2006.229.14:57:40.91#ibcon#*before return 0, iclass 4, count 0 2006.229.14:57:40.91#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:57:40.91#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.14:57:40.91#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.14:57:40.91#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.14:57:40.91$vck44/vb=1,4 2006.229.14:57:40.91#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.14:57:40.91#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.14:57:40.91#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:40.91#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:57:40.91#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:57:40.91#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:57:40.91#ibcon#enter wrdev, iclass 6, count 2 2006.229.14:57:40.91#ibcon#first serial, iclass 6, count 2 2006.229.14:57:40.91#ibcon#enter sib2, iclass 6, count 2 2006.229.14:57:40.91#ibcon#flushed, iclass 6, count 2 2006.229.14:57:40.91#ibcon#about to write, iclass 6, count 2 2006.229.14:57:40.91#ibcon#wrote, iclass 6, count 2 2006.229.14:57:40.91#ibcon#about to read 3, iclass 6, count 2 2006.229.14:57:40.93#ibcon#read 3, iclass 6, count 2 2006.229.14:57:40.93#ibcon#about to read 4, iclass 6, count 2 2006.229.14:57:40.93#ibcon#read 4, iclass 6, count 2 2006.229.14:57:40.93#ibcon#about to read 5, iclass 6, count 2 2006.229.14:57:40.93#ibcon#read 5, iclass 6, count 2 2006.229.14:57:40.93#ibcon#about to read 6, iclass 6, count 2 2006.229.14:57:40.93#ibcon#read 6, iclass 6, count 2 2006.229.14:57:40.93#ibcon#end of sib2, iclass 6, count 2 2006.229.14:57:40.93#ibcon#*mode == 0, iclass 6, count 2 2006.229.14:57:40.93#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.14:57:40.93#ibcon#[27=AT01-04\r\n] 2006.229.14:57:40.93#ibcon#*before write, iclass 6, count 2 2006.229.14:57:40.93#ibcon#enter sib2, iclass 6, count 2 2006.229.14:57:40.93#ibcon#flushed, iclass 6, count 2 2006.229.14:57:40.93#ibcon#about to write, iclass 6, count 2 2006.229.14:57:40.93#ibcon#wrote, iclass 6, count 2 2006.229.14:57:40.93#ibcon#about to read 3, iclass 6, count 2 2006.229.14:57:40.96#ibcon#read 3, iclass 6, count 2 2006.229.14:57:40.96#ibcon#about to read 4, iclass 6, count 2 2006.229.14:57:40.96#ibcon#read 4, iclass 6, count 2 2006.229.14:57:40.96#ibcon#about to read 5, iclass 6, count 2 2006.229.14:57:40.96#ibcon#read 5, iclass 6, count 2 2006.229.14:57:40.96#ibcon#about to read 6, iclass 6, count 2 2006.229.14:57:40.96#ibcon#read 6, iclass 6, count 2 2006.229.14:57:40.96#ibcon#end of sib2, iclass 6, count 2 2006.229.14:57:40.96#ibcon#*after write, iclass 6, count 2 2006.229.14:57:40.96#ibcon#*before return 0, iclass 6, count 2 2006.229.14:57:40.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:57:40.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.14:57:40.96#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.14:57:40.96#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:40.96#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:57:41.08#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:57:41.08#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:57:41.08#ibcon#enter wrdev, iclass 6, count 0 2006.229.14:57:41.08#ibcon#first serial, iclass 6, count 0 2006.229.14:57:41.08#ibcon#enter sib2, iclass 6, count 0 2006.229.14:57:41.08#ibcon#flushed, iclass 6, count 0 2006.229.14:57:41.08#ibcon#about to write, iclass 6, count 0 2006.229.14:57:41.08#ibcon#wrote, iclass 6, count 0 2006.229.14:57:41.08#ibcon#about to read 3, iclass 6, count 0 2006.229.14:57:41.10#ibcon#read 3, iclass 6, count 0 2006.229.14:57:41.10#ibcon#about to read 4, iclass 6, count 0 2006.229.14:57:41.10#ibcon#read 4, iclass 6, count 0 2006.229.14:57:41.10#ibcon#about to read 5, iclass 6, count 0 2006.229.14:57:41.10#ibcon#read 5, iclass 6, count 0 2006.229.14:57:41.10#ibcon#about to read 6, iclass 6, count 0 2006.229.14:57:41.10#ibcon#read 6, iclass 6, count 0 2006.229.14:57:41.10#ibcon#end of sib2, iclass 6, count 0 2006.229.14:57:41.10#ibcon#*mode == 0, iclass 6, count 0 2006.229.14:57:41.10#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.14:57:41.10#ibcon#[27=USB\r\n] 2006.229.14:57:41.10#ibcon#*before write, iclass 6, count 0 2006.229.14:57:41.10#ibcon#enter sib2, iclass 6, count 0 2006.229.14:57:41.10#ibcon#flushed, iclass 6, count 0 2006.229.14:57:41.10#ibcon#about to write, iclass 6, count 0 2006.229.14:57:41.10#ibcon#wrote, iclass 6, count 0 2006.229.14:57:41.10#ibcon#about to read 3, iclass 6, count 0 2006.229.14:57:41.13#ibcon#read 3, iclass 6, count 0 2006.229.14:57:41.13#ibcon#about to read 4, iclass 6, count 0 2006.229.14:57:41.13#ibcon#read 4, iclass 6, count 0 2006.229.14:57:41.13#ibcon#about to read 5, iclass 6, count 0 2006.229.14:57:41.13#ibcon#read 5, iclass 6, count 0 2006.229.14:57:41.13#ibcon#about to read 6, iclass 6, count 0 2006.229.14:57:41.13#ibcon#read 6, iclass 6, count 0 2006.229.14:57:41.13#ibcon#end of sib2, iclass 6, count 0 2006.229.14:57:41.13#ibcon#*after write, iclass 6, count 0 2006.229.14:57:41.13#ibcon#*before return 0, iclass 6, count 0 2006.229.14:57:41.13#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:57:41.13#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.14:57:41.13#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.14:57:41.13#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.14:57:41.13$vck44/vblo=2,634.99 2006.229.14:57:41.13#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.14:57:41.13#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.14:57:41.13#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:41.13#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:41.13#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:41.13#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:41.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.14:57:41.13#ibcon#first serial, iclass 10, count 0 2006.229.14:57:41.13#ibcon#enter sib2, iclass 10, count 0 2006.229.14:57:41.13#ibcon#flushed, iclass 10, count 0 2006.229.14:57:41.13#ibcon#about to write, iclass 10, count 0 2006.229.14:57:41.13#ibcon#wrote, iclass 10, count 0 2006.229.14:57:41.13#ibcon#about to read 3, iclass 10, count 0 2006.229.14:57:41.15#ibcon#read 3, iclass 10, count 0 2006.229.14:57:41.15#ibcon#about to read 4, iclass 10, count 0 2006.229.14:57:41.15#ibcon#read 4, iclass 10, count 0 2006.229.14:57:41.15#ibcon#about to read 5, iclass 10, count 0 2006.229.14:57:41.15#ibcon#read 5, iclass 10, count 0 2006.229.14:57:41.15#ibcon#about to read 6, iclass 10, count 0 2006.229.14:57:41.15#ibcon#read 6, iclass 10, count 0 2006.229.14:57:41.15#ibcon#end of sib2, iclass 10, count 0 2006.229.14:57:41.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.14:57:41.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.14:57:41.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.14:57:41.15#ibcon#*before write, iclass 10, count 0 2006.229.14:57:41.15#ibcon#enter sib2, iclass 10, count 0 2006.229.14:57:41.15#ibcon#flushed, iclass 10, count 0 2006.229.14:57:41.15#ibcon#about to write, iclass 10, count 0 2006.229.14:57:41.15#ibcon#wrote, iclass 10, count 0 2006.229.14:57:41.15#ibcon#about to read 3, iclass 10, count 0 2006.229.14:57:41.19#ibcon#read 3, iclass 10, count 0 2006.229.14:57:41.19#ibcon#about to read 4, iclass 10, count 0 2006.229.14:57:41.19#ibcon#read 4, iclass 10, count 0 2006.229.14:57:41.19#ibcon#about to read 5, iclass 10, count 0 2006.229.14:57:41.19#ibcon#read 5, iclass 10, count 0 2006.229.14:57:41.19#ibcon#about to read 6, iclass 10, count 0 2006.229.14:57:41.19#ibcon#read 6, iclass 10, count 0 2006.229.14:57:41.19#ibcon#end of sib2, iclass 10, count 0 2006.229.14:57:41.19#ibcon#*after write, iclass 10, count 0 2006.229.14:57:41.19#ibcon#*before return 0, iclass 10, count 0 2006.229.14:57:41.19#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:41.19#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.14:57:41.19#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.14:57:41.19#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.14:57:41.19$vck44/vb=2,4 2006.229.14:57:41.19#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.14:57:41.19#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.14:57:41.19#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:41.19#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:41.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:41.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:41.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.14:57:41.25#ibcon#first serial, iclass 12, count 2 2006.229.14:57:41.25#ibcon#enter sib2, iclass 12, count 2 2006.229.14:57:41.25#ibcon#flushed, iclass 12, count 2 2006.229.14:57:41.25#ibcon#about to write, iclass 12, count 2 2006.229.14:57:41.25#ibcon#wrote, iclass 12, count 2 2006.229.14:57:41.25#ibcon#about to read 3, iclass 12, count 2 2006.229.14:57:41.27#ibcon#read 3, iclass 12, count 2 2006.229.14:57:41.27#ibcon#about to read 4, iclass 12, count 2 2006.229.14:57:41.27#ibcon#read 4, iclass 12, count 2 2006.229.14:57:41.27#ibcon#about to read 5, iclass 12, count 2 2006.229.14:57:41.27#ibcon#read 5, iclass 12, count 2 2006.229.14:57:41.27#ibcon#about to read 6, iclass 12, count 2 2006.229.14:57:41.27#ibcon#read 6, iclass 12, count 2 2006.229.14:57:41.27#ibcon#end of sib2, iclass 12, count 2 2006.229.14:57:41.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.14:57:41.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.14:57:41.27#ibcon#[27=AT02-04\r\n] 2006.229.14:57:41.27#ibcon#*before write, iclass 12, count 2 2006.229.14:57:41.27#ibcon#enter sib2, iclass 12, count 2 2006.229.14:57:41.27#ibcon#flushed, iclass 12, count 2 2006.229.14:57:41.27#ibcon#about to write, iclass 12, count 2 2006.229.14:57:41.27#ibcon#wrote, iclass 12, count 2 2006.229.14:57:41.27#ibcon#about to read 3, iclass 12, count 2 2006.229.14:57:41.30#ibcon#read 3, iclass 12, count 2 2006.229.14:57:41.30#ibcon#about to read 4, iclass 12, count 2 2006.229.14:57:41.30#ibcon#read 4, iclass 12, count 2 2006.229.14:57:41.30#ibcon#about to read 5, iclass 12, count 2 2006.229.14:57:41.30#ibcon#read 5, iclass 12, count 2 2006.229.14:57:41.30#ibcon#about to read 6, iclass 12, count 2 2006.229.14:57:41.30#ibcon#read 6, iclass 12, count 2 2006.229.14:57:41.30#ibcon#end of sib2, iclass 12, count 2 2006.229.14:57:41.30#ibcon#*after write, iclass 12, count 2 2006.229.14:57:41.30#ibcon#*before return 0, iclass 12, count 2 2006.229.14:57:41.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:41.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.14:57:41.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.14:57:41.30#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:41.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:41.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:41.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:41.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.14:57:41.42#ibcon#first serial, iclass 12, count 0 2006.229.14:57:41.42#ibcon#enter sib2, iclass 12, count 0 2006.229.14:57:41.42#ibcon#flushed, iclass 12, count 0 2006.229.14:57:41.42#ibcon#about to write, iclass 12, count 0 2006.229.14:57:41.42#ibcon#wrote, iclass 12, count 0 2006.229.14:57:41.42#ibcon#about to read 3, iclass 12, count 0 2006.229.14:57:41.44#ibcon#read 3, iclass 12, count 0 2006.229.14:57:41.44#ibcon#about to read 4, iclass 12, count 0 2006.229.14:57:41.44#ibcon#read 4, iclass 12, count 0 2006.229.14:57:41.44#ibcon#about to read 5, iclass 12, count 0 2006.229.14:57:41.44#ibcon#read 5, iclass 12, count 0 2006.229.14:57:41.44#ibcon#about to read 6, iclass 12, count 0 2006.229.14:57:41.44#ibcon#read 6, iclass 12, count 0 2006.229.14:57:41.44#ibcon#end of sib2, iclass 12, count 0 2006.229.14:57:41.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.14:57:41.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.14:57:41.44#ibcon#[27=USB\r\n] 2006.229.14:57:41.44#ibcon#*before write, iclass 12, count 0 2006.229.14:57:41.44#ibcon#enter sib2, iclass 12, count 0 2006.229.14:57:41.44#ibcon#flushed, iclass 12, count 0 2006.229.14:57:41.44#ibcon#about to write, iclass 12, count 0 2006.229.14:57:41.44#ibcon#wrote, iclass 12, count 0 2006.229.14:57:41.44#ibcon#about to read 3, iclass 12, count 0 2006.229.14:57:41.47#ibcon#read 3, iclass 12, count 0 2006.229.14:57:41.47#ibcon#about to read 4, iclass 12, count 0 2006.229.14:57:41.47#ibcon#read 4, iclass 12, count 0 2006.229.14:57:41.47#ibcon#about to read 5, iclass 12, count 0 2006.229.14:57:41.47#ibcon#read 5, iclass 12, count 0 2006.229.14:57:41.47#ibcon#about to read 6, iclass 12, count 0 2006.229.14:57:41.47#ibcon#read 6, iclass 12, count 0 2006.229.14:57:41.47#ibcon#end of sib2, iclass 12, count 0 2006.229.14:57:41.47#ibcon#*after write, iclass 12, count 0 2006.229.14:57:41.47#ibcon#*before return 0, iclass 12, count 0 2006.229.14:57:41.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:41.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.14:57:41.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.14:57:41.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.14:57:41.47$vck44/vblo=3,649.99 2006.229.14:57:41.47#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.14:57:41.47#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.14:57:41.47#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:41.47#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:41.47#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:41.47#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:41.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.14:57:41.47#ibcon#first serial, iclass 14, count 0 2006.229.14:57:41.47#ibcon#enter sib2, iclass 14, count 0 2006.229.14:57:41.47#ibcon#flushed, iclass 14, count 0 2006.229.14:57:41.47#ibcon#about to write, iclass 14, count 0 2006.229.14:57:41.47#ibcon#wrote, iclass 14, count 0 2006.229.14:57:41.47#ibcon#about to read 3, iclass 14, count 0 2006.229.14:57:41.49#ibcon#read 3, iclass 14, count 0 2006.229.14:57:41.49#ibcon#about to read 4, iclass 14, count 0 2006.229.14:57:41.49#ibcon#read 4, iclass 14, count 0 2006.229.14:57:41.49#ibcon#about to read 5, iclass 14, count 0 2006.229.14:57:41.49#ibcon#read 5, iclass 14, count 0 2006.229.14:57:41.49#ibcon#about to read 6, iclass 14, count 0 2006.229.14:57:41.49#ibcon#read 6, iclass 14, count 0 2006.229.14:57:41.49#ibcon#end of sib2, iclass 14, count 0 2006.229.14:57:41.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.14:57:41.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.14:57:41.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.14:57:41.49#ibcon#*before write, iclass 14, count 0 2006.229.14:57:41.49#ibcon#enter sib2, iclass 14, count 0 2006.229.14:57:41.49#ibcon#flushed, iclass 14, count 0 2006.229.14:57:41.49#ibcon#about to write, iclass 14, count 0 2006.229.14:57:41.49#ibcon#wrote, iclass 14, count 0 2006.229.14:57:41.49#ibcon#about to read 3, iclass 14, count 0 2006.229.14:57:41.53#ibcon#read 3, iclass 14, count 0 2006.229.14:57:41.53#ibcon#about to read 4, iclass 14, count 0 2006.229.14:57:41.53#ibcon#read 4, iclass 14, count 0 2006.229.14:57:41.53#ibcon#about to read 5, iclass 14, count 0 2006.229.14:57:41.53#ibcon#read 5, iclass 14, count 0 2006.229.14:57:41.53#ibcon#about to read 6, iclass 14, count 0 2006.229.14:57:41.53#ibcon#read 6, iclass 14, count 0 2006.229.14:57:41.53#ibcon#end of sib2, iclass 14, count 0 2006.229.14:57:41.53#ibcon#*after write, iclass 14, count 0 2006.229.14:57:41.53#ibcon#*before return 0, iclass 14, count 0 2006.229.14:57:41.53#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:41.53#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.14:57:41.53#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.14:57:41.53#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.14:57:41.53$vck44/vb=3,4 2006.229.14:57:41.53#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.14:57:41.53#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.14:57:41.53#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:41.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:41.59#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:41.59#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:41.59#ibcon#enter wrdev, iclass 16, count 2 2006.229.14:57:41.59#ibcon#first serial, iclass 16, count 2 2006.229.14:57:41.59#ibcon#enter sib2, iclass 16, count 2 2006.229.14:57:41.59#ibcon#flushed, iclass 16, count 2 2006.229.14:57:41.59#ibcon#about to write, iclass 16, count 2 2006.229.14:57:41.59#ibcon#wrote, iclass 16, count 2 2006.229.14:57:41.59#ibcon#about to read 3, iclass 16, count 2 2006.229.14:57:41.61#ibcon#read 3, iclass 16, count 2 2006.229.14:57:41.61#ibcon#about to read 4, iclass 16, count 2 2006.229.14:57:41.61#ibcon#read 4, iclass 16, count 2 2006.229.14:57:41.61#ibcon#about to read 5, iclass 16, count 2 2006.229.14:57:41.61#ibcon#read 5, iclass 16, count 2 2006.229.14:57:41.61#ibcon#about to read 6, iclass 16, count 2 2006.229.14:57:41.61#ibcon#read 6, iclass 16, count 2 2006.229.14:57:41.61#ibcon#end of sib2, iclass 16, count 2 2006.229.14:57:41.61#ibcon#*mode == 0, iclass 16, count 2 2006.229.14:57:41.61#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.14:57:41.61#ibcon#[27=AT03-04\r\n] 2006.229.14:57:41.61#ibcon#*before write, iclass 16, count 2 2006.229.14:57:41.61#ibcon#enter sib2, iclass 16, count 2 2006.229.14:57:41.61#ibcon#flushed, iclass 16, count 2 2006.229.14:57:41.61#ibcon#about to write, iclass 16, count 2 2006.229.14:57:41.61#ibcon#wrote, iclass 16, count 2 2006.229.14:57:41.61#ibcon#about to read 3, iclass 16, count 2 2006.229.14:57:41.64#ibcon#read 3, iclass 16, count 2 2006.229.14:57:41.64#ibcon#about to read 4, iclass 16, count 2 2006.229.14:57:41.64#ibcon#read 4, iclass 16, count 2 2006.229.14:57:41.64#ibcon#about to read 5, iclass 16, count 2 2006.229.14:57:41.64#ibcon#read 5, iclass 16, count 2 2006.229.14:57:41.64#ibcon#about to read 6, iclass 16, count 2 2006.229.14:57:41.64#ibcon#read 6, iclass 16, count 2 2006.229.14:57:41.64#ibcon#end of sib2, iclass 16, count 2 2006.229.14:57:41.64#ibcon#*after write, iclass 16, count 2 2006.229.14:57:41.64#ibcon#*before return 0, iclass 16, count 2 2006.229.14:57:41.64#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:41.64#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.14:57:41.64#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.14:57:41.64#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:41.64#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:41.76#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:41.76#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:41.76#ibcon#enter wrdev, iclass 16, count 0 2006.229.14:57:41.76#ibcon#first serial, iclass 16, count 0 2006.229.14:57:41.76#ibcon#enter sib2, iclass 16, count 0 2006.229.14:57:41.76#ibcon#flushed, iclass 16, count 0 2006.229.14:57:41.76#ibcon#about to write, iclass 16, count 0 2006.229.14:57:41.76#ibcon#wrote, iclass 16, count 0 2006.229.14:57:41.76#ibcon#about to read 3, iclass 16, count 0 2006.229.14:57:41.78#ibcon#read 3, iclass 16, count 0 2006.229.14:57:41.78#ibcon#about to read 4, iclass 16, count 0 2006.229.14:57:41.78#ibcon#read 4, iclass 16, count 0 2006.229.14:57:41.78#ibcon#about to read 5, iclass 16, count 0 2006.229.14:57:41.78#ibcon#read 5, iclass 16, count 0 2006.229.14:57:41.78#ibcon#about to read 6, iclass 16, count 0 2006.229.14:57:41.78#ibcon#read 6, iclass 16, count 0 2006.229.14:57:41.78#ibcon#end of sib2, iclass 16, count 0 2006.229.14:57:41.78#ibcon#*mode == 0, iclass 16, count 0 2006.229.14:57:41.78#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.14:57:41.78#ibcon#[27=USB\r\n] 2006.229.14:57:41.78#ibcon#*before write, iclass 16, count 0 2006.229.14:57:41.78#ibcon#enter sib2, iclass 16, count 0 2006.229.14:57:41.78#ibcon#flushed, iclass 16, count 0 2006.229.14:57:41.78#ibcon#about to write, iclass 16, count 0 2006.229.14:57:41.78#ibcon#wrote, iclass 16, count 0 2006.229.14:57:41.78#ibcon#about to read 3, iclass 16, count 0 2006.229.14:57:41.81#ibcon#read 3, iclass 16, count 0 2006.229.14:57:41.81#ibcon#about to read 4, iclass 16, count 0 2006.229.14:57:41.81#ibcon#read 4, iclass 16, count 0 2006.229.14:57:41.81#ibcon#about to read 5, iclass 16, count 0 2006.229.14:57:41.81#ibcon#read 5, iclass 16, count 0 2006.229.14:57:41.81#ibcon#about to read 6, iclass 16, count 0 2006.229.14:57:41.81#ibcon#read 6, iclass 16, count 0 2006.229.14:57:41.81#ibcon#end of sib2, iclass 16, count 0 2006.229.14:57:41.81#ibcon#*after write, iclass 16, count 0 2006.229.14:57:41.81#ibcon#*before return 0, iclass 16, count 0 2006.229.14:57:41.81#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:41.81#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.14:57:41.81#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.14:57:41.81#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.14:57:41.81$vck44/vblo=4,679.99 2006.229.14:57:41.81#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.14:57:41.81#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.14:57:41.81#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:41.81#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:41.81#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:41.81#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:41.81#ibcon#enter wrdev, iclass 18, count 0 2006.229.14:57:41.81#ibcon#first serial, iclass 18, count 0 2006.229.14:57:41.81#ibcon#enter sib2, iclass 18, count 0 2006.229.14:57:41.81#ibcon#flushed, iclass 18, count 0 2006.229.14:57:41.81#ibcon#about to write, iclass 18, count 0 2006.229.14:57:41.81#ibcon#wrote, iclass 18, count 0 2006.229.14:57:41.81#ibcon#about to read 3, iclass 18, count 0 2006.229.14:57:41.83#ibcon#read 3, iclass 18, count 0 2006.229.14:57:41.83#ibcon#about to read 4, iclass 18, count 0 2006.229.14:57:41.83#ibcon#read 4, iclass 18, count 0 2006.229.14:57:41.83#ibcon#about to read 5, iclass 18, count 0 2006.229.14:57:41.83#ibcon#read 5, iclass 18, count 0 2006.229.14:57:41.83#ibcon#about to read 6, iclass 18, count 0 2006.229.14:57:41.83#ibcon#read 6, iclass 18, count 0 2006.229.14:57:41.83#ibcon#end of sib2, iclass 18, count 0 2006.229.14:57:41.83#ibcon#*mode == 0, iclass 18, count 0 2006.229.14:57:41.83#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.14:57:41.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.14:57:41.83#ibcon#*before write, iclass 18, count 0 2006.229.14:57:41.83#ibcon#enter sib2, iclass 18, count 0 2006.229.14:57:41.83#ibcon#flushed, iclass 18, count 0 2006.229.14:57:41.83#ibcon#about to write, iclass 18, count 0 2006.229.14:57:41.83#ibcon#wrote, iclass 18, count 0 2006.229.14:57:41.83#ibcon#about to read 3, iclass 18, count 0 2006.229.14:57:41.87#ibcon#read 3, iclass 18, count 0 2006.229.14:57:41.87#ibcon#about to read 4, iclass 18, count 0 2006.229.14:57:41.87#ibcon#read 4, iclass 18, count 0 2006.229.14:57:41.87#ibcon#about to read 5, iclass 18, count 0 2006.229.14:57:41.87#ibcon#read 5, iclass 18, count 0 2006.229.14:57:41.87#ibcon#about to read 6, iclass 18, count 0 2006.229.14:57:41.87#ibcon#read 6, iclass 18, count 0 2006.229.14:57:41.87#ibcon#end of sib2, iclass 18, count 0 2006.229.14:57:41.87#ibcon#*after write, iclass 18, count 0 2006.229.14:57:41.87#ibcon#*before return 0, iclass 18, count 0 2006.229.14:57:41.87#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:41.87#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.14:57:41.87#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.14:57:41.87#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.14:57:41.87$vck44/vb=4,4 2006.229.14:57:41.87#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.14:57:41.87#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.14:57:41.87#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:41.87#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:41.93#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:41.93#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:41.93#ibcon#enter wrdev, iclass 20, count 2 2006.229.14:57:41.93#ibcon#first serial, iclass 20, count 2 2006.229.14:57:41.93#ibcon#enter sib2, iclass 20, count 2 2006.229.14:57:41.93#ibcon#flushed, iclass 20, count 2 2006.229.14:57:41.93#ibcon#about to write, iclass 20, count 2 2006.229.14:57:41.93#ibcon#wrote, iclass 20, count 2 2006.229.14:57:41.93#ibcon#about to read 3, iclass 20, count 2 2006.229.14:57:41.95#ibcon#read 3, iclass 20, count 2 2006.229.14:57:41.95#ibcon#about to read 4, iclass 20, count 2 2006.229.14:57:41.95#ibcon#read 4, iclass 20, count 2 2006.229.14:57:41.95#ibcon#about to read 5, iclass 20, count 2 2006.229.14:57:41.95#ibcon#read 5, iclass 20, count 2 2006.229.14:57:41.95#ibcon#about to read 6, iclass 20, count 2 2006.229.14:57:41.95#ibcon#read 6, iclass 20, count 2 2006.229.14:57:41.95#ibcon#end of sib2, iclass 20, count 2 2006.229.14:57:41.95#ibcon#*mode == 0, iclass 20, count 2 2006.229.14:57:41.95#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.14:57:41.95#ibcon#[27=AT04-04\r\n] 2006.229.14:57:41.95#ibcon#*before write, iclass 20, count 2 2006.229.14:57:41.95#ibcon#enter sib2, iclass 20, count 2 2006.229.14:57:41.95#ibcon#flushed, iclass 20, count 2 2006.229.14:57:41.95#ibcon#about to write, iclass 20, count 2 2006.229.14:57:41.95#ibcon#wrote, iclass 20, count 2 2006.229.14:57:41.95#ibcon#about to read 3, iclass 20, count 2 2006.229.14:57:41.98#ibcon#read 3, iclass 20, count 2 2006.229.14:57:41.98#ibcon#about to read 4, iclass 20, count 2 2006.229.14:57:41.98#ibcon#read 4, iclass 20, count 2 2006.229.14:57:41.98#ibcon#about to read 5, iclass 20, count 2 2006.229.14:57:41.98#ibcon#read 5, iclass 20, count 2 2006.229.14:57:41.98#ibcon#about to read 6, iclass 20, count 2 2006.229.14:57:41.98#ibcon#read 6, iclass 20, count 2 2006.229.14:57:41.98#ibcon#end of sib2, iclass 20, count 2 2006.229.14:57:41.98#ibcon#*after write, iclass 20, count 2 2006.229.14:57:41.98#ibcon#*before return 0, iclass 20, count 2 2006.229.14:57:41.98#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:41.98#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.14:57:41.98#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.14:57:41.98#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:41.98#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:42.10#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:42.10#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:42.10#ibcon#enter wrdev, iclass 20, count 0 2006.229.14:57:42.10#ibcon#first serial, iclass 20, count 0 2006.229.14:57:42.10#ibcon#enter sib2, iclass 20, count 0 2006.229.14:57:42.10#ibcon#flushed, iclass 20, count 0 2006.229.14:57:42.10#ibcon#about to write, iclass 20, count 0 2006.229.14:57:42.10#ibcon#wrote, iclass 20, count 0 2006.229.14:57:42.10#ibcon#about to read 3, iclass 20, count 0 2006.229.14:57:42.12#ibcon#read 3, iclass 20, count 0 2006.229.14:57:42.12#ibcon#about to read 4, iclass 20, count 0 2006.229.14:57:42.12#ibcon#read 4, iclass 20, count 0 2006.229.14:57:42.12#ibcon#about to read 5, iclass 20, count 0 2006.229.14:57:42.12#ibcon#read 5, iclass 20, count 0 2006.229.14:57:42.12#ibcon#about to read 6, iclass 20, count 0 2006.229.14:57:42.12#ibcon#read 6, iclass 20, count 0 2006.229.14:57:42.12#ibcon#end of sib2, iclass 20, count 0 2006.229.14:57:42.12#ibcon#*mode == 0, iclass 20, count 0 2006.229.14:57:42.12#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.14:57:42.12#ibcon#[27=USB\r\n] 2006.229.14:57:42.12#ibcon#*before write, iclass 20, count 0 2006.229.14:57:42.12#ibcon#enter sib2, iclass 20, count 0 2006.229.14:57:42.12#ibcon#flushed, iclass 20, count 0 2006.229.14:57:42.12#ibcon#about to write, iclass 20, count 0 2006.229.14:57:42.12#ibcon#wrote, iclass 20, count 0 2006.229.14:57:42.12#ibcon#about to read 3, iclass 20, count 0 2006.229.14:57:42.15#ibcon#read 3, iclass 20, count 0 2006.229.14:57:42.15#ibcon#about to read 4, iclass 20, count 0 2006.229.14:57:42.15#ibcon#read 4, iclass 20, count 0 2006.229.14:57:42.15#ibcon#about to read 5, iclass 20, count 0 2006.229.14:57:42.15#ibcon#read 5, iclass 20, count 0 2006.229.14:57:42.15#ibcon#about to read 6, iclass 20, count 0 2006.229.14:57:42.15#ibcon#read 6, iclass 20, count 0 2006.229.14:57:42.15#ibcon#end of sib2, iclass 20, count 0 2006.229.14:57:42.15#ibcon#*after write, iclass 20, count 0 2006.229.14:57:42.15#ibcon#*before return 0, iclass 20, count 0 2006.229.14:57:42.15#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:42.15#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.14:57:42.15#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.14:57:42.15#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.14:57:42.15$vck44/vblo=5,709.99 2006.229.14:57:42.15#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.14:57:42.15#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.14:57:42.15#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:42.15#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:42.15#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:42.15#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:42.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.14:57:42.15#ibcon#first serial, iclass 22, count 0 2006.229.14:57:42.15#ibcon#enter sib2, iclass 22, count 0 2006.229.14:57:42.15#ibcon#flushed, iclass 22, count 0 2006.229.14:57:42.15#ibcon#about to write, iclass 22, count 0 2006.229.14:57:42.15#ibcon#wrote, iclass 22, count 0 2006.229.14:57:42.15#ibcon#about to read 3, iclass 22, count 0 2006.229.14:57:42.17#ibcon#read 3, iclass 22, count 0 2006.229.14:57:42.17#ibcon#about to read 4, iclass 22, count 0 2006.229.14:57:42.17#ibcon#read 4, iclass 22, count 0 2006.229.14:57:42.17#ibcon#about to read 5, iclass 22, count 0 2006.229.14:57:42.17#ibcon#read 5, iclass 22, count 0 2006.229.14:57:42.17#ibcon#about to read 6, iclass 22, count 0 2006.229.14:57:42.17#ibcon#read 6, iclass 22, count 0 2006.229.14:57:42.17#ibcon#end of sib2, iclass 22, count 0 2006.229.14:57:42.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.14:57:42.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.14:57:42.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.14:57:42.17#ibcon#*before write, iclass 22, count 0 2006.229.14:57:42.17#ibcon#enter sib2, iclass 22, count 0 2006.229.14:57:42.17#ibcon#flushed, iclass 22, count 0 2006.229.14:57:42.17#ibcon#about to write, iclass 22, count 0 2006.229.14:57:42.17#ibcon#wrote, iclass 22, count 0 2006.229.14:57:42.17#ibcon#about to read 3, iclass 22, count 0 2006.229.14:57:42.21#ibcon#read 3, iclass 22, count 0 2006.229.14:57:42.21#ibcon#about to read 4, iclass 22, count 0 2006.229.14:57:42.21#ibcon#read 4, iclass 22, count 0 2006.229.14:57:42.21#ibcon#about to read 5, iclass 22, count 0 2006.229.14:57:42.21#ibcon#read 5, iclass 22, count 0 2006.229.14:57:42.21#ibcon#about to read 6, iclass 22, count 0 2006.229.14:57:42.21#ibcon#read 6, iclass 22, count 0 2006.229.14:57:42.21#ibcon#end of sib2, iclass 22, count 0 2006.229.14:57:42.21#ibcon#*after write, iclass 22, count 0 2006.229.14:57:42.21#ibcon#*before return 0, iclass 22, count 0 2006.229.14:57:42.21#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:42.21#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.14:57:42.21#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.14:57:42.21#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.14:57:42.21$vck44/vb=5,4 2006.229.14:57:42.21#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.14:57:42.21#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.14:57:42.21#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:42.21#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:42.27#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:42.27#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:42.27#ibcon#enter wrdev, iclass 24, count 2 2006.229.14:57:42.27#ibcon#first serial, iclass 24, count 2 2006.229.14:57:42.27#ibcon#enter sib2, iclass 24, count 2 2006.229.14:57:42.27#ibcon#flushed, iclass 24, count 2 2006.229.14:57:42.27#ibcon#about to write, iclass 24, count 2 2006.229.14:57:42.27#ibcon#wrote, iclass 24, count 2 2006.229.14:57:42.27#ibcon#about to read 3, iclass 24, count 2 2006.229.14:57:42.29#ibcon#read 3, iclass 24, count 2 2006.229.14:57:42.29#ibcon#about to read 4, iclass 24, count 2 2006.229.14:57:42.29#ibcon#read 4, iclass 24, count 2 2006.229.14:57:42.29#ibcon#about to read 5, iclass 24, count 2 2006.229.14:57:42.29#ibcon#read 5, iclass 24, count 2 2006.229.14:57:42.29#ibcon#about to read 6, iclass 24, count 2 2006.229.14:57:42.29#ibcon#read 6, iclass 24, count 2 2006.229.14:57:42.29#ibcon#end of sib2, iclass 24, count 2 2006.229.14:57:42.29#ibcon#*mode == 0, iclass 24, count 2 2006.229.14:57:42.29#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.14:57:42.29#ibcon#[27=AT05-04\r\n] 2006.229.14:57:42.29#ibcon#*before write, iclass 24, count 2 2006.229.14:57:42.29#ibcon#enter sib2, iclass 24, count 2 2006.229.14:57:42.29#ibcon#flushed, iclass 24, count 2 2006.229.14:57:42.29#ibcon#about to write, iclass 24, count 2 2006.229.14:57:42.29#ibcon#wrote, iclass 24, count 2 2006.229.14:57:42.29#ibcon#about to read 3, iclass 24, count 2 2006.229.14:57:42.32#ibcon#read 3, iclass 24, count 2 2006.229.14:57:42.32#ibcon#about to read 4, iclass 24, count 2 2006.229.14:57:42.32#ibcon#read 4, iclass 24, count 2 2006.229.14:57:42.32#ibcon#about to read 5, iclass 24, count 2 2006.229.14:57:42.32#ibcon#read 5, iclass 24, count 2 2006.229.14:57:42.32#ibcon#about to read 6, iclass 24, count 2 2006.229.14:57:42.32#ibcon#read 6, iclass 24, count 2 2006.229.14:57:42.32#ibcon#end of sib2, iclass 24, count 2 2006.229.14:57:42.32#ibcon#*after write, iclass 24, count 2 2006.229.14:57:42.32#ibcon#*before return 0, iclass 24, count 2 2006.229.14:57:42.32#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:42.32#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.14:57:42.32#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.14:57:42.32#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:42.32#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:42.44#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:42.44#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:42.44#ibcon#enter wrdev, iclass 24, count 0 2006.229.14:57:42.44#ibcon#first serial, iclass 24, count 0 2006.229.14:57:42.44#ibcon#enter sib2, iclass 24, count 0 2006.229.14:57:42.44#ibcon#flushed, iclass 24, count 0 2006.229.14:57:42.44#ibcon#about to write, iclass 24, count 0 2006.229.14:57:42.44#ibcon#wrote, iclass 24, count 0 2006.229.14:57:42.44#ibcon#about to read 3, iclass 24, count 0 2006.229.14:57:42.46#ibcon#read 3, iclass 24, count 0 2006.229.14:57:42.46#ibcon#about to read 4, iclass 24, count 0 2006.229.14:57:42.46#ibcon#read 4, iclass 24, count 0 2006.229.14:57:42.46#ibcon#about to read 5, iclass 24, count 0 2006.229.14:57:42.46#ibcon#read 5, iclass 24, count 0 2006.229.14:57:42.46#ibcon#about to read 6, iclass 24, count 0 2006.229.14:57:42.46#ibcon#read 6, iclass 24, count 0 2006.229.14:57:42.46#ibcon#end of sib2, iclass 24, count 0 2006.229.14:57:42.46#ibcon#*mode == 0, iclass 24, count 0 2006.229.14:57:42.46#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.14:57:42.46#ibcon#[27=USB\r\n] 2006.229.14:57:42.46#ibcon#*before write, iclass 24, count 0 2006.229.14:57:42.46#ibcon#enter sib2, iclass 24, count 0 2006.229.14:57:42.46#ibcon#flushed, iclass 24, count 0 2006.229.14:57:42.46#ibcon#about to write, iclass 24, count 0 2006.229.14:57:42.46#ibcon#wrote, iclass 24, count 0 2006.229.14:57:42.46#ibcon#about to read 3, iclass 24, count 0 2006.229.14:57:42.49#ibcon#read 3, iclass 24, count 0 2006.229.14:57:42.49#ibcon#about to read 4, iclass 24, count 0 2006.229.14:57:42.49#ibcon#read 4, iclass 24, count 0 2006.229.14:57:42.49#ibcon#about to read 5, iclass 24, count 0 2006.229.14:57:42.49#ibcon#read 5, iclass 24, count 0 2006.229.14:57:42.49#ibcon#about to read 6, iclass 24, count 0 2006.229.14:57:42.49#ibcon#read 6, iclass 24, count 0 2006.229.14:57:42.49#ibcon#end of sib2, iclass 24, count 0 2006.229.14:57:42.49#ibcon#*after write, iclass 24, count 0 2006.229.14:57:42.49#ibcon#*before return 0, iclass 24, count 0 2006.229.14:57:42.49#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:42.49#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.14:57:42.49#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.14:57:42.49#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.14:57:42.49$vck44/vblo=6,719.99 2006.229.14:57:42.49#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.14:57:42.49#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.14:57:42.49#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:42.49#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:42.49#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:42.49#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:42.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.14:57:42.49#ibcon#first serial, iclass 26, count 0 2006.229.14:57:42.49#ibcon#enter sib2, iclass 26, count 0 2006.229.14:57:42.49#ibcon#flushed, iclass 26, count 0 2006.229.14:57:42.49#ibcon#about to write, iclass 26, count 0 2006.229.14:57:42.49#ibcon#wrote, iclass 26, count 0 2006.229.14:57:42.49#ibcon#about to read 3, iclass 26, count 0 2006.229.14:57:42.51#ibcon#read 3, iclass 26, count 0 2006.229.14:57:42.51#ibcon#about to read 4, iclass 26, count 0 2006.229.14:57:42.51#ibcon#read 4, iclass 26, count 0 2006.229.14:57:42.51#ibcon#about to read 5, iclass 26, count 0 2006.229.14:57:42.51#ibcon#read 5, iclass 26, count 0 2006.229.14:57:42.51#ibcon#about to read 6, iclass 26, count 0 2006.229.14:57:42.51#ibcon#read 6, iclass 26, count 0 2006.229.14:57:42.51#ibcon#end of sib2, iclass 26, count 0 2006.229.14:57:42.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.14:57:42.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.14:57:42.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.14:57:42.51#ibcon#*before write, iclass 26, count 0 2006.229.14:57:42.51#ibcon#enter sib2, iclass 26, count 0 2006.229.14:57:42.51#ibcon#flushed, iclass 26, count 0 2006.229.14:57:42.51#ibcon#about to write, iclass 26, count 0 2006.229.14:57:42.51#ibcon#wrote, iclass 26, count 0 2006.229.14:57:42.51#ibcon#about to read 3, iclass 26, count 0 2006.229.14:57:42.55#ibcon#read 3, iclass 26, count 0 2006.229.14:57:42.55#ibcon#about to read 4, iclass 26, count 0 2006.229.14:57:42.55#ibcon#read 4, iclass 26, count 0 2006.229.14:57:42.55#ibcon#about to read 5, iclass 26, count 0 2006.229.14:57:42.55#ibcon#read 5, iclass 26, count 0 2006.229.14:57:42.55#ibcon#about to read 6, iclass 26, count 0 2006.229.14:57:42.55#ibcon#read 6, iclass 26, count 0 2006.229.14:57:42.55#ibcon#end of sib2, iclass 26, count 0 2006.229.14:57:42.55#ibcon#*after write, iclass 26, count 0 2006.229.14:57:42.55#ibcon#*before return 0, iclass 26, count 0 2006.229.14:57:42.55#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:42.55#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.14:57:42.55#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.14:57:42.55#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.14:57:42.55$vck44/vb=6,4 2006.229.14:57:42.55#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.14:57:42.55#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.14:57:42.55#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:42.55#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:42.61#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:42.61#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:42.61#ibcon#enter wrdev, iclass 28, count 2 2006.229.14:57:42.61#ibcon#first serial, iclass 28, count 2 2006.229.14:57:42.61#ibcon#enter sib2, iclass 28, count 2 2006.229.14:57:42.61#ibcon#flushed, iclass 28, count 2 2006.229.14:57:42.61#ibcon#about to write, iclass 28, count 2 2006.229.14:57:42.61#ibcon#wrote, iclass 28, count 2 2006.229.14:57:42.61#ibcon#about to read 3, iclass 28, count 2 2006.229.14:57:42.63#ibcon#read 3, iclass 28, count 2 2006.229.14:57:42.63#ibcon#about to read 4, iclass 28, count 2 2006.229.14:57:42.63#ibcon#read 4, iclass 28, count 2 2006.229.14:57:42.63#ibcon#about to read 5, iclass 28, count 2 2006.229.14:57:42.63#ibcon#read 5, iclass 28, count 2 2006.229.14:57:42.63#ibcon#about to read 6, iclass 28, count 2 2006.229.14:57:42.63#ibcon#read 6, iclass 28, count 2 2006.229.14:57:42.63#ibcon#end of sib2, iclass 28, count 2 2006.229.14:57:42.63#ibcon#*mode == 0, iclass 28, count 2 2006.229.14:57:42.63#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.14:57:42.63#ibcon#[27=AT06-04\r\n] 2006.229.14:57:42.63#ibcon#*before write, iclass 28, count 2 2006.229.14:57:42.63#ibcon#enter sib2, iclass 28, count 2 2006.229.14:57:42.63#ibcon#flushed, iclass 28, count 2 2006.229.14:57:42.63#ibcon#about to write, iclass 28, count 2 2006.229.14:57:42.63#ibcon#wrote, iclass 28, count 2 2006.229.14:57:42.63#ibcon#about to read 3, iclass 28, count 2 2006.229.14:57:42.66#ibcon#read 3, iclass 28, count 2 2006.229.14:57:42.66#ibcon#about to read 4, iclass 28, count 2 2006.229.14:57:42.66#ibcon#read 4, iclass 28, count 2 2006.229.14:57:42.66#ibcon#about to read 5, iclass 28, count 2 2006.229.14:57:42.66#ibcon#read 5, iclass 28, count 2 2006.229.14:57:42.66#ibcon#about to read 6, iclass 28, count 2 2006.229.14:57:42.66#ibcon#read 6, iclass 28, count 2 2006.229.14:57:42.66#ibcon#end of sib2, iclass 28, count 2 2006.229.14:57:42.66#ibcon#*after write, iclass 28, count 2 2006.229.14:57:42.66#ibcon#*before return 0, iclass 28, count 2 2006.229.14:57:42.66#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:42.66#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.14:57:42.66#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.14:57:42.66#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:42.66#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:42.78#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:42.78#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:42.78#ibcon#enter wrdev, iclass 28, count 0 2006.229.14:57:42.78#ibcon#first serial, iclass 28, count 0 2006.229.14:57:42.78#ibcon#enter sib2, iclass 28, count 0 2006.229.14:57:42.78#ibcon#flushed, iclass 28, count 0 2006.229.14:57:42.78#ibcon#about to write, iclass 28, count 0 2006.229.14:57:42.78#ibcon#wrote, iclass 28, count 0 2006.229.14:57:42.78#ibcon#about to read 3, iclass 28, count 0 2006.229.14:57:42.80#ibcon#read 3, iclass 28, count 0 2006.229.14:57:42.80#ibcon#about to read 4, iclass 28, count 0 2006.229.14:57:42.80#ibcon#read 4, iclass 28, count 0 2006.229.14:57:42.80#ibcon#about to read 5, iclass 28, count 0 2006.229.14:57:42.80#ibcon#read 5, iclass 28, count 0 2006.229.14:57:42.80#ibcon#about to read 6, iclass 28, count 0 2006.229.14:57:42.80#ibcon#read 6, iclass 28, count 0 2006.229.14:57:42.80#ibcon#end of sib2, iclass 28, count 0 2006.229.14:57:42.80#ibcon#*mode == 0, iclass 28, count 0 2006.229.14:57:42.80#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.14:57:42.80#ibcon#[27=USB\r\n] 2006.229.14:57:42.80#ibcon#*before write, iclass 28, count 0 2006.229.14:57:42.80#ibcon#enter sib2, iclass 28, count 0 2006.229.14:57:42.80#ibcon#flushed, iclass 28, count 0 2006.229.14:57:42.80#ibcon#about to write, iclass 28, count 0 2006.229.14:57:42.80#ibcon#wrote, iclass 28, count 0 2006.229.14:57:42.80#ibcon#about to read 3, iclass 28, count 0 2006.229.14:57:42.83#ibcon#read 3, iclass 28, count 0 2006.229.14:57:42.83#ibcon#about to read 4, iclass 28, count 0 2006.229.14:57:42.83#ibcon#read 4, iclass 28, count 0 2006.229.14:57:42.83#ibcon#about to read 5, iclass 28, count 0 2006.229.14:57:42.83#ibcon#read 5, iclass 28, count 0 2006.229.14:57:42.83#ibcon#about to read 6, iclass 28, count 0 2006.229.14:57:42.83#ibcon#read 6, iclass 28, count 0 2006.229.14:57:42.83#ibcon#end of sib2, iclass 28, count 0 2006.229.14:57:42.83#ibcon#*after write, iclass 28, count 0 2006.229.14:57:42.83#ibcon#*before return 0, iclass 28, count 0 2006.229.14:57:42.83#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:42.83#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.14:57:42.83#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.14:57:42.83#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.14:57:42.83$vck44/vblo=7,734.99 2006.229.14:57:42.83#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.14:57:42.83#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.14:57:42.83#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:42.83#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:42.83#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:42.83#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:42.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.14:57:42.83#ibcon#first serial, iclass 30, count 0 2006.229.14:57:42.83#ibcon#enter sib2, iclass 30, count 0 2006.229.14:57:42.83#ibcon#flushed, iclass 30, count 0 2006.229.14:57:42.83#ibcon#about to write, iclass 30, count 0 2006.229.14:57:42.83#ibcon#wrote, iclass 30, count 0 2006.229.14:57:42.83#ibcon#about to read 3, iclass 30, count 0 2006.229.14:57:42.85#ibcon#read 3, iclass 30, count 0 2006.229.14:57:42.85#ibcon#about to read 4, iclass 30, count 0 2006.229.14:57:42.85#ibcon#read 4, iclass 30, count 0 2006.229.14:57:42.85#ibcon#about to read 5, iclass 30, count 0 2006.229.14:57:42.85#ibcon#read 5, iclass 30, count 0 2006.229.14:57:42.85#ibcon#about to read 6, iclass 30, count 0 2006.229.14:57:42.85#ibcon#read 6, iclass 30, count 0 2006.229.14:57:42.85#ibcon#end of sib2, iclass 30, count 0 2006.229.14:57:42.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.14:57:42.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.14:57:42.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.14:57:42.85#ibcon#*before write, iclass 30, count 0 2006.229.14:57:42.85#ibcon#enter sib2, iclass 30, count 0 2006.229.14:57:42.85#ibcon#flushed, iclass 30, count 0 2006.229.14:57:42.85#ibcon#about to write, iclass 30, count 0 2006.229.14:57:42.85#ibcon#wrote, iclass 30, count 0 2006.229.14:57:42.85#ibcon#about to read 3, iclass 30, count 0 2006.229.14:57:42.89#ibcon#read 3, iclass 30, count 0 2006.229.14:57:42.89#ibcon#about to read 4, iclass 30, count 0 2006.229.14:57:42.89#ibcon#read 4, iclass 30, count 0 2006.229.14:57:42.89#ibcon#about to read 5, iclass 30, count 0 2006.229.14:57:42.89#ibcon#read 5, iclass 30, count 0 2006.229.14:57:42.89#ibcon#about to read 6, iclass 30, count 0 2006.229.14:57:42.89#ibcon#read 6, iclass 30, count 0 2006.229.14:57:42.89#ibcon#end of sib2, iclass 30, count 0 2006.229.14:57:42.89#ibcon#*after write, iclass 30, count 0 2006.229.14:57:42.89#ibcon#*before return 0, iclass 30, count 0 2006.229.14:57:42.89#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:42.89#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.14:57:42.89#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.14:57:42.89#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.14:57:42.89$vck44/vb=7,4 2006.229.14:57:42.89#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.14:57:42.89#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.14:57:42.89#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:42.89#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:42.95#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:42.95#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:42.95#ibcon#enter wrdev, iclass 32, count 2 2006.229.14:57:42.95#ibcon#first serial, iclass 32, count 2 2006.229.14:57:42.95#ibcon#enter sib2, iclass 32, count 2 2006.229.14:57:42.95#ibcon#flushed, iclass 32, count 2 2006.229.14:57:42.95#ibcon#about to write, iclass 32, count 2 2006.229.14:57:42.95#ibcon#wrote, iclass 32, count 2 2006.229.14:57:42.95#ibcon#about to read 3, iclass 32, count 2 2006.229.14:57:42.97#ibcon#read 3, iclass 32, count 2 2006.229.14:57:42.97#ibcon#about to read 4, iclass 32, count 2 2006.229.14:57:42.97#ibcon#read 4, iclass 32, count 2 2006.229.14:57:42.97#ibcon#about to read 5, iclass 32, count 2 2006.229.14:57:42.97#ibcon#read 5, iclass 32, count 2 2006.229.14:57:42.97#ibcon#about to read 6, iclass 32, count 2 2006.229.14:57:42.97#ibcon#read 6, iclass 32, count 2 2006.229.14:57:42.97#ibcon#end of sib2, iclass 32, count 2 2006.229.14:57:42.97#ibcon#*mode == 0, iclass 32, count 2 2006.229.14:57:42.97#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.14:57:42.97#ibcon#[27=AT07-04\r\n] 2006.229.14:57:42.97#ibcon#*before write, iclass 32, count 2 2006.229.14:57:42.97#ibcon#enter sib2, iclass 32, count 2 2006.229.14:57:42.97#ibcon#flushed, iclass 32, count 2 2006.229.14:57:42.97#ibcon#about to write, iclass 32, count 2 2006.229.14:57:42.97#ibcon#wrote, iclass 32, count 2 2006.229.14:57:42.97#ibcon#about to read 3, iclass 32, count 2 2006.229.14:57:43.00#ibcon#read 3, iclass 32, count 2 2006.229.14:57:43.00#ibcon#about to read 4, iclass 32, count 2 2006.229.14:57:43.00#ibcon#read 4, iclass 32, count 2 2006.229.14:57:43.00#ibcon#about to read 5, iclass 32, count 2 2006.229.14:57:43.00#ibcon#read 5, iclass 32, count 2 2006.229.14:57:43.00#ibcon#about to read 6, iclass 32, count 2 2006.229.14:57:43.00#ibcon#read 6, iclass 32, count 2 2006.229.14:57:43.00#ibcon#end of sib2, iclass 32, count 2 2006.229.14:57:43.00#ibcon#*after write, iclass 32, count 2 2006.229.14:57:43.00#ibcon#*before return 0, iclass 32, count 2 2006.229.14:57:43.00#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:43.00#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.14:57:43.00#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.14:57:43.00#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:43.00#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:43.12#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:43.12#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:43.12#ibcon#enter wrdev, iclass 32, count 0 2006.229.14:57:43.12#ibcon#first serial, iclass 32, count 0 2006.229.14:57:43.12#ibcon#enter sib2, iclass 32, count 0 2006.229.14:57:43.12#ibcon#flushed, iclass 32, count 0 2006.229.14:57:43.12#ibcon#about to write, iclass 32, count 0 2006.229.14:57:43.12#ibcon#wrote, iclass 32, count 0 2006.229.14:57:43.12#ibcon#about to read 3, iclass 32, count 0 2006.229.14:57:43.14#ibcon#read 3, iclass 32, count 0 2006.229.14:57:43.14#ibcon#about to read 4, iclass 32, count 0 2006.229.14:57:43.14#ibcon#read 4, iclass 32, count 0 2006.229.14:57:43.14#ibcon#about to read 5, iclass 32, count 0 2006.229.14:57:43.14#ibcon#read 5, iclass 32, count 0 2006.229.14:57:43.14#ibcon#about to read 6, iclass 32, count 0 2006.229.14:57:43.14#ibcon#read 6, iclass 32, count 0 2006.229.14:57:43.14#ibcon#end of sib2, iclass 32, count 0 2006.229.14:57:43.14#ibcon#*mode == 0, iclass 32, count 0 2006.229.14:57:43.14#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.14:57:43.14#ibcon#[27=USB\r\n] 2006.229.14:57:43.14#ibcon#*before write, iclass 32, count 0 2006.229.14:57:43.14#ibcon#enter sib2, iclass 32, count 0 2006.229.14:57:43.14#ibcon#flushed, iclass 32, count 0 2006.229.14:57:43.14#ibcon#about to write, iclass 32, count 0 2006.229.14:57:43.14#ibcon#wrote, iclass 32, count 0 2006.229.14:57:43.14#ibcon#about to read 3, iclass 32, count 0 2006.229.14:57:43.17#ibcon#read 3, iclass 32, count 0 2006.229.14:57:43.17#ibcon#about to read 4, iclass 32, count 0 2006.229.14:57:43.17#ibcon#read 4, iclass 32, count 0 2006.229.14:57:43.17#ibcon#about to read 5, iclass 32, count 0 2006.229.14:57:43.17#ibcon#read 5, iclass 32, count 0 2006.229.14:57:43.17#ibcon#about to read 6, iclass 32, count 0 2006.229.14:57:43.17#ibcon#read 6, iclass 32, count 0 2006.229.14:57:43.17#ibcon#end of sib2, iclass 32, count 0 2006.229.14:57:43.17#ibcon#*after write, iclass 32, count 0 2006.229.14:57:43.17#ibcon#*before return 0, iclass 32, count 0 2006.229.14:57:43.17#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:43.17#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.14:57:43.17#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.14:57:43.17#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.14:57:43.17$vck44/vblo=8,744.99 2006.229.14:57:43.17#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.14:57:43.17#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.14:57:43.17#ibcon#ireg 17 cls_cnt 0 2006.229.14:57:43.17#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:43.17#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:43.17#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:43.17#ibcon#enter wrdev, iclass 34, count 0 2006.229.14:57:43.17#ibcon#first serial, iclass 34, count 0 2006.229.14:57:43.17#ibcon#enter sib2, iclass 34, count 0 2006.229.14:57:43.17#ibcon#flushed, iclass 34, count 0 2006.229.14:57:43.17#ibcon#about to write, iclass 34, count 0 2006.229.14:57:43.17#ibcon#wrote, iclass 34, count 0 2006.229.14:57:43.17#ibcon#about to read 3, iclass 34, count 0 2006.229.14:57:43.19#ibcon#read 3, iclass 34, count 0 2006.229.14:57:43.19#ibcon#about to read 4, iclass 34, count 0 2006.229.14:57:43.19#ibcon#read 4, iclass 34, count 0 2006.229.14:57:43.19#ibcon#about to read 5, iclass 34, count 0 2006.229.14:57:43.19#ibcon#read 5, iclass 34, count 0 2006.229.14:57:43.19#ibcon#about to read 6, iclass 34, count 0 2006.229.14:57:43.19#ibcon#read 6, iclass 34, count 0 2006.229.14:57:43.19#ibcon#end of sib2, iclass 34, count 0 2006.229.14:57:43.19#ibcon#*mode == 0, iclass 34, count 0 2006.229.14:57:43.19#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.14:57:43.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.14:57:43.19#ibcon#*before write, iclass 34, count 0 2006.229.14:57:43.19#ibcon#enter sib2, iclass 34, count 0 2006.229.14:57:43.19#ibcon#flushed, iclass 34, count 0 2006.229.14:57:43.19#ibcon#about to write, iclass 34, count 0 2006.229.14:57:43.19#ibcon#wrote, iclass 34, count 0 2006.229.14:57:43.19#ibcon#about to read 3, iclass 34, count 0 2006.229.14:57:43.23#ibcon#read 3, iclass 34, count 0 2006.229.14:57:43.23#ibcon#about to read 4, iclass 34, count 0 2006.229.14:57:43.23#ibcon#read 4, iclass 34, count 0 2006.229.14:57:43.23#ibcon#about to read 5, iclass 34, count 0 2006.229.14:57:43.23#ibcon#read 5, iclass 34, count 0 2006.229.14:57:43.23#ibcon#about to read 6, iclass 34, count 0 2006.229.14:57:43.23#ibcon#read 6, iclass 34, count 0 2006.229.14:57:43.23#ibcon#end of sib2, iclass 34, count 0 2006.229.14:57:43.23#ibcon#*after write, iclass 34, count 0 2006.229.14:57:43.23#ibcon#*before return 0, iclass 34, count 0 2006.229.14:57:43.23#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:43.23#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.14:57:43.23#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.14:57:43.23#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.14:57:43.23$vck44/vb=8,4 2006.229.14:57:43.23#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.14:57:43.23#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.14:57:43.23#ibcon#ireg 11 cls_cnt 2 2006.229.14:57:43.23#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:43.29#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:43.29#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:43.29#ibcon#enter wrdev, iclass 36, count 2 2006.229.14:57:43.29#ibcon#first serial, iclass 36, count 2 2006.229.14:57:43.29#ibcon#enter sib2, iclass 36, count 2 2006.229.14:57:43.29#ibcon#flushed, iclass 36, count 2 2006.229.14:57:43.29#ibcon#about to write, iclass 36, count 2 2006.229.14:57:43.29#ibcon#wrote, iclass 36, count 2 2006.229.14:57:43.29#ibcon#about to read 3, iclass 36, count 2 2006.229.14:57:43.31#ibcon#read 3, iclass 36, count 2 2006.229.14:57:43.31#ibcon#about to read 4, iclass 36, count 2 2006.229.14:57:43.31#ibcon#read 4, iclass 36, count 2 2006.229.14:57:43.31#ibcon#about to read 5, iclass 36, count 2 2006.229.14:57:43.31#ibcon#read 5, iclass 36, count 2 2006.229.14:57:43.31#ibcon#about to read 6, iclass 36, count 2 2006.229.14:57:43.31#ibcon#read 6, iclass 36, count 2 2006.229.14:57:43.31#ibcon#end of sib2, iclass 36, count 2 2006.229.14:57:43.31#ibcon#*mode == 0, iclass 36, count 2 2006.229.14:57:43.31#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.14:57:43.31#ibcon#[27=AT08-04\r\n] 2006.229.14:57:43.31#ibcon#*before write, iclass 36, count 2 2006.229.14:57:43.31#ibcon#enter sib2, iclass 36, count 2 2006.229.14:57:43.31#ibcon#flushed, iclass 36, count 2 2006.229.14:57:43.31#ibcon#about to write, iclass 36, count 2 2006.229.14:57:43.31#ibcon#wrote, iclass 36, count 2 2006.229.14:57:43.31#ibcon#about to read 3, iclass 36, count 2 2006.229.14:57:43.34#ibcon#read 3, iclass 36, count 2 2006.229.14:57:43.34#ibcon#about to read 4, iclass 36, count 2 2006.229.14:57:43.34#ibcon#read 4, iclass 36, count 2 2006.229.14:57:43.34#ibcon#about to read 5, iclass 36, count 2 2006.229.14:57:43.34#ibcon#read 5, iclass 36, count 2 2006.229.14:57:43.34#ibcon#about to read 6, iclass 36, count 2 2006.229.14:57:43.34#ibcon#read 6, iclass 36, count 2 2006.229.14:57:43.34#ibcon#end of sib2, iclass 36, count 2 2006.229.14:57:43.34#ibcon#*after write, iclass 36, count 2 2006.229.14:57:43.34#ibcon#*before return 0, iclass 36, count 2 2006.229.14:57:43.34#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:43.34#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.14:57:43.34#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.14:57:43.34#ibcon#ireg 7 cls_cnt 0 2006.229.14:57:43.34#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:43.46#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:43.46#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:43.46#ibcon#enter wrdev, iclass 36, count 0 2006.229.14:57:43.46#ibcon#first serial, iclass 36, count 0 2006.229.14:57:43.46#ibcon#enter sib2, iclass 36, count 0 2006.229.14:57:43.46#ibcon#flushed, iclass 36, count 0 2006.229.14:57:43.46#ibcon#about to write, iclass 36, count 0 2006.229.14:57:43.46#ibcon#wrote, iclass 36, count 0 2006.229.14:57:43.46#ibcon#about to read 3, iclass 36, count 0 2006.229.14:57:43.48#ibcon#read 3, iclass 36, count 0 2006.229.14:57:43.48#ibcon#about to read 4, iclass 36, count 0 2006.229.14:57:43.48#ibcon#read 4, iclass 36, count 0 2006.229.14:57:43.48#ibcon#about to read 5, iclass 36, count 0 2006.229.14:57:43.48#ibcon#read 5, iclass 36, count 0 2006.229.14:57:43.48#ibcon#about to read 6, iclass 36, count 0 2006.229.14:57:43.48#ibcon#read 6, iclass 36, count 0 2006.229.14:57:43.48#ibcon#end of sib2, iclass 36, count 0 2006.229.14:57:43.48#ibcon#*mode == 0, iclass 36, count 0 2006.229.14:57:43.48#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.14:57:43.48#ibcon#[27=USB\r\n] 2006.229.14:57:43.48#ibcon#*before write, iclass 36, count 0 2006.229.14:57:43.48#ibcon#enter sib2, iclass 36, count 0 2006.229.14:57:43.48#ibcon#flushed, iclass 36, count 0 2006.229.14:57:43.48#ibcon#about to write, iclass 36, count 0 2006.229.14:57:43.48#ibcon#wrote, iclass 36, count 0 2006.229.14:57:43.48#ibcon#about to read 3, iclass 36, count 0 2006.229.14:57:43.51#ibcon#read 3, iclass 36, count 0 2006.229.14:57:43.51#ibcon#about to read 4, iclass 36, count 0 2006.229.14:57:43.51#ibcon#read 4, iclass 36, count 0 2006.229.14:57:43.51#ibcon#about to read 5, iclass 36, count 0 2006.229.14:57:43.51#ibcon#read 5, iclass 36, count 0 2006.229.14:57:43.51#ibcon#about to read 6, iclass 36, count 0 2006.229.14:57:43.51#ibcon#read 6, iclass 36, count 0 2006.229.14:57:43.51#ibcon#end of sib2, iclass 36, count 0 2006.229.14:57:43.51#ibcon#*after write, iclass 36, count 0 2006.229.14:57:43.51#ibcon#*before return 0, iclass 36, count 0 2006.229.14:57:43.51#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:43.51#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.14:57:43.51#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.14:57:43.51#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.14:57:43.51$vck44/vabw=wide 2006.229.14:57:43.51#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.14:57:43.51#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.14:57:43.51#ibcon#ireg 8 cls_cnt 0 2006.229.14:57:43.51#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:43.51#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:43.51#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:43.51#ibcon#enter wrdev, iclass 38, count 0 2006.229.14:57:43.51#ibcon#first serial, iclass 38, count 0 2006.229.14:57:43.51#ibcon#enter sib2, iclass 38, count 0 2006.229.14:57:43.51#ibcon#flushed, iclass 38, count 0 2006.229.14:57:43.51#ibcon#about to write, iclass 38, count 0 2006.229.14:57:43.51#ibcon#wrote, iclass 38, count 0 2006.229.14:57:43.51#ibcon#about to read 3, iclass 38, count 0 2006.229.14:57:43.53#ibcon#read 3, iclass 38, count 0 2006.229.14:57:43.53#ibcon#about to read 4, iclass 38, count 0 2006.229.14:57:43.53#ibcon#read 4, iclass 38, count 0 2006.229.14:57:43.53#ibcon#about to read 5, iclass 38, count 0 2006.229.14:57:43.53#ibcon#read 5, iclass 38, count 0 2006.229.14:57:43.53#ibcon#about to read 6, iclass 38, count 0 2006.229.14:57:43.53#ibcon#read 6, iclass 38, count 0 2006.229.14:57:43.53#ibcon#end of sib2, iclass 38, count 0 2006.229.14:57:43.53#ibcon#*mode == 0, iclass 38, count 0 2006.229.14:57:43.53#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.14:57:43.53#ibcon#[25=BW32\r\n] 2006.229.14:57:43.53#ibcon#*before write, iclass 38, count 0 2006.229.14:57:43.53#ibcon#enter sib2, iclass 38, count 0 2006.229.14:57:43.53#ibcon#flushed, iclass 38, count 0 2006.229.14:57:43.53#ibcon#about to write, iclass 38, count 0 2006.229.14:57:43.53#ibcon#wrote, iclass 38, count 0 2006.229.14:57:43.53#ibcon#about to read 3, iclass 38, count 0 2006.229.14:57:43.56#ibcon#read 3, iclass 38, count 0 2006.229.14:57:43.56#ibcon#about to read 4, iclass 38, count 0 2006.229.14:57:43.56#ibcon#read 4, iclass 38, count 0 2006.229.14:57:43.56#ibcon#about to read 5, iclass 38, count 0 2006.229.14:57:43.56#ibcon#read 5, iclass 38, count 0 2006.229.14:57:43.56#ibcon#about to read 6, iclass 38, count 0 2006.229.14:57:43.56#ibcon#read 6, iclass 38, count 0 2006.229.14:57:43.56#ibcon#end of sib2, iclass 38, count 0 2006.229.14:57:43.56#ibcon#*after write, iclass 38, count 0 2006.229.14:57:43.56#ibcon#*before return 0, iclass 38, count 0 2006.229.14:57:43.56#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:43.56#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.14:57:43.56#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.14:57:43.56#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.14:57:43.56$vck44/vbbw=wide 2006.229.14:57:43.56#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.14:57:43.56#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.14:57:43.56#ibcon#ireg 8 cls_cnt 0 2006.229.14:57:43.56#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:57:43.63#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:57:43.63#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:57:43.63#ibcon#enter wrdev, iclass 40, count 0 2006.229.14:57:43.63#ibcon#first serial, iclass 40, count 0 2006.229.14:57:43.63#ibcon#enter sib2, iclass 40, count 0 2006.229.14:57:43.63#ibcon#flushed, iclass 40, count 0 2006.229.14:57:43.63#ibcon#about to write, iclass 40, count 0 2006.229.14:57:43.63#ibcon#wrote, iclass 40, count 0 2006.229.14:57:43.63#ibcon#about to read 3, iclass 40, count 0 2006.229.14:57:43.65#ibcon#read 3, iclass 40, count 0 2006.229.14:57:43.65#ibcon#about to read 4, iclass 40, count 0 2006.229.14:57:43.65#ibcon#read 4, iclass 40, count 0 2006.229.14:57:43.65#ibcon#about to read 5, iclass 40, count 0 2006.229.14:57:43.65#ibcon#read 5, iclass 40, count 0 2006.229.14:57:43.65#ibcon#about to read 6, iclass 40, count 0 2006.229.14:57:43.65#ibcon#read 6, iclass 40, count 0 2006.229.14:57:43.65#ibcon#end of sib2, iclass 40, count 0 2006.229.14:57:43.65#ibcon#*mode == 0, iclass 40, count 0 2006.229.14:57:43.65#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.14:57:43.65#ibcon#[27=BW32\r\n] 2006.229.14:57:43.65#ibcon#*before write, iclass 40, count 0 2006.229.14:57:43.65#ibcon#enter sib2, iclass 40, count 0 2006.229.14:57:43.65#ibcon#flushed, iclass 40, count 0 2006.229.14:57:43.65#ibcon#about to write, iclass 40, count 0 2006.229.14:57:43.65#ibcon#wrote, iclass 40, count 0 2006.229.14:57:43.65#ibcon#about to read 3, iclass 40, count 0 2006.229.14:57:43.68#ibcon#read 3, iclass 40, count 0 2006.229.14:57:43.68#ibcon#about to read 4, iclass 40, count 0 2006.229.14:57:43.68#ibcon#read 4, iclass 40, count 0 2006.229.14:57:43.68#ibcon#about to read 5, iclass 40, count 0 2006.229.14:57:43.68#ibcon#read 5, iclass 40, count 0 2006.229.14:57:43.68#ibcon#about to read 6, iclass 40, count 0 2006.229.14:57:43.68#ibcon#read 6, iclass 40, count 0 2006.229.14:57:43.68#ibcon#end of sib2, iclass 40, count 0 2006.229.14:57:43.68#ibcon#*after write, iclass 40, count 0 2006.229.14:57:43.68#ibcon#*before return 0, iclass 40, count 0 2006.229.14:57:43.68#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:57:43.68#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.14:57:43.68#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.14:57:43.68#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.14:57:43.68$setupk4/ifdk4 2006.229.14:57:43.68$ifdk4/lo= 2006.229.14:57:43.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.14:57:43.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.14:57:43.68$ifdk4/patch= 2006.229.14:57:43.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.14:57:43.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.14:57:43.68$setupk4/!*+20s 2006.229.14:57:44.30#abcon#<5=/07 0.9 2.0 27.411001002.1\r\n> 2006.229.14:57:44.32#abcon#{5=INTERFACE CLEAR} 2006.229.14:57:44.38#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:57:54.47#abcon#<5=/07 1.0 2.0 27.411001002.1\r\n> 2006.229.14:57:54.49#abcon#{5=INTERFACE CLEAR} 2006.229.14:57:54.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.14:57:58.14#trakl#Source acquired 2006.229.14:57:58.20$setupk4/"tpicd 2006.229.14:57:58.20$setupk4/echo=off 2006.229.14:57:58.20$setupk4/xlog=off 2006.229.14:57:58.20:!2006.229.14:59:05 2006.229.14:58:00.14#flagr#flagr/antenna,acquired 2006.229.14:59:05.00:preob 2006.229.14:59:05.14/onsource/TRACKING 2006.229.14:59:05.14:!2006.229.14:59:15 2006.229.14:59:15.00:"tape 2006.229.14:59:15.00:"st=record 2006.229.14:59:15.00:data_valid=on 2006.229.14:59:15.00:midob 2006.229.14:59:15.14/onsource/TRACKING 2006.229.14:59:15.14/wx/27.42,1002.1,100 2006.229.14:59:15.30/cable/+6.4145E-03 2006.229.14:59:16.39/va/01,08,usb,yes,30,32 2006.229.14:59:16.39/va/02,07,usb,yes,32,33 2006.229.14:59:16.39/va/03,06,usb,yes,40,43 2006.229.14:59:16.39/va/04,07,usb,yes,33,35 2006.229.14:59:16.39/va/05,04,usb,yes,30,30 2006.229.14:59:16.39/va/06,04,usb,yes,33,33 2006.229.14:59:16.39/va/07,05,usb,yes,30,30 2006.229.14:59:16.39/va/08,06,usb,yes,21,27 2006.229.14:59:16.62/valo/01,524.99,yes,locked 2006.229.14:59:16.62/valo/02,534.99,yes,locked 2006.229.14:59:16.62/valo/03,564.99,yes,locked 2006.229.14:59:16.62/valo/04,624.99,yes,locked 2006.229.14:59:16.62/valo/05,734.99,yes,locked 2006.229.14:59:16.62/valo/06,814.99,yes,locked 2006.229.14:59:16.62/valo/07,864.99,yes,locked 2006.229.14:59:16.62/valo/08,884.99,yes,locked 2006.229.14:59:17.71/vb/01,04,usb,yes,31,28 2006.229.14:59:17.71/vb/02,04,usb,yes,33,33 2006.229.14:59:17.71/vb/03,04,usb,yes,30,33 2006.229.14:59:17.71/vb/04,04,usb,yes,34,33 2006.229.14:59:17.71/vb/05,04,usb,yes,27,29 2006.229.14:59:17.71/vb/06,04,usb,yes,31,27 2006.229.14:59:17.71/vb/07,04,usb,yes,31,31 2006.229.14:59:17.71/vb/08,04,usb,yes,28,32 2006.229.14:59:17.95/vblo/01,629.99,yes,locked 2006.229.14:59:17.95/vblo/02,634.99,yes,locked 2006.229.14:59:17.95/vblo/03,649.99,yes,locked 2006.229.14:59:17.95/vblo/04,679.99,yes,locked 2006.229.14:59:17.95/vblo/05,709.99,yes,locked 2006.229.14:59:17.95/vblo/06,719.99,yes,locked 2006.229.14:59:17.95/vblo/07,734.99,yes,locked 2006.229.14:59:17.95/vblo/08,744.99,yes,locked 2006.229.14:59:18.10/vabw/8 2006.229.14:59:18.25/vbbw/8 2006.229.14:59:18.34/xfe/off,on,12.2 2006.229.14:59:18.73/ifatt/23,28,28,28 2006.229.14:59:19.07/fmout-gps/S +4.55E-07 2006.229.14:59:19.11:!2006.229.15:00:25 2006.229.15:00:25.00:data_valid=off 2006.229.15:00:25.00:"et 2006.229.15:00:25.00:!+3s 2006.229.15:00:28.01:"tape 2006.229.15:00:28.01:postob 2006.229.15:00:28.17/cable/+6.4148E-03 2006.229.15:00:28.17/wx/27.41,1002.1,100 2006.229.15:00:29.07/fmout-gps/S +4.53E-07 2006.229.15:00:29.07:scan_name=229-1502,jd0608,170 2006.229.15:00:29.07:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.15:00:30.13#flagr#flagr/antenna,new-source 2006.229.15:00:30.13:checkk5 2006.229.15:00:30.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:00:30.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:00:31.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:00:31.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:00:32.09/chk_obsdata//k5ts1/T2291459??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:00:32.48/chk_obsdata//k5ts2/T2291459??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:00:32.88/chk_obsdata//k5ts3/T2291459??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:00:33.28/chk_obsdata//k5ts4/T2291459??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:00:34.01/k5log//k5ts1_log_newline 2006.229.15:00:34.75/k5log//k5ts2_log_newline 2006.229.15:00:35.46/k5log//k5ts3_log_newline 2006.229.15:00:36.20/k5log//k5ts4_log_newline 2006.229.15:00:36.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:00:36.23:setupk4=1 2006.229.15:00:36.23$setupk4/echo=on 2006.229.15:00:36.23$setupk4/pcalon 2006.229.15:00:36.23$pcalon/"no phase cal control is implemented here 2006.229.15:00:36.23$setupk4/"tpicd=stop 2006.229.15:00:36.23$setupk4/"rec=synch_on 2006.229.15:00:36.23$setupk4/"rec_mode=128 2006.229.15:00:36.23$setupk4/!* 2006.229.15:00:36.23$setupk4/recpk4 2006.229.15:00:36.23$recpk4/recpatch= 2006.229.15:00:36.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:00:36.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:00:36.23$setupk4/vck44 2006.229.15:00:36.23$vck44/valo=1,524.99 2006.229.15:00:36.23#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:00:36.23#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:00:36.23#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:36.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:36.23#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:36.23#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:36.23#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:00:36.23#ibcon#first serial, iclass 3, count 0 2006.229.15:00:36.23#ibcon#enter sib2, iclass 3, count 0 2006.229.15:00:36.23#ibcon#flushed, iclass 3, count 0 2006.229.15:00:36.23#ibcon#about to write, iclass 3, count 0 2006.229.15:00:36.24#ibcon#wrote, iclass 3, count 0 2006.229.15:00:36.24#ibcon#about to read 3, iclass 3, count 0 2006.229.15:00:36.25#ibcon#read 3, iclass 3, count 0 2006.229.15:00:36.25#ibcon#about to read 4, iclass 3, count 0 2006.229.15:00:36.25#ibcon#read 4, iclass 3, count 0 2006.229.15:00:36.25#ibcon#about to read 5, iclass 3, count 0 2006.229.15:00:36.25#ibcon#read 5, iclass 3, count 0 2006.229.15:00:36.25#ibcon#about to read 6, iclass 3, count 0 2006.229.15:00:36.25#ibcon#read 6, iclass 3, count 0 2006.229.15:00:36.25#ibcon#end of sib2, iclass 3, count 0 2006.229.15:00:36.25#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:00:36.25#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:00:36.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:00:36.25#ibcon#*before write, iclass 3, count 0 2006.229.15:00:36.25#ibcon#enter sib2, iclass 3, count 0 2006.229.15:00:36.25#ibcon#flushed, iclass 3, count 0 2006.229.15:00:36.25#ibcon#about to write, iclass 3, count 0 2006.229.15:00:36.25#ibcon#wrote, iclass 3, count 0 2006.229.15:00:36.25#ibcon#about to read 3, iclass 3, count 0 2006.229.15:00:36.30#ibcon#read 3, iclass 3, count 0 2006.229.15:00:36.30#ibcon#about to read 4, iclass 3, count 0 2006.229.15:00:36.30#ibcon#read 4, iclass 3, count 0 2006.229.15:00:36.30#ibcon#about to read 5, iclass 3, count 0 2006.229.15:00:36.30#ibcon#read 5, iclass 3, count 0 2006.229.15:00:36.30#ibcon#about to read 6, iclass 3, count 0 2006.229.15:00:36.30#ibcon#read 6, iclass 3, count 0 2006.229.15:00:36.30#ibcon#end of sib2, iclass 3, count 0 2006.229.15:00:36.30#ibcon#*after write, iclass 3, count 0 2006.229.15:00:36.30#ibcon#*before return 0, iclass 3, count 0 2006.229.15:00:36.30#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:36.30#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:36.30#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:00:36.30#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:00:36.30$vck44/va=1,8 2006.229.15:00:36.30#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.15:00:36.30#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.15:00:36.30#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:36.30#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:36.30#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:36.30#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:36.30#ibcon#enter wrdev, iclass 5, count 2 2006.229.15:00:36.30#ibcon#first serial, iclass 5, count 2 2006.229.15:00:36.30#ibcon#enter sib2, iclass 5, count 2 2006.229.15:00:36.30#ibcon#flushed, iclass 5, count 2 2006.229.15:00:36.30#ibcon#about to write, iclass 5, count 2 2006.229.15:00:36.30#ibcon#wrote, iclass 5, count 2 2006.229.15:00:36.30#ibcon#about to read 3, iclass 5, count 2 2006.229.15:00:36.32#ibcon#read 3, iclass 5, count 2 2006.229.15:00:36.32#ibcon#about to read 4, iclass 5, count 2 2006.229.15:00:36.32#ibcon#read 4, iclass 5, count 2 2006.229.15:00:36.32#ibcon#about to read 5, iclass 5, count 2 2006.229.15:00:36.32#ibcon#read 5, iclass 5, count 2 2006.229.15:00:36.32#ibcon#about to read 6, iclass 5, count 2 2006.229.15:00:36.32#ibcon#read 6, iclass 5, count 2 2006.229.15:00:36.32#ibcon#end of sib2, iclass 5, count 2 2006.229.15:00:36.32#ibcon#*mode == 0, iclass 5, count 2 2006.229.15:00:36.32#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.15:00:36.32#ibcon#[25=AT01-08\r\n] 2006.229.15:00:36.32#ibcon#*before write, iclass 5, count 2 2006.229.15:00:36.32#ibcon#enter sib2, iclass 5, count 2 2006.229.15:00:36.32#ibcon#flushed, iclass 5, count 2 2006.229.15:00:36.32#ibcon#about to write, iclass 5, count 2 2006.229.15:00:36.32#ibcon#wrote, iclass 5, count 2 2006.229.15:00:36.32#ibcon#about to read 3, iclass 5, count 2 2006.229.15:00:36.35#ibcon#read 3, iclass 5, count 2 2006.229.15:00:36.35#ibcon#about to read 4, iclass 5, count 2 2006.229.15:00:36.35#ibcon#read 4, iclass 5, count 2 2006.229.15:00:36.35#ibcon#about to read 5, iclass 5, count 2 2006.229.15:00:36.35#ibcon#read 5, iclass 5, count 2 2006.229.15:00:36.35#ibcon#about to read 6, iclass 5, count 2 2006.229.15:00:36.35#ibcon#read 6, iclass 5, count 2 2006.229.15:00:36.35#ibcon#end of sib2, iclass 5, count 2 2006.229.15:00:36.35#ibcon#*after write, iclass 5, count 2 2006.229.15:00:36.35#ibcon#*before return 0, iclass 5, count 2 2006.229.15:00:36.35#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:36.35#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:36.35#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.15:00:36.35#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:36.35#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:36.47#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:36.47#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:36.47#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:00:36.47#ibcon#first serial, iclass 5, count 0 2006.229.15:00:36.47#ibcon#enter sib2, iclass 5, count 0 2006.229.15:00:36.47#ibcon#flushed, iclass 5, count 0 2006.229.15:00:36.47#ibcon#about to write, iclass 5, count 0 2006.229.15:00:36.47#ibcon#wrote, iclass 5, count 0 2006.229.15:00:36.47#ibcon#about to read 3, iclass 5, count 0 2006.229.15:00:36.49#ibcon#read 3, iclass 5, count 0 2006.229.15:00:36.49#ibcon#about to read 4, iclass 5, count 0 2006.229.15:00:36.49#ibcon#read 4, iclass 5, count 0 2006.229.15:00:36.49#ibcon#about to read 5, iclass 5, count 0 2006.229.15:00:36.49#ibcon#read 5, iclass 5, count 0 2006.229.15:00:36.49#ibcon#about to read 6, iclass 5, count 0 2006.229.15:00:36.49#ibcon#read 6, iclass 5, count 0 2006.229.15:00:36.49#ibcon#end of sib2, iclass 5, count 0 2006.229.15:00:36.49#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:00:36.49#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:00:36.49#ibcon#[25=USB\r\n] 2006.229.15:00:36.49#ibcon#*before write, iclass 5, count 0 2006.229.15:00:36.49#ibcon#enter sib2, iclass 5, count 0 2006.229.15:00:36.49#ibcon#flushed, iclass 5, count 0 2006.229.15:00:36.49#ibcon#about to write, iclass 5, count 0 2006.229.15:00:36.49#ibcon#wrote, iclass 5, count 0 2006.229.15:00:36.49#ibcon#about to read 3, iclass 5, count 0 2006.229.15:00:36.52#ibcon#read 3, iclass 5, count 0 2006.229.15:00:36.52#ibcon#about to read 4, iclass 5, count 0 2006.229.15:00:36.52#ibcon#read 4, iclass 5, count 0 2006.229.15:00:36.52#ibcon#about to read 5, iclass 5, count 0 2006.229.15:00:36.52#ibcon#read 5, iclass 5, count 0 2006.229.15:00:36.52#ibcon#about to read 6, iclass 5, count 0 2006.229.15:00:36.52#ibcon#read 6, iclass 5, count 0 2006.229.15:00:36.52#ibcon#end of sib2, iclass 5, count 0 2006.229.15:00:36.52#ibcon#*after write, iclass 5, count 0 2006.229.15:00:36.52#ibcon#*before return 0, iclass 5, count 0 2006.229.15:00:36.52#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:36.52#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:36.52#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:00:36.52#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:00:36.52$vck44/valo=2,534.99 2006.229.15:00:36.52#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.15:00:36.52#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.15:00:36.52#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:36.52#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:36.52#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:36.52#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:36.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:00:36.52#ibcon#first serial, iclass 7, count 0 2006.229.15:00:36.52#ibcon#enter sib2, iclass 7, count 0 2006.229.15:00:36.52#ibcon#flushed, iclass 7, count 0 2006.229.15:00:36.52#ibcon#about to write, iclass 7, count 0 2006.229.15:00:36.52#ibcon#wrote, iclass 7, count 0 2006.229.15:00:36.52#ibcon#about to read 3, iclass 7, count 0 2006.229.15:00:36.54#ibcon#read 3, iclass 7, count 0 2006.229.15:00:36.54#ibcon#about to read 4, iclass 7, count 0 2006.229.15:00:36.54#ibcon#read 4, iclass 7, count 0 2006.229.15:00:36.54#ibcon#about to read 5, iclass 7, count 0 2006.229.15:00:36.54#ibcon#read 5, iclass 7, count 0 2006.229.15:00:36.54#ibcon#about to read 6, iclass 7, count 0 2006.229.15:00:36.54#ibcon#read 6, iclass 7, count 0 2006.229.15:00:36.54#ibcon#end of sib2, iclass 7, count 0 2006.229.15:00:36.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:00:36.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:00:36.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:00:36.54#ibcon#*before write, iclass 7, count 0 2006.229.15:00:36.54#ibcon#enter sib2, iclass 7, count 0 2006.229.15:00:36.54#ibcon#flushed, iclass 7, count 0 2006.229.15:00:36.54#ibcon#about to write, iclass 7, count 0 2006.229.15:00:36.54#ibcon#wrote, iclass 7, count 0 2006.229.15:00:36.54#ibcon#about to read 3, iclass 7, count 0 2006.229.15:00:36.58#ibcon#read 3, iclass 7, count 0 2006.229.15:00:36.58#ibcon#about to read 4, iclass 7, count 0 2006.229.15:00:36.58#ibcon#read 4, iclass 7, count 0 2006.229.15:00:36.58#ibcon#about to read 5, iclass 7, count 0 2006.229.15:00:36.58#ibcon#read 5, iclass 7, count 0 2006.229.15:00:36.58#ibcon#about to read 6, iclass 7, count 0 2006.229.15:00:36.58#ibcon#read 6, iclass 7, count 0 2006.229.15:00:36.58#ibcon#end of sib2, iclass 7, count 0 2006.229.15:00:36.58#ibcon#*after write, iclass 7, count 0 2006.229.15:00:36.58#ibcon#*before return 0, iclass 7, count 0 2006.229.15:00:36.58#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:36.58#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:36.58#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:00:36.58#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:00:36.58$vck44/va=2,7 2006.229.15:00:36.58#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.15:00:36.58#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.15:00:36.58#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:36.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:36.64#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:36.64#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:36.64#ibcon#enter wrdev, iclass 11, count 2 2006.229.15:00:36.64#ibcon#first serial, iclass 11, count 2 2006.229.15:00:36.64#ibcon#enter sib2, iclass 11, count 2 2006.229.15:00:36.64#ibcon#flushed, iclass 11, count 2 2006.229.15:00:36.64#ibcon#about to write, iclass 11, count 2 2006.229.15:00:36.64#ibcon#wrote, iclass 11, count 2 2006.229.15:00:36.64#ibcon#about to read 3, iclass 11, count 2 2006.229.15:00:36.66#ibcon#read 3, iclass 11, count 2 2006.229.15:00:36.66#ibcon#about to read 4, iclass 11, count 2 2006.229.15:00:36.66#ibcon#read 4, iclass 11, count 2 2006.229.15:00:36.66#ibcon#about to read 5, iclass 11, count 2 2006.229.15:00:36.66#ibcon#read 5, iclass 11, count 2 2006.229.15:00:36.66#ibcon#about to read 6, iclass 11, count 2 2006.229.15:00:36.66#ibcon#read 6, iclass 11, count 2 2006.229.15:00:36.66#ibcon#end of sib2, iclass 11, count 2 2006.229.15:00:36.66#ibcon#*mode == 0, iclass 11, count 2 2006.229.15:00:36.66#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.15:00:36.66#ibcon#[25=AT02-07\r\n] 2006.229.15:00:36.66#ibcon#*before write, iclass 11, count 2 2006.229.15:00:36.66#ibcon#enter sib2, iclass 11, count 2 2006.229.15:00:36.66#ibcon#flushed, iclass 11, count 2 2006.229.15:00:36.66#ibcon#about to write, iclass 11, count 2 2006.229.15:00:36.66#ibcon#wrote, iclass 11, count 2 2006.229.15:00:36.66#ibcon#about to read 3, iclass 11, count 2 2006.229.15:00:36.69#ibcon#read 3, iclass 11, count 2 2006.229.15:00:36.69#ibcon#about to read 4, iclass 11, count 2 2006.229.15:00:36.69#ibcon#read 4, iclass 11, count 2 2006.229.15:00:36.69#ibcon#about to read 5, iclass 11, count 2 2006.229.15:00:36.69#ibcon#read 5, iclass 11, count 2 2006.229.15:00:36.69#ibcon#about to read 6, iclass 11, count 2 2006.229.15:00:36.69#ibcon#read 6, iclass 11, count 2 2006.229.15:00:36.69#ibcon#end of sib2, iclass 11, count 2 2006.229.15:00:36.69#ibcon#*after write, iclass 11, count 2 2006.229.15:00:36.69#ibcon#*before return 0, iclass 11, count 2 2006.229.15:00:36.69#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:36.69#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:36.69#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.15:00:36.69#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:36.69#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:36.81#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:36.81#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:36.81#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:00:36.81#ibcon#first serial, iclass 11, count 0 2006.229.15:00:36.81#ibcon#enter sib2, iclass 11, count 0 2006.229.15:00:36.81#ibcon#flushed, iclass 11, count 0 2006.229.15:00:36.81#ibcon#about to write, iclass 11, count 0 2006.229.15:00:36.81#ibcon#wrote, iclass 11, count 0 2006.229.15:00:36.81#ibcon#about to read 3, iclass 11, count 0 2006.229.15:00:36.83#ibcon#read 3, iclass 11, count 0 2006.229.15:00:36.83#ibcon#about to read 4, iclass 11, count 0 2006.229.15:00:36.83#ibcon#read 4, iclass 11, count 0 2006.229.15:00:36.83#ibcon#about to read 5, iclass 11, count 0 2006.229.15:00:36.83#ibcon#read 5, iclass 11, count 0 2006.229.15:00:36.83#ibcon#about to read 6, iclass 11, count 0 2006.229.15:00:36.83#ibcon#read 6, iclass 11, count 0 2006.229.15:00:36.83#ibcon#end of sib2, iclass 11, count 0 2006.229.15:00:36.83#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:00:36.83#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:00:36.83#ibcon#[25=USB\r\n] 2006.229.15:00:36.83#ibcon#*before write, iclass 11, count 0 2006.229.15:00:36.83#ibcon#enter sib2, iclass 11, count 0 2006.229.15:00:36.83#ibcon#flushed, iclass 11, count 0 2006.229.15:00:36.83#ibcon#about to write, iclass 11, count 0 2006.229.15:00:36.83#ibcon#wrote, iclass 11, count 0 2006.229.15:00:36.83#ibcon#about to read 3, iclass 11, count 0 2006.229.15:00:36.86#ibcon#read 3, iclass 11, count 0 2006.229.15:00:36.86#ibcon#about to read 4, iclass 11, count 0 2006.229.15:00:36.86#ibcon#read 4, iclass 11, count 0 2006.229.15:00:36.86#ibcon#about to read 5, iclass 11, count 0 2006.229.15:00:36.86#ibcon#read 5, iclass 11, count 0 2006.229.15:00:36.86#ibcon#about to read 6, iclass 11, count 0 2006.229.15:00:36.86#ibcon#read 6, iclass 11, count 0 2006.229.15:00:36.86#ibcon#end of sib2, iclass 11, count 0 2006.229.15:00:36.86#ibcon#*after write, iclass 11, count 0 2006.229.15:00:36.86#ibcon#*before return 0, iclass 11, count 0 2006.229.15:00:36.86#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:36.86#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:36.86#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:00:36.86#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:00:36.86$vck44/valo=3,564.99 2006.229.15:00:36.86#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.15:00:36.86#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.15:00:36.86#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:36.86#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:36.86#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:36.86#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:36.86#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:00:36.86#ibcon#first serial, iclass 13, count 0 2006.229.15:00:36.86#ibcon#enter sib2, iclass 13, count 0 2006.229.15:00:36.86#ibcon#flushed, iclass 13, count 0 2006.229.15:00:36.86#ibcon#about to write, iclass 13, count 0 2006.229.15:00:36.86#ibcon#wrote, iclass 13, count 0 2006.229.15:00:36.86#ibcon#about to read 3, iclass 13, count 0 2006.229.15:00:36.88#ibcon#read 3, iclass 13, count 0 2006.229.15:00:36.88#ibcon#about to read 4, iclass 13, count 0 2006.229.15:00:36.88#ibcon#read 4, iclass 13, count 0 2006.229.15:00:36.88#ibcon#about to read 5, iclass 13, count 0 2006.229.15:00:36.88#ibcon#read 5, iclass 13, count 0 2006.229.15:00:36.88#ibcon#about to read 6, iclass 13, count 0 2006.229.15:00:36.88#ibcon#read 6, iclass 13, count 0 2006.229.15:00:36.88#ibcon#end of sib2, iclass 13, count 0 2006.229.15:00:36.88#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:00:36.88#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:00:36.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:00:36.88#ibcon#*before write, iclass 13, count 0 2006.229.15:00:36.88#ibcon#enter sib2, iclass 13, count 0 2006.229.15:00:36.88#ibcon#flushed, iclass 13, count 0 2006.229.15:00:36.88#ibcon#about to write, iclass 13, count 0 2006.229.15:00:36.88#ibcon#wrote, iclass 13, count 0 2006.229.15:00:36.88#ibcon#about to read 3, iclass 13, count 0 2006.229.15:00:36.92#ibcon#read 3, iclass 13, count 0 2006.229.15:00:36.92#ibcon#about to read 4, iclass 13, count 0 2006.229.15:00:36.92#ibcon#read 4, iclass 13, count 0 2006.229.15:00:36.92#ibcon#about to read 5, iclass 13, count 0 2006.229.15:00:36.92#ibcon#read 5, iclass 13, count 0 2006.229.15:00:36.92#ibcon#about to read 6, iclass 13, count 0 2006.229.15:00:36.92#ibcon#read 6, iclass 13, count 0 2006.229.15:00:36.92#ibcon#end of sib2, iclass 13, count 0 2006.229.15:00:36.92#ibcon#*after write, iclass 13, count 0 2006.229.15:00:36.92#ibcon#*before return 0, iclass 13, count 0 2006.229.15:00:36.92#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:36.92#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:36.92#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:00:36.92#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:00:36.92$vck44/va=3,6 2006.229.15:00:36.92#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.15:00:36.92#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.15:00:36.92#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:36.92#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:36.98#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:36.98#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:36.98#ibcon#enter wrdev, iclass 15, count 2 2006.229.15:00:36.98#ibcon#first serial, iclass 15, count 2 2006.229.15:00:36.98#ibcon#enter sib2, iclass 15, count 2 2006.229.15:00:36.98#ibcon#flushed, iclass 15, count 2 2006.229.15:00:36.98#ibcon#about to write, iclass 15, count 2 2006.229.15:00:36.98#ibcon#wrote, iclass 15, count 2 2006.229.15:00:36.98#ibcon#about to read 3, iclass 15, count 2 2006.229.15:00:37.00#ibcon#read 3, iclass 15, count 2 2006.229.15:00:37.00#ibcon#about to read 4, iclass 15, count 2 2006.229.15:00:37.00#ibcon#read 4, iclass 15, count 2 2006.229.15:00:37.00#ibcon#about to read 5, iclass 15, count 2 2006.229.15:00:37.00#ibcon#read 5, iclass 15, count 2 2006.229.15:00:37.00#ibcon#about to read 6, iclass 15, count 2 2006.229.15:00:37.00#ibcon#read 6, iclass 15, count 2 2006.229.15:00:37.00#ibcon#end of sib2, iclass 15, count 2 2006.229.15:00:37.00#ibcon#*mode == 0, iclass 15, count 2 2006.229.15:00:37.00#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.15:00:37.00#ibcon#[25=AT03-06\r\n] 2006.229.15:00:37.00#ibcon#*before write, iclass 15, count 2 2006.229.15:00:37.00#ibcon#enter sib2, iclass 15, count 2 2006.229.15:00:37.00#ibcon#flushed, iclass 15, count 2 2006.229.15:00:37.00#ibcon#about to write, iclass 15, count 2 2006.229.15:00:37.00#ibcon#wrote, iclass 15, count 2 2006.229.15:00:37.00#ibcon#about to read 3, iclass 15, count 2 2006.229.15:00:37.03#ibcon#read 3, iclass 15, count 2 2006.229.15:00:37.03#ibcon#about to read 4, iclass 15, count 2 2006.229.15:00:37.03#ibcon#read 4, iclass 15, count 2 2006.229.15:00:37.03#ibcon#about to read 5, iclass 15, count 2 2006.229.15:00:37.03#ibcon#read 5, iclass 15, count 2 2006.229.15:00:37.03#ibcon#about to read 6, iclass 15, count 2 2006.229.15:00:37.03#ibcon#read 6, iclass 15, count 2 2006.229.15:00:37.03#ibcon#end of sib2, iclass 15, count 2 2006.229.15:00:37.03#ibcon#*after write, iclass 15, count 2 2006.229.15:00:37.03#ibcon#*before return 0, iclass 15, count 2 2006.229.15:00:37.03#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:37.03#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:37.03#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.15:00:37.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:37.03#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:37.15#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:37.15#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:37.15#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:00:37.15#ibcon#first serial, iclass 15, count 0 2006.229.15:00:37.15#ibcon#enter sib2, iclass 15, count 0 2006.229.15:00:37.15#ibcon#flushed, iclass 15, count 0 2006.229.15:00:37.15#ibcon#about to write, iclass 15, count 0 2006.229.15:00:37.15#ibcon#wrote, iclass 15, count 0 2006.229.15:00:37.15#ibcon#about to read 3, iclass 15, count 0 2006.229.15:00:37.17#ibcon#read 3, iclass 15, count 0 2006.229.15:00:37.17#ibcon#about to read 4, iclass 15, count 0 2006.229.15:00:37.17#ibcon#read 4, iclass 15, count 0 2006.229.15:00:37.17#ibcon#about to read 5, iclass 15, count 0 2006.229.15:00:37.17#ibcon#read 5, iclass 15, count 0 2006.229.15:00:37.17#ibcon#about to read 6, iclass 15, count 0 2006.229.15:00:37.17#ibcon#read 6, iclass 15, count 0 2006.229.15:00:37.17#ibcon#end of sib2, iclass 15, count 0 2006.229.15:00:37.17#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:00:37.17#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:00:37.17#ibcon#[25=USB\r\n] 2006.229.15:00:37.17#ibcon#*before write, iclass 15, count 0 2006.229.15:00:37.17#ibcon#enter sib2, iclass 15, count 0 2006.229.15:00:37.17#ibcon#flushed, iclass 15, count 0 2006.229.15:00:37.17#ibcon#about to write, iclass 15, count 0 2006.229.15:00:37.17#ibcon#wrote, iclass 15, count 0 2006.229.15:00:37.17#ibcon#about to read 3, iclass 15, count 0 2006.229.15:00:37.20#ibcon#read 3, iclass 15, count 0 2006.229.15:00:37.20#ibcon#about to read 4, iclass 15, count 0 2006.229.15:00:37.20#ibcon#read 4, iclass 15, count 0 2006.229.15:00:37.20#ibcon#about to read 5, iclass 15, count 0 2006.229.15:00:37.20#ibcon#read 5, iclass 15, count 0 2006.229.15:00:37.20#ibcon#about to read 6, iclass 15, count 0 2006.229.15:00:37.20#ibcon#read 6, iclass 15, count 0 2006.229.15:00:37.20#ibcon#end of sib2, iclass 15, count 0 2006.229.15:00:37.20#ibcon#*after write, iclass 15, count 0 2006.229.15:00:37.20#ibcon#*before return 0, iclass 15, count 0 2006.229.15:00:37.20#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:37.20#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:37.20#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:00:37.20#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:00:37.20$vck44/valo=4,624.99 2006.229.15:00:37.20#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.15:00:37.20#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.15:00:37.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:37.20#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:37.20#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:37.20#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:37.20#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:00:37.20#ibcon#first serial, iclass 17, count 0 2006.229.15:00:37.20#ibcon#enter sib2, iclass 17, count 0 2006.229.15:00:37.20#ibcon#flushed, iclass 17, count 0 2006.229.15:00:37.20#ibcon#about to write, iclass 17, count 0 2006.229.15:00:37.20#ibcon#wrote, iclass 17, count 0 2006.229.15:00:37.20#ibcon#about to read 3, iclass 17, count 0 2006.229.15:00:37.22#ibcon#read 3, iclass 17, count 0 2006.229.15:00:37.22#ibcon#about to read 4, iclass 17, count 0 2006.229.15:00:37.22#ibcon#read 4, iclass 17, count 0 2006.229.15:00:37.22#ibcon#about to read 5, iclass 17, count 0 2006.229.15:00:37.22#ibcon#read 5, iclass 17, count 0 2006.229.15:00:37.22#ibcon#about to read 6, iclass 17, count 0 2006.229.15:00:37.22#ibcon#read 6, iclass 17, count 0 2006.229.15:00:37.22#ibcon#end of sib2, iclass 17, count 0 2006.229.15:00:37.22#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:00:37.22#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:00:37.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:00:37.22#ibcon#*before write, iclass 17, count 0 2006.229.15:00:37.22#ibcon#enter sib2, iclass 17, count 0 2006.229.15:00:37.22#ibcon#flushed, iclass 17, count 0 2006.229.15:00:37.22#ibcon#about to write, iclass 17, count 0 2006.229.15:00:37.22#ibcon#wrote, iclass 17, count 0 2006.229.15:00:37.22#ibcon#about to read 3, iclass 17, count 0 2006.229.15:00:37.26#ibcon#read 3, iclass 17, count 0 2006.229.15:00:37.26#ibcon#about to read 4, iclass 17, count 0 2006.229.15:00:37.26#ibcon#read 4, iclass 17, count 0 2006.229.15:00:37.26#ibcon#about to read 5, iclass 17, count 0 2006.229.15:00:37.26#ibcon#read 5, iclass 17, count 0 2006.229.15:00:37.26#ibcon#about to read 6, iclass 17, count 0 2006.229.15:00:37.26#ibcon#read 6, iclass 17, count 0 2006.229.15:00:37.26#ibcon#end of sib2, iclass 17, count 0 2006.229.15:00:37.26#ibcon#*after write, iclass 17, count 0 2006.229.15:00:37.26#ibcon#*before return 0, iclass 17, count 0 2006.229.15:00:37.26#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:37.26#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:37.26#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:00:37.26#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:00:37.26$vck44/va=4,7 2006.229.15:00:37.26#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:00:37.26#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:00:37.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:37.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:00:37.28#abcon#<5=/07 1.1 2.0 27.411001002.1\r\n> 2006.229.15:00:37.30#abcon#{5=INTERFACE CLEAR} 2006.229.15:00:37.32#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:00:37.32#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:00:37.32#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:00:37.32#ibcon#first serial, iclass 20, count 2 2006.229.15:00:37.32#ibcon#enter sib2, iclass 20, count 2 2006.229.15:00:37.32#ibcon#flushed, iclass 20, count 2 2006.229.15:00:37.32#ibcon#about to write, iclass 20, count 2 2006.229.15:00:37.32#ibcon#wrote, iclass 20, count 2 2006.229.15:00:37.32#ibcon#about to read 3, iclass 20, count 2 2006.229.15:00:37.34#ibcon#read 3, iclass 20, count 2 2006.229.15:00:37.34#ibcon#about to read 4, iclass 20, count 2 2006.229.15:00:37.34#ibcon#read 4, iclass 20, count 2 2006.229.15:00:37.34#ibcon#about to read 5, iclass 20, count 2 2006.229.15:00:37.34#ibcon#read 5, iclass 20, count 2 2006.229.15:00:37.34#ibcon#about to read 6, iclass 20, count 2 2006.229.15:00:37.34#ibcon#read 6, iclass 20, count 2 2006.229.15:00:37.34#ibcon#end of sib2, iclass 20, count 2 2006.229.15:00:37.34#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:00:37.34#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:00:37.34#ibcon#[25=AT04-07\r\n] 2006.229.15:00:37.34#ibcon#*before write, iclass 20, count 2 2006.229.15:00:37.34#ibcon#enter sib2, iclass 20, count 2 2006.229.15:00:37.34#ibcon#flushed, iclass 20, count 2 2006.229.15:00:37.34#ibcon#about to write, iclass 20, count 2 2006.229.15:00:37.34#ibcon#wrote, iclass 20, count 2 2006.229.15:00:37.34#ibcon#about to read 3, iclass 20, count 2 2006.229.15:00:37.36#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:00:37.37#ibcon#read 3, iclass 20, count 2 2006.229.15:00:37.37#ibcon#about to read 4, iclass 20, count 2 2006.229.15:00:37.37#ibcon#read 4, iclass 20, count 2 2006.229.15:00:37.37#ibcon#about to read 5, iclass 20, count 2 2006.229.15:00:37.37#ibcon#read 5, iclass 20, count 2 2006.229.15:00:37.37#ibcon#about to read 6, iclass 20, count 2 2006.229.15:00:37.37#ibcon#read 6, iclass 20, count 2 2006.229.15:00:37.37#ibcon#end of sib2, iclass 20, count 2 2006.229.15:00:37.37#ibcon#*after write, iclass 20, count 2 2006.229.15:00:37.37#ibcon#*before return 0, iclass 20, count 2 2006.229.15:00:37.37#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:00:37.37#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:00:37.37#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:00:37.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:37.37#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:00:37.49#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:00:37.49#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:00:37.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:00:37.49#ibcon#first serial, iclass 20, count 0 2006.229.15:00:37.49#ibcon#enter sib2, iclass 20, count 0 2006.229.15:00:37.49#ibcon#flushed, iclass 20, count 0 2006.229.15:00:37.49#ibcon#about to write, iclass 20, count 0 2006.229.15:00:37.49#ibcon#wrote, iclass 20, count 0 2006.229.15:00:37.49#ibcon#about to read 3, iclass 20, count 0 2006.229.15:00:37.51#ibcon#read 3, iclass 20, count 0 2006.229.15:00:37.51#ibcon#about to read 4, iclass 20, count 0 2006.229.15:00:37.51#ibcon#read 4, iclass 20, count 0 2006.229.15:00:37.51#ibcon#about to read 5, iclass 20, count 0 2006.229.15:00:37.51#ibcon#read 5, iclass 20, count 0 2006.229.15:00:37.51#ibcon#about to read 6, iclass 20, count 0 2006.229.15:00:37.51#ibcon#read 6, iclass 20, count 0 2006.229.15:00:37.51#ibcon#end of sib2, iclass 20, count 0 2006.229.15:00:37.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:00:37.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:00:37.51#ibcon#[25=USB\r\n] 2006.229.15:00:37.51#ibcon#*before write, iclass 20, count 0 2006.229.15:00:37.51#ibcon#enter sib2, iclass 20, count 0 2006.229.15:00:37.51#ibcon#flushed, iclass 20, count 0 2006.229.15:00:37.51#ibcon#about to write, iclass 20, count 0 2006.229.15:00:37.51#ibcon#wrote, iclass 20, count 0 2006.229.15:00:37.51#ibcon#about to read 3, iclass 20, count 0 2006.229.15:00:37.54#ibcon#read 3, iclass 20, count 0 2006.229.15:00:37.54#ibcon#about to read 4, iclass 20, count 0 2006.229.15:00:37.54#ibcon#read 4, iclass 20, count 0 2006.229.15:00:37.54#ibcon#about to read 5, iclass 20, count 0 2006.229.15:00:37.54#ibcon#read 5, iclass 20, count 0 2006.229.15:00:37.54#ibcon#about to read 6, iclass 20, count 0 2006.229.15:00:37.54#ibcon#read 6, iclass 20, count 0 2006.229.15:00:37.54#ibcon#end of sib2, iclass 20, count 0 2006.229.15:00:37.54#ibcon#*after write, iclass 20, count 0 2006.229.15:00:37.54#ibcon#*before return 0, iclass 20, count 0 2006.229.15:00:37.54#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:00:37.54#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:00:37.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:00:37.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:00:37.54$vck44/valo=5,734.99 2006.229.15:00:37.54#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:00:37.54#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:00:37.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:37.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:37.54#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:37.54#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:37.54#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:00:37.54#ibcon#first serial, iclass 25, count 0 2006.229.15:00:37.54#ibcon#enter sib2, iclass 25, count 0 2006.229.15:00:37.54#ibcon#flushed, iclass 25, count 0 2006.229.15:00:37.54#ibcon#about to write, iclass 25, count 0 2006.229.15:00:37.54#ibcon#wrote, iclass 25, count 0 2006.229.15:00:37.54#ibcon#about to read 3, iclass 25, count 0 2006.229.15:00:37.56#ibcon#read 3, iclass 25, count 0 2006.229.15:00:37.56#ibcon#about to read 4, iclass 25, count 0 2006.229.15:00:37.56#ibcon#read 4, iclass 25, count 0 2006.229.15:00:37.56#ibcon#about to read 5, iclass 25, count 0 2006.229.15:00:37.56#ibcon#read 5, iclass 25, count 0 2006.229.15:00:37.56#ibcon#about to read 6, iclass 25, count 0 2006.229.15:00:37.56#ibcon#read 6, iclass 25, count 0 2006.229.15:00:37.56#ibcon#end of sib2, iclass 25, count 0 2006.229.15:00:37.56#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:00:37.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:00:37.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:00:37.56#ibcon#*before write, iclass 25, count 0 2006.229.15:00:37.56#ibcon#enter sib2, iclass 25, count 0 2006.229.15:00:37.56#ibcon#flushed, iclass 25, count 0 2006.229.15:00:37.56#ibcon#about to write, iclass 25, count 0 2006.229.15:00:37.56#ibcon#wrote, iclass 25, count 0 2006.229.15:00:37.56#ibcon#about to read 3, iclass 25, count 0 2006.229.15:00:37.60#ibcon#read 3, iclass 25, count 0 2006.229.15:00:37.60#ibcon#about to read 4, iclass 25, count 0 2006.229.15:00:37.60#ibcon#read 4, iclass 25, count 0 2006.229.15:00:37.60#ibcon#about to read 5, iclass 25, count 0 2006.229.15:00:37.60#ibcon#read 5, iclass 25, count 0 2006.229.15:00:37.60#ibcon#about to read 6, iclass 25, count 0 2006.229.15:00:37.60#ibcon#read 6, iclass 25, count 0 2006.229.15:00:37.60#ibcon#end of sib2, iclass 25, count 0 2006.229.15:00:37.60#ibcon#*after write, iclass 25, count 0 2006.229.15:00:37.60#ibcon#*before return 0, iclass 25, count 0 2006.229.15:00:37.60#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:37.60#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:37.60#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:00:37.60#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:00:37.60$vck44/va=5,4 2006.229.15:00:37.60#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.15:00:37.60#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.15:00:37.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:37.60#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:37.66#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:37.66#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:37.66#ibcon#enter wrdev, iclass 27, count 2 2006.229.15:00:37.66#ibcon#first serial, iclass 27, count 2 2006.229.15:00:37.66#ibcon#enter sib2, iclass 27, count 2 2006.229.15:00:37.66#ibcon#flushed, iclass 27, count 2 2006.229.15:00:37.66#ibcon#about to write, iclass 27, count 2 2006.229.15:00:37.66#ibcon#wrote, iclass 27, count 2 2006.229.15:00:37.66#ibcon#about to read 3, iclass 27, count 2 2006.229.15:00:37.68#ibcon#read 3, iclass 27, count 2 2006.229.15:00:37.68#ibcon#about to read 4, iclass 27, count 2 2006.229.15:00:37.68#ibcon#read 4, iclass 27, count 2 2006.229.15:00:37.68#ibcon#about to read 5, iclass 27, count 2 2006.229.15:00:37.68#ibcon#read 5, iclass 27, count 2 2006.229.15:00:37.68#ibcon#about to read 6, iclass 27, count 2 2006.229.15:00:37.68#ibcon#read 6, iclass 27, count 2 2006.229.15:00:37.68#ibcon#end of sib2, iclass 27, count 2 2006.229.15:00:37.68#ibcon#*mode == 0, iclass 27, count 2 2006.229.15:00:37.68#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.15:00:37.68#ibcon#[25=AT05-04\r\n] 2006.229.15:00:37.68#ibcon#*before write, iclass 27, count 2 2006.229.15:00:37.68#ibcon#enter sib2, iclass 27, count 2 2006.229.15:00:37.68#ibcon#flushed, iclass 27, count 2 2006.229.15:00:37.68#ibcon#about to write, iclass 27, count 2 2006.229.15:00:37.68#ibcon#wrote, iclass 27, count 2 2006.229.15:00:37.68#ibcon#about to read 3, iclass 27, count 2 2006.229.15:00:37.71#ibcon#read 3, iclass 27, count 2 2006.229.15:00:37.71#ibcon#about to read 4, iclass 27, count 2 2006.229.15:00:37.71#ibcon#read 4, iclass 27, count 2 2006.229.15:00:37.71#ibcon#about to read 5, iclass 27, count 2 2006.229.15:00:37.71#ibcon#read 5, iclass 27, count 2 2006.229.15:00:37.71#ibcon#about to read 6, iclass 27, count 2 2006.229.15:00:37.71#ibcon#read 6, iclass 27, count 2 2006.229.15:00:37.71#ibcon#end of sib2, iclass 27, count 2 2006.229.15:00:37.71#ibcon#*after write, iclass 27, count 2 2006.229.15:00:37.71#ibcon#*before return 0, iclass 27, count 2 2006.229.15:00:37.71#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:37.71#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:37.71#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.15:00:37.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:37.71#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:37.83#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:37.83#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:37.83#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:00:37.83#ibcon#first serial, iclass 27, count 0 2006.229.15:00:37.83#ibcon#enter sib2, iclass 27, count 0 2006.229.15:00:37.83#ibcon#flushed, iclass 27, count 0 2006.229.15:00:37.83#ibcon#about to write, iclass 27, count 0 2006.229.15:00:37.83#ibcon#wrote, iclass 27, count 0 2006.229.15:00:37.83#ibcon#about to read 3, iclass 27, count 0 2006.229.15:00:37.85#ibcon#read 3, iclass 27, count 0 2006.229.15:00:37.85#ibcon#about to read 4, iclass 27, count 0 2006.229.15:00:37.85#ibcon#read 4, iclass 27, count 0 2006.229.15:00:37.85#ibcon#about to read 5, iclass 27, count 0 2006.229.15:00:37.85#ibcon#read 5, iclass 27, count 0 2006.229.15:00:37.85#ibcon#about to read 6, iclass 27, count 0 2006.229.15:00:37.85#ibcon#read 6, iclass 27, count 0 2006.229.15:00:37.85#ibcon#end of sib2, iclass 27, count 0 2006.229.15:00:37.85#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:00:37.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:00:37.85#ibcon#[25=USB\r\n] 2006.229.15:00:37.85#ibcon#*before write, iclass 27, count 0 2006.229.15:00:37.85#ibcon#enter sib2, iclass 27, count 0 2006.229.15:00:37.85#ibcon#flushed, iclass 27, count 0 2006.229.15:00:37.85#ibcon#about to write, iclass 27, count 0 2006.229.15:00:37.85#ibcon#wrote, iclass 27, count 0 2006.229.15:00:37.85#ibcon#about to read 3, iclass 27, count 0 2006.229.15:00:37.88#ibcon#read 3, iclass 27, count 0 2006.229.15:00:37.88#ibcon#about to read 4, iclass 27, count 0 2006.229.15:00:37.88#ibcon#read 4, iclass 27, count 0 2006.229.15:00:37.88#ibcon#about to read 5, iclass 27, count 0 2006.229.15:00:37.88#ibcon#read 5, iclass 27, count 0 2006.229.15:00:37.88#ibcon#about to read 6, iclass 27, count 0 2006.229.15:00:37.88#ibcon#read 6, iclass 27, count 0 2006.229.15:00:37.88#ibcon#end of sib2, iclass 27, count 0 2006.229.15:00:37.88#ibcon#*after write, iclass 27, count 0 2006.229.15:00:37.88#ibcon#*before return 0, iclass 27, count 0 2006.229.15:00:37.88#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:37.88#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:37.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:00:37.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:00:37.88$vck44/valo=6,814.99 2006.229.15:00:37.88#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.15:00:37.88#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.15:00:37.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:37.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:37.88#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:37.88#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:37.88#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:00:37.88#ibcon#first serial, iclass 29, count 0 2006.229.15:00:37.88#ibcon#enter sib2, iclass 29, count 0 2006.229.15:00:37.88#ibcon#flushed, iclass 29, count 0 2006.229.15:00:37.88#ibcon#about to write, iclass 29, count 0 2006.229.15:00:37.88#ibcon#wrote, iclass 29, count 0 2006.229.15:00:37.88#ibcon#about to read 3, iclass 29, count 0 2006.229.15:00:37.90#ibcon#read 3, iclass 29, count 0 2006.229.15:00:37.90#ibcon#about to read 4, iclass 29, count 0 2006.229.15:00:37.90#ibcon#read 4, iclass 29, count 0 2006.229.15:00:37.90#ibcon#about to read 5, iclass 29, count 0 2006.229.15:00:37.90#ibcon#read 5, iclass 29, count 0 2006.229.15:00:37.90#ibcon#about to read 6, iclass 29, count 0 2006.229.15:00:37.90#ibcon#read 6, iclass 29, count 0 2006.229.15:00:37.90#ibcon#end of sib2, iclass 29, count 0 2006.229.15:00:37.90#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:00:37.90#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:00:37.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:00:37.90#ibcon#*before write, iclass 29, count 0 2006.229.15:00:37.90#ibcon#enter sib2, iclass 29, count 0 2006.229.15:00:37.90#ibcon#flushed, iclass 29, count 0 2006.229.15:00:37.90#ibcon#about to write, iclass 29, count 0 2006.229.15:00:37.90#ibcon#wrote, iclass 29, count 0 2006.229.15:00:37.90#ibcon#about to read 3, iclass 29, count 0 2006.229.15:00:37.94#ibcon#read 3, iclass 29, count 0 2006.229.15:00:37.94#ibcon#about to read 4, iclass 29, count 0 2006.229.15:00:37.94#ibcon#read 4, iclass 29, count 0 2006.229.15:00:37.94#ibcon#about to read 5, iclass 29, count 0 2006.229.15:00:37.94#ibcon#read 5, iclass 29, count 0 2006.229.15:00:37.94#ibcon#about to read 6, iclass 29, count 0 2006.229.15:00:37.94#ibcon#read 6, iclass 29, count 0 2006.229.15:00:37.94#ibcon#end of sib2, iclass 29, count 0 2006.229.15:00:37.94#ibcon#*after write, iclass 29, count 0 2006.229.15:00:37.94#ibcon#*before return 0, iclass 29, count 0 2006.229.15:00:37.94#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:37.94#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:37.94#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:00:37.94#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:00:37.94$vck44/va=6,4 2006.229.15:00:37.94#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.15:00:37.94#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.15:00:37.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:37.94#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:38.00#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:38.00#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:38.00#ibcon#enter wrdev, iclass 31, count 2 2006.229.15:00:38.00#ibcon#first serial, iclass 31, count 2 2006.229.15:00:38.00#ibcon#enter sib2, iclass 31, count 2 2006.229.15:00:38.00#ibcon#flushed, iclass 31, count 2 2006.229.15:00:38.00#ibcon#about to write, iclass 31, count 2 2006.229.15:00:38.00#ibcon#wrote, iclass 31, count 2 2006.229.15:00:38.00#ibcon#about to read 3, iclass 31, count 2 2006.229.15:00:38.02#ibcon#read 3, iclass 31, count 2 2006.229.15:00:38.02#ibcon#about to read 4, iclass 31, count 2 2006.229.15:00:38.02#ibcon#read 4, iclass 31, count 2 2006.229.15:00:38.02#ibcon#about to read 5, iclass 31, count 2 2006.229.15:00:38.02#ibcon#read 5, iclass 31, count 2 2006.229.15:00:38.02#ibcon#about to read 6, iclass 31, count 2 2006.229.15:00:38.02#ibcon#read 6, iclass 31, count 2 2006.229.15:00:38.02#ibcon#end of sib2, iclass 31, count 2 2006.229.15:00:38.02#ibcon#*mode == 0, iclass 31, count 2 2006.229.15:00:38.02#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.15:00:38.02#ibcon#[25=AT06-04\r\n] 2006.229.15:00:38.02#ibcon#*before write, iclass 31, count 2 2006.229.15:00:38.02#ibcon#enter sib2, iclass 31, count 2 2006.229.15:00:38.02#ibcon#flushed, iclass 31, count 2 2006.229.15:00:38.02#ibcon#about to write, iclass 31, count 2 2006.229.15:00:38.02#ibcon#wrote, iclass 31, count 2 2006.229.15:00:38.02#ibcon#about to read 3, iclass 31, count 2 2006.229.15:00:38.05#ibcon#read 3, iclass 31, count 2 2006.229.15:00:38.05#ibcon#about to read 4, iclass 31, count 2 2006.229.15:00:38.05#ibcon#read 4, iclass 31, count 2 2006.229.15:00:38.05#ibcon#about to read 5, iclass 31, count 2 2006.229.15:00:38.05#ibcon#read 5, iclass 31, count 2 2006.229.15:00:38.05#ibcon#about to read 6, iclass 31, count 2 2006.229.15:00:38.05#ibcon#read 6, iclass 31, count 2 2006.229.15:00:38.05#ibcon#end of sib2, iclass 31, count 2 2006.229.15:00:38.05#ibcon#*after write, iclass 31, count 2 2006.229.15:00:38.05#ibcon#*before return 0, iclass 31, count 2 2006.229.15:00:38.05#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:38.05#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:38.05#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.15:00:38.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:38.05#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:38.17#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:38.17#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:38.17#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:00:38.17#ibcon#first serial, iclass 31, count 0 2006.229.15:00:38.17#ibcon#enter sib2, iclass 31, count 0 2006.229.15:00:38.17#ibcon#flushed, iclass 31, count 0 2006.229.15:00:38.17#ibcon#about to write, iclass 31, count 0 2006.229.15:00:38.17#ibcon#wrote, iclass 31, count 0 2006.229.15:00:38.17#ibcon#about to read 3, iclass 31, count 0 2006.229.15:00:38.19#ibcon#read 3, iclass 31, count 0 2006.229.15:00:38.19#ibcon#about to read 4, iclass 31, count 0 2006.229.15:00:38.19#ibcon#read 4, iclass 31, count 0 2006.229.15:00:38.19#ibcon#about to read 5, iclass 31, count 0 2006.229.15:00:38.19#ibcon#read 5, iclass 31, count 0 2006.229.15:00:38.19#ibcon#about to read 6, iclass 31, count 0 2006.229.15:00:38.19#ibcon#read 6, iclass 31, count 0 2006.229.15:00:38.19#ibcon#end of sib2, iclass 31, count 0 2006.229.15:00:38.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:00:38.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:00:38.19#ibcon#[25=USB\r\n] 2006.229.15:00:38.19#ibcon#*before write, iclass 31, count 0 2006.229.15:00:38.19#ibcon#enter sib2, iclass 31, count 0 2006.229.15:00:38.19#ibcon#flushed, iclass 31, count 0 2006.229.15:00:38.19#ibcon#about to write, iclass 31, count 0 2006.229.15:00:38.19#ibcon#wrote, iclass 31, count 0 2006.229.15:00:38.19#ibcon#about to read 3, iclass 31, count 0 2006.229.15:00:38.22#ibcon#read 3, iclass 31, count 0 2006.229.15:00:38.22#ibcon#about to read 4, iclass 31, count 0 2006.229.15:00:38.22#ibcon#read 4, iclass 31, count 0 2006.229.15:00:38.22#ibcon#about to read 5, iclass 31, count 0 2006.229.15:00:38.22#ibcon#read 5, iclass 31, count 0 2006.229.15:00:38.22#ibcon#about to read 6, iclass 31, count 0 2006.229.15:00:38.22#ibcon#read 6, iclass 31, count 0 2006.229.15:00:38.22#ibcon#end of sib2, iclass 31, count 0 2006.229.15:00:38.22#ibcon#*after write, iclass 31, count 0 2006.229.15:00:38.22#ibcon#*before return 0, iclass 31, count 0 2006.229.15:00:38.22#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:38.22#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:38.22#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:00:38.22#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:00:38.22$vck44/valo=7,864.99 2006.229.15:00:38.22#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.15:00:38.22#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.15:00:38.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:38.22#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:38.22#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:38.22#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:38.22#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:00:38.22#ibcon#first serial, iclass 33, count 0 2006.229.15:00:38.22#ibcon#enter sib2, iclass 33, count 0 2006.229.15:00:38.22#ibcon#flushed, iclass 33, count 0 2006.229.15:00:38.22#ibcon#about to write, iclass 33, count 0 2006.229.15:00:38.22#ibcon#wrote, iclass 33, count 0 2006.229.15:00:38.22#ibcon#about to read 3, iclass 33, count 0 2006.229.15:00:38.24#ibcon#read 3, iclass 33, count 0 2006.229.15:00:38.24#ibcon#about to read 4, iclass 33, count 0 2006.229.15:00:38.24#ibcon#read 4, iclass 33, count 0 2006.229.15:00:38.24#ibcon#about to read 5, iclass 33, count 0 2006.229.15:00:38.24#ibcon#read 5, iclass 33, count 0 2006.229.15:00:38.24#ibcon#about to read 6, iclass 33, count 0 2006.229.15:00:38.24#ibcon#read 6, iclass 33, count 0 2006.229.15:00:38.24#ibcon#end of sib2, iclass 33, count 0 2006.229.15:00:38.24#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:00:38.24#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:00:38.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:00:38.24#ibcon#*before write, iclass 33, count 0 2006.229.15:00:38.24#ibcon#enter sib2, iclass 33, count 0 2006.229.15:00:38.24#ibcon#flushed, iclass 33, count 0 2006.229.15:00:38.24#ibcon#about to write, iclass 33, count 0 2006.229.15:00:38.24#ibcon#wrote, iclass 33, count 0 2006.229.15:00:38.24#ibcon#about to read 3, iclass 33, count 0 2006.229.15:00:38.28#ibcon#read 3, iclass 33, count 0 2006.229.15:00:38.28#ibcon#about to read 4, iclass 33, count 0 2006.229.15:00:38.28#ibcon#read 4, iclass 33, count 0 2006.229.15:00:38.28#ibcon#about to read 5, iclass 33, count 0 2006.229.15:00:38.28#ibcon#read 5, iclass 33, count 0 2006.229.15:00:38.28#ibcon#about to read 6, iclass 33, count 0 2006.229.15:00:38.28#ibcon#read 6, iclass 33, count 0 2006.229.15:00:38.28#ibcon#end of sib2, iclass 33, count 0 2006.229.15:00:38.28#ibcon#*after write, iclass 33, count 0 2006.229.15:00:38.28#ibcon#*before return 0, iclass 33, count 0 2006.229.15:00:38.28#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:38.28#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:38.28#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:00:38.28#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:00:38.28$vck44/va=7,5 2006.229.15:00:38.28#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.15:00:38.28#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.15:00:38.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:38.28#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:38.34#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:38.34#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:38.34#ibcon#enter wrdev, iclass 35, count 2 2006.229.15:00:38.34#ibcon#first serial, iclass 35, count 2 2006.229.15:00:38.34#ibcon#enter sib2, iclass 35, count 2 2006.229.15:00:38.34#ibcon#flushed, iclass 35, count 2 2006.229.15:00:38.34#ibcon#about to write, iclass 35, count 2 2006.229.15:00:38.34#ibcon#wrote, iclass 35, count 2 2006.229.15:00:38.34#ibcon#about to read 3, iclass 35, count 2 2006.229.15:00:38.36#ibcon#read 3, iclass 35, count 2 2006.229.15:00:38.36#ibcon#about to read 4, iclass 35, count 2 2006.229.15:00:38.36#ibcon#read 4, iclass 35, count 2 2006.229.15:00:38.36#ibcon#about to read 5, iclass 35, count 2 2006.229.15:00:38.36#ibcon#read 5, iclass 35, count 2 2006.229.15:00:38.36#ibcon#about to read 6, iclass 35, count 2 2006.229.15:00:38.36#ibcon#read 6, iclass 35, count 2 2006.229.15:00:38.36#ibcon#end of sib2, iclass 35, count 2 2006.229.15:00:38.36#ibcon#*mode == 0, iclass 35, count 2 2006.229.15:00:38.36#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.15:00:38.36#ibcon#[25=AT07-05\r\n] 2006.229.15:00:38.36#ibcon#*before write, iclass 35, count 2 2006.229.15:00:38.36#ibcon#enter sib2, iclass 35, count 2 2006.229.15:00:38.36#ibcon#flushed, iclass 35, count 2 2006.229.15:00:38.36#ibcon#about to write, iclass 35, count 2 2006.229.15:00:38.36#ibcon#wrote, iclass 35, count 2 2006.229.15:00:38.36#ibcon#about to read 3, iclass 35, count 2 2006.229.15:00:38.39#ibcon#read 3, iclass 35, count 2 2006.229.15:00:38.39#ibcon#about to read 4, iclass 35, count 2 2006.229.15:00:38.39#ibcon#read 4, iclass 35, count 2 2006.229.15:00:38.39#ibcon#about to read 5, iclass 35, count 2 2006.229.15:00:38.39#ibcon#read 5, iclass 35, count 2 2006.229.15:00:38.39#ibcon#about to read 6, iclass 35, count 2 2006.229.15:00:38.39#ibcon#read 6, iclass 35, count 2 2006.229.15:00:38.39#ibcon#end of sib2, iclass 35, count 2 2006.229.15:00:38.39#ibcon#*after write, iclass 35, count 2 2006.229.15:00:38.39#ibcon#*before return 0, iclass 35, count 2 2006.229.15:00:38.39#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:38.39#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:38.39#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.15:00:38.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:38.39#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:38.51#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:38.51#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:38.51#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:00:38.51#ibcon#first serial, iclass 35, count 0 2006.229.15:00:38.51#ibcon#enter sib2, iclass 35, count 0 2006.229.15:00:38.51#ibcon#flushed, iclass 35, count 0 2006.229.15:00:38.51#ibcon#about to write, iclass 35, count 0 2006.229.15:00:38.51#ibcon#wrote, iclass 35, count 0 2006.229.15:00:38.51#ibcon#about to read 3, iclass 35, count 0 2006.229.15:00:38.53#ibcon#read 3, iclass 35, count 0 2006.229.15:00:38.53#ibcon#about to read 4, iclass 35, count 0 2006.229.15:00:38.53#ibcon#read 4, iclass 35, count 0 2006.229.15:00:38.53#ibcon#about to read 5, iclass 35, count 0 2006.229.15:00:38.53#ibcon#read 5, iclass 35, count 0 2006.229.15:00:38.53#ibcon#about to read 6, iclass 35, count 0 2006.229.15:00:38.53#ibcon#read 6, iclass 35, count 0 2006.229.15:00:38.53#ibcon#end of sib2, iclass 35, count 0 2006.229.15:00:38.53#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:00:38.53#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:00:38.53#ibcon#[25=USB\r\n] 2006.229.15:00:38.53#ibcon#*before write, iclass 35, count 0 2006.229.15:00:38.53#ibcon#enter sib2, iclass 35, count 0 2006.229.15:00:38.53#ibcon#flushed, iclass 35, count 0 2006.229.15:00:38.53#ibcon#about to write, iclass 35, count 0 2006.229.15:00:38.53#ibcon#wrote, iclass 35, count 0 2006.229.15:00:38.53#ibcon#about to read 3, iclass 35, count 0 2006.229.15:00:38.56#ibcon#read 3, iclass 35, count 0 2006.229.15:00:38.56#ibcon#about to read 4, iclass 35, count 0 2006.229.15:00:38.56#ibcon#read 4, iclass 35, count 0 2006.229.15:00:38.56#ibcon#about to read 5, iclass 35, count 0 2006.229.15:00:38.56#ibcon#read 5, iclass 35, count 0 2006.229.15:00:38.56#ibcon#about to read 6, iclass 35, count 0 2006.229.15:00:38.56#ibcon#read 6, iclass 35, count 0 2006.229.15:00:38.56#ibcon#end of sib2, iclass 35, count 0 2006.229.15:00:38.56#ibcon#*after write, iclass 35, count 0 2006.229.15:00:38.56#ibcon#*before return 0, iclass 35, count 0 2006.229.15:00:38.56#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:38.56#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:38.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:00:38.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:00:38.56$vck44/valo=8,884.99 2006.229.15:00:38.56#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.15:00:38.56#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.15:00:38.56#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:38.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:38.56#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:38.56#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:38.56#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:00:38.56#ibcon#first serial, iclass 37, count 0 2006.229.15:00:38.56#ibcon#enter sib2, iclass 37, count 0 2006.229.15:00:38.56#ibcon#flushed, iclass 37, count 0 2006.229.15:00:38.56#ibcon#about to write, iclass 37, count 0 2006.229.15:00:38.56#ibcon#wrote, iclass 37, count 0 2006.229.15:00:38.56#ibcon#about to read 3, iclass 37, count 0 2006.229.15:00:38.58#ibcon#read 3, iclass 37, count 0 2006.229.15:00:38.58#ibcon#about to read 4, iclass 37, count 0 2006.229.15:00:38.58#ibcon#read 4, iclass 37, count 0 2006.229.15:00:38.58#ibcon#about to read 5, iclass 37, count 0 2006.229.15:00:38.58#ibcon#read 5, iclass 37, count 0 2006.229.15:00:38.58#ibcon#about to read 6, iclass 37, count 0 2006.229.15:00:38.58#ibcon#read 6, iclass 37, count 0 2006.229.15:00:38.58#ibcon#end of sib2, iclass 37, count 0 2006.229.15:00:38.58#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:00:38.58#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:00:38.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:00:38.58#ibcon#*before write, iclass 37, count 0 2006.229.15:00:38.58#ibcon#enter sib2, iclass 37, count 0 2006.229.15:00:38.58#ibcon#flushed, iclass 37, count 0 2006.229.15:00:38.58#ibcon#about to write, iclass 37, count 0 2006.229.15:00:38.58#ibcon#wrote, iclass 37, count 0 2006.229.15:00:38.58#ibcon#about to read 3, iclass 37, count 0 2006.229.15:00:38.62#ibcon#read 3, iclass 37, count 0 2006.229.15:00:38.62#ibcon#about to read 4, iclass 37, count 0 2006.229.15:00:38.62#ibcon#read 4, iclass 37, count 0 2006.229.15:00:38.62#ibcon#about to read 5, iclass 37, count 0 2006.229.15:00:38.62#ibcon#read 5, iclass 37, count 0 2006.229.15:00:38.62#ibcon#about to read 6, iclass 37, count 0 2006.229.15:00:38.62#ibcon#read 6, iclass 37, count 0 2006.229.15:00:38.62#ibcon#end of sib2, iclass 37, count 0 2006.229.15:00:38.62#ibcon#*after write, iclass 37, count 0 2006.229.15:00:38.62#ibcon#*before return 0, iclass 37, count 0 2006.229.15:00:38.62#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:38.62#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:38.62#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:00:38.62#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:00:38.62$vck44/va=8,6 2006.229.15:00:38.62#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.15:00:38.62#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.15:00:38.62#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:38.62#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:00:38.68#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:00:38.68#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:00:38.68#ibcon#enter wrdev, iclass 39, count 2 2006.229.15:00:38.68#ibcon#first serial, iclass 39, count 2 2006.229.15:00:38.68#ibcon#enter sib2, iclass 39, count 2 2006.229.15:00:38.68#ibcon#flushed, iclass 39, count 2 2006.229.15:00:38.68#ibcon#about to write, iclass 39, count 2 2006.229.15:00:38.68#ibcon#wrote, iclass 39, count 2 2006.229.15:00:38.68#ibcon#about to read 3, iclass 39, count 2 2006.229.15:00:38.70#ibcon#read 3, iclass 39, count 2 2006.229.15:00:38.70#ibcon#about to read 4, iclass 39, count 2 2006.229.15:00:38.70#ibcon#read 4, iclass 39, count 2 2006.229.15:00:38.70#ibcon#about to read 5, iclass 39, count 2 2006.229.15:00:38.70#ibcon#read 5, iclass 39, count 2 2006.229.15:00:38.70#ibcon#about to read 6, iclass 39, count 2 2006.229.15:00:38.70#ibcon#read 6, iclass 39, count 2 2006.229.15:00:38.70#ibcon#end of sib2, iclass 39, count 2 2006.229.15:00:38.70#ibcon#*mode == 0, iclass 39, count 2 2006.229.15:00:38.70#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.15:00:38.70#ibcon#[25=AT08-06\r\n] 2006.229.15:00:38.70#ibcon#*before write, iclass 39, count 2 2006.229.15:00:38.70#ibcon#enter sib2, iclass 39, count 2 2006.229.15:00:38.70#ibcon#flushed, iclass 39, count 2 2006.229.15:00:38.70#ibcon#about to write, iclass 39, count 2 2006.229.15:00:38.70#ibcon#wrote, iclass 39, count 2 2006.229.15:00:38.70#ibcon#about to read 3, iclass 39, count 2 2006.229.15:00:38.73#ibcon#read 3, iclass 39, count 2 2006.229.15:00:38.73#ibcon#about to read 4, iclass 39, count 2 2006.229.15:00:38.73#ibcon#read 4, iclass 39, count 2 2006.229.15:00:38.73#ibcon#about to read 5, iclass 39, count 2 2006.229.15:00:38.73#ibcon#read 5, iclass 39, count 2 2006.229.15:00:38.73#ibcon#about to read 6, iclass 39, count 2 2006.229.15:00:38.73#ibcon#read 6, iclass 39, count 2 2006.229.15:00:38.73#ibcon#end of sib2, iclass 39, count 2 2006.229.15:00:38.73#ibcon#*after write, iclass 39, count 2 2006.229.15:00:38.73#ibcon#*before return 0, iclass 39, count 2 2006.229.15:00:38.73#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:00:38.73#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:00:38.73#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.15:00:38.73#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:38.73#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:00:38.85#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:00:38.85#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:00:38.85#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:00:38.85#ibcon#first serial, iclass 39, count 0 2006.229.15:00:38.85#ibcon#enter sib2, iclass 39, count 0 2006.229.15:00:38.85#ibcon#flushed, iclass 39, count 0 2006.229.15:00:38.85#ibcon#about to write, iclass 39, count 0 2006.229.15:00:38.85#ibcon#wrote, iclass 39, count 0 2006.229.15:00:38.85#ibcon#about to read 3, iclass 39, count 0 2006.229.15:00:38.87#ibcon#read 3, iclass 39, count 0 2006.229.15:00:38.87#ibcon#about to read 4, iclass 39, count 0 2006.229.15:00:38.87#ibcon#read 4, iclass 39, count 0 2006.229.15:00:38.87#ibcon#about to read 5, iclass 39, count 0 2006.229.15:00:38.87#ibcon#read 5, iclass 39, count 0 2006.229.15:00:38.87#ibcon#about to read 6, iclass 39, count 0 2006.229.15:00:38.87#ibcon#read 6, iclass 39, count 0 2006.229.15:00:38.87#ibcon#end of sib2, iclass 39, count 0 2006.229.15:00:38.87#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:00:38.87#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:00:38.87#ibcon#[25=USB\r\n] 2006.229.15:00:38.87#ibcon#*before write, iclass 39, count 0 2006.229.15:00:38.87#ibcon#enter sib2, iclass 39, count 0 2006.229.15:00:38.87#ibcon#flushed, iclass 39, count 0 2006.229.15:00:38.87#ibcon#about to write, iclass 39, count 0 2006.229.15:00:38.87#ibcon#wrote, iclass 39, count 0 2006.229.15:00:38.87#ibcon#about to read 3, iclass 39, count 0 2006.229.15:00:38.90#ibcon#read 3, iclass 39, count 0 2006.229.15:00:38.90#ibcon#about to read 4, iclass 39, count 0 2006.229.15:00:38.90#ibcon#read 4, iclass 39, count 0 2006.229.15:00:38.90#ibcon#about to read 5, iclass 39, count 0 2006.229.15:00:38.90#ibcon#read 5, iclass 39, count 0 2006.229.15:00:38.90#ibcon#about to read 6, iclass 39, count 0 2006.229.15:00:38.90#ibcon#read 6, iclass 39, count 0 2006.229.15:00:38.90#ibcon#end of sib2, iclass 39, count 0 2006.229.15:00:38.90#ibcon#*after write, iclass 39, count 0 2006.229.15:00:38.90#ibcon#*before return 0, iclass 39, count 0 2006.229.15:00:38.90#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:00:38.90#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:00:38.90#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:00:38.90#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:00:38.90$vck44/vblo=1,629.99 2006.229.15:00:38.90#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:00:38.90#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:00:38.90#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:38.90#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:38.90#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:38.90#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:38.90#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:00:38.90#ibcon#first serial, iclass 3, count 0 2006.229.15:00:38.90#ibcon#enter sib2, iclass 3, count 0 2006.229.15:00:38.90#ibcon#flushed, iclass 3, count 0 2006.229.15:00:38.90#ibcon#about to write, iclass 3, count 0 2006.229.15:00:38.90#ibcon#wrote, iclass 3, count 0 2006.229.15:00:38.90#ibcon#about to read 3, iclass 3, count 0 2006.229.15:00:38.92#ibcon#read 3, iclass 3, count 0 2006.229.15:00:38.92#ibcon#about to read 4, iclass 3, count 0 2006.229.15:00:38.92#ibcon#read 4, iclass 3, count 0 2006.229.15:00:38.92#ibcon#about to read 5, iclass 3, count 0 2006.229.15:00:38.92#ibcon#read 5, iclass 3, count 0 2006.229.15:00:38.92#ibcon#about to read 6, iclass 3, count 0 2006.229.15:00:38.92#ibcon#read 6, iclass 3, count 0 2006.229.15:00:38.92#ibcon#end of sib2, iclass 3, count 0 2006.229.15:00:38.92#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:00:38.92#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:00:38.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:00:38.92#ibcon#*before write, iclass 3, count 0 2006.229.15:00:38.92#ibcon#enter sib2, iclass 3, count 0 2006.229.15:00:38.92#ibcon#flushed, iclass 3, count 0 2006.229.15:00:38.92#ibcon#about to write, iclass 3, count 0 2006.229.15:00:38.92#ibcon#wrote, iclass 3, count 0 2006.229.15:00:38.92#ibcon#about to read 3, iclass 3, count 0 2006.229.15:00:38.96#ibcon#read 3, iclass 3, count 0 2006.229.15:00:38.96#ibcon#about to read 4, iclass 3, count 0 2006.229.15:00:38.96#ibcon#read 4, iclass 3, count 0 2006.229.15:00:38.96#ibcon#about to read 5, iclass 3, count 0 2006.229.15:00:38.96#ibcon#read 5, iclass 3, count 0 2006.229.15:00:38.96#ibcon#about to read 6, iclass 3, count 0 2006.229.15:00:38.96#ibcon#read 6, iclass 3, count 0 2006.229.15:00:38.96#ibcon#end of sib2, iclass 3, count 0 2006.229.15:00:38.96#ibcon#*after write, iclass 3, count 0 2006.229.15:00:38.96#ibcon#*before return 0, iclass 3, count 0 2006.229.15:00:38.96#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:38.96#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:00:38.96#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:00:38.96#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:00:38.96$vck44/vb=1,4 2006.229.15:00:38.96#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.15:00:38.96#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.15:00:38.96#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:38.96#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:38.96#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:38.96#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:38.96#ibcon#enter wrdev, iclass 5, count 2 2006.229.15:00:38.96#ibcon#first serial, iclass 5, count 2 2006.229.15:00:38.96#ibcon#enter sib2, iclass 5, count 2 2006.229.15:00:38.96#ibcon#flushed, iclass 5, count 2 2006.229.15:00:38.96#ibcon#about to write, iclass 5, count 2 2006.229.15:00:38.96#ibcon#wrote, iclass 5, count 2 2006.229.15:00:38.96#ibcon#about to read 3, iclass 5, count 2 2006.229.15:00:38.98#ibcon#read 3, iclass 5, count 2 2006.229.15:00:38.98#ibcon#about to read 4, iclass 5, count 2 2006.229.15:00:38.98#ibcon#read 4, iclass 5, count 2 2006.229.15:00:38.98#ibcon#about to read 5, iclass 5, count 2 2006.229.15:00:38.98#ibcon#read 5, iclass 5, count 2 2006.229.15:00:38.98#ibcon#about to read 6, iclass 5, count 2 2006.229.15:00:38.98#ibcon#read 6, iclass 5, count 2 2006.229.15:00:38.98#ibcon#end of sib2, iclass 5, count 2 2006.229.15:00:38.98#ibcon#*mode == 0, iclass 5, count 2 2006.229.15:00:38.98#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.15:00:38.98#ibcon#[27=AT01-04\r\n] 2006.229.15:00:38.98#ibcon#*before write, iclass 5, count 2 2006.229.15:00:38.98#ibcon#enter sib2, iclass 5, count 2 2006.229.15:00:38.98#ibcon#flushed, iclass 5, count 2 2006.229.15:00:38.98#ibcon#about to write, iclass 5, count 2 2006.229.15:00:38.98#ibcon#wrote, iclass 5, count 2 2006.229.15:00:38.98#ibcon#about to read 3, iclass 5, count 2 2006.229.15:00:39.01#ibcon#read 3, iclass 5, count 2 2006.229.15:00:39.01#ibcon#about to read 4, iclass 5, count 2 2006.229.15:00:39.01#ibcon#read 4, iclass 5, count 2 2006.229.15:00:39.01#ibcon#about to read 5, iclass 5, count 2 2006.229.15:00:39.01#ibcon#read 5, iclass 5, count 2 2006.229.15:00:39.01#ibcon#about to read 6, iclass 5, count 2 2006.229.15:00:39.01#ibcon#read 6, iclass 5, count 2 2006.229.15:00:39.01#ibcon#end of sib2, iclass 5, count 2 2006.229.15:00:39.01#ibcon#*after write, iclass 5, count 2 2006.229.15:00:39.01#ibcon#*before return 0, iclass 5, count 2 2006.229.15:00:39.01#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:39.01#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:00:39.01#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.15:00:39.01#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:39.01#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:39.13#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:39.13#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:39.13#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:00:39.13#ibcon#first serial, iclass 5, count 0 2006.229.15:00:39.13#ibcon#enter sib2, iclass 5, count 0 2006.229.15:00:39.13#ibcon#flushed, iclass 5, count 0 2006.229.15:00:39.13#ibcon#about to write, iclass 5, count 0 2006.229.15:00:39.13#ibcon#wrote, iclass 5, count 0 2006.229.15:00:39.13#ibcon#about to read 3, iclass 5, count 0 2006.229.15:00:39.15#ibcon#read 3, iclass 5, count 0 2006.229.15:00:39.15#ibcon#about to read 4, iclass 5, count 0 2006.229.15:00:39.15#ibcon#read 4, iclass 5, count 0 2006.229.15:00:39.15#ibcon#about to read 5, iclass 5, count 0 2006.229.15:00:39.15#ibcon#read 5, iclass 5, count 0 2006.229.15:00:39.15#ibcon#about to read 6, iclass 5, count 0 2006.229.15:00:39.15#ibcon#read 6, iclass 5, count 0 2006.229.15:00:39.15#ibcon#end of sib2, iclass 5, count 0 2006.229.15:00:39.15#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:00:39.15#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:00:39.15#ibcon#[27=USB\r\n] 2006.229.15:00:39.15#ibcon#*before write, iclass 5, count 0 2006.229.15:00:39.15#ibcon#enter sib2, iclass 5, count 0 2006.229.15:00:39.15#ibcon#flushed, iclass 5, count 0 2006.229.15:00:39.15#ibcon#about to write, iclass 5, count 0 2006.229.15:00:39.15#ibcon#wrote, iclass 5, count 0 2006.229.15:00:39.15#ibcon#about to read 3, iclass 5, count 0 2006.229.15:00:39.18#ibcon#read 3, iclass 5, count 0 2006.229.15:00:39.18#ibcon#about to read 4, iclass 5, count 0 2006.229.15:00:39.18#ibcon#read 4, iclass 5, count 0 2006.229.15:00:39.18#ibcon#about to read 5, iclass 5, count 0 2006.229.15:00:39.18#ibcon#read 5, iclass 5, count 0 2006.229.15:00:39.18#ibcon#about to read 6, iclass 5, count 0 2006.229.15:00:39.18#ibcon#read 6, iclass 5, count 0 2006.229.15:00:39.18#ibcon#end of sib2, iclass 5, count 0 2006.229.15:00:39.18#ibcon#*after write, iclass 5, count 0 2006.229.15:00:39.18#ibcon#*before return 0, iclass 5, count 0 2006.229.15:00:39.18#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:39.18#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:00:39.18#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:00:39.18#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:00:39.18$vck44/vblo=2,634.99 2006.229.15:00:39.18#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.15:00:39.18#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.15:00:39.18#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:39.18#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:39.18#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:39.18#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:39.18#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:00:39.18#ibcon#first serial, iclass 7, count 0 2006.229.15:00:39.18#ibcon#enter sib2, iclass 7, count 0 2006.229.15:00:39.18#ibcon#flushed, iclass 7, count 0 2006.229.15:00:39.18#ibcon#about to write, iclass 7, count 0 2006.229.15:00:39.18#ibcon#wrote, iclass 7, count 0 2006.229.15:00:39.18#ibcon#about to read 3, iclass 7, count 0 2006.229.15:00:39.20#ibcon#read 3, iclass 7, count 0 2006.229.15:00:39.20#ibcon#about to read 4, iclass 7, count 0 2006.229.15:00:39.20#ibcon#read 4, iclass 7, count 0 2006.229.15:00:39.20#ibcon#about to read 5, iclass 7, count 0 2006.229.15:00:39.20#ibcon#read 5, iclass 7, count 0 2006.229.15:00:39.20#ibcon#about to read 6, iclass 7, count 0 2006.229.15:00:39.20#ibcon#read 6, iclass 7, count 0 2006.229.15:00:39.20#ibcon#end of sib2, iclass 7, count 0 2006.229.15:00:39.20#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:00:39.20#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:00:39.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:00:39.20#ibcon#*before write, iclass 7, count 0 2006.229.15:00:39.20#ibcon#enter sib2, iclass 7, count 0 2006.229.15:00:39.20#ibcon#flushed, iclass 7, count 0 2006.229.15:00:39.20#ibcon#about to write, iclass 7, count 0 2006.229.15:00:39.20#ibcon#wrote, iclass 7, count 0 2006.229.15:00:39.20#ibcon#about to read 3, iclass 7, count 0 2006.229.15:00:39.24#ibcon#read 3, iclass 7, count 0 2006.229.15:00:39.24#ibcon#about to read 4, iclass 7, count 0 2006.229.15:00:39.24#ibcon#read 4, iclass 7, count 0 2006.229.15:00:39.24#ibcon#about to read 5, iclass 7, count 0 2006.229.15:00:39.24#ibcon#read 5, iclass 7, count 0 2006.229.15:00:39.24#ibcon#about to read 6, iclass 7, count 0 2006.229.15:00:39.24#ibcon#read 6, iclass 7, count 0 2006.229.15:00:39.24#ibcon#end of sib2, iclass 7, count 0 2006.229.15:00:39.24#ibcon#*after write, iclass 7, count 0 2006.229.15:00:39.24#ibcon#*before return 0, iclass 7, count 0 2006.229.15:00:39.24#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:39.24#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:00:39.24#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:00:39.24#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:00:39.24$vck44/vb=2,4 2006.229.15:00:39.24#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.15:00:39.24#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.15:00:39.24#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:39.24#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:39.30#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:39.30#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:39.30#ibcon#enter wrdev, iclass 11, count 2 2006.229.15:00:39.30#ibcon#first serial, iclass 11, count 2 2006.229.15:00:39.30#ibcon#enter sib2, iclass 11, count 2 2006.229.15:00:39.30#ibcon#flushed, iclass 11, count 2 2006.229.15:00:39.30#ibcon#about to write, iclass 11, count 2 2006.229.15:00:39.30#ibcon#wrote, iclass 11, count 2 2006.229.15:00:39.30#ibcon#about to read 3, iclass 11, count 2 2006.229.15:00:39.32#ibcon#read 3, iclass 11, count 2 2006.229.15:00:39.32#ibcon#about to read 4, iclass 11, count 2 2006.229.15:00:39.32#ibcon#read 4, iclass 11, count 2 2006.229.15:00:39.32#ibcon#about to read 5, iclass 11, count 2 2006.229.15:00:39.32#ibcon#read 5, iclass 11, count 2 2006.229.15:00:39.32#ibcon#about to read 6, iclass 11, count 2 2006.229.15:00:39.32#ibcon#read 6, iclass 11, count 2 2006.229.15:00:39.32#ibcon#end of sib2, iclass 11, count 2 2006.229.15:00:39.32#ibcon#*mode == 0, iclass 11, count 2 2006.229.15:00:39.32#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.15:00:39.32#ibcon#[27=AT02-04\r\n] 2006.229.15:00:39.32#ibcon#*before write, iclass 11, count 2 2006.229.15:00:39.32#ibcon#enter sib2, iclass 11, count 2 2006.229.15:00:39.32#ibcon#flushed, iclass 11, count 2 2006.229.15:00:39.32#ibcon#about to write, iclass 11, count 2 2006.229.15:00:39.32#ibcon#wrote, iclass 11, count 2 2006.229.15:00:39.32#ibcon#about to read 3, iclass 11, count 2 2006.229.15:00:39.35#ibcon#read 3, iclass 11, count 2 2006.229.15:00:39.35#ibcon#about to read 4, iclass 11, count 2 2006.229.15:00:39.35#ibcon#read 4, iclass 11, count 2 2006.229.15:00:39.35#ibcon#about to read 5, iclass 11, count 2 2006.229.15:00:39.35#ibcon#read 5, iclass 11, count 2 2006.229.15:00:39.35#ibcon#about to read 6, iclass 11, count 2 2006.229.15:00:39.35#ibcon#read 6, iclass 11, count 2 2006.229.15:00:39.35#ibcon#end of sib2, iclass 11, count 2 2006.229.15:00:39.35#ibcon#*after write, iclass 11, count 2 2006.229.15:00:39.35#ibcon#*before return 0, iclass 11, count 2 2006.229.15:00:39.35#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:39.35#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:00:39.35#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.15:00:39.35#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:39.35#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:39.47#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:39.47#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:39.47#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:00:39.47#ibcon#first serial, iclass 11, count 0 2006.229.15:00:39.47#ibcon#enter sib2, iclass 11, count 0 2006.229.15:00:39.47#ibcon#flushed, iclass 11, count 0 2006.229.15:00:39.47#ibcon#about to write, iclass 11, count 0 2006.229.15:00:39.47#ibcon#wrote, iclass 11, count 0 2006.229.15:00:39.47#ibcon#about to read 3, iclass 11, count 0 2006.229.15:00:39.49#ibcon#read 3, iclass 11, count 0 2006.229.15:00:39.49#ibcon#about to read 4, iclass 11, count 0 2006.229.15:00:39.49#ibcon#read 4, iclass 11, count 0 2006.229.15:00:39.49#ibcon#about to read 5, iclass 11, count 0 2006.229.15:00:39.49#ibcon#read 5, iclass 11, count 0 2006.229.15:00:39.49#ibcon#about to read 6, iclass 11, count 0 2006.229.15:00:39.49#ibcon#read 6, iclass 11, count 0 2006.229.15:00:39.49#ibcon#end of sib2, iclass 11, count 0 2006.229.15:00:39.49#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:00:39.49#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:00:39.49#ibcon#[27=USB\r\n] 2006.229.15:00:39.49#ibcon#*before write, iclass 11, count 0 2006.229.15:00:39.49#ibcon#enter sib2, iclass 11, count 0 2006.229.15:00:39.49#ibcon#flushed, iclass 11, count 0 2006.229.15:00:39.49#ibcon#about to write, iclass 11, count 0 2006.229.15:00:39.49#ibcon#wrote, iclass 11, count 0 2006.229.15:00:39.49#ibcon#about to read 3, iclass 11, count 0 2006.229.15:00:39.52#ibcon#read 3, iclass 11, count 0 2006.229.15:00:39.52#ibcon#about to read 4, iclass 11, count 0 2006.229.15:00:39.52#ibcon#read 4, iclass 11, count 0 2006.229.15:00:39.52#ibcon#about to read 5, iclass 11, count 0 2006.229.15:00:39.52#ibcon#read 5, iclass 11, count 0 2006.229.15:00:39.52#ibcon#about to read 6, iclass 11, count 0 2006.229.15:00:39.52#ibcon#read 6, iclass 11, count 0 2006.229.15:00:39.52#ibcon#end of sib2, iclass 11, count 0 2006.229.15:00:39.52#ibcon#*after write, iclass 11, count 0 2006.229.15:00:39.52#ibcon#*before return 0, iclass 11, count 0 2006.229.15:00:39.52#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:39.52#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:00:39.52#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:00:39.52#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:00:39.52$vck44/vblo=3,649.99 2006.229.15:00:39.52#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.15:00:39.52#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.15:00:39.52#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:39.52#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:39.52#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:39.52#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:39.52#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:00:39.52#ibcon#first serial, iclass 13, count 0 2006.229.15:00:39.52#ibcon#enter sib2, iclass 13, count 0 2006.229.15:00:39.52#ibcon#flushed, iclass 13, count 0 2006.229.15:00:39.52#ibcon#about to write, iclass 13, count 0 2006.229.15:00:39.52#ibcon#wrote, iclass 13, count 0 2006.229.15:00:39.52#ibcon#about to read 3, iclass 13, count 0 2006.229.15:00:39.54#ibcon#read 3, iclass 13, count 0 2006.229.15:00:39.54#ibcon#about to read 4, iclass 13, count 0 2006.229.15:00:39.54#ibcon#read 4, iclass 13, count 0 2006.229.15:00:39.54#ibcon#about to read 5, iclass 13, count 0 2006.229.15:00:39.54#ibcon#read 5, iclass 13, count 0 2006.229.15:00:39.54#ibcon#about to read 6, iclass 13, count 0 2006.229.15:00:39.54#ibcon#read 6, iclass 13, count 0 2006.229.15:00:39.54#ibcon#end of sib2, iclass 13, count 0 2006.229.15:00:39.54#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:00:39.54#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:00:39.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:00:39.54#ibcon#*before write, iclass 13, count 0 2006.229.15:00:39.54#ibcon#enter sib2, iclass 13, count 0 2006.229.15:00:39.54#ibcon#flushed, iclass 13, count 0 2006.229.15:00:39.54#ibcon#about to write, iclass 13, count 0 2006.229.15:00:39.54#ibcon#wrote, iclass 13, count 0 2006.229.15:00:39.54#ibcon#about to read 3, iclass 13, count 0 2006.229.15:00:39.58#ibcon#read 3, iclass 13, count 0 2006.229.15:00:39.58#ibcon#about to read 4, iclass 13, count 0 2006.229.15:00:39.58#ibcon#read 4, iclass 13, count 0 2006.229.15:00:39.58#ibcon#about to read 5, iclass 13, count 0 2006.229.15:00:39.58#ibcon#read 5, iclass 13, count 0 2006.229.15:00:39.58#ibcon#about to read 6, iclass 13, count 0 2006.229.15:00:39.58#ibcon#read 6, iclass 13, count 0 2006.229.15:00:39.58#ibcon#end of sib2, iclass 13, count 0 2006.229.15:00:39.58#ibcon#*after write, iclass 13, count 0 2006.229.15:00:39.58#ibcon#*before return 0, iclass 13, count 0 2006.229.15:00:39.58#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:39.58#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:00:39.58#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:00:39.58#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:00:39.58$vck44/vb=3,4 2006.229.15:00:39.58#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.15:00:39.58#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.15:00:39.58#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:39.58#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:39.64#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:39.64#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:39.64#ibcon#enter wrdev, iclass 15, count 2 2006.229.15:00:39.64#ibcon#first serial, iclass 15, count 2 2006.229.15:00:39.64#ibcon#enter sib2, iclass 15, count 2 2006.229.15:00:39.64#ibcon#flushed, iclass 15, count 2 2006.229.15:00:39.64#ibcon#about to write, iclass 15, count 2 2006.229.15:00:39.64#ibcon#wrote, iclass 15, count 2 2006.229.15:00:39.64#ibcon#about to read 3, iclass 15, count 2 2006.229.15:00:39.66#ibcon#read 3, iclass 15, count 2 2006.229.15:00:39.66#ibcon#about to read 4, iclass 15, count 2 2006.229.15:00:39.66#ibcon#read 4, iclass 15, count 2 2006.229.15:00:39.66#ibcon#about to read 5, iclass 15, count 2 2006.229.15:00:39.66#ibcon#read 5, iclass 15, count 2 2006.229.15:00:39.66#ibcon#about to read 6, iclass 15, count 2 2006.229.15:00:39.66#ibcon#read 6, iclass 15, count 2 2006.229.15:00:39.66#ibcon#end of sib2, iclass 15, count 2 2006.229.15:00:39.66#ibcon#*mode == 0, iclass 15, count 2 2006.229.15:00:39.66#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.15:00:39.66#ibcon#[27=AT03-04\r\n] 2006.229.15:00:39.66#ibcon#*before write, iclass 15, count 2 2006.229.15:00:39.66#ibcon#enter sib2, iclass 15, count 2 2006.229.15:00:39.66#ibcon#flushed, iclass 15, count 2 2006.229.15:00:39.66#ibcon#about to write, iclass 15, count 2 2006.229.15:00:39.66#ibcon#wrote, iclass 15, count 2 2006.229.15:00:39.66#ibcon#about to read 3, iclass 15, count 2 2006.229.15:00:39.69#ibcon#read 3, iclass 15, count 2 2006.229.15:00:39.69#ibcon#about to read 4, iclass 15, count 2 2006.229.15:00:39.69#ibcon#read 4, iclass 15, count 2 2006.229.15:00:39.69#ibcon#about to read 5, iclass 15, count 2 2006.229.15:00:39.69#ibcon#read 5, iclass 15, count 2 2006.229.15:00:39.69#ibcon#about to read 6, iclass 15, count 2 2006.229.15:00:39.69#ibcon#read 6, iclass 15, count 2 2006.229.15:00:39.69#ibcon#end of sib2, iclass 15, count 2 2006.229.15:00:39.69#ibcon#*after write, iclass 15, count 2 2006.229.15:00:39.69#ibcon#*before return 0, iclass 15, count 2 2006.229.15:00:39.69#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:39.69#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:00:39.69#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.15:00:39.69#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:39.69#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:39.81#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:39.81#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:39.81#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:00:39.81#ibcon#first serial, iclass 15, count 0 2006.229.15:00:39.81#ibcon#enter sib2, iclass 15, count 0 2006.229.15:00:39.81#ibcon#flushed, iclass 15, count 0 2006.229.15:00:39.81#ibcon#about to write, iclass 15, count 0 2006.229.15:00:39.81#ibcon#wrote, iclass 15, count 0 2006.229.15:00:39.81#ibcon#about to read 3, iclass 15, count 0 2006.229.15:00:39.83#ibcon#read 3, iclass 15, count 0 2006.229.15:00:39.83#ibcon#about to read 4, iclass 15, count 0 2006.229.15:00:39.83#ibcon#read 4, iclass 15, count 0 2006.229.15:00:39.83#ibcon#about to read 5, iclass 15, count 0 2006.229.15:00:39.83#ibcon#read 5, iclass 15, count 0 2006.229.15:00:39.83#ibcon#about to read 6, iclass 15, count 0 2006.229.15:00:39.83#ibcon#read 6, iclass 15, count 0 2006.229.15:00:39.83#ibcon#end of sib2, iclass 15, count 0 2006.229.15:00:39.83#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:00:39.83#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:00:39.83#ibcon#[27=USB\r\n] 2006.229.15:00:39.83#ibcon#*before write, iclass 15, count 0 2006.229.15:00:39.83#ibcon#enter sib2, iclass 15, count 0 2006.229.15:00:39.83#ibcon#flushed, iclass 15, count 0 2006.229.15:00:39.83#ibcon#about to write, iclass 15, count 0 2006.229.15:00:39.83#ibcon#wrote, iclass 15, count 0 2006.229.15:00:39.83#ibcon#about to read 3, iclass 15, count 0 2006.229.15:00:39.86#ibcon#read 3, iclass 15, count 0 2006.229.15:00:39.86#ibcon#about to read 4, iclass 15, count 0 2006.229.15:00:39.86#ibcon#read 4, iclass 15, count 0 2006.229.15:00:39.86#ibcon#about to read 5, iclass 15, count 0 2006.229.15:00:39.86#ibcon#read 5, iclass 15, count 0 2006.229.15:00:39.86#ibcon#about to read 6, iclass 15, count 0 2006.229.15:00:39.86#ibcon#read 6, iclass 15, count 0 2006.229.15:00:39.86#ibcon#end of sib2, iclass 15, count 0 2006.229.15:00:39.86#ibcon#*after write, iclass 15, count 0 2006.229.15:00:39.86#ibcon#*before return 0, iclass 15, count 0 2006.229.15:00:39.86#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:39.86#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:00:39.86#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:00:39.86#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:00:39.86$vck44/vblo=4,679.99 2006.229.15:00:39.86#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.15:00:39.86#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.15:00:39.86#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:39.86#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:39.86#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:39.86#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:39.86#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:00:39.86#ibcon#first serial, iclass 17, count 0 2006.229.15:00:39.86#ibcon#enter sib2, iclass 17, count 0 2006.229.15:00:39.86#ibcon#flushed, iclass 17, count 0 2006.229.15:00:39.86#ibcon#about to write, iclass 17, count 0 2006.229.15:00:39.86#ibcon#wrote, iclass 17, count 0 2006.229.15:00:39.86#ibcon#about to read 3, iclass 17, count 0 2006.229.15:00:39.88#ibcon#read 3, iclass 17, count 0 2006.229.15:00:39.88#ibcon#about to read 4, iclass 17, count 0 2006.229.15:00:39.88#ibcon#read 4, iclass 17, count 0 2006.229.15:00:39.88#ibcon#about to read 5, iclass 17, count 0 2006.229.15:00:39.88#ibcon#read 5, iclass 17, count 0 2006.229.15:00:39.88#ibcon#about to read 6, iclass 17, count 0 2006.229.15:00:39.88#ibcon#read 6, iclass 17, count 0 2006.229.15:00:39.88#ibcon#end of sib2, iclass 17, count 0 2006.229.15:00:39.88#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:00:39.88#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:00:39.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:00:39.88#ibcon#*before write, iclass 17, count 0 2006.229.15:00:39.88#ibcon#enter sib2, iclass 17, count 0 2006.229.15:00:39.88#ibcon#flushed, iclass 17, count 0 2006.229.15:00:39.88#ibcon#about to write, iclass 17, count 0 2006.229.15:00:39.88#ibcon#wrote, iclass 17, count 0 2006.229.15:00:39.88#ibcon#about to read 3, iclass 17, count 0 2006.229.15:00:39.92#ibcon#read 3, iclass 17, count 0 2006.229.15:00:39.92#ibcon#about to read 4, iclass 17, count 0 2006.229.15:00:39.92#ibcon#read 4, iclass 17, count 0 2006.229.15:00:39.92#ibcon#about to read 5, iclass 17, count 0 2006.229.15:00:39.92#ibcon#read 5, iclass 17, count 0 2006.229.15:00:39.92#ibcon#about to read 6, iclass 17, count 0 2006.229.15:00:39.92#ibcon#read 6, iclass 17, count 0 2006.229.15:00:39.92#ibcon#end of sib2, iclass 17, count 0 2006.229.15:00:39.92#ibcon#*after write, iclass 17, count 0 2006.229.15:00:39.92#ibcon#*before return 0, iclass 17, count 0 2006.229.15:00:39.92#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:39.92#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:00:39.92#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:00:39.92#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:00:39.92$vck44/vb=4,4 2006.229.15:00:39.92#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.15:00:39.92#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.15:00:39.92#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:39.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:00:39.98#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:00:39.98#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:00:39.98#ibcon#enter wrdev, iclass 19, count 2 2006.229.15:00:39.98#ibcon#first serial, iclass 19, count 2 2006.229.15:00:39.98#ibcon#enter sib2, iclass 19, count 2 2006.229.15:00:39.98#ibcon#flushed, iclass 19, count 2 2006.229.15:00:39.98#ibcon#about to write, iclass 19, count 2 2006.229.15:00:39.98#ibcon#wrote, iclass 19, count 2 2006.229.15:00:39.98#ibcon#about to read 3, iclass 19, count 2 2006.229.15:00:40.00#ibcon#read 3, iclass 19, count 2 2006.229.15:00:40.00#ibcon#about to read 4, iclass 19, count 2 2006.229.15:00:40.00#ibcon#read 4, iclass 19, count 2 2006.229.15:00:40.00#ibcon#about to read 5, iclass 19, count 2 2006.229.15:00:40.00#ibcon#read 5, iclass 19, count 2 2006.229.15:00:40.00#ibcon#about to read 6, iclass 19, count 2 2006.229.15:00:40.00#ibcon#read 6, iclass 19, count 2 2006.229.15:00:40.00#ibcon#end of sib2, iclass 19, count 2 2006.229.15:00:40.00#ibcon#*mode == 0, iclass 19, count 2 2006.229.15:00:40.00#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.15:00:40.00#ibcon#[27=AT04-04\r\n] 2006.229.15:00:40.00#ibcon#*before write, iclass 19, count 2 2006.229.15:00:40.00#ibcon#enter sib2, iclass 19, count 2 2006.229.15:00:40.00#ibcon#flushed, iclass 19, count 2 2006.229.15:00:40.00#ibcon#about to write, iclass 19, count 2 2006.229.15:00:40.00#ibcon#wrote, iclass 19, count 2 2006.229.15:00:40.00#ibcon#about to read 3, iclass 19, count 2 2006.229.15:00:40.03#ibcon#read 3, iclass 19, count 2 2006.229.15:00:40.03#ibcon#about to read 4, iclass 19, count 2 2006.229.15:00:40.03#ibcon#read 4, iclass 19, count 2 2006.229.15:00:40.03#ibcon#about to read 5, iclass 19, count 2 2006.229.15:00:40.03#ibcon#read 5, iclass 19, count 2 2006.229.15:00:40.03#ibcon#about to read 6, iclass 19, count 2 2006.229.15:00:40.03#ibcon#read 6, iclass 19, count 2 2006.229.15:00:40.03#ibcon#end of sib2, iclass 19, count 2 2006.229.15:00:40.03#ibcon#*after write, iclass 19, count 2 2006.229.15:00:40.03#ibcon#*before return 0, iclass 19, count 2 2006.229.15:00:40.03#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:00:40.03#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:00:40.03#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.15:00:40.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:40.03#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:00:40.15#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:00:40.15#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:00:40.15#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:00:40.15#ibcon#first serial, iclass 19, count 0 2006.229.15:00:40.15#ibcon#enter sib2, iclass 19, count 0 2006.229.15:00:40.15#ibcon#flushed, iclass 19, count 0 2006.229.15:00:40.15#ibcon#about to write, iclass 19, count 0 2006.229.15:00:40.15#ibcon#wrote, iclass 19, count 0 2006.229.15:00:40.15#ibcon#about to read 3, iclass 19, count 0 2006.229.15:00:40.17#ibcon#read 3, iclass 19, count 0 2006.229.15:00:40.17#ibcon#about to read 4, iclass 19, count 0 2006.229.15:00:40.17#ibcon#read 4, iclass 19, count 0 2006.229.15:00:40.17#ibcon#about to read 5, iclass 19, count 0 2006.229.15:00:40.17#ibcon#read 5, iclass 19, count 0 2006.229.15:00:40.17#ibcon#about to read 6, iclass 19, count 0 2006.229.15:00:40.17#ibcon#read 6, iclass 19, count 0 2006.229.15:00:40.17#ibcon#end of sib2, iclass 19, count 0 2006.229.15:00:40.17#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:00:40.17#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:00:40.17#ibcon#[27=USB\r\n] 2006.229.15:00:40.17#ibcon#*before write, iclass 19, count 0 2006.229.15:00:40.17#ibcon#enter sib2, iclass 19, count 0 2006.229.15:00:40.17#ibcon#flushed, iclass 19, count 0 2006.229.15:00:40.17#ibcon#about to write, iclass 19, count 0 2006.229.15:00:40.17#ibcon#wrote, iclass 19, count 0 2006.229.15:00:40.17#ibcon#about to read 3, iclass 19, count 0 2006.229.15:00:40.20#ibcon#read 3, iclass 19, count 0 2006.229.15:00:40.20#ibcon#about to read 4, iclass 19, count 0 2006.229.15:00:40.20#ibcon#read 4, iclass 19, count 0 2006.229.15:00:40.20#ibcon#about to read 5, iclass 19, count 0 2006.229.15:00:40.20#ibcon#read 5, iclass 19, count 0 2006.229.15:00:40.20#ibcon#about to read 6, iclass 19, count 0 2006.229.15:00:40.20#ibcon#read 6, iclass 19, count 0 2006.229.15:00:40.20#ibcon#end of sib2, iclass 19, count 0 2006.229.15:00:40.20#ibcon#*after write, iclass 19, count 0 2006.229.15:00:40.20#ibcon#*before return 0, iclass 19, count 0 2006.229.15:00:40.20#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:00:40.20#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:00:40.20#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:00:40.20#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:00:40.20$vck44/vblo=5,709.99 2006.229.15:00:40.20#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.15:00:40.20#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.15:00:40.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:40.20#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:00:40.20#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:00:40.20#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:00:40.20#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:00:40.20#ibcon#first serial, iclass 21, count 0 2006.229.15:00:40.20#ibcon#enter sib2, iclass 21, count 0 2006.229.15:00:40.20#ibcon#flushed, iclass 21, count 0 2006.229.15:00:40.20#ibcon#about to write, iclass 21, count 0 2006.229.15:00:40.20#ibcon#wrote, iclass 21, count 0 2006.229.15:00:40.20#ibcon#about to read 3, iclass 21, count 0 2006.229.15:00:40.22#ibcon#read 3, iclass 21, count 0 2006.229.15:00:40.22#ibcon#about to read 4, iclass 21, count 0 2006.229.15:00:40.22#ibcon#read 4, iclass 21, count 0 2006.229.15:00:40.22#ibcon#about to read 5, iclass 21, count 0 2006.229.15:00:40.22#ibcon#read 5, iclass 21, count 0 2006.229.15:00:40.22#ibcon#about to read 6, iclass 21, count 0 2006.229.15:00:40.22#ibcon#read 6, iclass 21, count 0 2006.229.15:00:40.22#ibcon#end of sib2, iclass 21, count 0 2006.229.15:00:40.22#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:00:40.22#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:00:40.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:00:40.22#ibcon#*before write, iclass 21, count 0 2006.229.15:00:40.22#ibcon#enter sib2, iclass 21, count 0 2006.229.15:00:40.22#ibcon#flushed, iclass 21, count 0 2006.229.15:00:40.22#ibcon#about to write, iclass 21, count 0 2006.229.15:00:40.22#ibcon#wrote, iclass 21, count 0 2006.229.15:00:40.22#ibcon#about to read 3, iclass 21, count 0 2006.229.15:00:40.26#ibcon#read 3, iclass 21, count 0 2006.229.15:00:40.26#ibcon#about to read 4, iclass 21, count 0 2006.229.15:00:40.26#ibcon#read 4, iclass 21, count 0 2006.229.15:00:40.26#ibcon#about to read 5, iclass 21, count 0 2006.229.15:00:40.26#ibcon#read 5, iclass 21, count 0 2006.229.15:00:40.26#ibcon#about to read 6, iclass 21, count 0 2006.229.15:00:40.26#ibcon#read 6, iclass 21, count 0 2006.229.15:00:40.26#ibcon#end of sib2, iclass 21, count 0 2006.229.15:00:40.26#ibcon#*after write, iclass 21, count 0 2006.229.15:00:40.26#ibcon#*before return 0, iclass 21, count 0 2006.229.15:00:40.26#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:00:40.26#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:00:40.26#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:00:40.26#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:00:40.26$vck44/vb=5,4 2006.229.15:00:40.26#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.15:00:40.26#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.15:00:40.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:40.26#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:00:40.32#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:00:40.32#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:00:40.32#ibcon#enter wrdev, iclass 23, count 2 2006.229.15:00:40.32#ibcon#first serial, iclass 23, count 2 2006.229.15:00:40.32#ibcon#enter sib2, iclass 23, count 2 2006.229.15:00:40.32#ibcon#flushed, iclass 23, count 2 2006.229.15:00:40.32#ibcon#about to write, iclass 23, count 2 2006.229.15:00:40.32#ibcon#wrote, iclass 23, count 2 2006.229.15:00:40.32#ibcon#about to read 3, iclass 23, count 2 2006.229.15:00:40.34#ibcon#read 3, iclass 23, count 2 2006.229.15:00:40.34#ibcon#about to read 4, iclass 23, count 2 2006.229.15:00:40.34#ibcon#read 4, iclass 23, count 2 2006.229.15:00:40.34#ibcon#about to read 5, iclass 23, count 2 2006.229.15:00:40.34#ibcon#read 5, iclass 23, count 2 2006.229.15:00:40.34#ibcon#about to read 6, iclass 23, count 2 2006.229.15:00:40.34#ibcon#read 6, iclass 23, count 2 2006.229.15:00:40.34#ibcon#end of sib2, iclass 23, count 2 2006.229.15:00:40.34#ibcon#*mode == 0, iclass 23, count 2 2006.229.15:00:40.34#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.15:00:40.34#ibcon#[27=AT05-04\r\n] 2006.229.15:00:40.34#ibcon#*before write, iclass 23, count 2 2006.229.15:00:40.34#ibcon#enter sib2, iclass 23, count 2 2006.229.15:00:40.34#ibcon#flushed, iclass 23, count 2 2006.229.15:00:40.34#ibcon#about to write, iclass 23, count 2 2006.229.15:00:40.34#ibcon#wrote, iclass 23, count 2 2006.229.15:00:40.34#ibcon#about to read 3, iclass 23, count 2 2006.229.15:00:40.37#ibcon#read 3, iclass 23, count 2 2006.229.15:00:40.37#ibcon#about to read 4, iclass 23, count 2 2006.229.15:00:40.37#ibcon#read 4, iclass 23, count 2 2006.229.15:00:40.37#ibcon#about to read 5, iclass 23, count 2 2006.229.15:00:40.37#ibcon#read 5, iclass 23, count 2 2006.229.15:00:40.37#ibcon#about to read 6, iclass 23, count 2 2006.229.15:00:40.37#ibcon#read 6, iclass 23, count 2 2006.229.15:00:40.37#ibcon#end of sib2, iclass 23, count 2 2006.229.15:00:40.37#ibcon#*after write, iclass 23, count 2 2006.229.15:00:40.37#ibcon#*before return 0, iclass 23, count 2 2006.229.15:00:40.37#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:00:40.37#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:00:40.37#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.15:00:40.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:40.37#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:00:40.49#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:00:40.49#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:00:40.49#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:00:40.49#ibcon#first serial, iclass 23, count 0 2006.229.15:00:40.49#ibcon#enter sib2, iclass 23, count 0 2006.229.15:00:40.49#ibcon#flushed, iclass 23, count 0 2006.229.15:00:40.49#ibcon#about to write, iclass 23, count 0 2006.229.15:00:40.49#ibcon#wrote, iclass 23, count 0 2006.229.15:00:40.49#ibcon#about to read 3, iclass 23, count 0 2006.229.15:00:40.51#ibcon#read 3, iclass 23, count 0 2006.229.15:00:40.51#ibcon#about to read 4, iclass 23, count 0 2006.229.15:00:40.51#ibcon#read 4, iclass 23, count 0 2006.229.15:00:40.51#ibcon#about to read 5, iclass 23, count 0 2006.229.15:00:40.51#ibcon#read 5, iclass 23, count 0 2006.229.15:00:40.51#ibcon#about to read 6, iclass 23, count 0 2006.229.15:00:40.51#ibcon#read 6, iclass 23, count 0 2006.229.15:00:40.51#ibcon#end of sib2, iclass 23, count 0 2006.229.15:00:40.51#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:00:40.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:00:40.51#ibcon#[27=USB\r\n] 2006.229.15:00:40.51#ibcon#*before write, iclass 23, count 0 2006.229.15:00:40.51#ibcon#enter sib2, iclass 23, count 0 2006.229.15:00:40.51#ibcon#flushed, iclass 23, count 0 2006.229.15:00:40.51#ibcon#about to write, iclass 23, count 0 2006.229.15:00:40.51#ibcon#wrote, iclass 23, count 0 2006.229.15:00:40.51#ibcon#about to read 3, iclass 23, count 0 2006.229.15:00:40.54#ibcon#read 3, iclass 23, count 0 2006.229.15:00:40.54#ibcon#about to read 4, iclass 23, count 0 2006.229.15:00:40.54#ibcon#read 4, iclass 23, count 0 2006.229.15:00:40.54#ibcon#about to read 5, iclass 23, count 0 2006.229.15:00:40.54#ibcon#read 5, iclass 23, count 0 2006.229.15:00:40.54#ibcon#about to read 6, iclass 23, count 0 2006.229.15:00:40.54#ibcon#read 6, iclass 23, count 0 2006.229.15:00:40.54#ibcon#end of sib2, iclass 23, count 0 2006.229.15:00:40.54#ibcon#*after write, iclass 23, count 0 2006.229.15:00:40.54#ibcon#*before return 0, iclass 23, count 0 2006.229.15:00:40.54#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:00:40.54#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:00:40.54#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:00:40.54#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:00:40.54$vck44/vblo=6,719.99 2006.229.15:00:40.54#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:00:40.54#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:00:40.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:40.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:40.54#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:40.54#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:40.54#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:00:40.54#ibcon#first serial, iclass 25, count 0 2006.229.15:00:40.54#ibcon#enter sib2, iclass 25, count 0 2006.229.15:00:40.54#ibcon#flushed, iclass 25, count 0 2006.229.15:00:40.54#ibcon#about to write, iclass 25, count 0 2006.229.15:00:40.54#ibcon#wrote, iclass 25, count 0 2006.229.15:00:40.54#ibcon#about to read 3, iclass 25, count 0 2006.229.15:00:40.56#ibcon#read 3, iclass 25, count 0 2006.229.15:00:40.56#ibcon#about to read 4, iclass 25, count 0 2006.229.15:00:40.56#ibcon#read 4, iclass 25, count 0 2006.229.15:00:40.56#ibcon#about to read 5, iclass 25, count 0 2006.229.15:00:40.56#ibcon#read 5, iclass 25, count 0 2006.229.15:00:40.56#ibcon#about to read 6, iclass 25, count 0 2006.229.15:00:40.56#ibcon#read 6, iclass 25, count 0 2006.229.15:00:40.56#ibcon#end of sib2, iclass 25, count 0 2006.229.15:00:40.56#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:00:40.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:00:40.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:00:40.56#ibcon#*before write, iclass 25, count 0 2006.229.15:00:40.56#ibcon#enter sib2, iclass 25, count 0 2006.229.15:00:40.56#ibcon#flushed, iclass 25, count 0 2006.229.15:00:40.56#ibcon#about to write, iclass 25, count 0 2006.229.15:00:40.56#ibcon#wrote, iclass 25, count 0 2006.229.15:00:40.56#ibcon#about to read 3, iclass 25, count 0 2006.229.15:00:40.60#ibcon#read 3, iclass 25, count 0 2006.229.15:00:40.60#ibcon#about to read 4, iclass 25, count 0 2006.229.15:00:40.60#ibcon#read 4, iclass 25, count 0 2006.229.15:00:40.60#ibcon#about to read 5, iclass 25, count 0 2006.229.15:00:40.60#ibcon#read 5, iclass 25, count 0 2006.229.15:00:40.60#ibcon#about to read 6, iclass 25, count 0 2006.229.15:00:40.60#ibcon#read 6, iclass 25, count 0 2006.229.15:00:40.60#ibcon#end of sib2, iclass 25, count 0 2006.229.15:00:40.60#ibcon#*after write, iclass 25, count 0 2006.229.15:00:40.60#ibcon#*before return 0, iclass 25, count 0 2006.229.15:00:40.60#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:40.60#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:00:40.60#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:00:40.60#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:00:40.60$vck44/vb=6,4 2006.229.15:00:40.60#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.15:00:40.60#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.15:00:40.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:40.60#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:40.66#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:40.66#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:40.66#ibcon#enter wrdev, iclass 27, count 2 2006.229.15:00:40.66#ibcon#first serial, iclass 27, count 2 2006.229.15:00:40.66#ibcon#enter sib2, iclass 27, count 2 2006.229.15:00:40.66#ibcon#flushed, iclass 27, count 2 2006.229.15:00:40.66#ibcon#about to write, iclass 27, count 2 2006.229.15:00:40.66#ibcon#wrote, iclass 27, count 2 2006.229.15:00:40.66#ibcon#about to read 3, iclass 27, count 2 2006.229.15:00:40.68#ibcon#read 3, iclass 27, count 2 2006.229.15:00:40.68#ibcon#about to read 4, iclass 27, count 2 2006.229.15:00:40.68#ibcon#read 4, iclass 27, count 2 2006.229.15:00:40.68#ibcon#about to read 5, iclass 27, count 2 2006.229.15:00:40.68#ibcon#read 5, iclass 27, count 2 2006.229.15:00:40.68#ibcon#about to read 6, iclass 27, count 2 2006.229.15:00:40.68#ibcon#read 6, iclass 27, count 2 2006.229.15:00:40.68#ibcon#end of sib2, iclass 27, count 2 2006.229.15:00:40.68#ibcon#*mode == 0, iclass 27, count 2 2006.229.15:00:40.68#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.15:00:40.68#ibcon#[27=AT06-04\r\n] 2006.229.15:00:40.68#ibcon#*before write, iclass 27, count 2 2006.229.15:00:40.68#ibcon#enter sib2, iclass 27, count 2 2006.229.15:00:40.68#ibcon#flushed, iclass 27, count 2 2006.229.15:00:40.68#ibcon#about to write, iclass 27, count 2 2006.229.15:00:40.68#ibcon#wrote, iclass 27, count 2 2006.229.15:00:40.68#ibcon#about to read 3, iclass 27, count 2 2006.229.15:00:40.71#ibcon#read 3, iclass 27, count 2 2006.229.15:00:40.71#ibcon#about to read 4, iclass 27, count 2 2006.229.15:00:40.71#ibcon#read 4, iclass 27, count 2 2006.229.15:00:40.71#ibcon#about to read 5, iclass 27, count 2 2006.229.15:00:40.71#ibcon#read 5, iclass 27, count 2 2006.229.15:00:40.71#ibcon#about to read 6, iclass 27, count 2 2006.229.15:00:40.71#ibcon#read 6, iclass 27, count 2 2006.229.15:00:40.71#ibcon#end of sib2, iclass 27, count 2 2006.229.15:00:40.71#ibcon#*after write, iclass 27, count 2 2006.229.15:00:40.71#ibcon#*before return 0, iclass 27, count 2 2006.229.15:00:40.71#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:40.71#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:00:40.71#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.15:00:40.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:40.71#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:40.83#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:40.83#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:40.83#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:00:40.83#ibcon#first serial, iclass 27, count 0 2006.229.15:00:40.83#ibcon#enter sib2, iclass 27, count 0 2006.229.15:00:40.83#ibcon#flushed, iclass 27, count 0 2006.229.15:00:40.83#ibcon#about to write, iclass 27, count 0 2006.229.15:00:40.83#ibcon#wrote, iclass 27, count 0 2006.229.15:00:40.83#ibcon#about to read 3, iclass 27, count 0 2006.229.15:00:40.85#ibcon#read 3, iclass 27, count 0 2006.229.15:00:40.85#ibcon#about to read 4, iclass 27, count 0 2006.229.15:00:40.85#ibcon#read 4, iclass 27, count 0 2006.229.15:00:40.85#ibcon#about to read 5, iclass 27, count 0 2006.229.15:00:40.85#ibcon#read 5, iclass 27, count 0 2006.229.15:00:40.85#ibcon#about to read 6, iclass 27, count 0 2006.229.15:00:40.85#ibcon#read 6, iclass 27, count 0 2006.229.15:00:40.85#ibcon#end of sib2, iclass 27, count 0 2006.229.15:00:40.85#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:00:40.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:00:40.85#ibcon#[27=USB\r\n] 2006.229.15:00:40.85#ibcon#*before write, iclass 27, count 0 2006.229.15:00:40.85#ibcon#enter sib2, iclass 27, count 0 2006.229.15:00:40.85#ibcon#flushed, iclass 27, count 0 2006.229.15:00:40.85#ibcon#about to write, iclass 27, count 0 2006.229.15:00:40.85#ibcon#wrote, iclass 27, count 0 2006.229.15:00:40.85#ibcon#about to read 3, iclass 27, count 0 2006.229.15:00:40.88#ibcon#read 3, iclass 27, count 0 2006.229.15:00:40.88#ibcon#about to read 4, iclass 27, count 0 2006.229.15:00:40.88#ibcon#read 4, iclass 27, count 0 2006.229.15:00:40.88#ibcon#about to read 5, iclass 27, count 0 2006.229.15:00:40.88#ibcon#read 5, iclass 27, count 0 2006.229.15:00:40.88#ibcon#about to read 6, iclass 27, count 0 2006.229.15:00:40.88#ibcon#read 6, iclass 27, count 0 2006.229.15:00:40.88#ibcon#end of sib2, iclass 27, count 0 2006.229.15:00:40.88#ibcon#*after write, iclass 27, count 0 2006.229.15:00:40.88#ibcon#*before return 0, iclass 27, count 0 2006.229.15:00:40.88#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:40.88#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:00:40.88#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:00:40.88#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:00:40.88$vck44/vblo=7,734.99 2006.229.15:00:40.88#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.15:00:40.88#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.15:00:40.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:40.88#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:40.88#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:40.88#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:40.88#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:00:40.88#ibcon#first serial, iclass 29, count 0 2006.229.15:00:40.88#ibcon#enter sib2, iclass 29, count 0 2006.229.15:00:40.88#ibcon#flushed, iclass 29, count 0 2006.229.15:00:40.88#ibcon#about to write, iclass 29, count 0 2006.229.15:00:40.88#ibcon#wrote, iclass 29, count 0 2006.229.15:00:40.88#ibcon#about to read 3, iclass 29, count 0 2006.229.15:00:40.90#ibcon#read 3, iclass 29, count 0 2006.229.15:00:40.90#ibcon#about to read 4, iclass 29, count 0 2006.229.15:00:40.90#ibcon#read 4, iclass 29, count 0 2006.229.15:00:40.90#ibcon#about to read 5, iclass 29, count 0 2006.229.15:00:40.90#ibcon#read 5, iclass 29, count 0 2006.229.15:00:40.90#ibcon#about to read 6, iclass 29, count 0 2006.229.15:00:40.90#ibcon#read 6, iclass 29, count 0 2006.229.15:00:40.90#ibcon#end of sib2, iclass 29, count 0 2006.229.15:00:40.90#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:00:40.90#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:00:40.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:00:40.90#ibcon#*before write, iclass 29, count 0 2006.229.15:00:40.90#ibcon#enter sib2, iclass 29, count 0 2006.229.15:00:40.90#ibcon#flushed, iclass 29, count 0 2006.229.15:00:40.90#ibcon#about to write, iclass 29, count 0 2006.229.15:00:40.90#ibcon#wrote, iclass 29, count 0 2006.229.15:00:40.90#ibcon#about to read 3, iclass 29, count 0 2006.229.15:00:40.94#ibcon#read 3, iclass 29, count 0 2006.229.15:00:40.94#ibcon#about to read 4, iclass 29, count 0 2006.229.15:00:40.94#ibcon#read 4, iclass 29, count 0 2006.229.15:00:40.94#ibcon#about to read 5, iclass 29, count 0 2006.229.15:00:40.94#ibcon#read 5, iclass 29, count 0 2006.229.15:00:40.94#ibcon#about to read 6, iclass 29, count 0 2006.229.15:00:40.94#ibcon#read 6, iclass 29, count 0 2006.229.15:00:40.94#ibcon#end of sib2, iclass 29, count 0 2006.229.15:00:40.94#ibcon#*after write, iclass 29, count 0 2006.229.15:00:40.94#ibcon#*before return 0, iclass 29, count 0 2006.229.15:00:40.94#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:40.94#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:00:40.94#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:00:40.94#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:00:40.94$vck44/vb=7,4 2006.229.15:00:40.94#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.15:00:40.94#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.15:00:40.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:40.94#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:41.00#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:41.00#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:41.00#ibcon#enter wrdev, iclass 31, count 2 2006.229.15:00:41.00#ibcon#first serial, iclass 31, count 2 2006.229.15:00:41.00#ibcon#enter sib2, iclass 31, count 2 2006.229.15:00:41.00#ibcon#flushed, iclass 31, count 2 2006.229.15:00:41.00#ibcon#about to write, iclass 31, count 2 2006.229.15:00:41.00#ibcon#wrote, iclass 31, count 2 2006.229.15:00:41.00#ibcon#about to read 3, iclass 31, count 2 2006.229.15:00:41.02#ibcon#read 3, iclass 31, count 2 2006.229.15:00:41.02#ibcon#about to read 4, iclass 31, count 2 2006.229.15:00:41.02#ibcon#read 4, iclass 31, count 2 2006.229.15:00:41.02#ibcon#about to read 5, iclass 31, count 2 2006.229.15:00:41.02#ibcon#read 5, iclass 31, count 2 2006.229.15:00:41.02#ibcon#about to read 6, iclass 31, count 2 2006.229.15:00:41.02#ibcon#read 6, iclass 31, count 2 2006.229.15:00:41.02#ibcon#end of sib2, iclass 31, count 2 2006.229.15:00:41.02#ibcon#*mode == 0, iclass 31, count 2 2006.229.15:00:41.02#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.15:00:41.02#ibcon#[27=AT07-04\r\n] 2006.229.15:00:41.02#ibcon#*before write, iclass 31, count 2 2006.229.15:00:41.02#ibcon#enter sib2, iclass 31, count 2 2006.229.15:00:41.02#ibcon#flushed, iclass 31, count 2 2006.229.15:00:41.02#ibcon#about to write, iclass 31, count 2 2006.229.15:00:41.02#ibcon#wrote, iclass 31, count 2 2006.229.15:00:41.02#ibcon#about to read 3, iclass 31, count 2 2006.229.15:00:41.05#ibcon#read 3, iclass 31, count 2 2006.229.15:00:41.05#ibcon#about to read 4, iclass 31, count 2 2006.229.15:00:41.05#ibcon#read 4, iclass 31, count 2 2006.229.15:00:41.05#ibcon#about to read 5, iclass 31, count 2 2006.229.15:00:41.05#ibcon#read 5, iclass 31, count 2 2006.229.15:00:41.05#ibcon#about to read 6, iclass 31, count 2 2006.229.15:00:41.05#ibcon#read 6, iclass 31, count 2 2006.229.15:00:41.05#ibcon#end of sib2, iclass 31, count 2 2006.229.15:00:41.05#ibcon#*after write, iclass 31, count 2 2006.229.15:00:41.05#ibcon#*before return 0, iclass 31, count 2 2006.229.15:00:41.05#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:41.05#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:00:41.05#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.15:00:41.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:41.05#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:41.17#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:41.17#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:41.17#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:00:41.17#ibcon#first serial, iclass 31, count 0 2006.229.15:00:41.17#ibcon#enter sib2, iclass 31, count 0 2006.229.15:00:41.17#ibcon#flushed, iclass 31, count 0 2006.229.15:00:41.17#ibcon#about to write, iclass 31, count 0 2006.229.15:00:41.17#ibcon#wrote, iclass 31, count 0 2006.229.15:00:41.17#ibcon#about to read 3, iclass 31, count 0 2006.229.15:00:41.19#ibcon#read 3, iclass 31, count 0 2006.229.15:00:41.19#ibcon#about to read 4, iclass 31, count 0 2006.229.15:00:41.19#ibcon#read 4, iclass 31, count 0 2006.229.15:00:41.19#ibcon#about to read 5, iclass 31, count 0 2006.229.15:00:41.19#ibcon#read 5, iclass 31, count 0 2006.229.15:00:41.19#ibcon#about to read 6, iclass 31, count 0 2006.229.15:00:41.19#ibcon#read 6, iclass 31, count 0 2006.229.15:00:41.19#ibcon#end of sib2, iclass 31, count 0 2006.229.15:00:41.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:00:41.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:00:41.19#ibcon#[27=USB\r\n] 2006.229.15:00:41.19#ibcon#*before write, iclass 31, count 0 2006.229.15:00:41.19#ibcon#enter sib2, iclass 31, count 0 2006.229.15:00:41.19#ibcon#flushed, iclass 31, count 0 2006.229.15:00:41.19#ibcon#about to write, iclass 31, count 0 2006.229.15:00:41.19#ibcon#wrote, iclass 31, count 0 2006.229.15:00:41.19#ibcon#about to read 3, iclass 31, count 0 2006.229.15:00:41.22#ibcon#read 3, iclass 31, count 0 2006.229.15:00:41.22#ibcon#about to read 4, iclass 31, count 0 2006.229.15:00:41.22#ibcon#read 4, iclass 31, count 0 2006.229.15:00:41.22#ibcon#about to read 5, iclass 31, count 0 2006.229.15:00:41.22#ibcon#read 5, iclass 31, count 0 2006.229.15:00:41.22#ibcon#about to read 6, iclass 31, count 0 2006.229.15:00:41.22#ibcon#read 6, iclass 31, count 0 2006.229.15:00:41.22#ibcon#end of sib2, iclass 31, count 0 2006.229.15:00:41.22#ibcon#*after write, iclass 31, count 0 2006.229.15:00:41.22#ibcon#*before return 0, iclass 31, count 0 2006.229.15:00:41.22#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:41.22#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:00:41.22#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:00:41.22#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:00:41.22$vck44/vblo=8,744.99 2006.229.15:00:41.22#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.15:00:41.22#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.15:00:41.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:00:41.22#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:41.22#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:41.22#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:41.22#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:00:41.22#ibcon#first serial, iclass 33, count 0 2006.229.15:00:41.22#ibcon#enter sib2, iclass 33, count 0 2006.229.15:00:41.22#ibcon#flushed, iclass 33, count 0 2006.229.15:00:41.22#ibcon#about to write, iclass 33, count 0 2006.229.15:00:41.22#ibcon#wrote, iclass 33, count 0 2006.229.15:00:41.22#ibcon#about to read 3, iclass 33, count 0 2006.229.15:00:41.24#ibcon#read 3, iclass 33, count 0 2006.229.15:00:41.24#ibcon#about to read 4, iclass 33, count 0 2006.229.15:00:41.24#ibcon#read 4, iclass 33, count 0 2006.229.15:00:41.24#ibcon#about to read 5, iclass 33, count 0 2006.229.15:00:41.24#ibcon#read 5, iclass 33, count 0 2006.229.15:00:41.24#ibcon#about to read 6, iclass 33, count 0 2006.229.15:00:41.24#ibcon#read 6, iclass 33, count 0 2006.229.15:00:41.24#ibcon#end of sib2, iclass 33, count 0 2006.229.15:00:41.24#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:00:41.24#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:00:41.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:00:41.24#ibcon#*before write, iclass 33, count 0 2006.229.15:00:41.24#ibcon#enter sib2, iclass 33, count 0 2006.229.15:00:41.24#ibcon#flushed, iclass 33, count 0 2006.229.15:00:41.24#ibcon#about to write, iclass 33, count 0 2006.229.15:00:41.24#ibcon#wrote, iclass 33, count 0 2006.229.15:00:41.24#ibcon#about to read 3, iclass 33, count 0 2006.229.15:00:41.28#ibcon#read 3, iclass 33, count 0 2006.229.15:00:41.28#ibcon#about to read 4, iclass 33, count 0 2006.229.15:00:41.28#ibcon#read 4, iclass 33, count 0 2006.229.15:00:41.28#ibcon#about to read 5, iclass 33, count 0 2006.229.15:00:41.28#ibcon#read 5, iclass 33, count 0 2006.229.15:00:41.28#ibcon#about to read 6, iclass 33, count 0 2006.229.15:00:41.28#ibcon#read 6, iclass 33, count 0 2006.229.15:00:41.28#ibcon#end of sib2, iclass 33, count 0 2006.229.15:00:41.28#ibcon#*after write, iclass 33, count 0 2006.229.15:00:41.28#ibcon#*before return 0, iclass 33, count 0 2006.229.15:00:41.28#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:41.28#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:00:41.28#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:00:41.28#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:00:41.28$vck44/vb=8,4 2006.229.15:00:41.28#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.15:00:41.28#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.15:00:41.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:00:41.28#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:41.34#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:41.34#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:41.34#ibcon#enter wrdev, iclass 35, count 2 2006.229.15:00:41.34#ibcon#first serial, iclass 35, count 2 2006.229.15:00:41.34#ibcon#enter sib2, iclass 35, count 2 2006.229.15:00:41.34#ibcon#flushed, iclass 35, count 2 2006.229.15:00:41.34#ibcon#about to write, iclass 35, count 2 2006.229.15:00:41.34#ibcon#wrote, iclass 35, count 2 2006.229.15:00:41.34#ibcon#about to read 3, iclass 35, count 2 2006.229.15:00:41.36#ibcon#read 3, iclass 35, count 2 2006.229.15:00:41.36#ibcon#about to read 4, iclass 35, count 2 2006.229.15:00:41.36#ibcon#read 4, iclass 35, count 2 2006.229.15:00:41.36#ibcon#about to read 5, iclass 35, count 2 2006.229.15:00:41.36#ibcon#read 5, iclass 35, count 2 2006.229.15:00:41.36#ibcon#about to read 6, iclass 35, count 2 2006.229.15:00:41.36#ibcon#read 6, iclass 35, count 2 2006.229.15:00:41.36#ibcon#end of sib2, iclass 35, count 2 2006.229.15:00:41.36#ibcon#*mode == 0, iclass 35, count 2 2006.229.15:00:41.36#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.15:00:41.36#ibcon#[27=AT08-04\r\n] 2006.229.15:00:41.36#ibcon#*before write, iclass 35, count 2 2006.229.15:00:41.36#ibcon#enter sib2, iclass 35, count 2 2006.229.15:00:41.36#ibcon#flushed, iclass 35, count 2 2006.229.15:00:41.36#ibcon#about to write, iclass 35, count 2 2006.229.15:00:41.36#ibcon#wrote, iclass 35, count 2 2006.229.15:00:41.36#ibcon#about to read 3, iclass 35, count 2 2006.229.15:00:41.39#ibcon#read 3, iclass 35, count 2 2006.229.15:00:41.39#ibcon#about to read 4, iclass 35, count 2 2006.229.15:00:41.39#ibcon#read 4, iclass 35, count 2 2006.229.15:00:41.39#ibcon#about to read 5, iclass 35, count 2 2006.229.15:00:41.39#ibcon#read 5, iclass 35, count 2 2006.229.15:00:41.39#ibcon#about to read 6, iclass 35, count 2 2006.229.15:00:41.39#ibcon#read 6, iclass 35, count 2 2006.229.15:00:41.39#ibcon#end of sib2, iclass 35, count 2 2006.229.15:00:41.39#ibcon#*after write, iclass 35, count 2 2006.229.15:00:41.39#ibcon#*before return 0, iclass 35, count 2 2006.229.15:00:41.39#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:41.39#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:00:41.39#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.15:00:41.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:00:41.39#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:41.51#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:41.51#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:41.51#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:00:41.51#ibcon#first serial, iclass 35, count 0 2006.229.15:00:41.51#ibcon#enter sib2, iclass 35, count 0 2006.229.15:00:41.51#ibcon#flushed, iclass 35, count 0 2006.229.15:00:41.51#ibcon#about to write, iclass 35, count 0 2006.229.15:00:41.51#ibcon#wrote, iclass 35, count 0 2006.229.15:00:41.51#ibcon#about to read 3, iclass 35, count 0 2006.229.15:00:41.53#ibcon#read 3, iclass 35, count 0 2006.229.15:00:41.53#ibcon#about to read 4, iclass 35, count 0 2006.229.15:00:41.53#ibcon#read 4, iclass 35, count 0 2006.229.15:00:41.53#ibcon#about to read 5, iclass 35, count 0 2006.229.15:00:41.53#ibcon#read 5, iclass 35, count 0 2006.229.15:00:41.53#ibcon#about to read 6, iclass 35, count 0 2006.229.15:00:41.53#ibcon#read 6, iclass 35, count 0 2006.229.15:00:41.53#ibcon#end of sib2, iclass 35, count 0 2006.229.15:00:41.53#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:00:41.53#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:00:41.53#ibcon#[27=USB\r\n] 2006.229.15:00:41.53#ibcon#*before write, iclass 35, count 0 2006.229.15:00:41.53#ibcon#enter sib2, iclass 35, count 0 2006.229.15:00:41.53#ibcon#flushed, iclass 35, count 0 2006.229.15:00:41.53#ibcon#about to write, iclass 35, count 0 2006.229.15:00:41.53#ibcon#wrote, iclass 35, count 0 2006.229.15:00:41.53#ibcon#about to read 3, iclass 35, count 0 2006.229.15:00:41.56#ibcon#read 3, iclass 35, count 0 2006.229.15:00:41.56#ibcon#about to read 4, iclass 35, count 0 2006.229.15:00:41.56#ibcon#read 4, iclass 35, count 0 2006.229.15:00:41.56#ibcon#about to read 5, iclass 35, count 0 2006.229.15:00:41.56#ibcon#read 5, iclass 35, count 0 2006.229.15:00:41.56#ibcon#about to read 6, iclass 35, count 0 2006.229.15:00:41.56#ibcon#read 6, iclass 35, count 0 2006.229.15:00:41.56#ibcon#end of sib2, iclass 35, count 0 2006.229.15:00:41.56#ibcon#*after write, iclass 35, count 0 2006.229.15:00:41.56#ibcon#*before return 0, iclass 35, count 0 2006.229.15:00:41.56#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:41.56#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:00:41.56#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:00:41.56#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:00:41.56$vck44/vabw=wide 2006.229.15:00:41.56#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.15:00:41.56#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.15:00:41.56#ibcon#ireg 8 cls_cnt 0 2006.229.15:00:41.56#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:41.56#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:41.56#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:41.56#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:00:41.56#ibcon#first serial, iclass 37, count 0 2006.229.15:00:41.56#ibcon#enter sib2, iclass 37, count 0 2006.229.15:00:41.56#ibcon#flushed, iclass 37, count 0 2006.229.15:00:41.56#ibcon#about to write, iclass 37, count 0 2006.229.15:00:41.56#ibcon#wrote, iclass 37, count 0 2006.229.15:00:41.56#ibcon#about to read 3, iclass 37, count 0 2006.229.15:00:41.58#ibcon#read 3, iclass 37, count 0 2006.229.15:00:41.58#ibcon#about to read 4, iclass 37, count 0 2006.229.15:00:41.58#ibcon#read 4, iclass 37, count 0 2006.229.15:00:41.58#ibcon#about to read 5, iclass 37, count 0 2006.229.15:00:41.58#ibcon#read 5, iclass 37, count 0 2006.229.15:00:41.58#ibcon#about to read 6, iclass 37, count 0 2006.229.15:00:41.58#ibcon#read 6, iclass 37, count 0 2006.229.15:00:41.58#ibcon#end of sib2, iclass 37, count 0 2006.229.15:00:41.58#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:00:41.58#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:00:41.58#ibcon#[25=BW32\r\n] 2006.229.15:00:41.58#ibcon#*before write, iclass 37, count 0 2006.229.15:00:41.58#ibcon#enter sib2, iclass 37, count 0 2006.229.15:00:41.58#ibcon#flushed, iclass 37, count 0 2006.229.15:00:41.58#ibcon#about to write, iclass 37, count 0 2006.229.15:00:41.58#ibcon#wrote, iclass 37, count 0 2006.229.15:00:41.58#ibcon#about to read 3, iclass 37, count 0 2006.229.15:00:41.61#ibcon#read 3, iclass 37, count 0 2006.229.15:00:41.61#ibcon#about to read 4, iclass 37, count 0 2006.229.15:00:41.61#ibcon#read 4, iclass 37, count 0 2006.229.15:00:41.61#ibcon#about to read 5, iclass 37, count 0 2006.229.15:00:41.61#ibcon#read 5, iclass 37, count 0 2006.229.15:00:41.61#ibcon#about to read 6, iclass 37, count 0 2006.229.15:00:41.61#ibcon#read 6, iclass 37, count 0 2006.229.15:00:41.61#ibcon#end of sib2, iclass 37, count 0 2006.229.15:00:41.61#ibcon#*after write, iclass 37, count 0 2006.229.15:00:41.61#ibcon#*before return 0, iclass 37, count 0 2006.229.15:00:41.61#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:41.61#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:00:41.61#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:00:41.61#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:00:41.61$vck44/vbbw=wide 2006.229.15:00:41.61#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:00:41.61#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:00:41.61#ibcon#ireg 8 cls_cnt 0 2006.229.15:00:41.61#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:00:41.68#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:00:41.68#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:00:41.68#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:00:41.68#ibcon#first serial, iclass 39, count 0 2006.229.15:00:41.68#ibcon#enter sib2, iclass 39, count 0 2006.229.15:00:41.68#ibcon#flushed, iclass 39, count 0 2006.229.15:00:41.68#ibcon#about to write, iclass 39, count 0 2006.229.15:00:41.68#ibcon#wrote, iclass 39, count 0 2006.229.15:00:41.68#ibcon#about to read 3, iclass 39, count 0 2006.229.15:00:41.70#ibcon#read 3, iclass 39, count 0 2006.229.15:00:41.70#ibcon#about to read 4, iclass 39, count 0 2006.229.15:00:41.70#ibcon#read 4, iclass 39, count 0 2006.229.15:00:41.70#ibcon#about to read 5, iclass 39, count 0 2006.229.15:00:41.70#ibcon#read 5, iclass 39, count 0 2006.229.15:00:41.70#ibcon#about to read 6, iclass 39, count 0 2006.229.15:00:41.70#ibcon#read 6, iclass 39, count 0 2006.229.15:00:41.70#ibcon#end of sib2, iclass 39, count 0 2006.229.15:00:41.70#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:00:41.70#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:00:41.70#ibcon#[27=BW32\r\n] 2006.229.15:00:41.70#ibcon#*before write, iclass 39, count 0 2006.229.15:00:41.70#ibcon#enter sib2, iclass 39, count 0 2006.229.15:00:41.70#ibcon#flushed, iclass 39, count 0 2006.229.15:00:41.70#ibcon#about to write, iclass 39, count 0 2006.229.15:00:41.70#ibcon#wrote, iclass 39, count 0 2006.229.15:00:41.70#ibcon#about to read 3, iclass 39, count 0 2006.229.15:00:41.73#ibcon#read 3, iclass 39, count 0 2006.229.15:00:41.73#ibcon#about to read 4, iclass 39, count 0 2006.229.15:00:41.73#ibcon#read 4, iclass 39, count 0 2006.229.15:00:41.73#ibcon#about to read 5, iclass 39, count 0 2006.229.15:00:41.73#ibcon#read 5, iclass 39, count 0 2006.229.15:00:41.73#ibcon#about to read 6, iclass 39, count 0 2006.229.15:00:41.73#ibcon#read 6, iclass 39, count 0 2006.229.15:00:41.73#ibcon#end of sib2, iclass 39, count 0 2006.229.15:00:41.73#ibcon#*after write, iclass 39, count 0 2006.229.15:00:41.73#ibcon#*before return 0, iclass 39, count 0 2006.229.15:00:41.73#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:00:41.73#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:00:41.73#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:00:41.73#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:00:41.73$setupk4/ifdk4 2006.229.15:00:41.73$ifdk4/lo= 2006.229.15:00:41.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:00:41.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:00:41.73$ifdk4/patch= 2006.229.15:00:41.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:00:41.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:00:41.73$setupk4/!*+20s 2006.229.15:00:47.45#abcon#<5=/07 1.1 2.0 27.411001002.1\r\n> 2006.229.15:00:47.47#abcon#{5=INTERFACE CLEAR} 2006.229.15:00:47.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:00:48.13#trakl#Source acquired 2006.229.15:00:49.13#flagr#flagr/antenna,acquired 2006.229.15:00:56.24$setupk4/"tpicd 2006.229.15:00:56.24$setupk4/echo=off 2006.229.15:00:56.24$setupk4/xlog=off 2006.229.15:00:56.24:!2006.229.15:01:52 2006.229.15:01:52.00:preob 2006.229.15:01:53.14/onsource/TRACKING 2006.229.15:01:53.14:!2006.229.15:02:02 2006.229.15:02:02.00:"tape 2006.229.15:02:02.00:"st=record 2006.229.15:02:02.00:data_valid=on 2006.229.15:02:02.00:midob 2006.229.15:02:02.14/onsource/TRACKING 2006.229.15:02:02.14/wx/27.41,1002.1,100 2006.229.15:02:02.21/cable/+6.4149E-03 2006.229.15:02:03.30/va/01,08,usb,yes,30,32 2006.229.15:02:03.30/va/02,07,usb,yes,32,33 2006.229.15:02:03.30/va/03,06,usb,yes,40,42 2006.229.15:02:03.30/va/04,07,usb,yes,33,35 2006.229.15:02:03.30/va/05,04,usb,yes,29,30 2006.229.15:02:03.30/va/06,04,usb,yes,33,33 2006.229.15:02:03.30/va/07,05,usb,yes,29,30 2006.229.15:02:03.30/va/08,06,usb,yes,21,26 2006.229.15:02:03.53/valo/01,524.99,yes,locked 2006.229.15:02:03.53/valo/02,534.99,yes,locked 2006.229.15:02:03.53/valo/03,564.99,yes,locked 2006.229.15:02:03.53/valo/04,624.99,yes,locked 2006.229.15:02:03.53/valo/05,734.99,yes,locked 2006.229.15:02:03.53/valo/06,814.99,yes,locked 2006.229.15:02:03.53/valo/07,864.99,yes,locked 2006.229.15:02:03.53/valo/08,884.99,yes,locked 2006.229.15:02:04.62/vb/01,04,usb,yes,31,29 2006.229.15:02:04.62/vb/02,04,usb,yes,33,33 2006.229.15:02:04.62/vb/03,04,usb,yes,30,33 2006.229.15:02:04.62/vb/04,04,usb,yes,35,34 2006.229.15:02:04.62/vb/05,04,usb,yes,27,29 2006.229.15:02:04.62/vb/06,04,usb,yes,31,28 2006.229.15:02:04.62/vb/07,04,usb,yes,31,31 2006.229.15:02:04.62/vb/08,04,usb,yes,29,32 2006.229.15:02:04.85/vblo/01,629.99,yes,locked 2006.229.15:02:04.85/vblo/02,634.99,yes,locked 2006.229.15:02:04.85/vblo/03,649.99,yes,locked 2006.229.15:02:04.85/vblo/04,679.99,yes,locked 2006.229.15:02:04.85/vblo/05,709.99,yes,locked 2006.229.15:02:04.85/vblo/06,719.99,yes,locked 2006.229.15:02:04.85/vblo/07,734.99,yes,locked 2006.229.15:02:04.85/vblo/08,744.99,yes,locked 2006.229.15:02:05.00/vabw/8 2006.229.15:02:05.15/vbbw/8 2006.229.15:02:05.24/xfe/off,on,12.5 2006.229.15:02:05.63/ifatt/23,28,28,28 2006.229.15:02:06.07/fmout-gps/S +4.53E-07 2006.229.15:02:06.11:!2006.229.15:04:52 2006.229.15:04:52.00:data_valid=off 2006.229.15:04:52.00:"et 2006.229.15:04:52.00:!+3s 2006.229.15:04:55.01:"tape 2006.229.15:04:55.01:postob 2006.229.15:04:55.15/cable/+6.4152E-03 2006.229.15:04:55.15/wx/27.42,1002.0,100 2006.229.15:04:56.07/fmout-gps/S +4.54E-07 2006.229.15:04:56.07:scan_name=229-1507,jd0608,40 2006.229.15:04:56.07:source=1921-293,192451.06,-291430.1,2000.0,cw 2006.229.15:04:57.14#flagr#flagr/antenna,new-source 2006.229.15:04:57.14:checkk5 2006.229.15:04:57.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:04:57.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:04:58.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:04:58.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:04:59.11/chk_obsdata//k5ts1/T2291502??a.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.15:04:59.52/chk_obsdata//k5ts2/T2291502??b.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.15:04:59.95/chk_obsdata//k5ts3/T2291502??c.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.15:05:00.37/chk_obsdata//k5ts4/T2291502??d.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.15:05:01.10/k5log//k5ts1_log_newline 2006.229.15:05:01.82/k5log//k5ts2_log_newline 2006.229.15:05:02.54/k5log//k5ts3_log_newline 2006.229.15:05:03.29/k5log//k5ts4_log_newline 2006.229.15:05:03.32/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:05:03.32:setupk4=1 2006.229.15:05:03.32$setupk4/echo=on 2006.229.15:05:03.32$setupk4/pcalon 2006.229.15:05:03.32$pcalon/"no phase cal control is implemented here 2006.229.15:05:03.32$setupk4/"tpicd=stop 2006.229.15:05:03.32$setupk4/"rec=synch_on 2006.229.15:05:03.32$setupk4/"rec_mode=128 2006.229.15:05:03.32$setupk4/!* 2006.229.15:05:03.32$setupk4/recpk4 2006.229.15:05:03.32$recpk4/recpatch= 2006.229.15:05:03.32$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:05:03.32$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:05:03.32$setupk4/vck44 2006.229.15:05:03.32$vck44/valo=1,524.99 2006.229.15:05:03.32#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:05:03.32#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:05:03.32#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:03.32#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:03.32#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:03.32#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:03.32#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:05:03.32#ibcon#first serial, iclass 40, count 0 2006.229.15:05:03.32#ibcon#enter sib2, iclass 40, count 0 2006.229.15:05:03.32#ibcon#flushed, iclass 40, count 0 2006.229.15:05:03.32#ibcon#about to write, iclass 40, count 0 2006.229.15:05:03.32#ibcon#wrote, iclass 40, count 0 2006.229.15:05:03.32#ibcon#about to read 3, iclass 40, count 0 2006.229.15:05:03.34#ibcon#read 3, iclass 40, count 0 2006.229.15:05:03.34#ibcon#about to read 4, iclass 40, count 0 2006.229.15:05:03.34#ibcon#read 4, iclass 40, count 0 2006.229.15:05:03.34#ibcon#about to read 5, iclass 40, count 0 2006.229.15:05:03.34#ibcon#read 5, iclass 40, count 0 2006.229.15:05:03.34#ibcon#about to read 6, iclass 40, count 0 2006.229.15:05:03.34#ibcon#read 6, iclass 40, count 0 2006.229.15:05:03.34#ibcon#end of sib2, iclass 40, count 0 2006.229.15:05:03.34#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:05:03.34#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:05:03.34#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:05:03.34#ibcon#*before write, iclass 40, count 0 2006.229.15:05:03.34#ibcon#enter sib2, iclass 40, count 0 2006.229.15:05:03.34#ibcon#flushed, iclass 40, count 0 2006.229.15:05:03.34#ibcon#about to write, iclass 40, count 0 2006.229.15:05:03.34#ibcon#wrote, iclass 40, count 0 2006.229.15:05:03.34#ibcon#about to read 3, iclass 40, count 0 2006.229.15:05:03.39#ibcon#read 3, iclass 40, count 0 2006.229.15:05:03.39#ibcon#about to read 4, iclass 40, count 0 2006.229.15:05:03.39#ibcon#read 4, iclass 40, count 0 2006.229.15:05:03.39#ibcon#about to read 5, iclass 40, count 0 2006.229.15:05:03.39#ibcon#read 5, iclass 40, count 0 2006.229.15:05:03.39#ibcon#about to read 6, iclass 40, count 0 2006.229.15:05:03.39#ibcon#read 6, iclass 40, count 0 2006.229.15:05:03.39#ibcon#end of sib2, iclass 40, count 0 2006.229.15:05:03.39#ibcon#*after write, iclass 40, count 0 2006.229.15:05:03.39#ibcon#*before return 0, iclass 40, count 0 2006.229.15:05:03.39#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:03.39#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:03.39#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:05:03.39#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:05:03.39$vck44/va=1,8 2006.229.15:05:03.39#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:05:03.39#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:05:03.39#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:03.39#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:03.39#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:03.39#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:03.39#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:05:03.39#ibcon#first serial, iclass 4, count 2 2006.229.15:05:03.39#ibcon#enter sib2, iclass 4, count 2 2006.229.15:05:03.39#ibcon#flushed, iclass 4, count 2 2006.229.15:05:03.39#ibcon#about to write, iclass 4, count 2 2006.229.15:05:03.39#ibcon#wrote, iclass 4, count 2 2006.229.15:05:03.39#ibcon#about to read 3, iclass 4, count 2 2006.229.15:05:03.41#ibcon#read 3, iclass 4, count 2 2006.229.15:05:03.41#ibcon#about to read 4, iclass 4, count 2 2006.229.15:05:03.41#ibcon#read 4, iclass 4, count 2 2006.229.15:05:03.41#ibcon#about to read 5, iclass 4, count 2 2006.229.15:05:03.41#ibcon#read 5, iclass 4, count 2 2006.229.15:05:03.41#ibcon#about to read 6, iclass 4, count 2 2006.229.15:05:03.41#ibcon#read 6, iclass 4, count 2 2006.229.15:05:03.41#ibcon#end of sib2, iclass 4, count 2 2006.229.15:05:03.41#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:05:03.41#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:05:03.41#ibcon#[25=AT01-08\r\n] 2006.229.15:05:03.41#ibcon#*before write, iclass 4, count 2 2006.229.15:05:03.41#ibcon#enter sib2, iclass 4, count 2 2006.229.15:05:03.41#ibcon#flushed, iclass 4, count 2 2006.229.15:05:03.41#ibcon#about to write, iclass 4, count 2 2006.229.15:05:03.41#ibcon#wrote, iclass 4, count 2 2006.229.15:05:03.41#ibcon#about to read 3, iclass 4, count 2 2006.229.15:05:03.44#ibcon#read 3, iclass 4, count 2 2006.229.15:05:03.44#ibcon#about to read 4, iclass 4, count 2 2006.229.15:05:03.44#ibcon#read 4, iclass 4, count 2 2006.229.15:05:03.44#ibcon#about to read 5, iclass 4, count 2 2006.229.15:05:03.44#ibcon#read 5, iclass 4, count 2 2006.229.15:05:03.44#ibcon#about to read 6, iclass 4, count 2 2006.229.15:05:03.44#ibcon#read 6, iclass 4, count 2 2006.229.15:05:03.44#ibcon#end of sib2, iclass 4, count 2 2006.229.15:05:03.44#ibcon#*after write, iclass 4, count 2 2006.229.15:05:03.44#ibcon#*before return 0, iclass 4, count 2 2006.229.15:05:03.44#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:03.44#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:03.44#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:05:03.44#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:03.44#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:03.56#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:03.56#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:03.56#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:05:03.56#ibcon#first serial, iclass 4, count 0 2006.229.15:05:03.56#ibcon#enter sib2, iclass 4, count 0 2006.229.15:05:03.56#ibcon#flushed, iclass 4, count 0 2006.229.15:05:03.56#ibcon#about to write, iclass 4, count 0 2006.229.15:05:03.56#ibcon#wrote, iclass 4, count 0 2006.229.15:05:03.56#ibcon#about to read 3, iclass 4, count 0 2006.229.15:05:03.58#ibcon#read 3, iclass 4, count 0 2006.229.15:05:03.58#ibcon#about to read 4, iclass 4, count 0 2006.229.15:05:03.58#ibcon#read 4, iclass 4, count 0 2006.229.15:05:03.58#ibcon#about to read 5, iclass 4, count 0 2006.229.15:05:03.58#ibcon#read 5, iclass 4, count 0 2006.229.15:05:03.58#ibcon#about to read 6, iclass 4, count 0 2006.229.15:05:03.58#ibcon#read 6, iclass 4, count 0 2006.229.15:05:03.58#ibcon#end of sib2, iclass 4, count 0 2006.229.15:05:03.58#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:05:03.58#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:05:03.58#ibcon#[25=USB\r\n] 2006.229.15:05:03.58#ibcon#*before write, iclass 4, count 0 2006.229.15:05:03.58#ibcon#enter sib2, iclass 4, count 0 2006.229.15:05:03.58#ibcon#flushed, iclass 4, count 0 2006.229.15:05:03.58#ibcon#about to write, iclass 4, count 0 2006.229.15:05:03.58#ibcon#wrote, iclass 4, count 0 2006.229.15:05:03.58#ibcon#about to read 3, iclass 4, count 0 2006.229.15:05:03.61#ibcon#read 3, iclass 4, count 0 2006.229.15:05:03.61#ibcon#about to read 4, iclass 4, count 0 2006.229.15:05:03.61#ibcon#read 4, iclass 4, count 0 2006.229.15:05:03.61#ibcon#about to read 5, iclass 4, count 0 2006.229.15:05:03.61#ibcon#read 5, iclass 4, count 0 2006.229.15:05:03.61#ibcon#about to read 6, iclass 4, count 0 2006.229.15:05:03.61#ibcon#read 6, iclass 4, count 0 2006.229.15:05:03.61#ibcon#end of sib2, iclass 4, count 0 2006.229.15:05:03.61#ibcon#*after write, iclass 4, count 0 2006.229.15:05:03.61#ibcon#*before return 0, iclass 4, count 0 2006.229.15:05:03.61#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:03.61#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:03.61#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:05:03.61#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:05:03.61$vck44/valo=2,534.99 2006.229.15:05:03.61#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:05:03.61#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:05:03.61#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:03.61#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:03.61#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:03.61#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:03.61#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:05:03.61#ibcon#first serial, iclass 6, count 0 2006.229.15:05:03.61#ibcon#enter sib2, iclass 6, count 0 2006.229.15:05:03.61#ibcon#flushed, iclass 6, count 0 2006.229.15:05:03.61#ibcon#about to write, iclass 6, count 0 2006.229.15:05:03.61#ibcon#wrote, iclass 6, count 0 2006.229.15:05:03.61#ibcon#about to read 3, iclass 6, count 0 2006.229.15:05:03.63#ibcon#read 3, iclass 6, count 0 2006.229.15:05:03.63#ibcon#about to read 4, iclass 6, count 0 2006.229.15:05:03.63#ibcon#read 4, iclass 6, count 0 2006.229.15:05:03.63#ibcon#about to read 5, iclass 6, count 0 2006.229.15:05:03.63#ibcon#read 5, iclass 6, count 0 2006.229.15:05:03.63#ibcon#about to read 6, iclass 6, count 0 2006.229.15:05:03.63#ibcon#read 6, iclass 6, count 0 2006.229.15:05:03.63#ibcon#end of sib2, iclass 6, count 0 2006.229.15:05:03.63#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:05:03.63#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:05:03.63#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:05:03.63#ibcon#*before write, iclass 6, count 0 2006.229.15:05:03.63#ibcon#enter sib2, iclass 6, count 0 2006.229.15:05:03.63#ibcon#flushed, iclass 6, count 0 2006.229.15:05:03.63#ibcon#about to write, iclass 6, count 0 2006.229.15:05:03.63#ibcon#wrote, iclass 6, count 0 2006.229.15:05:03.63#ibcon#about to read 3, iclass 6, count 0 2006.229.15:05:03.67#ibcon#read 3, iclass 6, count 0 2006.229.15:05:03.67#ibcon#about to read 4, iclass 6, count 0 2006.229.15:05:03.67#ibcon#read 4, iclass 6, count 0 2006.229.15:05:03.67#ibcon#about to read 5, iclass 6, count 0 2006.229.15:05:03.67#ibcon#read 5, iclass 6, count 0 2006.229.15:05:03.67#ibcon#about to read 6, iclass 6, count 0 2006.229.15:05:03.67#ibcon#read 6, iclass 6, count 0 2006.229.15:05:03.67#ibcon#end of sib2, iclass 6, count 0 2006.229.15:05:03.67#ibcon#*after write, iclass 6, count 0 2006.229.15:05:03.67#ibcon#*before return 0, iclass 6, count 0 2006.229.15:05:03.67#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:03.67#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:03.67#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:05:03.67#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:05:03.67$vck44/va=2,7 2006.229.15:05:03.67#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:05:03.67#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:05:03.67#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:03.67#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:03.73#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:03.73#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:03.73#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:05:03.73#ibcon#first serial, iclass 10, count 2 2006.229.15:05:03.73#ibcon#enter sib2, iclass 10, count 2 2006.229.15:05:03.73#ibcon#flushed, iclass 10, count 2 2006.229.15:05:03.73#ibcon#about to write, iclass 10, count 2 2006.229.15:05:03.73#ibcon#wrote, iclass 10, count 2 2006.229.15:05:03.73#ibcon#about to read 3, iclass 10, count 2 2006.229.15:05:03.75#ibcon#read 3, iclass 10, count 2 2006.229.15:05:03.75#ibcon#about to read 4, iclass 10, count 2 2006.229.15:05:03.75#ibcon#read 4, iclass 10, count 2 2006.229.15:05:03.75#ibcon#about to read 5, iclass 10, count 2 2006.229.15:05:03.75#ibcon#read 5, iclass 10, count 2 2006.229.15:05:03.75#ibcon#about to read 6, iclass 10, count 2 2006.229.15:05:03.75#ibcon#read 6, iclass 10, count 2 2006.229.15:05:03.75#ibcon#end of sib2, iclass 10, count 2 2006.229.15:05:03.75#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:05:03.75#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:05:03.75#ibcon#[25=AT02-07\r\n] 2006.229.15:05:03.75#ibcon#*before write, iclass 10, count 2 2006.229.15:05:03.75#ibcon#enter sib2, iclass 10, count 2 2006.229.15:05:03.75#ibcon#flushed, iclass 10, count 2 2006.229.15:05:03.75#ibcon#about to write, iclass 10, count 2 2006.229.15:05:03.75#ibcon#wrote, iclass 10, count 2 2006.229.15:05:03.75#ibcon#about to read 3, iclass 10, count 2 2006.229.15:05:03.78#ibcon#read 3, iclass 10, count 2 2006.229.15:05:03.78#ibcon#about to read 4, iclass 10, count 2 2006.229.15:05:03.78#ibcon#read 4, iclass 10, count 2 2006.229.15:05:03.78#ibcon#about to read 5, iclass 10, count 2 2006.229.15:05:03.78#ibcon#read 5, iclass 10, count 2 2006.229.15:05:03.78#ibcon#about to read 6, iclass 10, count 2 2006.229.15:05:03.78#ibcon#read 6, iclass 10, count 2 2006.229.15:05:03.78#ibcon#end of sib2, iclass 10, count 2 2006.229.15:05:03.78#ibcon#*after write, iclass 10, count 2 2006.229.15:05:03.78#ibcon#*before return 0, iclass 10, count 2 2006.229.15:05:03.78#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:03.78#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:03.78#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:05:03.78#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:03.78#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:03.90#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:03.90#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:03.90#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:05:03.90#ibcon#first serial, iclass 10, count 0 2006.229.15:05:03.90#ibcon#enter sib2, iclass 10, count 0 2006.229.15:05:03.90#ibcon#flushed, iclass 10, count 0 2006.229.15:05:03.90#ibcon#about to write, iclass 10, count 0 2006.229.15:05:03.90#ibcon#wrote, iclass 10, count 0 2006.229.15:05:03.90#ibcon#about to read 3, iclass 10, count 0 2006.229.15:05:03.92#ibcon#read 3, iclass 10, count 0 2006.229.15:05:03.92#ibcon#about to read 4, iclass 10, count 0 2006.229.15:05:03.92#ibcon#read 4, iclass 10, count 0 2006.229.15:05:03.92#ibcon#about to read 5, iclass 10, count 0 2006.229.15:05:03.92#ibcon#read 5, iclass 10, count 0 2006.229.15:05:03.92#ibcon#about to read 6, iclass 10, count 0 2006.229.15:05:03.92#ibcon#read 6, iclass 10, count 0 2006.229.15:05:03.92#ibcon#end of sib2, iclass 10, count 0 2006.229.15:05:03.92#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:05:03.92#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:05:03.92#ibcon#[25=USB\r\n] 2006.229.15:05:03.92#ibcon#*before write, iclass 10, count 0 2006.229.15:05:03.92#ibcon#enter sib2, iclass 10, count 0 2006.229.15:05:03.92#ibcon#flushed, iclass 10, count 0 2006.229.15:05:03.92#ibcon#about to write, iclass 10, count 0 2006.229.15:05:03.92#ibcon#wrote, iclass 10, count 0 2006.229.15:05:03.92#ibcon#about to read 3, iclass 10, count 0 2006.229.15:05:03.95#ibcon#read 3, iclass 10, count 0 2006.229.15:05:03.95#ibcon#about to read 4, iclass 10, count 0 2006.229.15:05:03.95#ibcon#read 4, iclass 10, count 0 2006.229.15:05:03.95#ibcon#about to read 5, iclass 10, count 0 2006.229.15:05:03.95#ibcon#read 5, iclass 10, count 0 2006.229.15:05:03.95#ibcon#about to read 6, iclass 10, count 0 2006.229.15:05:03.95#ibcon#read 6, iclass 10, count 0 2006.229.15:05:03.95#ibcon#end of sib2, iclass 10, count 0 2006.229.15:05:03.95#ibcon#*after write, iclass 10, count 0 2006.229.15:05:03.95#ibcon#*before return 0, iclass 10, count 0 2006.229.15:05:03.95#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:03.95#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:03.95#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:05:03.95#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:05:03.95$vck44/valo=3,564.99 2006.229.15:05:03.95#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:05:03.95#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:05:03.95#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:03.95#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:03.95#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:03.95#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:03.95#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:05:03.95#ibcon#first serial, iclass 12, count 0 2006.229.15:05:03.95#ibcon#enter sib2, iclass 12, count 0 2006.229.15:05:03.95#ibcon#flushed, iclass 12, count 0 2006.229.15:05:03.95#ibcon#about to write, iclass 12, count 0 2006.229.15:05:03.95#ibcon#wrote, iclass 12, count 0 2006.229.15:05:03.95#ibcon#about to read 3, iclass 12, count 0 2006.229.15:05:03.97#ibcon#read 3, iclass 12, count 0 2006.229.15:05:03.97#ibcon#about to read 4, iclass 12, count 0 2006.229.15:05:03.97#ibcon#read 4, iclass 12, count 0 2006.229.15:05:03.97#ibcon#about to read 5, iclass 12, count 0 2006.229.15:05:03.97#ibcon#read 5, iclass 12, count 0 2006.229.15:05:03.97#ibcon#about to read 6, iclass 12, count 0 2006.229.15:05:03.97#ibcon#read 6, iclass 12, count 0 2006.229.15:05:03.97#ibcon#end of sib2, iclass 12, count 0 2006.229.15:05:03.97#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:05:03.97#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:05:03.97#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:05:03.97#ibcon#*before write, iclass 12, count 0 2006.229.15:05:03.97#ibcon#enter sib2, iclass 12, count 0 2006.229.15:05:03.97#ibcon#flushed, iclass 12, count 0 2006.229.15:05:03.97#ibcon#about to write, iclass 12, count 0 2006.229.15:05:03.97#ibcon#wrote, iclass 12, count 0 2006.229.15:05:03.97#ibcon#about to read 3, iclass 12, count 0 2006.229.15:05:04.01#ibcon#read 3, iclass 12, count 0 2006.229.15:05:04.01#ibcon#about to read 4, iclass 12, count 0 2006.229.15:05:04.01#ibcon#read 4, iclass 12, count 0 2006.229.15:05:04.01#ibcon#about to read 5, iclass 12, count 0 2006.229.15:05:04.01#ibcon#read 5, iclass 12, count 0 2006.229.15:05:04.01#ibcon#about to read 6, iclass 12, count 0 2006.229.15:05:04.01#ibcon#read 6, iclass 12, count 0 2006.229.15:05:04.01#ibcon#end of sib2, iclass 12, count 0 2006.229.15:05:04.01#ibcon#*after write, iclass 12, count 0 2006.229.15:05:04.01#ibcon#*before return 0, iclass 12, count 0 2006.229.15:05:04.01#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:04.01#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:04.01#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:05:04.01#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:05:04.01$vck44/va=3,6 2006.229.15:05:04.01#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:05:04.01#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:05:04.01#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:04.01#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:04.07#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:04.07#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:04.07#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:05:04.07#ibcon#first serial, iclass 14, count 2 2006.229.15:05:04.07#ibcon#enter sib2, iclass 14, count 2 2006.229.15:05:04.07#ibcon#flushed, iclass 14, count 2 2006.229.15:05:04.07#ibcon#about to write, iclass 14, count 2 2006.229.15:05:04.07#ibcon#wrote, iclass 14, count 2 2006.229.15:05:04.07#ibcon#about to read 3, iclass 14, count 2 2006.229.15:05:04.09#ibcon#read 3, iclass 14, count 2 2006.229.15:05:04.09#ibcon#about to read 4, iclass 14, count 2 2006.229.15:05:04.09#ibcon#read 4, iclass 14, count 2 2006.229.15:05:04.09#ibcon#about to read 5, iclass 14, count 2 2006.229.15:05:04.09#ibcon#read 5, iclass 14, count 2 2006.229.15:05:04.09#ibcon#about to read 6, iclass 14, count 2 2006.229.15:05:04.09#ibcon#read 6, iclass 14, count 2 2006.229.15:05:04.09#ibcon#end of sib2, iclass 14, count 2 2006.229.15:05:04.09#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:05:04.09#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:05:04.09#ibcon#[25=AT03-06\r\n] 2006.229.15:05:04.09#ibcon#*before write, iclass 14, count 2 2006.229.15:05:04.09#ibcon#enter sib2, iclass 14, count 2 2006.229.15:05:04.09#ibcon#flushed, iclass 14, count 2 2006.229.15:05:04.09#ibcon#about to write, iclass 14, count 2 2006.229.15:05:04.09#ibcon#wrote, iclass 14, count 2 2006.229.15:05:04.09#ibcon#about to read 3, iclass 14, count 2 2006.229.15:05:04.12#ibcon#read 3, iclass 14, count 2 2006.229.15:05:04.12#ibcon#about to read 4, iclass 14, count 2 2006.229.15:05:04.12#ibcon#read 4, iclass 14, count 2 2006.229.15:05:04.12#ibcon#about to read 5, iclass 14, count 2 2006.229.15:05:04.12#ibcon#read 5, iclass 14, count 2 2006.229.15:05:04.12#ibcon#about to read 6, iclass 14, count 2 2006.229.15:05:04.12#ibcon#read 6, iclass 14, count 2 2006.229.15:05:04.12#ibcon#end of sib2, iclass 14, count 2 2006.229.15:05:04.12#ibcon#*after write, iclass 14, count 2 2006.229.15:05:04.12#ibcon#*before return 0, iclass 14, count 2 2006.229.15:05:04.12#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:04.12#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:04.12#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:05:04.12#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:04.12#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:04.24#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:04.24#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:04.24#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:05:04.24#ibcon#first serial, iclass 14, count 0 2006.229.15:05:04.24#ibcon#enter sib2, iclass 14, count 0 2006.229.15:05:04.24#ibcon#flushed, iclass 14, count 0 2006.229.15:05:04.24#ibcon#about to write, iclass 14, count 0 2006.229.15:05:04.24#ibcon#wrote, iclass 14, count 0 2006.229.15:05:04.24#ibcon#about to read 3, iclass 14, count 0 2006.229.15:05:04.26#ibcon#read 3, iclass 14, count 0 2006.229.15:05:04.26#ibcon#about to read 4, iclass 14, count 0 2006.229.15:05:04.26#ibcon#read 4, iclass 14, count 0 2006.229.15:05:04.26#ibcon#about to read 5, iclass 14, count 0 2006.229.15:05:04.26#ibcon#read 5, iclass 14, count 0 2006.229.15:05:04.26#ibcon#about to read 6, iclass 14, count 0 2006.229.15:05:04.26#ibcon#read 6, iclass 14, count 0 2006.229.15:05:04.26#ibcon#end of sib2, iclass 14, count 0 2006.229.15:05:04.26#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:05:04.26#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:05:04.26#ibcon#[25=USB\r\n] 2006.229.15:05:04.26#ibcon#*before write, iclass 14, count 0 2006.229.15:05:04.26#ibcon#enter sib2, iclass 14, count 0 2006.229.15:05:04.26#ibcon#flushed, iclass 14, count 0 2006.229.15:05:04.26#ibcon#about to write, iclass 14, count 0 2006.229.15:05:04.26#ibcon#wrote, iclass 14, count 0 2006.229.15:05:04.26#ibcon#about to read 3, iclass 14, count 0 2006.229.15:05:04.29#ibcon#read 3, iclass 14, count 0 2006.229.15:05:04.29#ibcon#about to read 4, iclass 14, count 0 2006.229.15:05:04.29#ibcon#read 4, iclass 14, count 0 2006.229.15:05:04.29#ibcon#about to read 5, iclass 14, count 0 2006.229.15:05:04.29#ibcon#read 5, iclass 14, count 0 2006.229.15:05:04.29#ibcon#about to read 6, iclass 14, count 0 2006.229.15:05:04.29#ibcon#read 6, iclass 14, count 0 2006.229.15:05:04.29#ibcon#end of sib2, iclass 14, count 0 2006.229.15:05:04.29#ibcon#*after write, iclass 14, count 0 2006.229.15:05:04.29#ibcon#*before return 0, iclass 14, count 0 2006.229.15:05:04.29#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:04.29#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:04.29#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:05:04.29#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:05:04.29$vck44/valo=4,624.99 2006.229.15:05:04.29#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:05:04.29#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:05:04.29#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:04.29#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:04.29#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:04.29#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:04.29#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:05:04.29#ibcon#first serial, iclass 16, count 0 2006.229.15:05:04.29#ibcon#enter sib2, iclass 16, count 0 2006.229.15:05:04.29#ibcon#flushed, iclass 16, count 0 2006.229.15:05:04.29#ibcon#about to write, iclass 16, count 0 2006.229.15:05:04.29#ibcon#wrote, iclass 16, count 0 2006.229.15:05:04.29#ibcon#about to read 3, iclass 16, count 0 2006.229.15:05:04.31#ibcon#read 3, iclass 16, count 0 2006.229.15:05:04.31#ibcon#about to read 4, iclass 16, count 0 2006.229.15:05:04.31#ibcon#read 4, iclass 16, count 0 2006.229.15:05:04.31#ibcon#about to read 5, iclass 16, count 0 2006.229.15:05:04.31#ibcon#read 5, iclass 16, count 0 2006.229.15:05:04.31#ibcon#about to read 6, iclass 16, count 0 2006.229.15:05:04.31#ibcon#read 6, iclass 16, count 0 2006.229.15:05:04.31#ibcon#end of sib2, iclass 16, count 0 2006.229.15:05:04.31#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:05:04.31#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:05:04.31#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:05:04.31#ibcon#*before write, iclass 16, count 0 2006.229.15:05:04.31#ibcon#enter sib2, iclass 16, count 0 2006.229.15:05:04.31#ibcon#flushed, iclass 16, count 0 2006.229.15:05:04.31#ibcon#about to write, iclass 16, count 0 2006.229.15:05:04.31#ibcon#wrote, iclass 16, count 0 2006.229.15:05:04.31#ibcon#about to read 3, iclass 16, count 0 2006.229.15:05:04.35#ibcon#read 3, iclass 16, count 0 2006.229.15:05:04.35#ibcon#about to read 4, iclass 16, count 0 2006.229.15:05:04.35#ibcon#read 4, iclass 16, count 0 2006.229.15:05:04.35#ibcon#about to read 5, iclass 16, count 0 2006.229.15:05:04.35#ibcon#read 5, iclass 16, count 0 2006.229.15:05:04.35#ibcon#about to read 6, iclass 16, count 0 2006.229.15:05:04.35#ibcon#read 6, iclass 16, count 0 2006.229.15:05:04.35#ibcon#end of sib2, iclass 16, count 0 2006.229.15:05:04.35#ibcon#*after write, iclass 16, count 0 2006.229.15:05:04.35#ibcon#*before return 0, iclass 16, count 0 2006.229.15:05:04.35#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:04.35#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:04.35#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:05:04.35#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:05:04.35$vck44/va=4,7 2006.229.15:05:04.35#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:05:04.35#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:05:04.35#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:04.35#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:04.41#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:04.41#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:04.41#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:05:04.41#ibcon#first serial, iclass 18, count 2 2006.229.15:05:04.41#ibcon#enter sib2, iclass 18, count 2 2006.229.15:05:04.41#ibcon#flushed, iclass 18, count 2 2006.229.15:05:04.41#ibcon#about to write, iclass 18, count 2 2006.229.15:05:04.41#ibcon#wrote, iclass 18, count 2 2006.229.15:05:04.41#ibcon#about to read 3, iclass 18, count 2 2006.229.15:05:04.43#ibcon#read 3, iclass 18, count 2 2006.229.15:05:04.43#ibcon#about to read 4, iclass 18, count 2 2006.229.15:05:04.43#ibcon#read 4, iclass 18, count 2 2006.229.15:05:04.43#ibcon#about to read 5, iclass 18, count 2 2006.229.15:05:04.43#ibcon#read 5, iclass 18, count 2 2006.229.15:05:04.43#ibcon#about to read 6, iclass 18, count 2 2006.229.15:05:04.43#ibcon#read 6, iclass 18, count 2 2006.229.15:05:04.43#ibcon#end of sib2, iclass 18, count 2 2006.229.15:05:04.43#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:05:04.43#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:05:04.43#ibcon#[25=AT04-07\r\n] 2006.229.15:05:04.43#ibcon#*before write, iclass 18, count 2 2006.229.15:05:04.43#ibcon#enter sib2, iclass 18, count 2 2006.229.15:05:04.43#ibcon#flushed, iclass 18, count 2 2006.229.15:05:04.43#ibcon#about to write, iclass 18, count 2 2006.229.15:05:04.43#ibcon#wrote, iclass 18, count 2 2006.229.15:05:04.43#ibcon#about to read 3, iclass 18, count 2 2006.229.15:05:04.46#ibcon#read 3, iclass 18, count 2 2006.229.15:05:04.46#ibcon#about to read 4, iclass 18, count 2 2006.229.15:05:04.46#ibcon#read 4, iclass 18, count 2 2006.229.15:05:04.46#ibcon#about to read 5, iclass 18, count 2 2006.229.15:05:04.46#ibcon#read 5, iclass 18, count 2 2006.229.15:05:04.46#ibcon#about to read 6, iclass 18, count 2 2006.229.15:05:04.46#ibcon#read 6, iclass 18, count 2 2006.229.15:05:04.46#ibcon#end of sib2, iclass 18, count 2 2006.229.15:05:04.46#ibcon#*after write, iclass 18, count 2 2006.229.15:05:04.49#ibcon#*before return 0, iclass 18, count 2 2006.229.15:05:04.49#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:04.49#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:04.49#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:05:04.49#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:04.49#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:04.61#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:04.61#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:04.61#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:05:04.61#ibcon#first serial, iclass 18, count 0 2006.229.15:05:04.61#ibcon#enter sib2, iclass 18, count 0 2006.229.15:05:04.61#ibcon#flushed, iclass 18, count 0 2006.229.15:05:04.61#ibcon#about to write, iclass 18, count 0 2006.229.15:05:04.61#ibcon#wrote, iclass 18, count 0 2006.229.15:05:04.61#ibcon#about to read 3, iclass 18, count 0 2006.229.15:05:04.63#ibcon#read 3, iclass 18, count 0 2006.229.15:05:04.63#ibcon#about to read 4, iclass 18, count 0 2006.229.15:05:04.63#ibcon#read 4, iclass 18, count 0 2006.229.15:05:04.63#ibcon#about to read 5, iclass 18, count 0 2006.229.15:05:04.63#ibcon#read 5, iclass 18, count 0 2006.229.15:05:04.63#ibcon#about to read 6, iclass 18, count 0 2006.229.15:05:04.63#ibcon#read 6, iclass 18, count 0 2006.229.15:05:04.63#ibcon#end of sib2, iclass 18, count 0 2006.229.15:05:04.63#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:05:04.63#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:05:04.63#ibcon#[25=USB\r\n] 2006.229.15:05:04.63#ibcon#*before write, iclass 18, count 0 2006.229.15:05:04.63#ibcon#enter sib2, iclass 18, count 0 2006.229.15:05:04.63#ibcon#flushed, iclass 18, count 0 2006.229.15:05:04.63#ibcon#about to write, iclass 18, count 0 2006.229.15:05:04.63#ibcon#wrote, iclass 18, count 0 2006.229.15:05:04.63#ibcon#about to read 3, iclass 18, count 0 2006.229.15:05:04.66#ibcon#read 3, iclass 18, count 0 2006.229.15:05:04.66#ibcon#about to read 4, iclass 18, count 0 2006.229.15:05:04.66#ibcon#read 4, iclass 18, count 0 2006.229.15:05:04.66#ibcon#about to read 5, iclass 18, count 0 2006.229.15:05:04.66#ibcon#read 5, iclass 18, count 0 2006.229.15:05:04.66#ibcon#about to read 6, iclass 18, count 0 2006.229.15:05:04.66#ibcon#read 6, iclass 18, count 0 2006.229.15:05:04.66#ibcon#end of sib2, iclass 18, count 0 2006.229.15:05:04.66#ibcon#*after write, iclass 18, count 0 2006.229.15:05:04.66#ibcon#*before return 0, iclass 18, count 0 2006.229.15:05:04.66#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:04.66#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:04.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:05:04.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:05:04.66$vck44/valo=5,734.99 2006.229.15:05:04.66#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:05:04.66#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:05:04.66#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:04.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:04.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:04.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:04.66#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:05:04.66#ibcon#first serial, iclass 20, count 0 2006.229.15:05:04.66#ibcon#enter sib2, iclass 20, count 0 2006.229.15:05:04.66#ibcon#flushed, iclass 20, count 0 2006.229.15:05:04.66#ibcon#about to write, iclass 20, count 0 2006.229.15:05:04.66#ibcon#wrote, iclass 20, count 0 2006.229.15:05:04.66#ibcon#about to read 3, iclass 20, count 0 2006.229.15:05:04.68#ibcon#read 3, iclass 20, count 0 2006.229.15:05:04.68#ibcon#about to read 4, iclass 20, count 0 2006.229.15:05:04.68#ibcon#read 4, iclass 20, count 0 2006.229.15:05:04.68#ibcon#about to read 5, iclass 20, count 0 2006.229.15:05:04.68#ibcon#read 5, iclass 20, count 0 2006.229.15:05:04.68#ibcon#about to read 6, iclass 20, count 0 2006.229.15:05:04.68#ibcon#read 6, iclass 20, count 0 2006.229.15:05:04.68#ibcon#end of sib2, iclass 20, count 0 2006.229.15:05:04.68#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:05:04.68#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:05:04.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:05:04.68#ibcon#*before write, iclass 20, count 0 2006.229.15:05:04.68#ibcon#enter sib2, iclass 20, count 0 2006.229.15:05:04.68#ibcon#flushed, iclass 20, count 0 2006.229.15:05:04.68#ibcon#about to write, iclass 20, count 0 2006.229.15:05:04.68#ibcon#wrote, iclass 20, count 0 2006.229.15:05:04.68#ibcon#about to read 3, iclass 20, count 0 2006.229.15:05:04.72#ibcon#read 3, iclass 20, count 0 2006.229.15:05:04.72#ibcon#about to read 4, iclass 20, count 0 2006.229.15:05:04.72#ibcon#read 4, iclass 20, count 0 2006.229.15:05:04.72#ibcon#about to read 5, iclass 20, count 0 2006.229.15:05:04.72#ibcon#read 5, iclass 20, count 0 2006.229.15:05:04.72#ibcon#about to read 6, iclass 20, count 0 2006.229.15:05:04.72#ibcon#read 6, iclass 20, count 0 2006.229.15:05:04.72#ibcon#end of sib2, iclass 20, count 0 2006.229.15:05:04.72#ibcon#*after write, iclass 20, count 0 2006.229.15:05:04.72#ibcon#*before return 0, iclass 20, count 0 2006.229.15:05:04.72#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:04.72#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:04.72#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:05:04.72#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:05:04.72$vck44/va=5,4 2006.229.15:05:04.72#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:05:04.72#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:05:04.72#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:04.72#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:04.78#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:04.78#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:04.78#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:05:04.78#ibcon#first serial, iclass 22, count 2 2006.229.15:05:04.78#ibcon#enter sib2, iclass 22, count 2 2006.229.15:05:04.78#ibcon#flushed, iclass 22, count 2 2006.229.15:05:04.78#ibcon#about to write, iclass 22, count 2 2006.229.15:05:04.78#ibcon#wrote, iclass 22, count 2 2006.229.15:05:04.78#ibcon#about to read 3, iclass 22, count 2 2006.229.15:05:04.80#ibcon#read 3, iclass 22, count 2 2006.229.15:05:04.80#ibcon#about to read 4, iclass 22, count 2 2006.229.15:05:04.80#ibcon#read 4, iclass 22, count 2 2006.229.15:05:04.80#ibcon#about to read 5, iclass 22, count 2 2006.229.15:05:04.80#ibcon#read 5, iclass 22, count 2 2006.229.15:05:04.80#ibcon#about to read 6, iclass 22, count 2 2006.229.15:05:04.80#ibcon#read 6, iclass 22, count 2 2006.229.15:05:04.80#ibcon#end of sib2, iclass 22, count 2 2006.229.15:05:04.80#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:05:04.80#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:05:04.80#ibcon#[25=AT05-04\r\n] 2006.229.15:05:04.80#ibcon#*before write, iclass 22, count 2 2006.229.15:05:04.80#ibcon#enter sib2, iclass 22, count 2 2006.229.15:05:04.80#ibcon#flushed, iclass 22, count 2 2006.229.15:05:04.80#ibcon#about to write, iclass 22, count 2 2006.229.15:05:04.80#ibcon#wrote, iclass 22, count 2 2006.229.15:05:04.80#ibcon#about to read 3, iclass 22, count 2 2006.229.15:05:04.83#ibcon#read 3, iclass 22, count 2 2006.229.15:05:04.83#ibcon#about to read 4, iclass 22, count 2 2006.229.15:05:04.83#ibcon#read 4, iclass 22, count 2 2006.229.15:05:04.83#ibcon#about to read 5, iclass 22, count 2 2006.229.15:05:04.83#ibcon#read 5, iclass 22, count 2 2006.229.15:05:04.83#ibcon#about to read 6, iclass 22, count 2 2006.229.15:05:04.83#ibcon#read 6, iclass 22, count 2 2006.229.15:05:04.83#ibcon#end of sib2, iclass 22, count 2 2006.229.15:05:04.83#ibcon#*after write, iclass 22, count 2 2006.229.15:05:04.83#ibcon#*before return 0, iclass 22, count 2 2006.229.15:05:04.83#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:04.83#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:04.83#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:05:04.83#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:04.83#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:04.95#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:04.95#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:04.95#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:05:04.95#ibcon#first serial, iclass 22, count 0 2006.229.15:05:04.95#ibcon#enter sib2, iclass 22, count 0 2006.229.15:05:04.95#ibcon#flushed, iclass 22, count 0 2006.229.15:05:04.95#ibcon#about to write, iclass 22, count 0 2006.229.15:05:04.95#ibcon#wrote, iclass 22, count 0 2006.229.15:05:04.95#ibcon#about to read 3, iclass 22, count 0 2006.229.15:05:04.97#ibcon#read 3, iclass 22, count 0 2006.229.15:05:04.97#ibcon#about to read 4, iclass 22, count 0 2006.229.15:05:04.97#ibcon#read 4, iclass 22, count 0 2006.229.15:05:04.97#ibcon#about to read 5, iclass 22, count 0 2006.229.15:05:04.97#ibcon#read 5, iclass 22, count 0 2006.229.15:05:04.97#ibcon#about to read 6, iclass 22, count 0 2006.229.15:05:04.97#ibcon#read 6, iclass 22, count 0 2006.229.15:05:04.97#ibcon#end of sib2, iclass 22, count 0 2006.229.15:05:04.97#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:05:04.97#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:05:04.97#ibcon#[25=USB\r\n] 2006.229.15:05:04.97#ibcon#*before write, iclass 22, count 0 2006.229.15:05:04.97#ibcon#enter sib2, iclass 22, count 0 2006.229.15:05:04.97#ibcon#flushed, iclass 22, count 0 2006.229.15:05:04.97#ibcon#about to write, iclass 22, count 0 2006.229.15:05:04.97#ibcon#wrote, iclass 22, count 0 2006.229.15:05:04.97#ibcon#about to read 3, iclass 22, count 0 2006.229.15:05:05.00#ibcon#read 3, iclass 22, count 0 2006.229.15:05:05.00#ibcon#about to read 4, iclass 22, count 0 2006.229.15:05:05.00#ibcon#read 4, iclass 22, count 0 2006.229.15:05:05.00#ibcon#about to read 5, iclass 22, count 0 2006.229.15:05:05.00#ibcon#read 5, iclass 22, count 0 2006.229.15:05:05.00#ibcon#about to read 6, iclass 22, count 0 2006.229.15:05:05.00#ibcon#read 6, iclass 22, count 0 2006.229.15:05:05.00#ibcon#end of sib2, iclass 22, count 0 2006.229.15:05:05.00#ibcon#*after write, iclass 22, count 0 2006.229.15:05:05.00#ibcon#*before return 0, iclass 22, count 0 2006.229.15:05:05.00#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:05.00#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:05.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:05:05.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:05:05.00$vck44/valo=6,814.99 2006.229.15:05:05.00#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:05:05.00#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:05:05.00#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:05.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:05.00#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:05.00#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:05.00#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:05:05.00#ibcon#first serial, iclass 24, count 0 2006.229.15:05:05.00#ibcon#enter sib2, iclass 24, count 0 2006.229.15:05:05.00#ibcon#flushed, iclass 24, count 0 2006.229.15:05:05.00#ibcon#about to write, iclass 24, count 0 2006.229.15:05:05.00#ibcon#wrote, iclass 24, count 0 2006.229.15:05:05.00#ibcon#about to read 3, iclass 24, count 0 2006.229.15:05:05.02#ibcon#read 3, iclass 24, count 0 2006.229.15:05:05.02#ibcon#about to read 4, iclass 24, count 0 2006.229.15:05:05.02#ibcon#read 4, iclass 24, count 0 2006.229.15:05:05.02#ibcon#about to read 5, iclass 24, count 0 2006.229.15:05:05.02#ibcon#read 5, iclass 24, count 0 2006.229.15:05:05.02#ibcon#about to read 6, iclass 24, count 0 2006.229.15:05:05.02#ibcon#read 6, iclass 24, count 0 2006.229.15:05:05.02#ibcon#end of sib2, iclass 24, count 0 2006.229.15:05:05.02#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:05:05.02#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:05:05.02#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:05:05.02#ibcon#*before write, iclass 24, count 0 2006.229.15:05:05.02#ibcon#enter sib2, iclass 24, count 0 2006.229.15:05:05.02#ibcon#flushed, iclass 24, count 0 2006.229.15:05:05.02#ibcon#about to write, iclass 24, count 0 2006.229.15:05:05.02#ibcon#wrote, iclass 24, count 0 2006.229.15:05:05.02#ibcon#about to read 3, iclass 24, count 0 2006.229.15:05:05.06#ibcon#read 3, iclass 24, count 0 2006.229.15:05:05.06#ibcon#about to read 4, iclass 24, count 0 2006.229.15:05:05.06#ibcon#read 4, iclass 24, count 0 2006.229.15:05:05.06#ibcon#about to read 5, iclass 24, count 0 2006.229.15:05:05.06#ibcon#read 5, iclass 24, count 0 2006.229.15:05:05.06#ibcon#about to read 6, iclass 24, count 0 2006.229.15:05:05.06#ibcon#read 6, iclass 24, count 0 2006.229.15:05:05.06#ibcon#end of sib2, iclass 24, count 0 2006.229.15:05:05.06#ibcon#*after write, iclass 24, count 0 2006.229.15:05:05.06#ibcon#*before return 0, iclass 24, count 0 2006.229.15:05:05.06#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:05.06#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:05.06#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:05:05.06#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:05:05.06$vck44/va=6,4 2006.229.15:05:05.06#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:05:05.06#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:05:05.06#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:05.06#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:05.12#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:05.12#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:05.12#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:05:05.12#ibcon#first serial, iclass 26, count 2 2006.229.15:05:05.12#ibcon#enter sib2, iclass 26, count 2 2006.229.15:05:05.12#ibcon#flushed, iclass 26, count 2 2006.229.15:05:05.12#ibcon#about to write, iclass 26, count 2 2006.229.15:05:05.12#ibcon#wrote, iclass 26, count 2 2006.229.15:05:05.12#ibcon#about to read 3, iclass 26, count 2 2006.229.15:05:05.14#ibcon#read 3, iclass 26, count 2 2006.229.15:05:05.14#ibcon#about to read 4, iclass 26, count 2 2006.229.15:05:05.14#ibcon#read 4, iclass 26, count 2 2006.229.15:05:05.14#ibcon#about to read 5, iclass 26, count 2 2006.229.15:05:05.14#ibcon#read 5, iclass 26, count 2 2006.229.15:05:05.14#ibcon#about to read 6, iclass 26, count 2 2006.229.15:05:05.14#ibcon#read 6, iclass 26, count 2 2006.229.15:05:05.14#ibcon#end of sib2, iclass 26, count 2 2006.229.15:05:05.14#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:05:05.14#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:05:05.14#ibcon#[25=AT06-04\r\n] 2006.229.15:05:05.14#ibcon#*before write, iclass 26, count 2 2006.229.15:05:05.14#ibcon#enter sib2, iclass 26, count 2 2006.229.15:05:05.14#ibcon#flushed, iclass 26, count 2 2006.229.15:05:05.14#ibcon#about to write, iclass 26, count 2 2006.229.15:05:05.14#ibcon#wrote, iclass 26, count 2 2006.229.15:05:05.14#ibcon#about to read 3, iclass 26, count 2 2006.229.15:05:05.17#ibcon#read 3, iclass 26, count 2 2006.229.15:05:05.17#ibcon#about to read 4, iclass 26, count 2 2006.229.15:05:05.17#ibcon#read 4, iclass 26, count 2 2006.229.15:05:05.17#ibcon#about to read 5, iclass 26, count 2 2006.229.15:05:05.17#ibcon#read 5, iclass 26, count 2 2006.229.15:05:05.17#ibcon#about to read 6, iclass 26, count 2 2006.229.15:05:05.17#ibcon#read 6, iclass 26, count 2 2006.229.15:05:05.17#ibcon#end of sib2, iclass 26, count 2 2006.229.15:05:05.17#ibcon#*after write, iclass 26, count 2 2006.229.15:05:05.17#ibcon#*before return 0, iclass 26, count 2 2006.229.15:05:05.17#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:05.17#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:05.17#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:05:05.17#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:05.17#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:05.29#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:05.29#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:05.29#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:05:05.29#ibcon#first serial, iclass 26, count 0 2006.229.15:05:05.29#ibcon#enter sib2, iclass 26, count 0 2006.229.15:05:05.29#ibcon#flushed, iclass 26, count 0 2006.229.15:05:05.29#ibcon#about to write, iclass 26, count 0 2006.229.15:05:05.29#ibcon#wrote, iclass 26, count 0 2006.229.15:05:05.29#ibcon#about to read 3, iclass 26, count 0 2006.229.15:05:05.31#ibcon#read 3, iclass 26, count 0 2006.229.15:05:05.31#ibcon#about to read 4, iclass 26, count 0 2006.229.15:05:05.31#ibcon#read 4, iclass 26, count 0 2006.229.15:05:05.31#ibcon#about to read 5, iclass 26, count 0 2006.229.15:05:05.31#ibcon#read 5, iclass 26, count 0 2006.229.15:05:05.31#ibcon#about to read 6, iclass 26, count 0 2006.229.15:05:05.31#ibcon#read 6, iclass 26, count 0 2006.229.15:05:05.31#ibcon#end of sib2, iclass 26, count 0 2006.229.15:05:05.31#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:05:05.31#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:05:05.31#ibcon#[25=USB\r\n] 2006.229.15:05:05.31#ibcon#*before write, iclass 26, count 0 2006.229.15:05:05.31#ibcon#enter sib2, iclass 26, count 0 2006.229.15:05:05.31#ibcon#flushed, iclass 26, count 0 2006.229.15:05:05.31#ibcon#about to write, iclass 26, count 0 2006.229.15:05:05.31#ibcon#wrote, iclass 26, count 0 2006.229.15:05:05.31#ibcon#about to read 3, iclass 26, count 0 2006.229.15:05:05.34#ibcon#read 3, iclass 26, count 0 2006.229.15:05:05.34#ibcon#about to read 4, iclass 26, count 0 2006.229.15:05:05.34#ibcon#read 4, iclass 26, count 0 2006.229.15:05:05.34#ibcon#about to read 5, iclass 26, count 0 2006.229.15:05:05.34#ibcon#read 5, iclass 26, count 0 2006.229.15:05:05.34#ibcon#about to read 6, iclass 26, count 0 2006.229.15:05:05.34#ibcon#read 6, iclass 26, count 0 2006.229.15:05:05.34#ibcon#end of sib2, iclass 26, count 0 2006.229.15:05:05.34#ibcon#*after write, iclass 26, count 0 2006.229.15:05:05.34#ibcon#*before return 0, iclass 26, count 0 2006.229.15:05:05.34#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:05.34#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:05.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:05:05.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:05:05.34$vck44/valo=7,864.99 2006.229.15:05:05.34#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:05:05.34#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:05:05.34#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:05.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:05.34#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:05.34#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:05.34#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:05:05.34#ibcon#first serial, iclass 28, count 0 2006.229.15:05:05.34#ibcon#enter sib2, iclass 28, count 0 2006.229.15:05:05.34#ibcon#flushed, iclass 28, count 0 2006.229.15:05:05.34#ibcon#about to write, iclass 28, count 0 2006.229.15:05:05.34#ibcon#wrote, iclass 28, count 0 2006.229.15:05:05.34#ibcon#about to read 3, iclass 28, count 0 2006.229.15:05:05.36#ibcon#read 3, iclass 28, count 0 2006.229.15:05:05.36#ibcon#about to read 4, iclass 28, count 0 2006.229.15:05:05.36#ibcon#read 4, iclass 28, count 0 2006.229.15:05:05.36#ibcon#about to read 5, iclass 28, count 0 2006.229.15:05:05.36#ibcon#read 5, iclass 28, count 0 2006.229.15:05:05.36#ibcon#about to read 6, iclass 28, count 0 2006.229.15:05:05.36#ibcon#read 6, iclass 28, count 0 2006.229.15:05:05.36#ibcon#end of sib2, iclass 28, count 0 2006.229.15:05:05.36#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:05:05.36#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:05:05.36#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:05:05.36#ibcon#*before write, iclass 28, count 0 2006.229.15:05:05.36#ibcon#enter sib2, iclass 28, count 0 2006.229.15:05:05.36#ibcon#flushed, iclass 28, count 0 2006.229.15:05:05.36#ibcon#about to write, iclass 28, count 0 2006.229.15:05:05.36#ibcon#wrote, iclass 28, count 0 2006.229.15:05:05.36#ibcon#about to read 3, iclass 28, count 0 2006.229.15:05:05.40#ibcon#read 3, iclass 28, count 0 2006.229.15:05:05.40#ibcon#about to read 4, iclass 28, count 0 2006.229.15:05:05.40#ibcon#read 4, iclass 28, count 0 2006.229.15:05:05.40#ibcon#about to read 5, iclass 28, count 0 2006.229.15:05:05.40#ibcon#read 5, iclass 28, count 0 2006.229.15:05:05.40#ibcon#about to read 6, iclass 28, count 0 2006.229.15:05:05.40#ibcon#read 6, iclass 28, count 0 2006.229.15:05:05.40#ibcon#end of sib2, iclass 28, count 0 2006.229.15:05:05.40#ibcon#*after write, iclass 28, count 0 2006.229.15:05:05.40#ibcon#*before return 0, iclass 28, count 0 2006.229.15:05:05.40#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:05.40#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:05.40#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:05:05.40#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:05:05.40$vck44/va=7,5 2006.229.15:05:05.40#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:05:05.40#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:05:05.40#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:05.40#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:05.46#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:05.46#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:05.46#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:05:05.46#ibcon#first serial, iclass 30, count 2 2006.229.15:05:05.46#ibcon#enter sib2, iclass 30, count 2 2006.229.15:05:05.46#ibcon#flushed, iclass 30, count 2 2006.229.15:05:05.46#ibcon#about to write, iclass 30, count 2 2006.229.15:05:05.46#ibcon#wrote, iclass 30, count 2 2006.229.15:05:05.46#ibcon#about to read 3, iclass 30, count 2 2006.229.15:05:05.48#ibcon#read 3, iclass 30, count 2 2006.229.15:05:05.48#ibcon#about to read 4, iclass 30, count 2 2006.229.15:05:05.48#ibcon#read 4, iclass 30, count 2 2006.229.15:05:05.48#ibcon#about to read 5, iclass 30, count 2 2006.229.15:05:05.48#ibcon#read 5, iclass 30, count 2 2006.229.15:05:05.48#ibcon#about to read 6, iclass 30, count 2 2006.229.15:05:05.48#ibcon#read 6, iclass 30, count 2 2006.229.15:05:05.48#ibcon#end of sib2, iclass 30, count 2 2006.229.15:05:05.48#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:05:05.48#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:05:05.48#ibcon#[25=AT07-05\r\n] 2006.229.15:05:05.48#ibcon#*before write, iclass 30, count 2 2006.229.15:05:05.48#ibcon#enter sib2, iclass 30, count 2 2006.229.15:05:05.48#ibcon#flushed, iclass 30, count 2 2006.229.15:05:05.48#ibcon#about to write, iclass 30, count 2 2006.229.15:05:05.48#ibcon#wrote, iclass 30, count 2 2006.229.15:05:05.48#ibcon#about to read 3, iclass 30, count 2 2006.229.15:05:05.51#ibcon#read 3, iclass 30, count 2 2006.229.15:05:05.51#ibcon#about to read 4, iclass 30, count 2 2006.229.15:05:05.51#ibcon#read 4, iclass 30, count 2 2006.229.15:05:05.51#ibcon#about to read 5, iclass 30, count 2 2006.229.15:05:05.51#ibcon#read 5, iclass 30, count 2 2006.229.15:05:05.51#ibcon#about to read 6, iclass 30, count 2 2006.229.15:05:05.51#ibcon#read 6, iclass 30, count 2 2006.229.15:05:05.51#ibcon#end of sib2, iclass 30, count 2 2006.229.15:05:05.51#ibcon#*after write, iclass 30, count 2 2006.229.15:05:05.51#ibcon#*before return 0, iclass 30, count 2 2006.229.15:05:05.51#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:05.51#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:05.51#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:05:05.51#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:05.51#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:05.63#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:05.63#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:05.63#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:05:05.63#ibcon#first serial, iclass 30, count 0 2006.229.15:05:05.63#ibcon#enter sib2, iclass 30, count 0 2006.229.15:05:05.63#ibcon#flushed, iclass 30, count 0 2006.229.15:05:05.63#ibcon#about to write, iclass 30, count 0 2006.229.15:05:05.63#ibcon#wrote, iclass 30, count 0 2006.229.15:05:05.63#ibcon#about to read 3, iclass 30, count 0 2006.229.15:05:05.65#ibcon#read 3, iclass 30, count 0 2006.229.15:05:05.65#ibcon#about to read 4, iclass 30, count 0 2006.229.15:05:05.65#ibcon#read 4, iclass 30, count 0 2006.229.15:05:05.65#ibcon#about to read 5, iclass 30, count 0 2006.229.15:05:05.65#ibcon#read 5, iclass 30, count 0 2006.229.15:05:05.65#ibcon#about to read 6, iclass 30, count 0 2006.229.15:05:05.65#ibcon#read 6, iclass 30, count 0 2006.229.15:05:05.65#ibcon#end of sib2, iclass 30, count 0 2006.229.15:05:05.65#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:05:05.65#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:05:05.65#ibcon#[25=USB\r\n] 2006.229.15:05:05.65#ibcon#*before write, iclass 30, count 0 2006.229.15:05:05.65#ibcon#enter sib2, iclass 30, count 0 2006.229.15:05:05.65#ibcon#flushed, iclass 30, count 0 2006.229.15:05:05.65#ibcon#about to write, iclass 30, count 0 2006.229.15:05:05.65#ibcon#wrote, iclass 30, count 0 2006.229.15:05:05.65#ibcon#about to read 3, iclass 30, count 0 2006.229.15:05:05.68#ibcon#read 3, iclass 30, count 0 2006.229.15:05:05.68#ibcon#about to read 4, iclass 30, count 0 2006.229.15:05:05.68#ibcon#read 4, iclass 30, count 0 2006.229.15:05:05.68#ibcon#about to read 5, iclass 30, count 0 2006.229.15:05:05.68#ibcon#read 5, iclass 30, count 0 2006.229.15:05:05.68#ibcon#about to read 6, iclass 30, count 0 2006.229.15:05:05.68#ibcon#read 6, iclass 30, count 0 2006.229.15:05:05.68#ibcon#end of sib2, iclass 30, count 0 2006.229.15:05:05.68#ibcon#*after write, iclass 30, count 0 2006.229.15:05:05.68#ibcon#*before return 0, iclass 30, count 0 2006.229.15:05:05.68#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:05.68#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:05.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:05:05.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:05:05.68$vck44/valo=8,884.99 2006.229.15:05:05.68#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:05:05.68#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:05:05.68#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:05.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:05.68#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:05.68#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:05.68#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:05:05.68#ibcon#first serial, iclass 32, count 0 2006.229.15:05:05.68#ibcon#enter sib2, iclass 32, count 0 2006.229.15:05:05.68#ibcon#flushed, iclass 32, count 0 2006.229.15:05:05.68#ibcon#about to write, iclass 32, count 0 2006.229.15:05:05.68#ibcon#wrote, iclass 32, count 0 2006.229.15:05:05.68#ibcon#about to read 3, iclass 32, count 0 2006.229.15:05:05.70#ibcon#read 3, iclass 32, count 0 2006.229.15:05:05.70#ibcon#about to read 4, iclass 32, count 0 2006.229.15:05:05.70#ibcon#read 4, iclass 32, count 0 2006.229.15:05:05.70#ibcon#about to read 5, iclass 32, count 0 2006.229.15:05:05.70#ibcon#read 5, iclass 32, count 0 2006.229.15:05:05.70#ibcon#about to read 6, iclass 32, count 0 2006.229.15:05:05.70#ibcon#read 6, iclass 32, count 0 2006.229.15:05:05.70#ibcon#end of sib2, iclass 32, count 0 2006.229.15:05:05.70#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:05:05.70#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:05:05.70#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:05:05.70#ibcon#*before write, iclass 32, count 0 2006.229.15:05:05.70#ibcon#enter sib2, iclass 32, count 0 2006.229.15:05:05.70#ibcon#flushed, iclass 32, count 0 2006.229.15:05:05.70#ibcon#about to write, iclass 32, count 0 2006.229.15:05:05.70#ibcon#wrote, iclass 32, count 0 2006.229.15:05:05.70#ibcon#about to read 3, iclass 32, count 0 2006.229.15:05:05.74#ibcon#read 3, iclass 32, count 0 2006.229.15:05:05.74#ibcon#about to read 4, iclass 32, count 0 2006.229.15:05:05.74#ibcon#read 4, iclass 32, count 0 2006.229.15:05:05.74#ibcon#about to read 5, iclass 32, count 0 2006.229.15:05:05.74#ibcon#read 5, iclass 32, count 0 2006.229.15:05:05.74#ibcon#about to read 6, iclass 32, count 0 2006.229.15:05:05.74#ibcon#read 6, iclass 32, count 0 2006.229.15:05:05.74#ibcon#end of sib2, iclass 32, count 0 2006.229.15:05:05.74#ibcon#*after write, iclass 32, count 0 2006.229.15:05:05.74#ibcon#*before return 0, iclass 32, count 0 2006.229.15:05:05.74#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:05.74#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:05.74#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:05:05.74#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:05:05.74$vck44/va=8,6 2006.229.15:05:05.74#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.15:05:05.74#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.15:05:05.74#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:05.74#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:05:05.80#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:05:05.80#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:05:05.80#ibcon#enter wrdev, iclass 34, count 2 2006.229.15:05:05.80#ibcon#first serial, iclass 34, count 2 2006.229.15:05:05.80#ibcon#enter sib2, iclass 34, count 2 2006.229.15:05:05.80#ibcon#flushed, iclass 34, count 2 2006.229.15:05:05.80#ibcon#about to write, iclass 34, count 2 2006.229.15:05:05.80#ibcon#wrote, iclass 34, count 2 2006.229.15:05:05.80#ibcon#about to read 3, iclass 34, count 2 2006.229.15:05:05.82#ibcon#read 3, iclass 34, count 2 2006.229.15:05:05.82#ibcon#about to read 4, iclass 34, count 2 2006.229.15:05:05.82#ibcon#read 4, iclass 34, count 2 2006.229.15:05:05.82#ibcon#about to read 5, iclass 34, count 2 2006.229.15:05:05.82#ibcon#read 5, iclass 34, count 2 2006.229.15:05:05.82#ibcon#about to read 6, iclass 34, count 2 2006.229.15:05:05.82#ibcon#read 6, iclass 34, count 2 2006.229.15:05:05.82#ibcon#end of sib2, iclass 34, count 2 2006.229.15:05:05.82#ibcon#*mode == 0, iclass 34, count 2 2006.229.15:05:05.82#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.15:05:05.82#ibcon#[25=AT08-06\r\n] 2006.229.15:05:05.82#ibcon#*before write, iclass 34, count 2 2006.229.15:05:05.82#ibcon#enter sib2, iclass 34, count 2 2006.229.15:05:05.82#ibcon#flushed, iclass 34, count 2 2006.229.15:05:05.82#ibcon#about to write, iclass 34, count 2 2006.229.15:05:05.82#ibcon#wrote, iclass 34, count 2 2006.229.15:05:05.82#ibcon#about to read 3, iclass 34, count 2 2006.229.15:05:05.85#ibcon#read 3, iclass 34, count 2 2006.229.15:05:05.85#ibcon#about to read 4, iclass 34, count 2 2006.229.15:05:05.85#ibcon#read 4, iclass 34, count 2 2006.229.15:05:05.85#ibcon#about to read 5, iclass 34, count 2 2006.229.15:05:05.85#ibcon#read 5, iclass 34, count 2 2006.229.15:05:05.85#ibcon#about to read 6, iclass 34, count 2 2006.229.15:05:05.85#ibcon#read 6, iclass 34, count 2 2006.229.15:05:05.85#ibcon#end of sib2, iclass 34, count 2 2006.229.15:05:05.85#ibcon#*after write, iclass 34, count 2 2006.229.15:05:05.85#ibcon#*before return 0, iclass 34, count 2 2006.229.15:05:05.85#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:05:05.85#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:05:05.85#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.15:05:05.85#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:05.85#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:05:05.97#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:05:05.97#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:05:05.97#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:05:05.97#ibcon#first serial, iclass 34, count 0 2006.229.15:05:05.97#ibcon#enter sib2, iclass 34, count 0 2006.229.15:05:05.97#ibcon#flushed, iclass 34, count 0 2006.229.15:05:05.97#ibcon#about to write, iclass 34, count 0 2006.229.15:05:05.97#ibcon#wrote, iclass 34, count 0 2006.229.15:05:05.97#ibcon#about to read 3, iclass 34, count 0 2006.229.15:05:05.99#ibcon#read 3, iclass 34, count 0 2006.229.15:05:05.99#ibcon#about to read 4, iclass 34, count 0 2006.229.15:05:05.99#ibcon#read 4, iclass 34, count 0 2006.229.15:05:05.99#ibcon#about to read 5, iclass 34, count 0 2006.229.15:05:05.99#ibcon#read 5, iclass 34, count 0 2006.229.15:05:05.99#ibcon#about to read 6, iclass 34, count 0 2006.229.15:05:05.99#ibcon#read 6, iclass 34, count 0 2006.229.15:05:05.99#ibcon#end of sib2, iclass 34, count 0 2006.229.15:05:05.99#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:05:05.99#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:05:05.99#ibcon#[25=USB\r\n] 2006.229.15:05:05.99#ibcon#*before write, iclass 34, count 0 2006.229.15:05:05.99#ibcon#enter sib2, iclass 34, count 0 2006.229.15:05:05.99#ibcon#flushed, iclass 34, count 0 2006.229.15:05:05.99#ibcon#about to write, iclass 34, count 0 2006.229.15:05:05.99#ibcon#wrote, iclass 34, count 0 2006.229.15:05:05.99#ibcon#about to read 3, iclass 34, count 0 2006.229.15:05:06.02#ibcon#read 3, iclass 34, count 0 2006.229.15:05:06.02#ibcon#about to read 4, iclass 34, count 0 2006.229.15:05:06.02#ibcon#read 4, iclass 34, count 0 2006.229.15:05:06.02#ibcon#about to read 5, iclass 34, count 0 2006.229.15:05:06.02#ibcon#read 5, iclass 34, count 0 2006.229.15:05:06.02#ibcon#about to read 6, iclass 34, count 0 2006.229.15:05:06.02#ibcon#read 6, iclass 34, count 0 2006.229.15:05:06.02#ibcon#end of sib2, iclass 34, count 0 2006.229.15:05:06.02#ibcon#*after write, iclass 34, count 0 2006.229.15:05:06.02#ibcon#*before return 0, iclass 34, count 0 2006.229.15:05:06.02#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:05:06.02#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:05:06.02#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:05:06.02#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:05:06.02$vck44/vblo=1,629.99 2006.229.15:05:06.02#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.15:05:06.02#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.15:05:06.02#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:06.02#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:05:06.02#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:05:06.02#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:05:06.02#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:05:06.02#ibcon#first serial, iclass 36, count 0 2006.229.15:05:06.02#ibcon#enter sib2, iclass 36, count 0 2006.229.15:05:06.02#ibcon#flushed, iclass 36, count 0 2006.229.15:05:06.02#ibcon#about to write, iclass 36, count 0 2006.229.15:05:06.02#ibcon#wrote, iclass 36, count 0 2006.229.15:05:06.02#ibcon#about to read 3, iclass 36, count 0 2006.229.15:05:06.04#ibcon#read 3, iclass 36, count 0 2006.229.15:05:06.04#ibcon#about to read 4, iclass 36, count 0 2006.229.15:05:06.04#ibcon#read 4, iclass 36, count 0 2006.229.15:05:06.04#ibcon#about to read 5, iclass 36, count 0 2006.229.15:05:06.04#ibcon#read 5, iclass 36, count 0 2006.229.15:05:06.04#ibcon#about to read 6, iclass 36, count 0 2006.229.15:05:06.04#ibcon#read 6, iclass 36, count 0 2006.229.15:05:06.04#ibcon#end of sib2, iclass 36, count 0 2006.229.15:05:06.04#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:05:06.04#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:05:06.04#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:05:06.04#ibcon#*before write, iclass 36, count 0 2006.229.15:05:06.04#ibcon#enter sib2, iclass 36, count 0 2006.229.15:05:06.04#ibcon#flushed, iclass 36, count 0 2006.229.15:05:06.04#ibcon#about to write, iclass 36, count 0 2006.229.15:05:06.04#ibcon#wrote, iclass 36, count 0 2006.229.15:05:06.04#ibcon#about to read 3, iclass 36, count 0 2006.229.15:05:06.08#ibcon#read 3, iclass 36, count 0 2006.229.15:05:06.08#ibcon#about to read 4, iclass 36, count 0 2006.229.15:05:06.08#ibcon#read 4, iclass 36, count 0 2006.229.15:05:06.08#ibcon#about to read 5, iclass 36, count 0 2006.229.15:05:06.08#ibcon#read 5, iclass 36, count 0 2006.229.15:05:06.08#ibcon#about to read 6, iclass 36, count 0 2006.229.15:05:06.08#ibcon#read 6, iclass 36, count 0 2006.229.15:05:06.08#ibcon#end of sib2, iclass 36, count 0 2006.229.15:05:06.08#ibcon#*after write, iclass 36, count 0 2006.229.15:05:06.08#ibcon#*before return 0, iclass 36, count 0 2006.229.15:05:06.08#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:05:06.08#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:05:06.08#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:05:06.08#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:05:06.08$vck44/vb=1,4 2006.229.15:05:06.08#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.15:05:06.08#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.15:05:06.08#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:06.08#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:05:06.08#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:05:06.08#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:05:06.08#ibcon#enter wrdev, iclass 38, count 2 2006.229.15:05:06.08#ibcon#first serial, iclass 38, count 2 2006.229.15:05:06.08#ibcon#enter sib2, iclass 38, count 2 2006.229.15:05:06.08#ibcon#flushed, iclass 38, count 2 2006.229.15:05:06.08#ibcon#about to write, iclass 38, count 2 2006.229.15:05:06.08#ibcon#wrote, iclass 38, count 2 2006.229.15:05:06.08#ibcon#about to read 3, iclass 38, count 2 2006.229.15:05:06.10#ibcon#read 3, iclass 38, count 2 2006.229.15:05:06.10#ibcon#about to read 4, iclass 38, count 2 2006.229.15:05:06.10#ibcon#read 4, iclass 38, count 2 2006.229.15:05:06.10#ibcon#about to read 5, iclass 38, count 2 2006.229.15:05:06.10#ibcon#read 5, iclass 38, count 2 2006.229.15:05:06.10#ibcon#about to read 6, iclass 38, count 2 2006.229.15:05:06.10#ibcon#read 6, iclass 38, count 2 2006.229.15:05:06.10#ibcon#end of sib2, iclass 38, count 2 2006.229.15:05:06.10#ibcon#*mode == 0, iclass 38, count 2 2006.229.15:05:06.10#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.15:05:06.10#ibcon#[27=AT01-04\r\n] 2006.229.15:05:06.10#ibcon#*before write, iclass 38, count 2 2006.229.15:05:06.10#ibcon#enter sib2, iclass 38, count 2 2006.229.15:05:06.10#ibcon#flushed, iclass 38, count 2 2006.229.15:05:06.10#ibcon#about to write, iclass 38, count 2 2006.229.15:05:06.10#ibcon#wrote, iclass 38, count 2 2006.229.15:05:06.10#ibcon#about to read 3, iclass 38, count 2 2006.229.15:05:06.13#ibcon#read 3, iclass 38, count 2 2006.229.15:05:06.13#ibcon#about to read 4, iclass 38, count 2 2006.229.15:05:06.13#ibcon#read 4, iclass 38, count 2 2006.229.15:05:06.13#ibcon#about to read 5, iclass 38, count 2 2006.229.15:05:06.13#ibcon#read 5, iclass 38, count 2 2006.229.15:05:06.13#ibcon#about to read 6, iclass 38, count 2 2006.229.15:05:06.13#ibcon#read 6, iclass 38, count 2 2006.229.15:05:06.13#ibcon#end of sib2, iclass 38, count 2 2006.229.15:05:06.13#ibcon#*after write, iclass 38, count 2 2006.229.15:05:06.13#ibcon#*before return 0, iclass 38, count 2 2006.229.15:05:06.13#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:05:06.13#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:05:06.13#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.15:05:06.13#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:06.13#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:05:06.25#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:05:06.25#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:05:06.25#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:05:06.25#ibcon#first serial, iclass 38, count 0 2006.229.15:05:06.25#ibcon#enter sib2, iclass 38, count 0 2006.229.15:05:06.25#ibcon#flushed, iclass 38, count 0 2006.229.15:05:06.25#ibcon#about to write, iclass 38, count 0 2006.229.15:05:06.25#ibcon#wrote, iclass 38, count 0 2006.229.15:05:06.25#ibcon#about to read 3, iclass 38, count 0 2006.229.15:05:06.27#ibcon#read 3, iclass 38, count 0 2006.229.15:05:06.27#ibcon#about to read 4, iclass 38, count 0 2006.229.15:05:06.27#ibcon#read 4, iclass 38, count 0 2006.229.15:05:06.27#ibcon#about to read 5, iclass 38, count 0 2006.229.15:05:06.27#ibcon#read 5, iclass 38, count 0 2006.229.15:05:06.27#ibcon#about to read 6, iclass 38, count 0 2006.229.15:05:06.27#ibcon#read 6, iclass 38, count 0 2006.229.15:05:06.27#ibcon#end of sib2, iclass 38, count 0 2006.229.15:05:06.27#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:05:06.27#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:05:06.27#ibcon#[27=USB\r\n] 2006.229.15:05:06.27#ibcon#*before write, iclass 38, count 0 2006.229.15:05:06.27#ibcon#enter sib2, iclass 38, count 0 2006.229.15:05:06.27#ibcon#flushed, iclass 38, count 0 2006.229.15:05:06.27#ibcon#about to write, iclass 38, count 0 2006.229.15:05:06.27#ibcon#wrote, iclass 38, count 0 2006.229.15:05:06.27#ibcon#about to read 3, iclass 38, count 0 2006.229.15:05:06.30#ibcon#read 3, iclass 38, count 0 2006.229.15:05:06.30#ibcon#about to read 4, iclass 38, count 0 2006.229.15:05:06.30#ibcon#read 4, iclass 38, count 0 2006.229.15:05:06.30#ibcon#about to read 5, iclass 38, count 0 2006.229.15:05:06.30#ibcon#read 5, iclass 38, count 0 2006.229.15:05:06.30#ibcon#about to read 6, iclass 38, count 0 2006.229.15:05:06.30#ibcon#read 6, iclass 38, count 0 2006.229.15:05:06.30#ibcon#end of sib2, iclass 38, count 0 2006.229.15:05:06.30#ibcon#*after write, iclass 38, count 0 2006.229.15:05:06.30#ibcon#*before return 0, iclass 38, count 0 2006.229.15:05:06.30#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:05:06.30#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:05:06.30#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:05:06.30#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:05:06.30$vck44/vblo=2,634.99 2006.229.15:05:06.30#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:05:06.30#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:05:06.30#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:06.30#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:06.30#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:06.30#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:06.30#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:05:06.30#ibcon#first serial, iclass 40, count 0 2006.229.15:05:06.30#ibcon#enter sib2, iclass 40, count 0 2006.229.15:05:06.30#ibcon#flushed, iclass 40, count 0 2006.229.15:05:06.30#ibcon#about to write, iclass 40, count 0 2006.229.15:05:06.30#ibcon#wrote, iclass 40, count 0 2006.229.15:05:06.30#ibcon#about to read 3, iclass 40, count 0 2006.229.15:05:06.32#ibcon#read 3, iclass 40, count 0 2006.229.15:05:06.32#ibcon#about to read 4, iclass 40, count 0 2006.229.15:05:06.32#ibcon#read 4, iclass 40, count 0 2006.229.15:05:06.32#ibcon#about to read 5, iclass 40, count 0 2006.229.15:05:06.32#ibcon#read 5, iclass 40, count 0 2006.229.15:05:06.32#ibcon#about to read 6, iclass 40, count 0 2006.229.15:05:06.32#ibcon#read 6, iclass 40, count 0 2006.229.15:05:06.32#ibcon#end of sib2, iclass 40, count 0 2006.229.15:05:06.32#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:05:06.32#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:05:06.32#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:05:06.32#ibcon#*before write, iclass 40, count 0 2006.229.15:05:06.32#ibcon#enter sib2, iclass 40, count 0 2006.229.15:05:06.32#ibcon#flushed, iclass 40, count 0 2006.229.15:05:06.32#ibcon#about to write, iclass 40, count 0 2006.229.15:05:06.32#ibcon#wrote, iclass 40, count 0 2006.229.15:05:06.32#ibcon#about to read 3, iclass 40, count 0 2006.229.15:05:06.36#ibcon#read 3, iclass 40, count 0 2006.229.15:05:06.36#ibcon#about to read 4, iclass 40, count 0 2006.229.15:05:06.36#ibcon#read 4, iclass 40, count 0 2006.229.15:05:06.36#ibcon#about to read 5, iclass 40, count 0 2006.229.15:05:06.36#ibcon#read 5, iclass 40, count 0 2006.229.15:05:06.36#ibcon#about to read 6, iclass 40, count 0 2006.229.15:05:06.36#ibcon#read 6, iclass 40, count 0 2006.229.15:05:06.36#ibcon#end of sib2, iclass 40, count 0 2006.229.15:05:06.36#ibcon#*after write, iclass 40, count 0 2006.229.15:05:06.36#ibcon#*before return 0, iclass 40, count 0 2006.229.15:05:06.36#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:06.36#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:05:06.36#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:05:06.36#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:05:06.36$vck44/vb=2,4 2006.229.15:05:06.36#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:05:06.36#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:05:06.36#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:06.36#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:06.42#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:06.42#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:06.42#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:05:06.42#ibcon#first serial, iclass 4, count 2 2006.229.15:05:06.42#ibcon#enter sib2, iclass 4, count 2 2006.229.15:05:06.42#ibcon#flushed, iclass 4, count 2 2006.229.15:05:06.42#ibcon#about to write, iclass 4, count 2 2006.229.15:05:06.42#ibcon#wrote, iclass 4, count 2 2006.229.15:05:06.42#ibcon#about to read 3, iclass 4, count 2 2006.229.15:05:06.44#ibcon#read 3, iclass 4, count 2 2006.229.15:05:06.44#ibcon#about to read 4, iclass 4, count 2 2006.229.15:05:06.44#ibcon#read 4, iclass 4, count 2 2006.229.15:05:06.44#ibcon#about to read 5, iclass 4, count 2 2006.229.15:05:06.44#ibcon#read 5, iclass 4, count 2 2006.229.15:05:06.44#ibcon#about to read 6, iclass 4, count 2 2006.229.15:05:06.44#ibcon#read 6, iclass 4, count 2 2006.229.15:05:06.44#ibcon#end of sib2, iclass 4, count 2 2006.229.15:05:06.44#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:05:06.44#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:05:06.44#ibcon#[27=AT02-04\r\n] 2006.229.15:05:06.44#ibcon#*before write, iclass 4, count 2 2006.229.15:05:06.44#ibcon#enter sib2, iclass 4, count 2 2006.229.15:05:06.44#ibcon#flushed, iclass 4, count 2 2006.229.15:05:06.44#ibcon#about to write, iclass 4, count 2 2006.229.15:05:06.44#ibcon#wrote, iclass 4, count 2 2006.229.15:05:06.44#ibcon#about to read 3, iclass 4, count 2 2006.229.15:05:06.47#ibcon#read 3, iclass 4, count 2 2006.229.15:05:06.47#ibcon#about to read 4, iclass 4, count 2 2006.229.15:05:06.47#ibcon#read 4, iclass 4, count 2 2006.229.15:05:06.47#ibcon#about to read 5, iclass 4, count 2 2006.229.15:05:06.47#ibcon#read 5, iclass 4, count 2 2006.229.15:05:06.47#ibcon#about to read 6, iclass 4, count 2 2006.229.15:05:06.47#ibcon#read 6, iclass 4, count 2 2006.229.15:05:06.47#ibcon#end of sib2, iclass 4, count 2 2006.229.15:05:06.47#ibcon#*after write, iclass 4, count 2 2006.229.15:05:06.47#ibcon#*before return 0, iclass 4, count 2 2006.229.15:05:06.47#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:06.47#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:05:06.47#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:05:06.47#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:06.47#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:06.59#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:06.59#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:06.59#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:05:06.59#ibcon#first serial, iclass 4, count 0 2006.229.15:05:06.59#ibcon#enter sib2, iclass 4, count 0 2006.229.15:05:06.59#ibcon#flushed, iclass 4, count 0 2006.229.15:05:06.59#ibcon#about to write, iclass 4, count 0 2006.229.15:05:06.59#ibcon#wrote, iclass 4, count 0 2006.229.15:05:06.59#ibcon#about to read 3, iclass 4, count 0 2006.229.15:05:06.61#ibcon#read 3, iclass 4, count 0 2006.229.15:05:06.61#ibcon#about to read 4, iclass 4, count 0 2006.229.15:05:06.61#ibcon#read 4, iclass 4, count 0 2006.229.15:05:06.61#ibcon#about to read 5, iclass 4, count 0 2006.229.15:05:06.61#ibcon#read 5, iclass 4, count 0 2006.229.15:05:06.61#ibcon#about to read 6, iclass 4, count 0 2006.229.15:05:06.61#ibcon#read 6, iclass 4, count 0 2006.229.15:05:06.61#ibcon#end of sib2, iclass 4, count 0 2006.229.15:05:06.61#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:05:06.61#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:05:06.61#ibcon#[27=USB\r\n] 2006.229.15:05:06.61#ibcon#*before write, iclass 4, count 0 2006.229.15:05:06.61#ibcon#enter sib2, iclass 4, count 0 2006.229.15:05:06.61#ibcon#flushed, iclass 4, count 0 2006.229.15:05:06.61#ibcon#about to write, iclass 4, count 0 2006.229.15:05:06.61#ibcon#wrote, iclass 4, count 0 2006.229.15:05:06.61#ibcon#about to read 3, iclass 4, count 0 2006.229.15:05:06.64#ibcon#read 3, iclass 4, count 0 2006.229.15:05:06.64#ibcon#about to read 4, iclass 4, count 0 2006.229.15:05:06.64#ibcon#read 4, iclass 4, count 0 2006.229.15:05:06.64#ibcon#about to read 5, iclass 4, count 0 2006.229.15:05:06.64#ibcon#read 5, iclass 4, count 0 2006.229.15:05:06.64#ibcon#about to read 6, iclass 4, count 0 2006.229.15:05:06.64#ibcon#read 6, iclass 4, count 0 2006.229.15:05:06.64#ibcon#end of sib2, iclass 4, count 0 2006.229.15:05:06.64#ibcon#*after write, iclass 4, count 0 2006.229.15:05:06.64#ibcon#*before return 0, iclass 4, count 0 2006.229.15:05:06.64#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:06.64#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:05:06.64#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:05:06.64#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:05:06.64$vck44/vblo=3,649.99 2006.229.15:05:06.64#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:05:06.64#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:05:06.64#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:06.64#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:06.64#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:06.64#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:06.64#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:05:06.64#ibcon#first serial, iclass 6, count 0 2006.229.15:05:06.64#ibcon#enter sib2, iclass 6, count 0 2006.229.15:05:06.64#ibcon#flushed, iclass 6, count 0 2006.229.15:05:06.64#ibcon#about to write, iclass 6, count 0 2006.229.15:05:06.64#ibcon#wrote, iclass 6, count 0 2006.229.15:05:06.64#ibcon#about to read 3, iclass 6, count 0 2006.229.15:05:06.66#ibcon#read 3, iclass 6, count 0 2006.229.15:05:06.66#ibcon#about to read 4, iclass 6, count 0 2006.229.15:05:06.66#ibcon#read 4, iclass 6, count 0 2006.229.15:05:06.66#ibcon#about to read 5, iclass 6, count 0 2006.229.15:05:06.66#ibcon#read 5, iclass 6, count 0 2006.229.15:05:06.66#ibcon#about to read 6, iclass 6, count 0 2006.229.15:05:06.66#ibcon#read 6, iclass 6, count 0 2006.229.15:05:06.66#ibcon#end of sib2, iclass 6, count 0 2006.229.15:05:06.66#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:05:06.66#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:05:06.66#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:05:06.66#ibcon#*before write, iclass 6, count 0 2006.229.15:05:06.66#ibcon#enter sib2, iclass 6, count 0 2006.229.15:05:06.66#ibcon#flushed, iclass 6, count 0 2006.229.15:05:06.66#ibcon#about to write, iclass 6, count 0 2006.229.15:05:06.66#ibcon#wrote, iclass 6, count 0 2006.229.15:05:06.66#ibcon#about to read 3, iclass 6, count 0 2006.229.15:05:06.70#ibcon#read 3, iclass 6, count 0 2006.229.15:05:06.70#ibcon#about to read 4, iclass 6, count 0 2006.229.15:05:06.70#ibcon#read 4, iclass 6, count 0 2006.229.15:05:06.70#ibcon#about to read 5, iclass 6, count 0 2006.229.15:05:06.70#ibcon#read 5, iclass 6, count 0 2006.229.15:05:06.70#ibcon#about to read 6, iclass 6, count 0 2006.229.15:05:06.70#ibcon#read 6, iclass 6, count 0 2006.229.15:05:06.70#ibcon#end of sib2, iclass 6, count 0 2006.229.15:05:06.70#ibcon#*after write, iclass 6, count 0 2006.229.15:05:06.70#ibcon#*before return 0, iclass 6, count 0 2006.229.15:05:06.70#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:06.70#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:05:06.70#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:05:06.70#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:05:06.70$vck44/vb=3,4 2006.229.15:05:06.70#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:05:06.70#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:05:06.70#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:06.70#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:06.76#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:06.76#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:06.76#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:05:06.76#ibcon#first serial, iclass 10, count 2 2006.229.15:05:06.76#ibcon#enter sib2, iclass 10, count 2 2006.229.15:05:06.76#ibcon#flushed, iclass 10, count 2 2006.229.15:05:06.76#ibcon#about to write, iclass 10, count 2 2006.229.15:05:06.76#ibcon#wrote, iclass 10, count 2 2006.229.15:05:06.76#ibcon#about to read 3, iclass 10, count 2 2006.229.15:05:06.78#ibcon#read 3, iclass 10, count 2 2006.229.15:05:06.78#ibcon#about to read 4, iclass 10, count 2 2006.229.15:05:06.78#ibcon#read 4, iclass 10, count 2 2006.229.15:05:06.78#ibcon#about to read 5, iclass 10, count 2 2006.229.15:05:06.78#ibcon#read 5, iclass 10, count 2 2006.229.15:05:06.78#ibcon#about to read 6, iclass 10, count 2 2006.229.15:05:06.78#ibcon#read 6, iclass 10, count 2 2006.229.15:05:06.78#ibcon#end of sib2, iclass 10, count 2 2006.229.15:05:06.78#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:05:06.78#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:05:06.78#ibcon#[27=AT03-04\r\n] 2006.229.15:05:06.78#ibcon#*before write, iclass 10, count 2 2006.229.15:05:06.78#ibcon#enter sib2, iclass 10, count 2 2006.229.15:05:06.78#ibcon#flushed, iclass 10, count 2 2006.229.15:05:06.78#ibcon#about to write, iclass 10, count 2 2006.229.15:05:06.78#ibcon#wrote, iclass 10, count 2 2006.229.15:05:06.78#ibcon#about to read 3, iclass 10, count 2 2006.229.15:05:06.81#ibcon#read 3, iclass 10, count 2 2006.229.15:05:06.81#ibcon#about to read 4, iclass 10, count 2 2006.229.15:05:06.81#ibcon#read 4, iclass 10, count 2 2006.229.15:05:06.81#ibcon#about to read 5, iclass 10, count 2 2006.229.15:05:06.81#ibcon#read 5, iclass 10, count 2 2006.229.15:05:06.81#ibcon#about to read 6, iclass 10, count 2 2006.229.15:05:06.81#ibcon#read 6, iclass 10, count 2 2006.229.15:05:06.81#ibcon#end of sib2, iclass 10, count 2 2006.229.15:05:06.81#ibcon#*after write, iclass 10, count 2 2006.229.15:05:06.81#ibcon#*before return 0, iclass 10, count 2 2006.229.15:05:06.81#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:06.81#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:05:06.81#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:05:06.81#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:06.81#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:06.93#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:06.93#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:06.93#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:05:06.93#ibcon#first serial, iclass 10, count 0 2006.229.15:05:06.93#ibcon#enter sib2, iclass 10, count 0 2006.229.15:05:06.93#ibcon#flushed, iclass 10, count 0 2006.229.15:05:06.93#ibcon#about to write, iclass 10, count 0 2006.229.15:05:06.93#ibcon#wrote, iclass 10, count 0 2006.229.15:05:06.93#ibcon#about to read 3, iclass 10, count 0 2006.229.15:05:06.95#ibcon#read 3, iclass 10, count 0 2006.229.15:05:06.95#ibcon#about to read 4, iclass 10, count 0 2006.229.15:05:06.95#ibcon#read 4, iclass 10, count 0 2006.229.15:05:06.95#ibcon#about to read 5, iclass 10, count 0 2006.229.15:05:06.95#ibcon#read 5, iclass 10, count 0 2006.229.15:05:06.95#ibcon#about to read 6, iclass 10, count 0 2006.229.15:05:06.95#ibcon#read 6, iclass 10, count 0 2006.229.15:05:06.95#ibcon#end of sib2, iclass 10, count 0 2006.229.15:05:06.95#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:05:06.95#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:05:06.95#ibcon#[27=USB\r\n] 2006.229.15:05:06.95#ibcon#*before write, iclass 10, count 0 2006.229.15:05:06.95#ibcon#enter sib2, iclass 10, count 0 2006.229.15:05:06.95#ibcon#flushed, iclass 10, count 0 2006.229.15:05:06.95#ibcon#about to write, iclass 10, count 0 2006.229.15:05:06.95#ibcon#wrote, iclass 10, count 0 2006.229.15:05:06.95#ibcon#about to read 3, iclass 10, count 0 2006.229.15:05:06.98#ibcon#read 3, iclass 10, count 0 2006.229.15:05:06.98#ibcon#about to read 4, iclass 10, count 0 2006.229.15:05:06.98#ibcon#read 4, iclass 10, count 0 2006.229.15:05:06.98#ibcon#about to read 5, iclass 10, count 0 2006.229.15:05:06.98#ibcon#read 5, iclass 10, count 0 2006.229.15:05:06.98#ibcon#about to read 6, iclass 10, count 0 2006.229.15:05:06.98#ibcon#read 6, iclass 10, count 0 2006.229.15:05:06.98#ibcon#end of sib2, iclass 10, count 0 2006.229.15:05:06.98#ibcon#*after write, iclass 10, count 0 2006.229.15:05:06.98#ibcon#*before return 0, iclass 10, count 0 2006.229.15:05:06.98#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:06.98#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:05:06.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:05:06.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:05:06.98$vck44/vblo=4,679.99 2006.229.15:05:06.98#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:05:06.98#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:05:06.98#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:06.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:06.98#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:06.98#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:06.98#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:05:06.98#ibcon#first serial, iclass 12, count 0 2006.229.15:05:06.98#ibcon#enter sib2, iclass 12, count 0 2006.229.15:05:06.98#ibcon#flushed, iclass 12, count 0 2006.229.15:05:06.98#ibcon#about to write, iclass 12, count 0 2006.229.15:05:06.98#ibcon#wrote, iclass 12, count 0 2006.229.15:05:06.98#ibcon#about to read 3, iclass 12, count 0 2006.229.15:05:07.00#ibcon#read 3, iclass 12, count 0 2006.229.15:05:07.00#ibcon#about to read 4, iclass 12, count 0 2006.229.15:05:07.00#ibcon#read 4, iclass 12, count 0 2006.229.15:05:07.00#ibcon#about to read 5, iclass 12, count 0 2006.229.15:05:07.00#ibcon#read 5, iclass 12, count 0 2006.229.15:05:07.00#ibcon#about to read 6, iclass 12, count 0 2006.229.15:05:07.00#ibcon#read 6, iclass 12, count 0 2006.229.15:05:07.00#ibcon#end of sib2, iclass 12, count 0 2006.229.15:05:07.00#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:05:07.00#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:05:07.00#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:05:07.00#ibcon#*before write, iclass 12, count 0 2006.229.15:05:07.00#ibcon#enter sib2, iclass 12, count 0 2006.229.15:05:07.00#ibcon#flushed, iclass 12, count 0 2006.229.15:05:07.00#ibcon#about to write, iclass 12, count 0 2006.229.15:05:07.00#ibcon#wrote, iclass 12, count 0 2006.229.15:05:07.00#ibcon#about to read 3, iclass 12, count 0 2006.229.15:05:07.04#ibcon#read 3, iclass 12, count 0 2006.229.15:05:07.04#ibcon#about to read 4, iclass 12, count 0 2006.229.15:05:07.04#ibcon#read 4, iclass 12, count 0 2006.229.15:05:07.04#ibcon#about to read 5, iclass 12, count 0 2006.229.15:05:07.04#ibcon#read 5, iclass 12, count 0 2006.229.15:05:07.04#ibcon#about to read 6, iclass 12, count 0 2006.229.15:05:07.04#ibcon#read 6, iclass 12, count 0 2006.229.15:05:07.04#ibcon#end of sib2, iclass 12, count 0 2006.229.15:05:07.04#ibcon#*after write, iclass 12, count 0 2006.229.15:05:07.04#ibcon#*before return 0, iclass 12, count 0 2006.229.15:05:07.04#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:07.04#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:05:07.04#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:05:07.04#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:05:07.04$vck44/vb=4,4 2006.229.15:05:07.04#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:05:07.04#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:05:07.04#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:07.04#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:07.10#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:07.10#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:07.10#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:05:07.10#ibcon#first serial, iclass 14, count 2 2006.229.15:05:07.10#ibcon#enter sib2, iclass 14, count 2 2006.229.15:05:07.10#ibcon#flushed, iclass 14, count 2 2006.229.15:05:07.10#ibcon#about to write, iclass 14, count 2 2006.229.15:05:07.10#ibcon#wrote, iclass 14, count 2 2006.229.15:05:07.10#ibcon#about to read 3, iclass 14, count 2 2006.229.15:05:07.12#ibcon#read 3, iclass 14, count 2 2006.229.15:05:07.12#ibcon#about to read 4, iclass 14, count 2 2006.229.15:05:07.12#ibcon#read 4, iclass 14, count 2 2006.229.15:05:07.12#ibcon#about to read 5, iclass 14, count 2 2006.229.15:05:07.12#ibcon#read 5, iclass 14, count 2 2006.229.15:05:07.12#ibcon#about to read 6, iclass 14, count 2 2006.229.15:05:07.12#ibcon#read 6, iclass 14, count 2 2006.229.15:05:07.12#ibcon#end of sib2, iclass 14, count 2 2006.229.15:05:07.12#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:05:07.12#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:05:07.12#ibcon#[27=AT04-04\r\n] 2006.229.15:05:07.12#ibcon#*before write, iclass 14, count 2 2006.229.15:05:07.12#ibcon#enter sib2, iclass 14, count 2 2006.229.15:05:07.12#ibcon#flushed, iclass 14, count 2 2006.229.15:05:07.12#ibcon#about to write, iclass 14, count 2 2006.229.15:05:07.12#ibcon#wrote, iclass 14, count 2 2006.229.15:05:07.12#ibcon#about to read 3, iclass 14, count 2 2006.229.15:05:07.15#ibcon#read 3, iclass 14, count 2 2006.229.15:05:07.15#ibcon#about to read 4, iclass 14, count 2 2006.229.15:05:07.15#ibcon#read 4, iclass 14, count 2 2006.229.15:05:07.15#ibcon#about to read 5, iclass 14, count 2 2006.229.15:05:07.15#ibcon#read 5, iclass 14, count 2 2006.229.15:05:07.15#ibcon#about to read 6, iclass 14, count 2 2006.229.15:05:07.15#ibcon#read 6, iclass 14, count 2 2006.229.15:05:07.15#ibcon#end of sib2, iclass 14, count 2 2006.229.15:05:07.15#ibcon#*after write, iclass 14, count 2 2006.229.15:05:07.15#ibcon#*before return 0, iclass 14, count 2 2006.229.15:05:07.15#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:07.15#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:05:07.15#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:05:07.15#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:07.15#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:07.27#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:07.27#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:07.27#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:05:07.27#ibcon#first serial, iclass 14, count 0 2006.229.15:05:07.27#ibcon#enter sib2, iclass 14, count 0 2006.229.15:05:07.27#ibcon#flushed, iclass 14, count 0 2006.229.15:05:07.27#ibcon#about to write, iclass 14, count 0 2006.229.15:05:07.27#ibcon#wrote, iclass 14, count 0 2006.229.15:05:07.27#ibcon#about to read 3, iclass 14, count 0 2006.229.15:05:07.29#ibcon#read 3, iclass 14, count 0 2006.229.15:05:07.29#ibcon#about to read 4, iclass 14, count 0 2006.229.15:05:07.29#ibcon#read 4, iclass 14, count 0 2006.229.15:05:07.29#ibcon#about to read 5, iclass 14, count 0 2006.229.15:05:07.29#ibcon#read 5, iclass 14, count 0 2006.229.15:05:07.29#ibcon#about to read 6, iclass 14, count 0 2006.229.15:05:07.29#ibcon#read 6, iclass 14, count 0 2006.229.15:05:07.29#ibcon#end of sib2, iclass 14, count 0 2006.229.15:05:07.29#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:05:07.29#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:05:07.29#ibcon#[27=USB\r\n] 2006.229.15:05:07.29#ibcon#*before write, iclass 14, count 0 2006.229.15:05:07.29#ibcon#enter sib2, iclass 14, count 0 2006.229.15:05:07.29#ibcon#flushed, iclass 14, count 0 2006.229.15:05:07.29#ibcon#about to write, iclass 14, count 0 2006.229.15:05:07.29#ibcon#wrote, iclass 14, count 0 2006.229.15:05:07.29#ibcon#about to read 3, iclass 14, count 0 2006.229.15:05:07.32#ibcon#read 3, iclass 14, count 0 2006.229.15:05:07.32#ibcon#about to read 4, iclass 14, count 0 2006.229.15:05:07.32#ibcon#read 4, iclass 14, count 0 2006.229.15:05:07.32#ibcon#about to read 5, iclass 14, count 0 2006.229.15:05:07.32#ibcon#read 5, iclass 14, count 0 2006.229.15:05:07.32#ibcon#about to read 6, iclass 14, count 0 2006.229.15:05:07.32#ibcon#read 6, iclass 14, count 0 2006.229.15:05:07.32#ibcon#end of sib2, iclass 14, count 0 2006.229.15:05:07.32#ibcon#*after write, iclass 14, count 0 2006.229.15:05:07.32#ibcon#*before return 0, iclass 14, count 0 2006.229.15:05:07.32#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:07.32#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:05:07.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:05:07.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:05:07.32$vck44/vblo=5,709.99 2006.229.15:05:07.32#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:05:07.32#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:05:07.32#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:07.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:07.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:07.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:07.32#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:05:07.32#ibcon#first serial, iclass 16, count 0 2006.229.15:05:07.32#ibcon#enter sib2, iclass 16, count 0 2006.229.15:05:07.32#ibcon#flushed, iclass 16, count 0 2006.229.15:05:07.32#ibcon#about to write, iclass 16, count 0 2006.229.15:05:07.32#ibcon#wrote, iclass 16, count 0 2006.229.15:05:07.32#ibcon#about to read 3, iclass 16, count 0 2006.229.15:05:07.34#ibcon#read 3, iclass 16, count 0 2006.229.15:05:07.34#ibcon#about to read 4, iclass 16, count 0 2006.229.15:05:07.34#ibcon#read 4, iclass 16, count 0 2006.229.15:05:07.34#ibcon#about to read 5, iclass 16, count 0 2006.229.15:05:07.34#ibcon#read 5, iclass 16, count 0 2006.229.15:05:07.34#ibcon#about to read 6, iclass 16, count 0 2006.229.15:05:07.34#ibcon#read 6, iclass 16, count 0 2006.229.15:05:07.34#ibcon#end of sib2, iclass 16, count 0 2006.229.15:05:07.34#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:05:07.34#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:05:07.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:05:07.34#ibcon#*before write, iclass 16, count 0 2006.229.15:05:07.34#ibcon#enter sib2, iclass 16, count 0 2006.229.15:05:07.34#ibcon#flushed, iclass 16, count 0 2006.229.15:05:07.34#ibcon#about to write, iclass 16, count 0 2006.229.15:05:07.34#ibcon#wrote, iclass 16, count 0 2006.229.15:05:07.34#ibcon#about to read 3, iclass 16, count 0 2006.229.15:05:07.38#ibcon#read 3, iclass 16, count 0 2006.229.15:05:07.38#ibcon#about to read 4, iclass 16, count 0 2006.229.15:05:07.38#ibcon#read 4, iclass 16, count 0 2006.229.15:05:07.38#ibcon#about to read 5, iclass 16, count 0 2006.229.15:05:07.38#ibcon#read 5, iclass 16, count 0 2006.229.15:05:07.38#ibcon#about to read 6, iclass 16, count 0 2006.229.15:05:07.38#ibcon#read 6, iclass 16, count 0 2006.229.15:05:07.38#ibcon#end of sib2, iclass 16, count 0 2006.229.15:05:07.38#ibcon#*after write, iclass 16, count 0 2006.229.15:05:07.38#ibcon#*before return 0, iclass 16, count 0 2006.229.15:05:07.38#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:07.38#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:05:07.38#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:05:07.38#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:05:07.38$vck44/vb=5,4 2006.229.15:05:07.38#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:05:07.38#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:05:07.38#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:07.38#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:07.44#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:07.44#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:07.44#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:05:07.44#ibcon#first serial, iclass 18, count 2 2006.229.15:05:07.44#ibcon#enter sib2, iclass 18, count 2 2006.229.15:05:07.44#ibcon#flushed, iclass 18, count 2 2006.229.15:05:07.44#ibcon#about to write, iclass 18, count 2 2006.229.15:05:07.44#ibcon#wrote, iclass 18, count 2 2006.229.15:05:07.44#ibcon#about to read 3, iclass 18, count 2 2006.229.15:05:07.46#ibcon#read 3, iclass 18, count 2 2006.229.15:05:07.46#ibcon#about to read 4, iclass 18, count 2 2006.229.15:05:07.46#ibcon#read 4, iclass 18, count 2 2006.229.15:05:07.46#ibcon#about to read 5, iclass 18, count 2 2006.229.15:05:07.46#ibcon#read 5, iclass 18, count 2 2006.229.15:05:07.46#ibcon#about to read 6, iclass 18, count 2 2006.229.15:05:07.46#ibcon#read 6, iclass 18, count 2 2006.229.15:05:07.46#ibcon#end of sib2, iclass 18, count 2 2006.229.15:05:07.46#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:05:07.46#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:05:07.46#ibcon#[27=AT05-04\r\n] 2006.229.15:05:07.46#ibcon#*before write, iclass 18, count 2 2006.229.15:05:07.46#ibcon#enter sib2, iclass 18, count 2 2006.229.15:05:07.46#ibcon#flushed, iclass 18, count 2 2006.229.15:05:07.46#ibcon#about to write, iclass 18, count 2 2006.229.15:05:07.46#ibcon#wrote, iclass 18, count 2 2006.229.15:05:07.46#ibcon#about to read 3, iclass 18, count 2 2006.229.15:05:07.49#ibcon#read 3, iclass 18, count 2 2006.229.15:05:07.49#ibcon#about to read 4, iclass 18, count 2 2006.229.15:05:07.49#ibcon#read 4, iclass 18, count 2 2006.229.15:05:07.49#ibcon#about to read 5, iclass 18, count 2 2006.229.15:05:07.49#ibcon#read 5, iclass 18, count 2 2006.229.15:05:07.49#ibcon#about to read 6, iclass 18, count 2 2006.229.15:05:07.49#ibcon#read 6, iclass 18, count 2 2006.229.15:05:07.49#ibcon#end of sib2, iclass 18, count 2 2006.229.15:05:07.49#ibcon#*after write, iclass 18, count 2 2006.229.15:05:07.49#ibcon#*before return 0, iclass 18, count 2 2006.229.15:05:07.49#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:07.49#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:05:07.49#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:05:07.49#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:07.49#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:07.61#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:07.61#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:07.61#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:05:07.61#ibcon#first serial, iclass 18, count 0 2006.229.15:05:07.61#ibcon#enter sib2, iclass 18, count 0 2006.229.15:05:07.61#ibcon#flushed, iclass 18, count 0 2006.229.15:05:07.61#ibcon#about to write, iclass 18, count 0 2006.229.15:05:07.61#ibcon#wrote, iclass 18, count 0 2006.229.15:05:07.61#ibcon#about to read 3, iclass 18, count 0 2006.229.15:05:07.63#ibcon#read 3, iclass 18, count 0 2006.229.15:05:07.63#ibcon#about to read 4, iclass 18, count 0 2006.229.15:05:07.63#ibcon#read 4, iclass 18, count 0 2006.229.15:05:07.63#ibcon#about to read 5, iclass 18, count 0 2006.229.15:05:07.63#ibcon#read 5, iclass 18, count 0 2006.229.15:05:07.63#ibcon#about to read 6, iclass 18, count 0 2006.229.15:05:07.63#ibcon#read 6, iclass 18, count 0 2006.229.15:05:07.63#ibcon#end of sib2, iclass 18, count 0 2006.229.15:05:07.63#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:05:07.63#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:05:07.63#ibcon#[27=USB\r\n] 2006.229.15:05:07.63#ibcon#*before write, iclass 18, count 0 2006.229.15:05:07.63#ibcon#enter sib2, iclass 18, count 0 2006.229.15:05:07.63#ibcon#flushed, iclass 18, count 0 2006.229.15:05:07.63#ibcon#about to write, iclass 18, count 0 2006.229.15:05:07.63#ibcon#wrote, iclass 18, count 0 2006.229.15:05:07.63#ibcon#about to read 3, iclass 18, count 0 2006.229.15:05:07.66#ibcon#read 3, iclass 18, count 0 2006.229.15:05:07.66#ibcon#about to read 4, iclass 18, count 0 2006.229.15:05:07.66#ibcon#read 4, iclass 18, count 0 2006.229.15:05:07.66#ibcon#about to read 5, iclass 18, count 0 2006.229.15:05:07.66#ibcon#read 5, iclass 18, count 0 2006.229.15:05:07.66#ibcon#about to read 6, iclass 18, count 0 2006.229.15:05:07.66#ibcon#read 6, iclass 18, count 0 2006.229.15:05:07.66#ibcon#end of sib2, iclass 18, count 0 2006.229.15:05:07.66#ibcon#*after write, iclass 18, count 0 2006.229.15:05:07.66#ibcon#*before return 0, iclass 18, count 0 2006.229.15:05:07.66#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:07.66#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:05:07.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:05:07.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:05:07.66$vck44/vblo=6,719.99 2006.229.15:05:07.66#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:05:07.66#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:05:07.66#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:07.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:07.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:07.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:07.66#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:05:07.66#ibcon#first serial, iclass 20, count 0 2006.229.15:05:07.66#ibcon#enter sib2, iclass 20, count 0 2006.229.15:05:07.66#ibcon#flushed, iclass 20, count 0 2006.229.15:05:07.66#ibcon#about to write, iclass 20, count 0 2006.229.15:05:07.66#ibcon#wrote, iclass 20, count 0 2006.229.15:05:07.66#ibcon#about to read 3, iclass 20, count 0 2006.229.15:05:07.68#ibcon#read 3, iclass 20, count 0 2006.229.15:05:07.68#ibcon#about to read 4, iclass 20, count 0 2006.229.15:05:07.68#ibcon#read 4, iclass 20, count 0 2006.229.15:05:07.68#ibcon#about to read 5, iclass 20, count 0 2006.229.15:05:07.68#ibcon#read 5, iclass 20, count 0 2006.229.15:05:07.68#ibcon#about to read 6, iclass 20, count 0 2006.229.15:05:07.68#ibcon#read 6, iclass 20, count 0 2006.229.15:05:07.68#ibcon#end of sib2, iclass 20, count 0 2006.229.15:05:07.68#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:05:07.68#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:05:07.68#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:05:07.68#ibcon#*before write, iclass 20, count 0 2006.229.15:05:07.68#ibcon#enter sib2, iclass 20, count 0 2006.229.15:05:07.68#ibcon#flushed, iclass 20, count 0 2006.229.15:05:07.68#ibcon#about to write, iclass 20, count 0 2006.229.15:05:07.68#ibcon#wrote, iclass 20, count 0 2006.229.15:05:07.68#ibcon#about to read 3, iclass 20, count 0 2006.229.15:05:07.72#ibcon#read 3, iclass 20, count 0 2006.229.15:05:07.72#ibcon#about to read 4, iclass 20, count 0 2006.229.15:05:07.72#ibcon#read 4, iclass 20, count 0 2006.229.15:05:07.72#ibcon#about to read 5, iclass 20, count 0 2006.229.15:05:07.72#ibcon#read 5, iclass 20, count 0 2006.229.15:05:07.72#ibcon#about to read 6, iclass 20, count 0 2006.229.15:05:07.72#ibcon#read 6, iclass 20, count 0 2006.229.15:05:07.72#ibcon#end of sib2, iclass 20, count 0 2006.229.15:05:07.72#ibcon#*after write, iclass 20, count 0 2006.229.15:05:07.72#ibcon#*before return 0, iclass 20, count 0 2006.229.15:05:07.72#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:07.72#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:05:07.72#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:05:07.72#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:05:07.72$vck44/vb=6,4 2006.229.15:05:07.72#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:05:07.72#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:05:07.72#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:07.72#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:07.78#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:07.78#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:07.78#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:05:07.78#ibcon#first serial, iclass 22, count 2 2006.229.15:05:07.78#ibcon#enter sib2, iclass 22, count 2 2006.229.15:05:07.78#ibcon#flushed, iclass 22, count 2 2006.229.15:05:07.78#ibcon#about to write, iclass 22, count 2 2006.229.15:05:07.78#ibcon#wrote, iclass 22, count 2 2006.229.15:05:07.78#ibcon#about to read 3, iclass 22, count 2 2006.229.15:05:07.80#ibcon#read 3, iclass 22, count 2 2006.229.15:05:07.80#ibcon#about to read 4, iclass 22, count 2 2006.229.15:05:07.80#ibcon#read 4, iclass 22, count 2 2006.229.15:05:07.80#ibcon#about to read 5, iclass 22, count 2 2006.229.15:05:07.80#ibcon#read 5, iclass 22, count 2 2006.229.15:05:07.80#ibcon#about to read 6, iclass 22, count 2 2006.229.15:05:07.80#ibcon#read 6, iclass 22, count 2 2006.229.15:05:07.80#ibcon#end of sib2, iclass 22, count 2 2006.229.15:05:07.80#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:05:07.80#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:05:07.80#ibcon#[27=AT06-04\r\n] 2006.229.15:05:07.80#ibcon#*before write, iclass 22, count 2 2006.229.15:05:07.80#ibcon#enter sib2, iclass 22, count 2 2006.229.15:05:07.80#ibcon#flushed, iclass 22, count 2 2006.229.15:05:07.80#ibcon#about to write, iclass 22, count 2 2006.229.15:05:07.80#ibcon#wrote, iclass 22, count 2 2006.229.15:05:07.80#ibcon#about to read 3, iclass 22, count 2 2006.229.15:05:07.83#ibcon#read 3, iclass 22, count 2 2006.229.15:05:07.83#ibcon#about to read 4, iclass 22, count 2 2006.229.15:05:07.83#ibcon#read 4, iclass 22, count 2 2006.229.15:05:07.83#ibcon#about to read 5, iclass 22, count 2 2006.229.15:05:07.83#ibcon#read 5, iclass 22, count 2 2006.229.15:05:07.83#ibcon#about to read 6, iclass 22, count 2 2006.229.15:05:07.83#ibcon#read 6, iclass 22, count 2 2006.229.15:05:07.83#ibcon#end of sib2, iclass 22, count 2 2006.229.15:05:07.83#ibcon#*after write, iclass 22, count 2 2006.229.15:05:07.83#ibcon#*before return 0, iclass 22, count 2 2006.229.15:05:07.83#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:07.83#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:05:07.83#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:05:07.83#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:07.83#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:07.95#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:07.95#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:07.95#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:05:07.95#ibcon#first serial, iclass 22, count 0 2006.229.15:05:07.95#ibcon#enter sib2, iclass 22, count 0 2006.229.15:05:07.95#ibcon#flushed, iclass 22, count 0 2006.229.15:05:07.95#ibcon#about to write, iclass 22, count 0 2006.229.15:05:07.95#ibcon#wrote, iclass 22, count 0 2006.229.15:05:07.95#ibcon#about to read 3, iclass 22, count 0 2006.229.15:05:07.97#ibcon#read 3, iclass 22, count 0 2006.229.15:05:07.97#ibcon#about to read 4, iclass 22, count 0 2006.229.15:05:07.97#ibcon#read 4, iclass 22, count 0 2006.229.15:05:07.97#ibcon#about to read 5, iclass 22, count 0 2006.229.15:05:07.97#ibcon#read 5, iclass 22, count 0 2006.229.15:05:07.97#ibcon#about to read 6, iclass 22, count 0 2006.229.15:05:07.97#ibcon#read 6, iclass 22, count 0 2006.229.15:05:07.97#ibcon#end of sib2, iclass 22, count 0 2006.229.15:05:07.97#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:05:07.97#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:05:07.97#ibcon#[27=USB\r\n] 2006.229.15:05:07.97#ibcon#*before write, iclass 22, count 0 2006.229.15:05:07.97#ibcon#enter sib2, iclass 22, count 0 2006.229.15:05:07.97#ibcon#flushed, iclass 22, count 0 2006.229.15:05:07.97#ibcon#about to write, iclass 22, count 0 2006.229.15:05:07.97#ibcon#wrote, iclass 22, count 0 2006.229.15:05:07.97#ibcon#about to read 3, iclass 22, count 0 2006.229.15:05:08.00#ibcon#read 3, iclass 22, count 0 2006.229.15:05:08.00#ibcon#about to read 4, iclass 22, count 0 2006.229.15:05:08.00#ibcon#read 4, iclass 22, count 0 2006.229.15:05:08.00#ibcon#about to read 5, iclass 22, count 0 2006.229.15:05:08.00#ibcon#read 5, iclass 22, count 0 2006.229.15:05:08.00#ibcon#about to read 6, iclass 22, count 0 2006.229.15:05:08.00#ibcon#read 6, iclass 22, count 0 2006.229.15:05:08.00#ibcon#end of sib2, iclass 22, count 0 2006.229.15:05:08.00#ibcon#*after write, iclass 22, count 0 2006.229.15:05:08.00#ibcon#*before return 0, iclass 22, count 0 2006.229.15:05:08.00#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:08.00#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:05:08.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:05:08.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:05:08.00$vck44/vblo=7,734.99 2006.229.15:05:08.00#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:05:08.00#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:05:08.00#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:08.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:08.00#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:08.00#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:08.00#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:05:08.00#ibcon#first serial, iclass 24, count 0 2006.229.15:05:08.00#ibcon#enter sib2, iclass 24, count 0 2006.229.15:05:08.00#ibcon#flushed, iclass 24, count 0 2006.229.15:05:08.00#ibcon#about to write, iclass 24, count 0 2006.229.15:05:08.00#ibcon#wrote, iclass 24, count 0 2006.229.15:05:08.00#ibcon#about to read 3, iclass 24, count 0 2006.229.15:05:08.02#ibcon#read 3, iclass 24, count 0 2006.229.15:05:08.02#ibcon#about to read 4, iclass 24, count 0 2006.229.15:05:08.02#ibcon#read 4, iclass 24, count 0 2006.229.15:05:08.02#ibcon#about to read 5, iclass 24, count 0 2006.229.15:05:08.02#ibcon#read 5, iclass 24, count 0 2006.229.15:05:08.02#ibcon#about to read 6, iclass 24, count 0 2006.229.15:05:08.02#ibcon#read 6, iclass 24, count 0 2006.229.15:05:08.02#ibcon#end of sib2, iclass 24, count 0 2006.229.15:05:08.02#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:05:08.02#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:05:08.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:05:08.02#ibcon#*before write, iclass 24, count 0 2006.229.15:05:08.02#ibcon#enter sib2, iclass 24, count 0 2006.229.15:05:08.02#ibcon#flushed, iclass 24, count 0 2006.229.15:05:08.02#ibcon#about to write, iclass 24, count 0 2006.229.15:05:08.02#ibcon#wrote, iclass 24, count 0 2006.229.15:05:08.02#ibcon#about to read 3, iclass 24, count 0 2006.229.15:05:08.06#ibcon#read 3, iclass 24, count 0 2006.229.15:05:08.06#ibcon#about to read 4, iclass 24, count 0 2006.229.15:05:08.06#ibcon#read 4, iclass 24, count 0 2006.229.15:05:08.06#ibcon#about to read 5, iclass 24, count 0 2006.229.15:05:08.06#ibcon#read 5, iclass 24, count 0 2006.229.15:05:08.06#ibcon#about to read 6, iclass 24, count 0 2006.229.15:05:08.06#ibcon#read 6, iclass 24, count 0 2006.229.15:05:08.06#ibcon#end of sib2, iclass 24, count 0 2006.229.15:05:08.06#ibcon#*after write, iclass 24, count 0 2006.229.15:05:08.06#ibcon#*before return 0, iclass 24, count 0 2006.229.15:05:08.06#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:08.06#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:05:08.06#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:05:08.06#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:05:08.06$vck44/vb=7,4 2006.229.15:05:08.06#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:05:08.06#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:05:08.06#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:08.06#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:08.12#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:08.12#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:08.12#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:05:08.12#ibcon#first serial, iclass 26, count 2 2006.229.15:05:08.12#ibcon#enter sib2, iclass 26, count 2 2006.229.15:05:08.12#ibcon#flushed, iclass 26, count 2 2006.229.15:05:08.12#ibcon#about to write, iclass 26, count 2 2006.229.15:05:08.12#ibcon#wrote, iclass 26, count 2 2006.229.15:05:08.12#ibcon#about to read 3, iclass 26, count 2 2006.229.15:05:08.14#ibcon#read 3, iclass 26, count 2 2006.229.15:05:08.14#ibcon#about to read 4, iclass 26, count 2 2006.229.15:05:08.14#ibcon#read 4, iclass 26, count 2 2006.229.15:05:08.14#ibcon#about to read 5, iclass 26, count 2 2006.229.15:05:08.14#ibcon#read 5, iclass 26, count 2 2006.229.15:05:08.14#ibcon#about to read 6, iclass 26, count 2 2006.229.15:05:08.14#ibcon#read 6, iclass 26, count 2 2006.229.15:05:08.14#ibcon#end of sib2, iclass 26, count 2 2006.229.15:05:08.14#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:05:08.14#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:05:08.14#ibcon#[27=AT07-04\r\n] 2006.229.15:05:08.14#ibcon#*before write, iclass 26, count 2 2006.229.15:05:08.14#ibcon#enter sib2, iclass 26, count 2 2006.229.15:05:08.14#ibcon#flushed, iclass 26, count 2 2006.229.15:05:08.14#ibcon#about to write, iclass 26, count 2 2006.229.15:05:08.14#ibcon#wrote, iclass 26, count 2 2006.229.15:05:08.14#ibcon#about to read 3, iclass 26, count 2 2006.229.15:05:08.17#ibcon#read 3, iclass 26, count 2 2006.229.15:05:08.17#ibcon#about to read 4, iclass 26, count 2 2006.229.15:05:08.17#ibcon#read 4, iclass 26, count 2 2006.229.15:05:08.17#ibcon#about to read 5, iclass 26, count 2 2006.229.15:05:08.17#ibcon#read 5, iclass 26, count 2 2006.229.15:05:08.17#ibcon#about to read 6, iclass 26, count 2 2006.229.15:05:08.17#ibcon#read 6, iclass 26, count 2 2006.229.15:05:08.17#ibcon#end of sib2, iclass 26, count 2 2006.229.15:05:08.17#ibcon#*after write, iclass 26, count 2 2006.229.15:05:08.17#ibcon#*before return 0, iclass 26, count 2 2006.229.15:05:08.17#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:08.17#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:05:08.17#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:05:08.17#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:08.17#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:08.29#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:08.29#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:08.29#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:05:08.29#ibcon#first serial, iclass 26, count 0 2006.229.15:05:08.29#ibcon#enter sib2, iclass 26, count 0 2006.229.15:05:08.29#ibcon#flushed, iclass 26, count 0 2006.229.15:05:08.29#ibcon#about to write, iclass 26, count 0 2006.229.15:05:08.29#ibcon#wrote, iclass 26, count 0 2006.229.15:05:08.29#ibcon#about to read 3, iclass 26, count 0 2006.229.15:05:08.31#ibcon#read 3, iclass 26, count 0 2006.229.15:05:08.31#ibcon#about to read 4, iclass 26, count 0 2006.229.15:05:08.31#ibcon#read 4, iclass 26, count 0 2006.229.15:05:08.31#ibcon#about to read 5, iclass 26, count 0 2006.229.15:05:08.31#ibcon#read 5, iclass 26, count 0 2006.229.15:05:08.31#ibcon#about to read 6, iclass 26, count 0 2006.229.15:05:08.31#ibcon#read 6, iclass 26, count 0 2006.229.15:05:08.31#ibcon#end of sib2, iclass 26, count 0 2006.229.15:05:08.31#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:05:08.31#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:05:08.31#ibcon#[27=USB\r\n] 2006.229.15:05:08.31#ibcon#*before write, iclass 26, count 0 2006.229.15:05:08.31#ibcon#enter sib2, iclass 26, count 0 2006.229.15:05:08.31#ibcon#flushed, iclass 26, count 0 2006.229.15:05:08.31#ibcon#about to write, iclass 26, count 0 2006.229.15:05:08.31#ibcon#wrote, iclass 26, count 0 2006.229.15:05:08.31#ibcon#about to read 3, iclass 26, count 0 2006.229.15:05:08.34#ibcon#read 3, iclass 26, count 0 2006.229.15:05:08.34#ibcon#about to read 4, iclass 26, count 0 2006.229.15:05:08.34#ibcon#read 4, iclass 26, count 0 2006.229.15:05:08.34#ibcon#about to read 5, iclass 26, count 0 2006.229.15:05:08.34#ibcon#read 5, iclass 26, count 0 2006.229.15:05:08.34#ibcon#about to read 6, iclass 26, count 0 2006.229.15:05:08.34#ibcon#read 6, iclass 26, count 0 2006.229.15:05:08.34#ibcon#end of sib2, iclass 26, count 0 2006.229.15:05:08.34#ibcon#*after write, iclass 26, count 0 2006.229.15:05:08.34#ibcon#*before return 0, iclass 26, count 0 2006.229.15:05:08.34#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:08.34#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:05:08.34#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:05:08.34#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:05:08.34$vck44/vblo=8,744.99 2006.229.15:05:08.34#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:05:08.34#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:05:08.34#ibcon#ireg 17 cls_cnt 0 2006.229.15:05:08.34#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:08.34#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:08.34#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:08.34#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:05:08.34#ibcon#first serial, iclass 28, count 0 2006.229.15:05:08.34#ibcon#enter sib2, iclass 28, count 0 2006.229.15:05:08.34#ibcon#flushed, iclass 28, count 0 2006.229.15:05:08.34#ibcon#about to write, iclass 28, count 0 2006.229.15:05:08.34#ibcon#wrote, iclass 28, count 0 2006.229.15:05:08.34#ibcon#about to read 3, iclass 28, count 0 2006.229.15:05:08.36#ibcon#read 3, iclass 28, count 0 2006.229.15:05:08.36#ibcon#about to read 4, iclass 28, count 0 2006.229.15:05:08.36#ibcon#read 4, iclass 28, count 0 2006.229.15:05:08.36#ibcon#about to read 5, iclass 28, count 0 2006.229.15:05:08.36#ibcon#read 5, iclass 28, count 0 2006.229.15:05:08.36#ibcon#about to read 6, iclass 28, count 0 2006.229.15:05:08.36#ibcon#read 6, iclass 28, count 0 2006.229.15:05:08.36#ibcon#end of sib2, iclass 28, count 0 2006.229.15:05:08.36#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:05:08.36#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:05:08.36#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:05:08.36#ibcon#*before write, iclass 28, count 0 2006.229.15:05:08.36#ibcon#enter sib2, iclass 28, count 0 2006.229.15:05:08.36#ibcon#flushed, iclass 28, count 0 2006.229.15:05:08.36#ibcon#about to write, iclass 28, count 0 2006.229.15:05:08.36#ibcon#wrote, iclass 28, count 0 2006.229.15:05:08.36#ibcon#about to read 3, iclass 28, count 0 2006.229.15:05:08.40#ibcon#read 3, iclass 28, count 0 2006.229.15:05:08.40#ibcon#about to read 4, iclass 28, count 0 2006.229.15:05:08.40#ibcon#read 4, iclass 28, count 0 2006.229.15:05:08.40#ibcon#about to read 5, iclass 28, count 0 2006.229.15:05:08.40#ibcon#read 5, iclass 28, count 0 2006.229.15:05:08.40#ibcon#about to read 6, iclass 28, count 0 2006.229.15:05:08.40#ibcon#read 6, iclass 28, count 0 2006.229.15:05:08.40#ibcon#end of sib2, iclass 28, count 0 2006.229.15:05:08.40#ibcon#*after write, iclass 28, count 0 2006.229.15:05:08.40#ibcon#*before return 0, iclass 28, count 0 2006.229.15:05:08.40#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:08.40#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:05:08.40#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:05:08.40#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:05:08.40$vck44/vb=8,4 2006.229.15:05:08.40#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:05:08.40#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:05:08.40#ibcon#ireg 11 cls_cnt 2 2006.229.15:05:08.40#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:08.46#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:08.46#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:08.46#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:05:08.46#ibcon#first serial, iclass 30, count 2 2006.229.15:05:08.46#ibcon#enter sib2, iclass 30, count 2 2006.229.15:05:08.46#ibcon#flushed, iclass 30, count 2 2006.229.15:05:08.46#ibcon#about to write, iclass 30, count 2 2006.229.15:05:08.46#ibcon#wrote, iclass 30, count 2 2006.229.15:05:08.46#ibcon#about to read 3, iclass 30, count 2 2006.229.15:05:08.48#ibcon#read 3, iclass 30, count 2 2006.229.15:05:08.48#ibcon#about to read 4, iclass 30, count 2 2006.229.15:05:08.48#ibcon#read 4, iclass 30, count 2 2006.229.15:05:08.48#ibcon#about to read 5, iclass 30, count 2 2006.229.15:05:08.48#ibcon#read 5, iclass 30, count 2 2006.229.15:05:08.48#ibcon#about to read 6, iclass 30, count 2 2006.229.15:05:08.48#ibcon#read 6, iclass 30, count 2 2006.229.15:05:08.48#ibcon#end of sib2, iclass 30, count 2 2006.229.15:05:08.48#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:05:08.48#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:05:08.48#ibcon#[27=AT08-04\r\n] 2006.229.15:05:08.48#ibcon#*before write, iclass 30, count 2 2006.229.15:05:08.48#ibcon#enter sib2, iclass 30, count 2 2006.229.15:05:08.48#ibcon#flushed, iclass 30, count 2 2006.229.15:05:08.48#ibcon#about to write, iclass 30, count 2 2006.229.15:05:08.48#ibcon#wrote, iclass 30, count 2 2006.229.15:05:08.48#ibcon#about to read 3, iclass 30, count 2 2006.229.15:05:08.51#ibcon#read 3, iclass 30, count 2 2006.229.15:05:08.51#ibcon#about to read 4, iclass 30, count 2 2006.229.15:05:08.51#ibcon#read 4, iclass 30, count 2 2006.229.15:05:08.51#ibcon#about to read 5, iclass 30, count 2 2006.229.15:05:08.51#ibcon#read 5, iclass 30, count 2 2006.229.15:05:08.51#ibcon#about to read 6, iclass 30, count 2 2006.229.15:05:08.51#ibcon#read 6, iclass 30, count 2 2006.229.15:05:08.51#ibcon#end of sib2, iclass 30, count 2 2006.229.15:05:08.51#ibcon#*after write, iclass 30, count 2 2006.229.15:05:08.51#ibcon#*before return 0, iclass 30, count 2 2006.229.15:05:08.51#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:08.51#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:05:08.51#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:05:08.51#ibcon#ireg 7 cls_cnt 0 2006.229.15:05:08.51#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:08.63#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:08.63#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:08.63#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:05:08.63#ibcon#first serial, iclass 30, count 0 2006.229.15:05:08.63#ibcon#enter sib2, iclass 30, count 0 2006.229.15:05:08.63#ibcon#flushed, iclass 30, count 0 2006.229.15:05:08.63#ibcon#about to write, iclass 30, count 0 2006.229.15:05:08.63#ibcon#wrote, iclass 30, count 0 2006.229.15:05:08.63#ibcon#about to read 3, iclass 30, count 0 2006.229.15:05:08.65#ibcon#read 3, iclass 30, count 0 2006.229.15:05:08.65#ibcon#about to read 4, iclass 30, count 0 2006.229.15:05:08.65#ibcon#read 4, iclass 30, count 0 2006.229.15:05:08.65#ibcon#about to read 5, iclass 30, count 0 2006.229.15:05:08.65#ibcon#read 5, iclass 30, count 0 2006.229.15:05:08.65#ibcon#about to read 6, iclass 30, count 0 2006.229.15:05:08.65#ibcon#read 6, iclass 30, count 0 2006.229.15:05:08.65#ibcon#end of sib2, iclass 30, count 0 2006.229.15:05:08.65#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:05:08.65#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:05:08.65#ibcon#[27=USB\r\n] 2006.229.15:05:08.65#ibcon#*before write, iclass 30, count 0 2006.229.15:05:08.65#ibcon#enter sib2, iclass 30, count 0 2006.229.15:05:08.65#ibcon#flushed, iclass 30, count 0 2006.229.15:05:08.65#ibcon#about to write, iclass 30, count 0 2006.229.15:05:08.65#ibcon#wrote, iclass 30, count 0 2006.229.15:05:08.65#ibcon#about to read 3, iclass 30, count 0 2006.229.15:05:08.68#ibcon#read 3, iclass 30, count 0 2006.229.15:05:08.68#ibcon#about to read 4, iclass 30, count 0 2006.229.15:05:08.68#ibcon#read 4, iclass 30, count 0 2006.229.15:05:08.68#ibcon#about to read 5, iclass 30, count 0 2006.229.15:05:08.68#ibcon#read 5, iclass 30, count 0 2006.229.15:05:08.68#ibcon#about to read 6, iclass 30, count 0 2006.229.15:05:08.68#ibcon#read 6, iclass 30, count 0 2006.229.15:05:08.68#ibcon#end of sib2, iclass 30, count 0 2006.229.15:05:08.68#ibcon#*after write, iclass 30, count 0 2006.229.15:05:08.68#ibcon#*before return 0, iclass 30, count 0 2006.229.15:05:08.68#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:08.68#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:05:08.68#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:05:08.68#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:05:08.68$vck44/vabw=wide 2006.229.15:05:08.68#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:05:08.68#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:05:08.68#ibcon#ireg 8 cls_cnt 0 2006.229.15:05:08.68#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:08.68#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:08.68#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:08.68#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:05:08.68#ibcon#first serial, iclass 32, count 0 2006.229.15:05:08.68#ibcon#enter sib2, iclass 32, count 0 2006.229.15:05:08.68#ibcon#flushed, iclass 32, count 0 2006.229.15:05:08.68#ibcon#about to write, iclass 32, count 0 2006.229.15:05:08.68#ibcon#wrote, iclass 32, count 0 2006.229.15:05:08.68#ibcon#about to read 3, iclass 32, count 0 2006.229.15:05:08.70#ibcon#read 3, iclass 32, count 0 2006.229.15:05:08.70#ibcon#about to read 4, iclass 32, count 0 2006.229.15:05:08.70#ibcon#read 4, iclass 32, count 0 2006.229.15:05:08.70#ibcon#about to read 5, iclass 32, count 0 2006.229.15:05:08.70#ibcon#read 5, iclass 32, count 0 2006.229.15:05:08.70#ibcon#about to read 6, iclass 32, count 0 2006.229.15:05:08.70#ibcon#read 6, iclass 32, count 0 2006.229.15:05:08.70#ibcon#end of sib2, iclass 32, count 0 2006.229.15:05:08.70#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:05:08.70#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:05:08.70#ibcon#[25=BW32\r\n] 2006.229.15:05:08.70#ibcon#*before write, iclass 32, count 0 2006.229.15:05:08.70#ibcon#enter sib2, iclass 32, count 0 2006.229.15:05:08.70#ibcon#flushed, iclass 32, count 0 2006.229.15:05:08.70#ibcon#about to write, iclass 32, count 0 2006.229.15:05:08.70#ibcon#wrote, iclass 32, count 0 2006.229.15:05:08.70#ibcon#about to read 3, iclass 32, count 0 2006.229.15:05:08.73#ibcon#read 3, iclass 32, count 0 2006.229.15:05:08.73#ibcon#about to read 4, iclass 32, count 0 2006.229.15:05:08.73#ibcon#read 4, iclass 32, count 0 2006.229.15:05:08.73#ibcon#about to read 5, iclass 32, count 0 2006.229.15:05:08.73#ibcon#read 5, iclass 32, count 0 2006.229.15:05:08.73#ibcon#about to read 6, iclass 32, count 0 2006.229.15:05:08.73#ibcon#read 6, iclass 32, count 0 2006.229.15:05:08.73#ibcon#end of sib2, iclass 32, count 0 2006.229.15:05:08.73#ibcon#*after write, iclass 32, count 0 2006.229.15:05:08.73#ibcon#*before return 0, iclass 32, count 0 2006.229.15:05:08.73#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:08.73#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:05:08.73#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:05:08.73#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:05:08.73$vck44/vbbw=wide 2006.229.15:05:08.73#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:05:08.73#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:05:08.73#ibcon#ireg 8 cls_cnt 0 2006.229.15:05:08.73#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:05:08.80#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:05:08.80#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:05:08.80#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:05:08.80#ibcon#first serial, iclass 34, count 0 2006.229.15:05:08.80#ibcon#enter sib2, iclass 34, count 0 2006.229.15:05:08.80#ibcon#flushed, iclass 34, count 0 2006.229.15:05:08.80#ibcon#about to write, iclass 34, count 0 2006.229.15:05:08.80#ibcon#wrote, iclass 34, count 0 2006.229.15:05:08.80#ibcon#about to read 3, iclass 34, count 0 2006.229.15:05:08.82#ibcon#read 3, iclass 34, count 0 2006.229.15:05:08.82#ibcon#about to read 4, iclass 34, count 0 2006.229.15:05:08.82#ibcon#read 4, iclass 34, count 0 2006.229.15:05:08.82#ibcon#about to read 5, iclass 34, count 0 2006.229.15:05:08.82#ibcon#read 5, iclass 34, count 0 2006.229.15:05:08.82#ibcon#about to read 6, iclass 34, count 0 2006.229.15:05:08.82#ibcon#read 6, iclass 34, count 0 2006.229.15:05:08.82#ibcon#end of sib2, iclass 34, count 0 2006.229.15:05:08.82#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:05:08.82#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:05:08.82#ibcon#[27=BW32\r\n] 2006.229.15:05:08.82#ibcon#*before write, iclass 34, count 0 2006.229.15:05:08.82#ibcon#enter sib2, iclass 34, count 0 2006.229.15:05:08.82#ibcon#flushed, iclass 34, count 0 2006.229.15:05:08.82#ibcon#about to write, iclass 34, count 0 2006.229.15:05:08.82#ibcon#wrote, iclass 34, count 0 2006.229.15:05:08.82#ibcon#about to read 3, iclass 34, count 0 2006.229.15:05:08.85#ibcon#read 3, iclass 34, count 0 2006.229.15:05:08.85#ibcon#about to read 4, iclass 34, count 0 2006.229.15:05:08.85#ibcon#read 4, iclass 34, count 0 2006.229.15:05:08.85#ibcon#about to read 5, iclass 34, count 0 2006.229.15:05:08.85#ibcon#read 5, iclass 34, count 0 2006.229.15:05:08.85#ibcon#about to read 6, iclass 34, count 0 2006.229.15:05:08.85#ibcon#read 6, iclass 34, count 0 2006.229.15:05:08.85#ibcon#end of sib2, iclass 34, count 0 2006.229.15:05:08.85#ibcon#*after write, iclass 34, count 0 2006.229.15:05:08.85#ibcon#*before return 0, iclass 34, count 0 2006.229.15:05:08.85#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:05:08.85#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:05:08.85#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:05:08.85#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:05:08.85$setupk4/ifdk4 2006.229.15:05:08.85$ifdk4/lo= 2006.229.15:05:08.85$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:05:08.85$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:05:08.85$ifdk4/patch= 2006.229.15:05:08.85$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:05:08.85$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:05:08.85$setupk4/!*+20s 2006.229.15:05:11.98#abcon#<5=/07 1.2 2.0 27.421001002.0\r\n> 2006.229.15:05:12.00#abcon#{5=INTERFACE CLEAR} 2006.229.15:05:12.06#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:05:21.14#trakl#Source acquired 2006.229.15:05:22.15#abcon#<5=/07 1.3 2.0 27.421001002.0\r\n> 2006.229.15:05:22.17#abcon#{5=INTERFACE CLEAR} 2006.229.15:05:22.23#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:05:23.14#flagr#flagr/antenna,acquired 2006.229.15:05:23.33$setupk4/"tpicd 2006.229.15:05:23.33$setupk4/echo=off 2006.229.15:05:23.33$setupk4/xlog=off 2006.229.15:05:23.33:!2006.229.15:07:19 2006.229.15:07:19.00:preob 2006.229.15:07:19.14/onsource/TRACKING 2006.229.15:07:19.14:!2006.229.15:07:29 2006.229.15:07:29.00:"tape 2006.229.15:07:29.00:"st=record 2006.229.15:07:29.00:data_valid=on 2006.229.15:07:29.00:midob 2006.229.15:07:29.14/onsource/TRACKING 2006.229.15:07:29.14/wx/27.41,1002.0,100 2006.229.15:07:29.33/cable/+6.4147E-03 2006.229.15:07:30.42/va/01,08,usb,yes,34,36 2006.229.15:07:30.42/va/02,07,usb,yes,37,37 2006.229.15:07:30.42/va/03,06,usb,yes,45,48 2006.229.15:07:30.42/va/04,07,usb,yes,38,39 2006.229.15:07:30.42/va/05,04,usb,yes,34,34 2006.229.15:07:30.42/va/06,04,usb,yes,38,37 2006.229.15:07:30.42/va/07,05,usb,yes,33,34 2006.229.15:07:30.42/va/08,06,usb,yes,24,30 2006.229.15:07:30.65/valo/01,524.99,yes,locked 2006.229.15:07:30.65/valo/02,534.99,yes,locked 2006.229.15:07:30.65/valo/03,564.99,yes,locked 2006.229.15:07:30.65/valo/04,624.99,yes,locked 2006.229.15:07:30.65/valo/05,734.99,yes,locked 2006.229.15:07:30.65/valo/06,814.99,yes,locked 2006.229.15:07:30.65/valo/07,864.99,yes,locked 2006.229.15:07:30.65/valo/08,884.99,yes,locked 2006.229.15:07:31.74/vb/01,04,usb,yes,33,31 2006.229.15:07:31.74/vb/02,04,usb,yes,36,35 2006.229.15:07:31.74/vb/03,04,usb,yes,33,36 2006.229.15:07:31.74/vb/04,04,usb,yes,37,36 2006.229.15:07:31.74/vb/05,04,usb,yes,29,32 2006.229.15:07:31.74/vb/06,04,usb,yes,34,30 2006.229.15:07:31.74/vb/07,04,usb,yes,34,34 2006.229.15:07:31.74/vb/08,04,usb,yes,31,35 2006.229.15:07:31.97/vblo/01,629.99,yes,locked 2006.229.15:07:31.97/vblo/02,634.99,yes,locked 2006.229.15:07:31.97/vblo/03,649.99,yes,locked 2006.229.15:07:31.97/vblo/04,679.99,yes,locked 2006.229.15:07:31.97/vblo/05,709.99,yes,locked 2006.229.15:07:31.97/vblo/06,719.99,yes,locked 2006.229.15:07:31.97/vblo/07,734.99,yes,locked 2006.229.15:07:31.97/vblo/08,744.99,yes,locked 2006.229.15:07:32.12/vabw/8 2006.229.15:07:32.27/vbbw/8 2006.229.15:07:32.36/xfe/off,on,12.2 2006.229.15:07:32.73/ifatt/23,28,28,28 2006.229.15:07:33.07/fmout-gps/S +4.53E-07 2006.229.15:07:33.11:!2006.229.15:08:09 2006.229.15:08:09.00:data_valid=off 2006.229.15:08:09.00:"et 2006.229.15:08:09.00:!+3s 2006.229.15:08:12.01:"tape 2006.229.15:08:12.01:postob 2006.229.15:08:12.09/cable/+6.4140E-03 2006.229.15:08:12.09/wx/27.41,1002.0,100 2006.229.15:08:13.08/fmout-gps/S +4.54E-07 2006.229.15:08:13.08:scan_name=229-1510,jd0608,80 2006.229.15:08:13.08:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.15:08:14.13#flagr#flagr/antenna,new-source 2006.229.15:08:14.13:checkk5 2006.229.15:08:14.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:08:14.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:08:15.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:08:15.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:08:16.10/chk_obsdata//k5ts1/T2291507??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:08:16.50/chk_obsdata//k5ts2/T2291507??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:08:16.90/chk_obsdata//k5ts3/T2291507??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:08:17.30/chk_obsdata//k5ts4/T2291507??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:08:18.01/k5log//k5ts1_log_newline 2006.229.15:08:18.73/k5log//k5ts2_log_newline 2006.229.15:08:19.44/k5log//k5ts3_log_newline 2006.229.15:08:20.16/k5log//k5ts4_log_newline 2006.229.15:08:20.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:08:20.18:setupk4=1 2006.229.15:08:20.18$setupk4/echo=on 2006.229.15:08:20.18$setupk4/pcalon 2006.229.15:08:20.18$pcalon/"no phase cal control is implemented here 2006.229.15:08:20.18$setupk4/"tpicd=stop 2006.229.15:08:20.18$setupk4/"rec=synch_on 2006.229.15:08:20.18$setupk4/"rec_mode=128 2006.229.15:08:20.18$setupk4/!* 2006.229.15:08:20.18$setupk4/recpk4 2006.229.15:08:20.19$recpk4/recpatch= 2006.229.15:08:20.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:08:20.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:08:20.19$setupk4/vck44 2006.229.15:08:20.19$vck44/valo=1,524.99 2006.229.15:08:20.19#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.15:08:20.19#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.15:08:20.19#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:20.19#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:20.19#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:20.19#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:20.19#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:08:20.19#ibcon#first serial, iclass 5, count 0 2006.229.15:08:20.19#ibcon#enter sib2, iclass 5, count 0 2006.229.15:08:20.19#ibcon#flushed, iclass 5, count 0 2006.229.15:08:20.19#ibcon#about to write, iclass 5, count 0 2006.229.15:08:20.19#ibcon#wrote, iclass 5, count 0 2006.229.15:08:20.19#ibcon#about to read 3, iclass 5, count 0 2006.229.15:08:20.20#ibcon#read 3, iclass 5, count 0 2006.229.15:08:20.20#ibcon#about to read 4, iclass 5, count 0 2006.229.15:08:20.20#ibcon#read 4, iclass 5, count 0 2006.229.15:08:20.20#ibcon#about to read 5, iclass 5, count 0 2006.229.15:08:20.20#ibcon#read 5, iclass 5, count 0 2006.229.15:08:20.20#ibcon#about to read 6, iclass 5, count 0 2006.229.15:08:20.20#ibcon#read 6, iclass 5, count 0 2006.229.15:08:20.20#ibcon#end of sib2, iclass 5, count 0 2006.229.15:08:20.20#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:08:20.20#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:08:20.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:08:20.20#ibcon#*before write, iclass 5, count 0 2006.229.15:08:20.20#ibcon#enter sib2, iclass 5, count 0 2006.229.15:08:20.20#ibcon#flushed, iclass 5, count 0 2006.229.15:08:20.20#ibcon#about to write, iclass 5, count 0 2006.229.15:08:20.20#ibcon#wrote, iclass 5, count 0 2006.229.15:08:20.20#ibcon#about to read 3, iclass 5, count 0 2006.229.15:08:20.25#ibcon#read 3, iclass 5, count 0 2006.229.15:08:20.25#ibcon#about to read 4, iclass 5, count 0 2006.229.15:08:20.25#ibcon#read 4, iclass 5, count 0 2006.229.15:08:20.25#ibcon#about to read 5, iclass 5, count 0 2006.229.15:08:20.25#ibcon#read 5, iclass 5, count 0 2006.229.15:08:20.25#ibcon#about to read 6, iclass 5, count 0 2006.229.15:08:20.25#ibcon#read 6, iclass 5, count 0 2006.229.15:08:20.25#ibcon#end of sib2, iclass 5, count 0 2006.229.15:08:20.25#ibcon#*after write, iclass 5, count 0 2006.229.15:08:20.25#ibcon#*before return 0, iclass 5, count 0 2006.229.15:08:20.25#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:20.25#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:20.25#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:08:20.25#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:08:20.25$vck44/va=1,8 2006.229.15:08:20.25#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.15:08:20.25#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.15:08:20.25#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:20.25#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:20.25#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:20.25#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:20.25#ibcon#enter wrdev, iclass 7, count 2 2006.229.15:08:20.25#ibcon#first serial, iclass 7, count 2 2006.229.15:08:20.25#ibcon#enter sib2, iclass 7, count 2 2006.229.15:08:20.25#ibcon#flushed, iclass 7, count 2 2006.229.15:08:20.25#ibcon#about to write, iclass 7, count 2 2006.229.15:08:20.25#ibcon#wrote, iclass 7, count 2 2006.229.15:08:20.25#ibcon#about to read 3, iclass 7, count 2 2006.229.15:08:20.27#ibcon#read 3, iclass 7, count 2 2006.229.15:08:20.27#ibcon#about to read 4, iclass 7, count 2 2006.229.15:08:20.27#ibcon#read 4, iclass 7, count 2 2006.229.15:08:20.27#ibcon#about to read 5, iclass 7, count 2 2006.229.15:08:20.27#ibcon#read 5, iclass 7, count 2 2006.229.15:08:20.27#ibcon#about to read 6, iclass 7, count 2 2006.229.15:08:20.27#ibcon#read 6, iclass 7, count 2 2006.229.15:08:20.27#ibcon#end of sib2, iclass 7, count 2 2006.229.15:08:20.27#ibcon#*mode == 0, iclass 7, count 2 2006.229.15:08:20.27#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.15:08:20.27#ibcon#[25=AT01-08\r\n] 2006.229.15:08:20.27#ibcon#*before write, iclass 7, count 2 2006.229.15:08:20.27#ibcon#enter sib2, iclass 7, count 2 2006.229.15:08:20.27#ibcon#flushed, iclass 7, count 2 2006.229.15:08:20.27#ibcon#about to write, iclass 7, count 2 2006.229.15:08:20.27#ibcon#wrote, iclass 7, count 2 2006.229.15:08:20.27#ibcon#about to read 3, iclass 7, count 2 2006.229.15:08:20.30#ibcon#read 3, iclass 7, count 2 2006.229.15:08:20.30#ibcon#about to read 4, iclass 7, count 2 2006.229.15:08:20.30#ibcon#read 4, iclass 7, count 2 2006.229.15:08:20.30#ibcon#about to read 5, iclass 7, count 2 2006.229.15:08:20.30#ibcon#read 5, iclass 7, count 2 2006.229.15:08:20.30#ibcon#about to read 6, iclass 7, count 2 2006.229.15:08:20.30#ibcon#read 6, iclass 7, count 2 2006.229.15:08:20.30#ibcon#end of sib2, iclass 7, count 2 2006.229.15:08:20.30#ibcon#*after write, iclass 7, count 2 2006.229.15:08:20.30#ibcon#*before return 0, iclass 7, count 2 2006.229.15:08:20.30#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:20.30#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:20.30#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.15:08:20.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:20.30#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:20.42#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:20.42#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:20.42#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:08:20.42#ibcon#first serial, iclass 7, count 0 2006.229.15:08:20.42#ibcon#enter sib2, iclass 7, count 0 2006.229.15:08:20.42#ibcon#flushed, iclass 7, count 0 2006.229.15:08:20.42#ibcon#about to write, iclass 7, count 0 2006.229.15:08:20.42#ibcon#wrote, iclass 7, count 0 2006.229.15:08:20.42#ibcon#about to read 3, iclass 7, count 0 2006.229.15:08:20.44#ibcon#read 3, iclass 7, count 0 2006.229.15:08:20.44#ibcon#about to read 4, iclass 7, count 0 2006.229.15:08:20.44#ibcon#read 4, iclass 7, count 0 2006.229.15:08:20.44#ibcon#about to read 5, iclass 7, count 0 2006.229.15:08:20.44#ibcon#read 5, iclass 7, count 0 2006.229.15:08:20.44#ibcon#about to read 6, iclass 7, count 0 2006.229.15:08:20.44#ibcon#read 6, iclass 7, count 0 2006.229.15:08:20.44#ibcon#end of sib2, iclass 7, count 0 2006.229.15:08:20.44#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:08:20.44#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:08:20.44#ibcon#[25=USB\r\n] 2006.229.15:08:20.44#ibcon#*before write, iclass 7, count 0 2006.229.15:08:20.44#ibcon#enter sib2, iclass 7, count 0 2006.229.15:08:20.44#ibcon#flushed, iclass 7, count 0 2006.229.15:08:20.44#ibcon#about to write, iclass 7, count 0 2006.229.15:08:20.44#ibcon#wrote, iclass 7, count 0 2006.229.15:08:20.44#ibcon#about to read 3, iclass 7, count 0 2006.229.15:08:20.47#ibcon#read 3, iclass 7, count 0 2006.229.15:08:20.47#ibcon#about to read 4, iclass 7, count 0 2006.229.15:08:20.47#ibcon#read 4, iclass 7, count 0 2006.229.15:08:20.47#ibcon#about to read 5, iclass 7, count 0 2006.229.15:08:20.47#ibcon#read 5, iclass 7, count 0 2006.229.15:08:20.47#ibcon#about to read 6, iclass 7, count 0 2006.229.15:08:20.47#ibcon#read 6, iclass 7, count 0 2006.229.15:08:20.47#ibcon#end of sib2, iclass 7, count 0 2006.229.15:08:20.47#ibcon#*after write, iclass 7, count 0 2006.229.15:08:20.47#ibcon#*before return 0, iclass 7, count 0 2006.229.15:08:20.47#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:20.47#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:20.47#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:08:20.47#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:08:20.47$vck44/valo=2,534.99 2006.229.15:08:20.47#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.15:08:20.47#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.15:08:20.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:20.47#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:20.47#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:20.47#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:20.47#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:08:20.47#ibcon#first serial, iclass 11, count 0 2006.229.15:08:20.47#ibcon#enter sib2, iclass 11, count 0 2006.229.15:08:20.47#ibcon#flushed, iclass 11, count 0 2006.229.15:08:20.47#ibcon#about to write, iclass 11, count 0 2006.229.15:08:20.47#ibcon#wrote, iclass 11, count 0 2006.229.15:08:20.47#ibcon#about to read 3, iclass 11, count 0 2006.229.15:08:20.49#ibcon#read 3, iclass 11, count 0 2006.229.15:08:20.49#ibcon#about to read 4, iclass 11, count 0 2006.229.15:08:20.49#ibcon#read 4, iclass 11, count 0 2006.229.15:08:20.49#ibcon#about to read 5, iclass 11, count 0 2006.229.15:08:20.49#ibcon#read 5, iclass 11, count 0 2006.229.15:08:20.49#ibcon#about to read 6, iclass 11, count 0 2006.229.15:08:20.49#ibcon#read 6, iclass 11, count 0 2006.229.15:08:20.49#ibcon#end of sib2, iclass 11, count 0 2006.229.15:08:20.49#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:08:20.49#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:08:20.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:08:20.49#ibcon#*before write, iclass 11, count 0 2006.229.15:08:20.49#ibcon#enter sib2, iclass 11, count 0 2006.229.15:08:20.49#ibcon#flushed, iclass 11, count 0 2006.229.15:08:20.49#ibcon#about to write, iclass 11, count 0 2006.229.15:08:20.49#ibcon#wrote, iclass 11, count 0 2006.229.15:08:20.49#ibcon#about to read 3, iclass 11, count 0 2006.229.15:08:20.53#ibcon#read 3, iclass 11, count 0 2006.229.15:08:20.53#ibcon#about to read 4, iclass 11, count 0 2006.229.15:08:20.53#ibcon#read 4, iclass 11, count 0 2006.229.15:08:20.53#ibcon#about to read 5, iclass 11, count 0 2006.229.15:08:20.53#ibcon#read 5, iclass 11, count 0 2006.229.15:08:20.53#ibcon#about to read 6, iclass 11, count 0 2006.229.15:08:20.53#ibcon#read 6, iclass 11, count 0 2006.229.15:08:20.53#ibcon#end of sib2, iclass 11, count 0 2006.229.15:08:20.53#ibcon#*after write, iclass 11, count 0 2006.229.15:08:20.53#ibcon#*before return 0, iclass 11, count 0 2006.229.15:08:20.53#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:20.53#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:20.53#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:08:20.53#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:08:20.53$vck44/va=2,7 2006.229.15:08:20.53#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.15:08:20.53#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.15:08:20.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:20.53#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:20.59#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:20.59#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:20.59#ibcon#enter wrdev, iclass 13, count 2 2006.229.15:08:20.59#ibcon#first serial, iclass 13, count 2 2006.229.15:08:20.59#ibcon#enter sib2, iclass 13, count 2 2006.229.15:08:20.59#ibcon#flushed, iclass 13, count 2 2006.229.15:08:20.59#ibcon#about to write, iclass 13, count 2 2006.229.15:08:20.59#ibcon#wrote, iclass 13, count 2 2006.229.15:08:20.59#ibcon#about to read 3, iclass 13, count 2 2006.229.15:08:20.61#ibcon#read 3, iclass 13, count 2 2006.229.15:08:20.61#ibcon#about to read 4, iclass 13, count 2 2006.229.15:08:20.61#ibcon#read 4, iclass 13, count 2 2006.229.15:08:20.61#ibcon#about to read 5, iclass 13, count 2 2006.229.15:08:20.61#ibcon#read 5, iclass 13, count 2 2006.229.15:08:20.61#ibcon#about to read 6, iclass 13, count 2 2006.229.15:08:20.61#ibcon#read 6, iclass 13, count 2 2006.229.15:08:20.61#ibcon#end of sib2, iclass 13, count 2 2006.229.15:08:20.61#ibcon#*mode == 0, iclass 13, count 2 2006.229.15:08:20.61#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.15:08:20.61#ibcon#[25=AT02-07\r\n] 2006.229.15:08:20.61#ibcon#*before write, iclass 13, count 2 2006.229.15:08:20.61#ibcon#enter sib2, iclass 13, count 2 2006.229.15:08:20.61#ibcon#flushed, iclass 13, count 2 2006.229.15:08:20.61#ibcon#about to write, iclass 13, count 2 2006.229.15:08:20.61#ibcon#wrote, iclass 13, count 2 2006.229.15:08:20.61#ibcon#about to read 3, iclass 13, count 2 2006.229.15:08:20.64#ibcon#read 3, iclass 13, count 2 2006.229.15:08:20.64#ibcon#about to read 4, iclass 13, count 2 2006.229.15:08:20.64#ibcon#read 4, iclass 13, count 2 2006.229.15:08:20.64#ibcon#about to read 5, iclass 13, count 2 2006.229.15:08:20.64#ibcon#read 5, iclass 13, count 2 2006.229.15:08:20.64#ibcon#about to read 6, iclass 13, count 2 2006.229.15:08:20.64#ibcon#read 6, iclass 13, count 2 2006.229.15:08:20.64#ibcon#end of sib2, iclass 13, count 2 2006.229.15:08:20.64#ibcon#*after write, iclass 13, count 2 2006.229.15:08:20.64#ibcon#*before return 0, iclass 13, count 2 2006.229.15:08:20.64#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:20.64#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:20.64#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.15:08:20.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:20.64#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:20.76#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:20.76#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:20.76#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:08:20.76#ibcon#first serial, iclass 13, count 0 2006.229.15:08:20.76#ibcon#enter sib2, iclass 13, count 0 2006.229.15:08:20.76#ibcon#flushed, iclass 13, count 0 2006.229.15:08:20.76#ibcon#about to write, iclass 13, count 0 2006.229.15:08:20.76#ibcon#wrote, iclass 13, count 0 2006.229.15:08:20.76#ibcon#about to read 3, iclass 13, count 0 2006.229.15:08:20.78#ibcon#read 3, iclass 13, count 0 2006.229.15:08:20.78#ibcon#about to read 4, iclass 13, count 0 2006.229.15:08:20.78#ibcon#read 4, iclass 13, count 0 2006.229.15:08:20.78#ibcon#about to read 5, iclass 13, count 0 2006.229.15:08:20.78#ibcon#read 5, iclass 13, count 0 2006.229.15:08:20.78#ibcon#about to read 6, iclass 13, count 0 2006.229.15:08:20.78#ibcon#read 6, iclass 13, count 0 2006.229.15:08:20.78#ibcon#end of sib2, iclass 13, count 0 2006.229.15:08:20.78#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:08:20.78#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:08:20.78#ibcon#[25=USB\r\n] 2006.229.15:08:20.78#ibcon#*before write, iclass 13, count 0 2006.229.15:08:20.78#ibcon#enter sib2, iclass 13, count 0 2006.229.15:08:20.78#ibcon#flushed, iclass 13, count 0 2006.229.15:08:20.78#ibcon#about to write, iclass 13, count 0 2006.229.15:08:20.78#ibcon#wrote, iclass 13, count 0 2006.229.15:08:20.78#ibcon#about to read 3, iclass 13, count 0 2006.229.15:08:20.81#ibcon#read 3, iclass 13, count 0 2006.229.15:08:20.81#ibcon#about to read 4, iclass 13, count 0 2006.229.15:08:20.81#ibcon#read 4, iclass 13, count 0 2006.229.15:08:20.81#ibcon#about to read 5, iclass 13, count 0 2006.229.15:08:20.81#ibcon#read 5, iclass 13, count 0 2006.229.15:08:20.81#ibcon#about to read 6, iclass 13, count 0 2006.229.15:08:20.81#ibcon#read 6, iclass 13, count 0 2006.229.15:08:20.81#ibcon#end of sib2, iclass 13, count 0 2006.229.15:08:20.81#ibcon#*after write, iclass 13, count 0 2006.229.15:08:20.81#ibcon#*before return 0, iclass 13, count 0 2006.229.15:08:20.81#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:20.81#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:20.81#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:08:20.81#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:08:20.81$vck44/valo=3,564.99 2006.229.15:08:20.81#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:08:20.81#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:08:20.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:20.81#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:20.81#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:20.81#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:20.81#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:08:20.81#ibcon#first serial, iclass 15, count 0 2006.229.15:08:20.81#ibcon#enter sib2, iclass 15, count 0 2006.229.15:08:20.81#ibcon#flushed, iclass 15, count 0 2006.229.15:08:20.81#ibcon#about to write, iclass 15, count 0 2006.229.15:08:20.81#ibcon#wrote, iclass 15, count 0 2006.229.15:08:20.81#ibcon#about to read 3, iclass 15, count 0 2006.229.15:08:20.83#ibcon#read 3, iclass 15, count 0 2006.229.15:08:20.83#ibcon#about to read 4, iclass 15, count 0 2006.229.15:08:20.83#ibcon#read 4, iclass 15, count 0 2006.229.15:08:20.83#ibcon#about to read 5, iclass 15, count 0 2006.229.15:08:20.83#ibcon#read 5, iclass 15, count 0 2006.229.15:08:20.83#ibcon#about to read 6, iclass 15, count 0 2006.229.15:08:20.83#ibcon#read 6, iclass 15, count 0 2006.229.15:08:20.83#ibcon#end of sib2, iclass 15, count 0 2006.229.15:08:20.83#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:08:20.83#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:08:20.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:08:20.83#ibcon#*before write, iclass 15, count 0 2006.229.15:08:20.83#ibcon#enter sib2, iclass 15, count 0 2006.229.15:08:20.83#ibcon#flushed, iclass 15, count 0 2006.229.15:08:20.83#ibcon#about to write, iclass 15, count 0 2006.229.15:08:20.83#ibcon#wrote, iclass 15, count 0 2006.229.15:08:20.83#ibcon#about to read 3, iclass 15, count 0 2006.229.15:08:20.87#ibcon#read 3, iclass 15, count 0 2006.229.15:08:20.87#ibcon#about to read 4, iclass 15, count 0 2006.229.15:08:20.87#ibcon#read 4, iclass 15, count 0 2006.229.15:08:20.87#ibcon#about to read 5, iclass 15, count 0 2006.229.15:08:20.87#ibcon#read 5, iclass 15, count 0 2006.229.15:08:20.87#ibcon#about to read 6, iclass 15, count 0 2006.229.15:08:20.87#ibcon#read 6, iclass 15, count 0 2006.229.15:08:20.87#ibcon#end of sib2, iclass 15, count 0 2006.229.15:08:20.87#ibcon#*after write, iclass 15, count 0 2006.229.15:08:20.87#ibcon#*before return 0, iclass 15, count 0 2006.229.15:08:20.87#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:20.87#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:20.87#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:08:20.87#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:08:20.87$vck44/va=3,6 2006.229.15:08:20.87#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.15:08:20.87#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.15:08:20.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:20.87#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:20.93#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:20.93#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:20.93#ibcon#enter wrdev, iclass 17, count 2 2006.229.15:08:20.93#ibcon#first serial, iclass 17, count 2 2006.229.15:08:20.93#ibcon#enter sib2, iclass 17, count 2 2006.229.15:08:20.93#ibcon#flushed, iclass 17, count 2 2006.229.15:08:20.93#ibcon#about to write, iclass 17, count 2 2006.229.15:08:20.93#ibcon#wrote, iclass 17, count 2 2006.229.15:08:20.93#ibcon#about to read 3, iclass 17, count 2 2006.229.15:08:20.95#ibcon#read 3, iclass 17, count 2 2006.229.15:08:20.95#ibcon#about to read 4, iclass 17, count 2 2006.229.15:08:20.95#ibcon#read 4, iclass 17, count 2 2006.229.15:08:20.95#ibcon#about to read 5, iclass 17, count 2 2006.229.15:08:20.95#ibcon#read 5, iclass 17, count 2 2006.229.15:08:20.95#ibcon#about to read 6, iclass 17, count 2 2006.229.15:08:20.95#ibcon#read 6, iclass 17, count 2 2006.229.15:08:20.95#ibcon#end of sib2, iclass 17, count 2 2006.229.15:08:20.95#ibcon#*mode == 0, iclass 17, count 2 2006.229.15:08:20.95#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.15:08:20.95#ibcon#[25=AT03-06\r\n] 2006.229.15:08:20.95#ibcon#*before write, iclass 17, count 2 2006.229.15:08:20.95#ibcon#enter sib2, iclass 17, count 2 2006.229.15:08:20.95#ibcon#flushed, iclass 17, count 2 2006.229.15:08:20.95#ibcon#about to write, iclass 17, count 2 2006.229.15:08:20.95#ibcon#wrote, iclass 17, count 2 2006.229.15:08:20.95#ibcon#about to read 3, iclass 17, count 2 2006.229.15:08:20.98#ibcon#read 3, iclass 17, count 2 2006.229.15:08:20.98#ibcon#about to read 4, iclass 17, count 2 2006.229.15:08:20.98#ibcon#read 4, iclass 17, count 2 2006.229.15:08:20.98#ibcon#about to read 5, iclass 17, count 2 2006.229.15:08:20.98#ibcon#read 5, iclass 17, count 2 2006.229.15:08:20.98#ibcon#about to read 6, iclass 17, count 2 2006.229.15:08:20.98#ibcon#read 6, iclass 17, count 2 2006.229.15:08:20.98#ibcon#end of sib2, iclass 17, count 2 2006.229.15:08:20.98#ibcon#*after write, iclass 17, count 2 2006.229.15:08:20.98#ibcon#*before return 0, iclass 17, count 2 2006.229.15:08:20.98#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:20.98#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:20.98#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.15:08:20.98#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:20.98#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:21.10#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:21.10#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:21.10#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:08:21.10#ibcon#first serial, iclass 17, count 0 2006.229.15:08:21.10#ibcon#enter sib2, iclass 17, count 0 2006.229.15:08:21.10#ibcon#flushed, iclass 17, count 0 2006.229.15:08:21.10#ibcon#about to write, iclass 17, count 0 2006.229.15:08:21.10#ibcon#wrote, iclass 17, count 0 2006.229.15:08:21.10#ibcon#about to read 3, iclass 17, count 0 2006.229.15:08:21.12#ibcon#read 3, iclass 17, count 0 2006.229.15:08:21.12#ibcon#about to read 4, iclass 17, count 0 2006.229.15:08:21.12#ibcon#read 4, iclass 17, count 0 2006.229.15:08:21.12#ibcon#about to read 5, iclass 17, count 0 2006.229.15:08:21.12#ibcon#read 5, iclass 17, count 0 2006.229.15:08:21.12#ibcon#about to read 6, iclass 17, count 0 2006.229.15:08:21.12#ibcon#read 6, iclass 17, count 0 2006.229.15:08:21.12#ibcon#end of sib2, iclass 17, count 0 2006.229.15:08:21.12#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:08:21.12#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:08:21.12#ibcon#[25=USB\r\n] 2006.229.15:08:21.12#ibcon#*before write, iclass 17, count 0 2006.229.15:08:21.12#ibcon#enter sib2, iclass 17, count 0 2006.229.15:08:21.12#ibcon#flushed, iclass 17, count 0 2006.229.15:08:21.12#ibcon#about to write, iclass 17, count 0 2006.229.15:08:21.12#ibcon#wrote, iclass 17, count 0 2006.229.15:08:21.12#ibcon#about to read 3, iclass 17, count 0 2006.229.15:08:21.15#ibcon#read 3, iclass 17, count 0 2006.229.15:08:21.15#ibcon#about to read 4, iclass 17, count 0 2006.229.15:08:21.15#ibcon#read 4, iclass 17, count 0 2006.229.15:08:21.15#ibcon#about to read 5, iclass 17, count 0 2006.229.15:08:21.15#ibcon#read 5, iclass 17, count 0 2006.229.15:08:21.15#ibcon#about to read 6, iclass 17, count 0 2006.229.15:08:21.15#ibcon#read 6, iclass 17, count 0 2006.229.15:08:21.15#ibcon#end of sib2, iclass 17, count 0 2006.229.15:08:21.15#ibcon#*after write, iclass 17, count 0 2006.229.15:08:21.15#ibcon#*before return 0, iclass 17, count 0 2006.229.15:08:21.15#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:21.15#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:21.15#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:08:21.15#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:08:21.15$vck44/valo=4,624.99 2006.229.15:08:21.15#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.15:08:21.15#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.15:08:21.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:21.15#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:21.15#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:21.15#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:21.15#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:08:21.15#ibcon#first serial, iclass 19, count 0 2006.229.15:08:21.15#ibcon#enter sib2, iclass 19, count 0 2006.229.15:08:21.15#ibcon#flushed, iclass 19, count 0 2006.229.15:08:21.15#ibcon#about to write, iclass 19, count 0 2006.229.15:08:21.15#ibcon#wrote, iclass 19, count 0 2006.229.15:08:21.15#ibcon#about to read 3, iclass 19, count 0 2006.229.15:08:21.17#ibcon#read 3, iclass 19, count 0 2006.229.15:08:21.17#ibcon#about to read 4, iclass 19, count 0 2006.229.15:08:21.17#ibcon#read 4, iclass 19, count 0 2006.229.15:08:21.17#ibcon#about to read 5, iclass 19, count 0 2006.229.15:08:21.17#ibcon#read 5, iclass 19, count 0 2006.229.15:08:21.17#ibcon#about to read 6, iclass 19, count 0 2006.229.15:08:21.17#ibcon#read 6, iclass 19, count 0 2006.229.15:08:21.17#ibcon#end of sib2, iclass 19, count 0 2006.229.15:08:21.17#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:08:21.17#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:08:21.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:08:21.17#ibcon#*before write, iclass 19, count 0 2006.229.15:08:21.17#ibcon#enter sib2, iclass 19, count 0 2006.229.15:08:21.17#ibcon#flushed, iclass 19, count 0 2006.229.15:08:21.17#ibcon#about to write, iclass 19, count 0 2006.229.15:08:21.17#ibcon#wrote, iclass 19, count 0 2006.229.15:08:21.17#ibcon#about to read 3, iclass 19, count 0 2006.229.15:08:21.21#ibcon#read 3, iclass 19, count 0 2006.229.15:08:21.21#ibcon#about to read 4, iclass 19, count 0 2006.229.15:08:21.21#ibcon#read 4, iclass 19, count 0 2006.229.15:08:21.21#ibcon#about to read 5, iclass 19, count 0 2006.229.15:08:21.21#ibcon#read 5, iclass 19, count 0 2006.229.15:08:21.21#ibcon#about to read 6, iclass 19, count 0 2006.229.15:08:21.21#ibcon#read 6, iclass 19, count 0 2006.229.15:08:21.21#ibcon#end of sib2, iclass 19, count 0 2006.229.15:08:21.21#ibcon#*after write, iclass 19, count 0 2006.229.15:08:21.21#ibcon#*before return 0, iclass 19, count 0 2006.229.15:08:21.21#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:21.21#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:21.21#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:08:21.21#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:08:21.21$vck44/va=4,7 2006.229.15:08:21.21#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.15:08:21.21#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.15:08:21.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:21.21#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:21.27#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:21.27#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:21.27#ibcon#enter wrdev, iclass 21, count 2 2006.229.15:08:21.27#ibcon#first serial, iclass 21, count 2 2006.229.15:08:21.27#ibcon#enter sib2, iclass 21, count 2 2006.229.15:08:21.27#ibcon#flushed, iclass 21, count 2 2006.229.15:08:21.27#ibcon#about to write, iclass 21, count 2 2006.229.15:08:21.27#ibcon#wrote, iclass 21, count 2 2006.229.15:08:21.27#ibcon#about to read 3, iclass 21, count 2 2006.229.15:08:21.29#ibcon#read 3, iclass 21, count 2 2006.229.15:08:21.29#ibcon#about to read 4, iclass 21, count 2 2006.229.15:08:21.29#ibcon#read 4, iclass 21, count 2 2006.229.15:08:21.29#ibcon#about to read 5, iclass 21, count 2 2006.229.15:08:21.29#ibcon#read 5, iclass 21, count 2 2006.229.15:08:21.29#ibcon#about to read 6, iclass 21, count 2 2006.229.15:08:21.29#ibcon#read 6, iclass 21, count 2 2006.229.15:08:21.29#ibcon#end of sib2, iclass 21, count 2 2006.229.15:08:21.29#ibcon#*mode == 0, iclass 21, count 2 2006.229.15:08:21.29#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.15:08:21.29#ibcon#[25=AT04-07\r\n] 2006.229.15:08:21.29#ibcon#*before write, iclass 21, count 2 2006.229.15:08:21.29#ibcon#enter sib2, iclass 21, count 2 2006.229.15:08:21.29#ibcon#flushed, iclass 21, count 2 2006.229.15:08:21.29#ibcon#about to write, iclass 21, count 2 2006.229.15:08:21.29#ibcon#wrote, iclass 21, count 2 2006.229.15:08:21.29#ibcon#about to read 3, iclass 21, count 2 2006.229.15:08:21.32#ibcon#read 3, iclass 21, count 2 2006.229.15:08:21.32#ibcon#about to read 4, iclass 21, count 2 2006.229.15:08:21.32#ibcon#read 4, iclass 21, count 2 2006.229.15:08:21.32#ibcon#about to read 5, iclass 21, count 2 2006.229.15:08:21.32#ibcon#read 5, iclass 21, count 2 2006.229.15:08:21.32#ibcon#about to read 6, iclass 21, count 2 2006.229.15:08:21.32#ibcon#read 6, iclass 21, count 2 2006.229.15:08:21.32#ibcon#end of sib2, iclass 21, count 2 2006.229.15:08:21.32#ibcon#*after write, iclass 21, count 2 2006.229.15:08:21.32#ibcon#*before return 0, iclass 21, count 2 2006.229.15:08:21.32#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:21.32#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:21.32#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.15:08:21.32#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:21.32#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:21.44#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:21.44#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:21.44#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:08:21.44#ibcon#first serial, iclass 21, count 0 2006.229.15:08:21.44#ibcon#enter sib2, iclass 21, count 0 2006.229.15:08:21.44#ibcon#flushed, iclass 21, count 0 2006.229.15:08:21.44#ibcon#about to write, iclass 21, count 0 2006.229.15:08:21.44#ibcon#wrote, iclass 21, count 0 2006.229.15:08:21.44#ibcon#about to read 3, iclass 21, count 0 2006.229.15:08:21.46#ibcon#read 3, iclass 21, count 0 2006.229.15:08:21.46#ibcon#about to read 4, iclass 21, count 0 2006.229.15:08:21.46#ibcon#read 4, iclass 21, count 0 2006.229.15:08:21.46#ibcon#about to read 5, iclass 21, count 0 2006.229.15:08:21.46#ibcon#read 5, iclass 21, count 0 2006.229.15:08:21.46#ibcon#about to read 6, iclass 21, count 0 2006.229.15:08:21.46#ibcon#read 6, iclass 21, count 0 2006.229.15:08:21.46#ibcon#end of sib2, iclass 21, count 0 2006.229.15:08:21.46#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:08:21.46#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:08:21.46#ibcon#[25=USB\r\n] 2006.229.15:08:21.46#ibcon#*before write, iclass 21, count 0 2006.229.15:08:21.46#ibcon#enter sib2, iclass 21, count 0 2006.229.15:08:21.46#ibcon#flushed, iclass 21, count 0 2006.229.15:08:21.46#ibcon#about to write, iclass 21, count 0 2006.229.15:08:21.46#ibcon#wrote, iclass 21, count 0 2006.229.15:08:21.46#ibcon#about to read 3, iclass 21, count 0 2006.229.15:08:21.49#ibcon#read 3, iclass 21, count 0 2006.229.15:08:21.49#ibcon#about to read 4, iclass 21, count 0 2006.229.15:08:21.49#ibcon#read 4, iclass 21, count 0 2006.229.15:08:21.49#ibcon#about to read 5, iclass 21, count 0 2006.229.15:08:21.49#ibcon#read 5, iclass 21, count 0 2006.229.15:08:21.49#ibcon#about to read 6, iclass 21, count 0 2006.229.15:08:21.49#ibcon#read 6, iclass 21, count 0 2006.229.15:08:21.49#ibcon#end of sib2, iclass 21, count 0 2006.229.15:08:21.49#ibcon#*after write, iclass 21, count 0 2006.229.15:08:21.49#ibcon#*before return 0, iclass 21, count 0 2006.229.15:08:21.49#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:21.49#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:21.49#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:08:21.49#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:08:21.49$vck44/valo=5,734.99 2006.229.15:08:21.49#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.15:08:21.49#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.15:08:21.49#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:21.49#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:21.49#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:21.49#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:21.49#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:08:21.49#ibcon#first serial, iclass 23, count 0 2006.229.15:08:21.49#ibcon#enter sib2, iclass 23, count 0 2006.229.15:08:21.49#ibcon#flushed, iclass 23, count 0 2006.229.15:08:21.49#ibcon#about to write, iclass 23, count 0 2006.229.15:08:21.49#ibcon#wrote, iclass 23, count 0 2006.229.15:08:21.49#ibcon#about to read 3, iclass 23, count 0 2006.229.15:08:21.51#ibcon#read 3, iclass 23, count 0 2006.229.15:08:21.51#ibcon#about to read 4, iclass 23, count 0 2006.229.15:08:21.51#ibcon#read 4, iclass 23, count 0 2006.229.15:08:21.51#ibcon#about to read 5, iclass 23, count 0 2006.229.15:08:21.51#ibcon#read 5, iclass 23, count 0 2006.229.15:08:21.51#ibcon#about to read 6, iclass 23, count 0 2006.229.15:08:21.51#ibcon#read 6, iclass 23, count 0 2006.229.15:08:21.51#ibcon#end of sib2, iclass 23, count 0 2006.229.15:08:21.51#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:08:21.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:08:21.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:08:21.51#ibcon#*before write, iclass 23, count 0 2006.229.15:08:21.51#ibcon#enter sib2, iclass 23, count 0 2006.229.15:08:21.51#ibcon#flushed, iclass 23, count 0 2006.229.15:08:21.51#ibcon#about to write, iclass 23, count 0 2006.229.15:08:21.51#ibcon#wrote, iclass 23, count 0 2006.229.15:08:21.51#ibcon#about to read 3, iclass 23, count 0 2006.229.15:08:21.55#ibcon#read 3, iclass 23, count 0 2006.229.15:08:21.55#ibcon#about to read 4, iclass 23, count 0 2006.229.15:08:21.55#ibcon#read 4, iclass 23, count 0 2006.229.15:08:21.55#ibcon#about to read 5, iclass 23, count 0 2006.229.15:08:21.55#ibcon#read 5, iclass 23, count 0 2006.229.15:08:21.55#ibcon#about to read 6, iclass 23, count 0 2006.229.15:08:21.55#ibcon#read 6, iclass 23, count 0 2006.229.15:08:21.55#ibcon#end of sib2, iclass 23, count 0 2006.229.15:08:21.55#ibcon#*after write, iclass 23, count 0 2006.229.15:08:21.55#ibcon#*before return 0, iclass 23, count 0 2006.229.15:08:21.55#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:21.55#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:21.55#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:08:21.55#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:08:21.55$vck44/va=5,4 2006.229.15:08:21.55#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.15:08:21.55#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.15:08:21.55#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:21.55#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:21.61#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:21.61#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:21.61#ibcon#enter wrdev, iclass 25, count 2 2006.229.15:08:21.61#ibcon#first serial, iclass 25, count 2 2006.229.15:08:21.61#ibcon#enter sib2, iclass 25, count 2 2006.229.15:08:21.61#ibcon#flushed, iclass 25, count 2 2006.229.15:08:21.61#ibcon#about to write, iclass 25, count 2 2006.229.15:08:21.61#ibcon#wrote, iclass 25, count 2 2006.229.15:08:21.61#ibcon#about to read 3, iclass 25, count 2 2006.229.15:08:21.63#ibcon#read 3, iclass 25, count 2 2006.229.15:08:21.63#ibcon#about to read 4, iclass 25, count 2 2006.229.15:08:21.63#ibcon#read 4, iclass 25, count 2 2006.229.15:08:21.63#ibcon#about to read 5, iclass 25, count 2 2006.229.15:08:21.63#ibcon#read 5, iclass 25, count 2 2006.229.15:08:21.63#ibcon#about to read 6, iclass 25, count 2 2006.229.15:08:21.63#ibcon#read 6, iclass 25, count 2 2006.229.15:08:21.63#ibcon#end of sib2, iclass 25, count 2 2006.229.15:08:21.63#ibcon#*mode == 0, iclass 25, count 2 2006.229.15:08:21.63#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.15:08:21.63#ibcon#[25=AT05-04\r\n] 2006.229.15:08:21.63#ibcon#*before write, iclass 25, count 2 2006.229.15:08:21.63#ibcon#enter sib2, iclass 25, count 2 2006.229.15:08:21.63#ibcon#flushed, iclass 25, count 2 2006.229.15:08:21.63#ibcon#about to write, iclass 25, count 2 2006.229.15:08:21.63#ibcon#wrote, iclass 25, count 2 2006.229.15:08:21.63#ibcon#about to read 3, iclass 25, count 2 2006.229.15:08:21.66#ibcon#read 3, iclass 25, count 2 2006.229.15:08:21.66#ibcon#about to read 4, iclass 25, count 2 2006.229.15:08:21.66#ibcon#read 4, iclass 25, count 2 2006.229.15:08:21.66#ibcon#about to read 5, iclass 25, count 2 2006.229.15:08:21.66#ibcon#read 5, iclass 25, count 2 2006.229.15:08:21.66#ibcon#about to read 6, iclass 25, count 2 2006.229.15:08:21.66#ibcon#read 6, iclass 25, count 2 2006.229.15:08:21.66#ibcon#end of sib2, iclass 25, count 2 2006.229.15:08:21.66#ibcon#*after write, iclass 25, count 2 2006.229.15:08:21.66#ibcon#*before return 0, iclass 25, count 2 2006.229.15:08:21.66#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:21.66#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:21.66#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.15:08:21.66#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:21.66#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:21.78#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:21.78#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:21.78#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:08:21.78#ibcon#first serial, iclass 25, count 0 2006.229.15:08:21.78#ibcon#enter sib2, iclass 25, count 0 2006.229.15:08:21.78#ibcon#flushed, iclass 25, count 0 2006.229.15:08:21.78#ibcon#about to write, iclass 25, count 0 2006.229.15:08:21.78#ibcon#wrote, iclass 25, count 0 2006.229.15:08:21.78#ibcon#about to read 3, iclass 25, count 0 2006.229.15:08:21.80#ibcon#read 3, iclass 25, count 0 2006.229.15:08:21.80#ibcon#about to read 4, iclass 25, count 0 2006.229.15:08:21.80#ibcon#read 4, iclass 25, count 0 2006.229.15:08:21.80#ibcon#about to read 5, iclass 25, count 0 2006.229.15:08:21.80#ibcon#read 5, iclass 25, count 0 2006.229.15:08:21.80#ibcon#about to read 6, iclass 25, count 0 2006.229.15:08:21.80#ibcon#read 6, iclass 25, count 0 2006.229.15:08:21.80#ibcon#end of sib2, iclass 25, count 0 2006.229.15:08:21.80#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:08:21.80#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:08:21.80#ibcon#[25=USB\r\n] 2006.229.15:08:21.80#ibcon#*before write, iclass 25, count 0 2006.229.15:08:21.80#ibcon#enter sib2, iclass 25, count 0 2006.229.15:08:21.80#ibcon#flushed, iclass 25, count 0 2006.229.15:08:21.80#ibcon#about to write, iclass 25, count 0 2006.229.15:08:21.80#ibcon#wrote, iclass 25, count 0 2006.229.15:08:21.80#ibcon#about to read 3, iclass 25, count 0 2006.229.15:08:21.83#ibcon#read 3, iclass 25, count 0 2006.229.15:08:21.83#ibcon#about to read 4, iclass 25, count 0 2006.229.15:08:21.83#ibcon#read 4, iclass 25, count 0 2006.229.15:08:21.83#ibcon#about to read 5, iclass 25, count 0 2006.229.15:08:21.83#ibcon#read 5, iclass 25, count 0 2006.229.15:08:21.83#ibcon#about to read 6, iclass 25, count 0 2006.229.15:08:21.83#ibcon#read 6, iclass 25, count 0 2006.229.15:08:21.83#ibcon#end of sib2, iclass 25, count 0 2006.229.15:08:21.83#ibcon#*after write, iclass 25, count 0 2006.229.15:08:21.83#ibcon#*before return 0, iclass 25, count 0 2006.229.15:08:21.83#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:21.83#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:21.83#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:08:21.83#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:08:21.83$vck44/valo=6,814.99 2006.229.15:08:21.83#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.15:08:21.83#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.15:08:21.83#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:21.83#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:21.83#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:21.83#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:21.83#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:08:21.83#ibcon#first serial, iclass 27, count 0 2006.229.15:08:21.83#ibcon#enter sib2, iclass 27, count 0 2006.229.15:08:21.83#ibcon#flushed, iclass 27, count 0 2006.229.15:08:21.83#ibcon#about to write, iclass 27, count 0 2006.229.15:08:21.83#ibcon#wrote, iclass 27, count 0 2006.229.15:08:21.83#ibcon#about to read 3, iclass 27, count 0 2006.229.15:08:21.85#ibcon#read 3, iclass 27, count 0 2006.229.15:08:21.85#ibcon#about to read 4, iclass 27, count 0 2006.229.15:08:21.85#ibcon#read 4, iclass 27, count 0 2006.229.15:08:21.85#ibcon#about to read 5, iclass 27, count 0 2006.229.15:08:21.85#ibcon#read 5, iclass 27, count 0 2006.229.15:08:21.85#ibcon#about to read 6, iclass 27, count 0 2006.229.15:08:21.85#ibcon#read 6, iclass 27, count 0 2006.229.15:08:21.85#ibcon#end of sib2, iclass 27, count 0 2006.229.15:08:21.85#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:08:21.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:08:21.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:08:21.85#ibcon#*before write, iclass 27, count 0 2006.229.15:08:21.85#ibcon#enter sib2, iclass 27, count 0 2006.229.15:08:21.85#ibcon#flushed, iclass 27, count 0 2006.229.15:08:21.85#ibcon#about to write, iclass 27, count 0 2006.229.15:08:21.85#ibcon#wrote, iclass 27, count 0 2006.229.15:08:21.85#ibcon#about to read 3, iclass 27, count 0 2006.229.15:08:21.89#ibcon#read 3, iclass 27, count 0 2006.229.15:08:21.89#ibcon#about to read 4, iclass 27, count 0 2006.229.15:08:21.89#ibcon#read 4, iclass 27, count 0 2006.229.15:08:21.89#ibcon#about to read 5, iclass 27, count 0 2006.229.15:08:21.89#ibcon#read 5, iclass 27, count 0 2006.229.15:08:21.89#ibcon#about to read 6, iclass 27, count 0 2006.229.15:08:21.89#ibcon#read 6, iclass 27, count 0 2006.229.15:08:21.89#ibcon#end of sib2, iclass 27, count 0 2006.229.15:08:21.89#ibcon#*after write, iclass 27, count 0 2006.229.15:08:21.89#ibcon#*before return 0, iclass 27, count 0 2006.229.15:08:21.89#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:21.89#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:21.89#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:08:21.89#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:08:21.89$vck44/va=6,4 2006.229.15:08:21.89#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.15:08:21.89#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.15:08:21.89#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:21.89#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:21.95#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:21.95#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:21.95#ibcon#enter wrdev, iclass 29, count 2 2006.229.15:08:21.95#ibcon#first serial, iclass 29, count 2 2006.229.15:08:21.95#ibcon#enter sib2, iclass 29, count 2 2006.229.15:08:21.95#ibcon#flushed, iclass 29, count 2 2006.229.15:08:21.95#ibcon#about to write, iclass 29, count 2 2006.229.15:08:21.95#ibcon#wrote, iclass 29, count 2 2006.229.15:08:21.95#ibcon#about to read 3, iclass 29, count 2 2006.229.15:08:21.97#ibcon#read 3, iclass 29, count 2 2006.229.15:08:21.97#ibcon#about to read 4, iclass 29, count 2 2006.229.15:08:21.97#ibcon#read 4, iclass 29, count 2 2006.229.15:08:21.97#ibcon#about to read 5, iclass 29, count 2 2006.229.15:08:21.97#ibcon#read 5, iclass 29, count 2 2006.229.15:08:21.97#ibcon#about to read 6, iclass 29, count 2 2006.229.15:08:21.97#ibcon#read 6, iclass 29, count 2 2006.229.15:08:21.97#ibcon#end of sib2, iclass 29, count 2 2006.229.15:08:21.97#ibcon#*mode == 0, iclass 29, count 2 2006.229.15:08:21.97#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.15:08:21.97#ibcon#[25=AT06-04\r\n] 2006.229.15:08:21.97#ibcon#*before write, iclass 29, count 2 2006.229.15:08:21.97#ibcon#enter sib2, iclass 29, count 2 2006.229.15:08:21.97#ibcon#flushed, iclass 29, count 2 2006.229.15:08:21.97#ibcon#about to write, iclass 29, count 2 2006.229.15:08:21.97#ibcon#wrote, iclass 29, count 2 2006.229.15:08:21.97#ibcon#about to read 3, iclass 29, count 2 2006.229.15:08:22.00#ibcon#read 3, iclass 29, count 2 2006.229.15:08:22.00#ibcon#about to read 4, iclass 29, count 2 2006.229.15:08:22.00#ibcon#read 4, iclass 29, count 2 2006.229.15:08:22.00#ibcon#about to read 5, iclass 29, count 2 2006.229.15:08:22.00#ibcon#read 5, iclass 29, count 2 2006.229.15:08:22.00#ibcon#about to read 6, iclass 29, count 2 2006.229.15:08:22.00#ibcon#read 6, iclass 29, count 2 2006.229.15:08:22.00#ibcon#end of sib2, iclass 29, count 2 2006.229.15:08:22.00#ibcon#*after write, iclass 29, count 2 2006.229.15:08:22.00#ibcon#*before return 0, iclass 29, count 2 2006.229.15:08:22.00#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:22.00#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:22.00#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.15:08:22.00#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:22.00#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:22.12#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:22.12#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:22.12#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:08:22.12#ibcon#first serial, iclass 29, count 0 2006.229.15:08:22.12#ibcon#enter sib2, iclass 29, count 0 2006.229.15:08:22.12#ibcon#flushed, iclass 29, count 0 2006.229.15:08:22.12#ibcon#about to write, iclass 29, count 0 2006.229.15:08:22.12#ibcon#wrote, iclass 29, count 0 2006.229.15:08:22.12#ibcon#about to read 3, iclass 29, count 0 2006.229.15:08:22.14#ibcon#read 3, iclass 29, count 0 2006.229.15:08:22.14#ibcon#about to read 4, iclass 29, count 0 2006.229.15:08:22.14#ibcon#read 4, iclass 29, count 0 2006.229.15:08:22.14#ibcon#about to read 5, iclass 29, count 0 2006.229.15:08:22.14#ibcon#read 5, iclass 29, count 0 2006.229.15:08:22.14#ibcon#about to read 6, iclass 29, count 0 2006.229.15:08:22.14#ibcon#read 6, iclass 29, count 0 2006.229.15:08:22.14#ibcon#end of sib2, iclass 29, count 0 2006.229.15:08:22.14#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:08:22.14#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:08:22.14#ibcon#[25=USB\r\n] 2006.229.15:08:22.14#ibcon#*before write, iclass 29, count 0 2006.229.15:08:22.14#ibcon#enter sib2, iclass 29, count 0 2006.229.15:08:22.14#ibcon#flushed, iclass 29, count 0 2006.229.15:08:22.14#ibcon#about to write, iclass 29, count 0 2006.229.15:08:22.14#ibcon#wrote, iclass 29, count 0 2006.229.15:08:22.14#ibcon#about to read 3, iclass 29, count 0 2006.229.15:08:22.17#ibcon#read 3, iclass 29, count 0 2006.229.15:08:22.17#ibcon#about to read 4, iclass 29, count 0 2006.229.15:08:22.17#ibcon#read 4, iclass 29, count 0 2006.229.15:08:22.17#ibcon#about to read 5, iclass 29, count 0 2006.229.15:08:22.17#ibcon#read 5, iclass 29, count 0 2006.229.15:08:22.17#ibcon#about to read 6, iclass 29, count 0 2006.229.15:08:22.17#ibcon#read 6, iclass 29, count 0 2006.229.15:08:22.17#ibcon#end of sib2, iclass 29, count 0 2006.229.15:08:22.17#ibcon#*after write, iclass 29, count 0 2006.229.15:08:22.17#ibcon#*before return 0, iclass 29, count 0 2006.229.15:08:22.17#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:22.17#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:22.17#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:08:22.17#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:08:22.17$vck44/valo=7,864.99 2006.229.15:08:22.17#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.15:08:22.17#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.15:08:22.17#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:22.17#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:22.17#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:22.17#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:22.17#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:08:22.17#ibcon#first serial, iclass 31, count 0 2006.229.15:08:22.17#ibcon#enter sib2, iclass 31, count 0 2006.229.15:08:22.17#ibcon#flushed, iclass 31, count 0 2006.229.15:08:22.17#ibcon#about to write, iclass 31, count 0 2006.229.15:08:22.17#ibcon#wrote, iclass 31, count 0 2006.229.15:08:22.17#ibcon#about to read 3, iclass 31, count 0 2006.229.15:08:22.19#ibcon#read 3, iclass 31, count 0 2006.229.15:08:22.19#ibcon#about to read 4, iclass 31, count 0 2006.229.15:08:22.19#ibcon#read 4, iclass 31, count 0 2006.229.15:08:22.19#ibcon#about to read 5, iclass 31, count 0 2006.229.15:08:22.19#ibcon#read 5, iclass 31, count 0 2006.229.15:08:22.19#ibcon#about to read 6, iclass 31, count 0 2006.229.15:08:22.19#ibcon#read 6, iclass 31, count 0 2006.229.15:08:22.19#ibcon#end of sib2, iclass 31, count 0 2006.229.15:08:22.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:08:22.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:08:22.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:08:22.19#ibcon#*before write, iclass 31, count 0 2006.229.15:08:22.19#ibcon#enter sib2, iclass 31, count 0 2006.229.15:08:22.19#ibcon#flushed, iclass 31, count 0 2006.229.15:08:22.19#ibcon#about to write, iclass 31, count 0 2006.229.15:08:22.19#ibcon#wrote, iclass 31, count 0 2006.229.15:08:22.19#ibcon#about to read 3, iclass 31, count 0 2006.229.15:08:22.23#ibcon#read 3, iclass 31, count 0 2006.229.15:08:22.23#ibcon#about to read 4, iclass 31, count 0 2006.229.15:08:22.23#ibcon#read 4, iclass 31, count 0 2006.229.15:08:22.23#ibcon#about to read 5, iclass 31, count 0 2006.229.15:08:22.23#ibcon#read 5, iclass 31, count 0 2006.229.15:08:22.23#ibcon#about to read 6, iclass 31, count 0 2006.229.15:08:22.23#ibcon#read 6, iclass 31, count 0 2006.229.15:08:22.23#ibcon#end of sib2, iclass 31, count 0 2006.229.15:08:22.23#ibcon#*after write, iclass 31, count 0 2006.229.15:08:22.23#ibcon#*before return 0, iclass 31, count 0 2006.229.15:08:22.23#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:22.23#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:22.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:08:22.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:08:22.23$vck44/va=7,5 2006.229.15:08:22.23#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.15:08:22.23#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.15:08:22.23#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:22.23#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:22.29#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:22.29#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:22.29#ibcon#enter wrdev, iclass 33, count 2 2006.229.15:08:22.29#ibcon#first serial, iclass 33, count 2 2006.229.15:08:22.29#ibcon#enter sib2, iclass 33, count 2 2006.229.15:08:22.29#ibcon#flushed, iclass 33, count 2 2006.229.15:08:22.29#ibcon#about to write, iclass 33, count 2 2006.229.15:08:22.29#ibcon#wrote, iclass 33, count 2 2006.229.15:08:22.29#ibcon#about to read 3, iclass 33, count 2 2006.229.15:08:22.31#ibcon#read 3, iclass 33, count 2 2006.229.15:08:22.31#ibcon#about to read 4, iclass 33, count 2 2006.229.15:08:22.31#ibcon#read 4, iclass 33, count 2 2006.229.15:08:22.31#ibcon#about to read 5, iclass 33, count 2 2006.229.15:08:22.31#ibcon#read 5, iclass 33, count 2 2006.229.15:08:22.31#ibcon#about to read 6, iclass 33, count 2 2006.229.15:08:22.31#ibcon#read 6, iclass 33, count 2 2006.229.15:08:22.31#ibcon#end of sib2, iclass 33, count 2 2006.229.15:08:22.31#ibcon#*mode == 0, iclass 33, count 2 2006.229.15:08:22.31#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.15:08:22.31#ibcon#[25=AT07-05\r\n] 2006.229.15:08:22.31#ibcon#*before write, iclass 33, count 2 2006.229.15:08:22.31#ibcon#enter sib2, iclass 33, count 2 2006.229.15:08:22.31#ibcon#flushed, iclass 33, count 2 2006.229.15:08:22.31#ibcon#about to write, iclass 33, count 2 2006.229.15:08:22.31#ibcon#wrote, iclass 33, count 2 2006.229.15:08:22.31#ibcon#about to read 3, iclass 33, count 2 2006.229.15:08:22.34#ibcon#read 3, iclass 33, count 2 2006.229.15:08:22.34#ibcon#about to read 4, iclass 33, count 2 2006.229.15:08:22.34#ibcon#read 4, iclass 33, count 2 2006.229.15:08:22.34#ibcon#about to read 5, iclass 33, count 2 2006.229.15:08:22.34#ibcon#read 5, iclass 33, count 2 2006.229.15:08:22.34#ibcon#about to read 6, iclass 33, count 2 2006.229.15:08:22.34#ibcon#read 6, iclass 33, count 2 2006.229.15:08:22.34#ibcon#end of sib2, iclass 33, count 2 2006.229.15:08:22.34#ibcon#*after write, iclass 33, count 2 2006.229.15:08:22.34#ibcon#*before return 0, iclass 33, count 2 2006.229.15:08:22.34#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:22.34#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:22.34#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.15:08:22.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:22.34#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:22.46#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:22.46#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:22.46#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:08:22.46#ibcon#first serial, iclass 33, count 0 2006.229.15:08:22.46#ibcon#enter sib2, iclass 33, count 0 2006.229.15:08:22.46#ibcon#flushed, iclass 33, count 0 2006.229.15:08:22.46#ibcon#about to write, iclass 33, count 0 2006.229.15:08:22.46#ibcon#wrote, iclass 33, count 0 2006.229.15:08:22.46#ibcon#about to read 3, iclass 33, count 0 2006.229.15:08:22.48#ibcon#read 3, iclass 33, count 0 2006.229.15:08:22.48#ibcon#about to read 4, iclass 33, count 0 2006.229.15:08:22.48#ibcon#read 4, iclass 33, count 0 2006.229.15:08:22.48#ibcon#about to read 5, iclass 33, count 0 2006.229.15:08:22.48#ibcon#read 5, iclass 33, count 0 2006.229.15:08:22.48#ibcon#about to read 6, iclass 33, count 0 2006.229.15:08:22.48#ibcon#read 6, iclass 33, count 0 2006.229.15:08:22.48#ibcon#end of sib2, iclass 33, count 0 2006.229.15:08:22.48#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:08:22.48#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:08:22.48#ibcon#[25=USB\r\n] 2006.229.15:08:22.48#ibcon#*before write, iclass 33, count 0 2006.229.15:08:22.48#ibcon#enter sib2, iclass 33, count 0 2006.229.15:08:22.48#ibcon#flushed, iclass 33, count 0 2006.229.15:08:22.48#ibcon#about to write, iclass 33, count 0 2006.229.15:08:22.48#ibcon#wrote, iclass 33, count 0 2006.229.15:08:22.48#ibcon#about to read 3, iclass 33, count 0 2006.229.15:08:22.51#ibcon#read 3, iclass 33, count 0 2006.229.15:08:22.51#ibcon#about to read 4, iclass 33, count 0 2006.229.15:08:22.51#ibcon#read 4, iclass 33, count 0 2006.229.15:08:22.51#ibcon#about to read 5, iclass 33, count 0 2006.229.15:08:22.51#ibcon#read 5, iclass 33, count 0 2006.229.15:08:22.51#ibcon#about to read 6, iclass 33, count 0 2006.229.15:08:22.51#ibcon#read 6, iclass 33, count 0 2006.229.15:08:22.51#ibcon#end of sib2, iclass 33, count 0 2006.229.15:08:22.51#ibcon#*after write, iclass 33, count 0 2006.229.15:08:22.51#ibcon#*before return 0, iclass 33, count 0 2006.229.15:08:22.51#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:22.51#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:22.51#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:08:22.51#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:08:22.51$vck44/valo=8,884.99 2006.229.15:08:22.51#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.15:08:22.51#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.15:08:22.51#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:22.51#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:08:22.51#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:08:22.51#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:08:22.51#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:08:22.51#ibcon#first serial, iclass 35, count 0 2006.229.15:08:22.51#ibcon#enter sib2, iclass 35, count 0 2006.229.15:08:22.51#ibcon#flushed, iclass 35, count 0 2006.229.15:08:22.51#ibcon#about to write, iclass 35, count 0 2006.229.15:08:22.51#ibcon#wrote, iclass 35, count 0 2006.229.15:08:22.51#ibcon#about to read 3, iclass 35, count 0 2006.229.15:08:22.53#ibcon#read 3, iclass 35, count 0 2006.229.15:08:22.53#ibcon#about to read 4, iclass 35, count 0 2006.229.15:08:22.53#ibcon#read 4, iclass 35, count 0 2006.229.15:08:22.53#ibcon#about to read 5, iclass 35, count 0 2006.229.15:08:22.53#ibcon#read 5, iclass 35, count 0 2006.229.15:08:22.53#ibcon#about to read 6, iclass 35, count 0 2006.229.15:08:22.53#ibcon#read 6, iclass 35, count 0 2006.229.15:08:22.53#ibcon#end of sib2, iclass 35, count 0 2006.229.15:08:22.53#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:08:22.53#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:08:22.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:08:22.53#ibcon#*before write, iclass 35, count 0 2006.229.15:08:22.53#ibcon#enter sib2, iclass 35, count 0 2006.229.15:08:22.53#ibcon#flushed, iclass 35, count 0 2006.229.15:08:22.53#ibcon#about to write, iclass 35, count 0 2006.229.15:08:22.53#ibcon#wrote, iclass 35, count 0 2006.229.15:08:22.53#ibcon#about to read 3, iclass 35, count 0 2006.229.15:08:22.57#ibcon#read 3, iclass 35, count 0 2006.229.15:08:22.57#ibcon#about to read 4, iclass 35, count 0 2006.229.15:08:22.57#ibcon#read 4, iclass 35, count 0 2006.229.15:08:22.57#ibcon#about to read 5, iclass 35, count 0 2006.229.15:08:22.57#ibcon#read 5, iclass 35, count 0 2006.229.15:08:22.57#ibcon#about to read 6, iclass 35, count 0 2006.229.15:08:22.57#ibcon#read 6, iclass 35, count 0 2006.229.15:08:22.57#ibcon#end of sib2, iclass 35, count 0 2006.229.15:08:22.57#ibcon#*after write, iclass 35, count 0 2006.229.15:08:22.57#ibcon#*before return 0, iclass 35, count 0 2006.229.15:08:22.57#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:08:22.57#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:08:22.57#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:08:22.57#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:08:22.57$vck44/va=8,6 2006.229.15:08:22.57#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.15:08:22.57#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.15:08:22.57#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:22.57#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:08:22.63#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:08:22.63#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:08:22.63#ibcon#enter wrdev, iclass 37, count 2 2006.229.15:08:22.63#ibcon#first serial, iclass 37, count 2 2006.229.15:08:22.63#ibcon#enter sib2, iclass 37, count 2 2006.229.15:08:22.63#ibcon#flushed, iclass 37, count 2 2006.229.15:08:22.63#ibcon#about to write, iclass 37, count 2 2006.229.15:08:22.63#ibcon#wrote, iclass 37, count 2 2006.229.15:08:22.63#ibcon#about to read 3, iclass 37, count 2 2006.229.15:08:22.65#ibcon#read 3, iclass 37, count 2 2006.229.15:08:22.65#ibcon#about to read 4, iclass 37, count 2 2006.229.15:08:22.65#ibcon#read 4, iclass 37, count 2 2006.229.15:08:22.65#ibcon#about to read 5, iclass 37, count 2 2006.229.15:08:22.65#ibcon#read 5, iclass 37, count 2 2006.229.15:08:22.65#ibcon#about to read 6, iclass 37, count 2 2006.229.15:08:22.65#ibcon#read 6, iclass 37, count 2 2006.229.15:08:22.65#ibcon#end of sib2, iclass 37, count 2 2006.229.15:08:22.65#ibcon#*mode == 0, iclass 37, count 2 2006.229.15:08:22.65#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.15:08:22.65#ibcon#[25=AT08-06\r\n] 2006.229.15:08:22.65#ibcon#*before write, iclass 37, count 2 2006.229.15:08:22.65#ibcon#enter sib2, iclass 37, count 2 2006.229.15:08:22.65#ibcon#flushed, iclass 37, count 2 2006.229.15:08:22.65#ibcon#about to write, iclass 37, count 2 2006.229.15:08:22.65#ibcon#wrote, iclass 37, count 2 2006.229.15:08:22.65#ibcon#about to read 3, iclass 37, count 2 2006.229.15:08:22.68#ibcon#read 3, iclass 37, count 2 2006.229.15:08:22.68#ibcon#about to read 4, iclass 37, count 2 2006.229.15:08:22.68#ibcon#read 4, iclass 37, count 2 2006.229.15:08:22.68#ibcon#about to read 5, iclass 37, count 2 2006.229.15:08:22.68#ibcon#read 5, iclass 37, count 2 2006.229.15:08:22.68#ibcon#about to read 6, iclass 37, count 2 2006.229.15:08:22.68#ibcon#read 6, iclass 37, count 2 2006.229.15:08:22.68#ibcon#end of sib2, iclass 37, count 2 2006.229.15:08:22.68#ibcon#*after write, iclass 37, count 2 2006.229.15:08:22.68#ibcon#*before return 0, iclass 37, count 2 2006.229.15:08:22.68#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:08:22.68#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:08:22.68#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.15:08:22.68#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:22.68#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:08:22.80#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:08:22.80#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:08:22.80#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:08:22.80#ibcon#first serial, iclass 37, count 0 2006.229.15:08:22.80#ibcon#enter sib2, iclass 37, count 0 2006.229.15:08:22.80#ibcon#flushed, iclass 37, count 0 2006.229.15:08:22.80#ibcon#about to write, iclass 37, count 0 2006.229.15:08:22.80#ibcon#wrote, iclass 37, count 0 2006.229.15:08:22.80#ibcon#about to read 3, iclass 37, count 0 2006.229.15:08:22.82#ibcon#read 3, iclass 37, count 0 2006.229.15:08:22.82#ibcon#about to read 4, iclass 37, count 0 2006.229.15:08:22.82#ibcon#read 4, iclass 37, count 0 2006.229.15:08:22.82#ibcon#about to read 5, iclass 37, count 0 2006.229.15:08:22.82#ibcon#read 5, iclass 37, count 0 2006.229.15:08:22.82#ibcon#about to read 6, iclass 37, count 0 2006.229.15:08:22.82#ibcon#read 6, iclass 37, count 0 2006.229.15:08:22.82#ibcon#end of sib2, iclass 37, count 0 2006.229.15:08:22.82#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:08:22.82#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:08:22.82#ibcon#[25=USB\r\n] 2006.229.15:08:22.82#ibcon#*before write, iclass 37, count 0 2006.229.15:08:22.82#ibcon#enter sib2, iclass 37, count 0 2006.229.15:08:22.82#ibcon#flushed, iclass 37, count 0 2006.229.15:08:22.82#ibcon#about to write, iclass 37, count 0 2006.229.15:08:22.82#ibcon#wrote, iclass 37, count 0 2006.229.15:08:22.82#ibcon#about to read 3, iclass 37, count 0 2006.229.15:08:22.85#ibcon#read 3, iclass 37, count 0 2006.229.15:08:22.85#ibcon#about to read 4, iclass 37, count 0 2006.229.15:08:22.85#ibcon#read 4, iclass 37, count 0 2006.229.15:08:22.85#ibcon#about to read 5, iclass 37, count 0 2006.229.15:08:22.85#ibcon#read 5, iclass 37, count 0 2006.229.15:08:22.85#ibcon#about to read 6, iclass 37, count 0 2006.229.15:08:22.85#ibcon#read 6, iclass 37, count 0 2006.229.15:08:22.85#ibcon#end of sib2, iclass 37, count 0 2006.229.15:08:22.85#ibcon#*after write, iclass 37, count 0 2006.229.15:08:22.85#ibcon#*before return 0, iclass 37, count 0 2006.229.15:08:22.85#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:08:22.85#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:08:22.85#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:08:22.85#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:08:22.85$vck44/vblo=1,629.99 2006.229.15:08:22.85#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:08:22.85#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:08:22.85#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:22.85#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:22.85#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:22.85#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:22.85#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:08:22.85#ibcon#first serial, iclass 39, count 0 2006.229.15:08:22.85#ibcon#enter sib2, iclass 39, count 0 2006.229.15:08:22.85#ibcon#flushed, iclass 39, count 0 2006.229.15:08:22.85#ibcon#about to write, iclass 39, count 0 2006.229.15:08:22.85#ibcon#wrote, iclass 39, count 0 2006.229.15:08:22.85#ibcon#about to read 3, iclass 39, count 0 2006.229.15:08:22.87#ibcon#read 3, iclass 39, count 0 2006.229.15:08:22.87#ibcon#about to read 4, iclass 39, count 0 2006.229.15:08:22.87#ibcon#read 4, iclass 39, count 0 2006.229.15:08:22.87#ibcon#about to read 5, iclass 39, count 0 2006.229.15:08:22.87#ibcon#read 5, iclass 39, count 0 2006.229.15:08:22.87#ibcon#about to read 6, iclass 39, count 0 2006.229.15:08:22.87#ibcon#read 6, iclass 39, count 0 2006.229.15:08:22.87#ibcon#end of sib2, iclass 39, count 0 2006.229.15:08:22.87#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:08:22.87#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:08:22.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:08:22.87#ibcon#*before write, iclass 39, count 0 2006.229.15:08:22.87#ibcon#enter sib2, iclass 39, count 0 2006.229.15:08:22.87#ibcon#flushed, iclass 39, count 0 2006.229.15:08:22.87#ibcon#about to write, iclass 39, count 0 2006.229.15:08:22.87#ibcon#wrote, iclass 39, count 0 2006.229.15:08:22.87#ibcon#about to read 3, iclass 39, count 0 2006.229.15:08:22.91#ibcon#read 3, iclass 39, count 0 2006.229.15:08:22.91#ibcon#about to read 4, iclass 39, count 0 2006.229.15:08:22.91#ibcon#read 4, iclass 39, count 0 2006.229.15:08:22.91#ibcon#about to read 5, iclass 39, count 0 2006.229.15:08:22.91#ibcon#read 5, iclass 39, count 0 2006.229.15:08:22.91#ibcon#about to read 6, iclass 39, count 0 2006.229.15:08:22.91#ibcon#read 6, iclass 39, count 0 2006.229.15:08:22.91#ibcon#end of sib2, iclass 39, count 0 2006.229.15:08:22.91#ibcon#*after write, iclass 39, count 0 2006.229.15:08:22.91#ibcon#*before return 0, iclass 39, count 0 2006.229.15:08:22.91#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:22.91#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:22.91#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:08:22.91#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:08:22.91$vck44/vb=1,4 2006.229.15:08:22.91#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.15:08:22.91#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.15:08:22.91#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:22.91#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:08:22.91#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:08:22.91#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:08:22.91#ibcon#enter wrdev, iclass 3, count 2 2006.229.15:08:22.91#ibcon#first serial, iclass 3, count 2 2006.229.15:08:22.91#ibcon#enter sib2, iclass 3, count 2 2006.229.15:08:22.91#ibcon#flushed, iclass 3, count 2 2006.229.15:08:22.91#ibcon#about to write, iclass 3, count 2 2006.229.15:08:22.91#ibcon#wrote, iclass 3, count 2 2006.229.15:08:22.91#ibcon#about to read 3, iclass 3, count 2 2006.229.15:08:22.93#ibcon#read 3, iclass 3, count 2 2006.229.15:08:22.93#ibcon#about to read 4, iclass 3, count 2 2006.229.15:08:22.93#ibcon#read 4, iclass 3, count 2 2006.229.15:08:22.93#ibcon#about to read 5, iclass 3, count 2 2006.229.15:08:22.93#ibcon#read 5, iclass 3, count 2 2006.229.15:08:22.93#ibcon#about to read 6, iclass 3, count 2 2006.229.15:08:22.93#ibcon#read 6, iclass 3, count 2 2006.229.15:08:22.93#ibcon#end of sib2, iclass 3, count 2 2006.229.15:08:22.93#ibcon#*mode == 0, iclass 3, count 2 2006.229.15:08:22.93#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.15:08:22.93#ibcon#[27=AT01-04\r\n] 2006.229.15:08:22.93#ibcon#*before write, iclass 3, count 2 2006.229.15:08:22.93#ibcon#enter sib2, iclass 3, count 2 2006.229.15:08:22.93#ibcon#flushed, iclass 3, count 2 2006.229.15:08:22.93#ibcon#about to write, iclass 3, count 2 2006.229.15:08:22.93#ibcon#wrote, iclass 3, count 2 2006.229.15:08:22.93#ibcon#about to read 3, iclass 3, count 2 2006.229.15:08:22.96#ibcon#read 3, iclass 3, count 2 2006.229.15:08:22.96#ibcon#about to read 4, iclass 3, count 2 2006.229.15:08:22.96#ibcon#read 4, iclass 3, count 2 2006.229.15:08:22.96#ibcon#about to read 5, iclass 3, count 2 2006.229.15:08:22.96#ibcon#read 5, iclass 3, count 2 2006.229.15:08:22.96#ibcon#about to read 6, iclass 3, count 2 2006.229.15:08:22.96#ibcon#read 6, iclass 3, count 2 2006.229.15:08:22.96#ibcon#end of sib2, iclass 3, count 2 2006.229.15:08:22.96#ibcon#*after write, iclass 3, count 2 2006.229.15:08:22.96#ibcon#*before return 0, iclass 3, count 2 2006.229.15:08:22.96#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:08:22.96#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:08:22.96#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.15:08:22.96#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:22.96#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:08:23.08#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:08:23.08#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:08:23.08#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:08:23.08#ibcon#first serial, iclass 3, count 0 2006.229.15:08:23.08#ibcon#enter sib2, iclass 3, count 0 2006.229.15:08:23.08#ibcon#flushed, iclass 3, count 0 2006.229.15:08:23.08#ibcon#about to write, iclass 3, count 0 2006.229.15:08:23.08#ibcon#wrote, iclass 3, count 0 2006.229.15:08:23.08#ibcon#about to read 3, iclass 3, count 0 2006.229.15:08:23.10#ibcon#read 3, iclass 3, count 0 2006.229.15:08:23.10#ibcon#about to read 4, iclass 3, count 0 2006.229.15:08:23.10#ibcon#read 4, iclass 3, count 0 2006.229.15:08:23.10#ibcon#about to read 5, iclass 3, count 0 2006.229.15:08:23.10#ibcon#read 5, iclass 3, count 0 2006.229.15:08:23.10#ibcon#about to read 6, iclass 3, count 0 2006.229.15:08:23.10#ibcon#read 6, iclass 3, count 0 2006.229.15:08:23.10#ibcon#end of sib2, iclass 3, count 0 2006.229.15:08:23.10#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:08:23.10#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:08:23.10#ibcon#[27=USB\r\n] 2006.229.15:08:23.10#ibcon#*before write, iclass 3, count 0 2006.229.15:08:23.10#ibcon#enter sib2, iclass 3, count 0 2006.229.15:08:23.10#ibcon#flushed, iclass 3, count 0 2006.229.15:08:23.10#ibcon#about to write, iclass 3, count 0 2006.229.15:08:23.10#ibcon#wrote, iclass 3, count 0 2006.229.15:08:23.10#ibcon#about to read 3, iclass 3, count 0 2006.229.15:08:23.13#ibcon#read 3, iclass 3, count 0 2006.229.15:08:23.13#ibcon#about to read 4, iclass 3, count 0 2006.229.15:08:23.13#ibcon#read 4, iclass 3, count 0 2006.229.15:08:23.13#ibcon#about to read 5, iclass 3, count 0 2006.229.15:08:23.13#ibcon#read 5, iclass 3, count 0 2006.229.15:08:23.13#ibcon#about to read 6, iclass 3, count 0 2006.229.15:08:23.13#ibcon#read 6, iclass 3, count 0 2006.229.15:08:23.13#ibcon#end of sib2, iclass 3, count 0 2006.229.15:08:23.13#ibcon#*after write, iclass 3, count 0 2006.229.15:08:23.13#ibcon#*before return 0, iclass 3, count 0 2006.229.15:08:23.13#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:08:23.13#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:08:23.13#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:08:23.13#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:08:23.13$vck44/vblo=2,634.99 2006.229.15:08:23.13#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.15:08:23.13#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.15:08:23.13#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:23.13#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:23.13#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:23.13#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:23.13#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:08:23.13#ibcon#first serial, iclass 5, count 0 2006.229.15:08:23.13#ibcon#enter sib2, iclass 5, count 0 2006.229.15:08:23.13#ibcon#flushed, iclass 5, count 0 2006.229.15:08:23.13#ibcon#about to write, iclass 5, count 0 2006.229.15:08:23.13#ibcon#wrote, iclass 5, count 0 2006.229.15:08:23.13#ibcon#about to read 3, iclass 5, count 0 2006.229.15:08:23.15#ibcon#read 3, iclass 5, count 0 2006.229.15:08:23.15#ibcon#about to read 4, iclass 5, count 0 2006.229.15:08:23.15#ibcon#read 4, iclass 5, count 0 2006.229.15:08:23.15#ibcon#about to read 5, iclass 5, count 0 2006.229.15:08:23.15#ibcon#read 5, iclass 5, count 0 2006.229.15:08:23.15#ibcon#about to read 6, iclass 5, count 0 2006.229.15:08:23.15#ibcon#read 6, iclass 5, count 0 2006.229.15:08:23.15#ibcon#end of sib2, iclass 5, count 0 2006.229.15:08:23.15#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:08:23.15#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:08:23.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:08:23.15#ibcon#*before write, iclass 5, count 0 2006.229.15:08:23.15#ibcon#enter sib2, iclass 5, count 0 2006.229.15:08:23.15#ibcon#flushed, iclass 5, count 0 2006.229.15:08:23.15#ibcon#about to write, iclass 5, count 0 2006.229.15:08:23.15#ibcon#wrote, iclass 5, count 0 2006.229.15:08:23.15#ibcon#about to read 3, iclass 5, count 0 2006.229.15:08:23.19#ibcon#read 3, iclass 5, count 0 2006.229.15:08:23.19#ibcon#about to read 4, iclass 5, count 0 2006.229.15:08:23.19#ibcon#read 4, iclass 5, count 0 2006.229.15:08:23.19#ibcon#about to read 5, iclass 5, count 0 2006.229.15:08:23.19#ibcon#read 5, iclass 5, count 0 2006.229.15:08:23.19#ibcon#about to read 6, iclass 5, count 0 2006.229.15:08:23.19#ibcon#read 6, iclass 5, count 0 2006.229.15:08:23.19#ibcon#end of sib2, iclass 5, count 0 2006.229.15:08:23.19#ibcon#*after write, iclass 5, count 0 2006.229.15:08:23.19#ibcon#*before return 0, iclass 5, count 0 2006.229.15:08:23.19#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:23.19#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:08:23.19#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:08:23.19#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:08:23.19$vck44/vb=2,4 2006.229.15:08:23.19#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.15:08:23.19#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.15:08:23.19#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:23.19#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:23.25#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:23.25#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:23.25#ibcon#enter wrdev, iclass 7, count 2 2006.229.15:08:23.25#ibcon#first serial, iclass 7, count 2 2006.229.15:08:23.25#ibcon#enter sib2, iclass 7, count 2 2006.229.15:08:23.25#ibcon#flushed, iclass 7, count 2 2006.229.15:08:23.25#ibcon#about to write, iclass 7, count 2 2006.229.15:08:23.25#ibcon#wrote, iclass 7, count 2 2006.229.15:08:23.25#ibcon#about to read 3, iclass 7, count 2 2006.229.15:08:23.27#ibcon#read 3, iclass 7, count 2 2006.229.15:08:23.27#ibcon#about to read 4, iclass 7, count 2 2006.229.15:08:23.27#ibcon#read 4, iclass 7, count 2 2006.229.15:08:23.27#ibcon#about to read 5, iclass 7, count 2 2006.229.15:08:23.27#ibcon#read 5, iclass 7, count 2 2006.229.15:08:23.27#ibcon#about to read 6, iclass 7, count 2 2006.229.15:08:23.27#ibcon#read 6, iclass 7, count 2 2006.229.15:08:23.27#ibcon#end of sib2, iclass 7, count 2 2006.229.15:08:23.27#ibcon#*mode == 0, iclass 7, count 2 2006.229.15:08:23.27#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.15:08:23.27#ibcon#[27=AT02-04\r\n] 2006.229.15:08:23.27#ibcon#*before write, iclass 7, count 2 2006.229.15:08:23.27#ibcon#enter sib2, iclass 7, count 2 2006.229.15:08:23.27#ibcon#flushed, iclass 7, count 2 2006.229.15:08:23.27#ibcon#about to write, iclass 7, count 2 2006.229.15:08:23.27#ibcon#wrote, iclass 7, count 2 2006.229.15:08:23.27#ibcon#about to read 3, iclass 7, count 2 2006.229.15:08:23.30#ibcon#read 3, iclass 7, count 2 2006.229.15:08:23.30#ibcon#about to read 4, iclass 7, count 2 2006.229.15:08:23.30#ibcon#read 4, iclass 7, count 2 2006.229.15:08:23.30#ibcon#about to read 5, iclass 7, count 2 2006.229.15:08:23.30#ibcon#read 5, iclass 7, count 2 2006.229.15:08:23.30#ibcon#about to read 6, iclass 7, count 2 2006.229.15:08:23.30#ibcon#read 6, iclass 7, count 2 2006.229.15:08:23.30#ibcon#end of sib2, iclass 7, count 2 2006.229.15:08:23.30#ibcon#*after write, iclass 7, count 2 2006.229.15:08:23.30#ibcon#*before return 0, iclass 7, count 2 2006.229.15:08:23.30#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:23.30#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:08:23.30#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.15:08:23.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:23.30#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:23.42#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:23.42#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:23.42#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:08:23.42#ibcon#first serial, iclass 7, count 0 2006.229.15:08:23.42#ibcon#enter sib2, iclass 7, count 0 2006.229.15:08:23.42#ibcon#flushed, iclass 7, count 0 2006.229.15:08:23.42#ibcon#about to write, iclass 7, count 0 2006.229.15:08:23.42#ibcon#wrote, iclass 7, count 0 2006.229.15:08:23.42#ibcon#about to read 3, iclass 7, count 0 2006.229.15:08:23.44#ibcon#read 3, iclass 7, count 0 2006.229.15:08:23.44#ibcon#about to read 4, iclass 7, count 0 2006.229.15:08:23.44#ibcon#read 4, iclass 7, count 0 2006.229.15:08:23.44#ibcon#about to read 5, iclass 7, count 0 2006.229.15:08:23.44#ibcon#read 5, iclass 7, count 0 2006.229.15:08:23.44#ibcon#about to read 6, iclass 7, count 0 2006.229.15:08:23.44#ibcon#read 6, iclass 7, count 0 2006.229.15:08:23.44#ibcon#end of sib2, iclass 7, count 0 2006.229.15:08:23.44#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:08:23.44#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:08:23.44#ibcon#[27=USB\r\n] 2006.229.15:08:23.44#ibcon#*before write, iclass 7, count 0 2006.229.15:08:23.44#ibcon#enter sib2, iclass 7, count 0 2006.229.15:08:23.44#ibcon#flushed, iclass 7, count 0 2006.229.15:08:23.44#ibcon#about to write, iclass 7, count 0 2006.229.15:08:23.44#ibcon#wrote, iclass 7, count 0 2006.229.15:08:23.44#ibcon#about to read 3, iclass 7, count 0 2006.229.15:08:23.47#ibcon#read 3, iclass 7, count 0 2006.229.15:08:23.47#ibcon#about to read 4, iclass 7, count 0 2006.229.15:08:23.47#ibcon#read 4, iclass 7, count 0 2006.229.15:08:23.47#ibcon#about to read 5, iclass 7, count 0 2006.229.15:08:23.47#ibcon#read 5, iclass 7, count 0 2006.229.15:08:23.47#ibcon#about to read 6, iclass 7, count 0 2006.229.15:08:23.47#ibcon#read 6, iclass 7, count 0 2006.229.15:08:23.47#ibcon#end of sib2, iclass 7, count 0 2006.229.15:08:23.47#ibcon#*after write, iclass 7, count 0 2006.229.15:08:23.47#ibcon#*before return 0, iclass 7, count 0 2006.229.15:08:23.47#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:23.47#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:08:23.47#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:08:23.47#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:08:23.47$vck44/vblo=3,649.99 2006.229.15:08:23.47#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.15:08:23.47#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.15:08:23.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:23.47#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:23.47#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:23.47#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:23.47#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:08:23.47#ibcon#first serial, iclass 11, count 0 2006.229.15:08:23.47#ibcon#enter sib2, iclass 11, count 0 2006.229.15:08:23.47#ibcon#flushed, iclass 11, count 0 2006.229.15:08:23.47#ibcon#about to write, iclass 11, count 0 2006.229.15:08:23.47#ibcon#wrote, iclass 11, count 0 2006.229.15:08:23.47#ibcon#about to read 3, iclass 11, count 0 2006.229.15:08:23.49#ibcon#read 3, iclass 11, count 0 2006.229.15:08:23.49#ibcon#about to read 4, iclass 11, count 0 2006.229.15:08:23.49#ibcon#read 4, iclass 11, count 0 2006.229.15:08:23.49#ibcon#about to read 5, iclass 11, count 0 2006.229.15:08:23.49#ibcon#read 5, iclass 11, count 0 2006.229.15:08:23.49#ibcon#about to read 6, iclass 11, count 0 2006.229.15:08:23.49#ibcon#read 6, iclass 11, count 0 2006.229.15:08:23.49#ibcon#end of sib2, iclass 11, count 0 2006.229.15:08:23.49#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:08:23.49#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:08:23.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:08:23.49#ibcon#*before write, iclass 11, count 0 2006.229.15:08:23.49#ibcon#enter sib2, iclass 11, count 0 2006.229.15:08:23.49#ibcon#flushed, iclass 11, count 0 2006.229.15:08:23.49#ibcon#about to write, iclass 11, count 0 2006.229.15:08:23.49#ibcon#wrote, iclass 11, count 0 2006.229.15:08:23.49#ibcon#about to read 3, iclass 11, count 0 2006.229.15:08:23.53#ibcon#read 3, iclass 11, count 0 2006.229.15:08:23.53#ibcon#about to read 4, iclass 11, count 0 2006.229.15:08:23.53#ibcon#read 4, iclass 11, count 0 2006.229.15:08:23.53#ibcon#about to read 5, iclass 11, count 0 2006.229.15:08:23.53#ibcon#read 5, iclass 11, count 0 2006.229.15:08:23.53#ibcon#about to read 6, iclass 11, count 0 2006.229.15:08:23.53#ibcon#read 6, iclass 11, count 0 2006.229.15:08:23.53#ibcon#end of sib2, iclass 11, count 0 2006.229.15:08:23.53#ibcon#*after write, iclass 11, count 0 2006.229.15:08:23.53#ibcon#*before return 0, iclass 11, count 0 2006.229.15:08:23.53#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:23.53#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:08:23.53#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:08:23.53#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:08:23.53$vck44/vb=3,4 2006.229.15:08:23.53#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.15:08:23.53#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.15:08:23.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:23.53#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:23.59#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:23.59#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:23.59#ibcon#enter wrdev, iclass 13, count 2 2006.229.15:08:23.59#ibcon#first serial, iclass 13, count 2 2006.229.15:08:23.59#ibcon#enter sib2, iclass 13, count 2 2006.229.15:08:23.59#ibcon#flushed, iclass 13, count 2 2006.229.15:08:23.59#ibcon#about to write, iclass 13, count 2 2006.229.15:08:23.59#ibcon#wrote, iclass 13, count 2 2006.229.15:08:23.59#ibcon#about to read 3, iclass 13, count 2 2006.229.15:08:23.61#ibcon#read 3, iclass 13, count 2 2006.229.15:08:23.61#ibcon#about to read 4, iclass 13, count 2 2006.229.15:08:23.61#ibcon#read 4, iclass 13, count 2 2006.229.15:08:23.61#ibcon#about to read 5, iclass 13, count 2 2006.229.15:08:23.61#ibcon#read 5, iclass 13, count 2 2006.229.15:08:23.61#ibcon#about to read 6, iclass 13, count 2 2006.229.15:08:23.61#ibcon#read 6, iclass 13, count 2 2006.229.15:08:23.61#ibcon#end of sib2, iclass 13, count 2 2006.229.15:08:23.61#ibcon#*mode == 0, iclass 13, count 2 2006.229.15:08:23.61#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.15:08:23.61#ibcon#[27=AT03-04\r\n] 2006.229.15:08:23.61#ibcon#*before write, iclass 13, count 2 2006.229.15:08:23.61#ibcon#enter sib2, iclass 13, count 2 2006.229.15:08:23.61#ibcon#flushed, iclass 13, count 2 2006.229.15:08:23.61#ibcon#about to write, iclass 13, count 2 2006.229.15:08:23.61#ibcon#wrote, iclass 13, count 2 2006.229.15:08:23.61#ibcon#about to read 3, iclass 13, count 2 2006.229.15:08:23.64#ibcon#read 3, iclass 13, count 2 2006.229.15:08:23.64#ibcon#about to read 4, iclass 13, count 2 2006.229.15:08:23.64#ibcon#read 4, iclass 13, count 2 2006.229.15:08:23.64#ibcon#about to read 5, iclass 13, count 2 2006.229.15:08:23.64#ibcon#read 5, iclass 13, count 2 2006.229.15:08:23.64#ibcon#about to read 6, iclass 13, count 2 2006.229.15:08:23.64#ibcon#read 6, iclass 13, count 2 2006.229.15:08:23.64#ibcon#end of sib2, iclass 13, count 2 2006.229.15:08:23.64#ibcon#*after write, iclass 13, count 2 2006.229.15:08:23.64#ibcon#*before return 0, iclass 13, count 2 2006.229.15:08:23.64#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:23.64#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:08:23.64#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.15:08:23.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:23.64#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:23.76#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:23.76#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:23.76#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:08:23.76#ibcon#first serial, iclass 13, count 0 2006.229.15:08:23.76#ibcon#enter sib2, iclass 13, count 0 2006.229.15:08:23.76#ibcon#flushed, iclass 13, count 0 2006.229.15:08:23.76#ibcon#about to write, iclass 13, count 0 2006.229.15:08:23.76#ibcon#wrote, iclass 13, count 0 2006.229.15:08:23.76#ibcon#about to read 3, iclass 13, count 0 2006.229.15:08:23.78#ibcon#read 3, iclass 13, count 0 2006.229.15:08:23.78#ibcon#about to read 4, iclass 13, count 0 2006.229.15:08:23.78#ibcon#read 4, iclass 13, count 0 2006.229.15:08:23.78#ibcon#about to read 5, iclass 13, count 0 2006.229.15:08:23.78#ibcon#read 5, iclass 13, count 0 2006.229.15:08:23.78#ibcon#about to read 6, iclass 13, count 0 2006.229.15:08:23.78#ibcon#read 6, iclass 13, count 0 2006.229.15:08:23.78#ibcon#end of sib2, iclass 13, count 0 2006.229.15:08:23.78#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:08:23.78#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:08:23.78#ibcon#[27=USB\r\n] 2006.229.15:08:23.78#ibcon#*before write, iclass 13, count 0 2006.229.15:08:23.78#ibcon#enter sib2, iclass 13, count 0 2006.229.15:08:23.78#ibcon#flushed, iclass 13, count 0 2006.229.15:08:23.78#ibcon#about to write, iclass 13, count 0 2006.229.15:08:23.78#ibcon#wrote, iclass 13, count 0 2006.229.15:08:23.78#ibcon#about to read 3, iclass 13, count 0 2006.229.15:08:23.81#ibcon#read 3, iclass 13, count 0 2006.229.15:08:23.81#ibcon#about to read 4, iclass 13, count 0 2006.229.15:08:23.81#ibcon#read 4, iclass 13, count 0 2006.229.15:08:23.81#ibcon#about to read 5, iclass 13, count 0 2006.229.15:08:23.81#ibcon#read 5, iclass 13, count 0 2006.229.15:08:23.81#ibcon#about to read 6, iclass 13, count 0 2006.229.15:08:23.81#ibcon#read 6, iclass 13, count 0 2006.229.15:08:23.81#ibcon#end of sib2, iclass 13, count 0 2006.229.15:08:23.81#ibcon#*after write, iclass 13, count 0 2006.229.15:08:23.81#ibcon#*before return 0, iclass 13, count 0 2006.229.15:08:23.81#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:23.81#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:08:23.81#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:08:23.81#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:08:23.81$vck44/vblo=4,679.99 2006.229.15:08:23.81#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:08:23.81#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:08:23.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:23.81#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:23.81#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:23.81#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:23.81#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:08:23.81#ibcon#first serial, iclass 15, count 0 2006.229.15:08:23.81#ibcon#enter sib2, iclass 15, count 0 2006.229.15:08:23.81#ibcon#flushed, iclass 15, count 0 2006.229.15:08:23.81#ibcon#about to write, iclass 15, count 0 2006.229.15:08:23.81#ibcon#wrote, iclass 15, count 0 2006.229.15:08:23.81#ibcon#about to read 3, iclass 15, count 0 2006.229.15:08:23.83#ibcon#read 3, iclass 15, count 0 2006.229.15:08:23.83#ibcon#about to read 4, iclass 15, count 0 2006.229.15:08:23.83#ibcon#read 4, iclass 15, count 0 2006.229.15:08:23.83#ibcon#about to read 5, iclass 15, count 0 2006.229.15:08:23.83#ibcon#read 5, iclass 15, count 0 2006.229.15:08:23.83#ibcon#about to read 6, iclass 15, count 0 2006.229.15:08:23.83#ibcon#read 6, iclass 15, count 0 2006.229.15:08:23.83#ibcon#end of sib2, iclass 15, count 0 2006.229.15:08:23.83#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:08:23.83#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:08:23.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:08:23.83#ibcon#*before write, iclass 15, count 0 2006.229.15:08:23.83#ibcon#enter sib2, iclass 15, count 0 2006.229.15:08:23.83#ibcon#flushed, iclass 15, count 0 2006.229.15:08:23.83#ibcon#about to write, iclass 15, count 0 2006.229.15:08:23.83#ibcon#wrote, iclass 15, count 0 2006.229.15:08:23.83#ibcon#about to read 3, iclass 15, count 0 2006.229.15:08:23.87#ibcon#read 3, iclass 15, count 0 2006.229.15:08:23.87#ibcon#about to read 4, iclass 15, count 0 2006.229.15:08:23.87#ibcon#read 4, iclass 15, count 0 2006.229.15:08:23.87#ibcon#about to read 5, iclass 15, count 0 2006.229.15:08:23.87#ibcon#read 5, iclass 15, count 0 2006.229.15:08:23.87#ibcon#about to read 6, iclass 15, count 0 2006.229.15:08:23.87#ibcon#read 6, iclass 15, count 0 2006.229.15:08:23.87#ibcon#end of sib2, iclass 15, count 0 2006.229.15:08:23.87#ibcon#*after write, iclass 15, count 0 2006.229.15:08:23.87#ibcon#*before return 0, iclass 15, count 0 2006.229.15:08:23.87#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:23.87#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:08:23.87#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:08:23.87#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:08:23.87$vck44/vb=4,4 2006.229.15:08:23.87#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.15:08:23.87#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.15:08:23.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:23.87#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:23.93#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:23.93#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:23.93#ibcon#enter wrdev, iclass 17, count 2 2006.229.15:08:23.93#ibcon#first serial, iclass 17, count 2 2006.229.15:08:23.93#ibcon#enter sib2, iclass 17, count 2 2006.229.15:08:23.93#ibcon#flushed, iclass 17, count 2 2006.229.15:08:23.93#ibcon#about to write, iclass 17, count 2 2006.229.15:08:23.93#ibcon#wrote, iclass 17, count 2 2006.229.15:08:23.93#ibcon#about to read 3, iclass 17, count 2 2006.229.15:08:23.95#ibcon#read 3, iclass 17, count 2 2006.229.15:08:23.95#ibcon#about to read 4, iclass 17, count 2 2006.229.15:08:23.95#ibcon#read 4, iclass 17, count 2 2006.229.15:08:23.95#ibcon#about to read 5, iclass 17, count 2 2006.229.15:08:23.95#ibcon#read 5, iclass 17, count 2 2006.229.15:08:23.95#ibcon#about to read 6, iclass 17, count 2 2006.229.15:08:23.95#ibcon#read 6, iclass 17, count 2 2006.229.15:08:23.95#ibcon#end of sib2, iclass 17, count 2 2006.229.15:08:23.95#ibcon#*mode == 0, iclass 17, count 2 2006.229.15:08:23.95#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.15:08:23.95#ibcon#[27=AT04-04\r\n] 2006.229.15:08:23.95#ibcon#*before write, iclass 17, count 2 2006.229.15:08:23.95#ibcon#enter sib2, iclass 17, count 2 2006.229.15:08:23.95#ibcon#flushed, iclass 17, count 2 2006.229.15:08:23.95#ibcon#about to write, iclass 17, count 2 2006.229.15:08:23.95#ibcon#wrote, iclass 17, count 2 2006.229.15:08:23.95#ibcon#about to read 3, iclass 17, count 2 2006.229.15:08:23.98#ibcon#read 3, iclass 17, count 2 2006.229.15:08:23.98#ibcon#about to read 4, iclass 17, count 2 2006.229.15:08:23.98#ibcon#read 4, iclass 17, count 2 2006.229.15:08:23.98#ibcon#about to read 5, iclass 17, count 2 2006.229.15:08:23.98#ibcon#read 5, iclass 17, count 2 2006.229.15:08:23.98#ibcon#about to read 6, iclass 17, count 2 2006.229.15:08:23.98#ibcon#read 6, iclass 17, count 2 2006.229.15:08:23.98#ibcon#end of sib2, iclass 17, count 2 2006.229.15:08:23.98#ibcon#*after write, iclass 17, count 2 2006.229.15:08:23.98#ibcon#*before return 0, iclass 17, count 2 2006.229.15:08:23.98#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:23.98#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:08:23.98#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.15:08:23.98#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:23.98#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:24.10#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:24.10#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:24.10#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:08:24.10#ibcon#first serial, iclass 17, count 0 2006.229.15:08:24.10#ibcon#enter sib2, iclass 17, count 0 2006.229.15:08:24.10#ibcon#flushed, iclass 17, count 0 2006.229.15:08:24.10#ibcon#about to write, iclass 17, count 0 2006.229.15:08:24.10#ibcon#wrote, iclass 17, count 0 2006.229.15:08:24.10#ibcon#about to read 3, iclass 17, count 0 2006.229.15:08:24.12#ibcon#read 3, iclass 17, count 0 2006.229.15:08:24.12#ibcon#about to read 4, iclass 17, count 0 2006.229.15:08:24.12#ibcon#read 4, iclass 17, count 0 2006.229.15:08:24.12#ibcon#about to read 5, iclass 17, count 0 2006.229.15:08:24.12#ibcon#read 5, iclass 17, count 0 2006.229.15:08:24.12#ibcon#about to read 6, iclass 17, count 0 2006.229.15:08:24.12#ibcon#read 6, iclass 17, count 0 2006.229.15:08:24.12#ibcon#end of sib2, iclass 17, count 0 2006.229.15:08:24.12#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:08:24.12#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:08:24.12#ibcon#[27=USB\r\n] 2006.229.15:08:24.12#ibcon#*before write, iclass 17, count 0 2006.229.15:08:24.12#ibcon#enter sib2, iclass 17, count 0 2006.229.15:08:24.12#ibcon#flushed, iclass 17, count 0 2006.229.15:08:24.12#ibcon#about to write, iclass 17, count 0 2006.229.15:08:24.12#ibcon#wrote, iclass 17, count 0 2006.229.15:08:24.12#ibcon#about to read 3, iclass 17, count 0 2006.229.15:08:24.15#ibcon#read 3, iclass 17, count 0 2006.229.15:08:24.15#ibcon#about to read 4, iclass 17, count 0 2006.229.15:08:24.15#ibcon#read 4, iclass 17, count 0 2006.229.15:08:24.15#ibcon#about to read 5, iclass 17, count 0 2006.229.15:08:24.15#ibcon#read 5, iclass 17, count 0 2006.229.15:08:24.15#ibcon#about to read 6, iclass 17, count 0 2006.229.15:08:24.15#ibcon#read 6, iclass 17, count 0 2006.229.15:08:24.15#ibcon#end of sib2, iclass 17, count 0 2006.229.15:08:24.15#ibcon#*after write, iclass 17, count 0 2006.229.15:08:24.15#ibcon#*before return 0, iclass 17, count 0 2006.229.15:08:24.15#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:24.15#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:08:24.15#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:08:24.15#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:08:24.15$vck44/vblo=5,709.99 2006.229.15:08:24.15#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.15:08:24.15#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.15:08:24.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:24.15#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:24.15#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:24.15#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:24.15#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:08:24.15#ibcon#first serial, iclass 19, count 0 2006.229.15:08:24.15#ibcon#enter sib2, iclass 19, count 0 2006.229.15:08:24.15#ibcon#flushed, iclass 19, count 0 2006.229.15:08:24.15#ibcon#about to write, iclass 19, count 0 2006.229.15:08:24.15#ibcon#wrote, iclass 19, count 0 2006.229.15:08:24.15#ibcon#about to read 3, iclass 19, count 0 2006.229.15:08:24.17#ibcon#read 3, iclass 19, count 0 2006.229.15:08:24.17#ibcon#about to read 4, iclass 19, count 0 2006.229.15:08:24.17#ibcon#read 4, iclass 19, count 0 2006.229.15:08:24.17#ibcon#about to read 5, iclass 19, count 0 2006.229.15:08:24.17#ibcon#read 5, iclass 19, count 0 2006.229.15:08:24.17#ibcon#about to read 6, iclass 19, count 0 2006.229.15:08:24.17#ibcon#read 6, iclass 19, count 0 2006.229.15:08:24.17#ibcon#end of sib2, iclass 19, count 0 2006.229.15:08:24.17#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:08:24.17#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:08:24.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:08:24.17#ibcon#*before write, iclass 19, count 0 2006.229.15:08:24.17#ibcon#enter sib2, iclass 19, count 0 2006.229.15:08:24.17#ibcon#flushed, iclass 19, count 0 2006.229.15:08:24.17#ibcon#about to write, iclass 19, count 0 2006.229.15:08:24.17#ibcon#wrote, iclass 19, count 0 2006.229.15:08:24.17#ibcon#about to read 3, iclass 19, count 0 2006.229.15:08:24.21#ibcon#read 3, iclass 19, count 0 2006.229.15:08:24.21#ibcon#about to read 4, iclass 19, count 0 2006.229.15:08:24.21#ibcon#read 4, iclass 19, count 0 2006.229.15:08:24.21#ibcon#about to read 5, iclass 19, count 0 2006.229.15:08:24.21#ibcon#read 5, iclass 19, count 0 2006.229.15:08:24.21#ibcon#about to read 6, iclass 19, count 0 2006.229.15:08:24.21#ibcon#read 6, iclass 19, count 0 2006.229.15:08:24.21#ibcon#end of sib2, iclass 19, count 0 2006.229.15:08:24.21#ibcon#*after write, iclass 19, count 0 2006.229.15:08:24.21#ibcon#*before return 0, iclass 19, count 0 2006.229.15:08:24.21#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:24.21#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:08:24.21#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:08:24.21#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:08:24.21$vck44/vb=5,4 2006.229.15:08:24.21#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.15:08:24.21#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.15:08:24.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:24.21#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:24.27#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:24.27#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:24.27#ibcon#enter wrdev, iclass 21, count 2 2006.229.15:08:24.27#ibcon#first serial, iclass 21, count 2 2006.229.15:08:24.27#ibcon#enter sib2, iclass 21, count 2 2006.229.15:08:24.27#ibcon#flushed, iclass 21, count 2 2006.229.15:08:24.27#ibcon#about to write, iclass 21, count 2 2006.229.15:08:24.27#ibcon#wrote, iclass 21, count 2 2006.229.15:08:24.27#ibcon#about to read 3, iclass 21, count 2 2006.229.15:08:24.29#ibcon#read 3, iclass 21, count 2 2006.229.15:08:24.29#ibcon#about to read 4, iclass 21, count 2 2006.229.15:08:24.29#ibcon#read 4, iclass 21, count 2 2006.229.15:08:24.29#ibcon#about to read 5, iclass 21, count 2 2006.229.15:08:24.29#ibcon#read 5, iclass 21, count 2 2006.229.15:08:24.29#ibcon#about to read 6, iclass 21, count 2 2006.229.15:08:24.29#ibcon#read 6, iclass 21, count 2 2006.229.15:08:24.29#ibcon#end of sib2, iclass 21, count 2 2006.229.15:08:24.29#ibcon#*mode == 0, iclass 21, count 2 2006.229.15:08:24.29#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.15:08:24.29#ibcon#[27=AT05-04\r\n] 2006.229.15:08:24.29#ibcon#*before write, iclass 21, count 2 2006.229.15:08:24.29#ibcon#enter sib2, iclass 21, count 2 2006.229.15:08:24.29#ibcon#flushed, iclass 21, count 2 2006.229.15:08:24.29#ibcon#about to write, iclass 21, count 2 2006.229.15:08:24.29#ibcon#wrote, iclass 21, count 2 2006.229.15:08:24.29#ibcon#about to read 3, iclass 21, count 2 2006.229.15:08:24.32#ibcon#read 3, iclass 21, count 2 2006.229.15:08:24.32#ibcon#about to read 4, iclass 21, count 2 2006.229.15:08:24.32#ibcon#read 4, iclass 21, count 2 2006.229.15:08:24.32#ibcon#about to read 5, iclass 21, count 2 2006.229.15:08:24.32#ibcon#read 5, iclass 21, count 2 2006.229.15:08:24.32#ibcon#about to read 6, iclass 21, count 2 2006.229.15:08:24.32#ibcon#read 6, iclass 21, count 2 2006.229.15:08:24.32#ibcon#end of sib2, iclass 21, count 2 2006.229.15:08:24.32#ibcon#*after write, iclass 21, count 2 2006.229.15:08:24.32#ibcon#*before return 0, iclass 21, count 2 2006.229.15:08:24.32#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:24.32#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:08:24.32#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.15:08:24.32#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:24.32#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:24.44#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:24.44#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:24.44#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:08:24.44#ibcon#first serial, iclass 21, count 0 2006.229.15:08:24.44#ibcon#enter sib2, iclass 21, count 0 2006.229.15:08:24.44#ibcon#flushed, iclass 21, count 0 2006.229.15:08:24.44#ibcon#about to write, iclass 21, count 0 2006.229.15:08:24.44#ibcon#wrote, iclass 21, count 0 2006.229.15:08:24.44#ibcon#about to read 3, iclass 21, count 0 2006.229.15:08:24.46#ibcon#read 3, iclass 21, count 0 2006.229.15:08:24.46#ibcon#about to read 4, iclass 21, count 0 2006.229.15:08:24.46#ibcon#read 4, iclass 21, count 0 2006.229.15:08:24.46#ibcon#about to read 5, iclass 21, count 0 2006.229.15:08:24.46#ibcon#read 5, iclass 21, count 0 2006.229.15:08:24.46#ibcon#about to read 6, iclass 21, count 0 2006.229.15:08:24.46#ibcon#read 6, iclass 21, count 0 2006.229.15:08:24.46#ibcon#end of sib2, iclass 21, count 0 2006.229.15:08:24.46#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:08:24.46#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:08:24.46#ibcon#[27=USB\r\n] 2006.229.15:08:24.46#ibcon#*before write, iclass 21, count 0 2006.229.15:08:24.46#ibcon#enter sib2, iclass 21, count 0 2006.229.15:08:24.46#ibcon#flushed, iclass 21, count 0 2006.229.15:08:24.46#ibcon#about to write, iclass 21, count 0 2006.229.15:08:24.46#ibcon#wrote, iclass 21, count 0 2006.229.15:08:24.46#ibcon#about to read 3, iclass 21, count 0 2006.229.15:08:24.49#ibcon#read 3, iclass 21, count 0 2006.229.15:08:24.49#ibcon#about to read 4, iclass 21, count 0 2006.229.15:08:24.49#ibcon#read 4, iclass 21, count 0 2006.229.15:08:24.49#ibcon#about to read 5, iclass 21, count 0 2006.229.15:08:24.49#ibcon#read 5, iclass 21, count 0 2006.229.15:08:24.49#ibcon#about to read 6, iclass 21, count 0 2006.229.15:08:24.49#ibcon#read 6, iclass 21, count 0 2006.229.15:08:24.49#ibcon#end of sib2, iclass 21, count 0 2006.229.15:08:24.49#ibcon#*after write, iclass 21, count 0 2006.229.15:08:24.49#ibcon#*before return 0, iclass 21, count 0 2006.229.15:08:24.49#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:24.49#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:08:24.49#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:08:24.49#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:08:24.49$vck44/vblo=6,719.99 2006.229.15:08:24.49#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.15:08:24.49#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.15:08:24.49#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:24.49#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:24.49#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:24.49#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:24.49#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:08:24.49#ibcon#first serial, iclass 23, count 0 2006.229.15:08:24.49#ibcon#enter sib2, iclass 23, count 0 2006.229.15:08:24.49#ibcon#flushed, iclass 23, count 0 2006.229.15:08:24.49#ibcon#about to write, iclass 23, count 0 2006.229.15:08:24.49#ibcon#wrote, iclass 23, count 0 2006.229.15:08:24.49#ibcon#about to read 3, iclass 23, count 0 2006.229.15:08:24.51#ibcon#read 3, iclass 23, count 0 2006.229.15:08:24.51#ibcon#about to read 4, iclass 23, count 0 2006.229.15:08:24.51#ibcon#read 4, iclass 23, count 0 2006.229.15:08:24.51#ibcon#about to read 5, iclass 23, count 0 2006.229.15:08:24.51#ibcon#read 5, iclass 23, count 0 2006.229.15:08:24.51#ibcon#about to read 6, iclass 23, count 0 2006.229.15:08:24.51#ibcon#read 6, iclass 23, count 0 2006.229.15:08:24.51#ibcon#end of sib2, iclass 23, count 0 2006.229.15:08:24.51#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:08:24.51#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:08:24.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:08:24.51#ibcon#*before write, iclass 23, count 0 2006.229.15:08:24.51#ibcon#enter sib2, iclass 23, count 0 2006.229.15:08:24.51#ibcon#flushed, iclass 23, count 0 2006.229.15:08:24.51#ibcon#about to write, iclass 23, count 0 2006.229.15:08:24.51#ibcon#wrote, iclass 23, count 0 2006.229.15:08:24.51#ibcon#about to read 3, iclass 23, count 0 2006.229.15:08:24.55#ibcon#read 3, iclass 23, count 0 2006.229.15:08:24.55#ibcon#about to read 4, iclass 23, count 0 2006.229.15:08:24.55#ibcon#read 4, iclass 23, count 0 2006.229.15:08:24.55#ibcon#about to read 5, iclass 23, count 0 2006.229.15:08:24.55#ibcon#read 5, iclass 23, count 0 2006.229.15:08:24.55#ibcon#about to read 6, iclass 23, count 0 2006.229.15:08:24.55#ibcon#read 6, iclass 23, count 0 2006.229.15:08:24.55#ibcon#end of sib2, iclass 23, count 0 2006.229.15:08:24.55#ibcon#*after write, iclass 23, count 0 2006.229.15:08:24.55#ibcon#*before return 0, iclass 23, count 0 2006.229.15:08:24.55#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:24.55#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:08:24.55#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:08:24.55#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:08:24.55$vck44/vb=6,4 2006.229.15:08:24.55#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.15:08:24.55#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.15:08:24.55#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:24.55#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:24.61#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:24.61#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:24.61#ibcon#enter wrdev, iclass 25, count 2 2006.229.15:08:24.61#ibcon#first serial, iclass 25, count 2 2006.229.15:08:24.61#ibcon#enter sib2, iclass 25, count 2 2006.229.15:08:24.61#ibcon#flushed, iclass 25, count 2 2006.229.15:08:24.61#ibcon#about to write, iclass 25, count 2 2006.229.15:08:24.61#ibcon#wrote, iclass 25, count 2 2006.229.15:08:24.61#ibcon#about to read 3, iclass 25, count 2 2006.229.15:08:24.63#ibcon#read 3, iclass 25, count 2 2006.229.15:08:24.63#ibcon#about to read 4, iclass 25, count 2 2006.229.15:08:24.63#ibcon#read 4, iclass 25, count 2 2006.229.15:08:24.63#ibcon#about to read 5, iclass 25, count 2 2006.229.15:08:24.63#ibcon#read 5, iclass 25, count 2 2006.229.15:08:24.63#ibcon#about to read 6, iclass 25, count 2 2006.229.15:08:24.63#ibcon#read 6, iclass 25, count 2 2006.229.15:08:24.63#ibcon#end of sib2, iclass 25, count 2 2006.229.15:08:24.63#ibcon#*mode == 0, iclass 25, count 2 2006.229.15:08:24.63#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.15:08:24.63#ibcon#[27=AT06-04\r\n] 2006.229.15:08:24.63#ibcon#*before write, iclass 25, count 2 2006.229.15:08:24.63#ibcon#enter sib2, iclass 25, count 2 2006.229.15:08:24.63#ibcon#flushed, iclass 25, count 2 2006.229.15:08:24.63#ibcon#about to write, iclass 25, count 2 2006.229.15:08:24.63#ibcon#wrote, iclass 25, count 2 2006.229.15:08:24.63#ibcon#about to read 3, iclass 25, count 2 2006.229.15:08:24.66#ibcon#read 3, iclass 25, count 2 2006.229.15:08:24.66#ibcon#about to read 4, iclass 25, count 2 2006.229.15:08:24.66#ibcon#read 4, iclass 25, count 2 2006.229.15:08:24.66#ibcon#about to read 5, iclass 25, count 2 2006.229.15:08:24.66#ibcon#read 5, iclass 25, count 2 2006.229.15:08:24.66#ibcon#about to read 6, iclass 25, count 2 2006.229.15:08:24.66#ibcon#read 6, iclass 25, count 2 2006.229.15:08:24.66#ibcon#end of sib2, iclass 25, count 2 2006.229.15:08:24.66#ibcon#*after write, iclass 25, count 2 2006.229.15:08:24.66#ibcon#*before return 0, iclass 25, count 2 2006.229.15:08:24.66#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:24.66#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:08:24.66#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.15:08:24.66#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:24.66#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:24.78#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:24.78#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:24.78#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:08:24.78#ibcon#first serial, iclass 25, count 0 2006.229.15:08:24.78#ibcon#enter sib2, iclass 25, count 0 2006.229.15:08:24.78#ibcon#flushed, iclass 25, count 0 2006.229.15:08:24.78#ibcon#about to write, iclass 25, count 0 2006.229.15:08:24.78#ibcon#wrote, iclass 25, count 0 2006.229.15:08:24.78#ibcon#about to read 3, iclass 25, count 0 2006.229.15:08:24.80#ibcon#read 3, iclass 25, count 0 2006.229.15:08:24.80#ibcon#about to read 4, iclass 25, count 0 2006.229.15:08:24.80#ibcon#read 4, iclass 25, count 0 2006.229.15:08:24.80#ibcon#about to read 5, iclass 25, count 0 2006.229.15:08:24.80#ibcon#read 5, iclass 25, count 0 2006.229.15:08:24.80#ibcon#about to read 6, iclass 25, count 0 2006.229.15:08:24.80#ibcon#read 6, iclass 25, count 0 2006.229.15:08:24.80#ibcon#end of sib2, iclass 25, count 0 2006.229.15:08:24.80#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:08:24.80#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:08:24.80#ibcon#[27=USB\r\n] 2006.229.15:08:24.80#ibcon#*before write, iclass 25, count 0 2006.229.15:08:24.80#ibcon#enter sib2, iclass 25, count 0 2006.229.15:08:24.80#ibcon#flushed, iclass 25, count 0 2006.229.15:08:24.80#ibcon#about to write, iclass 25, count 0 2006.229.15:08:24.80#ibcon#wrote, iclass 25, count 0 2006.229.15:08:24.80#ibcon#about to read 3, iclass 25, count 0 2006.229.15:08:24.83#ibcon#read 3, iclass 25, count 0 2006.229.15:08:24.83#ibcon#about to read 4, iclass 25, count 0 2006.229.15:08:24.83#ibcon#read 4, iclass 25, count 0 2006.229.15:08:24.83#ibcon#about to read 5, iclass 25, count 0 2006.229.15:08:24.83#ibcon#read 5, iclass 25, count 0 2006.229.15:08:24.83#ibcon#about to read 6, iclass 25, count 0 2006.229.15:08:24.83#ibcon#read 6, iclass 25, count 0 2006.229.15:08:24.83#ibcon#end of sib2, iclass 25, count 0 2006.229.15:08:24.83#ibcon#*after write, iclass 25, count 0 2006.229.15:08:24.83#ibcon#*before return 0, iclass 25, count 0 2006.229.15:08:24.83#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:24.83#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:08:24.83#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:08:24.83#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:08:24.83$vck44/vblo=7,734.99 2006.229.15:08:24.83#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.15:08:24.83#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.15:08:24.83#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:24.83#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:24.83#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:24.83#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:24.83#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:08:24.83#ibcon#first serial, iclass 27, count 0 2006.229.15:08:24.83#ibcon#enter sib2, iclass 27, count 0 2006.229.15:08:24.83#ibcon#flushed, iclass 27, count 0 2006.229.15:08:24.83#ibcon#about to write, iclass 27, count 0 2006.229.15:08:24.83#ibcon#wrote, iclass 27, count 0 2006.229.15:08:24.83#ibcon#about to read 3, iclass 27, count 0 2006.229.15:08:24.85#ibcon#read 3, iclass 27, count 0 2006.229.15:08:24.85#ibcon#about to read 4, iclass 27, count 0 2006.229.15:08:24.85#ibcon#read 4, iclass 27, count 0 2006.229.15:08:24.85#ibcon#about to read 5, iclass 27, count 0 2006.229.15:08:24.85#ibcon#read 5, iclass 27, count 0 2006.229.15:08:24.85#ibcon#about to read 6, iclass 27, count 0 2006.229.15:08:24.85#ibcon#read 6, iclass 27, count 0 2006.229.15:08:24.85#ibcon#end of sib2, iclass 27, count 0 2006.229.15:08:24.85#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:08:24.85#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:08:24.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:08:24.85#ibcon#*before write, iclass 27, count 0 2006.229.15:08:24.85#ibcon#enter sib2, iclass 27, count 0 2006.229.15:08:24.85#ibcon#flushed, iclass 27, count 0 2006.229.15:08:24.85#ibcon#about to write, iclass 27, count 0 2006.229.15:08:24.85#ibcon#wrote, iclass 27, count 0 2006.229.15:08:24.85#ibcon#about to read 3, iclass 27, count 0 2006.229.15:08:24.89#ibcon#read 3, iclass 27, count 0 2006.229.15:08:24.89#ibcon#about to read 4, iclass 27, count 0 2006.229.15:08:24.89#ibcon#read 4, iclass 27, count 0 2006.229.15:08:24.89#ibcon#about to read 5, iclass 27, count 0 2006.229.15:08:24.89#ibcon#read 5, iclass 27, count 0 2006.229.15:08:24.89#ibcon#about to read 6, iclass 27, count 0 2006.229.15:08:24.89#ibcon#read 6, iclass 27, count 0 2006.229.15:08:24.89#ibcon#end of sib2, iclass 27, count 0 2006.229.15:08:24.89#ibcon#*after write, iclass 27, count 0 2006.229.15:08:24.89#ibcon#*before return 0, iclass 27, count 0 2006.229.15:08:24.89#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:24.89#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:08:24.89#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:08:24.89#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:08:24.89$vck44/vb=7,4 2006.229.15:08:24.89#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.15:08:24.89#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.15:08:24.89#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:24.89#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:24.95#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:24.95#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:24.95#ibcon#enter wrdev, iclass 29, count 2 2006.229.15:08:24.95#ibcon#first serial, iclass 29, count 2 2006.229.15:08:24.95#ibcon#enter sib2, iclass 29, count 2 2006.229.15:08:24.95#ibcon#flushed, iclass 29, count 2 2006.229.15:08:24.95#ibcon#about to write, iclass 29, count 2 2006.229.15:08:24.95#ibcon#wrote, iclass 29, count 2 2006.229.15:08:24.95#ibcon#about to read 3, iclass 29, count 2 2006.229.15:08:24.97#ibcon#read 3, iclass 29, count 2 2006.229.15:08:24.97#ibcon#about to read 4, iclass 29, count 2 2006.229.15:08:24.97#ibcon#read 4, iclass 29, count 2 2006.229.15:08:24.97#ibcon#about to read 5, iclass 29, count 2 2006.229.15:08:24.97#ibcon#read 5, iclass 29, count 2 2006.229.15:08:24.97#ibcon#about to read 6, iclass 29, count 2 2006.229.15:08:24.97#ibcon#read 6, iclass 29, count 2 2006.229.15:08:24.97#ibcon#end of sib2, iclass 29, count 2 2006.229.15:08:24.97#ibcon#*mode == 0, iclass 29, count 2 2006.229.15:08:24.97#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.15:08:24.97#ibcon#[27=AT07-04\r\n] 2006.229.15:08:24.97#ibcon#*before write, iclass 29, count 2 2006.229.15:08:24.97#ibcon#enter sib2, iclass 29, count 2 2006.229.15:08:24.97#ibcon#flushed, iclass 29, count 2 2006.229.15:08:24.97#ibcon#about to write, iclass 29, count 2 2006.229.15:08:24.97#ibcon#wrote, iclass 29, count 2 2006.229.15:08:24.97#ibcon#about to read 3, iclass 29, count 2 2006.229.15:08:25.00#ibcon#read 3, iclass 29, count 2 2006.229.15:08:25.00#ibcon#about to read 4, iclass 29, count 2 2006.229.15:08:25.00#ibcon#read 4, iclass 29, count 2 2006.229.15:08:25.00#ibcon#about to read 5, iclass 29, count 2 2006.229.15:08:25.00#ibcon#read 5, iclass 29, count 2 2006.229.15:08:25.00#ibcon#about to read 6, iclass 29, count 2 2006.229.15:08:25.00#ibcon#read 6, iclass 29, count 2 2006.229.15:08:25.00#ibcon#end of sib2, iclass 29, count 2 2006.229.15:08:25.00#ibcon#*after write, iclass 29, count 2 2006.229.15:08:25.00#ibcon#*before return 0, iclass 29, count 2 2006.229.15:08:25.00#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:25.00#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:08:25.00#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.15:08:25.00#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:25.00#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:25.12#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:25.12#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:25.12#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:08:25.12#ibcon#first serial, iclass 29, count 0 2006.229.15:08:25.12#ibcon#enter sib2, iclass 29, count 0 2006.229.15:08:25.12#ibcon#flushed, iclass 29, count 0 2006.229.15:08:25.12#ibcon#about to write, iclass 29, count 0 2006.229.15:08:25.12#ibcon#wrote, iclass 29, count 0 2006.229.15:08:25.12#ibcon#about to read 3, iclass 29, count 0 2006.229.15:08:25.14#ibcon#read 3, iclass 29, count 0 2006.229.15:08:25.14#ibcon#about to read 4, iclass 29, count 0 2006.229.15:08:25.14#ibcon#read 4, iclass 29, count 0 2006.229.15:08:25.14#ibcon#about to read 5, iclass 29, count 0 2006.229.15:08:25.14#ibcon#read 5, iclass 29, count 0 2006.229.15:08:25.14#ibcon#about to read 6, iclass 29, count 0 2006.229.15:08:25.14#ibcon#read 6, iclass 29, count 0 2006.229.15:08:25.14#ibcon#end of sib2, iclass 29, count 0 2006.229.15:08:25.14#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:08:25.14#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:08:25.14#ibcon#[27=USB\r\n] 2006.229.15:08:25.14#ibcon#*before write, iclass 29, count 0 2006.229.15:08:25.14#ibcon#enter sib2, iclass 29, count 0 2006.229.15:08:25.14#ibcon#flushed, iclass 29, count 0 2006.229.15:08:25.14#ibcon#about to write, iclass 29, count 0 2006.229.15:08:25.14#ibcon#wrote, iclass 29, count 0 2006.229.15:08:25.14#ibcon#about to read 3, iclass 29, count 0 2006.229.15:08:25.17#ibcon#read 3, iclass 29, count 0 2006.229.15:08:25.17#ibcon#about to read 4, iclass 29, count 0 2006.229.15:08:25.17#ibcon#read 4, iclass 29, count 0 2006.229.15:08:25.17#ibcon#about to read 5, iclass 29, count 0 2006.229.15:08:25.17#ibcon#read 5, iclass 29, count 0 2006.229.15:08:25.17#ibcon#about to read 6, iclass 29, count 0 2006.229.15:08:25.17#ibcon#read 6, iclass 29, count 0 2006.229.15:08:25.17#ibcon#end of sib2, iclass 29, count 0 2006.229.15:08:25.17#ibcon#*after write, iclass 29, count 0 2006.229.15:08:25.17#ibcon#*before return 0, iclass 29, count 0 2006.229.15:08:25.17#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:25.17#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:08:25.17#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:08:25.17#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:08:25.17$vck44/vblo=8,744.99 2006.229.15:08:25.17#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.15:08:25.17#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.15:08:25.17#ibcon#ireg 17 cls_cnt 0 2006.229.15:08:25.17#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:25.17#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:25.17#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:25.17#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:08:25.17#ibcon#first serial, iclass 31, count 0 2006.229.15:08:25.17#ibcon#enter sib2, iclass 31, count 0 2006.229.15:08:25.17#ibcon#flushed, iclass 31, count 0 2006.229.15:08:25.17#ibcon#about to write, iclass 31, count 0 2006.229.15:08:25.17#ibcon#wrote, iclass 31, count 0 2006.229.15:08:25.17#ibcon#about to read 3, iclass 31, count 0 2006.229.15:08:25.19#ibcon#read 3, iclass 31, count 0 2006.229.15:08:25.19#ibcon#about to read 4, iclass 31, count 0 2006.229.15:08:25.19#ibcon#read 4, iclass 31, count 0 2006.229.15:08:25.19#ibcon#about to read 5, iclass 31, count 0 2006.229.15:08:25.19#ibcon#read 5, iclass 31, count 0 2006.229.15:08:25.19#ibcon#about to read 6, iclass 31, count 0 2006.229.15:08:25.19#ibcon#read 6, iclass 31, count 0 2006.229.15:08:25.19#ibcon#end of sib2, iclass 31, count 0 2006.229.15:08:25.19#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:08:25.19#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:08:25.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:08:25.19#ibcon#*before write, iclass 31, count 0 2006.229.15:08:25.19#ibcon#enter sib2, iclass 31, count 0 2006.229.15:08:25.19#ibcon#flushed, iclass 31, count 0 2006.229.15:08:25.19#ibcon#about to write, iclass 31, count 0 2006.229.15:08:25.19#ibcon#wrote, iclass 31, count 0 2006.229.15:08:25.19#ibcon#about to read 3, iclass 31, count 0 2006.229.15:08:25.23#ibcon#read 3, iclass 31, count 0 2006.229.15:08:25.23#ibcon#about to read 4, iclass 31, count 0 2006.229.15:08:25.23#ibcon#read 4, iclass 31, count 0 2006.229.15:08:25.23#ibcon#about to read 5, iclass 31, count 0 2006.229.15:08:25.23#ibcon#read 5, iclass 31, count 0 2006.229.15:08:25.23#ibcon#about to read 6, iclass 31, count 0 2006.229.15:08:25.23#ibcon#read 6, iclass 31, count 0 2006.229.15:08:25.23#ibcon#end of sib2, iclass 31, count 0 2006.229.15:08:25.23#ibcon#*after write, iclass 31, count 0 2006.229.15:08:25.23#ibcon#*before return 0, iclass 31, count 0 2006.229.15:08:25.23#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:25.23#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:08:25.23#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:08:25.23#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:08:25.23$vck44/vb=8,4 2006.229.15:08:25.23#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.15:08:25.23#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.15:08:25.23#ibcon#ireg 11 cls_cnt 2 2006.229.15:08:25.23#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:25.29#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:25.29#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:25.29#ibcon#enter wrdev, iclass 33, count 2 2006.229.15:08:25.29#ibcon#first serial, iclass 33, count 2 2006.229.15:08:25.29#ibcon#enter sib2, iclass 33, count 2 2006.229.15:08:25.29#ibcon#flushed, iclass 33, count 2 2006.229.15:08:25.29#ibcon#about to write, iclass 33, count 2 2006.229.15:08:25.29#ibcon#wrote, iclass 33, count 2 2006.229.15:08:25.29#ibcon#about to read 3, iclass 33, count 2 2006.229.15:08:25.31#ibcon#read 3, iclass 33, count 2 2006.229.15:08:25.31#ibcon#about to read 4, iclass 33, count 2 2006.229.15:08:25.31#ibcon#read 4, iclass 33, count 2 2006.229.15:08:25.31#ibcon#about to read 5, iclass 33, count 2 2006.229.15:08:25.31#ibcon#read 5, iclass 33, count 2 2006.229.15:08:25.31#ibcon#about to read 6, iclass 33, count 2 2006.229.15:08:25.31#ibcon#read 6, iclass 33, count 2 2006.229.15:08:25.31#ibcon#end of sib2, iclass 33, count 2 2006.229.15:08:25.31#ibcon#*mode == 0, iclass 33, count 2 2006.229.15:08:25.31#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.15:08:25.31#ibcon#[27=AT08-04\r\n] 2006.229.15:08:25.31#ibcon#*before write, iclass 33, count 2 2006.229.15:08:25.31#ibcon#enter sib2, iclass 33, count 2 2006.229.15:08:25.31#ibcon#flushed, iclass 33, count 2 2006.229.15:08:25.31#ibcon#about to write, iclass 33, count 2 2006.229.15:08:25.31#ibcon#wrote, iclass 33, count 2 2006.229.15:08:25.31#ibcon#about to read 3, iclass 33, count 2 2006.229.15:08:25.32#abcon#<5=/07 1.3 2.3 27.411001002.0\r\n> 2006.229.15:08:25.34#abcon#{5=INTERFACE CLEAR} 2006.229.15:08:25.34#ibcon#read 3, iclass 33, count 2 2006.229.15:08:25.34#ibcon#about to read 4, iclass 33, count 2 2006.229.15:08:25.34#ibcon#read 4, iclass 33, count 2 2006.229.15:08:25.34#ibcon#about to read 5, iclass 33, count 2 2006.229.15:08:25.34#ibcon#read 5, iclass 33, count 2 2006.229.15:08:25.34#ibcon#about to read 6, iclass 33, count 2 2006.229.15:08:25.34#ibcon#read 6, iclass 33, count 2 2006.229.15:08:25.34#ibcon#end of sib2, iclass 33, count 2 2006.229.15:08:25.34#ibcon#*after write, iclass 33, count 2 2006.229.15:08:25.34#ibcon#*before return 0, iclass 33, count 2 2006.229.15:08:25.34#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:25.34#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:08:25.34#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.15:08:25.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:08:25.34#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:25.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:08:25.46#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:25.46#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:25.46#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:08:25.46#ibcon#first serial, iclass 33, count 0 2006.229.15:08:25.46#ibcon#enter sib2, iclass 33, count 0 2006.229.15:08:25.46#ibcon#flushed, iclass 33, count 0 2006.229.15:08:25.46#ibcon#about to write, iclass 33, count 0 2006.229.15:08:25.46#ibcon#wrote, iclass 33, count 0 2006.229.15:08:25.46#ibcon#about to read 3, iclass 33, count 0 2006.229.15:08:25.48#ibcon#read 3, iclass 33, count 0 2006.229.15:08:25.48#ibcon#about to read 4, iclass 33, count 0 2006.229.15:08:25.48#ibcon#read 4, iclass 33, count 0 2006.229.15:08:25.48#ibcon#about to read 5, iclass 33, count 0 2006.229.15:08:25.48#ibcon#read 5, iclass 33, count 0 2006.229.15:08:25.48#ibcon#about to read 6, iclass 33, count 0 2006.229.15:08:25.48#ibcon#read 6, iclass 33, count 0 2006.229.15:08:25.48#ibcon#end of sib2, iclass 33, count 0 2006.229.15:08:25.48#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:08:25.48#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:08:25.48#ibcon#[27=USB\r\n] 2006.229.15:08:25.48#ibcon#*before write, iclass 33, count 0 2006.229.15:08:25.48#ibcon#enter sib2, iclass 33, count 0 2006.229.15:08:25.48#ibcon#flushed, iclass 33, count 0 2006.229.15:08:25.48#ibcon#about to write, iclass 33, count 0 2006.229.15:08:25.48#ibcon#wrote, iclass 33, count 0 2006.229.15:08:25.48#ibcon#about to read 3, iclass 33, count 0 2006.229.15:08:25.51#ibcon#read 3, iclass 33, count 0 2006.229.15:08:25.51#ibcon#about to read 4, iclass 33, count 0 2006.229.15:08:25.51#ibcon#read 4, iclass 33, count 0 2006.229.15:08:25.51#ibcon#about to read 5, iclass 33, count 0 2006.229.15:08:25.51#ibcon#read 5, iclass 33, count 0 2006.229.15:08:25.51#ibcon#about to read 6, iclass 33, count 0 2006.229.15:08:25.51#ibcon#read 6, iclass 33, count 0 2006.229.15:08:25.51#ibcon#end of sib2, iclass 33, count 0 2006.229.15:08:25.51#ibcon#*after write, iclass 33, count 0 2006.229.15:08:25.51#ibcon#*before return 0, iclass 33, count 0 2006.229.15:08:25.51#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:25.51#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:08:25.51#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:08:25.51#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:08:25.51$vck44/vabw=wide 2006.229.15:08:25.51#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:08:25.51#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:08:25.51#ibcon#ireg 8 cls_cnt 0 2006.229.15:08:25.51#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:25.51#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:25.51#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:25.51#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:08:25.51#ibcon#first serial, iclass 39, count 0 2006.229.15:08:25.51#ibcon#enter sib2, iclass 39, count 0 2006.229.15:08:25.51#ibcon#flushed, iclass 39, count 0 2006.229.15:08:25.51#ibcon#about to write, iclass 39, count 0 2006.229.15:08:25.51#ibcon#wrote, iclass 39, count 0 2006.229.15:08:25.51#ibcon#about to read 3, iclass 39, count 0 2006.229.15:08:25.53#ibcon#read 3, iclass 39, count 0 2006.229.15:08:25.53#ibcon#about to read 4, iclass 39, count 0 2006.229.15:08:25.53#ibcon#read 4, iclass 39, count 0 2006.229.15:08:25.53#ibcon#about to read 5, iclass 39, count 0 2006.229.15:08:25.53#ibcon#read 5, iclass 39, count 0 2006.229.15:08:25.53#ibcon#about to read 6, iclass 39, count 0 2006.229.15:08:25.53#ibcon#read 6, iclass 39, count 0 2006.229.15:08:25.53#ibcon#end of sib2, iclass 39, count 0 2006.229.15:08:25.53#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:08:25.53#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:08:25.53#ibcon#[25=BW32\r\n] 2006.229.15:08:25.53#ibcon#*before write, iclass 39, count 0 2006.229.15:08:25.53#ibcon#enter sib2, iclass 39, count 0 2006.229.15:08:25.53#ibcon#flushed, iclass 39, count 0 2006.229.15:08:25.53#ibcon#about to write, iclass 39, count 0 2006.229.15:08:25.53#ibcon#wrote, iclass 39, count 0 2006.229.15:08:25.53#ibcon#about to read 3, iclass 39, count 0 2006.229.15:08:25.56#ibcon#read 3, iclass 39, count 0 2006.229.15:08:25.56#ibcon#about to read 4, iclass 39, count 0 2006.229.15:08:25.56#ibcon#read 4, iclass 39, count 0 2006.229.15:08:25.56#ibcon#about to read 5, iclass 39, count 0 2006.229.15:08:25.56#ibcon#read 5, iclass 39, count 0 2006.229.15:08:25.56#ibcon#about to read 6, iclass 39, count 0 2006.229.15:08:25.56#ibcon#read 6, iclass 39, count 0 2006.229.15:08:25.56#ibcon#end of sib2, iclass 39, count 0 2006.229.15:08:25.56#ibcon#*after write, iclass 39, count 0 2006.229.15:08:25.56#ibcon#*before return 0, iclass 39, count 0 2006.229.15:08:25.56#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:25.56#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:08:25.56#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:08:25.56#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:08:25.56$vck44/vbbw=wide 2006.229.15:08:25.56#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:08:25.56#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:08:25.56#ibcon#ireg 8 cls_cnt 0 2006.229.15:08:25.56#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:08:25.63#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:08:25.63#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:08:25.63#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:08:25.63#ibcon#first serial, iclass 3, count 0 2006.229.15:08:25.63#ibcon#enter sib2, iclass 3, count 0 2006.229.15:08:25.63#ibcon#flushed, iclass 3, count 0 2006.229.15:08:25.63#ibcon#about to write, iclass 3, count 0 2006.229.15:08:25.63#ibcon#wrote, iclass 3, count 0 2006.229.15:08:25.63#ibcon#about to read 3, iclass 3, count 0 2006.229.15:08:25.65#ibcon#read 3, iclass 3, count 0 2006.229.15:08:25.65#ibcon#about to read 4, iclass 3, count 0 2006.229.15:08:25.65#ibcon#read 4, iclass 3, count 0 2006.229.15:08:25.65#ibcon#about to read 5, iclass 3, count 0 2006.229.15:08:25.65#ibcon#read 5, iclass 3, count 0 2006.229.15:08:25.65#ibcon#about to read 6, iclass 3, count 0 2006.229.15:08:25.65#ibcon#read 6, iclass 3, count 0 2006.229.15:08:25.65#ibcon#end of sib2, iclass 3, count 0 2006.229.15:08:25.65#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:08:25.65#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:08:25.65#ibcon#[27=BW32\r\n] 2006.229.15:08:25.65#ibcon#*before write, iclass 3, count 0 2006.229.15:08:25.65#ibcon#enter sib2, iclass 3, count 0 2006.229.15:08:25.65#ibcon#flushed, iclass 3, count 0 2006.229.15:08:25.65#ibcon#about to write, iclass 3, count 0 2006.229.15:08:25.65#ibcon#wrote, iclass 3, count 0 2006.229.15:08:25.65#ibcon#about to read 3, iclass 3, count 0 2006.229.15:08:25.68#ibcon#read 3, iclass 3, count 0 2006.229.15:08:25.68#ibcon#about to read 4, iclass 3, count 0 2006.229.15:08:25.68#ibcon#read 4, iclass 3, count 0 2006.229.15:08:25.68#ibcon#about to read 5, iclass 3, count 0 2006.229.15:08:25.68#ibcon#read 5, iclass 3, count 0 2006.229.15:08:25.68#ibcon#about to read 6, iclass 3, count 0 2006.229.15:08:25.68#ibcon#read 6, iclass 3, count 0 2006.229.15:08:25.68#ibcon#end of sib2, iclass 3, count 0 2006.229.15:08:25.68#ibcon#*after write, iclass 3, count 0 2006.229.15:08:25.68#ibcon#*before return 0, iclass 3, count 0 2006.229.15:08:25.68#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:08:25.68#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:08:25.68#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:08:25.68#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:08:25.68$setupk4/ifdk4 2006.229.15:08:25.68$ifdk4/lo= 2006.229.15:08:25.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:08:25.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:08:25.68$ifdk4/patch= 2006.229.15:08:25.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:08:25.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:08:25.68$setupk4/!*+20s 2006.229.15:08:35.49#abcon#<5=/07 1.3 2.3 27.411001002.0\r\n> 2006.229.15:08:35.51#abcon#{5=INTERFACE CLEAR} 2006.229.15:08:35.57#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:08:40.19$setupk4/"tpicd 2006.229.15:08:40.19$setupk4/echo=off 2006.229.15:08:40.19$setupk4/xlog=off 2006.229.15:08:40.19:!2006.229.15:10:06 2006.229.15:08:43.13#trakl#Source acquired 2006.229.15:08:45.13#flagr#flagr/antenna,acquired 2006.229.15:10:06.00:preob 2006.229.15:10:07.13/onsource/TRACKING 2006.229.15:10:07.13:!2006.229.15:10:16 2006.229.15:10:16.00:"tape 2006.229.15:10:16.00:"st=record 2006.229.15:10:16.00:data_valid=on 2006.229.15:10:16.00:midob 2006.229.15:10:16.14/onsource/TRACKING 2006.229.15:10:16.14/wx/27.41,1002.0,100 2006.229.15:10:16.34/cable/+6.4144E-03 2006.229.15:10:17.43/va/01,08,usb,yes,29,31 2006.229.15:10:17.43/va/02,07,usb,yes,31,32 2006.229.15:10:17.43/va/03,06,usb,yes,39,42 2006.229.15:10:17.43/va/04,07,usb,yes,32,34 2006.229.15:10:17.43/va/05,04,usb,yes,29,29 2006.229.15:10:17.43/va/06,04,usb,yes,33,32 2006.229.15:10:17.43/va/07,05,usb,yes,29,29 2006.229.15:10:17.43/va/08,06,usb,yes,21,26 2006.229.15:10:17.66/valo/01,524.99,yes,locked 2006.229.15:10:17.66/valo/02,534.99,yes,locked 2006.229.15:10:17.66/valo/03,564.99,yes,locked 2006.229.15:10:17.66/valo/04,624.99,yes,locked 2006.229.15:10:17.66/valo/05,734.99,yes,locked 2006.229.15:10:17.66/valo/06,814.99,yes,locked 2006.229.15:10:17.66/valo/07,864.99,yes,locked 2006.229.15:10:17.66/valo/08,884.99,yes,locked 2006.229.15:10:18.75/vb/01,04,usb,yes,30,28 2006.229.15:10:18.75/vb/02,04,usb,yes,33,33 2006.229.15:10:18.75/vb/03,04,usb,yes,30,33 2006.229.15:10:18.75/vb/04,04,usb,yes,34,33 2006.229.15:10:18.75/vb/05,04,usb,yes,26,29 2006.229.15:10:18.75/vb/06,04,usb,yes,31,27 2006.229.15:10:18.75/vb/07,04,usb,yes,31,31 2006.229.15:10:18.75/vb/08,04,usb,yes,28,32 2006.229.15:10:18.98/vblo/01,629.99,yes,locked 2006.229.15:10:18.98/vblo/02,634.99,yes,locked 2006.229.15:10:18.98/vblo/03,649.99,yes,locked 2006.229.15:10:18.98/vblo/04,679.99,yes,locked 2006.229.15:10:18.98/vblo/05,709.99,yes,locked 2006.229.15:10:18.98/vblo/06,719.99,yes,locked 2006.229.15:10:18.98/vblo/07,734.99,yes,locked 2006.229.15:10:18.98/vblo/08,744.99,yes,locked 2006.229.15:10:19.13/vabw/8 2006.229.15:10:19.28/vbbw/8 2006.229.15:10:19.37/xfe/off,on,12.2 2006.229.15:10:19.76/ifatt/23,28,28,28 2006.229.15:10:20.08/fmout-gps/S +4.55E-07 2006.229.15:10:20.12:!2006.229.15:11:36 2006.229.15:11:36.00:data_valid=off 2006.229.15:11:36.00:"et 2006.229.15:11:36.00:!+3s 2006.229.15:11:39.01:"tape 2006.229.15:11:39.01:postob 2006.229.15:11:39.11/cable/+6.4137E-03 2006.229.15:11:39.11/wx/27.41,1001.9,100 2006.229.15:11:40.08/fmout-gps/S +4.55E-07 2006.229.15:11:40.08:scan_name=229-1514,jd0608,110 2006.229.15:11:40.08:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.15:11:41.14#flagr#flagr/antenna,new-source 2006.229.15:11:41.14:checkk5 2006.229.15:11:41.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:11:41.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:11:42.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:11:42.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:11:43.12/chk_obsdata//k5ts1/T2291510??a.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.15:11:43.51/chk_obsdata//k5ts2/T2291510??b.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.15:11:43.91/chk_obsdata//k5ts3/T2291510??c.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.15:11:44.31/chk_obsdata//k5ts4/T2291510??d.dat file size is correct (nominal:320MB, actual:320MB). 2006.229.15:11:45.03/k5log//k5ts1_log_newline 2006.229.15:11:45.73/k5log//k5ts2_log_newline 2006.229.15:11:46.45/k5log//k5ts3_log_newline 2006.229.15:11:47.18/k5log//k5ts4_log_newline 2006.229.15:11:47.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:11:47.20:setupk4=1 2006.229.15:11:47.20$setupk4/echo=on 2006.229.15:11:47.20$setupk4/pcalon 2006.229.15:11:47.20$pcalon/"no phase cal control is implemented here 2006.229.15:11:47.20$setupk4/"tpicd=stop 2006.229.15:11:47.20$setupk4/"rec=synch_on 2006.229.15:11:47.20$setupk4/"rec_mode=128 2006.229.15:11:47.20$setupk4/!* 2006.229.15:11:47.20$setupk4/recpk4 2006.229.15:11:47.21$recpk4/recpatch= 2006.229.15:11:47.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:11:47.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:11:47.21$setupk4/vck44 2006.229.15:11:47.21$vck44/valo=1,524.99 2006.229.15:11:47.21#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:11:47.21#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:11:47.21#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:47.21#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:47.21#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:47.21#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:47.21#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:11:47.21#ibcon#first serial, iclass 14, count 0 2006.229.15:11:47.21#ibcon#enter sib2, iclass 14, count 0 2006.229.15:11:47.21#ibcon#flushed, iclass 14, count 0 2006.229.15:11:47.21#ibcon#about to write, iclass 14, count 0 2006.229.15:11:47.21#ibcon#wrote, iclass 14, count 0 2006.229.15:11:47.21#ibcon#about to read 3, iclass 14, count 0 2006.229.15:11:47.23#ibcon#read 3, iclass 14, count 0 2006.229.15:11:47.23#ibcon#about to read 4, iclass 14, count 0 2006.229.15:11:47.23#ibcon#read 4, iclass 14, count 0 2006.229.15:11:47.23#ibcon#about to read 5, iclass 14, count 0 2006.229.15:11:47.23#ibcon#read 5, iclass 14, count 0 2006.229.15:11:47.23#ibcon#about to read 6, iclass 14, count 0 2006.229.15:11:47.23#ibcon#read 6, iclass 14, count 0 2006.229.15:11:47.23#ibcon#end of sib2, iclass 14, count 0 2006.229.15:11:47.23#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:11:47.23#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:11:47.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:11:47.23#ibcon#*before write, iclass 14, count 0 2006.229.15:11:47.23#ibcon#enter sib2, iclass 14, count 0 2006.229.15:11:47.23#ibcon#flushed, iclass 14, count 0 2006.229.15:11:47.23#ibcon#about to write, iclass 14, count 0 2006.229.15:11:47.23#ibcon#wrote, iclass 14, count 0 2006.229.15:11:47.23#ibcon#about to read 3, iclass 14, count 0 2006.229.15:11:47.28#ibcon#read 3, iclass 14, count 0 2006.229.15:11:47.28#ibcon#about to read 4, iclass 14, count 0 2006.229.15:11:47.28#ibcon#read 4, iclass 14, count 0 2006.229.15:11:47.28#ibcon#about to read 5, iclass 14, count 0 2006.229.15:11:47.28#ibcon#read 5, iclass 14, count 0 2006.229.15:11:47.28#ibcon#about to read 6, iclass 14, count 0 2006.229.15:11:47.28#ibcon#read 6, iclass 14, count 0 2006.229.15:11:47.28#ibcon#end of sib2, iclass 14, count 0 2006.229.15:11:47.28#ibcon#*after write, iclass 14, count 0 2006.229.15:11:47.28#ibcon#*before return 0, iclass 14, count 0 2006.229.15:11:47.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:47.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:47.28#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:11:47.28#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:11:47.28$vck44/va=1,8 2006.229.15:11:47.28#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:11:47.28#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:11:47.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:47.28#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:47.28#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:47.28#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:47.28#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:11:47.28#ibcon#first serial, iclass 16, count 2 2006.229.15:11:47.28#ibcon#enter sib2, iclass 16, count 2 2006.229.15:11:47.28#ibcon#flushed, iclass 16, count 2 2006.229.15:11:47.28#ibcon#about to write, iclass 16, count 2 2006.229.15:11:47.28#ibcon#wrote, iclass 16, count 2 2006.229.15:11:47.28#ibcon#about to read 3, iclass 16, count 2 2006.229.15:11:47.30#ibcon#read 3, iclass 16, count 2 2006.229.15:11:47.30#ibcon#about to read 4, iclass 16, count 2 2006.229.15:11:47.30#ibcon#read 4, iclass 16, count 2 2006.229.15:11:47.30#ibcon#about to read 5, iclass 16, count 2 2006.229.15:11:47.30#ibcon#read 5, iclass 16, count 2 2006.229.15:11:47.30#ibcon#about to read 6, iclass 16, count 2 2006.229.15:11:47.30#ibcon#read 6, iclass 16, count 2 2006.229.15:11:47.30#ibcon#end of sib2, iclass 16, count 2 2006.229.15:11:47.30#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:11:47.30#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:11:47.30#ibcon#[25=AT01-08\r\n] 2006.229.15:11:47.30#ibcon#*before write, iclass 16, count 2 2006.229.15:11:47.30#ibcon#enter sib2, iclass 16, count 2 2006.229.15:11:47.30#ibcon#flushed, iclass 16, count 2 2006.229.15:11:47.30#ibcon#about to write, iclass 16, count 2 2006.229.15:11:47.30#ibcon#wrote, iclass 16, count 2 2006.229.15:11:47.30#ibcon#about to read 3, iclass 16, count 2 2006.229.15:11:47.33#ibcon#read 3, iclass 16, count 2 2006.229.15:11:47.33#ibcon#about to read 4, iclass 16, count 2 2006.229.15:11:47.33#ibcon#read 4, iclass 16, count 2 2006.229.15:11:47.33#ibcon#about to read 5, iclass 16, count 2 2006.229.15:11:47.33#ibcon#read 5, iclass 16, count 2 2006.229.15:11:47.33#ibcon#about to read 6, iclass 16, count 2 2006.229.15:11:47.33#ibcon#read 6, iclass 16, count 2 2006.229.15:11:47.33#ibcon#end of sib2, iclass 16, count 2 2006.229.15:11:47.33#ibcon#*after write, iclass 16, count 2 2006.229.15:11:47.33#ibcon#*before return 0, iclass 16, count 2 2006.229.15:11:47.33#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:47.33#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:47.33#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:11:47.33#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:47.33#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:47.45#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:47.45#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:47.45#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:11:47.45#ibcon#first serial, iclass 16, count 0 2006.229.15:11:47.45#ibcon#enter sib2, iclass 16, count 0 2006.229.15:11:47.45#ibcon#flushed, iclass 16, count 0 2006.229.15:11:47.45#ibcon#about to write, iclass 16, count 0 2006.229.15:11:47.45#ibcon#wrote, iclass 16, count 0 2006.229.15:11:47.45#ibcon#about to read 3, iclass 16, count 0 2006.229.15:11:47.47#ibcon#read 3, iclass 16, count 0 2006.229.15:11:47.47#ibcon#about to read 4, iclass 16, count 0 2006.229.15:11:47.47#ibcon#read 4, iclass 16, count 0 2006.229.15:11:47.47#ibcon#about to read 5, iclass 16, count 0 2006.229.15:11:47.47#ibcon#read 5, iclass 16, count 0 2006.229.15:11:47.47#ibcon#about to read 6, iclass 16, count 0 2006.229.15:11:47.47#ibcon#read 6, iclass 16, count 0 2006.229.15:11:47.47#ibcon#end of sib2, iclass 16, count 0 2006.229.15:11:47.47#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:11:47.47#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:11:47.47#ibcon#[25=USB\r\n] 2006.229.15:11:47.47#ibcon#*before write, iclass 16, count 0 2006.229.15:11:47.47#ibcon#enter sib2, iclass 16, count 0 2006.229.15:11:47.47#ibcon#flushed, iclass 16, count 0 2006.229.15:11:47.47#ibcon#about to write, iclass 16, count 0 2006.229.15:11:47.47#ibcon#wrote, iclass 16, count 0 2006.229.15:11:47.47#ibcon#about to read 3, iclass 16, count 0 2006.229.15:11:47.50#ibcon#read 3, iclass 16, count 0 2006.229.15:11:47.50#ibcon#about to read 4, iclass 16, count 0 2006.229.15:11:47.50#ibcon#read 4, iclass 16, count 0 2006.229.15:11:47.50#ibcon#about to read 5, iclass 16, count 0 2006.229.15:11:47.50#ibcon#read 5, iclass 16, count 0 2006.229.15:11:47.50#ibcon#about to read 6, iclass 16, count 0 2006.229.15:11:47.50#ibcon#read 6, iclass 16, count 0 2006.229.15:11:47.50#ibcon#end of sib2, iclass 16, count 0 2006.229.15:11:47.50#ibcon#*after write, iclass 16, count 0 2006.229.15:11:47.50#ibcon#*before return 0, iclass 16, count 0 2006.229.15:11:47.50#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:47.50#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:47.50#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:11:47.50#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:11:47.50$vck44/valo=2,534.99 2006.229.15:11:47.50#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:11:47.50#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:11:47.50#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:47.50#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:47.50#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:47.50#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:47.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:11:47.50#ibcon#first serial, iclass 18, count 0 2006.229.15:11:47.50#ibcon#enter sib2, iclass 18, count 0 2006.229.15:11:47.50#ibcon#flushed, iclass 18, count 0 2006.229.15:11:47.50#ibcon#about to write, iclass 18, count 0 2006.229.15:11:47.50#ibcon#wrote, iclass 18, count 0 2006.229.15:11:47.50#ibcon#about to read 3, iclass 18, count 0 2006.229.15:11:47.52#ibcon#read 3, iclass 18, count 0 2006.229.15:11:47.52#ibcon#about to read 4, iclass 18, count 0 2006.229.15:11:47.52#ibcon#read 4, iclass 18, count 0 2006.229.15:11:47.52#ibcon#about to read 5, iclass 18, count 0 2006.229.15:11:47.52#ibcon#read 5, iclass 18, count 0 2006.229.15:11:47.52#ibcon#about to read 6, iclass 18, count 0 2006.229.15:11:47.52#ibcon#read 6, iclass 18, count 0 2006.229.15:11:47.52#ibcon#end of sib2, iclass 18, count 0 2006.229.15:11:47.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:11:47.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:11:47.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:11:47.52#ibcon#*before write, iclass 18, count 0 2006.229.15:11:47.52#ibcon#enter sib2, iclass 18, count 0 2006.229.15:11:47.52#ibcon#flushed, iclass 18, count 0 2006.229.15:11:47.52#ibcon#about to write, iclass 18, count 0 2006.229.15:11:47.52#ibcon#wrote, iclass 18, count 0 2006.229.15:11:47.52#ibcon#about to read 3, iclass 18, count 0 2006.229.15:11:47.56#ibcon#read 3, iclass 18, count 0 2006.229.15:11:47.56#ibcon#about to read 4, iclass 18, count 0 2006.229.15:11:47.56#ibcon#read 4, iclass 18, count 0 2006.229.15:11:47.56#ibcon#about to read 5, iclass 18, count 0 2006.229.15:11:47.56#ibcon#read 5, iclass 18, count 0 2006.229.15:11:47.56#ibcon#about to read 6, iclass 18, count 0 2006.229.15:11:47.56#ibcon#read 6, iclass 18, count 0 2006.229.15:11:47.56#ibcon#end of sib2, iclass 18, count 0 2006.229.15:11:47.56#ibcon#*after write, iclass 18, count 0 2006.229.15:11:47.56#ibcon#*before return 0, iclass 18, count 0 2006.229.15:11:47.56#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:47.56#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:47.56#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:11:47.56#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:11:47.56$vck44/va=2,7 2006.229.15:11:47.56#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:11:47.56#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:11:47.56#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:47.56#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:47.62#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:47.62#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:47.62#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:11:47.62#ibcon#first serial, iclass 20, count 2 2006.229.15:11:47.62#ibcon#enter sib2, iclass 20, count 2 2006.229.15:11:47.62#ibcon#flushed, iclass 20, count 2 2006.229.15:11:47.62#ibcon#about to write, iclass 20, count 2 2006.229.15:11:47.62#ibcon#wrote, iclass 20, count 2 2006.229.15:11:47.62#ibcon#about to read 3, iclass 20, count 2 2006.229.15:11:47.64#ibcon#read 3, iclass 20, count 2 2006.229.15:11:47.64#ibcon#about to read 4, iclass 20, count 2 2006.229.15:11:47.64#ibcon#read 4, iclass 20, count 2 2006.229.15:11:47.64#ibcon#about to read 5, iclass 20, count 2 2006.229.15:11:47.64#ibcon#read 5, iclass 20, count 2 2006.229.15:11:47.64#ibcon#about to read 6, iclass 20, count 2 2006.229.15:11:47.64#ibcon#read 6, iclass 20, count 2 2006.229.15:11:47.64#ibcon#end of sib2, iclass 20, count 2 2006.229.15:11:47.64#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:11:47.64#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:11:47.64#ibcon#[25=AT02-07\r\n] 2006.229.15:11:47.64#ibcon#*before write, iclass 20, count 2 2006.229.15:11:47.64#ibcon#enter sib2, iclass 20, count 2 2006.229.15:11:47.64#ibcon#flushed, iclass 20, count 2 2006.229.15:11:47.64#ibcon#about to write, iclass 20, count 2 2006.229.15:11:47.64#ibcon#wrote, iclass 20, count 2 2006.229.15:11:47.64#ibcon#about to read 3, iclass 20, count 2 2006.229.15:11:47.67#ibcon#read 3, iclass 20, count 2 2006.229.15:11:47.67#ibcon#about to read 4, iclass 20, count 2 2006.229.15:11:47.67#ibcon#read 4, iclass 20, count 2 2006.229.15:11:47.67#ibcon#about to read 5, iclass 20, count 2 2006.229.15:11:47.67#ibcon#read 5, iclass 20, count 2 2006.229.15:11:47.67#ibcon#about to read 6, iclass 20, count 2 2006.229.15:11:47.67#ibcon#read 6, iclass 20, count 2 2006.229.15:11:47.67#ibcon#end of sib2, iclass 20, count 2 2006.229.15:11:47.67#ibcon#*after write, iclass 20, count 2 2006.229.15:11:47.67#ibcon#*before return 0, iclass 20, count 2 2006.229.15:11:47.67#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:47.67#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:47.67#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:11:47.67#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:47.67#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:47.79#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:47.79#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:47.79#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:11:47.79#ibcon#first serial, iclass 20, count 0 2006.229.15:11:47.79#ibcon#enter sib2, iclass 20, count 0 2006.229.15:11:47.79#ibcon#flushed, iclass 20, count 0 2006.229.15:11:47.79#ibcon#about to write, iclass 20, count 0 2006.229.15:11:47.79#ibcon#wrote, iclass 20, count 0 2006.229.15:11:47.79#ibcon#about to read 3, iclass 20, count 0 2006.229.15:11:47.81#ibcon#read 3, iclass 20, count 0 2006.229.15:11:47.81#ibcon#about to read 4, iclass 20, count 0 2006.229.15:11:47.81#ibcon#read 4, iclass 20, count 0 2006.229.15:11:47.81#ibcon#about to read 5, iclass 20, count 0 2006.229.15:11:47.81#ibcon#read 5, iclass 20, count 0 2006.229.15:11:47.81#ibcon#about to read 6, iclass 20, count 0 2006.229.15:11:47.81#ibcon#read 6, iclass 20, count 0 2006.229.15:11:47.81#ibcon#end of sib2, iclass 20, count 0 2006.229.15:11:47.81#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:11:47.81#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:11:47.81#ibcon#[25=USB\r\n] 2006.229.15:11:47.81#ibcon#*before write, iclass 20, count 0 2006.229.15:11:47.81#ibcon#enter sib2, iclass 20, count 0 2006.229.15:11:47.81#ibcon#flushed, iclass 20, count 0 2006.229.15:11:47.81#ibcon#about to write, iclass 20, count 0 2006.229.15:11:47.81#ibcon#wrote, iclass 20, count 0 2006.229.15:11:47.81#ibcon#about to read 3, iclass 20, count 0 2006.229.15:11:47.84#ibcon#read 3, iclass 20, count 0 2006.229.15:11:47.84#ibcon#about to read 4, iclass 20, count 0 2006.229.15:11:47.84#ibcon#read 4, iclass 20, count 0 2006.229.15:11:47.84#ibcon#about to read 5, iclass 20, count 0 2006.229.15:11:47.84#ibcon#read 5, iclass 20, count 0 2006.229.15:11:47.84#ibcon#about to read 6, iclass 20, count 0 2006.229.15:11:47.84#ibcon#read 6, iclass 20, count 0 2006.229.15:11:47.84#ibcon#end of sib2, iclass 20, count 0 2006.229.15:11:47.84#ibcon#*after write, iclass 20, count 0 2006.229.15:11:47.84#ibcon#*before return 0, iclass 20, count 0 2006.229.15:11:47.84#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:47.84#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:47.84#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:11:47.84#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:11:47.84$vck44/valo=3,564.99 2006.229.15:11:47.84#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:11:47.84#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:11:47.84#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:47.84#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:47.84#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:47.84#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:47.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:11:47.84#ibcon#first serial, iclass 22, count 0 2006.229.15:11:47.84#ibcon#enter sib2, iclass 22, count 0 2006.229.15:11:47.84#ibcon#flushed, iclass 22, count 0 2006.229.15:11:47.84#ibcon#about to write, iclass 22, count 0 2006.229.15:11:47.84#ibcon#wrote, iclass 22, count 0 2006.229.15:11:47.84#ibcon#about to read 3, iclass 22, count 0 2006.229.15:11:47.86#ibcon#read 3, iclass 22, count 0 2006.229.15:11:47.86#ibcon#about to read 4, iclass 22, count 0 2006.229.15:11:47.86#ibcon#read 4, iclass 22, count 0 2006.229.15:11:47.86#ibcon#about to read 5, iclass 22, count 0 2006.229.15:11:47.86#ibcon#read 5, iclass 22, count 0 2006.229.15:11:47.86#ibcon#about to read 6, iclass 22, count 0 2006.229.15:11:47.86#ibcon#read 6, iclass 22, count 0 2006.229.15:11:47.86#ibcon#end of sib2, iclass 22, count 0 2006.229.15:11:47.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:11:47.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:11:47.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:11:47.86#ibcon#*before write, iclass 22, count 0 2006.229.15:11:47.86#ibcon#enter sib2, iclass 22, count 0 2006.229.15:11:47.86#ibcon#flushed, iclass 22, count 0 2006.229.15:11:47.86#ibcon#about to write, iclass 22, count 0 2006.229.15:11:47.86#ibcon#wrote, iclass 22, count 0 2006.229.15:11:47.86#ibcon#about to read 3, iclass 22, count 0 2006.229.15:11:47.90#ibcon#read 3, iclass 22, count 0 2006.229.15:11:47.90#ibcon#about to read 4, iclass 22, count 0 2006.229.15:11:47.90#ibcon#read 4, iclass 22, count 0 2006.229.15:11:47.90#ibcon#about to read 5, iclass 22, count 0 2006.229.15:11:47.90#ibcon#read 5, iclass 22, count 0 2006.229.15:11:47.90#ibcon#about to read 6, iclass 22, count 0 2006.229.15:11:47.90#ibcon#read 6, iclass 22, count 0 2006.229.15:11:47.90#ibcon#end of sib2, iclass 22, count 0 2006.229.15:11:47.90#ibcon#*after write, iclass 22, count 0 2006.229.15:11:47.90#ibcon#*before return 0, iclass 22, count 0 2006.229.15:11:47.90#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:47.90#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:47.90#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:11:47.90#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:11:47.90$vck44/va=3,6 2006.229.15:11:47.90#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.15:11:47.90#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.15:11:47.90#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:47.90#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:47.96#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:47.96#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:47.96#ibcon#enter wrdev, iclass 24, count 2 2006.229.15:11:47.96#ibcon#first serial, iclass 24, count 2 2006.229.15:11:47.96#ibcon#enter sib2, iclass 24, count 2 2006.229.15:11:47.96#ibcon#flushed, iclass 24, count 2 2006.229.15:11:47.96#ibcon#about to write, iclass 24, count 2 2006.229.15:11:47.96#ibcon#wrote, iclass 24, count 2 2006.229.15:11:47.96#ibcon#about to read 3, iclass 24, count 2 2006.229.15:11:47.98#ibcon#read 3, iclass 24, count 2 2006.229.15:11:47.98#ibcon#about to read 4, iclass 24, count 2 2006.229.15:11:47.98#ibcon#read 4, iclass 24, count 2 2006.229.15:11:47.98#ibcon#about to read 5, iclass 24, count 2 2006.229.15:11:47.98#ibcon#read 5, iclass 24, count 2 2006.229.15:11:47.98#ibcon#about to read 6, iclass 24, count 2 2006.229.15:11:47.98#ibcon#read 6, iclass 24, count 2 2006.229.15:11:47.98#ibcon#end of sib2, iclass 24, count 2 2006.229.15:11:47.98#ibcon#*mode == 0, iclass 24, count 2 2006.229.15:11:47.98#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.15:11:47.98#ibcon#[25=AT03-06\r\n] 2006.229.15:11:47.98#ibcon#*before write, iclass 24, count 2 2006.229.15:11:47.98#ibcon#enter sib2, iclass 24, count 2 2006.229.15:11:47.98#ibcon#flushed, iclass 24, count 2 2006.229.15:11:47.98#ibcon#about to write, iclass 24, count 2 2006.229.15:11:47.98#ibcon#wrote, iclass 24, count 2 2006.229.15:11:47.98#ibcon#about to read 3, iclass 24, count 2 2006.229.15:11:48.01#ibcon#read 3, iclass 24, count 2 2006.229.15:11:48.01#ibcon#about to read 4, iclass 24, count 2 2006.229.15:11:48.01#ibcon#read 4, iclass 24, count 2 2006.229.15:11:48.01#ibcon#about to read 5, iclass 24, count 2 2006.229.15:11:48.01#ibcon#read 5, iclass 24, count 2 2006.229.15:11:48.01#ibcon#about to read 6, iclass 24, count 2 2006.229.15:11:48.01#ibcon#read 6, iclass 24, count 2 2006.229.15:11:48.01#ibcon#end of sib2, iclass 24, count 2 2006.229.15:11:48.01#ibcon#*after write, iclass 24, count 2 2006.229.15:11:48.01#ibcon#*before return 0, iclass 24, count 2 2006.229.15:11:48.01#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:48.01#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:48.01#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.15:11:48.01#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:48.01#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:48.13#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:48.13#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:48.13#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:11:48.13#ibcon#first serial, iclass 24, count 0 2006.229.15:11:48.13#ibcon#enter sib2, iclass 24, count 0 2006.229.15:11:48.13#ibcon#flushed, iclass 24, count 0 2006.229.15:11:48.13#ibcon#about to write, iclass 24, count 0 2006.229.15:11:48.13#ibcon#wrote, iclass 24, count 0 2006.229.15:11:48.13#ibcon#about to read 3, iclass 24, count 0 2006.229.15:11:48.15#ibcon#read 3, iclass 24, count 0 2006.229.15:11:48.15#ibcon#about to read 4, iclass 24, count 0 2006.229.15:11:48.15#ibcon#read 4, iclass 24, count 0 2006.229.15:11:48.15#ibcon#about to read 5, iclass 24, count 0 2006.229.15:11:48.15#ibcon#read 5, iclass 24, count 0 2006.229.15:11:48.15#ibcon#about to read 6, iclass 24, count 0 2006.229.15:11:48.15#ibcon#read 6, iclass 24, count 0 2006.229.15:11:48.15#ibcon#end of sib2, iclass 24, count 0 2006.229.15:11:48.15#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:11:48.15#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:11:48.15#ibcon#[25=USB\r\n] 2006.229.15:11:48.15#ibcon#*before write, iclass 24, count 0 2006.229.15:11:48.15#ibcon#enter sib2, iclass 24, count 0 2006.229.15:11:48.15#ibcon#flushed, iclass 24, count 0 2006.229.15:11:48.15#ibcon#about to write, iclass 24, count 0 2006.229.15:11:48.15#ibcon#wrote, iclass 24, count 0 2006.229.15:11:48.15#ibcon#about to read 3, iclass 24, count 0 2006.229.15:11:48.18#ibcon#read 3, iclass 24, count 0 2006.229.15:11:48.18#ibcon#about to read 4, iclass 24, count 0 2006.229.15:11:48.18#ibcon#read 4, iclass 24, count 0 2006.229.15:11:48.18#ibcon#about to read 5, iclass 24, count 0 2006.229.15:11:48.18#ibcon#read 5, iclass 24, count 0 2006.229.15:11:48.18#ibcon#about to read 6, iclass 24, count 0 2006.229.15:11:48.18#ibcon#read 6, iclass 24, count 0 2006.229.15:11:48.18#ibcon#end of sib2, iclass 24, count 0 2006.229.15:11:48.18#ibcon#*after write, iclass 24, count 0 2006.229.15:11:48.18#ibcon#*before return 0, iclass 24, count 0 2006.229.15:11:48.18#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:48.18#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:48.18#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:11:48.18#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:11:48.18$vck44/valo=4,624.99 2006.229.15:11:48.18#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:11:48.18#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:11:48.18#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:48.18#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:48.18#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:48.18#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:48.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:11:48.18#ibcon#first serial, iclass 26, count 0 2006.229.15:11:48.18#ibcon#enter sib2, iclass 26, count 0 2006.229.15:11:48.18#ibcon#flushed, iclass 26, count 0 2006.229.15:11:48.18#ibcon#about to write, iclass 26, count 0 2006.229.15:11:48.18#ibcon#wrote, iclass 26, count 0 2006.229.15:11:48.18#ibcon#about to read 3, iclass 26, count 0 2006.229.15:11:48.20#ibcon#read 3, iclass 26, count 0 2006.229.15:11:48.20#ibcon#about to read 4, iclass 26, count 0 2006.229.15:11:48.20#ibcon#read 4, iclass 26, count 0 2006.229.15:11:48.20#ibcon#about to read 5, iclass 26, count 0 2006.229.15:11:48.20#ibcon#read 5, iclass 26, count 0 2006.229.15:11:48.20#ibcon#about to read 6, iclass 26, count 0 2006.229.15:11:48.20#ibcon#read 6, iclass 26, count 0 2006.229.15:11:48.20#ibcon#end of sib2, iclass 26, count 0 2006.229.15:11:48.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:11:48.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:11:48.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:11:48.20#ibcon#*before write, iclass 26, count 0 2006.229.15:11:48.20#ibcon#enter sib2, iclass 26, count 0 2006.229.15:11:48.20#ibcon#flushed, iclass 26, count 0 2006.229.15:11:48.20#ibcon#about to write, iclass 26, count 0 2006.229.15:11:48.20#ibcon#wrote, iclass 26, count 0 2006.229.15:11:48.20#ibcon#about to read 3, iclass 26, count 0 2006.229.15:11:48.24#ibcon#read 3, iclass 26, count 0 2006.229.15:11:48.24#ibcon#about to read 4, iclass 26, count 0 2006.229.15:11:48.24#ibcon#read 4, iclass 26, count 0 2006.229.15:11:48.24#ibcon#about to read 5, iclass 26, count 0 2006.229.15:11:48.24#ibcon#read 5, iclass 26, count 0 2006.229.15:11:48.24#ibcon#about to read 6, iclass 26, count 0 2006.229.15:11:48.24#ibcon#read 6, iclass 26, count 0 2006.229.15:11:48.24#ibcon#end of sib2, iclass 26, count 0 2006.229.15:11:48.24#ibcon#*after write, iclass 26, count 0 2006.229.15:11:48.24#ibcon#*before return 0, iclass 26, count 0 2006.229.15:11:48.24#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:48.24#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:48.24#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:11:48.24#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:11:48.24$vck44/va=4,7 2006.229.15:11:48.24#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:11:48.24#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:11:48.24#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:48.24#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:48.30#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:48.30#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:48.30#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:11:48.30#ibcon#first serial, iclass 28, count 2 2006.229.15:11:48.30#ibcon#enter sib2, iclass 28, count 2 2006.229.15:11:48.30#ibcon#flushed, iclass 28, count 2 2006.229.15:11:48.30#ibcon#about to write, iclass 28, count 2 2006.229.15:11:48.30#ibcon#wrote, iclass 28, count 2 2006.229.15:11:48.30#ibcon#about to read 3, iclass 28, count 2 2006.229.15:11:48.32#ibcon#read 3, iclass 28, count 2 2006.229.15:11:48.32#ibcon#about to read 4, iclass 28, count 2 2006.229.15:11:48.32#ibcon#read 4, iclass 28, count 2 2006.229.15:11:48.32#ibcon#about to read 5, iclass 28, count 2 2006.229.15:11:48.32#ibcon#read 5, iclass 28, count 2 2006.229.15:11:48.32#ibcon#about to read 6, iclass 28, count 2 2006.229.15:11:48.32#ibcon#read 6, iclass 28, count 2 2006.229.15:11:48.32#ibcon#end of sib2, iclass 28, count 2 2006.229.15:11:48.32#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:11:48.32#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:11:48.32#ibcon#[25=AT04-07\r\n] 2006.229.15:11:48.32#ibcon#*before write, iclass 28, count 2 2006.229.15:11:48.32#ibcon#enter sib2, iclass 28, count 2 2006.229.15:11:48.32#ibcon#flushed, iclass 28, count 2 2006.229.15:11:48.32#ibcon#about to write, iclass 28, count 2 2006.229.15:11:48.32#ibcon#wrote, iclass 28, count 2 2006.229.15:11:48.32#ibcon#about to read 3, iclass 28, count 2 2006.229.15:11:48.35#ibcon#read 3, iclass 28, count 2 2006.229.15:11:48.35#ibcon#about to read 4, iclass 28, count 2 2006.229.15:11:48.35#ibcon#read 4, iclass 28, count 2 2006.229.15:11:48.35#ibcon#about to read 5, iclass 28, count 2 2006.229.15:11:48.35#ibcon#read 5, iclass 28, count 2 2006.229.15:11:48.35#ibcon#about to read 6, iclass 28, count 2 2006.229.15:11:48.35#ibcon#read 6, iclass 28, count 2 2006.229.15:11:48.35#ibcon#end of sib2, iclass 28, count 2 2006.229.15:11:48.35#ibcon#*after write, iclass 28, count 2 2006.229.15:11:48.35#ibcon#*before return 0, iclass 28, count 2 2006.229.15:11:48.35#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:48.35#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:48.35#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:11:48.35#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:48.35#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:48.47#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:48.47#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:48.47#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:11:48.47#ibcon#first serial, iclass 28, count 0 2006.229.15:11:48.47#ibcon#enter sib2, iclass 28, count 0 2006.229.15:11:48.47#ibcon#flushed, iclass 28, count 0 2006.229.15:11:48.47#ibcon#about to write, iclass 28, count 0 2006.229.15:11:48.47#ibcon#wrote, iclass 28, count 0 2006.229.15:11:48.47#ibcon#about to read 3, iclass 28, count 0 2006.229.15:11:48.49#ibcon#read 3, iclass 28, count 0 2006.229.15:11:48.49#ibcon#about to read 4, iclass 28, count 0 2006.229.15:11:48.49#ibcon#read 4, iclass 28, count 0 2006.229.15:11:48.49#ibcon#about to read 5, iclass 28, count 0 2006.229.15:11:48.49#ibcon#read 5, iclass 28, count 0 2006.229.15:11:48.49#ibcon#about to read 6, iclass 28, count 0 2006.229.15:11:48.49#ibcon#read 6, iclass 28, count 0 2006.229.15:11:48.49#ibcon#end of sib2, iclass 28, count 0 2006.229.15:11:48.49#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:11:48.49#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:11:48.49#ibcon#[25=USB\r\n] 2006.229.15:11:48.49#ibcon#*before write, iclass 28, count 0 2006.229.15:11:48.49#ibcon#enter sib2, iclass 28, count 0 2006.229.15:11:48.49#ibcon#flushed, iclass 28, count 0 2006.229.15:11:48.49#ibcon#about to write, iclass 28, count 0 2006.229.15:11:48.49#ibcon#wrote, iclass 28, count 0 2006.229.15:11:48.49#ibcon#about to read 3, iclass 28, count 0 2006.229.15:11:48.52#ibcon#read 3, iclass 28, count 0 2006.229.15:11:48.52#ibcon#about to read 4, iclass 28, count 0 2006.229.15:11:48.52#ibcon#read 4, iclass 28, count 0 2006.229.15:11:48.52#ibcon#about to read 5, iclass 28, count 0 2006.229.15:11:48.52#ibcon#read 5, iclass 28, count 0 2006.229.15:11:48.52#ibcon#about to read 6, iclass 28, count 0 2006.229.15:11:48.52#ibcon#read 6, iclass 28, count 0 2006.229.15:11:48.52#ibcon#end of sib2, iclass 28, count 0 2006.229.15:11:48.52#ibcon#*after write, iclass 28, count 0 2006.229.15:11:48.52#ibcon#*before return 0, iclass 28, count 0 2006.229.15:11:48.52#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:48.52#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:48.52#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:11:48.52#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:11:48.52$vck44/valo=5,734.99 2006.229.15:11:48.52#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:11:48.52#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:11:48.52#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:48.52#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:48.52#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:48.52#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:48.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:11:48.52#ibcon#first serial, iclass 30, count 0 2006.229.15:11:48.52#ibcon#enter sib2, iclass 30, count 0 2006.229.15:11:48.52#ibcon#flushed, iclass 30, count 0 2006.229.15:11:48.52#ibcon#about to write, iclass 30, count 0 2006.229.15:11:48.52#ibcon#wrote, iclass 30, count 0 2006.229.15:11:48.52#ibcon#about to read 3, iclass 30, count 0 2006.229.15:11:48.54#ibcon#read 3, iclass 30, count 0 2006.229.15:11:48.54#ibcon#about to read 4, iclass 30, count 0 2006.229.15:11:48.54#ibcon#read 4, iclass 30, count 0 2006.229.15:11:48.54#ibcon#about to read 5, iclass 30, count 0 2006.229.15:11:48.54#ibcon#read 5, iclass 30, count 0 2006.229.15:11:48.54#ibcon#about to read 6, iclass 30, count 0 2006.229.15:11:48.54#ibcon#read 6, iclass 30, count 0 2006.229.15:11:48.54#ibcon#end of sib2, iclass 30, count 0 2006.229.15:11:48.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:11:48.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:11:48.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:11:48.54#ibcon#*before write, iclass 30, count 0 2006.229.15:11:48.54#ibcon#enter sib2, iclass 30, count 0 2006.229.15:11:48.54#ibcon#flushed, iclass 30, count 0 2006.229.15:11:48.54#ibcon#about to write, iclass 30, count 0 2006.229.15:11:48.54#ibcon#wrote, iclass 30, count 0 2006.229.15:11:48.54#ibcon#about to read 3, iclass 30, count 0 2006.229.15:11:48.58#ibcon#read 3, iclass 30, count 0 2006.229.15:11:48.58#ibcon#about to read 4, iclass 30, count 0 2006.229.15:11:48.58#ibcon#read 4, iclass 30, count 0 2006.229.15:11:48.58#ibcon#about to read 5, iclass 30, count 0 2006.229.15:11:48.58#ibcon#read 5, iclass 30, count 0 2006.229.15:11:48.58#ibcon#about to read 6, iclass 30, count 0 2006.229.15:11:48.58#ibcon#read 6, iclass 30, count 0 2006.229.15:11:48.58#ibcon#end of sib2, iclass 30, count 0 2006.229.15:11:48.58#ibcon#*after write, iclass 30, count 0 2006.229.15:11:48.58#ibcon#*before return 0, iclass 30, count 0 2006.229.15:11:48.58#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:48.58#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:48.58#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:11:48.58#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:11:48.58$vck44/va=5,4 2006.229.15:11:48.58#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:11:48.58#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:11:48.58#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:48.58#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:48.64#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:48.64#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:48.64#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:11:48.64#ibcon#first serial, iclass 32, count 2 2006.229.15:11:48.64#ibcon#enter sib2, iclass 32, count 2 2006.229.15:11:48.64#ibcon#flushed, iclass 32, count 2 2006.229.15:11:48.64#ibcon#about to write, iclass 32, count 2 2006.229.15:11:48.64#ibcon#wrote, iclass 32, count 2 2006.229.15:11:48.64#ibcon#about to read 3, iclass 32, count 2 2006.229.15:11:48.66#ibcon#read 3, iclass 32, count 2 2006.229.15:11:48.66#ibcon#about to read 4, iclass 32, count 2 2006.229.15:11:48.66#ibcon#read 4, iclass 32, count 2 2006.229.15:11:48.66#ibcon#about to read 5, iclass 32, count 2 2006.229.15:11:48.66#ibcon#read 5, iclass 32, count 2 2006.229.15:11:48.66#ibcon#about to read 6, iclass 32, count 2 2006.229.15:11:48.66#ibcon#read 6, iclass 32, count 2 2006.229.15:11:48.66#ibcon#end of sib2, iclass 32, count 2 2006.229.15:11:48.66#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:11:48.66#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:11:48.66#ibcon#[25=AT05-04\r\n] 2006.229.15:11:48.66#ibcon#*before write, iclass 32, count 2 2006.229.15:11:48.66#ibcon#enter sib2, iclass 32, count 2 2006.229.15:11:48.66#ibcon#flushed, iclass 32, count 2 2006.229.15:11:48.66#ibcon#about to write, iclass 32, count 2 2006.229.15:11:48.66#ibcon#wrote, iclass 32, count 2 2006.229.15:11:48.66#ibcon#about to read 3, iclass 32, count 2 2006.229.15:11:48.69#ibcon#read 3, iclass 32, count 2 2006.229.15:11:48.69#ibcon#about to read 4, iclass 32, count 2 2006.229.15:11:48.69#ibcon#read 4, iclass 32, count 2 2006.229.15:11:48.69#ibcon#about to read 5, iclass 32, count 2 2006.229.15:11:48.69#ibcon#read 5, iclass 32, count 2 2006.229.15:11:48.69#ibcon#about to read 6, iclass 32, count 2 2006.229.15:11:48.69#ibcon#read 6, iclass 32, count 2 2006.229.15:11:48.69#ibcon#end of sib2, iclass 32, count 2 2006.229.15:11:48.69#ibcon#*after write, iclass 32, count 2 2006.229.15:11:48.69#ibcon#*before return 0, iclass 32, count 2 2006.229.15:11:48.69#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:48.69#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:48.69#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:11:48.69#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:48.69#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:48.72#abcon#<5=/07 1.3 2.4 27.411001002.0\r\n> 2006.229.15:11:48.74#abcon#{5=INTERFACE CLEAR} 2006.229.15:11:48.80#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:11:48.81#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:48.81#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:48.81#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:11:48.81#ibcon#first serial, iclass 32, count 0 2006.229.15:11:48.81#ibcon#enter sib2, iclass 32, count 0 2006.229.15:11:48.81#ibcon#flushed, iclass 32, count 0 2006.229.15:11:48.81#ibcon#about to write, iclass 32, count 0 2006.229.15:11:48.81#ibcon#wrote, iclass 32, count 0 2006.229.15:11:48.81#ibcon#about to read 3, iclass 32, count 0 2006.229.15:11:48.83#ibcon#read 3, iclass 32, count 0 2006.229.15:11:48.83#ibcon#about to read 4, iclass 32, count 0 2006.229.15:11:48.83#ibcon#read 4, iclass 32, count 0 2006.229.15:11:48.83#ibcon#about to read 5, iclass 32, count 0 2006.229.15:11:48.83#ibcon#read 5, iclass 32, count 0 2006.229.15:11:48.83#ibcon#about to read 6, iclass 32, count 0 2006.229.15:11:48.83#ibcon#read 6, iclass 32, count 0 2006.229.15:11:48.83#ibcon#end of sib2, iclass 32, count 0 2006.229.15:11:48.83#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:11:48.83#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:11:48.83#ibcon#[25=USB\r\n] 2006.229.15:11:48.83#ibcon#*before write, iclass 32, count 0 2006.229.15:11:48.83#ibcon#enter sib2, iclass 32, count 0 2006.229.15:11:48.83#ibcon#flushed, iclass 32, count 0 2006.229.15:11:48.83#ibcon#about to write, iclass 32, count 0 2006.229.15:11:48.83#ibcon#wrote, iclass 32, count 0 2006.229.15:11:48.83#ibcon#about to read 3, iclass 32, count 0 2006.229.15:11:48.86#ibcon#read 3, iclass 32, count 0 2006.229.15:11:48.86#ibcon#about to read 4, iclass 32, count 0 2006.229.15:11:48.86#ibcon#read 4, iclass 32, count 0 2006.229.15:11:48.86#ibcon#about to read 5, iclass 32, count 0 2006.229.15:11:48.86#ibcon#read 5, iclass 32, count 0 2006.229.15:11:48.86#ibcon#about to read 6, iclass 32, count 0 2006.229.15:11:48.86#ibcon#read 6, iclass 32, count 0 2006.229.15:11:48.86#ibcon#end of sib2, iclass 32, count 0 2006.229.15:11:48.86#ibcon#*after write, iclass 32, count 0 2006.229.15:11:48.86#ibcon#*before return 0, iclass 32, count 0 2006.229.15:11:48.86#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:48.86#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:48.86#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:11:48.86#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:11:48.86$vck44/valo=6,814.99 2006.229.15:11:48.86#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:11:48.86#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:11:48.86#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:48.86#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:48.86#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:48.86#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:48.86#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:11:48.86#ibcon#first serial, iclass 38, count 0 2006.229.15:11:48.86#ibcon#enter sib2, iclass 38, count 0 2006.229.15:11:48.86#ibcon#flushed, iclass 38, count 0 2006.229.15:11:48.86#ibcon#about to write, iclass 38, count 0 2006.229.15:11:48.86#ibcon#wrote, iclass 38, count 0 2006.229.15:11:48.86#ibcon#about to read 3, iclass 38, count 0 2006.229.15:11:48.88#ibcon#read 3, iclass 38, count 0 2006.229.15:11:48.88#ibcon#about to read 4, iclass 38, count 0 2006.229.15:11:48.88#ibcon#read 4, iclass 38, count 0 2006.229.15:11:48.88#ibcon#about to read 5, iclass 38, count 0 2006.229.15:11:48.88#ibcon#read 5, iclass 38, count 0 2006.229.15:11:48.88#ibcon#about to read 6, iclass 38, count 0 2006.229.15:11:48.88#ibcon#read 6, iclass 38, count 0 2006.229.15:11:48.88#ibcon#end of sib2, iclass 38, count 0 2006.229.15:11:48.88#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:11:48.88#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:11:48.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:11:48.88#ibcon#*before write, iclass 38, count 0 2006.229.15:11:48.88#ibcon#enter sib2, iclass 38, count 0 2006.229.15:11:48.88#ibcon#flushed, iclass 38, count 0 2006.229.15:11:48.88#ibcon#about to write, iclass 38, count 0 2006.229.15:11:48.88#ibcon#wrote, iclass 38, count 0 2006.229.15:11:48.88#ibcon#about to read 3, iclass 38, count 0 2006.229.15:11:48.92#ibcon#read 3, iclass 38, count 0 2006.229.15:11:48.92#ibcon#about to read 4, iclass 38, count 0 2006.229.15:11:48.92#ibcon#read 4, iclass 38, count 0 2006.229.15:11:48.92#ibcon#about to read 5, iclass 38, count 0 2006.229.15:11:48.92#ibcon#read 5, iclass 38, count 0 2006.229.15:11:48.92#ibcon#about to read 6, iclass 38, count 0 2006.229.15:11:48.92#ibcon#read 6, iclass 38, count 0 2006.229.15:11:48.92#ibcon#end of sib2, iclass 38, count 0 2006.229.15:11:48.92#ibcon#*after write, iclass 38, count 0 2006.229.15:11:48.92#ibcon#*before return 0, iclass 38, count 0 2006.229.15:11:48.92#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:48.92#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:48.92#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:11:48.92#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:11:48.92$vck44/va=6,4 2006.229.15:11:48.92#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:11:48.92#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:11:48.92#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:48.92#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:48.98#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:48.98#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:48.98#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:11:48.98#ibcon#first serial, iclass 40, count 2 2006.229.15:11:48.98#ibcon#enter sib2, iclass 40, count 2 2006.229.15:11:48.98#ibcon#flushed, iclass 40, count 2 2006.229.15:11:48.98#ibcon#about to write, iclass 40, count 2 2006.229.15:11:48.98#ibcon#wrote, iclass 40, count 2 2006.229.15:11:48.98#ibcon#about to read 3, iclass 40, count 2 2006.229.15:11:49.00#ibcon#read 3, iclass 40, count 2 2006.229.15:11:49.00#ibcon#about to read 4, iclass 40, count 2 2006.229.15:11:49.00#ibcon#read 4, iclass 40, count 2 2006.229.15:11:49.00#ibcon#about to read 5, iclass 40, count 2 2006.229.15:11:49.00#ibcon#read 5, iclass 40, count 2 2006.229.15:11:49.00#ibcon#about to read 6, iclass 40, count 2 2006.229.15:11:49.00#ibcon#read 6, iclass 40, count 2 2006.229.15:11:49.00#ibcon#end of sib2, iclass 40, count 2 2006.229.15:11:49.00#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:11:49.00#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:11:49.00#ibcon#[25=AT06-04\r\n] 2006.229.15:11:49.00#ibcon#*before write, iclass 40, count 2 2006.229.15:11:49.00#ibcon#enter sib2, iclass 40, count 2 2006.229.15:11:49.00#ibcon#flushed, iclass 40, count 2 2006.229.15:11:49.00#ibcon#about to write, iclass 40, count 2 2006.229.15:11:49.00#ibcon#wrote, iclass 40, count 2 2006.229.15:11:49.00#ibcon#about to read 3, iclass 40, count 2 2006.229.15:11:49.03#ibcon#read 3, iclass 40, count 2 2006.229.15:11:49.03#ibcon#about to read 4, iclass 40, count 2 2006.229.15:11:49.03#ibcon#read 4, iclass 40, count 2 2006.229.15:11:49.03#ibcon#about to read 5, iclass 40, count 2 2006.229.15:11:49.03#ibcon#read 5, iclass 40, count 2 2006.229.15:11:49.03#ibcon#about to read 6, iclass 40, count 2 2006.229.15:11:49.03#ibcon#read 6, iclass 40, count 2 2006.229.15:11:49.03#ibcon#end of sib2, iclass 40, count 2 2006.229.15:11:49.03#ibcon#*after write, iclass 40, count 2 2006.229.15:11:49.03#ibcon#*before return 0, iclass 40, count 2 2006.229.15:11:49.03#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:49.03#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:49.03#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:11:49.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:49.03#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:49.15#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:49.15#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:49.15#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:11:49.15#ibcon#first serial, iclass 40, count 0 2006.229.15:11:49.15#ibcon#enter sib2, iclass 40, count 0 2006.229.15:11:49.15#ibcon#flushed, iclass 40, count 0 2006.229.15:11:49.15#ibcon#about to write, iclass 40, count 0 2006.229.15:11:49.15#ibcon#wrote, iclass 40, count 0 2006.229.15:11:49.15#ibcon#about to read 3, iclass 40, count 0 2006.229.15:11:49.17#ibcon#read 3, iclass 40, count 0 2006.229.15:11:49.17#ibcon#about to read 4, iclass 40, count 0 2006.229.15:11:49.17#ibcon#read 4, iclass 40, count 0 2006.229.15:11:49.17#ibcon#about to read 5, iclass 40, count 0 2006.229.15:11:49.17#ibcon#read 5, iclass 40, count 0 2006.229.15:11:49.17#ibcon#about to read 6, iclass 40, count 0 2006.229.15:11:49.17#ibcon#read 6, iclass 40, count 0 2006.229.15:11:49.17#ibcon#end of sib2, iclass 40, count 0 2006.229.15:11:49.17#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:11:49.17#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:11:49.17#ibcon#[25=USB\r\n] 2006.229.15:11:49.17#ibcon#*before write, iclass 40, count 0 2006.229.15:11:49.17#ibcon#enter sib2, iclass 40, count 0 2006.229.15:11:49.17#ibcon#flushed, iclass 40, count 0 2006.229.15:11:49.17#ibcon#about to write, iclass 40, count 0 2006.229.15:11:49.17#ibcon#wrote, iclass 40, count 0 2006.229.15:11:49.17#ibcon#about to read 3, iclass 40, count 0 2006.229.15:11:49.20#ibcon#read 3, iclass 40, count 0 2006.229.15:11:49.20#ibcon#about to read 4, iclass 40, count 0 2006.229.15:11:49.20#ibcon#read 4, iclass 40, count 0 2006.229.15:11:49.20#ibcon#about to read 5, iclass 40, count 0 2006.229.15:11:49.20#ibcon#read 5, iclass 40, count 0 2006.229.15:11:49.20#ibcon#about to read 6, iclass 40, count 0 2006.229.15:11:49.20#ibcon#read 6, iclass 40, count 0 2006.229.15:11:49.20#ibcon#end of sib2, iclass 40, count 0 2006.229.15:11:49.20#ibcon#*after write, iclass 40, count 0 2006.229.15:11:49.20#ibcon#*before return 0, iclass 40, count 0 2006.229.15:11:49.20#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:49.20#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:49.20#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:11:49.20#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:11:49.20$vck44/valo=7,864.99 2006.229.15:11:49.20#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:11:49.20#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:11:49.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:49.20#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:49.20#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:49.20#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:49.20#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:11:49.20#ibcon#first serial, iclass 4, count 0 2006.229.15:11:49.20#ibcon#enter sib2, iclass 4, count 0 2006.229.15:11:49.20#ibcon#flushed, iclass 4, count 0 2006.229.15:11:49.20#ibcon#about to write, iclass 4, count 0 2006.229.15:11:49.20#ibcon#wrote, iclass 4, count 0 2006.229.15:11:49.20#ibcon#about to read 3, iclass 4, count 0 2006.229.15:11:49.22#ibcon#read 3, iclass 4, count 0 2006.229.15:11:49.22#ibcon#about to read 4, iclass 4, count 0 2006.229.15:11:49.22#ibcon#read 4, iclass 4, count 0 2006.229.15:11:49.22#ibcon#about to read 5, iclass 4, count 0 2006.229.15:11:49.22#ibcon#read 5, iclass 4, count 0 2006.229.15:11:49.22#ibcon#about to read 6, iclass 4, count 0 2006.229.15:11:49.22#ibcon#read 6, iclass 4, count 0 2006.229.15:11:49.22#ibcon#end of sib2, iclass 4, count 0 2006.229.15:11:49.22#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:11:49.22#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:11:49.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:11:49.22#ibcon#*before write, iclass 4, count 0 2006.229.15:11:49.22#ibcon#enter sib2, iclass 4, count 0 2006.229.15:11:49.22#ibcon#flushed, iclass 4, count 0 2006.229.15:11:49.22#ibcon#about to write, iclass 4, count 0 2006.229.15:11:49.22#ibcon#wrote, iclass 4, count 0 2006.229.15:11:49.22#ibcon#about to read 3, iclass 4, count 0 2006.229.15:11:49.26#ibcon#read 3, iclass 4, count 0 2006.229.15:11:49.26#ibcon#about to read 4, iclass 4, count 0 2006.229.15:11:49.26#ibcon#read 4, iclass 4, count 0 2006.229.15:11:49.26#ibcon#about to read 5, iclass 4, count 0 2006.229.15:11:49.26#ibcon#read 5, iclass 4, count 0 2006.229.15:11:49.26#ibcon#about to read 6, iclass 4, count 0 2006.229.15:11:49.26#ibcon#read 6, iclass 4, count 0 2006.229.15:11:49.26#ibcon#end of sib2, iclass 4, count 0 2006.229.15:11:49.26#ibcon#*after write, iclass 4, count 0 2006.229.15:11:49.26#ibcon#*before return 0, iclass 4, count 0 2006.229.15:11:49.26#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:49.26#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:49.26#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:11:49.26#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:11:49.26$vck44/va=7,5 2006.229.15:11:49.26#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:11:49.26#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:11:49.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:49.26#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:49.32#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:49.32#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:49.32#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:11:49.32#ibcon#first serial, iclass 6, count 2 2006.229.15:11:49.32#ibcon#enter sib2, iclass 6, count 2 2006.229.15:11:49.32#ibcon#flushed, iclass 6, count 2 2006.229.15:11:49.32#ibcon#about to write, iclass 6, count 2 2006.229.15:11:49.32#ibcon#wrote, iclass 6, count 2 2006.229.15:11:49.32#ibcon#about to read 3, iclass 6, count 2 2006.229.15:11:49.34#ibcon#read 3, iclass 6, count 2 2006.229.15:11:49.34#ibcon#about to read 4, iclass 6, count 2 2006.229.15:11:49.34#ibcon#read 4, iclass 6, count 2 2006.229.15:11:49.34#ibcon#about to read 5, iclass 6, count 2 2006.229.15:11:49.34#ibcon#read 5, iclass 6, count 2 2006.229.15:11:49.34#ibcon#about to read 6, iclass 6, count 2 2006.229.15:11:49.34#ibcon#read 6, iclass 6, count 2 2006.229.15:11:49.34#ibcon#end of sib2, iclass 6, count 2 2006.229.15:11:49.34#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:11:49.34#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:11:49.34#ibcon#[25=AT07-05\r\n] 2006.229.15:11:49.34#ibcon#*before write, iclass 6, count 2 2006.229.15:11:49.34#ibcon#enter sib2, iclass 6, count 2 2006.229.15:11:49.34#ibcon#flushed, iclass 6, count 2 2006.229.15:11:49.34#ibcon#about to write, iclass 6, count 2 2006.229.15:11:49.34#ibcon#wrote, iclass 6, count 2 2006.229.15:11:49.34#ibcon#about to read 3, iclass 6, count 2 2006.229.15:11:49.37#ibcon#read 3, iclass 6, count 2 2006.229.15:11:49.37#ibcon#about to read 4, iclass 6, count 2 2006.229.15:11:49.37#ibcon#read 4, iclass 6, count 2 2006.229.15:11:49.37#ibcon#about to read 5, iclass 6, count 2 2006.229.15:11:49.37#ibcon#read 5, iclass 6, count 2 2006.229.15:11:49.37#ibcon#about to read 6, iclass 6, count 2 2006.229.15:11:49.37#ibcon#read 6, iclass 6, count 2 2006.229.15:11:49.37#ibcon#end of sib2, iclass 6, count 2 2006.229.15:11:49.37#ibcon#*after write, iclass 6, count 2 2006.229.15:11:49.37#ibcon#*before return 0, iclass 6, count 2 2006.229.15:11:49.37#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:49.37#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:49.37#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:11:49.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:49.37#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:49.49#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:49.49#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:49.49#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:11:49.49#ibcon#first serial, iclass 6, count 0 2006.229.15:11:49.49#ibcon#enter sib2, iclass 6, count 0 2006.229.15:11:49.49#ibcon#flushed, iclass 6, count 0 2006.229.15:11:49.49#ibcon#about to write, iclass 6, count 0 2006.229.15:11:49.49#ibcon#wrote, iclass 6, count 0 2006.229.15:11:49.49#ibcon#about to read 3, iclass 6, count 0 2006.229.15:11:49.51#ibcon#read 3, iclass 6, count 0 2006.229.15:11:49.51#ibcon#about to read 4, iclass 6, count 0 2006.229.15:11:49.51#ibcon#read 4, iclass 6, count 0 2006.229.15:11:49.51#ibcon#about to read 5, iclass 6, count 0 2006.229.15:11:49.51#ibcon#read 5, iclass 6, count 0 2006.229.15:11:49.51#ibcon#about to read 6, iclass 6, count 0 2006.229.15:11:49.51#ibcon#read 6, iclass 6, count 0 2006.229.15:11:49.51#ibcon#end of sib2, iclass 6, count 0 2006.229.15:11:49.51#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:11:49.51#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:11:49.51#ibcon#[25=USB\r\n] 2006.229.15:11:49.51#ibcon#*before write, iclass 6, count 0 2006.229.15:11:49.51#ibcon#enter sib2, iclass 6, count 0 2006.229.15:11:49.51#ibcon#flushed, iclass 6, count 0 2006.229.15:11:49.51#ibcon#about to write, iclass 6, count 0 2006.229.15:11:49.51#ibcon#wrote, iclass 6, count 0 2006.229.15:11:49.51#ibcon#about to read 3, iclass 6, count 0 2006.229.15:11:49.54#ibcon#read 3, iclass 6, count 0 2006.229.15:11:49.54#ibcon#about to read 4, iclass 6, count 0 2006.229.15:11:49.54#ibcon#read 4, iclass 6, count 0 2006.229.15:11:49.54#ibcon#about to read 5, iclass 6, count 0 2006.229.15:11:49.54#ibcon#read 5, iclass 6, count 0 2006.229.15:11:49.54#ibcon#about to read 6, iclass 6, count 0 2006.229.15:11:49.54#ibcon#read 6, iclass 6, count 0 2006.229.15:11:49.54#ibcon#end of sib2, iclass 6, count 0 2006.229.15:11:49.54#ibcon#*after write, iclass 6, count 0 2006.229.15:11:49.54#ibcon#*before return 0, iclass 6, count 0 2006.229.15:11:49.54#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:49.54#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:49.54#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:11:49.54#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:11:49.54$vck44/valo=8,884.99 2006.229.15:11:49.54#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:11:49.54#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:11:49.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:49.54#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:49.54#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:49.54#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:49.54#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:11:49.54#ibcon#first serial, iclass 10, count 0 2006.229.15:11:49.54#ibcon#enter sib2, iclass 10, count 0 2006.229.15:11:49.54#ibcon#flushed, iclass 10, count 0 2006.229.15:11:49.54#ibcon#about to write, iclass 10, count 0 2006.229.15:11:49.54#ibcon#wrote, iclass 10, count 0 2006.229.15:11:49.54#ibcon#about to read 3, iclass 10, count 0 2006.229.15:11:49.56#ibcon#read 3, iclass 10, count 0 2006.229.15:11:49.56#ibcon#about to read 4, iclass 10, count 0 2006.229.15:11:49.56#ibcon#read 4, iclass 10, count 0 2006.229.15:11:49.56#ibcon#about to read 5, iclass 10, count 0 2006.229.15:11:49.56#ibcon#read 5, iclass 10, count 0 2006.229.15:11:49.56#ibcon#about to read 6, iclass 10, count 0 2006.229.15:11:49.56#ibcon#read 6, iclass 10, count 0 2006.229.15:11:49.56#ibcon#end of sib2, iclass 10, count 0 2006.229.15:11:49.56#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:11:49.56#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:11:49.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:11:49.56#ibcon#*before write, iclass 10, count 0 2006.229.15:11:49.56#ibcon#enter sib2, iclass 10, count 0 2006.229.15:11:49.56#ibcon#flushed, iclass 10, count 0 2006.229.15:11:49.56#ibcon#about to write, iclass 10, count 0 2006.229.15:11:49.56#ibcon#wrote, iclass 10, count 0 2006.229.15:11:49.56#ibcon#about to read 3, iclass 10, count 0 2006.229.15:11:49.60#ibcon#read 3, iclass 10, count 0 2006.229.15:11:49.60#ibcon#about to read 4, iclass 10, count 0 2006.229.15:11:49.60#ibcon#read 4, iclass 10, count 0 2006.229.15:11:49.60#ibcon#about to read 5, iclass 10, count 0 2006.229.15:11:49.60#ibcon#read 5, iclass 10, count 0 2006.229.15:11:49.60#ibcon#about to read 6, iclass 10, count 0 2006.229.15:11:49.60#ibcon#read 6, iclass 10, count 0 2006.229.15:11:49.60#ibcon#end of sib2, iclass 10, count 0 2006.229.15:11:49.60#ibcon#*after write, iclass 10, count 0 2006.229.15:11:49.60#ibcon#*before return 0, iclass 10, count 0 2006.229.15:11:49.60#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:49.60#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:49.60#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:11:49.60#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:11:49.60$vck44/va=8,6 2006.229.15:11:49.60#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:11:49.60#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:11:49.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:49.60#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:11:49.66#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:11:49.66#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:11:49.66#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:11:49.66#ibcon#first serial, iclass 12, count 2 2006.229.15:11:49.66#ibcon#enter sib2, iclass 12, count 2 2006.229.15:11:49.66#ibcon#flushed, iclass 12, count 2 2006.229.15:11:49.66#ibcon#about to write, iclass 12, count 2 2006.229.15:11:49.66#ibcon#wrote, iclass 12, count 2 2006.229.15:11:49.66#ibcon#about to read 3, iclass 12, count 2 2006.229.15:11:49.68#ibcon#read 3, iclass 12, count 2 2006.229.15:11:49.68#ibcon#about to read 4, iclass 12, count 2 2006.229.15:11:49.68#ibcon#read 4, iclass 12, count 2 2006.229.15:11:49.68#ibcon#about to read 5, iclass 12, count 2 2006.229.15:11:49.68#ibcon#read 5, iclass 12, count 2 2006.229.15:11:49.68#ibcon#about to read 6, iclass 12, count 2 2006.229.15:11:49.68#ibcon#read 6, iclass 12, count 2 2006.229.15:11:49.68#ibcon#end of sib2, iclass 12, count 2 2006.229.15:11:49.68#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:11:49.68#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:11:49.68#ibcon#[25=AT08-06\r\n] 2006.229.15:11:49.68#ibcon#*before write, iclass 12, count 2 2006.229.15:11:49.68#ibcon#enter sib2, iclass 12, count 2 2006.229.15:11:49.68#ibcon#flushed, iclass 12, count 2 2006.229.15:11:49.68#ibcon#about to write, iclass 12, count 2 2006.229.15:11:49.68#ibcon#wrote, iclass 12, count 2 2006.229.15:11:49.68#ibcon#about to read 3, iclass 12, count 2 2006.229.15:11:49.71#ibcon#read 3, iclass 12, count 2 2006.229.15:11:49.71#ibcon#about to read 4, iclass 12, count 2 2006.229.15:11:49.71#ibcon#read 4, iclass 12, count 2 2006.229.15:11:49.71#ibcon#about to read 5, iclass 12, count 2 2006.229.15:11:49.71#ibcon#read 5, iclass 12, count 2 2006.229.15:11:49.71#ibcon#about to read 6, iclass 12, count 2 2006.229.15:11:49.71#ibcon#read 6, iclass 12, count 2 2006.229.15:11:49.71#ibcon#end of sib2, iclass 12, count 2 2006.229.15:11:49.71#ibcon#*after write, iclass 12, count 2 2006.229.15:11:49.71#ibcon#*before return 0, iclass 12, count 2 2006.229.15:11:49.71#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:11:49.71#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:11:49.71#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:11:49.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:49.71#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:11:49.83#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:11:49.83#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:11:49.83#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:11:49.83#ibcon#first serial, iclass 12, count 0 2006.229.15:11:49.83#ibcon#enter sib2, iclass 12, count 0 2006.229.15:11:49.83#ibcon#flushed, iclass 12, count 0 2006.229.15:11:49.83#ibcon#about to write, iclass 12, count 0 2006.229.15:11:49.83#ibcon#wrote, iclass 12, count 0 2006.229.15:11:49.83#ibcon#about to read 3, iclass 12, count 0 2006.229.15:11:49.85#ibcon#read 3, iclass 12, count 0 2006.229.15:11:49.85#ibcon#about to read 4, iclass 12, count 0 2006.229.15:11:49.85#ibcon#read 4, iclass 12, count 0 2006.229.15:11:49.85#ibcon#about to read 5, iclass 12, count 0 2006.229.15:11:49.85#ibcon#read 5, iclass 12, count 0 2006.229.15:11:49.85#ibcon#about to read 6, iclass 12, count 0 2006.229.15:11:49.85#ibcon#read 6, iclass 12, count 0 2006.229.15:11:49.85#ibcon#end of sib2, iclass 12, count 0 2006.229.15:11:49.85#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:11:49.85#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:11:49.85#ibcon#[25=USB\r\n] 2006.229.15:11:49.85#ibcon#*before write, iclass 12, count 0 2006.229.15:11:49.85#ibcon#enter sib2, iclass 12, count 0 2006.229.15:11:49.85#ibcon#flushed, iclass 12, count 0 2006.229.15:11:49.85#ibcon#about to write, iclass 12, count 0 2006.229.15:11:49.85#ibcon#wrote, iclass 12, count 0 2006.229.15:11:49.85#ibcon#about to read 3, iclass 12, count 0 2006.229.15:11:49.88#ibcon#read 3, iclass 12, count 0 2006.229.15:11:49.88#ibcon#about to read 4, iclass 12, count 0 2006.229.15:11:49.88#ibcon#read 4, iclass 12, count 0 2006.229.15:11:49.88#ibcon#about to read 5, iclass 12, count 0 2006.229.15:11:49.88#ibcon#read 5, iclass 12, count 0 2006.229.15:11:49.88#ibcon#about to read 6, iclass 12, count 0 2006.229.15:11:49.88#ibcon#read 6, iclass 12, count 0 2006.229.15:11:49.88#ibcon#end of sib2, iclass 12, count 0 2006.229.15:11:49.88#ibcon#*after write, iclass 12, count 0 2006.229.15:11:49.88#ibcon#*before return 0, iclass 12, count 0 2006.229.15:11:49.88#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:11:49.88#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:11:49.88#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:11:49.88#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:11:49.88$vck44/vblo=1,629.99 2006.229.15:11:49.88#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:11:49.88#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:11:49.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:49.88#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:49.88#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:49.88#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:49.88#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:11:49.88#ibcon#first serial, iclass 14, count 0 2006.229.15:11:49.88#ibcon#enter sib2, iclass 14, count 0 2006.229.15:11:49.88#ibcon#flushed, iclass 14, count 0 2006.229.15:11:49.88#ibcon#about to write, iclass 14, count 0 2006.229.15:11:49.88#ibcon#wrote, iclass 14, count 0 2006.229.15:11:49.88#ibcon#about to read 3, iclass 14, count 0 2006.229.15:11:49.90#ibcon#read 3, iclass 14, count 0 2006.229.15:11:49.90#ibcon#about to read 4, iclass 14, count 0 2006.229.15:11:49.90#ibcon#read 4, iclass 14, count 0 2006.229.15:11:49.90#ibcon#about to read 5, iclass 14, count 0 2006.229.15:11:49.90#ibcon#read 5, iclass 14, count 0 2006.229.15:11:49.90#ibcon#about to read 6, iclass 14, count 0 2006.229.15:11:49.90#ibcon#read 6, iclass 14, count 0 2006.229.15:11:49.90#ibcon#end of sib2, iclass 14, count 0 2006.229.15:11:49.90#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:11:49.90#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:11:49.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:11:49.90#ibcon#*before write, iclass 14, count 0 2006.229.15:11:49.90#ibcon#enter sib2, iclass 14, count 0 2006.229.15:11:49.90#ibcon#flushed, iclass 14, count 0 2006.229.15:11:49.90#ibcon#about to write, iclass 14, count 0 2006.229.15:11:49.90#ibcon#wrote, iclass 14, count 0 2006.229.15:11:49.90#ibcon#about to read 3, iclass 14, count 0 2006.229.15:11:49.94#ibcon#read 3, iclass 14, count 0 2006.229.15:11:49.94#ibcon#about to read 4, iclass 14, count 0 2006.229.15:11:49.94#ibcon#read 4, iclass 14, count 0 2006.229.15:11:49.94#ibcon#about to read 5, iclass 14, count 0 2006.229.15:11:49.94#ibcon#read 5, iclass 14, count 0 2006.229.15:11:49.94#ibcon#about to read 6, iclass 14, count 0 2006.229.15:11:49.94#ibcon#read 6, iclass 14, count 0 2006.229.15:11:49.94#ibcon#end of sib2, iclass 14, count 0 2006.229.15:11:49.94#ibcon#*after write, iclass 14, count 0 2006.229.15:11:49.94#ibcon#*before return 0, iclass 14, count 0 2006.229.15:11:49.94#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:49.94#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:11:49.94#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:11:49.94#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:11:49.94$vck44/vb=1,4 2006.229.15:11:49.94#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:11:49.94#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:11:49.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:49.94#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:49.94#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:49.94#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:49.94#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:11:49.94#ibcon#first serial, iclass 16, count 2 2006.229.15:11:49.94#ibcon#enter sib2, iclass 16, count 2 2006.229.15:11:49.94#ibcon#flushed, iclass 16, count 2 2006.229.15:11:49.94#ibcon#about to write, iclass 16, count 2 2006.229.15:11:49.94#ibcon#wrote, iclass 16, count 2 2006.229.15:11:49.94#ibcon#about to read 3, iclass 16, count 2 2006.229.15:11:49.96#ibcon#read 3, iclass 16, count 2 2006.229.15:11:49.96#ibcon#about to read 4, iclass 16, count 2 2006.229.15:11:49.96#ibcon#read 4, iclass 16, count 2 2006.229.15:11:49.96#ibcon#about to read 5, iclass 16, count 2 2006.229.15:11:49.96#ibcon#read 5, iclass 16, count 2 2006.229.15:11:49.96#ibcon#about to read 6, iclass 16, count 2 2006.229.15:11:49.96#ibcon#read 6, iclass 16, count 2 2006.229.15:11:49.96#ibcon#end of sib2, iclass 16, count 2 2006.229.15:11:49.96#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:11:49.96#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:11:49.96#ibcon#[27=AT01-04\r\n] 2006.229.15:11:49.96#ibcon#*before write, iclass 16, count 2 2006.229.15:11:49.96#ibcon#enter sib2, iclass 16, count 2 2006.229.15:11:49.96#ibcon#flushed, iclass 16, count 2 2006.229.15:11:49.96#ibcon#about to write, iclass 16, count 2 2006.229.15:11:49.96#ibcon#wrote, iclass 16, count 2 2006.229.15:11:49.96#ibcon#about to read 3, iclass 16, count 2 2006.229.15:11:49.99#ibcon#read 3, iclass 16, count 2 2006.229.15:11:49.99#ibcon#about to read 4, iclass 16, count 2 2006.229.15:11:49.99#ibcon#read 4, iclass 16, count 2 2006.229.15:11:49.99#ibcon#about to read 5, iclass 16, count 2 2006.229.15:11:49.99#ibcon#read 5, iclass 16, count 2 2006.229.15:11:49.99#ibcon#about to read 6, iclass 16, count 2 2006.229.15:11:49.99#ibcon#read 6, iclass 16, count 2 2006.229.15:11:49.99#ibcon#end of sib2, iclass 16, count 2 2006.229.15:11:49.99#ibcon#*after write, iclass 16, count 2 2006.229.15:11:49.99#ibcon#*before return 0, iclass 16, count 2 2006.229.15:11:49.99#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:49.99#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:11:49.99#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:11:49.99#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:49.99#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:50.11#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:50.11#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:50.11#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:11:50.11#ibcon#first serial, iclass 16, count 0 2006.229.15:11:50.11#ibcon#enter sib2, iclass 16, count 0 2006.229.15:11:50.11#ibcon#flushed, iclass 16, count 0 2006.229.15:11:50.11#ibcon#about to write, iclass 16, count 0 2006.229.15:11:50.11#ibcon#wrote, iclass 16, count 0 2006.229.15:11:50.11#ibcon#about to read 3, iclass 16, count 0 2006.229.15:11:50.13#ibcon#read 3, iclass 16, count 0 2006.229.15:11:50.13#ibcon#about to read 4, iclass 16, count 0 2006.229.15:11:50.13#ibcon#read 4, iclass 16, count 0 2006.229.15:11:50.13#ibcon#about to read 5, iclass 16, count 0 2006.229.15:11:50.13#ibcon#read 5, iclass 16, count 0 2006.229.15:11:50.13#ibcon#about to read 6, iclass 16, count 0 2006.229.15:11:50.13#ibcon#read 6, iclass 16, count 0 2006.229.15:11:50.13#ibcon#end of sib2, iclass 16, count 0 2006.229.15:11:50.13#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:11:50.13#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:11:50.13#ibcon#[27=USB\r\n] 2006.229.15:11:50.13#ibcon#*before write, iclass 16, count 0 2006.229.15:11:50.13#ibcon#enter sib2, iclass 16, count 0 2006.229.15:11:50.13#ibcon#flushed, iclass 16, count 0 2006.229.15:11:50.13#ibcon#about to write, iclass 16, count 0 2006.229.15:11:50.13#ibcon#wrote, iclass 16, count 0 2006.229.15:11:50.13#ibcon#about to read 3, iclass 16, count 0 2006.229.15:11:50.16#ibcon#read 3, iclass 16, count 0 2006.229.15:11:50.16#ibcon#about to read 4, iclass 16, count 0 2006.229.15:11:50.16#ibcon#read 4, iclass 16, count 0 2006.229.15:11:50.16#ibcon#about to read 5, iclass 16, count 0 2006.229.15:11:50.16#ibcon#read 5, iclass 16, count 0 2006.229.15:11:50.16#ibcon#about to read 6, iclass 16, count 0 2006.229.15:11:50.16#ibcon#read 6, iclass 16, count 0 2006.229.15:11:50.16#ibcon#end of sib2, iclass 16, count 0 2006.229.15:11:50.16#ibcon#*after write, iclass 16, count 0 2006.229.15:11:50.16#ibcon#*before return 0, iclass 16, count 0 2006.229.15:11:50.16#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:50.16#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:11:50.16#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:11:50.16#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:11:50.16$vck44/vblo=2,634.99 2006.229.15:11:50.16#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:11:50.16#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:11:50.16#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:50.16#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:50.16#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:50.16#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:50.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:11:50.16#ibcon#first serial, iclass 18, count 0 2006.229.15:11:50.16#ibcon#enter sib2, iclass 18, count 0 2006.229.15:11:50.16#ibcon#flushed, iclass 18, count 0 2006.229.15:11:50.16#ibcon#about to write, iclass 18, count 0 2006.229.15:11:50.16#ibcon#wrote, iclass 18, count 0 2006.229.15:11:50.16#ibcon#about to read 3, iclass 18, count 0 2006.229.15:11:50.18#ibcon#read 3, iclass 18, count 0 2006.229.15:11:50.18#ibcon#about to read 4, iclass 18, count 0 2006.229.15:11:50.18#ibcon#read 4, iclass 18, count 0 2006.229.15:11:50.18#ibcon#about to read 5, iclass 18, count 0 2006.229.15:11:50.18#ibcon#read 5, iclass 18, count 0 2006.229.15:11:50.18#ibcon#about to read 6, iclass 18, count 0 2006.229.15:11:50.18#ibcon#read 6, iclass 18, count 0 2006.229.15:11:50.18#ibcon#end of sib2, iclass 18, count 0 2006.229.15:11:50.18#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:11:50.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:11:50.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:11:50.18#ibcon#*before write, iclass 18, count 0 2006.229.15:11:50.18#ibcon#enter sib2, iclass 18, count 0 2006.229.15:11:50.18#ibcon#flushed, iclass 18, count 0 2006.229.15:11:50.18#ibcon#about to write, iclass 18, count 0 2006.229.15:11:50.18#ibcon#wrote, iclass 18, count 0 2006.229.15:11:50.18#ibcon#about to read 3, iclass 18, count 0 2006.229.15:11:50.22#ibcon#read 3, iclass 18, count 0 2006.229.15:11:50.22#ibcon#about to read 4, iclass 18, count 0 2006.229.15:11:50.22#ibcon#read 4, iclass 18, count 0 2006.229.15:11:50.22#ibcon#about to read 5, iclass 18, count 0 2006.229.15:11:50.22#ibcon#read 5, iclass 18, count 0 2006.229.15:11:50.22#ibcon#about to read 6, iclass 18, count 0 2006.229.15:11:50.22#ibcon#read 6, iclass 18, count 0 2006.229.15:11:50.22#ibcon#end of sib2, iclass 18, count 0 2006.229.15:11:50.22#ibcon#*after write, iclass 18, count 0 2006.229.15:11:50.22#ibcon#*before return 0, iclass 18, count 0 2006.229.15:11:50.22#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:50.22#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:11:50.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:11:50.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:11:50.22$vck44/vb=2,4 2006.229.15:11:50.22#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:11:50.22#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:11:50.22#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:50.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:50.28#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:50.28#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:50.28#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:11:50.28#ibcon#first serial, iclass 20, count 2 2006.229.15:11:50.28#ibcon#enter sib2, iclass 20, count 2 2006.229.15:11:50.28#ibcon#flushed, iclass 20, count 2 2006.229.15:11:50.28#ibcon#about to write, iclass 20, count 2 2006.229.15:11:50.28#ibcon#wrote, iclass 20, count 2 2006.229.15:11:50.28#ibcon#about to read 3, iclass 20, count 2 2006.229.15:11:50.30#ibcon#read 3, iclass 20, count 2 2006.229.15:11:50.30#ibcon#about to read 4, iclass 20, count 2 2006.229.15:11:50.30#ibcon#read 4, iclass 20, count 2 2006.229.15:11:50.30#ibcon#about to read 5, iclass 20, count 2 2006.229.15:11:50.30#ibcon#read 5, iclass 20, count 2 2006.229.15:11:50.30#ibcon#about to read 6, iclass 20, count 2 2006.229.15:11:50.30#ibcon#read 6, iclass 20, count 2 2006.229.15:11:50.30#ibcon#end of sib2, iclass 20, count 2 2006.229.15:11:50.30#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:11:50.30#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:11:50.30#ibcon#[27=AT02-04\r\n] 2006.229.15:11:50.30#ibcon#*before write, iclass 20, count 2 2006.229.15:11:50.30#ibcon#enter sib2, iclass 20, count 2 2006.229.15:11:50.30#ibcon#flushed, iclass 20, count 2 2006.229.15:11:50.30#ibcon#about to write, iclass 20, count 2 2006.229.15:11:50.30#ibcon#wrote, iclass 20, count 2 2006.229.15:11:50.30#ibcon#about to read 3, iclass 20, count 2 2006.229.15:11:50.33#ibcon#read 3, iclass 20, count 2 2006.229.15:11:50.33#ibcon#about to read 4, iclass 20, count 2 2006.229.15:11:50.33#ibcon#read 4, iclass 20, count 2 2006.229.15:11:50.33#ibcon#about to read 5, iclass 20, count 2 2006.229.15:11:50.33#ibcon#read 5, iclass 20, count 2 2006.229.15:11:50.33#ibcon#about to read 6, iclass 20, count 2 2006.229.15:11:50.33#ibcon#read 6, iclass 20, count 2 2006.229.15:11:50.33#ibcon#end of sib2, iclass 20, count 2 2006.229.15:11:50.33#ibcon#*after write, iclass 20, count 2 2006.229.15:11:50.33#ibcon#*before return 0, iclass 20, count 2 2006.229.15:11:50.33#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:50.33#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:11:50.33#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:11:50.33#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:50.33#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:50.45#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:50.45#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:50.45#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:11:50.45#ibcon#first serial, iclass 20, count 0 2006.229.15:11:50.45#ibcon#enter sib2, iclass 20, count 0 2006.229.15:11:50.45#ibcon#flushed, iclass 20, count 0 2006.229.15:11:50.45#ibcon#about to write, iclass 20, count 0 2006.229.15:11:50.45#ibcon#wrote, iclass 20, count 0 2006.229.15:11:50.45#ibcon#about to read 3, iclass 20, count 0 2006.229.15:11:50.47#ibcon#read 3, iclass 20, count 0 2006.229.15:11:50.47#ibcon#about to read 4, iclass 20, count 0 2006.229.15:11:50.47#ibcon#read 4, iclass 20, count 0 2006.229.15:11:50.47#ibcon#about to read 5, iclass 20, count 0 2006.229.15:11:50.47#ibcon#read 5, iclass 20, count 0 2006.229.15:11:50.47#ibcon#about to read 6, iclass 20, count 0 2006.229.15:11:50.47#ibcon#read 6, iclass 20, count 0 2006.229.15:11:50.47#ibcon#end of sib2, iclass 20, count 0 2006.229.15:11:50.47#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:11:50.47#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:11:50.47#ibcon#[27=USB\r\n] 2006.229.15:11:50.47#ibcon#*before write, iclass 20, count 0 2006.229.15:11:50.47#ibcon#enter sib2, iclass 20, count 0 2006.229.15:11:50.47#ibcon#flushed, iclass 20, count 0 2006.229.15:11:50.47#ibcon#about to write, iclass 20, count 0 2006.229.15:11:50.47#ibcon#wrote, iclass 20, count 0 2006.229.15:11:50.47#ibcon#about to read 3, iclass 20, count 0 2006.229.15:11:50.50#ibcon#read 3, iclass 20, count 0 2006.229.15:11:50.50#ibcon#about to read 4, iclass 20, count 0 2006.229.15:11:50.50#ibcon#read 4, iclass 20, count 0 2006.229.15:11:50.50#ibcon#about to read 5, iclass 20, count 0 2006.229.15:11:50.50#ibcon#read 5, iclass 20, count 0 2006.229.15:11:50.50#ibcon#about to read 6, iclass 20, count 0 2006.229.15:11:50.50#ibcon#read 6, iclass 20, count 0 2006.229.15:11:50.50#ibcon#end of sib2, iclass 20, count 0 2006.229.15:11:50.50#ibcon#*after write, iclass 20, count 0 2006.229.15:11:50.50#ibcon#*before return 0, iclass 20, count 0 2006.229.15:11:50.50#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:50.50#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:11:50.50#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:11:50.50#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:11:50.50$vck44/vblo=3,649.99 2006.229.15:11:50.50#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:11:50.50#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:11:50.50#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:50.50#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:50.50#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:50.50#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:50.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:11:50.50#ibcon#first serial, iclass 22, count 0 2006.229.15:11:50.50#ibcon#enter sib2, iclass 22, count 0 2006.229.15:11:50.50#ibcon#flushed, iclass 22, count 0 2006.229.15:11:50.50#ibcon#about to write, iclass 22, count 0 2006.229.15:11:50.50#ibcon#wrote, iclass 22, count 0 2006.229.15:11:50.50#ibcon#about to read 3, iclass 22, count 0 2006.229.15:11:50.52#ibcon#read 3, iclass 22, count 0 2006.229.15:11:50.52#ibcon#about to read 4, iclass 22, count 0 2006.229.15:11:50.52#ibcon#read 4, iclass 22, count 0 2006.229.15:11:50.52#ibcon#about to read 5, iclass 22, count 0 2006.229.15:11:50.52#ibcon#read 5, iclass 22, count 0 2006.229.15:11:50.52#ibcon#about to read 6, iclass 22, count 0 2006.229.15:11:50.52#ibcon#read 6, iclass 22, count 0 2006.229.15:11:50.52#ibcon#end of sib2, iclass 22, count 0 2006.229.15:11:50.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:11:50.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:11:50.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:11:50.52#ibcon#*before write, iclass 22, count 0 2006.229.15:11:50.52#ibcon#enter sib2, iclass 22, count 0 2006.229.15:11:50.52#ibcon#flushed, iclass 22, count 0 2006.229.15:11:50.52#ibcon#about to write, iclass 22, count 0 2006.229.15:11:50.52#ibcon#wrote, iclass 22, count 0 2006.229.15:11:50.52#ibcon#about to read 3, iclass 22, count 0 2006.229.15:11:50.56#ibcon#read 3, iclass 22, count 0 2006.229.15:11:50.56#ibcon#about to read 4, iclass 22, count 0 2006.229.15:11:50.56#ibcon#read 4, iclass 22, count 0 2006.229.15:11:50.56#ibcon#about to read 5, iclass 22, count 0 2006.229.15:11:50.56#ibcon#read 5, iclass 22, count 0 2006.229.15:11:50.56#ibcon#about to read 6, iclass 22, count 0 2006.229.15:11:50.56#ibcon#read 6, iclass 22, count 0 2006.229.15:11:50.56#ibcon#end of sib2, iclass 22, count 0 2006.229.15:11:50.56#ibcon#*after write, iclass 22, count 0 2006.229.15:11:50.56#ibcon#*before return 0, iclass 22, count 0 2006.229.15:11:50.56#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:50.56#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:11:50.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:11:50.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:11:50.56$vck44/vb=3,4 2006.229.15:11:50.56#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.15:11:50.56#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.15:11:50.56#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:50.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:50.62#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:50.62#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:50.62#ibcon#enter wrdev, iclass 24, count 2 2006.229.15:11:50.62#ibcon#first serial, iclass 24, count 2 2006.229.15:11:50.62#ibcon#enter sib2, iclass 24, count 2 2006.229.15:11:50.62#ibcon#flushed, iclass 24, count 2 2006.229.15:11:50.62#ibcon#about to write, iclass 24, count 2 2006.229.15:11:50.62#ibcon#wrote, iclass 24, count 2 2006.229.15:11:50.62#ibcon#about to read 3, iclass 24, count 2 2006.229.15:11:50.64#ibcon#read 3, iclass 24, count 2 2006.229.15:11:50.64#ibcon#about to read 4, iclass 24, count 2 2006.229.15:11:50.64#ibcon#read 4, iclass 24, count 2 2006.229.15:11:50.64#ibcon#about to read 5, iclass 24, count 2 2006.229.15:11:50.64#ibcon#read 5, iclass 24, count 2 2006.229.15:11:50.64#ibcon#about to read 6, iclass 24, count 2 2006.229.15:11:50.64#ibcon#read 6, iclass 24, count 2 2006.229.15:11:50.64#ibcon#end of sib2, iclass 24, count 2 2006.229.15:11:50.64#ibcon#*mode == 0, iclass 24, count 2 2006.229.15:11:50.64#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.15:11:50.64#ibcon#[27=AT03-04\r\n] 2006.229.15:11:50.64#ibcon#*before write, iclass 24, count 2 2006.229.15:11:50.64#ibcon#enter sib2, iclass 24, count 2 2006.229.15:11:50.64#ibcon#flushed, iclass 24, count 2 2006.229.15:11:50.64#ibcon#about to write, iclass 24, count 2 2006.229.15:11:50.64#ibcon#wrote, iclass 24, count 2 2006.229.15:11:50.64#ibcon#about to read 3, iclass 24, count 2 2006.229.15:11:50.67#ibcon#read 3, iclass 24, count 2 2006.229.15:11:50.67#ibcon#about to read 4, iclass 24, count 2 2006.229.15:11:50.67#ibcon#read 4, iclass 24, count 2 2006.229.15:11:50.67#ibcon#about to read 5, iclass 24, count 2 2006.229.15:11:50.67#ibcon#read 5, iclass 24, count 2 2006.229.15:11:50.67#ibcon#about to read 6, iclass 24, count 2 2006.229.15:11:50.67#ibcon#read 6, iclass 24, count 2 2006.229.15:11:50.67#ibcon#end of sib2, iclass 24, count 2 2006.229.15:11:50.67#ibcon#*after write, iclass 24, count 2 2006.229.15:11:50.67#ibcon#*before return 0, iclass 24, count 2 2006.229.15:11:50.67#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:50.67#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:11:50.67#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.15:11:50.67#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:50.67#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:50.79#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:50.79#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:50.79#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:11:50.79#ibcon#first serial, iclass 24, count 0 2006.229.15:11:50.79#ibcon#enter sib2, iclass 24, count 0 2006.229.15:11:50.79#ibcon#flushed, iclass 24, count 0 2006.229.15:11:50.79#ibcon#about to write, iclass 24, count 0 2006.229.15:11:50.79#ibcon#wrote, iclass 24, count 0 2006.229.15:11:50.79#ibcon#about to read 3, iclass 24, count 0 2006.229.15:11:50.81#ibcon#read 3, iclass 24, count 0 2006.229.15:11:50.81#ibcon#about to read 4, iclass 24, count 0 2006.229.15:11:50.81#ibcon#read 4, iclass 24, count 0 2006.229.15:11:50.81#ibcon#about to read 5, iclass 24, count 0 2006.229.15:11:50.81#ibcon#read 5, iclass 24, count 0 2006.229.15:11:50.81#ibcon#about to read 6, iclass 24, count 0 2006.229.15:11:50.81#ibcon#read 6, iclass 24, count 0 2006.229.15:11:50.81#ibcon#end of sib2, iclass 24, count 0 2006.229.15:11:50.81#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:11:50.81#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:11:50.81#ibcon#[27=USB\r\n] 2006.229.15:11:50.81#ibcon#*before write, iclass 24, count 0 2006.229.15:11:50.81#ibcon#enter sib2, iclass 24, count 0 2006.229.15:11:50.81#ibcon#flushed, iclass 24, count 0 2006.229.15:11:50.81#ibcon#about to write, iclass 24, count 0 2006.229.15:11:50.81#ibcon#wrote, iclass 24, count 0 2006.229.15:11:50.81#ibcon#about to read 3, iclass 24, count 0 2006.229.15:11:50.84#ibcon#read 3, iclass 24, count 0 2006.229.15:11:50.84#ibcon#about to read 4, iclass 24, count 0 2006.229.15:11:50.84#ibcon#read 4, iclass 24, count 0 2006.229.15:11:50.84#ibcon#about to read 5, iclass 24, count 0 2006.229.15:11:50.84#ibcon#read 5, iclass 24, count 0 2006.229.15:11:50.84#ibcon#about to read 6, iclass 24, count 0 2006.229.15:11:50.84#ibcon#read 6, iclass 24, count 0 2006.229.15:11:50.84#ibcon#end of sib2, iclass 24, count 0 2006.229.15:11:50.84#ibcon#*after write, iclass 24, count 0 2006.229.15:11:50.84#ibcon#*before return 0, iclass 24, count 0 2006.229.15:11:50.84#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:50.84#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:11:50.84#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:11:50.84#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:11:50.84$vck44/vblo=4,679.99 2006.229.15:11:50.84#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:11:50.84#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:11:50.84#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:50.84#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:50.84#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:50.84#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:50.84#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:11:50.84#ibcon#first serial, iclass 26, count 0 2006.229.15:11:50.84#ibcon#enter sib2, iclass 26, count 0 2006.229.15:11:50.84#ibcon#flushed, iclass 26, count 0 2006.229.15:11:50.84#ibcon#about to write, iclass 26, count 0 2006.229.15:11:50.84#ibcon#wrote, iclass 26, count 0 2006.229.15:11:50.84#ibcon#about to read 3, iclass 26, count 0 2006.229.15:11:50.86#ibcon#read 3, iclass 26, count 0 2006.229.15:11:50.86#ibcon#about to read 4, iclass 26, count 0 2006.229.15:11:50.86#ibcon#read 4, iclass 26, count 0 2006.229.15:11:50.86#ibcon#about to read 5, iclass 26, count 0 2006.229.15:11:50.86#ibcon#read 5, iclass 26, count 0 2006.229.15:11:50.86#ibcon#about to read 6, iclass 26, count 0 2006.229.15:11:50.86#ibcon#read 6, iclass 26, count 0 2006.229.15:11:50.86#ibcon#end of sib2, iclass 26, count 0 2006.229.15:11:50.86#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:11:50.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:11:50.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:11:50.86#ibcon#*before write, iclass 26, count 0 2006.229.15:11:50.86#ibcon#enter sib2, iclass 26, count 0 2006.229.15:11:50.86#ibcon#flushed, iclass 26, count 0 2006.229.15:11:50.86#ibcon#about to write, iclass 26, count 0 2006.229.15:11:50.86#ibcon#wrote, iclass 26, count 0 2006.229.15:11:50.86#ibcon#about to read 3, iclass 26, count 0 2006.229.15:11:50.90#ibcon#read 3, iclass 26, count 0 2006.229.15:11:50.90#ibcon#about to read 4, iclass 26, count 0 2006.229.15:11:50.90#ibcon#read 4, iclass 26, count 0 2006.229.15:11:50.90#ibcon#about to read 5, iclass 26, count 0 2006.229.15:11:50.90#ibcon#read 5, iclass 26, count 0 2006.229.15:11:50.90#ibcon#about to read 6, iclass 26, count 0 2006.229.15:11:50.90#ibcon#read 6, iclass 26, count 0 2006.229.15:11:50.90#ibcon#end of sib2, iclass 26, count 0 2006.229.15:11:50.90#ibcon#*after write, iclass 26, count 0 2006.229.15:11:50.90#ibcon#*before return 0, iclass 26, count 0 2006.229.15:11:50.90#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:50.90#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:11:50.90#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:11:50.90#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:11:50.90$vck44/vb=4,4 2006.229.15:11:50.90#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:11:50.90#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:11:50.90#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:50.90#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:50.96#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:50.96#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:50.96#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:11:50.96#ibcon#first serial, iclass 28, count 2 2006.229.15:11:50.96#ibcon#enter sib2, iclass 28, count 2 2006.229.15:11:50.96#ibcon#flushed, iclass 28, count 2 2006.229.15:11:50.96#ibcon#about to write, iclass 28, count 2 2006.229.15:11:50.96#ibcon#wrote, iclass 28, count 2 2006.229.15:11:50.96#ibcon#about to read 3, iclass 28, count 2 2006.229.15:11:50.98#ibcon#read 3, iclass 28, count 2 2006.229.15:11:50.98#ibcon#about to read 4, iclass 28, count 2 2006.229.15:11:50.98#ibcon#read 4, iclass 28, count 2 2006.229.15:11:50.98#ibcon#about to read 5, iclass 28, count 2 2006.229.15:11:50.98#ibcon#read 5, iclass 28, count 2 2006.229.15:11:50.98#ibcon#about to read 6, iclass 28, count 2 2006.229.15:11:50.98#ibcon#read 6, iclass 28, count 2 2006.229.15:11:50.98#ibcon#end of sib2, iclass 28, count 2 2006.229.15:11:50.98#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:11:50.98#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:11:50.98#ibcon#[27=AT04-04\r\n] 2006.229.15:11:50.98#ibcon#*before write, iclass 28, count 2 2006.229.15:11:50.98#ibcon#enter sib2, iclass 28, count 2 2006.229.15:11:50.98#ibcon#flushed, iclass 28, count 2 2006.229.15:11:50.98#ibcon#about to write, iclass 28, count 2 2006.229.15:11:50.98#ibcon#wrote, iclass 28, count 2 2006.229.15:11:50.98#ibcon#about to read 3, iclass 28, count 2 2006.229.15:11:51.01#ibcon#read 3, iclass 28, count 2 2006.229.15:11:51.01#ibcon#about to read 4, iclass 28, count 2 2006.229.15:11:51.01#ibcon#read 4, iclass 28, count 2 2006.229.15:11:51.01#ibcon#about to read 5, iclass 28, count 2 2006.229.15:11:51.01#ibcon#read 5, iclass 28, count 2 2006.229.15:11:51.01#ibcon#about to read 6, iclass 28, count 2 2006.229.15:11:51.01#ibcon#read 6, iclass 28, count 2 2006.229.15:11:51.01#ibcon#end of sib2, iclass 28, count 2 2006.229.15:11:51.01#ibcon#*after write, iclass 28, count 2 2006.229.15:11:51.01#ibcon#*before return 0, iclass 28, count 2 2006.229.15:11:51.01#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:51.01#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:11:51.01#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:11:51.01#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:51.01#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:51.13#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:51.13#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:51.13#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:11:51.13#ibcon#first serial, iclass 28, count 0 2006.229.15:11:51.13#ibcon#enter sib2, iclass 28, count 0 2006.229.15:11:51.13#ibcon#flushed, iclass 28, count 0 2006.229.15:11:51.13#ibcon#about to write, iclass 28, count 0 2006.229.15:11:51.13#ibcon#wrote, iclass 28, count 0 2006.229.15:11:51.13#ibcon#about to read 3, iclass 28, count 0 2006.229.15:11:51.15#ibcon#read 3, iclass 28, count 0 2006.229.15:11:51.15#ibcon#about to read 4, iclass 28, count 0 2006.229.15:11:51.15#ibcon#read 4, iclass 28, count 0 2006.229.15:11:51.15#ibcon#about to read 5, iclass 28, count 0 2006.229.15:11:51.15#ibcon#read 5, iclass 28, count 0 2006.229.15:11:51.15#ibcon#about to read 6, iclass 28, count 0 2006.229.15:11:51.15#ibcon#read 6, iclass 28, count 0 2006.229.15:11:51.15#ibcon#end of sib2, iclass 28, count 0 2006.229.15:11:51.15#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:11:51.15#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:11:51.15#ibcon#[27=USB\r\n] 2006.229.15:11:51.15#ibcon#*before write, iclass 28, count 0 2006.229.15:11:51.15#ibcon#enter sib2, iclass 28, count 0 2006.229.15:11:51.15#ibcon#flushed, iclass 28, count 0 2006.229.15:11:51.15#ibcon#about to write, iclass 28, count 0 2006.229.15:11:51.15#ibcon#wrote, iclass 28, count 0 2006.229.15:11:51.15#ibcon#about to read 3, iclass 28, count 0 2006.229.15:11:51.18#ibcon#read 3, iclass 28, count 0 2006.229.15:11:51.18#ibcon#about to read 4, iclass 28, count 0 2006.229.15:11:51.18#ibcon#read 4, iclass 28, count 0 2006.229.15:11:51.18#ibcon#about to read 5, iclass 28, count 0 2006.229.15:11:51.18#ibcon#read 5, iclass 28, count 0 2006.229.15:11:51.18#ibcon#about to read 6, iclass 28, count 0 2006.229.15:11:51.18#ibcon#read 6, iclass 28, count 0 2006.229.15:11:51.18#ibcon#end of sib2, iclass 28, count 0 2006.229.15:11:51.18#ibcon#*after write, iclass 28, count 0 2006.229.15:11:51.18#ibcon#*before return 0, iclass 28, count 0 2006.229.15:11:51.18#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:51.18#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:11:51.18#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:11:51.18#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:11:51.18$vck44/vblo=5,709.99 2006.229.15:11:51.18#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:11:51.18#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:11:51.18#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:51.18#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:51.18#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:51.18#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:51.18#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:11:51.18#ibcon#first serial, iclass 30, count 0 2006.229.15:11:51.18#ibcon#enter sib2, iclass 30, count 0 2006.229.15:11:51.18#ibcon#flushed, iclass 30, count 0 2006.229.15:11:51.18#ibcon#about to write, iclass 30, count 0 2006.229.15:11:51.18#ibcon#wrote, iclass 30, count 0 2006.229.15:11:51.18#ibcon#about to read 3, iclass 30, count 0 2006.229.15:11:51.20#ibcon#read 3, iclass 30, count 0 2006.229.15:11:51.20#ibcon#about to read 4, iclass 30, count 0 2006.229.15:11:51.20#ibcon#read 4, iclass 30, count 0 2006.229.15:11:51.20#ibcon#about to read 5, iclass 30, count 0 2006.229.15:11:51.20#ibcon#read 5, iclass 30, count 0 2006.229.15:11:51.20#ibcon#about to read 6, iclass 30, count 0 2006.229.15:11:51.20#ibcon#read 6, iclass 30, count 0 2006.229.15:11:51.20#ibcon#end of sib2, iclass 30, count 0 2006.229.15:11:51.20#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:11:51.20#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:11:51.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:11:51.20#ibcon#*before write, iclass 30, count 0 2006.229.15:11:51.20#ibcon#enter sib2, iclass 30, count 0 2006.229.15:11:51.20#ibcon#flushed, iclass 30, count 0 2006.229.15:11:51.20#ibcon#about to write, iclass 30, count 0 2006.229.15:11:51.20#ibcon#wrote, iclass 30, count 0 2006.229.15:11:51.20#ibcon#about to read 3, iclass 30, count 0 2006.229.15:11:51.24#ibcon#read 3, iclass 30, count 0 2006.229.15:11:51.24#ibcon#about to read 4, iclass 30, count 0 2006.229.15:11:51.24#ibcon#read 4, iclass 30, count 0 2006.229.15:11:51.24#ibcon#about to read 5, iclass 30, count 0 2006.229.15:11:51.24#ibcon#read 5, iclass 30, count 0 2006.229.15:11:51.24#ibcon#about to read 6, iclass 30, count 0 2006.229.15:11:51.24#ibcon#read 6, iclass 30, count 0 2006.229.15:11:51.24#ibcon#end of sib2, iclass 30, count 0 2006.229.15:11:51.24#ibcon#*after write, iclass 30, count 0 2006.229.15:11:51.24#ibcon#*before return 0, iclass 30, count 0 2006.229.15:11:51.24#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:51.24#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:11:51.24#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:11:51.24#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:11:51.24$vck44/vb=5,4 2006.229.15:11:51.24#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:11:51.24#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:11:51.24#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:51.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:51.30#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:51.30#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:51.30#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:11:51.30#ibcon#first serial, iclass 32, count 2 2006.229.15:11:51.30#ibcon#enter sib2, iclass 32, count 2 2006.229.15:11:51.30#ibcon#flushed, iclass 32, count 2 2006.229.15:11:51.30#ibcon#about to write, iclass 32, count 2 2006.229.15:11:51.30#ibcon#wrote, iclass 32, count 2 2006.229.15:11:51.30#ibcon#about to read 3, iclass 32, count 2 2006.229.15:11:51.32#ibcon#read 3, iclass 32, count 2 2006.229.15:11:51.32#ibcon#about to read 4, iclass 32, count 2 2006.229.15:11:51.32#ibcon#read 4, iclass 32, count 2 2006.229.15:11:51.32#ibcon#about to read 5, iclass 32, count 2 2006.229.15:11:51.32#ibcon#read 5, iclass 32, count 2 2006.229.15:11:51.32#ibcon#about to read 6, iclass 32, count 2 2006.229.15:11:51.32#ibcon#read 6, iclass 32, count 2 2006.229.15:11:51.32#ibcon#end of sib2, iclass 32, count 2 2006.229.15:11:51.32#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:11:51.32#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:11:51.32#ibcon#[27=AT05-04\r\n] 2006.229.15:11:51.32#ibcon#*before write, iclass 32, count 2 2006.229.15:11:51.32#ibcon#enter sib2, iclass 32, count 2 2006.229.15:11:51.32#ibcon#flushed, iclass 32, count 2 2006.229.15:11:51.32#ibcon#about to write, iclass 32, count 2 2006.229.15:11:51.32#ibcon#wrote, iclass 32, count 2 2006.229.15:11:51.32#ibcon#about to read 3, iclass 32, count 2 2006.229.15:11:51.35#ibcon#read 3, iclass 32, count 2 2006.229.15:11:51.35#ibcon#about to read 4, iclass 32, count 2 2006.229.15:11:51.35#ibcon#read 4, iclass 32, count 2 2006.229.15:11:51.35#ibcon#about to read 5, iclass 32, count 2 2006.229.15:11:51.35#ibcon#read 5, iclass 32, count 2 2006.229.15:11:51.35#ibcon#about to read 6, iclass 32, count 2 2006.229.15:11:51.35#ibcon#read 6, iclass 32, count 2 2006.229.15:11:51.35#ibcon#end of sib2, iclass 32, count 2 2006.229.15:11:51.35#ibcon#*after write, iclass 32, count 2 2006.229.15:11:51.35#ibcon#*before return 0, iclass 32, count 2 2006.229.15:11:51.35#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:51.35#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:11:51.35#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:11:51.35#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:51.35#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:51.47#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:51.47#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:51.47#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:11:51.47#ibcon#first serial, iclass 32, count 0 2006.229.15:11:51.47#ibcon#enter sib2, iclass 32, count 0 2006.229.15:11:51.47#ibcon#flushed, iclass 32, count 0 2006.229.15:11:51.47#ibcon#about to write, iclass 32, count 0 2006.229.15:11:51.47#ibcon#wrote, iclass 32, count 0 2006.229.15:11:51.47#ibcon#about to read 3, iclass 32, count 0 2006.229.15:11:51.49#ibcon#read 3, iclass 32, count 0 2006.229.15:11:51.49#ibcon#about to read 4, iclass 32, count 0 2006.229.15:11:51.49#ibcon#read 4, iclass 32, count 0 2006.229.15:11:51.49#ibcon#about to read 5, iclass 32, count 0 2006.229.15:11:51.49#ibcon#read 5, iclass 32, count 0 2006.229.15:11:51.49#ibcon#about to read 6, iclass 32, count 0 2006.229.15:11:51.49#ibcon#read 6, iclass 32, count 0 2006.229.15:11:51.49#ibcon#end of sib2, iclass 32, count 0 2006.229.15:11:51.49#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:11:51.49#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:11:51.49#ibcon#[27=USB\r\n] 2006.229.15:11:51.49#ibcon#*before write, iclass 32, count 0 2006.229.15:11:51.49#ibcon#enter sib2, iclass 32, count 0 2006.229.15:11:51.49#ibcon#flushed, iclass 32, count 0 2006.229.15:11:51.49#ibcon#about to write, iclass 32, count 0 2006.229.15:11:51.49#ibcon#wrote, iclass 32, count 0 2006.229.15:11:51.49#ibcon#about to read 3, iclass 32, count 0 2006.229.15:11:51.52#ibcon#read 3, iclass 32, count 0 2006.229.15:11:51.52#ibcon#about to read 4, iclass 32, count 0 2006.229.15:11:51.52#ibcon#read 4, iclass 32, count 0 2006.229.15:11:51.52#ibcon#about to read 5, iclass 32, count 0 2006.229.15:11:51.52#ibcon#read 5, iclass 32, count 0 2006.229.15:11:51.52#ibcon#about to read 6, iclass 32, count 0 2006.229.15:11:51.52#ibcon#read 6, iclass 32, count 0 2006.229.15:11:51.52#ibcon#end of sib2, iclass 32, count 0 2006.229.15:11:51.52#ibcon#*after write, iclass 32, count 0 2006.229.15:11:51.52#ibcon#*before return 0, iclass 32, count 0 2006.229.15:11:51.52#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:51.52#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:11:51.52#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:11:51.52#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:11:51.52$vck44/vblo=6,719.99 2006.229.15:11:51.52#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:11:51.52#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:11:51.52#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:51.52#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:11:51.52#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:11:51.52#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:11:51.52#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:11:51.52#ibcon#first serial, iclass 34, count 0 2006.229.15:11:51.52#ibcon#enter sib2, iclass 34, count 0 2006.229.15:11:51.52#ibcon#flushed, iclass 34, count 0 2006.229.15:11:51.52#ibcon#about to write, iclass 34, count 0 2006.229.15:11:51.52#ibcon#wrote, iclass 34, count 0 2006.229.15:11:51.52#ibcon#about to read 3, iclass 34, count 0 2006.229.15:11:51.54#ibcon#read 3, iclass 34, count 0 2006.229.15:11:51.54#ibcon#about to read 4, iclass 34, count 0 2006.229.15:11:51.54#ibcon#read 4, iclass 34, count 0 2006.229.15:11:51.54#ibcon#about to read 5, iclass 34, count 0 2006.229.15:11:51.54#ibcon#read 5, iclass 34, count 0 2006.229.15:11:51.54#ibcon#about to read 6, iclass 34, count 0 2006.229.15:11:51.54#ibcon#read 6, iclass 34, count 0 2006.229.15:11:51.54#ibcon#end of sib2, iclass 34, count 0 2006.229.15:11:51.54#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:11:51.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:11:51.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:11:51.54#ibcon#*before write, iclass 34, count 0 2006.229.15:11:51.54#ibcon#enter sib2, iclass 34, count 0 2006.229.15:11:51.54#ibcon#flushed, iclass 34, count 0 2006.229.15:11:51.54#ibcon#about to write, iclass 34, count 0 2006.229.15:11:51.54#ibcon#wrote, iclass 34, count 0 2006.229.15:11:51.54#ibcon#about to read 3, iclass 34, count 0 2006.229.15:11:51.58#ibcon#read 3, iclass 34, count 0 2006.229.15:11:51.58#ibcon#about to read 4, iclass 34, count 0 2006.229.15:11:51.58#ibcon#read 4, iclass 34, count 0 2006.229.15:11:51.58#ibcon#about to read 5, iclass 34, count 0 2006.229.15:11:51.58#ibcon#read 5, iclass 34, count 0 2006.229.15:11:51.58#ibcon#about to read 6, iclass 34, count 0 2006.229.15:11:51.58#ibcon#read 6, iclass 34, count 0 2006.229.15:11:51.58#ibcon#end of sib2, iclass 34, count 0 2006.229.15:11:51.58#ibcon#*after write, iclass 34, count 0 2006.229.15:11:51.58#ibcon#*before return 0, iclass 34, count 0 2006.229.15:11:51.58#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:11:51.58#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:11:51.58#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:11:51.58#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:11:51.58$vck44/vb=6,4 2006.229.15:11:51.58#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:11:51.58#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:11:51.58#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:51.58#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:11:51.64#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:11:51.64#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:11:51.64#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:11:51.64#ibcon#first serial, iclass 36, count 2 2006.229.15:11:51.64#ibcon#enter sib2, iclass 36, count 2 2006.229.15:11:51.64#ibcon#flushed, iclass 36, count 2 2006.229.15:11:51.64#ibcon#about to write, iclass 36, count 2 2006.229.15:11:51.64#ibcon#wrote, iclass 36, count 2 2006.229.15:11:51.64#ibcon#about to read 3, iclass 36, count 2 2006.229.15:11:51.66#ibcon#read 3, iclass 36, count 2 2006.229.15:11:51.66#ibcon#about to read 4, iclass 36, count 2 2006.229.15:11:51.66#ibcon#read 4, iclass 36, count 2 2006.229.15:11:51.66#ibcon#about to read 5, iclass 36, count 2 2006.229.15:11:51.66#ibcon#read 5, iclass 36, count 2 2006.229.15:11:51.66#ibcon#about to read 6, iclass 36, count 2 2006.229.15:11:51.66#ibcon#read 6, iclass 36, count 2 2006.229.15:11:51.66#ibcon#end of sib2, iclass 36, count 2 2006.229.15:11:51.66#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:11:51.66#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:11:51.66#ibcon#[27=AT06-04\r\n] 2006.229.15:11:51.66#ibcon#*before write, iclass 36, count 2 2006.229.15:11:51.66#ibcon#enter sib2, iclass 36, count 2 2006.229.15:11:51.66#ibcon#flushed, iclass 36, count 2 2006.229.15:11:51.66#ibcon#about to write, iclass 36, count 2 2006.229.15:11:51.66#ibcon#wrote, iclass 36, count 2 2006.229.15:11:51.66#ibcon#about to read 3, iclass 36, count 2 2006.229.15:11:51.69#ibcon#read 3, iclass 36, count 2 2006.229.15:11:51.69#ibcon#about to read 4, iclass 36, count 2 2006.229.15:11:51.69#ibcon#read 4, iclass 36, count 2 2006.229.15:11:51.69#ibcon#about to read 5, iclass 36, count 2 2006.229.15:11:51.69#ibcon#read 5, iclass 36, count 2 2006.229.15:11:51.69#ibcon#about to read 6, iclass 36, count 2 2006.229.15:11:51.69#ibcon#read 6, iclass 36, count 2 2006.229.15:11:51.69#ibcon#end of sib2, iclass 36, count 2 2006.229.15:11:51.69#ibcon#*after write, iclass 36, count 2 2006.229.15:11:51.69#ibcon#*before return 0, iclass 36, count 2 2006.229.15:11:51.69#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:11:51.69#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:11:51.69#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:11:51.69#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:51.69#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:11:51.81#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:11:51.81#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:11:51.81#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:11:51.81#ibcon#first serial, iclass 36, count 0 2006.229.15:11:51.81#ibcon#enter sib2, iclass 36, count 0 2006.229.15:11:51.81#ibcon#flushed, iclass 36, count 0 2006.229.15:11:51.81#ibcon#about to write, iclass 36, count 0 2006.229.15:11:51.81#ibcon#wrote, iclass 36, count 0 2006.229.15:11:51.81#ibcon#about to read 3, iclass 36, count 0 2006.229.15:11:51.83#ibcon#read 3, iclass 36, count 0 2006.229.15:11:51.83#ibcon#about to read 4, iclass 36, count 0 2006.229.15:11:51.83#ibcon#read 4, iclass 36, count 0 2006.229.15:11:51.83#ibcon#about to read 5, iclass 36, count 0 2006.229.15:11:51.83#ibcon#read 5, iclass 36, count 0 2006.229.15:11:51.83#ibcon#about to read 6, iclass 36, count 0 2006.229.15:11:51.83#ibcon#read 6, iclass 36, count 0 2006.229.15:11:51.83#ibcon#end of sib2, iclass 36, count 0 2006.229.15:11:51.83#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:11:51.83#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:11:51.83#ibcon#[27=USB\r\n] 2006.229.15:11:51.83#ibcon#*before write, iclass 36, count 0 2006.229.15:11:51.83#ibcon#enter sib2, iclass 36, count 0 2006.229.15:11:51.83#ibcon#flushed, iclass 36, count 0 2006.229.15:11:51.83#ibcon#about to write, iclass 36, count 0 2006.229.15:11:51.83#ibcon#wrote, iclass 36, count 0 2006.229.15:11:51.83#ibcon#about to read 3, iclass 36, count 0 2006.229.15:11:51.86#ibcon#read 3, iclass 36, count 0 2006.229.15:11:51.86#ibcon#about to read 4, iclass 36, count 0 2006.229.15:11:51.86#ibcon#read 4, iclass 36, count 0 2006.229.15:11:51.86#ibcon#about to read 5, iclass 36, count 0 2006.229.15:11:51.86#ibcon#read 5, iclass 36, count 0 2006.229.15:11:51.86#ibcon#about to read 6, iclass 36, count 0 2006.229.15:11:51.86#ibcon#read 6, iclass 36, count 0 2006.229.15:11:51.86#ibcon#end of sib2, iclass 36, count 0 2006.229.15:11:51.86#ibcon#*after write, iclass 36, count 0 2006.229.15:11:51.86#ibcon#*before return 0, iclass 36, count 0 2006.229.15:11:51.86#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:11:51.86#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:11:51.86#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:11:51.86#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:11:51.86$vck44/vblo=7,734.99 2006.229.15:11:51.86#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:11:51.86#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:11:51.86#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:51.86#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:51.86#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:51.86#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:51.86#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:11:51.86#ibcon#first serial, iclass 38, count 0 2006.229.15:11:51.86#ibcon#enter sib2, iclass 38, count 0 2006.229.15:11:51.86#ibcon#flushed, iclass 38, count 0 2006.229.15:11:51.86#ibcon#about to write, iclass 38, count 0 2006.229.15:11:51.86#ibcon#wrote, iclass 38, count 0 2006.229.15:11:51.86#ibcon#about to read 3, iclass 38, count 0 2006.229.15:11:51.88#ibcon#read 3, iclass 38, count 0 2006.229.15:11:51.88#ibcon#about to read 4, iclass 38, count 0 2006.229.15:11:51.88#ibcon#read 4, iclass 38, count 0 2006.229.15:11:51.88#ibcon#about to read 5, iclass 38, count 0 2006.229.15:11:51.88#ibcon#read 5, iclass 38, count 0 2006.229.15:11:51.88#ibcon#about to read 6, iclass 38, count 0 2006.229.15:11:51.88#ibcon#read 6, iclass 38, count 0 2006.229.15:11:51.88#ibcon#end of sib2, iclass 38, count 0 2006.229.15:11:51.88#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:11:51.88#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:11:51.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:11:51.88#ibcon#*before write, iclass 38, count 0 2006.229.15:11:51.88#ibcon#enter sib2, iclass 38, count 0 2006.229.15:11:51.88#ibcon#flushed, iclass 38, count 0 2006.229.15:11:51.88#ibcon#about to write, iclass 38, count 0 2006.229.15:11:51.88#ibcon#wrote, iclass 38, count 0 2006.229.15:11:51.88#ibcon#about to read 3, iclass 38, count 0 2006.229.15:11:51.92#ibcon#read 3, iclass 38, count 0 2006.229.15:11:51.92#ibcon#about to read 4, iclass 38, count 0 2006.229.15:11:51.92#ibcon#read 4, iclass 38, count 0 2006.229.15:11:51.92#ibcon#about to read 5, iclass 38, count 0 2006.229.15:11:51.92#ibcon#read 5, iclass 38, count 0 2006.229.15:11:51.92#ibcon#about to read 6, iclass 38, count 0 2006.229.15:11:51.92#ibcon#read 6, iclass 38, count 0 2006.229.15:11:51.92#ibcon#end of sib2, iclass 38, count 0 2006.229.15:11:51.92#ibcon#*after write, iclass 38, count 0 2006.229.15:11:51.92#ibcon#*before return 0, iclass 38, count 0 2006.229.15:11:51.92#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:51.92#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:11:51.92#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:11:51.92#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:11:51.92$vck44/vb=7,4 2006.229.15:11:51.92#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:11:51.92#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:11:51.92#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:51.92#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:51.98#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:51.98#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:51.98#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:11:51.98#ibcon#first serial, iclass 40, count 2 2006.229.15:11:51.98#ibcon#enter sib2, iclass 40, count 2 2006.229.15:11:51.98#ibcon#flushed, iclass 40, count 2 2006.229.15:11:51.98#ibcon#about to write, iclass 40, count 2 2006.229.15:11:51.98#ibcon#wrote, iclass 40, count 2 2006.229.15:11:51.98#ibcon#about to read 3, iclass 40, count 2 2006.229.15:11:52.00#ibcon#read 3, iclass 40, count 2 2006.229.15:11:52.00#ibcon#about to read 4, iclass 40, count 2 2006.229.15:11:52.00#ibcon#read 4, iclass 40, count 2 2006.229.15:11:52.00#ibcon#about to read 5, iclass 40, count 2 2006.229.15:11:52.00#ibcon#read 5, iclass 40, count 2 2006.229.15:11:52.00#ibcon#about to read 6, iclass 40, count 2 2006.229.15:11:52.00#ibcon#read 6, iclass 40, count 2 2006.229.15:11:52.00#ibcon#end of sib2, iclass 40, count 2 2006.229.15:11:52.00#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:11:52.00#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:11:52.00#ibcon#[27=AT07-04\r\n] 2006.229.15:11:52.00#ibcon#*before write, iclass 40, count 2 2006.229.15:11:52.00#ibcon#enter sib2, iclass 40, count 2 2006.229.15:11:52.00#ibcon#flushed, iclass 40, count 2 2006.229.15:11:52.00#ibcon#about to write, iclass 40, count 2 2006.229.15:11:52.00#ibcon#wrote, iclass 40, count 2 2006.229.15:11:52.00#ibcon#about to read 3, iclass 40, count 2 2006.229.15:11:52.03#ibcon#read 3, iclass 40, count 2 2006.229.15:11:52.03#ibcon#about to read 4, iclass 40, count 2 2006.229.15:11:52.03#ibcon#read 4, iclass 40, count 2 2006.229.15:11:52.03#ibcon#about to read 5, iclass 40, count 2 2006.229.15:11:52.03#ibcon#read 5, iclass 40, count 2 2006.229.15:11:52.03#ibcon#about to read 6, iclass 40, count 2 2006.229.15:11:52.03#ibcon#read 6, iclass 40, count 2 2006.229.15:11:52.03#ibcon#end of sib2, iclass 40, count 2 2006.229.15:11:52.03#ibcon#*after write, iclass 40, count 2 2006.229.15:11:52.03#ibcon#*before return 0, iclass 40, count 2 2006.229.15:11:52.03#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:52.03#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:11:52.03#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:11:52.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:52.03#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:52.15#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:52.15#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:52.15#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:11:52.15#ibcon#first serial, iclass 40, count 0 2006.229.15:11:52.15#ibcon#enter sib2, iclass 40, count 0 2006.229.15:11:52.15#ibcon#flushed, iclass 40, count 0 2006.229.15:11:52.15#ibcon#about to write, iclass 40, count 0 2006.229.15:11:52.15#ibcon#wrote, iclass 40, count 0 2006.229.15:11:52.15#ibcon#about to read 3, iclass 40, count 0 2006.229.15:11:52.17#ibcon#read 3, iclass 40, count 0 2006.229.15:11:52.17#ibcon#about to read 4, iclass 40, count 0 2006.229.15:11:52.17#ibcon#read 4, iclass 40, count 0 2006.229.15:11:52.17#ibcon#about to read 5, iclass 40, count 0 2006.229.15:11:52.17#ibcon#read 5, iclass 40, count 0 2006.229.15:11:52.17#ibcon#about to read 6, iclass 40, count 0 2006.229.15:11:52.17#ibcon#read 6, iclass 40, count 0 2006.229.15:11:52.17#ibcon#end of sib2, iclass 40, count 0 2006.229.15:11:52.17#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:11:52.17#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:11:52.17#ibcon#[27=USB\r\n] 2006.229.15:11:52.17#ibcon#*before write, iclass 40, count 0 2006.229.15:11:52.17#ibcon#enter sib2, iclass 40, count 0 2006.229.15:11:52.17#ibcon#flushed, iclass 40, count 0 2006.229.15:11:52.17#ibcon#about to write, iclass 40, count 0 2006.229.15:11:52.17#ibcon#wrote, iclass 40, count 0 2006.229.15:11:52.17#ibcon#about to read 3, iclass 40, count 0 2006.229.15:11:52.20#ibcon#read 3, iclass 40, count 0 2006.229.15:11:52.20#ibcon#about to read 4, iclass 40, count 0 2006.229.15:11:52.20#ibcon#read 4, iclass 40, count 0 2006.229.15:11:52.20#ibcon#about to read 5, iclass 40, count 0 2006.229.15:11:52.20#ibcon#read 5, iclass 40, count 0 2006.229.15:11:52.20#ibcon#about to read 6, iclass 40, count 0 2006.229.15:11:52.20#ibcon#read 6, iclass 40, count 0 2006.229.15:11:52.20#ibcon#end of sib2, iclass 40, count 0 2006.229.15:11:52.20#ibcon#*after write, iclass 40, count 0 2006.229.15:11:52.20#ibcon#*before return 0, iclass 40, count 0 2006.229.15:11:52.20#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:52.20#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:11:52.20#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:11:52.20#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:11:52.20$vck44/vblo=8,744.99 2006.229.15:11:52.20#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:11:52.20#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:11:52.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:11:52.20#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:52.20#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:52.20#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:52.20#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:11:52.20#ibcon#first serial, iclass 4, count 0 2006.229.15:11:52.20#ibcon#enter sib2, iclass 4, count 0 2006.229.15:11:52.20#ibcon#flushed, iclass 4, count 0 2006.229.15:11:52.20#ibcon#about to write, iclass 4, count 0 2006.229.15:11:52.20#ibcon#wrote, iclass 4, count 0 2006.229.15:11:52.20#ibcon#about to read 3, iclass 4, count 0 2006.229.15:11:52.22#ibcon#read 3, iclass 4, count 0 2006.229.15:11:52.22#ibcon#about to read 4, iclass 4, count 0 2006.229.15:11:52.22#ibcon#read 4, iclass 4, count 0 2006.229.15:11:52.22#ibcon#about to read 5, iclass 4, count 0 2006.229.15:11:52.22#ibcon#read 5, iclass 4, count 0 2006.229.15:11:52.22#ibcon#about to read 6, iclass 4, count 0 2006.229.15:11:52.22#ibcon#read 6, iclass 4, count 0 2006.229.15:11:52.22#ibcon#end of sib2, iclass 4, count 0 2006.229.15:11:52.22#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:11:52.22#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:11:52.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:11:52.22#ibcon#*before write, iclass 4, count 0 2006.229.15:11:52.22#ibcon#enter sib2, iclass 4, count 0 2006.229.15:11:52.22#ibcon#flushed, iclass 4, count 0 2006.229.15:11:52.22#ibcon#about to write, iclass 4, count 0 2006.229.15:11:52.22#ibcon#wrote, iclass 4, count 0 2006.229.15:11:52.22#ibcon#about to read 3, iclass 4, count 0 2006.229.15:11:52.26#ibcon#read 3, iclass 4, count 0 2006.229.15:11:52.26#ibcon#about to read 4, iclass 4, count 0 2006.229.15:11:52.26#ibcon#read 4, iclass 4, count 0 2006.229.15:11:52.26#ibcon#about to read 5, iclass 4, count 0 2006.229.15:11:52.26#ibcon#read 5, iclass 4, count 0 2006.229.15:11:52.26#ibcon#about to read 6, iclass 4, count 0 2006.229.15:11:52.26#ibcon#read 6, iclass 4, count 0 2006.229.15:11:52.26#ibcon#end of sib2, iclass 4, count 0 2006.229.15:11:52.26#ibcon#*after write, iclass 4, count 0 2006.229.15:11:52.26#ibcon#*before return 0, iclass 4, count 0 2006.229.15:11:52.26#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:52.26#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:11:52.26#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:11:52.26#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:11:52.26$vck44/vb=8,4 2006.229.15:11:52.26#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:11:52.26#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:11:52.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:11:52.26#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:52.32#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:52.32#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:52.32#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:11:52.32#ibcon#first serial, iclass 6, count 2 2006.229.15:11:52.32#ibcon#enter sib2, iclass 6, count 2 2006.229.15:11:52.32#ibcon#flushed, iclass 6, count 2 2006.229.15:11:52.32#ibcon#about to write, iclass 6, count 2 2006.229.15:11:52.32#ibcon#wrote, iclass 6, count 2 2006.229.15:11:52.32#ibcon#about to read 3, iclass 6, count 2 2006.229.15:11:52.34#ibcon#read 3, iclass 6, count 2 2006.229.15:11:52.34#ibcon#about to read 4, iclass 6, count 2 2006.229.15:11:52.34#ibcon#read 4, iclass 6, count 2 2006.229.15:11:52.34#ibcon#about to read 5, iclass 6, count 2 2006.229.15:11:52.34#ibcon#read 5, iclass 6, count 2 2006.229.15:11:52.34#ibcon#about to read 6, iclass 6, count 2 2006.229.15:11:52.34#ibcon#read 6, iclass 6, count 2 2006.229.15:11:52.34#ibcon#end of sib2, iclass 6, count 2 2006.229.15:11:52.34#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:11:52.34#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:11:52.34#ibcon#[27=AT08-04\r\n] 2006.229.15:11:52.34#ibcon#*before write, iclass 6, count 2 2006.229.15:11:52.34#ibcon#enter sib2, iclass 6, count 2 2006.229.15:11:52.34#ibcon#flushed, iclass 6, count 2 2006.229.15:11:52.34#ibcon#about to write, iclass 6, count 2 2006.229.15:11:52.34#ibcon#wrote, iclass 6, count 2 2006.229.15:11:52.34#ibcon#about to read 3, iclass 6, count 2 2006.229.15:11:52.37#ibcon#read 3, iclass 6, count 2 2006.229.15:11:52.37#ibcon#about to read 4, iclass 6, count 2 2006.229.15:11:52.37#ibcon#read 4, iclass 6, count 2 2006.229.15:11:52.37#ibcon#about to read 5, iclass 6, count 2 2006.229.15:11:52.37#ibcon#read 5, iclass 6, count 2 2006.229.15:11:52.37#ibcon#about to read 6, iclass 6, count 2 2006.229.15:11:52.37#ibcon#read 6, iclass 6, count 2 2006.229.15:11:52.37#ibcon#end of sib2, iclass 6, count 2 2006.229.15:11:52.37#ibcon#*after write, iclass 6, count 2 2006.229.15:11:52.37#ibcon#*before return 0, iclass 6, count 2 2006.229.15:11:52.37#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:52.37#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:11:52.37#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:11:52.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:11:52.37#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:52.49#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:52.49#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:52.49#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:11:52.49#ibcon#first serial, iclass 6, count 0 2006.229.15:11:52.49#ibcon#enter sib2, iclass 6, count 0 2006.229.15:11:52.49#ibcon#flushed, iclass 6, count 0 2006.229.15:11:52.49#ibcon#about to write, iclass 6, count 0 2006.229.15:11:52.49#ibcon#wrote, iclass 6, count 0 2006.229.15:11:52.49#ibcon#about to read 3, iclass 6, count 0 2006.229.15:11:52.51#ibcon#read 3, iclass 6, count 0 2006.229.15:11:52.51#ibcon#about to read 4, iclass 6, count 0 2006.229.15:11:52.51#ibcon#read 4, iclass 6, count 0 2006.229.15:11:52.51#ibcon#about to read 5, iclass 6, count 0 2006.229.15:11:52.51#ibcon#read 5, iclass 6, count 0 2006.229.15:11:52.51#ibcon#about to read 6, iclass 6, count 0 2006.229.15:11:52.51#ibcon#read 6, iclass 6, count 0 2006.229.15:11:52.51#ibcon#end of sib2, iclass 6, count 0 2006.229.15:11:52.51#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:11:52.51#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:11:52.51#ibcon#[27=USB\r\n] 2006.229.15:11:52.51#ibcon#*before write, iclass 6, count 0 2006.229.15:11:52.51#ibcon#enter sib2, iclass 6, count 0 2006.229.15:11:52.51#ibcon#flushed, iclass 6, count 0 2006.229.15:11:52.51#ibcon#about to write, iclass 6, count 0 2006.229.15:11:52.51#ibcon#wrote, iclass 6, count 0 2006.229.15:11:52.51#ibcon#about to read 3, iclass 6, count 0 2006.229.15:11:52.54#ibcon#read 3, iclass 6, count 0 2006.229.15:11:52.54#ibcon#about to read 4, iclass 6, count 0 2006.229.15:11:52.54#ibcon#read 4, iclass 6, count 0 2006.229.15:11:52.54#ibcon#about to read 5, iclass 6, count 0 2006.229.15:11:52.54#ibcon#read 5, iclass 6, count 0 2006.229.15:11:52.54#ibcon#about to read 6, iclass 6, count 0 2006.229.15:11:52.54#ibcon#read 6, iclass 6, count 0 2006.229.15:11:52.54#ibcon#end of sib2, iclass 6, count 0 2006.229.15:11:52.54#ibcon#*after write, iclass 6, count 0 2006.229.15:11:52.54#ibcon#*before return 0, iclass 6, count 0 2006.229.15:11:52.54#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:52.54#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:11:52.54#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:11:52.54#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:11:52.54$vck44/vabw=wide 2006.229.15:11:52.54#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:11:52.54#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:11:52.54#ibcon#ireg 8 cls_cnt 0 2006.229.15:11:52.54#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:52.54#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:52.54#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:52.54#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:11:52.54#ibcon#first serial, iclass 10, count 0 2006.229.15:11:52.54#ibcon#enter sib2, iclass 10, count 0 2006.229.15:11:52.54#ibcon#flushed, iclass 10, count 0 2006.229.15:11:52.54#ibcon#about to write, iclass 10, count 0 2006.229.15:11:52.54#ibcon#wrote, iclass 10, count 0 2006.229.15:11:52.54#ibcon#about to read 3, iclass 10, count 0 2006.229.15:11:52.56#ibcon#read 3, iclass 10, count 0 2006.229.15:11:52.56#ibcon#about to read 4, iclass 10, count 0 2006.229.15:11:52.56#ibcon#read 4, iclass 10, count 0 2006.229.15:11:52.56#ibcon#about to read 5, iclass 10, count 0 2006.229.15:11:52.56#ibcon#read 5, iclass 10, count 0 2006.229.15:11:52.56#ibcon#about to read 6, iclass 10, count 0 2006.229.15:11:52.56#ibcon#read 6, iclass 10, count 0 2006.229.15:11:52.56#ibcon#end of sib2, iclass 10, count 0 2006.229.15:11:52.56#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:11:52.56#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:11:52.56#ibcon#[25=BW32\r\n] 2006.229.15:11:52.56#ibcon#*before write, iclass 10, count 0 2006.229.15:11:52.56#ibcon#enter sib2, iclass 10, count 0 2006.229.15:11:52.56#ibcon#flushed, iclass 10, count 0 2006.229.15:11:52.56#ibcon#about to write, iclass 10, count 0 2006.229.15:11:52.56#ibcon#wrote, iclass 10, count 0 2006.229.15:11:52.56#ibcon#about to read 3, iclass 10, count 0 2006.229.15:11:52.59#ibcon#read 3, iclass 10, count 0 2006.229.15:11:52.59#ibcon#about to read 4, iclass 10, count 0 2006.229.15:11:52.59#ibcon#read 4, iclass 10, count 0 2006.229.15:11:52.59#ibcon#about to read 5, iclass 10, count 0 2006.229.15:11:52.59#ibcon#read 5, iclass 10, count 0 2006.229.15:11:52.59#ibcon#about to read 6, iclass 10, count 0 2006.229.15:11:52.59#ibcon#read 6, iclass 10, count 0 2006.229.15:11:52.59#ibcon#end of sib2, iclass 10, count 0 2006.229.15:11:52.59#ibcon#*after write, iclass 10, count 0 2006.229.15:11:52.59#ibcon#*before return 0, iclass 10, count 0 2006.229.15:11:52.59#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:52.59#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:11:52.59#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:11:52.59#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:11:52.59$vck44/vbbw=wide 2006.229.15:11:52.59#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:11:52.59#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:11:52.59#ibcon#ireg 8 cls_cnt 0 2006.229.15:11:52.59#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:11:52.66#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:11:52.66#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:11:52.66#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:11:52.66#ibcon#first serial, iclass 12, count 0 2006.229.15:11:52.66#ibcon#enter sib2, iclass 12, count 0 2006.229.15:11:52.66#ibcon#flushed, iclass 12, count 0 2006.229.15:11:52.66#ibcon#about to write, iclass 12, count 0 2006.229.15:11:52.66#ibcon#wrote, iclass 12, count 0 2006.229.15:11:52.66#ibcon#about to read 3, iclass 12, count 0 2006.229.15:11:52.68#ibcon#read 3, iclass 12, count 0 2006.229.15:11:52.68#ibcon#about to read 4, iclass 12, count 0 2006.229.15:11:52.68#ibcon#read 4, iclass 12, count 0 2006.229.15:11:52.68#ibcon#about to read 5, iclass 12, count 0 2006.229.15:11:52.68#ibcon#read 5, iclass 12, count 0 2006.229.15:11:52.68#ibcon#about to read 6, iclass 12, count 0 2006.229.15:11:52.68#ibcon#read 6, iclass 12, count 0 2006.229.15:11:52.68#ibcon#end of sib2, iclass 12, count 0 2006.229.15:11:52.68#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:11:52.68#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:11:52.68#ibcon#[27=BW32\r\n] 2006.229.15:11:52.68#ibcon#*before write, iclass 12, count 0 2006.229.15:11:52.68#ibcon#enter sib2, iclass 12, count 0 2006.229.15:11:52.68#ibcon#flushed, iclass 12, count 0 2006.229.15:11:52.68#ibcon#about to write, iclass 12, count 0 2006.229.15:11:52.68#ibcon#wrote, iclass 12, count 0 2006.229.15:11:52.68#ibcon#about to read 3, iclass 12, count 0 2006.229.15:11:52.71#ibcon#read 3, iclass 12, count 0 2006.229.15:11:52.71#ibcon#about to read 4, iclass 12, count 0 2006.229.15:11:52.71#ibcon#read 4, iclass 12, count 0 2006.229.15:11:52.71#ibcon#about to read 5, iclass 12, count 0 2006.229.15:11:52.71#ibcon#read 5, iclass 12, count 0 2006.229.15:11:52.71#ibcon#about to read 6, iclass 12, count 0 2006.229.15:11:52.71#ibcon#read 6, iclass 12, count 0 2006.229.15:11:52.71#ibcon#end of sib2, iclass 12, count 0 2006.229.15:11:52.71#ibcon#*after write, iclass 12, count 0 2006.229.15:11:52.71#ibcon#*before return 0, iclass 12, count 0 2006.229.15:11:52.71#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:11:52.71#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:11:52.71#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:11:52.71#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:11:52.71$setupk4/ifdk4 2006.229.15:11:52.71$ifdk4/lo= 2006.229.15:11:52.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:11:52.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:11:52.71$ifdk4/patch= 2006.229.15:11:52.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:11:52.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:11:52.71$setupk4/!*+20s 2006.229.15:11:58.89#abcon#<5=/07 1.3 2.4 27.411001001.9\r\n> 2006.229.15:11:58.91#abcon#{5=INTERFACE CLEAR} 2006.229.15:11:58.97#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:12:07.21$setupk4/"tpicd 2006.229.15:12:07.21$setupk4/echo=off 2006.229.15:12:07.21$setupk4/xlog=off 2006.229.15:12:07.21:!2006.229.15:14:27 2006.229.15:12:39.14#trakl#Source acquired 2006.229.15:12:40.14#flagr#flagr/antenna,acquired 2006.229.15:14:27.00:preob 2006.229.15:14:27.14/onsource/TRACKING 2006.229.15:14:27.14:!2006.229.15:14:37 2006.229.15:14:37.00:"tape 2006.229.15:14:37.00:"st=record 2006.229.15:14:37.00:data_valid=on 2006.229.15:14:37.00:midob 2006.229.15:14:37.14/onsource/TRACKING 2006.229.15:14:37.14/wx/27.40,1001.9,100 2006.229.15:14:37.35/cable/+6.4128E-03 2006.229.15:14:38.44/va/01,08,usb,yes,39,42 2006.229.15:14:38.44/va/02,07,usb,yes,42,43 2006.229.15:14:38.44/va/03,06,usb,yes,52,55 2006.229.15:14:38.44/va/04,07,usb,yes,44,46 2006.229.15:14:38.44/va/05,04,usb,yes,39,40 2006.229.15:14:38.44/va/06,04,usb,yes,44,43 2006.229.15:14:38.44/va/07,05,usb,yes,39,39 2006.229.15:14:38.44/va/08,06,usb,yes,28,35 2006.229.15:14:38.67/valo/01,524.99,yes,locked 2006.229.15:14:38.67/valo/02,534.99,yes,locked 2006.229.15:14:38.67/valo/03,564.99,yes,locked 2006.229.15:14:38.67/valo/04,624.99,yes,locked 2006.229.15:14:38.67/valo/05,734.99,yes,locked 2006.229.15:14:38.67/valo/06,814.99,yes,locked 2006.229.15:14:38.67/valo/07,864.99,yes,locked 2006.229.15:14:38.67/valo/08,884.99,yes,locked 2006.229.15:14:39.76/vb/01,04,usb,yes,36,33 2006.229.15:14:39.76/vb/02,04,usb,yes,39,38 2006.229.15:14:39.76/vb/03,04,usb,yes,35,39 2006.229.15:14:39.76/vb/04,04,usb,yes,40,39 2006.229.15:14:39.76/vb/05,04,usb,yes,32,35 2006.229.15:14:39.76/vb/06,04,usb,yes,37,33 2006.229.15:14:39.76/vb/07,04,usb,yes,37,37 2006.229.15:14:39.76/vb/08,04,usb,yes,34,38 2006.229.15:14:39.99/vblo/01,629.99,yes,locked 2006.229.15:14:39.99/vblo/02,634.99,yes,locked 2006.229.15:14:39.99/vblo/03,649.99,yes,locked 2006.229.15:14:39.99/vblo/04,679.99,yes,locked 2006.229.15:14:39.99/vblo/05,709.99,yes,locked 2006.229.15:14:39.99/vblo/06,719.99,yes,locked 2006.229.15:14:39.99/vblo/07,734.99,yes,locked 2006.229.15:14:39.99/vblo/08,744.99,yes,locked 2006.229.15:14:40.14/vabw/8 2006.229.15:14:40.29/vbbw/8 2006.229.15:14:40.38/xfe/off,on,12.2 2006.229.15:14:40.75/ifatt/23,28,28,28 2006.229.15:14:41.08/fmout-gps/S +4.53E-07 2006.229.15:14:41.12:!2006.229.15:16:27 2006.229.15:16:27.00:data_valid=off 2006.229.15:16:27.00:"et 2006.229.15:16:27.00:!+3s 2006.229.15:16:30.01:"tape 2006.229.15:16:30.01:postob 2006.229.15:16:30.11/cable/+6.4136E-03 2006.229.15:16:30.11/wx/27.39,1001.8,100 2006.229.15:16:31.08/fmout-gps/S +4.52E-07 2006.229.15:16:31.08:scan_name=229-1517,jd0608,140 2006.229.15:16:31.08:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.15:16:32.13#flagr#flagr/antenna,new-source 2006.229.15:16:32.13:checkk5 2006.229.15:16:32.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:16:32.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:16:33.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:16:33.68/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:16:34.07/chk_obsdata//k5ts1/T2291514??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.15:16:34.47/chk_obsdata//k5ts2/T2291514??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.15:16:34.88/chk_obsdata//k5ts3/T2291514??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.15:16:35.30/chk_obsdata//k5ts4/T2291514??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.15:16:36.01/k5log//k5ts1_log_newline 2006.229.15:16:36.73/k5log//k5ts2_log_newline 2006.229.15:16:37.43/k5log//k5ts3_log_newline 2006.229.15:16:38.14/k5log//k5ts4_log_newline 2006.229.15:16:38.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:16:38.16:setupk4=1 2006.229.15:16:38.16$setupk4/echo=on 2006.229.15:16:38.16$setupk4/pcalon 2006.229.15:16:38.16$pcalon/"no phase cal control is implemented here 2006.229.15:16:38.16$setupk4/"tpicd=stop 2006.229.15:16:38.16$setupk4/"rec=synch_on 2006.229.15:16:38.16$setupk4/"rec_mode=128 2006.229.15:16:38.16$setupk4/!* 2006.229.15:16:38.16$setupk4/recpk4 2006.229.15:16:38.16$recpk4/recpatch= 2006.229.15:16:38.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:16:38.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:16:38.17$setupk4/vck44 2006.229.15:16:38.17$vck44/valo=1,524.99 2006.229.15:16:38.17#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.15:16:38.17#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.15:16:38.17#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:38.17#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:38.17#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:38.17#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:38.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:16:38.17#ibcon#first serial, iclass 21, count 0 2006.229.15:16:38.17#ibcon#enter sib2, iclass 21, count 0 2006.229.15:16:38.17#ibcon#flushed, iclass 21, count 0 2006.229.15:16:38.17#ibcon#about to write, iclass 21, count 0 2006.229.15:16:38.17#ibcon#wrote, iclass 21, count 0 2006.229.15:16:38.17#ibcon#about to read 3, iclass 21, count 0 2006.229.15:16:38.19#ibcon#read 3, iclass 21, count 0 2006.229.15:16:38.19#ibcon#about to read 4, iclass 21, count 0 2006.229.15:16:38.19#ibcon#read 4, iclass 21, count 0 2006.229.15:16:38.19#ibcon#about to read 5, iclass 21, count 0 2006.229.15:16:38.19#ibcon#read 5, iclass 21, count 0 2006.229.15:16:38.19#ibcon#about to read 6, iclass 21, count 0 2006.229.15:16:38.19#ibcon#read 6, iclass 21, count 0 2006.229.15:16:38.19#ibcon#end of sib2, iclass 21, count 0 2006.229.15:16:38.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:16:38.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:16:38.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:16:38.19#ibcon#*before write, iclass 21, count 0 2006.229.15:16:38.19#ibcon#enter sib2, iclass 21, count 0 2006.229.15:16:38.19#ibcon#flushed, iclass 21, count 0 2006.229.15:16:38.19#ibcon#about to write, iclass 21, count 0 2006.229.15:16:38.19#ibcon#wrote, iclass 21, count 0 2006.229.15:16:38.19#ibcon#about to read 3, iclass 21, count 0 2006.229.15:16:38.24#ibcon#read 3, iclass 21, count 0 2006.229.15:16:38.24#ibcon#about to read 4, iclass 21, count 0 2006.229.15:16:38.24#ibcon#read 4, iclass 21, count 0 2006.229.15:16:38.24#ibcon#about to read 5, iclass 21, count 0 2006.229.15:16:38.24#ibcon#read 5, iclass 21, count 0 2006.229.15:16:38.24#ibcon#about to read 6, iclass 21, count 0 2006.229.15:16:38.24#ibcon#read 6, iclass 21, count 0 2006.229.15:16:38.24#ibcon#end of sib2, iclass 21, count 0 2006.229.15:16:38.24#ibcon#*after write, iclass 21, count 0 2006.229.15:16:38.24#ibcon#*before return 0, iclass 21, count 0 2006.229.15:16:38.24#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:38.24#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:38.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:16:38.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:16:38.24$vck44/va=1,8 2006.229.15:16:38.24#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.15:16:38.24#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.15:16:38.24#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:38.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:38.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:38.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:38.24#ibcon#enter wrdev, iclass 23, count 2 2006.229.15:16:38.24#ibcon#first serial, iclass 23, count 2 2006.229.15:16:38.24#ibcon#enter sib2, iclass 23, count 2 2006.229.15:16:38.24#ibcon#flushed, iclass 23, count 2 2006.229.15:16:38.24#ibcon#about to write, iclass 23, count 2 2006.229.15:16:38.24#ibcon#wrote, iclass 23, count 2 2006.229.15:16:38.24#ibcon#about to read 3, iclass 23, count 2 2006.229.15:16:38.26#ibcon#read 3, iclass 23, count 2 2006.229.15:16:38.26#ibcon#about to read 4, iclass 23, count 2 2006.229.15:16:38.26#ibcon#read 4, iclass 23, count 2 2006.229.15:16:38.26#ibcon#about to read 5, iclass 23, count 2 2006.229.15:16:38.26#ibcon#read 5, iclass 23, count 2 2006.229.15:16:38.26#ibcon#about to read 6, iclass 23, count 2 2006.229.15:16:38.26#ibcon#read 6, iclass 23, count 2 2006.229.15:16:38.26#ibcon#end of sib2, iclass 23, count 2 2006.229.15:16:38.26#ibcon#*mode == 0, iclass 23, count 2 2006.229.15:16:38.26#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.15:16:38.26#ibcon#[25=AT01-08\r\n] 2006.229.15:16:38.26#ibcon#*before write, iclass 23, count 2 2006.229.15:16:38.26#ibcon#enter sib2, iclass 23, count 2 2006.229.15:16:38.26#ibcon#flushed, iclass 23, count 2 2006.229.15:16:38.26#ibcon#about to write, iclass 23, count 2 2006.229.15:16:38.26#ibcon#wrote, iclass 23, count 2 2006.229.15:16:38.26#ibcon#about to read 3, iclass 23, count 2 2006.229.15:16:38.29#ibcon#read 3, iclass 23, count 2 2006.229.15:16:38.29#ibcon#about to read 4, iclass 23, count 2 2006.229.15:16:38.29#ibcon#read 4, iclass 23, count 2 2006.229.15:16:38.29#ibcon#about to read 5, iclass 23, count 2 2006.229.15:16:38.29#ibcon#read 5, iclass 23, count 2 2006.229.15:16:38.29#ibcon#about to read 6, iclass 23, count 2 2006.229.15:16:38.29#ibcon#read 6, iclass 23, count 2 2006.229.15:16:38.29#ibcon#end of sib2, iclass 23, count 2 2006.229.15:16:38.29#ibcon#*after write, iclass 23, count 2 2006.229.15:16:38.29#ibcon#*before return 0, iclass 23, count 2 2006.229.15:16:38.29#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:38.29#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:38.29#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.15:16:38.29#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:38.29#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:38.41#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:38.41#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:38.41#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:16:38.41#ibcon#first serial, iclass 23, count 0 2006.229.15:16:38.41#ibcon#enter sib2, iclass 23, count 0 2006.229.15:16:38.41#ibcon#flushed, iclass 23, count 0 2006.229.15:16:38.41#ibcon#about to write, iclass 23, count 0 2006.229.15:16:38.41#ibcon#wrote, iclass 23, count 0 2006.229.15:16:38.41#ibcon#about to read 3, iclass 23, count 0 2006.229.15:16:38.43#ibcon#read 3, iclass 23, count 0 2006.229.15:16:38.43#ibcon#about to read 4, iclass 23, count 0 2006.229.15:16:38.43#ibcon#read 4, iclass 23, count 0 2006.229.15:16:38.43#ibcon#about to read 5, iclass 23, count 0 2006.229.15:16:38.43#ibcon#read 5, iclass 23, count 0 2006.229.15:16:38.43#ibcon#about to read 6, iclass 23, count 0 2006.229.15:16:38.43#ibcon#read 6, iclass 23, count 0 2006.229.15:16:38.43#ibcon#end of sib2, iclass 23, count 0 2006.229.15:16:38.43#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:16:38.43#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:16:38.43#ibcon#[25=USB\r\n] 2006.229.15:16:38.43#ibcon#*before write, iclass 23, count 0 2006.229.15:16:38.43#ibcon#enter sib2, iclass 23, count 0 2006.229.15:16:38.43#ibcon#flushed, iclass 23, count 0 2006.229.15:16:38.43#ibcon#about to write, iclass 23, count 0 2006.229.15:16:38.43#ibcon#wrote, iclass 23, count 0 2006.229.15:16:38.43#ibcon#about to read 3, iclass 23, count 0 2006.229.15:16:38.46#ibcon#read 3, iclass 23, count 0 2006.229.15:16:38.46#ibcon#about to read 4, iclass 23, count 0 2006.229.15:16:38.46#ibcon#read 4, iclass 23, count 0 2006.229.15:16:38.46#ibcon#about to read 5, iclass 23, count 0 2006.229.15:16:38.46#ibcon#read 5, iclass 23, count 0 2006.229.15:16:38.46#ibcon#about to read 6, iclass 23, count 0 2006.229.15:16:38.46#ibcon#read 6, iclass 23, count 0 2006.229.15:16:38.46#ibcon#end of sib2, iclass 23, count 0 2006.229.15:16:38.46#ibcon#*after write, iclass 23, count 0 2006.229.15:16:38.46#ibcon#*before return 0, iclass 23, count 0 2006.229.15:16:38.46#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:38.46#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:38.46#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:16:38.46#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:16:38.46$vck44/valo=2,534.99 2006.229.15:16:38.46#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:16:38.46#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:16:38.46#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:38.46#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:38.46#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:38.46#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:38.46#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:16:38.46#ibcon#first serial, iclass 25, count 0 2006.229.15:16:38.46#ibcon#enter sib2, iclass 25, count 0 2006.229.15:16:38.46#ibcon#flushed, iclass 25, count 0 2006.229.15:16:38.46#ibcon#about to write, iclass 25, count 0 2006.229.15:16:38.46#ibcon#wrote, iclass 25, count 0 2006.229.15:16:38.46#ibcon#about to read 3, iclass 25, count 0 2006.229.15:16:38.48#ibcon#read 3, iclass 25, count 0 2006.229.15:16:38.48#ibcon#about to read 4, iclass 25, count 0 2006.229.15:16:38.48#ibcon#read 4, iclass 25, count 0 2006.229.15:16:38.48#ibcon#about to read 5, iclass 25, count 0 2006.229.15:16:38.48#ibcon#read 5, iclass 25, count 0 2006.229.15:16:38.48#ibcon#about to read 6, iclass 25, count 0 2006.229.15:16:38.48#ibcon#read 6, iclass 25, count 0 2006.229.15:16:38.48#ibcon#end of sib2, iclass 25, count 0 2006.229.15:16:38.48#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:16:38.48#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:16:38.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:16:38.48#ibcon#*before write, iclass 25, count 0 2006.229.15:16:38.48#ibcon#enter sib2, iclass 25, count 0 2006.229.15:16:38.48#ibcon#flushed, iclass 25, count 0 2006.229.15:16:38.48#ibcon#about to write, iclass 25, count 0 2006.229.15:16:38.48#ibcon#wrote, iclass 25, count 0 2006.229.15:16:38.48#ibcon#about to read 3, iclass 25, count 0 2006.229.15:16:38.52#ibcon#read 3, iclass 25, count 0 2006.229.15:16:38.52#ibcon#about to read 4, iclass 25, count 0 2006.229.15:16:38.52#ibcon#read 4, iclass 25, count 0 2006.229.15:16:38.52#ibcon#about to read 5, iclass 25, count 0 2006.229.15:16:38.52#ibcon#read 5, iclass 25, count 0 2006.229.15:16:38.52#ibcon#about to read 6, iclass 25, count 0 2006.229.15:16:38.52#ibcon#read 6, iclass 25, count 0 2006.229.15:16:38.52#ibcon#end of sib2, iclass 25, count 0 2006.229.15:16:38.52#ibcon#*after write, iclass 25, count 0 2006.229.15:16:38.52#ibcon#*before return 0, iclass 25, count 0 2006.229.15:16:38.52#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:38.52#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:38.52#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:16:38.52#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:16:38.52$vck44/va=2,7 2006.229.15:16:38.52#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.15:16:38.52#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.15:16:38.52#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:38.52#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:38.58#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:38.58#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:38.58#ibcon#enter wrdev, iclass 27, count 2 2006.229.15:16:38.58#ibcon#first serial, iclass 27, count 2 2006.229.15:16:38.58#ibcon#enter sib2, iclass 27, count 2 2006.229.15:16:38.58#ibcon#flushed, iclass 27, count 2 2006.229.15:16:38.58#ibcon#about to write, iclass 27, count 2 2006.229.15:16:38.58#ibcon#wrote, iclass 27, count 2 2006.229.15:16:38.58#ibcon#about to read 3, iclass 27, count 2 2006.229.15:16:38.60#ibcon#read 3, iclass 27, count 2 2006.229.15:16:38.60#ibcon#about to read 4, iclass 27, count 2 2006.229.15:16:38.60#ibcon#read 4, iclass 27, count 2 2006.229.15:16:38.60#ibcon#about to read 5, iclass 27, count 2 2006.229.15:16:38.60#ibcon#read 5, iclass 27, count 2 2006.229.15:16:38.60#ibcon#about to read 6, iclass 27, count 2 2006.229.15:16:38.60#ibcon#read 6, iclass 27, count 2 2006.229.15:16:38.60#ibcon#end of sib2, iclass 27, count 2 2006.229.15:16:38.60#ibcon#*mode == 0, iclass 27, count 2 2006.229.15:16:38.60#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.15:16:38.60#ibcon#[25=AT02-07\r\n] 2006.229.15:16:38.60#ibcon#*before write, iclass 27, count 2 2006.229.15:16:38.60#ibcon#enter sib2, iclass 27, count 2 2006.229.15:16:38.60#ibcon#flushed, iclass 27, count 2 2006.229.15:16:38.60#ibcon#about to write, iclass 27, count 2 2006.229.15:16:38.60#ibcon#wrote, iclass 27, count 2 2006.229.15:16:38.60#ibcon#about to read 3, iclass 27, count 2 2006.229.15:16:38.63#ibcon#read 3, iclass 27, count 2 2006.229.15:16:38.63#ibcon#about to read 4, iclass 27, count 2 2006.229.15:16:38.63#ibcon#read 4, iclass 27, count 2 2006.229.15:16:38.63#ibcon#about to read 5, iclass 27, count 2 2006.229.15:16:38.63#ibcon#read 5, iclass 27, count 2 2006.229.15:16:38.63#ibcon#about to read 6, iclass 27, count 2 2006.229.15:16:38.63#ibcon#read 6, iclass 27, count 2 2006.229.15:16:38.63#ibcon#end of sib2, iclass 27, count 2 2006.229.15:16:38.63#ibcon#*after write, iclass 27, count 2 2006.229.15:16:38.63#ibcon#*before return 0, iclass 27, count 2 2006.229.15:16:38.63#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:38.63#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:38.63#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.15:16:38.63#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:38.63#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:38.75#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:38.75#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:38.75#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:16:38.75#ibcon#first serial, iclass 27, count 0 2006.229.15:16:38.75#ibcon#enter sib2, iclass 27, count 0 2006.229.15:16:38.75#ibcon#flushed, iclass 27, count 0 2006.229.15:16:38.75#ibcon#about to write, iclass 27, count 0 2006.229.15:16:38.75#ibcon#wrote, iclass 27, count 0 2006.229.15:16:38.75#ibcon#about to read 3, iclass 27, count 0 2006.229.15:16:38.77#ibcon#read 3, iclass 27, count 0 2006.229.15:16:38.77#ibcon#about to read 4, iclass 27, count 0 2006.229.15:16:38.77#ibcon#read 4, iclass 27, count 0 2006.229.15:16:38.77#ibcon#about to read 5, iclass 27, count 0 2006.229.15:16:38.77#ibcon#read 5, iclass 27, count 0 2006.229.15:16:38.77#ibcon#about to read 6, iclass 27, count 0 2006.229.15:16:38.77#ibcon#read 6, iclass 27, count 0 2006.229.15:16:38.77#ibcon#end of sib2, iclass 27, count 0 2006.229.15:16:38.77#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:16:38.77#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:16:38.77#ibcon#[25=USB\r\n] 2006.229.15:16:38.77#ibcon#*before write, iclass 27, count 0 2006.229.15:16:38.77#ibcon#enter sib2, iclass 27, count 0 2006.229.15:16:38.77#ibcon#flushed, iclass 27, count 0 2006.229.15:16:38.77#ibcon#about to write, iclass 27, count 0 2006.229.15:16:38.77#ibcon#wrote, iclass 27, count 0 2006.229.15:16:38.77#ibcon#about to read 3, iclass 27, count 0 2006.229.15:16:38.80#ibcon#read 3, iclass 27, count 0 2006.229.15:16:38.80#ibcon#about to read 4, iclass 27, count 0 2006.229.15:16:38.80#ibcon#read 4, iclass 27, count 0 2006.229.15:16:38.80#ibcon#about to read 5, iclass 27, count 0 2006.229.15:16:38.80#ibcon#read 5, iclass 27, count 0 2006.229.15:16:38.80#ibcon#about to read 6, iclass 27, count 0 2006.229.15:16:38.80#ibcon#read 6, iclass 27, count 0 2006.229.15:16:38.80#ibcon#end of sib2, iclass 27, count 0 2006.229.15:16:38.80#ibcon#*after write, iclass 27, count 0 2006.229.15:16:38.80#ibcon#*before return 0, iclass 27, count 0 2006.229.15:16:38.80#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:38.80#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:38.80#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:16:38.80#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:16:38.80$vck44/valo=3,564.99 2006.229.15:16:38.80#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.15:16:38.80#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.15:16:38.80#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:38.80#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:38.80#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:38.80#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:38.80#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:16:38.80#ibcon#first serial, iclass 29, count 0 2006.229.15:16:38.80#ibcon#enter sib2, iclass 29, count 0 2006.229.15:16:38.80#ibcon#flushed, iclass 29, count 0 2006.229.15:16:38.80#ibcon#about to write, iclass 29, count 0 2006.229.15:16:38.80#ibcon#wrote, iclass 29, count 0 2006.229.15:16:38.80#ibcon#about to read 3, iclass 29, count 0 2006.229.15:16:38.82#ibcon#read 3, iclass 29, count 0 2006.229.15:16:38.82#ibcon#about to read 4, iclass 29, count 0 2006.229.15:16:38.82#ibcon#read 4, iclass 29, count 0 2006.229.15:16:38.82#ibcon#about to read 5, iclass 29, count 0 2006.229.15:16:38.82#ibcon#read 5, iclass 29, count 0 2006.229.15:16:38.82#ibcon#about to read 6, iclass 29, count 0 2006.229.15:16:38.82#ibcon#read 6, iclass 29, count 0 2006.229.15:16:38.82#ibcon#end of sib2, iclass 29, count 0 2006.229.15:16:38.82#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:16:38.82#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:16:38.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:16:38.82#ibcon#*before write, iclass 29, count 0 2006.229.15:16:38.82#ibcon#enter sib2, iclass 29, count 0 2006.229.15:16:38.82#ibcon#flushed, iclass 29, count 0 2006.229.15:16:38.82#ibcon#about to write, iclass 29, count 0 2006.229.15:16:38.82#ibcon#wrote, iclass 29, count 0 2006.229.15:16:38.82#ibcon#about to read 3, iclass 29, count 0 2006.229.15:16:38.86#ibcon#read 3, iclass 29, count 0 2006.229.15:16:38.86#ibcon#about to read 4, iclass 29, count 0 2006.229.15:16:38.86#ibcon#read 4, iclass 29, count 0 2006.229.15:16:38.86#ibcon#about to read 5, iclass 29, count 0 2006.229.15:16:38.86#ibcon#read 5, iclass 29, count 0 2006.229.15:16:38.86#ibcon#about to read 6, iclass 29, count 0 2006.229.15:16:38.86#ibcon#read 6, iclass 29, count 0 2006.229.15:16:38.86#ibcon#end of sib2, iclass 29, count 0 2006.229.15:16:38.86#ibcon#*after write, iclass 29, count 0 2006.229.15:16:38.86#ibcon#*before return 0, iclass 29, count 0 2006.229.15:16:38.86#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:38.86#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:38.86#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:16:38.86#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:16:38.86$vck44/va=3,6 2006.229.15:16:38.86#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.15:16:38.86#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.15:16:38.86#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:38.86#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:38.92#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:38.92#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:38.92#ibcon#enter wrdev, iclass 31, count 2 2006.229.15:16:38.92#ibcon#first serial, iclass 31, count 2 2006.229.15:16:38.92#ibcon#enter sib2, iclass 31, count 2 2006.229.15:16:38.92#ibcon#flushed, iclass 31, count 2 2006.229.15:16:38.92#ibcon#about to write, iclass 31, count 2 2006.229.15:16:38.92#ibcon#wrote, iclass 31, count 2 2006.229.15:16:38.92#ibcon#about to read 3, iclass 31, count 2 2006.229.15:16:38.94#ibcon#read 3, iclass 31, count 2 2006.229.15:16:38.94#ibcon#about to read 4, iclass 31, count 2 2006.229.15:16:38.94#ibcon#read 4, iclass 31, count 2 2006.229.15:16:38.94#ibcon#about to read 5, iclass 31, count 2 2006.229.15:16:38.94#ibcon#read 5, iclass 31, count 2 2006.229.15:16:38.94#ibcon#about to read 6, iclass 31, count 2 2006.229.15:16:38.94#ibcon#read 6, iclass 31, count 2 2006.229.15:16:38.94#ibcon#end of sib2, iclass 31, count 2 2006.229.15:16:38.94#ibcon#*mode == 0, iclass 31, count 2 2006.229.15:16:38.94#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.15:16:38.94#ibcon#[25=AT03-06\r\n] 2006.229.15:16:38.94#ibcon#*before write, iclass 31, count 2 2006.229.15:16:38.94#ibcon#enter sib2, iclass 31, count 2 2006.229.15:16:38.94#ibcon#flushed, iclass 31, count 2 2006.229.15:16:38.94#ibcon#about to write, iclass 31, count 2 2006.229.15:16:38.94#ibcon#wrote, iclass 31, count 2 2006.229.15:16:38.94#ibcon#about to read 3, iclass 31, count 2 2006.229.15:16:38.97#ibcon#read 3, iclass 31, count 2 2006.229.15:16:38.97#ibcon#about to read 4, iclass 31, count 2 2006.229.15:16:38.97#ibcon#read 4, iclass 31, count 2 2006.229.15:16:38.97#ibcon#about to read 5, iclass 31, count 2 2006.229.15:16:38.97#ibcon#read 5, iclass 31, count 2 2006.229.15:16:38.97#ibcon#about to read 6, iclass 31, count 2 2006.229.15:16:38.97#ibcon#read 6, iclass 31, count 2 2006.229.15:16:38.97#ibcon#end of sib2, iclass 31, count 2 2006.229.15:16:38.97#ibcon#*after write, iclass 31, count 2 2006.229.15:16:38.97#ibcon#*before return 0, iclass 31, count 2 2006.229.15:16:38.97#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:38.97#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:38.97#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.15:16:38.97#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:38.97#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:39.09#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:39.09#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:39.09#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:16:39.09#ibcon#first serial, iclass 31, count 0 2006.229.15:16:39.09#ibcon#enter sib2, iclass 31, count 0 2006.229.15:16:39.09#ibcon#flushed, iclass 31, count 0 2006.229.15:16:39.09#ibcon#about to write, iclass 31, count 0 2006.229.15:16:39.09#ibcon#wrote, iclass 31, count 0 2006.229.15:16:39.09#ibcon#about to read 3, iclass 31, count 0 2006.229.15:16:39.11#ibcon#read 3, iclass 31, count 0 2006.229.15:16:39.11#ibcon#about to read 4, iclass 31, count 0 2006.229.15:16:39.11#ibcon#read 4, iclass 31, count 0 2006.229.15:16:39.11#ibcon#about to read 5, iclass 31, count 0 2006.229.15:16:39.11#ibcon#read 5, iclass 31, count 0 2006.229.15:16:39.11#ibcon#about to read 6, iclass 31, count 0 2006.229.15:16:39.11#ibcon#read 6, iclass 31, count 0 2006.229.15:16:39.11#ibcon#end of sib2, iclass 31, count 0 2006.229.15:16:39.11#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:16:39.11#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:16:39.11#ibcon#[25=USB\r\n] 2006.229.15:16:39.11#ibcon#*before write, iclass 31, count 0 2006.229.15:16:39.11#ibcon#enter sib2, iclass 31, count 0 2006.229.15:16:39.11#ibcon#flushed, iclass 31, count 0 2006.229.15:16:39.11#ibcon#about to write, iclass 31, count 0 2006.229.15:16:39.11#ibcon#wrote, iclass 31, count 0 2006.229.15:16:39.11#ibcon#about to read 3, iclass 31, count 0 2006.229.15:16:39.14#ibcon#read 3, iclass 31, count 0 2006.229.15:16:39.14#ibcon#about to read 4, iclass 31, count 0 2006.229.15:16:39.14#ibcon#read 4, iclass 31, count 0 2006.229.15:16:39.14#ibcon#about to read 5, iclass 31, count 0 2006.229.15:16:39.14#ibcon#read 5, iclass 31, count 0 2006.229.15:16:39.14#ibcon#about to read 6, iclass 31, count 0 2006.229.15:16:39.14#ibcon#read 6, iclass 31, count 0 2006.229.15:16:39.14#ibcon#end of sib2, iclass 31, count 0 2006.229.15:16:39.14#ibcon#*after write, iclass 31, count 0 2006.229.15:16:39.14#ibcon#*before return 0, iclass 31, count 0 2006.229.15:16:39.14#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:39.14#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:39.14#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:16:39.14#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:16:39.14$vck44/valo=4,624.99 2006.229.15:16:39.14#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.15:16:39.14#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.15:16:39.14#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:39.14#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:39.14#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:39.14#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:39.14#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:16:39.14#ibcon#first serial, iclass 33, count 0 2006.229.15:16:39.14#ibcon#enter sib2, iclass 33, count 0 2006.229.15:16:39.14#ibcon#flushed, iclass 33, count 0 2006.229.15:16:39.14#ibcon#about to write, iclass 33, count 0 2006.229.15:16:39.14#ibcon#wrote, iclass 33, count 0 2006.229.15:16:39.14#ibcon#about to read 3, iclass 33, count 0 2006.229.15:16:39.16#ibcon#read 3, iclass 33, count 0 2006.229.15:16:39.16#ibcon#about to read 4, iclass 33, count 0 2006.229.15:16:39.16#ibcon#read 4, iclass 33, count 0 2006.229.15:16:39.16#ibcon#about to read 5, iclass 33, count 0 2006.229.15:16:39.16#ibcon#read 5, iclass 33, count 0 2006.229.15:16:39.16#ibcon#about to read 6, iclass 33, count 0 2006.229.15:16:39.16#ibcon#read 6, iclass 33, count 0 2006.229.15:16:39.16#ibcon#end of sib2, iclass 33, count 0 2006.229.15:16:39.16#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:16:39.16#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:16:39.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:16:39.16#ibcon#*before write, iclass 33, count 0 2006.229.15:16:39.16#ibcon#enter sib2, iclass 33, count 0 2006.229.15:16:39.16#ibcon#flushed, iclass 33, count 0 2006.229.15:16:39.16#ibcon#about to write, iclass 33, count 0 2006.229.15:16:39.16#ibcon#wrote, iclass 33, count 0 2006.229.15:16:39.16#ibcon#about to read 3, iclass 33, count 0 2006.229.15:16:39.20#ibcon#read 3, iclass 33, count 0 2006.229.15:16:39.20#ibcon#about to read 4, iclass 33, count 0 2006.229.15:16:39.20#ibcon#read 4, iclass 33, count 0 2006.229.15:16:39.20#ibcon#about to read 5, iclass 33, count 0 2006.229.15:16:39.20#ibcon#read 5, iclass 33, count 0 2006.229.15:16:39.20#ibcon#about to read 6, iclass 33, count 0 2006.229.15:16:39.20#ibcon#read 6, iclass 33, count 0 2006.229.15:16:39.20#ibcon#end of sib2, iclass 33, count 0 2006.229.15:16:39.20#ibcon#*after write, iclass 33, count 0 2006.229.15:16:39.20#ibcon#*before return 0, iclass 33, count 0 2006.229.15:16:39.20#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:39.20#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:39.20#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:16:39.20#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:16:39.20$vck44/va=4,7 2006.229.15:16:39.20#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.15:16:39.20#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.15:16:39.20#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:39.20#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:39.26#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:39.26#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:39.26#ibcon#enter wrdev, iclass 35, count 2 2006.229.15:16:39.26#ibcon#first serial, iclass 35, count 2 2006.229.15:16:39.26#ibcon#enter sib2, iclass 35, count 2 2006.229.15:16:39.26#ibcon#flushed, iclass 35, count 2 2006.229.15:16:39.26#ibcon#about to write, iclass 35, count 2 2006.229.15:16:39.26#ibcon#wrote, iclass 35, count 2 2006.229.15:16:39.26#ibcon#about to read 3, iclass 35, count 2 2006.229.15:16:39.28#ibcon#read 3, iclass 35, count 2 2006.229.15:16:39.28#ibcon#about to read 4, iclass 35, count 2 2006.229.15:16:39.28#ibcon#read 4, iclass 35, count 2 2006.229.15:16:39.28#ibcon#about to read 5, iclass 35, count 2 2006.229.15:16:39.28#ibcon#read 5, iclass 35, count 2 2006.229.15:16:39.28#ibcon#about to read 6, iclass 35, count 2 2006.229.15:16:39.28#ibcon#read 6, iclass 35, count 2 2006.229.15:16:39.28#ibcon#end of sib2, iclass 35, count 2 2006.229.15:16:39.28#ibcon#*mode == 0, iclass 35, count 2 2006.229.15:16:39.28#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.15:16:39.28#ibcon#[25=AT04-07\r\n] 2006.229.15:16:39.28#ibcon#*before write, iclass 35, count 2 2006.229.15:16:39.28#ibcon#enter sib2, iclass 35, count 2 2006.229.15:16:39.28#ibcon#flushed, iclass 35, count 2 2006.229.15:16:39.28#ibcon#about to write, iclass 35, count 2 2006.229.15:16:39.28#ibcon#wrote, iclass 35, count 2 2006.229.15:16:39.28#ibcon#about to read 3, iclass 35, count 2 2006.229.15:16:39.31#ibcon#read 3, iclass 35, count 2 2006.229.15:16:39.31#ibcon#about to read 4, iclass 35, count 2 2006.229.15:16:39.31#ibcon#read 4, iclass 35, count 2 2006.229.15:16:39.31#ibcon#about to read 5, iclass 35, count 2 2006.229.15:16:39.31#ibcon#read 5, iclass 35, count 2 2006.229.15:16:39.31#ibcon#about to read 6, iclass 35, count 2 2006.229.15:16:39.31#ibcon#read 6, iclass 35, count 2 2006.229.15:16:39.31#ibcon#end of sib2, iclass 35, count 2 2006.229.15:16:39.31#ibcon#*after write, iclass 35, count 2 2006.229.15:16:39.31#ibcon#*before return 0, iclass 35, count 2 2006.229.15:16:39.31#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:39.31#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:39.31#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.15:16:39.31#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:39.31#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:39.43#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:39.43#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:39.43#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:16:39.43#ibcon#first serial, iclass 35, count 0 2006.229.15:16:39.43#ibcon#enter sib2, iclass 35, count 0 2006.229.15:16:39.43#ibcon#flushed, iclass 35, count 0 2006.229.15:16:39.43#ibcon#about to write, iclass 35, count 0 2006.229.15:16:39.43#ibcon#wrote, iclass 35, count 0 2006.229.15:16:39.43#ibcon#about to read 3, iclass 35, count 0 2006.229.15:16:39.45#ibcon#read 3, iclass 35, count 0 2006.229.15:16:39.45#ibcon#about to read 4, iclass 35, count 0 2006.229.15:16:39.45#ibcon#read 4, iclass 35, count 0 2006.229.15:16:39.45#ibcon#about to read 5, iclass 35, count 0 2006.229.15:16:39.45#ibcon#read 5, iclass 35, count 0 2006.229.15:16:39.45#ibcon#about to read 6, iclass 35, count 0 2006.229.15:16:39.45#ibcon#read 6, iclass 35, count 0 2006.229.15:16:39.45#ibcon#end of sib2, iclass 35, count 0 2006.229.15:16:39.45#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:16:39.45#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:16:39.45#ibcon#[25=USB\r\n] 2006.229.15:16:39.45#ibcon#*before write, iclass 35, count 0 2006.229.15:16:39.45#ibcon#enter sib2, iclass 35, count 0 2006.229.15:16:39.45#ibcon#flushed, iclass 35, count 0 2006.229.15:16:39.45#ibcon#about to write, iclass 35, count 0 2006.229.15:16:39.45#ibcon#wrote, iclass 35, count 0 2006.229.15:16:39.45#ibcon#about to read 3, iclass 35, count 0 2006.229.15:16:39.48#ibcon#read 3, iclass 35, count 0 2006.229.15:16:39.48#ibcon#about to read 4, iclass 35, count 0 2006.229.15:16:39.48#ibcon#read 4, iclass 35, count 0 2006.229.15:16:39.48#ibcon#about to read 5, iclass 35, count 0 2006.229.15:16:39.48#ibcon#read 5, iclass 35, count 0 2006.229.15:16:39.48#ibcon#about to read 6, iclass 35, count 0 2006.229.15:16:39.48#ibcon#read 6, iclass 35, count 0 2006.229.15:16:39.48#ibcon#end of sib2, iclass 35, count 0 2006.229.15:16:39.48#ibcon#*after write, iclass 35, count 0 2006.229.15:16:39.48#ibcon#*before return 0, iclass 35, count 0 2006.229.15:16:39.48#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:39.48#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:39.48#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:16:39.48#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:16:39.48$vck44/valo=5,734.99 2006.229.15:16:39.48#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.15:16:39.48#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.15:16:39.48#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:39.48#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:39.48#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:39.48#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:39.48#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:16:39.48#ibcon#first serial, iclass 37, count 0 2006.229.15:16:39.48#ibcon#enter sib2, iclass 37, count 0 2006.229.15:16:39.48#ibcon#flushed, iclass 37, count 0 2006.229.15:16:39.48#ibcon#about to write, iclass 37, count 0 2006.229.15:16:39.48#ibcon#wrote, iclass 37, count 0 2006.229.15:16:39.48#ibcon#about to read 3, iclass 37, count 0 2006.229.15:16:39.50#ibcon#read 3, iclass 37, count 0 2006.229.15:16:39.50#ibcon#about to read 4, iclass 37, count 0 2006.229.15:16:39.50#ibcon#read 4, iclass 37, count 0 2006.229.15:16:39.50#ibcon#about to read 5, iclass 37, count 0 2006.229.15:16:39.50#ibcon#read 5, iclass 37, count 0 2006.229.15:16:39.50#ibcon#about to read 6, iclass 37, count 0 2006.229.15:16:39.50#ibcon#read 6, iclass 37, count 0 2006.229.15:16:39.50#ibcon#end of sib2, iclass 37, count 0 2006.229.15:16:39.50#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:16:39.50#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:16:39.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:16:39.50#ibcon#*before write, iclass 37, count 0 2006.229.15:16:39.50#ibcon#enter sib2, iclass 37, count 0 2006.229.15:16:39.50#ibcon#flushed, iclass 37, count 0 2006.229.15:16:39.50#ibcon#about to write, iclass 37, count 0 2006.229.15:16:39.50#ibcon#wrote, iclass 37, count 0 2006.229.15:16:39.50#ibcon#about to read 3, iclass 37, count 0 2006.229.15:16:39.54#ibcon#read 3, iclass 37, count 0 2006.229.15:16:39.54#ibcon#about to read 4, iclass 37, count 0 2006.229.15:16:39.54#ibcon#read 4, iclass 37, count 0 2006.229.15:16:39.54#ibcon#about to read 5, iclass 37, count 0 2006.229.15:16:39.54#ibcon#read 5, iclass 37, count 0 2006.229.15:16:39.54#ibcon#about to read 6, iclass 37, count 0 2006.229.15:16:39.54#ibcon#read 6, iclass 37, count 0 2006.229.15:16:39.54#ibcon#end of sib2, iclass 37, count 0 2006.229.15:16:39.54#ibcon#*after write, iclass 37, count 0 2006.229.15:16:39.54#ibcon#*before return 0, iclass 37, count 0 2006.229.15:16:39.54#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:39.54#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:39.54#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:16:39.54#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:16:39.54$vck44/va=5,4 2006.229.15:16:39.54#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.15:16:39.54#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.15:16:39.54#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:39.54#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:39.60#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:39.60#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:39.60#ibcon#enter wrdev, iclass 39, count 2 2006.229.15:16:39.60#ibcon#first serial, iclass 39, count 2 2006.229.15:16:39.60#ibcon#enter sib2, iclass 39, count 2 2006.229.15:16:39.60#ibcon#flushed, iclass 39, count 2 2006.229.15:16:39.60#ibcon#about to write, iclass 39, count 2 2006.229.15:16:39.60#ibcon#wrote, iclass 39, count 2 2006.229.15:16:39.60#ibcon#about to read 3, iclass 39, count 2 2006.229.15:16:39.62#ibcon#read 3, iclass 39, count 2 2006.229.15:16:39.62#ibcon#about to read 4, iclass 39, count 2 2006.229.15:16:39.62#ibcon#read 4, iclass 39, count 2 2006.229.15:16:39.62#ibcon#about to read 5, iclass 39, count 2 2006.229.15:16:39.62#ibcon#read 5, iclass 39, count 2 2006.229.15:16:39.62#ibcon#about to read 6, iclass 39, count 2 2006.229.15:16:39.62#ibcon#read 6, iclass 39, count 2 2006.229.15:16:39.62#ibcon#end of sib2, iclass 39, count 2 2006.229.15:16:39.62#ibcon#*mode == 0, iclass 39, count 2 2006.229.15:16:39.62#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.15:16:39.62#ibcon#[25=AT05-04\r\n] 2006.229.15:16:39.62#ibcon#*before write, iclass 39, count 2 2006.229.15:16:39.62#ibcon#enter sib2, iclass 39, count 2 2006.229.15:16:39.62#ibcon#flushed, iclass 39, count 2 2006.229.15:16:39.62#ibcon#about to write, iclass 39, count 2 2006.229.15:16:39.62#ibcon#wrote, iclass 39, count 2 2006.229.15:16:39.62#ibcon#about to read 3, iclass 39, count 2 2006.229.15:16:39.65#ibcon#read 3, iclass 39, count 2 2006.229.15:16:39.65#ibcon#about to read 4, iclass 39, count 2 2006.229.15:16:39.65#ibcon#read 4, iclass 39, count 2 2006.229.15:16:39.65#ibcon#about to read 5, iclass 39, count 2 2006.229.15:16:39.65#ibcon#read 5, iclass 39, count 2 2006.229.15:16:39.65#ibcon#about to read 6, iclass 39, count 2 2006.229.15:16:39.65#ibcon#read 6, iclass 39, count 2 2006.229.15:16:39.65#ibcon#end of sib2, iclass 39, count 2 2006.229.15:16:39.65#ibcon#*after write, iclass 39, count 2 2006.229.15:16:39.65#ibcon#*before return 0, iclass 39, count 2 2006.229.15:16:39.65#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:39.65#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:39.65#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.15:16:39.65#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:39.65#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:39.77#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:39.77#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:39.77#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:16:39.77#ibcon#first serial, iclass 39, count 0 2006.229.15:16:39.77#ibcon#enter sib2, iclass 39, count 0 2006.229.15:16:39.77#ibcon#flushed, iclass 39, count 0 2006.229.15:16:39.77#ibcon#about to write, iclass 39, count 0 2006.229.15:16:39.77#ibcon#wrote, iclass 39, count 0 2006.229.15:16:39.77#ibcon#about to read 3, iclass 39, count 0 2006.229.15:16:39.79#ibcon#read 3, iclass 39, count 0 2006.229.15:16:39.79#ibcon#about to read 4, iclass 39, count 0 2006.229.15:16:39.79#ibcon#read 4, iclass 39, count 0 2006.229.15:16:39.79#ibcon#about to read 5, iclass 39, count 0 2006.229.15:16:39.79#ibcon#read 5, iclass 39, count 0 2006.229.15:16:39.79#ibcon#about to read 6, iclass 39, count 0 2006.229.15:16:39.79#ibcon#read 6, iclass 39, count 0 2006.229.15:16:39.79#ibcon#end of sib2, iclass 39, count 0 2006.229.15:16:39.79#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:16:39.79#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:16:39.79#ibcon#[25=USB\r\n] 2006.229.15:16:39.79#ibcon#*before write, iclass 39, count 0 2006.229.15:16:39.79#ibcon#enter sib2, iclass 39, count 0 2006.229.15:16:39.79#ibcon#flushed, iclass 39, count 0 2006.229.15:16:39.79#ibcon#about to write, iclass 39, count 0 2006.229.15:16:39.79#ibcon#wrote, iclass 39, count 0 2006.229.15:16:39.79#ibcon#about to read 3, iclass 39, count 0 2006.229.15:16:39.82#ibcon#read 3, iclass 39, count 0 2006.229.15:16:39.82#ibcon#about to read 4, iclass 39, count 0 2006.229.15:16:39.82#ibcon#read 4, iclass 39, count 0 2006.229.15:16:39.82#ibcon#about to read 5, iclass 39, count 0 2006.229.15:16:39.82#ibcon#read 5, iclass 39, count 0 2006.229.15:16:39.82#ibcon#about to read 6, iclass 39, count 0 2006.229.15:16:39.82#ibcon#read 6, iclass 39, count 0 2006.229.15:16:39.82#ibcon#end of sib2, iclass 39, count 0 2006.229.15:16:39.82#ibcon#*after write, iclass 39, count 0 2006.229.15:16:39.82#ibcon#*before return 0, iclass 39, count 0 2006.229.15:16:39.82#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:39.82#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:39.82#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:16:39.82#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:16:39.82$vck44/valo=6,814.99 2006.229.15:16:39.82#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:16:39.82#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:16:39.82#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:39.82#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:39.82#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:39.82#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:39.82#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:16:39.82#ibcon#first serial, iclass 3, count 0 2006.229.15:16:39.82#ibcon#enter sib2, iclass 3, count 0 2006.229.15:16:39.82#ibcon#flushed, iclass 3, count 0 2006.229.15:16:39.82#ibcon#about to write, iclass 3, count 0 2006.229.15:16:39.82#ibcon#wrote, iclass 3, count 0 2006.229.15:16:39.82#ibcon#about to read 3, iclass 3, count 0 2006.229.15:16:39.84#ibcon#read 3, iclass 3, count 0 2006.229.15:16:39.84#ibcon#about to read 4, iclass 3, count 0 2006.229.15:16:39.84#ibcon#read 4, iclass 3, count 0 2006.229.15:16:39.84#ibcon#about to read 5, iclass 3, count 0 2006.229.15:16:39.84#ibcon#read 5, iclass 3, count 0 2006.229.15:16:39.84#ibcon#about to read 6, iclass 3, count 0 2006.229.15:16:39.84#ibcon#read 6, iclass 3, count 0 2006.229.15:16:39.84#ibcon#end of sib2, iclass 3, count 0 2006.229.15:16:39.84#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:16:39.84#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:16:39.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:16:39.84#ibcon#*before write, iclass 3, count 0 2006.229.15:16:39.84#ibcon#enter sib2, iclass 3, count 0 2006.229.15:16:39.84#ibcon#flushed, iclass 3, count 0 2006.229.15:16:39.84#ibcon#about to write, iclass 3, count 0 2006.229.15:16:39.84#ibcon#wrote, iclass 3, count 0 2006.229.15:16:39.84#ibcon#about to read 3, iclass 3, count 0 2006.229.15:16:39.88#ibcon#read 3, iclass 3, count 0 2006.229.15:16:39.88#ibcon#about to read 4, iclass 3, count 0 2006.229.15:16:39.88#ibcon#read 4, iclass 3, count 0 2006.229.15:16:39.88#ibcon#about to read 5, iclass 3, count 0 2006.229.15:16:39.88#ibcon#read 5, iclass 3, count 0 2006.229.15:16:39.88#ibcon#about to read 6, iclass 3, count 0 2006.229.15:16:39.88#ibcon#read 6, iclass 3, count 0 2006.229.15:16:39.88#ibcon#end of sib2, iclass 3, count 0 2006.229.15:16:39.88#ibcon#*after write, iclass 3, count 0 2006.229.15:16:39.88#ibcon#*before return 0, iclass 3, count 0 2006.229.15:16:39.88#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:39.88#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:39.88#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:16:39.88#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:16:39.88$vck44/va=6,4 2006.229.15:16:39.88#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.15:16:39.88#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.15:16:39.88#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:39.88#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:39.94#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:39.94#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:39.94#ibcon#enter wrdev, iclass 5, count 2 2006.229.15:16:39.94#ibcon#first serial, iclass 5, count 2 2006.229.15:16:39.94#ibcon#enter sib2, iclass 5, count 2 2006.229.15:16:39.94#ibcon#flushed, iclass 5, count 2 2006.229.15:16:39.94#ibcon#about to write, iclass 5, count 2 2006.229.15:16:39.94#ibcon#wrote, iclass 5, count 2 2006.229.15:16:39.94#ibcon#about to read 3, iclass 5, count 2 2006.229.15:16:39.96#ibcon#read 3, iclass 5, count 2 2006.229.15:16:39.96#ibcon#about to read 4, iclass 5, count 2 2006.229.15:16:39.96#ibcon#read 4, iclass 5, count 2 2006.229.15:16:39.96#ibcon#about to read 5, iclass 5, count 2 2006.229.15:16:39.96#ibcon#read 5, iclass 5, count 2 2006.229.15:16:39.96#ibcon#about to read 6, iclass 5, count 2 2006.229.15:16:39.96#ibcon#read 6, iclass 5, count 2 2006.229.15:16:39.96#ibcon#end of sib2, iclass 5, count 2 2006.229.15:16:39.96#ibcon#*mode == 0, iclass 5, count 2 2006.229.15:16:39.96#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.15:16:39.96#ibcon#[25=AT06-04\r\n] 2006.229.15:16:39.96#ibcon#*before write, iclass 5, count 2 2006.229.15:16:39.96#ibcon#enter sib2, iclass 5, count 2 2006.229.15:16:39.96#ibcon#flushed, iclass 5, count 2 2006.229.15:16:39.96#ibcon#about to write, iclass 5, count 2 2006.229.15:16:39.96#ibcon#wrote, iclass 5, count 2 2006.229.15:16:39.96#ibcon#about to read 3, iclass 5, count 2 2006.229.15:16:39.99#ibcon#read 3, iclass 5, count 2 2006.229.15:16:39.99#ibcon#about to read 4, iclass 5, count 2 2006.229.15:16:39.99#ibcon#read 4, iclass 5, count 2 2006.229.15:16:39.99#ibcon#about to read 5, iclass 5, count 2 2006.229.15:16:39.99#ibcon#read 5, iclass 5, count 2 2006.229.15:16:39.99#ibcon#about to read 6, iclass 5, count 2 2006.229.15:16:39.99#ibcon#read 6, iclass 5, count 2 2006.229.15:16:39.99#ibcon#end of sib2, iclass 5, count 2 2006.229.15:16:39.99#ibcon#*after write, iclass 5, count 2 2006.229.15:16:39.99#ibcon#*before return 0, iclass 5, count 2 2006.229.15:16:39.99#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:39.99#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:39.99#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.15:16:39.99#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:39.99#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:40.11#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:40.11#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:40.11#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:16:40.11#ibcon#first serial, iclass 5, count 0 2006.229.15:16:40.11#ibcon#enter sib2, iclass 5, count 0 2006.229.15:16:40.11#ibcon#flushed, iclass 5, count 0 2006.229.15:16:40.11#ibcon#about to write, iclass 5, count 0 2006.229.15:16:40.11#ibcon#wrote, iclass 5, count 0 2006.229.15:16:40.11#ibcon#about to read 3, iclass 5, count 0 2006.229.15:16:40.13#ibcon#read 3, iclass 5, count 0 2006.229.15:16:40.13#ibcon#about to read 4, iclass 5, count 0 2006.229.15:16:40.13#ibcon#read 4, iclass 5, count 0 2006.229.15:16:40.13#ibcon#about to read 5, iclass 5, count 0 2006.229.15:16:40.13#ibcon#read 5, iclass 5, count 0 2006.229.15:16:40.13#ibcon#about to read 6, iclass 5, count 0 2006.229.15:16:40.13#ibcon#read 6, iclass 5, count 0 2006.229.15:16:40.13#ibcon#end of sib2, iclass 5, count 0 2006.229.15:16:40.13#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:16:40.13#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:16:40.13#ibcon#[25=USB\r\n] 2006.229.15:16:40.13#ibcon#*before write, iclass 5, count 0 2006.229.15:16:40.13#ibcon#enter sib2, iclass 5, count 0 2006.229.15:16:40.13#ibcon#flushed, iclass 5, count 0 2006.229.15:16:40.13#ibcon#about to write, iclass 5, count 0 2006.229.15:16:40.13#ibcon#wrote, iclass 5, count 0 2006.229.15:16:40.13#ibcon#about to read 3, iclass 5, count 0 2006.229.15:16:40.16#ibcon#read 3, iclass 5, count 0 2006.229.15:16:40.16#ibcon#about to read 4, iclass 5, count 0 2006.229.15:16:40.16#ibcon#read 4, iclass 5, count 0 2006.229.15:16:40.16#ibcon#about to read 5, iclass 5, count 0 2006.229.15:16:40.16#ibcon#read 5, iclass 5, count 0 2006.229.15:16:40.16#ibcon#about to read 6, iclass 5, count 0 2006.229.15:16:40.16#ibcon#read 6, iclass 5, count 0 2006.229.15:16:40.16#ibcon#end of sib2, iclass 5, count 0 2006.229.15:16:40.16#ibcon#*after write, iclass 5, count 0 2006.229.15:16:40.16#ibcon#*before return 0, iclass 5, count 0 2006.229.15:16:40.16#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:40.16#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:40.16#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:16:40.16#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:16:40.16$vck44/valo=7,864.99 2006.229.15:16:40.16#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.15:16:40.16#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.15:16:40.16#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:40.16#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:40.16#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:40.16#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:40.16#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:16:40.16#ibcon#first serial, iclass 7, count 0 2006.229.15:16:40.16#ibcon#enter sib2, iclass 7, count 0 2006.229.15:16:40.16#ibcon#flushed, iclass 7, count 0 2006.229.15:16:40.16#ibcon#about to write, iclass 7, count 0 2006.229.15:16:40.16#ibcon#wrote, iclass 7, count 0 2006.229.15:16:40.16#ibcon#about to read 3, iclass 7, count 0 2006.229.15:16:40.18#ibcon#read 3, iclass 7, count 0 2006.229.15:16:40.18#ibcon#about to read 4, iclass 7, count 0 2006.229.15:16:40.18#ibcon#read 4, iclass 7, count 0 2006.229.15:16:40.18#ibcon#about to read 5, iclass 7, count 0 2006.229.15:16:40.18#ibcon#read 5, iclass 7, count 0 2006.229.15:16:40.18#ibcon#about to read 6, iclass 7, count 0 2006.229.15:16:40.18#ibcon#read 6, iclass 7, count 0 2006.229.15:16:40.18#ibcon#end of sib2, iclass 7, count 0 2006.229.15:16:40.18#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:16:40.18#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:16:40.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:16:40.18#ibcon#*before write, iclass 7, count 0 2006.229.15:16:40.18#ibcon#enter sib2, iclass 7, count 0 2006.229.15:16:40.18#ibcon#flushed, iclass 7, count 0 2006.229.15:16:40.18#ibcon#about to write, iclass 7, count 0 2006.229.15:16:40.18#ibcon#wrote, iclass 7, count 0 2006.229.15:16:40.18#ibcon#about to read 3, iclass 7, count 0 2006.229.15:16:40.22#ibcon#read 3, iclass 7, count 0 2006.229.15:16:40.22#ibcon#about to read 4, iclass 7, count 0 2006.229.15:16:40.22#ibcon#read 4, iclass 7, count 0 2006.229.15:16:40.22#ibcon#about to read 5, iclass 7, count 0 2006.229.15:16:40.22#ibcon#read 5, iclass 7, count 0 2006.229.15:16:40.22#ibcon#about to read 6, iclass 7, count 0 2006.229.15:16:40.22#ibcon#read 6, iclass 7, count 0 2006.229.15:16:40.22#ibcon#end of sib2, iclass 7, count 0 2006.229.15:16:40.22#ibcon#*after write, iclass 7, count 0 2006.229.15:16:40.22#ibcon#*before return 0, iclass 7, count 0 2006.229.15:16:40.22#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:40.22#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:40.22#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:16:40.22#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:16:40.22$vck44/va=7,5 2006.229.15:16:40.22#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.15:16:40.22#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.15:16:40.22#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:40.22#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:40.28#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:40.28#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:40.28#ibcon#enter wrdev, iclass 11, count 2 2006.229.15:16:40.28#ibcon#first serial, iclass 11, count 2 2006.229.15:16:40.28#ibcon#enter sib2, iclass 11, count 2 2006.229.15:16:40.28#ibcon#flushed, iclass 11, count 2 2006.229.15:16:40.28#ibcon#about to write, iclass 11, count 2 2006.229.15:16:40.28#ibcon#wrote, iclass 11, count 2 2006.229.15:16:40.28#ibcon#about to read 3, iclass 11, count 2 2006.229.15:16:40.30#ibcon#read 3, iclass 11, count 2 2006.229.15:16:40.30#ibcon#about to read 4, iclass 11, count 2 2006.229.15:16:40.30#ibcon#read 4, iclass 11, count 2 2006.229.15:16:40.30#ibcon#about to read 5, iclass 11, count 2 2006.229.15:16:40.30#ibcon#read 5, iclass 11, count 2 2006.229.15:16:40.30#ibcon#about to read 6, iclass 11, count 2 2006.229.15:16:40.30#ibcon#read 6, iclass 11, count 2 2006.229.15:16:40.30#ibcon#end of sib2, iclass 11, count 2 2006.229.15:16:40.30#ibcon#*mode == 0, iclass 11, count 2 2006.229.15:16:40.30#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.15:16:40.30#ibcon#[25=AT07-05\r\n] 2006.229.15:16:40.30#ibcon#*before write, iclass 11, count 2 2006.229.15:16:40.30#ibcon#enter sib2, iclass 11, count 2 2006.229.15:16:40.30#ibcon#flushed, iclass 11, count 2 2006.229.15:16:40.30#ibcon#about to write, iclass 11, count 2 2006.229.15:16:40.30#ibcon#wrote, iclass 11, count 2 2006.229.15:16:40.30#ibcon#about to read 3, iclass 11, count 2 2006.229.15:16:40.33#ibcon#read 3, iclass 11, count 2 2006.229.15:16:40.33#ibcon#about to read 4, iclass 11, count 2 2006.229.15:16:40.33#ibcon#read 4, iclass 11, count 2 2006.229.15:16:40.33#ibcon#about to read 5, iclass 11, count 2 2006.229.15:16:40.33#ibcon#read 5, iclass 11, count 2 2006.229.15:16:40.33#ibcon#about to read 6, iclass 11, count 2 2006.229.15:16:40.33#ibcon#read 6, iclass 11, count 2 2006.229.15:16:40.33#ibcon#end of sib2, iclass 11, count 2 2006.229.15:16:40.33#ibcon#*after write, iclass 11, count 2 2006.229.15:16:40.33#ibcon#*before return 0, iclass 11, count 2 2006.229.15:16:40.33#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:40.33#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:40.33#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.15:16:40.33#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:40.33#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:40.45#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:40.45#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:40.45#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:16:40.45#ibcon#first serial, iclass 11, count 0 2006.229.15:16:40.45#ibcon#enter sib2, iclass 11, count 0 2006.229.15:16:40.45#ibcon#flushed, iclass 11, count 0 2006.229.15:16:40.45#ibcon#about to write, iclass 11, count 0 2006.229.15:16:40.45#ibcon#wrote, iclass 11, count 0 2006.229.15:16:40.45#ibcon#about to read 3, iclass 11, count 0 2006.229.15:16:40.47#ibcon#read 3, iclass 11, count 0 2006.229.15:16:40.47#ibcon#about to read 4, iclass 11, count 0 2006.229.15:16:40.47#ibcon#read 4, iclass 11, count 0 2006.229.15:16:40.47#ibcon#about to read 5, iclass 11, count 0 2006.229.15:16:40.47#ibcon#read 5, iclass 11, count 0 2006.229.15:16:40.47#ibcon#about to read 6, iclass 11, count 0 2006.229.15:16:40.47#ibcon#read 6, iclass 11, count 0 2006.229.15:16:40.47#ibcon#end of sib2, iclass 11, count 0 2006.229.15:16:40.47#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:16:40.47#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:16:40.47#ibcon#[25=USB\r\n] 2006.229.15:16:40.47#ibcon#*before write, iclass 11, count 0 2006.229.15:16:40.47#ibcon#enter sib2, iclass 11, count 0 2006.229.15:16:40.47#ibcon#flushed, iclass 11, count 0 2006.229.15:16:40.47#ibcon#about to write, iclass 11, count 0 2006.229.15:16:40.47#ibcon#wrote, iclass 11, count 0 2006.229.15:16:40.47#ibcon#about to read 3, iclass 11, count 0 2006.229.15:16:40.50#ibcon#read 3, iclass 11, count 0 2006.229.15:16:40.50#ibcon#about to read 4, iclass 11, count 0 2006.229.15:16:40.50#ibcon#read 4, iclass 11, count 0 2006.229.15:16:40.50#ibcon#about to read 5, iclass 11, count 0 2006.229.15:16:40.50#ibcon#read 5, iclass 11, count 0 2006.229.15:16:40.50#ibcon#about to read 6, iclass 11, count 0 2006.229.15:16:40.50#ibcon#read 6, iclass 11, count 0 2006.229.15:16:40.50#ibcon#end of sib2, iclass 11, count 0 2006.229.15:16:40.50#ibcon#*after write, iclass 11, count 0 2006.229.15:16:40.50#ibcon#*before return 0, iclass 11, count 0 2006.229.15:16:40.50#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:40.50#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:40.50#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:16:40.50#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:16:40.50$vck44/valo=8,884.99 2006.229.15:16:40.50#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.15:16:40.50#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.15:16:40.50#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:40.50#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:40.50#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:40.50#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:40.50#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:16:40.50#ibcon#first serial, iclass 13, count 0 2006.229.15:16:40.50#ibcon#enter sib2, iclass 13, count 0 2006.229.15:16:40.50#ibcon#flushed, iclass 13, count 0 2006.229.15:16:40.50#ibcon#about to write, iclass 13, count 0 2006.229.15:16:40.50#ibcon#wrote, iclass 13, count 0 2006.229.15:16:40.50#ibcon#about to read 3, iclass 13, count 0 2006.229.15:16:40.52#ibcon#read 3, iclass 13, count 0 2006.229.15:16:40.52#ibcon#about to read 4, iclass 13, count 0 2006.229.15:16:40.52#ibcon#read 4, iclass 13, count 0 2006.229.15:16:40.52#ibcon#about to read 5, iclass 13, count 0 2006.229.15:16:40.52#ibcon#read 5, iclass 13, count 0 2006.229.15:16:40.52#ibcon#about to read 6, iclass 13, count 0 2006.229.15:16:40.52#ibcon#read 6, iclass 13, count 0 2006.229.15:16:40.52#ibcon#end of sib2, iclass 13, count 0 2006.229.15:16:40.52#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:16:40.52#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:16:40.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:16:40.52#ibcon#*before write, iclass 13, count 0 2006.229.15:16:40.52#ibcon#enter sib2, iclass 13, count 0 2006.229.15:16:40.52#ibcon#flushed, iclass 13, count 0 2006.229.15:16:40.52#ibcon#about to write, iclass 13, count 0 2006.229.15:16:40.52#ibcon#wrote, iclass 13, count 0 2006.229.15:16:40.52#ibcon#about to read 3, iclass 13, count 0 2006.229.15:16:40.56#ibcon#read 3, iclass 13, count 0 2006.229.15:16:40.56#ibcon#about to read 4, iclass 13, count 0 2006.229.15:16:40.56#ibcon#read 4, iclass 13, count 0 2006.229.15:16:40.56#ibcon#about to read 5, iclass 13, count 0 2006.229.15:16:40.56#ibcon#read 5, iclass 13, count 0 2006.229.15:16:40.56#ibcon#about to read 6, iclass 13, count 0 2006.229.15:16:40.56#ibcon#read 6, iclass 13, count 0 2006.229.15:16:40.56#ibcon#end of sib2, iclass 13, count 0 2006.229.15:16:40.56#ibcon#*after write, iclass 13, count 0 2006.229.15:16:40.56#ibcon#*before return 0, iclass 13, count 0 2006.229.15:16:40.56#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:40.56#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:40.56#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:16:40.56#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:16:40.56$vck44/va=8,6 2006.229.15:16:40.56#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.15:16:40.56#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.15:16:40.56#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:40.56#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:16:40.62#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:16:40.62#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:16:40.62#ibcon#enter wrdev, iclass 15, count 2 2006.229.15:16:40.62#ibcon#first serial, iclass 15, count 2 2006.229.15:16:40.62#ibcon#enter sib2, iclass 15, count 2 2006.229.15:16:40.62#ibcon#flushed, iclass 15, count 2 2006.229.15:16:40.62#ibcon#about to write, iclass 15, count 2 2006.229.15:16:40.62#ibcon#wrote, iclass 15, count 2 2006.229.15:16:40.62#ibcon#about to read 3, iclass 15, count 2 2006.229.15:16:40.64#ibcon#read 3, iclass 15, count 2 2006.229.15:16:40.64#ibcon#about to read 4, iclass 15, count 2 2006.229.15:16:40.64#ibcon#read 4, iclass 15, count 2 2006.229.15:16:40.64#ibcon#about to read 5, iclass 15, count 2 2006.229.15:16:40.64#ibcon#read 5, iclass 15, count 2 2006.229.15:16:40.64#ibcon#about to read 6, iclass 15, count 2 2006.229.15:16:40.64#ibcon#read 6, iclass 15, count 2 2006.229.15:16:40.64#ibcon#end of sib2, iclass 15, count 2 2006.229.15:16:40.64#ibcon#*mode == 0, iclass 15, count 2 2006.229.15:16:40.64#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.15:16:40.64#ibcon#[25=AT08-06\r\n] 2006.229.15:16:40.64#ibcon#*before write, iclass 15, count 2 2006.229.15:16:40.64#ibcon#enter sib2, iclass 15, count 2 2006.229.15:16:40.64#ibcon#flushed, iclass 15, count 2 2006.229.15:16:40.64#ibcon#about to write, iclass 15, count 2 2006.229.15:16:40.64#ibcon#wrote, iclass 15, count 2 2006.229.15:16:40.64#ibcon#about to read 3, iclass 15, count 2 2006.229.15:16:40.67#ibcon#read 3, iclass 15, count 2 2006.229.15:16:40.67#ibcon#about to read 4, iclass 15, count 2 2006.229.15:16:40.67#ibcon#read 4, iclass 15, count 2 2006.229.15:16:40.67#ibcon#about to read 5, iclass 15, count 2 2006.229.15:16:40.67#ibcon#read 5, iclass 15, count 2 2006.229.15:16:40.67#ibcon#about to read 6, iclass 15, count 2 2006.229.15:16:40.67#ibcon#read 6, iclass 15, count 2 2006.229.15:16:40.67#ibcon#end of sib2, iclass 15, count 2 2006.229.15:16:40.67#ibcon#*after write, iclass 15, count 2 2006.229.15:16:40.67#ibcon#*before return 0, iclass 15, count 2 2006.229.15:16:40.67#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:16:40.67#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:16:40.67#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.15:16:40.67#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:40.67#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:16:40.79#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:16:40.79#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:16:40.79#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:16:40.79#ibcon#first serial, iclass 15, count 0 2006.229.15:16:40.79#ibcon#enter sib2, iclass 15, count 0 2006.229.15:16:40.79#ibcon#flushed, iclass 15, count 0 2006.229.15:16:40.79#ibcon#about to write, iclass 15, count 0 2006.229.15:16:40.79#ibcon#wrote, iclass 15, count 0 2006.229.15:16:40.79#ibcon#about to read 3, iclass 15, count 0 2006.229.15:16:40.81#ibcon#read 3, iclass 15, count 0 2006.229.15:16:40.81#ibcon#about to read 4, iclass 15, count 0 2006.229.15:16:40.81#ibcon#read 4, iclass 15, count 0 2006.229.15:16:40.81#ibcon#about to read 5, iclass 15, count 0 2006.229.15:16:40.81#ibcon#read 5, iclass 15, count 0 2006.229.15:16:40.81#ibcon#about to read 6, iclass 15, count 0 2006.229.15:16:40.81#ibcon#read 6, iclass 15, count 0 2006.229.15:16:40.81#ibcon#end of sib2, iclass 15, count 0 2006.229.15:16:40.81#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:16:40.81#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:16:40.81#ibcon#[25=USB\r\n] 2006.229.15:16:40.81#ibcon#*before write, iclass 15, count 0 2006.229.15:16:40.81#ibcon#enter sib2, iclass 15, count 0 2006.229.15:16:40.81#ibcon#flushed, iclass 15, count 0 2006.229.15:16:40.81#ibcon#about to write, iclass 15, count 0 2006.229.15:16:40.81#ibcon#wrote, iclass 15, count 0 2006.229.15:16:40.81#ibcon#about to read 3, iclass 15, count 0 2006.229.15:16:40.84#ibcon#read 3, iclass 15, count 0 2006.229.15:16:40.84#ibcon#about to read 4, iclass 15, count 0 2006.229.15:16:40.84#ibcon#read 4, iclass 15, count 0 2006.229.15:16:40.84#ibcon#about to read 5, iclass 15, count 0 2006.229.15:16:40.84#ibcon#read 5, iclass 15, count 0 2006.229.15:16:40.84#ibcon#about to read 6, iclass 15, count 0 2006.229.15:16:40.84#ibcon#read 6, iclass 15, count 0 2006.229.15:16:40.84#ibcon#end of sib2, iclass 15, count 0 2006.229.15:16:40.84#ibcon#*after write, iclass 15, count 0 2006.229.15:16:40.84#ibcon#*before return 0, iclass 15, count 0 2006.229.15:16:40.84#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:16:40.84#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:16:40.84#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:16:40.84#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:16:40.84$vck44/vblo=1,629.99 2006.229.15:16:40.84#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.15:16:40.84#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.15:16:40.84#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:40.84#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:16:40.84#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:16:40.84#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:16:40.84#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:16:40.84#ibcon#first serial, iclass 17, count 0 2006.229.15:16:40.84#ibcon#enter sib2, iclass 17, count 0 2006.229.15:16:40.84#ibcon#flushed, iclass 17, count 0 2006.229.15:16:40.84#ibcon#about to write, iclass 17, count 0 2006.229.15:16:40.84#ibcon#wrote, iclass 17, count 0 2006.229.15:16:40.84#ibcon#about to read 3, iclass 17, count 0 2006.229.15:16:40.86#ibcon#read 3, iclass 17, count 0 2006.229.15:16:40.86#ibcon#about to read 4, iclass 17, count 0 2006.229.15:16:40.86#ibcon#read 4, iclass 17, count 0 2006.229.15:16:40.86#ibcon#about to read 5, iclass 17, count 0 2006.229.15:16:40.86#ibcon#read 5, iclass 17, count 0 2006.229.15:16:40.86#ibcon#about to read 6, iclass 17, count 0 2006.229.15:16:40.86#ibcon#read 6, iclass 17, count 0 2006.229.15:16:40.86#ibcon#end of sib2, iclass 17, count 0 2006.229.15:16:40.86#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:16:40.86#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:16:40.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:16:40.86#ibcon#*before write, iclass 17, count 0 2006.229.15:16:40.86#ibcon#enter sib2, iclass 17, count 0 2006.229.15:16:40.86#ibcon#flushed, iclass 17, count 0 2006.229.15:16:40.86#ibcon#about to write, iclass 17, count 0 2006.229.15:16:40.86#ibcon#wrote, iclass 17, count 0 2006.229.15:16:40.86#ibcon#about to read 3, iclass 17, count 0 2006.229.15:16:40.90#ibcon#read 3, iclass 17, count 0 2006.229.15:16:40.90#ibcon#about to read 4, iclass 17, count 0 2006.229.15:16:40.90#ibcon#read 4, iclass 17, count 0 2006.229.15:16:40.90#ibcon#about to read 5, iclass 17, count 0 2006.229.15:16:40.90#ibcon#read 5, iclass 17, count 0 2006.229.15:16:40.90#ibcon#about to read 6, iclass 17, count 0 2006.229.15:16:40.90#ibcon#read 6, iclass 17, count 0 2006.229.15:16:40.90#ibcon#end of sib2, iclass 17, count 0 2006.229.15:16:40.90#ibcon#*after write, iclass 17, count 0 2006.229.15:16:40.90#ibcon#*before return 0, iclass 17, count 0 2006.229.15:16:40.90#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:16:40.90#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:16:40.90#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:16:40.90#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:16:40.90$vck44/vb=1,4 2006.229.15:16:40.90#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.15:16:40.90#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.15:16:40.90#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:40.90#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:16:40.90#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:16:40.90#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:16:40.90#ibcon#enter wrdev, iclass 19, count 2 2006.229.15:16:40.90#ibcon#first serial, iclass 19, count 2 2006.229.15:16:40.90#ibcon#enter sib2, iclass 19, count 2 2006.229.15:16:40.90#ibcon#flushed, iclass 19, count 2 2006.229.15:16:40.90#ibcon#about to write, iclass 19, count 2 2006.229.15:16:40.90#ibcon#wrote, iclass 19, count 2 2006.229.15:16:40.90#ibcon#about to read 3, iclass 19, count 2 2006.229.15:16:40.92#ibcon#read 3, iclass 19, count 2 2006.229.15:16:40.92#ibcon#about to read 4, iclass 19, count 2 2006.229.15:16:40.92#ibcon#read 4, iclass 19, count 2 2006.229.15:16:40.92#ibcon#about to read 5, iclass 19, count 2 2006.229.15:16:40.92#ibcon#read 5, iclass 19, count 2 2006.229.15:16:40.92#ibcon#about to read 6, iclass 19, count 2 2006.229.15:16:40.92#ibcon#read 6, iclass 19, count 2 2006.229.15:16:40.92#ibcon#end of sib2, iclass 19, count 2 2006.229.15:16:40.92#ibcon#*mode == 0, iclass 19, count 2 2006.229.15:16:40.92#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.15:16:40.92#ibcon#[27=AT01-04\r\n] 2006.229.15:16:40.92#ibcon#*before write, iclass 19, count 2 2006.229.15:16:40.92#ibcon#enter sib2, iclass 19, count 2 2006.229.15:16:40.92#ibcon#flushed, iclass 19, count 2 2006.229.15:16:40.92#ibcon#about to write, iclass 19, count 2 2006.229.15:16:40.92#ibcon#wrote, iclass 19, count 2 2006.229.15:16:40.92#ibcon#about to read 3, iclass 19, count 2 2006.229.15:16:40.95#ibcon#read 3, iclass 19, count 2 2006.229.15:16:40.95#ibcon#about to read 4, iclass 19, count 2 2006.229.15:16:40.95#ibcon#read 4, iclass 19, count 2 2006.229.15:16:40.95#ibcon#about to read 5, iclass 19, count 2 2006.229.15:16:40.95#ibcon#read 5, iclass 19, count 2 2006.229.15:16:40.95#ibcon#about to read 6, iclass 19, count 2 2006.229.15:16:40.95#ibcon#read 6, iclass 19, count 2 2006.229.15:16:40.95#ibcon#end of sib2, iclass 19, count 2 2006.229.15:16:40.95#ibcon#*after write, iclass 19, count 2 2006.229.15:16:40.95#ibcon#*before return 0, iclass 19, count 2 2006.229.15:16:40.95#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:16:40.95#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:16:40.95#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.15:16:40.95#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:40.95#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:16:41.07#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:16:41.07#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:16:41.07#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:16:41.07#ibcon#first serial, iclass 19, count 0 2006.229.15:16:41.07#ibcon#enter sib2, iclass 19, count 0 2006.229.15:16:41.07#ibcon#flushed, iclass 19, count 0 2006.229.15:16:41.07#ibcon#about to write, iclass 19, count 0 2006.229.15:16:41.07#ibcon#wrote, iclass 19, count 0 2006.229.15:16:41.07#ibcon#about to read 3, iclass 19, count 0 2006.229.15:16:41.09#ibcon#read 3, iclass 19, count 0 2006.229.15:16:41.09#ibcon#about to read 4, iclass 19, count 0 2006.229.15:16:41.09#ibcon#read 4, iclass 19, count 0 2006.229.15:16:41.09#ibcon#about to read 5, iclass 19, count 0 2006.229.15:16:41.09#ibcon#read 5, iclass 19, count 0 2006.229.15:16:41.09#ibcon#about to read 6, iclass 19, count 0 2006.229.15:16:41.09#ibcon#read 6, iclass 19, count 0 2006.229.15:16:41.09#ibcon#end of sib2, iclass 19, count 0 2006.229.15:16:41.09#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:16:41.09#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:16:41.09#ibcon#[27=USB\r\n] 2006.229.15:16:41.09#ibcon#*before write, iclass 19, count 0 2006.229.15:16:41.09#ibcon#enter sib2, iclass 19, count 0 2006.229.15:16:41.09#ibcon#flushed, iclass 19, count 0 2006.229.15:16:41.09#ibcon#about to write, iclass 19, count 0 2006.229.15:16:41.09#ibcon#wrote, iclass 19, count 0 2006.229.15:16:41.09#ibcon#about to read 3, iclass 19, count 0 2006.229.15:16:41.12#ibcon#read 3, iclass 19, count 0 2006.229.15:16:41.12#ibcon#about to read 4, iclass 19, count 0 2006.229.15:16:41.12#ibcon#read 4, iclass 19, count 0 2006.229.15:16:41.12#ibcon#about to read 5, iclass 19, count 0 2006.229.15:16:41.12#ibcon#read 5, iclass 19, count 0 2006.229.15:16:41.12#ibcon#about to read 6, iclass 19, count 0 2006.229.15:16:41.12#ibcon#read 6, iclass 19, count 0 2006.229.15:16:41.12#ibcon#end of sib2, iclass 19, count 0 2006.229.15:16:41.12#ibcon#*after write, iclass 19, count 0 2006.229.15:16:41.12#ibcon#*before return 0, iclass 19, count 0 2006.229.15:16:41.12#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:16:41.12#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:16:41.12#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:16:41.12#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:16:41.12$vck44/vblo=2,634.99 2006.229.15:16:41.12#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.15:16:41.12#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.15:16:41.12#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:41.12#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:41.12#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:41.12#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:41.12#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:16:41.12#ibcon#first serial, iclass 21, count 0 2006.229.15:16:41.12#ibcon#enter sib2, iclass 21, count 0 2006.229.15:16:41.12#ibcon#flushed, iclass 21, count 0 2006.229.15:16:41.12#ibcon#about to write, iclass 21, count 0 2006.229.15:16:41.12#ibcon#wrote, iclass 21, count 0 2006.229.15:16:41.12#ibcon#about to read 3, iclass 21, count 0 2006.229.15:16:41.14#ibcon#read 3, iclass 21, count 0 2006.229.15:16:41.14#ibcon#about to read 4, iclass 21, count 0 2006.229.15:16:41.14#ibcon#read 4, iclass 21, count 0 2006.229.15:16:41.14#ibcon#about to read 5, iclass 21, count 0 2006.229.15:16:41.14#ibcon#read 5, iclass 21, count 0 2006.229.15:16:41.14#ibcon#about to read 6, iclass 21, count 0 2006.229.15:16:41.14#ibcon#read 6, iclass 21, count 0 2006.229.15:16:41.14#ibcon#end of sib2, iclass 21, count 0 2006.229.15:16:41.14#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:16:41.14#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:16:41.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:16:41.14#ibcon#*before write, iclass 21, count 0 2006.229.15:16:41.14#ibcon#enter sib2, iclass 21, count 0 2006.229.15:16:41.14#ibcon#flushed, iclass 21, count 0 2006.229.15:16:41.14#ibcon#about to write, iclass 21, count 0 2006.229.15:16:41.14#ibcon#wrote, iclass 21, count 0 2006.229.15:16:41.14#ibcon#about to read 3, iclass 21, count 0 2006.229.15:16:41.18#ibcon#read 3, iclass 21, count 0 2006.229.15:16:41.18#ibcon#about to read 4, iclass 21, count 0 2006.229.15:16:41.18#ibcon#read 4, iclass 21, count 0 2006.229.15:16:41.18#ibcon#about to read 5, iclass 21, count 0 2006.229.15:16:41.18#ibcon#read 5, iclass 21, count 0 2006.229.15:16:41.18#ibcon#about to read 6, iclass 21, count 0 2006.229.15:16:41.18#ibcon#read 6, iclass 21, count 0 2006.229.15:16:41.18#ibcon#end of sib2, iclass 21, count 0 2006.229.15:16:41.18#ibcon#*after write, iclass 21, count 0 2006.229.15:16:41.18#ibcon#*before return 0, iclass 21, count 0 2006.229.15:16:41.18#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:41.18#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:16:41.18#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:16:41.18#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:16:41.18$vck44/vb=2,4 2006.229.15:16:41.18#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.15:16:41.18#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.15:16:41.18#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:41.18#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:41.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:41.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:41.24#ibcon#enter wrdev, iclass 23, count 2 2006.229.15:16:41.24#ibcon#first serial, iclass 23, count 2 2006.229.15:16:41.24#ibcon#enter sib2, iclass 23, count 2 2006.229.15:16:41.24#ibcon#flushed, iclass 23, count 2 2006.229.15:16:41.24#ibcon#about to write, iclass 23, count 2 2006.229.15:16:41.24#ibcon#wrote, iclass 23, count 2 2006.229.15:16:41.24#ibcon#about to read 3, iclass 23, count 2 2006.229.15:16:41.26#ibcon#read 3, iclass 23, count 2 2006.229.15:16:41.26#ibcon#about to read 4, iclass 23, count 2 2006.229.15:16:41.26#ibcon#read 4, iclass 23, count 2 2006.229.15:16:41.26#ibcon#about to read 5, iclass 23, count 2 2006.229.15:16:41.26#ibcon#read 5, iclass 23, count 2 2006.229.15:16:41.26#ibcon#about to read 6, iclass 23, count 2 2006.229.15:16:41.26#ibcon#read 6, iclass 23, count 2 2006.229.15:16:41.26#ibcon#end of sib2, iclass 23, count 2 2006.229.15:16:41.26#ibcon#*mode == 0, iclass 23, count 2 2006.229.15:16:41.26#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.15:16:41.26#ibcon#[27=AT02-04\r\n] 2006.229.15:16:41.26#ibcon#*before write, iclass 23, count 2 2006.229.15:16:41.26#ibcon#enter sib2, iclass 23, count 2 2006.229.15:16:41.26#ibcon#flushed, iclass 23, count 2 2006.229.15:16:41.26#ibcon#about to write, iclass 23, count 2 2006.229.15:16:41.26#ibcon#wrote, iclass 23, count 2 2006.229.15:16:41.26#ibcon#about to read 3, iclass 23, count 2 2006.229.15:16:41.29#ibcon#read 3, iclass 23, count 2 2006.229.15:16:41.29#ibcon#about to read 4, iclass 23, count 2 2006.229.15:16:41.29#ibcon#read 4, iclass 23, count 2 2006.229.15:16:41.29#ibcon#about to read 5, iclass 23, count 2 2006.229.15:16:41.29#ibcon#read 5, iclass 23, count 2 2006.229.15:16:41.29#ibcon#about to read 6, iclass 23, count 2 2006.229.15:16:41.29#ibcon#read 6, iclass 23, count 2 2006.229.15:16:41.29#ibcon#end of sib2, iclass 23, count 2 2006.229.15:16:41.29#ibcon#*after write, iclass 23, count 2 2006.229.15:16:41.29#ibcon#*before return 0, iclass 23, count 2 2006.229.15:16:41.29#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:41.29#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:16:41.29#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.15:16:41.29#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:41.29#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:41.41#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:41.41#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:41.41#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:16:41.41#ibcon#first serial, iclass 23, count 0 2006.229.15:16:41.41#ibcon#enter sib2, iclass 23, count 0 2006.229.15:16:41.41#ibcon#flushed, iclass 23, count 0 2006.229.15:16:41.41#ibcon#about to write, iclass 23, count 0 2006.229.15:16:41.41#ibcon#wrote, iclass 23, count 0 2006.229.15:16:41.41#ibcon#about to read 3, iclass 23, count 0 2006.229.15:16:41.43#ibcon#read 3, iclass 23, count 0 2006.229.15:16:41.43#ibcon#about to read 4, iclass 23, count 0 2006.229.15:16:41.43#ibcon#read 4, iclass 23, count 0 2006.229.15:16:41.43#ibcon#about to read 5, iclass 23, count 0 2006.229.15:16:41.43#ibcon#read 5, iclass 23, count 0 2006.229.15:16:41.43#ibcon#about to read 6, iclass 23, count 0 2006.229.15:16:41.43#ibcon#read 6, iclass 23, count 0 2006.229.15:16:41.43#ibcon#end of sib2, iclass 23, count 0 2006.229.15:16:41.43#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:16:41.43#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:16:41.43#ibcon#[27=USB\r\n] 2006.229.15:16:41.43#ibcon#*before write, iclass 23, count 0 2006.229.15:16:41.43#ibcon#enter sib2, iclass 23, count 0 2006.229.15:16:41.43#ibcon#flushed, iclass 23, count 0 2006.229.15:16:41.43#ibcon#about to write, iclass 23, count 0 2006.229.15:16:41.43#ibcon#wrote, iclass 23, count 0 2006.229.15:16:41.43#ibcon#about to read 3, iclass 23, count 0 2006.229.15:16:41.46#ibcon#read 3, iclass 23, count 0 2006.229.15:16:41.46#ibcon#about to read 4, iclass 23, count 0 2006.229.15:16:41.46#ibcon#read 4, iclass 23, count 0 2006.229.15:16:41.46#ibcon#about to read 5, iclass 23, count 0 2006.229.15:16:41.46#ibcon#read 5, iclass 23, count 0 2006.229.15:16:41.46#ibcon#about to read 6, iclass 23, count 0 2006.229.15:16:41.46#ibcon#read 6, iclass 23, count 0 2006.229.15:16:41.46#ibcon#end of sib2, iclass 23, count 0 2006.229.15:16:41.46#ibcon#*after write, iclass 23, count 0 2006.229.15:16:41.46#ibcon#*before return 0, iclass 23, count 0 2006.229.15:16:41.46#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:41.46#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:16:41.46#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:16:41.46#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:16:41.46$vck44/vblo=3,649.99 2006.229.15:16:41.46#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:16:41.46#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:16:41.46#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:41.46#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:41.46#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:41.46#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:41.46#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:16:41.46#ibcon#first serial, iclass 25, count 0 2006.229.15:16:41.46#ibcon#enter sib2, iclass 25, count 0 2006.229.15:16:41.46#ibcon#flushed, iclass 25, count 0 2006.229.15:16:41.46#ibcon#about to write, iclass 25, count 0 2006.229.15:16:41.46#ibcon#wrote, iclass 25, count 0 2006.229.15:16:41.46#ibcon#about to read 3, iclass 25, count 0 2006.229.15:16:41.48#ibcon#read 3, iclass 25, count 0 2006.229.15:16:41.48#ibcon#about to read 4, iclass 25, count 0 2006.229.15:16:41.48#ibcon#read 4, iclass 25, count 0 2006.229.15:16:41.48#ibcon#about to read 5, iclass 25, count 0 2006.229.15:16:41.48#ibcon#read 5, iclass 25, count 0 2006.229.15:16:41.48#ibcon#about to read 6, iclass 25, count 0 2006.229.15:16:41.48#ibcon#read 6, iclass 25, count 0 2006.229.15:16:41.48#ibcon#end of sib2, iclass 25, count 0 2006.229.15:16:41.48#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:16:41.48#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:16:41.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:16:41.48#ibcon#*before write, iclass 25, count 0 2006.229.15:16:41.48#ibcon#enter sib2, iclass 25, count 0 2006.229.15:16:41.48#ibcon#flushed, iclass 25, count 0 2006.229.15:16:41.48#ibcon#about to write, iclass 25, count 0 2006.229.15:16:41.48#ibcon#wrote, iclass 25, count 0 2006.229.15:16:41.48#ibcon#about to read 3, iclass 25, count 0 2006.229.15:16:41.52#ibcon#read 3, iclass 25, count 0 2006.229.15:16:41.52#ibcon#about to read 4, iclass 25, count 0 2006.229.15:16:41.52#ibcon#read 4, iclass 25, count 0 2006.229.15:16:41.52#ibcon#about to read 5, iclass 25, count 0 2006.229.15:16:41.52#ibcon#read 5, iclass 25, count 0 2006.229.15:16:41.52#ibcon#about to read 6, iclass 25, count 0 2006.229.15:16:41.52#ibcon#read 6, iclass 25, count 0 2006.229.15:16:41.52#ibcon#end of sib2, iclass 25, count 0 2006.229.15:16:41.52#ibcon#*after write, iclass 25, count 0 2006.229.15:16:41.52#ibcon#*before return 0, iclass 25, count 0 2006.229.15:16:41.52#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:41.52#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:16:41.52#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:16:41.52#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:16:41.52$vck44/vb=3,4 2006.229.15:16:41.52#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.15:16:41.52#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.15:16:41.52#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:41.52#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:41.58#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:41.58#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:41.58#ibcon#enter wrdev, iclass 27, count 2 2006.229.15:16:41.58#ibcon#first serial, iclass 27, count 2 2006.229.15:16:41.58#ibcon#enter sib2, iclass 27, count 2 2006.229.15:16:41.58#ibcon#flushed, iclass 27, count 2 2006.229.15:16:41.58#ibcon#about to write, iclass 27, count 2 2006.229.15:16:41.58#ibcon#wrote, iclass 27, count 2 2006.229.15:16:41.58#ibcon#about to read 3, iclass 27, count 2 2006.229.15:16:41.60#ibcon#read 3, iclass 27, count 2 2006.229.15:16:41.60#ibcon#about to read 4, iclass 27, count 2 2006.229.15:16:41.60#ibcon#read 4, iclass 27, count 2 2006.229.15:16:41.60#ibcon#about to read 5, iclass 27, count 2 2006.229.15:16:41.60#ibcon#read 5, iclass 27, count 2 2006.229.15:16:41.60#ibcon#about to read 6, iclass 27, count 2 2006.229.15:16:41.60#ibcon#read 6, iclass 27, count 2 2006.229.15:16:41.60#ibcon#end of sib2, iclass 27, count 2 2006.229.15:16:41.60#ibcon#*mode == 0, iclass 27, count 2 2006.229.15:16:41.60#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.15:16:41.60#ibcon#[27=AT03-04\r\n] 2006.229.15:16:41.60#ibcon#*before write, iclass 27, count 2 2006.229.15:16:41.60#ibcon#enter sib2, iclass 27, count 2 2006.229.15:16:41.60#ibcon#flushed, iclass 27, count 2 2006.229.15:16:41.60#ibcon#about to write, iclass 27, count 2 2006.229.15:16:41.60#ibcon#wrote, iclass 27, count 2 2006.229.15:16:41.60#ibcon#about to read 3, iclass 27, count 2 2006.229.15:16:41.63#ibcon#read 3, iclass 27, count 2 2006.229.15:16:41.63#ibcon#about to read 4, iclass 27, count 2 2006.229.15:16:41.63#ibcon#read 4, iclass 27, count 2 2006.229.15:16:41.63#ibcon#about to read 5, iclass 27, count 2 2006.229.15:16:41.63#ibcon#read 5, iclass 27, count 2 2006.229.15:16:41.63#ibcon#about to read 6, iclass 27, count 2 2006.229.15:16:41.63#ibcon#read 6, iclass 27, count 2 2006.229.15:16:41.63#ibcon#end of sib2, iclass 27, count 2 2006.229.15:16:41.63#ibcon#*after write, iclass 27, count 2 2006.229.15:16:41.63#ibcon#*before return 0, iclass 27, count 2 2006.229.15:16:41.63#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:41.63#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:16:41.63#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.15:16:41.63#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:41.63#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:41.75#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:41.75#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:41.75#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:16:41.75#ibcon#first serial, iclass 27, count 0 2006.229.15:16:41.75#ibcon#enter sib2, iclass 27, count 0 2006.229.15:16:41.75#ibcon#flushed, iclass 27, count 0 2006.229.15:16:41.75#ibcon#about to write, iclass 27, count 0 2006.229.15:16:41.75#ibcon#wrote, iclass 27, count 0 2006.229.15:16:41.75#ibcon#about to read 3, iclass 27, count 0 2006.229.15:16:41.77#ibcon#read 3, iclass 27, count 0 2006.229.15:16:41.77#ibcon#about to read 4, iclass 27, count 0 2006.229.15:16:41.77#ibcon#read 4, iclass 27, count 0 2006.229.15:16:41.77#ibcon#about to read 5, iclass 27, count 0 2006.229.15:16:41.77#ibcon#read 5, iclass 27, count 0 2006.229.15:16:41.77#ibcon#about to read 6, iclass 27, count 0 2006.229.15:16:41.77#ibcon#read 6, iclass 27, count 0 2006.229.15:16:41.77#ibcon#end of sib2, iclass 27, count 0 2006.229.15:16:41.77#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:16:41.77#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:16:41.77#ibcon#[27=USB\r\n] 2006.229.15:16:41.77#ibcon#*before write, iclass 27, count 0 2006.229.15:16:41.77#ibcon#enter sib2, iclass 27, count 0 2006.229.15:16:41.77#ibcon#flushed, iclass 27, count 0 2006.229.15:16:41.77#ibcon#about to write, iclass 27, count 0 2006.229.15:16:41.77#ibcon#wrote, iclass 27, count 0 2006.229.15:16:41.77#ibcon#about to read 3, iclass 27, count 0 2006.229.15:16:41.80#ibcon#read 3, iclass 27, count 0 2006.229.15:16:41.80#ibcon#about to read 4, iclass 27, count 0 2006.229.15:16:41.80#ibcon#read 4, iclass 27, count 0 2006.229.15:16:41.80#ibcon#about to read 5, iclass 27, count 0 2006.229.15:16:41.80#ibcon#read 5, iclass 27, count 0 2006.229.15:16:41.80#ibcon#about to read 6, iclass 27, count 0 2006.229.15:16:41.80#ibcon#read 6, iclass 27, count 0 2006.229.15:16:41.80#ibcon#end of sib2, iclass 27, count 0 2006.229.15:16:41.80#ibcon#*after write, iclass 27, count 0 2006.229.15:16:41.80#ibcon#*before return 0, iclass 27, count 0 2006.229.15:16:41.80#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:41.80#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:16:41.80#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:16:41.80#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:16:41.80$vck44/vblo=4,679.99 2006.229.15:16:41.80#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.15:16:41.80#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.15:16:41.80#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:41.80#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:41.80#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:41.80#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:41.80#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:16:41.80#ibcon#first serial, iclass 29, count 0 2006.229.15:16:41.80#ibcon#enter sib2, iclass 29, count 0 2006.229.15:16:41.80#ibcon#flushed, iclass 29, count 0 2006.229.15:16:41.80#ibcon#about to write, iclass 29, count 0 2006.229.15:16:41.80#ibcon#wrote, iclass 29, count 0 2006.229.15:16:41.80#ibcon#about to read 3, iclass 29, count 0 2006.229.15:16:41.82#ibcon#read 3, iclass 29, count 0 2006.229.15:16:41.82#ibcon#about to read 4, iclass 29, count 0 2006.229.15:16:41.82#ibcon#read 4, iclass 29, count 0 2006.229.15:16:41.82#ibcon#about to read 5, iclass 29, count 0 2006.229.15:16:41.82#ibcon#read 5, iclass 29, count 0 2006.229.15:16:41.82#ibcon#about to read 6, iclass 29, count 0 2006.229.15:16:41.82#ibcon#read 6, iclass 29, count 0 2006.229.15:16:41.82#ibcon#end of sib2, iclass 29, count 0 2006.229.15:16:41.82#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:16:41.82#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:16:41.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:16:41.82#ibcon#*before write, iclass 29, count 0 2006.229.15:16:41.82#ibcon#enter sib2, iclass 29, count 0 2006.229.15:16:41.82#ibcon#flushed, iclass 29, count 0 2006.229.15:16:41.82#ibcon#about to write, iclass 29, count 0 2006.229.15:16:41.82#ibcon#wrote, iclass 29, count 0 2006.229.15:16:41.82#ibcon#about to read 3, iclass 29, count 0 2006.229.15:16:41.86#ibcon#read 3, iclass 29, count 0 2006.229.15:16:41.86#ibcon#about to read 4, iclass 29, count 0 2006.229.15:16:41.86#ibcon#read 4, iclass 29, count 0 2006.229.15:16:41.86#ibcon#about to read 5, iclass 29, count 0 2006.229.15:16:41.86#ibcon#read 5, iclass 29, count 0 2006.229.15:16:41.86#ibcon#about to read 6, iclass 29, count 0 2006.229.15:16:41.86#ibcon#read 6, iclass 29, count 0 2006.229.15:16:41.86#ibcon#end of sib2, iclass 29, count 0 2006.229.15:16:41.86#ibcon#*after write, iclass 29, count 0 2006.229.15:16:41.86#ibcon#*before return 0, iclass 29, count 0 2006.229.15:16:41.86#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:41.86#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:16:41.86#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:16:41.86#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:16:41.86$vck44/vb=4,4 2006.229.15:16:41.86#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.15:16:41.86#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.15:16:41.86#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:41.86#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:41.92#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:41.92#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:41.92#ibcon#enter wrdev, iclass 31, count 2 2006.229.15:16:41.92#ibcon#first serial, iclass 31, count 2 2006.229.15:16:41.92#ibcon#enter sib2, iclass 31, count 2 2006.229.15:16:41.92#ibcon#flushed, iclass 31, count 2 2006.229.15:16:41.92#ibcon#about to write, iclass 31, count 2 2006.229.15:16:41.92#ibcon#wrote, iclass 31, count 2 2006.229.15:16:41.92#ibcon#about to read 3, iclass 31, count 2 2006.229.15:16:41.94#ibcon#read 3, iclass 31, count 2 2006.229.15:16:41.94#ibcon#about to read 4, iclass 31, count 2 2006.229.15:16:41.94#ibcon#read 4, iclass 31, count 2 2006.229.15:16:41.94#ibcon#about to read 5, iclass 31, count 2 2006.229.15:16:41.94#ibcon#read 5, iclass 31, count 2 2006.229.15:16:41.94#ibcon#about to read 6, iclass 31, count 2 2006.229.15:16:41.94#ibcon#read 6, iclass 31, count 2 2006.229.15:16:41.94#ibcon#end of sib2, iclass 31, count 2 2006.229.15:16:41.94#ibcon#*mode == 0, iclass 31, count 2 2006.229.15:16:41.94#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.15:16:41.94#ibcon#[27=AT04-04\r\n] 2006.229.15:16:41.94#ibcon#*before write, iclass 31, count 2 2006.229.15:16:41.94#ibcon#enter sib2, iclass 31, count 2 2006.229.15:16:41.94#ibcon#flushed, iclass 31, count 2 2006.229.15:16:41.94#ibcon#about to write, iclass 31, count 2 2006.229.15:16:41.94#ibcon#wrote, iclass 31, count 2 2006.229.15:16:41.94#ibcon#about to read 3, iclass 31, count 2 2006.229.15:16:41.97#ibcon#read 3, iclass 31, count 2 2006.229.15:16:41.97#ibcon#about to read 4, iclass 31, count 2 2006.229.15:16:41.97#ibcon#read 4, iclass 31, count 2 2006.229.15:16:41.97#ibcon#about to read 5, iclass 31, count 2 2006.229.15:16:41.97#ibcon#read 5, iclass 31, count 2 2006.229.15:16:41.97#ibcon#about to read 6, iclass 31, count 2 2006.229.15:16:41.97#ibcon#read 6, iclass 31, count 2 2006.229.15:16:41.97#ibcon#end of sib2, iclass 31, count 2 2006.229.15:16:41.97#ibcon#*after write, iclass 31, count 2 2006.229.15:16:41.97#ibcon#*before return 0, iclass 31, count 2 2006.229.15:16:41.97#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:41.97#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:16:41.97#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.15:16:41.97#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:41.97#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:42.09#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:42.09#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:42.09#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:16:42.09#ibcon#first serial, iclass 31, count 0 2006.229.15:16:42.09#ibcon#enter sib2, iclass 31, count 0 2006.229.15:16:42.09#ibcon#flushed, iclass 31, count 0 2006.229.15:16:42.09#ibcon#about to write, iclass 31, count 0 2006.229.15:16:42.09#ibcon#wrote, iclass 31, count 0 2006.229.15:16:42.09#ibcon#about to read 3, iclass 31, count 0 2006.229.15:16:42.11#ibcon#read 3, iclass 31, count 0 2006.229.15:16:42.11#ibcon#about to read 4, iclass 31, count 0 2006.229.15:16:42.11#ibcon#read 4, iclass 31, count 0 2006.229.15:16:42.11#ibcon#about to read 5, iclass 31, count 0 2006.229.15:16:42.11#ibcon#read 5, iclass 31, count 0 2006.229.15:16:42.11#ibcon#about to read 6, iclass 31, count 0 2006.229.15:16:42.11#ibcon#read 6, iclass 31, count 0 2006.229.15:16:42.11#ibcon#end of sib2, iclass 31, count 0 2006.229.15:16:42.11#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:16:42.11#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:16:42.11#ibcon#[27=USB\r\n] 2006.229.15:16:42.11#ibcon#*before write, iclass 31, count 0 2006.229.15:16:42.11#ibcon#enter sib2, iclass 31, count 0 2006.229.15:16:42.11#ibcon#flushed, iclass 31, count 0 2006.229.15:16:42.11#ibcon#about to write, iclass 31, count 0 2006.229.15:16:42.11#ibcon#wrote, iclass 31, count 0 2006.229.15:16:42.11#ibcon#about to read 3, iclass 31, count 0 2006.229.15:16:42.14#ibcon#read 3, iclass 31, count 0 2006.229.15:16:42.14#ibcon#about to read 4, iclass 31, count 0 2006.229.15:16:42.14#ibcon#read 4, iclass 31, count 0 2006.229.15:16:42.14#ibcon#about to read 5, iclass 31, count 0 2006.229.15:16:42.14#ibcon#read 5, iclass 31, count 0 2006.229.15:16:42.14#ibcon#about to read 6, iclass 31, count 0 2006.229.15:16:42.14#ibcon#read 6, iclass 31, count 0 2006.229.15:16:42.14#ibcon#end of sib2, iclass 31, count 0 2006.229.15:16:42.14#ibcon#*after write, iclass 31, count 0 2006.229.15:16:42.14#ibcon#*before return 0, iclass 31, count 0 2006.229.15:16:42.14#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:42.14#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:16:42.14#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:16:42.14#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:16:42.14$vck44/vblo=5,709.99 2006.229.15:16:42.14#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.15:16:42.14#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.15:16:42.14#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:42.14#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:42.14#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:42.14#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:42.14#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:16:42.14#ibcon#first serial, iclass 33, count 0 2006.229.15:16:42.14#ibcon#enter sib2, iclass 33, count 0 2006.229.15:16:42.14#ibcon#flushed, iclass 33, count 0 2006.229.15:16:42.14#ibcon#about to write, iclass 33, count 0 2006.229.15:16:42.14#ibcon#wrote, iclass 33, count 0 2006.229.15:16:42.14#ibcon#about to read 3, iclass 33, count 0 2006.229.15:16:42.16#ibcon#read 3, iclass 33, count 0 2006.229.15:16:42.16#ibcon#about to read 4, iclass 33, count 0 2006.229.15:16:42.16#ibcon#read 4, iclass 33, count 0 2006.229.15:16:42.16#ibcon#about to read 5, iclass 33, count 0 2006.229.15:16:42.16#ibcon#read 5, iclass 33, count 0 2006.229.15:16:42.16#ibcon#about to read 6, iclass 33, count 0 2006.229.15:16:42.16#ibcon#read 6, iclass 33, count 0 2006.229.15:16:42.16#ibcon#end of sib2, iclass 33, count 0 2006.229.15:16:42.16#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:16:42.16#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:16:42.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:16:42.16#ibcon#*before write, iclass 33, count 0 2006.229.15:16:42.16#ibcon#enter sib2, iclass 33, count 0 2006.229.15:16:42.16#ibcon#flushed, iclass 33, count 0 2006.229.15:16:42.16#ibcon#about to write, iclass 33, count 0 2006.229.15:16:42.16#ibcon#wrote, iclass 33, count 0 2006.229.15:16:42.16#ibcon#about to read 3, iclass 33, count 0 2006.229.15:16:42.20#ibcon#read 3, iclass 33, count 0 2006.229.15:16:42.20#ibcon#about to read 4, iclass 33, count 0 2006.229.15:16:42.20#ibcon#read 4, iclass 33, count 0 2006.229.15:16:42.20#ibcon#about to read 5, iclass 33, count 0 2006.229.15:16:42.20#ibcon#read 5, iclass 33, count 0 2006.229.15:16:42.20#ibcon#about to read 6, iclass 33, count 0 2006.229.15:16:42.20#ibcon#read 6, iclass 33, count 0 2006.229.15:16:42.20#ibcon#end of sib2, iclass 33, count 0 2006.229.15:16:42.20#ibcon#*after write, iclass 33, count 0 2006.229.15:16:42.20#ibcon#*before return 0, iclass 33, count 0 2006.229.15:16:42.20#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:42.20#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:16:42.20#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:16:42.20#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:16:42.20$vck44/vb=5,4 2006.229.15:16:42.20#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.15:16:42.20#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.15:16:42.20#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:42.20#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:42.26#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:42.26#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:42.26#ibcon#enter wrdev, iclass 35, count 2 2006.229.15:16:42.26#ibcon#first serial, iclass 35, count 2 2006.229.15:16:42.26#ibcon#enter sib2, iclass 35, count 2 2006.229.15:16:42.26#ibcon#flushed, iclass 35, count 2 2006.229.15:16:42.26#ibcon#about to write, iclass 35, count 2 2006.229.15:16:42.26#ibcon#wrote, iclass 35, count 2 2006.229.15:16:42.26#ibcon#about to read 3, iclass 35, count 2 2006.229.15:16:42.28#ibcon#read 3, iclass 35, count 2 2006.229.15:16:42.28#ibcon#about to read 4, iclass 35, count 2 2006.229.15:16:42.28#ibcon#read 4, iclass 35, count 2 2006.229.15:16:42.28#ibcon#about to read 5, iclass 35, count 2 2006.229.15:16:42.28#ibcon#read 5, iclass 35, count 2 2006.229.15:16:42.28#ibcon#about to read 6, iclass 35, count 2 2006.229.15:16:42.28#ibcon#read 6, iclass 35, count 2 2006.229.15:16:42.28#ibcon#end of sib2, iclass 35, count 2 2006.229.15:16:42.28#ibcon#*mode == 0, iclass 35, count 2 2006.229.15:16:42.28#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.15:16:42.28#ibcon#[27=AT05-04\r\n] 2006.229.15:16:42.28#ibcon#*before write, iclass 35, count 2 2006.229.15:16:42.28#ibcon#enter sib2, iclass 35, count 2 2006.229.15:16:42.28#ibcon#flushed, iclass 35, count 2 2006.229.15:16:42.28#ibcon#about to write, iclass 35, count 2 2006.229.15:16:42.28#ibcon#wrote, iclass 35, count 2 2006.229.15:16:42.28#ibcon#about to read 3, iclass 35, count 2 2006.229.15:16:42.31#ibcon#read 3, iclass 35, count 2 2006.229.15:16:42.31#ibcon#about to read 4, iclass 35, count 2 2006.229.15:16:42.31#ibcon#read 4, iclass 35, count 2 2006.229.15:16:42.31#ibcon#about to read 5, iclass 35, count 2 2006.229.15:16:42.31#ibcon#read 5, iclass 35, count 2 2006.229.15:16:42.31#ibcon#about to read 6, iclass 35, count 2 2006.229.15:16:42.31#ibcon#read 6, iclass 35, count 2 2006.229.15:16:42.31#ibcon#end of sib2, iclass 35, count 2 2006.229.15:16:42.31#ibcon#*after write, iclass 35, count 2 2006.229.15:16:42.31#ibcon#*before return 0, iclass 35, count 2 2006.229.15:16:42.31#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:42.31#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:16:42.31#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.15:16:42.31#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:42.31#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:42.43#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:42.43#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:42.43#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:16:42.43#ibcon#first serial, iclass 35, count 0 2006.229.15:16:42.43#ibcon#enter sib2, iclass 35, count 0 2006.229.15:16:42.43#ibcon#flushed, iclass 35, count 0 2006.229.15:16:42.43#ibcon#about to write, iclass 35, count 0 2006.229.15:16:42.43#ibcon#wrote, iclass 35, count 0 2006.229.15:16:42.43#ibcon#about to read 3, iclass 35, count 0 2006.229.15:16:42.45#ibcon#read 3, iclass 35, count 0 2006.229.15:16:42.45#ibcon#about to read 4, iclass 35, count 0 2006.229.15:16:42.45#ibcon#read 4, iclass 35, count 0 2006.229.15:16:42.45#ibcon#about to read 5, iclass 35, count 0 2006.229.15:16:42.45#ibcon#read 5, iclass 35, count 0 2006.229.15:16:42.45#ibcon#about to read 6, iclass 35, count 0 2006.229.15:16:42.45#ibcon#read 6, iclass 35, count 0 2006.229.15:16:42.45#ibcon#end of sib2, iclass 35, count 0 2006.229.15:16:42.45#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:16:42.45#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:16:42.45#ibcon#[27=USB\r\n] 2006.229.15:16:42.45#ibcon#*before write, iclass 35, count 0 2006.229.15:16:42.45#ibcon#enter sib2, iclass 35, count 0 2006.229.15:16:42.45#ibcon#flushed, iclass 35, count 0 2006.229.15:16:42.45#ibcon#about to write, iclass 35, count 0 2006.229.15:16:42.45#ibcon#wrote, iclass 35, count 0 2006.229.15:16:42.45#ibcon#about to read 3, iclass 35, count 0 2006.229.15:16:42.48#ibcon#read 3, iclass 35, count 0 2006.229.15:16:42.48#ibcon#about to read 4, iclass 35, count 0 2006.229.15:16:42.48#ibcon#read 4, iclass 35, count 0 2006.229.15:16:42.48#ibcon#about to read 5, iclass 35, count 0 2006.229.15:16:42.48#ibcon#read 5, iclass 35, count 0 2006.229.15:16:42.48#ibcon#about to read 6, iclass 35, count 0 2006.229.15:16:42.48#ibcon#read 6, iclass 35, count 0 2006.229.15:16:42.48#ibcon#end of sib2, iclass 35, count 0 2006.229.15:16:42.48#ibcon#*after write, iclass 35, count 0 2006.229.15:16:42.48#ibcon#*before return 0, iclass 35, count 0 2006.229.15:16:42.48#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:42.48#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:16:42.48#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:16:42.48#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:16:42.48$vck44/vblo=6,719.99 2006.229.15:16:42.48#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.15:16:42.48#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.15:16:42.48#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:42.48#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:42.48#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:42.48#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:42.48#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:16:42.48#ibcon#first serial, iclass 37, count 0 2006.229.15:16:42.48#ibcon#enter sib2, iclass 37, count 0 2006.229.15:16:42.48#ibcon#flushed, iclass 37, count 0 2006.229.15:16:42.48#ibcon#about to write, iclass 37, count 0 2006.229.15:16:42.48#ibcon#wrote, iclass 37, count 0 2006.229.15:16:42.48#ibcon#about to read 3, iclass 37, count 0 2006.229.15:16:42.50#ibcon#read 3, iclass 37, count 0 2006.229.15:16:42.50#ibcon#about to read 4, iclass 37, count 0 2006.229.15:16:42.50#ibcon#read 4, iclass 37, count 0 2006.229.15:16:42.50#ibcon#about to read 5, iclass 37, count 0 2006.229.15:16:42.50#ibcon#read 5, iclass 37, count 0 2006.229.15:16:42.50#ibcon#about to read 6, iclass 37, count 0 2006.229.15:16:42.50#ibcon#read 6, iclass 37, count 0 2006.229.15:16:42.50#ibcon#end of sib2, iclass 37, count 0 2006.229.15:16:42.50#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:16:42.50#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:16:42.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:16:42.50#ibcon#*before write, iclass 37, count 0 2006.229.15:16:42.50#ibcon#enter sib2, iclass 37, count 0 2006.229.15:16:42.50#ibcon#flushed, iclass 37, count 0 2006.229.15:16:42.50#ibcon#about to write, iclass 37, count 0 2006.229.15:16:42.50#ibcon#wrote, iclass 37, count 0 2006.229.15:16:42.50#ibcon#about to read 3, iclass 37, count 0 2006.229.15:16:42.54#ibcon#read 3, iclass 37, count 0 2006.229.15:16:42.54#ibcon#about to read 4, iclass 37, count 0 2006.229.15:16:42.54#ibcon#read 4, iclass 37, count 0 2006.229.15:16:42.54#ibcon#about to read 5, iclass 37, count 0 2006.229.15:16:42.54#ibcon#read 5, iclass 37, count 0 2006.229.15:16:42.54#ibcon#about to read 6, iclass 37, count 0 2006.229.15:16:42.54#ibcon#read 6, iclass 37, count 0 2006.229.15:16:42.54#ibcon#end of sib2, iclass 37, count 0 2006.229.15:16:42.54#ibcon#*after write, iclass 37, count 0 2006.229.15:16:42.54#ibcon#*before return 0, iclass 37, count 0 2006.229.15:16:42.54#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:42.54#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:16:42.54#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:16:42.54#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:16:42.54$vck44/vb=6,4 2006.229.15:16:42.54#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.15:16:42.54#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.15:16:42.54#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:42.54#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:42.60#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:42.60#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:42.60#ibcon#enter wrdev, iclass 39, count 2 2006.229.15:16:42.60#ibcon#first serial, iclass 39, count 2 2006.229.15:16:42.60#ibcon#enter sib2, iclass 39, count 2 2006.229.15:16:42.60#ibcon#flushed, iclass 39, count 2 2006.229.15:16:42.60#ibcon#about to write, iclass 39, count 2 2006.229.15:16:42.60#ibcon#wrote, iclass 39, count 2 2006.229.15:16:42.60#ibcon#about to read 3, iclass 39, count 2 2006.229.15:16:42.62#ibcon#read 3, iclass 39, count 2 2006.229.15:16:42.62#ibcon#about to read 4, iclass 39, count 2 2006.229.15:16:42.62#ibcon#read 4, iclass 39, count 2 2006.229.15:16:42.62#ibcon#about to read 5, iclass 39, count 2 2006.229.15:16:42.62#ibcon#read 5, iclass 39, count 2 2006.229.15:16:42.62#ibcon#about to read 6, iclass 39, count 2 2006.229.15:16:42.62#ibcon#read 6, iclass 39, count 2 2006.229.15:16:42.62#ibcon#end of sib2, iclass 39, count 2 2006.229.15:16:42.62#ibcon#*mode == 0, iclass 39, count 2 2006.229.15:16:42.62#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.15:16:42.62#ibcon#[27=AT06-04\r\n] 2006.229.15:16:42.62#ibcon#*before write, iclass 39, count 2 2006.229.15:16:42.62#ibcon#enter sib2, iclass 39, count 2 2006.229.15:16:42.62#ibcon#flushed, iclass 39, count 2 2006.229.15:16:42.62#ibcon#about to write, iclass 39, count 2 2006.229.15:16:42.62#ibcon#wrote, iclass 39, count 2 2006.229.15:16:42.62#ibcon#about to read 3, iclass 39, count 2 2006.229.15:16:42.65#ibcon#read 3, iclass 39, count 2 2006.229.15:16:42.65#ibcon#about to read 4, iclass 39, count 2 2006.229.15:16:42.65#ibcon#read 4, iclass 39, count 2 2006.229.15:16:42.65#ibcon#about to read 5, iclass 39, count 2 2006.229.15:16:42.65#ibcon#read 5, iclass 39, count 2 2006.229.15:16:42.65#ibcon#about to read 6, iclass 39, count 2 2006.229.15:16:42.65#ibcon#read 6, iclass 39, count 2 2006.229.15:16:42.65#ibcon#end of sib2, iclass 39, count 2 2006.229.15:16:42.65#ibcon#*after write, iclass 39, count 2 2006.229.15:16:42.65#ibcon#*before return 0, iclass 39, count 2 2006.229.15:16:42.65#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:42.65#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:16:42.65#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.15:16:42.65#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:42.65#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:42.77#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:42.77#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:42.77#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:16:42.77#ibcon#first serial, iclass 39, count 0 2006.229.15:16:42.77#ibcon#enter sib2, iclass 39, count 0 2006.229.15:16:42.77#ibcon#flushed, iclass 39, count 0 2006.229.15:16:42.77#ibcon#about to write, iclass 39, count 0 2006.229.15:16:42.77#ibcon#wrote, iclass 39, count 0 2006.229.15:16:42.77#ibcon#about to read 3, iclass 39, count 0 2006.229.15:16:42.79#ibcon#read 3, iclass 39, count 0 2006.229.15:16:42.79#ibcon#about to read 4, iclass 39, count 0 2006.229.15:16:42.79#ibcon#read 4, iclass 39, count 0 2006.229.15:16:42.79#ibcon#about to read 5, iclass 39, count 0 2006.229.15:16:42.79#ibcon#read 5, iclass 39, count 0 2006.229.15:16:42.79#ibcon#about to read 6, iclass 39, count 0 2006.229.15:16:42.79#ibcon#read 6, iclass 39, count 0 2006.229.15:16:42.79#ibcon#end of sib2, iclass 39, count 0 2006.229.15:16:42.79#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:16:42.79#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:16:42.79#ibcon#[27=USB\r\n] 2006.229.15:16:42.79#ibcon#*before write, iclass 39, count 0 2006.229.15:16:42.79#ibcon#enter sib2, iclass 39, count 0 2006.229.15:16:42.79#ibcon#flushed, iclass 39, count 0 2006.229.15:16:42.79#ibcon#about to write, iclass 39, count 0 2006.229.15:16:42.79#ibcon#wrote, iclass 39, count 0 2006.229.15:16:42.79#ibcon#about to read 3, iclass 39, count 0 2006.229.15:16:42.82#ibcon#read 3, iclass 39, count 0 2006.229.15:16:42.82#ibcon#about to read 4, iclass 39, count 0 2006.229.15:16:42.82#ibcon#read 4, iclass 39, count 0 2006.229.15:16:42.82#ibcon#about to read 5, iclass 39, count 0 2006.229.15:16:42.82#ibcon#read 5, iclass 39, count 0 2006.229.15:16:42.82#ibcon#about to read 6, iclass 39, count 0 2006.229.15:16:42.82#ibcon#read 6, iclass 39, count 0 2006.229.15:16:42.82#ibcon#end of sib2, iclass 39, count 0 2006.229.15:16:42.82#ibcon#*after write, iclass 39, count 0 2006.229.15:16:42.82#ibcon#*before return 0, iclass 39, count 0 2006.229.15:16:42.82#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:42.82#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:16:42.82#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:16:42.82#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:16:42.82$vck44/vblo=7,734.99 2006.229.15:16:42.82#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:16:42.82#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:16:42.82#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:42.82#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:42.82#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:42.82#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:42.82#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:16:42.82#ibcon#first serial, iclass 3, count 0 2006.229.15:16:42.82#ibcon#enter sib2, iclass 3, count 0 2006.229.15:16:42.82#ibcon#flushed, iclass 3, count 0 2006.229.15:16:42.82#ibcon#about to write, iclass 3, count 0 2006.229.15:16:42.82#ibcon#wrote, iclass 3, count 0 2006.229.15:16:42.82#ibcon#about to read 3, iclass 3, count 0 2006.229.15:16:42.84#ibcon#read 3, iclass 3, count 0 2006.229.15:16:42.84#ibcon#about to read 4, iclass 3, count 0 2006.229.15:16:42.84#ibcon#read 4, iclass 3, count 0 2006.229.15:16:42.84#ibcon#about to read 5, iclass 3, count 0 2006.229.15:16:42.84#ibcon#read 5, iclass 3, count 0 2006.229.15:16:42.84#ibcon#about to read 6, iclass 3, count 0 2006.229.15:16:42.84#ibcon#read 6, iclass 3, count 0 2006.229.15:16:42.84#ibcon#end of sib2, iclass 3, count 0 2006.229.15:16:42.84#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:16:42.84#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:16:42.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:16:42.84#ibcon#*before write, iclass 3, count 0 2006.229.15:16:42.84#ibcon#enter sib2, iclass 3, count 0 2006.229.15:16:42.84#ibcon#flushed, iclass 3, count 0 2006.229.15:16:42.84#ibcon#about to write, iclass 3, count 0 2006.229.15:16:42.84#ibcon#wrote, iclass 3, count 0 2006.229.15:16:42.84#ibcon#about to read 3, iclass 3, count 0 2006.229.15:16:42.88#ibcon#read 3, iclass 3, count 0 2006.229.15:16:42.88#ibcon#about to read 4, iclass 3, count 0 2006.229.15:16:42.88#ibcon#read 4, iclass 3, count 0 2006.229.15:16:42.88#ibcon#about to read 5, iclass 3, count 0 2006.229.15:16:42.88#ibcon#read 5, iclass 3, count 0 2006.229.15:16:42.88#ibcon#about to read 6, iclass 3, count 0 2006.229.15:16:42.88#ibcon#read 6, iclass 3, count 0 2006.229.15:16:42.88#ibcon#end of sib2, iclass 3, count 0 2006.229.15:16:42.88#ibcon#*after write, iclass 3, count 0 2006.229.15:16:42.88#ibcon#*before return 0, iclass 3, count 0 2006.229.15:16:42.88#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:42.88#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:16:42.88#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:16:42.88#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:16:42.88$vck44/vb=7,4 2006.229.15:16:42.88#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.15:16:42.88#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.15:16:42.88#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:42.88#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:42.94#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:42.94#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:42.94#ibcon#enter wrdev, iclass 5, count 2 2006.229.15:16:42.94#ibcon#first serial, iclass 5, count 2 2006.229.15:16:42.94#ibcon#enter sib2, iclass 5, count 2 2006.229.15:16:42.94#ibcon#flushed, iclass 5, count 2 2006.229.15:16:42.94#ibcon#about to write, iclass 5, count 2 2006.229.15:16:42.94#ibcon#wrote, iclass 5, count 2 2006.229.15:16:42.94#ibcon#about to read 3, iclass 5, count 2 2006.229.15:16:42.96#ibcon#read 3, iclass 5, count 2 2006.229.15:16:42.96#ibcon#about to read 4, iclass 5, count 2 2006.229.15:16:42.96#ibcon#read 4, iclass 5, count 2 2006.229.15:16:42.96#ibcon#about to read 5, iclass 5, count 2 2006.229.15:16:42.96#ibcon#read 5, iclass 5, count 2 2006.229.15:16:42.96#ibcon#about to read 6, iclass 5, count 2 2006.229.15:16:42.96#ibcon#read 6, iclass 5, count 2 2006.229.15:16:42.96#ibcon#end of sib2, iclass 5, count 2 2006.229.15:16:42.96#ibcon#*mode == 0, iclass 5, count 2 2006.229.15:16:42.96#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.15:16:42.96#ibcon#[27=AT07-04\r\n] 2006.229.15:16:42.96#ibcon#*before write, iclass 5, count 2 2006.229.15:16:42.96#ibcon#enter sib2, iclass 5, count 2 2006.229.15:16:42.96#ibcon#flushed, iclass 5, count 2 2006.229.15:16:42.96#ibcon#about to write, iclass 5, count 2 2006.229.15:16:42.96#ibcon#wrote, iclass 5, count 2 2006.229.15:16:42.96#ibcon#about to read 3, iclass 5, count 2 2006.229.15:16:42.99#ibcon#read 3, iclass 5, count 2 2006.229.15:16:42.99#ibcon#about to read 4, iclass 5, count 2 2006.229.15:16:42.99#ibcon#read 4, iclass 5, count 2 2006.229.15:16:42.99#ibcon#about to read 5, iclass 5, count 2 2006.229.15:16:42.99#ibcon#read 5, iclass 5, count 2 2006.229.15:16:42.99#ibcon#about to read 6, iclass 5, count 2 2006.229.15:16:42.99#ibcon#read 6, iclass 5, count 2 2006.229.15:16:42.99#ibcon#end of sib2, iclass 5, count 2 2006.229.15:16:42.99#ibcon#*after write, iclass 5, count 2 2006.229.15:16:42.99#ibcon#*before return 0, iclass 5, count 2 2006.229.15:16:42.99#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:42.99#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:16:42.99#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.15:16:42.99#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:42.99#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:43.11#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:43.11#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:43.11#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:16:43.11#ibcon#first serial, iclass 5, count 0 2006.229.15:16:43.11#ibcon#enter sib2, iclass 5, count 0 2006.229.15:16:43.11#ibcon#flushed, iclass 5, count 0 2006.229.15:16:43.11#ibcon#about to write, iclass 5, count 0 2006.229.15:16:43.11#ibcon#wrote, iclass 5, count 0 2006.229.15:16:43.11#ibcon#about to read 3, iclass 5, count 0 2006.229.15:16:43.13#ibcon#read 3, iclass 5, count 0 2006.229.15:16:43.13#ibcon#about to read 4, iclass 5, count 0 2006.229.15:16:43.13#ibcon#read 4, iclass 5, count 0 2006.229.15:16:43.13#ibcon#about to read 5, iclass 5, count 0 2006.229.15:16:43.13#ibcon#read 5, iclass 5, count 0 2006.229.15:16:43.13#ibcon#about to read 6, iclass 5, count 0 2006.229.15:16:43.13#ibcon#read 6, iclass 5, count 0 2006.229.15:16:43.13#ibcon#end of sib2, iclass 5, count 0 2006.229.15:16:43.13#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:16:43.13#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:16:43.13#ibcon#[27=USB\r\n] 2006.229.15:16:43.13#ibcon#*before write, iclass 5, count 0 2006.229.15:16:43.13#ibcon#enter sib2, iclass 5, count 0 2006.229.15:16:43.13#ibcon#flushed, iclass 5, count 0 2006.229.15:16:43.13#ibcon#about to write, iclass 5, count 0 2006.229.15:16:43.13#ibcon#wrote, iclass 5, count 0 2006.229.15:16:43.13#ibcon#about to read 3, iclass 5, count 0 2006.229.15:16:43.16#ibcon#read 3, iclass 5, count 0 2006.229.15:16:43.16#ibcon#about to read 4, iclass 5, count 0 2006.229.15:16:43.16#ibcon#read 4, iclass 5, count 0 2006.229.15:16:43.16#ibcon#about to read 5, iclass 5, count 0 2006.229.15:16:43.16#ibcon#read 5, iclass 5, count 0 2006.229.15:16:43.16#ibcon#about to read 6, iclass 5, count 0 2006.229.15:16:43.16#ibcon#read 6, iclass 5, count 0 2006.229.15:16:43.16#ibcon#end of sib2, iclass 5, count 0 2006.229.15:16:43.16#ibcon#*after write, iclass 5, count 0 2006.229.15:16:43.16#ibcon#*before return 0, iclass 5, count 0 2006.229.15:16:43.16#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:43.16#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:16:43.16#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:16:43.16#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:16:43.16$vck44/vblo=8,744.99 2006.229.15:16:43.16#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.15:16:43.16#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.15:16:43.16#ibcon#ireg 17 cls_cnt 0 2006.229.15:16:43.16#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:43.16#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:43.16#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:43.16#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:16:43.16#ibcon#first serial, iclass 7, count 0 2006.229.15:16:43.16#ibcon#enter sib2, iclass 7, count 0 2006.229.15:16:43.16#ibcon#flushed, iclass 7, count 0 2006.229.15:16:43.16#ibcon#about to write, iclass 7, count 0 2006.229.15:16:43.16#ibcon#wrote, iclass 7, count 0 2006.229.15:16:43.16#ibcon#about to read 3, iclass 7, count 0 2006.229.15:16:43.18#ibcon#read 3, iclass 7, count 0 2006.229.15:16:43.18#ibcon#about to read 4, iclass 7, count 0 2006.229.15:16:43.18#ibcon#read 4, iclass 7, count 0 2006.229.15:16:43.18#ibcon#about to read 5, iclass 7, count 0 2006.229.15:16:43.18#ibcon#read 5, iclass 7, count 0 2006.229.15:16:43.18#ibcon#about to read 6, iclass 7, count 0 2006.229.15:16:43.18#ibcon#read 6, iclass 7, count 0 2006.229.15:16:43.18#ibcon#end of sib2, iclass 7, count 0 2006.229.15:16:43.18#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:16:43.18#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:16:43.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:16:43.18#ibcon#*before write, iclass 7, count 0 2006.229.15:16:43.18#ibcon#enter sib2, iclass 7, count 0 2006.229.15:16:43.18#ibcon#flushed, iclass 7, count 0 2006.229.15:16:43.18#ibcon#about to write, iclass 7, count 0 2006.229.15:16:43.18#ibcon#wrote, iclass 7, count 0 2006.229.15:16:43.18#ibcon#about to read 3, iclass 7, count 0 2006.229.15:16:43.22#ibcon#read 3, iclass 7, count 0 2006.229.15:16:43.22#ibcon#about to read 4, iclass 7, count 0 2006.229.15:16:43.22#ibcon#read 4, iclass 7, count 0 2006.229.15:16:43.22#ibcon#about to read 5, iclass 7, count 0 2006.229.15:16:43.22#ibcon#read 5, iclass 7, count 0 2006.229.15:16:43.22#ibcon#about to read 6, iclass 7, count 0 2006.229.15:16:43.22#ibcon#read 6, iclass 7, count 0 2006.229.15:16:43.22#ibcon#end of sib2, iclass 7, count 0 2006.229.15:16:43.22#ibcon#*after write, iclass 7, count 0 2006.229.15:16:43.22#ibcon#*before return 0, iclass 7, count 0 2006.229.15:16:43.22#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:43.22#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:16:43.22#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:16:43.22#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:16:43.22$vck44/vb=8,4 2006.229.15:16:43.22#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.15:16:43.22#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.15:16:43.22#ibcon#ireg 11 cls_cnt 2 2006.229.15:16:43.22#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:43.28#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:43.28#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:43.28#ibcon#enter wrdev, iclass 11, count 2 2006.229.15:16:43.28#ibcon#first serial, iclass 11, count 2 2006.229.15:16:43.28#ibcon#enter sib2, iclass 11, count 2 2006.229.15:16:43.28#ibcon#flushed, iclass 11, count 2 2006.229.15:16:43.28#ibcon#about to write, iclass 11, count 2 2006.229.15:16:43.28#ibcon#wrote, iclass 11, count 2 2006.229.15:16:43.28#ibcon#about to read 3, iclass 11, count 2 2006.229.15:16:43.30#ibcon#read 3, iclass 11, count 2 2006.229.15:16:43.30#ibcon#about to read 4, iclass 11, count 2 2006.229.15:16:43.30#ibcon#read 4, iclass 11, count 2 2006.229.15:16:43.30#ibcon#about to read 5, iclass 11, count 2 2006.229.15:16:43.30#ibcon#read 5, iclass 11, count 2 2006.229.15:16:43.30#ibcon#about to read 6, iclass 11, count 2 2006.229.15:16:43.30#ibcon#read 6, iclass 11, count 2 2006.229.15:16:43.30#ibcon#end of sib2, iclass 11, count 2 2006.229.15:16:43.30#ibcon#*mode == 0, iclass 11, count 2 2006.229.15:16:43.30#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.15:16:43.30#ibcon#[27=AT08-04\r\n] 2006.229.15:16:43.30#ibcon#*before write, iclass 11, count 2 2006.229.15:16:43.30#ibcon#enter sib2, iclass 11, count 2 2006.229.15:16:43.30#ibcon#flushed, iclass 11, count 2 2006.229.15:16:43.30#ibcon#about to write, iclass 11, count 2 2006.229.15:16:43.30#ibcon#wrote, iclass 11, count 2 2006.229.15:16:43.30#ibcon#about to read 3, iclass 11, count 2 2006.229.15:16:43.33#ibcon#read 3, iclass 11, count 2 2006.229.15:16:43.33#ibcon#about to read 4, iclass 11, count 2 2006.229.15:16:43.33#ibcon#read 4, iclass 11, count 2 2006.229.15:16:43.33#ibcon#about to read 5, iclass 11, count 2 2006.229.15:16:43.33#ibcon#read 5, iclass 11, count 2 2006.229.15:16:43.33#ibcon#about to read 6, iclass 11, count 2 2006.229.15:16:43.33#ibcon#read 6, iclass 11, count 2 2006.229.15:16:43.33#ibcon#end of sib2, iclass 11, count 2 2006.229.15:16:43.33#ibcon#*after write, iclass 11, count 2 2006.229.15:16:43.33#ibcon#*before return 0, iclass 11, count 2 2006.229.15:16:43.33#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:43.33#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:16:43.33#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.15:16:43.33#ibcon#ireg 7 cls_cnt 0 2006.229.15:16:43.33#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:43.45#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:43.45#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:43.45#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:16:43.45#ibcon#first serial, iclass 11, count 0 2006.229.15:16:43.45#ibcon#enter sib2, iclass 11, count 0 2006.229.15:16:43.45#ibcon#flushed, iclass 11, count 0 2006.229.15:16:43.45#ibcon#about to write, iclass 11, count 0 2006.229.15:16:43.45#ibcon#wrote, iclass 11, count 0 2006.229.15:16:43.45#ibcon#about to read 3, iclass 11, count 0 2006.229.15:16:43.47#ibcon#read 3, iclass 11, count 0 2006.229.15:16:43.47#ibcon#about to read 4, iclass 11, count 0 2006.229.15:16:43.47#ibcon#read 4, iclass 11, count 0 2006.229.15:16:43.47#ibcon#about to read 5, iclass 11, count 0 2006.229.15:16:43.47#ibcon#read 5, iclass 11, count 0 2006.229.15:16:43.47#ibcon#about to read 6, iclass 11, count 0 2006.229.15:16:43.47#ibcon#read 6, iclass 11, count 0 2006.229.15:16:43.47#ibcon#end of sib2, iclass 11, count 0 2006.229.15:16:43.47#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:16:43.47#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:16:43.47#ibcon#[27=USB\r\n] 2006.229.15:16:43.47#ibcon#*before write, iclass 11, count 0 2006.229.15:16:43.47#ibcon#enter sib2, iclass 11, count 0 2006.229.15:16:43.47#ibcon#flushed, iclass 11, count 0 2006.229.15:16:43.47#ibcon#about to write, iclass 11, count 0 2006.229.15:16:43.47#ibcon#wrote, iclass 11, count 0 2006.229.15:16:43.47#ibcon#about to read 3, iclass 11, count 0 2006.229.15:16:43.50#ibcon#read 3, iclass 11, count 0 2006.229.15:16:43.50#ibcon#about to read 4, iclass 11, count 0 2006.229.15:16:43.50#ibcon#read 4, iclass 11, count 0 2006.229.15:16:43.50#ibcon#about to read 5, iclass 11, count 0 2006.229.15:16:43.50#ibcon#read 5, iclass 11, count 0 2006.229.15:16:43.50#ibcon#about to read 6, iclass 11, count 0 2006.229.15:16:43.50#ibcon#read 6, iclass 11, count 0 2006.229.15:16:43.50#ibcon#end of sib2, iclass 11, count 0 2006.229.15:16:43.50#ibcon#*after write, iclass 11, count 0 2006.229.15:16:43.50#ibcon#*before return 0, iclass 11, count 0 2006.229.15:16:43.50#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:43.50#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:16:43.50#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:16:43.50#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:16:43.50$vck44/vabw=wide 2006.229.15:16:43.50#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.15:16:43.50#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.15:16:43.50#ibcon#ireg 8 cls_cnt 0 2006.229.15:16:43.50#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:43.50#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:43.50#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:43.50#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:16:43.50#ibcon#first serial, iclass 13, count 0 2006.229.15:16:43.50#ibcon#enter sib2, iclass 13, count 0 2006.229.15:16:43.50#ibcon#flushed, iclass 13, count 0 2006.229.15:16:43.50#ibcon#about to write, iclass 13, count 0 2006.229.15:16:43.50#ibcon#wrote, iclass 13, count 0 2006.229.15:16:43.50#ibcon#about to read 3, iclass 13, count 0 2006.229.15:16:43.52#ibcon#read 3, iclass 13, count 0 2006.229.15:16:43.52#ibcon#about to read 4, iclass 13, count 0 2006.229.15:16:43.52#ibcon#read 4, iclass 13, count 0 2006.229.15:16:43.52#ibcon#about to read 5, iclass 13, count 0 2006.229.15:16:43.52#ibcon#read 5, iclass 13, count 0 2006.229.15:16:43.52#ibcon#about to read 6, iclass 13, count 0 2006.229.15:16:43.52#ibcon#read 6, iclass 13, count 0 2006.229.15:16:43.52#ibcon#end of sib2, iclass 13, count 0 2006.229.15:16:43.52#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:16:43.52#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:16:43.52#ibcon#[25=BW32\r\n] 2006.229.15:16:43.52#ibcon#*before write, iclass 13, count 0 2006.229.15:16:43.52#ibcon#enter sib2, iclass 13, count 0 2006.229.15:16:43.52#ibcon#flushed, iclass 13, count 0 2006.229.15:16:43.52#ibcon#about to write, iclass 13, count 0 2006.229.15:16:43.52#ibcon#wrote, iclass 13, count 0 2006.229.15:16:43.52#ibcon#about to read 3, iclass 13, count 0 2006.229.15:16:43.55#ibcon#read 3, iclass 13, count 0 2006.229.15:16:43.55#ibcon#about to read 4, iclass 13, count 0 2006.229.15:16:43.55#ibcon#read 4, iclass 13, count 0 2006.229.15:16:43.55#ibcon#about to read 5, iclass 13, count 0 2006.229.15:16:43.55#ibcon#read 5, iclass 13, count 0 2006.229.15:16:43.55#ibcon#about to read 6, iclass 13, count 0 2006.229.15:16:43.55#ibcon#read 6, iclass 13, count 0 2006.229.15:16:43.55#ibcon#end of sib2, iclass 13, count 0 2006.229.15:16:43.55#ibcon#*after write, iclass 13, count 0 2006.229.15:16:43.55#ibcon#*before return 0, iclass 13, count 0 2006.229.15:16:43.55#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:43.55#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:16:43.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:16:43.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:16:43.55$vck44/vbbw=wide 2006.229.15:16:43.55#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:16:43.55#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:16:43.55#ibcon#ireg 8 cls_cnt 0 2006.229.15:16:43.55#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:16:43.62#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:16:43.62#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:16:43.62#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:16:43.62#ibcon#first serial, iclass 15, count 0 2006.229.15:16:43.62#ibcon#enter sib2, iclass 15, count 0 2006.229.15:16:43.62#ibcon#flushed, iclass 15, count 0 2006.229.15:16:43.62#ibcon#about to write, iclass 15, count 0 2006.229.15:16:43.62#ibcon#wrote, iclass 15, count 0 2006.229.15:16:43.62#ibcon#about to read 3, iclass 15, count 0 2006.229.15:16:43.64#ibcon#read 3, iclass 15, count 0 2006.229.15:16:43.64#ibcon#about to read 4, iclass 15, count 0 2006.229.15:16:43.64#ibcon#read 4, iclass 15, count 0 2006.229.15:16:43.64#ibcon#about to read 5, iclass 15, count 0 2006.229.15:16:43.64#ibcon#read 5, iclass 15, count 0 2006.229.15:16:43.64#ibcon#about to read 6, iclass 15, count 0 2006.229.15:16:43.64#ibcon#read 6, iclass 15, count 0 2006.229.15:16:43.64#ibcon#end of sib2, iclass 15, count 0 2006.229.15:16:43.64#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:16:43.64#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:16:43.64#ibcon#[27=BW32\r\n] 2006.229.15:16:43.64#ibcon#*before write, iclass 15, count 0 2006.229.15:16:43.64#ibcon#enter sib2, iclass 15, count 0 2006.229.15:16:43.64#ibcon#flushed, iclass 15, count 0 2006.229.15:16:43.64#ibcon#about to write, iclass 15, count 0 2006.229.15:16:43.64#ibcon#wrote, iclass 15, count 0 2006.229.15:16:43.64#ibcon#about to read 3, iclass 15, count 0 2006.229.15:16:43.67#ibcon#read 3, iclass 15, count 0 2006.229.15:16:43.67#ibcon#about to read 4, iclass 15, count 0 2006.229.15:16:43.67#ibcon#read 4, iclass 15, count 0 2006.229.15:16:43.67#ibcon#about to read 5, iclass 15, count 0 2006.229.15:16:43.67#ibcon#read 5, iclass 15, count 0 2006.229.15:16:43.67#ibcon#about to read 6, iclass 15, count 0 2006.229.15:16:43.67#ibcon#read 6, iclass 15, count 0 2006.229.15:16:43.67#ibcon#end of sib2, iclass 15, count 0 2006.229.15:16:43.67#ibcon#*after write, iclass 15, count 0 2006.229.15:16:43.67#ibcon#*before return 0, iclass 15, count 0 2006.229.15:16:43.67#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:16:43.67#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:16:43.67#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:16:43.67#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:16:43.67$setupk4/ifdk4 2006.229.15:16:43.67$ifdk4/lo= 2006.229.15:16:43.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:16:43.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:16:43.67$ifdk4/patch= 2006.229.15:16:43.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:16:43.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:16:43.67$setupk4/!*+20s 2006.229.15:16:43.79#abcon#<5=/06 1.6 2.4 27.391001001.8\r\n> 2006.229.15:16:43.81#abcon#{5=INTERFACE CLEAR} 2006.229.15:16:43.87#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:16:53.96#abcon#<5=/06 1.6 2.5 27.391001001.8\r\n> 2006.229.15:16:53.98#abcon#{5=INTERFACE CLEAR} 2006.229.15:16:54.04#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:16:58.13#trakl#Source acquired 2006.229.15:16:58.13#flagr#flagr/antenna,acquired 2006.229.15:16:58.17$setupk4/"tpicd 2006.229.15:16:58.17$setupk4/echo=off 2006.229.15:16:58.17$setupk4/xlog=off 2006.229.15:16:58.17:!2006.229.15:17:32 2006.229.15:17:32.00:preob 2006.229.15:17:32.13/onsource/TRACKING 2006.229.15:17:32.13:!2006.229.15:17:42 2006.229.15:17:42.00:"tape 2006.229.15:17:42.00:"st=record 2006.229.15:17:42.00:data_valid=on 2006.229.15:17:42.00:midob 2006.229.15:17:43.13/onsource/TRACKING 2006.229.15:17:43.13/wx/27.39,1001.8,100 2006.229.15:17:43.22/cable/+6.4133E-03 2006.229.15:17:44.31/va/01,08,usb,yes,29,31 2006.229.15:17:44.31/va/02,07,usb,yes,31,32 2006.229.15:17:44.31/va/03,06,usb,yes,39,41 2006.229.15:17:44.31/va/04,07,usb,yes,32,34 2006.229.15:17:44.31/va/05,04,usb,yes,29,29 2006.229.15:17:44.31/va/06,04,usb,yes,32,32 2006.229.15:17:44.31/va/07,05,usb,yes,29,29 2006.229.15:17:44.31/va/08,06,usb,yes,21,26 2006.229.15:17:44.54/valo/01,524.99,yes,locked 2006.229.15:17:44.54/valo/02,534.99,yes,locked 2006.229.15:17:44.54/valo/03,564.99,yes,locked 2006.229.15:17:44.54/valo/04,624.99,yes,locked 2006.229.15:17:44.54/valo/05,734.99,yes,locked 2006.229.15:17:44.54/valo/06,814.99,yes,locked 2006.229.15:17:44.54/valo/07,864.99,yes,locked 2006.229.15:17:44.54/valo/08,884.99,yes,locked 2006.229.15:17:45.63/vb/01,04,usb,yes,31,29 2006.229.15:17:45.63/vb/02,04,usb,yes,33,33 2006.229.15:17:45.63/vb/03,04,usb,yes,30,33 2006.229.15:17:45.63/vb/04,04,usb,yes,35,33 2006.229.15:17:45.63/vb/05,04,usb,yes,27,29 2006.229.15:17:45.63/vb/06,04,usb,yes,31,27 2006.229.15:17:45.63/vb/07,04,usb,yes,31,31 2006.229.15:17:45.63/vb/08,04,usb,yes,29,32 2006.229.15:17:45.87/vblo/01,629.99,yes,locked 2006.229.15:17:45.87/vblo/02,634.99,yes,locked 2006.229.15:17:45.87/vblo/03,649.99,yes,locked 2006.229.15:17:45.87/vblo/04,679.99,yes,locked 2006.229.15:17:45.87/vblo/05,709.99,yes,locked 2006.229.15:17:45.87/vblo/06,719.99,yes,locked 2006.229.15:17:45.87/vblo/07,734.99,yes,locked 2006.229.15:17:45.87/vblo/08,744.99,yes,locked 2006.229.15:17:46.02/vabw/8 2006.229.15:17:46.17/vbbw/8 2006.229.15:17:46.26/xfe/off,on,12.2 2006.229.15:17:46.63/ifatt/23,28,28,28 2006.229.15:17:47.08/fmout-gps/S +4.53E-07 2006.229.15:17:47.12:!2006.229.15:20:02 2006.229.15:20:02.02:data_valid=off 2006.229.15:20:02.02:"et 2006.229.15:20:02.02:!+3s 2006.229.15:20:05.04:"tape 2006.229.15:20:05.05:postob 2006.229.15:20:05.19/cable/+6.4145E-03 2006.229.15:20:05.19/wx/27.38,1001.8,100 2006.229.15:20:05.25/fmout-gps/S +4.53E-07 2006.229.15:20:05.25:scan_name=229-1522,jd0608,260 2006.229.15:20:05.25:source=1044+719,104827.62,714335.9,2000.0,neutral 2006.229.15:20:06.14#flagr#flagr/antenna,new-source 2006.229.15:20:06.14:checkk5 2006.229.15:20:06.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:20:06.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:20:07.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:20:07.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:20:08.12/chk_obsdata//k5ts1/T2291517??a.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.15:20:08.53/chk_obsdata//k5ts2/T2291517??b.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.15:20:08.94/chk_obsdata//k5ts3/T2291517??c.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.15:20:09.33/chk_obsdata//k5ts4/T2291517??d.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.15:20:10.04/k5log//k5ts1_log_newline 2006.229.15:20:10.74/k5log//k5ts2_log_newline 2006.229.15:20:11.44/k5log//k5ts3_log_newline 2006.229.15:20:12.15/k5log//k5ts4_log_newline 2006.229.15:20:12.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:20:12.17:setupk4=1 2006.229.15:20:12.17$setupk4/echo=on 2006.229.15:20:12.17$setupk4/pcalon 2006.229.15:20:12.17$pcalon/"no phase cal control is implemented here 2006.229.15:20:12.17$setupk4/"tpicd=stop 2006.229.15:20:12.17$setupk4/"rec=synch_on 2006.229.15:20:12.17$setupk4/"rec_mode=128 2006.229.15:20:12.17$setupk4/!* 2006.229.15:20:12.17$setupk4/recpk4 2006.229.15:20:12.17$recpk4/recpatch= 2006.229.15:20:12.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:20:12.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:20:12.18$setupk4/vck44 2006.229.15:20:12.18$vck44/valo=1,524.99 2006.229.15:20:12.18#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:20:12.18#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:20:12.18#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:12.18#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:12.18#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:12.18#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:12.18#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:20:12.18#ibcon#first serial, iclass 32, count 0 2006.229.15:20:12.18#ibcon#enter sib2, iclass 32, count 0 2006.229.15:20:12.18#ibcon#flushed, iclass 32, count 0 2006.229.15:20:12.18#ibcon#about to write, iclass 32, count 0 2006.229.15:20:12.18#ibcon#wrote, iclass 32, count 0 2006.229.15:20:12.18#ibcon#about to read 3, iclass 32, count 0 2006.229.15:20:12.19#ibcon#read 3, iclass 32, count 0 2006.229.15:20:12.19#ibcon#about to read 4, iclass 32, count 0 2006.229.15:20:12.19#ibcon#read 4, iclass 32, count 0 2006.229.15:20:12.19#ibcon#about to read 5, iclass 32, count 0 2006.229.15:20:12.19#ibcon#read 5, iclass 32, count 0 2006.229.15:20:12.19#ibcon#about to read 6, iclass 32, count 0 2006.229.15:20:12.19#ibcon#read 6, iclass 32, count 0 2006.229.15:20:12.19#ibcon#end of sib2, iclass 32, count 0 2006.229.15:20:12.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:20:12.20#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:20:12.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:20:12.20#ibcon#*before write, iclass 32, count 0 2006.229.15:20:12.20#ibcon#enter sib2, iclass 32, count 0 2006.229.15:20:12.20#ibcon#flushed, iclass 32, count 0 2006.229.15:20:12.20#ibcon#about to write, iclass 32, count 0 2006.229.15:20:12.20#ibcon#wrote, iclass 32, count 0 2006.229.15:20:12.20#ibcon#about to read 3, iclass 32, count 0 2006.229.15:20:12.24#ibcon#read 3, iclass 32, count 0 2006.229.15:20:12.24#ibcon#about to read 4, iclass 32, count 0 2006.229.15:20:12.24#ibcon#read 4, iclass 32, count 0 2006.229.15:20:12.24#ibcon#about to read 5, iclass 32, count 0 2006.229.15:20:12.24#ibcon#read 5, iclass 32, count 0 2006.229.15:20:12.24#ibcon#about to read 6, iclass 32, count 0 2006.229.15:20:12.24#ibcon#read 6, iclass 32, count 0 2006.229.15:20:12.24#ibcon#end of sib2, iclass 32, count 0 2006.229.15:20:12.25#ibcon#*after write, iclass 32, count 0 2006.229.15:20:12.25#ibcon#*before return 0, iclass 32, count 0 2006.229.15:20:12.25#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:12.25#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:12.25#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:20:12.25#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:20:12.25$vck44/va=1,8 2006.229.15:20:12.25#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.15:20:12.25#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.15:20:12.25#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:12.25#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:12.25#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:12.25#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:12.25#ibcon#enter wrdev, iclass 34, count 2 2006.229.15:20:12.25#ibcon#first serial, iclass 34, count 2 2006.229.15:20:12.25#ibcon#enter sib2, iclass 34, count 2 2006.229.15:20:12.25#ibcon#flushed, iclass 34, count 2 2006.229.15:20:12.25#ibcon#about to write, iclass 34, count 2 2006.229.15:20:12.25#ibcon#wrote, iclass 34, count 2 2006.229.15:20:12.25#ibcon#about to read 3, iclass 34, count 2 2006.229.15:20:12.26#ibcon#read 3, iclass 34, count 2 2006.229.15:20:12.26#ibcon#about to read 4, iclass 34, count 2 2006.229.15:20:12.26#ibcon#read 4, iclass 34, count 2 2006.229.15:20:12.26#ibcon#about to read 5, iclass 34, count 2 2006.229.15:20:12.26#ibcon#read 5, iclass 34, count 2 2006.229.15:20:12.26#ibcon#about to read 6, iclass 34, count 2 2006.229.15:20:12.26#ibcon#read 6, iclass 34, count 2 2006.229.15:20:12.26#ibcon#end of sib2, iclass 34, count 2 2006.229.15:20:12.27#ibcon#*mode == 0, iclass 34, count 2 2006.229.15:20:12.27#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.15:20:12.27#ibcon#[25=AT01-08\r\n] 2006.229.15:20:12.27#ibcon#*before write, iclass 34, count 2 2006.229.15:20:12.27#ibcon#enter sib2, iclass 34, count 2 2006.229.15:20:12.27#ibcon#flushed, iclass 34, count 2 2006.229.15:20:12.27#ibcon#about to write, iclass 34, count 2 2006.229.15:20:12.27#ibcon#wrote, iclass 34, count 2 2006.229.15:20:12.27#ibcon#about to read 3, iclass 34, count 2 2006.229.15:20:12.29#ibcon#read 3, iclass 34, count 2 2006.229.15:20:12.29#ibcon#about to read 4, iclass 34, count 2 2006.229.15:20:12.29#ibcon#read 4, iclass 34, count 2 2006.229.15:20:12.29#ibcon#about to read 5, iclass 34, count 2 2006.229.15:20:12.29#ibcon#read 5, iclass 34, count 2 2006.229.15:20:12.29#ibcon#about to read 6, iclass 34, count 2 2006.229.15:20:12.29#ibcon#read 6, iclass 34, count 2 2006.229.15:20:12.29#ibcon#end of sib2, iclass 34, count 2 2006.229.15:20:12.30#ibcon#*after write, iclass 34, count 2 2006.229.15:20:12.30#ibcon#*before return 0, iclass 34, count 2 2006.229.15:20:12.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:12.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:12.30#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.15:20:12.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:12.30#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:12.41#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:12.41#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:12.41#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:20:12.41#ibcon#first serial, iclass 34, count 0 2006.229.15:20:12.41#ibcon#enter sib2, iclass 34, count 0 2006.229.15:20:12.41#ibcon#flushed, iclass 34, count 0 2006.229.15:20:12.41#ibcon#about to write, iclass 34, count 0 2006.229.15:20:12.41#ibcon#wrote, iclass 34, count 0 2006.229.15:20:12.41#ibcon#about to read 3, iclass 34, count 0 2006.229.15:20:12.43#ibcon#read 3, iclass 34, count 0 2006.229.15:20:12.43#ibcon#about to read 4, iclass 34, count 0 2006.229.15:20:12.43#ibcon#read 4, iclass 34, count 0 2006.229.15:20:12.43#ibcon#about to read 5, iclass 34, count 0 2006.229.15:20:12.43#ibcon#read 5, iclass 34, count 0 2006.229.15:20:12.43#ibcon#about to read 6, iclass 34, count 0 2006.229.15:20:12.43#ibcon#read 6, iclass 34, count 0 2006.229.15:20:12.43#ibcon#end of sib2, iclass 34, count 0 2006.229.15:20:12.44#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:20:12.44#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:20:12.44#ibcon#[25=USB\r\n] 2006.229.15:20:12.44#ibcon#*before write, iclass 34, count 0 2006.229.15:20:12.44#ibcon#enter sib2, iclass 34, count 0 2006.229.15:20:12.44#ibcon#flushed, iclass 34, count 0 2006.229.15:20:12.44#ibcon#about to write, iclass 34, count 0 2006.229.15:20:12.44#ibcon#wrote, iclass 34, count 0 2006.229.15:20:12.44#ibcon#about to read 3, iclass 34, count 0 2006.229.15:20:12.46#ibcon#read 3, iclass 34, count 0 2006.229.15:20:12.46#ibcon#about to read 4, iclass 34, count 0 2006.229.15:20:12.46#ibcon#read 4, iclass 34, count 0 2006.229.15:20:12.46#ibcon#about to read 5, iclass 34, count 0 2006.229.15:20:12.46#ibcon#read 5, iclass 34, count 0 2006.229.15:20:12.46#ibcon#about to read 6, iclass 34, count 0 2006.229.15:20:12.46#ibcon#read 6, iclass 34, count 0 2006.229.15:20:12.46#ibcon#end of sib2, iclass 34, count 0 2006.229.15:20:12.46#ibcon#*after write, iclass 34, count 0 2006.229.15:20:12.46#ibcon#*before return 0, iclass 34, count 0 2006.229.15:20:12.47#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:12.47#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:12.47#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:20:12.47#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:20:12.47$vck44/valo=2,534.99 2006.229.15:20:12.47#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.15:20:12.47#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.15:20:12.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:12.47#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:12.47#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:12.47#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:12.47#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:20:12.47#ibcon#first serial, iclass 36, count 0 2006.229.15:20:12.47#ibcon#enter sib2, iclass 36, count 0 2006.229.15:20:12.47#ibcon#flushed, iclass 36, count 0 2006.229.15:20:12.47#ibcon#about to write, iclass 36, count 0 2006.229.15:20:12.47#ibcon#wrote, iclass 36, count 0 2006.229.15:20:12.47#ibcon#about to read 3, iclass 36, count 0 2006.229.15:20:12.48#ibcon#read 3, iclass 36, count 0 2006.229.15:20:12.48#ibcon#about to read 4, iclass 36, count 0 2006.229.15:20:12.48#ibcon#read 4, iclass 36, count 0 2006.229.15:20:12.48#ibcon#about to read 5, iclass 36, count 0 2006.229.15:20:12.48#ibcon#read 5, iclass 36, count 0 2006.229.15:20:12.48#ibcon#about to read 6, iclass 36, count 0 2006.229.15:20:12.48#ibcon#read 6, iclass 36, count 0 2006.229.15:20:12.48#ibcon#end of sib2, iclass 36, count 0 2006.229.15:20:12.48#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:20:12.48#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:20:12.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:20:12.49#ibcon#*before write, iclass 36, count 0 2006.229.15:20:12.49#ibcon#enter sib2, iclass 36, count 0 2006.229.15:20:12.49#ibcon#flushed, iclass 36, count 0 2006.229.15:20:12.49#ibcon#about to write, iclass 36, count 0 2006.229.15:20:12.49#ibcon#wrote, iclass 36, count 0 2006.229.15:20:12.49#ibcon#about to read 3, iclass 36, count 0 2006.229.15:20:12.52#ibcon#read 3, iclass 36, count 0 2006.229.15:20:12.52#ibcon#about to read 4, iclass 36, count 0 2006.229.15:20:12.52#ibcon#read 4, iclass 36, count 0 2006.229.15:20:12.52#ibcon#about to read 5, iclass 36, count 0 2006.229.15:20:12.52#ibcon#read 5, iclass 36, count 0 2006.229.15:20:12.52#ibcon#about to read 6, iclass 36, count 0 2006.229.15:20:12.52#ibcon#read 6, iclass 36, count 0 2006.229.15:20:12.52#ibcon#end of sib2, iclass 36, count 0 2006.229.15:20:12.53#ibcon#*after write, iclass 36, count 0 2006.229.15:20:12.53#ibcon#*before return 0, iclass 36, count 0 2006.229.15:20:12.53#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:12.53#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:12.53#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:20:12.53#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:20:12.53$vck44/va=2,7 2006.229.15:20:12.53#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.15:20:12.53#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.15:20:12.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:12.53#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:12.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:12.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:12.58#ibcon#enter wrdev, iclass 38, count 2 2006.229.15:20:12.58#ibcon#first serial, iclass 38, count 2 2006.229.15:20:12.58#ibcon#enter sib2, iclass 38, count 2 2006.229.15:20:12.58#ibcon#flushed, iclass 38, count 2 2006.229.15:20:12.58#ibcon#about to write, iclass 38, count 2 2006.229.15:20:12.58#ibcon#wrote, iclass 38, count 2 2006.229.15:20:12.58#ibcon#about to read 3, iclass 38, count 2 2006.229.15:20:12.60#ibcon#read 3, iclass 38, count 2 2006.229.15:20:12.60#ibcon#about to read 4, iclass 38, count 2 2006.229.15:20:12.60#ibcon#read 4, iclass 38, count 2 2006.229.15:20:12.60#ibcon#about to read 5, iclass 38, count 2 2006.229.15:20:12.60#ibcon#read 5, iclass 38, count 2 2006.229.15:20:12.60#ibcon#about to read 6, iclass 38, count 2 2006.229.15:20:12.60#ibcon#read 6, iclass 38, count 2 2006.229.15:20:12.60#ibcon#end of sib2, iclass 38, count 2 2006.229.15:20:12.60#ibcon#*mode == 0, iclass 38, count 2 2006.229.15:20:12.60#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.15:20:12.60#ibcon#[25=AT02-07\r\n] 2006.229.15:20:12.60#ibcon#*before write, iclass 38, count 2 2006.229.15:20:12.60#ibcon#enter sib2, iclass 38, count 2 2006.229.15:20:12.61#ibcon#flushed, iclass 38, count 2 2006.229.15:20:12.61#ibcon#about to write, iclass 38, count 2 2006.229.15:20:12.61#ibcon#wrote, iclass 38, count 2 2006.229.15:20:12.61#ibcon#about to read 3, iclass 38, count 2 2006.229.15:20:12.63#ibcon#read 3, iclass 38, count 2 2006.229.15:20:12.63#ibcon#about to read 4, iclass 38, count 2 2006.229.15:20:12.63#ibcon#read 4, iclass 38, count 2 2006.229.15:20:12.63#ibcon#about to read 5, iclass 38, count 2 2006.229.15:20:12.63#ibcon#read 5, iclass 38, count 2 2006.229.15:20:12.63#ibcon#about to read 6, iclass 38, count 2 2006.229.15:20:12.63#ibcon#read 6, iclass 38, count 2 2006.229.15:20:12.63#ibcon#end of sib2, iclass 38, count 2 2006.229.15:20:12.63#ibcon#*after write, iclass 38, count 2 2006.229.15:20:12.64#ibcon#*before return 0, iclass 38, count 2 2006.229.15:20:12.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:12.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:12.64#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.15:20:12.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:12.64#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:12.75#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:12.75#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:12.75#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:20:12.75#ibcon#first serial, iclass 38, count 0 2006.229.15:20:12.75#ibcon#enter sib2, iclass 38, count 0 2006.229.15:20:12.75#ibcon#flushed, iclass 38, count 0 2006.229.15:20:12.75#ibcon#about to write, iclass 38, count 0 2006.229.15:20:12.75#ibcon#wrote, iclass 38, count 0 2006.229.15:20:12.76#ibcon#about to read 3, iclass 38, count 0 2006.229.15:20:12.77#ibcon#read 3, iclass 38, count 0 2006.229.15:20:12.77#ibcon#about to read 4, iclass 38, count 0 2006.229.15:20:12.77#ibcon#read 4, iclass 38, count 0 2006.229.15:20:12.77#ibcon#about to read 5, iclass 38, count 0 2006.229.15:20:12.77#ibcon#read 5, iclass 38, count 0 2006.229.15:20:12.77#ibcon#about to read 6, iclass 38, count 0 2006.229.15:20:12.77#ibcon#read 6, iclass 38, count 0 2006.229.15:20:12.77#ibcon#end of sib2, iclass 38, count 0 2006.229.15:20:12.77#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:20:12.77#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:20:12.77#ibcon#[25=USB\r\n] 2006.229.15:20:12.77#ibcon#*before write, iclass 38, count 0 2006.229.15:20:12.78#ibcon#enter sib2, iclass 38, count 0 2006.229.15:20:12.78#ibcon#flushed, iclass 38, count 0 2006.229.15:20:12.78#ibcon#about to write, iclass 38, count 0 2006.229.15:20:12.78#ibcon#wrote, iclass 38, count 0 2006.229.15:20:12.78#ibcon#about to read 3, iclass 38, count 0 2006.229.15:20:12.80#ibcon#read 3, iclass 38, count 0 2006.229.15:20:12.80#ibcon#about to read 4, iclass 38, count 0 2006.229.15:20:12.80#ibcon#read 4, iclass 38, count 0 2006.229.15:20:12.80#ibcon#about to read 5, iclass 38, count 0 2006.229.15:20:12.80#ibcon#read 5, iclass 38, count 0 2006.229.15:20:12.80#ibcon#about to read 6, iclass 38, count 0 2006.229.15:20:12.80#ibcon#read 6, iclass 38, count 0 2006.229.15:20:12.80#ibcon#end of sib2, iclass 38, count 0 2006.229.15:20:12.80#ibcon#*after write, iclass 38, count 0 2006.229.15:20:12.80#ibcon#*before return 0, iclass 38, count 0 2006.229.15:20:12.81#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:12.81#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:12.81#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:20:12.81#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:20:12.81$vck44/valo=3,564.99 2006.229.15:20:12.81#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:20:12.81#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:20:12.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:12.81#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:12.81#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:12.81#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:12.81#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:20:12.81#ibcon#first serial, iclass 40, count 0 2006.229.15:20:12.81#ibcon#enter sib2, iclass 40, count 0 2006.229.15:20:12.81#ibcon#flushed, iclass 40, count 0 2006.229.15:20:12.81#ibcon#about to write, iclass 40, count 0 2006.229.15:20:12.81#ibcon#wrote, iclass 40, count 0 2006.229.15:20:12.81#ibcon#about to read 3, iclass 40, count 0 2006.229.15:20:12.82#ibcon#read 3, iclass 40, count 0 2006.229.15:20:12.82#ibcon#about to read 4, iclass 40, count 0 2006.229.15:20:12.82#ibcon#read 4, iclass 40, count 0 2006.229.15:20:12.82#ibcon#about to read 5, iclass 40, count 0 2006.229.15:20:12.82#ibcon#read 5, iclass 40, count 0 2006.229.15:20:12.82#ibcon#about to read 6, iclass 40, count 0 2006.229.15:20:12.82#ibcon#read 6, iclass 40, count 0 2006.229.15:20:12.82#ibcon#end of sib2, iclass 40, count 0 2006.229.15:20:12.82#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:20:12.82#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:20:12.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:20:12.82#ibcon#*before write, iclass 40, count 0 2006.229.15:20:12.83#ibcon#enter sib2, iclass 40, count 0 2006.229.15:20:12.83#ibcon#flushed, iclass 40, count 0 2006.229.15:20:12.83#ibcon#about to write, iclass 40, count 0 2006.229.15:20:12.83#ibcon#wrote, iclass 40, count 0 2006.229.15:20:12.83#ibcon#about to read 3, iclass 40, count 0 2006.229.15:20:12.86#ibcon#read 3, iclass 40, count 0 2006.229.15:20:12.86#ibcon#about to read 4, iclass 40, count 0 2006.229.15:20:12.86#ibcon#read 4, iclass 40, count 0 2006.229.15:20:12.86#ibcon#about to read 5, iclass 40, count 0 2006.229.15:20:12.86#ibcon#read 5, iclass 40, count 0 2006.229.15:20:12.86#ibcon#about to read 6, iclass 40, count 0 2006.229.15:20:12.86#ibcon#read 6, iclass 40, count 0 2006.229.15:20:12.86#ibcon#end of sib2, iclass 40, count 0 2006.229.15:20:12.86#ibcon#*after write, iclass 40, count 0 2006.229.15:20:12.86#ibcon#*before return 0, iclass 40, count 0 2006.229.15:20:12.87#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:12.87#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:12.87#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:20:12.87#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:20:12.87$vck44/va=3,6 2006.229.15:20:12.87#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:20:12.87#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:20:12.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:12.87#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:12.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:12.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:12.92#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:20:12.92#ibcon#first serial, iclass 4, count 2 2006.229.15:20:12.92#ibcon#enter sib2, iclass 4, count 2 2006.229.15:20:12.92#ibcon#flushed, iclass 4, count 2 2006.229.15:20:12.92#ibcon#about to write, iclass 4, count 2 2006.229.15:20:12.92#ibcon#wrote, iclass 4, count 2 2006.229.15:20:12.92#ibcon#about to read 3, iclass 4, count 2 2006.229.15:20:12.94#ibcon#read 3, iclass 4, count 2 2006.229.15:20:12.94#ibcon#about to read 4, iclass 4, count 2 2006.229.15:20:12.94#ibcon#read 4, iclass 4, count 2 2006.229.15:20:12.94#ibcon#about to read 5, iclass 4, count 2 2006.229.15:20:12.94#ibcon#read 5, iclass 4, count 2 2006.229.15:20:12.94#ibcon#about to read 6, iclass 4, count 2 2006.229.15:20:12.94#ibcon#read 6, iclass 4, count 2 2006.229.15:20:12.94#ibcon#end of sib2, iclass 4, count 2 2006.229.15:20:12.94#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:20:12.94#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:20:12.94#ibcon#[25=AT03-06\r\n] 2006.229.15:20:12.94#ibcon#*before write, iclass 4, count 2 2006.229.15:20:12.94#ibcon#enter sib2, iclass 4, count 2 2006.229.15:20:12.95#ibcon#flushed, iclass 4, count 2 2006.229.15:20:12.95#ibcon#about to write, iclass 4, count 2 2006.229.15:20:12.95#ibcon#wrote, iclass 4, count 2 2006.229.15:20:12.95#ibcon#about to read 3, iclass 4, count 2 2006.229.15:20:12.97#ibcon#read 3, iclass 4, count 2 2006.229.15:20:12.97#ibcon#about to read 4, iclass 4, count 2 2006.229.15:20:12.97#ibcon#read 4, iclass 4, count 2 2006.229.15:20:12.97#ibcon#about to read 5, iclass 4, count 2 2006.229.15:20:12.97#ibcon#read 5, iclass 4, count 2 2006.229.15:20:12.97#ibcon#about to read 6, iclass 4, count 2 2006.229.15:20:12.97#ibcon#read 6, iclass 4, count 2 2006.229.15:20:12.97#ibcon#end of sib2, iclass 4, count 2 2006.229.15:20:12.97#ibcon#*after write, iclass 4, count 2 2006.229.15:20:12.97#ibcon#*before return 0, iclass 4, count 2 2006.229.15:20:12.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:12.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:12.98#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:20:12.98#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:12.98#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:13.09#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:13.09#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:13.09#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:20:13.09#ibcon#first serial, iclass 4, count 0 2006.229.15:20:13.09#ibcon#enter sib2, iclass 4, count 0 2006.229.15:20:13.09#ibcon#flushed, iclass 4, count 0 2006.229.15:20:13.09#ibcon#about to write, iclass 4, count 0 2006.229.15:20:13.09#ibcon#wrote, iclass 4, count 0 2006.229.15:20:13.09#ibcon#about to read 3, iclass 4, count 0 2006.229.15:20:13.11#ibcon#read 3, iclass 4, count 0 2006.229.15:20:13.11#ibcon#about to read 4, iclass 4, count 0 2006.229.15:20:13.11#ibcon#read 4, iclass 4, count 0 2006.229.15:20:13.11#ibcon#about to read 5, iclass 4, count 0 2006.229.15:20:13.11#ibcon#read 5, iclass 4, count 0 2006.229.15:20:13.11#ibcon#about to read 6, iclass 4, count 0 2006.229.15:20:13.11#ibcon#read 6, iclass 4, count 0 2006.229.15:20:13.11#ibcon#end of sib2, iclass 4, count 0 2006.229.15:20:13.11#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:20:13.11#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:20:13.11#ibcon#[25=USB\r\n] 2006.229.15:20:13.11#ibcon#*before write, iclass 4, count 0 2006.229.15:20:13.11#ibcon#enter sib2, iclass 4, count 0 2006.229.15:20:13.12#ibcon#flushed, iclass 4, count 0 2006.229.15:20:13.12#ibcon#about to write, iclass 4, count 0 2006.229.15:20:13.12#ibcon#wrote, iclass 4, count 0 2006.229.15:20:13.12#ibcon#about to read 3, iclass 4, count 0 2006.229.15:20:13.14#ibcon#read 3, iclass 4, count 0 2006.229.15:20:13.14#ibcon#about to read 4, iclass 4, count 0 2006.229.15:20:13.14#ibcon#read 4, iclass 4, count 0 2006.229.15:20:13.14#ibcon#about to read 5, iclass 4, count 0 2006.229.15:20:13.14#ibcon#read 5, iclass 4, count 0 2006.229.15:20:13.14#ibcon#about to read 6, iclass 4, count 0 2006.229.15:20:13.14#ibcon#read 6, iclass 4, count 0 2006.229.15:20:13.14#ibcon#end of sib2, iclass 4, count 0 2006.229.15:20:13.14#ibcon#*after write, iclass 4, count 0 2006.229.15:20:13.15#ibcon#*before return 0, iclass 4, count 0 2006.229.15:20:13.15#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:13.15#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:13.15#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:20:13.15#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:20:13.15$vck44/valo=4,624.99 2006.229.15:20:13.15#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:20:13.15#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:20:13.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:13.15#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:13.15#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:13.15#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:13.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:20:13.15#ibcon#first serial, iclass 6, count 0 2006.229.15:20:13.15#ibcon#enter sib2, iclass 6, count 0 2006.229.15:20:13.15#ibcon#flushed, iclass 6, count 0 2006.229.15:20:13.15#ibcon#about to write, iclass 6, count 0 2006.229.15:20:13.15#ibcon#wrote, iclass 6, count 0 2006.229.15:20:13.15#ibcon#about to read 3, iclass 6, count 0 2006.229.15:20:13.16#ibcon#read 3, iclass 6, count 0 2006.229.15:20:13.16#ibcon#about to read 4, iclass 6, count 0 2006.229.15:20:13.16#ibcon#read 4, iclass 6, count 0 2006.229.15:20:13.16#ibcon#about to read 5, iclass 6, count 0 2006.229.15:20:13.16#ibcon#read 5, iclass 6, count 0 2006.229.15:20:13.16#ibcon#about to read 6, iclass 6, count 0 2006.229.15:20:13.16#ibcon#read 6, iclass 6, count 0 2006.229.15:20:13.16#ibcon#end of sib2, iclass 6, count 0 2006.229.15:20:13.16#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:20:13.16#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:20:13.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:20:13.17#ibcon#*before write, iclass 6, count 0 2006.229.15:20:13.17#ibcon#enter sib2, iclass 6, count 0 2006.229.15:20:13.17#ibcon#flushed, iclass 6, count 0 2006.229.15:20:13.17#ibcon#about to write, iclass 6, count 0 2006.229.15:20:13.17#ibcon#wrote, iclass 6, count 0 2006.229.15:20:13.17#ibcon#about to read 3, iclass 6, count 0 2006.229.15:20:13.20#ibcon#read 3, iclass 6, count 0 2006.229.15:20:13.20#ibcon#about to read 4, iclass 6, count 0 2006.229.15:20:13.20#ibcon#read 4, iclass 6, count 0 2006.229.15:20:13.20#ibcon#about to read 5, iclass 6, count 0 2006.229.15:20:13.20#ibcon#read 5, iclass 6, count 0 2006.229.15:20:13.20#ibcon#about to read 6, iclass 6, count 0 2006.229.15:20:13.20#ibcon#read 6, iclass 6, count 0 2006.229.15:20:13.20#ibcon#end of sib2, iclass 6, count 0 2006.229.15:20:13.20#ibcon#*after write, iclass 6, count 0 2006.229.15:20:13.20#ibcon#*before return 0, iclass 6, count 0 2006.229.15:20:13.21#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:13.21#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:13.21#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:20:13.21#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:20:13.21$vck44/va=4,7 2006.229.15:20:13.21#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:20:13.21#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:20:13.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:13.21#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:13.26#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:13.26#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:13.26#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:20:13.26#ibcon#first serial, iclass 10, count 2 2006.229.15:20:13.26#ibcon#enter sib2, iclass 10, count 2 2006.229.15:20:13.26#ibcon#flushed, iclass 10, count 2 2006.229.15:20:13.26#ibcon#about to write, iclass 10, count 2 2006.229.15:20:13.26#ibcon#wrote, iclass 10, count 2 2006.229.15:20:13.27#ibcon#about to read 3, iclass 10, count 2 2006.229.15:20:13.28#ibcon#read 3, iclass 10, count 2 2006.229.15:20:13.28#ibcon#about to read 4, iclass 10, count 2 2006.229.15:20:13.28#ibcon#read 4, iclass 10, count 2 2006.229.15:20:13.28#ibcon#about to read 5, iclass 10, count 2 2006.229.15:20:13.28#ibcon#read 5, iclass 10, count 2 2006.229.15:20:13.28#ibcon#about to read 6, iclass 10, count 2 2006.229.15:20:13.28#ibcon#read 6, iclass 10, count 2 2006.229.15:20:13.28#ibcon#end of sib2, iclass 10, count 2 2006.229.15:20:13.28#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:20:13.28#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:20:13.28#ibcon#[25=AT04-07\r\n] 2006.229.15:20:13.28#ibcon#*before write, iclass 10, count 2 2006.229.15:20:13.28#ibcon#enter sib2, iclass 10, count 2 2006.229.15:20:13.29#ibcon#flushed, iclass 10, count 2 2006.229.15:20:13.29#ibcon#about to write, iclass 10, count 2 2006.229.15:20:13.29#ibcon#wrote, iclass 10, count 2 2006.229.15:20:13.29#ibcon#about to read 3, iclass 10, count 2 2006.229.15:20:13.31#ibcon#read 3, iclass 10, count 2 2006.229.15:20:13.31#ibcon#about to read 4, iclass 10, count 2 2006.229.15:20:13.31#ibcon#read 4, iclass 10, count 2 2006.229.15:20:13.31#ibcon#about to read 5, iclass 10, count 2 2006.229.15:20:13.31#ibcon#read 5, iclass 10, count 2 2006.229.15:20:13.31#ibcon#about to read 6, iclass 10, count 2 2006.229.15:20:13.31#ibcon#read 6, iclass 10, count 2 2006.229.15:20:13.31#ibcon#end of sib2, iclass 10, count 2 2006.229.15:20:13.31#ibcon#*after write, iclass 10, count 2 2006.229.15:20:13.31#ibcon#*before return 0, iclass 10, count 2 2006.229.15:20:13.33#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:13.33#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:13.33#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:20:13.33#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:13.33#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:13.44#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:13.44#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:13.44#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:20:13.44#ibcon#first serial, iclass 10, count 0 2006.229.15:20:13.44#ibcon#enter sib2, iclass 10, count 0 2006.229.15:20:13.44#ibcon#flushed, iclass 10, count 0 2006.229.15:20:13.44#ibcon#about to write, iclass 10, count 0 2006.229.15:20:13.45#ibcon#wrote, iclass 10, count 0 2006.229.15:20:13.45#ibcon#about to read 3, iclass 10, count 0 2006.229.15:20:13.46#ibcon#read 3, iclass 10, count 0 2006.229.15:20:13.46#ibcon#about to read 4, iclass 10, count 0 2006.229.15:20:13.46#ibcon#read 4, iclass 10, count 0 2006.229.15:20:13.46#ibcon#about to read 5, iclass 10, count 0 2006.229.15:20:13.46#ibcon#read 5, iclass 10, count 0 2006.229.15:20:13.46#ibcon#about to read 6, iclass 10, count 0 2006.229.15:20:13.47#ibcon#read 6, iclass 10, count 0 2006.229.15:20:13.47#ibcon#end of sib2, iclass 10, count 0 2006.229.15:20:13.47#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:20:13.47#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:20:13.47#ibcon#[25=USB\r\n] 2006.229.15:20:13.47#ibcon#*before write, iclass 10, count 0 2006.229.15:20:13.47#ibcon#enter sib2, iclass 10, count 0 2006.229.15:20:13.47#ibcon#flushed, iclass 10, count 0 2006.229.15:20:13.47#ibcon#about to write, iclass 10, count 0 2006.229.15:20:13.47#ibcon#wrote, iclass 10, count 0 2006.229.15:20:13.47#ibcon#about to read 3, iclass 10, count 0 2006.229.15:20:13.49#ibcon#read 3, iclass 10, count 0 2006.229.15:20:13.49#ibcon#about to read 4, iclass 10, count 0 2006.229.15:20:13.49#ibcon#read 4, iclass 10, count 0 2006.229.15:20:13.49#ibcon#about to read 5, iclass 10, count 0 2006.229.15:20:13.49#ibcon#read 5, iclass 10, count 0 2006.229.15:20:13.49#ibcon#about to read 6, iclass 10, count 0 2006.229.15:20:13.49#ibcon#read 6, iclass 10, count 0 2006.229.15:20:13.49#ibcon#end of sib2, iclass 10, count 0 2006.229.15:20:13.49#ibcon#*after write, iclass 10, count 0 2006.229.15:20:13.50#ibcon#*before return 0, iclass 10, count 0 2006.229.15:20:13.50#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:13.50#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:13.50#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:20:13.50#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:20:13.50$vck44/valo=5,734.99 2006.229.15:20:13.50#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:20:13.50#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:20:13.50#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:13.50#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:13.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:13.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:13.50#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:20:13.50#ibcon#first serial, iclass 12, count 0 2006.229.15:20:13.50#ibcon#enter sib2, iclass 12, count 0 2006.229.15:20:13.50#ibcon#flushed, iclass 12, count 0 2006.229.15:20:13.50#ibcon#about to write, iclass 12, count 0 2006.229.15:20:13.50#ibcon#wrote, iclass 12, count 0 2006.229.15:20:13.50#ibcon#about to read 3, iclass 12, count 0 2006.229.15:20:13.51#ibcon#read 3, iclass 12, count 0 2006.229.15:20:13.51#ibcon#about to read 4, iclass 12, count 0 2006.229.15:20:13.51#ibcon#read 4, iclass 12, count 0 2006.229.15:20:13.51#ibcon#about to read 5, iclass 12, count 0 2006.229.15:20:13.51#ibcon#read 5, iclass 12, count 0 2006.229.15:20:13.51#ibcon#about to read 6, iclass 12, count 0 2006.229.15:20:13.51#ibcon#read 6, iclass 12, count 0 2006.229.15:20:13.51#ibcon#end of sib2, iclass 12, count 0 2006.229.15:20:13.52#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:20:13.52#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:20:13.52#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:20:13.52#ibcon#*before write, iclass 12, count 0 2006.229.15:20:13.52#ibcon#enter sib2, iclass 12, count 0 2006.229.15:20:13.52#ibcon#flushed, iclass 12, count 0 2006.229.15:20:13.52#ibcon#about to write, iclass 12, count 0 2006.229.15:20:13.52#ibcon#wrote, iclass 12, count 0 2006.229.15:20:13.52#ibcon#about to read 3, iclass 12, count 0 2006.229.15:20:13.55#ibcon#read 3, iclass 12, count 0 2006.229.15:20:13.55#ibcon#about to read 4, iclass 12, count 0 2006.229.15:20:13.55#ibcon#read 4, iclass 12, count 0 2006.229.15:20:13.55#ibcon#about to read 5, iclass 12, count 0 2006.229.15:20:13.55#ibcon#read 5, iclass 12, count 0 2006.229.15:20:13.55#ibcon#about to read 6, iclass 12, count 0 2006.229.15:20:13.55#ibcon#read 6, iclass 12, count 0 2006.229.15:20:13.55#ibcon#end of sib2, iclass 12, count 0 2006.229.15:20:13.55#ibcon#*after write, iclass 12, count 0 2006.229.15:20:13.56#ibcon#*before return 0, iclass 12, count 0 2006.229.15:20:13.56#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:13.56#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:13.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:20:13.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:20:13.56$vck44/va=5,4 2006.229.15:20:13.56#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:20:13.56#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:20:13.56#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:13.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:13.61#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:13.61#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:13.61#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:20:13.61#ibcon#first serial, iclass 14, count 2 2006.229.15:20:13.61#ibcon#enter sib2, iclass 14, count 2 2006.229.15:20:13.61#ibcon#flushed, iclass 14, count 2 2006.229.15:20:13.61#ibcon#about to write, iclass 14, count 2 2006.229.15:20:13.61#ibcon#wrote, iclass 14, count 2 2006.229.15:20:13.61#ibcon#about to read 3, iclass 14, count 2 2006.229.15:20:13.63#ibcon#read 3, iclass 14, count 2 2006.229.15:20:13.63#ibcon#about to read 4, iclass 14, count 2 2006.229.15:20:13.63#ibcon#read 4, iclass 14, count 2 2006.229.15:20:13.63#ibcon#about to read 5, iclass 14, count 2 2006.229.15:20:13.63#ibcon#read 5, iclass 14, count 2 2006.229.15:20:13.63#ibcon#about to read 6, iclass 14, count 2 2006.229.15:20:13.63#ibcon#read 6, iclass 14, count 2 2006.229.15:20:13.63#ibcon#end of sib2, iclass 14, count 2 2006.229.15:20:13.63#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:20:13.63#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:20:13.64#ibcon#[25=AT05-04\r\n] 2006.229.15:20:13.64#ibcon#*before write, iclass 14, count 2 2006.229.15:20:13.64#ibcon#enter sib2, iclass 14, count 2 2006.229.15:20:13.64#ibcon#flushed, iclass 14, count 2 2006.229.15:20:13.64#ibcon#about to write, iclass 14, count 2 2006.229.15:20:13.64#ibcon#wrote, iclass 14, count 2 2006.229.15:20:13.64#ibcon#about to read 3, iclass 14, count 2 2006.229.15:20:13.66#ibcon#read 3, iclass 14, count 2 2006.229.15:20:13.66#ibcon#about to read 4, iclass 14, count 2 2006.229.15:20:13.66#ibcon#read 4, iclass 14, count 2 2006.229.15:20:13.66#ibcon#about to read 5, iclass 14, count 2 2006.229.15:20:13.66#ibcon#read 5, iclass 14, count 2 2006.229.15:20:13.66#ibcon#about to read 6, iclass 14, count 2 2006.229.15:20:13.66#ibcon#read 6, iclass 14, count 2 2006.229.15:20:13.66#ibcon#end of sib2, iclass 14, count 2 2006.229.15:20:13.67#ibcon#*after write, iclass 14, count 2 2006.229.15:20:13.67#ibcon#*before return 0, iclass 14, count 2 2006.229.15:20:13.67#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:13.67#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:13.67#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:20:13.67#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:13.67#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:13.78#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:13.78#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:13.78#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:20:13.78#ibcon#first serial, iclass 14, count 0 2006.229.15:20:13.78#ibcon#enter sib2, iclass 14, count 0 2006.229.15:20:13.78#ibcon#flushed, iclass 14, count 0 2006.229.15:20:13.78#ibcon#about to write, iclass 14, count 0 2006.229.15:20:13.78#ibcon#wrote, iclass 14, count 0 2006.229.15:20:13.78#ibcon#about to read 3, iclass 14, count 0 2006.229.15:20:13.80#ibcon#read 3, iclass 14, count 0 2006.229.15:20:13.80#ibcon#about to read 4, iclass 14, count 0 2006.229.15:20:13.80#ibcon#read 4, iclass 14, count 0 2006.229.15:20:13.80#ibcon#about to read 5, iclass 14, count 0 2006.229.15:20:13.80#ibcon#read 5, iclass 14, count 0 2006.229.15:20:13.80#ibcon#about to read 6, iclass 14, count 0 2006.229.15:20:13.80#ibcon#read 6, iclass 14, count 0 2006.229.15:20:13.80#ibcon#end of sib2, iclass 14, count 0 2006.229.15:20:13.80#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:20:13.80#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:20:13.80#ibcon#[25=USB\r\n] 2006.229.15:20:13.81#ibcon#*before write, iclass 14, count 0 2006.229.15:20:13.81#ibcon#enter sib2, iclass 14, count 0 2006.229.15:20:13.81#ibcon#flushed, iclass 14, count 0 2006.229.15:20:13.81#ibcon#about to write, iclass 14, count 0 2006.229.15:20:13.81#ibcon#wrote, iclass 14, count 0 2006.229.15:20:13.81#ibcon#about to read 3, iclass 14, count 0 2006.229.15:20:13.83#ibcon#read 3, iclass 14, count 0 2006.229.15:20:13.83#ibcon#about to read 4, iclass 14, count 0 2006.229.15:20:13.83#ibcon#read 4, iclass 14, count 0 2006.229.15:20:13.83#ibcon#about to read 5, iclass 14, count 0 2006.229.15:20:13.83#ibcon#read 5, iclass 14, count 0 2006.229.15:20:13.83#ibcon#about to read 6, iclass 14, count 0 2006.229.15:20:13.83#ibcon#read 6, iclass 14, count 0 2006.229.15:20:13.83#ibcon#end of sib2, iclass 14, count 0 2006.229.15:20:13.83#ibcon#*after write, iclass 14, count 0 2006.229.15:20:13.83#ibcon#*before return 0, iclass 14, count 0 2006.229.15:20:13.84#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:13.84#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:13.84#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:20:13.84#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:20:13.84$vck44/valo=6,814.99 2006.229.15:20:13.84#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:20:13.84#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:20:13.84#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:13.84#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:13.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:13.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:13.84#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:20:13.84#ibcon#first serial, iclass 16, count 0 2006.229.15:20:13.84#ibcon#enter sib2, iclass 16, count 0 2006.229.15:20:13.84#ibcon#flushed, iclass 16, count 0 2006.229.15:20:13.84#ibcon#about to write, iclass 16, count 0 2006.229.15:20:13.84#ibcon#wrote, iclass 16, count 0 2006.229.15:20:13.84#ibcon#about to read 3, iclass 16, count 0 2006.229.15:20:13.85#ibcon#read 3, iclass 16, count 0 2006.229.15:20:13.85#ibcon#about to read 4, iclass 16, count 0 2006.229.15:20:13.85#ibcon#read 4, iclass 16, count 0 2006.229.15:20:13.85#ibcon#about to read 5, iclass 16, count 0 2006.229.15:20:13.85#ibcon#read 5, iclass 16, count 0 2006.229.15:20:13.85#ibcon#about to read 6, iclass 16, count 0 2006.229.15:20:13.85#ibcon#read 6, iclass 16, count 0 2006.229.15:20:13.85#ibcon#end of sib2, iclass 16, count 0 2006.229.15:20:13.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:20:13.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:20:13.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:20:13.85#ibcon#*before write, iclass 16, count 0 2006.229.15:20:13.86#ibcon#enter sib2, iclass 16, count 0 2006.229.15:20:13.86#ibcon#flushed, iclass 16, count 0 2006.229.15:20:13.86#ibcon#about to write, iclass 16, count 0 2006.229.15:20:13.86#ibcon#wrote, iclass 16, count 0 2006.229.15:20:13.86#ibcon#about to read 3, iclass 16, count 0 2006.229.15:20:13.89#ibcon#read 3, iclass 16, count 0 2006.229.15:20:13.89#ibcon#about to read 4, iclass 16, count 0 2006.229.15:20:13.89#ibcon#read 4, iclass 16, count 0 2006.229.15:20:13.89#ibcon#about to read 5, iclass 16, count 0 2006.229.15:20:13.89#ibcon#read 5, iclass 16, count 0 2006.229.15:20:13.89#ibcon#about to read 6, iclass 16, count 0 2006.229.15:20:13.89#ibcon#read 6, iclass 16, count 0 2006.229.15:20:13.89#ibcon#end of sib2, iclass 16, count 0 2006.229.15:20:13.89#ibcon#*after write, iclass 16, count 0 2006.229.15:20:13.89#ibcon#*before return 0, iclass 16, count 0 2006.229.15:20:13.89#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:13.89#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:13.90#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:20:13.90#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:20:13.90$vck44/va=6,4 2006.229.15:20:13.90#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:20:13.90#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:20:13.90#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:13.90#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:13.95#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:13.95#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:13.95#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:20:13.95#ibcon#first serial, iclass 18, count 2 2006.229.15:20:13.95#ibcon#enter sib2, iclass 18, count 2 2006.229.15:20:13.95#ibcon#flushed, iclass 18, count 2 2006.229.15:20:13.95#ibcon#about to write, iclass 18, count 2 2006.229.15:20:13.95#ibcon#wrote, iclass 18, count 2 2006.229.15:20:13.95#ibcon#about to read 3, iclass 18, count 2 2006.229.15:20:13.97#ibcon#read 3, iclass 18, count 2 2006.229.15:20:13.97#ibcon#about to read 4, iclass 18, count 2 2006.229.15:20:13.97#ibcon#read 4, iclass 18, count 2 2006.229.15:20:13.97#ibcon#about to read 5, iclass 18, count 2 2006.229.15:20:13.97#ibcon#read 5, iclass 18, count 2 2006.229.15:20:13.97#ibcon#about to read 6, iclass 18, count 2 2006.229.15:20:13.97#ibcon#read 6, iclass 18, count 2 2006.229.15:20:13.97#ibcon#end of sib2, iclass 18, count 2 2006.229.15:20:13.97#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:20:13.97#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:20:13.97#ibcon#[25=AT06-04\r\n] 2006.229.15:20:13.98#ibcon#*before write, iclass 18, count 2 2006.229.15:20:13.98#ibcon#enter sib2, iclass 18, count 2 2006.229.15:20:13.98#ibcon#flushed, iclass 18, count 2 2006.229.15:20:13.98#ibcon#about to write, iclass 18, count 2 2006.229.15:20:13.98#ibcon#wrote, iclass 18, count 2 2006.229.15:20:13.98#ibcon#about to read 3, iclass 18, count 2 2006.229.15:20:14.00#ibcon#read 3, iclass 18, count 2 2006.229.15:20:14.00#ibcon#about to read 4, iclass 18, count 2 2006.229.15:20:14.00#ibcon#read 4, iclass 18, count 2 2006.229.15:20:14.00#ibcon#about to read 5, iclass 18, count 2 2006.229.15:20:14.00#ibcon#read 5, iclass 18, count 2 2006.229.15:20:14.00#ibcon#about to read 6, iclass 18, count 2 2006.229.15:20:14.00#ibcon#read 6, iclass 18, count 2 2006.229.15:20:14.00#ibcon#end of sib2, iclass 18, count 2 2006.229.15:20:14.01#ibcon#*after write, iclass 18, count 2 2006.229.15:20:14.01#ibcon#*before return 0, iclass 18, count 2 2006.229.15:20:14.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:14.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:14.01#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:20:14.01#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:14.01#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:14.12#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:14.12#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:14.12#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:20:14.12#ibcon#first serial, iclass 18, count 0 2006.229.15:20:14.12#ibcon#enter sib2, iclass 18, count 0 2006.229.15:20:14.12#ibcon#flushed, iclass 18, count 0 2006.229.15:20:14.12#ibcon#about to write, iclass 18, count 0 2006.229.15:20:14.13#ibcon#wrote, iclass 18, count 0 2006.229.15:20:14.13#ibcon#about to read 3, iclass 18, count 0 2006.229.15:20:14.14#ibcon#read 3, iclass 18, count 0 2006.229.15:20:14.14#ibcon#about to read 4, iclass 18, count 0 2006.229.15:20:14.14#ibcon#read 4, iclass 18, count 0 2006.229.15:20:14.14#ibcon#about to read 5, iclass 18, count 0 2006.229.15:20:14.14#ibcon#read 5, iclass 18, count 0 2006.229.15:20:14.14#ibcon#about to read 6, iclass 18, count 0 2006.229.15:20:14.14#ibcon#read 6, iclass 18, count 0 2006.229.15:20:14.14#ibcon#end of sib2, iclass 18, count 0 2006.229.15:20:14.14#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:20:14.14#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:20:14.15#ibcon#[25=USB\r\n] 2006.229.15:20:14.15#ibcon#*before write, iclass 18, count 0 2006.229.15:20:14.15#ibcon#enter sib2, iclass 18, count 0 2006.229.15:20:14.15#ibcon#flushed, iclass 18, count 0 2006.229.15:20:14.15#ibcon#about to write, iclass 18, count 0 2006.229.15:20:14.15#ibcon#wrote, iclass 18, count 0 2006.229.15:20:14.15#ibcon#about to read 3, iclass 18, count 0 2006.229.15:20:14.17#ibcon#read 3, iclass 18, count 0 2006.229.15:20:14.17#ibcon#about to read 4, iclass 18, count 0 2006.229.15:20:14.17#ibcon#read 4, iclass 18, count 0 2006.229.15:20:14.17#ibcon#about to read 5, iclass 18, count 0 2006.229.15:20:14.17#ibcon#read 5, iclass 18, count 0 2006.229.15:20:14.17#ibcon#about to read 6, iclass 18, count 0 2006.229.15:20:14.17#ibcon#read 6, iclass 18, count 0 2006.229.15:20:14.17#ibcon#end of sib2, iclass 18, count 0 2006.229.15:20:14.17#ibcon#*after write, iclass 18, count 0 2006.229.15:20:14.17#ibcon#*before return 0, iclass 18, count 0 2006.229.15:20:14.17#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:14.17#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:14.18#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:20:14.18#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:20:14.18$vck44/valo=7,864.99 2006.229.15:20:14.18#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:20:14.18#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:20:14.18#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:14.18#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:14.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:14.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:14.18#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:20:14.18#ibcon#first serial, iclass 20, count 0 2006.229.15:20:14.18#ibcon#enter sib2, iclass 20, count 0 2006.229.15:20:14.18#ibcon#flushed, iclass 20, count 0 2006.229.15:20:14.18#ibcon#about to write, iclass 20, count 0 2006.229.15:20:14.18#ibcon#wrote, iclass 20, count 0 2006.229.15:20:14.18#ibcon#about to read 3, iclass 20, count 0 2006.229.15:20:14.19#ibcon#read 3, iclass 20, count 0 2006.229.15:20:14.19#ibcon#about to read 4, iclass 20, count 0 2006.229.15:20:14.19#ibcon#read 4, iclass 20, count 0 2006.229.15:20:14.19#ibcon#about to read 5, iclass 20, count 0 2006.229.15:20:14.19#ibcon#read 5, iclass 20, count 0 2006.229.15:20:14.19#ibcon#about to read 6, iclass 20, count 0 2006.229.15:20:14.19#ibcon#read 6, iclass 20, count 0 2006.229.15:20:14.19#ibcon#end of sib2, iclass 20, count 0 2006.229.15:20:14.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:20:14.20#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:20:14.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:20:14.20#ibcon#*before write, iclass 20, count 0 2006.229.15:20:14.20#ibcon#enter sib2, iclass 20, count 0 2006.229.15:20:14.20#ibcon#flushed, iclass 20, count 0 2006.229.15:20:14.20#ibcon#about to write, iclass 20, count 0 2006.229.15:20:14.20#ibcon#wrote, iclass 20, count 0 2006.229.15:20:14.20#ibcon#about to read 3, iclass 20, count 0 2006.229.15:20:14.23#ibcon#read 3, iclass 20, count 0 2006.229.15:20:14.23#ibcon#about to read 4, iclass 20, count 0 2006.229.15:20:14.23#ibcon#read 4, iclass 20, count 0 2006.229.15:20:14.23#ibcon#about to read 5, iclass 20, count 0 2006.229.15:20:14.23#ibcon#read 5, iclass 20, count 0 2006.229.15:20:14.23#ibcon#about to read 6, iclass 20, count 0 2006.229.15:20:14.23#ibcon#read 6, iclass 20, count 0 2006.229.15:20:14.23#ibcon#end of sib2, iclass 20, count 0 2006.229.15:20:14.23#ibcon#*after write, iclass 20, count 0 2006.229.15:20:14.24#ibcon#*before return 0, iclass 20, count 0 2006.229.15:20:14.24#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:14.24#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:14.24#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:20:14.24#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:20:14.24$vck44/va=7,5 2006.229.15:20:14.24#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:20:14.24#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:20:14.24#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:14.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:14.28#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:14.28#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:14.28#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:20:14.28#ibcon#first serial, iclass 22, count 2 2006.229.15:20:14.28#ibcon#enter sib2, iclass 22, count 2 2006.229.15:20:14.28#ibcon#flushed, iclass 22, count 2 2006.229.15:20:14.28#ibcon#about to write, iclass 22, count 2 2006.229.15:20:14.28#ibcon#wrote, iclass 22, count 2 2006.229.15:20:14.28#ibcon#about to read 3, iclass 22, count 2 2006.229.15:20:14.30#ibcon#read 3, iclass 22, count 2 2006.229.15:20:14.30#ibcon#about to read 4, iclass 22, count 2 2006.229.15:20:14.30#ibcon#read 4, iclass 22, count 2 2006.229.15:20:14.30#ibcon#about to read 5, iclass 22, count 2 2006.229.15:20:14.30#ibcon#read 5, iclass 22, count 2 2006.229.15:20:14.30#ibcon#about to read 6, iclass 22, count 2 2006.229.15:20:14.30#ibcon#read 6, iclass 22, count 2 2006.229.15:20:14.30#ibcon#end of sib2, iclass 22, count 2 2006.229.15:20:14.30#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:20:14.31#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:20:14.31#ibcon#[25=AT07-05\r\n] 2006.229.15:20:14.31#ibcon#*before write, iclass 22, count 2 2006.229.15:20:14.31#ibcon#enter sib2, iclass 22, count 2 2006.229.15:20:14.31#ibcon#flushed, iclass 22, count 2 2006.229.15:20:14.31#ibcon#about to write, iclass 22, count 2 2006.229.15:20:14.31#ibcon#wrote, iclass 22, count 2 2006.229.15:20:14.31#ibcon#about to read 3, iclass 22, count 2 2006.229.15:20:14.33#ibcon#read 3, iclass 22, count 2 2006.229.15:20:14.33#ibcon#about to read 4, iclass 22, count 2 2006.229.15:20:14.33#ibcon#read 4, iclass 22, count 2 2006.229.15:20:14.33#ibcon#about to read 5, iclass 22, count 2 2006.229.15:20:14.33#ibcon#read 5, iclass 22, count 2 2006.229.15:20:14.33#ibcon#about to read 6, iclass 22, count 2 2006.229.15:20:14.33#ibcon#read 6, iclass 22, count 2 2006.229.15:20:14.33#ibcon#end of sib2, iclass 22, count 2 2006.229.15:20:14.34#ibcon#*after write, iclass 22, count 2 2006.229.15:20:14.34#ibcon#*before return 0, iclass 22, count 2 2006.229.15:20:14.34#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:14.34#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:14.34#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:20:14.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:14.34#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:14.45#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:14.45#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:14.45#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:20:14.45#ibcon#first serial, iclass 22, count 0 2006.229.15:20:14.45#ibcon#enter sib2, iclass 22, count 0 2006.229.15:20:14.45#ibcon#flushed, iclass 22, count 0 2006.229.15:20:14.45#ibcon#about to write, iclass 22, count 0 2006.229.15:20:14.46#ibcon#wrote, iclass 22, count 0 2006.229.15:20:14.46#ibcon#about to read 3, iclass 22, count 0 2006.229.15:20:14.47#ibcon#read 3, iclass 22, count 0 2006.229.15:20:14.47#ibcon#about to read 4, iclass 22, count 0 2006.229.15:20:14.47#ibcon#read 4, iclass 22, count 0 2006.229.15:20:14.47#ibcon#about to read 5, iclass 22, count 0 2006.229.15:20:14.47#ibcon#read 5, iclass 22, count 0 2006.229.15:20:14.47#ibcon#about to read 6, iclass 22, count 0 2006.229.15:20:14.47#ibcon#read 6, iclass 22, count 0 2006.229.15:20:14.47#ibcon#end of sib2, iclass 22, count 0 2006.229.15:20:14.48#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:20:14.48#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:20:14.48#ibcon#[25=USB\r\n] 2006.229.15:20:14.48#ibcon#*before write, iclass 22, count 0 2006.229.15:20:14.48#ibcon#enter sib2, iclass 22, count 0 2006.229.15:20:14.48#ibcon#flushed, iclass 22, count 0 2006.229.15:20:14.48#ibcon#about to write, iclass 22, count 0 2006.229.15:20:14.48#ibcon#wrote, iclass 22, count 0 2006.229.15:20:14.48#ibcon#about to read 3, iclass 22, count 0 2006.229.15:20:14.50#ibcon#read 3, iclass 22, count 0 2006.229.15:20:14.50#ibcon#about to read 4, iclass 22, count 0 2006.229.15:20:14.50#ibcon#read 4, iclass 22, count 0 2006.229.15:20:14.50#ibcon#about to read 5, iclass 22, count 0 2006.229.15:20:14.50#ibcon#read 5, iclass 22, count 0 2006.229.15:20:14.50#ibcon#about to read 6, iclass 22, count 0 2006.229.15:20:14.50#ibcon#read 6, iclass 22, count 0 2006.229.15:20:14.50#ibcon#end of sib2, iclass 22, count 0 2006.229.15:20:14.50#ibcon#*after write, iclass 22, count 0 2006.229.15:20:14.51#ibcon#*before return 0, iclass 22, count 0 2006.229.15:20:14.51#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:14.51#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:14.51#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:20:14.51#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:20:14.51$vck44/valo=8,884.99 2006.229.15:20:14.51#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:20:14.51#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:20:14.51#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:14.51#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:20:14.51#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:20:14.51#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:20:14.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:20:14.51#ibcon#first serial, iclass 24, count 0 2006.229.15:20:14.51#ibcon#enter sib2, iclass 24, count 0 2006.229.15:20:14.51#ibcon#flushed, iclass 24, count 0 2006.229.15:20:14.51#ibcon#about to write, iclass 24, count 0 2006.229.15:20:14.51#ibcon#wrote, iclass 24, count 0 2006.229.15:20:14.51#ibcon#about to read 3, iclass 24, count 0 2006.229.15:20:14.52#ibcon#read 3, iclass 24, count 0 2006.229.15:20:14.52#ibcon#about to read 4, iclass 24, count 0 2006.229.15:20:14.52#ibcon#read 4, iclass 24, count 0 2006.229.15:20:14.52#ibcon#about to read 5, iclass 24, count 0 2006.229.15:20:14.52#ibcon#read 5, iclass 24, count 0 2006.229.15:20:14.52#ibcon#about to read 6, iclass 24, count 0 2006.229.15:20:14.52#ibcon#read 6, iclass 24, count 0 2006.229.15:20:14.52#ibcon#end of sib2, iclass 24, count 0 2006.229.15:20:14.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:20:14.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:20:14.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:20:14.53#ibcon#*before write, iclass 24, count 0 2006.229.15:20:14.53#ibcon#enter sib2, iclass 24, count 0 2006.229.15:20:14.53#ibcon#flushed, iclass 24, count 0 2006.229.15:20:14.53#ibcon#about to write, iclass 24, count 0 2006.229.15:20:14.53#ibcon#wrote, iclass 24, count 0 2006.229.15:20:14.53#ibcon#about to read 3, iclass 24, count 0 2006.229.15:20:14.56#ibcon#read 3, iclass 24, count 0 2006.229.15:20:14.56#ibcon#about to read 4, iclass 24, count 0 2006.229.15:20:14.56#ibcon#read 4, iclass 24, count 0 2006.229.15:20:14.56#ibcon#about to read 5, iclass 24, count 0 2006.229.15:20:14.56#ibcon#read 5, iclass 24, count 0 2006.229.15:20:14.56#ibcon#about to read 6, iclass 24, count 0 2006.229.15:20:14.56#ibcon#read 6, iclass 24, count 0 2006.229.15:20:14.56#ibcon#end of sib2, iclass 24, count 0 2006.229.15:20:14.56#ibcon#*after write, iclass 24, count 0 2006.229.15:20:14.57#ibcon#*before return 0, iclass 24, count 0 2006.229.15:20:14.57#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:20:14.57#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:20:14.57#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:20:14.57#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:20:14.57$vck44/va=8,6 2006.229.15:20:14.57#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:20:14.57#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:20:14.57#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:14.57#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:20:14.62#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:20:14.62#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:20:14.62#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:20:14.62#ibcon#first serial, iclass 26, count 2 2006.229.15:20:14.62#ibcon#enter sib2, iclass 26, count 2 2006.229.15:20:14.62#ibcon#flushed, iclass 26, count 2 2006.229.15:20:14.62#ibcon#about to write, iclass 26, count 2 2006.229.15:20:14.62#ibcon#wrote, iclass 26, count 2 2006.229.15:20:14.62#ibcon#about to read 3, iclass 26, count 2 2006.229.15:20:14.64#ibcon#read 3, iclass 26, count 2 2006.229.15:20:14.64#ibcon#about to read 4, iclass 26, count 2 2006.229.15:20:14.64#ibcon#read 4, iclass 26, count 2 2006.229.15:20:14.64#ibcon#about to read 5, iclass 26, count 2 2006.229.15:20:14.64#ibcon#read 5, iclass 26, count 2 2006.229.15:20:14.64#ibcon#about to read 6, iclass 26, count 2 2006.229.15:20:14.64#ibcon#read 6, iclass 26, count 2 2006.229.15:20:14.64#ibcon#end of sib2, iclass 26, count 2 2006.229.15:20:14.64#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:20:14.64#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:20:14.64#ibcon#[25=AT08-06\r\n] 2006.229.15:20:14.64#ibcon#*before write, iclass 26, count 2 2006.229.15:20:14.64#ibcon#enter sib2, iclass 26, count 2 2006.229.15:20:14.65#ibcon#flushed, iclass 26, count 2 2006.229.15:20:14.65#ibcon#about to write, iclass 26, count 2 2006.229.15:20:14.65#ibcon#wrote, iclass 26, count 2 2006.229.15:20:14.65#ibcon#about to read 3, iclass 26, count 2 2006.229.15:20:14.67#ibcon#read 3, iclass 26, count 2 2006.229.15:20:14.67#ibcon#about to read 4, iclass 26, count 2 2006.229.15:20:14.67#ibcon#read 4, iclass 26, count 2 2006.229.15:20:14.67#ibcon#about to read 5, iclass 26, count 2 2006.229.15:20:14.67#ibcon#read 5, iclass 26, count 2 2006.229.15:20:14.67#ibcon#about to read 6, iclass 26, count 2 2006.229.15:20:14.67#ibcon#read 6, iclass 26, count 2 2006.229.15:20:14.67#ibcon#end of sib2, iclass 26, count 2 2006.229.15:20:14.67#ibcon#*after write, iclass 26, count 2 2006.229.15:20:14.68#ibcon#*before return 0, iclass 26, count 2 2006.229.15:20:14.68#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:20:14.68#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:20:14.68#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:20:14.68#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:14.68#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:20:14.79#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:20:14.79#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:20:14.79#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:20:14.79#ibcon#first serial, iclass 26, count 0 2006.229.15:20:14.79#ibcon#enter sib2, iclass 26, count 0 2006.229.15:20:14.79#ibcon#flushed, iclass 26, count 0 2006.229.15:20:14.79#ibcon#about to write, iclass 26, count 0 2006.229.15:20:14.79#ibcon#wrote, iclass 26, count 0 2006.229.15:20:14.79#ibcon#about to read 3, iclass 26, count 0 2006.229.15:20:14.81#ibcon#read 3, iclass 26, count 0 2006.229.15:20:14.81#ibcon#about to read 4, iclass 26, count 0 2006.229.15:20:14.81#ibcon#read 4, iclass 26, count 0 2006.229.15:20:14.81#ibcon#about to read 5, iclass 26, count 0 2006.229.15:20:14.81#ibcon#read 5, iclass 26, count 0 2006.229.15:20:14.81#ibcon#about to read 6, iclass 26, count 0 2006.229.15:20:14.81#ibcon#read 6, iclass 26, count 0 2006.229.15:20:14.82#ibcon#end of sib2, iclass 26, count 0 2006.229.15:20:14.82#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:20:14.82#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:20:14.82#ibcon#[25=USB\r\n] 2006.229.15:20:14.82#ibcon#*before write, iclass 26, count 0 2006.229.15:20:14.82#ibcon#enter sib2, iclass 26, count 0 2006.229.15:20:14.82#ibcon#flushed, iclass 26, count 0 2006.229.15:20:14.82#ibcon#about to write, iclass 26, count 0 2006.229.15:20:14.82#ibcon#wrote, iclass 26, count 0 2006.229.15:20:14.82#ibcon#about to read 3, iclass 26, count 0 2006.229.15:20:14.84#ibcon#read 3, iclass 26, count 0 2006.229.15:20:14.84#ibcon#about to read 4, iclass 26, count 0 2006.229.15:20:14.84#ibcon#read 4, iclass 26, count 0 2006.229.15:20:14.84#ibcon#about to read 5, iclass 26, count 0 2006.229.15:20:14.84#ibcon#read 5, iclass 26, count 0 2006.229.15:20:14.84#ibcon#about to read 6, iclass 26, count 0 2006.229.15:20:14.84#ibcon#read 6, iclass 26, count 0 2006.229.15:20:14.84#ibcon#end of sib2, iclass 26, count 0 2006.229.15:20:14.84#ibcon#*after write, iclass 26, count 0 2006.229.15:20:14.84#ibcon#*before return 0, iclass 26, count 0 2006.229.15:20:14.85#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:20:14.85#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:20:14.85#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:20:14.85#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:20:14.85$vck44/vblo=1,629.99 2006.229.15:20:14.85#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:20:14.85#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:20:14.85#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:14.85#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:14.85#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:14.85#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:14.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:20:14.85#ibcon#first serial, iclass 28, count 0 2006.229.15:20:14.85#ibcon#enter sib2, iclass 28, count 0 2006.229.15:20:14.85#ibcon#flushed, iclass 28, count 0 2006.229.15:20:14.85#ibcon#about to write, iclass 28, count 0 2006.229.15:20:14.85#ibcon#wrote, iclass 28, count 0 2006.229.15:20:14.85#ibcon#about to read 3, iclass 28, count 0 2006.229.15:20:14.86#ibcon#read 3, iclass 28, count 0 2006.229.15:20:14.86#ibcon#about to read 4, iclass 28, count 0 2006.229.15:20:14.86#ibcon#read 4, iclass 28, count 0 2006.229.15:20:14.86#ibcon#about to read 5, iclass 28, count 0 2006.229.15:20:14.86#ibcon#read 5, iclass 28, count 0 2006.229.15:20:14.86#ibcon#about to read 6, iclass 28, count 0 2006.229.15:20:14.86#ibcon#read 6, iclass 28, count 0 2006.229.15:20:14.86#ibcon#end of sib2, iclass 28, count 0 2006.229.15:20:14.86#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:20:14.86#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:20:14.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:20:14.87#ibcon#*before write, iclass 28, count 0 2006.229.15:20:14.87#ibcon#enter sib2, iclass 28, count 0 2006.229.15:20:14.87#ibcon#flushed, iclass 28, count 0 2006.229.15:20:14.87#ibcon#about to write, iclass 28, count 0 2006.229.15:20:14.87#ibcon#wrote, iclass 28, count 0 2006.229.15:20:14.87#ibcon#about to read 3, iclass 28, count 0 2006.229.15:20:14.90#ibcon#read 3, iclass 28, count 0 2006.229.15:20:14.90#ibcon#about to read 4, iclass 28, count 0 2006.229.15:20:14.90#ibcon#read 4, iclass 28, count 0 2006.229.15:20:14.90#ibcon#about to read 5, iclass 28, count 0 2006.229.15:20:14.90#ibcon#read 5, iclass 28, count 0 2006.229.15:20:14.90#ibcon#about to read 6, iclass 28, count 0 2006.229.15:20:14.90#ibcon#read 6, iclass 28, count 0 2006.229.15:20:14.90#ibcon#end of sib2, iclass 28, count 0 2006.229.15:20:14.90#ibcon#*after write, iclass 28, count 0 2006.229.15:20:14.90#ibcon#*before return 0, iclass 28, count 0 2006.229.15:20:14.91#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:14.91#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:14.91#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:20:14.91#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:20:14.91$vck44/vb=1,4 2006.229.15:20:14.91#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:20:14.91#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:20:14.91#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:14.91#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:20:14.91#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:20:14.91#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:20:14.91#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:20:14.91#ibcon#first serial, iclass 30, count 2 2006.229.15:20:14.91#ibcon#enter sib2, iclass 30, count 2 2006.229.15:20:14.91#ibcon#flushed, iclass 30, count 2 2006.229.15:20:14.91#ibcon#about to write, iclass 30, count 2 2006.229.15:20:14.91#ibcon#wrote, iclass 30, count 2 2006.229.15:20:14.91#ibcon#about to read 3, iclass 30, count 2 2006.229.15:20:14.92#ibcon#read 3, iclass 30, count 2 2006.229.15:20:14.92#ibcon#about to read 4, iclass 30, count 2 2006.229.15:20:14.92#ibcon#read 4, iclass 30, count 2 2006.229.15:20:14.92#ibcon#about to read 5, iclass 30, count 2 2006.229.15:20:14.92#ibcon#read 5, iclass 30, count 2 2006.229.15:20:14.92#ibcon#about to read 6, iclass 30, count 2 2006.229.15:20:14.92#ibcon#read 6, iclass 30, count 2 2006.229.15:20:14.92#ibcon#end of sib2, iclass 30, count 2 2006.229.15:20:14.92#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:20:14.92#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:20:14.92#ibcon#[27=AT01-04\r\n] 2006.229.15:20:14.92#ibcon#*before write, iclass 30, count 2 2006.229.15:20:14.92#ibcon#enter sib2, iclass 30, count 2 2006.229.15:20:14.93#ibcon#flushed, iclass 30, count 2 2006.229.15:20:14.93#ibcon#about to write, iclass 30, count 2 2006.229.15:20:14.93#ibcon#wrote, iclass 30, count 2 2006.229.15:20:14.93#ibcon#about to read 3, iclass 30, count 2 2006.229.15:20:14.95#ibcon#read 3, iclass 30, count 2 2006.229.15:20:14.95#ibcon#about to read 4, iclass 30, count 2 2006.229.15:20:14.95#ibcon#read 4, iclass 30, count 2 2006.229.15:20:14.95#ibcon#about to read 5, iclass 30, count 2 2006.229.15:20:14.95#ibcon#read 5, iclass 30, count 2 2006.229.15:20:14.95#ibcon#about to read 6, iclass 30, count 2 2006.229.15:20:14.95#ibcon#read 6, iclass 30, count 2 2006.229.15:20:14.95#ibcon#end of sib2, iclass 30, count 2 2006.229.15:20:14.95#ibcon#*after write, iclass 30, count 2 2006.229.15:20:14.95#ibcon#*before return 0, iclass 30, count 2 2006.229.15:20:14.95#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:20:14.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:20:14.96#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:20:14.96#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:14.96#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:20:15.07#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:20:15.08#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:20:15.08#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:20:15.08#ibcon#first serial, iclass 30, count 0 2006.229.15:20:15.08#ibcon#enter sib2, iclass 30, count 0 2006.229.15:20:15.08#ibcon#flushed, iclass 30, count 0 2006.229.15:20:15.08#ibcon#about to write, iclass 30, count 0 2006.229.15:20:15.08#ibcon#wrote, iclass 30, count 0 2006.229.15:20:15.08#ibcon#about to read 3, iclass 30, count 0 2006.229.15:20:15.09#ibcon#read 3, iclass 30, count 0 2006.229.15:20:15.09#ibcon#about to read 4, iclass 30, count 0 2006.229.15:20:15.09#ibcon#read 4, iclass 30, count 0 2006.229.15:20:15.09#ibcon#about to read 5, iclass 30, count 0 2006.229.15:20:15.09#ibcon#read 5, iclass 30, count 0 2006.229.15:20:15.09#ibcon#about to read 6, iclass 30, count 0 2006.229.15:20:15.09#ibcon#read 6, iclass 30, count 0 2006.229.15:20:15.09#ibcon#end of sib2, iclass 30, count 0 2006.229.15:20:15.09#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:20:15.10#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:20:15.10#ibcon#[27=USB\r\n] 2006.229.15:20:15.10#ibcon#*before write, iclass 30, count 0 2006.229.15:20:15.10#ibcon#enter sib2, iclass 30, count 0 2006.229.15:20:15.10#ibcon#flushed, iclass 30, count 0 2006.229.15:20:15.10#ibcon#about to write, iclass 30, count 0 2006.229.15:20:15.10#ibcon#wrote, iclass 30, count 0 2006.229.15:20:15.10#ibcon#about to read 3, iclass 30, count 0 2006.229.15:20:15.12#ibcon#read 3, iclass 30, count 0 2006.229.15:20:15.12#ibcon#about to read 4, iclass 30, count 0 2006.229.15:20:15.12#ibcon#read 4, iclass 30, count 0 2006.229.15:20:15.12#ibcon#about to read 5, iclass 30, count 0 2006.229.15:20:15.12#ibcon#read 5, iclass 30, count 0 2006.229.15:20:15.12#ibcon#about to read 6, iclass 30, count 0 2006.229.15:20:15.12#ibcon#read 6, iclass 30, count 0 2006.229.15:20:15.12#ibcon#end of sib2, iclass 30, count 0 2006.229.15:20:15.12#ibcon#*after write, iclass 30, count 0 2006.229.15:20:15.13#ibcon#*before return 0, iclass 30, count 0 2006.229.15:20:15.13#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:20:15.13#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:20:15.13#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:20:15.13#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:20:15.13$vck44/vblo=2,634.99 2006.229.15:20:15.13#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:20:15.13#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:20:15.13#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:15.13#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:15.13#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:15.13#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:15.13#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:20:15.13#ibcon#first serial, iclass 32, count 0 2006.229.15:20:15.13#ibcon#enter sib2, iclass 32, count 0 2006.229.15:20:15.13#ibcon#flushed, iclass 32, count 0 2006.229.15:20:15.13#ibcon#about to write, iclass 32, count 0 2006.229.15:20:15.13#ibcon#wrote, iclass 32, count 0 2006.229.15:20:15.13#ibcon#about to read 3, iclass 32, count 0 2006.229.15:20:15.14#ibcon#read 3, iclass 32, count 0 2006.229.15:20:15.14#ibcon#about to read 4, iclass 32, count 0 2006.229.15:20:15.14#ibcon#read 4, iclass 32, count 0 2006.229.15:20:15.14#ibcon#about to read 5, iclass 32, count 0 2006.229.15:20:15.14#ibcon#read 5, iclass 32, count 0 2006.229.15:20:15.14#ibcon#about to read 6, iclass 32, count 0 2006.229.15:20:15.14#ibcon#read 6, iclass 32, count 0 2006.229.15:20:15.14#ibcon#end of sib2, iclass 32, count 0 2006.229.15:20:15.14#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:20:15.14#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:20:15.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:20:15.15#ibcon#*before write, iclass 32, count 0 2006.229.15:20:15.15#ibcon#enter sib2, iclass 32, count 0 2006.229.15:20:15.15#ibcon#flushed, iclass 32, count 0 2006.229.15:20:15.15#ibcon#about to write, iclass 32, count 0 2006.229.15:20:15.15#ibcon#wrote, iclass 32, count 0 2006.229.15:20:15.15#ibcon#about to read 3, iclass 32, count 0 2006.229.15:20:15.18#ibcon#read 3, iclass 32, count 0 2006.229.15:20:15.18#ibcon#about to read 4, iclass 32, count 0 2006.229.15:20:15.18#ibcon#read 4, iclass 32, count 0 2006.229.15:20:15.18#ibcon#about to read 5, iclass 32, count 0 2006.229.15:20:15.18#ibcon#read 5, iclass 32, count 0 2006.229.15:20:15.18#ibcon#about to read 6, iclass 32, count 0 2006.229.15:20:15.18#ibcon#read 6, iclass 32, count 0 2006.229.15:20:15.18#ibcon#end of sib2, iclass 32, count 0 2006.229.15:20:15.18#ibcon#*after write, iclass 32, count 0 2006.229.15:20:15.18#ibcon#*before return 0, iclass 32, count 0 2006.229.15:20:15.19#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:15.19#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:20:15.19#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:20:15.19#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:20:15.19$vck44/vb=2,4 2006.229.15:20:15.19#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.15:20:15.19#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.15:20:15.19#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:15.19#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:15.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:15.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:15.24#ibcon#enter wrdev, iclass 34, count 2 2006.229.15:20:15.24#ibcon#first serial, iclass 34, count 2 2006.229.15:20:15.24#ibcon#enter sib2, iclass 34, count 2 2006.229.15:20:15.24#ibcon#flushed, iclass 34, count 2 2006.229.15:20:15.24#ibcon#about to write, iclass 34, count 2 2006.229.15:20:15.24#ibcon#wrote, iclass 34, count 2 2006.229.15:20:15.24#ibcon#about to read 3, iclass 34, count 2 2006.229.15:20:15.26#ibcon#read 3, iclass 34, count 2 2006.229.15:20:15.26#ibcon#about to read 4, iclass 34, count 2 2006.229.15:20:15.26#ibcon#read 4, iclass 34, count 2 2006.229.15:20:15.26#ibcon#about to read 5, iclass 34, count 2 2006.229.15:20:15.26#ibcon#read 5, iclass 34, count 2 2006.229.15:20:15.26#ibcon#about to read 6, iclass 34, count 2 2006.229.15:20:15.26#ibcon#read 6, iclass 34, count 2 2006.229.15:20:15.26#ibcon#end of sib2, iclass 34, count 2 2006.229.15:20:15.26#ibcon#*mode == 0, iclass 34, count 2 2006.229.15:20:15.27#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.15:20:15.27#ibcon#[27=AT02-04\r\n] 2006.229.15:20:15.27#ibcon#*before write, iclass 34, count 2 2006.229.15:20:15.27#ibcon#enter sib2, iclass 34, count 2 2006.229.15:20:15.27#ibcon#flushed, iclass 34, count 2 2006.229.15:20:15.27#ibcon#about to write, iclass 34, count 2 2006.229.15:20:15.27#ibcon#wrote, iclass 34, count 2 2006.229.15:20:15.27#ibcon#about to read 3, iclass 34, count 2 2006.229.15:20:15.29#ibcon#read 3, iclass 34, count 2 2006.229.15:20:15.29#ibcon#about to read 4, iclass 34, count 2 2006.229.15:20:15.29#ibcon#read 4, iclass 34, count 2 2006.229.15:20:15.29#ibcon#about to read 5, iclass 34, count 2 2006.229.15:20:15.29#ibcon#read 5, iclass 34, count 2 2006.229.15:20:15.29#ibcon#about to read 6, iclass 34, count 2 2006.229.15:20:15.29#ibcon#read 6, iclass 34, count 2 2006.229.15:20:15.29#ibcon#end of sib2, iclass 34, count 2 2006.229.15:20:15.29#ibcon#*after write, iclass 34, count 2 2006.229.15:20:15.29#ibcon#*before return 0, iclass 34, count 2 2006.229.15:20:15.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:15.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:20:15.30#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.15:20:15.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:15.30#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:15.41#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:15.41#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:15.41#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:20:15.41#ibcon#first serial, iclass 34, count 0 2006.229.15:20:15.41#ibcon#enter sib2, iclass 34, count 0 2006.229.15:20:15.41#ibcon#flushed, iclass 34, count 0 2006.229.15:20:15.41#ibcon#about to write, iclass 34, count 0 2006.229.15:20:15.41#ibcon#wrote, iclass 34, count 0 2006.229.15:20:15.41#ibcon#about to read 3, iclass 34, count 0 2006.229.15:20:15.43#ibcon#read 3, iclass 34, count 0 2006.229.15:20:15.43#ibcon#about to read 4, iclass 34, count 0 2006.229.15:20:15.43#ibcon#read 4, iclass 34, count 0 2006.229.15:20:15.43#ibcon#about to read 5, iclass 34, count 0 2006.229.15:20:15.43#ibcon#read 5, iclass 34, count 0 2006.229.15:20:15.43#ibcon#about to read 6, iclass 34, count 0 2006.229.15:20:15.43#ibcon#read 6, iclass 34, count 0 2006.229.15:20:15.44#ibcon#end of sib2, iclass 34, count 0 2006.229.15:20:15.44#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:20:15.44#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:20:15.44#ibcon#[27=USB\r\n] 2006.229.15:20:15.44#ibcon#*before write, iclass 34, count 0 2006.229.15:20:15.44#ibcon#enter sib2, iclass 34, count 0 2006.229.15:20:15.44#ibcon#flushed, iclass 34, count 0 2006.229.15:20:15.44#ibcon#about to write, iclass 34, count 0 2006.229.15:20:15.44#ibcon#wrote, iclass 34, count 0 2006.229.15:20:15.44#ibcon#about to read 3, iclass 34, count 0 2006.229.15:20:15.46#ibcon#read 3, iclass 34, count 0 2006.229.15:20:15.46#ibcon#about to read 4, iclass 34, count 0 2006.229.15:20:15.46#ibcon#read 4, iclass 34, count 0 2006.229.15:20:15.46#ibcon#about to read 5, iclass 34, count 0 2006.229.15:20:15.46#ibcon#read 5, iclass 34, count 0 2006.229.15:20:15.46#ibcon#about to read 6, iclass 34, count 0 2006.229.15:20:15.46#ibcon#read 6, iclass 34, count 0 2006.229.15:20:15.46#ibcon#end of sib2, iclass 34, count 0 2006.229.15:20:15.46#ibcon#*after write, iclass 34, count 0 2006.229.15:20:15.47#ibcon#*before return 0, iclass 34, count 0 2006.229.15:20:15.47#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:15.47#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:20:15.47#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:20:15.47#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:20:15.47$vck44/vblo=3,649.99 2006.229.15:20:15.47#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.15:20:15.47#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.15:20:15.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:15.47#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:15.47#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:15.47#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:15.47#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:20:15.47#ibcon#first serial, iclass 36, count 0 2006.229.15:20:15.47#ibcon#enter sib2, iclass 36, count 0 2006.229.15:20:15.47#ibcon#flushed, iclass 36, count 0 2006.229.15:20:15.47#ibcon#about to write, iclass 36, count 0 2006.229.15:20:15.47#ibcon#wrote, iclass 36, count 0 2006.229.15:20:15.47#ibcon#about to read 3, iclass 36, count 0 2006.229.15:20:15.48#ibcon#read 3, iclass 36, count 0 2006.229.15:20:15.48#ibcon#about to read 4, iclass 36, count 0 2006.229.15:20:15.48#ibcon#read 4, iclass 36, count 0 2006.229.15:20:15.48#ibcon#about to read 5, iclass 36, count 0 2006.229.15:20:15.48#ibcon#read 5, iclass 36, count 0 2006.229.15:20:15.48#ibcon#about to read 6, iclass 36, count 0 2006.229.15:20:15.48#ibcon#read 6, iclass 36, count 0 2006.229.15:20:15.48#ibcon#end of sib2, iclass 36, count 0 2006.229.15:20:15.49#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:20:15.49#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:20:15.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:20:15.49#ibcon#*before write, iclass 36, count 0 2006.229.15:20:15.49#ibcon#enter sib2, iclass 36, count 0 2006.229.15:20:15.49#ibcon#flushed, iclass 36, count 0 2006.229.15:20:15.49#ibcon#about to write, iclass 36, count 0 2006.229.15:20:15.49#ibcon#wrote, iclass 36, count 0 2006.229.15:20:15.49#ibcon#about to read 3, iclass 36, count 0 2006.229.15:20:15.52#ibcon#read 3, iclass 36, count 0 2006.229.15:20:15.53#ibcon#about to read 4, iclass 36, count 0 2006.229.15:20:15.53#ibcon#read 4, iclass 36, count 0 2006.229.15:20:15.53#ibcon#about to read 5, iclass 36, count 0 2006.229.15:20:15.53#ibcon#read 5, iclass 36, count 0 2006.229.15:20:15.53#ibcon#about to read 6, iclass 36, count 0 2006.229.15:20:15.53#ibcon#read 6, iclass 36, count 0 2006.229.15:20:15.53#ibcon#end of sib2, iclass 36, count 0 2006.229.15:20:15.53#ibcon#*after write, iclass 36, count 0 2006.229.15:20:15.53#ibcon#*before return 0, iclass 36, count 0 2006.229.15:20:15.53#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:15.53#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:20:15.53#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:20:15.53#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:20:15.53$vck44/vb=3,4 2006.229.15:20:15.53#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.15:20:15.53#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.15:20:15.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:15.53#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:15.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:15.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:15.58#ibcon#enter wrdev, iclass 38, count 2 2006.229.15:20:15.58#ibcon#first serial, iclass 38, count 2 2006.229.15:20:15.58#ibcon#enter sib2, iclass 38, count 2 2006.229.15:20:15.58#ibcon#flushed, iclass 38, count 2 2006.229.15:20:15.58#ibcon#about to write, iclass 38, count 2 2006.229.15:20:15.58#ibcon#wrote, iclass 38, count 2 2006.229.15:20:15.58#ibcon#about to read 3, iclass 38, count 2 2006.229.15:20:15.60#ibcon#read 3, iclass 38, count 2 2006.229.15:20:15.60#ibcon#about to read 4, iclass 38, count 2 2006.229.15:20:15.60#ibcon#read 4, iclass 38, count 2 2006.229.15:20:15.60#ibcon#about to read 5, iclass 38, count 2 2006.229.15:20:15.60#ibcon#read 5, iclass 38, count 2 2006.229.15:20:15.60#ibcon#about to read 6, iclass 38, count 2 2006.229.15:20:15.60#ibcon#read 6, iclass 38, count 2 2006.229.15:20:15.60#ibcon#end of sib2, iclass 38, count 2 2006.229.15:20:15.60#ibcon#*mode == 0, iclass 38, count 2 2006.229.15:20:15.61#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.15:20:15.61#ibcon#[27=AT03-04\r\n] 2006.229.15:20:15.61#ibcon#*before write, iclass 38, count 2 2006.229.15:20:15.61#ibcon#enter sib2, iclass 38, count 2 2006.229.15:20:15.61#ibcon#flushed, iclass 38, count 2 2006.229.15:20:15.61#ibcon#about to write, iclass 38, count 2 2006.229.15:20:15.61#ibcon#wrote, iclass 38, count 2 2006.229.15:20:15.61#ibcon#about to read 3, iclass 38, count 2 2006.229.15:20:15.63#ibcon#read 3, iclass 38, count 2 2006.229.15:20:15.63#ibcon#about to read 4, iclass 38, count 2 2006.229.15:20:15.63#ibcon#read 4, iclass 38, count 2 2006.229.15:20:15.63#ibcon#about to read 5, iclass 38, count 2 2006.229.15:20:15.63#ibcon#read 5, iclass 38, count 2 2006.229.15:20:15.63#ibcon#about to read 6, iclass 38, count 2 2006.229.15:20:15.63#ibcon#read 6, iclass 38, count 2 2006.229.15:20:15.63#ibcon#end of sib2, iclass 38, count 2 2006.229.15:20:15.63#ibcon#*after write, iclass 38, count 2 2006.229.15:20:15.64#ibcon#*before return 0, iclass 38, count 2 2006.229.15:20:15.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:15.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:20:15.64#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.15:20:15.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:15.64#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:15.75#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:15.75#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:15.75#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:20:15.75#ibcon#first serial, iclass 38, count 0 2006.229.15:20:15.75#ibcon#enter sib2, iclass 38, count 0 2006.229.15:20:15.75#ibcon#flushed, iclass 38, count 0 2006.229.15:20:15.75#ibcon#about to write, iclass 38, count 0 2006.229.15:20:15.75#ibcon#wrote, iclass 38, count 0 2006.229.15:20:15.75#ibcon#about to read 3, iclass 38, count 0 2006.229.15:20:15.77#ibcon#read 3, iclass 38, count 0 2006.229.15:20:15.77#ibcon#about to read 4, iclass 38, count 0 2006.229.15:20:15.77#ibcon#read 4, iclass 38, count 0 2006.229.15:20:15.77#ibcon#about to read 5, iclass 38, count 0 2006.229.15:20:15.77#ibcon#read 5, iclass 38, count 0 2006.229.15:20:15.77#ibcon#about to read 6, iclass 38, count 0 2006.229.15:20:15.77#ibcon#read 6, iclass 38, count 0 2006.229.15:20:15.77#ibcon#end of sib2, iclass 38, count 0 2006.229.15:20:15.77#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:20:15.77#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:20:15.77#ibcon#[27=USB\r\n] 2006.229.15:20:15.77#ibcon#*before write, iclass 38, count 0 2006.229.15:20:15.78#ibcon#enter sib2, iclass 38, count 0 2006.229.15:20:15.78#ibcon#flushed, iclass 38, count 0 2006.229.15:20:15.78#ibcon#about to write, iclass 38, count 0 2006.229.15:20:15.78#ibcon#wrote, iclass 38, count 0 2006.229.15:20:15.78#ibcon#about to read 3, iclass 38, count 0 2006.229.15:20:15.80#ibcon#read 3, iclass 38, count 0 2006.229.15:20:15.80#ibcon#about to read 4, iclass 38, count 0 2006.229.15:20:15.80#ibcon#read 4, iclass 38, count 0 2006.229.15:20:15.80#ibcon#about to read 5, iclass 38, count 0 2006.229.15:20:15.80#ibcon#read 5, iclass 38, count 0 2006.229.15:20:15.80#ibcon#about to read 6, iclass 38, count 0 2006.229.15:20:15.80#ibcon#read 6, iclass 38, count 0 2006.229.15:20:15.80#ibcon#end of sib2, iclass 38, count 0 2006.229.15:20:15.80#ibcon#*after write, iclass 38, count 0 2006.229.15:20:15.81#ibcon#*before return 0, iclass 38, count 0 2006.229.15:20:15.81#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:15.81#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:20:15.81#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:20:15.81#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:20:15.81$vck44/vblo=4,679.99 2006.229.15:20:15.81#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:20:15.81#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:20:15.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:15.81#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:15.81#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:15.81#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:15.81#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:20:15.81#ibcon#first serial, iclass 40, count 0 2006.229.15:20:15.81#ibcon#enter sib2, iclass 40, count 0 2006.229.15:20:15.81#ibcon#flushed, iclass 40, count 0 2006.229.15:20:15.81#ibcon#about to write, iclass 40, count 0 2006.229.15:20:15.81#ibcon#wrote, iclass 40, count 0 2006.229.15:20:15.81#ibcon#about to read 3, iclass 40, count 0 2006.229.15:20:15.82#ibcon#read 3, iclass 40, count 0 2006.229.15:20:15.82#ibcon#about to read 4, iclass 40, count 0 2006.229.15:20:15.82#ibcon#read 4, iclass 40, count 0 2006.229.15:20:15.82#ibcon#about to read 5, iclass 40, count 0 2006.229.15:20:15.82#ibcon#read 5, iclass 40, count 0 2006.229.15:20:15.82#ibcon#about to read 6, iclass 40, count 0 2006.229.15:20:15.82#ibcon#read 6, iclass 40, count 0 2006.229.15:20:15.82#ibcon#end of sib2, iclass 40, count 0 2006.229.15:20:15.82#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:20:15.83#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:20:15.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:20:15.83#ibcon#*before write, iclass 40, count 0 2006.229.15:20:15.83#ibcon#enter sib2, iclass 40, count 0 2006.229.15:20:15.83#ibcon#flushed, iclass 40, count 0 2006.229.15:20:15.83#ibcon#about to write, iclass 40, count 0 2006.229.15:20:15.83#ibcon#wrote, iclass 40, count 0 2006.229.15:20:15.83#ibcon#about to read 3, iclass 40, count 0 2006.229.15:20:15.86#ibcon#read 3, iclass 40, count 0 2006.229.15:20:15.86#ibcon#about to read 4, iclass 40, count 0 2006.229.15:20:15.86#ibcon#read 4, iclass 40, count 0 2006.229.15:20:15.86#ibcon#about to read 5, iclass 40, count 0 2006.229.15:20:15.86#ibcon#read 5, iclass 40, count 0 2006.229.15:20:15.86#ibcon#about to read 6, iclass 40, count 0 2006.229.15:20:15.86#ibcon#read 6, iclass 40, count 0 2006.229.15:20:15.86#ibcon#end of sib2, iclass 40, count 0 2006.229.15:20:15.86#ibcon#*after write, iclass 40, count 0 2006.229.15:20:15.87#ibcon#*before return 0, iclass 40, count 0 2006.229.15:20:15.87#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:15.87#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:20:15.87#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:20:15.87#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:20:15.87$vck44/vb=4,4 2006.229.15:20:15.87#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:20:15.87#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:20:15.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:15.87#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:15.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:15.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:15.92#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:20:15.92#ibcon#first serial, iclass 4, count 2 2006.229.15:20:15.92#ibcon#enter sib2, iclass 4, count 2 2006.229.15:20:15.92#ibcon#flushed, iclass 4, count 2 2006.229.15:20:15.92#ibcon#about to write, iclass 4, count 2 2006.229.15:20:15.92#ibcon#wrote, iclass 4, count 2 2006.229.15:20:15.92#ibcon#about to read 3, iclass 4, count 2 2006.229.15:20:15.94#ibcon#read 3, iclass 4, count 2 2006.229.15:20:15.94#ibcon#about to read 4, iclass 4, count 2 2006.229.15:20:15.94#ibcon#read 4, iclass 4, count 2 2006.229.15:20:15.94#ibcon#about to read 5, iclass 4, count 2 2006.229.15:20:15.94#ibcon#read 5, iclass 4, count 2 2006.229.15:20:15.94#ibcon#about to read 6, iclass 4, count 2 2006.229.15:20:15.94#ibcon#read 6, iclass 4, count 2 2006.229.15:20:15.94#ibcon#end of sib2, iclass 4, count 2 2006.229.15:20:15.94#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:20:15.94#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:20:15.95#ibcon#[27=AT04-04\r\n] 2006.229.15:20:15.95#ibcon#*before write, iclass 4, count 2 2006.229.15:20:15.95#ibcon#enter sib2, iclass 4, count 2 2006.229.15:20:15.95#ibcon#flushed, iclass 4, count 2 2006.229.15:20:15.95#ibcon#about to write, iclass 4, count 2 2006.229.15:20:15.95#ibcon#wrote, iclass 4, count 2 2006.229.15:20:15.95#ibcon#about to read 3, iclass 4, count 2 2006.229.15:20:15.97#ibcon#read 3, iclass 4, count 2 2006.229.15:20:15.97#ibcon#about to read 4, iclass 4, count 2 2006.229.15:20:15.97#ibcon#read 4, iclass 4, count 2 2006.229.15:20:15.97#ibcon#about to read 5, iclass 4, count 2 2006.229.15:20:15.97#ibcon#read 5, iclass 4, count 2 2006.229.15:20:15.97#ibcon#about to read 6, iclass 4, count 2 2006.229.15:20:15.97#ibcon#read 6, iclass 4, count 2 2006.229.15:20:15.97#ibcon#end of sib2, iclass 4, count 2 2006.229.15:20:15.97#ibcon#*after write, iclass 4, count 2 2006.229.15:20:15.97#ibcon#*before return 0, iclass 4, count 2 2006.229.15:20:15.97#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:15.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:20:15.98#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:20:15.98#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:15.98#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:16.09#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:16.09#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:16.09#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:20:16.09#ibcon#first serial, iclass 4, count 0 2006.229.15:20:16.09#ibcon#enter sib2, iclass 4, count 0 2006.229.15:20:16.09#ibcon#flushed, iclass 4, count 0 2006.229.15:20:16.09#ibcon#about to write, iclass 4, count 0 2006.229.15:20:16.09#ibcon#wrote, iclass 4, count 0 2006.229.15:20:16.09#ibcon#about to read 3, iclass 4, count 0 2006.229.15:20:16.11#ibcon#read 3, iclass 4, count 0 2006.229.15:20:16.11#ibcon#about to read 4, iclass 4, count 0 2006.229.15:20:16.11#ibcon#read 4, iclass 4, count 0 2006.229.15:20:16.11#ibcon#about to read 5, iclass 4, count 0 2006.229.15:20:16.11#ibcon#read 5, iclass 4, count 0 2006.229.15:20:16.11#ibcon#about to read 6, iclass 4, count 0 2006.229.15:20:16.11#ibcon#read 6, iclass 4, count 0 2006.229.15:20:16.11#ibcon#end of sib2, iclass 4, count 0 2006.229.15:20:16.11#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:20:16.11#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:20:16.12#ibcon#[27=USB\r\n] 2006.229.15:20:16.12#ibcon#*before write, iclass 4, count 0 2006.229.15:20:16.12#ibcon#enter sib2, iclass 4, count 0 2006.229.15:20:16.12#ibcon#flushed, iclass 4, count 0 2006.229.15:20:16.12#ibcon#about to write, iclass 4, count 0 2006.229.15:20:16.12#ibcon#wrote, iclass 4, count 0 2006.229.15:20:16.12#ibcon#about to read 3, iclass 4, count 0 2006.229.15:20:16.14#ibcon#read 3, iclass 4, count 0 2006.229.15:20:16.14#ibcon#about to read 4, iclass 4, count 0 2006.229.15:20:16.14#ibcon#read 4, iclass 4, count 0 2006.229.15:20:16.14#ibcon#about to read 5, iclass 4, count 0 2006.229.15:20:16.14#ibcon#read 5, iclass 4, count 0 2006.229.15:20:16.14#ibcon#about to read 6, iclass 4, count 0 2006.229.15:20:16.14#ibcon#read 6, iclass 4, count 0 2006.229.15:20:16.14#ibcon#end of sib2, iclass 4, count 0 2006.229.15:20:16.14#ibcon#*after write, iclass 4, count 0 2006.229.15:20:16.15#ibcon#*before return 0, iclass 4, count 0 2006.229.15:20:16.15#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:16.15#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:20:16.15#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:20:16.15#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:20:16.15$vck44/vblo=5,709.99 2006.229.15:20:16.15#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:20:16.15#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:20:16.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:16.15#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:16.15#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:16.15#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:16.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:20:16.15#ibcon#first serial, iclass 6, count 0 2006.229.15:20:16.15#ibcon#enter sib2, iclass 6, count 0 2006.229.15:20:16.15#ibcon#flushed, iclass 6, count 0 2006.229.15:20:16.15#ibcon#about to write, iclass 6, count 0 2006.229.15:20:16.15#ibcon#wrote, iclass 6, count 0 2006.229.15:20:16.15#ibcon#about to read 3, iclass 6, count 0 2006.229.15:20:16.16#ibcon#read 3, iclass 6, count 0 2006.229.15:20:16.16#ibcon#about to read 4, iclass 6, count 0 2006.229.15:20:16.16#ibcon#read 4, iclass 6, count 0 2006.229.15:20:16.16#ibcon#about to read 5, iclass 6, count 0 2006.229.15:20:16.16#ibcon#read 5, iclass 6, count 0 2006.229.15:20:16.16#ibcon#about to read 6, iclass 6, count 0 2006.229.15:20:16.16#ibcon#read 6, iclass 6, count 0 2006.229.15:20:16.16#ibcon#end of sib2, iclass 6, count 0 2006.229.15:20:16.16#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:20:16.16#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:20:16.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:20:16.16#ibcon#*before write, iclass 6, count 0 2006.229.15:20:16.16#ibcon#enter sib2, iclass 6, count 0 2006.229.15:20:16.17#ibcon#flushed, iclass 6, count 0 2006.229.15:20:16.17#ibcon#about to write, iclass 6, count 0 2006.229.15:20:16.17#ibcon#wrote, iclass 6, count 0 2006.229.15:20:16.17#ibcon#about to read 3, iclass 6, count 0 2006.229.15:20:16.20#ibcon#read 3, iclass 6, count 0 2006.229.15:20:16.20#ibcon#about to read 4, iclass 6, count 0 2006.229.15:20:16.20#ibcon#read 4, iclass 6, count 0 2006.229.15:20:16.20#ibcon#about to read 5, iclass 6, count 0 2006.229.15:20:16.20#ibcon#read 5, iclass 6, count 0 2006.229.15:20:16.20#ibcon#about to read 6, iclass 6, count 0 2006.229.15:20:16.20#ibcon#read 6, iclass 6, count 0 2006.229.15:20:16.20#ibcon#end of sib2, iclass 6, count 0 2006.229.15:20:16.20#ibcon#*after write, iclass 6, count 0 2006.229.15:20:16.20#ibcon#*before return 0, iclass 6, count 0 2006.229.15:20:16.21#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:16.21#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:20:16.21#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:20:16.21#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:20:16.21$vck44/vb=5,4 2006.229.15:20:16.21#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:20:16.21#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:20:16.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:16.21#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:16.26#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:16.26#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:16.26#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:20:16.26#ibcon#first serial, iclass 10, count 2 2006.229.15:20:16.26#ibcon#enter sib2, iclass 10, count 2 2006.229.15:20:16.26#ibcon#flushed, iclass 10, count 2 2006.229.15:20:16.26#ibcon#about to write, iclass 10, count 2 2006.229.15:20:16.26#ibcon#wrote, iclass 10, count 2 2006.229.15:20:16.26#ibcon#about to read 3, iclass 10, count 2 2006.229.15:20:16.28#ibcon#read 3, iclass 10, count 2 2006.229.15:20:16.28#ibcon#about to read 4, iclass 10, count 2 2006.229.15:20:16.28#ibcon#read 4, iclass 10, count 2 2006.229.15:20:16.28#ibcon#about to read 5, iclass 10, count 2 2006.229.15:20:16.28#ibcon#read 5, iclass 10, count 2 2006.229.15:20:16.28#ibcon#about to read 6, iclass 10, count 2 2006.229.15:20:16.28#ibcon#read 6, iclass 10, count 2 2006.229.15:20:16.28#ibcon#end of sib2, iclass 10, count 2 2006.229.15:20:16.28#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:20:16.28#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:20:16.28#ibcon#[27=AT05-04\r\n] 2006.229.15:20:16.28#ibcon#*before write, iclass 10, count 2 2006.229.15:20:16.28#ibcon#enter sib2, iclass 10, count 2 2006.229.15:20:16.29#ibcon#flushed, iclass 10, count 2 2006.229.15:20:16.29#ibcon#about to write, iclass 10, count 2 2006.229.15:20:16.29#ibcon#wrote, iclass 10, count 2 2006.229.15:20:16.29#ibcon#about to read 3, iclass 10, count 2 2006.229.15:20:16.31#ibcon#read 3, iclass 10, count 2 2006.229.15:20:16.31#ibcon#about to read 4, iclass 10, count 2 2006.229.15:20:16.31#ibcon#read 4, iclass 10, count 2 2006.229.15:20:16.31#ibcon#about to read 5, iclass 10, count 2 2006.229.15:20:16.31#ibcon#read 5, iclass 10, count 2 2006.229.15:20:16.31#ibcon#about to read 6, iclass 10, count 2 2006.229.15:20:16.31#ibcon#read 6, iclass 10, count 2 2006.229.15:20:16.31#ibcon#end of sib2, iclass 10, count 2 2006.229.15:20:16.31#ibcon#*after write, iclass 10, count 2 2006.229.15:20:16.31#ibcon#*before return 0, iclass 10, count 2 2006.229.15:20:16.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:16.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:20:16.32#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:20:16.32#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:16.32#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:16.43#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:16.43#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:16.43#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:20:16.43#ibcon#first serial, iclass 10, count 0 2006.229.15:20:16.43#ibcon#enter sib2, iclass 10, count 0 2006.229.15:20:16.43#ibcon#flushed, iclass 10, count 0 2006.229.15:20:16.43#ibcon#about to write, iclass 10, count 0 2006.229.15:20:16.44#ibcon#wrote, iclass 10, count 0 2006.229.15:20:16.44#ibcon#about to read 3, iclass 10, count 0 2006.229.15:20:16.45#ibcon#read 3, iclass 10, count 0 2006.229.15:20:16.45#ibcon#about to read 4, iclass 10, count 0 2006.229.15:20:16.45#ibcon#read 4, iclass 10, count 0 2006.229.15:20:16.45#ibcon#about to read 5, iclass 10, count 0 2006.229.15:20:16.45#ibcon#read 5, iclass 10, count 0 2006.229.15:20:16.45#ibcon#about to read 6, iclass 10, count 0 2006.229.15:20:16.46#ibcon#read 6, iclass 10, count 0 2006.229.15:20:16.46#ibcon#end of sib2, iclass 10, count 0 2006.229.15:20:16.46#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:20:16.46#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:20:16.46#ibcon#[27=USB\r\n] 2006.229.15:20:16.46#ibcon#*before write, iclass 10, count 0 2006.229.15:20:16.46#ibcon#enter sib2, iclass 10, count 0 2006.229.15:20:16.46#ibcon#flushed, iclass 10, count 0 2006.229.15:20:16.46#ibcon#about to write, iclass 10, count 0 2006.229.15:20:16.46#ibcon#wrote, iclass 10, count 0 2006.229.15:20:16.46#ibcon#about to read 3, iclass 10, count 0 2006.229.15:20:16.48#ibcon#read 3, iclass 10, count 0 2006.229.15:20:16.48#ibcon#about to read 4, iclass 10, count 0 2006.229.15:20:16.48#ibcon#read 4, iclass 10, count 0 2006.229.15:20:16.48#ibcon#about to read 5, iclass 10, count 0 2006.229.15:20:16.48#ibcon#read 5, iclass 10, count 0 2006.229.15:20:16.48#ibcon#about to read 6, iclass 10, count 0 2006.229.15:20:16.48#ibcon#read 6, iclass 10, count 0 2006.229.15:20:16.48#ibcon#end of sib2, iclass 10, count 0 2006.229.15:20:16.48#ibcon#*after write, iclass 10, count 0 2006.229.15:20:16.49#ibcon#*before return 0, iclass 10, count 0 2006.229.15:20:16.49#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:16.49#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:20:16.49#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:20:16.49#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:20:16.49$vck44/vblo=6,719.99 2006.229.15:20:16.49#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:20:16.49#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:20:16.49#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:16.49#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:16.49#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:16.49#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:16.49#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:20:16.49#ibcon#first serial, iclass 12, count 0 2006.229.15:20:16.49#ibcon#enter sib2, iclass 12, count 0 2006.229.15:20:16.49#ibcon#flushed, iclass 12, count 0 2006.229.15:20:16.49#ibcon#about to write, iclass 12, count 0 2006.229.15:20:16.49#ibcon#wrote, iclass 12, count 0 2006.229.15:20:16.49#ibcon#about to read 3, iclass 12, count 0 2006.229.15:20:16.50#ibcon#read 3, iclass 12, count 0 2006.229.15:20:16.50#ibcon#about to read 4, iclass 12, count 0 2006.229.15:20:16.50#ibcon#read 4, iclass 12, count 0 2006.229.15:20:16.50#ibcon#about to read 5, iclass 12, count 0 2006.229.15:20:16.50#ibcon#read 5, iclass 12, count 0 2006.229.15:20:16.50#ibcon#about to read 6, iclass 12, count 0 2006.229.15:20:16.50#ibcon#read 6, iclass 12, count 0 2006.229.15:20:16.50#ibcon#end of sib2, iclass 12, count 0 2006.229.15:20:16.50#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:20:16.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:20:16.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:20:16.51#ibcon#*before write, iclass 12, count 0 2006.229.15:20:16.51#ibcon#enter sib2, iclass 12, count 0 2006.229.15:20:16.51#ibcon#flushed, iclass 12, count 0 2006.229.15:20:16.51#ibcon#about to write, iclass 12, count 0 2006.229.15:20:16.51#ibcon#wrote, iclass 12, count 0 2006.229.15:20:16.51#ibcon#about to read 3, iclass 12, count 0 2006.229.15:20:16.54#ibcon#read 3, iclass 12, count 0 2006.229.15:20:16.54#ibcon#about to read 4, iclass 12, count 0 2006.229.15:20:16.54#ibcon#read 4, iclass 12, count 0 2006.229.15:20:16.54#ibcon#about to read 5, iclass 12, count 0 2006.229.15:20:16.54#ibcon#read 5, iclass 12, count 0 2006.229.15:20:16.54#ibcon#about to read 6, iclass 12, count 0 2006.229.15:20:16.54#ibcon#read 6, iclass 12, count 0 2006.229.15:20:16.54#ibcon#end of sib2, iclass 12, count 0 2006.229.15:20:16.54#ibcon#*after write, iclass 12, count 0 2006.229.15:20:16.54#ibcon#*before return 0, iclass 12, count 0 2006.229.15:20:16.55#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:16.55#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:20:16.55#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:20:16.55#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:20:16.55$vck44/vb=6,4 2006.229.15:20:16.55#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:20:16.55#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:20:16.55#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:16.55#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:16.60#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:16.60#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:16.60#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:20:16.60#ibcon#first serial, iclass 14, count 2 2006.229.15:20:16.60#ibcon#enter sib2, iclass 14, count 2 2006.229.15:20:16.60#ibcon#flushed, iclass 14, count 2 2006.229.15:20:16.60#ibcon#about to write, iclass 14, count 2 2006.229.15:20:16.60#ibcon#wrote, iclass 14, count 2 2006.229.15:20:16.60#ibcon#about to read 3, iclass 14, count 2 2006.229.15:20:16.62#ibcon#read 3, iclass 14, count 2 2006.229.15:20:16.62#ibcon#about to read 4, iclass 14, count 2 2006.229.15:20:16.62#ibcon#read 4, iclass 14, count 2 2006.229.15:20:16.62#ibcon#about to read 5, iclass 14, count 2 2006.229.15:20:16.62#ibcon#read 5, iclass 14, count 2 2006.229.15:20:16.62#ibcon#about to read 6, iclass 14, count 2 2006.229.15:20:16.62#ibcon#read 6, iclass 14, count 2 2006.229.15:20:16.62#ibcon#end of sib2, iclass 14, count 2 2006.229.15:20:16.62#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:20:16.63#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:20:16.63#ibcon#[27=AT06-04\r\n] 2006.229.15:20:16.63#ibcon#*before write, iclass 14, count 2 2006.229.15:20:16.63#ibcon#enter sib2, iclass 14, count 2 2006.229.15:20:16.63#ibcon#flushed, iclass 14, count 2 2006.229.15:20:16.63#ibcon#about to write, iclass 14, count 2 2006.229.15:20:16.63#ibcon#wrote, iclass 14, count 2 2006.229.15:20:16.63#ibcon#about to read 3, iclass 14, count 2 2006.229.15:20:16.65#ibcon#read 3, iclass 14, count 2 2006.229.15:20:16.65#ibcon#about to read 4, iclass 14, count 2 2006.229.15:20:16.65#ibcon#read 4, iclass 14, count 2 2006.229.15:20:16.65#ibcon#about to read 5, iclass 14, count 2 2006.229.15:20:16.65#ibcon#read 5, iclass 14, count 2 2006.229.15:20:16.65#ibcon#about to read 6, iclass 14, count 2 2006.229.15:20:16.65#ibcon#read 6, iclass 14, count 2 2006.229.15:20:16.65#ibcon#end of sib2, iclass 14, count 2 2006.229.15:20:16.65#ibcon#*after write, iclass 14, count 2 2006.229.15:20:16.65#ibcon#*before return 0, iclass 14, count 2 2006.229.15:20:16.66#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:16.66#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:20:16.66#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:20:16.66#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:16.66#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:16.77#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:16.77#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:16.77#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:20:16.77#ibcon#first serial, iclass 14, count 0 2006.229.15:20:16.77#ibcon#enter sib2, iclass 14, count 0 2006.229.15:20:16.77#ibcon#flushed, iclass 14, count 0 2006.229.15:20:16.77#ibcon#about to write, iclass 14, count 0 2006.229.15:20:16.77#ibcon#wrote, iclass 14, count 0 2006.229.15:20:16.77#ibcon#about to read 3, iclass 14, count 0 2006.229.15:20:16.79#ibcon#read 3, iclass 14, count 0 2006.229.15:20:16.79#ibcon#about to read 4, iclass 14, count 0 2006.229.15:20:16.79#ibcon#read 4, iclass 14, count 0 2006.229.15:20:16.79#ibcon#about to read 5, iclass 14, count 0 2006.229.15:20:16.79#ibcon#read 5, iclass 14, count 0 2006.229.15:20:16.79#ibcon#about to read 6, iclass 14, count 0 2006.229.15:20:16.79#ibcon#read 6, iclass 14, count 0 2006.229.15:20:16.79#ibcon#end of sib2, iclass 14, count 0 2006.229.15:20:16.79#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:20:16.80#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:20:16.80#ibcon#[27=USB\r\n] 2006.229.15:20:16.80#ibcon#*before write, iclass 14, count 0 2006.229.15:20:16.80#ibcon#enter sib2, iclass 14, count 0 2006.229.15:20:16.80#ibcon#flushed, iclass 14, count 0 2006.229.15:20:16.80#ibcon#about to write, iclass 14, count 0 2006.229.15:20:16.80#ibcon#wrote, iclass 14, count 0 2006.229.15:20:16.80#ibcon#about to read 3, iclass 14, count 0 2006.229.15:20:16.82#ibcon#read 3, iclass 14, count 0 2006.229.15:20:16.82#ibcon#about to read 4, iclass 14, count 0 2006.229.15:20:16.82#ibcon#read 4, iclass 14, count 0 2006.229.15:20:16.82#ibcon#about to read 5, iclass 14, count 0 2006.229.15:20:16.82#ibcon#read 5, iclass 14, count 0 2006.229.15:20:16.82#ibcon#about to read 6, iclass 14, count 0 2006.229.15:20:16.82#ibcon#read 6, iclass 14, count 0 2006.229.15:20:16.82#ibcon#end of sib2, iclass 14, count 0 2006.229.15:20:16.82#ibcon#*after write, iclass 14, count 0 2006.229.15:20:16.83#ibcon#*before return 0, iclass 14, count 0 2006.229.15:20:16.83#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:16.83#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:20:16.83#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:20:16.83#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:20:16.83$vck44/vblo=7,734.99 2006.229.15:20:16.83#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:20:16.83#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:20:16.83#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:16.83#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:16.83#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:16.83#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:16.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:20:16.83#ibcon#first serial, iclass 16, count 0 2006.229.15:20:16.83#ibcon#enter sib2, iclass 16, count 0 2006.229.15:20:16.83#ibcon#flushed, iclass 16, count 0 2006.229.15:20:16.83#ibcon#about to write, iclass 16, count 0 2006.229.15:20:16.83#ibcon#wrote, iclass 16, count 0 2006.229.15:20:16.83#ibcon#about to read 3, iclass 16, count 0 2006.229.15:20:16.84#ibcon#read 3, iclass 16, count 0 2006.229.15:20:16.84#ibcon#about to read 4, iclass 16, count 0 2006.229.15:20:16.84#ibcon#read 4, iclass 16, count 0 2006.229.15:20:16.84#ibcon#about to read 5, iclass 16, count 0 2006.229.15:20:16.84#ibcon#read 5, iclass 16, count 0 2006.229.15:20:16.84#ibcon#about to read 6, iclass 16, count 0 2006.229.15:20:16.84#ibcon#read 6, iclass 16, count 0 2006.229.15:20:16.84#ibcon#end of sib2, iclass 16, count 0 2006.229.15:20:16.84#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:20:16.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:20:16.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:20:16.85#ibcon#*before write, iclass 16, count 0 2006.229.15:20:16.85#ibcon#enter sib2, iclass 16, count 0 2006.229.15:20:16.85#ibcon#flushed, iclass 16, count 0 2006.229.15:20:16.85#ibcon#about to write, iclass 16, count 0 2006.229.15:20:16.85#ibcon#wrote, iclass 16, count 0 2006.229.15:20:16.85#ibcon#about to read 3, iclass 16, count 0 2006.229.15:20:16.88#ibcon#read 3, iclass 16, count 0 2006.229.15:20:16.88#ibcon#about to read 4, iclass 16, count 0 2006.229.15:20:16.88#ibcon#read 4, iclass 16, count 0 2006.229.15:20:16.88#ibcon#about to read 5, iclass 16, count 0 2006.229.15:20:16.88#ibcon#read 5, iclass 16, count 0 2006.229.15:20:16.88#ibcon#about to read 6, iclass 16, count 0 2006.229.15:20:16.88#ibcon#read 6, iclass 16, count 0 2006.229.15:20:16.88#ibcon#end of sib2, iclass 16, count 0 2006.229.15:20:16.88#ibcon#*after write, iclass 16, count 0 2006.229.15:20:16.89#ibcon#*before return 0, iclass 16, count 0 2006.229.15:20:16.89#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:16.89#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:20:16.89#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:20:16.89#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:20:16.89$vck44/vb=7,4 2006.229.15:20:16.89#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:20:16.89#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:20:16.89#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:16.89#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:16.95#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:16.95#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:16.95#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:20:16.95#ibcon#first serial, iclass 18, count 2 2006.229.15:20:16.95#ibcon#enter sib2, iclass 18, count 2 2006.229.15:20:16.95#ibcon#flushed, iclass 18, count 2 2006.229.15:20:16.95#ibcon#about to write, iclass 18, count 2 2006.229.15:20:16.95#ibcon#wrote, iclass 18, count 2 2006.229.15:20:16.95#ibcon#about to read 3, iclass 18, count 2 2006.229.15:20:16.96#ibcon#read 3, iclass 18, count 2 2006.229.15:20:16.96#ibcon#about to read 4, iclass 18, count 2 2006.229.15:20:16.96#ibcon#read 4, iclass 18, count 2 2006.229.15:20:16.96#ibcon#about to read 5, iclass 18, count 2 2006.229.15:20:16.96#ibcon#read 5, iclass 18, count 2 2006.229.15:20:16.96#ibcon#about to read 6, iclass 18, count 2 2006.229.15:20:16.96#ibcon#read 6, iclass 18, count 2 2006.229.15:20:16.96#ibcon#end of sib2, iclass 18, count 2 2006.229.15:20:16.96#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:20:16.96#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:20:16.96#ibcon#[27=AT07-04\r\n] 2006.229.15:20:16.96#ibcon#*before write, iclass 18, count 2 2006.229.15:20:16.96#ibcon#enter sib2, iclass 18, count 2 2006.229.15:20:16.97#ibcon#flushed, iclass 18, count 2 2006.229.15:20:16.97#ibcon#about to write, iclass 18, count 2 2006.229.15:20:16.97#ibcon#wrote, iclass 18, count 2 2006.229.15:20:16.97#ibcon#about to read 3, iclass 18, count 2 2006.229.15:20:16.99#ibcon#read 3, iclass 18, count 2 2006.229.15:20:16.99#ibcon#about to read 4, iclass 18, count 2 2006.229.15:20:16.99#ibcon#read 4, iclass 18, count 2 2006.229.15:20:16.99#ibcon#about to read 5, iclass 18, count 2 2006.229.15:20:16.99#ibcon#read 5, iclass 18, count 2 2006.229.15:20:16.99#ibcon#about to read 6, iclass 18, count 2 2006.229.15:20:16.99#ibcon#read 6, iclass 18, count 2 2006.229.15:20:16.99#ibcon#end of sib2, iclass 18, count 2 2006.229.15:20:16.99#ibcon#*after write, iclass 18, count 2 2006.229.15:20:16.99#ibcon#*before return 0, iclass 18, count 2 2006.229.15:20:16.99#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:16.99#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:20:17.00#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:20:17.00#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:17.00#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:17.10#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:17.10#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:17.10#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:20:17.10#ibcon#first serial, iclass 18, count 0 2006.229.15:20:17.10#ibcon#enter sib2, iclass 18, count 0 2006.229.15:20:17.10#ibcon#flushed, iclass 18, count 0 2006.229.15:20:17.10#ibcon#about to write, iclass 18, count 0 2006.229.15:20:17.10#ibcon#wrote, iclass 18, count 0 2006.229.15:20:17.10#ibcon#about to read 3, iclass 18, count 0 2006.229.15:20:17.12#ibcon#read 3, iclass 18, count 0 2006.229.15:20:17.12#ibcon#about to read 4, iclass 18, count 0 2006.229.15:20:17.12#ibcon#read 4, iclass 18, count 0 2006.229.15:20:17.12#ibcon#about to read 5, iclass 18, count 0 2006.229.15:20:17.12#ibcon#read 5, iclass 18, count 0 2006.229.15:20:17.12#ibcon#about to read 6, iclass 18, count 0 2006.229.15:20:17.12#ibcon#read 6, iclass 18, count 0 2006.229.15:20:17.12#ibcon#end of sib2, iclass 18, count 0 2006.229.15:20:17.12#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:20:17.12#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:20:17.12#ibcon#[27=USB\r\n] 2006.229.15:20:17.12#ibcon#*before write, iclass 18, count 0 2006.229.15:20:17.13#ibcon#enter sib2, iclass 18, count 0 2006.229.15:20:17.13#ibcon#flushed, iclass 18, count 0 2006.229.15:20:17.13#ibcon#about to write, iclass 18, count 0 2006.229.15:20:17.13#ibcon#wrote, iclass 18, count 0 2006.229.15:20:17.13#ibcon#about to read 3, iclass 18, count 0 2006.229.15:20:17.15#ibcon#read 3, iclass 18, count 0 2006.229.15:20:17.15#ibcon#about to read 4, iclass 18, count 0 2006.229.15:20:17.15#ibcon#read 4, iclass 18, count 0 2006.229.15:20:17.15#ibcon#about to read 5, iclass 18, count 0 2006.229.15:20:17.15#ibcon#read 5, iclass 18, count 0 2006.229.15:20:17.15#ibcon#about to read 6, iclass 18, count 0 2006.229.15:20:17.15#ibcon#read 6, iclass 18, count 0 2006.229.15:20:17.15#ibcon#end of sib2, iclass 18, count 0 2006.229.15:20:17.15#ibcon#*after write, iclass 18, count 0 2006.229.15:20:17.16#ibcon#*before return 0, iclass 18, count 0 2006.229.15:20:17.16#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:17.16#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:20:17.16#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:20:17.16#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:20:17.16$vck44/vblo=8,744.99 2006.229.15:20:17.16#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:20:17.16#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:20:17.16#ibcon#ireg 17 cls_cnt 0 2006.229.15:20:17.16#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:17.16#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:17.16#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:17.16#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:20:17.16#ibcon#first serial, iclass 20, count 0 2006.229.15:20:17.16#ibcon#enter sib2, iclass 20, count 0 2006.229.15:20:17.16#ibcon#flushed, iclass 20, count 0 2006.229.15:20:17.16#ibcon#about to write, iclass 20, count 0 2006.229.15:20:17.16#ibcon#wrote, iclass 20, count 0 2006.229.15:20:17.16#ibcon#about to read 3, iclass 20, count 0 2006.229.15:20:17.17#ibcon#read 3, iclass 20, count 0 2006.229.15:20:17.17#ibcon#about to read 4, iclass 20, count 0 2006.229.15:20:17.17#ibcon#read 4, iclass 20, count 0 2006.229.15:20:17.17#ibcon#about to read 5, iclass 20, count 0 2006.229.15:20:17.17#ibcon#read 5, iclass 20, count 0 2006.229.15:20:17.17#ibcon#about to read 6, iclass 20, count 0 2006.229.15:20:17.17#ibcon#read 6, iclass 20, count 0 2006.229.15:20:17.17#ibcon#end of sib2, iclass 20, count 0 2006.229.15:20:17.17#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:20:17.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:20:17.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:20:17.17#ibcon#*before write, iclass 20, count 0 2006.229.15:20:17.17#ibcon#enter sib2, iclass 20, count 0 2006.229.15:20:17.18#ibcon#flushed, iclass 20, count 0 2006.229.15:20:17.18#ibcon#about to write, iclass 20, count 0 2006.229.15:20:17.18#ibcon#wrote, iclass 20, count 0 2006.229.15:20:17.18#ibcon#about to read 3, iclass 20, count 0 2006.229.15:20:17.21#ibcon#read 3, iclass 20, count 0 2006.229.15:20:17.21#ibcon#about to read 4, iclass 20, count 0 2006.229.15:20:17.21#ibcon#read 4, iclass 20, count 0 2006.229.15:20:17.21#ibcon#about to read 5, iclass 20, count 0 2006.229.15:20:17.21#ibcon#read 5, iclass 20, count 0 2006.229.15:20:17.21#ibcon#about to read 6, iclass 20, count 0 2006.229.15:20:17.21#ibcon#read 6, iclass 20, count 0 2006.229.15:20:17.21#ibcon#end of sib2, iclass 20, count 0 2006.229.15:20:17.21#ibcon#*after write, iclass 20, count 0 2006.229.15:20:17.21#ibcon#*before return 0, iclass 20, count 0 2006.229.15:20:17.22#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:17.22#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:20:17.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:20:17.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:20:17.22$vck44/vb=8,4 2006.229.15:20:17.22#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:20:17.22#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:20:17.22#ibcon#ireg 11 cls_cnt 2 2006.229.15:20:17.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:17.27#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:17.27#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:17.27#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:20:17.27#ibcon#first serial, iclass 22, count 2 2006.229.15:20:17.27#ibcon#enter sib2, iclass 22, count 2 2006.229.15:20:17.27#ibcon#flushed, iclass 22, count 2 2006.229.15:20:17.27#ibcon#about to write, iclass 22, count 2 2006.229.15:20:17.27#ibcon#wrote, iclass 22, count 2 2006.229.15:20:17.27#ibcon#about to read 3, iclass 22, count 2 2006.229.15:20:17.29#ibcon#read 3, iclass 22, count 2 2006.229.15:20:17.29#ibcon#about to read 4, iclass 22, count 2 2006.229.15:20:17.29#ibcon#read 4, iclass 22, count 2 2006.229.15:20:17.29#ibcon#about to read 5, iclass 22, count 2 2006.229.15:20:17.29#ibcon#read 5, iclass 22, count 2 2006.229.15:20:17.29#ibcon#about to read 6, iclass 22, count 2 2006.229.15:20:17.29#ibcon#read 6, iclass 22, count 2 2006.229.15:20:17.29#ibcon#end of sib2, iclass 22, count 2 2006.229.15:20:17.29#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:20:17.29#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:20:17.29#ibcon#[27=AT08-04\r\n] 2006.229.15:20:17.29#ibcon#*before write, iclass 22, count 2 2006.229.15:20:17.29#ibcon#enter sib2, iclass 22, count 2 2006.229.15:20:17.29#ibcon#flushed, iclass 22, count 2 2006.229.15:20:17.30#ibcon#about to write, iclass 22, count 2 2006.229.15:20:17.30#ibcon#wrote, iclass 22, count 2 2006.229.15:20:17.30#ibcon#about to read 3, iclass 22, count 2 2006.229.15:20:17.32#ibcon#read 3, iclass 22, count 2 2006.229.15:20:17.32#ibcon#about to read 4, iclass 22, count 2 2006.229.15:20:17.32#ibcon#read 4, iclass 22, count 2 2006.229.15:20:17.32#ibcon#about to read 5, iclass 22, count 2 2006.229.15:20:17.32#ibcon#read 5, iclass 22, count 2 2006.229.15:20:17.32#ibcon#about to read 6, iclass 22, count 2 2006.229.15:20:17.32#ibcon#read 6, iclass 22, count 2 2006.229.15:20:17.32#ibcon#end of sib2, iclass 22, count 2 2006.229.15:20:17.32#ibcon#*after write, iclass 22, count 2 2006.229.15:20:17.32#ibcon#*before return 0, iclass 22, count 2 2006.229.15:20:17.32#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:17.33#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:20:17.33#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:20:17.33#ibcon#ireg 7 cls_cnt 0 2006.229.15:20:17.33#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:17.36#abcon#<5=/06 1.6 2.5 27.381001001.8\r\n> 2006.229.15:20:17.38#abcon#{5=INTERFACE CLEAR} 2006.229.15:20:17.44#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:20:17.44#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:17.44#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:17.44#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:20:17.45#ibcon#first serial, iclass 22, count 0 2006.229.15:20:17.45#ibcon#enter sib2, iclass 22, count 0 2006.229.15:20:17.45#ibcon#flushed, iclass 22, count 0 2006.229.15:20:17.45#ibcon#about to write, iclass 22, count 0 2006.229.15:20:17.45#ibcon#wrote, iclass 22, count 0 2006.229.15:20:17.45#ibcon#about to read 3, iclass 22, count 0 2006.229.15:20:17.46#ibcon#read 3, iclass 22, count 0 2006.229.15:20:17.46#ibcon#about to read 4, iclass 22, count 0 2006.229.15:20:17.46#ibcon#read 4, iclass 22, count 0 2006.229.15:20:17.46#ibcon#about to read 5, iclass 22, count 0 2006.229.15:20:17.46#ibcon#read 5, iclass 22, count 0 2006.229.15:20:17.46#ibcon#about to read 6, iclass 22, count 0 2006.229.15:20:17.46#ibcon#read 6, iclass 22, count 0 2006.229.15:20:17.46#ibcon#end of sib2, iclass 22, count 0 2006.229.15:20:17.46#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:20:17.46#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:20:17.46#ibcon#[27=USB\r\n] 2006.229.15:20:17.46#ibcon#*before write, iclass 22, count 0 2006.229.15:20:17.46#ibcon#enter sib2, iclass 22, count 0 2006.229.15:20:17.46#ibcon#flushed, iclass 22, count 0 2006.229.15:20:17.47#ibcon#about to write, iclass 22, count 0 2006.229.15:20:17.47#ibcon#wrote, iclass 22, count 0 2006.229.15:20:17.47#ibcon#about to read 3, iclass 22, count 0 2006.229.15:20:17.49#ibcon#read 3, iclass 22, count 0 2006.229.15:20:17.49#ibcon#about to read 4, iclass 22, count 0 2006.229.15:20:17.49#ibcon#read 4, iclass 22, count 0 2006.229.15:20:17.49#ibcon#about to read 5, iclass 22, count 0 2006.229.15:20:17.49#ibcon#read 5, iclass 22, count 0 2006.229.15:20:17.49#ibcon#about to read 6, iclass 22, count 0 2006.229.15:20:17.49#ibcon#read 6, iclass 22, count 0 2006.229.15:20:17.49#ibcon#end of sib2, iclass 22, count 0 2006.229.15:20:17.49#ibcon#*after write, iclass 22, count 0 2006.229.15:20:17.49#ibcon#*before return 0, iclass 22, count 0 2006.229.15:20:17.50#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:17.50#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:20:17.50#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:20:17.50#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:20:17.50$vck44/vabw=wide 2006.229.15:20:17.50#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:20:17.50#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:20:17.50#ibcon#ireg 8 cls_cnt 0 2006.229.15:20:17.50#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:17.50#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:17.50#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:17.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:20:17.50#ibcon#first serial, iclass 28, count 0 2006.229.15:20:17.50#ibcon#enter sib2, iclass 28, count 0 2006.229.15:20:17.50#ibcon#flushed, iclass 28, count 0 2006.229.15:20:17.50#ibcon#about to write, iclass 28, count 0 2006.229.15:20:17.50#ibcon#wrote, iclass 28, count 0 2006.229.15:20:17.50#ibcon#about to read 3, iclass 28, count 0 2006.229.15:20:17.51#ibcon#read 3, iclass 28, count 0 2006.229.15:20:17.51#ibcon#about to read 4, iclass 28, count 0 2006.229.15:20:17.51#ibcon#read 4, iclass 28, count 0 2006.229.15:20:17.51#ibcon#about to read 5, iclass 28, count 0 2006.229.15:20:17.51#ibcon#read 5, iclass 28, count 0 2006.229.15:20:17.51#ibcon#about to read 6, iclass 28, count 0 2006.229.15:20:17.51#ibcon#read 6, iclass 28, count 0 2006.229.15:20:17.51#ibcon#end of sib2, iclass 28, count 0 2006.229.15:20:17.51#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:20:17.51#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:20:17.51#ibcon#[25=BW32\r\n] 2006.229.15:20:17.51#ibcon#*before write, iclass 28, count 0 2006.229.15:20:17.51#ibcon#enter sib2, iclass 28, count 0 2006.229.15:20:17.52#ibcon#flushed, iclass 28, count 0 2006.229.15:20:17.52#ibcon#about to write, iclass 28, count 0 2006.229.15:20:17.52#ibcon#wrote, iclass 28, count 0 2006.229.15:20:17.52#ibcon#about to read 3, iclass 28, count 0 2006.229.15:20:17.54#ibcon#read 3, iclass 28, count 0 2006.229.15:20:17.54#ibcon#about to read 4, iclass 28, count 0 2006.229.15:20:17.54#ibcon#read 4, iclass 28, count 0 2006.229.15:20:17.54#ibcon#about to read 5, iclass 28, count 0 2006.229.15:20:17.54#ibcon#read 5, iclass 28, count 0 2006.229.15:20:17.54#ibcon#about to read 6, iclass 28, count 0 2006.229.15:20:17.54#ibcon#read 6, iclass 28, count 0 2006.229.15:20:17.54#ibcon#end of sib2, iclass 28, count 0 2006.229.15:20:17.54#ibcon#*after write, iclass 28, count 0 2006.229.15:20:17.54#ibcon#*before return 0, iclass 28, count 0 2006.229.15:20:17.54#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:17.54#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:20:17.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:20:17.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:20:17.55$vck44/vbbw=wide 2006.229.15:20:17.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:20:17.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:20:17.55#ibcon#ireg 8 cls_cnt 0 2006.229.15:20:17.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:20:17.61#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:20:17.61#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:20:17.61#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:20:17.61#ibcon#first serial, iclass 30, count 0 2006.229.15:20:17.61#ibcon#enter sib2, iclass 30, count 0 2006.229.15:20:17.61#ibcon#flushed, iclass 30, count 0 2006.229.15:20:17.62#ibcon#about to write, iclass 30, count 0 2006.229.15:20:17.62#ibcon#wrote, iclass 30, count 0 2006.229.15:20:17.62#ibcon#about to read 3, iclass 30, count 0 2006.229.15:20:17.63#ibcon#read 3, iclass 30, count 0 2006.229.15:20:17.63#ibcon#about to read 4, iclass 30, count 0 2006.229.15:20:17.63#ibcon#read 4, iclass 30, count 0 2006.229.15:20:17.63#ibcon#about to read 5, iclass 30, count 0 2006.229.15:20:17.63#ibcon#read 5, iclass 30, count 0 2006.229.15:20:17.63#ibcon#about to read 6, iclass 30, count 0 2006.229.15:20:17.63#ibcon#read 6, iclass 30, count 0 2006.229.15:20:17.63#ibcon#end of sib2, iclass 30, count 0 2006.229.15:20:17.63#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:20:17.64#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:20:17.64#ibcon#[27=BW32\r\n] 2006.229.15:20:17.64#ibcon#*before write, iclass 30, count 0 2006.229.15:20:17.64#ibcon#enter sib2, iclass 30, count 0 2006.229.15:20:17.64#ibcon#flushed, iclass 30, count 0 2006.229.15:20:17.64#ibcon#about to write, iclass 30, count 0 2006.229.15:20:17.64#ibcon#wrote, iclass 30, count 0 2006.229.15:20:17.64#ibcon#about to read 3, iclass 30, count 0 2006.229.15:20:17.66#ibcon#read 3, iclass 30, count 0 2006.229.15:20:17.67#ibcon#about to read 4, iclass 30, count 0 2006.229.15:20:17.67#ibcon#read 4, iclass 30, count 0 2006.229.15:20:17.67#ibcon#about to read 5, iclass 30, count 0 2006.229.15:20:17.67#ibcon#read 5, iclass 30, count 0 2006.229.15:20:17.67#ibcon#about to read 6, iclass 30, count 0 2006.229.15:20:17.67#ibcon#read 6, iclass 30, count 0 2006.229.15:20:17.67#ibcon#end of sib2, iclass 30, count 0 2006.229.15:20:17.67#ibcon#*after write, iclass 30, count 0 2006.229.15:20:17.67#ibcon#*before return 0, iclass 30, count 0 2006.229.15:20:17.67#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:20:17.67#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:20:17.67#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:20:17.67#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:20:17.67$setupk4/ifdk4 2006.229.15:20:17.67$ifdk4/lo= 2006.229.15:20:17.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:20:17.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:20:17.67$ifdk4/patch= 2006.229.15:20:17.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:20:17.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:20:17.67$setupk4/!*+20s 2006.229.15:20:27.53#abcon#<5=/06 1.5 2.4 27.381001001.8\r\n> 2006.229.15:20:27.55#abcon#{5=INTERFACE CLEAR} 2006.229.15:20:27.61#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:20:31.14#trakl#Source acquired 2006.229.15:20:31.15#flagr#flagr/antenna,acquired 2006.229.15:20:32.19$setupk4/"tpicd 2006.229.15:20:32.19$setupk4/echo=off 2006.229.15:20:32.20$setupk4/xlog=off 2006.229.15:20:32.20:!2006.229.15:22:29 2006.229.15:22:29.01:preob 2006.229.15:22:30.14/onsource/TRACKING 2006.229.15:22:30.15:!2006.229.15:22:39 2006.229.15:22:39.01:"tape 2006.229.15:22:39.01:"st=record 2006.229.15:22:39.02:data_valid=on 2006.229.15:22:39.02:midob 2006.229.15:22:40.14/onsource/TRACKING 2006.229.15:22:40.15/wx/27.38,1001.7,100 2006.229.15:22:40.25/cable/+6.4149E-03 2006.229.15:22:41.34/va/01,08,usb,yes,33,35 2006.229.15:22:41.34/va/02,07,usb,yes,35,36 2006.229.15:22:41.34/va/03,06,usb,yes,44,47 2006.229.15:22:41.34/va/04,07,usb,yes,37,38 2006.229.15:22:41.34/va/05,04,usb,yes,33,33 2006.229.15:22:41.34/va/06,04,usb,yes,37,36 2006.229.15:22:41.34/va/07,05,usb,yes,33,33 2006.229.15:22:41.34/va/08,06,usb,yes,24,29 2006.229.15:22:41.57/valo/01,524.99,yes,locked 2006.229.15:22:41.57/valo/02,534.99,yes,locked 2006.229.15:22:41.57/valo/03,564.99,yes,locked 2006.229.15:22:41.57/valo/04,624.99,yes,locked 2006.229.15:22:41.57/valo/05,734.99,yes,locked 2006.229.15:22:41.57/valo/06,814.99,yes,locked 2006.229.15:22:41.57/valo/07,864.99,yes,locked 2006.229.15:22:41.57/valo/08,884.99,yes,locked 2006.229.15:22:42.66/vb/01,04,usb,yes,32,30 2006.229.15:22:42.66/vb/02,04,usb,yes,34,34 2006.229.15:22:42.66/vb/03,04,usb,yes,31,35 2006.229.15:22:42.66/vb/04,04,usb,yes,36,35 2006.229.15:22:42.66/vb/05,04,usb,yes,28,31 2006.229.15:22:42.66/vb/06,04,usb,yes,33,29 2006.229.15:22:42.66/vb/07,04,usb,yes,33,33 2006.229.15:22:42.66/vb/08,04,usb,yes,30,34 2006.229.15:22:42.89/vblo/01,629.99,yes,locked 2006.229.15:22:42.89/vblo/02,634.99,yes,locked 2006.229.15:22:42.89/vblo/03,649.99,yes,locked 2006.229.15:22:42.89/vblo/04,679.99,yes,locked 2006.229.15:22:42.89/vblo/05,709.99,yes,locked 2006.229.15:22:42.89/vblo/06,719.99,yes,locked 2006.229.15:22:42.89/vblo/07,734.99,yes,locked 2006.229.15:22:42.89/vblo/08,744.99,yes,locked 2006.229.15:22:43.04/vabw/8 2006.229.15:22:43.19/vbbw/8 2006.229.15:22:43.35/xfe/off,on,12.0 2006.229.15:22:43.73/ifatt/23,28,28,28 2006.229.15:22:44.07/fmout-gps/S +4.52E-07 2006.229.15:22:44.12:!2006.229.15:26:59 2006.229.15:26:59.01:data_valid=off 2006.229.15:26:59.01:"et 2006.229.15:26:59.01:!+3s 2006.229.15:27:02.02:"tape 2006.229.15:27:02.02:postob 2006.229.15:27:02.25/cable/+6.4136E-03 2006.229.15:27:02.25/wx/27.36,1001.8,100 2006.229.15:27:02.31/fmout-gps/S +4.50E-07 2006.229.15:27:02.31:scan_name=229-1528,jd0608,80 2006.229.15:27:02.31:source=1611+343,161341.06,341247.9,2000.0,ccw 2006.229.15:27:04.13#flagr#flagr/antenna,new-source 2006.229.15:27:04.13:checkk5 2006.229.15:27:04.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:27:04.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:27:05.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:27:05.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:27:06.16/chk_obsdata//k5ts1/T2291522??a.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.15:27:06.56/chk_obsdata//k5ts2/T2291522??b.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.15:27:06.97/chk_obsdata//k5ts3/T2291522??c.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.15:27:07.37/chk_obsdata//k5ts4/T2291522??d.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.15:27:08.09/k5log//k5ts1_log_newline 2006.229.15:27:08.81/k5log//k5ts2_log_newline 2006.229.15:27:09.51/k5log//k5ts3_log_newline 2006.229.15:27:10.21/k5log//k5ts4_log_newline 2006.229.15:27:10.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:27:10.24:setupk4=1 2006.229.15:27:10.24$setupk4/echo=on 2006.229.15:27:10.24$setupk4/pcalon 2006.229.15:27:10.24$pcalon/"no phase cal control is implemented here 2006.229.15:27:10.24$setupk4/"tpicd=stop 2006.229.15:27:10.24$setupk4/"rec=synch_on 2006.229.15:27:10.24$setupk4/"rec_mode=128 2006.229.15:27:10.24$setupk4/!* 2006.229.15:27:10.24$setupk4/recpk4 2006.229.15:27:10.24$recpk4/recpatch= 2006.229.15:27:10.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:27:10.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:27:10.25$setupk4/vck44 2006.229.15:27:10.25$vck44/valo=1,524.99 2006.229.15:27:10.25#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:27:10.25#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:27:10.25#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:10.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:10.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:10.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:10.25#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:27:10.25#ibcon#first serial, iclass 10, count 0 2006.229.15:27:10.25#ibcon#enter sib2, iclass 10, count 0 2006.229.15:27:10.25#ibcon#flushed, iclass 10, count 0 2006.229.15:27:10.25#ibcon#about to write, iclass 10, count 0 2006.229.15:27:10.25#ibcon#wrote, iclass 10, count 0 2006.229.15:27:10.25#ibcon#about to read 3, iclass 10, count 0 2006.229.15:27:10.26#ibcon#read 3, iclass 10, count 0 2006.229.15:27:10.26#ibcon#about to read 4, iclass 10, count 0 2006.229.15:27:10.26#ibcon#read 4, iclass 10, count 0 2006.229.15:27:10.26#ibcon#about to read 5, iclass 10, count 0 2006.229.15:27:10.26#ibcon#read 5, iclass 10, count 0 2006.229.15:27:10.26#ibcon#about to read 6, iclass 10, count 0 2006.229.15:27:10.26#ibcon#read 6, iclass 10, count 0 2006.229.15:27:10.26#ibcon#end of sib2, iclass 10, count 0 2006.229.15:27:10.26#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:27:10.26#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:27:10.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:27:10.26#ibcon#*before write, iclass 10, count 0 2006.229.15:27:10.26#ibcon#enter sib2, iclass 10, count 0 2006.229.15:27:10.26#ibcon#flushed, iclass 10, count 0 2006.229.15:27:10.26#ibcon#about to write, iclass 10, count 0 2006.229.15:27:10.26#ibcon#wrote, iclass 10, count 0 2006.229.15:27:10.26#ibcon#about to read 3, iclass 10, count 0 2006.229.15:27:10.31#ibcon#read 3, iclass 10, count 0 2006.229.15:27:10.31#ibcon#about to read 4, iclass 10, count 0 2006.229.15:27:10.31#ibcon#read 4, iclass 10, count 0 2006.229.15:27:10.31#ibcon#about to read 5, iclass 10, count 0 2006.229.15:27:10.31#ibcon#read 5, iclass 10, count 0 2006.229.15:27:10.31#ibcon#about to read 6, iclass 10, count 0 2006.229.15:27:10.31#ibcon#read 6, iclass 10, count 0 2006.229.15:27:10.31#ibcon#end of sib2, iclass 10, count 0 2006.229.15:27:10.31#ibcon#*after write, iclass 10, count 0 2006.229.15:27:10.31#ibcon#*before return 0, iclass 10, count 0 2006.229.15:27:10.31#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:10.31#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:10.31#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:27:10.31#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:27:10.31$vck44/va=1,8 2006.229.15:27:10.31#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:27:10.31#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:27:10.31#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:10.31#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:10.31#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:10.31#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:10.31#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:27:10.31#ibcon#first serial, iclass 12, count 2 2006.229.15:27:10.31#ibcon#enter sib2, iclass 12, count 2 2006.229.15:27:10.31#ibcon#flushed, iclass 12, count 2 2006.229.15:27:10.31#ibcon#about to write, iclass 12, count 2 2006.229.15:27:10.31#ibcon#wrote, iclass 12, count 2 2006.229.15:27:10.31#ibcon#about to read 3, iclass 12, count 2 2006.229.15:27:10.33#ibcon#read 3, iclass 12, count 2 2006.229.15:27:10.33#ibcon#about to read 4, iclass 12, count 2 2006.229.15:27:10.33#ibcon#read 4, iclass 12, count 2 2006.229.15:27:10.33#ibcon#about to read 5, iclass 12, count 2 2006.229.15:27:10.33#ibcon#read 5, iclass 12, count 2 2006.229.15:27:10.33#ibcon#about to read 6, iclass 12, count 2 2006.229.15:27:10.33#ibcon#read 6, iclass 12, count 2 2006.229.15:27:10.33#ibcon#end of sib2, iclass 12, count 2 2006.229.15:27:10.33#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:27:10.33#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:27:10.33#ibcon#[25=AT01-08\r\n] 2006.229.15:27:10.33#ibcon#*before write, iclass 12, count 2 2006.229.15:27:10.33#ibcon#enter sib2, iclass 12, count 2 2006.229.15:27:10.33#ibcon#flushed, iclass 12, count 2 2006.229.15:27:10.33#ibcon#about to write, iclass 12, count 2 2006.229.15:27:10.33#ibcon#wrote, iclass 12, count 2 2006.229.15:27:10.33#ibcon#about to read 3, iclass 12, count 2 2006.229.15:27:10.36#ibcon#read 3, iclass 12, count 2 2006.229.15:27:10.36#ibcon#about to read 4, iclass 12, count 2 2006.229.15:27:10.36#ibcon#read 4, iclass 12, count 2 2006.229.15:27:10.36#ibcon#about to read 5, iclass 12, count 2 2006.229.15:27:10.36#ibcon#read 5, iclass 12, count 2 2006.229.15:27:10.36#ibcon#about to read 6, iclass 12, count 2 2006.229.15:27:10.36#ibcon#read 6, iclass 12, count 2 2006.229.15:27:10.36#ibcon#end of sib2, iclass 12, count 2 2006.229.15:27:10.36#ibcon#*after write, iclass 12, count 2 2006.229.15:27:10.36#ibcon#*before return 0, iclass 12, count 2 2006.229.15:27:10.36#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:10.36#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:10.36#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:27:10.36#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:10.36#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:10.48#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:10.48#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:10.48#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:27:10.48#ibcon#first serial, iclass 12, count 0 2006.229.15:27:10.48#ibcon#enter sib2, iclass 12, count 0 2006.229.15:27:10.48#ibcon#flushed, iclass 12, count 0 2006.229.15:27:10.48#ibcon#about to write, iclass 12, count 0 2006.229.15:27:10.48#ibcon#wrote, iclass 12, count 0 2006.229.15:27:10.48#ibcon#about to read 3, iclass 12, count 0 2006.229.15:27:10.50#ibcon#read 3, iclass 12, count 0 2006.229.15:27:10.50#ibcon#about to read 4, iclass 12, count 0 2006.229.15:27:10.50#ibcon#read 4, iclass 12, count 0 2006.229.15:27:10.50#ibcon#about to read 5, iclass 12, count 0 2006.229.15:27:10.50#ibcon#read 5, iclass 12, count 0 2006.229.15:27:10.50#ibcon#about to read 6, iclass 12, count 0 2006.229.15:27:10.50#ibcon#read 6, iclass 12, count 0 2006.229.15:27:10.50#ibcon#end of sib2, iclass 12, count 0 2006.229.15:27:10.50#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:27:10.50#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:27:10.50#ibcon#[25=USB\r\n] 2006.229.15:27:10.50#ibcon#*before write, iclass 12, count 0 2006.229.15:27:10.50#ibcon#enter sib2, iclass 12, count 0 2006.229.15:27:10.50#ibcon#flushed, iclass 12, count 0 2006.229.15:27:10.50#ibcon#about to write, iclass 12, count 0 2006.229.15:27:10.50#ibcon#wrote, iclass 12, count 0 2006.229.15:27:10.50#ibcon#about to read 3, iclass 12, count 0 2006.229.15:27:10.53#ibcon#read 3, iclass 12, count 0 2006.229.15:27:10.53#ibcon#about to read 4, iclass 12, count 0 2006.229.15:27:10.53#ibcon#read 4, iclass 12, count 0 2006.229.15:27:10.53#ibcon#about to read 5, iclass 12, count 0 2006.229.15:27:10.53#ibcon#read 5, iclass 12, count 0 2006.229.15:27:10.53#ibcon#about to read 6, iclass 12, count 0 2006.229.15:27:10.53#ibcon#read 6, iclass 12, count 0 2006.229.15:27:10.53#ibcon#end of sib2, iclass 12, count 0 2006.229.15:27:10.53#ibcon#*after write, iclass 12, count 0 2006.229.15:27:10.53#ibcon#*before return 0, iclass 12, count 0 2006.229.15:27:10.53#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:10.53#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:10.53#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:27:10.53#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:27:10.53$vck44/valo=2,534.99 2006.229.15:27:10.53#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:27:10.53#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:27:10.53#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:10.53#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:10.53#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:10.53#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:10.53#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:27:10.53#ibcon#first serial, iclass 14, count 0 2006.229.15:27:10.53#ibcon#enter sib2, iclass 14, count 0 2006.229.15:27:10.53#ibcon#flushed, iclass 14, count 0 2006.229.15:27:10.53#ibcon#about to write, iclass 14, count 0 2006.229.15:27:10.53#ibcon#wrote, iclass 14, count 0 2006.229.15:27:10.53#ibcon#about to read 3, iclass 14, count 0 2006.229.15:27:10.55#ibcon#read 3, iclass 14, count 0 2006.229.15:27:10.55#ibcon#about to read 4, iclass 14, count 0 2006.229.15:27:10.55#ibcon#read 4, iclass 14, count 0 2006.229.15:27:10.55#ibcon#about to read 5, iclass 14, count 0 2006.229.15:27:10.55#ibcon#read 5, iclass 14, count 0 2006.229.15:27:10.55#ibcon#about to read 6, iclass 14, count 0 2006.229.15:27:10.55#ibcon#read 6, iclass 14, count 0 2006.229.15:27:10.55#ibcon#end of sib2, iclass 14, count 0 2006.229.15:27:10.55#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:27:10.55#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:27:10.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:27:10.55#ibcon#*before write, iclass 14, count 0 2006.229.15:27:10.55#ibcon#enter sib2, iclass 14, count 0 2006.229.15:27:10.55#ibcon#flushed, iclass 14, count 0 2006.229.15:27:10.55#ibcon#about to write, iclass 14, count 0 2006.229.15:27:10.55#ibcon#wrote, iclass 14, count 0 2006.229.15:27:10.55#ibcon#about to read 3, iclass 14, count 0 2006.229.15:27:10.59#ibcon#read 3, iclass 14, count 0 2006.229.15:27:10.59#ibcon#about to read 4, iclass 14, count 0 2006.229.15:27:10.59#ibcon#read 4, iclass 14, count 0 2006.229.15:27:10.59#ibcon#about to read 5, iclass 14, count 0 2006.229.15:27:10.59#ibcon#read 5, iclass 14, count 0 2006.229.15:27:10.59#ibcon#about to read 6, iclass 14, count 0 2006.229.15:27:10.59#ibcon#read 6, iclass 14, count 0 2006.229.15:27:10.59#ibcon#end of sib2, iclass 14, count 0 2006.229.15:27:10.59#ibcon#*after write, iclass 14, count 0 2006.229.15:27:10.59#ibcon#*before return 0, iclass 14, count 0 2006.229.15:27:10.59#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:10.59#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:10.59#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:27:10.59#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:27:10.59$vck44/va=2,7 2006.229.15:27:10.59#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:27:10.59#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:27:10.59#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:10.59#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:10.65#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:10.65#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:10.65#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:27:10.65#ibcon#first serial, iclass 16, count 2 2006.229.15:27:10.65#ibcon#enter sib2, iclass 16, count 2 2006.229.15:27:10.65#ibcon#flushed, iclass 16, count 2 2006.229.15:27:10.65#ibcon#about to write, iclass 16, count 2 2006.229.15:27:10.65#ibcon#wrote, iclass 16, count 2 2006.229.15:27:10.65#ibcon#about to read 3, iclass 16, count 2 2006.229.15:27:10.67#ibcon#read 3, iclass 16, count 2 2006.229.15:27:10.67#ibcon#about to read 4, iclass 16, count 2 2006.229.15:27:10.67#ibcon#read 4, iclass 16, count 2 2006.229.15:27:10.67#ibcon#about to read 5, iclass 16, count 2 2006.229.15:27:10.67#ibcon#read 5, iclass 16, count 2 2006.229.15:27:10.67#ibcon#about to read 6, iclass 16, count 2 2006.229.15:27:10.67#ibcon#read 6, iclass 16, count 2 2006.229.15:27:10.67#ibcon#end of sib2, iclass 16, count 2 2006.229.15:27:10.67#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:27:10.67#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:27:10.67#ibcon#[25=AT02-07\r\n] 2006.229.15:27:10.67#ibcon#*before write, iclass 16, count 2 2006.229.15:27:10.67#ibcon#enter sib2, iclass 16, count 2 2006.229.15:27:10.67#ibcon#flushed, iclass 16, count 2 2006.229.15:27:10.67#ibcon#about to write, iclass 16, count 2 2006.229.15:27:10.67#ibcon#wrote, iclass 16, count 2 2006.229.15:27:10.67#ibcon#about to read 3, iclass 16, count 2 2006.229.15:27:10.70#ibcon#read 3, iclass 16, count 2 2006.229.15:27:10.70#ibcon#about to read 4, iclass 16, count 2 2006.229.15:27:10.70#ibcon#read 4, iclass 16, count 2 2006.229.15:27:10.70#ibcon#about to read 5, iclass 16, count 2 2006.229.15:27:10.70#ibcon#read 5, iclass 16, count 2 2006.229.15:27:10.70#ibcon#about to read 6, iclass 16, count 2 2006.229.15:27:10.70#ibcon#read 6, iclass 16, count 2 2006.229.15:27:10.70#ibcon#end of sib2, iclass 16, count 2 2006.229.15:27:10.70#ibcon#*after write, iclass 16, count 2 2006.229.15:27:10.70#ibcon#*before return 0, iclass 16, count 2 2006.229.15:27:10.70#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:10.70#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:10.70#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:27:10.70#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:10.70#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:10.82#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:10.82#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:10.82#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:27:10.82#ibcon#first serial, iclass 16, count 0 2006.229.15:27:10.82#ibcon#enter sib2, iclass 16, count 0 2006.229.15:27:10.82#ibcon#flushed, iclass 16, count 0 2006.229.15:27:10.82#ibcon#about to write, iclass 16, count 0 2006.229.15:27:10.82#ibcon#wrote, iclass 16, count 0 2006.229.15:27:10.82#ibcon#about to read 3, iclass 16, count 0 2006.229.15:27:10.84#ibcon#read 3, iclass 16, count 0 2006.229.15:27:10.84#ibcon#about to read 4, iclass 16, count 0 2006.229.15:27:10.84#ibcon#read 4, iclass 16, count 0 2006.229.15:27:10.84#ibcon#about to read 5, iclass 16, count 0 2006.229.15:27:10.84#ibcon#read 5, iclass 16, count 0 2006.229.15:27:10.84#ibcon#about to read 6, iclass 16, count 0 2006.229.15:27:10.84#ibcon#read 6, iclass 16, count 0 2006.229.15:27:10.84#ibcon#end of sib2, iclass 16, count 0 2006.229.15:27:10.84#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:27:10.84#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:27:10.84#ibcon#[25=USB\r\n] 2006.229.15:27:10.84#ibcon#*before write, iclass 16, count 0 2006.229.15:27:10.84#ibcon#enter sib2, iclass 16, count 0 2006.229.15:27:10.84#ibcon#flushed, iclass 16, count 0 2006.229.15:27:10.84#ibcon#about to write, iclass 16, count 0 2006.229.15:27:10.84#ibcon#wrote, iclass 16, count 0 2006.229.15:27:10.84#ibcon#about to read 3, iclass 16, count 0 2006.229.15:27:10.87#ibcon#read 3, iclass 16, count 0 2006.229.15:27:10.87#ibcon#about to read 4, iclass 16, count 0 2006.229.15:27:10.87#ibcon#read 4, iclass 16, count 0 2006.229.15:27:10.87#ibcon#about to read 5, iclass 16, count 0 2006.229.15:27:10.87#ibcon#read 5, iclass 16, count 0 2006.229.15:27:10.87#ibcon#about to read 6, iclass 16, count 0 2006.229.15:27:10.87#ibcon#read 6, iclass 16, count 0 2006.229.15:27:10.87#ibcon#end of sib2, iclass 16, count 0 2006.229.15:27:10.87#ibcon#*after write, iclass 16, count 0 2006.229.15:27:10.87#ibcon#*before return 0, iclass 16, count 0 2006.229.15:27:10.87#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:10.87#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:10.87#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:27:10.87#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:27:10.87$vck44/valo=3,564.99 2006.229.15:27:10.87#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:27:10.87#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:27:10.87#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:10.87#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:10.87#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:10.87#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:10.87#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:27:10.87#ibcon#first serial, iclass 18, count 0 2006.229.15:27:10.87#ibcon#enter sib2, iclass 18, count 0 2006.229.15:27:10.87#ibcon#flushed, iclass 18, count 0 2006.229.15:27:10.87#ibcon#about to write, iclass 18, count 0 2006.229.15:27:10.87#ibcon#wrote, iclass 18, count 0 2006.229.15:27:10.87#ibcon#about to read 3, iclass 18, count 0 2006.229.15:27:10.89#ibcon#read 3, iclass 18, count 0 2006.229.15:27:10.89#ibcon#about to read 4, iclass 18, count 0 2006.229.15:27:10.89#ibcon#read 4, iclass 18, count 0 2006.229.15:27:10.89#ibcon#about to read 5, iclass 18, count 0 2006.229.15:27:10.89#ibcon#read 5, iclass 18, count 0 2006.229.15:27:10.89#ibcon#about to read 6, iclass 18, count 0 2006.229.15:27:10.89#ibcon#read 6, iclass 18, count 0 2006.229.15:27:10.89#ibcon#end of sib2, iclass 18, count 0 2006.229.15:27:10.89#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:27:10.89#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:27:10.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:27:10.89#ibcon#*before write, iclass 18, count 0 2006.229.15:27:10.89#ibcon#enter sib2, iclass 18, count 0 2006.229.15:27:10.89#ibcon#flushed, iclass 18, count 0 2006.229.15:27:10.89#ibcon#about to write, iclass 18, count 0 2006.229.15:27:10.89#ibcon#wrote, iclass 18, count 0 2006.229.15:27:10.89#ibcon#about to read 3, iclass 18, count 0 2006.229.15:27:10.93#ibcon#read 3, iclass 18, count 0 2006.229.15:27:10.93#ibcon#about to read 4, iclass 18, count 0 2006.229.15:27:10.93#ibcon#read 4, iclass 18, count 0 2006.229.15:27:10.93#ibcon#about to read 5, iclass 18, count 0 2006.229.15:27:10.93#ibcon#read 5, iclass 18, count 0 2006.229.15:27:10.93#ibcon#about to read 6, iclass 18, count 0 2006.229.15:27:10.93#ibcon#read 6, iclass 18, count 0 2006.229.15:27:10.93#ibcon#end of sib2, iclass 18, count 0 2006.229.15:27:10.93#ibcon#*after write, iclass 18, count 0 2006.229.15:27:10.93#ibcon#*before return 0, iclass 18, count 0 2006.229.15:27:10.93#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:10.93#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:10.93#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:27:10.93#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:27:10.93$vck44/va=3,6 2006.229.15:27:10.93#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:27:10.93#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:27:10.93#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:10.93#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:10.99#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:10.99#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:10.99#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:27:10.99#ibcon#first serial, iclass 20, count 2 2006.229.15:27:10.99#ibcon#enter sib2, iclass 20, count 2 2006.229.15:27:10.99#ibcon#flushed, iclass 20, count 2 2006.229.15:27:10.99#ibcon#about to write, iclass 20, count 2 2006.229.15:27:10.99#ibcon#wrote, iclass 20, count 2 2006.229.15:27:10.99#ibcon#about to read 3, iclass 20, count 2 2006.229.15:27:11.01#ibcon#read 3, iclass 20, count 2 2006.229.15:27:11.01#ibcon#about to read 4, iclass 20, count 2 2006.229.15:27:11.01#ibcon#read 4, iclass 20, count 2 2006.229.15:27:11.01#ibcon#about to read 5, iclass 20, count 2 2006.229.15:27:11.01#ibcon#read 5, iclass 20, count 2 2006.229.15:27:11.01#ibcon#about to read 6, iclass 20, count 2 2006.229.15:27:11.01#ibcon#read 6, iclass 20, count 2 2006.229.15:27:11.01#ibcon#end of sib2, iclass 20, count 2 2006.229.15:27:11.01#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:27:11.01#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:27:11.01#ibcon#[25=AT03-06\r\n] 2006.229.15:27:11.01#ibcon#*before write, iclass 20, count 2 2006.229.15:27:11.01#ibcon#enter sib2, iclass 20, count 2 2006.229.15:27:11.01#ibcon#flushed, iclass 20, count 2 2006.229.15:27:11.01#ibcon#about to write, iclass 20, count 2 2006.229.15:27:11.01#ibcon#wrote, iclass 20, count 2 2006.229.15:27:11.01#ibcon#about to read 3, iclass 20, count 2 2006.229.15:27:11.04#ibcon#read 3, iclass 20, count 2 2006.229.15:27:11.04#ibcon#about to read 4, iclass 20, count 2 2006.229.15:27:11.04#ibcon#read 4, iclass 20, count 2 2006.229.15:27:11.04#ibcon#about to read 5, iclass 20, count 2 2006.229.15:27:11.04#ibcon#read 5, iclass 20, count 2 2006.229.15:27:11.04#ibcon#about to read 6, iclass 20, count 2 2006.229.15:27:11.04#ibcon#read 6, iclass 20, count 2 2006.229.15:27:11.04#ibcon#end of sib2, iclass 20, count 2 2006.229.15:27:11.04#ibcon#*after write, iclass 20, count 2 2006.229.15:27:11.04#ibcon#*before return 0, iclass 20, count 2 2006.229.15:27:11.04#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:11.04#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:11.04#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:27:11.04#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:11.04#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:11.16#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:11.16#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:11.16#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:27:11.16#ibcon#first serial, iclass 20, count 0 2006.229.15:27:11.16#ibcon#enter sib2, iclass 20, count 0 2006.229.15:27:11.16#ibcon#flushed, iclass 20, count 0 2006.229.15:27:11.16#ibcon#about to write, iclass 20, count 0 2006.229.15:27:11.16#ibcon#wrote, iclass 20, count 0 2006.229.15:27:11.16#ibcon#about to read 3, iclass 20, count 0 2006.229.15:27:11.18#ibcon#read 3, iclass 20, count 0 2006.229.15:27:11.18#ibcon#about to read 4, iclass 20, count 0 2006.229.15:27:11.18#ibcon#read 4, iclass 20, count 0 2006.229.15:27:11.18#ibcon#about to read 5, iclass 20, count 0 2006.229.15:27:11.18#ibcon#read 5, iclass 20, count 0 2006.229.15:27:11.18#ibcon#about to read 6, iclass 20, count 0 2006.229.15:27:11.18#ibcon#read 6, iclass 20, count 0 2006.229.15:27:11.18#ibcon#end of sib2, iclass 20, count 0 2006.229.15:27:11.18#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:27:11.18#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:27:11.18#ibcon#[25=USB\r\n] 2006.229.15:27:11.18#ibcon#*before write, iclass 20, count 0 2006.229.15:27:11.18#ibcon#enter sib2, iclass 20, count 0 2006.229.15:27:11.18#ibcon#flushed, iclass 20, count 0 2006.229.15:27:11.18#ibcon#about to write, iclass 20, count 0 2006.229.15:27:11.18#ibcon#wrote, iclass 20, count 0 2006.229.15:27:11.18#ibcon#about to read 3, iclass 20, count 0 2006.229.15:27:11.21#ibcon#read 3, iclass 20, count 0 2006.229.15:27:11.21#ibcon#about to read 4, iclass 20, count 0 2006.229.15:27:11.21#ibcon#read 4, iclass 20, count 0 2006.229.15:27:11.21#ibcon#about to read 5, iclass 20, count 0 2006.229.15:27:11.21#ibcon#read 5, iclass 20, count 0 2006.229.15:27:11.21#ibcon#about to read 6, iclass 20, count 0 2006.229.15:27:11.21#ibcon#read 6, iclass 20, count 0 2006.229.15:27:11.21#ibcon#end of sib2, iclass 20, count 0 2006.229.15:27:11.21#ibcon#*after write, iclass 20, count 0 2006.229.15:27:11.21#ibcon#*before return 0, iclass 20, count 0 2006.229.15:27:11.21#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:11.21#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:11.21#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:27:11.21#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:27:11.21$vck44/valo=4,624.99 2006.229.15:27:11.21#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:27:11.21#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:27:11.21#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:11.21#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:11.21#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:11.21#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:11.21#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:27:11.21#ibcon#first serial, iclass 22, count 0 2006.229.15:27:11.21#ibcon#enter sib2, iclass 22, count 0 2006.229.15:27:11.21#ibcon#flushed, iclass 22, count 0 2006.229.15:27:11.21#ibcon#about to write, iclass 22, count 0 2006.229.15:27:11.21#ibcon#wrote, iclass 22, count 0 2006.229.15:27:11.21#ibcon#about to read 3, iclass 22, count 0 2006.229.15:27:11.23#ibcon#read 3, iclass 22, count 0 2006.229.15:27:11.23#ibcon#about to read 4, iclass 22, count 0 2006.229.15:27:11.23#ibcon#read 4, iclass 22, count 0 2006.229.15:27:11.23#ibcon#about to read 5, iclass 22, count 0 2006.229.15:27:11.23#ibcon#read 5, iclass 22, count 0 2006.229.15:27:11.23#ibcon#about to read 6, iclass 22, count 0 2006.229.15:27:11.23#ibcon#read 6, iclass 22, count 0 2006.229.15:27:11.23#ibcon#end of sib2, iclass 22, count 0 2006.229.15:27:11.23#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:27:11.23#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:27:11.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:27:11.23#ibcon#*before write, iclass 22, count 0 2006.229.15:27:11.23#ibcon#enter sib2, iclass 22, count 0 2006.229.15:27:11.23#ibcon#flushed, iclass 22, count 0 2006.229.15:27:11.23#ibcon#about to write, iclass 22, count 0 2006.229.15:27:11.23#ibcon#wrote, iclass 22, count 0 2006.229.15:27:11.23#ibcon#about to read 3, iclass 22, count 0 2006.229.15:27:11.27#ibcon#read 3, iclass 22, count 0 2006.229.15:27:11.27#ibcon#about to read 4, iclass 22, count 0 2006.229.15:27:11.27#ibcon#read 4, iclass 22, count 0 2006.229.15:27:11.27#ibcon#about to read 5, iclass 22, count 0 2006.229.15:27:11.27#ibcon#read 5, iclass 22, count 0 2006.229.15:27:11.27#ibcon#about to read 6, iclass 22, count 0 2006.229.15:27:11.27#ibcon#read 6, iclass 22, count 0 2006.229.15:27:11.27#ibcon#end of sib2, iclass 22, count 0 2006.229.15:27:11.27#ibcon#*after write, iclass 22, count 0 2006.229.15:27:11.27#ibcon#*before return 0, iclass 22, count 0 2006.229.15:27:11.27#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:11.27#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:11.27#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:27:11.27#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:27:11.27$vck44/va=4,7 2006.229.15:27:11.27#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.15:27:11.27#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.15:27:11.27#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:11.27#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:11.33#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:11.33#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:11.33#ibcon#enter wrdev, iclass 24, count 2 2006.229.15:27:11.33#ibcon#first serial, iclass 24, count 2 2006.229.15:27:11.33#ibcon#enter sib2, iclass 24, count 2 2006.229.15:27:11.33#ibcon#flushed, iclass 24, count 2 2006.229.15:27:11.33#ibcon#about to write, iclass 24, count 2 2006.229.15:27:11.33#ibcon#wrote, iclass 24, count 2 2006.229.15:27:11.33#ibcon#about to read 3, iclass 24, count 2 2006.229.15:27:11.35#ibcon#read 3, iclass 24, count 2 2006.229.15:27:11.35#ibcon#about to read 4, iclass 24, count 2 2006.229.15:27:11.35#ibcon#read 4, iclass 24, count 2 2006.229.15:27:11.35#ibcon#about to read 5, iclass 24, count 2 2006.229.15:27:11.35#ibcon#read 5, iclass 24, count 2 2006.229.15:27:11.35#ibcon#about to read 6, iclass 24, count 2 2006.229.15:27:11.35#ibcon#read 6, iclass 24, count 2 2006.229.15:27:11.35#ibcon#end of sib2, iclass 24, count 2 2006.229.15:27:11.35#ibcon#*mode == 0, iclass 24, count 2 2006.229.15:27:11.35#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.15:27:11.35#ibcon#[25=AT04-07\r\n] 2006.229.15:27:11.35#ibcon#*before write, iclass 24, count 2 2006.229.15:27:11.35#ibcon#enter sib2, iclass 24, count 2 2006.229.15:27:11.35#ibcon#flushed, iclass 24, count 2 2006.229.15:27:11.35#ibcon#about to write, iclass 24, count 2 2006.229.15:27:11.35#ibcon#wrote, iclass 24, count 2 2006.229.15:27:11.35#ibcon#about to read 3, iclass 24, count 2 2006.229.15:27:11.38#ibcon#read 3, iclass 24, count 2 2006.229.15:27:11.38#ibcon#about to read 4, iclass 24, count 2 2006.229.15:27:11.38#ibcon#read 4, iclass 24, count 2 2006.229.15:27:11.38#ibcon#about to read 5, iclass 24, count 2 2006.229.15:27:11.38#ibcon#read 5, iclass 24, count 2 2006.229.15:27:11.38#ibcon#about to read 6, iclass 24, count 2 2006.229.15:27:11.38#ibcon#read 6, iclass 24, count 2 2006.229.15:27:11.38#ibcon#end of sib2, iclass 24, count 2 2006.229.15:27:11.38#ibcon#*after write, iclass 24, count 2 2006.229.15:27:11.42#ibcon#*before return 0, iclass 24, count 2 2006.229.15:27:11.42#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:11.42#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:11.42#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.15:27:11.42#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:11.42#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:11.53#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:11.53#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:11.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:27:11.53#ibcon#first serial, iclass 24, count 0 2006.229.15:27:11.53#ibcon#enter sib2, iclass 24, count 0 2006.229.15:27:11.53#ibcon#flushed, iclass 24, count 0 2006.229.15:27:11.53#ibcon#about to write, iclass 24, count 0 2006.229.15:27:11.53#ibcon#wrote, iclass 24, count 0 2006.229.15:27:11.53#ibcon#about to read 3, iclass 24, count 0 2006.229.15:27:11.55#ibcon#read 3, iclass 24, count 0 2006.229.15:27:11.55#ibcon#about to read 4, iclass 24, count 0 2006.229.15:27:11.55#ibcon#read 4, iclass 24, count 0 2006.229.15:27:11.55#ibcon#about to read 5, iclass 24, count 0 2006.229.15:27:11.55#ibcon#read 5, iclass 24, count 0 2006.229.15:27:11.55#ibcon#about to read 6, iclass 24, count 0 2006.229.15:27:11.55#ibcon#read 6, iclass 24, count 0 2006.229.15:27:11.55#ibcon#end of sib2, iclass 24, count 0 2006.229.15:27:11.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:27:11.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:27:11.55#ibcon#[25=USB\r\n] 2006.229.15:27:11.55#ibcon#*before write, iclass 24, count 0 2006.229.15:27:11.55#ibcon#enter sib2, iclass 24, count 0 2006.229.15:27:11.55#ibcon#flushed, iclass 24, count 0 2006.229.15:27:11.55#ibcon#about to write, iclass 24, count 0 2006.229.15:27:11.55#ibcon#wrote, iclass 24, count 0 2006.229.15:27:11.55#ibcon#about to read 3, iclass 24, count 0 2006.229.15:27:11.58#ibcon#read 3, iclass 24, count 0 2006.229.15:27:11.58#ibcon#about to read 4, iclass 24, count 0 2006.229.15:27:11.58#ibcon#read 4, iclass 24, count 0 2006.229.15:27:11.58#ibcon#about to read 5, iclass 24, count 0 2006.229.15:27:11.58#ibcon#read 5, iclass 24, count 0 2006.229.15:27:11.58#ibcon#about to read 6, iclass 24, count 0 2006.229.15:27:11.58#ibcon#read 6, iclass 24, count 0 2006.229.15:27:11.58#ibcon#end of sib2, iclass 24, count 0 2006.229.15:27:11.58#ibcon#*after write, iclass 24, count 0 2006.229.15:27:11.58#ibcon#*before return 0, iclass 24, count 0 2006.229.15:27:11.58#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:11.58#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:11.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:27:11.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:27:11.58$vck44/valo=5,734.99 2006.229.15:27:11.58#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:27:11.58#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:27:11.58#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:11.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:11.58#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:11.58#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:11.58#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:27:11.58#ibcon#first serial, iclass 26, count 0 2006.229.15:27:11.58#ibcon#enter sib2, iclass 26, count 0 2006.229.15:27:11.58#ibcon#flushed, iclass 26, count 0 2006.229.15:27:11.58#ibcon#about to write, iclass 26, count 0 2006.229.15:27:11.58#ibcon#wrote, iclass 26, count 0 2006.229.15:27:11.58#ibcon#about to read 3, iclass 26, count 0 2006.229.15:27:11.60#ibcon#read 3, iclass 26, count 0 2006.229.15:27:11.60#ibcon#about to read 4, iclass 26, count 0 2006.229.15:27:11.60#ibcon#read 4, iclass 26, count 0 2006.229.15:27:11.60#ibcon#about to read 5, iclass 26, count 0 2006.229.15:27:11.60#ibcon#read 5, iclass 26, count 0 2006.229.15:27:11.60#ibcon#about to read 6, iclass 26, count 0 2006.229.15:27:11.60#ibcon#read 6, iclass 26, count 0 2006.229.15:27:11.60#ibcon#end of sib2, iclass 26, count 0 2006.229.15:27:11.60#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:27:11.60#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:27:11.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:27:11.60#ibcon#*before write, iclass 26, count 0 2006.229.15:27:11.60#ibcon#enter sib2, iclass 26, count 0 2006.229.15:27:11.60#ibcon#flushed, iclass 26, count 0 2006.229.15:27:11.60#ibcon#about to write, iclass 26, count 0 2006.229.15:27:11.60#ibcon#wrote, iclass 26, count 0 2006.229.15:27:11.60#ibcon#about to read 3, iclass 26, count 0 2006.229.15:27:11.64#ibcon#read 3, iclass 26, count 0 2006.229.15:27:11.64#ibcon#about to read 4, iclass 26, count 0 2006.229.15:27:11.64#ibcon#read 4, iclass 26, count 0 2006.229.15:27:11.64#ibcon#about to read 5, iclass 26, count 0 2006.229.15:27:11.64#ibcon#read 5, iclass 26, count 0 2006.229.15:27:11.64#ibcon#about to read 6, iclass 26, count 0 2006.229.15:27:11.64#ibcon#read 6, iclass 26, count 0 2006.229.15:27:11.64#ibcon#end of sib2, iclass 26, count 0 2006.229.15:27:11.64#ibcon#*after write, iclass 26, count 0 2006.229.15:27:11.64#ibcon#*before return 0, iclass 26, count 0 2006.229.15:27:11.64#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:11.64#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:11.64#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:27:11.64#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:27:11.64$vck44/va=5,4 2006.229.15:27:11.64#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:27:11.64#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:27:11.64#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:11.64#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:11.70#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:11.70#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:11.70#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:27:11.70#ibcon#first serial, iclass 28, count 2 2006.229.15:27:11.70#ibcon#enter sib2, iclass 28, count 2 2006.229.15:27:11.70#ibcon#flushed, iclass 28, count 2 2006.229.15:27:11.70#ibcon#about to write, iclass 28, count 2 2006.229.15:27:11.70#ibcon#wrote, iclass 28, count 2 2006.229.15:27:11.70#ibcon#about to read 3, iclass 28, count 2 2006.229.15:27:11.72#ibcon#read 3, iclass 28, count 2 2006.229.15:27:11.72#ibcon#about to read 4, iclass 28, count 2 2006.229.15:27:11.72#ibcon#read 4, iclass 28, count 2 2006.229.15:27:11.72#ibcon#about to read 5, iclass 28, count 2 2006.229.15:27:11.72#ibcon#read 5, iclass 28, count 2 2006.229.15:27:11.72#ibcon#about to read 6, iclass 28, count 2 2006.229.15:27:11.72#ibcon#read 6, iclass 28, count 2 2006.229.15:27:11.72#ibcon#end of sib2, iclass 28, count 2 2006.229.15:27:11.72#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:27:11.72#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:27:11.72#ibcon#[25=AT05-04\r\n] 2006.229.15:27:11.72#ibcon#*before write, iclass 28, count 2 2006.229.15:27:11.72#ibcon#enter sib2, iclass 28, count 2 2006.229.15:27:11.72#ibcon#flushed, iclass 28, count 2 2006.229.15:27:11.72#ibcon#about to write, iclass 28, count 2 2006.229.15:27:11.72#ibcon#wrote, iclass 28, count 2 2006.229.15:27:11.72#ibcon#about to read 3, iclass 28, count 2 2006.229.15:27:11.75#ibcon#read 3, iclass 28, count 2 2006.229.15:27:11.75#ibcon#about to read 4, iclass 28, count 2 2006.229.15:27:11.75#ibcon#read 4, iclass 28, count 2 2006.229.15:27:11.75#ibcon#about to read 5, iclass 28, count 2 2006.229.15:27:11.75#ibcon#read 5, iclass 28, count 2 2006.229.15:27:11.75#ibcon#about to read 6, iclass 28, count 2 2006.229.15:27:11.75#ibcon#read 6, iclass 28, count 2 2006.229.15:27:11.75#ibcon#end of sib2, iclass 28, count 2 2006.229.15:27:11.75#ibcon#*after write, iclass 28, count 2 2006.229.15:27:11.75#ibcon#*before return 0, iclass 28, count 2 2006.229.15:27:11.75#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:11.75#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:11.75#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:27:11.75#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:11.75#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:11.87#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:11.87#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:11.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:27:11.87#ibcon#first serial, iclass 28, count 0 2006.229.15:27:11.87#ibcon#enter sib2, iclass 28, count 0 2006.229.15:27:11.87#ibcon#flushed, iclass 28, count 0 2006.229.15:27:11.87#ibcon#about to write, iclass 28, count 0 2006.229.15:27:11.87#ibcon#wrote, iclass 28, count 0 2006.229.15:27:11.87#ibcon#about to read 3, iclass 28, count 0 2006.229.15:27:11.89#ibcon#read 3, iclass 28, count 0 2006.229.15:27:11.89#ibcon#about to read 4, iclass 28, count 0 2006.229.15:27:11.89#ibcon#read 4, iclass 28, count 0 2006.229.15:27:11.89#ibcon#about to read 5, iclass 28, count 0 2006.229.15:27:11.89#ibcon#read 5, iclass 28, count 0 2006.229.15:27:11.89#ibcon#about to read 6, iclass 28, count 0 2006.229.15:27:11.89#ibcon#read 6, iclass 28, count 0 2006.229.15:27:11.89#ibcon#end of sib2, iclass 28, count 0 2006.229.15:27:11.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:27:11.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:27:11.89#ibcon#[25=USB\r\n] 2006.229.15:27:11.89#ibcon#*before write, iclass 28, count 0 2006.229.15:27:11.89#ibcon#enter sib2, iclass 28, count 0 2006.229.15:27:11.89#ibcon#flushed, iclass 28, count 0 2006.229.15:27:11.89#ibcon#about to write, iclass 28, count 0 2006.229.15:27:11.89#ibcon#wrote, iclass 28, count 0 2006.229.15:27:11.89#ibcon#about to read 3, iclass 28, count 0 2006.229.15:27:11.92#ibcon#read 3, iclass 28, count 0 2006.229.15:27:11.92#ibcon#about to read 4, iclass 28, count 0 2006.229.15:27:11.92#ibcon#read 4, iclass 28, count 0 2006.229.15:27:11.92#ibcon#about to read 5, iclass 28, count 0 2006.229.15:27:11.92#ibcon#read 5, iclass 28, count 0 2006.229.15:27:11.92#ibcon#about to read 6, iclass 28, count 0 2006.229.15:27:11.92#ibcon#read 6, iclass 28, count 0 2006.229.15:27:11.92#ibcon#end of sib2, iclass 28, count 0 2006.229.15:27:11.92#ibcon#*after write, iclass 28, count 0 2006.229.15:27:11.92#ibcon#*before return 0, iclass 28, count 0 2006.229.15:27:11.92#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:11.92#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:11.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:27:11.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:27:11.92$vck44/valo=6,814.99 2006.229.15:27:11.92#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:27:11.92#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:27:11.92#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:11.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:11.92#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:11.92#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:11.92#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:27:11.92#ibcon#first serial, iclass 30, count 0 2006.229.15:27:11.92#ibcon#enter sib2, iclass 30, count 0 2006.229.15:27:11.92#ibcon#flushed, iclass 30, count 0 2006.229.15:27:11.92#ibcon#about to write, iclass 30, count 0 2006.229.15:27:11.92#ibcon#wrote, iclass 30, count 0 2006.229.15:27:11.92#ibcon#about to read 3, iclass 30, count 0 2006.229.15:27:11.94#ibcon#read 3, iclass 30, count 0 2006.229.15:27:11.94#ibcon#about to read 4, iclass 30, count 0 2006.229.15:27:11.94#ibcon#read 4, iclass 30, count 0 2006.229.15:27:11.94#ibcon#about to read 5, iclass 30, count 0 2006.229.15:27:11.94#ibcon#read 5, iclass 30, count 0 2006.229.15:27:11.94#ibcon#about to read 6, iclass 30, count 0 2006.229.15:27:11.94#ibcon#read 6, iclass 30, count 0 2006.229.15:27:11.94#ibcon#end of sib2, iclass 30, count 0 2006.229.15:27:11.94#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:27:11.94#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:27:11.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:27:11.94#ibcon#*before write, iclass 30, count 0 2006.229.15:27:11.94#ibcon#enter sib2, iclass 30, count 0 2006.229.15:27:11.94#ibcon#flushed, iclass 30, count 0 2006.229.15:27:11.94#ibcon#about to write, iclass 30, count 0 2006.229.15:27:11.94#ibcon#wrote, iclass 30, count 0 2006.229.15:27:11.94#ibcon#about to read 3, iclass 30, count 0 2006.229.15:27:11.98#ibcon#read 3, iclass 30, count 0 2006.229.15:27:11.98#ibcon#about to read 4, iclass 30, count 0 2006.229.15:27:11.98#ibcon#read 4, iclass 30, count 0 2006.229.15:27:11.98#ibcon#about to read 5, iclass 30, count 0 2006.229.15:27:11.98#ibcon#read 5, iclass 30, count 0 2006.229.15:27:11.98#ibcon#about to read 6, iclass 30, count 0 2006.229.15:27:11.98#ibcon#read 6, iclass 30, count 0 2006.229.15:27:11.98#ibcon#end of sib2, iclass 30, count 0 2006.229.15:27:11.98#ibcon#*after write, iclass 30, count 0 2006.229.15:27:11.98#ibcon#*before return 0, iclass 30, count 0 2006.229.15:27:11.98#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:11.98#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:11.98#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:27:11.98#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:27:11.98$vck44/va=6,4 2006.229.15:27:11.98#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:27:11.98#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:27:11.98#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:11.98#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:12.04#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:12.04#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:12.04#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:27:12.04#ibcon#first serial, iclass 32, count 2 2006.229.15:27:12.04#ibcon#enter sib2, iclass 32, count 2 2006.229.15:27:12.04#ibcon#flushed, iclass 32, count 2 2006.229.15:27:12.04#ibcon#about to write, iclass 32, count 2 2006.229.15:27:12.04#ibcon#wrote, iclass 32, count 2 2006.229.15:27:12.04#ibcon#about to read 3, iclass 32, count 2 2006.229.15:27:12.06#ibcon#read 3, iclass 32, count 2 2006.229.15:27:12.06#ibcon#about to read 4, iclass 32, count 2 2006.229.15:27:12.06#ibcon#read 4, iclass 32, count 2 2006.229.15:27:12.06#ibcon#about to read 5, iclass 32, count 2 2006.229.15:27:12.06#ibcon#read 5, iclass 32, count 2 2006.229.15:27:12.06#ibcon#about to read 6, iclass 32, count 2 2006.229.15:27:12.06#ibcon#read 6, iclass 32, count 2 2006.229.15:27:12.06#ibcon#end of sib2, iclass 32, count 2 2006.229.15:27:12.06#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:27:12.06#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:27:12.06#ibcon#[25=AT06-04\r\n] 2006.229.15:27:12.06#ibcon#*before write, iclass 32, count 2 2006.229.15:27:12.06#ibcon#enter sib2, iclass 32, count 2 2006.229.15:27:12.06#ibcon#flushed, iclass 32, count 2 2006.229.15:27:12.06#ibcon#about to write, iclass 32, count 2 2006.229.15:27:12.06#ibcon#wrote, iclass 32, count 2 2006.229.15:27:12.06#ibcon#about to read 3, iclass 32, count 2 2006.229.15:27:12.09#ibcon#read 3, iclass 32, count 2 2006.229.15:27:12.09#ibcon#about to read 4, iclass 32, count 2 2006.229.15:27:12.09#ibcon#read 4, iclass 32, count 2 2006.229.15:27:12.09#ibcon#about to read 5, iclass 32, count 2 2006.229.15:27:12.09#ibcon#read 5, iclass 32, count 2 2006.229.15:27:12.09#ibcon#about to read 6, iclass 32, count 2 2006.229.15:27:12.09#ibcon#read 6, iclass 32, count 2 2006.229.15:27:12.09#ibcon#end of sib2, iclass 32, count 2 2006.229.15:27:12.09#ibcon#*after write, iclass 32, count 2 2006.229.15:27:12.09#ibcon#*before return 0, iclass 32, count 2 2006.229.15:27:12.09#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:12.09#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:12.09#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:27:12.09#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:12.09#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:12.21#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:12.21#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:12.21#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:27:12.21#ibcon#first serial, iclass 32, count 0 2006.229.15:27:12.21#ibcon#enter sib2, iclass 32, count 0 2006.229.15:27:12.21#ibcon#flushed, iclass 32, count 0 2006.229.15:27:12.21#ibcon#about to write, iclass 32, count 0 2006.229.15:27:12.21#ibcon#wrote, iclass 32, count 0 2006.229.15:27:12.21#ibcon#about to read 3, iclass 32, count 0 2006.229.15:27:12.23#ibcon#read 3, iclass 32, count 0 2006.229.15:27:12.23#ibcon#about to read 4, iclass 32, count 0 2006.229.15:27:12.23#ibcon#read 4, iclass 32, count 0 2006.229.15:27:12.23#ibcon#about to read 5, iclass 32, count 0 2006.229.15:27:12.23#ibcon#read 5, iclass 32, count 0 2006.229.15:27:12.23#ibcon#about to read 6, iclass 32, count 0 2006.229.15:27:12.23#ibcon#read 6, iclass 32, count 0 2006.229.15:27:12.23#ibcon#end of sib2, iclass 32, count 0 2006.229.15:27:12.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:27:12.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:27:12.23#ibcon#[25=USB\r\n] 2006.229.15:27:12.23#ibcon#*before write, iclass 32, count 0 2006.229.15:27:12.23#ibcon#enter sib2, iclass 32, count 0 2006.229.15:27:12.23#ibcon#flushed, iclass 32, count 0 2006.229.15:27:12.23#ibcon#about to write, iclass 32, count 0 2006.229.15:27:12.23#ibcon#wrote, iclass 32, count 0 2006.229.15:27:12.23#ibcon#about to read 3, iclass 32, count 0 2006.229.15:27:12.26#ibcon#read 3, iclass 32, count 0 2006.229.15:27:12.26#ibcon#about to read 4, iclass 32, count 0 2006.229.15:27:12.26#ibcon#read 4, iclass 32, count 0 2006.229.15:27:12.26#ibcon#about to read 5, iclass 32, count 0 2006.229.15:27:12.26#ibcon#read 5, iclass 32, count 0 2006.229.15:27:12.26#ibcon#about to read 6, iclass 32, count 0 2006.229.15:27:12.26#ibcon#read 6, iclass 32, count 0 2006.229.15:27:12.26#ibcon#end of sib2, iclass 32, count 0 2006.229.15:27:12.26#ibcon#*after write, iclass 32, count 0 2006.229.15:27:12.26#ibcon#*before return 0, iclass 32, count 0 2006.229.15:27:12.26#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:12.26#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:12.26#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:27:12.26#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:27:12.26$vck44/valo=7,864.99 2006.229.15:27:12.26#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:27:12.26#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:27:12.26#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:12.26#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:12.26#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:12.26#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:12.26#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:27:12.26#ibcon#first serial, iclass 34, count 0 2006.229.15:27:12.26#ibcon#enter sib2, iclass 34, count 0 2006.229.15:27:12.26#ibcon#flushed, iclass 34, count 0 2006.229.15:27:12.26#ibcon#about to write, iclass 34, count 0 2006.229.15:27:12.26#ibcon#wrote, iclass 34, count 0 2006.229.15:27:12.26#ibcon#about to read 3, iclass 34, count 0 2006.229.15:27:12.28#ibcon#read 3, iclass 34, count 0 2006.229.15:27:12.28#ibcon#about to read 4, iclass 34, count 0 2006.229.15:27:12.28#ibcon#read 4, iclass 34, count 0 2006.229.15:27:12.28#ibcon#about to read 5, iclass 34, count 0 2006.229.15:27:12.28#ibcon#read 5, iclass 34, count 0 2006.229.15:27:12.28#ibcon#about to read 6, iclass 34, count 0 2006.229.15:27:12.28#ibcon#read 6, iclass 34, count 0 2006.229.15:27:12.28#ibcon#end of sib2, iclass 34, count 0 2006.229.15:27:12.28#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:27:12.28#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:27:12.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:27:12.28#ibcon#*before write, iclass 34, count 0 2006.229.15:27:12.28#ibcon#enter sib2, iclass 34, count 0 2006.229.15:27:12.28#ibcon#flushed, iclass 34, count 0 2006.229.15:27:12.28#ibcon#about to write, iclass 34, count 0 2006.229.15:27:12.28#ibcon#wrote, iclass 34, count 0 2006.229.15:27:12.28#ibcon#about to read 3, iclass 34, count 0 2006.229.15:27:12.32#ibcon#read 3, iclass 34, count 0 2006.229.15:27:12.32#ibcon#about to read 4, iclass 34, count 0 2006.229.15:27:12.32#ibcon#read 4, iclass 34, count 0 2006.229.15:27:12.32#ibcon#about to read 5, iclass 34, count 0 2006.229.15:27:12.32#ibcon#read 5, iclass 34, count 0 2006.229.15:27:12.32#ibcon#about to read 6, iclass 34, count 0 2006.229.15:27:12.32#ibcon#read 6, iclass 34, count 0 2006.229.15:27:12.32#ibcon#end of sib2, iclass 34, count 0 2006.229.15:27:12.32#ibcon#*after write, iclass 34, count 0 2006.229.15:27:12.32#ibcon#*before return 0, iclass 34, count 0 2006.229.15:27:12.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:12.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:12.32#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:27:12.32#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:27:12.32$vck44/va=7,5 2006.229.15:27:12.32#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:27:12.32#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:27:12.32#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:12.32#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:12.38#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:12.38#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:12.38#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:27:12.38#ibcon#first serial, iclass 36, count 2 2006.229.15:27:12.38#ibcon#enter sib2, iclass 36, count 2 2006.229.15:27:12.38#ibcon#flushed, iclass 36, count 2 2006.229.15:27:12.38#ibcon#about to write, iclass 36, count 2 2006.229.15:27:12.38#ibcon#wrote, iclass 36, count 2 2006.229.15:27:12.38#ibcon#about to read 3, iclass 36, count 2 2006.229.15:27:12.40#ibcon#read 3, iclass 36, count 2 2006.229.15:27:12.40#ibcon#about to read 4, iclass 36, count 2 2006.229.15:27:12.40#ibcon#read 4, iclass 36, count 2 2006.229.15:27:12.40#ibcon#about to read 5, iclass 36, count 2 2006.229.15:27:12.40#ibcon#read 5, iclass 36, count 2 2006.229.15:27:12.40#ibcon#about to read 6, iclass 36, count 2 2006.229.15:27:12.40#ibcon#read 6, iclass 36, count 2 2006.229.15:27:12.40#ibcon#end of sib2, iclass 36, count 2 2006.229.15:27:12.40#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:27:12.40#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:27:12.40#ibcon#[25=AT07-05\r\n] 2006.229.15:27:12.40#ibcon#*before write, iclass 36, count 2 2006.229.15:27:12.40#ibcon#enter sib2, iclass 36, count 2 2006.229.15:27:12.40#ibcon#flushed, iclass 36, count 2 2006.229.15:27:12.40#ibcon#about to write, iclass 36, count 2 2006.229.15:27:12.40#ibcon#wrote, iclass 36, count 2 2006.229.15:27:12.40#ibcon#about to read 3, iclass 36, count 2 2006.229.15:27:12.43#ibcon#read 3, iclass 36, count 2 2006.229.15:27:12.43#ibcon#about to read 4, iclass 36, count 2 2006.229.15:27:12.43#ibcon#read 4, iclass 36, count 2 2006.229.15:27:12.43#ibcon#about to read 5, iclass 36, count 2 2006.229.15:27:12.43#ibcon#read 5, iclass 36, count 2 2006.229.15:27:12.43#ibcon#about to read 6, iclass 36, count 2 2006.229.15:27:12.43#ibcon#read 6, iclass 36, count 2 2006.229.15:27:12.43#ibcon#end of sib2, iclass 36, count 2 2006.229.15:27:12.43#ibcon#*after write, iclass 36, count 2 2006.229.15:27:12.43#ibcon#*before return 0, iclass 36, count 2 2006.229.15:27:12.43#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:12.43#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:12.43#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:27:12.43#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:12.43#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:12.55#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:12.55#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:12.55#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:27:12.55#ibcon#first serial, iclass 36, count 0 2006.229.15:27:12.55#ibcon#enter sib2, iclass 36, count 0 2006.229.15:27:12.55#ibcon#flushed, iclass 36, count 0 2006.229.15:27:12.55#ibcon#about to write, iclass 36, count 0 2006.229.15:27:12.55#ibcon#wrote, iclass 36, count 0 2006.229.15:27:12.55#ibcon#about to read 3, iclass 36, count 0 2006.229.15:27:12.57#ibcon#read 3, iclass 36, count 0 2006.229.15:27:12.57#ibcon#about to read 4, iclass 36, count 0 2006.229.15:27:12.57#ibcon#read 4, iclass 36, count 0 2006.229.15:27:12.57#ibcon#about to read 5, iclass 36, count 0 2006.229.15:27:12.57#ibcon#read 5, iclass 36, count 0 2006.229.15:27:12.57#ibcon#about to read 6, iclass 36, count 0 2006.229.15:27:12.57#ibcon#read 6, iclass 36, count 0 2006.229.15:27:12.57#ibcon#end of sib2, iclass 36, count 0 2006.229.15:27:12.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:27:12.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:27:12.57#ibcon#[25=USB\r\n] 2006.229.15:27:12.57#ibcon#*before write, iclass 36, count 0 2006.229.15:27:12.57#ibcon#enter sib2, iclass 36, count 0 2006.229.15:27:12.57#ibcon#flushed, iclass 36, count 0 2006.229.15:27:12.57#ibcon#about to write, iclass 36, count 0 2006.229.15:27:12.57#ibcon#wrote, iclass 36, count 0 2006.229.15:27:12.57#ibcon#about to read 3, iclass 36, count 0 2006.229.15:27:12.60#ibcon#read 3, iclass 36, count 0 2006.229.15:27:12.60#ibcon#about to read 4, iclass 36, count 0 2006.229.15:27:12.60#ibcon#read 4, iclass 36, count 0 2006.229.15:27:12.60#ibcon#about to read 5, iclass 36, count 0 2006.229.15:27:12.60#ibcon#read 5, iclass 36, count 0 2006.229.15:27:12.60#ibcon#about to read 6, iclass 36, count 0 2006.229.15:27:12.60#ibcon#read 6, iclass 36, count 0 2006.229.15:27:12.60#ibcon#end of sib2, iclass 36, count 0 2006.229.15:27:12.60#ibcon#*after write, iclass 36, count 0 2006.229.15:27:12.60#ibcon#*before return 0, iclass 36, count 0 2006.229.15:27:12.60#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:12.60#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:12.60#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:27:12.60#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:27:12.60$vck44/valo=8,884.99 2006.229.15:27:12.60#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:27:12.60#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:27:12.60#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:12.60#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:12.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:12.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:12.60#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:27:12.60#ibcon#first serial, iclass 38, count 0 2006.229.15:27:12.60#ibcon#enter sib2, iclass 38, count 0 2006.229.15:27:12.60#ibcon#flushed, iclass 38, count 0 2006.229.15:27:12.60#ibcon#about to write, iclass 38, count 0 2006.229.15:27:12.60#ibcon#wrote, iclass 38, count 0 2006.229.15:27:12.60#ibcon#about to read 3, iclass 38, count 0 2006.229.15:27:12.62#ibcon#read 3, iclass 38, count 0 2006.229.15:27:12.62#ibcon#about to read 4, iclass 38, count 0 2006.229.15:27:12.62#ibcon#read 4, iclass 38, count 0 2006.229.15:27:12.62#ibcon#about to read 5, iclass 38, count 0 2006.229.15:27:12.62#ibcon#read 5, iclass 38, count 0 2006.229.15:27:12.62#ibcon#about to read 6, iclass 38, count 0 2006.229.15:27:12.62#ibcon#read 6, iclass 38, count 0 2006.229.15:27:12.62#ibcon#end of sib2, iclass 38, count 0 2006.229.15:27:12.62#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:27:12.62#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:27:12.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:27:12.62#ibcon#*before write, iclass 38, count 0 2006.229.15:27:12.62#ibcon#enter sib2, iclass 38, count 0 2006.229.15:27:12.62#ibcon#flushed, iclass 38, count 0 2006.229.15:27:12.62#ibcon#about to write, iclass 38, count 0 2006.229.15:27:12.62#ibcon#wrote, iclass 38, count 0 2006.229.15:27:12.62#ibcon#about to read 3, iclass 38, count 0 2006.229.15:27:12.66#ibcon#read 3, iclass 38, count 0 2006.229.15:27:12.66#ibcon#about to read 4, iclass 38, count 0 2006.229.15:27:12.66#ibcon#read 4, iclass 38, count 0 2006.229.15:27:12.66#ibcon#about to read 5, iclass 38, count 0 2006.229.15:27:12.66#ibcon#read 5, iclass 38, count 0 2006.229.15:27:12.66#ibcon#about to read 6, iclass 38, count 0 2006.229.15:27:12.66#ibcon#read 6, iclass 38, count 0 2006.229.15:27:12.66#ibcon#end of sib2, iclass 38, count 0 2006.229.15:27:12.66#ibcon#*after write, iclass 38, count 0 2006.229.15:27:12.66#ibcon#*before return 0, iclass 38, count 0 2006.229.15:27:12.66#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:12.66#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:12.66#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:27:12.66#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:27:12.66$vck44/va=8,6 2006.229.15:27:12.66#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:27:12.66#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:27:12.66#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:12.66#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:27:12.72#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:27:12.72#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:27:12.72#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:27:12.72#ibcon#first serial, iclass 40, count 2 2006.229.15:27:12.72#ibcon#enter sib2, iclass 40, count 2 2006.229.15:27:12.72#ibcon#flushed, iclass 40, count 2 2006.229.15:27:12.72#ibcon#about to write, iclass 40, count 2 2006.229.15:27:12.72#ibcon#wrote, iclass 40, count 2 2006.229.15:27:12.72#ibcon#about to read 3, iclass 40, count 2 2006.229.15:27:12.74#ibcon#read 3, iclass 40, count 2 2006.229.15:27:12.74#ibcon#about to read 4, iclass 40, count 2 2006.229.15:27:12.74#ibcon#read 4, iclass 40, count 2 2006.229.15:27:12.74#ibcon#about to read 5, iclass 40, count 2 2006.229.15:27:12.74#ibcon#read 5, iclass 40, count 2 2006.229.15:27:12.74#ibcon#about to read 6, iclass 40, count 2 2006.229.15:27:12.74#ibcon#read 6, iclass 40, count 2 2006.229.15:27:12.74#ibcon#end of sib2, iclass 40, count 2 2006.229.15:27:12.74#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:27:12.74#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:27:12.74#ibcon#[25=AT08-06\r\n] 2006.229.15:27:12.74#ibcon#*before write, iclass 40, count 2 2006.229.15:27:12.74#ibcon#enter sib2, iclass 40, count 2 2006.229.15:27:12.74#ibcon#flushed, iclass 40, count 2 2006.229.15:27:12.74#ibcon#about to write, iclass 40, count 2 2006.229.15:27:12.74#ibcon#wrote, iclass 40, count 2 2006.229.15:27:12.74#ibcon#about to read 3, iclass 40, count 2 2006.229.15:27:12.77#ibcon#read 3, iclass 40, count 2 2006.229.15:27:12.77#ibcon#about to read 4, iclass 40, count 2 2006.229.15:27:12.77#ibcon#read 4, iclass 40, count 2 2006.229.15:27:12.77#ibcon#about to read 5, iclass 40, count 2 2006.229.15:27:12.77#ibcon#read 5, iclass 40, count 2 2006.229.15:27:12.77#ibcon#about to read 6, iclass 40, count 2 2006.229.15:27:12.77#ibcon#read 6, iclass 40, count 2 2006.229.15:27:12.77#ibcon#end of sib2, iclass 40, count 2 2006.229.15:27:12.77#ibcon#*after write, iclass 40, count 2 2006.229.15:27:12.77#ibcon#*before return 0, iclass 40, count 2 2006.229.15:27:12.77#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:27:12.77#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:27:12.77#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:27:12.77#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:12.77#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:27:12.89#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:27:12.89#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:27:12.89#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:27:12.89#ibcon#first serial, iclass 40, count 0 2006.229.15:27:12.89#ibcon#enter sib2, iclass 40, count 0 2006.229.15:27:12.89#ibcon#flushed, iclass 40, count 0 2006.229.15:27:12.89#ibcon#about to write, iclass 40, count 0 2006.229.15:27:12.89#ibcon#wrote, iclass 40, count 0 2006.229.15:27:12.89#ibcon#about to read 3, iclass 40, count 0 2006.229.15:27:12.91#ibcon#read 3, iclass 40, count 0 2006.229.15:27:12.91#ibcon#about to read 4, iclass 40, count 0 2006.229.15:27:12.91#ibcon#read 4, iclass 40, count 0 2006.229.15:27:12.91#ibcon#about to read 5, iclass 40, count 0 2006.229.15:27:12.91#ibcon#read 5, iclass 40, count 0 2006.229.15:27:12.91#ibcon#about to read 6, iclass 40, count 0 2006.229.15:27:12.91#ibcon#read 6, iclass 40, count 0 2006.229.15:27:12.91#ibcon#end of sib2, iclass 40, count 0 2006.229.15:27:12.91#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:27:12.91#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:27:12.91#ibcon#[25=USB\r\n] 2006.229.15:27:12.91#ibcon#*before write, iclass 40, count 0 2006.229.15:27:12.91#ibcon#enter sib2, iclass 40, count 0 2006.229.15:27:12.91#ibcon#flushed, iclass 40, count 0 2006.229.15:27:12.91#ibcon#about to write, iclass 40, count 0 2006.229.15:27:12.91#ibcon#wrote, iclass 40, count 0 2006.229.15:27:12.91#ibcon#about to read 3, iclass 40, count 0 2006.229.15:27:12.94#ibcon#read 3, iclass 40, count 0 2006.229.15:27:12.94#ibcon#about to read 4, iclass 40, count 0 2006.229.15:27:12.94#ibcon#read 4, iclass 40, count 0 2006.229.15:27:12.94#ibcon#about to read 5, iclass 40, count 0 2006.229.15:27:12.94#ibcon#read 5, iclass 40, count 0 2006.229.15:27:12.94#ibcon#about to read 6, iclass 40, count 0 2006.229.15:27:12.94#ibcon#read 6, iclass 40, count 0 2006.229.15:27:12.94#ibcon#end of sib2, iclass 40, count 0 2006.229.15:27:12.94#ibcon#*after write, iclass 40, count 0 2006.229.15:27:12.94#ibcon#*before return 0, iclass 40, count 0 2006.229.15:27:12.94#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:27:12.94#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:27:12.94#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:27:12.94#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:27:12.94$vck44/vblo=1,629.99 2006.229.15:27:12.94#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:27:12.94#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:27:12.94#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:12.94#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:27:12.94#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:27:12.94#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:27:12.94#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:27:12.94#ibcon#first serial, iclass 4, count 0 2006.229.15:27:12.94#ibcon#enter sib2, iclass 4, count 0 2006.229.15:27:12.94#ibcon#flushed, iclass 4, count 0 2006.229.15:27:12.94#ibcon#about to write, iclass 4, count 0 2006.229.15:27:12.94#ibcon#wrote, iclass 4, count 0 2006.229.15:27:12.94#ibcon#about to read 3, iclass 4, count 0 2006.229.15:27:12.96#ibcon#read 3, iclass 4, count 0 2006.229.15:27:12.96#ibcon#about to read 4, iclass 4, count 0 2006.229.15:27:12.96#ibcon#read 4, iclass 4, count 0 2006.229.15:27:12.96#ibcon#about to read 5, iclass 4, count 0 2006.229.15:27:12.96#ibcon#read 5, iclass 4, count 0 2006.229.15:27:12.96#ibcon#about to read 6, iclass 4, count 0 2006.229.15:27:12.96#ibcon#read 6, iclass 4, count 0 2006.229.15:27:12.96#ibcon#end of sib2, iclass 4, count 0 2006.229.15:27:12.96#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:27:12.96#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:27:12.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:27:12.96#ibcon#*before write, iclass 4, count 0 2006.229.15:27:12.96#ibcon#enter sib2, iclass 4, count 0 2006.229.15:27:12.96#ibcon#flushed, iclass 4, count 0 2006.229.15:27:12.96#ibcon#about to write, iclass 4, count 0 2006.229.15:27:12.96#ibcon#wrote, iclass 4, count 0 2006.229.15:27:12.96#ibcon#about to read 3, iclass 4, count 0 2006.229.15:27:13.00#ibcon#read 3, iclass 4, count 0 2006.229.15:27:13.00#ibcon#about to read 4, iclass 4, count 0 2006.229.15:27:13.00#ibcon#read 4, iclass 4, count 0 2006.229.15:27:13.00#ibcon#about to read 5, iclass 4, count 0 2006.229.15:27:13.00#ibcon#read 5, iclass 4, count 0 2006.229.15:27:13.00#ibcon#about to read 6, iclass 4, count 0 2006.229.15:27:13.00#ibcon#read 6, iclass 4, count 0 2006.229.15:27:13.00#ibcon#end of sib2, iclass 4, count 0 2006.229.15:27:13.00#ibcon#*after write, iclass 4, count 0 2006.229.15:27:13.00#ibcon#*before return 0, iclass 4, count 0 2006.229.15:27:13.00#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:27:13.00#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:27:13.00#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:27:13.00#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:27:13.00$vck44/vb=1,4 2006.229.15:27:13.00#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:27:13.00#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:27:13.00#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:13.00#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:27:13.00#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:27:13.00#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:27:13.00#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:27:13.00#ibcon#first serial, iclass 6, count 2 2006.229.15:27:13.00#ibcon#enter sib2, iclass 6, count 2 2006.229.15:27:13.00#ibcon#flushed, iclass 6, count 2 2006.229.15:27:13.00#ibcon#about to write, iclass 6, count 2 2006.229.15:27:13.00#ibcon#wrote, iclass 6, count 2 2006.229.15:27:13.00#ibcon#about to read 3, iclass 6, count 2 2006.229.15:27:13.02#ibcon#read 3, iclass 6, count 2 2006.229.15:27:13.02#ibcon#about to read 4, iclass 6, count 2 2006.229.15:27:13.02#ibcon#read 4, iclass 6, count 2 2006.229.15:27:13.02#ibcon#about to read 5, iclass 6, count 2 2006.229.15:27:13.02#ibcon#read 5, iclass 6, count 2 2006.229.15:27:13.02#ibcon#about to read 6, iclass 6, count 2 2006.229.15:27:13.02#ibcon#read 6, iclass 6, count 2 2006.229.15:27:13.02#ibcon#end of sib2, iclass 6, count 2 2006.229.15:27:13.02#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:27:13.02#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:27:13.02#ibcon#[27=AT01-04\r\n] 2006.229.15:27:13.02#ibcon#*before write, iclass 6, count 2 2006.229.15:27:13.02#ibcon#enter sib2, iclass 6, count 2 2006.229.15:27:13.02#ibcon#flushed, iclass 6, count 2 2006.229.15:27:13.02#ibcon#about to write, iclass 6, count 2 2006.229.15:27:13.02#ibcon#wrote, iclass 6, count 2 2006.229.15:27:13.02#ibcon#about to read 3, iclass 6, count 2 2006.229.15:27:13.05#ibcon#read 3, iclass 6, count 2 2006.229.15:27:13.05#ibcon#about to read 4, iclass 6, count 2 2006.229.15:27:13.05#ibcon#read 4, iclass 6, count 2 2006.229.15:27:13.05#ibcon#about to read 5, iclass 6, count 2 2006.229.15:27:13.05#ibcon#read 5, iclass 6, count 2 2006.229.15:27:13.05#ibcon#about to read 6, iclass 6, count 2 2006.229.15:27:13.05#ibcon#read 6, iclass 6, count 2 2006.229.15:27:13.05#ibcon#end of sib2, iclass 6, count 2 2006.229.15:27:13.05#ibcon#*after write, iclass 6, count 2 2006.229.15:27:13.05#ibcon#*before return 0, iclass 6, count 2 2006.229.15:27:13.05#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:27:13.05#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:27:13.05#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:27:13.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:13.05#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:27:13.17#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:27:13.17#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:27:13.17#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:27:13.17#ibcon#first serial, iclass 6, count 0 2006.229.15:27:13.17#ibcon#enter sib2, iclass 6, count 0 2006.229.15:27:13.17#ibcon#flushed, iclass 6, count 0 2006.229.15:27:13.17#ibcon#about to write, iclass 6, count 0 2006.229.15:27:13.17#ibcon#wrote, iclass 6, count 0 2006.229.15:27:13.17#ibcon#about to read 3, iclass 6, count 0 2006.229.15:27:13.19#ibcon#read 3, iclass 6, count 0 2006.229.15:27:13.19#ibcon#about to read 4, iclass 6, count 0 2006.229.15:27:13.19#ibcon#read 4, iclass 6, count 0 2006.229.15:27:13.19#ibcon#about to read 5, iclass 6, count 0 2006.229.15:27:13.19#ibcon#read 5, iclass 6, count 0 2006.229.15:27:13.19#ibcon#about to read 6, iclass 6, count 0 2006.229.15:27:13.19#ibcon#read 6, iclass 6, count 0 2006.229.15:27:13.19#ibcon#end of sib2, iclass 6, count 0 2006.229.15:27:13.19#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:27:13.19#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:27:13.19#ibcon#[27=USB\r\n] 2006.229.15:27:13.19#ibcon#*before write, iclass 6, count 0 2006.229.15:27:13.19#ibcon#enter sib2, iclass 6, count 0 2006.229.15:27:13.19#ibcon#flushed, iclass 6, count 0 2006.229.15:27:13.19#ibcon#about to write, iclass 6, count 0 2006.229.15:27:13.19#ibcon#wrote, iclass 6, count 0 2006.229.15:27:13.19#ibcon#about to read 3, iclass 6, count 0 2006.229.15:27:13.22#ibcon#read 3, iclass 6, count 0 2006.229.15:27:13.22#ibcon#about to read 4, iclass 6, count 0 2006.229.15:27:13.22#ibcon#read 4, iclass 6, count 0 2006.229.15:27:13.22#ibcon#about to read 5, iclass 6, count 0 2006.229.15:27:13.22#ibcon#read 5, iclass 6, count 0 2006.229.15:27:13.22#ibcon#about to read 6, iclass 6, count 0 2006.229.15:27:13.22#ibcon#read 6, iclass 6, count 0 2006.229.15:27:13.22#ibcon#end of sib2, iclass 6, count 0 2006.229.15:27:13.22#ibcon#*after write, iclass 6, count 0 2006.229.15:27:13.22#ibcon#*before return 0, iclass 6, count 0 2006.229.15:27:13.22#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:27:13.22#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:27:13.22#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:27:13.22#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:27:13.22$vck44/vblo=2,634.99 2006.229.15:27:13.22#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:27:13.22#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:27:13.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:13.22#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:13.22#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:13.22#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:13.22#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:27:13.22#ibcon#first serial, iclass 10, count 0 2006.229.15:27:13.22#ibcon#enter sib2, iclass 10, count 0 2006.229.15:27:13.22#ibcon#flushed, iclass 10, count 0 2006.229.15:27:13.22#ibcon#about to write, iclass 10, count 0 2006.229.15:27:13.22#ibcon#wrote, iclass 10, count 0 2006.229.15:27:13.22#ibcon#about to read 3, iclass 10, count 0 2006.229.15:27:13.24#ibcon#read 3, iclass 10, count 0 2006.229.15:27:13.24#ibcon#about to read 4, iclass 10, count 0 2006.229.15:27:13.24#ibcon#read 4, iclass 10, count 0 2006.229.15:27:13.24#ibcon#about to read 5, iclass 10, count 0 2006.229.15:27:13.24#ibcon#read 5, iclass 10, count 0 2006.229.15:27:13.24#ibcon#about to read 6, iclass 10, count 0 2006.229.15:27:13.24#ibcon#read 6, iclass 10, count 0 2006.229.15:27:13.24#ibcon#end of sib2, iclass 10, count 0 2006.229.15:27:13.24#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:27:13.24#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:27:13.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:27:13.24#ibcon#*before write, iclass 10, count 0 2006.229.15:27:13.24#ibcon#enter sib2, iclass 10, count 0 2006.229.15:27:13.24#ibcon#flushed, iclass 10, count 0 2006.229.15:27:13.24#ibcon#about to write, iclass 10, count 0 2006.229.15:27:13.24#ibcon#wrote, iclass 10, count 0 2006.229.15:27:13.24#ibcon#about to read 3, iclass 10, count 0 2006.229.15:27:13.28#ibcon#read 3, iclass 10, count 0 2006.229.15:27:13.28#ibcon#about to read 4, iclass 10, count 0 2006.229.15:27:13.28#ibcon#read 4, iclass 10, count 0 2006.229.15:27:13.28#ibcon#about to read 5, iclass 10, count 0 2006.229.15:27:13.28#ibcon#read 5, iclass 10, count 0 2006.229.15:27:13.28#ibcon#about to read 6, iclass 10, count 0 2006.229.15:27:13.28#ibcon#read 6, iclass 10, count 0 2006.229.15:27:13.28#ibcon#end of sib2, iclass 10, count 0 2006.229.15:27:13.28#ibcon#*after write, iclass 10, count 0 2006.229.15:27:13.28#ibcon#*before return 0, iclass 10, count 0 2006.229.15:27:13.28#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:13.28#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:27:13.28#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:27:13.28#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:27:13.28$vck44/vb=2,4 2006.229.15:27:13.28#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:27:13.28#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:27:13.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:13.28#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:13.34#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:13.34#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:13.34#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:27:13.34#ibcon#first serial, iclass 12, count 2 2006.229.15:27:13.34#ibcon#enter sib2, iclass 12, count 2 2006.229.15:27:13.34#ibcon#flushed, iclass 12, count 2 2006.229.15:27:13.34#ibcon#about to write, iclass 12, count 2 2006.229.15:27:13.34#ibcon#wrote, iclass 12, count 2 2006.229.15:27:13.34#ibcon#about to read 3, iclass 12, count 2 2006.229.15:27:13.36#ibcon#read 3, iclass 12, count 2 2006.229.15:27:13.36#ibcon#about to read 4, iclass 12, count 2 2006.229.15:27:13.36#ibcon#read 4, iclass 12, count 2 2006.229.15:27:13.36#ibcon#about to read 5, iclass 12, count 2 2006.229.15:27:13.36#ibcon#read 5, iclass 12, count 2 2006.229.15:27:13.36#ibcon#about to read 6, iclass 12, count 2 2006.229.15:27:13.36#ibcon#read 6, iclass 12, count 2 2006.229.15:27:13.36#ibcon#end of sib2, iclass 12, count 2 2006.229.15:27:13.36#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:27:13.36#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:27:13.36#ibcon#[27=AT02-04\r\n] 2006.229.15:27:13.36#ibcon#*before write, iclass 12, count 2 2006.229.15:27:13.36#ibcon#enter sib2, iclass 12, count 2 2006.229.15:27:13.36#ibcon#flushed, iclass 12, count 2 2006.229.15:27:13.36#ibcon#about to write, iclass 12, count 2 2006.229.15:27:13.36#ibcon#wrote, iclass 12, count 2 2006.229.15:27:13.36#ibcon#about to read 3, iclass 12, count 2 2006.229.15:27:13.39#ibcon#read 3, iclass 12, count 2 2006.229.15:27:13.39#ibcon#about to read 4, iclass 12, count 2 2006.229.15:27:13.39#ibcon#read 4, iclass 12, count 2 2006.229.15:27:13.39#ibcon#about to read 5, iclass 12, count 2 2006.229.15:27:13.39#ibcon#read 5, iclass 12, count 2 2006.229.15:27:13.39#ibcon#about to read 6, iclass 12, count 2 2006.229.15:27:13.39#ibcon#read 6, iclass 12, count 2 2006.229.15:27:13.39#ibcon#end of sib2, iclass 12, count 2 2006.229.15:27:13.39#ibcon#*after write, iclass 12, count 2 2006.229.15:27:13.39#ibcon#*before return 0, iclass 12, count 2 2006.229.15:27:13.39#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:13.39#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:27:13.39#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:27:13.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:13.39#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:13.51#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:13.51#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:13.51#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:27:13.51#ibcon#first serial, iclass 12, count 0 2006.229.15:27:13.51#ibcon#enter sib2, iclass 12, count 0 2006.229.15:27:13.51#ibcon#flushed, iclass 12, count 0 2006.229.15:27:13.51#ibcon#about to write, iclass 12, count 0 2006.229.15:27:13.51#ibcon#wrote, iclass 12, count 0 2006.229.15:27:13.51#ibcon#about to read 3, iclass 12, count 0 2006.229.15:27:13.53#ibcon#read 3, iclass 12, count 0 2006.229.15:27:13.53#ibcon#about to read 4, iclass 12, count 0 2006.229.15:27:13.53#ibcon#read 4, iclass 12, count 0 2006.229.15:27:13.53#ibcon#about to read 5, iclass 12, count 0 2006.229.15:27:13.53#ibcon#read 5, iclass 12, count 0 2006.229.15:27:13.53#ibcon#about to read 6, iclass 12, count 0 2006.229.15:27:13.53#ibcon#read 6, iclass 12, count 0 2006.229.15:27:13.53#ibcon#end of sib2, iclass 12, count 0 2006.229.15:27:13.53#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:27:13.53#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:27:13.53#ibcon#[27=USB\r\n] 2006.229.15:27:13.53#ibcon#*before write, iclass 12, count 0 2006.229.15:27:13.53#ibcon#enter sib2, iclass 12, count 0 2006.229.15:27:13.53#ibcon#flushed, iclass 12, count 0 2006.229.15:27:13.53#ibcon#about to write, iclass 12, count 0 2006.229.15:27:13.53#ibcon#wrote, iclass 12, count 0 2006.229.15:27:13.53#ibcon#about to read 3, iclass 12, count 0 2006.229.15:27:13.56#ibcon#read 3, iclass 12, count 0 2006.229.15:27:13.56#ibcon#about to read 4, iclass 12, count 0 2006.229.15:27:13.56#ibcon#read 4, iclass 12, count 0 2006.229.15:27:13.56#ibcon#about to read 5, iclass 12, count 0 2006.229.15:27:13.56#ibcon#read 5, iclass 12, count 0 2006.229.15:27:13.56#ibcon#about to read 6, iclass 12, count 0 2006.229.15:27:13.56#ibcon#read 6, iclass 12, count 0 2006.229.15:27:13.56#ibcon#end of sib2, iclass 12, count 0 2006.229.15:27:13.56#ibcon#*after write, iclass 12, count 0 2006.229.15:27:13.56#ibcon#*before return 0, iclass 12, count 0 2006.229.15:27:13.56#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:13.56#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:27:13.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:27:13.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:27:13.56$vck44/vblo=3,649.99 2006.229.15:27:13.56#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:27:13.56#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:27:13.56#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:13.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:13.56#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:13.56#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:13.56#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:27:13.56#ibcon#first serial, iclass 14, count 0 2006.229.15:27:13.56#ibcon#enter sib2, iclass 14, count 0 2006.229.15:27:13.56#ibcon#flushed, iclass 14, count 0 2006.229.15:27:13.56#ibcon#about to write, iclass 14, count 0 2006.229.15:27:13.56#ibcon#wrote, iclass 14, count 0 2006.229.15:27:13.56#ibcon#about to read 3, iclass 14, count 0 2006.229.15:27:13.58#ibcon#read 3, iclass 14, count 0 2006.229.15:27:13.58#ibcon#about to read 4, iclass 14, count 0 2006.229.15:27:13.58#ibcon#read 4, iclass 14, count 0 2006.229.15:27:13.58#ibcon#about to read 5, iclass 14, count 0 2006.229.15:27:13.58#ibcon#read 5, iclass 14, count 0 2006.229.15:27:13.58#ibcon#about to read 6, iclass 14, count 0 2006.229.15:27:13.58#ibcon#read 6, iclass 14, count 0 2006.229.15:27:13.58#ibcon#end of sib2, iclass 14, count 0 2006.229.15:27:13.58#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:27:13.58#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:27:13.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:27:13.58#ibcon#*before write, iclass 14, count 0 2006.229.15:27:13.58#ibcon#enter sib2, iclass 14, count 0 2006.229.15:27:13.58#ibcon#flushed, iclass 14, count 0 2006.229.15:27:13.58#ibcon#about to write, iclass 14, count 0 2006.229.15:27:13.58#ibcon#wrote, iclass 14, count 0 2006.229.15:27:13.58#ibcon#about to read 3, iclass 14, count 0 2006.229.15:27:13.62#ibcon#read 3, iclass 14, count 0 2006.229.15:27:13.62#ibcon#about to read 4, iclass 14, count 0 2006.229.15:27:13.62#ibcon#read 4, iclass 14, count 0 2006.229.15:27:13.62#ibcon#about to read 5, iclass 14, count 0 2006.229.15:27:13.62#ibcon#read 5, iclass 14, count 0 2006.229.15:27:13.62#ibcon#about to read 6, iclass 14, count 0 2006.229.15:27:13.62#ibcon#read 6, iclass 14, count 0 2006.229.15:27:13.62#ibcon#end of sib2, iclass 14, count 0 2006.229.15:27:13.62#ibcon#*after write, iclass 14, count 0 2006.229.15:27:13.62#ibcon#*before return 0, iclass 14, count 0 2006.229.15:27:13.62#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:13.62#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:27:13.62#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:27:13.62#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:27:13.62$vck44/vb=3,4 2006.229.15:27:13.62#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:27:13.62#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:27:13.62#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:13.62#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:13.68#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:13.68#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:13.68#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:27:13.68#ibcon#first serial, iclass 16, count 2 2006.229.15:27:13.68#ibcon#enter sib2, iclass 16, count 2 2006.229.15:27:13.68#ibcon#flushed, iclass 16, count 2 2006.229.15:27:13.68#ibcon#about to write, iclass 16, count 2 2006.229.15:27:13.68#ibcon#wrote, iclass 16, count 2 2006.229.15:27:13.68#ibcon#about to read 3, iclass 16, count 2 2006.229.15:27:13.70#ibcon#read 3, iclass 16, count 2 2006.229.15:27:13.70#ibcon#about to read 4, iclass 16, count 2 2006.229.15:27:13.70#ibcon#read 4, iclass 16, count 2 2006.229.15:27:13.70#ibcon#about to read 5, iclass 16, count 2 2006.229.15:27:13.70#ibcon#read 5, iclass 16, count 2 2006.229.15:27:13.70#ibcon#about to read 6, iclass 16, count 2 2006.229.15:27:13.70#ibcon#read 6, iclass 16, count 2 2006.229.15:27:13.70#ibcon#end of sib2, iclass 16, count 2 2006.229.15:27:13.70#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:27:13.70#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:27:13.70#ibcon#[27=AT03-04\r\n] 2006.229.15:27:13.70#ibcon#*before write, iclass 16, count 2 2006.229.15:27:13.70#ibcon#enter sib2, iclass 16, count 2 2006.229.15:27:13.70#ibcon#flushed, iclass 16, count 2 2006.229.15:27:13.70#ibcon#about to write, iclass 16, count 2 2006.229.15:27:13.70#ibcon#wrote, iclass 16, count 2 2006.229.15:27:13.70#ibcon#about to read 3, iclass 16, count 2 2006.229.15:27:13.73#ibcon#read 3, iclass 16, count 2 2006.229.15:27:13.73#ibcon#about to read 4, iclass 16, count 2 2006.229.15:27:13.73#ibcon#read 4, iclass 16, count 2 2006.229.15:27:13.73#ibcon#about to read 5, iclass 16, count 2 2006.229.15:27:13.73#ibcon#read 5, iclass 16, count 2 2006.229.15:27:13.73#ibcon#about to read 6, iclass 16, count 2 2006.229.15:27:13.73#ibcon#read 6, iclass 16, count 2 2006.229.15:27:13.73#ibcon#end of sib2, iclass 16, count 2 2006.229.15:27:13.73#ibcon#*after write, iclass 16, count 2 2006.229.15:27:13.73#ibcon#*before return 0, iclass 16, count 2 2006.229.15:27:13.73#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:13.73#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:27:13.73#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:27:13.73#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:13.73#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:13.85#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:13.85#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:13.85#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:27:13.85#ibcon#first serial, iclass 16, count 0 2006.229.15:27:13.85#ibcon#enter sib2, iclass 16, count 0 2006.229.15:27:13.85#ibcon#flushed, iclass 16, count 0 2006.229.15:27:13.85#ibcon#about to write, iclass 16, count 0 2006.229.15:27:13.85#ibcon#wrote, iclass 16, count 0 2006.229.15:27:13.85#ibcon#about to read 3, iclass 16, count 0 2006.229.15:27:13.87#ibcon#read 3, iclass 16, count 0 2006.229.15:27:13.87#ibcon#about to read 4, iclass 16, count 0 2006.229.15:27:13.87#ibcon#read 4, iclass 16, count 0 2006.229.15:27:13.87#ibcon#about to read 5, iclass 16, count 0 2006.229.15:27:13.87#ibcon#read 5, iclass 16, count 0 2006.229.15:27:13.87#ibcon#about to read 6, iclass 16, count 0 2006.229.15:27:13.87#ibcon#read 6, iclass 16, count 0 2006.229.15:27:13.87#ibcon#end of sib2, iclass 16, count 0 2006.229.15:27:13.87#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:27:13.87#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:27:13.87#ibcon#[27=USB\r\n] 2006.229.15:27:13.87#ibcon#*before write, iclass 16, count 0 2006.229.15:27:13.87#ibcon#enter sib2, iclass 16, count 0 2006.229.15:27:13.87#ibcon#flushed, iclass 16, count 0 2006.229.15:27:13.87#ibcon#about to write, iclass 16, count 0 2006.229.15:27:13.87#ibcon#wrote, iclass 16, count 0 2006.229.15:27:13.87#ibcon#about to read 3, iclass 16, count 0 2006.229.15:27:13.90#ibcon#read 3, iclass 16, count 0 2006.229.15:27:13.90#ibcon#about to read 4, iclass 16, count 0 2006.229.15:27:13.90#ibcon#read 4, iclass 16, count 0 2006.229.15:27:13.90#ibcon#about to read 5, iclass 16, count 0 2006.229.15:27:13.90#ibcon#read 5, iclass 16, count 0 2006.229.15:27:13.90#ibcon#about to read 6, iclass 16, count 0 2006.229.15:27:13.90#ibcon#read 6, iclass 16, count 0 2006.229.15:27:13.90#ibcon#end of sib2, iclass 16, count 0 2006.229.15:27:13.90#ibcon#*after write, iclass 16, count 0 2006.229.15:27:13.90#ibcon#*before return 0, iclass 16, count 0 2006.229.15:27:13.90#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:13.90#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:27:13.90#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:27:13.90#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:27:13.90$vck44/vblo=4,679.99 2006.229.15:27:13.90#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:27:13.90#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:27:13.90#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:13.90#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:13.90#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:13.90#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:13.90#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:27:13.90#ibcon#first serial, iclass 18, count 0 2006.229.15:27:13.90#ibcon#enter sib2, iclass 18, count 0 2006.229.15:27:13.90#ibcon#flushed, iclass 18, count 0 2006.229.15:27:13.90#ibcon#about to write, iclass 18, count 0 2006.229.15:27:13.90#ibcon#wrote, iclass 18, count 0 2006.229.15:27:13.90#ibcon#about to read 3, iclass 18, count 0 2006.229.15:27:13.92#ibcon#read 3, iclass 18, count 0 2006.229.15:27:13.92#ibcon#about to read 4, iclass 18, count 0 2006.229.15:27:13.92#ibcon#read 4, iclass 18, count 0 2006.229.15:27:13.92#ibcon#about to read 5, iclass 18, count 0 2006.229.15:27:13.92#ibcon#read 5, iclass 18, count 0 2006.229.15:27:13.92#ibcon#about to read 6, iclass 18, count 0 2006.229.15:27:13.92#ibcon#read 6, iclass 18, count 0 2006.229.15:27:13.92#ibcon#end of sib2, iclass 18, count 0 2006.229.15:27:13.92#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:27:13.92#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:27:13.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:27:13.92#ibcon#*before write, iclass 18, count 0 2006.229.15:27:13.92#ibcon#enter sib2, iclass 18, count 0 2006.229.15:27:13.92#ibcon#flushed, iclass 18, count 0 2006.229.15:27:13.92#ibcon#about to write, iclass 18, count 0 2006.229.15:27:13.92#ibcon#wrote, iclass 18, count 0 2006.229.15:27:13.92#ibcon#about to read 3, iclass 18, count 0 2006.229.15:27:13.96#ibcon#read 3, iclass 18, count 0 2006.229.15:27:13.96#ibcon#about to read 4, iclass 18, count 0 2006.229.15:27:13.96#ibcon#read 4, iclass 18, count 0 2006.229.15:27:13.96#ibcon#about to read 5, iclass 18, count 0 2006.229.15:27:13.96#ibcon#read 5, iclass 18, count 0 2006.229.15:27:13.96#ibcon#about to read 6, iclass 18, count 0 2006.229.15:27:13.96#ibcon#read 6, iclass 18, count 0 2006.229.15:27:13.96#ibcon#end of sib2, iclass 18, count 0 2006.229.15:27:13.96#ibcon#*after write, iclass 18, count 0 2006.229.15:27:13.96#ibcon#*before return 0, iclass 18, count 0 2006.229.15:27:13.96#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:13.96#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:27:13.96#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:27:13.96#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:27:13.96$vck44/vb=4,4 2006.229.15:27:13.96#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:27:13.96#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:27:13.96#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:13.96#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:14.02#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:14.02#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:14.02#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:27:14.02#ibcon#first serial, iclass 20, count 2 2006.229.15:27:14.02#ibcon#enter sib2, iclass 20, count 2 2006.229.15:27:14.02#ibcon#flushed, iclass 20, count 2 2006.229.15:27:14.02#ibcon#about to write, iclass 20, count 2 2006.229.15:27:14.02#ibcon#wrote, iclass 20, count 2 2006.229.15:27:14.02#ibcon#about to read 3, iclass 20, count 2 2006.229.15:27:14.04#ibcon#read 3, iclass 20, count 2 2006.229.15:27:14.04#ibcon#about to read 4, iclass 20, count 2 2006.229.15:27:14.04#ibcon#read 4, iclass 20, count 2 2006.229.15:27:14.04#ibcon#about to read 5, iclass 20, count 2 2006.229.15:27:14.04#ibcon#read 5, iclass 20, count 2 2006.229.15:27:14.04#ibcon#about to read 6, iclass 20, count 2 2006.229.15:27:14.04#ibcon#read 6, iclass 20, count 2 2006.229.15:27:14.04#ibcon#end of sib2, iclass 20, count 2 2006.229.15:27:14.04#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:27:14.04#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:27:14.04#ibcon#[27=AT04-04\r\n] 2006.229.15:27:14.04#ibcon#*before write, iclass 20, count 2 2006.229.15:27:14.04#ibcon#enter sib2, iclass 20, count 2 2006.229.15:27:14.04#ibcon#flushed, iclass 20, count 2 2006.229.15:27:14.04#ibcon#about to write, iclass 20, count 2 2006.229.15:27:14.04#ibcon#wrote, iclass 20, count 2 2006.229.15:27:14.04#ibcon#about to read 3, iclass 20, count 2 2006.229.15:27:14.07#ibcon#read 3, iclass 20, count 2 2006.229.15:27:14.07#ibcon#about to read 4, iclass 20, count 2 2006.229.15:27:14.07#ibcon#read 4, iclass 20, count 2 2006.229.15:27:14.07#ibcon#about to read 5, iclass 20, count 2 2006.229.15:27:14.07#ibcon#read 5, iclass 20, count 2 2006.229.15:27:14.07#ibcon#about to read 6, iclass 20, count 2 2006.229.15:27:14.07#ibcon#read 6, iclass 20, count 2 2006.229.15:27:14.07#ibcon#end of sib2, iclass 20, count 2 2006.229.15:27:14.07#ibcon#*after write, iclass 20, count 2 2006.229.15:27:14.07#ibcon#*before return 0, iclass 20, count 2 2006.229.15:27:14.07#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:14.07#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:27:14.07#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:27:14.07#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:14.07#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:14.19#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:14.19#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:14.19#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:27:14.19#ibcon#first serial, iclass 20, count 0 2006.229.15:27:14.19#ibcon#enter sib2, iclass 20, count 0 2006.229.15:27:14.19#ibcon#flushed, iclass 20, count 0 2006.229.15:27:14.19#ibcon#about to write, iclass 20, count 0 2006.229.15:27:14.19#ibcon#wrote, iclass 20, count 0 2006.229.15:27:14.19#ibcon#about to read 3, iclass 20, count 0 2006.229.15:27:14.21#ibcon#read 3, iclass 20, count 0 2006.229.15:27:14.21#ibcon#about to read 4, iclass 20, count 0 2006.229.15:27:14.21#ibcon#read 4, iclass 20, count 0 2006.229.15:27:14.21#ibcon#about to read 5, iclass 20, count 0 2006.229.15:27:14.21#ibcon#read 5, iclass 20, count 0 2006.229.15:27:14.21#ibcon#about to read 6, iclass 20, count 0 2006.229.15:27:14.21#ibcon#read 6, iclass 20, count 0 2006.229.15:27:14.21#ibcon#end of sib2, iclass 20, count 0 2006.229.15:27:14.21#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:27:14.21#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:27:14.21#ibcon#[27=USB\r\n] 2006.229.15:27:14.21#ibcon#*before write, iclass 20, count 0 2006.229.15:27:14.21#ibcon#enter sib2, iclass 20, count 0 2006.229.15:27:14.21#ibcon#flushed, iclass 20, count 0 2006.229.15:27:14.21#ibcon#about to write, iclass 20, count 0 2006.229.15:27:14.21#ibcon#wrote, iclass 20, count 0 2006.229.15:27:14.21#ibcon#about to read 3, iclass 20, count 0 2006.229.15:27:14.24#ibcon#read 3, iclass 20, count 0 2006.229.15:27:14.24#ibcon#about to read 4, iclass 20, count 0 2006.229.15:27:14.24#ibcon#read 4, iclass 20, count 0 2006.229.15:27:14.24#ibcon#about to read 5, iclass 20, count 0 2006.229.15:27:14.24#ibcon#read 5, iclass 20, count 0 2006.229.15:27:14.24#ibcon#about to read 6, iclass 20, count 0 2006.229.15:27:14.24#ibcon#read 6, iclass 20, count 0 2006.229.15:27:14.24#ibcon#end of sib2, iclass 20, count 0 2006.229.15:27:14.24#ibcon#*after write, iclass 20, count 0 2006.229.15:27:14.24#ibcon#*before return 0, iclass 20, count 0 2006.229.15:27:14.24#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:14.24#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:27:14.24#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:27:14.24#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:27:14.24$vck44/vblo=5,709.99 2006.229.15:27:14.24#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:27:14.24#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:27:14.24#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:14.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:14.24#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:14.24#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:14.24#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:27:14.24#ibcon#first serial, iclass 22, count 0 2006.229.15:27:14.24#ibcon#enter sib2, iclass 22, count 0 2006.229.15:27:14.24#ibcon#flushed, iclass 22, count 0 2006.229.15:27:14.24#ibcon#about to write, iclass 22, count 0 2006.229.15:27:14.24#ibcon#wrote, iclass 22, count 0 2006.229.15:27:14.24#ibcon#about to read 3, iclass 22, count 0 2006.229.15:27:14.26#ibcon#read 3, iclass 22, count 0 2006.229.15:27:14.26#ibcon#about to read 4, iclass 22, count 0 2006.229.15:27:14.26#ibcon#read 4, iclass 22, count 0 2006.229.15:27:14.26#ibcon#about to read 5, iclass 22, count 0 2006.229.15:27:14.26#ibcon#read 5, iclass 22, count 0 2006.229.15:27:14.26#ibcon#about to read 6, iclass 22, count 0 2006.229.15:27:14.26#ibcon#read 6, iclass 22, count 0 2006.229.15:27:14.26#ibcon#end of sib2, iclass 22, count 0 2006.229.15:27:14.26#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:27:14.26#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:27:14.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:27:14.26#ibcon#*before write, iclass 22, count 0 2006.229.15:27:14.26#ibcon#enter sib2, iclass 22, count 0 2006.229.15:27:14.26#ibcon#flushed, iclass 22, count 0 2006.229.15:27:14.26#ibcon#about to write, iclass 22, count 0 2006.229.15:27:14.26#ibcon#wrote, iclass 22, count 0 2006.229.15:27:14.26#ibcon#about to read 3, iclass 22, count 0 2006.229.15:27:14.30#ibcon#read 3, iclass 22, count 0 2006.229.15:27:14.30#ibcon#about to read 4, iclass 22, count 0 2006.229.15:27:14.30#ibcon#read 4, iclass 22, count 0 2006.229.15:27:14.30#ibcon#about to read 5, iclass 22, count 0 2006.229.15:27:14.30#ibcon#read 5, iclass 22, count 0 2006.229.15:27:14.30#ibcon#about to read 6, iclass 22, count 0 2006.229.15:27:14.30#ibcon#read 6, iclass 22, count 0 2006.229.15:27:14.30#ibcon#end of sib2, iclass 22, count 0 2006.229.15:27:14.30#ibcon#*after write, iclass 22, count 0 2006.229.15:27:14.30#ibcon#*before return 0, iclass 22, count 0 2006.229.15:27:14.30#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:14.30#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:27:14.30#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:27:14.30#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:27:14.30$vck44/vb=5,4 2006.229.15:27:14.30#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.15:27:14.30#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.15:27:14.30#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:14.30#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:14.36#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:14.36#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:14.36#ibcon#enter wrdev, iclass 24, count 2 2006.229.15:27:14.36#ibcon#first serial, iclass 24, count 2 2006.229.15:27:14.36#ibcon#enter sib2, iclass 24, count 2 2006.229.15:27:14.36#ibcon#flushed, iclass 24, count 2 2006.229.15:27:14.36#ibcon#about to write, iclass 24, count 2 2006.229.15:27:14.36#ibcon#wrote, iclass 24, count 2 2006.229.15:27:14.36#ibcon#about to read 3, iclass 24, count 2 2006.229.15:27:14.38#ibcon#read 3, iclass 24, count 2 2006.229.15:27:14.38#ibcon#about to read 4, iclass 24, count 2 2006.229.15:27:14.38#ibcon#read 4, iclass 24, count 2 2006.229.15:27:14.38#ibcon#about to read 5, iclass 24, count 2 2006.229.15:27:14.38#ibcon#read 5, iclass 24, count 2 2006.229.15:27:14.38#ibcon#about to read 6, iclass 24, count 2 2006.229.15:27:14.38#ibcon#read 6, iclass 24, count 2 2006.229.15:27:14.38#ibcon#end of sib2, iclass 24, count 2 2006.229.15:27:14.38#ibcon#*mode == 0, iclass 24, count 2 2006.229.15:27:14.38#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.15:27:14.38#ibcon#[27=AT05-04\r\n] 2006.229.15:27:14.38#ibcon#*before write, iclass 24, count 2 2006.229.15:27:14.38#ibcon#enter sib2, iclass 24, count 2 2006.229.15:27:14.38#ibcon#flushed, iclass 24, count 2 2006.229.15:27:14.38#ibcon#about to write, iclass 24, count 2 2006.229.15:27:14.38#ibcon#wrote, iclass 24, count 2 2006.229.15:27:14.38#ibcon#about to read 3, iclass 24, count 2 2006.229.15:27:14.41#ibcon#read 3, iclass 24, count 2 2006.229.15:27:14.41#ibcon#about to read 4, iclass 24, count 2 2006.229.15:27:14.41#ibcon#read 4, iclass 24, count 2 2006.229.15:27:14.41#ibcon#about to read 5, iclass 24, count 2 2006.229.15:27:14.41#ibcon#read 5, iclass 24, count 2 2006.229.15:27:14.41#ibcon#about to read 6, iclass 24, count 2 2006.229.15:27:14.41#ibcon#read 6, iclass 24, count 2 2006.229.15:27:14.41#ibcon#end of sib2, iclass 24, count 2 2006.229.15:27:14.41#ibcon#*after write, iclass 24, count 2 2006.229.15:27:14.41#ibcon#*before return 0, iclass 24, count 2 2006.229.15:27:14.41#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:14.41#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:27:14.41#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.15:27:14.41#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:14.41#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:14.53#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:14.53#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:14.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:27:14.53#ibcon#first serial, iclass 24, count 0 2006.229.15:27:14.53#ibcon#enter sib2, iclass 24, count 0 2006.229.15:27:14.53#ibcon#flushed, iclass 24, count 0 2006.229.15:27:14.53#ibcon#about to write, iclass 24, count 0 2006.229.15:27:14.53#ibcon#wrote, iclass 24, count 0 2006.229.15:27:14.53#ibcon#about to read 3, iclass 24, count 0 2006.229.15:27:14.55#ibcon#read 3, iclass 24, count 0 2006.229.15:27:14.55#ibcon#about to read 4, iclass 24, count 0 2006.229.15:27:14.55#ibcon#read 4, iclass 24, count 0 2006.229.15:27:14.55#ibcon#about to read 5, iclass 24, count 0 2006.229.15:27:14.55#ibcon#read 5, iclass 24, count 0 2006.229.15:27:14.55#ibcon#about to read 6, iclass 24, count 0 2006.229.15:27:14.55#ibcon#read 6, iclass 24, count 0 2006.229.15:27:14.55#ibcon#end of sib2, iclass 24, count 0 2006.229.15:27:14.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:27:14.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:27:14.55#ibcon#[27=USB\r\n] 2006.229.15:27:14.55#ibcon#*before write, iclass 24, count 0 2006.229.15:27:14.55#ibcon#enter sib2, iclass 24, count 0 2006.229.15:27:14.55#ibcon#flushed, iclass 24, count 0 2006.229.15:27:14.55#ibcon#about to write, iclass 24, count 0 2006.229.15:27:14.55#ibcon#wrote, iclass 24, count 0 2006.229.15:27:14.55#ibcon#about to read 3, iclass 24, count 0 2006.229.15:27:14.58#ibcon#read 3, iclass 24, count 0 2006.229.15:27:14.58#ibcon#about to read 4, iclass 24, count 0 2006.229.15:27:14.58#ibcon#read 4, iclass 24, count 0 2006.229.15:27:14.58#ibcon#about to read 5, iclass 24, count 0 2006.229.15:27:14.58#ibcon#read 5, iclass 24, count 0 2006.229.15:27:14.58#ibcon#about to read 6, iclass 24, count 0 2006.229.15:27:14.58#ibcon#read 6, iclass 24, count 0 2006.229.15:27:14.58#ibcon#end of sib2, iclass 24, count 0 2006.229.15:27:14.58#ibcon#*after write, iclass 24, count 0 2006.229.15:27:14.58#ibcon#*before return 0, iclass 24, count 0 2006.229.15:27:14.58#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:14.58#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:27:14.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:27:14.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:27:14.58$vck44/vblo=6,719.99 2006.229.15:27:14.58#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:27:14.58#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:27:14.58#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:14.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:14.58#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:14.58#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:14.58#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:27:14.58#ibcon#first serial, iclass 26, count 0 2006.229.15:27:14.58#ibcon#enter sib2, iclass 26, count 0 2006.229.15:27:14.58#ibcon#flushed, iclass 26, count 0 2006.229.15:27:14.58#ibcon#about to write, iclass 26, count 0 2006.229.15:27:14.58#ibcon#wrote, iclass 26, count 0 2006.229.15:27:14.58#ibcon#about to read 3, iclass 26, count 0 2006.229.15:27:14.60#ibcon#read 3, iclass 26, count 0 2006.229.15:27:14.60#ibcon#about to read 4, iclass 26, count 0 2006.229.15:27:14.60#ibcon#read 4, iclass 26, count 0 2006.229.15:27:14.60#ibcon#about to read 5, iclass 26, count 0 2006.229.15:27:14.60#ibcon#read 5, iclass 26, count 0 2006.229.15:27:14.60#ibcon#about to read 6, iclass 26, count 0 2006.229.15:27:14.60#ibcon#read 6, iclass 26, count 0 2006.229.15:27:14.60#ibcon#end of sib2, iclass 26, count 0 2006.229.15:27:14.60#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:27:14.60#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:27:14.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:27:14.60#ibcon#*before write, iclass 26, count 0 2006.229.15:27:14.60#ibcon#enter sib2, iclass 26, count 0 2006.229.15:27:14.60#ibcon#flushed, iclass 26, count 0 2006.229.15:27:14.60#ibcon#about to write, iclass 26, count 0 2006.229.15:27:14.60#ibcon#wrote, iclass 26, count 0 2006.229.15:27:14.60#ibcon#about to read 3, iclass 26, count 0 2006.229.15:27:14.64#ibcon#read 3, iclass 26, count 0 2006.229.15:27:14.64#ibcon#about to read 4, iclass 26, count 0 2006.229.15:27:14.64#ibcon#read 4, iclass 26, count 0 2006.229.15:27:14.64#ibcon#about to read 5, iclass 26, count 0 2006.229.15:27:14.64#ibcon#read 5, iclass 26, count 0 2006.229.15:27:14.64#ibcon#about to read 6, iclass 26, count 0 2006.229.15:27:14.64#ibcon#read 6, iclass 26, count 0 2006.229.15:27:14.64#ibcon#end of sib2, iclass 26, count 0 2006.229.15:27:14.64#ibcon#*after write, iclass 26, count 0 2006.229.15:27:14.64#ibcon#*before return 0, iclass 26, count 0 2006.229.15:27:14.64#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:14.64#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:27:14.64#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:27:14.64#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:27:14.64$vck44/vb=6,4 2006.229.15:27:14.64#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:27:14.64#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:27:14.64#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:14.64#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:14.70#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:14.70#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:14.70#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:27:14.70#ibcon#first serial, iclass 28, count 2 2006.229.15:27:14.70#ibcon#enter sib2, iclass 28, count 2 2006.229.15:27:14.70#ibcon#flushed, iclass 28, count 2 2006.229.15:27:14.70#ibcon#about to write, iclass 28, count 2 2006.229.15:27:14.70#ibcon#wrote, iclass 28, count 2 2006.229.15:27:14.70#ibcon#about to read 3, iclass 28, count 2 2006.229.15:27:14.72#ibcon#read 3, iclass 28, count 2 2006.229.15:27:14.72#ibcon#about to read 4, iclass 28, count 2 2006.229.15:27:14.72#ibcon#read 4, iclass 28, count 2 2006.229.15:27:14.72#ibcon#about to read 5, iclass 28, count 2 2006.229.15:27:14.72#ibcon#read 5, iclass 28, count 2 2006.229.15:27:14.72#ibcon#about to read 6, iclass 28, count 2 2006.229.15:27:14.72#ibcon#read 6, iclass 28, count 2 2006.229.15:27:14.72#ibcon#end of sib2, iclass 28, count 2 2006.229.15:27:14.72#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:27:14.72#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:27:14.72#ibcon#[27=AT06-04\r\n] 2006.229.15:27:14.72#ibcon#*before write, iclass 28, count 2 2006.229.15:27:14.72#ibcon#enter sib2, iclass 28, count 2 2006.229.15:27:14.72#ibcon#flushed, iclass 28, count 2 2006.229.15:27:14.72#ibcon#about to write, iclass 28, count 2 2006.229.15:27:14.72#ibcon#wrote, iclass 28, count 2 2006.229.15:27:14.72#ibcon#about to read 3, iclass 28, count 2 2006.229.15:27:14.75#ibcon#read 3, iclass 28, count 2 2006.229.15:27:14.75#ibcon#about to read 4, iclass 28, count 2 2006.229.15:27:14.75#ibcon#read 4, iclass 28, count 2 2006.229.15:27:14.75#ibcon#about to read 5, iclass 28, count 2 2006.229.15:27:14.75#ibcon#read 5, iclass 28, count 2 2006.229.15:27:14.75#ibcon#about to read 6, iclass 28, count 2 2006.229.15:27:14.75#ibcon#read 6, iclass 28, count 2 2006.229.15:27:14.75#ibcon#end of sib2, iclass 28, count 2 2006.229.15:27:14.75#ibcon#*after write, iclass 28, count 2 2006.229.15:27:14.75#ibcon#*before return 0, iclass 28, count 2 2006.229.15:27:14.75#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:14.75#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:27:14.75#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:27:14.75#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:14.75#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:14.87#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:14.87#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:14.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:27:14.87#ibcon#first serial, iclass 28, count 0 2006.229.15:27:14.87#ibcon#enter sib2, iclass 28, count 0 2006.229.15:27:14.87#ibcon#flushed, iclass 28, count 0 2006.229.15:27:14.87#ibcon#about to write, iclass 28, count 0 2006.229.15:27:14.87#ibcon#wrote, iclass 28, count 0 2006.229.15:27:14.87#ibcon#about to read 3, iclass 28, count 0 2006.229.15:27:14.89#ibcon#read 3, iclass 28, count 0 2006.229.15:27:14.89#ibcon#about to read 4, iclass 28, count 0 2006.229.15:27:14.89#ibcon#read 4, iclass 28, count 0 2006.229.15:27:14.89#ibcon#about to read 5, iclass 28, count 0 2006.229.15:27:14.89#ibcon#read 5, iclass 28, count 0 2006.229.15:27:14.89#ibcon#about to read 6, iclass 28, count 0 2006.229.15:27:14.89#ibcon#read 6, iclass 28, count 0 2006.229.15:27:14.89#ibcon#end of sib2, iclass 28, count 0 2006.229.15:27:14.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:27:14.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:27:14.89#ibcon#[27=USB\r\n] 2006.229.15:27:14.89#ibcon#*before write, iclass 28, count 0 2006.229.15:27:14.89#ibcon#enter sib2, iclass 28, count 0 2006.229.15:27:14.89#ibcon#flushed, iclass 28, count 0 2006.229.15:27:14.89#ibcon#about to write, iclass 28, count 0 2006.229.15:27:14.89#ibcon#wrote, iclass 28, count 0 2006.229.15:27:14.89#ibcon#about to read 3, iclass 28, count 0 2006.229.15:27:14.92#ibcon#read 3, iclass 28, count 0 2006.229.15:27:14.92#ibcon#about to read 4, iclass 28, count 0 2006.229.15:27:14.92#ibcon#read 4, iclass 28, count 0 2006.229.15:27:14.92#ibcon#about to read 5, iclass 28, count 0 2006.229.15:27:14.92#ibcon#read 5, iclass 28, count 0 2006.229.15:27:14.92#ibcon#about to read 6, iclass 28, count 0 2006.229.15:27:14.92#ibcon#read 6, iclass 28, count 0 2006.229.15:27:14.92#ibcon#end of sib2, iclass 28, count 0 2006.229.15:27:14.92#ibcon#*after write, iclass 28, count 0 2006.229.15:27:14.92#ibcon#*before return 0, iclass 28, count 0 2006.229.15:27:14.92#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:14.92#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:27:14.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:27:14.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:27:14.92$vck44/vblo=7,734.99 2006.229.15:27:14.92#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:27:14.92#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:27:14.92#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:14.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:14.92#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:14.92#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:14.92#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:27:14.92#ibcon#first serial, iclass 30, count 0 2006.229.15:27:14.92#ibcon#enter sib2, iclass 30, count 0 2006.229.15:27:14.92#ibcon#flushed, iclass 30, count 0 2006.229.15:27:14.92#ibcon#about to write, iclass 30, count 0 2006.229.15:27:14.92#ibcon#wrote, iclass 30, count 0 2006.229.15:27:14.92#ibcon#about to read 3, iclass 30, count 0 2006.229.15:27:14.94#ibcon#read 3, iclass 30, count 0 2006.229.15:27:14.94#ibcon#about to read 4, iclass 30, count 0 2006.229.15:27:14.94#ibcon#read 4, iclass 30, count 0 2006.229.15:27:14.94#ibcon#about to read 5, iclass 30, count 0 2006.229.15:27:14.94#ibcon#read 5, iclass 30, count 0 2006.229.15:27:14.94#ibcon#about to read 6, iclass 30, count 0 2006.229.15:27:14.94#ibcon#read 6, iclass 30, count 0 2006.229.15:27:14.94#ibcon#end of sib2, iclass 30, count 0 2006.229.15:27:14.94#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:27:14.94#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:27:14.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:27:14.94#ibcon#*before write, iclass 30, count 0 2006.229.15:27:14.94#ibcon#enter sib2, iclass 30, count 0 2006.229.15:27:14.94#ibcon#flushed, iclass 30, count 0 2006.229.15:27:14.94#ibcon#about to write, iclass 30, count 0 2006.229.15:27:14.94#ibcon#wrote, iclass 30, count 0 2006.229.15:27:14.94#ibcon#about to read 3, iclass 30, count 0 2006.229.15:27:14.98#ibcon#read 3, iclass 30, count 0 2006.229.15:27:14.98#ibcon#about to read 4, iclass 30, count 0 2006.229.15:27:14.98#ibcon#read 4, iclass 30, count 0 2006.229.15:27:14.98#ibcon#about to read 5, iclass 30, count 0 2006.229.15:27:14.98#ibcon#read 5, iclass 30, count 0 2006.229.15:27:14.98#ibcon#about to read 6, iclass 30, count 0 2006.229.15:27:14.98#ibcon#read 6, iclass 30, count 0 2006.229.15:27:14.98#ibcon#end of sib2, iclass 30, count 0 2006.229.15:27:14.98#ibcon#*after write, iclass 30, count 0 2006.229.15:27:14.98#ibcon#*before return 0, iclass 30, count 0 2006.229.15:27:14.98#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:14.98#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:27:14.98#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:27:14.98#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:27:14.98$vck44/vb=7,4 2006.229.15:27:14.98#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:27:14.98#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:27:14.98#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:14.98#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:15.04#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:15.04#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:15.04#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:27:15.04#ibcon#first serial, iclass 32, count 2 2006.229.15:27:15.04#ibcon#enter sib2, iclass 32, count 2 2006.229.15:27:15.04#ibcon#flushed, iclass 32, count 2 2006.229.15:27:15.04#ibcon#about to write, iclass 32, count 2 2006.229.15:27:15.04#ibcon#wrote, iclass 32, count 2 2006.229.15:27:15.04#ibcon#about to read 3, iclass 32, count 2 2006.229.15:27:15.06#ibcon#read 3, iclass 32, count 2 2006.229.15:27:15.06#ibcon#about to read 4, iclass 32, count 2 2006.229.15:27:15.06#ibcon#read 4, iclass 32, count 2 2006.229.15:27:15.06#ibcon#about to read 5, iclass 32, count 2 2006.229.15:27:15.06#ibcon#read 5, iclass 32, count 2 2006.229.15:27:15.06#ibcon#about to read 6, iclass 32, count 2 2006.229.15:27:15.06#ibcon#read 6, iclass 32, count 2 2006.229.15:27:15.06#ibcon#end of sib2, iclass 32, count 2 2006.229.15:27:15.06#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:27:15.06#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:27:15.06#ibcon#[27=AT07-04\r\n] 2006.229.15:27:15.06#ibcon#*before write, iclass 32, count 2 2006.229.15:27:15.06#ibcon#enter sib2, iclass 32, count 2 2006.229.15:27:15.06#ibcon#flushed, iclass 32, count 2 2006.229.15:27:15.06#ibcon#about to write, iclass 32, count 2 2006.229.15:27:15.06#ibcon#wrote, iclass 32, count 2 2006.229.15:27:15.06#ibcon#about to read 3, iclass 32, count 2 2006.229.15:27:15.09#ibcon#read 3, iclass 32, count 2 2006.229.15:27:15.09#ibcon#about to read 4, iclass 32, count 2 2006.229.15:27:15.09#ibcon#read 4, iclass 32, count 2 2006.229.15:27:15.09#ibcon#about to read 5, iclass 32, count 2 2006.229.15:27:15.09#ibcon#read 5, iclass 32, count 2 2006.229.15:27:15.09#ibcon#about to read 6, iclass 32, count 2 2006.229.15:27:15.09#ibcon#read 6, iclass 32, count 2 2006.229.15:27:15.09#ibcon#end of sib2, iclass 32, count 2 2006.229.15:27:15.09#ibcon#*after write, iclass 32, count 2 2006.229.15:27:15.09#ibcon#*before return 0, iclass 32, count 2 2006.229.15:27:15.09#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:15.09#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:27:15.09#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:27:15.09#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:15.09#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:15.21#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:15.21#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:15.21#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:27:15.21#ibcon#first serial, iclass 32, count 0 2006.229.15:27:15.21#ibcon#enter sib2, iclass 32, count 0 2006.229.15:27:15.21#ibcon#flushed, iclass 32, count 0 2006.229.15:27:15.21#ibcon#about to write, iclass 32, count 0 2006.229.15:27:15.21#ibcon#wrote, iclass 32, count 0 2006.229.15:27:15.21#ibcon#about to read 3, iclass 32, count 0 2006.229.15:27:15.23#ibcon#read 3, iclass 32, count 0 2006.229.15:27:15.23#ibcon#about to read 4, iclass 32, count 0 2006.229.15:27:15.23#ibcon#read 4, iclass 32, count 0 2006.229.15:27:15.23#ibcon#about to read 5, iclass 32, count 0 2006.229.15:27:15.23#ibcon#read 5, iclass 32, count 0 2006.229.15:27:15.23#ibcon#about to read 6, iclass 32, count 0 2006.229.15:27:15.23#ibcon#read 6, iclass 32, count 0 2006.229.15:27:15.23#ibcon#end of sib2, iclass 32, count 0 2006.229.15:27:15.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:27:15.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:27:15.23#ibcon#[27=USB\r\n] 2006.229.15:27:15.23#ibcon#*before write, iclass 32, count 0 2006.229.15:27:15.23#ibcon#enter sib2, iclass 32, count 0 2006.229.15:27:15.23#ibcon#flushed, iclass 32, count 0 2006.229.15:27:15.23#ibcon#about to write, iclass 32, count 0 2006.229.15:27:15.23#ibcon#wrote, iclass 32, count 0 2006.229.15:27:15.23#ibcon#about to read 3, iclass 32, count 0 2006.229.15:27:15.26#ibcon#read 3, iclass 32, count 0 2006.229.15:27:15.26#ibcon#about to read 4, iclass 32, count 0 2006.229.15:27:15.26#ibcon#read 4, iclass 32, count 0 2006.229.15:27:15.26#ibcon#about to read 5, iclass 32, count 0 2006.229.15:27:15.26#ibcon#read 5, iclass 32, count 0 2006.229.15:27:15.26#ibcon#about to read 6, iclass 32, count 0 2006.229.15:27:15.26#ibcon#read 6, iclass 32, count 0 2006.229.15:27:15.26#ibcon#end of sib2, iclass 32, count 0 2006.229.15:27:15.26#ibcon#*after write, iclass 32, count 0 2006.229.15:27:15.26#ibcon#*before return 0, iclass 32, count 0 2006.229.15:27:15.26#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:15.26#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:27:15.26#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:27:15.26#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:27:15.26$vck44/vblo=8,744.99 2006.229.15:27:15.26#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:27:15.26#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:27:15.26#ibcon#ireg 17 cls_cnt 0 2006.229.15:27:15.26#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:15.26#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:15.26#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:15.26#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:27:15.26#ibcon#first serial, iclass 34, count 0 2006.229.15:27:15.26#ibcon#enter sib2, iclass 34, count 0 2006.229.15:27:15.26#ibcon#flushed, iclass 34, count 0 2006.229.15:27:15.26#ibcon#about to write, iclass 34, count 0 2006.229.15:27:15.26#ibcon#wrote, iclass 34, count 0 2006.229.15:27:15.26#ibcon#about to read 3, iclass 34, count 0 2006.229.15:27:15.28#ibcon#read 3, iclass 34, count 0 2006.229.15:27:15.28#ibcon#about to read 4, iclass 34, count 0 2006.229.15:27:15.28#ibcon#read 4, iclass 34, count 0 2006.229.15:27:15.28#ibcon#about to read 5, iclass 34, count 0 2006.229.15:27:15.28#ibcon#read 5, iclass 34, count 0 2006.229.15:27:15.28#ibcon#about to read 6, iclass 34, count 0 2006.229.15:27:15.28#ibcon#read 6, iclass 34, count 0 2006.229.15:27:15.28#ibcon#end of sib2, iclass 34, count 0 2006.229.15:27:15.28#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:27:15.28#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:27:15.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:27:15.28#ibcon#*before write, iclass 34, count 0 2006.229.15:27:15.28#ibcon#enter sib2, iclass 34, count 0 2006.229.15:27:15.28#ibcon#flushed, iclass 34, count 0 2006.229.15:27:15.28#ibcon#about to write, iclass 34, count 0 2006.229.15:27:15.28#ibcon#wrote, iclass 34, count 0 2006.229.15:27:15.28#ibcon#about to read 3, iclass 34, count 0 2006.229.15:27:15.32#ibcon#read 3, iclass 34, count 0 2006.229.15:27:15.32#ibcon#about to read 4, iclass 34, count 0 2006.229.15:27:15.32#ibcon#read 4, iclass 34, count 0 2006.229.15:27:15.32#ibcon#about to read 5, iclass 34, count 0 2006.229.15:27:15.32#ibcon#read 5, iclass 34, count 0 2006.229.15:27:15.32#ibcon#about to read 6, iclass 34, count 0 2006.229.15:27:15.32#ibcon#read 6, iclass 34, count 0 2006.229.15:27:15.32#ibcon#end of sib2, iclass 34, count 0 2006.229.15:27:15.32#ibcon#*after write, iclass 34, count 0 2006.229.15:27:15.32#ibcon#*before return 0, iclass 34, count 0 2006.229.15:27:15.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:15.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:27:15.32#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:27:15.32#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:27:15.32$vck44/vb=8,4 2006.229.15:27:15.32#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:27:15.32#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:27:15.32#ibcon#ireg 11 cls_cnt 2 2006.229.15:27:15.32#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:15.38#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:15.38#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:15.38#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:27:15.38#ibcon#first serial, iclass 36, count 2 2006.229.15:27:15.38#ibcon#enter sib2, iclass 36, count 2 2006.229.15:27:15.38#ibcon#flushed, iclass 36, count 2 2006.229.15:27:15.38#ibcon#about to write, iclass 36, count 2 2006.229.15:27:15.38#ibcon#wrote, iclass 36, count 2 2006.229.15:27:15.38#ibcon#about to read 3, iclass 36, count 2 2006.229.15:27:15.40#ibcon#read 3, iclass 36, count 2 2006.229.15:27:15.40#ibcon#about to read 4, iclass 36, count 2 2006.229.15:27:15.40#ibcon#read 4, iclass 36, count 2 2006.229.15:27:15.40#ibcon#about to read 5, iclass 36, count 2 2006.229.15:27:15.40#ibcon#read 5, iclass 36, count 2 2006.229.15:27:15.40#ibcon#about to read 6, iclass 36, count 2 2006.229.15:27:15.40#ibcon#read 6, iclass 36, count 2 2006.229.15:27:15.40#ibcon#end of sib2, iclass 36, count 2 2006.229.15:27:15.40#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:27:15.40#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:27:15.40#ibcon#[27=AT08-04\r\n] 2006.229.15:27:15.40#ibcon#*before write, iclass 36, count 2 2006.229.15:27:15.40#ibcon#enter sib2, iclass 36, count 2 2006.229.15:27:15.40#ibcon#flushed, iclass 36, count 2 2006.229.15:27:15.40#ibcon#about to write, iclass 36, count 2 2006.229.15:27:15.40#ibcon#wrote, iclass 36, count 2 2006.229.15:27:15.40#ibcon#about to read 3, iclass 36, count 2 2006.229.15:27:15.43#ibcon#read 3, iclass 36, count 2 2006.229.15:27:15.43#ibcon#about to read 4, iclass 36, count 2 2006.229.15:27:15.43#ibcon#read 4, iclass 36, count 2 2006.229.15:27:15.43#ibcon#about to read 5, iclass 36, count 2 2006.229.15:27:15.43#ibcon#read 5, iclass 36, count 2 2006.229.15:27:15.43#ibcon#about to read 6, iclass 36, count 2 2006.229.15:27:15.43#ibcon#read 6, iclass 36, count 2 2006.229.15:27:15.43#ibcon#end of sib2, iclass 36, count 2 2006.229.15:27:15.43#ibcon#*after write, iclass 36, count 2 2006.229.15:27:15.43#ibcon#*before return 0, iclass 36, count 2 2006.229.15:27:15.43#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:15.43#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:27:15.43#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:27:15.43#ibcon#ireg 7 cls_cnt 0 2006.229.15:27:15.43#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:15.55#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:15.55#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:15.55#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:27:15.55#ibcon#first serial, iclass 36, count 0 2006.229.15:27:15.55#ibcon#enter sib2, iclass 36, count 0 2006.229.15:27:15.55#ibcon#flushed, iclass 36, count 0 2006.229.15:27:15.55#ibcon#about to write, iclass 36, count 0 2006.229.15:27:15.55#ibcon#wrote, iclass 36, count 0 2006.229.15:27:15.55#ibcon#about to read 3, iclass 36, count 0 2006.229.15:27:15.57#ibcon#read 3, iclass 36, count 0 2006.229.15:27:15.57#ibcon#about to read 4, iclass 36, count 0 2006.229.15:27:15.57#ibcon#read 4, iclass 36, count 0 2006.229.15:27:15.57#ibcon#about to read 5, iclass 36, count 0 2006.229.15:27:15.57#ibcon#read 5, iclass 36, count 0 2006.229.15:27:15.57#ibcon#about to read 6, iclass 36, count 0 2006.229.15:27:15.57#ibcon#read 6, iclass 36, count 0 2006.229.15:27:15.57#ibcon#end of sib2, iclass 36, count 0 2006.229.15:27:15.57#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:27:15.57#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:27:15.57#ibcon#[27=USB\r\n] 2006.229.15:27:15.57#ibcon#*before write, iclass 36, count 0 2006.229.15:27:15.57#ibcon#enter sib2, iclass 36, count 0 2006.229.15:27:15.57#ibcon#flushed, iclass 36, count 0 2006.229.15:27:15.57#ibcon#about to write, iclass 36, count 0 2006.229.15:27:15.57#ibcon#wrote, iclass 36, count 0 2006.229.15:27:15.57#ibcon#about to read 3, iclass 36, count 0 2006.229.15:27:15.60#ibcon#read 3, iclass 36, count 0 2006.229.15:27:15.60#ibcon#about to read 4, iclass 36, count 0 2006.229.15:27:15.60#ibcon#read 4, iclass 36, count 0 2006.229.15:27:15.60#ibcon#about to read 5, iclass 36, count 0 2006.229.15:27:15.60#ibcon#read 5, iclass 36, count 0 2006.229.15:27:15.60#ibcon#about to read 6, iclass 36, count 0 2006.229.15:27:15.60#ibcon#read 6, iclass 36, count 0 2006.229.15:27:15.60#ibcon#end of sib2, iclass 36, count 0 2006.229.15:27:15.60#ibcon#*after write, iclass 36, count 0 2006.229.15:27:15.60#ibcon#*before return 0, iclass 36, count 0 2006.229.15:27:15.60#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:15.60#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:27:15.60#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:27:15.60#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:27:15.60$vck44/vabw=wide 2006.229.15:27:15.60#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:27:15.60#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:27:15.60#ibcon#ireg 8 cls_cnt 0 2006.229.15:27:15.60#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:15.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:15.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:15.60#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:27:15.60#ibcon#first serial, iclass 38, count 0 2006.229.15:27:15.60#ibcon#enter sib2, iclass 38, count 0 2006.229.15:27:15.60#ibcon#flushed, iclass 38, count 0 2006.229.15:27:15.60#ibcon#about to write, iclass 38, count 0 2006.229.15:27:15.60#ibcon#wrote, iclass 38, count 0 2006.229.15:27:15.60#ibcon#about to read 3, iclass 38, count 0 2006.229.15:27:15.62#ibcon#read 3, iclass 38, count 0 2006.229.15:27:15.62#ibcon#about to read 4, iclass 38, count 0 2006.229.15:27:15.62#ibcon#read 4, iclass 38, count 0 2006.229.15:27:15.62#ibcon#about to read 5, iclass 38, count 0 2006.229.15:27:15.62#ibcon#read 5, iclass 38, count 0 2006.229.15:27:15.62#ibcon#about to read 6, iclass 38, count 0 2006.229.15:27:15.62#ibcon#read 6, iclass 38, count 0 2006.229.15:27:15.62#ibcon#end of sib2, iclass 38, count 0 2006.229.15:27:15.62#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:27:15.62#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:27:15.62#ibcon#[25=BW32\r\n] 2006.229.15:27:15.62#ibcon#*before write, iclass 38, count 0 2006.229.15:27:15.62#ibcon#enter sib2, iclass 38, count 0 2006.229.15:27:15.62#ibcon#flushed, iclass 38, count 0 2006.229.15:27:15.62#ibcon#about to write, iclass 38, count 0 2006.229.15:27:15.62#ibcon#wrote, iclass 38, count 0 2006.229.15:27:15.62#ibcon#about to read 3, iclass 38, count 0 2006.229.15:27:15.65#ibcon#read 3, iclass 38, count 0 2006.229.15:27:15.65#ibcon#about to read 4, iclass 38, count 0 2006.229.15:27:15.65#ibcon#read 4, iclass 38, count 0 2006.229.15:27:15.65#ibcon#about to read 5, iclass 38, count 0 2006.229.15:27:15.65#ibcon#read 5, iclass 38, count 0 2006.229.15:27:15.65#ibcon#about to read 6, iclass 38, count 0 2006.229.15:27:15.65#ibcon#read 6, iclass 38, count 0 2006.229.15:27:15.65#ibcon#end of sib2, iclass 38, count 0 2006.229.15:27:15.65#ibcon#*after write, iclass 38, count 0 2006.229.15:27:15.65#ibcon#*before return 0, iclass 38, count 0 2006.229.15:27:15.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:15.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:27:15.65#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:27:15.65#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:27:15.65$vck44/vbbw=wide 2006.229.15:27:15.65#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:27:15.65#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:27:15.65#ibcon#ireg 8 cls_cnt 0 2006.229.15:27:15.65#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:27:15.72#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:27:15.72#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:27:15.72#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:27:15.72#ibcon#first serial, iclass 40, count 0 2006.229.15:27:15.72#ibcon#enter sib2, iclass 40, count 0 2006.229.15:27:15.72#ibcon#flushed, iclass 40, count 0 2006.229.15:27:15.72#ibcon#about to write, iclass 40, count 0 2006.229.15:27:15.72#ibcon#wrote, iclass 40, count 0 2006.229.15:27:15.72#ibcon#about to read 3, iclass 40, count 0 2006.229.15:27:15.74#ibcon#read 3, iclass 40, count 0 2006.229.15:27:15.74#ibcon#about to read 4, iclass 40, count 0 2006.229.15:27:15.74#ibcon#read 4, iclass 40, count 0 2006.229.15:27:15.74#ibcon#about to read 5, iclass 40, count 0 2006.229.15:27:15.74#ibcon#read 5, iclass 40, count 0 2006.229.15:27:15.74#ibcon#about to read 6, iclass 40, count 0 2006.229.15:27:15.74#ibcon#read 6, iclass 40, count 0 2006.229.15:27:15.74#ibcon#end of sib2, iclass 40, count 0 2006.229.15:27:15.74#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:27:15.74#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:27:15.74#ibcon#[27=BW32\r\n] 2006.229.15:27:15.74#ibcon#*before write, iclass 40, count 0 2006.229.15:27:15.74#ibcon#enter sib2, iclass 40, count 0 2006.229.15:27:15.74#ibcon#flushed, iclass 40, count 0 2006.229.15:27:15.74#ibcon#about to write, iclass 40, count 0 2006.229.15:27:15.74#ibcon#wrote, iclass 40, count 0 2006.229.15:27:15.74#ibcon#about to read 3, iclass 40, count 0 2006.229.15:27:15.77#ibcon#read 3, iclass 40, count 0 2006.229.15:27:15.77#ibcon#about to read 4, iclass 40, count 0 2006.229.15:27:15.77#ibcon#read 4, iclass 40, count 0 2006.229.15:27:15.77#ibcon#about to read 5, iclass 40, count 0 2006.229.15:27:15.77#ibcon#read 5, iclass 40, count 0 2006.229.15:27:15.77#ibcon#about to read 6, iclass 40, count 0 2006.229.15:27:15.77#ibcon#read 6, iclass 40, count 0 2006.229.15:27:15.77#ibcon#end of sib2, iclass 40, count 0 2006.229.15:27:15.77#ibcon#*after write, iclass 40, count 0 2006.229.15:27:15.77#ibcon#*before return 0, iclass 40, count 0 2006.229.15:27:15.77#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:27:15.77#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:27:15.77#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:27:15.77#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:27:15.77$setupk4/ifdk4 2006.229.15:27:15.77$ifdk4/lo= 2006.229.15:27:15.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:27:15.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:27:15.77$ifdk4/patch= 2006.229.15:27:15.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:27:15.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:27:15.77$setupk4/!*+20s 2006.229.15:27:17.17#abcon#<5=/05 0.8 1.9 27.361001001.8\r\n> 2006.229.15:27:17.19#abcon#{5=INTERFACE CLEAR} 2006.229.15:27:17.25#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:27:27.34#abcon#<5=/05 0.8 1.9 27.361001001.8\r\n> 2006.229.15:27:27.36#abcon#{5=INTERFACE CLEAR} 2006.229.15:27:27.42#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:27:30.25$setupk4/"tpicd 2006.229.15:27:30.25$setupk4/echo=off 2006.229.15:27:30.25$setupk4/xlog=off 2006.229.15:27:30.25:!2006.229.15:28:15 2006.229.15:27:32.14#trakl#Source acquired 2006.229.15:27:32.14#flagr#flagr/antenna,acquired 2006.229.15:28:15.00:preob 2006.229.15:28:15.14/onsource/TRACKING 2006.229.15:28:15.14:!2006.229.15:28:25 2006.229.15:28:25.00:"tape 2006.229.15:28:25.00:"st=record 2006.229.15:28:25.00:data_valid=on 2006.229.15:28:25.00:midob 2006.229.15:28:26.14/onsource/TRACKING 2006.229.15:28:26.14/wx/27.36,1001.8,100 2006.229.15:28:26.21/cable/+6.4160E-03 2006.229.15:28:27.30/va/01,08,usb,yes,32,35 2006.229.15:28:27.30/va/02,07,usb,yes,35,36 2006.229.15:28:27.30/va/03,06,usb,yes,43,46 2006.229.15:28:27.30/va/04,07,usb,yes,36,38 2006.229.15:28:27.30/va/05,04,usb,yes,32,33 2006.229.15:28:27.30/va/06,04,usb,yes,36,36 2006.229.15:28:27.30/va/07,05,usb,yes,32,33 2006.229.15:28:27.30/va/08,06,usb,yes,23,29 2006.229.15:28:27.53/valo/01,524.99,yes,locked 2006.229.15:28:27.53/valo/02,534.99,yes,locked 2006.229.15:28:27.53/valo/03,564.99,yes,locked 2006.229.15:28:27.53/valo/04,624.99,yes,locked 2006.229.15:28:27.53/valo/05,734.99,yes,locked 2006.229.15:28:27.53/valo/06,814.99,yes,locked 2006.229.15:28:27.53/valo/07,864.99,yes,locked 2006.229.15:28:27.53/valo/08,884.99,yes,locked 2006.229.15:28:28.62/vb/01,04,usb,yes,33,30 2006.229.15:28:28.62/vb/02,04,usb,yes,35,35 2006.229.15:28:28.62/vb/03,04,usb,yes,32,35 2006.229.15:28:28.62/vb/04,04,usb,yes,37,35 2006.229.15:28:28.62/vb/05,04,usb,yes,29,31 2006.229.15:28:28.62/vb/06,04,usb,yes,33,29 2006.229.15:28:28.62/vb/07,04,usb,yes,33,33 2006.229.15:28:28.62/vb/08,04,usb,yes,31,34 2006.229.15:28:28.86/vblo/01,629.99,yes,locked 2006.229.15:28:28.86/vblo/02,634.99,yes,locked 2006.229.15:28:28.86/vblo/03,649.99,yes,locked 2006.229.15:28:28.86/vblo/04,679.99,yes,locked 2006.229.15:28:28.86/vblo/05,709.99,yes,locked 2006.229.15:28:28.86/vblo/06,719.99,yes,locked 2006.229.15:28:28.86/vblo/07,734.99,yes,locked 2006.229.15:28:28.86/vblo/08,744.99,yes,locked 2006.229.15:28:29.01/vabw/8 2006.229.15:28:29.16/vbbw/8 2006.229.15:28:29.33/xfe/off,on,12.0 2006.229.15:28:29.71/ifatt/23,28,28,28 2006.229.15:28:30.07/fmout-gps/S +4.49E-07 2006.229.15:28:30.11:!2006.229.15:29:45 2006.229.15:29:45.00:data_valid=off 2006.229.15:29:45.00:"et 2006.229.15:29:45.00:!+3s 2006.229.15:29:48.01:"tape 2006.229.15:29:48.01:postob 2006.229.15:29:48.22/cable/+6.4156E-03 2006.229.15:29:48.22/wx/27.35,1001.8,100 2006.229.15:29:49.07/fmout-gps/S +4.49E-07 2006.229.15:29:49.07:scan_name=229-1534,jd0608,40 2006.229.15:29:49.07:source=1741-038,174358.86,-035004.6,2000.0,ccw 2006.229.15:29:50.14#flagr#flagr/antenna,new-source 2006.229.15:29:50.14:checkk5 2006.229.15:29:50.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:29:50.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:29:51.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:29:51.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:29:52.08/chk_obsdata//k5ts1/T2291528??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:29:52.48/chk_obsdata//k5ts2/T2291528??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:29:52.87/chk_obsdata//k5ts3/T2291528??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:29:53.29/chk_obsdata//k5ts4/T2291528??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:29:54.02/k5log//k5ts1_log_newline 2006.229.15:29:54.74/k5log//k5ts2_log_newline 2006.229.15:29:55.44/k5log//k5ts3_log_newline 2006.229.15:29:56.15/k5log//k5ts4_log_newline 2006.229.15:29:56.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:29:56.18:setupk4=1 2006.229.15:29:56.18$setupk4/echo=on 2006.229.15:29:56.18$setupk4/pcalon 2006.229.15:29:56.18$pcalon/"no phase cal control is implemented here 2006.229.15:29:56.18$setupk4/"tpicd=stop 2006.229.15:29:56.18$setupk4/"rec=synch_on 2006.229.15:29:56.18$setupk4/"rec_mode=128 2006.229.15:29:56.18$setupk4/!* 2006.229.15:29:56.18$setupk4/recpk4 2006.229.15:29:56.18$recpk4/recpatch= 2006.229.15:29:56.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:29:56.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:29:56.19$setupk4/vck44 2006.229.15:29:56.19$vck44/valo=1,524.99 2006.229.15:29:56.19#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.15:29:56.19#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.15:29:56.19#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:56.19#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:56.19#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:56.19#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:56.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:29:56.19#ibcon#first serial, iclass 37, count 0 2006.229.15:29:56.19#ibcon#enter sib2, iclass 37, count 0 2006.229.15:29:56.19#ibcon#flushed, iclass 37, count 0 2006.229.15:29:56.19#ibcon#about to write, iclass 37, count 0 2006.229.15:29:56.19#ibcon#wrote, iclass 37, count 0 2006.229.15:29:56.19#ibcon#about to read 3, iclass 37, count 0 2006.229.15:29:56.20#ibcon#read 3, iclass 37, count 0 2006.229.15:29:56.20#ibcon#about to read 4, iclass 37, count 0 2006.229.15:29:56.20#ibcon#read 4, iclass 37, count 0 2006.229.15:29:56.20#ibcon#about to read 5, iclass 37, count 0 2006.229.15:29:56.20#ibcon#read 5, iclass 37, count 0 2006.229.15:29:56.20#ibcon#about to read 6, iclass 37, count 0 2006.229.15:29:56.20#ibcon#read 6, iclass 37, count 0 2006.229.15:29:56.20#ibcon#end of sib2, iclass 37, count 0 2006.229.15:29:56.20#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:29:56.20#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:29:56.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:29:56.20#ibcon#*before write, iclass 37, count 0 2006.229.15:29:56.20#ibcon#enter sib2, iclass 37, count 0 2006.229.15:29:56.20#ibcon#flushed, iclass 37, count 0 2006.229.15:29:56.20#ibcon#about to write, iclass 37, count 0 2006.229.15:29:56.20#ibcon#wrote, iclass 37, count 0 2006.229.15:29:56.20#ibcon#about to read 3, iclass 37, count 0 2006.229.15:29:56.25#ibcon#read 3, iclass 37, count 0 2006.229.15:29:56.25#ibcon#about to read 4, iclass 37, count 0 2006.229.15:29:56.25#ibcon#read 4, iclass 37, count 0 2006.229.15:29:56.25#ibcon#about to read 5, iclass 37, count 0 2006.229.15:29:56.25#ibcon#read 5, iclass 37, count 0 2006.229.15:29:56.25#ibcon#about to read 6, iclass 37, count 0 2006.229.15:29:56.25#ibcon#read 6, iclass 37, count 0 2006.229.15:29:56.25#ibcon#end of sib2, iclass 37, count 0 2006.229.15:29:56.25#ibcon#*after write, iclass 37, count 0 2006.229.15:29:56.25#ibcon#*before return 0, iclass 37, count 0 2006.229.15:29:56.25#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:56.25#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:56.25#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:29:56.25#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:29:56.25$vck44/va=1,8 2006.229.15:29:56.25#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.15:29:56.25#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.15:29:56.25#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:56.25#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:56.25#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:56.25#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:56.25#ibcon#enter wrdev, iclass 39, count 2 2006.229.15:29:56.25#ibcon#first serial, iclass 39, count 2 2006.229.15:29:56.25#ibcon#enter sib2, iclass 39, count 2 2006.229.15:29:56.25#ibcon#flushed, iclass 39, count 2 2006.229.15:29:56.25#ibcon#about to write, iclass 39, count 2 2006.229.15:29:56.25#ibcon#wrote, iclass 39, count 2 2006.229.15:29:56.25#ibcon#about to read 3, iclass 39, count 2 2006.229.15:29:56.27#ibcon#read 3, iclass 39, count 2 2006.229.15:29:56.27#ibcon#about to read 4, iclass 39, count 2 2006.229.15:29:56.27#ibcon#read 4, iclass 39, count 2 2006.229.15:29:56.27#ibcon#about to read 5, iclass 39, count 2 2006.229.15:29:56.27#ibcon#read 5, iclass 39, count 2 2006.229.15:29:56.27#ibcon#about to read 6, iclass 39, count 2 2006.229.15:29:56.27#ibcon#read 6, iclass 39, count 2 2006.229.15:29:56.27#ibcon#end of sib2, iclass 39, count 2 2006.229.15:29:56.27#ibcon#*mode == 0, iclass 39, count 2 2006.229.15:29:56.27#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.15:29:56.27#ibcon#[25=AT01-08\r\n] 2006.229.15:29:56.27#ibcon#*before write, iclass 39, count 2 2006.229.15:29:56.27#ibcon#enter sib2, iclass 39, count 2 2006.229.15:29:56.27#ibcon#flushed, iclass 39, count 2 2006.229.15:29:56.27#ibcon#about to write, iclass 39, count 2 2006.229.15:29:56.27#ibcon#wrote, iclass 39, count 2 2006.229.15:29:56.27#ibcon#about to read 3, iclass 39, count 2 2006.229.15:29:56.30#ibcon#read 3, iclass 39, count 2 2006.229.15:29:56.30#ibcon#about to read 4, iclass 39, count 2 2006.229.15:29:56.30#ibcon#read 4, iclass 39, count 2 2006.229.15:29:56.30#ibcon#about to read 5, iclass 39, count 2 2006.229.15:29:56.30#ibcon#read 5, iclass 39, count 2 2006.229.15:29:56.30#ibcon#about to read 6, iclass 39, count 2 2006.229.15:29:56.30#ibcon#read 6, iclass 39, count 2 2006.229.15:29:56.30#ibcon#end of sib2, iclass 39, count 2 2006.229.15:29:56.30#ibcon#*after write, iclass 39, count 2 2006.229.15:29:56.30#ibcon#*before return 0, iclass 39, count 2 2006.229.15:29:56.30#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:56.30#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:56.30#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.15:29:56.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:56.30#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:56.42#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:56.42#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:56.42#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:29:56.42#ibcon#first serial, iclass 39, count 0 2006.229.15:29:56.42#ibcon#enter sib2, iclass 39, count 0 2006.229.15:29:56.42#ibcon#flushed, iclass 39, count 0 2006.229.15:29:56.42#ibcon#about to write, iclass 39, count 0 2006.229.15:29:56.42#ibcon#wrote, iclass 39, count 0 2006.229.15:29:56.42#ibcon#about to read 3, iclass 39, count 0 2006.229.15:29:56.44#ibcon#read 3, iclass 39, count 0 2006.229.15:29:56.44#ibcon#about to read 4, iclass 39, count 0 2006.229.15:29:56.44#ibcon#read 4, iclass 39, count 0 2006.229.15:29:56.44#ibcon#about to read 5, iclass 39, count 0 2006.229.15:29:56.44#ibcon#read 5, iclass 39, count 0 2006.229.15:29:56.44#ibcon#about to read 6, iclass 39, count 0 2006.229.15:29:56.44#ibcon#read 6, iclass 39, count 0 2006.229.15:29:56.44#ibcon#end of sib2, iclass 39, count 0 2006.229.15:29:56.44#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:29:56.44#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:29:56.44#ibcon#[25=USB\r\n] 2006.229.15:29:56.44#ibcon#*before write, iclass 39, count 0 2006.229.15:29:56.44#ibcon#enter sib2, iclass 39, count 0 2006.229.15:29:56.44#ibcon#flushed, iclass 39, count 0 2006.229.15:29:56.44#ibcon#about to write, iclass 39, count 0 2006.229.15:29:56.44#ibcon#wrote, iclass 39, count 0 2006.229.15:29:56.44#ibcon#about to read 3, iclass 39, count 0 2006.229.15:29:56.47#ibcon#read 3, iclass 39, count 0 2006.229.15:29:56.47#ibcon#about to read 4, iclass 39, count 0 2006.229.15:29:56.47#ibcon#read 4, iclass 39, count 0 2006.229.15:29:56.47#ibcon#about to read 5, iclass 39, count 0 2006.229.15:29:56.47#ibcon#read 5, iclass 39, count 0 2006.229.15:29:56.47#ibcon#about to read 6, iclass 39, count 0 2006.229.15:29:56.47#ibcon#read 6, iclass 39, count 0 2006.229.15:29:56.47#ibcon#end of sib2, iclass 39, count 0 2006.229.15:29:56.47#ibcon#*after write, iclass 39, count 0 2006.229.15:29:56.47#ibcon#*before return 0, iclass 39, count 0 2006.229.15:29:56.47#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:56.47#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:56.47#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:29:56.47#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:29:56.47$vck44/valo=2,534.99 2006.229.15:29:56.47#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:29:56.47#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:29:56.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:56.47#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:56.47#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:56.47#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:56.47#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:29:56.47#ibcon#first serial, iclass 3, count 0 2006.229.15:29:56.47#ibcon#enter sib2, iclass 3, count 0 2006.229.15:29:56.47#ibcon#flushed, iclass 3, count 0 2006.229.15:29:56.47#ibcon#about to write, iclass 3, count 0 2006.229.15:29:56.47#ibcon#wrote, iclass 3, count 0 2006.229.15:29:56.47#ibcon#about to read 3, iclass 3, count 0 2006.229.15:29:56.49#ibcon#read 3, iclass 3, count 0 2006.229.15:29:56.49#ibcon#about to read 4, iclass 3, count 0 2006.229.15:29:56.49#ibcon#read 4, iclass 3, count 0 2006.229.15:29:56.49#ibcon#about to read 5, iclass 3, count 0 2006.229.15:29:56.49#ibcon#read 5, iclass 3, count 0 2006.229.15:29:56.49#ibcon#about to read 6, iclass 3, count 0 2006.229.15:29:56.49#ibcon#read 6, iclass 3, count 0 2006.229.15:29:56.49#ibcon#end of sib2, iclass 3, count 0 2006.229.15:29:56.49#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:29:56.49#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:29:56.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:29:56.49#ibcon#*before write, iclass 3, count 0 2006.229.15:29:56.49#ibcon#enter sib2, iclass 3, count 0 2006.229.15:29:56.49#ibcon#flushed, iclass 3, count 0 2006.229.15:29:56.49#ibcon#about to write, iclass 3, count 0 2006.229.15:29:56.49#ibcon#wrote, iclass 3, count 0 2006.229.15:29:56.49#ibcon#about to read 3, iclass 3, count 0 2006.229.15:29:56.53#ibcon#read 3, iclass 3, count 0 2006.229.15:29:56.53#ibcon#about to read 4, iclass 3, count 0 2006.229.15:29:56.53#ibcon#read 4, iclass 3, count 0 2006.229.15:29:56.53#ibcon#about to read 5, iclass 3, count 0 2006.229.15:29:56.53#ibcon#read 5, iclass 3, count 0 2006.229.15:29:56.53#ibcon#about to read 6, iclass 3, count 0 2006.229.15:29:56.53#ibcon#read 6, iclass 3, count 0 2006.229.15:29:56.53#ibcon#end of sib2, iclass 3, count 0 2006.229.15:29:56.53#ibcon#*after write, iclass 3, count 0 2006.229.15:29:56.53#ibcon#*before return 0, iclass 3, count 0 2006.229.15:29:56.53#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:56.53#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:56.53#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:29:56.53#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:29:56.53$vck44/va=2,7 2006.229.15:29:56.53#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.15:29:56.53#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.15:29:56.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:56.53#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:56.59#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:56.59#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:56.59#ibcon#enter wrdev, iclass 5, count 2 2006.229.15:29:56.59#ibcon#first serial, iclass 5, count 2 2006.229.15:29:56.59#ibcon#enter sib2, iclass 5, count 2 2006.229.15:29:56.59#ibcon#flushed, iclass 5, count 2 2006.229.15:29:56.59#ibcon#about to write, iclass 5, count 2 2006.229.15:29:56.59#ibcon#wrote, iclass 5, count 2 2006.229.15:29:56.59#ibcon#about to read 3, iclass 5, count 2 2006.229.15:29:56.61#ibcon#read 3, iclass 5, count 2 2006.229.15:29:56.61#ibcon#about to read 4, iclass 5, count 2 2006.229.15:29:56.61#ibcon#read 4, iclass 5, count 2 2006.229.15:29:56.61#ibcon#about to read 5, iclass 5, count 2 2006.229.15:29:56.61#ibcon#read 5, iclass 5, count 2 2006.229.15:29:56.61#ibcon#about to read 6, iclass 5, count 2 2006.229.15:29:56.61#ibcon#read 6, iclass 5, count 2 2006.229.15:29:56.61#ibcon#end of sib2, iclass 5, count 2 2006.229.15:29:56.61#ibcon#*mode == 0, iclass 5, count 2 2006.229.15:29:56.61#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.15:29:56.61#ibcon#[25=AT02-07\r\n] 2006.229.15:29:56.61#ibcon#*before write, iclass 5, count 2 2006.229.15:29:56.61#ibcon#enter sib2, iclass 5, count 2 2006.229.15:29:56.61#ibcon#flushed, iclass 5, count 2 2006.229.15:29:56.61#ibcon#about to write, iclass 5, count 2 2006.229.15:29:56.61#ibcon#wrote, iclass 5, count 2 2006.229.15:29:56.61#ibcon#about to read 3, iclass 5, count 2 2006.229.15:29:56.64#ibcon#read 3, iclass 5, count 2 2006.229.15:29:56.64#ibcon#about to read 4, iclass 5, count 2 2006.229.15:29:56.64#ibcon#read 4, iclass 5, count 2 2006.229.15:29:56.64#ibcon#about to read 5, iclass 5, count 2 2006.229.15:29:56.64#ibcon#read 5, iclass 5, count 2 2006.229.15:29:56.64#ibcon#about to read 6, iclass 5, count 2 2006.229.15:29:56.64#ibcon#read 6, iclass 5, count 2 2006.229.15:29:56.64#ibcon#end of sib2, iclass 5, count 2 2006.229.15:29:56.64#ibcon#*after write, iclass 5, count 2 2006.229.15:29:56.64#ibcon#*before return 0, iclass 5, count 2 2006.229.15:29:56.64#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:56.64#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:56.64#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.15:29:56.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:56.64#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:56.76#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:56.76#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:56.76#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:29:56.76#ibcon#first serial, iclass 5, count 0 2006.229.15:29:56.76#ibcon#enter sib2, iclass 5, count 0 2006.229.15:29:56.76#ibcon#flushed, iclass 5, count 0 2006.229.15:29:56.76#ibcon#about to write, iclass 5, count 0 2006.229.15:29:56.76#ibcon#wrote, iclass 5, count 0 2006.229.15:29:56.76#ibcon#about to read 3, iclass 5, count 0 2006.229.15:29:56.78#ibcon#read 3, iclass 5, count 0 2006.229.15:29:56.78#ibcon#about to read 4, iclass 5, count 0 2006.229.15:29:56.78#ibcon#read 4, iclass 5, count 0 2006.229.15:29:56.78#ibcon#about to read 5, iclass 5, count 0 2006.229.15:29:56.78#ibcon#read 5, iclass 5, count 0 2006.229.15:29:56.78#ibcon#about to read 6, iclass 5, count 0 2006.229.15:29:56.78#ibcon#read 6, iclass 5, count 0 2006.229.15:29:56.78#ibcon#end of sib2, iclass 5, count 0 2006.229.15:29:56.78#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:29:56.78#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:29:56.78#ibcon#[25=USB\r\n] 2006.229.15:29:56.78#ibcon#*before write, iclass 5, count 0 2006.229.15:29:56.78#ibcon#enter sib2, iclass 5, count 0 2006.229.15:29:56.78#ibcon#flushed, iclass 5, count 0 2006.229.15:29:56.78#ibcon#about to write, iclass 5, count 0 2006.229.15:29:56.78#ibcon#wrote, iclass 5, count 0 2006.229.15:29:56.78#ibcon#about to read 3, iclass 5, count 0 2006.229.15:29:56.81#ibcon#read 3, iclass 5, count 0 2006.229.15:29:56.81#ibcon#about to read 4, iclass 5, count 0 2006.229.15:29:56.81#ibcon#read 4, iclass 5, count 0 2006.229.15:29:56.81#ibcon#about to read 5, iclass 5, count 0 2006.229.15:29:56.81#ibcon#read 5, iclass 5, count 0 2006.229.15:29:56.81#ibcon#about to read 6, iclass 5, count 0 2006.229.15:29:56.81#ibcon#read 6, iclass 5, count 0 2006.229.15:29:56.81#ibcon#end of sib2, iclass 5, count 0 2006.229.15:29:56.81#ibcon#*after write, iclass 5, count 0 2006.229.15:29:56.81#ibcon#*before return 0, iclass 5, count 0 2006.229.15:29:56.81#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:56.81#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:56.81#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:29:56.81#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:29:56.81$vck44/valo=3,564.99 2006.229.15:29:56.81#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.15:29:56.81#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.15:29:56.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:56.81#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:56.81#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:56.81#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:56.81#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:29:56.81#ibcon#first serial, iclass 7, count 0 2006.229.15:29:56.81#ibcon#enter sib2, iclass 7, count 0 2006.229.15:29:56.81#ibcon#flushed, iclass 7, count 0 2006.229.15:29:56.81#ibcon#about to write, iclass 7, count 0 2006.229.15:29:56.81#ibcon#wrote, iclass 7, count 0 2006.229.15:29:56.81#ibcon#about to read 3, iclass 7, count 0 2006.229.15:29:56.83#ibcon#read 3, iclass 7, count 0 2006.229.15:29:56.83#ibcon#about to read 4, iclass 7, count 0 2006.229.15:29:56.83#ibcon#read 4, iclass 7, count 0 2006.229.15:29:56.83#ibcon#about to read 5, iclass 7, count 0 2006.229.15:29:56.83#ibcon#read 5, iclass 7, count 0 2006.229.15:29:56.83#ibcon#about to read 6, iclass 7, count 0 2006.229.15:29:56.83#ibcon#read 6, iclass 7, count 0 2006.229.15:29:56.83#ibcon#end of sib2, iclass 7, count 0 2006.229.15:29:56.83#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:29:56.83#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:29:56.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:29:56.83#ibcon#*before write, iclass 7, count 0 2006.229.15:29:56.83#ibcon#enter sib2, iclass 7, count 0 2006.229.15:29:56.83#ibcon#flushed, iclass 7, count 0 2006.229.15:29:56.83#ibcon#about to write, iclass 7, count 0 2006.229.15:29:56.83#ibcon#wrote, iclass 7, count 0 2006.229.15:29:56.83#ibcon#about to read 3, iclass 7, count 0 2006.229.15:29:56.87#ibcon#read 3, iclass 7, count 0 2006.229.15:29:56.87#ibcon#about to read 4, iclass 7, count 0 2006.229.15:29:56.87#ibcon#read 4, iclass 7, count 0 2006.229.15:29:56.87#ibcon#about to read 5, iclass 7, count 0 2006.229.15:29:56.87#ibcon#read 5, iclass 7, count 0 2006.229.15:29:56.87#ibcon#about to read 6, iclass 7, count 0 2006.229.15:29:56.87#ibcon#read 6, iclass 7, count 0 2006.229.15:29:56.87#ibcon#end of sib2, iclass 7, count 0 2006.229.15:29:56.87#ibcon#*after write, iclass 7, count 0 2006.229.15:29:56.87#ibcon#*before return 0, iclass 7, count 0 2006.229.15:29:56.87#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:56.87#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:56.87#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:29:56.87#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:29:56.87$vck44/va=3,6 2006.229.15:29:56.87#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.15:29:56.87#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.15:29:56.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:56.87#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:29:56.93#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:29:56.93#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:29:56.93#ibcon#enter wrdev, iclass 11, count 2 2006.229.15:29:56.93#ibcon#first serial, iclass 11, count 2 2006.229.15:29:56.93#ibcon#enter sib2, iclass 11, count 2 2006.229.15:29:56.93#ibcon#flushed, iclass 11, count 2 2006.229.15:29:56.93#ibcon#about to write, iclass 11, count 2 2006.229.15:29:56.93#ibcon#wrote, iclass 11, count 2 2006.229.15:29:56.93#ibcon#about to read 3, iclass 11, count 2 2006.229.15:29:56.95#ibcon#read 3, iclass 11, count 2 2006.229.15:29:56.95#ibcon#about to read 4, iclass 11, count 2 2006.229.15:29:56.95#ibcon#read 4, iclass 11, count 2 2006.229.15:29:56.95#ibcon#about to read 5, iclass 11, count 2 2006.229.15:29:56.95#ibcon#read 5, iclass 11, count 2 2006.229.15:29:56.95#ibcon#about to read 6, iclass 11, count 2 2006.229.15:29:56.95#ibcon#read 6, iclass 11, count 2 2006.229.15:29:56.95#ibcon#end of sib2, iclass 11, count 2 2006.229.15:29:56.95#ibcon#*mode == 0, iclass 11, count 2 2006.229.15:29:56.95#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.15:29:56.95#ibcon#[25=AT03-06\r\n] 2006.229.15:29:56.95#ibcon#*before write, iclass 11, count 2 2006.229.15:29:56.95#ibcon#enter sib2, iclass 11, count 2 2006.229.15:29:56.95#ibcon#flushed, iclass 11, count 2 2006.229.15:29:56.95#ibcon#about to write, iclass 11, count 2 2006.229.15:29:56.95#ibcon#wrote, iclass 11, count 2 2006.229.15:29:56.95#ibcon#about to read 3, iclass 11, count 2 2006.229.15:29:56.98#ibcon#read 3, iclass 11, count 2 2006.229.15:29:56.98#ibcon#about to read 4, iclass 11, count 2 2006.229.15:29:56.98#ibcon#read 4, iclass 11, count 2 2006.229.15:29:56.98#ibcon#about to read 5, iclass 11, count 2 2006.229.15:29:56.98#ibcon#read 5, iclass 11, count 2 2006.229.15:29:56.98#ibcon#about to read 6, iclass 11, count 2 2006.229.15:29:56.98#ibcon#read 6, iclass 11, count 2 2006.229.15:29:56.98#ibcon#end of sib2, iclass 11, count 2 2006.229.15:29:56.98#ibcon#*after write, iclass 11, count 2 2006.229.15:29:56.98#ibcon#*before return 0, iclass 11, count 2 2006.229.15:29:56.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:29:56.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.15:29:56.98#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.15:29:56.98#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:56.98#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:29:57.10#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:29:57.10#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:29:57.10#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:29:57.10#ibcon#first serial, iclass 11, count 0 2006.229.15:29:57.10#ibcon#enter sib2, iclass 11, count 0 2006.229.15:29:57.10#ibcon#flushed, iclass 11, count 0 2006.229.15:29:57.10#ibcon#about to write, iclass 11, count 0 2006.229.15:29:57.10#ibcon#wrote, iclass 11, count 0 2006.229.15:29:57.10#ibcon#about to read 3, iclass 11, count 0 2006.229.15:29:57.12#ibcon#read 3, iclass 11, count 0 2006.229.15:29:57.12#ibcon#about to read 4, iclass 11, count 0 2006.229.15:29:57.12#ibcon#read 4, iclass 11, count 0 2006.229.15:29:57.12#ibcon#about to read 5, iclass 11, count 0 2006.229.15:29:57.12#ibcon#read 5, iclass 11, count 0 2006.229.15:29:57.12#ibcon#about to read 6, iclass 11, count 0 2006.229.15:29:57.12#ibcon#read 6, iclass 11, count 0 2006.229.15:29:57.12#ibcon#end of sib2, iclass 11, count 0 2006.229.15:29:57.12#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:29:57.12#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:29:57.12#ibcon#[25=USB\r\n] 2006.229.15:29:57.12#ibcon#*before write, iclass 11, count 0 2006.229.15:29:57.12#ibcon#enter sib2, iclass 11, count 0 2006.229.15:29:57.12#ibcon#flushed, iclass 11, count 0 2006.229.15:29:57.12#ibcon#about to write, iclass 11, count 0 2006.229.15:29:57.12#ibcon#wrote, iclass 11, count 0 2006.229.15:29:57.12#ibcon#about to read 3, iclass 11, count 0 2006.229.15:29:57.15#ibcon#read 3, iclass 11, count 0 2006.229.15:29:57.15#ibcon#about to read 4, iclass 11, count 0 2006.229.15:29:57.15#ibcon#read 4, iclass 11, count 0 2006.229.15:29:57.15#ibcon#about to read 5, iclass 11, count 0 2006.229.15:29:57.15#ibcon#read 5, iclass 11, count 0 2006.229.15:29:57.15#ibcon#about to read 6, iclass 11, count 0 2006.229.15:29:57.15#ibcon#read 6, iclass 11, count 0 2006.229.15:29:57.15#ibcon#end of sib2, iclass 11, count 0 2006.229.15:29:57.15#ibcon#*after write, iclass 11, count 0 2006.229.15:29:57.15#ibcon#*before return 0, iclass 11, count 0 2006.229.15:29:57.15#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:29:57.15#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.15:29:57.15#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:29:57.15#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:29:57.15$vck44/valo=4,624.99 2006.229.15:29:57.15#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.15:29:57.15#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.15:29:57.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:57.15#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:29:57.15#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:29:57.15#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:29:57.15#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:29:57.15#ibcon#first serial, iclass 13, count 0 2006.229.15:29:57.15#ibcon#enter sib2, iclass 13, count 0 2006.229.15:29:57.15#ibcon#flushed, iclass 13, count 0 2006.229.15:29:57.15#ibcon#about to write, iclass 13, count 0 2006.229.15:29:57.15#ibcon#wrote, iclass 13, count 0 2006.229.15:29:57.15#ibcon#about to read 3, iclass 13, count 0 2006.229.15:29:57.17#ibcon#read 3, iclass 13, count 0 2006.229.15:29:57.17#ibcon#about to read 4, iclass 13, count 0 2006.229.15:29:57.17#ibcon#read 4, iclass 13, count 0 2006.229.15:29:57.17#ibcon#about to read 5, iclass 13, count 0 2006.229.15:29:57.17#ibcon#read 5, iclass 13, count 0 2006.229.15:29:57.17#ibcon#about to read 6, iclass 13, count 0 2006.229.15:29:57.17#ibcon#read 6, iclass 13, count 0 2006.229.15:29:57.17#ibcon#end of sib2, iclass 13, count 0 2006.229.15:29:57.17#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:29:57.17#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:29:57.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:29:57.17#ibcon#*before write, iclass 13, count 0 2006.229.15:29:57.17#ibcon#enter sib2, iclass 13, count 0 2006.229.15:29:57.17#ibcon#flushed, iclass 13, count 0 2006.229.15:29:57.17#ibcon#about to write, iclass 13, count 0 2006.229.15:29:57.17#ibcon#wrote, iclass 13, count 0 2006.229.15:29:57.17#ibcon#about to read 3, iclass 13, count 0 2006.229.15:29:57.21#ibcon#read 3, iclass 13, count 0 2006.229.15:29:57.21#ibcon#about to read 4, iclass 13, count 0 2006.229.15:29:57.21#ibcon#read 4, iclass 13, count 0 2006.229.15:29:57.21#ibcon#about to read 5, iclass 13, count 0 2006.229.15:29:57.21#ibcon#read 5, iclass 13, count 0 2006.229.15:29:57.21#ibcon#about to read 6, iclass 13, count 0 2006.229.15:29:57.21#ibcon#read 6, iclass 13, count 0 2006.229.15:29:57.21#ibcon#end of sib2, iclass 13, count 0 2006.229.15:29:57.21#ibcon#*after write, iclass 13, count 0 2006.229.15:29:57.21#ibcon#*before return 0, iclass 13, count 0 2006.229.15:29:57.21#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:29:57.21#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.15:29:57.21#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:29:57.21#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:29:57.21$vck44/va=4,7 2006.229.15:29:57.21#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.15:29:57.21#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.15:29:57.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:57.21#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:29:57.27#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:29:57.27#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:29:57.27#ibcon#enter wrdev, iclass 15, count 2 2006.229.15:29:57.27#ibcon#first serial, iclass 15, count 2 2006.229.15:29:57.27#ibcon#enter sib2, iclass 15, count 2 2006.229.15:29:57.27#ibcon#flushed, iclass 15, count 2 2006.229.15:29:57.27#ibcon#about to write, iclass 15, count 2 2006.229.15:29:57.27#ibcon#wrote, iclass 15, count 2 2006.229.15:29:57.27#ibcon#about to read 3, iclass 15, count 2 2006.229.15:29:57.29#ibcon#read 3, iclass 15, count 2 2006.229.15:29:57.29#ibcon#about to read 4, iclass 15, count 2 2006.229.15:29:57.29#ibcon#read 4, iclass 15, count 2 2006.229.15:29:57.29#ibcon#about to read 5, iclass 15, count 2 2006.229.15:29:57.29#ibcon#read 5, iclass 15, count 2 2006.229.15:29:57.29#ibcon#about to read 6, iclass 15, count 2 2006.229.15:29:57.29#ibcon#read 6, iclass 15, count 2 2006.229.15:29:57.29#ibcon#end of sib2, iclass 15, count 2 2006.229.15:29:57.29#ibcon#*mode == 0, iclass 15, count 2 2006.229.15:29:57.29#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.15:29:57.29#ibcon#[25=AT04-07\r\n] 2006.229.15:29:57.29#ibcon#*before write, iclass 15, count 2 2006.229.15:29:57.29#ibcon#enter sib2, iclass 15, count 2 2006.229.15:29:57.29#ibcon#flushed, iclass 15, count 2 2006.229.15:29:57.29#ibcon#about to write, iclass 15, count 2 2006.229.15:29:57.29#ibcon#wrote, iclass 15, count 2 2006.229.15:29:57.29#ibcon#about to read 3, iclass 15, count 2 2006.229.15:29:57.32#ibcon#read 3, iclass 15, count 2 2006.229.15:29:57.32#ibcon#about to read 4, iclass 15, count 2 2006.229.15:29:57.32#ibcon#read 4, iclass 15, count 2 2006.229.15:29:57.32#ibcon#about to read 5, iclass 15, count 2 2006.229.15:29:57.32#ibcon#read 5, iclass 15, count 2 2006.229.15:29:57.32#ibcon#about to read 6, iclass 15, count 2 2006.229.15:29:57.32#ibcon#read 6, iclass 15, count 2 2006.229.15:29:57.32#ibcon#end of sib2, iclass 15, count 2 2006.229.15:29:57.32#ibcon#*after write, iclass 15, count 2 2006.229.15:29:57.32#ibcon#*before return 0, iclass 15, count 2 2006.229.15:29:57.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:29:57.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.15:29:57.32#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.15:29:57.32#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:57.32#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:29:57.44#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:29:57.44#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:29:57.44#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:29:57.44#ibcon#first serial, iclass 15, count 0 2006.229.15:29:57.44#ibcon#enter sib2, iclass 15, count 0 2006.229.15:29:57.44#ibcon#flushed, iclass 15, count 0 2006.229.15:29:57.44#ibcon#about to write, iclass 15, count 0 2006.229.15:29:57.44#ibcon#wrote, iclass 15, count 0 2006.229.15:29:57.44#ibcon#about to read 3, iclass 15, count 0 2006.229.15:29:57.46#ibcon#read 3, iclass 15, count 0 2006.229.15:29:57.46#ibcon#about to read 4, iclass 15, count 0 2006.229.15:29:57.46#ibcon#read 4, iclass 15, count 0 2006.229.15:29:57.46#ibcon#about to read 5, iclass 15, count 0 2006.229.15:29:57.46#ibcon#read 5, iclass 15, count 0 2006.229.15:29:57.46#ibcon#about to read 6, iclass 15, count 0 2006.229.15:29:57.46#ibcon#read 6, iclass 15, count 0 2006.229.15:29:57.46#ibcon#end of sib2, iclass 15, count 0 2006.229.15:29:57.46#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:29:57.46#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:29:57.46#ibcon#[25=USB\r\n] 2006.229.15:29:57.46#ibcon#*before write, iclass 15, count 0 2006.229.15:29:57.46#ibcon#enter sib2, iclass 15, count 0 2006.229.15:29:57.46#ibcon#flushed, iclass 15, count 0 2006.229.15:29:57.46#ibcon#about to write, iclass 15, count 0 2006.229.15:29:57.46#ibcon#wrote, iclass 15, count 0 2006.229.15:29:57.46#ibcon#about to read 3, iclass 15, count 0 2006.229.15:29:57.49#ibcon#read 3, iclass 15, count 0 2006.229.15:29:57.49#ibcon#about to read 4, iclass 15, count 0 2006.229.15:29:57.49#ibcon#read 4, iclass 15, count 0 2006.229.15:29:57.49#ibcon#about to read 5, iclass 15, count 0 2006.229.15:29:57.49#ibcon#read 5, iclass 15, count 0 2006.229.15:29:57.49#ibcon#about to read 6, iclass 15, count 0 2006.229.15:29:57.49#ibcon#read 6, iclass 15, count 0 2006.229.15:29:57.49#ibcon#end of sib2, iclass 15, count 0 2006.229.15:29:57.49#ibcon#*after write, iclass 15, count 0 2006.229.15:29:57.49#ibcon#*before return 0, iclass 15, count 0 2006.229.15:29:57.49#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:29:57.49#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.15:29:57.49#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:29:57.49#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:29:57.49$vck44/valo=5,734.99 2006.229.15:29:57.49#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.15:29:57.49#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.15:29:57.49#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:57.49#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:29:57.49#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:29:57.49#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:29:57.49#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:29:57.49#ibcon#first serial, iclass 17, count 0 2006.229.15:29:57.49#ibcon#enter sib2, iclass 17, count 0 2006.229.15:29:57.49#ibcon#flushed, iclass 17, count 0 2006.229.15:29:57.49#ibcon#about to write, iclass 17, count 0 2006.229.15:29:57.49#ibcon#wrote, iclass 17, count 0 2006.229.15:29:57.49#ibcon#about to read 3, iclass 17, count 0 2006.229.15:29:57.51#ibcon#read 3, iclass 17, count 0 2006.229.15:29:57.51#ibcon#about to read 4, iclass 17, count 0 2006.229.15:29:57.51#ibcon#read 4, iclass 17, count 0 2006.229.15:29:57.51#ibcon#about to read 5, iclass 17, count 0 2006.229.15:29:57.51#ibcon#read 5, iclass 17, count 0 2006.229.15:29:57.51#ibcon#about to read 6, iclass 17, count 0 2006.229.15:29:57.51#ibcon#read 6, iclass 17, count 0 2006.229.15:29:57.51#ibcon#end of sib2, iclass 17, count 0 2006.229.15:29:57.51#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:29:57.51#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:29:57.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:29:57.51#ibcon#*before write, iclass 17, count 0 2006.229.15:29:57.51#ibcon#enter sib2, iclass 17, count 0 2006.229.15:29:57.51#ibcon#flushed, iclass 17, count 0 2006.229.15:29:57.51#ibcon#about to write, iclass 17, count 0 2006.229.15:29:57.51#ibcon#wrote, iclass 17, count 0 2006.229.15:29:57.51#ibcon#about to read 3, iclass 17, count 0 2006.229.15:29:57.55#ibcon#read 3, iclass 17, count 0 2006.229.15:29:57.55#ibcon#about to read 4, iclass 17, count 0 2006.229.15:29:57.55#ibcon#read 4, iclass 17, count 0 2006.229.15:29:57.55#ibcon#about to read 5, iclass 17, count 0 2006.229.15:29:57.55#ibcon#read 5, iclass 17, count 0 2006.229.15:29:57.55#ibcon#about to read 6, iclass 17, count 0 2006.229.15:29:57.55#ibcon#read 6, iclass 17, count 0 2006.229.15:29:57.55#ibcon#end of sib2, iclass 17, count 0 2006.229.15:29:57.55#ibcon#*after write, iclass 17, count 0 2006.229.15:29:57.55#ibcon#*before return 0, iclass 17, count 0 2006.229.15:29:57.55#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:29:57.55#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:29:57.55#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:29:57.55#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:29:57.55$vck44/va=5,4 2006.229.15:29:57.55#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.15:29:57.55#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.15:29:57.55#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:57.55#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:29:57.61#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:29:57.61#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:29:57.61#ibcon#enter wrdev, iclass 19, count 2 2006.229.15:29:57.61#ibcon#first serial, iclass 19, count 2 2006.229.15:29:57.61#ibcon#enter sib2, iclass 19, count 2 2006.229.15:29:57.61#ibcon#flushed, iclass 19, count 2 2006.229.15:29:57.61#ibcon#about to write, iclass 19, count 2 2006.229.15:29:57.61#ibcon#wrote, iclass 19, count 2 2006.229.15:29:57.61#ibcon#about to read 3, iclass 19, count 2 2006.229.15:29:57.63#ibcon#read 3, iclass 19, count 2 2006.229.15:29:57.63#ibcon#about to read 4, iclass 19, count 2 2006.229.15:29:57.63#ibcon#read 4, iclass 19, count 2 2006.229.15:29:57.63#ibcon#about to read 5, iclass 19, count 2 2006.229.15:29:57.63#ibcon#read 5, iclass 19, count 2 2006.229.15:29:57.63#ibcon#about to read 6, iclass 19, count 2 2006.229.15:29:57.63#ibcon#read 6, iclass 19, count 2 2006.229.15:29:57.63#ibcon#end of sib2, iclass 19, count 2 2006.229.15:29:57.63#ibcon#*mode == 0, iclass 19, count 2 2006.229.15:29:57.63#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.15:29:57.63#ibcon#[25=AT05-04\r\n] 2006.229.15:29:57.63#ibcon#*before write, iclass 19, count 2 2006.229.15:29:57.63#ibcon#enter sib2, iclass 19, count 2 2006.229.15:29:57.63#ibcon#flushed, iclass 19, count 2 2006.229.15:29:57.63#ibcon#about to write, iclass 19, count 2 2006.229.15:29:57.63#ibcon#wrote, iclass 19, count 2 2006.229.15:29:57.63#ibcon#about to read 3, iclass 19, count 2 2006.229.15:29:57.66#ibcon#read 3, iclass 19, count 2 2006.229.15:29:57.66#ibcon#about to read 4, iclass 19, count 2 2006.229.15:29:57.66#ibcon#read 4, iclass 19, count 2 2006.229.15:29:57.66#ibcon#about to read 5, iclass 19, count 2 2006.229.15:29:57.66#ibcon#read 5, iclass 19, count 2 2006.229.15:29:57.66#ibcon#about to read 6, iclass 19, count 2 2006.229.15:29:57.66#ibcon#read 6, iclass 19, count 2 2006.229.15:29:57.66#ibcon#end of sib2, iclass 19, count 2 2006.229.15:29:57.66#ibcon#*after write, iclass 19, count 2 2006.229.15:29:57.66#ibcon#*before return 0, iclass 19, count 2 2006.229.15:29:57.66#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:29:57.66#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:29:57.66#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.15:29:57.66#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:57.66#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:29:57.78#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:29:57.78#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:29:57.78#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:29:57.78#ibcon#first serial, iclass 19, count 0 2006.229.15:29:57.78#ibcon#enter sib2, iclass 19, count 0 2006.229.15:29:57.78#ibcon#flushed, iclass 19, count 0 2006.229.15:29:57.78#ibcon#about to write, iclass 19, count 0 2006.229.15:29:57.78#ibcon#wrote, iclass 19, count 0 2006.229.15:29:57.78#ibcon#about to read 3, iclass 19, count 0 2006.229.15:29:57.80#ibcon#read 3, iclass 19, count 0 2006.229.15:29:57.80#ibcon#about to read 4, iclass 19, count 0 2006.229.15:29:57.80#ibcon#read 4, iclass 19, count 0 2006.229.15:29:57.80#ibcon#about to read 5, iclass 19, count 0 2006.229.15:29:57.80#ibcon#read 5, iclass 19, count 0 2006.229.15:29:57.80#ibcon#about to read 6, iclass 19, count 0 2006.229.15:29:57.80#ibcon#read 6, iclass 19, count 0 2006.229.15:29:57.80#ibcon#end of sib2, iclass 19, count 0 2006.229.15:29:57.80#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:29:57.80#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:29:57.80#ibcon#[25=USB\r\n] 2006.229.15:29:57.80#ibcon#*before write, iclass 19, count 0 2006.229.15:29:57.80#ibcon#enter sib2, iclass 19, count 0 2006.229.15:29:57.80#ibcon#flushed, iclass 19, count 0 2006.229.15:29:57.80#ibcon#about to write, iclass 19, count 0 2006.229.15:29:57.80#ibcon#wrote, iclass 19, count 0 2006.229.15:29:57.80#ibcon#about to read 3, iclass 19, count 0 2006.229.15:29:57.83#ibcon#read 3, iclass 19, count 0 2006.229.15:29:57.83#ibcon#about to read 4, iclass 19, count 0 2006.229.15:29:57.83#ibcon#read 4, iclass 19, count 0 2006.229.15:29:57.83#ibcon#about to read 5, iclass 19, count 0 2006.229.15:29:57.83#ibcon#read 5, iclass 19, count 0 2006.229.15:29:57.83#ibcon#about to read 6, iclass 19, count 0 2006.229.15:29:57.83#ibcon#read 6, iclass 19, count 0 2006.229.15:29:57.83#ibcon#end of sib2, iclass 19, count 0 2006.229.15:29:57.83#ibcon#*after write, iclass 19, count 0 2006.229.15:29:57.83#ibcon#*before return 0, iclass 19, count 0 2006.229.15:29:57.83#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:29:57.83#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:29:57.83#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:29:57.83#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:29:57.83$vck44/valo=6,814.99 2006.229.15:29:57.83#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.15:29:57.83#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.15:29:57.83#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:57.83#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:29:57.83#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:29:57.83#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:29:57.83#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:29:57.83#ibcon#first serial, iclass 21, count 0 2006.229.15:29:57.83#ibcon#enter sib2, iclass 21, count 0 2006.229.15:29:57.83#ibcon#flushed, iclass 21, count 0 2006.229.15:29:57.83#ibcon#about to write, iclass 21, count 0 2006.229.15:29:57.83#ibcon#wrote, iclass 21, count 0 2006.229.15:29:57.83#ibcon#about to read 3, iclass 21, count 0 2006.229.15:29:57.85#ibcon#read 3, iclass 21, count 0 2006.229.15:29:57.85#ibcon#about to read 4, iclass 21, count 0 2006.229.15:29:57.85#ibcon#read 4, iclass 21, count 0 2006.229.15:29:57.85#ibcon#about to read 5, iclass 21, count 0 2006.229.15:29:57.85#ibcon#read 5, iclass 21, count 0 2006.229.15:29:57.85#ibcon#about to read 6, iclass 21, count 0 2006.229.15:29:57.85#ibcon#read 6, iclass 21, count 0 2006.229.15:29:57.85#ibcon#end of sib2, iclass 21, count 0 2006.229.15:29:57.85#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:29:57.85#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:29:57.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:29:57.85#ibcon#*before write, iclass 21, count 0 2006.229.15:29:57.85#ibcon#enter sib2, iclass 21, count 0 2006.229.15:29:57.85#ibcon#flushed, iclass 21, count 0 2006.229.15:29:57.85#ibcon#about to write, iclass 21, count 0 2006.229.15:29:57.85#ibcon#wrote, iclass 21, count 0 2006.229.15:29:57.85#ibcon#about to read 3, iclass 21, count 0 2006.229.15:29:57.89#ibcon#read 3, iclass 21, count 0 2006.229.15:29:57.89#ibcon#about to read 4, iclass 21, count 0 2006.229.15:29:57.89#ibcon#read 4, iclass 21, count 0 2006.229.15:29:57.89#ibcon#about to read 5, iclass 21, count 0 2006.229.15:29:57.89#ibcon#read 5, iclass 21, count 0 2006.229.15:29:57.89#ibcon#about to read 6, iclass 21, count 0 2006.229.15:29:57.89#ibcon#read 6, iclass 21, count 0 2006.229.15:29:57.89#ibcon#end of sib2, iclass 21, count 0 2006.229.15:29:57.89#ibcon#*after write, iclass 21, count 0 2006.229.15:29:57.89#ibcon#*before return 0, iclass 21, count 0 2006.229.15:29:57.89#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:29:57.89#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:29:57.89#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:29:57.89#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:29:57.89$vck44/va=6,4 2006.229.15:29:57.89#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.15:29:57.89#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.15:29:57.89#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:57.89#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:29:57.95#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:29:57.95#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:29:57.95#ibcon#enter wrdev, iclass 23, count 2 2006.229.15:29:57.95#ibcon#first serial, iclass 23, count 2 2006.229.15:29:57.95#ibcon#enter sib2, iclass 23, count 2 2006.229.15:29:57.95#ibcon#flushed, iclass 23, count 2 2006.229.15:29:57.95#ibcon#about to write, iclass 23, count 2 2006.229.15:29:57.95#ibcon#wrote, iclass 23, count 2 2006.229.15:29:57.95#ibcon#about to read 3, iclass 23, count 2 2006.229.15:29:57.97#ibcon#read 3, iclass 23, count 2 2006.229.15:29:57.97#ibcon#about to read 4, iclass 23, count 2 2006.229.15:29:57.97#ibcon#read 4, iclass 23, count 2 2006.229.15:29:57.97#ibcon#about to read 5, iclass 23, count 2 2006.229.15:29:57.97#ibcon#read 5, iclass 23, count 2 2006.229.15:29:57.97#ibcon#about to read 6, iclass 23, count 2 2006.229.15:29:57.97#ibcon#read 6, iclass 23, count 2 2006.229.15:29:57.97#ibcon#end of sib2, iclass 23, count 2 2006.229.15:29:57.97#ibcon#*mode == 0, iclass 23, count 2 2006.229.15:29:57.97#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.15:29:57.97#ibcon#[25=AT06-04\r\n] 2006.229.15:29:57.97#ibcon#*before write, iclass 23, count 2 2006.229.15:29:57.97#ibcon#enter sib2, iclass 23, count 2 2006.229.15:29:57.97#ibcon#flushed, iclass 23, count 2 2006.229.15:29:57.97#ibcon#about to write, iclass 23, count 2 2006.229.15:29:57.97#ibcon#wrote, iclass 23, count 2 2006.229.15:29:57.97#ibcon#about to read 3, iclass 23, count 2 2006.229.15:29:58.00#ibcon#read 3, iclass 23, count 2 2006.229.15:29:58.00#ibcon#about to read 4, iclass 23, count 2 2006.229.15:29:58.00#ibcon#read 4, iclass 23, count 2 2006.229.15:29:58.00#ibcon#about to read 5, iclass 23, count 2 2006.229.15:29:58.00#ibcon#read 5, iclass 23, count 2 2006.229.15:29:58.00#ibcon#about to read 6, iclass 23, count 2 2006.229.15:29:58.00#ibcon#read 6, iclass 23, count 2 2006.229.15:29:58.00#ibcon#end of sib2, iclass 23, count 2 2006.229.15:29:58.00#ibcon#*after write, iclass 23, count 2 2006.229.15:29:58.00#ibcon#*before return 0, iclass 23, count 2 2006.229.15:29:58.00#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:29:58.00#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:29:58.00#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.15:29:58.00#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:58.00#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:29:58.12#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:29:58.12#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:29:58.12#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:29:58.12#ibcon#first serial, iclass 23, count 0 2006.229.15:29:58.12#ibcon#enter sib2, iclass 23, count 0 2006.229.15:29:58.12#ibcon#flushed, iclass 23, count 0 2006.229.15:29:58.12#ibcon#about to write, iclass 23, count 0 2006.229.15:29:58.12#ibcon#wrote, iclass 23, count 0 2006.229.15:29:58.12#ibcon#about to read 3, iclass 23, count 0 2006.229.15:29:58.14#ibcon#read 3, iclass 23, count 0 2006.229.15:29:58.14#ibcon#about to read 4, iclass 23, count 0 2006.229.15:29:58.14#ibcon#read 4, iclass 23, count 0 2006.229.15:29:58.14#ibcon#about to read 5, iclass 23, count 0 2006.229.15:29:58.14#ibcon#read 5, iclass 23, count 0 2006.229.15:29:58.14#ibcon#about to read 6, iclass 23, count 0 2006.229.15:29:58.14#ibcon#read 6, iclass 23, count 0 2006.229.15:29:58.14#ibcon#end of sib2, iclass 23, count 0 2006.229.15:29:58.14#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:29:58.14#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:29:58.14#ibcon#[25=USB\r\n] 2006.229.15:29:58.14#ibcon#*before write, iclass 23, count 0 2006.229.15:29:58.14#ibcon#enter sib2, iclass 23, count 0 2006.229.15:29:58.14#ibcon#flushed, iclass 23, count 0 2006.229.15:29:58.14#ibcon#about to write, iclass 23, count 0 2006.229.15:29:58.14#ibcon#wrote, iclass 23, count 0 2006.229.15:29:58.14#ibcon#about to read 3, iclass 23, count 0 2006.229.15:29:58.17#ibcon#read 3, iclass 23, count 0 2006.229.15:29:58.17#ibcon#about to read 4, iclass 23, count 0 2006.229.15:29:58.17#ibcon#read 4, iclass 23, count 0 2006.229.15:29:58.17#ibcon#about to read 5, iclass 23, count 0 2006.229.15:29:58.17#ibcon#read 5, iclass 23, count 0 2006.229.15:29:58.17#ibcon#about to read 6, iclass 23, count 0 2006.229.15:29:58.17#ibcon#read 6, iclass 23, count 0 2006.229.15:29:58.17#ibcon#end of sib2, iclass 23, count 0 2006.229.15:29:58.17#ibcon#*after write, iclass 23, count 0 2006.229.15:29:58.17#ibcon#*before return 0, iclass 23, count 0 2006.229.15:29:58.17#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:29:58.17#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:29:58.17#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:29:58.17#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:29:58.17$vck44/valo=7,864.99 2006.229.15:29:58.17#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:29:58.17#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:29:58.17#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:58.17#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:29:58.17#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:29:58.17#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:29:58.17#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:29:58.17#ibcon#first serial, iclass 25, count 0 2006.229.15:29:58.17#ibcon#enter sib2, iclass 25, count 0 2006.229.15:29:58.17#ibcon#flushed, iclass 25, count 0 2006.229.15:29:58.17#ibcon#about to write, iclass 25, count 0 2006.229.15:29:58.17#ibcon#wrote, iclass 25, count 0 2006.229.15:29:58.17#ibcon#about to read 3, iclass 25, count 0 2006.229.15:29:58.19#ibcon#read 3, iclass 25, count 0 2006.229.15:29:58.19#ibcon#about to read 4, iclass 25, count 0 2006.229.15:29:58.19#ibcon#read 4, iclass 25, count 0 2006.229.15:29:58.19#ibcon#about to read 5, iclass 25, count 0 2006.229.15:29:58.19#ibcon#read 5, iclass 25, count 0 2006.229.15:29:58.19#ibcon#about to read 6, iclass 25, count 0 2006.229.15:29:58.19#ibcon#read 6, iclass 25, count 0 2006.229.15:29:58.19#ibcon#end of sib2, iclass 25, count 0 2006.229.15:29:58.19#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:29:58.19#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:29:58.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:29:58.19#ibcon#*before write, iclass 25, count 0 2006.229.15:29:58.19#ibcon#enter sib2, iclass 25, count 0 2006.229.15:29:58.19#ibcon#flushed, iclass 25, count 0 2006.229.15:29:58.19#ibcon#about to write, iclass 25, count 0 2006.229.15:29:58.19#ibcon#wrote, iclass 25, count 0 2006.229.15:29:58.19#ibcon#about to read 3, iclass 25, count 0 2006.229.15:29:58.23#ibcon#read 3, iclass 25, count 0 2006.229.15:29:58.23#ibcon#about to read 4, iclass 25, count 0 2006.229.15:29:58.23#ibcon#read 4, iclass 25, count 0 2006.229.15:29:58.23#ibcon#about to read 5, iclass 25, count 0 2006.229.15:29:58.23#ibcon#read 5, iclass 25, count 0 2006.229.15:29:58.23#ibcon#about to read 6, iclass 25, count 0 2006.229.15:29:58.23#ibcon#read 6, iclass 25, count 0 2006.229.15:29:58.23#ibcon#end of sib2, iclass 25, count 0 2006.229.15:29:58.23#ibcon#*after write, iclass 25, count 0 2006.229.15:29:58.23#ibcon#*before return 0, iclass 25, count 0 2006.229.15:29:58.23#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:29:58.23#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:29:58.23#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:29:58.23#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:29:58.23$vck44/va=7,5 2006.229.15:29:58.23#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.15:29:58.23#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.15:29:58.23#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:58.23#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:29:58.29#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:29:58.29#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:29:58.29#ibcon#enter wrdev, iclass 27, count 2 2006.229.15:29:58.29#ibcon#first serial, iclass 27, count 2 2006.229.15:29:58.29#ibcon#enter sib2, iclass 27, count 2 2006.229.15:29:58.29#ibcon#flushed, iclass 27, count 2 2006.229.15:29:58.29#ibcon#about to write, iclass 27, count 2 2006.229.15:29:58.29#ibcon#wrote, iclass 27, count 2 2006.229.15:29:58.29#ibcon#about to read 3, iclass 27, count 2 2006.229.15:29:58.31#ibcon#read 3, iclass 27, count 2 2006.229.15:29:58.31#ibcon#about to read 4, iclass 27, count 2 2006.229.15:29:58.31#ibcon#read 4, iclass 27, count 2 2006.229.15:29:58.31#ibcon#about to read 5, iclass 27, count 2 2006.229.15:29:58.31#ibcon#read 5, iclass 27, count 2 2006.229.15:29:58.31#ibcon#about to read 6, iclass 27, count 2 2006.229.15:29:58.31#ibcon#read 6, iclass 27, count 2 2006.229.15:29:58.31#ibcon#end of sib2, iclass 27, count 2 2006.229.15:29:58.31#ibcon#*mode == 0, iclass 27, count 2 2006.229.15:29:58.31#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.15:29:58.31#ibcon#[25=AT07-05\r\n] 2006.229.15:29:58.31#ibcon#*before write, iclass 27, count 2 2006.229.15:29:58.31#ibcon#enter sib2, iclass 27, count 2 2006.229.15:29:58.31#ibcon#flushed, iclass 27, count 2 2006.229.15:29:58.31#ibcon#about to write, iclass 27, count 2 2006.229.15:29:58.31#ibcon#wrote, iclass 27, count 2 2006.229.15:29:58.31#ibcon#about to read 3, iclass 27, count 2 2006.229.15:29:58.34#ibcon#read 3, iclass 27, count 2 2006.229.15:29:58.34#ibcon#about to read 4, iclass 27, count 2 2006.229.15:29:58.34#ibcon#read 4, iclass 27, count 2 2006.229.15:29:58.34#ibcon#about to read 5, iclass 27, count 2 2006.229.15:29:58.34#ibcon#read 5, iclass 27, count 2 2006.229.15:29:58.34#ibcon#about to read 6, iclass 27, count 2 2006.229.15:29:58.34#ibcon#read 6, iclass 27, count 2 2006.229.15:29:58.34#ibcon#end of sib2, iclass 27, count 2 2006.229.15:29:58.34#ibcon#*after write, iclass 27, count 2 2006.229.15:29:58.34#ibcon#*before return 0, iclass 27, count 2 2006.229.15:29:58.34#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:29:58.34#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:29:58.34#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.15:29:58.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:58.34#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:29:58.46#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:29:58.46#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:29:58.46#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:29:58.46#ibcon#first serial, iclass 27, count 0 2006.229.15:29:58.46#ibcon#enter sib2, iclass 27, count 0 2006.229.15:29:58.46#ibcon#flushed, iclass 27, count 0 2006.229.15:29:58.46#ibcon#about to write, iclass 27, count 0 2006.229.15:29:58.46#ibcon#wrote, iclass 27, count 0 2006.229.15:29:58.46#ibcon#about to read 3, iclass 27, count 0 2006.229.15:29:58.48#ibcon#read 3, iclass 27, count 0 2006.229.15:29:58.48#ibcon#about to read 4, iclass 27, count 0 2006.229.15:29:58.48#ibcon#read 4, iclass 27, count 0 2006.229.15:29:58.48#ibcon#about to read 5, iclass 27, count 0 2006.229.15:29:58.48#ibcon#read 5, iclass 27, count 0 2006.229.15:29:58.48#ibcon#about to read 6, iclass 27, count 0 2006.229.15:29:58.48#ibcon#read 6, iclass 27, count 0 2006.229.15:29:58.48#ibcon#end of sib2, iclass 27, count 0 2006.229.15:29:58.48#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:29:58.48#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:29:58.48#ibcon#[25=USB\r\n] 2006.229.15:29:58.48#ibcon#*before write, iclass 27, count 0 2006.229.15:29:58.48#ibcon#enter sib2, iclass 27, count 0 2006.229.15:29:58.48#ibcon#flushed, iclass 27, count 0 2006.229.15:29:58.48#ibcon#about to write, iclass 27, count 0 2006.229.15:29:58.48#ibcon#wrote, iclass 27, count 0 2006.229.15:29:58.48#ibcon#about to read 3, iclass 27, count 0 2006.229.15:29:58.51#ibcon#read 3, iclass 27, count 0 2006.229.15:29:58.51#ibcon#about to read 4, iclass 27, count 0 2006.229.15:29:58.51#ibcon#read 4, iclass 27, count 0 2006.229.15:29:58.51#ibcon#about to read 5, iclass 27, count 0 2006.229.15:29:58.51#ibcon#read 5, iclass 27, count 0 2006.229.15:29:58.51#ibcon#about to read 6, iclass 27, count 0 2006.229.15:29:58.51#ibcon#read 6, iclass 27, count 0 2006.229.15:29:58.51#ibcon#end of sib2, iclass 27, count 0 2006.229.15:29:58.51#ibcon#*after write, iclass 27, count 0 2006.229.15:29:58.51#ibcon#*before return 0, iclass 27, count 0 2006.229.15:29:58.51#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:29:58.51#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:29:58.51#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:29:58.51#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:29:58.51$vck44/valo=8,884.99 2006.229.15:29:58.51#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.15:29:58.51#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.15:29:58.51#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:58.51#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:29:58.51#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:29:58.51#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:29:58.51#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:29:58.51#ibcon#first serial, iclass 29, count 0 2006.229.15:29:58.51#ibcon#enter sib2, iclass 29, count 0 2006.229.15:29:58.51#ibcon#flushed, iclass 29, count 0 2006.229.15:29:58.51#ibcon#about to write, iclass 29, count 0 2006.229.15:29:58.51#ibcon#wrote, iclass 29, count 0 2006.229.15:29:58.51#ibcon#about to read 3, iclass 29, count 0 2006.229.15:29:58.53#ibcon#read 3, iclass 29, count 0 2006.229.15:29:58.53#ibcon#about to read 4, iclass 29, count 0 2006.229.15:29:58.53#ibcon#read 4, iclass 29, count 0 2006.229.15:29:58.53#ibcon#about to read 5, iclass 29, count 0 2006.229.15:29:58.53#ibcon#read 5, iclass 29, count 0 2006.229.15:29:58.53#ibcon#about to read 6, iclass 29, count 0 2006.229.15:29:58.53#ibcon#read 6, iclass 29, count 0 2006.229.15:29:58.53#ibcon#end of sib2, iclass 29, count 0 2006.229.15:29:58.53#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:29:58.53#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:29:58.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:29:58.53#ibcon#*before write, iclass 29, count 0 2006.229.15:29:58.53#ibcon#enter sib2, iclass 29, count 0 2006.229.15:29:58.53#ibcon#flushed, iclass 29, count 0 2006.229.15:29:58.53#ibcon#about to write, iclass 29, count 0 2006.229.15:29:58.53#ibcon#wrote, iclass 29, count 0 2006.229.15:29:58.53#ibcon#about to read 3, iclass 29, count 0 2006.229.15:29:58.57#ibcon#read 3, iclass 29, count 0 2006.229.15:29:58.57#ibcon#about to read 4, iclass 29, count 0 2006.229.15:29:58.57#ibcon#read 4, iclass 29, count 0 2006.229.15:29:58.57#ibcon#about to read 5, iclass 29, count 0 2006.229.15:29:58.57#ibcon#read 5, iclass 29, count 0 2006.229.15:29:58.57#ibcon#about to read 6, iclass 29, count 0 2006.229.15:29:58.57#ibcon#read 6, iclass 29, count 0 2006.229.15:29:58.57#ibcon#end of sib2, iclass 29, count 0 2006.229.15:29:58.57#ibcon#*after write, iclass 29, count 0 2006.229.15:29:58.57#ibcon#*before return 0, iclass 29, count 0 2006.229.15:29:58.57#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:29:58.57#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:29:58.57#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:29:58.57#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:29:58.57$vck44/va=8,6 2006.229.15:29:58.57#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.15:29:58.57#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.15:29:58.57#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:58.57#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:29:58.63#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:29:58.63#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:29:58.63#ibcon#enter wrdev, iclass 31, count 2 2006.229.15:29:58.63#ibcon#first serial, iclass 31, count 2 2006.229.15:29:58.63#ibcon#enter sib2, iclass 31, count 2 2006.229.15:29:58.63#ibcon#flushed, iclass 31, count 2 2006.229.15:29:58.63#ibcon#about to write, iclass 31, count 2 2006.229.15:29:58.63#ibcon#wrote, iclass 31, count 2 2006.229.15:29:58.63#ibcon#about to read 3, iclass 31, count 2 2006.229.15:29:58.65#ibcon#read 3, iclass 31, count 2 2006.229.15:29:58.65#ibcon#about to read 4, iclass 31, count 2 2006.229.15:29:58.65#ibcon#read 4, iclass 31, count 2 2006.229.15:29:58.65#ibcon#about to read 5, iclass 31, count 2 2006.229.15:29:58.65#ibcon#read 5, iclass 31, count 2 2006.229.15:29:58.65#ibcon#about to read 6, iclass 31, count 2 2006.229.15:29:58.65#ibcon#read 6, iclass 31, count 2 2006.229.15:29:58.65#ibcon#end of sib2, iclass 31, count 2 2006.229.15:29:58.65#ibcon#*mode == 0, iclass 31, count 2 2006.229.15:29:58.65#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.15:29:58.65#ibcon#[25=AT08-06\r\n] 2006.229.15:29:58.65#ibcon#*before write, iclass 31, count 2 2006.229.15:29:58.65#ibcon#enter sib2, iclass 31, count 2 2006.229.15:29:58.65#ibcon#flushed, iclass 31, count 2 2006.229.15:29:58.65#ibcon#about to write, iclass 31, count 2 2006.229.15:29:58.65#ibcon#wrote, iclass 31, count 2 2006.229.15:29:58.65#ibcon#about to read 3, iclass 31, count 2 2006.229.15:29:58.68#ibcon#read 3, iclass 31, count 2 2006.229.15:29:58.68#ibcon#about to read 4, iclass 31, count 2 2006.229.15:29:58.68#ibcon#read 4, iclass 31, count 2 2006.229.15:29:58.68#ibcon#about to read 5, iclass 31, count 2 2006.229.15:29:58.68#ibcon#read 5, iclass 31, count 2 2006.229.15:29:58.68#ibcon#about to read 6, iclass 31, count 2 2006.229.15:29:58.68#ibcon#read 6, iclass 31, count 2 2006.229.15:29:58.68#ibcon#end of sib2, iclass 31, count 2 2006.229.15:29:58.68#ibcon#*after write, iclass 31, count 2 2006.229.15:29:58.68#ibcon#*before return 0, iclass 31, count 2 2006.229.15:29:58.68#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:29:58.68#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:29:58.68#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.15:29:58.68#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:58.68#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:29:58.80#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:29:58.80#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:29:58.80#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:29:58.80#ibcon#first serial, iclass 31, count 0 2006.229.15:29:58.80#ibcon#enter sib2, iclass 31, count 0 2006.229.15:29:58.80#ibcon#flushed, iclass 31, count 0 2006.229.15:29:58.80#ibcon#about to write, iclass 31, count 0 2006.229.15:29:58.80#ibcon#wrote, iclass 31, count 0 2006.229.15:29:58.80#ibcon#about to read 3, iclass 31, count 0 2006.229.15:29:58.82#ibcon#read 3, iclass 31, count 0 2006.229.15:29:58.82#ibcon#about to read 4, iclass 31, count 0 2006.229.15:29:58.82#ibcon#read 4, iclass 31, count 0 2006.229.15:29:58.82#ibcon#about to read 5, iclass 31, count 0 2006.229.15:29:58.82#ibcon#read 5, iclass 31, count 0 2006.229.15:29:58.82#ibcon#about to read 6, iclass 31, count 0 2006.229.15:29:58.82#ibcon#read 6, iclass 31, count 0 2006.229.15:29:58.82#ibcon#end of sib2, iclass 31, count 0 2006.229.15:29:58.82#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:29:58.82#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:29:58.82#ibcon#[25=USB\r\n] 2006.229.15:29:58.82#ibcon#*before write, iclass 31, count 0 2006.229.15:29:58.82#ibcon#enter sib2, iclass 31, count 0 2006.229.15:29:58.82#ibcon#flushed, iclass 31, count 0 2006.229.15:29:58.82#ibcon#about to write, iclass 31, count 0 2006.229.15:29:58.82#ibcon#wrote, iclass 31, count 0 2006.229.15:29:58.82#ibcon#about to read 3, iclass 31, count 0 2006.229.15:29:58.85#ibcon#read 3, iclass 31, count 0 2006.229.15:29:58.85#ibcon#about to read 4, iclass 31, count 0 2006.229.15:29:58.85#ibcon#read 4, iclass 31, count 0 2006.229.15:29:58.85#ibcon#about to read 5, iclass 31, count 0 2006.229.15:29:58.85#ibcon#read 5, iclass 31, count 0 2006.229.15:29:58.85#ibcon#about to read 6, iclass 31, count 0 2006.229.15:29:58.85#ibcon#read 6, iclass 31, count 0 2006.229.15:29:58.85#ibcon#end of sib2, iclass 31, count 0 2006.229.15:29:58.85#ibcon#*after write, iclass 31, count 0 2006.229.15:29:58.85#ibcon#*before return 0, iclass 31, count 0 2006.229.15:29:58.85#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:29:58.85#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:29:58.85#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:29:58.85#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:29:58.85$vck44/vblo=1,629.99 2006.229.15:29:58.85#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.15:29:58.85#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.15:29:58.85#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:58.85#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:29:58.85#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:29:58.85#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:29:58.85#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:29:58.85#ibcon#first serial, iclass 33, count 0 2006.229.15:29:58.85#ibcon#enter sib2, iclass 33, count 0 2006.229.15:29:58.85#ibcon#flushed, iclass 33, count 0 2006.229.15:29:58.85#ibcon#about to write, iclass 33, count 0 2006.229.15:29:58.85#ibcon#wrote, iclass 33, count 0 2006.229.15:29:58.85#ibcon#about to read 3, iclass 33, count 0 2006.229.15:29:58.87#ibcon#read 3, iclass 33, count 0 2006.229.15:29:58.87#ibcon#about to read 4, iclass 33, count 0 2006.229.15:29:58.87#ibcon#read 4, iclass 33, count 0 2006.229.15:29:58.87#ibcon#about to read 5, iclass 33, count 0 2006.229.15:29:58.87#ibcon#read 5, iclass 33, count 0 2006.229.15:29:58.87#ibcon#about to read 6, iclass 33, count 0 2006.229.15:29:58.87#ibcon#read 6, iclass 33, count 0 2006.229.15:29:58.87#ibcon#end of sib2, iclass 33, count 0 2006.229.15:29:58.87#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:29:58.87#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:29:58.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:29:58.87#ibcon#*before write, iclass 33, count 0 2006.229.15:29:58.87#ibcon#enter sib2, iclass 33, count 0 2006.229.15:29:58.87#ibcon#flushed, iclass 33, count 0 2006.229.15:29:58.87#ibcon#about to write, iclass 33, count 0 2006.229.15:29:58.87#ibcon#wrote, iclass 33, count 0 2006.229.15:29:58.87#ibcon#about to read 3, iclass 33, count 0 2006.229.15:29:58.91#ibcon#read 3, iclass 33, count 0 2006.229.15:29:58.91#ibcon#about to read 4, iclass 33, count 0 2006.229.15:29:58.91#ibcon#read 4, iclass 33, count 0 2006.229.15:29:58.91#ibcon#about to read 5, iclass 33, count 0 2006.229.15:29:58.91#ibcon#read 5, iclass 33, count 0 2006.229.15:29:58.91#ibcon#about to read 6, iclass 33, count 0 2006.229.15:29:58.91#ibcon#read 6, iclass 33, count 0 2006.229.15:29:58.91#ibcon#end of sib2, iclass 33, count 0 2006.229.15:29:58.91#ibcon#*after write, iclass 33, count 0 2006.229.15:29:58.91#ibcon#*before return 0, iclass 33, count 0 2006.229.15:29:58.91#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:29:58.91#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:29:58.91#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:29:58.91#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:29:58.91$vck44/vb=1,4 2006.229.15:29:58.91#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.15:29:58.91#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.15:29:58.91#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:58.91#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:29:58.91#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:29:58.91#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:29:58.91#ibcon#enter wrdev, iclass 35, count 2 2006.229.15:29:58.91#ibcon#first serial, iclass 35, count 2 2006.229.15:29:58.91#ibcon#enter sib2, iclass 35, count 2 2006.229.15:29:58.91#ibcon#flushed, iclass 35, count 2 2006.229.15:29:58.91#ibcon#about to write, iclass 35, count 2 2006.229.15:29:58.91#ibcon#wrote, iclass 35, count 2 2006.229.15:29:58.91#ibcon#about to read 3, iclass 35, count 2 2006.229.15:29:58.93#ibcon#read 3, iclass 35, count 2 2006.229.15:29:58.93#ibcon#about to read 4, iclass 35, count 2 2006.229.15:29:58.93#ibcon#read 4, iclass 35, count 2 2006.229.15:29:58.93#ibcon#about to read 5, iclass 35, count 2 2006.229.15:29:58.93#ibcon#read 5, iclass 35, count 2 2006.229.15:29:58.93#ibcon#about to read 6, iclass 35, count 2 2006.229.15:29:58.93#ibcon#read 6, iclass 35, count 2 2006.229.15:29:58.93#ibcon#end of sib2, iclass 35, count 2 2006.229.15:29:58.93#ibcon#*mode == 0, iclass 35, count 2 2006.229.15:29:58.93#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.15:29:58.93#ibcon#[27=AT01-04\r\n] 2006.229.15:29:58.93#ibcon#*before write, iclass 35, count 2 2006.229.15:29:58.93#ibcon#enter sib2, iclass 35, count 2 2006.229.15:29:58.93#ibcon#flushed, iclass 35, count 2 2006.229.15:29:58.93#ibcon#about to write, iclass 35, count 2 2006.229.15:29:58.93#ibcon#wrote, iclass 35, count 2 2006.229.15:29:58.93#ibcon#about to read 3, iclass 35, count 2 2006.229.15:29:58.96#ibcon#read 3, iclass 35, count 2 2006.229.15:29:58.96#ibcon#about to read 4, iclass 35, count 2 2006.229.15:29:58.96#ibcon#read 4, iclass 35, count 2 2006.229.15:29:58.96#ibcon#about to read 5, iclass 35, count 2 2006.229.15:29:58.96#ibcon#read 5, iclass 35, count 2 2006.229.15:29:58.96#ibcon#about to read 6, iclass 35, count 2 2006.229.15:29:58.96#ibcon#read 6, iclass 35, count 2 2006.229.15:29:58.96#ibcon#end of sib2, iclass 35, count 2 2006.229.15:29:58.96#ibcon#*after write, iclass 35, count 2 2006.229.15:29:58.96#ibcon#*before return 0, iclass 35, count 2 2006.229.15:29:58.96#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:29:58.96#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.15:29:58.96#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.15:29:58.96#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:58.96#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:29:59.08#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:29:59.08#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:29:59.08#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:29:59.08#ibcon#first serial, iclass 35, count 0 2006.229.15:29:59.08#ibcon#enter sib2, iclass 35, count 0 2006.229.15:29:59.08#ibcon#flushed, iclass 35, count 0 2006.229.15:29:59.08#ibcon#about to write, iclass 35, count 0 2006.229.15:29:59.08#ibcon#wrote, iclass 35, count 0 2006.229.15:29:59.08#ibcon#about to read 3, iclass 35, count 0 2006.229.15:29:59.10#ibcon#read 3, iclass 35, count 0 2006.229.15:29:59.10#ibcon#about to read 4, iclass 35, count 0 2006.229.15:29:59.10#ibcon#read 4, iclass 35, count 0 2006.229.15:29:59.10#ibcon#about to read 5, iclass 35, count 0 2006.229.15:29:59.10#ibcon#read 5, iclass 35, count 0 2006.229.15:29:59.10#ibcon#about to read 6, iclass 35, count 0 2006.229.15:29:59.10#ibcon#read 6, iclass 35, count 0 2006.229.15:29:59.10#ibcon#end of sib2, iclass 35, count 0 2006.229.15:29:59.10#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:29:59.10#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:29:59.10#ibcon#[27=USB\r\n] 2006.229.15:29:59.10#ibcon#*before write, iclass 35, count 0 2006.229.15:29:59.10#ibcon#enter sib2, iclass 35, count 0 2006.229.15:29:59.10#ibcon#flushed, iclass 35, count 0 2006.229.15:29:59.10#ibcon#about to write, iclass 35, count 0 2006.229.15:29:59.10#ibcon#wrote, iclass 35, count 0 2006.229.15:29:59.10#ibcon#about to read 3, iclass 35, count 0 2006.229.15:29:59.13#ibcon#read 3, iclass 35, count 0 2006.229.15:29:59.13#ibcon#about to read 4, iclass 35, count 0 2006.229.15:29:59.13#ibcon#read 4, iclass 35, count 0 2006.229.15:29:59.13#ibcon#about to read 5, iclass 35, count 0 2006.229.15:29:59.13#ibcon#read 5, iclass 35, count 0 2006.229.15:29:59.13#ibcon#about to read 6, iclass 35, count 0 2006.229.15:29:59.13#ibcon#read 6, iclass 35, count 0 2006.229.15:29:59.13#ibcon#end of sib2, iclass 35, count 0 2006.229.15:29:59.13#ibcon#*after write, iclass 35, count 0 2006.229.15:29:59.13#ibcon#*before return 0, iclass 35, count 0 2006.229.15:29:59.13#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:29:59.13#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.15:29:59.13#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:29:59.13#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:29:59.13$vck44/vblo=2,634.99 2006.229.15:29:59.13#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.15:29:59.13#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.15:29:59.13#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:59.13#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:59.13#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:59.13#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:59.13#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:29:59.13#ibcon#first serial, iclass 37, count 0 2006.229.15:29:59.13#ibcon#enter sib2, iclass 37, count 0 2006.229.15:29:59.13#ibcon#flushed, iclass 37, count 0 2006.229.15:29:59.13#ibcon#about to write, iclass 37, count 0 2006.229.15:29:59.13#ibcon#wrote, iclass 37, count 0 2006.229.15:29:59.13#ibcon#about to read 3, iclass 37, count 0 2006.229.15:29:59.15#ibcon#read 3, iclass 37, count 0 2006.229.15:29:59.15#ibcon#about to read 4, iclass 37, count 0 2006.229.15:29:59.15#ibcon#read 4, iclass 37, count 0 2006.229.15:29:59.15#ibcon#about to read 5, iclass 37, count 0 2006.229.15:29:59.15#ibcon#read 5, iclass 37, count 0 2006.229.15:29:59.15#ibcon#about to read 6, iclass 37, count 0 2006.229.15:29:59.15#ibcon#read 6, iclass 37, count 0 2006.229.15:29:59.15#ibcon#end of sib2, iclass 37, count 0 2006.229.15:29:59.15#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:29:59.15#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:29:59.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:29:59.15#ibcon#*before write, iclass 37, count 0 2006.229.15:29:59.15#ibcon#enter sib2, iclass 37, count 0 2006.229.15:29:59.15#ibcon#flushed, iclass 37, count 0 2006.229.15:29:59.15#ibcon#about to write, iclass 37, count 0 2006.229.15:29:59.15#ibcon#wrote, iclass 37, count 0 2006.229.15:29:59.15#ibcon#about to read 3, iclass 37, count 0 2006.229.15:29:59.19#ibcon#read 3, iclass 37, count 0 2006.229.15:29:59.19#ibcon#about to read 4, iclass 37, count 0 2006.229.15:29:59.19#ibcon#read 4, iclass 37, count 0 2006.229.15:29:59.19#ibcon#about to read 5, iclass 37, count 0 2006.229.15:29:59.19#ibcon#read 5, iclass 37, count 0 2006.229.15:29:59.19#ibcon#about to read 6, iclass 37, count 0 2006.229.15:29:59.19#ibcon#read 6, iclass 37, count 0 2006.229.15:29:59.19#ibcon#end of sib2, iclass 37, count 0 2006.229.15:29:59.19#ibcon#*after write, iclass 37, count 0 2006.229.15:29:59.19#ibcon#*before return 0, iclass 37, count 0 2006.229.15:29:59.19#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:59.19#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.15:29:59.19#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:29:59.19#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:29:59.19$vck44/vb=2,4 2006.229.15:29:59.19#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.15:29:59.19#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.15:29:59.19#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:59.19#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:59.25#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:59.25#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:59.25#ibcon#enter wrdev, iclass 39, count 2 2006.229.15:29:59.25#ibcon#first serial, iclass 39, count 2 2006.229.15:29:59.25#ibcon#enter sib2, iclass 39, count 2 2006.229.15:29:59.25#ibcon#flushed, iclass 39, count 2 2006.229.15:29:59.25#ibcon#about to write, iclass 39, count 2 2006.229.15:29:59.25#ibcon#wrote, iclass 39, count 2 2006.229.15:29:59.25#ibcon#about to read 3, iclass 39, count 2 2006.229.15:29:59.27#ibcon#read 3, iclass 39, count 2 2006.229.15:29:59.27#ibcon#about to read 4, iclass 39, count 2 2006.229.15:29:59.27#ibcon#read 4, iclass 39, count 2 2006.229.15:29:59.27#ibcon#about to read 5, iclass 39, count 2 2006.229.15:29:59.27#ibcon#read 5, iclass 39, count 2 2006.229.15:29:59.27#ibcon#about to read 6, iclass 39, count 2 2006.229.15:29:59.27#ibcon#read 6, iclass 39, count 2 2006.229.15:29:59.27#ibcon#end of sib2, iclass 39, count 2 2006.229.15:29:59.27#ibcon#*mode == 0, iclass 39, count 2 2006.229.15:29:59.27#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.15:29:59.27#ibcon#[27=AT02-04\r\n] 2006.229.15:29:59.27#ibcon#*before write, iclass 39, count 2 2006.229.15:29:59.27#ibcon#enter sib2, iclass 39, count 2 2006.229.15:29:59.27#ibcon#flushed, iclass 39, count 2 2006.229.15:29:59.27#ibcon#about to write, iclass 39, count 2 2006.229.15:29:59.27#ibcon#wrote, iclass 39, count 2 2006.229.15:29:59.27#ibcon#about to read 3, iclass 39, count 2 2006.229.15:29:59.30#ibcon#read 3, iclass 39, count 2 2006.229.15:29:59.30#ibcon#about to read 4, iclass 39, count 2 2006.229.15:29:59.30#ibcon#read 4, iclass 39, count 2 2006.229.15:29:59.30#ibcon#about to read 5, iclass 39, count 2 2006.229.15:29:59.30#ibcon#read 5, iclass 39, count 2 2006.229.15:29:59.30#ibcon#about to read 6, iclass 39, count 2 2006.229.15:29:59.30#ibcon#read 6, iclass 39, count 2 2006.229.15:29:59.30#ibcon#end of sib2, iclass 39, count 2 2006.229.15:29:59.30#ibcon#*after write, iclass 39, count 2 2006.229.15:29:59.30#ibcon#*before return 0, iclass 39, count 2 2006.229.15:29:59.30#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:59.30#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.15:29:59.30#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.15:29:59.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:59.30#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:59.42#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:59.42#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:59.42#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:29:59.42#ibcon#first serial, iclass 39, count 0 2006.229.15:29:59.42#ibcon#enter sib2, iclass 39, count 0 2006.229.15:29:59.42#ibcon#flushed, iclass 39, count 0 2006.229.15:29:59.42#ibcon#about to write, iclass 39, count 0 2006.229.15:29:59.42#ibcon#wrote, iclass 39, count 0 2006.229.15:29:59.42#ibcon#about to read 3, iclass 39, count 0 2006.229.15:29:59.44#ibcon#read 3, iclass 39, count 0 2006.229.15:29:59.44#ibcon#about to read 4, iclass 39, count 0 2006.229.15:29:59.44#ibcon#read 4, iclass 39, count 0 2006.229.15:29:59.44#ibcon#about to read 5, iclass 39, count 0 2006.229.15:29:59.44#ibcon#read 5, iclass 39, count 0 2006.229.15:29:59.44#ibcon#about to read 6, iclass 39, count 0 2006.229.15:29:59.44#ibcon#read 6, iclass 39, count 0 2006.229.15:29:59.44#ibcon#end of sib2, iclass 39, count 0 2006.229.15:29:59.44#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:29:59.44#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:29:59.44#ibcon#[27=USB\r\n] 2006.229.15:29:59.44#ibcon#*before write, iclass 39, count 0 2006.229.15:29:59.44#ibcon#enter sib2, iclass 39, count 0 2006.229.15:29:59.44#ibcon#flushed, iclass 39, count 0 2006.229.15:29:59.44#ibcon#about to write, iclass 39, count 0 2006.229.15:29:59.44#ibcon#wrote, iclass 39, count 0 2006.229.15:29:59.44#ibcon#about to read 3, iclass 39, count 0 2006.229.15:29:59.47#ibcon#read 3, iclass 39, count 0 2006.229.15:29:59.47#ibcon#about to read 4, iclass 39, count 0 2006.229.15:29:59.47#ibcon#read 4, iclass 39, count 0 2006.229.15:29:59.47#ibcon#about to read 5, iclass 39, count 0 2006.229.15:29:59.47#ibcon#read 5, iclass 39, count 0 2006.229.15:29:59.47#ibcon#about to read 6, iclass 39, count 0 2006.229.15:29:59.47#ibcon#read 6, iclass 39, count 0 2006.229.15:29:59.47#ibcon#end of sib2, iclass 39, count 0 2006.229.15:29:59.47#ibcon#*after write, iclass 39, count 0 2006.229.15:29:59.47#ibcon#*before return 0, iclass 39, count 0 2006.229.15:29:59.47#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:59.47#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.15:29:59.47#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:29:59.47#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:29:59.47$vck44/vblo=3,649.99 2006.229.15:29:59.47#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:29:59.47#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:29:59.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:59.47#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:59.47#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:59.47#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:59.47#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:29:59.47#ibcon#first serial, iclass 3, count 0 2006.229.15:29:59.47#ibcon#enter sib2, iclass 3, count 0 2006.229.15:29:59.47#ibcon#flushed, iclass 3, count 0 2006.229.15:29:59.47#ibcon#about to write, iclass 3, count 0 2006.229.15:29:59.47#ibcon#wrote, iclass 3, count 0 2006.229.15:29:59.47#ibcon#about to read 3, iclass 3, count 0 2006.229.15:29:59.49#ibcon#read 3, iclass 3, count 0 2006.229.15:29:59.49#ibcon#about to read 4, iclass 3, count 0 2006.229.15:29:59.49#ibcon#read 4, iclass 3, count 0 2006.229.15:29:59.49#ibcon#about to read 5, iclass 3, count 0 2006.229.15:29:59.49#ibcon#read 5, iclass 3, count 0 2006.229.15:29:59.49#ibcon#about to read 6, iclass 3, count 0 2006.229.15:29:59.49#ibcon#read 6, iclass 3, count 0 2006.229.15:29:59.49#ibcon#end of sib2, iclass 3, count 0 2006.229.15:29:59.49#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:29:59.49#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:29:59.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:29:59.49#ibcon#*before write, iclass 3, count 0 2006.229.15:29:59.49#ibcon#enter sib2, iclass 3, count 0 2006.229.15:29:59.49#ibcon#flushed, iclass 3, count 0 2006.229.15:29:59.49#ibcon#about to write, iclass 3, count 0 2006.229.15:29:59.49#ibcon#wrote, iclass 3, count 0 2006.229.15:29:59.49#ibcon#about to read 3, iclass 3, count 0 2006.229.15:29:59.53#ibcon#read 3, iclass 3, count 0 2006.229.15:29:59.53#ibcon#about to read 4, iclass 3, count 0 2006.229.15:29:59.53#ibcon#read 4, iclass 3, count 0 2006.229.15:29:59.53#ibcon#about to read 5, iclass 3, count 0 2006.229.15:29:59.53#ibcon#read 5, iclass 3, count 0 2006.229.15:29:59.53#ibcon#about to read 6, iclass 3, count 0 2006.229.15:29:59.53#ibcon#read 6, iclass 3, count 0 2006.229.15:29:59.53#ibcon#end of sib2, iclass 3, count 0 2006.229.15:29:59.53#ibcon#*after write, iclass 3, count 0 2006.229.15:29:59.53#ibcon#*before return 0, iclass 3, count 0 2006.229.15:29:59.53#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:59.53#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:29:59.53#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:29:59.53#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:29:59.53$vck44/vb=3,4 2006.229.15:29:59.53#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.15:29:59.53#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.15:29:59.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:59.53#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:59.59#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:59.59#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:59.59#ibcon#enter wrdev, iclass 5, count 2 2006.229.15:29:59.59#ibcon#first serial, iclass 5, count 2 2006.229.15:29:59.59#ibcon#enter sib2, iclass 5, count 2 2006.229.15:29:59.59#ibcon#flushed, iclass 5, count 2 2006.229.15:29:59.59#ibcon#about to write, iclass 5, count 2 2006.229.15:29:59.59#ibcon#wrote, iclass 5, count 2 2006.229.15:29:59.59#ibcon#about to read 3, iclass 5, count 2 2006.229.15:29:59.61#ibcon#read 3, iclass 5, count 2 2006.229.15:29:59.61#ibcon#about to read 4, iclass 5, count 2 2006.229.15:29:59.61#ibcon#read 4, iclass 5, count 2 2006.229.15:29:59.61#ibcon#about to read 5, iclass 5, count 2 2006.229.15:29:59.61#ibcon#read 5, iclass 5, count 2 2006.229.15:29:59.61#ibcon#about to read 6, iclass 5, count 2 2006.229.15:29:59.61#ibcon#read 6, iclass 5, count 2 2006.229.15:29:59.61#ibcon#end of sib2, iclass 5, count 2 2006.229.15:29:59.61#ibcon#*mode == 0, iclass 5, count 2 2006.229.15:29:59.61#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.15:29:59.61#ibcon#[27=AT03-04\r\n] 2006.229.15:29:59.61#ibcon#*before write, iclass 5, count 2 2006.229.15:29:59.61#ibcon#enter sib2, iclass 5, count 2 2006.229.15:29:59.61#ibcon#flushed, iclass 5, count 2 2006.229.15:29:59.61#ibcon#about to write, iclass 5, count 2 2006.229.15:29:59.61#ibcon#wrote, iclass 5, count 2 2006.229.15:29:59.61#ibcon#about to read 3, iclass 5, count 2 2006.229.15:29:59.64#ibcon#read 3, iclass 5, count 2 2006.229.15:29:59.64#ibcon#about to read 4, iclass 5, count 2 2006.229.15:29:59.64#ibcon#read 4, iclass 5, count 2 2006.229.15:29:59.64#ibcon#about to read 5, iclass 5, count 2 2006.229.15:29:59.64#ibcon#read 5, iclass 5, count 2 2006.229.15:29:59.64#ibcon#about to read 6, iclass 5, count 2 2006.229.15:29:59.64#ibcon#read 6, iclass 5, count 2 2006.229.15:29:59.64#ibcon#end of sib2, iclass 5, count 2 2006.229.15:29:59.64#ibcon#*after write, iclass 5, count 2 2006.229.15:29:59.64#ibcon#*before return 0, iclass 5, count 2 2006.229.15:29:59.64#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:59.64#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.15:29:59.64#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.15:29:59.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:59.64#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:59.76#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:59.76#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:59.76#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:29:59.76#ibcon#first serial, iclass 5, count 0 2006.229.15:29:59.76#ibcon#enter sib2, iclass 5, count 0 2006.229.15:29:59.76#ibcon#flushed, iclass 5, count 0 2006.229.15:29:59.76#ibcon#about to write, iclass 5, count 0 2006.229.15:29:59.76#ibcon#wrote, iclass 5, count 0 2006.229.15:29:59.76#ibcon#about to read 3, iclass 5, count 0 2006.229.15:29:59.78#ibcon#read 3, iclass 5, count 0 2006.229.15:29:59.78#ibcon#about to read 4, iclass 5, count 0 2006.229.15:29:59.78#ibcon#read 4, iclass 5, count 0 2006.229.15:29:59.78#ibcon#about to read 5, iclass 5, count 0 2006.229.15:29:59.78#ibcon#read 5, iclass 5, count 0 2006.229.15:29:59.78#ibcon#about to read 6, iclass 5, count 0 2006.229.15:29:59.78#ibcon#read 6, iclass 5, count 0 2006.229.15:29:59.78#ibcon#end of sib2, iclass 5, count 0 2006.229.15:29:59.78#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:29:59.78#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:29:59.78#ibcon#[27=USB\r\n] 2006.229.15:29:59.78#ibcon#*before write, iclass 5, count 0 2006.229.15:29:59.78#ibcon#enter sib2, iclass 5, count 0 2006.229.15:29:59.78#ibcon#flushed, iclass 5, count 0 2006.229.15:29:59.78#ibcon#about to write, iclass 5, count 0 2006.229.15:29:59.78#ibcon#wrote, iclass 5, count 0 2006.229.15:29:59.78#ibcon#about to read 3, iclass 5, count 0 2006.229.15:29:59.81#ibcon#read 3, iclass 5, count 0 2006.229.15:29:59.81#ibcon#about to read 4, iclass 5, count 0 2006.229.15:29:59.81#ibcon#read 4, iclass 5, count 0 2006.229.15:29:59.81#ibcon#about to read 5, iclass 5, count 0 2006.229.15:29:59.81#ibcon#read 5, iclass 5, count 0 2006.229.15:29:59.81#ibcon#about to read 6, iclass 5, count 0 2006.229.15:29:59.81#ibcon#read 6, iclass 5, count 0 2006.229.15:29:59.81#ibcon#end of sib2, iclass 5, count 0 2006.229.15:29:59.81#ibcon#*after write, iclass 5, count 0 2006.229.15:29:59.81#ibcon#*before return 0, iclass 5, count 0 2006.229.15:29:59.81#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:59.81#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.15:29:59.81#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:29:59.81#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:29:59.81$vck44/vblo=4,679.99 2006.229.15:29:59.81#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.15:29:59.81#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.15:29:59.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:29:59.81#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:59.81#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:59.81#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:59.81#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:29:59.81#ibcon#first serial, iclass 7, count 0 2006.229.15:29:59.81#ibcon#enter sib2, iclass 7, count 0 2006.229.15:29:59.81#ibcon#flushed, iclass 7, count 0 2006.229.15:29:59.81#ibcon#about to write, iclass 7, count 0 2006.229.15:29:59.81#ibcon#wrote, iclass 7, count 0 2006.229.15:29:59.81#ibcon#about to read 3, iclass 7, count 0 2006.229.15:29:59.83#ibcon#read 3, iclass 7, count 0 2006.229.15:29:59.83#ibcon#about to read 4, iclass 7, count 0 2006.229.15:29:59.83#ibcon#read 4, iclass 7, count 0 2006.229.15:29:59.83#ibcon#about to read 5, iclass 7, count 0 2006.229.15:29:59.83#ibcon#read 5, iclass 7, count 0 2006.229.15:29:59.83#ibcon#about to read 6, iclass 7, count 0 2006.229.15:29:59.83#ibcon#read 6, iclass 7, count 0 2006.229.15:29:59.83#ibcon#end of sib2, iclass 7, count 0 2006.229.15:29:59.83#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:29:59.83#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:29:59.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:29:59.83#ibcon#*before write, iclass 7, count 0 2006.229.15:29:59.83#ibcon#enter sib2, iclass 7, count 0 2006.229.15:29:59.83#ibcon#flushed, iclass 7, count 0 2006.229.15:29:59.83#ibcon#about to write, iclass 7, count 0 2006.229.15:29:59.83#ibcon#wrote, iclass 7, count 0 2006.229.15:29:59.83#ibcon#about to read 3, iclass 7, count 0 2006.229.15:29:59.87#ibcon#read 3, iclass 7, count 0 2006.229.15:29:59.87#ibcon#about to read 4, iclass 7, count 0 2006.229.15:29:59.87#ibcon#read 4, iclass 7, count 0 2006.229.15:29:59.87#ibcon#about to read 5, iclass 7, count 0 2006.229.15:29:59.87#ibcon#read 5, iclass 7, count 0 2006.229.15:29:59.87#ibcon#about to read 6, iclass 7, count 0 2006.229.15:29:59.87#ibcon#read 6, iclass 7, count 0 2006.229.15:29:59.87#ibcon#end of sib2, iclass 7, count 0 2006.229.15:29:59.87#ibcon#*after write, iclass 7, count 0 2006.229.15:29:59.87#ibcon#*before return 0, iclass 7, count 0 2006.229.15:29:59.87#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:59.87#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.15:29:59.87#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:29:59.87#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:29:59.87$vck44/vb=4,4 2006.229.15:29:59.87#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:29:59.87#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:29:59.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:29:59.87#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:29:59.89#abcon#<5=/05 0.8 1.9 27.351001001.8\r\n> 2006.229.15:29:59.91#abcon#{5=INTERFACE CLEAR} 2006.229.15:29:59.93#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:29:59.93#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:29:59.93#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:29:59.93#ibcon#first serial, iclass 12, count 2 2006.229.15:29:59.93#ibcon#enter sib2, iclass 12, count 2 2006.229.15:29:59.93#ibcon#flushed, iclass 12, count 2 2006.229.15:29:59.93#ibcon#about to write, iclass 12, count 2 2006.229.15:29:59.93#ibcon#wrote, iclass 12, count 2 2006.229.15:29:59.93#ibcon#about to read 3, iclass 12, count 2 2006.229.15:29:59.95#ibcon#read 3, iclass 12, count 2 2006.229.15:29:59.95#ibcon#about to read 4, iclass 12, count 2 2006.229.15:29:59.95#ibcon#read 4, iclass 12, count 2 2006.229.15:29:59.95#ibcon#about to read 5, iclass 12, count 2 2006.229.15:29:59.95#ibcon#read 5, iclass 12, count 2 2006.229.15:29:59.95#ibcon#about to read 6, iclass 12, count 2 2006.229.15:29:59.95#ibcon#read 6, iclass 12, count 2 2006.229.15:29:59.95#ibcon#end of sib2, iclass 12, count 2 2006.229.15:29:59.95#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:29:59.95#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:29:59.95#ibcon#[27=AT04-04\r\n] 2006.229.15:29:59.95#ibcon#*before write, iclass 12, count 2 2006.229.15:29:59.95#ibcon#enter sib2, iclass 12, count 2 2006.229.15:29:59.95#ibcon#flushed, iclass 12, count 2 2006.229.15:29:59.95#ibcon#about to write, iclass 12, count 2 2006.229.15:29:59.95#ibcon#wrote, iclass 12, count 2 2006.229.15:29:59.95#ibcon#about to read 3, iclass 12, count 2 2006.229.15:29:59.97#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:29:59.98#ibcon#read 3, iclass 12, count 2 2006.229.15:29:59.98#ibcon#about to read 4, iclass 12, count 2 2006.229.15:29:59.98#ibcon#read 4, iclass 12, count 2 2006.229.15:29:59.98#ibcon#about to read 5, iclass 12, count 2 2006.229.15:29:59.98#ibcon#read 5, iclass 12, count 2 2006.229.15:29:59.98#ibcon#about to read 6, iclass 12, count 2 2006.229.15:29:59.98#ibcon#read 6, iclass 12, count 2 2006.229.15:29:59.98#ibcon#end of sib2, iclass 12, count 2 2006.229.15:29:59.98#ibcon#*after write, iclass 12, count 2 2006.229.15:29:59.98#ibcon#*before return 0, iclass 12, count 2 2006.229.15:29:59.98#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:29:59.98#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:29:59.98#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:29:59.98#ibcon#ireg 7 cls_cnt 0 2006.229.15:29:59.98#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:30:00.10#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:30:00.10#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:30:00.10#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:30:00.10#ibcon#first serial, iclass 12, count 0 2006.229.15:30:00.10#ibcon#enter sib2, iclass 12, count 0 2006.229.15:30:00.10#ibcon#flushed, iclass 12, count 0 2006.229.15:30:00.10#ibcon#about to write, iclass 12, count 0 2006.229.15:30:00.10#ibcon#wrote, iclass 12, count 0 2006.229.15:30:00.10#ibcon#about to read 3, iclass 12, count 0 2006.229.15:30:00.12#ibcon#read 3, iclass 12, count 0 2006.229.15:30:00.12#ibcon#about to read 4, iclass 12, count 0 2006.229.15:30:00.12#ibcon#read 4, iclass 12, count 0 2006.229.15:30:00.12#ibcon#about to read 5, iclass 12, count 0 2006.229.15:30:00.12#ibcon#read 5, iclass 12, count 0 2006.229.15:30:00.12#ibcon#about to read 6, iclass 12, count 0 2006.229.15:30:00.12#ibcon#read 6, iclass 12, count 0 2006.229.15:30:00.12#ibcon#end of sib2, iclass 12, count 0 2006.229.15:30:00.12#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:30:00.12#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:30:00.12#ibcon#[27=USB\r\n] 2006.229.15:30:00.12#ibcon#*before write, iclass 12, count 0 2006.229.15:30:00.12#ibcon#enter sib2, iclass 12, count 0 2006.229.15:30:00.12#ibcon#flushed, iclass 12, count 0 2006.229.15:30:00.12#ibcon#about to write, iclass 12, count 0 2006.229.15:30:00.12#ibcon#wrote, iclass 12, count 0 2006.229.15:30:00.12#ibcon#about to read 3, iclass 12, count 0 2006.229.15:30:00.15#ibcon#read 3, iclass 12, count 0 2006.229.15:30:00.15#ibcon#about to read 4, iclass 12, count 0 2006.229.15:30:00.15#ibcon#read 4, iclass 12, count 0 2006.229.15:30:00.15#ibcon#about to read 5, iclass 12, count 0 2006.229.15:30:00.15#ibcon#read 5, iclass 12, count 0 2006.229.15:30:00.15#ibcon#about to read 6, iclass 12, count 0 2006.229.15:30:00.15#ibcon#read 6, iclass 12, count 0 2006.229.15:30:00.15#ibcon#end of sib2, iclass 12, count 0 2006.229.15:30:00.15#ibcon#*after write, iclass 12, count 0 2006.229.15:30:00.15#ibcon#*before return 0, iclass 12, count 0 2006.229.15:30:00.15#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:30:00.15#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:30:00.15#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:30:00.15#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:30:00.15$vck44/vblo=5,709.99 2006.229.15:30:00.15#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.15:30:00.15#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.15:30:00.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:30:00.15#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:30:00.15#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:30:00.15#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:30:00.15#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:30:00.15#ibcon#first serial, iclass 17, count 0 2006.229.15:30:00.15#ibcon#enter sib2, iclass 17, count 0 2006.229.15:30:00.15#ibcon#flushed, iclass 17, count 0 2006.229.15:30:00.15#ibcon#about to write, iclass 17, count 0 2006.229.15:30:00.15#ibcon#wrote, iclass 17, count 0 2006.229.15:30:00.15#ibcon#about to read 3, iclass 17, count 0 2006.229.15:30:00.17#ibcon#read 3, iclass 17, count 0 2006.229.15:30:00.17#ibcon#about to read 4, iclass 17, count 0 2006.229.15:30:00.17#ibcon#read 4, iclass 17, count 0 2006.229.15:30:00.17#ibcon#about to read 5, iclass 17, count 0 2006.229.15:30:00.17#ibcon#read 5, iclass 17, count 0 2006.229.15:30:00.17#ibcon#about to read 6, iclass 17, count 0 2006.229.15:30:00.17#ibcon#read 6, iclass 17, count 0 2006.229.15:30:00.17#ibcon#end of sib2, iclass 17, count 0 2006.229.15:30:00.17#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:30:00.17#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:30:00.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:30:00.17#ibcon#*before write, iclass 17, count 0 2006.229.15:30:00.17#ibcon#enter sib2, iclass 17, count 0 2006.229.15:30:00.17#ibcon#flushed, iclass 17, count 0 2006.229.15:30:00.17#ibcon#about to write, iclass 17, count 0 2006.229.15:30:00.17#ibcon#wrote, iclass 17, count 0 2006.229.15:30:00.17#ibcon#about to read 3, iclass 17, count 0 2006.229.15:30:00.21#ibcon#read 3, iclass 17, count 0 2006.229.15:30:00.21#ibcon#about to read 4, iclass 17, count 0 2006.229.15:30:00.21#ibcon#read 4, iclass 17, count 0 2006.229.15:30:00.21#ibcon#about to read 5, iclass 17, count 0 2006.229.15:30:00.21#ibcon#read 5, iclass 17, count 0 2006.229.15:30:00.21#ibcon#about to read 6, iclass 17, count 0 2006.229.15:30:00.21#ibcon#read 6, iclass 17, count 0 2006.229.15:30:00.21#ibcon#end of sib2, iclass 17, count 0 2006.229.15:30:00.21#ibcon#*after write, iclass 17, count 0 2006.229.15:30:00.21#ibcon#*before return 0, iclass 17, count 0 2006.229.15:30:00.21#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:30:00.21#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.15:30:00.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:30:00.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:30:00.21$vck44/vb=5,4 2006.229.15:30:00.21#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.15:30:00.21#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.15:30:00.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:30:00.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:30:00.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:30:00.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:30:00.27#ibcon#enter wrdev, iclass 19, count 2 2006.229.15:30:00.27#ibcon#first serial, iclass 19, count 2 2006.229.15:30:00.27#ibcon#enter sib2, iclass 19, count 2 2006.229.15:30:00.27#ibcon#flushed, iclass 19, count 2 2006.229.15:30:00.27#ibcon#about to write, iclass 19, count 2 2006.229.15:30:00.27#ibcon#wrote, iclass 19, count 2 2006.229.15:30:00.27#ibcon#about to read 3, iclass 19, count 2 2006.229.15:30:00.29#ibcon#read 3, iclass 19, count 2 2006.229.15:30:00.29#ibcon#about to read 4, iclass 19, count 2 2006.229.15:30:00.29#ibcon#read 4, iclass 19, count 2 2006.229.15:30:00.29#ibcon#about to read 5, iclass 19, count 2 2006.229.15:30:00.29#ibcon#read 5, iclass 19, count 2 2006.229.15:30:00.29#ibcon#about to read 6, iclass 19, count 2 2006.229.15:30:00.29#ibcon#read 6, iclass 19, count 2 2006.229.15:30:00.29#ibcon#end of sib2, iclass 19, count 2 2006.229.15:30:00.29#ibcon#*mode == 0, iclass 19, count 2 2006.229.15:30:00.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.15:30:00.29#ibcon#[27=AT05-04\r\n] 2006.229.15:30:00.29#ibcon#*before write, iclass 19, count 2 2006.229.15:30:00.29#ibcon#enter sib2, iclass 19, count 2 2006.229.15:30:00.29#ibcon#flushed, iclass 19, count 2 2006.229.15:30:00.29#ibcon#about to write, iclass 19, count 2 2006.229.15:30:00.29#ibcon#wrote, iclass 19, count 2 2006.229.15:30:00.29#ibcon#about to read 3, iclass 19, count 2 2006.229.15:30:00.32#ibcon#read 3, iclass 19, count 2 2006.229.15:30:00.32#ibcon#about to read 4, iclass 19, count 2 2006.229.15:30:00.32#ibcon#read 4, iclass 19, count 2 2006.229.15:30:00.32#ibcon#about to read 5, iclass 19, count 2 2006.229.15:30:00.32#ibcon#read 5, iclass 19, count 2 2006.229.15:30:00.32#ibcon#about to read 6, iclass 19, count 2 2006.229.15:30:00.32#ibcon#read 6, iclass 19, count 2 2006.229.15:30:00.32#ibcon#end of sib2, iclass 19, count 2 2006.229.15:30:00.32#ibcon#*after write, iclass 19, count 2 2006.229.15:30:00.32#ibcon#*before return 0, iclass 19, count 2 2006.229.15:30:00.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:30:00.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.15:30:00.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.15:30:00.32#ibcon#ireg 7 cls_cnt 0 2006.229.15:30:00.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:30:00.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:30:00.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:30:00.44#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:30:00.44#ibcon#first serial, iclass 19, count 0 2006.229.15:30:00.44#ibcon#enter sib2, iclass 19, count 0 2006.229.15:30:00.44#ibcon#flushed, iclass 19, count 0 2006.229.15:30:00.44#ibcon#about to write, iclass 19, count 0 2006.229.15:30:00.44#ibcon#wrote, iclass 19, count 0 2006.229.15:30:00.44#ibcon#about to read 3, iclass 19, count 0 2006.229.15:30:00.46#ibcon#read 3, iclass 19, count 0 2006.229.15:30:00.46#ibcon#about to read 4, iclass 19, count 0 2006.229.15:30:00.46#ibcon#read 4, iclass 19, count 0 2006.229.15:30:00.46#ibcon#about to read 5, iclass 19, count 0 2006.229.15:30:00.46#ibcon#read 5, iclass 19, count 0 2006.229.15:30:00.46#ibcon#about to read 6, iclass 19, count 0 2006.229.15:30:00.46#ibcon#read 6, iclass 19, count 0 2006.229.15:30:00.46#ibcon#end of sib2, iclass 19, count 0 2006.229.15:30:00.46#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:30:00.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:30:00.46#ibcon#[27=USB\r\n] 2006.229.15:30:00.46#ibcon#*before write, iclass 19, count 0 2006.229.15:30:00.46#ibcon#enter sib2, iclass 19, count 0 2006.229.15:30:00.46#ibcon#flushed, iclass 19, count 0 2006.229.15:30:00.46#ibcon#about to write, iclass 19, count 0 2006.229.15:30:00.46#ibcon#wrote, iclass 19, count 0 2006.229.15:30:00.46#ibcon#about to read 3, iclass 19, count 0 2006.229.15:30:00.49#ibcon#read 3, iclass 19, count 0 2006.229.15:30:00.49#ibcon#about to read 4, iclass 19, count 0 2006.229.15:30:00.49#ibcon#read 4, iclass 19, count 0 2006.229.15:30:00.49#ibcon#about to read 5, iclass 19, count 0 2006.229.15:30:00.49#ibcon#read 5, iclass 19, count 0 2006.229.15:30:00.49#ibcon#about to read 6, iclass 19, count 0 2006.229.15:30:00.49#ibcon#read 6, iclass 19, count 0 2006.229.15:30:00.49#ibcon#end of sib2, iclass 19, count 0 2006.229.15:30:00.49#ibcon#*after write, iclass 19, count 0 2006.229.15:30:00.49#ibcon#*before return 0, iclass 19, count 0 2006.229.15:30:00.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:30:00.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.15:30:00.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:30:00.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:30:00.49$vck44/vblo=6,719.99 2006.229.15:30:00.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.15:30:00.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.15:30:00.49#ibcon#ireg 17 cls_cnt 0 2006.229.15:30:00.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:30:00.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:30:00.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:30:00.49#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:30:00.49#ibcon#first serial, iclass 21, count 0 2006.229.15:30:00.49#ibcon#enter sib2, iclass 21, count 0 2006.229.15:30:00.49#ibcon#flushed, iclass 21, count 0 2006.229.15:30:00.49#ibcon#about to write, iclass 21, count 0 2006.229.15:30:00.49#ibcon#wrote, iclass 21, count 0 2006.229.15:30:00.49#ibcon#about to read 3, iclass 21, count 0 2006.229.15:30:00.51#ibcon#read 3, iclass 21, count 0 2006.229.15:30:00.51#ibcon#about to read 4, iclass 21, count 0 2006.229.15:30:00.51#ibcon#read 4, iclass 21, count 0 2006.229.15:30:00.51#ibcon#about to read 5, iclass 21, count 0 2006.229.15:30:00.51#ibcon#read 5, iclass 21, count 0 2006.229.15:30:00.51#ibcon#about to read 6, iclass 21, count 0 2006.229.15:30:00.51#ibcon#read 6, iclass 21, count 0 2006.229.15:30:00.51#ibcon#end of sib2, iclass 21, count 0 2006.229.15:30:00.51#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:30:00.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:30:00.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:30:00.51#ibcon#*before write, iclass 21, count 0 2006.229.15:30:00.51#ibcon#enter sib2, iclass 21, count 0 2006.229.15:30:00.51#ibcon#flushed, iclass 21, count 0 2006.229.15:30:00.51#ibcon#about to write, iclass 21, count 0 2006.229.15:30:00.51#ibcon#wrote, iclass 21, count 0 2006.229.15:30:00.51#ibcon#about to read 3, iclass 21, count 0 2006.229.15:30:00.55#ibcon#read 3, iclass 21, count 0 2006.229.15:30:00.55#ibcon#about to read 4, iclass 21, count 0 2006.229.15:30:00.55#ibcon#read 4, iclass 21, count 0 2006.229.15:30:00.55#ibcon#about to read 5, iclass 21, count 0 2006.229.15:30:00.55#ibcon#read 5, iclass 21, count 0 2006.229.15:30:00.55#ibcon#about to read 6, iclass 21, count 0 2006.229.15:30:00.55#ibcon#read 6, iclass 21, count 0 2006.229.15:30:00.55#ibcon#end of sib2, iclass 21, count 0 2006.229.15:30:00.55#ibcon#*after write, iclass 21, count 0 2006.229.15:30:00.55#ibcon#*before return 0, iclass 21, count 0 2006.229.15:30:00.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:30:00.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.15:30:00.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:30:00.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:30:00.55$vck44/vb=6,4 2006.229.15:30:00.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.15:30:00.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.15:30:00.55#ibcon#ireg 11 cls_cnt 2 2006.229.15:30:00.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:30:00.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:30:00.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:30:00.61#ibcon#enter wrdev, iclass 23, count 2 2006.229.15:30:00.61#ibcon#first serial, iclass 23, count 2 2006.229.15:30:00.61#ibcon#enter sib2, iclass 23, count 2 2006.229.15:30:00.61#ibcon#flushed, iclass 23, count 2 2006.229.15:30:00.61#ibcon#about to write, iclass 23, count 2 2006.229.15:30:00.61#ibcon#wrote, iclass 23, count 2 2006.229.15:30:00.61#ibcon#about to read 3, iclass 23, count 2 2006.229.15:30:00.63#ibcon#read 3, iclass 23, count 2 2006.229.15:30:00.63#ibcon#about to read 4, iclass 23, count 2 2006.229.15:30:00.63#ibcon#read 4, iclass 23, count 2 2006.229.15:30:00.63#ibcon#about to read 5, iclass 23, count 2 2006.229.15:30:00.63#ibcon#read 5, iclass 23, count 2 2006.229.15:30:00.63#ibcon#about to read 6, iclass 23, count 2 2006.229.15:30:00.63#ibcon#read 6, iclass 23, count 2 2006.229.15:30:00.63#ibcon#end of sib2, iclass 23, count 2 2006.229.15:30:00.63#ibcon#*mode == 0, iclass 23, count 2 2006.229.15:30:00.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.15:30:00.63#ibcon#[27=AT06-04\r\n] 2006.229.15:30:00.63#ibcon#*before write, iclass 23, count 2 2006.229.15:30:00.63#ibcon#enter sib2, iclass 23, count 2 2006.229.15:30:00.63#ibcon#flushed, iclass 23, count 2 2006.229.15:30:00.63#ibcon#about to write, iclass 23, count 2 2006.229.15:30:00.63#ibcon#wrote, iclass 23, count 2 2006.229.15:30:00.63#ibcon#about to read 3, iclass 23, count 2 2006.229.15:30:00.66#ibcon#read 3, iclass 23, count 2 2006.229.15:30:00.66#ibcon#about to read 4, iclass 23, count 2 2006.229.15:30:00.66#ibcon#read 4, iclass 23, count 2 2006.229.15:30:00.66#ibcon#about to read 5, iclass 23, count 2 2006.229.15:30:00.66#ibcon#read 5, iclass 23, count 2 2006.229.15:30:00.66#ibcon#about to read 6, iclass 23, count 2 2006.229.15:30:00.66#ibcon#read 6, iclass 23, count 2 2006.229.15:30:00.66#ibcon#end of sib2, iclass 23, count 2 2006.229.15:30:00.66#ibcon#*after write, iclass 23, count 2 2006.229.15:30:00.66#ibcon#*before return 0, iclass 23, count 2 2006.229.15:30:00.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:30:00.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.15:30:00.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.15:30:00.66#ibcon#ireg 7 cls_cnt 0 2006.229.15:30:00.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:30:00.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:30:00.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:30:00.78#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:30:00.78#ibcon#first serial, iclass 23, count 0 2006.229.15:30:00.78#ibcon#enter sib2, iclass 23, count 0 2006.229.15:30:00.78#ibcon#flushed, iclass 23, count 0 2006.229.15:30:00.78#ibcon#about to write, iclass 23, count 0 2006.229.15:30:00.78#ibcon#wrote, iclass 23, count 0 2006.229.15:30:00.78#ibcon#about to read 3, iclass 23, count 0 2006.229.15:30:00.80#ibcon#read 3, iclass 23, count 0 2006.229.15:30:00.80#ibcon#about to read 4, iclass 23, count 0 2006.229.15:30:00.80#ibcon#read 4, iclass 23, count 0 2006.229.15:30:00.80#ibcon#about to read 5, iclass 23, count 0 2006.229.15:30:00.80#ibcon#read 5, iclass 23, count 0 2006.229.15:30:00.80#ibcon#about to read 6, iclass 23, count 0 2006.229.15:30:00.80#ibcon#read 6, iclass 23, count 0 2006.229.15:30:00.80#ibcon#end of sib2, iclass 23, count 0 2006.229.15:30:00.80#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:30:00.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:30:00.80#ibcon#[27=USB\r\n] 2006.229.15:30:00.80#ibcon#*before write, iclass 23, count 0 2006.229.15:30:00.80#ibcon#enter sib2, iclass 23, count 0 2006.229.15:30:00.80#ibcon#flushed, iclass 23, count 0 2006.229.15:30:00.80#ibcon#about to write, iclass 23, count 0 2006.229.15:30:00.80#ibcon#wrote, iclass 23, count 0 2006.229.15:30:00.80#ibcon#about to read 3, iclass 23, count 0 2006.229.15:30:00.83#ibcon#read 3, iclass 23, count 0 2006.229.15:30:00.83#ibcon#about to read 4, iclass 23, count 0 2006.229.15:30:00.83#ibcon#read 4, iclass 23, count 0 2006.229.15:30:00.83#ibcon#about to read 5, iclass 23, count 0 2006.229.15:30:00.83#ibcon#read 5, iclass 23, count 0 2006.229.15:30:00.83#ibcon#about to read 6, iclass 23, count 0 2006.229.15:30:00.83#ibcon#read 6, iclass 23, count 0 2006.229.15:30:00.83#ibcon#end of sib2, iclass 23, count 0 2006.229.15:30:00.83#ibcon#*after write, iclass 23, count 0 2006.229.15:30:00.83#ibcon#*before return 0, iclass 23, count 0 2006.229.15:30:00.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:30:00.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.15:30:00.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:30:00.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:30:00.83$vck44/vblo=7,734.99 2006.229.15:30:00.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:30:00.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:30:00.83#ibcon#ireg 17 cls_cnt 0 2006.229.15:30:00.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:30:00.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:30:00.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:30:00.83#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:30:00.83#ibcon#first serial, iclass 25, count 0 2006.229.15:30:00.83#ibcon#enter sib2, iclass 25, count 0 2006.229.15:30:00.83#ibcon#flushed, iclass 25, count 0 2006.229.15:30:00.83#ibcon#about to write, iclass 25, count 0 2006.229.15:30:00.83#ibcon#wrote, iclass 25, count 0 2006.229.15:30:00.83#ibcon#about to read 3, iclass 25, count 0 2006.229.15:30:00.85#ibcon#read 3, iclass 25, count 0 2006.229.15:30:00.85#ibcon#about to read 4, iclass 25, count 0 2006.229.15:30:00.85#ibcon#read 4, iclass 25, count 0 2006.229.15:30:00.85#ibcon#about to read 5, iclass 25, count 0 2006.229.15:30:00.85#ibcon#read 5, iclass 25, count 0 2006.229.15:30:00.85#ibcon#about to read 6, iclass 25, count 0 2006.229.15:30:00.85#ibcon#read 6, iclass 25, count 0 2006.229.15:30:00.85#ibcon#end of sib2, iclass 25, count 0 2006.229.15:30:00.85#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:30:00.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:30:00.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:30:00.85#ibcon#*before write, iclass 25, count 0 2006.229.15:30:00.85#ibcon#enter sib2, iclass 25, count 0 2006.229.15:30:00.85#ibcon#flushed, iclass 25, count 0 2006.229.15:30:00.85#ibcon#about to write, iclass 25, count 0 2006.229.15:30:00.85#ibcon#wrote, iclass 25, count 0 2006.229.15:30:00.85#ibcon#about to read 3, iclass 25, count 0 2006.229.15:30:00.89#ibcon#read 3, iclass 25, count 0 2006.229.15:30:00.89#ibcon#about to read 4, iclass 25, count 0 2006.229.15:30:00.89#ibcon#read 4, iclass 25, count 0 2006.229.15:30:00.89#ibcon#about to read 5, iclass 25, count 0 2006.229.15:30:00.89#ibcon#read 5, iclass 25, count 0 2006.229.15:30:00.89#ibcon#about to read 6, iclass 25, count 0 2006.229.15:30:00.89#ibcon#read 6, iclass 25, count 0 2006.229.15:30:00.89#ibcon#end of sib2, iclass 25, count 0 2006.229.15:30:00.89#ibcon#*after write, iclass 25, count 0 2006.229.15:30:00.89#ibcon#*before return 0, iclass 25, count 0 2006.229.15:30:00.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:30:00.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:30:00.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:30:00.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:30:00.89$vck44/vb=7,4 2006.229.15:30:00.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.15:30:00.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.15:30:00.89#ibcon#ireg 11 cls_cnt 2 2006.229.15:30:00.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:30:00.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:30:00.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:30:00.95#ibcon#enter wrdev, iclass 27, count 2 2006.229.15:30:00.95#ibcon#first serial, iclass 27, count 2 2006.229.15:30:00.95#ibcon#enter sib2, iclass 27, count 2 2006.229.15:30:00.95#ibcon#flushed, iclass 27, count 2 2006.229.15:30:00.95#ibcon#about to write, iclass 27, count 2 2006.229.15:30:00.95#ibcon#wrote, iclass 27, count 2 2006.229.15:30:00.95#ibcon#about to read 3, iclass 27, count 2 2006.229.15:30:00.97#ibcon#read 3, iclass 27, count 2 2006.229.15:30:00.97#ibcon#about to read 4, iclass 27, count 2 2006.229.15:30:00.97#ibcon#read 4, iclass 27, count 2 2006.229.15:30:00.97#ibcon#about to read 5, iclass 27, count 2 2006.229.15:30:00.97#ibcon#read 5, iclass 27, count 2 2006.229.15:30:00.97#ibcon#about to read 6, iclass 27, count 2 2006.229.15:30:00.97#ibcon#read 6, iclass 27, count 2 2006.229.15:30:00.97#ibcon#end of sib2, iclass 27, count 2 2006.229.15:30:00.97#ibcon#*mode == 0, iclass 27, count 2 2006.229.15:30:00.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.15:30:00.97#ibcon#[27=AT07-04\r\n] 2006.229.15:30:00.97#ibcon#*before write, iclass 27, count 2 2006.229.15:30:00.97#ibcon#enter sib2, iclass 27, count 2 2006.229.15:30:00.97#ibcon#flushed, iclass 27, count 2 2006.229.15:30:00.97#ibcon#about to write, iclass 27, count 2 2006.229.15:30:00.97#ibcon#wrote, iclass 27, count 2 2006.229.15:30:00.97#ibcon#about to read 3, iclass 27, count 2 2006.229.15:30:01.00#ibcon#read 3, iclass 27, count 2 2006.229.15:30:01.00#ibcon#about to read 4, iclass 27, count 2 2006.229.15:30:01.00#ibcon#read 4, iclass 27, count 2 2006.229.15:30:01.00#ibcon#about to read 5, iclass 27, count 2 2006.229.15:30:01.00#ibcon#read 5, iclass 27, count 2 2006.229.15:30:01.00#ibcon#about to read 6, iclass 27, count 2 2006.229.15:30:01.00#ibcon#read 6, iclass 27, count 2 2006.229.15:30:01.00#ibcon#end of sib2, iclass 27, count 2 2006.229.15:30:01.00#ibcon#*after write, iclass 27, count 2 2006.229.15:30:01.00#ibcon#*before return 0, iclass 27, count 2 2006.229.15:30:01.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:30:01.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.15:30:01.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.15:30:01.00#ibcon#ireg 7 cls_cnt 0 2006.229.15:30:01.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:30:01.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:30:01.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:30:01.12#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:30:01.12#ibcon#first serial, iclass 27, count 0 2006.229.15:30:01.12#ibcon#enter sib2, iclass 27, count 0 2006.229.15:30:01.12#ibcon#flushed, iclass 27, count 0 2006.229.15:30:01.12#ibcon#about to write, iclass 27, count 0 2006.229.15:30:01.12#ibcon#wrote, iclass 27, count 0 2006.229.15:30:01.12#ibcon#about to read 3, iclass 27, count 0 2006.229.15:30:01.14#ibcon#read 3, iclass 27, count 0 2006.229.15:30:01.14#ibcon#about to read 4, iclass 27, count 0 2006.229.15:30:01.14#ibcon#read 4, iclass 27, count 0 2006.229.15:30:01.14#ibcon#about to read 5, iclass 27, count 0 2006.229.15:30:01.14#ibcon#read 5, iclass 27, count 0 2006.229.15:30:01.14#ibcon#about to read 6, iclass 27, count 0 2006.229.15:30:01.14#ibcon#read 6, iclass 27, count 0 2006.229.15:30:01.14#ibcon#end of sib2, iclass 27, count 0 2006.229.15:30:01.14#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:30:01.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:30:01.14#ibcon#[27=USB\r\n] 2006.229.15:30:01.14#ibcon#*before write, iclass 27, count 0 2006.229.15:30:01.14#ibcon#enter sib2, iclass 27, count 0 2006.229.15:30:01.14#ibcon#flushed, iclass 27, count 0 2006.229.15:30:01.14#ibcon#about to write, iclass 27, count 0 2006.229.15:30:01.14#ibcon#wrote, iclass 27, count 0 2006.229.15:30:01.14#ibcon#about to read 3, iclass 27, count 0 2006.229.15:30:01.17#ibcon#read 3, iclass 27, count 0 2006.229.15:30:01.17#ibcon#about to read 4, iclass 27, count 0 2006.229.15:30:01.17#ibcon#read 4, iclass 27, count 0 2006.229.15:30:01.17#ibcon#about to read 5, iclass 27, count 0 2006.229.15:30:01.17#ibcon#read 5, iclass 27, count 0 2006.229.15:30:01.17#ibcon#about to read 6, iclass 27, count 0 2006.229.15:30:01.17#ibcon#read 6, iclass 27, count 0 2006.229.15:30:01.17#ibcon#end of sib2, iclass 27, count 0 2006.229.15:30:01.17#ibcon#*after write, iclass 27, count 0 2006.229.15:30:01.17#ibcon#*before return 0, iclass 27, count 0 2006.229.15:30:01.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:30:01.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.15:30:01.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:30:01.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:30:01.17$vck44/vblo=8,744.99 2006.229.15:30:01.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.15:30:01.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.15:30:01.17#ibcon#ireg 17 cls_cnt 0 2006.229.15:30:01.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:30:01.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:30:01.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:30:01.17#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:30:01.17#ibcon#first serial, iclass 29, count 0 2006.229.15:30:01.17#ibcon#enter sib2, iclass 29, count 0 2006.229.15:30:01.17#ibcon#flushed, iclass 29, count 0 2006.229.15:30:01.17#ibcon#about to write, iclass 29, count 0 2006.229.15:30:01.17#ibcon#wrote, iclass 29, count 0 2006.229.15:30:01.17#ibcon#about to read 3, iclass 29, count 0 2006.229.15:30:01.19#ibcon#read 3, iclass 29, count 0 2006.229.15:30:01.19#ibcon#about to read 4, iclass 29, count 0 2006.229.15:30:01.19#ibcon#read 4, iclass 29, count 0 2006.229.15:30:01.19#ibcon#about to read 5, iclass 29, count 0 2006.229.15:30:01.19#ibcon#read 5, iclass 29, count 0 2006.229.15:30:01.19#ibcon#about to read 6, iclass 29, count 0 2006.229.15:30:01.19#ibcon#read 6, iclass 29, count 0 2006.229.15:30:01.19#ibcon#end of sib2, iclass 29, count 0 2006.229.15:30:01.19#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:30:01.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:30:01.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:30:01.19#ibcon#*before write, iclass 29, count 0 2006.229.15:30:01.19#ibcon#enter sib2, iclass 29, count 0 2006.229.15:30:01.19#ibcon#flushed, iclass 29, count 0 2006.229.15:30:01.19#ibcon#about to write, iclass 29, count 0 2006.229.15:30:01.19#ibcon#wrote, iclass 29, count 0 2006.229.15:30:01.19#ibcon#about to read 3, iclass 29, count 0 2006.229.15:30:01.23#ibcon#read 3, iclass 29, count 0 2006.229.15:30:01.23#ibcon#about to read 4, iclass 29, count 0 2006.229.15:30:01.23#ibcon#read 4, iclass 29, count 0 2006.229.15:30:01.23#ibcon#about to read 5, iclass 29, count 0 2006.229.15:30:01.23#ibcon#read 5, iclass 29, count 0 2006.229.15:30:01.23#ibcon#about to read 6, iclass 29, count 0 2006.229.15:30:01.23#ibcon#read 6, iclass 29, count 0 2006.229.15:30:01.23#ibcon#end of sib2, iclass 29, count 0 2006.229.15:30:01.23#ibcon#*after write, iclass 29, count 0 2006.229.15:30:01.23#ibcon#*before return 0, iclass 29, count 0 2006.229.15:30:01.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:30:01.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.15:30:01.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:30:01.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:30:01.23$vck44/vb=8,4 2006.229.15:30:01.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.15:30:01.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.15:30:01.23#ibcon#ireg 11 cls_cnt 2 2006.229.15:30:01.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:30:01.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:30:01.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:30:01.29#ibcon#enter wrdev, iclass 31, count 2 2006.229.15:30:01.29#ibcon#first serial, iclass 31, count 2 2006.229.15:30:01.29#ibcon#enter sib2, iclass 31, count 2 2006.229.15:30:01.29#ibcon#flushed, iclass 31, count 2 2006.229.15:30:01.29#ibcon#about to write, iclass 31, count 2 2006.229.15:30:01.29#ibcon#wrote, iclass 31, count 2 2006.229.15:30:01.29#ibcon#about to read 3, iclass 31, count 2 2006.229.15:30:01.31#ibcon#read 3, iclass 31, count 2 2006.229.15:30:01.31#ibcon#about to read 4, iclass 31, count 2 2006.229.15:30:01.31#ibcon#read 4, iclass 31, count 2 2006.229.15:30:01.31#ibcon#about to read 5, iclass 31, count 2 2006.229.15:30:01.31#ibcon#read 5, iclass 31, count 2 2006.229.15:30:01.31#ibcon#about to read 6, iclass 31, count 2 2006.229.15:30:01.31#ibcon#read 6, iclass 31, count 2 2006.229.15:30:01.31#ibcon#end of sib2, iclass 31, count 2 2006.229.15:30:01.31#ibcon#*mode == 0, iclass 31, count 2 2006.229.15:30:01.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.15:30:01.31#ibcon#[27=AT08-04\r\n] 2006.229.15:30:01.31#ibcon#*before write, iclass 31, count 2 2006.229.15:30:01.31#ibcon#enter sib2, iclass 31, count 2 2006.229.15:30:01.31#ibcon#flushed, iclass 31, count 2 2006.229.15:30:01.31#ibcon#about to write, iclass 31, count 2 2006.229.15:30:01.31#ibcon#wrote, iclass 31, count 2 2006.229.15:30:01.31#ibcon#about to read 3, iclass 31, count 2 2006.229.15:30:01.34#ibcon#read 3, iclass 31, count 2 2006.229.15:30:01.34#ibcon#about to read 4, iclass 31, count 2 2006.229.15:30:01.34#ibcon#read 4, iclass 31, count 2 2006.229.15:30:01.34#ibcon#about to read 5, iclass 31, count 2 2006.229.15:30:01.34#ibcon#read 5, iclass 31, count 2 2006.229.15:30:01.34#ibcon#about to read 6, iclass 31, count 2 2006.229.15:30:01.34#ibcon#read 6, iclass 31, count 2 2006.229.15:30:01.34#ibcon#end of sib2, iclass 31, count 2 2006.229.15:30:01.34#ibcon#*after write, iclass 31, count 2 2006.229.15:30:01.34#ibcon#*before return 0, iclass 31, count 2 2006.229.15:30:01.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:30:01.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.15:30:01.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.15:30:01.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:30:01.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:30:01.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:30:01.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:30:01.46#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:30:01.46#ibcon#first serial, iclass 31, count 0 2006.229.15:30:01.46#ibcon#enter sib2, iclass 31, count 0 2006.229.15:30:01.46#ibcon#flushed, iclass 31, count 0 2006.229.15:30:01.46#ibcon#about to write, iclass 31, count 0 2006.229.15:30:01.46#ibcon#wrote, iclass 31, count 0 2006.229.15:30:01.46#ibcon#about to read 3, iclass 31, count 0 2006.229.15:30:01.48#ibcon#read 3, iclass 31, count 0 2006.229.15:30:01.48#ibcon#about to read 4, iclass 31, count 0 2006.229.15:30:01.48#ibcon#read 4, iclass 31, count 0 2006.229.15:30:01.48#ibcon#about to read 5, iclass 31, count 0 2006.229.15:30:01.48#ibcon#read 5, iclass 31, count 0 2006.229.15:30:01.48#ibcon#about to read 6, iclass 31, count 0 2006.229.15:30:01.48#ibcon#read 6, iclass 31, count 0 2006.229.15:30:01.48#ibcon#end of sib2, iclass 31, count 0 2006.229.15:30:01.48#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:30:01.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:30:01.48#ibcon#[27=USB\r\n] 2006.229.15:30:01.48#ibcon#*before write, iclass 31, count 0 2006.229.15:30:01.48#ibcon#enter sib2, iclass 31, count 0 2006.229.15:30:01.48#ibcon#flushed, iclass 31, count 0 2006.229.15:30:01.48#ibcon#about to write, iclass 31, count 0 2006.229.15:30:01.48#ibcon#wrote, iclass 31, count 0 2006.229.15:30:01.48#ibcon#about to read 3, iclass 31, count 0 2006.229.15:30:01.51#ibcon#read 3, iclass 31, count 0 2006.229.15:30:01.51#ibcon#about to read 4, iclass 31, count 0 2006.229.15:30:01.51#ibcon#read 4, iclass 31, count 0 2006.229.15:30:01.51#ibcon#about to read 5, iclass 31, count 0 2006.229.15:30:01.51#ibcon#read 5, iclass 31, count 0 2006.229.15:30:01.51#ibcon#about to read 6, iclass 31, count 0 2006.229.15:30:01.51#ibcon#read 6, iclass 31, count 0 2006.229.15:30:01.51#ibcon#end of sib2, iclass 31, count 0 2006.229.15:30:01.51#ibcon#*after write, iclass 31, count 0 2006.229.15:30:01.51#ibcon#*before return 0, iclass 31, count 0 2006.229.15:30:01.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:30:01.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.15:30:01.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:30:01.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:30:01.51$vck44/vabw=wide 2006.229.15:30:01.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.15:30:01.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.15:30:01.51#ibcon#ireg 8 cls_cnt 0 2006.229.15:30:01.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:30:01.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:30:01.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:30:01.51#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:30:01.51#ibcon#first serial, iclass 33, count 0 2006.229.15:30:01.51#ibcon#enter sib2, iclass 33, count 0 2006.229.15:30:01.51#ibcon#flushed, iclass 33, count 0 2006.229.15:30:01.51#ibcon#about to write, iclass 33, count 0 2006.229.15:30:01.51#ibcon#wrote, iclass 33, count 0 2006.229.15:30:01.51#ibcon#about to read 3, iclass 33, count 0 2006.229.15:30:01.53#ibcon#read 3, iclass 33, count 0 2006.229.15:30:01.53#ibcon#about to read 4, iclass 33, count 0 2006.229.15:30:01.53#ibcon#read 4, iclass 33, count 0 2006.229.15:30:01.53#ibcon#about to read 5, iclass 33, count 0 2006.229.15:30:01.53#ibcon#read 5, iclass 33, count 0 2006.229.15:30:01.53#ibcon#about to read 6, iclass 33, count 0 2006.229.15:30:01.53#ibcon#read 6, iclass 33, count 0 2006.229.15:30:01.53#ibcon#end of sib2, iclass 33, count 0 2006.229.15:30:01.53#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:30:01.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:30:01.53#ibcon#[25=BW32\r\n] 2006.229.15:30:01.53#ibcon#*before write, iclass 33, count 0 2006.229.15:30:01.53#ibcon#enter sib2, iclass 33, count 0 2006.229.15:30:01.53#ibcon#flushed, iclass 33, count 0 2006.229.15:30:01.53#ibcon#about to write, iclass 33, count 0 2006.229.15:30:01.53#ibcon#wrote, iclass 33, count 0 2006.229.15:30:01.53#ibcon#about to read 3, iclass 33, count 0 2006.229.15:30:01.56#ibcon#read 3, iclass 33, count 0 2006.229.15:30:01.56#ibcon#about to read 4, iclass 33, count 0 2006.229.15:30:01.56#ibcon#read 4, iclass 33, count 0 2006.229.15:30:01.56#ibcon#about to read 5, iclass 33, count 0 2006.229.15:30:01.56#ibcon#read 5, iclass 33, count 0 2006.229.15:30:01.56#ibcon#about to read 6, iclass 33, count 0 2006.229.15:30:01.56#ibcon#read 6, iclass 33, count 0 2006.229.15:30:01.56#ibcon#end of sib2, iclass 33, count 0 2006.229.15:30:01.56#ibcon#*after write, iclass 33, count 0 2006.229.15:30:01.56#ibcon#*before return 0, iclass 33, count 0 2006.229.15:30:01.56#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:30:01.56#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.15:30:01.56#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:30:01.56#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:30:01.56$vck44/vbbw=wide 2006.229.15:30:01.56#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.15:30:01.56#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.15:30:01.56#ibcon#ireg 8 cls_cnt 0 2006.229.15:30:01.56#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:30:01.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:30:01.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:30:01.63#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:30:01.63#ibcon#first serial, iclass 35, count 0 2006.229.15:30:01.63#ibcon#enter sib2, iclass 35, count 0 2006.229.15:30:01.63#ibcon#flushed, iclass 35, count 0 2006.229.15:30:01.63#ibcon#about to write, iclass 35, count 0 2006.229.15:30:01.63#ibcon#wrote, iclass 35, count 0 2006.229.15:30:01.63#ibcon#about to read 3, iclass 35, count 0 2006.229.15:30:01.65#ibcon#read 3, iclass 35, count 0 2006.229.15:30:01.65#ibcon#about to read 4, iclass 35, count 0 2006.229.15:30:01.65#ibcon#read 4, iclass 35, count 0 2006.229.15:30:01.65#ibcon#about to read 5, iclass 35, count 0 2006.229.15:30:01.65#ibcon#read 5, iclass 35, count 0 2006.229.15:30:01.65#ibcon#about to read 6, iclass 35, count 0 2006.229.15:30:01.65#ibcon#read 6, iclass 35, count 0 2006.229.15:30:01.65#ibcon#end of sib2, iclass 35, count 0 2006.229.15:30:01.65#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:30:01.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:30:01.65#ibcon#[27=BW32\r\n] 2006.229.15:30:01.65#ibcon#*before write, iclass 35, count 0 2006.229.15:30:01.65#ibcon#enter sib2, iclass 35, count 0 2006.229.15:30:01.65#ibcon#flushed, iclass 35, count 0 2006.229.15:30:01.65#ibcon#about to write, iclass 35, count 0 2006.229.15:30:01.65#ibcon#wrote, iclass 35, count 0 2006.229.15:30:01.65#ibcon#about to read 3, iclass 35, count 0 2006.229.15:30:01.68#ibcon#read 3, iclass 35, count 0 2006.229.15:30:01.68#ibcon#about to read 4, iclass 35, count 0 2006.229.15:30:01.68#ibcon#read 4, iclass 35, count 0 2006.229.15:30:01.68#ibcon#about to read 5, iclass 35, count 0 2006.229.15:30:01.68#ibcon#read 5, iclass 35, count 0 2006.229.15:30:01.68#ibcon#about to read 6, iclass 35, count 0 2006.229.15:30:01.68#ibcon#read 6, iclass 35, count 0 2006.229.15:30:01.68#ibcon#end of sib2, iclass 35, count 0 2006.229.15:30:01.68#ibcon#*after write, iclass 35, count 0 2006.229.15:30:01.68#ibcon#*before return 0, iclass 35, count 0 2006.229.15:30:01.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:30:01.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:30:01.68#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:30:01.68#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:30:01.68$setupk4/ifdk4 2006.229.15:30:01.68$ifdk4/lo= 2006.229.15:30:01.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:30:01.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:30:01.68$ifdk4/patch= 2006.229.15:30:01.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:30:01.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:30:01.68$setupk4/!*+20s 2006.229.15:30:10.06#abcon#<5=/05 0.8 1.9 27.351001001.8\r\n> 2006.229.15:30:10.08#abcon#{5=INTERFACE CLEAR} 2006.229.15:30:10.14#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:30:14.14#trakl#Source acquired 2006.229.15:30:16.14#flagr#flagr/antenna,acquired 2006.229.15:30:16.19$setupk4/"tpicd 2006.229.15:30:16.19$setupk4/echo=off 2006.229.15:30:16.19$setupk4/xlog=off 2006.229.15:30:16.19:!2006.229.15:34:22 2006.229.15:34:22.00:preob 2006.229.15:34:23.13/onsource/TRACKING 2006.229.15:34:23.13:!2006.229.15:34:32 2006.229.15:34:32.00:"tape 2006.229.15:34:32.00:"st=record 2006.229.15:34:32.00:data_valid=on 2006.229.15:34:32.00:midob 2006.229.15:34:32.13/onsource/TRACKING 2006.229.15:34:32.13/wx/27.30,1001.8,100 2006.229.15:34:32.30/cable/+6.4151E-03 2006.229.15:34:33.39/va/01,08,usb,yes,35,37 2006.229.15:34:33.39/va/02,07,usb,yes,38,38 2006.229.15:34:33.39/va/03,06,usb,yes,46,49 2006.229.15:34:33.39/va/04,07,usb,yes,39,41 2006.229.15:34:33.39/va/05,04,usb,yes,35,35 2006.229.15:34:33.39/va/06,04,usb,yes,39,38 2006.229.15:34:33.39/va/07,05,usb,yes,34,35 2006.229.15:34:33.39/va/08,06,usb,yes,25,31 2006.229.15:34:33.62/valo/01,524.99,yes,locked 2006.229.15:34:33.62/valo/02,534.99,yes,locked 2006.229.15:34:33.62/valo/03,564.99,yes,locked 2006.229.15:34:33.62/valo/04,624.99,yes,locked 2006.229.15:34:33.62/valo/05,734.99,yes,locked 2006.229.15:34:33.62/valo/06,814.99,yes,locked 2006.229.15:34:33.62/valo/07,864.99,yes,locked 2006.229.15:34:33.62/valo/08,884.99,yes,locked 2006.229.15:34:34.71/vb/01,04,usb,yes,30,27 2006.229.15:34:34.71/vb/02,04,usb,yes,32,32 2006.229.15:34:34.71/vb/03,04,usb,yes,29,32 2006.229.15:34:34.71/vb/04,04,usb,yes,33,32 2006.229.15:34:34.71/vb/05,04,usb,yes,26,28 2006.229.15:34:34.71/vb/06,04,usb,yes,30,26 2006.229.15:34:34.71/vb/07,04,usb,yes,30,30 2006.229.15:34:34.71/vb/08,04,usb,yes,27,31 2006.229.15:34:34.95/vblo/01,629.99,yes,locked 2006.229.15:34:34.95/vblo/02,634.99,yes,locked 2006.229.15:34:34.95/vblo/03,649.99,yes,locked 2006.229.15:34:34.95/vblo/04,679.99,yes,locked 2006.229.15:34:34.95/vblo/05,709.99,yes,locked 2006.229.15:34:34.95/vblo/06,719.99,yes,locked 2006.229.15:34:34.95/vblo/07,734.99,yes,locked 2006.229.15:34:34.95/vblo/08,744.99,yes,locked 2006.229.15:34:35.10/vabw/8 2006.229.15:34:35.25/vbbw/8 2006.229.15:34:35.39/xfe/off,on,12.2 2006.229.15:34:35.76/ifatt/23,28,28,28 2006.229.15:34:36.07/fmout-gps/S +4.51E-07 2006.229.15:34:36.11:!2006.229.15:35:12 2006.229.15:35:12.01:data_valid=off 2006.229.15:35:12.02:"et 2006.229.15:35:12.02:!+3s 2006.229.15:35:15.03:"tape 2006.229.15:35:15.03:postob 2006.229.15:35:15.22/cable/+6.4131E-03 2006.229.15:35:15.22/wx/27.29,1001.8,100 2006.229.15:35:15.28/fmout-gps/S +4.50E-07 2006.229.15:35:15.28:scan_name=229-1537,jd0608,70 2006.229.15:35:15.29:source=2121+053,212344.52,053522.1,2000.0,ccw 2006.229.15:35:17.13#flagr#flagr/antenna,new-source 2006.229.15:35:17.14:checkk5 2006.229.15:35:17.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:35:17.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:35:18.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:35:18.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:35:19.12/chk_obsdata//k5ts1/T2291534??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:35:19.53/chk_obsdata//k5ts2/T2291534??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:35:19.92/chk_obsdata//k5ts3/T2291534??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:35:20.32/chk_obsdata//k5ts4/T2291534??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:35:21.06/k5log//k5ts1_log_newline 2006.229.15:35:21.78/k5log//k5ts2_log_newline 2006.229.15:35:22.49/k5log//k5ts3_log_newline 2006.229.15:35:23.22/k5log//k5ts4_log_newline 2006.229.15:35:23.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:35:23.25:setupk4=1 2006.229.15:35:23.25$setupk4/echo=on 2006.229.15:35:23.25$setupk4/pcalon 2006.229.15:35:23.25$pcalon/"no phase cal control is implemented here 2006.229.15:35:23.25$setupk4/"tpicd=stop 2006.229.15:35:23.25$setupk4/"rec=synch_on 2006.229.15:35:23.25$setupk4/"rec_mode=128 2006.229.15:35:23.25$setupk4/!* 2006.229.15:35:23.25$setupk4/recpk4 2006.229.15:35:23.25$recpk4/recpatch= 2006.229.15:35:23.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:35:23.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:35:23.25$setupk4/vck44 2006.229.15:35:23.25$vck44/valo=1,524.99 2006.229.15:35:23.25#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:35:23.25#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:35:23.25#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:23.25#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:23.25#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:23.25#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:23.25#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:35:23.25#ibcon#first serial, iclass 20, count 0 2006.229.15:35:23.25#ibcon#enter sib2, iclass 20, count 0 2006.229.15:35:23.25#ibcon#flushed, iclass 20, count 0 2006.229.15:35:23.25#ibcon#about to write, iclass 20, count 0 2006.229.15:35:23.25#ibcon#wrote, iclass 20, count 0 2006.229.15:35:23.25#ibcon#about to read 3, iclass 20, count 0 2006.229.15:35:23.27#ibcon#read 3, iclass 20, count 0 2006.229.15:35:23.27#ibcon#about to read 4, iclass 20, count 0 2006.229.15:35:23.27#ibcon#read 4, iclass 20, count 0 2006.229.15:35:23.27#ibcon#about to read 5, iclass 20, count 0 2006.229.15:35:23.27#ibcon#read 5, iclass 20, count 0 2006.229.15:35:23.27#ibcon#about to read 6, iclass 20, count 0 2006.229.15:35:23.27#ibcon#read 6, iclass 20, count 0 2006.229.15:35:23.27#ibcon#end of sib2, iclass 20, count 0 2006.229.15:35:23.27#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:35:23.27#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:35:23.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:35:23.27#ibcon#*before write, iclass 20, count 0 2006.229.15:35:23.27#ibcon#enter sib2, iclass 20, count 0 2006.229.15:35:23.27#ibcon#flushed, iclass 20, count 0 2006.229.15:35:23.27#ibcon#about to write, iclass 20, count 0 2006.229.15:35:23.27#ibcon#wrote, iclass 20, count 0 2006.229.15:35:23.27#ibcon#about to read 3, iclass 20, count 0 2006.229.15:35:23.32#ibcon#read 3, iclass 20, count 0 2006.229.15:35:23.32#ibcon#about to read 4, iclass 20, count 0 2006.229.15:35:23.32#ibcon#read 4, iclass 20, count 0 2006.229.15:35:23.32#ibcon#about to read 5, iclass 20, count 0 2006.229.15:35:23.32#ibcon#read 5, iclass 20, count 0 2006.229.15:35:23.32#ibcon#about to read 6, iclass 20, count 0 2006.229.15:35:23.32#ibcon#read 6, iclass 20, count 0 2006.229.15:35:23.32#ibcon#end of sib2, iclass 20, count 0 2006.229.15:35:23.32#ibcon#*after write, iclass 20, count 0 2006.229.15:35:23.32#ibcon#*before return 0, iclass 20, count 0 2006.229.15:35:23.32#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:23.32#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:23.32#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:35:23.32#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:35:23.32$vck44/va=1,8 2006.229.15:35:23.32#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:35:23.32#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:35:23.32#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:23.32#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:23.32#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:23.32#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:23.32#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:35:23.32#ibcon#first serial, iclass 22, count 2 2006.229.15:35:23.32#ibcon#enter sib2, iclass 22, count 2 2006.229.15:35:23.32#ibcon#flushed, iclass 22, count 2 2006.229.15:35:23.32#ibcon#about to write, iclass 22, count 2 2006.229.15:35:23.32#ibcon#wrote, iclass 22, count 2 2006.229.15:35:23.32#ibcon#about to read 3, iclass 22, count 2 2006.229.15:35:23.34#ibcon#read 3, iclass 22, count 2 2006.229.15:35:23.34#ibcon#about to read 4, iclass 22, count 2 2006.229.15:35:23.34#ibcon#read 4, iclass 22, count 2 2006.229.15:35:23.34#ibcon#about to read 5, iclass 22, count 2 2006.229.15:35:23.34#ibcon#read 5, iclass 22, count 2 2006.229.15:35:23.34#ibcon#about to read 6, iclass 22, count 2 2006.229.15:35:23.34#ibcon#read 6, iclass 22, count 2 2006.229.15:35:23.34#ibcon#end of sib2, iclass 22, count 2 2006.229.15:35:23.34#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:35:23.34#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:35:23.34#ibcon#[25=AT01-08\r\n] 2006.229.15:35:23.34#ibcon#*before write, iclass 22, count 2 2006.229.15:35:23.34#ibcon#enter sib2, iclass 22, count 2 2006.229.15:35:23.34#ibcon#flushed, iclass 22, count 2 2006.229.15:35:23.34#ibcon#about to write, iclass 22, count 2 2006.229.15:35:23.34#ibcon#wrote, iclass 22, count 2 2006.229.15:35:23.34#ibcon#about to read 3, iclass 22, count 2 2006.229.15:35:23.37#ibcon#read 3, iclass 22, count 2 2006.229.15:35:23.37#ibcon#about to read 4, iclass 22, count 2 2006.229.15:35:23.37#ibcon#read 4, iclass 22, count 2 2006.229.15:35:23.37#ibcon#about to read 5, iclass 22, count 2 2006.229.15:35:23.37#ibcon#read 5, iclass 22, count 2 2006.229.15:35:23.37#ibcon#about to read 6, iclass 22, count 2 2006.229.15:35:23.37#ibcon#read 6, iclass 22, count 2 2006.229.15:35:23.37#ibcon#end of sib2, iclass 22, count 2 2006.229.15:35:23.37#ibcon#*after write, iclass 22, count 2 2006.229.15:35:23.37#ibcon#*before return 0, iclass 22, count 2 2006.229.15:35:23.37#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:23.37#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:23.37#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:35:23.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:23.37#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:23.49#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:23.49#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:23.49#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:35:23.49#ibcon#first serial, iclass 22, count 0 2006.229.15:35:23.49#ibcon#enter sib2, iclass 22, count 0 2006.229.15:35:23.49#ibcon#flushed, iclass 22, count 0 2006.229.15:35:23.49#ibcon#about to write, iclass 22, count 0 2006.229.15:35:23.49#ibcon#wrote, iclass 22, count 0 2006.229.15:35:23.49#ibcon#about to read 3, iclass 22, count 0 2006.229.15:35:23.51#ibcon#read 3, iclass 22, count 0 2006.229.15:35:23.51#ibcon#about to read 4, iclass 22, count 0 2006.229.15:35:23.51#ibcon#read 4, iclass 22, count 0 2006.229.15:35:23.51#ibcon#about to read 5, iclass 22, count 0 2006.229.15:35:23.51#ibcon#read 5, iclass 22, count 0 2006.229.15:35:23.51#ibcon#about to read 6, iclass 22, count 0 2006.229.15:35:23.51#ibcon#read 6, iclass 22, count 0 2006.229.15:35:23.51#ibcon#end of sib2, iclass 22, count 0 2006.229.15:35:23.51#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:35:23.51#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:35:23.51#ibcon#[25=USB\r\n] 2006.229.15:35:23.51#ibcon#*before write, iclass 22, count 0 2006.229.15:35:23.51#ibcon#enter sib2, iclass 22, count 0 2006.229.15:35:23.51#ibcon#flushed, iclass 22, count 0 2006.229.15:35:23.51#ibcon#about to write, iclass 22, count 0 2006.229.15:35:23.51#ibcon#wrote, iclass 22, count 0 2006.229.15:35:23.51#ibcon#about to read 3, iclass 22, count 0 2006.229.15:35:23.54#ibcon#read 3, iclass 22, count 0 2006.229.15:35:23.54#ibcon#about to read 4, iclass 22, count 0 2006.229.15:35:23.54#ibcon#read 4, iclass 22, count 0 2006.229.15:35:23.54#ibcon#about to read 5, iclass 22, count 0 2006.229.15:35:23.54#ibcon#read 5, iclass 22, count 0 2006.229.15:35:23.54#ibcon#about to read 6, iclass 22, count 0 2006.229.15:35:23.54#ibcon#read 6, iclass 22, count 0 2006.229.15:35:23.54#ibcon#end of sib2, iclass 22, count 0 2006.229.15:35:23.54#ibcon#*after write, iclass 22, count 0 2006.229.15:35:23.54#ibcon#*before return 0, iclass 22, count 0 2006.229.15:35:23.54#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:23.54#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:23.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:35:23.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:35:23.54$vck44/valo=2,534.99 2006.229.15:35:23.54#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:35:23.54#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:35:23.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:23.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:23.54#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:23.54#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:23.54#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:35:23.54#ibcon#first serial, iclass 24, count 0 2006.229.15:35:23.54#ibcon#enter sib2, iclass 24, count 0 2006.229.15:35:23.54#ibcon#flushed, iclass 24, count 0 2006.229.15:35:23.54#ibcon#about to write, iclass 24, count 0 2006.229.15:35:23.54#ibcon#wrote, iclass 24, count 0 2006.229.15:35:23.54#ibcon#about to read 3, iclass 24, count 0 2006.229.15:35:23.56#ibcon#read 3, iclass 24, count 0 2006.229.15:35:23.56#ibcon#about to read 4, iclass 24, count 0 2006.229.15:35:23.56#ibcon#read 4, iclass 24, count 0 2006.229.15:35:23.56#ibcon#about to read 5, iclass 24, count 0 2006.229.15:35:23.56#ibcon#read 5, iclass 24, count 0 2006.229.15:35:23.56#ibcon#about to read 6, iclass 24, count 0 2006.229.15:35:23.56#ibcon#read 6, iclass 24, count 0 2006.229.15:35:23.56#ibcon#end of sib2, iclass 24, count 0 2006.229.15:35:23.56#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:35:23.56#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:35:23.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:35:23.56#ibcon#*before write, iclass 24, count 0 2006.229.15:35:23.56#ibcon#enter sib2, iclass 24, count 0 2006.229.15:35:23.56#ibcon#flushed, iclass 24, count 0 2006.229.15:35:23.56#ibcon#about to write, iclass 24, count 0 2006.229.15:35:23.56#ibcon#wrote, iclass 24, count 0 2006.229.15:35:23.56#ibcon#about to read 3, iclass 24, count 0 2006.229.15:35:23.60#ibcon#read 3, iclass 24, count 0 2006.229.15:35:23.60#ibcon#about to read 4, iclass 24, count 0 2006.229.15:35:23.60#ibcon#read 4, iclass 24, count 0 2006.229.15:35:23.60#ibcon#about to read 5, iclass 24, count 0 2006.229.15:35:23.60#ibcon#read 5, iclass 24, count 0 2006.229.15:35:23.60#ibcon#about to read 6, iclass 24, count 0 2006.229.15:35:23.60#ibcon#read 6, iclass 24, count 0 2006.229.15:35:23.60#ibcon#end of sib2, iclass 24, count 0 2006.229.15:35:23.60#ibcon#*after write, iclass 24, count 0 2006.229.15:35:23.60#ibcon#*before return 0, iclass 24, count 0 2006.229.15:35:23.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:23.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:23.60#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:35:23.60#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:35:23.60$vck44/va=2,7 2006.229.15:35:23.60#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:35:23.60#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:35:23.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:23.60#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:23.66#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:23.66#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:23.66#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:35:23.66#ibcon#first serial, iclass 26, count 2 2006.229.15:35:23.66#ibcon#enter sib2, iclass 26, count 2 2006.229.15:35:23.66#ibcon#flushed, iclass 26, count 2 2006.229.15:35:23.66#ibcon#about to write, iclass 26, count 2 2006.229.15:35:23.66#ibcon#wrote, iclass 26, count 2 2006.229.15:35:23.66#ibcon#about to read 3, iclass 26, count 2 2006.229.15:35:23.68#ibcon#read 3, iclass 26, count 2 2006.229.15:35:23.68#ibcon#about to read 4, iclass 26, count 2 2006.229.15:35:23.68#ibcon#read 4, iclass 26, count 2 2006.229.15:35:23.68#ibcon#about to read 5, iclass 26, count 2 2006.229.15:35:23.68#ibcon#read 5, iclass 26, count 2 2006.229.15:35:23.68#ibcon#about to read 6, iclass 26, count 2 2006.229.15:35:23.68#ibcon#read 6, iclass 26, count 2 2006.229.15:35:23.68#ibcon#end of sib2, iclass 26, count 2 2006.229.15:35:23.68#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:35:23.68#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:35:23.68#ibcon#[25=AT02-07\r\n] 2006.229.15:35:23.68#ibcon#*before write, iclass 26, count 2 2006.229.15:35:23.68#ibcon#enter sib2, iclass 26, count 2 2006.229.15:35:23.68#ibcon#flushed, iclass 26, count 2 2006.229.15:35:23.68#ibcon#about to write, iclass 26, count 2 2006.229.15:35:23.68#ibcon#wrote, iclass 26, count 2 2006.229.15:35:23.68#ibcon#about to read 3, iclass 26, count 2 2006.229.15:35:23.71#ibcon#read 3, iclass 26, count 2 2006.229.15:35:23.71#ibcon#about to read 4, iclass 26, count 2 2006.229.15:35:23.71#ibcon#read 4, iclass 26, count 2 2006.229.15:35:23.71#ibcon#about to read 5, iclass 26, count 2 2006.229.15:35:23.71#ibcon#read 5, iclass 26, count 2 2006.229.15:35:23.71#ibcon#about to read 6, iclass 26, count 2 2006.229.15:35:23.71#ibcon#read 6, iclass 26, count 2 2006.229.15:35:23.71#ibcon#end of sib2, iclass 26, count 2 2006.229.15:35:23.71#ibcon#*after write, iclass 26, count 2 2006.229.15:35:23.71#ibcon#*before return 0, iclass 26, count 2 2006.229.15:35:23.71#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:23.71#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:23.71#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:35:23.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:23.71#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:23.83#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:23.83#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:23.83#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:35:23.83#ibcon#first serial, iclass 26, count 0 2006.229.15:35:23.83#ibcon#enter sib2, iclass 26, count 0 2006.229.15:35:23.83#ibcon#flushed, iclass 26, count 0 2006.229.15:35:23.83#ibcon#about to write, iclass 26, count 0 2006.229.15:35:23.83#ibcon#wrote, iclass 26, count 0 2006.229.15:35:23.83#ibcon#about to read 3, iclass 26, count 0 2006.229.15:35:23.85#ibcon#read 3, iclass 26, count 0 2006.229.15:35:23.85#ibcon#about to read 4, iclass 26, count 0 2006.229.15:35:23.85#ibcon#read 4, iclass 26, count 0 2006.229.15:35:23.85#ibcon#about to read 5, iclass 26, count 0 2006.229.15:35:23.85#ibcon#read 5, iclass 26, count 0 2006.229.15:35:23.85#ibcon#about to read 6, iclass 26, count 0 2006.229.15:35:23.85#ibcon#read 6, iclass 26, count 0 2006.229.15:35:23.85#ibcon#end of sib2, iclass 26, count 0 2006.229.15:35:23.85#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:35:23.85#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:35:23.85#ibcon#[25=USB\r\n] 2006.229.15:35:23.85#ibcon#*before write, iclass 26, count 0 2006.229.15:35:23.85#ibcon#enter sib2, iclass 26, count 0 2006.229.15:35:23.85#ibcon#flushed, iclass 26, count 0 2006.229.15:35:23.85#ibcon#about to write, iclass 26, count 0 2006.229.15:35:23.85#ibcon#wrote, iclass 26, count 0 2006.229.15:35:23.85#ibcon#about to read 3, iclass 26, count 0 2006.229.15:35:23.88#ibcon#read 3, iclass 26, count 0 2006.229.15:35:23.88#ibcon#about to read 4, iclass 26, count 0 2006.229.15:35:23.88#ibcon#read 4, iclass 26, count 0 2006.229.15:35:23.88#ibcon#about to read 5, iclass 26, count 0 2006.229.15:35:23.88#ibcon#read 5, iclass 26, count 0 2006.229.15:35:23.88#ibcon#about to read 6, iclass 26, count 0 2006.229.15:35:23.88#ibcon#read 6, iclass 26, count 0 2006.229.15:35:23.88#ibcon#end of sib2, iclass 26, count 0 2006.229.15:35:23.88#ibcon#*after write, iclass 26, count 0 2006.229.15:35:23.88#ibcon#*before return 0, iclass 26, count 0 2006.229.15:35:23.88#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:23.88#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:23.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:35:23.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:35:23.88$vck44/valo=3,564.99 2006.229.15:35:23.88#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:35:23.88#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:35:23.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:23.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:23.88#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:23.88#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:23.88#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:35:23.88#ibcon#first serial, iclass 28, count 0 2006.229.15:35:23.88#ibcon#enter sib2, iclass 28, count 0 2006.229.15:35:23.88#ibcon#flushed, iclass 28, count 0 2006.229.15:35:23.88#ibcon#about to write, iclass 28, count 0 2006.229.15:35:23.88#ibcon#wrote, iclass 28, count 0 2006.229.15:35:23.88#ibcon#about to read 3, iclass 28, count 0 2006.229.15:35:23.90#ibcon#read 3, iclass 28, count 0 2006.229.15:35:23.90#ibcon#about to read 4, iclass 28, count 0 2006.229.15:35:23.90#ibcon#read 4, iclass 28, count 0 2006.229.15:35:23.90#ibcon#about to read 5, iclass 28, count 0 2006.229.15:35:23.90#ibcon#read 5, iclass 28, count 0 2006.229.15:35:23.90#ibcon#about to read 6, iclass 28, count 0 2006.229.15:35:23.90#ibcon#read 6, iclass 28, count 0 2006.229.15:35:23.90#ibcon#end of sib2, iclass 28, count 0 2006.229.15:35:23.90#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:35:23.90#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:35:23.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:35:23.90#ibcon#*before write, iclass 28, count 0 2006.229.15:35:23.90#ibcon#enter sib2, iclass 28, count 0 2006.229.15:35:23.90#ibcon#flushed, iclass 28, count 0 2006.229.15:35:23.90#ibcon#about to write, iclass 28, count 0 2006.229.15:35:23.90#ibcon#wrote, iclass 28, count 0 2006.229.15:35:23.90#ibcon#about to read 3, iclass 28, count 0 2006.229.15:35:23.94#ibcon#read 3, iclass 28, count 0 2006.229.15:35:23.94#ibcon#about to read 4, iclass 28, count 0 2006.229.15:35:23.94#ibcon#read 4, iclass 28, count 0 2006.229.15:35:23.94#ibcon#about to read 5, iclass 28, count 0 2006.229.15:35:23.94#ibcon#read 5, iclass 28, count 0 2006.229.15:35:23.94#ibcon#about to read 6, iclass 28, count 0 2006.229.15:35:23.94#ibcon#read 6, iclass 28, count 0 2006.229.15:35:23.94#ibcon#end of sib2, iclass 28, count 0 2006.229.15:35:23.94#ibcon#*after write, iclass 28, count 0 2006.229.15:35:23.94#ibcon#*before return 0, iclass 28, count 0 2006.229.15:35:23.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:23.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:23.94#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:35:23.94#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:35:23.94$vck44/va=3,6 2006.229.15:35:23.94#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:35:23.94#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:35:23.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:23.94#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:24.00#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:24.00#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:24.00#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:35:24.00#ibcon#first serial, iclass 30, count 2 2006.229.15:35:24.00#ibcon#enter sib2, iclass 30, count 2 2006.229.15:35:24.00#ibcon#flushed, iclass 30, count 2 2006.229.15:35:24.00#ibcon#about to write, iclass 30, count 2 2006.229.15:35:24.00#ibcon#wrote, iclass 30, count 2 2006.229.15:35:24.00#ibcon#about to read 3, iclass 30, count 2 2006.229.15:35:24.02#ibcon#read 3, iclass 30, count 2 2006.229.15:35:24.02#ibcon#about to read 4, iclass 30, count 2 2006.229.15:35:24.02#ibcon#read 4, iclass 30, count 2 2006.229.15:35:24.02#ibcon#about to read 5, iclass 30, count 2 2006.229.15:35:24.02#ibcon#read 5, iclass 30, count 2 2006.229.15:35:24.02#ibcon#about to read 6, iclass 30, count 2 2006.229.15:35:24.02#ibcon#read 6, iclass 30, count 2 2006.229.15:35:24.02#ibcon#end of sib2, iclass 30, count 2 2006.229.15:35:24.02#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:35:24.02#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:35:24.02#ibcon#[25=AT03-06\r\n] 2006.229.15:35:24.02#ibcon#*before write, iclass 30, count 2 2006.229.15:35:24.02#ibcon#enter sib2, iclass 30, count 2 2006.229.15:35:24.02#ibcon#flushed, iclass 30, count 2 2006.229.15:35:24.02#ibcon#about to write, iclass 30, count 2 2006.229.15:35:24.02#ibcon#wrote, iclass 30, count 2 2006.229.15:35:24.02#ibcon#about to read 3, iclass 30, count 2 2006.229.15:35:24.05#ibcon#read 3, iclass 30, count 2 2006.229.15:35:24.05#ibcon#about to read 4, iclass 30, count 2 2006.229.15:35:24.05#ibcon#read 4, iclass 30, count 2 2006.229.15:35:24.05#ibcon#about to read 5, iclass 30, count 2 2006.229.15:35:24.05#ibcon#read 5, iclass 30, count 2 2006.229.15:35:24.05#ibcon#about to read 6, iclass 30, count 2 2006.229.15:35:24.05#ibcon#read 6, iclass 30, count 2 2006.229.15:35:24.05#ibcon#end of sib2, iclass 30, count 2 2006.229.15:35:24.05#ibcon#*after write, iclass 30, count 2 2006.229.15:35:24.05#ibcon#*before return 0, iclass 30, count 2 2006.229.15:35:24.05#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:24.05#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:24.05#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:35:24.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:24.05#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:24.17#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:24.17#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:24.17#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:35:24.17#ibcon#first serial, iclass 30, count 0 2006.229.15:35:24.17#ibcon#enter sib2, iclass 30, count 0 2006.229.15:35:24.17#ibcon#flushed, iclass 30, count 0 2006.229.15:35:24.17#ibcon#about to write, iclass 30, count 0 2006.229.15:35:24.17#ibcon#wrote, iclass 30, count 0 2006.229.15:35:24.17#ibcon#about to read 3, iclass 30, count 0 2006.229.15:35:24.19#ibcon#read 3, iclass 30, count 0 2006.229.15:35:24.19#ibcon#about to read 4, iclass 30, count 0 2006.229.15:35:24.19#ibcon#read 4, iclass 30, count 0 2006.229.15:35:24.19#ibcon#about to read 5, iclass 30, count 0 2006.229.15:35:24.19#ibcon#read 5, iclass 30, count 0 2006.229.15:35:24.19#ibcon#about to read 6, iclass 30, count 0 2006.229.15:35:24.19#ibcon#read 6, iclass 30, count 0 2006.229.15:35:24.19#ibcon#end of sib2, iclass 30, count 0 2006.229.15:35:24.19#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:35:24.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:35:24.19#ibcon#[25=USB\r\n] 2006.229.15:35:24.19#ibcon#*before write, iclass 30, count 0 2006.229.15:35:24.19#ibcon#enter sib2, iclass 30, count 0 2006.229.15:35:24.19#ibcon#flushed, iclass 30, count 0 2006.229.15:35:24.19#ibcon#about to write, iclass 30, count 0 2006.229.15:35:24.19#ibcon#wrote, iclass 30, count 0 2006.229.15:35:24.19#ibcon#about to read 3, iclass 30, count 0 2006.229.15:35:24.22#ibcon#read 3, iclass 30, count 0 2006.229.15:35:24.22#ibcon#about to read 4, iclass 30, count 0 2006.229.15:35:24.22#ibcon#read 4, iclass 30, count 0 2006.229.15:35:24.22#ibcon#about to read 5, iclass 30, count 0 2006.229.15:35:24.22#ibcon#read 5, iclass 30, count 0 2006.229.15:35:24.22#ibcon#about to read 6, iclass 30, count 0 2006.229.15:35:24.22#ibcon#read 6, iclass 30, count 0 2006.229.15:35:24.22#ibcon#end of sib2, iclass 30, count 0 2006.229.15:35:24.22#ibcon#*after write, iclass 30, count 0 2006.229.15:35:24.22#ibcon#*before return 0, iclass 30, count 0 2006.229.15:35:24.22#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:24.22#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:24.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:35:24.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:35:24.22$vck44/valo=4,624.99 2006.229.15:35:24.22#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:35:24.22#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:35:24.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:24.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:24.22#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:24.22#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:24.22#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:35:24.22#ibcon#first serial, iclass 32, count 0 2006.229.15:35:24.22#ibcon#enter sib2, iclass 32, count 0 2006.229.15:35:24.22#ibcon#flushed, iclass 32, count 0 2006.229.15:35:24.22#ibcon#about to write, iclass 32, count 0 2006.229.15:35:24.22#ibcon#wrote, iclass 32, count 0 2006.229.15:35:24.22#ibcon#about to read 3, iclass 32, count 0 2006.229.15:35:24.24#ibcon#read 3, iclass 32, count 0 2006.229.15:35:24.24#ibcon#about to read 4, iclass 32, count 0 2006.229.15:35:24.24#ibcon#read 4, iclass 32, count 0 2006.229.15:35:24.24#ibcon#about to read 5, iclass 32, count 0 2006.229.15:35:24.24#ibcon#read 5, iclass 32, count 0 2006.229.15:35:24.24#ibcon#about to read 6, iclass 32, count 0 2006.229.15:35:24.24#ibcon#read 6, iclass 32, count 0 2006.229.15:35:24.24#ibcon#end of sib2, iclass 32, count 0 2006.229.15:35:24.24#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:35:24.24#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:35:24.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:35:24.24#ibcon#*before write, iclass 32, count 0 2006.229.15:35:24.24#ibcon#enter sib2, iclass 32, count 0 2006.229.15:35:24.24#ibcon#flushed, iclass 32, count 0 2006.229.15:35:24.24#ibcon#about to write, iclass 32, count 0 2006.229.15:35:24.24#ibcon#wrote, iclass 32, count 0 2006.229.15:35:24.24#ibcon#about to read 3, iclass 32, count 0 2006.229.15:35:24.28#ibcon#read 3, iclass 32, count 0 2006.229.15:35:24.28#ibcon#about to read 4, iclass 32, count 0 2006.229.15:35:24.28#ibcon#read 4, iclass 32, count 0 2006.229.15:35:24.28#ibcon#about to read 5, iclass 32, count 0 2006.229.15:35:24.28#ibcon#read 5, iclass 32, count 0 2006.229.15:35:24.28#ibcon#about to read 6, iclass 32, count 0 2006.229.15:35:24.28#ibcon#read 6, iclass 32, count 0 2006.229.15:35:24.28#ibcon#end of sib2, iclass 32, count 0 2006.229.15:35:24.28#ibcon#*after write, iclass 32, count 0 2006.229.15:35:24.28#ibcon#*before return 0, iclass 32, count 0 2006.229.15:35:24.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:24.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:24.28#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:35:24.28#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:35:24.28$vck44/va=4,7 2006.229.15:35:24.28#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.15:35:24.28#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.15:35:24.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:24.28#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:24.34#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:24.34#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:24.34#ibcon#enter wrdev, iclass 34, count 2 2006.229.15:35:24.34#ibcon#first serial, iclass 34, count 2 2006.229.15:35:24.34#ibcon#enter sib2, iclass 34, count 2 2006.229.15:35:24.34#ibcon#flushed, iclass 34, count 2 2006.229.15:35:24.34#ibcon#about to write, iclass 34, count 2 2006.229.15:35:24.34#ibcon#wrote, iclass 34, count 2 2006.229.15:35:24.34#ibcon#about to read 3, iclass 34, count 2 2006.229.15:35:24.36#ibcon#read 3, iclass 34, count 2 2006.229.15:35:24.36#ibcon#about to read 4, iclass 34, count 2 2006.229.15:35:24.36#ibcon#read 4, iclass 34, count 2 2006.229.15:35:24.36#ibcon#about to read 5, iclass 34, count 2 2006.229.15:35:24.36#ibcon#read 5, iclass 34, count 2 2006.229.15:35:24.36#ibcon#about to read 6, iclass 34, count 2 2006.229.15:35:24.36#ibcon#read 6, iclass 34, count 2 2006.229.15:35:24.36#ibcon#end of sib2, iclass 34, count 2 2006.229.15:35:24.36#ibcon#*mode == 0, iclass 34, count 2 2006.229.15:35:24.36#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.15:35:24.36#ibcon#[25=AT04-07\r\n] 2006.229.15:35:24.36#ibcon#*before write, iclass 34, count 2 2006.229.15:35:24.36#ibcon#enter sib2, iclass 34, count 2 2006.229.15:35:24.36#ibcon#flushed, iclass 34, count 2 2006.229.15:35:24.36#ibcon#about to write, iclass 34, count 2 2006.229.15:35:24.36#ibcon#wrote, iclass 34, count 2 2006.229.15:35:24.36#ibcon#about to read 3, iclass 34, count 2 2006.229.15:35:24.39#ibcon#read 3, iclass 34, count 2 2006.229.15:35:24.39#ibcon#about to read 4, iclass 34, count 2 2006.229.15:35:24.39#ibcon#read 4, iclass 34, count 2 2006.229.15:35:24.39#ibcon#about to read 5, iclass 34, count 2 2006.229.15:35:24.39#ibcon#read 5, iclass 34, count 2 2006.229.15:35:24.39#ibcon#about to read 6, iclass 34, count 2 2006.229.15:35:24.39#ibcon#read 6, iclass 34, count 2 2006.229.15:35:24.39#ibcon#end of sib2, iclass 34, count 2 2006.229.15:35:24.39#ibcon#*after write, iclass 34, count 2 2006.229.15:35:24.39#ibcon#*before return 0, iclass 34, count 2 2006.229.15:35:24.39#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:24.39#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:24.39#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.15:35:24.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:24.39#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:24.51#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:24.51#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:24.51#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:35:24.51#ibcon#first serial, iclass 34, count 0 2006.229.15:35:24.51#ibcon#enter sib2, iclass 34, count 0 2006.229.15:35:24.51#ibcon#flushed, iclass 34, count 0 2006.229.15:35:24.51#ibcon#about to write, iclass 34, count 0 2006.229.15:35:24.51#ibcon#wrote, iclass 34, count 0 2006.229.15:35:24.51#ibcon#about to read 3, iclass 34, count 0 2006.229.15:35:24.53#ibcon#read 3, iclass 34, count 0 2006.229.15:35:24.53#ibcon#about to read 4, iclass 34, count 0 2006.229.15:35:24.53#ibcon#read 4, iclass 34, count 0 2006.229.15:35:24.53#ibcon#about to read 5, iclass 34, count 0 2006.229.15:35:24.53#ibcon#read 5, iclass 34, count 0 2006.229.15:35:24.53#ibcon#about to read 6, iclass 34, count 0 2006.229.15:35:24.53#ibcon#read 6, iclass 34, count 0 2006.229.15:35:24.53#ibcon#end of sib2, iclass 34, count 0 2006.229.15:35:24.53#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:35:24.53#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:35:24.53#ibcon#[25=USB\r\n] 2006.229.15:35:24.53#ibcon#*before write, iclass 34, count 0 2006.229.15:35:24.53#ibcon#enter sib2, iclass 34, count 0 2006.229.15:35:24.53#ibcon#flushed, iclass 34, count 0 2006.229.15:35:24.53#ibcon#about to write, iclass 34, count 0 2006.229.15:35:24.53#ibcon#wrote, iclass 34, count 0 2006.229.15:35:24.53#ibcon#about to read 3, iclass 34, count 0 2006.229.15:35:24.56#ibcon#read 3, iclass 34, count 0 2006.229.15:35:24.56#ibcon#about to read 4, iclass 34, count 0 2006.229.15:35:24.56#ibcon#read 4, iclass 34, count 0 2006.229.15:35:24.56#ibcon#about to read 5, iclass 34, count 0 2006.229.15:35:24.56#ibcon#read 5, iclass 34, count 0 2006.229.15:35:24.56#ibcon#about to read 6, iclass 34, count 0 2006.229.15:35:24.56#ibcon#read 6, iclass 34, count 0 2006.229.15:35:24.56#ibcon#end of sib2, iclass 34, count 0 2006.229.15:35:24.56#ibcon#*after write, iclass 34, count 0 2006.229.15:35:24.56#ibcon#*before return 0, iclass 34, count 0 2006.229.15:35:24.56#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:24.56#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:24.56#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:35:24.56#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:35:24.56$vck44/valo=5,734.99 2006.229.15:35:24.56#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.15:35:24.56#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.15:35:24.56#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:24.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:24.56#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:24.56#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:24.56#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:35:24.56#ibcon#first serial, iclass 36, count 0 2006.229.15:35:24.56#ibcon#enter sib2, iclass 36, count 0 2006.229.15:35:24.56#ibcon#flushed, iclass 36, count 0 2006.229.15:35:24.56#ibcon#about to write, iclass 36, count 0 2006.229.15:35:24.56#ibcon#wrote, iclass 36, count 0 2006.229.15:35:24.56#ibcon#about to read 3, iclass 36, count 0 2006.229.15:35:24.58#ibcon#read 3, iclass 36, count 0 2006.229.15:35:24.58#ibcon#about to read 4, iclass 36, count 0 2006.229.15:35:24.58#ibcon#read 4, iclass 36, count 0 2006.229.15:35:24.58#ibcon#about to read 5, iclass 36, count 0 2006.229.15:35:24.58#ibcon#read 5, iclass 36, count 0 2006.229.15:35:24.58#ibcon#about to read 6, iclass 36, count 0 2006.229.15:35:24.58#ibcon#read 6, iclass 36, count 0 2006.229.15:35:24.58#ibcon#end of sib2, iclass 36, count 0 2006.229.15:35:24.58#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:35:24.58#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:35:24.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:35:24.58#ibcon#*before write, iclass 36, count 0 2006.229.15:35:24.58#ibcon#enter sib2, iclass 36, count 0 2006.229.15:35:24.58#ibcon#flushed, iclass 36, count 0 2006.229.15:35:24.58#ibcon#about to write, iclass 36, count 0 2006.229.15:35:24.58#ibcon#wrote, iclass 36, count 0 2006.229.15:35:24.58#ibcon#about to read 3, iclass 36, count 0 2006.229.15:35:24.62#ibcon#read 3, iclass 36, count 0 2006.229.15:35:24.62#ibcon#about to read 4, iclass 36, count 0 2006.229.15:35:24.62#ibcon#read 4, iclass 36, count 0 2006.229.15:35:24.62#ibcon#about to read 5, iclass 36, count 0 2006.229.15:35:24.62#ibcon#read 5, iclass 36, count 0 2006.229.15:35:24.62#ibcon#about to read 6, iclass 36, count 0 2006.229.15:35:24.62#ibcon#read 6, iclass 36, count 0 2006.229.15:35:24.62#ibcon#end of sib2, iclass 36, count 0 2006.229.15:35:24.62#ibcon#*after write, iclass 36, count 0 2006.229.15:35:24.62#ibcon#*before return 0, iclass 36, count 0 2006.229.15:35:24.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:24.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:24.62#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:35:24.62#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:35:24.62$vck44/va=5,4 2006.229.15:35:24.62#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.15:35:24.62#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.15:35:24.62#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:24.62#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:24.68#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:24.68#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:24.68#ibcon#enter wrdev, iclass 38, count 2 2006.229.15:35:24.68#ibcon#first serial, iclass 38, count 2 2006.229.15:35:24.68#ibcon#enter sib2, iclass 38, count 2 2006.229.15:35:24.68#ibcon#flushed, iclass 38, count 2 2006.229.15:35:24.68#ibcon#about to write, iclass 38, count 2 2006.229.15:35:24.68#ibcon#wrote, iclass 38, count 2 2006.229.15:35:24.68#ibcon#about to read 3, iclass 38, count 2 2006.229.15:35:24.70#ibcon#read 3, iclass 38, count 2 2006.229.15:35:24.70#ibcon#about to read 4, iclass 38, count 2 2006.229.15:35:24.70#ibcon#read 4, iclass 38, count 2 2006.229.15:35:24.70#ibcon#about to read 5, iclass 38, count 2 2006.229.15:35:24.70#ibcon#read 5, iclass 38, count 2 2006.229.15:35:24.70#ibcon#about to read 6, iclass 38, count 2 2006.229.15:35:24.70#ibcon#read 6, iclass 38, count 2 2006.229.15:35:24.70#ibcon#end of sib2, iclass 38, count 2 2006.229.15:35:24.70#ibcon#*mode == 0, iclass 38, count 2 2006.229.15:35:24.70#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.15:35:24.70#ibcon#[25=AT05-04\r\n] 2006.229.15:35:24.70#ibcon#*before write, iclass 38, count 2 2006.229.15:35:24.70#ibcon#enter sib2, iclass 38, count 2 2006.229.15:35:24.70#ibcon#flushed, iclass 38, count 2 2006.229.15:35:24.70#ibcon#about to write, iclass 38, count 2 2006.229.15:35:24.70#ibcon#wrote, iclass 38, count 2 2006.229.15:35:24.70#ibcon#about to read 3, iclass 38, count 2 2006.229.15:35:24.73#ibcon#read 3, iclass 38, count 2 2006.229.15:35:24.73#ibcon#about to read 4, iclass 38, count 2 2006.229.15:35:24.73#ibcon#read 4, iclass 38, count 2 2006.229.15:35:24.73#ibcon#about to read 5, iclass 38, count 2 2006.229.15:35:24.73#ibcon#read 5, iclass 38, count 2 2006.229.15:35:24.73#ibcon#about to read 6, iclass 38, count 2 2006.229.15:35:24.73#ibcon#read 6, iclass 38, count 2 2006.229.15:35:24.73#ibcon#end of sib2, iclass 38, count 2 2006.229.15:35:24.73#ibcon#*after write, iclass 38, count 2 2006.229.15:35:24.73#ibcon#*before return 0, iclass 38, count 2 2006.229.15:35:24.73#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:24.73#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:24.73#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.15:35:24.73#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:24.73#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:24.85#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:24.85#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:24.85#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:35:24.85#ibcon#first serial, iclass 38, count 0 2006.229.15:35:24.85#ibcon#enter sib2, iclass 38, count 0 2006.229.15:35:24.85#ibcon#flushed, iclass 38, count 0 2006.229.15:35:24.85#ibcon#about to write, iclass 38, count 0 2006.229.15:35:24.85#ibcon#wrote, iclass 38, count 0 2006.229.15:35:24.85#ibcon#about to read 3, iclass 38, count 0 2006.229.15:35:24.87#ibcon#read 3, iclass 38, count 0 2006.229.15:35:24.87#ibcon#about to read 4, iclass 38, count 0 2006.229.15:35:24.87#ibcon#read 4, iclass 38, count 0 2006.229.15:35:24.87#ibcon#about to read 5, iclass 38, count 0 2006.229.15:35:24.87#ibcon#read 5, iclass 38, count 0 2006.229.15:35:24.87#ibcon#about to read 6, iclass 38, count 0 2006.229.15:35:24.87#ibcon#read 6, iclass 38, count 0 2006.229.15:35:24.87#ibcon#end of sib2, iclass 38, count 0 2006.229.15:35:24.87#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:35:24.87#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:35:24.87#ibcon#[25=USB\r\n] 2006.229.15:35:24.87#ibcon#*before write, iclass 38, count 0 2006.229.15:35:24.87#ibcon#enter sib2, iclass 38, count 0 2006.229.15:35:24.87#ibcon#flushed, iclass 38, count 0 2006.229.15:35:24.87#ibcon#about to write, iclass 38, count 0 2006.229.15:35:24.87#ibcon#wrote, iclass 38, count 0 2006.229.15:35:24.87#ibcon#about to read 3, iclass 38, count 0 2006.229.15:35:24.90#ibcon#read 3, iclass 38, count 0 2006.229.15:35:24.90#ibcon#about to read 4, iclass 38, count 0 2006.229.15:35:24.90#ibcon#read 4, iclass 38, count 0 2006.229.15:35:24.90#ibcon#about to read 5, iclass 38, count 0 2006.229.15:35:24.90#ibcon#read 5, iclass 38, count 0 2006.229.15:35:24.90#ibcon#about to read 6, iclass 38, count 0 2006.229.15:35:24.90#ibcon#read 6, iclass 38, count 0 2006.229.15:35:24.90#ibcon#end of sib2, iclass 38, count 0 2006.229.15:35:24.90#ibcon#*after write, iclass 38, count 0 2006.229.15:35:24.90#ibcon#*before return 0, iclass 38, count 0 2006.229.15:35:24.90#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:24.90#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:24.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:35:24.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:35:24.90$vck44/valo=6,814.99 2006.229.15:35:24.90#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:35:24.90#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:35:24.90#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:24.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:24.90#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:24.90#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:24.90#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:35:24.90#ibcon#first serial, iclass 40, count 0 2006.229.15:35:24.90#ibcon#enter sib2, iclass 40, count 0 2006.229.15:35:24.90#ibcon#flushed, iclass 40, count 0 2006.229.15:35:24.90#ibcon#about to write, iclass 40, count 0 2006.229.15:35:24.90#ibcon#wrote, iclass 40, count 0 2006.229.15:35:24.90#ibcon#about to read 3, iclass 40, count 0 2006.229.15:35:24.92#ibcon#read 3, iclass 40, count 0 2006.229.15:35:24.92#ibcon#about to read 4, iclass 40, count 0 2006.229.15:35:24.92#ibcon#read 4, iclass 40, count 0 2006.229.15:35:24.92#ibcon#about to read 5, iclass 40, count 0 2006.229.15:35:24.92#ibcon#read 5, iclass 40, count 0 2006.229.15:35:24.92#ibcon#about to read 6, iclass 40, count 0 2006.229.15:35:24.92#ibcon#read 6, iclass 40, count 0 2006.229.15:35:24.92#ibcon#end of sib2, iclass 40, count 0 2006.229.15:35:24.92#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:35:24.92#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:35:24.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:35:24.92#ibcon#*before write, iclass 40, count 0 2006.229.15:35:24.92#ibcon#enter sib2, iclass 40, count 0 2006.229.15:35:24.92#ibcon#flushed, iclass 40, count 0 2006.229.15:35:24.92#ibcon#about to write, iclass 40, count 0 2006.229.15:35:24.92#ibcon#wrote, iclass 40, count 0 2006.229.15:35:24.92#ibcon#about to read 3, iclass 40, count 0 2006.229.15:35:24.96#ibcon#read 3, iclass 40, count 0 2006.229.15:35:24.96#ibcon#about to read 4, iclass 40, count 0 2006.229.15:35:24.96#ibcon#read 4, iclass 40, count 0 2006.229.15:35:24.96#ibcon#about to read 5, iclass 40, count 0 2006.229.15:35:24.96#ibcon#read 5, iclass 40, count 0 2006.229.15:35:24.96#ibcon#about to read 6, iclass 40, count 0 2006.229.15:35:24.96#ibcon#read 6, iclass 40, count 0 2006.229.15:35:24.96#ibcon#end of sib2, iclass 40, count 0 2006.229.15:35:24.96#ibcon#*after write, iclass 40, count 0 2006.229.15:35:24.96#ibcon#*before return 0, iclass 40, count 0 2006.229.15:35:24.96#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:24.96#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:24.96#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:35:24.96#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:35:24.96$vck44/va=6,4 2006.229.15:35:24.96#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:35:24.96#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:35:24.96#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:24.96#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:25.02#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:25.02#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:25.02#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:35:25.02#ibcon#first serial, iclass 4, count 2 2006.229.15:35:25.02#ibcon#enter sib2, iclass 4, count 2 2006.229.15:35:25.02#ibcon#flushed, iclass 4, count 2 2006.229.15:35:25.02#ibcon#about to write, iclass 4, count 2 2006.229.15:35:25.02#ibcon#wrote, iclass 4, count 2 2006.229.15:35:25.02#ibcon#about to read 3, iclass 4, count 2 2006.229.15:35:25.04#ibcon#read 3, iclass 4, count 2 2006.229.15:35:25.04#ibcon#about to read 4, iclass 4, count 2 2006.229.15:35:25.04#ibcon#read 4, iclass 4, count 2 2006.229.15:35:25.04#ibcon#about to read 5, iclass 4, count 2 2006.229.15:35:25.04#ibcon#read 5, iclass 4, count 2 2006.229.15:35:25.04#ibcon#about to read 6, iclass 4, count 2 2006.229.15:35:25.04#ibcon#read 6, iclass 4, count 2 2006.229.15:35:25.04#ibcon#end of sib2, iclass 4, count 2 2006.229.15:35:25.04#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:35:25.04#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:35:25.04#ibcon#[25=AT06-04\r\n] 2006.229.15:35:25.04#ibcon#*before write, iclass 4, count 2 2006.229.15:35:25.04#ibcon#enter sib2, iclass 4, count 2 2006.229.15:35:25.04#ibcon#flushed, iclass 4, count 2 2006.229.15:35:25.04#ibcon#about to write, iclass 4, count 2 2006.229.15:35:25.04#ibcon#wrote, iclass 4, count 2 2006.229.15:35:25.04#ibcon#about to read 3, iclass 4, count 2 2006.229.15:35:25.07#ibcon#read 3, iclass 4, count 2 2006.229.15:35:25.07#ibcon#about to read 4, iclass 4, count 2 2006.229.15:35:25.07#ibcon#read 4, iclass 4, count 2 2006.229.15:35:25.07#ibcon#about to read 5, iclass 4, count 2 2006.229.15:35:25.07#ibcon#read 5, iclass 4, count 2 2006.229.15:35:25.07#ibcon#about to read 6, iclass 4, count 2 2006.229.15:35:25.07#ibcon#read 6, iclass 4, count 2 2006.229.15:35:25.07#ibcon#end of sib2, iclass 4, count 2 2006.229.15:35:25.07#ibcon#*after write, iclass 4, count 2 2006.229.15:35:25.07#ibcon#*before return 0, iclass 4, count 2 2006.229.15:35:25.07#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:25.07#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:25.07#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:35:25.07#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:25.07#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:25.19#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:25.19#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:25.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:35:25.19#ibcon#first serial, iclass 4, count 0 2006.229.15:35:25.19#ibcon#enter sib2, iclass 4, count 0 2006.229.15:35:25.19#ibcon#flushed, iclass 4, count 0 2006.229.15:35:25.19#ibcon#about to write, iclass 4, count 0 2006.229.15:35:25.19#ibcon#wrote, iclass 4, count 0 2006.229.15:35:25.19#ibcon#about to read 3, iclass 4, count 0 2006.229.15:35:25.21#ibcon#read 3, iclass 4, count 0 2006.229.15:35:25.21#ibcon#about to read 4, iclass 4, count 0 2006.229.15:35:25.21#ibcon#read 4, iclass 4, count 0 2006.229.15:35:25.21#ibcon#about to read 5, iclass 4, count 0 2006.229.15:35:25.21#ibcon#read 5, iclass 4, count 0 2006.229.15:35:25.21#ibcon#about to read 6, iclass 4, count 0 2006.229.15:35:25.21#ibcon#read 6, iclass 4, count 0 2006.229.15:35:25.21#ibcon#end of sib2, iclass 4, count 0 2006.229.15:35:25.21#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:35:25.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:35:25.21#ibcon#[25=USB\r\n] 2006.229.15:35:25.21#ibcon#*before write, iclass 4, count 0 2006.229.15:35:25.21#ibcon#enter sib2, iclass 4, count 0 2006.229.15:35:25.21#ibcon#flushed, iclass 4, count 0 2006.229.15:35:25.21#ibcon#about to write, iclass 4, count 0 2006.229.15:35:25.21#ibcon#wrote, iclass 4, count 0 2006.229.15:35:25.21#ibcon#about to read 3, iclass 4, count 0 2006.229.15:35:25.24#ibcon#read 3, iclass 4, count 0 2006.229.15:35:25.24#ibcon#about to read 4, iclass 4, count 0 2006.229.15:35:25.24#ibcon#read 4, iclass 4, count 0 2006.229.15:35:25.24#ibcon#about to read 5, iclass 4, count 0 2006.229.15:35:25.24#ibcon#read 5, iclass 4, count 0 2006.229.15:35:25.24#ibcon#about to read 6, iclass 4, count 0 2006.229.15:35:25.24#ibcon#read 6, iclass 4, count 0 2006.229.15:35:25.24#ibcon#end of sib2, iclass 4, count 0 2006.229.15:35:25.24#ibcon#*after write, iclass 4, count 0 2006.229.15:35:25.24#ibcon#*before return 0, iclass 4, count 0 2006.229.15:35:25.24#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:25.24#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:25.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:35:25.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:35:25.24$vck44/valo=7,864.99 2006.229.15:35:25.24#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:35:25.24#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:35:25.24#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:25.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:25.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:25.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:25.24#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:35:25.24#ibcon#first serial, iclass 6, count 0 2006.229.15:35:25.24#ibcon#enter sib2, iclass 6, count 0 2006.229.15:35:25.24#ibcon#flushed, iclass 6, count 0 2006.229.15:35:25.24#ibcon#about to write, iclass 6, count 0 2006.229.15:35:25.24#ibcon#wrote, iclass 6, count 0 2006.229.15:35:25.24#ibcon#about to read 3, iclass 6, count 0 2006.229.15:35:25.26#ibcon#read 3, iclass 6, count 0 2006.229.15:35:25.26#ibcon#about to read 4, iclass 6, count 0 2006.229.15:35:25.26#ibcon#read 4, iclass 6, count 0 2006.229.15:35:25.26#ibcon#about to read 5, iclass 6, count 0 2006.229.15:35:25.26#ibcon#read 5, iclass 6, count 0 2006.229.15:35:25.26#ibcon#about to read 6, iclass 6, count 0 2006.229.15:35:25.26#ibcon#read 6, iclass 6, count 0 2006.229.15:35:25.26#ibcon#end of sib2, iclass 6, count 0 2006.229.15:35:25.26#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:35:25.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:35:25.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:35:25.26#ibcon#*before write, iclass 6, count 0 2006.229.15:35:25.26#ibcon#enter sib2, iclass 6, count 0 2006.229.15:35:25.26#ibcon#flushed, iclass 6, count 0 2006.229.15:35:25.26#ibcon#about to write, iclass 6, count 0 2006.229.15:35:25.26#ibcon#wrote, iclass 6, count 0 2006.229.15:35:25.26#ibcon#about to read 3, iclass 6, count 0 2006.229.15:35:25.30#ibcon#read 3, iclass 6, count 0 2006.229.15:35:25.30#ibcon#about to read 4, iclass 6, count 0 2006.229.15:35:25.30#ibcon#read 4, iclass 6, count 0 2006.229.15:35:25.30#ibcon#about to read 5, iclass 6, count 0 2006.229.15:35:25.30#ibcon#read 5, iclass 6, count 0 2006.229.15:35:25.30#ibcon#about to read 6, iclass 6, count 0 2006.229.15:35:25.30#ibcon#read 6, iclass 6, count 0 2006.229.15:35:25.30#ibcon#end of sib2, iclass 6, count 0 2006.229.15:35:25.30#ibcon#*after write, iclass 6, count 0 2006.229.15:35:25.30#ibcon#*before return 0, iclass 6, count 0 2006.229.15:35:25.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:25.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:25.30#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:35:25.30#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:35:25.30$vck44/va=7,5 2006.229.15:35:25.30#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:35:25.30#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:35:25.30#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:25.30#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:25.36#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:25.36#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:25.36#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:35:25.36#ibcon#first serial, iclass 10, count 2 2006.229.15:35:25.36#ibcon#enter sib2, iclass 10, count 2 2006.229.15:35:25.36#ibcon#flushed, iclass 10, count 2 2006.229.15:35:25.36#ibcon#about to write, iclass 10, count 2 2006.229.15:35:25.36#ibcon#wrote, iclass 10, count 2 2006.229.15:35:25.36#ibcon#about to read 3, iclass 10, count 2 2006.229.15:35:25.38#ibcon#read 3, iclass 10, count 2 2006.229.15:35:25.38#ibcon#about to read 4, iclass 10, count 2 2006.229.15:35:25.38#ibcon#read 4, iclass 10, count 2 2006.229.15:35:25.38#ibcon#about to read 5, iclass 10, count 2 2006.229.15:35:25.38#ibcon#read 5, iclass 10, count 2 2006.229.15:35:25.38#ibcon#about to read 6, iclass 10, count 2 2006.229.15:35:25.38#ibcon#read 6, iclass 10, count 2 2006.229.15:35:25.38#ibcon#end of sib2, iclass 10, count 2 2006.229.15:35:25.38#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:35:25.38#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:35:25.38#ibcon#[25=AT07-05\r\n] 2006.229.15:35:25.38#ibcon#*before write, iclass 10, count 2 2006.229.15:35:25.38#ibcon#enter sib2, iclass 10, count 2 2006.229.15:35:25.38#ibcon#flushed, iclass 10, count 2 2006.229.15:35:25.38#ibcon#about to write, iclass 10, count 2 2006.229.15:35:25.38#ibcon#wrote, iclass 10, count 2 2006.229.15:35:25.38#ibcon#about to read 3, iclass 10, count 2 2006.229.15:35:25.41#ibcon#read 3, iclass 10, count 2 2006.229.15:35:25.41#ibcon#about to read 4, iclass 10, count 2 2006.229.15:35:25.41#ibcon#read 4, iclass 10, count 2 2006.229.15:35:25.41#ibcon#about to read 5, iclass 10, count 2 2006.229.15:35:25.41#ibcon#read 5, iclass 10, count 2 2006.229.15:35:25.41#ibcon#about to read 6, iclass 10, count 2 2006.229.15:35:25.41#ibcon#read 6, iclass 10, count 2 2006.229.15:35:25.41#ibcon#end of sib2, iclass 10, count 2 2006.229.15:35:25.41#ibcon#*after write, iclass 10, count 2 2006.229.15:35:25.41#ibcon#*before return 0, iclass 10, count 2 2006.229.15:35:25.41#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:25.41#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:25.41#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:35:25.41#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:25.41#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:25.53#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:25.53#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:25.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:35:25.53#ibcon#first serial, iclass 10, count 0 2006.229.15:35:25.53#ibcon#enter sib2, iclass 10, count 0 2006.229.15:35:25.53#ibcon#flushed, iclass 10, count 0 2006.229.15:35:25.53#ibcon#about to write, iclass 10, count 0 2006.229.15:35:25.53#ibcon#wrote, iclass 10, count 0 2006.229.15:35:25.53#ibcon#about to read 3, iclass 10, count 0 2006.229.15:35:25.55#ibcon#read 3, iclass 10, count 0 2006.229.15:35:25.55#ibcon#about to read 4, iclass 10, count 0 2006.229.15:35:25.55#ibcon#read 4, iclass 10, count 0 2006.229.15:35:25.55#ibcon#about to read 5, iclass 10, count 0 2006.229.15:35:25.55#ibcon#read 5, iclass 10, count 0 2006.229.15:35:25.55#ibcon#about to read 6, iclass 10, count 0 2006.229.15:35:25.55#ibcon#read 6, iclass 10, count 0 2006.229.15:35:25.55#ibcon#end of sib2, iclass 10, count 0 2006.229.15:35:25.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:35:25.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:35:25.55#ibcon#[25=USB\r\n] 2006.229.15:35:25.55#ibcon#*before write, iclass 10, count 0 2006.229.15:35:25.55#ibcon#enter sib2, iclass 10, count 0 2006.229.15:35:25.55#ibcon#flushed, iclass 10, count 0 2006.229.15:35:25.55#ibcon#about to write, iclass 10, count 0 2006.229.15:35:25.55#ibcon#wrote, iclass 10, count 0 2006.229.15:35:25.55#ibcon#about to read 3, iclass 10, count 0 2006.229.15:35:25.57#abcon#<5=/06 0.9 1.4 27.291001001.8\r\n> 2006.229.15:35:25.58#ibcon#read 3, iclass 10, count 0 2006.229.15:35:25.58#ibcon#about to read 4, iclass 10, count 0 2006.229.15:35:25.58#ibcon#read 4, iclass 10, count 0 2006.229.15:35:25.58#ibcon#about to read 5, iclass 10, count 0 2006.229.15:35:25.58#ibcon#read 5, iclass 10, count 0 2006.229.15:35:25.58#ibcon#about to read 6, iclass 10, count 0 2006.229.15:35:25.58#ibcon#read 6, iclass 10, count 0 2006.229.15:35:25.58#ibcon#end of sib2, iclass 10, count 0 2006.229.15:35:25.58#ibcon#*after write, iclass 10, count 0 2006.229.15:35:25.58#ibcon#*before return 0, iclass 10, count 0 2006.229.15:35:25.58#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:25.58#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:25.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:35:25.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:35:25.58$vck44/valo=8,884.99 2006.229.15:35:25.58#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:35:25.58#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:35:25.58#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:25.58#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:35:25.58#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:35:25.58#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:35:25.58#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:35:25.58#ibcon#first serial, iclass 15, count 0 2006.229.15:35:25.58#ibcon#enter sib2, iclass 15, count 0 2006.229.15:35:25.58#ibcon#flushed, iclass 15, count 0 2006.229.15:35:25.58#ibcon#about to write, iclass 15, count 0 2006.229.15:35:25.58#ibcon#wrote, iclass 15, count 0 2006.229.15:35:25.58#ibcon#about to read 3, iclass 15, count 0 2006.229.15:35:25.59#abcon#{5=INTERFACE CLEAR} 2006.229.15:35:25.60#ibcon#read 3, iclass 15, count 0 2006.229.15:35:25.60#ibcon#about to read 4, iclass 15, count 0 2006.229.15:35:25.60#ibcon#read 4, iclass 15, count 0 2006.229.15:35:25.60#ibcon#about to read 5, iclass 15, count 0 2006.229.15:35:25.60#ibcon#read 5, iclass 15, count 0 2006.229.15:35:25.60#ibcon#about to read 6, iclass 15, count 0 2006.229.15:35:25.60#ibcon#read 6, iclass 15, count 0 2006.229.15:35:25.60#ibcon#end of sib2, iclass 15, count 0 2006.229.15:35:25.60#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:35:25.60#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:35:25.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:35:25.60#ibcon#*before write, iclass 15, count 0 2006.229.15:35:25.60#ibcon#enter sib2, iclass 15, count 0 2006.229.15:35:25.60#ibcon#flushed, iclass 15, count 0 2006.229.15:35:25.60#ibcon#about to write, iclass 15, count 0 2006.229.15:35:25.60#ibcon#wrote, iclass 15, count 0 2006.229.15:35:25.60#ibcon#about to read 3, iclass 15, count 0 2006.229.15:35:25.64#ibcon#read 3, iclass 15, count 0 2006.229.15:35:25.64#ibcon#about to read 4, iclass 15, count 0 2006.229.15:35:25.64#ibcon#read 4, iclass 15, count 0 2006.229.15:35:25.64#ibcon#about to read 5, iclass 15, count 0 2006.229.15:35:25.64#ibcon#read 5, iclass 15, count 0 2006.229.15:35:25.64#ibcon#about to read 6, iclass 15, count 0 2006.229.15:35:25.64#ibcon#read 6, iclass 15, count 0 2006.229.15:35:25.64#ibcon#end of sib2, iclass 15, count 0 2006.229.15:35:25.64#ibcon#*after write, iclass 15, count 0 2006.229.15:35:25.64#ibcon#*before return 0, iclass 15, count 0 2006.229.15:35:25.64#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:35:25.64#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:35:25.64#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:35:25.64#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:35:25.64$vck44/va=8,6 2006.229.15:35:25.64#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:35:25.64#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:35:25.64#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:25.64#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:35:25.65#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:35:25.70#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:35:25.70#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:35:25.70#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:35:25.70#ibcon#first serial, iclass 18, count 2 2006.229.15:35:25.70#ibcon#enter sib2, iclass 18, count 2 2006.229.15:35:25.70#ibcon#flushed, iclass 18, count 2 2006.229.15:35:25.70#ibcon#about to write, iclass 18, count 2 2006.229.15:35:25.70#ibcon#wrote, iclass 18, count 2 2006.229.15:35:25.70#ibcon#about to read 3, iclass 18, count 2 2006.229.15:35:25.72#ibcon#read 3, iclass 18, count 2 2006.229.15:35:25.72#ibcon#about to read 4, iclass 18, count 2 2006.229.15:35:25.72#ibcon#read 4, iclass 18, count 2 2006.229.15:35:25.72#ibcon#about to read 5, iclass 18, count 2 2006.229.15:35:25.72#ibcon#read 5, iclass 18, count 2 2006.229.15:35:25.72#ibcon#about to read 6, iclass 18, count 2 2006.229.15:35:25.72#ibcon#read 6, iclass 18, count 2 2006.229.15:35:25.72#ibcon#end of sib2, iclass 18, count 2 2006.229.15:35:25.72#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:35:25.72#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:35:25.72#ibcon#[25=AT08-06\r\n] 2006.229.15:35:25.72#ibcon#*before write, iclass 18, count 2 2006.229.15:35:25.72#ibcon#enter sib2, iclass 18, count 2 2006.229.15:35:25.72#ibcon#flushed, iclass 18, count 2 2006.229.15:35:25.72#ibcon#about to write, iclass 18, count 2 2006.229.15:35:25.72#ibcon#wrote, iclass 18, count 2 2006.229.15:35:25.72#ibcon#about to read 3, iclass 18, count 2 2006.229.15:35:25.75#ibcon#read 3, iclass 18, count 2 2006.229.15:35:25.75#ibcon#about to read 4, iclass 18, count 2 2006.229.15:35:25.75#ibcon#read 4, iclass 18, count 2 2006.229.15:35:25.75#ibcon#about to read 5, iclass 18, count 2 2006.229.15:35:25.75#ibcon#read 5, iclass 18, count 2 2006.229.15:35:25.75#ibcon#about to read 6, iclass 18, count 2 2006.229.15:35:25.75#ibcon#read 6, iclass 18, count 2 2006.229.15:35:25.75#ibcon#end of sib2, iclass 18, count 2 2006.229.15:35:25.75#ibcon#*after write, iclass 18, count 2 2006.229.15:35:25.75#ibcon#*before return 0, iclass 18, count 2 2006.229.15:35:25.75#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:35:25.75#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:35:25.75#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:35:25.75#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:25.75#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:35:25.87#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:35:25.87#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:35:25.87#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:35:25.87#ibcon#first serial, iclass 18, count 0 2006.229.15:35:25.87#ibcon#enter sib2, iclass 18, count 0 2006.229.15:35:25.87#ibcon#flushed, iclass 18, count 0 2006.229.15:35:25.87#ibcon#about to write, iclass 18, count 0 2006.229.15:35:25.87#ibcon#wrote, iclass 18, count 0 2006.229.15:35:25.87#ibcon#about to read 3, iclass 18, count 0 2006.229.15:35:25.89#ibcon#read 3, iclass 18, count 0 2006.229.15:35:25.89#ibcon#about to read 4, iclass 18, count 0 2006.229.15:35:25.89#ibcon#read 4, iclass 18, count 0 2006.229.15:35:25.89#ibcon#about to read 5, iclass 18, count 0 2006.229.15:35:25.89#ibcon#read 5, iclass 18, count 0 2006.229.15:35:25.89#ibcon#about to read 6, iclass 18, count 0 2006.229.15:35:25.89#ibcon#read 6, iclass 18, count 0 2006.229.15:35:25.89#ibcon#end of sib2, iclass 18, count 0 2006.229.15:35:25.89#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:35:25.89#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:35:25.89#ibcon#[25=USB\r\n] 2006.229.15:35:25.89#ibcon#*before write, iclass 18, count 0 2006.229.15:35:25.89#ibcon#enter sib2, iclass 18, count 0 2006.229.15:35:25.89#ibcon#flushed, iclass 18, count 0 2006.229.15:35:25.89#ibcon#about to write, iclass 18, count 0 2006.229.15:35:25.89#ibcon#wrote, iclass 18, count 0 2006.229.15:35:25.89#ibcon#about to read 3, iclass 18, count 0 2006.229.15:35:25.92#ibcon#read 3, iclass 18, count 0 2006.229.15:35:25.92#ibcon#about to read 4, iclass 18, count 0 2006.229.15:35:25.92#ibcon#read 4, iclass 18, count 0 2006.229.15:35:25.92#ibcon#about to read 5, iclass 18, count 0 2006.229.15:35:25.92#ibcon#read 5, iclass 18, count 0 2006.229.15:35:25.92#ibcon#about to read 6, iclass 18, count 0 2006.229.15:35:25.92#ibcon#read 6, iclass 18, count 0 2006.229.15:35:25.92#ibcon#end of sib2, iclass 18, count 0 2006.229.15:35:25.92#ibcon#*after write, iclass 18, count 0 2006.229.15:35:25.92#ibcon#*before return 0, iclass 18, count 0 2006.229.15:35:25.92#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:35:25.92#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:35:25.92#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:35:25.92#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:35:25.92$vck44/vblo=1,629.99 2006.229.15:35:25.92#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:35:25.92#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:35:25.92#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:25.92#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:25.92#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:25.92#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:25.92#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:35:25.92#ibcon#first serial, iclass 20, count 0 2006.229.15:35:25.92#ibcon#enter sib2, iclass 20, count 0 2006.229.15:35:25.92#ibcon#flushed, iclass 20, count 0 2006.229.15:35:25.92#ibcon#about to write, iclass 20, count 0 2006.229.15:35:25.92#ibcon#wrote, iclass 20, count 0 2006.229.15:35:25.92#ibcon#about to read 3, iclass 20, count 0 2006.229.15:35:25.94#ibcon#read 3, iclass 20, count 0 2006.229.15:35:25.94#ibcon#about to read 4, iclass 20, count 0 2006.229.15:35:25.94#ibcon#read 4, iclass 20, count 0 2006.229.15:35:25.94#ibcon#about to read 5, iclass 20, count 0 2006.229.15:35:25.94#ibcon#read 5, iclass 20, count 0 2006.229.15:35:25.94#ibcon#about to read 6, iclass 20, count 0 2006.229.15:35:25.94#ibcon#read 6, iclass 20, count 0 2006.229.15:35:25.94#ibcon#end of sib2, iclass 20, count 0 2006.229.15:35:25.94#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:35:25.94#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:35:25.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:35:25.94#ibcon#*before write, iclass 20, count 0 2006.229.15:35:25.94#ibcon#enter sib2, iclass 20, count 0 2006.229.15:35:25.94#ibcon#flushed, iclass 20, count 0 2006.229.15:35:25.94#ibcon#about to write, iclass 20, count 0 2006.229.15:35:25.94#ibcon#wrote, iclass 20, count 0 2006.229.15:35:25.94#ibcon#about to read 3, iclass 20, count 0 2006.229.15:35:25.98#ibcon#read 3, iclass 20, count 0 2006.229.15:35:25.98#ibcon#about to read 4, iclass 20, count 0 2006.229.15:35:25.98#ibcon#read 4, iclass 20, count 0 2006.229.15:35:25.98#ibcon#about to read 5, iclass 20, count 0 2006.229.15:35:25.98#ibcon#read 5, iclass 20, count 0 2006.229.15:35:25.98#ibcon#about to read 6, iclass 20, count 0 2006.229.15:35:25.98#ibcon#read 6, iclass 20, count 0 2006.229.15:35:25.98#ibcon#end of sib2, iclass 20, count 0 2006.229.15:35:25.98#ibcon#*after write, iclass 20, count 0 2006.229.15:35:25.98#ibcon#*before return 0, iclass 20, count 0 2006.229.15:35:25.98#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:25.98#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:35:25.98#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:35:25.98#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:35:25.98$vck44/vb=1,4 2006.229.15:35:25.98#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:35:25.98#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:35:25.98#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:25.98#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:25.98#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:25.98#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:25.98#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:35:25.98#ibcon#first serial, iclass 22, count 2 2006.229.15:35:25.98#ibcon#enter sib2, iclass 22, count 2 2006.229.15:35:25.98#ibcon#flushed, iclass 22, count 2 2006.229.15:35:25.98#ibcon#about to write, iclass 22, count 2 2006.229.15:35:25.98#ibcon#wrote, iclass 22, count 2 2006.229.15:35:25.98#ibcon#about to read 3, iclass 22, count 2 2006.229.15:35:26.00#ibcon#read 3, iclass 22, count 2 2006.229.15:35:26.00#ibcon#about to read 4, iclass 22, count 2 2006.229.15:35:26.00#ibcon#read 4, iclass 22, count 2 2006.229.15:35:26.00#ibcon#about to read 5, iclass 22, count 2 2006.229.15:35:26.00#ibcon#read 5, iclass 22, count 2 2006.229.15:35:26.00#ibcon#about to read 6, iclass 22, count 2 2006.229.15:35:26.00#ibcon#read 6, iclass 22, count 2 2006.229.15:35:26.00#ibcon#end of sib2, iclass 22, count 2 2006.229.15:35:26.00#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:35:26.00#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:35:26.00#ibcon#[27=AT01-04\r\n] 2006.229.15:35:26.00#ibcon#*before write, iclass 22, count 2 2006.229.15:35:26.00#ibcon#enter sib2, iclass 22, count 2 2006.229.15:35:26.00#ibcon#flushed, iclass 22, count 2 2006.229.15:35:26.00#ibcon#about to write, iclass 22, count 2 2006.229.15:35:26.00#ibcon#wrote, iclass 22, count 2 2006.229.15:35:26.00#ibcon#about to read 3, iclass 22, count 2 2006.229.15:35:26.03#ibcon#read 3, iclass 22, count 2 2006.229.15:35:26.03#ibcon#about to read 4, iclass 22, count 2 2006.229.15:35:26.03#ibcon#read 4, iclass 22, count 2 2006.229.15:35:26.03#ibcon#about to read 5, iclass 22, count 2 2006.229.15:35:26.03#ibcon#read 5, iclass 22, count 2 2006.229.15:35:26.03#ibcon#about to read 6, iclass 22, count 2 2006.229.15:35:26.03#ibcon#read 6, iclass 22, count 2 2006.229.15:35:26.03#ibcon#end of sib2, iclass 22, count 2 2006.229.15:35:26.03#ibcon#*after write, iclass 22, count 2 2006.229.15:35:26.03#ibcon#*before return 0, iclass 22, count 2 2006.229.15:35:26.03#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:26.03#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:35:26.03#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:35:26.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:26.03#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:26.15#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:26.15#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:26.15#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:35:26.15#ibcon#first serial, iclass 22, count 0 2006.229.15:35:26.15#ibcon#enter sib2, iclass 22, count 0 2006.229.15:35:26.15#ibcon#flushed, iclass 22, count 0 2006.229.15:35:26.15#ibcon#about to write, iclass 22, count 0 2006.229.15:35:26.15#ibcon#wrote, iclass 22, count 0 2006.229.15:35:26.15#ibcon#about to read 3, iclass 22, count 0 2006.229.15:35:26.17#ibcon#read 3, iclass 22, count 0 2006.229.15:35:26.17#ibcon#about to read 4, iclass 22, count 0 2006.229.15:35:26.17#ibcon#read 4, iclass 22, count 0 2006.229.15:35:26.17#ibcon#about to read 5, iclass 22, count 0 2006.229.15:35:26.17#ibcon#read 5, iclass 22, count 0 2006.229.15:35:26.17#ibcon#about to read 6, iclass 22, count 0 2006.229.15:35:26.17#ibcon#read 6, iclass 22, count 0 2006.229.15:35:26.17#ibcon#end of sib2, iclass 22, count 0 2006.229.15:35:26.17#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:35:26.17#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:35:26.17#ibcon#[27=USB\r\n] 2006.229.15:35:26.17#ibcon#*before write, iclass 22, count 0 2006.229.15:35:26.17#ibcon#enter sib2, iclass 22, count 0 2006.229.15:35:26.17#ibcon#flushed, iclass 22, count 0 2006.229.15:35:26.17#ibcon#about to write, iclass 22, count 0 2006.229.15:35:26.17#ibcon#wrote, iclass 22, count 0 2006.229.15:35:26.17#ibcon#about to read 3, iclass 22, count 0 2006.229.15:35:26.20#ibcon#read 3, iclass 22, count 0 2006.229.15:35:26.20#ibcon#about to read 4, iclass 22, count 0 2006.229.15:35:26.20#ibcon#read 4, iclass 22, count 0 2006.229.15:35:26.20#ibcon#about to read 5, iclass 22, count 0 2006.229.15:35:26.20#ibcon#read 5, iclass 22, count 0 2006.229.15:35:26.20#ibcon#about to read 6, iclass 22, count 0 2006.229.15:35:26.20#ibcon#read 6, iclass 22, count 0 2006.229.15:35:26.20#ibcon#end of sib2, iclass 22, count 0 2006.229.15:35:26.20#ibcon#*after write, iclass 22, count 0 2006.229.15:35:26.20#ibcon#*before return 0, iclass 22, count 0 2006.229.15:35:26.20#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:26.20#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:35:26.20#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:35:26.20#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:35:26.20$vck44/vblo=2,634.99 2006.229.15:35:26.20#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:35:26.20#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:35:26.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:26.20#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:26.20#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:26.20#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:26.20#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:35:26.20#ibcon#first serial, iclass 24, count 0 2006.229.15:35:26.20#ibcon#enter sib2, iclass 24, count 0 2006.229.15:35:26.20#ibcon#flushed, iclass 24, count 0 2006.229.15:35:26.20#ibcon#about to write, iclass 24, count 0 2006.229.15:35:26.20#ibcon#wrote, iclass 24, count 0 2006.229.15:35:26.20#ibcon#about to read 3, iclass 24, count 0 2006.229.15:35:26.22#ibcon#read 3, iclass 24, count 0 2006.229.15:35:26.22#ibcon#about to read 4, iclass 24, count 0 2006.229.15:35:26.22#ibcon#read 4, iclass 24, count 0 2006.229.15:35:26.22#ibcon#about to read 5, iclass 24, count 0 2006.229.15:35:26.22#ibcon#read 5, iclass 24, count 0 2006.229.15:35:26.22#ibcon#about to read 6, iclass 24, count 0 2006.229.15:35:26.22#ibcon#read 6, iclass 24, count 0 2006.229.15:35:26.22#ibcon#end of sib2, iclass 24, count 0 2006.229.15:35:26.22#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:35:26.22#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:35:26.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:35:26.22#ibcon#*before write, iclass 24, count 0 2006.229.15:35:26.22#ibcon#enter sib2, iclass 24, count 0 2006.229.15:35:26.22#ibcon#flushed, iclass 24, count 0 2006.229.15:35:26.22#ibcon#about to write, iclass 24, count 0 2006.229.15:35:26.22#ibcon#wrote, iclass 24, count 0 2006.229.15:35:26.22#ibcon#about to read 3, iclass 24, count 0 2006.229.15:35:26.26#ibcon#read 3, iclass 24, count 0 2006.229.15:35:26.26#ibcon#about to read 4, iclass 24, count 0 2006.229.15:35:26.26#ibcon#read 4, iclass 24, count 0 2006.229.15:35:26.26#ibcon#about to read 5, iclass 24, count 0 2006.229.15:35:26.26#ibcon#read 5, iclass 24, count 0 2006.229.15:35:26.26#ibcon#about to read 6, iclass 24, count 0 2006.229.15:35:26.26#ibcon#read 6, iclass 24, count 0 2006.229.15:35:26.26#ibcon#end of sib2, iclass 24, count 0 2006.229.15:35:26.26#ibcon#*after write, iclass 24, count 0 2006.229.15:35:26.26#ibcon#*before return 0, iclass 24, count 0 2006.229.15:35:26.26#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:26.26#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:35:26.26#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:35:26.26#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:35:26.26$vck44/vb=2,4 2006.229.15:35:26.26#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:35:26.26#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:35:26.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:26.26#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:26.32#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:26.32#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:26.32#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:35:26.32#ibcon#first serial, iclass 26, count 2 2006.229.15:35:26.32#ibcon#enter sib2, iclass 26, count 2 2006.229.15:35:26.32#ibcon#flushed, iclass 26, count 2 2006.229.15:35:26.32#ibcon#about to write, iclass 26, count 2 2006.229.15:35:26.32#ibcon#wrote, iclass 26, count 2 2006.229.15:35:26.32#ibcon#about to read 3, iclass 26, count 2 2006.229.15:35:26.34#ibcon#read 3, iclass 26, count 2 2006.229.15:35:26.34#ibcon#about to read 4, iclass 26, count 2 2006.229.15:35:26.34#ibcon#read 4, iclass 26, count 2 2006.229.15:35:26.34#ibcon#about to read 5, iclass 26, count 2 2006.229.15:35:26.34#ibcon#read 5, iclass 26, count 2 2006.229.15:35:26.34#ibcon#about to read 6, iclass 26, count 2 2006.229.15:35:26.34#ibcon#read 6, iclass 26, count 2 2006.229.15:35:26.34#ibcon#end of sib2, iclass 26, count 2 2006.229.15:35:26.34#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:35:26.34#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:35:26.34#ibcon#[27=AT02-04\r\n] 2006.229.15:35:26.34#ibcon#*before write, iclass 26, count 2 2006.229.15:35:26.34#ibcon#enter sib2, iclass 26, count 2 2006.229.15:35:26.34#ibcon#flushed, iclass 26, count 2 2006.229.15:35:26.34#ibcon#about to write, iclass 26, count 2 2006.229.15:35:26.34#ibcon#wrote, iclass 26, count 2 2006.229.15:35:26.34#ibcon#about to read 3, iclass 26, count 2 2006.229.15:35:26.37#ibcon#read 3, iclass 26, count 2 2006.229.15:35:26.37#ibcon#about to read 4, iclass 26, count 2 2006.229.15:35:26.37#ibcon#read 4, iclass 26, count 2 2006.229.15:35:26.37#ibcon#about to read 5, iclass 26, count 2 2006.229.15:35:26.37#ibcon#read 5, iclass 26, count 2 2006.229.15:35:26.37#ibcon#about to read 6, iclass 26, count 2 2006.229.15:35:26.37#ibcon#read 6, iclass 26, count 2 2006.229.15:35:26.37#ibcon#end of sib2, iclass 26, count 2 2006.229.15:35:26.37#ibcon#*after write, iclass 26, count 2 2006.229.15:35:26.37#ibcon#*before return 0, iclass 26, count 2 2006.229.15:35:26.37#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:26.37#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:35:26.37#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:35:26.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:26.37#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:26.49#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:26.49#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:26.49#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:35:26.49#ibcon#first serial, iclass 26, count 0 2006.229.15:35:26.49#ibcon#enter sib2, iclass 26, count 0 2006.229.15:35:26.49#ibcon#flushed, iclass 26, count 0 2006.229.15:35:26.49#ibcon#about to write, iclass 26, count 0 2006.229.15:35:26.49#ibcon#wrote, iclass 26, count 0 2006.229.15:35:26.49#ibcon#about to read 3, iclass 26, count 0 2006.229.15:35:26.51#ibcon#read 3, iclass 26, count 0 2006.229.15:35:26.51#ibcon#about to read 4, iclass 26, count 0 2006.229.15:35:26.51#ibcon#read 4, iclass 26, count 0 2006.229.15:35:26.51#ibcon#about to read 5, iclass 26, count 0 2006.229.15:35:26.51#ibcon#read 5, iclass 26, count 0 2006.229.15:35:26.51#ibcon#about to read 6, iclass 26, count 0 2006.229.15:35:26.51#ibcon#read 6, iclass 26, count 0 2006.229.15:35:26.51#ibcon#end of sib2, iclass 26, count 0 2006.229.15:35:26.51#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:35:26.51#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:35:26.51#ibcon#[27=USB\r\n] 2006.229.15:35:26.51#ibcon#*before write, iclass 26, count 0 2006.229.15:35:26.51#ibcon#enter sib2, iclass 26, count 0 2006.229.15:35:26.51#ibcon#flushed, iclass 26, count 0 2006.229.15:35:26.51#ibcon#about to write, iclass 26, count 0 2006.229.15:35:26.51#ibcon#wrote, iclass 26, count 0 2006.229.15:35:26.51#ibcon#about to read 3, iclass 26, count 0 2006.229.15:35:26.54#ibcon#read 3, iclass 26, count 0 2006.229.15:35:26.54#ibcon#about to read 4, iclass 26, count 0 2006.229.15:35:26.54#ibcon#read 4, iclass 26, count 0 2006.229.15:35:26.54#ibcon#about to read 5, iclass 26, count 0 2006.229.15:35:26.54#ibcon#read 5, iclass 26, count 0 2006.229.15:35:26.54#ibcon#about to read 6, iclass 26, count 0 2006.229.15:35:26.54#ibcon#read 6, iclass 26, count 0 2006.229.15:35:26.54#ibcon#end of sib2, iclass 26, count 0 2006.229.15:35:26.54#ibcon#*after write, iclass 26, count 0 2006.229.15:35:26.54#ibcon#*before return 0, iclass 26, count 0 2006.229.15:35:26.54#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:26.54#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:35:26.54#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:35:26.54#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:35:26.54$vck44/vblo=3,649.99 2006.229.15:35:26.54#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:35:26.54#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:35:26.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:26.54#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:26.54#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:26.54#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:26.54#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:35:26.54#ibcon#first serial, iclass 28, count 0 2006.229.15:35:26.54#ibcon#enter sib2, iclass 28, count 0 2006.229.15:35:26.54#ibcon#flushed, iclass 28, count 0 2006.229.15:35:26.54#ibcon#about to write, iclass 28, count 0 2006.229.15:35:26.54#ibcon#wrote, iclass 28, count 0 2006.229.15:35:26.54#ibcon#about to read 3, iclass 28, count 0 2006.229.15:35:26.56#ibcon#read 3, iclass 28, count 0 2006.229.15:35:26.56#ibcon#about to read 4, iclass 28, count 0 2006.229.15:35:26.56#ibcon#read 4, iclass 28, count 0 2006.229.15:35:26.56#ibcon#about to read 5, iclass 28, count 0 2006.229.15:35:26.56#ibcon#read 5, iclass 28, count 0 2006.229.15:35:26.56#ibcon#about to read 6, iclass 28, count 0 2006.229.15:35:26.56#ibcon#read 6, iclass 28, count 0 2006.229.15:35:26.56#ibcon#end of sib2, iclass 28, count 0 2006.229.15:35:26.56#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:35:26.56#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:35:26.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:35:26.56#ibcon#*before write, iclass 28, count 0 2006.229.15:35:26.56#ibcon#enter sib2, iclass 28, count 0 2006.229.15:35:26.56#ibcon#flushed, iclass 28, count 0 2006.229.15:35:26.56#ibcon#about to write, iclass 28, count 0 2006.229.15:35:26.56#ibcon#wrote, iclass 28, count 0 2006.229.15:35:26.56#ibcon#about to read 3, iclass 28, count 0 2006.229.15:35:26.60#ibcon#read 3, iclass 28, count 0 2006.229.15:35:26.60#ibcon#about to read 4, iclass 28, count 0 2006.229.15:35:26.60#ibcon#read 4, iclass 28, count 0 2006.229.15:35:26.60#ibcon#about to read 5, iclass 28, count 0 2006.229.15:35:26.60#ibcon#read 5, iclass 28, count 0 2006.229.15:35:26.60#ibcon#about to read 6, iclass 28, count 0 2006.229.15:35:26.60#ibcon#read 6, iclass 28, count 0 2006.229.15:35:26.60#ibcon#end of sib2, iclass 28, count 0 2006.229.15:35:26.60#ibcon#*after write, iclass 28, count 0 2006.229.15:35:26.60#ibcon#*before return 0, iclass 28, count 0 2006.229.15:35:26.60#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:26.60#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:35:26.60#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:35:26.60#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:35:26.60$vck44/vb=3,4 2006.229.15:35:26.60#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:35:26.60#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:35:26.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:26.60#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:26.66#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:26.66#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:26.66#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:35:26.66#ibcon#first serial, iclass 30, count 2 2006.229.15:35:26.66#ibcon#enter sib2, iclass 30, count 2 2006.229.15:35:26.66#ibcon#flushed, iclass 30, count 2 2006.229.15:35:26.66#ibcon#about to write, iclass 30, count 2 2006.229.15:35:26.66#ibcon#wrote, iclass 30, count 2 2006.229.15:35:26.66#ibcon#about to read 3, iclass 30, count 2 2006.229.15:35:26.68#ibcon#read 3, iclass 30, count 2 2006.229.15:35:26.68#ibcon#about to read 4, iclass 30, count 2 2006.229.15:35:26.68#ibcon#read 4, iclass 30, count 2 2006.229.15:35:26.68#ibcon#about to read 5, iclass 30, count 2 2006.229.15:35:26.68#ibcon#read 5, iclass 30, count 2 2006.229.15:35:26.68#ibcon#about to read 6, iclass 30, count 2 2006.229.15:35:26.68#ibcon#read 6, iclass 30, count 2 2006.229.15:35:26.68#ibcon#end of sib2, iclass 30, count 2 2006.229.15:35:26.68#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:35:26.68#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:35:26.68#ibcon#[27=AT03-04\r\n] 2006.229.15:35:26.68#ibcon#*before write, iclass 30, count 2 2006.229.15:35:26.68#ibcon#enter sib2, iclass 30, count 2 2006.229.15:35:26.68#ibcon#flushed, iclass 30, count 2 2006.229.15:35:26.68#ibcon#about to write, iclass 30, count 2 2006.229.15:35:26.68#ibcon#wrote, iclass 30, count 2 2006.229.15:35:26.68#ibcon#about to read 3, iclass 30, count 2 2006.229.15:35:26.71#ibcon#read 3, iclass 30, count 2 2006.229.15:35:26.71#ibcon#about to read 4, iclass 30, count 2 2006.229.15:35:26.71#ibcon#read 4, iclass 30, count 2 2006.229.15:35:26.71#ibcon#about to read 5, iclass 30, count 2 2006.229.15:35:26.71#ibcon#read 5, iclass 30, count 2 2006.229.15:35:26.71#ibcon#about to read 6, iclass 30, count 2 2006.229.15:35:26.71#ibcon#read 6, iclass 30, count 2 2006.229.15:35:26.71#ibcon#end of sib2, iclass 30, count 2 2006.229.15:35:26.71#ibcon#*after write, iclass 30, count 2 2006.229.15:35:26.71#ibcon#*before return 0, iclass 30, count 2 2006.229.15:35:26.71#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:26.71#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:35:26.71#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:35:26.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:26.71#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:26.83#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:26.83#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:26.83#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:35:26.83#ibcon#first serial, iclass 30, count 0 2006.229.15:35:26.83#ibcon#enter sib2, iclass 30, count 0 2006.229.15:35:26.83#ibcon#flushed, iclass 30, count 0 2006.229.15:35:26.83#ibcon#about to write, iclass 30, count 0 2006.229.15:35:26.83#ibcon#wrote, iclass 30, count 0 2006.229.15:35:26.83#ibcon#about to read 3, iclass 30, count 0 2006.229.15:35:26.85#ibcon#read 3, iclass 30, count 0 2006.229.15:35:26.85#ibcon#about to read 4, iclass 30, count 0 2006.229.15:35:26.85#ibcon#read 4, iclass 30, count 0 2006.229.15:35:26.85#ibcon#about to read 5, iclass 30, count 0 2006.229.15:35:26.85#ibcon#read 5, iclass 30, count 0 2006.229.15:35:26.85#ibcon#about to read 6, iclass 30, count 0 2006.229.15:35:26.85#ibcon#read 6, iclass 30, count 0 2006.229.15:35:26.85#ibcon#end of sib2, iclass 30, count 0 2006.229.15:35:26.85#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:35:26.85#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:35:26.85#ibcon#[27=USB\r\n] 2006.229.15:35:26.85#ibcon#*before write, iclass 30, count 0 2006.229.15:35:26.85#ibcon#enter sib2, iclass 30, count 0 2006.229.15:35:26.85#ibcon#flushed, iclass 30, count 0 2006.229.15:35:26.85#ibcon#about to write, iclass 30, count 0 2006.229.15:35:26.85#ibcon#wrote, iclass 30, count 0 2006.229.15:35:26.85#ibcon#about to read 3, iclass 30, count 0 2006.229.15:35:26.88#ibcon#read 3, iclass 30, count 0 2006.229.15:35:26.88#ibcon#about to read 4, iclass 30, count 0 2006.229.15:35:26.88#ibcon#read 4, iclass 30, count 0 2006.229.15:35:26.88#ibcon#about to read 5, iclass 30, count 0 2006.229.15:35:26.88#ibcon#read 5, iclass 30, count 0 2006.229.15:35:26.88#ibcon#about to read 6, iclass 30, count 0 2006.229.15:35:26.88#ibcon#read 6, iclass 30, count 0 2006.229.15:35:26.88#ibcon#end of sib2, iclass 30, count 0 2006.229.15:35:26.88#ibcon#*after write, iclass 30, count 0 2006.229.15:35:26.88#ibcon#*before return 0, iclass 30, count 0 2006.229.15:35:26.88#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:26.88#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:35:26.88#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:35:26.88#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:35:26.88$vck44/vblo=4,679.99 2006.229.15:35:26.88#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:35:26.88#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:35:26.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:26.88#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:26.88#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:26.88#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:26.88#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:35:26.88#ibcon#first serial, iclass 32, count 0 2006.229.15:35:26.88#ibcon#enter sib2, iclass 32, count 0 2006.229.15:35:26.88#ibcon#flushed, iclass 32, count 0 2006.229.15:35:26.88#ibcon#about to write, iclass 32, count 0 2006.229.15:35:26.88#ibcon#wrote, iclass 32, count 0 2006.229.15:35:26.88#ibcon#about to read 3, iclass 32, count 0 2006.229.15:35:26.90#ibcon#read 3, iclass 32, count 0 2006.229.15:35:26.90#ibcon#about to read 4, iclass 32, count 0 2006.229.15:35:26.90#ibcon#read 4, iclass 32, count 0 2006.229.15:35:26.90#ibcon#about to read 5, iclass 32, count 0 2006.229.15:35:26.90#ibcon#read 5, iclass 32, count 0 2006.229.15:35:26.90#ibcon#about to read 6, iclass 32, count 0 2006.229.15:35:26.90#ibcon#read 6, iclass 32, count 0 2006.229.15:35:26.90#ibcon#end of sib2, iclass 32, count 0 2006.229.15:35:26.90#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:35:26.90#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:35:26.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:35:26.90#ibcon#*before write, iclass 32, count 0 2006.229.15:35:26.90#ibcon#enter sib2, iclass 32, count 0 2006.229.15:35:26.90#ibcon#flushed, iclass 32, count 0 2006.229.15:35:26.90#ibcon#about to write, iclass 32, count 0 2006.229.15:35:26.90#ibcon#wrote, iclass 32, count 0 2006.229.15:35:26.90#ibcon#about to read 3, iclass 32, count 0 2006.229.15:35:26.94#ibcon#read 3, iclass 32, count 0 2006.229.15:35:26.94#ibcon#about to read 4, iclass 32, count 0 2006.229.15:35:26.94#ibcon#read 4, iclass 32, count 0 2006.229.15:35:26.94#ibcon#about to read 5, iclass 32, count 0 2006.229.15:35:26.94#ibcon#read 5, iclass 32, count 0 2006.229.15:35:26.94#ibcon#about to read 6, iclass 32, count 0 2006.229.15:35:26.94#ibcon#read 6, iclass 32, count 0 2006.229.15:35:26.94#ibcon#end of sib2, iclass 32, count 0 2006.229.15:35:26.94#ibcon#*after write, iclass 32, count 0 2006.229.15:35:26.94#ibcon#*before return 0, iclass 32, count 0 2006.229.15:35:26.94#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:26.94#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:35:26.94#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:35:26.94#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:35:26.94$vck44/vb=4,4 2006.229.15:35:26.94#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.15:35:26.94#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.15:35:26.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:26.94#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:27.00#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:27.00#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:27.00#ibcon#enter wrdev, iclass 34, count 2 2006.229.15:35:27.00#ibcon#first serial, iclass 34, count 2 2006.229.15:35:27.00#ibcon#enter sib2, iclass 34, count 2 2006.229.15:35:27.00#ibcon#flushed, iclass 34, count 2 2006.229.15:35:27.00#ibcon#about to write, iclass 34, count 2 2006.229.15:35:27.00#ibcon#wrote, iclass 34, count 2 2006.229.15:35:27.00#ibcon#about to read 3, iclass 34, count 2 2006.229.15:35:27.02#ibcon#read 3, iclass 34, count 2 2006.229.15:35:27.02#ibcon#about to read 4, iclass 34, count 2 2006.229.15:35:27.02#ibcon#read 4, iclass 34, count 2 2006.229.15:35:27.02#ibcon#about to read 5, iclass 34, count 2 2006.229.15:35:27.02#ibcon#read 5, iclass 34, count 2 2006.229.15:35:27.02#ibcon#about to read 6, iclass 34, count 2 2006.229.15:35:27.02#ibcon#read 6, iclass 34, count 2 2006.229.15:35:27.02#ibcon#end of sib2, iclass 34, count 2 2006.229.15:35:27.02#ibcon#*mode == 0, iclass 34, count 2 2006.229.15:35:27.02#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.15:35:27.02#ibcon#[27=AT04-04\r\n] 2006.229.15:35:27.02#ibcon#*before write, iclass 34, count 2 2006.229.15:35:27.02#ibcon#enter sib2, iclass 34, count 2 2006.229.15:35:27.02#ibcon#flushed, iclass 34, count 2 2006.229.15:35:27.02#ibcon#about to write, iclass 34, count 2 2006.229.15:35:27.02#ibcon#wrote, iclass 34, count 2 2006.229.15:35:27.02#ibcon#about to read 3, iclass 34, count 2 2006.229.15:35:27.05#ibcon#read 3, iclass 34, count 2 2006.229.15:35:27.05#ibcon#about to read 4, iclass 34, count 2 2006.229.15:35:27.05#ibcon#read 4, iclass 34, count 2 2006.229.15:35:27.05#ibcon#about to read 5, iclass 34, count 2 2006.229.15:35:27.05#ibcon#read 5, iclass 34, count 2 2006.229.15:35:27.05#ibcon#about to read 6, iclass 34, count 2 2006.229.15:35:27.05#ibcon#read 6, iclass 34, count 2 2006.229.15:35:27.05#ibcon#end of sib2, iclass 34, count 2 2006.229.15:35:27.05#ibcon#*after write, iclass 34, count 2 2006.229.15:35:27.05#ibcon#*before return 0, iclass 34, count 2 2006.229.15:35:27.05#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:27.05#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:35:27.05#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.15:35:27.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:27.05#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:27.17#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:27.17#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:27.17#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:35:27.17#ibcon#first serial, iclass 34, count 0 2006.229.15:35:27.17#ibcon#enter sib2, iclass 34, count 0 2006.229.15:35:27.17#ibcon#flushed, iclass 34, count 0 2006.229.15:35:27.17#ibcon#about to write, iclass 34, count 0 2006.229.15:35:27.17#ibcon#wrote, iclass 34, count 0 2006.229.15:35:27.17#ibcon#about to read 3, iclass 34, count 0 2006.229.15:35:27.19#ibcon#read 3, iclass 34, count 0 2006.229.15:35:27.19#ibcon#about to read 4, iclass 34, count 0 2006.229.15:35:27.19#ibcon#read 4, iclass 34, count 0 2006.229.15:35:27.19#ibcon#about to read 5, iclass 34, count 0 2006.229.15:35:27.19#ibcon#read 5, iclass 34, count 0 2006.229.15:35:27.19#ibcon#about to read 6, iclass 34, count 0 2006.229.15:35:27.19#ibcon#read 6, iclass 34, count 0 2006.229.15:35:27.19#ibcon#end of sib2, iclass 34, count 0 2006.229.15:35:27.19#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:35:27.19#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:35:27.19#ibcon#[27=USB\r\n] 2006.229.15:35:27.19#ibcon#*before write, iclass 34, count 0 2006.229.15:35:27.19#ibcon#enter sib2, iclass 34, count 0 2006.229.15:35:27.19#ibcon#flushed, iclass 34, count 0 2006.229.15:35:27.19#ibcon#about to write, iclass 34, count 0 2006.229.15:35:27.19#ibcon#wrote, iclass 34, count 0 2006.229.15:35:27.19#ibcon#about to read 3, iclass 34, count 0 2006.229.15:35:27.22#ibcon#read 3, iclass 34, count 0 2006.229.15:35:27.22#ibcon#about to read 4, iclass 34, count 0 2006.229.15:35:27.22#ibcon#read 4, iclass 34, count 0 2006.229.15:35:27.22#ibcon#about to read 5, iclass 34, count 0 2006.229.15:35:27.22#ibcon#read 5, iclass 34, count 0 2006.229.15:35:27.22#ibcon#about to read 6, iclass 34, count 0 2006.229.15:35:27.22#ibcon#read 6, iclass 34, count 0 2006.229.15:35:27.22#ibcon#end of sib2, iclass 34, count 0 2006.229.15:35:27.22#ibcon#*after write, iclass 34, count 0 2006.229.15:35:27.22#ibcon#*before return 0, iclass 34, count 0 2006.229.15:35:27.22#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:27.22#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:35:27.22#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:35:27.22#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:35:27.22$vck44/vblo=5,709.99 2006.229.15:35:27.22#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.15:35:27.22#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.15:35:27.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:27.22#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:27.22#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:27.22#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:27.22#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:35:27.22#ibcon#first serial, iclass 36, count 0 2006.229.15:35:27.22#ibcon#enter sib2, iclass 36, count 0 2006.229.15:35:27.22#ibcon#flushed, iclass 36, count 0 2006.229.15:35:27.22#ibcon#about to write, iclass 36, count 0 2006.229.15:35:27.22#ibcon#wrote, iclass 36, count 0 2006.229.15:35:27.22#ibcon#about to read 3, iclass 36, count 0 2006.229.15:35:27.24#ibcon#read 3, iclass 36, count 0 2006.229.15:35:27.24#ibcon#about to read 4, iclass 36, count 0 2006.229.15:35:27.24#ibcon#read 4, iclass 36, count 0 2006.229.15:35:27.24#ibcon#about to read 5, iclass 36, count 0 2006.229.15:35:27.24#ibcon#read 5, iclass 36, count 0 2006.229.15:35:27.24#ibcon#about to read 6, iclass 36, count 0 2006.229.15:35:27.24#ibcon#read 6, iclass 36, count 0 2006.229.15:35:27.24#ibcon#end of sib2, iclass 36, count 0 2006.229.15:35:27.24#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:35:27.24#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:35:27.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:35:27.24#ibcon#*before write, iclass 36, count 0 2006.229.15:35:27.24#ibcon#enter sib2, iclass 36, count 0 2006.229.15:35:27.24#ibcon#flushed, iclass 36, count 0 2006.229.15:35:27.24#ibcon#about to write, iclass 36, count 0 2006.229.15:35:27.24#ibcon#wrote, iclass 36, count 0 2006.229.15:35:27.24#ibcon#about to read 3, iclass 36, count 0 2006.229.15:35:27.28#ibcon#read 3, iclass 36, count 0 2006.229.15:35:27.28#ibcon#about to read 4, iclass 36, count 0 2006.229.15:35:27.28#ibcon#read 4, iclass 36, count 0 2006.229.15:35:27.28#ibcon#about to read 5, iclass 36, count 0 2006.229.15:35:27.28#ibcon#read 5, iclass 36, count 0 2006.229.15:35:27.28#ibcon#about to read 6, iclass 36, count 0 2006.229.15:35:27.28#ibcon#read 6, iclass 36, count 0 2006.229.15:35:27.28#ibcon#end of sib2, iclass 36, count 0 2006.229.15:35:27.28#ibcon#*after write, iclass 36, count 0 2006.229.15:35:27.28#ibcon#*before return 0, iclass 36, count 0 2006.229.15:35:27.28#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:27.28#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:35:27.28#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:35:27.28#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:35:27.28$vck44/vb=5,4 2006.229.15:35:27.28#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.15:35:27.28#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.15:35:27.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:27.28#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:27.34#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:27.34#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:27.34#ibcon#enter wrdev, iclass 38, count 2 2006.229.15:35:27.34#ibcon#first serial, iclass 38, count 2 2006.229.15:35:27.34#ibcon#enter sib2, iclass 38, count 2 2006.229.15:35:27.34#ibcon#flushed, iclass 38, count 2 2006.229.15:35:27.34#ibcon#about to write, iclass 38, count 2 2006.229.15:35:27.34#ibcon#wrote, iclass 38, count 2 2006.229.15:35:27.34#ibcon#about to read 3, iclass 38, count 2 2006.229.15:35:27.36#ibcon#read 3, iclass 38, count 2 2006.229.15:35:27.36#ibcon#about to read 4, iclass 38, count 2 2006.229.15:35:27.36#ibcon#read 4, iclass 38, count 2 2006.229.15:35:27.36#ibcon#about to read 5, iclass 38, count 2 2006.229.15:35:27.36#ibcon#read 5, iclass 38, count 2 2006.229.15:35:27.36#ibcon#about to read 6, iclass 38, count 2 2006.229.15:35:27.36#ibcon#read 6, iclass 38, count 2 2006.229.15:35:27.36#ibcon#end of sib2, iclass 38, count 2 2006.229.15:35:27.36#ibcon#*mode == 0, iclass 38, count 2 2006.229.15:35:27.36#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.15:35:27.36#ibcon#[27=AT05-04\r\n] 2006.229.15:35:27.36#ibcon#*before write, iclass 38, count 2 2006.229.15:35:27.36#ibcon#enter sib2, iclass 38, count 2 2006.229.15:35:27.36#ibcon#flushed, iclass 38, count 2 2006.229.15:35:27.36#ibcon#about to write, iclass 38, count 2 2006.229.15:35:27.36#ibcon#wrote, iclass 38, count 2 2006.229.15:35:27.36#ibcon#about to read 3, iclass 38, count 2 2006.229.15:35:27.39#ibcon#read 3, iclass 38, count 2 2006.229.15:35:27.39#ibcon#about to read 4, iclass 38, count 2 2006.229.15:35:27.39#ibcon#read 4, iclass 38, count 2 2006.229.15:35:27.39#ibcon#about to read 5, iclass 38, count 2 2006.229.15:35:27.39#ibcon#read 5, iclass 38, count 2 2006.229.15:35:27.39#ibcon#about to read 6, iclass 38, count 2 2006.229.15:35:27.39#ibcon#read 6, iclass 38, count 2 2006.229.15:35:27.39#ibcon#end of sib2, iclass 38, count 2 2006.229.15:35:27.39#ibcon#*after write, iclass 38, count 2 2006.229.15:35:27.39#ibcon#*before return 0, iclass 38, count 2 2006.229.15:35:27.39#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:27.39#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:35:27.39#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.15:35:27.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:27.39#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:27.51#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:27.51#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:27.51#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:35:27.51#ibcon#first serial, iclass 38, count 0 2006.229.15:35:27.51#ibcon#enter sib2, iclass 38, count 0 2006.229.15:35:27.51#ibcon#flushed, iclass 38, count 0 2006.229.15:35:27.51#ibcon#about to write, iclass 38, count 0 2006.229.15:35:27.51#ibcon#wrote, iclass 38, count 0 2006.229.15:35:27.51#ibcon#about to read 3, iclass 38, count 0 2006.229.15:35:27.53#ibcon#read 3, iclass 38, count 0 2006.229.15:35:27.53#ibcon#about to read 4, iclass 38, count 0 2006.229.15:35:27.53#ibcon#read 4, iclass 38, count 0 2006.229.15:35:27.53#ibcon#about to read 5, iclass 38, count 0 2006.229.15:35:27.53#ibcon#read 5, iclass 38, count 0 2006.229.15:35:27.53#ibcon#about to read 6, iclass 38, count 0 2006.229.15:35:27.53#ibcon#read 6, iclass 38, count 0 2006.229.15:35:27.53#ibcon#end of sib2, iclass 38, count 0 2006.229.15:35:27.53#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:35:27.53#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:35:27.53#ibcon#[27=USB\r\n] 2006.229.15:35:27.53#ibcon#*before write, iclass 38, count 0 2006.229.15:35:27.53#ibcon#enter sib2, iclass 38, count 0 2006.229.15:35:27.53#ibcon#flushed, iclass 38, count 0 2006.229.15:35:27.53#ibcon#about to write, iclass 38, count 0 2006.229.15:35:27.53#ibcon#wrote, iclass 38, count 0 2006.229.15:35:27.53#ibcon#about to read 3, iclass 38, count 0 2006.229.15:35:27.56#ibcon#read 3, iclass 38, count 0 2006.229.15:35:27.56#ibcon#about to read 4, iclass 38, count 0 2006.229.15:35:27.56#ibcon#read 4, iclass 38, count 0 2006.229.15:35:27.56#ibcon#about to read 5, iclass 38, count 0 2006.229.15:35:27.56#ibcon#read 5, iclass 38, count 0 2006.229.15:35:27.56#ibcon#about to read 6, iclass 38, count 0 2006.229.15:35:27.56#ibcon#read 6, iclass 38, count 0 2006.229.15:35:27.56#ibcon#end of sib2, iclass 38, count 0 2006.229.15:35:27.56#ibcon#*after write, iclass 38, count 0 2006.229.15:35:27.56#ibcon#*before return 0, iclass 38, count 0 2006.229.15:35:27.56#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:27.56#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:35:27.56#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:35:27.56#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:35:27.56$vck44/vblo=6,719.99 2006.229.15:35:27.56#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:35:27.56#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:35:27.56#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:27.56#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:27.56#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:27.56#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:27.56#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:35:27.56#ibcon#first serial, iclass 40, count 0 2006.229.15:35:27.56#ibcon#enter sib2, iclass 40, count 0 2006.229.15:35:27.56#ibcon#flushed, iclass 40, count 0 2006.229.15:35:27.56#ibcon#about to write, iclass 40, count 0 2006.229.15:35:27.56#ibcon#wrote, iclass 40, count 0 2006.229.15:35:27.56#ibcon#about to read 3, iclass 40, count 0 2006.229.15:35:27.58#ibcon#read 3, iclass 40, count 0 2006.229.15:35:27.58#ibcon#about to read 4, iclass 40, count 0 2006.229.15:35:27.58#ibcon#read 4, iclass 40, count 0 2006.229.15:35:27.58#ibcon#about to read 5, iclass 40, count 0 2006.229.15:35:27.58#ibcon#read 5, iclass 40, count 0 2006.229.15:35:27.58#ibcon#about to read 6, iclass 40, count 0 2006.229.15:35:27.58#ibcon#read 6, iclass 40, count 0 2006.229.15:35:27.58#ibcon#end of sib2, iclass 40, count 0 2006.229.15:35:27.58#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:35:27.58#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:35:27.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:35:27.58#ibcon#*before write, iclass 40, count 0 2006.229.15:35:27.58#ibcon#enter sib2, iclass 40, count 0 2006.229.15:35:27.58#ibcon#flushed, iclass 40, count 0 2006.229.15:35:27.58#ibcon#about to write, iclass 40, count 0 2006.229.15:35:27.58#ibcon#wrote, iclass 40, count 0 2006.229.15:35:27.58#ibcon#about to read 3, iclass 40, count 0 2006.229.15:35:27.62#ibcon#read 3, iclass 40, count 0 2006.229.15:35:27.62#ibcon#about to read 4, iclass 40, count 0 2006.229.15:35:27.62#ibcon#read 4, iclass 40, count 0 2006.229.15:35:27.62#ibcon#about to read 5, iclass 40, count 0 2006.229.15:35:27.62#ibcon#read 5, iclass 40, count 0 2006.229.15:35:27.62#ibcon#about to read 6, iclass 40, count 0 2006.229.15:35:27.62#ibcon#read 6, iclass 40, count 0 2006.229.15:35:27.62#ibcon#end of sib2, iclass 40, count 0 2006.229.15:35:27.62#ibcon#*after write, iclass 40, count 0 2006.229.15:35:27.62#ibcon#*before return 0, iclass 40, count 0 2006.229.15:35:27.62#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:27.62#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:35:27.62#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:35:27.62#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:35:27.62$vck44/vb=6,4 2006.229.15:35:27.62#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:35:27.62#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:35:27.62#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:27.62#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:27.68#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:27.68#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:27.68#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:35:27.68#ibcon#first serial, iclass 4, count 2 2006.229.15:35:27.68#ibcon#enter sib2, iclass 4, count 2 2006.229.15:35:27.68#ibcon#flushed, iclass 4, count 2 2006.229.15:35:27.68#ibcon#about to write, iclass 4, count 2 2006.229.15:35:27.68#ibcon#wrote, iclass 4, count 2 2006.229.15:35:27.68#ibcon#about to read 3, iclass 4, count 2 2006.229.15:35:27.70#ibcon#read 3, iclass 4, count 2 2006.229.15:35:27.70#ibcon#about to read 4, iclass 4, count 2 2006.229.15:35:27.70#ibcon#read 4, iclass 4, count 2 2006.229.15:35:27.70#ibcon#about to read 5, iclass 4, count 2 2006.229.15:35:27.70#ibcon#read 5, iclass 4, count 2 2006.229.15:35:27.70#ibcon#about to read 6, iclass 4, count 2 2006.229.15:35:27.70#ibcon#read 6, iclass 4, count 2 2006.229.15:35:27.70#ibcon#end of sib2, iclass 4, count 2 2006.229.15:35:27.70#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:35:27.70#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:35:27.70#ibcon#[27=AT06-04\r\n] 2006.229.15:35:27.70#ibcon#*before write, iclass 4, count 2 2006.229.15:35:27.70#ibcon#enter sib2, iclass 4, count 2 2006.229.15:35:27.70#ibcon#flushed, iclass 4, count 2 2006.229.15:35:27.70#ibcon#about to write, iclass 4, count 2 2006.229.15:35:27.70#ibcon#wrote, iclass 4, count 2 2006.229.15:35:27.70#ibcon#about to read 3, iclass 4, count 2 2006.229.15:35:27.73#ibcon#read 3, iclass 4, count 2 2006.229.15:35:27.73#ibcon#about to read 4, iclass 4, count 2 2006.229.15:35:27.73#ibcon#read 4, iclass 4, count 2 2006.229.15:35:27.73#ibcon#about to read 5, iclass 4, count 2 2006.229.15:35:27.73#ibcon#read 5, iclass 4, count 2 2006.229.15:35:27.73#ibcon#about to read 6, iclass 4, count 2 2006.229.15:35:27.73#ibcon#read 6, iclass 4, count 2 2006.229.15:35:27.73#ibcon#end of sib2, iclass 4, count 2 2006.229.15:35:27.73#ibcon#*after write, iclass 4, count 2 2006.229.15:35:27.73#ibcon#*before return 0, iclass 4, count 2 2006.229.15:35:27.73#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:27.73#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:35:27.73#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:35:27.73#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:27.73#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:27.85#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:27.85#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:27.85#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:35:27.85#ibcon#first serial, iclass 4, count 0 2006.229.15:35:27.85#ibcon#enter sib2, iclass 4, count 0 2006.229.15:35:27.85#ibcon#flushed, iclass 4, count 0 2006.229.15:35:27.85#ibcon#about to write, iclass 4, count 0 2006.229.15:35:27.85#ibcon#wrote, iclass 4, count 0 2006.229.15:35:27.85#ibcon#about to read 3, iclass 4, count 0 2006.229.15:35:27.87#ibcon#read 3, iclass 4, count 0 2006.229.15:35:27.87#ibcon#about to read 4, iclass 4, count 0 2006.229.15:35:27.87#ibcon#read 4, iclass 4, count 0 2006.229.15:35:27.87#ibcon#about to read 5, iclass 4, count 0 2006.229.15:35:27.87#ibcon#read 5, iclass 4, count 0 2006.229.15:35:27.87#ibcon#about to read 6, iclass 4, count 0 2006.229.15:35:27.87#ibcon#read 6, iclass 4, count 0 2006.229.15:35:27.87#ibcon#end of sib2, iclass 4, count 0 2006.229.15:35:27.87#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:35:27.87#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:35:27.87#ibcon#[27=USB\r\n] 2006.229.15:35:27.87#ibcon#*before write, iclass 4, count 0 2006.229.15:35:27.87#ibcon#enter sib2, iclass 4, count 0 2006.229.15:35:27.87#ibcon#flushed, iclass 4, count 0 2006.229.15:35:27.87#ibcon#about to write, iclass 4, count 0 2006.229.15:35:27.87#ibcon#wrote, iclass 4, count 0 2006.229.15:35:27.87#ibcon#about to read 3, iclass 4, count 0 2006.229.15:35:27.90#ibcon#read 3, iclass 4, count 0 2006.229.15:35:27.90#ibcon#about to read 4, iclass 4, count 0 2006.229.15:35:27.90#ibcon#read 4, iclass 4, count 0 2006.229.15:35:27.90#ibcon#about to read 5, iclass 4, count 0 2006.229.15:35:27.90#ibcon#read 5, iclass 4, count 0 2006.229.15:35:27.90#ibcon#about to read 6, iclass 4, count 0 2006.229.15:35:27.90#ibcon#read 6, iclass 4, count 0 2006.229.15:35:27.90#ibcon#end of sib2, iclass 4, count 0 2006.229.15:35:27.90#ibcon#*after write, iclass 4, count 0 2006.229.15:35:27.90#ibcon#*before return 0, iclass 4, count 0 2006.229.15:35:27.90#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:27.90#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:35:27.90#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:35:27.90#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:35:27.90$vck44/vblo=7,734.99 2006.229.15:35:27.90#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:35:27.90#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:35:27.90#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:27.90#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:27.90#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:27.90#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:27.90#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:35:27.90#ibcon#first serial, iclass 6, count 0 2006.229.15:35:27.90#ibcon#enter sib2, iclass 6, count 0 2006.229.15:35:27.90#ibcon#flushed, iclass 6, count 0 2006.229.15:35:27.90#ibcon#about to write, iclass 6, count 0 2006.229.15:35:27.90#ibcon#wrote, iclass 6, count 0 2006.229.15:35:27.90#ibcon#about to read 3, iclass 6, count 0 2006.229.15:35:27.92#ibcon#read 3, iclass 6, count 0 2006.229.15:35:27.92#ibcon#about to read 4, iclass 6, count 0 2006.229.15:35:27.92#ibcon#read 4, iclass 6, count 0 2006.229.15:35:27.92#ibcon#about to read 5, iclass 6, count 0 2006.229.15:35:27.92#ibcon#read 5, iclass 6, count 0 2006.229.15:35:27.92#ibcon#about to read 6, iclass 6, count 0 2006.229.15:35:27.92#ibcon#read 6, iclass 6, count 0 2006.229.15:35:27.92#ibcon#end of sib2, iclass 6, count 0 2006.229.15:35:27.92#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:35:27.92#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:35:27.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:35:27.92#ibcon#*before write, iclass 6, count 0 2006.229.15:35:27.92#ibcon#enter sib2, iclass 6, count 0 2006.229.15:35:27.92#ibcon#flushed, iclass 6, count 0 2006.229.15:35:27.92#ibcon#about to write, iclass 6, count 0 2006.229.15:35:27.92#ibcon#wrote, iclass 6, count 0 2006.229.15:35:27.92#ibcon#about to read 3, iclass 6, count 0 2006.229.15:35:27.96#ibcon#read 3, iclass 6, count 0 2006.229.15:35:27.96#ibcon#about to read 4, iclass 6, count 0 2006.229.15:35:27.96#ibcon#read 4, iclass 6, count 0 2006.229.15:35:27.96#ibcon#about to read 5, iclass 6, count 0 2006.229.15:35:27.96#ibcon#read 5, iclass 6, count 0 2006.229.15:35:27.96#ibcon#about to read 6, iclass 6, count 0 2006.229.15:35:27.96#ibcon#read 6, iclass 6, count 0 2006.229.15:35:27.96#ibcon#end of sib2, iclass 6, count 0 2006.229.15:35:27.96#ibcon#*after write, iclass 6, count 0 2006.229.15:35:27.96#ibcon#*before return 0, iclass 6, count 0 2006.229.15:35:27.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:27.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:35:27.96#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:35:27.96#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:35:27.96$vck44/vb=7,4 2006.229.15:35:27.96#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:35:27.96#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:35:27.96#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:27.96#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:28.02#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:28.02#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:28.02#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:35:28.02#ibcon#first serial, iclass 10, count 2 2006.229.15:35:28.02#ibcon#enter sib2, iclass 10, count 2 2006.229.15:35:28.02#ibcon#flushed, iclass 10, count 2 2006.229.15:35:28.02#ibcon#about to write, iclass 10, count 2 2006.229.15:35:28.02#ibcon#wrote, iclass 10, count 2 2006.229.15:35:28.02#ibcon#about to read 3, iclass 10, count 2 2006.229.15:35:28.04#ibcon#read 3, iclass 10, count 2 2006.229.15:35:28.04#ibcon#about to read 4, iclass 10, count 2 2006.229.15:35:28.04#ibcon#read 4, iclass 10, count 2 2006.229.15:35:28.04#ibcon#about to read 5, iclass 10, count 2 2006.229.15:35:28.04#ibcon#read 5, iclass 10, count 2 2006.229.15:35:28.04#ibcon#about to read 6, iclass 10, count 2 2006.229.15:35:28.04#ibcon#read 6, iclass 10, count 2 2006.229.15:35:28.04#ibcon#end of sib2, iclass 10, count 2 2006.229.15:35:28.04#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:35:28.04#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:35:28.04#ibcon#[27=AT07-04\r\n] 2006.229.15:35:28.04#ibcon#*before write, iclass 10, count 2 2006.229.15:35:28.04#ibcon#enter sib2, iclass 10, count 2 2006.229.15:35:28.04#ibcon#flushed, iclass 10, count 2 2006.229.15:35:28.04#ibcon#about to write, iclass 10, count 2 2006.229.15:35:28.04#ibcon#wrote, iclass 10, count 2 2006.229.15:35:28.04#ibcon#about to read 3, iclass 10, count 2 2006.229.15:35:28.07#ibcon#read 3, iclass 10, count 2 2006.229.15:35:28.07#ibcon#about to read 4, iclass 10, count 2 2006.229.15:35:28.07#ibcon#read 4, iclass 10, count 2 2006.229.15:35:28.07#ibcon#about to read 5, iclass 10, count 2 2006.229.15:35:28.07#ibcon#read 5, iclass 10, count 2 2006.229.15:35:28.07#ibcon#about to read 6, iclass 10, count 2 2006.229.15:35:28.07#ibcon#read 6, iclass 10, count 2 2006.229.15:35:28.07#ibcon#end of sib2, iclass 10, count 2 2006.229.15:35:28.07#ibcon#*after write, iclass 10, count 2 2006.229.15:35:28.07#ibcon#*before return 0, iclass 10, count 2 2006.229.15:35:28.07#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:28.07#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:35:28.07#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:35:28.07#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:28.07#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:28.19#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:28.19#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:28.19#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:35:28.19#ibcon#first serial, iclass 10, count 0 2006.229.15:35:28.19#ibcon#enter sib2, iclass 10, count 0 2006.229.15:35:28.19#ibcon#flushed, iclass 10, count 0 2006.229.15:35:28.19#ibcon#about to write, iclass 10, count 0 2006.229.15:35:28.19#ibcon#wrote, iclass 10, count 0 2006.229.15:35:28.19#ibcon#about to read 3, iclass 10, count 0 2006.229.15:35:28.21#ibcon#read 3, iclass 10, count 0 2006.229.15:35:28.21#ibcon#about to read 4, iclass 10, count 0 2006.229.15:35:28.21#ibcon#read 4, iclass 10, count 0 2006.229.15:35:28.21#ibcon#about to read 5, iclass 10, count 0 2006.229.15:35:28.21#ibcon#read 5, iclass 10, count 0 2006.229.15:35:28.21#ibcon#about to read 6, iclass 10, count 0 2006.229.15:35:28.21#ibcon#read 6, iclass 10, count 0 2006.229.15:35:28.21#ibcon#end of sib2, iclass 10, count 0 2006.229.15:35:28.21#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:35:28.21#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:35:28.21#ibcon#[27=USB\r\n] 2006.229.15:35:28.21#ibcon#*before write, iclass 10, count 0 2006.229.15:35:28.21#ibcon#enter sib2, iclass 10, count 0 2006.229.15:35:28.21#ibcon#flushed, iclass 10, count 0 2006.229.15:35:28.21#ibcon#about to write, iclass 10, count 0 2006.229.15:35:28.21#ibcon#wrote, iclass 10, count 0 2006.229.15:35:28.21#ibcon#about to read 3, iclass 10, count 0 2006.229.15:35:28.24#ibcon#read 3, iclass 10, count 0 2006.229.15:35:28.24#ibcon#about to read 4, iclass 10, count 0 2006.229.15:35:28.24#ibcon#read 4, iclass 10, count 0 2006.229.15:35:28.24#ibcon#about to read 5, iclass 10, count 0 2006.229.15:35:28.24#ibcon#read 5, iclass 10, count 0 2006.229.15:35:28.24#ibcon#about to read 6, iclass 10, count 0 2006.229.15:35:28.24#ibcon#read 6, iclass 10, count 0 2006.229.15:35:28.24#ibcon#end of sib2, iclass 10, count 0 2006.229.15:35:28.24#ibcon#*after write, iclass 10, count 0 2006.229.15:35:28.24#ibcon#*before return 0, iclass 10, count 0 2006.229.15:35:28.24#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:28.24#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:35:28.24#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:35:28.24#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:35:28.24$vck44/vblo=8,744.99 2006.229.15:35:28.24#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:35:28.24#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:35:28.24#ibcon#ireg 17 cls_cnt 0 2006.229.15:35:28.24#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:35:28.24#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:35:28.24#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:35:28.24#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:35:28.24#ibcon#first serial, iclass 12, count 0 2006.229.15:35:28.24#ibcon#enter sib2, iclass 12, count 0 2006.229.15:35:28.24#ibcon#flushed, iclass 12, count 0 2006.229.15:35:28.24#ibcon#about to write, iclass 12, count 0 2006.229.15:35:28.24#ibcon#wrote, iclass 12, count 0 2006.229.15:35:28.24#ibcon#about to read 3, iclass 12, count 0 2006.229.15:35:28.26#ibcon#read 3, iclass 12, count 0 2006.229.15:35:28.26#ibcon#about to read 4, iclass 12, count 0 2006.229.15:35:28.26#ibcon#read 4, iclass 12, count 0 2006.229.15:35:28.26#ibcon#about to read 5, iclass 12, count 0 2006.229.15:35:28.26#ibcon#read 5, iclass 12, count 0 2006.229.15:35:28.26#ibcon#about to read 6, iclass 12, count 0 2006.229.15:35:28.26#ibcon#read 6, iclass 12, count 0 2006.229.15:35:28.26#ibcon#end of sib2, iclass 12, count 0 2006.229.15:35:28.26#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:35:28.26#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:35:28.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:35:28.26#ibcon#*before write, iclass 12, count 0 2006.229.15:35:28.26#ibcon#enter sib2, iclass 12, count 0 2006.229.15:35:28.26#ibcon#flushed, iclass 12, count 0 2006.229.15:35:28.26#ibcon#about to write, iclass 12, count 0 2006.229.15:35:28.26#ibcon#wrote, iclass 12, count 0 2006.229.15:35:28.26#ibcon#about to read 3, iclass 12, count 0 2006.229.15:35:28.30#ibcon#read 3, iclass 12, count 0 2006.229.15:35:28.30#ibcon#about to read 4, iclass 12, count 0 2006.229.15:35:28.30#ibcon#read 4, iclass 12, count 0 2006.229.15:35:28.30#ibcon#about to read 5, iclass 12, count 0 2006.229.15:35:28.30#ibcon#read 5, iclass 12, count 0 2006.229.15:35:28.30#ibcon#about to read 6, iclass 12, count 0 2006.229.15:35:28.30#ibcon#read 6, iclass 12, count 0 2006.229.15:35:28.30#ibcon#end of sib2, iclass 12, count 0 2006.229.15:35:28.30#ibcon#*after write, iclass 12, count 0 2006.229.15:35:28.30#ibcon#*before return 0, iclass 12, count 0 2006.229.15:35:28.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:35:28.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:35:28.30#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:35:28.30#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:35:28.30$vck44/vb=8,4 2006.229.15:35:28.30#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:35:28.30#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:35:28.30#ibcon#ireg 11 cls_cnt 2 2006.229.15:35:28.30#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:35:28.36#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:35:28.36#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:35:28.36#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:35:28.36#ibcon#first serial, iclass 14, count 2 2006.229.15:35:28.36#ibcon#enter sib2, iclass 14, count 2 2006.229.15:35:28.36#ibcon#flushed, iclass 14, count 2 2006.229.15:35:28.36#ibcon#about to write, iclass 14, count 2 2006.229.15:35:28.36#ibcon#wrote, iclass 14, count 2 2006.229.15:35:28.36#ibcon#about to read 3, iclass 14, count 2 2006.229.15:35:28.38#ibcon#read 3, iclass 14, count 2 2006.229.15:35:28.38#ibcon#about to read 4, iclass 14, count 2 2006.229.15:35:28.38#ibcon#read 4, iclass 14, count 2 2006.229.15:35:28.38#ibcon#about to read 5, iclass 14, count 2 2006.229.15:35:28.38#ibcon#read 5, iclass 14, count 2 2006.229.15:35:28.38#ibcon#about to read 6, iclass 14, count 2 2006.229.15:35:28.38#ibcon#read 6, iclass 14, count 2 2006.229.15:35:28.38#ibcon#end of sib2, iclass 14, count 2 2006.229.15:35:28.38#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:35:28.38#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:35:28.38#ibcon#[27=AT08-04\r\n] 2006.229.15:35:28.38#ibcon#*before write, iclass 14, count 2 2006.229.15:35:28.38#ibcon#enter sib2, iclass 14, count 2 2006.229.15:35:28.38#ibcon#flushed, iclass 14, count 2 2006.229.15:35:28.38#ibcon#about to write, iclass 14, count 2 2006.229.15:35:28.38#ibcon#wrote, iclass 14, count 2 2006.229.15:35:28.38#ibcon#about to read 3, iclass 14, count 2 2006.229.15:35:28.41#ibcon#read 3, iclass 14, count 2 2006.229.15:35:28.41#ibcon#about to read 4, iclass 14, count 2 2006.229.15:35:28.41#ibcon#read 4, iclass 14, count 2 2006.229.15:35:28.41#ibcon#about to read 5, iclass 14, count 2 2006.229.15:35:28.41#ibcon#read 5, iclass 14, count 2 2006.229.15:35:28.41#ibcon#about to read 6, iclass 14, count 2 2006.229.15:35:28.41#ibcon#read 6, iclass 14, count 2 2006.229.15:35:28.41#ibcon#end of sib2, iclass 14, count 2 2006.229.15:35:28.41#ibcon#*after write, iclass 14, count 2 2006.229.15:35:28.41#ibcon#*before return 0, iclass 14, count 2 2006.229.15:35:28.41#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:35:28.41#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:35:28.41#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:35:28.41#ibcon#ireg 7 cls_cnt 0 2006.229.15:35:28.41#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:35:28.53#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:35:28.53#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:35:28.53#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:35:28.53#ibcon#first serial, iclass 14, count 0 2006.229.15:35:28.53#ibcon#enter sib2, iclass 14, count 0 2006.229.15:35:28.53#ibcon#flushed, iclass 14, count 0 2006.229.15:35:28.53#ibcon#about to write, iclass 14, count 0 2006.229.15:35:28.53#ibcon#wrote, iclass 14, count 0 2006.229.15:35:28.53#ibcon#about to read 3, iclass 14, count 0 2006.229.15:35:28.55#ibcon#read 3, iclass 14, count 0 2006.229.15:35:28.55#ibcon#about to read 4, iclass 14, count 0 2006.229.15:35:28.55#ibcon#read 4, iclass 14, count 0 2006.229.15:35:28.55#ibcon#about to read 5, iclass 14, count 0 2006.229.15:35:28.55#ibcon#read 5, iclass 14, count 0 2006.229.15:35:28.55#ibcon#about to read 6, iclass 14, count 0 2006.229.15:35:28.55#ibcon#read 6, iclass 14, count 0 2006.229.15:35:28.55#ibcon#end of sib2, iclass 14, count 0 2006.229.15:35:28.55#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:35:28.55#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:35:28.55#ibcon#[27=USB\r\n] 2006.229.15:35:28.55#ibcon#*before write, iclass 14, count 0 2006.229.15:35:28.55#ibcon#enter sib2, iclass 14, count 0 2006.229.15:35:28.55#ibcon#flushed, iclass 14, count 0 2006.229.15:35:28.55#ibcon#about to write, iclass 14, count 0 2006.229.15:35:28.55#ibcon#wrote, iclass 14, count 0 2006.229.15:35:28.55#ibcon#about to read 3, iclass 14, count 0 2006.229.15:35:28.58#ibcon#read 3, iclass 14, count 0 2006.229.15:35:28.58#ibcon#about to read 4, iclass 14, count 0 2006.229.15:35:28.58#ibcon#read 4, iclass 14, count 0 2006.229.15:35:28.58#ibcon#about to read 5, iclass 14, count 0 2006.229.15:35:28.58#ibcon#read 5, iclass 14, count 0 2006.229.15:35:28.58#ibcon#about to read 6, iclass 14, count 0 2006.229.15:35:28.58#ibcon#read 6, iclass 14, count 0 2006.229.15:35:28.58#ibcon#end of sib2, iclass 14, count 0 2006.229.15:35:28.58#ibcon#*after write, iclass 14, count 0 2006.229.15:35:28.58#ibcon#*before return 0, iclass 14, count 0 2006.229.15:35:28.58#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:35:28.58#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:35:28.58#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:35:28.58#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:35:28.58$vck44/vabw=wide 2006.229.15:35:28.58#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:35:28.58#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:35:28.58#ibcon#ireg 8 cls_cnt 0 2006.229.15:35:28.58#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:35:28.58#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:35:28.58#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:35:28.58#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:35:28.58#ibcon#first serial, iclass 16, count 0 2006.229.15:35:28.58#ibcon#enter sib2, iclass 16, count 0 2006.229.15:35:28.58#ibcon#flushed, iclass 16, count 0 2006.229.15:35:28.58#ibcon#about to write, iclass 16, count 0 2006.229.15:35:28.58#ibcon#wrote, iclass 16, count 0 2006.229.15:35:28.58#ibcon#about to read 3, iclass 16, count 0 2006.229.15:35:28.60#ibcon#read 3, iclass 16, count 0 2006.229.15:35:28.60#ibcon#about to read 4, iclass 16, count 0 2006.229.15:35:28.60#ibcon#read 4, iclass 16, count 0 2006.229.15:35:28.60#ibcon#about to read 5, iclass 16, count 0 2006.229.15:35:28.60#ibcon#read 5, iclass 16, count 0 2006.229.15:35:28.60#ibcon#about to read 6, iclass 16, count 0 2006.229.15:35:28.60#ibcon#read 6, iclass 16, count 0 2006.229.15:35:28.60#ibcon#end of sib2, iclass 16, count 0 2006.229.15:35:28.60#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:35:28.60#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:35:28.60#ibcon#[25=BW32\r\n] 2006.229.15:35:28.60#ibcon#*before write, iclass 16, count 0 2006.229.15:35:28.60#ibcon#enter sib2, iclass 16, count 0 2006.229.15:35:28.60#ibcon#flushed, iclass 16, count 0 2006.229.15:35:28.60#ibcon#about to write, iclass 16, count 0 2006.229.15:35:28.60#ibcon#wrote, iclass 16, count 0 2006.229.15:35:28.60#ibcon#about to read 3, iclass 16, count 0 2006.229.15:35:28.63#ibcon#read 3, iclass 16, count 0 2006.229.15:35:28.63#ibcon#about to read 4, iclass 16, count 0 2006.229.15:35:28.63#ibcon#read 4, iclass 16, count 0 2006.229.15:35:28.63#ibcon#about to read 5, iclass 16, count 0 2006.229.15:35:28.63#ibcon#read 5, iclass 16, count 0 2006.229.15:35:28.63#ibcon#about to read 6, iclass 16, count 0 2006.229.15:35:28.63#ibcon#read 6, iclass 16, count 0 2006.229.15:35:28.63#ibcon#end of sib2, iclass 16, count 0 2006.229.15:35:28.63#ibcon#*after write, iclass 16, count 0 2006.229.15:35:28.63#ibcon#*before return 0, iclass 16, count 0 2006.229.15:35:28.63#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:35:28.63#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:35:28.63#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:35:28.63#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:35:28.63$vck44/vbbw=wide 2006.229.15:35:28.63#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:35:28.63#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:35:28.63#ibcon#ireg 8 cls_cnt 0 2006.229.15:35:28.63#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:35:28.70#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:35:28.70#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:35:28.70#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:35:28.70#ibcon#first serial, iclass 18, count 0 2006.229.15:35:28.70#ibcon#enter sib2, iclass 18, count 0 2006.229.15:35:28.70#ibcon#flushed, iclass 18, count 0 2006.229.15:35:28.70#ibcon#about to write, iclass 18, count 0 2006.229.15:35:28.70#ibcon#wrote, iclass 18, count 0 2006.229.15:35:28.70#ibcon#about to read 3, iclass 18, count 0 2006.229.15:35:28.72#ibcon#read 3, iclass 18, count 0 2006.229.15:35:28.72#ibcon#about to read 4, iclass 18, count 0 2006.229.15:35:28.72#ibcon#read 4, iclass 18, count 0 2006.229.15:35:28.72#ibcon#about to read 5, iclass 18, count 0 2006.229.15:35:28.72#ibcon#read 5, iclass 18, count 0 2006.229.15:35:28.72#ibcon#about to read 6, iclass 18, count 0 2006.229.15:35:28.72#ibcon#read 6, iclass 18, count 0 2006.229.15:35:28.72#ibcon#end of sib2, iclass 18, count 0 2006.229.15:35:28.72#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:35:28.72#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:35:28.72#ibcon#[27=BW32\r\n] 2006.229.15:35:28.72#ibcon#*before write, iclass 18, count 0 2006.229.15:35:28.72#ibcon#enter sib2, iclass 18, count 0 2006.229.15:35:28.72#ibcon#flushed, iclass 18, count 0 2006.229.15:35:28.72#ibcon#about to write, iclass 18, count 0 2006.229.15:35:28.72#ibcon#wrote, iclass 18, count 0 2006.229.15:35:28.72#ibcon#about to read 3, iclass 18, count 0 2006.229.15:35:28.75#ibcon#read 3, iclass 18, count 0 2006.229.15:35:28.75#ibcon#about to read 4, iclass 18, count 0 2006.229.15:35:28.75#ibcon#read 4, iclass 18, count 0 2006.229.15:35:28.75#ibcon#about to read 5, iclass 18, count 0 2006.229.15:35:28.75#ibcon#read 5, iclass 18, count 0 2006.229.15:35:28.75#ibcon#about to read 6, iclass 18, count 0 2006.229.15:35:28.75#ibcon#read 6, iclass 18, count 0 2006.229.15:35:28.75#ibcon#end of sib2, iclass 18, count 0 2006.229.15:35:28.75#ibcon#*after write, iclass 18, count 0 2006.229.15:35:28.75#ibcon#*before return 0, iclass 18, count 0 2006.229.15:35:28.75#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:35:28.75#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:35:28.75#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:35:28.75#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:35:28.75$setupk4/ifdk4 2006.229.15:35:28.75$ifdk4/lo= 2006.229.15:35:28.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:35:28.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:35:28.75$ifdk4/patch= 2006.229.15:35:28.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:35:28.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:35:28.75$setupk4/!*+20s 2006.229.15:35:35.74#abcon#<5=/06 0.9 1.3 27.291001001.8\r\n> 2006.229.15:35:35.76#abcon#{5=INTERFACE CLEAR} 2006.229.15:35:35.82#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:35:42.14#trakl#Source acquired 2006.229.15:35:42.14#flagr#flagr/antenna,acquired 2006.229.15:35:43.26$setupk4/"tpicd 2006.229.15:35:43.26$setupk4/echo=off 2006.229.15:35:43.26$setupk4/xlog=off 2006.229.15:35:43.26:!2006.229.15:37:19 2006.229.15:37:19.00:preob 2006.229.15:37:19.14/onsource/TRACKING 2006.229.15:37:19.14:!2006.229.15:37:29 2006.229.15:37:29.00:"tape 2006.229.15:37:29.00:"st=record 2006.229.15:37:29.00:data_valid=on 2006.229.15:37:29.00:midob 2006.229.15:37:30.14/onsource/TRACKING 2006.229.15:37:30.14/wx/27.28,1001.9,100 2006.229.15:37:30.25/cable/+6.4145E-03 2006.229.15:37:31.34/va/01,08,usb,yes,29,31 2006.229.15:37:31.34/va/02,07,usb,yes,32,32 2006.229.15:37:31.34/va/03,06,usb,yes,39,42 2006.229.15:37:31.34/va/04,07,usb,yes,32,34 2006.229.15:37:31.34/va/05,04,usb,yes,29,29 2006.229.15:37:31.34/va/06,04,usb,yes,33,32 2006.229.15:37:31.34/va/07,05,usb,yes,29,29 2006.229.15:37:31.34/va/08,06,usb,yes,21,26 2006.229.15:37:31.57/valo/01,524.99,yes,locked 2006.229.15:37:31.57/valo/02,534.99,yes,locked 2006.229.15:37:31.57/valo/03,564.99,yes,locked 2006.229.15:37:31.57/valo/04,624.99,yes,locked 2006.229.15:37:31.57/valo/05,734.99,yes,locked 2006.229.15:37:31.57/valo/06,814.99,yes,locked 2006.229.15:37:31.57/valo/07,864.99,yes,locked 2006.229.15:37:31.57/valo/08,884.99,yes,locked 2006.229.15:37:32.66/vb/01,04,usb,yes,31,28 2006.229.15:37:32.66/vb/02,04,usb,yes,33,33 2006.229.15:37:32.66/vb/03,04,usb,yes,30,33 2006.229.15:37:32.66/vb/04,04,usb,yes,34,33 2006.229.15:37:32.66/vb/05,04,usb,yes,27,29 2006.229.15:37:32.66/vb/06,04,usb,yes,31,27 2006.229.15:37:32.66/vb/07,04,usb,yes,31,31 2006.229.15:37:32.66/vb/08,04,usb,yes,28,32 2006.229.15:37:32.90/vblo/01,629.99,yes,locked 2006.229.15:37:32.90/vblo/02,634.99,yes,locked 2006.229.15:37:32.90/vblo/03,649.99,yes,locked 2006.229.15:37:32.90/vblo/04,679.99,yes,locked 2006.229.15:37:32.90/vblo/05,709.99,yes,locked 2006.229.15:37:32.90/vblo/06,719.99,yes,locked 2006.229.15:37:32.90/vblo/07,734.99,yes,locked 2006.229.15:37:32.90/vblo/08,744.99,yes,locked 2006.229.15:37:33.05/vabw/8 2006.229.15:37:33.20/vbbw/8 2006.229.15:37:33.29/xfe/off,on,12.2 2006.229.15:37:33.67/ifatt/23,28,28,28 2006.229.15:37:34.08/fmout-gps/S +4.52E-07 2006.229.15:37:34.12:!2006.229.15:38:39 2006.229.15:38:39.00:data_valid=off 2006.229.15:38:39.00:"et 2006.229.15:38:39.00:!+3s 2006.229.15:38:42.01:"tape 2006.229.15:38:42.01:postob 2006.229.15:38:42.18/cable/+6.4139E-03 2006.229.15:38:42.18/wx/27.27,1001.9,100 2006.229.15:38:43.08/fmout-gps/S +4.52E-07 2006.229.15:38:43.08:scan_name=229-1540,jd0608,170 2006.229.15:38:43.08:source=3c446,222547.26,-045701.4,2000.0,ccw 2006.229.15:38:44.14#flagr#flagr/antenna,new-source 2006.229.15:38:44.14:checkk5 2006.229.15:38:44.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:38:44.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:38:45.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:38:45.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:38:46.13/chk_obsdata//k5ts1/T2291537??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:38:46.53/chk_obsdata//k5ts2/T2291537??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:38:46.93/chk_obsdata//k5ts3/T2291537??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:38:47.31/chk_obsdata//k5ts4/T2291537??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.15:38:48.04/k5log//k5ts1_log_newline 2006.229.15:38:48.75/k5log//k5ts2_log_newline 2006.229.15:38:49.48/k5log//k5ts3_log_newline 2006.229.15:38:50.20/k5log//k5ts4_log_newline 2006.229.15:38:50.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:38:50.22:setupk4=1 2006.229.15:38:50.22$setupk4/echo=on 2006.229.15:38:50.22$setupk4/pcalon 2006.229.15:38:50.22$pcalon/"no phase cal control is implemented here 2006.229.15:38:50.22$setupk4/"tpicd=stop 2006.229.15:38:50.22$setupk4/"rec=synch_on 2006.229.15:38:50.22$setupk4/"rec_mode=128 2006.229.15:38:50.22$setupk4/!* 2006.229.15:38:50.22$setupk4/recpk4 2006.229.15:38:50.22$recpk4/recpatch= 2006.229.15:38:50.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:38:50.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:38:50.23$setupk4/vck44 2006.229.15:38:50.23$vck44/valo=1,524.99 2006.229.15:38:50.23#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.15:38:50.23#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.15:38:50.23#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:50.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:50.23#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:50.23#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:50.23#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:38:50.23#ibcon#first serial, iclass 31, count 0 2006.229.15:38:50.23#ibcon#enter sib2, iclass 31, count 0 2006.229.15:38:50.23#ibcon#flushed, iclass 31, count 0 2006.229.15:38:50.23#ibcon#about to write, iclass 31, count 0 2006.229.15:38:50.23#ibcon#wrote, iclass 31, count 0 2006.229.15:38:50.23#ibcon#about to read 3, iclass 31, count 0 2006.229.15:38:50.25#ibcon#read 3, iclass 31, count 0 2006.229.15:38:50.25#ibcon#about to read 4, iclass 31, count 0 2006.229.15:38:50.25#ibcon#read 4, iclass 31, count 0 2006.229.15:38:50.25#ibcon#about to read 5, iclass 31, count 0 2006.229.15:38:50.25#ibcon#read 5, iclass 31, count 0 2006.229.15:38:50.25#ibcon#about to read 6, iclass 31, count 0 2006.229.15:38:50.25#ibcon#read 6, iclass 31, count 0 2006.229.15:38:50.25#ibcon#end of sib2, iclass 31, count 0 2006.229.15:38:50.25#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:38:50.25#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:38:50.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:38:50.25#ibcon#*before write, iclass 31, count 0 2006.229.15:38:50.25#ibcon#enter sib2, iclass 31, count 0 2006.229.15:38:50.25#ibcon#flushed, iclass 31, count 0 2006.229.15:38:50.25#ibcon#about to write, iclass 31, count 0 2006.229.15:38:50.25#ibcon#wrote, iclass 31, count 0 2006.229.15:38:50.25#ibcon#about to read 3, iclass 31, count 0 2006.229.15:38:50.30#ibcon#read 3, iclass 31, count 0 2006.229.15:38:50.30#ibcon#about to read 4, iclass 31, count 0 2006.229.15:38:50.30#ibcon#read 4, iclass 31, count 0 2006.229.15:38:50.30#ibcon#about to read 5, iclass 31, count 0 2006.229.15:38:50.30#ibcon#read 5, iclass 31, count 0 2006.229.15:38:50.30#ibcon#about to read 6, iclass 31, count 0 2006.229.15:38:50.30#ibcon#read 6, iclass 31, count 0 2006.229.15:38:50.30#ibcon#end of sib2, iclass 31, count 0 2006.229.15:38:50.30#ibcon#*after write, iclass 31, count 0 2006.229.15:38:50.30#ibcon#*before return 0, iclass 31, count 0 2006.229.15:38:50.30#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:50.30#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:50.30#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:38:50.30#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:38:50.30$vck44/va=1,8 2006.229.15:38:50.30#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.15:38:50.30#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.15:38:50.30#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:50.30#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:50.30#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:50.30#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:50.30#ibcon#enter wrdev, iclass 33, count 2 2006.229.15:38:50.30#ibcon#first serial, iclass 33, count 2 2006.229.15:38:50.30#ibcon#enter sib2, iclass 33, count 2 2006.229.15:38:50.30#ibcon#flushed, iclass 33, count 2 2006.229.15:38:50.30#ibcon#about to write, iclass 33, count 2 2006.229.15:38:50.30#ibcon#wrote, iclass 33, count 2 2006.229.15:38:50.30#ibcon#about to read 3, iclass 33, count 2 2006.229.15:38:50.32#ibcon#read 3, iclass 33, count 2 2006.229.15:38:50.32#ibcon#about to read 4, iclass 33, count 2 2006.229.15:38:50.32#ibcon#read 4, iclass 33, count 2 2006.229.15:38:50.32#ibcon#about to read 5, iclass 33, count 2 2006.229.15:38:50.32#ibcon#read 5, iclass 33, count 2 2006.229.15:38:50.32#ibcon#about to read 6, iclass 33, count 2 2006.229.15:38:50.32#ibcon#read 6, iclass 33, count 2 2006.229.15:38:50.32#ibcon#end of sib2, iclass 33, count 2 2006.229.15:38:50.32#ibcon#*mode == 0, iclass 33, count 2 2006.229.15:38:50.32#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.15:38:50.32#ibcon#[25=AT01-08\r\n] 2006.229.15:38:50.32#ibcon#*before write, iclass 33, count 2 2006.229.15:38:50.32#ibcon#enter sib2, iclass 33, count 2 2006.229.15:38:50.32#ibcon#flushed, iclass 33, count 2 2006.229.15:38:50.32#ibcon#about to write, iclass 33, count 2 2006.229.15:38:50.32#ibcon#wrote, iclass 33, count 2 2006.229.15:38:50.32#ibcon#about to read 3, iclass 33, count 2 2006.229.15:38:50.35#ibcon#read 3, iclass 33, count 2 2006.229.15:38:50.35#ibcon#about to read 4, iclass 33, count 2 2006.229.15:38:50.35#ibcon#read 4, iclass 33, count 2 2006.229.15:38:50.35#ibcon#about to read 5, iclass 33, count 2 2006.229.15:38:50.35#ibcon#read 5, iclass 33, count 2 2006.229.15:38:50.35#ibcon#about to read 6, iclass 33, count 2 2006.229.15:38:50.35#ibcon#read 6, iclass 33, count 2 2006.229.15:38:50.35#ibcon#end of sib2, iclass 33, count 2 2006.229.15:38:50.35#ibcon#*after write, iclass 33, count 2 2006.229.15:38:50.35#ibcon#*before return 0, iclass 33, count 2 2006.229.15:38:50.35#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:50.35#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:50.35#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.15:38:50.35#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:50.35#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:50.47#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:50.47#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:50.47#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:38:50.47#ibcon#first serial, iclass 33, count 0 2006.229.15:38:50.47#ibcon#enter sib2, iclass 33, count 0 2006.229.15:38:50.47#ibcon#flushed, iclass 33, count 0 2006.229.15:38:50.47#ibcon#about to write, iclass 33, count 0 2006.229.15:38:50.47#ibcon#wrote, iclass 33, count 0 2006.229.15:38:50.47#ibcon#about to read 3, iclass 33, count 0 2006.229.15:38:50.49#ibcon#read 3, iclass 33, count 0 2006.229.15:38:50.49#ibcon#about to read 4, iclass 33, count 0 2006.229.15:38:50.49#ibcon#read 4, iclass 33, count 0 2006.229.15:38:50.49#ibcon#about to read 5, iclass 33, count 0 2006.229.15:38:50.49#ibcon#read 5, iclass 33, count 0 2006.229.15:38:50.49#ibcon#about to read 6, iclass 33, count 0 2006.229.15:38:50.49#ibcon#read 6, iclass 33, count 0 2006.229.15:38:50.49#ibcon#end of sib2, iclass 33, count 0 2006.229.15:38:50.49#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:38:50.49#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:38:50.49#ibcon#[25=USB\r\n] 2006.229.15:38:50.49#ibcon#*before write, iclass 33, count 0 2006.229.15:38:50.49#ibcon#enter sib2, iclass 33, count 0 2006.229.15:38:50.49#ibcon#flushed, iclass 33, count 0 2006.229.15:38:50.49#ibcon#about to write, iclass 33, count 0 2006.229.15:38:50.49#ibcon#wrote, iclass 33, count 0 2006.229.15:38:50.49#ibcon#about to read 3, iclass 33, count 0 2006.229.15:38:50.52#ibcon#read 3, iclass 33, count 0 2006.229.15:38:50.52#ibcon#about to read 4, iclass 33, count 0 2006.229.15:38:50.52#ibcon#read 4, iclass 33, count 0 2006.229.15:38:50.52#ibcon#about to read 5, iclass 33, count 0 2006.229.15:38:50.52#ibcon#read 5, iclass 33, count 0 2006.229.15:38:50.52#ibcon#about to read 6, iclass 33, count 0 2006.229.15:38:50.52#ibcon#read 6, iclass 33, count 0 2006.229.15:38:50.52#ibcon#end of sib2, iclass 33, count 0 2006.229.15:38:50.52#ibcon#*after write, iclass 33, count 0 2006.229.15:38:50.52#ibcon#*before return 0, iclass 33, count 0 2006.229.15:38:50.52#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:50.52#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:50.52#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:38:50.52#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:38:50.52$vck44/valo=2,534.99 2006.229.15:38:50.52#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.15:38:50.52#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.15:38:50.52#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:50.52#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:50.52#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:50.52#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:50.52#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:38:50.52#ibcon#first serial, iclass 35, count 0 2006.229.15:38:50.52#ibcon#enter sib2, iclass 35, count 0 2006.229.15:38:50.52#ibcon#flushed, iclass 35, count 0 2006.229.15:38:50.52#ibcon#about to write, iclass 35, count 0 2006.229.15:38:50.52#ibcon#wrote, iclass 35, count 0 2006.229.15:38:50.52#ibcon#about to read 3, iclass 35, count 0 2006.229.15:38:50.54#ibcon#read 3, iclass 35, count 0 2006.229.15:38:50.54#ibcon#about to read 4, iclass 35, count 0 2006.229.15:38:50.54#ibcon#read 4, iclass 35, count 0 2006.229.15:38:50.54#ibcon#about to read 5, iclass 35, count 0 2006.229.15:38:50.54#ibcon#read 5, iclass 35, count 0 2006.229.15:38:50.54#ibcon#about to read 6, iclass 35, count 0 2006.229.15:38:50.54#ibcon#read 6, iclass 35, count 0 2006.229.15:38:50.54#ibcon#end of sib2, iclass 35, count 0 2006.229.15:38:50.54#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:38:50.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:38:50.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:38:50.54#ibcon#*before write, iclass 35, count 0 2006.229.15:38:50.54#ibcon#enter sib2, iclass 35, count 0 2006.229.15:38:50.54#ibcon#flushed, iclass 35, count 0 2006.229.15:38:50.54#ibcon#about to write, iclass 35, count 0 2006.229.15:38:50.54#ibcon#wrote, iclass 35, count 0 2006.229.15:38:50.54#ibcon#about to read 3, iclass 35, count 0 2006.229.15:38:50.58#ibcon#read 3, iclass 35, count 0 2006.229.15:38:50.58#ibcon#about to read 4, iclass 35, count 0 2006.229.15:38:50.58#ibcon#read 4, iclass 35, count 0 2006.229.15:38:50.58#ibcon#about to read 5, iclass 35, count 0 2006.229.15:38:50.58#ibcon#read 5, iclass 35, count 0 2006.229.15:38:50.58#ibcon#about to read 6, iclass 35, count 0 2006.229.15:38:50.58#ibcon#read 6, iclass 35, count 0 2006.229.15:38:50.58#ibcon#end of sib2, iclass 35, count 0 2006.229.15:38:50.58#ibcon#*after write, iclass 35, count 0 2006.229.15:38:50.58#ibcon#*before return 0, iclass 35, count 0 2006.229.15:38:50.58#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:50.58#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:50.58#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:38:50.58#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:38:50.58$vck44/va=2,7 2006.229.15:38:50.58#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.15:38:50.58#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.15:38:50.58#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:50.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:50.64#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:50.64#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:50.64#ibcon#enter wrdev, iclass 37, count 2 2006.229.15:38:50.64#ibcon#first serial, iclass 37, count 2 2006.229.15:38:50.64#ibcon#enter sib2, iclass 37, count 2 2006.229.15:38:50.64#ibcon#flushed, iclass 37, count 2 2006.229.15:38:50.64#ibcon#about to write, iclass 37, count 2 2006.229.15:38:50.64#ibcon#wrote, iclass 37, count 2 2006.229.15:38:50.64#ibcon#about to read 3, iclass 37, count 2 2006.229.15:38:50.66#ibcon#read 3, iclass 37, count 2 2006.229.15:38:50.66#ibcon#about to read 4, iclass 37, count 2 2006.229.15:38:50.66#ibcon#read 4, iclass 37, count 2 2006.229.15:38:50.66#ibcon#about to read 5, iclass 37, count 2 2006.229.15:38:50.66#ibcon#read 5, iclass 37, count 2 2006.229.15:38:50.66#ibcon#about to read 6, iclass 37, count 2 2006.229.15:38:50.66#ibcon#read 6, iclass 37, count 2 2006.229.15:38:50.66#ibcon#end of sib2, iclass 37, count 2 2006.229.15:38:50.66#ibcon#*mode == 0, iclass 37, count 2 2006.229.15:38:50.66#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.15:38:50.66#ibcon#[25=AT02-07\r\n] 2006.229.15:38:50.66#ibcon#*before write, iclass 37, count 2 2006.229.15:38:50.66#ibcon#enter sib2, iclass 37, count 2 2006.229.15:38:50.66#ibcon#flushed, iclass 37, count 2 2006.229.15:38:50.66#ibcon#about to write, iclass 37, count 2 2006.229.15:38:50.66#ibcon#wrote, iclass 37, count 2 2006.229.15:38:50.66#ibcon#about to read 3, iclass 37, count 2 2006.229.15:38:50.69#ibcon#read 3, iclass 37, count 2 2006.229.15:38:50.69#ibcon#about to read 4, iclass 37, count 2 2006.229.15:38:50.69#ibcon#read 4, iclass 37, count 2 2006.229.15:38:50.69#ibcon#about to read 5, iclass 37, count 2 2006.229.15:38:50.69#ibcon#read 5, iclass 37, count 2 2006.229.15:38:50.69#ibcon#about to read 6, iclass 37, count 2 2006.229.15:38:50.69#ibcon#read 6, iclass 37, count 2 2006.229.15:38:50.69#ibcon#end of sib2, iclass 37, count 2 2006.229.15:38:50.69#ibcon#*after write, iclass 37, count 2 2006.229.15:38:50.69#ibcon#*before return 0, iclass 37, count 2 2006.229.15:38:50.69#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:50.69#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:50.69#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.15:38:50.69#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:50.69#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:50.81#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:50.81#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:50.81#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:38:50.81#ibcon#first serial, iclass 37, count 0 2006.229.15:38:50.81#ibcon#enter sib2, iclass 37, count 0 2006.229.15:38:50.81#ibcon#flushed, iclass 37, count 0 2006.229.15:38:50.81#ibcon#about to write, iclass 37, count 0 2006.229.15:38:50.81#ibcon#wrote, iclass 37, count 0 2006.229.15:38:50.81#ibcon#about to read 3, iclass 37, count 0 2006.229.15:38:50.83#ibcon#read 3, iclass 37, count 0 2006.229.15:38:50.83#ibcon#about to read 4, iclass 37, count 0 2006.229.15:38:50.83#ibcon#read 4, iclass 37, count 0 2006.229.15:38:50.83#ibcon#about to read 5, iclass 37, count 0 2006.229.15:38:50.83#ibcon#read 5, iclass 37, count 0 2006.229.15:38:50.83#ibcon#about to read 6, iclass 37, count 0 2006.229.15:38:50.83#ibcon#read 6, iclass 37, count 0 2006.229.15:38:50.83#ibcon#end of sib2, iclass 37, count 0 2006.229.15:38:50.83#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:38:50.83#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:38:50.83#ibcon#[25=USB\r\n] 2006.229.15:38:50.83#ibcon#*before write, iclass 37, count 0 2006.229.15:38:50.83#ibcon#enter sib2, iclass 37, count 0 2006.229.15:38:50.83#ibcon#flushed, iclass 37, count 0 2006.229.15:38:50.83#ibcon#about to write, iclass 37, count 0 2006.229.15:38:50.83#ibcon#wrote, iclass 37, count 0 2006.229.15:38:50.83#ibcon#about to read 3, iclass 37, count 0 2006.229.15:38:50.86#ibcon#read 3, iclass 37, count 0 2006.229.15:38:50.86#ibcon#about to read 4, iclass 37, count 0 2006.229.15:38:50.86#ibcon#read 4, iclass 37, count 0 2006.229.15:38:50.86#ibcon#about to read 5, iclass 37, count 0 2006.229.15:38:50.86#ibcon#read 5, iclass 37, count 0 2006.229.15:38:50.86#ibcon#about to read 6, iclass 37, count 0 2006.229.15:38:50.86#ibcon#read 6, iclass 37, count 0 2006.229.15:38:50.86#ibcon#end of sib2, iclass 37, count 0 2006.229.15:38:50.86#ibcon#*after write, iclass 37, count 0 2006.229.15:38:50.86#ibcon#*before return 0, iclass 37, count 0 2006.229.15:38:50.86#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:50.86#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:50.86#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:38:50.86#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:38:50.86$vck44/valo=3,564.99 2006.229.15:38:50.86#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:38:50.86#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:38:50.86#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:50.86#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:50.86#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:50.86#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:50.86#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:38:50.86#ibcon#first serial, iclass 39, count 0 2006.229.15:38:50.86#ibcon#enter sib2, iclass 39, count 0 2006.229.15:38:50.86#ibcon#flushed, iclass 39, count 0 2006.229.15:38:50.86#ibcon#about to write, iclass 39, count 0 2006.229.15:38:50.86#ibcon#wrote, iclass 39, count 0 2006.229.15:38:50.86#ibcon#about to read 3, iclass 39, count 0 2006.229.15:38:50.88#ibcon#read 3, iclass 39, count 0 2006.229.15:38:50.88#ibcon#about to read 4, iclass 39, count 0 2006.229.15:38:50.88#ibcon#read 4, iclass 39, count 0 2006.229.15:38:50.88#ibcon#about to read 5, iclass 39, count 0 2006.229.15:38:50.88#ibcon#read 5, iclass 39, count 0 2006.229.15:38:50.88#ibcon#about to read 6, iclass 39, count 0 2006.229.15:38:50.88#ibcon#read 6, iclass 39, count 0 2006.229.15:38:50.88#ibcon#end of sib2, iclass 39, count 0 2006.229.15:38:50.88#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:38:50.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:38:50.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:38:50.88#ibcon#*before write, iclass 39, count 0 2006.229.15:38:50.88#ibcon#enter sib2, iclass 39, count 0 2006.229.15:38:50.88#ibcon#flushed, iclass 39, count 0 2006.229.15:38:50.88#ibcon#about to write, iclass 39, count 0 2006.229.15:38:50.88#ibcon#wrote, iclass 39, count 0 2006.229.15:38:50.88#ibcon#about to read 3, iclass 39, count 0 2006.229.15:38:50.92#ibcon#read 3, iclass 39, count 0 2006.229.15:38:50.92#ibcon#about to read 4, iclass 39, count 0 2006.229.15:38:50.92#ibcon#read 4, iclass 39, count 0 2006.229.15:38:50.92#ibcon#about to read 5, iclass 39, count 0 2006.229.15:38:50.92#ibcon#read 5, iclass 39, count 0 2006.229.15:38:50.92#ibcon#about to read 6, iclass 39, count 0 2006.229.15:38:50.92#ibcon#read 6, iclass 39, count 0 2006.229.15:38:50.92#ibcon#end of sib2, iclass 39, count 0 2006.229.15:38:50.92#ibcon#*after write, iclass 39, count 0 2006.229.15:38:50.92#ibcon#*before return 0, iclass 39, count 0 2006.229.15:38:50.92#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:50.92#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:50.92#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:38:50.92#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:38:50.92$vck44/va=3,6 2006.229.15:38:50.92#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.15:38:50.92#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.15:38:50.92#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:50.92#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:50.98#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:50.98#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:50.98#ibcon#enter wrdev, iclass 3, count 2 2006.229.15:38:50.98#ibcon#first serial, iclass 3, count 2 2006.229.15:38:50.98#ibcon#enter sib2, iclass 3, count 2 2006.229.15:38:50.98#ibcon#flushed, iclass 3, count 2 2006.229.15:38:50.98#ibcon#about to write, iclass 3, count 2 2006.229.15:38:50.98#ibcon#wrote, iclass 3, count 2 2006.229.15:38:50.98#ibcon#about to read 3, iclass 3, count 2 2006.229.15:38:51.00#ibcon#read 3, iclass 3, count 2 2006.229.15:38:51.00#ibcon#about to read 4, iclass 3, count 2 2006.229.15:38:51.00#ibcon#read 4, iclass 3, count 2 2006.229.15:38:51.00#ibcon#about to read 5, iclass 3, count 2 2006.229.15:38:51.00#ibcon#read 5, iclass 3, count 2 2006.229.15:38:51.00#ibcon#about to read 6, iclass 3, count 2 2006.229.15:38:51.00#ibcon#read 6, iclass 3, count 2 2006.229.15:38:51.00#ibcon#end of sib2, iclass 3, count 2 2006.229.15:38:51.00#ibcon#*mode == 0, iclass 3, count 2 2006.229.15:38:51.00#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.15:38:51.00#ibcon#[25=AT03-06\r\n] 2006.229.15:38:51.00#ibcon#*before write, iclass 3, count 2 2006.229.15:38:51.00#ibcon#enter sib2, iclass 3, count 2 2006.229.15:38:51.00#ibcon#flushed, iclass 3, count 2 2006.229.15:38:51.00#ibcon#about to write, iclass 3, count 2 2006.229.15:38:51.00#ibcon#wrote, iclass 3, count 2 2006.229.15:38:51.00#ibcon#about to read 3, iclass 3, count 2 2006.229.15:38:51.03#ibcon#read 3, iclass 3, count 2 2006.229.15:38:51.03#ibcon#about to read 4, iclass 3, count 2 2006.229.15:38:51.03#ibcon#read 4, iclass 3, count 2 2006.229.15:38:51.03#ibcon#about to read 5, iclass 3, count 2 2006.229.15:38:51.03#ibcon#read 5, iclass 3, count 2 2006.229.15:38:51.03#ibcon#about to read 6, iclass 3, count 2 2006.229.15:38:51.03#ibcon#read 6, iclass 3, count 2 2006.229.15:38:51.03#ibcon#end of sib2, iclass 3, count 2 2006.229.15:38:51.03#ibcon#*after write, iclass 3, count 2 2006.229.15:38:51.03#ibcon#*before return 0, iclass 3, count 2 2006.229.15:38:51.03#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:51.03#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:51.03#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.15:38:51.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:51.03#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:51.15#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:51.15#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:51.15#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:38:51.15#ibcon#first serial, iclass 3, count 0 2006.229.15:38:51.15#ibcon#enter sib2, iclass 3, count 0 2006.229.15:38:51.15#ibcon#flushed, iclass 3, count 0 2006.229.15:38:51.15#ibcon#about to write, iclass 3, count 0 2006.229.15:38:51.15#ibcon#wrote, iclass 3, count 0 2006.229.15:38:51.15#ibcon#about to read 3, iclass 3, count 0 2006.229.15:38:51.17#ibcon#read 3, iclass 3, count 0 2006.229.15:38:51.17#ibcon#about to read 4, iclass 3, count 0 2006.229.15:38:51.17#ibcon#read 4, iclass 3, count 0 2006.229.15:38:51.17#ibcon#about to read 5, iclass 3, count 0 2006.229.15:38:51.17#ibcon#read 5, iclass 3, count 0 2006.229.15:38:51.17#ibcon#about to read 6, iclass 3, count 0 2006.229.15:38:51.17#ibcon#read 6, iclass 3, count 0 2006.229.15:38:51.17#ibcon#end of sib2, iclass 3, count 0 2006.229.15:38:51.17#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:38:51.17#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:38:51.17#ibcon#[25=USB\r\n] 2006.229.15:38:51.17#ibcon#*before write, iclass 3, count 0 2006.229.15:38:51.17#ibcon#enter sib2, iclass 3, count 0 2006.229.15:38:51.17#ibcon#flushed, iclass 3, count 0 2006.229.15:38:51.17#ibcon#about to write, iclass 3, count 0 2006.229.15:38:51.17#ibcon#wrote, iclass 3, count 0 2006.229.15:38:51.17#ibcon#about to read 3, iclass 3, count 0 2006.229.15:38:51.20#ibcon#read 3, iclass 3, count 0 2006.229.15:38:51.20#ibcon#about to read 4, iclass 3, count 0 2006.229.15:38:51.20#ibcon#read 4, iclass 3, count 0 2006.229.15:38:51.20#ibcon#about to read 5, iclass 3, count 0 2006.229.15:38:51.20#ibcon#read 5, iclass 3, count 0 2006.229.15:38:51.20#ibcon#about to read 6, iclass 3, count 0 2006.229.15:38:51.20#ibcon#read 6, iclass 3, count 0 2006.229.15:38:51.20#ibcon#end of sib2, iclass 3, count 0 2006.229.15:38:51.20#ibcon#*after write, iclass 3, count 0 2006.229.15:38:51.20#ibcon#*before return 0, iclass 3, count 0 2006.229.15:38:51.20#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:51.20#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:51.20#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:38:51.20#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:38:51.20$vck44/valo=4,624.99 2006.229.15:38:51.20#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.15:38:51.20#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.15:38:51.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:51.20#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:51.20#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:51.20#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:51.20#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:38:51.20#ibcon#first serial, iclass 5, count 0 2006.229.15:38:51.20#ibcon#enter sib2, iclass 5, count 0 2006.229.15:38:51.20#ibcon#flushed, iclass 5, count 0 2006.229.15:38:51.20#ibcon#about to write, iclass 5, count 0 2006.229.15:38:51.20#ibcon#wrote, iclass 5, count 0 2006.229.15:38:51.20#ibcon#about to read 3, iclass 5, count 0 2006.229.15:38:51.22#ibcon#read 3, iclass 5, count 0 2006.229.15:38:51.22#ibcon#about to read 4, iclass 5, count 0 2006.229.15:38:51.22#ibcon#read 4, iclass 5, count 0 2006.229.15:38:51.22#ibcon#about to read 5, iclass 5, count 0 2006.229.15:38:51.22#ibcon#read 5, iclass 5, count 0 2006.229.15:38:51.22#ibcon#about to read 6, iclass 5, count 0 2006.229.15:38:51.22#ibcon#read 6, iclass 5, count 0 2006.229.15:38:51.22#ibcon#end of sib2, iclass 5, count 0 2006.229.15:38:51.22#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:38:51.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:38:51.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:38:51.22#ibcon#*before write, iclass 5, count 0 2006.229.15:38:51.22#ibcon#enter sib2, iclass 5, count 0 2006.229.15:38:51.22#ibcon#flushed, iclass 5, count 0 2006.229.15:38:51.22#ibcon#about to write, iclass 5, count 0 2006.229.15:38:51.22#ibcon#wrote, iclass 5, count 0 2006.229.15:38:51.22#ibcon#about to read 3, iclass 5, count 0 2006.229.15:38:51.26#ibcon#read 3, iclass 5, count 0 2006.229.15:38:51.26#ibcon#about to read 4, iclass 5, count 0 2006.229.15:38:51.26#ibcon#read 4, iclass 5, count 0 2006.229.15:38:51.26#ibcon#about to read 5, iclass 5, count 0 2006.229.15:38:51.26#ibcon#read 5, iclass 5, count 0 2006.229.15:38:51.26#ibcon#about to read 6, iclass 5, count 0 2006.229.15:38:51.26#ibcon#read 6, iclass 5, count 0 2006.229.15:38:51.26#ibcon#end of sib2, iclass 5, count 0 2006.229.15:38:51.26#ibcon#*after write, iclass 5, count 0 2006.229.15:38:51.26#ibcon#*before return 0, iclass 5, count 0 2006.229.15:38:51.26#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:51.26#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:51.26#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:38:51.26#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:38:51.26$vck44/va=4,7 2006.229.15:38:51.26#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.15:38:51.26#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.15:38:51.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:51.26#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:51.32#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:51.32#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:51.32#ibcon#enter wrdev, iclass 7, count 2 2006.229.15:38:51.32#ibcon#first serial, iclass 7, count 2 2006.229.15:38:51.32#ibcon#enter sib2, iclass 7, count 2 2006.229.15:38:51.32#ibcon#flushed, iclass 7, count 2 2006.229.15:38:51.32#ibcon#about to write, iclass 7, count 2 2006.229.15:38:51.32#ibcon#wrote, iclass 7, count 2 2006.229.15:38:51.32#ibcon#about to read 3, iclass 7, count 2 2006.229.15:38:51.34#ibcon#read 3, iclass 7, count 2 2006.229.15:38:51.34#ibcon#about to read 4, iclass 7, count 2 2006.229.15:38:51.34#ibcon#read 4, iclass 7, count 2 2006.229.15:38:51.34#ibcon#about to read 5, iclass 7, count 2 2006.229.15:38:51.34#ibcon#read 5, iclass 7, count 2 2006.229.15:38:51.34#ibcon#about to read 6, iclass 7, count 2 2006.229.15:38:51.34#ibcon#read 6, iclass 7, count 2 2006.229.15:38:51.34#ibcon#end of sib2, iclass 7, count 2 2006.229.15:38:51.34#ibcon#*mode == 0, iclass 7, count 2 2006.229.15:38:51.34#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.15:38:51.34#ibcon#[25=AT04-07\r\n] 2006.229.15:38:51.34#ibcon#*before write, iclass 7, count 2 2006.229.15:38:51.34#ibcon#enter sib2, iclass 7, count 2 2006.229.15:38:51.34#ibcon#flushed, iclass 7, count 2 2006.229.15:38:51.34#ibcon#about to write, iclass 7, count 2 2006.229.15:38:51.34#ibcon#wrote, iclass 7, count 2 2006.229.15:38:51.34#ibcon#about to read 3, iclass 7, count 2 2006.229.15:38:51.37#ibcon#read 3, iclass 7, count 2 2006.229.15:38:51.37#ibcon#about to read 4, iclass 7, count 2 2006.229.15:38:51.37#ibcon#read 4, iclass 7, count 2 2006.229.15:38:51.37#ibcon#about to read 5, iclass 7, count 2 2006.229.15:38:51.37#ibcon#read 5, iclass 7, count 2 2006.229.15:38:51.37#ibcon#about to read 6, iclass 7, count 2 2006.229.15:38:51.37#ibcon#read 6, iclass 7, count 2 2006.229.15:38:51.37#ibcon#end of sib2, iclass 7, count 2 2006.229.15:38:51.37#ibcon#*after write, iclass 7, count 2 2006.229.15:38:51.37#ibcon#*before return 0, iclass 7, count 2 2006.229.15:38:51.37#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:51.37#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:51.37#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.15:38:51.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:51.37#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:51.49#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:51.49#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:51.49#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:38:51.49#ibcon#first serial, iclass 7, count 0 2006.229.15:38:51.49#ibcon#enter sib2, iclass 7, count 0 2006.229.15:38:51.49#ibcon#flushed, iclass 7, count 0 2006.229.15:38:51.49#ibcon#about to write, iclass 7, count 0 2006.229.15:38:51.49#ibcon#wrote, iclass 7, count 0 2006.229.15:38:51.49#ibcon#about to read 3, iclass 7, count 0 2006.229.15:38:51.51#ibcon#read 3, iclass 7, count 0 2006.229.15:38:51.51#ibcon#about to read 4, iclass 7, count 0 2006.229.15:38:51.51#ibcon#read 4, iclass 7, count 0 2006.229.15:38:51.51#ibcon#about to read 5, iclass 7, count 0 2006.229.15:38:51.51#ibcon#read 5, iclass 7, count 0 2006.229.15:38:51.51#ibcon#about to read 6, iclass 7, count 0 2006.229.15:38:51.51#ibcon#read 6, iclass 7, count 0 2006.229.15:38:51.51#ibcon#end of sib2, iclass 7, count 0 2006.229.15:38:51.51#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:38:51.51#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:38:51.51#ibcon#[25=USB\r\n] 2006.229.15:38:51.51#ibcon#*before write, iclass 7, count 0 2006.229.15:38:51.51#ibcon#enter sib2, iclass 7, count 0 2006.229.15:38:51.51#ibcon#flushed, iclass 7, count 0 2006.229.15:38:51.51#ibcon#about to write, iclass 7, count 0 2006.229.15:38:51.51#ibcon#wrote, iclass 7, count 0 2006.229.15:38:51.51#ibcon#about to read 3, iclass 7, count 0 2006.229.15:38:51.54#ibcon#read 3, iclass 7, count 0 2006.229.15:38:51.54#ibcon#about to read 4, iclass 7, count 0 2006.229.15:38:51.54#ibcon#read 4, iclass 7, count 0 2006.229.15:38:51.54#ibcon#about to read 5, iclass 7, count 0 2006.229.15:38:51.54#ibcon#read 5, iclass 7, count 0 2006.229.15:38:51.54#ibcon#about to read 6, iclass 7, count 0 2006.229.15:38:51.54#ibcon#read 6, iclass 7, count 0 2006.229.15:38:51.54#ibcon#end of sib2, iclass 7, count 0 2006.229.15:38:51.54#ibcon#*after write, iclass 7, count 0 2006.229.15:38:51.54#ibcon#*before return 0, iclass 7, count 0 2006.229.15:38:51.54#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:51.54#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:51.54#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:38:51.54#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:38:51.54$vck44/valo=5,734.99 2006.229.15:38:51.54#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.15:38:51.54#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.15:38:51.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:51.54#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:51.54#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:51.54#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:51.54#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:38:51.54#ibcon#first serial, iclass 11, count 0 2006.229.15:38:51.54#ibcon#enter sib2, iclass 11, count 0 2006.229.15:38:51.54#ibcon#flushed, iclass 11, count 0 2006.229.15:38:51.54#ibcon#about to write, iclass 11, count 0 2006.229.15:38:51.54#ibcon#wrote, iclass 11, count 0 2006.229.15:38:51.54#ibcon#about to read 3, iclass 11, count 0 2006.229.15:38:51.56#ibcon#read 3, iclass 11, count 0 2006.229.15:38:51.56#ibcon#about to read 4, iclass 11, count 0 2006.229.15:38:51.56#ibcon#read 4, iclass 11, count 0 2006.229.15:38:51.56#ibcon#about to read 5, iclass 11, count 0 2006.229.15:38:51.56#ibcon#read 5, iclass 11, count 0 2006.229.15:38:51.56#ibcon#about to read 6, iclass 11, count 0 2006.229.15:38:51.56#ibcon#read 6, iclass 11, count 0 2006.229.15:38:51.56#ibcon#end of sib2, iclass 11, count 0 2006.229.15:38:51.56#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:38:51.56#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:38:51.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:38:51.56#ibcon#*before write, iclass 11, count 0 2006.229.15:38:51.56#ibcon#enter sib2, iclass 11, count 0 2006.229.15:38:51.56#ibcon#flushed, iclass 11, count 0 2006.229.15:38:51.56#ibcon#about to write, iclass 11, count 0 2006.229.15:38:51.56#ibcon#wrote, iclass 11, count 0 2006.229.15:38:51.56#ibcon#about to read 3, iclass 11, count 0 2006.229.15:38:51.60#ibcon#read 3, iclass 11, count 0 2006.229.15:38:51.60#ibcon#about to read 4, iclass 11, count 0 2006.229.15:38:51.60#ibcon#read 4, iclass 11, count 0 2006.229.15:38:51.60#ibcon#about to read 5, iclass 11, count 0 2006.229.15:38:51.60#ibcon#read 5, iclass 11, count 0 2006.229.15:38:51.60#ibcon#about to read 6, iclass 11, count 0 2006.229.15:38:51.60#ibcon#read 6, iclass 11, count 0 2006.229.15:38:51.60#ibcon#end of sib2, iclass 11, count 0 2006.229.15:38:51.60#ibcon#*after write, iclass 11, count 0 2006.229.15:38:51.60#ibcon#*before return 0, iclass 11, count 0 2006.229.15:38:51.60#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:51.60#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:51.60#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:38:51.60#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:38:51.60$vck44/va=5,4 2006.229.15:38:51.60#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.15:38:51.60#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.15:38:51.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:51.60#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:51.66#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:51.66#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:51.66#ibcon#enter wrdev, iclass 13, count 2 2006.229.15:38:51.66#ibcon#first serial, iclass 13, count 2 2006.229.15:38:51.66#ibcon#enter sib2, iclass 13, count 2 2006.229.15:38:51.66#ibcon#flushed, iclass 13, count 2 2006.229.15:38:51.66#ibcon#about to write, iclass 13, count 2 2006.229.15:38:51.66#ibcon#wrote, iclass 13, count 2 2006.229.15:38:51.66#ibcon#about to read 3, iclass 13, count 2 2006.229.15:38:51.68#ibcon#read 3, iclass 13, count 2 2006.229.15:38:51.68#ibcon#about to read 4, iclass 13, count 2 2006.229.15:38:51.68#ibcon#read 4, iclass 13, count 2 2006.229.15:38:51.68#ibcon#about to read 5, iclass 13, count 2 2006.229.15:38:51.68#ibcon#read 5, iclass 13, count 2 2006.229.15:38:51.68#ibcon#about to read 6, iclass 13, count 2 2006.229.15:38:51.68#ibcon#read 6, iclass 13, count 2 2006.229.15:38:51.68#ibcon#end of sib2, iclass 13, count 2 2006.229.15:38:51.68#ibcon#*mode == 0, iclass 13, count 2 2006.229.15:38:51.68#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.15:38:51.68#ibcon#[25=AT05-04\r\n] 2006.229.15:38:51.68#ibcon#*before write, iclass 13, count 2 2006.229.15:38:51.68#ibcon#enter sib2, iclass 13, count 2 2006.229.15:38:51.68#ibcon#flushed, iclass 13, count 2 2006.229.15:38:51.68#ibcon#about to write, iclass 13, count 2 2006.229.15:38:51.68#ibcon#wrote, iclass 13, count 2 2006.229.15:38:51.68#ibcon#about to read 3, iclass 13, count 2 2006.229.15:38:51.71#ibcon#read 3, iclass 13, count 2 2006.229.15:38:51.71#ibcon#about to read 4, iclass 13, count 2 2006.229.15:38:51.71#ibcon#read 4, iclass 13, count 2 2006.229.15:38:51.71#ibcon#about to read 5, iclass 13, count 2 2006.229.15:38:51.71#ibcon#read 5, iclass 13, count 2 2006.229.15:38:51.71#ibcon#about to read 6, iclass 13, count 2 2006.229.15:38:51.71#ibcon#read 6, iclass 13, count 2 2006.229.15:38:51.71#ibcon#end of sib2, iclass 13, count 2 2006.229.15:38:51.71#ibcon#*after write, iclass 13, count 2 2006.229.15:38:51.71#ibcon#*before return 0, iclass 13, count 2 2006.229.15:38:51.71#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:51.71#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:51.71#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.15:38:51.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:51.71#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:51.83#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:51.83#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:51.83#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:38:51.83#ibcon#first serial, iclass 13, count 0 2006.229.15:38:51.83#ibcon#enter sib2, iclass 13, count 0 2006.229.15:38:51.83#ibcon#flushed, iclass 13, count 0 2006.229.15:38:51.83#ibcon#about to write, iclass 13, count 0 2006.229.15:38:51.83#ibcon#wrote, iclass 13, count 0 2006.229.15:38:51.83#ibcon#about to read 3, iclass 13, count 0 2006.229.15:38:51.85#ibcon#read 3, iclass 13, count 0 2006.229.15:38:51.85#ibcon#about to read 4, iclass 13, count 0 2006.229.15:38:51.85#ibcon#read 4, iclass 13, count 0 2006.229.15:38:51.85#ibcon#about to read 5, iclass 13, count 0 2006.229.15:38:51.85#ibcon#read 5, iclass 13, count 0 2006.229.15:38:51.85#ibcon#about to read 6, iclass 13, count 0 2006.229.15:38:51.85#ibcon#read 6, iclass 13, count 0 2006.229.15:38:51.85#ibcon#end of sib2, iclass 13, count 0 2006.229.15:38:51.85#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:38:51.85#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:38:51.85#ibcon#[25=USB\r\n] 2006.229.15:38:51.85#ibcon#*before write, iclass 13, count 0 2006.229.15:38:51.85#ibcon#enter sib2, iclass 13, count 0 2006.229.15:38:51.85#ibcon#flushed, iclass 13, count 0 2006.229.15:38:51.85#ibcon#about to write, iclass 13, count 0 2006.229.15:38:51.85#ibcon#wrote, iclass 13, count 0 2006.229.15:38:51.85#ibcon#about to read 3, iclass 13, count 0 2006.229.15:38:51.88#ibcon#read 3, iclass 13, count 0 2006.229.15:38:51.88#ibcon#about to read 4, iclass 13, count 0 2006.229.15:38:51.88#ibcon#read 4, iclass 13, count 0 2006.229.15:38:51.88#ibcon#about to read 5, iclass 13, count 0 2006.229.15:38:51.88#ibcon#read 5, iclass 13, count 0 2006.229.15:38:51.88#ibcon#about to read 6, iclass 13, count 0 2006.229.15:38:51.88#ibcon#read 6, iclass 13, count 0 2006.229.15:38:51.88#ibcon#end of sib2, iclass 13, count 0 2006.229.15:38:51.88#ibcon#*after write, iclass 13, count 0 2006.229.15:38:51.88#ibcon#*before return 0, iclass 13, count 0 2006.229.15:38:51.88#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:51.88#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:51.88#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:38:51.88#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:38:51.88$vck44/valo=6,814.99 2006.229.15:38:51.88#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:38:51.88#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:38:51.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:51.88#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:51.88#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:51.88#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:51.88#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:38:51.88#ibcon#first serial, iclass 15, count 0 2006.229.15:38:51.88#ibcon#enter sib2, iclass 15, count 0 2006.229.15:38:51.88#ibcon#flushed, iclass 15, count 0 2006.229.15:38:51.88#ibcon#about to write, iclass 15, count 0 2006.229.15:38:51.88#ibcon#wrote, iclass 15, count 0 2006.229.15:38:51.88#ibcon#about to read 3, iclass 15, count 0 2006.229.15:38:51.90#ibcon#read 3, iclass 15, count 0 2006.229.15:38:51.90#ibcon#about to read 4, iclass 15, count 0 2006.229.15:38:51.90#ibcon#read 4, iclass 15, count 0 2006.229.15:38:51.90#ibcon#about to read 5, iclass 15, count 0 2006.229.15:38:51.90#ibcon#read 5, iclass 15, count 0 2006.229.15:38:51.90#ibcon#about to read 6, iclass 15, count 0 2006.229.15:38:51.90#ibcon#read 6, iclass 15, count 0 2006.229.15:38:51.90#ibcon#end of sib2, iclass 15, count 0 2006.229.15:38:51.90#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:38:51.90#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:38:51.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:38:51.90#ibcon#*before write, iclass 15, count 0 2006.229.15:38:51.90#ibcon#enter sib2, iclass 15, count 0 2006.229.15:38:51.90#ibcon#flushed, iclass 15, count 0 2006.229.15:38:51.90#ibcon#about to write, iclass 15, count 0 2006.229.15:38:51.90#ibcon#wrote, iclass 15, count 0 2006.229.15:38:51.90#ibcon#about to read 3, iclass 15, count 0 2006.229.15:38:51.94#ibcon#read 3, iclass 15, count 0 2006.229.15:38:51.94#ibcon#about to read 4, iclass 15, count 0 2006.229.15:38:51.94#ibcon#read 4, iclass 15, count 0 2006.229.15:38:51.94#ibcon#about to read 5, iclass 15, count 0 2006.229.15:38:51.94#ibcon#read 5, iclass 15, count 0 2006.229.15:38:51.94#ibcon#about to read 6, iclass 15, count 0 2006.229.15:38:51.94#ibcon#read 6, iclass 15, count 0 2006.229.15:38:51.94#ibcon#end of sib2, iclass 15, count 0 2006.229.15:38:51.94#ibcon#*after write, iclass 15, count 0 2006.229.15:38:51.94#ibcon#*before return 0, iclass 15, count 0 2006.229.15:38:51.94#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:51.94#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:51.94#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:38:51.94#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:38:51.94$vck44/va=6,4 2006.229.15:38:51.94#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.15:38:51.94#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.15:38:51.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:51.94#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:52.00#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:52.00#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:52.00#ibcon#enter wrdev, iclass 17, count 2 2006.229.15:38:52.00#ibcon#first serial, iclass 17, count 2 2006.229.15:38:52.00#ibcon#enter sib2, iclass 17, count 2 2006.229.15:38:52.00#ibcon#flushed, iclass 17, count 2 2006.229.15:38:52.00#ibcon#about to write, iclass 17, count 2 2006.229.15:38:52.00#ibcon#wrote, iclass 17, count 2 2006.229.15:38:52.00#ibcon#about to read 3, iclass 17, count 2 2006.229.15:38:52.02#ibcon#read 3, iclass 17, count 2 2006.229.15:38:52.02#ibcon#about to read 4, iclass 17, count 2 2006.229.15:38:52.02#ibcon#read 4, iclass 17, count 2 2006.229.15:38:52.02#ibcon#about to read 5, iclass 17, count 2 2006.229.15:38:52.02#ibcon#read 5, iclass 17, count 2 2006.229.15:38:52.02#ibcon#about to read 6, iclass 17, count 2 2006.229.15:38:52.02#ibcon#read 6, iclass 17, count 2 2006.229.15:38:52.02#ibcon#end of sib2, iclass 17, count 2 2006.229.15:38:52.02#ibcon#*mode == 0, iclass 17, count 2 2006.229.15:38:52.02#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.15:38:52.02#ibcon#[25=AT06-04\r\n] 2006.229.15:38:52.02#ibcon#*before write, iclass 17, count 2 2006.229.15:38:52.02#ibcon#enter sib2, iclass 17, count 2 2006.229.15:38:52.02#ibcon#flushed, iclass 17, count 2 2006.229.15:38:52.02#ibcon#about to write, iclass 17, count 2 2006.229.15:38:52.02#ibcon#wrote, iclass 17, count 2 2006.229.15:38:52.02#ibcon#about to read 3, iclass 17, count 2 2006.229.15:38:52.05#ibcon#read 3, iclass 17, count 2 2006.229.15:38:52.05#ibcon#about to read 4, iclass 17, count 2 2006.229.15:38:52.05#ibcon#read 4, iclass 17, count 2 2006.229.15:38:52.05#ibcon#about to read 5, iclass 17, count 2 2006.229.15:38:52.05#ibcon#read 5, iclass 17, count 2 2006.229.15:38:52.05#ibcon#about to read 6, iclass 17, count 2 2006.229.15:38:52.05#ibcon#read 6, iclass 17, count 2 2006.229.15:38:52.05#ibcon#end of sib2, iclass 17, count 2 2006.229.15:38:52.05#ibcon#*after write, iclass 17, count 2 2006.229.15:38:52.05#ibcon#*before return 0, iclass 17, count 2 2006.229.15:38:52.05#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:52.05#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:52.05#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.15:38:52.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:52.05#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:52.17#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:52.17#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:52.17#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:38:52.17#ibcon#first serial, iclass 17, count 0 2006.229.15:38:52.17#ibcon#enter sib2, iclass 17, count 0 2006.229.15:38:52.17#ibcon#flushed, iclass 17, count 0 2006.229.15:38:52.17#ibcon#about to write, iclass 17, count 0 2006.229.15:38:52.17#ibcon#wrote, iclass 17, count 0 2006.229.15:38:52.17#ibcon#about to read 3, iclass 17, count 0 2006.229.15:38:52.19#ibcon#read 3, iclass 17, count 0 2006.229.15:38:52.19#ibcon#about to read 4, iclass 17, count 0 2006.229.15:38:52.19#ibcon#read 4, iclass 17, count 0 2006.229.15:38:52.19#ibcon#about to read 5, iclass 17, count 0 2006.229.15:38:52.19#ibcon#read 5, iclass 17, count 0 2006.229.15:38:52.19#ibcon#about to read 6, iclass 17, count 0 2006.229.15:38:52.19#ibcon#read 6, iclass 17, count 0 2006.229.15:38:52.19#ibcon#end of sib2, iclass 17, count 0 2006.229.15:38:52.19#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:38:52.19#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:38:52.19#ibcon#[25=USB\r\n] 2006.229.15:38:52.19#ibcon#*before write, iclass 17, count 0 2006.229.15:38:52.19#ibcon#enter sib2, iclass 17, count 0 2006.229.15:38:52.19#ibcon#flushed, iclass 17, count 0 2006.229.15:38:52.19#ibcon#about to write, iclass 17, count 0 2006.229.15:38:52.19#ibcon#wrote, iclass 17, count 0 2006.229.15:38:52.19#ibcon#about to read 3, iclass 17, count 0 2006.229.15:38:52.22#ibcon#read 3, iclass 17, count 0 2006.229.15:38:52.22#ibcon#about to read 4, iclass 17, count 0 2006.229.15:38:52.22#ibcon#read 4, iclass 17, count 0 2006.229.15:38:52.22#ibcon#about to read 5, iclass 17, count 0 2006.229.15:38:52.22#ibcon#read 5, iclass 17, count 0 2006.229.15:38:52.22#ibcon#about to read 6, iclass 17, count 0 2006.229.15:38:52.22#ibcon#read 6, iclass 17, count 0 2006.229.15:38:52.22#ibcon#end of sib2, iclass 17, count 0 2006.229.15:38:52.22#ibcon#*after write, iclass 17, count 0 2006.229.15:38:52.22#ibcon#*before return 0, iclass 17, count 0 2006.229.15:38:52.22#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:52.22#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:52.22#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:38:52.22#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:38:52.22$vck44/valo=7,864.99 2006.229.15:38:52.22#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.15:38:52.22#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.15:38:52.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:52.22#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:52.22#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:52.22#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:52.22#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:38:52.22#ibcon#first serial, iclass 19, count 0 2006.229.15:38:52.22#ibcon#enter sib2, iclass 19, count 0 2006.229.15:38:52.22#ibcon#flushed, iclass 19, count 0 2006.229.15:38:52.22#ibcon#about to write, iclass 19, count 0 2006.229.15:38:52.22#ibcon#wrote, iclass 19, count 0 2006.229.15:38:52.22#ibcon#about to read 3, iclass 19, count 0 2006.229.15:38:52.24#ibcon#read 3, iclass 19, count 0 2006.229.15:38:52.24#ibcon#about to read 4, iclass 19, count 0 2006.229.15:38:52.24#ibcon#read 4, iclass 19, count 0 2006.229.15:38:52.24#ibcon#about to read 5, iclass 19, count 0 2006.229.15:38:52.24#ibcon#read 5, iclass 19, count 0 2006.229.15:38:52.24#ibcon#about to read 6, iclass 19, count 0 2006.229.15:38:52.24#ibcon#read 6, iclass 19, count 0 2006.229.15:38:52.24#ibcon#end of sib2, iclass 19, count 0 2006.229.15:38:52.24#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:38:52.24#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:38:52.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:38:52.24#ibcon#*before write, iclass 19, count 0 2006.229.15:38:52.24#ibcon#enter sib2, iclass 19, count 0 2006.229.15:38:52.24#ibcon#flushed, iclass 19, count 0 2006.229.15:38:52.24#ibcon#about to write, iclass 19, count 0 2006.229.15:38:52.24#ibcon#wrote, iclass 19, count 0 2006.229.15:38:52.24#ibcon#about to read 3, iclass 19, count 0 2006.229.15:38:52.28#ibcon#read 3, iclass 19, count 0 2006.229.15:38:52.28#ibcon#about to read 4, iclass 19, count 0 2006.229.15:38:52.28#ibcon#read 4, iclass 19, count 0 2006.229.15:38:52.28#ibcon#about to read 5, iclass 19, count 0 2006.229.15:38:52.28#ibcon#read 5, iclass 19, count 0 2006.229.15:38:52.28#ibcon#about to read 6, iclass 19, count 0 2006.229.15:38:52.28#ibcon#read 6, iclass 19, count 0 2006.229.15:38:52.28#ibcon#end of sib2, iclass 19, count 0 2006.229.15:38:52.28#ibcon#*after write, iclass 19, count 0 2006.229.15:38:52.28#ibcon#*before return 0, iclass 19, count 0 2006.229.15:38:52.28#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:52.28#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:52.28#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:38:52.28#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:38:52.28$vck44/va=7,5 2006.229.15:38:52.28#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.15:38:52.28#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.15:38:52.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:52.28#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:52.34#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:52.34#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:52.34#ibcon#enter wrdev, iclass 21, count 2 2006.229.15:38:52.34#ibcon#first serial, iclass 21, count 2 2006.229.15:38:52.34#ibcon#enter sib2, iclass 21, count 2 2006.229.15:38:52.34#ibcon#flushed, iclass 21, count 2 2006.229.15:38:52.34#ibcon#about to write, iclass 21, count 2 2006.229.15:38:52.34#ibcon#wrote, iclass 21, count 2 2006.229.15:38:52.34#ibcon#about to read 3, iclass 21, count 2 2006.229.15:38:52.36#ibcon#read 3, iclass 21, count 2 2006.229.15:38:52.36#ibcon#about to read 4, iclass 21, count 2 2006.229.15:38:52.36#ibcon#read 4, iclass 21, count 2 2006.229.15:38:52.36#ibcon#about to read 5, iclass 21, count 2 2006.229.15:38:52.36#ibcon#read 5, iclass 21, count 2 2006.229.15:38:52.36#ibcon#about to read 6, iclass 21, count 2 2006.229.15:38:52.36#ibcon#read 6, iclass 21, count 2 2006.229.15:38:52.36#ibcon#end of sib2, iclass 21, count 2 2006.229.15:38:52.36#ibcon#*mode == 0, iclass 21, count 2 2006.229.15:38:52.36#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.15:38:52.36#ibcon#[25=AT07-05\r\n] 2006.229.15:38:52.36#ibcon#*before write, iclass 21, count 2 2006.229.15:38:52.36#ibcon#enter sib2, iclass 21, count 2 2006.229.15:38:52.36#ibcon#flushed, iclass 21, count 2 2006.229.15:38:52.36#ibcon#about to write, iclass 21, count 2 2006.229.15:38:52.36#ibcon#wrote, iclass 21, count 2 2006.229.15:38:52.36#ibcon#about to read 3, iclass 21, count 2 2006.229.15:38:52.39#ibcon#read 3, iclass 21, count 2 2006.229.15:38:52.39#ibcon#about to read 4, iclass 21, count 2 2006.229.15:38:52.39#ibcon#read 4, iclass 21, count 2 2006.229.15:38:52.39#ibcon#about to read 5, iclass 21, count 2 2006.229.15:38:52.39#ibcon#read 5, iclass 21, count 2 2006.229.15:38:52.39#ibcon#about to read 6, iclass 21, count 2 2006.229.15:38:52.39#ibcon#read 6, iclass 21, count 2 2006.229.15:38:52.39#ibcon#end of sib2, iclass 21, count 2 2006.229.15:38:52.39#ibcon#*after write, iclass 21, count 2 2006.229.15:38:52.39#ibcon#*before return 0, iclass 21, count 2 2006.229.15:38:52.39#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:52.39#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:52.39#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.15:38:52.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:52.39#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:52.51#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:52.51#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:52.51#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:38:52.51#ibcon#first serial, iclass 21, count 0 2006.229.15:38:52.51#ibcon#enter sib2, iclass 21, count 0 2006.229.15:38:52.51#ibcon#flushed, iclass 21, count 0 2006.229.15:38:52.51#ibcon#about to write, iclass 21, count 0 2006.229.15:38:52.51#ibcon#wrote, iclass 21, count 0 2006.229.15:38:52.51#ibcon#about to read 3, iclass 21, count 0 2006.229.15:38:52.53#ibcon#read 3, iclass 21, count 0 2006.229.15:38:52.53#ibcon#about to read 4, iclass 21, count 0 2006.229.15:38:52.53#ibcon#read 4, iclass 21, count 0 2006.229.15:38:52.53#ibcon#about to read 5, iclass 21, count 0 2006.229.15:38:52.53#ibcon#read 5, iclass 21, count 0 2006.229.15:38:52.53#ibcon#about to read 6, iclass 21, count 0 2006.229.15:38:52.53#ibcon#read 6, iclass 21, count 0 2006.229.15:38:52.53#ibcon#end of sib2, iclass 21, count 0 2006.229.15:38:52.53#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:38:52.53#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:38:52.53#ibcon#[25=USB\r\n] 2006.229.15:38:52.53#ibcon#*before write, iclass 21, count 0 2006.229.15:38:52.53#ibcon#enter sib2, iclass 21, count 0 2006.229.15:38:52.53#ibcon#flushed, iclass 21, count 0 2006.229.15:38:52.53#ibcon#about to write, iclass 21, count 0 2006.229.15:38:52.53#ibcon#wrote, iclass 21, count 0 2006.229.15:38:52.53#ibcon#about to read 3, iclass 21, count 0 2006.229.15:38:52.56#ibcon#read 3, iclass 21, count 0 2006.229.15:38:52.56#ibcon#about to read 4, iclass 21, count 0 2006.229.15:38:52.56#ibcon#read 4, iclass 21, count 0 2006.229.15:38:52.56#ibcon#about to read 5, iclass 21, count 0 2006.229.15:38:52.56#ibcon#read 5, iclass 21, count 0 2006.229.15:38:52.56#ibcon#about to read 6, iclass 21, count 0 2006.229.15:38:52.56#ibcon#read 6, iclass 21, count 0 2006.229.15:38:52.56#ibcon#end of sib2, iclass 21, count 0 2006.229.15:38:52.56#ibcon#*after write, iclass 21, count 0 2006.229.15:38:52.56#ibcon#*before return 0, iclass 21, count 0 2006.229.15:38:52.56#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:52.56#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:52.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:38:52.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:38:52.56$vck44/valo=8,884.99 2006.229.15:38:52.56#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.15:38:52.56#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.15:38:52.56#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:52.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:52.56#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:52.56#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:52.56#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:38:52.56#ibcon#first serial, iclass 23, count 0 2006.229.15:38:52.56#ibcon#enter sib2, iclass 23, count 0 2006.229.15:38:52.56#ibcon#flushed, iclass 23, count 0 2006.229.15:38:52.56#ibcon#about to write, iclass 23, count 0 2006.229.15:38:52.56#ibcon#wrote, iclass 23, count 0 2006.229.15:38:52.56#ibcon#about to read 3, iclass 23, count 0 2006.229.15:38:52.58#ibcon#read 3, iclass 23, count 0 2006.229.15:38:52.58#ibcon#about to read 4, iclass 23, count 0 2006.229.15:38:52.58#ibcon#read 4, iclass 23, count 0 2006.229.15:38:52.58#ibcon#about to read 5, iclass 23, count 0 2006.229.15:38:52.58#ibcon#read 5, iclass 23, count 0 2006.229.15:38:52.58#ibcon#about to read 6, iclass 23, count 0 2006.229.15:38:52.58#ibcon#read 6, iclass 23, count 0 2006.229.15:38:52.58#ibcon#end of sib2, iclass 23, count 0 2006.229.15:38:52.58#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:38:52.58#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:38:52.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:38:52.58#ibcon#*before write, iclass 23, count 0 2006.229.15:38:52.58#ibcon#enter sib2, iclass 23, count 0 2006.229.15:38:52.58#ibcon#flushed, iclass 23, count 0 2006.229.15:38:52.58#ibcon#about to write, iclass 23, count 0 2006.229.15:38:52.58#ibcon#wrote, iclass 23, count 0 2006.229.15:38:52.58#ibcon#about to read 3, iclass 23, count 0 2006.229.15:38:52.62#ibcon#read 3, iclass 23, count 0 2006.229.15:38:52.62#ibcon#about to read 4, iclass 23, count 0 2006.229.15:38:52.62#ibcon#read 4, iclass 23, count 0 2006.229.15:38:52.62#ibcon#about to read 5, iclass 23, count 0 2006.229.15:38:52.62#ibcon#read 5, iclass 23, count 0 2006.229.15:38:52.62#ibcon#about to read 6, iclass 23, count 0 2006.229.15:38:52.62#ibcon#read 6, iclass 23, count 0 2006.229.15:38:52.62#ibcon#end of sib2, iclass 23, count 0 2006.229.15:38:52.62#ibcon#*after write, iclass 23, count 0 2006.229.15:38:52.62#ibcon#*before return 0, iclass 23, count 0 2006.229.15:38:52.62#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:52.62#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:52.62#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:38:52.62#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:38:52.62$vck44/va=8,6 2006.229.15:38:52.62#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.15:38:52.62#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.15:38:52.62#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:52.62#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:38:52.68#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:38:52.68#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:38:52.68#ibcon#enter wrdev, iclass 25, count 2 2006.229.15:38:52.68#ibcon#first serial, iclass 25, count 2 2006.229.15:38:52.68#ibcon#enter sib2, iclass 25, count 2 2006.229.15:38:52.68#ibcon#flushed, iclass 25, count 2 2006.229.15:38:52.68#ibcon#about to write, iclass 25, count 2 2006.229.15:38:52.68#ibcon#wrote, iclass 25, count 2 2006.229.15:38:52.68#ibcon#about to read 3, iclass 25, count 2 2006.229.15:38:52.70#ibcon#read 3, iclass 25, count 2 2006.229.15:38:52.70#ibcon#about to read 4, iclass 25, count 2 2006.229.15:38:52.70#ibcon#read 4, iclass 25, count 2 2006.229.15:38:52.70#ibcon#about to read 5, iclass 25, count 2 2006.229.15:38:52.70#ibcon#read 5, iclass 25, count 2 2006.229.15:38:52.70#ibcon#about to read 6, iclass 25, count 2 2006.229.15:38:52.70#ibcon#read 6, iclass 25, count 2 2006.229.15:38:52.70#ibcon#end of sib2, iclass 25, count 2 2006.229.15:38:52.70#ibcon#*mode == 0, iclass 25, count 2 2006.229.15:38:52.70#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.15:38:52.70#ibcon#[25=AT08-06\r\n] 2006.229.15:38:52.70#ibcon#*before write, iclass 25, count 2 2006.229.15:38:52.70#ibcon#enter sib2, iclass 25, count 2 2006.229.15:38:52.70#ibcon#flushed, iclass 25, count 2 2006.229.15:38:52.70#ibcon#about to write, iclass 25, count 2 2006.229.15:38:52.70#ibcon#wrote, iclass 25, count 2 2006.229.15:38:52.70#ibcon#about to read 3, iclass 25, count 2 2006.229.15:38:52.73#ibcon#read 3, iclass 25, count 2 2006.229.15:38:52.73#ibcon#about to read 4, iclass 25, count 2 2006.229.15:38:52.73#ibcon#read 4, iclass 25, count 2 2006.229.15:38:52.73#ibcon#about to read 5, iclass 25, count 2 2006.229.15:38:52.73#ibcon#read 5, iclass 25, count 2 2006.229.15:38:52.73#ibcon#about to read 6, iclass 25, count 2 2006.229.15:38:52.73#ibcon#read 6, iclass 25, count 2 2006.229.15:38:52.73#ibcon#end of sib2, iclass 25, count 2 2006.229.15:38:52.73#ibcon#*after write, iclass 25, count 2 2006.229.15:38:52.73#ibcon#*before return 0, iclass 25, count 2 2006.229.15:38:52.73#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:38:52.73#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:38:52.73#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.15:38:52.73#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:52.73#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:38:52.85#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:38:52.85#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:38:52.85#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:38:52.85#ibcon#first serial, iclass 25, count 0 2006.229.15:38:52.85#ibcon#enter sib2, iclass 25, count 0 2006.229.15:38:52.85#ibcon#flushed, iclass 25, count 0 2006.229.15:38:52.85#ibcon#about to write, iclass 25, count 0 2006.229.15:38:52.85#ibcon#wrote, iclass 25, count 0 2006.229.15:38:52.85#ibcon#about to read 3, iclass 25, count 0 2006.229.15:38:52.87#ibcon#read 3, iclass 25, count 0 2006.229.15:38:52.87#ibcon#about to read 4, iclass 25, count 0 2006.229.15:38:52.87#ibcon#read 4, iclass 25, count 0 2006.229.15:38:52.87#ibcon#about to read 5, iclass 25, count 0 2006.229.15:38:52.87#ibcon#read 5, iclass 25, count 0 2006.229.15:38:52.87#ibcon#about to read 6, iclass 25, count 0 2006.229.15:38:52.87#ibcon#read 6, iclass 25, count 0 2006.229.15:38:52.87#ibcon#end of sib2, iclass 25, count 0 2006.229.15:38:52.87#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:38:52.87#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:38:52.87#ibcon#[25=USB\r\n] 2006.229.15:38:52.87#ibcon#*before write, iclass 25, count 0 2006.229.15:38:52.87#ibcon#enter sib2, iclass 25, count 0 2006.229.15:38:52.87#ibcon#flushed, iclass 25, count 0 2006.229.15:38:52.87#ibcon#about to write, iclass 25, count 0 2006.229.15:38:52.87#ibcon#wrote, iclass 25, count 0 2006.229.15:38:52.87#ibcon#about to read 3, iclass 25, count 0 2006.229.15:38:52.90#ibcon#read 3, iclass 25, count 0 2006.229.15:38:52.90#ibcon#about to read 4, iclass 25, count 0 2006.229.15:38:52.90#ibcon#read 4, iclass 25, count 0 2006.229.15:38:52.90#ibcon#about to read 5, iclass 25, count 0 2006.229.15:38:52.90#ibcon#read 5, iclass 25, count 0 2006.229.15:38:52.90#ibcon#about to read 6, iclass 25, count 0 2006.229.15:38:52.90#ibcon#read 6, iclass 25, count 0 2006.229.15:38:52.90#ibcon#end of sib2, iclass 25, count 0 2006.229.15:38:52.90#ibcon#*after write, iclass 25, count 0 2006.229.15:38:52.90#ibcon#*before return 0, iclass 25, count 0 2006.229.15:38:52.90#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:38:52.90#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:38:52.90#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:38:52.90#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:38:52.90$vck44/vblo=1,629.99 2006.229.15:38:52.90#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.15:38:52.90#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.15:38:52.90#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:52.90#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:38:52.90#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:38:52.90#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:38:52.90#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:38:52.90#ibcon#first serial, iclass 27, count 0 2006.229.15:38:52.90#ibcon#enter sib2, iclass 27, count 0 2006.229.15:38:52.90#ibcon#flushed, iclass 27, count 0 2006.229.15:38:52.90#ibcon#about to write, iclass 27, count 0 2006.229.15:38:52.90#ibcon#wrote, iclass 27, count 0 2006.229.15:38:52.90#ibcon#about to read 3, iclass 27, count 0 2006.229.15:38:52.92#ibcon#read 3, iclass 27, count 0 2006.229.15:38:52.92#ibcon#about to read 4, iclass 27, count 0 2006.229.15:38:52.92#ibcon#read 4, iclass 27, count 0 2006.229.15:38:52.92#ibcon#about to read 5, iclass 27, count 0 2006.229.15:38:52.92#ibcon#read 5, iclass 27, count 0 2006.229.15:38:52.92#ibcon#about to read 6, iclass 27, count 0 2006.229.15:38:52.92#ibcon#read 6, iclass 27, count 0 2006.229.15:38:52.92#ibcon#end of sib2, iclass 27, count 0 2006.229.15:38:52.92#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:38:52.92#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:38:52.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:38:52.92#ibcon#*before write, iclass 27, count 0 2006.229.15:38:52.92#ibcon#enter sib2, iclass 27, count 0 2006.229.15:38:52.92#ibcon#flushed, iclass 27, count 0 2006.229.15:38:52.92#ibcon#about to write, iclass 27, count 0 2006.229.15:38:52.92#ibcon#wrote, iclass 27, count 0 2006.229.15:38:52.92#ibcon#about to read 3, iclass 27, count 0 2006.229.15:38:52.96#ibcon#read 3, iclass 27, count 0 2006.229.15:38:52.96#ibcon#about to read 4, iclass 27, count 0 2006.229.15:38:52.96#ibcon#read 4, iclass 27, count 0 2006.229.15:38:52.96#ibcon#about to read 5, iclass 27, count 0 2006.229.15:38:52.96#ibcon#read 5, iclass 27, count 0 2006.229.15:38:52.96#ibcon#about to read 6, iclass 27, count 0 2006.229.15:38:52.96#ibcon#read 6, iclass 27, count 0 2006.229.15:38:52.96#ibcon#end of sib2, iclass 27, count 0 2006.229.15:38:52.96#ibcon#*after write, iclass 27, count 0 2006.229.15:38:52.96#ibcon#*before return 0, iclass 27, count 0 2006.229.15:38:52.96#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:38:52.96#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:38:52.96#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:38:52.96#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:38:52.96$vck44/vb=1,4 2006.229.15:38:52.96#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.15:38:52.96#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.15:38:52.96#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:52.96#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:38:52.96#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:38:52.96#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:38:52.96#ibcon#enter wrdev, iclass 29, count 2 2006.229.15:38:52.96#ibcon#first serial, iclass 29, count 2 2006.229.15:38:52.96#ibcon#enter sib2, iclass 29, count 2 2006.229.15:38:52.96#ibcon#flushed, iclass 29, count 2 2006.229.15:38:52.96#ibcon#about to write, iclass 29, count 2 2006.229.15:38:52.96#ibcon#wrote, iclass 29, count 2 2006.229.15:38:52.96#ibcon#about to read 3, iclass 29, count 2 2006.229.15:38:52.98#ibcon#read 3, iclass 29, count 2 2006.229.15:38:52.98#ibcon#about to read 4, iclass 29, count 2 2006.229.15:38:52.98#ibcon#read 4, iclass 29, count 2 2006.229.15:38:52.98#ibcon#about to read 5, iclass 29, count 2 2006.229.15:38:52.98#ibcon#read 5, iclass 29, count 2 2006.229.15:38:52.98#ibcon#about to read 6, iclass 29, count 2 2006.229.15:38:52.98#ibcon#read 6, iclass 29, count 2 2006.229.15:38:52.98#ibcon#end of sib2, iclass 29, count 2 2006.229.15:38:52.98#ibcon#*mode == 0, iclass 29, count 2 2006.229.15:38:52.98#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.15:38:52.98#ibcon#[27=AT01-04\r\n] 2006.229.15:38:52.98#ibcon#*before write, iclass 29, count 2 2006.229.15:38:52.98#ibcon#enter sib2, iclass 29, count 2 2006.229.15:38:52.98#ibcon#flushed, iclass 29, count 2 2006.229.15:38:52.98#ibcon#about to write, iclass 29, count 2 2006.229.15:38:52.98#ibcon#wrote, iclass 29, count 2 2006.229.15:38:52.98#ibcon#about to read 3, iclass 29, count 2 2006.229.15:38:53.01#ibcon#read 3, iclass 29, count 2 2006.229.15:38:53.01#ibcon#about to read 4, iclass 29, count 2 2006.229.15:38:53.01#ibcon#read 4, iclass 29, count 2 2006.229.15:38:53.01#ibcon#about to read 5, iclass 29, count 2 2006.229.15:38:53.01#ibcon#read 5, iclass 29, count 2 2006.229.15:38:53.01#ibcon#about to read 6, iclass 29, count 2 2006.229.15:38:53.01#ibcon#read 6, iclass 29, count 2 2006.229.15:38:53.01#ibcon#end of sib2, iclass 29, count 2 2006.229.15:38:53.01#ibcon#*after write, iclass 29, count 2 2006.229.15:38:53.01#ibcon#*before return 0, iclass 29, count 2 2006.229.15:38:53.01#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:38:53.01#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:38:53.01#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.15:38:53.01#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:53.01#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:38:53.13#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:38:53.13#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:38:53.13#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:38:53.13#ibcon#first serial, iclass 29, count 0 2006.229.15:38:53.13#ibcon#enter sib2, iclass 29, count 0 2006.229.15:38:53.13#ibcon#flushed, iclass 29, count 0 2006.229.15:38:53.13#ibcon#about to write, iclass 29, count 0 2006.229.15:38:53.13#ibcon#wrote, iclass 29, count 0 2006.229.15:38:53.13#ibcon#about to read 3, iclass 29, count 0 2006.229.15:38:53.15#ibcon#read 3, iclass 29, count 0 2006.229.15:38:53.15#ibcon#about to read 4, iclass 29, count 0 2006.229.15:38:53.15#ibcon#read 4, iclass 29, count 0 2006.229.15:38:53.15#ibcon#about to read 5, iclass 29, count 0 2006.229.15:38:53.15#ibcon#read 5, iclass 29, count 0 2006.229.15:38:53.15#ibcon#about to read 6, iclass 29, count 0 2006.229.15:38:53.15#ibcon#read 6, iclass 29, count 0 2006.229.15:38:53.15#ibcon#end of sib2, iclass 29, count 0 2006.229.15:38:53.15#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:38:53.15#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:38:53.15#ibcon#[27=USB\r\n] 2006.229.15:38:53.15#ibcon#*before write, iclass 29, count 0 2006.229.15:38:53.15#ibcon#enter sib2, iclass 29, count 0 2006.229.15:38:53.15#ibcon#flushed, iclass 29, count 0 2006.229.15:38:53.15#ibcon#about to write, iclass 29, count 0 2006.229.15:38:53.15#ibcon#wrote, iclass 29, count 0 2006.229.15:38:53.15#ibcon#about to read 3, iclass 29, count 0 2006.229.15:38:53.18#ibcon#read 3, iclass 29, count 0 2006.229.15:38:53.18#ibcon#about to read 4, iclass 29, count 0 2006.229.15:38:53.18#ibcon#read 4, iclass 29, count 0 2006.229.15:38:53.18#ibcon#about to read 5, iclass 29, count 0 2006.229.15:38:53.18#ibcon#read 5, iclass 29, count 0 2006.229.15:38:53.18#ibcon#about to read 6, iclass 29, count 0 2006.229.15:38:53.18#ibcon#read 6, iclass 29, count 0 2006.229.15:38:53.18#ibcon#end of sib2, iclass 29, count 0 2006.229.15:38:53.18#ibcon#*after write, iclass 29, count 0 2006.229.15:38:53.18#ibcon#*before return 0, iclass 29, count 0 2006.229.15:38:53.18#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:38:53.18#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:38:53.18#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:38:53.18#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:38:53.18$vck44/vblo=2,634.99 2006.229.15:38:53.18#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.15:38:53.18#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.15:38:53.18#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:53.18#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:53.18#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:53.18#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:53.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:38:53.18#ibcon#first serial, iclass 31, count 0 2006.229.15:38:53.18#ibcon#enter sib2, iclass 31, count 0 2006.229.15:38:53.18#ibcon#flushed, iclass 31, count 0 2006.229.15:38:53.18#ibcon#about to write, iclass 31, count 0 2006.229.15:38:53.18#ibcon#wrote, iclass 31, count 0 2006.229.15:38:53.18#ibcon#about to read 3, iclass 31, count 0 2006.229.15:38:53.20#ibcon#read 3, iclass 31, count 0 2006.229.15:38:53.20#ibcon#about to read 4, iclass 31, count 0 2006.229.15:38:53.20#ibcon#read 4, iclass 31, count 0 2006.229.15:38:53.20#ibcon#about to read 5, iclass 31, count 0 2006.229.15:38:53.20#ibcon#read 5, iclass 31, count 0 2006.229.15:38:53.20#ibcon#about to read 6, iclass 31, count 0 2006.229.15:38:53.20#ibcon#read 6, iclass 31, count 0 2006.229.15:38:53.20#ibcon#end of sib2, iclass 31, count 0 2006.229.15:38:53.20#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:38:53.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:38:53.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:38:53.20#ibcon#*before write, iclass 31, count 0 2006.229.15:38:53.20#ibcon#enter sib2, iclass 31, count 0 2006.229.15:38:53.20#ibcon#flushed, iclass 31, count 0 2006.229.15:38:53.20#ibcon#about to write, iclass 31, count 0 2006.229.15:38:53.20#ibcon#wrote, iclass 31, count 0 2006.229.15:38:53.20#ibcon#about to read 3, iclass 31, count 0 2006.229.15:38:53.24#ibcon#read 3, iclass 31, count 0 2006.229.15:38:53.24#ibcon#about to read 4, iclass 31, count 0 2006.229.15:38:53.24#ibcon#read 4, iclass 31, count 0 2006.229.15:38:53.24#ibcon#about to read 5, iclass 31, count 0 2006.229.15:38:53.24#ibcon#read 5, iclass 31, count 0 2006.229.15:38:53.24#ibcon#about to read 6, iclass 31, count 0 2006.229.15:38:53.24#ibcon#read 6, iclass 31, count 0 2006.229.15:38:53.24#ibcon#end of sib2, iclass 31, count 0 2006.229.15:38:53.24#ibcon#*after write, iclass 31, count 0 2006.229.15:38:53.24#ibcon#*before return 0, iclass 31, count 0 2006.229.15:38:53.24#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:53.24#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:38:53.24#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:38:53.24#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:38:53.24$vck44/vb=2,4 2006.229.15:38:53.24#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.15:38:53.24#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.15:38:53.24#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:53.24#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:53.30#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:53.30#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:53.30#ibcon#enter wrdev, iclass 33, count 2 2006.229.15:38:53.30#ibcon#first serial, iclass 33, count 2 2006.229.15:38:53.30#ibcon#enter sib2, iclass 33, count 2 2006.229.15:38:53.30#ibcon#flushed, iclass 33, count 2 2006.229.15:38:53.30#ibcon#about to write, iclass 33, count 2 2006.229.15:38:53.30#ibcon#wrote, iclass 33, count 2 2006.229.15:38:53.30#ibcon#about to read 3, iclass 33, count 2 2006.229.15:38:53.32#ibcon#read 3, iclass 33, count 2 2006.229.15:38:53.32#ibcon#about to read 4, iclass 33, count 2 2006.229.15:38:53.32#ibcon#read 4, iclass 33, count 2 2006.229.15:38:53.32#ibcon#about to read 5, iclass 33, count 2 2006.229.15:38:53.32#ibcon#read 5, iclass 33, count 2 2006.229.15:38:53.32#ibcon#about to read 6, iclass 33, count 2 2006.229.15:38:53.32#ibcon#read 6, iclass 33, count 2 2006.229.15:38:53.32#ibcon#end of sib2, iclass 33, count 2 2006.229.15:38:53.32#ibcon#*mode == 0, iclass 33, count 2 2006.229.15:38:53.32#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.15:38:53.32#ibcon#[27=AT02-04\r\n] 2006.229.15:38:53.32#ibcon#*before write, iclass 33, count 2 2006.229.15:38:53.32#ibcon#enter sib2, iclass 33, count 2 2006.229.15:38:53.32#ibcon#flushed, iclass 33, count 2 2006.229.15:38:53.32#ibcon#about to write, iclass 33, count 2 2006.229.15:38:53.32#ibcon#wrote, iclass 33, count 2 2006.229.15:38:53.32#ibcon#about to read 3, iclass 33, count 2 2006.229.15:38:53.35#ibcon#read 3, iclass 33, count 2 2006.229.15:38:53.35#ibcon#about to read 4, iclass 33, count 2 2006.229.15:38:53.35#ibcon#read 4, iclass 33, count 2 2006.229.15:38:53.35#ibcon#about to read 5, iclass 33, count 2 2006.229.15:38:53.35#ibcon#read 5, iclass 33, count 2 2006.229.15:38:53.35#ibcon#about to read 6, iclass 33, count 2 2006.229.15:38:53.35#ibcon#read 6, iclass 33, count 2 2006.229.15:38:53.35#ibcon#end of sib2, iclass 33, count 2 2006.229.15:38:53.35#ibcon#*after write, iclass 33, count 2 2006.229.15:38:53.35#ibcon#*before return 0, iclass 33, count 2 2006.229.15:38:53.35#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:53.35#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:38:53.35#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.15:38:53.35#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:53.35#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:53.47#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:53.47#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:53.47#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:38:53.47#ibcon#first serial, iclass 33, count 0 2006.229.15:38:53.47#ibcon#enter sib2, iclass 33, count 0 2006.229.15:38:53.47#ibcon#flushed, iclass 33, count 0 2006.229.15:38:53.47#ibcon#about to write, iclass 33, count 0 2006.229.15:38:53.47#ibcon#wrote, iclass 33, count 0 2006.229.15:38:53.47#ibcon#about to read 3, iclass 33, count 0 2006.229.15:38:53.49#ibcon#read 3, iclass 33, count 0 2006.229.15:38:53.49#ibcon#about to read 4, iclass 33, count 0 2006.229.15:38:53.49#ibcon#read 4, iclass 33, count 0 2006.229.15:38:53.49#ibcon#about to read 5, iclass 33, count 0 2006.229.15:38:53.49#ibcon#read 5, iclass 33, count 0 2006.229.15:38:53.49#ibcon#about to read 6, iclass 33, count 0 2006.229.15:38:53.49#ibcon#read 6, iclass 33, count 0 2006.229.15:38:53.49#ibcon#end of sib2, iclass 33, count 0 2006.229.15:38:53.49#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:38:53.49#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:38:53.49#ibcon#[27=USB\r\n] 2006.229.15:38:53.49#ibcon#*before write, iclass 33, count 0 2006.229.15:38:53.49#ibcon#enter sib2, iclass 33, count 0 2006.229.15:38:53.49#ibcon#flushed, iclass 33, count 0 2006.229.15:38:53.49#ibcon#about to write, iclass 33, count 0 2006.229.15:38:53.49#ibcon#wrote, iclass 33, count 0 2006.229.15:38:53.49#ibcon#about to read 3, iclass 33, count 0 2006.229.15:38:53.52#ibcon#read 3, iclass 33, count 0 2006.229.15:38:53.52#ibcon#about to read 4, iclass 33, count 0 2006.229.15:38:53.52#ibcon#read 4, iclass 33, count 0 2006.229.15:38:53.52#ibcon#about to read 5, iclass 33, count 0 2006.229.15:38:53.52#ibcon#read 5, iclass 33, count 0 2006.229.15:38:53.52#ibcon#about to read 6, iclass 33, count 0 2006.229.15:38:53.52#ibcon#read 6, iclass 33, count 0 2006.229.15:38:53.52#ibcon#end of sib2, iclass 33, count 0 2006.229.15:38:53.52#ibcon#*after write, iclass 33, count 0 2006.229.15:38:53.52#ibcon#*before return 0, iclass 33, count 0 2006.229.15:38:53.52#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:53.52#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:38:53.52#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:38:53.52#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:38:53.52$vck44/vblo=3,649.99 2006.229.15:38:53.52#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.15:38:53.52#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.15:38:53.52#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:53.52#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:53.52#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:53.52#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:53.52#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:38:53.52#ibcon#first serial, iclass 35, count 0 2006.229.15:38:53.52#ibcon#enter sib2, iclass 35, count 0 2006.229.15:38:53.52#ibcon#flushed, iclass 35, count 0 2006.229.15:38:53.52#ibcon#about to write, iclass 35, count 0 2006.229.15:38:53.52#ibcon#wrote, iclass 35, count 0 2006.229.15:38:53.52#ibcon#about to read 3, iclass 35, count 0 2006.229.15:38:53.54#ibcon#read 3, iclass 35, count 0 2006.229.15:38:53.54#ibcon#about to read 4, iclass 35, count 0 2006.229.15:38:53.54#ibcon#read 4, iclass 35, count 0 2006.229.15:38:53.54#ibcon#about to read 5, iclass 35, count 0 2006.229.15:38:53.54#ibcon#read 5, iclass 35, count 0 2006.229.15:38:53.54#ibcon#about to read 6, iclass 35, count 0 2006.229.15:38:53.54#ibcon#read 6, iclass 35, count 0 2006.229.15:38:53.54#ibcon#end of sib2, iclass 35, count 0 2006.229.15:38:53.54#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:38:53.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:38:53.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:38:53.54#ibcon#*before write, iclass 35, count 0 2006.229.15:38:53.54#ibcon#enter sib2, iclass 35, count 0 2006.229.15:38:53.54#ibcon#flushed, iclass 35, count 0 2006.229.15:38:53.54#ibcon#about to write, iclass 35, count 0 2006.229.15:38:53.54#ibcon#wrote, iclass 35, count 0 2006.229.15:38:53.54#ibcon#about to read 3, iclass 35, count 0 2006.229.15:38:53.58#ibcon#read 3, iclass 35, count 0 2006.229.15:38:53.58#ibcon#about to read 4, iclass 35, count 0 2006.229.15:38:53.58#ibcon#read 4, iclass 35, count 0 2006.229.15:38:53.58#ibcon#about to read 5, iclass 35, count 0 2006.229.15:38:53.58#ibcon#read 5, iclass 35, count 0 2006.229.15:38:53.58#ibcon#about to read 6, iclass 35, count 0 2006.229.15:38:53.58#ibcon#read 6, iclass 35, count 0 2006.229.15:38:53.58#ibcon#end of sib2, iclass 35, count 0 2006.229.15:38:53.58#ibcon#*after write, iclass 35, count 0 2006.229.15:38:53.58#ibcon#*before return 0, iclass 35, count 0 2006.229.15:38:53.58#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:53.58#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:38:53.58#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:38:53.58#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:38:53.58$vck44/vb=3,4 2006.229.15:38:53.58#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.15:38:53.58#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.15:38:53.58#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:53.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:53.64#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:53.64#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:53.64#ibcon#enter wrdev, iclass 37, count 2 2006.229.15:38:53.64#ibcon#first serial, iclass 37, count 2 2006.229.15:38:53.64#ibcon#enter sib2, iclass 37, count 2 2006.229.15:38:53.64#ibcon#flushed, iclass 37, count 2 2006.229.15:38:53.64#ibcon#about to write, iclass 37, count 2 2006.229.15:38:53.64#ibcon#wrote, iclass 37, count 2 2006.229.15:38:53.64#ibcon#about to read 3, iclass 37, count 2 2006.229.15:38:53.66#ibcon#read 3, iclass 37, count 2 2006.229.15:38:53.66#ibcon#about to read 4, iclass 37, count 2 2006.229.15:38:53.66#ibcon#read 4, iclass 37, count 2 2006.229.15:38:53.66#ibcon#about to read 5, iclass 37, count 2 2006.229.15:38:53.66#ibcon#read 5, iclass 37, count 2 2006.229.15:38:53.66#ibcon#about to read 6, iclass 37, count 2 2006.229.15:38:53.66#ibcon#read 6, iclass 37, count 2 2006.229.15:38:53.66#ibcon#end of sib2, iclass 37, count 2 2006.229.15:38:53.66#ibcon#*mode == 0, iclass 37, count 2 2006.229.15:38:53.66#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.15:38:53.66#ibcon#[27=AT03-04\r\n] 2006.229.15:38:53.66#ibcon#*before write, iclass 37, count 2 2006.229.15:38:53.66#ibcon#enter sib2, iclass 37, count 2 2006.229.15:38:53.66#ibcon#flushed, iclass 37, count 2 2006.229.15:38:53.66#ibcon#about to write, iclass 37, count 2 2006.229.15:38:53.66#ibcon#wrote, iclass 37, count 2 2006.229.15:38:53.66#ibcon#about to read 3, iclass 37, count 2 2006.229.15:38:53.69#ibcon#read 3, iclass 37, count 2 2006.229.15:38:53.69#ibcon#about to read 4, iclass 37, count 2 2006.229.15:38:53.69#ibcon#read 4, iclass 37, count 2 2006.229.15:38:53.69#ibcon#about to read 5, iclass 37, count 2 2006.229.15:38:53.69#ibcon#read 5, iclass 37, count 2 2006.229.15:38:53.69#ibcon#about to read 6, iclass 37, count 2 2006.229.15:38:53.69#ibcon#read 6, iclass 37, count 2 2006.229.15:38:53.69#ibcon#end of sib2, iclass 37, count 2 2006.229.15:38:53.69#ibcon#*after write, iclass 37, count 2 2006.229.15:38:53.69#ibcon#*before return 0, iclass 37, count 2 2006.229.15:38:53.69#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:53.69#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:38:53.69#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.15:38:53.69#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:53.69#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:53.81#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:53.81#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:53.81#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:38:53.81#ibcon#first serial, iclass 37, count 0 2006.229.15:38:53.81#ibcon#enter sib2, iclass 37, count 0 2006.229.15:38:53.81#ibcon#flushed, iclass 37, count 0 2006.229.15:38:53.81#ibcon#about to write, iclass 37, count 0 2006.229.15:38:53.81#ibcon#wrote, iclass 37, count 0 2006.229.15:38:53.81#ibcon#about to read 3, iclass 37, count 0 2006.229.15:38:53.83#ibcon#read 3, iclass 37, count 0 2006.229.15:38:53.83#ibcon#about to read 4, iclass 37, count 0 2006.229.15:38:53.83#ibcon#read 4, iclass 37, count 0 2006.229.15:38:53.83#ibcon#about to read 5, iclass 37, count 0 2006.229.15:38:53.83#ibcon#read 5, iclass 37, count 0 2006.229.15:38:53.83#ibcon#about to read 6, iclass 37, count 0 2006.229.15:38:53.83#ibcon#read 6, iclass 37, count 0 2006.229.15:38:53.83#ibcon#end of sib2, iclass 37, count 0 2006.229.15:38:53.83#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:38:53.83#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:38:53.83#ibcon#[27=USB\r\n] 2006.229.15:38:53.83#ibcon#*before write, iclass 37, count 0 2006.229.15:38:53.83#ibcon#enter sib2, iclass 37, count 0 2006.229.15:38:53.83#ibcon#flushed, iclass 37, count 0 2006.229.15:38:53.83#ibcon#about to write, iclass 37, count 0 2006.229.15:38:53.83#ibcon#wrote, iclass 37, count 0 2006.229.15:38:53.83#ibcon#about to read 3, iclass 37, count 0 2006.229.15:38:53.86#ibcon#read 3, iclass 37, count 0 2006.229.15:38:53.86#ibcon#about to read 4, iclass 37, count 0 2006.229.15:38:53.86#ibcon#read 4, iclass 37, count 0 2006.229.15:38:53.86#ibcon#about to read 5, iclass 37, count 0 2006.229.15:38:53.86#ibcon#read 5, iclass 37, count 0 2006.229.15:38:53.86#ibcon#about to read 6, iclass 37, count 0 2006.229.15:38:53.86#ibcon#read 6, iclass 37, count 0 2006.229.15:38:53.86#ibcon#end of sib2, iclass 37, count 0 2006.229.15:38:53.86#ibcon#*after write, iclass 37, count 0 2006.229.15:38:53.86#ibcon#*before return 0, iclass 37, count 0 2006.229.15:38:53.86#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:53.86#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:38:53.86#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:38:53.86#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:38:53.86$vck44/vblo=4,679.99 2006.229.15:38:53.86#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:38:53.86#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:38:53.86#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:53.86#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:53.86#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:53.86#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:53.86#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:38:53.86#ibcon#first serial, iclass 39, count 0 2006.229.15:38:53.86#ibcon#enter sib2, iclass 39, count 0 2006.229.15:38:53.86#ibcon#flushed, iclass 39, count 0 2006.229.15:38:53.86#ibcon#about to write, iclass 39, count 0 2006.229.15:38:53.86#ibcon#wrote, iclass 39, count 0 2006.229.15:38:53.86#ibcon#about to read 3, iclass 39, count 0 2006.229.15:38:53.88#ibcon#read 3, iclass 39, count 0 2006.229.15:38:53.88#ibcon#about to read 4, iclass 39, count 0 2006.229.15:38:53.88#ibcon#read 4, iclass 39, count 0 2006.229.15:38:53.88#ibcon#about to read 5, iclass 39, count 0 2006.229.15:38:53.88#ibcon#read 5, iclass 39, count 0 2006.229.15:38:53.88#ibcon#about to read 6, iclass 39, count 0 2006.229.15:38:53.88#ibcon#read 6, iclass 39, count 0 2006.229.15:38:53.88#ibcon#end of sib2, iclass 39, count 0 2006.229.15:38:53.88#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:38:53.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:38:53.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:38:53.88#ibcon#*before write, iclass 39, count 0 2006.229.15:38:53.88#ibcon#enter sib2, iclass 39, count 0 2006.229.15:38:53.88#ibcon#flushed, iclass 39, count 0 2006.229.15:38:53.88#ibcon#about to write, iclass 39, count 0 2006.229.15:38:53.88#ibcon#wrote, iclass 39, count 0 2006.229.15:38:53.88#ibcon#about to read 3, iclass 39, count 0 2006.229.15:38:53.92#ibcon#read 3, iclass 39, count 0 2006.229.15:38:53.92#ibcon#about to read 4, iclass 39, count 0 2006.229.15:38:53.92#ibcon#read 4, iclass 39, count 0 2006.229.15:38:53.92#ibcon#about to read 5, iclass 39, count 0 2006.229.15:38:53.92#ibcon#read 5, iclass 39, count 0 2006.229.15:38:53.92#ibcon#about to read 6, iclass 39, count 0 2006.229.15:38:53.92#ibcon#read 6, iclass 39, count 0 2006.229.15:38:53.92#ibcon#end of sib2, iclass 39, count 0 2006.229.15:38:53.92#ibcon#*after write, iclass 39, count 0 2006.229.15:38:53.92#ibcon#*before return 0, iclass 39, count 0 2006.229.15:38:53.92#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:53.92#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:38:53.92#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:38:53.92#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:38:53.92$vck44/vb=4,4 2006.229.15:38:53.92#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.15:38:53.92#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.15:38:53.92#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:53.92#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:53.98#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:53.98#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:53.98#ibcon#enter wrdev, iclass 3, count 2 2006.229.15:38:53.98#ibcon#first serial, iclass 3, count 2 2006.229.15:38:53.98#ibcon#enter sib2, iclass 3, count 2 2006.229.15:38:53.98#ibcon#flushed, iclass 3, count 2 2006.229.15:38:53.98#ibcon#about to write, iclass 3, count 2 2006.229.15:38:53.98#ibcon#wrote, iclass 3, count 2 2006.229.15:38:53.98#ibcon#about to read 3, iclass 3, count 2 2006.229.15:38:54.00#ibcon#read 3, iclass 3, count 2 2006.229.15:38:54.00#ibcon#about to read 4, iclass 3, count 2 2006.229.15:38:54.00#ibcon#read 4, iclass 3, count 2 2006.229.15:38:54.00#ibcon#about to read 5, iclass 3, count 2 2006.229.15:38:54.00#ibcon#read 5, iclass 3, count 2 2006.229.15:38:54.00#ibcon#about to read 6, iclass 3, count 2 2006.229.15:38:54.00#ibcon#read 6, iclass 3, count 2 2006.229.15:38:54.00#ibcon#end of sib2, iclass 3, count 2 2006.229.15:38:54.00#ibcon#*mode == 0, iclass 3, count 2 2006.229.15:38:54.00#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.15:38:54.00#ibcon#[27=AT04-04\r\n] 2006.229.15:38:54.00#ibcon#*before write, iclass 3, count 2 2006.229.15:38:54.00#ibcon#enter sib2, iclass 3, count 2 2006.229.15:38:54.00#ibcon#flushed, iclass 3, count 2 2006.229.15:38:54.00#ibcon#about to write, iclass 3, count 2 2006.229.15:38:54.00#ibcon#wrote, iclass 3, count 2 2006.229.15:38:54.00#ibcon#about to read 3, iclass 3, count 2 2006.229.15:38:54.03#ibcon#read 3, iclass 3, count 2 2006.229.15:38:54.03#ibcon#about to read 4, iclass 3, count 2 2006.229.15:38:54.03#ibcon#read 4, iclass 3, count 2 2006.229.15:38:54.03#ibcon#about to read 5, iclass 3, count 2 2006.229.15:38:54.03#ibcon#read 5, iclass 3, count 2 2006.229.15:38:54.03#ibcon#about to read 6, iclass 3, count 2 2006.229.15:38:54.03#ibcon#read 6, iclass 3, count 2 2006.229.15:38:54.03#ibcon#end of sib2, iclass 3, count 2 2006.229.15:38:54.03#ibcon#*after write, iclass 3, count 2 2006.229.15:38:54.03#ibcon#*before return 0, iclass 3, count 2 2006.229.15:38:54.03#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:54.03#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:38:54.03#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.15:38:54.03#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:54.03#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:54.15#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:54.15#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:54.15#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:38:54.15#ibcon#first serial, iclass 3, count 0 2006.229.15:38:54.15#ibcon#enter sib2, iclass 3, count 0 2006.229.15:38:54.15#ibcon#flushed, iclass 3, count 0 2006.229.15:38:54.15#ibcon#about to write, iclass 3, count 0 2006.229.15:38:54.15#ibcon#wrote, iclass 3, count 0 2006.229.15:38:54.15#ibcon#about to read 3, iclass 3, count 0 2006.229.15:38:54.17#ibcon#read 3, iclass 3, count 0 2006.229.15:38:54.17#ibcon#about to read 4, iclass 3, count 0 2006.229.15:38:54.17#ibcon#read 4, iclass 3, count 0 2006.229.15:38:54.17#ibcon#about to read 5, iclass 3, count 0 2006.229.15:38:54.17#ibcon#read 5, iclass 3, count 0 2006.229.15:38:54.17#ibcon#about to read 6, iclass 3, count 0 2006.229.15:38:54.17#ibcon#read 6, iclass 3, count 0 2006.229.15:38:54.17#ibcon#end of sib2, iclass 3, count 0 2006.229.15:38:54.17#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:38:54.17#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:38:54.17#ibcon#[27=USB\r\n] 2006.229.15:38:54.17#ibcon#*before write, iclass 3, count 0 2006.229.15:38:54.17#ibcon#enter sib2, iclass 3, count 0 2006.229.15:38:54.17#ibcon#flushed, iclass 3, count 0 2006.229.15:38:54.17#ibcon#about to write, iclass 3, count 0 2006.229.15:38:54.17#ibcon#wrote, iclass 3, count 0 2006.229.15:38:54.17#ibcon#about to read 3, iclass 3, count 0 2006.229.15:38:54.20#ibcon#read 3, iclass 3, count 0 2006.229.15:38:54.20#ibcon#about to read 4, iclass 3, count 0 2006.229.15:38:54.20#ibcon#read 4, iclass 3, count 0 2006.229.15:38:54.20#ibcon#about to read 5, iclass 3, count 0 2006.229.15:38:54.20#ibcon#read 5, iclass 3, count 0 2006.229.15:38:54.20#ibcon#about to read 6, iclass 3, count 0 2006.229.15:38:54.20#ibcon#read 6, iclass 3, count 0 2006.229.15:38:54.20#ibcon#end of sib2, iclass 3, count 0 2006.229.15:38:54.20#ibcon#*after write, iclass 3, count 0 2006.229.15:38:54.20#ibcon#*before return 0, iclass 3, count 0 2006.229.15:38:54.20#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:54.20#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:38:54.20#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:38:54.20#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:38:54.20$vck44/vblo=5,709.99 2006.229.15:38:54.20#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.15:38:54.20#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.15:38:54.20#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:54.20#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:54.20#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:54.20#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:54.20#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:38:54.20#ibcon#first serial, iclass 5, count 0 2006.229.15:38:54.20#ibcon#enter sib2, iclass 5, count 0 2006.229.15:38:54.20#ibcon#flushed, iclass 5, count 0 2006.229.15:38:54.20#ibcon#about to write, iclass 5, count 0 2006.229.15:38:54.20#ibcon#wrote, iclass 5, count 0 2006.229.15:38:54.20#ibcon#about to read 3, iclass 5, count 0 2006.229.15:38:54.22#ibcon#read 3, iclass 5, count 0 2006.229.15:38:54.22#ibcon#about to read 4, iclass 5, count 0 2006.229.15:38:54.22#ibcon#read 4, iclass 5, count 0 2006.229.15:38:54.22#ibcon#about to read 5, iclass 5, count 0 2006.229.15:38:54.22#ibcon#read 5, iclass 5, count 0 2006.229.15:38:54.22#ibcon#about to read 6, iclass 5, count 0 2006.229.15:38:54.22#ibcon#read 6, iclass 5, count 0 2006.229.15:38:54.22#ibcon#end of sib2, iclass 5, count 0 2006.229.15:38:54.22#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:38:54.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:38:54.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:38:54.22#ibcon#*before write, iclass 5, count 0 2006.229.15:38:54.22#ibcon#enter sib2, iclass 5, count 0 2006.229.15:38:54.22#ibcon#flushed, iclass 5, count 0 2006.229.15:38:54.22#ibcon#about to write, iclass 5, count 0 2006.229.15:38:54.22#ibcon#wrote, iclass 5, count 0 2006.229.15:38:54.22#ibcon#about to read 3, iclass 5, count 0 2006.229.15:38:54.26#ibcon#read 3, iclass 5, count 0 2006.229.15:38:54.26#ibcon#about to read 4, iclass 5, count 0 2006.229.15:38:54.26#ibcon#read 4, iclass 5, count 0 2006.229.15:38:54.26#ibcon#about to read 5, iclass 5, count 0 2006.229.15:38:54.26#ibcon#read 5, iclass 5, count 0 2006.229.15:38:54.26#ibcon#about to read 6, iclass 5, count 0 2006.229.15:38:54.26#ibcon#read 6, iclass 5, count 0 2006.229.15:38:54.26#ibcon#end of sib2, iclass 5, count 0 2006.229.15:38:54.26#ibcon#*after write, iclass 5, count 0 2006.229.15:38:54.26#ibcon#*before return 0, iclass 5, count 0 2006.229.15:38:54.26#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:54.26#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:38:54.26#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:38:54.26#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:38:54.26$vck44/vb=5,4 2006.229.15:38:54.26#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.15:38:54.26#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.15:38:54.26#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:54.26#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:54.32#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:54.32#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:54.32#ibcon#enter wrdev, iclass 7, count 2 2006.229.15:38:54.32#ibcon#first serial, iclass 7, count 2 2006.229.15:38:54.32#ibcon#enter sib2, iclass 7, count 2 2006.229.15:38:54.32#ibcon#flushed, iclass 7, count 2 2006.229.15:38:54.32#ibcon#about to write, iclass 7, count 2 2006.229.15:38:54.32#ibcon#wrote, iclass 7, count 2 2006.229.15:38:54.32#ibcon#about to read 3, iclass 7, count 2 2006.229.15:38:54.34#ibcon#read 3, iclass 7, count 2 2006.229.15:38:54.34#ibcon#about to read 4, iclass 7, count 2 2006.229.15:38:54.34#ibcon#read 4, iclass 7, count 2 2006.229.15:38:54.34#ibcon#about to read 5, iclass 7, count 2 2006.229.15:38:54.34#ibcon#read 5, iclass 7, count 2 2006.229.15:38:54.34#ibcon#about to read 6, iclass 7, count 2 2006.229.15:38:54.34#ibcon#read 6, iclass 7, count 2 2006.229.15:38:54.34#ibcon#end of sib2, iclass 7, count 2 2006.229.15:38:54.34#ibcon#*mode == 0, iclass 7, count 2 2006.229.15:38:54.34#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.15:38:54.34#ibcon#[27=AT05-04\r\n] 2006.229.15:38:54.34#ibcon#*before write, iclass 7, count 2 2006.229.15:38:54.34#ibcon#enter sib2, iclass 7, count 2 2006.229.15:38:54.34#ibcon#flushed, iclass 7, count 2 2006.229.15:38:54.34#ibcon#about to write, iclass 7, count 2 2006.229.15:38:54.34#ibcon#wrote, iclass 7, count 2 2006.229.15:38:54.34#ibcon#about to read 3, iclass 7, count 2 2006.229.15:38:54.37#ibcon#read 3, iclass 7, count 2 2006.229.15:38:54.37#ibcon#about to read 4, iclass 7, count 2 2006.229.15:38:54.37#ibcon#read 4, iclass 7, count 2 2006.229.15:38:54.37#ibcon#about to read 5, iclass 7, count 2 2006.229.15:38:54.37#ibcon#read 5, iclass 7, count 2 2006.229.15:38:54.37#ibcon#about to read 6, iclass 7, count 2 2006.229.15:38:54.37#ibcon#read 6, iclass 7, count 2 2006.229.15:38:54.37#ibcon#end of sib2, iclass 7, count 2 2006.229.15:38:54.37#ibcon#*after write, iclass 7, count 2 2006.229.15:38:54.37#ibcon#*before return 0, iclass 7, count 2 2006.229.15:38:54.37#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:54.37#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:38:54.37#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.15:38:54.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:54.37#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:54.49#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:54.49#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:54.49#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:38:54.49#ibcon#first serial, iclass 7, count 0 2006.229.15:38:54.49#ibcon#enter sib2, iclass 7, count 0 2006.229.15:38:54.49#ibcon#flushed, iclass 7, count 0 2006.229.15:38:54.49#ibcon#about to write, iclass 7, count 0 2006.229.15:38:54.49#ibcon#wrote, iclass 7, count 0 2006.229.15:38:54.49#ibcon#about to read 3, iclass 7, count 0 2006.229.15:38:54.51#ibcon#read 3, iclass 7, count 0 2006.229.15:38:54.51#ibcon#about to read 4, iclass 7, count 0 2006.229.15:38:54.51#ibcon#read 4, iclass 7, count 0 2006.229.15:38:54.51#ibcon#about to read 5, iclass 7, count 0 2006.229.15:38:54.51#ibcon#read 5, iclass 7, count 0 2006.229.15:38:54.51#ibcon#about to read 6, iclass 7, count 0 2006.229.15:38:54.51#ibcon#read 6, iclass 7, count 0 2006.229.15:38:54.51#ibcon#end of sib2, iclass 7, count 0 2006.229.15:38:54.51#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:38:54.51#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:38:54.51#ibcon#[27=USB\r\n] 2006.229.15:38:54.51#ibcon#*before write, iclass 7, count 0 2006.229.15:38:54.51#ibcon#enter sib2, iclass 7, count 0 2006.229.15:38:54.51#ibcon#flushed, iclass 7, count 0 2006.229.15:38:54.51#ibcon#about to write, iclass 7, count 0 2006.229.15:38:54.51#ibcon#wrote, iclass 7, count 0 2006.229.15:38:54.51#ibcon#about to read 3, iclass 7, count 0 2006.229.15:38:54.54#ibcon#read 3, iclass 7, count 0 2006.229.15:38:54.54#ibcon#about to read 4, iclass 7, count 0 2006.229.15:38:54.54#ibcon#read 4, iclass 7, count 0 2006.229.15:38:54.54#ibcon#about to read 5, iclass 7, count 0 2006.229.15:38:54.54#ibcon#read 5, iclass 7, count 0 2006.229.15:38:54.54#ibcon#about to read 6, iclass 7, count 0 2006.229.15:38:54.54#ibcon#read 6, iclass 7, count 0 2006.229.15:38:54.54#ibcon#end of sib2, iclass 7, count 0 2006.229.15:38:54.54#ibcon#*after write, iclass 7, count 0 2006.229.15:38:54.54#ibcon#*before return 0, iclass 7, count 0 2006.229.15:38:54.54#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:54.54#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:38:54.54#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:38:54.54#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:38:54.54$vck44/vblo=6,719.99 2006.229.15:38:54.54#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.15:38:54.54#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.15:38:54.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:54.54#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:54.54#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:54.54#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:54.54#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:38:54.54#ibcon#first serial, iclass 11, count 0 2006.229.15:38:54.54#ibcon#enter sib2, iclass 11, count 0 2006.229.15:38:54.54#ibcon#flushed, iclass 11, count 0 2006.229.15:38:54.54#ibcon#about to write, iclass 11, count 0 2006.229.15:38:54.54#ibcon#wrote, iclass 11, count 0 2006.229.15:38:54.54#ibcon#about to read 3, iclass 11, count 0 2006.229.15:38:54.56#ibcon#read 3, iclass 11, count 0 2006.229.15:38:54.56#ibcon#about to read 4, iclass 11, count 0 2006.229.15:38:54.56#ibcon#read 4, iclass 11, count 0 2006.229.15:38:54.56#ibcon#about to read 5, iclass 11, count 0 2006.229.15:38:54.56#ibcon#read 5, iclass 11, count 0 2006.229.15:38:54.56#ibcon#about to read 6, iclass 11, count 0 2006.229.15:38:54.56#ibcon#read 6, iclass 11, count 0 2006.229.15:38:54.56#ibcon#end of sib2, iclass 11, count 0 2006.229.15:38:54.56#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:38:54.56#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:38:54.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:38:54.56#ibcon#*before write, iclass 11, count 0 2006.229.15:38:54.56#ibcon#enter sib2, iclass 11, count 0 2006.229.15:38:54.56#ibcon#flushed, iclass 11, count 0 2006.229.15:38:54.56#ibcon#about to write, iclass 11, count 0 2006.229.15:38:54.56#ibcon#wrote, iclass 11, count 0 2006.229.15:38:54.56#ibcon#about to read 3, iclass 11, count 0 2006.229.15:38:54.60#ibcon#read 3, iclass 11, count 0 2006.229.15:38:54.60#ibcon#about to read 4, iclass 11, count 0 2006.229.15:38:54.60#ibcon#read 4, iclass 11, count 0 2006.229.15:38:54.60#ibcon#about to read 5, iclass 11, count 0 2006.229.15:38:54.60#ibcon#read 5, iclass 11, count 0 2006.229.15:38:54.60#ibcon#about to read 6, iclass 11, count 0 2006.229.15:38:54.60#ibcon#read 6, iclass 11, count 0 2006.229.15:38:54.60#ibcon#end of sib2, iclass 11, count 0 2006.229.15:38:54.60#ibcon#*after write, iclass 11, count 0 2006.229.15:38:54.60#ibcon#*before return 0, iclass 11, count 0 2006.229.15:38:54.60#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:54.60#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:38:54.60#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:38:54.60#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:38:54.60$vck44/vb=6,4 2006.229.15:38:54.60#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.15:38:54.60#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.15:38:54.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:54.60#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:54.66#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:54.66#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:54.66#ibcon#enter wrdev, iclass 13, count 2 2006.229.15:38:54.66#ibcon#first serial, iclass 13, count 2 2006.229.15:38:54.66#ibcon#enter sib2, iclass 13, count 2 2006.229.15:38:54.66#ibcon#flushed, iclass 13, count 2 2006.229.15:38:54.66#ibcon#about to write, iclass 13, count 2 2006.229.15:38:54.66#ibcon#wrote, iclass 13, count 2 2006.229.15:38:54.66#ibcon#about to read 3, iclass 13, count 2 2006.229.15:38:54.68#ibcon#read 3, iclass 13, count 2 2006.229.15:38:54.68#ibcon#about to read 4, iclass 13, count 2 2006.229.15:38:54.68#ibcon#read 4, iclass 13, count 2 2006.229.15:38:54.68#ibcon#about to read 5, iclass 13, count 2 2006.229.15:38:54.68#ibcon#read 5, iclass 13, count 2 2006.229.15:38:54.68#ibcon#about to read 6, iclass 13, count 2 2006.229.15:38:54.68#ibcon#read 6, iclass 13, count 2 2006.229.15:38:54.68#ibcon#end of sib2, iclass 13, count 2 2006.229.15:38:54.68#ibcon#*mode == 0, iclass 13, count 2 2006.229.15:38:54.68#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.15:38:54.68#ibcon#[27=AT06-04\r\n] 2006.229.15:38:54.68#ibcon#*before write, iclass 13, count 2 2006.229.15:38:54.68#ibcon#enter sib2, iclass 13, count 2 2006.229.15:38:54.68#ibcon#flushed, iclass 13, count 2 2006.229.15:38:54.68#ibcon#about to write, iclass 13, count 2 2006.229.15:38:54.68#ibcon#wrote, iclass 13, count 2 2006.229.15:38:54.68#ibcon#about to read 3, iclass 13, count 2 2006.229.15:38:54.71#ibcon#read 3, iclass 13, count 2 2006.229.15:38:54.71#ibcon#about to read 4, iclass 13, count 2 2006.229.15:38:54.71#ibcon#read 4, iclass 13, count 2 2006.229.15:38:54.71#ibcon#about to read 5, iclass 13, count 2 2006.229.15:38:54.71#ibcon#read 5, iclass 13, count 2 2006.229.15:38:54.71#ibcon#about to read 6, iclass 13, count 2 2006.229.15:38:54.71#ibcon#read 6, iclass 13, count 2 2006.229.15:38:54.71#ibcon#end of sib2, iclass 13, count 2 2006.229.15:38:54.71#ibcon#*after write, iclass 13, count 2 2006.229.15:38:54.71#ibcon#*before return 0, iclass 13, count 2 2006.229.15:38:54.71#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:54.71#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:38:54.71#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.15:38:54.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:54.71#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:54.83#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:54.83#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:54.83#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:38:54.83#ibcon#first serial, iclass 13, count 0 2006.229.15:38:54.83#ibcon#enter sib2, iclass 13, count 0 2006.229.15:38:54.83#ibcon#flushed, iclass 13, count 0 2006.229.15:38:54.83#ibcon#about to write, iclass 13, count 0 2006.229.15:38:54.83#ibcon#wrote, iclass 13, count 0 2006.229.15:38:54.83#ibcon#about to read 3, iclass 13, count 0 2006.229.15:38:54.85#ibcon#read 3, iclass 13, count 0 2006.229.15:38:54.85#ibcon#about to read 4, iclass 13, count 0 2006.229.15:38:54.85#ibcon#read 4, iclass 13, count 0 2006.229.15:38:54.85#ibcon#about to read 5, iclass 13, count 0 2006.229.15:38:54.85#ibcon#read 5, iclass 13, count 0 2006.229.15:38:54.85#ibcon#about to read 6, iclass 13, count 0 2006.229.15:38:54.85#ibcon#read 6, iclass 13, count 0 2006.229.15:38:54.85#ibcon#end of sib2, iclass 13, count 0 2006.229.15:38:54.85#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:38:54.85#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:38:54.85#ibcon#[27=USB\r\n] 2006.229.15:38:54.85#ibcon#*before write, iclass 13, count 0 2006.229.15:38:54.85#ibcon#enter sib2, iclass 13, count 0 2006.229.15:38:54.85#ibcon#flushed, iclass 13, count 0 2006.229.15:38:54.85#ibcon#about to write, iclass 13, count 0 2006.229.15:38:54.85#ibcon#wrote, iclass 13, count 0 2006.229.15:38:54.85#ibcon#about to read 3, iclass 13, count 0 2006.229.15:38:54.88#ibcon#read 3, iclass 13, count 0 2006.229.15:38:54.88#ibcon#about to read 4, iclass 13, count 0 2006.229.15:38:54.88#ibcon#read 4, iclass 13, count 0 2006.229.15:38:54.88#ibcon#about to read 5, iclass 13, count 0 2006.229.15:38:54.88#ibcon#read 5, iclass 13, count 0 2006.229.15:38:54.88#ibcon#about to read 6, iclass 13, count 0 2006.229.15:38:54.88#ibcon#read 6, iclass 13, count 0 2006.229.15:38:54.88#ibcon#end of sib2, iclass 13, count 0 2006.229.15:38:54.88#ibcon#*after write, iclass 13, count 0 2006.229.15:38:54.88#ibcon#*before return 0, iclass 13, count 0 2006.229.15:38:54.88#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:54.88#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:38:54.88#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:38:54.88#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:38:54.88$vck44/vblo=7,734.99 2006.229.15:38:54.88#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:38:54.88#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:38:54.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:54.88#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:54.88#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:54.88#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:54.88#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:38:54.88#ibcon#first serial, iclass 15, count 0 2006.229.15:38:54.88#ibcon#enter sib2, iclass 15, count 0 2006.229.15:38:54.88#ibcon#flushed, iclass 15, count 0 2006.229.15:38:54.88#ibcon#about to write, iclass 15, count 0 2006.229.15:38:54.88#ibcon#wrote, iclass 15, count 0 2006.229.15:38:54.88#ibcon#about to read 3, iclass 15, count 0 2006.229.15:38:54.90#ibcon#read 3, iclass 15, count 0 2006.229.15:38:54.90#ibcon#about to read 4, iclass 15, count 0 2006.229.15:38:54.90#ibcon#read 4, iclass 15, count 0 2006.229.15:38:54.90#ibcon#about to read 5, iclass 15, count 0 2006.229.15:38:54.90#ibcon#read 5, iclass 15, count 0 2006.229.15:38:54.90#ibcon#about to read 6, iclass 15, count 0 2006.229.15:38:54.90#ibcon#read 6, iclass 15, count 0 2006.229.15:38:54.90#ibcon#end of sib2, iclass 15, count 0 2006.229.15:38:54.90#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:38:54.90#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:38:54.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:38:54.90#ibcon#*before write, iclass 15, count 0 2006.229.15:38:54.90#ibcon#enter sib2, iclass 15, count 0 2006.229.15:38:54.90#ibcon#flushed, iclass 15, count 0 2006.229.15:38:54.90#ibcon#about to write, iclass 15, count 0 2006.229.15:38:54.90#ibcon#wrote, iclass 15, count 0 2006.229.15:38:54.90#ibcon#about to read 3, iclass 15, count 0 2006.229.15:38:54.94#ibcon#read 3, iclass 15, count 0 2006.229.15:38:54.94#ibcon#about to read 4, iclass 15, count 0 2006.229.15:38:54.94#ibcon#read 4, iclass 15, count 0 2006.229.15:38:54.94#ibcon#about to read 5, iclass 15, count 0 2006.229.15:38:54.94#ibcon#read 5, iclass 15, count 0 2006.229.15:38:54.94#ibcon#about to read 6, iclass 15, count 0 2006.229.15:38:54.94#ibcon#read 6, iclass 15, count 0 2006.229.15:38:54.94#ibcon#end of sib2, iclass 15, count 0 2006.229.15:38:54.94#ibcon#*after write, iclass 15, count 0 2006.229.15:38:54.94#ibcon#*before return 0, iclass 15, count 0 2006.229.15:38:54.94#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:54.94#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:38:54.94#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:38:54.94#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:38:54.94$vck44/vb=7,4 2006.229.15:38:54.94#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.15:38:54.94#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.15:38:54.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:54.94#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:55.00#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:55.00#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:55.00#ibcon#enter wrdev, iclass 17, count 2 2006.229.15:38:55.00#ibcon#first serial, iclass 17, count 2 2006.229.15:38:55.00#ibcon#enter sib2, iclass 17, count 2 2006.229.15:38:55.00#ibcon#flushed, iclass 17, count 2 2006.229.15:38:55.00#ibcon#about to write, iclass 17, count 2 2006.229.15:38:55.00#ibcon#wrote, iclass 17, count 2 2006.229.15:38:55.00#ibcon#about to read 3, iclass 17, count 2 2006.229.15:38:55.02#ibcon#read 3, iclass 17, count 2 2006.229.15:38:55.02#ibcon#about to read 4, iclass 17, count 2 2006.229.15:38:55.02#ibcon#read 4, iclass 17, count 2 2006.229.15:38:55.02#ibcon#about to read 5, iclass 17, count 2 2006.229.15:38:55.02#ibcon#read 5, iclass 17, count 2 2006.229.15:38:55.02#ibcon#about to read 6, iclass 17, count 2 2006.229.15:38:55.02#ibcon#read 6, iclass 17, count 2 2006.229.15:38:55.02#ibcon#end of sib2, iclass 17, count 2 2006.229.15:38:55.02#ibcon#*mode == 0, iclass 17, count 2 2006.229.15:38:55.02#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.15:38:55.02#ibcon#[27=AT07-04\r\n] 2006.229.15:38:55.02#ibcon#*before write, iclass 17, count 2 2006.229.15:38:55.02#ibcon#enter sib2, iclass 17, count 2 2006.229.15:38:55.02#ibcon#flushed, iclass 17, count 2 2006.229.15:38:55.02#ibcon#about to write, iclass 17, count 2 2006.229.15:38:55.02#ibcon#wrote, iclass 17, count 2 2006.229.15:38:55.02#ibcon#about to read 3, iclass 17, count 2 2006.229.15:38:55.05#ibcon#read 3, iclass 17, count 2 2006.229.15:38:55.05#ibcon#about to read 4, iclass 17, count 2 2006.229.15:38:55.05#ibcon#read 4, iclass 17, count 2 2006.229.15:38:55.05#ibcon#about to read 5, iclass 17, count 2 2006.229.15:38:55.05#ibcon#read 5, iclass 17, count 2 2006.229.15:38:55.05#ibcon#about to read 6, iclass 17, count 2 2006.229.15:38:55.05#ibcon#read 6, iclass 17, count 2 2006.229.15:38:55.05#ibcon#end of sib2, iclass 17, count 2 2006.229.15:38:55.05#ibcon#*after write, iclass 17, count 2 2006.229.15:38:55.05#ibcon#*before return 0, iclass 17, count 2 2006.229.15:38:55.05#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:55.05#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:38:55.05#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.15:38:55.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:55.05#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:55.17#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:55.17#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:55.17#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:38:55.17#ibcon#first serial, iclass 17, count 0 2006.229.15:38:55.17#ibcon#enter sib2, iclass 17, count 0 2006.229.15:38:55.17#ibcon#flushed, iclass 17, count 0 2006.229.15:38:55.17#ibcon#about to write, iclass 17, count 0 2006.229.15:38:55.17#ibcon#wrote, iclass 17, count 0 2006.229.15:38:55.17#ibcon#about to read 3, iclass 17, count 0 2006.229.15:38:55.19#ibcon#read 3, iclass 17, count 0 2006.229.15:38:55.19#ibcon#about to read 4, iclass 17, count 0 2006.229.15:38:55.19#ibcon#read 4, iclass 17, count 0 2006.229.15:38:55.19#ibcon#about to read 5, iclass 17, count 0 2006.229.15:38:55.19#ibcon#read 5, iclass 17, count 0 2006.229.15:38:55.19#ibcon#about to read 6, iclass 17, count 0 2006.229.15:38:55.19#ibcon#read 6, iclass 17, count 0 2006.229.15:38:55.19#ibcon#end of sib2, iclass 17, count 0 2006.229.15:38:55.19#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:38:55.19#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:38:55.19#ibcon#[27=USB\r\n] 2006.229.15:38:55.19#ibcon#*before write, iclass 17, count 0 2006.229.15:38:55.19#ibcon#enter sib2, iclass 17, count 0 2006.229.15:38:55.19#ibcon#flushed, iclass 17, count 0 2006.229.15:38:55.19#ibcon#about to write, iclass 17, count 0 2006.229.15:38:55.19#ibcon#wrote, iclass 17, count 0 2006.229.15:38:55.19#ibcon#about to read 3, iclass 17, count 0 2006.229.15:38:55.22#ibcon#read 3, iclass 17, count 0 2006.229.15:38:55.22#ibcon#about to read 4, iclass 17, count 0 2006.229.15:38:55.22#ibcon#read 4, iclass 17, count 0 2006.229.15:38:55.22#ibcon#about to read 5, iclass 17, count 0 2006.229.15:38:55.22#ibcon#read 5, iclass 17, count 0 2006.229.15:38:55.22#ibcon#about to read 6, iclass 17, count 0 2006.229.15:38:55.22#ibcon#read 6, iclass 17, count 0 2006.229.15:38:55.22#ibcon#end of sib2, iclass 17, count 0 2006.229.15:38:55.22#ibcon#*after write, iclass 17, count 0 2006.229.15:38:55.22#ibcon#*before return 0, iclass 17, count 0 2006.229.15:38:55.22#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:55.22#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:38:55.22#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:38:55.22#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:38:55.22$vck44/vblo=8,744.99 2006.229.15:38:55.22#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.15:38:55.22#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.15:38:55.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:38:55.22#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:55.22#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:55.22#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:55.22#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:38:55.22#ibcon#first serial, iclass 19, count 0 2006.229.15:38:55.22#ibcon#enter sib2, iclass 19, count 0 2006.229.15:38:55.22#ibcon#flushed, iclass 19, count 0 2006.229.15:38:55.22#ibcon#about to write, iclass 19, count 0 2006.229.15:38:55.22#ibcon#wrote, iclass 19, count 0 2006.229.15:38:55.22#ibcon#about to read 3, iclass 19, count 0 2006.229.15:38:55.24#ibcon#read 3, iclass 19, count 0 2006.229.15:38:55.24#ibcon#about to read 4, iclass 19, count 0 2006.229.15:38:55.24#ibcon#read 4, iclass 19, count 0 2006.229.15:38:55.24#ibcon#about to read 5, iclass 19, count 0 2006.229.15:38:55.24#ibcon#read 5, iclass 19, count 0 2006.229.15:38:55.24#ibcon#about to read 6, iclass 19, count 0 2006.229.15:38:55.24#ibcon#read 6, iclass 19, count 0 2006.229.15:38:55.24#ibcon#end of sib2, iclass 19, count 0 2006.229.15:38:55.24#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:38:55.24#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:38:55.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:38:55.24#ibcon#*before write, iclass 19, count 0 2006.229.15:38:55.24#ibcon#enter sib2, iclass 19, count 0 2006.229.15:38:55.24#ibcon#flushed, iclass 19, count 0 2006.229.15:38:55.24#ibcon#about to write, iclass 19, count 0 2006.229.15:38:55.24#ibcon#wrote, iclass 19, count 0 2006.229.15:38:55.24#ibcon#about to read 3, iclass 19, count 0 2006.229.15:38:55.28#ibcon#read 3, iclass 19, count 0 2006.229.15:38:55.28#ibcon#about to read 4, iclass 19, count 0 2006.229.15:38:55.28#ibcon#read 4, iclass 19, count 0 2006.229.15:38:55.28#ibcon#about to read 5, iclass 19, count 0 2006.229.15:38:55.28#ibcon#read 5, iclass 19, count 0 2006.229.15:38:55.28#ibcon#about to read 6, iclass 19, count 0 2006.229.15:38:55.28#ibcon#read 6, iclass 19, count 0 2006.229.15:38:55.28#ibcon#end of sib2, iclass 19, count 0 2006.229.15:38:55.28#ibcon#*after write, iclass 19, count 0 2006.229.15:38:55.28#ibcon#*before return 0, iclass 19, count 0 2006.229.15:38:55.28#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:55.28#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:38:55.28#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:38:55.28#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:38:55.28$vck44/vb=8,4 2006.229.15:38:55.28#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.15:38:55.28#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.15:38:55.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:38:55.28#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:55.34#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:55.34#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:55.34#ibcon#enter wrdev, iclass 21, count 2 2006.229.15:38:55.34#ibcon#first serial, iclass 21, count 2 2006.229.15:38:55.34#ibcon#enter sib2, iclass 21, count 2 2006.229.15:38:55.34#ibcon#flushed, iclass 21, count 2 2006.229.15:38:55.34#ibcon#about to write, iclass 21, count 2 2006.229.15:38:55.34#ibcon#wrote, iclass 21, count 2 2006.229.15:38:55.34#ibcon#about to read 3, iclass 21, count 2 2006.229.15:38:55.36#ibcon#read 3, iclass 21, count 2 2006.229.15:38:55.36#ibcon#about to read 4, iclass 21, count 2 2006.229.15:38:55.36#ibcon#read 4, iclass 21, count 2 2006.229.15:38:55.36#ibcon#about to read 5, iclass 21, count 2 2006.229.15:38:55.36#ibcon#read 5, iclass 21, count 2 2006.229.15:38:55.36#ibcon#about to read 6, iclass 21, count 2 2006.229.15:38:55.36#ibcon#read 6, iclass 21, count 2 2006.229.15:38:55.36#ibcon#end of sib2, iclass 21, count 2 2006.229.15:38:55.36#ibcon#*mode == 0, iclass 21, count 2 2006.229.15:38:55.36#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.15:38:55.36#ibcon#[27=AT08-04\r\n] 2006.229.15:38:55.36#ibcon#*before write, iclass 21, count 2 2006.229.15:38:55.36#ibcon#enter sib2, iclass 21, count 2 2006.229.15:38:55.36#ibcon#flushed, iclass 21, count 2 2006.229.15:38:55.36#ibcon#about to write, iclass 21, count 2 2006.229.15:38:55.36#ibcon#wrote, iclass 21, count 2 2006.229.15:38:55.36#ibcon#about to read 3, iclass 21, count 2 2006.229.15:38:55.39#ibcon#read 3, iclass 21, count 2 2006.229.15:38:55.39#ibcon#about to read 4, iclass 21, count 2 2006.229.15:38:55.39#ibcon#read 4, iclass 21, count 2 2006.229.15:38:55.39#ibcon#about to read 5, iclass 21, count 2 2006.229.15:38:55.39#ibcon#read 5, iclass 21, count 2 2006.229.15:38:55.39#ibcon#about to read 6, iclass 21, count 2 2006.229.15:38:55.39#ibcon#read 6, iclass 21, count 2 2006.229.15:38:55.39#ibcon#end of sib2, iclass 21, count 2 2006.229.15:38:55.39#ibcon#*after write, iclass 21, count 2 2006.229.15:38:55.39#ibcon#*before return 0, iclass 21, count 2 2006.229.15:38:55.39#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:55.39#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:38:55.39#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.15:38:55.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:38:55.39#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:55.51#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:55.51#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:55.51#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:38:55.51#ibcon#first serial, iclass 21, count 0 2006.229.15:38:55.51#ibcon#enter sib2, iclass 21, count 0 2006.229.15:38:55.51#ibcon#flushed, iclass 21, count 0 2006.229.15:38:55.51#ibcon#about to write, iclass 21, count 0 2006.229.15:38:55.51#ibcon#wrote, iclass 21, count 0 2006.229.15:38:55.51#ibcon#about to read 3, iclass 21, count 0 2006.229.15:38:55.53#ibcon#read 3, iclass 21, count 0 2006.229.15:38:55.53#ibcon#about to read 4, iclass 21, count 0 2006.229.15:38:55.53#ibcon#read 4, iclass 21, count 0 2006.229.15:38:55.53#ibcon#about to read 5, iclass 21, count 0 2006.229.15:38:55.53#ibcon#read 5, iclass 21, count 0 2006.229.15:38:55.53#ibcon#about to read 6, iclass 21, count 0 2006.229.15:38:55.53#ibcon#read 6, iclass 21, count 0 2006.229.15:38:55.53#ibcon#end of sib2, iclass 21, count 0 2006.229.15:38:55.53#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:38:55.53#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:38:55.53#ibcon#[27=USB\r\n] 2006.229.15:38:55.53#ibcon#*before write, iclass 21, count 0 2006.229.15:38:55.53#ibcon#enter sib2, iclass 21, count 0 2006.229.15:38:55.53#ibcon#flushed, iclass 21, count 0 2006.229.15:38:55.53#ibcon#about to write, iclass 21, count 0 2006.229.15:38:55.53#ibcon#wrote, iclass 21, count 0 2006.229.15:38:55.53#ibcon#about to read 3, iclass 21, count 0 2006.229.15:38:55.56#ibcon#read 3, iclass 21, count 0 2006.229.15:38:55.56#ibcon#about to read 4, iclass 21, count 0 2006.229.15:38:55.56#ibcon#read 4, iclass 21, count 0 2006.229.15:38:55.56#ibcon#about to read 5, iclass 21, count 0 2006.229.15:38:55.56#ibcon#read 5, iclass 21, count 0 2006.229.15:38:55.56#ibcon#about to read 6, iclass 21, count 0 2006.229.15:38:55.56#ibcon#read 6, iclass 21, count 0 2006.229.15:38:55.56#ibcon#end of sib2, iclass 21, count 0 2006.229.15:38:55.56#ibcon#*after write, iclass 21, count 0 2006.229.15:38:55.56#ibcon#*before return 0, iclass 21, count 0 2006.229.15:38:55.56#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:55.56#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:38:55.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:38:55.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:38:55.56$vck44/vabw=wide 2006.229.15:38:55.56#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.15:38:55.56#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.15:38:55.56#ibcon#ireg 8 cls_cnt 0 2006.229.15:38:55.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:55.56#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:55.56#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:55.56#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:38:55.56#ibcon#first serial, iclass 23, count 0 2006.229.15:38:55.56#ibcon#enter sib2, iclass 23, count 0 2006.229.15:38:55.56#ibcon#flushed, iclass 23, count 0 2006.229.15:38:55.56#ibcon#about to write, iclass 23, count 0 2006.229.15:38:55.56#ibcon#wrote, iclass 23, count 0 2006.229.15:38:55.56#ibcon#about to read 3, iclass 23, count 0 2006.229.15:38:55.58#ibcon#read 3, iclass 23, count 0 2006.229.15:38:55.58#ibcon#about to read 4, iclass 23, count 0 2006.229.15:38:55.58#ibcon#read 4, iclass 23, count 0 2006.229.15:38:55.58#ibcon#about to read 5, iclass 23, count 0 2006.229.15:38:55.58#ibcon#read 5, iclass 23, count 0 2006.229.15:38:55.58#ibcon#about to read 6, iclass 23, count 0 2006.229.15:38:55.58#ibcon#read 6, iclass 23, count 0 2006.229.15:38:55.58#ibcon#end of sib2, iclass 23, count 0 2006.229.15:38:55.58#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:38:55.58#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:38:55.58#ibcon#[25=BW32\r\n] 2006.229.15:38:55.58#ibcon#*before write, iclass 23, count 0 2006.229.15:38:55.58#ibcon#enter sib2, iclass 23, count 0 2006.229.15:38:55.58#ibcon#flushed, iclass 23, count 0 2006.229.15:38:55.58#ibcon#about to write, iclass 23, count 0 2006.229.15:38:55.58#ibcon#wrote, iclass 23, count 0 2006.229.15:38:55.58#ibcon#about to read 3, iclass 23, count 0 2006.229.15:38:55.61#ibcon#read 3, iclass 23, count 0 2006.229.15:38:55.61#ibcon#about to read 4, iclass 23, count 0 2006.229.15:38:55.61#ibcon#read 4, iclass 23, count 0 2006.229.15:38:55.61#ibcon#about to read 5, iclass 23, count 0 2006.229.15:38:55.61#ibcon#read 5, iclass 23, count 0 2006.229.15:38:55.61#ibcon#about to read 6, iclass 23, count 0 2006.229.15:38:55.61#ibcon#read 6, iclass 23, count 0 2006.229.15:38:55.61#ibcon#end of sib2, iclass 23, count 0 2006.229.15:38:55.61#ibcon#*after write, iclass 23, count 0 2006.229.15:38:55.61#ibcon#*before return 0, iclass 23, count 0 2006.229.15:38:55.61#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:55.61#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:38:55.61#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:38:55.61#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:38:55.61$vck44/vbbw=wide 2006.229.15:38:55.61#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.15:38:55.61#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.15:38:55.61#ibcon#ireg 8 cls_cnt 0 2006.229.15:38:55.61#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:38:55.68#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:38:55.68#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:38:55.68#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:38:55.68#ibcon#first serial, iclass 25, count 0 2006.229.15:38:55.68#ibcon#enter sib2, iclass 25, count 0 2006.229.15:38:55.68#ibcon#flushed, iclass 25, count 0 2006.229.15:38:55.68#ibcon#about to write, iclass 25, count 0 2006.229.15:38:55.68#ibcon#wrote, iclass 25, count 0 2006.229.15:38:55.68#ibcon#about to read 3, iclass 25, count 0 2006.229.15:38:55.70#ibcon#read 3, iclass 25, count 0 2006.229.15:38:55.70#ibcon#about to read 4, iclass 25, count 0 2006.229.15:38:55.70#ibcon#read 4, iclass 25, count 0 2006.229.15:38:55.70#ibcon#about to read 5, iclass 25, count 0 2006.229.15:38:55.70#ibcon#read 5, iclass 25, count 0 2006.229.15:38:55.70#ibcon#about to read 6, iclass 25, count 0 2006.229.15:38:55.70#ibcon#read 6, iclass 25, count 0 2006.229.15:38:55.70#ibcon#end of sib2, iclass 25, count 0 2006.229.15:38:55.70#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:38:55.70#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:38:55.70#ibcon#[27=BW32\r\n] 2006.229.15:38:55.70#ibcon#*before write, iclass 25, count 0 2006.229.15:38:55.70#ibcon#enter sib2, iclass 25, count 0 2006.229.15:38:55.70#ibcon#flushed, iclass 25, count 0 2006.229.15:38:55.70#ibcon#about to write, iclass 25, count 0 2006.229.15:38:55.70#ibcon#wrote, iclass 25, count 0 2006.229.15:38:55.70#ibcon#about to read 3, iclass 25, count 0 2006.229.15:38:55.73#ibcon#read 3, iclass 25, count 0 2006.229.15:38:55.73#ibcon#about to read 4, iclass 25, count 0 2006.229.15:38:55.73#ibcon#read 4, iclass 25, count 0 2006.229.15:38:55.73#ibcon#about to read 5, iclass 25, count 0 2006.229.15:38:55.73#ibcon#read 5, iclass 25, count 0 2006.229.15:38:55.73#ibcon#about to read 6, iclass 25, count 0 2006.229.15:38:55.73#ibcon#read 6, iclass 25, count 0 2006.229.15:38:55.73#ibcon#end of sib2, iclass 25, count 0 2006.229.15:38:55.73#ibcon#*after write, iclass 25, count 0 2006.229.15:38:55.73#ibcon#*before return 0, iclass 25, count 0 2006.229.15:38:55.73#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:38:55.73#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.15:38:55.73#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:38:55.73#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:38:55.73$setupk4/ifdk4 2006.229.15:38:55.73$ifdk4/lo= 2006.229.15:38:55.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:38:55.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:38:55.73$ifdk4/patch= 2006.229.15:38:55.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:38:55.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:38:55.73$setupk4/!*+20s 2006.229.15:38:59.14#abcon#<5=/06 0.9 1.3 27.271001001.9\r\n> 2006.229.15:38:59.16#abcon#{5=INTERFACE CLEAR} 2006.229.15:38:59.22#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:39:03.14#trakl#Source acquired 2006.229.15:39:03.14#flagr#flagr/antenna,acquired 2006.229.15:39:09.31#abcon#<5=/06 0.9 1.3 27.271001001.9\r\n> 2006.229.15:39:09.33#abcon#{5=INTERFACE CLEAR} 2006.229.15:39:09.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:39:10.23$setupk4/"tpicd 2006.229.15:39:10.23$setupk4/echo=off 2006.229.15:39:10.23$setupk4/xlog=off 2006.229.15:39:10.23:!2006.229.15:40:06 2006.229.15:40:06.00:preob 2006.229.15:40:07.14/onsource/TRACKING 2006.229.15:40:07.14:!2006.229.15:40:16 2006.229.15:40:16.00:"tape 2006.229.15:40:16.00:"st=record 2006.229.15:40:16.00:data_valid=on 2006.229.15:40:16.00:midob 2006.229.15:40:16.14/onsource/TRACKING 2006.229.15:40:16.14/wx/27.27,1001.9,100 2006.229.15:40:16.30/cable/+6.4160E-03 2006.229.15:40:17.39/va/01,08,usb,yes,29,32 2006.229.15:40:17.39/va/02,07,usb,yes,32,32 2006.229.15:40:17.39/va/03,06,usb,yes,39,42 2006.229.15:40:17.39/va/04,07,usb,yes,33,34 2006.229.15:40:17.39/va/05,04,usb,yes,29,30 2006.229.15:40:17.39/va/06,04,usb,yes,33,32 2006.229.15:40:17.39/va/07,05,usb,yes,29,29 2006.229.15:40:17.39/va/08,06,usb,yes,21,26 2006.229.15:40:17.62/valo/01,524.99,yes,locked 2006.229.15:40:17.62/valo/02,534.99,yes,locked 2006.229.15:40:17.62/valo/03,564.99,yes,locked 2006.229.15:40:17.62/valo/04,624.99,yes,locked 2006.229.15:40:17.62/valo/05,734.99,yes,locked 2006.229.15:40:17.62/valo/06,814.99,yes,locked 2006.229.15:40:17.62/valo/07,864.99,yes,locked 2006.229.15:40:17.62/valo/08,884.99,yes,locked 2006.229.15:40:18.71/vb/01,04,usb,yes,31,29 2006.229.15:40:18.71/vb/02,04,usb,yes,33,34 2006.229.15:40:18.71/vb/03,04,usb,yes,30,33 2006.229.15:40:18.71/vb/04,04,usb,yes,35,34 2006.229.15:40:18.71/vb/05,04,usb,yes,27,29 2006.229.15:40:18.71/vb/06,04,usb,yes,32,28 2006.229.15:40:18.71/vb/07,04,usb,yes,31,31 2006.229.15:40:18.71/vb/08,04,usb,yes,29,32 2006.229.15:40:18.94/vblo/01,629.99,yes,locked 2006.229.15:40:18.94/vblo/02,634.99,yes,locked 2006.229.15:40:18.94/vblo/03,649.99,yes,locked 2006.229.15:40:18.94/vblo/04,679.99,yes,locked 2006.229.15:40:18.94/vblo/05,709.99,yes,locked 2006.229.15:40:18.94/vblo/06,719.99,yes,locked 2006.229.15:40:18.94/vblo/07,734.99,yes,locked 2006.229.15:40:18.94/vblo/08,744.99,yes,locked 2006.229.15:40:19.09/vabw/8 2006.229.15:40:19.24/vbbw/8 2006.229.15:40:19.39/xfe/off,on,12.0 2006.229.15:40:19.77/ifatt/23,28,28,28 2006.229.15:40:20.08/fmout-gps/S +4.52E-07 2006.229.15:40:20.12:!2006.229.15:43:06 2006.229.15:43:06.00:data_valid=off 2006.229.15:43:06.00:"et 2006.229.15:43:06.00:!+3s 2006.229.15:43:09.01:"tape 2006.229.15:43:09.01:postob 2006.229.15:43:09.22/cable/+6.4146E-03 2006.229.15:43:09.22/wx/27.25,1001.8,100 2006.229.15:43:10.08/fmout-gps/S +4.51E-07 2006.229.15:43:10.08:scan_name=229-1545,jd0608,80 2006.229.15:43:10.08:source=2136+141,213901.31,142336.0,2000.0,ccw 2006.229.15:43:11.13#flagr#flagr/antenna,new-source 2006.229.15:43:11.13:checkk5 2006.229.15:43:11.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:43:11.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:43:12.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:43:12.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:43:13.11/chk_obsdata//k5ts1/T2291540??a.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.15:43:13.52/chk_obsdata//k5ts2/T2291540??b.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.15:43:13.90/chk_obsdata//k5ts3/T2291540??c.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.15:43:14.31/chk_obsdata//k5ts4/T2291540??d.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.15:43:15.00/k5log//k5ts1_log_newline 2006.229.15:43:15.71/k5log//k5ts2_log_newline 2006.229.15:43:16.41/k5log//k5ts3_log_newline 2006.229.15:43:17.11/k5log//k5ts4_log_newline 2006.229.15:43:17.14/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:43:17.14:setupk4=1 2006.229.15:43:17.14$setupk4/echo=on 2006.229.15:43:17.14$setupk4/pcalon 2006.229.15:43:17.14$pcalon/"no phase cal control is implemented here 2006.229.15:43:17.14$setupk4/"tpicd=stop 2006.229.15:43:17.14$setupk4/"rec=synch_on 2006.229.15:43:17.14$setupk4/"rec_mode=128 2006.229.15:43:17.14$setupk4/!* 2006.229.15:43:17.14$setupk4/recpk4 2006.229.15:43:17.14$recpk4/recpatch= 2006.229.15:43:17.15$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:43:17.15$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:43:17.15$setupk4/vck44 2006.229.15:43:17.15$vck44/valo=1,524.99 2006.229.15:43:17.15#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:43:17.15#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:43:17.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:17.15#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:17.15#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:17.15#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:17.15#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:43:17.15#ibcon#first serial, iclass 26, count 0 2006.229.15:43:17.15#ibcon#enter sib2, iclass 26, count 0 2006.229.15:43:17.15#ibcon#flushed, iclass 26, count 0 2006.229.15:43:17.15#ibcon#about to write, iclass 26, count 0 2006.229.15:43:17.15#ibcon#wrote, iclass 26, count 0 2006.229.15:43:17.15#ibcon#about to read 3, iclass 26, count 0 2006.229.15:43:17.16#ibcon#read 3, iclass 26, count 0 2006.229.15:43:17.16#ibcon#about to read 4, iclass 26, count 0 2006.229.15:43:17.16#ibcon#read 4, iclass 26, count 0 2006.229.15:43:17.16#ibcon#about to read 5, iclass 26, count 0 2006.229.15:43:17.16#ibcon#read 5, iclass 26, count 0 2006.229.15:43:17.16#ibcon#about to read 6, iclass 26, count 0 2006.229.15:43:17.16#ibcon#read 6, iclass 26, count 0 2006.229.15:43:17.16#ibcon#end of sib2, iclass 26, count 0 2006.229.15:43:17.16#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:43:17.16#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:43:17.16#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:43:17.16#ibcon#*before write, iclass 26, count 0 2006.229.15:43:17.16#ibcon#enter sib2, iclass 26, count 0 2006.229.15:43:17.16#ibcon#flushed, iclass 26, count 0 2006.229.15:43:17.16#ibcon#about to write, iclass 26, count 0 2006.229.15:43:17.16#ibcon#wrote, iclass 26, count 0 2006.229.15:43:17.16#ibcon#about to read 3, iclass 26, count 0 2006.229.15:43:17.21#ibcon#read 3, iclass 26, count 0 2006.229.15:43:17.21#ibcon#about to read 4, iclass 26, count 0 2006.229.15:43:17.21#ibcon#read 4, iclass 26, count 0 2006.229.15:43:17.21#ibcon#about to read 5, iclass 26, count 0 2006.229.15:43:17.21#ibcon#read 5, iclass 26, count 0 2006.229.15:43:17.21#ibcon#about to read 6, iclass 26, count 0 2006.229.15:43:17.21#ibcon#read 6, iclass 26, count 0 2006.229.15:43:17.21#ibcon#end of sib2, iclass 26, count 0 2006.229.15:43:17.21#ibcon#*after write, iclass 26, count 0 2006.229.15:43:17.21#ibcon#*before return 0, iclass 26, count 0 2006.229.15:43:17.21#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:17.21#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:17.21#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:43:17.21#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:43:17.21$vck44/va=1,8 2006.229.15:43:17.21#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:43:17.21#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:43:17.21#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:17.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:17.21#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:17.21#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:17.21#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:43:17.21#ibcon#first serial, iclass 28, count 2 2006.229.15:43:17.21#ibcon#enter sib2, iclass 28, count 2 2006.229.15:43:17.21#ibcon#flushed, iclass 28, count 2 2006.229.15:43:17.21#ibcon#about to write, iclass 28, count 2 2006.229.15:43:17.21#ibcon#wrote, iclass 28, count 2 2006.229.15:43:17.21#ibcon#about to read 3, iclass 28, count 2 2006.229.15:43:17.23#ibcon#read 3, iclass 28, count 2 2006.229.15:43:17.23#ibcon#about to read 4, iclass 28, count 2 2006.229.15:43:17.23#ibcon#read 4, iclass 28, count 2 2006.229.15:43:17.23#ibcon#about to read 5, iclass 28, count 2 2006.229.15:43:17.23#ibcon#read 5, iclass 28, count 2 2006.229.15:43:17.23#ibcon#about to read 6, iclass 28, count 2 2006.229.15:43:17.23#ibcon#read 6, iclass 28, count 2 2006.229.15:43:17.23#ibcon#end of sib2, iclass 28, count 2 2006.229.15:43:17.23#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:43:17.23#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:43:17.23#ibcon#[25=AT01-08\r\n] 2006.229.15:43:17.23#ibcon#*before write, iclass 28, count 2 2006.229.15:43:17.23#ibcon#enter sib2, iclass 28, count 2 2006.229.15:43:17.23#ibcon#flushed, iclass 28, count 2 2006.229.15:43:17.23#ibcon#about to write, iclass 28, count 2 2006.229.15:43:17.23#ibcon#wrote, iclass 28, count 2 2006.229.15:43:17.23#ibcon#about to read 3, iclass 28, count 2 2006.229.15:43:17.26#ibcon#read 3, iclass 28, count 2 2006.229.15:43:17.26#ibcon#about to read 4, iclass 28, count 2 2006.229.15:43:17.26#ibcon#read 4, iclass 28, count 2 2006.229.15:43:17.26#ibcon#about to read 5, iclass 28, count 2 2006.229.15:43:17.26#ibcon#read 5, iclass 28, count 2 2006.229.15:43:17.26#ibcon#about to read 6, iclass 28, count 2 2006.229.15:43:17.26#ibcon#read 6, iclass 28, count 2 2006.229.15:43:17.26#ibcon#end of sib2, iclass 28, count 2 2006.229.15:43:17.26#ibcon#*after write, iclass 28, count 2 2006.229.15:43:17.26#ibcon#*before return 0, iclass 28, count 2 2006.229.15:43:17.26#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:17.26#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:17.26#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:43:17.26#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:17.26#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:17.38#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:17.38#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:17.38#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:43:17.38#ibcon#first serial, iclass 28, count 0 2006.229.15:43:17.38#ibcon#enter sib2, iclass 28, count 0 2006.229.15:43:17.38#ibcon#flushed, iclass 28, count 0 2006.229.15:43:17.38#ibcon#about to write, iclass 28, count 0 2006.229.15:43:17.38#ibcon#wrote, iclass 28, count 0 2006.229.15:43:17.38#ibcon#about to read 3, iclass 28, count 0 2006.229.15:43:17.40#ibcon#read 3, iclass 28, count 0 2006.229.15:43:17.40#ibcon#about to read 4, iclass 28, count 0 2006.229.15:43:17.40#ibcon#read 4, iclass 28, count 0 2006.229.15:43:17.40#ibcon#about to read 5, iclass 28, count 0 2006.229.15:43:17.40#ibcon#read 5, iclass 28, count 0 2006.229.15:43:17.40#ibcon#about to read 6, iclass 28, count 0 2006.229.15:43:17.40#ibcon#read 6, iclass 28, count 0 2006.229.15:43:17.40#ibcon#end of sib2, iclass 28, count 0 2006.229.15:43:17.40#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:43:17.40#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:43:17.40#ibcon#[25=USB\r\n] 2006.229.15:43:17.40#ibcon#*before write, iclass 28, count 0 2006.229.15:43:17.40#ibcon#enter sib2, iclass 28, count 0 2006.229.15:43:17.40#ibcon#flushed, iclass 28, count 0 2006.229.15:43:17.40#ibcon#about to write, iclass 28, count 0 2006.229.15:43:17.40#ibcon#wrote, iclass 28, count 0 2006.229.15:43:17.40#ibcon#about to read 3, iclass 28, count 0 2006.229.15:43:17.43#ibcon#read 3, iclass 28, count 0 2006.229.15:43:17.43#ibcon#about to read 4, iclass 28, count 0 2006.229.15:43:17.43#ibcon#read 4, iclass 28, count 0 2006.229.15:43:17.43#ibcon#about to read 5, iclass 28, count 0 2006.229.15:43:17.43#ibcon#read 5, iclass 28, count 0 2006.229.15:43:17.43#ibcon#about to read 6, iclass 28, count 0 2006.229.15:43:17.43#ibcon#read 6, iclass 28, count 0 2006.229.15:43:17.43#ibcon#end of sib2, iclass 28, count 0 2006.229.15:43:17.43#ibcon#*after write, iclass 28, count 0 2006.229.15:43:17.43#ibcon#*before return 0, iclass 28, count 0 2006.229.15:43:17.43#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:17.43#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:17.43#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:43:17.43#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:43:17.43$vck44/valo=2,534.99 2006.229.15:43:17.43#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:43:17.43#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:43:17.43#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:17.43#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:17.43#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:17.43#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:17.43#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:43:17.43#ibcon#first serial, iclass 30, count 0 2006.229.15:43:17.43#ibcon#enter sib2, iclass 30, count 0 2006.229.15:43:17.43#ibcon#flushed, iclass 30, count 0 2006.229.15:43:17.43#ibcon#about to write, iclass 30, count 0 2006.229.15:43:17.43#ibcon#wrote, iclass 30, count 0 2006.229.15:43:17.43#ibcon#about to read 3, iclass 30, count 0 2006.229.15:43:17.45#ibcon#read 3, iclass 30, count 0 2006.229.15:43:17.45#ibcon#about to read 4, iclass 30, count 0 2006.229.15:43:17.45#ibcon#read 4, iclass 30, count 0 2006.229.15:43:17.45#ibcon#about to read 5, iclass 30, count 0 2006.229.15:43:17.45#ibcon#read 5, iclass 30, count 0 2006.229.15:43:17.45#ibcon#about to read 6, iclass 30, count 0 2006.229.15:43:17.45#ibcon#read 6, iclass 30, count 0 2006.229.15:43:17.45#ibcon#end of sib2, iclass 30, count 0 2006.229.15:43:17.45#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:43:17.45#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:43:17.45#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:43:17.45#ibcon#*before write, iclass 30, count 0 2006.229.15:43:17.45#ibcon#enter sib2, iclass 30, count 0 2006.229.15:43:17.45#ibcon#flushed, iclass 30, count 0 2006.229.15:43:17.45#ibcon#about to write, iclass 30, count 0 2006.229.15:43:17.45#ibcon#wrote, iclass 30, count 0 2006.229.15:43:17.45#ibcon#about to read 3, iclass 30, count 0 2006.229.15:43:17.49#ibcon#read 3, iclass 30, count 0 2006.229.15:43:17.49#ibcon#about to read 4, iclass 30, count 0 2006.229.15:43:17.49#ibcon#read 4, iclass 30, count 0 2006.229.15:43:17.49#ibcon#about to read 5, iclass 30, count 0 2006.229.15:43:17.49#ibcon#read 5, iclass 30, count 0 2006.229.15:43:17.49#ibcon#about to read 6, iclass 30, count 0 2006.229.15:43:17.49#ibcon#read 6, iclass 30, count 0 2006.229.15:43:17.49#ibcon#end of sib2, iclass 30, count 0 2006.229.15:43:17.49#ibcon#*after write, iclass 30, count 0 2006.229.15:43:17.49#ibcon#*before return 0, iclass 30, count 0 2006.229.15:43:17.49#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:17.49#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:17.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:43:17.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:43:17.49$vck44/va=2,7 2006.229.15:43:17.49#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:43:17.49#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:43:17.49#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:17.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:17.55#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:17.55#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:17.55#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:43:17.55#ibcon#first serial, iclass 32, count 2 2006.229.15:43:17.55#ibcon#enter sib2, iclass 32, count 2 2006.229.15:43:17.55#ibcon#flushed, iclass 32, count 2 2006.229.15:43:17.55#ibcon#about to write, iclass 32, count 2 2006.229.15:43:17.55#ibcon#wrote, iclass 32, count 2 2006.229.15:43:17.55#ibcon#about to read 3, iclass 32, count 2 2006.229.15:43:17.57#ibcon#read 3, iclass 32, count 2 2006.229.15:43:17.57#ibcon#about to read 4, iclass 32, count 2 2006.229.15:43:17.57#ibcon#read 4, iclass 32, count 2 2006.229.15:43:17.57#ibcon#about to read 5, iclass 32, count 2 2006.229.15:43:17.57#ibcon#read 5, iclass 32, count 2 2006.229.15:43:17.57#ibcon#about to read 6, iclass 32, count 2 2006.229.15:43:17.57#ibcon#read 6, iclass 32, count 2 2006.229.15:43:17.57#ibcon#end of sib2, iclass 32, count 2 2006.229.15:43:17.57#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:43:17.57#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:43:17.57#ibcon#[25=AT02-07\r\n] 2006.229.15:43:17.57#ibcon#*before write, iclass 32, count 2 2006.229.15:43:17.57#ibcon#enter sib2, iclass 32, count 2 2006.229.15:43:17.57#ibcon#flushed, iclass 32, count 2 2006.229.15:43:17.57#ibcon#about to write, iclass 32, count 2 2006.229.15:43:17.57#ibcon#wrote, iclass 32, count 2 2006.229.15:43:17.57#ibcon#about to read 3, iclass 32, count 2 2006.229.15:43:17.60#ibcon#read 3, iclass 32, count 2 2006.229.15:43:17.60#ibcon#about to read 4, iclass 32, count 2 2006.229.15:43:17.60#ibcon#read 4, iclass 32, count 2 2006.229.15:43:17.60#ibcon#about to read 5, iclass 32, count 2 2006.229.15:43:17.60#ibcon#read 5, iclass 32, count 2 2006.229.15:43:17.60#ibcon#about to read 6, iclass 32, count 2 2006.229.15:43:17.60#ibcon#read 6, iclass 32, count 2 2006.229.15:43:17.60#ibcon#end of sib2, iclass 32, count 2 2006.229.15:43:17.60#ibcon#*after write, iclass 32, count 2 2006.229.15:43:17.60#ibcon#*before return 0, iclass 32, count 2 2006.229.15:43:17.60#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:17.60#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:17.60#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:43:17.60#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:17.60#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:17.72#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:17.72#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:17.72#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:43:17.72#ibcon#first serial, iclass 32, count 0 2006.229.15:43:17.72#ibcon#enter sib2, iclass 32, count 0 2006.229.15:43:17.72#ibcon#flushed, iclass 32, count 0 2006.229.15:43:17.72#ibcon#about to write, iclass 32, count 0 2006.229.15:43:17.72#ibcon#wrote, iclass 32, count 0 2006.229.15:43:17.72#ibcon#about to read 3, iclass 32, count 0 2006.229.15:43:17.74#ibcon#read 3, iclass 32, count 0 2006.229.15:43:17.74#ibcon#about to read 4, iclass 32, count 0 2006.229.15:43:17.74#ibcon#read 4, iclass 32, count 0 2006.229.15:43:17.74#ibcon#about to read 5, iclass 32, count 0 2006.229.15:43:17.74#ibcon#read 5, iclass 32, count 0 2006.229.15:43:17.74#ibcon#about to read 6, iclass 32, count 0 2006.229.15:43:17.74#ibcon#read 6, iclass 32, count 0 2006.229.15:43:17.74#ibcon#end of sib2, iclass 32, count 0 2006.229.15:43:17.74#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:43:17.74#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:43:17.74#ibcon#[25=USB\r\n] 2006.229.15:43:17.74#ibcon#*before write, iclass 32, count 0 2006.229.15:43:17.74#ibcon#enter sib2, iclass 32, count 0 2006.229.15:43:17.74#ibcon#flushed, iclass 32, count 0 2006.229.15:43:17.74#ibcon#about to write, iclass 32, count 0 2006.229.15:43:17.74#ibcon#wrote, iclass 32, count 0 2006.229.15:43:17.74#ibcon#about to read 3, iclass 32, count 0 2006.229.15:43:17.77#ibcon#read 3, iclass 32, count 0 2006.229.15:43:17.77#ibcon#about to read 4, iclass 32, count 0 2006.229.15:43:17.77#ibcon#read 4, iclass 32, count 0 2006.229.15:43:17.77#ibcon#about to read 5, iclass 32, count 0 2006.229.15:43:17.77#ibcon#read 5, iclass 32, count 0 2006.229.15:43:17.77#ibcon#about to read 6, iclass 32, count 0 2006.229.15:43:17.77#ibcon#read 6, iclass 32, count 0 2006.229.15:43:17.77#ibcon#end of sib2, iclass 32, count 0 2006.229.15:43:17.77#ibcon#*after write, iclass 32, count 0 2006.229.15:43:17.77#ibcon#*before return 0, iclass 32, count 0 2006.229.15:43:17.77#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:17.77#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:17.77#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:43:17.77#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:43:17.77$vck44/valo=3,564.99 2006.229.15:43:17.77#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:43:17.77#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:43:17.77#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:17.77#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:17.77#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:17.77#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:17.77#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:43:17.77#ibcon#first serial, iclass 34, count 0 2006.229.15:43:17.77#ibcon#enter sib2, iclass 34, count 0 2006.229.15:43:17.77#ibcon#flushed, iclass 34, count 0 2006.229.15:43:17.77#ibcon#about to write, iclass 34, count 0 2006.229.15:43:17.77#ibcon#wrote, iclass 34, count 0 2006.229.15:43:17.77#ibcon#about to read 3, iclass 34, count 0 2006.229.15:43:17.79#ibcon#read 3, iclass 34, count 0 2006.229.15:43:17.79#ibcon#about to read 4, iclass 34, count 0 2006.229.15:43:17.79#ibcon#read 4, iclass 34, count 0 2006.229.15:43:17.79#ibcon#about to read 5, iclass 34, count 0 2006.229.15:43:17.79#ibcon#read 5, iclass 34, count 0 2006.229.15:43:17.79#ibcon#about to read 6, iclass 34, count 0 2006.229.15:43:17.79#ibcon#read 6, iclass 34, count 0 2006.229.15:43:17.79#ibcon#end of sib2, iclass 34, count 0 2006.229.15:43:17.79#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:43:17.79#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:43:17.79#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:43:17.79#ibcon#*before write, iclass 34, count 0 2006.229.15:43:17.79#ibcon#enter sib2, iclass 34, count 0 2006.229.15:43:17.79#ibcon#flushed, iclass 34, count 0 2006.229.15:43:17.79#ibcon#about to write, iclass 34, count 0 2006.229.15:43:17.79#ibcon#wrote, iclass 34, count 0 2006.229.15:43:17.79#ibcon#about to read 3, iclass 34, count 0 2006.229.15:43:17.83#ibcon#read 3, iclass 34, count 0 2006.229.15:43:17.83#ibcon#about to read 4, iclass 34, count 0 2006.229.15:43:17.83#ibcon#read 4, iclass 34, count 0 2006.229.15:43:17.83#ibcon#about to read 5, iclass 34, count 0 2006.229.15:43:17.83#ibcon#read 5, iclass 34, count 0 2006.229.15:43:17.83#ibcon#about to read 6, iclass 34, count 0 2006.229.15:43:17.83#ibcon#read 6, iclass 34, count 0 2006.229.15:43:17.83#ibcon#end of sib2, iclass 34, count 0 2006.229.15:43:17.83#ibcon#*after write, iclass 34, count 0 2006.229.15:43:17.83#ibcon#*before return 0, iclass 34, count 0 2006.229.15:43:17.83#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:17.83#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:17.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:43:17.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:43:17.83$vck44/va=3,6 2006.229.15:43:17.83#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:43:17.83#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:43:17.83#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:17.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:17.89#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:17.89#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:17.89#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:43:17.89#ibcon#first serial, iclass 36, count 2 2006.229.15:43:17.89#ibcon#enter sib2, iclass 36, count 2 2006.229.15:43:17.89#ibcon#flushed, iclass 36, count 2 2006.229.15:43:17.89#ibcon#about to write, iclass 36, count 2 2006.229.15:43:17.89#ibcon#wrote, iclass 36, count 2 2006.229.15:43:17.89#ibcon#about to read 3, iclass 36, count 2 2006.229.15:43:17.91#ibcon#read 3, iclass 36, count 2 2006.229.15:43:17.91#ibcon#about to read 4, iclass 36, count 2 2006.229.15:43:17.91#ibcon#read 4, iclass 36, count 2 2006.229.15:43:17.91#ibcon#about to read 5, iclass 36, count 2 2006.229.15:43:17.91#ibcon#read 5, iclass 36, count 2 2006.229.15:43:17.91#ibcon#about to read 6, iclass 36, count 2 2006.229.15:43:17.91#ibcon#read 6, iclass 36, count 2 2006.229.15:43:17.91#ibcon#end of sib2, iclass 36, count 2 2006.229.15:43:17.91#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:43:17.91#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:43:17.91#ibcon#[25=AT03-06\r\n] 2006.229.15:43:17.91#ibcon#*before write, iclass 36, count 2 2006.229.15:43:17.91#ibcon#enter sib2, iclass 36, count 2 2006.229.15:43:17.91#ibcon#flushed, iclass 36, count 2 2006.229.15:43:17.91#ibcon#about to write, iclass 36, count 2 2006.229.15:43:17.91#ibcon#wrote, iclass 36, count 2 2006.229.15:43:17.91#ibcon#about to read 3, iclass 36, count 2 2006.229.15:43:17.94#ibcon#read 3, iclass 36, count 2 2006.229.15:43:17.94#ibcon#about to read 4, iclass 36, count 2 2006.229.15:43:17.94#ibcon#read 4, iclass 36, count 2 2006.229.15:43:17.94#ibcon#about to read 5, iclass 36, count 2 2006.229.15:43:17.94#ibcon#read 5, iclass 36, count 2 2006.229.15:43:17.94#ibcon#about to read 6, iclass 36, count 2 2006.229.15:43:17.94#ibcon#read 6, iclass 36, count 2 2006.229.15:43:17.94#ibcon#end of sib2, iclass 36, count 2 2006.229.15:43:17.94#ibcon#*after write, iclass 36, count 2 2006.229.15:43:17.94#ibcon#*before return 0, iclass 36, count 2 2006.229.15:43:17.94#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:17.94#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:17.94#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:43:17.94#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:17.94#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:18.06#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:18.06#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:18.06#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:43:18.06#ibcon#first serial, iclass 36, count 0 2006.229.15:43:18.06#ibcon#enter sib2, iclass 36, count 0 2006.229.15:43:18.06#ibcon#flushed, iclass 36, count 0 2006.229.15:43:18.06#ibcon#about to write, iclass 36, count 0 2006.229.15:43:18.06#ibcon#wrote, iclass 36, count 0 2006.229.15:43:18.06#ibcon#about to read 3, iclass 36, count 0 2006.229.15:43:18.08#ibcon#read 3, iclass 36, count 0 2006.229.15:43:18.08#ibcon#about to read 4, iclass 36, count 0 2006.229.15:43:18.08#ibcon#read 4, iclass 36, count 0 2006.229.15:43:18.08#ibcon#about to read 5, iclass 36, count 0 2006.229.15:43:18.08#ibcon#read 5, iclass 36, count 0 2006.229.15:43:18.08#ibcon#about to read 6, iclass 36, count 0 2006.229.15:43:18.08#ibcon#read 6, iclass 36, count 0 2006.229.15:43:18.08#ibcon#end of sib2, iclass 36, count 0 2006.229.15:43:18.08#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:43:18.08#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:43:18.08#ibcon#[25=USB\r\n] 2006.229.15:43:18.08#ibcon#*before write, iclass 36, count 0 2006.229.15:43:18.08#ibcon#enter sib2, iclass 36, count 0 2006.229.15:43:18.08#ibcon#flushed, iclass 36, count 0 2006.229.15:43:18.08#ibcon#about to write, iclass 36, count 0 2006.229.15:43:18.08#ibcon#wrote, iclass 36, count 0 2006.229.15:43:18.08#ibcon#about to read 3, iclass 36, count 0 2006.229.15:43:18.11#ibcon#read 3, iclass 36, count 0 2006.229.15:43:18.11#ibcon#about to read 4, iclass 36, count 0 2006.229.15:43:18.11#ibcon#read 4, iclass 36, count 0 2006.229.15:43:18.11#ibcon#about to read 5, iclass 36, count 0 2006.229.15:43:18.11#ibcon#read 5, iclass 36, count 0 2006.229.15:43:18.11#ibcon#about to read 6, iclass 36, count 0 2006.229.15:43:18.11#ibcon#read 6, iclass 36, count 0 2006.229.15:43:18.11#ibcon#end of sib2, iclass 36, count 0 2006.229.15:43:18.11#ibcon#*after write, iclass 36, count 0 2006.229.15:43:18.11#ibcon#*before return 0, iclass 36, count 0 2006.229.15:43:18.11#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:18.11#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:18.11#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:43:18.11#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:43:18.11$vck44/valo=4,624.99 2006.229.15:43:18.11#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:43:18.11#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:43:18.11#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:18.11#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:18.11#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:18.11#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:18.11#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:43:18.11#ibcon#first serial, iclass 38, count 0 2006.229.15:43:18.11#ibcon#enter sib2, iclass 38, count 0 2006.229.15:43:18.11#ibcon#flushed, iclass 38, count 0 2006.229.15:43:18.11#ibcon#about to write, iclass 38, count 0 2006.229.15:43:18.11#ibcon#wrote, iclass 38, count 0 2006.229.15:43:18.11#ibcon#about to read 3, iclass 38, count 0 2006.229.15:43:18.13#ibcon#read 3, iclass 38, count 0 2006.229.15:43:18.13#ibcon#about to read 4, iclass 38, count 0 2006.229.15:43:18.13#ibcon#read 4, iclass 38, count 0 2006.229.15:43:18.13#ibcon#about to read 5, iclass 38, count 0 2006.229.15:43:18.13#ibcon#read 5, iclass 38, count 0 2006.229.15:43:18.13#ibcon#about to read 6, iclass 38, count 0 2006.229.15:43:18.13#ibcon#read 6, iclass 38, count 0 2006.229.15:43:18.13#ibcon#end of sib2, iclass 38, count 0 2006.229.15:43:18.13#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:43:18.13#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:43:18.13#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:43:18.13#ibcon#*before write, iclass 38, count 0 2006.229.15:43:18.13#ibcon#enter sib2, iclass 38, count 0 2006.229.15:43:18.13#ibcon#flushed, iclass 38, count 0 2006.229.15:43:18.13#ibcon#about to write, iclass 38, count 0 2006.229.15:43:18.13#ibcon#wrote, iclass 38, count 0 2006.229.15:43:18.13#ibcon#about to read 3, iclass 38, count 0 2006.229.15:43:18.17#ibcon#read 3, iclass 38, count 0 2006.229.15:43:18.17#ibcon#about to read 4, iclass 38, count 0 2006.229.15:43:18.17#ibcon#read 4, iclass 38, count 0 2006.229.15:43:18.17#ibcon#about to read 5, iclass 38, count 0 2006.229.15:43:18.17#ibcon#read 5, iclass 38, count 0 2006.229.15:43:18.17#ibcon#about to read 6, iclass 38, count 0 2006.229.15:43:18.17#ibcon#read 6, iclass 38, count 0 2006.229.15:43:18.17#ibcon#end of sib2, iclass 38, count 0 2006.229.15:43:18.17#ibcon#*after write, iclass 38, count 0 2006.229.15:43:18.17#ibcon#*before return 0, iclass 38, count 0 2006.229.15:43:18.17#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:18.17#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:18.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:43:18.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:43:18.17$vck44/va=4,7 2006.229.15:43:18.17#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:43:18.17#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:43:18.17#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:18.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:18.23#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:18.23#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:18.23#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:43:18.23#ibcon#first serial, iclass 40, count 2 2006.229.15:43:18.23#ibcon#enter sib2, iclass 40, count 2 2006.229.15:43:18.23#ibcon#flushed, iclass 40, count 2 2006.229.15:43:18.23#ibcon#about to write, iclass 40, count 2 2006.229.15:43:18.23#ibcon#wrote, iclass 40, count 2 2006.229.15:43:18.23#ibcon#about to read 3, iclass 40, count 2 2006.229.15:43:18.25#ibcon#read 3, iclass 40, count 2 2006.229.15:43:18.25#ibcon#about to read 4, iclass 40, count 2 2006.229.15:43:18.25#ibcon#read 4, iclass 40, count 2 2006.229.15:43:18.25#ibcon#about to read 5, iclass 40, count 2 2006.229.15:43:18.25#ibcon#read 5, iclass 40, count 2 2006.229.15:43:18.25#ibcon#about to read 6, iclass 40, count 2 2006.229.15:43:18.25#ibcon#read 6, iclass 40, count 2 2006.229.15:43:18.25#ibcon#end of sib2, iclass 40, count 2 2006.229.15:43:18.25#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:43:18.25#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:43:18.25#ibcon#[25=AT04-07\r\n] 2006.229.15:43:18.25#ibcon#*before write, iclass 40, count 2 2006.229.15:43:18.25#ibcon#enter sib2, iclass 40, count 2 2006.229.15:43:18.25#ibcon#flushed, iclass 40, count 2 2006.229.15:43:18.25#ibcon#about to write, iclass 40, count 2 2006.229.15:43:18.25#ibcon#wrote, iclass 40, count 2 2006.229.15:43:18.25#ibcon#about to read 3, iclass 40, count 2 2006.229.15:43:18.28#ibcon#read 3, iclass 40, count 2 2006.229.15:43:18.28#ibcon#about to read 4, iclass 40, count 2 2006.229.15:43:18.28#ibcon#read 4, iclass 40, count 2 2006.229.15:43:18.28#ibcon#about to read 5, iclass 40, count 2 2006.229.15:43:18.28#ibcon#read 5, iclass 40, count 2 2006.229.15:43:18.28#ibcon#about to read 6, iclass 40, count 2 2006.229.15:43:18.28#ibcon#read 6, iclass 40, count 2 2006.229.15:43:18.28#ibcon#end of sib2, iclass 40, count 2 2006.229.15:43:18.28#ibcon#*after write, iclass 40, count 2 2006.229.15:43:18.28#ibcon#*before return 0, iclass 40, count 2 2006.229.15:43:18.28#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:18.28#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:18.28#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:43:18.28#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:18.28#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:18.40#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:18.40#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:18.40#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:43:18.40#ibcon#first serial, iclass 40, count 0 2006.229.15:43:18.40#ibcon#enter sib2, iclass 40, count 0 2006.229.15:43:18.40#ibcon#flushed, iclass 40, count 0 2006.229.15:43:18.40#ibcon#about to write, iclass 40, count 0 2006.229.15:43:18.40#ibcon#wrote, iclass 40, count 0 2006.229.15:43:18.40#ibcon#about to read 3, iclass 40, count 0 2006.229.15:43:18.42#ibcon#read 3, iclass 40, count 0 2006.229.15:43:18.42#ibcon#about to read 4, iclass 40, count 0 2006.229.15:43:18.42#ibcon#read 4, iclass 40, count 0 2006.229.15:43:18.42#ibcon#about to read 5, iclass 40, count 0 2006.229.15:43:18.42#ibcon#read 5, iclass 40, count 0 2006.229.15:43:18.42#ibcon#about to read 6, iclass 40, count 0 2006.229.15:43:18.42#ibcon#read 6, iclass 40, count 0 2006.229.15:43:18.42#ibcon#end of sib2, iclass 40, count 0 2006.229.15:43:18.42#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:43:18.42#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:43:18.42#ibcon#[25=USB\r\n] 2006.229.15:43:18.42#ibcon#*before write, iclass 40, count 0 2006.229.15:43:18.42#ibcon#enter sib2, iclass 40, count 0 2006.229.15:43:18.42#ibcon#flushed, iclass 40, count 0 2006.229.15:43:18.42#ibcon#about to write, iclass 40, count 0 2006.229.15:43:18.42#ibcon#wrote, iclass 40, count 0 2006.229.15:43:18.42#ibcon#about to read 3, iclass 40, count 0 2006.229.15:43:18.45#ibcon#read 3, iclass 40, count 0 2006.229.15:43:18.45#ibcon#about to read 4, iclass 40, count 0 2006.229.15:43:18.45#ibcon#read 4, iclass 40, count 0 2006.229.15:43:18.45#ibcon#about to read 5, iclass 40, count 0 2006.229.15:43:18.45#ibcon#read 5, iclass 40, count 0 2006.229.15:43:18.45#ibcon#about to read 6, iclass 40, count 0 2006.229.15:43:18.45#ibcon#read 6, iclass 40, count 0 2006.229.15:43:18.45#ibcon#end of sib2, iclass 40, count 0 2006.229.15:43:18.45#ibcon#*after write, iclass 40, count 0 2006.229.15:43:18.45#ibcon#*before return 0, iclass 40, count 0 2006.229.15:43:18.45#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:18.45#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:18.45#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:43:18.45#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:43:18.45$vck44/valo=5,734.99 2006.229.15:43:18.45#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:43:18.45#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:43:18.45#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:18.45#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:18.45#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:18.45#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:18.45#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:43:18.45#ibcon#first serial, iclass 4, count 0 2006.229.15:43:18.45#ibcon#enter sib2, iclass 4, count 0 2006.229.15:43:18.45#ibcon#flushed, iclass 4, count 0 2006.229.15:43:18.45#ibcon#about to write, iclass 4, count 0 2006.229.15:43:18.45#ibcon#wrote, iclass 4, count 0 2006.229.15:43:18.45#ibcon#about to read 3, iclass 4, count 0 2006.229.15:43:18.47#ibcon#read 3, iclass 4, count 0 2006.229.15:43:18.47#ibcon#about to read 4, iclass 4, count 0 2006.229.15:43:18.47#ibcon#read 4, iclass 4, count 0 2006.229.15:43:18.47#ibcon#about to read 5, iclass 4, count 0 2006.229.15:43:18.47#ibcon#read 5, iclass 4, count 0 2006.229.15:43:18.47#ibcon#about to read 6, iclass 4, count 0 2006.229.15:43:18.47#ibcon#read 6, iclass 4, count 0 2006.229.15:43:18.47#ibcon#end of sib2, iclass 4, count 0 2006.229.15:43:18.47#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:43:18.47#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:43:18.47#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:43:18.47#ibcon#*before write, iclass 4, count 0 2006.229.15:43:18.47#ibcon#enter sib2, iclass 4, count 0 2006.229.15:43:18.47#ibcon#flushed, iclass 4, count 0 2006.229.15:43:18.47#ibcon#about to write, iclass 4, count 0 2006.229.15:43:18.47#ibcon#wrote, iclass 4, count 0 2006.229.15:43:18.47#ibcon#about to read 3, iclass 4, count 0 2006.229.15:43:18.51#ibcon#read 3, iclass 4, count 0 2006.229.15:43:18.51#ibcon#about to read 4, iclass 4, count 0 2006.229.15:43:18.51#ibcon#read 4, iclass 4, count 0 2006.229.15:43:18.51#ibcon#about to read 5, iclass 4, count 0 2006.229.15:43:18.51#ibcon#read 5, iclass 4, count 0 2006.229.15:43:18.51#ibcon#about to read 6, iclass 4, count 0 2006.229.15:43:18.51#ibcon#read 6, iclass 4, count 0 2006.229.15:43:18.51#ibcon#end of sib2, iclass 4, count 0 2006.229.15:43:18.51#ibcon#*after write, iclass 4, count 0 2006.229.15:43:18.51#ibcon#*before return 0, iclass 4, count 0 2006.229.15:43:18.51#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:18.51#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:18.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:43:18.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:43:18.51$vck44/va=5,4 2006.229.15:43:18.51#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:43:18.51#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:43:18.51#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:18.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:18.57#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:18.57#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:18.57#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:43:18.57#ibcon#first serial, iclass 6, count 2 2006.229.15:43:18.57#ibcon#enter sib2, iclass 6, count 2 2006.229.15:43:18.57#ibcon#flushed, iclass 6, count 2 2006.229.15:43:18.57#ibcon#about to write, iclass 6, count 2 2006.229.15:43:18.57#ibcon#wrote, iclass 6, count 2 2006.229.15:43:18.57#ibcon#about to read 3, iclass 6, count 2 2006.229.15:43:18.59#ibcon#read 3, iclass 6, count 2 2006.229.15:43:18.59#ibcon#about to read 4, iclass 6, count 2 2006.229.15:43:18.59#ibcon#read 4, iclass 6, count 2 2006.229.15:43:18.59#ibcon#about to read 5, iclass 6, count 2 2006.229.15:43:18.59#ibcon#read 5, iclass 6, count 2 2006.229.15:43:18.59#ibcon#about to read 6, iclass 6, count 2 2006.229.15:43:18.59#ibcon#read 6, iclass 6, count 2 2006.229.15:43:18.59#ibcon#end of sib2, iclass 6, count 2 2006.229.15:43:18.59#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:43:18.59#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:43:18.59#ibcon#[25=AT05-04\r\n] 2006.229.15:43:18.59#ibcon#*before write, iclass 6, count 2 2006.229.15:43:18.59#ibcon#enter sib2, iclass 6, count 2 2006.229.15:43:18.59#ibcon#flushed, iclass 6, count 2 2006.229.15:43:18.59#ibcon#about to write, iclass 6, count 2 2006.229.15:43:18.59#ibcon#wrote, iclass 6, count 2 2006.229.15:43:18.59#ibcon#about to read 3, iclass 6, count 2 2006.229.15:43:18.62#ibcon#read 3, iclass 6, count 2 2006.229.15:43:18.62#ibcon#about to read 4, iclass 6, count 2 2006.229.15:43:18.62#ibcon#read 4, iclass 6, count 2 2006.229.15:43:18.62#ibcon#about to read 5, iclass 6, count 2 2006.229.15:43:18.62#ibcon#read 5, iclass 6, count 2 2006.229.15:43:18.62#ibcon#about to read 6, iclass 6, count 2 2006.229.15:43:18.62#ibcon#read 6, iclass 6, count 2 2006.229.15:43:18.62#ibcon#end of sib2, iclass 6, count 2 2006.229.15:43:18.62#ibcon#*after write, iclass 6, count 2 2006.229.15:43:18.62#ibcon#*before return 0, iclass 6, count 2 2006.229.15:43:18.62#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:18.62#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:18.62#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:43:18.62#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:18.62#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:18.74#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:18.74#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:18.74#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:43:18.74#ibcon#first serial, iclass 6, count 0 2006.229.15:43:18.74#ibcon#enter sib2, iclass 6, count 0 2006.229.15:43:18.74#ibcon#flushed, iclass 6, count 0 2006.229.15:43:18.74#ibcon#about to write, iclass 6, count 0 2006.229.15:43:18.74#ibcon#wrote, iclass 6, count 0 2006.229.15:43:18.74#ibcon#about to read 3, iclass 6, count 0 2006.229.15:43:18.76#ibcon#read 3, iclass 6, count 0 2006.229.15:43:18.76#ibcon#about to read 4, iclass 6, count 0 2006.229.15:43:18.76#ibcon#read 4, iclass 6, count 0 2006.229.15:43:18.76#ibcon#about to read 5, iclass 6, count 0 2006.229.15:43:18.76#ibcon#read 5, iclass 6, count 0 2006.229.15:43:18.76#ibcon#about to read 6, iclass 6, count 0 2006.229.15:43:18.76#ibcon#read 6, iclass 6, count 0 2006.229.15:43:18.76#ibcon#end of sib2, iclass 6, count 0 2006.229.15:43:18.76#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:43:18.76#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:43:18.76#ibcon#[25=USB\r\n] 2006.229.15:43:18.76#ibcon#*before write, iclass 6, count 0 2006.229.15:43:18.76#ibcon#enter sib2, iclass 6, count 0 2006.229.15:43:18.76#ibcon#flushed, iclass 6, count 0 2006.229.15:43:18.76#ibcon#about to write, iclass 6, count 0 2006.229.15:43:18.76#ibcon#wrote, iclass 6, count 0 2006.229.15:43:18.76#ibcon#about to read 3, iclass 6, count 0 2006.229.15:43:18.79#ibcon#read 3, iclass 6, count 0 2006.229.15:43:18.79#ibcon#about to read 4, iclass 6, count 0 2006.229.15:43:18.79#ibcon#read 4, iclass 6, count 0 2006.229.15:43:18.79#ibcon#about to read 5, iclass 6, count 0 2006.229.15:43:18.79#ibcon#read 5, iclass 6, count 0 2006.229.15:43:18.79#ibcon#about to read 6, iclass 6, count 0 2006.229.15:43:18.79#ibcon#read 6, iclass 6, count 0 2006.229.15:43:18.79#ibcon#end of sib2, iclass 6, count 0 2006.229.15:43:18.79#ibcon#*after write, iclass 6, count 0 2006.229.15:43:18.79#ibcon#*before return 0, iclass 6, count 0 2006.229.15:43:18.79#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:18.79#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:18.79#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:43:18.79#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:43:18.79$vck44/valo=6,814.99 2006.229.15:43:18.79#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:43:18.79#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:43:18.79#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:18.79#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:18.79#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:18.79#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:18.79#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:43:18.79#ibcon#first serial, iclass 10, count 0 2006.229.15:43:18.79#ibcon#enter sib2, iclass 10, count 0 2006.229.15:43:18.79#ibcon#flushed, iclass 10, count 0 2006.229.15:43:18.79#ibcon#about to write, iclass 10, count 0 2006.229.15:43:18.79#ibcon#wrote, iclass 10, count 0 2006.229.15:43:18.79#ibcon#about to read 3, iclass 10, count 0 2006.229.15:43:18.81#ibcon#read 3, iclass 10, count 0 2006.229.15:43:18.81#ibcon#about to read 4, iclass 10, count 0 2006.229.15:43:18.81#ibcon#read 4, iclass 10, count 0 2006.229.15:43:18.81#ibcon#about to read 5, iclass 10, count 0 2006.229.15:43:18.81#ibcon#read 5, iclass 10, count 0 2006.229.15:43:18.81#ibcon#about to read 6, iclass 10, count 0 2006.229.15:43:18.81#ibcon#read 6, iclass 10, count 0 2006.229.15:43:18.81#ibcon#end of sib2, iclass 10, count 0 2006.229.15:43:18.81#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:43:18.81#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:43:18.81#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:43:18.81#ibcon#*before write, iclass 10, count 0 2006.229.15:43:18.81#ibcon#enter sib2, iclass 10, count 0 2006.229.15:43:18.81#ibcon#flushed, iclass 10, count 0 2006.229.15:43:18.81#ibcon#about to write, iclass 10, count 0 2006.229.15:43:18.81#ibcon#wrote, iclass 10, count 0 2006.229.15:43:18.81#ibcon#about to read 3, iclass 10, count 0 2006.229.15:43:18.85#ibcon#read 3, iclass 10, count 0 2006.229.15:43:18.85#ibcon#about to read 4, iclass 10, count 0 2006.229.15:43:18.85#ibcon#read 4, iclass 10, count 0 2006.229.15:43:18.85#ibcon#about to read 5, iclass 10, count 0 2006.229.15:43:18.85#ibcon#read 5, iclass 10, count 0 2006.229.15:43:18.85#ibcon#about to read 6, iclass 10, count 0 2006.229.15:43:18.85#ibcon#read 6, iclass 10, count 0 2006.229.15:43:18.85#ibcon#end of sib2, iclass 10, count 0 2006.229.15:43:18.85#ibcon#*after write, iclass 10, count 0 2006.229.15:43:18.85#ibcon#*before return 0, iclass 10, count 0 2006.229.15:43:18.85#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:18.85#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:18.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:43:18.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:43:18.85$vck44/va=6,4 2006.229.15:43:18.85#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:43:18.85#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:43:18.85#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:18.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:18.91#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:18.91#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:18.91#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:43:18.91#ibcon#first serial, iclass 12, count 2 2006.229.15:43:18.91#ibcon#enter sib2, iclass 12, count 2 2006.229.15:43:18.91#ibcon#flushed, iclass 12, count 2 2006.229.15:43:18.91#ibcon#about to write, iclass 12, count 2 2006.229.15:43:18.91#ibcon#wrote, iclass 12, count 2 2006.229.15:43:18.91#ibcon#about to read 3, iclass 12, count 2 2006.229.15:43:18.93#ibcon#read 3, iclass 12, count 2 2006.229.15:43:18.93#ibcon#about to read 4, iclass 12, count 2 2006.229.15:43:18.93#ibcon#read 4, iclass 12, count 2 2006.229.15:43:18.93#ibcon#about to read 5, iclass 12, count 2 2006.229.15:43:18.93#ibcon#read 5, iclass 12, count 2 2006.229.15:43:18.93#ibcon#about to read 6, iclass 12, count 2 2006.229.15:43:18.93#ibcon#read 6, iclass 12, count 2 2006.229.15:43:18.93#ibcon#end of sib2, iclass 12, count 2 2006.229.15:43:18.93#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:43:18.93#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:43:18.93#ibcon#[25=AT06-04\r\n] 2006.229.15:43:18.93#ibcon#*before write, iclass 12, count 2 2006.229.15:43:18.93#ibcon#enter sib2, iclass 12, count 2 2006.229.15:43:18.93#ibcon#flushed, iclass 12, count 2 2006.229.15:43:18.93#ibcon#about to write, iclass 12, count 2 2006.229.15:43:18.93#ibcon#wrote, iclass 12, count 2 2006.229.15:43:18.93#ibcon#about to read 3, iclass 12, count 2 2006.229.15:43:18.96#ibcon#read 3, iclass 12, count 2 2006.229.15:43:18.96#ibcon#about to read 4, iclass 12, count 2 2006.229.15:43:18.96#ibcon#read 4, iclass 12, count 2 2006.229.15:43:18.96#ibcon#about to read 5, iclass 12, count 2 2006.229.15:43:18.96#ibcon#read 5, iclass 12, count 2 2006.229.15:43:18.96#ibcon#about to read 6, iclass 12, count 2 2006.229.15:43:18.96#ibcon#read 6, iclass 12, count 2 2006.229.15:43:18.96#ibcon#end of sib2, iclass 12, count 2 2006.229.15:43:18.96#ibcon#*after write, iclass 12, count 2 2006.229.15:43:18.96#ibcon#*before return 0, iclass 12, count 2 2006.229.15:43:18.96#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:18.96#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:18.96#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:43:18.96#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:18.96#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:19.08#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:19.08#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:19.08#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:43:19.08#ibcon#first serial, iclass 12, count 0 2006.229.15:43:19.08#ibcon#enter sib2, iclass 12, count 0 2006.229.15:43:19.08#ibcon#flushed, iclass 12, count 0 2006.229.15:43:19.08#ibcon#about to write, iclass 12, count 0 2006.229.15:43:19.08#ibcon#wrote, iclass 12, count 0 2006.229.15:43:19.08#ibcon#about to read 3, iclass 12, count 0 2006.229.15:43:19.10#ibcon#read 3, iclass 12, count 0 2006.229.15:43:19.10#ibcon#about to read 4, iclass 12, count 0 2006.229.15:43:19.10#ibcon#read 4, iclass 12, count 0 2006.229.15:43:19.10#ibcon#about to read 5, iclass 12, count 0 2006.229.15:43:19.10#ibcon#read 5, iclass 12, count 0 2006.229.15:43:19.10#ibcon#about to read 6, iclass 12, count 0 2006.229.15:43:19.10#ibcon#read 6, iclass 12, count 0 2006.229.15:43:19.10#ibcon#end of sib2, iclass 12, count 0 2006.229.15:43:19.10#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:43:19.10#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:43:19.10#ibcon#[25=USB\r\n] 2006.229.15:43:19.10#ibcon#*before write, iclass 12, count 0 2006.229.15:43:19.10#ibcon#enter sib2, iclass 12, count 0 2006.229.15:43:19.10#ibcon#flushed, iclass 12, count 0 2006.229.15:43:19.10#ibcon#about to write, iclass 12, count 0 2006.229.15:43:19.10#ibcon#wrote, iclass 12, count 0 2006.229.15:43:19.10#ibcon#about to read 3, iclass 12, count 0 2006.229.15:43:19.13#ibcon#read 3, iclass 12, count 0 2006.229.15:43:19.13#ibcon#about to read 4, iclass 12, count 0 2006.229.15:43:19.13#ibcon#read 4, iclass 12, count 0 2006.229.15:43:19.13#ibcon#about to read 5, iclass 12, count 0 2006.229.15:43:19.13#ibcon#read 5, iclass 12, count 0 2006.229.15:43:19.13#ibcon#about to read 6, iclass 12, count 0 2006.229.15:43:19.13#ibcon#read 6, iclass 12, count 0 2006.229.15:43:19.13#ibcon#end of sib2, iclass 12, count 0 2006.229.15:43:19.13#ibcon#*after write, iclass 12, count 0 2006.229.15:43:19.13#ibcon#*before return 0, iclass 12, count 0 2006.229.15:43:19.13#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:19.13#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:19.13#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:43:19.13#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:43:19.13$vck44/valo=7,864.99 2006.229.15:43:19.13#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:43:19.13#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:43:19.13#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:19.13#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:19.13#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:19.13#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:19.13#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:43:19.13#ibcon#first serial, iclass 14, count 0 2006.229.15:43:19.13#ibcon#enter sib2, iclass 14, count 0 2006.229.15:43:19.13#ibcon#flushed, iclass 14, count 0 2006.229.15:43:19.13#ibcon#about to write, iclass 14, count 0 2006.229.15:43:19.13#ibcon#wrote, iclass 14, count 0 2006.229.15:43:19.13#ibcon#about to read 3, iclass 14, count 0 2006.229.15:43:19.15#ibcon#read 3, iclass 14, count 0 2006.229.15:43:19.15#ibcon#about to read 4, iclass 14, count 0 2006.229.15:43:19.15#ibcon#read 4, iclass 14, count 0 2006.229.15:43:19.15#ibcon#about to read 5, iclass 14, count 0 2006.229.15:43:19.15#ibcon#read 5, iclass 14, count 0 2006.229.15:43:19.15#ibcon#about to read 6, iclass 14, count 0 2006.229.15:43:19.15#ibcon#read 6, iclass 14, count 0 2006.229.15:43:19.15#ibcon#end of sib2, iclass 14, count 0 2006.229.15:43:19.15#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:43:19.15#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:43:19.15#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:43:19.15#ibcon#*before write, iclass 14, count 0 2006.229.15:43:19.15#ibcon#enter sib2, iclass 14, count 0 2006.229.15:43:19.15#ibcon#flushed, iclass 14, count 0 2006.229.15:43:19.15#ibcon#about to write, iclass 14, count 0 2006.229.15:43:19.15#ibcon#wrote, iclass 14, count 0 2006.229.15:43:19.15#ibcon#about to read 3, iclass 14, count 0 2006.229.15:43:19.19#ibcon#read 3, iclass 14, count 0 2006.229.15:43:19.19#ibcon#about to read 4, iclass 14, count 0 2006.229.15:43:19.19#ibcon#read 4, iclass 14, count 0 2006.229.15:43:19.19#ibcon#about to read 5, iclass 14, count 0 2006.229.15:43:19.19#ibcon#read 5, iclass 14, count 0 2006.229.15:43:19.19#ibcon#about to read 6, iclass 14, count 0 2006.229.15:43:19.19#ibcon#read 6, iclass 14, count 0 2006.229.15:43:19.19#ibcon#end of sib2, iclass 14, count 0 2006.229.15:43:19.19#ibcon#*after write, iclass 14, count 0 2006.229.15:43:19.19#ibcon#*before return 0, iclass 14, count 0 2006.229.15:43:19.19#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:19.19#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:19.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:43:19.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:43:19.19$vck44/va=7,5 2006.229.15:43:19.19#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:43:19.19#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:43:19.19#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:19.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:19.25#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:19.25#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:19.25#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:43:19.25#ibcon#first serial, iclass 16, count 2 2006.229.15:43:19.25#ibcon#enter sib2, iclass 16, count 2 2006.229.15:43:19.25#ibcon#flushed, iclass 16, count 2 2006.229.15:43:19.25#ibcon#about to write, iclass 16, count 2 2006.229.15:43:19.25#ibcon#wrote, iclass 16, count 2 2006.229.15:43:19.25#ibcon#about to read 3, iclass 16, count 2 2006.229.15:43:19.27#ibcon#read 3, iclass 16, count 2 2006.229.15:43:19.27#ibcon#about to read 4, iclass 16, count 2 2006.229.15:43:19.27#ibcon#read 4, iclass 16, count 2 2006.229.15:43:19.27#ibcon#about to read 5, iclass 16, count 2 2006.229.15:43:19.27#ibcon#read 5, iclass 16, count 2 2006.229.15:43:19.27#ibcon#about to read 6, iclass 16, count 2 2006.229.15:43:19.27#ibcon#read 6, iclass 16, count 2 2006.229.15:43:19.27#ibcon#end of sib2, iclass 16, count 2 2006.229.15:43:19.27#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:43:19.27#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:43:19.27#ibcon#[25=AT07-05\r\n] 2006.229.15:43:19.27#ibcon#*before write, iclass 16, count 2 2006.229.15:43:19.27#ibcon#enter sib2, iclass 16, count 2 2006.229.15:43:19.27#ibcon#flushed, iclass 16, count 2 2006.229.15:43:19.27#ibcon#about to write, iclass 16, count 2 2006.229.15:43:19.27#ibcon#wrote, iclass 16, count 2 2006.229.15:43:19.27#ibcon#about to read 3, iclass 16, count 2 2006.229.15:43:19.30#ibcon#read 3, iclass 16, count 2 2006.229.15:43:19.30#ibcon#about to read 4, iclass 16, count 2 2006.229.15:43:19.30#ibcon#read 4, iclass 16, count 2 2006.229.15:43:19.30#ibcon#about to read 5, iclass 16, count 2 2006.229.15:43:19.30#ibcon#read 5, iclass 16, count 2 2006.229.15:43:19.30#ibcon#about to read 6, iclass 16, count 2 2006.229.15:43:19.30#ibcon#read 6, iclass 16, count 2 2006.229.15:43:19.30#ibcon#end of sib2, iclass 16, count 2 2006.229.15:43:19.30#ibcon#*after write, iclass 16, count 2 2006.229.15:43:19.30#ibcon#*before return 0, iclass 16, count 2 2006.229.15:43:19.30#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:19.30#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:19.30#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:43:19.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:19.30#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:19.42#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:19.42#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:19.42#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:43:19.42#ibcon#first serial, iclass 16, count 0 2006.229.15:43:19.42#ibcon#enter sib2, iclass 16, count 0 2006.229.15:43:19.42#ibcon#flushed, iclass 16, count 0 2006.229.15:43:19.42#ibcon#about to write, iclass 16, count 0 2006.229.15:43:19.42#ibcon#wrote, iclass 16, count 0 2006.229.15:43:19.42#ibcon#about to read 3, iclass 16, count 0 2006.229.15:43:19.44#ibcon#read 3, iclass 16, count 0 2006.229.15:43:19.44#ibcon#about to read 4, iclass 16, count 0 2006.229.15:43:19.44#ibcon#read 4, iclass 16, count 0 2006.229.15:43:19.44#ibcon#about to read 5, iclass 16, count 0 2006.229.15:43:19.44#ibcon#read 5, iclass 16, count 0 2006.229.15:43:19.44#ibcon#about to read 6, iclass 16, count 0 2006.229.15:43:19.44#ibcon#read 6, iclass 16, count 0 2006.229.15:43:19.44#ibcon#end of sib2, iclass 16, count 0 2006.229.15:43:19.44#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:43:19.44#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:43:19.44#ibcon#[25=USB\r\n] 2006.229.15:43:19.44#ibcon#*before write, iclass 16, count 0 2006.229.15:43:19.44#ibcon#enter sib2, iclass 16, count 0 2006.229.15:43:19.44#ibcon#flushed, iclass 16, count 0 2006.229.15:43:19.44#ibcon#about to write, iclass 16, count 0 2006.229.15:43:19.44#ibcon#wrote, iclass 16, count 0 2006.229.15:43:19.44#ibcon#about to read 3, iclass 16, count 0 2006.229.15:43:19.47#ibcon#read 3, iclass 16, count 0 2006.229.15:43:19.47#ibcon#about to read 4, iclass 16, count 0 2006.229.15:43:19.47#ibcon#read 4, iclass 16, count 0 2006.229.15:43:19.47#ibcon#about to read 5, iclass 16, count 0 2006.229.15:43:19.47#ibcon#read 5, iclass 16, count 0 2006.229.15:43:19.47#ibcon#about to read 6, iclass 16, count 0 2006.229.15:43:19.47#ibcon#read 6, iclass 16, count 0 2006.229.15:43:19.47#ibcon#end of sib2, iclass 16, count 0 2006.229.15:43:19.47#ibcon#*after write, iclass 16, count 0 2006.229.15:43:19.47#ibcon#*before return 0, iclass 16, count 0 2006.229.15:43:19.47#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:19.47#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:19.47#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:43:19.47#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:43:19.47$vck44/valo=8,884.99 2006.229.15:43:19.47#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:43:19.47#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:43:19.47#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:19.47#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:19.47#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:19.47#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:19.47#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:43:19.47#ibcon#first serial, iclass 18, count 0 2006.229.15:43:19.47#ibcon#enter sib2, iclass 18, count 0 2006.229.15:43:19.47#ibcon#flushed, iclass 18, count 0 2006.229.15:43:19.47#ibcon#about to write, iclass 18, count 0 2006.229.15:43:19.47#ibcon#wrote, iclass 18, count 0 2006.229.15:43:19.47#ibcon#about to read 3, iclass 18, count 0 2006.229.15:43:19.49#ibcon#read 3, iclass 18, count 0 2006.229.15:43:19.49#ibcon#about to read 4, iclass 18, count 0 2006.229.15:43:19.49#ibcon#read 4, iclass 18, count 0 2006.229.15:43:19.49#ibcon#about to read 5, iclass 18, count 0 2006.229.15:43:19.49#ibcon#read 5, iclass 18, count 0 2006.229.15:43:19.49#ibcon#about to read 6, iclass 18, count 0 2006.229.15:43:19.49#ibcon#read 6, iclass 18, count 0 2006.229.15:43:19.49#ibcon#end of sib2, iclass 18, count 0 2006.229.15:43:19.49#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:43:19.49#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:43:19.49#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:43:19.49#ibcon#*before write, iclass 18, count 0 2006.229.15:43:19.49#ibcon#enter sib2, iclass 18, count 0 2006.229.15:43:19.49#ibcon#flushed, iclass 18, count 0 2006.229.15:43:19.49#ibcon#about to write, iclass 18, count 0 2006.229.15:43:19.49#ibcon#wrote, iclass 18, count 0 2006.229.15:43:19.49#ibcon#about to read 3, iclass 18, count 0 2006.229.15:43:19.53#ibcon#read 3, iclass 18, count 0 2006.229.15:43:19.53#ibcon#about to read 4, iclass 18, count 0 2006.229.15:43:19.53#ibcon#read 4, iclass 18, count 0 2006.229.15:43:19.53#ibcon#about to read 5, iclass 18, count 0 2006.229.15:43:19.53#ibcon#read 5, iclass 18, count 0 2006.229.15:43:19.53#ibcon#about to read 6, iclass 18, count 0 2006.229.15:43:19.53#ibcon#read 6, iclass 18, count 0 2006.229.15:43:19.53#ibcon#end of sib2, iclass 18, count 0 2006.229.15:43:19.53#ibcon#*after write, iclass 18, count 0 2006.229.15:43:19.53#ibcon#*before return 0, iclass 18, count 0 2006.229.15:43:19.53#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:19.53#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:19.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:43:19.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:43:19.53$vck44/va=8,6 2006.229.15:43:19.53#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:43:19.53#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:43:19.53#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:19.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:43:19.59#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:43:19.59#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:43:19.59#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:43:19.59#ibcon#first serial, iclass 20, count 2 2006.229.15:43:19.59#ibcon#enter sib2, iclass 20, count 2 2006.229.15:43:19.59#ibcon#flushed, iclass 20, count 2 2006.229.15:43:19.59#ibcon#about to write, iclass 20, count 2 2006.229.15:43:19.59#ibcon#wrote, iclass 20, count 2 2006.229.15:43:19.59#ibcon#about to read 3, iclass 20, count 2 2006.229.15:43:19.61#ibcon#read 3, iclass 20, count 2 2006.229.15:43:19.61#ibcon#about to read 4, iclass 20, count 2 2006.229.15:43:19.61#ibcon#read 4, iclass 20, count 2 2006.229.15:43:19.61#ibcon#about to read 5, iclass 20, count 2 2006.229.15:43:19.61#ibcon#read 5, iclass 20, count 2 2006.229.15:43:19.61#ibcon#about to read 6, iclass 20, count 2 2006.229.15:43:19.61#ibcon#read 6, iclass 20, count 2 2006.229.15:43:19.61#ibcon#end of sib2, iclass 20, count 2 2006.229.15:43:19.61#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:43:19.61#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:43:19.61#ibcon#[25=AT08-06\r\n] 2006.229.15:43:19.61#ibcon#*before write, iclass 20, count 2 2006.229.15:43:19.61#ibcon#enter sib2, iclass 20, count 2 2006.229.15:43:19.61#ibcon#flushed, iclass 20, count 2 2006.229.15:43:19.61#ibcon#about to write, iclass 20, count 2 2006.229.15:43:19.61#ibcon#wrote, iclass 20, count 2 2006.229.15:43:19.61#ibcon#about to read 3, iclass 20, count 2 2006.229.15:43:19.64#ibcon#read 3, iclass 20, count 2 2006.229.15:43:19.64#ibcon#about to read 4, iclass 20, count 2 2006.229.15:43:19.64#ibcon#read 4, iclass 20, count 2 2006.229.15:43:19.64#ibcon#about to read 5, iclass 20, count 2 2006.229.15:43:19.64#ibcon#read 5, iclass 20, count 2 2006.229.15:43:19.64#ibcon#about to read 6, iclass 20, count 2 2006.229.15:43:19.64#ibcon#read 6, iclass 20, count 2 2006.229.15:43:19.64#ibcon#end of sib2, iclass 20, count 2 2006.229.15:43:19.64#ibcon#*after write, iclass 20, count 2 2006.229.15:43:19.64#ibcon#*before return 0, iclass 20, count 2 2006.229.15:43:19.64#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:43:19.64#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:43:19.64#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:43:19.64#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:19.64#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:43:19.76#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:43:19.76#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:43:19.76#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:43:19.76#ibcon#first serial, iclass 20, count 0 2006.229.15:43:19.76#ibcon#enter sib2, iclass 20, count 0 2006.229.15:43:19.76#ibcon#flushed, iclass 20, count 0 2006.229.15:43:19.76#ibcon#about to write, iclass 20, count 0 2006.229.15:43:19.76#ibcon#wrote, iclass 20, count 0 2006.229.15:43:19.76#ibcon#about to read 3, iclass 20, count 0 2006.229.15:43:19.78#ibcon#read 3, iclass 20, count 0 2006.229.15:43:19.78#ibcon#about to read 4, iclass 20, count 0 2006.229.15:43:19.78#ibcon#read 4, iclass 20, count 0 2006.229.15:43:19.78#ibcon#about to read 5, iclass 20, count 0 2006.229.15:43:19.78#ibcon#read 5, iclass 20, count 0 2006.229.15:43:19.78#ibcon#about to read 6, iclass 20, count 0 2006.229.15:43:19.78#ibcon#read 6, iclass 20, count 0 2006.229.15:43:19.78#ibcon#end of sib2, iclass 20, count 0 2006.229.15:43:19.78#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:43:19.78#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:43:19.78#ibcon#[25=USB\r\n] 2006.229.15:43:19.78#ibcon#*before write, iclass 20, count 0 2006.229.15:43:19.78#ibcon#enter sib2, iclass 20, count 0 2006.229.15:43:19.78#ibcon#flushed, iclass 20, count 0 2006.229.15:43:19.78#ibcon#about to write, iclass 20, count 0 2006.229.15:43:19.78#ibcon#wrote, iclass 20, count 0 2006.229.15:43:19.78#ibcon#about to read 3, iclass 20, count 0 2006.229.15:43:19.81#ibcon#read 3, iclass 20, count 0 2006.229.15:43:19.81#ibcon#about to read 4, iclass 20, count 0 2006.229.15:43:19.81#ibcon#read 4, iclass 20, count 0 2006.229.15:43:19.81#ibcon#about to read 5, iclass 20, count 0 2006.229.15:43:19.81#ibcon#read 5, iclass 20, count 0 2006.229.15:43:19.81#ibcon#about to read 6, iclass 20, count 0 2006.229.15:43:19.81#ibcon#read 6, iclass 20, count 0 2006.229.15:43:19.81#ibcon#end of sib2, iclass 20, count 0 2006.229.15:43:19.81#ibcon#*after write, iclass 20, count 0 2006.229.15:43:19.81#ibcon#*before return 0, iclass 20, count 0 2006.229.15:43:19.81#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:43:19.81#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:43:19.81#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:43:19.81#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:43:19.81$vck44/vblo=1,629.99 2006.229.15:43:19.81#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:43:19.81#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:43:19.81#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:19.81#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:43:19.81#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:43:19.81#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:43:19.81#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:43:19.81#ibcon#first serial, iclass 22, count 0 2006.229.15:43:19.81#ibcon#enter sib2, iclass 22, count 0 2006.229.15:43:19.81#ibcon#flushed, iclass 22, count 0 2006.229.15:43:19.81#ibcon#about to write, iclass 22, count 0 2006.229.15:43:19.81#ibcon#wrote, iclass 22, count 0 2006.229.15:43:19.81#ibcon#about to read 3, iclass 22, count 0 2006.229.15:43:19.83#ibcon#read 3, iclass 22, count 0 2006.229.15:43:19.83#ibcon#about to read 4, iclass 22, count 0 2006.229.15:43:19.83#ibcon#read 4, iclass 22, count 0 2006.229.15:43:19.83#ibcon#about to read 5, iclass 22, count 0 2006.229.15:43:19.83#ibcon#read 5, iclass 22, count 0 2006.229.15:43:19.83#ibcon#about to read 6, iclass 22, count 0 2006.229.15:43:19.83#ibcon#read 6, iclass 22, count 0 2006.229.15:43:19.83#ibcon#end of sib2, iclass 22, count 0 2006.229.15:43:19.83#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:43:19.83#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:43:19.83#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:43:19.83#ibcon#*before write, iclass 22, count 0 2006.229.15:43:19.83#ibcon#enter sib2, iclass 22, count 0 2006.229.15:43:19.83#ibcon#flushed, iclass 22, count 0 2006.229.15:43:19.83#ibcon#about to write, iclass 22, count 0 2006.229.15:43:19.83#ibcon#wrote, iclass 22, count 0 2006.229.15:43:19.83#ibcon#about to read 3, iclass 22, count 0 2006.229.15:43:19.87#ibcon#read 3, iclass 22, count 0 2006.229.15:43:19.87#ibcon#about to read 4, iclass 22, count 0 2006.229.15:43:19.87#ibcon#read 4, iclass 22, count 0 2006.229.15:43:19.87#ibcon#about to read 5, iclass 22, count 0 2006.229.15:43:19.87#ibcon#read 5, iclass 22, count 0 2006.229.15:43:19.87#ibcon#about to read 6, iclass 22, count 0 2006.229.15:43:19.87#ibcon#read 6, iclass 22, count 0 2006.229.15:43:19.87#ibcon#end of sib2, iclass 22, count 0 2006.229.15:43:19.87#ibcon#*after write, iclass 22, count 0 2006.229.15:43:19.87#ibcon#*before return 0, iclass 22, count 0 2006.229.15:43:19.87#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:43:19.87#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:43:19.87#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:43:19.87#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:43:19.87$vck44/vb=1,4 2006.229.15:43:19.87#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.15:43:19.87#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.15:43:19.87#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:19.87#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:43:19.87#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:43:19.87#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:43:19.87#ibcon#enter wrdev, iclass 24, count 2 2006.229.15:43:19.87#ibcon#first serial, iclass 24, count 2 2006.229.15:43:19.87#ibcon#enter sib2, iclass 24, count 2 2006.229.15:43:19.87#ibcon#flushed, iclass 24, count 2 2006.229.15:43:19.87#ibcon#about to write, iclass 24, count 2 2006.229.15:43:19.87#ibcon#wrote, iclass 24, count 2 2006.229.15:43:19.87#ibcon#about to read 3, iclass 24, count 2 2006.229.15:43:19.89#ibcon#read 3, iclass 24, count 2 2006.229.15:43:19.89#ibcon#about to read 4, iclass 24, count 2 2006.229.15:43:19.89#ibcon#read 4, iclass 24, count 2 2006.229.15:43:19.89#ibcon#about to read 5, iclass 24, count 2 2006.229.15:43:19.89#ibcon#read 5, iclass 24, count 2 2006.229.15:43:19.89#ibcon#about to read 6, iclass 24, count 2 2006.229.15:43:19.89#ibcon#read 6, iclass 24, count 2 2006.229.15:43:19.89#ibcon#end of sib2, iclass 24, count 2 2006.229.15:43:19.89#ibcon#*mode == 0, iclass 24, count 2 2006.229.15:43:19.89#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.15:43:19.89#ibcon#[27=AT01-04\r\n] 2006.229.15:43:19.89#ibcon#*before write, iclass 24, count 2 2006.229.15:43:19.89#ibcon#enter sib2, iclass 24, count 2 2006.229.15:43:19.89#ibcon#flushed, iclass 24, count 2 2006.229.15:43:19.89#ibcon#about to write, iclass 24, count 2 2006.229.15:43:19.89#ibcon#wrote, iclass 24, count 2 2006.229.15:43:19.89#ibcon#about to read 3, iclass 24, count 2 2006.229.15:43:19.92#ibcon#read 3, iclass 24, count 2 2006.229.15:43:19.92#ibcon#about to read 4, iclass 24, count 2 2006.229.15:43:19.92#ibcon#read 4, iclass 24, count 2 2006.229.15:43:19.92#ibcon#about to read 5, iclass 24, count 2 2006.229.15:43:19.92#ibcon#read 5, iclass 24, count 2 2006.229.15:43:19.92#ibcon#about to read 6, iclass 24, count 2 2006.229.15:43:19.92#ibcon#read 6, iclass 24, count 2 2006.229.15:43:19.92#ibcon#end of sib2, iclass 24, count 2 2006.229.15:43:19.92#ibcon#*after write, iclass 24, count 2 2006.229.15:43:19.92#ibcon#*before return 0, iclass 24, count 2 2006.229.15:43:19.92#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:43:19.92#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:43:19.92#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.15:43:19.92#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:19.92#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:43:20.04#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:43:20.04#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:43:20.04#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:43:20.04#ibcon#first serial, iclass 24, count 0 2006.229.15:43:20.04#ibcon#enter sib2, iclass 24, count 0 2006.229.15:43:20.04#ibcon#flushed, iclass 24, count 0 2006.229.15:43:20.04#ibcon#about to write, iclass 24, count 0 2006.229.15:43:20.04#ibcon#wrote, iclass 24, count 0 2006.229.15:43:20.04#ibcon#about to read 3, iclass 24, count 0 2006.229.15:43:20.06#ibcon#read 3, iclass 24, count 0 2006.229.15:43:20.06#ibcon#about to read 4, iclass 24, count 0 2006.229.15:43:20.06#ibcon#read 4, iclass 24, count 0 2006.229.15:43:20.06#ibcon#about to read 5, iclass 24, count 0 2006.229.15:43:20.06#ibcon#read 5, iclass 24, count 0 2006.229.15:43:20.06#ibcon#about to read 6, iclass 24, count 0 2006.229.15:43:20.06#ibcon#read 6, iclass 24, count 0 2006.229.15:43:20.06#ibcon#end of sib2, iclass 24, count 0 2006.229.15:43:20.06#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:43:20.06#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:43:20.06#ibcon#[27=USB\r\n] 2006.229.15:43:20.06#ibcon#*before write, iclass 24, count 0 2006.229.15:43:20.06#ibcon#enter sib2, iclass 24, count 0 2006.229.15:43:20.06#ibcon#flushed, iclass 24, count 0 2006.229.15:43:20.06#ibcon#about to write, iclass 24, count 0 2006.229.15:43:20.06#ibcon#wrote, iclass 24, count 0 2006.229.15:43:20.06#ibcon#about to read 3, iclass 24, count 0 2006.229.15:43:20.09#ibcon#read 3, iclass 24, count 0 2006.229.15:43:20.09#ibcon#about to read 4, iclass 24, count 0 2006.229.15:43:20.09#ibcon#read 4, iclass 24, count 0 2006.229.15:43:20.09#ibcon#about to read 5, iclass 24, count 0 2006.229.15:43:20.09#ibcon#read 5, iclass 24, count 0 2006.229.15:43:20.09#ibcon#about to read 6, iclass 24, count 0 2006.229.15:43:20.09#ibcon#read 6, iclass 24, count 0 2006.229.15:43:20.09#ibcon#end of sib2, iclass 24, count 0 2006.229.15:43:20.09#ibcon#*after write, iclass 24, count 0 2006.229.15:43:20.09#ibcon#*before return 0, iclass 24, count 0 2006.229.15:43:20.09#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:43:20.09#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:43:20.09#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:43:20.09#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:43:20.09$vck44/vblo=2,634.99 2006.229.15:43:20.09#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:43:20.09#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:43:20.09#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:20.09#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:20.09#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:20.09#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:20.09#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:43:20.09#ibcon#first serial, iclass 26, count 0 2006.229.15:43:20.09#ibcon#enter sib2, iclass 26, count 0 2006.229.15:43:20.09#ibcon#flushed, iclass 26, count 0 2006.229.15:43:20.09#ibcon#about to write, iclass 26, count 0 2006.229.15:43:20.09#ibcon#wrote, iclass 26, count 0 2006.229.15:43:20.09#ibcon#about to read 3, iclass 26, count 0 2006.229.15:43:20.11#ibcon#read 3, iclass 26, count 0 2006.229.15:43:20.11#ibcon#about to read 4, iclass 26, count 0 2006.229.15:43:20.11#ibcon#read 4, iclass 26, count 0 2006.229.15:43:20.11#ibcon#about to read 5, iclass 26, count 0 2006.229.15:43:20.11#ibcon#read 5, iclass 26, count 0 2006.229.15:43:20.11#ibcon#about to read 6, iclass 26, count 0 2006.229.15:43:20.11#ibcon#read 6, iclass 26, count 0 2006.229.15:43:20.11#ibcon#end of sib2, iclass 26, count 0 2006.229.15:43:20.11#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:43:20.11#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:43:20.11#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:43:20.11#ibcon#*before write, iclass 26, count 0 2006.229.15:43:20.11#ibcon#enter sib2, iclass 26, count 0 2006.229.15:43:20.11#ibcon#flushed, iclass 26, count 0 2006.229.15:43:20.11#ibcon#about to write, iclass 26, count 0 2006.229.15:43:20.11#ibcon#wrote, iclass 26, count 0 2006.229.15:43:20.11#ibcon#about to read 3, iclass 26, count 0 2006.229.15:43:20.15#ibcon#read 3, iclass 26, count 0 2006.229.15:43:20.15#ibcon#about to read 4, iclass 26, count 0 2006.229.15:43:20.15#ibcon#read 4, iclass 26, count 0 2006.229.15:43:20.15#ibcon#about to read 5, iclass 26, count 0 2006.229.15:43:20.15#ibcon#read 5, iclass 26, count 0 2006.229.15:43:20.15#ibcon#about to read 6, iclass 26, count 0 2006.229.15:43:20.15#ibcon#read 6, iclass 26, count 0 2006.229.15:43:20.15#ibcon#end of sib2, iclass 26, count 0 2006.229.15:43:20.15#ibcon#*after write, iclass 26, count 0 2006.229.15:43:20.15#ibcon#*before return 0, iclass 26, count 0 2006.229.15:43:20.15#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:20.15#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:43:20.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:43:20.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:43:20.15$vck44/vb=2,4 2006.229.15:43:20.15#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:43:20.15#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:43:20.15#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:20.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:20.21#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:20.21#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:20.21#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:43:20.21#ibcon#first serial, iclass 28, count 2 2006.229.15:43:20.21#ibcon#enter sib2, iclass 28, count 2 2006.229.15:43:20.21#ibcon#flushed, iclass 28, count 2 2006.229.15:43:20.21#ibcon#about to write, iclass 28, count 2 2006.229.15:43:20.21#ibcon#wrote, iclass 28, count 2 2006.229.15:43:20.21#ibcon#about to read 3, iclass 28, count 2 2006.229.15:43:20.23#ibcon#read 3, iclass 28, count 2 2006.229.15:43:20.23#ibcon#about to read 4, iclass 28, count 2 2006.229.15:43:20.23#ibcon#read 4, iclass 28, count 2 2006.229.15:43:20.23#ibcon#about to read 5, iclass 28, count 2 2006.229.15:43:20.23#ibcon#read 5, iclass 28, count 2 2006.229.15:43:20.23#ibcon#about to read 6, iclass 28, count 2 2006.229.15:43:20.23#ibcon#read 6, iclass 28, count 2 2006.229.15:43:20.23#ibcon#end of sib2, iclass 28, count 2 2006.229.15:43:20.23#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:43:20.23#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:43:20.23#ibcon#[27=AT02-04\r\n] 2006.229.15:43:20.23#ibcon#*before write, iclass 28, count 2 2006.229.15:43:20.23#ibcon#enter sib2, iclass 28, count 2 2006.229.15:43:20.23#ibcon#flushed, iclass 28, count 2 2006.229.15:43:20.23#ibcon#about to write, iclass 28, count 2 2006.229.15:43:20.23#ibcon#wrote, iclass 28, count 2 2006.229.15:43:20.23#ibcon#about to read 3, iclass 28, count 2 2006.229.15:43:20.26#ibcon#read 3, iclass 28, count 2 2006.229.15:43:20.26#ibcon#about to read 4, iclass 28, count 2 2006.229.15:43:20.26#ibcon#read 4, iclass 28, count 2 2006.229.15:43:20.26#ibcon#about to read 5, iclass 28, count 2 2006.229.15:43:20.26#ibcon#read 5, iclass 28, count 2 2006.229.15:43:20.26#ibcon#about to read 6, iclass 28, count 2 2006.229.15:43:20.26#ibcon#read 6, iclass 28, count 2 2006.229.15:43:20.26#ibcon#end of sib2, iclass 28, count 2 2006.229.15:43:20.26#ibcon#*after write, iclass 28, count 2 2006.229.15:43:20.26#ibcon#*before return 0, iclass 28, count 2 2006.229.15:43:20.26#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:20.26#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:43:20.26#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:43:20.26#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:20.26#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:20.38#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:20.38#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:20.38#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:43:20.38#ibcon#first serial, iclass 28, count 0 2006.229.15:43:20.38#ibcon#enter sib2, iclass 28, count 0 2006.229.15:43:20.38#ibcon#flushed, iclass 28, count 0 2006.229.15:43:20.38#ibcon#about to write, iclass 28, count 0 2006.229.15:43:20.38#ibcon#wrote, iclass 28, count 0 2006.229.15:43:20.38#ibcon#about to read 3, iclass 28, count 0 2006.229.15:43:20.40#ibcon#read 3, iclass 28, count 0 2006.229.15:43:20.40#ibcon#about to read 4, iclass 28, count 0 2006.229.15:43:20.40#ibcon#read 4, iclass 28, count 0 2006.229.15:43:20.40#ibcon#about to read 5, iclass 28, count 0 2006.229.15:43:20.40#ibcon#read 5, iclass 28, count 0 2006.229.15:43:20.40#ibcon#about to read 6, iclass 28, count 0 2006.229.15:43:20.40#ibcon#read 6, iclass 28, count 0 2006.229.15:43:20.40#ibcon#end of sib2, iclass 28, count 0 2006.229.15:43:20.40#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:43:20.40#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:43:20.40#ibcon#[27=USB\r\n] 2006.229.15:43:20.40#ibcon#*before write, iclass 28, count 0 2006.229.15:43:20.40#ibcon#enter sib2, iclass 28, count 0 2006.229.15:43:20.40#ibcon#flushed, iclass 28, count 0 2006.229.15:43:20.40#ibcon#about to write, iclass 28, count 0 2006.229.15:43:20.40#ibcon#wrote, iclass 28, count 0 2006.229.15:43:20.40#ibcon#about to read 3, iclass 28, count 0 2006.229.15:43:20.43#ibcon#read 3, iclass 28, count 0 2006.229.15:43:20.43#ibcon#about to read 4, iclass 28, count 0 2006.229.15:43:20.43#ibcon#read 4, iclass 28, count 0 2006.229.15:43:20.43#ibcon#about to read 5, iclass 28, count 0 2006.229.15:43:20.43#ibcon#read 5, iclass 28, count 0 2006.229.15:43:20.43#ibcon#about to read 6, iclass 28, count 0 2006.229.15:43:20.43#ibcon#read 6, iclass 28, count 0 2006.229.15:43:20.43#ibcon#end of sib2, iclass 28, count 0 2006.229.15:43:20.43#ibcon#*after write, iclass 28, count 0 2006.229.15:43:20.43#ibcon#*before return 0, iclass 28, count 0 2006.229.15:43:20.43#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:20.43#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:43:20.43#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:43:20.43#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:43:20.43$vck44/vblo=3,649.99 2006.229.15:43:20.43#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:43:20.43#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:43:20.43#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:20.43#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:20.43#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:20.43#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:20.43#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:43:20.43#ibcon#first serial, iclass 30, count 0 2006.229.15:43:20.43#ibcon#enter sib2, iclass 30, count 0 2006.229.15:43:20.43#ibcon#flushed, iclass 30, count 0 2006.229.15:43:20.43#ibcon#about to write, iclass 30, count 0 2006.229.15:43:20.43#ibcon#wrote, iclass 30, count 0 2006.229.15:43:20.43#ibcon#about to read 3, iclass 30, count 0 2006.229.15:43:20.45#ibcon#read 3, iclass 30, count 0 2006.229.15:43:20.45#ibcon#about to read 4, iclass 30, count 0 2006.229.15:43:20.45#ibcon#read 4, iclass 30, count 0 2006.229.15:43:20.45#ibcon#about to read 5, iclass 30, count 0 2006.229.15:43:20.45#ibcon#read 5, iclass 30, count 0 2006.229.15:43:20.45#ibcon#about to read 6, iclass 30, count 0 2006.229.15:43:20.45#ibcon#read 6, iclass 30, count 0 2006.229.15:43:20.45#ibcon#end of sib2, iclass 30, count 0 2006.229.15:43:20.45#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:43:20.45#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:43:20.45#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:43:20.45#ibcon#*before write, iclass 30, count 0 2006.229.15:43:20.45#ibcon#enter sib2, iclass 30, count 0 2006.229.15:43:20.45#ibcon#flushed, iclass 30, count 0 2006.229.15:43:20.45#ibcon#about to write, iclass 30, count 0 2006.229.15:43:20.45#ibcon#wrote, iclass 30, count 0 2006.229.15:43:20.45#ibcon#about to read 3, iclass 30, count 0 2006.229.15:43:20.49#ibcon#read 3, iclass 30, count 0 2006.229.15:43:20.49#ibcon#about to read 4, iclass 30, count 0 2006.229.15:43:20.49#ibcon#read 4, iclass 30, count 0 2006.229.15:43:20.49#ibcon#about to read 5, iclass 30, count 0 2006.229.15:43:20.49#ibcon#read 5, iclass 30, count 0 2006.229.15:43:20.49#ibcon#about to read 6, iclass 30, count 0 2006.229.15:43:20.49#ibcon#read 6, iclass 30, count 0 2006.229.15:43:20.49#ibcon#end of sib2, iclass 30, count 0 2006.229.15:43:20.49#ibcon#*after write, iclass 30, count 0 2006.229.15:43:20.49#ibcon#*before return 0, iclass 30, count 0 2006.229.15:43:20.49#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:20.49#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:43:20.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:43:20.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:43:20.49$vck44/vb=3,4 2006.229.15:43:20.49#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:43:20.49#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:43:20.49#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:20.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:20.55#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:20.55#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:20.55#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:43:20.55#ibcon#first serial, iclass 32, count 2 2006.229.15:43:20.55#ibcon#enter sib2, iclass 32, count 2 2006.229.15:43:20.55#ibcon#flushed, iclass 32, count 2 2006.229.15:43:20.55#ibcon#about to write, iclass 32, count 2 2006.229.15:43:20.55#ibcon#wrote, iclass 32, count 2 2006.229.15:43:20.55#ibcon#about to read 3, iclass 32, count 2 2006.229.15:43:20.57#ibcon#read 3, iclass 32, count 2 2006.229.15:43:20.57#ibcon#about to read 4, iclass 32, count 2 2006.229.15:43:20.57#ibcon#read 4, iclass 32, count 2 2006.229.15:43:20.57#ibcon#about to read 5, iclass 32, count 2 2006.229.15:43:20.57#ibcon#read 5, iclass 32, count 2 2006.229.15:43:20.57#ibcon#about to read 6, iclass 32, count 2 2006.229.15:43:20.57#ibcon#read 6, iclass 32, count 2 2006.229.15:43:20.57#ibcon#end of sib2, iclass 32, count 2 2006.229.15:43:20.57#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:43:20.57#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:43:20.57#ibcon#[27=AT03-04\r\n] 2006.229.15:43:20.57#ibcon#*before write, iclass 32, count 2 2006.229.15:43:20.57#ibcon#enter sib2, iclass 32, count 2 2006.229.15:43:20.57#ibcon#flushed, iclass 32, count 2 2006.229.15:43:20.57#ibcon#about to write, iclass 32, count 2 2006.229.15:43:20.57#ibcon#wrote, iclass 32, count 2 2006.229.15:43:20.57#ibcon#about to read 3, iclass 32, count 2 2006.229.15:43:20.60#ibcon#read 3, iclass 32, count 2 2006.229.15:43:20.60#ibcon#about to read 4, iclass 32, count 2 2006.229.15:43:20.60#ibcon#read 4, iclass 32, count 2 2006.229.15:43:20.60#ibcon#about to read 5, iclass 32, count 2 2006.229.15:43:20.60#ibcon#read 5, iclass 32, count 2 2006.229.15:43:20.60#ibcon#about to read 6, iclass 32, count 2 2006.229.15:43:20.60#ibcon#read 6, iclass 32, count 2 2006.229.15:43:20.60#ibcon#end of sib2, iclass 32, count 2 2006.229.15:43:20.60#ibcon#*after write, iclass 32, count 2 2006.229.15:43:20.60#ibcon#*before return 0, iclass 32, count 2 2006.229.15:43:20.60#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:20.60#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:43:20.60#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:43:20.60#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:20.60#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:20.72#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:20.72#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:20.72#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:43:20.72#ibcon#first serial, iclass 32, count 0 2006.229.15:43:20.72#ibcon#enter sib2, iclass 32, count 0 2006.229.15:43:20.72#ibcon#flushed, iclass 32, count 0 2006.229.15:43:20.72#ibcon#about to write, iclass 32, count 0 2006.229.15:43:20.72#ibcon#wrote, iclass 32, count 0 2006.229.15:43:20.72#ibcon#about to read 3, iclass 32, count 0 2006.229.15:43:20.74#ibcon#read 3, iclass 32, count 0 2006.229.15:43:20.74#ibcon#about to read 4, iclass 32, count 0 2006.229.15:43:20.74#ibcon#read 4, iclass 32, count 0 2006.229.15:43:20.74#ibcon#about to read 5, iclass 32, count 0 2006.229.15:43:20.74#ibcon#read 5, iclass 32, count 0 2006.229.15:43:20.74#ibcon#about to read 6, iclass 32, count 0 2006.229.15:43:20.74#ibcon#read 6, iclass 32, count 0 2006.229.15:43:20.74#ibcon#end of sib2, iclass 32, count 0 2006.229.15:43:20.74#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:43:20.74#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:43:20.74#ibcon#[27=USB\r\n] 2006.229.15:43:20.74#ibcon#*before write, iclass 32, count 0 2006.229.15:43:20.74#ibcon#enter sib2, iclass 32, count 0 2006.229.15:43:20.74#ibcon#flushed, iclass 32, count 0 2006.229.15:43:20.74#ibcon#about to write, iclass 32, count 0 2006.229.15:43:20.74#ibcon#wrote, iclass 32, count 0 2006.229.15:43:20.74#ibcon#about to read 3, iclass 32, count 0 2006.229.15:43:20.77#ibcon#read 3, iclass 32, count 0 2006.229.15:43:20.77#ibcon#about to read 4, iclass 32, count 0 2006.229.15:43:20.77#ibcon#read 4, iclass 32, count 0 2006.229.15:43:20.77#ibcon#about to read 5, iclass 32, count 0 2006.229.15:43:20.77#ibcon#read 5, iclass 32, count 0 2006.229.15:43:20.77#ibcon#about to read 6, iclass 32, count 0 2006.229.15:43:20.77#ibcon#read 6, iclass 32, count 0 2006.229.15:43:20.77#ibcon#end of sib2, iclass 32, count 0 2006.229.15:43:20.77#ibcon#*after write, iclass 32, count 0 2006.229.15:43:20.77#ibcon#*before return 0, iclass 32, count 0 2006.229.15:43:20.77#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:20.77#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:43:20.77#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:43:20.77#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:43:20.77$vck44/vblo=4,679.99 2006.229.15:43:20.77#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:43:20.77#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:43:20.77#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:20.77#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:20.77#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:20.77#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:20.77#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:43:20.77#ibcon#first serial, iclass 34, count 0 2006.229.15:43:20.77#ibcon#enter sib2, iclass 34, count 0 2006.229.15:43:20.77#ibcon#flushed, iclass 34, count 0 2006.229.15:43:20.77#ibcon#about to write, iclass 34, count 0 2006.229.15:43:20.77#ibcon#wrote, iclass 34, count 0 2006.229.15:43:20.77#ibcon#about to read 3, iclass 34, count 0 2006.229.15:43:20.79#ibcon#read 3, iclass 34, count 0 2006.229.15:43:20.79#ibcon#about to read 4, iclass 34, count 0 2006.229.15:43:20.79#ibcon#read 4, iclass 34, count 0 2006.229.15:43:20.79#ibcon#about to read 5, iclass 34, count 0 2006.229.15:43:20.79#ibcon#read 5, iclass 34, count 0 2006.229.15:43:20.79#ibcon#about to read 6, iclass 34, count 0 2006.229.15:43:20.79#ibcon#read 6, iclass 34, count 0 2006.229.15:43:20.79#ibcon#end of sib2, iclass 34, count 0 2006.229.15:43:20.79#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:43:20.79#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:43:20.79#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:43:20.79#ibcon#*before write, iclass 34, count 0 2006.229.15:43:20.79#ibcon#enter sib2, iclass 34, count 0 2006.229.15:43:20.79#ibcon#flushed, iclass 34, count 0 2006.229.15:43:20.79#ibcon#about to write, iclass 34, count 0 2006.229.15:43:20.79#ibcon#wrote, iclass 34, count 0 2006.229.15:43:20.79#ibcon#about to read 3, iclass 34, count 0 2006.229.15:43:20.83#ibcon#read 3, iclass 34, count 0 2006.229.15:43:20.83#ibcon#about to read 4, iclass 34, count 0 2006.229.15:43:20.83#ibcon#read 4, iclass 34, count 0 2006.229.15:43:20.83#ibcon#about to read 5, iclass 34, count 0 2006.229.15:43:20.83#ibcon#read 5, iclass 34, count 0 2006.229.15:43:20.83#ibcon#about to read 6, iclass 34, count 0 2006.229.15:43:20.83#ibcon#read 6, iclass 34, count 0 2006.229.15:43:20.83#ibcon#end of sib2, iclass 34, count 0 2006.229.15:43:20.83#ibcon#*after write, iclass 34, count 0 2006.229.15:43:20.83#ibcon#*before return 0, iclass 34, count 0 2006.229.15:43:20.83#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:20.83#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:43:20.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:43:20.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:43:20.83$vck44/vb=4,4 2006.229.15:43:20.83#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:43:20.83#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:43:20.83#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:20.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:20.89#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:20.89#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:20.89#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:43:20.89#ibcon#first serial, iclass 36, count 2 2006.229.15:43:20.89#ibcon#enter sib2, iclass 36, count 2 2006.229.15:43:20.89#ibcon#flushed, iclass 36, count 2 2006.229.15:43:20.89#ibcon#about to write, iclass 36, count 2 2006.229.15:43:20.89#ibcon#wrote, iclass 36, count 2 2006.229.15:43:20.89#ibcon#about to read 3, iclass 36, count 2 2006.229.15:43:20.91#ibcon#read 3, iclass 36, count 2 2006.229.15:43:20.91#ibcon#about to read 4, iclass 36, count 2 2006.229.15:43:20.91#ibcon#read 4, iclass 36, count 2 2006.229.15:43:20.91#ibcon#about to read 5, iclass 36, count 2 2006.229.15:43:20.91#ibcon#read 5, iclass 36, count 2 2006.229.15:43:20.91#ibcon#about to read 6, iclass 36, count 2 2006.229.15:43:20.91#ibcon#read 6, iclass 36, count 2 2006.229.15:43:20.91#ibcon#end of sib2, iclass 36, count 2 2006.229.15:43:20.91#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:43:20.91#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:43:20.91#ibcon#[27=AT04-04\r\n] 2006.229.15:43:20.91#ibcon#*before write, iclass 36, count 2 2006.229.15:43:20.91#ibcon#enter sib2, iclass 36, count 2 2006.229.15:43:20.91#ibcon#flushed, iclass 36, count 2 2006.229.15:43:20.91#ibcon#about to write, iclass 36, count 2 2006.229.15:43:20.91#ibcon#wrote, iclass 36, count 2 2006.229.15:43:20.91#ibcon#about to read 3, iclass 36, count 2 2006.229.15:43:20.94#ibcon#read 3, iclass 36, count 2 2006.229.15:43:20.94#ibcon#about to read 4, iclass 36, count 2 2006.229.15:43:20.94#ibcon#read 4, iclass 36, count 2 2006.229.15:43:20.94#ibcon#about to read 5, iclass 36, count 2 2006.229.15:43:20.94#ibcon#read 5, iclass 36, count 2 2006.229.15:43:20.94#ibcon#about to read 6, iclass 36, count 2 2006.229.15:43:20.94#ibcon#read 6, iclass 36, count 2 2006.229.15:43:20.94#ibcon#end of sib2, iclass 36, count 2 2006.229.15:43:20.94#ibcon#*after write, iclass 36, count 2 2006.229.15:43:20.94#ibcon#*before return 0, iclass 36, count 2 2006.229.15:43:20.94#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:20.94#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:43:20.94#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:43:20.94#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:20.94#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:21.06#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:21.06#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:21.06#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:43:21.06#ibcon#first serial, iclass 36, count 0 2006.229.15:43:21.06#ibcon#enter sib2, iclass 36, count 0 2006.229.15:43:21.06#ibcon#flushed, iclass 36, count 0 2006.229.15:43:21.06#ibcon#about to write, iclass 36, count 0 2006.229.15:43:21.06#ibcon#wrote, iclass 36, count 0 2006.229.15:43:21.06#ibcon#about to read 3, iclass 36, count 0 2006.229.15:43:21.08#ibcon#read 3, iclass 36, count 0 2006.229.15:43:21.08#ibcon#about to read 4, iclass 36, count 0 2006.229.15:43:21.08#ibcon#read 4, iclass 36, count 0 2006.229.15:43:21.08#ibcon#about to read 5, iclass 36, count 0 2006.229.15:43:21.08#ibcon#read 5, iclass 36, count 0 2006.229.15:43:21.08#ibcon#about to read 6, iclass 36, count 0 2006.229.15:43:21.08#ibcon#read 6, iclass 36, count 0 2006.229.15:43:21.08#ibcon#end of sib2, iclass 36, count 0 2006.229.15:43:21.08#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:43:21.08#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:43:21.08#ibcon#[27=USB\r\n] 2006.229.15:43:21.08#ibcon#*before write, iclass 36, count 0 2006.229.15:43:21.08#ibcon#enter sib2, iclass 36, count 0 2006.229.15:43:21.08#ibcon#flushed, iclass 36, count 0 2006.229.15:43:21.08#ibcon#about to write, iclass 36, count 0 2006.229.15:43:21.08#ibcon#wrote, iclass 36, count 0 2006.229.15:43:21.08#ibcon#about to read 3, iclass 36, count 0 2006.229.15:43:21.11#ibcon#read 3, iclass 36, count 0 2006.229.15:43:21.11#ibcon#about to read 4, iclass 36, count 0 2006.229.15:43:21.11#ibcon#read 4, iclass 36, count 0 2006.229.15:43:21.11#ibcon#about to read 5, iclass 36, count 0 2006.229.15:43:21.11#ibcon#read 5, iclass 36, count 0 2006.229.15:43:21.11#ibcon#about to read 6, iclass 36, count 0 2006.229.15:43:21.11#ibcon#read 6, iclass 36, count 0 2006.229.15:43:21.11#ibcon#end of sib2, iclass 36, count 0 2006.229.15:43:21.11#ibcon#*after write, iclass 36, count 0 2006.229.15:43:21.11#ibcon#*before return 0, iclass 36, count 0 2006.229.15:43:21.11#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:21.11#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:43:21.11#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:43:21.11#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:43:21.11$vck44/vblo=5,709.99 2006.229.15:43:21.11#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:43:21.11#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:43:21.11#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:21.11#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:21.11#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:21.11#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:21.11#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:43:21.11#ibcon#first serial, iclass 38, count 0 2006.229.15:43:21.11#ibcon#enter sib2, iclass 38, count 0 2006.229.15:43:21.11#ibcon#flushed, iclass 38, count 0 2006.229.15:43:21.11#ibcon#about to write, iclass 38, count 0 2006.229.15:43:21.11#ibcon#wrote, iclass 38, count 0 2006.229.15:43:21.11#ibcon#about to read 3, iclass 38, count 0 2006.229.15:43:21.13#ibcon#read 3, iclass 38, count 0 2006.229.15:43:21.13#ibcon#about to read 4, iclass 38, count 0 2006.229.15:43:21.13#ibcon#read 4, iclass 38, count 0 2006.229.15:43:21.13#ibcon#about to read 5, iclass 38, count 0 2006.229.15:43:21.13#ibcon#read 5, iclass 38, count 0 2006.229.15:43:21.13#ibcon#about to read 6, iclass 38, count 0 2006.229.15:43:21.13#ibcon#read 6, iclass 38, count 0 2006.229.15:43:21.13#ibcon#end of sib2, iclass 38, count 0 2006.229.15:43:21.13#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:43:21.13#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:43:21.13#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:43:21.13#ibcon#*before write, iclass 38, count 0 2006.229.15:43:21.13#ibcon#enter sib2, iclass 38, count 0 2006.229.15:43:21.13#ibcon#flushed, iclass 38, count 0 2006.229.15:43:21.13#ibcon#about to write, iclass 38, count 0 2006.229.15:43:21.13#ibcon#wrote, iclass 38, count 0 2006.229.15:43:21.13#ibcon#about to read 3, iclass 38, count 0 2006.229.15:43:21.17#ibcon#read 3, iclass 38, count 0 2006.229.15:43:21.17#ibcon#about to read 4, iclass 38, count 0 2006.229.15:43:21.17#ibcon#read 4, iclass 38, count 0 2006.229.15:43:21.17#ibcon#about to read 5, iclass 38, count 0 2006.229.15:43:21.17#ibcon#read 5, iclass 38, count 0 2006.229.15:43:21.17#ibcon#about to read 6, iclass 38, count 0 2006.229.15:43:21.17#ibcon#read 6, iclass 38, count 0 2006.229.15:43:21.17#ibcon#end of sib2, iclass 38, count 0 2006.229.15:43:21.17#ibcon#*after write, iclass 38, count 0 2006.229.15:43:21.17#ibcon#*before return 0, iclass 38, count 0 2006.229.15:43:21.17#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:21.17#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:43:21.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:43:21.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:43:21.17$vck44/vb=5,4 2006.229.15:43:21.17#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:43:21.17#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:43:21.17#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:21.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:21.23#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:21.23#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:21.23#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:43:21.23#ibcon#first serial, iclass 40, count 2 2006.229.15:43:21.23#ibcon#enter sib2, iclass 40, count 2 2006.229.15:43:21.23#ibcon#flushed, iclass 40, count 2 2006.229.15:43:21.23#ibcon#about to write, iclass 40, count 2 2006.229.15:43:21.23#ibcon#wrote, iclass 40, count 2 2006.229.15:43:21.23#ibcon#about to read 3, iclass 40, count 2 2006.229.15:43:21.25#ibcon#read 3, iclass 40, count 2 2006.229.15:43:21.25#ibcon#about to read 4, iclass 40, count 2 2006.229.15:43:21.25#ibcon#read 4, iclass 40, count 2 2006.229.15:43:21.25#ibcon#about to read 5, iclass 40, count 2 2006.229.15:43:21.25#ibcon#read 5, iclass 40, count 2 2006.229.15:43:21.25#ibcon#about to read 6, iclass 40, count 2 2006.229.15:43:21.25#ibcon#read 6, iclass 40, count 2 2006.229.15:43:21.25#ibcon#end of sib2, iclass 40, count 2 2006.229.15:43:21.25#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:43:21.25#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:43:21.25#ibcon#[27=AT05-04\r\n] 2006.229.15:43:21.25#ibcon#*before write, iclass 40, count 2 2006.229.15:43:21.25#ibcon#enter sib2, iclass 40, count 2 2006.229.15:43:21.25#ibcon#flushed, iclass 40, count 2 2006.229.15:43:21.25#ibcon#about to write, iclass 40, count 2 2006.229.15:43:21.25#ibcon#wrote, iclass 40, count 2 2006.229.15:43:21.25#ibcon#about to read 3, iclass 40, count 2 2006.229.15:43:21.28#ibcon#read 3, iclass 40, count 2 2006.229.15:43:21.28#ibcon#about to read 4, iclass 40, count 2 2006.229.15:43:21.28#ibcon#read 4, iclass 40, count 2 2006.229.15:43:21.28#ibcon#about to read 5, iclass 40, count 2 2006.229.15:43:21.28#ibcon#read 5, iclass 40, count 2 2006.229.15:43:21.28#ibcon#about to read 6, iclass 40, count 2 2006.229.15:43:21.28#ibcon#read 6, iclass 40, count 2 2006.229.15:43:21.28#ibcon#end of sib2, iclass 40, count 2 2006.229.15:43:21.28#ibcon#*after write, iclass 40, count 2 2006.229.15:43:21.28#ibcon#*before return 0, iclass 40, count 2 2006.229.15:43:21.28#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:21.28#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:43:21.28#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:43:21.28#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:21.28#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:21.40#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:21.40#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:21.40#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:43:21.40#ibcon#first serial, iclass 40, count 0 2006.229.15:43:21.40#ibcon#enter sib2, iclass 40, count 0 2006.229.15:43:21.40#ibcon#flushed, iclass 40, count 0 2006.229.15:43:21.40#ibcon#about to write, iclass 40, count 0 2006.229.15:43:21.40#ibcon#wrote, iclass 40, count 0 2006.229.15:43:21.40#ibcon#about to read 3, iclass 40, count 0 2006.229.15:43:21.42#ibcon#read 3, iclass 40, count 0 2006.229.15:43:21.42#ibcon#about to read 4, iclass 40, count 0 2006.229.15:43:21.42#ibcon#read 4, iclass 40, count 0 2006.229.15:43:21.42#ibcon#about to read 5, iclass 40, count 0 2006.229.15:43:21.42#ibcon#read 5, iclass 40, count 0 2006.229.15:43:21.42#ibcon#about to read 6, iclass 40, count 0 2006.229.15:43:21.42#ibcon#read 6, iclass 40, count 0 2006.229.15:43:21.42#ibcon#end of sib2, iclass 40, count 0 2006.229.15:43:21.42#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:43:21.42#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:43:21.42#ibcon#[27=USB\r\n] 2006.229.15:43:21.42#ibcon#*before write, iclass 40, count 0 2006.229.15:43:21.42#ibcon#enter sib2, iclass 40, count 0 2006.229.15:43:21.42#ibcon#flushed, iclass 40, count 0 2006.229.15:43:21.42#ibcon#about to write, iclass 40, count 0 2006.229.15:43:21.42#ibcon#wrote, iclass 40, count 0 2006.229.15:43:21.42#ibcon#about to read 3, iclass 40, count 0 2006.229.15:43:21.45#ibcon#read 3, iclass 40, count 0 2006.229.15:43:21.45#ibcon#about to read 4, iclass 40, count 0 2006.229.15:43:21.45#ibcon#read 4, iclass 40, count 0 2006.229.15:43:21.45#ibcon#about to read 5, iclass 40, count 0 2006.229.15:43:21.45#ibcon#read 5, iclass 40, count 0 2006.229.15:43:21.45#ibcon#about to read 6, iclass 40, count 0 2006.229.15:43:21.45#ibcon#read 6, iclass 40, count 0 2006.229.15:43:21.45#ibcon#end of sib2, iclass 40, count 0 2006.229.15:43:21.45#ibcon#*after write, iclass 40, count 0 2006.229.15:43:21.45#ibcon#*before return 0, iclass 40, count 0 2006.229.15:43:21.45#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:21.45#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:43:21.45#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:43:21.45#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:43:21.45$vck44/vblo=6,719.99 2006.229.15:43:21.45#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:43:21.45#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:43:21.45#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:21.45#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:21.45#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:21.45#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:21.45#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:43:21.45#ibcon#first serial, iclass 4, count 0 2006.229.15:43:21.45#ibcon#enter sib2, iclass 4, count 0 2006.229.15:43:21.45#ibcon#flushed, iclass 4, count 0 2006.229.15:43:21.45#ibcon#about to write, iclass 4, count 0 2006.229.15:43:21.45#ibcon#wrote, iclass 4, count 0 2006.229.15:43:21.45#ibcon#about to read 3, iclass 4, count 0 2006.229.15:43:21.47#ibcon#read 3, iclass 4, count 0 2006.229.15:43:21.47#ibcon#about to read 4, iclass 4, count 0 2006.229.15:43:21.47#ibcon#read 4, iclass 4, count 0 2006.229.15:43:21.47#ibcon#about to read 5, iclass 4, count 0 2006.229.15:43:21.47#ibcon#read 5, iclass 4, count 0 2006.229.15:43:21.47#ibcon#about to read 6, iclass 4, count 0 2006.229.15:43:21.47#ibcon#read 6, iclass 4, count 0 2006.229.15:43:21.47#ibcon#end of sib2, iclass 4, count 0 2006.229.15:43:21.47#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:43:21.47#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:43:21.47#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:43:21.47#ibcon#*before write, iclass 4, count 0 2006.229.15:43:21.47#ibcon#enter sib2, iclass 4, count 0 2006.229.15:43:21.47#ibcon#flushed, iclass 4, count 0 2006.229.15:43:21.47#ibcon#about to write, iclass 4, count 0 2006.229.15:43:21.47#ibcon#wrote, iclass 4, count 0 2006.229.15:43:21.47#ibcon#about to read 3, iclass 4, count 0 2006.229.15:43:21.51#ibcon#read 3, iclass 4, count 0 2006.229.15:43:21.51#ibcon#about to read 4, iclass 4, count 0 2006.229.15:43:21.51#ibcon#read 4, iclass 4, count 0 2006.229.15:43:21.51#ibcon#about to read 5, iclass 4, count 0 2006.229.15:43:21.51#ibcon#read 5, iclass 4, count 0 2006.229.15:43:21.51#ibcon#about to read 6, iclass 4, count 0 2006.229.15:43:21.51#ibcon#read 6, iclass 4, count 0 2006.229.15:43:21.51#ibcon#end of sib2, iclass 4, count 0 2006.229.15:43:21.51#ibcon#*after write, iclass 4, count 0 2006.229.15:43:21.51#ibcon#*before return 0, iclass 4, count 0 2006.229.15:43:21.51#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:21.51#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:43:21.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:43:21.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:43:21.51$vck44/vb=6,4 2006.229.15:43:21.51#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:43:21.51#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:43:21.51#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:21.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:21.57#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:21.57#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:21.57#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:43:21.57#ibcon#first serial, iclass 6, count 2 2006.229.15:43:21.57#ibcon#enter sib2, iclass 6, count 2 2006.229.15:43:21.57#ibcon#flushed, iclass 6, count 2 2006.229.15:43:21.57#ibcon#about to write, iclass 6, count 2 2006.229.15:43:21.57#ibcon#wrote, iclass 6, count 2 2006.229.15:43:21.57#ibcon#about to read 3, iclass 6, count 2 2006.229.15:43:21.59#ibcon#read 3, iclass 6, count 2 2006.229.15:43:21.59#ibcon#about to read 4, iclass 6, count 2 2006.229.15:43:21.59#ibcon#read 4, iclass 6, count 2 2006.229.15:43:21.59#ibcon#about to read 5, iclass 6, count 2 2006.229.15:43:21.59#ibcon#read 5, iclass 6, count 2 2006.229.15:43:21.59#ibcon#about to read 6, iclass 6, count 2 2006.229.15:43:21.59#ibcon#read 6, iclass 6, count 2 2006.229.15:43:21.59#ibcon#end of sib2, iclass 6, count 2 2006.229.15:43:21.59#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:43:21.59#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:43:21.59#ibcon#[27=AT06-04\r\n] 2006.229.15:43:21.59#ibcon#*before write, iclass 6, count 2 2006.229.15:43:21.59#ibcon#enter sib2, iclass 6, count 2 2006.229.15:43:21.59#ibcon#flushed, iclass 6, count 2 2006.229.15:43:21.59#ibcon#about to write, iclass 6, count 2 2006.229.15:43:21.59#ibcon#wrote, iclass 6, count 2 2006.229.15:43:21.59#ibcon#about to read 3, iclass 6, count 2 2006.229.15:43:21.62#ibcon#read 3, iclass 6, count 2 2006.229.15:43:21.62#ibcon#about to read 4, iclass 6, count 2 2006.229.15:43:21.62#ibcon#read 4, iclass 6, count 2 2006.229.15:43:21.62#ibcon#about to read 5, iclass 6, count 2 2006.229.15:43:21.62#ibcon#read 5, iclass 6, count 2 2006.229.15:43:21.62#ibcon#about to read 6, iclass 6, count 2 2006.229.15:43:21.62#ibcon#read 6, iclass 6, count 2 2006.229.15:43:21.62#ibcon#end of sib2, iclass 6, count 2 2006.229.15:43:21.62#ibcon#*after write, iclass 6, count 2 2006.229.15:43:21.62#ibcon#*before return 0, iclass 6, count 2 2006.229.15:43:21.62#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:21.62#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:43:21.62#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:43:21.62#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:21.62#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:21.74#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:21.74#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:21.74#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:43:21.74#ibcon#first serial, iclass 6, count 0 2006.229.15:43:21.74#ibcon#enter sib2, iclass 6, count 0 2006.229.15:43:21.74#ibcon#flushed, iclass 6, count 0 2006.229.15:43:21.74#ibcon#about to write, iclass 6, count 0 2006.229.15:43:21.74#ibcon#wrote, iclass 6, count 0 2006.229.15:43:21.74#ibcon#about to read 3, iclass 6, count 0 2006.229.15:43:21.76#ibcon#read 3, iclass 6, count 0 2006.229.15:43:21.76#ibcon#about to read 4, iclass 6, count 0 2006.229.15:43:21.76#ibcon#read 4, iclass 6, count 0 2006.229.15:43:21.76#ibcon#about to read 5, iclass 6, count 0 2006.229.15:43:21.76#ibcon#read 5, iclass 6, count 0 2006.229.15:43:21.76#ibcon#about to read 6, iclass 6, count 0 2006.229.15:43:21.76#ibcon#read 6, iclass 6, count 0 2006.229.15:43:21.76#ibcon#end of sib2, iclass 6, count 0 2006.229.15:43:21.76#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:43:21.76#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:43:21.76#ibcon#[27=USB\r\n] 2006.229.15:43:21.76#ibcon#*before write, iclass 6, count 0 2006.229.15:43:21.76#ibcon#enter sib2, iclass 6, count 0 2006.229.15:43:21.76#ibcon#flushed, iclass 6, count 0 2006.229.15:43:21.76#ibcon#about to write, iclass 6, count 0 2006.229.15:43:21.76#ibcon#wrote, iclass 6, count 0 2006.229.15:43:21.76#ibcon#about to read 3, iclass 6, count 0 2006.229.15:43:21.79#ibcon#read 3, iclass 6, count 0 2006.229.15:43:21.79#ibcon#about to read 4, iclass 6, count 0 2006.229.15:43:21.79#ibcon#read 4, iclass 6, count 0 2006.229.15:43:21.79#ibcon#about to read 5, iclass 6, count 0 2006.229.15:43:21.79#ibcon#read 5, iclass 6, count 0 2006.229.15:43:21.79#ibcon#about to read 6, iclass 6, count 0 2006.229.15:43:21.79#ibcon#read 6, iclass 6, count 0 2006.229.15:43:21.79#ibcon#end of sib2, iclass 6, count 0 2006.229.15:43:21.79#ibcon#*after write, iclass 6, count 0 2006.229.15:43:21.79#ibcon#*before return 0, iclass 6, count 0 2006.229.15:43:21.79#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:21.79#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:43:21.79#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:43:21.79#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:43:21.79$vck44/vblo=7,734.99 2006.229.15:43:21.79#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:43:21.79#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:43:21.79#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:21.79#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:21.79#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:21.79#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:21.79#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:43:21.79#ibcon#first serial, iclass 10, count 0 2006.229.15:43:21.79#ibcon#enter sib2, iclass 10, count 0 2006.229.15:43:21.79#ibcon#flushed, iclass 10, count 0 2006.229.15:43:21.79#ibcon#about to write, iclass 10, count 0 2006.229.15:43:21.79#ibcon#wrote, iclass 10, count 0 2006.229.15:43:21.79#ibcon#about to read 3, iclass 10, count 0 2006.229.15:43:21.81#ibcon#read 3, iclass 10, count 0 2006.229.15:43:21.81#ibcon#about to read 4, iclass 10, count 0 2006.229.15:43:21.81#ibcon#read 4, iclass 10, count 0 2006.229.15:43:21.81#ibcon#about to read 5, iclass 10, count 0 2006.229.15:43:21.81#ibcon#read 5, iclass 10, count 0 2006.229.15:43:21.81#ibcon#about to read 6, iclass 10, count 0 2006.229.15:43:21.81#ibcon#read 6, iclass 10, count 0 2006.229.15:43:21.81#ibcon#end of sib2, iclass 10, count 0 2006.229.15:43:21.81#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:43:21.81#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:43:21.81#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:43:21.81#ibcon#*before write, iclass 10, count 0 2006.229.15:43:21.81#ibcon#enter sib2, iclass 10, count 0 2006.229.15:43:21.81#ibcon#flushed, iclass 10, count 0 2006.229.15:43:21.81#ibcon#about to write, iclass 10, count 0 2006.229.15:43:21.81#ibcon#wrote, iclass 10, count 0 2006.229.15:43:21.81#ibcon#about to read 3, iclass 10, count 0 2006.229.15:43:21.85#ibcon#read 3, iclass 10, count 0 2006.229.15:43:21.85#ibcon#about to read 4, iclass 10, count 0 2006.229.15:43:21.85#ibcon#read 4, iclass 10, count 0 2006.229.15:43:21.85#ibcon#about to read 5, iclass 10, count 0 2006.229.15:43:21.85#ibcon#read 5, iclass 10, count 0 2006.229.15:43:21.85#ibcon#about to read 6, iclass 10, count 0 2006.229.15:43:21.85#ibcon#read 6, iclass 10, count 0 2006.229.15:43:21.85#ibcon#end of sib2, iclass 10, count 0 2006.229.15:43:21.85#ibcon#*after write, iclass 10, count 0 2006.229.15:43:21.85#ibcon#*before return 0, iclass 10, count 0 2006.229.15:43:21.85#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:21.85#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:43:21.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:43:21.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:43:21.85$vck44/vb=7,4 2006.229.15:43:21.85#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:43:21.85#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:43:21.85#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:21.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:21.91#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:21.91#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:21.91#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:43:21.91#ibcon#first serial, iclass 12, count 2 2006.229.15:43:21.91#ibcon#enter sib2, iclass 12, count 2 2006.229.15:43:21.91#ibcon#flushed, iclass 12, count 2 2006.229.15:43:21.91#ibcon#about to write, iclass 12, count 2 2006.229.15:43:21.91#ibcon#wrote, iclass 12, count 2 2006.229.15:43:21.91#ibcon#about to read 3, iclass 12, count 2 2006.229.15:43:21.93#ibcon#read 3, iclass 12, count 2 2006.229.15:43:21.93#ibcon#about to read 4, iclass 12, count 2 2006.229.15:43:21.93#ibcon#read 4, iclass 12, count 2 2006.229.15:43:21.93#ibcon#about to read 5, iclass 12, count 2 2006.229.15:43:21.93#ibcon#read 5, iclass 12, count 2 2006.229.15:43:21.93#ibcon#about to read 6, iclass 12, count 2 2006.229.15:43:21.93#ibcon#read 6, iclass 12, count 2 2006.229.15:43:21.93#ibcon#end of sib2, iclass 12, count 2 2006.229.15:43:21.93#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:43:21.93#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:43:21.93#ibcon#[27=AT07-04\r\n] 2006.229.15:43:21.93#ibcon#*before write, iclass 12, count 2 2006.229.15:43:21.93#ibcon#enter sib2, iclass 12, count 2 2006.229.15:43:21.93#ibcon#flushed, iclass 12, count 2 2006.229.15:43:21.93#ibcon#about to write, iclass 12, count 2 2006.229.15:43:21.93#ibcon#wrote, iclass 12, count 2 2006.229.15:43:21.93#ibcon#about to read 3, iclass 12, count 2 2006.229.15:43:21.96#ibcon#read 3, iclass 12, count 2 2006.229.15:43:21.96#ibcon#about to read 4, iclass 12, count 2 2006.229.15:43:21.96#ibcon#read 4, iclass 12, count 2 2006.229.15:43:21.96#ibcon#about to read 5, iclass 12, count 2 2006.229.15:43:21.96#ibcon#read 5, iclass 12, count 2 2006.229.15:43:21.96#ibcon#about to read 6, iclass 12, count 2 2006.229.15:43:21.96#ibcon#read 6, iclass 12, count 2 2006.229.15:43:21.96#ibcon#end of sib2, iclass 12, count 2 2006.229.15:43:21.96#ibcon#*after write, iclass 12, count 2 2006.229.15:43:21.96#ibcon#*before return 0, iclass 12, count 2 2006.229.15:43:21.96#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:21.96#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:43:21.96#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:43:21.96#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:21.96#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:22.08#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:22.08#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:22.08#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:43:22.08#ibcon#first serial, iclass 12, count 0 2006.229.15:43:22.08#ibcon#enter sib2, iclass 12, count 0 2006.229.15:43:22.08#ibcon#flushed, iclass 12, count 0 2006.229.15:43:22.08#ibcon#about to write, iclass 12, count 0 2006.229.15:43:22.08#ibcon#wrote, iclass 12, count 0 2006.229.15:43:22.08#ibcon#about to read 3, iclass 12, count 0 2006.229.15:43:22.10#ibcon#read 3, iclass 12, count 0 2006.229.15:43:22.10#ibcon#about to read 4, iclass 12, count 0 2006.229.15:43:22.10#ibcon#read 4, iclass 12, count 0 2006.229.15:43:22.10#ibcon#about to read 5, iclass 12, count 0 2006.229.15:43:22.10#ibcon#read 5, iclass 12, count 0 2006.229.15:43:22.10#ibcon#about to read 6, iclass 12, count 0 2006.229.15:43:22.10#ibcon#read 6, iclass 12, count 0 2006.229.15:43:22.10#ibcon#end of sib2, iclass 12, count 0 2006.229.15:43:22.10#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:43:22.10#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:43:22.10#ibcon#[27=USB\r\n] 2006.229.15:43:22.10#ibcon#*before write, iclass 12, count 0 2006.229.15:43:22.10#ibcon#enter sib2, iclass 12, count 0 2006.229.15:43:22.10#ibcon#flushed, iclass 12, count 0 2006.229.15:43:22.10#ibcon#about to write, iclass 12, count 0 2006.229.15:43:22.10#ibcon#wrote, iclass 12, count 0 2006.229.15:43:22.10#ibcon#about to read 3, iclass 12, count 0 2006.229.15:43:22.13#ibcon#read 3, iclass 12, count 0 2006.229.15:43:22.13#ibcon#about to read 4, iclass 12, count 0 2006.229.15:43:22.13#ibcon#read 4, iclass 12, count 0 2006.229.15:43:22.13#ibcon#about to read 5, iclass 12, count 0 2006.229.15:43:22.13#ibcon#read 5, iclass 12, count 0 2006.229.15:43:22.13#ibcon#about to read 6, iclass 12, count 0 2006.229.15:43:22.13#ibcon#read 6, iclass 12, count 0 2006.229.15:43:22.13#ibcon#end of sib2, iclass 12, count 0 2006.229.15:43:22.13#ibcon#*after write, iclass 12, count 0 2006.229.15:43:22.13#ibcon#*before return 0, iclass 12, count 0 2006.229.15:43:22.13#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:22.13#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:43:22.13#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:43:22.13#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:43:22.13$vck44/vblo=8,744.99 2006.229.15:43:22.13#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:43:22.13#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:43:22.13#ibcon#ireg 17 cls_cnt 0 2006.229.15:43:22.13#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:22.13#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:22.13#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:22.13#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:43:22.13#ibcon#first serial, iclass 14, count 0 2006.229.15:43:22.13#ibcon#enter sib2, iclass 14, count 0 2006.229.15:43:22.13#ibcon#flushed, iclass 14, count 0 2006.229.15:43:22.13#ibcon#about to write, iclass 14, count 0 2006.229.15:43:22.13#ibcon#wrote, iclass 14, count 0 2006.229.15:43:22.13#ibcon#about to read 3, iclass 14, count 0 2006.229.15:43:22.15#ibcon#read 3, iclass 14, count 0 2006.229.15:43:22.15#ibcon#about to read 4, iclass 14, count 0 2006.229.15:43:22.15#ibcon#read 4, iclass 14, count 0 2006.229.15:43:22.15#ibcon#about to read 5, iclass 14, count 0 2006.229.15:43:22.15#ibcon#read 5, iclass 14, count 0 2006.229.15:43:22.15#ibcon#about to read 6, iclass 14, count 0 2006.229.15:43:22.15#ibcon#read 6, iclass 14, count 0 2006.229.15:43:22.15#ibcon#end of sib2, iclass 14, count 0 2006.229.15:43:22.15#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:43:22.15#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:43:22.15#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:43:22.15#ibcon#*before write, iclass 14, count 0 2006.229.15:43:22.15#ibcon#enter sib2, iclass 14, count 0 2006.229.15:43:22.15#ibcon#flushed, iclass 14, count 0 2006.229.15:43:22.15#ibcon#about to write, iclass 14, count 0 2006.229.15:43:22.15#ibcon#wrote, iclass 14, count 0 2006.229.15:43:22.15#ibcon#about to read 3, iclass 14, count 0 2006.229.15:43:22.19#ibcon#read 3, iclass 14, count 0 2006.229.15:43:22.19#ibcon#about to read 4, iclass 14, count 0 2006.229.15:43:22.19#ibcon#read 4, iclass 14, count 0 2006.229.15:43:22.19#ibcon#about to read 5, iclass 14, count 0 2006.229.15:43:22.19#ibcon#read 5, iclass 14, count 0 2006.229.15:43:22.19#ibcon#about to read 6, iclass 14, count 0 2006.229.15:43:22.19#ibcon#read 6, iclass 14, count 0 2006.229.15:43:22.19#ibcon#end of sib2, iclass 14, count 0 2006.229.15:43:22.19#ibcon#*after write, iclass 14, count 0 2006.229.15:43:22.19#ibcon#*before return 0, iclass 14, count 0 2006.229.15:43:22.19#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:22.19#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:43:22.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:43:22.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:43:22.19$vck44/vb=8,4 2006.229.15:43:22.19#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:43:22.19#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:43:22.19#ibcon#ireg 11 cls_cnt 2 2006.229.15:43:22.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:22.25#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:22.25#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:22.25#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:43:22.25#ibcon#first serial, iclass 16, count 2 2006.229.15:43:22.25#ibcon#enter sib2, iclass 16, count 2 2006.229.15:43:22.25#ibcon#flushed, iclass 16, count 2 2006.229.15:43:22.25#ibcon#about to write, iclass 16, count 2 2006.229.15:43:22.25#ibcon#wrote, iclass 16, count 2 2006.229.15:43:22.25#ibcon#about to read 3, iclass 16, count 2 2006.229.15:43:22.27#ibcon#read 3, iclass 16, count 2 2006.229.15:43:22.27#ibcon#about to read 4, iclass 16, count 2 2006.229.15:43:22.27#ibcon#read 4, iclass 16, count 2 2006.229.15:43:22.27#ibcon#about to read 5, iclass 16, count 2 2006.229.15:43:22.27#ibcon#read 5, iclass 16, count 2 2006.229.15:43:22.27#ibcon#about to read 6, iclass 16, count 2 2006.229.15:43:22.27#ibcon#read 6, iclass 16, count 2 2006.229.15:43:22.27#ibcon#end of sib2, iclass 16, count 2 2006.229.15:43:22.27#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:43:22.27#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:43:22.27#ibcon#[27=AT08-04\r\n] 2006.229.15:43:22.27#ibcon#*before write, iclass 16, count 2 2006.229.15:43:22.27#ibcon#enter sib2, iclass 16, count 2 2006.229.15:43:22.27#ibcon#flushed, iclass 16, count 2 2006.229.15:43:22.27#ibcon#about to write, iclass 16, count 2 2006.229.15:43:22.27#ibcon#wrote, iclass 16, count 2 2006.229.15:43:22.27#ibcon#about to read 3, iclass 16, count 2 2006.229.15:43:22.30#ibcon#read 3, iclass 16, count 2 2006.229.15:43:22.30#ibcon#about to read 4, iclass 16, count 2 2006.229.15:43:22.30#ibcon#read 4, iclass 16, count 2 2006.229.15:43:22.30#ibcon#about to read 5, iclass 16, count 2 2006.229.15:43:22.30#ibcon#read 5, iclass 16, count 2 2006.229.15:43:22.30#ibcon#about to read 6, iclass 16, count 2 2006.229.15:43:22.30#ibcon#read 6, iclass 16, count 2 2006.229.15:43:22.30#ibcon#end of sib2, iclass 16, count 2 2006.229.15:43:22.30#ibcon#*after write, iclass 16, count 2 2006.229.15:43:22.30#ibcon#*before return 0, iclass 16, count 2 2006.229.15:43:22.30#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:22.30#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:43:22.30#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:43:22.30#ibcon#ireg 7 cls_cnt 0 2006.229.15:43:22.30#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:22.42#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:22.42#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:22.42#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:43:22.42#ibcon#first serial, iclass 16, count 0 2006.229.15:43:22.42#ibcon#enter sib2, iclass 16, count 0 2006.229.15:43:22.42#ibcon#flushed, iclass 16, count 0 2006.229.15:43:22.42#ibcon#about to write, iclass 16, count 0 2006.229.15:43:22.42#ibcon#wrote, iclass 16, count 0 2006.229.15:43:22.42#ibcon#about to read 3, iclass 16, count 0 2006.229.15:43:22.44#ibcon#read 3, iclass 16, count 0 2006.229.15:43:22.44#ibcon#about to read 4, iclass 16, count 0 2006.229.15:43:22.44#ibcon#read 4, iclass 16, count 0 2006.229.15:43:22.44#ibcon#about to read 5, iclass 16, count 0 2006.229.15:43:22.44#ibcon#read 5, iclass 16, count 0 2006.229.15:43:22.44#ibcon#about to read 6, iclass 16, count 0 2006.229.15:43:22.44#ibcon#read 6, iclass 16, count 0 2006.229.15:43:22.44#ibcon#end of sib2, iclass 16, count 0 2006.229.15:43:22.44#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:43:22.44#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:43:22.44#ibcon#[27=USB\r\n] 2006.229.15:43:22.44#ibcon#*before write, iclass 16, count 0 2006.229.15:43:22.44#ibcon#enter sib2, iclass 16, count 0 2006.229.15:43:22.44#ibcon#flushed, iclass 16, count 0 2006.229.15:43:22.44#ibcon#about to write, iclass 16, count 0 2006.229.15:43:22.44#ibcon#wrote, iclass 16, count 0 2006.229.15:43:22.44#ibcon#about to read 3, iclass 16, count 0 2006.229.15:43:22.47#ibcon#read 3, iclass 16, count 0 2006.229.15:43:22.47#ibcon#about to read 4, iclass 16, count 0 2006.229.15:43:22.47#ibcon#read 4, iclass 16, count 0 2006.229.15:43:22.47#ibcon#about to read 5, iclass 16, count 0 2006.229.15:43:22.47#ibcon#read 5, iclass 16, count 0 2006.229.15:43:22.47#ibcon#about to read 6, iclass 16, count 0 2006.229.15:43:22.47#ibcon#read 6, iclass 16, count 0 2006.229.15:43:22.47#ibcon#end of sib2, iclass 16, count 0 2006.229.15:43:22.47#ibcon#*after write, iclass 16, count 0 2006.229.15:43:22.47#ibcon#*before return 0, iclass 16, count 0 2006.229.15:43:22.47#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:22.47#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:43:22.47#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:43:22.47#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:43:22.47$vck44/vabw=wide 2006.229.15:43:22.47#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:43:22.47#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:43:22.47#ibcon#ireg 8 cls_cnt 0 2006.229.15:43:22.47#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:22.47#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:22.47#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:22.47#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:43:22.47#ibcon#first serial, iclass 18, count 0 2006.229.15:43:22.47#ibcon#enter sib2, iclass 18, count 0 2006.229.15:43:22.47#ibcon#flushed, iclass 18, count 0 2006.229.15:43:22.47#ibcon#about to write, iclass 18, count 0 2006.229.15:43:22.47#ibcon#wrote, iclass 18, count 0 2006.229.15:43:22.47#ibcon#about to read 3, iclass 18, count 0 2006.229.15:43:22.49#ibcon#read 3, iclass 18, count 0 2006.229.15:43:22.49#ibcon#about to read 4, iclass 18, count 0 2006.229.15:43:22.49#ibcon#read 4, iclass 18, count 0 2006.229.15:43:22.49#ibcon#about to read 5, iclass 18, count 0 2006.229.15:43:22.49#ibcon#read 5, iclass 18, count 0 2006.229.15:43:22.49#ibcon#about to read 6, iclass 18, count 0 2006.229.15:43:22.49#ibcon#read 6, iclass 18, count 0 2006.229.15:43:22.49#ibcon#end of sib2, iclass 18, count 0 2006.229.15:43:22.49#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:43:22.49#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:43:22.49#ibcon#[25=BW32\r\n] 2006.229.15:43:22.49#ibcon#*before write, iclass 18, count 0 2006.229.15:43:22.49#ibcon#enter sib2, iclass 18, count 0 2006.229.15:43:22.49#ibcon#flushed, iclass 18, count 0 2006.229.15:43:22.49#ibcon#about to write, iclass 18, count 0 2006.229.15:43:22.49#ibcon#wrote, iclass 18, count 0 2006.229.15:43:22.49#ibcon#about to read 3, iclass 18, count 0 2006.229.15:43:22.52#ibcon#read 3, iclass 18, count 0 2006.229.15:43:22.52#ibcon#about to read 4, iclass 18, count 0 2006.229.15:43:22.52#ibcon#read 4, iclass 18, count 0 2006.229.15:43:22.52#ibcon#about to read 5, iclass 18, count 0 2006.229.15:43:22.52#ibcon#read 5, iclass 18, count 0 2006.229.15:43:22.52#ibcon#about to read 6, iclass 18, count 0 2006.229.15:43:22.52#ibcon#read 6, iclass 18, count 0 2006.229.15:43:22.52#ibcon#end of sib2, iclass 18, count 0 2006.229.15:43:22.52#ibcon#*after write, iclass 18, count 0 2006.229.15:43:22.52#ibcon#*before return 0, iclass 18, count 0 2006.229.15:43:22.52#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:22.52#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:43:22.52#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:43:22.52#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:43:22.52$vck44/vbbw=wide 2006.229.15:43:22.52#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:43:22.52#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:43:22.52#ibcon#ireg 8 cls_cnt 0 2006.229.15:43:22.52#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:43:22.59#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:43:22.59#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:43:22.59#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:43:22.59#ibcon#first serial, iclass 20, count 0 2006.229.15:43:22.59#ibcon#enter sib2, iclass 20, count 0 2006.229.15:43:22.59#ibcon#flushed, iclass 20, count 0 2006.229.15:43:22.59#ibcon#about to write, iclass 20, count 0 2006.229.15:43:22.59#ibcon#wrote, iclass 20, count 0 2006.229.15:43:22.59#ibcon#about to read 3, iclass 20, count 0 2006.229.15:43:22.61#ibcon#read 3, iclass 20, count 0 2006.229.15:43:22.61#ibcon#about to read 4, iclass 20, count 0 2006.229.15:43:22.61#ibcon#read 4, iclass 20, count 0 2006.229.15:43:22.61#ibcon#about to read 5, iclass 20, count 0 2006.229.15:43:22.61#ibcon#read 5, iclass 20, count 0 2006.229.15:43:22.61#ibcon#about to read 6, iclass 20, count 0 2006.229.15:43:22.61#ibcon#read 6, iclass 20, count 0 2006.229.15:43:22.61#ibcon#end of sib2, iclass 20, count 0 2006.229.15:43:22.61#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:43:22.61#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:43:22.61#ibcon#[27=BW32\r\n] 2006.229.15:43:22.61#ibcon#*before write, iclass 20, count 0 2006.229.15:43:22.61#ibcon#enter sib2, iclass 20, count 0 2006.229.15:43:22.61#ibcon#flushed, iclass 20, count 0 2006.229.15:43:22.61#ibcon#about to write, iclass 20, count 0 2006.229.15:43:22.61#ibcon#wrote, iclass 20, count 0 2006.229.15:43:22.61#ibcon#about to read 3, iclass 20, count 0 2006.229.15:43:22.64#ibcon#read 3, iclass 20, count 0 2006.229.15:43:22.64#ibcon#about to read 4, iclass 20, count 0 2006.229.15:43:22.64#ibcon#read 4, iclass 20, count 0 2006.229.15:43:22.64#ibcon#about to read 5, iclass 20, count 0 2006.229.15:43:22.64#ibcon#read 5, iclass 20, count 0 2006.229.15:43:22.64#ibcon#about to read 6, iclass 20, count 0 2006.229.15:43:22.64#ibcon#read 6, iclass 20, count 0 2006.229.15:43:22.64#ibcon#end of sib2, iclass 20, count 0 2006.229.15:43:22.64#ibcon#*after write, iclass 20, count 0 2006.229.15:43:22.64#ibcon#*before return 0, iclass 20, count 0 2006.229.15:43:22.64#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:43:22.64#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:43:22.64#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:43:22.64#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:43:22.64$setupk4/ifdk4 2006.229.15:43:22.64$ifdk4/lo= 2006.229.15:43:22.64$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:43:22.64$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:43:22.64$ifdk4/patch= 2006.229.15:43:22.64$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:43:22.64$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:43:22.64$setupk4/!*+20s 2006.229.15:43:23.56#abcon#<5=/06 1.0 1.7 27.251001001.8\r\n> 2006.229.15:43:23.58#abcon#{5=INTERFACE CLEAR} 2006.229.15:43:23.64#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:43:30.13#trakl#Source acquired 2006.229.15:43:31.13#flagr#flagr/antenna,acquired 2006.229.15:43:37.15$setupk4/"tpicd 2006.229.15:43:37.15$setupk4/echo=off 2006.229.15:43:37.15$setupk4/xlog=off 2006.229.15:43:37.15:!2006.229.15:45:33 2006.229.15:45:33.00:preob 2006.229.15:45:33.14/onsource/TRACKING 2006.229.15:45:33.14:!2006.229.15:45:43 2006.229.15:45:43.00:"tape 2006.229.15:45:43.00:"st=record 2006.229.15:45:43.00:data_valid=on 2006.229.15:45:43.00:midob 2006.229.15:45:43.14/onsource/TRACKING 2006.229.15:45:43.14/wx/27.23,1001.8,100 2006.229.15:45:43.29/cable/+6.4144E-03 2006.229.15:45:44.38/va/01,08,usb,yes,29,31 2006.229.15:45:44.38/va/02,07,usb,yes,31,32 2006.229.15:45:44.38/va/03,06,usb,yes,39,41 2006.229.15:45:44.38/va/04,07,usb,yes,32,34 2006.229.15:45:44.38/va/05,04,usb,yes,29,29 2006.229.15:45:44.38/va/06,04,usb,yes,32,32 2006.229.15:45:44.38/va/07,05,usb,yes,29,29 2006.229.15:45:44.38/va/08,06,usb,yes,21,26 2006.229.15:45:44.61/valo/01,524.99,yes,locked 2006.229.15:45:44.61/valo/02,534.99,yes,locked 2006.229.15:45:44.61/valo/03,564.99,yes,locked 2006.229.15:45:44.61/valo/04,624.99,yes,locked 2006.229.15:45:44.61/valo/05,734.99,yes,locked 2006.229.15:45:44.61/valo/06,814.99,yes,locked 2006.229.15:45:44.61/valo/07,864.99,yes,locked 2006.229.15:45:44.61/valo/08,884.99,yes,locked 2006.229.15:45:45.70/vb/01,04,usb,yes,30,28 2006.229.15:45:45.70/vb/02,04,usb,yes,33,33 2006.229.15:45:45.70/vb/03,04,usb,yes,30,33 2006.229.15:45:45.70/vb/04,04,usb,yes,34,33 2006.229.15:45:45.70/vb/05,04,usb,yes,26,29 2006.229.15:45:45.70/vb/06,04,usb,yes,31,27 2006.229.15:45:45.70/vb/07,04,usb,yes,31,31 2006.229.15:45:45.70/vb/08,04,usb,yes,28,32 2006.229.15:45:45.93/vblo/01,629.99,yes,locked 2006.229.15:45:45.93/vblo/02,634.99,yes,locked 2006.229.15:45:45.93/vblo/03,649.99,yes,locked 2006.229.15:45:45.93/vblo/04,679.99,yes,locked 2006.229.15:45:45.93/vblo/05,709.99,yes,locked 2006.229.15:45:45.93/vblo/06,719.99,yes,locked 2006.229.15:45:45.93/vblo/07,734.99,yes,locked 2006.229.15:45:45.93/vblo/08,744.99,yes,locked 2006.229.15:45:46.08/vabw/8 2006.229.15:45:46.23/vbbw/8 2006.229.15:45:46.32/xfe/off,on,12.2 2006.229.15:45:46.69/ifatt/23,28,28,28 2006.229.15:45:47.08/fmout-gps/S +4.49E-07 2006.229.15:45:47.12:!2006.229.15:47:03 2006.229.15:47:03.00:data_valid=off 2006.229.15:47:03.00:"et 2006.229.15:47:03.00:!+3s 2006.229.15:47:06.01:"tape 2006.229.15:47:06.01:postob 2006.229.15:47:06.15/cable/+6.4155E-03 2006.229.15:47:06.15/wx/27.22,1001.8,100 2006.229.15:47:07.08/fmout-gps/S +4.51E-07 2006.229.15:47:07.08:scan_name=229-1551,jd0608,40 2006.229.15:47:07.08:source=1921-293,192451.06,-291430.1,2000.0,ccw 2006.229.15:47:08.14#flagr#flagr/antenna,new-source 2006.229.15:47:08.14:checkk5 2006.229.15:47:08.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:47:08.87/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:47:09.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:47:09.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:47:10.09/chk_obsdata//k5ts1/T2291545??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:47:10.47/chk_obsdata//k5ts2/T2291545??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:47:10.87/chk_obsdata//k5ts3/T2291545??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:47:11.28/chk_obsdata//k5ts4/T2291545??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.15:47:12.00/k5log//k5ts1_log_newline 2006.229.15:47:12.71/k5log//k5ts2_log_newline 2006.229.15:47:13.41/k5log//k5ts3_log_newline 2006.229.15:47:14.11/k5log//k5ts4_log_newline 2006.229.15:47:14.14/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:47:14.14:setupk4=1 2006.229.15:47:14.14$setupk4/echo=on 2006.229.15:47:14.14$setupk4/pcalon 2006.229.15:47:14.14$pcalon/"no phase cal control is implemented here 2006.229.15:47:14.14$setupk4/"tpicd=stop 2006.229.15:47:14.14$setupk4/"rec=synch_on 2006.229.15:47:14.14$setupk4/"rec_mode=128 2006.229.15:47:14.14$setupk4/!* 2006.229.15:47:14.14$setupk4/recpk4 2006.229.15:47:14.14$recpk4/recpatch= 2006.229.15:47:14.15$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:47:14.15$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:47:14.15$setupk4/vck44 2006.229.15:47:14.15$vck44/valo=1,524.99 2006.229.15:47:14.15#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:47:14.15#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:47:14.15#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:14.15#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:14.15#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:14.15#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:14.15#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:47:14.15#ibcon#first serial, iclass 40, count 0 2006.229.15:47:14.15#ibcon#enter sib2, iclass 40, count 0 2006.229.15:47:14.15#ibcon#flushed, iclass 40, count 0 2006.229.15:47:14.15#ibcon#about to write, iclass 40, count 0 2006.229.15:47:14.15#ibcon#wrote, iclass 40, count 0 2006.229.15:47:14.15#ibcon#about to read 3, iclass 40, count 0 2006.229.15:47:14.17#ibcon#read 3, iclass 40, count 0 2006.229.15:47:14.17#ibcon#about to read 4, iclass 40, count 0 2006.229.15:47:14.17#ibcon#read 4, iclass 40, count 0 2006.229.15:47:14.17#ibcon#about to read 5, iclass 40, count 0 2006.229.15:47:14.17#ibcon#read 5, iclass 40, count 0 2006.229.15:47:14.17#ibcon#about to read 6, iclass 40, count 0 2006.229.15:47:14.17#ibcon#read 6, iclass 40, count 0 2006.229.15:47:14.17#ibcon#end of sib2, iclass 40, count 0 2006.229.15:47:14.17#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:47:14.17#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:47:14.17#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:47:14.17#ibcon#*before write, iclass 40, count 0 2006.229.15:47:14.17#ibcon#enter sib2, iclass 40, count 0 2006.229.15:47:14.17#ibcon#flushed, iclass 40, count 0 2006.229.15:47:14.17#ibcon#about to write, iclass 40, count 0 2006.229.15:47:14.17#ibcon#wrote, iclass 40, count 0 2006.229.15:47:14.17#ibcon#about to read 3, iclass 40, count 0 2006.229.15:47:14.22#ibcon#read 3, iclass 40, count 0 2006.229.15:47:14.22#ibcon#about to read 4, iclass 40, count 0 2006.229.15:47:14.22#ibcon#read 4, iclass 40, count 0 2006.229.15:47:14.22#ibcon#about to read 5, iclass 40, count 0 2006.229.15:47:14.22#ibcon#read 5, iclass 40, count 0 2006.229.15:47:14.22#ibcon#about to read 6, iclass 40, count 0 2006.229.15:47:14.22#ibcon#read 6, iclass 40, count 0 2006.229.15:47:14.22#ibcon#end of sib2, iclass 40, count 0 2006.229.15:47:14.22#ibcon#*after write, iclass 40, count 0 2006.229.15:47:14.22#ibcon#*before return 0, iclass 40, count 0 2006.229.15:47:14.22#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:14.22#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:14.22#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:47:14.22#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:47:14.22$vck44/va=1,8 2006.229.15:47:14.22#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:47:14.22#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:47:14.22#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:14.22#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:14.22#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:14.22#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:14.22#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:47:14.22#ibcon#first serial, iclass 4, count 2 2006.229.15:47:14.22#ibcon#enter sib2, iclass 4, count 2 2006.229.15:47:14.22#ibcon#flushed, iclass 4, count 2 2006.229.15:47:14.22#ibcon#about to write, iclass 4, count 2 2006.229.15:47:14.22#ibcon#wrote, iclass 4, count 2 2006.229.15:47:14.22#ibcon#about to read 3, iclass 4, count 2 2006.229.15:47:14.24#ibcon#read 3, iclass 4, count 2 2006.229.15:47:14.24#ibcon#about to read 4, iclass 4, count 2 2006.229.15:47:14.24#ibcon#read 4, iclass 4, count 2 2006.229.15:47:14.24#ibcon#about to read 5, iclass 4, count 2 2006.229.15:47:14.24#ibcon#read 5, iclass 4, count 2 2006.229.15:47:14.24#ibcon#about to read 6, iclass 4, count 2 2006.229.15:47:14.24#ibcon#read 6, iclass 4, count 2 2006.229.15:47:14.24#ibcon#end of sib2, iclass 4, count 2 2006.229.15:47:14.24#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:47:14.24#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:47:14.24#ibcon#[25=AT01-08\r\n] 2006.229.15:47:14.24#ibcon#*before write, iclass 4, count 2 2006.229.15:47:14.24#ibcon#enter sib2, iclass 4, count 2 2006.229.15:47:14.24#ibcon#flushed, iclass 4, count 2 2006.229.15:47:14.24#ibcon#about to write, iclass 4, count 2 2006.229.15:47:14.24#ibcon#wrote, iclass 4, count 2 2006.229.15:47:14.24#ibcon#about to read 3, iclass 4, count 2 2006.229.15:47:14.27#ibcon#read 3, iclass 4, count 2 2006.229.15:47:14.27#ibcon#about to read 4, iclass 4, count 2 2006.229.15:47:14.27#ibcon#read 4, iclass 4, count 2 2006.229.15:47:14.27#ibcon#about to read 5, iclass 4, count 2 2006.229.15:47:14.27#ibcon#read 5, iclass 4, count 2 2006.229.15:47:14.27#ibcon#about to read 6, iclass 4, count 2 2006.229.15:47:14.27#ibcon#read 6, iclass 4, count 2 2006.229.15:47:14.27#ibcon#end of sib2, iclass 4, count 2 2006.229.15:47:14.27#ibcon#*after write, iclass 4, count 2 2006.229.15:47:14.27#ibcon#*before return 0, iclass 4, count 2 2006.229.15:47:14.27#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:14.27#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:14.27#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:47:14.27#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:14.27#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:14.39#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:14.39#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:14.39#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:47:14.39#ibcon#first serial, iclass 4, count 0 2006.229.15:47:14.39#ibcon#enter sib2, iclass 4, count 0 2006.229.15:47:14.39#ibcon#flushed, iclass 4, count 0 2006.229.15:47:14.39#ibcon#about to write, iclass 4, count 0 2006.229.15:47:14.39#ibcon#wrote, iclass 4, count 0 2006.229.15:47:14.39#ibcon#about to read 3, iclass 4, count 0 2006.229.15:47:14.41#ibcon#read 3, iclass 4, count 0 2006.229.15:47:14.41#ibcon#about to read 4, iclass 4, count 0 2006.229.15:47:14.41#ibcon#read 4, iclass 4, count 0 2006.229.15:47:14.41#ibcon#about to read 5, iclass 4, count 0 2006.229.15:47:14.41#ibcon#read 5, iclass 4, count 0 2006.229.15:47:14.41#ibcon#about to read 6, iclass 4, count 0 2006.229.15:47:14.41#ibcon#read 6, iclass 4, count 0 2006.229.15:47:14.41#ibcon#end of sib2, iclass 4, count 0 2006.229.15:47:14.41#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:47:14.41#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:47:14.41#ibcon#[25=USB\r\n] 2006.229.15:47:14.41#ibcon#*before write, iclass 4, count 0 2006.229.15:47:14.41#ibcon#enter sib2, iclass 4, count 0 2006.229.15:47:14.41#ibcon#flushed, iclass 4, count 0 2006.229.15:47:14.41#ibcon#about to write, iclass 4, count 0 2006.229.15:47:14.41#ibcon#wrote, iclass 4, count 0 2006.229.15:47:14.41#ibcon#about to read 3, iclass 4, count 0 2006.229.15:47:14.44#ibcon#read 3, iclass 4, count 0 2006.229.15:47:14.44#ibcon#about to read 4, iclass 4, count 0 2006.229.15:47:14.44#ibcon#read 4, iclass 4, count 0 2006.229.15:47:14.44#ibcon#about to read 5, iclass 4, count 0 2006.229.15:47:14.44#ibcon#read 5, iclass 4, count 0 2006.229.15:47:14.44#ibcon#about to read 6, iclass 4, count 0 2006.229.15:47:14.44#ibcon#read 6, iclass 4, count 0 2006.229.15:47:14.44#ibcon#end of sib2, iclass 4, count 0 2006.229.15:47:14.44#ibcon#*after write, iclass 4, count 0 2006.229.15:47:14.44#ibcon#*before return 0, iclass 4, count 0 2006.229.15:47:14.44#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:14.44#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:14.44#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:47:14.44#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:47:14.44$vck44/valo=2,534.99 2006.229.15:47:14.44#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:47:14.44#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:47:14.44#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:14.44#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:14.44#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:14.44#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:14.44#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:47:14.44#ibcon#first serial, iclass 6, count 0 2006.229.15:47:14.44#ibcon#enter sib2, iclass 6, count 0 2006.229.15:47:14.44#ibcon#flushed, iclass 6, count 0 2006.229.15:47:14.44#ibcon#about to write, iclass 6, count 0 2006.229.15:47:14.44#ibcon#wrote, iclass 6, count 0 2006.229.15:47:14.44#ibcon#about to read 3, iclass 6, count 0 2006.229.15:47:14.46#ibcon#read 3, iclass 6, count 0 2006.229.15:47:14.46#ibcon#about to read 4, iclass 6, count 0 2006.229.15:47:14.46#ibcon#read 4, iclass 6, count 0 2006.229.15:47:14.46#ibcon#about to read 5, iclass 6, count 0 2006.229.15:47:14.46#ibcon#read 5, iclass 6, count 0 2006.229.15:47:14.46#ibcon#about to read 6, iclass 6, count 0 2006.229.15:47:14.46#ibcon#read 6, iclass 6, count 0 2006.229.15:47:14.46#ibcon#end of sib2, iclass 6, count 0 2006.229.15:47:14.46#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:47:14.46#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:47:14.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:47:14.46#ibcon#*before write, iclass 6, count 0 2006.229.15:47:14.46#ibcon#enter sib2, iclass 6, count 0 2006.229.15:47:14.46#ibcon#flushed, iclass 6, count 0 2006.229.15:47:14.46#ibcon#about to write, iclass 6, count 0 2006.229.15:47:14.46#ibcon#wrote, iclass 6, count 0 2006.229.15:47:14.46#ibcon#about to read 3, iclass 6, count 0 2006.229.15:47:14.50#ibcon#read 3, iclass 6, count 0 2006.229.15:47:14.50#ibcon#about to read 4, iclass 6, count 0 2006.229.15:47:14.50#ibcon#read 4, iclass 6, count 0 2006.229.15:47:14.50#ibcon#about to read 5, iclass 6, count 0 2006.229.15:47:14.50#ibcon#read 5, iclass 6, count 0 2006.229.15:47:14.50#ibcon#about to read 6, iclass 6, count 0 2006.229.15:47:14.50#ibcon#read 6, iclass 6, count 0 2006.229.15:47:14.50#ibcon#end of sib2, iclass 6, count 0 2006.229.15:47:14.50#ibcon#*after write, iclass 6, count 0 2006.229.15:47:14.50#ibcon#*before return 0, iclass 6, count 0 2006.229.15:47:14.50#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:14.50#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:14.50#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:47:14.50#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:47:14.50$vck44/va=2,7 2006.229.15:47:14.50#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:47:14.50#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:47:14.50#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:14.50#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:14.56#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:14.56#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:14.56#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:47:14.56#ibcon#first serial, iclass 10, count 2 2006.229.15:47:14.56#ibcon#enter sib2, iclass 10, count 2 2006.229.15:47:14.56#ibcon#flushed, iclass 10, count 2 2006.229.15:47:14.56#ibcon#about to write, iclass 10, count 2 2006.229.15:47:14.56#ibcon#wrote, iclass 10, count 2 2006.229.15:47:14.56#ibcon#about to read 3, iclass 10, count 2 2006.229.15:47:14.58#ibcon#read 3, iclass 10, count 2 2006.229.15:47:14.58#ibcon#about to read 4, iclass 10, count 2 2006.229.15:47:14.58#ibcon#read 4, iclass 10, count 2 2006.229.15:47:14.58#ibcon#about to read 5, iclass 10, count 2 2006.229.15:47:14.58#ibcon#read 5, iclass 10, count 2 2006.229.15:47:14.58#ibcon#about to read 6, iclass 10, count 2 2006.229.15:47:14.58#ibcon#read 6, iclass 10, count 2 2006.229.15:47:14.58#ibcon#end of sib2, iclass 10, count 2 2006.229.15:47:14.58#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:47:14.58#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:47:14.58#ibcon#[25=AT02-07\r\n] 2006.229.15:47:14.58#ibcon#*before write, iclass 10, count 2 2006.229.15:47:14.58#ibcon#enter sib2, iclass 10, count 2 2006.229.15:47:14.58#ibcon#flushed, iclass 10, count 2 2006.229.15:47:14.58#ibcon#about to write, iclass 10, count 2 2006.229.15:47:14.58#ibcon#wrote, iclass 10, count 2 2006.229.15:47:14.58#ibcon#about to read 3, iclass 10, count 2 2006.229.15:47:14.61#ibcon#read 3, iclass 10, count 2 2006.229.15:47:14.61#ibcon#about to read 4, iclass 10, count 2 2006.229.15:47:14.61#ibcon#read 4, iclass 10, count 2 2006.229.15:47:14.61#ibcon#about to read 5, iclass 10, count 2 2006.229.15:47:14.61#ibcon#read 5, iclass 10, count 2 2006.229.15:47:14.61#ibcon#about to read 6, iclass 10, count 2 2006.229.15:47:14.61#ibcon#read 6, iclass 10, count 2 2006.229.15:47:14.61#ibcon#end of sib2, iclass 10, count 2 2006.229.15:47:14.61#ibcon#*after write, iclass 10, count 2 2006.229.15:47:14.61#ibcon#*before return 0, iclass 10, count 2 2006.229.15:47:14.61#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:14.61#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:14.61#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:47:14.61#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:14.61#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:14.73#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:14.73#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:14.73#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:47:14.73#ibcon#first serial, iclass 10, count 0 2006.229.15:47:14.73#ibcon#enter sib2, iclass 10, count 0 2006.229.15:47:14.73#ibcon#flushed, iclass 10, count 0 2006.229.15:47:14.73#ibcon#about to write, iclass 10, count 0 2006.229.15:47:14.73#ibcon#wrote, iclass 10, count 0 2006.229.15:47:14.73#ibcon#about to read 3, iclass 10, count 0 2006.229.15:47:14.75#ibcon#read 3, iclass 10, count 0 2006.229.15:47:14.75#ibcon#about to read 4, iclass 10, count 0 2006.229.15:47:14.75#ibcon#read 4, iclass 10, count 0 2006.229.15:47:14.75#ibcon#about to read 5, iclass 10, count 0 2006.229.15:47:14.75#ibcon#read 5, iclass 10, count 0 2006.229.15:47:14.75#ibcon#about to read 6, iclass 10, count 0 2006.229.15:47:14.75#ibcon#read 6, iclass 10, count 0 2006.229.15:47:14.75#ibcon#end of sib2, iclass 10, count 0 2006.229.15:47:14.75#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:47:14.75#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:47:14.75#ibcon#[25=USB\r\n] 2006.229.15:47:14.75#ibcon#*before write, iclass 10, count 0 2006.229.15:47:14.75#ibcon#enter sib2, iclass 10, count 0 2006.229.15:47:14.75#ibcon#flushed, iclass 10, count 0 2006.229.15:47:14.75#ibcon#about to write, iclass 10, count 0 2006.229.15:47:14.75#ibcon#wrote, iclass 10, count 0 2006.229.15:47:14.75#ibcon#about to read 3, iclass 10, count 0 2006.229.15:47:14.78#ibcon#read 3, iclass 10, count 0 2006.229.15:47:14.78#ibcon#about to read 4, iclass 10, count 0 2006.229.15:47:14.78#ibcon#read 4, iclass 10, count 0 2006.229.15:47:14.78#ibcon#about to read 5, iclass 10, count 0 2006.229.15:47:14.78#ibcon#read 5, iclass 10, count 0 2006.229.15:47:14.78#ibcon#about to read 6, iclass 10, count 0 2006.229.15:47:14.78#ibcon#read 6, iclass 10, count 0 2006.229.15:47:14.78#ibcon#end of sib2, iclass 10, count 0 2006.229.15:47:14.78#ibcon#*after write, iclass 10, count 0 2006.229.15:47:14.78#ibcon#*before return 0, iclass 10, count 0 2006.229.15:47:14.78#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:14.78#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:14.78#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:47:14.78#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:47:14.78$vck44/valo=3,564.99 2006.229.15:47:14.78#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:47:14.78#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:47:14.78#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:14.78#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:14.78#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:14.78#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:14.78#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:47:14.78#ibcon#first serial, iclass 12, count 0 2006.229.15:47:14.78#ibcon#enter sib2, iclass 12, count 0 2006.229.15:47:14.78#ibcon#flushed, iclass 12, count 0 2006.229.15:47:14.78#ibcon#about to write, iclass 12, count 0 2006.229.15:47:14.78#ibcon#wrote, iclass 12, count 0 2006.229.15:47:14.78#ibcon#about to read 3, iclass 12, count 0 2006.229.15:47:14.80#ibcon#read 3, iclass 12, count 0 2006.229.15:47:14.80#ibcon#about to read 4, iclass 12, count 0 2006.229.15:47:14.80#ibcon#read 4, iclass 12, count 0 2006.229.15:47:14.80#ibcon#about to read 5, iclass 12, count 0 2006.229.15:47:14.80#ibcon#read 5, iclass 12, count 0 2006.229.15:47:14.80#ibcon#about to read 6, iclass 12, count 0 2006.229.15:47:14.80#ibcon#read 6, iclass 12, count 0 2006.229.15:47:14.80#ibcon#end of sib2, iclass 12, count 0 2006.229.15:47:14.80#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:47:14.80#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:47:14.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:47:14.80#ibcon#*before write, iclass 12, count 0 2006.229.15:47:14.80#ibcon#enter sib2, iclass 12, count 0 2006.229.15:47:14.80#ibcon#flushed, iclass 12, count 0 2006.229.15:47:14.80#ibcon#about to write, iclass 12, count 0 2006.229.15:47:14.80#ibcon#wrote, iclass 12, count 0 2006.229.15:47:14.80#ibcon#about to read 3, iclass 12, count 0 2006.229.15:47:14.84#ibcon#read 3, iclass 12, count 0 2006.229.15:47:14.84#ibcon#about to read 4, iclass 12, count 0 2006.229.15:47:14.84#ibcon#read 4, iclass 12, count 0 2006.229.15:47:14.84#ibcon#about to read 5, iclass 12, count 0 2006.229.15:47:14.84#ibcon#read 5, iclass 12, count 0 2006.229.15:47:14.84#ibcon#about to read 6, iclass 12, count 0 2006.229.15:47:14.84#ibcon#read 6, iclass 12, count 0 2006.229.15:47:14.84#ibcon#end of sib2, iclass 12, count 0 2006.229.15:47:14.84#ibcon#*after write, iclass 12, count 0 2006.229.15:47:14.84#ibcon#*before return 0, iclass 12, count 0 2006.229.15:47:14.84#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:14.84#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:14.84#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:47:14.84#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:47:14.84$vck44/va=3,6 2006.229.15:47:14.84#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:47:14.84#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:47:14.84#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:14.84#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:14.90#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:14.90#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:14.90#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:47:14.90#ibcon#first serial, iclass 14, count 2 2006.229.15:47:14.90#ibcon#enter sib2, iclass 14, count 2 2006.229.15:47:14.90#ibcon#flushed, iclass 14, count 2 2006.229.15:47:14.90#ibcon#about to write, iclass 14, count 2 2006.229.15:47:14.90#ibcon#wrote, iclass 14, count 2 2006.229.15:47:14.90#ibcon#about to read 3, iclass 14, count 2 2006.229.15:47:14.92#ibcon#read 3, iclass 14, count 2 2006.229.15:47:14.92#ibcon#about to read 4, iclass 14, count 2 2006.229.15:47:14.92#ibcon#read 4, iclass 14, count 2 2006.229.15:47:14.92#ibcon#about to read 5, iclass 14, count 2 2006.229.15:47:14.92#ibcon#read 5, iclass 14, count 2 2006.229.15:47:14.92#ibcon#about to read 6, iclass 14, count 2 2006.229.15:47:14.92#ibcon#read 6, iclass 14, count 2 2006.229.15:47:14.92#ibcon#end of sib2, iclass 14, count 2 2006.229.15:47:14.92#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:47:14.92#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:47:14.92#ibcon#[25=AT03-06\r\n] 2006.229.15:47:14.92#ibcon#*before write, iclass 14, count 2 2006.229.15:47:14.92#ibcon#enter sib2, iclass 14, count 2 2006.229.15:47:14.92#ibcon#flushed, iclass 14, count 2 2006.229.15:47:14.92#ibcon#about to write, iclass 14, count 2 2006.229.15:47:14.92#ibcon#wrote, iclass 14, count 2 2006.229.15:47:14.92#ibcon#about to read 3, iclass 14, count 2 2006.229.15:47:14.95#ibcon#read 3, iclass 14, count 2 2006.229.15:47:14.95#ibcon#about to read 4, iclass 14, count 2 2006.229.15:47:14.95#ibcon#read 4, iclass 14, count 2 2006.229.15:47:14.95#ibcon#about to read 5, iclass 14, count 2 2006.229.15:47:14.95#ibcon#read 5, iclass 14, count 2 2006.229.15:47:14.95#ibcon#about to read 6, iclass 14, count 2 2006.229.15:47:14.95#ibcon#read 6, iclass 14, count 2 2006.229.15:47:14.95#ibcon#end of sib2, iclass 14, count 2 2006.229.15:47:14.95#ibcon#*after write, iclass 14, count 2 2006.229.15:47:14.95#ibcon#*before return 0, iclass 14, count 2 2006.229.15:47:14.95#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:14.95#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:14.95#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:47:14.95#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:14.95#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:15.07#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:15.07#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:15.07#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:47:15.07#ibcon#first serial, iclass 14, count 0 2006.229.15:47:15.07#ibcon#enter sib2, iclass 14, count 0 2006.229.15:47:15.07#ibcon#flushed, iclass 14, count 0 2006.229.15:47:15.07#ibcon#about to write, iclass 14, count 0 2006.229.15:47:15.07#ibcon#wrote, iclass 14, count 0 2006.229.15:47:15.07#ibcon#about to read 3, iclass 14, count 0 2006.229.15:47:15.09#ibcon#read 3, iclass 14, count 0 2006.229.15:47:15.09#ibcon#about to read 4, iclass 14, count 0 2006.229.15:47:15.09#ibcon#read 4, iclass 14, count 0 2006.229.15:47:15.09#ibcon#about to read 5, iclass 14, count 0 2006.229.15:47:15.09#ibcon#read 5, iclass 14, count 0 2006.229.15:47:15.09#ibcon#about to read 6, iclass 14, count 0 2006.229.15:47:15.09#ibcon#read 6, iclass 14, count 0 2006.229.15:47:15.09#ibcon#end of sib2, iclass 14, count 0 2006.229.15:47:15.09#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:47:15.09#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:47:15.09#ibcon#[25=USB\r\n] 2006.229.15:47:15.09#ibcon#*before write, iclass 14, count 0 2006.229.15:47:15.09#ibcon#enter sib2, iclass 14, count 0 2006.229.15:47:15.09#ibcon#flushed, iclass 14, count 0 2006.229.15:47:15.09#ibcon#about to write, iclass 14, count 0 2006.229.15:47:15.09#ibcon#wrote, iclass 14, count 0 2006.229.15:47:15.09#ibcon#about to read 3, iclass 14, count 0 2006.229.15:47:15.12#ibcon#read 3, iclass 14, count 0 2006.229.15:47:15.12#ibcon#about to read 4, iclass 14, count 0 2006.229.15:47:15.12#ibcon#read 4, iclass 14, count 0 2006.229.15:47:15.12#ibcon#about to read 5, iclass 14, count 0 2006.229.15:47:15.12#ibcon#read 5, iclass 14, count 0 2006.229.15:47:15.12#ibcon#about to read 6, iclass 14, count 0 2006.229.15:47:15.12#ibcon#read 6, iclass 14, count 0 2006.229.15:47:15.12#ibcon#end of sib2, iclass 14, count 0 2006.229.15:47:15.12#ibcon#*after write, iclass 14, count 0 2006.229.15:47:15.12#ibcon#*before return 0, iclass 14, count 0 2006.229.15:47:15.12#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:15.12#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:15.12#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:47:15.12#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:47:15.12$vck44/valo=4,624.99 2006.229.15:47:15.12#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:47:15.12#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:47:15.12#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:15.12#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:15.12#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:15.12#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:15.12#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:47:15.12#ibcon#first serial, iclass 16, count 0 2006.229.15:47:15.12#ibcon#enter sib2, iclass 16, count 0 2006.229.15:47:15.12#ibcon#flushed, iclass 16, count 0 2006.229.15:47:15.12#ibcon#about to write, iclass 16, count 0 2006.229.15:47:15.12#ibcon#wrote, iclass 16, count 0 2006.229.15:47:15.12#ibcon#about to read 3, iclass 16, count 0 2006.229.15:47:15.14#ibcon#read 3, iclass 16, count 0 2006.229.15:47:15.14#ibcon#about to read 4, iclass 16, count 0 2006.229.15:47:15.14#ibcon#read 4, iclass 16, count 0 2006.229.15:47:15.14#ibcon#about to read 5, iclass 16, count 0 2006.229.15:47:15.14#ibcon#read 5, iclass 16, count 0 2006.229.15:47:15.14#ibcon#about to read 6, iclass 16, count 0 2006.229.15:47:15.14#ibcon#read 6, iclass 16, count 0 2006.229.15:47:15.14#ibcon#end of sib2, iclass 16, count 0 2006.229.15:47:15.14#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:47:15.14#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:47:15.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:47:15.14#ibcon#*before write, iclass 16, count 0 2006.229.15:47:15.14#ibcon#enter sib2, iclass 16, count 0 2006.229.15:47:15.14#ibcon#flushed, iclass 16, count 0 2006.229.15:47:15.14#ibcon#about to write, iclass 16, count 0 2006.229.15:47:15.14#ibcon#wrote, iclass 16, count 0 2006.229.15:47:15.14#ibcon#about to read 3, iclass 16, count 0 2006.229.15:47:15.18#ibcon#read 3, iclass 16, count 0 2006.229.15:47:15.18#ibcon#about to read 4, iclass 16, count 0 2006.229.15:47:15.18#ibcon#read 4, iclass 16, count 0 2006.229.15:47:15.18#ibcon#about to read 5, iclass 16, count 0 2006.229.15:47:15.18#ibcon#read 5, iclass 16, count 0 2006.229.15:47:15.18#ibcon#about to read 6, iclass 16, count 0 2006.229.15:47:15.18#ibcon#read 6, iclass 16, count 0 2006.229.15:47:15.18#ibcon#end of sib2, iclass 16, count 0 2006.229.15:47:15.18#ibcon#*after write, iclass 16, count 0 2006.229.15:47:15.18#ibcon#*before return 0, iclass 16, count 0 2006.229.15:47:15.18#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:15.18#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:15.18#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:47:15.18#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:47:15.18$vck44/va=4,7 2006.229.15:47:15.18#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:47:15.18#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:47:15.18#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:15.18#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:15.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:15.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:15.24#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:47:15.24#ibcon#first serial, iclass 18, count 2 2006.229.15:47:15.24#ibcon#enter sib2, iclass 18, count 2 2006.229.15:47:15.24#ibcon#flushed, iclass 18, count 2 2006.229.15:47:15.24#ibcon#about to write, iclass 18, count 2 2006.229.15:47:15.24#ibcon#wrote, iclass 18, count 2 2006.229.15:47:15.24#ibcon#about to read 3, iclass 18, count 2 2006.229.15:47:15.26#ibcon#read 3, iclass 18, count 2 2006.229.15:47:15.26#ibcon#about to read 4, iclass 18, count 2 2006.229.15:47:15.26#ibcon#read 4, iclass 18, count 2 2006.229.15:47:15.26#ibcon#about to read 5, iclass 18, count 2 2006.229.15:47:15.26#ibcon#read 5, iclass 18, count 2 2006.229.15:47:15.26#ibcon#about to read 6, iclass 18, count 2 2006.229.15:47:15.26#ibcon#read 6, iclass 18, count 2 2006.229.15:47:15.26#ibcon#end of sib2, iclass 18, count 2 2006.229.15:47:15.26#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:47:15.26#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:47:15.26#ibcon#[25=AT04-07\r\n] 2006.229.15:47:15.26#ibcon#*before write, iclass 18, count 2 2006.229.15:47:15.26#ibcon#enter sib2, iclass 18, count 2 2006.229.15:47:15.26#ibcon#flushed, iclass 18, count 2 2006.229.15:47:15.26#ibcon#about to write, iclass 18, count 2 2006.229.15:47:15.26#ibcon#wrote, iclass 18, count 2 2006.229.15:47:15.26#ibcon#about to read 3, iclass 18, count 2 2006.229.15:47:15.29#ibcon#read 3, iclass 18, count 2 2006.229.15:47:15.29#ibcon#about to read 4, iclass 18, count 2 2006.229.15:47:15.29#ibcon#read 4, iclass 18, count 2 2006.229.15:47:15.29#ibcon#about to read 5, iclass 18, count 2 2006.229.15:47:15.29#ibcon#read 5, iclass 18, count 2 2006.229.15:47:15.29#ibcon#about to read 6, iclass 18, count 2 2006.229.15:47:15.29#ibcon#read 6, iclass 18, count 2 2006.229.15:47:15.29#ibcon#end of sib2, iclass 18, count 2 2006.229.15:47:15.29#ibcon#*after write, iclass 18, count 2 2006.229.15:47:15.29#ibcon#*before return 0, iclass 18, count 2 2006.229.15:47:15.29#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:15.29#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:15.29#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:47:15.29#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:15.29#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:15.41#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:15.41#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:15.41#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:47:15.41#ibcon#first serial, iclass 18, count 0 2006.229.15:47:15.41#ibcon#enter sib2, iclass 18, count 0 2006.229.15:47:15.41#ibcon#flushed, iclass 18, count 0 2006.229.15:47:15.41#ibcon#about to write, iclass 18, count 0 2006.229.15:47:15.41#ibcon#wrote, iclass 18, count 0 2006.229.15:47:15.41#ibcon#about to read 3, iclass 18, count 0 2006.229.15:47:15.43#ibcon#read 3, iclass 18, count 0 2006.229.15:47:15.43#ibcon#about to read 4, iclass 18, count 0 2006.229.15:47:15.43#ibcon#read 4, iclass 18, count 0 2006.229.15:47:15.43#ibcon#about to read 5, iclass 18, count 0 2006.229.15:47:15.43#ibcon#read 5, iclass 18, count 0 2006.229.15:47:15.43#ibcon#about to read 6, iclass 18, count 0 2006.229.15:47:15.43#ibcon#read 6, iclass 18, count 0 2006.229.15:47:15.43#ibcon#end of sib2, iclass 18, count 0 2006.229.15:47:15.43#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:47:15.43#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:47:15.43#ibcon#[25=USB\r\n] 2006.229.15:47:15.43#ibcon#*before write, iclass 18, count 0 2006.229.15:47:15.43#ibcon#enter sib2, iclass 18, count 0 2006.229.15:47:15.43#ibcon#flushed, iclass 18, count 0 2006.229.15:47:15.43#ibcon#about to write, iclass 18, count 0 2006.229.15:47:15.43#ibcon#wrote, iclass 18, count 0 2006.229.15:47:15.43#ibcon#about to read 3, iclass 18, count 0 2006.229.15:47:15.46#ibcon#read 3, iclass 18, count 0 2006.229.15:47:15.46#ibcon#about to read 4, iclass 18, count 0 2006.229.15:47:15.46#ibcon#read 4, iclass 18, count 0 2006.229.15:47:15.46#ibcon#about to read 5, iclass 18, count 0 2006.229.15:47:15.46#ibcon#read 5, iclass 18, count 0 2006.229.15:47:15.46#ibcon#about to read 6, iclass 18, count 0 2006.229.15:47:15.46#ibcon#read 6, iclass 18, count 0 2006.229.15:47:15.46#ibcon#end of sib2, iclass 18, count 0 2006.229.15:47:15.46#ibcon#*after write, iclass 18, count 0 2006.229.15:47:15.46#ibcon#*before return 0, iclass 18, count 0 2006.229.15:47:15.46#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:15.46#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:15.46#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:47:15.46#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:47:15.46$vck44/valo=5,734.99 2006.229.15:47:15.46#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:47:15.46#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:47:15.46#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:15.46#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:15.46#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:15.46#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:15.46#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:47:15.46#ibcon#first serial, iclass 20, count 0 2006.229.15:47:15.46#ibcon#enter sib2, iclass 20, count 0 2006.229.15:47:15.46#ibcon#flushed, iclass 20, count 0 2006.229.15:47:15.46#ibcon#about to write, iclass 20, count 0 2006.229.15:47:15.46#ibcon#wrote, iclass 20, count 0 2006.229.15:47:15.46#ibcon#about to read 3, iclass 20, count 0 2006.229.15:47:15.48#ibcon#read 3, iclass 20, count 0 2006.229.15:47:15.48#ibcon#about to read 4, iclass 20, count 0 2006.229.15:47:15.48#ibcon#read 4, iclass 20, count 0 2006.229.15:47:15.48#ibcon#about to read 5, iclass 20, count 0 2006.229.15:47:15.48#ibcon#read 5, iclass 20, count 0 2006.229.15:47:15.48#ibcon#about to read 6, iclass 20, count 0 2006.229.15:47:15.48#ibcon#read 6, iclass 20, count 0 2006.229.15:47:15.48#ibcon#end of sib2, iclass 20, count 0 2006.229.15:47:15.48#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:47:15.48#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:47:15.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:47:15.48#ibcon#*before write, iclass 20, count 0 2006.229.15:47:15.48#ibcon#enter sib2, iclass 20, count 0 2006.229.15:47:15.48#ibcon#flushed, iclass 20, count 0 2006.229.15:47:15.48#ibcon#about to write, iclass 20, count 0 2006.229.15:47:15.48#ibcon#wrote, iclass 20, count 0 2006.229.15:47:15.48#ibcon#about to read 3, iclass 20, count 0 2006.229.15:47:15.52#ibcon#read 3, iclass 20, count 0 2006.229.15:47:15.52#ibcon#about to read 4, iclass 20, count 0 2006.229.15:47:15.52#ibcon#read 4, iclass 20, count 0 2006.229.15:47:15.52#ibcon#about to read 5, iclass 20, count 0 2006.229.15:47:15.52#ibcon#read 5, iclass 20, count 0 2006.229.15:47:15.52#ibcon#about to read 6, iclass 20, count 0 2006.229.15:47:15.52#ibcon#read 6, iclass 20, count 0 2006.229.15:47:15.52#ibcon#end of sib2, iclass 20, count 0 2006.229.15:47:15.52#ibcon#*after write, iclass 20, count 0 2006.229.15:47:15.52#ibcon#*before return 0, iclass 20, count 0 2006.229.15:47:15.52#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:15.52#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:15.52#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:47:15.52#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:47:15.52$vck44/va=5,4 2006.229.15:47:15.52#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:47:15.52#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:47:15.52#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:15.52#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:15.58#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:15.58#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:15.58#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:47:15.58#ibcon#first serial, iclass 22, count 2 2006.229.15:47:15.58#ibcon#enter sib2, iclass 22, count 2 2006.229.15:47:15.58#ibcon#flushed, iclass 22, count 2 2006.229.15:47:15.58#ibcon#about to write, iclass 22, count 2 2006.229.15:47:15.58#ibcon#wrote, iclass 22, count 2 2006.229.15:47:15.58#ibcon#about to read 3, iclass 22, count 2 2006.229.15:47:15.60#ibcon#read 3, iclass 22, count 2 2006.229.15:47:15.60#ibcon#about to read 4, iclass 22, count 2 2006.229.15:47:15.60#ibcon#read 4, iclass 22, count 2 2006.229.15:47:15.60#ibcon#about to read 5, iclass 22, count 2 2006.229.15:47:15.60#ibcon#read 5, iclass 22, count 2 2006.229.15:47:15.60#ibcon#about to read 6, iclass 22, count 2 2006.229.15:47:15.60#ibcon#read 6, iclass 22, count 2 2006.229.15:47:15.60#ibcon#end of sib2, iclass 22, count 2 2006.229.15:47:15.60#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:47:15.60#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:47:15.60#ibcon#[25=AT05-04\r\n] 2006.229.15:47:15.60#ibcon#*before write, iclass 22, count 2 2006.229.15:47:15.60#ibcon#enter sib2, iclass 22, count 2 2006.229.15:47:15.60#ibcon#flushed, iclass 22, count 2 2006.229.15:47:15.60#ibcon#about to write, iclass 22, count 2 2006.229.15:47:15.60#ibcon#wrote, iclass 22, count 2 2006.229.15:47:15.60#ibcon#about to read 3, iclass 22, count 2 2006.229.15:47:15.63#ibcon#read 3, iclass 22, count 2 2006.229.15:47:15.63#ibcon#about to read 4, iclass 22, count 2 2006.229.15:47:15.63#ibcon#read 4, iclass 22, count 2 2006.229.15:47:15.63#ibcon#about to read 5, iclass 22, count 2 2006.229.15:47:15.63#ibcon#read 5, iclass 22, count 2 2006.229.15:47:15.63#ibcon#about to read 6, iclass 22, count 2 2006.229.15:47:15.63#ibcon#read 6, iclass 22, count 2 2006.229.15:47:15.63#ibcon#end of sib2, iclass 22, count 2 2006.229.15:47:15.63#ibcon#*after write, iclass 22, count 2 2006.229.15:47:15.63#ibcon#*before return 0, iclass 22, count 2 2006.229.15:47:15.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:15.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:15.63#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:47:15.63#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:15.63#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:15.75#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:15.75#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:15.75#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:47:15.75#ibcon#first serial, iclass 22, count 0 2006.229.15:47:15.75#ibcon#enter sib2, iclass 22, count 0 2006.229.15:47:15.75#ibcon#flushed, iclass 22, count 0 2006.229.15:47:15.75#ibcon#about to write, iclass 22, count 0 2006.229.15:47:15.75#ibcon#wrote, iclass 22, count 0 2006.229.15:47:15.75#ibcon#about to read 3, iclass 22, count 0 2006.229.15:47:15.77#ibcon#read 3, iclass 22, count 0 2006.229.15:47:15.77#ibcon#about to read 4, iclass 22, count 0 2006.229.15:47:15.77#ibcon#read 4, iclass 22, count 0 2006.229.15:47:15.77#ibcon#about to read 5, iclass 22, count 0 2006.229.15:47:15.77#ibcon#read 5, iclass 22, count 0 2006.229.15:47:15.77#ibcon#about to read 6, iclass 22, count 0 2006.229.15:47:15.77#ibcon#read 6, iclass 22, count 0 2006.229.15:47:15.77#ibcon#end of sib2, iclass 22, count 0 2006.229.15:47:15.77#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:47:15.77#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:47:15.77#ibcon#[25=USB\r\n] 2006.229.15:47:15.77#ibcon#*before write, iclass 22, count 0 2006.229.15:47:15.77#ibcon#enter sib2, iclass 22, count 0 2006.229.15:47:15.77#ibcon#flushed, iclass 22, count 0 2006.229.15:47:15.77#ibcon#about to write, iclass 22, count 0 2006.229.15:47:15.77#ibcon#wrote, iclass 22, count 0 2006.229.15:47:15.77#ibcon#about to read 3, iclass 22, count 0 2006.229.15:47:15.80#ibcon#read 3, iclass 22, count 0 2006.229.15:47:15.80#ibcon#about to read 4, iclass 22, count 0 2006.229.15:47:15.80#ibcon#read 4, iclass 22, count 0 2006.229.15:47:15.80#ibcon#about to read 5, iclass 22, count 0 2006.229.15:47:15.80#ibcon#read 5, iclass 22, count 0 2006.229.15:47:15.80#ibcon#about to read 6, iclass 22, count 0 2006.229.15:47:15.80#ibcon#read 6, iclass 22, count 0 2006.229.15:47:15.80#ibcon#end of sib2, iclass 22, count 0 2006.229.15:47:15.80#ibcon#*after write, iclass 22, count 0 2006.229.15:47:15.80#ibcon#*before return 0, iclass 22, count 0 2006.229.15:47:15.80#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:15.80#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:15.80#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:47:15.80#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:47:15.80$vck44/valo=6,814.99 2006.229.15:47:15.80#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:47:15.80#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:47:15.80#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:15.80#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:15.80#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:15.80#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:15.80#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:47:15.80#ibcon#first serial, iclass 24, count 0 2006.229.15:47:15.80#ibcon#enter sib2, iclass 24, count 0 2006.229.15:47:15.80#ibcon#flushed, iclass 24, count 0 2006.229.15:47:15.80#ibcon#about to write, iclass 24, count 0 2006.229.15:47:15.80#ibcon#wrote, iclass 24, count 0 2006.229.15:47:15.80#ibcon#about to read 3, iclass 24, count 0 2006.229.15:47:15.82#ibcon#read 3, iclass 24, count 0 2006.229.15:47:15.82#ibcon#about to read 4, iclass 24, count 0 2006.229.15:47:15.82#ibcon#read 4, iclass 24, count 0 2006.229.15:47:15.82#ibcon#about to read 5, iclass 24, count 0 2006.229.15:47:15.82#ibcon#read 5, iclass 24, count 0 2006.229.15:47:15.82#ibcon#about to read 6, iclass 24, count 0 2006.229.15:47:15.82#ibcon#read 6, iclass 24, count 0 2006.229.15:47:15.82#ibcon#end of sib2, iclass 24, count 0 2006.229.15:47:15.82#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:47:15.82#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:47:15.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:47:15.82#ibcon#*before write, iclass 24, count 0 2006.229.15:47:15.82#ibcon#enter sib2, iclass 24, count 0 2006.229.15:47:15.82#ibcon#flushed, iclass 24, count 0 2006.229.15:47:15.82#ibcon#about to write, iclass 24, count 0 2006.229.15:47:15.82#ibcon#wrote, iclass 24, count 0 2006.229.15:47:15.82#ibcon#about to read 3, iclass 24, count 0 2006.229.15:47:15.86#ibcon#read 3, iclass 24, count 0 2006.229.15:47:15.86#ibcon#about to read 4, iclass 24, count 0 2006.229.15:47:15.86#ibcon#read 4, iclass 24, count 0 2006.229.15:47:15.86#ibcon#about to read 5, iclass 24, count 0 2006.229.15:47:15.86#ibcon#read 5, iclass 24, count 0 2006.229.15:47:15.86#ibcon#about to read 6, iclass 24, count 0 2006.229.15:47:15.86#ibcon#read 6, iclass 24, count 0 2006.229.15:47:15.86#ibcon#end of sib2, iclass 24, count 0 2006.229.15:47:15.86#ibcon#*after write, iclass 24, count 0 2006.229.15:47:15.86#ibcon#*before return 0, iclass 24, count 0 2006.229.15:47:15.86#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:15.86#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:15.86#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:47:15.86#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:47:15.86$vck44/va=6,4 2006.229.15:47:15.86#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:47:15.86#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:47:15.86#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:15.86#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:15.92#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:15.92#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:15.92#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:47:15.92#ibcon#first serial, iclass 26, count 2 2006.229.15:47:15.92#ibcon#enter sib2, iclass 26, count 2 2006.229.15:47:15.92#ibcon#flushed, iclass 26, count 2 2006.229.15:47:15.92#ibcon#about to write, iclass 26, count 2 2006.229.15:47:15.92#ibcon#wrote, iclass 26, count 2 2006.229.15:47:15.92#ibcon#about to read 3, iclass 26, count 2 2006.229.15:47:15.94#ibcon#read 3, iclass 26, count 2 2006.229.15:47:15.94#ibcon#about to read 4, iclass 26, count 2 2006.229.15:47:15.94#ibcon#read 4, iclass 26, count 2 2006.229.15:47:15.94#ibcon#about to read 5, iclass 26, count 2 2006.229.15:47:15.94#ibcon#read 5, iclass 26, count 2 2006.229.15:47:15.94#ibcon#about to read 6, iclass 26, count 2 2006.229.15:47:15.94#ibcon#read 6, iclass 26, count 2 2006.229.15:47:15.94#ibcon#end of sib2, iclass 26, count 2 2006.229.15:47:15.94#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:47:15.94#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:47:15.94#ibcon#[25=AT06-04\r\n] 2006.229.15:47:15.94#ibcon#*before write, iclass 26, count 2 2006.229.15:47:15.94#ibcon#enter sib2, iclass 26, count 2 2006.229.15:47:15.94#ibcon#flushed, iclass 26, count 2 2006.229.15:47:15.94#ibcon#about to write, iclass 26, count 2 2006.229.15:47:15.94#ibcon#wrote, iclass 26, count 2 2006.229.15:47:15.94#ibcon#about to read 3, iclass 26, count 2 2006.229.15:47:15.97#ibcon#read 3, iclass 26, count 2 2006.229.15:47:15.97#ibcon#about to read 4, iclass 26, count 2 2006.229.15:47:15.97#ibcon#read 4, iclass 26, count 2 2006.229.15:47:15.97#ibcon#about to read 5, iclass 26, count 2 2006.229.15:47:15.97#ibcon#read 5, iclass 26, count 2 2006.229.15:47:15.97#ibcon#about to read 6, iclass 26, count 2 2006.229.15:47:15.97#ibcon#read 6, iclass 26, count 2 2006.229.15:47:15.97#ibcon#end of sib2, iclass 26, count 2 2006.229.15:47:15.97#ibcon#*after write, iclass 26, count 2 2006.229.15:47:15.97#ibcon#*before return 0, iclass 26, count 2 2006.229.15:47:15.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:15.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:15.97#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:47:15.97#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:15.97#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:16.09#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:16.09#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:16.09#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:47:16.09#ibcon#first serial, iclass 26, count 0 2006.229.15:47:16.09#ibcon#enter sib2, iclass 26, count 0 2006.229.15:47:16.09#ibcon#flushed, iclass 26, count 0 2006.229.15:47:16.09#ibcon#about to write, iclass 26, count 0 2006.229.15:47:16.09#ibcon#wrote, iclass 26, count 0 2006.229.15:47:16.09#ibcon#about to read 3, iclass 26, count 0 2006.229.15:47:16.11#ibcon#read 3, iclass 26, count 0 2006.229.15:47:16.11#ibcon#about to read 4, iclass 26, count 0 2006.229.15:47:16.11#ibcon#read 4, iclass 26, count 0 2006.229.15:47:16.11#ibcon#about to read 5, iclass 26, count 0 2006.229.15:47:16.11#ibcon#read 5, iclass 26, count 0 2006.229.15:47:16.11#ibcon#about to read 6, iclass 26, count 0 2006.229.15:47:16.11#ibcon#read 6, iclass 26, count 0 2006.229.15:47:16.11#ibcon#end of sib2, iclass 26, count 0 2006.229.15:47:16.11#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:47:16.11#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:47:16.11#ibcon#[25=USB\r\n] 2006.229.15:47:16.11#ibcon#*before write, iclass 26, count 0 2006.229.15:47:16.11#ibcon#enter sib2, iclass 26, count 0 2006.229.15:47:16.11#ibcon#flushed, iclass 26, count 0 2006.229.15:47:16.11#ibcon#about to write, iclass 26, count 0 2006.229.15:47:16.11#ibcon#wrote, iclass 26, count 0 2006.229.15:47:16.11#ibcon#about to read 3, iclass 26, count 0 2006.229.15:47:16.14#ibcon#read 3, iclass 26, count 0 2006.229.15:47:16.14#ibcon#about to read 4, iclass 26, count 0 2006.229.15:47:16.14#ibcon#read 4, iclass 26, count 0 2006.229.15:47:16.14#ibcon#about to read 5, iclass 26, count 0 2006.229.15:47:16.14#ibcon#read 5, iclass 26, count 0 2006.229.15:47:16.14#ibcon#about to read 6, iclass 26, count 0 2006.229.15:47:16.14#ibcon#read 6, iclass 26, count 0 2006.229.15:47:16.14#ibcon#end of sib2, iclass 26, count 0 2006.229.15:47:16.14#ibcon#*after write, iclass 26, count 0 2006.229.15:47:16.14#ibcon#*before return 0, iclass 26, count 0 2006.229.15:47:16.14#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:16.14#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:16.14#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:47:16.14#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:47:16.14$vck44/valo=7,864.99 2006.229.15:47:16.14#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:47:16.14#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:47:16.14#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:16.14#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:16.14#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:16.14#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:16.14#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:47:16.14#ibcon#first serial, iclass 28, count 0 2006.229.15:47:16.14#ibcon#enter sib2, iclass 28, count 0 2006.229.15:47:16.14#ibcon#flushed, iclass 28, count 0 2006.229.15:47:16.14#ibcon#about to write, iclass 28, count 0 2006.229.15:47:16.14#ibcon#wrote, iclass 28, count 0 2006.229.15:47:16.14#ibcon#about to read 3, iclass 28, count 0 2006.229.15:47:16.16#ibcon#read 3, iclass 28, count 0 2006.229.15:47:16.16#ibcon#about to read 4, iclass 28, count 0 2006.229.15:47:16.16#ibcon#read 4, iclass 28, count 0 2006.229.15:47:16.16#ibcon#about to read 5, iclass 28, count 0 2006.229.15:47:16.16#ibcon#read 5, iclass 28, count 0 2006.229.15:47:16.16#ibcon#about to read 6, iclass 28, count 0 2006.229.15:47:16.16#ibcon#read 6, iclass 28, count 0 2006.229.15:47:16.16#ibcon#end of sib2, iclass 28, count 0 2006.229.15:47:16.16#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:47:16.16#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:47:16.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:47:16.16#ibcon#*before write, iclass 28, count 0 2006.229.15:47:16.16#ibcon#enter sib2, iclass 28, count 0 2006.229.15:47:16.16#ibcon#flushed, iclass 28, count 0 2006.229.15:47:16.16#ibcon#about to write, iclass 28, count 0 2006.229.15:47:16.16#ibcon#wrote, iclass 28, count 0 2006.229.15:47:16.16#ibcon#about to read 3, iclass 28, count 0 2006.229.15:47:16.20#ibcon#read 3, iclass 28, count 0 2006.229.15:47:16.20#ibcon#about to read 4, iclass 28, count 0 2006.229.15:47:16.20#ibcon#read 4, iclass 28, count 0 2006.229.15:47:16.20#ibcon#about to read 5, iclass 28, count 0 2006.229.15:47:16.20#ibcon#read 5, iclass 28, count 0 2006.229.15:47:16.20#ibcon#about to read 6, iclass 28, count 0 2006.229.15:47:16.20#ibcon#read 6, iclass 28, count 0 2006.229.15:47:16.20#ibcon#end of sib2, iclass 28, count 0 2006.229.15:47:16.20#ibcon#*after write, iclass 28, count 0 2006.229.15:47:16.20#ibcon#*before return 0, iclass 28, count 0 2006.229.15:47:16.20#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:16.20#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:16.20#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:47:16.20#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:47:16.20$vck44/va=7,5 2006.229.15:47:16.20#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:47:16.20#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:47:16.20#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:16.20#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:16.26#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:16.26#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:16.26#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:47:16.26#ibcon#first serial, iclass 30, count 2 2006.229.15:47:16.26#ibcon#enter sib2, iclass 30, count 2 2006.229.15:47:16.26#ibcon#flushed, iclass 30, count 2 2006.229.15:47:16.26#ibcon#about to write, iclass 30, count 2 2006.229.15:47:16.26#ibcon#wrote, iclass 30, count 2 2006.229.15:47:16.26#ibcon#about to read 3, iclass 30, count 2 2006.229.15:47:16.28#ibcon#read 3, iclass 30, count 2 2006.229.15:47:16.28#ibcon#about to read 4, iclass 30, count 2 2006.229.15:47:16.28#ibcon#read 4, iclass 30, count 2 2006.229.15:47:16.28#ibcon#about to read 5, iclass 30, count 2 2006.229.15:47:16.28#ibcon#read 5, iclass 30, count 2 2006.229.15:47:16.28#ibcon#about to read 6, iclass 30, count 2 2006.229.15:47:16.28#ibcon#read 6, iclass 30, count 2 2006.229.15:47:16.28#ibcon#end of sib2, iclass 30, count 2 2006.229.15:47:16.28#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:47:16.28#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:47:16.28#ibcon#[25=AT07-05\r\n] 2006.229.15:47:16.28#ibcon#*before write, iclass 30, count 2 2006.229.15:47:16.28#ibcon#enter sib2, iclass 30, count 2 2006.229.15:47:16.28#ibcon#flushed, iclass 30, count 2 2006.229.15:47:16.28#ibcon#about to write, iclass 30, count 2 2006.229.15:47:16.28#ibcon#wrote, iclass 30, count 2 2006.229.15:47:16.28#ibcon#about to read 3, iclass 30, count 2 2006.229.15:47:16.31#ibcon#read 3, iclass 30, count 2 2006.229.15:47:16.31#ibcon#about to read 4, iclass 30, count 2 2006.229.15:47:16.31#ibcon#read 4, iclass 30, count 2 2006.229.15:47:16.31#ibcon#about to read 5, iclass 30, count 2 2006.229.15:47:16.31#ibcon#read 5, iclass 30, count 2 2006.229.15:47:16.31#ibcon#about to read 6, iclass 30, count 2 2006.229.15:47:16.31#ibcon#read 6, iclass 30, count 2 2006.229.15:47:16.31#ibcon#end of sib2, iclass 30, count 2 2006.229.15:47:16.31#ibcon#*after write, iclass 30, count 2 2006.229.15:47:16.31#ibcon#*before return 0, iclass 30, count 2 2006.229.15:47:16.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:16.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:16.31#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:47:16.31#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:16.31#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:16.43#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:16.43#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:16.43#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:47:16.43#ibcon#first serial, iclass 30, count 0 2006.229.15:47:16.43#ibcon#enter sib2, iclass 30, count 0 2006.229.15:47:16.43#ibcon#flushed, iclass 30, count 0 2006.229.15:47:16.43#ibcon#about to write, iclass 30, count 0 2006.229.15:47:16.43#ibcon#wrote, iclass 30, count 0 2006.229.15:47:16.43#ibcon#about to read 3, iclass 30, count 0 2006.229.15:47:16.45#ibcon#read 3, iclass 30, count 0 2006.229.15:47:16.45#ibcon#about to read 4, iclass 30, count 0 2006.229.15:47:16.45#ibcon#read 4, iclass 30, count 0 2006.229.15:47:16.45#ibcon#about to read 5, iclass 30, count 0 2006.229.15:47:16.45#ibcon#read 5, iclass 30, count 0 2006.229.15:47:16.45#ibcon#about to read 6, iclass 30, count 0 2006.229.15:47:16.45#ibcon#read 6, iclass 30, count 0 2006.229.15:47:16.45#ibcon#end of sib2, iclass 30, count 0 2006.229.15:47:16.45#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:47:16.45#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:47:16.45#ibcon#[25=USB\r\n] 2006.229.15:47:16.45#ibcon#*before write, iclass 30, count 0 2006.229.15:47:16.45#ibcon#enter sib2, iclass 30, count 0 2006.229.15:47:16.45#ibcon#flushed, iclass 30, count 0 2006.229.15:47:16.45#ibcon#about to write, iclass 30, count 0 2006.229.15:47:16.45#ibcon#wrote, iclass 30, count 0 2006.229.15:47:16.45#ibcon#about to read 3, iclass 30, count 0 2006.229.15:47:16.48#ibcon#read 3, iclass 30, count 0 2006.229.15:47:16.48#ibcon#about to read 4, iclass 30, count 0 2006.229.15:47:16.48#ibcon#read 4, iclass 30, count 0 2006.229.15:47:16.48#ibcon#about to read 5, iclass 30, count 0 2006.229.15:47:16.48#ibcon#read 5, iclass 30, count 0 2006.229.15:47:16.48#ibcon#about to read 6, iclass 30, count 0 2006.229.15:47:16.48#ibcon#read 6, iclass 30, count 0 2006.229.15:47:16.48#ibcon#end of sib2, iclass 30, count 0 2006.229.15:47:16.48#ibcon#*after write, iclass 30, count 0 2006.229.15:47:16.48#ibcon#*before return 0, iclass 30, count 0 2006.229.15:47:16.48#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:16.48#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:16.48#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:47:16.48#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:47:16.48$vck44/valo=8,884.99 2006.229.15:47:16.48#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:47:16.48#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:47:16.48#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:16.48#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:16.48#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:16.48#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:16.48#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:47:16.48#ibcon#first serial, iclass 32, count 0 2006.229.15:47:16.48#ibcon#enter sib2, iclass 32, count 0 2006.229.15:47:16.48#ibcon#flushed, iclass 32, count 0 2006.229.15:47:16.48#ibcon#about to write, iclass 32, count 0 2006.229.15:47:16.48#ibcon#wrote, iclass 32, count 0 2006.229.15:47:16.48#ibcon#about to read 3, iclass 32, count 0 2006.229.15:47:16.50#ibcon#read 3, iclass 32, count 0 2006.229.15:47:16.50#ibcon#about to read 4, iclass 32, count 0 2006.229.15:47:16.50#ibcon#read 4, iclass 32, count 0 2006.229.15:47:16.50#ibcon#about to read 5, iclass 32, count 0 2006.229.15:47:16.50#ibcon#read 5, iclass 32, count 0 2006.229.15:47:16.50#ibcon#about to read 6, iclass 32, count 0 2006.229.15:47:16.50#ibcon#read 6, iclass 32, count 0 2006.229.15:47:16.50#ibcon#end of sib2, iclass 32, count 0 2006.229.15:47:16.50#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:47:16.50#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:47:16.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:47:16.50#ibcon#*before write, iclass 32, count 0 2006.229.15:47:16.50#ibcon#enter sib2, iclass 32, count 0 2006.229.15:47:16.50#ibcon#flushed, iclass 32, count 0 2006.229.15:47:16.50#ibcon#about to write, iclass 32, count 0 2006.229.15:47:16.50#ibcon#wrote, iclass 32, count 0 2006.229.15:47:16.50#ibcon#about to read 3, iclass 32, count 0 2006.229.15:47:16.54#ibcon#read 3, iclass 32, count 0 2006.229.15:47:16.54#ibcon#about to read 4, iclass 32, count 0 2006.229.15:47:16.54#ibcon#read 4, iclass 32, count 0 2006.229.15:47:16.54#ibcon#about to read 5, iclass 32, count 0 2006.229.15:47:16.54#ibcon#read 5, iclass 32, count 0 2006.229.15:47:16.54#ibcon#about to read 6, iclass 32, count 0 2006.229.15:47:16.54#ibcon#read 6, iclass 32, count 0 2006.229.15:47:16.54#ibcon#end of sib2, iclass 32, count 0 2006.229.15:47:16.54#ibcon#*after write, iclass 32, count 0 2006.229.15:47:16.54#ibcon#*before return 0, iclass 32, count 0 2006.229.15:47:16.54#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:16.54#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:16.54#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:47:16.54#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:47:16.54$vck44/va=8,6 2006.229.15:47:16.54#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.15:47:16.54#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.15:47:16.54#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:16.54#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:47:16.60#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:47:16.60#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:47:16.60#ibcon#enter wrdev, iclass 34, count 2 2006.229.15:47:16.60#ibcon#first serial, iclass 34, count 2 2006.229.15:47:16.60#ibcon#enter sib2, iclass 34, count 2 2006.229.15:47:16.60#ibcon#flushed, iclass 34, count 2 2006.229.15:47:16.60#ibcon#about to write, iclass 34, count 2 2006.229.15:47:16.60#ibcon#wrote, iclass 34, count 2 2006.229.15:47:16.60#ibcon#about to read 3, iclass 34, count 2 2006.229.15:47:16.62#ibcon#read 3, iclass 34, count 2 2006.229.15:47:16.62#ibcon#about to read 4, iclass 34, count 2 2006.229.15:47:16.62#ibcon#read 4, iclass 34, count 2 2006.229.15:47:16.62#ibcon#about to read 5, iclass 34, count 2 2006.229.15:47:16.62#ibcon#read 5, iclass 34, count 2 2006.229.15:47:16.62#ibcon#about to read 6, iclass 34, count 2 2006.229.15:47:16.62#ibcon#read 6, iclass 34, count 2 2006.229.15:47:16.62#ibcon#end of sib2, iclass 34, count 2 2006.229.15:47:16.62#ibcon#*mode == 0, iclass 34, count 2 2006.229.15:47:16.62#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.15:47:16.62#ibcon#[25=AT08-06\r\n] 2006.229.15:47:16.62#ibcon#*before write, iclass 34, count 2 2006.229.15:47:16.62#ibcon#enter sib2, iclass 34, count 2 2006.229.15:47:16.62#ibcon#flushed, iclass 34, count 2 2006.229.15:47:16.62#ibcon#about to write, iclass 34, count 2 2006.229.15:47:16.62#ibcon#wrote, iclass 34, count 2 2006.229.15:47:16.62#ibcon#about to read 3, iclass 34, count 2 2006.229.15:47:16.65#ibcon#read 3, iclass 34, count 2 2006.229.15:47:16.65#ibcon#about to read 4, iclass 34, count 2 2006.229.15:47:16.65#ibcon#read 4, iclass 34, count 2 2006.229.15:47:16.65#ibcon#about to read 5, iclass 34, count 2 2006.229.15:47:16.65#ibcon#read 5, iclass 34, count 2 2006.229.15:47:16.65#ibcon#about to read 6, iclass 34, count 2 2006.229.15:47:16.65#ibcon#read 6, iclass 34, count 2 2006.229.15:47:16.65#ibcon#end of sib2, iclass 34, count 2 2006.229.15:47:16.65#ibcon#*after write, iclass 34, count 2 2006.229.15:47:16.65#ibcon#*before return 0, iclass 34, count 2 2006.229.15:47:16.65#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:47:16.65#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.15:47:16.65#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.15:47:16.65#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:16.65#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:47:16.77#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:47:16.77#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:47:16.77#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:47:16.77#ibcon#first serial, iclass 34, count 0 2006.229.15:47:16.77#ibcon#enter sib2, iclass 34, count 0 2006.229.15:47:16.77#ibcon#flushed, iclass 34, count 0 2006.229.15:47:16.77#ibcon#about to write, iclass 34, count 0 2006.229.15:47:16.77#ibcon#wrote, iclass 34, count 0 2006.229.15:47:16.77#ibcon#about to read 3, iclass 34, count 0 2006.229.15:47:16.79#ibcon#read 3, iclass 34, count 0 2006.229.15:47:16.79#ibcon#about to read 4, iclass 34, count 0 2006.229.15:47:16.79#ibcon#read 4, iclass 34, count 0 2006.229.15:47:16.79#ibcon#about to read 5, iclass 34, count 0 2006.229.15:47:16.79#ibcon#read 5, iclass 34, count 0 2006.229.15:47:16.79#ibcon#about to read 6, iclass 34, count 0 2006.229.15:47:16.79#ibcon#read 6, iclass 34, count 0 2006.229.15:47:16.79#ibcon#end of sib2, iclass 34, count 0 2006.229.15:47:16.79#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:47:16.79#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:47:16.79#ibcon#[25=USB\r\n] 2006.229.15:47:16.79#ibcon#*before write, iclass 34, count 0 2006.229.15:47:16.79#ibcon#enter sib2, iclass 34, count 0 2006.229.15:47:16.79#ibcon#flushed, iclass 34, count 0 2006.229.15:47:16.79#ibcon#about to write, iclass 34, count 0 2006.229.15:47:16.79#ibcon#wrote, iclass 34, count 0 2006.229.15:47:16.79#ibcon#about to read 3, iclass 34, count 0 2006.229.15:47:16.82#ibcon#read 3, iclass 34, count 0 2006.229.15:47:16.82#ibcon#about to read 4, iclass 34, count 0 2006.229.15:47:16.82#ibcon#read 4, iclass 34, count 0 2006.229.15:47:16.82#ibcon#about to read 5, iclass 34, count 0 2006.229.15:47:16.82#ibcon#read 5, iclass 34, count 0 2006.229.15:47:16.82#ibcon#about to read 6, iclass 34, count 0 2006.229.15:47:16.82#ibcon#read 6, iclass 34, count 0 2006.229.15:47:16.82#ibcon#end of sib2, iclass 34, count 0 2006.229.15:47:16.82#ibcon#*after write, iclass 34, count 0 2006.229.15:47:16.82#ibcon#*before return 0, iclass 34, count 0 2006.229.15:47:16.82#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:47:16.82#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.15:47:16.82#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:47:16.82#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:47:16.82$vck44/vblo=1,629.99 2006.229.15:47:16.82#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.15:47:16.82#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.15:47:16.82#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:16.82#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:47:16.82#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:47:16.82#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:47:16.82#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:47:16.82#ibcon#first serial, iclass 36, count 0 2006.229.15:47:16.82#ibcon#enter sib2, iclass 36, count 0 2006.229.15:47:16.82#ibcon#flushed, iclass 36, count 0 2006.229.15:47:16.82#ibcon#about to write, iclass 36, count 0 2006.229.15:47:16.82#ibcon#wrote, iclass 36, count 0 2006.229.15:47:16.82#ibcon#about to read 3, iclass 36, count 0 2006.229.15:47:16.84#ibcon#read 3, iclass 36, count 0 2006.229.15:47:16.84#ibcon#about to read 4, iclass 36, count 0 2006.229.15:47:16.84#ibcon#read 4, iclass 36, count 0 2006.229.15:47:16.84#ibcon#about to read 5, iclass 36, count 0 2006.229.15:47:16.84#ibcon#read 5, iclass 36, count 0 2006.229.15:47:16.84#ibcon#about to read 6, iclass 36, count 0 2006.229.15:47:16.84#ibcon#read 6, iclass 36, count 0 2006.229.15:47:16.84#ibcon#end of sib2, iclass 36, count 0 2006.229.15:47:16.84#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:47:16.84#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:47:16.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:47:16.84#ibcon#*before write, iclass 36, count 0 2006.229.15:47:16.84#ibcon#enter sib2, iclass 36, count 0 2006.229.15:47:16.84#ibcon#flushed, iclass 36, count 0 2006.229.15:47:16.84#ibcon#about to write, iclass 36, count 0 2006.229.15:47:16.84#ibcon#wrote, iclass 36, count 0 2006.229.15:47:16.84#ibcon#about to read 3, iclass 36, count 0 2006.229.15:47:16.88#ibcon#read 3, iclass 36, count 0 2006.229.15:47:16.88#ibcon#about to read 4, iclass 36, count 0 2006.229.15:47:16.88#ibcon#read 4, iclass 36, count 0 2006.229.15:47:16.88#ibcon#about to read 5, iclass 36, count 0 2006.229.15:47:16.88#ibcon#read 5, iclass 36, count 0 2006.229.15:47:16.88#ibcon#about to read 6, iclass 36, count 0 2006.229.15:47:16.88#ibcon#read 6, iclass 36, count 0 2006.229.15:47:16.88#ibcon#end of sib2, iclass 36, count 0 2006.229.15:47:16.88#ibcon#*after write, iclass 36, count 0 2006.229.15:47:16.88#ibcon#*before return 0, iclass 36, count 0 2006.229.15:47:16.88#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:47:16.88#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.15:47:16.88#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:47:16.88#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:47:16.88$vck44/vb=1,4 2006.229.15:47:16.88#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.15:47:16.88#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.15:47:16.88#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:16.88#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:47:16.88#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:47:16.88#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:47:16.88#ibcon#enter wrdev, iclass 38, count 2 2006.229.15:47:16.88#ibcon#first serial, iclass 38, count 2 2006.229.15:47:16.88#ibcon#enter sib2, iclass 38, count 2 2006.229.15:47:16.88#ibcon#flushed, iclass 38, count 2 2006.229.15:47:16.88#ibcon#about to write, iclass 38, count 2 2006.229.15:47:16.88#ibcon#wrote, iclass 38, count 2 2006.229.15:47:16.88#ibcon#about to read 3, iclass 38, count 2 2006.229.15:47:16.90#ibcon#read 3, iclass 38, count 2 2006.229.15:47:16.90#ibcon#about to read 4, iclass 38, count 2 2006.229.15:47:16.90#ibcon#read 4, iclass 38, count 2 2006.229.15:47:16.90#ibcon#about to read 5, iclass 38, count 2 2006.229.15:47:16.90#ibcon#read 5, iclass 38, count 2 2006.229.15:47:16.90#ibcon#about to read 6, iclass 38, count 2 2006.229.15:47:16.90#ibcon#read 6, iclass 38, count 2 2006.229.15:47:16.90#ibcon#end of sib2, iclass 38, count 2 2006.229.15:47:16.90#ibcon#*mode == 0, iclass 38, count 2 2006.229.15:47:16.90#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.15:47:16.90#ibcon#[27=AT01-04\r\n] 2006.229.15:47:16.90#ibcon#*before write, iclass 38, count 2 2006.229.15:47:16.90#ibcon#enter sib2, iclass 38, count 2 2006.229.15:47:16.90#ibcon#flushed, iclass 38, count 2 2006.229.15:47:16.90#ibcon#about to write, iclass 38, count 2 2006.229.15:47:16.90#ibcon#wrote, iclass 38, count 2 2006.229.15:47:16.90#ibcon#about to read 3, iclass 38, count 2 2006.229.15:47:16.93#ibcon#read 3, iclass 38, count 2 2006.229.15:47:16.93#ibcon#about to read 4, iclass 38, count 2 2006.229.15:47:16.93#ibcon#read 4, iclass 38, count 2 2006.229.15:47:16.93#ibcon#about to read 5, iclass 38, count 2 2006.229.15:47:16.93#ibcon#read 5, iclass 38, count 2 2006.229.15:47:16.93#ibcon#about to read 6, iclass 38, count 2 2006.229.15:47:16.93#ibcon#read 6, iclass 38, count 2 2006.229.15:47:16.93#ibcon#end of sib2, iclass 38, count 2 2006.229.15:47:16.93#ibcon#*after write, iclass 38, count 2 2006.229.15:47:16.93#ibcon#*before return 0, iclass 38, count 2 2006.229.15:47:16.93#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:47:16.93#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.15:47:16.93#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.15:47:16.93#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:16.93#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:47:17.05#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:47:17.05#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:47:17.05#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:47:17.05#ibcon#first serial, iclass 38, count 0 2006.229.15:47:17.05#ibcon#enter sib2, iclass 38, count 0 2006.229.15:47:17.05#ibcon#flushed, iclass 38, count 0 2006.229.15:47:17.05#ibcon#about to write, iclass 38, count 0 2006.229.15:47:17.05#ibcon#wrote, iclass 38, count 0 2006.229.15:47:17.05#ibcon#about to read 3, iclass 38, count 0 2006.229.15:47:17.07#ibcon#read 3, iclass 38, count 0 2006.229.15:47:17.07#ibcon#about to read 4, iclass 38, count 0 2006.229.15:47:17.07#ibcon#read 4, iclass 38, count 0 2006.229.15:47:17.07#ibcon#about to read 5, iclass 38, count 0 2006.229.15:47:17.07#ibcon#read 5, iclass 38, count 0 2006.229.15:47:17.07#ibcon#about to read 6, iclass 38, count 0 2006.229.15:47:17.07#ibcon#read 6, iclass 38, count 0 2006.229.15:47:17.07#ibcon#end of sib2, iclass 38, count 0 2006.229.15:47:17.07#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:47:17.07#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:47:17.07#ibcon#[27=USB\r\n] 2006.229.15:47:17.07#ibcon#*before write, iclass 38, count 0 2006.229.15:47:17.07#ibcon#enter sib2, iclass 38, count 0 2006.229.15:47:17.07#ibcon#flushed, iclass 38, count 0 2006.229.15:47:17.07#ibcon#about to write, iclass 38, count 0 2006.229.15:47:17.07#ibcon#wrote, iclass 38, count 0 2006.229.15:47:17.07#ibcon#about to read 3, iclass 38, count 0 2006.229.15:47:17.10#ibcon#read 3, iclass 38, count 0 2006.229.15:47:17.10#ibcon#about to read 4, iclass 38, count 0 2006.229.15:47:17.10#ibcon#read 4, iclass 38, count 0 2006.229.15:47:17.10#ibcon#about to read 5, iclass 38, count 0 2006.229.15:47:17.10#ibcon#read 5, iclass 38, count 0 2006.229.15:47:17.10#ibcon#about to read 6, iclass 38, count 0 2006.229.15:47:17.10#ibcon#read 6, iclass 38, count 0 2006.229.15:47:17.10#ibcon#end of sib2, iclass 38, count 0 2006.229.15:47:17.10#ibcon#*after write, iclass 38, count 0 2006.229.15:47:17.10#ibcon#*before return 0, iclass 38, count 0 2006.229.15:47:17.10#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:47:17.10#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.15:47:17.10#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:47:17.10#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:47:17.10$vck44/vblo=2,634.99 2006.229.15:47:17.10#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.15:47:17.10#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.15:47:17.10#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:17.10#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:17.10#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:17.10#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:17.10#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:47:17.10#ibcon#first serial, iclass 40, count 0 2006.229.15:47:17.10#ibcon#enter sib2, iclass 40, count 0 2006.229.15:47:17.10#ibcon#flushed, iclass 40, count 0 2006.229.15:47:17.10#ibcon#about to write, iclass 40, count 0 2006.229.15:47:17.10#ibcon#wrote, iclass 40, count 0 2006.229.15:47:17.10#ibcon#about to read 3, iclass 40, count 0 2006.229.15:47:17.12#ibcon#read 3, iclass 40, count 0 2006.229.15:47:17.12#ibcon#about to read 4, iclass 40, count 0 2006.229.15:47:17.12#ibcon#read 4, iclass 40, count 0 2006.229.15:47:17.12#ibcon#about to read 5, iclass 40, count 0 2006.229.15:47:17.12#ibcon#read 5, iclass 40, count 0 2006.229.15:47:17.12#ibcon#about to read 6, iclass 40, count 0 2006.229.15:47:17.12#ibcon#read 6, iclass 40, count 0 2006.229.15:47:17.12#ibcon#end of sib2, iclass 40, count 0 2006.229.15:47:17.12#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:47:17.12#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:47:17.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:47:17.12#ibcon#*before write, iclass 40, count 0 2006.229.15:47:17.12#ibcon#enter sib2, iclass 40, count 0 2006.229.15:47:17.12#ibcon#flushed, iclass 40, count 0 2006.229.15:47:17.12#ibcon#about to write, iclass 40, count 0 2006.229.15:47:17.12#ibcon#wrote, iclass 40, count 0 2006.229.15:47:17.12#ibcon#about to read 3, iclass 40, count 0 2006.229.15:47:17.16#ibcon#read 3, iclass 40, count 0 2006.229.15:47:17.16#ibcon#about to read 4, iclass 40, count 0 2006.229.15:47:17.16#ibcon#read 4, iclass 40, count 0 2006.229.15:47:17.16#ibcon#about to read 5, iclass 40, count 0 2006.229.15:47:17.16#ibcon#read 5, iclass 40, count 0 2006.229.15:47:17.16#ibcon#about to read 6, iclass 40, count 0 2006.229.15:47:17.16#ibcon#read 6, iclass 40, count 0 2006.229.15:47:17.16#ibcon#end of sib2, iclass 40, count 0 2006.229.15:47:17.16#ibcon#*after write, iclass 40, count 0 2006.229.15:47:17.16#ibcon#*before return 0, iclass 40, count 0 2006.229.15:47:17.16#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:17.16#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.15:47:17.16#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:47:17.16#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:47:17.16$vck44/vb=2,4 2006.229.15:47:17.16#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.15:47:17.16#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.15:47:17.16#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:17.16#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:17.22#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:17.22#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:17.22#ibcon#enter wrdev, iclass 4, count 2 2006.229.15:47:17.22#ibcon#first serial, iclass 4, count 2 2006.229.15:47:17.22#ibcon#enter sib2, iclass 4, count 2 2006.229.15:47:17.22#ibcon#flushed, iclass 4, count 2 2006.229.15:47:17.22#ibcon#about to write, iclass 4, count 2 2006.229.15:47:17.22#ibcon#wrote, iclass 4, count 2 2006.229.15:47:17.22#ibcon#about to read 3, iclass 4, count 2 2006.229.15:47:17.24#ibcon#read 3, iclass 4, count 2 2006.229.15:47:17.24#ibcon#about to read 4, iclass 4, count 2 2006.229.15:47:17.24#ibcon#read 4, iclass 4, count 2 2006.229.15:47:17.24#ibcon#about to read 5, iclass 4, count 2 2006.229.15:47:17.24#ibcon#read 5, iclass 4, count 2 2006.229.15:47:17.24#ibcon#about to read 6, iclass 4, count 2 2006.229.15:47:17.24#ibcon#read 6, iclass 4, count 2 2006.229.15:47:17.24#ibcon#end of sib2, iclass 4, count 2 2006.229.15:47:17.24#ibcon#*mode == 0, iclass 4, count 2 2006.229.15:47:17.24#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.15:47:17.24#ibcon#[27=AT02-04\r\n] 2006.229.15:47:17.24#ibcon#*before write, iclass 4, count 2 2006.229.15:47:17.24#ibcon#enter sib2, iclass 4, count 2 2006.229.15:47:17.24#ibcon#flushed, iclass 4, count 2 2006.229.15:47:17.24#ibcon#about to write, iclass 4, count 2 2006.229.15:47:17.24#ibcon#wrote, iclass 4, count 2 2006.229.15:47:17.24#ibcon#about to read 3, iclass 4, count 2 2006.229.15:47:17.27#ibcon#read 3, iclass 4, count 2 2006.229.15:47:17.27#ibcon#about to read 4, iclass 4, count 2 2006.229.15:47:17.27#ibcon#read 4, iclass 4, count 2 2006.229.15:47:17.27#ibcon#about to read 5, iclass 4, count 2 2006.229.15:47:17.27#ibcon#read 5, iclass 4, count 2 2006.229.15:47:17.27#ibcon#about to read 6, iclass 4, count 2 2006.229.15:47:17.27#ibcon#read 6, iclass 4, count 2 2006.229.15:47:17.27#ibcon#end of sib2, iclass 4, count 2 2006.229.15:47:17.27#ibcon#*after write, iclass 4, count 2 2006.229.15:47:17.27#ibcon#*before return 0, iclass 4, count 2 2006.229.15:47:17.27#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:17.27#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.15:47:17.27#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.15:47:17.27#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:17.27#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:17.39#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:17.39#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:17.39#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:47:17.39#ibcon#first serial, iclass 4, count 0 2006.229.15:47:17.39#ibcon#enter sib2, iclass 4, count 0 2006.229.15:47:17.39#ibcon#flushed, iclass 4, count 0 2006.229.15:47:17.39#ibcon#about to write, iclass 4, count 0 2006.229.15:47:17.39#ibcon#wrote, iclass 4, count 0 2006.229.15:47:17.39#ibcon#about to read 3, iclass 4, count 0 2006.229.15:47:17.41#ibcon#read 3, iclass 4, count 0 2006.229.15:47:17.41#ibcon#about to read 4, iclass 4, count 0 2006.229.15:47:17.41#ibcon#read 4, iclass 4, count 0 2006.229.15:47:17.41#ibcon#about to read 5, iclass 4, count 0 2006.229.15:47:17.41#ibcon#read 5, iclass 4, count 0 2006.229.15:47:17.41#ibcon#about to read 6, iclass 4, count 0 2006.229.15:47:17.41#ibcon#read 6, iclass 4, count 0 2006.229.15:47:17.41#ibcon#end of sib2, iclass 4, count 0 2006.229.15:47:17.41#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:47:17.41#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:47:17.41#ibcon#[27=USB\r\n] 2006.229.15:47:17.41#ibcon#*before write, iclass 4, count 0 2006.229.15:47:17.41#ibcon#enter sib2, iclass 4, count 0 2006.229.15:47:17.41#ibcon#flushed, iclass 4, count 0 2006.229.15:47:17.41#ibcon#about to write, iclass 4, count 0 2006.229.15:47:17.41#ibcon#wrote, iclass 4, count 0 2006.229.15:47:17.41#ibcon#about to read 3, iclass 4, count 0 2006.229.15:47:17.44#ibcon#read 3, iclass 4, count 0 2006.229.15:47:17.44#ibcon#about to read 4, iclass 4, count 0 2006.229.15:47:17.44#ibcon#read 4, iclass 4, count 0 2006.229.15:47:17.44#ibcon#about to read 5, iclass 4, count 0 2006.229.15:47:17.44#ibcon#read 5, iclass 4, count 0 2006.229.15:47:17.44#ibcon#about to read 6, iclass 4, count 0 2006.229.15:47:17.44#ibcon#read 6, iclass 4, count 0 2006.229.15:47:17.44#ibcon#end of sib2, iclass 4, count 0 2006.229.15:47:17.44#ibcon#*after write, iclass 4, count 0 2006.229.15:47:17.44#ibcon#*before return 0, iclass 4, count 0 2006.229.15:47:17.44#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:17.44#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.15:47:17.44#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:47:17.44#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:47:17.44$vck44/vblo=3,649.99 2006.229.15:47:17.44#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.15:47:17.44#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.15:47:17.44#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:17.44#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:17.44#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:17.44#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:17.44#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:47:17.44#ibcon#first serial, iclass 6, count 0 2006.229.15:47:17.44#ibcon#enter sib2, iclass 6, count 0 2006.229.15:47:17.44#ibcon#flushed, iclass 6, count 0 2006.229.15:47:17.44#ibcon#about to write, iclass 6, count 0 2006.229.15:47:17.44#ibcon#wrote, iclass 6, count 0 2006.229.15:47:17.44#ibcon#about to read 3, iclass 6, count 0 2006.229.15:47:17.46#ibcon#read 3, iclass 6, count 0 2006.229.15:47:17.46#ibcon#about to read 4, iclass 6, count 0 2006.229.15:47:17.46#ibcon#read 4, iclass 6, count 0 2006.229.15:47:17.46#ibcon#about to read 5, iclass 6, count 0 2006.229.15:47:17.46#ibcon#read 5, iclass 6, count 0 2006.229.15:47:17.46#ibcon#about to read 6, iclass 6, count 0 2006.229.15:47:17.46#ibcon#read 6, iclass 6, count 0 2006.229.15:47:17.46#ibcon#end of sib2, iclass 6, count 0 2006.229.15:47:17.46#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:47:17.46#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:47:17.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:47:17.46#ibcon#*before write, iclass 6, count 0 2006.229.15:47:17.46#ibcon#enter sib2, iclass 6, count 0 2006.229.15:47:17.46#ibcon#flushed, iclass 6, count 0 2006.229.15:47:17.46#ibcon#about to write, iclass 6, count 0 2006.229.15:47:17.46#ibcon#wrote, iclass 6, count 0 2006.229.15:47:17.46#ibcon#about to read 3, iclass 6, count 0 2006.229.15:47:17.50#ibcon#read 3, iclass 6, count 0 2006.229.15:47:17.50#ibcon#about to read 4, iclass 6, count 0 2006.229.15:47:17.50#ibcon#read 4, iclass 6, count 0 2006.229.15:47:17.50#ibcon#about to read 5, iclass 6, count 0 2006.229.15:47:17.50#ibcon#read 5, iclass 6, count 0 2006.229.15:47:17.50#ibcon#about to read 6, iclass 6, count 0 2006.229.15:47:17.50#ibcon#read 6, iclass 6, count 0 2006.229.15:47:17.50#ibcon#end of sib2, iclass 6, count 0 2006.229.15:47:17.50#ibcon#*after write, iclass 6, count 0 2006.229.15:47:17.50#ibcon#*before return 0, iclass 6, count 0 2006.229.15:47:17.50#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:17.50#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.15:47:17.50#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:47:17.50#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:47:17.50$vck44/vb=3,4 2006.229.15:47:17.50#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.15:47:17.50#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.15:47:17.50#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:17.50#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:17.56#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:17.56#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:17.56#ibcon#enter wrdev, iclass 10, count 2 2006.229.15:47:17.56#ibcon#first serial, iclass 10, count 2 2006.229.15:47:17.56#ibcon#enter sib2, iclass 10, count 2 2006.229.15:47:17.56#ibcon#flushed, iclass 10, count 2 2006.229.15:47:17.56#ibcon#about to write, iclass 10, count 2 2006.229.15:47:17.56#ibcon#wrote, iclass 10, count 2 2006.229.15:47:17.56#ibcon#about to read 3, iclass 10, count 2 2006.229.15:47:17.58#ibcon#read 3, iclass 10, count 2 2006.229.15:47:17.58#ibcon#about to read 4, iclass 10, count 2 2006.229.15:47:17.58#ibcon#read 4, iclass 10, count 2 2006.229.15:47:17.58#ibcon#about to read 5, iclass 10, count 2 2006.229.15:47:17.58#ibcon#read 5, iclass 10, count 2 2006.229.15:47:17.58#ibcon#about to read 6, iclass 10, count 2 2006.229.15:47:17.58#ibcon#read 6, iclass 10, count 2 2006.229.15:47:17.58#ibcon#end of sib2, iclass 10, count 2 2006.229.15:47:17.58#ibcon#*mode == 0, iclass 10, count 2 2006.229.15:47:17.58#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.15:47:17.58#ibcon#[27=AT03-04\r\n] 2006.229.15:47:17.58#ibcon#*before write, iclass 10, count 2 2006.229.15:47:17.58#ibcon#enter sib2, iclass 10, count 2 2006.229.15:47:17.58#ibcon#flushed, iclass 10, count 2 2006.229.15:47:17.58#ibcon#about to write, iclass 10, count 2 2006.229.15:47:17.58#ibcon#wrote, iclass 10, count 2 2006.229.15:47:17.58#ibcon#about to read 3, iclass 10, count 2 2006.229.15:47:17.61#ibcon#read 3, iclass 10, count 2 2006.229.15:47:17.61#ibcon#about to read 4, iclass 10, count 2 2006.229.15:47:17.61#ibcon#read 4, iclass 10, count 2 2006.229.15:47:17.61#ibcon#about to read 5, iclass 10, count 2 2006.229.15:47:17.61#ibcon#read 5, iclass 10, count 2 2006.229.15:47:17.61#ibcon#about to read 6, iclass 10, count 2 2006.229.15:47:17.61#ibcon#read 6, iclass 10, count 2 2006.229.15:47:17.61#ibcon#end of sib2, iclass 10, count 2 2006.229.15:47:17.61#ibcon#*after write, iclass 10, count 2 2006.229.15:47:17.61#ibcon#*before return 0, iclass 10, count 2 2006.229.15:47:17.61#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:17.61#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.15:47:17.61#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.15:47:17.61#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:17.61#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:17.73#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:17.73#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:17.73#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:47:17.73#ibcon#first serial, iclass 10, count 0 2006.229.15:47:17.73#ibcon#enter sib2, iclass 10, count 0 2006.229.15:47:17.73#ibcon#flushed, iclass 10, count 0 2006.229.15:47:17.73#ibcon#about to write, iclass 10, count 0 2006.229.15:47:17.73#ibcon#wrote, iclass 10, count 0 2006.229.15:47:17.73#ibcon#about to read 3, iclass 10, count 0 2006.229.15:47:17.75#ibcon#read 3, iclass 10, count 0 2006.229.15:47:17.75#ibcon#about to read 4, iclass 10, count 0 2006.229.15:47:17.75#ibcon#read 4, iclass 10, count 0 2006.229.15:47:17.75#ibcon#about to read 5, iclass 10, count 0 2006.229.15:47:17.75#ibcon#read 5, iclass 10, count 0 2006.229.15:47:17.75#ibcon#about to read 6, iclass 10, count 0 2006.229.15:47:17.75#ibcon#read 6, iclass 10, count 0 2006.229.15:47:17.75#ibcon#end of sib2, iclass 10, count 0 2006.229.15:47:17.75#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:47:17.75#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:47:17.75#ibcon#[27=USB\r\n] 2006.229.15:47:17.75#ibcon#*before write, iclass 10, count 0 2006.229.15:47:17.75#ibcon#enter sib2, iclass 10, count 0 2006.229.15:47:17.75#ibcon#flushed, iclass 10, count 0 2006.229.15:47:17.75#ibcon#about to write, iclass 10, count 0 2006.229.15:47:17.75#ibcon#wrote, iclass 10, count 0 2006.229.15:47:17.75#ibcon#about to read 3, iclass 10, count 0 2006.229.15:47:17.78#ibcon#read 3, iclass 10, count 0 2006.229.15:47:17.78#ibcon#about to read 4, iclass 10, count 0 2006.229.15:47:17.78#ibcon#read 4, iclass 10, count 0 2006.229.15:47:17.78#ibcon#about to read 5, iclass 10, count 0 2006.229.15:47:17.78#ibcon#read 5, iclass 10, count 0 2006.229.15:47:17.78#ibcon#about to read 6, iclass 10, count 0 2006.229.15:47:17.78#ibcon#read 6, iclass 10, count 0 2006.229.15:47:17.78#ibcon#end of sib2, iclass 10, count 0 2006.229.15:47:17.78#ibcon#*after write, iclass 10, count 0 2006.229.15:47:17.78#ibcon#*before return 0, iclass 10, count 0 2006.229.15:47:17.78#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:17.78#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.15:47:17.78#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:47:17.78#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:47:17.78$vck44/vblo=4,679.99 2006.229.15:47:17.78#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.15:47:17.78#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.15:47:17.78#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:17.78#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:17.78#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:17.78#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:17.78#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:47:17.78#ibcon#first serial, iclass 12, count 0 2006.229.15:47:17.78#ibcon#enter sib2, iclass 12, count 0 2006.229.15:47:17.78#ibcon#flushed, iclass 12, count 0 2006.229.15:47:17.78#ibcon#about to write, iclass 12, count 0 2006.229.15:47:17.78#ibcon#wrote, iclass 12, count 0 2006.229.15:47:17.78#ibcon#about to read 3, iclass 12, count 0 2006.229.15:47:17.80#ibcon#read 3, iclass 12, count 0 2006.229.15:47:17.80#ibcon#about to read 4, iclass 12, count 0 2006.229.15:47:17.80#ibcon#read 4, iclass 12, count 0 2006.229.15:47:17.80#ibcon#about to read 5, iclass 12, count 0 2006.229.15:47:17.80#ibcon#read 5, iclass 12, count 0 2006.229.15:47:17.80#ibcon#about to read 6, iclass 12, count 0 2006.229.15:47:17.80#ibcon#read 6, iclass 12, count 0 2006.229.15:47:17.80#ibcon#end of sib2, iclass 12, count 0 2006.229.15:47:17.80#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:47:17.80#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:47:17.80#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:47:17.80#ibcon#*before write, iclass 12, count 0 2006.229.15:47:17.80#ibcon#enter sib2, iclass 12, count 0 2006.229.15:47:17.80#ibcon#flushed, iclass 12, count 0 2006.229.15:47:17.80#ibcon#about to write, iclass 12, count 0 2006.229.15:47:17.80#ibcon#wrote, iclass 12, count 0 2006.229.15:47:17.80#ibcon#about to read 3, iclass 12, count 0 2006.229.15:47:17.84#ibcon#read 3, iclass 12, count 0 2006.229.15:47:17.84#ibcon#about to read 4, iclass 12, count 0 2006.229.15:47:17.84#ibcon#read 4, iclass 12, count 0 2006.229.15:47:17.84#ibcon#about to read 5, iclass 12, count 0 2006.229.15:47:17.84#ibcon#read 5, iclass 12, count 0 2006.229.15:47:17.84#ibcon#about to read 6, iclass 12, count 0 2006.229.15:47:17.84#ibcon#read 6, iclass 12, count 0 2006.229.15:47:17.84#ibcon#end of sib2, iclass 12, count 0 2006.229.15:47:17.84#ibcon#*after write, iclass 12, count 0 2006.229.15:47:17.84#ibcon#*before return 0, iclass 12, count 0 2006.229.15:47:17.84#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:17.84#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.15:47:17.84#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:47:17.84#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:47:17.84$vck44/vb=4,4 2006.229.15:47:17.84#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.15:47:17.84#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.15:47:17.84#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:17.84#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:17.90#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:17.90#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:17.90#ibcon#enter wrdev, iclass 14, count 2 2006.229.15:47:17.90#ibcon#first serial, iclass 14, count 2 2006.229.15:47:17.90#ibcon#enter sib2, iclass 14, count 2 2006.229.15:47:17.90#ibcon#flushed, iclass 14, count 2 2006.229.15:47:17.90#ibcon#about to write, iclass 14, count 2 2006.229.15:47:17.90#ibcon#wrote, iclass 14, count 2 2006.229.15:47:17.90#ibcon#about to read 3, iclass 14, count 2 2006.229.15:47:17.92#ibcon#read 3, iclass 14, count 2 2006.229.15:47:17.92#ibcon#about to read 4, iclass 14, count 2 2006.229.15:47:17.92#ibcon#read 4, iclass 14, count 2 2006.229.15:47:17.92#ibcon#about to read 5, iclass 14, count 2 2006.229.15:47:17.92#ibcon#read 5, iclass 14, count 2 2006.229.15:47:17.92#ibcon#about to read 6, iclass 14, count 2 2006.229.15:47:17.92#ibcon#read 6, iclass 14, count 2 2006.229.15:47:17.92#ibcon#end of sib2, iclass 14, count 2 2006.229.15:47:17.92#ibcon#*mode == 0, iclass 14, count 2 2006.229.15:47:17.92#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.15:47:17.92#ibcon#[27=AT04-04\r\n] 2006.229.15:47:17.92#ibcon#*before write, iclass 14, count 2 2006.229.15:47:17.92#ibcon#enter sib2, iclass 14, count 2 2006.229.15:47:17.92#ibcon#flushed, iclass 14, count 2 2006.229.15:47:17.92#ibcon#about to write, iclass 14, count 2 2006.229.15:47:17.92#ibcon#wrote, iclass 14, count 2 2006.229.15:47:17.92#ibcon#about to read 3, iclass 14, count 2 2006.229.15:47:17.95#ibcon#read 3, iclass 14, count 2 2006.229.15:47:17.95#ibcon#about to read 4, iclass 14, count 2 2006.229.15:47:17.95#ibcon#read 4, iclass 14, count 2 2006.229.15:47:17.95#ibcon#about to read 5, iclass 14, count 2 2006.229.15:47:17.95#ibcon#read 5, iclass 14, count 2 2006.229.15:47:17.95#ibcon#about to read 6, iclass 14, count 2 2006.229.15:47:17.95#ibcon#read 6, iclass 14, count 2 2006.229.15:47:17.95#ibcon#end of sib2, iclass 14, count 2 2006.229.15:47:17.95#ibcon#*after write, iclass 14, count 2 2006.229.15:47:17.95#ibcon#*before return 0, iclass 14, count 2 2006.229.15:47:17.95#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:17.95#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.15:47:17.95#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.15:47:17.95#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:17.95#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:18.07#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:18.07#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:18.07#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:47:18.07#ibcon#first serial, iclass 14, count 0 2006.229.15:47:18.07#ibcon#enter sib2, iclass 14, count 0 2006.229.15:47:18.07#ibcon#flushed, iclass 14, count 0 2006.229.15:47:18.07#ibcon#about to write, iclass 14, count 0 2006.229.15:47:18.07#ibcon#wrote, iclass 14, count 0 2006.229.15:47:18.07#ibcon#about to read 3, iclass 14, count 0 2006.229.15:47:18.09#ibcon#read 3, iclass 14, count 0 2006.229.15:47:18.09#ibcon#about to read 4, iclass 14, count 0 2006.229.15:47:18.09#ibcon#read 4, iclass 14, count 0 2006.229.15:47:18.09#ibcon#about to read 5, iclass 14, count 0 2006.229.15:47:18.09#ibcon#read 5, iclass 14, count 0 2006.229.15:47:18.09#ibcon#about to read 6, iclass 14, count 0 2006.229.15:47:18.09#ibcon#read 6, iclass 14, count 0 2006.229.15:47:18.09#ibcon#end of sib2, iclass 14, count 0 2006.229.15:47:18.09#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:47:18.09#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:47:18.09#ibcon#[27=USB\r\n] 2006.229.15:47:18.09#ibcon#*before write, iclass 14, count 0 2006.229.15:47:18.09#ibcon#enter sib2, iclass 14, count 0 2006.229.15:47:18.09#ibcon#flushed, iclass 14, count 0 2006.229.15:47:18.09#ibcon#about to write, iclass 14, count 0 2006.229.15:47:18.09#ibcon#wrote, iclass 14, count 0 2006.229.15:47:18.09#ibcon#about to read 3, iclass 14, count 0 2006.229.15:47:18.12#ibcon#read 3, iclass 14, count 0 2006.229.15:47:18.12#ibcon#about to read 4, iclass 14, count 0 2006.229.15:47:18.12#ibcon#read 4, iclass 14, count 0 2006.229.15:47:18.12#ibcon#about to read 5, iclass 14, count 0 2006.229.15:47:18.12#ibcon#read 5, iclass 14, count 0 2006.229.15:47:18.12#ibcon#about to read 6, iclass 14, count 0 2006.229.15:47:18.12#ibcon#read 6, iclass 14, count 0 2006.229.15:47:18.12#ibcon#end of sib2, iclass 14, count 0 2006.229.15:47:18.12#ibcon#*after write, iclass 14, count 0 2006.229.15:47:18.12#ibcon#*before return 0, iclass 14, count 0 2006.229.15:47:18.12#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:18.12#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.15:47:18.12#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:47:18.12#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:47:18.12$vck44/vblo=5,709.99 2006.229.15:47:18.12#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.15:47:18.12#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.15:47:18.12#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:18.12#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:18.12#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:18.12#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:18.12#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:47:18.12#ibcon#first serial, iclass 16, count 0 2006.229.15:47:18.12#ibcon#enter sib2, iclass 16, count 0 2006.229.15:47:18.12#ibcon#flushed, iclass 16, count 0 2006.229.15:47:18.12#ibcon#about to write, iclass 16, count 0 2006.229.15:47:18.12#ibcon#wrote, iclass 16, count 0 2006.229.15:47:18.12#ibcon#about to read 3, iclass 16, count 0 2006.229.15:47:18.14#ibcon#read 3, iclass 16, count 0 2006.229.15:47:18.14#ibcon#about to read 4, iclass 16, count 0 2006.229.15:47:18.14#ibcon#read 4, iclass 16, count 0 2006.229.15:47:18.14#ibcon#about to read 5, iclass 16, count 0 2006.229.15:47:18.14#ibcon#read 5, iclass 16, count 0 2006.229.15:47:18.14#ibcon#about to read 6, iclass 16, count 0 2006.229.15:47:18.14#ibcon#read 6, iclass 16, count 0 2006.229.15:47:18.14#ibcon#end of sib2, iclass 16, count 0 2006.229.15:47:18.14#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:47:18.14#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:47:18.14#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:47:18.14#ibcon#*before write, iclass 16, count 0 2006.229.15:47:18.14#ibcon#enter sib2, iclass 16, count 0 2006.229.15:47:18.14#ibcon#flushed, iclass 16, count 0 2006.229.15:47:18.14#ibcon#about to write, iclass 16, count 0 2006.229.15:47:18.14#ibcon#wrote, iclass 16, count 0 2006.229.15:47:18.14#ibcon#about to read 3, iclass 16, count 0 2006.229.15:47:18.18#ibcon#read 3, iclass 16, count 0 2006.229.15:47:18.18#ibcon#about to read 4, iclass 16, count 0 2006.229.15:47:18.18#ibcon#read 4, iclass 16, count 0 2006.229.15:47:18.18#ibcon#about to read 5, iclass 16, count 0 2006.229.15:47:18.18#ibcon#read 5, iclass 16, count 0 2006.229.15:47:18.18#ibcon#about to read 6, iclass 16, count 0 2006.229.15:47:18.18#ibcon#read 6, iclass 16, count 0 2006.229.15:47:18.18#ibcon#end of sib2, iclass 16, count 0 2006.229.15:47:18.18#ibcon#*after write, iclass 16, count 0 2006.229.15:47:18.18#ibcon#*before return 0, iclass 16, count 0 2006.229.15:47:18.18#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:18.18#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.15:47:18.18#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:47:18.18#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:47:18.18$vck44/vb=5,4 2006.229.15:47:18.18#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.15:47:18.18#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.15:47:18.18#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:18.18#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:18.24#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:18.24#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:18.24#ibcon#enter wrdev, iclass 18, count 2 2006.229.15:47:18.24#ibcon#first serial, iclass 18, count 2 2006.229.15:47:18.24#ibcon#enter sib2, iclass 18, count 2 2006.229.15:47:18.24#ibcon#flushed, iclass 18, count 2 2006.229.15:47:18.24#ibcon#about to write, iclass 18, count 2 2006.229.15:47:18.24#ibcon#wrote, iclass 18, count 2 2006.229.15:47:18.24#ibcon#about to read 3, iclass 18, count 2 2006.229.15:47:18.26#ibcon#read 3, iclass 18, count 2 2006.229.15:47:18.26#ibcon#about to read 4, iclass 18, count 2 2006.229.15:47:18.26#ibcon#read 4, iclass 18, count 2 2006.229.15:47:18.26#ibcon#about to read 5, iclass 18, count 2 2006.229.15:47:18.26#ibcon#read 5, iclass 18, count 2 2006.229.15:47:18.26#ibcon#about to read 6, iclass 18, count 2 2006.229.15:47:18.26#ibcon#read 6, iclass 18, count 2 2006.229.15:47:18.26#ibcon#end of sib2, iclass 18, count 2 2006.229.15:47:18.26#ibcon#*mode == 0, iclass 18, count 2 2006.229.15:47:18.26#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.15:47:18.26#ibcon#[27=AT05-04\r\n] 2006.229.15:47:18.26#ibcon#*before write, iclass 18, count 2 2006.229.15:47:18.26#ibcon#enter sib2, iclass 18, count 2 2006.229.15:47:18.26#ibcon#flushed, iclass 18, count 2 2006.229.15:47:18.26#ibcon#about to write, iclass 18, count 2 2006.229.15:47:18.26#ibcon#wrote, iclass 18, count 2 2006.229.15:47:18.26#ibcon#about to read 3, iclass 18, count 2 2006.229.15:47:18.29#ibcon#read 3, iclass 18, count 2 2006.229.15:47:18.29#ibcon#about to read 4, iclass 18, count 2 2006.229.15:47:18.29#ibcon#read 4, iclass 18, count 2 2006.229.15:47:18.29#ibcon#about to read 5, iclass 18, count 2 2006.229.15:47:18.29#ibcon#read 5, iclass 18, count 2 2006.229.15:47:18.29#ibcon#about to read 6, iclass 18, count 2 2006.229.15:47:18.29#ibcon#read 6, iclass 18, count 2 2006.229.15:47:18.29#ibcon#end of sib2, iclass 18, count 2 2006.229.15:47:18.29#ibcon#*after write, iclass 18, count 2 2006.229.15:47:18.29#ibcon#*before return 0, iclass 18, count 2 2006.229.15:47:18.29#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:18.29#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.15:47:18.29#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.15:47:18.29#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:18.29#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:18.41#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:18.41#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:18.41#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:47:18.41#ibcon#first serial, iclass 18, count 0 2006.229.15:47:18.41#ibcon#enter sib2, iclass 18, count 0 2006.229.15:47:18.41#ibcon#flushed, iclass 18, count 0 2006.229.15:47:18.41#ibcon#about to write, iclass 18, count 0 2006.229.15:47:18.41#ibcon#wrote, iclass 18, count 0 2006.229.15:47:18.41#ibcon#about to read 3, iclass 18, count 0 2006.229.15:47:18.43#ibcon#read 3, iclass 18, count 0 2006.229.15:47:18.43#ibcon#about to read 4, iclass 18, count 0 2006.229.15:47:18.43#ibcon#read 4, iclass 18, count 0 2006.229.15:47:18.43#ibcon#about to read 5, iclass 18, count 0 2006.229.15:47:18.43#ibcon#read 5, iclass 18, count 0 2006.229.15:47:18.43#ibcon#about to read 6, iclass 18, count 0 2006.229.15:47:18.43#ibcon#read 6, iclass 18, count 0 2006.229.15:47:18.43#ibcon#end of sib2, iclass 18, count 0 2006.229.15:47:18.43#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:47:18.43#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:47:18.43#ibcon#[27=USB\r\n] 2006.229.15:47:18.43#ibcon#*before write, iclass 18, count 0 2006.229.15:47:18.43#ibcon#enter sib2, iclass 18, count 0 2006.229.15:47:18.43#ibcon#flushed, iclass 18, count 0 2006.229.15:47:18.43#ibcon#about to write, iclass 18, count 0 2006.229.15:47:18.43#ibcon#wrote, iclass 18, count 0 2006.229.15:47:18.43#ibcon#about to read 3, iclass 18, count 0 2006.229.15:47:18.46#ibcon#read 3, iclass 18, count 0 2006.229.15:47:18.46#ibcon#about to read 4, iclass 18, count 0 2006.229.15:47:18.46#ibcon#read 4, iclass 18, count 0 2006.229.15:47:18.46#ibcon#about to read 5, iclass 18, count 0 2006.229.15:47:18.46#ibcon#read 5, iclass 18, count 0 2006.229.15:47:18.46#ibcon#about to read 6, iclass 18, count 0 2006.229.15:47:18.46#ibcon#read 6, iclass 18, count 0 2006.229.15:47:18.46#ibcon#end of sib2, iclass 18, count 0 2006.229.15:47:18.46#ibcon#*after write, iclass 18, count 0 2006.229.15:47:18.46#ibcon#*before return 0, iclass 18, count 0 2006.229.15:47:18.46#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:18.46#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.15:47:18.46#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:47:18.46#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:47:18.46$vck44/vblo=6,719.99 2006.229.15:47:18.46#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:47:18.46#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:47:18.46#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:18.46#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:18.46#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:18.46#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:18.46#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:47:18.46#ibcon#first serial, iclass 20, count 0 2006.229.15:47:18.46#ibcon#enter sib2, iclass 20, count 0 2006.229.15:47:18.46#ibcon#flushed, iclass 20, count 0 2006.229.15:47:18.46#ibcon#about to write, iclass 20, count 0 2006.229.15:47:18.46#ibcon#wrote, iclass 20, count 0 2006.229.15:47:18.46#ibcon#about to read 3, iclass 20, count 0 2006.229.15:47:18.48#ibcon#read 3, iclass 20, count 0 2006.229.15:47:18.48#ibcon#about to read 4, iclass 20, count 0 2006.229.15:47:18.48#ibcon#read 4, iclass 20, count 0 2006.229.15:47:18.48#ibcon#about to read 5, iclass 20, count 0 2006.229.15:47:18.48#ibcon#read 5, iclass 20, count 0 2006.229.15:47:18.48#ibcon#about to read 6, iclass 20, count 0 2006.229.15:47:18.48#ibcon#read 6, iclass 20, count 0 2006.229.15:47:18.48#ibcon#end of sib2, iclass 20, count 0 2006.229.15:47:18.48#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:47:18.48#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:47:18.48#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:47:18.48#ibcon#*before write, iclass 20, count 0 2006.229.15:47:18.48#ibcon#enter sib2, iclass 20, count 0 2006.229.15:47:18.48#ibcon#flushed, iclass 20, count 0 2006.229.15:47:18.48#ibcon#about to write, iclass 20, count 0 2006.229.15:47:18.48#ibcon#wrote, iclass 20, count 0 2006.229.15:47:18.48#ibcon#about to read 3, iclass 20, count 0 2006.229.15:47:18.52#ibcon#read 3, iclass 20, count 0 2006.229.15:47:18.52#ibcon#about to read 4, iclass 20, count 0 2006.229.15:47:18.52#ibcon#read 4, iclass 20, count 0 2006.229.15:47:18.52#ibcon#about to read 5, iclass 20, count 0 2006.229.15:47:18.52#ibcon#read 5, iclass 20, count 0 2006.229.15:47:18.52#ibcon#about to read 6, iclass 20, count 0 2006.229.15:47:18.52#ibcon#read 6, iclass 20, count 0 2006.229.15:47:18.52#ibcon#end of sib2, iclass 20, count 0 2006.229.15:47:18.52#ibcon#*after write, iclass 20, count 0 2006.229.15:47:18.52#ibcon#*before return 0, iclass 20, count 0 2006.229.15:47:18.52#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:18.52#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:47:18.52#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:47:18.52#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:47:18.52$vck44/vb=6,4 2006.229.15:47:18.52#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.15:47:18.52#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.15:47:18.52#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:18.52#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:18.58#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:18.58#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:18.58#ibcon#enter wrdev, iclass 22, count 2 2006.229.15:47:18.58#ibcon#first serial, iclass 22, count 2 2006.229.15:47:18.58#ibcon#enter sib2, iclass 22, count 2 2006.229.15:47:18.58#ibcon#flushed, iclass 22, count 2 2006.229.15:47:18.58#ibcon#about to write, iclass 22, count 2 2006.229.15:47:18.58#ibcon#wrote, iclass 22, count 2 2006.229.15:47:18.58#ibcon#about to read 3, iclass 22, count 2 2006.229.15:47:18.60#ibcon#read 3, iclass 22, count 2 2006.229.15:47:18.60#ibcon#about to read 4, iclass 22, count 2 2006.229.15:47:18.60#ibcon#read 4, iclass 22, count 2 2006.229.15:47:18.60#ibcon#about to read 5, iclass 22, count 2 2006.229.15:47:18.60#ibcon#read 5, iclass 22, count 2 2006.229.15:47:18.60#ibcon#about to read 6, iclass 22, count 2 2006.229.15:47:18.60#ibcon#read 6, iclass 22, count 2 2006.229.15:47:18.60#ibcon#end of sib2, iclass 22, count 2 2006.229.15:47:18.60#ibcon#*mode == 0, iclass 22, count 2 2006.229.15:47:18.60#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.15:47:18.60#ibcon#[27=AT06-04\r\n] 2006.229.15:47:18.60#ibcon#*before write, iclass 22, count 2 2006.229.15:47:18.60#ibcon#enter sib2, iclass 22, count 2 2006.229.15:47:18.60#ibcon#flushed, iclass 22, count 2 2006.229.15:47:18.60#ibcon#about to write, iclass 22, count 2 2006.229.15:47:18.60#ibcon#wrote, iclass 22, count 2 2006.229.15:47:18.60#ibcon#about to read 3, iclass 22, count 2 2006.229.15:47:18.63#ibcon#read 3, iclass 22, count 2 2006.229.15:47:18.63#ibcon#about to read 4, iclass 22, count 2 2006.229.15:47:18.63#ibcon#read 4, iclass 22, count 2 2006.229.15:47:18.63#ibcon#about to read 5, iclass 22, count 2 2006.229.15:47:18.63#ibcon#read 5, iclass 22, count 2 2006.229.15:47:18.63#ibcon#about to read 6, iclass 22, count 2 2006.229.15:47:18.63#ibcon#read 6, iclass 22, count 2 2006.229.15:47:18.63#ibcon#end of sib2, iclass 22, count 2 2006.229.15:47:18.63#ibcon#*after write, iclass 22, count 2 2006.229.15:47:18.63#ibcon#*before return 0, iclass 22, count 2 2006.229.15:47:18.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:18.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.15:47:18.63#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.15:47:18.63#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:18.63#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:18.75#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:18.75#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:18.75#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:47:18.75#ibcon#first serial, iclass 22, count 0 2006.229.15:47:18.75#ibcon#enter sib2, iclass 22, count 0 2006.229.15:47:18.75#ibcon#flushed, iclass 22, count 0 2006.229.15:47:18.75#ibcon#about to write, iclass 22, count 0 2006.229.15:47:18.75#ibcon#wrote, iclass 22, count 0 2006.229.15:47:18.75#ibcon#about to read 3, iclass 22, count 0 2006.229.15:47:18.77#ibcon#read 3, iclass 22, count 0 2006.229.15:47:18.77#ibcon#about to read 4, iclass 22, count 0 2006.229.15:47:18.77#ibcon#read 4, iclass 22, count 0 2006.229.15:47:18.77#ibcon#about to read 5, iclass 22, count 0 2006.229.15:47:18.77#ibcon#read 5, iclass 22, count 0 2006.229.15:47:18.77#ibcon#about to read 6, iclass 22, count 0 2006.229.15:47:18.77#ibcon#read 6, iclass 22, count 0 2006.229.15:47:18.77#ibcon#end of sib2, iclass 22, count 0 2006.229.15:47:18.77#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:47:18.77#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:47:18.77#ibcon#[27=USB\r\n] 2006.229.15:47:18.77#ibcon#*before write, iclass 22, count 0 2006.229.15:47:18.77#ibcon#enter sib2, iclass 22, count 0 2006.229.15:47:18.77#ibcon#flushed, iclass 22, count 0 2006.229.15:47:18.77#ibcon#about to write, iclass 22, count 0 2006.229.15:47:18.77#ibcon#wrote, iclass 22, count 0 2006.229.15:47:18.77#ibcon#about to read 3, iclass 22, count 0 2006.229.15:47:18.80#ibcon#read 3, iclass 22, count 0 2006.229.15:47:18.80#ibcon#about to read 4, iclass 22, count 0 2006.229.15:47:18.80#ibcon#read 4, iclass 22, count 0 2006.229.15:47:18.80#ibcon#about to read 5, iclass 22, count 0 2006.229.15:47:18.80#ibcon#read 5, iclass 22, count 0 2006.229.15:47:18.80#ibcon#about to read 6, iclass 22, count 0 2006.229.15:47:18.80#ibcon#read 6, iclass 22, count 0 2006.229.15:47:18.80#ibcon#end of sib2, iclass 22, count 0 2006.229.15:47:18.80#ibcon#*after write, iclass 22, count 0 2006.229.15:47:18.80#ibcon#*before return 0, iclass 22, count 0 2006.229.15:47:18.80#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:18.80#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.15:47:18.80#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:47:18.80#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:47:18.80$vck44/vblo=7,734.99 2006.229.15:47:18.80#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.15:47:18.80#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.15:47:18.80#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:18.80#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:18.80#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:18.80#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:18.80#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:47:18.80#ibcon#first serial, iclass 24, count 0 2006.229.15:47:18.80#ibcon#enter sib2, iclass 24, count 0 2006.229.15:47:18.80#ibcon#flushed, iclass 24, count 0 2006.229.15:47:18.80#ibcon#about to write, iclass 24, count 0 2006.229.15:47:18.80#ibcon#wrote, iclass 24, count 0 2006.229.15:47:18.80#ibcon#about to read 3, iclass 24, count 0 2006.229.15:47:18.82#ibcon#read 3, iclass 24, count 0 2006.229.15:47:18.82#ibcon#about to read 4, iclass 24, count 0 2006.229.15:47:18.82#ibcon#read 4, iclass 24, count 0 2006.229.15:47:18.82#ibcon#about to read 5, iclass 24, count 0 2006.229.15:47:18.82#ibcon#read 5, iclass 24, count 0 2006.229.15:47:18.82#ibcon#about to read 6, iclass 24, count 0 2006.229.15:47:18.82#ibcon#read 6, iclass 24, count 0 2006.229.15:47:18.82#ibcon#end of sib2, iclass 24, count 0 2006.229.15:47:18.82#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:47:18.82#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:47:18.82#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:47:18.82#ibcon#*before write, iclass 24, count 0 2006.229.15:47:18.82#ibcon#enter sib2, iclass 24, count 0 2006.229.15:47:18.82#ibcon#flushed, iclass 24, count 0 2006.229.15:47:18.82#ibcon#about to write, iclass 24, count 0 2006.229.15:47:18.82#ibcon#wrote, iclass 24, count 0 2006.229.15:47:18.82#ibcon#about to read 3, iclass 24, count 0 2006.229.15:47:18.86#ibcon#read 3, iclass 24, count 0 2006.229.15:47:18.86#ibcon#about to read 4, iclass 24, count 0 2006.229.15:47:18.86#ibcon#read 4, iclass 24, count 0 2006.229.15:47:18.86#ibcon#about to read 5, iclass 24, count 0 2006.229.15:47:18.86#ibcon#read 5, iclass 24, count 0 2006.229.15:47:18.86#ibcon#about to read 6, iclass 24, count 0 2006.229.15:47:18.86#ibcon#read 6, iclass 24, count 0 2006.229.15:47:18.86#ibcon#end of sib2, iclass 24, count 0 2006.229.15:47:18.86#ibcon#*after write, iclass 24, count 0 2006.229.15:47:18.86#ibcon#*before return 0, iclass 24, count 0 2006.229.15:47:18.86#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:18.86#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.15:47:18.86#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:47:18.86#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:47:18.86$vck44/vb=7,4 2006.229.15:47:18.86#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.15:47:18.86#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.15:47:18.86#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:18.86#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:18.92#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:18.92#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:18.92#ibcon#enter wrdev, iclass 26, count 2 2006.229.15:47:18.92#ibcon#first serial, iclass 26, count 2 2006.229.15:47:18.92#ibcon#enter sib2, iclass 26, count 2 2006.229.15:47:18.92#ibcon#flushed, iclass 26, count 2 2006.229.15:47:18.92#ibcon#about to write, iclass 26, count 2 2006.229.15:47:18.92#ibcon#wrote, iclass 26, count 2 2006.229.15:47:18.92#ibcon#about to read 3, iclass 26, count 2 2006.229.15:47:18.94#ibcon#read 3, iclass 26, count 2 2006.229.15:47:18.94#ibcon#about to read 4, iclass 26, count 2 2006.229.15:47:18.94#ibcon#read 4, iclass 26, count 2 2006.229.15:47:18.94#ibcon#about to read 5, iclass 26, count 2 2006.229.15:47:18.94#ibcon#read 5, iclass 26, count 2 2006.229.15:47:18.94#ibcon#about to read 6, iclass 26, count 2 2006.229.15:47:18.94#ibcon#read 6, iclass 26, count 2 2006.229.15:47:18.94#ibcon#end of sib2, iclass 26, count 2 2006.229.15:47:18.94#ibcon#*mode == 0, iclass 26, count 2 2006.229.15:47:18.94#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.15:47:18.94#ibcon#[27=AT07-04\r\n] 2006.229.15:47:18.94#ibcon#*before write, iclass 26, count 2 2006.229.15:47:18.94#ibcon#enter sib2, iclass 26, count 2 2006.229.15:47:18.94#ibcon#flushed, iclass 26, count 2 2006.229.15:47:18.94#ibcon#about to write, iclass 26, count 2 2006.229.15:47:18.94#ibcon#wrote, iclass 26, count 2 2006.229.15:47:18.94#ibcon#about to read 3, iclass 26, count 2 2006.229.15:47:18.97#ibcon#read 3, iclass 26, count 2 2006.229.15:47:18.97#ibcon#about to read 4, iclass 26, count 2 2006.229.15:47:18.97#ibcon#read 4, iclass 26, count 2 2006.229.15:47:18.97#ibcon#about to read 5, iclass 26, count 2 2006.229.15:47:18.97#ibcon#read 5, iclass 26, count 2 2006.229.15:47:18.97#ibcon#about to read 6, iclass 26, count 2 2006.229.15:47:18.97#ibcon#read 6, iclass 26, count 2 2006.229.15:47:18.97#ibcon#end of sib2, iclass 26, count 2 2006.229.15:47:18.97#ibcon#*after write, iclass 26, count 2 2006.229.15:47:18.97#ibcon#*before return 0, iclass 26, count 2 2006.229.15:47:18.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:18.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.15:47:18.97#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.15:47:18.97#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:18.97#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:19.09#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:19.09#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:19.09#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:47:19.09#ibcon#first serial, iclass 26, count 0 2006.229.15:47:19.09#ibcon#enter sib2, iclass 26, count 0 2006.229.15:47:19.09#ibcon#flushed, iclass 26, count 0 2006.229.15:47:19.09#ibcon#about to write, iclass 26, count 0 2006.229.15:47:19.09#ibcon#wrote, iclass 26, count 0 2006.229.15:47:19.09#ibcon#about to read 3, iclass 26, count 0 2006.229.15:47:19.11#ibcon#read 3, iclass 26, count 0 2006.229.15:47:19.11#ibcon#about to read 4, iclass 26, count 0 2006.229.15:47:19.11#ibcon#read 4, iclass 26, count 0 2006.229.15:47:19.11#ibcon#about to read 5, iclass 26, count 0 2006.229.15:47:19.11#ibcon#read 5, iclass 26, count 0 2006.229.15:47:19.11#ibcon#about to read 6, iclass 26, count 0 2006.229.15:47:19.11#ibcon#read 6, iclass 26, count 0 2006.229.15:47:19.11#ibcon#end of sib2, iclass 26, count 0 2006.229.15:47:19.11#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:47:19.11#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:47:19.11#ibcon#[27=USB\r\n] 2006.229.15:47:19.11#ibcon#*before write, iclass 26, count 0 2006.229.15:47:19.11#ibcon#enter sib2, iclass 26, count 0 2006.229.15:47:19.11#ibcon#flushed, iclass 26, count 0 2006.229.15:47:19.11#ibcon#about to write, iclass 26, count 0 2006.229.15:47:19.11#ibcon#wrote, iclass 26, count 0 2006.229.15:47:19.11#ibcon#about to read 3, iclass 26, count 0 2006.229.15:47:19.14#ibcon#read 3, iclass 26, count 0 2006.229.15:47:19.14#ibcon#about to read 4, iclass 26, count 0 2006.229.15:47:19.14#ibcon#read 4, iclass 26, count 0 2006.229.15:47:19.14#ibcon#about to read 5, iclass 26, count 0 2006.229.15:47:19.14#ibcon#read 5, iclass 26, count 0 2006.229.15:47:19.14#ibcon#about to read 6, iclass 26, count 0 2006.229.15:47:19.14#ibcon#read 6, iclass 26, count 0 2006.229.15:47:19.14#ibcon#end of sib2, iclass 26, count 0 2006.229.15:47:19.14#ibcon#*after write, iclass 26, count 0 2006.229.15:47:19.14#ibcon#*before return 0, iclass 26, count 0 2006.229.15:47:19.14#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:19.14#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.15:47:19.14#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:47:19.14#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:47:19.14$vck44/vblo=8,744.99 2006.229.15:47:19.14#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.15:47:19.14#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.15:47:19.14#ibcon#ireg 17 cls_cnt 0 2006.229.15:47:19.14#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:19.14#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:19.14#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:19.14#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:47:19.14#ibcon#first serial, iclass 28, count 0 2006.229.15:47:19.14#ibcon#enter sib2, iclass 28, count 0 2006.229.15:47:19.14#ibcon#flushed, iclass 28, count 0 2006.229.15:47:19.14#ibcon#about to write, iclass 28, count 0 2006.229.15:47:19.14#ibcon#wrote, iclass 28, count 0 2006.229.15:47:19.14#ibcon#about to read 3, iclass 28, count 0 2006.229.15:47:19.16#ibcon#read 3, iclass 28, count 0 2006.229.15:47:19.16#ibcon#about to read 4, iclass 28, count 0 2006.229.15:47:19.16#ibcon#read 4, iclass 28, count 0 2006.229.15:47:19.16#ibcon#about to read 5, iclass 28, count 0 2006.229.15:47:19.16#ibcon#read 5, iclass 28, count 0 2006.229.15:47:19.16#ibcon#about to read 6, iclass 28, count 0 2006.229.15:47:19.16#ibcon#read 6, iclass 28, count 0 2006.229.15:47:19.16#ibcon#end of sib2, iclass 28, count 0 2006.229.15:47:19.16#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:47:19.16#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:47:19.16#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:47:19.16#ibcon#*before write, iclass 28, count 0 2006.229.15:47:19.16#ibcon#enter sib2, iclass 28, count 0 2006.229.15:47:19.16#ibcon#flushed, iclass 28, count 0 2006.229.15:47:19.16#ibcon#about to write, iclass 28, count 0 2006.229.15:47:19.16#ibcon#wrote, iclass 28, count 0 2006.229.15:47:19.16#ibcon#about to read 3, iclass 28, count 0 2006.229.15:47:19.20#ibcon#read 3, iclass 28, count 0 2006.229.15:47:19.20#ibcon#about to read 4, iclass 28, count 0 2006.229.15:47:19.20#ibcon#read 4, iclass 28, count 0 2006.229.15:47:19.20#ibcon#about to read 5, iclass 28, count 0 2006.229.15:47:19.20#ibcon#read 5, iclass 28, count 0 2006.229.15:47:19.20#ibcon#about to read 6, iclass 28, count 0 2006.229.15:47:19.20#ibcon#read 6, iclass 28, count 0 2006.229.15:47:19.20#ibcon#end of sib2, iclass 28, count 0 2006.229.15:47:19.20#ibcon#*after write, iclass 28, count 0 2006.229.15:47:19.20#ibcon#*before return 0, iclass 28, count 0 2006.229.15:47:19.20#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:19.20#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.15:47:19.20#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:47:19.20#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:47:19.20$vck44/vb=8,4 2006.229.15:47:19.20#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.15:47:19.20#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.15:47:19.20#ibcon#ireg 11 cls_cnt 2 2006.229.15:47:19.20#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:19.26#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:19.26#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:19.26#ibcon#enter wrdev, iclass 30, count 2 2006.229.15:47:19.26#ibcon#first serial, iclass 30, count 2 2006.229.15:47:19.26#ibcon#enter sib2, iclass 30, count 2 2006.229.15:47:19.26#ibcon#flushed, iclass 30, count 2 2006.229.15:47:19.26#ibcon#about to write, iclass 30, count 2 2006.229.15:47:19.26#ibcon#wrote, iclass 30, count 2 2006.229.15:47:19.26#ibcon#about to read 3, iclass 30, count 2 2006.229.15:47:19.28#ibcon#read 3, iclass 30, count 2 2006.229.15:47:19.28#ibcon#about to read 4, iclass 30, count 2 2006.229.15:47:19.28#ibcon#read 4, iclass 30, count 2 2006.229.15:47:19.28#ibcon#about to read 5, iclass 30, count 2 2006.229.15:47:19.28#ibcon#read 5, iclass 30, count 2 2006.229.15:47:19.28#ibcon#about to read 6, iclass 30, count 2 2006.229.15:47:19.28#ibcon#read 6, iclass 30, count 2 2006.229.15:47:19.28#ibcon#end of sib2, iclass 30, count 2 2006.229.15:47:19.28#ibcon#*mode == 0, iclass 30, count 2 2006.229.15:47:19.28#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.15:47:19.28#ibcon#[27=AT08-04\r\n] 2006.229.15:47:19.28#ibcon#*before write, iclass 30, count 2 2006.229.15:47:19.28#ibcon#enter sib2, iclass 30, count 2 2006.229.15:47:19.28#ibcon#flushed, iclass 30, count 2 2006.229.15:47:19.28#ibcon#about to write, iclass 30, count 2 2006.229.15:47:19.28#ibcon#wrote, iclass 30, count 2 2006.229.15:47:19.28#ibcon#about to read 3, iclass 30, count 2 2006.229.15:47:19.31#ibcon#read 3, iclass 30, count 2 2006.229.15:47:19.31#ibcon#about to read 4, iclass 30, count 2 2006.229.15:47:19.31#ibcon#read 4, iclass 30, count 2 2006.229.15:47:19.31#ibcon#about to read 5, iclass 30, count 2 2006.229.15:47:19.31#ibcon#read 5, iclass 30, count 2 2006.229.15:47:19.31#ibcon#about to read 6, iclass 30, count 2 2006.229.15:47:19.31#ibcon#read 6, iclass 30, count 2 2006.229.15:47:19.31#ibcon#end of sib2, iclass 30, count 2 2006.229.15:47:19.31#ibcon#*after write, iclass 30, count 2 2006.229.15:47:19.31#ibcon#*before return 0, iclass 30, count 2 2006.229.15:47:19.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:19.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.15:47:19.31#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.15:47:19.31#ibcon#ireg 7 cls_cnt 0 2006.229.15:47:19.31#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:19.43#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:19.43#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:19.43#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:47:19.43#ibcon#first serial, iclass 30, count 0 2006.229.15:47:19.43#ibcon#enter sib2, iclass 30, count 0 2006.229.15:47:19.43#ibcon#flushed, iclass 30, count 0 2006.229.15:47:19.43#ibcon#about to write, iclass 30, count 0 2006.229.15:47:19.43#ibcon#wrote, iclass 30, count 0 2006.229.15:47:19.43#ibcon#about to read 3, iclass 30, count 0 2006.229.15:47:19.45#ibcon#read 3, iclass 30, count 0 2006.229.15:47:19.45#ibcon#about to read 4, iclass 30, count 0 2006.229.15:47:19.45#ibcon#read 4, iclass 30, count 0 2006.229.15:47:19.45#ibcon#about to read 5, iclass 30, count 0 2006.229.15:47:19.45#ibcon#read 5, iclass 30, count 0 2006.229.15:47:19.45#ibcon#about to read 6, iclass 30, count 0 2006.229.15:47:19.45#ibcon#read 6, iclass 30, count 0 2006.229.15:47:19.45#ibcon#end of sib2, iclass 30, count 0 2006.229.15:47:19.45#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:47:19.45#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:47:19.45#ibcon#[27=USB\r\n] 2006.229.15:47:19.45#ibcon#*before write, iclass 30, count 0 2006.229.15:47:19.45#ibcon#enter sib2, iclass 30, count 0 2006.229.15:47:19.45#ibcon#flushed, iclass 30, count 0 2006.229.15:47:19.45#ibcon#about to write, iclass 30, count 0 2006.229.15:47:19.45#ibcon#wrote, iclass 30, count 0 2006.229.15:47:19.45#ibcon#about to read 3, iclass 30, count 0 2006.229.15:47:19.48#ibcon#read 3, iclass 30, count 0 2006.229.15:47:19.48#ibcon#about to read 4, iclass 30, count 0 2006.229.15:47:19.48#ibcon#read 4, iclass 30, count 0 2006.229.15:47:19.48#ibcon#about to read 5, iclass 30, count 0 2006.229.15:47:19.48#ibcon#read 5, iclass 30, count 0 2006.229.15:47:19.48#ibcon#about to read 6, iclass 30, count 0 2006.229.15:47:19.48#ibcon#read 6, iclass 30, count 0 2006.229.15:47:19.48#ibcon#end of sib2, iclass 30, count 0 2006.229.15:47:19.48#ibcon#*after write, iclass 30, count 0 2006.229.15:47:19.48#ibcon#*before return 0, iclass 30, count 0 2006.229.15:47:19.48#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:19.48#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.15:47:19.48#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:47:19.48#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:47:19.48$vck44/vabw=wide 2006.229.15:47:19.48#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.15:47:19.48#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.15:47:19.48#ibcon#ireg 8 cls_cnt 0 2006.229.15:47:19.48#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:19.48#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:19.48#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:19.48#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:47:19.48#ibcon#first serial, iclass 32, count 0 2006.229.15:47:19.48#ibcon#enter sib2, iclass 32, count 0 2006.229.15:47:19.48#ibcon#flushed, iclass 32, count 0 2006.229.15:47:19.48#ibcon#about to write, iclass 32, count 0 2006.229.15:47:19.48#ibcon#wrote, iclass 32, count 0 2006.229.15:47:19.48#ibcon#about to read 3, iclass 32, count 0 2006.229.15:47:19.50#ibcon#read 3, iclass 32, count 0 2006.229.15:47:19.50#ibcon#about to read 4, iclass 32, count 0 2006.229.15:47:19.50#ibcon#read 4, iclass 32, count 0 2006.229.15:47:19.50#ibcon#about to read 5, iclass 32, count 0 2006.229.15:47:19.50#ibcon#read 5, iclass 32, count 0 2006.229.15:47:19.50#ibcon#about to read 6, iclass 32, count 0 2006.229.15:47:19.50#ibcon#read 6, iclass 32, count 0 2006.229.15:47:19.50#ibcon#end of sib2, iclass 32, count 0 2006.229.15:47:19.50#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:47:19.50#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:47:19.50#ibcon#[25=BW32\r\n] 2006.229.15:47:19.50#ibcon#*before write, iclass 32, count 0 2006.229.15:47:19.50#ibcon#enter sib2, iclass 32, count 0 2006.229.15:47:19.50#ibcon#flushed, iclass 32, count 0 2006.229.15:47:19.50#ibcon#about to write, iclass 32, count 0 2006.229.15:47:19.50#ibcon#wrote, iclass 32, count 0 2006.229.15:47:19.50#ibcon#about to read 3, iclass 32, count 0 2006.229.15:47:19.53#ibcon#read 3, iclass 32, count 0 2006.229.15:47:19.53#ibcon#about to read 4, iclass 32, count 0 2006.229.15:47:19.53#ibcon#read 4, iclass 32, count 0 2006.229.15:47:19.53#ibcon#about to read 5, iclass 32, count 0 2006.229.15:47:19.53#ibcon#read 5, iclass 32, count 0 2006.229.15:47:19.53#ibcon#about to read 6, iclass 32, count 0 2006.229.15:47:19.53#ibcon#read 6, iclass 32, count 0 2006.229.15:47:19.53#ibcon#end of sib2, iclass 32, count 0 2006.229.15:47:19.53#ibcon#*after write, iclass 32, count 0 2006.229.15:47:19.53#ibcon#*before return 0, iclass 32, count 0 2006.229.15:47:19.53#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:19.53#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.15:47:19.53#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:47:19.53#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:47:19.53$vck44/vbbw=wide 2006.229.15:47:19.53#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:47:19.53#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:47:19.53#ibcon#ireg 8 cls_cnt 0 2006.229.15:47:19.53#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:47:19.60#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:47:19.60#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:47:19.60#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:47:19.60#ibcon#first serial, iclass 34, count 0 2006.229.15:47:19.60#ibcon#enter sib2, iclass 34, count 0 2006.229.15:47:19.60#ibcon#flushed, iclass 34, count 0 2006.229.15:47:19.60#ibcon#about to write, iclass 34, count 0 2006.229.15:47:19.60#ibcon#wrote, iclass 34, count 0 2006.229.15:47:19.60#ibcon#about to read 3, iclass 34, count 0 2006.229.15:47:19.62#ibcon#read 3, iclass 34, count 0 2006.229.15:47:19.62#ibcon#about to read 4, iclass 34, count 0 2006.229.15:47:19.62#ibcon#read 4, iclass 34, count 0 2006.229.15:47:19.62#ibcon#about to read 5, iclass 34, count 0 2006.229.15:47:19.62#ibcon#read 5, iclass 34, count 0 2006.229.15:47:19.62#ibcon#about to read 6, iclass 34, count 0 2006.229.15:47:19.62#ibcon#read 6, iclass 34, count 0 2006.229.15:47:19.62#ibcon#end of sib2, iclass 34, count 0 2006.229.15:47:19.62#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:47:19.62#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:47:19.62#ibcon#[27=BW32\r\n] 2006.229.15:47:19.62#ibcon#*before write, iclass 34, count 0 2006.229.15:47:19.62#ibcon#enter sib2, iclass 34, count 0 2006.229.15:47:19.62#ibcon#flushed, iclass 34, count 0 2006.229.15:47:19.62#ibcon#about to write, iclass 34, count 0 2006.229.15:47:19.62#ibcon#wrote, iclass 34, count 0 2006.229.15:47:19.62#ibcon#about to read 3, iclass 34, count 0 2006.229.15:47:19.65#ibcon#read 3, iclass 34, count 0 2006.229.15:47:19.65#ibcon#about to read 4, iclass 34, count 0 2006.229.15:47:19.65#ibcon#read 4, iclass 34, count 0 2006.229.15:47:19.65#ibcon#about to read 5, iclass 34, count 0 2006.229.15:47:19.65#ibcon#read 5, iclass 34, count 0 2006.229.15:47:19.65#ibcon#about to read 6, iclass 34, count 0 2006.229.15:47:19.65#ibcon#read 6, iclass 34, count 0 2006.229.15:47:19.65#ibcon#end of sib2, iclass 34, count 0 2006.229.15:47:19.65#ibcon#*after write, iclass 34, count 0 2006.229.15:47:19.65#ibcon#*before return 0, iclass 34, count 0 2006.229.15:47:19.65#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:47:19.65#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:47:19.65#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:47:19.65#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:47:19.65$setupk4/ifdk4 2006.229.15:47:19.65$ifdk4/lo= 2006.229.15:47:19.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:47:19.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:47:19.65$ifdk4/patch= 2006.229.15:47:19.65$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:47:19.65$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:47:19.65$setupk4/!*+20s 2006.229.15:47:20.31#abcon#<5=/07 1.2 1.9 27.221001001.8\r\n> 2006.229.15:47:20.33#abcon#{5=INTERFACE CLEAR} 2006.229.15:47:20.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:47:30.48#abcon#<5=/06 1.2 1.9 27.221001001.8\r\n> 2006.229.15:47:30.50#abcon#{5=INTERFACE CLEAR} 2006.229.15:47:30.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:47:34.15$setupk4/"tpicd 2006.229.15:47:34.15$setupk4/echo=off 2006.229.15:47:34.15$setupk4/xlog=off 2006.229.15:47:34.15:!2006.229.15:51:00 2006.229.15:47:38.14#trakl#Source acquired 2006.229.15:47:40.14#flagr#flagr/antenna,acquired 2006.229.15:51:00.00:preob 2006.229.15:51:00.13/onsource/TRACKING 2006.229.15:51:00.13:!2006.229.15:51:10 2006.229.15:51:10.00:"tape 2006.229.15:51:10.00:"st=record 2006.229.15:51:10.00:data_valid=on 2006.229.15:51:10.00:midob 2006.229.15:51:10.13/onsource/TRACKING 2006.229.15:51:10.13/wx/27.20,1001.8,100 2006.229.15:51:10.23/cable/+6.4153E-03 2006.229.15:51:11.32/va/01,08,usb,yes,38,41 2006.229.15:51:11.32/va/02,07,usb,yes,42,42 2006.229.15:51:11.32/va/03,06,usb,yes,51,54 2006.229.15:51:11.32/va/04,07,usb,yes,43,45 2006.229.15:51:11.32/va/05,04,usb,yes,38,39 2006.229.15:51:11.32/va/06,04,usb,yes,43,42 2006.229.15:51:11.32/va/07,05,usb,yes,38,39 2006.229.15:51:11.32/va/08,06,usb,yes,28,34 2006.229.15:51:11.55/valo/01,524.99,yes,locked 2006.229.15:51:11.55/valo/02,534.99,yes,locked 2006.229.15:51:11.55/valo/03,564.99,yes,locked 2006.229.15:51:11.55/valo/04,624.99,yes,locked 2006.229.15:51:11.55/valo/05,734.99,yes,locked 2006.229.15:51:11.55/valo/06,814.99,yes,locked 2006.229.15:51:11.55/valo/07,864.99,yes,locked 2006.229.15:51:11.55/valo/08,884.99,yes,locked 2006.229.15:51:12.64/vb/01,04,usb,yes,36,33 2006.229.15:51:12.64/vb/02,04,usb,yes,38,38 2006.229.15:51:12.64/vb/03,04,usb,yes,35,38 2006.229.15:51:12.64/vb/04,04,usb,yes,40,39 2006.229.15:51:12.64/vb/05,04,usb,yes,31,34 2006.229.15:51:12.64/vb/06,04,usb,yes,37,32 2006.229.15:51:12.64/vb/07,04,usb,yes,36,36 2006.229.15:51:12.64/vb/08,04,usb,yes,33,37 2006.229.15:51:12.87/vblo/01,629.99,yes,locked 2006.229.15:51:12.87/vblo/02,634.99,yes,locked 2006.229.15:51:12.87/vblo/03,649.99,yes,locked 2006.229.15:51:12.87/vblo/04,679.99,yes,locked 2006.229.15:51:12.87/vblo/05,709.99,yes,locked 2006.229.15:51:12.87/vblo/06,719.99,yes,locked 2006.229.15:51:12.87/vblo/07,734.99,yes,locked 2006.229.15:51:12.87/vblo/08,744.99,yes,locked 2006.229.15:51:13.02/vabw/8 2006.229.15:51:13.17/vbbw/8 2006.229.15:51:13.26/xfe/off,on,12.2 2006.229.15:51:13.64/ifatt/23,28,28,28 2006.229.15:51:14.08/fmout-gps/S +4.52E-07 2006.229.15:51:14.12:!2006.229.15:51:50 2006.229.15:51:50.00:data_valid=off 2006.229.15:51:50.00:"et 2006.229.15:51:50.00:!+3s 2006.229.15:51:53.01:"tape 2006.229.15:51:53.01:postob 2006.229.15:51:53.18/cable/+6.4145E-03 2006.229.15:51:53.18/wx/27.19,1001.8,100 2006.229.15:51:54.08/fmout-gps/S +4.50E-07 2006.229.15:51:54.08:scan_name=229-1554,jd0608,160 2006.229.15:51:54.08:source=2201+315,220314.98,314538.3,2000.0,ccw 2006.229.15:51:55.13#flagr#flagr/antenna,new-source 2006.229.15:51:55.13:checkk5 2006.229.15:51:55.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:51:55.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:51:56.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:51:56.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:51:57.11/chk_obsdata//k5ts1/T2291551??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:51:57.50/chk_obsdata//k5ts2/T2291551??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:51:57.91/chk_obsdata//k5ts3/T2291551??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:51:58.31/chk_obsdata//k5ts4/T2291551??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.15:51:59.03/k5log//k5ts1_log_newline 2006.229.15:51:59.74/k5log//k5ts2_log_newline 2006.229.15:52:00.48/k5log//k5ts3_log_newline 2006.229.15:52:01.19/k5log//k5ts4_log_newline 2006.229.15:52:01.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:52:01.21:setupk4=1 2006.229.15:52:01.21$setupk4/echo=on 2006.229.15:52:01.21$setupk4/pcalon 2006.229.15:52:01.21$pcalon/"no phase cal control is implemented here 2006.229.15:52:01.21$setupk4/"tpicd=stop 2006.229.15:52:01.21$setupk4/"rec=synch_on 2006.229.15:52:01.21$setupk4/"rec_mode=128 2006.229.15:52:01.21$setupk4/!* 2006.229.15:52:01.21$setupk4/recpk4 2006.229.15:52:01.21$recpk4/recpatch= 2006.229.15:52:01.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:52:01.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:52:01.22$setupk4/vck44 2006.229.15:52:01.22$vck44/valo=1,524.99 2006.229.15:52:01.22#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.15:52:01.22#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.15:52:01.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:01.22#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:01.22#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:01.22#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:01.22#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:52:01.22#ibcon#first serial, iclass 5, count 0 2006.229.15:52:01.22#ibcon#enter sib2, iclass 5, count 0 2006.229.15:52:01.22#ibcon#flushed, iclass 5, count 0 2006.229.15:52:01.22#ibcon#about to write, iclass 5, count 0 2006.229.15:52:01.22#ibcon#wrote, iclass 5, count 0 2006.229.15:52:01.22#ibcon#about to read 3, iclass 5, count 0 2006.229.15:52:01.24#ibcon#read 3, iclass 5, count 0 2006.229.15:52:01.24#ibcon#about to read 4, iclass 5, count 0 2006.229.15:52:01.24#ibcon#read 4, iclass 5, count 0 2006.229.15:52:01.24#ibcon#about to read 5, iclass 5, count 0 2006.229.15:52:01.24#ibcon#read 5, iclass 5, count 0 2006.229.15:52:01.24#ibcon#about to read 6, iclass 5, count 0 2006.229.15:52:01.24#ibcon#read 6, iclass 5, count 0 2006.229.15:52:01.24#ibcon#end of sib2, iclass 5, count 0 2006.229.15:52:01.24#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:52:01.24#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:52:01.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:52:01.24#ibcon#*before write, iclass 5, count 0 2006.229.15:52:01.24#ibcon#enter sib2, iclass 5, count 0 2006.229.15:52:01.24#ibcon#flushed, iclass 5, count 0 2006.229.15:52:01.24#ibcon#about to write, iclass 5, count 0 2006.229.15:52:01.24#ibcon#wrote, iclass 5, count 0 2006.229.15:52:01.24#ibcon#about to read 3, iclass 5, count 0 2006.229.15:52:01.29#ibcon#read 3, iclass 5, count 0 2006.229.15:52:01.29#ibcon#about to read 4, iclass 5, count 0 2006.229.15:52:01.29#ibcon#read 4, iclass 5, count 0 2006.229.15:52:01.29#ibcon#about to read 5, iclass 5, count 0 2006.229.15:52:01.29#ibcon#read 5, iclass 5, count 0 2006.229.15:52:01.29#ibcon#about to read 6, iclass 5, count 0 2006.229.15:52:01.29#ibcon#read 6, iclass 5, count 0 2006.229.15:52:01.29#ibcon#end of sib2, iclass 5, count 0 2006.229.15:52:01.29#ibcon#*after write, iclass 5, count 0 2006.229.15:52:01.29#ibcon#*before return 0, iclass 5, count 0 2006.229.15:52:01.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:01.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:01.29#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:52:01.29#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:52:01.29$vck44/va=1,8 2006.229.15:52:01.29#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.15:52:01.29#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.15:52:01.29#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:01.29#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:01.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:01.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:01.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.15:52:01.29#ibcon#first serial, iclass 7, count 2 2006.229.15:52:01.29#ibcon#enter sib2, iclass 7, count 2 2006.229.15:52:01.29#ibcon#flushed, iclass 7, count 2 2006.229.15:52:01.29#ibcon#about to write, iclass 7, count 2 2006.229.15:52:01.29#ibcon#wrote, iclass 7, count 2 2006.229.15:52:01.29#ibcon#about to read 3, iclass 7, count 2 2006.229.15:52:01.31#ibcon#read 3, iclass 7, count 2 2006.229.15:52:01.31#ibcon#about to read 4, iclass 7, count 2 2006.229.15:52:01.31#ibcon#read 4, iclass 7, count 2 2006.229.15:52:01.31#ibcon#about to read 5, iclass 7, count 2 2006.229.15:52:01.31#ibcon#read 5, iclass 7, count 2 2006.229.15:52:01.31#ibcon#about to read 6, iclass 7, count 2 2006.229.15:52:01.31#ibcon#read 6, iclass 7, count 2 2006.229.15:52:01.31#ibcon#end of sib2, iclass 7, count 2 2006.229.15:52:01.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.15:52:01.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.15:52:01.31#ibcon#[25=AT01-08\r\n] 2006.229.15:52:01.31#ibcon#*before write, iclass 7, count 2 2006.229.15:52:01.31#ibcon#enter sib2, iclass 7, count 2 2006.229.15:52:01.31#ibcon#flushed, iclass 7, count 2 2006.229.15:52:01.31#ibcon#about to write, iclass 7, count 2 2006.229.15:52:01.31#ibcon#wrote, iclass 7, count 2 2006.229.15:52:01.31#ibcon#about to read 3, iclass 7, count 2 2006.229.15:52:01.34#ibcon#read 3, iclass 7, count 2 2006.229.15:52:01.34#ibcon#about to read 4, iclass 7, count 2 2006.229.15:52:01.34#ibcon#read 4, iclass 7, count 2 2006.229.15:52:01.34#ibcon#about to read 5, iclass 7, count 2 2006.229.15:52:01.34#ibcon#read 5, iclass 7, count 2 2006.229.15:52:01.34#ibcon#about to read 6, iclass 7, count 2 2006.229.15:52:01.34#ibcon#read 6, iclass 7, count 2 2006.229.15:52:01.34#ibcon#end of sib2, iclass 7, count 2 2006.229.15:52:01.34#ibcon#*after write, iclass 7, count 2 2006.229.15:52:01.34#ibcon#*before return 0, iclass 7, count 2 2006.229.15:52:01.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:01.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:01.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.15:52:01.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:01.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:01.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:01.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:01.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:52:01.46#ibcon#first serial, iclass 7, count 0 2006.229.15:52:01.46#ibcon#enter sib2, iclass 7, count 0 2006.229.15:52:01.46#ibcon#flushed, iclass 7, count 0 2006.229.15:52:01.46#ibcon#about to write, iclass 7, count 0 2006.229.15:52:01.46#ibcon#wrote, iclass 7, count 0 2006.229.15:52:01.46#ibcon#about to read 3, iclass 7, count 0 2006.229.15:52:01.48#ibcon#read 3, iclass 7, count 0 2006.229.15:52:01.48#ibcon#about to read 4, iclass 7, count 0 2006.229.15:52:01.48#ibcon#read 4, iclass 7, count 0 2006.229.15:52:01.48#ibcon#about to read 5, iclass 7, count 0 2006.229.15:52:01.48#ibcon#read 5, iclass 7, count 0 2006.229.15:52:01.48#ibcon#about to read 6, iclass 7, count 0 2006.229.15:52:01.48#ibcon#read 6, iclass 7, count 0 2006.229.15:52:01.48#ibcon#end of sib2, iclass 7, count 0 2006.229.15:52:01.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:52:01.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:52:01.48#ibcon#[25=USB\r\n] 2006.229.15:52:01.48#ibcon#*before write, iclass 7, count 0 2006.229.15:52:01.48#ibcon#enter sib2, iclass 7, count 0 2006.229.15:52:01.48#ibcon#flushed, iclass 7, count 0 2006.229.15:52:01.48#ibcon#about to write, iclass 7, count 0 2006.229.15:52:01.48#ibcon#wrote, iclass 7, count 0 2006.229.15:52:01.48#ibcon#about to read 3, iclass 7, count 0 2006.229.15:52:01.51#ibcon#read 3, iclass 7, count 0 2006.229.15:52:01.51#ibcon#about to read 4, iclass 7, count 0 2006.229.15:52:01.51#ibcon#read 4, iclass 7, count 0 2006.229.15:52:01.51#ibcon#about to read 5, iclass 7, count 0 2006.229.15:52:01.51#ibcon#read 5, iclass 7, count 0 2006.229.15:52:01.51#ibcon#about to read 6, iclass 7, count 0 2006.229.15:52:01.51#ibcon#read 6, iclass 7, count 0 2006.229.15:52:01.51#ibcon#end of sib2, iclass 7, count 0 2006.229.15:52:01.51#ibcon#*after write, iclass 7, count 0 2006.229.15:52:01.51#ibcon#*before return 0, iclass 7, count 0 2006.229.15:52:01.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:01.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:01.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:52:01.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:52:01.51$vck44/valo=2,534.99 2006.229.15:52:01.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.15:52:01.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.15:52:01.51#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:01.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:01.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:01.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:01.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:52:01.51#ibcon#first serial, iclass 11, count 0 2006.229.15:52:01.51#ibcon#enter sib2, iclass 11, count 0 2006.229.15:52:01.51#ibcon#flushed, iclass 11, count 0 2006.229.15:52:01.51#ibcon#about to write, iclass 11, count 0 2006.229.15:52:01.51#ibcon#wrote, iclass 11, count 0 2006.229.15:52:01.51#ibcon#about to read 3, iclass 11, count 0 2006.229.15:52:01.53#ibcon#read 3, iclass 11, count 0 2006.229.15:52:01.53#ibcon#about to read 4, iclass 11, count 0 2006.229.15:52:01.53#ibcon#read 4, iclass 11, count 0 2006.229.15:52:01.53#ibcon#about to read 5, iclass 11, count 0 2006.229.15:52:01.53#ibcon#read 5, iclass 11, count 0 2006.229.15:52:01.53#ibcon#about to read 6, iclass 11, count 0 2006.229.15:52:01.53#ibcon#read 6, iclass 11, count 0 2006.229.15:52:01.53#ibcon#end of sib2, iclass 11, count 0 2006.229.15:52:01.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:52:01.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:52:01.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:52:01.53#ibcon#*before write, iclass 11, count 0 2006.229.15:52:01.53#ibcon#enter sib2, iclass 11, count 0 2006.229.15:52:01.53#ibcon#flushed, iclass 11, count 0 2006.229.15:52:01.53#ibcon#about to write, iclass 11, count 0 2006.229.15:52:01.53#ibcon#wrote, iclass 11, count 0 2006.229.15:52:01.53#ibcon#about to read 3, iclass 11, count 0 2006.229.15:52:01.57#ibcon#read 3, iclass 11, count 0 2006.229.15:52:01.57#ibcon#about to read 4, iclass 11, count 0 2006.229.15:52:01.57#ibcon#read 4, iclass 11, count 0 2006.229.15:52:01.57#ibcon#about to read 5, iclass 11, count 0 2006.229.15:52:01.57#ibcon#read 5, iclass 11, count 0 2006.229.15:52:01.57#ibcon#about to read 6, iclass 11, count 0 2006.229.15:52:01.57#ibcon#read 6, iclass 11, count 0 2006.229.15:52:01.57#ibcon#end of sib2, iclass 11, count 0 2006.229.15:52:01.57#ibcon#*after write, iclass 11, count 0 2006.229.15:52:01.57#ibcon#*before return 0, iclass 11, count 0 2006.229.15:52:01.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:01.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:01.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:52:01.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:52:01.57$vck44/va=2,7 2006.229.15:52:01.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.15:52:01.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.15:52:01.57#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:01.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:01.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:01.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:01.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.15:52:01.63#ibcon#first serial, iclass 13, count 2 2006.229.15:52:01.63#ibcon#enter sib2, iclass 13, count 2 2006.229.15:52:01.63#ibcon#flushed, iclass 13, count 2 2006.229.15:52:01.63#ibcon#about to write, iclass 13, count 2 2006.229.15:52:01.63#ibcon#wrote, iclass 13, count 2 2006.229.15:52:01.63#ibcon#about to read 3, iclass 13, count 2 2006.229.15:52:01.65#ibcon#read 3, iclass 13, count 2 2006.229.15:52:01.65#ibcon#about to read 4, iclass 13, count 2 2006.229.15:52:01.65#ibcon#read 4, iclass 13, count 2 2006.229.15:52:01.65#ibcon#about to read 5, iclass 13, count 2 2006.229.15:52:01.65#ibcon#read 5, iclass 13, count 2 2006.229.15:52:01.65#ibcon#about to read 6, iclass 13, count 2 2006.229.15:52:01.65#ibcon#read 6, iclass 13, count 2 2006.229.15:52:01.65#ibcon#end of sib2, iclass 13, count 2 2006.229.15:52:01.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.15:52:01.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.15:52:01.65#ibcon#[25=AT02-07\r\n] 2006.229.15:52:01.65#ibcon#*before write, iclass 13, count 2 2006.229.15:52:01.65#ibcon#enter sib2, iclass 13, count 2 2006.229.15:52:01.65#ibcon#flushed, iclass 13, count 2 2006.229.15:52:01.65#ibcon#about to write, iclass 13, count 2 2006.229.15:52:01.65#ibcon#wrote, iclass 13, count 2 2006.229.15:52:01.65#ibcon#about to read 3, iclass 13, count 2 2006.229.15:52:01.68#ibcon#read 3, iclass 13, count 2 2006.229.15:52:01.68#ibcon#about to read 4, iclass 13, count 2 2006.229.15:52:01.68#ibcon#read 4, iclass 13, count 2 2006.229.15:52:01.68#ibcon#about to read 5, iclass 13, count 2 2006.229.15:52:01.68#ibcon#read 5, iclass 13, count 2 2006.229.15:52:01.68#ibcon#about to read 6, iclass 13, count 2 2006.229.15:52:01.68#ibcon#read 6, iclass 13, count 2 2006.229.15:52:01.68#ibcon#end of sib2, iclass 13, count 2 2006.229.15:52:01.68#ibcon#*after write, iclass 13, count 2 2006.229.15:52:01.68#ibcon#*before return 0, iclass 13, count 2 2006.229.15:52:01.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:01.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:01.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.15:52:01.68#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:01.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:01.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:01.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:01.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:52:01.80#ibcon#first serial, iclass 13, count 0 2006.229.15:52:01.80#ibcon#enter sib2, iclass 13, count 0 2006.229.15:52:01.80#ibcon#flushed, iclass 13, count 0 2006.229.15:52:01.80#ibcon#about to write, iclass 13, count 0 2006.229.15:52:01.80#ibcon#wrote, iclass 13, count 0 2006.229.15:52:01.80#ibcon#about to read 3, iclass 13, count 0 2006.229.15:52:01.82#ibcon#read 3, iclass 13, count 0 2006.229.15:52:01.82#ibcon#about to read 4, iclass 13, count 0 2006.229.15:52:01.82#ibcon#read 4, iclass 13, count 0 2006.229.15:52:01.82#ibcon#about to read 5, iclass 13, count 0 2006.229.15:52:01.82#ibcon#read 5, iclass 13, count 0 2006.229.15:52:01.82#ibcon#about to read 6, iclass 13, count 0 2006.229.15:52:01.82#ibcon#read 6, iclass 13, count 0 2006.229.15:52:01.82#ibcon#end of sib2, iclass 13, count 0 2006.229.15:52:01.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:52:01.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:52:01.82#ibcon#[25=USB\r\n] 2006.229.15:52:01.82#ibcon#*before write, iclass 13, count 0 2006.229.15:52:01.82#ibcon#enter sib2, iclass 13, count 0 2006.229.15:52:01.82#ibcon#flushed, iclass 13, count 0 2006.229.15:52:01.82#ibcon#about to write, iclass 13, count 0 2006.229.15:52:01.82#ibcon#wrote, iclass 13, count 0 2006.229.15:52:01.82#ibcon#about to read 3, iclass 13, count 0 2006.229.15:52:01.85#ibcon#read 3, iclass 13, count 0 2006.229.15:52:01.85#ibcon#about to read 4, iclass 13, count 0 2006.229.15:52:01.85#ibcon#read 4, iclass 13, count 0 2006.229.15:52:01.85#ibcon#about to read 5, iclass 13, count 0 2006.229.15:52:01.85#ibcon#read 5, iclass 13, count 0 2006.229.15:52:01.85#ibcon#about to read 6, iclass 13, count 0 2006.229.15:52:01.85#ibcon#read 6, iclass 13, count 0 2006.229.15:52:01.85#ibcon#end of sib2, iclass 13, count 0 2006.229.15:52:01.85#ibcon#*after write, iclass 13, count 0 2006.229.15:52:01.85#ibcon#*before return 0, iclass 13, count 0 2006.229.15:52:01.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:01.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:01.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:52:01.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:52:01.85$vck44/valo=3,564.99 2006.229.15:52:01.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:52:01.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:52:01.85#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:01.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:01.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:01.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:01.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:52:01.85#ibcon#first serial, iclass 15, count 0 2006.229.15:52:01.85#ibcon#enter sib2, iclass 15, count 0 2006.229.15:52:01.85#ibcon#flushed, iclass 15, count 0 2006.229.15:52:01.85#ibcon#about to write, iclass 15, count 0 2006.229.15:52:01.85#ibcon#wrote, iclass 15, count 0 2006.229.15:52:01.85#ibcon#about to read 3, iclass 15, count 0 2006.229.15:52:01.87#ibcon#read 3, iclass 15, count 0 2006.229.15:52:01.87#ibcon#about to read 4, iclass 15, count 0 2006.229.15:52:01.87#ibcon#read 4, iclass 15, count 0 2006.229.15:52:01.87#ibcon#about to read 5, iclass 15, count 0 2006.229.15:52:01.87#ibcon#read 5, iclass 15, count 0 2006.229.15:52:01.87#ibcon#about to read 6, iclass 15, count 0 2006.229.15:52:01.87#ibcon#read 6, iclass 15, count 0 2006.229.15:52:01.87#ibcon#end of sib2, iclass 15, count 0 2006.229.15:52:01.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:52:01.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:52:01.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:52:01.87#ibcon#*before write, iclass 15, count 0 2006.229.15:52:01.87#ibcon#enter sib2, iclass 15, count 0 2006.229.15:52:01.87#ibcon#flushed, iclass 15, count 0 2006.229.15:52:01.87#ibcon#about to write, iclass 15, count 0 2006.229.15:52:01.87#ibcon#wrote, iclass 15, count 0 2006.229.15:52:01.87#ibcon#about to read 3, iclass 15, count 0 2006.229.15:52:01.91#ibcon#read 3, iclass 15, count 0 2006.229.15:52:01.91#ibcon#about to read 4, iclass 15, count 0 2006.229.15:52:01.91#ibcon#read 4, iclass 15, count 0 2006.229.15:52:01.91#ibcon#about to read 5, iclass 15, count 0 2006.229.15:52:01.91#ibcon#read 5, iclass 15, count 0 2006.229.15:52:01.91#ibcon#about to read 6, iclass 15, count 0 2006.229.15:52:01.91#ibcon#read 6, iclass 15, count 0 2006.229.15:52:01.91#ibcon#end of sib2, iclass 15, count 0 2006.229.15:52:01.91#ibcon#*after write, iclass 15, count 0 2006.229.15:52:01.91#ibcon#*before return 0, iclass 15, count 0 2006.229.15:52:01.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:01.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:01.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:52:01.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:52:01.91$vck44/va=3,6 2006.229.15:52:01.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.15:52:01.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.15:52:01.91#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:01.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:01.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:01.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:01.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.15:52:01.97#ibcon#first serial, iclass 17, count 2 2006.229.15:52:01.97#ibcon#enter sib2, iclass 17, count 2 2006.229.15:52:01.97#ibcon#flushed, iclass 17, count 2 2006.229.15:52:01.97#ibcon#about to write, iclass 17, count 2 2006.229.15:52:01.97#ibcon#wrote, iclass 17, count 2 2006.229.15:52:01.97#ibcon#about to read 3, iclass 17, count 2 2006.229.15:52:01.99#ibcon#read 3, iclass 17, count 2 2006.229.15:52:01.99#ibcon#about to read 4, iclass 17, count 2 2006.229.15:52:01.99#ibcon#read 4, iclass 17, count 2 2006.229.15:52:01.99#ibcon#about to read 5, iclass 17, count 2 2006.229.15:52:01.99#ibcon#read 5, iclass 17, count 2 2006.229.15:52:01.99#ibcon#about to read 6, iclass 17, count 2 2006.229.15:52:01.99#ibcon#read 6, iclass 17, count 2 2006.229.15:52:01.99#ibcon#end of sib2, iclass 17, count 2 2006.229.15:52:01.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.15:52:01.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.15:52:01.99#ibcon#[25=AT03-06\r\n] 2006.229.15:52:01.99#ibcon#*before write, iclass 17, count 2 2006.229.15:52:01.99#ibcon#enter sib2, iclass 17, count 2 2006.229.15:52:01.99#ibcon#flushed, iclass 17, count 2 2006.229.15:52:01.99#ibcon#about to write, iclass 17, count 2 2006.229.15:52:01.99#ibcon#wrote, iclass 17, count 2 2006.229.15:52:01.99#ibcon#about to read 3, iclass 17, count 2 2006.229.15:52:02.02#ibcon#read 3, iclass 17, count 2 2006.229.15:52:02.02#ibcon#about to read 4, iclass 17, count 2 2006.229.15:52:02.02#ibcon#read 4, iclass 17, count 2 2006.229.15:52:02.02#ibcon#about to read 5, iclass 17, count 2 2006.229.15:52:02.02#ibcon#read 5, iclass 17, count 2 2006.229.15:52:02.02#ibcon#about to read 6, iclass 17, count 2 2006.229.15:52:02.02#ibcon#read 6, iclass 17, count 2 2006.229.15:52:02.02#ibcon#end of sib2, iclass 17, count 2 2006.229.15:52:02.02#ibcon#*after write, iclass 17, count 2 2006.229.15:52:02.02#ibcon#*before return 0, iclass 17, count 2 2006.229.15:52:02.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:02.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:02.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.15:52:02.02#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:02.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:02.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:02.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:02.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:52:02.14#ibcon#first serial, iclass 17, count 0 2006.229.15:52:02.14#ibcon#enter sib2, iclass 17, count 0 2006.229.15:52:02.14#ibcon#flushed, iclass 17, count 0 2006.229.15:52:02.14#ibcon#about to write, iclass 17, count 0 2006.229.15:52:02.14#ibcon#wrote, iclass 17, count 0 2006.229.15:52:02.14#ibcon#about to read 3, iclass 17, count 0 2006.229.15:52:02.16#ibcon#read 3, iclass 17, count 0 2006.229.15:52:02.16#ibcon#about to read 4, iclass 17, count 0 2006.229.15:52:02.16#ibcon#read 4, iclass 17, count 0 2006.229.15:52:02.16#ibcon#about to read 5, iclass 17, count 0 2006.229.15:52:02.16#ibcon#read 5, iclass 17, count 0 2006.229.15:52:02.16#ibcon#about to read 6, iclass 17, count 0 2006.229.15:52:02.16#ibcon#read 6, iclass 17, count 0 2006.229.15:52:02.16#ibcon#end of sib2, iclass 17, count 0 2006.229.15:52:02.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:52:02.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:52:02.16#ibcon#[25=USB\r\n] 2006.229.15:52:02.16#ibcon#*before write, iclass 17, count 0 2006.229.15:52:02.16#ibcon#enter sib2, iclass 17, count 0 2006.229.15:52:02.16#ibcon#flushed, iclass 17, count 0 2006.229.15:52:02.16#ibcon#about to write, iclass 17, count 0 2006.229.15:52:02.16#ibcon#wrote, iclass 17, count 0 2006.229.15:52:02.16#ibcon#about to read 3, iclass 17, count 0 2006.229.15:52:02.19#ibcon#read 3, iclass 17, count 0 2006.229.15:52:02.19#ibcon#about to read 4, iclass 17, count 0 2006.229.15:52:02.19#ibcon#read 4, iclass 17, count 0 2006.229.15:52:02.19#ibcon#about to read 5, iclass 17, count 0 2006.229.15:52:02.19#ibcon#read 5, iclass 17, count 0 2006.229.15:52:02.19#ibcon#about to read 6, iclass 17, count 0 2006.229.15:52:02.19#ibcon#read 6, iclass 17, count 0 2006.229.15:52:02.19#ibcon#end of sib2, iclass 17, count 0 2006.229.15:52:02.19#ibcon#*after write, iclass 17, count 0 2006.229.15:52:02.19#ibcon#*before return 0, iclass 17, count 0 2006.229.15:52:02.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:02.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:02.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:52:02.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:52:02.19$vck44/valo=4,624.99 2006.229.15:52:02.19#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.15:52:02.19#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.15:52:02.19#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:02.19#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:52:02.19#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:52:02.19#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:52:02.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.15:52:02.19#ibcon#first serial, iclass 19, count 0 2006.229.15:52:02.19#ibcon#enter sib2, iclass 19, count 0 2006.229.15:52:02.19#ibcon#flushed, iclass 19, count 0 2006.229.15:52:02.19#ibcon#about to write, iclass 19, count 0 2006.229.15:52:02.19#ibcon#wrote, iclass 19, count 0 2006.229.15:52:02.19#ibcon#about to read 3, iclass 19, count 0 2006.229.15:52:02.21#ibcon#read 3, iclass 19, count 0 2006.229.15:52:02.21#ibcon#about to read 4, iclass 19, count 0 2006.229.15:52:02.21#ibcon#read 4, iclass 19, count 0 2006.229.15:52:02.21#ibcon#about to read 5, iclass 19, count 0 2006.229.15:52:02.21#ibcon#read 5, iclass 19, count 0 2006.229.15:52:02.21#ibcon#about to read 6, iclass 19, count 0 2006.229.15:52:02.21#ibcon#read 6, iclass 19, count 0 2006.229.15:52:02.21#ibcon#end of sib2, iclass 19, count 0 2006.229.15:52:02.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.15:52:02.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.15:52:02.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:52:02.21#ibcon#*before write, iclass 19, count 0 2006.229.15:52:02.21#ibcon#enter sib2, iclass 19, count 0 2006.229.15:52:02.21#ibcon#flushed, iclass 19, count 0 2006.229.15:52:02.21#ibcon#about to write, iclass 19, count 0 2006.229.15:52:02.21#ibcon#wrote, iclass 19, count 0 2006.229.15:52:02.21#ibcon#about to read 3, iclass 19, count 0 2006.229.15:52:02.25#ibcon#read 3, iclass 19, count 0 2006.229.15:52:02.25#ibcon#about to read 4, iclass 19, count 0 2006.229.15:52:02.25#ibcon#read 4, iclass 19, count 0 2006.229.15:52:02.25#ibcon#about to read 5, iclass 19, count 0 2006.229.15:52:02.25#ibcon#read 5, iclass 19, count 0 2006.229.15:52:02.25#ibcon#about to read 6, iclass 19, count 0 2006.229.15:52:02.25#ibcon#read 6, iclass 19, count 0 2006.229.15:52:02.25#ibcon#end of sib2, iclass 19, count 0 2006.229.15:52:02.25#ibcon#*after write, iclass 19, count 0 2006.229.15:52:02.25#ibcon#*before return 0, iclass 19, count 0 2006.229.15:52:02.25#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:52:02.25#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.15:52:02.25#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.15:52:02.25#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.15:52:02.25$vck44/va=4,7 2006.229.15:52:02.25#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.15:52:02.25#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.15:52:02.25#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:02.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:52:02.31#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:52:02.31#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:52:02.31#ibcon#enter wrdev, iclass 21, count 2 2006.229.15:52:02.31#ibcon#first serial, iclass 21, count 2 2006.229.15:52:02.31#ibcon#enter sib2, iclass 21, count 2 2006.229.15:52:02.31#ibcon#flushed, iclass 21, count 2 2006.229.15:52:02.31#ibcon#about to write, iclass 21, count 2 2006.229.15:52:02.31#ibcon#wrote, iclass 21, count 2 2006.229.15:52:02.31#ibcon#about to read 3, iclass 21, count 2 2006.229.15:52:02.33#ibcon#read 3, iclass 21, count 2 2006.229.15:52:02.33#ibcon#about to read 4, iclass 21, count 2 2006.229.15:52:02.33#ibcon#read 4, iclass 21, count 2 2006.229.15:52:02.33#ibcon#about to read 5, iclass 21, count 2 2006.229.15:52:02.33#ibcon#read 5, iclass 21, count 2 2006.229.15:52:02.33#ibcon#about to read 6, iclass 21, count 2 2006.229.15:52:02.33#ibcon#read 6, iclass 21, count 2 2006.229.15:52:02.33#ibcon#end of sib2, iclass 21, count 2 2006.229.15:52:02.33#ibcon#*mode == 0, iclass 21, count 2 2006.229.15:52:02.33#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.15:52:02.33#ibcon#[25=AT04-07\r\n] 2006.229.15:52:02.33#ibcon#*before write, iclass 21, count 2 2006.229.15:52:02.33#ibcon#enter sib2, iclass 21, count 2 2006.229.15:52:02.33#ibcon#flushed, iclass 21, count 2 2006.229.15:52:02.33#ibcon#about to write, iclass 21, count 2 2006.229.15:52:02.33#ibcon#wrote, iclass 21, count 2 2006.229.15:52:02.33#ibcon#about to read 3, iclass 21, count 2 2006.229.15:52:02.36#ibcon#read 3, iclass 21, count 2 2006.229.15:52:02.36#ibcon#about to read 4, iclass 21, count 2 2006.229.15:52:02.36#ibcon#read 4, iclass 21, count 2 2006.229.15:52:02.36#ibcon#about to read 5, iclass 21, count 2 2006.229.15:52:02.36#ibcon#read 5, iclass 21, count 2 2006.229.15:52:02.36#ibcon#about to read 6, iclass 21, count 2 2006.229.15:52:02.36#ibcon#read 6, iclass 21, count 2 2006.229.15:52:02.36#ibcon#end of sib2, iclass 21, count 2 2006.229.15:52:02.36#ibcon#*after write, iclass 21, count 2 2006.229.15:52:02.36#ibcon#*before return 0, iclass 21, count 2 2006.229.15:52:02.36#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:52:02.36#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.15:52:02.36#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.15:52:02.36#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:02.36#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:52:02.48#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:52:02.48#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:52:02.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.15:52:02.48#ibcon#first serial, iclass 21, count 0 2006.229.15:52:02.48#ibcon#enter sib2, iclass 21, count 0 2006.229.15:52:02.48#ibcon#flushed, iclass 21, count 0 2006.229.15:52:02.48#ibcon#about to write, iclass 21, count 0 2006.229.15:52:02.48#ibcon#wrote, iclass 21, count 0 2006.229.15:52:02.48#ibcon#about to read 3, iclass 21, count 0 2006.229.15:52:02.50#ibcon#read 3, iclass 21, count 0 2006.229.15:52:02.50#ibcon#about to read 4, iclass 21, count 0 2006.229.15:52:02.50#ibcon#read 4, iclass 21, count 0 2006.229.15:52:02.50#ibcon#about to read 5, iclass 21, count 0 2006.229.15:52:02.50#ibcon#read 5, iclass 21, count 0 2006.229.15:52:02.50#ibcon#about to read 6, iclass 21, count 0 2006.229.15:52:02.50#ibcon#read 6, iclass 21, count 0 2006.229.15:52:02.50#ibcon#end of sib2, iclass 21, count 0 2006.229.15:52:02.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.15:52:02.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.15:52:02.50#ibcon#[25=USB\r\n] 2006.229.15:52:02.50#ibcon#*before write, iclass 21, count 0 2006.229.15:52:02.50#ibcon#enter sib2, iclass 21, count 0 2006.229.15:52:02.50#ibcon#flushed, iclass 21, count 0 2006.229.15:52:02.50#ibcon#about to write, iclass 21, count 0 2006.229.15:52:02.50#ibcon#wrote, iclass 21, count 0 2006.229.15:52:02.50#ibcon#about to read 3, iclass 21, count 0 2006.229.15:52:02.53#ibcon#read 3, iclass 21, count 0 2006.229.15:52:02.53#ibcon#about to read 4, iclass 21, count 0 2006.229.15:52:02.53#ibcon#read 4, iclass 21, count 0 2006.229.15:52:02.53#ibcon#about to read 5, iclass 21, count 0 2006.229.15:52:02.53#ibcon#read 5, iclass 21, count 0 2006.229.15:52:02.53#ibcon#about to read 6, iclass 21, count 0 2006.229.15:52:02.53#ibcon#read 6, iclass 21, count 0 2006.229.15:52:02.53#ibcon#end of sib2, iclass 21, count 0 2006.229.15:52:02.53#ibcon#*after write, iclass 21, count 0 2006.229.15:52:02.53#ibcon#*before return 0, iclass 21, count 0 2006.229.15:52:02.53#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:52:02.53#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.15:52:02.53#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.15:52:02.53#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.15:52:02.53$vck44/valo=5,734.99 2006.229.15:52:02.53#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.15:52:02.53#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.15:52:02.53#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:02.53#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:52:02.53#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:52:02.53#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:52:02.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.15:52:02.53#ibcon#first serial, iclass 23, count 0 2006.229.15:52:02.53#ibcon#enter sib2, iclass 23, count 0 2006.229.15:52:02.53#ibcon#flushed, iclass 23, count 0 2006.229.15:52:02.53#ibcon#about to write, iclass 23, count 0 2006.229.15:52:02.53#ibcon#wrote, iclass 23, count 0 2006.229.15:52:02.53#ibcon#about to read 3, iclass 23, count 0 2006.229.15:52:02.55#ibcon#read 3, iclass 23, count 0 2006.229.15:52:02.55#ibcon#about to read 4, iclass 23, count 0 2006.229.15:52:02.55#ibcon#read 4, iclass 23, count 0 2006.229.15:52:02.55#ibcon#about to read 5, iclass 23, count 0 2006.229.15:52:02.55#ibcon#read 5, iclass 23, count 0 2006.229.15:52:02.55#ibcon#about to read 6, iclass 23, count 0 2006.229.15:52:02.55#ibcon#read 6, iclass 23, count 0 2006.229.15:52:02.55#ibcon#end of sib2, iclass 23, count 0 2006.229.15:52:02.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.15:52:02.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.15:52:02.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:52:02.55#ibcon#*before write, iclass 23, count 0 2006.229.15:52:02.55#ibcon#enter sib2, iclass 23, count 0 2006.229.15:52:02.55#ibcon#flushed, iclass 23, count 0 2006.229.15:52:02.55#ibcon#about to write, iclass 23, count 0 2006.229.15:52:02.55#ibcon#wrote, iclass 23, count 0 2006.229.15:52:02.55#ibcon#about to read 3, iclass 23, count 0 2006.229.15:52:02.59#ibcon#read 3, iclass 23, count 0 2006.229.15:52:02.59#ibcon#about to read 4, iclass 23, count 0 2006.229.15:52:02.59#ibcon#read 4, iclass 23, count 0 2006.229.15:52:02.59#ibcon#about to read 5, iclass 23, count 0 2006.229.15:52:02.59#ibcon#read 5, iclass 23, count 0 2006.229.15:52:02.59#ibcon#about to read 6, iclass 23, count 0 2006.229.15:52:02.59#ibcon#read 6, iclass 23, count 0 2006.229.15:52:02.59#ibcon#end of sib2, iclass 23, count 0 2006.229.15:52:02.59#ibcon#*after write, iclass 23, count 0 2006.229.15:52:02.59#ibcon#*before return 0, iclass 23, count 0 2006.229.15:52:02.59#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:52:02.59#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.15:52:02.59#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.15:52:02.59#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.15:52:02.59$vck44/va=5,4 2006.229.15:52:02.59#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.15:52:02.59#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.15:52:02.59#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:02.59#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:02.65#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:02.65#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:02.65#ibcon#enter wrdev, iclass 25, count 2 2006.229.15:52:02.65#ibcon#first serial, iclass 25, count 2 2006.229.15:52:02.65#ibcon#enter sib2, iclass 25, count 2 2006.229.15:52:02.65#ibcon#flushed, iclass 25, count 2 2006.229.15:52:02.65#ibcon#about to write, iclass 25, count 2 2006.229.15:52:02.65#ibcon#wrote, iclass 25, count 2 2006.229.15:52:02.65#ibcon#about to read 3, iclass 25, count 2 2006.229.15:52:02.67#ibcon#read 3, iclass 25, count 2 2006.229.15:52:02.67#ibcon#about to read 4, iclass 25, count 2 2006.229.15:52:02.67#ibcon#read 4, iclass 25, count 2 2006.229.15:52:02.67#ibcon#about to read 5, iclass 25, count 2 2006.229.15:52:02.67#ibcon#read 5, iclass 25, count 2 2006.229.15:52:02.67#ibcon#about to read 6, iclass 25, count 2 2006.229.15:52:02.67#ibcon#read 6, iclass 25, count 2 2006.229.15:52:02.67#ibcon#end of sib2, iclass 25, count 2 2006.229.15:52:02.67#ibcon#*mode == 0, iclass 25, count 2 2006.229.15:52:02.67#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.15:52:02.67#ibcon#[25=AT05-04\r\n] 2006.229.15:52:02.67#ibcon#*before write, iclass 25, count 2 2006.229.15:52:02.67#ibcon#enter sib2, iclass 25, count 2 2006.229.15:52:02.67#ibcon#flushed, iclass 25, count 2 2006.229.15:52:02.67#ibcon#about to write, iclass 25, count 2 2006.229.15:52:02.67#ibcon#wrote, iclass 25, count 2 2006.229.15:52:02.67#ibcon#about to read 3, iclass 25, count 2 2006.229.15:52:02.70#ibcon#read 3, iclass 25, count 2 2006.229.15:52:02.70#ibcon#about to read 4, iclass 25, count 2 2006.229.15:52:02.70#ibcon#read 4, iclass 25, count 2 2006.229.15:52:02.70#ibcon#about to read 5, iclass 25, count 2 2006.229.15:52:02.70#ibcon#read 5, iclass 25, count 2 2006.229.15:52:02.70#ibcon#about to read 6, iclass 25, count 2 2006.229.15:52:02.70#ibcon#read 6, iclass 25, count 2 2006.229.15:52:02.70#ibcon#end of sib2, iclass 25, count 2 2006.229.15:52:02.70#ibcon#*after write, iclass 25, count 2 2006.229.15:52:02.70#ibcon#*before return 0, iclass 25, count 2 2006.229.15:52:02.70#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:02.70#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:02.70#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.15:52:02.70#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:02.70#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:02.82#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:02.82#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:02.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:52:02.82#ibcon#first serial, iclass 25, count 0 2006.229.15:52:02.82#ibcon#enter sib2, iclass 25, count 0 2006.229.15:52:02.82#ibcon#flushed, iclass 25, count 0 2006.229.15:52:02.82#ibcon#about to write, iclass 25, count 0 2006.229.15:52:02.82#ibcon#wrote, iclass 25, count 0 2006.229.15:52:02.82#ibcon#about to read 3, iclass 25, count 0 2006.229.15:52:02.84#ibcon#read 3, iclass 25, count 0 2006.229.15:52:02.84#ibcon#about to read 4, iclass 25, count 0 2006.229.15:52:02.84#ibcon#read 4, iclass 25, count 0 2006.229.15:52:02.84#ibcon#about to read 5, iclass 25, count 0 2006.229.15:52:02.84#ibcon#read 5, iclass 25, count 0 2006.229.15:52:02.84#ibcon#about to read 6, iclass 25, count 0 2006.229.15:52:02.84#ibcon#read 6, iclass 25, count 0 2006.229.15:52:02.84#ibcon#end of sib2, iclass 25, count 0 2006.229.15:52:02.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:52:02.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:52:02.84#ibcon#[25=USB\r\n] 2006.229.15:52:02.84#ibcon#*before write, iclass 25, count 0 2006.229.15:52:02.84#ibcon#enter sib2, iclass 25, count 0 2006.229.15:52:02.84#ibcon#flushed, iclass 25, count 0 2006.229.15:52:02.84#ibcon#about to write, iclass 25, count 0 2006.229.15:52:02.84#ibcon#wrote, iclass 25, count 0 2006.229.15:52:02.84#ibcon#about to read 3, iclass 25, count 0 2006.229.15:52:02.87#ibcon#read 3, iclass 25, count 0 2006.229.15:52:02.87#ibcon#about to read 4, iclass 25, count 0 2006.229.15:52:02.87#ibcon#read 4, iclass 25, count 0 2006.229.15:52:02.87#ibcon#about to read 5, iclass 25, count 0 2006.229.15:52:02.87#ibcon#read 5, iclass 25, count 0 2006.229.15:52:02.87#ibcon#about to read 6, iclass 25, count 0 2006.229.15:52:02.87#ibcon#read 6, iclass 25, count 0 2006.229.15:52:02.87#ibcon#end of sib2, iclass 25, count 0 2006.229.15:52:02.87#ibcon#*after write, iclass 25, count 0 2006.229.15:52:02.87#ibcon#*before return 0, iclass 25, count 0 2006.229.15:52:02.87#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:02.87#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:02.87#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:52:02.87#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:52:02.87$vck44/valo=6,814.99 2006.229.15:52:02.87#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.15:52:02.87#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.15:52:02.87#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:02.87#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:02.87#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:02.87#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:02.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:52:02.87#ibcon#first serial, iclass 27, count 0 2006.229.15:52:02.87#ibcon#enter sib2, iclass 27, count 0 2006.229.15:52:02.87#ibcon#flushed, iclass 27, count 0 2006.229.15:52:02.87#ibcon#about to write, iclass 27, count 0 2006.229.15:52:02.87#ibcon#wrote, iclass 27, count 0 2006.229.15:52:02.87#ibcon#about to read 3, iclass 27, count 0 2006.229.15:52:02.89#ibcon#read 3, iclass 27, count 0 2006.229.15:52:02.89#ibcon#about to read 4, iclass 27, count 0 2006.229.15:52:02.89#ibcon#read 4, iclass 27, count 0 2006.229.15:52:02.89#ibcon#about to read 5, iclass 27, count 0 2006.229.15:52:02.89#ibcon#read 5, iclass 27, count 0 2006.229.15:52:02.89#ibcon#about to read 6, iclass 27, count 0 2006.229.15:52:02.89#ibcon#read 6, iclass 27, count 0 2006.229.15:52:02.89#ibcon#end of sib2, iclass 27, count 0 2006.229.15:52:02.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:52:02.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:52:02.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:52:02.89#ibcon#*before write, iclass 27, count 0 2006.229.15:52:02.89#ibcon#enter sib2, iclass 27, count 0 2006.229.15:52:02.89#ibcon#flushed, iclass 27, count 0 2006.229.15:52:02.89#ibcon#about to write, iclass 27, count 0 2006.229.15:52:02.89#ibcon#wrote, iclass 27, count 0 2006.229.15:52:02.89#ibcon#about to read 3, iclass 27, count 0 2006.229.15:52:02.93#ibcon#read 3, iclass 27, count 0 2006.229.15:52:02.93#ibcon#about to read 4, iclass 27, count 0 2006.229.15:52:02.93#ibcon#read 4, iclass 27, count 0 2006.229.15:52:02.93#ibcon#about to read 5, iclass 27, count 0 2006.229.15:52:02.93#ibcon#read 5, iclass 27, count 0 2006.229.15:52:02.93#ibcon#about to read 6, iclass 27, count 0 2006.229.15:52:02.93#ibcon#read 6, iclass 27, count 0 2006.229.15:52:02.93#ibcon#end of sib2, iclass 27, count 0 2006.229.15:52:02.93#ibcon#*after write, iclass 27, count 0 2006.229.15:52:02.93#ibcon#*before return 0, iclass 27, count 0 2006.229.15:52:02.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:02.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:02.93#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:52:02.93#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:52:02.93$vck44/va=6,4 2006.229.15:52:02.93#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.15:52:02.93#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.15:52:02.93#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:02.93#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:02.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:02.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:02.99#ibcon#enter wrdev, iclass 29, count 2 2006.229.15:52:02.99#ibcon#first serial, iclass 29, count 2 2006.229.15:52:02.99#ibcon#enter sib2, iclass 29, count 2 2006.229.15:52:02.99#ibcon#flushed, iclass 29, count 2 2006.229.15:52:02.99#ibcon#about to write, iclass 29, count 2 2006.229.15:52:02.99#ibcon#wrote, iclass 29, count 2 2006.229.15:52:02.99#ibcon#about to read 3, iclass 29, count 2 2006.229.15:52:03.01#ibcon#read 3, iclass 29, count 2 2006.229.15:52:03.01#ibcon#about to read 4, iclass 29, count 2 2006.229.15:52:03.01#ibcon#read 4, iclass 29, count 2 2006.229.15:52:03.01#ibcon#about to read 5, iclass 29, count 2 2006.229.15:52:03.01#ibcon#read 5, iclass 29, count 2 2006.229.15:52:03.01#ibcon#about to read 6, iclass 29, count 2 2006.229.15:52:03.01#ibcon#read 6, iclass 29, count 2 2006.229.15:52:03.01#ibcon#end of sib2, iclass 29, count 2 2006.229.15:52:03.01#ibcon#*mode == 0, iclass 29, count 2 2006.229.15:52:03.01#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.15:52:03.01#ibcon#[25=AT06-04\r\n] 2006.229.15:52:03.01#ibcon#*before write, iclass 29, count 2 2006.229.15:52:03.01#ibcon#enter sib2, iclass 29, count 2 2006.229.15:52:03.01#ibcon#flushed, iclass 29, count 2 2006.229.15:52:03.01#ibcon#about to write, iclass 29, count 2 2006.229.15:52:03.01#ibcon#wrote, iclass 29, count 2 2006.229.15:52:03.01#ibcon#about to read 3, iclass 29, count 2 2006.229.15:52:03.04#ibcon#read 3, iclass 29, count 2 2006.229.15:52:03.04#ibcon#about to read 4, iclass 29, count 2 2006.229.15:52:03.04#ibcon#read 4, iclass 29, count 2 2006.229.15:52:03.04#ibcon#about to read 5, iclass 29, count 2 2006.229.15:52:03.04#ibcon#read 5, iclass 29, count 2 2006.229.15:52:03.04#ibcon#about to read 6, iclass 29, count 2 2006.229.15:52:03.04#ibcon#read 6, iclass 29, count 2 2006.229.15:52:03.04#ibcon#end of sib2, iclass 29, count 2 2006.229.15:52:03.04#ibcon#*after write, iclass 29, count 2 2006.229.15:52:03.04#ibcon#*before return 0, iclass 29, count 2 2006.229.15:52:03.04#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:03.04#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:03.04#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.15:52:03.04#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:03.04#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:03.16#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:03.16#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:03.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:52:03.16#ibcon#first serial, iclass 29, count 0 2006.229.15:52:03.16#ibcon#enter sib2, iclass 29, count 0 2006.229.15:52:03.16#ibcon#flushed, iclass 29, count 0 2006.229.15:52:03.16#ibcon#about to write, iclass 29, count 0 2006.229.15:52:03.16#ibcon#wrote, iclass 29, count 0 2006.229.15:52:03.16#ibcon#about to read 3, iclass 29, count 0 2006.229.15:52:03.18#ibcon#read 3, iclass 29, count 0 2006.229.15:52:03.18#ibcon#about to read 4, iclass 29, count 0 2006.229.15:52:03.18#ibcon#read 4, iclass 29, count 0 2006.229.15:52:03.18#ibcon#about to read 5, iclass 29, count 0 2006.229.15:52:03.18#ibcon#read 5, iclass 29, count 0 2006.229.15:52:03.18#ibcon#about to read 6, iclass 29, count 0 2006.229.15:52:03.18#ibcon#read 6, iclass 29, count 0 2006.229.15:52:03.18#ibcon#end of sib2, iclass 29, count 0 2006.229.15:52:03.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:52:03.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:52:03.18#ibcon#[25=USB\r\n] 2006.229.15:52:03.18#ibcon#*before write, iclass 29, count 0 2006.229.15:52:03.18#ibcon#enter sib2, iclass 29, count 0 2006.229.15:52:03.18#ibcon#flushed, iclass 29, count 0 2006.229.15:52:03.18#ibcon#about to write, iclass 29, count 0 2006.229.15:52:03.18#ibcon#wrote, iclass 29, count 0 2006.229.15:52:03.18#ibcon#about to read 3, iclass 29, count 0 2006.229.15:52:03.21#ibcon#read 3, iclass 29, count 0 2006.229.15:52:03.21#ibcon#about to read 4, iclass 29, count 0 2006.229.15:52:03.21#ibcon#read 4, iclass 29, count 0 2006.229.15:52:03.21#ibcon#about to read 5, iclass 29, count 0 2006.229.15:52:03.21#ibcon#read 5, iclass 29, count 0 2006.229.15:52:03.21#ibcon#about to read 6, iclass 29, count 0 2006.229.15:52:03.21#ibcon#read 6, iclass 29, count 0 2006.229.15:52:03.21#ibcon#end of sib2, iclass 29, count 0 2006.229.15:52:03.21#ibcon#*after write, iclass 29, count 0 2006.229.15:52:03.21#ibcon#*before return 0, iclass 29, count 0 2006.229.15:52:03.21#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:03.21#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:03.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:52:03.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:52:03.21$vck44/valo=7,864.99 2006.229.15:52:03.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.15:52:03.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.15:52:03.21#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:03.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:03.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:03.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:03.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:52:03.21#ibcon#first serial, iclass 31, count 0 2006.229.15:52:03.21#ibcon#enter sib2, iclass 31, count 0 2006.229.15:52:03.21#ibcon#flushed, iclass 31, count 0 2006.229.15:52:03.21#ibcon#about to write, iclass 31, count 0 2006.229.15:52:03.21#ibcon#wrote, iclass 31, count 0 2006.229.15:52:03.21#ibcon#about to read 3, iclass 31, count 0 2006.229.15:52:03.23#ibcon#read 3, iclass 31, count 0 2006.229.15:52:03.23#ibcon#about to read 4, iclass 31, count 0 2006.229.15:52:03.23#ibcon#read 4, iclass 31, count 0 2006.229.15:52:03.23#ibcon#about to read 5, iclass 31, count 0 2006.229.15:52:03.23#ibcon#read 5, iclass 31, count 0 2006.229.15:52:03.23#ibcon#about to read 6, iclass 31, count 0 2006.229.15:52:03.23#ibcon#read 6, iclass 31, count 0 2006.229.15:52:03.23#ibcon#end of sib2, iclass 31, count 0 2006.229.15:52:03.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:52:03.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:52:03.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:52:03.23#ibcon#*before write, iclass 31, count 0 2006.229.15:52:03.23#ibcon#enter sib2, iclass 31, count 0 2006.229.15:52:03.23#ibcon#flushed, iclass 31, count 0 2006.229.15:52:03.23#ibcon#about to write, iclass 31, count 0 2006.229.15:52:03.23#ibcon#wrote, iclass 31, count 0 2006.229.15:52:03.23#ibcon#about to read 3, iclass 31, count 0 2006.229.15:52:03.27#ibcon#read 3, iclass 31, count 0 2006.229.15:52:03.27#ibcon#about to read 4, iclass 31, count 0 2006.229.15:52:03.27#ibcon#read 4, iclass 31, count 0 2006.229.15:52:03.27#ibcon#about to read 5, iclass 31, count 0 2006.229.15:52:03.27#ibcon#read 5, iclass 31, count 0 2006.229.15:52:03.27#ibcon#about to read 6, iclass 31, count 0 2006.229.15:52:03.27#ibcon#read 6, iclass 31, count 0 2006.229.15:52:03.27#ibcon#end of sib2, iclass 31, count 0 2006.229.15:52:03.27#ibcon#*after write, iclass 31, count 0 2006.229.15:52:03.27#ibcon#*before return 0, iclass 31, count 0 2006.229.15:52:03.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:03.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:03.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:52:03.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:52:03.27$vck44/va=7,5 2006.229.15:52:03.27#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.15:52:03.27#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.15:52:03.27#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:03.27#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:03.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:03.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:03.33#ibcon#enter wrdev, iclass 33, count 2 2006.229.15:52:03.33#ibcon#first serial, iclass 33, count 2 2006.229.15:52:03.33#ibcon#enter sib2, iclass 33, count 2 2006.229.15:52:03.33#ibcon#flushed, iclass 33, count 2 2006.229.15:52:03.33#ibcon#about to write, iclass 33, count 2 2006.229.15:52:03.33#ibcon#wrote, iclass 33, count 2 2006.229.15:52:03.33#ibcon#about to read 3, iclass 33, count 2 2006.229.15:52:03.35#ibcon#read 3, iclass 33, count 2 2006.229.15:52:03.35#ibcon#about to read 4, iclass 33, count 2 2006.229.15:52:03.35#ibcon#read 4, iclass 33, count 2 2006.229.15:52:03.35#ibcon#about to read 5, iclass 33, count 2 2006.229.15:52:03.35#ibcon#read 5, iclass 33, count 2 2006.229.15:52:03.35#ibcon#about to read 6, iclass 33, count 2 2006.229.15:52:03.35#ibcon#read 6, iclass 33, count 2 2006.229.15:52:03.35#ibcon#end of sib2, iclass 33, count 2 2006.229.15:52:03.35#ibcon#*mode == 0, iclass 33, count 2 2006.229.15:52:03.35#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.15:52:03.35#ibcon#[25=AT07-05\r\n] 2006.229.15:52:03.35#ibcon#*before write, iclass 33, count 2 2006.229.15:52:03.35#ibcon#enter sib2, iclass 33, count 2 2006.229.15:52:03.35#ibcon#flushed, iclass 33, count 2 2006.229.15:52:03.35#ibcon#about to write, iclass 33, count 2 2006.229.15:52:03.35#ibcon#wrote, iclass 33, count 2 2006.229.15:52:03.35#ibcon#about to read 3, iclass 33, count 2 2006.229.15:52:03.38#ibcon#read 3, iclass 33, count 2 2006.229.15:52:03.38#ibcon#about to read 4, iclass 33, count 2 2006.229.15:52:03.38#ibcon#read 4, iclass 33, count 2 2006.229.15:52:03.38#ibcon#about to read 5, iclass 33, count 2 2006.229.15:52:03.38#ibcon#read 5, iclass 33, count 2 2006.229.15:52:03.38#ibcon#about to read 6, iclass 33, count 2 2006.229.15:52:03.38#ibcon#read 6, iclass 33, count 2 2006.229.15:52:03.38#ibcon#end of sib2, iclass 33, count 2 2006.229.15:52:03.38#ibcon#*after write, iclass 33, count 2 2006.229.15:52:03.38#ibcon#*before return 0, iclass 33, count 2 2006.229.15:52:03.38#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:03.38#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:03.38#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.15:52:03.38#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:03.38#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:03.50#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:03.50#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:03.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:52:03.50#ibcon#first serial, iclass 33, count 0 2006.229.15:52:03.50#ibcon#enter sib2, iclass 33, count 0 2006.229.15:52:03.50#ibcon#flushed, iclass 33, count 0 2006.229.15:52:03.50#ibcon#about to write, iclass 33, count 0 2006.229.15:52:03.50#ibcon#wrote, iclass 33, count 0 2006.229.15:52:03.50#ibcon#about to read 3, iclass 33, count 0 2006.229.15:52:03.52#ibcon#read 3, iclass 33, count 0 2006.229.15:52:03.52#ibcon#about to read 4, iclass 33, count 0 2006.229.15:52:03.52#ibcon#read 4, iclass 33, count 0 2006.229.15:52:03.52#ibcon#about to read 5, iclass 33, count 0 2006.229.15:52:03.52#ibcon#read 5, iclass 33, count 0 2006.229.15:52:03.52#ibcon#about to read 6, iclass 33, count 0 2006.229.15:52:03.52#ibcon#read 6, iclass 33, count 0 2006.229.15:52:03.52#ibcon#end of sib2, iclass 33, count 0 2006.229.15:52:03.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:52:03.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:52:03.52#ibcon#[25=USB\r\n] 2006.229.15:52:03.52#ibcon#*before write, iclass 33, count 0 2006.229.15:52:03.52#ibcon#enter sib2, iclass 33, count 0 2006.229.15:52:03.52#ibcon#flushed, iclass 33, count 0 2006.229.15:52:03.52#ibcon#about to write, iclass 33, count 0 2006.229.15:52:03.52#ibcon#wrote, iclass 33, count 0 2006.229.15:52:03.52#ibcon#about to read 3, iclass 33, count 0 2006.229.15:52:03.55#ibcon#read 3, iclass 33, count 0 2006.229.15:52:03.55#ibcon#about to read 4, iclass 33, count 0 2006.229.15:52:03.55#ibcon#read 4, iclass 33, count 0 2006.229.15:52:03.55#ibcon#about to read 5, iclass 33, count 0 2006.229.15:52:03.55#ibcon#read 5, iclass 33, count 0 2006.229.15:52:03.55#ibcon#about to read 6, iclass 33, count 0 2006.229.15:52:03.55#ibcon#read 6, iclass 33, count 0 2006.229.15:52:03.55#ibcon#end of sib2, iclass 33, count 0 2006.229.15:52:03.55#ibcon#*after write, iclass 33, count 0 2006.229.15:52:03.55#ibcon#*before return 0, iclass 33, count 0 2006.229.15:52:03.55#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:03.55#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:03.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:52:03.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:52:03.55$vck44/valo=8,884.99 2006.229.15:52:03.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.15:52:03.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.15:52:03.55#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:03.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:03.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:03.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:03.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:52:03.55#ibcon#first serial, iclass 35, count 0 2006.229.15:52:03.55#ibcon#enter sib2, iclass 35, count 0 2006.229.15:52:03.55#ibcon#flushed, iclass 35, count 0 2006.229.15:52:03.55#ibcon#about to write, iclass 35, count 0 2006.229.15:52:03.55#ibcon#wrote, iclass 35, count 0 2006.229.15:52:03.55#ibcon#about to read 3, iclass 35, count 0 2006.229.15:52:03.57#ibcon#read 3, iclass 35, count 0 2006.229.15:52:03.57#ibcon#about to read 4, iclass 35, count 0 2006.229.15:52:03.57#ibcon#read 4, iclass 35, count 0 2006.229.15:52:03.57#ibcon#about to read 5, iclass 35, count 0 2006.229.15:52:03.57#ibcon#read 5, iclass 35, count 0 2006.229.15:52:03.57#ibcon#about to read 6, iclass 35, count 0 2006.229.15:52:03.57#ibcon#read 6, iclass 35, count 0 2006.229.15:52:03.57#ibcon#end of sib2, iclass 35, count 0 2006.229.15:52:03.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:52:03.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:52:03.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:52:03.57#ibcon#*before write, iclass 35, count 0 2006.229.15:52:03.57#ibcon#enter sib2, iclass 35, count 0 2006.229.15:52:03.57#ibcon#flushed, iclass 35, count 0 2006.229.15:52:03.57#ibcon#about to write, iclass 35, count 0 2006.229.15:52:03.57#ibcon#wrote, iclass 35, count 0 2006.229.15:52:03.57#ibcon#about to read 3, iclass 35, count 0 2006.229.15:52:03.61#ibcon#read 3, iclass 35, count 0 2006.229.15:52:03.61#ibcon#about to read 4, iclass 35, count 0 2006.229.15:52:03.61#ibcon#read 4, iclass 35, count 0 2006.229.15:52:03.61#ibcon#about to read 5, iclass 35, count 0 2006.229.15:52:03.61#ibcon#read 5, iclass 35, count 0 2006.229.15:52:03.61#ibcon#about to read 6, iclass 35, count 0 2006.229.15:52:03.61#ibcon#read 6, iclass 35, count 0 2006.229.15:52:03.61#ibcon#end of sib2, iclass 35, count 0 2006.229.15:52:03.61#ibcon#*after write, iclass 35, count 0 2006.229.15:52:03.61#ibcon#*before return 0, iclass 35, count 0 2006.229.15:52:03.61#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:03.61#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:03.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:52:03.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:52:03.61$vck44/va=8,6 2006.229.15:52:03.61#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.15:52:03.61#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.15:52:03.61#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:03.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:03.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:03.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:03.67#ibcon#enter wrdev, iclass 37, count 2 2006.229.15:52:03.67#ibcon#first serial, iclass 37, count 2 2006.229.15:52:03.67#ibcon#enter sib2, iclass 37, count 2 2006.229.15:52:03.67#ibcon#flushed, iclass 37, count 2 2006.229.15:52:03.67#ibcon#about to write, iclass 37, count 2 2006.229.15:52:03.67#ibcon#wrote, iclass 37, count 2 2006.229.15:52:03.67#ibcon#about to read 3, iclass 37, count 2 2006.229.15:52:03.69#ibcon#read 3, iclass 37, count 2 2006.229.15:52:03.69#ibcon#about to read 4, iclass 37, count 2 2006.229.15:52:03.69#ibcon#read 4, iclass 37, count 2 2006.229.15:52:03.69#ibcon#about to read 5, iclass 37, count 2 2006.229.15:52:03.69#ibcon#read 5, iclass 37, count 2 2006.229.15:52:03.69#ibcon#about to read 6, iclass 37, count 2 2006.229.15:52:03.69#ibcon#read 6, iclass 37, count 2 2006.229.15:52:03.69#ibcon#end of sib2, iclass 37, count 2 2006.229.15:52:03.69#ibcon#*mode == 0, iclass 37, count 2 2006.229.15:52:03.69#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.15:52:03.69#ibcon#[25=AT08-06\r\n] 2006.229.15:52:03.69#ibcon#*before write, iclass 37, count 2 2006.229.15:52:03.69#ibcon#enter sib2, iclass 37, count 2 2006.229.15:52:03.69#ibcon#flushed, iclass 37, count 2 2006.229.15:52:03.69#ibcon#about to write, iclass 37, count 2 2006.229.15:52:03.69#ibcon#wrote, iclass 37, count 2 2006.229.15:52:03.69#ibcon#about to read 3, iclass 37, count 2 2006.229.15:52:03.72#ibcon#read 3, iclass 37, count 2 2006.229.15:52:03.72#ibcon#about to read 4, iclass 37, count 2 2006.229.15:52:03.72#ibcon#read 4, iclass 37, count 2 2006.229.15:52:03.72#ibcon#about to read 5, iclass 37, count 2 2006.229.15:52:03.72#ibcon#read 5, iclass 37, count 2 2006.229.15:52:03.72#ibcon#about to read 6, iclass 37, count 2 2006.229.15:52:03.72#ibcon#read 6, iclass 37, count 2 2006.229.15:52:03.72#ibcon#end of sib2, iclass 37, count 2 2006.229.15:52:03.72#ibcon#*after write, iclass 37, count 2 2006.229.15:52:03.72#ibcon#*before return 0, iclass 37, count 2 2006.229.15:52:03.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:03.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:03.72#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.15:52:03.72#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:03.72#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:03.84#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:03.84#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:03.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:52:03.84#ibcon#first serial, iclass 37, count 0 2006.229.15:52:03.84#ibcon#enter sib2, iclass 37, count 0 2006.229.15:52:03.84#ibcon#flushed, iclass 37, count 0 2006.229.15:52:03.84#ibcon#about to write, iclass 37, count 0 2006.229.15:52:03.84#ibcon#wrote, iclass 37, count 0 2006.229.15:52:03.84#ibcon#about to read 3, iclass 37, count 0 2006.229.15:52:03.86#ibcon#read 3, iclass 37, count 0 2006.229.15:52:03.86#ibcon#about to read 4, iclass 37, count 0 2006.229.15:52:03.86#ibcon#read 4, iclass 37, count 0 2006.229.15:52:03.86#ibcon#about to read 5, iclass 37, count 0 2006.229.15:52:03.86#ibcon#read 5, iclass 37, count 0 2006.229.15:52:03.86#ibcon#about to read 6, iclass 37, count 0 2006.229.15:52:03.86#ibcon#read 6, iclass 37, count 0 2006.229.15:52:03.86#ibcon#end of sib2, iclass 37, count 0 2006.229.15:52:03.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:52:03.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:52:03.86#ibcon#[25=USB\r\n] 2006.229.15:52:03.86#ibcon#*before write, iclass 37, count 0 2006.229.15:52:03.86#ibcon#enter sib2, iclass 37, count 0 2006.229.15:52:03.86#ibcon#flushed, iclass 37, count 0 2006.229.15:52:03.86#ibcon#about to write, iclass 37, count 0 2006.229.15:52:03.86#ibcon#wrote, iclass 37, count 0 2006.229.15:52:03.86#ibcon#about to read 3, iclass 37, count 0 2006.229.15:52:03.89#ibcon#read 3, iclass 37, count 0 2006.229.15:52:03.89#ibcon#about to read 4, iclass 37, count 0 2006.229.15:52:03.89#ibcon#read 4, iclass 37, count 0 2006.229.15:52:03.89#ibcon#about to read 5, iclass 37, count 0 2006.229.15:52:03.89#ibcon#read 5, iclass 37, count 0 2006.229.15:52:03.89#ibcon#about to read 6, iclass 37, count 0 2006.229.15:52:03.89#ibcon#read 6, iclass 37, count 0 2006.229.15:52:03.89#ibcon#end of sib2, iclass 37, count 0 2006.229.15:52:03.89#ibcon#*after write, iclass 37, count 0 2006.229.15:52:03.89#ibcon#*before return 0, iclass 37, count 0 2006.229.15:52:03.89#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:03.89#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:03.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:52:03.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:52:03.89$vck44/vblo=1,629.99 2006.229.15:52:03.89#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:52:03.89#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:52:03.89#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:03.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:03.89#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:03.89#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:03.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:52:03.89#ibcon#first serial, iclass 39, count 0 2006.229.15:52:03.89#ibcon#enter sib2, iclass 39, count 0 2006.229.15:52:03.89#ibcon#flushed, iclass 39, count 0 2006.229.15:52:03.89#ibcon#about to write, iclass 39, count 0 2006.229.15:52:03.89#ibcon#wrote, iclass 39, count 0 2006.229.15:52:03.89#ibcon#about to read 3, iclass 39, count 0 2006.229.15:52:03.91#ibcon#read 3, iclass 39, count 0 2006.229.15:52:03.91#ibcon#about to read 4, iclass 39, count 0 2006.229.15:52:03.91#ibcon#read 4, iclass 39, count 0 2006.229.15:52:03.91#ibcon#about to read 5, iclass 39, count 0 2006.229.15:52:03.91#ibcon#read 5, iclass 39, count 0 2006.229.15:52:03.91#ibcon#about to read 6, iclass 39, count 0 2006.229.15:52:03.91#ibcon#read 6, iclass 39, count 0 2006.229.15:52:03.91#ibcon#end of sib2, iclass 39, count 0 2006.229.15:52:03.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:52:03.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:52:03.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:52:03.91#ibcon#*before write, iclass 39, count 0 2006.229.15:52:03.91#ibcon#enter sib2, iclass 39, count 0 2006.229.15:52:03.91#ibcon#flushed, iclass 39, count 0 2006.229.15:52:03.91#ibcon#about to write, iclass 39, count 0 2006.229.15:52:03.91#ibcon#wrote, iclass 39, count 0 2006.229.15:52:03.91#ibcon#about to read 3, iclass 39, count 0 2006.229.15:52:03.95#ibcon#read 3, iclass 39, count 0 2006.229.15:52:03.95#ibcon#about to read 4, iclass 39, count 0 2006.229.15:52:03.95#ibcon#read 4, iclass 39, count 0 2006.229.15:52:03.95#ibcon#about to read 5, iclass 39, count 0 2006.229.15:52:03.95#ibcon#read 5, iclass 39, count 0 2006.229.15:52:03.95#ibcon#about to read 6, iclass 39, count 0 2006.229.15:52:03.95#ibcon#read 6, iclass 39, count 0 2006.229.15:52:03.95#ibcon#end of sib2, iclass 39, count 0 2006.229.15:52:03.95#ibcon#*after write, iclass 39, count 0 2006.229.15:52:03.95#ibcon#*before return 0, iclass 39, count 0 2006.229.15:52:03.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:03.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:03.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:52:03.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:52:03.95$vck44/vb=1,4 2006.229.15:52:03.95#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.15:52:03.95#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.15:52:03.95#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:03.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:52:03.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:52:03.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:52:03.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.15:52:03.95#ibcon#first serial, iclass 3, count 2 2006.229.15:52:03.95#ibcon#enter sib2, iclass 3, count 2 2006.229.15:52:03.95#ibcon#flushed, iclass 3, count 2 2006.229.15:52:03.95#ibcon#about to write, iclass 3, count 2 2006.229.15:52:03.95#ibcon#wrote, iclass 3, count 2 2006.229.15:52:03.95#ibcon#about to read 3, iclass 3, count 2 2006.229.15:52:03.97#ibcon#read 3, iclass 3, count 2 2006.229.15:52:03.97#ibcon#about to read 4, iclass 3, count 2 2006.229.15:52:03.97#ibcon#read 4, iclass 3, count 2 2006.229.15:52:03.97#ibcon#about to read 5, iclass 3, count 2 2006.229.15:52:03.97#ibcon#read 5, iclass 3, count 2 2006.229.15:52:03.97#ibcon#about to read 6, iclass 3, count 2 2006.229.15:52:03.97#ibcon#read 6, iclass 3, count 2 2006.229.15:52:03.97#ibcon#end of sib2, iclass 3, count 2 2006.229.15:52:03.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.15:52:03.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.15:52:03.97#ibcon#[27=AT01-04\r\n] 2006.229.15:52:03.97#ibcon#*before write, iclass 3, count 2 2006.229.15:52:03.97#ibcon#enter sib2, iclass 3, count 2 2006.229.15:52:03.97#ibcon#flushed, iclass 3, count 2 2006.229.15:52:03.97#ibcon#about to write, iclass 3, count 2 2006.229.15:52:03.97#ibcon#wrote, iclass 3, count 2 2006.229.15:52:03.97#ibcon#about to read 3, iclass 3, count 2 2006.229.15:52:04.00#ibcon#read 3, iclass 3, count 2 2006.229.15:52:04.00#ibcon#about to read 4, iclass 3, count 2 2006.229.15:52:04.00#ibcon#read 4, iclass 3, count 2 2006.229.15:52:04.00#ibcon#about to read 5, iclass 3, count 2 2006.229.15:52:04.00#ibcon#read 5, iclass 3, count 2 2006.229.15:52:04.00#ibcon#about to read 6, iclass 3, count 2 2006.229.15:52:04.00#ibcon#read 6, iclass 3, count 2 2006.229.15:52:04.00#ibcon#end of sib2, iclass 3, count 2 2006.229.15:52:04.00#ibcon#*after write, iclass 3, count 2 2006.229.15:52:04.00#ibcon#*before return 0, iclass 3, count 2 2006.229.15:52:04.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:52:04.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.15:52:04.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.15:52:04.00#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:04.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:52:04.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:52:04.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:52:04.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:52:04.12#ibcon#first serial, iclass 3, count 0 2006.229.15:52:04.12#ibcon#enter sib2, iclass 3, count 0 2006.229.15:52:04.12#ibcon#flushed, iclass 3, count 0 2006.229.15:52:04.12#ibcon#about to write, iclass 3, count 0 2006.229.15:52:04.12#ibcon#wrote, iclass 3, count 0 2006.229.15:52:04.12#ibcon#about to read 3, iclass 3, count 0 2006.229.15:52:04.14#ibcon#read 3, iclass 3, count 0 2006.229.15:52:04.14#ibcon#about to read 4, iclass 3, count 0 2006.229.15:52:04.14#ibcon#read 4, iclass 3, count 0 2006.229.15:52:04.14#ibcon#about to read 5, iclass 3, count 0 2006.229.15:52:04.14#ibcon#read 5, iclass 3, count 0 2006.229.15:52:04.14#ibcon#about to read 6, iclass 3, count 0 2006.229.15:52:04.14#ibcon#read 6, iclass 3, count 0 2006.229.15:52:04.14#ibcon#end of sib2, iclass 3, count 0 2006.229.15:52:04.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:52:04.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:52:04.14#ibcon#[27=USB\r\n] 2006.229.15:52:04.14#ibcon#*before write, iclass 3, count 0 2006.229.15:52:04.14#ibcon#enter sib2, iclass 3, count 0 2006.229.15:52:04.14#ibcon#flushed, iclass 3, count 0 2006.229.15:52:04.14#ibcon#about to write, iclass 3, count 0 2006.229.15:52:04.14#ibcon#wrote, iclass 3, count 0 2006.229.15:52:04.14#ibcon#about to read 3, iclass 3, count 0 2006.229.15:52:04.17#ibcon#read 3, iclass 3, count 0 2006.229.15:52:04.17#ibcon#about to read 4, iclass 3, count 0 2006.229.15:52:04.17#ibcon#read 4, iclass 3, count 0 2006.229.15:52:04.17#ibcon#about to read 5, iclass 3, count 0 2006.229.15:52:04.17#ibcon#read 5, iclass 3, count 0 2006.229.15:52:04.17#ibcon#about to read 6, iclass 3, count 0 2006.229.15:52:04.17#ibcon#read 6, iclass 3, count 0 2006.229.15:52:04.17#ibcon#end of sib2, iclass 3, count 0 2006.229.15:52:04.17#ibcon#*after write, iclass 3, count 0 2006.229.15:52:04.17#ibcon#*before return 0, iclass 3, count 0 2006.229.15:52:04.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:52:04.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.15:52:04.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:52:04.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:52:04.17$vck44/vblo=2,634.99 2006.229.15:52:04.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.15:52:04.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.15:52:04.17#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:04.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:04.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:04.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:04.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.15:52:04.17#ibcon#first serial, iclass 5, count 0 2006.229.15:52:04.17#ibcon#enter sib2, iclass 5, count 0 2006.229.15:52:04.17#ibcon#flushed, iclass 5, count 0 2006.229.15:52:04.17#ibcon#about to write, iclass 5, count 0 2006.229.15:52:04.17#ibcon#wrote, iclass 5, count 0 2006.229.15:52:04.17#ibcon#about to read 3, iclass 5, count 0 2006.229.15:52:04.19#ibcon#read 3, iclass 5, count 0 2006.229.15:52:04.19#ibcon#about to read 4, iclass 5, count 0 2006.229.15:52:04.19#ibcon#read 4, iclass 5, count 0 2006.229.15:52:04.19#ibcon#about to read 5, iclass 5, count 0 2006.229.15:52:04.19#ibcon#read 5, iclass 5, count 0 2006.229.15:52:04.19#ibcon#about to read 6, iclass 5, count 0 2006.229.15:52:04.19#ibcon#read 6, iclass 5, count 0 2006.229.15:52:04.19#ibcon#end of sib2, iclass 5, count 0 2006.229.15:52:04.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.15:52:04.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.15:52:04.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:52:04.19#ibcon#*before write, iclass 5, count 0 2006.229.15:52:04.19#ibcon#enter sib2, iclass 5, count 0 2006.229.15:52:04.19#ibcon#flushed, iclass 5, count 0 2006.229.15:52:04.19#ibcon#about to write, iclass 5, count 0 2006.229.15:52:04.19#ibcon#wrote, iclass 5, count 0 2006.229.15:52:04.19#ibcon#about to read 3, iclass 5, count 0 2006.229.15:52:04.23#ibcon#read 3, iclass 5, count 0 2006.229.15:52:04.23#ibcon#about to read 4, iclass 5, count 0 2006.229.15:52:04.23#ibcon#read 4, iclass 5, count 0 2006.229.15:52:04.23#ibcon#about to read 5, iclass 5, count 0 2006.229.15:52:04.23#ibcon#read 5, iclass 5, count 0 2006.229.15:52:04.23#ibcon#about to read 6, iclass 5, count 0 2006.229.15:52:04.23#ibcon#read 6, iclass 5, count 0 2006.229.15:52:04.23#ibcon#end of sib2, iclass 5, count 0 2006.229.15:52:04.23#ibcon#*after write, iclass 5, count 0 2006.229.15:52:04.23#ibcon#*before return 0, iclass 5, count 0 2006.229.15:52:04.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:04.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.15:52:04.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.15:52:04.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.15:52:04.23$vck44/vb=2,4 2006.229.15:52:04.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.15:52:04.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.15:52:04.23#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:04.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:04.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:04.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:04.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.15:52:04.29#ibcon#first serial, iclass 7, count 2 2006.229.15:52:04.29#ibcon#enter sib2, iclass 7, count 2 2006.229.15:52:04.29#ibcon#flushed, iclass 7, count 2 2006.229.15:52:04.29#ibcon#about to write, iclass 7, count 2 2006.229.15:52:04.29#ibcon#wrote, iclass 7, count 2 2006.229.15:52:04.29#ibcon#about to read 3, iclass 7, count 2 2006.229.15:52:04.31#ibcon#read 3, iclass 7, count 2 2006.229.15:52:04.31#ibcon#about to read 4, iclass 7, count 2 2006.229.15:52:04.31#ibcon#read 4, iclass 7, count 2 2006.229.15:52:04.31#ibcon#about to read 5, iclass 7, count 2 2006.229.15:52:04.31#ibcon#read 5, iclass 7, count 2 2006.229.15:52:04.31#ibcon#about to read 6, iclass 7, count 2 2006.229.15:52:04.31#ibcon#read 6, iclass 7, count 2 2006.229.15:52:04.31#ibcon#end of sib2, iclass 7, count 2 2006.229.15:52:04.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.15:52:04.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.15:52:04.31#ibcon#[27=AT02-04\r\n] 2006.229.15:52:04.31#ibcon#*before write, iclass 7, count 2 2006.229.15:52:04.31#ibcon#enter sib2, iclass 7, count 2 2006.229.15:52:04.31#ibcon#flushed, iclass 7, count 2 2006.229.15:52:04.31#ibcon#about to write, iclass 7, count 2 2006.229.15:52:04.31#ibcon#wrote, iclass 7, count 2 2006.229.15:52:04.31#ibcon#about to read 3, iclass 7, count 2 2006.229.15:52:04.34#ibcon#read 3, iclass 7, count 2 2006.229.15:52:04.34#ibcon#about to read 4, iclass 7, count 2 2006.229.15:52:04.34#ibcon#read 4, iclass 7, count 2 2006.229.15:52:04.34#ibcon#about to read 5, iclass 7, count 2 2006.229.15:52:04.34#ibcon#read 5, iclass 7, count 2 2006.229.15:52:04.34#ibcon#about to read 6, iclass 7, count 2 2006.229.15:52:04.34#ibcon#read 6, iclass 7, count 2 2006.229.15:52:04.34#ibcon#end of sib2, iclass 7, count 2 2006.229.15:52:04.34#ibcon#*after write, iclass 7, count 2 2006.229.15:52:04.34#ibcon#*before return 0, iclass 7, count 2 2006.229.15:52:04.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:04.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.15:52:04.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.15:52:04.34#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:04.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:04.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:04.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:04.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.15:52:04.46#ibcon#first serial, iclass 7, count 0 2006.229.15:52:04.46#ibcon#enter sib2, iclass 7, count 0 2006.229.15:52:04.46#ibcon#flushed, iclass 7, count 0 2006.229.15:52:04.46#ibcon#about to write, iclass 7, count 0 2006.229.15:52:04.46#ibcon#wrote, iclass 7, count 0 2006.229.15:52:04.46#ibcon#about to read 3, iclass 7, count 0 2006.229.15:52:04.48#ibcon#read 3, iclass 7, count 0 2006.229.15:52:04.48#ibcon#about to read 4, iclass 7, count 0 2006.229.15:52:04.48#ibcon#read 4, iclass 7, count 0 2006.229.15:52:04.48#ibcon#about to read 5, iclass 7, count 0 2006.229.15:52:04.48#ibcon#read 5, iclass 7, count 0 2006.229.15:52:04.48#ibcon#about to read 6, iclass 7, count 0 2006.229.15:52:04.48#ibcon#read 6, iclass 7, count 0 2006.229.15:52:04.48#ibcon#end of sib2, iclass 7, count 0 2006.229.15:52:04.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.15:52:04.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.15:52:04.48#ibcon#[27=USB\r\n] 2006.229.15:52:04.48#ibcon#*before write, iclass 7, count 0 2006.229.15:52:04.48#ibcon#enter sib2, iclass 7, count 0 2006.229.15:52:04.48#ibcon#flushed, iclass 7, count 0 2006.229.15:52:04.48#ibcon#about to write, iclass 7, count 0 2006.229.15:52:04.48#ibcon#wrote, iclass 7, count 0 2006.229.15:52:04.48#ibcon#about to read 3, iclass 7, count 0 2006.229.15:52:04.51#ibcon#read 3, iclass 7, count 0 2006.229.15:52:04.51#ibcon#about to read 4, iclass 7, count 0 2006.229.15:52:04.51#ibcon#read 4, iclass 7, count 0 2006.229.15:52:04.51#ibcon#about to read 5, iclass 7, count 0 2006.229.15:52:04.51#ibcon#read 5, iclass 7, count 0 2006.229.15:52:04.51#ibcon#about to read 6, iclass 7, count 0 2006.229.15:52:04.51#ibcon#read 6, iclass 7, count 0 2006.229.15:52:04.51#ibcon#end of sib2, iclass 7, count 0 2006.229.15:52:04.51#ibcon#*after write, iclass 7, count 0 2006.229.15:52:04.51#ibcon#*before return 0, iclass 7, count 0 2006.229.15:52:04.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:04.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.15:52:04.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.15:52:04.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.15:52:04.51$vck44/vblo=3,649.99 2006.229.15:52:04.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.15:52:04.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.15:52:04.51#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:04.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:04.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:04.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:04.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.15:52:04.51#ibcon#first serial, iclass 11, count 0 2006.229.15:52:04.51#ibcon#enter sib2, iclass 11, count 0 2006.229.15:52:04.51#ibcon#flushed, iclass 11, count 0 2006.229.15:52:04.51#ibcon#about to write, iclass 11, count 0 2006.229.15:52:04.51#ibcon#wrote, iclass 11, count 0 2006.229.15:52:04.51#ibcon#about to read 3, iclass 11, count 0 2006.229.15:52:04.53#ibcon#read 3, iclass 11, count 0 2006.229.15:52:04.53#ibcon#about to read 4, iclass 11, count 0 2006.229.15:52:04.53#ibcon#read 4, iclass 11, count 0 2006.229.15:52:04.53#ibcon#about to read 5, iclass 11, count 0 2006.229.15:52:04.53#ibcon#read 5, iclass 11, count 0 2006.229.15:52:04.53#ibcon#about to read 6, iclass 11, count 0 2006.229.15:52:04.53#ibcon#read 6, iclass 11, count 0 2006.229.15:52:04.53#ibcon#end of sib2, iclass 11, count 0 2006.229.15:52:04.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.15:52:04.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.15:52:04.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:52:04.53#ibcon#*before write, iclass 11, count 0 2006.229.15:52:04.53#ibcon#enter sib2, iclass 11, count 0 2006.229.15:52:04.53#ibcon#flushed, iclass 11, count 0 2006.229.15:52:04.53#ibcon#about to write, iclass 11, count 0 2006.229.15:52:04.53#ibcon#wrote, iclass 11, count 0 2006.229.15:52:04.53#ibcon#about to read 3, iclass 11, count 0 2006.229.15:52:04.57#ibcon#read 3, iclass 11, count 0 2006.229.15:52:04.57#ibcon#about to read 4, iclass 11, count 0 2006.229.15:52:04.57#ibcon#read 4, iclass 11, count 0 2006.229.15:52:04.57#ibcon#about to read 5, iclass 11, count 0 2006.229.15:52:04.57#ibcon#read 5, iclass 11, count 0 2006.229.15:52:04.57#ibcon#about to read 6, iclass 11, count 0 2006.229.15:52:04.57#ibcon#read 6, iclass 11, count 0 2006.229.15:52:04.57#ibcon#end of sib2, iclass 11, count 0 2006.229.15:52:04.57#ibcon#*after write, iclass 11, count 0 2006.229.15:52:04.57#ibcon#*before return 0, iclass 11, count 0 2006.229.15:52:04.57#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:04.57#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.15:52:04.57#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.15:52:04.57#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.15:52:04.57$vck44/vb=3,4 2006.229.15:52:04.57#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.15:52:04.57#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.15:52:04.57#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:04.57#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:04.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:04.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:04.63#ibcon#enter wrdev, iclass 13, count 2 2006.229.15:52:04.63#ibcon#first serial, iclass 13, count 2 2006.229.15:52:04.63#ibcon#enter sib2, iclass 13, count 2 2006.229.15:52:04.63#ibcon#flushed, iclass 13, count 2 2006.229.15:52:04.63#ibcon#about to write, iclass 13, count 2 2006.229.15:52:04.63#ibcon#wrote, iclass 13, count 2 2006.229.15:52:04.63#ibcon#about to read 3, iclass 13, count 2 2006.229.15:52:04.65#ibcon#read 3, iclass 13, count 2 2006.229.15:52:04.65#ibcon#about to read 4, iclass 13, count 2 2006.229.15:52:04.65#ibcon#read 4, iclass 13, count 2 2006.229.15:52:04.65#ibcon#about to read 5, iclass 13, count 2 2006.229.15:52:04.65#ibcon#read 5, iclass 13, count 2 2006.229.15:52:04.65#ibcon#about to read 6, iclass 13, count 2 2006.229.15:52:04.65#ibcon#read 6, iclass 13, count 2 2006.229.15:52:04.65#ibcon#end of sib2, iclass 13, count 2 2006.229.15:52:04.65#ibcon#*mode == 0, iclass 13, count 2 2006.229.15:52:04.65#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.15:52:04.65#ibcon#[27=AT03-04\r\n] 2006.229.15:52:04.65#ibcon#*before write, iclass 13, count 2 2006.229.15:52:04.65#ibcon#enter sib2, iclass 13, count 2 2006.229.15:52:04.65#ibcon#flushed, iclass 13, count 2 2006.229.15:52:04.65#ibcon#about to write, iclass 13, count 2 2006.229.15:52:04.65#ibcon#wrote, iclass 13, count 2 2006.229.15:52:04.65#ibcon#about to read 3, iclass 13, count 2 2006.229.15:52:04.68#ibcon#read 3, iclass 13, count 2 2006.229.15:52:04.68#ibcon#about to read 4, iclass 13, count 2 2006.229.15:52:04.68#ibcon#read 4, iclass 13, count 2 2006.229.15:52:04.68#ibcon#about to read 5, iclass 13, count 2 2006.229.15:52:04.68#ibcon#read 5, iclass 13, count 2 2006.229.15:52:04.68#ibcon#about to read 6, iclass 13, count 2 2006.229.15:52:04.68#ibcon#read 6, iclass 13, count 2 2006.229.15:52:04.68#ibcon#end of sib2, iclass 13, count 2 2006.229.15:52:04.68#ibcon#*after write, iclass 13, count 2 2006.229.15:52:04.68#ibcon#*before return 0, iclass 13, count 2 2006.229.15:52:04.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:04.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.15:52:04.68#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.15:52:04.68#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:04.68#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:04.80#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:04.80#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:04.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.15:52:04.80#ibcon#first serial, iclass 13, count 0 2006.229.15:52:04.80#ibcon#enter sib2, iclass 13, count 0 2006.229.15:52:04.80#ibcon#flushed, iclass 13, count 0 2006.229.15:52:04.80#ibcon#about to write, iclass 13, count 0 2006.229.15:52:04.80#ibcon#wrote, iclass 13, count 0 2006.229.15:52:04.80#ibcon#about to read 3, iclass 13, count 0 2006.229.15:52:04.82#ibcon#read 3, iclass 13, count 0 2006.229.15:52:04.82#ibcon#about to read 4, iclass 13, count 0 2006.229.15:52:04.82#ibcon#read 4, iclass 13, count 0 2006.229.15:52:04.82#ibcon#about to read 5, iclass 13, count 0 2006.229.15:52:04.82#ibcon#read 5, iclass 13, count 0 2006.229.15:52:04.82#ibcon#about to read 6, iclass 13, count 0 2006.229.15:52:04.82#ibcon#read 6, iclass 13, count 0 2006.229.15:52:04.82#ibcon#end of sib2, iclass 13, count 0 2006.229.15:52:04.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.15:52:04.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.15:52:04.82#ibcon#[27=USB\r\n] 2006.229.15:52:04.82#ibcon#*before write, iclass 13, count 0 2006.229.15:52:04.82#ibcon#enter sib2, iclass 13, count 0 2006.229.15:52:04.82#ibcon#flushed, iclass 13, count 0 2006.229.15:52:04.82#ibcon#about to write, iclass 13, count 0 2006.229.15:52:04.82#ibcon#wrote, iclass 13, count 0 2006.229.15:52:04.82#ibcon#about to read 3, iclass 13, count 0 2006.229.15:52:04.85#ibcon#read 3, iclass 13, count 0 2006.229.15:52:04.85#ibcon#about to read 4, iclass 13, count 0 2006.229.15:52:04.85#ibcon#read 4, iclass 13, count 0 2006.229.15:52:04.85#ibcon#about to read 5, iclass 13, count 0 2006.229.15:52:04.85#ibcon#read 5, iclass 13, count 0 2006.229.15:52:04.85#ibcon#about to read 6, iclass 13, count 0 2006.229.15:52:04.85#ibcon#read 6, iclass 13, count 0 2006.229.15:52:04.85#ibcon#end of sib2, iclass 13, count 0 2006.229.15:52:04.85#ibcon#*after write, iclass 13, count 0 2006.229.15:52:04.85#ibcon#*before return 0, iclass 13, count 0 2006.229.15:52:04.85#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:04.85#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.15:52:04.85#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.15:52:04.85#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.15:52:04.85$vck44/vblo=4,679.99 2006.229.15:52:04.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.15:52:04.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.15:52:04.85#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:04.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:04.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:04.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:04.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.15:52:04.85#ibcon#first serial, iclass 15, count 0 2006.229.15:52:04.85#ibcon#enter sib2, iclass 15, count 0 2006.229.15:52:04.85#ibcon#flushed, iclass 15, count 0 2006.229.15:52:04.85#ibcon#about to write, iclass 15, count 0 2006.229.15:52:04.85#ibcon#wrote, iclass 15, count 0 2006.229.15:52:04.85#ibcon#about to read 3, iclass 15, count 0 2006.229.15:52:04.87#ibcon#read 3, iclass 15, count 0 2006.229.15:52:04.87#ibcon#about to read 4, iclass 15, count 0 2006.229.15:52:04.87#ibcon#read 4, iclass 15, count 0 2006.229.15:52:04.87#ibcon#about to read 5, iclass 15, count 0 2006.229.15:52:04.87#ibcon#read 5, iclass 15, count 0 2006.229.15:52:04.87#ibcon#about to read 6, iclass 15, count 0 2006.229.15:52:04.87#ibcon#read 6, iclass 15, count 0 2006.229.15:52:04.87#ibcon#end of sib2, iclass 15, count 0 2006.229.15:52:04.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.15:52:04.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.15:52:04.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:52:04.87#ibcon#*before write, iclass 15, count 0 2006.229.15:52:04.87#ibcon#enter sib2, iclass 15, count 0 2006.229.15:52:04.87#ibcon#flushed, iclass 15, count 0 2006.229.15:52:04.87#ibcon#about to write, iclass 15, count 0 2006.229.15:52:04.87#ibcon#wrote, iclass 15, count 0 2006.229.15:52:04.87#ibcon#about to read 3, iclass 15, count 0 2006.229.15:52:04.91#ibcon#read 3, iclass 15, count 0 2006.229.15:52:04.91#ibcon#about to read 4, iclass 15, count 0 2006.229.15:52:04.91#ibcon#read 4, iclass 15, count 0 2006.229.15:52:04.91#ibcon#about to read 5, iclass 15, count 0 2006.229.15:52:04.91#ibcon#read 5, iclass 15, count 0 2006.229.15:52:04.91#ibcon#about to read 6, iclass 15, count 0 2006.229.15:52:04.91#ibcon#read 6, iclass 15, count 0 2006.229.15:52:04.91#ibcon#end of sib2, iclass 15, count 0 2006.229.15:52:04.91#ibcon#*after write, iclass 15, count 0 2006.229.15:52:04.91#ibcon#*before return 0, iclass 15, count 0 2006.229.15:52:04.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:04.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.15:52:04.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.15:52:04.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.15:52:04.91$vck44/vb=4,4 2006.229.15:52:04.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.15:52:04.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.15:52:04.91#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:04.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:04.97#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:04.97#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:04.97#ibcon#enter wrdev, iclass 17, count 2 2006.229.15:52:04.97#ibcon#first serial, iclass 17, count 2 2006.229.15:52:04.97#ibcon#enter sib2, iclass 17, count 2 2006.229.15:52:04.97#ibcon#flushed, iclass 17, count 2 2006.229.15:52:04.97#ibcon#about to write, iclass 17, count 2 2006.229.15:52:04.97#ibcon#wrote, iclass 17, count 2 2006.229.15:52:04.97#ibcon#about to read 3, iclass 17, count 2 2006.229.15:52:04.99#ibcon#read 3, iclass 17, count 2 2006.229.15:52:04.99#ibcon#about to read 4, iclass 17, count 2 2006.229.15:52:04.99#ibcon#read 4, iclass 17, count 2 2006.229.15:52:04.99#ibcon#about to read 5, iclass 17, count 2 2006.229.15:52:04.99#ibcon#read 5, iclass 17, count 2 2006.229.15:52:04.99#ibcon#about to read 6, iclass 17, count 2 2006.229.15:52:04.99#ibcon#read 6, iclass 17, count 2 2006.229.15:52:04.99#ibcon#end of sib2, iclass 17, count 2 2006.229.15:52:04.99#ibcon#*mode == 0, iclass 17, count 2 2006.229.15:52:04.99#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.15:52:04.99#ibcon#[27=AT04-04\r\n] 2006.229.15:52:04.99#ibcon#*before write, iclass 17, count 2 2006.229.15:52:04.99#ibcon#enter sib2, iclass 17, count 2 2006.229.15:52:04.99#ibcon#flushed, iclass 17, count 2 2006.229.15:52:04.99#ibcon#about to write, iclass 17, count 2 2006.229.15:52:04.99#ibcon#wrote, iclass 17, count 2 2006.229.15:52:04.99#ibcon#about to read 3, iclass 17, count 2 2006.229.15:52:05.02#ibcon#read 3, iclass 17, count 2 2006.229.15:52:05.02#ibcon#about to read 4, iclass 17, count 2 2006.229.15:52:05.02#ibcon#read 4, iclass 17, count 2 2006.229.15:52:05.02#ibcon#about to read 5, iclass 17, count 2 2006.229.15:52:05.02#ibcon#read 5, iclass 17, count 2 2006.229.15:52:05.02#ibcon#about to read 6, iclass 17, count 2 2006.229.15:52:05.02#ibcon#read 6, iclass 17, count 2 2006.229.15:52:05.02#ibcon#end of sib2, iclass 17, count 2 2006.229.15:52:05.02#ibcon#*after write, iclass 17, count 2 2006.229.15:52:05.02#ibcon#*before return 0, iclass 17, count 2 2006.229.15:52:05.02#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:05.02#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.15:52:05.02#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.15:52:05.02#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:05.02#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:05.14#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:05.14#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:05.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.15:52:05.14#ibcon#first serial, iclass 17, count 0 2006.229.15:52:05.14#ibcon#enter sib2, iclass 17, count 0 2006.229.15:52:05.14#ibcon#flushed, iclass 17, count 0 2006.229.15:52:05.14#ibcon#about to write, iclass 17, count 0 2006.229.15:52:05.14#ibcon#wrote, iclass 17, count 0 2006.229.15:52:05.14#ibcon#about to read 3, iclass 17, count 0 2006.229.15:52:05.15#abcon#<5=/06 1.2 1.9 27.191001001.8\r\n> 2006.229.15:52:05.16#ibcon#read 3, iclass 17, count 0 2006.229.15:52:05.16#ibcon#about to read 4, iclass 17, count 0 2006.229.15:52:05.16#ibcon#read 4, iclass 17, count 0 2006.229.15:52:05.16#ibcon#about to read 5, iclass 17, count 0 2006.229.15:52:05.16#ibcon#read 5, iclass 17, count 0 2006.229.15:52:05.16#ibcon#about to read 6, iclass 17, count 0 2006.229.15:52:05.16#ibcon#read 6, iclass 17, count 0 2006.229.15:52:05.16#ibcon#end of sib2, iclass 17, count 0 2006.229.15:52:05.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.15:52:05.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.15:52:05.16#ibcon#[27=USB\r\n] 2006.229.15:52:05.16#ibcon#*before write, iclass 17, count 0 2006.229.15:52:05.16#ibcon#enter sib2, iclass 17, count 0 2006.229.15:52:05.16#ibcon#flushed, iclass 17, count 0 2006.229.15:52:05.16#ibcon#about to write, iclass 17, count 0 2006.229.15:52:05.16#ibcon#wrote, iclass 17, count 0 2006.229.15:52:05.16#ibcon#about to read 3, iclass 17, count 0 2006.229.15:52:05.17#abcon#{5=INTERFACE CLEAR} 2006.229.15:52:05.19#ibcon#read 3, iclass 17, count 0 2006.229.15:52:05.19#ibcon#about to read 4, iclass 17, count 0 2006.229.15:52:05.19#ibcon#read 4, iclass 17, count 0 2006.229.15:52:05.19#ibcon#about to read 5, iclass 17, count 0 2006.229.15:52:05.19#ibcon#read 5, iclass 17, count 0 2006.229.15:52:05.19#ibcon#about to read 6, iclass 17, count 0 2006.229.15:52:05.19#ibcon#read 6, iclass 17, count 0 2006.229.15:52:05.19#ibcon#end of sib2, iclass 17, count 0 2006.229.15:52:05.19#ibcon#*after write, iclass 17, count 0 2006.229.15:52:05.19#ibcon#*before return 0, iclass 17, count 0 2006.229.15:52:05.19#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:05.19#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.15:52:05.19#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.15:52:05.19#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.15:52:05.19$vck44/vblo=5,709.99 2006.229.15:52:05.19#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:52:05.19#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:52:05.19#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:05.19#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:52:05.19#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:52:05.19#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:52:05.19#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:52:05.19#ibcon#first serial, iclass 22, count 0 2006.229.15:52:05.19#ibcon#enter sib2, iclass 22, count 0 2006.229.15:52:05.19#ibcon#flushed, iclass 22, count 0 2006.229.15:52:05.19#ibcon#about to write, iclass 22, count 0 2006.229.15:52:05.19#ibcon#wrote, iclass 22, count 0 2006.229.15:52:05.19#ibcon#about to read 3, iclass 22, count 0 2006.229.15:52:05.21#ibcon#read 3, iclass 22, count 0 2006.229.15:52:05.21#ibcon#about to read 4, iclass 22, count 0 2006.229.15:52:05.21#ibcon#read 4, iclass 22, count 0 2006.229.15:52:05.21#ibcon#about to read 5, iclass 22, count 0 2006.229.15:52:05.21#ibcon#read 5, iclass 22, count 0 2006.229.15:52:05.21#ibcon#about to read 6, iclass 22, count 0 2006.229.15:52:05.21#ibcon#read 6, iclass 22, count 0 2006.229.15:52:05.21#ibcon#end of sib2, iclass 22, count 0 2006.229.15:52:05.21#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:52:05.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:52:05.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:52:05.21#ibcon#*before write, iclass 22, count 0 2006.229.15:52:05.21#ibcon#enter sib2, iclass 22, count 0 2006.229.15:52:05.21#ibcon#flushed, iclass 22, count 0 2006.229.15:52:05.21#ibcon#about to write, iclass 22, count 0 2006.229.15:52:05.21#ibcon#wrote, iclass 22, count 0 2006.229.15:52:05.21#ibcon#about to read 3, iclass 22, count 0 2006.229.15:52:05.23#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:52:05.25#ibcon#read 3, iclass 22, count 0 2006.229.15:52:05.25#ibcon#about to read 4, iclass 22, count 0 2006.229.15:52:05.25#ibcon#read 4, iclass 22, count 0 2006.229.15:52:05.25#ibcon#about to read 5, iclass 22, count 0 2006.229.15:52:05.25#ibcon#read 5, iclass 22, count 0 2006.229.15:52:05.25#ibcon#about to read 6, iclass 22, count 0 2006.229.15:52:05.25#ibcon#read 6, iclass 22, count 0 2006.229.15:52:05.25#ibcon#end of sib2, iclass 22, count 0 2006.229.15:52:05.25#ibcon#*after write, iclass 22, count 0 2006.229.15:52:05.25#ibcon#*before return 0, iclass 22, count 0 2006.229.15:52:05.25#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:52:05.25#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:52:05.25#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:52:05.25#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:52:05.25$vck44/vb=5,4 2006.229.15:52:05.25#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.15:52:05.25#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.15:52:05.25#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:05.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:05.31#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:05.31#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:05.31#ibcon#enter wrdev, iclass 25, count 2 2006.229.15:52:05.31#ibcon#first serial, iclass 25, count 2 2006.229.15:52:05.31#ibcon#enter sib2, iclass 25, count 2 2006.229.15:52:05.31#ibcon#flushed, iclass 25, count 2 2006.229.15:52:05.31#ibcon#about to write, iclass 25, count 2 2006.229.15:52:05.31#ibcon#wrote, iclass 25, count 2 2006.229.15:52:05.31#ibcon#about to read 3, iclass 25, count 2 2006.229.15:52:05.33#ibcon#read 3, iclass 25, count 2 2006.229.15:52:05.33#ibcon#about to read 4, iclass 25, count 2 2006.229.15:52:05.33#ibcon#read 4, iclass 25, count 2 2006.229.15:52:05.33#ibcon#about to read 5, iclass 25, count 2 2006.229.15:52:05.33#ibcon#read 5, iclass 25, count 2 2006.229.15:52:05.33#ibcon#about to read 6, iclass 25, count 2 2006.229.15:52:05.33#ibcon#read 6, iclass 25, count 2 2006.229.15:52:05.33#ibcon#end of sib2, iclass 25, count 2 2006.229.15:52:05.33#ibcon#*mode == 0, iclass 25, count 2 2006.229.15:52:05.33#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.15:52:05.33#ibcon#[27=AT05-04\r\n] 2006.229.15:52:05.33#ibcon#*before write, iclass 25, count 2 2006.229.15:52:05.33#ibcon#enter sib2, iclass 25, count 2 2006.229.15:52:05.33#ibcon#flushed, iclass 25, count 2 2006.229.15:52:05.33#ibcon#about to write, iclass 25, count 2 2006.229.15:52:05.33#ibcon#wrote, iclass 25, count 2 2006.229.15:52:05.33#ibcon#about to read 3, iclass 25, count 2 2006.229.15:52:05.36#ibcon#read 3, iclass 25, count 2 2006.229.15:52:05.36#ibcon#about to read 4, iclass 25, count 2 2006.229.15:52:05.36#ibcon#read 4, iclass 25, count 2 2006.229.15:52:05.36#ibcon#about to read 5, iclass 25, count 2 2006.229.15:52:05.36#ibcon#read 5, iclass 25, count 2 2006.229.15:52:05.36#ibcon#about to read 6, iclass 25, count 2 2006.229.15:52:05.36#ibcon#read 6, iclass 25, count 2 2006.229.15:52:05.36#ibcon#end of sib2, iclass 25, count 2 2006.229.15:52:05.36#ibcon#*after write, iclass 25, count 2 2006.229.15:52:05.36#ibcon#*before return 0, iclass 25, count 2 2006.229.15:52:05.36#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:05.36#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.15:52:05.36#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.15:52:05.36#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:05.36#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:05.48#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:05.48#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:05.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.15:52:05.48#ibcon#first serial, iclass 25, count 0 2006.229.15:52:05.48#ibcon#enter sib2, iclass 25, count 0 2006.229.15:52:05.48#ibcon#flushed, iclass 25, count 0 2006.229.15:52:05.48#ibcon#about to write, iclass 25, count 0 2006.229.15:52:05.48#ibcon#wrote, iclass 25, count 0 2006.229.15:52:05.48#ibcon#about to read 3, iclass 25, count 0 2006.229.15:52:05.50#ibcon#read 3, iclass 25, count 0 2006.229.15:52:05.50#ibcon#about to read 4, iclass 25, count 0 2006.229.15:52:05.50#ibcon#read 4, iclass 25, count 0 2006.229.15:52:05.50#ibcon#about to read 5, iclass 25, count 0 2006.229.15:52:05.50#ibcon#read 5, iclass 25, count 0 2006.229.15:52:05.50#ibcon#about to read 6, iclass 25, count 0 2006.229.15:52:05.50#ibcon#read 6, iclass 25, count 0 2006.229.15:52:05.50#ibcon#end of sib2, iclass 25, count 0 2006.229.15:52:05.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.15:52:05.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.15:52:05.50#ibcon#[27=USB\r\n] 2006.229.15:52:05.50#ibcon#*before write, iclass 25, count 0 2006.229.15:52:05.50#ibcon#enter sib2, iclass 25, count 0 2006.229.15:52:05.50#ibcon#flushed, iclass 25, count 0 2006.229.15:52:05.50#ibcon#about to write, iclass 25, count 0 2006.229.15:52:05.50#ibcon#wrote, iclass 25, count 0 2006.229.15:52:05.50#ibcon#about to read 3, iclass 25, count 0 2006.229.15:52:05.53#ibcon#read 3, iclass 25, count 0 2006.229.15:52:05.53#ibcon#about to read 4, iclass 25, count 0 2006.229.15:52:05.53#ibcon#read 4, iclass 25, count 0 2006.229.15:52:05.53#ibcon#about to read 5, iclass 25, count 0 2006.229.15:52:05.53#ibcon#read 5, iclass 25, count 0 2006.229.15:52:05.53#ibcon#about to read 6, iclass 25, count 0 2006.229.15:52:05.53#ibcon#read 6, iclass 25, count 0 2006.229.15:52:05.53#ibcon#end of sib2, iclass 25, count 0 2006.229.15:52:05.53#ibcon#*after write, iclass 25, count 0 2006.229.15:52:05.53#ibcon#*before return 0, iclass 25, count 0 2006.229.15:52:05.53#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:05.53#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.15:52:05.53#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.15:52:05.53#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.15:52:05.53$vck44/vblo=6,719.99 2006.229.15:52:05.53#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.15:52:05.53#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.15:52:05.53#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:05.53#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:05.53#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:05.53#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:05.53#ibcon#enter wrdev, iclass 27, count 0 2006.229.15:52:05.53#ibcon#first serial, iclass 27, count 0 2006.229.15:52:05.53#ibcon#enter sib2, iclass 27, count 0 2006.229.15:52:05.53#ibcon#flushed, iclass 27, count 0 2006.229.15:52:05.53#ibcon#about to write, iclass 27, count 0 2006.229.15:52:05.53#ibcon#wrote, iclass 27, count 0 2006.229.15:52:05.53#ibcon#about to read 3, iclass 27, count 0 2006.229.15:52:05.55#ibcon#read 3, iclass 27, count 0 2006.229.15:52:05.55#ibcon#about to read 4, iclass 27, count 0 2006.229.15:52:05.55#ibcon#read 4, iclass 27, count 0 2006.229.15:52:05.55#ibcon#about to read 5, iclass 27, count 0 2006.229.15:52:05.55#ibcon#read 5, iclass 27, count 0 2006.229.15:52:05.55#ibcon#about to read 6, iclass 27, count 0 2006.229.15:52:05.55#ibcon#read 6, iclass 27, count 0 2006.229.15:52:05.55#ibcon#end of sib2, iclass 27, count 0 2006.229.15:52:05.55#ibcon#*mode == 0, iclass 27, count 0 2006.229.15:52:05.55#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.15:52:05.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:52:05.55#ibcon#*before write, iclass 27, count 0 2006.229.15:52:05.55#ibcon#enter sib2, iclass 27, count 0 2006.229.15:52:05.55#ibcon#flushed, iclass 27, count 0 2006.229.15:52:05.55#ibcon#about to write, iclass 27, count 0 2006.229.15:52:05.55#ibcon#wrote, iclass 27, count 0 2006.229.15:52:05.55#ibcon#about to read 3, iclass 27, count 0 2006.229.15:52:05.59#ibcon#read 3, iclass 27, count 0 2006.229.15:52:05.59#ibcon#about to read 4, iclass 27, count 0 2006.229.15:52:05.59#ibcon#read 4, iclass 27, count 0 2006.229.15:52:05.59#ibcon#about to read 5, iclass 27, count 0 2006.229.15:52:05.59#ibcon#read 5, iclass 27, count 0 2006.229.15:52:05.59#ibcon#about to read 6, iclass 27, count 0 2006.229.15:52:05.59#ibcon#read 6, iclass 27, count 0 2006.229.15:52:05.59#ibcon#end of sib2, iclass 27, count 0 2006.229.15:52:05.59#ibcon#*after write, iclass 27, count 0 2006.229.15:52:05.59#ibcon#*before return 0, iclass 27, count 0 2006.229.15:52:05.59#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:05.59#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.15:52:05.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.15:52:05.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.15:52:05.59$vck44/vb=6,4 2006.229.15:52:05.59#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.15:52:05.59#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.15:52:05.59#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:05.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:05.65#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:05.65#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:05.65#ibcon#enter wrdev, iclass 29, count 2 2006.229.15:52:05.65#ibcon#first serial, iclass 29, count 2 2006.229.15:52:05.65#ibcon#enter sib2, iclass 29, count 2 2006.229.15:52:05.65#ibcon#flushed, iclass 29, count 2 2006.229.15:52:05.65#ibcon#about to write, iclass 29, count 2 2006.229.15:52:05.65#ibcon#wrote, iclass 29, count 2 2006.229.15:52:05.65#ibcon#about to read 3, iclass 29, count 2 2006.229.15:52:05.67#ibcon#read 3, iclass 29, count 2 2006.229.15:52:05.67#ibcon#about to read 4, iclass 29, count 2 2006.229.15:52:05.67#ibcon#read 4, iclass 29, count 2 2006.229.15:52:05.67#ibcon#about to read 5, iclass 29, count 2 2006.229.15:52:05.67#ibcon#read 5, iclass 29, count 2 2006.229.15:52:05.67#ibcon#about to read 6, iclass 29, count 2 2006.229.15:52:05.67#ibcon#read 6, iclass 29, count 2 2006.229.15:52:05.67#ibcon#end of sib2, iclass 29, count 2 2006.229.15:52:05.67#ibcon#*mode == 0, iclass 29, count 2 2006.229.15:52:05.67#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.15:52:05.67#ibcon#[27=AT06-04\r\n] 2006.229.15:52:05.67#ibcon#*before write, iclass 29, count 2 2006.229.15:52:05.67#ibcon#enter sib2, iclass 29, count 2 2006.229.15:52:05.67#ibcon#flushed, iclass 29, count 2 2006.229.15:52:05.67#ibcon#about to write, iclass 29, count 2 2006.229.15:52:05.67#ibcon#wrote, iclass 29, count 2 2006.229.15:52:05.67#ibcon#about to read 3, iclass 29, count 2 2006.229.15:52:05.70#ibcon#read 3, iclass 29, count 2 2006.229.15:52:05.70#ibcon#about to read 4, iclass 29, count 2 2006.229.15:52:05.70#ibcon#read 4, iclass 29, count 2 2006.229.15:52:05.70#ibcon#about to read 5, iclass 29, count 2 2006.229.15:52:05.70#ibcon#read 5, iclass 29, count 2 2006.229.15:52:05.70#ibcon#about to read 6, iclass 29, count 2 2006.229.15:52:05.70#ibcon#read 6, iclass 29, count 2 2006.229.15:52:05.70#ibcon#end of sib2, iclass 29, count 2 2006.229.15:52:05.70#ibcon#*after write, iclass 29, count 2 2006.229.15:52:05.70#ibcon#*before return 0, iclass 29, count 2 2006.229.15:52:05.70#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:05.70#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.15:52:05.70#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.15:52:05.70#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:05.70#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:05.82#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:05.82#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:05.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.15:52:05.82#ibcon#first serial, iclass 29, count 0 2006.229.15:52:05.82#ibcon#enter sib2, iclass 29, count 0 2006.229.15:52:05.82#ibcon#flushed, iclass 29, count 0 2006.229.15:52:05.82#ibcon#about to write, iclass 29, count 0 2006.229.15:52:05.82#ibcon#wrote, iclass 29, count 0 2006.229.15:52:05.82#ibcon#about to read 3, iclass 29, count 0 2006.229.15:52:05.84#ibcon#read 3, iclass 29, count 0 2006.229.15:52:05.84#ibcon#about to read 4, iclass 29, count 0 2006.229.15:52:05.84#ibcon#read 4, iclass 29, count 0 2006.229.15:52:05.84#ibcon#about to read 5, iclass 29, count 0 2006.229.15:52:05.84#ibcon#read 5, iclass 29, count 0 2006.229.15:52:05.84#ibcon#about to read 6, iclass 29, count 0 2006.229.15:52:05.84#ibcon#read 6, iclass 29, count 0 2006.229.15:52:05.84#ibcon#end of sib2, iclass 29, count 0 2006.229.15:52:05.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.15:52:05.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.15:52:05.84#ibcon#[27=USB\r\n] 2006.229.15:52:05.84#ibcon#*before write, iclass 29, count 0 2006.229.15:52:05.84#ibcon#enter sib2, iclass 29, count 0 2006.229.15:52:05.84#ibcon#flushed, iclass 29, count 0 2006.229.15:52:05.84#ibcon#about to write, iclass 29, count 0 2006.229.15:52:05.84#ibcon#wrote, iclass 29, count 0 2006.229.15:52:05.84#ibcon#about to read 3, iclass 29, count 0 2006.229.15:52:05.87#ibcon#read 3, iclass 29, count 0 2006.229.15:52:05.87#ibcon#about to read 4, iclass 29, count 0 2006.229.15:52:05.87#ibcon#read 4, iclass 29, count 0 2006.229.15:52:05.87#ibcon#about to read 5, iclass 29, count 0 2006.229.15:52:05.87#ibcon#read 5, iclass 29, count 0 2006.229.15:52:05.87#ibcon#about to read 6, iclass 29, count 0 2006.229.15:52:05.87#ibcon#read 6, iclass 29, count 0 2006.229.15:52:05.87#ibcon#end of sib2, iclass 29, count 0 2006.229.15:52:05.87#ibcon#*after write, iclass 29, count 0 2006.229.15:52:05.87#ibcon#*before return 0, iclass 29, count 0 2006.229.15:52:05.87#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:05.87#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.15:52:05.87#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.15:52:05.87#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.15:52:05.87$vck44/vblo=7,734.99 2006.229.15:52:05.87#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.15:52:05.87#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.15:52:05.87#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:05.87#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:05.87#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:05.87#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:05.87#ibcon#enter wrdev, iclass 31, count 0 2006.229.15:52:05.87#ibcon#first serial, iclass 31, count 0 2006.229.15:52:05.87#ibcon#enter sib2, iclass 31, count 0 2006.229.15:52:05.87#ibcon#flushed, iclass 31, count 0 2006.229.15:52:05.87#ibcon#about to write, iclass 31, count 0 2006.229.15:52:05.87#ibcon#wrote, iclass 31, count 0 2006.229.15:52:05.87#ibcon#about to read 3, iclass 31, count 0 2006.229.15:52:05.89#ibcon#read 3, iclass 31, count 0 2006.229.15:52:05.89#ibcon#about to read 4, iclass 31, count 0 2006.229.15:52:05.89#ibcon#read 4, iclass 31, count 0 2006.229.15:52:05.89#ibcon#about to read 5, iclass 31, count 0 2006.229.15:52:05.89#ibcon#read 5, iclass 31, count 0 2006.229.15:52:05.89#ibcon#about to read 6, iclass 31, count 0 2006.229.15:52:05.89#ibcon#read 6, iclass 31, count 0 2006.229.15:52:05.89#ibcon#end of sib2, iclass 31, count 0 2006.229.15:52:05.89#ibcon#*mode == 0, iclass 31, count 0 2006.229.15:52:05.89#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.15:52:05.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:52:05.89#ibcon#*before write, iclass 31, count 0 2006.229.15:52:05.89#ibcon#enter sib2, iclass 31, count 0 2006.229.15:52:05.89#ibcon#flushed, iclass 31, count 0 2006.229.15:52:05.89#ibcon#about to write, iclass 31, count 0 2006.229.15:52:05.89#ibcon#wrote, iclass 31, count 0 2006.229.15:52:05.89#ibcon#about to read 3, iclass 31, count 0 2006.229.15:52:05.93#ibcon#read 3, iclass 31, count 0 2006.229.15:52:05.93#ibcon#about to read 4, iclass 31, count 0 2006.229.15:52:05.93#ibcon#read 4, iclass 31, count 0 2006.229.15:52:05.93#ibcon#about to read 5, iclass 31, count 0 2006.229.15:52:05.93#ibcon#read 5, iclass 31, count 0 2006.229.15:52:05.93#ibcon#about to read 6, iclass 31, count 0 2006.229.15:52:05.93#ibcon#read 6, iclass 31, count 0 2006.229.15:52:05.93#ibcon#end of sib2, iclass 31, count 0 2006.229.15:52:05.93#ibcon#*after write, iclass 31, count 0 2006.229.15:52:05.93#ibcon#*before return 0, iclass 31, count 0 2006.229.15:52:05.93#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:05.93#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.15:52:05.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.15:52:05.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.15:52:05.93$vck44/vb=7,4 2006.229.15:52:05.93#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.15:52:05.93#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.15:52:05.93#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:05.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:05.99#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:05.99#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:05.99#ibcon#enter wrdev, iclass 33, count 2 2006.229.15:52:05.99#ibcon#first serial, iclass 33, count 2 2006.229.15:52:05.99#ibcon#enter sib2, iclass 33, count 2 2006.229.15:52:05.99#ibcon#flushed, iclass 33, count 2 2006.229.15:52:05.99#ibcon#about to write, iclass 33, count 2 2006.229.15:52:05.99#ibcon#wrote, iclass 33, count 2 2006.229.15:52:05.99#ibcon#about to read 3, iclass 33, count 2 2006.229.15:52:06.01#ibcon#read 3, iclass 33, count 2 2006.229.15:52:06.01#ibcon#about to read 4, iclass 33, count 2 2006.229.15:52:06.01#ibcon#read 4, iclass 33, count 2 2006.229.15:52:06.01#ibcon#about to read 5, iclass 33, count 2 2006.229.15:52:06.01#ibcon#read 5, iclass 33, count 2 2006.229.15:52:06.01#ibcon#about to read 6, iclass 33, count 2 2006.229.15:52:06.01#ibcon#read 6, iclass 33, count 2 2006.229.15:52:06.01#ibcon#end of sib2, iclass 33, count 2 2006.229.15:52:06.01#ibcon#*mode == 0, iclass 33, count 2 2006.229.15:52:06.01#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.15:52:06.01#ibcon#[27=AT07-04\r\n] 2006.229.15:52:06.01#ibcon#*before write, iclass 33, count 2 2006.229.15:52:06.01#ibcon#enter sib2, iclass 33, count 2 2006.229.15:52:06.01#ibcon#flushed, iclass 33, count 2 2006.229.15:52:06.01#ibcon#about to write, iclass 33, count 2 2006.229.15:52:06.01#ibcon#wrote, iclass 33, count 2 2006.229.15:52:06.01#ibcon#about to read 3, iclass 33, count 2 2006.229.15:52:06.04#ibcon#read 3, iclass 33, count 2 2006.229.15:52:06.04#ibcon#about to read 4, iclass 33, count 2 2006.229.15:52:06.04#ibcon#read 4, iclass 33, count 2 2006.229.15:52:06.04#ibcon#about to read 5, iclass 33, count 2 2006.229.15:52:06.04#ibcon#read 5, iclass 33, count 2 2006.229.15:52:06.04#ibcon#about to read 6, iclass 33, count 2 2006.229.15:52:06.04#ibcon#read 6, iclass 33, count 2 2006.229.15:52:06.04#ibcon#end of sib2, iclass 33, count 2 2006.229.15:52:06.04#ibcon#*after write, iclass 33, count 2 2006.229.15:52:06.04#ibcon#*before return 0, iclass 33, count 2 2006.229.15:52:06.04#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:06.04#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.15:52:06.04#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.15:52:06.04#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:06.04#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:06.16#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:06.16#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:06.16#ibcon#enter wrdev, iclass 33, count 0 2006.229.15:52:06.16#ibcon#first serial, iclass 33, count 0 2006.229.15:52:06.16#ibcon#enter sib2, iclass 33, count 0 2006.229.15:52:06.16#ibcon#flushed, iclass 33, count 0 2006.229.15:52:06.16#ibcon#about to write, iclass 33, count 0 2006.229.15:52:06.16#ibcon#wrote, iclass 33, count 0 2006.229.15:52:06.16#ibcon#about to read 3, iclass 33, count 0 2006.229.15:52:06.18#ibcon#read 3, iclass 33, count 0 2006.229.15:52:06.18#ibcon#about to read 4, iclass 33, count 0 2006.229.15:52:06.18#ibcon#read 4, iclass 33, count 0 2006.229.15:52:06.18#ibcon#about to read 5, iclass 33, count 0 2006.229.15:52:06.18#ibcon#read 5, iclass 33, count 0 2006.229.15:52:06.18#ibcon#about to read 6, iclass 33, count 0 2006.229.15:52:06.18#ibcon#read 6, iclass 33, count 0 2006.229.15:52:06.18#ibcon#end of sib2, iclass 33, count 0 2006.229.15:52:06.18#ibcon#*mode == 0, iclass 33, count 0 2006.229.15:52:06.18#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.15:52:06.18#ibcon#[27=USB\r\n] 2006.229.15:52:06.18#ibcon#*before write, iclass 33, count 0 2006.229.15:52:06.18#ibcon#enter sib2, iclass 33, count 0 2006.229.15:52:06.18#ibcon#flushed, iclass 33, count 0 2006.229.15:52:06.18#ibcon#about to write, iclass 33, count 0 2006.229.15:52:06.18#ibcon#wrote, iclass 33, count 0 2006.229.15:52:06.18#ibcon#about to read 3, iclass 33, count 0 2006.229.15:52:06.21#ibcon#read 3, iclass 33, count 0 2006.229.15:52:06.21#ibcon#about to read 4, iclass 33, count 0 2006.229.15:52:06.21#ibcon#read 4, iclass 33, count 0 2006.229.15:52:06.21#ibcon#about to read 5, iclass 33, count 0 2006.229.15:52:06.21#ibcon#read 5, iclass 33, count 0 2006.229.15:52:06.21#ibcon#about to read 6, iclass 33, count 0 2006.229.15:52:06.21#ibcon#read 6, iclass 33, count 0 2006.229.15:52:06.21#ibcon#end of sib2, iclass 33, count 0 2006.229.15:52:06.21#ibcon#*after write, iclass 33, count 0 2006.229.15:52:06.21#ibcon#*before return 0, iclass 33, count 0 2006.229.15:52:06.21#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:06.21#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.15:52:06.21#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.15:52:06.21#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.15:52:06.21$vck44/vblo=8,744.99 2006.229.15:52:06.21#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.15:52:06.21#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.15:52:06.21#ibcon#ireg 17 cls_cnt 0 2006.229.15:52:06.21#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:06.21#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:06.21#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:06.21#ibcon#enter wrdev, iclass 35, count 0 2006.229.15:52:06.21#ibcon#first serial, iclass 35, count 0 2006.229.15:52:06.21#ibcon#enter sib2, iclass 35, count 0 2006.229.15:52:06.21#ibcon#flushed, iclass 35, count 0 2006.229.15:52:06.21#ibcon#about to write, iclass 35, count 0 2006.229.15:52:06.21#ibcon#wrote, iclass 35, count 0 2006.229.15:52:06.21#ibcon#about to read 3, iclass 35, count 0 2006.229.15:52:06.23#ibcon#read 3, iclass 35, count 0 2006.229.15:52:06.23#ibcon#about to read 4, iclass 35, count 0 2006.229.15:52:06.23#ibcon#read 4, iclass 35, count 0 2006.229.15:52:06.23#ibcon#about to read 5, iclass 35, count 0 2006.229.15:52:06.23#ibcon#read 5, iclass 35, count 0 2006.229.15:52:06.23#ibcon#about to read 6, iclass 35, count 0 2006.229.15:52:06.23#ibcon#read 6, iclass 35, count 0 2006.229.15:52:06.23#ibcon#end of sib2, iclass 35, count 0 2006.229.15:52:06.23#ibcon#*mode == 0, iclass 35, count 0 2006.229.15:52:06.23#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.15:52:06.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:52:06.23#ibcon#*before write, iclass 35, count 0 2006.229.15:52:06.23#ibcon#enter sib2, iclass 35, count 0 2006.229.15:52:06.23#ibcon#flushed, iclass 35, count 0 2006.229.15:52:06.23#ibcon#about to write, iclass 35, count 0 2006.229.15:52:06.23#ibcon#wrote, iclass 35, count 0 2006.229.15:52:06.23#ibcon#about to read 3, iclass 35, count 0 2006.229.15:52:06.27#ibcon#read 3, iclass 35, count 0 2006.229.15:52:06.27#ibcon#about to read 4, iclass 35, count 0 2006.229.15:52:06.27#ibcon#read 4, iclass 35, count 0 2006.229.15:52:06.27#ibcon#about to read 5, iclass 35, count 0 2006.229.15:52:06.27#ibcon#read 5, iclass 35, count 0 2006.229.15:52:06.27#ibcon#about to read 6, iclass 35, count 0 2006.229.15:52:06.27#ibcon#read 6, iclass 35, count 0 2006.229.15:52:06.27#ibcon#end of sib2, iclass 35, count 0 2006.229.15:52:06.27#ibcon#*after write, iclass 35, count 0 2006.229.15:52:06.27#ibcon#*before return 0, iclass 35, count 0 2006.229.15:52:06.27#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:06.27#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.15:52:06.27#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.15:52:06.27#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.15:52:06.27$vck44/vb=8,4 2006.229.15:52:06.27#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.15:52:06.27#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.15:52:06.27#ibcon#ireg 11 cls_cnt 2 2006.229.15:52:06.27#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:06.33#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:06.33#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:06.33#ibcon#enter wrdev, iclass 37, count 2 2006.229.15:52:06.33#ibcon#first serial, iclass 37, count 2 2006.229.15:52:06.33#ibcon#enter sib2, iclass 37, count 2 2006.229.15:52:06.33#ibcon#flushed, iclass 37, count 2 2006.229.15:52:06.33#ibcon#about to write, iclass 37, count 2 2006.229.15:52:06.33#ibcon#wrote, iclass 37, count 2 2006.229.15:52:06.33#ibcon#about to read 3, iclass 37, count 2 2006.229.15:52:06.35#ibcon#read 3, iclass 37, count 2 2006.229.15:52:06.35#ibcon#about to read 4, iclass 37, count 2 2006.229.15:52:06.35#ibcon#read 4, iclass 37, count 2 2006.229.15:52:06.35#ibcon#about to read 5, iclass 37, count 2 2006.229.15:52:06.35#ibcon#read 5, iclass 37, count 2 2006.229.15:52:06.35#ibcon#about to read 6, iclass 37, count 2 2006.229.15:52:06.35#ibcon#read 6, iclass 37, count 2 2006.229.15:52:06.35#ibcon#end of sib2, iclass 37, count 2 2006.229.15:52:06.35#ibcon#*mode == 0, iclass 37, count 2 2006.229.15:52:06.35#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.15:52:06.35#ibcon#[27=AT08-04\r\n] 2006.229.15:52:06.35#ibcon#*before write, iclass 37, count 2 2006.229.15:52:06.35#ibcon#enter sib2, iclass 37, count 2 2006.229.15:52:06.35#ibcon#flushed, iclass 37, count 2 2006.229.15:52:06.35#ibcon#about to write, iclass 37, count 2 2006.229.15:52:06.35#ibcon#wrote, iclass 37, count 2 2006.229.15:52:06.35#ibcon#about to read 3, iclass 37, count 2 2006.229.15:52:06.38#ibcon#read 3, iclass 37, count 2 2006.229.15:52:06.38#ibcon#about to read 4, iclass 37, count 2 2006.229.15:52:06.38#ibcon#read 4, iclass 37, count 2 2006.229.15:52:06.38#ibcon#about to read 5, iclass 37, count 2 2006.229.15:52:06.38#ibcon#read 5, iclass 37, count 2 2006.229.15:52:06.38#ibcon#about to read 6, iclass 37, count 2 2006.229.15:52:06.38#ibcon#read 6, iclass 37, count 2 2006.229.15:52:06.38#ibcon#end of sib2, iclass 37, count 2 2006.229.15:52:06.38#ibcon#*after write, iclass 37, count 2 2006.229.15:52:06.38#ibcon#*before return 0, iclass 37, count 2 2006.229.15:52:06.38#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:06.38#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.15:52:06.38#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.15:52:06.38#ibcon#ireg 7 cls_cnt 0 2006.229.15:52:06.38#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:06.50#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:06.50#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:06.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.15:52:06.50#ibcon#first serial, iclass 37, count 0 2006.229.15:52:06.50#ibcon#enter sib2, iclass 37, count 0 2006.229.15:52:06.50#ibcon#flushed, iclass 37, count 0 2006.229.15:52:06.50#ibcon#about to write, iclass 37, count 0 2006.229.15:52:06.50#ibcon#wrote, iclass 37, count 0 2006.229.15:52:06.50#ibcon#about to read 3, iclass 37, count 0 2006.229.15:52:06.52#ibcon#read 3, iclass 37, count 0 2006.229.15:52:06.52#ibcon#about to read 4, iclass 37, count 0 2006.229.15:52:06.52#ibcon#read 4, iclass 37, count 0 2006.229.15:52:06.52#ibcon#about to read 5, iclass 37, count 0 2006.229.15:52:06.52#ibcon#read 5, iclass 37, count 0 2006.229.15:52:06.52#ibcon#about to read 6, iclass 37, count 0 2006.229.15:52:06.52#ibcon#read 6, iclass 37, count 0 2006.229.15:52:06.52#ibcon#end of sib2, iclass 37, count 0 2006.229.15:52:06.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.15:52:06.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.15:52:06.52#ibcon#[27=USB\r\n] 2006.229.15:52:06.52#ibcon#*before write, iclass 37, count 0 2006.229.15:52:06.52#ibcon#enter sib2, iclass 37, count 0 2006.229.15:52:06.52#ibcon#flushed, iclass 37, count 0 2006.229.15:52:06.52#ibcon#about to write, iclass 37, count 0 2006.229.15:52:06.52#ibcon#wrote, iclass 37, count 0 2006.229.15:52:06.52#ibcon#about to read 3, iclass 37, count 0 2006.229.15:52:06.55#ibcon#read 3, iclass 37, count 0 2006.229.15:52:06.55#ibcon#about to read 4, iclass 37, count 0 2006.229.15:52:06.55#ibcon#read 4, iclass 37, count 0 2006.229.15:52:06.55#ibcon#about to read 5, iclass 37, count 0 2006.229.15:52:06.55#ibcon#read 5, iclass 37, count 0 2006.229.15:52:06.55#ibcon#about to read 6, iclass 37, count 0 2006.229.15:52:06.55#ibcon#read 6, iclass 37, count 0 2006.229.15:52:06.55#ibcon#end of sib2, iclass 37, count 0 2006.229.15:52:06.55#ibcon#*after write, iclass 37, count 0 2006.229.15:52:06.55#ibcon#*before return 0, iclass 37, count 0 2006.229.15:52:06.55#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:06.55#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.15:52:06.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.15:52:06.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.15:52:06.55$vck44/vabw=wide 2006.229.15:52:06.55#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.15:52:06.55#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.15:52:06.55#ibcon#ireg 8 cls_cnt 0 2006.229.15:52:06.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:06.55#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:06.55#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:06.55#ibcon#enter wrdev, iclass 39, count 0 2006.229.15:52:06.55#ibcon#first serial, iclass 39, count 0 2006.229.15:52:06.55#ibcon#enter sib2, iclass 39, count 0 2006.229.15:52:06.55#ibcon#flushed, iclass 39, count 0 2006.229.15:52:06.55#ibcon#about to write, iclass 39, count 0 2006.229.15:52:06.55#ibcon#wrote, iclass 39, count 0 2006.229.15:52:06.55#ibcon#about to read 3, iclass 39, count 0 2006.229.15:52:06.57#ibcon#read 3, iclass 39, count 0 2006.229.15:52:06.57#ibcon#about to read 4, iclass 39, count 0 2006.229.15:52:06.57#ibcon#read 4, iclass 39, count 0 2006.229.15:52:06.57#ibcon#about to read 5, iclass 39, count 0 2006.229.15:52:06.57#ibcon#read 5, iclass 39, count 0 2006.229.15:52:06.57#ibcon#about to read 6, iclass 39, count 0 2006.229.15:52:06.57#ibcon#read 6, iclass 39, count 0 2006.229.15:52:06.57#ibcon#end of sib2, iclass 39, count 0 2006.229.15:52:06.57#ibcon#*mode == 0, iclass 39, count 0 2006.229.15:52:06.57#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.15:52:06.57#ibcon#[25=BW32\r\n] 2006.229.15:52:06.57#ibcon#*before write, iclass 39, count 0 2006.229.15:52:06.57#ibcon#enter sib2, iclass 39, count 0 2006.229.15:52:06.57#ibcon#flushed, iclass 39, count 0 2006.229.15:52:06.57#ibcon#about to write, iclass 39, count 0 2006.229.15:52:06.57#ibcon#wrote, iclass 39, count 0 2006.229.15:52:06.57#ibcon#about to read 3, iclass 39, count 0 2006.229.15:52:06.60#ibcon#read 3, iclass 39, count 0 2006.229.15:52:06.60#ibcon#about to read 4, iclass 39, count 0 2006.229.15:52:06.60#ibcon#read 4, iclass 39, count 0 2006.229.15:52:06.60#ibcon#about to read 5, iclass 39, count 0 2006.229.15:52:06.60#ibcon#read 5, iclass 39, count 0 2006.229.15:52:06.60#ibcon#about to read 6, iclass 39, count 0 2006.229.15:52:06.60#ibcon#read 6, iclass 39, count 0 2006.229.15:52:06.60#ibcon#end of sib2, iclass 39, count 0 2006.229.15:52:06.60#ibcon#*after write, iclass 39, count 0 2006.229.15:52:06.60#ibcon#*before return 0, iclass 39, count 0 2006.229.15:52:06.60#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:06.60#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.15:52:06.60#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.15:52:06.60#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.15:52:06.60$vck44/vbbw=wide 2006.229.15:52:06.60#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.15:52:06.60#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.15:52:06.60#ibcon#ireg 8 cls_cnt 0 2006.229.15:52:06.60#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:52:06.67#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:52:06.67#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:52:06.67#ibcon#enter wrdev, iclass 3, count 0 2006.229.15:52:06.67#ibcon#first serial, iclass 3, count 0 2006.229.15:52:06.67#ibcon#enter sib2, iclass 3, count 0 2006.229.15:52:06.67#ibcon#flushed, iclass 3, count 0 2006.229.15:52:06.67#ibcon#about to write, iclass 3, count 0 2006.229.15:52:06.67#ibcon#wrote, iclass 3, count 0 2006.229.15:52:06.67#ibcon#about to read 3, iclass 3, count 0 2006.229.15:52:06.69#ibcon#read 3, iclass 3, count 0 2006.229.15:52:06.69#ibcon#about to read 4, iclass 3, count 0 2006.229.15:52:06.69#ibcon#read 4, iclass 3, count 0 2006.229.15:52:06.69#ibcon#about to read 5, iclass 3, count 0 2006.229.15:52:06.69#ibcon#read 5, iclass 3, count 0 2006.229.15:52:06.69#ibcon#about to read 6, iclass 3, count 0 2006.229.15:52:06.69#ibcon#read 6, iclass 3, count 0 2006.229.15:52:06.69#ibcon#end of sib2, iclass 3, count 0 2006.229.15:52:06.69#ibcon#*mode == 0, iclass 3, count 0 2006.229.15:52:06.69#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.15:52:06.69#ibcon#[27=BW32\r\n] 2006.229.15:52:06.69#ibcon#*before write, iclass 3, count 0 2006.229.15:52:06.69#ibcon#enter sib2, iclass 3, count 0 2006.229.15:52:06.69#ibcon#flushed, iclass 3, count 0 2006.229.15:52:06.69#ibcon#about to write, iclass 3, count 0 2006.229.15:52:06.69#ibcon#wrote, iclass 3, count 0 2006.229.15:52:06.69#ibcon#about to read 3, iclass 3, count 0 2006.229.15:52:06.72#ibcon#read 3, iclass 3, count 0 2006.229.15:52:06.72#ibcon#about to read 4, iclass 3, count 0 2006.229.15:52:06.72#ibcon#read 4, iclass 3, count 0 2006.229.15:52:06.72#ibcon#about to read 5, iclass 3, count 0 2006.229.15:52:06.72#ibcon#read 5, iclass 3, count 0 2006.229.15:52:06.72#ibcon#about to read 6, iclass 3, count 0 2006.229.15:52:06.72#ibcon#read 6, iclass 3, count 0 2006.229.15:52:06.72#ibcon#end of sib2, iclass 3, count 0 2006.229.15:52:06.72#ibcon#*after write, iclass 3, count 0 2006.229.15:52:06.72#ibcon#*before return 0, iclass 3, count 0 2006.229.15:52:06.72#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:52:06.72#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.15:52:06.72#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.15:52:06.72#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.15:52:06.72$setupk4/ifdk4 2006.229.15:52:06.72$ifdk4/lo= 2006.229.15:52:06.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:52:06.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:52:06.72$ifdk4/patch= 2006.229.15:52:06.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:52:06.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:52:06.72$setupk4/!*+20s 2006.229.15:52:15.32#abcon#<5=/06 1.2 1.9 27.191001001.8\r\n> 2006.229.15:52:15.34#abcon#{5=INTERFACE CLEAR} 2006.229.15:52:15.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:52:21.22$setupk4/"tpicd 2006.229.15:52:21.22$setupk4/echo=off 2006.229.15:52:21.22$setupk4/xlog=off 2006.229.15:52:21.22:!2006.229.15:54:20 2006.229.15:52:29.14#trakl#Source acquired 2006.229.15:52:29.14#flagr#flagr/antenna,acquired 2006.229.15:54:20.00:preob 2006.229.15:54:21.14/onsource/TRACKING 2006.229.15:54:21.14:!2006.229.15:54:30 2006.229.15:54:30.00:"tape 2006.229.15:54:30.00:"st=record 2006.229.15:54:30.00:data_valid=on 2006.229.15:54:30.00:midob 2006.229.15:54:30.14/onsource/TRACKING 2006.229.15:54:30.14/wx/27.19,1001.8,100 2006.229.15:54:30.30/cable/+6.4147E-03 2006.229.15:54:31.39/va/01,08,usb,yes,29,31 2006.229.15:54:31.39/va/02,07,usb,yes,31,32 2006.229.15:54:31.39/va/03,06,usb,yes,39,41 2006.229.15:54:31.39/va/04,07,usb,yes,32,34 2006.229.15:54:31.39/va/05,04,usb,yes,29,29 2006.229.15:54:31.39/va/06,04,usb,yes,32,32 2006.229.15:54:31.39/va/07,05,usb,yes,28,29 2006.229.15:54:31.39/va/08,06,usb,yes,21,26 2006.229.15:54:31.62/valo/01,524.99,yes,locked 2006.229.15:54:31.62/valo/02,534.99,yes,locked 2006.229.15:54:31.62/valo/03,564.99,yes,locked 2006.229.15:54:31.62/valo/04,624.99,yes,locked 2006.229.15:54:31.62/valo/05,734.99,yes,locked 2006.229.15:54:31.62/valo/06,814.99,yes,locked 2006.229.15:54:31.62/valo/07,864.99,yes,locked 2006.229.15:54:31.62/valo/08,884.99,yes,locked 2006.229.15:54:32.71/vb/01,04,usb,yes,30,28 2006.229.15:54:32.71/vb/02,04,usb,yes,33,33 2006.229.15:54:32.71/vb/03,04,usb,yes,30,33 2006.229.15:54:32.71/vb/04,04,usb,yes,34,33 2006.229.15:54:32.71/vb/05,04,usb,yes,27,29 2006.229.15:54:32.71/vb/06,04,usb,yes,31,27 2006.229.15:54:32.71/vb/07,04,usb,yes,31,31 2006.229.15:54:32.71/vb/08,04,usb,yes,28,32 2006.229.15:54:32.94/vblo/01,629.99,yes,locked 2006.229.15:54:32.94/vblo/02,634.99,yes,locked 2006.229.15:54:32.94/vblo/03,649.99,yes,locked 2006.229.15:54:32.94/vblo/04,679.99,yes,locked 2006.229.15:54:32.94/vblo/05,709.99,yes,locked 2006.229.15:54:32.94/vblo/06,719.99,yes,locked 2006.229.15:54:32.94/vblo/07,734.99,yes,locked 2006.229.15:54:32.94/vblo/08,744.99,yes,locked 2006.229.15:54:33.09/vabw/8 2006.229.15:54:33.24/vbbw/8 2006.229.15:54:33.34/xfe/off,on,12.2 2006.229.15:54:33.71/ifatt/23,28,28,28 2006.229.15:54:34.08/fmout-gps/S +4.50E-07 2006.229.15:54:34.12:!2006.229.15:57:10 2006.229.15:57:10.02:data_valid=off 2006.229.15:57:10.02:"et 2006.229.15:57:10.02:!+3s 2006.229.15:57:13.04:"tape 2006.229.15:57:13.05:postob 2006.229.15:57:13.22/cable/+6.4147E-03 2006.229.15:57:13.22/wx/27.19,1001.8,100 2006.229.15:57:13.28/fmout-gps/S +4.49E-07 2006.229.15:57:13.28:scan_name=229-1604,jd0608,220 2006.229.15:57:13.28:source=1958-179,200057.09,-174857.7,2000.0,ccw 2006.229.15:57:15.14#flagr#flagr/antenna,new-source 2006.229.15:57:15.14:checkk5 2006.229.15:57:15.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.15:57:15.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.15:57:16.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.15:57:16.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.15:57:17.10/chk_obsdata//k5ts1/T2291554??a.dat file size is correct (nominal:640MB, actual:640MB). 2006.229.15:57:17.51/chk_obsdata//k5ts2/T2291554??b.dat file size is correct (nominal:640MB, actual:640MB). 2006.229.15:57:17.91/chk_obsdata//k5ts3/T2291554??c.dat file size is correct (nominal:640MB, actual:640MB). 2006.229.15:57:18.30/chk_obsdata//k5ts4/T2291554??d.dat file size is correct (nominal:640MB, actual:640MB). 2006.229.15:57:19.04/k5log//k5ts1_log_newline 2006.229.15:57:19.76/k5log//k5ts2_log_newline 2006.229.15:57:20.48/k5log//k5ts3_log_newline 2006.229.15:57:21.22/k5log//k5ts4_log_newline 2006.229.15:57:21.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.15:57:21.24:setupk4=1 2006.229.15:57:21.24$setupk4/echo=on 2006.229.15:57:21.24$setupk4/pcalon 2006.229.15:57:21.24$pcalon/"no phase cal control is implemented here 2006.229.15:57:21.24$setupk4/"tpicd=stop 2006.229.15:57:21.24$setupk4/"rec=synch_on 2006.229.15:57:21.24$setupk4/"rec_mode=128 2006.229.15:57:21.24$setupk4/!* 2006.229.15:57:21.24$setupk4/recpk4 2006.229.15:57:21.24$recpk4/recpatch= 2006.229.15:57:21.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.15:57:21.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.15:57:21.25$setupk4/vck44 2006.229.15:57:21.25$vck44/valo=1,524.99 2006.229.15:57:21.25#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:57:21.25#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:57:21.25#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:21.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:21.25#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:21.25#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:21.25#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:57:21.25#ibcon#first serial, iclass 26, count 0 2006.229.15:57:21.25#ibcon#enter sib2, iclass 26, count 0 2006.229.15:57:21.25#ibcon#flushed, iclass 26, count 0 2006.229.15:57:21.25#ibcon#about to write, iclass 26, count 0 2006.229.15:57:21.25#ibcon#wrote, iclass 26, count 0 2006.229.15:57:21.25#ibcon#about to read 3, iclass 26, count 0 2006.229.15:57:21.26#ibcon#read 3, iclass 26, count 0 2006.229.15:57:21.26#ibcon#about to read 4, iclass 26, count 0 2006.229.15:57:21.26#ibcon#read 4, iclass 26, count 0 2006.229.15:57:21.26#ibcon#about to read 5, iclass 26, count 0 2006.229.15:57:21.26#ibcon#read 5, iclass 26, count 0 2006.229.15:57:21.26#ibcon#about to read 6, iclass 26, count 0 2006.229.15:57:21.27#ibcon#read 6, iclass 26, count 0 2006.229.15:57:21.27#ibcon#end of sib2, iclass 26, count 0 2006.229.15:57:21.27#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:57:21.27#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:57:21.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.15:57:21.27#ibcon#*before write, iclass 26, count 0 2006.229.15:57:21.27#ibcon#enter sib2, iclass 26, count 0 2006.229.15:57:21.27#ibcon#flushed, iclass 26, count 0 2006.229.15:57:21.27#ibcon#about to write, iclass 26, count 0 2006.229.15:57:21.27#ibcon#wrote, iclass 26, count 0 2006.229.15:57:21.27#ibcon#about to read 3, iclass 26, count 0 2006.229.15:57:21.31#ibcon#read 3, iclass 26, count 0 2006.229.15:57:21.31#ibcon#about to read 4, iclass 26, count 0 2006.229.15:57:21.31#ibcon#read 4, iclass 26, count 0 2006.229.15:57:21.31#ibcon#about to read 5, iclass 26, count 0 2006.229.15:57:21.31#ibcon#read 5, iclass 26, count 0 2006.229.15:57:21.31#ibcon#about to read 6, iclass 26, count 0 2006.229.15:57:21.32#ibcon#read 6, iclass 26, count 0 2006.229.15:57:21.32#ibcon#end of sib2, iclass 26, count 0 2006.229.15:57:21.32#ibcon#*after write, iclass 26, count 0 2006.229.15:57:21.32#ibcon#*before return 0, iclass 26, count 0 2006.229.15:57:21.32#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:21.32#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:21.32#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:57:21.32#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:57:21.32$vck44/va=1,8 2006.229.15:57:21.32#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:57:21.32#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:57:21.32#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:21.32#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:21.32#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:21.32#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:21.32#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:57:21.32#ibcon#first serial, iclass 28, count 2 2006.229.15:57:21.32#ibcon#enter sib2, iclass 28, count 2 2006.229.15:57:21.32#ibcon#flushed, iclass 28, count 2 2006.229.15:57:21.32#ibcon#about to write, iclass 28, count 2 2006.229.15:57:21.32#ibcon#wrote, iclass 28, count 2 2006.229.15:57:21.32#ibcon#about to read 3, iclass 28, count 2 2006.229.15:57:21.33#ibcon#read 3, iclass 28, count 2 2006.229.15:57:21.33#ibcon#about to read 4, iclass 28, count 2 2006.229.15:57:21.33#ibcon#read 4, iclass 28, count 2 2006.229.15:57:21.33#ibcon#about to read 5, iclass 28, count 2 2006.229.15:57:21.33#ibcon#read 5, iclass 28, count 2 2006.229.15:57:21.33#ibcon#about to read 6, iclass 28, count 2 2006.229.15:57:21.33#ibcon#read 6, iclass 28, count 2 2006.229.15:57:21.33#ibcon#end of sib2, iclass 28, count 2 2006.229.15:57:21.34#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:57:21.34#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:57:21.34#ibcon#[25=AT01-08\r\n] 2006.229.15:57:21.34#ibcon#*before write, iclass 28, count 2 2006.229.15:57:21.34#ibcon#enter sib2, iclass 28, count 2 2006.229.15:57:21.34#ibcon#flushed, iclass 28, count 2 2006.229.15:57:21.34#ibcon#about to write, iclass 28, count 2 2006.229.15:57:21.34#ibcon#wrote, iclass 28, count 2 2006.229.15:57:21.34#ibcon#about to read 3, iclass 28, count 2 2006.229.15:57:21.36#ibcon#read 3, iclass 28, count 2 2006.229.15:57:21.36#ibcon#about to read 4, iclass 28, count 2 2006.229.15:57:21.36#ibcon#read 4, iclass 28, count 2 2006.229.15:57:21.36#ibcon#about to read 5, iclass 28, count 2 2006.229.15:57:21.36#ibcon#read 5, iclass 28, count 2 2006.229.15:57:21.36#ibcon#about to read 6, iclass 28, count 2 2006.229.15:57:21.36#ibcon#read 6, iclass 28, count 2 2006.229.15:57:21.36#ibcon#end of sib2, iclass 28, count 2 2006.229.15:57:21.37#ibcon#*after write, iclass 28, count 2 2006.229.15:57:21.37#ibcon#*before return 0, iclass 28, count 2 2006.229.15:57:21.37#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:21.37#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:21.37#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:57:21.37#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:21.37#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:21.48#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:21.48#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:21.48#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:57:21.48#ibcon#first serial, iclass 28, count 0 2006.229.15:57:21.48#ibcon#enter sib2, iclass 28, count 0 2006.229.15:57:21.48#ibcon#flushed, iclass 28, count 0 2006.229.15:57:21.48#ibcon#about to write, iclass 28, count 0 2006.229.15:57:21.49#ibcon#wrote, iclass 28, count 0 2006.229.15:57:21.49#ibcon#about to read 3, iclass 28, count 0 2006.229.15:57:21.50#ibcon#read 3, iclass 28, count 0 2006.229.15:57:21.50#ibcon#about to read 4, iclass 28, count 0 2006.229.15:57:21.50#ibcon#read 4, iclass 28, count 0 2006.229.15:57:21.50#ibcon#about to read 5, iclass 28, count 0 2006.229.15:57:21.50#ibcon#read 5, iclass 28, count 0 2006.229.15:57:21.50#ibcon#about to read 6, iclass 28, count 0 2006.229.15:57:21.50#ibcon#read 6, iclass 28, count 0 2006.229.15:57:21.51#ibcon#end of sib2, iclass 28, count 0 2006.229.15:57:21.51#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:57:21.51#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:57:21.51#ibcon#[25=USB\r\n] 2006.229.15:57:21.51#ibcon#*before write, iclass 28, count 0 2006.229.15:57:21.51#ibcon#enter sib2, iclass 28, count 0 2006.229.15:57:21.51#ibcon#flushed, iclass 28, count 0 2006.229.15:57:21.51#ibcon#about to write, iclass 28, count 0 2006.229.15:57:21.51#ibcon#wrote, iclass 28, count 0 2006.229.15:57:21.51#ibcon#about to read 3, iclass 28, count 0 2006.229.15:57:21.53#ibcon#read 3, iclass 28, count 0 2006.229.15:57:21.53#ibcon#about to read 4, iclass 28, count 0 2006.229.15:57:21.53#ibcon#read 4, iclass 28, count 0 2006.229.15:57:21.53#ibcon#about to read 5, iclass 28, count 0 2006.229.15:57:21.53#ibcon#read 5, iclass 28, count 0 2006.229.15:57:21.53#ibcon#about to read 6, iclass 28, count 0 2006.229.15:57:21.53#ibcon#read 6, iclass 28, count 0 2006.229.15:57:21.53#ibcon#end of sib2, iclass 28, count 0 2006.229.15:57:21.54#ibcon#*after write, iclass 28, count 0 2006.229.15:57:21.54#ibcon#*before return 0, iclass 28, count 0 2006.229.15:57:21.54#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:21.54#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:21.54#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:57:21.54#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:57:21.54$vck44/valo=2,534.99 2006.229.15:57:21.54#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:57:21.54#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:57:21.54#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:21.54#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:21.54#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:21.54#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:21.54#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:57:21.54#ibcon#first serial, iclass 30, count 0 2006.229.15:57:21.54#ibcon#enter sib2, iclass 30, count 0 2006.229.15:57:21.54#ibcon#flushed, iclass 30, count 0 2006.229.15:57:21.54#ibcon#about to write, iclass 30, count 0 2006.229.15:57:21.54#ibcon#wrote, iclass 30, count 0 2006.229.15:57:21.54#ibcon#about to read 3, iclass 30, count 0 2006.229.15:57:21.55#ibcon#read 3, iclass 30, count 0 2006.229.15:57:21.55#ibcon#about to read 4, iclass 30, count 0 2006.229.15:57:21.55#ibcon#read 4, iclass 30, count 0 2006.229.15:57:21.55#ibcon#about to read 5, iclass 30, count 0 2006.229.15:57:21.55#ibcon#read 5, iclass 30, count 0 2006.229.15:57:21.55#ibcon#about to read 6, iclass 30, count 0 2006.229.15:57:21.55#ibcon#read 6, iclass 30, count 0 2006.229.15:57:21.55#ibcon#end of sib2, iclass 30, count 0 2006.229.15:57:21.55#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:57:21.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:57:21.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.15:57:21.56#ibcon#*before write, iclass 30, count 0 2006.229.15:57:21.56#ibcon#enter sib2, iclass 30, count 0 2006.229.15:57:21.56#ibcon#flushed, iclass 30, count 0 2006.229.15:57:21.56#ibcon#about to write, iclass 30, count 0 2006.229.15:57:21.56#ibcon#wrote, iclass 30, count 0 2006.229.15:57:21.56#ibcon#about to read 3, iclass 30, count 0 2006.229.15:57:21.59#ibcon#read 3, iclass 30, count 0 2006.229.15:57:21.59#ibcon#about to read 4, iclass 30, count 0 2006.229.15:57:21.59#ibcon#read 4, iclass 30, count 0 2006.229.15:57:21.59#ibcon#about to read 5, iclass 30, count 0 2006.229.15:57:21.59#ibcon#read 5, iclass 30, count 0 2006.229.15:57:21.59#ibcon#about to read 6, iclass 30, count 0 2006.229.15:57:21.59#ibcon#read 6, iclass 30, count 0 2006.229.15:57:21.59#ibcon#end of sib2, iclass 30, count 0 2006.229.15:57:21.59#ibcon#*after write, iclass 30, count 0 2006.229.15:57:21.60#ibcon#*before return 0, iclass 30, count 0 2006.229.15:57:21.60#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:21.60#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:21.60#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:57:21.60#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:57:21.60$vck44/va=2,7 2006.229.15:57:21.60#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:57:21.60#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:57:21.60#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:21.60#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:21.65#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:21.65#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:21.65#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:57:21.65#ibcon#first serial, iclass 32, count 2 2006.229.15:57:21.65#ibcon#enter sib2, iclass 32, count 2 2006.229.15:57:21.65#ibcon#flushed, iclass 32, count 2 2006.229.15:57:21.65#ibcon#about to write, iclass 32, count 2 2006.229.15:57:21.66#ibcon#wrote, iclass 32, count 2 2006.229.15:57:21.66#ibcon#about to read 3, iclass 32, count 2 2006.229.15:57:21.67#ibcon#read 3, iclass 32, count 2 2006.229.15:57:21.67#ibcon#about to read 4, iclass 32, count 2 2006.229.15:57:21.67#ibcon#read 4, iclass 32, count 2 2006.229.15:57:21.67#ibcon#about to read 5, iclass 32, count 2 2006.229.15:57:21.67#ibcon#read 5, iclass 32, count 2 2006.229.15:57:21.67#ibcon#about to read 6, iclass 32, count 2 2006.229.15:57:21.67#ibcon#read 6, iclass 32, count 2 2006.229.15:57:21.67#ibcon#end of sib2, iclass 32, count 2 2006.229.15:57:21.67#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:57:21.67#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:57:21.68#ibcon#[25=AT02-07\r\n] 2006.229.15:57:21.68#ibcon#*before write, iclass 32, count 2 2006.229.15:57:21.68#ibcon#enter sib2, iclass 32, count 2 2006.229.15:57:21.68#ibcon#flushed, iclass 32, count 2 2006.229.15:57:21.68#ibcon#about to write, iclass 32, count 2 2006.229.15:57:21.68#ibcon#wrote, iclass 32, count 2 2006.229.15:57:21.68#ibcon#about to read 3, iclass 32, count 2 2006.229.15:57:21.70#ibcon#read 3, iclass 32, count 2 2006.229.15:57:21.70#ibcon#about to read 4, iclass 32, count 2 2006.229.15:57:21.70#ibcon#read 4, iclass 32, count 2 2006.229.15:57:21.70#ibcon#about to read 5, iclass 32, count 2 2006.229.15:57:21.70#ibcon#read 5, iclass 32, count 2 2006.229.15:57:21.70#ibcon#about to read 6, iclass 32, count 2 2006.229.15:57:21.70#ibcon#read 6, iclass 32, count 2 2006.229.15:57:21.71#ibcon#end of sib2, iclass 32, count 2 2006.229.15:57:21.71#ibcon#*after write, iclass 32, count 2 2006.229.15:57:21.71#ibcon#*before return 0, iclass 32, count 2 2006.229.15:57:21.71#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:21.71#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:21.71#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:57:21.71#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:21.71#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:21.82#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:21.82#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:21.82#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:57:21.82#ibcon#first serial, iclass 32, count 0 2006.229.15:57:21.82#ibcon#enter sib2, iclass 32, count 0 2006.229.15:57:21.82#ibcon#flushed, iclass 32, count 0 2006.229.15:57:21.82#ibcon#about to write, iclass 32, count 0 2006.229.15:57:21.83#ibcon#wrote, iclass 32, count 0 2006.229.15:57:21.83#ibcon#about to read 3, iclass 32, count 0 2006.229.15:57:21.84#ibcon#read 3, iclass 32, count 0 2006.229.15:57:21.84#ibcon#about to read 4, iclass 32, count 0 2006.229.15:57:21.84#ibcon#read 4, iclass 32, count 0 2006.229.15:57:21.84#ibcon#about to read 5, iclass 32, count 0 2006.229.15:57:21.84#ibcon#read 5, iclass 32, count 0 2006.229.15:57:21.84#ibcon#about to read 6, iclass 32, count 0 2006.229.15:57:21.84#ibcon#read 6, iclass 32, count 0 2006.229.15:57:21.84#ibcon#end of sib2, iclass 32, count 0 2006.229.15:57:21.84#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:57:21.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:57:21.85#ibcon#[25=USB\r\n] 2006.229.15:57:21.85#ibcon#*before write, iclass 32, count 0 2006.229.15:57:21.85#ibcon#enter sib2, iclass 32, count 0 2006.229.15:57:21.85#ibcon#flushed, iclass 32, count 0 2006.229.15:57:21.85#ibcon#about to write, iclass 32, count 0 2006.229.15:57:21.85#ibcon#wrote, iclass 32, count 0 2006.229.15:57:21.85#ibcon#about to read 3, iclass 32, count 0 2006.229.15:57:21.87#ibcon#read 3, iclass 32, count 0 2006.229.15:57:21.87#ibcon#about to read 4, iclass 32, count 0 2006.229.15:57:21.87#ibcon#read 4, iclass 32, count 0 2006.229.15:57:21.87#ibcon#about to read 5, iclass 32, count 0 2006.229.15:57:21.87#ibcon#read 5, iclass 32, count 0 2006.229.15:57:21.87#ibcon#about to read 6, iclass 32, count 0 2006.229.15:57:21.87#ibcon#read 6, iclass 32, count 0 2006.229.15:57:21.87#ibcon#end of sib2, iclass 32, count 0 2006.229.15:57:21.87#ibcon#*after write, iclass 32, count 0 2006.229.15:57:21.87#ibcon#*before return 0, iclass 32, count 0 2006.229.15:57:21.87#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:21.88#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:21.88#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:57:21.88#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:57:21.88$vck44/valo=3,564.99 2006.229.15:57:21.88#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:57:21.88#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:57:21.88#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:21.88#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:21.88#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:21.88#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:21.88#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:57:21.88#ibcon#first serial, iclass 34, count 0 2006.229.15:57:21.88#ibcon#enter sib2, iclass 34, count 0 2006.229.15:57:21.88#ibcon#flushed, iclass 34, count 0 2006.229.15:57:21.88#ibcon#about to write, iclass 34, count 0 2006.229.15:57:21.88#ibcon#wrote, iclass 34, count 0 2006.229.15:57:21.88#ibcon#about to read 3, iclass 34, count 0 2006.229.15:57:21.89#ibcon#read 3, iclass 34, count 0 2006.229.15:57:21.89#ibcon#about to read 4, iclass 34, count 0 2006.229.15:57:21.89#ibcon#read 4, iclass 34, count 0 2006.229.15:57:21.89#ibcon#about to read 5, iclass 34, count 0 2006.229.15:57:21.89#ibcon#read 5, iclass 34, count 0 2006.229.15:57:21.89#ibcon#about to read 6, iclass 34, count 0 2006.229.15:57:21.89#ibcon#read 6, iclass 34, count 0 2006.229.15:57:21.89#ibcon#end of sib2, iclass 34, count 0 2006.229.15:57:21.89#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:57:21.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:57:21.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.15:57:21.90#ibcon#*before write, iclass 34, count 0 2006.229.15:57:21.90#ibcon#enter sib2, iclass 34, count 0 2006.229.15:57:21.90#ibcon#flushed, iclass 34, count 0 2006.229.15:57:21.90#ibcon#about to write, iclass 34, count 0 2006.229.15:57:21.90#ibcon#wrote, iclass 34, count 0 2006.229.15:57:21.90#ibcon#about to read 3, iclass 34, count 0 2006.229.15:57:21.93#ibcon#read 3, iclass 34, count 0 2006.229.15:57:21.93#ibcon#about to read 4, iclass 34, count 0 2006.229.15:57:21.93#ibcon#read 4, iclass 34, count 0 2006.229.15:57:21.93#ibcon#about to read 5, iclass 34, count 0 2006.229.15:57:21.93#ibcon#read 5, iclass 34, count 0 2006.229.15:57:21.93#ibcon#about to read 6, iclass 34, count 0 2006.229.15:57:21.93#ibcon#read 6, iclass 34, count 0 2006.229.15:57:21.93#ibcon#end of sib2, iclass 34, count 0 2006.229.15:57:21.94#ibcon#*after write, iclass 34, count 0 2006.229.15:57:21.94#ibcon#*before return 0, iclass 34, count 0 2006.229.15:57:21.94#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:21.94#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:21.94#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:57:21.94#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:57:21.94$vck44/va=3,6 2006.229.15:57:21.94#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:57:21.94#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:57:21.94#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:21.94#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:21.99#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:22.00#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:22.00#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:57:22.00#ibcon#first serial, iclass 36, count 2 2006.229.15:57:22.00#ibcon#enter sib2, iclass 36, count 2 2006.229.15:57:22.00#ibcon#flushed, iclass 36, count 2 2006.229.15:57:22.00#ibcon#about to write, iclass 36, count 2 2006.229.15:57:22.00#ibcon#wrote, iclass 36, count 2 2006.229.15:57:22.00#ibcon#about to read 3, iclass 36, count 2 2006.229.15:57:22.01#ibcon#read 3, iclass 36, count 2 2006.229.15:57:22.01#ibcon#about to read 4, iclass 36, count 2 2006.229.15:57:22.01#ibcon#read 4, iclass 36, count 2 2006.229.15:57:22.01#ibcon#about to read 5, iclass 36, count 2 2006.229.15:57:22.01#ibcon#read 5, iclass 36, count 2 2006.229.15:57:22.01#ibcon#about to read 6, iclass 36, count 2 2006.229.15:57:22.01#ibcon#read 6, iclass 36, count 2 2006.229.15:57:22.01#ibcon#end of sib2, iclass 36, count 2 2006.229.15:57:22.02#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:57:22.02#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:57:22.02#ibcon#[25=AT03-06\r\n] 2006.229.15:57:22.02#ibcon#*before write, iclass 36, count 2 2006.229.15:57:22.02#ibcon#enter sib2, iclass 36, count 2 2006.229.15:57:22.02#ibcon#flushed, iclass 36, count 2 2006.229.15:57:22.02#ibcon#about to write, iclass 36, count 2 2006.229.15:57:22.02#ibcon#wrote, iclass 36, count 2 2006.229.15:57:22.02#ibcon#about to read 3, iclass 36, count 2 2006.229.15:57:22.04#ibcon#read 3, iclass 36, count 2 2006.229.15:57:22.04#ibcon#about to read 4, iclass 36, count 2 2006.229.15:57:22.04#ibcon#read 4, iclass 36, count 2 2006.229.15:57:22.04#ibcon#about to read 5, iclass 36, count 2 2006.229.15:57:22.04#ibcon#read 5, iclass 36, count 2 2006.229.15:57:22.04#ibcon#about to read 6, iclass 36, count 2 2006.229.15:57:22.04#ibcon#read 6, iclass 36, count 2 2006.229.15:57:22.04#ibcon#end of sib2, iclass 36, count 2 2006.229.15:57:22.04#ibcon#*after write, iclass 36, count 2 2006.229.15:57:22.04#ibcon#*before return 0, iclass 36, count 2 2006.229.15:57:22.05#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:22.05#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:22.05#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:57:22.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:22.05#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:22.16#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:22.16#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:22.16#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:57:22.16#ibcon#first serial, iclass 36, count 0 2006.229.15:57:22.16#ibcon#enter sib2, iclass 36, count 0 2006.229.15:57:22.16#ibcon#flushed, iclass 36, count 0 2006.229.15:57:22.16#ibcon#about to write, iclass 36, count 0 2006.229.15:57:22.16#ibcon#wrote, iclass 36, count 0 2006.229.15:57:22.17#ibcon#about to read 3, iclass 36, count 0 2006.229.15:57:22.18#ibcon#read 3, iclass 36, count 0 2006.229.15:57:22.18#ibcon#about to read 4, iclass 36, count 0 2006.229.15:57:22.18#ibcon#read 4, iclass 36, count 0 2006.229.15:57:22.18#ibcon#about to read 5, iclass 36, count 0 2006.229.15:57:22.18#ibcon#read 5, iclass 36, count 0 2006.229.15:57:22.18#ibcon#about to read 6, iclass 36, count 0 2006.229.15:57:22.18#ibcon#read 6, iclass 36, count 0 2006.229.15:57:22.18#ibcon#end of sib2, iclass 36, count 0 2006.229.15:57:22.18#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:57:22.18#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:57:22.18#ibcon#[25=USB\r\n] 2006.229.15:57:22.19#ibcon#*before write, iclass 36, count 0 2006.229.15:57:22.19#ibcon#enter sib2, iclass 36, count 0 2006.229.15:57:22.19#ibcon#flushed, iclass 36, count 0 2006.229.15:57:22.19#ibcon#about to write, iclass 36, count 0 2006.229.15:57:22.19#ibcon#wrote, iclass 36, count 0 2006.229.15:57:22.19#ibcon#about to read 3, iclass 36, count 0 2006.229.15:57:22.21#ibcon#read 3, iclass 36, count 0 2006.229.15:57:22.21#ibcon#about to read 4, iclass 36, count 0 2006.229.15:57:22.21#ibcon#read 4, iclass 36, count 0 2006.229.15:57:22.21#ibcon#about to read 5, iclass 36, count 0 2006.229.15:57:22.21#ibcon#read 5, iclass 36, count 0 2006.229.15:57:22.21#ibcon#about to read 6, iclass 36, count 0 2006.229.15:57:22.21#ibcon#read 6, iclass 36, count 0 2006.229.15:57:22.21#ibcon#end of sib2, iclass 36, count 0 2006.229.15:57:22.21#ibcon#*after write, iclass 36, count 0 2006.229.15:57:22.22#ibcon#*before return 0, iclass 36, count 0 2006.229.15:57:22.22#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:22.22#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:22.22#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:57:22.22#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:57:22.22$vck44/valo=4,624.99 2006.229.15:57:22.22#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:57:22.22#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:57:22.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:22.22#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:22.22#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:22.22#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:22.22#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:57:22.22#ibcon#first serial, iclass 38, count 0 2006.229.15:57:22.22#ibcon#enter sib2, iclass 38, count 0 2006.229.15:57:22.22#ibcon#flushed, iclass 38, count 0 2006.229.15:57:22.22#ibcon#about to write, iclass 38, count 0 2006.229.15:57:22.22#ibcon#wrote, iclass 38, count 0 2006.229.15:57:22.22#ibcon#about to read 3, iclass 38, count 0 2006.229.15:57:22.23#ibcon#read 3, iclass 38, count 0 2006.229.15:57:22.23#ibcon#about to read 4, iclass 38, count 0 2006.229.15:57:22.23#ibcon#read 4, iclass 38, count 0 2006.229.15:57:22.23#ibcon#about to read 5, iclass 38, count 0 2006.229.15:57:22.23#ibcon#read 5, iclass 38, count 0 2006.229.15:57:22.23#ibcon#about to read 6, iclass 38, count 0 2006.229.15:57:22.23#ibcon#read 6, iclass 38, count 0 2006.229.15:57:22.23#ibcon#end of sib2, iclass 38, count 0 2006.229.15:57:22.23#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:57:22.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:57:22.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.15:57:22.23#ibcon#*before write, iclass 38, count 0 2006.229.15:57:22.24#ibcon#enter sib2, iclass 38, count 0 2006.229.15:57:22.24#ibcon#flushed, iclass 38, count 0 2006.229.15:57:22.24#ibcon#about to write, iclass 38, count 0 2006.229.15:57:22.24#ibcon#wrote, iclass 38, count 0 2006.229.15:57:22.24#ibcon#about to read 3, iclass 38, count 0 2006.229.15:57:22.27#ibcon#read 3, iclass 38, count 0 2006.229.15:57:22.27#ibcon#about to read 4, iclass 38, count 0 2006.229.15:57:22.27#ibcon#read 4, iclass 38, count 0 2006.229.15:57:22.27#ibcon#about to read 5, iclass 38, count 0 2006.229.15:57:22.27#ibcon#read 5, iclass 38, count 0 2006.229.15:57:22.27#ibcon#about to read 6, iclass 38, count 0 2006.229.15:57:22.27#ibcon#read 6, iclass 38, count 0 2006.229.15:57:22.27#ibcon#end of sib2, iclass 38, count 0 2006.229.15:57:22.27#ibcon#*after write, iclass 38, count 0 2006.229.15:57:22.27#ibcon#*before return 0, iclass 38, count 0 2006.229.15:57:22.28#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:22.28#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:22.28#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:57:22.28#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:57:22.28$vck44/va=4,7 2006.229.15:57:22.28#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:57:22.28#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:57:22.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:22.28#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:22.33#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:22.33#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:22.33#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:57:22.33#ibcon#first serial, iclass 40, count 2 2006.229.15:57:22.33#ibcon#enter sib2, iclass 40, count 2 2006.229.15:57:22.33#ibcon#flushed, iclass 40, count 2 2006.229.15:57:22.33#ibcon#about to write, iclass 40, count 2 2006.229.15:57:22.33#ibcon#wrote, iclass 40, count 2 2006.229.15:57:22.34#ibcon#about to read 3, iclass 40, count 2 2006.229.15:57:22.35#ibcon#read 3, iclass 40, count 2 2006.229.15:57:22.35#ibcon#about to read 4, iclass 40, count 2 2006.229.15:57:22.35#ibcon#read 4, iclass 40, count 2 2006.229.15:57:22.35#ibcon#about to read 5, iclass 40, count 2 2006.229.15:57:22.35#ibcon#read 5, iclass 40, count 2 2006.229.15:57:22.35#ibcon#about to read 6, iclass 40, count 2 2006.229.15:57:22.35#ibcon#read 6, iclass 40, count 2 2006.229.15:57:22.35#ibcon#end of sib2, iclass 40, count 2 2006.229.15:57:22.35#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:57:22.35#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:57:22.36#ibcon#[25=AT04-07\r\n] 2006.229.15:57:22.36#ibcon#*before write, iclass 40, count 2 2006.229.15:57:22.36#ibcon#enter sib2, iclass 40, count 2 2006.229.15:57:22.36#ibcon#flushed, iclass 40, count 2 2006.229.15:57:22.36#ibcon#about to write, iclass 40, count 2 2006.229.15:57:22.36#ibcon#wrote, iclass 40, count 2 2006.229.15:57:22.36#ibcon#about to read 3, iclass 40, count 2 2006.229.15:57:22.38#ibcon#read 3, iclass 40, count 2 2006.229.15:57:22.38#ibcon#about to read 4, iclass 40, count 2 2006.229.15:57:22.38#ibcon#read 4, iclass 40, count 2 2006.229.15:57:22.38#ibcon#about to read 5, iclass 40, count 2 2006.229.15:57:22.38#ibcon#read 5, iclass 40, count 2 2006.229.15:57:22.38#ibcon#about to read 6, iclass 40, count 2 2006.229.15:57:22.38#ibcon#read 6, iclass 40, count 2 2006.229.15:57:22.38#ibcon#end of sib2, iclass 40, count 2 2006.229.15:57:22.38#ibcon#*after write, iclass 40, count 2 2006.229.15:57:22.39#ibcon#*before return 0, iclass 40, count 2 2006.229.15:57:22.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:22.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:22.41#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:57:22.41#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:22.41#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:22.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:22.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:22.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:57:22.52#ibcon#first serial, iclass 40, count 0 2006.229.15:57:22.52#ibcon#enter sib2, iclass 40, count 0 2006.229.15:57:22.52#ibcon#flushed, iclass 40, count 0 2006.229.15:57:22.52#ibcon#about to write, iclass 40, count 0 2006.229.15:57:22.53#ibcon#wrote, iclass 40, count 0 2006.229.15:57:22.53#ibcon#about to read 3, iclass 40, count 0 2006.229.15:57:22.54#ibcon#read 3, iclass 40, count 0 2006.229.15:57:22.54#ibcon#about to read 4, iclass 40, count 0 2006.229.15:57:22.54#ibcon#read 4, iclass 40, count 0 2006.229.15:57:22.54#ibcon#about to read 5, iclass 40, count 0 2006.229.15:57:22.54#ibcon#read 5, iclass 40, count 0 2006.229.15:57:22.54#ibcon#about to read 6, iclass 40, count 0 2006.229.15:57:22.55#ibcon#read 6, iclass 40, count 0 2006.229.15:57:22.55#ibcon#end of sib2, iclass 40, count 0 2006.229.15:57:22.55#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:57:22.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:57:22.55#ibcon#[25=USB\r\n] 2006.229.15:57:22.55#ibcon#*before write, iclass 40, count 0 2006.229.15:57:22.55#ibcon#enter sib2, iclass 40, count 0 2006.229.15:57:22.55#ibcon#flushed, iclass 40, count 0 2006.229.15:57:22.55#ibcon#about to write, iclass 40, count 0 2006.229.15:57:22.55#ibcon#wrote, iclass 40, count 0 2006.229.15:57:22.55#ibcon#about to read 3, iclass 40, count 0 2006.229.15:57:22.57#ibcon#read 3, iclass 40, count 0 2006.229.15:57:22.57#ibcon#about to read 4, iclass 40, count 0 2006.229.15:57:22.57#ibcon#read 4, iclass 40, count 0 2006.229.15:57:22.57#ibcon#about to read 5, iclass 40, count 0 2006.229.15:57:22.57#ibcon#read 5, iclass 40, count 0 2006.229.15:57:22.57#ibcon#about to read 6, iclass 40, count 0 2006.229.15:57:22.57#ibcon#read 6, iclass 40, count 0 2006.229.15:57:22.57#ibcon#end of sib2, iclass 40, count 0 2006.229.15:57:22.57#ibcon#*after write, iclass 40, count 0 2006.229.15:57:22.58#ibcon#*before return 0, iclass 40, count 0 2006.229.15:57:22.58#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:22.58#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:22.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:57:22.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:57:22.58$vck44/valo=5,734.99 2006.229.15:57:22.58#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:57:22.58#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:57:22.58#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:22.58#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:22.58#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:22.58#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:22.58#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:57:22.58#ibcon#first serial, iclass 4, count 0 2006.229.15:57:22.58#ibcon#enter sib2, iclass 4, count 0 2006.229.15:57:22.58#ibcon#flushed, iclass 4, count 0 2006.229.15:57:22.58#ibcon#about to write, iclass 4, count 0 2006.229.15:57:22.58#ibcon#wrote, iclass 4, count 0 2006.229.15:57:22.58#ibcon#about to read 3, iclass 4, count 0 2006.229.15:57:22.59#ibcon#read 3, iclass 4, count 0 2006.229.15:57:22.59#ibcon#about to read 4, iclass 4, count 0 2006.229.15:57:22.59#ibcon#read 4, iclass 4, count 0 2006.229.15:57:22.59#ibcon#about to read 5, iclass 4, count 0 2006.229.15:57:22.59#ibcon#read 5, iclass 4, count 0 2006.229.15:57:22.59#ibcon#about to read 6, iclass 4, count 0 2006.229.15:57:22.59#ibcon#read 6, iclass 4, count 0 2006.229.15:57:22.59#ibcon#end of sib2, iclass 4, count 0 2006.229.15:57:22.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:57:22.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:57:22.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.15:57:22.60#ibcon#*before write, iclass 4, count 0 2006.229.15:57:22.60#ibcon#enter sib2, iclass 4, count 0 2006.229.15:57:22.60#ibcon#flushed, iclass 4, count 0 2006.229.15:57:22.60#ibcon#about to write, iclass 4, count 0 2006.229.15:57:22.60#ibcon#wrote, iclass 4, count 0 2006.229.15:57:22.60#ibcon#about to read 3, iclass 4, count 0 2006.229.15:57:22.63#ibcon#read 3, iclass 4, count 0 2006.229.15:57:22.63#ibcon#about to read 4, iclass 4, count 0 2006.229.15:57:22.63#ibcon#read 4, iclass 4, count 0 2006.229.15:57:22.63#ibcon#about to read 5, iclass 4, count 0 2006.229.15:57:22.63#ibcon#read 5, iclass 4, count 0 2006.229.15:57:22.63#ibcon#about to read 6, iclass 4, count 0 2006.229.15:57:22.63#ibcon#read 6, iclass 4, count 0 2006.229.15:57:22.63#ibcon#end of sib2, iclass 4, count 0 2006.229.15:57:22.64#ibcon#*after write, iclass 4, count 0 2006.229.15:57:22.64#ibcon#*before return 0, iclass 4, count 0 2006.229.15:57:22.64#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:22.64#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:22.64#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:57:22.64#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:57:22.64$vck44/va=5,4 2006.229.15:57:22.64#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:57:22.64#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:57:22.64#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:22.64#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:22.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:22.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:22.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:57:22.69#ibcon#first serial, iclass 6, count 2 2006.229.15:57:22.69#ibcon#enter sib2, iclass 6, count 2 2006.229.15:57:22.69#ibcon#flushed, iclass 6, count 2 2006.229.15:57:22.69#ibcon#about to write, iclass 6, count 2 2006.229.15:57:22.70#ibcon#wrote, iclass 6, count 2 2006.229.15:57:22.70#ibcon#about to read 3, iclass 6, count 2 2006.229.15:57:22.71#ibcon#read 3, iclass 6, count 2 2006.229.15:57:22.71#ibcon#about to read 4, iclass 6, count 2 2006.229.15:57:22.71#ibcon#read 4, iclass 6, count 2 2006.229.15:57:22.71#ibcon#about to read 5, iclass 6, count 2 2006.229.15:57:22.71#ibcon#read 5, iclass 6, count 2 2006.229.15:57:22.71#ibcon#about to read 6, iclass 6, count 2 2006.229.15:57:22.71#ibcon#read 6, iclass 6, count 2 2006.229.15:57:22.71#ibcon#end of sib2, iclass 6, count 2 2006.229.15:57:22.71#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:57:22.71#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:57:22.71#ibcon#[25=AT05-04\r\n] 2006.229.15:57:22.71#ibcon#*before write, iclass 6, count 2 2006.229.15:57:22.72#ibcon#enter sib2, iclass 6, count 2 2006.229.15:57:22.72#ibcon#flushed, iclass 6, count 2 2006.229.15:57:22.72#ibcon#about to write, iclass 6, count 2 2006.229.15:57:22.72#ibcon#wrote, iclass 6, count 2 2006.229.15:57:22.72#ibcon#about to read 3, iclass 6, count 2 2006.229.15:57:22.74#ibcon#read 3, iclass 6, count 2 2006.229.15:57:22.74#ibcon#about to read 4, iclass 6, count 2 2006.229.15:57:22.74#ibcon#read 4, iclass 6, count 2 2006.229.15:57:22.74#ibcon#about to read 5, iclass 6, count 2 2006.229.15:57:22.74#ibcon#read 5, iclass 6, count 2 2006.229.15:57:22.74#ibcon#about to read 6, iclass 6, count 2 2006.229.15:57:22.74#ibcon#read 6, iclass 6, count 2 2006.229.15:57:22.75#ibcon#end of sib2, iclass 6, count 2 2006.229.15:57:22.75#ibcon#*after write, iclass 6, count 2 2006.229.15:57:22.75#ibcon#*before return 0, iclass 6, count 2 2006.229.15:57:22.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:22.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:22.75#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:57:22.75#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:22.75#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:22.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:22.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:22.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:57:22.86#ibcon#first serial, iclass 6, count 0 2006.229.15:57:22.86#ibcon#enter sib2, iclass 6, count 0 2006.229.15:57:22.86#ibcon#flushed, iclass 6, count 0 2006.229.15:57:22.86#ibcon#about to write, iclass 6, count 0 2006.229.15:57:22.86#ibcon#wrote, iclass 6, count 0 2006.229.15:57:22.87#ibcon#about to read 3, iclass 6, count 0 2006.229.15:57:22.88#ibcon#read 3, iclass 6, count 0 2006.229.15:57:22.88#ibcon#about to read 4, iclass 6, count 0 2006.229.15:57:22.88#ibcon#read 4, iclass 6, count 0 2006.229.15:57:22.88#ibcon#about to read 5, iclass 6, count 0 2006.229.15:57:22.88#ibcon#read 5, iclass 6, count 0 2006.229.15:57:22.88#ibcon#about to read 6, iclass 6, count 0 2006.229.15:57:22.88#ibcon#read 6, iclass 6, count 0 2006.229.15:57:22.88#ibcon#end of sib2, iclass 6, count 0 2006.229.15:57:22.88#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:57:22.88#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:57:22.88#ibcon#[25=USB\r\n] 2006.229.15:57:22.89#ibcon#*before write, iclass 6, count 0 2006.229.15:57:22.89#ibcon#enter sib2, iclass 6, count 0 2006.229.15:57:22.89#ibcon#flushed, iclass 6, count 0 2006.229.15:57:22.89#ibcon#about to write, iclass 6, count 0 2006.229.15:57:22.89#ibcon#wrote, iclass 6, count 0 2006.229.15:57:22.89#ibcon#about to read 3, iclass 6, count 0 2006.229.15:57:22.91#ibcon#read 3, iclass 6, count 0 2006.229.15:57:22.91#ibcon#about to read 4, iclass 6, count 0 2006.229.15:57:22.91#ibcon#read 4, iclass 6, count 0 2006.229.15:57:22.91#ibcon#about to read 5, iclass 6, count 0 2006.229.15:57:22.91#ibcon#read 5, iclass 6, count 0 2006.229.15:57:22.91#ibcon#about to read 6, iclass 6, count 0 2006.229.15:57:22.91#ibcon#read 6, iclass 6, count 0 2006.229.15:57:22.91#ibcon#end of sib2, iclass 6, count 0 2006.229.15:57:22.91#ibcon#*after write, iclass 6, count 0 2006.229.15:57:22.91#ibcon#*before return 0, iclass 6, count 0 2006.229.15:57:22.91#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:22.92#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:22.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:57:22.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:57:22.92$vck44/valo=6,814.99 2006.229.15:57:22.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:57:22.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:57:22.92#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:22.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:22.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:22.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:22.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:57:22.92#ibcon#first serial, iclass 10, count 0 2006.229.15:57:22.92#ibcon#enter sib2, iclass 10, count 0 2006.229.15:57:22.92#ibcon#flushed, iclass 10, count 0 2006.229.15:57:22.92#ibcon#about to write, iclass 10, count 0 2006.229.15:57:22.92#ibcon#wrote, iclass 10, count 0 2006.229.15:57:22.92#ibcon#about to read 3, iclass 10, count 0 2006.229.15:57:22.93#ibcon#read 3, iclass 10, count 0 2006.229.15:57:22.93#ibcon#about to read 4, iclass 10, count 0 2006.229.15:57:22.93#ibcon#read 4, iclass 10, count 0 2006.229.15:57:22.93#ibcon#about to read 5, iclass 10, count 0 2006.229.15:57:22.93#ibcon#read 5, iclass 10, count 0 2006.229.15:57:22.93#ibcon#about to read 6, iclass 10, count 0 2006.229.15:57:22.93#ibcon#read 6, iclass 10, count 0 2006.229.15:57:22.93#ibcon#end of sib2, iclass 10, count 0 2006.229.15:57:22.93#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:57:22.93#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:57:22.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.15:57:22.94#ibcon#*before write, iclass 10, count 0 2006.229.15:57:22.94#ibcon#enter sib2, iclass 10, count 0 2006.229.15:57:22.94#ibcon#flushed, iclass 10, count 0 2006.229.15:57:22.94#ibcon#about to write, iclass 10, count 0 2006.229.15:57:22.94#ibcon#wrote, iclass 10, count 0 2006.229.15:57:22.94#ibcon#about to read 3, iclass 10, count 0 2006.229.15:57:22.97#ibcon#read 3, iclass 10, count 0 2006.229.15:57:22.97#ibcon#about to read 4, iclass 10, count 0 2006.229.15:57:22.97#ibcon#read 4, iclass 10, count 0 2006.229.15:57:22.97#ibcon#about to read 5, iclass 10, count 0 2006.229.15:57:22.97#ibcon#read 5, iclass 10, count 0 2006.229.15:57:22.97#ibcon#about to read 6, iclass 10, count 0 2006.229.15:57:22.97#ibcon#read 6, iclass 10, count 0 2006.229.15:57:22.97#ibcon#end of sib2, iclass 10, count 0 2006.229.15:57:22.97#ibcon#*after write, iclass 10, count 0 2006.229.15:57:22.97#ibcon#*before return 0, iclass 10, count 0 2006.229.15:57:22.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:22.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:22.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:57:22.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:57:22.98$vck44/va=6,4 2006.229.15:57:22.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:57:22.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:57:22.98#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:22.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:23.03#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:23.03#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:23.03#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:57:23.03#ibcon#first serial, iclass 12, count 2 2006.229.15:57:23.03#ibcon#enter sib2, iclass 12, count 2 2006.229.15:57:23.03#ibcon#flushed, iclass 12, count 2 2006.229.15:57:23.03#ibcon#about to write, iclass 12, count 2 2006.229.15:57:23.04#ibcon#wrote, iclass 12, count 2 2006.229.15:57:23.04#ibcon#about to read 3, iclass 12, count 2 2006.229.15:57:23.05#ibcon#read 3, iclass 12, count 2 2006.229.15:57:23.05#ibcon#about to read 4, iclass 12, count 2 2006.229.15:57:23.05#ibcon#read 4, iclass 12, count 2 2006.229.15:57:23.05#ibcon#about to read 5, iclass 12, count 2 2006.229.15:57:23.05#ibcon#read 5, iclass 12, count 2 2006.229.15:57:23.05#ibcon#about to read 6, iclass 12, count 2 2006.229.15:57:23.05#ibcon#read 6, iclass 12, count 2 2006.229.15:57:23.05#ibcon#end of sib2, iclass 12, count 2 2006.229.15:57:23.05#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:57:23.05#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:57:23.05#ibcon#[25=AT06-04\r\n] 2006.229.15:57:23.06#ibcon#*before write, iclass 12, count 2 2006.229.15:57:23.06#ibcon#enter sib2, iclass 12, count 2 2006.229.15:57:23.06#ibcon#flushed, iclass 12, count 2 2006.229.15:57:23.06#ibcon#about to write, iclass 12, count 2 2006.229.15:57:23.06#ibcon#wrote, iclass 12, count 2 2006.229.15:57:23.06#ibcon#about to read 3, iclass 12, count 2 2006.229.15:57:23.08#ibcon#read 3, iclass 12, count 2 2006.229.15:57:23.08#ibcon#about to read 4, iclass 12, count 2 2006.229.15:57:23.08#ibcon#read 4, iclass 12, count 2 2006.229.15:57:23.08#ibcon#about to read 5, iclass 12, count 2 2006.229.15:57:23.08#ibcon#read 5, iclass 12, count 2 2006.229.15:57:23.08#ibcon#about to read 6, iclass 12, count 2 2006.229.15:57:23.08#ibcon#read 6, iclass 12, count 2 2006.229.15:57:23.09#ibcon#end of sib2, iclass 12, count 2 2006.229.15:57:23.09#ibcon#*after write, iclass 12, count 2 2006.229.15:57:23.09#ibcon#*before return 0, iclass 12, count 2 2006.229.15:57:23.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:23.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:23.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:57:23.09#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:23.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:23.20#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:23.20#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:23.20#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:57:23.20#ibcon#first serial, iclass 12, count 0 2006.229.15:57:23.20#ibcon#enter sib2, iclass 12, count 0 2006.229.15:57:23.20#ibcon#flushed, iclass 12, count 0 2006.229.15:57:23.20#ibcon#about to write, iclass 12, count 0 2006.229.15:57:23.20#ibcon#wrote, iclass 12, count 0 2006.229.15:57:23.21#ibcon#about to read 3, iclass 12, count 0 2006.229.15:57:23.22#ibcon#read 3, iclass 12, count 0 2006.229.15:57:23.22#ibcon#about to read 4, iclass 12, count 0 2006.229.15:57:23.22#ibcon#read 4, iclass 12, count 0 2006.229.15:57:23.22#ibcon#about to read 5, iclass 12, count 0 2006.229.15:57:23.22#ibcon#read 5, iclass 12, count 0 2006.229.15:57:23.22#ibcon#about to read 6, iclass 12, count 0 2006.229.15:57:23.22#ibcon#read 6, iclass 12, count 0 2006.229.15:57:23.22#ibcon#end of sib2, iclass 12, count 0 2006.229.15:57:23.22#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:57:23.22#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:57:23.22#ibcon#[25=USB\r\n] 2006.229.15:57:23.22#ibcon#*before write, iclass 12, count 0 2006.229.15:57:23.23#ibcon#enter sib2, iclass 12, count 0 2006.229.15:57:23.23#ibcon#flushed, iclass 12, count 0 2006.229.15:57:23.23#ibcon#about to write, iclass 12, count 0 2006.229.15:57:23.23#ibcon#wrote, iclass 12, count 0 2006.229.15:57:23.23#ibcon#about to read 3, iclass 12, count 0 2006.229.15:57:23.25#ibcon#read 3, iclass 12, count 0 2006.229.15:57:23.25#ibcon#about to read 4, iclass 12, count 0 2006.229.15:57:23.25#ibcon#read 4, iclass 12, count 0 2006.229.15:57:23.25#ibcon#about to read 5, iclass 12, count 0 2006.229.15:57:23.25#ibcon#read 5, iclass 12, count 0 2006.229.15:57:23.25#ibcon#about to read 6, iclass 12, count 0 2006.229.15:57:23.25#ibcon#read 6, iclass 12, count 0 2006.229.15:57:23.26#ibcon#end of sib2, iclass 12, count 0 2006.229.15:57:23.26#ibcon#*after write, iclass 12, count 0 2006.229.15:57:23.26#ibcon#*before return 0, iclass 12, count 0 2006.229.15:57:23.26#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:23.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:23.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:57:23.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:57:23.26$vck44/valo=7,864.99 2006.229.15:57:23.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:57:23.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:57:23.26#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:23.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:23.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:23.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:23.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:57:23.26#ibcon#first serial, iclass 14, count 0 2006.229.15:57:23.26#ibcon#enter sib2, iclass 14, count 0 2006.229.15:57:23.26#ibcon#flushed, iclass 14, count 0 2006.229.15:57:23.26#ibcon#about to write, iclass 14, count 0 2006.229.15:57:23.26#ibcon#wrote, iclass 14, count 0 2006.229.15:57:23.26#ibcon#about to read 3, iclass 14, count 0 2006.229.15:57:23.27#ibcon#read 3, iclass 14, count 0 2006.229.15:57:23.27#ibcon#about to read 4, iclass 14, count 0 2006.229.15:57:23.27#ibcon#read 4, iclass 14, count 0 2006.229.15:57:23.27#ibcon#about to read 5, iclass 14, count 0 2006.229.15:57:23.27#ibcon#read 5, iclass 14, count 0 2006.229.15:57:23.27#ibcon#about to read 6, iclass 14, count 0 2006.229.15:57:23.27#ibcon#read 6, iclass 14, count 0 2006.229.15:57:23.27#ibcon#end of sib2, iclass 14, count 0 2006.229.15:57:23.27#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:57:23.27#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:57:23.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.15:57:23.28#ibcon#*before write, iclass 14, count 0 2006.229.15:57:23.28#ibcon#enter sib2, iclass 14, count 0 2006.229.15:57:23.28#ibcon#flushed, iclass 14, count 0 2006.229.15:57:23.28#ibcon#about to write, iclass 14, count 0 2006.229.15:57:23.28#ibcon#wrote, iclass 14, count 0 2006.229.15:57:23.28#ibcon#about to read 3, iclass 14, count 0 2006.229.15:57:23.31#ibcon#read 3, iclass 14, count 0 2006.229.15:57:23.31#ibcon#about to read 4, iclass 14, count 0 2006.229.15:57:23.31#ibcon#read 4, iclass 14, count 0 2006.229.15:57:23.31#ibcon#about to read 5, iclass 14, count 0 2006.229.15:57:23.31#ibcon#read 5, iclass 14, count 0 2006.229.15:57:23.31#ibcon#about to read 6, iclass 14, count 0 2006.229.15:57:23.31#ibcon#read 6, iclass 14, count 0 2006.229.15:57:23.31#ibcon#end of sib2, iclass 14, count 0 2006.229.15:57:23.32#ibcon#*after write, iclass 14, count 0 2006.229.15:57:23.32#ibcon#*before return 0, iclass 14, count 0 2006.229.15:57:23.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:23.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:23.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:57:23.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:57:23.32$vck44/va=7,5 2006.229.15:57:23.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:57:23.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:57:23.32#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:23.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:23.37#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:23.37#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:23.37#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:57:23.37#ibcon#first serial, iclass 16, count 2 2006.229.15:57:23.37#ibcon#enter sib2, iclass 16, count 2 2006.229.15:57:23.37#ibcon#flushed, iclass 16, count 2 2006.229.15:57:23.37#ibcon#about to write, iclass 16, count 2 2006.229.15:57:23.38#ibcon#wrote, iclass 16, count 2 2006.229.15:57:23.38#ibcon#about to read 3, iclass 16, count 2 2006.229.15:57:23.39#ibcon#read 3, iclass 16, count 2 2006.229.15:57:23.39#ibcon#about to read 4, iclass 16, count 2 2006.229.15:57:23.39#ibcon#read 4, iclass 16, count 2 2006.229.15:57:23.39#ibcon#about to read 5, iclass 16, count 2 2006.229.15:57:23.40#ibcon#read 5, iclass 16, count 2 2006.229.15:57:23.40#ibcon#about to read 6, iclass 16, count 2 2006.229.15:57:23.40#ibcon#read 6, iclass 16, count 2 2006.229.15:57:23.40#ibcon#end of sib2, iclass 16, count 2 2006.229.15:57:23.40#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:57:23.40#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:57:23.40#ibcon#[25=AT07-05\r\n] 2006.229.15:57:23.40#ibcon#*before write, iclass 16, count 2 2006.229.15:57:23.40#ibcon#enter sib2, iclass 16, count 2 2006.229.15:57:23.40#ibcon#flushed, iclass 16, count 2 2006.229.15:57:23.40#ibcon#about to write, iclass 16, count 2 2006.229.15:57:23.40#ibcon#wrote, iclass 16, count 2 2006.229.15:57:23.40#ibcon#about to read 3, iclass 16, count 2 2006.229.15:57:23.42#ibcon#read 3, iclass 16, count 2 2006.229.15:57:23.42#ibcon#about to read 4, iclass 16, count 2 2006.229.15:57:23.42#ibcon#read 4, iclass 16, count 2 2006.229.15:57:23.42#ibcon#about to read 5, iclass 16, count 2 2006.229.15:57:23.42#ibcon#read 5, iclass 16, count 2 2006.229.15:57:23.42#ibcon#about to read 6, iclass 16, count 2 2006.229.15:57:23.43#ibcon#read 6, iclass 16, count 2 2006.229.15:57:23.43#ibcon#end of sib2, iclass 16, count 2 2006.229.15:57:23.43#ibcon#*after write, iclass 16, count 2 2006.229.15:57:23.43#ibcon#*before return 0, iclass 16, count 2 2006.229.15:57:23.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:23.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:23.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:57:23.43#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:23.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:23.54#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:23.54#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:23.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:57:23.54#ibcon#first serial, iclass 16, count 0 2006.229.15:57:23.54#ibcon#enter sib2, iclass 16, count 0 2006.229.15:57:23.54#ibcon#flushed, iclass 16, count 0 2006.229.15:57:23.54#ibcon#about to write, iclass 16, count 0 2006.229.15:57:23.54#ibcon#wrote, iclass 16, count 0 2006.229.15:57:23.55#ibcon#about to read 3, iclass 16, count 0 2006.229.15:57:23.56#ibcon#read 3, iclass 16, count 0 2006.229.15:57:23.56#ibcon#about to read 4, iclass 16, count 0 2006.229.15:57:23.56#ibcon#read 4, iclass 16, count 0 2006.229.15:57:23.56#ibcon#about to read 5, iclass 16, count 0 2006.229.15:57:23.56#ibcon#read 5, iclass 16, count 0 2006.229.15:57:23.56#ibcon#about to read 6, iclass 16, count 0 2006.229.15:57:23.57#ibcon#read 6, iclass 16, count 0 2006.229.15:57:23.57#ibcon#end of sib2, iclass 16, count 0 2006.229.15:57:23.57#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:57:23.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:57:23.57#ibcon#[25=USB\r\n] 2006.229.15:57:23.57#ibcon#*before write, iclass 16, count 0 2006.229.15:57:23.57#ibcon#enter sib2, iclass 16, count 0 2006.229.15:57:23.57#ibcon#flushed, iclass 16, count 0 2006.229.15:57:23.57#ibcon#about to write, iclass 16, count 0 2006.229.15:57:23.57#ibcon#wrote, iclass 16, count 0 2006.229.15:57:23.57#ibcon#about to read 3, iclass 16, count 0 2006.229.15:57:23.59#ibcon#read 3, iclass 16, count 0 2006.229.15:57:23.59#ibcon#about to read 4, iclass 16, count 0 2006.229.15:57:23.59#ibcon#read 4, iclass 16, count 0 2006.229.15:57:23.59#ibcon#about to read 5, iclass 16, count 0 2006.229.15:57:23.59#ibcon#read 5, iclass 16, count 0 2006.229.15:57:23.59#ibcon#about to read 6, iclass 16, count 0 2006.229.15:57:23.59#ibcon#read 6, iclass 16, count 0 2006.229.15:57:23.59#ibcon#end of sib2, iclass 16, count 0 2006.229.15:57:23.60#ibcon#*after write, iclass 16, count 0 2006.229.15:57:23.60#ibcon#*before return 0, iclass 16, count 0 2006.229.15:57:23.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:23.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:23.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:57:23.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:57:23.60$vck44/valo=8,884.99 2006.229.15:57:23.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:57:23.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:57:23.60#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:23.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:23.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:23.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:23.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:57:23.60#ibcon#first serial, iclass 18, count 0 2006.229.15:57:23.60#ibcon#enter sib2, iclass 18, count 0 2006.229.15:57:23.60#ibcon#flushed, iclass 18, count 0 2006.229.15:57:23.60#ibcon#about to write, iclass 18, count 0 2006.229.15:57:23.60#ibcon#wrote, iclass 18, count 0 2006.229.15:57:23.60#ibcon#about to read 3, iclass 18, count 0 2006.229.15:57:23.61#ibcon#read 3, iclass 18, count 0 2006.229.15:57:23.61#ibcon#about to read 4, iclass 18, count 0 2006.229.15:57:23.61#ibcon#read 4, iclass 18, count 0 2006.229.15:57:23.61#ibcon#about to read 5, iclass 18, count 0 2006.229.15:57:23.61#ibcon#read 5, iclass 18, count 0 2006.229.15:57:23.61#ibcon#about to read 6, iclass 18, count 0 2006.229.15:57:23.61#ibcon#read 6, iclass 18, count 0 2006.229.15:57:23.61#ibcon#end of sib2, iclass 18, count 0 2006.229.15:57:23.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:57:23.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:57:23.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.15:57:23.62#ibcon#*before write, iclass 18, count 0 2006.229.15:57:23.62#ibcon#enter sib2, iclass 18, count 0 2006.229.15:57:23.62#ibcon#flushed, iclass 18, count 0 2006.229.15:57:23.62#ibcon#about to write, iclass 18, count 0 2006.229.15:57:23.62#ibcon#wrote, iclass 18, count 0 2006.229.15:57:23.62#ibcon#about to read 3, iclass 18, count 0 2006.229.15:57:23.65#ibcon#read 3, iclass 18, count 0 2006.229.15:57:23.65#ibcon#about to read 4, iclass 18, count 0 2006.229.15:57:23.65#ibcon#read 4, iclass 18, count 0 2006.229.15:57:23.65#ibcon#about to read 5, iclass 18, count 0 2006.229.15:57:23.65#ibcon#read 5, iclass 18, count 0 2006.229.15:57:23.65#ibcon#about to read 6, iclass 18, count 0 2006.229.15:57:23.65#ibcon#read 6, iclass 18, count 0 2006.229.15:57:23.65#ibcon#end of sib2, iclass 18, count 0 2006.229.15:57:23.65#ibcon#*after write, iclass 18, count 0 2006.229.15:57:23.66#ibcon#*before return 0, iclass 18, count 0 2006.229.15:57:23.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:23.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:23.66#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:57:23.66#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:57:23.66$vck44/va=8,6 2006.229.15:57:23.66#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.15:57:23.66#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.15:57:23.66#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:23.66#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:57:23.71#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:57:23.71#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:57:23.71#ibcon#enter wrdev, iclass 20, count 2 2006.229.15:57:23.71#ibcon#first serial, iclass 20, count 2 2006.229.15:57:23.71#ibcon#enter sib2, iclass 20, count 2 2006.229.15:57:23.71#ibcon#flushed, iclass 20, count 2 2006.229.15:57:23.71#ibcon#about to write, iclass 20, count 2 2006.229.15:57:23.72#ibcon#wrote, iclass 20, count 2 2006.229.15:57:23.72#ibcon#about to read 3, iclass 20, count 2 2006.229.15:57:23.73#ibcon#read 3, iclass 20, count 2 2006.229.15:57:23.73#ibcon#about to read 4, iclass 20, count 2 2006.229.15:57:23.73#ibcon#read 4, iclass 20, count 2 2006.229.15:57:23.73#ibcon#about to read 5, iclass 20, count 2 2006.229.15:57:23.73#ibcon#read 5, iclass 20, count 2 2006.229.15:57:23.73#ibcon#about to read 6, iclass 20, count 2 2006.229.15:57:23.73#ibcon#read 6, iclass 20, count 2 2006.229.15:57:23.74#ibcon#end of sib2, iclass 20, count 2 2006.229.15:57:23.74#ibcon#*mode == 0, iclass 20, count 2 2006.229.15:57:23.74#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.15:57:23.74#ibcon#[25=AT08-06\r\n] 2006.229.15:57:23.74#ibcon#*before write, iclass 20, count 2 2006.229.15:57:23.74#ibcon#enter sib2, iclass 20, count 2 2006.229.15:57:23.74#ibcon#flushed, iclass 20, count 2 2006.229.15:57:23.74#ibcon#about to write, iclass 20, count 2 2006.229.15:57:23.74#ibcon#wrote, iclass 20, count 2 2006.229.15:57:23.74#ibcon#about to read 3, iclass 20, count 2 2006.229.15:57:23.76#ibcon#read 3, iclass 20, count 2 2006.229.15:57:23.76#ibcon#about to read 4, iclass 20, count 2 2006.229.15:57:23.76#ibcon#read 4, iclass 20, count 2 2006.229.15:57:23.76#ibcon#about to read 5, iclass 20, count 2 2006.229.15:57:23.76#ibcon#read 5, iclass 20, count 2 2006.229.15:57:23.76#ibcon#about to read 6, iclass 20, count 2 2006.229.15:57:23.76#ibcon#read 6, iclass 20, count 2 2006.229.15:57:23.76#ibcon#end of sib2, iclass 20, count 2 2006.229.15:57:23.76#ibcon#*after write, iclass 20, count 2 2006.229.15:57:23.77#ibcon#*before return 0, iclass 20, count 2 2006.229.15:57:23.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:57:23.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.15:57:23.77#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.15:57:23.77#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:23.77#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:57:23.88#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:57:23.88#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:57:23.88#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:57:23.88#ibcon#first serial, iclass 20, count 0 2006.229.15:57:23.88#ibcon#enter sib2, iclass 20, count 0 2006.229.15:57:23.88#ibcon#flushed, iclass 20, count 0 2006.229.15:57:23.88#ibcon#about to write, iclass 20, count 0 2006.229.15:57:23.89#ibcon#wrote, iclass 20, count 0 2006.229.15:57:23.89#ibcon#about to read 3, iclass 20, count 0 2006.229.15:57:23.90#ibcon#read 3, iclass 20, count 0 2006.229.15:57:23.90#ibcon#about to read 4, iclass 20, count 0 2006.229.15:57:23.90#ibcon#read 4, iclass 20, count 0 2006.229.15:57:23.90#ibcon#about to read 5, iclass 20, count 0 2006.229.15:57:23.90#ibcon#read 5, iclass 20, count 0 2006.229.15:57:23.90#ibcon#about to read 6, iclass 20, count 0 2006.229.15:57:23.90#ibcon#read 6, iclass 20, count 0 2006.229.15:57:23.90#ibcon#end of sib2, iclass 20, count 0 2006.229.15:57:23.90#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:57:23.90#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:57:23.91#ibcon#[25=USB\r\n] 2006.229.15:57:23.91#ibcon#*before write, iclass 20, count 0 2006.229.15:57:23.91#ibcon#enter sib2, iclass 20, count 0 2006.229.15:57:23.91#ibcon#flushed, iclass 20, count 0 2006.229.15:57:23.91#ibcon#about to write, iclass 20, count 0 2006.229.15:57:23.91#ibcon#wrote, iclass 20, count 0 2006.229.15:57:23.91#ibcon#about to read 3, iclass 20, count 0 2006.229.15:57:23.93#ibcon#read 3, iclass 20, count 0 2006.229.15:57:23.93#ibcon#about to read 4, iclass 20, count 0 2006.229.15:57:23.93#ibcon#read 4, iclass 20, count 0 2006.229.15:57:23.93#ibcon#about to read 5, iclass 20, count 0 2006.229.15:57:23.93#ibcon#read 5, iclass 20, count 0 2006.229.15:57:23.93#ibcon#about to read 6, iclass 20, count 0 2006.229.15:57:23.93#ibcon#read 6, iclass 20, count 0 2006.229.15:57:23.93#ibcon#end of sib2, iclass 20, count 0 2006.229.15:57:23.93#ibcon#*after write, iclass 20, count 0 2006.229.15:57:23.93#ibcon#*before return 0, iclass 20, count 0 2006.229.15:57:23.93#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:57:23.94#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.15:57:23.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:57:23.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:57:23.94$vck44/vblo=1,629.99 2006.229.15:57:23.94#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.15:57:23.94#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.15:57:23.94#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:23.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:57:23.94#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:57:23.94#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:57:23.94#ibcon#enter wrdev, iclass 22, count 0 2006.229.15:57:23.94#ibcon#first serial, iclass 22, count 0 2006.229.15:57:23.94#ibcon#enter sib2, iclass 22, count 0 2006.229.15:57:23.94#ibcon#flushed, iclass 22, count 0 2006.229.15:57:23.94#ibcon#about to write, iclass 22, count 0 2006.229.15:57:23.94#ibcon#wrote, iclass 22, count 0 2006.229.15:57:23.94#ibcon#about to read 3, iclass 22, count 0 2006.229.15:57:23.95#ibcon#read 3, iclass 22, count 0 2006.229.15:57:23.95#ibcon#about to read 4, iclass 22, count 0 2006.229.15:57:23.95#ibcon#read 4, iclass 22, count 0 2006.229.15:57:23.95#ibcon#about to read 5, iclass 22, count 0 2006.229.15:57:23.95#ibcon#read 5, iclass 22, count 0 2006.229.15:57:23.95#ibcon#about to read 6, iclass 22, count 0 2006.229.15:57:23.95#ibcon#read 6, iclass 22, count 0 2006.229.15:57:23.95#ibcon#end of sib2, iclass 22, count 0 2006.229.15:57:23.95#ibcon#*mode == 0, iclass 22, count 0 2006.229.15:57:23.95#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.15:57:23.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.15:57:23.95#ibcon#*before write, iclass 22, count 0 2006.229.15:57:23.96#ibcon#enter sib2, iclass 22, count 0 2006.229.15:57:23.96#ibcon#flushed, iclass 22, count 0 2006.229.15:57:23.96#ibcon#about to write, iclass 22, count 0 2006.229.15:57:23.96#ibcon#wrote, iclass 22, count 0 2006.229.15:57:23.96#ibcon#about to read 3, iclass 22, count 0 2006.229.15:57:23.99#ibcon#read 3, iclass 22, count 0 2006.229.15:57:23.99#ibcon#about to read 4, iclass 22, count 0 2006.229.15:57:23.99#ibcon#read 4, iclass 22, count 0 2006.229.15:57:23.99#ibcon#about to read 5, iclass 22, count 0 2006.229.15:57:23.99#ibcon#read 5, iclass 22, count 0 2006.229.15:57:23.99#ibcon#about to read 6, iclass 22, count 0 2006.229.15:57:23.99#ibcon#read 6, iclass 22, count 0 2006.229.15:57:23.99#ibcon#end of sib2, iclass 22, count 0 2006.229.15:57:23.99#ibcon#*after write, iclass 22, count 0 2006.229.15:57:23.99#ibcon#*before return 0, iclass 22, count 0 2006.229.15:57:24.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:57:24.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.15:57:24.00#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.15:57:24.00#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.15:57:24.00$vck44/vb=1,4 2006.229.15:57:24.00#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.15:57:24.00#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.15:57:24.00#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:24.00#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:57:24.00#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:57:24.00#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:57:24.00#ibcon#enter wrdev, iclass 24, count 2 2006.229.15:57:24.00#ibcon#first serial, iclass 24, count 2 2006.229.15:57:24.00#ibcon#enter sib2, iclass 24, count 2 2006.229.15:57:24.00#ibcon#flushed, iclass 24, count 2 2006.229.15:57:24.00#ibcon#about to write, iclass 24, count 2 2006.229.15:57:24.00#ibcon#wrote, iclass 24, count 2 2006.229.15:57:24.00#ibcon#about to read 3, iclass 24, count 2 2006.229.15:57:24.01#ibcon#read 3, iclass 24, count 2 2006.229.15:57:24.01#ibcon#about to read 4, iclass 24, count 2 2006.229.15:57:24.01#ibcon#read 4, iclass 24, count 2 2006.229.15:57:24.01#ibcon#about to read 5, iclass 24, count 2 2006.229.15:57:24.01#ibcon#read 5, iclass 24, count 2 2006.229.15:57:24.01#ibcon#about to read 6, iclass 24, count 2 2006.229.15:57:24.01#ibcon#read 6, iclass 24, count 2 2006.229.15:57:24.01#ibcon#end of sib2, iclass 24, count 2 2006.229.15:57:24.01#ibcon#*mode == 0, iclass 24, count 2 2006.229.15:57:24.01#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.15:57:24.02#ibcon#[27=AT01-04\r\n] 2006.229.15:57:24.02#ibcon#*before write, iclass 24, count 2 2006.229.15:57:24.02#ibcon#enter sib2, iclass 24, count 2 2006.229.15:57:24.02#ibcon#flushed, iclass 24, count 2 2006.229.15:57:24.02#ibcon#about to write, iclass 24, count 2 2006.229.15:57:24.02#ibcon#wrote, iclass 24, count 2 2006.229.15:57:24.02#ibcon#about to read 3, iclass 24, count 2 2006.229.15:57:24.04#ibcon#read 3, iclass 24, count 2 2006.229.15:57:24.04#ibcon#about to read 4, iclass 24, count 2 2006.229.15:57:24.04#ibcon#read 4, iclass 24, count 2 2006.229.15:57:24.04#ibcon#about to read 5, iclass 24, count 2 2006.229.15:57:24.04#ibcon#read 5, iclass 24, count 2 2006.229.15:57:24.04#ibcon#about to read 6, iclass 24, count 2 2006.229.15:57:24.04#ibcon#read 6, iclass 24, count 2 2006.229.15:57:24.04#ibcon#end of sib2, iclass 24, count 2 2006.229.15:57:24.04#ibcon#*after write, iclass 24, count 2 2006.229.15:57:24.05#ibcon#*before return 0, iclass 24, count 2 2006.229.15:57:24.05#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:57:24.05#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.15:57:24.05#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.15:57:24.05#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:24.05#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:57:24.16#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:57:24.16#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:57:24.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.15:57:24.16#ibcon#first serial, iclass 24, count 0 2006.229.15:57:24.16#ibcon#enter sib2, iclass 24, count 0 2006.229.15:57:24.16#ibcon#flushed, iclass 24, count 0 2006.229.15:57:24.16#ibcon#about to write, iclass 24, count 0 2006.229.15:57:24.16#ibcon#wrote, iclass 24, count 0 2006.229.15:57:24.17#ibcon#about to read 3, iclass 24, count 0 2006.229.15:57:24.18#ibcon#read 3, iclass 24, count 0 2006.229.15:57:24.18#ibcon#about to read 4, iclass 24, count 0 2006.229.15:57:24.18#ibcon#read 4, iclass 24, count 0 2006.229.15:57:24.18#ibcon#about to read 5, iclass 24, count 0 2006.229.15:57:24.18#ibcon#read 5, iclass 24, count 0 2006.229.15:57:24.18#ibcon#about to read 6, iclass 24, count 0 2006.229.15:57:24.18#ibcon#read 6, iclass 24, count 0 2006.229.15:57:24.19#ibcon#end of sib2, iclass 24, count 0 2006.229.15:57:24.19#ibcon#*mode == 0, iclass 24, count 0 2006.229.15:57:24.19#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.15:57:24.19#ibcon#[27=USB\r\n] 2006.229.15:57:24.19#ibcon#*before write, iclass 24, count 0 2006.229.15:57:24.19#ibcon#enter sib2, iclass 24, count 0 2006.229.15:57:24.19#ibcon#flushed, iclass 24, count 0 2006.229.15:57:24.19#ibcon#about to write, iclass 24, count 0 2006.229.15:57:24.19#ibcon#wrote, iclass 24, count 0 2006.229.15:57:24.19#ibcon#about to read 3, iclass 24, count 0 2006.229.15:57:24.21#ibcon#read 3, iclass 24, count 0 2006.229.15:57:24.21#ibcon#about to read 4, iclass 24, count 0 2006.229.15:57:24.21#ibcon#read 4, iclass 24, count 0 2006.229.15:57:24.21#ibcon#about to read 5, iclass 24, count 0 2006.229.15:57:24.21#ibcon#read 5, iclass 24, count 0 2006.229.15:57:24.21#ibcon#about to read 6, iclass 24, count 0 2006.229.15:57:24.21#ibcon#read 6, iclass 24, count 0 2006.229.15:57:24.21#ibcon#end of sib2, iclass 24, count 0 2006.229.15:57:24.21#ibcon#*after write, iclass 24, count 0 2006.229.15:57:24.21#ibcon#*before return 0, iclass 24, count 0 2006.229.15:57:24.21#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:57:24.22#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.15:57:24.22#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.15:57:24.22#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.15:57:24.22$vck44/vblo=2,634.99 2006.229.15:57:24.22#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.15:57:24.22#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.15:57:24.22#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:24.22#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:24.22#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:24.22#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:24.22#ibcon#enter wrdev, iclass 26, count 0 2006.229.15:57:24.22#ibcon#first serial, iclass 26, count 0 2006.229.15:57:24.22#ibcon#enter sib2, iclass 26, count 0 2006.229.15:57:24.22#ibcon#flushed, iclass 26, count 0 2006.229.15:57:24.22#ibcon#about to write, iclass 26, count 0 2006.229.15:57:24.22#ibcon#wrote, iclass 26, count 0 2006.229.15:57:24.22#ibcon#about to read 3, iclass 26, count 0 2006.229.15:57:24.23#ibcon#read 3, iclass 26, count 0 2006.229.15:57:24.23#ibcon#about to read 4, iclass 26, count 0 2006.229.15:57:24.23#ibcon#read 4, iclass 26, count 0 2006.229.15:57:24.23#ibcon#about to read 5, iclass 26, count 0 2006.229.15:57:24.23#ibcon#read 5, iclass 26, count 0 2006.229.15:57:24.23#ibcon#about to read 6, iclass 26, count 0 2006.229.15:57:24.23#ibcon#read 6, iclass 26, count 0 2006.229.15:57:24.23#ibcon#end of sib2, iclass 26, count 0 2006.229.15:57:24.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.15:57:24.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.15:57:24.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.15:57:24.24#ibcon#*before write, iclass 26, count 0 2006.229.15:57:24.24#ibcon#enter sib2, iclass 26, count 0 2006.229.15:57:24.24#ibcon#flushed, iclass 26, count 0 2006.229.15:57:24.24#ibcon#about to write, iclass 26, count 0 2006.229.15:57:24.24#ibcon#wrote, iclass 26, count 0 2006.229.15:57:24.24#ibcon#about to read 3, iclass 26, count 0 2006.229.15:57:24.27#ibcon#read 3, iclass 26, count 0 2006.229.15:57:24.27#ibcon#about to read 4, iclass 26, count 0 2006.229.15:57:24.27#ibcon#read 4, iclass 26, count 0 2006.229.15:57:24.27#ibcon#about to read 5, iclass 26, count 0 2006.229.15:57:24.27#ibcon#read 5, iclass 26, count 0 2006.229.15:57:24.27#ibcon#about to read 6, iclass 26, count 0 2006.229.15:57:24.27#ibcon#read 6, iclass 26, count 0 2006.229.15:57:24.27#ibcon#end of sib2, iclass 26, count 0 2006.229.15:57:24.27#ibcon#*after write, iclass 26, count 0 2006.229.15:57:24.27#ibcon#*before return 0, iclass 26, count 0 2006.229.15:57:24.28#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:24.28#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.15:57:24.28#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.15:57:24.28#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.15:57:24.28$vck44/vb=2,4 2006.229.15:57:24.28#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.15:57:24.28#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.15:57:24.28#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:24.28#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:24.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:24.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:24.33#ibcon#enter wrdev, iclass 28, count 2 2006.229.15:57:24.33#ibcon#first serial, iclass 28, count 2 2006.229.15:57:24.33#ibcon#enter sib2, iclass 28, count 2 2006.229.15:57:24.33#ibcon#flushed, iclass 28, count 2 2006.229.15:57:24.33#ibcon#about to write, iclass 28, count 2 2006.229.15:57:24.34#ibcon#wrote, iclass 28, count 2 2006.229.15:57:24.34#ibcon#about to read 3, iclass 28, count 2 2006.229.15:57:24.35#ibcon#read 3, iclass 28, count 2 2006.229.15:57:24.35#ibcon#about to read 4, iclass 28, count 2 2006.229.15:57:24.35#ibcon#read 4, iclass 28, count 2 2006.229.15:57:24.35#ibcon#about to read 5, iclass 28, count 2 2006.229.15:57:24.35#ibcon#read 5, iclass 28, count 2 2006.229.15:57:24.35#ibcon#about to read 6, iclass 28, count 2 2006.229.15:57:24.35#ibcon#read 6, iclass 28, count 2 2006.229.15:57:24.35#ibcon#end of sib2, iclass 28, count 2 2006.229.15:57:24.35#ibcon#*mode == 0, iclass 28, count 2 2006.229.15:57:24.35#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.15:57:24.36#ibcon#[27=AT02-04\r\n] 2006.229.15:57:24.36#ibcon#*before write, iclass 28, count 2 2006.229.15:57:24.36#ibcon#enter sib2, iclass 28, count 2 2006.229.15:57:24.36#ibcon#flushed, iclass 28, count 2 2006.229.15:57:24.36#ibcon#about to write, iclass 28, count 2 2006.229.15:57:24.36#ibcon#wrote, iclass 28, count 2 2006.229.15:57:24.36#ibcon#about to read 3, iclass 28, count 2 2006.229.15:57:24.38#ibcon#read 3, iclass 28, count 2 2006.229.15:57:24.38#ibcon#about to read 4, iclass 28, count 2 2006.229.15:57:24.38#ibcon#read 4, iclass 28, count 2 2006.229.15:57:24.38#ibcon#about to read 5, iclass 28, count 2 2006.229.15:57:24.38#ibcon#read 5, iclass 28, count 2 2006.229.15:57:24.39#ibcon#about to read 6, iclass 28, count 2 2006.229.15:57:24.39#ibcon#read 6, iclass 28, count 2 2006.229.15:57:24.39#ibcon#end of sib2, iclass 28, count 2 2006.229.15:57:24.39#ibcon#*after write, iclass 28, count 2 2006.229.15:57:24.39#ibcon#*before return 0, iclass 28, count 2 2006.229.15:57:24.39#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:24.39#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.15:57:24.39#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.15:57:24.39#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:24.39#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:24.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:24.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:24.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.15:57:24.50#ibcon#first serial, iclass 28, count 0 2006.229.15:57:24.50#ibcon#enter sib2, iclass 28, count 0 2006.229.15:57:24.50#ibcon#flushed, iclass 28, count 0 2006.229.15:57:24.50#ibcon#about to write, iclass 28, count 0 2006.229.15:57:24.50#ibcon#wrote, iclass 28, count 0 2006.229.15:57:24.51#ibcon#about to read 3, iclass 28, count 0 2006.229.15:57:24.52#ibcon#read 3, iclass 28, count 0 2006.229.15:57:24.52#ibcon#about to read 4, iclass 28, count 0 2006.229.15:57:24.52#ibcon#read 4, iclass 28, count 0 2006.229.15:57:24.52#ibcon#about to read 5, iclass 28, count 0 2006.229.15:57:24.52#ibcon#read 5, iclass 28, count 0 2006.229.15:57:24.52#ibcon#about to read 6, iclass 28, count 0 2006.229.15:57:24.53#ibcon#read 6, iclass 28, count 0 2006.229.15:57:24.53#ibcon#end of sib2, iclass 28, count 0 2006.229.15:57:24.53#ibcon#*mode == 0, iclass 28, count 0 2006.229.15:57:24.53#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.15:57:24.53#ibcon#[27=USB\r\n] 2006.229.15:57:24.53#ibcon#*before write, iclass 28, count 0 2006.229.15:57:24.53#ibcon#enter sib2, iclass 28, count 0 2006.229.15:57:24.53#ibcon#flushed, iclass 28, count 0 2006.229.15:57:24.53#ibcon#about to write, iclass 28, count 0 2006.229.15:57:24.53#ibcon#wrote, iclass 28, count 0 2006.229.15:57:24.53#ibcon#about to read 3, iclass 28, count 0 2006.229.15:57:24.55#ibcon#read 3, iclass 28, count 0 2006.229.15:57:24.55#ibcon#about to read 4, iclass 28, count 0 2006.229.15:57:24.55#ibcon#read 4, iclass 28, count 0 2006.229.15:57:24.55#ibcon#about to read 5, iclass 28, count 0 2006.229.15:57:24.55#ibcon#read 5, iclass 28, count 0 2006.229.15:57:24.55#ibcon#about to read 6, iclass 28, count 0 2006.229.15:57:24.55#ibcon#read 6, iclass 28, count 0 2006.229.15:57:24.55#ibcon#end of sib2, iclass 28, count 0 2006.229.15:57:24.56#ibcon#*after write, iclass 28, count 0 2006.229.15:57:24.56#ibcon#*before return 0, iclass 28, count 0 2006.229.15:57:24.56#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:24.56#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.15:57:24.56#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.15:57:24.56#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.15:57:24.56$vck44/vblo=3,649.99 2006.229.15:57:24.56#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.15:57:24.56#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.15:57:24.56#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:24.56#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:24.56#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:24.56#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:24.56#ibcon#enter wrdev, iclass 30, count 0 2006.229.15:57:24.56#ibcon#first serial, iclass 30, count 0 2006.229.15:57:24.56#ibcon#enter sib2, iclass 30, count 0 2006.229.15:57:24.56#ibcon#flushed, iclass 30, count 0 2006.229.15:57:24.56#ibcon#about to write, iclass 30, count 0 2006.229.15:57:24.56#ibcon#wrote, iclass 30, count 0 2006.229.15:57:24.56#ibcon#about to read 3, iclass 30, count 0 2006.229.15:57:24.57#ibcon#read 3, iclass 30, count 0 2006.229.15:57:24.57#ibcon#about to read 4, iclass 30, count 0 2006.229.15:57:24.57#ibcon#read 4, iclass 30, count 0 2006.229.15:57:24.57#ibcon#about to read 5, iclass 30, count 0 2006.229.15:57:24.57#ibcon#read 5, iclass 30, count 0 2006.229.15:57:24.57#ibcon#about to read 6, iclass 30, count 0 2006.229.15:57:24.58#ibcon#read 6, iclass 30, count 0 2006.229.15:57:24.58#ibcon#end of sib2, iclass 30, count 0 2006.229.15:57:24.58#ibcon#*mode == 0, iclass 30, count 0 2006.229.15:57:24.58#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.15:57:24.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.15:57:24.58#ibcon#*before write, iclass 30, count 0 2006.229.15:57:24.58#ibcon#enter sib2, iclass 30, count 0 2006.229.15:57:24.58#ibcon#flushed, iclass 30, count 0 2006.229.15:57:24.58#ibcon#about to write, iclass 30, count 0 2006.229.15:57:24.58#ibcon#wrote, iclass 30, count 0 2006.229.15:57:24.58#ibcon#about to read 3, iclass 30, count 0 2006.229.15:57:24.61#ibcon#read 3, iclass 30, count 0 2006.229.15:57:24.61#ibcon#about to read 4, iclass 30, count 0 2006.229.15:57:24.61#ibcon#read 4, iclass 30, count 0 2006.229.15:57:24.61#ibcon#about to read 5, iclass 30, count 0 2006.229.15:57:24.61#ibcon#read 5, iclass 30, count 0 2006.229.15:57:24.61#ibcon#about to read 6, iclass 30, count 0 2006.229.15:57:24.61#ibcon#read 6, iclass 30, count 0 2006.229.15:57:24.61#ibcon#end of sib2, iclass 30, count 0 2006.229.15:57:24.62#ibcon#*after write, iclass 30, count 0 2006.229.15:57:24.62#ibcon#*before return 0, iclass 30, count 0 2006.229.15:57:24.62#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:24.62#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.15:57:24.62#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.15:57:24.62#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.15:57:24.62$vck44/vb=3,4 2006.229.15:57:24.62#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.15:57:24.62#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.15:57:24.62#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:24.62#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:24.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:24.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:24.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.15:57:24.67#ibcon#first serial, iclass 32, count 2 2006.229.15:57:24.67#ibcon#enter sib2, iclass 32, count 2 2006.229.15:57:24.67#ibcon#flushed, iclass 32, count 2 2006.229.15:57:24.67#ibcon#about to write, iclass 32, count 2 2006.229.15:57:24.68#ibcon#wrote, iclass 32, count 2 2006.229.15:57:24.68#ibcon#about to read 3, iclass 32, count 2 2006.229.15:57:24.69#ibcon#read 3, iclass 32, count 2 2006.229.15:57:24.69#ibcon#about to read 4, iclass 32, count 2 2006.229.15:57:24.69#ibcon#read 4, iclass 32, count 2 2006.229.15:57:24.69#ibcon#about to read 5, iclass 32, count 2 2006.229.15:57:24.69#ibcon#read 5, iclass 32, count 2 2006.229.15:57:24.69#ibcon#about to read 6, iclass 32, count 2 2006.229.15:57:24.69#ibcon#read 6, iclass 32, count 2 2006.229.15:57:24.69#ibcon#end of sib2, iclass 32, count 2 2006.229.15:57:24.70#ibcon#*mode == 0, iclass 32, count 2 2006.229.15:57:24.70#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.15:57:24.70#ibcon#[27=AT03-04\r\n] 2006.229.15:57:24.70#ibcon#*before write, iclass 32, count 2 2006.229.15:57:24.70#ibcon#enter sib2, iclass 32, count 2 2006.229.15:57:24.70#ibcon#flushed, iclass 32, count 2 2006.229.15:57:24.70#ibcon#about to write, iclass 32, count 2 2006.229.15:57:24.70#ibcon#wrote, iclass 32, count 2 2006.229.15:57:24.70#ibcon#about to read 3, iclass 32, count 2 2006.229.15:57:24.72#ibcon#read 3, iclass 32, count 2 2006.229.15:57:24.72#ibcon#about to read 4, iclass 32, count 2 2006.229.15:57:24.72#ibcon#read 4, iclass 32, count 2 2006.229.15:57:24.72#ibcon#about to read 5, iclass 32, count 2 2006.229.15:57:24.72#ibcon#read 5, iclass 32, count 2 2006.229.15:57:24.72#ibcon#about to read 6, iclass 32, count 2 2006.229.15:57:24.72#ibcon#read 6, iclass 32, count 2 2006.229.15:57:24.72#ibcon#end of sib2, iclass 32, count 2 2006.229.15:57:24.72#ibcon#*after write, iclass 32, count 2 2006.229.15:57:24.73#ibcon#*before return 0, iclass 32, count 2 2006.229.15:57:24.73#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:24.73#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.15:57:24.73#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.15:57:24.73#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:24.73#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:24.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:24.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:24.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.15:57:24.84#ibcon#first serial, iclass 32, count 0 2006.229.15:57:24.84#ibcon#enter sib2, iclass 32, count 0 2006.229.15:57:24.84#ibcon#flushed, iclass 32, count 0 2006.229.15:57:24.84#ibcon#about to write, iclass 32, count 0 2006.229.15:57:24.84#ibcon#wrote, iclass 32, count 0 2006.229.15:57:24.85#ibcon#about to read 3, iclass 32, count 0 2006.229.15:57:24.86#ibcon#read 3, iclass 32, count 0 2006.229.15:57:24.86#ibcon#about to read 4, iclass 32, count 0 2006.229.15:57:24.86#ibcon#read 4, iclass 32, count 0 2006.229.15:57:24.86#ibcon#about to read 5, iclass 32, count 0 2006.229.15:57:24.86#ibcon#read 5, iclass 32, count 0 2006.229.15:57:24.86#ibcon#about to read 6, iclass 32, count 0 2006.229.15:57:24.86#ibcon#read 6, iclass 32, count 0 2006.229.15:57:24.86#ibcon#end of sib2, iclass 32, count 0 2006.229.15:57:24.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.15:57:24.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.15:57:24.86#ibcon#[27=USB\r\n] 2006.229.15:57:24.87#ibcon#*before write, iclass 32, count 0 2006.229.15:57:24.87#ibcon#enter sib2, iclass 32, count 0 2006.229.15:57:24.87#ibcon#flushed, iclass 32, count 0 2006.229.15:57:24.87#ibcon#about to write, iclass 32, count 0 2006.229.15:57:24.87#ibcon#wrote, iclass 32, count 0 2006.229.15:57:24.87#ibcon#about to read 3, iclass 32, count 0 2006.229.15:57:24.89#ibcon#read 3, iclass 32, count 0 2006.229.15:57:24.89#ibcon#about to read 4, iclass 32, count 0 2006.229.15:57:24.89#ibcon#read 4, iclass 32, count 0 2006.229.15:57:24.89#ibcon#about to read 5, iclass 32, count 0 2006.229.15:57:24.89#ibcon#read 5, iclass 32, count 0 2006.229.15:57:24.89#ibcon#about to read 6, iclass 32, count 0 2006.229.15:57:24.89#ibcon#read 6, iclass 32, count 0 2006.229.15:57:24.89#ibcon#end of sib2, iclass 32, count 0 2006.229.15:57:24.90#ibcon#*after write, iclass 32, count 0 2006.229.15:57:24.90#ibcon#*before return 0, iclass 32, count 0 2006.229.15:57:24.90#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:24.90#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.15:57:24.90#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.15:57:24.90#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.15:57:24.90$vck44/vblo=4,679.99 2006.229.15:57:24.90#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.15:57:24.90#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.15:57:24.90#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:24.90#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:24.90#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:24.90#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:24.90#ibcon#enter wrdev, iclass 34, count 0 2006.229.15:57:24.90#ibcon#first serial, iclass 34, count 0 2006.229.15:57:24.90#ibcon#enter sib2, iclass 34, count 0 2006.229.15:57:24.90#ibcon#flushed, iclass 34, count 0 2006.229.15:57:24.90#ibcon#about to write, iclass 34, count 0 2006.229.15:57:24.90#ibcon#wrote, iclass 34, count 0 2006.229.15:57:24.90#ibcon#about to read 3, iclass 34, count 0 2006.229.15:57:24.91#ibcon#read 3, iclass 34, count 0 2006.229.15:57:24.91#ibcon#about to read 4, iclass 34, count 0 2006.229.15:57:24.91#ibcon#read 4, iclass 34, count 0 2006.229.15:57:24.91#ibcon#about to read 5, iclass 34, count 0 2006.229.15:57:24.91#ibcon#read 5, iclass 34, count 0 2006.229.15:57:24.91#ibcon#about to read 6, iclass 34, count 0 2006.229.15:57:24.91#ibcon#read 6, iclass 34, count 0 2006.229.15:57:24.91#ibcon#end of sib2, iclass 34, count 0 2006.229.15:57:24.92#ibcon#*mode == 0, iclass 34, count 0 2006.229.15:57:24.92#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.15:57:24.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.15:57:24.92#ibcon#*before write, iclass 34, count 0 2006.229.15:57:24.92#ibcon#enter sib2, iclass 34, count 0 2006.229.15:57:24.92#ibcon#flushed, iclass 34, count 0 2006.229.15:57:24.92#ibcon#about to write, iclass 34, count 0 2006.229.15:57:24.92#ibcon#wrote, iclass 34, count 0 2006.229.15:57:24.92#ibcon#about to read 3, iclass 34, count 0 2006.229.15:57:24.95#ibcon#read 3, iclass 34, count 0 2006.229.15:57:24.95#ibcon#about to read 4, iclass 34, count 0 2006.229.15:57:24.95#ibcon#read 4, iclass 34, count 0 2006.229.15:57:24.95#ibcon#about to read 5, iclass 34, count 0 2006.229.15:57:24.95#ibcon#read 5, iclass 34, count 0 2006.229.15:57:24.95#ibcon#about to read 6, iclass 34, count 0 2006.229.15:57:24.95#ibcon#read 6, iclass 34, count 0 2006.229.15:57:24.95#ibcon#end of sib2, iclass 34, count 0 2006.229.15:57:24.95#ibcon#*after write, iclass 34, count 0 2006.229.15:57:24.95#ibcon#*before return 0, iclass 34, count 0 2006.229.15:57:24.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:24.96#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.15:57:24.96#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.15:57:24.96#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.15:57:24.96$vck44/vb=4,4 2006.229.15:57:24.96#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.15:57:24.96#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.15:57:24.96#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:24.96#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:25.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:25.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:25.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.15:57:25.01#ibcon#first serial, iclass 36, count 2 2006.229.15:57:25.01#ibcon#enter sib2, iclass 36, count 2 2006.229.15:57:25.01#ibcon#flushed, iclass 36, count 2 2006.229.15:57:25.01#ibcon#about to write, iclass 36, count 2 2006.229.15:57:25.01#ibcon#wrote, iclass 36, count 2 2006.229.15:57:25.01#ibcon#about to read 3, iclass 36, count 2 2006.229.15:57:25.03#ibcon#read 3, iclass 36, count 2 2006.229.15:57:25.03#ibcon#about to read 4, iclass 36, count 2 2006.229.15:57:25.03#ibcon#read 4, iclass 36, count 2 2006.229.15:57:25.03#ibcon#about to read 5, iclass 36, count 2 2006.229.15:57:25.03#ibcon#read 5, iclass 36, count 2 2006.229.15:57:25.03#ibcon#about to read 6, iclass 36, count 2 2006.229.15:57:25.03#ibcon#read 6, iclass 36, count 2 2006.229.15:57:25.03#ibcon#end of sib2, iclass 36, count 2 2006.229.15:57:25.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.15:57:25.04#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.15:57:25.04#ibcon#[27=AT04-04\r\n] 2006.229.15:57:25.04#ibcon#*before write, iclass 36, count 2 2006.229.15:57:25.04#ibcon#enter sib2, iclass 36, count 2 2006.229.15:57:25.04#ibcon#flushed, iclass 36, count 2 2006.229.15:57:25.04#ibcon#about to write, iclass 36, count 2 2006.229.15:57:25.04#ibcon#wrote, iclass 36, count 2 2006.229.15:57:25.04#ibcon#about to read 3, iclass 36, count 2 2006.229.15:57:25.06#ibcon#read 3, iclass 36, count 2 2006.229.15:57:25.06#ibcon#about to read 4, iclass 36, count 2 2006.229.15:57:25.06#ibcon#read 4, iclass 36, count 2 2006.229.15:57:25.06#ibcon#about to read 5, iclass 36, count 2 2006.229.15:57:25.06#ibcon#read 5, iclass 36, count 2 2006.229.15:57:25.06#ibcon#about to read 6, iclass 36, count 2 2006.229.15:57:25.06#ibcon#read 6, iclass 36, count 2 2006.229.15:57:25.06#ibcon#end of sib2, iclass 36, count 2 2006.229.15:57:25.06#ibcon#*after write, iclass 36, count 2 2006.229.15:57:25.06#ibcon#*before return 0, iclass 36, count 2 2006.229.15:57:25.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:25.07#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.15:57:25.07#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.15:57:25.07#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:25.07#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:25.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:25.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:25.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.15:57:25.18#ibcon#first serial, iclass 36, count 0 2006.229.15:57:25.18#ibcon#enter sib2, iclass 36, count 0 2006.229.15:57:25.18#ibcon#flushed, iclass 36, count 0 2006.229.15:57:25.18#ibcon#about to write, iclass 36, count 0 2006.229.15:57:25.18#ibcon#wrote, iclass 36, count 0 2006.229.15:57:25.18#ibcon#about to read 3, iclass 36, count 0 2006.229.15:57:25.20#ibcon#read 3, iclass 36, count 0 2006.229.15:57:25.20#ibcon#about to read 4, iclass 36, count 0 2006.229.15:57:25.20#ibcon#read 4, iclass 36, count 0 2006.229.15:57:25.20#ibcon#about to read 5, iclass 36, count 0 2006.229.15:57:25.20#ibcon#read 5, iclass 36, count 0 2006.229.15:57:25.20#ibcon#about to read 6, iclass 36, count 0 2006.229.15:57:25.20#ibcon#read 6, iclass 36, count 0 2006.229.15:57:25.20#ibcon#end of sib2, iclass 36, count 0 2006.229.15:57:25.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.15:57:25.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.15:57:25.20#ibcon#[27=USB\r\n] 2006.229.15:57:25.20#ibcon#*before write, iclass 36, count 0 2006.229.15:57:25.21#ibcon#enter sib2, iclass 36, count 0 2006.229.15:57:25.21#ibcon#flushed, iclass 36, count 0 2006.229.15:57:25.21#ibcon#about to write, iclass 36, count 0 2006.229.15:57:25.21#ibcon#wrote, iclass 36, count 0 2006.229.15:57:25.21#ibcon#about to read 3, iclass 36, count 0 2006.229.15:57:25.23#ibcon#read 3, iclass 36, count 0 2006.229.15:57:25.23#ibcon#about to read 4, iclass 36, count 0 2006.229.15:57:25.23#ibcon#read 4, iclass 36, count 0 2006.229.15:57:25.23#ibcon#about to read 5, iclass 36, count 0 2006.229.15:57:25.23#ibcon#read 5, iclass 36, count 0 2006.229.15:57:25.23#ibcon#about to read 6, iclass 36, count 0 2006.229.15:57:25.23#ibcon#read 6, iclass 36, count 0 2006.229.15:57:25.23#ibcon#end of sib2, iclass 36, count 0 2006.229.15:57:25.23#ibcon#*after write, iclass 36, count 0 2006.229.15:57:25.24#ibcon#*before return 0, iclass 36, count 0 2006.229.15:57:25.24#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:25.24#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.15:57:25.24#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.15:57:25.24#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.15:57:25.24$vck44/vblo=5,709.99 2006.229.15:57:25.24#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.15:57:25.24#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.15:57:25.24#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:25.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:25.24#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:25.24#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:25.24#ibcon#enter wrdev, iclass 38, count 0 2006.229.15:57:25.24#ibcon#first serial, iclass 38, count 0 2006.229.15:57:25.24#ibcon#enter sib2, iclass 38, count 0 2006.229.15:57:25.24#ibcon#flushed, iclass 38, count 0 2006.229.15:57:25.24#ibcon#about to write, iclass 38, count 0 2006.229.15:57:25.24#ibcon#wrote, iclass 38, count 0 2006.229.15:57:25.24#ibcon#about to read 3, iclass 38, count 0 2006.229.15:57:25.25#ibcon#read 3, iclass 38, count 0 2006.229.15:57:25.25#ibcon#about to read 4, iclass 38, count 0 2006.229.15:57:25.25#ibcon#read 4, iclass 38, count 0 2006.229.15:57:25.25#ibcon#about to read 5, iclass 38, count 0 2006.229.15:57:25.25#ibcon#read 5, iclass 38, count 0 2006.229.15:57:25.25#ibcon#about to read 6, iclass 38, count 0 2006.229.15:57:25.25#ibcon#read 6, iclass 38, count 0 2006.229.15:57:25.25#ibcon#end of sib2, iclass 38, count 0 2006.229.15:57:25.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.15:57:25.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.15:57:25.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.15:57:25.25#ibcon#*before write, iclass 38, count 0 2006.229.15:57:25.25#ibcon#enter sib2, iclass 38, count 0 2006.229.15:57:25.26#ibcon#flushed, iclass 38, count 0 2006.229.15:57:25.26#ibcon#about to write, iclass 38, count 0 2006.229.15:57:25.26#ibcon#wrote, iclass 38, count 0 2006.229.15:57:25.26#ibcon#about to read 3, iclass 38, count 0 2006.229.15:57:25.29#ibcon#read 3, iclass 38, count 0 2006.229.15:57:25.29#ibcon#about to read 4, iclass 38, count 0 2006.229.15:57:25.29#ibcon#read 4, iclass 38, count 0 2006.229.15:57:25.29#ibcon#about to read 5, iclass 38, count 0 2006.229.15:57:25.29#ibcon#read 5, iclass 38, count 0 2006.229.15:57:25.29#ibcon#about to read 6, iclass 38, count 0 2006.229.15:57:25.29#ibcon#read 6, iclass 38, count 0 2006.229.15:57:25.29#ibcon#end of sib2, iclass 38, count 0 2006.229.15:57:25.29#ibcon#*after write, iclass 38, count 0 2006.229.15:57:25.29#ibcon#*before return 0, iclass 38, count 0 2006.229.15:57:25.30#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:25.30#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.15:57:25.30#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.15:57:25.30#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.15:57:25.30$vck44/vb=5,4 2006.229.15:57:25.30#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.15:57:25.30#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.15:57:25.30#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:25.30#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:25.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:25.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:25.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.15:57:25.35#ibcon#first serial, iclass 40, count 2 2006.229.15:57:25.35#ibcon#enter sib2, iclass 40, count 2 2006.229.15:57:25.35#ibcon#flushed, iclass 40, count 2 2006.229.15:57:25.35#ibcon#about to write, iclass 40, count 2 2006.229.15:57:25.35#ibcon#wrote, iclass 40, count 2 2006.229.15:57:25.35#ibcon#about to read 3, iclass 40, count 2 2006.229.15:57:25.37#ibcon#read 3, iclass 40, count 2 2006.229.15:57:25.37#ibcon#about to read 4, iclass 40, count 2 2006.229.15:57:25.37#ibcon#read 4, iclass 40, count 2 2006.229.15:57:25.37#ibcon#about to read 5, iclass 40, count 2 2006.229.15:57:25.37#ibcon#read 5, iclass 40, count 2 2006.229.15:57:25.37#ibcon#about to read 6, iclass 40, count 2 2006.229.15:57:25.37#ibcon#read 6, iclass 40, count 2 2006.229.15:57:25.37#ibcon#end of sib2, iclass 40, count 2 2006.229.15:57:25.38#ibcon#*mode == 0, iclass 40, count 2 2006.229.15:57:25.38#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.15:57:25.38#ibcon#[27=AT05-04\r\n] 2006.229.15:57:25.38#ibcon#*before write, iclass 40, count 2 2006.229.15:57:25.38#ibcon#enter sib2, iclass 40, count 2 2006.229.15:57:25.38#ibcon#flushed, iclass 40, count 2 2006.229.15:57:25.38#ibcon#about to write, iclass 40, count 2 2006.229.15:57:25.38#ibcon#wrote, iclass 40, count 2 2006.229.15:57:25.38#ibcon#about to read 3, iclass 40, count 2 2006.229.15:57:25.40#ibcon#read 3, iclass 40, count 2 2006.229.15:57:25.40#ibcon#about to read 4, iclass 40, count 2 2006.229.15:57:25.40#ibcon#read 4, iclass 40, count 2 2006.229.15:57:25.40#ibcon#about to read 5, iclass 40, count 2 2006.229.15:57:25.40#ibcon#read 5, iclass 40, count 2 2006.229.15:57:25.40#ibcon#about to read 6, iclass 40, count 2 2006.229.15:57:25.40#ibcon#read 6, iclass 40, count 2 2006.229.15:57:25.41#ibcon#end of sib2, iclass 40, count 2 2006.229.15:57:25.41#ibcon#*after write, iclass 40, count 2 2006.229.15:57:25.41#ibcon#*before return 0, iclass 40, count 2 2006.229.15:57:25.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:25.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.15:57:25.41#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.15:57:25.41#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:25.41#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:25.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:25.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:25.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.15:57:25.52#ibcon#first serial, iclass 40, count 0 2006.229.15:57:25.52#ibcon#enter sib2, iclass 40, count 0 2006.229.15:57:25.52#ibcon#flushed, iclass 40, count 0 2006.229.15:57:25.52#ibcon#about to write, iclass 40, count 0 2006.229.15:57:25.53#ibcon#wrote, iclass 40, count 0 2006.229.15:57:25.53#ibcon#about to read 3, iclass 40, count 0 2006.229.15:57:25.54#ibcon#read 3, iclass 40, count 0 2006.229.15:57:25.54#ibcon#about to read 4, iclass 40, count 0 2006.229.15:57:25.54#ibcon#read 4, iclass 40, count 0 2006.229.15:57:25.54#ibcon#about to read 5, iclass 40, count 0 2006.229.15:57:25.54#ibcon#read 5, iclass 40, count 0 2006.229.15:57:25.54#ibcon#about to read 6, iclass 40, count 0 2006.229.15:57:25.55#ibcon#read 6, iclass 40, count 0 2006.229.15:57:25.55#ibcon#end of sib2, iclass 40, count 0 2006.229.15:57:25.55#ibcon#*mode == 0, iclass 40, count 0 2006.229.15:57:25.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.15:57:25.55#ibcon#[27=USB\r\n] 2006.229.15:57:25.55#ibcon#*before write, iclass 40, count 0 2006.229.15:57:25.55#ibcon#enter sib2, iclass 40, count 0 2006.229.15:57:25.55#ibcon#flushed, iclass 40, count 0 2006.229.15:57:25.55#ibcon#about to write, iclass 40, count 0 2006.229.15:57:25.55#ibcon#wrote, iclass 40, count 0 2006.229.15:57:25.55#ibcon#about to read 3, iclass 40, count 0 2006.229.15:57:25.57#ibcon#read 3, iclass 40, count 0 2006.229.15:57:25.57#ibcon#about to read 4, iclass 40, count 0 2006.229.15:57:25.57#ibcon#read 4, iclass 40, count 0 2006.229.15:57:25.57#ibcon#about to read 5, iclass 40, count 0 2006.229.15:57:25.57#ibcon#read 5, iclass 40, count 0 2006.229.15:57:25.57#ibcon#about to read 6, iclass 40, count 0 2006.229.15:57:25.58#ibcon#read 6, iclass 40, count 0 2006.229.15:57:25.58#ibcon#end of sib2, iclass 40, count 0 2006.229.15:57:25.58#ibcon#*after write, iclass 40, count 0 2006.229.15:57:25.58#ibcon#*before return 0, iclass 40, count 0 2006.229.15:57:25.58#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:25.58#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.15:57:25.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.15:57:25.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.15:57:25.58$vck44/vblo=6,719.99 2006.229.15:57:25.58#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.15:57:25.58#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.15:57:25.58#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:25.58#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:25.58#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:25.58#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:25.58#ibcon#enter wrdev, iclass 4, count 0 2006.229.15:57:25.58#ibcon#first serial, iclass 4, count 0 2006.229.15:57:25.58#ibcon#enter sib2, iclass 4, count 0 2006.229.15:57:25.58#ibcon#flushed, iclass 4, count 0 2006.229.15:57:25.58#ibcon#about to write, iclass 4, count 0 2006.229.15:57:25.58#ibcon#wrote, iclass 4, count 0 2006.229.15:57:25.58#ibcon#about to read 3, iclass 4, count 0 2006.229.15:57:25.59#ibcon#read 3, iclass 4, count 0 2006.229.15:57:25.59#ibcon#about to read 4, iclass 4, count 0 2006.229.15:57:25.59#ibcon#read 4, iclass 4, count 0 2006.229.15:57:25.59#ibcon#about to read 5, iclass 4, count 0 2006.229.15:57:25.60#ibcon#read 5, iclass 4, count 0 2006.229.15:57:25.60#ibcon#about to read 6, iclass 4, count 0 2006.229.15:57:25.60#ibcon#read 6, iclass 4, count 0 2006.229.15:57:25.60#ibcon#end of sib2, iclass 4, count 0 2006.229.15:57:25.60#ibcon#*mode == 0, iclass 4, count 0 2006.229.15:57:25.60#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.15:57:25.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.15:57:25.60#ibcon#*before write, iclass 4, count 0 2006.229.15:57:25.60#ibcon#enter sib2, iclass 4, count 0 2006.229.15:57:25.60#ibcon#flushed, iclass 4, count 0 2006.229.15:57:25.60#ibcon#about to write, iclass 4, count 0 2006.229.15:57:25.60#ibcon#wrote, iclass 4, count 0 2006.229.15:57:25.60#ibcon#about to read 3, iclass 4, count 0 2006.229.15:57:25.63#ibcon#read 3, iclass 4, count 0 2006.229.15:57:25.63#ibcon#about to read 4, iclass 4, count 0 2006.229.15:57:25.63#ibcon#read 4, iclass 4, count 0 2006.229.15:57:25.63#ibcon#about to read 5, iclass 4, count 0 2006.229.15:57:25.63#ibcon#read 5, iclass 4, count 0 2006.229.15:57:25.63#ibcon#about to read 6, iclass 4, count 0 2006.229.15:57:25.63#ibcon#read 6, iclass 4, count 0 2006.229.15:57:25.63#ibcon#end of sib2, iclass 4, count 0 2006.229.15:57:25.64#ibcon#*after write, iclass 4, count 0 2006.229.15:57:25.64#ibcon#*before return 0, iclass 4, count 0 2006.229.15:57:25.64#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:25.64#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.15:57:25.64#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.15:57:25.64#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.15:57:25.64$vck44/vb=6,4 2006.229.15:57:25.64#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.15:57:25.64#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.15:57:25.64#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:25.64#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:25.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:25.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:25.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.15:57:25.69#ibcon#first serial, iclass 6, count 2 2006.229.15:57:25.69#ibcon#enter sib2, iclass 6, count 2 2006.229.15:57:25.69#ibcon#flushed, iclass 6, count 2 2006.229.15:57:25.69#ibcon#about to write, iclass 6, count 2 2006.229.15:57:25.69#ibcon#wrote, iclass 6, count 2 2006.229.15:57:25.69#ibcon#about to read 3, iclass 6, count 2 2006.229.15:57:25.71#ibcon#read 3, iclass 6, count 2 2006.229.15:57:25.71#ibcon#about to read 4, iclass 6, count 2 2006.229.15:57:25.71#ibcon#read 4, iclass 6, count 2 2006.229.15:57:25.71#ibcon#about to read 5, iclass 6, count 2 2006.229.15:57:25.71#ibcon#read 5, iclass 6, count 2 2006.229.15:57:25.71#ibcon#about to read 6, iclass 6, count 2 2006.229.15:57:25.71#ibcon#read 6, iclass 6, count 2 2006.229.15:57:25.72#ibcon#end of sib2, iclass 6, count 2 2006.229.15:57:25.72#ibcon#*mode == 0, iclass 6, count 2 2006.229.15:57:25.72#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.15:57:25.72#ibcon#[27=AT06-04\r\n] 2006.229.15:57:25.72#ibcon#*before write, iclass 6, count 2 2006.229.15:57:25.72#ibcon#enter sib2, iclass 6, count 2 2006.229.15:57:25.72#ibcon#flushed, iclass 6, count 2 2006.229.15:57:25.72#ibcon#about to write, iclass 6, count 2 2006.229.15:57:25.72#ibcon#wrote, iclass 6, count 2 2006.229.15:57:25.72#ibcon#about to read 3, iclass 6, count 2 2006.229.15:57:25.74#ibcon#read 3, iclass 6, count 2 2006.229.15:57:25.74#ibcon#about to read 4, iclass 6, count 2 2006.229.15:57:25.74#ibcon#read 4, iclass 6, count 2 2006.229.15:57:25.74#ibcon#about to read 5, iclass 6, count 2 2006.229.15:57:25.74#ibcon#read 5, iclass 6, count 2 2006.229.15:57:25.74#ibcon#about to read 6, iclass 6, count 2 2006.229.15:57:25.74#ibcon#read 6, iclass 6, count 2 2006.229.15:57:25.74#ibcon#end of sib2, iclass 6, count 2 2006.229.15:57:25.74#ibcon#*after write, iclass 6, count 2 2006.229.15:57:25.74#ibcon#*before return 0, iclass 6, count 2 2006.229.15:57:25.75#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:25.75#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.15:57:25.75#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.15:57:25.75#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:25.75#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:25.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:25.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:25.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.15:57:25.86#ibcon#first serial, iclass 6, count 0 2006.229.15:57:25.86#ibcon#enter sib2, iclass 6, count 0 2006.229.15:57:25.86#ibcon#flushed, iclass 6, count 0 2006.229.15:57:25.86#ibcon#about to write, iclass 6, count 0 2006.229.15:57:25.86#ibcon#wrote, iclass 6, count 0 2006.229.15:57:25.86#ibcon#about to read 3, iclass 6, count 0 2006.229.15:57:25.88#ibcon#read 3, iclass 6, count 0 2006.229.15:57:25.88#ibcon#about to read 4, iclass 6, count 0 2006.229.15:57:25.88#ibcon#read 4, iclass 6, count 0 2006.229.15:57:25.88#ibcon#about to read 5, iclass 6, count 0 2006.229.15:57:25.88#ibcon#read 5, iclass 6, count 0 2006.229.15:57:25.88#ibcon#about to read 6, iclass 6, count 0 2006.229.15:57:25.88#ibcon#read 6, iclass 6, count 0 2006.229.15:57:25.88#ibcon#end of sib2, iclass 6, count 0 2006.229.15:57:25.89#ibcon#*mode == 0, iclass 6, count 0 2006.229.15:57:25.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.15:57:25.89#ibcon#[27=USB\r\n] 2006.229.15:57:25.89#ibcon#*before write, iclass 6, count 0 2006.229.15:57:25.89#ibcon#enter sib2, iclass 6, count 0 2006.229.15:57:25.89#ibcon#flushed, iclass 6, count 0 2006.229.15:57:25.89#ibcon#about to write, iclass 6, count 0 2006.229.15:57:25.89#ibcon#wrote, iclass 6, count 0 2006.229.15:57:25.89#ibcon#about to read 3, iclass 6, count 0 2006.229.15:57:25.91#ibcon#read 3, iclass 6, count 0 2006.229.15:57:25.91#ibcon#about to read 4, iclass 6, count 0 2006.229.15:57:25.91#ibcon#read 4, iclass 6, count 0 2006.229.15:57:25.91#ibcon#about to read 5, iclass 6, count 0 2006.229.15:57:25.91#ibcon#read 5, iclass 6, count 0 2006.229.15:57:25.91#ibcon#about to read 6, iclass 6, count 0 2006.229.15:57:25.91#ibcon#read 6, iclass 6, count 0 2006.229.15:57:25.91#ibcon#end of sib2, iclass 6, count 0 2006.229.15:57:25.91#ibcon#*after write, iclass 6, count 0 2006.229.15:57:25.91#ibcon#*before return 0, iclass 6, count 0 2006.229.15:57:25.92#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:25.92#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.15:57:25.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.15:57:25.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.15:57:25.92$vck44/vblo=7,734.99 2006.229.15:57:25.92#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.15:57:25.92#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.15:57:25.92#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:25.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:25.92#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:25.92#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:25.92#ibcon#enter wrdev, iclass 10, count 0 2006.229.15:57:25.92#ibcon#first serial, iclass 10, count 0 2006.229.15:57:25.92#ibcon#enter sib2, iclass 10, count 0 2006.229.15:57:25.92#ibcon#flushed, iclass 10, count 0 2006.229.15:57:25.92#ibcon#about to write, iclass 10, count 0 2006.229.15:57:25.92#ibcon#wrote, iclass 10, count 0 2006.229.15:57:25.92#ibcon#about to read 3, iclass 10, count 0 2006.229.15:57:25.93#ibcon#read 3, iclass 10, count 0 2006.229.15:57:25.93#ibcon#about to read 4, iclass 10, count 0 2006.229.15:57:25.93#ibcon#read 4, iclass 10, count 0 2006.229.15:57:25.93#ibcon#about to read 5, iclass 10, count 0 2006.229.15:57:25.93#ibcon#read 5, iclass 10, count 0 2006.229.15:57:25.93#ibcon#about to read 6, iclass 10, count 0 2006.229.15:57:25.93#ibcon#read 6, iclass 10, count 0 2006.229.15:57:25.93#ibcon#end of sib2, iclass 10, count 0 2006.229.15:57:25.94#ibcon#*mode == 0, iclass 10, count 0 2006.229.15:57:25.94#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.15:57:25.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.15:57:25.94#ibcon#*before write, iclass 10, count 0 2006.229.15:57:25.94#ibcon#enter sib2, iclass 10, count 0 2006.229.15:57:25.94#ibcon#flushed, iclass 10, count 0 2006.229.15:57:25.94#ibcon#about to write, iclass 10, count 0 2006.229.15:57:25.94#ibcon#wrote, iclass 10, count 0 2006.229.15:57:25.94#ibcon#about to read 3, iclass 10, count 0 2006.229.15:57:25.97#ibcon#read 3, iclass 10, count 0 2006.229.15:57:25.97#ibcon#about to read 4, iclass 10, count 0 2006.229.15:57:25.97#ibcon#read 4, iclass 10, count 0 2006.229.15:57:25.97#ibcon#about to read 5, iclass 10, count 0 2006.229.15:57:25.97#ibcon#read 5, iclass 10, count 0 2006.229.15:57:25.97#ibcon#about to read 6, iclass 10, count 0 2006.229.15:57:25.97#ibcon#read 6, iclass 10, count 0 2006.229.15:57:25.97#ibcon#end of sib2, iclass 10, count 0 2006.229.15:57:25.97#ibcon#*after write, iclass 10, count 0 2006.229.15:57:25.97#ibcon#*before return 0, iclass 10, count 0 2006.229.15:57:25.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:25.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.15:57:25.98#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.15:57:25.98#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.15:57:25.98$vck44/vb=7,4 2006.229.15:57:25.98#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.15:57:25.98#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.15:57:25.98#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:25.98#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:26.04#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:26.04#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:26.04#ibcon#enter wrdev, iclass 12, count 2 2006.229.15:57:26.04#ibcon#first serial, iclass 12, count 2 2006.229.15:57:26.04#ibcon#enter sib2, iclass 12, count 2 2006.229.15:57:26.04#ibcon#flushed, iclass 12, count 2 2006.229.15:57:26.04#ibcon#about to write, iclass 12, count 2 2006.229.15:57:26.04#ibcon#wrote, iclass 12, count 2 2006.229.15:57:26.04#ibcon#about to read 3, iclass 12, count 2 2006.229.15:57:26.05#ibcon#read 3, iclass 12, count 2 2006.229.15:57:26.05#ibcon#about to read 4, iclass 12, count 2 2006.229.15:57:26.05#ibcon#read 4, iclass 12, count 2 2006.229.15:57:26.05#ibcon#about to read 5, iclass 12, count 2 2006.229.15:57:26.05#ibcon#read 5, iclass 12, count 2 2006.229.15:57:26.05#ibcon#about to read 6, iclass 12, count 2 2006.229.15:57:26.05#ibcon#read 6, iclass 12, count 2 2006.229.15:57:26.05#ibcon#end of sib2, iclass 12, count 2 2006.229.15:57:26.05#ibcon#*mode == 0, iclass 12, count 2 2006.229.15:57:26.05#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.15:57:26.06#ibcon#[27=AT07-04\r\n] 2006.229.15:57:26.06#ibcon#*before write, iclass 12, count 2 2006.229.15:57:26.06#ibcon#enter sib2, iclass 12, count 2 2006.229.15:57:26.06#ibcon#flushed, iclass 12, count 2 2006.229.15:57:26.06#ibcon#about to write, iclass 12, count 2 2006.229.15:57:26.06#ibcon#wrote, iclass 12, count 2 2006.229.15:57:26.06#ibcon#about to read 3, iclass 12, count 2 2006.229.15:57:26.08#ibcon#read 3, iclass 12, count 2 2006.229.15:57:26.08#ibcon#about to read 4, iclass 12, count 2 2006.229.15:57:26.08#ibcon#read 4, iclass 12, count 2 2006.229.15:57:26.08#ibcon#about to read 5, iclass 12, count 2 2006.229.15:57:26.08#ibcon#read 5, iclass 12, count 2 2006.229.15:57:26.08#ibcon#about to read 6, iclass 12, count 2 2006.229.15:57:26.08#ibcon#read 6, iclass 12, count 2 2006.229.15:57:26.08#ibcon#end of sib2, iclass 12, count 2 2006.229.15:57:26.08#ibcon#*after write, iclass 12, count 2 2006.229.15:57:26.08#ibcon#*before return 0, iclass 12, count 2 2006.229.15:57:26.09#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:26.09#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.15:57:26.09#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.15:57:26.09#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:26.09#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:26.20#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:26.20#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:26.20#ibcon#enter wrdev, iclass 12, count 0 2006.229.15:57:26.20#ibcon#first serial, iclass 12, count 0 2006.229.15:57:26.20#ibcon#enter sib2, iclass 12, count 0 2006.229.15:57:26.20#ibcon#flushed, iclass 12, count 0 2006.229.15:57:26.20#ibcon#about to write, iclass 12, count 0 2006.229.15:57:26.20#ibcon#wrote, iclass 12, count 0 2006.229.15:57:26.21#ibcon#about to read 3, iclass 12, count 0 2006.229.15:57:26.22#ibcon#read 3, iclass 12, count 0 2006.229.15:57:26.22#ibcon#about to read 4, iclass 12, count 0 2006.229.15:57:26.22#ibcon#read 4, iclass 12, count 0 2006.229.15:57:26.22#ibcon#about to read 5, iclass 12, count 0 2006.229.15:57:26.22#ibcon#read 5, iclass 12, count 0 2006.229.15:57:26.22#ibcon#about to read 6, iclass 12, count 0 2006.229.15:57:26.22#ibcon#read 6, iclass 12, count 0 2006.229.15:57:26.22#ibcon#end of sib2, iclass 12, count 0 2006.229.15:57:26.22#ibcon#*mode == 0, iclass 12, count 0 2006.229.15:57:26.23#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.15:57:26.23#ibcon#[27=USB\r\n] 2006.229.15:57:26.23#ibcon#*before write, iclass 12, count 0 2006.229.15:57:26.23#ibcon#enter sib2, iclass 12, count 0 2006.229.15:57:26.23#ibcon#flushed, iclass 12, count 0 2006.229.15:57:26.23#ibcon#about to write, iclass 12, count 0 2006.229.15:57:26.23#ibcon#wrote, iclass 12, count 0 2006.229.15:57:26.23#ibcon#about to read 3, iclass 12, count 0 2006.229.15:57:26.25#ibcon#read 3, iclass 12, count 0 2006.229.15:57:26.25#ibcon#about to read 4, iclass 12, count 0 2006.229.15:57:26.25#ibcon#read 4, iclass 12, count 0 2006.229.15:57:26.25#ibcon#about to read 5, iclass 12, count 0 2006.229.15:57:26.25#ibcon#read 5, iclass 12, count 0 2006.229.15:57:26.25#ibcon#about to read 6, iclass 12, count 0 2006.229.15:57:26.25#ibcon#read 6, iclass 12, count 0 2006.229.15:57:26.25#ibcon#end of sib2, iclass 12, count 0 2006.229.15:57:26.25#ibcon#*after write, iclass 12, count 0 2006.229.15:57:26.25#ibcon#*before return 0, iclass 12, count 0 2006.229.15:57:26.25#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:26.26#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.15:57:26.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.15:57:26.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.15:57:26.26$vck44/vblo=8,744.99 2006.229.15:57:26.26#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.15:57:26.26#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.15:57:26.26#ibcon#ireg 17 cls_cnt 0 2006.229.15:57:26.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:26.26#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:26.26#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:26.26#ibcon#enter wrdev, iclass 14, count 0 2006.229.15:57:26.26#ibcon#first serial, iclass 14, count 0 2006.229.15:57:26.26#ibcon#enter sib2, iclass 14, count 0 2006.229.15:57:26.26#ibcon#flushed, iclass 14, count 0 2006.229.15:57:26.26#ibcon#about to write, iclass 14, count 0 2006.229.15:57:26.26#ibcon#wrote, iclass 14, count 0 2006.229.15:57:26.26#ibcon#about to read 3, iclass 14, count 0 2006.229.15:57:26.27#ibcon#read 3, iclass 14, count 0 2006.229.15:57:26.27#ibcon#about to read 4, iclass 14, count 0 2006.229.15:57:26.27#ibcon#read 4, iclass 14, count 0 2006.229.15:57:26.27#ibcon#about to read 5, iclass 14, count 0 2006.229.15:57:26.27#ibcon#read 5, iclass 14, count 0 2006.229.15:57:26.27#ibcon#about to read 6, iclass 14, count 0 2006.229.15:57:26.27#ibcon#read 6, iclass 14, count 0 2006.229.15:57:26.27#ibcon#end of sib2, iclass 14, count 0 2006.229.15:57:26.28#ibcon#*mode == 0, iclass 14, count 0 2006.229.15:57:26.28#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.15:57:26.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.15:57:26.28#ibcon#*before write, iclass 14, count 0 2006.229.15:57:26.28#ibcon#enter sib2, iclass 14, count 0 2006.229.15:57:26.28#ibcon#flushed, iclass 14, count 0 2006.229.15:57:26.28#ibcon#about to write, iclass 14, count 0 2006.229.15:57:26.28#ibcon#wrote, iclass 14, count 0 2006.229.15:57:26.28#ibcon#about to read 3, iclass 14, count 0 2006.229.15:57:26.31#ibcon#read 3, iclass 14, count 0 2006.229.15:57:26.31#ibcon#about to read 4, iclass 14, count 0 2006.229.15:57:26.31#ibcon#read 4, iclass 14, count 0 2006.229.15:57:26.31#ibcon#about to read 5, iclass 14, count 0 2006.229.15:57:26.31#ibcon#read 5, iclass 14, count 0 2006.229.15:57:26.31#ibcon#about to read 6, iclass 14, count 0 2006.229.15:57:26.31#ibcon#read 6, iclass 14, count 0 2006.229.15:57:26.31#ibcon#end of sib2, iclass 14, count 0 2006.229.15:57:26.31#ibcon#*after write, iclass 14, count 0 2006.229.15:57:26.31#ibcon#*before return 0, iclass 14, count 0 2006.229.15:57:26.31#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:26.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.15:57:26.32#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.15:57:26.32#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.15:57:26.32$vck44/vb=8,4 2006.229.15:57:26.32#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.15:57:26.32#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.15:57:26.32#ibcon#ireg 11 cls_cnt 2 2006.229.15:57:26.32#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:26.37#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:26.37#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:26.37#ibcon#enter wrdev, iclass 16, count 2 2006.229.15:57:26.37#ibcon#first serial, iclass 16, count 2 2006.229.15:57:26.37#ibcon#enter sib2, iclass 16, count 2 2006.229.15:57:26.37#ibcon#flushed, iclass 16, count 2 2006.229.15:57:26.37#ibcon#about to write, iclass 16, count 2 2006.229.15:57:26.37#ibcon#wrote, iclass 16, count 2 2006.229.15:57:26.37#ibcon#about to read 3, iclass 16, count 2 2006.229.15:57:26.39#ibcon#read 3, iclass 16, count 2 2006.229.15:57:26.39#ibcon#about to read 4, iclass 16, count 2 2006.229.15:57:26.39#ibcon#read 4, iclass 16, count 2 2006.229.15:57:26.39#ibcon#about to read 5, iclass 16, count 2 2006.229.15:57:26.39#ibcon#read 5, iclass 16, count 2 2006.229.15:57:26.39#ibcon#about to read 6, iclass 16, count 2 2006.229.15:57:26.39#ibcon#read 6, iclass 16, count 2 2006.229.15:57:26.39#ibcon#end of sib2, iclass 16, count 2 2006.229.15:57:26.39#ibcon#*mode == 0, iclass 16, count 2 2006.229.15:57:26.39#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.15:57:26.39#ibcon#[27=AT08-04\r\n] 2006.229.15:57:26.40#ibcon#*before write, iclass 16, count 2 2006.229.15:57:26.40#ibcon#enter sib2, iclass 16, count 2 2006.229.15:57:26.40#ibcon#flushed, iclass 16, count 2 2006.229.15:57:26.40#ibcon#about to write, iclass 16, count 2 2006.229.15:57:26.40#ibcon#wrote, iclass 16, count 2 2006.229.15:57:26.40#ibcon#about to read 3, iclass 16, count 2 2006.229.15:57:26.42#ibcon#read 3, iclass 16, count 2 2006.229.15:57:26.42#ibcon#about to read 4, iclass 16, count 2 2006.229.15:57:26.42#ibcon#read 4, iclass 16, count 2 2006.229.15:57:26.42#ibcon#about to read 5, iclass 16, count 2 2006.229.15:57:26.42#ibcon#read 5, iclass 16, count 2 2006.229.15:57:26.42#ibcon#about to read 6, iclass 16, count 2 2006.229.15:57:26.42#ibcon#read 6, iclass 16, count 2 2006.229.15:57:26.42#ibcon#end of sib2, iclass 16, count 2 2006.229.15:57:26.42#ibcon#*after write, iclass 16, count 2 2006.229.15:57:26.43#ibcon#*before return 0, iclass 16, count 2 2006.229.15:57:26.43#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:26.43#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.15:57:26.43#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.15:57:26.43#ibcon#ireg 7 cls_cnt 0 2006.229.15:57:26.43#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:26.54#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:26.54#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:26.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.15:57:26.54#ibcon#first serial, iclass 16, count 0 2006.229.15:57:26.54#ibcon#enter sib2, iclass 16, count 0 2006.229.15:57:26.54#ibcon#flushed, iclass 16, count 0 2006.229.15:57:26.54#ibcon#about to write, iclass 16, count 0 2006.229.15:57:26.55#ibcon#wrote, iclass 16, count 0 2006.229.15:57:26.55#ibcon#about to read 3, iclass 16, count 0 2006.229.15:57:26.56#ibcon#read 3, iclass 16, count 0 2006.229.15:57:26.56#ibcon#about to read 4, iclass 16, count 0 2006.229.15:57:26.56#ibcon#read 4, iclass 16, count 0 2006.229.15:57:26.56#ibcon#about to read 5, iclass 16, count 0 2006.229.15:57:26.56#ibcon#read 5, iclass 16, count 0 2006.229.15:57:26.56#ibcon#about to read 6, iclass 16, count 0 2006.229.15:57:26.56#ibcon#read 6, iclass 16, count 0 2006.229.15:57:26.56#ibcon#end of sib2, iclass 16, count 0 2006.229.15:57:26.56#ibcon#*mode == 0, iclass 16, count 0 2006.229.15:57:26.57#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.15:57:26.57#ibcon#[27=USB\r\n] 2006.229.15:57:26.57#ibcon#*before write, iclass 16, count 0 2006.229.15:57:26.57#ibcon#enter sib2, iclass 16, count 0 2006.229.15:57:26.57#ibcon#flushed, iclass 16, count 0 2006.229.15:57:26.57#ibcon#about to write, iclass 16, count 0 2006.229.15:57:26.57#ibcon#wrote, iclass 16, count 0 2006.229.15:57:26.57#ibcon#about to read 3, iclass 16, count 0 2006.229.15:57:26.59#ibcon#read 3, iclass 16, count 0 2006.229.15:57:26.59#ibcon#about to read 4, iclass 16, count 0 2006.229.15:57:26.59#ibcon#read 4, iclass 16, count 0 2006.229.15:57:26.59#ibcon#about to read 5, iclass 16, count 0 2006.229.15:57:26.59#ibcon#read 5, iclass 16, count 0 2006.229.15:57:26.59#ibcon#about to read 6, iclass 16, count 0 2006.229.15:57:26.60#ibcon#read 6, iclass 16, count 0 2006.229.15:57:26.60#ibcon#end of sib2, iclass 16, count 0 2006.229.15:57:26.60#ibcon#*after write, iclass 16, count 0 2006.229.15:57:26.60#ibcon#*before return 0, iclass 16, count 0 2006.229.15:57:26.60#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:26.60#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.15:57:26.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.15:57:26.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.15:57:26.60$vck44/vabw=wide 2006.229.15:57:26.60#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.15:57:26.60#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.15:57:26.60#ibcon#ireg 8 cls_cnt 0 2006.229.15:57:26.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:26.60#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:26.60#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:26.60#ibcon#enter wrdev, iclass 18, count 0 2006.229.15:57:26.60#ibcon#first serial, iclass 18, count 0 2006.229.15:57:26.60#ibcon#enter sib2, iclass 18, count 0 2006.229.15:57:26.60#ibcon#flushed, iclass 18, count 0 2006.229.15:57:26.60#ibcon#about to write, iclass 18, count 0 2006.229.15:57:26.60#ibcon#wrote, iclass 18, count 0 2006.229.15:57:26.60#ibcon#about to read 3, iclass 18, count 0 2006.229.15:57:26.61#ibcon#read 3, iclass 18, count 0 2006.229.15:57:26.61#ibcon#about to read 4, iclass 18, count 0 2006.229.15:57:26.61#ibcon#read 4, iclass 18, count 0 2006.229.15:57:26.61#ibcon#about to read 5, iclass 18, count 0 2006.229.15:57:26.61#ibcon#read 5, iclass 18, count 0 2006.229.15:57:26.62#ibcon#about to read 6, iclass 18, count 0 2006.229.15:57:26.62#ibcon#read 6, iclass 18, count 0 2006.229.15:57:26.62#ibcon#end of sib2, iclass 18, count 0 2006.229.15:57:26.62#ibcon#*mode == 0, iclass 18, count 0 2006.229.15:57:26.62#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.15:57:26.62#ibcon#[25=BW32\r\n] 2006.229.15:57:26.62#ibcon#*before write, iclass 18, count 0 2006.229.15:57:26.62#ibcon#enter sib2, iclass 18, count 0 2006.229.15:57:26.62#ibcon#flushed, iclass 18, count 0 2006.229.15:57:26.62#ibcon#about to write, iclass 18, count 0 2006.229.15:57:26.62#ibcon#wrote, iclass 18, count 0 2006.229.15:57:26.62#ibcon#about to read 3, iclass 18, count 0 2006.229.15:57:26.64#ibcon#read 3, iclass 18, count 0 2006.229.15:57:26.64#ibcon#about to read 4, iclass 18, count 0 2006.229.15:57:26.64#ibcon#read 4, iclass 18, count 0 2006.229.15:57:26.64#ibcon#about to read 5, iclass 18, count 0 2006.229.15:57:26.64#ibcon#read 5, iclass 18, count 0 2006.229.15:57:26.64#ibcon#about to read 6, iclass 18, count 0 2006.229.15:57:26.65#ibcon#read 6, iclass 18, count 0 2006.229.15:57:26.65#ibcon#end of sib2, iclass 18, count 0 2006.229.15:57:26.65#ibcon#*after write, iclass 18, count 0 2006.229.15:57:26.65#ibcon#*before return 0, iclass 18, count 0 2006.229.15:57:26.65#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:26.65#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.15:57:26.65#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.15:57:26.65#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.15:57:26.65$vck44/vbbw=wide 2006.229.15:57:26.65#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.15:57:26.65#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.15:57:26.65#ibcon#ireg 8 cls_cnt 0 2006.229.15:57:26.65#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:57:26.71#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:57:26.71#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:57:26.71#ibcon#enter wrdev, iclass 20, count 0 2006.229.15:57:26.71#ibcon#first serial, iclass 20, count 0 2006.229.15:57:26.71#ibcon#enter sib2, iclass 20, count 0 2006.229.15:57:26.71#ibcon#flushed, iclass 20, count 0 2006.229.15:57:26.71#ibcon#about to write, iclass 20, count 0 2006.229.15:57:26.71#ibcon#wrote, iclass 20, count 0 2006.229.15:57:26.72#ibcon#about to read 3, iclass 20, count 0 2006.229.15:57:26.73#ibcon#read 3, iclass 20, count 0 2006.229.15:57:26.73#ibcon#about to read 4, iclass 20, count 0 2006.229.15:57:26.73#ibcon#read 4, iclass 20, count 0 2006.229.15:57:26.73#ibcon#about to read 5, iclass 20, count 0 2006.229.15:57:26.73#ibcon#read 5, iclass 20, count 0 2006.229.15:57:26.73#ibcon#about to read 6, iclass 20, count 0 2006.229.15:57:26.73#ibcon#read 6, iclass 20, count 0 2006.229.15:57:26.74#ibcon#end of sib2, iclass 20, count 0 2006.229.15:57:26.74#ibcon#*mode == 0, iclass 20, count 0 2006.229.15:57:26.74#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.15:57:26.74#ibcon#[27=BW32\r\n] 2006.229.15:57:26.74#ibcon#*before write, iclass 20, count 0 2006.229.15:57:26.74#ibcon#enter sib2, iclass 20, count 0 2006.229.15:57:26.74#ibcon#flushed, iclass 20, count 0 2006.229.15:57:26.74#ibcon#about to write, iclass 20, count 0 2006.229.15:57:26.74#ibcon#wrote, iclass 20, count 0 2006.229.15:57:26.74#ibcon#about to read 3, iclass 20, count 0 2006.229.15:57:26.76#ibcon#read 3, iclass 20, count 0 2006.229.15:57:26.76#ibcon#about to read 4, iclass 20, count 0 2006.229.15:57:26.76#ibcon#read 4, iclass 20, count 0 2006.229.15:57:26.76#ibcon#about to read 5, iclass 20, count 0 2006.229.15:57:26.76#ibcon#read 5, iclass 20, count 0 2006.229.15:57:26.76#ibcon#about to read 6, iclass 20, count 0 2006.229.15:57:26.76#ibcon#read 6, iclass 20, count 0 2006.229.15:57:26.76#ibcon#end of sib2, iclass 20, count 0 2006.229.15:57:26.76#ibcon#*after write, iclass 20, count 0 2006.229.15:57:26.77#ibcon#*before return 0, iclass 20, count 0 2006.229.15:57:26.77#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:57:26.77#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.15:57:26.77#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.15:57:26.77#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.15:57:26.77$setupk4/ifdk4 2006.229.15:57:26.77$ifdk4/lo= 2006.229.15:57:26.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.15:57:26.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.15:57:26.77$ifdk4/patch= 2006.229.15:57:26.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.15:57:26.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.15:57:26.77$setupk4/!*+20s 2006.229.15:57:30.59#abcon#<5=/05 1.1 1.7 27.191001001.8\r\n> 2006.229.15:57:30.61#abcon#{5=INTERFACE CLEAR} 2006.229.15:57:30.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:57:40.76#abcon#<5=/05 1.0 1.7 27.191001001.8\r\n> 2006.229.15:57:40.78#abcon#{5=INTERFACE CLEAR} 2006.229.15:57:40.84#abcon#[5=S1D000X0/0*\r\n] 2006.229.15:57:41.26$setupk4/"tpicd 2006.229.15:57:41.26$setupk4/echo=off 2006.229.15:57:41.27$setupk4/xlog=off 2006.229.15:57:41.27:!2006.229.16:04:27 2006.229.15:57:45.14#trakl#Source acquired 2006.229.15:57:46.15#flagr#flagr/antenna,acquired 2006.229.16:04:27.00:preob 2006.229.16:04:27.14/onsource/TRACKING 2006.229.16:04:27.14:!2006.229.16:04:37 2006.229.16:04:37.00:"tape 2006.229.16:04:37.00:"st=record 2006.229.16:04:37.00:data_valid=on 2006.229.16:04:37.00:midob 2006.229.16:04:37.14/onsource/TRACKING 2006.229.16:04:37.14/wx/27.20,1001.9,100 2006.229.16:04:37.29/cable/+6.4109E-03 2006.229.16:04:38.38/va/01,08,usb,yes,31,34 2006.229.16:04:38.38/va/02,07,usb,yes,34,35 2006.229.16:04:38.38/va/03,06,usb,yes,42,45 2006.229.16:04:38.38/va/04,07,usb,yes,35,37 2006.229.16:04:38.38/va/05,04,usb,yes,31,32 2006.229.16:04:38.38/va/06,04,usb,yes,35,35 2006.229.16:04:38.38/va/07,05,usb,yes,31,32 2006.229.16:04:38.38/va/08,06,usb,yes,23,28 2006.229.16:04:38.61/valo/01,524.99,yes,locked 2006.229.16:04:38.61/valo/02,534.99,yes,locked 2006.229.16:04:38.61/valo/03,564.99,yes,locked 2006.229.16:04:38.61/valo/04,624.99,yes,locked 2006.229.16:04:38.61/valo/05,734.99,yes,locked 2006.229.16:04:38.61/valo/06,814.99,yes,locked 2006.229.16:04:38.61/valo/07,864.99,yes,locked 2006.229.16:04:38.61/valo/08,884.99,yes,locked 2006.229.16:04:39.70/vb/01,04,usb,yes,32,30 2006.229.16:04:39.70/vb/02,04,usb,yes,34,34 2006.229.16:04:39.70/vb/03,04,usb,yes,31,34 2006.229.16:04:39.70/vb/04,04,usb,yes,36,35 2006.229.16:04:39.70/vb/05,04,usb,yes,28,30 2006.229.16:04:39.70/vb/06,04,usb,yes,33,28 2006.229.16:04:39.70/vb/07,04,usb,yes,32,32 2006.229.16:04:39.70/vb/08,04,usb,yes,30,33 2006.229.16:04:39.93/vblo/01,629.99,yes,locked 2006.229.16:04:39.93/vblo/02,634.99,yes,locked 2006.229.16:04:39.93/vblo/03,649.99,yes,locked 2006.229.16:04:39.93/vblo/04,679.99,yes,locked 2006.229.16:04:39.93/vblo/05,709.99,yes,locked 2006.229.16:04:39.93/vblo/06,719.99,yes,locked 2006.229.16:04:39.93/vblo/07,734.99,yes,locked 2006.229.16:04:39.93/vblo/08,744.99,yes,locked 2006.229.16:04:40.08/vabw/8 2006.229.16:04:40.23/vbbw/8 2006.229.16:04:40.32/xfe/off,on,12.2 2006.229.16:04:40.70/ifatt/23,28,28,28 2006.229.16:04:41.07/fmout-gps/S +4.50E-07 2006.229.16:04:41.11:!2006.229.16:08:17 2006.229.16:08:17.00:data_valid=off 2006.229.16:08:17.00:"et 2006.229.16:08:17.00:!+3s 2006.229.16:08:20.01:"tape 2006.229.16:08:20.01:postob 2006.229.16:08:20.22/cable/+6.4146E-03 2006.229.16:08:20.22/wx/27.20,1001.9,100 2006.229.16:08:21.08/fmout-gps/S +4.52E-07 2006.229.16:08:21.08:scan_name=229-1610,jd0608,110 2006.229.16:08:21.08:source=1611+343,161341.06,341247.9,2000.0,ccw 2006.229.16:08:22.13#flagr#flagr/antenna,new-source 2006.229.16:08:22.13:checkk5 2006.229.16:08:22.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:08:22.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:08:23.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:08:23.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:08:24.13/chk_obsdata//k5ts1/T2291604??a.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.16:08:24.55/chk_obsdata//k5ts2/T2291604??b.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.16:08:24.96/chk_obsdata//k5ts3/T2291604??c.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.16:08:25.36/chk_obsdata//k5ts4/T2291604??d.dat file size is correct (nominal:880MB, actual:876MB). 2006.229.16:08:26.08/k5log//k5ts1_log_newline 2006.229.16:08:26.78/k5log//k5ts2_log_newline 2006.229.16:08:27.52/k5log//k5ts3_log_newline 2006.229.16:08:28.23/k5log//k5ts4_log_newline 2006.229.16:08:28.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:08:28.25:setupk4=1 2006.229.16:08:28.25$setupk4/echo=on 2006.229.16:08:28.25$setupk4/pcalon 2006.229.16:08:28.25$pcalon/"no phase cal control is implemented here 2006.229.16:08:28.25$setupk4/"tpicd=stop 2006.229.16:08:28.25$setupk4/"rec=synch_on 2006.229.16:08:28.25$setupk4/"rec_mode=128 2006.229.16:08:28.25$setupk4/!* 2006.229.16:08:28.25$setupk4/recpk4 2006.229.16:08:28.25$recpk4/recpatch= 2006.229.16:08:28.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:08:28.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:08:28.26$setupk4/vck44 2006.229.16:08:28.26$vck44/valo=1,524.99 2006.229.16:08:28.26#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:08:28.26#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:08:28.26#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:28.26#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:28.26#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:28.26#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:28.26#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:08:28.26#ibcon#first serial, iclass 33, count 0 2006.229.16:08:28.26#ibcon#enter sib2, iclass 33, count 0 2006.229.16:08:28.26#ibcon#flushed, iclass 33, count 0 2006.229.16:08:28.26#ibcon#about to write, iclass 33, count 0 2006.229.16:08:28.26#ibcon#wrote, iclass 33, count 0 2006.229.16:08:28.26#ibcon#about to read 3, iclass 33, count 0 2006.229.16:08:28.27#ibcon#read 3, iclass 33, count 0 2006.229.16:08:28.27#ibcon#about to read 4, iclass 33, count 0 2006.229.16:08:28.27#ibcon#read 4, iclass 33, count 0 2006.229.16:08:28.27#ibcon#about to read 5, iclass 33, count 0 2006.229.16:08:28.27#ibcon#read 5, iclass 33, count 0 2006.229.16:08:28.27#ibcon#about to read 6, iclass 33, count 0 2006.229.16:08:28.27#ibcon#read 6, iclass 33, count 0 2006.229.16:08:28.27#ibcon#end of sib2, iclass 33, count 0 2006.229.16:08:28.27#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:08:28.27#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:08:28.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:08:28.27#ibcon#*before write, iclass 33, count 0 2006.229.16:08:28.27#ibcon#enter sib2, iclass 33, count 0 2006.229.16:08:28.27#ibcon#flushed, iclass 33, count 0 2006.229.16:08:28.27#ibcon#about to write, iclass 33, count 0 2006.229.16:08:28.27#ibcon#wrote, iclass 33, count 0 2006.229.16:08:28.27#ibcon#about to read 3, iclass 33, count 0 2006.229.16:08:28.32#ibcon#read 3, iclass 33, count 0 2006.229.16:08:28.32#ibcon#about to read 4, iclass 33, count 0 2006.229.16:08:28.32#ibcon#read 4, iclass 33, count 0 2006.229.16:08:28.32#ibcon#about to read 5, iclass 33, count 0 2006.229.16:08:28.32#ibcon#read 5, iclass 33, count 0 2006.229.16:08:28.32#ibcon#about to read 6, iclass 33, count 0 2006.229.16:08:28.32#ibcon#read 6, iclass 33, count 0 2006.229.16:08:28.32#ibcon#end of sib2, iclass 33, count 0 2006.229.16:08:28.32#ibcon#*after write, iclass 33, count 0 2006.229.16:08:28.32#ibcon#*before return 0, iclass 33, count 0 2006.229.16:08:28.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:28.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:28.32#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:08:28.32#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:08:28.32$vck44/va=1,8 2006.229.16:08:28.32#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:08:28.32#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:08:28.32#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:28.32#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:28.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:28.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:28.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:08:28.32#ibcon#first serial, iclass 35, count 2 2006.229.16:08:28.32#ibcon#enter sib2, iclass 35, count 2 2006.229.16:08:28.32#ibcon#flushed, iclass 35, count 2 2006.229.16:08:28.32#ibcon#about to write, iclass 35, count 2 2006.229.16:08:28.32#ibcon#wrote, iclass 35, count 2 2006.229.16:08:28.32#ibcon#about to read 3, iclass 35, count 2 2006.229.16:08:28.34#ibcon#read 3, iclass 35, count 2 2006.229.16:08:28.34#ibcon#about to read 4, iclass 35, count 2 2006.229.16:08:28.34#ibcon#read 4, iclass 35, count 2 2006.229.16:08:28.34#ibcon#about to read 5, iclass 35, count 2 2006.229.16:08:28.34#ibcon#read 5, iclass 35, count 2 2006.229.16:08:28.34#ibcon#about to read 6, iclass 35, count 2 2006.229.16:08:28.34#ibcon#read 6, iclass 35, count 2 2006.229.16:08:28.34#ibcon#end of sib2, iclass 35, count 2 2006.229.16:08:28.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:08:28.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:08:28.34#ibcon#[25=AT01-08\r\n] 2006.229.16:08:28.34#ibcon#*before write, iclass 35, count 2 2006.229.16:08:28.34#ibcon#enter sib2, iclass 35, count 2 2006.229.16:08:28.34#ibcon#flushed, iclass 35, count 2 2006.229.16:08:28.34#ibcon#about to write, iclass 35, count 2 2006.229.16:08:28.34#ibcon#wrote, iclass 35, count 2 2006.229.16:08:28.34#ibcon#about to read 3, iclass 35, count 2 2006.229.16:08:28.37#ibcon#read 3, iclass 35, count 2 2006.229.16:08:28.37#ibcon#about to read 4, iclass 35, count 2 2006.229.16:08:28.37#ibcon#read 4, iclass 35, count 2 2006.229.16:08:28.37#ibcon#about to read 5, iclass 35, count 2 2006.229.16:08:28.37#ibcon#read 5, iclass 35, count 2 2006.229.16:08:28.37#ibcon#about to read 6, iclass 35, count 2 2006.229.16:08:28.37#ibcon#read 6, iclass 35, count 2 2006.229.16:08:28.37#ibcon#end of sib2, iclass 35, count 2 2006.229.16:08:28.37#ibcon#*after write, iclass 35, count 2 2006.229.16:08:28.37#ibcon#*before return 0, iclass 35, count 2 2006.229.16:08:28.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:28.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:28.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:08:28.37#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:28.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:28.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:28.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:28.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:08:28.49#ibcon#first serial, iclass 35, count 0 2006.229.16:08:28.49#ibcon#enter sib2, iclass 35, count 0 2006.229.16:08:28.49#ibcon#flushed, iclass 35, count 0 2006.229.16:08:28.49#ibcon#about to write, iclass 35, count 0 2006.229.16:08:28.49#ibcon#wrote, iclass 35, count 0 2006.229.16:08:28.49#ibcon#about to read 3, iclass 35, count 0 2006.229.16:08:28.51#ibcon#read 3, iclass 35, count 0 2006.229.16:08:28.51#ibcon#about to read 4, iclass 35, count 0 2006.229.16:08:28.51#ibcon#read 4, iclass 35, count 0 2006.229.16:08:28.51#ibcon#about to read 5, iclass 35, count 0 2006.229.16:08:28.51#ibcon#read 5, iclass 35, count 0 2006.229.16:08:28.51#ibcon#about to read 6, iclass 35, count 0 2006.229.16:08:28.51#ibcon#read 6, iclass 35, count 0 2006.229.16:08:28.51#ibcon#end of sib2, iclass 35, count 0 2006.229.16:08:28.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:08:28.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:08:28.51#ibcon#[25=USB\r\n] 2006.229.16:08:28.51#ibcon#*before write, iclass 35, count 0 2006.229.16:08:28.51#ibcon#enter sib2, iclass 35, count 0 2006.229.16:08:28.51#ibcon#flushed, iclass 35, count 0 2006.229.16:08:28.51#ibcon#about to write, iclass 35, count 0 2006.229.16:08:28.51#ibcon#wrote, iclass 35, count 0 2006.229.16:08:28.51#ibcon#about to read 3, iclass 35, count 0 2006.229.16:08:28.54#ibcon#read 3, iclass 35, count 0 2006.229.16:08:28.54#ibcon#about to read 4, iclass 35, count 0 2006.229.16:08:28.54#ibcon#read 4, iclass 35, count 0 2006.229.16:08:28.54#ibcon#about to read 5, iclass 35, count 0 2006.229.16:08:28.54#ibcon#read 5, iclass 35, count 0 2006.229.16:08:28.54#ibcon#about to read 6, iclass 35, count 0 2006.229.16:08:28.54#ibcon#read 6, iclass 35, count 0 2006.229.16:08:28.54#ibcon#end of sib2, iclass 35, count 0 2006.229.16:08:28.54#ibcon#*after write, iclass 35, count 0 2006.229.16:08:28.54#ibcon#*before return 0, iclass 35, count 0 2006.229.16:08:28.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:28.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:28.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:08:28.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:08:28.54$vck44/valo=2,534.99 2006.229.16:08:28.54#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.16:08:28.54#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.16:08:28.54#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:28.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:28.54#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:28.54#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:28.54#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:08:28.54#ibcon#first serial, iclass 37, count 0 2006.229.16:08:28.54#ibcon#enter sib2, iclass 37, count 0 2006.229.16:08:28.54#ibcon#flushed, iclass 37, count 0 2006.229.16:08:28.54#ibcon#about to write, iclass 37, count 0 2006.229.16:08:28.54#ibcon#wrote, iclass 37, count 0 2006.229.16:08:28.54#ibcon#about to read 3, iclass 37, count 0 2006.229.16:08:28.56#ibcon#read 3, iclass 37, count 0 2006.229.16:08:28.56#ibcon#about to read 4, iclass 37, count 0 2006.229.16:08:28.56#ibcon#read 4, iclass 37, count 0 2006.229.16:08:28.56#ibcon#about to read 5, iclass 37, count 0 2006.229.16:08:28.56#ibcon#read 5, iclass 37, count 0 2006.229.16:08:28.56#ibcon#about to read 6, iclass 37, count 0 2006.229.16:08:28.56#ibcon#read 6, iclass 37, count 0 2006.229.16:08:28.56#ibcon#end of sib2, iclass 37, count 0 2006.229.16:08:28.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:08:28.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:08:28.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:08:28.56#ibcon#*before write, iclass 37, count 0 2006.229.16:08:28.56#ibcon#enter sib2, iclass 37, count 0 2006.229.16:08:28.56#ibcon#flushed, iclass 37, count 0 2006.229.16:08:28.56#ibcon#about to write, iclass 37, count 0 2006.229.16:08:28.56#ibcon#wrote, iclass 37, count 0 2006.229.16:08:28.56#ibcon#about to read 3, iclass 37, count 0 2006.229.16:08:28.60#ibcon#read 3, iclass 37, count 0 2006.229.16:08:28.60#ibcon#about to read 4, iclass 37, count 0 2006.229.16:08:28.60#ibcon#read 4, iclass 37, count 0 2006.229.16:08:28.60#ibcon#about to read 5, iclass 37, count 0 2006.229.16:08:28.60#ibcon#read 5, iclass 37, count 0 2006.229.16:08:28.60#ibcon#about to read 6, iclass 37, count 0 2006.229.16:08:28.60#ibcon#read 6, iclass 37, count 0 2006.229.16:08:28.60#ibcon#end of sib2, iclass 37, count 0 2006.229.16:08:28.60#ibcon#*after write, iclass 37, count 0 2006.229.16:08:28.60#ibcon#*before return 0, iclass 37, count 0 2006.229.16:08:28.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:28.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:28.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:08:28.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:08:28.60$vck44/va=2,7 2006.229.16:08:28.60#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.16:08:28.60#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.16:08:28.60#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:28.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:28.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:28.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:28.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.16:08:28.66#ibcon#first serial, iclass 39, count 2 2006.229.16:08:28.66#ibcon#enter sib2, iclass 39, count 2 2006.229.16:08:28.66#ibcon#flushed, iclass 39, count 2 2006.229.16:08:28.66#ibcon#about to write, iclass 39, count 2 2006.229.16:08:28.66#ibcon#wrote, iclass 39, count 2 2006.229.16:08:28.66#ibcon#about to read 3, iclass 39, count 2 2006.229.16:08:28.68#ibcon#read 3, iclass 39, count 2 2006.229.16:08:28.68#ibcon#about to read 4, iclass 39, count 2 2006.229.16:08:28.68#ibcon#read 4, iclass 39, count 2 2006.229.16:08:28.68#ibcon#about to read 5, iclass 39, count 2 2006.229.16:08:28.68#ibcon#read 5, iclass 39, count 2 2006.229.16:08:28.68#ibcon#about to read 6, iclass 39, count 2 2006.229.16:08:28.68#ibcon#read 6, iclass 39, count 2 2006.229.16:08:28.68#ibcon#end of sib2, iclass 39, count 2 2006.229.16:08:28.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.16:08:28.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.16:08:28.68#ibcon#[25=AT02-07\r\n] 2006.229.16:08:28.68#ibcon#*before write, iclass 39, count 2 2006.229.16:08:28.68#ibcon#enter sib2, iclass 39, count 2 2006.229.16:08:28.68#ibcon#flushed, iclass 39, count 2 2006.229.16:08:28.68#ibcon#about to write, iclass 39, count 2 2006.229.16:08:28.68#ibcon#wrote, iclass 39, count 2 2006.229.16:08:28.68#ibcon#about to read 3, iclass 39, count 2 2006.229.16:08:28.71#ibcon#read 3, iclass 39, count 2 2006.229.16:08:28.71#ibcon#about to read 4, iclass 39, count 2 2006.229.16:08:28.71#ibcon#read 4, iclass 39, count 2 2006.229.16:08:28.71#ibcon#about to read 5, iclass 39, count 2 2006.229.16:08:28.71#ibcon#read 5, iclass 39, count 2 2006.229.16:08:28.71#ibcon#about to read 6, iclass 39, count 2 2006.229.16:08:28.71#ibcon#read 6, iclass 39, count 2 2006.229.16:08:28.71#ibcon#end of sib2, iclass 39, count 2 2006.229.16:08:28.71#ibcon#*after write, iclass 39, count 2 2006.229.16:08:28.71#ibcon#*before return 0, iclass 39, count 2 2006.229.16:08:28.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:28.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:28.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.16:08:28.71#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:28.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:28.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:28.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:28.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:08:28.83#ibcon#first serial, iclass 39, count 0 2006.229.16:08:28.83#ibcon#enter sib2, iclass 39, count 0 2006.229.16:08:28.83#ibcon#flushed, iclass 39, count 0 2006.229.16:08:28.83#ibcon#about to write, iclass 39, count 0 2006.229.16:08:28.83#ibcon#wrote, iclass 39, count 0 2006.229.16:08:28.83#ibcon#about to read 3, iclass 39, count 0 2006.229.16:08:28.85#ibcon#read 3, iclass 39, count 0 2006.229.16:08:28.85#ibcon#about to read 4, iclass 39, count 0 2006.229.16:08:28.85#ibcon#read 4, iclass 39, count 0 2006.229.16:08:28.85#ibcon#about to read 5, iclass 39, count 0 2006.229.16:08:28.85#ibcon#read 5, iclass 39, count 0 2006.229.16:08:28.85#ibcon#about to read 6, iclass 39, count 0 2006.229.16:08:28.85#ibcon#read 6, iclass 39, count 0 2006.229.16:08:28.85#ibcon#end of sib2, iclass 39, count 0 2006.229.16:08:28.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:08:28.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:08:28.85#ibcon#[25=USB\r\n] 2006.229.16:08:28.85#ibcon#*before write, iclass 39, count 0 2006.229.16:08:28.85#ibcon#enter sib2, iclass 39, count 0 2006.229.16:08:28.85#ibcon#flushed, iclass 39, count 0 2006.229.16:08:28.85#ibcon#about to write, iclass 39, count 0 2006.229.16:08:28.85#ibcon#wrote, iclass 39, count 0 2006.229.16:08:28.85#ibcon#about to read 3, iclass 39, count 0 2006.229.16:08:28.88#ibcon#read 3, iclass 39, count 0 2006.229.16:08:28.88#ibcon#about to read 4, iclass 39, count 0 2006.229.16:08:28.88#ibcon#read 4, iclass 39, count 0 2006.229.16:08:28.88#ibcon#about to read 5, iclass 39, count 0 2006.229.16:08:28.88#ibcon#read 5, iclass 39, count 0 2006.229.16:08:28.88#ibcon#about to read 6, iclass 39, count 0 2006.229.16:08:28.88#ibcon#read 6, iclass 39, count 0 2006.229.16:08:28.88#ibcon#end of sib2, iclass 39, count 0 2006.229.16:08:28.88#ibcon#*after write, iclass 39, count 0 2006.229.16:08:28.88#ibcon#*before return 0, iclass 39, count 0 2006.229.16:08:28.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:28.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:28.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:08:28.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:08:28.88$vck44/valo=3,564.99 2006.229.16:08:28.88#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.16:08:28.88#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.16:08:28.88#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:28.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:08:28.88#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:08:28.88#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:08:28.88#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:08:28.88#ibcon#first serial, iclass 3, count 0 2006.229.16:08:28.88#ibcon#enter sib2, iclass 3, count 0 2006.229.16:08:28.88#ibcon#flushed, iclass 3, count 0 2006.229.16:08:28.88#ibcon#about to write, iclass 3, count 0 2006.229.16:08:28.88#ibcon#wrote, iclass 3, count 0 2006.229.16:08:28.88#ibcon#about to read 3, iclass 3, count 0 2006.229.16:08:28.90#ibcon#read 3, iclass 3, count 0 2006.229.16:08:28.90#ibcon#about to read 4, iclass 3, count 0 2006.229.16:08:28.90#ibcon#read 4, iclass 3, count 0 2006.229.16:08:28.90#ibcon#about to read 5, iclass 3, count 0 2006.229.16:08:28.90#ibcon#read 5, iclass 3, count 0 2006.229.16:08:28.90#ibcon#about to read 6, iclass 3, count 0 2006.229.16:08:28.90#ibcon#read 6, iclass 3, count 0 2006.229.16:08:28.90#ibcon#end of sib2, iclass 3, count 0 2006.229.16:08:28.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:08:28.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:08:28.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:08:28.90#ibcon#*before write, iclass 3, count 0 2006.229.16:08:28.90#ibcon#enter sib2, iclass 3, count 0 2006.229.16:08:28.90#ibcon#flushed, iclass 3, count 0 2006.229.16:08:28.90#ibcon#about to write, iclass 3, count 0 2006.229.16:08:28.90#ibcon#wrote, iclass 3, count 0 2006.229.16:08:28.90#ibcon#about to read 3, iclass 3, count 0 2006.229.16:08:28.94#ibcon#read 3, iclass 3, count 0 2006.229.16:08:28.94#ibcon#about to read 4, iclass 3, count 0 2006.229.16:08:28.94#ibcon#read 4, iclass 3, count 0 2006.229.16:08:28.94#ibcon#about to read 5, iclass 3, count 0 2006.229.16:08:28.94#ibcon#read 5, iclass 3, count 0 2006.229.16:08:28.94#ibcon#about to read 6, iclass 3, count 0 2006.229.16:08:28.94#ibcon#read 6, iclass 3, count 0 2006.229.16:08:28.94#ibcon#end of sib2, iclass 3, count 0 2006.229.16:08:28.94#ibcon#*after write, iclass 3, count 0 2006.229.16:08:28.94#ibcon#*before return 0, iclass 3, count 0 2006.229.16:08:28.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:08:28.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:08:28.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:08:28.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:08:28.94$vck44/va=3,6 2006.229.16:08:28.94#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.16:08:28.94#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.16:08:28.94#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:28.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:08:29.00#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:08:29.00#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:08:29.00#ibcon#enter wrdev, iclass 5, count 2 2006.229.16:08:29.00#ibcon#first serial, iclass 5, count 2 2006.229.16:08:29.00#ibcon#enter sib2, iclass 5, count 2 2006.229.16:08:29.00#ibcon#flushed, iclass 5, count 2 2006.229.16:08:29.00#ibcon#about to write, iclass 5, count 2 2006.229.16:08:29.00#ibcon#wrote, iclass 5, count 2 2006.229.16:08:29.00#ibcon#about to read 3, iclass 5, count 2 2006.229.16:08:29.02#ibcon#read 3, iclass 5, count 2 2006.229.16:08:29.02#ibcon#about to read 4, iclass 5, count 2 2006.229.16:08:29.02#ibcon#read 4, iclass 5, count 2 2006.229.16:08:29.02#ibcon#about to read 5, iclass 5, count 2 2006.229.16:08:29.02#ibcon#read 5, iclass 5, count 2 2006.229.16:08:29.02#ibcon#about to read 6, iclass 5, count 2 2006.229.16:08:29.02#ibcon#read 6, iclass 5, count 2 2006.229.16:08:29.02#ibcon#end of sib2, iclass 5, count 2 2006.229.16:08:29.02#ibcon#*mode == 0, iclass 5, count 2 2006.229.16:08:29.02#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.16:08:29.02#ibcon#[25=AT03-06\r\n] 2006.229.16:08:29.02#ibcon#*before write, iclass 5, count 2 2006.229.16:08:29.02#ibcon#enter sib2, iclass 5, count 2 2006.229.16:08:29.02#ibcon#flushed, iclass 5, count 2 2006.229.16:08:29.02#ibcon#about to write, iclass 5, count 2 2006.229.16:08:29.02#ibcon#wrote, iclass 5, count 2 2006.229.16:08:29.02#ibcon#about to read 3, iclass 5, count 2 2006.229.16:08:29.05#ibcon#read 3, iclass 5, count 2 2006.229.16:08:29.05#ibcon#about to read 4, iclass 5, count 2 2006.229.16:08:29.05#ibcon#read 4, iclass 5, count 2 2006.229.16:08:29.05#ibcon#about to read 5, iclass 5, count 2 2006.229.16:08:29.05#ibcon#read 5, iclass 5, count 2 2006.229.16:08:29.05#ibcon#about to read 6, iclass 5, count 2 2006.229.16:08:29.05#ibcon#read 6, iclass 5, count 2 2006.229.16:08:29.05#ibcon#end of sib2, iclass 5, count 2 2006.229.16:08:29.05#ibcon#*after write, iclass 5, count 2 2006.229.16:08:29.05#ibcon#*before return 0, iclass 5, count 2 2006.229.16:08:29.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:08:29.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:08:29.05#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.16:08:29.05#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:29.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:08:29.17#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:08:29.17#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:08:29.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:08:29.17#ibcon#first serial, iclass 5, count 0 2006.229.16:08:29.17#ibcon#enter sib2, iclass 5, count 0 2006.229.16:08:29.17#ibcon#flushed, iclass 5, count 0 2006.229.16:08:29.17#ibcon#about to write, iclass 5, count 0 2006.229.16:08:29.17#ibcon#wrote, iclass 5, count 0 2006.229.16:08:29.17#ibcon#about to read 3, iclass 5, count 0 2006.229.16:08:29.19#ibcon#read 3, iclass 5, count 0 2006.229.16:08:29.19#ibcon#about to read 4, iclass 5, count 0 2006.229.16:08:29.19#ibcon#read 4, iclass 5, count 0 2006.229.16:08:29.19#ibcon#about to read 5, iclass 5, count 0 2006.229.16:08:29.19#ibcon#read 5, iclass 5, count 0 2006.229.16:08:29.19#ibcon#about to read 6, iclass 5, count 0 2006.229.16:08:29.19#ibcon#read 6, iclass 5, count 0 2006.229.16:08:29.19#ibcon#end of sib2, iclass 5, count 0 2006.229.16:08:29.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:08:29.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:08:29.19#ibcon#[25=USB\r\n] 2006.229.16:08:29.19#ibcon#*before write, iclass 5, count 0 2006.229.16:08:29.19#ibcon#enter sib2, iclass 5, count 0 2006.229.16:08:29.19#ibcon#flushed, iclass 5, count 0 2006.229.16:08:29.19#ibcon#about to write, iclass 5, count 0 2006.229.16:08:29.19#ibcon#wrote, iclass 5, count 0 2006.229.16:08:29.19#ibcon#about to read 3, iclass 5, count 0 2006.229.16:08:29.22#ibcon#read 3, iclass 5, count 0 2006.229.16:08:29.22#ibcon#about to read 4, iclass 5, count 0 2006.229.16:08:29.22#ibcon#read 4, iclass 5, count 0 2006.229.16:08:29.22#ibcon#about to read 5, iclass 5, count 0 2006.229.16:08:29.22#ibcon#read 5, iclass 5, count 0 2006.229.16:08:29.22#ibcon#about to read 6, iclass 5, count 0 2006.229.16:08:29.22#ibcon#read 6, iclass 5, count 0 2006.229.16:08:29.22#ibcon#end of sib2, iclass 5, count 0 2006.229.16:08:29.22#ibcon#*after write, iclass 5, count 0 2006.229.16:08:29.22#ibcon#*before return 0, iclass 5, count 0 2006.229.16:08:29.22#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:08:29.22#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:08:29.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:08:29.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:08:29.22$vck44/valo=4,624.99 2006.229.16:08:29.22#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.16:08:29.22#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.16:08:29.22#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:29.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:29.22#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:29.22#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:29.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:08:29.22#ibcon#first serial, iclass 7, count 0 2006.229.16:08:29.22#ibcon#enter sib2, iclass 7, count 0 2006.229.16:08:29.22#ibcon#flushed, iclass 7, count 0 2006.229.16:08:29.22#ibcon#about to write, iclass 7, count 0 2006.229.16:08:29.22#ibcon#wrote, iclass 7, count 0 2006.229.16:08:29.22#ibcon#about to read 3, iclass 7, count 0 2006.229.16:08:29.24#ibcon#read 3, iclass 7, count 0 2006.229.16:08:29.24#ibcon#about to read 4, iclass 7, count 0 2006.229.16:08:29.24#ibcon#read 4, iclass 7, count 0 2006.229.16:08:29.24#ibcon#about to read 5, iclass 7, count 0 2006.229.16:08:29.24#ibcon#read 5, iclass 7, count 0 2006.229.16:08:29.24#ibcon#about to read 6, iclass 7, count 0 2006.229.16:08:29.24#ibcon#read 6, iclass 7, count 0 2006.229.16:08:29.24#ibcon#end of sib2, iclass 7, count 0 2006.229.16:08:29.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:08:29.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:08:29.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:08:29.24#ibcon#*before write, iclass 7, count 0 2006.229.16:08:29.24#ibcon#enter sib2, iclass 7, count 0 2006.229.16:08:29.24#ibcon#flushed, iclass 7, count 0 2006.229.16:08:29.24#ibcon#about to write, iclass 7, count 0 2006.229.16:08:29.24#ibcon#wrote, iclass 7, count 0 2006.229.16:08:29.24#ibcon#about to read 3, iclass 7, count 0 2006.229.16:08:29.28#ibcon#read 3, iclass 7, count 0 2006.229.16:08:29.28#ibcon#about to read 4, iclass 7, count 0 2006.229.16:08:29.28#ibcon#read 4, iclass 7, count 0 2006.229.16:08:29.28#ibcon#about to read 5, iclass 7, count 0 2006.229.16:08:29.28#ibcon#read 5, iclass 7, count 0 2006.229.16:08:29.28#ibcon#about to read 6, iclass 7, count 0 2006.229.16:08:29.28#ibcon#read 6, iclass 7, count 0 2006.229.16:08:29.28#ibcon#end of sib2, iclass 7, count 0 2006.229.16:08:29.28#ibcon#*after write, iclass 7, count 0 2006.229.16:08:29.28#ibcon#*before return 0, iclass 7, count 0 2006.229.16:08:29.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:29.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:29.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:08:29.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:08:29.28$vck44/va=4,7 2006.229.16:08:29.28#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.16:08:29.28#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.16:08:29.28#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:29.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:29.34#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:29.34#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:29.34#ibcon#enter wrdev, iclass 11, count 2 2006.229.16:08:29.34#ibcon#first serial, iclass 11, count 2 2006.229.16:08:29.34#ibcon#enter sib2, iclass 11, count 2 2006.229.16:08:29.34#ibcon#flushed, iclass 11, count 2 2006.229.16:08:29.34#ibcon#about to write, iclass 11, count 2 2006.229.16:08:29.34#ibcon#wrote, iclass 11, count 2 2006.229.16:08:29.34#ibcon#about to read 3, iclass 11, count 2 2006.229.16:08:29.36#ibcon#read 3, iclass 11, count 2 2006.229.16:08:29.36#ibcon#about to read 4, iclass 11, count 2 2006.229.16:08:29.36#ibcon#read 4, iclass 11, count 2 2006.229.16:08:29.36#ibcon#about to read 5, iclass 11, count 2 2006.229.16:08:29.36#ibcon#read 5, iclass 11, count 2 2006.229.16:08:29.36#ibcon#about to read 6, iclass 11, count 2 2006.229.16:08:29.36#ibcon#read 6, iclass 11, count 2 2006.229.16:08:29.36#ibcon#end of sib2, iclass 11, count 2 2006.229.16:08:29.36#ibcon#*mode == 0, iclass 11, count 2 2006.229.16:08:29.36#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.16:08:29.36#ibcon#[25=AT04-07\r\n] 2006.229.16:08:29.36#ibcon#*before write, iclass 11, count 2 2006.229.16:08:29.36#ibcon#enter sib2, iclass 11, count 2 2006.229.16:08:29.36#ibcon#flushed, iclass 11, count 2 2006.229.16:08:29.36#ibcon#about to write, iclass 11, count 2 2006.229.16:08:29.36#ibcon#wrote, iclass 11, count 2 2006.229.16:08:29.36#ibcon#about to read 3, iclass 11, count 2 2006.229.16:08:29.39#ibcon#read 3, iclass 11, count 2 2006.229.16:08:29.39#ibcon#about to read 4, iclass 11, count 2 2006.229.16:08:29.39#ibcon#read 4, iclass 11, count 2 2006.229.16:08:29.39#ibcon#about to read 5, iclass 11, count 2 2006.229.16:08:29.39#ibcon#read 5, iclass 11, count 2 2006.229.16:08:29.39#ibcon#about to read 6, iclass 11, count 2 2006.229.16:08:29.39#ibcon#read 6, iclass 11, count 2 2006.229.16:08:29.39#ibcon#end of sib2, iclass 11, count 2 2006.229.16:08:29.39#ibcon#*after write, iclass 11, count 2 2006.229.16:08:29.39#ibcon#*before return 0, iclass 11, count 2 2006.229.16:08:29.39#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:29.39#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:29.39#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.16:08:29.39#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:29.39#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:29.51#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:29.51#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:29.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:08:29.51#ibcon#first serial, iclass 11, count 0 2006.229.16:08:29.51#ibcon#enter sib2, iclass 11, count 0 2006.229.16:08:29.51#ibcon#flushed, iclass 11, count 0 2006.229.16:08:29.51#ibcon#about to write, iclass 11, count 0 2006.229.16:08:29.51#ibcon#wrote, iclass 11, count 0 2006.229.16:08:29.51#ibcon#about to read 3, iclass 11, count 0 2006.229.16:08:29.53#ibcon#read 3, iclass 11, count 0 2006.229.16:08:29.53#ibcon#about to read 4, iclass 11, count 0 2006.229.16:08:29.53#ibcon#read 4, iclass 11, count 0 2006.229.16:08:29.53#ibcon#about to read 5, iclass 11, count 0 2006.229.16:08:29.53#ibcon#read 5, iclass 11, count 0 2006.229.16:08:29.53#ibcon#about to read 6, iclass 11, count 0 2006.229.16:08:29.53#ibcon#read 6, iclass 11, count 0 2006.229.16:08:29.53#ibcon#end of sib2, iclass 11, count 0 2006.229.16:08:29.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:08:29.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:08:29.53#ibcon#[25=USB\r\n] 2006.229.16:08:29.53#ibcon#*before write, iclass 11, count 0 2006.229.16:08:29.53#ibcon#enter sib2, iclass 11, count 0 2006.229.16:08:29.53#ibcon#flushed, iclass 11, count 0 2006.229.16:08:29.53#ibcon#about to write, iclass 11, count 0 2006.229.16:08:29.53#ibcon#wrote, iclass 11, count 0 2006.229.16:08:29.53#ibcon#about to read 3, iclass 11, count 0 2006.229.16:08:29.56#ibcon#read 3, iclass 11, count 0 2006.229.16:08:29.56#ibcon#about to read 4, iclass 11, count 0 2006.229.16:08:29.56#ibcon#read 4, iclass 11, count 0 2006.229.16:08:29.56#ibcon#about to read 5, iclass 11, count 0 2006.229.16:08:29.56#ibcon#read 5, iclass 11, count 0 2006.229.16:08:29.56#ibcon#about to read 6, iclass 11, count 0 2006.229.16:08:29.56#ibcon#read 6, iclass 11, count 0 2006.229.16:08:29.56#ibcon#end of sib2, iclass 11, count 0 2006.229.16:08:29.56#ibcon#*after write, iclass 11, count 0 2006.229.16:08:29.56#ibcon#*before return 0, iclass 11, count 0 2006.229.16:08:29.56#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:29.56#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:29.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:08:29.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:08:29.56$vck44/valo=5,734.99 2006.229.16:08:29.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.16:08:29.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.16:08:29.56#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:29.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:29.56#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:29.56#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:29.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:08:29.56#ibcon#first serial, iclass 13, count 0 2006.229.16:08:29.56#ibcon#enter sib2, iclass 13, count 0 2006.229.16:08:29.56#ibcon#flushed, iclass 13, count 0 2006.229.16:08:29.56#ibcon#about to write, iclass 13, count 0 2006.229.16:08:29.56#ibcon#wrote, iclass 13, count 0 2006.229.16:08:29.56#ibcon#about to read 3, iclass 13, count 0 2006.229.16:08:29.58#ibcon#read 3, iclass 13, count 0 2006.229.16:08:29.58#ibcon#about to read 4, iclass 13, count 0 2006.229.16:08:29.58#ibcon#read 4, iclass 13, count 0 2006.229.16:08:29.58#ibcon#about to read 5, iclass 13, count 0 2006.229.16:08:29.58#ibcon#read 5, iclass 13, count 0 2006.229.16:08:29.58#ibcon#about to read 6, iclass 13, count 0 2006.229.16:08:29.58#ibcon#read 6, iclass 13, count 0 2006.229.16:08:29.58#ibcon#end of sib2, iclass 13, count 0 2006.229.16:08:29.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:08:29.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:08:29.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:08:29.58#ibcon#*before write, iclass 13, count 0 2006.229.16:08:29.58#ibcon#enter sib2, iclass 13, count 0 2006.229.16:08:29.58#ibcon#flushed, iclass 13, count 0 2006.229.16:08:29.58#ibcon#about to write, iclass 13, count 0 2006.229.16:08:29.58#ibcon#wrote, iclass 13, count 0 2006.229.16:08:29.58#ibcon#about to read 3, iclass 13, count 0 2006.229.16:08:29.62#ibcon#read 3, iclass 13, count 0 2006.229.16:08:29.62#ibcon#about to read 4, iclass 13, count 0 2006.229.16:08:29.62#ibcon#read 4, iclass 13, count 0 2006.229.16:08:29.62#ibcon#about to read 5, iclass 13, count 0 2006.229.16:08:29.62#ibcon#read 5, iclass 13, count 0 2006.229.16:08:29.62#ibcon#about to read 6, iclass 13, count 0 2006.229.16:08:29.62#ibcon#read 6, iclass 13, count 0 2006.229.16:08:29.62#ibcon#end of sib2, iclass 13, count 0 2006.229.16:08:29.62#ibcon#*after write, iclass 13, count 0 2006.229.16:08:29.62#ibcon#*before return 0, iclass 13, count 0 2006.229.16:08:29.62#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:29.62#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:29.62#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:08:29.62#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:08:29.62$vck44/va=5,4 2006.229.16:08:29.62#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.16:08:29.62#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.16:08:29.62#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:29.62#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:29.68#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:29.68#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:29.68#ibcon#enter wrdev, iclass 15, count 2 2006.229.16:08:29.68#ibcon#first serial, iclass 15, count 2 2006.229.16:08:29.68#ibcon#enter sib2, iclass 15, count 2 2006.229.16:08:29.68#ibcon#flushed, iclass 15, count 2 2006.229.16:08:29.68#ibcon#about to write, iclass 15, count 2 2006.229.16:08:29.68#ibcon#wrote, iclass 15, count 2 2006.229.16:08:29.68#ibcon#about to read 3, iclass 15, count 2 2006.229.16:08:29.70#ibcon#read 3, iclass 15, count 2 2006.229.16:08:29.70#ibcon#about to read 4, iclass 15, count 2 2006.229.16:08:29.70#ibcon#read 4, iclass 15, count 2 2006.229.16:08:29.70#ibcon#about to read 5, iclass 15, count 2 2006.229.16:08:29.70#ibcon#read 5, iclass 15, count 2 2006.229.16:08:29.70#ibcon#about to read 6, iclass 15, count 2 2006.229.16:08:29.70#ibcon#read 6, iclass 15, count 2 2006.229.16:08:29.70#ibcon#end of sib2, iclass 15, count 2 2006.229.16:08:29.70#ibcon#*mode == 0, iclass 15, count 2 2006.229.16:08:29.70#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.16:08:29.70#ibcon#[25=AT05-04\r\n] 2006.229.16:08:29.70#ibcon#*before write, iclass 15, count 2 2006.229.16:08:29.70#ibcon#enter sib2, iclass 15, count 2 2006.229.16:08:29.70#ibcon#flushed, iclass 15, count 2 2006.229.16:08:29.70#ibcon#about to write, iclass 15, count 2 2006.229.16:08:29.70#ibcon#wrote, iclass 15, count 2 2006.229.16:08:29.70#ibcon#about to read 3, iclass 15, count 2 2006.229.16:08:29.73#ibcon#read 3, iclass 15, count 2 2006.229.16:08:29.73#ibcon#about to read 4, iclass 15, count 2 2006.229.16:08:29.73#ibcon#read 4, iclass 15, count 2 2006.229.16:08:29.73#ibcon#about to read 5, iclass 15, count 2 2006.229.16:08:29.73#ibcon#read 5, iclass 15, count 2 2006.229.16:08:29.73#ibcon#about to read 6, iclass 15, count 2 2006.229.16:08:29.73#ibcon#read 6, iclass 15, count 2 2006.229.16:08:29.73#ibcon#end of sib2, iclass 15, count 2 2006.229.16:08:29.73#ibcon#*after write, iclass 15, count 2 2006.229.16:08:29.73#ibcon#*before return 0, iclass 15, count 2 2006.229.16:08:29.73#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:29.73#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:29.73#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.16:08:29.73#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:29.73#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:29.85#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:29.85#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:29.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:08:29.85#ibcon#first serial, iclass 15, count 0 2006.229.16:08:29.85#ibcon#enter sib2, iclass 15, count 0 2006.229.16:08:29.85#ibcon#flushed, iclass 15, count 0 2006.229.16:08:29.85#ibcon#about to write, iclass 15, count 0 2006.229.16:08:29.85#ibcon#wrote, iclass 15, count 0 2006.229.16:08:29.85#ibcon#about to read 3, iclass 15, count 0 2006.229.16:08:29.87#ibcon#read 3, iclass 15, count 0 2006.229.16:08:29.87#ibcon#about to read 4, iclass 15, count 0 2006.229.16:08:29.87#ibcon#read 4, iclass 15, count 0 2006.229.16:08:29.87#ibcon#about to read 5, iclass 15, count 0 2006.229.16:08:29.87#ibcon#read 5, iclass 15, count 0 2006.229.16:08:29.87#ibcon#about to read 6, iclass 15, count 0 2006.229.16:08:29.87#ibcon#read 6, iclass 15, count 0 2006.229.16:08:29.87#ibcon#end of sib2, iclass 15, count 0 2006.229.16:08:29.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:08:29.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:08:29.87#ibcon#[25=USB\r\n] 2006.229.16:08:29.87#ibcon#*before write, iclass 15, count 0 2006.229.16:08:29.87#ibcon#enter sib2, iclass 15, count 0 2006.229.16:08:29.87#ibcon#flushed, iclass 15, count 0 2006.229.16:08:29.87#ibcon#about to write, iclass 15, count 0 2006.229.16:08:29.87#ibcon#wrote, iclass 15, count 0 2006.229.16:08:29.87#ibcon#about to read 3, iclass 15, count 0 2006.229.16:08:29.90#ibcon#read 3, iclass 15, count 0 2006.229.16:08:29.90#ibcon#about to read 4, iclass 15, count 0 2006.229.16:08:29.90#ibcon#read 4, iclass 15, count 0 2006.229.16:08:29.90#ibcon#about to read 5, iclass 15, count 0 2006.229.16:08:29.90#ibcon#read 5, iclass 15, count 0 2006.229.16:08:29.90#ibcon#about to read 6, iclass 15, count 0 2006.229.16:08:29.90#ibcon#read 6, iclass 15, count 0 2006.229.16:08:29.90#ibcon#end of sib2, iclass 15, count 0 2006.229.16:08:29.90#ibcon#*after write, iclass 15, count 0 2006.229.16:08:29.90#ibcon#*before return 0, iclass 15, count 0 2006.229.16:08:29.90#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:29.90#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:29.90#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:08:29.90#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:08:29.90$vck44/valo=6,814.99 2006.229.16:08:29.90#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.16:08:29.90#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.16:08:29.90#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:29.90#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:29.90#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:29.90#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:29.90#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:08:29.90#ibcon#first serial, iclass 17, count 0 2006.229.16:08:29.90#ibcon#enter sib2, iclass 17, count 0 2006.229.16:08:29.90#ibcon#flushed, iclass 17, count 0 2006.229.16:08:29.90#ibcon#about to write, iclass 17, count 0 2006.229.16:08:29.90#ibcon#wrote, iclass 17, count 0 2006.229.16:08:29.90#ibcon#about to read 3, iclass 17, count 0 2006.229.16:08:29.92#ibcon#read 3, iclass 17, count 0 2006.229.16:08:29.92#ibcon#about to read 4, iclass 17, count 0 2006.229.16:08:29.92#ibcon#read 4, iclass 17, count 0 2006.229.16:08:29.92#ibcon#about to read 5, iclass 17, count 0 2006.229.16:08:29.92#ibcon#read 5, iclass 17, count 0 2006.229.16:08:29.92#ibcon#about to read 6, iclass 17, count 0 2006.229.16:08:29.92#ibcon#read 6, iclass 17, count 0 2006.229.16:08:29.92#ibcon#end of sib2, iclass 17, count 0 2006.229.16:08:29.92#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:08:29.92#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:08:29.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:08:29.92#ibcon#*before write, iclass 17, count 0 2006.229.16:08:29.92#ibcon#enter sib2, iclass 17, count 0 2006.229.16:08:29.92#ibcon#flushed, iclass 17, count 0 2006.229.16:08:29.92#ibcon#about to write, iclass 17, count 0 2006.229.16:08:29.92#ibcon#wrote, iclass 17, count 0 2006.229.16:08:29.92#ibcon#about to read 3, iclass 17, count 0 2006.229.16:08:29.96#ibcon#read 3, iclass 17, count 0 2006.229.16:08:29.96#ibcon#about to read 4, iclass 17, count 0 2006.229.16:08:29.96#ibcon#read 4, iclass 17, count 0 2006.229.16:08:29.96#ibcon#about to read 5, iclass 17, count 0 2006.229.16:08:29.96#ibcon#read 5, iclass 17, count 0 2006.229.16:08:29.96#ibcon#about to read 6, iclass 17, count 0 2006.229.16:08:29.96#ibcon#read 6, iclass 17, count 0 2006.229.16:08:29.96#ibcon#end of sib2, iclass 17, count 0 2006.229.16:08:29.96#ibcon#*after write, iclass 17, count 0 2006.229.16:08:29.96#ibcon#*before return 0, iclass 17, count 0 2006.229.16:08:29.96#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:29.96#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:29.96#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:08:29.96#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:08:29.96$vck44/va=6,4 2006.229.16:08:29.96#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.16:08:29.96#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.16:08:29.96#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:29.96#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:30.02#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:30.02#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:30.02#ibcon#enter wrdev, iclass 19, count 2 2006.229.16:08:30.02#ibcon#first serial, iclass 19, count 2 2006.229.16:08:30.02#ibcon#enter sib2, iclass 19, count 2 2006.229.16:08:30.02#ibcon#flushed, iclass 19, count 2 2006.229.16:08:30.02#ibcon#about to write, iclass 19, count 2 2006.229.16:08:30.02#ibcon#wrote, iclass 19, count 2 2006.229.16:08:30.02#ibcon#about to read 3, iclass 19, count 2 2006.229.16:08:30.04#ibcon#read 3, iclass 19, count 2 2006.229.16:08:30.04#ibcon#about to read 4, iclass 19, count 2 2006.229.16:08:30.04#ibcon#read 4, iclass 19, count 2 2006.229.16:08:30.04#ibcon#about to read 5, iclass 19, count 2 2006.229.16:08:30.04#ibcon#read 5, iclass 19, count 2 2006.229.16:08:30.04#ibcon#about to read 6, iclass 19, count 2 2006.229.16:08:30.04#ibcon#read 6, iclass 19, count 2 2006.229.16:08:30.04#ibcon#end of sib2, iclass 19, count 2 2006.229.16:08:30.04#ibcon#*mode == 0, iclass 19, count 2 2006.229.16:08:30.04#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.16:08:30.04#ibcon#[25=AT06-04\r\n] 2006.229.16:08:30.04#ibcon#*before write, iclass 19, count 2 2006.229.16:08:30.04#ibcon#enter sib2, iclass 19, count 2 2006.229.16:08:30.04#ibcon#flushed, iclass 19, count 2 2006.229.16:08:30.04#ibcon#about to write, iclass 19, count 2 2006.229.16:08:30.04#ibcon#wrote, iclass 19, count 2 2006.229.16:08:30.04#ibcon#about to read 3, iclass 19, count 2 2006.229.16:08:30.07#ibcon#read 3, iclass 19, count 2 2006.229.16:08:30.07#ibcon#about to read 4, iclass 19, count 2 2006.229.16:08:30.07#ibcon#read 4, iclass 19, count 2 2006.229.16:08:30.07#ibcon#about to read 5, iclass 19, count 2 2006.229.16:08:30.07#ibcon#read 5, iclass 19, count 2 2006.229.16:08:30.07#ibcon#about to read 6, iclass 19, count 2 2006.229.16:08:30.07#ibcon#read 6, iclass 19, count 2 2006.229.16:08:30.07#ibcon#end of sib2, iclass 19, count 2 2006.229.16:08:30.07#ibcon#*after write, iclass 19, count 2 2006.229.16:08:30.07#ibcon#*before return 0, iclass 19, count 2 2006.229.16:08:30.07#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:30.07#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:30.07#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.16:08:30.07#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:30.07#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:30.19#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:30.19#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:30.19#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:08:30.19#ibcon#first serial, iclass 19, count 0 2006.229.16:08:30.19#ibcon#enter sib2, iclass 19, count 0 2006.229.16:08:30.19#ibcon#flushed, iclass 19, count 0 2006.229.16:08:30.19#ibcon#about to write, iclass 19, count 0 2006.229.16:08:30.19#ibcon#wrote, iclass 19, count 0 2006.229.16:08:30.19#ibcon#about to read 3, iclass 19, count 0 2006.229.16:08:30.21#ibcon#read 3, iclass 19, count 0 2006.229.16:08:30.21#ibcon#about to read 4, iclass 19, count 0 2006.229.16:08:30.21#ibcon#read 4, iclass 19, count 0 2006.229.16:08:30.21#ibcon#about to read 5, iclass 19, count 0 2006.229.16:08:30.21#ibcon#read 5, iclass 19, count 0 2006.229.16:08:30.21#ibcon#about to read 6, iclass 19, count 0 2006.229.16:08:30.21#ibcon#read 6, iclass 19, count 0 2006.229.16:08:30.21#ibcon#end of sib2, iclass 19, count 0 2006.229.16:08:30.21#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:08:30.21#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:08:30.21#ibcon#[25=USB\r\n] 2006.229.16:08:30.21#ibcon#*before write, iclass 19, count 0 2006.229.16:08:30.21#ibcon#enter sib2, iclass 19, count 0 2006.229.16:08:30.21#ibcon#flushed, iclass 19, count 0 2006.229.16:08:30.21#ibcon#about to write, iclass 19, count 0 2006.229.16:08:30.21#ibcon#wrote, iclass 19, count 0 2006.229.16:08:30.21#ibcon#about to read 3, iclass 19, count 0 2006.229.16:08:30.24#ibcon#read 3, iclass 19, count 0 2006.229.16:08:30.24#ibcon#about to read 4, iclass 19, count 0 2006.229.16:08:30.24#ibcon#read 4, iclass 19, count 0 2006.229.16:08:30.24#ibcon#about to read 5, iclass 19, count 0 2006.229.16:08:30.24#ibcon#read 5, iclass 19, count 0 2006.229.16:08:30.24#ibcon#about to read 6, iclass 19, count 0 2006.229.16:08:30.24#ibcon#read 6, iclass 19, count 0 2006.229.16:08:30.24#ibcon#end of sib2, iclass 19, count 0 2006.229.16:08:30.24#ibcon#*after write, iclass 19, count 0 2006.229.16:08:30.24#ibcon#*before return 0, iclass 19, count 0 2006.229.16:08:30.24#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:30.24#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:30.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:08:30.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:08:30.24$vck44/valo=7,864.99 2006.229.16:08:30.24#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:08:30.24#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:08:30.24#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:30.24#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:30.24#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:30.24#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:30.24#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:08:30.24#ibcon#first serial, iclass 21, count 0 2006.229.16:08:30.24#ibcon#enter sib2, iclass 21, count 0 2006.229.16:08:30.24#ibcon#flushed, iclass 21, count 0 2006.229.16:08:30.24#ibcon#about to write, iclass 21, count 0 2006.229.16:08:30.24#ibcon#wrote, iclass 21, count 0 2006.229.16:08:30.24#ibcon#about to read 3, iclass 21, count 0 2006.229.16:08:30.26#ibcon#read 3, iclass 21, count 0 2006.229.16:08:30.26#ibcon#about to read 4, iclass 21, count 0 2006.229.16:08:30.26#ibcon#read 4, iclass 21, count 0 2006.229.16:08:30.26#ibcon#about to read 5, iclass 21, count 0 2006.229.16:08:30.26#ibcon#read 5, iclass 21, count 0 2006.229.16:08:30.26#ibcon#about to read 6, iclass 21, count 0 2006.229.16:08:30.26#ibcon#read 6, iclass 21, count 0 2006.229.16:08:30.26#ibcon#end of sib2, iclass 21, count 0 2006.229.16:08:30.26#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:08:30.26#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:08:30.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:08:30.26#ibcon#*before write, iclass 21, count 0 2006.229.16:08:30.26#ibcon#enter sib2, iclass 21, count 0 2006.229.16:08:30.26#ibcon#flushed, iclass 21, count 0 2006.229.16:08:30.26#ibcon#about to write, iclass 21, count 0 2006.229.16:08:30.26#ibcon#wrote, iclass 21, count 0 2006.229.16:08:30.26#ibcon#about to read 3, iclass 21, count 0 2006.229.16:08:30.30#ibcon#read 3, iclass 21, count 0 2006.229.16:08:30.30#ibcon#about to read 4, iclass 21, count 0 2006.229.16:08:30.30#ibcon#read 4, iclass 21, count 0 2006.229.16:08:30.30#ibcon#about to read 5, iclass 21, count 0 2006.229.16:08:30.30#ibcon#read 5, iclass 21, count 0 2006.229.16:08:30.30#ibcon#about to read 6, iclass 21, count 0 2006.229.16:08:30.30#ibcon#read 6, iclass 21, count 0 2006.229.16:08:30.30#ibcon#end of sib2, iclass 21, count 0 2006.229.16:08:30.30#ibcon#*after write, iclass 21, count 0 2006.229.16:08:30.30#ibcon#*before return 0, iclass 21, count 0 2006.229.16:08:30.30#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:30.30#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:30.30#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:08:30.30#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:08:30.30$vck44/va=7,5 2006.229.16:08:30.30#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.16:08:30.30#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.16:08:30.30#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:30.30#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:30.36#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:30.36#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:30.36#ibcon#enter wrdev, iclass 23, count 2 2006.229.16:08:30.36#ibcon#first serial, iclass 23, count 2 2006.229.16:08:30.36#ibcon#enter sib2, iclass 23, count 2 2006.229.16:08:30.36#ibcon#flushed, iclass 23, count 2 2006.229.16:08:30.36#ibcon#about to write, iclass 23, count 2 2006.229.16:08:30.36#ibcon#wrote, iclass 23, count 2 2006.229.16:08:30.36#ibcon#about to read 3, iclass 23, count 2 2006.229.16:08:30.38#ibcon#read 3, iclass 23, count 2 2006.229.16:08:30.38#ibcon#about to read 4, iclass 23, count 2 2006.229.16:08:30.38#ibcon#read 4, iclass 23, count 2 2006.229.16:08:30.38#ibcon#about to read 5, iclass 23, count 2 2006.229.16:08:30.38#ibcon#read 5, iclass 23, count 2 2006.229.16:08:30.38#ibcon#about to read 6, iclass 23, count 2 2006.229.16:08:30.38#ibcon#read 6, iclass 23, count 2 2006.229.16:08:30.38#ibcon#end of sib2, iclass 23, count 2 2006.229.16:08:30.38#ibcon#*mode == 0, iclass 23, count 2 2006.229.16:08:30.38#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.16:08:30.38#ibcon#[25=AT07-05\r\n] 2006.229.16:08:30.38#ibcon#*before write, iclass 23, count 2 2006.229.16:08:30.38#ibcon#enter sib2, iclass 23, count 2 2006.229.16:08:30.38#ibcon#flushed, iclass 23, count 2 2006.229.16:08:30.38#ibcon#about to write, iclass 23, count 2 2006.229.16:08:30.38#ibcon#wrote, iclass 23, count 2 2006.229.16:08:30.38#ibcon#about to read 3, iclass 23, count 2 2006.229.16:08:30.41#ibcon#read 3, iclass 23, count 2 2006.229.16:08:30.41#ibcon#about to read 4, iclass 23, count 2 2006.229.16:08:30.41#ibcon#read 4, iclass 23, count 2 2006.229.16:08:30.41#ibcon#about to read 5, iclass 23, count 2 2006.229.16:08:30.41#ibcon#read 5, iclass 23, count 2 2006.229.16:08:30.41#ibcon#about to read 6, iclass 23, count 2 2006.229.16:08:30.41#ibcon#read 6, iclass 23, count 2 2006.229.16:08:30.41#ibcon#end of sib2, iclass 23, count 2 2006.229.16:08:30.41#ibcon#*after write, iclass 23, count 2 2006.229.16:08:30.41#ibcon#*before return 0, iclass 23, count 2 2006.229.16:08:30.41#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:30.41#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:30.41#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.16:08:30.41#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:30.41#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:30.53#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:30.53#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:30.53#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:08:30.53#ibcon#first serial, iclass 23, count 0 2006.229.16:08:30.53#ibcon#enter sib2, iclass 23, count 0 2006.229.16:08:30.53#ibcon#flushed, iclass 23, count 0 2006.229.16:08:30.53#ibcon#about to write, iclass 23, count 0 2006.229.16:08:30.53#ibcon#wrote, iclass 23, count 0 2006.229.16:08:30.53#ibcon#about to read 3, iclass 23, count 0 2006.229.16:08:30.55#ibcon#read 3, iclass 23, count 0 2006.229.16:08:30.55#ibcon#about to read 4, iclass 23, count 0 2006.229.16:08:30.55#ibcon#read 4, iclass 23, count 0 2006.229.16:08:30.55#ibcon#about to read 5, iclass 23, count 0 2006.229.16:08:30.55#ibcon#read 5, iclass 23, count 0 2006.229.16:08:30.55#ibcon#about to read 6, iclass 23, count 0 2006.229.16:08:30.55#ibcon#read 6, iclass 23, count 0 2006.229.16:08:30.55#ibcon#end of sib2, iclass 23, count 0 2006.229.16:08:30.55#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:08:30.55#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:08:30.55#ibcon#[25=USB\r\n] 2006.229.16:08:30.55#ibcon#*before write, iclass 23, count 0 2006.229.16:08:30.55#ibcon#enter sib2, iclass 23, count 0 2006.229.16:08:30.55#ibcon#flushed, iclass 23, count 0 2006.229.16:08:30.55#ibcon#about to write, iclass 23, count 0 2006.229.16:08:30.55#ibcon#wrote, iclass 23, count 0 2006.229.16:08:30.55#ibcon#about to read 3, iclass 23, count 0 2006.229.16:08:30.58#ibcon#read 3, iclass 23, count 0 2006.229.16:08:30.58#ibcon#about to read 4, iclass 23, count 0 2006.229.16:08:30.58#ibcon#read 4, iclass 23, count 0 2006.229.16:08:30.58#ibcon#about to read 5, iclass 23, count 0 2006.229.16:08:30.58#ibcon#read 5, iclass 23, count 0 2006.229.16:08:30.58#ibcon#about to read 6, iclass 23, count 0 2006.229.16:08:30.58#ibcon#read 6, iclass 23, count 0 2006.229.16:08:30.58#ibcon#end of sib2, iclass 23, count 0 2006.229.16:08:30.58#ibcon#*after write, iclass 23, count 0 2006.229.16:08:30.58#ibcon#*before return 0, iclass 23, count 0 2006.229.16:08:30.58#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:30.58#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:30.58#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:08:30.58#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:08:30.58$vck44/valo=8,884.99 2006.229.16:08:30.58#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.16:08:30.58#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.16:08:30.58#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:30.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:30.58#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:30.58#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:30.58#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:08:30.58#ibcon#first serial, iclass 25, count 0 2006.229.16:08:30.58#ibcon#enter sib2, iclass 25, count 0 2006.229.16:08:30.58#ibcon#flushed, iclass 25, count 0 2006.229.16:08:30.58#ibcon#about to write, iclass 25, count 0 2006.229.16:08:30.58#ibcon#wrote, iclass 25, count 0 2006.229.16:08:30.58#ibcon#about to read 3, iclass 25, count 0 2006.229.16:08:30.60#ibcon#read 3, iclass 25, count 0 2006.229.16:08:30.60#ibcon#about to read 4, iclass 25, count 0 2006.229.16:08:30.60#ibcon#read 4, iclass 25, count 0 2006.229.16:08:30.60#ibcon#about to read 5, iclass 25, count 0 2006.229.16:08:30.60#ibcon#read 5, iclass 25, count 0 2006.229.16:08:30.60#ibcon#about to read 6, iclass 25, count 0 2006.229.16:08:30.60#ibcon#read 6, iclass 25, count 0 2006.229.16:08:30.60#ibcon#end of sib2, iclass 25, count 0 2006.229.16:08:30.60#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:08:30.60#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:08:30.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:08:30.60#ibcon#*before write, iclass 25, count 0 2006.229.16:08:30.60#ibcon#enter sib2, iclass 25, count 0 2006.229.16:08:30.60#ibcon#flushed, iclass 25, count 0 2006.229.16:08:30.60#ibcon#about to write, iclass 25, count 0 2006.229.16:08:30.60#ibcon#wrote, iclass 25, count 0 2006.229.16:08:30.60#ibcon#about to read 3, iclass 25, count 0 2006.229.16:08:30.64#ibcon#read 3, iclass 25, count 0 2006.229.16:08:30.64#ibcon#about to read 4, iclass 25, count 0 2006.229.16:08:30.64#ibcon#read 4, iclass 25, count 0 2006.229.16:08:30.64#ibcon#about to read 5, iclass 25, count 0 2006.229.16:08:30.64#ibcon#read 5, iclass 25, count 0 2006.229.16:08:30.64#ibcon#about to read 6, iclass 25, count 0 2006.229.16:08:30.64#ibcon#read 6, iclass 25, count 0 2006.229.16:08:30.64#ibcon#end of sib2, iclass 25, count 0 2006.229.16:08:30.64#ibcon#*after write, iclass 25, count 0 2006.229.16:08:30.64#ibcon#*before return 0, iclass 25, count 0 2006.229.16:08:30.64#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:30.64#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:30.64#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:08:30.64#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:08:30.64$vck44/va=8,6 2006.229.16:08:30.64#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.16:08:30.64#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.16:08:30.64#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:30.64#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:30.70#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:30.70#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:30.70#ibcon#enter wrdev, iclass 27, count 2 2006.229.16:08:30.70#ibcon#first serial, iclass 27, count 2 2006.229.16:08:30.70#ibcon#enter sib2, iclass 27, count 2 2006.229.16:08:30.70#ibcon#flushed, iclass 27, count 2 2006.229.16:08:30.70#ibcon#about to write, iclass 27, count 2 2006.229.16:08:30.70#ibcon#wrote, iclass 27, count 2 2006.229.16:08:30.70#ibcon#about to read 3, iclass 27, count 2 2006.229.16:08:30.72#ibcon#read 3, iclass 27, count 2 2006.229.16:08:30.72#ibcon#about to read 4, iclass 27, count 2 2006.229.16:08:30.72#ibcon#read 4, iclass 27, count 2 2006.229.16:08:30.72#ibcon#about to read 5, iclass 27, count 2 2006.229.16:08:30.72#ibcon#read 5, iclass 27, count 2 2006.229.16:08:30.72#ibcon#about to read 6, iclass 27, count 2 2006.229.16:08:30.72#ibcon#read 6, iclass 27, count 2 2006.229.16:08:30.72#ibcon#end of sib2, iclass 27, count 2 2006.229.16:08:30.72#ibcon#*mode == 0, iclass 27, count 2 2006.229.16:08:30.72#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.16:08:30.72#ibcon#[25=AT08-06\r\n] 2006.229.16:08:30.72#ibcon#*before write, iclass 27, count 2 2006.229.16:08:30.72#ibcon#enter sib2, iclass 27, count 2 2006.229.16:08:30.72#ibcon#flushed, iclass 27, count 2 2006.229.16:08:30.72#ibcon#about to write, iclass 27, count 2 2006.229.16:08:30.72#ibcon#wrote, iclass 27, count 2 2006.229.16:08:30.72#ibcon#about to read 3, iclass 27, count 2 2006.229.16:08:30.75#ibcon#read 3, iclass 27, count 2 2006.229.16:08:30.75#ibcon#about to read 4, iclass 27, count 2 2006.229.16:08:30.75#ibcon#read 4, iclass 27, count 2 2006.229.16:08:30.75#ibcon#about to read 5, iclass 27, count 2 2006.229.16:08:30.75#ibcon#read 5, iclass 27, count 2 2006.229.16:08:30.75#ibcon#about to read 6, iclass 27, count 2 2006.229.16:08:30.75#ibcon#read 6, iclass 27, count 2 2006.229.16:08:30.75#ibcon#end of sib2, iclass 27, count 2 2006.229.16:08:30.75#ibcon#*after write, iclass 27, count 2 2006.229.16:08:30.75#ibcon#*before return 0, iclass 27, count 2 2006.229.16:08:30.75#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:30.75#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:30.75#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.16:08:30.75#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:30.75#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:30.87#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:30.87#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:30.87#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:08:30.87#ibcon#first serial, iclass 27, count 0 2006.229.16:08:30.87#ibcon#enter sib2, iclass 27, count 0 2006.229.16:08:30.87#ibcon#flushed, iclass 27, count 0 2006.229.16:08:30.87#ibcon#about to write, iclass 27, count 0 2006.229.16:08:30.87#ibcon#wrote, iclass 27, count 0 2006.229.16:08:30.87#ibcon#about to read 3, iclass 27, count 0 2006.229.16:08:30.89#ibcon#read 3, iclass 27, count 0 2006.229.16:08:30.89#ibcon#about to read 4, iclass 27, count 0 2006.229.16:08:30.89#ibcon#read 4, iclass 27, count 0 2006.229.16:08:30.89#ibcon#about to read 5, iclass 27, count 0 2006.229.16:08:30.89#ibcon#read 5, iclass 27, count 0 2006.229.16:08:30.89#ibcon#about to read 6, iclass 27, count 0 2006.229.16:08:30.89#ibcon#read 6, iclass 27, count 0 2006.229.16:08:30.89#ibcon#end of sib2, iclass 27, count 0 2006.229.16:08:30.89#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:08:30.89#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:08:30.89#ibcon#[25=USB\r\n] 2006.229.16:08:30.89#ibcon#*before write, iclass 27, count 0 2006.229.16:08:30.89#ibcon#enter sib2, iclass 27, count 0 2006.229.16:08:30.89#ibcon#flushed, iclass 27, count 0 2006.229.16:08:30.89#ibcon#about to write, iclass 27, count 0 2006.229.16:08:30.89#ibcon#wrote, iclass 27, count 0 2006.229.16:08:30.89#ibcon#about to read 3, iclass 27, count 0 2006.229.16:08:30.92#ibcon#read 3, iclass 27, count 0 2006.229.16:08:30.92#ibcon#about to read 4, iclass 27, count 0 2006.229.16:08:30.92#ibcon#read 4, iclass 27, count 0 2006.229.16:08:30.92#ibcon#about to read 5, iclass 27, count 0 2006.229.16:08:30.92#ibcon#read 5, iclass 27, count 0 2006.229.16:08:30.92#ibcon#about to read 6, iclass 27, count 0 2006.229.16:08:30.92#ibcon#read 6, iclass 27, count 0 2006.229.16:08:30.92#ibcon#end of sib2, iclass 27, count 0 2006.229.16:08:30.92#ibcon#*after write, iclass 27, count 0 2006.229.16:08:30.92#ibcon#*before return 0, iclass 27, count 0 2006.229.16:08:30.92#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:30.92#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:30.92#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:08:30.92#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:08:30.92$vck44/vblo=1,629.99 2006.229.16:08:30.92#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.16:08:30.92#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.16:08:30.92#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:30.92#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:30.92#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:30.92#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:30.92#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:08:30.92#ibcon#first serial, iclass 29, count 0 2006.229.16:08:30.92#ibcon#enter sib2, iclass 29, count 0 2006.229.16:08:30.92#ibcon#flushed, iclass 29, count 0 2006.229.16:08:30.92#ibcon#about to write, iclass 29, count 0 2006.229.16:08:30.92#ibcon#wrote, iclass 29, count 0 2006.229.16:08:30.92#ibcon#about to read 3, iclass 29, count 0 2006.229.16:08:30.94#ibcon#read 3, iclass 29, count 0 2006.229.16:08:30.94#ibcon#about to read 4, iclass 29, count 0 2006.229.16:08:30.94#ibcon#read 4, iclass 29, count 0 2006.229.16:08:30.94#ibcon#about to read 5, iclass 29, count 0 2006.229.16:08:30.94#ibcon#read 5, iclass 29, count 0 2006.229.16:08:30.94#ibcon#about to read 6, iclass 29, count 0 2006.229.16:08:30.94#ibcon#read 6, iclass 29, count 0 2006.229.16:08:30.94#ibcon#end of sib2, iclass 29, count 0 2006.229.16:08:30.94#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:08:30.94#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:08:30.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:08:30.94#ibcon#*before write, iclass 29, count 0 2006.229.16:08:30.94#ibcon#enter sib2, iclass 29, count 0 2006.229.16:08:30.94#ibcon#flushed, iclass 29, count 0 2006.229.16:08:30.94#ibcon#about to write, iclass 29, count 0 2006.229.16:08:30.94#ibcon#wrote, iclass 29, count 0 2006.229.16:08:30.94#ibcon#about to read 3, iclass 29, count 0 2006.229.16:08:30.98#ibcon#read 3, iclass 29, count 0 2006.229.16:08:30.98#ibcon#about to read 4, iclass 29, count 0 2006.229.16:08:30.98#ibcon#read 4, iclass 29, count 0 2006.229.16:08:30.98#ibcon#about to read 5, iclass 29, count 0 2006.229.16:08:30.98#ibcon#read 5, iclass 29, count 0 2006.229.16:08:30.98#ibcon#about to read 6, iclass 29, count 0 2006.229.16:08:30.98#ibcon#read 6, iclass 29, count 0 2006.229.16:08:30.98#ibcon#end of sib2, iclass 29, count 0 2006.229.16:08:30.98#ibcon#*after write, iclass 29, count 0 2006.229.16:08:30.98#ibcon#*before return 0, iclass 29, count 0 2006.229.16:08:30.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:30.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:30.98#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:08:30.98#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:08:30.98$vck44/vb=1,4 2006.229.16:08:30.98#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.16:08:30.98#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.16:08:30.98#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:30.98#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:08:30.98#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:08:30.98#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:08:30.98#ibcon#enter wrdev, iclass 31, count 2 2006.229.16:08:30.98#ibcon#first serial, iclass 31, count 2 2006.229.16:08:30.98#ibcon#enter sib2, iclass 31, count 2 2006.229.16:08:30.98#ibcon#flushed, iclass 31, count 2 2006.229.16:08:30.98#ibcon#about to write, iclass 31, count 2 2006.229.16:08:30.98#ibcon#wrote, iclass 31, count 2 2006.229.16:08:30.98#ibcon#about to read 3, iclass 31, count 2 2006.229.16:08:31.00#ibcon#read 3, iclass 31, count 2 2006.229.16:08:31.00#ibcon#about to read 4, iclass 31, count 2 2006.229.16:08:31.00#ibcon#read 4, iclass 31, count 2 2006.229.16:08:31.00#ibcon#about to read 5, iclass 31, count 2 2006.229.16:08:31.00#ibcon#read 5, iclass 31, count 2 2006.229.16:08:31.00#ibcon#about to read 6, iclass 31, count 2 2006.229.16:08:31.00#ibcon#read 6, iclass 31, count 2 2006.229.16:08:31.00#ibcon#end of sib2, iclass 31, count 2 2006.229.16:08:31.00#ibcon#*mode == 0, iclass 31, count 2 2006.229.16:08:31.00#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.16:08:31.00#ibcon#[27=AT01-04\r\n] 2006.229.16:08:31.00#ibcon#*before write, iclass 31, count 2 2006.229.16:08:31.00#ibcon#enter sib2, iclass 31, count 2 2006.229.16:08:31.00#ibcon#flushed, iclass 31, count 2 2006.229.16:08:31.00#ibcon#about to write, iclass 31, count 2 2006.229.16:08:31.00#ibcon#wrote, iclass 31, count 2 2006.229.16:08:31.00#ibcon#about to read 3, iclass 31, count 2 2006.229.16:08:31.03#ibcon#read 3, iclass 31, count 2 2006.229.16:08:31.03#ibcon#about to read 4, iclass 31, count 2 2006.229.16:08:31.03#ibcon#read 4, iclass 31, count 2 2006.229.16:08:31.03#ibcon#about to read 5, iclass 31, count 2 2006.229.16:08:31.03#ibcon#read 5, iclass 31, count 2 2006.229.16:08:31.03#ibcon#about to read 6, iclass 31, count 2 2006.229.16:08:31.03#ibcon#read 6, iclass 31, count 2 2006.229.16:08:31.03#ibcon#end of sib2, iclass 31, count 2 2006.229.16:08:31.03#ibcon#*after write, iclass 31, count 2 2006.229.16:08:31.03#ibcon#*before return 0, iclass 31, count 2 2006.229.16:08:31.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:08:31.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:08:31.03#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.16:08:31.03#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:31.03#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:08:31.15#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:08:31.15#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:08:31.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:08:31.15#ibcon#first serial, iclass 31, count 0 2006.229.16:08:31.15#ibcon#enter sib2, iclass 31, count 0 2006.229.16:08:31.15#ibcon#flushed, iclass 31, count 0 2006.229.16:08:31.15#ibcon#about to write, iclass 31, count 0 2006.229.16:08:31.15#ibcon#wrote, iclass 31, count 0 2006.229.16:08:31.15#ibcon#about to read 3, iclass 31, count 0 2006.229.16:08:31.17#ibcon#read 3, iclass 31, count 0 2006.229.16:08:31.17#ibcon#about to read 4, iclass 31, count 0 2006.229.16:08:31.17#ibcon#read 4, iclass 31, count 0 2006.229.16:08:31.17#ibcon#about to read 5, iclass 31, count 0 2006.229.16:08:31.17#ibcon#read 5, iclass 31, count 0 2006.229.16:08:31.17#ibcon#about to read 6, iclass 31, count 0 2006.229.16:08:31.17#ibcon#read 6, iclass 31, count 0 2006.229.16:08:31.17#ibcon#end of sib2, iclass 31, count 0 2006.229.16:08:31.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:08:31.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:08:31.17#ibcon#[27=USB\r\n] 2006.229.16:08:31.17#ibcon#*before write, iclass 31, count 0 2006.229.16:08:31.17#ibcon#enter sib2, iclass 31, count 0 2006.229.16:08:31.17#ibcon#flushed, iclass 31, count 0 2006.229.16:08:31.17#ibcon#about to write, iclass 31, count 0 2006.229.16:08:31.17#ibcon#wrote, iclass 31, count 0 2006.229.16:08:31.17#ibcon#about to read 3, iclass 31, count 0 2006.229.16:08:31.20#ibcon#read 3, iclass 31, count 0 2006.229.16:08:31.20#ibcon#about to read 4, iclass 31, count 0 2006.229.16:08:31.20#ibcon#read 4, iclass 31, count 0 2006.229.16:08:31.20#ibcon#about to read 5, iclass 31, count 0 2006.229.16:08:31.20#ibcon#read 5, iclass 31, count 0 2006.229.16:08:31.20#ibcon#about to read 6, iclass 31, count 0 2006.229.16:08:31.20#ibcon#read 6, iclass 31, count 0 2006.229.16:08:31.20#ibcon#end of sib2, iclass 31, count 0 2006.229.16:08:31.20#ibcon#*after write, iclass 31, count 0 2006.229.16:08:31.20#ibcon#*before return 0, iclass 31, count 0 2006.229.16:08:31.20#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:08:31.20#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:08:31.20#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:08:31.20#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:08:31.20$vck44/vblo=2,634.99 2006.229.16:08:31.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:08:31.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:08:31.20#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:31.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:31.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:31.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:31.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:08:31.20#ibcon#first serial, iclass 33, count 0 2006.229.16:08:31.20#ibcon#enter sib2, iclass 33, count 0 2006.229.16:08:31.20#ibcon#flushed, iclass 33, count 0 2006.229.16:08:31.20#ibcon#about to write, iclass 33, count 0 2006.229.16:08:31.20#ibcon#wrote, iclass 33, count 0 2006.229.16:08:31.20#ibcon#about to read 3, iclass 33, count 0 2006.229.16:08:31.22#ibcon#read 3, iclass 33, count 0 2006.229.16:08:31.22#ibcon#about to read 4, iclass 33, count 0 2006.229.16:08:31.22#ibcon#read 4, iclass 33, count 0 2006.229.16:08:31.22#ibcon#about to read 5, iclass 33, count 0 2006.229.16:08:31.22#ibcon#read 5, iclass 33, count 0 2006.229.16:08:31.22#ibcon#about to read 6, iclass 33, count 0 2006.229.16:08:31.22#ibcon#read 6, iclass 33, count 0 2006.229.16:08:31.22#ibcon#end of sib2, iclass 33, count 0 2006.229.16:08:31.22#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:08:31.22#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:08:31.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:08:31.22#ibcon#*before write, iclass 33, count 0 2006.229.16:08:31.22#ibcon#enter sib2, iclass 33, count 0 2006.229.16:08:31.22#ibcon#flushed, iclass 33, count 0 2006.229.16:08:31.22#ibcon#about to write, iclass 33, count 0 2006.229.16:08:31.22#ibcon#wrote, iclass 33, count 0 2006.229.16:08:31.22#ibcon#about to read 3, iclass 33, count 0 2006.229.16:08:31.26#ibcon#read 3, iclass 33, count 0 2006.229.16:08:31.26#ibcon#about to read 4, iclass 33, count 0 2006.229.16:08:31.26#ibcon#read 4, iclass 33, count 0 2006.229.16:08:31.26#ibcon#about to read 5, iclass 33, count 0 2006.229.16:08:31.26#ibcon#read 5, iclass 33, count 0 2006.229.16:08:31.26#ibcon#about to read 6, iclass 33, count 0 2006.229.16:08:31.26#ibcon#read 6, iclass 33, count 0 2006.229.16:08:31.26#ibcon#end of sib2, iclass 33, count 0 2006.229.16:08:31.26#ibcon#*after write, iclass 33, count 0 2006.229.16:08:31.26#ibcon#*before return 0, iclass 33, count 0 2006.229.16:08:31.26#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:31.26#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:08:31.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:08:31.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:08:31.26$vck44/vb=2,4 2006.229.16:08:31.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:08:31.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:08:31.26#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:31.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:31.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:31.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:31.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:08:31.32#ibcon#first serial, iclass 35, count 2 2006.229.16:08:31.32#ibcon#enter sib2, iclass 35, count 2 2006.229.16:08:31.32#ibcon#flushed, iclass 35, count 2 2006.229.16:08:31.32#ibcon#about to write, iclass 35, count 2 2006.229.16:08:31.32#ibcon#wrote, iclass 35, count 2 2006.229.16:08:31.32#ibcon#about to read 3, iclass 35, count 2 2006.229.16:08:31.34#ibcon#read 3, iclass 35, count 2 2006.229.16:08:31.34#ibcon#about to read 4, iclass 35, count 2 2006.229.16:08:31.34#ibcon#read 4, iclass 35, count 2 2006.229.16:08:31.34#ibcon#about to read 5, iclass 35, count 2 2006.229.16:08:31.34#ibcon#read 5, iclass 35, count 2 2006.229.16:08:31.34#ibcon#about to read 6, iclass 35, count 2 2006.229.16:08:31.34#ibcon#read 6, iclass 35, count 2 2006.229.16:08:31.34#ibcon#end of sib2, iclass 35, count 2 2006.229.16:08:31.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:08:31.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:08:31.34#ibcon#[27=AT02-04\r\n] 2006.229.16:08:31.34#ibcon#*before write, iclass 35, count 2 2006.229.16:08:31.34#ibcon#enter sib2, iclass 35, count 2 2006.229.16:08:31.34#ibcon#flushed, iclass 35, count 2 2006.229.16:08:31.34#ibcon#about to write, iclass 35, count 2 2006.229.16:08:31.34#ibcon#wrote, iclass 35, count 2 2006.229.16:08:31.34#ibcon#about to read 3, iclass 35, count 2 2006.229.16:08:31.37#ibcon#read 3, iclass 35, count 2 2006.229.16:08:31.37#ibcon#about to read 4, iclass 35, count 2 2006.229.16:08:31.37#ibcon#read 4, iclass 35, count 2 2006.229.16:08:31.37#ibcon#about to read 5, iclass 35, count 2 2006.229.16:08:31.37#ibcon#read 5, iclass 35, count 2 2006.229.16:08:31.37#ibcon#about to read 6, iclass 35, count 2 2006.229.16:08:31.37#ibcon#read 6, iclass 35, count 2 2006.229.16:08:31.37#ibcon#end of sib2, iclass 35, count 2 2006.229.16:08:31.37#ibcon#*after write, iclass 35, count 2 2006.229.16:08:31.37#ibcon#*before return 0, iclass 35, count 2 2006.229.16:08:31.39#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:31.39#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:08:31.39#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:08:31.39#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:31.39#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:31.50#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:31.50#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:31.50#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:08:31.50#ibcon#first serial, iclass 35, count 0 2006.229.16:08:31.50#ibcon#enter sib2, iclass 35, count 0 2006.229.16:08:31.50#ibcon#flushed, iclass 35, count 0 2006.229.16:08:31.50#ibcon#about to write, iclass 35, count 0 2006.229.16:08:31.50#ibcon#wrote, iclass 35, count 0 2006.229.16:08:31.50#ibcon#about to read 3, iclass 35, count 0 2006.229.16:08:31.52#ibcon#read 3, iclass 35, count 0 2006.229.16:08:31.52#ibcon#about to read 4, iclass 35, count 0 2006.229.16:08:31.52#ibcon#read 4, iclass 35, count 0 2006.229.16:08:31.52#ibcon#about to read 5, iclass 35, count 0 2006.229.16:08:31.52#ibcon#read 5, iclass 35, count 0 2006.229.16:08:31.52#ibcon#about to read 6, iclass 35, count 0 2006.229.16:08:31.52#ibcon#read 6, iclass 35, count 0 2006.229.16:08:31.52#ibcon#end of sib2, iclass 35, count 0 2006.229.16:08:31.52#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:08:31.52#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:08:31.52#ibcon#[27=USB\r\n] 2006.229.16:08:31.52#ibcon#*before write, iclass 35, count 0 2006.229.16:08:31.52#ibcon#enter sib2, iclass 35, count 0 2006.229.16:08:31.52#ibcon#flushed, iclass 35, count 0 2006.229.16:08:31.52#ibcon#about to write, iclass 35, count 0 2006.229.16:08:31.52#ibcon#wrote, iclass 35, count 0 2006.229.16:08:31.52#ibcon#about to read 3, iclass 35, count 0 2006.229.16:08:31.55#ibcon#read 3, iclass 35, count 0 2006.229.16:08:31.55#ibcon#about to read 4, iclass 35, count 0 2006.229.16:08:31.55#ibcon#read 4, iclass 35, count 0 2006.229.16:08:31.55#ibcon#about to read 5, iclass 35, count 0 2006.229.16:08:31.55#ibcon#read 5, iclass 35, count 0 2006.229.16:08:31.55#ibcon#about to read 6, iclass 35, count 0 2006.229.16:08:31.55#ibcon#read 6, iclass 35, count 0 2006.229.16:08:31.55#ibcon#end of sib2, iclass 35, count 0 2006.229.16:08:31.55#ibcon#*after write, iclass 35, count 0 2006.229.16:08:31.55#ibcon#*before return 0, iclass 35, count 0 2006.229.16:08:31.55#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:31.55#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:08:31.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:08:31.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:08:31.55$vck44/vblo=3,649.99 2006.229.16:08:31.55#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.16:08:31.55#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.16:08:31.55#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:31.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:31.55#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:31.55#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:31.55#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:08:31.55#ibcon#first serial, iclass 37, count 0 2006.229.16:08:31.55#ibcon#enter sib2, iclass 37, count 0 2006.229.16:08:31.55#ibcon#flushed, iclass 37, count 0 2006.229.16:08:31.55#ibcon#about to write, iclass 37, count 0 2006.229.16:08:31.55#ibcon#wrote, iclass 37, count 0 2006.229.16:08:31.55#ibcon#about to read 3, iclass 37, count 0 2006.229.16:08:31.57#ibcon#read 3, iclass 37, count 0 2006.229.16:08:31.57#ibcon#about to read 4, iclass 37, count 0 2006.229.16:08:31.57#ibcon#read 4, iclass 37, count 0 2006.229.16:08:31.57#ibcon#about to read 5, iclass 37, count 0 2006.229.16:08:31.57#ibcon#read 5, iclass 37, count 0 2006.229.16:08:31.57#ibcon#about to read 6, iclass 37, count 0 2006.229.16:08:31.57#ibcon#read 6, iclass 37, count 0 2006.229.16:08:31.57#ibcon#end of sib2, iclass 37, count 0 2006.229.16:08:31.57#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:08:31.57#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:08:31.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:08:31.57#ibcon#*before write, iclass 37, count 0 2006.229.16:08:31.57#ibcon#enter sib2, iclass 37, count 0 2006.229.16:08:31.57#ibcon#flushed, iclass 37, count 0 2006.229.16:08:31.57#ibcon#about to write, iclass 37, count 0 2006.229.16:08:31.57#ibcon#wrote, iclass 37, count 0 2006.229.16:08:31.57#ibcon#about to read 3, iclass 37, count 0 2006.229.16:08:31.61#ibcon#read 3, iclass 37, count 0 2006.229.16:08:31.61#ibcon#about to read 4, iclass 37, count 0 2006.229.16:08:31.61#ibcon#read 4, iclass 37, count 0 2006.229.16:08:31.61#ibcon#about to read 5, iclass 37, count 0 2006.229.16:08:31.61#ibcon#read 5, iclass 37, count 0 2006.229.16:08:31.61#ibcon#about to read 6, iclass 37, count 0 2006.229.16:08:31.61#ibcon#read 6, iclass 37, count 0 2006.229.16:08:31.61#ibcon#end of sib2, iclass 37, count 0 2006.229.16:08:31.61#ibcon#*after write, iclass 37, count 0 2006.229.16:08:31.61#ibcon#*before return 0, iclass 37, count 0 2006.229.16:08:31.61#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:31.61#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:08:31.61#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:08:31.61#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:08:31.61$vck44/vb=3,4 2006.229.16:08:31.61#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.16:08:31.61#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.16:08:31.61#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:31.61#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:31.67#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:31.67#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:31.67#ibcon#enter wrdev, iclass 39, count 2 2006.229.16:08:31.67#ibcon#first serial, iclass 39, count 2 2006.229.16:08:31.67#ibcon#enter sib2, iclass 39, count 2 2006.229.16:08:31.67#ibcon#flushed, iclass 39, count 2 2006.229.16:08:31.67#ibcon#about to write, iclass 39, count 2 2006.229.16:08:31.67#ibcon#wrote, iclass 39, count 2 2006.229.16:08:31.67#ibcon#about to read 3, iclass 39, count 2 2006.229.16:08:31.69#ibcon#read 3, iclass 39, count 2 2006.229.16:08:31.69#ibcon#about to read 4, iclass 39, count 2 2006.229.16:08:31.69#ibcon#read 4, iclass 39, count 2 2006.229.16:08:31.69#ibcon#about to read 5, iclass 39, count 2 2006.229.16:08:31.69#ibcon#read 5, iclass 39, count 2 2006.229.16:08:31.69#ibcon#about to read 6, iclass 39, count 2 2006.229.16:08:31.69#ibcon#read 6, iclass 39, count 2 2006.229.16:08:31.69#ibcon#end of sib2, iclass 39, count 2 2006.229.16:08:31.69#ibcon#*mode == 0, iclass 39, count 2 2006.229.16:08:31.69#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.16:08:31.69#ibcon#[27=AT03-04\r\n] 2006.229.16:08:31.69#ibcon#*before write, iclass 39, count 2 2006.229.16:08:31.69#ibcon#enter sib2, iclass 39, count 2 2006.229.16:08:31.69#ibcon#flushed, iclass 39, count 2 2006.229.16:08:31.69#ibcon#about to write, iclass 39, count 2 2006.229.16:08:31.69#ibcon#wrote, iclass 39, count 2 2006.229.16:08:31.69#ibcon#about to read 3, iclass 39, count 2 2006.229.16:08:31.72#ibcon#read 3, iclass 39, count 2 2006.229.16:08:31.72#ibcon#about to read 4, iclass 39, count 2 2006.229.16:08:31.72#ibcon#read 4, iclass 39, count 2 2006.229.16:08:31.72#ibcon#about to read 5, iclass 39, count 2 2006.229.16:08:31.72#ibcon#read 5, iclass 39, count 2 2006.229.16:08:31.72#ibcon#about to read 6, iclass 39, count 2 2006.229.16:08:31.72#ibcon#read 6, iclass 39, count 2 2006.229.16:08:31.72#ibcon#end of sib2, iclass 39, count 2 2006.229.16:08:31.72#ibcon#*after write, iclass 39, count 2 2006.229.16:08:31.72#ibcon#*before return 0, iclass 39, count 2 2006.229.16:08:31.72#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:31.72#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:08:31.72#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.16:08:31.72#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:31.72#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:31.77#abcon#<5=/06 1.4 2.2 27.201001001.9\r\n> 2006.229.16:08:31.79#abcon#{5=INTERFACE CLEAR} 2006.229.16:08:31.84#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:31.84#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:31.84#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:08:31.84#ibcon#first serial, iclass 39, count 0 2006.229.16:08:31.84#ibcon#enter sib2, iclass 39, count 0 2006.229.16:08:31.84#ibcon#flushed, iclass 39, count 0 2006.229.16:08:31.84#ibcon#about to write, iclass 39, count 0 2006.229.16:08:31.84#ibcon#wrote, iclass 39, count 0 2006.229.16:08:31.84#ibcon#about to read 3, iclass 39, count 0 2006.229.16:08:31.85#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:08:31.86#ibcon#read 3, iclass 39, count 0 2006.229.16:08:31.86#ibcon#about to read 4, iclass 39, count 0 2006.229.16:08:31.86#ibcon#read 4, iclass 39, count 0 2006.229.16:08:31.86#ibcon#about to read 5, iclass 39, count 0 2006.229.16:08:31.86#ibcon#read 5, iclass 39, count 0 2006.229.16:08:31.86#ibcon#about to read 6, iclass 39, count 0 2006.229.16:08:31.86#ibcon#read 6, iclass 39, count 0 2006.229.16:08:31.86#ibcon#end of sib2, iclass 39, count 0 2006.229.16:08:31.86#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:08:31.86#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:08:31.86#ibcon#[27=USB\r\n] 2006.229.16:08:31.86#ibcon#*before write, iclass 39, count 0 2006.229.16:08:31.86#ibcon#enter sib2, iclass 39, count 0 2006.229.16:08:31.86#ibcon#flushed, iclass 39, count 0 2006.229.16:08:31.86#ibcon#about to write, iclass 39, count 0 2006.229.16:08:31.86#ibcon#wrote, iclass 39, count 0 2006.229.16:08:31.86#ibcon#about to read 3, iclass 39, count 0 2006.229.16:08:31.89#ibcon#read 3, iclass 39, count 0 2006.229.16:08:31.89#ibcon#about to read 4, iclass 39, count 0 2006.229.16:08:31.89#ibcon#read 4, iclass 39, count 0 2006.229.16:08:31.89#ibcon#about to read 5, iclass 39, count 0 2006.229.16:08:31.89#ibcon#read 5, iclass 39, count 0 2006.229.16:08:31.89#ibcon#about to read 6, iclass 39, count 0 2006.229.16:08:31.89#ibcon#read 6, iclass 39, count 0 2006.229.16:08:31.89#ibcon#end of sib2, iclass 39, count 0 2006.229.16:08:31.89#ibcon#*after write, iclass 39, count 0 2006.229.16:08:31.89#ibcon#*before return 0, iclass 39, count 0 2006.229.16:08:31.89#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:31.89#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:08:31.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:08:31.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:08:31.89$vck44/vblo=4,679.99 2006.229.16:08:31.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.16:08:31.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.16:08:31.89#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:31.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:31.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:31.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:31.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:08:31.89#ibcon#first serial, iclass 7, count 0 2006.229.16:08:31.89#ibcon#enter sib2, iclass 7, count 0 2006.229.16:08:31.89#ibcon#flushed, iclass 7, count 0 2006.229.16:08:31.89#ibcon#about to write, iclass 7, count 0 2006.229.16:08:31.89#ibcon#wrote, iclass 7, count 0 2006.229.16:08:31.89#ibcon#about to read 3, iclass 7, count 0 2006.229.16:08:31.91#ibcon#read 3, iclass 7, count 0 2006.229.16:08:31.91#ibcon#about to read 4, iclass 7, count 0 2006.229.16:08:31.91#ibcon#read 4, iclass 7, count 0 2006.229.16:08:31.91#ibcon#about to read 5, iclass 7, count 0 2006.229.16:08:31.91#ibcon#read 5, iclass 7, count 0 2006.229.16:08:31.91#ibcon#about to read 6, iclass 7, count 0 2006.229.16:08:31.91#ibcon#read 6, iclass 7, count 0 2006.229.16:08:31.91#ibcon#end of sib2, iclass 7, count 0 2006.229.16:08:31.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:08:31.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:08:31.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:08:31.91#ibcon#*before write, iclass 7, count 0 2006.229.16:08:31.91#ibcon#enter sib2, iclass 7, count 0 2006.229.16:08:31.91#ibcon#flushed, iclass 7, count 0 2006.229.16:08:31.91#ibcon#about to write, iclass 7, count 0 2006.229.16:08:31.91#ibcon#wrote, iclass 7, count 0 2006.229.16:08:31.91#ibcon#about to read 3, iclass 7, count 0 2006.229.16:08:31.95#ibcon#read 3, iclass 7, count 0 2006.229.16:08:31.95#ibcon#about to read 4, iclass 7, count 0 2006.229.16:08:31.95#ibcon#read 4, iclass 7, count 0 2006.229.16:08:31.95#ibcon#about to read 5, iclass 7, count 0 2006.229.16:08:31.95#ibcon#read 5, iclass 7, count 0 2006.229.16:08:31.95#ibcon#about to read 6, iclass 7, count 0 2006.229.16:08:31.95#ibcon#read 6, iclass 7, count 0 2006.229.16:08:31.95#ibcon#end of sib2, iclass 7, count 0 2006.229.16:08:31.95#ibcon#*after write, iclass 7, count 0 2006.229.16:08:31.95#ibcon#*before return 0, iclass 7, count 0 2006.229.16:08:31.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:31.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:08:31.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:08:31.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:08:31.95$vck44/vb=4,4 2006.229.16:08:31.95#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.16:08:31.95#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.16:08:31.95#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:31.95#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:32.01#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:32.01#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:32.01#ibcon#enter wrdev, iclass 11, count 2 2006.229.16:08:32.01#ibcon#first serial, iclass 11, count 2 2006.229.16:08:32.01#ibcon#enter sib2, iclass 11, count 2 2006.229.16:08:32.01#ibcon#flushed, iclass 11, count 2 2006.229.16:08:32.01#ibcon#about to write, iclass 11, count 2 2006.229.16:08:32.01#ibcon#wrote, iclass 11, count 2 2006.229.16:08:32.01#ibcon#about to read 3, iclass 11, count 2 2006.229.16:08:32.03#ibcon#read 3, iclass 11, count 2 2006.229.16:08:32.03#ibcon#about to read 4, iclass 11, count 2 2006.229.16:08:32.03#ibcon#read 4, iclass 11, count 2 2006.229.16:08:32.03#ibcon#about to read 5, iclass 11, count 2 2006.229.16:08:32.03#ibcon#read 5, iclass 11, count 2 2006.229.16:08:32.03#ibcon#about to read 6, iclass 11, count 2 2006.229.16:08:32.03#ibcon#read 6, iclass 11, count 2 2006.229.16:08:32.03#ibcon#end of sib2, iclass 11, count 2 2006.229.16:08:32.03#ibcon#*mode == 0, iclass 11, count 2 2006.229.16:08:32.03#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.16:08:32.03#ibcon#[27=AT04-04\r\n] 2006.229.16:08:32.03#ibcon#*before write, iclass 11, count 2 2006.229.16:08:32.03#ibcon#enter sib2, iclass 11, count 2 2006.229.16:08:32.03#ibcon#flushed, iclass 11, count 2 2006.229.16:08:32.03#ibcon#about to write, iclass 11, count 2 2006.229.16:08:32.03#ibcon#wrote, iclass 11, count 2 2006.229.16:08:32.03#ibcon#about to read 3, iclass 11, count 2 2006.229.16:08:32.06#ibcon#read 3, iclass 11, count 2 2006.229.16:08:32.06#ibcon#about to read 4, iclass 11, count 2 2006.229.16:08:32.06#ibcon#read 4, iclass 11, count 2 2006.229.16:08:32.06#ibcon#about to read 5, iclass 11, count 2 2006.229.16:08:32.06#ibcon#read 5, iclass 11, count 2 2006.229.16:08:32.06#ibcon#about to read 6, iclass 11, count 2 2006.229.16:08:32.06#ibcon#read 6, iclass 11, count 2 2006.229.16:08:32.06#ibcon#end of sib2, iclass 11, count 2 2006.229.16:08:32.06#ibcon#*after write, iclass 11, count 2 2006.229.16:08:32.06#ibcon#*before return 0, iclass 11, count 2 2006.229.16:08:32.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:32.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:08:32.06#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.16:08:32.06#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:32.06#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:32.18#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:32.18#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:32.18#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:08:32.18#ibcon#first serial, iclass 11, count 0 2006.229.16:08:32.18#ibcon#enter sib2, iclass 11, count 0 2006.229.16:08:32.18#ibcon#flushed, iclass 11, count 0 2006.229.16:08:32.18#ibcon#about to write, iclass 11, count 0 2006.229.16:08:32.18#ibcon#wrote, iclass 11, count 0 2006.229.16:08:32.18#ibcon#about to read 3, iclass 11, count 0 2006.229.16:08:32.20#ibcon#read 3, iclass 11, count 0 2006.229.16:08:32.20#ibcon#about to read 4, iclass 11, count 0 2006.229.16:08:32.20#ibcon#read 4, iclass 11, count 0 2006.229.16:08:32.20#ibcon#about to read 5, iclass 11, count 0 2006.229.16:08:32.20#ibcon#read 5, iclass 11, count 0 2006.229.16:08:32.20#ibcon#about to read 6, iclass 11, count 0 2006.229.16:08:32.20#ibcon#read 6, iclass 11, count 0 2006.229.16:08:32.20#ibcon#end of sib2, iclass 11, count 0 2006.229.16:08:32.20#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:08:32.20#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:08:32.20#ibcon#[27=USB\r\n] 2006.229.16:08:32.20#ibcon#*before write, iclass 11, count 0 2006.229.16:08:32.20#ibcon#enter sib2, iclass 11, count 0 2006.229.16:08:32.20#ibcon#flushed, iclass 11, count 0 2006.229.16:08:32.20#ibcon#about to write, iclass 11, count 0 2006.229.16:08:32.20#ibcon#wrote, iclass 11, count 0 2006.229.16:08:32.20#ibcon#about to read 3, iclass 11, count 0 2006.229.16:08:32.23#ibcon#read 3, iclass 11, count 0 2006.229.16:08:32.23#ibcon#about to read 4, iclass 11, count 0 2006.229.16:08:32.23#ibcon#read 4, iclass 11, count 0 2006.229.16:08:32.23#ibcon#about to read 5, iclass 11, count 0 2006.229.16:08:32.23#ibcon#read 5, iclass 11, count 0 2006.229.16:08:32.23#ibcon#about to read 6, iclass 11, count 0 2006.229.16:08:32.23#ibcon#read 6, iclass 11, count 0 2006.229.16:08:32.23#ibcon#end of sib2, iclass 11, count 0 2006.229.16:08:32.23#ibcon#*after write, iclass 11, count 0 2006.229.16:08:32.23#ibcon#*before return 0, iclass 11, count 0 2006.229.16:08:32.23#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:32.23#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:08:32.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:08:32.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:08:32.23$vck44/vblo=5,709.99 2006.229.16:08:32.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.16:08:32.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.16:08:32.23#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:32.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:32.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:32.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:32.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:08:32.23#ibcon#first serial, iclass 13, count 0 2006.229.16:08:32.23#ibcon#enter sib2, iclass 13, count 0 2006.229.16:08:32.23#ibcon#flushed, iclass 13, count 0 2006.229.16:08:32.23#ibcon#about to write, iclass 13, count 0 2006.229.16:08:32.23#ibcon#wrote, iclass 13, count 0 2006.229.16:08:32.23#ibcon#about to read 3, iclass 13, count 0 2006.229.16:08:32.25#ibcon#read 3, iclass 13, count 0 2006.229.16:08:32.25#ibcon#about to read 4, iclass 13, count 0 2006.229.16:08:32.25#ibcon#read 4, iclass 13, count 0 2006.229.16:08:32.25#ibcon#about to read 5, iclass 13, count 0 2006.229.16:08:32.25#ibcon#read 5, iclass 13, count 0 2006.229.16:08:32.25#ibcon#about to read 6, iclass 13, count 0 2006.229.16:08:32.25#ibcon#read 6, iclass 13, count 0 2006.229.16:08:32.25#ibcon#end of sib2, iclass 13, count 0 2006.229.16:08:32.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:08:32.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:08:32.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:08:32.25#ibcon#*before write, iclass 13, count 0 2006.229.16:08:32.25#ibcon#enter sib2, iclass 13, count 0 2006.229.16:08:32.25#ibcon#flushed, iclass 13, count 0 2006.229.16:08:32.25#ibcon#about to write, iclass 13, count 0 2006.229.16:08:32.25#ibcon#wrote, iclass 13, count 0 2006.229.16:08:32.25#ibcon#about to read 3, iclass 13, count 0 2006.229.16:08:32.29#ibcon#read 3, iclass 13, count 0 2006.229.16:08:32.29#ibcon#about to read 4, iclass 13, count 0 2006.229.16:08:32.29#ibcon#read 4, iclass 13, count 0 2006.229.16:08:32.29#ibcon#about to read 5, iclass 13, count 0 2006.229.16:08:32.29#ibcon#read 5, iclass 13, count 0 2006.229.16:08:32.29#ibcon#about to read 6, iclass 13, count 0 2006.229.16:08:32.29#ibcon#read 6, iclass 13, count 0 2006.229.16:08:32.29#ibcon#end of sib2, iclass 13, count 0 2006.229.16:08:32.29#ibcon#*after write, iclass 13, count 0 2006.229.16:08:32.29#ibcon#*before return 0, iclass 13, count 0 2006.229.16:08:32.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:32.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:08:32.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:08:32.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:08:32.29$vck44/vb=5,4 2006.229.16:08:32.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.16:08:32.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.16:08:32.29#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:32.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:32.35#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:32.35#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:32.35#ibcon#enter wrdev, iclass 15, count 2 2006.229.16:08:32.35#ibcon#first serial, iclass 15, count 2 2006.229.16:08:32.35#ibcon#enter sib2, iclass 15, count 2 2006.229.16:08:32.35#ibcon#flushed, iclass 15, count 2 2006.229.16:08:32.35#ibcon#about to write, iclass 15, count 2 2006.229.16:08:32.35#ibcon#wrote, iclass 15, count 2 2006.229.16:08:32.35#ibcon#about to read 3, iclass 15, count 2 2006.229.16:08:32.37#ibcon#read 3, iclass 15, count 2 2006.229.16:08:32.37#ibcon#about to read 4, iclass 15, count 2 2006.229.16:08:32.37#ibcon#read 4, iclass 15, count 2 2006.229.16:08:32.37#ibcon#about to read 5, iclass 15, count 2 2006.229.16:08:32.37#ibcon#read 5, iclass 15, count 2 2006.229.16:08:32.37#ibcon#about to read 6, iclass 15, count 2 2006.229.16:08:32.37#ibcon#read 6, iclass 15, count 2 2006.229.16:08:32.37#ibcon#end of sib2, iclass 15, count 2 2006.229.16:08:32.37#ibcon#*mode == 0, iclass 15, count 2 2006.229.16:08:32.37#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.16:08:32.37#ibcon#[27=AT05-04\r\n] 2006.229.16:08:32.37#ibcon#*before write, iclass 15, count 2 2006.229.16:08:32.37#ibcon#enter sib2, iclass 15, count 2 2006.229.16:08:32.37#ibcon#flushed, iclass 15, count 2 2006.229.16:08:32.37#ibcon#about to write, iclass 15, count 2 2006.229.16:08:32.37#ibcon#wrote, iclass 15, count 2 2006.229.16:08:32.37#ibcon#about to read 3, iclass 15, count 2 2006.229.16:08:32.40#ibcon#read 3, iclass 15, count 2 2006.229.16:08:32.40#ibcon#about to read 4, iclass 15, count 2 2006.229.16:08:32.40#ibcon#read 4, iclass 15, count 2 2006.229.16:08:32.40#ibcon#about to read 5, iclass 15, count 2 2006.229.16:08:32.40#ibcon#read 5, iclass 15, count 2 2006.229.16:08:32.40#ibcon#about to read 6, iclass 15, count 2 2006.229.16:08:32.40#ibcon#read 6, iclass 15, count 2 2006.229.16:08:32.40#ibcon#end of sib2, iclass 15, count 2 2006.229.16:08:32.40#ibcon#*after write, iclass 15, count 2 2006.229.16:08:32.40#ibcon#*before return 0, iclass 15, count 2 2006.229.16:08:32.40#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:32.40#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:08:32.40#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.16:08:32.40#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:32.40#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:32.52#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:32.52#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:32.52#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:08:32.52#ibcon#first serial, iclass 15, count 0 2006.229.16:08:32.52#ibcon#enter sib2, iclass 15, count 0 2006.229.16:08:32.52#ibcon#flushed, iclass 15, count 0 2006.229.16:08:32.52#ibcon#about to write, iclass 15, count 0 2006.229.16:08:32.52#ibcon#wrote, iclass 15, count 0 2006.229.16:08:32.52#ibcon#about to read 3, iclass 15, count 0 2006.229.16:08:32.54#ibcon#read 3, iclass 15, count 0 2006.229.16:08:32.54#ibcon#about to read 4, iclass 15, count 0 2006.229.16:08:32.54#ibcon#read 4, iclass 15, count 0 2006.229.16:08:32.54#ibcon#about to read 5, iclass 15, count 0 2006.229.16:08:32.54#ibcon#read 5, iclass 15, count 0 2006.229.16:08:32.54#ibcon#about to read 6, iclass 15, count 0 2006.229.16:08:32.54#ibcon#read 6, iclass 15, count 0 2006.229.16:08:32.54#ibcon#end of sib2, iclass 15, count 0 2006.229.16:08:32.54#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:08:32.54#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:08:32.54#ibcon#[27=USB\r\n] 2006.229.16:08:32.54#ibcon#*before write, iclass 15, count 0 2006.229.16:08:32.54#ibcon#enter sib2, iclass 15, count 0 2006.229.16:08:32.54#ibcon#flushed, iclass 15, count 0 2006.229.16:08:32.54#ibcon#about to write, iclass 15, count 0 2006.229.16:08:32.54#ibcon#wrote, iclass 15, count 0 2006.229.16:08:32.54#ibcon#about to read 3, iclass 15, count 0 2006.229.16:08:32.57#ibcon#read 3, iclass 15, count 0 2006.229.16:08:32.57#ibcon#about to read 4, iclass 15, count 0 2006.229.16:08:32.57#ibcon#read 4, iclass 15, count 0 2006.229.16:08:32.57#ibcon#about to read 5, iclass 15, count 0 2006.229.16:08:32.57#ibcon#read 5, iclass 15, count 0 2006.229.16:08:32.57#ibcon#about to read 6, iclass 15, count 0 2006.229.16:08:32.57#ibcon#read 6, iclass 15, count 0 2006.229.16:08:32.57#ibcon#end of sib2, iclass 15, count 0 2006.229.16:08:32.57#ibcon#*after write, iclass 15, count 0 2006.229.16:08:32.57#ibcon#*before return 0, iclass 15, count 0 2006.229.16:08:32.57#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:32.57#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:08:32.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:08:32.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:08:32.57$vck44/vblo=6,719.99 2006.229.16:08:32.57#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.16:08:32.57#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.16:08:32.57#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:32.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:32.57#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:32.57#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:32.57#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:08:32.57#ibcon#first serial, iclass 17, count 0 2006.229.16:08:32.57#ibcon#enter sib2, iclass 17, count 0 2006.229.16:08:32.57#ibcon#flushed, iclass 17, count 0 2006.229.16:08:32.57#ibcon#about to write, iclass 17, count 0 2006.229.16:08:32.57#ibcon#wrote, iclass 17, count 0 2006.229.16:08:32.57#ibcon#about to read 3, iclass 17, count 0 2006.229.16:08:32.59#ibcon#read 3, iclass 17, count 0 2006.229.16:08:32.59#ibcon#about to read 4, iclass 17, count 0 2006.229.16:08:32.59#ibcon#read 4, iclass 17, count 0 2006.229.16:08:32.59#ibcon#about to read 5, iclass 17, count 0 2006.229.16:08:32.59#ibcon#read 5, iclass 17, count 0 2006.229.16:08:32.59#ibcon#about to read 6, iclass 17, count 0 2006.229.16:08:32.59#ibcon#read 6, iclass 17, count 0 2006.229.16:08:32.59#ibcon#end of sib2, iclass 17, count 0 2006.229.16:08:32.59#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:08:32.59#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:08:32.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:08:32.59#ibcon#*before write, iclass 17, count 0 2006.229.16:08:32.59#ibcon#enter sib2, iclass 17, count 0 2006.229.16:08:32.59#ibcon#flushed, iclass 17, count 0 2006.229.16:08:32.59#ibcon#about to write, iclass 17, count 0 2006.229.16:08:32.59#ibcon#wrote, iclass 17, count 0 2006.229.16:08:32.59#ibcon#about to read 3, iclass 17, count 0 2006.229.16:08:32.63#ibcon#read 3, iclass 17, count 0 2006.229.16:08:32.63#ibcon#about to read 4, iclass 17, count 0 2006.229.16:08:32.63#ibcon#read 4, iclass 17, count 0 2006.229.16:08:32.63#ibcon#about to read 5, iclass 17, count 0 2006.229.16:08:32.63#ibcon#read 5, iclass 17, count 0 2006.229.16:08:32.63#ibcon#about to read 6, iclass 17, count 0 2006.229.16:08:32.63#ibcon#read 6, iclass 17, count 0 2006.229.16:08:32.63#ibcon#end of sib2, iclass 17, count 0 2006.229.16:08:32.63#ibcon#*after write, iclass 17, count 0 2006.229.16:08:32.63#ibcon#*before return 0, iclass 17, count 0 2006.229.16:08:32.63#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:32.63#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:08:32.63#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:08:32.63#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:08:32.63$vck44/vb=6,4 2006.229.16:08:32.63#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.16:08:32.63#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.16:08:32.63#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:32.63#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:32.69#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:32.69#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:32.69#ibcon#enter wrdev, iclass 19, count 2 2006.229.16:08:32.69#ibcon#first serial, iclass 19, count 2 2006.229.16:08:32.69#ibcon#enter sib2, iclass 19, count 2 2006.229.16:08:32.69#ibcon#flushed, iclass 19, count 2 2006.229.16:08:32.69#ibcon#about to write, iclass 19, count 2 2006.229.16:08:32.69#ibcon#wrote, iclass 19, count 2 2006.229.16:08:32.69#ibcon#about to read 3, iclass 19, count 2 2006.229.16:08:32.71#ibcon#read 3, iclass 19, count 2 2006.229.16:08:32.71#ibcon#about to read 4, iclass 19, count 2 2006.229.16:08:32.71#ibcon#read 4, iclass 19, count 2 2006.229.16:08:32.71#ibcon#about to read 5, iclass 19, count 2 2006.229.16:08:32.71#ibcon#read 5, iclass 19, count 2 2006.229.16:08:32.71#ibcon#about to read 6, iclass 19, count 2 2006.229.16:08:32.71#ibcon#read 6, iclass 19, count 2 2006.229.16:08:32.71#ibcon#end of sib2, iclass 19, count 2 2006.229.16:08:32.71#ibcon#*mode == 0, iclass 19, count 2 2006.229.16:08:32.71#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.16:08:32.71#ibcon#[27=AT06-04\r\n] 2006.229.16:08:32.71#ibcon#*before write, iclass 19, count 2 2006.229.16:08:32.71#ibcon#enter sib2, iclass 19, count 2 2006.229.16:08:32.71#ibcon#flushed, iclass 19, count 2 2006.229.16:08:32.71#ibcon#about to write, iclass 19, count 2 2006.229.16:08:32.71#ibcon#wrote, iclass 19, count 2 2006.229.16:08:32.71#ibcon#about to read 3, iclass 19, count 2 2006.229.16:08:32.74#ibcon#read 3, iclass 19, count 2 2006.229.16:08:32.74#ibcon#about to read 4, iclass 19, count 2 2006.229.16:08:32.74#ibcon#read 4, iclass 19, count 2 2006.229.16:08:32.74#ibcon#about to read 5, iclass 19, count 2 2006.229.16:08:32.74#ibcon#read 5, iclass 19, count 2 2006.229.16:08:32.74#ibcon#about to read 6, iclass 19, count 2 2006.229.16:08:32.74#ibcon#read 6, iclass 19, count 2 2006.229.16:08:32.74#ibcon#end of sib2, iclass 19, count 2 2006.229.16:08:32.74#ibcon#*after write, iclass 19, count 2 2006.229.16:08:32.74#ibcon#*before return 0, iclass 19, count 2 2006.229.16:08:32.74#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:32.74#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:08:32.74#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.16:08:32.74#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:32.74#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:32.86#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:32.86#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:32.86#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:08:32.86#ibcon#first serial, iclass 19, count 0 2006.229.16:08:32.86#ibcon#enter sib2, iclass 19, count 0 2006.229.16:08:32.86#ibcon#flushed, iclass 19, count 0 2006.229.16:08:32.86#ibcon#about to write, iclass 19, count 0 2006.229.16:08:32.86#ibcon#wrote, iclass 19, count 0 2006.229.16:08:32.86#ibcon#about to read 3, iclass 19, count 0 2006.229.16:08:32.88#ibcon#read 3, iclass 19, count 0 2006.229.16:08:32.88#ibcon#about to read 4, iclass 19, count 0 2006.229.16:08:32.88#ibcon#read 4, iclass 19, count 0 2006.229.16:08:32.88#ibcon#about to read 5, iclass 19, count 0 2006.229.16:08:32.88#ibcon#read 5, iclass 19, count 0 2006.229.16:08:32.88#ibcon#about to read 6, iclass 19, count 0 2006.229.16:08:32.88#ibcon#read 6, iclass 19, count 0 2006.229.16:08:32.88#ibcon#end of sib2, iclass 19, count 0 2006.229.16:08:32.88#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:08:32.88#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:08:32.88#ibcon#[27=USB\r\n] 2006.229.16:08:32.88#ibcon#*before write, iclass 19, count 0 2006.229.16:08:32.88#ibcon#enter sib2, iclass 19, count 0 2006.229.16:08:32.88#ibcon#flushed, iclass 19, count 0 2006.229.16:08:32.88#ibcon#about to write, iclass 19, count 0 2006.229.16:08:32.88#ibcon#wrote, iclass 19, count 0 2006.229.16:08:32.88#ibcon#about to read 3, iclass 19, count 0 2006.229.16:08:32.91#ibcon#read 3, iclass 19, count 0 2006.229.16:08:32.91#ibcon#about to read 4, iclass 19, count 0 2006.229.16:08:32.91#ibcon#read 4, iclass 19, count 0 2006.229.16:08:32.91#ibcon#about to read 5, iclass 19, count 0 2006.229.16:08:32.91#ibcon#read 5, iclass 19, count 0 2006.229.16:08:32.91#ibcon#about to read 6, iclass 19, count 0 2006.229.16:08:32.91#ibcon#read 6, iclass 19, count 0 2006.229.16:08:32.91#ibcon#end of sib2, iclass 19, count 0 2006.229.16:08:32.91#ibcon#*after write, iclass 19, count 0 2006.229.16:08:32.91#ibcon#*before return 0, iclass 19, count 0 2006.229.16:08:32.91#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:32.91#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:08:32.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:08:32.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:08:32.91$vck44/vblo=7,734.99 2006.229.16:08:32.91#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:08:32.91#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:08:32.91#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:32.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:32.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:32.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:32.91#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:08:32.91#ibcon#first serial, iclass 21, count 0 2006.229.16:08:32.91#ibcon#enter sib2, iclass 21, count 0 2006.229.16:08:32.91#ibcon#flushed, iclass 21, count 0 2006.229.16:08:32.91#ibcon#about to write, iclass 21, count 0 2006.229.16:08:32.91#ibcon#wrote, iclass 21, count 0 2006.229.16:08:32.91#ibcon#about to read 3, iclass 21, count 0 2006.229.16:08:32.93#ibcon#read 3, iclass 21, count 0 2006.229.16:08:32.93#ibcon#about to read 4, iclass 21, count 0 2006.229.16:08:32.93#ibcon#read 4, iclass 21, count 0 2006.229.16:08:32.93#ibcon#about to read 5, iclass 21, count 0 2006.229.16:08:32.93#ibcon#read 5, iclass 21, count 0 2006.229.16:08:32.93#ibcon#about to read 6, iclass 21, count 0 2006.229.16:08:32.93#ibcon#read 6, iclass 21, count 0 2006.229.16:08:32.93#ibcon#end of sib2, iclass 21, count 0 2006.229.16:08:32.93#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:08:32.93#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:08:32.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:08:32.93#ibcon#*before write, iclass 21, count 0 2006.229.16:08:32.93#ibcon#enter sib2, iclass 21, count 0 2006.229.16:08:32.93#ibcon#flushed, iclass 21, count 0 2006.229.16:08:32.93#ibcon#about to write, iclass 21, count 0 2006.229.16:08:32.93#ibcon#wrote, iclass 21, count 0 2006.229.16:08:32.93#ibcon#about to read 3, iclass 21, count 0 2006.229.16:08:32.97#ibcon#read 3, iclass 21, count 0 2006.229.16:08:32.97#ibcon#about to read 4, iclass 21, count 0 2006.229.16:08:32.97#ibcon#read 4, iclass 21, count 0 2006.229.16:08:32.97#ibcon#about to read 5, iclass 21, count 0 2006.229.16:08:32.97#ibcon#read 5, iclass 21, count 0 2006.229.16:08:32.97#ibcon#about to read 6, iclass 21, count 0 2006.229.16:08:32.97#ibcon#read 6, iclass 21, count 0 2006.229.16:08:32.97#ibcon#end of sib2, iclass 21, count 0 2006.229.16:08:32.97#ibcon#*after write, iclass 21, count 0 2006.229.16:08:32.97#ibcon#*before return 0, iclass 21, count 0 2006.229.16:08:32.97#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:32.97#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:08:32.97#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:08:32.97#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:08:32.97$vck44/vb=7,4 2006.229.16:08:32.97#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.16:08:32.97#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.16:08:32.97#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:32.97#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:33.03#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:33.03#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:33.03#ibcon#enter wrdev, iclass 23, count 2 2006.229.16:08:33.03#ibcon#first serial, iclass 23, count 2 2006.229.16:08:33.03#ibcon#enter sib2, iclass 23, count 2 2006.229.16:08:33.03#ibcon#flushed, iclass 23, count 2 2006.229.16:08:33.03#ibcon#about to write, iclass 23, count 2 2006.229.16:08:33.03#ibcon#wrote, iclass 23, count 2 2006.229.16:08:33.03#ibcon#about to read 3, iclass 23, count 2 2006.229.16:08:33.05#ibcon#read 3, iclass 23, count 2 2006.229.16:08:33.05#ibcon#about to read 4, iclass 23, count 2 2006.229.16:08:33.05#ibcon#read 4, iclass 23, count 2 2006.229.16:08:33.05#ibcon#about to read 5, iclass 23, count 2 2006.229.16:08:33.05#ibcon#read 5, iclass 23, count 2 2006.229.16:08:33.05#ibcon#about to read 6, iclass 23, count 2 2006.229.16:08:33.05#ibcon#read 6, iclass 23, count 2 2006.229.16:08:33.05#ibcon#end of sib2, iclass 23, count 2 2006.229.16:08:33.05#ibcon#*mode == 0, iclass 23, count 2 2006.229.16:08:33.05#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.16:08:33.05#ibcon#[27=AT07-04\r\n] 2006.229.16:08:33.05#ibcon#*before write, iclass 23, count 2 2006.229.16:08:33.05#ibcon#enter sib2, iclass 23, count 2 2006.229.16:08:33.05#ibcon#flushed, iclass 23, count 2 2006.229.16:08:33.05#ibcon#about to write, iclass 23, count 2 2006.229.16:08:33.05#ibcon#wrote, iclass 23, count 2 2006.229.16:08:33.05#ibcon#about to read 3, iclass 23, count 2 2006.229.16:08:33.08#ibcon#read 3, iclass 23, count 2 2006.229.16:08:33.08#ibcon#about to read 4, iclass 23, count 2 2006.229.16:08:33.08#ibcon#read 4, iclass 23, count 2 2006.229.16:08:33.08#ibcon#about to read 5, iclass 23, count 2 2006.229.16:08:33.08#ibcon#read 5, iclass 23, count 2 2006.229.16:08:33.08#ibcon#about to read 6, iclass 23, count 2 2006.229.16:08:33.08#ibcon#read 6, iclass 23, count 2 2006.229.16:08:33.08#ibcon#end of sib2, iclass 23, count 2 2006.229.16:08:33.08#ibcon#*after write, iclass 23, count 2 2006.229.16:08:33.08#ibcon#*before return 0, iclass 23, count 2 2006.229.16:08:33.08#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:33.08#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:08:33.08#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.16:08:33.08#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:33.08#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:33.20#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:33.20#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:33.20#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:08:33.20#ibcon#first serial, iclass 23, count 0 2006.229.16:08:33.20#ibcon#enter sib2, iclass 23, count 0 2006.229.16:08:33.20#ibcon#flushed, iclass 23, count 0 2006.229.16:08:33.20#ibcon#about to write, iclass 23, count 0 2006.229.16:08:33.20#ibcon#wrote, iclass 23, count 0 2006.229.16:08:33.20#ibcon#about to read 3, iclass 23, count 0 2006.229.16:08:33.22#ibcon#read 3, iclass 23, count 0 2006.229.16:08:33.22#ibcon#about to read 4, iclass 23, count 0 2006.229.16:08:33.22#ibcon#read 4, iclass 23, count 0 2006.229.16:08:33.22#ibcon#about to read 5, iclass 23, count 0 2006.229.16:08:33.22#ibcon#read 5, iclass 23, count 0 2006.229.16:08:33.22#ibcon#about to read 6, iclass 23, count 0 2006.229.16:08:33.22#ibcon#read 6, iclass 23, count 0 2006.229.16:08:33.22#ibcon#end of sib2, iclass 23, count 0 2006.229.16:08:33.22#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:08:33.22#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:08:33.22#ibcon#[27=USB\r\n] 2006.229.16:08:33.22#ibcon#*before write, iclass 23, count 0 2006.229.16:08:33.22#ibcon#enter sib2, iclass 23, count 0 2006.229.16:08:33.22#ibcon#flushed, iclass 23, count 0 2006.229.16:08:33.22#ibcon#about to write, iclass 23, count 0 2006.229.16:08:33.22#ibcon#wrote, iclass 23, count 0 2006.229.16:08:33.22#ibcon#about to read 3, iclass 23, count 0 2006.229.16:08:33.25#ibcon#read 3, iclass 23, count 0 2006.229.16:08:33.25#ibcon#about to read 4, iclass 23, count 0 2006.229.16:08:33.25#ibcon#read 4, iclass 23, count 0 2006.229.16:08:33.25#ibcon#about to read 5, iclass 23, count 0 2006.229.16:08:33.25#ibcon#read 5, iclass 23, count 0 2006.229.16:08:33.25#ibcon#about to read 6, iclass 23, count 0 2006.229.16:08:33.25#ibcon#read 6, iclass 23, count 0 2006.229.16:08:33.25#ibcon#end of sib2, iclass 23, count 0 2006.229.16:08:33.25#ibcon#*after write, iclass 23, count 0 2006.229.16:08:33.25#ibcon#*before return 0, iclass 23, count 0 2006.229.16:08:33.25#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:33.25#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:08:33.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:08:33.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:08:33.25$vck44/vblo=8,744.99 2006.229.16:08:33.25#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.16:08:33.25#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.16:08:33.25#ibcon#ireg 17 cls_cnt 0 2006.229.16:08:33.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:33.25#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:33.25#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:33.25#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:08:33.25#ibcon#first serial, iclass 25, count 0 2006.229.16:08:33.25#ibcon#enter sib2, iclass 25, count 0 2006.229.16:08:33.25#ibcon#flushed, iclass 25, count 0 2006.229.16:08:33.25#ibcon#about to write, iclass 25, count 0 2006.229.16:08:33.25#ibcon#wrote, iclass 25, count 0 2006.229.16:08:33.25#ibcon#about to read 3, iclass 25, count 0 2006.229.16:08:33.27#ibcon#read 3, iclass 25, count 0 2006.229.16:08:33.27#ibcon#about to read 4, iclass 25, count 0 2006.229.16:08:33.27#ibcon#read 4, iclass 25, count 0 2006.229.16:08:33.27#ibcon#about to read 5, iclass 25, count 0 2006.229.16:08:33.27#ibcon#read 5, iclass 25, count 0 2006.229.16:08:33.27#ibcon#about to read 6, iclass 25, count 0 2006.229.16:08:33.27#ibcon#read 6, iclass 25, count 0 2006.229.16:08:33.27#ibcon#end of sib2, iclass 25, count 0 2006.229.16:08:33.27#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:08:33.27#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:08:33.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:08:33.27#ibcon#*before write, iclass 25, count 0 2006.229.16:08:33.27#ibcon#enter sib2, iclass 25, count 0 2006.229.16:08:33.27#ibcon#flushed, iclass 25, count 0 2006.229.16:08:33.27#ibcon#about to write, iclass 25, count 0 2006.229.16:08:33.27#ibcon#wrote, iclass 25, count 0 2006.229.16:08:33.27#ibcon#about to read 3, iclass 25, count 0 2006.229.16:08:33.31#ibcon#read 3, iclass 25, count 0 2006.229.16:08:33.31#ibcon#about to read 4, iclass 25, count 0 2006.229.16:08:33.31#ibcon#read 4, iclass 25, count 0 2006.229.16:08:33.31#ibcon#about to read 5, iclass 25, count 0 2006.229.16:08:33.31#ibcon#read 5, iclass 25, count 0 2006.229.16:08:33.31#ibcon#about to read 6, iclass 25, count 0 2006.229.16:08:33.31#ibcon#read 6, iclass 25, count 0 2006.229.16:08:33.31#ibcon#end of sib2, iclass 25, count 0 2006.229.16:08:33.31#ibcon#*after write, iclass 25, count 0 2006.229.16:08:33.31#ibcon#*before return 0, iclass 25, count 0 2006.229.16:08:33.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:33.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:08:33.31#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:08:33.31#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:08:33.31$vck44/vb=8,4 2006.229.16:08:33.31#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.16:08:33.31#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.16:08:33.31#ibcon#ireg 11 cls_cnt 2 2006.229.16:08:33.31#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:33.37#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:33.37#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:33.37#ibcon#enter wrdev, iclass 27, count 2 2006.229.16:08:33.37#ibcon#first serial, iclass 27, count 2 2006.229.16:08:33.37#ibcon#enter sib2, iclass 27, count 2 2006.229.16:08:33.37#ibcon#flushed, iclass 27, count 2 2006.229.16:08:33.37#ibcon#about to write, iclass 27, count 2 2006.229.16:08:33.37#ibcon#wrote, iclass 27, count 2 2006.229.16:08:33.37#ibcon#about to read 3, iclass 27, count 2 2006.229.16:08:33.39#ibcon#read 3, iclass 27, count 2 2006.229.16:08:33.39#ibcon#about to read 4, iclass 27, count 2 2006.229.16:08:33.39#ibcon#read 4, iclass 27, count 2 2006.229.16:08:33.39#ibcon#about to read 5, iclass 27, count 2 2006.229.16:08:33.39#ibcon#read 5, iclass 27, count 2 2006.229.16:08:33.39#ibcon#about to read 6, iclass 27, count 2 2006.229.16:08:33.39#ibcon#read 6, iclass 27, count 2 2006.229.16:08:33.39#ibcon#end of sib2, iclass 27, count 2 2006.229.16:08:33.39#ibcon#*mode == 0, iclass 27, count 2 2006.229.16:08:33.39#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.16:08:33.39#ibcon#[27=AT08-04\r\n] 2006.229.16:08:33.39#ibcon#*before write, iclass 27, count 2 2006.229.16:08:33.39#ibcon#enter sib2, iclass 27, count 2 2006.229.16:08:33.39#ibcon#flushed, iclass 27, count 2 2006.229.16:08:33.39#ibcon#about to write, iclass 27, count 2 2006.229.16:08:33.39#ibcon#wrote, iclass 27, count 2 2006.229.16:08:33.39#ibcon#about to read 3, iclass 27, count 2 2006.229.16:08:33.42#ibcon#read 3, iclass 27, count 2 2006.229.16:08:33.42#ibcon#about to read 4, iclass 27, count 2 2006.229.16:08:33.42#ibcon#read 4, iclass 27, count 2 2006.229.16:08:33.42#ibcon#about to read 5, iclass 27, count 2 2006.229.16:08:33.42#ibcon#read 5, iclass 27, count 2 2006.229.16:08:33.42#ibcon#about to read 6, iclass 27, count 2 2006.229.16:08:33.42#ibcon#read 6, iclass 27, count 2 2006.229.16:08:33.42#ibcon#end of sib2, iclass 27, count 2 2006.229.16:08:33.42#ibcon#*after write, iclass 27, count 2 2006.229.16:08:33.42#ibcon#*before return 0, iclass 27, count 2 2006.229.16:08:33.42#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:33.42#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:08:33.42#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.16:08:33.42#ibcon#ireg 7 cls_cnt 0 2006.229.16:08:33.42#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:33.54#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:33.54#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:33.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:08:33.54#ibcon#first serial, iclass 27, count 0 2006.229.16:08:33.54#ibcon#enter sib2, iclass 27, count 0 2006.229.16:08:33.54#ibcon#flushed, iclass 27, count 0 2006.229.16:08:33.54#ibcon#about to write, iclass 27, count 0 2006.229.16:08:33.54#ibcon#wrote, iclass 27, count 0 2006.229.16:08:33.54#ibcon#about to read 3, iclass 27, count 0 2006.229.16:08:33.56#ibcon#read 3, iclass 27, count 0 2006.229.16:08:33.56#ibcon#about to read 4, iclass 27, count 0 2006.229.16:08:33.56#ibcon#read 4, iclass 27, count 0 2006.229.16:08:33.56#ibcon#about to read 5, iclass 27, count 0 2006.229.16:08:33.56#ibcon#read 5, iclass 27, count 0 2006.229.16:08:33.56#ibcon#about to read 6, iclass 27, count 0 2006.229.16:08:33.56#ibcon#read 6, iclass 27, count 0 2006.229.16:08:33.56#ibcon#end of sib2, iclass 27, count 0 2006.229.16:08:33.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:08:33.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:08:33.56#ibcon#[27=USB\r\n] 2006.229.16:08:33.56#ibcon#*before write, iclass 27, count 0 2006.229.16:08:33.56#ibcon#enter sib2, iclass 27, count 0 2006.229.16:08:33.56#ibcon#flushed, iclass 27, count 0 2006.229.16:08:33.56#ibcon#about to write, iclass 27, count 0 2006.229.16:08:33.56#ibcon#wrote, iclass 27, count 0 2006.229.16:08:33.56#ibcon#about to read 3, iclass 27, count 0 2006.229.16:08:33.59#ibcon#read 3, iclass 27, count 0 2006.229.16:08:33.59#ibcon#about to read 4, iclass 27, count 0 2006.229.16:08:33.59#ibcon#read 4, iclass 27, count 0 2006.229.16:08:33.59#ibcon#about to read 5, iclass 27, count 0 2006.229.16:08:33.59#ibcon#read 5, iclass 27, count 0 2006.229.16:08:33.59#ibcon#about to read 6, iclass 27, count 0 2006.229.16:08:33.59#ibcon#read 6, iclass 27, count 0 2006.229.16:08:33.59#ibcon#end of sib2, iclass 27, count 0 2006.229.16:08:33.59#ibcon#*after write, iclass 27, count 0 2006.229.16:08:33.59#ibcon#*before return 0, iclass 27, count 0 2006.229.16:08:33.59#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:33.59#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:08:33.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:08:33.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:08:33.59$vck44/vabw=wide 2006.229.16:08:33.59#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.16:08:33.59#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.16:08:33.59#ibcon#ireg 8 cls_cnt 0 2006.229.16:08:33.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:33.59#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:33.59#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:33.59#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:08:33.59#ibcon#first serial, iclass 29, count 0 2006.229.16:08:33.59#ibcon#enter sib2, iclass 29, count 0 2006.229.16:08:33.59#ibcon#flushed, iclass 29, count 0 2006.229.16:08:33.59#ibcon#about to write, iclass 29, count 0 2006.229.16:08:33.59#ibcon#wrote, iclass 29, count 0 2006.229.16:08:33.59#ibcon#about to read 3, iclass 29, count 0 2006.229.16:08:33.61#ibcon#read 3, iclass 29, count 0 2006.229.16:08:33.61#ibcon#about to read 4, iclass 29, count 0 2006.229.16:08:33.61#ibcon#read 4, iclass 29, count 0 2006.229.16:08:33.61#ibcon#about to read 5, iclass 29, count 0 2006.229.16:08:33.61#ibcon#read 5, iclass 29, count 0 2006.229.16:08:33.61#ibcon#about to read 6, iclass 29, count 0 2006.229.16:08:33.61#ibcon#read 6, iclass 29, count 0 2006.229.16:08:33.61#ibcon#end of sib2, iclass 29, count 0 2006.229.16:08:33.61#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:08:33.61#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:08:33.61#ibcon#[25=BW32\r\n] 2006.229.16:08:33.61#ibcon#*before write, iclass 29, count 0 2006.229.16:08:33.61#ibcon#enter sib2, iclass 29, count 0 2006.229.16:08:33.61#ibcon#flushed, iclass 29, count 0 2006.229.16:08:33.61#ibcon#about to write, iclass 29, count 0 2006.229.16:08:33.61#ibcon#wrote, iclass 29, count 0 2006.229.16:08:33.61#ibcon#about to read 3, iclass 29, count 0 2006.229.16:08:33.64#ibcon#read 3, iclass 29, count 0 2006.229.16:08:33.64#ibcon#about to read 4, iclass 29, count 0 2006.229.16:08:33.64#ibcon#read 4, iclass 29, count 0 2006.229.16:08:33.64#ibcon#about to read 5, iclass 29, count 0 2006.229.16:08:33.64#ibcon#read 5, iclass 29, count 0 2006.229.16:08:33.64#ibcon#about to read 6, iclass 29, count 0 2006.229.16:08:33.64#ibcon#read 6, iclass 29, count 0 2006.229.16:08:33.64#ibcon#end of sib2, iclass 29, count 0 2006.229.16:08:33.64#ibcon#*after write, iclass 29, count 0 2006.229.16:08:33.64#ibcon#*before return 0, iclass 29, count 0 2006.229.16:08:33.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:33.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:08:33.64#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:08:33.64#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:08:33.64$vck44/vbbw=wide 2006.229.16:08:33.64#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.16:08:33.64#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.16:08:33.64#ibcon#ireg 8 cls_cnt 0 2006.229.16:08:33.64#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:08:33.71#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:08:33.71#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:08:33.71#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:08:33.71#ibcon#first serial, iclass 31, count 0 2006.229.16:08:33.71#ibcon#enter sib2, iclass 31, count 0 2006.229.16:08:33.71#ibcon#flushed, iclass 31, count 0 2006.229.16:08:33.71#ibcon#about to write, iclass 31, count 0 2006.229.16:08:33.71#ibcon#wrote, iclass 31, count 0 2006.229.16:08:33.71#ibcon#about to read 3, iclass 31, count 0 2006.229.16:08:33.73#ibcon#read 3, iclass 31, count 0 2006.229.16:08:33.73#ibcon#about to read 4, iclass 31, count 0 2006.229.16:08:33.73#ibcon#read 4, iclass 31, count 0 2006.229.16:08:33.73#ibcon#about to read 5, iclass 31, count 0 2006.229.16:08:33.73#ibcon#read 5, iclass 31, count 0 2006.229.16:08:33.73#ibcon#about to read 6, iclass 31, count 0 2006.229.16:08:33.73#ibcon#read 6, iclass 31, count 0 2006.229.16:08:33.73#ibcon#end of sib2, iclass 31, count 0 2006.229.16:08:33.73#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:08:33.73#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:08:33.73#ibcon#[27=BW32\r\n] 2006.229.16:08:33.73#ibcon#*before write, iclass 31, count 0 2006.229.16:08:33.73#ibcon#enter sib2, iclass 31, count 0 2006.229.16:08:33.73#ibcon#flushed, iclass 31, count 0 2006.229.16:08:33.73#ibcon#about to write, iclass 31, count 0 2006.229.16:08:33.73#ibcon#wrote, iclass 31, count 0 2006.229.16:08:33.73#ibcon#about to read 3, iclass 31, count 0 2006.229.16:08:33.76#ibcon#read 3, iclass 31, count 0 2006.229.16:08:33.76#ibcon#about to read 4, iclass 31, count 0 2006.229.16:08:33.76#ibcon#read 4, iclass 31, count 0 2006.229.16:08:33.76#ibcon#about to read 5, iclass 31, count 0 2006.229.16:08:33.76#ibcon#read 5, iclass 31, count 0 2006.229.16:08:33.76#ibcon#about to read 6, iclass 31, count 0 2006.229.16:08:33.76#ibcon#read 6, iclass 31, count 0 2006.229.16:08:33.76#ibcon#end of sib2, iclass 31, count 0 2006.229.16:08:33.76#ibcon#*after write, iclass 31, count 0 2006.229.16:08:33.76#ibcon#*before return 0, iclass 31, count 0 2006.229.16:08:33.76#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:08:33.76#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:08:33.76#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:08:33.76#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:08:33.76$setupk4/ifdk4 2006.229.16:08:33.76$ifdk4/lo= 2006.229.16:08:33.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:08:33.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:08:33.76$ifdk4/patch= 2006.229.16:08:33.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:08:33.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:08:33.76$setupk4/!*+20s 2006.229.16:08:41.94#abcon#<5=/06 1.4 2.2 27.201001001.9\r\n> 2006.229.16:08:41.96#abcon#{5=INTERFACE CLEAR} 2006.229.16:08:42.02#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:08:48.26$setupk4/"tpicd 2006.229.16:08:48.26$setupk4/echo=off 2006.229.16:08:48.26$setupk4/xlog=off 2006.229.16:08:48.26:!2006.229.16:10:40 2006.229.16:08:55.13#trakl#Source acquired 2006.229.16:08:56.13#flagr#flagr/antenna,acquired 2006.229.16:10:40.00:preob 2006.229.16:10:40.14/onsource/TRACKING 2006.229.16:10:40.14:!2006.229.16:10:50 2006.229.16:10:50.00:"tape 2006.229.16:10:50.00:"st=record 2006.229.16:10:50.00:data_valid=on 2006.229.16:10:50.00:midob 2006.229.16:10:50.14/onsource/TRACKING 2006.229.16:10:50.14/wx/27.21,1001.9,100 2006.229.16:10:50.34/cable/+6.4132E-03 2006.229.16:10:51.43/va/01,08,usb,yes,46,49 2006.229.16:10:51.43/va/02,07,usb,yes,49,50 2006.229.16:10:51.43/va/03,06,usb,yes,60,64 2006.229.16:10:51.43/va/04,07,usb,yes,51,53 2006.229.16:10:51.43/va/05,04,usb,yes,46,47 2006.229.16:10:51.43/va/06,04,usb,yes,51,51 2006.229.16:10:51.43/va/07,05,usb,yes,45,46 2006.229.16:10:51.43/va/08,06,usb,yes,34,41 2006.229.16:10:51.66/valo/01,524.99,yes,locked 2006.229.16:10:51.66/valo/02,534.99,yes,locked 2006.229.16:10:51.66/valo/03,564.99,yes,locked 2006.229.16:10:51.66/valo/04,624.99,yes,locked 2006.229.16:10:51.66/valo/05,734.99,yes,locked 2006.229.16:10:51.66/valo/06,814.99,yes,locked 2006.229.16:10:51.66/valo/07,864.99,yes,locked 2006.229.16:10:51.66/valo/08,884.99,yes,locked 2006.229.16:10:52.75/vb/01,04,usb,yes,43,39 2006.229.16:10:52.75/vb/02,04,usb,yes,45,45 2006.229.16:10:52.75/vb/03,04,usb,yes,41,46 2006.229.16:10:52.75/vb/04,04,usb,yes,47,46 2006.229.16:10:52.75/vb/05,04,usb,yes,38,41 2006.229.16:10:52.75/vb/06,04,usb,yes,44,39 2006.229.16:10:52.75/vb/07,04,usb,yes,43,43 2006.229.16:10:52.75/vb/08,04,usb,yes,40,44 2006.229.16:10:52.98/vblo/01,629.99,yes,locked 2006.229.16:10:52.98/vblo/02,634.99,yes,locked 2006.229.16:10:52.98/vblo/03,649.99,yes,locked 2006.229.16:10:52.98/vblo/04,679.99,yes,locked 2006.229.16:10:52.98/vblo/05,709.99,yes,locked 2006.229.16:10:52.98/vblo/06,719.99,yes,locked 2006.229.16:10:52.98/vblo/07,734.99,yes,locked 2006.229.16:10:52.98/vblo/08,744.99,yes,locked 2006.229.16:10:53.13/vabw/8 2006.229.16:10:53.28/vbbw/8 2006.229.16:10:53.37/xfe/off,on,12.2 2006.229.16:10:53.76/ifatt/23,28,28,28 2006.229.16:10:54.07/fmout-gps/S +4.50E-07 2006.229.16:10:54.11:!2006.229.16:12:40 2006.229.16:12:40.00:data_valid=off 2006.229.16:12:40.00:"et 2006.229.16:12:40.00:!+3s 2006.229.16:12:43.01:"tape 2006.229.16:12:43.01:postob 2006.229.16:12:43.23/cable/+6.4144E-03 2006.229.16:12:43.23/wx/27.21,1001.8,100 2006.229.16:12:44.07/fmout-gps/S +4.50E-07 2006.229.16:12:44.07:scan_name=229-1614,jd0608,70 2006.229.16:12:44.07:source=2121+053,212344.52,053522.1,2000.0,ccw 2006.229.16:12:45.14#flagr#flagr/antenna,new-source 2006.229.16:12:45.14:checkk5 2006.229.16:12:45.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:12:45.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:12:46.27/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:12:46.67/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:12:47.06/chk_obsdata//k5ts1/T2291610??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.16:12:47.47/chk_obsdata//k5ts2/T2291610??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.16:12:47.86/chk_obsdata//k5ts3/T2291610??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.16:12:48.26/chk_obsdata//k5ts4/T2291610??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.16:12:48.99/k5log//k5ts1_log_newline 2006.229.16:12:49.71/k5log//k5ts2_log_newline 2006.229.16:12:50.43/k5log//k5ts3_log_newline 2006.229.16:12:51.13/k5log//k5ts4_log_newline 2006.229.16:12:51.15/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:12:51.15:setupk4=1 2006.229.16:12:51.16$setupk4/echo=on 2006.229.16:12:51.16$setupk4/pcalon 2006.229.16:12:51.16$pcalon/"no phase cal control is implemented here 2006.229.16:12:51.16$setupk4/"tpicd=stop 2006.229.16:12:51.16$setupk4/"rec=synch_on 2006.229.16:12:51.16$setupk4/"rec_mode=128 2006.229.16:12:51.16$setupk4/!* 2006.229.16:12:51.16$setupk4/recpk4 2006.229.16:12:51.16$recpk4/recpatch= 2006.229.16:12:51.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:12:51.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:12:51.16$setupk4/vck44 2006.229.16:12:51.16$vck44/valo=1,524.99 2006.229.16:12:51.16#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.16:12:51.16#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.16:12:51.16#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:51.16#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:51.16#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:51.16#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:51.16#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:12:51.16#ibcon#first serial, iclass 28, count 0 2006.229.16:12:51.16#ibcon#enter sib2, iclass 28, count 0 2006.229.16:12:51.16#ibcon#flushed, iclass 28, count 0 2006.229.16:12:51.16#ibcon#about to write, iclass 28, count 0 2006.229.16:12:51.16#ibcon#wrote, iclass 28, count 0 2006.229.16:12:51.16#ibcon#about to read 3, iclass 28, count 0 2006.229.16:12:51.17#ibcon#read 3, iclass 28, count 0 2006.229.16:12:51.17#ibcon#about to read 4, iclass 28, count 0 2006.229.16:12:51.17#ibcon#read 4, iclass 28, count 0 2006.229.16:12:51.17#ibcon#about to read 5, iclass 28, count 0 2006.229.16:12:51.17#ibcon#read 5, iclass 28, count 0 2006.229.16:12:51.17#ibcon#about to read 6, iclass 28, count 0 2006.229.16:12:51.17#ibcon#read 6, iclass 28, count 0 2006.229.16:12:51.17#ibcon#end of sib2, iclass 28, count 0 2006.229.16:12:51.17#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:12:51.17#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:12:51.17#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:12:51.17#ibcon#*before write, iclass 28, count 0 2006.229.16:12:51.17#ibcon#enter sib2, iclass 28, count 0 2006.229.16:12:51.17#ibcon#flushed, iclass 28, count 0 2006.229.16:12:51.17#ibcon#about to write, iclass 28, count 0 2006.229.16:12:51.17#ibcon#wrote, iclass 28, count 0 2006.229.16:12:51.17#ibcon#about to read 3, iclass 28, count 0 2006.229.16:12:51.22#ibcon#read 3, iclass 28, count 0 2006.229.16:12:51.22#ibcon#about to read 4, iclass 28, count 0 2006.229.16:12:51.22#ibcon#read 4, iclass 28, count 0 2006.229.16:12:51.22#ibcon#about to read 5, iclass 28, count 0 2006.229.16:12:51.22#ibcon#read 5, iclass 28, count 0 2006.229.16:12:51.22#ibcon#about to read 6, iclass 28, count 0 2006.229.16:12:51.22#ibcon#read 6, iclass 28, count 0 2006.229.16:12:51.22#ibcon#end of sib2, iclass 28, count 0 2006.229.16:12:51.22#ibcon#*after write, iclass 28, count 0 2006.229.16:12:51.22#ibcon#*before return 0, iclass 28, count 0 2006.229.16:12:51.22#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:51.22#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:51.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:12:51.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:12:51.22$vck44/va=1,8 2006.229.16:12:51.22#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.16:12:51.22#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.16:12:51.22#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:51.22#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:51.22#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:51.22#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:51.22#ibcon#enter wrdev, iclass 30, count 2 2006.229.16:12:51.22#ibcon#first serial, iclass 30, count 2 2006.229.16:12:51.22#ibcon#enter sib2, iclass 30, count 2 2006.229.16:12:51.22#ibcon#flushed, iclass 30, count 2 2006.229.16:12:51.22#ibcon#about to write, iclass 30, count 2 2006.229.16:12:51.22#ibcon#wrote, iclass 30, count 2 2006.229.16:12:51.22#ibcon#about to read 3, iclass 30, count 2 2006.229.16:12:51.24#ibcon#read 3, iclass 30, count 2 2006.229.16:12:51.24#ibcon#about to read 4, iclass 30, count 2 2006.229.16:12:51.24#ibcon#read 4, iclass 30, count 2 2006.229.16:12:51.24#ibcon#about to read 5, iclass 30, count 2 2006.229.16:12:51.24#ibcon#read 5, iclass 30, count 2 2006.229.16:12:51.24#ibcon#about to read 6, iclass 30, count 2 2006.229.16:12:51.24#ibcon#read 6, iclass 30, count 2 2006.229.16:12:51.24#ibcon#end of sib2, iclass 30, count 2 2006.229.16:12:51.24#ibcon#*mode == 0, iclass 30, count 2 2006.229.16:12:51.24#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.16:12:51.24#ibcon#[25=AT01-08\r\n] 2006.229.16:12:51.24#ibcon#*before write, iclass 30, count 2 2006.229.16:12:51.24#ibcon#enter sib2, iclass 30, count 2 2006.229.16:12:51.24#ibcon#flushed, iclass 30, count 2 2006.229.16:12:51.24#ibcon#about to write, iclass 30, count 2 2006.229.16:12:51.24#ibcon#wrote, iclass 30, count 2 2006.229.16:12:51.24#ibcon#about to read 3, iclass 30, count 2 2006.229.16:12:51.27#ibcon#read 3, iclass 30, count 2 2006.229.16:12:51.27#ibcon#about to read 4, iclass 30, count 2 2006.229.16:12:51.27#ibcon#read 4, iclass 30, count 2 2006.229.16:12:51.27#ibcon#about to read 5, iclass 30, count 2 2006.229.16:12:51.27#ibcon#read 5, iclass 30, count 2 2006.229.16:12:51.27#ibcon#about to read 6, iclass 30, count 2 2006.229.16:12:51.27#ibcon#read 6, iclass 30, count 2 2006.229.16:12:51.27#ibcon#end of sib2, iclass 30, count 2 2006.229.16:12:51.27#ibcon#*after write, iclass 30, count 2 2006.229.16:12:51.27#ibcon#*before return 0, iclass 30, count 2 2006.229.16:12:51.27#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:51.27#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:51.27#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.16:12:51.27#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:51.27#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:51.39#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:51.39#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:51.39#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:12:51.39#ibcon#first serial, iclass 30, count 0 2006.229.16:12:51.39#ibcon#enter sib2, iclass 30, count 0 2006.229.16:12:51.39#ibcon#flushed, iclass 30, count 0 2006.229.16:12:51.39#ibcon#about to write, iclass 30, count 0 2006.229.16:12:51.39#ibcon#wrote, iclass 30, count 0 2006.229.16:12:51.39#ibcon#about to read 3, iclass 30, count 0 2006.229.16:12:51.41#ibcon#read 3, iclass 30, count 0 2006.229.16:12:51.41#ibcon#about to read 4, iclass 30, count 0 2006.229.16:12:51.41#ibcon#read 4, iclass 30, count 0 2006.229.16:12:51.41#ibcon#about to read 5, iclass 30, count 0 2006.229.16:12:51.41#ibcon#read 5, iclass 30, count 0 2006.229.16:12:51.41#ibcon#about to read 6, iclass 30, count 0 2006.229.16:12:51.41#ibcon#read 6, iclass 30, count 0 2006.229.16:12:51.41#ibcon#end of sib2, iclass 30, count 0 2006.229.16:12:51.41#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:12:51.41#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:12:51.41#ibcon#[25=USB\r\n] 2006.229.16:12:51.41#ibcon#*before write, iclass 30, count 0 2006.229.16:12:51.41#ibcon#enter sib2, iclass 30, count 0 2006.229.16:12:51.41#ibcon#flushed, iclass 30, count 0 2006.229.16:12:51.41#ibcon#about to write, iclass 30, count 0 2006.229.16:12:51.41#ibcon#wrote, iclass 30, count 0 2006.229.16:12:51.41#ibcon#about to read 3, iclass 30, count 0 2006.229.16:12:51.44#ibcon#read 3, iclass 30, count 0 2006.229.16:12:51.44#ibcon#about to read 4, iclass 30, count 0 2006.229.16:12:51.44#ibcon#read 4, iclass 30, count 0 2006.229.16:12:51.44#ibcon#about to read 5, iclass 30, count 0 2006.229.16:12:51.44#ibcon#read 5, iclass 30, count 0 2006.229.16:12:51.44#ibcon#about to read 6, iclass 30, count 0 2006.229.16:12:51.44#ibcon#read 6, iclass 30, count 0 2006.229.16:12:51.44#ibcon#end of sib2, iclass 30, count 0 2006.229.16:12:51.44#ibcon#*after write, iclass 30, count 0 2006.229.16:12:51.44#ibcon#*before return 0, iclass 30, count 0 2006.229.16:12:51.44#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:51.44#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:51.44#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:12:51.44#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:12:51.44$vck44/valo=2,534.99 2006.229.16:12:51.44#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:12:51.44#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:12:51.44#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:51.44#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:51.44#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:51.44#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:51.44#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:12:51.44#ibcon#first serial, iclass 32, count 0 2006.229.16:12:51.44#ibcon#enter sib2, iclass 32, count 0 2006.229.16:12:51.44#ibcon#flushed, iclass 32, count 0 2006.229.16:12:51.44#ibcon#about to write, iclass 32, count 0 2006.229.16:12:51.44#ibcon#wrote, iclass 32, count 0 2006.229.16:12:51.44#ibcon#about to read 3, iclass 32, count 0 2006.229.16:12:51.46#ibcon#read 3, iclass 32, count 0 2006.229.16:12:51.46#ibcon#about to read 4, iclass 32, count 0 2006.229.16:12:51.46#ibcon#read 4, iclass 32, count 0 2006.229.16:12:51.46#ibcon#about to read 5, iclass 32, count 0 2006.229.16:12:51.46#ibcon#read 5, iclass 32, count 0 2006.229.16:12:51.46#ibcon#about to read 6, iclass 32, count 0 2006.229.16:12:51.46#ibcon#read 6, iclass 32, count 0 2006.229.16:12:51.46#ibcon#end of sib2, iclass 32, count 0 2006.229.16:12:51.46#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:12:51.46#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:12:51.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:12:51.46#ibcon#*before write, iclass 32, count 0 2006.229.16:12:51.46#ibcon#enter sib2, iclass 32, count 0 2006.229.16:12:51.46#ibcon#flushed, iclass 32, count 0 2006.229.16:12:51.46#ibcon#about to write, iclass 32, count 0 2006.229.16:12:51.46#ibcon#wrote, iclass 32, count 0 2006.229.16:12:51.46#ibcon#about to read 3, iclass 32, count 0 2006.229.16:12:51.50#ibcon#read 3, iclass 32, count 0 2006.229.16:12:51.50#ibcon#about to read 4, iclass 32, count 0 2006.229.16:12:51.50#ibcon#read 4, iclass 32, count 0 2006.229.16:12:51.50#ibcon#about to read 5, iclass 32, count 0 2006.229.16:12:51.50#ibcon#read 5, iclass 32, count 0 2006.229.16:12:51.50#ibcon#about to read 6, iclass 32, count 0 2006.229.16:12:51.50#ibcon#read 6, iclass 32, count 0 2006.229.16:12:51.50#ibcon#end of sib2, iclass 32, count 0 2006.229.16:12:51.50#ibcon#*after write, iclass 32, count 0 2006.229.16:12:51.50#ibcon#*before return 0, iclass 32, count 0 2006.229.16:12:51.50#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:51.50#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:51.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:12:51.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:12:51.50$vck44/va=2,7 2006.229.16:12:51.50#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.16:12:51.50#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.16:12:51.50#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:51.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:51.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:51.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:51.56#ibcon#enter wrdev, iclass 34, count 2 2006.229.16:12:51.56#ibcon#first serial, iclass 34, count 2 2006.229.16:12:51.56#ibcon#enter sib2, iclass 34, count 2 2006.229.16:12:51.56#ibcon#flushed, iclass 34, count 2 2006.229.16:12:51.56#ibcon#about to write, iclass 34, count 2 2006.229.16:12:51.56#ibcon#wrote, iclass 34, count 2 2006.229.16:12:51.56#ibcon#about to read 3, iclass 34, count 2 2006.229.16:12:51.58#ibcon#read 3, iclass 34, count 2 2006.229.16:12:51.58#ibcon#about to read 4, iclass 34, count 2 2006.229.16:12:51.58#ibcon#read 4, iclass 34, count 2 2006.229.16:12:51.58#ibcon#about to read 5, iclass 34, count 2 2006.229.16:12:51.58#ibcon#read 5, iclass 34, count 2 2006.229.16:12:51.58#ibcon#about to read 6, iclass 34, count 2 2006.229.16:12:51.58#ibcon#read 6, iclass 34, count 2 2006.229.16:12:51.58#ibcon#end of sib2, iclass 34, count 2 2006.229.16:12:51.58#ibcon#*mode == 0, iclass 34, count 2 2006.229.16:12:51.58#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.16:12:51.58#ibcon#[25=AT02-07\r\n] 2006.229.16:12:51.58#ibcon#*before write, iclass 34, count 2 2006.229.16:12:51.58#ibcon#enter sib2, iclass 34, count 2 2006.229.16:12:51.58#ibcon#flushed, iclass 34, count 2 2006.229.16:12:51.58#ibcon#about to write, iclass 34, count 2 2006.229.16:12:51.58#ibcon#wrote, iclass 34, count 2 2006.229.16:12:51.58#ibcon#about to read 3, iclass 34, count 2 2006.229.16:12:51.61#ibcon#read 3, iclass 34, count 2 2006.229.16:12:51.61#ibcon#about to read 4, iclass 34, count 2 2006.229.16:12:51.61#ibcon#read 4, iclass 34, count 2 2006.229.16:12:51.61#ibcon#about to read 5, iclass 34, count 2 2006.229.16:12:51.61#ibcon#read 5, iclass 34, count 2 2006.229.16:12:51.61#ibcon#about to read 6, iclass 34, count 2 2006.229.16:12:51.61#ibcon#read 6, iclass 34, count 2 2006.229.16:12:51.61#ibcon#end of sib2, iclass 34, count 2 2006.229.16:12:51.61#ibcon#*after write, iclass 34, count 2 2006.229.16:12:51.61#ibcon#*before return 0, iclass 34, count 2 2006.229.16:12:51.61#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:51.61#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:51.61#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.16:12:51.61#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:51.61#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:51.73#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:51.73#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:51.73#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:12:51.73#ibcon#first serial, iclass 34, count 0 2006.229.16:12:51.73#ibcon#enter sib2, iclass 34, count 0 2006.229.16:12:51.73#ibcon#flushed, iclass 34, count 0 2006.229.16:12:51.73#ibcon#about to write, iclass 34, count 0 2006.229.16:12:51.73#ibcon#wrote, iclass 34, count 0 2006.229.16:12:51.73#ibcon#about to read 3, iclass 34, count 0 2006.229.16:12:51.75#ibcon#read 3, iclass 34, count 0 2006.229.16:12:51.75#ibcon#about to read 4, iclass 34, count 0 2006.229.16:12:51.75#ibcon#read 4, iclass 34, count 0 2006.229.16:12:51.75#ibcon#about to read 5, iclass 34, count 0 2006.229.16:12:51.75#ibcon#read 5, iclass 34, count 0 2006.229.16:12:51.75#ibcon#about to read 6, iclass 34, count 0 2006.229.16:12:51.75#ibcon#read 6, iclass 34, count 0 2006.229.16:12:51.75#ibcon#end of sib2, iclass 34, count 0 2006.229.16:12:51.75#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:12:51.75#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:12:51.75#ibcon#[25=USB\r\n] 2006.229.16:12:51.75#ibcon#*before write, iclass 34, count 0 2006.229.16:12:51.75#ibcon#enter sib2, iclass 34, count 0 2006.229.16:12:51.75#ibcon#flushed, iclass 34, count 0 2006.229.16:12:51.75#ibcon#about to write, iclass 34, count 0 2006.229.16:12:51.75#ibcon#wrote, iclass 34, count 0 2006.229.16:12:51.75#ibcon#about to read 3, iclass 34, count 0 2006.229.16:12:51.78#ibcon#read 3, iclass 34, count 0 2006.229.16:12:51.78#ibcon#about to read 4, iclass 34, count 0 2006.229.16:12:51.78#ibcon#read 4, iclass 34, count 0 2006.229.16:12:51.78#ibcon#about to read 5, iclass 34, count 0 2006.229.16:12:51.78#ibcon#read 5, iclass 34, count 0 2006.229.16:12:51.78#ibcon#about to read 6, iclass 34, count 0 2006.229.16:12:51.78#ibcon#read 6, iclass 34, count 0 2006.229.16:12:51.78#ibcon#end of sib2, iclass 34, count 0 2006.229.16:12:51.78#ibcon#*after write, iclass 34, count 0 2006.229.16:12:51.78#ibcon#*before return 0, iclass 34, count 0 2006.229.16:12:51.78#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:51.78#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:51.78#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:12:51.78#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:12:51.78$vck44/valo=3,564.99 2006.229.16:12:51.78#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.16:12:51.78#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.16:12:51.78#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:51.78#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:51.78#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:51.78#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:51.78#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:12:51.78#ibcon#first serial, iclass 36, count 0 2006.229.16:12:51.78#ibcon#enter sib2, iclass 36, count 0 2006.229.16:12:51.78#ibcon#flushed, iclass 36, count 0 2006.229.16:12:51.78#ibcon#about to write, iclass 36, count 0 2006.229.16:12:51.78#ibcon#wrote, iclass 36, count 0 2006.229.16:12:51.78#ibcon#about to read 3, iclass 36, count 0 2006.229.16:12:51.80#ibcon#read 3, iclass 36, count 0 2006.229.16:12:51.80#ibcon#about to read 4, iclass 36, count 0 2006.229.16:12:51.80#ibcon#read 4, iclass 36, count 0 2006.229.16:12:51.80#ibcon#about to read 5, iclass 36, count 0 2006.229.16:12:51.80#ibcon#read 5, iclass 36, count 0 2006.229.16:12:51.80#ibcon#about to read 6, iclass 36, count 0 2006.229.16:12:51.80#ibcon#read 6, iclass 36, count 0 2006.229.16:12:51.80#ibcon#end of sib2, iclass 36, count 0 2006.229.16:12:51.80#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:12:51.80#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:12:51.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:12:51.80#ibcon#*before write, iclass 36, count 0 2006.229.16:12:51.80#ibcon#enter sib2, iclass 36, count 0 2006.229.16:12:51.80#ibcon#flushed, iclass 36, count 0 2006.229.16:12:51.80#ibcon#about to write, iclass 36, count 0 2006.229.16:12:51.80#ibcon#wrote, iclass 36, count 0 2006.229.16:12:51.80#ibcon#about to read 3, iclass 36, count 0 2006.229.16:12:51.84#ibcon#read 3, iclass 36, count 0 2006.229.16:12:51.84#ibcon#about to read 4, iclass 36, count 0 2006.229.16:12:51.84#ibcon#read 4, iclass 36, count 0 2006.229.16:12:51.84#ibcon#about to read 5, iclass 36, count 0 2006.229.16:12:51.84#ibcon#read 5, iclass 36, count 0 2006.229.16:12:51.84#ibcon#about to read 6, iclass 36, count 0 2006.229.16:12:51.84#ibcon#read 6, iclass 36, count 0 2006.229.16:12:51.84#ibcon#end of sib2, iclass 36, count 0 2006.229.16:12:51.84#ibcon#*after write, iclass 36, count 0 2006.229.16:12:51.84#ibcon#*before return 0, iclass 36, count 0 2006.229.16:12:51.84#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:51.84#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:51.84#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:12:51.84#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:12:51.84$vck44/va=3,6 2006.229.16:12:51.84#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.16:12:51.84#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.16:12:51.84#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:51.84#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:51.90#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:51.90#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:51.90#ibcon#enter wrdev, iclass 38, count 2 2006.229.16:12:51.90#ibcon#first serial, iclass 38, count 2 2006.229.16:12:51.90#ibcon#enter sib2, iclass 38, count 2 2006.229.16:12:51.90#ibcon#flushed, iclass 38, count 2 2006.229.16:12:51.90#ibcon#about to write, iclass 38, count 2 2006.229.16:12:51.90#ibcon#wrote, iclass 38, count 2 2006.229.16:12:51.90#ibcon#about to read 3, iclass 38, count 2 2006.229.16:12:51.92#ibcon#read 3, iclass 38, count 2 2006.229.16:12:51.92#ibcon#about to read 4, iclass 38, count 2 2006.229.16:12:51.92#ibcon#read 4, iclass 38, count 2 2006.229.16:12:51.92#ibcon#about to read 5, iclass 38, count 2 2006.229.16:12:51.92#ibcon#read 5, iclass 38, count 2 2006.229.16:12:51.92#ibcon#about to read 6, iclass 38, count 2 2006.229.16:12:51.92#ibcon#read 6, iclass 38, count 2 2006.229.16:12:51.92#ibcon#end of sib2, iclass 38, count 2 2006.229.16:12:51.92#ibcon#*mode == 0, iclass 38, count 2 2006.229.16:12:51.92#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.16:12:51.92#ibcon#[25=AT03-06\r\n] 2006.229.16:12:51.92#ibcon#*before write, iclass 38, count 2 2006.229.16:12:51.92#ibcon#enter sib2, iclass 38, count 2 2006.229.16:12:51.92#ibcon#flushed, iclass 38, count 2 2006.229.16:12:51.92#ibcon#about to write, iclass 38, count 2 2006.229.16:12:51.92#ibcon#wrote, iclass 38, count 2 2006.229.16:12:51.92#ibcon#about to read 3, iclass 38, count 2 2006.229.16:12:51.95#ibcon#read 3, iclass 38, count 2 2006.229.16:12:51.95#ibcon#about to read 4, iclass 38, count 2 2006.229.16:12:51.95#ibcon#read 4, iclass 38, count 2 2006.229.16:12:51.95#ibcon#about to read 5, iclass 38, count 2 2006.229.16:12:51.95#ibcon#read 5, iclass 38, count 2 2006.229.16:12:51.95#ibcon#about to read 6, iclass 38, count 2 2006.229.16:12:51.95#ibcon#read 6, iclass 38, count 2 2006.229.16:12:51.95#ibcon#end of sib2, iclass 38, count 2 2006.229.16:12:51.95#ibcon#*after write, iclass 38, count 2 2006.229.16:12:51.95#ibcon#*before return 0, iclass 38, count 2 2006.229.16:12:51.95#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:51.95#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:51.95#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.16:12:51.95#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:51.95#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:52.07#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:52.07#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:52.07#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:12:52.07#ibcon#first serial, iclass 38, count 0 2006.229.16:12:52.07#ibcon#enter sib2, iclass 38, count 0 2006.229.16:12:52.07#ibcon#flushed, iclass 38, count 0 2006.229.16:12:52.07#ibcon#about to write, iclass 38, count 0 2006.229.16:12:52.07#ibcon#wrote, iclass 38, count 0 2006.229.16:12:52.07#ibcon#about to read 3, iclass 38, count 0 2006.229.16:12:52.09#ibcon#read 3, iclass 38, count 0 2006.229.16:12:52.09#ibcon#about to read 4, iclass 38, count 0 2006.229.16:12:52.09#ibcon#read 4, iclass 38, count 0 2006.229.16:12:52.09#ibcon#about to read 5, iclass 38, count 0 2006.229.16:12:52.09#ibcon#read 5, iclass 38, count 0 2006.229.16:12:52.09#ibcon#about to read 6, iclass 38, count 0 2006.229.16:12:52.09#ibcon#read 6, iclass 38, count 0 2006.229.16:12:52.09#ibcon#end of sib2, iclass 38, count 0 2006.229.16:12:52.09#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:12:52.09#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:12:52.09#ibcon#[25=USB\r\n] 2006.229.16:12:52.09#ibcon#*before write, iclass 38, count 0 2006.229.16:12:52.09#ibcon#enter sib2, iclass 38, count 0 2006.229.16:12:52.09#ibcon#flushed, iclass 38, count 0 2006.229.16:12:52.09#ibcon#about to write, iclass 38, count 0 2006.229.16:12:52.09#ibcon#wrote, iclass 38, count 0 2006.229.16:12:52.09#ibcon#about to read 3, iclass 38, count 0 2006.229.16:12:52.12#ibcon#read 3, iclass 38, count 0 2006.229.16:12:52.12#ibcon#about to read 4, iclass 38, count 0 2006.229.16:12:52.12#ibcon#read 4, iclass 38, count 0 2006.229.16:12:52.12#ibcon#about to read 5, iclass 38, count 0 2006.229.16:12:52.12#ibcon#read 5, iclass 38, count 0 2006.229.16:12:52.12#ibcon#about to read 6, iclass 38, count 0 2006.229.16:12:52.12#ibcon#read 6, iclass 38, count 0 2006.229.16:12:52.12#ibcon#end of sib2, iclass 38, count 0 2006.229.16:12:52.12#ibcon#*after write, iclass 38, count 0 2006.229.16:12:52.12#ibcon#*before return 0, iclass 38, count 0 2006.229.16:12:52.12#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:52.12#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:52.12#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:12:52.12#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:12:52.12$vck44/valo=4,624.99 2006.229.16:12:52.12#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.16:12:52.12#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.16:12:52.12#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:52.12#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:52.12#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:52.12#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:52.12#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:12:52.12#ibcon#first serial, iclass 40, count 0 2006.229.16:12:52.12#ibcon#enter sib2, iclass 40, count 0 2006.229.16:12:52.12#ibcon#flushed, iclass 40, count 0 2006.229.16:12:52.12#ibcon#about to write, iclass 40, count 0 2006.229.16:12:52.12#ibcon#wrote, iclass 40, count 0 2006.229.16:12:52.12#ibcon#about to read 3, iclass 40, count 0 2006.229.16:12:52.14#ibcon#read 3, iclass 40, count 0 2006.229.16:12:52.14#ibcon#about to read 4, iclass 40, count 0 2006.229.16:12:52.14#ibcon#read 4, iclass 40, count 0 2006.229.16:12:52.14#ibcon#about to read 5, iclass 40, count 0 2006.229.16:12:52.14#ibcon#read 5, iclass 40, count 0 2006.229.16:12:52.14#ibcon#about to read 6, iclass 40, count 0 2006.229.16:12:52.14#ibcon#read 6, iclass 40, count 0 2006.229.16:12:52.14#ibcon#end of sib2, iclass 40, count 0 2006.229.16:12:52.14#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:12:52.14#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:12:52.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:12:52.14#ibcon#*before write, iclass 40, count 0 2006.229.16:12:52.14#ibcon#enter sib2, iclass 40, count 0 2006.229.16:12:52.14#ibcon#flushed, iclass 40, count 0 2006.229.16:12:52.14#ibcon#about to write, iclass 40, count 0 2006.229.16:12:52.14#ibcon#wrote, iclass 40, count 0 2006.229.16:12:52.14#ibcon#about to read 3, iclass 40, count 0 2006.229.16:12:52.18#ibcon#read 3, iclass 40, count 0 2006.229.16:12:52.18#ibcon#about to read 4, iclass 40, count 0 2006.229.16:12:52.18#ibcon#read 4, iclass 40, count 0 2006.229.16:12:52.18#ibcon#about to read 5, iclass 40, count 0 2006.229.16:12:52.18#ibcon#read 5, iclass 40, count 0 2006.229.16:12:52.18#ibcon#about to read 6, iclass 40, count 0 2006.229.16:12:52.18#ibcon#read 6, iclass 40, count 0 2006.229.16:12:52.18#ibcon#end of sib2, iclass 40, count 0 2006.229.16:12:52.18#ibcon#*after write, iclass 40, count 0 2006.229.16:12:52.18#ibcon#*before return 0, iclass 40, count 0 2006.229.16:12:52.18#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:52.18#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:52.18#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:12:52.18#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:12:52.18$vck44/va=4,7 2006.229.16:12:52.18#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.16:12:52.18#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.16:12:52.18#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:52.18#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:52.24#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:52.24#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:52.24#ibcon#enter wrdev, iclass 4, count 2 2006.229.16:12:52.24#ibcon#first serial, iclass 4, count 2 2006.229.16:12:52.24#ibcon#enter sib2, iclass 4, count 2 2006.229.16:12:52.24#ibcon#flushed, iclass 4, count 2 2006.229.16:12:52.24#ibcon#about to write, iclass 4, count 2 2006.229.16:12:52.24#ibcon#wrote, iclass 4, count 2 2006.229.16:12:52.24#ibcon#about to read 3, iclass 4, count 2 2006.229.16:12:52.26#ibcon#read 3, iclass 4, count 2 2006.229.16:12:52.26#ibcon#about to read 4, iclass 4, count 2 2006.229.16:12:52.26#ibcon#read 4, iclass 4, count 2 2006.229.16:12:52.26#ibcon#about to read 5, iclass 4, count 2 2006.229.16:12:52.26#ibcon#read 5, iclass 4, count 2 2006.229.16:12:52.26#ibcon#about to read 6, iclass 4, count 2 2006.229.16:12:52.26#ibcon#read 6, iclass 4, count 2 2006.229.16:12:52.26#ibcon#end of sib2, iclass 4, count 2 2006.229.16:12:52.26#ibcon#*mode == 0, iclass 4, count 2 2006.229.16:12:52.26#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.16:12:52.26#ibcon#[25=AT04-07\r\n] 2006.229.16:12:52.26#ibcon#*before write, iclass 4, count 2 2006.229.16:12:52.26#ibcon#enter sib2, iclass 4, count 2 2006.229.16:12:52.26#ibcon#flushed, iclass 4, count 2 2006.229.16:12:52.26#ibcon#about to write, iclass 4, count 2 2006.229.16:12:52.26#ibcon#wrote, iclass 4, count 2 2006.229.16:12:52.26#ibcon#about to read 3, iclass 4, count 2 2006.229.16:12:52.29#ibcon#read 3, iclass 4, count 2 2006.229.16:12:52.29#ibcon#about to read 4, iclass 4, count 2 2006.229.16:12:52.29#ibcon#read 4, iclass 4, count 2 2006.229.16:12:52.29#ibcon#about to read 5, iclass 4, count 2 2006.229.16:12:52.29#ibcon#read 5, iclass 4, count 2 2006.229.16:12:52.29#ibcon#about to read 6, iclass 4, count 2 2006.229.16:12:52.29#ibcon#read 6, iclass 4, count 2 2006.229.16:12:52.29#ibcon#end of sib2, iclass 4, count 2 2006.229.16:12:52.29#ibcon#*after write, iclass 4, count 2 2006.229.16:12:52.29#ibcon#*before return 0, iclass 4, count 2 2006.229.16:12:52.29#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:52.29#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:52.29#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.16:12:52.29#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:52.29#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:52.41#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:52.41#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:52.41#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:12:52.41#ibcon#first serial, iclass 4, count 0 2006.229.16:12:52.41#ibcon#enter sib2, iclass 4, count 0 2006.229.16:12:52.41#ibcon#flushed, iclass 4, count 0 2006.229.16:12:52.41#ibcon#about to write, iclass 4, count 0 2006.229.16:12:52.41#ibcon#wrote, iclass 4, count 0 2006.229.16:12:52.41#ibcon#about to read 3, iclass 4, count 0 2006.229.16:12:52.43#ibcon#read 3, iclass 4, count 0 2006.229.16:12:52.43#ibcon#about to read 4, iclass 4, count 0 2006.229.16:12:52.43#ibcon#read 4, iclass 4, count 0 2006.229.16:12:52.43#ibcon#about to read 5, iclass 4, count 0 2006.229.16:12:52.43#ibcon#read 5, iclass 4, count 0 2006.229.16:12:52.43#ibcon#about to read 6, iclass 4, count 0 2006.229.16:12:52.43#ibcon#read 6, iclass 4, count 0 2006.229.16:12:52.43#ibcon#end of sib2, iclass 4, count 0 2006.229.16:12:52.43#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:12:52.43#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:12:52.43#ibcon#[25=USB\r\n] 2006.229.16:12:52.43#ibcon#*before write, iclass 4, count 0 2006.229.16:12:52.43#ibcon#enter sib2, iclass 4, count 0 2006.229.16:12:52.43#ibcon#flushed, iclass 4, count 0 2006.229.16:12:52.43#ibcon#about to write, iclass 4, count 0 2006.229.16:12:52.43#ibcon#wrote, iclass 4, count 0 2006.229.16:12:52.43#ibcon#about to read 3, iclass 4, count 0 2006.229.16:12:52.46#ibcon#read 3, iclass 4, count 0 2006.229.16:12:52.46#ibcon#about to read 4, iclass 4, count 0 2006.229.16:12:52.46#ibcon#read 4, iclass 4, count 0 2006.229.16:12:52.46#ibcon#about to read 5, iclass 4, count 0 2006.229.16:12:52.46#ibcon#read 5, iclass 4, count 0 2006.229.16:12:52.46#ibcon#about to read 6, iclass 4, count 0 2006.229.16:12:52.46#ibcon#read 6, iclass 4, count 0 2006.229.16:12:52.46#ibcon#end of sib2, iclass 4, count 0 2006.229.16:12:52.46#ibcon#*after write, iclass 4, count 0 2006.229.16:12:52.46#ibcon#*before return 0, iclass 4, count 0 2006.229.16:12:52.46#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:52.46#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:52.46#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:12:52.46#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:12:52.46$vck44/valo=5,734.99 2006.229.16:12:52.46#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.16:12:52.46#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.16:12:52.46#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:52.46#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:52.46#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:52.46#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:52.46#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:12:52.46#ibcon#first serial, iclass 6, count 0 2006.229.16:12:52.46#ibcon#enter sib2, iclass 6, count 0 2006.229.16:12:52.46#ibcon#flushed, iclass 6, count 0 2006.229.16:12:52.46#ibcon#about to write, iclass 6, count 0 2006.229.16:12:52.46#ibcon#wrote, iclass 6, count 0 2006.229.16:12:52.46#ibcon#about to read 3, iclass 6, count 0 2006.229.16:12:52.48#ibcon#read 3, iclass 6, count 0 2006.229.16:12:52.48#ibcon#about to read 4, iclass 6, count 0 2006.229.16:12:52.48#ibcon#read 4, iclass 6, count 0 2006.229.16:12:52.48#ibcon#about to read 5, iclass 6, count 0 2006.229.16:12:52.48#ibcon#read 5, iclass 6, count 0 2006.229.16:12:52.48#ibcon#about to read 6, iclass 6, count 0 2006.229.16:12:52.48#ibcon#read 6, iclass 6, count 0 2006.229.16:12:52.48#ibcon#end of sib2, iclass 6, count 0 2006.229.16:12:52.48#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:12:52.48#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:12:52.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:12:52.48#ibcon#*before write, iclass 6, count 0 2006.229.16:12:52.48#ibcon#enter sib2, iclass 6, count 0 2006.229.16:12:52.48#ibcon#flushed, iclass 6, count 0 2006.229.16:12:52.48#ibcon#about to write, iclass 6, count 0 2006.229.16:12:52.48#ibcon#wrote, iclass 6, count 0 2006.229.16:12:52.48#ibcon#about to read 3, iclass 6, count 0 2006.229.16:12:52.52#ibcon#read 3, iclass 6, count 0 2006.229.16:12:52.52#ibcon#about to read 4, iclass 6, count 0 2006.229.16:12:52.52#ibcon#read 4, iclass 6, count 0 2006.229.16:12:52.52#ibcon#about to read 5, iclass 6, count 0 2006.229.16:12:52.52#ibcon#read 5, iclass 6, count 0 2006.229.16:12:52.52#ibcon#about to read 6, iclass 6, count 0 2006.229.16:12:52.52#ibcon#read 6, iclass 6, count 0 2006.229.16:12:52.52#ibcon#end of sib2, iclass 6, count 0 2006.229.16:12:52.52#ibcon#*after write, iclass 6, count 0 2006.229.16:12:52.52#ibcon#*before return 0, iclass 6, count 0 2006.229.16:12:52.52#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:52.52#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:52.52#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:12:52.52#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:12:52.52$vck44/va=5,4 2006.229.16:12:52.52#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.16:12:52.52#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.16:12:52.52#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:52.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:52.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:52.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:52.58#ibcon#enter wrdev, iclass 10, count 2 2006.229.16:12:52.58#ibcon#first serial, iclass 10, count 2 2006.229.16:12:52.58#ibcon#enter sib2, iclass 10, count 2 2006.229.16:12:52.58#ibcon#flushed, iclass 10, count 2 2006.229.16:12:52.58#ibcon#about to write, iclass 10, count 2 2006.229.16:12:52.58#ibcon#wrote, iclass 10, count 2 2006.229.16:12:52.58#ibcon#about to read 3, iclass 10, count 2 2006.229.16:12:52.60#ibcon#read 3, iclass 10, count 2 2006.229.16:12:52.60#ibcon#about to read 4, iclass 10, count 2 2006.229.16:12:52.60#ibcon#read 4, iclass 10, count 2 2006.229.16:12:52.60#ibcon#about to read 5, iclass 10, count 2 2006.229.16:12:52.60#ibcon#read 5, iclass 10, count 2 2006.229.16:12:52.60#ibcon#about to read 6, iclass 10, count 2 2006.229.16:12:52.60#ibcon#read 6, iclass 10, count 2 2006.229.16:12:52.60#ibcon#end of sib2, iclass 10, count 2 2006.229.16:12:52.60#ibcon#*mode == 0, iclass 10, count 2 2006.229.16:12:52.60#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.16:12:52.60#ibcon#[25=AT05-04\r\n] 2006.229.16:12:52.60#ibcon#*before write, iclass 10, count 2 2006.229.16:12:52.60#ibcon#enter sib2, iclass 10, count 2 2006.229.16:12:52.60#ibcon#flushed, iclass 10, count 2 2006.229.16:12:52.60#ibcon#about to write, iclass 10, count 2 2006.229.16:12:52.60#ibcon#wrote, iclass 10, count 2 2006.229.16:12:52.60#ibcon#about to read 3, iclass 10, count 2 2006.229.16:12:52.63#ibcon#read 3, iclass 10, count 2 2006.229.16:12:52.63#ibcon#about to read 4, iclass 10, count 2 2006.229.16:12:52.63#ibcon#read 4, iclass 10, count 2 2006.229.16:12:52.63#ibcon#about to read 5, iclass 10, count 2 2006.229.16:12:52.63#ibcon#read 5, iclass 10, count 2 2006.229.16:12:52.63#ibcon#about to read 6, iclass 10, count 2 2006.229.16:12:52.63#ibcon#read 6, iclass 10, count 2 2006.229.16:12:52.63#ibcon#end of sib2, iclass 10, count 2 2006.229.16:12:52.63#ibcon#*after write, iclass 10, count 2 2006.229.16:12:52.63#ibcon#*before return 0, iclass 10, count 2 2006.229.16:12:52.63#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:52.63#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:52.63#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.16:12:52.63#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:52.63#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:52.75#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:52.75#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:52.75#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:12:52.75#ibcon#first serial, iclass 10, count 0 2006.229.16:12:52.75#ibcon#enter sib2, iclass 10, count 0 2006.229.16:12:52.75#ibcon#flushed, iclass 10, count 0 2006.229.16:12:52.75#ibcon#about to write, iclass 10, count 0 2006.229.16:12:52.75#ibcon#wrote, iclass 10, count 0 2006.229.16:12:52.75#ibcon#about to read 3, iclass 10, count 0 2006.229.16:12:52.77#ibcon#read 3, iclass 10, count 0 2006.229.16:12:52.77#ibcon#about to read 4, iclass 10, count 0 2006.229.16:12:52.77#ibcon#read 4, iclass 10, count 0 2006.229.16:12:52.77#ibcon#about to read 5, iclass 10, count 0 2006.229.16:12:52.77#ibcon#read 5, iclass 10, count 0 2006.229.16:12:52.77#ibcon#about to read 6, iclass 10, count 0 2006.229.16:12:52.77#ibcon#read 6, iclass 10, count 0 2006.229.16:12:52.77#ibcon#end of sib2, iclass 10, count 0 2006.229.16:12:52.77#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:12:52.77#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:12:52.77#ibcon#[25=USB\r\n] 2006.229.16:12:52.77#ibcon#*before write, iclass 10, count 0 2006.229.16:12:52.77#ibcon#enter sib2, iclass 10, count 0 2006.229.16:12:52.77#ibcon#flushed, iclass 10, count 0 2006.229.16:12:52.77#ibcon#about to write, iclass 10, count 0 2006.229.16:12:52.77#ibcon#wrote, iclass 10, count 0 2006.229.16:12:52.77#ibcon#about to read 3, iclass 10, count 0 2006.229.16:12:52.80#ibcon#read 3, iclass 10, count 0 2006.229.16:12:52.80#ibcon#about to read 4, iclass 10, count 0 2006.229.16:12:52.80#ibcon#read 4, iclass 10, count 0 2006.229.16:12:52.80#ibcon#about to read 5, iclass 10, count 0 2006.229.16:12:52.80#ibcon#read 5, iclass 10, count 0 2006.229.16:12:52.80#ibcon#about to read 6, iclass 10, count 0 2006.229.16:12:52.80#ibcon#read 6, iclass 10, count 0 2006.229.16:12:52.80#ibcon#end of sib2, iclass 10, count 0 2006.229.16:12:52.80#ibcon#*after write, iclass 10, count 0 2006.229.16:12:52.80#ibcon#*before return 0, iclass 10, count 0 2006.229.16:12:52.80#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:52.80#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:52.80#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:12:52.80#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:12:52.80$vck44/valo=6,814.99 2006.229.16:12:52.80#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.16:12:52.80#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.16:12:52.80#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:52.80#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:52.80#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:52.80#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:52.80#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:12:52.80#ibcon#first serial, iclass 12, count 0 2006.229.16:12:52.80#ibcon#enter sib2, iclass 12, count 0 2006.229.16:12:52.80#ibcon#flushed, iclass 12, count 0 2006.229.16:12:52.80#ibcon#about to write, iclass 12, count 0 2006.229.16:12:52.80#ibcon#wrote, iclass 12, count 0 2006.229.16:12:52.80#ibcon#about to read 3, iclass 12, count 0 2006.229.16:12:52.82#ibcon#read 3, iclass 12, count 0 2006.229.16:12:52.82#ibcon#about to read 4, iclass 12, count 0 2006.229.16:12:52.82#ibcon#read 4, iclass 12, count 0 2006.229.16:12:52.82#ibcon#about to read 5, iclass 12, count 0 2006.229.16:12:52.82#ibcon#read 5, iclass 12, count 0 2006.229.16:12:52.82#ibcon#about to read 6, iclass 12, count 0 2006.229.16:12:52.82#ibcon#read 6, iclass 12, count 0 2006.229.16:12:52.82#ibcon#end of sib2, iclass 12, count 0 2006.229.16:12:52.82#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:12:52.82#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:12:52.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:12:52.82#ibcon#*before write, iclass 12, count 0 2006.229.16:12:52.82#ibcon#enter sib2, iclass 12, count 0 2006.229.16:12:52.82#ibcon#flushed, iclass 12, count 0 2006.229.16:12:52.82#ibcon#about to write, iclass 12, count 0 2006.229.16:12:52.82#ibcon#wrote, iclass 12, count 0 2006.229.16:12:52.82#ibcon#about to read 3, iclass 12, count 0 2006.229.16:12:52.86#ibcon#read 3, iclass 12, count 0 2006.229.16:12:52.86#ibcon#about to read 4, iclass 12, count 0 2006.229.16:12:52.86#ibcon#read 4, iclass 12, count 0 2006.229.16:12:52.86#ibcon#about to read 5, iclass 12, count 0 2006.229.16:12:52.86#ibcon#read 5, iclass 12, count 0 2006.229.16:12:52.86#ibcon#about to read 6, iclass 12, count 0 2006.229.16:12:52.86#ibcon#read 6, iclass 12, count 0 2006.229.16:12:52.86#ibcon#end of sib2, iclass 12, count 0 2006.229.16:12:52.86#ibcon#*after write, iclass 12, count 0 2006.229.16:12:52.86#ibcon#*before return 0, iclass 12, count 0 2006.229.16:12:52.86#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:52.86#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:52.86#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:12:52.86#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:12:52.86$vck44/va=6,4 2006.229.16:12:52.86#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.16:12:52.86#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.16:12:52.86#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:52.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:52.92#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:52.92#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:52.92#ibcon#enter wrdev, iclass 14, count 2 2006.229.16:12:52.92#ibcon#first serial, iclass 14, count 2 2006.229.16:12:52.92#ibcon#enter sib2, iclass 14, count 2 2006.229.16:12:52.92#ibcon#flushed, iclass 14, count 2 2006.229.16:12:52.92#ibcon#about to write, iclass 14, count 2 2006.229.16:12:52.92#ibcon#wrote, iclass 14, count 2 2006.229.16:12:52.92#ibcon#about to read 3, iclass 14, count 2 2006.229.16:12:52.94#ibcon#read 3, iclass 14, count 2 2006.229.16:12:52.94#ibcon#about to read 4, iclass 14, count 2 2006.229.16:12:52.94#ibcon#read 4, iclass 14, count 2 2006.229.16:12:52.94#ibcon#about to read 5, iclass 14, count 2 2006.229.16:12:52.94#ibcon#read 5, iclass 14, count 2 2006.229.16:12:52.94#ibcon#about to read 6, iclass 14, count 2 2006.229.16:12:52.94#ibcon#read 6, iclass 14, count 2 2006.229.16:12:52.94#ibcon#end of sib2, iclass 14, count 2 2006.229.16:12:52.94#ibcon#*mode == 0, iclass 14, count 2 2006.229.16:12:52.94#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.16:12:52.94#ibcon#[25=AT06-04\r\n] 2006.229.16:12:52.94#ibcon#*before write, iclass 14, count 2 2006.229.16:12:52.94#ibcon#enter sib2, iclass 14, count 2 2006.229.16:12:52.94#ibcon#flushed, iclass 14, count 2 2006.229.16:12:52.94#ibcon#about to write, iclass 14, count 2 2006.229.16:12:52.94#ibcon#wrote, iclass 14, count 2 2006.229.16:12:52.94#ibcon#about to read 3, iclass 14, count 2 2006.229.16:12:52.97#ibcon#read 3, iclass 14, count 2 2006.229.16:12:52.97#ibcon#about to read 4, iclass 14, count 2 2006.229.16:12:52.97#ibcon#read 4, iclass 14, count 2 2006.229.16:12:52.97#ibcon#about to read 5, iclass 14, count 2 2006.229.16:12:52.97#ibcon#read 5, iclass 14, count 2 2006.229.16:12:52.97#ibcon#about to read 6, iclass 14, count 2 2006.229.16:12:52.97#ibcon#read 6, iclass 14, count 2 2006.229.16:12:52.97#ibcon#end of sib2, iclass 14, count 2 2006.229.16:12:52.97#ibcon#*after write, iclass 14, count 2 2006.229.16:12:52.97#ibcon#*before return 0, iclass 14, count 2 2006.229.16:12:52.97#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:52.97#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:52.97#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.16:12:52.97#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:52.97#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:53.09#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:53.09#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:53.09#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:12:53.09#ibcon#first serial, iclass 14, count 0 2006.229.16:12:53.09#ibcon#enter sib2, iclass 14, count 0 2006.229.16:12:53.09#ibcon#flushed, iclass 14, count 0 2006.229.16:12:53.09#ibcon#about to write, iclass 14, count 0 2006.229.16:12:53.09#ibcon#wrote, iclass 14, count 0 2006.229.16:12:53.09#ibcon#about to read 3, iclass 14, count 0 2006.229.16:12:53.11#ibcon#read 3, iclass 14, count 0 2006.229.16:12:53.11#ibcon#about to read 4, iclass 14, count 0 2006.229.16:12:53.11#ibcon#read 4, iclass 14, count 0 2006.229.16:12:53.11#ibcon#about to read 5, iclass 14, count 0 2006.229.16:12:53.11#ibcon#read 5, iclass 14, count 0 2006.229.16:12:53.11#ibcon#about to read 6, iclass 14, count 0 2006.229.16:12:53.11#ibcon#read 6, iclass 14, count 0 2006.229.16:12:53.11#ibcon#end of sib2, iclass 14, count 0 2006.229.16:12:53.11#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:12:53.11#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:12:53.11#ibcon#[25=USB\r\n] 2006.229.16:12:53.11#ibcon#*before write, iclass 14, count 0 2006.229.16:12:53.11#ibcon#enter sib2, iclass 14, count 0 2006.229.16:12:53.11#ibcon#flushed, iclass 14, count 0 2006.229.16:12:53.11#ibcon#about to write, iclass 14, count 0 2006.229.16:12:53.11#ibcon#wrote, iclass 14, count 0 2006.229.16:12:53.11#ibcon#about to read 3, iclass 14, count 0 2006.229.16:12:53.14#ibcon#read 3, iclass 14, count 0 2006.229.16:12:53.14#ibcon#about to read 4, iclass 14, count 0 2006.229.16:12:53.14#ibcon#read 4, iclass 14, count 0 2006.229.16:12:53.14#ibcon#about to read 5, iclass 14, count 0 2006.229.16:12:53.14#ibcon#read 5, iclass 14, count 0 2006.229.16:12:53.14#ibcon#about to read 6, iclass 14, count 0 2006.229.16:12:53.14#ibcon#read 6, iclass 14, count 0 2006.229.16:12:53.14#ibcon#end of sib2, iclass 14, count 0 2006.229.16:12:53.14#ibcon#*after write, iclass 14, count 0 2006.229.16:12:53.14#ibcon#*before return 0, iclass 14, count 0 2006.229.16:12:53.14#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:53.14#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:53.14#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:12:53.14#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:12:53.14$vck44/valo=7,864.99 2006.229.16:12:53.14#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:12:53.14#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:12:53.14#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:53.14#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:53.14#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:53.14#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:53.14#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:12:53.14#ibcon#first serial, iclass 16, count 0 2006.229.16:12:53.14#ibcon#enter sib2, iclass 16, count 0 2006.229.16:12:53.14#ibcon#flushed, iclass 16, count 0 2006.229.16:12:53.14#ibcon#about to write, iclass 16, count 0 2006.229.16:12:53.14#ibcon#wrote, iclass 16, count 0 2006.229.16:12:53.14#ibcon#about to read 3, iclass 16, count 0 2006.229.16:12:53.16#ibcon#read 3, iclass 16, count 0 2006.229.16:12:53.16#ibcon#about to read 4, iclass 16, count 0 2006.229.16:12:53.16#ibcon#read 4, iclass 16, count 0 2006.229.16:12:53.16#ibcon#about to read 5, iclass 16, count 0 2006.229.16:12:53.16#ibcon#read 5, iclass 16, count 0 2006.229.16:12:53.16#ibcon#about to read 6, iclass 16, count 0 2006.229.16:12:53.16#ibcon#read 6, iclass 16, count 0 2006.229.16:12:53.16#ibcon#end of sib2, iclass 16, count 0 2006.229.16:12:53.16#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:12:53.16#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:12:53.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:12:53.16#ibcon#*before write, iclass 16, count 0 2006.229.16:12:53.16#ibcon#enter sib2, iclass 16, count 0 2006.229.16:12:53.16#ibcon#flushed, iclass 16, count 0 2006.229.16:12:53.16#ibcon#about to write, iclass 16, count 0 2006.229.16:12:53.16#ibcon#wrote, iclass 16, count 0 2006.229.16:12:53.16#ibcon#about to read 3, iclass 16, count 0 2006.229.16:12:53.20#ibcon#read 3, iclass 16, count 0 2006.229.16:12:53.20#ibcon#about to read 4, iclass 16, count 0 2006.229.16:12:53.20#ibcon#read 4, iclass 16, count 0 2006.229.16:12:53.20#ibcon#about to read 5, iclass 16, count 0 2006.229.16:12:53.20#ibcon#read 5, iclass 16, count 0 2006.229.16:12:53.20#ibcon#about to read 6, iclass 16, count 0 2006.229.16:12:53.20#ibcon#read 6, iclass 16, count 0 2006.229.16:12:53.20#ibcon#end of sib2, iclass 16, count 0 2006.229.16:12:53.20#ibcon#*after write, iclass 16, count 0 2006.229.16:12:53.20#ibcon#*before return 0, iclass 16, count 0 2006.229.16:12:53.20#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:53.20#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:53.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:12:53.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:12:53.20$vck44/va=7,5 2006.229.16:12:53.20#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:12:53.20#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:12:53.20#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:53.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:53.26#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:53.26#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:53.26#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:12:53.26#ibcon#first serial, iclass 18, count 2 2006.229.16:12:53.26#ibcon#enter sib2, iclass 18, count 2 2006.229.16:12:53.26#ibcon#flushed, iclass 18, count 2 2006.229.16:12:53.26#ibcon#about to write, iclass 18, count 2 2006.229.16:12:53.26#ibcon#wrote, iclass 18, count 2 2006.229.16:12:53.26#ibcon#about to read 3, iclass 18, count 2 2006.229.16:12:53.28#ibcon#read 3, iclass 18, count 2 2006.229.16:12:53.28#ibcon#about to read 4, iclass 18, count 2 2006.229.16:12:53.28#ibcon#read 4, iclass 18, count 2 2006.229.16:12:53.28#ibcon#about to read 5, iclass 18, count 2 2006.229.16:12:53.28#ibcon#read 5, iclass 18, count 2 2006.229.16:12:53.28#ibcon#about to read 6, iclass 18, count 2 2006.229.16:12:53.28#ibcon#read 6, iclass 18, count 2 2006.229.16:12:53.28#ibcon#end of sib2, iclass 18, count 2 2006.229.16:12:53.28#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:12:53.28#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:12:53.28#ibcon#[25=AT07-05\r\n] 2006.229.16:12:53.28#ibcon#*before write, iclass 18, count 2 2006.229.16:12:53.28#ibcon#enter sib2, iclass 18, count 2 2006.229.16:12:53.28#ibcon#flushed, iclass 18, count 2 2006.229.16:12:53.28#ibcon#about to write, iclass 18, count 2 2006.229.16:12:53.28#ibcon#wrote, iclass 18, count 2 2006.229.16:12:53.28#ibcon#about to read 3, iclass 18, count 2 2006.229.16:12:53.31#ibcon#read 3, iclass 18, count 2 2006.229.16:12:53.31#ibcon#about to read 4, iclass 18, count 2 2006.229.16:12:53.31#ibcon#read 4, iclass 18, count 2 2006.229.16:12:53.31#ibcon#about to read 5, iclass 18, count 2 2006.229.16:12:53.31#ibcon#read 5, iclass 18, count 2 2006.229.16:12:53.31#ibcon#about to read 6, iclass 18, count 2 2006.229.16:12:53.31#ibcon#read 6, iclass 18, count 2 2006.229.16:12:53.31#ibcon#end of sib2, iclass 18, count 2 2006.229.16:12:53.31#ibcon#*after write, iclass 18, count 2 2006.229.16:12:53.31#ibcon#*before return 0, iclass 18, count 2 2006.229.16:12:53.31#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:53.31#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:53.31#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:12:53.31#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:53.31#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:53.43#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:53.43#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:53.43#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:12:53.43#ibcon#first serial, iclass 18, count 0 2006.229.16:12:53.43#ibcon#enter sib2, iclass 18, count 0 2006.229.16:12:53.43#ibcon#flushed, iclass 18, count 0 2006.229.16:12:53.43#ibcon#about to write, iclass 18, count 0 2006.229.16:12:53.43#ibcon#wrote, iclass 18, count 0 2006.229.16:12:53.43#ibcon#about to read 3, iclass 18, count 0 2006.229.16:12:53.45#ibcon#read 3, iclass 18, count 0 2006.229.16:12:53.45#ibcon#about to read 4, iclass 18, count 0 2006.229.16:12:53.45#ibcon#read 4, iclass 18, count 0 2006.229.16:12:53.45#ibcon#about to read 5, iclass 18, count 0 2006.229.16:12:53.45#ibcon#read 5, iclass 18, count 0 2006.229.16:12:53.45#ibcon#about to read 6, iclass 18, count 0 2006.229.16:12:53.45#ibcon#read 6, iclass 18, count 0 2006.229.16:12:53.45#ibcon#end of sib2, iclass 18, count 0 2006.229.16:12:53.45#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:12:53.45#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:12:53.45#ibcon#[25=USB\r\n] 2006.229.16:12:53.45#ibcon#*before write, iclass 18, count 0 2006.229.16:12:53.45#ibcon#enter sib2, iclass 18, count 0 2006.229.16:12:53.45#ibcon#flushed, iclass 18, count 0 2006.229.16:12:53.45#ibcon#about to write, iclass 18, count 0 2006.229.16:12:53.45#ibcon#wrote, iclass 18, count 0 2006.229.16:12:53.45#ibcon#about to read 3, iclass 18, count 0 2006.229.16:12:53.48#ibcon#read 3, iclass 18, count 0 2006.229.16:12:53.48#ibcon#about to read 4, iclass 18, count 0 2006.229.16:12:53.48#ibcon#read 4, iclass 18, count 0 2006.229.16:12:53.48#ibcon#about to read 5, iclass 18, count 0 2006.229.16:12:53.48#ibcon#read 5, iclass 18, count 0 2006.229.16:12:53.48#ibcon#about to read 6, iclass 18, count 0 2006.229.16:12:53.48#ibcon#read 6, iclass 18, count 0 2006.229.16:12:53.48#ibcon#end of sib2, iclass 18, count 0 2006.229.16:12:53.48#ibcon#*after write, iclass 18, count 0 2006.229.16:12:53.48#ibcon#*before return 0, iclass 18, count 0 2006.229.16:12:53.48#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:53.48#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:53.48#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:12:53.48#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:12:53.48$vck44/valo=8,884.99 2006.229.16:12:53.48#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.16:12:53.48#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.16:12:53.48#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:53.48#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:12:53.48#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:12:53.48#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:12:53.48#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:12:53.48#ibcon#first serial, iclass 20, count 0 2006.229.16:12:53.48#ibcon#enter sib2, iclass 20, count 0 2006.229.16:12:53.48#ibcon#flushed, iclass 20, count 0 2006.229.16:12:53.48#ibcon#about to write, iclass 20, count 0 2006.229.16:12:53.48#ibcon#wrote, iclass 20, count 0 2006.229.16:12:53.48#ibcon#about to read 3, iclass 20, count 0 2006.229.16:12:53.50#ibcon#read 3, iclass 20, count 0 2006.229.16:12:53.50#ibcon#about to read 4, iclass 20, count 0 2006.229.16:12:53.50#ibcon#read 4, iclass 20, count 0 2006.229.16:12:53.50#ibcon#about to read 5, iclass 20, count 0 2006.229.16:12:53.50#ibcon#read 5, iclass 20, count 0 2006.229.16:12:53.50#ibcon#about to read 6, iclass 20, count 0 2006.229.16:12:53.50#ibcon#read 6, iclass 20, count 0 2006.229.16:12:53.50#ibcon#end of sib2, iclass 20, count 0 2006.229.16:12:53.50#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:12:53.50#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:12:53.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:12:53.50#ibcon#*before write, iclass 20, count 0 2006.229.16:12:53.50#ibcon#enter sib2, iclass 20, count 0 2006.229.16:12:53.50#ibcon#flushed, iclass 20, count 0 2006.229.16:12:53.50#ibcon#about to write, iclass 20, count 0 2006.229.16:12:53.50#ibcon#wrote, iclass 20, count 0 2006.229.16:12:53.50#ibcon#about to read 3, iclass 20, count 0 2006.229.16:12:53.54#ibcon#read 3, iclass 20, count 0 2006.229.16:12:53.54#ibcon#about to read 4, iclass 20, count 0 2006.229.16:12:53.54#ibcon#read 4, iclass 20, count 0 2006.229.16:12:53.54#ibcon#about to read 5, iclass 20, count 0 2006.229.16:12:53.54#ibcon#read 5, iclass 20, count 0 2006.229.16:12:53.54#ibcon#about to read 6, iclass 20, count 0 2006.229.16:12:53.54#ibcon#read 6, iclass 20, count 0 2006.229.16:12:53.54#ibcon#end of sib2, iclass 20, count 0 2006.229.16:12:53.54#ibcon#*after write, iclass 20, count 0 2006.229.16:12:53.54#ibcon#*before return 0, iclass 20, count 0 2006.229.16:12:53.54#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:12:53.54#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:12:53.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:12:53.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:12:53.54$vck44/va=8,6 2006.229.16:12:53.54#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.16:12:53.54#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.16:12:53.54#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:53.54#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:12:53.60#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:12:53.60#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:12:53.60#ibcon#enter wrdev, iclass 22, count 2 2006.229.16:12:53.60#ibcon#first serial, iclass 22, count 2 2006.229.16:12:53.60#ibcon#enter sib2, iclass 22, count 2 2006.229.16:12:53.60#ibcon#flushed, iclass 22, count 2 2006.229.16:12:53.60#ibcon#about to write, iclass 22, count 2 2006.229.16:12:53.60#ibcon#wrote, iclass 22, count 2 2006.229.16:12:53.60#ibcon#about to read 3, iclass 22, count 2 2006.229.16:12:53.62#ibcon#read 3, iclass 22, count 2 2006.229.16:12:53.62#ibcon#about to read 4, iclass 22, count 2 2006.229.16:12:53.62#ibcon#read 4, iclass 22, count 2 2006.229.16:12:53.62#ibcon#about to read 5, iclass 22, count 2 2006.229.16:12:53.62#ibcon#read 5, iclass 22, count 2 2006.229.16:12:53.62#ibcon#about to read 6, iclass 22, count 2 2006.229.16:12:53.62#ibcon#read 6, iclass 22, count 2 2006.229.16:12:53.62#ibcon#end of sib2, iclass 22, count 2 2006.229.16:12:53.62#ibcon#*mode == 0, iclass 22, count 2 2006.229.16:12:53.62#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.16:12:53.62#ibcon#[25=AT08-06\r\n] 2006.229.16:12:53.62#ibcon#*before write, iclass 22, count 2 2006.229.16:12:53.62#ibcon#enter sib2, iclass 22, count 2 2006.229.16:12:53.62#ibcon#flushed, iclass 22, count 2 2006.229.16:12:53.62#ibcon#about to write, iclass 22, count 2 2006.229.16:12:53.62#ibcon#wrote, iclass 22, count 2 2006.229.16:12:53.62#ibcon#about to read 3, iclass 22, count 2 2006.229.16:12:53.65#ibcon#read 3, iclass 22, count 2 2006.229.16:12:53.65#ibcon#about to read 4, iclass 22, count 2 2006.229.16:12:53.65#ibcon#read 4, iclass 22, count 2 2006.229.16:12:53.65#ibcon#about to read 5, iclass 22, count 2 2006.229.16:12:53.65#ibcon#read 5, iclass 22, count 2 2006.229.16:12:53.65#ibcon#about to read 6, iclass 22, count 2 2006.229.16:12:53.65#ibcon#read 6, iclass 22, count 2 2006.229.16:12:53.65#ibcon#end of sib2, iclass 22, count 2 2006.229.16:12:53.65#ibcon#*after write, iclass 22, count 2 2006.229.16:12:53.65#ibcon#*before return 0, iclass 22, count 2 2006.229.16:12:53.65#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:12:53.65#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:12:53.65#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.16:12:53.65#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:53.65#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:12:53.77#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:12:53.77#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:12:53.77#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:12:53.77#ibcon#first serial, iclass 22, count 0 2006.229.16:12:53.77#ibcon#enter sib2, iclass 22, count 0 2006.229.16:12:53.77#ibcon#flushed, iclass 22, count 0 2006.229.16:12:53.77#ibcon#about to write, iclass 22, count 0 2006.229.16:12:53.77#ibcon#wrote, iclass 22, count 0 2006.229.16:12:53.77#ibcon#about to read 3, iclass 22, count 0 2006.229.16:12:53.79#ibcon#read 3, iclass 22, count 0 2006.229.16:12:53.79#ibcon#about to read 4, iclass 22, count 0 2006.229.16:12:53.79#ibcon#read 4, iclass 22, count 0 2006.229.16:12:53.79#ibcon#about to read 5, iclass 22, count 0 2006.229.16:12:53.79#ibcon#read 5, iclass 22, count 0 2006.229.16:12:53.79#ibcon#about to read 6, iclass 22, count 0 2006.229.16:12:53.79#ibcon#read 6, iclass 22, count 0 2006.229.16:12:53.79#ibcon#end of sib2, iclass 22, count 0 2006.229.16:12:53.79#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:12:53.79#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:12:53.79#ibcon#[25=USB\r\n] 2006.229.16:12:53.79#ibcon#*before write, iclass 22, count 0 2006.229.16:12:53.79#ibcon#enter sib2, iclass 22, count 0 2006.229.16:12:53.79#ibcon#flushed, iclass 22, count 0 2006.229.16:12:53.79#ibcon#about to write, iclass 22, count 0 2006.229.16:12:53.79#ibcon#wrote, iclass 22, count 0 2006.229.16:12:53.79#ibcon#about to read 3, iclass 22, count 0 2006.229.16:12:53.82#ibcon#read 3, iclass 22, count 0 2006.229.16:12:53.82#ibcon#about to read 4, iclass 22, count 0 2006.229.16:12:53.82#ibcon#read 4, iclass 22, count 0 2006.229.16:12:53.82#ibcon#about to read 5, iclass 22, count 0 2006.229.16:12:53.82#ibcon#read 5, iclass 22, count 0 2006.229.16:12:53.82#ibcon#about to read 6, iclass 22, count 0 2006.229.16:12:53.82#ibcon#read 6, iclass 22, count 0 2006.229.16:12:53.82#ibcon#end of sib2, iclass 22, count 0 2006.229.16:12:53.82#ibcon#*after write, iclass 22, count 0 2006.229.16:12:53.82#ibcon#*before return 0, iclass 22, count 0 2006.229.16:12:53.82#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:12:53.82#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:12:53.82#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:12:53.82#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:12:53.82$vck44/vblo=1,629.99 2006.229.16:12:53.82#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.16:12:53.82#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.16:12:53.82#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:53.82#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:53.82#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:53.82#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:53.82#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:12:53.82#ibcon#first serial, iclass 24, count 0 2006.229.16:12:53.82#ibcon#enter sib2, iclass 24, count 0 2006.229.16:12:53.82#ibcon#flushed, iclass 24, count 0 2006.229.16:12:53.82#ibcon#about to write, iclass 24, count 0 2006.229.16:12:53.82#ibcon#wrote, iclass 24, count 0 2006.229.16:12:53.82#ibcon#about to read 3, iclass 24, count 0 2006.229.16:12:53.84#ibcon#read 3, iclass 24, count 0 2006.229.16:12:53.84#ibcon#about to read 4, iclass 24, count 0 2006.229.16:12:53.84#ibcon#read 4, iclass 24, count 0 2006.229.16:12:53.84#ibcon#about to read 5, iclass 24, count 0 2006.229.16:12:53.84#ibcon#read 5, iclass 24, count 0 2006.229.16:12:53.84#ibcon#about to read 6, iclass 24, count 0 2006.229.16:12:53.84#ibcon#read 6, iclass 24, count 0 2006.229.16:12:53.84#ibcon#end of sib2, iclass 24, count 0 2006.229.16:12:53.84#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:12:53.84#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:12:53.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:12:53.84#ibcon#*before write, iclass 24, count 0 2006.229.16:12:53.84#ibcon#enter sib2, iclass 24, count 0 2006.229.16:12:53.84#ibcon#flushed, iclass 24, count 0 2006.229.16:12:53.84#ibcon#about to write, iclass 24, count 0 2006.229.16:12:53.84#ibcon#wrote, iclass 24, count 0 2006.229.16:12:53.84#ibcon#about to read 3, iclass 24, count 0 2006.229.16:12:53.88#ibcon#read 3, iclass 24, count 0 2006.229.16:12:53.88#ibcon#about to read 4, iclass 24, count 0 2006.229.16:12:53.88#ibcon#read 4, iclass 24, count 0 2006.229.16:12:53.88#ibcon#about to read 5, iclass 24, count 0 2006.229.16:12:53.88#ibcon#read 5, iclass 24, count 0 2006.229.16:12:53.88#ibcon#about to read 6, iclass 24, count 0 2006.229.16:12:53.88#ibcon#read 6, iclass 24, count 0 2006.229.16:12:53.88#ibcon#end of sib2, iclass 24, count 0 2006.229.16:12:53.88#ibcon#*after write, iclass 24, count 0 2006.229.16:12:53.88#ibcon#*before return 0, iclass 24, count 0 2006.229.16:12:53.88#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:53.88#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:53.88#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:12:53.88#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:12:53.88$vck44/vb=1,4 2006.229.16:12:53.88#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.16:12:53.88#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.16:12:53.88#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:53.88#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:12:53.88#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:12:53.88#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:12:53.88#ibcon#enter wrdev, iclass 26, count 2 2006.229.16:12:53.88#ibcon#first serial, iclass 26, count 2 2006.229.16:12:53.88#ibcon#enter sib2, iclass 26, count 2 2006.229.16:12:53.88#ibcon#flushed, iclass 26, count 2 2006.229.16:12:53.88#ibcon#about to write, iclass 26, count 2 2006.229.16:12:53.88#ibcon#wrote, iclass 26, count 2 2006.229.16:12:53.88#ibcon#about to read 3, iclass 26, count 2 2006.229.16:12:53.90#ibcon#read 3, iclass 26, count 2 2006.229.16:12:53.90#ibcon#about to read 4, iclass 26, count 2 2006.229.16:12:53.90#ibcon#read 4, iclass 26, count 2 2006.229.16:12:53.90#ibcon#about to read 5, iclass 26, count 2 2006.229.16:12:53.90#ibcon#read 5, iclass 26, count 2 2006.229.16:12:53.90#ibcon#about to read 6, iclass 26, count 2 2006.229.16:12:53.90#ibcon#read 6, iclass 26, count 2 2006.229.16:12:53.90#ibcon#end of sib2, iclass 26, count 2 2006.229.16:12:53.90#ibcon#*mode == 0, iclass 26, count 2 2006.229.16:12:53.90#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.16:12:53.90#ibcon#[27=AT01-04\r\n] 2006.229.16:12:53.90#ibcon#*before write, iclass 26, count 2 2006.229.16:12:53.90#ibcon#enter sib2, iclass 26, count 2 2006.229.16:12:53.90#ibcon#flushed, iclass 26, count 2 2006.229.16:12:53.90#ibcon#about to write, iclass 26, count 2 2006.229.16:12:53.90#ibcon#wrote, iclass 26, count 2 2006.229.16:12:53.90#ibcon#about to read 3, iclass 26, count 2 2006.229.16:12:53.93#ibcon#read 3, iclass 26, count 2 2006.229.16:12:53.93#ibcon#about to read 4, iclass 26, count 2 2006.229.16:12:53.93#ibcon#read 4, iclass 26, count 2 2006.229.16:12:53.93#ibcon#about to read 5, iclass 26, count 2 2006.229.16:12:53.93#ibcon#read 5, iclass 26, count 2 2006.229.16:12:53.93#ibcon#about to read 6, iclass 26, count 2 2006.229.16:12:53.93#ibcon#read 6, iclass 26, count 2 2006.229.16:12:53.93#ibcon#end of sib2, iclass 26, count 2 2006.229.16:12:53.93#ibcon#*after write, iclass 26, count 2 2006.229.16:12:53.93#ibcon#*before return 0, iclass 26, count 2 2006.229.16:12:53.93#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:12:53.93#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:12:53.93#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.16:12:53.93#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:53.93#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:12:54.05#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:12:54.05#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:12:54.05#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:12:54.05#ibcon#first serial, iclass 26, count 0 2006.229.16:12:54.05#ibcon#enter sib2, iclass 26, count 0 2006.229.16:12:54.05#ibcon#flushed, iclass 26, count 0 2006.229.16:12:54.05#ibcon#about to write, iclass 26, count 0 2006.229.16:12:54.05#ibcon#wrote, iclass 26, count 0 2006.229.16:12:54.05#ibcon#about to read 3, iclass 26, count 0 2006.229.16:12:54.07#ibcon#read 3, iclass 26, count 0 2006.229.16:12:54.07#ibcon#about to read 4, iclass 26, count 0 2006.229.16:12:54.07#ibcon#read 4, iclass 26, count 0 2006.229.16:12:54.07#ibcon#about to read 5, iclass 26, count 0 2006.229.16:12:54.07#ibcon#read 5, iclass 26, count 0 2006.229.16:12:54.07#ibcon#about to read 6, iclass 26, count 0 2006.229.16:12:54.07#ibcon#read 6, iclass 26, count 0 2006.229.16:12:54.07#ibcon#end of sib2, iclass 26, count 0 2006.229.16:12:54.07#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:12:54.07#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:12:54.07#ibcon#[27=USB\r\n] 2006.229.16:12:54.07#ibcon#*before write, iclass 26, count 0 2006.229.16:12:54.07#ibcon#enter sib2, iclass 26, count 0 2006.229.16:12:54.07#ibcon#flushed, iclass 26, count 0 2006.229.16:12:54.07#ibcon#about to write, iclass 26, count 0 2006.229.16:12:54.07#ibcon#wrote, iclass 26, count 0 2006.229.16:12:54.07#ibcon#about to read 3, iclass 26, count 0 2006.229.16:12:54.10#ibcon#read 3, iclass 26, count 0 2006.229.16:12:54.10#ibcon#about to read 4, iclass 26, count 0 2006.229.16:12:54.10#ibcon#read 4, iclass 26, count 0 2006.229.16:12:54.10#ibcon#about to read 5, iclass 26, count 0 2006.229.16:12:54.10#ibcon#read 5, iclass 26, count 0 2006.229.16:12:54.10#ibcon#about to read 6, iclass 26, count 0 2006.229.16:12:54.10#ibcon#read 6, iclass 26, count 0 2006.229.16:12:54.10#ibcon#end of sib2, iclass 26, count 0 2006.229.16:12:54.10#ibcon#*after write, iclass 26, count 0 2006.229.16:12:54.10#ibcon#*before return 0, iclass 26, count 0 2006.229.16:12:54.10#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:12:54.10#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:12:54.10#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:12:54.10#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:12:54.10$vck44/vblo=2,634.99 2006.229.16:12:54.10#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.16:12:54.10#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.16:12:54.10#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:54.10#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:54.10#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:54.10#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:54.10#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:12:54.10#ibcon#first serial, iclass 28, count 0 2006.229.16:12:54.10#ibcon#enter sib2, iclass 28, count 0 2006.229.16:12:54.10#ibcon#flushed, iclass 28, count 0 2006.229.16:12:54.10#ibcon#about to write, iclass 28, count 0 2006.229.16:12:54.10#ibcon#wrote, iclass 28, count 0 2006.229.16:12:54.10#ibcon#about to read 3, iclass 28, count 0 2006.229.16:12:54.12#ibcon#read 3, iclass 28, count 0 2006.229.16:12:54.12#ibcon#about to read 4, iclass 28, count 0 2006.229.16:12:54.12#ibcon#read 4, iclass 28, count 0 2006.229.16:12:54.12#ibcon#about to read 5, iclass 28, count 0 2006.229.16:12:54.12#ibcon#read 5, iclass 28, count 0 2006.229.16:12:54.12#ibcon#about to read 6, iclass 28, count 0 2006.229.16:12:54.12#ibcon#read 6, iclass 28, count 0 2006.229.16:12:54.12#ibcon#end of sib2, iclass 28, count 0 2006.229.16:12:54.12#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:12:54.12#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:12:54.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:12:54.12#ibcon#*before write, iclass 28, count 0 2006.229.16:12:54.12#ibcon#enter sib2, iclass 28, count 0 2006.229.16:12:54.12#ibcon#flushed, iclass 28, count 0 2006.229.16:12:54.12#ibcon#about to write, iclass 28, count 0 2006.229.16:12:54.12#ibcon#wrote, iclass 28, count 0 2006.229.16:12:54.12#ibcon#about to read 3, iclass 28, count 0 2006.229.16:12:54.16#ibcon#read 3, iclass 28, count 0 2006.229.16:12:54.16#ibcon#about to read 4, iclass 28, count 0 2006.229.16:12:54.16#ibcon#read 4, iclass 28, count 0 2006.229.16:12:54.16#ibcon#about to read 5, iclass 28, count 0 2006.229.16:12:54.16#ibcon#read 5, iclass 28, count 0 2006.229.16:12:54.16#ibcon#about to read 6, iclass 28, count 0 2006.229.16:12:54.16#ibcon#read 6, iclass 28, count 0 2006.229.16:12:54.16#ibcon#end of sib2, iclass 28, count 0 2006.229.16:12:54.16#ibcon#*after write, iclass 28, count 0 2006.229.16:12:54.16#ibcon#*before return 0, iclass 28, count 0 2006.229.16:12:54.16#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:54.16#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:12:54.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:12:54.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:12:54.16$vck44/vb=2,4 2006.229.16:12:54.16#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.16:12:54.16#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.16:12:54.16#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:54.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:54.22#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:54.22#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:54.22#ibcon#enter wrdev, iclass 30, count 2 2006.229.16:12:54.22#ibcon#first serial, iclass 30, count 2 2006.229.16:12:54.22#ibcon#enter sib2, iclass 30, count 2 2006.229.16:12:54.22#ibcon#flushed, iclass 30, count 2 2006.229.16:12:54.22#ibcon#about to write, iclass 30, count 2 2006.229.16:12:54.22#ibcon#wrote, iclass 30, count 2 2006.229.16:12:54.22#ibcon#about to read 3, iclass 30, count 2 2006.229.16:12:54.24#ibcon#read 3, iclass 30, count 2 2006.229.16:12:54.24#ibcon#about to read 4, iclass 30, count 2 2006.229.16:12:54.24#ibcon#read 4, iclass 30, count 2 2006.229.16:12:54.24#ibcon#about to read 5, iclass 30, count 2 2006.229.16:12:54.24#ibcon#read 5, iclass 30, count 2 2006.229.16:12:54.24#ibcon#about to read 6, iclass 30, count 2 2006.229.16:12:54.24#ibcon#read 6, iclass 30, count 2 2006.229.16:12:54.24#ibcon#end of sib2, iclass 30, count 2 2006.229.16:12:54.24#ibcon#*mode == 0, iclass 30, count 2 2006.229.16:12:54.24#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.16:12:54.24#ibcon#[27=AT02-04\r\n] 2006.229.16:12:54.24#ibcon#*before write, iclass 30, count 2 2006.229.16:12:54.24#ibcon#enter sib2, iclass 30, count 2 2006.229.16:12:54.24#ibcon#flushed, iclass 30, count 2 2006.229.16:12:54.24#ibcon#about to write, iclass 30, count 2 2006.229.16:12:54.24#ibcon#wrote, iclass 30, count 2 2006.229.16:12:54.24#ibcon#about to read 3, iclass 30, count 2 2006.229.16:12:54.27#ibcon#read 3, iclass 30, count 2 2006.229.16:12:54.27#ibcon#about to read 4, iclass 30, count 2 2006.229.16:12:54.27#ibcon#read 4, iclass 30, count 2 2006.229.16:12:54.27#ibcon#about to read 5, iclass 30, count 2 2006.229.16:12:54.27#ibcon#read 5, iclass 30, count 2 2006.229.16:12:54.27#ibcon#about to read 6, iclass 30, count 2 2006.229.16:12:54.27#ibcon#read 6, iclass 30, count 2 2006.229.16:12:54.27#ibcon#end of sib2, iclass 30, count 2 2006.229.16:12:54.27#ibcon#*after write, iclass 30, count 2 2006.229.16:12:54.27#ibcon#*before return 0, iclass 30, count 2 2006.229.16:12:54.27#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:54.27#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:12:54.27#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.16:12:54.27#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:54.27#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:54.39#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:54.39#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:54.39#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:12:54.39#ibcon#first serial, iclass 30, count 0 2006.229.16:12:54.39#ibcon#enter sib2, iclass 30, count 0 2006.229.16:12:54.39#ibcon#flushed, iclass 30, count 0 2006.229.16:12:54.39#ibcon#about to write, iclass 30, count 0 2006.229.16:12:54.39#ibcon#wrote, iclass 30, count 0 2006.229.16:12:54.39#ibcon#about to read 3, iclass 30, count 0 2006.229.16:12:54.41#ibcon#read 3, iclass 30, count 0 2006.229.16:12:54.41#ibcon#about to read 4, iclass 30, count 0 2006.229.16:12:54.41#ibcon#read 4, iclass 30, count 0 2006.229.16:12:54.41#ibcon#about to read 5, iclass 30, count 0 2006.229.16:12:54.41#ibcon#read 5, iclass 30, count 0 2006.229.16:12:54.41#ibcon#about to read 6, iclass 30, count 0 2006.229.16:12:54.41#ibcon#read 6, iclass 30, count 0 2006.229.16:12:54.41#ibcon#end of sib2, iclass 30, count 0 2006.229.16:12:54.41#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:12:54.41#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:12:54.41#ibcon#[27=USB\r\n] 2006.229.16:12:54.41#ibcon#*before write, iclass 30, count 0 2006.229.16:12:54.41#ibcon#enter sib2, iclass 30, count 0 2006.229.16:12:54.41#ibcon#flushed, iclass 30, count 0 2006.229.16:12:54.41#ibcon#about to write, iclass 30, count 0 2006.229.16:12:54.41#ibcon#wrote, iclass 30, count 0 2006.229.16:12:54.41#ibcon#about to read 3, iclass 30, count 0 2006.229.16:12:54.44#ibcon#read 3, iclass 30, count 0 2006.229.16:12:54.44#ibcon#about to read 4, iclass 30, count 0 2006.229.16:12:54.44#ibcon#read 4, iclass 30, count 0 2006.229.16:12:54.44#ibcon#about to read 5, iclass 30, count 0 2006.229.16:12:54.44#ibcon#read 5, iclass 30, count 0 2006.229.16:12:54.44#ibcon#about to read 6, iclass 30, count 0 2006.229.16:12:54.44#ibcon#read 6, iclass 30, count 0 2006.229.16:12:54.44#ibcon#end of sib2, iclass 30, count 0 2006.229.16:12:54.44#ibcon#*after write, iclass 30, count 0 2006.229.16:12:54.44#ibcon#*before return 0, iclass 30, count 0 2006.229.16:12:54.44#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:54.44#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:12:54.44#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:12:54.44#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:12:54.44$vck44/vblo=3,649.99 2006.229.16:12:54.44#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:12:54.44#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:12:54.44#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:54.44#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:54.44#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:54.44#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:54.44#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:12:54.44#ibcon#first serial, iclass 32, count 0 2006.229.16:12:54.44#ibcon#enter sib2, iclass 32, count 0 2006.229.16:12:54.44#ibcon#flushed, iclass 32, count 0 2006.229.16:12:54.44#ibcon#about to write, iclass 32, count 0 2006.229.16:12:54.44#ibcon#wrote, iclass 32, count 0 2006.229.16:12:54.44#ibcon#about to read 3, iclass 32, count 0 2006.229.16:12:54.46#ibcon#read 3, iclass 32, count 0 2006.229.16:12:54.46#ibcon#about to read 4, iclass 32, count 0 2006.229.16:12:54.46#ibcon#read 4, iclass 32, count 0 2006.229.16:12:54.46#ibcon#about to read 5, iclass 32, count 0 2006.229.16:12:54.46#ibcon#read 5, iclass 32, count 0 2006.229.16:12:54.46#ibcon#about to read 6, iclass 32, count 0 2006.229.16:12:54.46#ibcon#read 6, iclass 32, count 0 2006.229.16:12:54.46#ibcon#end of sib2, iclass 32, count 0 2006.229.16:12:54.46#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:12:54.46#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:12:54.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:12:54.46#ibcon#*before write, iclass 32, count 0 2006.229.16:12:54.46#ibcon#enter sib2, iclass 32, count 0 2006.229.16:12:54.46#ibcon#flushed, iclass 32, count 0 2006.229.16:12:54.46#ibcon#about to write, iclass 32, count 0 2006.229.16:12:54.46#ibcon#wrote, iclass 32, count 0 2006.229.16:12:54.46#ibcon#about to read 3, iclass 32, count 0 2006.229.16:12:54.50#ibcon#read 3, iclass 32, count 0 2006.229.16:12:54.50#ibcon#about to read 4, iclass 32, count 0 2006.229.16:12:54.50#ibcon#read 4, iclass 32, count 0 2006.229.16:12:54.50#ibcon#about to read 5, iclass 32, count 0 2006.229.16:12:54.50#ibcon#read 5, iclass 32, count 0 2006.229.16:12:54.50#ibcon#about to read 6, iclass 32, count 0 2006.229.16:12:54.50#ibcon#read 6, iclass 32, count 0 2006.229.16:12:54.50#ibcon#end of sib2, iclass 32, count 0 2006.229.16:12:54.50#ibcon#*after write, iclass 32, count 0 2006.229.16:12:54.50#ibcon#*before return 0, iclass 32, count 0 2006.229.16:12:54.50#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:54.50#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:12:54.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:12:54.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:12:54.50$vck44/vb=3,4 2006.229.16:12:54.50#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.16:12:54.50#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.16:12:54.50#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:54.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:54.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:54.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:54.56#ibcon#enter wrdev, iclass 34, count 2 2006.229.16:12:54.56#ibcon#first serial, iclass 34, count 2 2006.229.16:12:54.56#ibcon#enter sib2, iclass 34, count 2 2006.229.16:12:54.56#ibcon#flushed, iclass 34, count 2 2006.229.16:12:54.56#ibcon#about to write, iclass 34, count 2 2006.229.16:12:54.56#ibcon#wrote, iclass 34, count 2 2006.229.16:12:54.56#ibcon#about to read 3, iclass 34, count 2 2006.229.16:12:54.58#ibcon#read 3, iclass 34, count 2 2006.229.16:12:54.58#ibcon#about to read 4, iclass 34, count 2 2006.229.16:12:54.58#ibcon#read 4, iclass 34, count 2 2006.229.16:12:54.58#ibcon#about to read 5, iclass 34, count 2 2006.229.16:12:54.58#ibcon#read 5, iclass 34, count 2 2006.229.16:12:54.58#ibcon#about to read 6, iclass 34, count 2 2006.229.16:12:54.58#ibcon#read 6, iclass 34, count 2 2006.229.16:12:54.58#ibcon#end of sib2, iclass 34, count 2 2006.229.16:12:54.58#ibcon#*mode == 0, iclass 34, count 2 2006.229.16:12:54.58#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.16:12:54.58#ibcon#[27=AT03-04\r\n] 2006.229.16:12:54.58#ibcon#*before write, iclass 34, count 2 2006.229.16:12:54.58#ibcon#enter sib2, iclass 34, count 2 2006.229.16:12:54.58#ibcon#flushed, iclass 34, count 2 2006.229.16:12:54.58#ibcon#about to write, iclass 34, count 2 2006.229.16:12:54.58#ibcon#wrote, iclass 34, count 2 2006.229.16:12:54.58#ibcon#about to read 3, iclass 34, count 2 2006.229.16:12:54.61#ibcon#read 3, iclass 34, count 2 2006.229.16:12:54.61#ibcon#about to read 4, iclass 34, count 2 2006.229.16:12:54.61#ibcon#read 4, iclass 34, count 2 2006.229.16:12:54.61#ibcon#about to read 5, iclass 34, count 2 2006.229.16:12:54.61#ibcon#read 5, iclass 34, count 2 2006.229.16:12:54.61#ibcon#about to read 6, iclass 34, count 2 2006.229.16:12:54.61#ibcon#read 6, iclass 34, count 2 2006.229.16:12:54.61#ibcon#end of sib2, iclass 34, count 2 2006.229.16:12:54.61#ibcon#*after write, iclass 34, count 2 2006.229.16:12:54.61#ibcon#*before return 0, iclass 34, count 2 2006.229.16:12:54.61#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:54.61#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:12:54.61#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.16:12:54.61#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:54.61#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:54.73#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:54.73#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:54.73#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:12:54.73#ibcon#first serial, iclass 34, count 0 2006.229.16:12:54.73#ibcon#enter sib2, iclass 34, count 0 2006.229.16:12:54.73#ibcon#flushed, iclass 34, count 0 2006.229.16:12:54.73#ibcon#about to write, iclass 34, count 0 2006.229.16:12:54.73#ibcon#wrote, iclass 34, count 0 2006.229.16:12:54.73#ibcon#about to read 3, iclass 34, count 0 2006.229.16:12:54.75#ibcon#read 3, iclass 34, count 0 2006.229.16:12:54.75#ibcon#about to read 4, iclass 34, count 0 2006.229.16:12:54.75#ibcon#read 4, iclass 34, count 0 2006.229.16:12:54.75#ibcon#about to read 5, iclass 34, count 0 2006.229.16:12:54.75#ibcon#read 5, iclass 34, count 0 2006.229.16:12:54.75#ibcon#about to read 6, iclass 34, count 0 2006.229.16:12:54.75#ibcon#read 6, iclass 34, count 0 2006.229.16:12:54.75#ibcon#end of sib2, iclass 34, count 0 2006.229.16:12:54.75#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:12:54.75#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:12:54.75#ibcon#[27=USB\r\n] 2006.229.16:12:54.75#ibcon#*before write, iclass 34, count 0 2006.229.16:12:54.75#ibcon#enter sib2, iclass 34, count 0 2006.229.16:12:54.75#ibcon#flushed, iclass 34, count 0 2006.229.16:12:54.75#ibcon#about to write, iclass 34, count 0 2006.229.16:12:54.75#ibcon#wrote, iclass 34, count 0 2006.229.16:12:54.75#ibcon#about to read 3, iclass 34, count 0 2006.229.16:12:54.78#ibcon#read 3, iclass 34, count 0 2006.229.16:12:54.78#ibcon#about to read 4, iclass 34, count 0 2006.229.16:12:54.78#ibcon#read 4, iclass 34, count 0 2006.229.16:12:54.78#ibcon#about to read 5, iclass 34, count 0 2006.229.16:12:54.78#ibcon#read 5, iclass 34, count 0 2006.229.16:12:54.78#ibcon#about to read 6, iclass 34, count 0 2006.229.16:12:54.78#ibcon#read 6, iclass 34, count 0 2006.229.16:12:54.78#ibcon#end of sib2, iclass 34, count 0 2006.229.16:12:54.78#ibcon#*after write, iclass 34, count 0 2006.229.16:12:54.78#ibcon#*before return 0, iclass 34, count 0 2006.229.16:12:54.78#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:54.78#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:12:54.78#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:12:54.78#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:12:54.78$vck44/vblo=4,679.99 2006.229.16:12:54.78#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.16:12:54.78#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.16:12:54.78#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:54.78#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:54.78#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:54.78#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:54.78#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:12:54.78#ibcon#first serial, iclass 36, count 0 2006.229.16:12:54.78#ibcon#enter sib2, iclass 36, count 0 2006.229.16:12:54.78#ibcon#flushed, iclass 36, count 0 2006.229.16:12:54.78#ibcon#about to write, iclass 36, count 0 2006.229.16:12:54.78#ibcon#wrote, iclass 36, count 0 2006.229.16:12:54.78#ibcon#about to read 3, iclass 36, count 0 2006.229.16:12:54.80#ibcon#read 3, iclass 36, count 0 2006.229.16:12:54.80#ibcon#about to read 4, iclass 36, count 0 2006.229.16:12:54.80#ibcon#read 4, iclass 36, count 0 2006.229.16:12:54.80#ibcon#about to read 5, iclass 36, count 0 2006.229.16:12:54.80#ibcon#read 5, iclass 36, count 0 2006.229.16:12:54.80#ibcon#about to read 6, iclass 36, count 0 2006.229.16:12:54.80#ibcon#read 6, iclass 36, count 0 2006.229.16:12:54.80#ibcon#end of sib2, iclass 36, count 0 2006.229.16:12:54.80#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:12:54.80#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:12:54.80#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:12:54.80#ibcon#*before write, iclass 36, count 0 2006.229.16:12:54.80#ibcon#enter sib2, iclass 36, count 0 2006.229.16:12:54.80#ibcon#flushed, iclass 36, count 0 2006.229.16:12:54.80#ibcon#about to write, iclass 36, count 0 2006.229.16:12:54.80#ibcon#wrote, iclass 36, count 0 2006.229.16:12:54.80#ibcon#about to read 3, iclass 36, count 0 2006.229.16:12:54.84#ibcon#read 3, iclass 36, count 0 2006.229.16:12:54.84#ibcon#about to read 4, iclass 36, count 0 2006.229.16:12:54.84#ibcon#read 4, iclass 36, count 0 2006.229.16:12:54.84#ibcon#about to read 5, iclass 36, count 0 2006.229.16:12:54.84#ibcon#read 5, iclass 36, count 0 2006.229.16:12:54.84#ibcon#about to read 6, iclass 36, count 0 2006.229.16:12:54.84#ibcon#read 6, iclass 36, count 0 2006.229.16:12:54.84#ibcon#end of sib2, iclass 36, count 0 2006.229.16:12:54.84#ibcon#*after write, iclass 36, count 0 2006.229.16:12:54.84#ibcon#*before return 0, iclass 36, count 0 2006.229.16:12:54.84#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:54.84#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:12:54.84#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:12:54.84#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:12:54.84$vck44/vb=4,4 2006.229.16:12:54.84#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.16:12:54.84#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.16:12:54.84#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:54.84#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:54.90#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:54.90#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:54.90#ibcon#enter wrdev, iclass 38, count 2 2006.229.16:12:54.90#ibcon#first serial, iclass 38, count 2 2006.229.16:12:54.90#ibcon#enter sib2, iclass 38, count 2 2006.229.16:12:54.90#ibcon#flushed, iclass 38, count 2 2006.229.16:12:54.90#ibcon#about to write, iclass 38, count 2 2006.229.16:12:54.90#ibcon#wrote, iclass 38, count 2 2006.229.16:12:54.90#ibcon#about to read 3, iclass 38, count 2 2006.229.16:12:54.92#ibcon#read 3, iclass 38, count 2 2006.229.16:12:54.92#ibcon#about to read 4, iclass 38, count 2 2006.229.16:12:54.92#ibcon#read 4, iclass 38, count 2 2006.229.16:12:54.92#ibcon#about to read 5, iclass 38, count 2 2006.229.16:12:54.92#ibcon#read 5, iclass 38, count 2 2006.229.16:12:54.92#ibcon#about to read 6, iclass 38, count 2 2006.229.16:12:54.92#ibcon#read 6, iclass 38, count 2 2006.229.16:12:54.92#ibcon#end of sib2, iclass 38, count 2 2006.229.16:12:54.92#ibcon#*mode == 0, iclass 38, count 2 2006.229.16:12:54.92#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.16:12:54.92#ibcon#[27=AT04-04\r\n] 2006.229.16:12:54.92#ibcon#*before write, iclass 38, count 2 2006.229.16:12:54.92#ibcon#enter sib2, iclass 38, count 2 2006.229.16:12:54.92#ibcon#flushed, iclass 38, count 2 2006.229.16:12:54.92#ibcon#about to write, iclass 38, count 2 2006.229.16:12:54.92#ibcon#wrote, iclass 38, count 2 2006.229.16:12:54.92#ibcon#about to read 3, iclass 38, count 2 2006.229.16:12:54.95#ibcon#read 3, iclass 38, count 2 2006.229.16:12:54.95#ibcon#about to read 4, iclass 38, count 2 2006.229.16:12:54.95#ibcon#read 4, iclass 38, count 2 2006.229.16:12:54.95#ibcon#about to read 5, iclass 38, count 2 2006.229.16:12:54.95#ibcon#read 5, iclass 38, count 2 2006.229.16:12:54.95#ibcon#about to read 6, iclass 38, count 2 2006.229.16:12:54.95#ibcon#read 6, iclass 38, count 2 2006.229.16:12:54.95#ibcon#end of sib2, iclass 38, count 2 2006.229.16:12:54.95#ibcon#*after write, iclass 38, count 2 2006.229.16:12:54.95#ibcon#*before return 0, iclass 38, count 2 2006.229.16:12:54.95#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:54.95#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:12:54.95#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.16:12:54.95#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:54.95#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:55.07#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:55.07#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:55.07#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:12:55.07#ibcon#first serial, iclass 38, count 0 2006.229.16:12:55.07#ibcon#enter sib2, iclass 38, count 0 2006.229.16:12:55.07#ibcon#flushed, iclass 38, count 0 2006.229.16:12:55.07#ibcon#about to write, iclass 38, count 0 2006.229.16:12:55.07#ibcon#wrote, iclass 38, count 0 2006.229.16:12:55.07#ibcon#about to read 3, iclass 38, count 0 2006.229.16:12:55.09#ibcon#read 3, iclass 38, count 0 2006.229.16:12:55.09#ibcon#about to read 4, iclass 38, count 0 2006.229.16:12:55.09#ibcon#read 4, iclass 38, count 0 2006.229.16:12:55.09#ibcon#about to read 5, iclass 38, count 0 2006.229.16:12:55.09#ibcon#read 5, iclass 38, count 0 2006.229.16:12:55.09#ibcon#about to read 6, iclass 38, count 0 2006.229.16:12:55.09#ibcon#read 6, iclass 38, count 0 2006.229.16:12:55.09#ibcon#end of sib2, iclass 38, count 0 2006.229.16:12:55.09#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:12:55.09#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:12:55.09#ibcon#[27=USB\r\n] 2006.229.16:12:55.09#ibcon#*before write, iclass 38, count 0 2006.229.16:12:55.09#ibcon#enter sib2, iclass 38, count 0 2006.229.16:12:55.09#ibcon#flushed, iclass 38, count 0 2006.229.16:12:55.09#ibcon#about to write, iclass 38, count 0 2006.229.16:12:55.09#ibcon#wrote, iclass 38, count 0 2006.229.16:12:55.09#ibcon#about to read 3, iclass 38, count 0 2006.229.16:12:55.12#ibcon#read 3, iclass 38, count 0 2006.229.16:12:55.12#ibcon#about to read 4, iclass 38, count 0 2006.229.16:12:55.12#ibcon#read 4, iclass 38, count 0 2006.229.16:12:55.12#ibcon#about to read 5, iclass 38, count 0 2006.229.16:12:55.12#ibcon#read 5, iclass 38, count 0 2006.229.16:12:55.12#ibcon#about to read 6, iclass 38, count 0 2006.229.16:12:55.12#ibcon#read 6, iclass 38, count 0 2006.229.16:12:55.12#ibcon#end of sib2, iclass 38, count 0 2006.229.16:12:55.12#ibcon#*after write, iclass 38, count 0 2006.229.16:12:55.12#ibcon#*before return 0, iclass 38, count 0 2006.229.16:12:55.12#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:55.12#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:12:55.12#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:12:55.12#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:12:55.12$vck44/vblo=5,709.99 2006.229.16:12:55.12#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.16:12:55.12#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.16:12:55.12#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:55.12#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:55.12#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:55.12#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:55.12#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:12:55.12#ibcon#first serial, iclass 40, count 0 2006.229.16:12:55.12#ibcon#enter sib2, iclass 40, count 0 2006.229.16:12:55.12#ibcon#flushed, iclass 40, count 0 2006.229.16:12:55.12#ibcon#about to write, iclass 40, count 0 2006.229.16:12:55.12#ibcon#wrote, iclass 40, count 0 2006.229.16:12:55.12#ibcon#about to read 3, iclass 40, count 0 2006.229.16:12:55.14#ibcon#read 3, iclass 40, count 0 2006.229.16:12:55.14#ibcon#about to read 4, iclass 40, count 0 2006.229.16:12:55.14#ibcon#read 4, iclass 40, count 0 2006.229.16:12:55.14#ibcon#about to read 5, iclass 40, count 0 2006.229.16:12:55.14#ibcon#read 5, iclass 40, count 0 2006.229.16:12:55.14#ibcon#about to read 6, iclass 40, count 0 2006.229.16:12:55.14#ibcon#read 6, iclass 40, count 0 2006.229.16:12:55.14#ibcon#end of sib2, iclass 40, count 0 2006.229.16:12:55.14#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:12:55.14#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:12:55.14#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:12:55.14#ibcon#*before write, iclass 40, count 0 2006.229.16:12:55.14#ibcon#enter sib2, iclass 40, count 0 2006.229.16:12:55.14#ibcon#flushed, iclass 40, count 0 2006.229.16:12:55.14#ibcon#about to write, iclass 40, count 0 2006.229.16:12:55.14#ibcon#wrote, iclass 40, count 0 2006.229.16:12:55.14#ibcon#about to read 3, iclass 40, count 0 2006.229.16:12:55.18#ibcon#read 3, iclass 40, count 0 2006.229.16:12:55.18#ibcon#about to read 4, iclass 40, count 0 2006.229.16:12:55.18#ibcon#read 4, iclass 40, count 0 2006.229.16:12:55.18#ibcon#about to read 5, iclass 40, count 0 2006.229.16:12:55.18#ibcon#read 5, iclass 40, count 0 2006.229.16:12:55.18#ibcon#about to read 6, iclass 40, count 0 2006.229.16:12:55.18#ibcon#read 6, iclass 40, count 0 2006.229.16:12:55.18#ibcon#end of sib2, iclass 40, count 0 2006.229.16:12:55.18#ibcon#*after write, iclass 40, count 0 2006.229.16:12:55.18#ibcon#*before return 0, iclass 40, count 0 2006.229.16:12:55.18#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:55.18#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:12:55.18#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:12:55.18#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:12:55.18$vck44/vb=5,4 2006.229.16:12:55.18#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.16:12:55.18#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.16:12:55.18#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:55.18#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:55.24#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:55.24#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:55.24#ibcon#enter wrdev, iclass 4, count 2 2006.229.16:12:55.24#ibcon#first serial, iclass 4, count 2 2006.229.16:12:55.24#ibcon#enter sib2, iclass 4, count 2 2006.229.16:12:55.24#ibcon#flushed, iclass 4, count 2 2006.229.16:12:55.24#ibcon#about to write, iclass 4, count 2 2006.229.16:12:55.24#ibcon#wrote, iclass 4, count 2 2006.229.16:12:55.24#ibcon#about to read 3, iclass 4, count 2 2006.229.16:12:55.26#ibcon#read 3, iclass 4, count 2 2006.229.16:12:55.26#ibcon#about to read 4, iclass 4, count 2 2006.229.16:12:55.26#ibcon#read 4, iclass 4, count 2 2006.229.16:12:55.26#ibcon#about to read 5, iclass 4, count 2 2006.229.16:12:55.26#ibcon#read 5, iclass 4, count 2 2006.229.16:12:55.26#ibcon#about to read 6, iclass 4, count 2 2006.229.16:12:55.26#ibcon#read 6, iclass 4, count 2 2006.229.16:12:55.26#ibcon#end of sib2, iclass 4, count 2 2006.229.16:12:55.26#ibcon#*mode == 0, iclass 4, count 2 2006.229.16:12:55.26#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.16:12:55.26#ibcon#[27=AT05-04\r\n] 2006.229.16:12:55.26#ibcon#*before write, iclass 4, count 2 2006.229.16:12:55.26#ibcon#enter sib2, iclass 4, count 2 2006.229.16:12:55.26#ibcon#flushed, iclass 4, count 2 2006.229.16:12:55.26#ibcon#about to write, iclass 4, count 2 2006.229.16:12:55.26#ibcon#wrote, iclass 4, count 2 2006.229.16:12:55.26#ibcon#about to read 3, iclass 4, count 2 2006.229.16:12:55.29#ibcon#read 3, iclass 4, count 2 2006.229.16:12:55.29#ibcon#about to read 4, iclass 4, count 2 2006.229.16:12:55.29#ibcon#read 4, iclass 4, count 2 2006.229.16:12:55.29#ibcon#about to read 5, iclass 4, count 2 2006.229.16:12:55.29#ibcon#read 5, iclass 4, count 2 2006.229.16:12:55.29#ibcon#about to read 6, iclass 4, count 2 2006.229.16:12:55.29#ibcon#read 6, iclass 4, count 2 2006.229.16:12:55.29#ibcon#end of sib2, iclass 4, count 2 2006.229.16:12:55.29#ibcon#*after write, iclass 4, count 2 2006.229.16:12:55.29#ibcon#*before return 0, iclass 4, count 2 2006.229.16:12:55.29#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:55.29#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:12:55.29#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.16:12:55.29#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:55.29#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:55.41#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:55.41#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:55.41#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:12:55.41#ibcon#first serial, iclass 4, count 0 2006.229.16:12:55.41#ibcon#enter sib2, iclass 4, count 0 2006.229.16:12:55.41#ibcon#flushed, iclass 4, count 0 2006.229.16:12:55.41#ibcon#about to write, iclass 4, count 0 2006.229.16:12:55.41#ibcon#wrote, iclass 4, count 0 2006.229.16:12:55.41#ibcon#about to read 3, iclass 4, count 0 2006.229.16:12:55.43#ibcon#read 3, iclass 4, count 0 2006.229.16:12:55.43#ibcon#about to read 4, iclass 4, count 0 2006.229.16:12:55.43#ibcon#read 4, iclass 4, count 0 2006.229.16:12:55.43#ibcon#about to read 5, iclass 4, count 0 2006.229.16:12:55.43#ibcon#read 5, iclass 4, count 0 2006.229.16:12:55.43#ibcon#about to read 6, iclass 4, count 0 2006.229.16:12:55.43#ibcon#read 6, iclass 4, count 0 2006.229.16:12:55.43#ibcon#end of sib2, iclass 4, count 0 2006.229.16:12:55.43#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:12:55.43#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:12:55.43#ibcon#[27=USB\r\n] 2006.229.16:12:55.43#ibcon#*before write, iclass 4, count 0 2006.229.16:12:55.43#ibcon#enter sib2, iclass 4, count 0 2006.229.16:12:55.43#ibcon#flushed, iclass 4, count 0 2006.229.16:12:55.43#ibcon#about to write, iclass 4, count 0 2006.229.16:12:55.43#ibcon#wrote, iclass 4, count 0 2006.229.16:12:55.43#ibcon#about to read 3, iclass 4, count 0 2006.229.16:12:55.46#ibcon#read 3, iclass 4, count 0 2006.229.16:12:55.46#ibcon#about to read 4, iclass 4, count 0 2006.229.16:12:55.46#ibcon#read 4, iclass 4, count 0 2006.229.16:12:55.46#ibcon#about to read 5, iclass 4, count 0 2006.229.16:12:55.46#ibcon#read 5, iclass 4, count 0 2006.229.16:12:55.46#ibcon#about to read 6, iclass 4, count 0 2006.229.16:12:55.46#ibcon#read 6, iclass 4, count 0 2006.229.16:12:55.46#ibcon#end of sib2, iclass 4, count 0 2006.229.16:12:55.46#ibcon#*after write, iclass 4, count 0 2006.229.16:12:55.46#ibcon#*before return 0, iclass 4, count 0 2006.229.16:12:55.46#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:55.46#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:12:55.46#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:12:55.46#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:12:55.46$vck44/vblo=6,719.99 2006.229.16:12:55.46#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.16:12:55.46#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.16:12:55.46#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:55.46#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:55.46#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:55.46#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:55.46#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:12:55.46#ibcon#first serial, iclass 6, count 0 2006.229.16:12:55.46#ibcon#enter sib2, iclass 6, count 0 2006.229.16:12:55.46#ibcon#flushed, iclass 6, count 0 2006.229.16:12:55.46#ibcon#about to write, iclass 6, count 0 2006.229.16:12:55.46#ibcon#wrote, iclass 6, count 0 2006.229.16:12:55.46#ibcon#about to read 3, iclass 6, count 0 2006.229.16:12:55.48#ibcon#read 3, iclass 6, count 0 2006.229.16:12:55.48#ibcon#about to read 4, iclass 6, count 0 2006.229.16:12:55.48#ibcon#read 4, iclass 6, count 0 2006.229.16:12:55.48#ibcon#about to read 5, iclass 6, count 0 2006.229.16:12:55.48#ibcon#read 5, iclass 6, count 0 2006.229.16:12:55.48#ibcon#about to read 6, iclass 6, count 0 2006.229.16:12:55.48#ibcon#read 6, iclass 6, count 0 2006.229.16:12:55.48#ibcon#end of sib2, iclass 6, count 0 2006.229.16:12:55.48#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:12:55.48#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:12:55.48#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:12:55.48#ibcon#*before write, iclass 6, count 0 2006.229.16:12:55.48#ibcon#enter sib2, iclass 6, count 0 2006.229.16:12:55.48#ibcon#flushed, iclass 6, count 0 2006.229.16:12:55.48#ibcon#about to write, iclass 6, count 0 2006.229.16:12:55.48#ibcon#wrote, iclass 6, count 0 2006.229.16:12:55.48#ibcon#about to read 3, iclass 6, count 0 2006.229.16:12:55.52#ibcon#read 3, iclass 6, count 0 2006.229.16:12:55.52#ibcon#about to read 4, iclass 6, count 0 2006.229.16:12:55.52#ibcon#read 4, iclass 6, count 0 2006.229.16:12:55.52#ibcon#about to read 5, iclass 6, count 0 2006.229.16:12:55.52#ibcon#read 5, iclass 6, count 0 2006.229.16:12:55.52#ibcon#about to read 6, iclass 6, count 0 2006.229.16:12:55.52#ibcon#read 6, iclass 6, count 0 2006.229.16:12:55.52#ibcon#end of sib2, iclass 6, count 0 2006.229.16:12:55.52#ibcon#*after write, iclass 6, count 0 2006.229.16:12:55.52#ibcon#*before return 0, iclass 6, count 0 2006.229.16:12:55.52#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:55.52#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:12:55.52#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:12:55.52#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:12:55.52$vck44/vb=6,4 2006.229.16:12:55.52#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.16:12:55.52#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.16:12:55.52#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:55.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:55.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:55.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:55.58#ibcon#enter wrdev, iclass 10, count 2 2006.229.16:12:55.58#ibcon#first serial, iclass 10, count 2 2006.229.16:12:55.58#ibcon#enter sib2, iclass 10, count 2 2006.229.16:12:55.58#ibcon#flushed, iclass 10, count 2 2006.229.16:12:55.58#ibcon#about to write, iclass 10, count 2 2006.229.16:12:55.58#ibcon#wrote, iclass 10, count 2 2006.229.16:12:55.58#ibcon#about to read 3, iclass 10, count 2 2006.229.16:12:55.60#ibcon#read 3, iclass 10, count 2 2006.229.16:12:55.60#ibcon#about to read 4, iclass 10, count 2 2006.229.16:12:55.60#ibcon#read 4, iclass 10, count 2 2006.229.16:12:55.60#ibcon#about to read 5, iclass 10, count 2 2006.229.16:12:55.60#ibcon#read 5, iclass 10, count 2 2006.229.16:12:55.60#ibcon#about to read 6, iclass 10, count 2 2006.229.16:12:55.60#ibcon#read 6, iclass 10, count 2 2006.229.16:12:55.60#ibcon#end of sib2, iclass 10, count 2 2006.229.16:12:55.60#ibcon#*mode == 0, iclass 10, count 2 2006.229.16:12:55.60#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.16:12:55.60#ibcon#[27=AT06-04\r\n] 2006.229.16:12:55.60#ibcon#*before write, iclass 10, count 2 2006.229.16:12:55.60#ibcon#enter sib2, iclass 10, count 2 2006.229.16:12:55.60#ibcon#flushed, iclass 10, count 2 2006.229.16:12:55.60#ibcon#about to write, iclass 10, count 2 2006.229.16:12:55.60#ibcon#wrote, iclass 10, count 2 2006.229.16:12:55.60#ibcon#about to read 3, iclass 10, count 2 2006.229.16:12:55.63#ibcon#read 3, iclass 10, count 2 2006.229.16:12:55.63#ibcon#about to read 4, iclass 10, count 2 2006.229.16:12:55.63#ibcon#read 4, iclass 10, count 2 2006.229.16:12:55.63#ibcon#about to read 5, iclass 10, count 2 2006.229.16:12:55.63#ibcon#read 5, iclass 10, count 2 2006.229.16:12:55.63#ibcon#about to read 6, iclass 10, count 2 2006.229.16:12:55.63#ibcon#read 6, iclass 10, count 2 2006.229.16:12:55.63#ibcon#end of sib2, iclass 10, count 2 2006.229.16:12:55.63#ibcon#*after write, iclass 10, count 2 2006.229.16:12:55.63#ibcon#*before return 0, iclass 10, count 2 2006.229.16:12:55.63#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:55.63#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:12:55.63#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.16:12:55.63#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:55.63#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:55.75#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:55.75#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:55.75#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:12:55.75#ibcon#first serial, iclass 10, count 0 2006.229.16:12:55.75#ibcon#enter sib2, iclass 10, count 0 2006.229.16:12:55.75#ibcon#flushed, iclass 10, count 0 2006.229.16:12:55.75#ibcon#about to write, iclass 10, count 0 2006.229.16:12:55.75#ibcon#wrote, iclass 10, count 0 2006.229.16:12:55.75#ibcon#about to read 3, iclass 10, count 0 2006.229.16:12:55.77#ibcon#read 3, iclass 10, count 0 2006.229.16:12:55.77#ibcon#about to read 4, iclass 10, count 0 2006.229.16:12:55.77#ibcon#read 4, iclass 10, count 0 2006.229.16:12:55.77#ibcon#about to read 5, iclass 10, count 0 2006.229.16:12:55.77#ibcon#read 5, iclass 10, count 0 2006.229.16:12:55.77#ibcon#about to read 6, iclass 10, count 0 2006.229.16:12:55.77#ibcon#read 6, iclass 10, count 0 2006.229.16:12:55.77#ibcon#end of sib2, iclass 10, count 0 2006.229.16:12:55.77#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:12:55.77#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:12:55.77#ibcon#[27=USB\r\n] 2006.229.16:12:55.77#ibcon#*before write, iclass 10, count 0 2006.229.16:12:55.77#ibcon#enter sib2, iclass 10, count 0 2006.229.16:12:55.77#ibcon#flushed, iclass 10, count 0 2006.229.16:12:55.77#ibcon#about to write, iclass 10, count 0 2006.229.16:12:55.77#ibcon#wrote, iclass 10, count 0 2006.229.16:12:55.77#ibcon#about to read 3, iclass 10, count 0 2006.229.16:12:55.80#ibcon#read 3, iclass 10, count 0 2006.229.16:12:55.80#ibcon#about to read 4, iclass 10, count 0 2006.229.16:12:55.80#ibcon#read 4, iclass 10, count 0 2006.229.16:12:55.80#ibcon#about to read 5, iclass 10, count 0 2006.229.16:12:55.80#ibcon#read 5, iclass 10, count 0 2006.229.16:12:55.80#ibcon#about to read 6, iclass 10, count 0 2006.229.16:12:55.80#ibcon#read 6, iclass 10, count 0 2006.229.16:12:55.80#ibcon#end of sib2, iclass 10, count 0 2006.229.16:12:55.80#ibcon#*after write, iclass 10, count 0 2006.229.16:12:55.80#ibcon#*before return 0, iclass 10, count 0 2006.229.16:12:55.80#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:55.80#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:12:55.80#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:12:55.80#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:12:55.80$vck44/vblo=7,734.99 2006.229.16:12:55.80#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.16:12:55.80#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.16:12:55.80#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:55.80#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:55.80#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:55.80#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:55.80#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:12:55.80#ibcon#first serial, iclass 12, count 0 2006.229.16:12:55.80#ibcon#enter sib2, iclass 12, count 0 2006.229.16:12:55.80#ibcon#flushed, iclass 12, count 0 2006.229.16:12:55.80#ibcon#about to write, iclass 12, count 0 2006.229.16:12:55.80#ibcon#wrote, iclass 12, count 0 2006.229.16:12:55.80#ibcon#about to read 3, iclass 12, count 0 2006.229.16:12:55.82#ibcon#read 3, iclass 12, count 0 2006.229.16:12:55.82#ibcon#about to read 4, iclass 12, count 0 2006.229.16:12:55.82#ibcon#read 4, iclass 12, count 0 2006.229.16:12:55.82#ibcon#about to read 5, iclass 12, count 0 2006.229.16:12:55.82#ibcon#read 5, iclass 12, count 0 2006.229.16:12:55.82#ibcon#about to read 6, iclass 12, count 0 2006.229.16:12:55.82#ibcon#read 6, iclass 12, count 0 2006.229.16:12:55.82#ibcon#end of sib2, iclass 12, count 0 2006.229.16:12:55.82#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:12:55.82#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:12:55.82#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:12:55.82#ibcon#*before write, iclass 12, count 0 2006.229.16:12:55.82#ibcon#enter sib2, iclass 12, count 0 2006.229.16:12:55.82#ibcon#flushed, iclass 12, count 0 2006.229.16:12:55.82#ibcon#about to write, iclass 12, count 0 2006.229.16:12:55.82#ibcon#wrote, iclass 12, count 0 2006.229.16:12:55.82#ibcon#about to read 3, iclass 12, count 0 2006.229.16:12:55.86#ibcon#read 3, iclass 12, count 0 2006.229.16:12:55.86#ibcon#about to read 4, iclass 12, count 0 2006.229.16:12:55.86#ibcon#read 4, iclass 12, count 0 2006.229.16:12:55.86#ibcon#about to read 5, iclass 12, count 0 2006.229.16:12:55.86#ibcon#read 5, iclass 12, count 0 2006.229.16:12:55.86#ibcon#about to read 6, iclass 12, count 0 2006.229.16:12:55.86#ibcon#read 6, iclass 12, count 0 2006.229.16:12:55.86#ibcon#end of sib2, iclass 12, count 0 2006.229.16:12:55.86#ibcon#*after write, iclass 12, count 0 2006.229.16:12:55.86#ibcon#*before return 0, iclass 12, count 0 2006.229.16:12:55.86#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:55.86#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:12:55.86#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:12:55.86#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:12:55.86$vck44/vb=7,4 2006.229.16:12:55.86#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.16:12:55.86#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.16:12:55.86#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:55.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:55.92#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:55.92#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:55.92#ibcon#enter wrdev, iclass 14, count 2 2006.229.16:12:55.92#ibcon#first serial, iclass 14, count 2 2006.229.16:12:55.92#ibcon#enter sib2, iclass 14, count 2 2006.229.16:12:55.92#ibcon#flushed, iclass 14, count 2 2006.229.16:12:55.92#ibcon#about to write, iclass 14, count 2 2006.229.16:12:55.92#ibcon#wrote, iclass 14, count 2 2006.229.16:12:55.92#ibcon#about to read 3, iclass 14, count 2 2006.229.16:12:55.94#ibcon#read 3, iclass 14, count 2 2006.229.16:12:55.94#ibcon#about to read 4, iclass 14, count 2 2006.229.16:12:55.94#ibcon#read 4, iclass 14, count 2 2006.229.16:12:55.94#ibcon#about to read 5, iclass 14, count 2 2006.229.16:12:55.94#ibcon#read 5, iclass 14, count 2 2006.229.16:12:55.94#ibcon#about to read 6, iclass 14, count 2 2006.229.16:12:55.94#ibcon#read 6, iclass 14, count 2 2006.229.16:12:55.94#ibcon#end of sib2, iclass 14, count 2 2006.229.16:12:55.94#ibcon#*mode == 0, iclass 14, count 2 2006.229.16:12:55.94#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.16:12:55.94#ibcon#[27=AT07-04\r\n] 2006.229.16:12:55.94#ibcon#*before write, iclass 14, count 2 2006.229.16:12:55.94#ibcon#enter sib2, iclass 14, count 2 2006.229.16:12:55.94#ibcon#flushed, iclass 14, count 2 2006.229.16:12:55.94#ibcon#about to write, iclass 14, count 2 2006.229.16:12:55.94#ibcon#wrote, iclass 14, count 2 2006.229.16:12:55.94#ibcon#about to read 3, iclass 14, count 2 2006.229.16:12:55.97#ibcon#read 3, iclass 14, count 2 2006.229.16:12:55.97#ibcon#about to read 4, iclass 14, count 2 2006.229.16:12:55.97#ibcon#read 4, iclass 14, count 2 2006.229.16:12:55.97#ibcon#about to read 5, iclass 14, count 2 2006.229.16:12:55.97#ibcon#read 5, iclass 14, count 2 2006.229.16:12:55.97#ibcon#about to read 6, iclass 14, count 2 2006.229.16:12:55.97#ibcon#read 6, iclass 14, count 2 2006.229.16:12:55.97#ibcon#end of sib2, iclass 14, count 2 2006.229.16:12:55.97#ibcon#*after write, iclass 14, count 2 2006.229.16:12:55.97#ibcon#*before return 0, iclass 14, count 2 2006.229.16:12:55.97#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:55.97#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:12:55.97#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.16:12:55.97#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:55.97#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:56.09#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:56.09#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:56.09#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:12:56.09#ibcon#first serial, iclass 14, count 0 2006.229.16:12:56.09#ibcon#enter sib2, iclass 14, count 0 2006.229.16:12:56.09#ibcon#flushed, iclass 14, count 0 2006.229.16:12:56.09#ibcon#about to write, iclass 14, count 0 2006.229.16:12:56.09#ibcon#wrote, iclass 14, count 0 2006.229.16:12:56.09#ibcon#about to read 3, iclass 14, count 0 2006.229.16:12:56.11#ibcon#read 3, iclass 14, count 0 2006.229.16:12:56.11#ibcon#about to read 4, iclass 14, count 0 2006.229.16:12:56.11#ibcon#read 4, iclass 14, count 0 2006.229.16:12:56.11#ibcon#about to read 5, iclass 14, count 0 2006.229.16:12:56.11#ibcon#read 5, iclass 14, count 0 2006.229.16:12:56.11#ibcon#about to read 6, iclass 14, count 0 2006.229.16:12:56.11#ibcon#read 6, iclass 14, count 0 2006.229.16:12:56.11#ibcon#end of sib2, iclass 14, count 0 2006.229.16:12:56.11#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:12:56.11#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:12:56.11#ibcon#[27=USB\r\n] 2006.229.16:12:56.11#ibcon#*before write, iclass 14, count 0 2006.229.16:12:56.11#ibcon#enter sib2, iclass 14, count 0 2006.229.16:12:56.11#ibcon#flushed, iclass 14, count 0 2006.229.16:12:56.11#ibcon#about to write, iclass 14, count 0 2006.229.16:12:56.11#ibcon#wrote, iclass 14, count 0 2006.229.16:12:56.11#ibcon#about to read 3, iclass 14, count 0 2006.229.16:12:56.14#ibcon#read 3, iclass 14, count 0 2006.229.16:12:56.14#ibcon#about to read 4, iclass 14, count 0 2006.229.16:12:56.14#ibcon#read 4, iclass 14, count 0 2006.229.16:12:56.14#ibcon#about to read 5, iclass 14, count 0 2006.229.16:12:56.14#ibcon#read 5, iclass 14, count 0 2006.229.16:12:56.14#ibcon#about to read 6, iclass 14, count 0 2006.229.16:12:56.14#ibcon#read 6, iclass 14, count 0 2006.229.16:12:56.14#ibcon#end of sib2, iclass 14, count 0 2006.229.16:12:56.14#ibcon#*after write, iclass 14, count 0 2006.229.16:12:56.14#ibcon#*before return 0, iclass 14, count 0 2006.229.16:12:56.14#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:56.14#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:12:56.14#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:12:56.14#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:12:56.14$vck44/vblo=8,744.99 2006.229.16:12:56.14#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:12:56.14#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:12:56.14#ibcon#ireg 17 cls_cnt 0 2006.229.16:12:56.14#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:56.14#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:56.14#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:56.14#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:12:56.14#ibcon#first serial, iclass 16, count 0 2006.229.16:12:56.14#ibcon#enter sib2, iclass 16, count 0 2006.229.16:12:56.14#ibcon#flushed, iclass 16, count 0 2006.229.16:12:56.14#ibcon#about to write, iclass 16, count 0 2006.229.16:12:56.14#ibcon#wrote, iclass 16, count 0 2006.229.16:12:56.14#ibcon#about to read 3, iclass 16, count 0 2006.229.16:12:56.16#ibcon#read 3, iclass 16, count 0 2006.229.16:12:56.16#ibcon#about to read 4, iclass 16, count 0 2006.229.16:12:56.16#ibcon#read 4, iclass 16, count 0 2006.229.16:12:56.16#ibcon#about to read 5, iclass 16, count 0 2006.229.16:12:56.16#ibcon#read 5, iclass 16, count 0 2006.229.16:12:56.16#ibcon#about to read 6, iclass 16, count 0 2006.229.16:12:56.16#ibcon#read 6, iclass 16, count 0 2006.229.16:12:56.16#ibcon#end of sib2, iclass 16, count 0 2006.229.16:12:56.16#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:12:56.16#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:12:56.16#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:12:56.16#ibcon#*before write, iclass 16, count 0 2006.229.16:12:56.16#ibcon#enter sib2, iclass 16, count 0 2006.229.16:12:56.16#ibcon#flushed, iclass 16, count 0 2006.229.16:12:56.16#ibcon#about to write, iclass 16, count 0 2006.229.16:12:56.16#ibcon#wrote, iclass 16, count 0 2006.229.16:12:56.16#ibcon#about to read 3, iclass 16, count 0 2006.229.16:12:56.20#ibcon#read 3, iclass 16, count 0 2006.229.16:12:56.20#ibcon#about to read 4, iclass 16, count 0 2006.229.16:12:56.20#ibcon#read 4, iclass 16, count 0 2006.229.16:12:56.20#ibcon#about to read 5, iclass 16, count 0 2006.229.16:12:56.20#ibcon#read 5, iclass 16, count 0 2006.229.16:12:56.20#ibcon#about to read 6, iclass 16, count 0 2006.229.16:12:56.20#ibcon#read 6, iclass 16, count 0 2006.229.16:12:56.20#ibcon#end of sib2, iclass 16, count 0 2006.229.16:12:56.20#ibcon#*after write, iclass 16, count 0 2006.229.16:12:56.20#ibcon#*before return 0, iclass 16, count 0 2006.229.16:12:56.20#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:56.20#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:12:56.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:12:56.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:12:56.20$vck44/vb=8,4 2006.229.16:12:56.20#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:12:56.20#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:12:56.20#ibcon#ireg 11 cls_cnt 2 2006.229.16:12:56.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:56.26#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:56.26#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:56.26#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:12:56.26#ibcon#first serial, iclass 18, count 2 2006.229.16:12:56.26#ibcon#enter sib2, iclass 18, count 2 2006.229.16:12:56.26#ibcon#flushed, iclass 18, count 2 2006.229.16:12:56.26#ibcon#about to write, iclass 18, count 2 2006.229.16:12:56.26#ibcon#wrote, iclass 18, count 2 2006.229.16:12:56.26#ibcon#about to read 3, iclass 18, count 2 2006.229.16:12:56.28#ibcon#read 3, iclass 18, count 2 2006.229.16:12:56.28#ibcon#about to read 4, iclass 18, count 2 2006.229.16:12:56.28#ibcon#read 4, iclass 18, count 2 2006.229.16:12:56.28#ibcon#about to read 5, iclass 18, count 2 2006.229.16:12:56.28#ibcon#read 5, iclass 18, count 2 2006.229.16:12:56.28#ibcon#about to read 6, iclass 18, count 2 2006.229.16:12:56.28#ibcon#read 6, iclass 18, count 2 2006.229.16:12:56.28#ibcon#end of sib2, iclass 18, count 2 2006.229.16:12:56.28#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:12:56.28#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:12:56.28#ibcon#[27=AT08-04\r\n] 2006.229.16:12:56.28#ibcon#*before write, iclass 18, count 2 2006.229.16:12:56.28#ibcon#enter sib2, iclass 18, count 2 2006.229.16:12:56.28#ibcon#flushed, iclass 18, count 2 2006.229.16:12:56.28#ibcon#about to write, iclass 18, count 2 2006.229.16:12:56.28#ibcon#wrote, iclass 18, count 2 2006.229.16:12:56.28#ibcon#about to read 3, iclass 18, count 2 2006.229.16:12:56.31#ibcon#read 3, iclass 18, count 2 2006.229.16:12:56.31#ibcon#about to read 4, iclass 18, count 2 2006.229.16:12:56.31#ibcon#read 4, iclass 18, count 2 2006.229.16:12:56.31#ibcon#about to read 5, iclass 18, count 2 2006.229.16:12:56.31#ibcon#read 5, iclass 18, count 2 2006.229.16:12:56.31#ibcon#about to read 6, iclass 18, count 2 2006.229.16:12:56.31#ibcon#read 6, iclass 18, count 2 2006.229.16:12:56.31#ibcon#end of sib2, iclass 18, count 2 2006.229.16:12:56.31#ibcon#*after write, iclass 18, count 2 2006.229.16:12:56.31#ibcon#*before return 0, iclass 18, count 2 2006.229.16:12:56.31#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:56.31#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:12:56.31#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:12:56.31#ibcon#ireg 7 cls_cnt 0 2006.229.16:12:56.31#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:56.33#abcon#<5=/05 1.2 2.1 27.211001001.8\r\n> 2006.229.16:12:56.35#abcon#{5=INTERFACE CLEAR} 2006.229.16:12:56.41#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:12:56.43#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:56.43#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:56.43#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:12:56.43#ibcon#first serial, iclass 18, count 0 2006.229.16:12:56.43#ibcon#enter sib2, iclass 18, count 0 2006.229.16:12:56.43#ibcon#flushed, iclass 18, count 0 2006.229.16:12:56.43#ibcon#about to write, iclass 18, count 0 2006.229.16:12:56.43#ibcon#wrote, iclass 18, count 0 2006.229.16:12:56.43#ibcon#about to read 3, iclass 18, count 0 2006.229.16:12:56.45#ibcon#read 3, iclass 18, count 0 2006.229.16:12:56.45#ibcon#about to read 4, iclass 18, count 0 2006.229.16:12:56.45#ibcon#read 4, iclass 18, count 0 2006.229.16:12:56.45#ibcon#about to read 5, iclass 18, count 0 2006.229.16:12:56.45#ibcon#read 5, iclass 18, count 0 2006.229.16:12:56.45#ibcon#about to read 6, iclass 18, count 0 2006.229.16:12:56.45#ibcon#read 6, iclass 18, count 0 2006.229.16:12:56.45#ibcon#end of sib2, iclass 18, count 0 2006.229.16:12:56.45#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:12:56.45#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:12:56.45#ibcon#[27=USB\r\n] 2006.229.16:12:56.45#ibcon#*before write, iclass 18, count 0 2006.229.16:12:56.45#ibcon#enter sib2, iclass 18, count 0 2006.229.16:12:56.45#ibcon#flushed, iclass 18, count 0 2006.229.16:12:56.45#ibcon#about to write, iclass 18, count 0 2006.229.16:12:56.45#ibcon#wrote, iclass 18, count 0 2006.229.16:12:56.45#ibcon#about to read 3, iclass 18, count 0 2006.229.16:12:56.48#ibcon#read 3, iclass 18, count 0 2006.229.16:12:56.48#ibcon#about to read 4, iclass 18, count 0 2006.229.16:12:56.48#ibcon#read 4, iclass 18, count 0 2006.229.16:12:56.48#ibcon#about to read 5, iclass 18, count 0 2006.229.16:12:56.48#ibcon#read 5, iclass 18, count 0 2006.229.16:12:56.48#ibcon#about to read 6, iclass 18, count 0 2006.229.16:12:56.48#ibcon#read 6, iclass 18, count 0 2006.229.16:12:56.48#ibcon#end of sib2, iclass 18, count 0 2006.229.16:12:56.48#ibcon#*after write, iclass 18, count 0 2006.229.16:12:56.48#ibcon#*before return 0, iclass 18, count 0 2006.229.16:12:56.48#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:56.48#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:12:56.48#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:12:56.48#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:12:56.48$vck44/vabw=wide 2006.229.16:12:56.48#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.16:12:56.48#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.16:12:56.48#ibcon#ireg 8 cls_cnt 0 2006.229.16:12:56.48#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:56.48#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:56.48#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:56.48#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:12:56.48#ibcon#first serial, iclass 24, count 0 2006.229.16:12:56.48#ibcon#enter sib2, iclass 24, count 0 2006.229.16:12:56.48#ibcon#flushed, iclass 24, count 0 2006.229.16:12:56.48#ibcon#about to write, iclass 24, count 0 2006.229.16:12:56.48#ibcon#wrote, iclass 24, count 0 2006.229.16:12:56.48#ibcon#about to read 3, iclass 24, count 0 2006.229.16:12:56.50#ibcon#read 3, iclass 24, count 0 2006.229.16:12:56.50#ibcon#about to read 4, iclass 24, count 0 2006.229.16:12:56.50#ibcon#read 4, iclass 24, count 0 2006.229.16:12:56.50#ibcon#about to read 5, iclass 24, count 0 2006.229.16:12:56.50#ibcon#read 5, iclass 24, count 0 2006.229.16:12:56.50#ibcon#about to read 6, iclass 24, count 0 2006.229.16:12:56.50#ibcon#read 6, iclass 24, count 0 2006.229.16:12:56.50#ibcon#end of sib2, iclass 24, count 0 2006.229.16:12:56.50#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:12:56.50#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:12:56.50#ibcon#[25=BW32\r\n] 2006.229.16:12:56.50#ibcon#*before write, iclass 24, count 0 2006.229.16:12:56.50#ibcon#enter sib2, iclass 24, count 0 2006.229.16:12:56.50#ibcon#flushed, iclass 24, count 0 2006.229.16:12:56.50#ibcon#about to write, iclass 24, count 0 2006.229.16:12:56.50#ibcon#wrote, iclass 24, count 0 2006.229.16:12:56.50#ibcon#about to read 3, iclass 24, count 0 2006.229.16:12:56.53#ibcon#read 3, iclass 24, count 0 2006.229.16:12:56.53#ibcon#about to read 4, iclass 24, count 0 2006.229.16:12:56.53#ibcon#read 4, iclass 24, count 0 2006.229.16:12:56.53#ibcon#about to read 5, iclass 24, count 0 2006.229.16:12:56.53#ibcon#read 5, iclass 24, count 0 2006.229.16:12:56.53#ibcon#about to read 6, iclass 24, count 0 2006.229.16:12:56.53#ibcon#read 6, iclass 24, count 0 2006.229.16:12:56.53#ibcon#end of sib2, iclass 24, count 0 2006.229.16:12:56.53#ibcon#*after write, iclass 24, count 0 2006.229.16:12:56.53#ibcon#*before return 0, iclass 24, count 0 2006.229.16:12:56.53#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:56.53#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:12:56.53#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:12:56.53#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:12:56.53$vck44/vbbw=wide 2006.229.16:12:56.53#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.16:12:56.53#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.16:12:56.53#ibcon#ireg 8 cls_cnt 0 2006.229.16:12:56.53#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:12:56.60#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:12:56.60#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:12:56.60#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:12:56.60#ibcon#first serial, iclass 26, count 0 2006.229.16:12:56.60#ibcon#enter sib2, iclass 26, count 0 2006.229.16:12:56.60#ibcon#flushed, iclass 26, count 0 2006.229.16:12:56.60#ibcon#about to write, iclass 26, count 0 2006.229.16:12:56.60#ibcon#wrote, iclass 26, count 0 2006.229.16:12:56.60#ibcon#about to read 3, iclass 26, count 0 2006.229.16:12:56.62#ibcon#read 3, iclass 26, count 0 2006.229.16:12:56.62#ibcon#about to read 4, iclass 26, count 0 2006.229.16:12:56.62#ibcon#read 4, iclass 26, count 0 2006.229.16:12:56.62#ibcon#about to read 5, iclass 26, count 0 2006.229.16:12:56.62#ibcon#read 5, iclass 26, count 0 2006.229.16:12:56.62#ibcon#about to read 6, iclass 26, count 0 2006.229.16:12:56.62#ibcon#read 6, iclass 26, count 0 2006.229.16:12:56.62#ibcon#end of sib2, iclass 26, count 0 2006.229.16:12:56.62#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:12:56.62#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:12:56.62#ibcon#[27=BW32\r\n] 2006.229.16:12:56.62#ibcon#*before write, iclass 26, count 0 2006.229.16:12:56.62#ibcon#enter sib2, iclass 26, count 0 2006.229.16:12:56.62#ibcon#flushed, iclass 26, count 0 2006.229.16:12:56.62#ibcon#about to write, iclass 26, count 0 2006.229.16:12:56.62#ibcon#wrote, iclass 26, count 0 2006.229.16:12:56.62#ibcon#about to read 3, iclass 26, count 0 2006.229.16:12:56.65#ibcon#read 3, iclass 26, count 0 2006.229.16:12:56.65#ibcon#about to read 4, iclass 26, count 0 2006.229.16:12:56.65#ibcon#read 4, iclass 26, count 0 2006.229.16:12:56.65#ibcon#about to read 5, iclass 26, count 0 2006.229.16:12:56.65#ibcon#read 5, iclass 26, count 0 2006.229.16:12:56.65#ibcon#about to read 6, iclass 26, count 0 2006.229.16:12:56.65#ibcon#read 6, iclass 26, count 0 2006.229.16:12:56.65#ibcon#end of sib2, iclass 26, count 0 2006.229.16:12:56.65#ibcon#*after write, iclass 26, count 0 2006.229.16:12:56.65#ibcon#*before return 0, iclass 26, count 0 2006.229.16:12:56.65#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:12:56.65#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:12:56.65#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:12:56.65#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:12:56.65$setupk4/ifdk4 2006.229.16:12:56.65$ifdk4/lo= 2006.229.16:12:56.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:12:56.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:12:56.65$ifdk4/patch= 2006.229.16:12:56.65$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:12:56.65$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:12:56.65$setupk4/!*+20s 2006.229.16:13:06.50#abcon#<5=/05 1.2 2.1 27.211001001.9\r\n> 2006.229.16:13:06.52#abcon#{5=INTERFACE CLEAR} 2006.229.16:13:06.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:13:11.17$setupk4/"tpicd 2006.229.16:13:11.17$setupk4/echo=off 2006.229.16:13:11.17$setupk4/xlog=off 2006.229.16:13:11.17:!2006.229.16:14:19 2006.229.16:13:19.14#trakl#Source acquired 2006.229.16:13:20.14#flagr#flagr/antenna,acquired 2006.229.16:14:19.00:preob 2006.229.16:14:19.14/onsource/TRACKING 2006.229.16:14:19.14:!2006.229.16:14:29 2006.229.16:14:29.00:"tape 2006.229.16:14:29.00:"st=record 2006.229.16:14:29.00:data_valid=on 2006.229.16:14:29.00:midob 2006.229.16:14:29.14/onsource/TRACKING 2006.229.16:14:29.14/wx/27.20,1001.9,100 2006.229.16:14:29.34/cable/+6.4144E-03 2006.229.16:14:30.43/va/01,08,usb,yes,29,31 2006.229.16:14:30.43/va/02,07,usb,yes,32,32 2006.229.16:14:30.43/va/03,06,usb,yes,39,42 2006.229.16:14:30.43/va/04,07,usb,yes,33,34 2006.229.16:14:30.43/va/05,04,usb,yes,29,29 2006.229.16:14:30.43/va/06,04,usb,yes,33,32 2006.229.16:14:30.43/va/07,05,usb,yes,29,29 2006.229.16:14:30.43/va/08,06,usb,yes,21,26 2006.229.16:14:30.66/valo/01,524.99,yes,locked 2006.229.16:14:30.66/valo/02,534.99,yes,locked 2006.229.16:14:30.66/valo/03,564.99,yes,locked 2006.229.16:14:30.66/valo/04,624.99,yes,locked 2006.229.16:14:30.66/valo/05,734.99,yes,locked 2006.229.16:14:30.66/valo/06,814.99,yes,locked 2006.229.16:14:30.66/valo/07,864.99,yes,locked 2006.229.16:14:30.66/valo/08,884.99,yes,locked 2006.229.16:14:31.75/vb/01,04,usb,yes,31,28 2006.229.16:14:31.75/vb/02,04,usb,yes,33,33 2006.229.16:14:31.75/vb/03,04,usb,yes,30,33 2006.229.16:14:31.75/vb/04,04,usb,yes,34,33 2006.229.16:14:31.75/vb/05,04,usb,yes,27,29 2006.229.16:14:31.75/vb/06,04,usb,yes,31,27 2006.229.16:14:31.75/vb/07,04,usb,yes,31,31 2006.229.16:14:31.75/vb/08,04,usb,yes,28,32 2006.229.16:14:31.98/vblo/01,629.99,yes,locked 2006.229.16:14:31.98/vblo/02,634.99,yes,locked 2006.229.16:14:31.98/vblo/03,649.99,yes,locked 2006.229.16:14:31.98/vblo/04,679.99,yes,locked 2006.229.16:14:31.98/vblo/05,709.99,yes,locked 2006.229.16:14:31.98/vblo/06,719.99,yes,locked 2006.229.16:14:31.98/vblo/07,734.99,yes,locked 2006.229.16:14:31.98/vblo/08,744.99,yes,locked 2006.229.16:14:32.13/vabw/8 2006.229.16:14:32.28/vbbw/8 2006.229.16:14:32.37/xfe/off,on,12.0 2006.229.16:14:32.74/ifatt/23,28,28,28 2006.229.16:14:33.08/fmout-gps/S +4.51E-07 2006.229.16:14:33.12:!2006.229.16:15:39 2006.229.16:15:39.01:data_valid=off 2006.229.16:15:39.01:"et 2006.229.16:15:39.02:!+3s 2006.229.16:15:42.03:"tape 2006.229.16:15:42.03:postob 2006.229.16:15:42.21/cable/+6.4138E-03 2006.229.16:15:42.21/wx/27.20,1001.9,100 2006.229.16:15:42.27/fmout-gps/S +4.53E-07 2006.229.16:15:42.27:scan_name=229-1617,jd0608,170 2006.229.16:15:42.28:source=3c446,222547.26,-045701.4,2000.0,ccw 2006.229.16:15:44.13#flagr#flagr/antenna,new-source 2006.229.16:15:44.13:checkk5 2006.229.16:15:44.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:15:44.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:15:45.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:15:45.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:15:46.14/chk_obsdata//k5ts1/T2291614??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.16:15:46.54/chk_obsdata//k5ts2/T2291614??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.16:15:46.93/chk_obsdata//k5ts3/T2291614??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.16:15:47.34/chk_obsdata//k5ts4/T2291614??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.16:15:48.05/k5log//k5ts1_log_newline 2006.229.16:15:48.77/k5log//k5ts2_log_newline 2006.229.16:15:49.48/k5log//k5ts3_log_newline 2006.229.16:15:50.20/k5log//k5ts4_log_newline 2006.229.16:15:50.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:15:50.22:setupk4=1 2006.229.16:15:50.22$setupk4/echo=on 2006.229.16:15:50.22$setupk4/pcalon 2006.229.16:15:50.22$pcalon/"no phase cal control is implemented here 2006.229.16:15:50.22$setupk4/"tpicd=stop 2006.229.16:15:50.22$setupk4/"rec=synch_on 2006.229.16:15:50.22$setupk4/"rec_mode=128 2006.229.16:15:50.22$setupk4/!* 2006.229.16:15:50.22$setupk4/recpk4 2006.229.16:15:50.22$recpk4/recpatch= 2006.229.16:15:50.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:15:50.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:15:50.23$setupk4/vck44 2006.229.16:15:50.23$vck44/valo=1,524.99 2006.229.16:15:50.23#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.16:15:50.23#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.16:15:50.23#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:50.23#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:50.23#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:50.23#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:50.23#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:15:50.23#ibcon#first serial, iclass 27, count 0 2006.229.16:15:50.23#ibcon#enter sib2, iclass 27, count 0 2006.229.16:15:50.23#ibcon#flushed, iclass 27, count 0 2006.229.16:15:50.23#ibcon#about to write, iclass 27, count 0 2006.229.16:15:50.23#ibcon#wrote, iclass 27, count 0 2006.229.16:15:50.23#ibcon#about to read 3, iclass 27, count 0 2006.229.16:15:50.25#ibcon#read 3, iclass 27, count 0 2006.229.16:15:50.25#ibcon#about to read 4, iclass 27, count 0 2006.229.16:15:50.25#ibcon#read 4, iclass 27, count 0 2006.229.16:15:50.25#ibcon#about to read 5, iclass 27, count 0 2006.229.16:15:50.25#ibcon#read 5, iclass 27, count 0 2006.229.16:15:50.25#ibcon#about to read 6, iclass 27, count 0 2006.229.16:15:50.25#ibcon#read 6, iclass 27, count 0 2006.229.16:15:50.25#ibcon#end of sib2, iclass 27, count 0 2006.229.16:15:50.25#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:15:50.25#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:15:50.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:15:50.25#ibcon#*before write, iclass 27, count 0 2006.229.16:15:50.25#ibcon#enter sib2, iclass 27, count 0 2006.229.16:15:50.25#ibcon#flushed, iclass 27, count 0 2006.229.16:15:50.25#ibcon#about to write, iclass 27, count 0 2006.229.16:15:50.25#ibcon#wrote, iclass 27, count 0 2006.229.16:15:50.25#ibcon#about to read 3, iclass 27, count 0 2006.229.16:15:50.30#ibcon#read 3, iclass 27, count 0 2006.229.16:15:50.30#ibcon#about to read 4, iclass 27, count 0 2006.229.16:15:50.30#ibcon#read 4, iclass 27, count 0 2006.229.16:15:50.30#ibcon#about to read 5, iclass 27, count 0 2006.229.16:15:50.30#ibcon#read 5, iclass 27, count 0 2006.229.16:15:50.30#ibcon#about to read 6, iclass 27, count 0 2006.229.16:15:50.30#ibcon#read 6, iclass 27, count 0 2006.229.16:15:50.30#ibcon#end of sib2, iclass 27, count 0 2006.229.16:15:50.30#ibcon#*after write, iclass 27, count 0 2006.229.16:15:50.30#ibcon#*before return 0, iclass 27, count 0 2006.229.16:15:50.30#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:50.30#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:50.30#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:15:50.30#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:15:50.30$vck44/va=1,8 2006.229.16:15:50.30#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.16:15:50.30#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.16:15:50.30#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:50.30#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:50.30#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:50.30#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:50.30#ibcon#enter wrdev, iclass 29, count 2 2006.229.16:15:50.30#ibcon#first serial, iclass 29, count 2 2006.229.16:15:50.30#ibcon#enter sib2, iclass 29, count 2 2006.229.16:15:50.30#ibcon#flushed, iclass 29, count 2 2006.229.16:15:50.30#ibcon#about to write, iclass 29, count 2 2006.229.16:15:50.30#ibcon#wrote, iclass 29, count 2 2006.229.16:15:50.30#ibcon#about to read 3, iclass 29, count 2 2006.229.16:15:50.32#ibcon#read 3, iclass 29, count 2 2006.229.16:15:50.32#ibcon#about to read 4, iclass 29, count 2 2006.229.16:15:50.32#ibcon#read 4, iclass 29, count 2 2006.229.16:15:50.32#ibcon#about to read 5, iclass 29, count 2 2006.229.16:15:50.32#ibcon#read 5, iclass 29, count 2 2006.229.16:15:50.32#ibcon#about to read 6, iclass 29, count 2 2006.229.16:15:50.32#ibcon#read 6, iclass 29, count 2 2006.229.16:15:50.32#ibcon#end of sib2, iclass 29, count 2 2006.229.16:15:50.32#ibcon#*mode == 0, iclass 29, count 2 2006.229.16:15:50.32#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.16:15:50.32#ibcon#[25=AT01-08\r\n] 2006.229.16:15:50.32#ibcon#*before write, iclass 29, count 2 2006.229.16:15:50.32#ibcon#enter sib2, iclass 29, count 2 2006.229.16:15:50.32#ibcon#flushed, iclass 29, count 2 2006.229.16:15:50.32#ibcon#about to write, iclass 29, count 2 2006.229.16:15:50.32#ibcon#wrote, iclass 29, count 2 2006.229.16:15:50.32#ibcon#about to read 3, iclass 29, count 2 2006.229.16:15:50.35#ibcon#read 3, iclass 29, count 2 2006.229.16:15:50.35#ibcon#about to read 4, iclass 29, count 2 2006.229.16:15:50.35#ibcon#read 4, iclass 29, count 2 2006.229.16:15:50.35#ibcon#about to read 5, iclass 29, count 2 2006.229.16:15:50.35#ibcon#read 5, iclass 29, count 2 2006.229.16:15:50.35#ibcon#about to read 6, iclass 29, count 2 2006.229.16:15:50.35#ibcon#read 6, iclass 29, count 2 2006.229.16:15:50.35#ibcon#end of sib2, iclass 29, count 2 2006.229.16:15:50.35#ibcon#*after write, iclass 29, count 2 2006.229.16:15:50.35#ibcon#*before return 0, iclass 29, count 2 2006.229.16:15:50.35#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:50.35#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:50.35#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.16:15:50.35#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:50.35#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:50.47#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:50.47#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:50.47#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:15:50.47#ibcon#first serial, iclass 29, count 0 2006.229.16:15:50.47#ibcon#enter sib2, iclass 29, count 0 2006.229.16:15:50.47#ibcon#flushed, iclass 29, count 0 2006.229.16:15:50.47#ibcon#about to write, iclass 29, count 0 2006.229.16:15:50.47#ibcon#wrote, iclass 29, count 0 2006.229.16:15:50.47#ibcon#about to read 3, iclass 29, count 0 2006.229.16:15:50.49#ibcon#read 3, iclass 29, count 0 2006.229.16:15:50.49#ibcon#about to read 4, iclass 29, count 0 2006.229.16:15:50.49#ibcon#read 4, iclass 29, count 0 2006.229.16:15:50.49#ibcon#about to read 5, iclass 29, count 0 2006.229.16:15:50.49#ibcon#read 5, iclass 29, count 0 2006.229.16:15:50.49#ibcon#about to read 6, iclass 29, count 0 2006.229.16:15:50.49#ibcon#read 6, iclass 29, count 0 2006.229.16:15:50.49#ibcon#end of sib2, iclass 29, count 0 2006.229.16:15:50.49#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:15:50.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:15:50.49#ibcon#[25=USB\r\n] 2006.229.16:15:50.49#ibcon#*before write, iclass 29, count 0 2006.229.16:15:50.49#ibcon#enter sib2, iclass 29, count 0 2006.229.16:15:50.49#ibcon#flushed, iclass 29, count 0 2006.229.16:15:50.49#ibcon#about to write, iclass 29, count 0 2006.229.16:15:50.49#ibcon#wrote, iclass 29, count 0 2006.229.16:15:50.49#ibcon#about to read 3, iclass 29, count 0 2006.229.16:15:50.52#ibcon#read 3, iclass 29, count 0 2006.229.16:15:50.52#ibcon#about to read 4, iclass 29, count 0 2006.229.16:15:50.52#ibcon#read 4, iclass 29, count 0 2006.229.16:15:50.52#ibcon#about to read 5, iclass 29, count 0 2006.229.16:15:50.52#ibcon#read 5, iclass 29, count 0 2006.229.16:15:50.52#ibcon#about to read 6, iclass 29, count 0 2006.229.16:15:50.52#ibcon#read 6, iclass 29, count 0 2006.229.16:15:50.52#ibcon#end of sib2, iclass 29, count 0 2006.229.16:15:50.52#ibcon#*after write, iclass 29, count 0 2006.229.16:15:50.52#ibcon#*before return 0, iclass 29, count 0 2006.229.16:15:50.52#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:50.52#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:50.52#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:15:50.52#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:15:50.52$vck44/valo=2,534.99 2006.229.16:15:50.52#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.16:15:50.52#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.16:15:50.52#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:50.52#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:50.52#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:50.52#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:50.52#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:15:50.52#ibcon#first serial, iclass 31, count 0 2006.229.16:15:50.52#ibcon#enter sib2, iclass 31, count 0 2006.229.16:15:50.52#ibcon#flushed, iclass 31, count 0 2006.229.16:15:50.52#ibcon#about to write, iclass 31, count 0 2006.229.16:15:50.52#ibcon#wrote, iclass 31, count 0 2006.229.16:15:50.52#ibcon#about to read 3, iclass 31, count 0 2006.229.16:15:50.54#ibcon#read 3, iclass 31, count 0 2006.229.16:15:50.54#ibcon#about to read 4, iclass 31, count 0 2006.229.16:15:50.54#ibcon#read 4, iclass 31, count 0 2006.229.16:15:50.54#ibcon#about to read 5, iclass 31, count 0 2006.229.16:15:50.54#ibcon#read 5, iclass 31, count 0 2006.229.16:15:50.54#ibcon#about to read 6, iclass 31, count 0 2006.229.16:15:50.54#ibcon#read 6, iclass 31, count 0 2006.229.16:15:50.54#ibcon#end of sib2, iclass 31, count 0 2006.229.16:15:50.54#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:15:50.54#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:15:50.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:15:50.54#ibcon#*before write, iclass 31, count 0 2006.229.16:15:50.54#ibcon#enter sib2, iclass 31, count 0 2006.229.16:15:50.54#ibcon#flushed, iclass 31, count 0 2006.229.16:15:50.54#ibcon#about to write, iclass 31, count 0 2006.229.16:15:50.54#ibcon#wrote, iclass 31, count 0 2006.229.16:15:50.54#ibcon#about to read 3, iclass 31, count 0 2006.229.16:15:50.58#ibcon#read 3, iclass 31, count 0 2006.229.16:15:50.58#ibcon#about to read 4, iclass 31, count 0 2006.229.16:15:50.58#ibcon#read 4, iclass 31, count 0 2006.229.16:15:50.58#ibcon#about to read 5, iclass 31, count 0 2006.229.16:15:50.58#ibcon#read 5, iclass 31, count 0 2006.229.16:15:50.58#ibcon#about to read 6, iclass 31, count 0 2006.229.16:15:50.58#ibcon#read 6, iclass 31, count 0 2006.229.16:15:50.58#ibcon#end of sib2, iclass 31, count 0 2006.229.16:15:50.58#ibcon#*after write, iclass 31, count 0 2006.229.16:15:50.58#ibcon#*before return 0, iclass 31, count 0 2006.229.16:15:50.58#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:50.58#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:50.58#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:15:50.58#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:15:50.58$vck44/va=2,7 2006.229.16:15:50.58#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.16:15:50.58#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.16:15:50.58#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:50.58#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:50.64#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:50.64#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:50.64#ibcon#enter wrdev, iclass 33, count 2 2006.229.16:15:50.64#ibcon#first serial, iclass 33, count 2 2006.229.16:15:50.64#ibcon#enter sib2, iclass 33, count 2 2006.229.16:15:50.64#ibcon#flushed, iclass 33, count 2 2006.229.16:15:50.64#ibcon#about to write, iclass 33, count 2 2006.229.16:15:50.64#ibcon#wrote, iclass 33, count 2 2006.229.16:15:50.64#ibcon#about to read 3, iclass 33, count 2 2006.229.16:15:50.66#ibcon#read 3, iclass 33, count 2 2006.229.16:15:50.66#ibcon#about to read 4, iclass 33, count 2 2006.229.16:15:50.66#ibcon#read 4, iclass 33, count 2 2006.229.16:15:50.66#ibcon#about to read 5, iclass 33, count 2 2006.229.16:15:50.66#ibcon#read 5, iclass 33, count 2 2006.229.16:15:50.66#ibcon#about to read 6, iclass 33, count 2 2006.229.16:15:50.66#ibcon#read 6, iclass 33, count 2 2006.229.16:15:50.66#ibcon#end of sib2, iclass 33, count 2 2006.229.16:15:50.66#ibcon#*mode == 0, iclass 33, count 2 2006.229.16:15:50.66#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.16:15:50.66#ibcon#[25=AT02-07\r\n] 2006.229.16:15:50.66#ibcon#*before write, iclass 33, count 2 2006.229.16:15:50.66#ibcon#enter sib2, iclass 33, count 2 2006.229.16:15:50.66#ibcon#flushed, iclass 33, count 2 2006.229.16:15:50.66#ibcon#about to write, iclass 33, count 2 2006.229.16:15:50.66#ibcon#wrote, iclass 33, count 2 2006.229.16:15:50.66#ibcon#about to read 3, iclass 33, count 2 2006.229.16:15:50.69#ibcon#read 3, iclass 33, count 2 2006.229.16:15:50.69#ibcon#about to read 4, iclass 33, count 2 2006.229.16:15:50.69#ibcon#read 4, iclass 33, count 2 2006.229.16:15:50.69#ibcon#about to read 5, iclass 33, count 2 2006.229.16:15:50.69#ibcon#read 5, iclass 33, count 2 2006.229.16:15:50.69#ibcon#about to read 6, iclass 33, count 2 2006.229.16:15:50.69#ibcon#read 6, iclass 33, count 2 2006.229.16:15:50.69#ibcon#end of sib2, iclass 33, count 2 2006.229.16:15:50.69#ibcon#*after write, iclass 33, count 2 2006.229.16:15:50.69#ibcon#*before return 0, iclass 33, count 2 2006.229.16:15:50.69#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:50.69#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:50.69#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.16:15:50.69#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:50.69#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:50.81#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:50.81#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:50.81#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:15:50.81#ibcon#first serial, iclass 33, count 0 2006.229.16:15:50.81#ibcon#enter sib2, iclass 33, count 0 2006.229.16:15:50.81#ibcon#flushed, iclass 33, count 0 2006.229.16:15:50.81#ibcon#about to write, iclass 33, count 0 2006.229.16:15:50.81#ibcon#wrote, iclass 33, count 0 2006.229.16:15:50.81#ibcon#about to read 3, iclass 33, count 0 2006.229.16:15:50.83#ibcon#read 3, iclass 33, count 0 2006.229.16:15:50.83#ibcon#about to read 4, iclass 33, count 0 2006.229.16:15:50.83#ibcon#read 4, iclass 33, count 0 2006.229.16:15:50.83#ibcon#about to read 5, iclass 33, count 0 2006.229.16:15:50.83#ibcon#read 5, iclass 33, count 0 2006.229.16:15:50.83#ibcon#about to read 6, iclass 33, count 0 2006.229.16:15:50.83#ibcon#read 6, iclass 33, count 0 2006.229.16:15:50.83#ibcon#end of sib2, iclass 33, count 0 2006.229.16:15:50.83#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:15:50.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:15:50.83#ibcon#[25=USB\r\n] 2006.229.16:15:50.83#ibcon#*before write, iclass 33, count 0 2006.229.16:15:50.83#ibcon#enter sib2, iclass 33, count 0 2006.229.16:15:50.83#ibcon#flushed, iclass 33, count 0 2006.229.16:15:50.83#ibcon#about to write, iclass 33, count 0 2006.229.16:15:50.83#ibcon#wrote, iclass 33, count 0 2006.229.16:15:50.83#ibcon#about to read 3, iclass 33, count 0 2006.229.16:15:50.86#ibcon#read 3, iclass 33, count 0 2006.229.16:15:50.86#ibcon#about to read 4, iclass 33, count 0 2006.229.16:15:50.86#ibcon#read 4, iclass 33, count 0 2006.229.16:15:50.86#ibcon#about to read 5, iclass 33, count 0 2006.229.16:15:50.86#ibcon#read 5, iclass 33, count 0 2006.229.16:15:50.86#ibcon#about to read 6, iclass 33, count 0 2006.229.16:15:50.86#ibcon#read 6, iclass 33, count 0 2006.229.16:15:50.86#ibcon#end of sib2, iclass 33, count 0 2006.229.16:15:50.86#ibcon#*after write, iclass 33, count 0 2006.229.16:15:50.86#ibcon#*before return 0, iclass 33, count 0 2006.229.16:15:50.86#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:50.86#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:50.86#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:15:50.86#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:15:50.86$vck44/valo=3,564.99 2006.229.16:15:50.86#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.16:15:50.86#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.16:15:50.86#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:50.86#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:50.86#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:50.86#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:50.86#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:15:50.86#ibcon#first serial, iclass 35, count 0 2006.229.16:15:50.86#ibcon#enter sib2, iclass 35, count 0 2006.229.16:15:50.86#ibcon#flushed, iclass 35, count 0 2006.229.16:15:50.86#ibcon#about to write, iclass 35, count 0 2006.229.16:15:50.86#ibcon#wrote, iclass 35, count 0 2006.229.16:15:50.86#ibcon#about to read 3, iclass 35, count 0 2006.229.16:15:50.88#ibcon#read 3, iclass 35, count 0 2006.229.16:15:50.88#ibcon#about to read 4, iclass 35, count 0 2006.229.16:15:50.88#ibcon#read 4, iclass 35, count 0 2006.229.16:15:50.88#ibcon#about to read 5, iclass 35, count 0 2006.229.16:15:50.88#ibcon#read 5, iclass 35, count 0 2006.229.16:15:50.88#ibcon#about to read 6, iclass 35, count 0 2006.229.16:15:50.88#ibcon#read 6, iclass 35, count 0 2006.229.16:15:50.88#ibcon#end of sib2, iclass 35, count 0 2006.229.16:15:50.88#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:15:50.88#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:15:50.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:15:50.88#ibcon#*before write, iclass 35, count 0 2006.229.16:15:50.88#ibcon#enter sib2, iclass 35, count 0 2006.229.16:15:50.88#ibcon#flushed, iclass 35, count 0 2006.229.16:15:50.88#ibcon#about to write, iclass 35, count 0 2006.229.16:15:50.88#ibcon#wrote, iclass 35, count 0 2006.229.16:15:50.88#ibcon#about to read 3, iclass 35, count 0 2006.229.16:15:50.92#ibcon#read 3, iclass 35, count 0 2006.229.16:15:50.92#ibcon#about to read 4, iclass 35, count 0 2006.229.16:15:50.92#ibcon#read 4, iclass 35, count 0 2006.229.16:15:50.92#ibcon#about to read 5, iclass 35, count 0 2006.229.16:15:50.92#ibcon#read 5, iclass 35, count 0 2006.229.16:15:50.92#ibcon#about to read 6, iclass 35, count 0 2006.229.16:15:50.92#ibcon#read 6, iclass 35, count 0 2006.229.16:15:50.92#ibcon#end of sib2, iclass 35, count 0 2006.229.16:15:50.92#ibcon#*after write, iclass 35, count 0 2006.229.16:15:50.92#ibcon#*before return 0, iclass 35, count 0 2006.229.16:15:50.92#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:50.92#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:50.92#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:15:50.92#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:15:50.92$vck44/va=3,6 2006.229.16:15:50.92#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.16:15:50.92#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.16:15:50.92#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:50.92#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:50.98#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:50.98#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:50.98#ibcon#enter wrdev, iclass 37, count 2 2006.229.16:15:50.98#ibcon#first serial, iclass 37, count 2 2006.229.16:15:50.98#ibcon#enter sib2, iclass 37, count 2 2006.229.16:15:50.98#ibcon#flushed, iclass 37, count 2 2006.229.16:15:50.98#ibcon#about to write, iclass 37, count 2 2006.229.16:15:50.98#ibcon#wrote, iclass 37, count 2 2006.229.16:15:50.98#ibcon#about to read 3, iclass 37, count 2 2006.229.16:15:51.00#ibcon#read 3, iclass 37, count 2 2006.229.16:15:51.00#ibcon#about to read 4, iclass 37, count 2 2006.229.16:15:51.00#ibcon#read 4, iclass 37, count 2 2006.229.16:15:51.00#ibcon#about to read 5, iclass 37, count 2 2006.229.16:15:51.00#ibcon#read 5, iclass 37, count 2 2006.229.16:15:51.00#ibcon#about to read 6, iclass 37, count 2 2006.229.16:15:51.00#ibcon#read 6, iclass 37, count 2 2006.229.16:15:51.00#ibcon#end of sib2, iclass 37, count 2 2006.229.16:15:51.00#ibcon#*mode == 0, iclass 37, count 2 2006.229.16:15:51.00#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.16:15:51.00#ibcon#[25=AT03-06\r\n] 2006.229.16:15:51.00#ibcon#*before write, iclass 37, count 2 2006.229.16:15:51.00#ibcon#enter sib2, iclass 37, count 2 2006.229.16:15:51.00#ibcon#flushed, iclass 37, count 2 2006.229.16:15:51.00#ibcon#about to write, iclass 37, count 2 2006.229.16:15:51.00#ibcon#wrote, iclass 37, count 2 2006.229.16:15:51.00#ibcon#about to read 3, iclass 37, count 2 2006.229.16:15:51.03#ibcon#read 3, iclass 37, count 2 2006.229.16:15:51.03#ibcon#about to read 4, iclass 37, count 2 2006.229.16:15:51.03#ibcon#read 4, iclass 37, count 2 2006.229.16:15:51.03#ibcon#about to read 5, iclass 37, count 2 2006.229.16:15:51.03#ibcon#read 5, iclass 37, count 2 2006.229.16:15:51.03#ibcon#about to read 6, iclass 37, count 2 2006.229.16:15:51.03#ibcon#read 6, iclass 37, count 2 2006.229.16:15:51.03#ibcon#end of sib2, iclass 37, count 2 2006.229.16:15:51.03#ibcon#*after write, iclass 37, count 2 2006.229.16:15:51.03#ibcon#*before return 0, iclass 37, count 2 2006.229.16:15:51.03#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:51.03#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:51.03#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.16:15:51.03#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:51.03#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:51.15#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:51.15#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:51.15#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:15:51.15#ibcon#first serial, iclass 37, count 0 2006.229.16:15:51.15#ibcon#enter sib2, iclass 37, count 0 2006.229.16:15:51.15#ibcon#flushed, iclass 37, count 0 2006.229.16:15:51.15#ibcon#about to write, iclass 37, count 0 2006.229.16:15:51.15#ibcon#wrote, iclass 37, count 0 2006.229.16:15:51.15#ibcon#about to read 3, iclass 37, count 0 2006.229.16:15:51.17#ibcon#read 3, iclass 37, count 0 2006.229.16:15:51.17#ibcon#about to read 4, iclass 37, count 0 2006.229.16:15:51.17#ibcon#read 4, iclass 37, count 0 2006.229.16:15:51.17#ibcon#about to read 5, iclass 37, count 0 2006.229.16:15:51.17#ibcon#read 5, iclass 37, count 0 2006.229.16:15:51.17#ibcon#about to read 6, iclass 37, count 0 2006.229.16:15:51.17#ibcon#read 6, iclass 37, count 0 2006.229.16:15:51.17#ibcon#end of sib2, iclass 37, count 0 2006.229.16:15:51.17#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:15:51.17#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:15:51.17#ibcon#[25=USB\r\n] 2006.229.16:15:51.17#ibcon#*before write, iclass 37, count 0 2006.229.16:15:51.17#ibcon#enter sib2, iclass 37, count 0 2006.229.16:15:51.17#ibcon#flushed, iclass 37, count 0 2006.229.16:15:51.17#ibcon#about to write, iclass 37, count 0 2006.229.16:15:51.17#ibcon#wrote, iclass 37, count 0 2006.229.16:15:51.17#ibcon#about to read 3, iclass 37, count 0 2006.229.16:15:51.20#ibcon#read 3, iclass 37, count 0 2006.229.16:15:51.20#ibcon#about to read 4, iclass 37, count 0 2006.229.16:15:51.20#ibcon#read 4, iclass 37, count 0 2006.229.16:15:51.20#ibcon#about to read 5, iclass 37, count 0 2006.229.16:15:51.20#ibcon#read 5, iclass 37, count 0 2006.229.16:15:51.20#ibcon#about to read 6, iclass 37, count 0 2006.229.16:15:51.20#ibcon#read 6, iclass 37, count 0 2006.229.16:15:51.20#ibcon#end of sib2, iclass 37, count 0 2006.229.16:15:51.20#ibcon#*after write, iclass 37, count 0 2006.229.16:15:51.20#ibcon#*before return 0, iclass 37, count 0 2006.229.16:15:51.20#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:51.20#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:51.20#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:15:51.20#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:15:51.20$vck44/valo=4,624.99 2006.229.16:15:51.20#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.16:15:51.20#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.16:15:51.20#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:51.20#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:51.20#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:51.20#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:51.20#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:15:51.20#ibcon#first serial, iclass 39, count 0 2006.229.16:15:51.20#ibcon#enter sib2, iclass 39, count 0 2006.229.16:15:51.20#ibcon#flushed, iclass 39, count 0 2006.229.16:15:51.20#ibcon#about to write, iclass 39, count 0 2006.229.16:15:51.20#ibcon#wrote, iclass 39, count 0 2006.229.16:15:51.20#ibcon#about to read 3, iclass 39, count 0 2006.229.16:15:51.22#ibcon#read 3, iclass 39, count 0 2006.229.16:15:51.22#ibcon#about to read 4, iclass 39, count 0 2006.229.16:15:51.22#ibcon#read 4, iclass 39, count 0 2006.229.16:15:51.22#ibcon#about to read 5, iclass 39, count 0 2006.229.16:15:51.22#ibcon#read 5, iclass 39, count 0 2006.229.16:15:51.22#ibcon#about to read 6, iclass 39, count 0 2006.229.16:15:51.22#ibcon#read 6, iclass 39, count 0 2006.229.16:15:51.22#ibcon#end of sib2, iclass 39, count 0 2006.229.16:15:51.22#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:15:51.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:15:51.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:15:51.22#ibcon#*before write, iclass 39, count 0 2006.229.16:15:51.22#ibcon#enter sib2, iclass 39, count 0 2006.229.16:15:51.22#ibcon#flushed, iclass 39, count 0 2006.229.16:15:51.22#ibcon#about to write, iclass 39, count 0 2006.229.16:15:51.22#ibcon#wrote, iclass 39, count 0 2006.229.16:15:51.22#ibcon#about to read 3, iclass 39, count 0 2006.229.16:15:51.26#ibcon#read 3, iclass 39, count 0 2006.229.16:15:51.26#ibcon#about to read 4, iclass 39, count 0 2006.229.16:15:51.26#ibcon#read 4, iclass 39, count 0 2006.229.16:15:51.26#ibcon#about to read 5, iclass 39, count 0 2006.229.16:15:51.26#ibcon#read 5, iclass 39, count 0 2006.229.16:15:51.26#ibcon#about to read 6, iclass 39, count 0 2006.229.16:15:51.26#ibcon#read 6, iclass 39, count 0 2006.229.16:15:51.26#ibcon#end of sib2, iclass 39, count 0 2006.229.16:15:51.26#ibcon#*after write, iclass 39, count 0 2006.229.16:15:51.26#ibcon#*before return 0, iclass 39, count 0 2006.229.16:15:51.26#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:51.26#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:51.26#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:15:51.26#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:15:51.26$vck44/va=4,7 2006.229.16:15:51.26#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.16:15:51.26#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.16:15:51.26#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:51.26#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:51.32#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:51.32#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:51.32#ibcon#enter wrdev, iclass 3, count 2 2006.229.16:15:51.32#ibcon#first serial, iclass 3, count 2 2006.229.16:15:51.32#ibcon#enter sib2, iclass 3, count 2 2006.229.16:15:51.32#ibcon#flushed, iclass 3, count 2 2006.229.16:15:51.32#ibcon#about to write, iclass 3, count 2 2006.229.16:15:51.32#ibcon#wrote, iclass 3, count 2 2006.229.16:15:51.32#ibcon#about to read 3, iclass 3, count 2 2006.229.16:15:51.34#ibcon#read 3, iclass 3, count 2 2006.229.16:15:51.34#ibcon#about to read 4, iclass 3, count 2 2006.229.16:15:51.34#ibcon#read 4, iclass 3, count 2 2006.229.16:15:51.34#ibcon#about to read 5, iclass 3, count 2 2006.229.16:15:51.34#ibcon#read 5, iclass 3, count 2 2006.229.16:15:51.34#ibcon#about to read 6, iclass 3, count 2 2006.229.16:15:51.34#ibcon#read 6, iclass 3, count 2 2006.229.16:15:51.34#ibcon#end of sib2, iclass 3, count 2 2006.229.16:15:51.34#ibcon#*mode == 0, iclass 3, count 2 2006.229.16:15:51.34#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.16:15:51.34#ibcon#[25=AT04-07\r\n] 2006.229.16:15:51.34#ibcon#*before write, iclass 3, count 2 2006.229.16:15:51.34#ibcon#enter sib2, iclass 3, count 2 2006.229.16:15:51.34#ibcon#flushed, iclass 3, count 2 2006.229.16:15:51.34#ibcon#about to write, iclass 3, count 2 2006.229.16:15:51.34#ibcon#wrote, iclass 3, count 2 2006.229.16:15:51.34#ibcon#about to read 3, iclass 3, count 2 2006.229.16:15:51.37#ibcon#read 3, iclass 3, count 2 2006.229.16:15:51.37#ibcon#about to read 4, iclass 3, count 2 2006.229.16:15:51.37#ibcon#read 4, iclass 3, count 2 2006.229.16:15:51.37#ibcon#about to read 5, iclass 3, count 2 2006.229.16:15:51.37#ibcon#read 5, iclass 3, count 2 2006.229.16:15:51.37#ibcon#about to read 6, iclass 3, count 2 2006.229.16:15:51.37#ibcon#read 6, iclass 3, count 2 2006.229.16:15:51.37#ibcon#end of sib2, iclass 3, count 2 2006.229.16:15:51.37#ibcon#*after write, iclass 3, count 2 2006.229.16:15:51.37#ibcon#*before return 0, iclass 3, count 2 2006.229.16:15:51.37#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:51.37#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:51.37#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.16:15:51.37#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:51.37#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:51.49#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:51.49#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:51.49#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:15:51.49#ibcon#first serial, iclass 3, count 0 2006.229.16:15:51.49#ibcon#enter sib2, iclass 3, count 0 2006.229.16:15:51.49#ibcon#flushed, iclass 3, count 0 2006.229.16:15:51.49#ibcon#about to write, iclass 3, count 0 2006.229.16:15:51.49#ibcon#wrote, iclass 3, count 0 2006.229.16:15:51.49#ibcon#about to read 3, iclass 3, count 0 2006.229.16:15:51.51#ibcon#read 3, iclass 3, count 0 2006.229.16:15:51.51#ibcon#about to read 4, iclass 3, count 0 2006.229.16:15:51.51#ibcon#read 4, iclass 3, count 0 2006.229.16:15:51.51#ibcon#about to read 5, iclass 3, count 0 2006.229.16:15:51.51#ibcon#read 5, iclass 3, count 0 2006.229.16:15:51.51#ibcon#about to read 6, iclass 3, count 0 2006.229.16:15:51.51#ibcon#read 6, iclass 3, count 0 2006.229.16:15:51.51#ibcon#end of sib2, iclass 3, count 0 2006.229.16:15:51.51#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:15:51.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:15:51.51#ibcon#[25=USB\r\n] 2006.229.16:15:51.51#ibcon#*before write, iclass 3, count 0 2006.229.16:15:51.51#ibcon#enter sib2, iclass 3, count 0 2006.229.16:15:51.51#ibcon#flushed, iclass 3, count 0 2006.229.16:15:51.51#ibcon#about to write, iclass 3, count 0 2006.229.16:15:51.51#ibcon#wrote, iclass 3, count 0 2006.229.16:15:51.51#ibcon#about to read 3, iclass 3, count 0 2006.229.16:15:51.54#ibcon#read 3, iclass 3, count 0 2006.229.16:15:51.54#ibcon#about to read 4, iclass 3, count 0 2006.229.16:15:51.54#ibcon#read 4, iclass 3, count 0 2006.229.16:15:51.54#ibcon#about to read 5, iclass 3, count 0 2006.229.16:15:51.54#ibcon#read 5, iclass 3, count 0 2006.229.16:15:51.54#ibcon#about to read 6, iclass 3, count 0 2006.229.16:15:51.54#ibcon#read 6, iclass 3, count 0 2006.229.16:15:51.54#ibcon#end of sib2, iclass 3, count 0 2006.229.16:15:51.54#ibcon#*after write, iclass 3, count 0 2006.229.16:15:51.54#ibcon#*before return 0, iclass 3, count 0 2006.229.16:15:51.54#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:51.54#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:51.54#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:15:51.54#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:15:51.54$vck44/valo=5,734.99 2006.229.16:15:51.54#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.16:15:51.54#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.16:15:51.54#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:51.54#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:51.54#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:51.54#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:51.54#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:15:51.54#ibcon#first serial, iclass 5, count 0 2006.229.16:15:51.54#ibcon#enter sib2, iclass 5, count 0 2006.229.16:15:51.54#ibcon#flushed, iclass 5, count 0 2006.229.16:15:51.54#ibcon#about to write, iclass 5, count 0 2006.229.16:15:51.54#ibcon#wrote, iclass 5, count 0 2006.229.16:15:51.54#ibcon#about to read 3, iclass 5, count 0 2006.229.16:15:51.56#ibcon#read 3, iclass 5, count 0 2006.229.16:15:51.56#ibcon#about to read 4, iclass 5, count 0 2006.229.16:15:51.56#ibcon#read 4, iclass 5, count 0 2006.229.16:15:51.56#ibcon#about to read 5, iclass 5, count 0 2006.229.16:15:51.56#ibcon#read 5, iclass 5, count 0 2006.229.16:15:51.56#ibcon#about to read 6, iclass 5, count 0 2006.229.16:15:51.56#ibcon#read 6, iclass 5, count 0 2006.229.16:15:51.56#ibcon#end of sib2, iclass 5, count 0 2006.229.16:15:51.56#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:15:51.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:15:51.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:15:51.56#ibcon#*before write, iclass 5, count 0 2006.229.16:15:51.56#ibcon#enter sib2, iclass 5, count 0 2006.229.16:15:51.56#ibcon#flushed, iclass 5, count 0 2006.229.16:15:51.56#ibcon#about to write, iclass 5, count 0 2006.229.16:15:51.56#ibcon#wrote, iclass 5, count 0 2006.229.16:15:51.56#ibcon#about to read 3, iclass 5, count 0 2006.229.16:15:51.60#ibcon#read 3, iclass 5, count 0 2006.229.16:15:51.60#ibcon#about to read 4, iclass 5, count 0 2006.229.16:15:51.60#ibcon#read 4, iclass 5, count 0 2006.229.16:15:51.60#ibcon#about to read 5, iclass 5, count 0 2006.229.16:15:51.60#ibcon#read 5, iclass 5, count 0 2006.229.16:15:51.60#ibcon#about to read 6, iclass 5, count 0 2006.229.16:15:51.60#ibcon#read 6, iclass 5, count 0 2006.229.16:15:51.60#ibcon#end of sib2, iclass 5, count 0 2006.229.16:15:51.60#ibcon#*after write, iclass 5, count 0 2006.229.16:15:51.60#ibcon#*before return 0, iclass 5, count 0 2006.229.16:15:51.60#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:51.60#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:51.60#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:15:51.60#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:15:51.60$vck44/va=5,4 2006.229.16:15:51.60#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.16:15:51.60#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.16:15:51.60#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:51.60#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:51.66#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:51.66#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:51.66#ibcon#enter wrdev, iclass 7, count 2 2006.229.16:15:51.66#ibcon#first serial, iclass 7, count 2 2006.229.16:15:51.66#ibcon#enter sib2, iclass 7, count 2 2006.229.16:15:51.66#ibcon#flushed, iclass 7, count 2 2006.229.16:15:51.66#ibcon#about to write, iclass 7, count 2 2006.229.16:15:51.66#ibcon#wrote, iclass 7, count 2 2006.229.16:15:51.66#ibcon#about to read 3, iclass 7, count 2 2006.229.16:15:51.68#ibcon#read 3, iclass 7, count 2 2006.229.16:15:51.68#ibcon#about to read 4, iclass 7, count 2 2006.229.16:15:51.68#ibcon#read 4, iclass 7, count 2 2006.229.16:15:51.68#ibcon#about to read 5, iclass 7, count 2 2006.229.16:15:51.68#ibcon#read 5, iclass 7, count 2 2006.229.16:15:51.68#ibcon#about to read 6, iclass 7, count 2 2006.229.16:15:51.68#ibcon#read 6, iclass 7, count 2 2006.229.16:15:51.68#ibcon#end of sib2, iclass 7, count 2 2006.229.16:15:51.68#ibcon#*mode == 0, iclass 7, count 2 2006.229.16:15:51.68#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.16:15:51.68#ibcon#[25=AT05-04\r\n] 2006.229.16:15:51.68#ibcon#*before write, iclass 7, count 2 2006.229.16:15:51.68#ibcon#enter sib2, iclass 7, count 2 2006.229.16:15:51.68#ibcon#flushed, iclass 7, count 2 2006.229.16:15:51.68#ibcon#about to write, iclass 7, count 2 2006.229.16:15:51.68#ibcon#wrote, iclass 7, count 2 2006.229.16:15:51.68#ibcon#about to read 3, iclass 7, count 2 2006.229.16:15:51.71#ibcon#read 3, iclass 7, count 2 2006.229.16:15:51.71#ibcon#about to read 4, iclass 7, count 2 2006.229.16:15:51.71#ibcon#read 4, iclass 7, count 2 2006.229.16:15:51.71#ibcon#about to read 5, iclass 7, count 2 2006.229.16:15:51.71#ibcon#read 5, iclass 7, count 2 2006.229.16:15:51.71#ibcon#about to read 6, iclass 7, count 2 2006.229.16:15:51.71#ibcon#read 6, iclass 7, count 2 2006.229.16:15:51.71#ibcon#end of sib2, iclass 7, count 2 2006.229.16:15:51.71#ibcon#*after write, iclass 7, count 2 2006.229.16:15:51.71#ibcon#*before return 0, iclass 7, count 2 2006.229.16:15:51.71#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:51.71#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:51.71#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.16:15:51.71#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:51.71#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:51.83#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:51.83#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:51.83#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:15:51.83#ibcon#first serial, iclass 7, count 0 2006.229.16:15:51.83#ibcon#enter sib2, iclass 7, count 0 2006.229.16:15:51.83#ibcon#flushed, iclass 7, count 0 2006.229.16:15:51.83#ibcon#about to write, iclass 7, count 0 2006.229.16:15:51.83#ibcon#wrote, iclass 7, count 0 2006.229.16:15:51.83#ibcon#about to read 3, iclass 7, count 0 2006.229.16:15:51.85#ibcon#read 3, iclass 7, count 0 2006.229.16:15:51.85#ibcon#about to read 4, iclass 7, count 0 2006.229.16:15:51.85#ibcon#read 4, iclass 7, count 0 2006.229.16:15:51.85#ibcon#about to read 5, iclass 7, count 0 2006.229.16:15:51.85#ibcon#read 5, iclass 7, count 0 2006.229.16:15:51.85#ibcon#about to read 6, iclass 7, count 0 2006.229.16:15:51.85#ibcon#read 6, iclass 7, count 0 2006.229.16:15:51.85#ibcon#end of sib2, iclass 7, count 0 2006.229.16:15:51.85#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:15:51.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:15:51.85#ibcon#[25=USB\r\n] 2006.229.16:15:51.85#ibcon#*before write, iclass 7, count 0 2006.229.16:15:51.85#ibcon#enter sib2, iclass 7, count 0 2006.229.16:15:51.85#ibcon#flushed, iclass 7, count 0 2006.229.16:15:51.85#ibcon#about to write, iclass 7, count 0 2006.229.16:15:51.85#ibcon#wrote, iclass 7, count 0 2006.229.16:15:51.85#ibcon#about to read 3, iclass 7, count 0 2006.229.16:15:51.88#ibcon#read 3, iclass 7, count 0 2006.229.16:15:51.88#ibcon#about to read 4, iclass 7, count 0 2006.229.16:15:51.88#ibcon#read 4, iclass 7, count 0 2006.229.16:15:51.88#ibcon#about to read 5, iclass 7, count 0 2006.229.16:15:51.88#ibcon#read 5, iclass 7, count 0 2006.229.16:15:51.88#ibcon#about to read 6, iclass 7, count 0 2006.229.16:15:51.88#ibcon#read 6, iclass 7, count 0 2006.229.16:15:51.88#ibcon#end of sib2, iclass 7, count 0 2006.229.16:15:51.88#ibcon#*after write, iclass 7, count 0 2006.229.16:15:51.88#ibcon#*before return 0, iclass 7, count 0 2006.229.16:15:51.88#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:51.88#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:51.88#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:15:51.88#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:15:51.88$vck44/valo=6,814.99 2006.229.16:15:51.88#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.16:15:51.88#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.16:15:51.88#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:51.88#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:51.88#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:51.88#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:51.88#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:15:51.88#ibcon#first serial, iclass 11, count 0 2006.229.16:15:51.88#ibcon#enter sib2, iclass 11, count 0 2006.229.16:15:51.88#ibcon#flushed, iclass 11, count 0 2006.229.16:15:51.88#ibcon#about to write, iclass 11, count 0 2006.229.16:15:51.88#ibcon#wrote, iclass 11, count 0 2006.229.16:15:51.88#ibcon#about to read 3, iclass 11, count 0 2006.229.16:15:51.90#ibcon#read 3, iclass 11, count 0 2006.229.16:15:51.90#ibcon#about to read 4, iclass 11, count 0 2006.229.16:15:51.90#ibcon#read 4, iclass 11, count 0 2006.229.16:15:51.90#ibcon#about to read 5, iclass 11, count 0 2006.229.16:15:51.90#ibcon#read 5, iclass 11, count 0 2006.229.16:15:51.90#ibcon#about to read 6, iclass 11, count 0 2006.229.16:15:51.90#ibcon#read 6, iclass 11, count 0 2006.229.16:15:51.90#ibcon#end of sib2, iclass 11, count 0 2006.229.16:15:51.90#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:15:51.90#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:15:51.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:15:51.90#ibcon#*before write, iclass 11, count 0 2006.229.16:15:51.90#ibcon#enter sib2, iclass 11, count 0 2006.229.16:15:51.90#ibcon#flushed, iclass 11, count 0 2006.229.16:15:51.90#ibcon#about to write, iclass 11, count 0 2006.229.16:15:51.90#ibcon#wrote, iclass 11, count 0 2006.229.16:15:51.90#ibcon#about to read 3, iclass 11, count 0 2006.229.16:15:51.94#ibcon#read 3, iclass 11, count 0 2006.229.16:15:51.94#ibcon#about to read 4, iclass 11, count 0 2006.229.16:15:51.94#ibcon#read 4, iclass 11, count 0 2006.229.16:15:51.94#ibcon#about to read 5, iclass 11, count 0 2006.229.16:15:51.94#ibcon#read 5, iclass 11, count 0 2006.229.16:15:51.94#ibcon#about to read 6, iclass 11, count 0 2006.229.16:15:51.94#ibcon#read 6, iclass 11, count 0 2006.229.16:15:51.94#ibcon#end of sib2, iclass 11, count 0 2006.229.16:15:51.94#ibcon#*after write, iclass 11, count 0 2006.229.16:15:51.94#ibcon#*before return 0, iclass 11, count 0 2006.229.16:15:51.94#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:51.94#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:51.94#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:15:51.94#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:15:51.94$vck44/va=6,4 2006.229.16:15:51.94#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.16:15:51.94#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.16:15:51.94#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:51.94#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:52.00#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:52.00#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:52.00#ibcon#enter wrdev, iclass 13, count 2 2006.229.16:15:52.00#ibcon#first serial, iclass 13, count 2 2006.229.16:15:52.00#ibcon#enter sib2, iclass 13, count 2 2006.229.16:15:52.00#ibcon#flushed, iclass 13, count 2 2006.229.16:15:52.00#ibcon#about to write, iclass 13, count 2 2006.229.16:15:52.00#ibcon#wrote, iclass 13, count 2 2006.229.16:15:52.00#ibcon#about to read 3, iclass 13, count 2 2006.229.16:15:52.02#ibcon#read 3, iclass 13, count 2 2006.229.16:15:52.02#ibcon#about to read 4, iclass 13, count 2 2006.229.16:15:52.02#ibcon#read 4, iclass 13, count 2 2006.229.16:15:52.02#ibcon#about to read 5, iclass 13, count 2 2006.229.16:15:52.02#ibcon#read 5, iclass 13, count 2 2006.229.16:15:52.02#ibcon#about to read 6, iclass 13, count 2 2006.229.16:15:52.02#ibcon#read 6, iclass 13, count 2 2006.229.16:15:52.02#ibcon#end of sib2, iclass 13, count 2 2006.229.16:15:52.02#ibcon#*mode == 0, iclass 13, count 2 2006.229.16:15:52.02#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.16:15:52.02#ibcon#[25=AT06-04\r\n] 2006.229.16:15:52.02#ibcon#*before write, iclass 13, count 2 2006.229.16:15:52.02#ibcon#enter sib2, iclass 13, count 2 2006.229.16:15:52.02#ibcon#flushed, iclass 13, count 2 2006.229.16:15:52.02#ibcon#about to write, iclass 13, count 2 2006.229.16:15:52.02#ibcon#wrote, iclass 13, count 2 2006.229.16:15:52.02#ibcon#about to read 3, iclass 13, count 2 2006.229.16:15:52.05#ibcon#read 3, iclass 13, count 2 2006.229.16:15:52.05#ibcon#about to read 4, iclass 13, count 2 2006.229.16:15:52.05#ibcon#read 4, iclass 13, count 2 2006.229.16:15:52.05#ibcon#about to read 5, iclass 13, count 2 2006.229.16:15:52.05#ibcon#read 5, iclass 13, count 2 2006.229.16:15:52.05#ibcon#about to read 6, iclass 13, count 2 2006.229.16:15:52.05#ibcon#read 6, iclass 13, count 2 2006.229.16:15:52.05#ibcon#end of sib2, iclass 13, count 2 2006.229.16:15:52.05#ibcon#*after write, iclass 13, count 2 2006.229.16:15:52.05#ibcon#*before return 0, iclass 13, count 2 2006.229.16:15:52.05#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:52.05#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:52.05#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.16:15:52.05#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:52.05#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:52.17#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:52.17#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:52.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:15:52.17#ibcon#first serial, iclass 13, count 0 2006.229.16:15:52.17#ibcon#enter sib2, iclass 13, count 0 2006.229.16:15:52.17#ibcon#flushed, iclass 13, count 0 2006.229.16:15:52.17#ibcon#about to write, iclass 13, count 0 2006.229.16:15:52.17#ibcon#wrote, iclass 13, count 0 2006.229.16:15:52.17#ibcon#about to read 3, iclass 13, count 0 2006.229.16:15:52.19#ibcon#read 3, iclass 13, count 0 2006.229.16:15:52.19#ibcon#about to read 4, iclass 13, count 0 2006.229.16:15:52.19#ibcon#read 4, iclass 13, count 0 2006.229.16:15:52.19#ibcon#about to read 5, iclass 13, count 0 2006.229.16:15:52.19#ibcon#read 5, iclass 13, count 0 2006.229.16:15:52.19#ibcon#about to read 6, iclass 13, count 0 2006.229.16:15:52.19#ibcon#read 6, iclass 13, count 0 2006.229.16:15:52.19#ibcon#end of sib2, iclass 13, count 0 2006.229.16:15:52.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:15:52.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:15:52.19#ibcon#[25=USB\r\n] 2006.229.16:15:52.19#ibcon#*before write, iclass 13, count 0 2006.229.16:15:52.19#ibcon#enter sib2, iclass 13, count 0 2006.229.16:15:52.19#ibcon#flushed, iclass 13, count 0 2006.229.16:15:52.19#ibcon#about to write, iclass 13, count 0 2006.229.16:15:52.19#ibcon#wrote, iclass 13, count 0 2006.229.16:15:52.19#ibcon#about to read 3, iclass 13, count 0 2006.229.16:15:52.22#ibcon#read 3, iclass 13, count 0 2006.229.16:15:52.22#ibcon#about to read 4, iclass 13, count 0 2006.229.16:15:52.22#ibcon#read 4, iclass 13, count 0 2006.229.16:15:52.22#ibcon#about to read 5, iclass 13, count 0 2006.229.16:15:52.22#ibcon#read 5, iclass 13, count 0 2006.229.16:15:52.22#ibcon#about to read 6, iclass 13, count 0 2006.229.16:15:52.22#ibcon#read 6, iclass 13, count 0 2006.229.16:15:52.22#ibcon#end of sib2, iclass 13, count 0 2006.229.16:15:52.22#ibcon#*after write, iclass 13, count 0 2006.229.16:15:52.22#ibcon#*before return 0, iclass 13, count 0 2006.229.16:15:52.22#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:52.22#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:52.22#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:15:52.22#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:15:52.22$vck44/valo=7,864.99 2006.229.16:15:52.22#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.16:15:52.22#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.16:15:52.22#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:52.22#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:52.22#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:52.22#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:52.22#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:15:52.22#ibcon#first serial, iclass 15, count 0 2006.229.16:15:52.22#ibcon#enter sib2, iclass 15, count 0 2006.229.16:15:52.22#ibcon#flushed, iclass 15, count 0 2006.229.16:15:52.22#ibcon#about to write, iclass 15, count 0 2006.229.16:15:52.22#ibcon#wrote, iclass 15, count 0 2006.229.16:15:52.22#ibcon#about to read 3, iclass 15, count 0 2006.229.16:15:52.24#ibcon#read 3, iclass 15, count 0 2006.229.16:15:52.24#ibcon#about to read 4, iclass 15, count 0 2006.229.16:15:52.24#ibcon#read 4, iclass 15, count 0 2006.229.16:15:52.24#ibcon#about to read 5, iclass 15, count 0 2006.229.16:15:52.24#ibcon#read 5, iclass 15, count 0 2006.229.16:15:52.24#ibcon#about to read 6, iclass 15, count 0 2006.229.16:15:52.24#ibcon#read 6, iclass 15, count 0 2006.229.16:15:52.24#ibcon#end of sib2, iclass 15, count 0 2006.229.16:15:52.24#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:15:52.24#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:15:52.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:15:52.24#ibcon#*before write, iclass 15, count 0 2006.229.16:15:52.24#ibcon#enter sib2, iclass 15, count 0 2006.229.16:15:52.24#ibcon#flushed, iclass 15, count 0 2006.229.16:15:52.24#ibcon#about to write, iclass 15, count 0 2006.229.16:15:52.24#ibcon#wrote, iclass 15, count 0 2006.229.16:15:52.24#ibcon#about to read 3, iclass 15, count 0 2006.229.16:15:52.28#ibcon#read 3, iclass 15, count 0 2006.229.16:15:52.28#ibcon#about to read 4, iclass 15, count 0 2006.229.16:15:52.28#ibcon#read 4, iclass 15, count 0 2006.229.16:15:52.28#ibcon#about to read 5, iclass 15, count 0 2006.229.16:15:52.28#ibcon#read 5, iclass 15, count 0 2006.229.16:15:52.28#ibcon#about to read 6, iclass 15, count 0 2006.229.16:15:52.28#ibcon#read 6, iclass 15, count 0 2006.229.16:15:52.28#ibcon#end of sib2, iclass 15, count 0 2006.229.16:15:52.28#ibcon#*after write, iclass 15, count 0 2006.229.16:15:52.28#ibcon#*before return 0, iclass 15, count 0 2006.229.16:15:52.28#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:52.28#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:52.28#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:15:52.28#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:15:52.28$vck44/va=7,5 2006.229.16:15:52.28#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.16:15:52.28#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.16:15:52.28#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:52.28#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:52.34#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:52.34#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:52.34#ibcon#enter wrdev, iclass 17, count 2 2006.229.16:15:52.34#ibcon#first serial, iclass 17, count 2 2006.229.16:15:52.34#ibcon#enter sib2, iclass 17, count 2 2006.229.16:15:52.34#ibcon#flushed, iclass 17, count 2 2006.229.16:15:52.34#ibcon#about to write, iclass 17, count 2 2006.229.16:15:52.34#ibcon#wrote, iclass 17, count 2 2006.229.16:15:52.34#ibcon#about to read 3, iclass 17, count 2 2006.229.16:15:52.36#ibcon#read 3, iclass 17, count 2 2006.229.16:15:52.36#ibcon#about to read 4, iclass 17, count 2 2006.229.16:15:52.36#ibcon#read 4, iclass 17, count 2 2006.229.16:15:52.36#ibcon#about to read 5, iclass 17, count 2 2006.229.16:15:52.36#ibcon#read 5, iclass 17, count 2 2006.229.16:15:52.36#ibcon#about to read 6, iclass 17, count 2 2006.229.16:15:52.36#ibcon#read 6, iclass 17, count 2 2006.229.16:15:52.36#ibcon#end of sib2, iclass 17, count 2 2006.229.16:15:52.36#ibcon#*mode == 0, iclass 17, count 2 2006.229.16:15:52.36#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.16:15:52.36#ibcon#[25=AT07-05\r\n] 2006.229.16:15:52.36#ibcon#*before write, iclass 17, count 2 2006.229.16:15:52.36#ibcon#enter sib2, iclass 17, count 2 2006.229.16:15:52.36#ibcon#flushed, iclass 17, count 2 2006.229.16:15:52.36#ibcon#about to write, iclass 17, count 2 2006.229.16:15:52.36#ibcon#wrote, iclass 17, count 2 2006.229.16:15:52.36#ibcon#about to read 3, iclass 17, count 2 2006.229.16:15:52.39#ibcon#read 3, iclass 17, count 2 2006.229.16:15:52.39#ibcon#about to read 4, iclass 17, count 2 2006.229.16:15:52.39#ibcon#read 4, iclass 17, count 2 2006.229.16:15:52.39#ibcon#about to read 5, iclass 17, count 2 2006.229.16:15:52.39#ibcon#read 5, iclass 17, count 2 2006.229.16:15:52.39#ibcon#about to read 6, iclass 17, count 2 2006.229.16:15:52.39#ibcon#read 6, iclass 17, count 2 2006.229.16:15:52.39#ibcon#end of sib2, iclass 17, count 2 2006.229.16:15:52.39#ibcon#*after write, iclass 17, count 2 2006.229.16:15:52.39#ibcon#*before return 0, iclass 17, count 2 2006.229.16:15:52.39#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:52.39#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:52.39#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.16:15:52.39#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:52.39#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:52.51#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:52.51#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:52.51#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:15:52.51#ibcon#first serial, iclass 17, count 0 2006.229.16:15:52.51#ibcon#enter sib2, iclass 17, count 0 2006.229.16:15:52.51#ibcon#flushed, iclass 17, count 0 2006.229.16:15:52.51#ibcon#about to write, iclass 17, count 0 2006.229.16:15:52.51#ibcon#wrote, iclass 17, count 0 2006.229.16:15:52.51#ibcon#about to read 3, iclass 17, count 0 2006.229.16:15:52.53#ibcon#read 3, iclass 17, count 0 2006.229.16:15:52.53#ibcon#about to read 4, iclass 17, count 0 2006.229.16:15:52.53#ibcon#read 4, iclass 17, count 0 2006.229.16:15:52.53#ibcon#about to read 5, iclass 17, count 0 2006.229.16:15:52.53#ibcon#read 5, iclass 17, count 0 2006.229.16:15:52.53#ibcon#about to read 6, iclass 17, count 0 2006.229.16:15:52.53#ibcon#read 6, iclass 17, count 0 2006.229.16:15:52.53#ibcon#end of sib2, iclass 17, count 0 2006.229.16:15:52.53#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:15:52.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:15:52.53#ibcon#[25=USB\r\n] 2006.229.16:15:52.53#ibcon#*before write, iclass 17, count 0 2006.229.16:15:52.53#ibcon#enter sib2, iclass 17, count 0 2006.229.16:15:52.53#ibcon#flushed, iclass 17, count 0 2006.229.16:15:52.53#ibcon#about to write, iclass 17, count 0 2006.229.16:15:52.53#ibcon#wrote, iclass 17, count 0 2006.229.16:15:52.53#ibcon#about to read 3, iclass 17, count 0 2006.229.16:15:52.56#ibcon#read 3, iclass 17, count 0 2006.229.16:15:52.56#ibcon#about to read 4, iclass 17, count 0 2006.229.16:15:52.56#ibcon#read 4, iclass 17, count 0 2006.229.16:15:52.56#ibcon#about to read 5, iclass 17, count 0 2006.229.16:15:52.56#ibcon#read 5, iclass 17, count 0 2006.229.16:15:52.56#ibcon#about to read 6, iclass 17, count 0 2006.229.16:15:52.56#ibcon#read 6, iclass 17, count 0 2006.229.16:15:52.56#ibcon#end of sib2, iclass 17, count 0 2006.229.16:15:52.56#ibcon#*after write, iclass 17, count 0 2006.229.16:15:52.56#ibcon#*before return 0, iclass 17, count 0 2006.229.16:15:52.56#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:52.56#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:52.56#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:15:52.56#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:15:52.56$vck44/valo=8,884.99 2006.229.16:15:52.56#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.16:15:52.56#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.16:15:52.56#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:52.56#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:52.56#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:52.56#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:52.56#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:15:52.56#ibcon#first serial, iclass 19, count 0 2006.229.16:15:52.56#ibcon#enter sib2, iclass 19, count 0 2006.229.16:15:52.56#ibcon#flushed, iclass 19, count 0 2006.229.16:15:52.56#ibcon#about to write, iclass 19, count 0 2006.229.16:15:52.56#ibcon#wrote, iclass 19, count 0 2006.229.16:15:52.56#ibcon#about to read 3, iclass 19, count 0 2006.229.16:15:52.58#ibcon#read 3, iclass 19, count 0 2006.229.16:15:52.58#ibcon#about to read 4, iclass 19, count 0 2006.229.16:15:52.58#ibcon#read 4, iclass 19, count 0 2006.229.16:15:52.58#ibcon#about to read 5, iclass 19, count 0 2006.229.16:15:52.58#ibcon#read 5, iclass 19, count 0 2006.229.16:15:52.58#ibcon#about to read 6, iclass 19, count 0 2006.229.16:15:52.58#ibcon#read 6, iclass 19, count 0 2006.229.16:15:52.58#ibcon#end of sib2, iclass 19, count 0 2006.229.16:15:52.58#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:15:52.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:15:52.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:15:52.58#ibcon#*before write, iclass 19, count 0 2006.229.16:15:52.58#ibcon#enter sib2, iclass 19, count 0 2006.229.16:15:52.58#ibcon#flushed, iclass 19, count 0 2006.229.16:15:52.58#ibcon#about to write, iclass 19, count 0 2006.229.16:15:52.58#ibcon#wrote, iclass 19, count 0 2006.229.16:15:52.58#ibcon#about to read 3, iclass 19, count 0 2006.229.16:15:52.62#ibcon#read 3, iclass 19, count 0 2006.229.16:15:52.62#ibcon#about to read 4, iclass 19, count 0 2006.229.16:15:52.62#ibcon#read 4, iclass 19, count 0 2006.229.16:15:52.62#ibcon#about to read 5, iclass 19, count 0 2006.229.16:15:52.62#ibcon#read 5, iclass 19, count 0 2006.229.16:15:52.62#ibcon#about to read 6, iclass 19, count 0 2006.229.16:15:52.62#ibcon#read 6, iclass 19, count 0 2006.229.16:15:52.62#ibcon#end of sib2, iclass 19, count 0 2006.229.16:15:52.62#ibcon#*after write, iclass 19, count 0 2006.229.16:15:52.62#ibcon#*before return 0, iclass 19, count 0 2006.229.16:15:52.62#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:52.62#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:52.62#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:15:52.62#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:15:52.62$vck44/va=8,6 2006.229.16:15:52.62#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.16:15:52.62#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.16:15:52.62#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:52.62#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:15:52.68#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:15:52.68#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:15:52.68#ibcon#enter wrdev, iclass 21, count 2 2006.229.16:15:52.68#ibcon#first serial, iclass 21, count 2 2006.229.16:15:52.68#ibcon#enter sib2, iclass 21, count 2 2006.229.16:15:52.68#ibcon#flushed, iclass 21, count 2 2006.229.16:15:52.68#ibcon#about to write, iclass 21, count 2 2006.229.16:15:52.68#ibcon#wrote, iclass 21, count 2 2006.229.16:15:52.68#ibcon#about to read 3, iclass 21, count 2 2006.229.16:15:52.70#ibcon#read 3, iclass 21, count 2 2006.229.16:15:52.70#ibcon#about to read 4, iclass 21, count 2 2006.229.16:15:52.70#ibcon#read 4, iclass 21, count 2 2006.229.16:15:52.70#ibcon#about to read 5, iclass 21, count 2 2006.229.16:15:52.70#ibcon#read 5, iclass 21, count 2 2006.229.16:15:52.70#ibcon#about to read 6, iclass 21, count 2 2006.229.16:15:52.70#ibcon#read 6, iclass 21, count 2 2006.229.16:15:52.70#ibcon#end of sib2, iclass 21, count 2 2006.229.16:15:52.70#ibcon#*mode == 0, iclass 21, count 2 2006.229.16:15:52.70#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.16:15:52.70#ibcon#[25=AT08-06\r\n] 2006.229.16:15:52.70#ibcon#*before write, iclass 21, count 2 2006.229.16:15:52.70#ibcon#enter sib2, iclass 21, count 2 2006.229.16:15:52.70#ibcon#flushed, iclass 21, count 2 2006.229.16:15:52.70#ibcon#about to write, iclass 21, count 2 2006.229.16:15:52.70#ibcon#wrote, iclass 21, count 2 2006.229.16:15:52.70#ibcon#about to read 3, iclass 21, count 2 2006.229.16:15:52.73#ibcon#read 3, iclass 21, count 2 2006.229.16:15:52.73#ibcon#about to read 4, iclass 21, count 2 2006.229.16:15:52.73#ibcon#read 4, iclass 21, count 2 2006.229.16:15:52.73#ibcon#about to read 5, iclass 21, count 2 2006.229.16:15:52.73#ibcon#read 5, iclass 21, count 2 2006.229.16:15:52.73#ibcon#about to read 6, iclass 21, count 2 2006.229.16:15:52.73#ibcon#read 6, iclass 21, count 2 2006.229.16:15:52.73#ibcon#end of sib2, iclass 21, count 2 2006.229.16:15:52.73#ibcon#*after write, iclass 21, count 2 2006.229.16:15:52.73#ibcon#*before return 0, iclass 21, count 2 2006.229.16:15:52.73#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:15:52.73#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:15:52.73#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.16:15:52.73#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:52.73#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:15:52.85#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:15:52.85#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:15:52.85#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:15:52.85#ibcon#first serial, iclass 21, count 0 2006.229.16:15:52.85#ibcon#enter sib2, iclass 21, count 0 2006.229.16:15:52.85#ibcon#flushed, iclass 21, count 0 2006.229.16:15:52.85#ibcon#about to write, iclass 21, count 0 2006.229.16:15:52.85#ibcon#wrote, iclass 21, count 0 2006.229.16:15:52.85#ibcon#about to read 3, iclass 21, count 0 2006.229.16:15:52.87#ibcon#read 3, iclass 21, count 0 2006.229.16:15:52.87#ibcon#about to read 4, iclass 21, count 0 2006.229.16:15:52.87#ibcon#read 4, iclass 21, count 0 2006.229.16:15:52.87#ibcon#about to read 5, iclass 21, count 0 2006.229.16:15:52.87#ibcon#read 5, iclass 21, count 0 2006.229.16:15:52.87#ibcon#about to read 6, iclass 21, count 0 2006.229.16:15:52.87#ibcon#read 6, iclass 21, count 0 2006.229.16:15:52.87#ibcon#end of sib2, iclass 21, count 0 2006.229.16:15:52.87#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:15:52.87#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:15:52.87#ibcon#[25=USB\r\n] 2006.229.16:15:52.87#ibcon#*before write, iclass 21, count 0 2006.229.16:15:52.87#ibcon#enter sib2, iclass 21, count 0 2006.229.16:15:52.87#ibcon#flushed, iclass 21, count 0 2006.229.16:15:52.87#ibcon#about to write, iclass 21, count 0 2006.229.16:15:52.87#ibcon#wrote, iclass 21, count 0 2006.229.16:15:52.87#ibcon#about to read 3, iclass 21, count 0 2006.229.16:15:52.90#ibcon#read 3, iclass 21, count 0 2006.229.16:15:52.90#ibcon#about to read 4, iclass 21, count 0 2006.229.16:15:52.90#ibcon#read 4, iclass 21, count 0 2006.229.16:15:52.90#ibcon#about to read 5, iclass 21, count 0 2006.229.16:15:52.90#ibcon#read 5, iclass 21, count 0 2006.229.16:15:52.90#ibcon#about to read 6, iclass 21, count 0 2006.229.16:15:52.90#ibcon#read 6, iclass 21, count 0 2006.229.16:15:52.90#ibcon#end of sib2, iclass 21, count 0 2006.229.16:15:52.90#ibcon#*after write, iclass 21, count 0 2006.229.16:15:52.90#ibcon#*before return 0, iclass 21, count 0 2006.229.16:15:52.90#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:15:52.90#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:15:52.90#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:15:52.90#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:15:52.90$vck44/vblo=1,629.99 2006.229.16:15:52.90#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.16:15:52.90#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.16:15:52.90#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:52.90#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:15:52.90#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:15:52.90#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:15:52.90#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:15:52.90#ibcon#first serial, iclass 23, count 0 2006.229.16:15:52.90#ibcon#enter sib2, iclass 23, count 0 2006.229.16:15:52.90#ibcon#flushed, iclass 23, count 0 2006.229.16:15:52.90#ibcon#about to write, iclass 23, count 0 2006.229.16:15:52.90#ibcon#wrote, iclass 23, count 0 2006.229.16:15:52.90#ibcon#about to read 3, iclass 23, count 0 2006.229.16:15:52.92#ibcon#read 3, iclass 23, count 0 2006.229.16:15:52.92#ibcon#about to read 4, iclass 23, count 0 2006.229.16:15:52.92#ibcon#read 4, iclass 23, count 0 2006.229.16:15:52.92#ibcon#about to read 5, iclass 23, count 0 2006.229.16:15:52.92#ibcon#read 5, iclass 23, count 0 2006.229.16:15:52.92#ibcon#about to read 6, iclass 23, count 0 2006.229.16:15:52.92#ibcon#read 6, iclass 23, count 0 2006.229.16:15:52.92#ibcon#end of sib2, iclass 23, count 0 2006.229.16:15:52.92#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:15:52.92#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:15:52.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:15:52.92#ibcon#*before write, iclass 23, count 0 2006.229.16:15:52.92#ibcon#enter sib2, iclass 23, count 0 2006.229.16:15:52.92#ibcon#flushed, iclass 23, count 0 2006.229.16:15:52.92#ibcon#about to write, iclass 23, count 0 2006.229.16:15:52.92#ibcon#wrote, iclass 23, count 0 2006.229.16:15:52.92#ibcon#about to read 3, iclass 23, count 0 2006.229.16:15:52.96#ibcon#read 3, iclass 23, count 0 2006.229.16:15:52.96#ibcon#about to read 4, iclass 23, count 0 2006.229.16:15:52.96#ibcon#read 4, iclass 23, count 0 2006.229.16:15:52.96#ibcon#about to read 5, iclass 23, count 0 2006.229.16:15:52.96#ibcon#read 5, iclass 23, count 0 2006.229.16:15:52.96#ibcon#about to read 6, iclass 23, count 0 2006.229.16:15:52.96#ibcon#read 6, iclass 23, count 0 2006.229.16:15:52.96#ibcon#end of sib2, iclass 23, count 0 2006.229.16:15:52.96#ibcon#*after write, iclass 23, count 0 2006.229.16:15:52.96#ibcon#*before return 0, iclass 23, count 0 2006.229.16:15:52.96#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:15:52.96#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:15:52.96#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:15:52.96#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:15:52.96$vck44/vb=1,4 2006.229.16:15:52.96#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.16:15:52.96#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.16:15:52.96#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:52.96#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:15:52.96#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:15:52.96#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:15:52.96#ibcon#enter wrdev, iclass 25, count 2 2006.229.16:15:52.96#ibcon#first serial, iclass 25, count 2 2006.229.16:15:52.96#ibcon#enter sib2, iclass 25, count 2 2006.229.16:15:52.96#ibcon#flushed, iclass 25, count 2 2006.229.16:15:52.96#ibcon#about to write, iclass 25, count 2 2006.229.16:15:52.96#ibcon#wrote, iclass 25, count 2 2006.229.16:15:52.96#ibcon#about to read 3, iclass 25, count 2 2006.229.16:15:52.98#ibcon#read 3, iclass 25, count 2 2006.229.16:15:52.98#ibcon#about to read 4, iclass 25, count 2 2006.229.16:15:52.98#ibcon#read 4, iclass 25, count 2 2006.229.16:15:52.98#ibcon#about to read 5, iclass 25, count 2 2006.229.16:15:52.98#ibcon#read 5, iclass 25, count 2 2006.229.16:15:52.98#ibcon#about to read 6, iclass 25, count 2 2006.229.16:15:52.98#ibcon#read 6, iclass 25, count 2 2006.229.16:15:52.98#ibcon#end of sib2, iclass 25, count 2 2006.229.16:15:52.98#ibcon#*mode == 0, iclass 25, count 2 2006.229.16:15:52.98#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.16:15:52.98#ibcon#[27=AT01-04\r\n] 2006.229.16:15:52.98#ibcon#*before write, iclass 25, count 2 2006.229.16:15:52.98#ibcon#enter sib2, iclass 25, count 2 2006.229.16:15:52.98#ibcon#flushed, iclass 25, count 2 2006.229.16:15:52.98#ibcon#about to write, iclass 25, count 2 2006.229.16:15:52.98#ibcon#wrote, iclass 25, count 2 2006.229.16:15:52.98#ibcon#about to read 3, iclass 25, count 2 2006.229.16:15:53.01#ibcon#read 3, iclass 25, count 2 2006.229.16:15:53.01#ibcon#about to read 4, iclass 25, count 2 2006.229.16:15:53.01#ibcon#read 4, iclass 25, count 2 2006.229.16:15:53.01#ibcon#about to read 5, iclass 25, count 2 2006.229.16:15:53.01#ibcon#read 5, iclass 25, count 2 2006.229.16:15:53.01#ibcon#about to read 6, iclass 25, count 2 2006.229.16:15:53.01#ibcon#read 6, iclass 25, count 2 2006.229.16:15:53.01#ibcon#end of sib2, iclass 25, count 2 2006.229.16:15:53.01#ibcon#*after write, iclass 25, count 2 2006.229.16:15:53.01#ibcon#*before return 0, iclass 25, count 2 2006.229.16:15:53.01#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:15:53.01#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:15:53.01#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.16:15:53.01#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:53.01#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:15:53.13#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:15:53.13#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:15:53.13#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:15:53.13#ibcon#first serial, iclass 25, count 0 2006.229.16:15:53.13#ibcon#enter sib2, iclass 25, count 0 2006.229.16:15:53.13#ibcon#flushed, iclass 25, count 0 2006.229.16:15:53.13#ibcon#about to write, iclass 25, count 0 2006.229.16:15:53.13#ibcon#wrote, iclass 25, count 0 2006.229.16:15:53.13#ibcon#about to read 3, iclass 25, count 0 2006.229.16:15:53.15#ibcon#read 3, iclass 25, count 0 2006.229.16:15:53.15#ibcon#about to read 4, iclass 25, count 0 2006.229.16:15:53.15#ibcon#read 4, iclass 25, count 0 2006.229.16:15:53.15#ibcon#about to read 5, iclass 25, count 0 2006.229.16:15:53.15#ibcon#read 5, iclass 25, count 0 2006.229.16:15:53.15#ibcon#about to read 6, iclass 25, count 0 2006.229.16:15:53.15#ibcon#read 6, iclass 25, count 0 2006.229.16:15:53.15#ibcon#end of sib2, iclass 25, count 0 2006.229.16:15:53.15#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:15:53.15#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:15:53.15#ibcon#[27=USB\r\n] 2006.229.16:15:53.15#ibcon#*before write, iclass 25, count 0 2006.229.16:15:53.15#ibcon#enter sib2, iclass 25, count 0 2006.229.16:15:53.15#ibcon#flushed, iclass 25, count 0 2006.229.16:15:53.15#ibcon#about to write, iclass 25, count 0 2006.229.16:15:53.15#ibcon#wrote, iclass 25, count 0 2006.229.16:15:53.15#ibcon#about to read 3, iclass 25, count 0 2006.229.16:15:53.18#ibcon#read 3, iclass 25, count 0 2006.229.16:15:53.18#ibcon#about to read 4, iclass 25, count 0 2006.229.16:15:53.18#ibcon#read 4, iclass 25, count 0 2006.229.16:15:53.18#ibcon#about to read 5, iclass 25, count 0 2006.229.16:15:53.18#ibcon#read 5, iclass 25, count 0 2006.229.16:15:53.18#ibcon#about to read 6, iclass 25, count 0 2006.229.16:15:53.18#ibcon#read 6, iclass 25, count 0 2006.229.16:15:53.18#ibcon#end of sib2, iclass 25, count 0 2006.229.16:15:53.18#ibcon#*after write, iclass 25, count 0 2006.229.16:15:53.18#ibcon#*before return 0, iclass 25, count 0 2006.229.16:15:53.18#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:15:53.18#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:15:53.18#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:15:53.18#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:15:53.18$vck44/vblo=2,634.99 2006.229.16:15:53.18#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.16:15:53.18#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.16:15:53.18#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:53.18#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:53.18#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:53.18#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:53.18#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:15:53.18#ibcon#first serial, iclass 27, count 0 2006.229.16:15:53.18#ibcon#enter sib2, iclass 27, count 0 2006.229.16:15:53.18#ibcon#flushed, iclass 27, count 0 2006.229.16:15:53.18#ibcon#about to write, iclass 27, count 0 2006.229.16:15:53.18#ibcon#wrote, iclass 27, count 0 2006.229.16:15:53.18#ibcon#about to read 3, iclass 27, count 0 2006.229.16:15:53.20#ibcon#read 3, iclass 27, count 0 2006.229.16:15:53.20#ibcon#about to read 4, iclass 27, count 0 2006.229.16:15:53.20#ibcon#read 4, iclass 27, count 0 2006.229.16:15:53.20#ibcon#about to read 5, iclass 27, count 0 2006.229.16:15:53.20#ibcon#read 5, iclass 27, count 0 2006.229.16:15:53.20#ibcon#about to read 6, iclass 27, count 0 2006.229.16:15:53.20#ibcon#read 6, iclass 27, count 0 2006.229.16:15:53.20#ibcon#end of sib2, iclass 27, count 0 2006.229.16:15:53.20#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:15:53.20#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:15:53.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:15:53.20#ibcon#*before write, iclass 27, count 0 2006.229.16:15:53.20#ibcon#enter sib2, iclass 27, count 0 2006.229.16:15:53.20#ibcon#flushed, iclass 27, count 0 2006.229.16:15:53.20#ibcon#about to write, iclass 27, count 0 2006.229.16:15:53.20#ibcon#wrote, iclass 27, count 0 2006.229.16:15:53.20#ibcon#about to read 3, iclass 27, count 0 2006.229.16:15:53.24#ibcon#read 3, iclass 27, count 0 2006.229.16:15:53.24#ibcon#about to read 4, iclass 27, count 0 2006.229.16:15:53.24#ibcon#read 4, iclass 27, count 0 2006.229.16:15:53.24#ibcon#about to read 5, iclass 27, count 0 2006.229.16:15:53.24#ibcon#read 5, iclass 27, count 0 2006.229.16:15:53.24#ibcon#about to read 6, iclass 27, count 0 2006.229.16:15:53.24#ibcon#read 6, iclass 27, count 0 2006.229.16:15:53.24#ibcon#end of sib2, iclass 27, count 0 2006.229.16:15:53.24#ibcon#*after write, iclass 27, count 0 2006.229.16:15:53.24#ibcon#*before return 0, iclass 27, count 0 2006.229.16:15:53.24#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:53.24#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:15:53.24#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:15:53.24#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:15:53.24$vck44/vb=2,4 2006.229.16:15:53.24#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.16:15:53.24#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.16:15:53.24#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:53.24#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:53.30#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:53.30#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:53.30#ibcon#enter wrdev, iclass 29, count 2 2006.229.16:15:53.30#ibcon#first serial, iclass 29, count 2 2006.229.16:15:53.30#ibcon#enter sib2, iclass 29, count 2 2006.229.16:15:53.30#ibcon#flushed, iclass 29, count 2 2006.229.16:15:53.30#ibcon#about to write, iclass 29, count 2 2006.229.16:15:53.30#ibcon#wrote, iclass 29, count 2 2006.229.16:15:53.30#ibcon#about to read 3, iclass 29, count 2 2006.229.16:15:53.32#ibcon#read 3, iclass 29, count 2 2006.229.16:15:53.32#ibcon#about to read 4, iclass 29, count 2 2006.229.16:15:53.32#ibcon#read 4, iclass 29, count 2 2006.229.16:15:53.32#ibcon#about to read 5, iclass 29, count 2 2006.229.16:15:53.32#ibcon#read 5, iclass 29, count 2 2006.229.16:15:53.32#ibcon#about to read 6, iclass 29, count 2 2006.229.16:15:53.32#ibcon#read 6, iclass 29, count 2 2006.229.16:15:53.32#ibcon#end of sib2, iclass 29, count 2 2006.229.16:15:53.32#ibcon#*mode == 0, iclass 29, count 2 2006.229.16:15:53.32#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.16:15:53.32#ibcon#[27=AT02-04\r\n] 2006.229.16:15:53.32#ibcon#*before write, iclass 29, count 2 2006.229.16:15:53.32#ibcon#enter sib2, iclass 29, count 2 2006.229.16:15:53.32#ibcon#flushed, iclass 29, count 2 2006.229.16:15:53.32#ibcon#about to write, iclass 29, count 2 2006.229.16:15:53.32#ibcon#wrote, iclass 29, count 2 2006.229.16:15:53.32#ibcon#about to read 3, iclass 29, count 2 2006.229.16:15:53.35#ibcon#read 3, iclass 29, count 2 2006.229.16:15:53.35#ibcon#about to read 4, iclass 29, count 2 2006.229.16:15:53.35#ibcon#read 4, iclass 29, count 2 2006.229.16:15:53.35#ibcon#about to read 5, iclass 29, count 2 2006.229.16:15:53.35#ibcon#read 5, iclass 29, count 2 2006.229.16:15:53.35#ibcon#about to read 6, iclass 29, count 2 2006.229.16:15:53.35#ibcon#read 6, iclass 29, count 2 2006.229.16:15:53.35#ibcon#end of sib2, iclass 29, count 2 2006.229.16:15:53.35#ibcon#*after write, iclass 29, count 2 2006.229.16:15:53.35#ibcon#*before return 0, iclass 29, count 2 2006.229.16:15:53.35#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:53.35#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:15:53.35#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.16:15:53.35#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:53.35#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:53.47#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:53.47#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:53.47#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:15:53.47#ibcon#first serial, iclass 29, count 0 2006.229.16:15:53.47#ibcon#enter sib2, iclass 29, count 0 2006.229.16:15:53.47#ibcon#flushed, iclass 29, count 0 2006.229.16:15:53.47#ibcon#about to write, iclass 29, count 0 2006.229.16:15:53.47#ibcon#wrote, iclass 29, count 0 2006.229.16:15:53.47#ibcon#about to read 3, iclass 29, count 0 2006.229.16:15:53.49#ibcon#read 3, iclass 29, count 0 2006.229.16:15:53.49#ibcon#about to read 4, iclass 29, count 0 2006.229.16:15:53.49#ibcon#read 4, iclass 29, count 0 2006.229.16:15:53.49#ibcon#about to read 5, iclass 29, count 0 2006.229.16:15:53.49#ibcon#read 5, iclass 29, count 0 2006.229.16:15:53.49#ibcon#about to read 6, iclass 29, count 0 2006.229.16:15:53.49#ibcon#read 6, iclass 29, count 0 2006.229.16:15:53.49#ibcon#end of sib2, iclass 29, count 0 2006.229.16:15:53.49#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:15:53.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:15:53.49#ibcon#[27=USB\r\n] 2006.229.16:15:53.49#ibcon#*before write, iclass 29, count 0 2006.229.16:15:53.49#ibcon#enter sib2, iclass 29, count 0 2006.229.16:15:53.49#ibcon#flushed, iclass 29, count 0 2006.229.16:15:53.49#ibcon#about to write, iclass 29, count 0 2006.229.16:15:53.49#ibcon#wrote, iclass 29, count 0 2006.229.16:15:53.49#ibcon#about to read 3, iclass 29, count 0 2006.229.16:15:53.52#ibcon#read 3, iclass 29, count 0 2006.229.16:15:53.52#ibcon#about to read 4, iclass 29, count 0 2006.229.16:15:53.52#ibcon#read 4, iclass 29, count 0 2006.229.16:15:53.52#ibcon#about to read 5, iclass 29, count 0 2006.229.16:15:53.52#ibcon#read 5, iclass 29, count 0 2006.229.16:15:53.52#ibcon#about to read 6, iclass 29, count 0 2006.229.16:15:53.52#ibcon#read 6, iclass 29, count 0 2006.229.16:15:53.52#ibcon#end of sib2, iclass 29, count 0 2006.229.16:15:53.52#ibcon#*after write, iclass 29, count 0 2006.229.16:15:53.52#ibcon#*before return 0, iclass 29, count 0 2006.229.16:15:53.52#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:53.52#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:15:53.52#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:15:53.52#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:15:53.52$vck44/vblo=3,649.99 2006.229.16:15:53.52#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.16:15:53.52#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.16:15:53.52#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:53.52#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:53.52#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:53.52#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:53.52#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:15:53.52#ibcon#first serial, iclass 31, count 0 2006.229.16:15:53.52#ibcon#enter sib2, iclass 31, count 0 2006.229.16:15:53.52#ibcon#flushed, iclass 31, count 0 2006.229.16:15:53.52#ibcon#about to write, iclass 31, count 0 2006.229.16:15:53.52#ibcon#wrote, iclass 31, count 0 2006.229.16:15:53.52#ibcon#about to read 3, iclass 31, count 0 2006.229.16:15:53.54#ibcon#read 3, iclass 31, count 0 2006.229.16:15:53.54#ibcon#about to read 4, iclass 31, count 0 2006.229.16:15:53.54#ibcon#read 4, iclass 31, count 0 2006.229.16:15:53.54#ibcon#about to read 5, iclass 31, count 0 2006.229.16:15:53.54#ibcon#read 5, iclass 31, count 0 2006.229.16:15:53.54#ibcon#about to read 6, iclass 31, count 0 2006.229.16:15:53.54#ibcon#read 6, iclass 31, count 0 2006.229.16:15:53.54#ibcon#end of sib2, iclass 31, count 0 2006.229.16:15:53.54#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:15:53.54#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:15:53.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:15:53.54#ibcon#*before write, iclass 31, count 0 2006.229.16:15:53.54#ibcon#enter sib2, iclass 31, count 0 2006.229.16:15:53.54#ibcon#flushed, iclass 31, count 0 2006.229.16:15:53.54#ibcon#about to write, iclass 31, count 0 2006.229.16:15:53.54#ibcon#wrote, iclass 31, count 0 2006.229.16:15:53.54#ibcon#about to read 3, iclass 31, count 0 2006.229.16:15:53.58#ibcon#read 3, iclass 31, count 0 2006.229.16:15:53.58#ibcon#about to read 4, iclass 31, count 0 2006.229.16:15:53.58#ibcon#read 4, iclass 31, count 0 2006.229.16:15:53.58#ibcon#about to read 5, iclass 31, count 0 2006.229.16:15:53.58#ibcon#read 5, iclass 31, count 0 2006.229.16:15:53.58#ibcon#about to read 6, iclass 31, count 0 2006.229.16:15:53.58#ibcon#read 6, iclass 31, count 0 2006.229.16:15:53.58#ibcon#end of sib2, iclass 31, count 0 2006.229.16:15:53.58#ibcon#*after write, iclass 31, count 0 2006.229.16:15:53.58#ibcon#*before return 0, iclass 31, count 0 2006.229.16:15:53.58#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:53.58#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:15:53.58#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:15:53.58#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:15:53.58$vck44/vb=3,4 2006.229.16:15:53.58#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.16:15:53.58#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.16:15:53.58#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:53.58#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:53.64#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:53.64#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:53.64#ibcon#enter wrdev, iclass 33, count 2 2006.229.16:15:53.64#ibcon#first serial, iclass 33, count 2 2006.229.16:15:53.64#ibcon#enter sib2, iclass 33, count 2 2006.229.16:15:53.64#ibcon#flushed, iclass 33, count 2 2006.229.16:15:53.64#ibcon#about to write, iclass 33, count 2 2006.229.16:15:53.64#ibcon#wrote, iclass 33, count 2 2006.229.16:15:53.64#ibcon#about to read 3, iclass 33, count 2 2006.229.16:15:53.66#ibcon#read 3, iclass 33, count 2 2006.229.16:15:53.66#ibcon#about to read 4, iclass 33, count 2 2006.229.16:15:53.66#ibcon#read 4, iclass 33, count 2 2006.229.16:15:53.66#ibcon#about to read 5, iclass 33, count 2 2006.229.16:15:53.66#ibcon#read 5, iclass 33, count 2 2006.229.16:15:53.66#ibcon#about to read 6, iclass 33, count 2 2006.229.16:15:53.66#ibcon#read 6, iclass 33, count 2 2006.229.16:15:53.66#ibcon#end of sib2, iclass 33, count 2 2006.229.16:15:53.66#ibcon#*mode == 0, iclass 33, count 2 2006.229.16:15:53.66#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.16:15:53.66#ibcon#[27=AT03-04\r\n] 2006.229.16:15:53.66#ibcon#*before write, iclass 33, count 2 2006.229.16:15:53.66#ibcon#enter sib2, iclass 33, count 2 2006.229.16:15:53.66#ibcon#flushed, iclass 33, count 2 2006.229.16:15:53.66#ibcon#about to write, iclass 33, count 2 2006.229.16:15:53.66#ibcon#wrote, iclass 33, count 2 2006.229.16:15:53.66#ibcon#about to read 3, iclass 33, count 2 2006.229.16:15:53.69#ibcon#read 3, iclass 33, count 2 2006.229.16:15:53.69#ibcon#about to read 4, iclass 33, count 2 2006.229.16:15:53.69#ibcon#read 4, iclass 33, count 2 2006.229.16:15:53.69#ibcon#about to read 5, iclass 33, count 2 2006.229.16:15:53.69#ibcon#read 5, iclass 33, count 2 2006.229.16:15:53.69#ibcon#about to read 6, iclass 33, count 2 2006.229.16:15:53.69#ibcon#read 6, iclass 33, count 2 2006.229.16:15:53.69#ibcon#end of sib2, iclass 33, count 2 2006.229.16:15:53.69#ibcon#*after write, iclass 33, count 2 2006.229.16:15:53.69#ibcon#*before return 0, iclass 33, count 2 2006.229.16:15:53.69#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:53.69#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:15:53.69#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.16:15:53.69#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:53.69#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:53.81#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:53.81#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:53.81#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:15:53.81#ibcon#first serial, iclass 33, count 0 2006.229.16:15:53.81#ibcon#enter sib2, iclass 33, count 0 2006.229.16:15:53.81#ibcon#flushed, iclass 33, count 0 2006.229.16:15:53.81#ibcon#about to write, iclass 33, count 0 2006.229.16:15:53.81#ibcon#wrote, iclass 33, count 0 2006.229.16:15:53.81#ibcon#about to read 3, iclass 33, count 0 2006.229.16:15:53.83#ibcon#read 3, iclass 33, count 0 2006.229.16:15:53.83#ibcon#about to read 4, iclass 33, count 0 2006.229.16:15:53.83#ibcon#read 4, iclass 33, count 0 2006.229.16:15:53.83#ibcon#about to read 5, iclass 33, count 0 2006.229.16:15:53.83#ibcon#read 5, iclass 33, count 0 2006.229.16:15:53.83#ibcon#about to read 6, iclass 33, count 0 2006.229.16:15:53.83#ibcon#read 6, iclass 33, count 0 2006.229.16:15:53.83#ibcon#end of sib2, iclass 33, count 0 2006.229.16:15:53.83#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:15:53.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:15:53.83#ibcon#[27=USB\r\n] 2006.229.16:15:53.83#ibcon#*before write, iclass 33, count 0 2006.229.16:15:53.83#ibcon#enter sib2, iclass 33, count 0 2006.229.16:15:53.83#ibcon#flushed, iclass 33, count 0 2006.229.16:15:53.83#ibcon#about to write, iclass 33, count 0 2006.229.16:15:53.83#ibcon#wrote, iclass 33, count 0 2006.229.16:15:53.83#ibcon#about to read 3, iclass 33, count 0 2006.229.16:15:53.86#ibcon#read 3, iclass 33, count 0 2006.229.16:15:53.86#ibcon#about to read 4, iclass 33, count 0 2006.229.16:15:53.86#ibcon#read 4, iclass 33, count 0 2006.229.16:15:53.86#ibcon#about to read 5, iclass 33, count 0 2006.229.16:15:53.86#ibcon#read 5, iclass 33, count 0 2006.229.16:15:53.86#ibcon#about to read 6, iclass 33, count 0 2006.229.16:15:53.86#ibcon#read 6, iclass 33, count 0 2006.229.16:15:53.86#ibcon#end of sib2, iclass 33, count 0 2006.229.16:15:53.86#ibcon#*after write, iclass 33, count 0 2006.229.16:15:53.86#ibcon#*before return 0, iclass 33, count 0 2006.229.16:15:53.86#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:53.86#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:15:53.86#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:15:53.86#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:15:53.86$vck44/vblo=4,679.99 2006.229.16:15:53.86#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.16:15:53.86#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.16:15:53.86#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:53.86#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:53.86#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:53.86#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:53.86#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:15:53.86#ibcon#first serial, iclass 35, count 0 2006.229.16:15:53.86#ibcon#enter sib2, iclass 35, count 0 2006.229.16:15:53.86#ibcon#flushed, iclass 35, count 0 2006.229.16:15:53.86#ibcon#about to write, iclass 35, count 0 2006.229.16:15:53.86#ibcon#wrote, iclass 35, count 0 2006.229.16:15:53.86#ibcon#about to read 3, iclass 35, count 0 2006.229.16:15:53.88#ibcon#read 3, iclass 35, count 0 2006.229.16:15:53.88#ibcon#about to read 4, iclass 35, count 0 2006.229.16:15:53.88#ibcon#read 4, iclass 35, count 0 2006.229.16:15:53.88#ibcon#about to read 5, iclass 35, count 0 2006.229.16:15:53.88#ibcon#read 5, iclass 35, count 0 2006.229.16:15:53.88#ibcon#about to read 6, iclass 35, count 0 2006.229.16:15:53.88#ibcon#read 6, iclass 35, count 0 2006.229.16:15:53.88#ibcon#end of sib2, iclass 35, count 0 2006.229.16:15:53.88#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:15:53.88#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:15:53.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:15:53.88#ibcon#*before write, iclass 35, count 0 2006.229.16:15:53.88#ibcon#enter sib2, iclass 35, count 0 2006.229.16:15:53.88#ibcon#flushed, iclass 35, count 0 2006.229.16:15:53.88#ibcon#about to write, iclass 35, count 0 2006.229.16:15:53.88#ibcon#wrote, iclass 35, count 0 2006.229.16:15:53.88#ibcon#about to read 3, iclass 35, count 0 2006.229.16:15:53.92#ibcon#read 3, iclass 35, count 0 2006.229.16:15:53.92#ibcon#about to read 4, iclass 35, count 0 2006.229.16:15:53.92#ibcon#read 4, iclass 35, count 0 2006.229.16:15:53.92#ibcon#about to read 5, iclass 35, count 0 2006.229.16:15:53.92#ibcon#read 5, iclass 35, count 0 2006.229.16:15:53.92#ibcon#about to read 6, iclass 35, count 0 2006.229.16:15:53.92#ibcon#read 6, iclass 35, count 0 2006.229.16:15:53.92#ibcon#end of sib2, iclass 35, count 0 2006.229.16:15:53.92#ibcon#*after write, iclass 35, count 0 2006.229.16:15:53.92#ibcon#*before return 0, iclass 35, count 0 2006.229.16:15:53.92#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:53.92#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:15:53.92#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:15:53.92#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:15:53.93$vck44/vb=4,4 2006.229.16:15:53.93#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.16:15:53.93#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.16:15:53.93#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:53.93#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:53.97#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:53.97#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:53.97#ibcon#enter wrdev, iclass 37, count 2 2006.229.16:15:53.97#ibcon#first serial, iclass 37, count 2 2006.229.16:15:53.97#ibcon#enter sib2, iclass 37, count 2 2006.229.16:15:53.97#ibcon#flushed, iclass 37, count 2 2006.229.16:15:53.97#ibcon#about to write, iclass 37, count 2 2006.229.16:15:53.97#ibcon#wrote, iclass 37, count 2 2006.229.16:15:53.97#ibcon#about to read 3, iclass 37, count 2 2006.229.16:15:53.99#ibcon#read 3, iclass 37, count 2 2006.229.16:15:53.99#ibcon#about to read 4, iclass 37, count 2 2006.229.16:15:53.99#ibcon#read 4, iclass 37, count 2 2006.229.16:15:53.99#ibcon#about to read 5, iclass 37, count 2 2006.229.16:15:53.99#ibcon#read 5, iclass 37, count 2 2006.229.16:15:53.99#ibcon#about to read 6, iclass 37, count 2 2006.229.16:15:53.99#ibcon#read 6, iclass 37, count 2 2006.229.16:15:53.99#ibcon#end of sib2, iclass 37, count 2 2006.229.16:15:53.99#ibcon#*mode == 0, iclass 37, count 2 2006.229.16:15:53.99#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.16:15:53.99#ibcon#[27=AT04-04\r\n] 2006.229.16:15:53.99#ibcon#*before write, iclass 37, count 2 2006.229.16:15:53.99#ibcon#enter sib2, iclass 37, count 2 2006.229.16:15:53.99#ibcon#flushed, iclass 37, count 2 2006.229.16:15:53.99#ibcon#about to write, iclass 37, count 2 2006.229.16:15:53.99#ibcon#wrote, iclass 37, count 2 2006.229.16:15:53.99#ibcon#about to read 3, iclass 37, count 2 2006.229.16:15:54.02#ibcon#read 3, iclass 37, count 2 2006.229.16:15:54.02#ibcon#about to read 4, iclass 37, count 2 2006.229.16:15:54.02#ibcon#read 4, iclass 37, count 2 2006.229.16:15:54.02#ibcon#about to read 5, iclass 37, count 2 2006.229.16:15:54.02#ibcon#read 5, iclass 37, count 2 2006.229.16:15:54.02#ibcon#about to read 6, iclass 37, count 2 2006.229.16:15:54.02#ibcon#read 6, iclass 37, count 2 2006.229.16:15:54.02#ibcon#end of sib2, iclass 37, count 2 2006.229.16:15:54.02#ibcon#*after write, iclass 37, count 2 2006.229.16:15:54.02#ibcon#*before return 0, iclass 37, count 2 2006.229.16:15:54.02#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:54.02#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:15:54.02#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.16:15:54.02#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:54.02#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:54.14#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:54.14#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:54.14#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:15:54.14#ibcon#first serial, iclass 37, count 0 2006.229.16:15:54.14#ibcon#enter sib2, iclass 37, count 0 2006.229.16:15:54.14#ibcon#flushed, iclass 37, count 0 2006.229.16:15:54.14#ibcon#about to write, iclass 37, count 0 2006.229.16:15:54.14#ibcon#wrote, iclass 37, count 0 2006.229.16:15:54.14#ibcon#about to read 3, iclass 37, count 0 2006.229.16:15:54.16#ibcon#read 3, iclass 37, count 0 2006.229.16:15:54.16#ibcon#about to read 4, iclass 37, count 0 2006.229.16:15:54.16#ibcon#read 4, iclass 37, count 0 2006.229.16:15:54.16#ibcon#about to read 5, iclass 37, count 0 2006.229.16:15:54.16#ibcon#read 5, iclass 37, count 0 2006.229.16:15:54.16#ibcon#about to read 6, iclass 37, count 0 2006.229.16:15:54.16#ibcon#read 6, iclass 37, count 0 2006.229.16:15:54.16#ibcon#end of sib2, iclass 37, count 0 2006.229.16:15:54.16#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:15:54.16#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:15:54.16#ibcon#[27=USB\r\n] 2006.229.16:15:54.16#ibcon#*before write, iclass 37, count 0 2006.229.16:15:54.16#ibcon#enter sib2, iclass 37, count 0 2006.229.16:15:54.16#ibcon#flushed, iclass 37, count 0 2006.229.16:15:54.16#ibcon#about to write, iclass 37, count 0 2006.229.16:15:54.16#ibcon#wrote, iclass 37, count 0 2006.229.16:15:54.16#ibcon#about to read 3, iclass 37, count 0 2006.229.16:15:54.19#ibcon#read 3, iclass 37, count 0 2006.229.16:15:54.19#ibcon#about to read 4, iclass 37, count 0 2006.229.16:15:54.19#ibcon#read 4, iclass 37, count 0 2006.229.16:15:54.19#ibcon#about to read 5, iclass 37, count 0 2006.229.16:15:54.19#ibcon#read 5, iclass 37, count 0 2006.229.16:15:54.19#ibcon#about to read 6, iclass 37, count 0 2006.229.16:15:54.19#ibcon#read 6, iclass 37, count 0 2006.229.16:15:54.19#ibcon#end of sib2, iclass 37, count 0 2006.229.16:15:54.19#ibcon#*after write, iclass 37, count 0 2006.229.16:15:54.19#ibcon#*before return 0, iclass 37, count 0 2006.229.16:15:54.19#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:54.19#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:15:54.19#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:15:54.19#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:15:54.19$vck44/vblo=5,709.99 2006.229.16:15:54.19#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.16:15:54.19#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.16:15:54.19#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:54.19#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:54.19#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:54.19#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:54.19#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:15:54.19#ibcon#first serial, iclass 39, count 0 2006.229.16:15:54.19#ibcon#enter sib2, iclass 39, count 0 2006.229.16:15:54.19#ibcon#flushed, iclass 39, count 0 2006.229.16:15:54.19#ibcon#about to write, iclass 39, count 0 2006.229.16:15:54.19#ibcon#wrote, iclass 39, count 0 2006.229.16:15:54.19#ibcon#about to read 3, iclass 39, count 0 2006.229.16:15:54.21#ibcon#read 3, iclass 39, count 0 2006.229.16:15:54.21#ibcon#about to read 4, iclass 39, count 0 2006.229.16:15:54.21#ibcon#read 4, iclass 39, count 0 2006.229.16:15:54.21#ibcon#about to read 5, iclass 39, count 0 2006.229.16:15:54.21#ibcon#read 5, iclass 39, count 0 2006.229.16:15:54.21#ibcon#about to read 6, iclass 39, count 0 2006.229.16:15:54.21#ibcon#read 6, iclass 39, count 0 2006.229.16:15:54.21#ibcon#end of sib2, iclass 39, count 0 2006.229.16:15:54.21#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:15:54.21#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:15:54.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:15:54.21#ibcon#*before write, iclass 39, count 0 2006.229.16:15:54.21#ibcon#enter sib2, iclass 39, count 0 2006.229.16:15:54.21#ibcon#flushed, iclass 39, count 0 2006.229.16:15:54.21#ibcon#about to write, iclass 39, count 0 2006.229.16:15:54.21#ibcon#wrote, iclass 39, count 0 2006.229.16:15:54.21#ibcon#about to read 3, iclass 39, count 0 2006.229.16:15:54.25#ibcon#read 3, iclass 39, count 0 2006.229.16:15:54.25#ibcon#about to read 4, iclass 39, count 0 2006.229.16:15:54.25#ibcon#read 4, iclass 39, count 0 2006.229.16:15:54.25#ibcon#about to read 5, iclass 39, count 0 2006.229.16:15:54.25#ibcon#read 5, iclass 39, count 0 2006.229.16:15:54.25#ibcon#about to read 6, iclass 39, count 0 2006.229.16:15:54.25#ibcon#read 6, iclass 39, count 0 2006.229.16:15:54.25#ibcon#end of sib2, iclass 39, count 0 2006.229.16:15:54.25#ibcon#*after write, iclass 39, count 0 2006.229.16:15:54.25#ibcon#*before return 0, iclass 39, count 0 2006.229.16:15:54.25#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:54.25#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:15:54.25#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:15:54.25#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:15:54.25$vck44/vb=5,4 2006.229.16:15:54.25#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.16:15:54.25#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.16:15:54.25#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:54.25#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:54.31#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:54.31#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:54.31#ibcon#enter wrdev, iclass 3, count 2 2006.229.16:15:54.31#ibcon#first serial, iclass 3, count 2 2006.229.16:15:54.31#ibcon#enter sib2, iclass 3, count 2 2006.229.16:15:54.31#ibcon#flushed, iclass 3, count 2 2006.229.16:15:54.31#ibcon#about to write, iclass 3, count 2 2006.229.16:15:54.31#ibcon#wrote, iclass 3, count 2 2006.229.16:15:54.31#ibcon#about to read 3, iclass 3, count 2 2006.229.16:15:54.33#ibcon#read 3, iclass 3, count 2 2006.229.16:15:54.33#ibcon#about to read 4, iclass 3, count 2 2006.229.16:15:54.33#ibcon#read 4, iclass 3, count 2 2006.229.16:15:54.33#ibcon#about to read 5, iclass 3, count 2 2006.229.16:15:54.33#ibcon#read 5, iclass 3, count 2 2006.229.16:15:54.33#ibcon#about to read 6, iclass 3, count 2 2006.229.16:15:54.33#ibcon#read 6, iclass 3, count 2 2006.229.16:15:54.33#ibcon#end of sib2, iclass 3, count 2 2006.229.16:15:54.33#ibcon#*mode == 0, iclass 3, count 2 2006.229.16:15:54.33#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.16:15:54.33#ibcon#[27=AT05-04\r\n] 2006.229.16:15:54.33#ibcon#*before write, iclass 3, count 2 2006.229.16:15:54.33#ibcon#enter sib2, iclass 3, count 2 2006.229.16:15:54.33#ibcon#flushed, iclass 3, count 2 2006.229.16:15:54.33#ibcon#about to write, iclass 3, count 2 2006.229.16:15:54.33#ibcon#wrote, iclass 3, count 2 2006.229.16:15:54.33#ibcon#about to read 3, iclass 3, count 2 2006.229.16:15:54.36#ibcon#read 3, iclass 3, count 2 2006.229.16:15:54.36#ibcon#about to read 4, iclass 3, count 2 2006.229.16:15:54.36#ibcon#read 4, iclass 3, count 2 2006.229.16:15:54.36#ibcon#about to read 5, iclass 3, count 2 2006.229.16:15:54.36#ibcon#read 5, iclass 3, count 2 2006.229.16:15:54.36#ibcon#about to read 6, iclass 3, count 2 2006.229.16:15:54.36#ibcon#read 6, iclass 3, count 2 2006.229.16:15:54.36#ibcon#end of sib2, iclass 3, count 2 2006.229.16:15:54.36#ibcon#*after write, iclass 3, count 2 2006.229.16:15:54.36#ibcon#*before return 0, iclass 3, count 2 2006.229.16:15:54.36#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:54.36#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:15:54.36#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.16:15:54.36#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:54.36#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:54.48#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:54.48#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:54.48#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:15:54.48#ibcon#first serial, iclass 3, count 0 2006.229.16:15:54.48#ibcon#enter sib2, iclass 3, count 0 2006.229.16:15:54.48#ibcon#flushed, iclass 3, count 0 2006.229.16:15:54.48#ibcon#about to write, iclass 3, count 0 2006.229.16:15:54.48#ibcon#wrote, iclass 3, count 0 2006.229.16:15:54.48#ibcon#about to read 3, iclass 3, count 0 2006.229.16:15:54.50#ibcon#read 3, iclass 3, count 0 2006.229.16:15:54.50#ibcon#about to read 4, iclass 3, count 0 2006.229.16:15:54.50#ibcon#read 4, iclass 3, count 0 2006.229.16:15:54.50#ibcon#about to read 5, iclass 3, count 0 2006.229.16:15:54.50#ibcon#read 5, iclass 3, count 0 2006.229.16:15:54.50#ibcon#about to read 6, iclass 3, count 0 2006.229.16:15:54.50#ibcon#read 6, iclass 3, count 0 2006.229.16:15:54.50#ibcon#end of sib2, iclass 3, count 0 2006.229.16:15:54.50#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:15:54.50#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:15:54.50#ibcon#[27=USB\r\n] 2006.229.16:15:54.50#ibcon#*before write, iclass 3, count 0 2006.229.16:15:54.50#ibcon#enter sib2, iclass 3, count 0 2006.229.16:15:54.50#ibcon#flushed, iclass 3, count 0 2006.229.16:15:54.50#ibcon#about to write, iclass 3, count 0 2006.229.16:15:54.50#ibcon#wrote, iclass 3, count 0 2006.229.16:15:54.50#ibcon#about to read 3, iclass 3, count 0 2006.229.16:15:54.53#ibcon#read 3, iclass 3, count 0 2006.229.16:15:54.53#ibcon#about to read 4, iclass 3, count 0 2006.229.16:15:54.53#ibcon#read 4, iclass 3, count 0 2006.229.16:15:54.53#ibcon#about to read 5, iclass 3, count 0 2006.229.16:15:54.53#ibcon#read 5, iclass 3, count 0 2006.229.16:15:54.53#ibcon#about to read 6, iclass 3, count 0 2006.229.16:15:54.53#ibcon#read 6, iclass 3, count 0 2006.229.16:15:54.53#ibcon#end of sib2, iclass 3, count 0 2006.229.16:15:54.53#ibcon#*after write, iclass 3, count 0 2006.229.16:15:54.53#ibcon#*before return 0, iclass 3, count 0 2006.229.16:15:54.53#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:54.53#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:15:54.53#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:15:54.53#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:15:54.53$vck44/vblo=6,719.99 2006.229.16:15:54.53#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.16:15:54.53#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.16:15:54.53#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:54.53#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:54.53#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:54.53#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:54.53#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:15:54.53#ibcon#first serial, iclass 5, count 0 2006.229.16:15:54.53#ibcon#enter sib2, iclass 5, count 0 2006.229.16:15:54.53#ibcon#flushed, iclass 5, count 0 2006.229.16:15:54.53#ibcon#about to write, iclass 5, count 0 2006.229.16:15:54.53#ibcon#wrote, iclass 5, count 0 2006.229.16:15:54.53#ibcon#about to read 3, iclass 5, count 0 2006.229.16:15:54.55#ibcon#read 3, iclass 5, count 0 2006.229.16:15:54.55#ibcon#about to read 4, iclass 5, count 0 2006.229.16:15:54.55#ibcon#read 4, iclass 5, count 0 2006.229.16:15:54.55#ibcon#about to read 5, iclass 5, count 0 2006.229.16:15:54.55#ibcon#read 5, iclass 5, count 0 2006.229.16:15:54.55#ibcon#about to read 6, iclass 5, count 0 2006.229.16:15:54.55#ibcon#read 6, iclass 5, count 0 2006.229.16:15:54.55#ibcon#end of sib2, iclass 5, count 0 2006.229.16:15:54.55#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:15:54.55#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:15:54.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:15:54.55#ibcon#*before write, iclass 5, count 0 2006.229.16:15:54.55#ibcon#enter sib2, iclass 5, count 0 2006.229.16:15:54.55#ibcon#flushed, iclass 5, count 0 2006.229.16:15:54.55#ibcon#about to write, iclass 5, count 0 2006.229.16:15:54.55#ibcon#wrote, iclass 5, count 0 2006.229.16:15:54.55#ibcon#about to read 3, iclass 5, count 0 2006.229.16:15:54.59#ibcon#read 3, iclass 5, count 0 2006.229.16:15:54.59#ibcon#about to read 4, iclass 5, count 0 2006.229.16:15:54.59#ibcon#read 4, iclass 5, count 0 2006.229.16:15:54.59#ibcon#about to read 5, iclass 5, count 0 2006.229.16:15:54.59#ibcon#read 5, iclass 5, count 0 2006.229.16:15:54.59#ibcon#about to read 6, iclass 5, count 0 2006.229.16:15:54.59#ibcon#read 6, iclass 5, count 0 2006.229.16:15:54.59#ibcon#end of sib2, iclass 5, count 0 2006.229.16:15:54.59#ibcon#*after write, iclass 5, count 0 2006.229.16:15:54.59#ibcon#*before return 0, iclass 5, count 0 2006.229.16:15:54.59#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:54.59#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:15:54.59#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:15:54.59#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:15:54.59$vck44/vb=6,4 2006.229.16:15:54.59#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.16:15:54.59#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.16:15:54.59#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:54.59#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:54.65#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:54.65#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:54.65#ibcon#enter wrdev, iclass 7, count 2 2006.229.16:15:54.65#ibcon#first serial, iclass 7, count 2 2006.229.16:15:54.65#ibcon#enter sib2, iclass 7, count 2 2006.229.16:15:54.65#ibcon#flushed, iclass 7, count 2 2006.229.16:15:54.65#ibcon#about to write, iclass 7, count 2 2006.229.16:15:54.65#ibcon#wrote, iclass 7, count 2 2006.229.16:15:54.65#ibcon#about to read 3, iclass 7, count 2 2006.229.16:15:54.67#ibcon#read 3, iclass 7, count 2 2006.229.16:15:54.67#ibcon#about to read 4, iclass 7, count 2 2006.229.16:15:54.67#ibcon#read 4, iclass 7, count 2 2006.229.16:15:54.67#ibcon#about to read 5, iclass 7, count 2 2006.229.16:15:54.67#ibcon#read 5, iclass 7, count 2 2006.229.16:15:54.67#ibcon#about to read 6, iclass 7, count 2 2006.229.16:15:54.67#ibcon#read 6, iclass 7, count 2 2006.229.16:15:54.67#ibcon#end of sib2, iclass 7, count 2 2006.229.16:15:54.67#ibcon#*mode == 0, iclass 7, count 2 2006.229.16:15:54.67#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.16:15:54.67#ibcon#[27=AT06-04\r\n] 2006.229.16:15:54.67#ibcon#*before write, iclass 7, count 2 2006.229.16:15:54.67#ibcon#enter sib2, iclass 7, count 2 2006.229.16:15:54.67#ibcon#flushed, iclass 7, count 2 2006.229.16:15:54.67#ibcon#about to write, iclass 7, count 2 2006.229.16:15:54.67#ibcon#wrote, iclass 7, count 2 2006.229.16:15:54.67#ibcon#about to read 3, iclass 7, count 2 2006.229.16:15:54.70#ibcon#read 3, iclass 7, count 2 2006.229.16:15:54.70#ibcon#about to read 4, iclass 7, count 2 2006.229.16:15:54.70#ibcon#read 4, iclass 7, count 2 2006.229.16:15:54.70#ibcon#about to read 5, iclass 7, count 2 2006.229.16:15:54.70#ibcon#read 5, iclass 7, count 2 2006.229.16:15:54.70#ibcon#about to read 6, iclass 7, count 2 2006.229.16:15:54.70#ibcon#read 6, iclass 7, count 2 2006.229.16:15:54.70#ibcon#end of sib2, iclass 7, count 2 2006.229.16:15:54.70#ibcon#*after write, iclass 7, count 2 2006.229.16:15:54.70#ibcon#*before return 0, iclass 7, count 2 2006.229.16:15:54.70#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:54.70#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:15:54.70#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.16:15:54.70#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:54.70#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:54.82#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:54.82#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:54.82#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:15:54.82#ibcon#first serial, iclass 7, count 0 2006.229.16:15:54.82#ibcon#enter sib2, iclass 7, count 0 2006.229.16:15:54.82#ibcon#flushed, iclass 7, count 0 2006.229.16:15:54.82#ibcon#about to write, iclass 7, count 0 2006.229.16:15:54.82#ibcon#wrote, iclass 7, count 0 2006.229.16:15:54.82#ibcon#about to read 3, iclass 7, count 0 2006.229.16:15:54.84#ibcon#read 3, iclass 7, count 0 2006.229.16:15:54.84#ibcon#about to read 4, iclass 7, count 0 2006.229.16:15:54.84#ibcon#read 4, iclass 7, count 0 2006.229.16:15:54.84#ibcon#about to read 5, iclass 7, count 0 2006.229.16:15:54.84#ibcon#read 5, iclass 7, count 0 2006.229.16:15:54.84#ibcon#about to read 6, iclass 7, count 0 2006.229.16:15:54.84#ibcon#read 6, iclass 7, count 0 2006.229.16:15:54.84#ibcon#end of sib2, iclass 7, count 0 2006.229.16:15:54.84#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:15:54.84#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:15:54.84#ibcon#[27=USB\r\n] 2006.229.16:15:54.84#ibcon#*before write, iclass 7, count 0 2006.229.16:15:54.84#ibcon#enter sib2, iclass 7, count 0 2006.229.16:15:54.84#ibcon#flushed, iclass 7, count 0 2006.229.16:15:54.84#ibcon#about to write, iclass 7, count 0 2006.229.16:15:54.84#ibcon#wrote, iclass 7, count 0 2006.229.16:15:54.84#ibcon#about to read 3, iclass 7, count 0 2006.229.16:15:54.87#ibcon#read 3, iclass 7, count 0 2006.229.16:15:54.87#ibcon#about to read 4, iclass 7, count 0 2006.229.16:15:54.87#ibcon#read 4, iclass 7, count 0 2006.229.16:15:54.87#ibcon#about to read 5, iclass 7, count 0 2006.229.16:15:54.87#ibcon#read 5, iclass 7, count 0 2006.229.16:15:54.87#ibcon#about to read 6, iclass 7, count 0 2006.229.16:15:54.87#ibcon#read 6, iclass 7, count 0 2006.229.16:15:54.87#ibcon#end of sib2, iclass 7, count 0 2006.229.16:15:54.87#ibcon#*after write, iclass 7, count 0 2006.229.16:15:54.87#ibcon#*before return 0, iclass 7, count 0 2006.229.16:15:54.87#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:54.87#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:15:54.87#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:15:54.87#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:15:54.87$vck44/vblo=7,734.99 2006.229.16:15:54.87#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.16:15:54.87#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.16:15:54.87#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:54.87#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:54.87#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:54.87#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:54.87#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:15:54.87#ibcon#first serial, iclass 11, count 0 2006.229.16:15:54.87#ibcon#enter sib2, iclass 11, count 0 2006.229.16:15:54.87#ibcon#flushed, iclass 11, count 0 2006.229.16:15:54.87#ibcon#about to write, iclass 11, count 0 2006.229.16:15:54.87#ibcon#wrote, iclass 11, count 0 2006.229.16:15:54.87#ibcon#about to read 3, iclass 11, count 0 2006.229.16:15:54.89#ibcon#read 3, iclass 11, count 0 2006.229.16:15:54.89#ibcon#about to read 4, iclass 11, count 0 2006.229.16:15:54.89#ibcon#read 4, iclass 11, count 0 2006.229.16:15:54.89#ibcon#about to read 5, iclass 11, count 0 2006.229.16:15:54.89#ibcon#read 5, iclass 11, count 0 2006.229.16:15:54.89#ibcon#about to read 6, iclass 11, count 0 2006.229.16:15:54.89#ibcon#read 6, iclass 11, count 0 2006.229.16:15:54.89#ibcon#end of sib2, iclass 11, count 0 2006.229.16:15:54.89#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:15:54.89#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:15:54.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:15:54.89#ibcon#*before write, iclass 11, count 0 2006.229.16:15:54.89#ibcon#enter sib2, iclass 11, count 0 2006.229.16:15:54.89#ibcon#flushed, iclass 11, count 0 2006.229.16:15:54.89#ibcon#about to write, iclass 11, count 0 2006.229.16:15:54.89#ibcon#wrote, iclass 11, count 0 2006.229.16:15:54.89#ibcon#about to read 3, iclass 11, count 0 2006.229.16:15:54.93#ibcon#read 3, iclass 11, count 0 2006.229.16:15:54.93#ibcon#about to read 4, iclass 11, count 0 2006.229.16:15:54.93#ibcon#read 4, iclass 11, count 0 2006.229.16:15:54.93#ibcon#about to read 5, iclass 11, count 0 2006.229.16:15:54.93#ibcon#read 5, iclass 11, count 0 2006.229.16:15:54.93#ibcon#about to read 6, iclass 11, count 0 2006.229.16:15:54.93#ibcon#read 6, iclass 11, count 0 2006.229.16:15:54.93#ibcon#end of sib2, iclass 11, count 0 2006.229.16:15:54.93#ibcon#*after write, iclass 11, count 0 2006.229.16:15:54.93#ibcon#*before return 0, iclass 11, count 0 2006.229.16:15:54.93#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:54.93#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:15:54.93#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:15:54.93#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:15:54.93$vck44/vb=7,4 2006.229.16:15:54.93#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.16:15:54.93#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.16:15:54.93#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:54.93#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:54.99#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:54.99#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:54.99#ibcon#enter wrdev, iclass 13, count 2 2006.229.16:15:54.99#ibcon#first serial, iclass 13, count 2 2006.229.16:15:54.99#ibcon#enter sib2, iclass 13, count 2 2006.229.16:15:54.99#ibcon#flushed, iclass 13, count 2 2006.229.16:15:54.99#ibcon#about to write, iclass 13, count 2 2006.229.16:15:54.99#ibcon#wrote, iclass 13, count 2 2006.229.16:15:54.99#ibcon#about to read 3, iclass 13, count 2 2006.229.16:15:55.01#ibcon#read 3, iclass 13, count 2 2006.229.16:15:55.01#ibcon#about to read 4, iclass 13, count 2 2006.229.16:15:55.01#ibcon#read 4, iclass 13, count 2 2006.229.16:15:55.01#ibcon#about to read 5, iclass 13, count 2 2006.229.16:15:55.01#ibcon#read 5, iclass 13, count 2 2006.229.16:15:55.01#ibcon#about to read 6, iclass 13, count 2 2006.229.16:15:55.01#ibcon#read 6, iclass 13, count 2 2006.229.16:15:55.01#ibcon#end of sib2, iclass 13, count 2 2006.229.16:15:55.01#ibcon#*mode == 0, iclass 13, count 2 2006.229.16:15:55.01#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.16:15:55.01#ibcon#[27=AT07-04\r\n] 2006.229.16:15:55.01#ibcon#*before write, iclass 13, count 2 2006.229.16:15:55.01#ibcon#enter sib2, iclass 13, count 2 2006.229.16:15:55.01#ibcon#flushed, iclass 13, count 2 2006.229.16:15:55.01#ibcon#about to write, iclass 13, count 2 2006.229.16:15:55.01#ibcon#wrote, iclass 13, count 2 2006.229.16:15:55.01#ibcon#about to read 3, iclass 13, count 2 2006.229.16:15:55.04#ibcon#read 3, iclass 13, count 2 2006.229.16:15:55.04#ibcon#about to read 4, iclass 13, count 2 2006.229.16:15:55.04#ibcon#read 4, iclass 13, count 2 2006.229.16:15:55.04#ibcon#about to read 5, iclass 13, count 2 2006.229.16:15:55.04#ibcon#read 5, iclass 13, count 2 2006.229.16:15:55.04#ibcon#about to read 6, iclass 13, count 2 2006.229.16:15:55.04#ibcon#read 6, iclass 13, count 2 2006.229.16:15:55.04#ibcon#end of sib2, iclass 13, count 2 2006.229.16:15:55.04#ibcon#*after write, iclass 13, count 2 2006.229.16:15:55.04#ibcon#*before return 0, iclass 13, count 2 2006.229.16:15:55.04#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:55.04#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:15:55.04#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.16:15:55.04#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:55.04#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:55.16#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:55.16#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:55.16#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:15:55.16#ibcon#first serial, iclass 13, count 0 2006.229.16:15:55.16#ibcon#enter sib2, iclass 13, count 0 2006.229.16:15:55.16#ibcon#flushed, iclass 13, count 0 2006.229.16:15:55.16#ibcon#about to write, iclass 13, count 0 2006.229.16:15:55.16#ibcon#wrote, iclass 13, count 0 2006.229.16:15:55.16#ibcon#about to read 3, iclass 13, count 0 2006.229.16:15:55.18#ibcon#read 3, iclass 13, count 0 2006.229.16:15:55.18#ibcon#about to read 4, iclass 13, count 0 2006.229.16:15:55.18#ibcon#read 4, iclass 13, count 0 2006.229.16:15:55.18#ibcon#about to read 5, iclass 13, count 0 2006.229.16:15:55.18#ibcon#read 5, iclass 13, count 0 2006.229.16:15:55.18#ibcon#about to read 6, iclass 13, count 0 2006.229.16:15:55.18#ibcon#read 6, iclass 13, count 0 2006.229.16:15:55.18#ibcon#end of sib2, iclass 13, count 0 2006.229.16:15:55.18#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:15:55.18#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:15:55.18#ibcon#[27=USB\r\n] 2006.229.16:15:55.18#ibcon#*before write, iclass 13, count 0 2006.229.16:15:55.18#ibcon#enter sib2, iclass 13, count 0 2006.229.16:15:55.18#ibcon#flushed, iclass 13, count 0 2006.229.16:15:55.18#ibcon#about to write, iclass 13, count 0 2006.229.16:15:55.18#ibcon#wrote, iclass 13, count 0 2006.229.16:15:55.18#ibcon#about to read 3, iclass 13, count 0 2006.229.16:15:55.21#ibcon#read 3, iclass 13, count 0 2006.229.16:15:55.21#ibcon#about to read 4, iclass 13, count 0 2006.229.16:15:55.21#ibcon#read 4, iclass 13, count 0 2006.229.16:15:55.21#ibcon#about to read 5, iclass 13, count 0 2006.229.16:15:55.21#ibcon#read 5, iclass 13, count 0 2006.229.16:15:55.21#ibcon#about to read 6, iclass 13, count 0 2006.229.16:15:55.21#ibcon#read 6, iclass 13, count 0 2006.229.16:15:55.21#ibcon#end of sib2, iclass 13, count 0 2006.229.16:15:55.21#ibcon#*after write, iclass 13, count 0 2006.229.16:15:55.21#ibcon#*before return 0, iclass 13, count 0 2006.229.16:15:55.21#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:55.21#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:15:55.21#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:15:55.21#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:15:55.21$vck44/vblo=8,744.99 2006.229.16:15:55.21#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.16:15:55.21#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.16:15:55.21#ibcon#ireg 17 cls_cnt 0 2006.229.16:15:55.21#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:55.21#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:55.21#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:55.21#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:15:55.21#ibcon#first serial, iclass 15, count 0 2006.229.16:15:55.21#ibcon#enter sib2, iclass 15, count 0 2006.229.16:15:55.21#ibcon#flushed, iclass 15, count 0 2006.229.16:15:55.21#ibcon#about to write, iclass 15, count 0 2006.229.16:15:55.21#ibcon#wrote, iclass 15, count 0 2006.229.16:15:55.21#ibcon#about to read 3, iclass 15, count 0 2006.229.16:15:55.23#ibcon#read 3, iclass 15, count 0 2006.229.16:15:55.23#ibcon#about to read 4, iclass 15, count 0 2006.229.16:15:55.23#ibcon#read 4, iclass 15, count 0 2006.229.16:15:55.23#ibcon#about to read 5, iclass 15, count 0 2006.229.16:15:55.23#ibcon#read 5, iclass 15, count 0 2006.229.16:15:55.23#ibcon#about to read 6, iclass 15, count 0 2006.229.16:15:55.23#ibcon#read 6, iclass 15, count 0 2006.229.16:15:55.23#ibcon#end of sib2, iclass 15, count 0 2006.229.16:15:55.23#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:15:55.23#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:15:55.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:15:55.23#ibcon#*before write, iclass 15, count 0 2006.229.16:15:55.23#ibcon#enter sib2, iclass 15, count 0 2006.229.16:15:55.23#ibcon#flushed, iclass 15, count 0 2006.229.16:15:55.23#ibcon#about to write, iclass 15, count 0 2006.229.16:15:55.23#ibcon#wrote, iclass 15, count 0 2006.229.16:15:55.23#ibcon#about to read 3, iclass 15, count 0 2006.229.16:15:55.27#ibcon#read 3, iclass 15, count 0 2006.229.16:15:55.27#ibcon#about to read 4, iclass 15, count 0 2006.229.16:15:55.27#ibcon#read 4, iclass 15, count 0 2006.229.16:15:55.27#ibcon#about to read 5, iclass 15, count 0 2006.229.16:15:55.27#ibcon#read 5, iclass 15, count 0 2006.229.16:15:55.27#ibcon#about to read 6, iclass 15, count 0 2006.229.16:15:55.27#ibcon#read 6, iclass 15, count 0 2006.229.16:15:55.27#ibcon#end of sib2, iclass 15, count 0 2006.229.16:15:55.27#ibcon#*after write, iclass 15, count 0 2006.229.16:15:55.27#ibcon#*before return 0, iclass 15, count 0 2006.229.16:15:55.27#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:55.27#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:15:55.27#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:15:55.27#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:15:55.27$vck44/vb=8,4 2006.229.16:15:55.27#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.16:15:55.27#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.16:15:55.27#ibcon#ireg 11 cls_cnt 2 2006.229.16:15:55.27#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:55.33#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:55.33#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:55.33#ibcon#enter wrdev, iclass 17, count 2 2006.229.16:15:55.33#ibcon#first serial, iclass 17, count 2 2006.229.16:15:55.33#ibcon#enter sib2, iclass 17, count 2 2006.229.16:15:55.33#ibcon#flushed, iclass 17, count 2 2006.229.16:15:55.33#ibcon#about to write, iclass 17, count 2 2006.229.16:15:55.33#ibcon#wrote, iclass 17, count 2 2006.229.16:15:55.33#ibcon#about to read 3, iclass 17, count 2 2006.229.16:15:55.35#ibcon#read 3, iclass 17, count 2 2006.229.16:15:55.35#ibcon#about to read 4, iclass 17, count 2 2006.229.16:15:55.35#ibcon#read 4, iclass 17, count 2 2006.229.16:15:55.35#ibcon#about to read 5, iclass 17, count 2 2006.229.16:15:55.35#ibcon#read 5, iclass 17, count 2 2006.229.16:15:55.35#ibcon#about to read 6, iclass 17, count 2 2006.229.16:15:55.35#ibcon#read 6, iclass 17, count 2 2006.229.16:15:55.35#ibcon#end of sib2, iclass 17, count 2 2006.229.16:15:55.35#ibcon#*mode == 0, iclass 17, count 2 2006.229.16:15:55.35#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.16:15:55.35#ibcon#[27=AT08-04\r\n] 2006.229.16:15:55.35#ibcon#*before write, iclass 17, count 2 2006.229.16:15:55.35#ibcon#enter sib2, iclass 17, count 2 2006.229.16:15:55.35#ibcon#flushed, iclass 17, count 2 2006.229.16:15:55.35#ibcon#about to write, iclass 17, count 2 2006.229.16:15:55.35#ibcon#wrote, iclass 17, count 2 2006.229.16:15:55.35#ibcon#about to read 3, iclass 17, count 2 2006.229.16:15:55.38#ibcon#read 3, iclass 17, count 2 2006.229.16:15:55.38#ibcon#about to read 4, iclass 17, count 2 2006.229.16:15:55.38#ibcon#read 4, iclass 17, count 2 2006.229.16:15:55.38#ibcon#about to read 5, iclass 17, count 2 2006.229.16:15:55.38#ibcon#read 5, iclass 17, count 2 2006.229.16:15:55.38#ibcon#about to read 6, iclass 17, count 2 2006.229.16:15:55.38#ibcon#read 6, iclass 17, count 2 2006.229.16:15:55.38#ibcon#end of sib2, iclass 17, count 2 2006.229.16:15:55.38#ibcon#*after write, iclass 17, count 2 2006.229.16:15:55.38#ibcon#*before return 0, iclass 17, count 2 2006.229.16:15:55.38#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:55.38#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:15:55.38#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.16:15:55.38#ibcon#ireg 7 cls_cnt 0 2006.229.16:15:55.38#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:55.50#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:55.50#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:55.50#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:15:55.50#ibcon#first serial, iclass 17, count 0 2006.229.16:15:55.50#ibcon#enter sib2, iclass 17, count 0 2006.229.16:15:55.50#ibcon#flushed, iclass 17, count 0 2006.229.16:15:55.50#ibcon#about to write, iclass 17, count 0 2006.229.16:15:55.50#ibcon#wrote, iclass 17, count 0 2006.229.16:15:55.50#ibcon#about to read 3, iclass 17, count 0 2006.229.16:15:55.52#ibcon#read 3, iclass 17, count 0 2006.229.16:15:55.52#ibcon#about to read 4, iclass 17, count 0 2006.229.16:15:55.52#ibcon#read 4, iclass 17, count 0 2006.229.16:15:55.52#ibcon#about to read 5, iclass 17, count 0 2006.229.16:15:55.52#ibcon#read 5, iclass 17, count 0 2006.229.16:15:55.52#ibcon#about to read 6, iclass 17, count 0 2006.229.16:15:55.52#ibcon#read 6, iclass 17, count 0 2006.229.16:15:55.52#ibcon#end of sib2, iclass 17, count 0 2006.229.16:15:55.52#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:15:55.52#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:15:55.52#ibcon#[27=USB\r\n] 2006.229.16:15:55.52#ibcon#*before write, iclass 17, count 0 2006.229.16:15:55.52#ibcon#enter sib2, iclass 17, count 0 2006.229.16:15:55.52#ibcon#flushed, iclass 17, count 0 2006.229.16:15:55.52#ibcon#about to write, iclass 17, count 0 2006.229.16:15:55.52#ibcon#wrote, iclass 17, count 0 2006.229.16:15:55.52#ibcon#about to read 3, iclass 17, count 0 2006.229.16:15:55.55#ibcon#read 3, iclass 17, count 0 2006.229.16:15:55.55#ibcon#about to read 4, iclass 17, count 0 2006.229.16:15:55.55#ibcon#read 4, iclass 17, count 0 2006.229.16:15:55.55#ibcon#about to read 5, iclass 17, count 0 2006.229.16:15:55.55#ibcon#read 5, iclass 17, count 0 2006.229.16:15:55.55#ibcon#about to read 6, iclass 17, count 0 2006.229.16:15:55.55#ibcon#read 6, iclass 17, count 0 2006.229.16:15:55.55#ibcon#end of sib2, iclass 17, count 0 2006.229.16:15:55.55#ibcon#*after write, iclass 17, count 0 2006.229.16:15:55.55#ibcon#*before return 0, iclass 17, count 0 2006.229.16:15:55.55#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:55.55#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:15:55.55#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:15:55.55#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:15:55.55$vck44/vabw=wide 2006.229.16:15:55.55#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.16:15:55.55#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.16:15:55.55#ibcon#ireg 8 cls_cnt 0 2006.229.16:15:55.55#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:55.55#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:55.55#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:55.55#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:15:55.55#ibcon#first serial, iclass 19, count 0 2006.229.16:15:55.55#ibcon#enter sib2, iclass 19, count 0 2006.229.16:15:55.55#ibcon#flushed, iclass 19, count 0 2006.229.16:15:55.55#ibcon#about to write, iclass 19, count 0 2006.229.16:15:55.55#ibcon#wrote, iclass 19, count 0 2006.229.16:15:55.55#ibcon#about to read 3, iclass 19, count 0 2006.229.16:15:55.57#ibcon#read 3, iclass 19, count 0 2006.229.16:15:55.57#ibcon#about to read 4, iclass 19, count 0 2006.229.16:15:55.57#ibcon#read 4, iclass 19, count 0 2006.229.16:15:55.57#ibcon#about to read 5, iclass 19, count 0 2006.229.16:15:55.57#ibcon#read 5, iclass 19, count 0 2006.229.16:15:55.57#ibcon#about to read 6, iclass 19, count 0 2006.229.16:15:55.57#ibcon#read 6, iclass 19, count 0 2006.229.16:15:55.57#ibcon#end of sib2, iclass 19, count 0 2006.229.16:15:55.57#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:15:55.57#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:15:55.57#ibcon#[25=BW32\r\n] 2006.229.16:15:55.57#ibcon#*before write, iclass 19, count 0 2006.229.16:15:55.57#ibcon#enter sib2, iclass 19, count 0 2006.229.16:15:55.57#ibcon#flushed, iclass 19, count 0 2006.229.16:15:55.57#ibcon#about to write, iclass 19, count 0 2006.229.16:15:55.57#ibcon#wrote, iclass 19, count 0 2006.229.16:15:55.57#ibcon#about to read 3, iclass 19, count 0 2006.229.16:15:55.60#ibcon#read 3, iclass 19, count 0 2006.229.16:15:55.60#ibcon#about to read 4, iclass 19, count 0 2006.229.16:15:55.60#ibcon#read 4, iclass 19, count 0 2006.229.16:15:55.60#ibcon#about to read 5, iclass 19, count 0 2006.229.16:15:55.60#ibcon#read 5, iclass 19, count 0 2006.229.16:15:55.60#ibcon#about to read 6, iclass 19, count 0 2006.229.16:15:55.60#ibcon#read 6, iclass 19, count 0 2006.229.16:15:55.60#ibcon#end of sib2, iclass 19, count 0 2006.229.16:15:55.60#ibcon#*after write, iclass 19, count 0 2006.229.16:15:55.60#ibcon#*before return 0, iclass 19, count 0 2006.229.16:15:55.60#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:55.60#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:15:55.60#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:15:55.60#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:15:55.60$vck44/vbbw=wide 2006.229.16:15:55.60#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:15:55.60#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:15:55.60#ibcon#ireg 8 cls_cnt 0 2006.229.16:15:55.60#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:15:55.67#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:15:55.67#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:15:55.67#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:15:55.67#ibcon#first serial, iclass 21, count 0 2006.229.16:15:55.67#ibcon#enter sib2, iclass 21, count 0 2006.229.16:15:55.67#ibcon#flushed, iclass 21, count 0 2006.229.16:15:55.67#ibcon#about to write, iclass 21, count 0 2006.229.16:15:55.67#ibcon#wrote, iclass 21, count 0 2006.229.16:15:55.67#ibcon#about to read 3, iclass 21, count 0 2006.229.16:15:55.69#ibcon#read 3, iclass 21, count 0 2006.229.16:15:55.69#ibcon#about to read 4, iclass 21, count 0 2006.229.16:15:55.69#ibcon#read 4, iclass 21, count 0 2006.229.16:15:55.69#ibcon#about to read 5, iclass 21, count 0 2006.229.16:15:55.69#ibcon#read 5, iclass 21, count 0 2006.229.16:15:55.69#ibcon#about to read 6, iclass 21, count 0 2006.229.16:15:55.69#ibcon#read 6, iclass 21, count 0 2006.229.16:15:55.69#ibcon#end of sib2, iclass 21, count 0 2006.229.16:15:55.69#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:15:55.69#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:15:55.69#ibcon#[27=BW32\r\n] 2006.229.16:15:55.69#ibcon#*before write, iclass 21, count 0 2006.229.16:15:55.69#ibcon#enter sib2, iclass 21, count 0 2006.229.16:15:55.69#ibcon#flushed, iclass 21, count 0 2006.229.16:15:55.69#ibcon#about to write, iclass 21, count 0 2006.229.16:15:55.69#ibcon#wrote, iclass 21, count 0 2006.229.16:15:55.69#ibcon#about to read 3, iclass 21, count 0 2006.229.16:15:55.72#ibcon#read 3, iclass 21, count 0 2006.229.16:15:55.72#ibcon#about to read 4, iclass 21, count 0 2006.229.16:15:55.72#ibcon#read 4, iclass 21, count 0 2006.229.16:15:55.72#ibcon#about to read 5, iclass 21, count 0 2006.229.16:15:55.72#ibcon#read 5, iclass 21, count 0 2006.229.16:15:55.72#ibcon#about to read 6, iclass 21, count 0 2006.229.16:15:55.72#ibcon#read 6, iclass 21, count 0 2006.229.16:15:55.72#ibcon#end of sib2, iclass 21, count 0 2006.229.16:15:55.72#ibcon#*after write, iclass 21, count 0 2006.229.16:15:55.72#ibcon#*before return 0, iclass 21, count 0 2006.229.16:15:55.72#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:15:55.72#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:15:55.72#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:15:55.72#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:15:55.72$setupk4/ifdk4 2006.229.16:15:55.72$ifdk4/lo= 2006.229.16:15:55.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:15:55.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:15:55.72$ifdk4/patch= 2006.229.16:15:55.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:15:55.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:15:55.72$setupk4/!*+20s 2006.229.16:15:59.39#abcon#<5=/05 1.3 2.4 27.201001001.9\r\n> 2006.229.16:15:59.41#abcon#{5=INTERFACE CLEAR} 2006.229.16:15:59.47#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:16:02.13#trakl#Source acquired 2006.229.16:16:03.13#flagr#flagr/antenna,acquired 2006.229.16:16:09.56#abcon#<5=/05 1.3 2.4 27.201001001.9\r\n> 2006.229.16:16:09.58#abcon#{5=INTERFACE CLEAR} 2006.229.16:16:09.64#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:16:10.23$setupk4/"tpicd 2006.229.16:16:10.23$setupk4/echo=off 2006.229.16:16:10.23$setupk4/xlog=off 2006.229.16:16:10.23:!2006.229.16:17:06 2006.229.16:17:06.00:preob 2006.229.16:17:07.13/onsource/TRACKING 2006.229.16:17:07.13:!2006.229.16:17:16 2006.229.16:17:16.00:"tape 2006.229.16:17:16.00:"st=record 2006.229.16:17:16.00:data_valid=on 2006.229.16:17:16.00:midob 2006.229.16:17:16.13/onsource/TRACKING 2006.229.16:17:16.13/wx/27.20,1001.9,100 2006.229.16:17:16.30/cable/+6.4153E-03 2006.229.16:17:17.39/va/01,08,usb,yes,29,32 2006.229.16:17:17.39/va/02,07,usb,yes,32,33 2006.229.16:17:17.39/va/03,06,usb,yes,40,42 2006.229.16:17:17.39/va/04,07,usb,yes,33,34 2006.229.16:17:17.39/va/05,04,usb,yes,29,30 2006.229.16:17:17.39/va/06,04,usb,yes,33,33 2006.229.16:17:17.39/va/07,05,usb,yes,29,30 2006.229.16:17:17.39/va/08,06,usb,yes,21,26 2006.229.16:17:17.62/valo/01,524.99,yes,locked 2006.229.16:17:17.62/valo/02,534.99,yes,locked 2006.229.16:17:17.62/valo/03,564.99,yes,locked 2006.229.16:17:17.62/valo/04,624.99,yes,locked 2006.229.16:17:17.62/valo/05,734.99,yes,locked 2006.229.16:17:17.62/valo/06,814.99,yes,locked 2006.229.16:17:17.62/valo/07,864.99,yes,locked 2006.229.16:17:17.62/valo/08,884.99,yes,locked 2006.229.16:17:18.71/vb/01,04,usb,yes,31,29 2006.229.16:17:18.71/vb/02,04,usb,yes,33,33 2006.229.16:17:18.71/vb/03,04,usb,yes,30,33 2006.229.16:17:18.71/vb/04,04,usb,yes,35,34 2006.229.16:17:18.71/vb/05,04,usb,yes,27,29 2006.229.16:17:18.71/vb/06,04,usb,yes,32,28 2006.229.16:17:18.71/vb/07,04,usb,yes,31,31 2006.229.16:17:18.71/vb/08,04,usb,yes,29,32 2006.229.16:17:18.94/vblo/01,629.99,yes,locked 2006.229.16:17:18.94/vblo/02,634.99,yes,locked 2006.229.16:17:18.94/vblo/03,649.99,yes,locked 2006.229.16:17:18.94/vblo/04,679.99,yes,locked 2006.229.16:17:18.94/vblo/05,709.99,yes,locked 2006.229.16:17:18.94/vblo/06,719.99,yes,locked 2006.229.16:17:18.94/vblo/07,734.99,yes,locked 2006.229.16:17:18.94/vblo/08,744.99,yes,locked 2006.229.16:17:19.09/vabw/8 2006.229.16:17:19.24/vbbw/8 2006.229.16:17:19.33/xfe/off,on,12.0 2006.229.16:17:19.72/ifatt/23,28,28,28 2006.229.16:17:20.08/fmout-gps/S +4.54E-07 2006.229.16:17:20.12:!2006.229.16:20:06 2006.229.16:20:06.01:data_valid=off 2006.229.16:20:06.01:"et 2006.229.16:20:06.02:!+3s 2006.229.16:20:09.03:"tape 2006.229.16:20:09.03:postob 2006.229.16:20:09.10/cable/+6.4159E-03 2006.229.16:20:09.10/wx/27.19,1001.9,100 2006.229.16:20:09.16/fmout-gps/S +4.53E-07 2006.229.16:20:09.16:scan_name=229-1622,jd0608,80 2006.229.16:20:09.16:source=2136+141,213901.31,142336.0,2000.0,ccw 2006.229.16:20:10.14#flagr#flagr/antenna,new-source 2006.229.16:20:10.14:checkk5 2006.229.16:20:10.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:20:10.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:20:11.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:20:11.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:20:12.15/chk_obsdata//k5ts1/T2291617??a.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.16:20:12.54/chk_obsdata//k5ts2/T2291617??b.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.16:20:12.94/chk_obsdata//k5ts3/T2291617??c.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.16:20:13.35/chk_obsdata//k5ts4/T2291617??d.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.16:20:14.06/k5log//k5ts1_log_newline 2006.229.16:20:14.77/k5log//k5ts2_log_newline 2006.229.16:20:15.48/k5log//k5ts3_log_newline 2006.229.16:20:16.21/k5log//k5ts4_log_newline 2006.229.16:20:16.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:20:16.24:setupk4=1 2006.229.16:20:16.24$setupk4/echo=on 2006.229.16:20:16.24$setupk4/pcalon 2006.229.16:20:16.24$pcalon/"no phase cal control is implemented here 2006.229.16:20:16.24$setupk4/"tpicd=stop 2006.229.16:20:16.24$setupk4/"rec=synch_on 2006.229.16:20:16.24$setupk4/"rec_mode=128 2006.229.16:20:16.24$setupk4/!* 2006.229.16:20:16.24$setupk4/recpk4 2006.229.16:20:16.24$recpk4/recpatch= 2006.229.16:20:16.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:20:16.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:20:16.24$setupk4/vck44 2006.229.16:20:16.24$vck44/valo=1,524.99 2006.229.16:20:16.24#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.16:20:16.24#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.16:20:16.24#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:16.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:16.24#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:16.24#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:16.24#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:20:16.24#ibcon#first serial, iclass 22, count 0 2006.229.16:20:16.24#ibcon#enter sib2, iclass 22, count 0 2006.229.16:20:16.24#ibcon#flushed, iclass 22, count 0 2006.229.16:20:16.24#ibcon#about to write, iclass 22, count 0 2006.229.16:20:16.24#ibcon#wrote, iclass 22, count 0 2006.229.16:20:16.24#ibcon#about to read 3, iclass 22, count 0 2006.229.16:20:16.26#ibcon#read 3, iclass 22, count 0 2006.229.16:20:16.26#ibcon#about to read 4, iclass 22, count 0 2006.229.16:20:16.26#ibcon#read 4, iclass 22, count 0 2006.229.16:20:16.26#ibcon#about to read 5, iclass 22, count 0 2006.229.16:20:16.26#ibcon#read 5, iclass 22, count 0 2006.229.16:20:16.26#ibcon#about to read 6, iclass 22, count 0 2006.229.16:20:16.26#ibcon#read 6, iclass 22, count 0 2006.229.16:20:16.26#ibcon#end of sib2, iclass 22, count 0 2006.229.16:20:16.26#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:20:16.26#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:20:16.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:20:16.26#ibcon#*before write, iclass 22, count 0 2006.229.16:20:16.26#ibcon#enter sib2, iclass 22, count 0 2006.229.16:20:16.26#ibcon#flushed, iclass 22, count 0 2006.229.16:20:16.26#ibcon#about to write, iclass 22, count 0 2006.229.16:20:16.26#ibcon#wrote, iclass 22, count 0 2006.229.16:20:16.26#ibcon#about to read 3, iclass 22, count 0 2006.229.16:20:16.31#ibcon#read 3, iclass 22, count 0 2006.229.16:20:16.31#ibcon#about to read 4, iclass 22, count 0 2006.229.16:20:16.31#ibcon#read 4, iclass 22, count 0 2006.229.16:20:16.31#ibcon#about to read 5, iclass 22, count 0 2006.229.16:20:16.31#ibcon#read 5, iclass 22, count 0 2006.229.16:20:16.31#ibcon#about to read 6, iclass 22, count 0 2006.229.16:20:16.31#ibcon#read 6, iclass 22, count 0 2006.229.16:20:16.31#ibcon#end of sib2, iclass 22, count 0 2006.229.16:20:16.31#ibcon#*after write, iclass 22, count 0 2006.229.16:20:16.31#ibcon#*before return 0, iclass 22, count 0 2006.229.16:20:16.31#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:16.31#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:16.31#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:20:16.31#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:20:16.31$vck44/va=1,8 2006.229.16:20:16.31#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.16:20:16.31#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.16:20:16.31#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:16.31#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:16.31#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:16.31#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:16.31#ibcon#enter wrdev, iclass 24, count 2 2006.229.16:20:16.31#ibcon#first serial, iclass 24, count 2 2006.229.16:20:16.31#ibcon#enter sib2, iclass 24, count 2 2006.229.16:20:16.31#ibcon#flushed, iclass 24, count 2 2006.229.16:20:16.31#ibcon#about to write, iclass 24, count 2 2006.229.16:20:16.31#ibcon#wrote, iclass 24, count 2 2006.229.16:20:16.31#ibcon#about to read 3, iclass 24, count 2 2006.229.16:20:16.33#ibcon#read 3, iclass 24, count 2 2006.229.16:20:16.33#ibcon#about to read 4, iclass 24, count 2 2006.229.16:20:16.33#ibcon#read 4, iclass 24, count 2 2006.229.16:20:16.33#ibcon#about to read 5, iclass 24, count 2 2006.229.16:20:16.33#ibcon#read 5, iclass 24, count 2 2006.229.16:20:16.33#ibcon#about to read 6, iclass 24, count 2 2006.229.16:20:16.33#ibcon#read 6, iclass 24, count 2 2006.229.16:20:16.33#ibcon#end of sib2, iclass 24, count 2 2006.229.16:20:16.33#ibcon#*mode == 0, iclass 24, count 2 2006.229.16:20:16.33#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.16:20:16.33#ibcon#[25=AT01-08\r\n] 2006.229.16:20:16.33#ibcon#*before write, iclass 24, count 2 2006.229.16:20:16.33#ibcon#enter sib2, iclass 24, count 2 2006.229.16:20:16.33#ibcon#flushed, iclass 24, count 2 2006.229.16:20:16.33#ibcon#about to write, iclass 24, count 2 2006.229.16:20:16.33#ibcon#wrote, iclass 24, count 2 2006.229.16:20:16.33#ibcon#about to read 3, iclass 24, count 2 2006.229.16:20:16.36#ibcon#read 3, iclass 24, count 2 2006.229.16:20:16.36#ibcon#about to read 4, iclass 24, count 2 2006.229.16:20:16.36#ibcon#read 4, iclass 24, count 2 2006.229.16:20:16.36#ibcon#about to read 5, iclass 24, count 2 2006.229.16:20:16.36#ibcon#read 5, iclass 24, count 2 2006.229.16:20:16.36#ibcon#about to read 6, iclass 24, count 2 2006.229.16:20:16.36#ibcon#read 6, iclass 24, count 2 2006.229.16:20:16.36#ibcon#end of sib2, iclass 24, count 2 2006.229.16:20:16.36#ibcon#*after write, iclass 24, count 2 2006.229.16:20:16.36#ibcon#*before return 0, iclass 24, count 2 2006.229.16:20:16.36#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:16.36#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:16.36#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.16:20:16.36#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:16.36#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:16.48#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:16.48#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:16.48#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:20:16.48#ibcon#first serial, iclass 24, count 0 2006.229.16:20:16.48#ibcon#enter sib2, iclass 24, count 0 2006.229.16:20:16.48#ibcon#flushed, iclass 24, count 0 2006.229.16:20:16.48#ibcon#about to write, iclass 24, count 0 2006.229.16:20:16.48#ibcon#wrote, iclass 24, count 0 2006.229.16:20:16.48#ibcon#about to read 3, iclass 24, count 0 2006.229.16:20:16.50#ibcon#read 3, iclass 24, count 0 2006.229.16:20:16.50#ibcon#about to read 4, iclass 24, count 0 2006.229.16:20:16.50#ibcon#read 4, iclass 24, count 0 2006.229.16:20:16.50#ibcon#about to read 5, iclass 24, count 0 2006.229.16:20:16.50#ibcon#read 5, iclass 24, count 0 2006.229.16:20:16.50#ibcon#about to read 6, iclass 24, count 0 2006.229.16:20:16.50#ibcon#read 6, iclass 24, count 0 2006.229.16:20:16.50#ibcon#end of sib2, iclass 24, count 0 2006.229.16:20:16.50#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:20:16.50#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:20:16.50#ibcon#[25=USB\r\n] 2006.229.16:20:16.50#ibcon#*before write, iclass 24, count 0 2006.229.16:20:16.50#ibcon#enter sib2, iclass 24, count 0 2006.229.16:20:16.50#ibcon#flushed, iclass 24, count 0 2006.229.16:20:16.50#ibcon#about to write, iclass 24, count 0 2006.229.16:20:16.50#ibcon#wrote, iclass 24, count 0 2006.229.16:20:16.50#ibcon#about to read 3, iclass 24, count 0 2006.229.16:20:16.53#ibcon#read 3, iclass 24, count 0 2006.229.16:20:16.53#ibcon#about to read 4, iclass 24, count 0 2006.229.16:20:16.53#ibcon#read 4, iclass 24, count 0 2006.229.16:20:16.53#ibcon#about to read 5, iclass 24, count 0 2006.229.16:20:16.53#ibcon#read 5, iclass 24, count 0 2006.229.16:20:16.53#ibcon#about to read 6, iclass 24, count 0 2006.229.16:20:16.53#ibcon#read 6, iclass 24, count 0 2006.229.16:20:16.53#ibcon#end of sib2, iclass 24, count 0 2006.229.16:20:16.53#ibcon#*after write, iclass 24, count 0 2006.229.16:20:16.53#ibcon#*before return 0, iclass 24, count 0 2006.229.16:20:16.53#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:16.53#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:16.53#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:20:16.53#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:20:16.53$vck44/valo=2,534.99 2006.229.16:20:16.53#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.16:20:16.53#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.16:20:16.53#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:16.53#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:16.53#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:16.53#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:16.53#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:20:16.53#ibcon#first serial, iclass 26, count 0 2006.229.16:20:16.53#ibcon#enter sib2, iclass 26, count 0 2006.229.16:20:16.53#ibcon#flushed, iclass 26, count 0 2006.229.16:20:16.53#ibcon#about to write, iclass 26, count 0 2006.229.16:20:16.53#ibcon#wrote, iclass 26, count 0 2006.229.16:20:16.53#ibcon#about to read 3, iclass 26, count 0 2006.229.16:20:16.55#ibcon#read 3, iclass 26, count 0 2006.229.16:20:16.55#ibcon#about to read 4, iclass 26, count 0 2006.229.16:20:16.55#ibcon#read 4, iclass 26, count 0 2006.229.16:20:16.55#ibcon#about to read 5, iclass 26, count 0 2006.229.16:20:16.55#ibcon#read 5, iclass 26, count 0 2006.229.16:20:16.55#ibcon#about to read 6, iclass 26, count 0 2006.229.16:20:16.55#ibcon#read 6, iclass 26, count 0 2006.229.16:20:16.55#ibcon#end of sib2, iclass 26, count 0 2006.229.16:20:16.55#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:20:16.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:20:16.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:20:16.55#ibcon#*before write, iclass 26, count 0 2006.229.16:20:16.55#ibcon#enter sib2, iclass 26, count 0 2006.229.16:20:16.55#ibcon#flushed, iclass 26, count 0 2006.229.16:20:16.55#ibcon#about to write, iclass 26, count 0 2006.229.16:20:16.55#ibcon#wrote, iclass 26, count 0 2006.229.16:20:16.55#ibcon#about to read 3, iclass 26, count 0 2006.229.16:20:16.59#ibcon#read 3, iclass 26, count 0 2006.229.16:20:16.59#ibcon#about to read 4, iclass 26, count 0 2006.229.16:20:16.59#ibcon#read 4, iclass 26, count 0 2006.229.16:20:16.59#ibcon#about to read 5, iclass 26, count 0 2006.229.16:20:16.59#ibcon#read 5, iclass 26, count 0 2006.229.16:20:16.59#ibcon#about to read 6, iclass 26, count 0 2006.229.16:20:16.59#ibcon#read 6, iclass 26, count 0 2006.229.16:20:16.59#ibcon#end of sib2, iclass 26, count 0 2006.229.16:20:16.59#ibcon#*after write, iclass 26, count 0 2006.229.16:20:16.59#ibcon#*before return 0, iclass 26, count 0 2006.229.16:20:16.59#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:16.59#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:16.59#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:20:16.59#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:20:16.59$vck44/va=2,7 2006.229.16:20:16.59#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.16:20:16.59#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.16:20:16.59#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:16.59#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:16.65#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:16.65#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:16.65#ibcon#enter wrdev, iclass 28, count 2 2006.229.16:20:16.65#ibcon#first serial, iclass 28, count 2 2006.229.16:20:16.65#ibcon#enter sib2, iclass 28, count 2 2006.229.16:20:16.65#ibcon#flushed, iclass 28, count 2 2006.229.16:20:16.65#ibcon#about to write, iclass 28, count 2 2006.229.16:20:16.65#ibcon#wrote, iclass 28, count 2 2006.229.16:20:16.65#ibcon#about to read 3, iclass 28, count 2 2006.229.16:20:16.67#ibcon#read 3, iclass 28, count 2 2006.229.16:20:16.67#ibcon#about to read 4, iclass 28, count 2 2006.229.16:20:16.67#ibcon#read 4, iclass 28, count 2 2006.229.16:20:16.67#ibcon#about to read 5, iclass 28, count 2 2006.229.16:20:16.67#ibcon#read 5, iclass 28, count 2 2006.229.16:20:16.67#ibcon#about to read 6, iclass 28, count 2 2006.229.16:20:16.67#ibcon#read 6, iclass 28, count 2 2006.229.16:20:16.67#ibcon#end of sib2, iclass 28, count 2 2006.229.16:20:16.67#ibcon#*mode == 0, iclass 28, count 2 2006.229.16:20:16.67#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.16:20:16.67#ibcon#[25=AT02-07\r\n] 2006.229.16:20:16.67#ibcon#*before write, iclass 28, count 2 2006.229.16:20:16.67#ibcon#enter sib2, iclass 28, count 2 2006.229.16:20:16.67#ibcon#flushed, iclass 28, count 2 2006.229.16:20:16.67#ibcon#about to write, iclass 28, count 2 2006.229.16:20:16.67#ibcon#wrote, iclass 28, count 2 2006.229.16:20:16.67#ibcon#about to read 3, iclass 28, count 2 2006.229.16:20:16.70#ibcon#read 3, iclass 28, count 2 2006.229.16:20:16.70#ibcon#about to read 4, iclass 28, count 2 2006.229.16:20:16.70#ibcon#read 4, iclass 28, count 2 2006.229.16:20:16.70#ibcon#about to read 5, iclass 28, count 2 2006.229.16:20:16.70#ibcon#read 5, iclass 28, count 2 2006.229.16:20:16.70#ibcon#about to read 6, iclass 28, count 2 2006.229.16:20:16.70#ibcon#read 6, iclass 28, count 2 2006.229.16:20:16.70#ibcon#end of sib2, iclass 28, count 2 2006.229.16:20:16.70#ibcon#*after write, iclass 28, count 2 2006.229.16:20:16.70#ibcon#*before return 0, iclass 28, count 2 2006.229.16:20:16.70#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:16.70#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:16.70#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.16:20:16.70#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:16.70#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:16.82#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:16.82#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:16.82#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:20:16.82#ibcon#first serial, iclass 28, count 0 2006.229.16:20:16.82#ibcon#enter sib2, iclass 28, count 0 2006.229.16:20:16.82#ibcon#flushed, iclass 28, count 0 2006.229.16:20:16.82#ibcon#about to write, iclass 28, count 0 2006.229.16:20:16.82#ibcon#wrote, iclass 28, count 0 2006.229.16:20:16.82#ibcon#about to read 3, iclass 28, count 0 2006.229.16:20:16.84#ibcon#read 3, iclass 28, count 0 2006.229.16:20:16.84#ibcon#about to read 4, iclass 28, count 0 2006.229.16:20:16.84#ibcon#read 4, iclass 28, count 0 2006.229.16:20:16.84#ibcon#about to read 5, iclass 28, count 0 2006.229.16:20:16.84#ibcon#read 5, iclass 28, count 0 2006.229.16:20:16.84#ibcon#about to read 6, iclass 28, count 0 2006.229.16:20:16.84#ibcon#read 6, iclass 28, count 0 2006.229.16:20:16.84#ibcon#end of sib2, iclass 28, count 0 2006.229.16:20:16.84#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:20:16.84#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:20:16.84#ibcon#[25=USB\r\n] 2006.229.16:20:16.84#ibcon#*before write, iclass 28, count 0 2006.229.16:20:16.84#ibcon#enter sib2, iclass 28, count 0 2006.229.16:20:16.84#ibcon#flushed, iclass 28, count 0 2006.229.16:20:16.84#ibcon#about to write, iclass 28, count 0 2006.229.16:20:16.84#ibcon#wrote, iclass 28, count 0 2006.229.16:20:16.84#ibcon#about to read 3, iclass 28, count 0 2006.229.16:20:16.87#ibcon#read 3, iclass 28, count 0 2006.229.16:20:16.87#ibcon#about to read 4, iclass 28, count 0 2006.229.16:20:16.87#ibcon#read 4, iclass 28, count 0 2006.229.16:20:16.87#ibcon#about to read 5, iclass 28, count 0 2006.229.16:20:16.87#ibcon#read 5, iclass 28, count 0 2006.229.16:20:16.87#ibcon#about to read 6, iclass 28, count 0 2006.229.16:20:16.87#ibcon#read 6, iclass 28, count 0 2006.229.16:20:16.87#ibcon#end of sib2, iclass 28, count 0 2006.229.16:20:16.87#ibcon#*after write, iclass 28, count 0 2006.229.16:20:16.87#ibcon#*before return 0, iclass 28, count 0 2006.229.16:20:16.87#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:16.87#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:16.87#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:20:16.87#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:20:16.87$vck44/valo=3,564.99 2006.229.16:20:16.87#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.16:20:16.87#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.16:20:16.87#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:16.87#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:16.87#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:16.87#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:16.87#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:20:16.87#ibcon#first serial, iclass 30, count 0 2006.229.16:20:16.87#ibcon#enter sib2, iclass 30, count 0 2006.229.16:20:16.87#ibcon#flushed, iclass 30, count 0 2006.229.16:20:16.87#ibcon#about to write, iclass 30, count 0 2006.229.16:20:16.87#ibcon#wrote, iclass 30, count 0 2006.229.16:20:16.87#ibcon#about to read 3, iclass 30, count 0 2006.229.16:20:16.89#ibcon#read 3, iclass 30, count 0 2006.229.16:20:16.89#ibcon#about to read 4, iclass 30, count 0 2006.229.16:20:16.89#ibcon#read 4, iclass 30, count 0 2006.229.16:20:16.89#ibcon#about to read 5, iclass 30, count 0 2006.229.16:20:16.89#ibcon#read 5, iclass 30, count 0 2006.229.16:20:16.89#ibcon#about to read 6, iclass 30, count 0 2006.229.16:20:16.89#ibcon#read 6, iclass 30, count 0 2006.229.16:20:16.89#ibcon#end of sib2, iclass 30, count 0 2006.229.16:20:16.89#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:20:16.89#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:20:16.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:20:16.89#ibcon#*before write, iclass 30, count 0 2006.229.16:20:16.89#ibcon#enter sib2, iclass 30, count 0 2006.229.16:20:16.89#ibcon#flushed, iclass 30, count 0 2006.229.16:20:16.89#ibcon#about to write, iclass 30, count 0 2006.229.16:20:16.89#ibcon#wrote, iclass 30, count 0 2006.229.16:20:16.89#ibcon#about to read 3, iclass 30, count 0 2006.229.16:20:16.93#ibcon#read 3, iclass 30, count 0 2006.229.16:20:16.93#ibcon#about to read 4, iclass 30, count 0 2006.229.16:20:16.93#ibcon#read 4, iclass 30, count 0 2006.229.16:20:16.93#ibcon#about to read 5, iclass 30, count 0 2006.229.16:20:16.93#ibcon#read 5, iclass 30, count 0 2006.229.16:20:16.93#ibcon#about to read 6, iclass 30, count 0 2006.229.16:20:16.93#ibcon#read 6, iclass 30, count 0 2006.229.16:20:16.93#ibcon#end of sib2, iclass 30, count 0 2006.229.16:20:16.93#ibcon#*after write, iclass 30, count 0 2006.229.16:20:16.93#ibcon#*before return 0, iclass 30, count 0 2006.229.16:20:16.93#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:16.93#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:16.93#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:20:16.93#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:20:16.93$vck44/va=3,6 2006.229.16:20:16.93#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.16:20:16.93#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.16:20:16.93#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:16.93#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:16.99#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:16.99#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:16.99#ibcon#enter wrdev, iclass 32, count 2 2006.229.16:20:16.99#ibcon#first serial, iclass 32, count 2 2006.229.16:20:16.99#ibcon#enter sib2, iclass 32, count 2 2006.229.16:20:16.99#ibcon#flushed, iclass 32, count 2 2006.229.16:20:16.99#ibcon#about to write, iclass 32, count 2 2006.229.16:20:16.99#ibcon#wrote, iclass 32, count 2 2006.229.16:20:16.99#ibcon#about to read 3, iclass 32, count 2 2006.229.16:20:17.01#ibcon#read 3, iclass 32, count 2 2006.229.16:20:17.01#ibcon#about to read 4, iclass 32, count 2 2006.229.16:20:17.01#ibcon#read 4, iclass 32, count 2 2006.229.16:20:17.01#ibcon#about to read 5, iclass 32, count 2 2006.229.16:20:17.01#ibcon#read 5, iclass 32, count 2 2006.229.16:20:17.01#ibcon#about to read 6, iclass 32, count 2 2006.229.16:20:17.01#ibcon#read 6, iclass 32, count 2 2006.229.16:20:17.01#ibcon#end of sib2, iclass 32, count 2 2006.229.16:20:17.01#ibcon#*mode == 0, iclass 32, count 2 2006.229.16:20:17.01#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.16:20:17.01#ibcon#[25=AT03-06\r\n] 2006.229.16:20:17.01#ibcon#*before write, iclass 32, count 2 2006.229.16:20:17.01#ibcon#enter sib2, iclass 32, count 2 2006.229.16:20:17.01#ibcon#flushed, iclass 32, count 2 2006.229.16:20:17.01#ibcon#about to write, iclass 32, count 2 2006.229.16:20:17.01#ibcon#wrote, iclass 32, count 2 2006.229.16:20:17.01#ibcon#about to read 3, iclass 32, count 2 2006.229.16:20:17.04#ibcon#read 3, iclass 32, count 2 2006.229.16:20:17.04#ibcon#about to read 4, iclass 32, count 2 2006.229.16:20:17.04#ibcon#read 4, iclass 32, count 2 2006.229.16:20:17.04#ibcon#about to read 5, iclass 32, count 2 2006.229.16:20:17.04#ibcon#read 5, iclass 32, count 2 2006.229.16:20:17.04#ibcon#about to read 6, iclass 32, count 2 2006.229.16:20:17.04#ibcon#read 6, iclass 32, count 2 2006.229.16:20:17.04#ibcon#end of sib2, iclass 32, count 2 2006.229.16:20:17.04#ibcon#*after write, iclass 32, count 2 2006.229.16:20:17.04#ibcon#*before return 0, iclass 32, count 2 2006.229.16:20:17.04#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:17.04#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:17.04#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.16:20:17.04#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:17.04#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:17.16#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:17.16#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:17.16#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:20:17.16#ibcon#first serial, iclass 32, count 0 2006.229.16:20:17.16#ibcon#enter sib2, iclass 32, count 0 2006.229.16:20:17.16#ibcon#flushed, iclass 32, count 0 2006.229.16:20:17.16#ibcon#about to write, iclass 32, count 0 2006.229.16:20:17.16#ibcon#wrote, iclass 32, count 0 2006.229.16:20:17.16#ibcon#about to read 3, iclass 32, count 0 2006.229.16:20:17.18#ibcon#read 3, iclass 32, count 0 2006.229.16:20:17.18#ibcon#about to read 4, iclass 32, count 0 2006.229.16:20:17.18#ibcon#read 4, iclass 32, count 0 2006.229.16:20:17.18#ibcon#about to read 5, iclass 32, count 0 2006.229.16:20:17.18#ibcon#read 5, iclass 32, count 0 2006.229.16:20:17.18#ibcon#about to read 6, iclass 32, count 0 2006.229.16:20:17.18#ibcon#read 6, iclass 32, count 0 2006.229.16:20:17.18#ibcon#end of sib2, iclass 32, count 0 2006.229.16:20:17.18#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:20:17.18#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:20:17.18#ibcon#[25=USB\r\n] 2006.229.16:20:17.18#ibcon#*before write, iclass 32, count 0 2006.229.16:20:17.18#ibcon#enter sib2, iclass 32, count 0 2006.229.16:20:17.18#ibcon#flushed, iclass 32, count 0 2006.229.16:20:17.18#ibcon#about to write, iclass 32, count 0 2006.229.16:20:17.18#ibcon#wrote, iclass 32, count 0 2006.229.16:20:17.18#ibcon#about to read 3, iclass 32, count 0 2006.229.16:20:17.21#ibcon#read 3, iclass 32, count 0 2006.229.16:20:17.21#ibcon#about to read 4, iclass 32, count 0 2006.229.16:20:17.21#ibcon#read 4, iclass 32, count 0 2006.229.16:20:17.21#ibcon#about to read 5, iclass 32, count 0 2006.229.16:20:17.21#ibcon#read 5, iclass 32, count 0 2006.229.16:20:17.21#ibcon#about to read 6, iclass 32, count 0 2006.229.16:20:17.21#ibcon#read 6, iclass 32, count 0 2006.229.16:20:17.21#ibcon#end of sib2, iclass 32, count 0 2006.229.16:20:17.21#ibcon#*after write, iclass 32, count 0 2006.229.16:20:17.21#ibcon#*before return 0, iclass 32, count 0 2006.229.16:20:17.21#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:17.21#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:17.21#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:20:17.21#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:20:17.21$vck44/valo=4,624.99 2006.229.16:20:17.21#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.16:20:17.21#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.16:20:17.21#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:17.21#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:17.21#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:17.21#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:17.21#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:20:17.21#ibcon#first serial, iclass 34, count 0 2006.229.16:20:17.21#ibcon#enter sib2, iclass 34, count 0 2006.229.16:20:17.21#ibcon#flushed, iclass 34, count 0 2006.229.16:20:17.21#ibcon#about to write, iclass 34, count 0 2006.229.16:20:17.21#ibcon#wrote, iclass 34, count 0 2006.229.16:20:17.21#ibcon#about to read 3, iclass 34, count 0 2006.229.16:20:17.23#ibcon#read 3, iclass 34, count 0 2006.229.16:20:17.23#ibcon#about to read 4, iclass 34, count 0 2006.229.16:20:17.23#ibcon#read 4, iclass 34, count 0 2006.229.16:20:17.23#ibcon#about to read 5, iclass 34, count 0 2006.229.16:20:17.23#ibcon#read 5, iclass 34, count 0 2006.229.16:20:17.23#ibcon#about to read 6, iclass 34, count 0 2006.229.16:20:17.23#ibcon#read 6, iclass 34, count 0 2006.229.16:20:17.23#ibcon#end of sib2, iclass 34, count 0 2006.229.16:20:17.23#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:20:17.23#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:20:17.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:20:17.23#ibcon#*before write, iclass 34, count 0 2006.229.16:20:17.23#ibcon#enter sib2, iclass 34, count 0 2006.229.16:20:17.23#ibcon#flushed, iclass 34, count 0 2006.229.16:20:17.23#ibcon#about to write, iclass 34, count 0 2006.229.16:20:17.23#ibcon#wrote, iclass 34, count 0 2006.229.16:20:17.23#ibcon#about to read 3, iclass 34, count 0 2006.229.16:20:17.27#ibcon#read 3, iclass 34, count 0 2006.229.16:20:17.27#ibcon#about to read 4, iclass 34, count 0 2006.229.16:20:17.27#ibcon#read 4, iclass 34, count 0 2006.229.16:20:17.27#ibcon#about to read 5, iclass 34, count 0 2006.229.16:20:17.27#ibcon#read 5, iclass 34, count 0 2006.229.16:20:17.27#ibcon#about to read 6, iclass 34, count 0 2006.229.16:20:17.27#ibcon#read 6, iclass 34, count 0 2006.229.16:20:17.27#ibcon#end of sib2, iclass 34, count 0 2006.229.16:20:17.27#ibcon#*after write, iclass 34, count 0 2006.229.16:20:17.27#ibcon#*before return 0, iclass 34, count 0 2006.229.16:20:17.27#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:17.27#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:17.27#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:20:17.27#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:20:17.27$vck44/va=4,7 2006.229.16:20:17.27#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.16:20:17.27#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.16:20:17.27#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:17.27#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:17.33#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:17.33#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:17.33#ibcon#enter wrdev, iclass 36, count 2 2006.229.16:20:17.33#ibcon#first serial, iclass 36, count 2 2006.229.16:20:17.33#ibcon#enter sib2, iclass 36, count 2 2006.229.16:20:17.33#ibcon#flushed, iclass 36, count 2 2006.229.16:20:17.33#ibcon#about to write, iclass 36, count 2 2006.229.16:20:17.33#ibcon#wrote, iclass 36, count 2 2006.229.16:20:17.33#ibcon#about to read 3, iclass 36, count 2 2006.229.16:20:17.35#ibcon#read 3, iclass 36, count 2 2006.229.16:20:17.35#ibcon#about to read 4, iclass 36, count 2 2006.229.16:20:17.35#ibcon#read 4, iclass 36, count 2 2006.229.16:20:17.35#ibcon#about to read 5, iclass 36, count 2 2006.229.16:20:17.35#ibcon#read 5, iclass 36, count 2 2006.229.16:20:17.35#ibcon#about to read 6, iclass 36, count 2 2006.229.16:20:17.35#ibcon#read 6, iclass 36, count 2 2006.229.16:20:17.35#ibcon#end of sib2, iclass 36, count 2 2006.229.16:20:17.35#ibcon#*mode == 0, iclass 36, count 2 2006.229.16:20:17.35#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.16:20:17.35#ibcon#[25=AT04-07\r\n] 2006.229.16:20:17.35#ibcon#*before write, iclass 36, count 2 2006.229.16:20:17.35#ibcon#enter sib2, iclass 36, count 2 2006.229.16:20:17.35#ibcon#flushed, iclass 36, count 2 2006.229.16:20:17.35#ibcon#about to write, iclass 36, count 2 2006.229.16:20:17.35#ibcon#wrote, iclass 36, count 2 2006.229.16:20:17.35#ibcon#about to read 3, iclass 36, count 2 2006.229.16:20:17.38#ibcon#read 3, iclass 36, count 2 2006.229.16:20:17.38#ibcon#about to read 4, iclass 36, count 2 2006.229.16:20:17.38#ibcon#read 4, iclass 36, count 2 2006.229.16:20:17.38#ibcon#about to read 5, iclass 36, count 2 2006.229.16:20:17.38#ibcon#read 5, iclass 36, count 2 2006.229.16:20:17.38#ibcon#about to read 6, iclass 36, count 2 2006.229.16:20:17.38#ibcon#read 6, iclass 36, count 2 2006.229.16:20:17.38#ibcon#end of sib2, iclass 36, count 2 2006.229.16:20:17.38#ibcon#*after write, iclass 36, count 2 2006.229.16:20:17.42#ibcon#*before return 0, iclass 36, count 2 2006.229.16:20:17.42#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:17.42#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:17.42#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.16:20:17.42#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:17.42#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:17.53#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:17.53#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:17.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:20:17.53#ibcon#first serial, iclass 36, count 0 2006.229.16:20:17.53#ibcon#enter sib2, iclass 36, count 0 2006.229.16:20:17.53#ibcon#flushed, iclass 36, count 0 2006.229.16:20:17.53#ibcon#about to write, iclass 36, count 0 2006.229.16:20:17.53#ibcon#wrote, iclass 36, count 0 2006.229.16:20:17.53#ibcon#about to read 3, iclass 36, count 0 2006.229.16:20:17.55#ibcon#read 3, iclass 36, count 0 2006.229.16:20:17.55#ibcon#about to read 4, iclass 36, count 0 2006.229.16:20:17.55#ibcon#read 4, iclass 36, count 0 2006.229.16:20:17.55#ibcon#about to read 5, iclass 36, count 0 2006.229.16:20:17.55#ibcon#read 5, iclass 36, count 0 2006.229.16:20:17.55#ibcon#about to read 6, iclass 36, count 0 2006.229.16:20:17.55#ibcon#read 6, iclass 36, count 0 2006.229.16:20:17.55#ibcon#end of sib2, iclass 36, count 0 2006.229.16:20:17.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:20:17.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:20:17.55#ibcon#[25=USB\r\n] 2006.229.16:20:17.55#ibcon#*before write, iclass 36, count 0 2006.229.16:20:17.55#ibcon#enter sib2, iclass 36, count 0 2006.229.16:20:17.55#ibcon#flushed, iclass 36, count 0 2006.229.16:20:17.55#ibcon#about to write, iclass 36, count 0 2006.229.16:20:17.55#ibcon#wrote, iclass 36, count 0 2006.229.16:20:17.55#ibcon#about to read 3, iclass 36, count 0 2006.229.16:20:17.58#ibcon#read 3, iclass 36, count 0 2006.229.16:20:17.58#ibcon#about to read 4, iclass 36, count 0 2006.229.16:20:17.58#ibcon#read 4, iclass 36, count 0 2006.229.16:20:17.58#ibcon#about to read 5, iclass 36, count 0 2006.229.16:20:17.58#ibcon#read 5, iclass 36, count 0 2006.229.16:20:17.58#ibcon#about to read 6, iclass 36, count 0 2006.229.16:20:17.58#ibcon#read 6, iclass 36, count 0 2006.229.16:20:17.58#ibcon#end of sib2, iclass 36, count 0 2006.229.16:20:17.58#ibcon#*after write, iclass 36, count 0 2006.229.16:20:17.58#ibcon#*before return 0, iclass 36, count 0 2006.229.16:20:17.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:17.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:17.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:20:17.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:20:17.58$vck44/valo=5,734.99 2006.229.16:20:17.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.16:20:17.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.16:20:17.58#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:17.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:17.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:17.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:17.58#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:20:17.58#ibcon#first serial, iclass 38, count 0 2006.229.16:20:17.58#ibcon#enter sib2, iclass 38, count 0 2006.229.16:20:17.58#ibcon#flushed, iclass 38, count 0 2006.229.16:20:17.58#ibcon#about to write, iclass 38, count 0 2006.229.16:20:17.58#ibcon#wrote, iclass 38, count 0 2006.229.16:20:17.58#ibcon#about to read 3, iclass 38, count 0 2006.229.16:20:17.60#ibcon#read 3, iclass 38, count 0 2006.229.16:20:17.60#ibcon#about to read 4, iclass 38, count 0 2006.229.16:20:17.60#ibcon#read 4, iclass 38, count 0 2006.229.16:20:17.60#ibcon#about to read 5, iclass 38, count 0 2006.229.16:20:17.60#ibcon#read 5, iclass 38, count 0 2006.229.16:20:17.60#ibcon#about to read 6, iclass 38, count 0 2006.229.16:20:17.60#ibcon#read 6, iclass 38, count 0 2006.229.16:20:17.60#ibcon#end of sib2, iclass 38, count 0 2006.229.16:20:17.60#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:20:17.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:20:17.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:20:17.60#ibcon#*before write, iclass 38, count 0 2006.229.16:20:17.60#ibcon#enter sib2, iclass 38, count 0 2006.229.16:20:17.60#ibcon#flushed, iclass 38, count 0 2006.229.16:20:17.60#ibcon#about to write, iclass 38, count 0 2006.229.16:20:17.60#ibcon#wrote, iclass 38, count 0 2006.229.16:20:17.60#ibcon#about to read 3, iclass 38, count 0 2006.229.16:20:17.64#ibcon#read 3, iclass 38, count 0 2006.229.16:20:17.64#ibcon#about to read 4, iclass 38, count 0 2006.229.16:20:17.64#ibcon#read 4, iclass 38, count 0 2006.229.16:20:17.64#ibcon#about to read 5, iclass 38, count 0 2006.229.16:20:17.64#ibcon#read 5, iclass 38, count 0 2006.229.16:20:17.64#ibcon#about to read 6, iclass 38, count 0 2006.229.16:20:17.64#ibcon#read 6, iclass 38, count 0 2006.229.16:20:17.64#ibcon#end of sib2, iclass 38, count 0 2006.229.16:20:17.64#ibcon#*after write, iclass 38, count 0 2006.229.16:20:17.64#ibcon#*before return 0, iclass 38, count 0 2006.229.16:20:17.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:17.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:17.64#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:20:17.64#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:20:17.64$vck44/va=5,4 2006.229.16:20:17.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.16:20:17.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.16:20:17.64#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:17.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:17.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:17.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:17.70#ibcon#enter wrdev, iclass 40, count 2 2006.229.16:20:17.70#ibcon#first serial, iclass 40, count 2 2006.229.16:20:17.70#ibcon#enter sib2, iclass 40, count 2 2006.229.16:20:17.70#ibcon#flushed, iclass 40, count 2 2006.229.16:20:17.70#ibcon#about to write, iclass 40, count 2 2006.229.16:20:17.70#ibcon#wrote, iclass 40, count 2 2006.229.16:20:17.70#ibcon#about to read 3, iclass 40, count 2 2006.229.16:20:17.72#ibcon#read 3, iclass 40, count 2 2006.229.16:20:17.72#ibcon#about to read 4, iclass 40, count 2 2006.229.16:20:17.72#ibcon#read 4, iclass 40, count 2 2006.229.16:20:17.72#ibcon#about to read 5, iclass 40, count 2 2006.229.16:20:17.72#ibcon#read 5, iclass 40, count 2 2006.229.16:20:17.72#ibcon#about to read 6, iclass 40, count 2 2006.229.16:20:17.72#ibcon#read 6, iclass 40, count 2 2006.229.16:20:17.72#ibcon#end of sib2, iclass 40, count 2 2006.229.16:20:17.72#ibcon#*mode == 0, iclass 40, count 2 2006.229.16:20:17.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.16:20:17.72#ibcon#[25=AT05-04\r\n] 2006.229.16:20:17.72#ibcon#*before write, iclass 40, count 2 2006.229.16:20:17.72#ibcon#enter sib2, iclass 40, count 2 2006.229.16:20:17.72#ibcon#flushed, iclass 40, count 2 2006.229.16:20:17.72#ibcon#about to write, iclass 40, count 2 2006.229.16:20:17.72#ibcon#wrote, iclass 40, count 2 2006.229.16:20:17.72#ibcon#about to read 3, iclass 40, count 2 2006.229.16:20:17.75#ibcon#read 3, iclass 40, count 2 2006.229.16:20:17.75#ibcon#about to read 4, iclass 40, count 2 2006.229.16:20:17.75#ibcon#read 4, iclass 40, count 2 2006.229.16:20:17.75#ibcon#about to read 5, iclass 40, count 2 2006.229.16:20:17.75#ibcon#read 5, iclass 40, count 2 2006.229.16:20:17.75#ibcon#about to read 6, iclass 40, count 2 2006.229.16:20:17.75#ibcon#read 6, iclass 40, count 2 2006.229.16:20:17.75#ibcon#end of sib2, iclass 40, count 2 2006.229.16:20:17.75#ibcon#*after write, iclass 40, count 2 2006.229.16:20:17.75#ibcon#*before return 0, iclass 40, count 2 2006.229.16:20:17.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:17.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:17.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.16:20:17.75#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:17.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:17.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:17.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:17.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:20:17.87#ibcon#first serial, iclass 40, count 0 2006.229.16:20:17.87#ibcon#enter sib2, iclass 40, count 0 2006.229.16:20:17.87#ibcon#flushed, iclass 40, count 0 2006.229.16:20:17.87#ibcon#about to write, iclass 40, count 0 2006.229.16:20:17.87#ibcon#wrote, iclass 40, count 0 2006.229.16:20:17.87#ibcon#about to read 3, iclass 40, count 0 2006.229.16:20:17.89#ibcon#read 3, iclass 40, count 0 2006.229.16:20:17.89#ibcon#about to read 4, iclass 40, count 0 2006.229.16:20:17.89#ibcon#read 4, iclass 40, count 0 2006.229.16:20:17.89#ibcon#about to read 5, iclass 40, count 0 2006.229.16:20:17.89#ibcon#read 5, iclass 40, count 0 2006.229.16:20:17.89#ibcon#about to read 6, iclass 40, count 0 2006.229.16:20:17.89#ibcon#read 6, iclass 40, count 0 2006.229.16:20:17.89#ibcon#end of sib2, iclass 40, count 0 2006.229.16:20:17.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:20:17.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:20:17.89#ibcon#[25=USB\r\n] 2006.229.16:20:17.89#ibcon#*before write, iclass 40, count 0 2006.229.16:20:17.89#ibcon#enter sib2, iclass 40, count 0 2006.229.16:20:17.89#ibcon#flushed, iclass 40, count 0 2006.229.16:20:17.89#ibcon#about to write, iclass 40, count 0 2006.229.16:20:17.89#ibcon#wrote, iclass 40, count 0 2006.229.16:20:17.89#ibcon#about to read 3, iclass 40, count 0 2006.229.16:20:17.92#ibcon#read 3, iclass 40, count 0 2006.229.16:20:17.92#ibcon#about to read 4, iclass 40, count 0 2006.229.16:20:17.92#ibcon#read 4, iclass 40, count 0 2006.229.16:20:17.92#ibcon#about to read 5, iclass 40, count 0 2006.229.16:20:17.92#ibcon#read 5, iclass 40, count 0 2006.229.16:20:17.92#ibcon#about to read 6, iclass 40, count 0 2006.229.16:20:17.92#ibcon#read 6, iclass 40, count 0 2006.229.16:20:17.92#ibcon#end of sib2, iclass 40, count 0 2006.229.16:20:17.92#ibcon#*after write, iclass 40, count 0 2006.229.16:20:17.92#ibcon#*before return 0, iclass 40, count 0 2006.229.16:20:17.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:17.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:17.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:20:17.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:20:17.92$vck44/valo=6,814.99 2006.229.16:20:17.92#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.16:20:17.92#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.16:20:17.92#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:17.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:17.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:17.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:17.92#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:20:17.92#ibcon#first serial, iclass 4, count 0 2006.229.16:20:17.92#ibcon#enter sib2, iclass 4, count 0 2006.229.16:20:17.92#ibcon#flushed, iclass 4, count 0 2006.229.16:20:17.92#ibcon#about to write, iclass 4, count 0 2006.229.16:20:17.92#ibcon#wrote, iclass 4, count 0 2006.229.16:20:17.92#ibcon#about to read 3, iclass 4, count 0 2006.229.16:20:17.94#ibcon#read 3, iclass 4, count 0 2006.229.16:20:17.94#ibcon#about to read 4, iclass 4, count 0 2006.229.16:20:17.94#ibcon#read 4, iclass 4, count 0 2006.229.16:20:17.94#ibcon#about to read 5, iclass 4, count 0 2006.229.16:20:17.94#ibcon#read 5, iclass 4, count 0 2006.229.16:20:17.94#ibcon#about to read 6, iclass 4, count 0 2006.229.16:20:17.94#ibcon#read 6, iclass 4, count 0 2006.229.16:20:17.94#ibcon#end of sib2, iclass 4, count 0 2006.229.16:20:17.94#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:20:17.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:20:17.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:20:17.94#ibcon#*before write, iclass 4, count 0 2006.229.16:20:17.94#ibcon#enter sib2, iclass 4, count 0 2006.229.16:20:17.94#ibcon#flushed, iclass 4, count 0 2006.229.16:20:17.94#ibcon#about to write, iclass 4, count 0 2006.229.16:20:17.94#ibcon#wrote, iclass 4, count 0 2006.229.16:20:17.94#ibcon#about to read 3, iclass 4, count 0 2006.229.16:20:17.98#ibcon#read 3, iclass 4, count 0 2006.229.16:20:17.98#ibcon#about to read 4, iclass 4, count 0 2006.229.16:20:17.98#ibcon#read 4, iclass 4, count 0 2006.229.16:20:17.98#ibcon#about to read 5, iclass 4, count 0 2006.229.16:20:17.98#ibcon#read 5, iclass 4, count 0 2006.229.16:20:17.98#ibcon#about to read 6, iclass 4, count 0 2006.229.16:20:17.98#ibcon#read 6, iclass 4, count 0 2006.229.16:20:17.98#ibcon#end of sib2, iclass 4, count 0 2006.229.16:20:17.98#ibcon#*after write, iclass 4, count 0 2006.229.16:20:17.98#ibcon#*before return 0, iclass 4, count 0 2006.229.16:20:17.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:17.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:17.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:20:17.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:20:17.98$vck44/va=6,4 2006.229.16:20:17.98#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.16:20:17.98#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.16:20:17.98#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:17.98#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:18.04#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:18.04#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:18.04#ibcon#enter wrdev, iclass 6, count 2 2006.229.16:20:18.04#ibcon#first serial, iclass 6, count 2 2006.229.16:20:18.04#ibcon#enter sib2, iclass 6, count 2 2006.229.16:20:18.04#ibcon#flushed, iclass 6, count 2 2006.229.16:20:18.04#ibcon#about to write, iclass 6, count 2 2006.229.16:20:18.04#ibcon#wrote, iclass 6, count 2 2006.229.16:20:18.04#ibcon#about to read 3, iclass 6, count 2 2006.229.16:20:18.06#ibcon#read 3, iclass 6, count 2 2006.229.16:20:18.06#ibcon#about to read 4, iclass 6, count 2 2006.229.16:20:18.06#ibcon#read 4, iclass 6, count 2 2006.229.16:20:18.06#ibcon#about to read 5, iclass 6, count 2 2006.229.16:20:18.06#ibcon#read 5, iclass 6, count 2 2006.229.16:20:18.06#ibcon#about to read 6, iclass 6, count 2 2006.229.16:20:18.06#ibcon#read 6, iclass 6, count 2 2006.229.16:20:18.06#ibcon#end of sib2, iclass 6, count 2 2006.229.16:20:18.06#ibcon#*mode == 0, iclass 6, count 2 2006.229.16:20:18.06#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.16:20:18.06#ibcon#[25=AT06-04\r\n] 2006.229.16:20:18.06#ibcon#*before write, iclass 6, count 2 2006.229.16:20:18.06#ibcon#enter sib2, iclass 6, count 2 2006.229.16:20:18.06#ibcon#flushed, iclass 6, count 2 2006.229.16:20:18.06#ibcon#about to write, iclass 6, count 2 2006.229.16:20:18.06#ibcon#wrote, iclass 6, count 2 2006.229.16:20:18.06#ibcon#about to read 3, iclass 6, count 2 2006.229.16:20:18.09#ibcon#read 3, iclass 6, count 2 2006.229.16:20:18.09#ibcon#about to read 4, iclass 6, count 2 2006.229.16:20:18.09#ibcon#read 4, iclass 6, count 2 2006.229.16:20:18.09#ibcon#about to read 5, iclass 6, count 2 2006.229.16:20:18.09#ibcon#read 5, iclass 6, count 2 2006.229.16:20:18.09#ibcon#about to read 6, iclass 6, count 2 2006.229.16:20:18.09#ibcon#read 6, iclass 6, count 2 2006.229.16:20:18.09#ibcon#end of sib2, iclass 6, count 2 2006.229.16:20:18.09#ibcon#*after write, iclass 6, count 2 2006.229.16:20:18.09#ibcon#*before return 0, iclass 6, count 2 2006.229.16:20:18.09#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:18.09#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:18.09#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.16:20:18.09#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:18.09#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:18.21#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:18.21#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:18.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:20:18.21#ibcon#first serial, iclass 6, count 0 2006.229.16:20:18.21#ibcon#enter sib2, iclass 6, count 0 2006.229.16:20:18.21#ibcon#flushed, iclass 6, count 0 2006.229.16:20:18.21#ibcon#about to write, iclass 6, count 0 2006.229.16:20:18.21#ibcon#wrote, iclass 6, count 0 2006.229.16:20:18.21#ibcon#about to read 3, iclass 6, count 0 2006.229.16:20:18.23#ibcon#read 3, iclass 6, count 0 2006.229.16:20:18.23#ibcon#about to read 4, iclass 6, count 0 2006.229.16:20:18.23#ibcon#read 4, iclass 6, count 0 2006.229.16:20:18.23#ibcon#about to read 5, iclass 6, count 0 2006.229.16:20:18.23#ibcon#read 5, iclass 6, count 0 2006.229.16:20:18.23#ibcon#about to read 6, iclass 6, count 0 2006.229.16:20:18.23#ibcon#read 6, iclass 6, count 0 2006.229.16:20:18.23#ibcon#end of sib2, iclass 6, count 0 2006.229.16:20:18.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:20:18.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:20:18.23#ibcon#[25=USB\r\n] 2006.229.16:20:18.23#ibcon#*before write, iclass 6, count 0 2006.229.16:20:18.23#ibcon#enter sib2, iclass 6, count 0 2006.229.16:20:18.23#ibcon#flushed, iclass 6, count 0 2006.229.16:20:18.23#ibcon#about to write, iclass 6, count 0 2006.229.16:20:18.23#ibcon#wrote, iclass 6, count 0 2006.229.16:20:18.23#ibcon#about to read 3, iclass 6, count 0 2006.229.16:20:18.26#ibcon#read 3, iclass 6, count 0 2006.229.16:20:18.26#ibcon#about to read 4, iclass 6, count 0 2006.229.16:20:18.26#ibcon#read 4, iclass 6, count 0 2006.229.16:20:18.26#ibcon#about to read 5, iclass 6, count 0 2006.229.16:20:18.26#ibcon#read 5, iclass 6, count 0 2006.229.16:20:18.26#ibcon#about to read 6, iclass 6, count 0 2006.229.16:20:18.26#ibcon#read 6, iclass 6, count 0 2006.229.16:20:18.26#ibcon#end of sib2, iclass 6, count 0 2006.229.16:20:18.26#ibcon#*after write, iclass 6, count 0 2006.229.16:20:18.26#ibcon#*before return 0, iclass 6, count 0 2006.229.16:20:18.26#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:18.26#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:18.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:20:18.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:20:18.26$vck44/valo=7,864.99 2006.229.16:20:18.26#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.16:20:18.26#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.16:20:18.26#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:18.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:18.26#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:18.26#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:18.26#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:20:18.26#ibcon#first serial, iclass 10, count 0 2006.229.16:20:18.26#ibcon#enter sib2, iclass 10, count 0 2006.229.16:20:18.26#ibcon#flushed, iclass 10, count 0 2006.229.16:20:18.26#ibcon#about to write, iclass 10, count 0 2006.229.16:20:18.26#ibcon#wrote, iclass 10, count 0 2006.229.16:20:18.26#ibcon#about to read 3, iclass 10, count 0 2006.229.16:20:18.28#ibcon#read 3, iclass 10, count 0 2006.229.16:20:18.28#ibcon#about to read 4, iclass 10, count 0 2006.229.16:20:18.28#ibcon#read 4, iclass 10, count 0 2006.229.16:20:18.28#ibcon#about to read 5, iclass 10, count 0 2006.229.16:20:18.28#ibcon#read 5, iclass 10, count 0 2006.229.16:20:18.28#ibcon#about to read 6, iclass 10, count 0 2006.229.16:20:18.28#ibcon#read 6, iclass 10, count 0 2006.229.16:20:18.28#ibcon#end of sib2, iclass 10, count 0 2006.229.16:20:18.28#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:20:18.28#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:20:18.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:20:18.28#ibcon#*before write, iclass 10, count 0 2006.229.16:20:18.28#ibcon#enter sib2, iclass 10, count 0 2006.229.16:20:18.28#ibcon#flushed, iclass 10, count 0 2006.229.16:20:18.28#ibcon#about to write, iclass 10, count 0 2006.229.16:20:18.28#ibcon#wrote, iclass 10, count 0 2006.229.16:20:18.28#ibcon#about to read 3, iclass 10, count 0 2006.229.16:20:18.32#ibcon#read 3, iclass 10, count 0 2006.229.16:20:18.32#ibcon#about to read 4, iclass 10, count 0 2006.229.16:20:18.32#ibcon#read 4, iclass 10, count 0 2006.229.16:20:18.32#ibcon#about to read 5, iclass 10, count 0 2006.229.16:20:18.32#ibcon#read 5, iclass 10, count 0 2006.229.16:20:18.32#ibcon#about to read 6, iclass 10, count 0 2006.229.16:20:18.32#ibcon#read 6, iclass 10, count 0 2006.229.16:20:18.32#ibcon#end of sib2, iclass 10, count 0 2006.229.16:20:18.32#ibcon#*after write, iclass 10, count 0 2006.229.16:20:18.32#ibcon#*before return 0, iclass 10, count 0 2006.229.16:20:18.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:18.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:18.32#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:20:18.32#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:20:18.32$vck44/va=7,5 2006.229.16:20:18.32#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.16:20:18.32#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.16:20:18.32#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:18.32#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:18.38#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:18.38#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:18.38#ibcon#enter wrdev, iclass 12, count 2 2006.229.16:20:18.38#ibcon#first serial, iclass 12, count 2 2006.229.16:20:18.38#ibcon#enter sib2, iclass 12, count 2 2006.229.16:20:18.38#ibcon#flushed, iclass 12, count 2 2006.229.16:20:18.38#ibcon#about to write, iclass 12, count 2 2006.229.16:20:18.38#ibcon#wrote, iclass 12, count 2 2006.229.16:20:18.38#ibcon#about to read 3, iclass 12, count 2 2006.229.16:20:18.40#ibcon#read 3, iclass 12, count 2 2006.229.16:20:18.40#ibcon#about to read 4, iclass 12, count 2 2006.229.16:20:18.40#ibcon#read 4, iclass 12, count 2 2006.229.16:20:18.40#ibcon#about to read 5, iclass 12, count 2 2006.229.16:20:18.40#ibcon#read 5, iclass 12, count 2 2006.229.16:20:18.40#ibcon#about to read 6, iclass 12, count 2 2006.229.16:20:18.40#ibcon#read 6, iclass 12, count 2 2006.229.16:20:18.40#ibcon#end of sib2, iclass 12, count 2 2006.229.16:20:18.40#ibcon#*mode == 0, iclass 12, count 2 2006.229.16:20:18.40#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.16:20:18.40#ibcon#[25=AT07-05\r\n] 2006.229.16:20:18.40#ibcon#*before write, iclass 12, count 2 2006.229.16:20:18.40#ibcon#enter sib2, iclass 12, count 2 2006.229.16:20:18.40#ibcon#flushed, iclass 12, count 2 2006.229.16:20:18.40#ibcon#about to write, iclass 12, count 2 2006.229.16:20:18.40#ibcon#wrote, iclass 12, count 2 2006.229.16:20:18.40#ibcon#about to read 3, iclass 12, count 2 2006.229.16:20:18.43#ibcon#read 3, iclass 12, count 2 2006.229.16:20:18.43#ibcon#about to read 4, iclass 12, count 2 2006.229.16:20:18.43#ibcon#read 4, iclass 12, count 2 2006.229.16:20:18.43#ibcon#about to read 5, iclass 12, count 2 2006.229.16:20:18.43#ibcon#read 5, iclass 12, count 2 2006.229.16:20:18.43#ibcon#about to read 6, iclass 12, count 2 2006.229.16:20:18.43#ibcon#read 6, iclass 12, count 2 2006.229.16:20:18.43#ibcon#end of sib2, iclass 12, count 2 2006.229.16:20:18.43#ibcon#*after write, iclass 12, count 2 2006.229.16:20:18.43#ibcon#*before return 0, iclass 12, count 2 2006.229.16:20:18.43#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:18.43#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:18.43#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.16:20:18.43#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:18.43#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:18.55#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:18.55#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:18.55#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:20:18.55#ibcon#first serial, iclass 12, count 0 2006.229.16:20:18.55#ibcon#enter sib2, iclass 12, count 0 2006.229.16:20:18.55#ibcon#flushed, iclass 12, count 0 2006.229.16:20:18.55#ibcon#about to write, iclass 12, count 0 2006.229.16:20:18.55#ibcon#wrote, iclass 12, count 0 2006.229.16:20:18.55#ibcon#about to read 3, iclass 12, count 0 2006.229.16:20:18.57#ibcon#read 3, iclass 12, count 0 2006.229.16:20:18.57#ibcon#about to read 4, iclass 12, count 0 2006.229.16:20:18.57#ibcon#read 4, iclass 12, count 0 2006.229.16:20:18.57#ibcon#about to read 5, iclass 12, count 0 2006.229.16:20:18.57#ibcon#read 5, iclass 12, count 0 2006.229.16:20:18.57#ibcon#about to read 6, iclass 12, count 0 2006.229.16:20:18.57#ibcon#read 6, iclass 12, count 0 2006.229.16:20:18.57#ibcon#end of sib2, iclass 12, count 0 2006.229.16:20:18.57#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:20:18.57#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:20:18.57#ibcon#[25=USB\r\n] 2006.229.16:20:18.57#ibcon#*before write, iclass 12, count 0 2006.229.16:20:18.57#ibcon#enter sib2, iclass 12, count 0 2006.229.16:20:18.57#ibcon#flushed, iclass 12, count 0 2006.229.16:20:18.57#ibcon#about to write, iclass 12, count 0 2006.229.16:20:18.57#ibcon#wrote, iclass 12, count 0 2006.229.16:20:18.57#ibcon#about to read 3, iclass 12, count 0 2006.229.16:20:18.60#ibcon#read 3, iclass 12, count 0 2006.229.16:20:18.60#ibcon#about to read 4, iclass 12, count 0 2006.229.16:20:18.60#ibcon#read 4, iclass 12, count 0 2006.229.16:20:18.60#ibcon#about to read 5, iclass 12, count 0 2006.229.16:20:18.60#ibcon#read 5, iclass 12, count 0 2006.229.16:20:18.60#ibcon#about to read 6, iclass 12, count 0 2006.229.16:20:18.60#ibcon#read 6, iclass 12, count 0 2006.229.16:20:18.60#ibcon#end of sib2, iclass 12, count 0 2006.229.16:20:18.60#ibcon#*after write, iclass 12, count 0 2006.229.16:20:18.60#ibcon#*before return 0, iclass 12, count 0 2006.229.16:20:18.60#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:18.60#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:18.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:20:18.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:20:18.60$vck44/valo=8,884.99 2006.229.16:20:18.60#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.16:20:18.60#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.16:20:18.60#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:18.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:18.60#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:18.60#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:18.60#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:20:18.60#ibcon#first serial, iclass 14, count 0 2006.229.16:20:18.60#ibcon#enter sib2, iclass 14, count 0 2006.229.16:20:18.60#ibcon#flushed, iclass 14, count 0 2006.229.16:20:18.60#ibcon#about to write, iclass 14, count 0 2006.229.16:20:18.60#ibcon#wrote, iclass 14, count 0 2006.229.16:20:18.60#ibcon#about to read 3, iclass 14, count 0 2006.229.16:20:18.62#ibcon#read 3, iclass 14, count 0 2006.229.16:20:18.62#ibcon#about to read 4, iclass 14, count 0 2006.229.16:20:18.62#ibcon#read 4, iclass 14, count 0 2006.229.16:20:18.62#ibcon#about to read 5, iclass 14, count 0 2006.229.16:20:18.62#ibcon#read 5, iclass 14, count 0 2006.229.16:20:18.62#ibcon#about to read 6, iclass 14, count 0 2006.229.16:20:18.62#ibcon#read 6, iclass 14, count 0 2006.229.16:20:18.62#ibcon#end of sib2, iclass 14, count 0 2006.229.16:20:18.62#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:20:18.62#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:20:18.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:20:18.62#ibcon#*before write, iclass 14, count 0 2006.229.16:20:18.62#ibcon#enter sib2, iclass 14, count 0 2006.229.16:20:18.62#ibcon#flushed, iclass 14, count 0 2006.229.16:20:18.62#ibcon#about to write, iclass 14, count 0 2006.229.16:20:18.62#ibcon#wrote, iclass 14, count 0 2006.229.16:20:18.62#ibcon#about to read 3, iclass 14, count 0 2006.229.16:20:18.66#ibcon#read 3, iclass 14, count 0 2006.229.16:20:18.66#ibcon#about to read 4, iclass 14, count 0 2006.229.16:20:18.66#ibcon#read 4, iclass 14, count 0 2006.229.16:20:18.66#ibcon#about to read 5, iclass 14, count 0 2006.229.16:20:18.66#ibcon#read 5, iclass 14, count 0 2006.229.16:20:18.66#ibcon#about to read 6, iclass 14, count 0 2006.229.16:20:18.66#ibcon#read 6, iclass 14, count 0 2006.229.16:20:18.66#ibcon#end of sib2, iclass 14, count 0 2006.229.16:20:18.66#ibcon#*after write, iclass 14, count 0 2006.229.16:20:18.66#ibcon#*before return 0, iclass 14, count 0 2006.229.16:20:18.66#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:18.66#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:18.66#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:20:18.66#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:20:18.66$vck44/va=8,6 2006.229.16:20:18.66#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.16:20:18.66#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.16:20:18.66#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:18.66#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:20:18.72#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:20:18.72#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:20:18.72#ibcon#enter wrdev, iclass 16, count 2 2006.229.16:20:18.72#ibcon#first serial, iclass 16, count 2 2006.229.16:20:18.72#ibcon#enter sib2, iclass 16, count 2 2006.229.16:20:18.72#ibcon#flushed, iclass 16, count 2 2006.229.16:20:18.72#ibcon#about to write, iclass 16, count 2 2006.229.16:20:18.72#ibcon#wrote, iclass 16, count 2 2006.229.16:20:18.72#ibcon#about to read 3, iclass 16, count 2 2006.229.16:20:18.74#ibcon#read 3, iclass 16, count 2 2006.229.16:20:18.74#ibcon#about to read 4, iclass 16, count 2 2006.229.16:20:18.74#ibcon#read 4, iclass 16, count 2 2006.229.16:20:18.74#ibcon#about to read 5, iclass 16, count 2 2006.229.16:20:18.74#ibcon#read 5, iclass 16, count 2 2006.229.16:20:18.74#ibcon#about to read 6, iclass 16, count 2 2006.229.16:20:18.74#ibcon#read 6, iclass 16, count 2 2006.229.16:20:18.74#ibcon#end of sib2, iclass 16, count 2 2006.229.16:20:18.74#ibcon#*mode == 0, iclass 16, count 2 2006.229.16:20:18.74#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.16:20:18.74#ibcon#[25=AT08-06\r\n] 2006.229.16:20:18.74#ibcon#*before write, iclass 16, count 2 2006.229.16:20:18.74#ibcon#enter sib2, iclass 16, count 2 2006.229.16:20:18.74#ibcon#flushed, iclass 16, count 2 2006.229.16:20:18.74#ibcon#about to write, iclass 16, count 2 2006.229.16:20:18.74#ibcon#wrote, iclass 16, count 2 2006.229.16:20:18.74#ibcon#about to read 3, iclass 16, count 2 2006.229.16:20:18.77#ibcon#read 3, iclass 16, count 2 2006.229.16:20:18.77#ibcon#about to read 4, iclass 16, count 2 2006.229.16:20:18.77#ibcon#read 4, iclass 16, count 2 2006.229.16:20:18.77#ibcon#about to read 5, iclass 16, count 2 2006.229.16:20:18.77#ibcon#read 5, iclass 16, count 2 2006.229.16:20:18.77#ibcon#about to read 6, iclass 16, count 2 2006.229.16:20:18.77#ibcon#read 6, iclass 16, count 2 2006.229.16:20:18.77#ibcon#end of sib2, iclass 16, count 2 2006.229.16:20:18.77#ibcon#*after write, iclass 16, count 2 2006.229.16:20:18.77#ibcon#*before return 0, iclass 16, count 2 2006.229.16:20:18.77#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:20:18.77#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:20:18.77#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.16:20:18.77#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:18.77#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:20:18.89#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:20:18.89#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:20:18.89#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:20:18.89#ibcon#first serial, iclass 16, count 0 2006.229.16:20:18.89#ibcon#enter sib2, iclass 16, count 0 2006.229.16:20:18.89#ibcon#flushed, iclass 16, count 0 2006.229.16:20:18.89#ibcon#about to write, iclass 16, count 0 2006.229.16:20:18.89#ibcon#wrote, iclass 16, count 0 2006.229.16:20:18.89#ibcon#about to read 3, iclass 16, count 0 2006.229.16:20:18.91#ibcon#read 3, iclass 16, count 0 2006.229.16:20:18.91#ibcon#about to read 4, iclass 16, count 0 2006.229.16:20:18.91#ibcon#read 4, iclass 16, count 0 2006.229.16:20:18.91#ibcon#about to read 5, iclass 16, count 0 2006.229.16:20:18.91#ibcon#read 5, iclass 16, count 0 2006.229.16:20:18.91#ibcon#about to read 6, iclass 16, count 0 2006.229.16:20:18.91#ibcon#read 6, iclass 16, count 0 2006.229.16:20:18.91#ibcon#end of sib2, iclass 16, count 0 2006.229.16:20:18.91#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:20:18.91#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:20:18.91#ibcon#[25=USB\r\n] 2006.229.16:20:18.91#ibcon#*before write, iclass 16, count 0 2006.229.16:20:18.91#ibcon#enter sib2, iclass 16, count 0 2006.229.16:20:18.91#ibcon#flushed, iclass 16, count 0 2006.229.16:20:18.91#ibcon#about to write, iclass 16, count 0 2006.229.16:20:18.91#ibcon#wrote, iclass 16, count 0 2006.229.16:20:18.91#ibcon#about to read 3, iclass 16, count 0 2006.229.16:20:18.94#ibcon#read 3, iclass 16, count 0 2006.229.16:20:18.94#ibcon#about to read 4, iclass 16, count 0 2006.229.16:20:18.94#ibcon#read 4, iclass 16, count 0 2006.229.16:20:18.94#ibcon#about to read 5, iclass 16, count 0 2006.229.16:20:18.94#ibcon#read 5, iclass 16, count 0 2006.229.16:20:18.94#ibcon#about to read 6, iclass 16, count 0 2006.229.16:20:18.94#ibcon#read 6, iclass 16, count 0 2006.229.16:20:18.94#ibcon#end of sib2, iclass 16, count 0 2006.229.16:20:18.94#ibcon#*after write, iclass 16, count 0 2006.229.16:20:18.94#ibcon#*before return 0, iclass 16, count 0 2006.229.16:20:18.94#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:20:18.94#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:20:18.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:20:18.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:20:18.94$vck44/vblo=1,629.99 2006.229.16:20:18.94#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.16:20:18.94#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.16:20:18.94#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:18.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:20:18.94#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:20:18.94#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:20:18.94#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:20:18.94#ibcon#first serial, iclass 18, count 0 2006.229.16:20:18.94#ibcon#enter sib2, iclass 18, count 0 2006.229.16:20:18.94#ibcon#flushed, iclass 18, count 0 2006.229.16:20:18.94#ibcon#about to write, iclass 18, count 0 2006.229.16:20:18.94#ibcon#wrote, iclass 18, count 0 2006.229.16:20:18.94#ibcon#about to read 3, iclass 18, count 0 2006.229.16:20:18.96#ibcon#read 3, iclass 18, count 0 2006.229.16:20:18.96#ibcon#about to read 4, iclass 18, count 0 2006.229.16:20:18.96#ibcon#read 4, iclass 18, count 0 2006.229.16:20:18.96#ibcon#about to read 5, iclass 18, count 0 2006.229.16:20:18.96#ibcon#read 5, iclass 18, count 0 2006.229.16:20:18.96#ibcon#about to read 6, iclass 18, count 0 2006.229.16:20:18.96#ibcon#read 6, iclass 18, count 0 2006.229.16:20:18.96#ibcon#end of sib2, iclass 18, count 0 2006.229.16:20:18.96#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:20:18.96#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:20:18.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:20:18.96#ibcon#*before write, iclass 18, count 0 2006.229.16:20:18.96#ibcon#enter sib2, iclass 18, count 0 2006.229.16:20:18.96#ibcon#flushed, iclass 18, count 0 2006.229.16:20:18.96#ibcon#about to write, iclass 18, count 0 2006.229.16:20:18.96#ibcon#wrote, iclass 18, count 0 2006.229.16:20:18.96#ibcon#about to read 3, iclass 18, count 0 2006.229.16:20:19.00#ibcon#read 3, iclass 18, count 0 2006.229.16:20:19.00#ibcon#about to read 4, iclass 18, count 0 2006.229.16:20:19.00#ibcon#read 4, iclass 18, count 0 2006.229.16:20:19.00#ibcon#about to read 5, iclass 18, count 0 2006.229.16:20:19.00#ibcon#read 5, iclass 18, count 0 2006.229.16:20:19.00#ibcon#about to read 6, iclass 18, count 0 2006.229.16:20:19.00#ibcon#read 6, iclass 18, count 0 2006.229.16:20:19.00#ibcon#end of sib2, iclass 18, count 0 2006.229.16:20:19.00#ibcon#*after write, iclass 18, count 0 2006.229.16:20:19.00#ibcon#*before return 0, iclass 18, count 0 2006.229.16:20:19.00#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:20:19.00#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:20:19.00#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:20:19.00#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:20:19.00$vck44/vb=1,4 2006.229.16:20:19.00#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.16:20:19.00#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.16:20:19.00#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:19.00#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:20:19.00#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:20:19.00#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:20:19.00#ibcon#enter wrdev, iclass 20, count 2 2006.229.16:20:19.00#ibcon#first serial, iclass 20, count 2 2006.229.16:20:19.00#ibcon#enter sib2, iclass 20, count 2 2006.229.16:20:19.00#ibcon#flushed, iclass 20, count 2 2006.229.16:20:19.00#ibcon#about to write, iclass 20, count 2 2006.229.16:20:19.00#ibcon#wrote, iclass 20, count 2 2006.229.16:20:19.00#ibcon#about to read 3, iclass 20, count 2 2006.229.16:20:19.02#ibcon#read 3, iclass 20, count 2 2006.229.16:20:19.02#ibcon#about to read 4, iclass 20, count 2 2006.229.16:20:19.02#ibcon#read 4, iclass 20, count 2 2006.229.16:20:19.02#ibcon#about to read 5, iclass 20, count 2 2006.229.16:20:19.02#ibcon#read 5, iclass 20, count 2 2006.229.16:20:19.02#ibcon#about to read 6, iclass 20, count 2 2006.229.16:20:19.02#ibcon#read 6, iclass 20, count 2 2006.229.16:20:19.02#ibcon#end of sib2, iclass 20, count 2 2006.229.16:20:19.02#ibcon#*mode == 0, iclass 20, count 2 2006.229.16:20:19.02#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.16:20:19.02#ibcon#[27=AT01-04\r\n] 2006.229.16:20:19.02#ibcon#*before write, iclass 20, count 2 2006.229.16:20:19.02#ibcon#enter sib2, iclass 20, count 2 2006.229.16:20:19.02#ibcon#flushed, iclass 20, count 2 2006.229.16:20:19.02#ibcon#about to write, iclass 20, count 2 2006.229.16:20:19.02#ibcon#wrote, iclass 20, count 2 2006.229.16:20:19.02#ibcon#about to read 3, iclass 20, count 2 2006.229.16:20:19.05#ibcon#read 3, iclass 20, count 2 2006.229.16:20:19.05#ibcon#about to read 4, iclass 20, count 2 2006.229.16:20:19.05#ibcon#read 4, iclass 20, count 2 2006.229.16:20:19.05#ibcon#about to read 5, iclass 20, count 2 2006.229.16:20:19.05#ibcon#read 5, iclass 20, count 2 2006.229.16:20:19.05#ibcon#about to read 6, iclass 20, count 2 2006.229.16:20:19.05#ibcon#read 6, iclass 20, count 2 2006.229.16:20:19.05#ibcon#end of sib2, iclass 20, count 2 2006.229.16:20:19.05#ibcon#*after write, iclass 20, count 2 2006.229.16:20:19.05#ibcon#*before return 0, iclass 20, count 2 2006.229.16:20:19.05#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:20:19.05#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:20:19.05#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.16:20:19.05#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:19.05#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:20:19.17#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:20:19.17#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:20:19.17#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:20:19.17#ibcon#first serial, iclass 20, count 0 2006.229.16:20:19.17#ibcon#enter sib2, iclass 20, count 0 2006.229.16:20:19.17#ibcon#flushed, iclass 20, count 0 2006.229.16:20:19.17#ibcon#about to write, iclass 20, count 0 2006.229.16:20:19.17#ibcon#wrote, iclass 20, count 0 2006.229.16:20:19.17#ibcon#about to read 3, iclass 20, count 0 2006.229.16:20:19.19#ibcon#read 3, iclass 20, count 0 2006.229.16:20:19.19#ibcon#about to read 4, iclass 20, count 0 2006.229.16:20:19.19#ibcon#read 4, iclass 20, count 0 2006.229.16:20:19.19#ibcon#about to read 5, iclass 20, count 0 2006.229.16:20:19.19#ibcon#read 5, iclass 20, count 0 2006.229.16:20:19.19#ibcon#about to read 6, iclass 20, count 0 2006.229.16:20:19.19#ibcon#read 6, iclass 20, count 0 2006.229.16:20:19.19#ibcon#end of sib2, iclass 20, count 0 2006.229.16:20:19.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:20:19.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:20:19.19#ibcon#[27=USB\r\n] 2006.229.16:20:19.19#ibcon#*before write, iclass 20, count 0 2006.229.16:20:19.19#ibcon#enter sib2, iclass 20, count 0 2006.229.16:20:19.19#ibcon#flushed, iclass 20, count 0 2006.229.16:20:19.19#ibcon#about to write, iclass 20, count 0 2006.229.16:20:19.19#ibcon#wrote, iclass 20, count 0 2006.229.16:20:19.19#ibcon#about to read 3, iclass 20, count 0 2006.229.16:20:19.22#ibcon#read 3, iclass 20, count 0 2006.229.16:20:19.22#ibcon#about to read 4, iclass 20, count 0 2006.229.16:20:19.22#ibcon#read 4, iclass 20, count 0 2006.229.16:20:19.22#ibcon#about to read 5, iclass 20, count 0 2006.229.16:20:19.22#ibcon#read 5, iclass 20, count 0 2006.229.16:20:19.22#ibcon#about to read 6, iclass 20, count 0 2006.229.16:20:19.22#ibcon#read 6, iclass 20, count 0 2006.229.16:20:19.22#ibcon#end of sib2, iclass 20, count 0 2006.229.16:20:19.22#ibcon#*after write, iclass 20, count 0 2006.229.16:20:19.22#ibcon#*before return 0, iclass 20, count 0 2006.229.16:20:19.22#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:20:19.22#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:20:19.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:20:19.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:20:19.22$vck44/vblo=2,634.99 2006.229.16:20:19.22#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.16:20:19.22#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.16:20:19.22#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:19.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:19.22#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:19.22#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:19.22#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:20:19.22#ibcon#first serial, iclass 22, count 0 2006.229.16:20:19.22#ibcon#enter sib2, iclass 22, count 0 2006.229.16:20:19.22#ibcon#flushed, iclass 22, count 0 2006.229.16:20:19.22#ibcon#about to write, iclass 22, count 0 2006.229.16:20:19.22#ibcon#wrote, iclass 22, count 0 2006.229.16:20:19.22#ibcon#about to read 3, iclass 22, count 0 2006.229.16:20:19.24#ibcon#read 3, iclass 22, count 0 2006.229.16:20:19.24#ibcon#about to read 4, iclass 22, count 0 2006.229.16:20:19.24#ibcon#read 4, iclass 22, count 0 2006.229.16:20:19.24#ibcon#about to read 5, iclass 22, count 0 2006.229.16:20:19.24#ibcon#read 5, iclass 22, count 0 2006.229.16:20:19.24#ibcon#about to read 6, iclass 22, count 0 2006.229.16:20:19.24#ibcon#read 6, iclass 22, count 0 2006.229.16:20:19.24#ibcon#end of sib2, iclass 22, count 0 2006.229.16:20:19.24#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:20:19.24#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:20:19.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:20:19.24#ibcon#*before write, iclass 22, count 0 2006.229.16:20:19.24#ibcon#enter sib2, iclass 22, count 0 2006.229.16:20:19.24#ibcon#flushed, iclass 22, count 0 2006.229.16:20:19.24#ibcon#about to write, iclass 22, count 0 2006.229.16:20:19.24#ibcon#wrote, iclass 22, count 0 2006.229.16:20:19.24#ibcon#about to read 3, iclass 22, count 0 2006.229.16:20:19.28#ibcon#read 3, iclass 22, count 0 2006.229.16:20:19.28#ibcon#about to read 4, iclass 22, count 0 2006.229.16:20:19.28#ibcon#read 4, iclass 22, count 0 2006.229.16:20:19.28#ibcon#about to read 5, iclass 22, count 0 2006.229.16:20:19.28#ibcon#read 5, iclass 22, count 0 2006.229.16:20:19.28#ibcon#about to read 6, iclass 22, count 0 2006.229.16:20:19.28#ibcon#read 6, iclass 22, count 0 2006.229.16:20:19.28#ibcon#end of sib2, iclass 22, count 0 2006.229.16:20:19.28#ibcon#*after write, iclass 22, count 0 2006.229.16:20:19.28#ibcon#*before return 0, iclass 22, count 0 2006.229.16:20:19.28#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:19.28#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:20:19.28#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:20:19.28#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:20:19.28$vck44/vb=2,4 2006.229.16:20:19.28#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.16:20:19.28#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.16:20:19.28#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:19.28#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:19.34#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:19.34#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:19.34#ibcon#enter wrdev, iclass 24, count 2 2006.229.16:20:19.34#ibcon#first serial, iclass 24, count 2 2006.229.16:20:19.34#ibcon#enter sib2, iclass 24, count 2 2006.229.16:20:19.34#ibcon#flushed, iclass 24, count 2 2006.229.16:20:19.34#ibcon#about to write, iclass 24, count 2 2006.229.16:20:19.34#ibcon#wrote, iclass 24, count 2 2006.229.16:20:19.34#ibcon#about to read 3, iclass 24, count 2 2006.229.16:20:19.36#ibcon#read 3, iclass 24, count 2 2006.229.16:20:19.36#ibcon#about to read 4, iclass 24, count 2 2006.229.16:20:19.36#ibcon#read 4, iclass 24, count 2 2006.229.16:20:19.36#ibcon#about to read 5, iclass 24, count 2 2006.229.16:20:19.36#ibcon#read 5, iclass 24, count 2 2006.229.16:20:19.36#ibcon#about to read 6, iclass 24, count 2 2006.229.16:20:19.36#ibcon#read 6, iclass 24, count 2 2006.229.16:20:19.36#ibcon#end of sib2, iclass 24, count 2 2006.229.16:20:19.36#ibcon#*mode == 0, iclass 24, count 2 2006.229.16:20:19.36#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.16:20:19.36#ibcon#[27=AT02-04\r\n] 2006.229.16:20:19.36#ibcon#*before write, iclass 24, count 2 2006.229.16:20:19.36#ibcon#enter sib2, iclass 24, count 2 2006.229.16:20:19.36#ibcon#flushed, iclass 24, count 2 2006.229.16:20:19.36#ibcon#about to write, iclass 24, count 2 2006.229.16:20:19.36#ibcon#wrote, iclass 24, count 2 2006.229.16:20:19.36#ibcon#about to read 3, iclass 24, count 2 2006.229.16:20:19.39#ibcon#read 3, iclass 24, count 2 2006.229.16:20:19.39#ibcon#about to read 4, iclass 24, count 2 2006.229.16:20:19.39#ibcon#read 4, iclass 24, count 2 2006.229.16:20:19.39#ibcon#about to read 5, iclass 24, count 2 2006.229.16:20:19.39#ibcon#read 5, iclass 24, count 2 2006.229.16:20:19.39#ibcon#about to read 6, iclass 24, count 2 2006.229.16:20:19.39#ibcon#read 6, iclass 24, count 2 2006.229.16:20:19.39#ibcon#end of sib2, iclass 24, count 2 2006.229.16:20:19.39#ibcon#*after write, iclass 24, count 2 2006.229.16:20:19.39#ibcon#*before return 0, iclass 24, count 2 2006.229.16:20:19.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:19.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:20:19.39#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.16:20:19.39#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:19.39#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:19.51#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:19.51#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:19.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:20:19.51#ibcon#first serial, iclass 24, count 0 2006.229.16:20:19.51#ibcon#enter sib2, iclass 24, count 0 2006.229.16:20:19.51#ibcon#flushed, iclass 24, count 0 2006.229.16:20:19.51#ibcon#about to write, iclass 24, count 0 2006.229.16:20:19.51#ibcon#wrote, iclass 24, count 0 2006.229.16:20:19.51#ibcon#about to read 3, iclass 24, count 0 2006.229.16:20:19.53#ibcon#read 3, iclass 24, count 0 2006.229.16:20:19.53#ibcon#about to read 4, iclass 24, count 0 2006.229.16:20:19.53#ibcon#read 4, iclass 24, count 0 2006.229.16:20:19.53#ibcon#about to read 5, iclass 24, count 0 2006.229.16:20:19.53#ibcon#read 5, iclass 24, count 0 2006.229.16:20:19.53#ibcon#about to read 6, iclass 24, count 0 2006.229.16:20:19.53#ibcon#read 6, iclass 24, count 0 2006.229.16:20:19.53#ibcon#end of sib2, iclass 24, count 0 2006.229.16:20:19.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:20:19.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:20:19.53#ibcon#[27=USB\r\n] 2006.229.16:20:19.53#ibcon#*before write, iclass 24, count 0 2006.229.16:20:19.53#ibcon#enter sib2, iclass 24, count 0 2006.229.16:20:19.53#ibcon#flushed, iclass 24, count 0 2006.229.16:20:19.53#ibcon#about to write, iclass 24, count 0 2006.229.16:20:19.53#ibcon#wrote, iclass 24, count 0 2006.229.16:20:19.53#ibcon#about to read 3, iclass 24, count 0 2006.229.16:20:19.56#ibcon#read 3, iclass 24, count 0 2006.229.16:20:19.56#ibcon#about to read 4, iclass 24, count 0 2006.229.16:20:19.56#ibcon#read 4, iclass 24, count 0 2006.229.16:20:19.56#ibcon#about to read 5, iclass 24, count 0 2006.229.16:20:19.56#ibcon#read 5, iclass 24, count 0 2006.229.16:20:19.56#ibcon#about to read 6, iclass 24, count 0 2006.229.16:20:19.56#ibcon#read 6, iclass 24, count 0 2006.229.16:20:19.56#ibcon#end of sib2, iclass 24, count 0 2006.229.16:20:19.56#ibcon#*after write, iclass 24, count 0 2006.229.16:20:19.56#ibcon#*before return 0, iclass 24, count 0 2006.229.16:20:19.56#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:19.56#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:20:19.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:20:19.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:20:19.56$vck44/vblo=3,649.99 2006.229.16:20:19.56#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.16:20:19.56#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.16:20:19.56#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:19.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:19.56#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:19.56#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:19.56#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:20:19.56#ibcon#first serial, iclass 26, count 0 2006.229.16:20:19.56#ibcon#enter sib2, iclass 26, count 0 2006.229.16:20:19.56#ibcon#flushed, iclass 26, count 0 2006.229.16:20:19.56#ibcon#about to write, iclass 26, count 0 2006.229.16:20:19.56#ibcon#wrote, iclass 26, count 0 2006.229.16:20:19.56#ibcon#about to read 3, iclass 26, count 0 2006.229.16:20:19.58#ibcon#read 3, iclass 26, count 0 2006.229.16:20:19.58#ibcon#about to read 4, iclass 26, count 0 2006.229.16:20:19.58#ibcon#read 4, iclass 26, count 0 2006.229.16:20:19.58#ibcon#about to read 5, iclass 26, count 0 2006.229.16:20:19.58#ibcon#read 5, iclass 26, count 0 2006.229.16:20:19.58#ibcon#about to read 6, iclass 26, count 0 2006.229.16:20:19.58#ibcon#read 6, iclass 26, count 0 2006.229.16:20:19.58#ibcon#end of sib2, iclass 26, count 0 2006.229.16:20:19.58#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:20:19.58#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:20:19.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:20:19.58#ibcon#*before write, iclass 26, count 0 2006.229.16:20:19.58#ibcon#enter sib2, iclass 26, count 0 2006.229.16:20:19.58#ibcon#flushed, iclass 26, count 0 2006.229.16:20:19.58#ibcon#about to write, iclass 26, count 0 2006.229.16:20:19.58#ibcon#wrote, iclass 26, count 0 2006.229.16:20:19.58#ibcon#about to read 3, iclass 26, count 0 2006.229.16:20:19.62#ibcon#read 3, iclass 26, count 0 2006.229.16:20:19.62#ibcon#about to read 4, iclass 26, count 0 2006.229.16:20:19.62#ibcon#read 4, iclass 26, count 0 2006.229.16:20:19.62#ibcon#about to read 5, iclass 26, count 0 2006.229.16:20:19.62#ibcon#read 5, iclass 26, count 0 2006.229.16:20:19.62#ibcon#about to read 6, iclass 26, count 0 2006.229.16:20:19.62#ibcon#read 6, iclass 26, count 0 2006.229.16:20:19.62#ibcon#end of sib2, iclass 26, count 0 2006.229.16:20:19.62#ibcon#*after write, iclass 26, count 0 2006.229.16:20:19.62#ibcon#*before return 0, iclass 26, count 0 2006.229.16:20:19.62#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:19.62#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:20:19.62#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:20:19.62#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:20:19.62$vck44/vb=3,4 2006.229.16:20:19.62#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.16:20:19.62#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.16:20:19.62#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:19.62#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:19.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:19.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:19.68#ibcon#enter wrdev, iclass 28, count 2 2006.229.16:20:19.68#ibcon#first serial, iclass 28, count 2 2006.229.16:20:19.68#ibcon#enter sib2, iclass 28, count 2 2006.229.16:20:19.68#ibcon#flushed, iclass 28, count 2 2006.229.16:20:19.68#ibcon#about to write, iclass 28, count 2 2006.229.16:20:19.68#ibcon#wrote, iclass 28, count 2 2006.229.16:20:19.68#ibcon#about to read 3, iclass 28, count 2 2006.229.16:20:19.70#ibcon#read 3, iclass 28, count 2 2006.229.16:20:19.70#ibcon#about to read 4, iclass 28, count 2 2006.229.16:20:19.70#ibcon#read 4, iclass 28, count 2 2006.229.16:20:19.70#ibcon#about to read 5, iclass 28, count 2 2006.229.16:20:19.70#ibcon#read 5, iclass 28, count 2 2006.229.16:20:19.70#ibcon#about to read 6, iclass 28, count 2 2006.229.16:20:19.70#ibcon#read 6, iclass 28, count 2 2006.229.16:20:19.70#ibcon#end of sib2, iclass 28, count 2 2006.229.16:20:19.70#ibcon#*mode == 0, iclass 28, count 2 2006.229.16:20:19.70#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.16:20:19.70#ibcon#[27=AT03-04\r\n] 2006.229.16:20:19.70#ibcon#*before write, iclass 28, count 2 2006.229.16:20:19.70#ibcon#enter sib2, iclass 28, count 2 2006.229.16:20:19.70#ibcon#flushed, iclass 28, count 2 2006.229.16:20:19.70#ibcon#about to write, iclass 28, count 2 2006.229.16:20:19.70#ibcon#wrote, iclass 28, count 2 2006.229.16:20:19.70#ibcon#about to read 3, iclass 28, count 2 2006.229.16:20:19.73#ibcon#read 3, iclass 28, count 2 2006.229.16:20:19.73#ibcon#about to read 4, iclass 28, count 2 2006.229.16:20:19.73#ibcon#read 4, iclass 28, count 2 2006.229.16:20:19.73#ibcon#about to read 5, iclass 28, count 2 2006.229.16:20:19.73#ibcon#read 5, iclass 28, count 2 2006.229.16:20:19.73#ibcon#about to read 6, iclass 28, count 2 2006.229.16:20:19.73#ibcon#read 6, iclass 28, count 2 2006.229.16:20:19.73#ibcon#end of sib2, iclass 28, count 2 2006.229.16:20:19.73#ibcon#*after write, iclass 28, count 2 2006.229.16:20:19.73#ibcon#*before return 0, iclass 28, count 2 2006.229.16:20:19.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:19.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:20:19.73#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.16:20:19.73#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:19.73#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:19.85#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:19.85#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:19.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:20:19.85#ibcon#first serial, iclass 28, count 0 2006.229.16:20:19.85#ibcon#enter sib2, iclass 28, count 0 2006.229.16:20:19.85#ibcon#flushed, iclass 28, count 0 2006.229.16:20:19.85#ibcon#about to write, iclass 28, count 0 2006.229.16:20:19.85#ibcon#wrote, iclass 28, count 0 2006.229.16:20:19.85#ibcon#about to read 3, iclass 28, count 0 2006.229.16:20:19.87#ibcon#read 3, iclass 28, count 0 2006.229.16:20:19.87#ibcon#about to read 4, iclass 28, count 0 2006.229.16:20:19.87#ibcon#read 4, iclass 28, count 0 2006.229.16:20:19.87#ibcon#about to read 5, iclass 28, count 0 2006.229.16:20:19.87#ibcon#read 5, iclass 28, count 0 2006.229.16:20:19.87#ibcon#about to read 6, iclass 28, count 0 2006.229.16:20:19.87#ibcon#read 6, iclass 28, count 0 2006.229.16:20:19.87#ibcon#end of sib2, iclass 28, count 0 2006.229.16:20:19.87#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:20:19.87#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:20:19.87#ibcon#[27=USB\r\n] 2006.229.16:20:19.87#ibcon#*before write, iclass 28, count 0 2006.229.16:20:19.87#ibcon#enter sib2, iclass 28, count 0 2006.229.16:20:19.87#ibcon#flushed, iclass 28, count 0 2006.229.16:20:19.87#ibcon#about to write, iclass 28, count 0 2006.229.16:20:19.87#ibcon#wrote, iclass 28, count 0 2006.229.16:20:19.87#ibcon#about to read 3, iclass 28, count 0 2006.229.16:20:19.90#ibcon#read 3, iclass 28, count 0 2006.229.16:20:19.90#ibcon#about to read 4, iclass 28, count 0 2006.229.16:20:19.90#ibcon#read 4, iclass 28, count 0 2006.229.16:20:19.90#ibcon#about to read 5, iclass 28, count 0 2006.229.16:20:19.90#ibcon#read 5, iclass 28, count 0 2006.229.16:20:19.90#ibcon#about to read 6, iclass 28, count 0 2006.229.16:20:19.90#ibcon#read 6, iclass 28, count 0 2006.229.16:20:19.90#ibcon#end of sib2, iclass 28, count 0 2006.229.16:20:19.90#ibcon#*after write, iclass 28, count 0 2006.229.16:20:19.90#ibcon#*before return 0, iclass 28, count 0 2006.229.16:20:19.90#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:19.90#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:20:19.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:20:19.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:20:19.90$vck44/vblo=4,679.99 2006.229.16:20:19.90#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.16:20:19.90#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.16:20:19.90#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:19.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:19.90#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:19.90#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:19.90#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:20:19.90#ibcon#first serial, iclass 30, count 0 2006.229.16:20:19.90#ibcon#enter sib2, iclass 30, count 0 2006.229.16:20:19.90#ibcon#flushed, iclass 30, count 0 2006.229.16:20:19.90#ibcon#about to write, iclass 30, count 0 2006.229.16:20:19.90#ibcon#wrote, iclass 30, count 0 2006.229.16:20:19.90#ibcon#about to read 3, iclass 30, count 0 2006.229.16:20:19.92#ibcon#read 3, iclass 30, count 0 2006.229.16:20:19.92#ibcon#about to read 4, iclass 30, count 0 2006.229.16:20:19.92#ibcon#read 4, iclass 30, count 0 2006.229.16:20:19.92#ibcon#about to read 5, iclass 30, count 0 2006.229.16:20:19.92#ibcon#read 5, iclass 30, count 0 2006.229.16:20:19.92#ibcon#about to read 6, iclass 30, count 0 2006.229.16:20:19.92#ibcon#read 6, iclass 30, count 0 2006.229.16:20:19.92#ibcon#end of sib2, iclass 30, count 0 2006.229.16:20:19.92#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:20:19.92#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:20:19.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:20:19.92#ibcon#*before write, iclass 30, count 0 2006.229.16:20:19.92#ibcon#enter sib2, iclass 30, count 0 2006.229.16:20:19.92#ibcon#flushed, iclass 30, count 0 2006.229.16:20:19.92#ibcon#about to write, iclass 30, count 0 2006.229.16:20:19.92#ibcon#wrote, iclass 30, count 0 2006.229.16:20:19.92#ibcon#about to read 3, iclass 30, count 0 2006.229.16:20:19.96#ibcon#read 3, iclass 30, count 0 2006.229.16:20:19.96#ibcon#about to read 4, iclass 30, count 0 2006.229.16:20:19.96#ibcon#read 4, iclass 30, count 0 2006.229.16:20:19.96#ibcon#about to read 5, iclass 30, count 0 2006.229.16:20:19.96#ibcon#read 5, iclass 30, count 0 2006.229.16:20:19.96#ibcon#about to read 6, iclass 30, count 0 2006.229.16:20:19.96#ibcon#read 6, iclass 30, count 0 2006.229.16:20:19.96#ibcon#end of sib2, iclass 30, count 0 2006.229.16:20:19.96#ibcon#*after write, iclass 30, count 0 2006.229.16:20:19.96#ibcon#*before return 0, iclass 30, count 0 2006.229.16:20:19.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:19.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:20:19.96#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:20:19.96#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:20:19.96$vck44/vb=4,4 2006.229.16:20:19.96#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.16:20:19.96#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.16:20:19.96#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:19.96#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:20.02#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:20.02#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:20.02#ibcon#enter wrdev, iclass 32, count 2 2006.229.16:20:20.02#ibcon#first serial, iclass 32, count 2 2006.229.16:20:20.02#ibcon#enter sib2, iclass 32, count 2 2006.229.16:20:20.02#ibcon#flushed, iclass 32, count 2 2006.229.16:20:20.02#ibcon#about to write, iclass 32, count 2 2006.229.16:20:20.02#ibcon#wrote, iclass 32, count 2 2006.229.16:20:20.02#ibcon#about to read 3, iclass 32, count 2 2006.229.16:20:20.04#ibcon#read 3, iclass 32, count 2 2006.229.16:20:20.04#ibcon#about to read 4, iclass 32, count 2 2006.229.16:20:20.04#ibcon#read 4, iclass 32, count 2 2006.229.16:20:20.04#ibcon#about to read 5, iclass 32, count 2 2006.229.16:20:20.04#ibcon#read 5, iclass 32, count 2 2006.229.16:20:20.04#ibcon#about to read 6, iclass 32, count 2 2006.229.16:20:20.04#ibcon#read 6, iclass 32, count 2 2006.229.16:20:20.04#ibcon#end of sib2, iclass 32, count 2 2006.229.16:20:20.04#ibcon#*mode == 0, iclass 32, count 2 2006.229.16:20:20.04#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.16:20:20.04#ibcon#[27=AT04-04\r\n] 2006.229.16:20:20.04#ibcon#*before write, iclass 32, count 2 2006.229.16:20:20.04#ibcon#enter sib2, iclass 32, count 2 2006.229.16:20:20.04#ibcon#flushed, iclass 32, count 2 2006.229.16:20:20.04#ibcon#about to write, iclass 32, count 2 2006.229.16:20:20.04#ibcon#wrote, iclass 32, count 2 2006.229.16:20:20.04#ibcon#about to read 3, iclass 32, count 2 2006.229.16:20:20.07#ibcon#read 3, iclass 32, count 2 2006.229.16:20:20.07#ibcon#about to read 4, iclass 32, count 2 2006.229.16:20:20.07#ibcon#read 4, iclass 32, count 2 2006.229.16:20:20.07#ibcon#about to read 5, iclass 32, count 2 2006.229.16:20:20.07#ibcon#read 5, iclass 32, count 2 2006.229.16:20:20.07#ibcon#about to read 6, iclass 32, count 2 2006.229.16:20:20.07#ibcon#read 6, iclass 32, count 2 2006.229.16:20:20.07#ibcon#end of sib2, iclass 32, count 2 2006.229.16:20:20.07#ibcon#*after write, iclass 32, count 2 2006.229.16:20:20.07#ibcon#*before return 0, iclass 32, count 2 2006.229.16:20:20.07#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:20.07#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:20:20.07#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.16:20:20.07#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:20.07#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:20.19#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:20.19#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:20.19#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:20:20.19#ibcon#first serial, iclass 32, count 0 2006.229.16:20:20.19#ibcon#enter sib2, iclass 32, count 0 2006.229.16:20:20.19#ibcon#flushed, iclass 32, count 0 2006.229.16:20:20.19#ibcon#about to write, iclass 32, count 0 2006.229.16:20:20.19#ibcon#wrote, iclass 32, count 0 2006.229.16:20:20.19#ibcon#about to read 3, iclass 32, count 0 2006.229.16:20:20.21#ibcon#read 3, iclass 32, count 0 2006.229.16:20:20.21#ibcon#about to read 4, iclass 32, count 0 2006.229.16:20:20.21#ibcon#read 4, iclass 32, count 0 2006.229.16:20:20.21#ibcon#about to read 5, iclass 32, count 0 2006.229.16:20:20.21#ibcon#read 5, iclass 32, count 0 2006.229.16:20:20.21#ibcon#about to read 6, iclass 32, count 0 2006.229.16:20:20.21#ibcon#read 6, iclass 32, count 0 2006.229.16:20:20.21#ibcon#end of sib2, iclass 32, count 0 2006.229.16:20:20.21#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:20:20.21#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:20:20.21#ibcon#[27=USB\r\n] 2006.229.16:20:20.21#ibcon#*before write, iclass 32, count 0 2006.229.16:20:20.21#ibcon#enter sib2, iclass 32, count 0 2006.229.16:20:20.21#ibcon#flushed, iclass 32, count 0 2006.229.16:20:20.21#ibcon#about to write, iclass 32, count 0 2006.229.16:20:20.21#ibcon#wrote, iclass 32, count 0 2006.229.16:20:20.21#ibcon#about to read 3, iclass 32, count 0 2006.229.16:20:20.24#ibcon#read 3, iclass 32, count 0 2006.229.16:20:20.24#ibcon#about to read 4, iclass 32, count 0 2006.229.16:20:20.24#ibcon#read 4, iclass 32, count 0 2006.229.16:20:20.24#ibcon#about to read 5, iclass 32, count 0 2006.229.16:20:20.24#ibcon#read 5, iclass 32, count 0 2006.229.16:20:20.24#ibcon#about to read 6, iclass 32, count 0 2006.229.16:20:20.24#ibcon#read 6, iclass 32, count 0 2006.229.16:20:20.24#ibcon#end of sib2, iclass 32, count 0 2006.229.16:20:20.24#ibcon#*after write, iclass 32, count 0 2006.229.16:20:20.24#ibcon#*before return 0, iclass 32, count 0 2006.229.16:20:20.24#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:20.24#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:20:20.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:20:20.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:20:20.24$vck44/vblo=5,709.99 2006.229.16:20:20.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.16:20:20.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.16:20:20.24#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:20.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:20.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:20.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:20.24#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:20:20.24#ibcon#first serial, iclass 34, count 0 2006.229.16:20:20.24#ibcon#enter sib2, iclass 34, count 0 2006.229.16:20:20.24#ibcon#flushed, iclass 34, count 0 2006.229.16:20:20.24#ibcon#about to write, iclass 34, count 0 2006.229.16:20:20.24#ibcon#wrote, iclass 34, count 0 2006.229.16:20:20.24#ibcon#about to read 3, iclass 34, count 0 2006.229.16:20:20.26#ibcon#read 3, iclass 34, count 0 2006.229.16:20:20.26#ibcon#about to read 4, iclass 34, count 0 2006.229.16:20:20.26#ibcon#read 4, iclass 34, count 0 2006.229.16:20:20.26#ibcon#about to read 5, iclass 34, count 0 2006.229.16:20:20.26#ibcon#read 5, iclass 34, count 0 2006.229.16:20:20.26#ibcon#about to read 6, iclass 34, count 0 2006.229.16:20:20.26#ibcon#read 6, iclass 34, count 0 2006.229.16:20:20.26#ibcon#end of sib2, iclass 34, count 0 2006.229.16:20:20.26#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:20:20.26#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:20:20.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:20:20.26#ibcon#*before write, iclass 34, count 0 2006.229.16:20:20.26#ibcon#enter sib2, iclass 34, count 0 2006.229.16:20:20.26#ibcon#flushed, iclass 34, count 0 2006.229.16:20:20.26#ibcon#about to write, iclass 34, count 0 2006.229.16:20:20.26#ibcon#wrote, iclass 34, count 0 2006.229.16:20:20.26#ibcon#about to read 3, iclass 34, count 0 2006.229.16:20:20.30#ibcon#read 3, iclass 34, count 0 2006.229.16:20:20.30#ibcon#about to read 4, iclass 34, count 0 2006.229.16:20:20.30#ibcon#read 4, iclass 34, count 0 2006.229.16:20:20.30#ibcon#about to read 5, iclass 34, count 0 2006.229.16:20:20.30#ibcon#read 5, iclass 34, count 0 2006.229.16:20:20.30#ibcon#about to read 6, iclass 34, count 0 2006.229.16:20:20.30#ibcon#read 6, iclass 34, count 0 2006.229.16:20:20.30#ibcon#end of sib2, iclass 34, count 0 2006.229.16:20:20.30#ibcon#*after write, iclass 34, count 0 2006.229.16:20:20.30#ibcon#*before return 0, iclass 34, count 0 2006.229.16:20:20.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:20.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:20:20.30#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:20:20.30#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:20:20.30$vck44/vb=5,4 2006.229.16:20:20.30#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.16:20:20.30#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.16:20:20.30#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:20.30#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:20.36#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:20.36#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:20.36#ibcon#enter wrdev, iclass 36, count 2 2006.229.16:20:20.36#ibcon#first serial, iclass 36, count 2 2006.229.16:20:20.36#ibcon#enter sib2, iclass 36, count 2 2006.229.16:20:20.36#ibcon#flushed, iclass 36, count 2 2006.229.16:20:20.36#ibcon#about to write, iclass 36, count 2 2006.229.16:20:20.36#ibcon#wrote, iclass 36, count 2 2006.229.16:20:20.36#ibcon#about to read 3, iclass 36, count 2 2006.229.16:20:20.38#ibcon#read 3, iclass 36, count 2 2006.229.16:20:20.38#ibcon#about to read 4, iclass 36, count 2 2006.229.16:20:20.38#ibcon#read 4, iclass 36, count 2 2006.229.16:20:20.38#ibcon#about to read 5, iclass 36, count 2 2006.229.16:20:20.38#ibcon#read 5, iclass 36, count 2 2006.229.16:20:20.38#ibcon#about to read 6, iclass 36, count 2 2006.229.16:20:20.38#ibcon#read 6, iclass 36, count 2 2006.229.16:20:20.38#ibcon#end of sib2, iclass 36, count 2 2006.229.16:20:20.38#ibcon#*mode == 0, iclass 36, count 2 2006.229.16:20:20.38#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.16:20:20.38#ibcon#[27=AT05-04\r\n] 2006.229.16:20:20.38#ibcon#*before write, iclass 36, count 2 2006.229.16:20:20.38#ibcon#enter sib2, iclass 36, count 2 2006.229.16:20:20.38#ibcon#flushed, iclass 36, count 2 2006.229.16:20:20.38#ibcon#about to write, iclass 36, count 2 2006.229.16:20:20.38#ibcon#wrote, iclass 36, count 2 2006.229.16:20:20.38#ibcon#about to read 3, iclass 36, count 2 2006.229.16:20:20.41#ibcon#read 3, iclass 36, count 2 2006.229.16:20:20.41#ibcon#about to read 4, iclass 36, count 2 2006.229.16:20:20.41#ibcon#read 4, iclass 36, count 2 2006.229.16:20:20.41#ibcon#about to read 5, iclass 36, count 2 2006.229.16:20:20.41#ibcon#read 5, iclass 36, count 2 2006.229.16:20:20.41#ibcon#about to read 6, iclass 36, count 2 2006.229.16:20:20.41#ibcon#read 6, iclass 36, count 2 2006.229.16:20:20.41#ibcon#end of sib2, iclass 36, count 2 2006.229.16:20:20.41#ibcon#*after write, iclass 36, count 2 2006.229.16:20:20.41#ibcon#*before return 0, iclass 36, count 2 2006.229.16:20:20.41#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:20.41#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:20:20.41#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.16:20:20.41#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:20.41#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:20.53#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:20.53#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:20.53#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:20:20.53#ibcon#first serial, iclass 36, count 0 2006.229.16:20:20.53#ibcon#enter sib2, iclass 36, count 0 2006.229.16:20:20.53#ibcon#flushed, iclass 36, count 0 2006.229.16:20:20.53#ibcon#about to write, iclass 36, count 0 2006.229.16:20:20.53#ibcon#wrote, iclass 36, count 0 2006.229.16:20:20.53#ibcon#about to read 3, iclass 36, count 0 2006.229.16:20:20.55#ibcon#read 3, iclass 36, count 0 2006.229.16:20:20.55#ibcon#about to read 4, iclass 36, count 0 2006.229.16:20:20.55#ibcon#read 4, iclass 36, count 0 2006.229.16:20:20.55#ibcon#about to read 5, iclass 36, count 0 2006.229.16:20:20.55#ibcon#read 5, iclass 36, count 0 2006.229.16:20:20.55#ibcon#about to read 6, iclass 36, count 0 2006.229.16:20:20.55#ibcon#read 6, iclass 36, count 0 2006.229.16:20:20.55#ibcon#end of sib2, iclass 36, count 0 2006.229.16:20:20.55#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:20:20.55#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:20:20.55#ibcon#[27=USB\r\n] 2006.229.16:20:20.55#ibcon#*before write, iclass 36, count 0 2006.229.16:20:20.55#ibcon#enter sib2, iclass 36, count 0 2006.229.16:20:20.55#ibcon#flushed, iclass 36, count 0 2006.229.16:20:20.55#ibcon#about to write, iclass 36, count 0 2006.229.16:20:20.55#ibcon#wrote, iclass 36, count 0 2006.229.16:20:20.55#ibcon#about to read 3, iclass 36, count 0 2006.229.16:20:20.58#ibcon#read 3, iclass 36, count 0 2006.229.16:20:20.58#ibcon#about to read 4, iclass 36, count 0 2006.229.16:20:20.58#ibcon#read 4, iclass 36, count 0 2006.229.16:20:20.58#ibcon#about to read 5, iclass 36, count 0 2006.229.16:20:20.58#ibcon#read 5, iclass 36, count 0 2006.229.16:20:20.58#ibcon#about to read 6, iclass 36, count 0 2006.229.16:20:20.58#ibcon#read 6, iclass 36, count 0 2006.229.16:20:20.58#ibcon#end of sib2, iclass 36, count 0 2006.229.16:20:20.58#ibcon#*after write, iclass 36, count 0 2006.229.16:20:20.58#ibcon#*before return 0, iclass 36, count 0 2006.229.16:20:20.58#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:20.58#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:20:20.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:20:20.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:20:20.58$vck44/vblo=6,719.99 2006.229.16:20:20.58#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.16:20:20.58#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.16:20:20.58#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:20.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:20.58#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:20.58#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:20.58#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:20:20.58#ibcon#first serial, iclass 38, count 0 2006.229.16:20:20.58#ibcon#enter sib2, iclass 38, count 0 2006.229.16:20:20.58#ibcon#flushed, iclass 38, count 0 2006.229.16:20:20.58#ibcon#about to write, iclass 38, count 0 2006.229.16:20:20.58#ibcon#wrote, iclass 38, count 0 2006.229.16:20:20.58#ibcon#about to read 3, iclass 38, count 0 2006.229.16:20:20.60#ibcon#read 3, iclass 38, count 0 2006.229.16:20:20.60#ibcon#about to read 4, iclass 38, count 0 2006.229.16:20:20.60#ibcon#read 4, iclass 38, count 0 2006.229.16:20:20.60#ibcon#about to read 5, iclass 38, count 0 2006.229.16:20:20.60#ibcon#read 5, iclass 38, count 0 2006.229.16:20:20.60#ibcon#about to read 6, iclass 38, count 0 2006.229.16:20:20.60#ibcon#read 6, iclass 38, count 0 2006.229.16:20:20.60#ibcon#end of sib2, iclass 38, count 0 2006.229.16:20:20.60#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:20:20.60#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:20:20.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:20:20.60#ibcon#*before write, iclass 38, count 0 2006.229.16:20:20.60#ibcon#enter sib2, iclass 38, count 0 2006.229.16:20:20.60#ibcon#flushed, iclass 38, count 0 2006.229.16:20:20.60#ibcon#about to write, iclass 38, count 0 2006.229.16:20:20.60#ibcon#wrote, iclass 38, count 0 2006.229.16:20:20.60#ibcon#about to read 3, iclass 38, count 0 2006.229.16:20:20.64#ibcon#read 3, iclass 38, count 0 2006.229.16:20:20.64#ibcon#about to read 4, iclass 38, count 0 2006.229.16:20:20.64#ibcon#read 4, iclass 38, count 0 2006.229.16:20:20.64#ibcon#about to read 5, iclass 38, count 0 2006.229.16:20:20.64#ibcon#read 5, iclass 38, count 0 2006.229.16:20:20.64#ibcon#about to read 6, iclass 38, count 0 2006.229.16:20:20.64#ibcon#read 6, iclass 38, count 0 2006.229.16:20:20.64#ibcon#end of sib2, iclass 38, count 0 2006.229.16:20:20.64#ibcon#*after write, iclass 38, count 0 2006.229.16:20:20.64#ibcon#*before return 0, iclass 38, count 0 2006.229.16:20:20.64#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:20.64#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:20:20.64#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:20:20.64#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:20:20.64$vck44/vb=6,4 2006.229.16:20:20.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.16:20:20.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.16:20:20.64#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:20.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:20.70#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:20.70#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:20.70#ibcon#enter wrdev, iclass 40, count 2 2006.229.16:20:20.70#ibcon#first serial, iclass 40, count 2 2006.229.16:20:20.70#ibcon#enter sib2, iclass 40, count 2 2006.229.16:20:20.70#ibcon#flushed, iclass 40, count 2 2006.229.16:20:20.70#ibcon#about to write, iclass 40, count 2 2006.229.16:20:20.70#ibcon#wrote, iclass 40, count 2 2006.229.16:20:20.70#ibcon#about to read 3, iclass 40, count 2 2006.229.16:20:20.72#ibcon#read 3, iclass 40, count 2 2006.229.16:20:20.72#ibcon#about to read 4, iclass 40, count 2 2006.229.16:20:20.72#ibcon#read 4, iclass 40, count 2 2006.229.16:20:20.72#ibcon#about to read 5, iclass 40, count 2 2006.229.16:20:20.72#ibcon#read 5, iclass 40, count 2 2006.229.16:20:20.72#ibcon#about to read 6, iclass 40, count 2 2006.229.16:20:20.72#ibcon#read 6, iclass 40, count 2 2006.229.16:20:20.72#ibcon#end of sib2, iclass 40, count 2 2006.229.16:20:20.72#ibcon#*mode == 0, iclass 40, count 2 2006.229.16:20:20.72#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.16:20:20.72#ibcon#[27=AT06-04\r\n] 2006.229.16:20:20.72#ibcon#*before write, iclass 40, count 2 2006.229.16:20:20.72#ibcon#enter sib2, iclass 40, count 2 2006.229.16:20:20.72#ibcon#flushed, iclass 40, count 2 2006.229.16:20:20.72#ibcon#about to write, iclass 40, count 2 2006.229.16:20:20.72#ibcon#wrote, iclass 40, count 2 2006.229.16:20:20.72#ibcon#about to read 3, iclass 40, count 2 2006.229.16:20:20.75#ibcon#read 3, iclass 40, count 2 2006.229.16:20:20.75#ibcon#about to read 4, iclass 40, count 2 2006.229.16:20:20.75#ibcon#read 4, iclass 40, count 2 2006.229.16:20:20.75#ibcon#about to read 5, iclass 40, count 2 2006.229.16:20:20.75#ibcon#read 5, iclass 40, count 2 2006.229.16:20:20.75#ibcon#about to read 6, iclass 40, count 2 2006.229.16:20:20.75#ibcon#read 6, iclass 40, count 2 2006.229.16:20:20.75#ibcon#end of sib2, iclass 40, count 2 2006.229.16:20:20.75#ibcon#*after write, iclass 40, count 2 2006.229.16:20:20.75#ibcon#*before return 0, iclass 40, count 2 2006.229.16:20:20.75#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:20.75#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:20:20.75#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.16:20:20.75#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:20.75#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:20.87#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:20.87#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:20.87#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:20:20.87#ibcon#first serial, iclass 40, count 0 2006.229.16:20:20.87#ibcon#enter sib2, iclass 40, count 0 2006.229.16:20:20.87#ibcon#flushed, iclass 40, count 0 2006.229.16:20:20.87#ibcon#about to write, iclass 40, count 0 2006.229.16:20:20.87#ibcon#wrote, iclass 40, count 0 2006.229.16:20:20.87#ibcon#about to read 3, iclass 40, count 0 2006.229.16:20:20.89#ibcon#read 3, iclass 40, count 0 2006.229.16:20:20.89#ibcon#about to read 4, iclass 40, count 0 2006.229.16:20:20.89#ibcon#read 4, iclass 40, count 0 2006.229.16:20:20.89#ibcon#about to read 5, iclass 40, count 0 2006.229.16:20:20.89#ibcon#read 5, iclass 40, count 0 2006.229.16:20:20.89#ibcon#about to read 6, iclass 40, count 0 2006.229.16:20:20.89#ibcon#read 6, iclass 40, count 0 2006.229.16:20:20.89#ibcon#end of sib2, iclass 40, count 0 2006.229.16:20:20.89#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:20:20.89#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:20:20.89#ibcon#[27=USB\r\n] 2006.229.16:20:20.89#ibcon#*before write, iclass 40, count 0 2006.229.16:20:20.89#ibcon#enter sib2, iclass 40, count 0 2006.229.16:20:20.89#ibcon#flushed, iclass 40, count 0 2006.229.16:20:20.89#ibcon#about to write, iclass 40, count 0 2006.229.16:20:20.89#ibcon#wrote, iclass 40, count 0 2006.229.16:20:20.89#ibcon#about to read 3, iclass 40, count 0 2006.229.16:20:20.92#ibcon#read 3, iclass 40, count 0 2006.229.16:20:20.92#ibcon#about to read 4, iclass 40, count 0 2006.229.16:20:20.92#ibcon#read 4, iclass 40, count 0 2006.229.16:20:20.92#ibcon#about to read 5, iclass 40, count 0 2006.229.16:20:20.92#ibcon#read 5, iclass 40, count 0 2006.229.16:20:20.92#ibcon#about to read 6, iclass 40, count 0 2006.229.16:20:20.92#ibcon#read 6, iclass 40, count 0 2006.229.16:20:20.92#ibcon#end of sib2, iclass 40, count 0 2006.229.16:20:20.92#ibcon#*after write, iclass 40, count 0 2006.229.16:20:20.92#ibcon#*before return 0, iclass 40, count 0 2006.229.16:20:20.92#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:20.92#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:20:20.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:20:20.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:20:20.92$vck44/vblo=7,734.99 2006.229.16:20:20.92#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.16:20:20.92#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.16:20:20.92#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:20.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:20.92#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:20.92#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:20.92#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:20:20.92#ibcon#first serial, iclass 4, count 0 2006.229.16:20:20.92#ibcon#enter sib2, iclass 4, count 0 2006.229.16:20:20.92#ibcon#flushed, iclass 4, count 0 2006.229.16:20:20.92#ibcon#about to write, iclass 4, count 0 2006.229.16:20:20.92#ibcon#wrote, iclass 4, count 0 2006.229.16:20:20.92#ibcon#about to read 3, iclass 4, count 0 2006.229.16:20:20.94#ibcon#read 3, iclass 4, count 0 2006.229.16:20:20.94#ibcon#about to read 4, iclass 4, count 0 2006.229.16:20:20.94#ibcon#read 4, iclass 4, count 0 2006.229.16:20:20.94#ibcon#about to read 5, iclass 4, count 0 2006.229.16:20:20.94#ibcon#read 5, iclass 4, count 0 2006.229.16:20:20.94#ibcon#about to read 6, iclass 4, count 0 2006.229.16:20:20.94#ibcon#read 6, iclass 4, count 0 2006.229.16:20:20.94#ibcon#end of sib2, iclass 4, count 0 2006.229.16:20:20.94#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:20:20.94#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:20:20.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:20:20.94#ibcon#*before write, iclass 4, count 0 2006.229.16:20:20.94#ibcon#enter sib2, iclass 4, count 0 2006.229.16:20:20.94#ibcon#flushed, iclass 4, count 0 2006.229.16:20:20.94#ibcon#about to write, iclass 4, count 0 2006.229.16:20:20.94#ibcon#wrote, iclass 4, count 0 2006.229.16:20:20.94#ibcon#about to read 3, iclass 4, count 0 2006.229.16:20:20.98#ibcon#read 3, iclass 4, count 0 2006.229.16:20:20.98#ibcon#about to read 4, iclass 4, count 0 2006.229.16:20:20.98#ibcon#read 4, iclass 4, count 0 2006.229.16:20:20.98#ibcon#about to read 5, iclass 4, count 0 2006.229.16:20:20.98#ibcon#read 5, iclass 4, count 0 2006.229.16:20:20.98#ibcon#about to read 6, iclass 4, count 0 2006.229.16:20:20.98#ibcon#read 6, iclass 4, count 0 2006.229.16:20:20.98#ibcon#end of sib2, iclass 4, count 0 2006.229.16:20:20.98#ibcon#*after write, iclass 4, count 0 2006.229.16:20:20.98#ibcon#*before return 0, iclass 4, count 0 2006.229.16:20:20.98#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:20.98#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:20:20.98#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:20:20.98#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:20:20.98$vck44/vb=7,4 2006.229.16:20:20.98#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.16:20:20.98#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.16:20:20.98#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:20.98#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:21.04#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:21.04#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:21.04#ibcon#enter wrdev, iclass 6, count 2 2006.229.16:20:21.04#ibcon#first serial, iclass 6, count 2 2006.229.16:20:21.04#ibcon#enter sib2, iclass 6, count 2 2006.229.16:20:21.04#ibcon#flushed, iclass 6, count 2 2006.229.16:20:21.04#ibcon#about to write, iclass 6, count 2 2006.229.16:20:21.04#ibcon#wrote, iclass 6, count 2 2006.229.16:20:21.04#ibcon#about to read 3, iclass 6, count 2 2006.229.16:20:21.06#ibcon#read 3, iclass 6, count 2 2006.229.16:20:21.06#ibcon#about to read 4, iclass 6, count 2 2006.229.16:20:21.06#ibcon#read 4, iclass 6, count 2 2006.229.16:20:21.06#ibcon#about to read 5, iclass 6, count 2 2006.229.16:20:21.06#ibcon#read 5, iclass 6, count 2 2006.229.16:20:21.06#ibcon#about to read 6, iclass 6, count 2 2006.229.16:20:21.06#ibcon#read 6, iclass 6, count 2 2006.229.16:20:21.06#ibcon#end of sib2, iclass 6, count 2 2006.229.16:20:21.06#ibcon#*mode == 0, iclass 6, count 2 2006.229.16:20:21.06#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.16:20:21.06#ibcon#[27=AT07-04\r\n] 2006.229.16:20:21.06#ibcon#*before write, iclass 6, count 2 2006.229.16:20:21.06#ibcon#enter sib2, iclass 6, count 2 2006.229.16:20:21.06#ibcon#flushed, iclass 6, count 2 2006.229.16:20:21.06#ibcon#about to write, iclass 6, count 2 2006.229.16:20:21.06#ibcon#wrote, iclass 6, count 2 2006.229.16:20:21.06#ibcon#about to read 3, iclass 6, count 2 2006.229.16:20:21.09#ibcon#read 3, iclass 6, count 2 2006.229.16:20:21.09#ibcon#about to read 4, iclass 6, count 2 2006.229.16:20:21.09#ibcon#read 4, iclass 6, count 2 2006.229.16:20:21.09#ibcon#about to read 5, iclass 6, count 2 2006.229.16:20:21.09#ibcon#read 5, iclass 6, count 2 2006.229.16:20:21.09#ibcon#about to read 6, iclass 6, count 2 2006.229.16:20:21.09#ibcon#read 6, iclass 6, count 2 2006.229.16:20:21.09#ibcon#end of sib2, iclass 6, count 2 2006.229.16:20:21.09#ibcon#*after write, iclass 6, count 2 2006.229.16:20:21.09#ibcon#*before return 0, iclass 6, count 2 2006.229.16:20:21.09#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:21.09#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:20:21.09#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.16:20:21.09#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:21.09#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:21.21#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:21.21#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:21.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:20:21.21#ibcon#first serial, iclass 6, count 0 2006.229.16:20:21.21#ibcon#enter sib2, iclass 6, count 0 2006.229.16:20:21.21#ibcon#flushed, iclass 6, count 0 2006.229.16:20:21.21#ibcon#about to write, iclass 6, count 0 2006.229.16:20:21.21#ibcon#wrote, iclass 6, count 0 2006.229.16:20:21.21#ibcon#about to read 3, iclass 6, count 0 2006.229.16:20:21.23#ibcon#read 3, iclass 6, count 0 2006.229.16:20:21.23#ibcon#about to read 4, iclass 6, count 0 2006.229.16:20:21.23#ibcon#read 4, iclass 6, count 0 2006.229.16:20:21.23#ibcon#about to read 5, iclass 6, count 0 2006.229.16:20:21.23#ibcon#read 5, iclass 6, count 0 2006.229.16:20:21.23#ibcon#about to read 6, iclass 6, count 0 2006.229.16:20:21.23#ibcon#read 6, iclass 6, count 0 2006.229.16:20:21.23#ibcon#end of sib2, iclass 6, count 0 2006.229.16:20:21.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:20:21.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:20:21.23#ibcon#[27=USB\r\n] 2006.229.16:20:21.23#ibcon#*before write, iclass 6, count 0 2006.229.16:20:21.23#ibcon#enter sib2, iclass 6, count 0 2006.229.16:20:21.23#ibcon#flushed, iclass 6, count 0 2006.229.16:20:21.23#ibcon#about to write, iclass 6, count 0 2006.229.16:20:21.23#ibcon#wrote, iclass 6, count 0 2006.229.16:20:21.23#ibcon#about to read 3, iclass 6, count 0 2006.229.16:20:21.26#ibcon#read 3, iclass 6, count 0 2006.229.16:20:21.26#ibcon#about to read 4, iclass 6, count 0 2006.229.16:20:21.26#ibcon#read 4, iclass 6, count 0 2006.229.16:20:21.26#ibcon#about to read 5, iclass 6, count 0 2006.229.16:20:21.26#ibcon#read 5, iclass 6, count 0 2006.229.16:20:21.26#ibcon#about to read 6, iclass 6, count 0 2006.229.16:20:21.26#ibcon#read 6, iclass 6, count 0 2006.229.16:20:21.26#ibcon#end of sib2, iclass 6, count 0 2006.229.16:20:21.26#ibcon#*after write, iclass 6, count 0 2006.229.16:20:21.26#ibcon#*before return 0, iclass 6, count 0 2006.229.16:20:21.26#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:21.26#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:20:21.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:20:21.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:20:21.26$vck44/vblo=8,744.99 2006.229.16:20:21.26#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.16:20:21.26#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.16:20:21.26#ibcon#ireg 17 cls_cnt 0 2006.229.16:20:21.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:21.26#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:21.26#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:21.26#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:20:21.26#ibcon#first serial, iclass 10, count 0 2006.229.16:20:21.26#ibcon#enter sib2, iclass 10, count 0 2006.229.16:20:21.26#ibcon#flushed, iclass 10, count 0 2006.229.16:20:21.26#ibcon#about to write, iclass 10, count 0 2006.229.16:20:21.26#ibcon#wrote, iclass 10, count 0 2006.229.16:20:21.26#ibcon#about to read 3, iclass 10, count 0 2006.229.16:20:21.28#ibcon#read 3, iclass 10, count 0 2006.229.16:20:21.28#ibcon#about to read 4, iclass 10, count 0 2006.229.16:20:21.28#ibcon#read 4, iclass 10, count 0 2006.229.16:20:21.28#ibcon#about to read 5, iclass 10, count 0 2006.229.16:20:21.28#ibcon#read 5, iclass 10, count 0 2006.229.16:20:21.28#ibcon#about to read 6, iclass 10, count 0 2006.229.16:20:21.28#ibcon#read 6, iclass 10, count 0 2006.229.16:20:21.28#ibcon#end of sib2, iclass 10, count 0 2006.229.16:20:21.28#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:20:21.28#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:20:21.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:20:21.28#ibcon#*before write, iclass 10, count 0 2006.229.16:20:21.28#ibcon#enter sib2, iclass 10, count 0 2006.229.16:20:21.28#ibcon#flushed, iclass 10, count 0 2006.229.16:20:21.28#ibcon#about to write, iclass 10, count 0 2006.229.16:20:21.28#ibcon#wrote, iclass 10, count 0 2006.229.16:20:21.28#ibcon#about to read 3, iclass 10, count 0 2006.229.16:20:21.32#ibcon#read 3, iclass 10, count 0 2006.229.16:20:21.32#ibcon#about to read 4, iclass 10, count 0 2006.229.16:20:21.32#ibcon#read 4, iclass 10, count 0 2006.229.16:20:21.32#ibcon#about to read 5, iclass 10, count 0 2006.229.16:20:21.32#ibcon#read 5, iclass 10, count 0 2006.229.16:20:21.32#ibcon#about to read 6, iclass 10, count 0 2006.229.16:20:21.32#ibcon#read 6, iclass 10, count 0 2006.229.16:20:21.32#ibcon#end of sib2, iclass 10, count 0 2006.229.16:20:21.32#ibcon#*after write, iclass 10, count 0 2006.229.16:20:21.32#ibcon#*before return 0, iclass 10, count 0 2006.229.16:20:21.32#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:21.32#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:20:21.32#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:20:21.32#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:20:21.32$vck44/vb=8,4 2006.229.16:20:21.32#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.16:20:21.32#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.16:20:21.32#ibcon#ireg 11 cls_cnt 2 2006.229.16:20:21.32#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:21.38#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:21.38#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:21.38#ibcon#enter wrdev, iclass 12, count 2 2006.229.16:20:21.38#ibcon#first serial, iclass 12, count 2 2006.229.16:20:21.38#ibcon#enter sib2, iclass 12, count 2 2006.229.16:20:21.38#ibcon#flushed, iclass 12, count 2 2006.229.16:20:21.38#ibcon#about to write, iclass 12, count 2 2006.229.16:20:21.38#ibcon#wrote, iclass 12, count 2 2006.229.16:20:21.38#ibcon#about to read 3, iclass 12, count 2 2006.229.16:20:21.40#ibcon#read 3, iclass 12, count 2 2006.229.16:20:21.40#ibcon#about to read 4, iclass 12, count 2 2006.229.16:20:21.40#ibcon#read 4, iclass 12, count 2 2006.229.16:20:21.40#ibcon#about to read 5, iclass 12, count 2 2006.229.16:20:21.40#ibcon#read 5, iclass 12, count 2 2006.229.16:20:21.40#ibcon#about to read 6, iclass 12, count 2 2006.229.16:20:21.40#ibcon#read 6, iclass 12, count 2 2006.229.16:20:21.40#ibcon#end of sib2, iclass 12, count 2 2006.229.16:20:21.40#ibcon#*mode == 0, iclass 12, count 2 2006.229.16:20:21.40#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.16:20:21.40#ibcon#[27=AT08-04\r\n] 2006.229.16:20:21.40#ibcon#*before write, iclass 12, count 2 2006.229.16:20:21.40#ibcon#enter sib2, iclass 12, count 2 2006.229.16:20:21.40#ibcon#flushed, iclass 12, count 2 2006.229.16:20:21.40#ibcon#about to write, iclass 12, count 2 2006.229.16:20:21.40#ibcon#wrote, iclass 12, count 2 2006.229.16:20:21.40#ibcon#about to read 3, iclass 12, count 2 2006.229.16:20:21.43#ibcon#read 3, iclass 12, count 2 2006.229.16:20:21.43#ibcon#about to read 4, iclass 12, count 2 2006.229.16:20:21.43#ibcon#read 4, iclass 12, count 2 2006.229.16:20:21.43#ibcon#about to read 5, iclass 12, count 2 2006.229.16:20:21.43#ibcon#read 5, iclass 12, count 2 2006.229.16:20:21.43#ibcon#about to read 6, iclass 12, count 2 2006.229.16:20:21.43#ibcon#read 6, iclass 12, count 2 2006.229.16:20:21.43#ibcon#end of sib2, iclass 12, count 2 2006.229.16:20:21.43#ibcon#*after write, iclass 12, count 2 2006.229.16:20:21.43#ibcon#*before return 0, iclass 12, count 2 2006.229.16:20:21.43#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:21.43#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:20:21.43#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.16:20:21.43#ibcon#ireg 7 cls_cnt 0 2006.229.16:20:21.43#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:21.55#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:21.55#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:21.55#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:20:21.55#ibcon#first serial, iclass 12, count 0 2006.229.16:20:21.55#ibcon#enter sib2, iclass 12, count 0 2006.229.16:20:21.55#ibcon#flushed, iclass 12, count 0 2006.229.16:20:21.55#ibcon#about to write, iclass 12, count 0 2006.229.16:20:21.55#ibcon#wrote, iclass 12, count 0 2006.229.16:20:21.55#ibcon#about to read 3, iclass 12, count 0 2006.229.16:20:21.57#ibcon#read 3, iclass 12, count 0 2006.229.16:20:21.57#ibcon#about to read 4, iclass 12, count 0 2006.229.16:20:21.57#ibcon#read 4, iclass 12, count 0 2006.229.16:20:21.57#ibcon#about to read 5, iclass 12, count 0 2006.229.16:20:21.57#ibcon#read 5, iclass 12, count 0 2006.229.16:20:21.57#ibcon#about to read 6, iclass 12, count 0 2006.229.16:20:21.57#ibcon#read 6, iclass 12, count 0 2006.229.16:20:21.57#ibcon#end of sib2, iclass 12, count 0 2006.229.16:20:21.57#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:20:21.57#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:20:21.57#ibcon#[27=USB\r\n] 2006.229.16:20:21.57#ibcon#*before write, iclass 12, count 0 2006.229.16:20:21.57#ibcon#enter sib2, iclass 12, count 0 2006.229.16:20:21.57#ibcon#flushed, iclass 12, count 0 2006.229.16:20:21.57#ibcon#about to write, iclass 12, count 0 2006.229.16:20:21.57#ibcon#wrote, iclass 12, count 0 2006.229.16:20:21.57#ibcon#about to read 3, iclass 12, count 0 2006.229.16:20:21.60#ibcon#read 3, iclass 12, count 0 2006.229.16:20:21.60#ibcon#about to read 4, iclass 12, count 0 2006.229.16:20:21.60#ibcon#read 4, iclass 12, count 0 2006.229.16:20:21.60#ibcon#about to read 5, iclass 12, count 0 2006.229.16:20:21.60#ibcon#read 5, iclass 12, count 0 2006.229.16:20:21.60#ibcon#about to read 6, iclass 12, count 0 2006.229.16:20:21.60#ibcon#read 6, iclass 12, count 0 2006.229.16:20:21.60#ibcon#end of sib2, iclass 12, count 0 2006.229.16:20:21.60#ibcon#*after write, iclass 12, count 0 2006.229.16:20:21.60#ibcon#*before return 0, iclass 12, count 0 2006.229.16:20:21.60#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:21.60#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:20:21.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:20:21.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:20:21.60$vck44/vabw=wide 2006.229.16:20:21.60#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.16:20:21.60#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.16:20:21.60#ibcon#ireg 8 cls_cnt 0 2006.229.16:20:21.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:21.60#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:21.60#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:21.60#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:20:21.60#ibcon#first serial, iclass 14, count 0 2006.229.16:20:21.60#ibcon#enter sib2, iclass 14, count 0 2006.229.16:20:21.60#ibcon#flushed, iclass 14, count 0 2006.229.16:20:21.60#ibcon#about to write, iclass 14, count 0 2006.229.16:20:21.60#ibcon#wrote, iclass 14, count 0 2006.229.16:20:21.60#ibcon#about to read 3, iclass 14, count 0 2006.229.16:20:21.62#ibcon#read 3, iclass 14, count 0 2006.229.16:20:21.62#ibcon#about to read 4, iclass 14, count 0 2006.229.16:20:21.62#ibcon#read 4, iclass 14, count 0 2006.229.16:20:21.62#ibcon#about to read 5, iclass 14, count 0 2006.229.16:20:21.62#ibcon#read 5, iclass 14, count 0 2006.229.16:20:21.62#ibcon#about to read 6, iclass 14, count 0 2006.229.16:20:21.62#ibcon#read 6, iclass 14, count 0 2006.229.16:20:21.62#ibcon#end of sib2, iclass 14, count 0 2006.229.16:20:21.62#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:20:21.62#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:20:21.62#ibcon#[25=BW32\r\n] 2006.229.16:20:21.62#ibcon#*before write, iclass 14, count 0 2006.229.16:20:21.62#ibcon#enter sib2, iclass 14, count 0 2006.229.16:20:21.62#ibcon#flushed, iclass 14, count 0 2006.229.16:20:21.62#ibcon#about to write, iclass 14, count 0 2006.229.16:20:21.62#ibcon#wrote, iclass 14, count 0 2006.229.16:20:21.62#ibcon#about to read 3, iclass 14, count 0 2006.229.16:20:21.65#ibcon#read 3, iclass 14, count 0 2006.229.16:20:21.65#ibcon#about to read 4, iclass 14, count 0 2006.229.16:20:21.65#ibcon#read 4, iclass 14, count 0 2006.229.16:20:21.65#ibcon#about to read 5, iclass 14, count 0 2006.229.16:20:21.65#ibcon#read 5, iclass 14, count 0 2006.229.16:20:21.65#ibcon#about to read 6, iclass 14, count 0 2006.229.16:20:21.65#ibcon#read 6, iclass 14, count 0 2006.229.16:20:21.65#ibcon#end of sib2, iclass 14, count 0 2006.229.16:20:21.65#ibcon#*after write, iclass 14, count 0 2006.229.16:20:21.65#ibcon#*before return 0, iclass 14, count 0 2006.229.16:20:21.65#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:21.65#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:20:21.65#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:20:21.65#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:20:21.65$vck44/vbbw=wide 2006.229.16:20:21.65#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:20:21.65#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:20:21.65#ibcon#ireg 8 cls_cnt 0 2006.229.16:20:21.65#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:20:21.72#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:20:21.72#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:20:21.72#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:20:21.72#ibcon#first serial, iclass 16, count 0 2006.229.16:20:21.72#ibcon#enter sib2, iclass 16, count 0 2006.229.16:20:21.72#ibcon#flushed, iclass 16, count 0 2006.229.16:20:21.72#ibcon#about to write, iclass 16, count 0 2006.229.16:20:21.72#ibcon#wrote, iclass 16, count 0 2006.229.16:20:21.72#ibcon#about to read 3, iclass 16, count 0 2006.229.16:20:21.74#ibcon#read 3, iclass 16, count 0 2006.229.16:20:21.74#ibcon#about to read 4, iclass 16, count 0 2006.229.16:20:21.74#ibcon#read 4, iclass 16, count 0 2006.229.16:20:21.74#ibcon#about to read 5, iclass 16, count 0 2006.229.16:20:21.74#ibcon#read 5, iclass 16, count 0 2006.229.16:20:21.74#ibcon#about to read 6, iclass 16, count 0 2006.229.16:20:21.74#ibcon#read 6, iclass 16, count 0 2006.229.16:20:21.74#ibcon#end of sib2, iclass 16, count 0 2006.229.16:20:21.74#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:20:21.74#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:20:21.74#ibcon#[27=BW32\r\n] 2006.229.16:20:21.74#ibcon#*before write, iclass 16, count 0 2006.229.16:20:21.74#ibcon#enter sib2, iclass 16, count 0 2006.229.16:20:21.74#ibcon#flushed, iclass 16, count 0 2006.229.16:20:21.74#ibcon#about to write, iclass 16, count 0 2006.229.16:20:21.74#ibcon#wrote, iclass 16, count 0 2006.229.16:20:21.74#ibcon#about to read 3, iclass 16, count 0 2006.229.16:20:21.77#ibcon#read 3, iclass 16, count 0 2006.229.16:20:21.77#ibcon#about to read 4, iclass 16, count 0 2006.229.16:20:21.77#ibcon#read 4, iclass 16, count 0 2006.229.16:20:21.77#ibcon#about to read 5, iclass 16, count 0 2006.229.16:20:21.77#ibcon#read 5, iclass 16, count 0 2006.229.16:20:21.77#ibcon#about to read 6, iclass 16, count 0 2006.229.16:20:21.77#ibcon#read 6, iclass 16, count 0 2006.229.16:20:21.77#ibcon#end of sib2, iclass 16, count 0 2006.229.16:20:21.77#ibcon#*after write, iclass 16, count 0 2006.229.16:20:21.77#ibcon#*before return 0, iclass 16, count 0 2006.229.16:20:21.77#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:20:21.77#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:20:21.77#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:20:21.77#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:20:21.77$setupk4/ifdk4 2006.229.16:20:21.77$ifdk4/lo= 2006.229.16:20:21.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:20:21.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:20:21.77$ifdk4/patch= 2006.229.16:20:21.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:20:21.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:20:21.77$setupk4/!*+20s 2006.229.16:20:23.95#abcon#<5=/05 1.5 2.5 27.191001001.9\r\n> 2006.229.16:20:23.97#abcon#{5=INTERFACE CLEAR} 2006.229.16:20:24.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:20:30.14#trakl#Source acquired 2006.229.16:20:32.14#flagr#flagr/antenna,acquired 2006.229.16:20:34.12#abcon#<5=/05 1.5 2.5 27.191001001.9\r\n> 2006.229.16:20:34.14#abcon#{5=INTERFACE CLEAR} 2006.229.16:20:34.20#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:20:36.25$setupk4/"tpicd 2006.229.16:20:36.25$setupk4/echo=off 2006.229.16:20:36.25$setupk4/xlog=off 2006.229.16:20:36.25:!2006.229.16:22:33 2006.229.16:22:33.00:preob 2006.229.16:22:33.14/onsource/TRACKING 2006.229.16:22:33.14:!2006.229.16:22:43 2006.229.16:22:43.00:"tape 2006.229.16:22:43.00:"st=record 2006.229.16:22:43.00:data_valid=on 2006.229.16:22:43.00:midob 2006.229.16:22:44.14/onsource/TRACKING 2006.229.16:22:44.14/wx/27.18,1001.9,100 2006.229.16:22:44.31/cable/+6.4149E-03 2006.229.16:22:45.40/va/01,08,usb,yes,29,31 2006.229.16:22:45.40/va/02,07,usb,yes,31,32 2006.229.16:22:45.40/va/03,06,usb,yes,39,42 2006.229.16:22:45.40/va/04,07,usb,yes,32,34 2006.229.16:22:45.40/va/05,04,usb,yes,29,29 2006.229.16:22:45.40/va/06,04,usb,yes,32,32 2006.229.16:22:45.40/va/07,05,usb,yes,29,29 2006.229.16:22:45.40/va/08,06,usb,yes,21,26 2006.229.16:22:45.63/valo/01,524.99,yes,locked 2006.229.16:22:45.63/valo/02,534.99,yes,locked 2006.229.16:22:45.63/valo/03,564.99,yes,locked 2006.229.16:22:45.63/valo/04,624.99,yes,locked 2006.229.16:22:45.63/valo/05,734.99,yes,locked 2006.229.16:22:45.63/valo/06,814.99,yes,locked 2006.229.16:22:45.63/valo/07,864.99,yes,locked 2006.229.16:22:45.63/valo/08,884.99,yes,locked 2006.229.16:22:46.72/vb/01,04,usb,yes,30,28 2006.229.16:22:46.72/vb/02,04,usb,yes,33,33 2006.229.16:22:46.72/vb/03,04,usb,yes,30,33 2006.229.16:22:46.72/vb/04,04,usb,yes,34,33 2006.229.16:22:46.72/vb/05,04,usb,yes,26,29 2006.229.16:22:46.72/vb/06,04,usb,yes,31,27 2006.229.16:22:46.72/vb/07,04,usb,yes,31,31 2006.229.16:22:46.72/vb/08,04,usb,yes,28,32 2006.229.16:22:46.95/vblo/01,629.99,yes,locked 2006.229.16:22:46.95/vblo/02,634.99,yes,locked 2006.229.16:22:46.95/vblo/03,649.99,yes,locked 2006.229.16:22:46.95/vblo/04,679.99,yes,locked 2006.229.16:22:46.95/vblo/05,709.99,yes,locked 2006.229.16:22:46.95/vblo/06,719.99,yes,locked 2006.229.16:22:46.95/vblo/07,734.99,yes,locked 2006.229.16:22:46.95/vblo/08,744.99,yes,locked 2006.229.16:22:47.10/vabw/8 2006.229.16:22:47.25/vbbw/8 2006.229.16:22:47.34/xfe/off,on,12.2 2006.229.16:22:47.71/ifatt/23,28,28,28 2006.229.16:22:48.08/fmout-gps/S +4.51E-07 2006.229.16:22:48.12:!2006.229.16:24:03 2006.229.16:24:03.00:data_valid=off 2006.229.16:24:03.00:"et 2006.229.16:24:03.00:!+3s 2006.229.16:24:06.01:"tape 2006.229.16:24:06.01:postob 2006.229.16:24:06.09/cable/+6.4142E-03 2006.229.16:24:06.09/wx/27.18,1001.9,100 2006.229.16:24:07.08/fmout-gps/S +4.52E-07 2006.229.16:24:07.08:scan_name=229-1628,jd0608,140 2006.229.16:24:07.08:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.16:24:08.13#flagr#flagr/antenna,new-source 2006.229.16:24:08.13:checkk5 2006.229.16:24:08.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:24:08.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:24:09.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:24:09.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:24:10.10/chk_obsdata//k5ts1/T2291622??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.16:24:10.51/chk_obsdata//k5ts2/T2291622??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.16:24:10.91/chk_obsdata//k5ts3/T2291622??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.16:24:11.31/chk_obsdata//k5ts4/T2291622??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.16:24:12.01/k5log//k5ts1_log_newline 2006.229.16:24:12.73/k5log//k5ts2_log_newline 2006.229.16:24:13.44/k5log//k5ts3_log_newline 2006.229.16:24:14.14/k5log//k5ts4_log_newline 2006.229.16:24:14.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:24:14.16:setupk4=1 2006.229.16:24:14.16$setupk4/echo=on 2006.229.16:24:14.16$setupk4/pcalon 2006.229.16:24:14.16$pcalon/"no phase cal control is implemented here 2006.229.16:24:14.17$setupk4/"tpicd=stop 2006.229.16:24:14.17$setupk4/"rec=synch_on 2006.229.16:24:14.17$setupk4/"rec_mode=128 2006.229.16:24:14.17$setupk4/!* 2006.229.16:24:14.17$setupk4/recpk4 2006.229.16:24:14.17$recpk4/recpatch= 2006.229.16:24:14.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:24:14.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:24:14.17$setupk4/vck44 2006.229.16:24:14.17$vck44/valo=1,524.99 2006.229.16:24:14.17#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.16:24:14.17#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.16:24:14.17#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:14.17#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:14.17#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:14.17#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:14.17#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:24:14.17#ibcon#first serial, iclass 3, count 0 2006.229.16:24:14.17#ibcon#enter sib2, iclass 3, count 0 2006.229.16:24:14.17#ibcon#flushed, iclass 3, count 0 2006.229.16:24:14.17#ibcon#about to write, iclass 3, count 0 2006.229.16:24:14.17#ibcon#wrote, iclass 3, count 0 2006.229.16:24:14.17#ibcon#about to read 3, iclass 3, count 0 2006.229.16:24:14.19#ibcon#read 3, iclass 3, count 0 2006.229.16:24:14.19#ibcon#about to read 4, iclass 3, count 0 2006.229.16:24:14.19#ibcon#read 4, iclass 3, count 0 2006.229.16:24:14.19#ibcon#about to read 5, iclass 3, count 0 2006.229.16:24:14.19#ibcon#read 5, iclass 3, count 0 2006.229.16:24:14.19#ibcon#about to read 6, iclass 3, count 0 2006.229.16:24:14.19#ibcon#read 6, iclass 3, count 0 2006.229.16:24:14.19#ibcon#end of sib2, iclass 3, count 0 2006.229.16:24:14.19#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:24:14.19#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:24:14.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:24:14.19#ibcon#*before write, iclass 3, count 0 2006.229.16:24:14.19#ibcon#enter sib2, iclass 3, count 0 2006.229.16:24:14.19#ibcon#flushed, iclass 3, count 0 2006.229.16:24:14.19#ibcon#about to write, iclass 3, count 0 2006.229.16:24:14.19#ibcon#wrote, iclass 3, count 0 2006.229.16:24:14.19#ibcon#about to read 3, iclass 3, count 0 2006.229.16:24:14.24#ibcon#read 3, iclass 3, count 0 2006.229.16:24:14.24#ibcon#about to read 4, iclass 3, count 0 2006.229.16:24:14.24#ibcon#read 4, iclass 3, count 0 2006.229.16:24:14.24#ibcon#about to read 5, iclass 3, count 0 2006.229.16:24:14.24#ibcon#read 5, iclass 3, count 0 2006.229.16:24:14.24#ibcon#about to read 6, iclass 3, count 0 2006.229.16:24:14.24#ibcon#read 6, iclass 3, count 0 2006.229.16:24:14.24#ibcon#end of sib2, iclass 3, count 0 2006.229.16:24:14.24#ibcon#*after write, iclass 3, count 0 2006.229.16:24:14.24#ibcon#*before return 0, iclass 3, count 0 2006.229.16:24:14.24#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:14.24#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:14.24#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:24:14.24#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:24:14.24$vck44/va=1,8 2006.229.16:24:14.24#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.16:24:14.24#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.16:24:14.24#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:14.24#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:14.24#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:14.24#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:14.24#ibcon#enter wrdev, iclass 5, count 2 2006.229.16:24:14.24#ibcon#first serial, iclass 5, count 2 2006.229.16:24:14.24#ibcon#enter sib2, iclass 5, count 2 2006.229.16:24:14.24#ibcon#flushed, iclass 5, count 2 2006.229.16:24:14.24#ibcon#about to write, iclass 5, count 2 2006.229.16:24:14.24#ibcon#wrote, iclass 5, count 2 2006.229.16:24:14.24#ibcon#about to read 3, iclass 5, count 2 2006.229.16:24:14.26#ibcon#read 3, iclass 5, count 2 2006.229.16:24:14.26#ibcon#about to read 4, iclass 5, count 2 2006.229.16:24:14.26#ibcon#read 4, iclass 5, count 2 2006.229.16:24:14.26#ibcon#about to read 5, iclass 5, count 2 2006.229.16:24:14.26#ibcon#read 5, iclass 5, count 2 2006.229.16:24:14.26#ibcon#about to read 6, iclass 5, count 2 2006.229.16:24:14.26#ibcon#read 6, iclass 5, count 2 2006.229.16:24:14.26#ibcon#end of sib2, iclass 5, count 2 2006.229.16:24:14.26#ibcon#*mode == 0, iclass 5, count 2 2006.229.16:24:14.26#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.16:24:14.26#ibcon#[25=AT01-08\r\n] 2006.229.16:24:14.26#ibcon#*before write, iclass 5, count 2 2006.229.16:24:14.26#ibcon#enter sib2, iclass 5, count 2 2006.229.16:24:14.26#ibcon#flushed, iclass 5, count 2 2006.229.16:24:14.26#ibcon#about to write, iclass 5, count 2 2006.229.16:24:14.26#ibcon#wrote, iclass 5, count 2 2006.229.16:24:14.26#ibcon#about to read 3, iclass 5, count 2 2006.229.16:24:14.29#ibcon#read 3, iclass 5, count 2 2006.229.16:24:14.29#ibcon#about to read 4, iclass 5, count 2 2006.229.16:24:14.29#ibcon#read 4, iclass 5, count 2 2006.229.16:24:14.29#ibcon#about to read 5, iclass 5, count 2 2006.229.16:24:14.29#ibcon#read 5, iclass 5, count 2 2006.229.16:24:14.29#ibcon#about to read 6, iclass 5, count 2 2006.229.16:24:14.29#ibcon#read 6, iclass 5, count 2 2006.229.16:24:14.29#ibcon#end of sib2, iclass 5, count 2 2006.229.16:24:14.29#ibcon#*after write, iclass 5, count 2 2006.229.16:24:14.29#ibcon#*before return 0, iclass 5, count 2 2006.229.16:24:14.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:14.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:14.29#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.16:24:14.29#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:14.29#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:14.41#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:14.41#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:14.41#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:24:14.41#ibcon#first serial, iclass 5, count 0 2006.229.16:24:14.41#ibcon#enter sib2, iclass 5, count 0 2006.229.16:24:14.41#ibcon#flushed, iclass 5, count 0 2006.229.16:24:14.41#ibcon#about to write, iclass 5, count 0 2006.229.16:24:14.41#ibcon#wrote, iclass 5, count 0 2006.229.16:24:14.41#ibcon#about to read 3, iclass 5, count 0 2006.229.16:24:14.43#ibcon#read 3, iclass 5, count 0 2006.229.16:24:14.43#ibcon#about to read 4, iclass 5, count 0 2006.229.16:24:14.43#ibcon#read 4, iclass 5, count 0 2006.229.16:24:14.43#ibcon#about to read 5, iclass 5, count 0 2006.229.16:24:14.43#ibcon#read 5, iclass 5, count 0 2006.229.16:24:14.43#ibcon#about to read 6, iclass 5, count 0 2006.229.16:24:14.43#ibcon#read 6, iclass 5, count 0 2006.229.16:24:14.43#ibcon#end of sib2, iclass 5, count 0 2006.229.16:24:14.43#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:24:14.43#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:24:14.43#ibcon#[25=USB\r\n] 2006.229.16:24:14.43#ibcon#*before write, iclass 5, count 0 2006.229.16:24:14.43#ibcon#enter sib2, iclass 5, count 0 2006.229.16:24:14.43#ibcon#flushed, iclass 5, count 0 2006.229.16:24:14.43#ibcon#about to write, iclass 5, count 0 2006.229.16:24:14.43#ibcon#wrote, iclass 5, count 0 2006.229.16:24:14.43#ibcon#about to read 3, iclass 5, count 0 2006.229.16:24:14.46#ibcon#read 3, iclass 5, count 0 2006.229.16:24:14.46#ibcon#about to read 4, iclass 5, count 0 2006.229.16:24:14.46#ibcon#read 4, iclass 5, count 0 2006.229.16:24:14.46#ibcon#about to read 5, iclass 5, count 0 2006.229.16:24:14.46#ibcon#read 5, iclass 5, count 0 2006.229.16:24:14.46#ibcon#about to read 6, iclass 5, count 0 2006.229.16:24:14.46#ibcon#read 6, iclass 5, count 0 2006.229.16:24:14.46#ibcon#end of sib2, iclass 5, count 0 2006.229.16:24:14.46#ibcon#*after write, iclass 5, count 0 2006.229.16:24:14.46#ibcon#*before return 0, iclass 5, count 0 2006.229.16:24:14.46#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:14.46#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:14.46#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:24:14.46#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:24:14.46$vck44/valo=2,534.99 2006.229.16:24:14.46#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.16:24:14.46#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.16:24:14.46#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:14.46#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:14.46#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:14.46#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:14.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:24:14.46#ibcon#first serial, iclass 7, count 0 2006.229.16:24:14.46#ibcon#enter sib2, iclass 7, count 0 2006.229.16:24:14.46#ibcon#flushed, iclass 7, count 0 2006.229.16:24:14.46#ibcon#about to write, iclass 7, count 0 2006.229.16:24:14.46#ibcon#wrote, iclass 7, count 0 2006.229.16:24:14.46#ibcon#about to read 3, iclass 7, count 0 2006.229.16:24:14.48#ibcon#read 3, iclass 7, count 0 2006.229.16:24:14.48#ibcon#about to read 4, iclass 7, count 0 2006.229.16:24:14.48#ibcon#read 4, iclass 7, count 0 2006.229.16:24:14.48#ibcon#about to read 5, iclass 7, count 0 2006.229.16:24:14.48#ibcon#read 5, iclass 7, count 0 2006.229.16:24:14.48#ibcon#about to read 6, iclass 7, count 0 2006.229.16:24:14.48#ibcon#read 6, iclass 7, count 0 2006.229.16:24:14.48#ibcon#end of sib2, iclass 7, count 0 2006.229.16:24:14.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:24:14.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:24:14.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:24:14.48#ibcon#*before write, iclass 7, count 0 2006.229.16:24:14.48#ibcon#enter sib2, iclass 7, count 0 2006.229.16:24:14.48#ibcon#flushed, iclass 7, count 0 2006.229.16:24:14.48#ibcon#about to write, iclass 7, count 0 2006.229.16:24:14.48#ibcon#wrote, iclass 7, count 0 2006.229.16:24:14.48#ibcon#about to read 3, iclass 7, count 0 2006.229.16:24:14.52#ibcon#read 3, iclass 7, count 0 2006.229.16:24:14.52#ibcon#about to read 4, iclass 7, count 0 2006.229.16:24:14.52#ibcon#read 4, iclass 7, count 0 2006.229.16:24:14.52#ibcon#about to read 5, iclass 7, count 0 2006.229.16:24:14.52#ibcon#read 5, iclass 7, count 0 2006.229.16:24:14.52#ibcon#about to read 6, iclass 7, count 0 2006.229.16:24:14.52#ibcon#read 6, iclass 7, count 0 2006.229.16:24:14.52#ibcon#end of sib2, iclass 7, count 0 2006.229.16:24:14.52#ibcon#*after write, iclass 7, count 0 2006.229.16:24:14.52#ibcon#*before return 0, iclass 7, count 0 2006.229.16:24:14.52#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:14.52#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:14.52#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:24:14.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:24:14.52$vck44/va=2,7 2006.229.16:24:14.52#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.16:24:14.52#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.16:24:14.52#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:14.52#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:14.58#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:14.58#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:14.58#ibcon#enter wrdev, iclass 11, count 2 2006.229.16:24:14.58#ibcon#first serial, iclass 11, count 2 2006.229.16:24:14.58#ibcon#enter sib2, iclass 11, count 2 2006.229.16:24:14.58#ibcon#flushed, iclass 11, count 2 2006.229.16:24:14.58#ibcon#about to write, iclass 11, count 2 2006.229.16:24:14.58#ibcon#wrote, iclass 11, count 2 2006.229.16:24:14.58#ibcon#about to read 3, iclass 11, count 2 2006.229.16:24:14.60#ibcon#read 3, iclass 11, count 2 2006.229.16:24:14.60#ibcon#about to read 4, iclass 11, count 2 2006.229.16:24:14.60#ibcon#read 4, iclass 11, count 2 2006.229.16:24:14.60#ibcon#about to read 5, iclass 11, count 2 2006.229.16:24:14.60#ibcon#read 5, iclass 11, count 2 2006.229.16:24:14.60#ibcon#about to read 6, iclass 11, count 2 2006.229.16:24:14.60#ibcon#read 6, iclass 11, count 2 2006.229.16:24:14.60#ibcon#end of sib2, iclass 11, count 2 2006.229.16:24:14.60#ibcon#*mode == 0, iclass 11, count 2 2006.229.16:24:14.60#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.16:24:14.60#ibcon#[25=AT02-07\r\n] 2006.229.16:24:14.60#ibcon#*before write, iclass 11, count 2 2006.229.16:24:14.60#ibcon#enter sib2, iclass 11, count 2 2006.229.16:24:14.60#ibcon#flushed, iclass 11, count 2 2006.229.16:24:14.60#ibcon#about to write, iclass 11, count 2 2006.229.16:24:14.60#ibcon#wrote, iclass 11, count 2 2006.229.16:24:14.60#ibcon#about to read 3, iclass 11, count 2 2006.229.16:24:14.63#ibcon#read 3, iclass 11, count 2 2006.229.16:24:14.63#ibcon#about to read 4, iclass 11, count 2 2006.229.16:24:14.63#ibcon#read 4, iclass 11, count 2 2006.229.16:24:14.63#ibcon#about to read 5, iclass 11, count 2 2006.229.16:24:14.63#ibcon#read 5, iclass 11, count 2 2006.229.16:24:14.63#ibcon#about to read 6, iclass 11, count 2 2006.229.16:24:14.63#ibcon#read 6, iclass 11, count 2 2006.229.16:24:14.63#ibcon#end of sib2, iclass 11, count 2 2006.229.16:24:14.63#ibcon#*after write, iclass 11, count 2 2006.229.16:24:14.63#ibcon#*before return 0, iclass 11, count 2 2006.229.16:24:14.63#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:14.63#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:14.63#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.16:24:14.63#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:14.63#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:14.75#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:14.75#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:14.75#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:24:14.75#ibcon#first serial, iclass 11, count 0 2006.229.16:24:14.75#ibcon#enter sib2, iclass 11, count 0 2006.229.16:24:14.75#ibcon#flushed, iclass 11, count 0 2006.229.16:24:14.75#ibcon#about to write, iclass 11, count 0 2006.229.16:24:14.75#ibcon#wrote, iclass 11, count 0 2006.229.16:24:14.75#ibcon#about to read 3, iclass 11, count 0 2006.229.16:24:14.77#ibcon#read 3, iclass 11, count 0 2006.229.16:24:14.77#ibcon#about to read 4, iclass 11, count 0 2006.229.16:24:14.77#ibcon#read 4, iclass 11, count 0 2006.229.16:24:14.77#ibcon#about to read 5, iclass 11, count 0 2006.229.16:24:14.77#ibcon#read 5, iclass 11, count 0 2006.229.16:24:14.77#ibcon#about to read 6, iclass 11, count 0 2006.229.16:24:14.77#ibcon#read 6, iclass 11, count 0 2006.229.16:24:14.77#ibcon#end of sib2, iclass 11, count 0 2006.229.16:24:14.77#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:24:14.77#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:24:14.77#ibcon#[25=USB\r\n] 2006.229.16:24:14.77#ibcon#*before write, iclass 11, count 0 2006.229.16:24:14.77#ibcon#enter sib2, iclass 11, count 0 2006.229.16:24:14.77#ibcon#flushed, iclass 11, count 0 2006.229.16:24:14.77#ibcon#about to write, iclass 11, count 0 2006.229.16:24:14.77#ibcon#wrote, iclass 11, count 0 2006.229.16:24:14.77#ibcon#about to read 3, iclass 11, count 0 2006.229.16:24:14.80#ibcon#read 3, iclass 11, count 0 2006.229.16:24:14.80#ibcon#about to read 4, iclass 11, count 0 2006.229.16:24:14.80#ibcon#read 4, iclass 11, count 0 2006.229.16:24:14.80#ibcon#about to read 5, iclass 11, count 0 2006.229.16:24:14.80#ibcon#read 5, iclass 11, count 0 2006.229.16:24:14.80#ibcon#about to read 6, iclass 11, count 0 2006.229.16:24:14.80#ibcon#read 6, iclass 11, count 0 2006.229.16:24:14.80#ibcon#end of sib2, iclass 11, count 0 2006.229.16:24:14.80#ibcon#*after write, iclass 11, count 0 2006.229.16:24:14.80#ibcon#*before return 0, iclass 11, count 0 2006.229.16:24:14.80#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:14.80#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:14.80#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:24:14.80#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:24:14.80$vck44/valo=3,564.99 2006.229.16:24:14.80#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.16:24:14.80#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.16:24:14.80#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:14.80#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:14.80#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:14.80#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:14.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:24:14.80#ibcon#first serial, iclass 13, count 0 2006.229.16:24:14.80#ibcon#enter sib2, iclass 13, count 0 2006.229.16:24:14.80#ibcon#flushed, iclass 13, count 0 2006.229.16:24:14.80#ibcon#about to write, iclass 13, count 0 2006.229.16:24:14.80#ibcon#wrote, iclass 13, count 0 2006.229.16:24:14.80#ibcon#about to read 3, iclass 13, count 0 2006.229.16:24:14.82#ibcon#read 3, iclass 13, count 0 2006.229.16:24:14.82#ibcon#about to read 4, iclass 13, count 0 2006.229.16:24:14.82#ibcon#read 4, iclass 13, count 0 2006.229.16:24:14.82#ibcon#about to read 5, iclass 13, count 0 2006.229.16:24:14.82#ibcon#read 5, iclass 13, count 0 2006.229.16:24:14.82#ibcon#about to read 6, iclass 13, count 0 2006.229.16:24:14.82#ibcon#read 6, iclass 13, count 0 2006.229.16:24:14.82#ibcon#end of sib2, iclass 13, count 0 2006.229.16:24:14.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:24:14.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:24:14.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:24:14.82#ibcon#*before write, iclass 13, count 0 2006.229.16:24:14.82#ibcon#enter sib2, iclass 13, count 0 2006.229.16:24:14.82#ibcon#flushed, iclass 13, count 0 2006.229.16:24:14.82#ibcon#about to write, iclass 13, count 0 2006.229.16:24:14.82#ibcon#wrote, iclass 13, count 0 2006.229.16:24:14.82#ibcon#about to read 3, iclass 13, count 0 2006.229.16:24:14.86#ibcon#read 3, iclass 13, count 0 2006.229.16:24:14.86#ibcon#about to read 4, iclass 13, count 0 2006.229.16:24:14.86#ibcon#read 4, iclass 13, count 0 2006.229.16:24:14.86#ibcon#about to read 5, iclass 13, count 0 2006.229.16:24:14.86#ibcon#read 5, iclass 13, count 0 2006.229.16:24:14.86#ibcon#about to read 6, iclass 13, count 0 2006.229.16:24:14.86#ibcon#read 6, iclass 13, count 0 2006.229.16:24:14.86#ibcon#end of sib2, iclass 13, count 0 2006.229.16:24:14.86#ibcon#*after write, iclass 13, count 0 2006.229.16:24:14.86#ibcon#*before return 0, iclass 13, count 0 2006.229.16:24:14.86#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:14.86#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:14.86#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:24:14.86#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:24:14.86$vck44/va=3,6 2006.229.16:24:14.86#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.16:24:14.86#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.16:24:14.86#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:14.86#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:24:14.92#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:24:14.92#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:24:14.92#ibcon#enter wrdev, iclass 15, count 2 2006.229.16:24:14.92#ibcon#first serial, iclass 15, count 2 2006.229.16:24:14.92#ibcon#enter sib2, iclass 15, count 2 2006.229.16:24:14.92#ibcon#flushed, iclass 15, count 2 2006.229.16:24:14.92#ibcon#about to write, iclass 15, count 2 2006.229.16:24:14.92#ibcon#wrote, iclass 15, count 2 2006.229.16:24:14.92#ibcon#about to read 3, iclass 15, count 2 2006.229.16:24:14.94#ibcon#read 3, iclass 15, count 2 2006.229.16:24:14.94#ibcon#about to read 4, iclass 15, count 2 2006.229.16:24:14.94#ibcon#read 4, iclass 15, count 2 2006.229.16:24:14.94#ibcon#about to read 5, iclass 15, count 2 2006.229.16:24:14.94#ibcon#read 5, iclass 15, count 2 2006.229.16:24:14.94#ibcon#about to read 6, iclass 15, count 2 2006.229.16:24:14.94#ibcon#read 6, iclass 15, count 2 2006.229.16:24:14.94#ibcon#end of sib2, iclass 15, count 2 2006.229.16:24:14.94#ibcon#*mode == 0, iclass 15, count 2 2006.229.16:24:14.94#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.16:24:14.94#ibcon#[25=AT03-06\r\n] 2006.229.16:24:14.94#ibcon#*before write, iclass 15, count 2 2006.229.16:24:14.94#ibcon#enter sib2, iclass 15, count 2 2006.229.16:24:14.94#ibcon#flushed, iclass 15, count 2 2006.229.16:24:14.94#ibcon#about to write, iclass 15, count 2 2006.229.16:24:14.94#ibcon#wrote, iclass 15, count 2 2006.229.16:24:14.94#ibcon#about to read 3, iclass 15, count 2 2006.229.16:24:14.97#ibcon#read 3, iclass 15, count 2 2006.229.16:24:14.97#ibcon#about to read 4, iclass 15, count 2 2006.229.16:24:14.97#ibcon#read 4, iclass 15, count 2 2006.229.16:24:14.97#ibcon#about to read 5, iclass 15, count 2 2006.229.16:24:14.97#ibcon#read 5, iclass 15, count 2 2006.229.16:24:14.97#ibcon#about to read 6, iclass 15, count 2 2006.229.16:24:14.97#ibcon#read 6, iclass 15, count 2 2006.229.16:24:14.97#ibcon#end of sib2, iclass 15, count 2 2006.229.16:24:14.97#ibcon#*after write, iclass 15, count 2 2006.229.16:24:14.97#ibcon#*before return 0, iclass 15, count 2 2006.229.16:24:14.97#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:24:14.97#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:24:14.97#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.16:24:14.97#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:14.97#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:24:15.09#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:24:15.09#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:24:15.09#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:24:15.09#ibcon#first serial, iclass 15, count 0 2006.229.16:24:15.09#ibcon#enter sib2, iclass 15, count 0 2006.229.16:24:15.09#ibcon#flushed, iclass 15, count 0 2006.229.16:24:15.09#ibcon#about to write, iclass 15, count 0 2006.229.16:24:15.09#ibcon#wrote, iclass 15, count 0 2006.229.16:24:15.09#ibcon#about to read 3, iclass 15, count 0 2006.229.16:24:15.11#ibcon#read 3, iclass 15, count 0 2006.229.16:24:15.11#ibcon#about to read 4, iclass 15, count 0 2006.229.16:24:15.11#ibcon#read 4, iclass 15, count 0 2006.229.16:24:15.11#ibcon#about to read 5, iclass 15, count 0 2006.229.16:24:15.11#ibcon#read 5, iclass 15, count 0 2006.229.16:24:15.11#ibcon#about to read 6, iclass 15, count 0 2006.229.16:24:15.11#ibcon#read 6, iclass 15, count 0 2006.229.16:24:15.11#ibcon#end of sib2, iclass 15, count 0 2006.229.16:24:15.11#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:24:15.11#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:24:15.11#ibcon#[25=USB\r\n] 2006.229.16:24:15.11#ibcon#*before write, iclass 15, count 0 2006.229.16:24:15.11#ibcon#enter sib2, iclass 15, count 0 2006.229.16:24:15.11#ibcon#flushed, iclass 15, count 0 2006.229.16:24:15.11#ibcon#about to write, iclass 15, count 0 2006.229.16:24:15.11#ibcon#wrote, iclass 15, count 0 2006.229.16:24:15.11#ibcon#about to read 3, iclass 15, count 0 2006.229.16:24:15.14#ibcon#read 3, iclass 15, count 0 2006.229.16:24:15.14#ibcon#about to read 4, iclass 15, count 0 2006.229.16:24:15.14#ibcon#read 4, iclass 15, count 0 2006.229.16:24:15.14#ibcon#about to read 5, iclass 15, count 0 2006.229.16:24:15.14#ibcon#read 5, iclass 15, count 0 2006.229.16:24:15.14#ibcon#about to read 6, iclass 15, count 0 2006.229.16:24:15.14#ibcon#read 6, iclass 15, count 0 2006.229.16:24:15.14#ibcon#end of sib2, iclass 15, count 0 2006.229.16:24:15.14#ibcon#*after write, iclass 15, count 0 2006.229.16:24:15.14#ibcon#*before return 0, iclass 15, count 0 2006.229.16:24:15.14#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:24:15.14#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:24:15.14#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:24:15.14#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:24:15.14$vck44/valo=4,624.99 2006.229.16:24:15.14#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.16:24:15.14#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.16:24:15.14#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:15.14#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:24:15.14#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:24:15.14#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:24:15.14#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:24:15.14#ibcon#first serial, iclass 17, count 0 2006.229.16:24:15.14#ibcon#enter sib2, iclass 17, count 0 2006.229.16:24:15.14#ibcon#flushed, iclass 17, count 0 2006.229.16:24:15.14#ibcon#about to write, iclass 17, count 0 2006.229.16:24:15.14#ibcon#wrote, iclass 17, count 0 2006.229.16:24:15.14#ibcon#about to read 3, iclass 17, count 0 2006.229.16:24:15.16#ibcon#read 3, iclass 17, count 0 2006.229.16:24:15.16#ibcon#about to read 4, iclass 17, count 0 2006.229.16:24:15.16#ibcon#read 4, iclass 17, count 0 2006.229.16:24:15.16#ibcon#about to read 5, iclass 17, count 0 2006.229.16:24:15.16#ibcon#read 5, iclass 17, count 0 2006.229.16:24:15.16#ibcon#about to read 6, iclass 17, count 0 2006.229.16:24:15.16#ibcon#read 6, iclass 17, count 0 2006.229.16:24:15.16#ibcon#end of sib2, iclass 17, count 0 2006.229.16:24:15.16#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:24:15.16#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:24:15.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:24:15.16#ibcon#*before write, iclass 17, count 0 2006.229.16:24:15.16#ibcon#enter sib2, iclass 17, count 0 2006.229.16:24:15.16#ibcon#flushed, iclass 17, count 0 2006.229.16:24:15.16#ibcon#about to write, iclass 17, count 0 2006.229.16:24:15.16#ibcon#wrote, iclass 17, count 0 2006.229.16:24:15.16#ibcon#about to read 3, iclass 17, count 0 2006.229.16:24:15.20#ibcon#read 3, iclass 17, count 0 2006.229.16:24:15.20#ibcon#about to read 4, iclass 17, count 0 2006.229.16:24:15.20#ibcon#read 4, iclass 17, count 0 2006.229.16:24:15.20#ibcon#about to read 5, iclass 17, count 0 2006.229.16:24:15.20#ibcon#read 5, iclass 17, count 0 2006.229.16:24:15.20#ibcon#about to read 6, iclass 17, count 0 2006.229.16:24:15.20#ibcon#read 6, iclass 17, count 0 2006.229.16:24:15.20#ibcon#end of sib2, iclass 17, count 0 2006.229.16:24:15.20#ibcon#*after write, iclass 17, count 0 2006.229.16:24:15.20#ibcon#*before return 0, iclass 17, count 0 2006.229.16:24:15.20#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:24:15.20#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:24:15.20#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:24:15.20#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:24:15.20$vck44/va=4,7 2006.229.16:24:15.20#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.16:24:15.20#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.16:24:15.20#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:15.20#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:24:15.26#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:24:15.26#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:24:15.26#ibcon#enter wrdev, iclass 19, count 2 2006.229.16:24:15.26#ibcon#first serial, iclass 19, count 2 2006.229.16:24:15.26#ibcon#enter sib2, iclass 19, count 2 2006.229.16:24:15.26#ibcon#flushed, iclass 19, count 2 2006.229.16:24:15.26#ibcon#about to write, iclass 19, count 2 2006.229.16:24:15.26#ibcon#wrote, iclass 19, count 2 2006.229.16:24:15.26#ibcon#about to read 3, iclass 19, count 2 2006.229.16:24:15.28#ibcon#read 3, iclass 19, count 2 2006.229.16:24:15.28#ibcon#about to read 4, iclass 19, count 2 2006.229.16:24:15.28#ibcon#read 4, iclass 19, count 2 2006.229.16:24:15.28#ibcon#about to read 5, iclass 19, count 2 2006.229.16:24:15.28#ibcon#read 5, iclass 19, count 2 2006.229.16:24:15.28#ibcon#about to read 6, iclass 19, count 2 2006.229.16:24:15.28#ibcon#read 6, iclass 19, count 2 2006.229.16:24:15.28#ibcon#end of sib2, iclass 19, count 2 2006.229.16:24:15.28#ibcon#*mode == 0, iclass 19, count 2 2006.229.16:24:15.28#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.16:24:15.28#ibcon#[25=AT04-07\r\n] 2006.229.16:24:15.28#ibcon#*before write, iclass 19, count 2 2006.229.16:24:15.28#ibcon#enter sib2, iclass 19, count 2 2006.229.16:24:15.28#ibcon#flushed, iclass 19, count 2 2006.229.16:24:15.28#ibcon#about to write, iclass 19, count 2 2006.229.16:24:15.28#ibcon#wrote, iclass 19, count 2 2006.229.16:24:15.28#ibcon#about to read 3, iclass 19, count 2 2006.229.16:24:15.31#ibcon#read 3, iclass 19, count 2 2006.229.16:24:15.31#ibcon#about to read 4, iclass 19, count 2 2006.229.16:24:15.31#ibcon#read 4, iclass 19, count 2 2006.229.16:24:15.31#ibcon#about to read 5, iclass 19, count 2 2006.229.16:24:15.31#ibcon#read 5, iclass 19, count 2 2006.229.16:24:15.31#ibcon#about to read 6, iclass 19, count 2 2006.229.16:24:15.31#ibcon#read 6, iclass 19, count 2 2006.229.16:24:15.31#ibcon#end of sib2, iclass 19, count 2 2006.229.16:24:15.31#ibcon#*after write, iclass 19, count 2 2006.229.16:24:15.31#ibcon#*before return 0, iclass 19, count 2 2006.229.16:24:15.31#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:24:15.31#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:24:15.31#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.16:24:15.31#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:15.31#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:24:15.43#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:24:15.43#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:24:15.43#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:24:15.43#ibcon#first serial, iclass 19, count 0 2006.229.16:24:15.43#ibcon#enter sib2, iclass 19, count 0 2006.229.16:24:15.43#ibcon#flushed, iclass 19, count 0 2006.229.16:24:15.43#ibcon#about to write, iclass 19, count 0 2006.229.16:24:15.43#ibcon#wrote, iclass 19, count 0 2006.229.16:24:15.43#ibcon#about to read 3, iclass 19, count 0 2006.229.16:24:15.45#ibcon#read 3, iclass 19, count 0 2006.229.16:24:15.45#ibcon#about to read 4, iclass 19, count 0 2006.229.16:24:15.45#ibcon#read 4, iclass 19, count 0 2006.229.16:24:15.45#ibcon#about to read 5, iclass 19, count 0 2006.229.16:24:15.45#ibcon#read 5, iclass 19, count 0 2006.229.16:24:15.45#ibcon#about to read 6, iclass 19, count 0 2006.229.16:24:15.45#ibcon#read 6, iclass 19, count 0 2006.229.16:24:15.45#ibcon#end of sib2, iclass 19, count 0 2006.229.16:24:15.45#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:24:15.45#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:24:15.45#ibcon#[25=USB\r\n] 2006.229.16:24:15.45#ibcon#*before write, iclass 19, count 0 2006.229.16:24:15.45#ibcon#enter sib2, iclass 19, count 0 2006.229.16:24:15.45#ibcon#flushed, iclass 19, count 0 2006.229.16:24:15.45#ibcon#about to write, iclass 19, count 0 2006.229.16:24:15.45#ibcon#wrote, iclass 19, count 0 2006.229.16:24:15.45#ibcon#about to read 3, iclass 19, count 0 2006.229.16:24:15.48#ibcon#read 3, iclass 19, count 0 2006.229.16:24:15.48#ibcon#about to read 4, iclass 19, count 0 2006.229.16:24:15.48#ibcon#read 4, iclass 19, count 0 2006.229.16:24:15.48#ibcon#about to read 5, iclass 19, count 0 2006.229.16:24:15.48#ibcon#read 5, iclass 19, count 0 2006.229.16:24:15.48#ibcon#about to read 6, iclass 19, count 0 2006.229.16:24:15.48#ibcon#read 6, iclass 19, count 0 2006.229.16:24:15.48#ibcon#end of sib2, iclass 19, count 0 2006.229.16:24:15.48#ibcon#*after write, iclass 19, count 0 2006.229.16:24:15.48#ibcon#*before return 0, iclass 19, count 0 2006.229.16:24:15.48#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:24:15.48#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:24:15.48#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:24:15.48#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:24:15.48$vck44/valo=5,734.99 2006.229.16:24:15.48#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:24:15.48#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:24:15.48#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:15.48#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:15.48#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:15.48#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:15.48#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:24:15.48#ibcon#first serial, iclass 21, count 0 2006.229.16:24:15.48#ibcon#enter sib2, iclass 21, count 0 2006.229.16:24:15.48#ibcon#flushed, iclass 21, count 0 2006.229.16:24:15.48#ibcon#about to write, iclass 21, count 0 2006.229.16:24:15.48#ibcon#wrote, iclass 21, count 0 2006.229.16:24:15.48#ibcon#about to read 3, iclass 21, count 0 2006.229.16:24:15.50#ibcon#read 3, iclass 21, count 0 2006.229.16:24:15.50#ibcon#about to read 4, iclass 21, count 0 2006.229.16:24:15.50#ibcon#read 4, iclass 21, count 0 2006.229.16:24:15.50#ibcon#about to read 5, iclass 21, count 0 2006.229.16:24:15.50#ibcon#read 5, iclass 21, count 0 2006.229.16:24:15.50#ibcon#about to read 6, iclass 21, count 0 2006.229.16:24:15.50#ibcon#read 6, iclass 21, count 0 2006.229.16:24:15.50#ibcon#end of sib2, iclass 21, count 0 2006.229.16:24:15.50#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:24:15.50#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:24:15.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:24:15.50#ibcon#*before write, iclass 21, count 0 2006.229.16:24:15.50#ibcon#enter sib2, iclass 21, count 0 2006.229.16:24:15.50#ibcon#flushed, iclass 21, count 0 2006.229.16:24:15.50#ibcon#about to write, iclass 21, count 0 2006.229.16:24:15.50#ibcon#wrote, iclass 21, count 0 2006.229.16:24:15.50#ibcon#about to read 3, iclass 21, count 0 2006.229.16:24:15.54#ibcon#read 3, iclass 21, count 0 2006.229.16:24:15.54#ibcon#about to read 4, iclass 21, count 0 2006.229.16:24:15.54#ibcon#read 4, iclass 21, count 0 2006.229.16:24:15.54#ibcon#about to read 5, iclass 21, count 0 2006.229.16:24:15.54#ibcon#read 5, iclass 21, count 0 2006.229.16:24:15.54#ibcon#about to read 6, iclass 21, count 0 2006.229.16:24:15.54#ibcon#read 6, iclass 21, count 0 2006.229.16:24:15.54#ibcon#end of sib2, iclass 21, count 0 2006.229.16:24:15.54#ibcon#*after write, iclass 21, count 0 2006.229.16:24:15.54#ibcon#*before return 0, iclass 21, count 0 2006.229.16:24:15.54#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:15.54#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:15.54#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:24:15.54#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:24:15.54$vck44/va=5,4 2006.229.16:24:15.54#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.16:24:15.54#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.16:24:15.54#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:15.54#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:15.60#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:15.60#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:15.60#ibcon#enter wrdev, iclass 23, count 2 2006.229.16:24:15.60#ibcon#first serial, iclass 23, count 2 2006.229.16:24:15.60#ibcon#enter sib2, iclass 23, count 2 2006.229.16:24:15.60#ibcon#flushed, iclass 23, count 2 2006.229.16:24:15.60#ibcon#about to write, iclass 23, count 2 2006.229.16:24:15.60#ibcon#wrote, iclass 23, count 2 2006.229.16:24:15.60#ibcon#about to read 3, iclass 23, count 2 2006.229.16:24:15.62#ibcon#read 3, iclass 23, count 2 2006.229.16:24:15.62#ibcon#about to read 4, iclass 23, count 2 2006.229.16:24:15.62#ibcon#read 4, iclass 23, count 2 2006.229.16:24:15.62#ibcon#about to read 5, iclass 23, count 2 2006.229.16:24:15.62#ibcon#read 5, iclass 23, count 2 2006.229.16:24:15.62#ibcon#about to read 6, iclass 23, count 2 2006.229.16:24:15.62#ibcon#read 6, iclass 23, count 2 2006.229.16:24:15.62#ibcon#end of sib2, iclass 23, count 2 2006.229.16:24:15.62#ibcon#*mode == 0, iclass 23, count 2 2006.229.16:24:15.62#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.16:24:15.62#ibcon#[25=AT05-04\r\n] 2006.229.16:24:15.62#ibcon#*before write, iclass 23, count 2 2006.229.16:24:15.62#ibcon#enter sib2, iclass 23, count 2 2006.229.16:24:15.62#ibcon#flushed, iclass 23, count 2 2006.229.16:24:15.62#ibcon#about to write, iclass 23, count 2 2006.229.16:24:15.62#ibcon#wrote, iclass 23, count 2 2006.229.16:24:15.62#ibcon#about to read 3, iclass 23, count 2 2006.229.16:24:15.65#ibcon#read 3, iclass 23, count 2 2006.229.16:24:15.65#ibcon#about to read 4, iclass 23, count 2 2006.229.16:24:15.65#ibcon#read 4, iclass 23, count 2 2006.229.16:24:15.65#ibcon#about to read 5, iclass 23, count 2 2006.229.16:24:15.65#ibcon#read 5, iclass 23, count 2 2006.229.16:24:15.65#ibcon#about to read 6, iclass 23, count 2 2006.229.16:24:15.65#ibcon#read 6, iclass 23, count 2 2006.229.16:24:15.65#ibcon#end of sib2, iclass 23, count 2 2006.229.16:24:15.65#ibcon#*after write, iclass 23, count 2 2006.229.16:24:15.65#ibcon#*before return 0, iclass 23, count 2 2006.229.16:24:15.65#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:15.65#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:15.65#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.16:24:15.65#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:15.65#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:15.77#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:15.77#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:15.77#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:24:15.77#ibcon#first serial, iclass 23, count 0 2006.229.16:24:15.77#ibcon#enter sib2, iclass 23, count 0 2006.229.16:24:15.77#ibcon#flushed, iclass 23, count 0 2006.229.16:24:15.77#ibcon#about to write, iclass 23, count 0 2006.229.16:24:15.77#ibcon#wrote, iclass 23, count 0 2006.229.16:24:15.77#ibcon#about to read 3, iclass 23, count 0 2006.229.16:24:15.79#ibcon#read 3, iclass 23, count 0 2006.229.16:24:15.79#ibcon#about to read 4, iclass 23, count 0 2006.229.16:24:15.79#ibcon#read 4, iclass 23, count 0 2006.229.16:24:15.79#ibcon#about to read 5, iclass 23, count 0 2006.229.16:24:15.79#ibcon#read 5, iclass 23, count 0 2006.229.16:24:15.79#ibcon#about to read 6, iclass 23, count 0 2006.229.16:24:15.79#ibcon#read 6, iclass 23, count 0 2006.229.16:24:15.79#ibcon#end of sib2, iclass 23, count 0 2006.229.16:24:15.79#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:24:15.79#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:24:15.79#ibcon#[25=USB\r\n] 2006.229.16:24:15.79#ibcon#*before write, iclass 23, count 0 2006.229.16:24:15.79#ibcon#enter sib2, iclass 23, count 0 2006.229.16:24:15.79#ibcon#flushed, iclass 23, count 0 2006.229.16:24:15.79#ibcon#about to write, iclass 23, count 0 2006.229.16:24:15.79#ibcon#wrote, iclass 23, count 0 2006.229.16:24:15.79#ibcon#about to read 3, iclass 23, count 0 2006.229.16:24:15.82#ibcon#read 3, iclass 23, count 0 2006.229.16:24:15.82#ibcon#about to read 4, iclass 23, count 0 2006.229.16:24:15.82#ibcon#read 4, iclass 23, count 0 2006.229.16:24:15.82#ibcon#about to read 5, iclass 23, count 0 2006.229.16:24:15.82#ibcon#read 5, iclass 23, count 0 2006.229.16:24:15.82#ibcon#about to read 6, iclass 23, count 0 2006.229.16:24:15.82#ibcon#read 6, iclass 23, count 0 2006.229.16:24:15.82#ibcon#end of sib2, iclass 23, count 0 2006.229.16:24:15.82#ibcon#*after write, iclass 23, count 0 2006.229.16:24:15.82#ibcon#*before return 0, iclass 23, count 0 2006.229.16:24:15.82#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:15.82#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:15.82#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:24:15.82#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:24:15.82$vck44/valo=6,814.99 2006.229.16:24:15.82#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.16:24:15.82#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.16:24:15.82#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:15.82#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:15.82#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:15.82#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:15.82#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:24:15.82#ibcon#first serial, iclass 25, count 0 2006.229.16:24:15.82#ibcon#enter sib2, iclass 25, count 0 2006.229.16:24:15.82#ibcon#flushed, iclass 25, count 0 2006.229.16:24:15.82#ibcon#about to write, iclass 25, count 0 2006.229.16:24:15.82#ibcon#wrote, iclass 25, count 0 2006.229.16:24:15.82#ibcon#about to read 3, iclass 25, count 0 2006.229.16:24:15.84#ibcon#read 3, iclass 25, count 0 2006.229.16:24:15.84#ibcon#about to read 4, iclass 25, count 0 2006.229.16:24:15.84#ibcon#read 4, iclass 25, count 0 2006.229.16:24:15.84#ibcon#about to read 5, iclass 25, count 0 2006.229.16:24:15.84#ibcon#read 5, iclass 25, count 0 2006.229.16:24:15.84#ibcon#about to read 6, iclass 25, count 0 2006.229.16:24:15.84#ibcon#read 6, iclass 25, count 0 2006.229.16:24:15.84#ibcon#end of sib2, iclass 25, count 0 2006.229.16:24:15.84#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:24:15.84#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:24:15.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:24:15.84#ibcon#*before write, iclass 25, count 0 2006.229.16:24:15.84#ibcon#enter sib2, iclass 25, count 0 2006.229.16:24:15.84#ibcon#flushed, iclass 25, count 0 2006.229.16:24:15.84#ibcon#about to write, iclass 25, count 0 2006.229.16:24:15.84#ibcon#wrote, iclass 25, count 0 2006.229.16:24:15.84#ibcon#about to read 3, iclass 25, count 0 2006.229.16:24:15.88#ibcon#read 3, iclass 25, count 0 2006.229.16:24:15.88#ibcon#about to read 4, iclass 25, count 0 2006.229.16:24:15.88#ibcon#read 4, iclass 25, count 0 2006.229.16:24:15.88#ibcon#about to read 5, iclass 25, count 0 2006.229.16:24:15.88#ibcon#read 5, iclass 25, count 0 2006.229.16:24:15.88#ibcon#about to read 6, iclass 25, count 0 2006.229.16:24:15.88#ibcon#read 6, iclass 25, count 0 2006.229.16:24:15.88#ibcon#end of sib2, iclass 25, count 0 2006.229.16:24:15.88#ibcon#*after write, iclass 25, count 0 2006.229.16:24:15.88#ibcon#*before return 0, iclass 25, count 0 2006.229.16:24:15.88#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:15.88#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:15.88#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:24:15.88#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:24:15.88$vck44/va=6,4 2006.229.16:24:15.88#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.16:24:15.88#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.16:24:15.88#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:15.88#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:15.94#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:15.94#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:15.94#ibcon#enter wrdev, iclass 27, count 2 2006.229.16:24:15.94#ibcon#first serial, iclass 27, count 2 2006.229.16:24:15.94#ibcon#enter sib2, iclass 27, count 2 2006.229.16:24:15.94#ibcon#flushed, iclass 27, count 2 2006.229.16:24:15.94#ibcon#about to write, iclass 27, count 2 2006.229.16:24:15.94#ibcon#wrote, iclass 27, count 2 2006.229.16:24:15.94#ibcon#about to read 3, iclass 27, count 2 2006.229.16:24:15.96#ibcon#read 3, iclass 27, count 2 2006.229.16:24:15.96#ibcon#about to read 4, iclass 27, count 2 2006.229.16:24:15.96#ibcon#read 4, iclass 27, count 2 2006.229.16:24:15.96#ibcon#about to read 5, iclass 27, count 2 2006.229.16:24:15.96#ibcon#read 5, iclass 27, count 2 2006.229.16:24:15.96#ibcon#about to read 6, iclass 27, count 2 2006.229.16:24:15.96#ibcon#read 6, iclass 27, count 2 2006.229.16:24:15.96#ibcon#end of sib2, iclass 27, count 2 2006.229.16:24:15.96#ibcon#*mode == 0, iclass 27, count 2 2006.229.16:24:15.96#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.16:24:15.96#ibcon#[25=AT06-04\r\n] 2006.229.16:24:15.96#ibcon#*before write, iclass 27, count 2 2006.229.16:24:15.96#ibcon#enter sib2, iclass 27, count 2 2006.229.16:24:15.96#ibcon#flushed, iclass 27, count 2 2006.229.16:24:15.96#ibcon#about to write, iclass 27, count 2 2006.229.16:24:15.96#ibcon#wrote, iclass 27, count 2 2006.229.16:24:15.96#ibcon#about to read 3, iclass 27, count 2 2006.229.16:24:15.99#ibcon#read 3, iclass 27, count 2 2006.229.16:24:15.99#ibcon#about to read 4, iclass 27, count 2 2006.229.16:24:15.99#ibcon#read 4, iclass 27, count 2 2006.229.16:24:15.99#ibcon#about to read 5, iclass 27, count 2 2006.229.16:24:15.99#ibcon#read 5, iclass 27, count 2 2006.229.16:24:15.99#ibcon#about to read 6, iclass 27, count 2 2006.229.16:24:15.99#ibcon#read 6, iclass 27, count 2 2006.229.16:24:15.99#ibcon#end of sib2, iclass 27, count 2 2006.229.16:24:15.99#ibcon#*after write, iclass 27, count 2 2006.229.16:24:15.99#ibcon#*before return 0, iclass 27, count 2 2006.229.16:24:15.99#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:15.99#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:15.99#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.16:24:15.99#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:15.99#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:16.11#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:16.11#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:16.11#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:24:16.11#ibcon#first serial, iclass 27, count 0 2006.229.16:24:16.11#ibcon#enter sib2, iclass 27, count 0 2006.229.16:24:16.11#ibcon#flushed, iclass 27, count 0 2006.229.16:24:16.11#ibcon#about to write, iclass 27, count 0 2006.229.16:24:16.11#ibcon#wrote, iclass 27, count 0 2006.229.16:24:16.11#ibcon#about to read 3, iclass 27, count 0 2006.229.16:24:16.13#ibcon#read 3, iclass 27, count 0 2006.229.16:24:16.13#ibcon#about to read 4, iclass 27, count 0 2006.229.16:24:16.13#ibcon#read 4, iclass 27, count 0 2006.229.16:24:16.13#ibcon#about to read 5, iclass 27, count 0 2006.229.16:24:16.13#ibcon#read 5, iclass 27, count 0 2006.229.16:24:16.13#ibcon#about to read 6, iclass 27, count 0 2006.229.16:24:16.13#ibcon#read 6, iclass 27, count 0 2006.229.16:24:16.13#ibcon#end of sib2, iclass 27, count 0 2006.229.16:24:16.13#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:24:16.13#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:24:16.13#ibcon#[25=USB\r\n] 2006.229.16:24:16.13#ibcon#*before write, iclass 27, count 0 2006.229.16:24:16.13#ibcon#enter sib2, iclass 27, count 0 2006.229.16:24:16.13#ibcon#flushed, iclass 27, count 0 2006.229.16:24:16.13#ibcon#about to write, iclass 27, count 0 2006.229.16:24:16.13#ibcon#wrote, iclass 27, count 0 2006.229.16:24:16.13#ibcon#about to read 3, iclass 27, count 0 2006.229.16:24:16.16#ibcon#read 3, iclass 27, count 0 2006.229.16:24:16.16#ibcon#about to read 4, iclass 27, count 0 2006.229.16:24:16.16#ibcon#read 4, iclass 27, count 0 2006.229.16:24:16.16#ibcon#about to read 5, iclass 27, count 0 2006.229.16:24:16.16#ibcon#read 5, iclass 27, count 0 2006.229.16:24:16.16#ibcon#about to read 6, iclass 27, count 0 2006.229.16:24:16.16#ibcon#read 6, iclass 27, count 0 2006.229.16:24:16.16#ibcon#end of sib2, iclass 27, count 0 2006.229.16:24:16.16#ibcon#*after write, iclass 27, count 0 2006.229.16:24:16.16#ibcon#*before return 0, iclass 27, count 0 2006.229.16:24:16.16#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:16.16#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:16.16#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:24:16.16#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:24:16.16$vck44/valo=7,864.99 2006.229.16:24:16.16#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.16:24:16.16#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.16:24:16.16#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:16.16#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:16.16#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:16.16#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:16.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:24:16.16#ibcon#first serial, iclass 29, count 0 2006.229.16:24:16.16#ibcon#enter sib2, iclass 29, count 0 2006.229.16:24:16.16#ibcon#flushed, iclass 29, count 0 2006.229.16:24:16.16#ibcon#about to write, iclass 29, count 0 2006.229.16:24:16.16#ibcon#wrote, iclass 29, count 0 2006.229.16:24:16.16#ibcon#about to read 3, iclass 29, count 0 2006.229.16:24:16.18#ibcon#read 3, iclass 29, count 0 2006.229.16:24:16.18#ibcon#about to read 4, iclass 29, count 0 2006.229.16:24:16.18#ibcon#read 4, iclass 29, count 0 2006.229.16:24:16.18#ibcon#about to read 5, iclass 29, count 0 2006.229.16:24:16.18#ibcon#read 5, iclass 29, count 0 2006.229.16:24:16.18#ibcon#about to read 6, iclass 29, count 0 2006.229.16:24:16.18#ibcon#read 6, iclass 29, count 0 2006.229.16:24:16.18#ibcon#end of sib2, iclass 29, count 0 2006.229.16:24:16.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:24:16.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:24:16.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:24:16.18#ibcon#*before write, iclass 29, count 0 2006.229.16:24:16.18#ibcon#enter sib2, iclass 29, count 0 2006.229.16:24:16.18#ibcon#flushed, iclass 29, count 0 2006.229.16:24:16.18#ibcon#about to write, iclass 29, count 0 2006.229.16:24:16.18#ibcon#wrote, iclass 29, count 0 2006.229.16:24:16.18#ibcon#about to read 3, iclass 29, count 0 2006.229.16:24:16.22#ibcon#read 3, iclass 29, count 0 2006.229.16:24:16.22#ibcon#about to read 4, iclass 29, count 0 2006.229.16:24:16.22#ibcon#read 4, iclass 29, count 0 2006.229.16:24:16.22#ibcon#about to read 5, iclass 29, count 0 2006.229.16:24:16.22#ibcon#read 5, iclass 29, count 0 2006.229.16:24:16.22#ibcon#about to read 6, iclass 29, count 0 2006.229.16:24:16.22#ibcon#read 6, iclass 29, count 0 2006.229.16:24:16.22#ibcon#end of sib2, iclass 29, count 0 2006.229.16:24:16.22#ibcon#*after write, iclass 29, count 0 2006.229.16:24:16.22#ibcon#*before return 0, iclass 29, count 0 2006.229.16:24:16.22#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:16.22#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:16.22#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:24:16.22#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:24:16.22$vck44/va=7,5 2006.229.16:24:16.22#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.16:24:16.22#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.16:24:16.22#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:16.22#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:16.28#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:16.28#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:16.28#ibcon#enter wrdev, iclass 31, count 2 2006.229.16:24:16.28#ibcon#first serial, iclass 31, count 2 2006.229.16:24:16.28#ibcon#enter sib2, iclass 31, count 2 2006.229.16:24:16.28#ibcon#flushed, iclass 31, count 2 2006.229.16:24:16.28#ibcon#about to write, iclass 31, count 2 2006.229.16:24:16.28#ibcon#wrote, iclass 31, count 2 2006.229.16:24:16.28#ibcon#about to read 3, iclass 31, count 2 2006.229.16:24:16.30#ibcon#read 3, iclass 31, count 2 2006.229.16:24:16.30#ibcon#about to read 4, iclass 31, count 2 2006.229.16:24:16.30#ibcon#read 4, iclass 31, count 2 2006.229.16:24:16.30#ibcon#about to read 5, iclass 31, count 2 2006.229.16:24:16.30#ibcon#read 5, iclass 31, count 2 2006.229.16:24:16.30#ibcon#about to read 6, iclass 31, count 2 2006.229.16:24:16.30#ibcon#read 6, iclass 31, count 2 2006.229.16:24:16.30#ibcon#end of sib2, iclass 31, count 2 2006.229.16:24:16.30#ibcon#*mode == 0, iclass 31, count 2 2006.229.16:24:16.30#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.16:24:16.30#ibcon#[25=AT07-05\r\n] 2006.229.16:24:16.30#ibcon#*before write, iclass 31, count 2 2006.229.16:24:16.30#ibcon#enter sib2, iclass 31, count 2 2006.229.16:24:16.30#ibcon#flushed, iclass 31, count 2 2006.229.16:24:16.30#ibcon#about to write, iclass 31, count 2 2006.229.16:24:16.30#ibcon#wrote, iclass 31, count 2 2006.229.16:24:16.30#ibcon#about to read 3, iclass 31, count 2 2006.229.16:24:16.33#ibcon#read 3, iclass 31, count 2 2006.229.16:24:16.33#ibcon#about to read 4, iclass 31, count 2 2006.229.16:24:16.33#ibcon#read 4, iclass 31, count 2 2006.229.16:24:16.33#ibcon#about to read 5, iclass 31, count 2 2006.229.16:24:16.33#ibcon#read 5, iclass 31, count 2 2006.229.16:24:16.33#ibcon#about to read 6, iclass 31, count 2 2006.229.16:24:16.33#ibcon#read 6, iclass 31, count 2 2006.229.16:24:16.33#ibcon#end of sib2, iclass 31, count 2 2006.229.16:24:16.33#ibcon#*after write, iclass 31, count 2 2006.229.16:24:16.33#ibcon#*before return 0, iclass 31, count 2 2006.229.16:24:16.33#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:16.33#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:16.33#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.16:24:16.33#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:16.33#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:16.45#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:16.45#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:16.45#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:24:16.45#ibcon#first serial, iclass 31, count 0 2006.229.16:24:16.45#ibcon#enter sib2, iclass 31, count 0 2006.229.16:24:16.45#ibcon#flushed, iclass 31, count 0 2006.229.16:24:16.45#ibcon#about to write, iclass 31, count 0 2006.229.16:24:16.45#ibcon#wrote, iclass 31, count 0 2006.229.16:24:16.45#ibcon#about to read 3, iclass 31, count 0 2006.229.16:24:16.47#ibcon#read 3, iclass 31, count 0 2006.229.16:24:16.47#ibcon#about to read 4, iclass 31, count 0 2006.229.16:24:16.47#ibcon#read 4, iclass 31, count 0 2006.229.16:24:16.47#ibcon#about to read 5, iclass 31, count 0 2006.229.16:24:16.47#ibcon#read 5, iclass 31, count 0 2006.229.16:24:16.47#ibcon#about to read 6, iclass 31, count 0 2006.229.16:24:16.47#ibcon#read 6, iclass 31, count 0 2006.229.16:24:16.47#ibcon#end of sib2, iclass 31, count 0 2006.229.16:24:16.47#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:24:16.47#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:24:16.47#ibcon#[25=USB\r\n] 2006.229.16:24:16.47#ibcon#*before write, iclass 31, count 0 2006.229.16:24:16.47#ibcon#enter sib2, iclass 31, count 0 2006.229.16:24:16.47#ibcon#flushed, iclass 31, count 0 2006.229.16:24:16.47#ibcon#about to write, iclass 31, count 0 2006.229.16:24:16.47#ibcon#wrote, iclass 31, count 0 2006.229.16:24:16.47#ibcon#about to read 3, iclass 31, count 0 2006.229.16:24:16.50#ibcon#read 3, iclass 31, count 0 2006.229.16:24:16.50#ibcon#about to read 4, iclass 31, count 0 2006.229.16:24:16.50#ibcon#read 4, iclass 31, count 0 2006.229.16:24:16.50#ibcon#about to read 5, iclass 31, count 0 2006.229.16:24:16.50#ibcon#read 5, iclass 31, count 0 2006.229.16:24:16.50#ibcon#about to read 6, iclass 31, count 0 2006.229.16:24:16.50#ibcon#read 6, iclass 31, count 0 2006.229.16:24:16.50#ibcon#end of sib2, iclass 31, count 0 2006.229.16:24:16.50#ibcon#*after write, iclass 31, count 0 2006.229.16:24:16.50#ibcon#*before return 0, iclass 31, count 0 2006.229.16:24:16.50#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:16.50#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:16.50#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:24:16.50#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:24:16.50$vck44/valo=8,884.99 2006.229.16:24:16.50#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:24:16.50#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:24:16.50#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:16.50#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:16.50#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:16.50#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:16.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:24:16.50#ibcon#first serial, iclass 33, count 0 2006.229.16:24:16.50#ibcon#enter sib2, iclass 33, count 0 2006.229.16:24:16.50#ibcon#flushed, iclass 33, count 0 2006.229.16:24:16.50#ibcon#about to write, iclass 33, count 0 2006.229.16:24:16.50#ibcon#wrote, iclass 33, count 0 2006.229.16:24:16.50#ibcon#about to read 3, iclass 33, count 0 2006.229.16:24:16.52#ibcon#read 3, iclass 33, count 0 2006.229.16:24:16.52#ibcon#about to read 4, iclass 33, count 0 2006.229.16:24:16.52#ibcon#read 4, iclass 33, count 0 2006.229.16:24:16.52#ibcon#about to read 5, iclass 33, count 0 2006.229.16:24:16.52#ibcon#read 5, iclass 33, count 0 2006.229.16:24:16.52#ibcon#about to read 6, iclass 33, count 0 2006.229.16:24:16.52#ibcon#read 6, iclass 33, count 0 2006.229.16:24:16.52#ibcon#end of sib2, iclass 33, count 0 2006.229.16:24:16.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:24:16.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:24:16.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:24:16.52#ibcon#*before write, iclass 33, count 0 2006.229.16:24:16.52#ibcon#enter sib2, iclass 33, count 0 2006.229.16:24:16.52#ibcon#flushed, iclass 33, count 0 2006.229.16:24:16.52#ibcon#about to write, iclass 33, count 0 2006.229.16:24:16.52#ibcon#wrote, iclass 33, count 0 2006.229.16:24:16.52#ibcon#about to read 3, iclass 33, count 0 2006.229.16:24:16.56#ibcon#read 3, iclass 33, count 0 2006.229.16:24:16.56#ibcon#about to read 4, iclass 33, count 0 2006.229.16:24:16.56#ibcon#read 4, iclass 33, count 0 2006.229.16:24:16.56#ibcon#about to read 5, iclass 33, count 0 2006.229.16:24:16.56#ibcon#read 5, iclass 33, count 0 2006.229.16:24:16.56#ibcon#about to read 6, iclass 33, count 0 2006.229.16:24:16.56#ibcon#read 6, iclass 33, count 0 2006.229.16:24:16.56#ibcon#end of sib2, iclass 33, count 0 2006.229.16:24:16.56#ibcon#*after write, iclass 33, count 0 2006.229.16:24:16.56#ibcon#*before return 0, iclass 33, count 0 2006.229.16:24:16.56#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:16.56#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:16.56#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:24:16.56#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:24:16.56$vck44/va=8,6 2006.229.16:24:16.56#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:24:16.56#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:24:16.56#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:16.56#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:16.62#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:16.62#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:16.62#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:24:16.62#ibcon#first serial, iclass 35, count 2 2006.229.16:24:16.62#ibcon#enter sib2, iclass 35, count 2 2006.229.16:24:16.62#ibcon#flushed, iclass 35, count 2 2006.229.16:24:16.62#ibcon#about to write, iclass 35, count 2 2006.229.16:24:16.62#ibcon#wrote, iclass 35, count 2 2006.229.16:24:16.62#ibcon#about to read 3, iclass 35, count 2 2006.229.16:24:16.64#ibcon#read 3, iclass 35, count 2 2006.229.16:24:16.64#ibcon#about to read 4, iclass 35, count 2 2006.229.16:24:16.64#ibcon#read 4, iclass 35, count 2 2006.229.16:24:16.64#ibcon#about to read 5, iclass 35, count 2 2006.229.16:24:16.64#ibcon#read 5, iclass 35, count 2 2006.229.16:24:16.64#ibcon#about to read 6, iclass 35, count 2 2006.229.16:24:16.64#ibcon#read 6, iclass 35, count 2 2006.229.16:24:16.64#ibcon#end of sib2, iclass 35, count 2 2006.229.16:24:16.64#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:24:16.64#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:24:16.64#ibcon#[25=AT08-06\r\n] 2006.229.16:24:16.64#ibcon#*before write, iclass 35, count 2 2006.229.16:24:16.64#ibcon#enter sib2, iclass 35, count 2 2006.229.16:24:16.64#ibcon#flushed, iclass 35, count 2 2006.229.16:24:16.64#ibcon#about to write, iclass 35, count 2 2006.229.16:24:16.64#ibcon#wrote, iclass 35, count 2 2006.229.16:24:16.64#ibcon#about to read 3, iclass 35, count 2 2006.229.16:24:16.67#ibcon#read 3, iclass 35, count 2 2006.229.16:24:16.67#ibcon#about to read 4, iclass 35, count 2 2006.229.16:24:16.67#ibcon#read 4, iclass 35, count 2 2006.229.16:24:16.67#ibcon#about to read 5, iclass 35, count 2 2006.229.16:24:16.67#ibcon#read 5, iclass 35, count 2 2006.229.16:24:16.67#ibcon#about to read 6, iclass 35, count 2 2006.229.16:24:16.67#ibcon#read 6, iclass 35, count 2 2006.229.16:24:16.67#ibcon#end of sib2, iclass 35, count 2 2006.229.16:24:16.67#ibcon#*after write, iclass 35, count 2 2006.229.16:24:16.67#ibcon#*before return 0, iclass 35, count 2 2006.229.16:24:16.67#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:16.67#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:16.67#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:24:16.67#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:16.67#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:16.79#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:16.79#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:16.79#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:24:16.79#ibcon#first serial, iclass 35, count 0 2006.229.16:24:16.79#ibcon#enter sib2, iclass 35, count 0 2006.229.16:24:16.79#ibcon#flushed, iclass 35, count 0 2006.229.16:24:16.79#ibcon#about to write, iclass 35, count 0 2006.229.16:24:16.79#ibcon#wrote, iclass 35, count 0 2006.229.16:24:16.79#ibcon#about to read 3, iclass 35, count 0 2006.229.16:24:16.81#ibcon#read 3, iclass 35, count 0 2006.229.16:24:16.81#ibcon#about to read 4, iclass 35, count 0 2006.229.16:24:16.81#ibcon#read 4, iclass 35, count 0 2006.229.16:24:16.81#ibcon#about to read 5, iclass 35, count 0 2006.229.16:24:16.81#ibcon#read 5, iclass 35, count 0 2006.229.16:24:16.81#ibcon#about to read 6, iclass 35, count 0 2006.229.16:24:16.81#ibcon#read 6, iclass 35, count 0 2006.229.16:24:16.81#ibcon#end of sib2, iclass 35, count 0 2006.229.16:24:16.81#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:24:16.81#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:24:16.81#ibcon#[25=USB\r\n] 2006.229.16:24:16.81#ibcon#*before write, iclass 35, count 0 2006.229.16:24:16.81#ibcon#enter sib2, iclass 35, count 0 2006.229.16:24:16.81#ibcon#flushed, iclass 35, count 0 2006.229.16:24:16.81#ibcon#about to write, iclass 35, count 0 2006.229.16:24:16.81#ibcon#wrote, iclass 35, count 0 2006.229.16:24:16.81#ibcon#about to read 3, iclass 35, count 0 2006.229.16:24:16.84#ibcon#read 3, iclass 35, count 0 2006.229.16:24:16.84#ibcon#about to read 4, iclass 35, count 0 2006.229.16:24:16.84#ibcon#read 4, iclass 35, count 0 2006.229.16:24:16.84#ibcon#about to read 5, iclass 35, count 0 2006.229.16:24:16.84#ibcon#read 5, iclass 35, count 0 2006.229.16:24:16.84#ibcon#about to read 6, iclass 35, count 0 2006.229.16:24:16.84#ibcon#read 6, iclass 35, count 0 2006.229.16:24:16.84#ibcon#end of sib2, iclass 35, count 0 2006.229.16:24:16.84#ibcon#*after write, iclass 35, count 0 2006.229.16:24:16.84#ibcon#*before return 0, iclass 35, count 0 2006.229.16:24:16.84#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:16.84#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:16.84#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:24:16.84#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:24:16.84$vck44/vblo=1,629.99 2006.229.16:24:16.84#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.16:24:16.84#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.16:24:16.84#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:16.84#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:16.84#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:16.84#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:16.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:24:16.84#ibcon#first serial, iclass 37, count 0 2006.229.16:24:16.84#ibcon#enter sib2, iclass 37, count 0 2006.229.16:24:16.84#ibcon#flushed, iclass 37, count 0 2006.229.16:24:16.84#ibcon#about to write, iclass 37, count 0 2006.229.16:24:16.84#ibcon#wrote, iclass 37, count 0 2006.229.16:24:16.84#ibcon#about to read 3, iclass 37, count 0 2006.229.16:24:16.86#ibcon#read 3, iclass 37, count 0 2006.229.16:24:16.86#ibcon#about to read 4, iclass 37, count 0 2006.229.16:24:16.86#ibcon#read 4, iclass 37, count 0 2006.229.16:24:16.86#ibcon#about to read 5, iclass 37, count 0 2006.229.16:24:16.86#ibcon#read 5, iclass 37, count 0 2006.229.16:24:16.86#ibcon#about to read 6, iclass 37, count 0 2006.229.16:24:16.86#ibcon#read 6, iclass 37, count 0 2006.229.16:24:16.86#ibcon#end of sib2, iclass 37, count 0 2006.229.16:24:16.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:24:16.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:24:16.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:24:16.86#ibcon#*before write, iclass 37, count 0 2006.229.16:24:16.86#ibcon#enter sib2, iclass 37, count 0 2006.229.16:24:16.86#ibcon#flushed, iclass 37, count 0 2006.229.16:24:16.86#ibcon#about to write, iclass 37, count 0 2006.229.16:24:16.86#ibcon#wrote, iclass 37, count 0 2006.229.16:24:16.86#ibcon#about to read 3, iclass 37, count 0 2006.229.16:24:16.90#ibcon#read 3, iclass 37, count 0 2006.229.16:24:16.90#ibcon#about to read 4, iclass 37, count 0 2006.229.16:24:16.90#ibcon#read 4, iclass 37, count 0 2006.229.16:24:16.90#ibcon#about to read 5, iclass 37, count 0 2006.229.16:24:16.90#ibcon#read 5, iclass 37, count 0 2006.229.16:24:16.90#ibcon#about to read 6, iclass 37, count 0 2006.229.16:24:16.90#ibcon#read 6, iclass 37, count 0 2006.229.16:24:16.90#ibcon#end of sib2, iclass 37, count 0 2006.229.16:24:16.90#ibcon#*after write, iclass 37, count 0 2006.229.16:24:16.90#ibcon#*before return 0, iclass 37, count 0 2006.229.16:24:16.90#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:16.90#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:16.90#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:24:16.90#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:24:16.90$vck44/vb=1,4 2006.229.16:24:16.90#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.16:24:16.90#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.16:24:16.90#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:16.90#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:24:16.90#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:24:16.90#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:24:16.90#ibcon#enter wrdev, iclass 39, count 2 2006.229.16:24:16.90#ibcon#first serial, iclass 39, count 2 2006.229.16:24:16.90#ibcon#enter sib2, iclass 39, count 2 2006.229.16:24:16.90#ibcon#flushed, iclass 39, count 2 2006.229.16:24:16.90#ibcon#about to write, iclass 39, count 2 2006.229.16:24:16.90#ibcon#wrote, iclass 39, count 2 2006.229.16:24:16.90#ibcon#about to read 3, iclass 39, count 2 2006.229.16:24:16.92#ibcon#read 3, iclass 39, count 2 2006.229.16:24:16.92#ibcon#about to read 4, iclass 39, count 2 2006.229.16:24:16.92#ibcon#read 4, iclass 39, count 2 2006.229.16:24:16.92#ibcon#about to read 5, iclass 39, count 2 2006.229.16:24:16.92#ibcon#read 5, iclass 39, count 2 2006.229.16:24:16.92#ibcon#about to read 6, iclass 39, count 2 2006.229.16:24:16.92#ibcon#read 6, iclass 39, count 2 2006.229.16:24:16.92#ibcon#end of sib2, iclass 39, count 2 2006.229.16:24:16.92#ibcon#*mode == 0, iclass 39, count 2 2006.229.16:24:16.92#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.16:24:16.92#ibcon#[27=AT01-04\r\n] 2006.229.16:24:16.92#ibcon#*before write, iclass 39, count 2 2006.229.16:24:16.92#ibcon#enter sib2, iclass 39, count 2 2006.229.16:24:16.92#ibcon#flushed, iclass 39, count 2 2006.229.16:24:16.92#ibcon#about to write, iclass 39, count 2 2006.229.16:24:16.92#ibcon#wrote, iclass 39, count 2 2006.229.16:24:16.92#ibcon#about to read 3, iclass 39, count 2 2006.229.16:24:16.95#ibcon#read 3, iclass 39, count 2 2006.229.16:24:16.95#ibcon#about to read 4, iclass 39, count 2 2006.229.16:24:16.95#ibcon#read 4, iclass 39, count 2 2006.229.16:24:16.95#ibcon#about to read 5, iclass 39, count 2 2006.229.16:24:16.95#ibcon#read 5, iclass 39, count 2 2006.229.16:24:16.95#ibcon#about to read 6, iclass 39, count 2 2006.229.16:24:16.95#ibcon#read 6, iclass 39, count 2 2006.229.16:24:16.95#ibcon#end of sib2, iclass 39, count 2 2006.229.16:24:16.95#ibcon#*after write, iclass 39, count 2 2006.229.16:24:16.95#ibcon#*before return 0, iclass 39, count 2 2006.229.16:24:16.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:24:16.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:24:16.95#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.16:24:16.95#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:16.95#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:24:17.07#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:24:17.07#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:24:17.07#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:24:17.07#ibcon#first serial, iclass 39, count 0 2006.229.16:24:17.07#ibcon#enter sib2, iclass 39, count 0 2006.229.16:24:17.07#ibcon#flushed, iclass 39, count 0 2006.229.16:24:17.07#ibcon#about to write, iclass 39, count 0 2006.229.16:24:17.07#ibcon#wrote, iclass 39, count 0 2006.229.16:24:17.07#ibcon#about to read 3, iclass 39, count 0 2006.229.16:24:17.09#ibcon#read 3, iclass 39, count 0 2006.229.16:24:17.09#ibcon#about to read 4, iclass 39, count 0 2006.229.16:24:17.09#ibcon#read 4, iclass 39, count 0 2006.229.16:24:17.09#ibcon#about to read 5, iclass 39, count 0 2006.229.16:24:17.09#ibcon#read 5, iclass 39, count 0 2006.229.16:24:17.09#ibcon#about to read 6, iclass 39, count 0 2006.229.16:24:17.09#ibcon#read 6, iclass 39, count 0 2006.229.16:24:17.09#ibcon#end of sib2, iclass 39, count 0 2006.229.16:24:17.09#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:24:17.09#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:24:17.09#ibcon#[27=USB\r\n] 2006.229.16:24:17.09#ibcon#*before write, iclass 39, count 0 2006.229.16:24:17.09#ibcon#enter sib2, iclass 39, count 0 2006.229.16:24:17.09#ibcon#flushed, iclass 39, count 0 2006.229.16:24:17.09#ibcon#about to write, iclass 39, count 0 2006.229.16:24:17.09#ibcon#wrote, iclass 39, count 0 2006.229.16:24:17.09#ibcon#about to read 3, iclass 39, count 0 2006.229.16:24:17.12#ibcon#read 3, iclass 39, count 0 2006.229.16:24:17.12#ibcon#about to read 4, iclass 39, count 0 2006.229.16:24:17.12#ibcon#read 4, iclass 39, count 0 2006.229.16:24:17.12#ibcon#about to read 5, iclass 39, count 0 2006.229.16:24:17.12#ibcon#read 5, iclass 39, count 0 2006.229.16:24:17.12#ibcon#about to read 6, iclass 39, count 0 2006.229.16:24:17.12#ibcon#read 6, iclass 39, count 0 2006.229.16:24:17.12#ibcon#end of sib2, iclass 39, count 0 2006.229.16:24:17.12#ibcon#*after write, iclass 39, count 0 2006.229.16:24:17.12#ibcon#*before return 0, iclass 39, count 0 2006.229.16:24:17.12#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:24:17.12#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:24:17.12#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:24:17.12#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:24:17.12$vck44/vblo=2,634.99 2006.229.16:24:17.12#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.16:24:17.12#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.16:24:17.12#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:17.12#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:17.12#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:17.12#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:17.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:24:17.12#ibcon#first serial, iclass 3, count 0 2006.229.16:24:17.12#ibcon#enter sib2, iclass 3, count 0 2006.229.16:24:17.12#ibcon#flushed, iclass 3, count 0 2006.229.16:24:17.12#ibcon#about to write, iclass 3, count 0 2006.229.16:24:17.12#ibcon#wrote, iclass 3, count 0 2006.229.16:24:17.12#ibcon#about to read 3, iclass 3, count 0 2006.229.16:24:17.14#ibcon#read 3, iclass 3, count 0 2006.229.16:24:17.14#ibcon#about to read 4, iclass 3, count 0 2006.229.16:24:17.14#ibcon#read 4, iclass 3, count 0 2006.229.16:24:17.14#ibcon#about to read 5, iclass 3, count 0 2006.229.16:24:17.14#ibcon#read 5, iclass 3, count 0 2006.229.16:24:17.14#ibcon#about to read 6, iclass 3, count 0 2006.229.16:24:17.14#ibcon#read 6, iclass 3, count 0 2006.229.16:24:17.14#ibcon#end of sib2, iclass 3, count 0 2006.229.16:24:17.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:24:17.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:24:17.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:24:17.14#ibcon#*before write, iclass 3, count 0 2006.229.16:24:17.14#ibcon#enter sib2, iclass 3, count 0 2006.229.16:24:17.14#ibcon#flushed, iclass 3, count 0 2006.229.16:24:17.14#ibcon#about to write, iclass 3, count 0 2006.229.16:24:17.14#ibcon#wrote, iclass 3, count 0 2006.229.16:24:17.14#ibcon#about to read 3, iclass 3, count 0 2006.229.16:24:17.18#ibcon#read 3, iclass 3, count 0 2006.229.16:24:17.18#ibcon#about to read 4, iclass 3, count 0 2006.229.16:24:17.18#ibcon#read 4, iclass 3, count 0 2006.229.16:24:17.18#ibcon#about to read 5, iclass 3, count 0 2006.229.16:24:17.18#ibcon#read 5, iclass 3, count 0 2006.229.16:24:17.18#ibcon#about to read 6, iclass 3, count 0 2006.229.16:24:17.18#ibcon#read 6, iclass 3, count 0 2006.229.16:24:17.18#ibcon#end of sib2, iclass 3, count 0 2006.229.16:24:17.18#ibcon#*after write, iclass 3, count 0 2006.229.16:24:17.18#ibcon#*before return 0, iclass 3, count 0 2006.229.16:24:17.18#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:17.18#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:24:17.18#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:24:17.18#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:24:17.18$vck44/vb=2,4 2006.229.16:24:17.18#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.16:24:17.18#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.16:24:17.18#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:17.18#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:17.24#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:17.24#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:17.24#ibcon#enter wrdev, iclass 5, count 2 2006.229.16:24:17.24#ibcon#first serial, iclass 5, count 2 2006.229.16:24:17.24#ibcon#enter sib2, iclass 5, count 2 2006.229.16:24:17.24#ibcon#flushed, iclass 5, count 2 2006.229.16:24:17.24#ibcon#about to write, iclass 5, count 2 2006.229.16:24:17.24#ibcon#wrote, iclass 5, count 2 2006.229.16:24:17.24#ibcon#about to read 3, iclass 5, count 2 2006.229.16:24:17.26#ibcon#read 3, iclass 5, count 2 2006.229.16:24:17.26#ibcon#about to read 4, iclass 5, count 2 2006.229.16:24:17.26#ibcon#read 4, iclass 5, count 2 2006.229.16:24:17.26#ibcon#about to read 5, iclass 5, count 2 2006.229.16:24:17.26#ibcon#read 5, iclass 5, count 2 2006.229.16:24:17.26#ibcon#about to read 6, iclass 5, count 2 2006.229.16:24:17.26#ibcon#read 6, iclass 5, count 2 2006.229.16:24:17.26#ibcon#end of sib2, iclass 5, count 2 2006.229.16:24:17.26#ibcon#*mode == 0, iclass 5, count 2 2006.229.16:24:17.26#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.16:24:17.26#ibcon#[27=AT02-04\r\n] 2006.229.16:24:17.26#ibcon#*before write, iclass 5, count 2 2006.229.16:24:17.26#ibcon#enter sib2, iclass 5, count 2 2006.229.16:24:17.26#ibcon#flushed, iclass 5, count 2 2006.229.16:24:17.26#ibcon#about to write, iclass 5, count 2 2006.229.16:24:17.26#ibcon#wrote, iclass 5, count 2 2006.229.16:24:17.26#ibcon#about to read 3, iclass 5, count 2 2006.229.16:24:17.29#ibcon#read 3, iclass 5, count 2 2006.229.16:24:17.29#ibcon#about to read 4, iclass 5, count 2 2006.229.16:24:17.29#ibcon#read 4, iclass 5, count 2 2006.229.16:24:17.29#ibcon#about to read 5, iclass 5, count 2 2006.229.16:24:17.29#ibcon#read 5, iclass 5, count 2 2006.229.16:24:17.29#ibcon#about to read 6, iclass 5, count 2 2006.229.16:24:17.29#ibcon#read 6, iclass 5, count 2 2006.229.16:24:17.29#ibcon#end of sib2, iclass 5, count 2 2006.229.16:24:17.29#ibcon#*after write, iclass 5, count 2 2006.229.16:24:17.29#ibcon#*before return 0, iclass 5, count 2 2006.229.16:24:17.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:17.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:24:17.29#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.16:24:17.29#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:17.29#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:17.41#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:17.41#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:17.41#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:24:17.41#ibcon#first serial, iclass 5, count 0 2006.229.16:24:17.41#ibcon#enter sib2, iclass 5, count 0 2006.229.16:24:17.41#ibcon#flushed, iclass 5, count 0 2006.229.16:24:17.41#ibcon#about to write, iclass 5, count 0 2006.229.16:24:17.41#ibcon#wrote, iclass 5, count 0 2006.229.16:24:17.41#ibcon#about to read 3, iclass 5, count 0 2006.229.16:24:17.43#ibcon#read 3, iclass 5, count 0 2006.229.16:24:17.43#ibcon#about to read 4, iclass 5, count 0 2006.229.16:24:17.43#ibcon#read 4, iclass 5, count 0 2006.229.16:24:17.43#ibcon#about to read 5, iclass 5, count 0 2006.229.16:24:17.43#ibcon#read 5, iclass 5, count 0 2006.229.16:24:17.43#ibcon#about to read 6, iclass 5, count 0 2006.229.16:24:17.43#ibcon#read 6, iclass 5, count 0 2006.229.16:24:17.43#ibcon#end of sib2, iclass 5, count 0 2006.229.16:24:17.43#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:24:17.43#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:24:17.43#ibcon#[27=USB\r\n] 2006.229.16:24:17.43#ibcon#*before write, iclass 5, count 0 2006.229.16:24:17.43#ibcon#enter sib2, iclass 5, count 0 2006.229.16:24:17.43#ibcon#flushed, iclass 5, count 0 2006.229.16:24:17.43#ibcon#about to write, iclass 5, count 0 2006.229.16:24:17.43#ibcon#wrote, iclass 5, count 0 2006.229.16:24:17.43#ibcon#about to read 3, iclass 5, count 0 2006.229.16:24:17.46#ibcon#read 3, iclass 5, count 0 2006.229.16:24:17.46#ibcon#about to read 4, iclass 5, count 0 2006.229.16:24:17.46#ibcon#read 4, iclass 5, count 0 2006.229.16:24:17.46#ibcon#about to read 5, iclass 5, count 0 2006.229.16:24:17.46#ibcon#read 5, iclass 5, count 0 2006.229.16:24:17.46#ibcon#about to read 6, iclass 5, count 0 2006.229.16:24:17.46#ibcon#read 6, iclass 5, count 0 2006.229.16:24:17.46#ibcon#end of sib2, iclass 5, count 0 2006.229.16:24:17.46#ibcon#*after write, iclass 5, count 0 2006.229.16:24:17.46#ibcon#*before return 0, iclass 5, count 0 2006.229.16:24:17.46#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:17.46#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:24:17.46#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:24:17.46#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:24:17.46$vck44/vblo=3,649.99 2006.229.16:24:17.46#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.16:24:17.46#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.16:24:17.46#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:17.46#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:17.46#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:17.46#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:17.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:24:17.46#ibcon#first serial, iclass 7, count 0 2006.229.16:24:17.46#ibcon#enter sib2, iclass 7, count 0 2006.229.16:24:17.46#ibcon#flushed, iclass 7, count 0 2006.229.16:24:17.46#ibcon#about to write, iclass 7, count 0 2006.229.16:24:17.46#ibcon#wrote, iclass 7, count 0 2006.229.16:24:17.46#ibcon#about to read 3, iclass 7, count 0 2006.229.16:24:17.48#ibcon#read 3, iclass 7, count 0 2006.229.16:24:17.48#ibcon#about to read 4, iclass 7, count 0 2006.229.16:24:17.48#ibcon#read 4, iclass 7, count 0 2006.229.16:24:17.48#ibcon#about to read 5, iclass 7, count 0 2006.229.16:24:17.48#ibcon#read 5, iclass 7, count 0 2006.229.16:24:17.48#ibcon#about to read 6, iclass 7, count 0 2006.229.16:24:17.48#ibcon#read 6, iclass 7, count 0 2006.229.16:24:17.48#ibcon#end of sib2, iclass 7, count 0 2006.229.16:24:17.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:24:17.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:24:17.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:24:17.48#ibcon#*before write, iclass 7, count 0 2006.229.16:24:17.48#ibcon#enter sib2, iclass 7, count 0 2006.229.16:24:17.48#ibcon#flushed, iclass 7, count 0 2006.229.16:24:17.48#ibcon#about to write, iclass 7, count 0 2006.229.16:24:17.48#ibcon#wrote, iclass 7, count 0 2006.229.16:24:17.48#ibcon#about to read 3, iclass 7, count 0 2006.229.16:24:17.52#ibcon#read 3, iclass 7, count 0 2006.229.16:24:17.52#ibcon#about to read 4, iclass 7, count 0 2006.229.16:24:17.52#ibcon#read 4, iclass 7, count 0 2006.229.16:24:17.52#ibcon#about to read 5, iclass 7, count 0 2006.229.16:24:17.52#ibcon#read 5, iclass 7, count 0 2006.229.16:24:17.52#ibcon#about to read 6, iclass 7, count 0 2006.229.16:24:17.52#ibcon#read 6, iclass 7, count 0 2006.229.16:24:17.52#ibcon#end of sib2, iclass 7, count 0 2006.229.16:24:17.52#ibcon#*after write, iclass 7, count 0 2006.229.16:24:17.52#ibcon#*before return 0, iclass 7, count 0 2006.229.16:24:17.52#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:17.52#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:24:17.52#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:24:17.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:24:17.52$vck44/vb=3,4 2006.229.16:24:17.52#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.16:24:17.52#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.16:24:17.52#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:17.52#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:17.58#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:17.58#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:17.58#ibcon#enter wrdev, iclass 11, count 2 2006.229.16:24:17.58#ibcon#first serial, iclass 11, count 2 2006.229.16:24:17.58#ibcon#enter sib2, iclass 11, count 2 2006.229.16:24:17.58#ibcon#flushed, iclass 11, count 2 2006.229.16:24:17.58#ibcon#about to write, iclass 11, count 2 2006.229.16:24:17.58#ibcon#wrote, iclass 11, count 2 2006.229.16:24:17.58#ibcon#about to read 3, iclass 11, count 2 2006.229.16:24:17.60#ibcon#read 3, iclass 11, count 2 2006.229.16:24:17.60#ibcon#about to read 4, iclass 11, count 2 2006.229.16:24:17.60#ibcon#read 4, iclass 11, count 2 2006.229.16:24:17.60#ibcon#about to read 5, iclass 11, count 2 2006.229.16:24:17.60#ibcon#read 5, iclass 11, count 2 2006.229.16:24:17.60#ibcon#about to read 6, iclass 11, count 2 2006.229.16:24:17.60#ibcon#read 6, iclass 11, count 2 2006.229.16:24:17.60#ibcon#end of sib2, iclass 11, count 2 2006.229.16:24:17.60#ibcon#*mode == 0, iclass 11, count 2 2006.229.16:24:17.60#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.16:24:17.60#ibcon#[27=AT03-04\r\n] 2006.229.16:24:17.60#ibcon#*before write, iclass 11, count 2 2006.229.16:24:17.60#ibcon#enter sib2, iclass 11, count 2 2006.229.16:24:17.60#ibcon#flushed, iclass 11, count 2 2006.229.16:24:17.60#ibcon#about to write, iclass 11, count 2 2006.229.16:24:17.60#ibcon#wrote, iclass 11, count 2 2006.229.16:24:17.60#ibcon#about to read 3, iclass 11, count 2 2006.229.16:24:17.63#ibcon#read 3, iclass 11, count 2 2006.229.16:24:17.63#ibcon#about to read 4, iclass 11, count 2 2006.229.16:24:17.63#ibcon#read 4, iclass 11, count 2 2006.229.16:24:17.63#ibcon#about to read 5, iclass 11, count 2 2006.229.16:24:17.63#ibcon#read 5, iclass 11, count 2 2006.229.16:24:17.63#ibcon#about to read 6, iclass 11, count 2 2006.229.16:24:17.63#ibcon#read 6, iclass 11, count 2 2006.229.16:24:17.63#ibcon#end of sib2, iclass 11, count 2 2006.229.16:24:17.63#ibcon#*after write, iclass 11, count 2 2006.229.16:24:17.63#ibcon#*before return 0, iclass 11, count 2 2006.229.16:24:17.63#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:17.63#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:24:17.63#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.16:24:17.63#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:17.63#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:17.75#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:17.75#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:17.75#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:24:17.75#ibcon#first serial, iclass 11, count 0 2006.229.16:24:17.75#ibcon#enter sib2, iclass 11, count 0 2006.229.16:24:17.75#ibcon#flushed, iclass 11, count 0 2006.229.16:24:17.75#ibcon#about to write, iclass 11, count 0 2006.229.16:24:17.75#ibcon#wrote, iclass 11, count 0 2006.229.16:24:17.75#ibcon#about to read 3, iclass 11, count 0 2006.229.16:24:17.77#ibcon#read 3, iclass 11, count 0 2006.229.16:24:17.77#ibcon#about to read 4, iclass 11, count 0 2006.229.16:24:17.77#ibcon#read 4, iclass 11, count 0 2006.229.16:24:17.77#ibcon#about to read 5, iclass 11, count 0 2006.229.16:24:17.77#ibcon#read 5, iclass 11, count 0 2006.229.16:24:17.77#ibcon#about to read 6, iclass 11, count 0 2006.229.16:24:17.77#ibcon#read 6, iclass 11, count 0 2006.229.16:24:17.77#ibcon#end of sib2, iclass 11, count 0 2006.229.16:24:17.77#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:24:17.77#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:24:17.77#ibcon#[27=USB\r\n] 2006.229.16:24:17.77#ibcon#*before write, iclass 11, count 0 2006.229.16:24:17.77#ibcon#enter sib2, iclass 11, count 0 2006.229.16:24:17.77#ibcon#flushed, iclass 11, count 0 2006.229.16:24:17.77#ibcon#about to write, iclass 11, count 0 2006.229.16:24:17.77#ibcon#wrote, iclass 11, count 0 2006.229.16:24:17.77#ibcon#about to read 3, iclass 11, count 0 2006.229.16:24:17.80#ibcon#read 3, iclass 11, count 0 2006.229.16:24:17.80#ibcon#about to read 4, iclass 11, count 0 2006.229.16:24:17.80#ibcon#read 4, iclass 11, count 0 2006.229.16:24:17.80#ibcon#about to read 5, iclass 11, count 0 2006.229.16:24:17.80#ibcon#read 5, iclass 11, count 0 2006.229.16:24:17.80#ibcon#about to read 6, iclass 11, count 0 2006.229.16:24:17.80#ibcon#read 6, iclass 11, count 0 2006.229.16:24:17.80#ibcon#end of sib2, iclass 11, count 0 2006.229.16:24:17.80#ibcon#*after write, iclass 11, count 0 2006.229.16:24:17.80#ibcon#*before return 0, iclass 11, count 0 2006.229.16:24:17.80#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:17.80#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:24:17.80#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:24:17.80#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:24:17.80$vck44/vblo=4,679.99 2006.229.16:24:17.80#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.16:24:17.80#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.16:24:17.80#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:17.80#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:17.80#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:17.80#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:17.80#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:24:17.80#ibcon#first serial, iclass 13, count 0 2006.229.16:24:17.80#ibcon#enter sib2, iclass 13, count 0 2006.229.16:24:17.80#ibcon#flushed, iclass 13, count 0 2006.229.16:24:17.80#ibcon#about to write, iclass 13, count 0 2006.229.16:24:17.80#ibcon#wrote, iclass 13, count 0 2006.229.16:24:17.80#ibcon#about to read 3, iclass 13, count 0 2006.229.16:24:17.82#ibcon#read 3, iclass 13, count 0 2006.229.16:24:17.82#ibcon#about to read 4, iclass 13, count 0 2006.229.16:24:17.82#ibcon#read 4, iclass 13, count 0 2006.229.16:24:17.82#ibcon#about to read 5, iclass 13, count 0 2006.229.16:24:17.82#ibcon#read 5, iclass 13, count 0 2006.229.16:24:17.82#ibcon#about to read 6, iclass 13, count 0 2006.229.16:24:17.82#ibcon#read 6, iclass 13, count 0 2006.229.16:24:17.82#ibcon#end of sib2, iclass 13, count 0 2006.229.16:24:17.82#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:24:17.82#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:24:17.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:24:17.82#ibcon#*before write, iclass 13, count 0 2006.229.16:24:17.82#ibcon#enter sib2, iclass 13, count 0 2006.229.16:24:17.82#ibcon#flushed, iclass 13, count 0 2006.229.16:24:17.82#ibcon#about to write, iclass 13, count 0 2006.229.16:24:17.82#ibcon#wrote, iclass 13, count 0 2006.229.16:24:17.82#ibcon#about to read 3, iclass 13, count 0 2006.229.16:24:17.86#abcon#<5=/05 1.6 2.5 27.171001001.9\r\n> 2006.229.16:24:17.86#ibcon#read 3, iclass 13, count 0 2006.229.16:24:17.86#ibcon#about to read 4, iclass 13, count 0 2006.229.16:24:17.86#ibcon#read 4, iclass 13, count 0 2006.229.16:24:17.86#ibcon#about to read 5, iclass 13, count 0 2006.229.16:24:17.86#ibcon#read 5, iclass 13, count 0 2006.229.16:24:17.86#ibcon#about to read 6, iclass 13, count 0 2006.229.16:24:17.86#ibcon#read 6, iclass 13, count 0 2006.229.16:24:17.86#ibcon#end of sib2, iclass 13, count 0 2006.229.16:24:17.86#ibcon#*after write, iclass 13, count 0 2006.229.16:24:17.86#ibcon#*before return 0, iclass 13, count 0 2006.229.16:24:17.86#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:17.86#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:24:17.86#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:24:17.86#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:24:17.86$vck44/vb=4,4 2006.229.16:24:17.86#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:24:17.86#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:24:17.86#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:17.86#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:24:17.88#abcon#{5=INTERFACE CLEAR} 2006.229.16:24:17.92#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:24:17.92#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:24:17.92#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:24:17.92#ibcon#first serial, iclass 18, count 2 2006.229.16:24:17.92#ibcon#enter sib2, iclass 18, count 2 2006.229.16:24:17.92#ibcon#flushed, iclass 18, count 2 2006.229.16:24:17.92#ibcon#about to write, iclass 18, count 2 2006.229.16:24:17.92#ibcon#wrote, iclass 18, count 2 2006.229.16:24:17.92#ibcon#about to read 3, iclass 18, count 2 2006.229.16:24:17.94#ibcon#read 3, iclass 18, count 2 2006.229.16:24:17.94#ibcon#about to read 4, iclass 18, count 2 2006.229.16:24:17.94#ibcon#read 4, iclass 18, count 2 2006.229.16:24:17.94#ibcon#about to read 5, iclass 18, count 2 2006.229.16:24:17.94#ibcon#read 5, iclass 18, count 2 2006.229.16:24:17.94#ibcon#about to read 6, iclass 18, count 2 2006.229.16:24:17.94#ibcon#read 6, iclass 18, count 2 2006.229.16:24:17.94#ibcon#end of sib2, iclass 18, count 2 2006.229.16:24:17.94#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:24:17.94#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:24:17.94#ibcon#[27=AT04-04\r\n] 2006.229.16:24:17.94#ibcon#*before write, iclass 18, count 2 2006.229.16:24:17.94#ibcon#enter sib2, iclass 18, count 2 2006.229.16:24:17.94#ibcon#flushed, iclass 18, count 2 2006.229.16:24:17.94#ibcon#about to write, iclass 18, count 2 2006.229.16:24:17.94#ibcon#wrote, iclass 18, count 2 2006.229.16:24:17.94#ibcon#about to read 3, iclass 18, count 2 2006.229.16:24:17.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:24:17.97#ibcon#read 3, iclass 18, count 2 2006.229.16:24:17.97#ibcon#about to read 4, iclass 18, count 2 2006.229.16:24:17.97#ibcon#read 4, iclass 18, count 2 2006.229.16:24:17.97#ibcon#about to read 5, iclass 18, count 2 2006.229.16:24:17.97#ibcon#read 5, iclass 18, count 2 2006.229.16:24:17.97#ibcon#about to read 6, iclass 18, count 2 2006.229.16:24:17.97#ibcon#read 6, iclass 18, count 2 2006.229.16:24:17.97#ibcon#end of sib2, iclass 18, count 2 2006.229.16:24:17.97#ibcon#*after write, iclass 18, count 2 2006.229.16:24:17.97#ibcon#*before return 0, iclass 18, count 2 2006.229.16:24:17.97#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:24:17.97#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:24:17.97#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:24:17.97#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:17.97#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:24:18.09#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:24:18.09#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:24:18.09#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:24:18.09#ibcon#first serial, iclass 18, count 0 2006.229.16:24:18.09#ibcon#enter sib2, iclass 18, count 0 2006.229.16:24:18.09#ibcon#flushed, iclass 18, count 0 2006.229.16:24:18.09#ibcon#about to write, iclass 18, count 0 2006.229.16:24:18.09#ibcon#wrote, iclass 18, count 0 2006.229.16:24:18.09#ibcon#about to read 3, iclass 18, count 0 2006.229.16:24:18.11#ibcon#read 3, iclass 18, count 0 2006.229.16:24:18.11#ibcon#about to read 4, iclass 18, count 0 2006.229.16:24:18.11#ibcon#read 4, iclass 18, count 0 2006.229.16:24:18.11#ibcon#about to read 5, iclass 18, count 0 2006.229.16:24:18.11#ibcon#read 5, iclass 18, count 0 2006.229.16:24:18.11#ibcon#about to read 6, iclass 18, count 0 2006.229.16:24:18.11#ibcon#read 6, iclass 18, count 0 2006.229.16:24:18.11#ibcon#end of sib2, iclass 18, count 0 2006.229.16:24:18.11#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:24:18.11#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:24:18.11#ibcon#[27=USB\r\n] 2006.229.16:24:18.11#ibcon#*before write, iclass 18, count 0 2006.229.16:24:18.11#ibcon#enter sib2, iclass 18, count 0 2006.229.16:24:18.11#ibcon#flushed, iclass 18, count 0 2006.229.16:24:18.11#ibcon#about to write, iclass 18, count 0 2006.229.16:24:18.11#ibcon#wrote, iclass 18, count 0 2006.229.16:24:18.11#ibcon#about to read 3, iclass 18, count 0 2006.229.16:24:18.14#ibcon#read 3, iclass 18, count 0 2006.229.16:24:18.14#ibcon#about to read 4, iclass 18, count 0 2006.229.16:24:18.14#ibcon#read 4, iclass 18, count 0 2006.229.16:24:18.14#ibcon#about to read 5, iclass 18, count 0 2006.229.16:24:18.14#ibcon#read 5, iclass 18, count 0 2006.229.16:24:18.14#ibcon#about to read 6, iclass 18, count 0 2006.229.16:24:18.14#ibcon#read 6, iclass 18, count 0 2006.229.16:24:18.14#ibcon#end of sib2, iclass 18, count 0 2006.229.16:24:18.14#ibcon#*after write, iclass 18, count 0 2006.229.16:24:18.14#ibcon#*before return 0, iclass 18, count 0 2006.229.16:24:18.14#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:24:18.14#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:24:18.14#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:24:18.14#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:24:18.14$vck44/vblo=5,709.99 2006.229.16:24:18.14#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:24:18.14#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:24:18.14#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:18.14#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:18.14#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:18.14#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:18.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:24:18.14#ibcon#first serial, iclass 21, count 0 2006.229.16:24:18.14#ibcon#enter sib2, iclass 21, count 0 2006.229.16:24:18.14#ibcon#flushed, iclass 21, count 0 2006.229.16:24:18.14#ibcon#about to write, iclass 21, count 0 2006.229.16:24:18.14#ibcon#wrote, iclass 21, count 0 2006.229.16:24:18.14#ibcon#about to read 3, iclass 21, count 0 2006.229.16:24:18.16#ibcon#read 3, iclass 21, count 0 2006.229.16:24:18.16#ibcon#about to read 4, iclass 21, count 0 2006.229.16:24:18.16#ibcon#read 4, iclass 21, count 0 2006.229.16:24:18.16#ibcon#about to read 5, iclass 21, count 0 2006.229.16:24:18.16#ibcon#read 5, iclass 21, count 0 2006.229.16:24:18.16#ibcon#about to read 6, iclass 21, count 0 2006.229.16:24:18.16#ibcon#read 6, iclass 21, count 0 2006.229.16:24:18.16#ibcon#end of sib2, iclass 21, count 0 2006.229.16:24:18.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:24:18.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:24:18.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:24:18.16#ibcon#*before write, iclass 21, count 0 2006.229.16:24:18.16#ibcon#enter sib2, iclass 21, count 0 2006.229.16:24:18.16#ibcon#flushed, iclass 21, count 0 2006.229.16:24:18.16#ibcon#about to write, iclass 21, count 0 2006.229.16:24:18.16#ibcon#wrote, iclass 21, count 0 2006.229.16:24:18.16#ibcon#about to read 3, iclass 21, count 0 2006.229.16:24:18.20#ibcon#read 3, iclass 21, count 0 2006.229.16:24:18.20#ibcon#about to read 4, iclass 21, count 0 2006.229.16:24:18.20#ibcon#read 4, iclass 21, count 0 2006.229.16:24:18.20#ibcon#about to read 5, iclass 21, count 0 2006.229.16:24:18.20#ibcon#read 5, iclass 21, count 0 2006.229.16:24:18.20#ibcon#about to read 6, iclass 21, count 0 2006.229.16:24:18.20#ibcon#read 6, iclass 21, count 0 2006.229.16:24:18.20#ibcon#end of sib2, iclass 21, count 0 2006.229.16:24:18.20#ibcon#*after write, iclass 21, count 0 2006.229.16:24:18.20#ibcon#*before return 0, iclass 21, count 0 2006.229.16:24:18.20#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:18.20#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:24:18.20#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:24:18.20#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:24:18.20$vck44/vb=5,4 2006.229.16:24:18.20#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.16:24:18.20#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.16:24:18.20#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:18.20#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:18.26#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:18.26#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:18.26#ibcon#enter wrdev, iclass 23, count 2 2006.229.16:24:18.26#ibcon#first serial, iclass 23, count 2 2006.229.16:24:18.26#ibcon#enter sib2, iclass 23, count 2 2006.229.16:24:18.26#ibcon#flushed, iclass 23, count 2 2006.229.16:24:18.26#ibcon#about to write, iclass 23, count 2 2006.229.16:24:18.26#ibcon#wrote, iclass 23, count 2 2006.229.16:24:18.26#ibcon#about to read 3, iclass 23, count 2 2006.229.16:24:18.28#ibcon#read 3, iclass 23, count 2 2006.229.16:24:18.28#ibcon#about to read 4, iclass 23, count 2 2006.229.16:24:18.28#ibcon#read 4, iclass 23, count 2 2006.229.16:24:18.28#ibcon#about to read 5, iclass 23, count 2 2006.229.16:24:18.28#ibcon#read 5, iclass 23, count 2 2006.229.16:24:18.28#ibcon#about to read 6, iclass 23, count 2 2006.229.16:24:18.28#ibcon#read 6, iclass 23, count 2 2006.229.16:24:18.28#ibcon#end of sib2, iclass 23, count 2 2006.229.16:24:18.28#ibcon#*mode == 0, iclass 23, count 2 2006.229.16:24:18.28#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.16:24:18.28#ibcon#[27=AT05-04\r\n] 2006.229.16:24:18.28#ibcon#*before write, iclass 23, count 2 2006.229.16:24:18.28#ibcon#enter sib2, iclass 23, count 2 2006.229.16:24:18.28#ibcon#flushed, iclass 23, count 2 2006.229.16:24:18.28#ibcon#about to write, iclass 23, count 2 2006.229.16:24:18.28#ibcon#wrote, iclass 23, count 2 2006.229.16:24:18.28#ibcon#about to read 3, iclass 23, count 2 2006.229.16:24:18.31#ibcon#read 3, iclass 23, count 2 2006.229.16:24:18.31#ibcon#about to read 4, iclass 23, count 2 2006.229.16:24:18.31#ibcon#read 4, iclass 23, count 2 2006.229.16:24:18.31#ibcon#about to read 5, iclass 23, count 2 2006.229.16:24:18.31#ibcon#read 5, iclass 23, count 2 2006.229.16:24:18.31#ibcon#about to read 6, iclass 23, count 2 2006.229.16:24:18.31#ibcon#read 6, iclass 23, count 2 2006.229.16:24:18.31#ibcon#end of sib2, iclass 23, count 2 2006.229.16:24:18.31#ibcon#*after write, iclass 23, count 2 2006.229.16:24:18.31#ibcon#*before return 0, iclass 23, count 2 2006.229.16:24:18.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:18.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:24:18.31#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.16:24:18.31#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:18.31#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:18.43#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:18.43#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:18.43#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:24:18.43#ibcon#first serial, iclass 23, count 0 2006.229.16:24:18.43#ibcon#enter sib2, iclass 23, count 0 2006.229.16:24:18.43#ibcon#flushed, iclass 23, count 0 2006.229.16:24:18.43#ibcon#about to write, iclass 23, count 0 2006.229.16:24:18.43#ibcon#wrote, iclass 23, count 0 2006.229.16:24:18.43#ibcon#about to read 3, iclass 23, count 0 2006.229.16:24:18.45#ibcon#read 3, iclass 23, count 0 2006.229.16:24:18.45#ibcon#about to read 4, iclass 23, count 0 2006.229.16:24:18.45#ibcon#read 4, iclass 23, count 0 2006.229.16:24:18.45#ibcon#about to read 5, iclass 23, count 0 2006.229.16:24:18.45#ibcon#read 5, iclass 23, count 0 2006.229.16:24:18.45#ibcon#about to read 6, iclass 23, count 0 2006.229.16:24:18.45#ibcon#read 6, iclass 23, count 0 2006.229.16:24:18.45#ibcon#end of sib2, iclass 23, count 0 2006.229.16:24:18.45#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:24:18.45#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:24:18.45#ibcon#[27=USB\r\n] 2006.229.16:24:18.45#ibcon#*before write, iclass 23, count 0 2006.229.16:24:18.45#ibcon#enter sib2, iclass 23, count 0 2006.229.16:24:18.45#ibcon#flushed, iclass 23, count 0 2006.229.16:24:18.45#ibcon#about to write, iclass 23, count 0 2006.229.16:24:18.45#ibcon#wrote, iclass 23, count 0 2006.229.16:24:18.45#ibcon#about to read 3, iclass 23, count 0 2006.229.16:24:18.48#ibcon#read 3, iclass 23, count 0 2006.229.16:24:18.48#ibcon#about to read 4, iclass 23, count 0 2006.229.16:24:18.48#ibcon#read 4, iclass 23, count 0 2006.229.16:24:18.48#ibcon#about to read 5, iclass 23, count 0 2006.229.16:24:18.48#ibcon#read 5, iclass 23, count 0 2006.229.16:24:18.48#ibcon#about to read 6, iclass 23, count 0 2006.229.16:24:18.48#ibcon#read 6, iclass 23, count 0 2006.229.16:24:18.48#ibcon#end of sib2, iclass 23, count 0 2006.229.16:24:18.48#ibcon#*after write, iclass 23, count 0 2006.229.16:24:18.48#ibcon#*before return 0, iclass 23, count 0 2006.229.16:24:18.48#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:18.48#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:24:18.48#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:24:18.48#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:24:18.48$vck44/vblo=6,719.99 2006.229.16:24:18.48#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.16:24:18.48#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.16:24:18.48#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:18.48#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:18.48#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:18.48#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:18.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:24:18.48#ibcon#first serial, iclass 25, count 0 2006.229.16:24:18.48#ibcon#enter sib2, iclass 25, count 0 2006.229.16:24:18.48#ibcon#flushed, iclass 25, count 0 2006.229.16:24:18.48#ibcon#about to write, iclass 25, count 0 2006.229.16:24:18.48#ibcon#wrote, iclass 25, count 0 2006.229.16:24:18.48#ibcon#about to read 3, iclass 25, count 0 2006.229.16:24:18.50#ibcon#read 3, iclass 25, count 0 2006.229.16:24:18.50#ibcon#about to read 4, iclass 25, count 0 2006.229.16:24:18.50#ibcon#read 4, iclass 25, count 0 2006.229.16:24:18.50#ibcon#about to read 5, iclass 25, count 0 2006.229.16:24:18.50#ibcon#read 5, iclass 25, count 0 2006.229.16:24:18.50#ibcon#about to read 6, iclass 25, count 0 2006.229.16:24:18.50#ibcon#read 6, iclass 25, count 0 2006.229.16:24:18.50#ibcon#end of sib2, iclass 25, count 0 2006.229.16:24:18.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:24:18.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:24:18.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:24:18.50#ibcon#*before write, iclass 25, count 0 2006.229.16:24:18.50#ibcon#enter sib2, iclass 25, count 0 2006.229.16:24:18.50#ibcon#flushed, iclass 25, count 0 2006.229.16:24:18.50#ibcon#about to write, iclass 25, count 0 2006.229.16:24:18.50#ibcon#wrote, iclass 25, count 0 2006.229.16:24:18.50#ibcon#about to read 3, iclass 25, count 0 2006.229.16:24:18.54#ibcon#read 3, iclass 25, count 0 2006.229.16:24:18.54#ibcon#about to read 4, iclass 25, count 0 2006.229.16:24:18.54#ibcon#read 4, iclass 25, count 0 2006.229.16:24:18.54#ibcon#about to read 5, iclass 25, count 0 2006.229.16:24:18.54#ibcon#read 5, iclass 25, count 0 2006.229.16:24:18.54#ibcon#about to read 6, iclass 25, count 0 2006.229.16:24:18.54#ibcon#read 6, iclass 25, count 0 2006.229.16:24:18.54#ibcon#end of sib2, iclass 25, count 0 2006.229.16:24:18.54#ibcon#*after write, iclass 25, count 0 2006.229.16:24:18.54#ibcon#*before return 0, iclass 25, count 0 2006.229.16:24:18.54#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:18.54#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:24:18.54#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:24:18.54#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:24:18.54$vck44/vb=6,4 2006.229.16:24:18.54#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.16:24:18.54#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.16:24:18.54#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:18.54#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:18.60#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:18.60#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:18.60#ibcon#enter wrdev, iclass 27, count 2 2006.229.16:24:18.60#ibcon#first serial, iclass 27, count 2 2006.229.16:24:18.60#ibcon#enter sib2, iclass 27, count 2 2006.229.16:24:18.60#ibcon#flushed, iclass 27, count 2 2006.229.16:24:18.60#ibcon#about to write, iclass 27, count 2 2006.229.16:24:18.60#ibcon#wrote, iclass 27, count 2 2006.229.16:24:18.60#ibcon#about to read 3, iclass 27, count 2 2006.229.16:24:18.62#ibcon#read 3, iclass 27, count 2 2006.229.16:24:18.62#ibcon#about to read 4, iclass 27, count 2 2006.229.16:24:18.62#ibcon#read 4, iclass 27, count 2 2006.229.16:24:18.62#ibcon#about to read 5, iclass 27, count 2 2006.229.16:24:18.62#ibcon#read 5, iclass 27, count 2 2006.229.16:24:18.62#ibcon#about to read 6, iclass 27, count 2 2006.229.16:24:18.62#ibcon#read 6, iclass 27, count 2 2006.229.16:24:18.62#ibcon#end of sib2, iclass 27, count 2 2006.229.16:24:18.62#ibcon#*mode == 0, iclass 27, count 2 2006.229.16:24:18.62#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.16:24:18.62#ibcon#[27=AT06-04\r\n] 2006.229.16:24:18.62#ibcon#*before write, iclass 27, count 2 2006.229.16:24:18.62#ibcon#enter sib2, iclass 27, count 2 2006.229.16:24:18.62#ibcon#flushed, iclass 27, count 2 2006.229.16:24:18.62#ibcon#about to write, iclass 27, count 2 2006.229.16:24:18.62#ibcon#wrote, iclass 27, count 2 2006.229.16:24:18.62#ibcon#about to read 3, iclass 27, count 2 2006.229.16:24:18.65#ibcon#read 3, iclass 27, count 2 2006.229.16:24:18.65#ibcon#about to read 4, iclass 27, count 2 2006.229.16:24:18.65#ibcon#read 4, iclass 27, count 2 2006.229.16:24:18.65#ibcon#about to read 5, iclass 27, count 2 2006.229.16:24:18.65#ibcon#read 5, iclass 27, count 2 2006.229.16:24:18.65#ibcon#about to read 6, iclass 27, count 2 2006.229.16:24:18.65#ibcon#read 6, iclass 27, count 2 2006.229.16:24:18.65#ibcon#end of sib2, iclass 27, count 2 2006.229.16:24:18.65#ibcon#*after write, iclass 27, count 2 2006.229.16:24:18.65#ibcon#*before return 0, iclass 27, count 2 2006.229.16:24:18.65#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:18.65#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:24:18.65#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.16:24:18.65#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:18.65#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:18.77#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:18.77#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:18.77#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:24:18.77#ibcon#first serial, iclass 27, count 0 2006.229.16:24:18.77#ibcon#enter sib2, iclass 27, count 0 2006.229.16:24:18.77#ibcon#flushed, iclass 27, count 0 2006.229.16:24:18.77#ibcon#about to write, iclass 27, count 0 2006.229.16:24:18.77#ibcon#wrote, iclass 27, count 0 2006.229.16:24:18.77#ibcon#about to read 3, iclass 27, count 0 2006.229.16:24:18.79#ibcon#read 3, iclass 27, count 0 2006.229.16:24:18.79#ibcon#about to read 4, iclass 27, count 0 2006.229.16:24:18.79#ibcon#read 4, iclass 27, count 0 2006.229.16:24:18.79#ibcon#about to read 5, iclass 27, count 0 2006.229.16:24:18.79#ibcon#read 5, iclass 27, count 0 2006.229.16:24:18.79#ibcon#about to read 6, iclass 27, count 0 2006.229.16:24:18.79#ibcon#read 6, iclass 27, count 0 2006.229.16:24:18.79#ibcon#end of sib2, iclass 27, count 0 2006.229.16:24:18.79#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:24:18.79#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:24:18.79#ibcon#[27=USB\r\n] 2006.229.16:24:18.79#ibcon#*before write, iclass 27, count 0 2006.229.16:24:18.79#ibcon#enter sib2, iclass 27, count 0 2006.229.16:24:18.79#ibcon#flushed, iclass 27, count 0 2006.229.16:24:18.79#ibcon#about to write, iclass 27, count 0 2006.229.16:24:18.79#ibcon#wrote, iclass 27, count 0 2006.229.16:24:18.79#ibcon#about to read 3, iclass 27, count 0 2006.229.16:24:18.82#ibcon#read 3, iclass 27, count 0 2006.229.16:24:18.82#ibcon#about to read 4, iclass 27, count 0 2006.229.16:24:18.82#ibcon#read 4, iclass 27, count 0 2006.229.16:24:18.82#ibcon#about to read 5, iclass 27, count 0 2006.229.16:24:18.82#ibcon#read 5, iclass 27, count 0 2006.229.16:24:18.82#ibcon#about to read 6, iclass 27, count 0 2006.229.16:24:18.82#ibcon#read 6, iclass 27, count 0 2006.229.16:24:18.82#ibcon#end of sib2, iclass 27, count 0 2006.229.16:24:18.82#ibcon#*after write, iclass 27, count 0 2006.229.16:24:18.82#ibcon#*before return 0, iclass 27, count 0 2006.229.16:24:18.82#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:18.82#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:24:18.82#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:24:18.82#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:24:18.82$vck44/vblo=7,734.99 2006.229.16:24:18.82#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.16:24:18.82#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.16:24:18.82#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:18.82#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:18.82#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:18.82#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:18.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:24:18.82#ibcon#first serial, iclass 29, count 0 2006.229.16:24:18.82#ibcon#enter sib2, iclass 29, count 0 2006.229.16:24:18.82#ibcon#flushed, iclass 29, count 0 2006.229.16:24:18.82#ibcon#about to write, iclass 29, count 0 2006.229.16:24:18.82#ibcon#wrote, iclass 29, count 0 2006.229.16:24:18.82#ibcon#about to read 3, iclass 29, count 0 2006.229.16:24:18.84#ibcon#read 3, iclass 29, count 0 2006.229.16:24:18.84#ibcon#about to read 4, iclass 29, count 0 2006.229.16:24:18.84#ibcon#read 4, iclass 29, count 0 2006.229.16:24:18.84#ibcon#about to read 5, iclass 29, count 0 2006.229.16:24:18.84#ibcon#read 5, iclass 29, count 0 2006.229.16:24:18.84#ibcon#about to read 6, iclass 29, count 0 2006.229.16:24:18.84#ibcon#read 6, iclass 29, count 0 2006.229.16:24:18.84#ibcon#end of sib2, iclass 29, count 0 2006.229.16:24:18.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:24:18.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:24:18.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:24:18.84#ibcon#*before write, iclass 29, count 0 2006.229.16:24:18.84#ibcon#enter sib2, iclass 29, count 0 2006.229.16:24:18.84#ibcon#flushed, iclass 29, count 0 2006.229.16:24:18.84#ibcon#about to write, iclass 29, count 0 2006.229.16:24:18.84#ibcon#wrote, iclass 29, count 0 2006.229.16:24:18.84#ibcon#about to read 3, iclass 29, count 0 2006.229.16:24:18.88#ibcon#read 3, iclass 29, count 0 2006.229.16:24:18.88#ibcon#about to read 4, iclass 29, count 0 2006.229.16:24:18.88#ibcon#read 4, iclass 29, count 0 2006.229.16:24:18.88#ibcon#about to read 5, iclass 29, count 0 2006.229.16:24:18.88#ibcon#read 5, iclass 29, count 0 2006.229.16:24:18.88#ibcon#about to read 6, iclass 29, count 0 2006.229.16:24:18.88#ibcon#read 6, iclass 29, count 0 2006.229.16:24:18.88#ibcon#end of sib2, iclass 29, count 0 2006.229.16:24:18.88#ibcon#*after write, iclass 29, count 0 2006.229.16:24:18.88#ibcon#*before return 0, iclass 29, count 0 2006.229.16:24:18.88#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:18.88#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:24:18.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:24:18.88#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:24:18.88$vck44/vb=7,4 2006.229.16:24:18.88#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.16:24:18.88#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.16:24:18.88#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:18.88#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:18.94#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:18.94#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:18.94#ibcon#enter wrdev, iclass 31, count 2 2006.229.16:24:18.94#ibcon#first serial, iclass 31, count 2 2006.229.16:24:18.94#ibcon#enter sib2, iclass 31, count 2 2006.229.16:24:18.94#ibcon#flushed, iclass 31, count 2 2006.229.16:24:18.94#ibcon#about to write, iclass 31, count 2 2006.229.16:24:18.94#ibcon#wrote, iclass 31, count 2 2006.229.16:24:18.94#ibcon#about to read 3, iclass 31, count 2 2006.229.16:24:18.96#ibcon#read 3, iclass 31, count 2 2006.229.16:24:18.96#ibcon#about to read 4, iclass 31, count 2 2006.229.16:24:18.96#ibcon#read 4, iclass 31, count 2 2006.229.16:24:18.96#ibcon#about to read 5, iclass 31, count 2 2006.229.16:24:18.96#ibcon#read 5, iclass 31, count 2 2006.229.16:24:18.96#ibcon#about to read 6, iclass 31, count 2 2006.229.16:24:18.96#ibcon#read 6, iclass 31, count 2 2006.229.16:24:18.96#ibcon#end of sib2, iclass 31, count 2 2006.229.16:24:18.96#ibcon#*mode == 0, iclass 31, count 2 2006.229.16:24:18.96#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.16:24:18.96#ibcon#[27=AT07-04\r\n] 2006.229.16:24:18.96#ibcon#*before write, iclass 31, count 2 2006.229.16:24:18.96#ibcon#enter sib2, iclass 31, count 2 2006.229.16:24:18.96#ibcon#flushed, iclass 31, count 2 2006.229.16:24:18.96#ibcon#about to write, iclass 31, count 2 2006.229.16:24:18.96#ibcon#wrote, iclass 31, count 2 2006.229.16:24:18.96#ibcon#about to read 3, iclass 31, count 2 2006.229.16:24:18.99#ibcon#read 3, iclass 31, count 2 2006.229.16:24:18.99#ibcon#about to read 4, iclass 31, count 2 2006.229.16:24:18.99#ibcon#read 4, iclass 31, count 2 2006.229.16:24:18.99#ibcon#about to read 5, iclass 31, count 2 2006.229.16:24:18.99#ibcon#read 5, iclass 31, count 2 2006.229.16:24:18.99#ibcon#about to read 6, iclass 31, count 2 2006.229.16:24:18.99#ibcon#read 6, iclass 31, count 2 2006.229.16:24:18.99#ibcon#end of sib2, iclass 31, count 2 2006.229.16:24:18.99#ibcon#*after write, iclass 31, count 2 2006.229.16:24:18.99#ibcon#*before return 0, iclass 31, count 2 2006.229.16:24:18.99#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:18.99#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:24:18.99#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.16:24:18.99#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:18.99#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:19.11#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:19.11#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:19.11#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:24:19.11#ibcon#first serial, iclass 31, count 0 2006.229.16:24:19.11#ibcon#enter sib2, iclass 31, count 0 2006.229.16:24:19.11#ibcon#flushed, iclass 31, count 0 2006.229.16:24:19.11#ibcon#about to write, iclass 31, count 0 2006.229.16:24:19.11#ibcon#wrote, iclass 31, count 0 2006.229.16:24:19.11#ibcon#about to read 3, iclass 31, count 0 2006.229.16:24:19.13#ibcon#read 3, iclass 31, count 0 2006.229.16:24:19.13#ibcon#about to read 4, iclass 31, count 0 2006.229.16:24:19.13#ibcon#read 4, iclass 31, count 0 2006.229.16:24:19.13#ibcon#about to read 5, iclass 31, count 0 2006.229.16:24:19.13#ibcon#read 5, iclass 31, count 0 2006.229.16:24:19.13#ibcon#about to read 6, iclass 31, count 0 2006.229.16:24:19.13#ibcon#read 6, iclass 31, count 0 2006.229.16:24:19.13#ibcon#end of sib2, iclass 31, count 0 2006.229.16:24:19.13#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:24:19.13#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:24:19.13#ibcon#[27=USB\r\n] 2006.229.16:24:19.13#ibcon#*before write, iclass 31, count 0 2006.229.16:24:19.13#ibcon#enter sib2, iclass 31, count 0 2006.229.16:24:19.13#ibcon#flushed, iclass 31, count 0 2006.229.16:24:19.13#ibcon#about to write, iclass 31, count 0 2006.229.16:24:19.13#ibcon#wrote, iclass 31, count 0 2006.229.16:24:19.13#ibcon#about to read 3, iclass 31, count 0 2006.229.16:24:19.16#ibcon#read 3, iclass 31, count 0 2006.229.16:24:19.16#ibcon#about to read 4, iclass 31, count 0 2006.229.16:24:19.16#ibcon#read 4, iclass 31, count 0 2006.229.16:24:19.16#ibcon#about to read 5, iclass 31, count 0 2006.229.16:24:19.16#ibcon#read 5, iclass 31, count 0 2006.229.16:24:19.16#ibcon#about to read 6, iclass 31, count 0 2006.229.16:24:19.16#ibcon#read 6, iclass 31, count 0 2006.229.16:24:19.16#ibcon#end of sib2, iclass 31, count 0 2006.229.16:24:19.16#ibcon#*after write, iclass 31, count 0 2006.229.16:24:19.16#ibcon#*before return 0, iclass 31, count 0 2006.229.16:24:19.16#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:19.16#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:24:19.16#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:24:19.16#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:24:19.16$vck44/vblo=8,744.99 2006.229.16:24:19.16#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:24:19.16#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:24:19.16#ibcon#ireg 17 cls_cnt 0 2006.229.16:24:19.16#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:19.16#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:19.16#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:19.16#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:24:19.16#ibcon#first serial, iclass 33, count 0 2006.229.16:24:19.16#ibcon#enter sib2, iclass 33, count 0 2006.229.16:24:19.16#ibcon#flushed, iclass 33, count 0 2006.229.16:24:19.16#ibcon#about to write, iclass 33, count 0 2006.229.16:24:19.16#ibcon#wrote, iclass 33, count 0 2006.229.16:24:19.16#ibcon#about to read 3, iclass 33, count 0 2006.229.16:24:19.18#ibcon#read 3, iclass 33, count 0 2006.229.16:24:19.18#ibcon#about to read 4, iclass 33, count 0 2006.229.16:24:19.18#ibcon#read 4, iclass 33, count 0 2006.229.16:24:19.18#ibcon#about to read 5, iclass 33, count 0 2006.229.16:24:19.18#ibcon#read 5, iclass 33, count 0 2006.229.16:24:19.18#ibcon#about to read 6, iclass 33, count 0 2006.229.16:24:19.18#ibcon#read 6, iclass 33, count 0 2006.229.16:24:19.18#ibcon#end of sib2, iclass 33, count 0 2006.229.16:24:19.18#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:24:19.18#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:24:19.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:24:19.18#ibcon#*before write, iclass 33, count 0 2006.229.16:24:19.18#ibcon#enter sib2, iclass 33, count 0 2006.229.16:24:19.18#ibcon#flushed, iclass 33, count 0 2006.229.16:24:19.18#ibcon#about to write, iclass 33, count 0 2006.229.16:24:19.18#ibcon#wrote, iclass 33, count 0 2006.229.16:24:19.18#ibcon#about to read 3, iclass 33, count 0 2006.229.16:24:19.22#ibcon#read 3, iclass 33, count 0 2006.229.16:24:19.22#ibcon#about to read 4, iclass 33, count 0 2006.229.16:24:19.22#ibcon#read 4, iclass 33, count 0 2006.229.16:24:19.22#ibcon#about to read 5, iclass 33, count 0 2006.229.16:24:19.22#ibcon#read 5, iclass 33, count 0 2006.229.16:24:19.22#ibcon#about to read 6, iclass 33, count 0 2006.229.16:24:19.22#ibcon#read 6, iclass 33, count 0 2006.229.16:24:19.22#ibcon#end of sib2, iclass 33, count 0 2006.229.16:24:19.22#ibcon#*after write, iclass 33, count 0 2006.229.16:24:19.22#ibcon#*before return 0, iclass 33, count 0 2006.229.16:24:19.22#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:19.22#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:24:19.22#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:24:19.22#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:24:19.22$vck44/vb=8,4 2006.229.16:24:19.22#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:24:19.22#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:24:19.22#ibcon#ireg 11 cls_cnt 2 2006.229.16:24:19.22#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:19.28#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:19.28#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:19.28#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:24:19.28#ibcon#first serial, iclass 35, count 2 2006.229.16:24:19.28#ibcon#enter sib2, iclass 35, count 2 2006.229.16:24:19.28#ibcon#flushed, iclass 35, count 2 2006.229.16:24:19.28#ibcon#about to write, iclass 35, count 2 2006.229.16:24:19.28#ibcon#wrote, iclass 35, count 2 2006.229.16:24:19.28#ibcon#about to read 3, iclass 35, count 2 2006.229.16:24:19.30#ibcon#read 3, iclass 35, count 2 2006.229.16:24:19.30#ibcon#about to read 4, iclass 35, count 2 2006.229.16:24:19.30#ibcon#read 4, iclass 35, count 2 2006.229.16:24:19.30#ibcon#about to read 5, iclass 35, count 2 2006.229.16:24:19.30#ibcon#read 5, iclass 35, count 2 2006.229.16:24:19.30#ibcon#about to read 6, iclass 35, count 2 2006.229.16:24:19.30#ibcon#read 6, iclass 35, count 2 2006.229.16:24:19.30#ibcon#end of sib2, iclass 35, count 2 2006.229.16:24:19.30#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:24:19.30#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:24:19.30#ibcon#[27=AT08-04\r\n] 2006.229.16:24:19.30#ibcon#*before write, iclass 35, count 2 2006.229.16:24:19.30#ibcon#enter sib2, iclass 35, count 2 2006.229.16:24:19.30#ibcon#flushed, iclass 35, count 2 2006.229.16:24:19.30#ibcon#about to write, iclass 35, count 2 2006.229.16:24:19.30#ibcon#wrote, iclass 35, count 2 2006.229.16:24:19.30#ibcon#about to read 3, iclass 35, count 2 2006.229.16:24:19.33#ibcon#read 3, iclass 35, count 2 2006.229.16:24:19.33#ibcon#about to read 4, iclass 35, count 2 2006.229.16:24:19.33#ibcon#read 4, iclass 35, count 2 2006.229.16:24:19.33#ibcon#about to read 5, iclass 35, count 2 2006.229.16:24:19.33#ibcon#read 5, iclass 35, count 2 2006.229.16:24:19.33#ibcon#about to read 6, iclass 35, count 2 2006.229.16:24:19.33#ibcon#read 6, iclass 35, count 2 2006.229.16:24:19.33#ibcon#end of sib2, iclass 35, count 2 2006.229.16:24:19.33#ibcon#*after write, iclass 35, count 2 2006.229.16:24:19.33#ibcon#*before return 0, iclass 35, count 2 2006.229.16:24:19.33#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:19.33#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:24:19.33#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:24:19.33#ibcon#ireg 7 cls_cnt 0 2006.229.16:24:19.33#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:19.45#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:19.45#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:19.45#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:24:19.45#ibcon#first serial, iclass 35, count 0 2006.229.16:24:19.45#ibcon#enter sib2, iclass 35, count 0 2006.229.16:24:19.45#ibcon#flushed, iclass 35, count 0 2006.229.16:24:19.45#ibcon#about to write, iclass 35, count 0 2006.229.16:24:19.45#ibcon#wrote, iclass 35, count 0 2006.229.16:24:19.45#ibcon#about to read 3, iclass 35, count 0 2006.229.16:24:19.47#ibcon#read 3, iclass 35, count 0 2006.229.16:24:19.47#ibcon#about to read 4, iclass 35, count 0 2006.229.16:24:19.47#ibcon#read 4, iclass 35, count 0 2006.229.16:24:19.47#ibcon#about to read 5, iclass 35, count 0 2006.229.16:24:19.47#ibcon#read 5, iclass 35, count 0 2006.229.16:24:19.47#ibcon#about to read 6, iclass 35, count 0 2006.229.16:24:19.47#ibcon#read 6, iclass 35, count 0 2006.229.16:24:19.47#ibcon#end of sib2, iclass 35, count 0 2006.229.16:24:19.47#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:24:19.47#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:24:19.47#ibcon#[27=USB\r\n] 2006.229.16:24:19.47#ibcon#*before write, iclass 35, count 0 2006.229.16:24:19.47#ibcon#enter sib2, iclass 35, count 0 2006.229.16:24:19.47#ibcon#flushed, iclass 35, count 0 2006.229.16:24:19.47#ibcon#about to write, iclass 35, count 0 2006.229.16:24:19.47#ibcon#wrote, iclass 35, count 0 2006.229.16:24:19.47#ibcon#about to read 3, iclass 35, count 0 2006.229.16:24:19.50#ibcon#read 3, iclass 35, count 0 2006.229.16:24:19.50#ibcon#about to read 4, iclass 35, count 0 2006.229.16:24:19.50#ibcon#read 4, iclass 35, count 0 2006.229.16:24:19.50#ibcon#about to read 5, iclass 35, count 0 2006.229.16:24:19.50#ibcon#read 5, iclass 35, count 0 2006.229.16:24:19.50#ibcon#about to read 6, iclass 35, count 0 2006.229.16:24:19.50#ibcon#read 6, iclass 35, count 0 2006.229.16:24:19.50#ibcon#end of sib2, iclass 35, count 0 2006.229.16:24:19.50#ibcon#*after write, iclass 35, count 0 2006.229.16:24:19.50#ibcon#*before return 0, iclass 35, count 0 2006.229.16:24:19.50#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:19.50#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:24:19.50#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:24:19.50#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:24:19.50$vck44/vabw=wide 2006.229.16:24:19.50#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.16:24:19.50#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.16:24:19.50#ibcon#ireg 8 cls_cnt 0 2006.229.16:24:19.50#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:19.50#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:19.50#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:19.50#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:24:19.50#ibcon#first serial, iclass 37, count 0 2006.229.16:24:19.50#ibcon#enter sib2, iclass 37, count 0 2006.229.16:24:19.50#ibcon#flushed, iclass 37, count 0 2006.229.16:24:19.50#ibcon#about to write, iclass 37, count 0 2006.229.16:24:19.50#ibcon#wrote, iclass 37, count 0 2006.229.16:24:19.50#ibcon#about to read 3, iclass 37, count 0 2006.229.16:24:19.52#ibcon#read 3, iclass 37, count 0 2006.229.16:24:19.52#ibcon#about to read 4, iclass 37, count 0 2006.229.16:24:19.52#ibcon#read 4, iclass 37, count 0 2006.229.16:24:19.52#ibcon#about to read 5, iclass 37, count 0 2006.229.16:24:19.52#ibcon#read 5, iclass 37, count 0 2006.229.16:24:19.52#ibcon#about to read 6, iclass 37, count 0 2006.229.16:24:19.52#ibcon#read 6, iclass 37, count 0 2006.229.16:24:19.52#ibcon#end of sib2, iclass 37, count 0 2006.229.16:24:19.52#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:24:19.52#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:24:19.52#ibcon#[25=BW32\r\n] 2006.229.16:24:19.52#ibcon#*before write, iclass 37, count 0 2006.229.16:24:19.52#ibcon#enter sib2, iclass 37, count 0 2006.229.16:24:19.52#ibcon#flushed, iclass 37, count 0 2006.229.16:24:19.52#ibcon#about to write, iclass 37, count 0 2006.229.16:24:19.52#ibcon#wrote, iclass 37, count 0 2006.229.16:24:19.52#ibcon#about to read 3, iclass 37, count 0 2006.229.16:24:19.55#ibcon#read 3, iclass 37, count 0 2006.229.16:24:19.55#ibcon#about to read 4, iclass 37, count 0 2006.229.16:24:19.55#ibcon#read 4, iclass 37, count 0 2006.229.16:24:19.55#ibcon#about to read 5, iclass 37, count 0 2006.229.16:24:19.55#ibcon#read 5, iclass 37, count 0 2006.229.16:24:19.55#ibcon#about to read 6, iclass 37, count 0 2006.229.16:24:19.55#ibcon#read 6, iclass 37, count 0 2006.229.16:24:19.55#ibcon#end of sib2, iclass 37, count 0 2006.229.16:24:19.55#ibcon#*after write, iclass 37, count 0 2006.229.16:24:19.55#ibcon#*before return 0, iclass 37, count 0 2006.229.16:24:19.55#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:19.55#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:24:19.55#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:24:19.55#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:24:19.55$vck44/vbbw=wide 2006.229.16:24:19.55#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.16:24:19.55#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.16:24:19.55#ibcon#ireg 8 cls_cnt 0 2006.229.16:24:19.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:24:19.62#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:24:19.62#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:24:19.62#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:24:19.62#ibcon#first serial, iclass 39, count 0 2006.229.16:24:19.62#ibcon#enter sib2, iclass 39, count 0 2006.229.16:24:19.62#ibcon#flushed, iclass 39, count 0 2006.229.16:24:19.62#ibcon#about to write, iclass 39, count 0 2006.229.16:24:19.62#ibcon#wrote, iclass 39, count 0 2006.229.16:24:19.62#ibcon#about to read 3, iclass 39, count 0 2006.229.16:24:19.64#ibcon#read 3, iclass 39, count 0 2006.229.16:24:19.64#ibcon#about to read 4, iclass 39, count 0 2006.229.16:24:19.64#ibcon#read 4, iclass 39, count 0 2006.229.16:24:19.64#ibcon#about to read 5, iclass 39, count 0 2006.229.16:24:19.64#ibcon#read 5, iclass 39, count 0 2006.229.16:24:19.64#ibcon#about to read 6, iclass 39, count 0 2006.229.16:24:19.64#ibcon#read 6, iclass 39, count 0 2006.229.16:24:19.64#ibcon#end of sib2, iclass 39, count 0 2006.229.16:24:19.64#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:24:19.64#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:24:19.64#ibcon#[27=BW32\r\n] 2006.229.16:24:19.64#ibcon#*before write, iclass 39, count 0 2006.229.16:24:19.64#ibcon#enter sib2, iclass 39, count 0 2006.229.16:24:19.64#ibcon#flushed, iclass 39, count 0 2006.229.16:24:19.64#ibcon#about to write, iclass 39, count 0 2006.229.16:24:19.64#ibcon#wrote, iclass 39, count 0 2006.229.16:24:19.64#ibcon#about to read 3, iclass 39, count 0 2006.229.16:24:19.67#ibcon#read 3, iclass 39, count 0 2006.229.16:24:19.67#ibcon#about to read 4, iclass 39, count 0 2006.229.16:24:19.67#ibcon#read 4, iclass 39, count 0 2006.229.16:24:19.67#ibcon#about to read 5, iclass 39, count 0 2006.229.16:24:19.67#ibcon#read 5, iclass 39, count 0 2006.229.16:24:19.67#ibcon#about to read 6, iclass 39, count 0 2006.229.16:24:19.67#ibcon#read 6, iclass 39, count 0 2006.229.16:24:19.67#ibcon#end of sib2, iclass 39, count 0 2006.229.16:24:19.67#ibcon#*after write, iclass 39, count 0 2006.229.16:24:19.67#ibcon#*before return 0, iclass 39, count 0 2006.229.16:24:19.67#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:24:19.67#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:24:19.67#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:24:19.67#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:24:19.67$setupk4/ifdk4 2006.229.16:24:19.67$ifdk4/lo= 2006.229.16:24:19.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:24:19.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:24:19.67$ifdk4/patch= 2006.229.16:24:19.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:24:19.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:24:19.67$setupk4/!*+20s 2006.229.16:24:28.03#abcon#<5=/05 1.6 2.5 27.171001001.9\r\n> 2006.229.16:24:28.05#abcon#{5=INTERFACE CLEAR} 2006.229.16:24:28.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:24:34.18$setupk4/"tpicd 2006.229.16:24:34.18$setupk4/echo=off 2006.229.16:24:34.18$setupk4/xlog=off 2006.229.16:24:34.18:!2006.229.16:28:33 2006.229.16:25:04.13#trakl#Source acquired 2006.229.16:25:06.13#flagr#flagr/antenna,acquired 2006.229.16:28:33.00:preob 2006.229.16:28:34.14/onsource/TRACKING 2006.229.16:28:34.14:!2006.229.16:28:43 2006.229.16:28:43.00:"tape 2006.229.16:28:43.00:"st=record 2006.229.16:28:43.00:data_valid=on 2006.229.16:28:43.00:midob 2006.229.16:28:43.14/onsource/TRACKING 2006.229.16:28:43.14/wx/27.16,1001.8,100 2006.229.16:28:43.34/cable/+6.4123E-03 2006.229.16:28:44.43/va/01,08,usb,yes,29,31 2006.229.16:28:44.43/va/02,07,usb,yes,31,32 2006.229.16:28:44.43/va/03,06,usb,yes,39,41 2006.229.16:28:44.43/va/04,07,usb,yes,32,34 2006.229.16:28:44.43/va/05,04,usb,yes,29,29 2006.229.16:28:44.43/va/06,04,usb,yes,32,32 2006.229.16:28:44.43/va/07,05,usb,yes,28,29 2006.229.16:28:44.43/va/08,06,usb,yes,21,26 2006.229.16:28:44.66/valo/01,524.99,yes,locked 2006.229.16:28:44.66/valo/02,534.99,yes,locked 2006.229.16:28:44.66/valo/03,564.99,yes,locked 2006.229.16:28:44.66/valo/04,624.99,yes,locked 2006.229.16:28:44.66/valo/05,734.99,yes,locked 2006.229.16:28:44.66/valo/06,814.99,yes,locked 2006.229.16:28:44.66/valo/07,864.99,yes,locked 2006.229.16:28:44.66/valo/08,884.99,yes,locked 2006.229.16:28:45.75/vb/01,04,usb,yes,30,28 2006.229.16:28:45.75/vb/02,04,usb,yes,33,33 2006.229.16:28:45.75/vb/03,04,usb,yes,30,33 2006.229.16:28:45.75/vb/04,04,usb,yes,34,33 2006.229.16:28:45.75/vb/05,04,usb,yes,27,29 2006.229.16:28:45.75/vb/06,04,usb,yes,31,27 2006.229.16:28:45.75/vb/07,04,usb,yes,31,31 2006.229.16:28:45.75/vb/08,04,usb,yes,28,32 2006.229.16:28:45.99/vblo/01,629.99,yes,locked 2006.229.16:28:45.99/vblo/02,634.99,yes,locked 2006.229.16:28:45.99/vblo/03,649.99,yes,locked 2006.229.16:28:45.99/vblo/04,679.99,yes,locked 2006.229.16:28:45.99/vblo/05,709.99,yes,locked 2006.229.16:28:45.99/vblo/06,719.99,yes,locked 2006.229.16:28:45.99/vblo/07,734.99,yes,locked 2006.229.16:28:45.99/vblo/08,744.99,yes,locked 2006.229.16:28:46.14/vabw/8 2006.229.16:28:46.29/vbbw/8 2006.229.16:28:46.38/xfe/off,on,12.0 2006.229.16:28:46.77/ifatt/23,28,28,28 2006.229.16:28:47.08/fmout-gps/S +4.49E-07 2006.229.16:28:47.11:!2006.229.16:31:03 2006.229.16:31:03.00:data_valid=off 2006.229.16:31:03.00:"et 2006.229.16:31:03.00:!+3s 2006.229.16:31:06.01:"tape 2006.229.16:31:06.01:postob 2006.229.16:31:06.19/cable/+6.4147E-03 2006.229.16:31:06.19/wx/27.16,1001.7,100 2006.229.16:31:07.08/fmout-gps/S +4.51E-07 2006.229.16:31:07.08:scan_name=229-1633,jd0608,60 2006.229.16:31:07.08:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.16:31:08.14#flagr#flagr/antenna,new-source 2006.229.16:31:08.14:checkk5 2006.229.16:31:08.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:31:08.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:31:09.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:31:09.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:31:10.15/chk_obsdata//k5ts1/T2291628??a.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:31:10.56/chk_obsdata//k5ts2/T2291628??b.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:31:10.96/chk_obsdata//k5ts3/T2291628??c.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:31:11.36/chk_obsdata//k5ts4/T2291628??d.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:31:12.08/k5log//k5ts1_log_newline 2006.229.16:31:12.79/k5log//k5ts2_log_newline 2006.229.16:31:13.51/k5log//k5ts3_log_newline 2006.229.16:31:14.24/k5log//k5ts4_log_newline 2006.229.16:31:14.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:31:14.26:setupk4=1 2006.229.16:31:14.26$setupk4/echo=on 2006.229.16:31:14.26$setupk4/pcalon 2006.229.16:31:14.26$pcalon/"no phase cal control is implemented here 2006.229.16:31:14.26$setupk4/"tpicd=stop 2006.229.16:31:14.26$setupk4/"rec=synch_on 2006.229.16:31:14.26$setupk4/"rec_mode=128 2006.229.16:31:14.26$setupk4/!* 2006.229.16:31:14.26$setupk4/recpk4 2006.229.16:31:14.26$recpk4/recpatch= 2006.229.16:31:14.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:31:14.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:31:14.27$setupk4/vck44 2006.229.16:31:14.27$vck44/valo=1,524.99 2006.229.16:31:14.27#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.16:31:14.27#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.16:31:14.27#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:14.27#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:14.27#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:14.27#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:14.27#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:31:14.27#ibcon#first serial, iclass 24, count 0 2006.229.16:31:14.27#ibcon#enter sib2, iclass 24, count 0 2006.229.16:31:14.27#ibcon#flushed, iclass 24, count 0 2006.229.16:31:14.27#ibcon#about to write, iclass 24, count 0 2006.229.16:31:14.27#ibcon#wrote, iclass 24, count 0 2006.229.16:31:14.27#ibcon#about to read 3, iclass 24, count 0 2006.229.16:31:14.29#ibcon#read 3, iclass 24, count 0 2006.229.16:31:14.29#ibcon#about to read 4, iclass 24, count 0 2006.229.16:31:14.29#ibcon#read 4, iclass 24, count 0 2006.229.16:31:14.29#ibcon#about to read 5, iclass 24, count 0 2006.229.16:31:14.29#ibcon#read 5, iclass 24, count 0 2006.229.16:31:14.29#ibcon#about to read 6, iclass 24, count 0 2006.229.16:31:14.29#ibcon#read 6, iclass 24, count 0 2006.229.16:31:14.29#ibcon#end of sib2, iclass 24, count 0 2006.229.16:31:14.29#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:31:14.29#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:31:14.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:31:14.29#ibcon#*before write, iclass 24, count 0 2006.229.16:31:14.29#ibcon#enter sib2, iclass 24, count 0 2006.229.16:31:14.29#ibcon#flushed, iclass 24, count 0 2006.229.16:31:14.29#ibcon#about to write, iclass 24, count 0 2006.229.16:31:14.29#ibcon#wrote, iclass 24, count 0 2006.229.16:31:14.29#ibcon#about to read 3, iclass 24, count 0 2006.229.16:31:14.34#ibcon#read 3, iclass 24, count 0 2006.229.16:31:14.34#ibcon#about to read 4, iclass 24, count 0 2006.229.16:31:14.34#ibcon#read 4, iclass 24, count 0 2006.229.16:31:14.34#ibcon#about to read 5, iclass 24, count 0 2006.229.16:31:14.34#ibcon#read 5, iclass 24, count 0 2006.229.16:31:14.34#ibcon#about to read 6, iclass 24, count 0 2006.229.16:31:14.34#ibcon#read 6, iclass 24, count 0 2006.229.16:31:14.34#ibcon#end of sib2, iclass 24, count 0 2006.229.16:31:14.34#ibcon#*after write, iclass 24, count 0 2006.229.16:31:14.34#ibcon#*before return 0, iclass 24, count 0 2006.229.16:31:14.34#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:14.34#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:14.34#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:31:14.34#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:31:14.34$vck44/va=1,8 2006.229.16:31:14.34#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.16:31:14.34#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.16:31:14.34#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:14.34#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:14.34#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:14.34#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:14.34#ibcon#enter wrdev, iclass 26, count 2 2006.229.16:31:14.34#ibcon#first serial, iclass 26, count 2 2006.229.16:31:14.34#ibcon#enter sib2, iclass 26, count 2 2006.229.16:31:14.34#ibcon#flushed, iclass 26, count 2 2006.229.16:31:14.34#ibcon#about to write, iclass 26, count 2 2006.229.16:31:14.34#ibcon#wrote, iclass 26, count 2 2006.229.16:31:14.34#ibcon#about to read 3, iclass 26, count 2 2006.229.16:31:14.36#ibcon#read 3, iclass 26, count 2 2006.229.16:31:14.36#ibcon#about to read 4, iclass 26, count 2 2006.229.16:31:14.36#ibcon#read 4, iclass 26, count 2 2006.229.16:31:14.36#ibcon#about to read 5, iclass 26, count 2 2006.229.16:31:14.36#ibcon#read 5, iclass 26, count 2 2006.229.16:31:14.36#ibcon#about to read 6, iclass 26, count 2 2006.229.16:31:14.36#ibcon#read 6, iclass 26, count 2 2006.229.16:31:14.36#ibcon#end of sib2, iclass 26, count 2 2006.229.16:31:14.36#ibcon#*mode == 0, iclass 26, count 2 2006.229.16:31:14.36#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.16:31:14.36#ibcon#[25=AT01-08\r\n] 2006.229.16:31:14.36#ibcon#*before write, iclass 26, count 2 2006.229.16:31:14.36#ibcon#enter sib2, iclass 26, count 2 2006.229.16:31:14.36#ibcon#flushed, iclass 26, count 2 2006.229.16:31:14.36#ibcon#about to write, iclass 26, count 2 2006.229.16:31:14.36#ibcon#wrote, iclass 26, count 2 2006.229.16:31:14.36#ibcon#about to read 3, iclass 26, count 2 2006.229.16:31:14.39#ibcon#read 3, iclass 26, count 2 2006.229.16:31:14.39#ibcon#about to read 4, iclass 26, count 2 2006.229.16:31:14.39#ibcon#read 4, iclass 26, count 2 2006.229.16:31:14.39#ibcon#about to read 5, iclass 26, count 2 2006.229.16:31:14.39#ibcon#read 5, iclass 26, count 2 2006.229.16:31:14.39#ibcon#about to read 6, iclass 26, count 2 2006.229.16:31:14.39#ibcon#read 6, iclass 26, count 2 2006.229.16:31:14.39#ibcon#end of sib2, iclass 26, count 2 2006.229.16:31:14.39#ibcon#*after write, iclass 26, count 2 2006.229.16:31:14.39#ibcon#*before return 0, iclass 26, count 2 2006.229.16:31:14.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:14.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:14.39#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.16:31:14.39#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:14.39#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:14.51#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:14.51#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:14.51#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:31:14.51#ibcon#first serial, iclass 26, count 0 2006.229.16:31:14.51#ibcon#enter sib2, iclass 26, count 0 2006.229.16:31:14.51#ibcon#flushed, iclass 26, count 0 2006.229.16:31:14.51#ibcon#about to write, iclass 26, count 0 2006.229.16:31:14.51#ibcon#wrote, iclass 26, count 0 2006.229.16:31:14.51#ibcon#about to read 3, iclass 26, count 0 2006.229.16:31:14.53#ibcon#read 3, iclass 26, count 0 2006.229.16:31:14.53#ibcon#about to read 4, iclass 26, count 0 2006.229.16:31:14.53#ibcon#read 4, iclass 26, count 0 2006.229.16:31:14.53#ibcon#about to read 5, iclass 26, count 0 2006.229.16:31:14.53#ibcon#read 5, iclass 26, count 0 2006.229.16:31:14.53#ibcon#about to read 6, iclass 26, count 0 2006.229.16:31:14.53#ibcon#read 6, iclass 26, count 0 2006.229.16:31:14.53#ibcon#end of sib2, iclass 26, count 0 2006.229.16:31:14.53#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:31:14.53#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:31:14.53#ibcon#[25=USB\r\n] 2006.229.16:31:14.53#ibcon#*before write, iclass 26, count 0 2006.229.16:31:14.53#ibcon#enter sib2, iclass 26, count 0 2006.229.16:31:14.53#ibcon#flushed, iclass 26, count 0 2006.229.16:31:14.53#ibcon#about to write, iclass 26, count 0 2006.229.16:31:14.53#ibcon#wrote, iclass 26, count 0 2006.229.16:31:14.53#ibcon#about to read 3, iclass 26, count 0 2006.229.16:31:14.56#ibcon#read 3, iclass 26, count 0 2006.229.16:31:14.56#ibcon#about to read 4, iclass 26, count 0 2006.229.16:31:14.56#ibcon#read 4, iclass 26, count 0 2006.229.16:31:14.56#ibcon#about to read 5, iclass 26, count 0 2006.229.16:31:14.56#ibcon#read 5, iclass 26, count 0 2006.229.16:31:14.56#ibcon#about to read 6, iclass 26, count 0 2006.229.16:31:14.56#ibcon#read 6, iclass 26, count 0 2006.229.16:31:14.56#ibcon#end of sib2, iclass 26, count 0 2006.229.16:31:14.56#ibcon#*after write, iclass 26, count 0 2006.229.16:31:14.56#ibcon#*before return 0, iclass 26, count 0 2006.229.16:31:14.56#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:14.56#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:14.56#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:31:14.56#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:31:14.56$vck44/valo=2,534.99 2006.229.16:31:14.56#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.16:31:14.56#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.16:31:14.56#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:14.56#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:14.56#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:14.56#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:14.56#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:31:14.56#ibcon#first serial, iclass 28, count 0 2006.229.16:31:14.56#ibcon#enter sib2, iclass 28, count 0 2006.229.16:31:14.56#ibcon#flushed, iclass 28, count 0 2006.229.16:31:14.56#ibcon#about to write, iclass 28, count 0 2006.229.16:31:14.56#ibcon#wrote, iclass 28, count 0 2006.229.16:31:14.56#ibcon#about to read 3, iclass 28, count 0 2006.229.16:31:14.58#ibcon#read 3, iclass 28, count 0 2006.229.16:31:14.58#ibcon#about to read 4, iclass 28, count 0 2006.229.16:31:14.58#ibcon#read 4, iclass 28, count 0 2006.229.16:31:14.58#ibcon#about to read 5, iclass 28, count 0 2006.229.16:31:14.58#ibcon#read 5, iclass 28, count 0 2006.229.16:31:14.58#ibcon#about to read 6, iclass 28, count 0 2006.229.16:31:14.58#ibcon#read 6, iclass 28, count 0 2006.229.16:31:14.58#ibcon#end of sib2, iclass 28, count 0 2006.229.16:31:14.58#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:31:14.58#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:31:14.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:31:14.58#ibcon#*before write, iclass 28, count 0 2006.229.16:31:14.58#ibcon#enter sib2, iclass 28, count 0 2006.229.16:31:14.58#ibcon#flushed, iclass 28, count 0 2006.229.16:31:14.58#ibcon#about to write, iclass 28, count 0 2006.229.16:31:14.58#ibcon#wrote, iclass 28, count 0 2006.229.16:31:14.58#ibcon#about to read 3, iclass 28, count 0 2006.229.16:31:14.62#ibcon#read 3, iclass 28, count 0 2006.229.16:31:14.62#ibcon#about to read 4, iclass 28, count 0 2006.229.16:31:14.62#ibcon#read 4, iclass 28, count 0 2006.229.16:31:14.62#ibcon#about to read 5, iclass 28, count 0 2006.229.16:31:14.62#ibcon#read 5, iclass 28, count 0 2006.229.16:31:14.62#ibcon#about to read 6, iclass 28, count 0 2006.229.16:31:14.62#ibcon#read 6, iclass 28, count 0 2006.229.16:31:14.62#ibcon#end of sib2, iclass 28, count 0 2006.229.16:31:14.62#ibcon#*after write, iclass 28, count 0 2006.229.16:31:14.62#ibcon#*before return 0, iclass 28, count 0 2006.229.16:31:14.62#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:14.62#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:14.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:31:14.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:31:14.62$vck44/va=2,7 2006.229.16:31:14.62#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.16:31:14.62#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.16:31:14.62#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:14.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:14.68#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:14.68#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:14.68#ibcon#enter wrdev, iclass 30, count 2 2006.229.16:31:14.68#ibcon#first serial, iclass 30, count 2 2006.229.16:31:14.68#ibcon#enter sib2, iclass 30, count 2 2006.229.16:31:14.68#ibcon#flushed, iclass 30, count 2 2006.229.16:31:14.68#ibcon#about to write, iclass 30, count 2 2006.229.16:31:14.68#ibcon#wrote, iclass 30, count 2 2006.229.16:31:14.68#ibcon#about to read 3, iclass 30, count 2 2006.229.16:31:14.70#ibcon#read 3, iclass 30, count 2 2006.229.16:31:14.70#ibcon#about to read 4, iclass 30, count 2 2006.229.16:31:14.70#ibcon#read 4, iclass 30, count 2 2006.229.16:31:14.70#ibcon#about to read 5, iclass 30, count 2 2006.229.16:31:14.70#ibcon#read 5, iclass 30, count 2 2006.229.16:31:14.70#ibcon#about to read 6, iclass 30, count 2 2006.229.16:31:14.70#ibcon#read 6, iclass 30, count 2 2006.229.16:31:14.70#ibcon#end of sib2, iclass 30, count 2 2006.229.16:31:14.70#ibcon#*mode == 0, iclass 30, count 2 2006.229.16:31:14.70#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.16:31:14.70#ibcon#[25=AT02-07\r\n] 2006.229.16:31:14.70#ibcon#*before write, iclass 30, count 2 2006.229.16:31:14.70#ibcon#enter sib2, iclass 30, count 2 2006.229.16:31:14.70#ibcon#flushed, iclass 30, count 2 2006.229.16:31:14.70#ibcon#about to write, iclass 30, count 2 2006.229.16:31:14.70#ibcon#wrote, iclass 30, count 2 2006.229.16:31:14.70#ibcon#about to read 3, iclass 30, count 2 2006.229.16:31:14.73#ibcon#read 3, iclass 30, count 2 2006.229.16:31:14.73#ibcon#about to read 4, iclass 30, count 2 2006.229.16:31:14.73#ibcon#read 4, iclass 30, count 2 2006.229.16:31:14.73#ibcon#about to read 5, iclass 30, count 2 2006.229.16:31:14.73#ibcon#read 5, iclass 30, count 2 2006.229.16:31:14.73#ibcon#about to read 6, iclass 30, count 2 2006.229.16:31:14.73#ibcon#read 6, iclass 30, count 2 2006.229.16:31:14.73#ibcon#end of sib2, iclass 30, count 2 2006.229.16:31:14.73#ibcon#*after write, iclass 30, count 2 2006.229.16:31:14.73#ibcon#*before return 0, iclass 30, count 2 2006.229.16:31:14.73#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:14.73#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:14.73#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.16:31:14.73#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:14.73#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:14.85#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:14.85#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:14.85#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:31:14.85#ibcon#first serial, iclass 30, count 0 2006.229.16:31:14.85#ibcon#enter sib2, iclass 30, count 0 2006.229.16:31:14.85#ibcon#flushed, iclass 30, count 0 2006.229.16:31:14.85#ibcon#about to write, iclass 30, count 0 2006.229.16:31:14.85#ibcon#wrote, iclass 30, count 0 2006.229.16:31:14.85#ibcon#about to read 3, iclass 30, count 0 2006.229.16:31:14.87#ibcon#read 3, iclass 30, count 0 2006.229.16:31:14.87#ibcon#about to read 4, iclass 30, count 0 2006.229.16:31:14.87#ibcon#read 4, iclass 30, count 0 2006.229.16:31:14.87#ibcon#about to read 5, iclass 30, count 0 2006.229.16:31:14.87#ibcon#read 5, iclass 30, count 0 2006.229.16:31:14.87#ibcon#about to read 6, iclass 30, count 0 2006.229.16:31:14.87#ibcon#read 6, iclass 30, count 0 2006.229.16:31:14.87#ibcon#end of sib2, iclass 30, count 0 2006.229.16:31:14.87#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:31:14.87#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:31:14.87#ibcon#[25=USB\r\n] 2006.229.16:31:14.87#ibcon#*before write, iclass 30, count 0 2006.229.16:31:14.87#ibcon#enter sib2, iclass 30, count 0 2006.229.16:31:14.87#ibcon#flushed, iclass 30, count 0 2006.229.16:31:14.87#ibcon#about to write, iclass 30, count 0 2006.229.16:31:14.87#ibcon#wrote, iclass 30, count 0 2006.229.16:31:14.87#ibcon#about to read 3, iclass 30, count 0 2006.229.16:31:14.90#ibcon#read 3, iclass 30, count 0 2006.229.16:31:14.90#ibcon#about to read 4, iclass 30, count 0 2006.229.16:31:14.90#ibcon#read 4, iclass 30, count 0 2006.229.16:31:14.90#ibcon#about to read 5, iclass 30, count 0 2006.229.16:31:14.90#ibcon#read 5, iclass 30, count 0 2006.229.16:31:14.90#ibcon#about to read 6, iclass 30, count 0 2006.229.16:31:14.90#ibcon#read 6, iclass 30, count 0 2006.229.16:31:14.90#ibcon#end of sib2, iclass 30, count 0 2006.229.16:31:14.90#ibcon#*after write, iclass 30, count 0 2006.229.16:31:14.90#ibcon#*before return 0, iclass 30, count 0 2006.229.16:31:14.90#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:14.90#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:14.90#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:31:14.90#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:31:14.90$vck44/valo=3,564.99 2006.229.16:31:14.90#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:31:14.90#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:31:14.90#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:14.90#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:14.90#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:14.90#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:14.90#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:31:14.90#ibcon#first serial, iclass 32, count 0 2006.229.16:31:14.90#ibcon#enter sib2, iclass 32, count 0 2006.229.16:31:14.90#ibcon#flushed, iclass 32, count 0 2006.229.16:31:14.90#ibcon#about to write, iclass 32, count 0 2006.229.16:31:14.90#ibcon#wrote, iclass 32, count 0 2006.229.16:31:14.90#ibcon#about to read 3, iclass 32, count 0 2006.229.16:31:14.92#ibcon#read 3, iclass 32, count 0 2006.229.16:31:14.92#ibcon#about to read 4, iclass 32, count 0 2006.229.16:31:14.92#ibcon#read 4, iclass 32, count 0 2006.229.16:31:14.92#ibcon#about to read 5, iclass 32, count 0 2006.229.16:31:14.92#ibcon#read 5, iclass 32, count 0 2006.229.16:31:14.92#ibcon#about to read 6, iclass 32, count 0 2006.229.16:31:14.92#ibcon#read 6, iclass 32, count 0 2006.229.16:31:14.92#ibcon#end of sib2, iclass 32, count 0 2006.229.16:31:14.92#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:31:14.92#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:31:14.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:31:14.92#ibcon#*before write, iclass 32, count 0 2006.229.16:31:14.92#ibcon#enter sib2, iclass 32, count 0 2006.229.16:31:14.92#ibcon#flushed, iclass 32, count 0 2006.229.16:31:14.92#ibcon#about to write, iclass 32, count 0 2006.229.16:31:14.92#ibcon#wrote, iclass 32, count 0 2006.229.16:31:14.92#ibcon#about to read 3, iclass 32, count 0 2006.229.16:31:14.96#ibcon#read 3, iclass 32, count 0 2006.229.16:31:14.96#ibcon#about to read 4, iclass 32, count 0 2006.229.16:31:14.96#ibcon#read 4, iclass 32, count 0 2006.229.16:31:14.96#ibcon#about to read 5, iclass 32, count 0 2006.229.16:31:14.96#ibcon#read 5, iclass 32, count 0 2006.229.16:31:14.96#ibcon#about to read 6, iclass 32, count 0 2006.229.16:31:14.96#ibcon#read 6, iclass 32, count 0 2006.229.16:31:14.96#ibcon#end of sib2, iclass 32, count 0 2006.229.16:31:14.96#ibcon#*after write, iclass 32, count 0 2006.229.16:31:14.96#ibcon#*before return 0, iclass 32, count 0 2006.229.16:31:14.96#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:14.96#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:14.96#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:31:14.96#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:31:14.96$vck44/va=3,6 2006.229.16:31:14.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:31:14.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:31:14.96#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:14.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:31:14.97#abcon#<5=/05 1.3 2.1 27.161001001.8\r\n> 2006.229.16:31:14.99#abcon#{5=INTERFACE CLEAR} 2006.229.16:31:15.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:31:15.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:31:15.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:31:15.02#ibcon#first serial, iclass 35, count 2 2006.229.16:31:15.02#ibcon#enter sib2, iclass 35, count 2 2006.229.16:31:15.02#ibcon#flushed, iclass 35, count 2 2006.229.16:31:15.02#ibcon#about to write, iclass 35, count 2 2006.229.16:31:15.02#ibcon#wrote, iclass 35, count 2 2006.229.16:31:15.02#ibcon#about to read 3, iclass 35, count 2 2006.229.16:31:15.04#ibcon#read 3, iclass 35, count 2 2006.229.16:31:15.04#ibcon#about to read 4, iclass 35, count 2 2006.229.16:31:15.04#ibcon#read 4, iclass 35, count 2 2006.229.16:31:15.04#ibcon#about to read 5, iclass 35, count 2 2006.229.16:31:15.04#ibcon#read 5, iclass 35, count 2 2006.229.16:31:15.04#ibcon#about to read 6, iclass 35, count 2 2006.229.16:31:15.04#ibcon#read 6, iclass 35, count 2 2006.229.16:31:15.04#ibcon#end of sib2, iclass 35, count 2 2006.229.16:31:15.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:31:15.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:31:15.04#ibcon#[25=AT03-06\r\n] 2006.229.16:31:15.04#ibcon#*before write, iclass 35, count 2 2006.229.16:31:15.04#ibcon#enter sib2, iclass 35, count 2 2006.229.16:31:15.04#ibcon#flushed, iclass 35, count 2 2006.229.16:31:15.04#ibcon#about to write, iclass 35, count 2 2006.229.16:31:15.04#ibcon#wrote, iclass 35, count 2 2006.229.16:31:15.04#ibcon#about to read 3, iclass 35, count 2 2006.229.16:31:15.05#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:31:15.07#ibcon#read 3, iclass 35, count 2 2006.229.16:31:15.07#ibcon#about to read 4, iclass 35, count 2 2006.229.16:31:15.07#ibcon#read 4, iclass 35, count 2 2006.229.16:31:15.07#ibcon#about to read 5, iclass 35, count 2 2006.229.16:31:15.07#ibcon#read 5, iclass 35, count 2 2006.229.16:31:15.07#ibcon#about to read 6, iclass 35, count 2 2006.229.16:31:15.07#ibcon#read 6, iclass 35, count 2 2006.229.16:31:15.07#ibcon#end of sib2, iclass 35, count 2 2006.229.16:31:15.07#ibcon#*after write, iclass 35, count 2 2006.229.16:31:15.07#ibcon#*before return 0, iclass 35, count 2 2006.229.16:31:15.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:31:15.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:31:15.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:31:15.07#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:15.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:31:15.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:31:15.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:31:15.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:31:15.19#ibcon#first serial, iclass 35, count 0 2006.229.16:31:15.19#ibcon#enter sib2, iclass 35, count 0 2006.229.16:31:15.19#ibcon#flushed, iclass 35, count 0 2006.229.16:31:15.19#ibcon#about to write, iclass 35, count 0 2006.229.16:31:15.19#ibcon#wrote, iclass 35, count 0 2006.229.16:31:15.19#ibcon#about to read 3, iclass 35, count 0 2006.229.16:31:15.21#ibcon#read 3, iclass 35, count 0 2006.229.16:31:15.21#ibcon#about to read 4, iclass 35, count 0 2006.229.16:31:15.21#ibcon#read 4, iclass 35, count 0 2006.229.16:31:15.21#ibcon#about to read 5, iclass 35, count 0 2006.229.16:31:15.21#ibcon#read 5, iclass 35, count 0 2006.229.16:31:15.21#ibcon#about to read 6, iclass 35, count 0 2006.229.16:31:15.21#ibcon#read 6, iclass 35, count 0 2006.229.16:31:15.21#ibcon#end of sib2, iclass 35, count 0 2006.229.16:31:15.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:31:15.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:31:15.21#ibcon#[25=USB\r\n] 2006.229.16:31:15.21#ibcon#*before write, iclass 35, count 0 2006.229.16:31:15.21#ibcon#enter sib2, iclass 35, count 0 2006.229.16:31:15.21#ibcon#flushed, iclass 35, count 0 2006.229.16:31:15.21#ibcon#about to write, iclass 35, count 0 2006.229.16:31:15.21#ibcon#wrote, iclass 35, count 0 2006.229.16:31:15.21#ibcon#about to read 3, iclass 35, count 0 2006.229.16:31:15.24#ibcon#read 3, iclass 35, count 0 2006.229.16:31:15.24#ibcon#about to read 4, iclass 35, count 0 2006.229.16:31:15.24#ibcon#read 4, iclass 35, count 0 2006.229.16:31:15.24#ibcon#about to read 5, iclass 35, count 0 2006.229.16:31:15.24#ibcon#read 5, iclass 35, count 0 2006.229.16:31:15.24#ibcon#about to read 6, iclass 35, count 0 2006.229.16:31:15.24#ibcon#read 6, iclass 35, count 0 2006.229.16:31:15.24#ibcon#end of sib2, iclass 35, count 0 2006.229.16:31:15.24#ibcon#*after write, iclass 35, count 0 2006.229.16:31:15.24#ibcon#*before return 0, iclass 35, count 0 2006.229.16:31:15.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:31:15.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:31:15.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:31:15.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:31:15.24$vck44/valo=4,624.99 2006.229.16:31:15.24#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.16:31:15.24#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.16:31:15.24#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:15.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:15.24#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:15.24#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:15.24#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:31:15.24#ibcon#first serial, iclass 40, count 0 2006.229.16:31:15.24#ibcon#enter sib2, iclass 40, count 0 2006.229.16:31:15.24#ibcon#flushed, iclass 40, count 0 2006.229.16:31:15.24#ibcon#about to write, iclass 40, count 0 2006.229.16:31:15.24#ibcon#wrote, iclass 40, count 0 2006.229.16:31:15.24#ibcon#about to read 3, iclass 40, count 0 2006.229.16:31:15.26#ibcon#read 3, iclass 40, count 0 2006.229.16:31:15.26#ibcon#about to read 4, iclass 40, count 0 2006.229.16:31:15.26#ibcon#read 4, iclass 40, count 0 2006.229.16:31:15.26#ibcon#about to read 5, iclass 40, count 0 2006.229.16:31:15.26#ibcon#read 5, iclass 40, count 0 2006.229.16:31:15.26#ibcon#about to read 6, iclass 40, count 0 2006.229.16:31:15.26#ibcon#read 6, iclass 40, count 0 2006.229.16:31:15.26#ibcon#end of sib2, iclass 40, count 0 2006.229.16:31:15.26#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:31:15.26#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:31:15.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:31:15.26#ibcon#*before write, iclass 40, count 0 2006.229.16:31:15.26#ibcon#enter sib2, iclass 40, count 0 2006.229.16:31:15.26#ibcon#flushed, iclass 40, count 0 2006.229.16:31:15.26#ibcon#about to write, iclass 40, count 0 2006.229.16:31:15.26#ibcon#wrote, iclass 40, count 0 2006.229.16:31:15.26#ibcon#about to read 3, iclass 40, count 0 2006.229.16:31:15.30#ibcon#read 3, iclass 40, count 0 2006.229.16:31:15.30#ibcon#about to read 4, iclass 40, count 0 2006.229.16:31:15.30#ibcon#read 4, iclass 40, count 0 2006.229.16:31:15.30#ibcon#about to read 5, iclass 40, count 0 2006.229.16:31:15.30#ibcon#read 5, iclass 40, count 0 2006.229.16:31:15.30#ibcon#about to read 6, iclass 40, count 0 2006.229.16:31:15.30#ibcon#read 6, iclass 40, count 0 2006.229.16:31:15.30#ibcon#end of sib2, iclass 40, count 0 2006.229.16:31:15.30#ibcon#*after write, iclass 40, count 0 2006.229.16:31:15.30#ibcon#*before return 0, iclass 40, count 0 2006.229.16:31:15.30#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:15.30#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:15.30#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:31:15.30#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:31:15.30$vck44/va=4,7 2006.229.16:31:15.30#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.16:31:15.30#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.16:31:15.30#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:15.30#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:15.36#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:15.36#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:15.36#ibcon#enter wrdev, iclass 4, count 2 2006.229.16:31:15.36#ibcon#first serial, iclass 4, count 2 2006.229.16:31:15.36#ibcon#enter sib2, iclass 4, count 2 2006.229.16:31:15.36#ibcon#flushed, iclass 4, count 2 2006.229.16:31:15.36#ibcon#about to write, iclass 4, count 2 2006.229.16:31:15.36#ibcon#wrote, iclass 4, count 2 2006.229.16:31:15.36#ibcon#about to read 3, iclass 4, count 2 2006.229.16:31:15.38#ibcon#read 3, iclass 4, count 2 2006.229.16:31:15.38#ibcon#about to read 4, iclass 4, count 2 2006.229.16:31:15.38#ibcon#read 4, iclass 4, count 2 2006.229.16:31:15.38#ibcon#about to read 5, iclass 4, count 2 2006.229.16:31:15.38#ibcon#read 5, iclass 4, count 2 2006.229.16:31:15.38#ibcon#about to read 6, iclass 4, count 2 2006.229.16:31:15.38#ibcon#read 6, iclass 4, count 2 2006.229.16:31:15.38#ibcon#end of sib2, iclass 4, count 2 2006.229.16:31:15.38#ibcon#*mode == 0, iclass 4, count 2 2006.229.16:31:15.38#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.16:31:15.38#ibcon#[25=AT04-07\r\n] 2006.229.16:31:15.38#ibcon#*before write, iclass 4, count 2 2006.229.16:31:15.38#ibcon#enter sib2, iclass 4, count 2 2006.229.16:31:15.38#ibcon#flushed, iclass 4, count 2 2006.229.16:31:15.38#ibcon#about to write, iclass 4, count 2 2006.229.16:31:15.38#ibcon#wrote, iclass 4, count 2 2006.229.16:31:15.38#ibcon#about to read 3, iclass 4, count 2 2006.229.16:31:15.41#ibcon#read 3, iclass 4, count 2 2006.229.16:31:15.41#ibcon#about to read 4, iclass 4, count 2 2006.229.16:31:15.41#ibcon#read 4, iclass 4, count 2 2006.229.16:31:15.41#ibcon#about to read 5, iclass 4, count 2 2006.229.16:31:15.41#ibcon#read 5, iclass 4, count 2 2006.229.16:31:15.41#ibcon#about to read 6, iclass 4, count 2 2006.229.16:31:15.41#ibcon#read 6, iclass 4, count 2 2006.229.16:31:15.41#ibcon#end of sib2, iclass 4, count 2 2006.229.16:31:15.41#ibcon#*after write, iclass 4, count 2 2006.229.16:31:15.41#ibcon#*before return 0, iclass 4, count 2 2006.229.16:31:15.41#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:15.41#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:15.41#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.16:31:15.41#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:15.41#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:15.53#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:15.53#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:15.53#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:31:15.53#ibcon#first serial, iclass 4, count 0 2006.229.16:31:15.53#ibcon#enter sib2, iclass 4, count 0 2006.229.16:31:15.53#ibcon#flushed, iclass 4, count 0 2006.229.16:31:15.53#ibcon#about to write, iclass 4, count 0 2006.229.16:31:15.53#ibcon#wrote, iclass 4, count 0 2006.229.16:31:15.53#ibcon#about to read 3, iclass 4, count 0 2006.229.16:31:15.55#ibcon#read 3, iclass 4, count 0 2006.229.16:31:15.55#ibcon#about to read 4, iclass 4, count 0 2006.229.16:31:15.55#ibcon#read 4, iclass 4, count 0 2006.229.16:31:15.55#ibcon#about to read 5, iclass 4, count 0 2006.229.16:31:15.55#ibcon#read 5, iclass 4, count 0 2006.229.16:31:15.55#ibcon#about to read 6, iclass 4, count 0 2006.229.16:31:15.55#ibcon#read 6, iclass 4, count 0 2006.229.16:31:15.55#ibcon#end of sib2, iclass 4, count 0 2006.229.16:31:15.55#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:31:15.55#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:31:15.55#ibcon#[25=USB\r\n] 2006.229.16:31:15.55#ibcon#*before write, iclass 4, count 0 2006.229.16:31:15.55#ibcon#enter sib2, iclass 4, count 0 2006.229.16:31:15.55#ibcon#flushed, iclass 4, count 0 2006.229.16:31:15.55#ibcon#about to write, iclass 4, count 0 2006.229.16:31:15.55#ibcon#wrote, iclass 4, count 0 2006.229.16:31:15.55#ibcon#about to read 3, iclass 4, count 0 2006.229.16:31:15.58#ibcon#read 3, iclass 4, count 0 2006.229.16:31:15.58#ibcon#about to read 4, iclass 4, count 0 2006.229.16:31:15.58#ibcon#read 4, iclass 4, count 0 2006.229.16:31:15.58#ibcon#about to read 5, iclass 4, count 0 2006.229.16:31:15.58#ibcon#read 5, iclass 4, count 0 2006.229.16:31:15.58#ibcon#about to read 6, iclass 4, count 0 2006.229.16:31:15.58#ibcon#read 6, iclass 4, count 0 2006.229.16:31:15.58#ibcon#end of sib2, iclass 4, count 0 2006.229.16:31:15.58#ibcon#*after write, iclass 4, count 0 2006.229.16:31:15.58#ibcon#*before return 0, iclass 4, count 0 2006.229.16:31:15.58#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:15.58#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:15.58#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:31:15.58#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:31:15.58$vck44/valo=5,734.99 2006.229.16:31:15.58#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.16:31:15.58#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.16:31:15.58#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:15.58#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:15.58#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:15.58#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:15.58#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:31:15.58#ibcon#first serial, iclass 6, count 0 2006.229.16:31:15.58#ibcon#enter sib2, iclass 6, count 0 2006.229.16:31:15.58#ibcon#flushed, iclass 6, count 0 2006.229.16:31:15.58#ibcon#about to write, iclass 6, count 0 2006.229.16:31:15.58#ibcon#wrote, iclass 6, count 0 2006.229.16:31:15.58#ibcon#about to read 3, iclass 6, count 0 2006.229.16:31:15.60#ibcon#read 3, iclass 6, count 0 2006.229.16:31:15.60#ibcon#about to read 4, iclass 6, count 0 2006.229.16:31:15.60#ibcon#read 4, iclass 6, count 0 2006.229.16:31:15.60#ibcon#about to read 5, iclass 6, count 0 2006.229.16:31:15.60#ibcon#read 5, iclass 6, count 0 2006.229.16:31:15.60#ibcon#about to read 6, iclass 6, count 0 2006.229.16:31:15.60#ibcon#read 6, iclass 6, count 0 2006.229.16:31:15.60#ibcon#end of sib2, iclass 6, count 0 2006.229.16:31:15.60#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:31:15.60#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:31:15.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:31:15.60#ibcon#*before write, iclass 6, count 0 2006.229.16:31:15.60#ibcon#enter sib2, iclass 6, count 0 2006.229.16:31:15.60#ibcon#flushed, iclass 6, count 0 2006.229.16:31:15.60#ibcon#about to write, iclass 6, count 0 2006.229.16:31:15.60#ibcon#wrote, iclass 6, count 0 2006.229.16:31:15.60#ibcon#about to read 3, iclass 6, count 0 2006.229.16:31:15.64#ibcon#read 3, iclass 6, count 0 2006.229.16:31:15.64#ibcon#about to read 4, iclass 6, count 0 2006.229.16:31:15.64#ibcon#read 4, iclass 6, count 0 2006.229.16:31:15.64#ibcon#about to read 5, iclass 6, count 0 2006.229.16:31:15.64#ibcon#read 5, iclass 6, count 0 2006.229.16:31:15.64#ibcon#about to read 6, iclass 6, count 0 2006.229.16:31:15.64#ibcon#read 6, iclass 6, count 0 2006.229.16:31:15.64#ibcon#end of sib2, iclass 6, count 0 2006.229.16:31:15.64#ibcon#*after write, iclass 6, count 0 2006.229.16:31:15.64#ibcon#*before return 0, iclass 6, count 0 2006.229.16:31:15.64#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:15.64#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:15.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:31:15.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:31:15.64$vck44/va=5,4 2006.229.16:31:15.64#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.16:31:15.64#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.16:31:15.64#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:15.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:15.70#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:15.70#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:15.70#ibcon#enter wrdev, iclass 10, count 2 2006.229.16:31:15.70#ibcon#first serial, iclass 10, count 2 2006.229.16:31:15.70#ibcon#enter sib2, iclass 10, count 2 2006.229.16:31:15.70#ibcon#flushed, iclass 10, count 2 2006.229.16:31:15.70#ibcon#about to write, iclass 10, count 2 2006.229.16:31:15.70#ibcon#wrote, iclass 10, count 2 2006.229.16:31:15.70#ibcon#about to read 3, iclass 10, count 2 2006.229.16:31:15.72#ibcon#read 3, iclass 10, count 2 2006.229.16:31:15.72#ibcon#about to read 4, iclass 10, count 2 2006.229.16:31:15.72#ibcon#read 4, iclass 10, count 2 2006.229.16:31:15.72#ibcon#about to read 5, iclass 10, count 2 2006.229.16:31:15.72#ibcon#read 5, iclass 10, count 2 2006.229.16:31:15.72#ibcon#about to read 6, iclass 10, count 2 2006.229.16:31:15.72#ibcon#read 6, iclass 10, count 2 2006.229.16:31:15.72#ibcon#end of sib2, iclass 10, count 2 2006.229.16:31:15.72#ibcon#*mode == 0, iclass 10, count 2 2006.229.16:31:15.72#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.16:31:15.72#ibcon#[25=AT05-04\r\n] 2006.229.16:31:15.72#ibcon#*before write, iclass 10, count 2 2006.229.16:31:15.72#ibcon#enter sib2, iclass 10, count 2 2006.229.16:31:15.72#ibcon#flushed, iclass 10, count 2 2006.229.16:31:15.72#ibcon#about to write, iclass 10, count 2 2006.229.16:31:15.72#ibcon#wrote, iclass 10, count 2 2006.229.16:31:15.72#ibcon#about to read 3, iclass 10, count 2 2006.229.16:31:15.75#ibcon#read 3, iclass 10, count 2 2006.229.16:31:15.75#ibcon#about to read 4, iclass 10, count 2 2006.229.16:31:15.75#ibcon#read 4, iclass 10, count 2 2006.229.16:31:15.75#ibcon#about to read 5, iclass 10, count 2 2006.229.16:31:15.75#ibcon#read 5, iclass 10, count 2 2006.229.16:31:15.75#ibcon#about to read 6, iclass 10, count 2 2006.229.16:31:15.75#ibcon#read 6, iclass 10, count 2 2006.229.16:31:15.75#ibcon#end of sib2, iclass 10, count 2 2006.229.16:31:15.75#ibcon#*after write, iclass 10, count 2 2006.229.16:31:15.75#ibcon#*before return 0, iclass 10, count 2 2006.229.16:31:15.75#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:15.75#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:15.75#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.16:31:15.75#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:15.75#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:15.87#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:15.87#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:15.87#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:31:15.87#ibcon#first serial, iclass 10, count 0 2006.229.16:31:15.87#ibcon#enter sib2, iclass 10, count 0 2006.229.16:31:15.87#ibcon#flushed, iclass 10, count 0 2006.229.16:31:15.87#ibcon#about to write, iclass 10, count 0 2006.229.16:31:15.87#ibcon#wrote, iclass 10, count 0 2006.229.16:31:15.87#ibcon#about to read 3, iclass 10, count 0 2006.229.16:31:15.89#ibcon#read 3, iclass 10, count 0 2006.229.16:31:15.89#ibcon#about to read 4, iclass 10, count 0 2006.229.16:31:15.89#ibcon#read 4, iclass 10, count 0 2006.229.16:31:15.89#ibcon#about to read 5, iclass 10, count 0 2006.229.16:31:15.89#ibcon#read 5, iclass 10, count 0 2006.229.16:31:15.89#ibcon#about to read 6, iclass 10, count 0 2006.229.16:31:15.89#ibcon#read 6, iclass 10, count 0 2006.229.16:31:15.89#ibcon#end of sib2, iclass 10, count 0 2006.229.16:31:15.89#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:31:15.89#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:31:15.89#ibcon#[25=USB\r\n] 2006.229.16:31:15.89#ibcon#*before write, iclass 10, count 0 2006.229.16:31:15.89#ibcon#enter sib2, iclass 10, count 0 2006.229.16:31:15.89#ibcon#flushed, iclass 10, count 0 2006.229.16:31:15.89#ibcon#about to write, iclass 10, count 0 2006.229.16:31:15.89#ibcon#wrote, iclass 10, count 0 2006.229.16:31:15.89#ibcon#about to read 3, iclass 10, count 0 2006.229.16:31:15.92#ibcon#read 3, iclass 10, count 0 2006.229.16:31:15.92#ibcon#about to read 4, iclass 10, count 0 2006.229.16:31:15.92#ibcon#read 4, iclass 10, count 0 2006.229.16:31:15.92#ibcon#about to read 5, iclass 10, count 0 2006.229.16:31:15.92#ibcon#read 5, iclass 10, count 0 2006.229.16:31:15.92#ibcon#about to read 6, iclass 10, count 0 2006.229.16:31:15.92#ibcon#read 6, iclass 10, count 0 2006.229.16:31:15.92#ibcon#end of sib2, iclass 10, count 0 2006.229.16:31:15.92#ibcon#*after write, iclass 10, count 0 2006.229.16:31:15.92#ibcon#*before return 0, iclass 10, count 0 2006.229.16:31:15.92#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:15.92#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:15.92#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:31:15.92#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:31:15.92$vck44/valo=6,814.99 2006.229.16:31:15.92#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.16:31:15.92#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.16:31:15.92#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:15.92#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:15.92#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:15.92#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:15.92#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:31:15.92#ibcon#first serial, iclass 12, count 0 2006.229.16:31:15.92#ibcon#enter sib2, iclass 12, count 0 2006.229.16:31:15.92#ibcon#flushed, iclass 12, count 0 2006.229.16:31:15.92#ibcon#about to write, iclass 12, count 0 2006.229.16:31:15.92#ibcon#wrote, iclass 12, count 0 2006.229.16:31:15.92#ibcon#about to read 3, iclass 12, count 0 2006.229.16:31:15.94#ibcon#read 3, iclass 12, count 0 2006.229.16:31:15.94#ibcon#about to read 4, iclass 12, count 0 2006.229.16:31:15.94#ibcon#read 4, iclass 12, count 0 2006.229.16:31:15.94#ibcon#about to read 5, iclass 12, count 0 2006.229.16:31:15.94#ibcon#read 5, iclass 12, count 0 2006.229.16:31:15.94#ibcon#about to read 6, iclass 12, count 0 2006.229.16:31:15.94#ibcon#read 6, iclass 12, count 0 2006.229.16:31:15.94#ibcon#end of sib2, iclass 12, count 0 2006.229.16:31:15.94#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:31:15.94#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:31:15.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:31:15.94#ibcon#*before write, iclass 12, count 0 2006.229.16:31:15.94#ibcon#enter sib2, iclass 12, count 0 2006.229.16:31:15.94#ibcon#flushed, iclass 12, count 0 2006.229.16:31:15.94#ibcon#about to write, iclass 12, count 0 2006.229.16:31:15.94#ibcon#wrote, iclass 12, count 0 2006.229.16:31:15.94#ibcon#about to read 3, iclass 12, count 0 2006.229.16:31:15.98#ibcon#read 3, iclass 12, count 0 2006.229.16:31:15.98#ibcon#about to read 4, iclass 12, count 0 2006.229.16:31:15.98#ibcon#read 4, iclass 12, count 0 2006.229.16:31:15.98#ibcon#about to read 5, iclass 12, count 0 2006.229.16:31:15.98#ibcon#read 5, iclass 12, count 0 2006.229.16:31:15.98#ibcon#about to read 6, iclass 12, count 0 2006.229.16:31:15.98#ibcon#read 6, iclass 12, count 0 2006.229.16:31:15.98#ibcon#end of sib2, iclass 12, count 0 2006.229.16:31:15.98#ibcon#*after write, iclass 12, count 0 2006.229.16:31:15.98#ibcon#*before return 0, iclass 12, count 0 2006.229.16:31:15.98#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:15.98#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:15.98#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:31:15.98#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:31:15.98$vck44/va=6,4 2006.229.16:31:15.98#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.16:31:15.98#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.16:31:15.98#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:15.98#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:16.04#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:16.04#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:16.04#ibcon#enter wrdev, iclass 14, count 2 2006.229.16:31:16.04#ibcon#first serial, iclass 14, count 2 2006.229.16:31:16.04#ibcon#enter sib2, iclass 14, count 2 2006.229.16:31:16.04#ibcon#flushed, iclass 14, count 2 2006.229.16:31:16.04#ibcon#about to write, iclass 14, count 2 2006.229.16:31:16.04#ibcon#wrote, iclass 14, count 2 2006.229.16:31:16.04#ibcon#about to read 3, iclass 14, count 2 2006.229.16:31:16.06#ibcon#read 3, iclass 14, count 2 2006.229.16:31:16.06#ibcon#about to read 4, iclass 14, count 2 2006.229.16:31:16.06#ibcon#read 4, iclass 14, count 2 2006.229.16:31:16.06#ibcon#about to read 5, iclass 14, count 2 2006.229.16:31:16.06#ibcon#read 5, iclass 14, count 2 2006.229.16:31:16.06#ibcon#about to read 6, iclass 14, count 2 2006.229.16:31:16.06#ibcon#read 6, iclass 14, count 2 2006.229.16:31:16.06#ibcon#end of sib2, iclass 14, count 2 2006.229.16:31:16.06#ibcon#*mode == 0, iclass 14, count 2 2006.229.16:31:16.06#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.16:31:16.06#ibcon#[25=AT06-04\r\n] 2006.229.16:31:16.06#ibcon#*before write, iclass 14, count 2 2006.229.16:31:16.06#ibcon#enter sib2, iclass 14, count 2 2006.229.16:31:16.06#ibcon#flushed, iclass 14, count 2 2006.229.16:31:16.06#ibcon#about to write, iclass 14, count 2 2006.229.16:31:16.06#ibcon#wrote, iclass 14, count 2 2006.229.16:31:16.06#ibcon#about to read 3, iclass 14, count 2 2006.229.16:31:16.09#ibcon#read 3, iclass 14, count 2 2006.229.16:31:16.09#ibcon#about to read 4, iclass 14, count 2 2006.229.16:31:16.09#ibcon#read 4, iclass 14, count 2 2006.229.16:31:16.09#ibcon#about to read 5, iclass 14, count 2 2006.229.16:31:16.09#ibcon#read 5, iclass 14, count 2 2006.229.16:31:16.09#ibcon#about to read 6, iclass 14, count 2 2006.229.16:31:16.09#ibcon#read 6, iclass 14, count 2 2006.229.16:31:16.09#ibcon#end of sib2, iclass 14, count 2 2006.229.16:31:16.09#ibcon#*after write, iclass 14, count 2 2006.229.16:31:16.09#ibcon#*before return 0, iclass 14, count 2 2006.229.16:31:16.09#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:16.09#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:16.09#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.16:31:16.09#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:16.09#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:16.21#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:16.21#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:16.21#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:31:16.21#ibcon#first serial, iclass 14, count 0 2006.229.16:31:16.21#ibcon#enter sib2, iclass 14, count 0 2006.229.16:31:16.21#ibcon#flushed, iclass 14, count 0 2006.229.16:31:16.21#ibcon#about to write, iclass 14, count 0 2006.229.16:31:16.21#ibcon#wrote, iclass 14, count 0 2006.229.16:31:16.21#ibcon#about to read 3, iclass 14, count 0 2006.229.16:31:16.23#ibcon#read 3, iclass 14, count 0 2006.229.16:31:16.23#ibcon#about to read 4, iclass 14, count 0 2006.229.16:31:16.23#ibcon#read 4, iclass 14, count 0 2006.229.16:31:16.23#ibcon#about to read 5, iclass 14, count 0 2006.229.16:31:16.23#ibcon#read 5, iclass 14, count 0 2006.229.16:31:16.23#ibcon#about to read 6, iclass 14, count 0 2006.229.16:31:16.23#ibcon#read 6, iclass 14, count 0 2006.229.16:31:16.23#ibcon#end of sib2, iclass 14, count 0 2006.229.16:31:16.23#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:31:16.23#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:31:16.23#ibcon#[25=USB\r\n] 2006.229.16:31:16.23#ibcon#*before write, iclass 14, count 0 2006.229.16:31:16.23#ibcon#enter sib2, iclass 14, count 0 2006.229.16:31:16.23#ibcon#flushed, iclass 14, count 0 2006.229.16:31:16.23#ibcon#about to write, iclass 14, count 0 2006.229.16:31:16.23#ibcon#wrote, iclass 14, count 0 2006.229.16:31:16.23#ibcon#about to read 3, iclass 14, count 0 2006.229.16:31:16.26#ibcon#read 3, iclass 14, count 0 2006.229.16:31:16.26#ibcon#about to read 4, iclass 14, count 0 2006.229.16:31:16.26#ibcon#read 4, iclass 14, count 0 2006.229.16:31:16.26#ibcon#about to read 5, iclass 14, count 0 2006.229.16:31:16.26#ibcon#read 5, iclass 14, count 0 2006.229.16:31:16.26#ibcon#about to read 6, iclass 14, count 0 2006.229.16:31:16.26#ibcon#read 6, iclass 14, count 0 2006.229.16:31:16.26#ibcon#end of sib2, iclass 14, count 0 2006.229.16:31:16.26#ibcon#*after write, iclass 14, count 0 2006.229.16:31:16.26#ibcon#*before return 0, iclass 14, count 0 2006.229.16:31:16.26#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:16.26#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:16.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:31:16.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:31:16.26$vck44/valo=7,864.99 2006.229.16:31:16.26#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:31:16.26#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:31:16.26#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:16.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:16.26#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:16.26#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:16.26#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:31:16.26#ibcon#first serial, iclass 16, count 0 2006.229.16:31:16.26#ibcon#enter sib2, iclass 16, count 0 2006.229.16:31:16.26#ibcon#flushed, iclass 16, count 0 2006.229.16:31:16.26#ibcon#about to write, iclass 16, count 0 2006.229.16:31:16.26#ibcon#wrote, iclass 16, count 0 2006.229.16:31:16.26#ibcon#about to read 3, iclass 16, count 0 2006.229.16:31:16.28#ibcon#read 3, iclass 16, count 0 2006.229.16:31:16.28#ibcon#about to read 4, iclass 16, count 0 2006.229.16:31:16.28#ibcon#read 4, iclass 16, count 0 2006.229.16:31:16.28#ibcon#about to read 5, iclass 16, count 0 2006.229.16:31:16.28#ibcon#read 5, iclass 16, count 0 2006.229.16:31:16.28#ibcon#about to read 6, iclass 16, count 0 2006.229.16:31:16.28#ibcon#read 6, iclass 16, count 0 2006.229.16:31:16.28#ibcon#end of sib2, iclass 16, count 0 2006.229.16:31:16.28#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:31:16.28#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:31:16.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:31:16.28#ibcon#*before write, iclass 16, count 0 2006.229.16:31:16.28#ibcon#enter sib2, iclass 16, count 0 2006.229.16:31:16.28#ibcon#flushed, iclass 16, count 0 2006.229.16:31:16.28#ibcon#about to write, iclass 16, count 0 2006.229.16:31:16.28#ibcon#wrote, iclass 16, count 0 2006.229.16:31:16.28#ibcon#about to read 3, iclass 16, count 0 2006.229.16:31:16.32#ibcon#read 3, iclass 16, count 0 2006.229.16:31:16.32#ibcon#about to read 4, iclass 16, count 0 2006.229.16:31:16.32#ibcon#read 4, iclass 16, count 0 2006.229.16:31:16.32#ibcon#about to read 5, iclass 16, count 0 2006.229.16:31:16.32#ibcon#read 5, iclass 16, count 0 2006.229.16:31:16.32#ibcon#about to read 6, iclass 16, count 0 2006.229.16:31:16.32#ibcon#read 6, iclass 16, count 0 2006.229.16:31:16.32#ibcon#end of sib2, iclass 16, count 0 2006.229.16:31:16.32#ibcon#*after write, iclass 16, count 0 2006.229.16:31:16.32#ibcon#*before return 0, iclass 16, count 0 2006.229.16:31:16.32#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:16.32#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:16.32#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:31:16.32#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:31:16.32$vck44/va=7,5 2006.229.16:31:16.32#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:31:16.32#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:31:16.32#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:16.32#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:16.38#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:16.38#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:16.38#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:31:16.38#ibcon#first serial, iclass 18, count 2 2006.229.16:31:16.38#ibcon#enter sib2, iclass 18, count 2 2006.229.16:31:16.38#ibcon#flushed, iclass 18, count 2 2006.229.16:31:16.38#ibcon#about to write, iclass 18, count 2 2006.229.16:31:16.38#ibcon#wrote, iclass 18, count 2 2006.229.16:31:16.38#ibcon#about to read 3, iclass 18, count 2 2006.229.16:31:16.40#ibcon#read 3, iclass 18, count 2 2006.229.16:31:16.40#ibcon#about to read 4, iclass 18, count 2 2006.229.16:31:16.40#ibcon#read 4, iclass 18, count 2 2006.229.16:31:16.40#ibcon#about to read 5, iclass 18, count 2 2006.229.16:31:16.40#ibcon#read 5, iclass 18, count 2 2006.229.16:31:16.40#ibcon#about to read 6, iclass 18, count 2 2006.229.16:31:16.40#ibcon#read 6, iclass 18, count 2 2006.229.16:31:16.40#ibcon#end of sib2, iclass 18, count 2 2006.229.16:31:16.40#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:31:16.40#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:31:16.40#ibcon#[25=AT07-05\r\n] 2006.229.16:31:16.40#ibcon#*before write, iclass 18, count 2 2006.229.16:31:16.40#ibcon#enter sib2, iclass 18, count 2 2006.229.16:31:16.40#ibcon#flushed, iclass 18, count 2 2006.229.16:31:16.40#ibcon#about to write, iclass 18, count 2 2006.229.16:31:16.40#ibcon#wrote, iclass 18, count 2 2006.229.16:31:16.40#ibcon#about to read 3, iclass 18, count 2 2006.229.16:31:16.43#ibcon#read 3, iclass 18, count 2 2006.229.16:31:16.43#ibcon#about to read 4, iclass 18, count 2 2006.229.16:31:16.43#ibcon#read 4, iclass 18, count 2 2006.229.16:31:16.43#ibcon#about to read 5, iclass 18, count 2 2006.229.16:31:16.43#ibcon#read 5, iclass 18, count 2 2006.229.16:31:16.43#ibcon#about to read 6, iclass 18, count 2 2006.229.16:31:16.43#ibcon#read 6, iclass 18, count 2 2006.229.16:31:16.43#ibcon#end of sib2, iclass 18, count 2 2006.229.16:31:16.43#ibcon#*after write, iclass 18, count 2 2006.229.16:31:16.43#ibcon#*before return 0, iclass 18, count 2 2006.229.16:31:16.43#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:16.43#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:16.43#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:31:16.43#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:16.43#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:16.55#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:16.55#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:16.55#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:31:16.55#ibcon#first serial, iclass 18, count 0 2006.229.16:31:16.55#ibcon#enter sib2, iclass 18, count 0 2006.229.16:31:16.55#ibcon#flushed, iclass 18, count 0 2006.229.16:31:16.55#ibcon#about to write, iclass 18, count 0 2006.229.16:31:16.55#ibcon#wrote, iclass 18, count 0 2006.229.16:31:16.55#ibcon#about to read 3, iclass 18, count 0 2006.229.16:31:16.57#ibcon#read 3, iclass 18, count 0 2006.229.16:31:16.57#ibcon#about to read 4, iclass 18, count 0 2006.229.16:31:16.57#ibcon#read 4, iclass 18, count 0 2006.229.16:31:16.57#ibcon#about to read 5, iclass 18, count 0 2006.229.16:31:16.57#ibcon#read 5, iclass 18, count 0 2006.229.16:31:16.57#ibcon#about to read 6, iclass 18, count 0 2006.229.16:31:16.57#ibcon#read 6, iclass 18, count 0 2006.229.16:31:16.57#ibcon#end of sib2, iclass 18, count 0 2006.229.16:31:16.57#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:31:16.57#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:31:16.57#ibcon#[25=USB\r\n] 2006.229.16:31:16.57#ibcon#*before write, iclass 18, count 0 2006.229.16:31:16.57#ibcon#enter sib2, iclass 18, count 0 2006.229.16:31:16.57#ibcon#flushed, iclass 18, count 0 2006.229.16:31:16.57#ibcon#about to write, iclass 18, count 0 2006.229.16:31:16.57#ibcon#wrote, iclass 18, count 0 2006.229.16:31:16.57#ibcon#about to read 3, iclass 18, count 0 2006.229.16:31:16.60#ibcon#read 3, iclass 18, count 0 2006.229.16:31:16.60#ibcon#about to read 4, iclass 18, count 0 2006.229.16:31:16.60#ibcon#read 4, iclass 18, count 0 2006.229.16:31:16.60#ibcon#about to read 5, iclass 18, count 0 2006.229.16:31:16.60#ibcon#read 5, iclass 18, count 0 2006.229.16:31:16.60#ibcon#about to read 6, iclass 18, count 0 2006.229.16:31:16.60#ibcon#read 6, iclass 18, count 0 2006.229.16:31:16.60#ibcon#end of sib2, iclass 18, count 0 2006.229.16:31:16.60#ibcon#*after write, iclass 18, count 0 2006.229.16:31:16.60#ibcon#*before return 0, iclass 18, count 0 2006.229.16:31:16.60#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:16.60#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:16.60#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:31:16.60#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:31:16.60$vck44/valo=8,884.99 2006.229.16:31:16.60#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.16:31:16.60#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.16:31:16.60#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:16.60#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:16.60#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:16.60#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:16.60#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:31:16.60#ibcon#first serial, iclass 20, count 0 2006.229.16:31:16.60#ibcon#enter sib2, iclass 20, count 0 2006.229.16:31:16.60#ibcon#flushed, iclass 20, count 0 2006.229.16:31:16.60#ibcon#about to write, iclass 20, count 0 2006.229.16:31:16.60#ibcon#wrote, iclass 20, count 0 2006.229.16:31:16.60#ibcon#about to read 3, iclass 20, count 0 2006.229.16:31:16.62#ibcon#read 3, iclass 20, count 0 2006.229.16:31:16.62#ibcon#about to read 4, iclass 20, count 0 2006.229.16:31:16.62#ibcon#read 4, iclass 20, count 0 2006.229.16:31:16.62#ibcon#about to read 5, iclass 20, count 0 2006.229.16:31:16.62#ibcon#read 5, iclass 20, count 0 2006.229.16:31:16.62#ibcon#about to read 6, iclass 20, count 0 2006.229.16:31:16.62#ibcon#read 6, iclass 20, count 0 2006.229.16:31:16.62#ibcon#end of sib2, iclass 20, count 0 2006.229.16:31:16.62#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:31:16.62#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:31:16.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:31:16.62#ibcon#*before write, iclass 20, count 0 2006.229.16:31:16.62#ibcon#enter sib2, iclass 20, count 0 2006.229.16:31:16.62#ibcon#flushed, iclass 20, count 0 2006.229.16:31:16.62#ibcon#about to write, iclass 20, count 0 2006.229.16:31:16.62#ibcon#wrote, iclass 20, count 0 2006.229.16:31:16.62#ibcon#about to read 3, iclass 20, count 0 2006.229.16:31:16.66#ibcon#read 3, iclass 20, count 0 2006.229.16:31:16.66#ibcon#about to read 4, iclass 20, count 0 2006.229.16:31:16.66#ibcon#read 4, iclass 20, count 0 2006.229.16:31:16.66#ibcon#about to read 5, iclass 20, count 0 2006.229.16:31:16.66#ibcon#read 5, iclass 20, count 0 2006.229.16:31:16.66#ibcon#about to read 6, iclass 20, count 0 2006.229.16:31:16.66#ibcon#read 6, iclass 20, count 0 2006.229.16:31:16.66#ibcon#end of sib2, iclass 20, count 0 2006.229.16:31:16.66#ibcon#*after write, iclass 20, count 0 2006.229.16:31:16.66#ibcon#*before return 0, iclass 20, count 0 2006.229.16:31:16.66#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:16.66#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:16.66#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:31:16.66#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:31:16.66$vck44/va=8,6 2006.229.16:31:16.66#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.16:31:16.66#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.16:31:16.66#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:16.66#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:31:16.72#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:31:16.72#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:31:16.72#ibcon#enter wrdev, iclass 22, count 2 2006.229.16:31:16.72#ibcon#first serial, iclass 22, count 2 2006.229.16:31:16.72#ibcon#enter sib2, iclass 22, count 2 2006.229.16:31:16.72#ibcon#flushed, iclass 22, count 2 2006.229.16:31:16.72#ibcon#about to write, iclass 22, count 2 2006.229.16:31:16.72#ibcon#wrote, iclass 22, count 2 2006.229.16:31:16.72#ibcon#about to read 3, iclass 22, count 2 2006.229.16:31:16.74#ibcon#read 3, iclass 22, count 2 2006.229.16:31:16.74#ibcon#about to read 4, iclass 22, count 2 2006.229.16:31:16.74#ibcon#read 4, iclass 22, count 2 2006.229.16:31:16.74#ibcon#about to read 5, iclass 22, count 2 2006.229.16:31:16.74#ibcon#read 5, iclass 22, count 2 2006.229.16:31:16.74#ibcon#about to read 6, iclass 22, count 2 2006.229.16:31:16.74#ibcon#read 6, iclass 22, count 2 2006.229.16:31:16.74#ibcon#end of sib2, iclass 22, count 2 2006.229.16:31:16.74#ibcon#*mode == 0, iclass 22, count 2 2006.229.16:31:16.74#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.16:31:16.74#ibcon#[25=AT08-06\r\n] 2006.229.16:31:16.74#ibcon#*before write, iclass 22, count 2 2006.229.16:31:16.74#ibcon#enter sib2, iclass 22, count 2 2006.229.16:31:16.74#ibcon#flushed, iclass 22, count 2 2006.229.16:31:16.74#ibcon#about to write, iclass 22, count 2 2006.229.16:31:16.74#ibcon#wrote, iclass 22, count 2 2006.229.16:31:16.74#ibcon#about to read 3, iclass 22, count 2 2006.229.16:31:16.77#ibcon#read 3, iclass 22, count 2 2006.229.16:31:16.77#ibcon#about to read 4, iclass 22, count 2 2006.229.16:31:16.77#ibcon#read 4, iclass 22, count 2 2006.229.16:31:16.77#ibcon#about to read 5, iclass 22, count 2 2006.229.16:31:16.77#ibcon#read 5, iclass 22, count 2 2006.229.16:31:16.77#ibcon#about to read 6, iclass 22, count 2 2006.229.16:31:16.77#ibcon#read 6, iclass 22, count 2 2006.229.16:31:16.77#ibcon#end of sib2, iclass 22, count 2 2006.229.16:31:16.77#ibcon#*after write, iclass 22, count 2 2006.229.16:31:16.77#ibcon#*before return 0, iclass 22, count 2 2006.229.16:31:16.77#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:31:16.77#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:31:16.77#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.16:31:16.77#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:16.77#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:31:16.89#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:31:16.89#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:31:16.89#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:31:16.89#ibcon#first serial, iclass 22, count 0 2006.229.16:31:16.89#ibcon#enter sib2, iclass 22, count 0 2006.229.16:31:16.89#ibcon#flushed, iclass 22, count 0 2006.229.16:31:16.89#ibcon#about to write, iclass 22, count 0 2006.229.16:31:16.89#ibcon#wrote, iclass 22, count 0 2006.229.16:31:16.89#ibcon#about to read 3, iclass 22, count 0 2006.229.16:31:16.91#ibcon#read 3, iclass 22, count 0 2006.229.16:31:16.91#ibcon#about to read 4, iclass 22, count 0 2006.229.16:31:16.91#ibcon#read 4, iclass 22, count 0 2006.229.16:31:16.91#ibcon#about to read 5, iclass 22, count 0 2006.229.16:31:16.91#ibcon#read 5, iclass 22, count 0 2006.229.16:31:16.91#ibcon#about to read 6, iclass 22, count 0 2006.229.16:31:16.91#ibcon#read 6, iclass 22, count 0 2006.229.16:31:16.91#ibcon#end of sib2, iclass 22, count 0 2006.229.16:31:16.91#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:31:16.91#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:31:16.91#ibcon#[25=USB\r\n] 2006.229.16:31:16.91#ibcon#*before write, iclass 22, count 0 2006.229.16:31:16.91#ibcon#enter sib2, iclass 22, count 0 2006.229.16:31:16.91#ibcon#flushed, iclass 22, count 0 2006.229.16:31:16.91#ibcon#about to write, iclass 22, count 0 2006.229.16:31:16.91#ibcon#wrote, iclass 22, count 0 2006.229.16:31:16.91#ibcon#about to read 3, iclass 22, count 0 2006.229.16:31:16.94#ibcon#read 3, iclass 22, count 0 2006.229.16:31:16.94#ibcon#about to read 4, iclass 22, count 0 2006.229.16:31:16.94#ibcon#read 4, iclass 22, count 0 2006.229.16:31:16.94#ibcon#about to read 5, iclass 22, count 0 2006.229.16:31:16.94#ibcon#read 5, iclass 22, count 0 2006.229.16:31:16.94#ibcon#about to read 6, iclass 22, count 0 2006.229.16:31:16.94#ibcon#read 6, iclass 22, count 0 2006.229.16:31:16.94#ibcon#end of sib2, iclass 22, count 0 2006.229.16:31:16.94#ibcon#*after write, iclass 22, count 0 2006.229.16:31:16.94#ibcon#*before return 0, iclass 22, count 0 2006.229.16:31:16.94#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:31:16.94#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:31:16.94#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:31:16.94#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:31:16.94$vck44/vblo=1,629.99 2006.229.16:31:16.94#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.16:31:16.94#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.16:31:16.94#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:16.94#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:16.94#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:16.94#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:16.94#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:31:16.94#ibcon#first serial, iclass 24, count 0 2006.229.16:31:16.94#ibcon#enter sib2, iclass 24, count 0 2006.229.16:31:16.94#ibcon#flushed, iclass 24, count 0 2006.229.16:31:16.94#ibcon#about to write, iclass 24, count 0 2006.229.16:31:16.94#ibcon#wrote, iclass 24, count 0 2006.229.16:31:16.94#ibcon#about to read 3, iclass 24, count 0 2006.229.16:31:16.96#ibcon#read 3, iclass 24, count 0 2006.229.16:31:16.96#ibcon#about to read 4, iclass 24, count 0 2006.229.16:31:16.96#ibcon#read 4, iclass 24, count 0 2006.229.16:31:16.96#ibcon#about to read 5, iclass 24, count 0 2006.229.16:31:16.96#ibcon#read 5, iclass 24, count 0 2006.229.16:31:16.96#ibcon#about to read 6, iclass 24, count 0 2006.229.16:31:16.96#ibcon#read 6, iclass 24, count 0 2006.229.16:31:16.96#ibcon#end of sib2, iclass 24, count 0 2006.229.16:31:16.96#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:31:16.96#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:31:16.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:31:16.96#ibcon#*before write, iclass 24, count 0 2006.229.16:31:16.96#ibcon#enter sib2, iclass 24, count 0 2006.229.16:31:16.96#ibcon#flushed, iclass 24, count 0 2006.229.16:31:16.96#ibcon#about to write, iclass 24, count 0 2006.229.16:31:16.96#ibcon#wrote, iclass 24, count 0 2006.229.16:31:16.96#ibcon#about to read 3, iclass 24, count 0 2006.229.16:31:17.00#ibcon#read 3, iclass 24, count 0 2006.229.16:31:17.00#ibcon#about to read 4, iclass 24, count 0 2006.229.16:31:17.00#ibcon#read 4, iclass 24, count 0 2006.229.16:31:17.00#ibcon#about to read 5, iclass 24, count 0 2006.229.16:31:17.00#ibcon#read 5, iclass 24, count 0 2006.229.16:31:17.00#ibcon#about to read 6, iclass 24, count 0 2006.229.16:31:17.00#ibcon#read 6, iclass 24, count 0 2006.229.16:31:17.00#ibcon#end of sib2, iclass 24, count 0 2006.229.16:31:17.00#ibcon#*after write, iclass 24, count 0 2006.229.16:31:17.00#ibcon#*before return 0, iclass 24, count 0 2006.229.16:31:17.00#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:17.00#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:31:17.00#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:31:17.00#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:31:17.00$vck44/vb=1,4 2006.229.16:31:17.00#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.16:31:17.00#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.16:31:17.00#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:17.00#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:17.00#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:17.00#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:17.00#ibcon#enter wrdev, iclass 26, count 2 2006.229.16:31:17.00#ibcon#first serial, iclass 26, count 2 2006.229.16:31:17.00#ibcon#enter sib2, iclass 26, count 2 2006.229.16:31:17.00#ibcon#flushed, iclass 26, count 2 2006.229.16:31:17.00#ibcon#about to write, iclass 26, count 2 2006.229.16:31:17.00#ibcon#wrote, iclass 26, count 2 2006.229.16:31:17.00#ibcon#about to read 3, iclass 26, count 2 2006.229.16:31:17.02#ibcon#read 3, iclass 26, count 2 2006.229.16:31:17.02#ibcon#about to read 4, iclass 26, count 2 2006.229.16:31:17.02#ibcon#read 4, iclass 26, count 2 2006.229.16:31:17.02#ibcon#about to read 5, iclass 26, count 2 2006.229.16:31:17.02#ibcon#read 5, iclass 26, count 2 2006.229.16:31:17.02#ibcon#about to read 6, iclass 26, count 2 2006.229.16:31:17.02#ibcon#read 6, iclass 26, count 2 2006.229.16:31:17.02#ibcon#end of sib2, iclass 26, count 2 2006.229.16:31:17.02#ibcon#*mode == 0, iclass 26, count 2 2006.229.16:31:17.02#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.16:31:17.02#ibcon#[27=AT01-04\r\n] 2006.229.16:31:17.02#ibcon#*before write, iclass 26, count 2 2006.229.16:31:17.02#ibcon#enter sib2, iclass 26, count 2 2006.229.16:31:17.02#ibcon#flushed, iclass 26, count 2 2006.229.16:31:17.02#ibcon#about to write, iclass 26, count 2 2006.229.16:31:17.02#ibcon#wrote, iclass 26, count 2 2006.229.16:31:17.02#ibcon#about to read 3, iclass 26, count 2 2006.229.16:31:17.05#ibcon#read 3, iclass 26, count 2 2006.229.16:31:17.05#ibcon#about to read 4, iclass 26, count 2 2006.229.16:31:17.05#ibcon#read 4, iclass 26, count 2 2006.229.16:31:17.05#ibcon#about to read 5, iclass 26, count 2 2006.229.16:31:17.05#ibcon#read 5, iclass 26, count 2 2006.229.16:31:17.05#ibcon#about to read 6, iclass 26, count 2 2006.229.16:31:17.05#ibcon#read 6, iclass 26, count 2 2006.229.16:31:17.05#ibcon#end of sib2, iclass 26, count 2 2006.229.16:31:17.05#ibcon#*after write, iclass 26, count 2 2006.229.16:31:17.05#ibcon#*before return 0, iclass 26, count 2 2006.229.16:31:17.05#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:17.05#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:31:17.05#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.16:31:17.05#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:17.05#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:17.17#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:17.17#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:17.17#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:31:17.17#ibcon#first serial, iclass 26, count 0 2006.229.16:31:17.17#ibcon#enter sib2, iclass 26, count 0 2006.229.16:31:17.17#ibcon#flushed, iclass 26, count 0 2006.229.16:31:17.17#ibcon#about to write, iclass 26, count 0 2006.229.16:31:17.17#ibcon#wrote, iclass 26, count 0 2006.229.16:31:17.17#ibcon#about to read 3, iclass 26, count 0 2006.229.16:31:17.19#ibcon#read 3, iclass 26, count 0 2006.229.16:31:17.19#ibcon#about to read 4, iclass 26, count 0 2006.229.16:31:17.19#ibcon#read 4, iclass 26, count 0 2006.229.16:31:17.19#ibcon#about to read 5, iclass 26, count 0 2006.229.16:31:17.19#ibcon#read 5, iclass 26, count 0 2006.229.16:31:17.19#ibcon#about to read 6, iclass 26, count 0 2006.229.16:31:17.19#ibcon#read 6, iclass 26, count 0 2006.229.16:31:17.19#ibcon#end of sib2, iclass 26, count 0 2006.229.16:31:17.19#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:31:17.19#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:31:17.19#ibcon#[27=USB\r\n] 2006.229.16:31:17.19#ibcon#*before write, iclass 26, count 0 2006.229.16:31:17.19#ibcon#enter sib2, iclass 26, count 0 2006.229.16:31:17.19#ibcon#flushed, iclass 26, count 0 2006.229.16:31:17.19#ibcon#about to write, iclass 26, count 0 2006.229.16:31:17.19#ibcon#wrote, iclass 26, count 0 2006.229.16:31:17.19#ibcon#about to read 3, iclass 26, count 0 2006.229.16:31:17.22#ibcon#read 3, iclass 26, count 0 2006.229.16:31:17.22#ibcon#about to read 4, iclass 26, count 0 2006.229.16:31:17.22#ibcon#read 4, iclass 26, count 0 2006.229.16:31:17.22#ibcon#about to read 5, iclass 26, count 0 2006.229.16:31:17.22#ibcon#read 5, iclass 26, count 0 2006.229.16:31:17.22#ibcon#about to read 6, iclass 26, count 0 2006.229.16:31:17.22#ibcon#read 6, iclass 26, count 0 2006.229.16:31:17.22#ibcon#end of sib2, iclass 26, count 0 2006.229.16:31:17.22#ibcon#*after write, iclass 26, count 0 2006.229.16:31:17.22#ibcon#*before return 0, iclass 26, count 0 2006.229.16:31:17.22#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:17.22#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:31:17.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:31:17.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:31:17.22$vck44/vblo=2,634.99 2006.229.16:31:17.22#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.16:31:17.22#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.16:31:17.22#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:17.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:17.22#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:17.22#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:17.22#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:31:17.22#ibcon#first serial, iclass 28, count 0 2006.229.16:31:17.22#ibcon#enter sib2, iclass 28, count 0 2006.229.16:31:17.22#ibcon#flushed, iclass 28, count 0 2006.229.16:31:17.22#ibcon#about to write, iclass 28, count 0 2006.229.16:31:17.22#ibcon#wrote, iclass 28, count 0 2006.229.16:31:17.22#ibcon#about to read 3, iclass 28, count 0 2006.229.16:31:17.24#ibcon#read 3, iclass 28, count 0 2006.229.16:31:17.24#ibcon#about to read 4, iclass 28, count 0 2006.229.16:31:17.24#ibcon#read 4, iclass 28, count 0 2006.229.16:31:17.24#ibcon#about to read 5, iclass 28, count 0 2006.229.16:31:17.24#ibcon#read 5, iclass 28, count 0 2006.229.16:31:17.24#ibcon#about to read 6, iclass 28, count 0 2006.229.16:31:17.24#ibcon#read 6, iclass 28, count 0 2006.229.16:31:17.24#ibcon#end of sib2, iclass 28, count 0 2006.229.16:31:17.24#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:31:17.24#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:31:17.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:31:17.24#ibcon#*before write, iclass 28, count 0 2006.229.16:31:17.24#ibcon#enter sib2, iclass 28, count 0 2006.229.16:31:17.24#ibcon#flushed, iclass 28, count 0 2006.229.16:31:17.24#ibcon#about to write, iclass 28, count 0 2006.229.16:31:17.24#ibcon#wrote, iclass 28, count 0 2006.229.16:31:17.24#ibcon#about to read 3, iclass 28, count 0 2006.229.16:31:17.28#ibcon#read 3, iclass 28, count 0 2006.229.16:31:17.28#ibcon#about to read 4, iclass 28, count 0 2006.229.16:31:17.28#ibcon#read 4, iclass 28, count 0 2006.229.16:31:17.28#ibcon#about to read 5, iclass 28, count 0 2006.229.16:31:17.28#ibcon#read 5, iclass 28, count 0 2006.229.16:31:17.28#ibcon#about to read 6, iclass 28, count 0 2006.229.16:31:17.28#ibcon#read 6, iclass 28, count 0 2006.229.16:31:17.28#ibcon#end of sib2, iclass 28, count 0 2006.229.16:31:17.28#ibcon#*after write, iclass 28, count 0 2006.229.16:31:17.28#ibcon#*before return 0, iclass 28, count 0 2006.229.16:31:17.28#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:17.28#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:31:17.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:31:17.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:31:17.28$vck44/vb=2,4 2006.229.16:31:17.28#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.16:31:17.28#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.16:31:17.28#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:17.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:17.34#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:17.34#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:17.34#ibcon#enter wrdev, iclass 30, count 2 2006.229.16:31:17.34#ibcon#first serial, iclass 30, count 2 2006.229.16:31:17.34#ibcon#enter sib2, iclass 30, count 2 2006.229.16:31:17.34#ibcon#flushed, iclass 30, count 2 2006.229.16:31:17.34#ibcon#about to write, iclass 30, count 2 2006.229.16:31:17.34#ibcon#wrote, iclass 30, count 2 2006.229.16:31:17.34#ibcon#about to read 3, iclass 30, count 2 2006.229.16:31:17.36#ibcon#read 3, iclass 30, count 2 2006.229.16:31:17.36#ibcon#about to read 4, iclass 30, count 2 2006.229.16:31:17.36#ibcon#read 4, iclass 30, count 2 2006.229.16:31:17.36#ibcon#about to read 5, iclass 30, count 2 2006.229.16:31:17.36#ibcon#read 5, iclass 30, count 2 2006.229.16:31:17.36#ibcon#about to read 6, iclass 30, count 2 2006.229.16:31:17.36#ibcon#read 6, iclass 30, count 2 2006.229.16:31:17.36#ibcon#end of sib2, iclass 30, count 2 2006.229.16:31:17.36#ibcon#*mode == 0, iclass 30, count 2 2006.229.16:31:17.36#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.16:31:17.36#ibcon#[27=AT02-04\r\n] 2006.229.16:31:17.36#ibcon#*before write, iclass 30, count 2 2006.229.16:31:17.36#ibcon#enter sib2, iclass 30, count 2 2006.229.16:31:17.36#ibcon#flushed, iclass 30, count 2 2006.229.16:31:17.36#ibcon#about to write, iclass 30, count 2 2006.229.16:31:17.36#ibcon#wrote, iclass 30, count 2 2006.229.16:31:17.36#ibcon#about to read 3, iclass 30, count 2 2006.229.16:31:17.39#ibcon#read 3, iclass 30, count 2 2006.229.16:31:17.39#ibcon#about to read 4, iclass 30, count 2 2006.229.16:31:17.39#ibcon#read 4, iclass 30, count 2 2006.229.16:31:17.39#ibcon#about to read 5, iclass 30, count 2 2006.229.16:31:17.39#ibcon#read 5, iclass 30, count 2 2006.229.16:31:17.39#ibcon#about to read 6, iclass 30, count 2 2006.229.16:31:17.39#ibcon#read 6, iclass 30, count 2 2006.229.16:31:17.39#ibcon#end of sib2, iclass 30, count 2 2006.229.16:31:17.39#ibcon#*after write, iclass 30, count 2 2006.229.16:31:17.39#ibcon#*before return 0, iclass 30, count 2 2006.229.16:31:17.39#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:17.39#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:31:17.39#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.16:31:17.39#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:17.39#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:17.51#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:17.51#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:17.51#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:31:17.51#ibcon#first serial, iclass 30, count 0 2006.229.16:31:17.51#ibcon#enter sib2, iclass 30, count 0 2006.229.16:31:17.51#ibcon#flushed, iclass 30, count 0 2006.229.16:31:17.51#ibcon#about to write, iclass 30, count 0 2006.229.16:31:17.51#ibcon#wrote, iclass 30, count 0 2006.229.16:31:17.51#ibcon#about to read 3, iclass 30, count 0 2006.229.16:31:17.53#ibcon#read 3, iclass 30, count 0 2006.229.16:31:17.53#ibcon#about to read 4, iclass 30, count 0 2006.229.16:31:17.53#ibcon#read 4, iclass 30, count 0 2006.229.16:31:17.53#ibcon#about to read 5, iclass 30, count 0 2006.229.16:31:17.53#ibcon#read 5, iclass 30, count 0 2006.229.16:31:17.53#ibcon#about to read 6, iclass 30, count 0 2006.229.16:31:17.53#ibcon#read 6, iclass 30, count 0 2006.229.16:31:17.53#ibcon#end of sib2, iclass 30, count 0 2006.229.16:31:17.53#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:31:17.53#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:31:17.53#ibcon#[27=USB\r\n] 2006.229.16:31:17.53#ibcon#*before write, iclass 30, count 0 2006.229.16:31:17.53#ibcon#enter sib2, iclass 30, count 0 2006.229.16:31:17.53#ibcon#flushed, iclass 30, count 0 2006.229.16:31:17.53#ibcon#about to write, iclass 30, count 0 2006.229.16:31:17.53#ibcon#wrote, iclass 30, count 0 2006.229.16:31:17.53#ibcon#about to read 3, iclass 30, count 0 2006.229.16:31:17.56#ibcon#read 3, iclass 30, count 0 2006.229.16:31:17.56#ibcon#about to read 4, iclass 30, count 0 2006.229.16:31:17.56#ibcon#read 4, iclass 30, count 0 2006.229.16:31:17.56#ibcon#about to read 5, iclass 30, count 0 2006.229.16:31:17.56#ibcon#read 5, iclass 30, count 0 2006.229.16:31:17.56#ibcon#about to read 6, iclass 30, count 0 2006.229.16:31:17.56#ibcon#read 6, iclass 30, count 0 2006.229.16:31:17.56#ibcon#end of sib2, iclass 30, count 0 2006.229.16:31:17.56#ibcon#*after write, iclass 30, count 0 2006.229.16:31:17.56#ibcon#*before return 0, iclass 30, count 0 2006.229.16:31:17.56#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:17.56#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:31:17.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:31:17.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:31:17.56$vck44/vblo=3,649.99 2006.229.16:31:17.56#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:31:17.56#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:31:17.56#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:17.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:17.56#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:17.56#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:17.56#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:31:17.56#ibcon#first serial, iclass 32, count 0 2006.229.16:31:17.56#ibcon#enter sib2, iclass 32, count 0 2006.229.16:31:17.56#ibcon#flushed, iclass 32, count 0 2006.229.16:31:17.56#ibcon#about to write, iclass 32, count 0 2006.229.16:31:17.56#ibcon#wrote, iclass 32, count 0 2006.229.16:31:17.56#ibcon#about to read 3, iclass 32, count 0 2006.229.16:31:17.58#ibcon#read 3, iclass 32, count 0 2006.229.16:31:17.58#ibcon#about to read 4, iclass 32, count 0 2006.229.16:31:17.58#ibcon#read 4, iclass 32, count 0 2006.229.16:31:17.58#ibcon#about to read 5, iclass 32, count 0 2006.229.16:31:17.58#ibcon#read 5, iclass 32, count 0 2006.229.16:31:17.58#ibcon#about to read 6, iclass 32, count 0 2006.229.16:31:17.58#ibcon#read 6, iclass 32, count 0 2006.229.16:31:17.58#ibcon#end of sib2, iclass 32, count 0 2006.229.16:31:17.58#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:31:17.58#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:31:17.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:31:17.58#ibcon#*before write, iclass 32, count 0 2006.229.16:31:17.58#ibcon#enter sib2, iclass 32, count 0 2006.229.16:31:17.58#ibcon#flushed, iclass 32, count 0 2006.229.16:31:17.58#ibcon#about to write, iclass 32, count 0 2006.229.16:31:17.58#ibcon#wrote, iclass 32, count 0 2006.229.16:31:17.58#ibcon#about to read 3, iclass 32, count 0 2006.229.16:31:17.62#ibcon#read 3, iclass 32, count 0 2006.229.16:31:17.62#ibcon#about to read 4, iclass 32, count 0 2006.229.16:31:17.62#ibcon#read 4, iclass 32, count 0 2006.229.16:31:17.62#ibcon#about to read 5, iclass 32, count 0 2006.229.16:31:17.62#ibcon#read 5, iclass 32, count 0 2006.229.16:31:17.62#ibcon#about to read 6, iclass 32, count 0 2006.229.16:31:17.62#ibcon#read 6, iclass 32, count 0 2006.229.16:31:17.62#ibcon#end of sib2, iclass 32, count 0 2006.229.16:31:17.62#ibcon#*after write, iclass 32, count 0 2006.229.16:31:17.62#ibcon#*before return 0, iclass 32, count 0 2006.229.16:31:17.62#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:17.62#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:31:17.62#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:31:17.62#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:31:17.62$vck44/vb=3,4 2006.229.16:31:17.62#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.16:31:17.62#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.16:31:17.62#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:17.62#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:31:17.68#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:31:17.68#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:31:17.68#ibcon#enter wrdev, iclass 34, count 2 2006.229.16:31:17.68#ibcon#first serial, iclass 34, count 2 2006.229.16:31:17.68#ibcon#enter sib2, iclass 34, count 2 2006.229.16:31:17.68#ibcon#flushed, iclass 34, count 2 2006.229.16:31:17.68#ibcon#about to write, iclass 34, count 2 2006.229.16:31:17.68#ibcon#wrote, iclass 34, count 2 2006.229.16:31:17.68#ibcon#about to read 3, iclass 34, count 2 2006.229.16:31:17.70#ibcon#read 3, iclass 34, count 2 2006.229.16:31:17.70#ibcon#about to read 4, iclass 34, count 2 2006.229.16:31:17.70#ibcon#read 4, iclass 34, count 2 2006.229.16:31:17.70#ibcon#about to read 5, iclass 34, count 2 2006.229.16:31:17.70#ibcon#read 5, iclass 34, count 2 2006.229.16:31:17.70#ibcon#about to read 6, iclass 34, count 2 2006.229.16:31:17.70#ibcon#read 6, iclass 34, count 2 2006.229.16:31:17.70#ibcon#end of sib2, iclass 34, count 2 2006.229.16:31:17.70#ibcon#*mode == 0, iclass 34, count 2 2006.229.16:31:17.70#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.16:31:17.70#ibcon#[27=AT03-04\r\n] 2006.229.16:31:17.70#ibcon#*before write, iclass 34, count 2 2006.229.16:31:17.70#ibcon#enter sib2, iclass 34, count 2 2006.229.16:31:17.70#ibcon#flushed, iclass 34, count 2 2006.229.16:31:17.70#ibcon#about to write, iclass 34, count 2 2006.229.16:31:17.70#ibcon#wrote, iclass 34, count 2 2006.229.16:31:17.70#ibcon#about to read 3, iclass 34, count 2 2006.229.16:31:17.73#ibcon#read 3, iclass 34, count 2 2006.229.16:31:17.73#ibcon#about to read 4, iclass 34, count 2 2006.229.16:31:17.73#ibcon#read 4, iclass 34, count 2 2006.229.16:31:17.73#ibcon#about to read 5, iclass 34, count 2 2006.229.16:31:17.73#ibcon#read 5, iclass 34, count 2 2006.229.16:31:17.73#ibcon#about to read 6, iclass 34, count 2 2006.229.16:31:17.73#ibcon#read 6, iclass 34, count 2 2006.229.16:31:17.73#ibcon#end of sib2, iclass 34, count 2 2006.229.16:31:17.73#ibcon#*after write, iclass 34, count 2 2006.229.16:31:17.73#ibcon#*before return 0, iclass 34, count 2 2006.229.16:31:17.73#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:31:17.73#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:31:17.73#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.16:31:17.73#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:17.73#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:31:17.85#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:31:17.85#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:31:17.85#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:31:17.85#ibcon#first serial, iclass 34, count 0 2006.229.16:31:17.85#ibcon#enter sib2, iclass 34, count 0 2006.229.16:31:17.85#ibcon#flushed, iclass 34, count 0 2006.229.16:31:17.85#ibcon#about to write, iclass 34, count 0 2006.229.16:31:17.85#ibcon#wrote, iclass 34, count 0 2006.229.16:31:17.85#ibcon#about to read 3, iclass 34, count 0 2006.229.16:31:17.87#ibcon#read 3, iclass 34, count 0 2006.229.16:31:17.87#ibcon#about to read 4, iclass 34, count 0 2006.229.16:31:17.87#ibcon#read 4, iclass 34, count 0 2006.229.16:31:17.87#ibcon#about to read 5, iclass 34, count 0 2006.229.16:31:17.87#ibcon#read 5, iclass 34, count 0 2006.229.16:31:17.87#ibcon#about to read 6, iclass 34, count 0 2006.229.16:31:17.87#ibcon#read 6, iclass 34, count 0 2006.229.16:31:17.87#ibcon#end of sib2, iclass 34, count 0 2006.229.16:31:17.87#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:31:17.87#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:31:17.87#ibcon#[27=USB\r\n] 2006.229.16:31:17.87#ibcon#*before write, iclass 34, count 0 2006.229.16:31:17.87#ibcon#enter sib2, iclass 34, count 0 2006.229.16:31:17.87#ibcon#flushed, iclass 34, count 0 2006.229.16:31:17.87#ibcon#about to write, iclass 34, count 0 2006.229.16:31:17.87#ibcon#wrote, iclass 34, count 0 2006.229.16:31:17.87#ibcon#about to read 3, iclass 34, count 0 2006.229.16:31:17.90#ibcon#read 3, iclass 34, count 0 2006.229.16:31:17.90#ibcon#about to read 4, iclass 34, count 0 2006.229.16:31:17.90#ibcon#read 4, iclass 34, count 0 2006.229.16:31:17.90#ibcon#about to read 5, iclass 34, count 0 2006.229.16:31:17.90#ibcon#read 5, iclass 34, count 0 2006.229.16:31:17.90#ibcon#about to read 6, iclass 34, count 0 2006.229.16:31:17.90#ibcon#read 6, iclass 34, count 0 2006.229.16:31:17.90#ibcon#end of sib2, iclass 34, count 0 2006.229.16:31:17.90#ibcon#*after write, iclass 34, count 0 2006.229.16:31:17.90#ibcon#*before return 0, iclass 34, count 0 2006.229.16:31:17.90#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:31:17.90#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:31:17.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:31:17.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:31:17.90$vck44/vblo=4,679.99 2006.229.16:31:17.90#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.16:31:17.90#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.16:31:17.90#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:17.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:31:17.90#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:31:17.90#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:31:17.90#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:31:17.90#ibcon#first serial, iclass 36, count 0 2006.229.16:31:17.90#ibcon#enter sib2, iclass 36, count 0 2006.229.16:31:17.90#ibcon#flushed, iclass 36, count 0 2006.229.16:31:17.90#ibcon#about to write, iclass 36, count 0 2006.229.16:31:17.90#ibcon#wrote, iclass 36, count 0 2006.229.16:31:17.90#ibcon#about to read 3, iclass 36, count 0 2006.229.16:31:17.92#ibcon#read 3, iclass 36, count 0 2006.229.16:31:17.92#ibcon#about to read 4, iclass 36, count 0 2006.229.16:31:17.92#ibcon#read 4, iclass 36, count 0 2006.229.16:31:17.92#ibcon#about to read 5, iclass 36, count 0 2006.229.16:31:17.92#ibcon#read 5, iclass 36, count 0 2006.229.16:31:17.92#ibcon#about to read 6, iclass 36, count 0 2006.229.16:31:17.92#ibcon#read 6, iclass 36, count 0 2006.229.16:31:17.92#ibcon#end of sib2, iclass 36, count 0 2006.229.16:31:17.92#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:31:17.92#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:31:17.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:31:17.92#ibcon#*before write, iclass 36, count 0 2006.229.16:31:17.92#ibcon#enter sib2, iclass 36, count 0 2006.229.16:31:17.92#ibcon#flushed, iclass 36, count 0 2006.229.16:31:17.92#ibcon#about to write, iclass 36, count 0 2006.229.16:31:17.92#ibcon#wrote, iclass 36, count 0 2006.229.16:31:17.92#ibcon#about to read 3, iclass 36, count 0 2006.229.16:31:17.96#ibcon#read 3, iclass 36, count 0 2006.229.16:31:17.96#ibcon#about to read 4, iclass 36, count 0 2006.229.16:31:17.96#ibcon#read 4, iclass 36, count 0 2006.229.16:31:17.96#ibcon#about to read 5, iclass 36, count 0 2006.229.16:31:17.96#ibcon#read 5, iclass 36, count 0 2006.229.16:31:17.96#ibcon#about to read 6, iclass 36, count 0 2006.229.16:31:17.96#ibcon#read 6, iclass 36, count 0 2006.229.16:31:17.96#ibcon#end of sib2, iclass 36, count 0 2006.229.16:31:17.96#ibcon#*after write, iclass 36, count 0 2006.229.16:31:17.96#ibcon#*before return 0, iclass 36, count 0 2006.229.16:31:17.96#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:31:17.96#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:31:17.96#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:31:17.96#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:31:17.96$vck44/vb=4,4 2006.229.16:31:17.96#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.16:31:17.96#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.16:31:17.96#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:17.96#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:31:18.02#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:31:18.02#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:31:18.02#ibcon#enter wrdev, iclass 38, count 2 2006.229.16:31:18.02#ibcon#first serial, iclass 38, count 2 2006.229.16:31:18.02#ibcon#enter sib2, iclass 38, count 2 2006.229.16:31:18.02#ibcon#flushed, iclass 38, count 2 2006.229.16:31:18.02#ibcon#about to write, iclass 38, count 2 2006.229.16:31:18.02#ibcon#wrote, iclass 38, count 2 2006.229.16:31:18.02#ibcon#about to read 3, iclass 38, count 2 2006.229.16:31:18.04#ibcon#read 3, iclass 38, count 2 2006.229.16:31:18.04#ibcon#about to read 4, iclass 38, count 2 2006.229.16:31:18.04#ibcon#read 4, iclass 38, count 2 2006.229.16:31:18.04#ibcon#about to read 5, iclass 38, count 2 2006.229.16:31:18.04#ibcon#read 5, iclass 38, count 2 2006.229.16:31:18.04#ibcon#about to read 6, iclass 38, count 2 2006.229.16:31:18.04#ibcon#read 6, iclass 38, count 2 2006.229.16:31:18.04#ibcon#end of sib2, iclass 38, count 2 2006.229.16:31:18.04#ibcon#*mode == 0, iclass 38, count 2 2006.229.16:31:18.04#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.16:31:18.04#ibcon#[27=AT04-04\r\n] 2006.229.16:31:18.04#ibcon#*before write, iclass 38, count 2 2006.229.16:31:18.04#ibcon#enter sib2, iclass 38, count 2 2006.229.16:31:18.04#ibcon#flushed, iclass 38, count 2 2006.229.16:31:18.04#ibcon#about to write, iclass 38, count 2 2006.229.16:31:18.04#ibcon#wrote, iclass 38, count 2 2006.229.16:31:18.04#ibcon#about to read 3, iclass 38, count 2 2006.229.16:31:18.07#ibcon#read 3, iclass 38, count 2 2006.229.16:31:18.07#ibcon#about to read 4, iclass 38, count 2 2006.229.16:31:18.07#ibcon#read 4, iclass 38, count 2 2006.229.16:31:18.07#ibcon#about to read 5, iclass 38, count 2 2006.229.16:31:18.07#ibcon#read 5, iclass 38, count 2 2006.229.16:31:18.07#ibcon#about to read 6, iclass 38, count 2 2006.229.16:31:18.07#ibcon#read 6, iclass 38, count 2 2006.229.16:31:18.07#ibcon#end of sib2, iclass 38, count 2 2006.229.16:31:18.07#ibcon#*after write, iclass 38, count 2 2006.229.16:31:18.07#ibcon#*before return 0, iclass 38, count 2 2006.229.16:31:18.07#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:31:18.07#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:31:18.07#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.16:31:18.07#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:18.07#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:31:18.19#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:31:18.19#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:31:18.19#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:31:18.19#ibcon#first serial, iclass 38, count 0 2006.229.16:31:18.19#ibcon#enter sib2, iclass 38, count 0 2006.229.16:31:18.19#ibcon#flushed, iclass 38, count 0 2006.229.16:31:18.19#ibcon#about to write, iclass 38, count 0 2006.229.16:31:18.19#ibcon#wrote, iclass 38, count 0 2006.229.16:31:18.19#ibcon#about to read 3, iclass 38, count 0 2006.229.16:31:18.21#ibcon#read 3, iclass 38, count 0 2006.229.16:31:18.21#ibcon#about to read 4, iclass 38, count 0 2006.229.16:31:18.21#ibcon#read 4, iclass 38, count 0 2006.229.16:31:18.21#ibcon#about to read 5, iclass 38, count 0 2006.229.16:31:18.21#ibcon#read 5, iclass 38, count 0 2006.229.16:31:18.21#ibcon#about to read 6, iclass 38, count 0 2006.229.16:31:18.21#ibcon#read 6, iclass 38, count 0 2006.229.16:31:18.21#ibcon#end of sib2, iclass 38, count 0 2006.229.16:31:18.21#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:31:18.21#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:31:18.21#ibcon#[27=USB\r\n] 2006.229.16:31:18.21#ibcon#*before write, iclass 38, count 0 2006.229.16:31:18.21#ibcon#enter sib2, iclass 38, count 0 2006.229.16:31:18.21#ibcon#flushed, iclass 38, count 0 2006.229.16:31:18.21#ibcon#about to write, iclass 38, count 0 2006.229.16:31:18.21#ibcon#wrote, iclass 38, count 0 2006.229.16:31:18.21#ibcon#about to read 3, iclass 38, count 0 2006.229.16:31:18.24#ibcon#read 3, iclass 38, count 0 2006.229.16:31:18.24#ibcon#about to read 4, iclass 38, count 0 2006.229.16:31:18.24#ibcon#read 4, iclass 38, count 0 2006.229.16:31:18.24#ibcon#about to read 5, iclass 38, count 0 2006.229.16:31:18.24#ibcon#read 5, iclass 38, count 0 2006.229.16:31:18.24#ibcon#about to read 6, iclass 38, count 0 2006.229.16:31:18.24#ibcon#read 6, iclass 38, count 0 2006.229.16:31:18.24#ibcon#end of sib2, iclass 38, count 0 2006.229.16:31:18.24#ibcon#*after write, iclass 38, count 0 2006.229.16:31:18.24#ibcon#*before return 0, iclass 38, count 0 2006.229.16:31:18.24#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:31:18.24#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:31:18.24#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:31:18.24#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:31:18.24$vck44/vblo=5,709.99 2006.229.16:31:18.24#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.16:31:18.24#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.16:31:18.24#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:18.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:18.24#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:18.24#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:18.24#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:31:18.24#ibcon#first serial, iclass 40, count 0 2006.229.16:31:18.24#ibcon#enter sib2, iclass 40, count 0 2006.229.16:31:18.24#ibcon#flushed, iclass 40, count 0 2006.229.16:31:18.24#ibcon#about to write, iclass 40, count 0 2006.229.16:31:18.24#ibcon#wrote, iclass 40, count 0 2006.229.16:31:18.24#ibcon#about to read 3, iclass 40, count 0 2006.229.16:31:18.26#ibcon#read 3, iclass 40, count 0 2006.229.16:31:18.26#ibcon#about to read 4, iclass 40, count 0 2006.229.16:31:18.26#ibcon#read 4, iclass 40, count 0 2006.229.16:31:18.26#ibcon#about to read 5, iclass 40, count 0 2006.229.16:31:18.26#ibcon#read 5, iclass 40, count 0 2006.229.16:31:18.26#ibcon#about to read 6, iclass 40, count 0 2006.229.16:31:18.26#ibcon#read 6, iclass 40, count 0 2006.229.16:31:18.26#ibcon#end of sib2, iclass 40, count 0 2006.229.16:31:18.26#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:31:18.26#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:31:18.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:31:18.26#ibcon#*before write, iclass 40, count 0 2006.229.16:31:18.26#ibcon#enter sib2, iclass 40, count 0 2006.229.16:31:18.26#ibcon#flushed, iclass 40, count 0 2006.229.16:31:18.26#ibcon#about to write, iclass 40, count 0 2006.229.16:31:18.26#ibcon#wrote, iclass 40, count 0 2006.229.16:31:18.26#ibcon#about to read 3, iclass 40, count 0 2006.229.16:31:18.30#ibcon#read 3, iclass 40, count 0 2006.229.16:31:18.30#ibcon#about to read 4, iclass 40, count 0 2006.229.16:31:18.30#ibcon#read 4, iclass 40, count 0 2006.229.16:31:18.30#ibcon#about to read 5, iclass 40, count 0 2006.229.16:31:18.30#ibcon#read 5, iclass 40, count 0 2006.229.16:31:18.30#ibcon#about to read 6, iclass 40, count 0 2006.229.16:31:18.30#ibcon#read 6, iclass 40, count 0 2006.229.16:31:18.30#ibcon#end of sib2, iclass 40, count 0 2006.229.16:31:18.30#ibcon#*after write, iclass 40, count 0 2006.229.16:31:18.30#ibcon#*before return 0, iclass 40, count 0 2006.229.16:31:18.30#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:18.30#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:31:18.30#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:31:18.30#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:31:18.30$vck44/vb=5,4 2006.229.16:31:18.30#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.16:31:18.30#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.16:31:18.30#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:18.30#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:18.36#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:18.36#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:18.36#ibcon#enter wrdev, iclass 4, count 2 2006.229.16:31:18.36#ibcon#first serial, iclass 4, count 2 2006.229.16:31:18.36#ibcon#enter sib2, iclass 4, count 2 2006.229.16:31:18.36#ibcon#flushed, iclass 4, count 2 2006.229.16:31:18.36#ibcon#about to write, iclass 4, count 2 2006.229.16:31:18.36#ibcon#wrote, iclass 4, count 2 2006.229.16:31:18.36#ibcon#about to read 3, iclass 4, count 2 2006.229.16:31:18.38#ibcon#read 3, iclass 4, count 2 2006.229.16:31:18.38#ibcon#about to read 4, iclass 4, count 2 2006.229.16:31:18.38#ibcon#read 4, iclass 4, count 2 2006.229.16:31:18.38#ibcon#about to read 5, iclass 4, count 2 2006.229.16:31:18.38#ibcon#read 5, iclass 4, count 2 2006.229.16:31:18.38#ibcon#about to read 6, iclass 4, count 2 2006.229.16:31:18.38#ibcon#read 6, iclass 4, count 2 2006.229.16:31:18.38#ibcon#end of sib2, iclass 4, count 2 2006.229.16:31:18.38#ibcon#*mode == 0, iclass 4, count 2 2006.229.16:31:18.38#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.16:31:18.38#ibcon#[27=AT05-04\r\n] 2006.229.16:31:18.38#ibcon#*before write, iclass 4, count 2 2006.229.16:31:18.38#ibcon#enter sib2, iclass 4, count 2 2006.229.16:31:18.38#ibcon#flushed, iclass 4, count 2 2006.229.16:31:18.38#ibcon#about to write, iclass 4, count 2 2006.229.16:31:18.38#ibcon#wrote, iclass 4, count 2 2006.229.16:31:18.38#ibcon#about to read 3, iclass 4, count 2 2006.229.16:31:18.41#ibcon#read 3, iclass 4, count 2 2006.229.16:31:18.41#ibcon#about to read 4, iclass 4, count 2 2006.229.16:31:18.41#ibcon#read 4, iclass 4, count 2 2006.229.16:31:18.41#ibcon#about to read 5, iclass 4, count 2 2006.229.16:31:18.41#ibcon#read 5, iclass 4, count 2 2006.229.16:31:18.41#ibcon#about to read 6, iclass 4, count 2 2006.229.16:31:18.41#ibcon#read 6, iclass 4, count 2 2006.229.16:31:18.41#ibcon#end of sib2, iclass 4, count 2 2006.229.16:31:18.41#ibcon#*after write, iclass 4, count 2 2006.229.16:31:18.41#ibcon#*before return 0, iclass 4, count 2 2006.229.16:31:18.41#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:18.41#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:31:18.41#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.16:31:18.41#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:18.41#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:18.53#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:18.53#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:18.53#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:31:18.53#ibcon#first serial, iclass 4, count 0 2006.229.16:31:18.53#ibcon#enter sib2, iclass 4, count 0 2006.229.16:31:18.53#ibcon#flushed, iclass 4, count 0 2006.229.16:31:18.53#ibcon#about to write, iclass 4, count 0 2006.229.16:31:18.53#ibcon#wrote, iclass 4, count 0 2006.229.16:31:18.53#ibcon#about to read 3, iclass 4, count 0 2006.229.16:31:18.55#ibcon#read 3, iclass 4, count 0 2006.229.16:31:18.55#ibcon#about to read 4, iclass 4, count 0 2006.229.16:31:18.55#ibcon#read 4, iclass 4, count 0 2006.229.16:31:18.55#ibcon#about to read 5, iclass 4, count 0 2006.229.16:31:18.55#ibcon#read 5, iclass 4, count 0 2006.229.16:31:18.55#ibcon#about to read 6, iclass 4, count 0 2006.229.16:31:18.55#ibcon#read 6, iclass 4, count 0 2006.229.16:31:18.55#ibcon#end of sib2, iclass 4, count 0 2006.229.16:31:18.55#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:31:18.55#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:31:18.55#ibcon#[27=USB\r\n] 2006.229.16:31:18.55#ibcon#*before write, iclass 4, count 0 2006.229.16:31:18.55#ibcon#enter sib2, iclass 4, count 0 2006.229.16:31:18.55#ibcon#flushed, iclass 4, count 0 2006.229.16:31:18.55#ibcon#about to write, iclass 4, count 0 2006.229.16:31:18.55#ibcon#wrote, iclass 4, count 0 2006.229.16:31:18.55#ibcon#about to read 3, iclass 4, count 0 2006.229.16:31:18.58#ibcon#read 3, iclass 4, count 0 2006.229.16:31:18.58#ibcon#about to read 4, iclass 4, count 0 2006.229.16:31:18.58#ibcon#read 4, iclass 4, count 0 2006.229.16:31:18.58#ibcon#about to read 5, iclass 4, count 0 2006.229.16:31:18.58#ibcon#read 5, iclass 4, count 0 2006.229.16:31:18.58#ibcon#about to read 6, iclass 4, count 0 2006.229.16:31:18.58#ibcon#read 6, iclass 4, count 0 2006.229.16:31:18.58#ibcon#end of sib2, iclass 4, count 0 2006.229.16:31:18.58#ibcon#*after write, iclass 4, count 0 2006.229.16:31:18.58#ibcon#*before return 0, iclass 4, count 0 2006.229.16:31:18.58#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:18.58#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:31:18.58#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:31:18.58#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:31:18.58$vck44/vblo=6,719.99 2006.229.16:31:18.58#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.16:31:18.58#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.16:31:18.58#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:18.58#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:18.58#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:18.58#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:18.58#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:31:18.58#ibcon#first serial, iclass 6, count 0 2006.229.16:31:18.58#ibcon#enter sib2, iclass 6, count 0 2006.229.16:31:18.58#ibcon#flushed, iclass 6, count 0 2006.229.16:31:18.58#ibcon#about to write, iclass 6, count 0 2006.229.16:31:18.58#ibcon#wrote, iclass 6, count 0 2006.229.16:31:18.58#ibcon#about to read 3, iclass 6, count 0 2006.229.16:31:18.60#ibcon#read 3, iclass 6, count 0 2006.229.16:31:18.60#ibcon#about to read 4, iclass 6, count 0 2006.229.16:31:18.60#ibcon#read 4, iclass 6, count 0 2006.229.16:31:18.60#ibcon#about to read 5, iclass 6, count 0 2006.229.16:31:18.60#ibcon#read 5, iclass 6, count 0 2006.229.16:31:18.60#ibcon#about to read 6, iclass 6, count 0 2006.229.16:31:18.60#ibcon#read 6, iclass 6, count 0 2006.229.16:31:18.60#ibcon#end of sib2, iclass 6, count 0 2006.229.16:31:18.60#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:31:18.60#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:31:18.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:31:18.60#ibcon#*before write, iclass 6, count 0 2006.229.16:31:18.60#ibcon#enter sib2, iclass 6, count 0 2006.229.16:31:18.60#ibcon#flushed, iclass 6, count 0 2006.229.16:31:18.60#ibcon#about to write, iclass 6, count 0 2006.229.16:31:18.60#ibcon#wrote, iclass 6, count 0 2006.229.16:31:18.60#ibcon#about to read 3, iclass 6, count 0 2006.229.16:31:18.64#ibcon#read 3, iclass 6, count 0 2006.229.16:31:18.64#ibcon#about to read 4, iclass 6, count 0 2006.229.16:31:18.64#ibcon#read 4, iclass 6, count 0 2006.229.16:31:18.64#ibcon#about to read 5, iclass 6, count 0 2006.229.16:31:18.64#ibcon#read 5, iclass 6, count 0 2006.229.16:31:18.64#ibcon#about to read 6, iclass 6, count 0 2006.229.16:31:18.64#ibcon#read 6, iclass 6, count 0 2006.229.16:31:18.64#ibcon#end of sib2, iclass 6, count 0 2006.229.16:31:18.64#ibcon#*after write, iclass 6, count 0 2006.229.16:31:18.64#ibcon#*before return 0, iclass 6, count 0 2006.229.16:31:18.64#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:18.64#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:31:18.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:31:18.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:31:18.64$vck44/vb=6,4 2006.229.16:31:18.64#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.16:31:18.64#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.16:31:18.64#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:18.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:18.70#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:18.70#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:18.70#ibcon#enter wrdev, iclass 10, count 2 2006.229.16:31:18.70#ibcon#first serial, iclass 10, count 2 2006.229.16:31:18.70#ibcon#enter sib2, iclass 10, count 2 2006.229.16:31:18.70#ibcon#flushed, iclass 10, count 2 2006.229.16:31:18.70#ibcon#about to write, iclass 10, count 2 2006.229.16:31:18.70#ibcon#wrote, iclass 10, count 2 2006.229.16:31:18.70#ibcon#about to read 3, iclass 10, count 2 2006.229.16:31:18.72#ibcon#read 3, iclass 10, count 2 2006.229.16:31:18.72#ibcon#about to read 4, iclass 10, count 2 2006.229.16:31:18.72#ibcon#read 4, iclass 10, count 2 2006.229.16:31:18.72#ibcon#about to read 5, iclass 10, count 2 2006.229.16:31:18.72#ibcon#read 5, iclass 10, count 2 2006.229.16:31:18.72#ibcon#about to read 6, iclass 10, count 2 2006.229.16:31:18.72#ibcon#read 6, iclass 10, count 2 2006.229.16:31:18.72#ibcon#end of sib2, iclass 10, count 2 2006.229.16:31:18.72#ibcon#*mode == 0, iclass 10, count 2 2006.229.16:31:18.72#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.16:31:18.72#ibcon#[27=AT06-04\r\n] 2006.229.16:31:18.72#ibcon#*before write, iclass 10, count 2 2006.229.16:31:18.72#ibcon#enter sib2, iclass 10, count 2 2006.229.16:31:18.72#ibcon#flushed, iclass 10, count 2 2006.229.16:31:18.72#ibcon#about to write, iclass 10, count 2 2006.229.16:31:18.72#ibcon#wrote, iclass 10, count 2 2006.229.16:31:18.72#ibcon#about to read 3, iclass 10, count 2 2006.229.16:31:18.75#ibcon#read 3, iclass 10, count 2 2006.229.16:31:18.75#ibcon#about to read 4, iclass 10, count 2 2006.229.16:31:18.75#ibcon#read 4, iclass 10, count 2 2006.229.16:31:18.75#ibcon#about to read 5, iclass 10, count 2 2006.229.16:31:18.75#ibcon#read 5, iclass 10, count 2 2006.229.16:31:18.75#ibcon#about to read 6, iclass 10, count 2 2006.229.16:31:18.75#ibcon#read 6, iclass 10, count 2 2006.229.16:31:18.75#ibcon#end of sib2, iclass 10, count 2 2006.229.16:31:18.75#ibcon#*after write, iclass 10, count 2 2006.229.16:31:18.75#ibcon#*before return 0, iclass 10, count 2 2006.229.16:31:18.75#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:18.75#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:31:18.75#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.16:31:18.75#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:18.75#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:18.87#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:18.87#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:18.87#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:31:18.87#ibcon#first serial, iclass 10, count 0 2006.229.16:31:18.87#ibcon#enter sib2, iclass 10, count 0 2006.229.16:31:18.87#ibcon#flushed, iclass 10, count 0 2006.229.16:31:18.87#ibcon#about to write, iclass 10, count 0 2006.229.16:31:18.87#ibcon#wrote, iclass 10, count 0 2006.229.16:31:18.87#ibcon#about to read 3, iclass 10, count 0 2006.229.16:31:18.89#ibcon#read 3, iclass 10, count 0 2006.229.16:31:18.89#ibcon#about to read 4, iclass 10, count 0 2006.229.16:31:18.89#ibcon#read 4, iclass 10, count 0 2006.229.16:31:18.89#ibcon#about to read 5, iclass 10, count 0 2006.229.16:31:18.89#ibcon#read 5, iclass 10, count 0 2006.229.16:31:18.89#ibcon#about to read 6, iclass 10, count 0 2006.229.16:31:18.89#ibcon#read 6, iclass 10, count 0 2006.229.16:31:18.89#ibcon#end of sib2, iclass 10, count 0 2006.229.16:31:18.89#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:31:18.89#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:31:18.89#ibcon#[27=USB\r\n] 2006.229.16:31:18.89#ibcon#*before write, iclass 10, count 0 2006.229.16:31:18.89#ibcon#enter sib2, iclass 10, count 0 2006.229.16:31:18.89#ibcon#flushed, iclass 10, count 0 2006.229.16:31:18.89#ibcon#about to write, iclass 10, count 0 2006.229.16:31:18.89#ibcon#wrote, iclass 10, count 0 2006.229.16:31:18.89#ibcon#about to read 3, iclass 10, count 0 2006.229.16:31:18.92#ibcon#read 3, iclass 10, count 0 2006.229.16:31:18.92#ibcon#about to read 4, iclass 10, count 0 2006.229.16:31:18.92#ibcon#read 4, iclass 10, count 0 2006.229.16:31:18.92#ibcon#about to read 5, iclass 10, count 0 2006.229.16:31:18.92#ibcon#read 5, iclass 10, count 0 2006.229.16:31:18.92#ibcon#about to read 6, iclass 10, count 0 2006.229.16:31:18.92#ibcon#read 6, iclass 10, count 0 2006.229.16:31:18.92#ibcon#end of sib2, iclass 10, count 0 2006.229.16:31:18.92#ibcon#*after write, iclass 10, count 0 2006.229.16:31:18.92#ibcon#*before return 0, iclass 10, count 0 2006.229.16:31:18.92#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:18.92#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:31:18.92#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:31:18.92#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:31:18.92$vck44/vblo=7,734.99 2006.229.16:31:18.92#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.16:31:18.92#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.16:31:18.92#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:18.92#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:18.92#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:18.92#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:18.92#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:31:18.92#ibcon#first serial, iclass 12, count 0 2006.229.16:31:18.92#ibcon#enter sib2, iclass 12, count 0 2006.229.16:31:18.92#ibcon#flushed, iclass 12, count 0 2006.229.16:31:18.92#ibcon#about to write, iclass 12, count 0 2006.229.16:31:18.92#ibcon#wrote, iclass 12, count 0 2006.229.16:31:18.92#ibcon#about to read 3, iclass 12, count 0 2006.229.16:31:18.94#ibcon#read 3, iclass 12, count 0 2006.229.16:31:18.94#ibcon#about to read 4, iclass 12, count 0 2006.229.16:31:18.94#ibcon#read 4, iclass 12, count 0 2006.229.16:31:18.94#ibcon#about to read 5, iclass 12, count 0 2006.229.16:31:18.94#ibcon#read 5, iclass 12, count 0 2006.229.16:31:18.94#ibcon#about to read 6, iclass 12, count 0 2006.229.16:31:18.94#ibcon#read 6, iclass 12, count 0 2006.229.16:31:18.94#ibcon#end of sib2, iclass 12, count 0 2006.229.16:31:18.94#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:31:18.94#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:31:18.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:31:18.94#ibcon#*before write, iclass 12, count 0 2006.229.16:31:18.94#ibcon#enter sib2, iclass 12, count 0 2006.229.16:31:18.94#ibcon#flushed, iclass 12, count 0 2006.229.16:31:18.94#ibcon#about to write, iclass 12, count 0 2006.229.16:31:18.94#ibcon#wrote, iclass 12, count 0 2006.229.16:31:18.94#ibcon#about to read 3, iclass 12, count 0 2006.229.16:31:18.98#ibcon#read 3, iclass 12, count 0 2006.229.16:31:18.98#ibcon#about to read 4, iclass 12, count 0 2006.229.16:31:18.98#ibcon#read 4, iclass 12, count 0 2006.229.16:31:18.98#ibcon#about to read 5, iclass 12, count 0 2006.229.16:31:18.98#ibcon#read 5, iclass 12, count 0 2006.229.16:31:18.98#ibcon#about to read 6, iclass 12, count 0 2006.229.16:31:18.98#ibcon#read 6, iclass 12, count 0 2006.229.16:31:18.98#ibcon#end of sib2, iclass 12, count 0 2006.229.16:31:18.98#ibcon#*after write, iclass 12, count 0 2006.229.16:31:18.98#ibcon#*before return 0, iclass 12, count 0 2006.229.16:31:18.98#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:18.98#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:31:18.98#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:31:18.98#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:31:18.98$vck44/vb=7,4 2006.229.16:31:18.98#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.16:31:18.98#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.16:31:18.98#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:18.98#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:19.04#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:19.04#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:19.04#ibcon#enter wrdev, iclass 14, count 2 2006.229.16:31:19.04#ibcon#first serial, iclass 14, count 2 2006.229.16:31:19.04#ibcon#enter sib2, iclass 14, count 2 2006.229.16:31:19.04#ibcon#flushed, iclass 14, count 2 2006.229.16:31:19.04#ibcon#about to write, iclass 14, count 2 2006.229.16:31:19.04#ibcon#wrote, iclass 14, count 2 2006.229.16:31:19.04#ibcon#about to read 3, iclass 14, count 2 2006.229.16:31:19.06#ibcon#read 3, iclass 14, count 2 2006.229.16:31:19.06#ibcon#about to read 4, iclass 14, count 2 2006.229.16:31:19.06#ibcon#read 4, iclass 14, count 2 2006.229.16:31:19.06#ibcon#about to read 5, iclass 14, count 2 2006.229.16:31:19.06#ibcon#read 5, iclass 14, count 2 2006.229.16:31:19.06#ibcon#about to read 6, iclass 14, count 2 2006.229.16:31:19.06#ibcon#read 6, iclass 14, count 2 2006.229.16:31:19.06#ibcon#end of sib2, iclass 14, count 2 2006.229.16:31:19.06#ibcon#*mode == 0, iclass 14, count 2 2006.229.16:31:19.06#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.16:31:19.06#ibcon#[27=AT07-04\r\n] 2006.229.16:31:19.06#ibcon#*before write, iclass 14, count 2 2006.229.16:31:19.06#ibcon#enter sib2, iclass 14, count 2 2006.229.16:31:19.06#ibcon#flushed, iclass 14, count 2 2006.229.16:31:19.06#ibcon#about to write, iclass 14, count 2 2006.229.16:31:19.06#ibcon#wrote, iclass 14, count 2 2006.229.16:31:19.06#ibcon#about to read 3, iclass 14, count 2 2006.229.16:31:19.09#ibcon#read 3, iclass 14, count 2 2006.229.16:31:19.09#ibcon#about to read 4, iclass 14, count 2 2006.229.16:31:19.09#ibcon#read 4, iclass 14, count 2 2006.229.16:31:19.09#ibcon#about to read 5, iclass 14, count 2 2006.229.16:31:19.09#ibcon#read 5, iclass 14, count 2 2006.229.16:31:19.09#ibcon#about to read 6, iclass 14, count 2 2006.229.16:31:19.09#ibcon#read 6, iclass 14, count 2 2006.229.16:31:19.09#ibcon#end of sib2, iclass 14, count 2 2006.229.16:31:19.09#ibcon#*after write, iclass 14, count 2 2006.229.16:31:19.09#ibcon#*before return 0, iclass 14, count 2 2006.229.16:31:19.09#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:19.09#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:31:19.09#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.16:31:19.09#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:19.09#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:19.21#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:19.21#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:19.21#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:31:19.21#ibcon#first serial, iclass 14, count 0 2006.229.16:31:19.21#ibcon#enter sib2, iclass 14, count 0 2006.229.16:31:19.21#ibcon#flushed, iclass 14, count 0 2006.229.16:31:19.21#ibcon#about to write, iclass 14, count 0 2006.229.16:31:19.21#ibcon#wrote, iclass 14, count 0 2006.229.16:31:19.21#ibcon#about to read 3, iclass 14, count 0 2006.229.16:31:19.23#ibcon#read 3, iclass 14, count 0 2006.229.16:31:19.23#ibcon#about to read 4, iclass 14, count 0 2006.229.16:31:19.23#ibcon#read 4, iclass 14, count 0 2006.229.16:31:19.23#ibcon#about to read 5, iclass 14, count 0 2006.229.16:31:19.23#ibcon#read 5, iclass 14, count 0 2006.229.16:31:19.23#ibcon#about to read 6, iclass 14, count 0 2006.229.16:31:19.23#ibcon#read 6, iclass 14, count 0 2006.229.16:31:19.23#ibcon#end of sib2, iclass 14, count 0 2006.229.16:31:19.23#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:31:19.23#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:31:19.23#ibcon#[27=USB\r\n] 2006.229.16:31:19.23#ibcon#*before write, iclass 14, count 0 2006.229.16:31:19.23#ibcon#enter sib2, iclass 14, count 0 2006.229.16:31:19.23#ibcon#flushed, iclass 14, count 0 2006.229.16:31:19.23#ibcon#about to write, iclass 14, count 0 2006.229.16:31:19.23#ibcon#wrote, iclass 14, count 0 2006.229.16:31:19.23#ibcon#about to read 3, iclass 14, count 0 2006.229.16:31:19.26#ibcon#read 3, iclass 14, count 0 2006.229.16:31:19.26#ibcon#about to read 4, iclass 14, count 0 2006.229.16:31:19.26#ibcon#read 4, iclass 14, count 0 2006.229.16:31:19.26#ibcon#about to read 5, iclass 14, count 0 2006.229.16:31:19.26#ibcon#read 5, iclass 14, count 0 2006.229.16:31:19.26#ibcon#about to read 6, iclass 14, count 0 2006.229.16:31:19.26#ibcon#read 6, iclass 14, count 0 2006.229.16:31:19.26#ibcon#end of sib2, iclass 14, count 0 2006.229.16:31:19.26#ibcon#*after write, iclass 14, count 0 2006.229.16:31:19.26#ibcon#*before return 0, iclass 14, count 0 2006.229.16:31:19.26#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:19.26#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:31:19.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:31:19.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:31:19.26$vck44/vblo=8,744.99 2006.229.16:31:19.26#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:31:19.26#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:31:19.26#ibcon#ireg 17 cls_cnt 0 2006.229.16:31:19.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:19.26#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:19.26#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:19.26#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:31:19.26#ibcon#first serial, iclass 16, count 0 2006.229.16:31:19.26#ibcon#enter sib2, iclass 16, count 0 2006.229.16:31:19.26#ibcon#flushed, iclass 16, count 0 2006.229.16:31:19.26#ibcon#about to write, iclass 16, count 0 2006.229.16:31:19.26#ibcon#wrote, iclass 16, count 0 2006.229.16:31:19.26#ibcon#about to read 3, iclass 16, count 0 2006.229.16:31:19.28#ibcon#read 3, iclass 16, count 0 2006.229.16:31:19.28#ibcon#about to read 4, iclass 16, count 0 2006.229.16:31:19.28#ibcon#read 4, iclass 16, count 0 2006.229.16:31:19.28#ibcon#about to read 5, iclass 16, count 0 2006.229.16:31:19.28#ibcon#read 5, iclass 16, count 0 2006.229.16:31:19.28#ibcon#about to read 6, iclass 16, count 0 2006.229.16:31:19.28#ibcon#read 6, iclass 16, count 0 2006.229.16:31:19.28#ibcon#end of sib2, iclass 16, count 0 2006.229.16:31:19.28#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:31:19.28#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:31:19.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:31:19.28#ibcon#*before write, iclass 16, count 0 2006.229.16:31:19.28#ibcon#enter sib2, iclass 16, count 0 2006.229.16:31:19.28#ibcon#flushed, iclass 16, count 0 2006.229.16:31:19.28#ibcon#about to write, iclass 16, count 0 2006.229.16:31:19.28#ibcon#wrote, iclass 16, count 0 2006.229.16:31:19.28#ibcon#about to read 3, iclass 16, count 0 2006.229.16:31:19.32#ibcon#read 3, iclass 16, count 0 2006.229.16:31:19.32#ibcon#about to read 4, iclass 16, count 0 2006.229.16:31:19.32#ibcon#read 4, iclass 16, count 0 2006.229.16:31:19.32#ibcon#about to read 5, iclass 16, count 0 2006.229.16:31:19.32#ibcon#read 5, iclass 16, count 0 2006.229.16:31:19.32#ibcon#about to read 6, iclass 16, count 0 2006.229.16:31:19.32#ibcon#read 6, iclass 16, count 0 2006.229.16:31:19.32#ibcon#end of sib2, iclass 16, count 0 2006.229.16:31:19.32#ibcon#*after write, iclass 16, count 0 2006.229.16:31:19.32#ibcon#*before return 0, iclass 16, count 0 2006.229.16:31:19.32#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:19.32#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:31:19.32#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:31:19.32#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:31:19.32$vck44/vb=8,4 2006.229.16:31:19.32#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:31:19.32#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:31:19.32#ibcon#ireg 11 cls_cnt 2 2006.229.16:31:19.32#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:19.38#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:19.38#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:19.38#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:31:19.38#ibcon#first serial, iclass 18, count 2 2006.229.16:31:19.38#ibcon#enter sib2, iclass 18, count 2 2006.229.16:31:19.38#ibcon#flushed, iclass 18, count 2 2006.229.16:31:19.38#ibcon#about to write, iclass 18, count 2 2006.229.16:31:19.38#ibcon#wrote, iclass 18, count 2 2006.229.16:31:19.38#ibcon#about to read 3, iclass 18, count 2 2006.229.16:31:19.40#ibcon#read 3, iclass 18, count 2 2006.229.16:31:19.40#ibcon#about to read 4, iclass 18, count 2 2006.229.16:31:19.40#ibcon#read 4, iclass 18, count 2 2006.229.16:31:19.40#ibcon#about to read 5, iclass 18, count 2 2006.229.16:31:19.40#ibcon#read 5, iclass 18, count 2 2006.229.16:31:19.40#ibcon#about to read 6, iclass 18, count 2 2006.229.16:31:19.40#ibcon#read 6, iclass 18, count 2 2006.229.16:31:19.40#ibcon#end of sib2, iclass 18, count 2 2006.229.16:31:19.40#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:31:19.40#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:31:19.40#ibcon#[27=AT08-04\r\n] 2006.229.16:31:19.40#ibcon#*before write, iclass 18, count 2 2006.229.16:31:19.40#ibcon#enter sib2, iclass 18, count 2 2006.229.16:31:19.40#ibcon#flushed, iclass 18, count 2 2006.229.16:31:19.40#ibcon#about to write, iclass 18, count 2 2006.229.16:31:19.40#ibcon#wrote, iclass 18, count 2 2006.229.16:31:19.40#ibcon#about to read 3, iclass 18, count 2 2006.229.16:31:19.43#ibcon#read 3, iclass 18, count 2 2006.229.16:31:19.43#ibcon#about to read 4, iclass 18, count 2 2006.229.16:31:19.43#ibcon#read 4, iclass 18, count 2 2006.229.16:31:19.43#ibcon#about to read 5, iclass 18, count 2 2006.229.16:31:19.43#ibcon#read 5, iclass 18, count 2 2006.229.16:31:19.43#ibcon#about to read 6, iclass 18, count 2 2006.229.16:31:19.43#ibcon#read 6, iclass 18, count 2 2006.229.16:31:19.43#ibcon#end of sib2, iclass 18, count 2 2006.229.16:31:19.43#ibcon#*after write, iclass 18, count 2 2006.229.16:31:19.43#ibcon#*before return 0, iclass 18, count 2 2006.229.16:31:19.43#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:19.43#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:31:19.43#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:31:19.43#ibcon#ireg 7 cls_cnt 0 2006.229.16:31:19.43#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:19.55#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:19.55#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:19.55#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:31:19.55#ibcon#first serial, iclass 18, count 0 2006.229.16:31:19.55#ibcon#enter sib2, iclass 18, count 0 2006.229.16:31:19.55#ibcon#flushed, iclass 18, count 0 2006.229.16:31:19.55#ibcon#about to write, iclass 18, count 0 2006.229.16:31:19.55#ibcon#wrote, iclass 18, count 0 2006.229.16:31:19.55#ibcon#about to read 3, iclass 18, count 0 2006.229.16:31:19.57#ibcon#read 3, iclass 18, count 0 2006.229.16:31:19.57#ibcon#about to read 4, iclass 18, count 0 2006.229.16:31:19.57#ibcon#read 4, iclass 18, count 0 2006.229.16:31:19.57#ibcon#about to read 5, iclass 18, count 0 2006.229.16:31:19.57#ibcon#read 5, iclass 18, count 0 2006.229.16:31:19.57#ibcon#about to read 6, iclass 18, count 0 2006.229.16:31:19.57#ibcon#read 6, iclass 18, count 0 2006.229.16:31:19.57#ibcon#end of sib2, iclass 18, count 0 2006.229.16:31:19.57#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:31:19.57#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:31:19.57#ibcon#[27=USB\r\n] 2006.229.16:31:19.57#ibcon#*before write, iclass 18, count 0 2006.229.16:31:19.57#ibcon#enter sib2, iclass 18, count 0 2006.229.16:31:19.57#ibcon#flushed, iclass 18, count 0 2006.229.16:31:19.57#ibcon#about to write, iclass 18, count 0 2006.229.16:31:19.57#ibcon#wrote, iclass 18, count 0 2006.229.16:31:19.57#ibcon#about to read 3, iclass 18, count 0 2006.229.16:31:19.60#ibcon#read 3, iclass 18, count 0 2006.229.16:31:19.60#ibcon#about to read 4, iclass 18, count 0 2006.229.16:31:19.60#ibcon#read 4, iclass 18, count 0 2006.229.16:31:19.60#ibcon#about to read 5, iclass 18, count 0 2006.229.16:31:19.60#ibcon#read 5, iclass 18, count 0 2006.229.16:31:19.60#ibcon#about to read 6, iclass 18, count 0 2006.229.16:31:19.60#ibcon#read 6, iclass 18, count 0 2006.229.16:31:19.60#ibcon#end of sib2, iclass 18, count 0 2006.229.16:31:19.60#ibcon#*after write, iclass 18, count 0 2006.229.16:31:19.60#ibcon#*before return 0, iclass 18, count 0 2006.229.16:31:19.60#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:19.60#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:31:19.60#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:31:19.60#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:31:19.60$vck44/vabw=wide 2006.229.16:31:19.60#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.16:31:19.60#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.16:31:19.60#ibcon#ireg 8 cls_cnt 0 2006.229.16:31:19.60#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:19.60#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:19.60#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:19.60#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:31:19.60#ibcon#first serial, iclass 20, count 0 2006.229.16:31:19.60#ibcon#enter sib2, iclass 20, count 0 2006.229.16:31:19.60#ibcon#flushed, iclass 20, count 0 2006.229.16:31:19.60#ibcon#about to write, iclass 20, count 0 2006.229.16:31:19.60#ibcon#wrote, iclass 20, count 0 2006.229.16:31:19.60#ibcon#about to read 3, iclass 20, count 0 2006.229.16:31:19.62#ibcon#read 3, iclass 20, count 0 2006.229.16:31:19.62#ibcon#about to read 4, iclass 20, count 0 2006.229.16:31:19.62#ibcon#read 4, iclass 20, count 0 2006.229.16:31:19.62#ibcon#about to read 5, iclass 20, count 0 2006.229.16:31:19.62#ibcon#read 5, iclass 20, count 0 2006.229.16:31:19.62#ibcon#about to read 6, iclass 20, count 0 2006.229.16:31:19.62#ibcon#read 6, iclass 20, count 0 2006.229.16:31:19.62#ibcon#end of sib2, iclass 20, count 0 2006.229.16:31:19.62#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:31:19.62#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:31:19.62#ibcon#[25=BW32\r\n] 2006.229.16:31:19.62#ibcon#*before write, iclass 20, count 0 2006.229.16:31:19.62#ibcon#enter sib2, iclass 20, count 0 2006.229.16:31:19.62#ibcon#flushed, iclass 20, count 0 2006.229.16:31:19.62#ibcon#about to write, iclass 20, count 0 2006.229.16:31:19.62#ibcon#wrote, iclass 20, count 0 2006.229.16:31:19.62#ibcon#about to read 3, iclass 20, count 0 2006.229.16:31:19.65#ibcon#read 3, iclass 20, count 0 2006.229.16:31:19.65#ibcon#about to read 4, iclass 20, count 0 2006.229.16:31:19.65#ibcon#read 4, iclass 20, count 0 2006.229.16:31:19.65#ibcon#about to read 5, iclass 20, count 0 2006.229.16:31:19.65#ibcon#read 5, iclass 20, count 0 2006.229.16:31:19.65#ibcon#about to read 6, iclass 20, count 0 2006.229.16:31:19.65#ibcon#read 6, iclass 20, count 0 2006.229.16:31:19.65#ibcon#end of sib2, iclass 20, count 0 2006.229.16:31:19.65#ibcon#*after write, iclass 20, count 0 2006.229.16:31:19.65#ibcon#*before return 0, iclass 20, count 0 2006.229.16:31:19.65#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:19.65#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:31:19.65#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:31:19.65#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:31:19.65$vck44/vbbw=wide 2006.229.16:31:19.65#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.16:31:19.65#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.16:31:19.65#ibcon#ireg 8 cls_cnt 0 2006.229.16:31:19.65#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:31:19.72#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:31:19.72#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:31:19.72#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:31:19.72#ibcon#first serial, iclass 22, count 0 2006.229.16:31:19.72#ibcon#enter sib2, iclass 22, count 0 2006.229.16:31:19.72#ibcon#flushed, iclass 22, count 0 2006.229.16:31:19.72#ibcon#about to write, iclass 22, count 0 2006.229.16:31:19.72#ibcon#wrote, iclass 22, count 0 2006.229.16:31:19.72#ibcon#about to read 3, iclass 22, count 0 2006.229.16:31:19.74#ibcon#read 3, iclass 22, count 0 2006.229.16:31:19.74#ibcon#about to read 4, iclass 22, count 0 2006.229.16:31:19.74#ibcon#read 4, iclass 22, count 0 2006.229.16:31:19.74#ibcon#about to read 5, iclass 22, count 0 2006.229.16:31:19.74#ibcon#read 5, iclass 22, count 0 2006.229.16:31:19.74#ibcon#about to read 6, iclass 22, count 0 2006.229.16:31:19.74#ibcon#read 6, iclass 22, count 0 2006.229.16:31:19.74#ibcon#end of sib2, iclass 22, count 0 2006.229.16:31:19.74#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:31:19.74#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:31:19.74#ibcon#[27=BW32\r\n] 2006.229.16:31:19.74#ibcon#*before write, iclass 22, count 0 2006.229.16:31:19.74#ibcon#enter sib2, iclass 22, count 0 2006.229.16:31:19.74#ibcon#flushed, iclass 22, count 0 2006.229.16:31:19.74#ibcon#about to write, iclass 22, count 0 2006.229.16:31:19.74#ibcon#wrote, iclass 22, count 0 2006.229.16:31:19.74#ibcon#about to read 3, iclass 22, count 0 2006.229.16:31:19.77#ibcon#read 3, iclass 22, count 0 2006.229.16:31:19.77#ibcon#about to read 4, iclass 22, count 0 2006.229.16:31:19.77#ibcon#read 4, iclass 22, count 0 2006.229.16:31:19.77#ibcon#about to read 5, iclass 22, count 0 2006.229.16:31:19.77#ibcon#read 5, iclass 22, count 0 2006.229.16:31:19.77#ibcon#about to read 6, iclass 22, count 0 2006.229.16:31:19.77#ibcon#read 6, iclass 22, count 0 2006.229.16:31:19.77#ibcon#end of sib2, iclass 22, count 0 2006.229.16:31:19.77#ibcon#*after write, iclass 22, count 0 2006.229.16:31:19.77#ibcon#*before return 0, iclass 22, count 0 2006.229.16:31:19.77#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:31:19.77#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:31:19.77#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:31:19.77#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:31:19.77$setupk4/ifdk4 2006.229.16:31:19.77$ifdk4/lo= 2006.229.16:31:19.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:31:19.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:31:19.77$ifdk4/patch= 2006.229.16:31:19.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:31:19.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:31:19.77$setupk4/!*+20s 2006.229.16:31:25.14#abcon#<5=/05 1.3 2.1 27.161001001.7\r\n> 2006.229.16:31:25.16#abcon#{5=INTERFACE CLEAR} 2006.229.16:31:25.22#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:31:34.14#trakl#Source acquired 2006.229.16:31:34.14#flagr#flagr/antenna,acquired 2006.229.16:31:34.27$setupk4/"tpicd 2006.229.16:31:34.27$setupk4/echo=off 2006.229.16:31:34.27$setupk4/xlog=off 2006.229.16:31:34.27:!2006.229.16:33:30 2006.229.16:33:30.02:preob 2006.229.16:33:31.13/onsource/TRACKING 2006.229.16:33:31.13:!2006.229.16:33:40 2006.229.16:33:40.02:"tape 2006.229.16:33:40.02:"st=record 2006.229.16:33:40.02:data_valid=on 2006.229.16:33:40.02:midob 2006.229.16:33:41.13/onsource/TRACKING 2006.229.16:33:41.13/wx/27.15,1001.8,100 2006.229.16:33:41.25/cable/+6.4137E-03 2006.229.16:33:42.34/va/01,08,usb,yes,32,34 2006.229.16:33:42.34/va/02,07,usb,yes,35,35 2006.229.16:33:42.34/va/03,06,usb,yes,43,45 2006.229.16:33:42.34/va/04,07,usb,yes,36,37 2006.229.16:33:42.34/va/05,04,usb,yes,32,32 2006.229.16:33:42.34/va/06,04,usb,yes,36,35 2006.229.16:33:42.34/va/07,05,usb,yes,32,32 2006.229.16:33:42.34/va/08,06,usb,yes,23,28 2006.229.16:33:42.57/valo/01,524.99,yes,locked 2006.229.16:33:42.57/valo/02,534.99,yes,locked 2006.229.16:33:42.57/valo/03,564.99,yes,locked 2006.229.16:33:42.57/valo/04,624.99,yes,locked 2006.229.16:33:42.57/valo/05,734.99,yes,locked 2006.229.16:33:42.57/valo/06,814.99,yes,locked 2006.229.16:33:42.57/valo/07,864.99,yes,locked 2006.229.16:33:42.57/valo/08,884.99,yes,locked 2006.229.16:33:43.66/vb/01,04,usb,yes,32,30 2006.229.16:33:43.66/vb/02,04,usb,yes,35,35 2006.229.16:33:43.66/vb/03,04,usb,yes,32,35 2006.229.16:33:43.66/vb/04,04,usb,yes,36,35 2006.229.16:33:43.66/vb/05,04,usb,yes,28,31 2006.229.16:33:43.66/vb/06,04,usb,yes,33,29 2006.229.16:33:43.66/vb/07,04,usb,yes,33,33 2006.229.16:33:43.66/vb/08,04,usb,yes,30,34 2006.229.16:33:43.90/vblo/01,629.99,yes,locked 2006.229.16:33:43.90/vblo/02,634.99,yes,locked 2006.229.16:33:43.90/vblo/03,649.99,yes,locked 2006.229.16:33:43.90/vblo/04,679.99,yes,locked 2006.229.16:33:43.90/vblo/05,709.99,yes,locked 2006.229.16:33:43.90/vblo/06,719.99,yes,locked 2006.229.16:33:43.90/vblo/07,734.99,yes,locked 2006.229.16:33:43.90/vblo/08,744.99,yes,locked 2006.229.16:33:44.05/vabw/8 2006.229.16:33:44.20/vbbw/8 2006.229.16:33:44.37/xfe/off,on,12.0 2006.229.16:33:44.76/ifatt/23,28,28,28 2006.229.16:33:45.08/fmout-gps/S +4.52E-07 2006.229.16:33:45.12:!2006.229.16:34:40 2006.229.16:34:40.02:data_valid=off 2006.229.16:34:40.02:"et 2006.229.16:34:40.02:!+3s 2006.229.16:34:43.05:"tape 2006.229.16:34:43.06:postob 2006.229.16:34:43.14/cable/+6.4138E-03 2006.229.16:34:43.14/wx/27.15,1001.8,100 2006.229.16:34:43.19/fmout-gps/S +4.54E-07 2006.229.16:34:43.20:scan_name=229-1635,jd0608,680 2006.229.16:34:43.20:source=0804+499,080839.67,495036.5,2000.0,cw 2006.229.16:34:44.13#flagr#flagr/antenna,new-source 2006.229.16:34:44.13:checkk5 2006.229.16:34:44.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:34:44.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:34:45.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:34:45.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:34:46.11/chk_obsdata//k5ts1/T2291633??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.16:34:46.52/chk_obsdata//k5ts2/T2291633??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.16:34:46.92/chk_obsdata//k5ts3/T2291633??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.16:34:47.32/chk_obsdata//k5ts4/T2291633??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.229.16:34:48.05/k5log//k5ts1_log_newline 2006.229.16:34:48.76/k5log//k5ts2_log_newline 2006.229.16:34:49.48/k5log//k5ts3_log_newline 2006.229.16:34:50.17/k5log//k5ts4_log_newline 2006.229.16:34:50.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:34:50.20:setupk4=1 2006.229.16:34:50.20$setupk4/echo=on 2006.229.16:34:50.20$setupk4/pcalon 2006.229.16:34:50.20$pcalon/"no phase cal control is implemented here 2006.229.16:34:50.20$setupk4/"tpicd=stop 2006.229.16:34:50.20$setupk4/"rec=synch_on 2006.229.16:34:50.20$setupk4/"rec_mode=128 2006.229.16:34:50.20$setupk4/!* 2006.229.16:34:50.20$setupk4/recpk4 2006.229.16:34:50.20$recpk4/recpatch= 2006.229.16:34:50.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:34:50.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:34:50.20$setupk4/vck44 2006.229.16:34:50.20$vck44/valo=1,524.99 2006.229.16:34:50.20#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.16:34:50.20#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.16:34:50.20#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:50.20#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:50.20#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:50.20#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:50.20#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:34:50.20#ibcon#first serial, iclass 39, count 0 2006.229.16:34:50.20#ibcon#enter sib2, iclass 39, count 0 2006.229.16:34:50.20#ibcon#flushed, iclass 39, count 0 2006.229.16:34:50.20#ibcon#about to write, iclass 39, count 0 2006.229.16:34:50.20#ibcon#wrote, iclass 39, count 0 2006.229.16:34:50.20#ibcon#about to read 3, iclass 39, count 0 2006.229.16:34:50.21#ibcon#read 3, iclass 39, count 0 2006.229.16:34:50.21#ibcon#about to read 4, iclass 39, count 0 2006.229.16:34:50.21#ibcon#read 4, iclass 39, count 0 2006.229.16:34:50.21#ibcon#about to read 5, iclass 39, count 0 2006.229.16:34:50.21#ibcon#read 5, iclass 39, count 0 2006.229.16:34:50.21#ibcon#about to read 6, iclass 39, count 0 2006.229.16:34:50.21#ibcon#read 6, iclass 39, count 0 2006.229.16:34:50.21#ibcon#end of sib2, iclass 39, count 0 2006.229.16:34:50.21#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:34:50.21#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:34:50.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:34:50.21#ibcon#*before write, iclass 39, count 0 2006.229.16:34:50.21#ibcon#enter sib2, iclass 39, count 0 2006.229.16:34:50.21#ibcon#flushed, iclass 39, count 0 2006.229.16:34:50.21#ibcon#about to write, iclass 39, count 0 2006.229.16:34:50.21#ibcon#wrote, iclass 39, count 0 2006.229.16:34:50.22#ibcon#about to read 3, iclass 39, count 0 2006.229.16:34:50.26#ibcon#read 3, iclass 39, count 0 2006.229.16:34:50.26#ibcon#about to read 4, iclass 39, count 0 2006.229.16:34:50.26#ibcon#read 4, iclass 39, count 0 2006.229.16:34:50.26#ibcon#about to read 5, iclass 39, count 0 2006.229.16:34:50.26#ibcon#read 5, iclass 39, count 0 2006.229.16:34:50.26#ibcon#about to read 6, iclass 39, count 0 2006.229.16:34:50.26#ibcon#read 6, iclass 39, count 0 2006.229.16:34:50.26#ibcon#end of sib2, iclass 39, count 0 2006.229.16:34:50.26#ibcon#*after write, iclass 39, count 0 2006.229.16:34:50.26#ibcon#*before return 0, iclass 39, count 0 2006.229.16:34:50.26#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:50.26#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:50.26#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:34:50.26#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:34:50.27$vck44/va=1,8 2006.229.16:34:50.27#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.16:34:50.27#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.16:34:50.27#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:50.27#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:50.27#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:50.27#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:50.27#ibcon#enter wrdev, iclass 3, count 2 2006.229.16:34:50.27#ibcon#first serial, iclass 3, count 2 2006.229.16:34:50.27#ibcon#enter sib2, iclass 3, count 2 2006.229.16:34:50.27#ibcon#flushed, iclass 3, count 2 2006.229.16:34:50.27#ibcon#about to write, iclass 3, count 2 2006.229.16:34:50.27#ibcon#wrote, iclass 3, count 2 2006.229.16:34:50.27#ibcon#about to read 3, iclass 3, count 2 2006.229.16:34:50.28#ibcon#read 3, iclass 3, count 2 2006.229.16:34:50.28#ibcon#about to read 4, iclass 3, count 2 2006.229.16:34:50.28#ibcon#read 4, iclass 3, count 2 2006.229.16:34:50.28#ibcon#about to read 5, iclass 3, count 2 2006.229.16:34:50.28#ibcon#read 5, iclass 3, count 2 2006.229.16:34:50.28#ibcon#about to read 6, iclass 3, count 2 2006.229.16:34:50.28#ibcon#read 6, iclass 3, count 2 2006.229.16:34:50.28#ibcon#end of sib2, iclass 3, count 2 2006.229.16:34:50.28#ibcon#*mode == 0, iclass 3, count 2 2006.229.16:34:50.28#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.16:34:50.28#ibcon#[25=AT01-08\r\n] 2006.229.16:34:50.28#ibcon#*before write, iclass 3, count 2 2006.229.16:34:50.28#ibcon#enter sib2, iclass 3, count 2 2006.229.16:34:50.28#ibcon#flushed, iclass 3, count 2 2006.229.16:34:50.28#ibcon#about to write, iclass 3, count 2 2006.229.16:34:50.28#ibcon#wrote, iclass 3, count 2 2006.229.16:34:50.28#ibcon#about to read 3, iclass 3, count 2 2006.229.16:34:50.31#ibcon#read 3, iclass 3, count 2 2006.229.16:34:50.31#ibcon#about to read 4, iclass 3, count 2 2006.229.16:34:50.31#ibcon#read 4, iclass 3, count 2 2006.229.16:34:50.31#ibcon#about to read 5, iclass 3, count 2 2006.229.16:34:50.31#ibcon#read 5, iclass 3, count 2 2006.229.16:34:50.31#ibcon#about to read 6, iclass 3, count 2 2006.229.16:34:50.31#ibcon#read 6, iclass 3, count 2 2006.229.16:34:50.31#ibcon#end of sib2, iclass 3, count 2 2006.229.16:34:50.31#ibcon#*after write, iclass 3, count 2 2006.229.16:34:50.31#ibcon#*before return 0, iclass 3, count 2 2006.229.16:34:50.31#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:50.31#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:50.31#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.16:34:50.31#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:50.32#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:50.43#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:50.43#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:50.43#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:34:50.43#ibcon#first serial, iclass 3, count 0 2006.229.16:34:50.43#ibcon#enter sib2, iclass 3, count 0 2006.229.16:34:50.43#ibcon#flushed, iclass 3, count 0 2006.229.16:34:50.43#ibcon#about to write, iclass 3, count 0 2006.229.16:34:50.43#ibcon#wrote, iclass 3, count 0 2006.229.16:34:50.43#ibcon#about to read 3, iclass 3, count 0 2006.229.16:34:50.45#ibcon#read 3, iclass 3, count 0 2006.229.16:34:50.45#ibcon#about to read 4, iclass 3, count 0 2006.229.16:34:50.45#ibcon#read 4, iclass 3, count 0 2006.229.16:34:50.45#ibcon#about to read 5, iclass 3, count 0 2006.229.16:34:50.45#ibcon#read 5, iclass 3, count 0 2006.229.16:34:50.45#ibcon#about to read 6, iclass 3, count 0 2006.229.16:34:50.45#ibcon#read 6, iclass 3, count 0 2006.229.16:34:50.45#ibcon#end of sib2, iclass 3, count 0 2006.229.16:34:50.45#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:34:50.45#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:34:50.45#ibcon#[25=USB\r\n] 2006.229.16:34:50.45#ibcon#*before write, iclass 3, count 0 2006.229.16:34:50.45#ibcon#enter sib2, iclass 3, count 0 2006.229.16:34:50.45#ibcon#flushed, iclass 3, count 0 2006.229.16:34:50.45#ibcon#about to write, iclass 3, count 0 2006.229.16:34:50.45#ibcon#wrote, iclass 3, count 0 2006.229.16:34:50.45#ibcon#about to read 3, iclass 3, count 0 2006.229.16:34:50.48#ibcon#read 3, iclass 3, count 0 2006.229.16:34:50.48#ibcon#about to read 4, iclass 3, count 0 2006.229.16:34:50.48#ibcon#read 4, iclass 3, count 0 2006.229.16:34:50.48#ibcon#about to read 5, iclass 3, count 0 2006.229.16:34:50.48#ibcon#read 5, iclass 3, count 0 2006.229.16:34:50.48#ibcon#about to read 6, iclass 3, count 0 2006.229.16:34:50.48#ibcon#read 6, iclass 3, count 0 2006.229.16:34:50.48#ibcon#end of sib2, iclass 3, count 0 2006.229.16:34:50.48#ibcon#*after write, iclass 3, count 0 2006.229.16:34:50.48#ibcon#*before return 0, iclass 3, count 0 2006.229.16:34:50.48#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:50.48#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:50.48#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:34:50.48#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:34:50.49$vck44/valo=2,534.99 2006.229.16:34:50.49#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.16:34:50.49#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.16:34:50.49#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:50.49#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:50.49#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:50.49#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:50.49#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:34:50.49#ibcon#first serial, iclass 5, count 0 2006.229.16:34:50.49#ibcon#enter sib2, iclass 5, count 0 2006.229.16:34:50.49#ibcon#flushed, iclass 5, count 0 2006.229.16:34:50.49#ibcon#about to write, iclass 5, count 0 2006.229.16:34:50.49#ibcon#wrote, iclass 5, count 0 2006.229.16:34:50.49#ibcon#about to read 3, iclass 5, count 0 2006.229.16:34:50.50#ibcon#read 3, iclass 5, count 0 2006.229.16:34:50.50#ibcon#about to read 4, iclass 5, count 0 2006.229.16:34:50.50#ibcon#read 4, iclass 5, count 0 2006.229.16:34:50.50#ibcon#about to read 5, iclass 5, count 0 2006.229.16:34:50.50#ibcon#read 5, iclass 5, count 0 2006.229.16:34:50.50#ibcon#about to read 6, iclass 5, count 0 2006.229.16:34:50.50#ibcon#read 6, iclass 5, count 0 2006.229.16:34:50.50#ibcon#end of sib2, iclass 5, count 0 2006.229.16:34:50.50#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:34:50.50#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:34:50.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:34:50.50#ibcon#*before write, iclass 5, count 0 2006.229.16:34:50.50#ibcon#enter sib2, iclass 5, count 0 2006.229.16:34:50.50#ibcon#flushed, iclass 5, count 0 2006.229.16:34:50.50#ibcon#about to write, iclass 5, count 0 2006.229.16:34:50.50#ibcon#wrote, iclass 5, count 0 2006.229.16:34:50.50#ibcon#about to read 3, iclass 5, count 0 2006.229.16:34:50.54#ibcon#read 3, iclass 5, count 0 2006.229.16:34:50.54#ibcon#about to read 4, iclass 5, count 0 2006.229.16:34:50.54#ibcon#read 4, iclass 5, count 0 2006.229.16:34:50.54#ibcon#about to read 5, iclass 5, count 0 2006.229.16:34:50.54#ibcon#read 5, iclass 5, count 0 2006.229.16:34:50.54#ibcon#about to read 6, iclass 5, count 0 2006.229.16:34:50.54#ibcon#read 6, iclass 5, count 0 2006.229.16:34:50.54#ibcon#end of sib2, iclass 5, count 0 2006.229.16:34:50.54#ibcon#*after write, iclass 5, count 0 2006.229.16:34:50.54#ibcon#*before return 0, iclass 5, count 0 2006.229.16:34:50.54#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:50.54#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:50.54#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:34:50.54#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:34:50.55$vck44/va=2,7 2006.229.16:34:50.55#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.16:34:50.55#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.16:34:50.55#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:50.55#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:50.59#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:50.59#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:50.59#ibcon#enter wrdev, iclass 7, count 2 2006.229.16:34:50.59#ibcon#first serial, iclass 7, count 2 2006.229.16:34:50.59#ibcon#enter sib2, iclass 7, count 2 2006.229.16:34:50.59#ibcon#flushed, iclass 7, count 2 2006.229.16:34:50.59#ibcon#about to write, iclass 7, count 2 2006.229.16:34:50.59#ibcon#wrote, iclass 7, count 2 2006.229.16:34:50.59#ibcon#about to read 3, iclass 7, count 2 2006.229.16:34:50.61#ibcon#read 3, iclass 7, count 2 2006.229.16:34:50.61#ibcon#about to read 4, iclass 7, count 2 2006.229.16:34:50.61#ibcon#read 4, iclass 7, count 2 2006.229.16:34:50.61#ibcon#about to read 5, iclass 7, count 2 2006.229.16:34:50.61#ibcon#read 5, iclass 7, count 2 2006.229.16:34:50.61#ibcon#about to read 6, iclass 7, count 2 2006.229.16:34:50.61#ibcon#read 6, iclass 7, count 2 2006.229.16:34:50.61#ibcon#end of sib2, iclass 7, count 2 2006.229.16:34:50.61#ibcon#*mode == 0, iclass 7, count 2 2006.229.16:34:50.61#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.16:34:50.61#ibcon#[25=AT02-07\r\n] 2006.229.16:34:50.61#ibcon#*before write, iclass 7, count 2 2006.229.16:34:50.61#ibcon#enter sib2, iclass 7, count 2 2006.229.16:34:50.61#ibcon#flushed, iclass 7, count 2 2006.229.16:34:50.61#ibcon#about to write, iclass 7, count 2 2006.229.16:34:50.61#ibcon#wrote, iclass 7, count 2 2006.229.16:34:50.61#ibcon#about to read 3, iclass 7, count 2 2006.229.16:34:50.64#ibcon#read 3, iclass 7, count 2 2006.229.16:34:50.64#ibcon#about to read 4, iclass 7, count 2 2006.229.16:34:50.64#ibcon#read 4, iclass 7, count 2 2006.229.16:34:50.64#ibcon#about to read 5, iclass 7, count 2 2006.229.16:34:50.64#ibcon#read 5, iclass 7, count 2 2006.229.16:34:50.64#ibcon#about to read 6, iclass 7, count 2 2006.229.16:34:50.64#ibcon#read 6, iclass 7, count 2 2006.229.16:34:50.64#ibcon#end of sib2, iclass 7, count 2 2006.229.16:34:50.64#ibcon#*after write, iclass 7, count 2 2006.229.16:34:50.64#ibcon#*before return 0, iclass 7, count 2 2006.229.16:34:50.64#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:50.64#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:50.64#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.16:34:50.64#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:50.64#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:50.76#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:50.76#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:50.76#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:34:50.76#ibcon#first serial, iclass 7, count 0 2006.229.16:34:50.76#ibcon#enter sib2, iclass 7, count 0 2006.229.16:34:50.76#ibcon#flushed, iclass 7, count 0 2006.229.16:34:50.76#ibcon#about to write, iclass 7, count 0 2006.229.16:34:50.76#ibcon#wrote, iclass 7, count 0 2006.229.16:34:50.76#ibcon#about to read 3, iclass 7, count 0 2006.229.16:34:50.78#ibcon#read 3, iclass 7, count 0 2006.229.16:34:50.78#ibcon#about to read 4, iclass 7, count 0 2006.229.16:34:50.78#ibcon#read 4, iclass 7, count 0 2006.229.16:34:50.78#ibcon#about to read 5, iclass 7, count 0 2006.229.16:34:50.78#ibcon#read 5, iclass 7, count 0 2006.229.16:34:50.78#ibcon#about to read 6, iclass 7, count 0 2006.229.16:34:50.78#ibcon#read 6, iclass 7, count 0 2006.229.16:34:50.78#ibcon#end of sib2, iclass 7, count 0 2006.229.16:34:50.78#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:34:50.78#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:34:50.78#ibcon#[25=USB\r\n] 2006.229.16:34:50.78#ibcon#*before write, iclass 7, count 0 2006.229.16:34:50.78#ibcon#enter sib2, iclass 7, count 0 2006.229.16:34:50.78#ibcon#flushed, iclass 7, count 0 2006.229.16:34:50.78#ibcon#about to write, iclass 7, count 0 2006.229.16:34:50.78#ibcon#wrote, iclass 7, count 0 2006.229.16:34:50.78#ibcon#about to read 3, iclass 7, count 0 2006.229.16:34:50.81#ibcon#read 3, iclass 7, count 0 2006.229.16:34:50.81#ibcon#about to read 4, iclass 7, count 0 2006.229.16:34:50.81#ibcon#read 4, iclass 7, count 0 2006.229.16:34:50.81#ibcon#about to read 5, iclass 7, count 0 2006.229.16:34:50.81#ibcon#read 5, iclass 7, count 0 2006.229.16:34:50.81#ibcon#about to read 6, iclass 7, count 0 2006.229.16:34:50.81#ibcon#read 6, iclass 7, count 0 2006.229.16:34:50.81#ibcon#end of sib2, iclass 7, count 0 2006.229.16:34:50.81#ibcon#*after write, iclass 7, count 0 2006.229.16:34:50.81#ibcon#*before return 0, iclass 7, count 0 2006.229.16:34:50.81#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:50.81#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:50.81#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:34:50.81#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:34:50.82$vck44/valo=3,564.99 2006.229.16:34:50.82#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.16:34:50.82#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.16:34:50.82#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:50.82#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:50.82#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:50.82#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:50.82#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:34:50.82#ibcon#first serial, iclass 11, count 0 2006.229.16:34:50.82#ibcon#enter sib2, iclass 11, count 0 2006.229.16:34:50.82#ibcon#flushed, iclass 11, count 0 2006.229.16:34:50.82#ibcon#about to write, iclass 11, count 0 2006.229.16:34:50.82#ibcon#wrote, iclass 11, count 0 2006.229.16:34:50.82#ibcon#about to read 3, iclass 11, count 0 2006.229.16:34:50.83#ibcon#read 3, iclass 11, count 0 2006.229.16:34:50.83#ibcon#about to read 4, iclass 11, count 0 2006.229.16:34:50.83#ibcon#read 4, iclass 11, count 0 2006.229.16:34:50.83#ibcon#about to read 5, iclass 11, count 0 2006.229.16:34:50.83#ibcon#read 5, iclass 11, count 0 2006.229.16:34:50.83#ibcon#about to read 6, iclass 11, count 0 2006.229.16:34:50.83#ibcon#read 6, iclass 11, count 0 2006.229.16:34:50.83#ibcon#end of sib2, iclass 11, count 0 2006.229.16:34:50.83#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:34:50.83#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:34:50.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:34:50.83#ibcon#*before write, iclass 11, count 0 2006.229.16:34:50.83#ibcon#enter sib2, iclass 11, count 0 2006.229.16:34:50.83#ibcon#flushed, iclass 11, count 0 2006.229.16:34:50.83#ibcon#about to write, iclass 11, count 0 2006.229.16:34:50.83#ibcon#wrote, iclass 11, count 0 2006.229.16:34:50.83#ibcon#about to read 3, iclass 11, count 0 2006.229.16:34:50.87#ibcon#read 3, iclass 11, count 0 2006.229.16:34:50.87#ibcon#about to read 4, iclass 11, count 0 2006.229.16:34:50.87#ibcon#read 4, iclass 11, count 0 2006.229.16:34:50.87#ibcon#about to read 5, iclass 11, count 0 2006.229.16:34:50.87#ibcon#read 5, iclass 11, count 0 2006.229.16:34:50.87#ibcon#about to read 6, iclass 11, count 0 2006.229.16:34:50.87#ibcon#read 6, iclass 11, count 0 2006.229.16:34:50.87#ibcon#end of sib2, iclass 11, count 0 2006.229.16:34:50.87#ibcon#*after write, iclass 11, count 0 2006.229.16:34:50.87#ibcon#*before return 0, iclass 11, count 0 2006.229.16:34:50.87#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:50.87#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:50.87#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:34:50.87#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:34:50.88$vck44/va=3,6 2006.229.16:34:50.88#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.16:34:50.88#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.16:34:50.88#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:50.88#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:50.92#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:50.92#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:50.92#ibcon#enter wrdev, iclass 13, count 2 2006.229.16:34:50.92#ibcon#first serial, iclass 13, count 2 2006.229.16:34:50.92#ibcon#enter sib2, iclass 13, count 2 2006.229.16:34:50.92#ibcon#flushed, iclass 13, count 2 2006.229.16:34:50.92#ibcon#about to write, iclass 13, count 2 2006.229.16:34:50.92#ibcon#wrote, iclass 13, count 2 2006.229.16:34:50.92#ibcon#about to read 3, iclass 13, count 2 2006.229.16:34:50.94#ibcon#read 3, iclass 13, count 2 2006.229.16:34:50.94#ibcon#about to read 4, iclass 13, count 2 2006.229.16:34:50.94#ibcon#read 4, iclass 13, count 2 2006.229.16:34:50.94#ibcon#about to read 5, iclass 13, count 2 2006.229.16:34:50.94#ibcon#read 5, iclass 13, count 2 2006.229.16:34:50.94#ibcon#about to read 6, iclass 13, count 2 2006.229.16:34:50.94#ibcon#read 6, iclass 13, count 2 2006.229.16:34:50.94#ibcon#end of sib2, iclass 13, count 2 2006.229.16:34:50.94#ibcon#*mode == 0, iclass 13, count 2 2006.229.16:34:50.94#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.16:34:50.94#ibcon#[25=AT03-06\r\n] 2006.229.16:34:50.94#ibcon#*before write, iclass 13, count 2 2006.229.16:34:50.94#ibcon#enter sib2, iclass 13, count 2 2006.229.16:34:50.94#ibcon#flushed, iclass 13, count 2 2006.229.16:34:50.94#ibcon#about to write, iclass 13, count 2 2006.229.16:34:50.94#ibcon#wrote, iclass 13, count 2 2006.229.16:34:50.94#ibcon#about to read 3, iclass 13, count 2 2006.229.16:34:50.97#ibcon#read 3, iclass 13, count 2 2006.229.16:34:50.97#ibcon#about to read 4, iclass 13, count 2 2006.229.16:34:50.97#ibcon#read 4, iclass 13, count 2 2006.229.16:34:50.97#ibcon#about to read 5, iclass 13, count 2 2006.229.16:34:50.97#ibcon#read 5, iclass 13, count 2 2006.229.16:34:50.97#ibcon#about to read 6, iclass 13, count 2 2006.229.16:34:50.97#ibcon#read 6, iclass 13, count 2 2006.229.16:34:50.97#ibcon#end of sib2, iclass 13, count 2 2006.229.16:34:50.97#ibcon#*after write, iclass 13, count 2 2006.229.16:34:50.97#ibcon#*before return 0, iclass 13, count 2 2006.229.16:34:50.97#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:50.97#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:50.97#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.16:34:50.97#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:50.97#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:51.09#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:51.09#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:51.09#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:34:51.09#ibcon#first serial, iclass 13, count 0 2006.229.16:34:51.09#ibcon#enter sib2, iclass 13, count 0 2006.229.16:34:51.09#ibcon#flushed, iclass 13, count 0 2006.229.16:34:51.09#ibcon#about to write, iclass 13, count 0 2006.229.16:34:51.09#ibcon#wrote, iclass 13, count 0 2006.229.16:34:51.09#ibcon#about to read 3, iclass 13, count 0 2006.229.16:34:51.11#ibcon#read 3, iclass 13, count 0 2006.229.16:34:51.11#ibcon#about to read 4, iclass 13, count 0 2006.229.16:34:51.11#ibcon#read 4, iclass 13, count 0 2006.229.16:34:51.11#ibcon#about to read 5, iclass 13, count 0 2006.229.16:34:51.11#ibcon#read 5, iclass 13, count 0 2006.229.16:34:51.11#ibcon#about to read 6, iclass 13, count 0 2006.229.16:34:51.11#ibcon#read 6, iclass 13, count 0 2006.229.16:34:51.11#ibcon#end of sib2, iclass 13, count 0 2006.229.16:34:51.11#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:34:51.11#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:34:51.11#ibcon#[25=USB\r\n] 2006.229.16:34:51.11#ibcon#*before write, iclass 13, count 0 2006.229.16:34:51.11#ibcon#enter sib2, iclass 13, count 0 2006.229.16:34:51.11#ibcon#flushed, iclass 13, count 0 2006.229.16:34:51.11#ibcon#about to write, iclass 13, count 0 2006.229.16:34:51.11#ibcon#wrote, iclass 13, count 0 2006.229.16:34:51.11#ibcon#about to read 3, iclass 13, count 0 2006.229.16:34:51.14#ibcon#read 3, iclass 13, count 0 2006.229.16:34:51.14#ibcon#about to read 4, iclass 13, count 0 2006.229.16:34:51.14#ibcon#read 4, iclass 13, count 0 2006.229.16:34:51.14#ibcon#about to read 5, iclass 13, count 0 2006.229.16:34:51.14#ibcon#read 5, iclass 13, count 0 2006.229.16:34:51.14#ibcon#about to read 6, iclass 13, count 0 2006.229.16:34:51.14#ibcon#read 6, iclass 13, count 0 2006.229.16:34:51.14#ibcon#end of sib2, iclass 13, count 0 2006.229.16:34:51.14#ibcon#*after write, iclass 13, count 0 2006.229.16:34:51.14#ibcon#*before return 0, iclass 13, count 0 2006.229.16:34:51.14#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:51.14#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:51.14#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:34:51.14#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:34:51.15$vck44/valo=4,624.99 2006.229.16:34:51.15#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.16:34:51.15#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.16:34:51.15#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:51.15#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:51.15#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:51.15#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:51.15#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:34:51.15#ibcon#first serial, iclass 15, count 0 2006.229.16:34:51.15#ibcon#enter sib2, iclass 15, count 0 2006.229.16:34:51.15#ibcon#flushed, iclass 15, count 0 2006.229.16:34:51.15#ibcon#about to write, iclass 15, count 0 2006.229.16:34:51.15#ibcon#wrote, iclass 15, count 0 2006.229.16:34:51.15#ibcon#about to read 3, iclass 15, count 0 2006.229.16:34:51.16#ibcon#read 3, iclass 15, count 0 2006.229.16:34:51.16#ibcon#about to read 4, iclass 15, count 0 2006.229.16:34:51.16#ibcon#read 4, iclass 15, count 0 2006.229.16:34:51.16#ibcon#about to read 5, iclass 15, count 0 2006.229.16:34:51.16#ibcon#read 5, iclass 15, count 0 2006.229.16:34:51.16#ibcon#about to read 6, iclass 15, count 0 2006.229.16:34:51.16#ibcon#read 6, iclass 15, count 0 2006.229.16:34:51.16#ibcon#end of sib2, iclass 15, count 0 2006.229.16:34:51.16#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:34:51.16#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:34:51.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:34:51.16#ibcon#*before write, iclass 15, count 0 2006.229.16:34:51.16#ibcon#enter sib2, iclass 15, count 0 2006.229.16:34:51.16#ibcon#flushed, iclass 15, count 0 2006.229.16:34:51.16#ibcon#about to write, iclass 15, count 0 2006.229.16:34:51.16#ibcon#wrote, iclass 15, count 0 2006.229.16:34:51.16#ibcon#about to read 3, iclass 15, count 0 2006.229.16:34:51.20#ibcon#read 3, iclass 15, count 0 2006.229.16:34:51.20#ibcon#about to read 4, iclass 15, count 0 2006.229.16:34:51.20#ibcon#read 4, iclass 15, count 0 2006.229.16:34:51.20#ibcon#about to read 5, iclass 15, count 0 2006.229.16:34:51.20#ibcon#read 5, iclass 15, count 0 2006.229.16:34:51.20#ibcon#about to read 6, iclass 15, count 0 2006.229.16:34:51.20#ibcon#read 6, iclass 15, count 0 2006.229.16:34:51.20#ibcon#end of sib2, iclass 15, count 0 2006.229.16:34:51.20#ibcon#*after write, iclass 15, count 0 2006.229.16:34:51.20#ibcon#*before return 0, iclass 15, count 0 2006.229.16:34:51.20#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:51.20#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:51.20#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:34:51.20#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:34:51.21$vck44/va=4,7 2006.229.16:34:51.21#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.16:34:51.21#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.16:34:51.21#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:51.21#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:51.25#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:51.25#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:51.25#ibcon#enter wrdev, iclass 17, count 2 2006.229.16:34:51.25#ibcon#first serial, iclass 17, count 2 2006.229.16:34:51.25#ibcon#enter sib2, iclass 17, count 2 2006.229.16:34:51.25#ibcon#flushed, iclass 17, count 2 2006.229.16:34:51.25#ibcon#about to write, iclass 17, count 2 2006.229.16:34:51.26#ibcon#wrote, iclass 17, count 2 2006.229.16:34:51.26#ibcon#about to read 3, iclass 17, count 2 2006.229.16:34:51.27#ibcon#read 3, iclass 17, count 2 2006.229.16:34:51.27#ibcon#about to read 4, iclass 17, count 2 2006.229.16:34:51.27#ibcon#read 4, iclass 17, count 2 2006.229.16:34:51.27#ibcon#about to read 5, iclass 17, count 2 2006.229.16:34:51.27#ibcon#read 5, iclass 17, count 2 2006.229.16:34:51.27#ibcon#about to read 6, iclass 17, count 2 2006.229.16:34:51.27#ibcon#read 6, iclass 17, count 2 2006.229.16:34:51.27#ibcon#end of sib2, iclass 17, count 2 2006.229.16:34:51.27#ibcon#*mode == 0, iclass 17, count 2 2006.229.16:34:51.27#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.16:34:51.27#ibcon#[25=AT04-07\r\n] 2006.229.16:34:51.27#ibcon#*before write, iclass 17, count 2 2006.229.16:34:51.27#ibcon#enter sib2, iclass 17, count 2 2006.229.16:34:51.27#ibcon#flushed, iclass 17, count 2 2006.229.16:34:51.27#ibcon#about to write, iclass 17, count 2 2006.229.16:34:51.27#ibcon#wrote, iclass 17, count 2 2006.229.16:34:51.27#ibcon#about to read 3, iclass 17, count 2 2006.229.16:34:51.30#ibcon#read 3, iclass 17, count 2 2006.229.16:34:51.30#ibcon#about to read 4, iclass 17, count 2 2006.229.16:34:51.30#ibcon#read 4, iclass 17, count 2 2006.229.16:34:51.30#ibcon#about to read 5, iclass 17, count 2 2006.229.16:34:51.30#ibcon#read 5, iclass 17, count 2 2006.229.16:34:51.30#ibcon#about to read 6, iclass 17, count 2 2006.229.16:34:51.30#ibcon#read 6, iclass 17, count 2 2006.229.16:34:51.30#ibcon#end of sib2, iclass 17, count 2 2006.229.16:34:51.30#ibcon#*after write, iclass 17, count 2 2006.229.16:34:51.30#ibcon#*before return 0, iclass 17, count 2 2006.229.16:34:51.30#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:51.30#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:51.30#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.16:34:51.30#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:51.30#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:51.42#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:51.42#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:51.42#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:34:51.42#ibcon#first serial, iclass 17, count 0 2006.229.16:34:51.42#ibcon#enter sib2, iclass 17, count 0 2006.229.16:34:51.42#ibcon#flushed, iclass 17, count 0 2006.229.16:34:51.42#ibcon#about to write, iclass 17, count 0 2006.229.16:34:51.42#ibcon#wrote, iclass 17, count 0 2006.229.16:34:51.42#ibcon#about to read 3, iclass 17, count 0 2006.229.16:34:51.44#ibcon#read 3, iclass 17, count 0 2006.229.16:34:51.44#ibcon#about to read 4, iclass 17, count 0 2006.229.16:34:51.44#ibcon#read 4, iclass 17, count 0 2006.229.16:34:51.44#ibcon#about to read 5, iclass 17, count 0 2006.229.16:34:51.44#ibcon#read 5, iclass 17, count 0 2006.229.16:34:51.44#ibcon#about to read 6, iclass 17, count 0 2006.229.16:34:51.44#ibcon#read 6, iclass 17, count 0 2006.229.16:34:51.44#ibcon#end of sib2, iclass 17, count 0 2006.229.16:34:51.44#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:34:51.44#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:34:51.44#ibcon#[25=USB\r\n] 2006.229.16:34:51.44#ibcon#*before write, iclass 17, count 0 2006.229.16:34:51.44#ibcon#enter sib2, iclass 17, count 0 2006.229.16:34:51.44#ibcon#flushed, iclass 17, count 0 2006.229.16:34:51.44#ibcon#about to write, iclass 17, count 0 2006.229.16:34:51.44#ibcon#wrote, iclass 17, count 0 2006.229.16:34:51.44#ibcon#about to read 3, iclass 17, count 0 2006.229.16:34:51.47#ibcon#read 3, iclass 17, count 0 2006.229.16:34:51.47#ibcon#about to read 4, iclass 17, count 0 2006.229.16:34:51.47#ibcon#read 4, iclass 17, count 0 2006.229.16:34:51.47#ibcon#about to read 5, iclass 17, count 0 2006.229.16:34:51.47#ibcon#read 5, iclass 17, count 0 2006.229.16:34:51.47#ibcon#about to read 6, iclass 17, count 0 2006.229.16:34:51.47#ibcon#read 6, iclass 17, count 0 2006.229.16:34:51.47#ibcon#end of sib2, iclass 17, count 0 2006.229.16:34:51.47#ibcon#*after write, iclass 17, count 0 2006.229.16:34:51.47#ibcon#*before return 0, iclass 17, count 0 2006.229.16:34:51.47#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:51.47#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:51.47#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:34:51.47#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:34:51.48$vck44/valo=5,734.99 2006.229.16:34:51.48#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.16:34:51.48#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.16:34:51.48#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:51.48#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:51.48#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:51.48#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:51.48#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:34:51.48#ibcon#first serial, iclass 19, count 0 2006.229.16:34:51.48#ibcon#enter sib2, iclass 19, count 0 2006.229.16:34:51.48#ibcon#flushed, iclass 19, count 0 2006.229.16:34:51.48#ibcon#about to write, iclass 19, count 0 2006.229.16:34:51.48#ibcon#wrote, iclass 19, count 0 2006.229.16:34:51.48#ibcon#about to read 3, iclass 19, count 0 2006.229.16:34:51.49#ibcon#read 3, iclass 19, count 0 2006.229.16:34:51.49#ibcon#about to read 4, iclass 19, count 0 2006.229.16:34:51.49#ibcon#read 4, iclass 19, count 0 2006.229.16:34:51.49#ibcon#about to read 5, iclass 19, count 0 2006.229.16:34:51.49#ibcon#read 5, iclass 19, count 0 2006.229.16:34:51.49#ibcon#about to read 6, iclass 19, count 0 2006.229.16:34:51.49#ibcon#read 6, iclass 19, count 0 2006.229.16:34:51.49#ibcon#end of sib2, iclass 19, count 0 2006.229.16:34:51.49#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:34:51.49#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:34:51.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:34:51.49#ibcon#*before write, iclass 19, count 0 2006.229.16:34:51.49#ibcon#enter sib2, iclass 19, count 0 2006.229.16:34:51.49#ibcon#flushed, iclass 19, count 0 2006.229.16:34:51.49#ibcon#about to write, iclass 19, count 0 2006.229.16:34:51.49#ibcon#wrote, iclass 19, count 0 2006.229.16:34:51.49#ibcon#about to read 3, iclass 19, count 0 2006.229.16:34:51.53#ibcon#read 3, iclass 19, count 0 2006.229.16:34:51.53#ibcon#about to read 4, iclass 19, count 0 2006.229.16:34:51.53#ibcon#read 4, iclass 19, count 0 2006.229.16:34:51.53#ibcon#about to read 5, iclass 19, count 0 2006.229.16:34:51.53#ibcon#read 5, iclass 19, count 0 2006.229.16:34:51.53#ibcon#about to read 6, iclass 19, count 0 2006.229.16:34:51.53#ibcon#read 6, iclass 19, count 0 2006.229.16:34:51.53#ibcon#end of sib2, iclass 19, count 0 2006.229.16:34:51.53#ibcon#*after write, iclass 19, count 0 2006.229.16:34:51.53#ibcon#*before return 0, iclass 19, count 0 2006.229.16:34:51.53#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:51.53#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:51.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:34:51.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:34:51.54$vck44/va=5,4 2006.229.16:34:51.54#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.16:34:51.54#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.16:34:51.54#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:51.54#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:51.58#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:51.58#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:51.58#ibcon#enter wrdev, iclass 21, count 2 2006.229.16:34:51.58#ibcon#first serial, iclass 21, count 2 2006.229.16:34:51.58#ibcon#enter sib2, iclass 21, count 2 2006.229.16:34:51.58#ibcon#flushed, iclass 21, count 2 2006.229.16:34:51.58#ibcon#about to write, iclass 21, count 2 2006.229.16:34:51.58#ibcon#wrote, iclass 21, count 2 2006.229.16:34:51.58#ibcon#about to read 3, iclass 21, count 2 2006.229.16:34:51.60#ibcon#read 3, iclass 21, count 2 2006.229.16:34:51.60#ibcon#about to read 4, iclass 21, count 2 2006.229.16:34:51.60#ibcon#read 4, iclass 21, count 2 2006.229.16:34:51.60#ibcon#about to read 5, iclass 21, count 2 2006.229.16:34:51.60#ibcon#read 5, iclass 21, count 2 2006.229.16:34:51.60#ibcon#about to read 6, iclass 21, count 2 2006.229.16:34:51.60#ibcon#read 6, iclass 21, count 2 2006.229.16:34:51.60#ibcon#end of sib2, iclass 21, count 2 2006.229.16:34:51.60#ibcon#*mode == 0, iclass 21, count 2 2006.229.16:34:51.60#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.16:34:51.60#ibcon#[25=AT05-04\r\n] 2006.229.16:34:51.60#ibcon#*before write, iclass 21, count 2 2006.229.16:34:51.60#ibcon#enter sib2, iclass 21, count 2 2006.229.16:34:51.60#ibcon#flushed, iclass 21, count 2 2006.229.16:34:51.60#ibcon#about to write, iclass 21, count 2 2006.229.16:34:51.60#ibcon#wrote, iclass 21, count 2 2006.229.16:34:51.60#ibcon#about to read 3, iclass 21, count 2 2006.229.16:34:51.63#ibcon#read 3, iclass 21, count 2 2006.229.16:34:51.63#ibcon#about to read 4, iclass 21, count 2 2006.229.16:34:51.63#ibcon#read 4, iclass 21, count 2 2006.229.16:34:51.63#ibcon#about to read 5, iclass 21, count 2 2006.229.16:34:51.63#ibcon#read 5, iclass 21, count 2 2006.229.16:34:51.63#ibcon#about to read 6, iclass 21, count 2 2006.229.16:34:51.63#ibcon#read 6, iclass 21, count 2 2006.229.16:34:51.63#ibcon#end of sib2, iclass 21, count 2 2006.229.16:34:51.63#ibcon#*after write, iclass 21, count 2 2006.229.16:34:51.63#ibcon#*before return 0, iclass 21, count 2 2006.229.16:34:51.63#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:51.63#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:51.63#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.16:34:51.63#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:51.63#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:51.75#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:51.75#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:51.75#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:34:51.75#ibcon#first serial, iclass 21, count 0 2006.229.16:34:51.75#ibcon#enter sib2, iclass 21, count 0 2006.229.16:34:51.75#ibcon#flushed, iclass 21, count 0 2006.229.16:34:51.75#ibcon#about to write, iclass 21, count 0 2006.229.16:34:51.75#ibcon#wrote, iclass 21, count 0 2006.229.16:34:51.75#ibcon#about to read 3, iclass 21, count 0 2006.229.16:34:51.77#ibcon#read 3, iclass 21, count 0 2006.229.16:34:51.77#ibcon#about to read 4, iclass 21, count 0 2006.229.16:34:51.77#ibcon#read 4, iclass 21, count 0 2006.229.16:34:51.77#ibcon#about to read 5, iclass 21, count 0 2006.229.16:34:51.77#ibcon#read 5, iclass 21, count 0 2006.229.16:34:51.77#ibcon#about to read 6, iclass 21, count 0 2006.229.16:34:51.77#ibcon#read 6, iclass 21, count 0 2006.229.16:34:51.77#ibcon#end of sib2, iclass 21, count 0 2006.229.16:34:51.77#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:34:51.77#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:34:51.77#ibcon#[25=USB\r\n] 2006.229.16:34:51.77#ibcon#*before write, iclass 21, count 0 2006.229.16:34:51.77#ibcon#enter sib2, iclass 21, count 0 2006.229.16:34:51.77#ibcon#flushed, iclass 21, count 0 2006.229.16:34:51.77#ibcon#about to write, iclass 21, count 0 2006.229.16:34:51.77#ibcon#wrote, iclass 21, count 0 2006.229.16:34:51.77#ibcon#about to read 3, iclass 21, count 0 2006.229.16:34:51.80#ibcon#read 3, iclass 21, count 0 2006.229.16:34:51.80#ibcon#about to read 4, iclass 21, count 0 2006.229.16:34:51.80#ibcon#read 4, iclass 21, count 0 2006.229.16:34:51.80#ibcon#about to read 5, iclass 21, count 0 2006.229.16:34:51.80#ibcon#read 5, iclass 21, count 0 2006.229.16:34:51.80#ibcon#about to read 6, iclass 21, count 0 2006.229.16:34:51.80#ibcon#read 6, iclass 21, count 0 2006.229.16:34:51.80#ibcon#end of sib2, iclass 21, count 0 2006.229.16:34:51.80#ibcon#*after write, iclass 21, count 0 2006.229.16:34:51.80#ibcon#*before return 0, iclass 21, count 0 2006.229.16:34:51.80#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:51.80#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:51.80#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:34:51.80#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:34:51.81$vck44/valo=6,814.99 2006.229.16:34:51.81#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.16:34:51.81#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.16:34:51.81#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:51.81#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:51.81#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:51.81#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:51.81#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:34:51.81#ibcon#first serial, iclass 23, count 0 2006.229.16:34:51.81#ibcon#enter sib2, iclass 23, count 0 2006.229.16:34:51.81#ibcon#flushed, iclass 23, count 0 2006.229.16:34:51.81#ibcon#about to write, iclass 23, count 0 2006.229.16:34:51.81#ibcon#wrote, iclass 23, count 0 2006.229.16:34:51.81#ibcon#about to read 3, iclass 23, count 0 2006.229.16:34:51.82#ibcon#read 3, iclass 23, count 0 2006.229.16:34:51.82#ibcon#about to read 4, iclass 23, count 0 2006.229.16:34:51.82#ibcon#read 4, iclass 23, count 0 2006.229.16:34:51.82#ibcon#about to read 5, iclass 23, count 0 2006.229.16:34:51.82#ibcon#read 5, iclass 23, count 0 2006.229.16:34:51.82#ibcon#about to read 6, iclass 23, count 0 2006.229.16:34:51.82#ibcon#read 6, iclass 23, count 0 2006.229.16:34:51.82#ibcon#end of sib2, iclass 23, count 0 2006.229.16:34:51.82#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:34:51.82#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:34:51.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:34:51.82#ibcon#*before write, iclass 23, count 0 2006.229.16:34:51.82#ibcon#enter sib2, iclass 23, count 0 2006.229.16:34:51.82#ibcon#flushed, iclass 23, count 0 2006.229.16:34:51.82#ibcon#about to write, iclass 23, count 0 2006.229.16:34:51.82#ibcon#wrote, iclass 23, count 0 2006.229.16:34:51.82#ibcon#about to read 3, iclass 23, count 0 2006.229.16:34:51.86#ibcon#read 3, iclass 23, count 0 2006.229.16:34:51.86#ibcon#about to read 4, iclass 23, count 0 2006.229.16:34:51.86#ibcon#read 4, iclass 23, count 0 2006.229.16:34:51.86#ibcon#about to read 5, iclass 23, count 0 2006.229.16:34:51.86#ibcon#read 5, iclass 23, count 0 2006.229.16:34:51.86#ibcon#about to read 6, iclass 23, count 0 2006.229.16:34:51.86#ibcon#read 6, iclass 23, count 0 2006.229.16:34:51.86#ibcon#end of sib2, iclass 23, count 0 2006.229.16:34:51.86#ibcon#*after write, iclass 23, count 0 2006.229.16:34:51.86#ibcon#*before return 0, iclass 23, count 0 2006.229.16:34:51.86#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:51.86#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:51.86#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:34:51.86#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:34:51.87$vck44/va=6,4 2006.229.16:34:51.87#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.16:34:51.87#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.16:34:51.87#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:51.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:51.91#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:51.91#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:51.91#ibcon#enter wrdev, iclass 25, count 2 2006.229.16:34:51.91#ibcon#first serial, iclass 25, count 2 2006.229.16:34:51.91#ibcon#enter sib2, iclass 25, count 2 2006.229.16:34:51.91#ibcon#flushed, iclass 25, count 2 2006.229.16:34:51.91#ibcon#about to write, iclass 25, count 2 2006.229.16:34:51.91#ibcon#wrote, iclass 25, count 2 2006.229.16:34:51.91#ibcon#about to read 3, iclass 25, count 2 2006.229.16:34:51.93#ibcon#read 3, iclass 25, count 2 2006.229.16:34:51.93#ibcon#about to read 4, iclass 25, count 2 2006.229.16:34:51.93#ibcon#read 4, iclass 25, count 2 2006.229.16:34:51.93#ibcon#about to read 5, iclass 25, count 2 2006.229.16:34:51.93#ibcon#read 5, iclass 25, count 2 2006.229.16:34:51.93#ibcon#about to read 6, iclass 25, count 2 2006.229.16:34:51.93#ibcon#read 6, iclass 25, count 2 2006.229.16:34:51.93#ibcon#end of sib2, iclass 25, count 2 2006.229.16:34:51.93#ibcon#*mode == 0, iclass 25, count 2 2006.229.16:34:51.93#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.16:34:51.93#ibcon#[25=AT06-04\r\n] 2006.229.16:34:51.93#ibcon#*before write, iclass 25, count 2 2006.229.16:34:51.93#ibcon#enter sib2, iclass 25, count 2 2006.229.16:34:51.93#ibcon#flushed, iclass 25, count 2 2006.229.16:34:51.93#ibcon#about to write, iclass 25, count 2 2006.229.16:34:51.93#ibcon#wrote, iclass 25, count 2 2006.229.16:34:51.93#ibcon#about to read 3, iclass 25, count 2 2006.229.16:34:51.96#ibcon#read 3, iclass 25, count 2 2006.229.16:34:51.96#ibcon#about to read 4, iclass 25, count 2 2006.229.16:34:51.96#ibcon#read 4, iclass 25, count 2 2006.229.16:34:51.96#ibcon#about to read 5, iclass 25, count 2 2006.229.16:34:51.96#ibcon#read 5, iclass 25, count 2 2006.229.16:34:51.96#ibcon#about to read 6, iclass 25, count 2 2006.229.16:34:51.96#ibcon#read 6, iclass 25, count 2 2006.229.16:34:51.96#ibcon#end of sib2, iclass 25, count 2 2006.229.16:34:51.96#ibcon#*after write, iclass 25, count 2 2006.229.16:34:51.96#ibcon#*before return 0, iclass 25, count 2 2006.229.16:34:51.96#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:51.96#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:51.96#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.16:34:51.96#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:51.96#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:52.08#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:52.08#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:52.08#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:34:52.08#ibcon#first serial, iclass 25, count 0 2006.229.16:34:52.08#ibcon#enter sib2, iclass 25, count 0 2006.229.16:34:52.08#ibcon#flushed, iclass 25, count 0 2006.229.16:34:52.08#ibcon#about to write, iclass 25, count 0 2006.229.16:34:52.08#ibcon#wrote, iclass 25, count 0 2006.229.16:34:52.08#ibcon#about to read 3, iclass 25, count 0 2006.229.16:34:52.10#ibcon#read 3, iclass 25, count 0 2006.229.16:34:52.10#ibcon#about to read 4, iclass 25, count 0 2006.229.16:34:52.10#ibcon#read 4, iclass 25, count 0 2006.229.16:34:52.10#ibcon#about to read 5, iclass 25, count 0 2006.229.16:34:52.10#ibcon#read 5, iclass 25, count 0 2006.229.16:34:52.10#ibcon#about to read 6, iclass 25, count 0 2006.229.16:34:52.10#ibcon#read 6, iclass 25, count 0 2006.229.16:34:52.10#ibcon#end of sib2, iclass 25, count 0 2006.229.16:34:52.10#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:34:52.10#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:34:52.10#ibcon#[25=USB\r\n] 2006.229.16:34:52.10#ibcon#*before write, iclass 25, count 0 2006.229.16:34:52.10#ibcon#enter sib2, iclass 25, count 0 2006.229.16:34:52.10#ibcon#flushed, iclass 25, count 0 2006.229.16:34:52.10#ibcon#about to write, iclass 25, count 0 2006.229.16:34:52.10#ibcon#wrote, iclass 25, count 0 2006.229.16:34:52.10#ibcon#about to read 3, iclass 25, count 0 2006.229.16:34:52.13#ibcon#read 3, iclass 25, count 0 2006.229.16:34:52.13#ibcon#about to read 4, iclass 25, count 0 2006.229.16:34:52.13#ibcon#read 4, iclass 25, count 0 2006.229.16:34:52.13#ibcon#about to read 5, iclass 25, count 0 2006.229.16:34:52.13#ibcon#read 5, iclass 25, count 0 2006.229.16:34:52.13#ibcon#about to read 6, iclass 25, count 0 2006.229.16:34:52.13#ibcon#read 6, iclass 25, count 0 2006.229.16:34:52.13#ibcon#end of sib2, iclass 25, count 0 2006.229.16:34:52.13#ibcon#*after write, iclass 25, count 0 2006.229.16:34:52.13#ibcon#*before return 0, iclass 25, count 0 2006.229.16:34:52.13#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:52.13#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:52.13#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:34:52.13#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:34:52.14$vck44/valo=7,864.99 2006.229.16:34:52.14#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.16:34:52.14#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.16:34:52.14#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:52.14#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:52.14#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:52.14#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:52.14#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:34:52.14#ibcon#first serial, iclass 27, count 0 2006.229.16:34:52.14#ibcon#enter sib2, iclass 27, count 0 2006.229.16:34:52.14#ibcon#flushed, iclass 27, count 0 2006.229.16:34:52.14#ibcon#about to write, iclass 27, count 0 2006.229.16:34:52.14#ibcon#wrote, iclass 27, count 0 2006.229.16:34:52.14#ibcon#about to read 3, iclass 27, count 0 2006.229.16:34:52.15#ibcon#read 3, iclass 27, count 0 2006.229.16:34:52.15#ibcon#about to read 4, iclass 27, count 0 2006.229.16:34:52.15#ibcon#read 4, iclass 27, count 0 2006.229.16:34:52.15#ibcon#about to read 5, iclass 27, count 0 2006.229.16:34:52.15#ibcon#read 5, iclass 27, count 0 2006.229.16:34:52.15#ibcon#about to read 6, iclass 27, count 0 2006.229.16:34:52.15#ibcon#read 6, iclass 27, count 0 2006.229.16:34:52.15#ibcon#end of sib2, iclass 27, count 0 2006.229.16:34:52.15#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:34:52.15#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:34:52.15#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:34:52.15#ibcon#*before write, iclass 27, count 0 2006.229.16:34:52.15#ibcon#enter sib2, iclass 27, count 0 2006.229.16:34:52.15#ibcon#flushed, iclass 27, count 0 2006.229.16:34:52.15#ibcon#about to write, iclass 27, count 0 2006.229.16:34:52.15#ibcon#wrote, iclass 27, count 0 2006.229.16:34:52.15#ibcon#about to read 3, iclass 27, count 0 2006.229.16:34:52.19#ibcon#read 3, iclass 27, count 0 2006.229.16:34:52.19#ibcon#about to read 4, iclass 27, count 0 2006.229.16:34:52.19#ibcon#read 4, iclass 27, count 0 2006.229.16:34:52.19#ibcon#about to read 5, iclass 27, count 0 2006.229.16:34:52.19#ibcon#read 5, iclass 27, count 0 2006.229.16:34:52.19#ibcon#about to read 6, iclass 27, count 0 2006.229.16:34:52.19#ibcon#read 6, iclass 27, count 0 2006.229.16:34:52.19#ibcon#end of sib2, iclass 27, count 0 2006.229.16:34:52.19#ibcon#*after write, iclass 27, count 0 2006.229.16:34:52.19#ibcon#*before return 0, iclass 27, count 0 2006.229.16:34:52.19#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:52.19#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:52.19#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:34:52.19#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:34:52.20$vck44/va=7,5 2006.229.16:34:52.20#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.16:34:52.20#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.16:34:52.20#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:52.20#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:52.24#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:52.24#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:52.24#ibcon#enter wrdev, iclass 29, count 2 2006.229.16:34:52.24#ibcon#first serial, iclass 29, count 2 2006.229.16:34:52.24#ibcon#enter sib2, iclass 29, count 2 2006.229.16:34:52.24#ibcon#flushed, iclass 29, count 2 2006.229.16:34:52.24#ibcon#about to write, iclass 29, count 2 2006.229.16:34:52.24#ibcon#wrote, iclass 29, count 2 2006.229.16:34:52.24#ibcon#about to read 3, iclass 29, count 2 2006.229.16:34:52.26#ibcon#read 3, iclass 29, count 2 2006.229.16:34:52.26#ibcon#about to read 4, iclass 29, count 2 2006.229.16:34:52.26#ibcon#read 4, iclass 29, count 2 2006.229.16:34:52.26#ibcon#about to read 5, iclass 29, count 2 2006.229.16:34:52.26#ibcon#read 5, iclass 29, count 2 2006.229.16:34:52.26#ibcon#about to read 6, iclass 29, count 2 2006.229.16:34:52.26#ibcon#read 6, iclass 29, count 2 2006.229.16:34:52.26#ibcon#end of sib2, iclass 29, count 2 2006.229.16:34:52.26#ibcon#*mode == 0, iclass 29, count 2 2006.229.16:34:52.26#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.16:34:52.26#ibcon#[25=AT07-05\r\n] 2006.229.16:34:52.26#ibcon#*before write, iclass 29, count 2 2006.229.16:34:52.26#ibcon#enter sib2, iclass 29, count 2 2006.229.16:34:52.26#ibcon#flushed, iclass 29, count 2 2006.229.16:34:52.26#ibcon#about to write, iclass 29, count 2 2006.229.16:34:52.26#ibcon#wrote, iclass 29, count 2 2006.229.16:34:52.26#ibcon#about to read 3, iclass 29, count 2 2006.229.16:34:52.29#ibcon#read 3, iclass 29, count 2 2006.229.16:34:52.29#ibcon#about to read 4, iclass 29, count 2 2006.229.16:34:52.29#ibcon#read 4, iclass 29, count 2 2006.229.16:34:52.29#ibcon#about to read 5, iclass 29, count 2 2006.229.16:34:52.29#ibcon#read 5, iclass 29, count 2 2006.229.16:34:52.29#ibcon#about to read 6, iclass 29, count 2 2006.229.16:34:52.29#ibcon#read 6, iclass 29, count 2 2006.229.16:34:52.29#ibcon#end of sib2, iclass 29, count 2 2006.229.16:34:52.29#ibcon#*after write, iclass 29, count 2 2006.229.16:34:52.29#ibcon#*before return 0, iclass 29, count 2 2006.229.16:34:52.29#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:52.29#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:52.29#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.16:34:52.29#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:52.29#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:52.41#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:52.41#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:52.41#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:34:52.41#ibcon#first serial, iclass 29, count 0 2006.229.16:34:52.41#ibcon#enter sib2, iclass 29, count 0 2006.229.16:34:52.41#ibcon#flushed, iclass 29, count 0 2006.229.16:34:52.41#ibcon#about to write, iclass 29, count 0 2006.229.16:34:52.41#ibcon#wrote, iclass 29, count 0 2006.229.16:34:52.41#ibcon#about to read 3, iclass 29, count 0 2006.229.16:34:52.43#ibcon#read 3, iclass 29, count 0 2006.229.16:34:52.43#ibcon#about to read 4, iclass 29, count 0 2006.229.16:34:52.43#ibcon#read 4, iclass 29, count 0 2006.229.16:34:52.43#ibcon#about to read 5, iclass 29, count 0 2006.229.16:34:52.43#ibcon#read 5, iclass 29, count 0 2006.229.16:34:52.43#ibcon#about to read 6, iclass 29, count 0 2006.229.16:34:52.43#ibcon#read 6, iclass 29, count 0 2006.229.16:34:52.43#ibcon#end of sib2, iclass 29, count 0 2006.229.16:34:52.43#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:34:52.43#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:34:52.43#ibcon#[25=USB\r\n] 2006.229.16:34:52.43#ibcon#*before write, iclass 29, count 0 2006.229.16:34:52.43#ibcon#enter sib2, iclass 29, count 0 2006.229.16:34:52.43#ibcon#flushed, iclass 29, count 0 2006.229.16:34:52.43#ibcon#about to write, iclass 29, count 0 2006.229.16:34:52.43#ibcon#wrote, iclass 29, count 0 2006.229.16:34:52.43#ibcon#about to read 3, iclass 29, count 0 2006.229.16:34:52.46#ibcon#read 3, iclass 29, count 0 2006.229.16:34:52.46#ibcon#about to read 4, iclass 29, count 0 2006.229.16:34:52.46#ibcon#read 4, iclass 29, count 0 2006.229.16:34:52.46#ibcon#about to read 5, iclass 29, count 0 2006.229.16:34:52.46#ibcon#read 5, iclass 29, count 0 2006.229.16:34:52.46#ibcon#about to read 6, iclass 29, count 0 2006.229.16:34:52.46#ibcon#read 6, iclass 29, count 0 2006.229.16:34:52.46#ibcon#end of sib2, iclass 29, count 0 2006.229.16:34:52.46#ibcon#*after write, iclass 29, count 0 2006.229.16:34:52.46#ibcon#*before return 0, iclass 29, count 0 2006.229.16:34:52.46#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:52.46#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:52.46#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:34:52.46#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:34:52.47$vck44/valo=8,884.99 2006.229.16:34:52.47#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.16:34:52.47#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.16:34:52.47#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:52.47#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:52.47#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:52.47#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:52.47#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:34:52.47#ibcon#first serial, iclass 31, count 0 2006.229.16:34:52.47#ibcon#enter sib2, iclass 31, count 0 2006.229.16:34:52.47#ibcon#flushed, iclass 31, count 0 2006.229.16:34:52.47#ibcon#about to write, iclass 31, count 0 2006.229.16:34:52.47#ibcon#wrote, iclass 31, count 0 2006.229.16:34:52.47#ibcon#about to read 3, iclass 31, count 0 2006.229.16:34:52.48#ibcon#read 3, iclass 31, count 0 2006.229.16:34:52.48#ibcon#about to read 4, iclass 31, count 0 2006.229.16:34:52.48#ibcon#read 4, iclass 31, count 0 2006.229.16:34:52.48#ibcon#about to read 5, iclass 31, count 0 2006.229.16:34:52.48#ibcon#read 5, iclass 31, count 0 2006.229.16:34:52.48#ibcon#about to read 6, iclass 31, count 0 2006.229.16:34:52.48#ibcon#read 6, iclass 31, count 0 2006.229.16:34:52.48#ibcon#end of sib2, iclass 31, count 0 2006.229.16:34:52.48#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:34:52.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:34:52.48#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:34:52.48#ibcon#*before write, iclass 31, count 0 2006.229.16:34:52.48#ibcon#enter sib2, iclass 31, count 0 2006.229.16:34:52.48#ibcon#flushed, iclass 31, count 0 2006.229.16:34:52.48#ibcon#about to write, iclass 31, count 0 2006.229.16:34:52.48#ibcon#wrote, iclass 31, count 0 2006.229.16:34:52.48#ibcon#about to read 3, iclass 31, count 0 2006.229.16:34:52.52#ibcon#read 3, iclass 31, count 0 2006.229.16:34:52.52#ibcon#about to read 4, iclass 31, count 0 2006.229.16:34:52.52#ibcon#read 4, iclass 31, count 0 2006.229.16:34:52.52#ibcon#about to read 5, iclass 31, count 0 2006.229.16:34:52.52#ibcon#read 5, iclass 31, count 0 2006.229.16:34:52.52#ibcon#about to read 6, iclass 31, count 0 2006.229.16:34:52.52#ibcon#read 6, iclass 31, count 0 2006.229.16:34:52.52#ibcon#end of sib2, iclass 31, count 0 2006.229.16:34:52.52#ibcon#*after write, iclass 31, count 0 2006.229.16:34:52.52#ibcon#*before return 0, iclass 31, count 0 2006.229.16:34:52.52#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:52.52#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:52.52#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:34:52.52#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:34:52.53$vck44/va=8,6 2006.229.16:34:52.53#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.16:34:52.53#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.16:34:52.53#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:52.53#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:34:52.57#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:34:52.57#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:34:52.57#ibcon#enter wrdev, iclass 33, count 2 2006.229.16:34:52.57#ibcon#first serial, iclass 33, count 2 2006.229.16:34:52.57#ibcon#enter sib2, iclass 33, count 2 2006.229.16:34:52.57#ibcon#flushed, iclass 33, count 2 2006.229.16:34:52.57#ibcon#about to write, iclass 33, count 2 2006.229.16:34:52.57#ibcon#wrote, iclass 33, count 2 2006.229.16:34:52.57#ibcon#about to read 3, iclass 33, count 2 2006.229.16:34:52.59#ibcon#read 3, iclass 33, count 2 2006.229.16:34:52.59#ibcon#about to read 4, iclass 33, count 2 2006.229.16:34:52.59#ibcon#read 4, iclass 33, count 2 2006.229.16:34:52.59#ibcon#about to read 5, iclass 33, count 2 2006.229.16:34:52.59#ibcon#read 5, iclass 33, count 2 2006.229.16:34:52.59#ibcon#about to read 6, iclass 33, count 2 2006.229.16:34:52.59#ibcon#read 6, iclass 33, count 2 2006.229.16:34:52.59#ibcon#end of sib2, iclass 33, count 2 2006.229.16:34:52.59#ibcon#*mode == 0, iclass 33, count 2 2006.229.16:34:52.59#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.16:34:52.59#ibcon#[25=AT08-06\r\n] 2006.229.16:34:52.59#ibcon#*before write, iclass 33, count 2 2006.229.16:34:52.59#ibcon#enter sib2, iclass 33, count 2 2006.229.16:34:52.59#ibcon#flushed, iclass 33, count 2 2006.229.16:34:52.59#ibcon#about to write, iclass 33, count 2 2006.229.16:34:52.59#ibcon#wrote, iclass 33, count 2 2006.229.16:34:52.59#ibcon#about to read 3, iclass 33, count 2 2006.229.16:34:52.62#ibcon#read 3, iclass 33, count 2 2006.229.16:34:52.62#ibcon#about to read 4, iclass 33, count 2 2006.229.16:34:52.62#ibcon#read 4, iclass 33, count 2 2006.229.16:34:52.62#ibcon#about to read 5, iclass 33, count 2 2006.229.16:34:52.62#ibcon#read 5, iclass 33, count 2 2006.229.16:34:52.62#ibcon#about to read 6, iclass 33, count 2 2006.229.16:34:52.62#ibcon#read 6, iclass 33, count 2 2006.229.16:34:52.62#ibcon#end of sib2, iclass 33, count 2 2006.229.16:34:52.62#ibcon#*after write, iclass 33, count 2 2006.229.16:34:52.62#ibcon#*before return 0, iclass 33, count 2 2006.229.16:34:52.62#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:34:52.62#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.16:34:52.62#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.16:34:52.62#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:52.62#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:34:52.74#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:34:52.74#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:34:52.74#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:34:52.74#ibcon#first serial, iclass 33, count 0 2006.229.16:34:52.74#ibcon#enter sib2, iclass 33, count 0 2006.229.16:34:52.74#ibcon#flushed, iclass 33, count 0 2006.229.16:34:52.74#ibcon#about to write, iclass 33, count 0 2006.229.16:34:52.74#ibcon#wrote, iclass 33, count 0 2006.229.16:34:52.74#ibcon#about to read 3, iclass 33, count 0 2006.229.16:34:52.76#ibcon#read 3, iclass 33, count 0 2006.229.16:34:52.76#ibcon#about to read 4, iclass 33, count 0 2006.229.16:34:52.76#ibcon#read 4, iclass 33, count 0 2006.229.16:34:52.76#ibcon#about to read 5, iclass 33, count 0 2006.229.16:34:52.76#ibcon#read 5, iclass 33, count 0 2006.229.16:34:52.76#ibcon#about to read 6, iclass 33, count 0 2006.229.16:34:52.76#ibcon#read 6, iclass 33, count 0 2006.229.16:34:52.76#ibcon#end of sib2, iclass 33, count 0 2006.229.16:34:52.76#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:34:52.76#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:34:52.76#ibcon#[25=USB\r\n] 2006.229.16:34:52.76#ibcon#*before write, iclass 33, count 0 2006.229.16:34:52.76#ibcon#enter sib2, iclass 33, count 0 2006.229.16:34:52.76#ibcon#flushed, iclass 33, count 0 2006.229.16:34:52.76#ibcon#about to write, iclass 33, count 0 2006.229.16:34:52.76#ibcon#wrote, iclass 33, count 0 2006.229.16:34:52.76#ibcon#about to read 3, iclass 33, count 0 2006.229.16:34:52.79#ibcon#read 3, iclass 33, count 0 2006.229.16:34:52.79#ibcon#about to read 4, iclass 33, count 0 2006.229.16:34:52.79#ibcon#read 4, iclass 33, count 0 2006.229.16:34:52.79#ibcon#about to read 5, iclass 33, count 0 2006.229.16:34:52.79#ibcon#read 5, iclass 33, count 0 2006.229.16:34:52.79#ibcon#about to read 6, iclass 33, count 0 2006.229.16:34:52.79#ibcon#read 6, iclass 33, count 0 2006.229.16:34:52.79#ibcon#end of sib2, iclass 33, count 0 2006.229.16:34:52.79#ibcon#*after write, iclass 33, count 0 2006.229.16:34:52.79#ibcon#*before return 0, iclass 33, count 0 2006.229.16:34:52.79#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:34:52.79#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.16:34:52.79#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:34:52.79#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:34:52.80$vck44/vblo=1,629.99 2006.229.16:34:52.80#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.16:34:52.80#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.16:34:52.80#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:52.80#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:34:52.80#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:34:52.80#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:34:52.80#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:34:52.80#ibcon#first serial, iclass 35, count 0 2006.229.16:34:52.80#ibcon#enter sib2, iclass 35, count 0 2006.229.16:34:52.80#ibcon#flushed, iclass 35, count 0 2006.229.16:34:52.80#ibcon#about to write, iclass 35, count 0 2006.229.16:34:52.80#ibcon#wrote, iclass 35, count 0 2006.229.16:34:52.80#ibcon#about to read 3, iclass 35, count 0 2006.229.16:34:52.81#ibcon#read 3, iclass 35, count 0 2006.229.16:34:52.81#ibcon#about to read 4, iclass 35, count 0 2006.229.16:34:52.81#ibcon#read 4, iclass 35, count 0 2006.229.16:34:52.81#ibcon#about to read 5, iclass 35, count 0 2006.229.16:34:52.81#ibcon#read 5, iclass 35, count 0 2006.229.16:34:52.81#ibcon#about to read 6, iclass 35, count 0 2006.229.16:34:52.81#ibcon#read 6, iclass 35, count 0 2006.229.16:34:52.81#ibcon#end of sib2, iclass 35, count 0 2006.229.16:34:52.81#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:34:52.81#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:34:52.81#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:34:52.81#ibcon#*before write, iclass 35, count 0 2006.229.16:34:52.81#ibcon#enter sib2, iclass 35, count 0 2006.229.16:34:52.81#ibcon#flushed, iclass 35, count 0 2006.229.16:34:52.81#ibcon#about to write, iclass 35, count 0 2006.229.16:34:52.81#ibcon#wrote, iclass 35, count 0 2006.229.16:34:52.81#ibcon#about to read 3, iclass 35, count 0 2006.229.16:34:52.85#ibcon#read 3, iclass 35, count 0 2006.229.16:34:52.85#ibcon#about to read 4, iclass 35, count 0 2006.229.16:34:52.85#ibcon#read 4, iclass 35, count 0 2006.229.16:34:52.85#ibcon#about to read 5, iclass 35, count 0 2006.229.16:34:52.85#ibcon#read 5, iclass 35, count 0 2006.229.16:34:52.85#ibcon#about to read 6, iclass 35, count 0 2006.229.16:34:52.85#ibcon#read 6, iclass 35, count 0 2006.229.16:34:52.85#ibcon#end of sib2, iclass 35, count 0 2006.229.16:34:52.85#ibcon#*after write, iclass 35, count 0 2006.229.16:34:52.85#ibcon#*before return 0, iclass 35, count 0 2006.229.16:34:52.85#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:34:52.85#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.16:34:52.85#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:34:52.85#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:34:52.86$vck44/vb=1,4 2006.229.16:34:52.86#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.16:34:52.86#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.16:34:52.86#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:52.86#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:34:52.86#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:34:52.86#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:34:52.86#ibcon#enter wrdev, iclass 37, count 2 2006.229.16:34:52.86#ibcon#first serial, iclass 37, count 2 2006.229.16:34:52.86#ibcon#enter sib2, iclass 37, count 2 2006.229.16:34:52.86#ibcon#flushed, iclass 37, count 2 2006.229.16:34:52.86#ibcon#about to write, iclass 37, count 2 2006.229.16:34:52.86#ibcon#wrote, iclass 37, count 2 2006.229.16:34:52.86#ibcon#about to read 3, iclass 37, count 2 2006.229.16:34:52.87#ibcon#read 3, iclass 37, count 2 2006.229.16:34:52.87#ibcon#about to read 4, iclass 37, count 2 2006.229.16:34:52.87#ibcon#read 4, iclass 37, count 2 2006.229.16:34:52.87#ibcon#about to read 5, iclass 37, count 2 2006.229.16:34:52.87#ibcon#read 5, iclass 37, count 2 2006.229.16:34:52.87#ibcon#about to read 6, iclass 37, count 2 2006.229.16:34:52.87#ibcon#read 6, iclass 37, count 2 2006.229.16:34:52.87#ibcon#end of sib2, iclass 37, count 2 2006.229.16:34:52.87#ibcon#*mode == 0, iclass 37, count 2 2006.229.16:34:52.87#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.16:34:52.87#ibcon#[27=AT01-04\r\n] 2006.229.16:34:52.87#ibcon#*before write, iclass 37, count 2 2006.229.16:34:52.87#ibcon#enter sib2, iclass 37, count 2 2006.229.16:34:52.87#ibcon#flushed, iclass 37, count 2 2006.229.16:34:52.87#ibcon#about to write, iclass 37, count 2 2006.229.16:34:52.87#ibcon#wrote, iclass 37, count 2 2006.229.16:34:52.87#ibcon#about to read 3, iclass 37, count 2 2006.229.16:34:52.90#ibcon#read 3, iclass 37, count 2 2006.229.16:34:52.90#ibcon#about to read 4, iclass 37, count 2 2006.229.16:34:52.90#ibcon#read 4, iclass 37, count 2 2006.229.16:34:52.90#ibcon#about to read 5, iclass 37, count 2 2006.229.16:34:52.90#ibcon#read 5, iclass 37, count 2 2006.229.16:34:52.90#ibcon#about to read 6, iclass 37, count 2 2006.229.16:34:52.90#ibcon#read 6, iclass 37, count 2 2006.229.16:34:52.90#ibcon#end of sib2, iclass 37, count 2 2006.229.16:34:52.90#ibcon#*after write, iclass 37, count 2 2006.229.16:34:52.90#ibcon#*before return 0, iclass 37, count 2 2006.229.16:34:52.90#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:34:52.90#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.16:34:52.90#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.16:34:52.90#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:52.90#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:34:53.02#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:34:53.02#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:34:53.02#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:34:53.02#ibcon#first serial, iclass 37, count 0 2006.229.16:34:53.02#ibcon#enter sib2, iclass 37, count 0 2006.229.16:34:53.02#ibcon#flushed, iclass 37, count 0 2006.229.16:34:53.02#ibcon#about to write, iclass 37, count 0 2006.229.16:34:53.02#ibcon#wrote, iclass 37, count 0 2006.229.16:34:53.02#ibcon#about to read 3, iclass 37, count 0 2006.229.16:34:53.04#ibcon#read 3, iclass 37, count 0 2006.229.16:34:53.04#ibcon#about to read 4, iclass 37, count 0 2006.229.16:34:53.04#ibcon#read 4, iclass 37, count 0 2006.229.16:34:53.04#ibcon#about to read 5, iclass 37, count 0 2006.229.16:34:53.04#ibcon#read 5, iclass 37, count 0 2006.229.16:34:53.04#ibcon#about to read 6, iclass 37, count 0 2006.229.16:34:53.04#ibcon#read 6, iclass 37, count 0 2006.229.16:34:53.04#ibcon#end of sib2, iclass 37, count 0 2006.229.16:34:53.04#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:34:53.04#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:34:53.04#ibcon#[27=USB\r\n] 2006.229.16:34:53.04#ibcon#*before write, iclass 37, count 0 2006.229.16:34:53.04#ibcon#enter sib2, iclass 37, count 0 2006.229.16:34:53.04#ibcon#flushed, iclass 37, count 0 2006.229.16:34:53.04#ibcon#about to write, iclass 37, count 0 2006.229.16:34:53.04#ibcon#wrote, iclass 37, count 0 2006.229.16:34:53.04#ibcon#about to read 3, iclass 37, count 0 2006.229.16:34:53.07#ibcon#read 3, iclass 37, count 0 2006.229.16:34:53.07#ibcon#about to read 4, iclass 37, count 0 2006.229.16:34:53.07#ibcon#read 4, iclass 37, count 0 2006.229.16:34:53.07#ibcon#about to read 5, iclass 37, count 0 2006.229.16:34:53.07#ibcon#read 5, iclass 37, count 0 2006.229.16:34:53.07#ibcon#about to read 6, iclass 37, count 0 2006.229.16:34:53.07#ibcon#read 6, iclass 37, count 0 2006.229.16:34:53.07#ibcon#end of sib2, iclass 37, count 0 2006.229.16:34:53.07#ibcon#*after write, iclass 37, count 0 2006.229.16:34:53.07#ibcon#*before return 0, iclass 37, count 0 2006.229.16:34:53.07#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:34:53.07#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.16:34:53.07#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:34:53.07#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:34:53.08$vck44/vblo=2,634.99 2006.229.16:34:53.08#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.16:34:53.08#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.16:34:53.08#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:53.08#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:53.08#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:53.08#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:53.08#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:34:53.08#ibcon#first serial, iclass 39, count 0 2006.229.16:34:53.08#ibcon#enter sib2, iclass 39, count 0 2006.229.16:34:53.08#ibcon#flushed, iclass 39, count 0 2006.229.16:34:53.08#ibcon#about to write, iclass 39, count 0 2006.229.16:34:53.08#ibcon#wrote, iclass 39, count 0 2006.229.16:34:53.08#ibcon#about to read 3, iclass 39, count 0 2006.229.16:34:53.09#ibcon#read 3, iclass 39, count 0 2006.229.16:34:53.09#ibcon#about to read 4, iclass 39, count 0 2006.229.16:34:53.09#ibcon#read 4, iclass 39, count 0 2006.229.16:34:53.09#ibcon#about to read 5, iclass 39, count 0 2006.229.16:34:53.09#ibcon#read 5, iclass 39, count 0 2006.229.16:34:53.09#ibcon#about to read 6, iclass 39, count 0 2006.229.16:34:53.09#ibcon#read 6, iclass 39, count 0 2006.229.16:34:53.09#ibcon#end of sib2, iclass 39, count 0 2006.229.16:34:53.09#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:34:53.09#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:34:53.09#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:34:53.09#ibcon#*before write, iclass 39, count 0 2006.229.16:34:53.09#ibcon#enter sib2, iclass 39, count 0 2006.229.16:34:53.09#ibcon#flushed, iclass 39, count 0 2006.229.16:34:53.09#ibcon#about to write, iclass 39, count 0 2006.229.16:34:53.09#ibcon#wrote, iclass 39, count 0 2006.229.16:34:53.09#ibcon#about to read 3, iclass 39, count 0 2006.229.16:34:53.13#ibcon#read 3, iclass 39, count 0 2006.229.16:34:53.13#ibcon#about to read 4, iclass 39, count 0 2006.229.16:34:53.13#ibcon#read 4, iclass 39, count 0 2006.229.16:34:53.13#ibcon#about to read 5, iclass 39, count 0 2006.229.16:34:53.13#ibcon#read 5, iclass 39, count 0 2006.229.16:34:53.13#ibcon#about to read 6, iclass 39, count 0 2006.229.16:34:53.13#ibcon#read 6, iclass 39, count 0 2006.229.16:34:53.13#ibcon#end of sib2, iclass 39, count 0 2006.229.16:34:53.13#ibcon#*after write, iclass 39, count 0 2006.229.16:34:53.13#ibcon#*before return 0, iclass 39, count 0 2006.229.16:34:53.13#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:53.13#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.16:34:53.13#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:34:53.13#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:34:53.14$vck44/vb=2,4 2006.229.16:34:53.14#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.16:34:53.14#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.16:34:53.14#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:53.14#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:53.18#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:53.18#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:53.18#ibcon#enter wrdev, iclass 3, count 2 2006.229.16:34:53.18#ibcon#first serial, iclass 3, count 2 2006.229.16:34:53.18#ibcon#enter sib2, iclass 3, count 2 2006.229.16:34:53.18#ibcon#flushed, iclass 3, count 2 2006.229.16:34:53.18#ibcon#about to write, iclass 3, count 2 2006.229.16:34:53.19#ibcon#wrote, iclass 3, count 2 2006.229.16:34:53.19#ibcon#about to read 3, iclass 3, count 2 2006.229.16:34:53.20#ibcon#read 3, iclass 3, count 2 2006.229.16:34:53.20#ibcon#about to read 4, iclass 3, count 2 2006.229.16:34:53.20#ibcon#read 4, iclass 3, count 2 2006.229.16:34:53.20#ibcon#about to read 5, iclass 3, count 2 2006.229.16:34:53.20#ibcon#read 5, iclass 3, count 2 2006.229.16:34:53.20#ibcon#about to read 6, iclass 3, count 2 2006.229.16:34:53.20#ibcon#read 6, iclass 3, count 2 2006.229.16:34:53.20#ibcon#end of sib2, iclass 3, count 2 2006.229.16:34:53.20#ibcon#*mode == 0, iclass 3, count 2 2006.229.16:34:53.20#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.16:34:53.20#ibcon#[27=AT02-04\r\n] 2006.229.16:34:53.20#ibcon#*before write, iclass 3, count 2 2006.229.16:34:53.20#ibcon#enter sib2, iclass 3, count 2 2006.229.16:34:53.20#ibcon#flushed, iclass 3, count 2 2006.229.16:34:53.20#ibcon#about to write, iclass 3, count 2 2006.229.16:34:53.20#ibcon#wrote, iclass 3, count 2 2006.229.16:34:53.20#ibcon#about to read 3, iclass 3, count 2 2006.229.16:34:53.23#ibcon#read 3, iclass 3, count 2 2006.229.16:34:53.23#ibcon#about to read 4, iclass 3, count 2 2006.229.16:34:53.23#ibcon#read 4, iclass 3, count 2 2006.229.16:34:53.23#ibcon#about to read 5, iclass 3, count 2 2006.229.16:34:53.23#ibcon#read 5, iclass 3, count 2 2006.229.16:34:53.23#ibcon#about to read 6, iclass 3, count 2 2006.229.16:34:53.23#ibcon#read 6, iclass 3, count 2 2006.229.16:34:53.23#ibcon#end of sib2, iclass 3, count 2 2006.229.16:34:53.23#ibcon#*after write, iclass 3, count 2 2006.229.16:34:53.23#ibcon#*before return 0, iclass 3, count 2 2006.229.16:34:53.23#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:53.23#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.16:34:53.23#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.16:34:53.23#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:53.23#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:53.35#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:53.35#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:53.35#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:34:53.35#ibcon#first serial, iclass 3, count 0 2006.229.16:34:53.35#ibcon#enter sib2, iclass 3, count 0 2006.229.16:34:53.35#ibcon#flushed, iclass 3, count 0 2006.229.16:34:53.35#ibcon#about to write, iclass 3, count 0 2006.229.16:34:53.35#ibcon#wrote, iclass 3, count 0 2006.229.16:34:53.35#ibcon#about to read 3, iclass 3, count 0 2006.229.16:34:53.37#ibcon#read 3, iclass 3, count 0 2006.229.16:34:53.37#ibcon#about to read 4, iclass 3, count 0 2006.229.16:34:53.37#ibcon#read 4, iclass 3, count 0 2006.229.16:34:53.37#ibcon#about to read 5, iclass 3, count 0 2006.229.16:34:53.37#ibcon#read 5, iclass 3, count 0 2006.229.16:34:53.37#ibcon#about to read 6, iclass 3, count 0 2006.229.16:34:53.37#ibcon#read 6, iclass 3, count 0 2006.229.16:34:53.37#ibcon#end of sib2, iclass 3, count 0 2006.229.16:34:53.37#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:34:53.37#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:34:53.37#ibcon#[27=USB\r\n] 2006.229.16:34:53.37#ibcon#*before write, iclass 3, count 0 2006.229.16:34:53.37#ibcon#enter sib2, iclass 3, count 0 2006.229.16:34:53.37#ibcon#flushed, iclass 3, count 0 2006.229.16:34:53.37#ibcon#about to write, iclass 3, count 0 2006.229.16:34:53.37#ibcon#wrote, iclass 3, count 0 2006.229.16:34:53.37#ibcon#about to read 3, iclass 3, count 0 2006.229.16:34:53.40#ibcon#read 3, iclass 3, count 0 2006.229.16:34:53.40#ibcon#about to read 4, iclass 3, count 0 2006.229.16:34:53.40#ibcon#read 4, iclass 3, count 0 2006.229.16:34:53.40#ibcon#about to read 5, iclass 3, count 0 2006.229.16:34:53.40#ibcon#read 5, iclass 3, count 0 2006.229.16:34:53.40#ibcon#about to read 6, iclass 3, count 0 2006.229.16:34:53.40#ibcon#read 6, iclass 3, count 0 2006.229.16:34:53.40#ibcon#end of sib2, iclass 3, count 0 2006.229.16:34:53.40#ibcon#*after write, iclass 3, count 0 2006.229.16:34:53.40#ibcon#*before return 0, iclass 3, count 0 2006.229.16:34:53.40#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:53.40#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.16:34:53.40#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:34:53.40#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:34:53.41$vck44/vblo=3,649.99 2006.229.16:34:53.41#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.16:34:53.41#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.16:34:53.41#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:53.41#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:53.41#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:53.41#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:53.41#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:34:53.41#ibcon#first serial, iclass 5, count 0 2006.229.16:34:53.41#ibcon#enter sib2, iclass 5, count 0 2006.229.16:34:53.41#ibcon#flushed, iclass 5, count 0 2006.229.16:34:53.41#ibcon#about to write, iclass 5, count 0 2006.229.16:34:53.41#ibcon#wrote, iclass 5, count 0 2006.229.16:34:53.41#ibcon#about to read 3, iclass 5, count 0 2006.229.16:34:53.42#ibcon#read 3, iclass 5, count 0 2006.229.16:34:53.42#ibcon#about to read 4, iclass 5, count 0 2006.229.16:34:53.42#ibcon#read 4, iclass 5, count 0 2006.229.16:34:53.42#ibcon#about to read 5, iclass 5, count 0 2006.229.16:34:53.42#ibcon#read 5, iclass 5, count 0 2006.229.16:34:53.42#ibcon#about to read 6, iclass 5, count 0 2006.229.16:34:53.42#ibcon#read 6, iclass 5, count 0 2006.229.16:34:53.42#ibcon#end of sib2, iclass 5, count 0 2006.229.16:34:53.42#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:34:53.42#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:34:53.42#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:34:53.42#ibcon#*before write, iclass 5, count 0 2006.229.16:34:53.42#ibcon#enter sib2, iclass 5, count 0 2006.229.16:34:53.42#ibcon#flushed, iclass 5, count 0 2006.229.16:34:53.42#ibcon#about to write, iclass 5, count 0 2006.229.16:34:53.42#ibcon#wrote, iclass 5, count 0 2006.229.16:34:53.42#ibcon#about to read 3, iclass 5, count 0 2006.229.16:34:53.46#ibcon#read 3, iclass 5, count 0 2006.229.16:34:53.46#ibcon#about to read 4, iclass 5, count 0 2006.229.16:34:53.46#ibcon#read 4, iclass 5, count 0 2006.229.16:34:53.46#ibcon#about to read 5, iclass 5, count 0 2006.229.16:34:53.46#ibcon#read 5, iclass 5, count 0 2006.229.16:34:53.46#ibcon#about to read 6, iclass 5, count 0 2006.229.16:34:53.46#ibcon#read 6, iclass 5, count 0 2006.229.16:34:53.46#ibcon#end of sib2, iclass 5, count 0 2006.229.16:34:53.46#ibcon#*after write, iclass 5, count 0 2006.229.16:34:53.46#ibcon#*before return 0, iclass 5, count 0 2006.229.16:34:53.46#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:53.46#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:34:53.46#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:34:53.46#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:34:53.47$vck44/vb=3,4 2006.229.16:34:53.47#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.16:34:53.47#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.16:34:53.47#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:53.47#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:53.51#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:53.51#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:53.51#ibcon#enter wrdev, iclass 7, count 2 2006.229.16:34:53.51#ibcon#first serial, iclass 7, count 2 2006.229.16:34:53.51#ibcon#enter sib2, iclass 7, count 2 2006.229.16:34:53.51#ibcon#flushed, iclass 7, count 2 2006.229.16:34:53.51#ibcon#about to write, iclass 7, count 2 2006.229.16:34:53.51#ibcon#wrote, iclass 7, count 2 2006.229.16:34:53.51#ibcon#about to read 3, iclass 7, count 2 2006.229.16:34:53.53#ibcon#read 3, iclass 7, count 2 2006.229.16:34:53.53#ibcon#about to read 4, iclass 7, count 2 2006.229.16:34:53.53#ibcon#read 4, iclass 7, count 2 2006.229.16:34:53.53#ibcon#about to read 5, iclass 7, count 2 2006.229.16:34:53.53#ibcon#read 5, iclass 7, count 2 2006.229.16:34:53.53#ibcon#about to read 6, iclass 7, count 2 2006.229.16:34:53.53#ibcon#read 6, iclass 7, count 2 2006.229.16:34:53.53#ibcon#end of sib2, iclass 7, count 2 2006.229.16:34:53.53#ibcon#*mode == 0, iclass 7, count 2 2006.229.16:34:53.53#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.16:34:53.53#ibcon#[27=AT03-04\r\n] 2006.229.16:34:53.53#ibcon#*before write, iclass 7, count 2 2006.229.16:34:53.53#ibcon#enter sib2, iclass 7, count 2 2006.229.16:34:53.53#ibcon#flushed, iclass 7, count 2 2006.229.16:34:53.53#ibcon#about to write, iclass 7, count 2 2006.229.16:34:53.53#ibcon#wrote, iclass 7, count 2 2006.229.16:34:53.53#ibcon#about to read 3, iclass 7, count 2 2006.229.16:34:53.56#ibcon#read 3, iclass 7, count 2 2006.229.16:34:53.56#ibcon#about to read 4, iclass 7, count 2 2006.229.16:34:53.56#ibcon#read 4, iclass 7, count 2 2006.229.16:34:53.56#ibcon#about to read 5, iclass 7, count 2 2006.229.16:34:53.56#ibcon#read 5, iclass 7, count 2 2006.229.16:34:53.56#ibcon#about to read 6, iclass 7, count 2 2006.229.16:34:53.56#ibcon#read 6, iclass 7, count 2 2006.229.16:34:53.56#ibcon#end of sib2, iclass 7, count 2 2006.229.16:34:53.56#ibcon#*after write, iclass 7, count 2 2006.229.16:34:53.56#ibcon#*before return 0, iclass 7, count 2 2006.229.16:34:53.56#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:53.56#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.16:34:53.56#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.16:34:53.56#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:53.56#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:53.68#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:53.68#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:53.68#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:34:53.68#ibcon#first serial, iclass 7, count 0 2006.229.16:34:53.68#ibcon#enter sib2, iclass 7, count 0 2006.229.16:34:53.68#ibcon#flushed, iclass 7, count 0 2006.229.16:34:53.68#ibcon#about to write, iclass 7, count 0 2006.229.16:34:53.68#ibcon#wrote, iclass 7, count 0 2006.229.16:34:53.68#ibcon#about to read 3, iclass 7, count 0 2006.229.16:34:53.70#ibcon#read 3, iclass 7, count 0 2006.229.16:34:53.70#ibcon#about to read 4, iclass 7, count 0 2006.229.16:34:53.70#ibcon#read 4, iclass 7, count 0 2006.229.16:34:53.70#ibcon#about to read 5, iclass 7, count 0 2006.229.16:34:53.70#ibcon#read 5, iclass 7, count 0 2006.229.16:34:53.70#ibcon#about to read 6, iclass 7, count 0 2006.229.16:34:53.70#ibcon#read 6, iclass 7, count 0 2006.229.16:34:53.70#ibcon#end of sib2, iclass 7, count 0 2006.229.16:34:53.70#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:34:53.70#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:34:53.70#ibcon#[27=USB\r\n] 2006.229.16:34:53.70#ibcon#*before write, iclass 7, count 0 2006.229.16:34:53.70#ibcon#enter sib2, iclass 7, count 0 2006.229.16:34:53.70#ibcon#flushed, iclass 7, count 0 2006.229.16:34:53.70#ibcon#about to write, iclass 7, count 0 2006.229.16:34:53.70#ibcon#wrote, iclass 7, count 0 2006.229.16:34:53.70#ibcon#about to read 3, iclass 7, count 0 2006.229.16:34:53.73#ibcon#read 3, iclass 7, count 0 2006.229.16:34:53.73#ibcon#about to read 4, iclass 7, count 0 2006.229.16:34:53.73#ibcon#read 4, iclass 7, count 0 2006.229.16:34:53.73#ibcon#about to read 5, iclass 7, count 0 2006.229.16:34:53.73#ibcon#read 5, iclass 7, count 0 2006.229.16:34:53.73#ibcon#about to read 6, iclass 7, count 0 2006.229.16:34:53.73#ibcon#read 6, iclass 7, count 0 2006.229.16:34:53.73#ibcon#end of sib2, iclass 7, count 0 2006.229.16:34:53.73#ibcon#*after write, iclass 7, count 0 2006.229.16:34:53.73#ibcon#*before return 0, iclass 7, count 0 2006.229.16:34:53.73#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:53.73#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.16:34:53.73#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:34:53.73#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:34:53.74$vck44/vblo=4,679.99 2006.229.16:34:53.74#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.16:34:53.74#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.16:34:53.74#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:53.74#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:53.74#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:53.74#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:53.74#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:34:53.74#ibcon#first serial, iclass 11, count 0 2006.229.16:34:53.74#ibcon#enter sib2, iclass 11, count 0 2006.229.16:34:53.74#ibcon#flushed, iclass 11, count 0 2006.229.16:34:53.74#ibcon#about to write, iclass 11, count 0 2006.229.16:34:53.74#ibcon#wrote, iclass 11, count 0 2006.229.16:34:53.74#ibcon#about to read 3, iclass 11, count 0 2006.229.16:34:53.75#ibcon#read 3, iclass 11, count 0 2006.229.16:34:53.75#ibcon#about to read 4, iclass 11, count 0 2006.229.16:34:53.75#ibcon#read 4, iclass 11, count 0 2006.229.16:34:53.75#ibcon#about to read 5, iclass 11, count 0 2006.229.16:34:53.75#ibcon#read 5, iclass 11, count 0 2006.229.16:34:53.75#ibcon#about to read 6, iclass 11, count 0 2006.229.16:34:53.75#ibcon#read 6, iclass 11, count 0 2006.229.16:34:53.75#ibcon#end of sib2, iclass 11, count 0 2006.229.16:34:53.75#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:34:53.75#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:34:53.75#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:34:53.75#ibcon#*before write, iclass 11, count 0 2006.229.16:34:53.75#ibcon#enter sib2, iclass 11, count 0 2006.229.16:34:53.75#ibcon#flushed, iclass 11, count 0 2006.229.16:34:53.75#ibcon#about to write, iclass 11, count 0 2006.229.16:34:53.75#ibcon#wrote, iclass 11, count 0 2006.229.16:34:53.75#ibcon#about to read 3, iclass 11, count 0 2006.229.16:34:53.79#ibcon#read 3, iclass 11, count 0 2006.229.16:34:53.79#ibcon#about to read 4, iclass 11, count 0 2006.229.16:34:53.79#ibcon#read 4, iclass 11, count 0 2006.229.16:34:53.79#ibcon#about to read 5, iclass 11, count 0 2006.229.16:34:53.79#ibcon#read 5, iclass 11, count 0 2006.229.16:34:53.79#ibcon#about to read 6, iclass 11, count 0 2006.229.16:34:53.79#ibcon#read 6, iclass 11, count 0 2006.229.16:34:53.79#ibcon#end of sib2, iclass 11, count 0 2006.229.16:34:53.79#ibcon#*after write, iclass 11, count 0 2006.229.16:34:53.79#ibcon#*before return 0, iclass 11, count 0 2006.229.16:34:53.79#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:53.79#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.16:34:53.79#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:34:53.79#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:34:53.80$vck44/vb=4,4 2006.229.16:34:53.80#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.16:34:53.80#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.16:34:53.80#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:53.80#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:53.84#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:53.84#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:53.84#ibcon#enter wrdev, iclass 13, count 2 2006.229.16:34:53.84#ibcon#first serial, iclass 13, count 2 2006.229.16:34:53.84#ibcon#enter sib2, iclass 13, count 2 2006.229.16:34:53.84#ibcon#flushed, iclass 13, count 2 2006.229.16:34:53.84#ibcon#about to write, iclass 13, count 2 2006.229.16:34:53.84#ibcon#wrote, iclass 13, count 2 2006.229.16:34:53.84#ibcon#about to read 3, iclass 13, count 2 2006.229.16:34:53.86#ibcon#read 3, iclass 13, count 2 2006.229.16:34:53.86#ibcon#about to read 4, iclass 13, count 2 2006.229.16:34:53.86#ibcon#read 4, iclass 13, count 2 2006.229.16:34:53.86#ibcon#about to read 5, iclass 13, count 2 2006.229.16:34:53.86#ibcon#read 5, iclass 13, count 2 2006.229.16:34:53.86#ibcon#about to read 6, iclass 13, count 2 2006.229.16:34:53.86#ibcon#read 6, iclass 13, count 2 2006.229.16:34:53.86#ibcon#end of sib2, iclass 13, count 2 2006.229.16:34:53.86#ibcon#*mode == 0, iclass 13, count 2 2006.229.16:34:53.86#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.16:34:53.86#ibcon#[27=AT04-04\r\n] 2006.229.16:34:53.86#ibcon#*before write, iclass 13, count 2 2006.229.16:34:53.86#ibcon#enter sib2, iclass 13, count 2 2006.229.16:34:53.86#ibcon#flushed, iclass 13, count 2 2006.229.16:34:53.86#ibcon#about to write, iclass 13, count 2 2006.229.16:34:53.86#ibcon#wrote, iclass 13, count 2 2006.229.16:34:53.86#ibcon#about to read 3, iclass 13, count 2 2006.229.16:34:53.89#ibcon#read 3, iclass 13, count 2 2006.229.16:34:53.89#ibcon#about to read 4, iclass 13, count 2 2006.229.16:34:53.89#ibcon#read 4, iclass 13, count 2 2006.229.16:34:53.89#ibcon#about to read 5, iclass 13, count 2 2006.229.16:34:53.89#ibcon#read 5, iclass 13, count 2 2006.229.16:34:53.89#ibcon#about to read 6, iclass 13, count 2 2006.229.16:34:53.89#ibcon#read 6, iclass 13, count 2 2006.229.16:34:53.89#ibcon#end of sib2, iclass 13, count 2 2006.229.16:34:53.89#ibcon#*after write, iclass 13, count 2 2006.229.16:34:53.89#ibcon#*before return 0, iclass 13, count 2 2006.229.16:34:53.89#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:53.89#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.16:34:53.89#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.16:34:53.89#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:53.89#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:54.02#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:54.02#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:54.02#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:34:54.02#ibcon#first serial, iclass 13, count 0 2006.229.16:34:54.02#ibcon#enter sib2, iclass 13, count 0 2006.229.16:34:54.02#ibcon#flushed, iclass 13, count 0 2006.229.16:34:54.02#ibcon#about to write, iclass 13, count 0 2006.229.16:34:54.02#ibcon#wrote, iclass 13, count 0 2006.229.16:34:54.02#ibcon#about to read 3, iclass 13, count 0 2006.229.16:34:54.03#ibcon#read 3, iclass 13, count 0 2006.229.16:34:54.03#ibcon#about to read 4, iclass 13, count 0 2006.229.16:34:54.03#ibcon#read 4, iclass 13, count 0 2006.229.16:34:54.03#ibcon#about to read 5, iclass 13, count 0 2006.229.16:34:54.03#ibcon#read 5, iclass 13, count 0 2006.229.16:34:54.03#ibcon#about to read 6, iclass 13, count 0 2006.229.16:34:54.03#ibcon#read 6, iclass 13, count 0 2006.229.16:34:54.03#ibcon#end of sib2, iclass 13, count 0 2006.229.16:34:54.03#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:34:54.03#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:34:54.03#ibcon#[27=USB\r\n] 2006.229.16:34:54.03#ibcon#*before write, iclass 13, count 0 2006.229.16:34:54.03#ibcon#enter sib2, iclass 13, count 0 2006.229.16:34:54.03#ibcon#flushed, iclass 13, count 0 2006.229.16:34:54.03#ibcon#about to write, iclass 13, count 0 2006.229.16:34:54.03#ibcon#wrote, iclass 13, count 0 2006.229.16:34:54.03#ibcon#about to read 3, iclass 13, count 0 2006.229.16:34:54.06#ibcon#read 3, iclass 13, count 0 2006.229.16:34:54.06#ibcon#about to read 4, iclass 13, count 0 2006.229.16:34:54.06#ibcon#read 4, iclass 13, count 0 2006.229.16:34:54.06#ibcon#about to read 5, iclass 13, count 0 2006.229.16:34:54.06#ibcon#read 5, iclass 13, count 0 2006.229.16:34:54.06#ibcon#about to read 6, iclass 13, count 0 2006.229.16:34:54.06#ibcon#read 6, iclass 13, count 0 2006.229.16:34:54.06#ibcon#end of sib2, iclass 13, count 0 2006.229.16:34:54.06#ibcon#*after write, iclass 13, count 0 2006.229.16:34:54.06#ibcon#*before return 0, iclass 13, count 0 2006.229.16:34:54.06#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:54.06#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.16:34:54.06#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:34:54.06#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:34:54.07$vck44/vblo=5,709.99 2006.229.16:34:54.07#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.16:34:54.07#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.16:34:54.07#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:54.07#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:54.07#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:54.07#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:54.07#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:34:54.07#ibcon#first serial, iclass 15, count 0 2006.229.16:34:54.07#ibcon#enter sib2, iclass 15, count 0 2006.229.16:34:54.07#ibcon#flushed, iclass 15, count 0 2006.229.16:34:54.07#ibcon#about to write, iclass 15, count 0 2006.229.16:34:54.07#ibcon#wrote, iclass 15, count 0 2006.229.16:34:54.07#ibcon#about to read 3, iclass 15, count 0 2006.229.16:34:54.08#ibcon#read 3, iclass 15, count 0 2006.229.16:34:54.08#ibcon#about to read 4, iclass 15, count 0 2006.229.16:34:54.08#ibcon#read 4, iclass 15, count 0 2006.229.16:34:54.08#ibcon#about to read 5, iclass 15, count 0 2006.229.16:34:54.08#ibcon#read 5, iclass 15, count 0 2006.229.16:34:54.08#ibcon#about to read 6, iclass 15, count 0 2006.229.16:34:54.08#ibcon#read 6, iclass 15, count 0 2006.229.16:34:54.08#ibcon#end of sib2, iclass 15, count 0 2006.229.16:34:54.08#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:34:54.08#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:34:54.08#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:34:54.08#ibcon#*before write, iclass 15, count 0 2006.229.16:34:54.08#ibcon#enter sib2, iclass 15, count 0 2006.229.16:34:54.08#ibcon#flushed, iclass 15, count 0 2006.229.16:34:54.08#ibcon#about to write, iclass 15, count 0 2006.229.16:34:54.08#ibcon#wrote, iclass 15, count 0 2006.229.16:34:54.08#ibcon#about to read 3, iclass 15, count 0 2006.229.16:34:54.13#ibcon#read 3, iclass 15, count 0 2006.229.16:34:54.13#ibcon#about to read 4, iclass 15, count 0 2006.229.16:34:54.13#ibcon#read 4, iclass 15, count 0 2006.229.16:34:54.13#ibcon#about to read 5, iclass 15, count 0 2006.229.16:34:54.13#ibcon#read 5, iclass 15, count 0 2006.229.16:34:54.13#ibcon#about to read 6, iclass 15, count 0 2006.229.16:34:54.13#ibcon#read 6, iclass 15, count 0 2006.229.16:34:54.13#ibcon#end of sib2, iclass 15, count 0 2006.229.16:34:54.13#ibcon#*after write, iclass 15, count 0 2006.229.16:34:54.13#ibcon#*before return 0, iclass 15, count 0 2006.229.16:34:54.13#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:54.13#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.16:34:54.13#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:34:54.13#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:34:54.13$vck44/vb=5,4 2006.229.16:34:54.13#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.16:34:54.13#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.16:34:54.13#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:54.13#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:54.17#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:54.17#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:54.17#ibcon#enter wrdev, iclass 17, count 2 2006.229.16:34:54.17#ibcon#first serial, iclass 17, count 2 2006.229.16:34:54.17#ibcon#enter sib2, iclass 17, count 2 2006.229.16:34:54.17#ibcon#flushed, iclass 17, count 2 2006.229.16:34:54.17#ibcon#about to write, iclass 17, count 2 2006.229.16:34:54.17#ibcon#wrote, iclass 17, count 2 2006.229.16:34:54.17#ibcon#about to read 3, iclass 17, count 2 2006.229.16:34:54.19#ibcon#read 3, iclass 17, count 2 2006.229.16:34:54.19#ibcon#about to read 4, iclass 17, count 2 2006.229.16:34:54.19#ibcon#read 4, iclass 17, count 2 2006.229.16:34:54.19#ibcon#about to read 5, iclass 17, count 2 2006.229.16:34:54.19#ibcon#read 5, iclass 17, count 2 2006.229.16:34:54.19#ibcon#about to read 6, iclass 17, count 2 2006.229.16:34:54.19#ibcon#read 6, iclass 17, count 2 2006.229.16:34:54.19#ibcon#end of sib2, iclass 17, count 2 2006.229.16:34:54.19#ibcon#*mode == 0, iclass 17, count 2 2006.229.16:34:54.19#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.16:34:54.19#ibcon#[27=AT05-04\r\n] 2006.229.16:34:54.19#ibcon#*before write, iclass 17, count 2 2006.229.16:34:54.19#ibcon#enter sib2, iclass 17, count 2 2006.229.16:34:54.19#ibcon#flushed, iclass 17, count 2 2006.229.16:34:54.19#ibcon#about to write, iclass 17, count 2 2006.229.16:34:54.19#ibcon#wrote, iclass 17, count 2 2006.229.16:34:54.19#ibcon#about to read 3, iclass 17, count 2 2006.229.16:34:54.22#ibcon#read 3, iclass 17, count 2 2006.229.16:34:54.22#ibcon#about to read 4, iclass 17, count 2 2006.229.16:34:54.22#ibcon#read 4, iclass 17, count 2 2006.229.16:34:54.22#ibcon#about to read 5, iclass 17, count 2 2006.229.16:34:54.22#ibcon#read 5, iclass 17, count 2 2006.229.16:34:54.22#ibcon#about to read 6, iclass 17, count 2 2006.229.16:34:54.22#ibcon#read 6, iclass 17, count 2 2006.229.16:34:54.22#ibcon#end of sib2, iclass 17, count 2 2006.229.16:34:54.22#ibcon#*after write, iclass 17, count 2 2006.229.16:34:54.22#ibcon#*before return 0, iclass 17, count 2 2006.229.16:34:54.22#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:54.22#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.16:34:54.22#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.16:34:54.22#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:54.22#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:54.34#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:54.34#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:54.34#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:34:54.34#ibcon#first serial, iclass 17, count 0 2006.229.16:34:54.34#ibcon#enter sib2, iclass 17, count 0 2006.229.16:34:54.34#ibcon#flushed, iclass 17, count 0 2006.229.16:34:54.34#ibcon#about to write, iclass 17, count 0 2006.229.16:34:54.34#ibcon#wrote, iclass 17, count 0 2006.229.16:34:54.34#ibcon#about to read 3, iclass 17, count 0 2006.229.16:34:54.36#ibcon#read 3, iclass 17, count 0 2006.229.16:34:54.36#ibcon#about to read 4, iclass 17, count 0 2006.229.16:34:54.36#ibcon#read 4, iclass 17, count 0 2006.229.16:34:54.36#ibcon#about to read 5, iclass 17, count 0 2006.229.16:34:54.36#ibcon#read 5, iclass 17, count 0 2006.229.16:34:54.36#ibcon#about to read 6, iclass 17, count 0 2006.229.16:34:54.36#ibcon#read 6, iclass 17, count 0 2006.229.16:34:54.36#ibcon#end of sib2, iclass 17, count 0 2006.229.16:34:54.36#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:34:54.36#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:34:54.36#ibcon#[27=USB\r\n] 2006.229.16:34:54.36#ibcon#*before write, iclass 17, count 0 2006.229.16:34:54.36#ibcon#enter sib2, iclass 17, count 0 2006.229.16:34:54.36#ibcon#flushed, iclass 17, count 0 2006.229.16:34:54.36#ibcon#about to write, iclass 17, count 0 2006.229.16:34:54.36#ibcon#wrote, iclass 17, count 0 2006.229.16:34:54.37#ibcon#about to read 3, iclass 17, count 0 2006.229.16:34:54.39#ibcon#read 3, iclass 17, count 0 2006.229.16:34:54.39#ibcon#about to read 4, iclass 17, count 0 2006.229.16:34:54.39#ibcon#read 4, iclass 17, count 0 2006.229.16:34:54.39#ibcon#about to read 5, iclass 17, count 0 2006.229.16:34:54.39#ibcon#read 5, iclass 17, count 0 2006.229.16:34:54.39#ibcon#about to read 6, iclass 17, count 0 2006.229.16:34:54.39#ibcon#read 6, iclass 17, count 0 2006.229.16:34:54.39#ibcon#end of sib2, iclass 17, count 0 2006.229.16:34:54.39#ibcon#*after write, iclass 17, count 0 2006.229.16:34:54.39#ibcon#*before return 0, iclass 17, count 0 2006.229.16:34:54.39#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:54.39#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.16:34:54.39#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:34:54.39#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:34:54.40$vck44/vblo=6,719.99 2006.229.16:34:54.40#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.16:34:54.40#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.16:34:54.40#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:54.40#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:54.40#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:54.40#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:54.40#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:34:54.40#ibcon#first serial, iclass 19, count 0 2006.229.16:34:54.40#ibcon#enter sib2, iclass 19, count 0 2006.229.16:34:54.40#ibcon#flushed, iclass 19, count 0 2006.229.16:34:54.40#ibcon#about to write, iclass 19, count 0 2006.229.16:34:54.40#ibcon#wrote, iclass 19, count 0 2006.229.16:34:54.40#ibcon#about to read 3, iclass 19, count 0 2006.229.16:34:54.41#ibcon#read 3, iclass 19, count 0 2006.229.16:34:54.41#ibcon#about to read 4, iclass 19, count 0 2006.229.16:34:54.41#ibcon#read 4, iclass 19, count 0 2006.229.16:34:54.41#ibcon#about to read 5, iclass 19, count 0 2006.229.16:34:54.41#ibcon#read 5, iclass 19, count 0 2006.229.16:34:54.41#ibcon#about to read 6, iclass 19, count 0 2006.229.16:34:54.41#ibcon#read 6, iclass 19, count 0 2006.229.16:34:54.41#ibcon#end of sib2, iclass 19, count 0 2006.229.16:34:54.41#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:34:54.41#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:34:54.41#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:34:54.41#ibcon#*before write, iclass 19, count 0 2006.229.16:34:54.41#ibcon#enter sib2, iclass 19, count 0 2006.229.16:34:54.41#ibcon#flushed, iclass 19, count 0 2006.229.16:34:54.41#ibcon#about to write, iclass 19, count 0 2006.229.16:34:54.41#ibcon#wrote, iclass 19, count 0 2006.229.16:34:54.41#ibcon#about to read 3, iclass 19, count 0 2006.229.16:34:54.45#ibcon#read 3, iclass 19, count 0 2006.229.16:34:54.45#ibcon#about to read 4, iclass 19, count 0 2006.229.16:34:54.45#ibcon#read 4, iclass 19, count 0 2006.229.16:34:54.45#ibcon#about to read 5, iclass 19, count 0 2006.229.16:34:54.45#ibcon#read 5, iclass 19, count 0 2006.229.16:34:54.45#ibcon#about to read 6, iclass 19, count 0 2006.229.16:34:54.45#ibcon#read 6, iclass 19, count 0 2006.229.16:34:54.45#ibcon#end of sib2, iclass 19, count 0 2006.229.16:34:54.45#ibcon#*after write, iclass 19, count 0 2006.229.16:34:54.45#ibcon#*before return 0, iclass 19, count 0 2006.229.16:34:54.45#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:54.45#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.16:34:54.45#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:34:54.45#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:34:54.46$vck44/vb=6,4 2006.229.16:34:54.46#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.16:34:54.46#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.16:34:54.46#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:54.46#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:54.50#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:54.50#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:54.50#ibcon#enter wrdev, iclass 21, count 2 2006.229.16:34:54.50#ibcon#first serial, iclass 21, count 2 2006.229.16:34:54.50#ibcon#enter sib2, iclass 21, count 2 2006.229.16:34:54.50#ibcon#flushed, iclass 21, count 2 2006.229.16:34:54.50#ibcon#about to write, iclass 21, count 2 2006.229.16:34:54.50#ibcon#wrote, iclass 21, count 2 2006.229.16:34:54.50#ibcon#about to read 3, iclass 21, count 2 2006.229.16:34:54.52#ibcon#read 3, iclass 21, count 2 2006.229.16:34:54.52#ibcon#about to read 4, iclass 21, count 2 2006.229.16:34:54.52#ibcon#read 4, iclass 21, count 2 2006.229.16:34:54.52#ibcon#about to read 5, iclass 21, count 2 2006.229.16:34:54.52#ibcon#read 5, iclass 21, count 2 2006.229.16:34:54.52#ibcon#about to read 6, iclass 21, count 2 2006.229.16:34:54.52#ibcon#read 6, iclass 21, count 2 2006.229.16:34:54.52#ibcon#end of sib2, iclass 21, count 2 2006.229.16:34:54.52#ibcon#*mode == 0, iclass 21, count 2 2006.229.16:34:54.52#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.16:34:54.52#ibcon#[27=AT06-04\r\n] 2006.229.16:34:54.52#ibcon#*before write, iclass 21, count 2 2006.229.16:34:54.52#ibcon#enter sib2, iclass 21, count 2 2006.229.16:34:54.52#ibcon#flushed, iclass 21, count 2 2006.229.16:34:54.52#ibcon#about to write, iclass 21, count 2 2006.229.16:34:54.52#ibcon#wrote, iclass 21, count 2 2006.229.16:34:54.52#ibcon#about to read 3, iclass 21, count 2 2006.229.16:34:54.55#ibcon#read 3, iclass 21, count 2 2006.229.16:34:54.55#ibcon#about to read 4, iclass 21, count 2 2006.229.16:34:54.55#ibcon#read 4, iclass 21, count 2 2006.229.16:34:54.55#ibcon#about to read 5, iclass 21, count 2 2006.229.16:34:54.55#ibcon#read 5, iclass 21, count 2 2006.229.16:34:54.55#ibcon#about to read 6, iclass 21, count 2 2006.229.16:34:54.55#ibcon#read 6, iclass 21, count 2 2006.229.16:34:54.55#ibcon#end of sib2, iclass 21, count 2 2006.229.16:34:54.55#ibcon#*after write, iclass 21, count 2 2006.229.16:34:54.55#ibcon#*before return 0, iclass 21, count 2 2006.229.16:34:54.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:54.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.16:34:54.55#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.16:34:54.55#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:54.55#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:54.67#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:54.67#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:54.67#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:34:54.67#ibcon#first serial, iclass 21, count 0 2006.229.16:34:54.67#ibcon#enter sib2, iclass 21, count 0 2006.229.16:34:54.67#ibcon#flushed, iclass 21, count 0 2006.229.16:34:54.67#ibcon#about to write, iclass 21, count 0 2006.229.16:34:54.67#ibcon#wrote, iclass 21, count 0 2006.229.16:34:54.67#ibcon#about to read 3, iclass 21, count 0 2006.229.16:34:54.69#ibcon#read 3, iclass 21, count 0 2006.229.16:34:54.69#ibcon#about to read 4, iclass 21, count 0 2006.229.16:34:54.69#ibcon#read 4, iclass 21, count 0 2006.229.16:34:54.69#ibcon#about to read 5, iclass 21, count 0 2006.229.16:34:54.69#ibcon#read 5, iclass 21, count 0 2006.229.16:34:54.69#ibcon#about to read 6, iclass 21, count 0 2006.229.16:34:54.69#ibcon#read 6, iclass 21, count 0 2006.229.16:34:54.69#ibcon#end of sib2, iclass 21, count 0 2006.229.16:34:54.69#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:34:54.69#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:34:54.69#ibcon#[27=USB\r\n] 2006.229.16:34:54.69#ibcon#*before write, iclass 21, count 0 2006.229.16:34:54.69#ibcon#enter sib2, iclass 21, count 0 2006.229.16:34:54.69#ibcon#flushed, iclass 21, count 0 2006.229.16:34:54.69#ibcon#about to write, iclass 21, count 0 2006.229.16:34:54.69#ibcon#wrote, iclass 21, count 0 2006.229.16:34:54.69#ibcon#about to read 3, iclass 21, count 0 2006.229.16:34:54.72#ibcon#read 3, iclass 21, count 0 2006.229.16:34:54.72#ibcon#about to read 4, iclass 21, count 0 2006.229.16:34:54.72#ibcon#read 4, iclass 21, count 0 2006.229.16:34:54.72#ibcon#about to read 5, iclass 21, count 0 2006.229.16:34:54.72#ibcon#read 5, iclass 21, count 0 2006.229.16:34:54.72#ibcon#about to read 6, iclass 21, count 0 2006.229.16:34:54.72#ibcon#read 6, iclass 21, count 0 2006.229.16:34:54.72#ibcon#end of sib2, iclass 21, count 0 2006.229.16:34:54.72#ibcon#*after write, iclass 21, count 0 2006.229.16:34:54.72#ibcon#*before return 0, iclass 21, count 0 2006.229.16:34:54.72#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:54.72#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.16:34:54.72#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:34:54.72#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:34:54.73$vck44/vblo=7,734.99 2006.229.16:34:54.73#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.16:34:54.73#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.16:34:54.73#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:54.73#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:54.73#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:54.73#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:54.73#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:34:54.73#ibcon#first serial, iclass 23, count 0 2006.229.16:34:54.73#ibcon#enter sib2, iclass 23, count 0 2006.229.16:34:54.73#ibcon#flushed, iclass 23, count 0 2006.229.16:34:54.73#ibcon#about to write, iclass 23, count 0 2006.229.16:34:54.73#ibcon#wrote, iclass 23, count 0 2006.229.16:34:54.73#ibcon#about to read 3, iclass 23, count 0 2006.229.16:34:54.74#ibcon#read 3, iclass 23, count 0 2006.229.16:34:54.74#ibcon#about to read 4, iclass 23, count 0 2006.229.16:34:54.74#ibcon#read 4, iclass 23, count 0 2006.229.16:34:54.74#ibcon#about to read 5, iclass 23, count 0 2006.229.16:34:54.74#ibcon#read 5, iclass 23, count 0 2006.229.16:34:54.74#ibcon#about to read 6, iclass 23, count 0 2006.229.16:34:54.74#ibcon#read 6, iclass 23, count 0 2006.229.16:34:54.74#ibcon#end of sib2, iclass 23, count 0 2006.229.16:34:54.74#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:34:54.74#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:34:54.74#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:34:54.74#ibcon#*before write, iclass 23, count 0 2006.229.16:34:54.74#ibcon#enter sib2, iclass 23, count 0 2006.229.16:34:54.74#ibcon#flushed, iclass 23, count 0 2006.229.16:34:54.74#ibcon#about to write, iclass 23, count 0 2006.229.16:34:54.74#ibcon#wrote, iclass 23, count 0 2006.229.16:34:54.74#ibcon#about to read 3, iclass 23, count 0 2006.229.16:34:54.78#ibcon#read 3, iclass 23, count 0 2006.229.16:34:54.78#ibcon#about to read 4, iclass 23, count 0 2006.229.16:34:54.78#ibcon#read 4, iclass 23, count 0 2006.229.16:34:54.78#ibcon#about to read 5, iclass 23, count 0 2006.229.16:34:54.78#ibcon#read 5, iclass 23, count 0 2006.229.16:34:54.78#ibcon#about to read 6, iclass 23, count 0 2006.229.16:34:54.78#ibcon#read 6, iclass 23, count 0 2006.229.16:34:54.78#ibcon#end of sib2, iclass 23, count 0 2006.229.16:34:54.78#ibcon#*after write, iclass 23, count 0 2006.229.16:34:54.78#ibcon#*before return 0, iclass 23, count 0 2006.229.16:34:54.78#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:54.78#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.16:34:54.78#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:34:54.78#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:34:54.79$vck44/vb=7,4 2006.229.16:34:54.79#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.16:34:54.79#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.16:34:54.79#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:54.79#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:54.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:54.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:54.83#ibcon#enter wrdev, iclass 25, count 2 2006.229.16:34:54.83#ibcon#first serial, iclass 25, count 2 2006.229.16:34:54.83#ibcon#enter sib2, iclass 25, count 2 2006.229.16:34:54.83#ibcon#flushed, iclass 25, count 2 2006.229.16:34:54.83#ibcon#about to write, iclass 25, count 2 2006.229.16:34:54.83#ibcon#wrote, iclass 25, count 2 2006.229.16:34:54.83#ibcon#about to read 3, iclass 25, count 2 2006.229.16:34:54.85#ibcon#read 3, iclass 25, count 2 2006.229.16:34:54.85#ibcon#about to read 4, iclass 25, count 2 2006.229.16:34:54.85#ibcon#read 4, iclass 25, count 2 2006.229.16:34:54.85#ibcon#about to read 5, iclass 25, count 2 2006.229.16:34:54.85#ibcon#read 5, iclass 25, count 2 2006.229.16:34:54.85#ibcon#about to read 6, iclass 25, count 2 2006.229.16:34:54.85#ibcon#read 6, iclass 25, count 2 2006.229.16:34:54.85#ibcon#end of sib2, iclass 25, count 2 2006.229.16:34:54.85#ibcon#*mode == 0, iclass 25, count 2 2006.229.16:34:54.85#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.16:34:54.85#ibcon#[27=AT07-04\r\n] 2006.229.16:34:54.85#ibcon#*before write, iclass 25, count 2 2006.229.16:34:54.85#ibcon#enter sib2, iclass 25, count 2 2006.229.16:34:54.85#ibcon#flushed, iclass 25, count 2 2006.229.16:34:54.85#ibcon#about to write, iclass 25, count 2 2006.229.16:34:54.85#ibcon#wrote, iclass 25, count 2 2006.229.16:34:54.85#ibcon#about to read 3, iclass 25, count 2 2006.229.16:34:54.88#ibcon#read 3, iclass 25, count 2 2006.229.16:34:54.88#ibcon#about to read 4, iclass 25, count 2 2006.229.16:34:54.88#ibcon#read 4, iclass 25, count 2 2006.229.16:34:54.88#ibcon#about to read 5, iclass 25, count 2 2006.229.16:34:54.88#ibcon#read 5, iclass 25, count 2 2006.229.16:34:54.88#ibcon#about to read 6, iclass 25, count 2 2006.229.16:34:54.88#ibcon#read 6, iclass 25, count 2 2006.229.16:34:54.88#ibcon#end of sib2, iclass 25, count 2 2006.229.16:34:54.88#ibcon#*after write, iclass 25, count 2 2006.229.16:34:54.88#ibcon#*before return 0, iclass 25, count 2 2006.229.16:34:54.88#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:54.88#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.16:34:54.88#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.16:34:54.88#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:54.88#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:55.01#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:55.01#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:55.01#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:34:55.01#ibcon#first serial, iclass 25, count 0 2006.229.16:34:55.01#ibcon#enter sib2, iclass 25, count 0 2006.229.16:34:55.01#ibcon#flushed, iclass 25, count 0 2006.229.16:34:55.01#ibcon#about to write, iclass 25, count 0 2006.229.16:34:55.01#ibcon#wrote, iclass 25, count 0 2006.229.16:34:55.01#ibcon#about to read 3, iclass 25, count 0 2006.229.16:34:55.02#ibcon#read 3, iclass 25, count 0 2006.229.16:34:55.02#ibcon#about to read 4, iclass 25, count 0 2006.229.16:34:55.02#ibcon#read 4, iclass 25, count 0 2006.229.16:34:55.02#ibcon#about to read 5, iclass 25, count 0 2006.229.16:34:55.02#ibcon#read 5, iclass 25, count 0 2006.229.16:34:55.02#ibcon#about to read 6, iclass 25, count 0 2006.229.16:34:55.02#ibcon#read 6, iclass 25, count 0 2006.229.16:34:55.02#ibcon#end of sib2, iclass 25, count 0 2006.229.16:34:55.02#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:34:55.02#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:34:55.02#ibcon#[27=USB\r\n] 2006.229.16:34:55.02#ibcon#*before write, iclass 25, count 0 2006.229.16:34:55.02#ibcon#enter sib2, iclass 25, count 0 2006.229.16:34:55.02#ibcon#flushed, iclass 25, count 0 2006.229.16:34:55.02#ibcon#about to write, iclass 25, count 0 2006.229.16:34:55.02#ibcon#wrote, iclass 25, count 0 2006.229.16:34:55.02#ibcon#about to read 3, iclass 25, count 0 2006.229.16:34:55.05#ibcon#read 3, iclass 25, count 0 2006.229.16:34:55.05#ibcon#about to read 4, iclass 25, count 0 2006.229.16:34:55.05#ibcon#read 4, iclass 25, count 0 2006.229.16:34:55.05#ibcon#about to read 5, iclass 25, count 0 2006.229.16:34:55.05#ibcon#read 5, iclass 25, count 0 2006.229.16:34:55.05#ibcon#about to read 6, iclass 25, count 0 2006.229.16:34:55.05#ibcon#read 6, iclass 25, count 0 2006.229.16:34:55.05#ibcon#end of sib2, iclass 25, count 0 2006.229.16:34:55.05#ibcon#*after write, iclass 25, count 0 2006.229.16:34:55.05#ibcon#*before return 0, iclass 25, count 0 2006.229.16:34:55.05#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:55.05#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.16:34:55.05#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:34:55.05#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:34:55.06$vck44/vblo=8,744.99 2006.229.16:34:55.06#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.16:34:55.06#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.16:34:55.06#ibcon#ireg 17 cls_cnt 0 2006.229.16:34:55.06#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:55.06#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:55.06#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:55.06#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:34:55.06#ibcon#first serial, iclass 27, count 0 2006.229.16:34:55.06#ibcon#enter sib2, iclass 27, count 0 2006.229.16:34:55.06#ibcon#flushed, iclass 27, count 0 2006.229.16:34:55.06#ibcon#about to write, iclass 27, count 0 2006.229.16:34:55.06#ibcon#wrote, iclass 27, count 0 2006.229.16:34:55.06#ibcon#about to read 3, iclass 27, count 0 2006.229.16:34:55.07#ibcon#read 3, iclass 27, count 0 2006.229.16:34:55.07#ibcon#about to read 4, iclass 27, count 0 2006.229.16:34:55.07#ibcon#read 4, iclass 27, count 0 2006.229.16:34:55.07#ibcon#about to read 5, iclass 27, count 0 2006.229.16:34:55.07#ibcon#read 5, iclass 27, count 0 2006.229.16:34:55.07#ibcon#about to read 6, iclass 27, count 0 2006.229.16:34:55.07#ibcon#read 6, iclass 27, count 0 2006.229.16:34:55.07#ibcon#end of sib2, iclass 27, count 0 2006.229.16:34:55.07#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:34:55.07#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:34:55.07#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:34:55.07#ibcon#*before write, iclass 27, count 0 2006.229.16:34:55.07#ibcon#enter sib2, iclass 27, count 0 2006.229.16:34:55.07#ibcon#flushed, iclass 27, count 0 2006.229.16:34:55.07#ibcon#about to write, iclass 27, count 0 2006.229.16:34:55.07#ibcon#wrote, iclass 27, count 0 2006.229.16:34:55.07#ibcon#about to read 3, iclass 27, count 0 2006.229.16:34:55.11#ibcon#read 3, iclass 27, count 0 2006.229.16:34:55.11#ibcon#about to read 4, iclass 27, count 0 2006.229.16:34:55.11#ibcon#read 4, iclass 27, count 0 2006.229.16:34:55.11#ibcon#about to read 5, iclass 27, count 0 2006.229.16:34:55.11#ibcon#read 5, iclass 27, count 0 2006.229.16:34:55.11#ibcon#about to read 6, iclass 27, count 0 2006.229.16:34:55.11#ibcon#read 6, iclass 27, count 0 2006.229.16:34:55.11#ibcon#end of sib2, iclass 27, count 0 2006.229.16:34:55.11#ibcon#*after write, iclass 27, count 0 2006.229.16:34:55.11#ibcon#*before return 0, iclass 27, count 0 2006.229.16:34:55.11#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:55.11#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.16:34:55.11#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:34:55.11#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:34:55.12$vck44/vb=8,4 2006.229.16:34:55.12#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.16:34:55.12#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.16:34:55.12#ibcon#ireg 11 cls_cnt 2 2006.229.16:34:55.12#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:55.16#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:55.16#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:55.16#ibcon#enter wrdev, iclass 29, count 2 2006.229.16:34:55.16#ibcon#first serial, iclass 29, count 2 2006.229.16:34:55.16#ibcon#enter sib2, iclass 29, count 2 2006.229.16:34:55.16#ibcon#flushed, iclass 29, count 2 2006.229.16:34:55.16#ibcon#about to write, iclass 29, count 2 2006.229.16:34:55.16#ibcon#wrote, iclass 29, count 2 2006.229.16:34:55.16#ibcon#about to read 3, iclass 29, count 2 2006.229.16:34:55.18#ibcon#read 3, iclass 29, count 2 2006.229.16:34:55.18#ibcon#about to read 4, iclass 29, count 2 2006.229.16:34:55.18#ibcon#read 4, iclass 29, count 2 2006.229.16:34:55.18#ibcon#about to read 5, iclass 29, count 2 2006.229.16:34:55.18#ibcon#read 5, iclass 29, count 2 2006.229.16:34:55.18#ibcon#about to read 6, iclass 29, count 2 2006.229.16:34:55.18#ibcon#read 6, iclass 29, count 2 2006.229.16:34:55.18#ibcon#end of sib2, iclass 29, count 2 2006.229.16:34:55.18#ibcon#*mode == 0, iclass 29, count 2 2006.229.16:34:55.18#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.16:34:55.18#ibcon#[27=AT08-04\r\n] 2006.229.16:34:55.18#ibcon#*before write, iclass 29, count 2 2006.229.16:34:55.18#ibcon#enter sib2, iclass 29, count 2 2006.229.16:34:55.18#ibcon#flushed, iclass 29, count 2 2006.229.16:34:55.18#ibcon#about to write, iclass 29, count 2 2006.229.16:34:55.18#ibcon#wrote, iclass 29, count 2 2006.229.16:34:55.18#ibcon#about to read 3, iclass 29, count 2 2006.229.16:34:55.21#ibcon#read 3, iclass 29, count 2 2006.229.16:34:55.21#ibcon#about to read 4, iclass 29, count 2 2006.229.16:34:55.21#ibcon#read 4, iclass 29, count 2 2006.229.16:34:55.21#ibcon#about to read 5, iclass 29, count 2 2006.229.16:34:55.21#ibcon#read 5, iclass 29, count 2 2006.229.16:34:55.21#ibcon#about to read 6, iclass 29, count 2 2006.229.16:34:55.21#ibcon#read 6, iclass 29, count 2 2006.229.16:34:55.21#ibcon#end of sib2, iclass 29, count 2 2006.229.16:34:55.21#ibcon#*after write, iclass 29, count 2 2006.229.16:34:55.21#ibcon#*before return 0, iclass 29, count 2 2006.229.16:34:55.21#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:55.21#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.16:34:55.21#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.16:34:55.21#ibcon#ireg 7 cls_cnt 0 2006.229.16:34:55.21#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:55.33#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:55.33#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:55.33#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:34:55.33#ibcon#first serial, iclass 29, count 0 2006.229.16:34:55.33#ibcon#enter sib2, iclass 29, count 0 2006.229.16:34:55.33#ibcon#flushed, iclass 29, count 0 2006.229.16:34:55.33#ibcon#about to write, iclass 29, count 0 2006.229.16:34:55.33#ibcon#wrote, iclass 29, count 0 2006.229.16:34:55.33#ibcon#about to read 3, iclass 29, count 0 2006.229.16:34:55.35#ibcon#read 3, iclass 29, count 0 2006.229.16:34:55.35#ibcon#about to read 4, iclass 29, count 0 2006.229.16:34:55.35#ibcon#read 4, iclass 29, count 0 2006.229.16:34:55.35#ibcon#about to read 5, iclass 29, count 0 2006.229.16:34:55.35#ibcon#read 5, iclass 29, count 0 2006.229.16:34:55.35#ibcon#about to read 6, iclass 29, count 0 2006.229.16:34:55.35#ibcon#read 6, iclass 29, count 0 2006.229.16:34:55.35#ibcon#end of sib2, iclass 29, count 0 2006.229.16:34:55.35#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:34:55.35#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:34:55.35#ibcon#[27=USB\r\n] 2006.229.16:34:55.35#ibcon#*before write, iclass 29, count 0 2006.229.16:34:55.35#ibcon#enter sib2, iclass 29, count 0 2006.229.16:34:55.35#ibcon#flushed, iclass 29, count 0 2006.229.16:34:55.35#ibcon#about to write, iclass 29, count 0 2006.229.16:34:55.35#ibcon#wrote, iclass 29, count 0 2006.229.16:34:55.35#ibcon#about to read 3, iclass 29, count 0 2006.229.16:34:55.38#ibcon#read 3, iclass 29, count 0 2006.229.16:34:55.38#ibcon#about to read 4, iclass 29, count 0 2006.229.16:34:55.38#ibcon#read 4, iclass 29, count 0 2006.229.16:34:55.38#ibcon#about to read 5, iclass 29, count 0 2006.229.16:34:55.38#ibcon#read 5, iclass 29, count 0 2006.229.16:34:55.38#ibcon#about to read 6, iclass 29, count 0 2006.229.16:34:55.38#ibcon#read 6, iclass 29, count 0 2006.229.16:34:55.38#ibcon#end of sib2, iclass 29, count 0 2006.229.16:34:55.38#ibcon#*after write, iclass 29, count 0 2006.229.16:34:55.38#ibcon#*before return 0, iclass 29, count 0 2006.229.16:34:55.38#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:55.38#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.16:34:55.38#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:34:55.38#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:34:55.39$vck44/vabw=wide 2006.229.16:34:55.39#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.16:34:55.39#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.16:34:55.39#ibcon#ireg 8 cls_cnt 0 2006.229.16:34:55.39#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:55.39#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:55.39#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:55.39#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:34:55.39#ibcon#first serial, iclass 31, count 0 2006.229.16:34:55.39#ibcon#enter sib2, iclass 31, count 0 2006.229.16:34:55.39#ibcon#flushed, iclass 31, count 0 2006.229.16:34:55.39#ibcon#about to write, iclass 31, count 0 2006.229.16:34:55.39#ibcon#wrote, iclass 31, count 0 2006.229.16:34:55.39#ibcon#about to read 3, iclass 31, count 0 2006.229.16:34:55.40#ibcon#read 3, iclass 31, count 0 2006.229.16:34:55.40#ibcon#about to read 4, iclass 31, count 0 2006.229.16:34:55.40#ibcon#read 4, iclass 31, count 0 2006.229.16:34:55.40#ibcon#about to read 5, iclass 31, count 0 2006.229.16:34:55.40#ibcon#read 5, iclass 31, count 0 2006.229.16:34:55.40#ibcon#about to read 6, iclass 31, count 0 2006.229.16:34:55.40#ibcon#read 6, iclass 31, count 0 2006.229.16:34:55.40#ibcon#end of sib2, iclass 31, count 0 2006.229.16:34:55.40#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:34:55.40#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:34:55.40#ibcon#[25=BW32\r\n] 2006.229.16:34:55.40#ibcon#*before write, iclass 31, count 0 2006.229.16:34:55.40#ibcon#enter sib2, iclass 31, count 0 2006.229.16:34:55.40#ibcon#flushed, iclass 31, count 0 2006.229.16:34:55.40#ibcon#about to write, iclass 31, count 0 2006.229.16:34:55.40#ibcon#wrote, iclass 31, count 0 2006.229.16:34:55.40#ibcon#about to read 3, iclass 31, count 0 2006.229.16:34:55.43#ibcon#read 3, iclass 31, count 0 2006.229.16:34:55.43#ibcon#about to read 4, iclass 31, count 0 2006.229.16:34:55.43#ibcon#read 4, iclass 31, count 0 2006.229.16:34:55.43#ibcon#about to read 5, iclass 31, count 0 2006.229.16:34:55.43#ibcon#read 5, iclass 31, count 0 2006.229.16:34:55.43#ibcon#about to read 6, iclass 31, count 0 2006.229.16:34:55.43#ibcon#read 6, iclass 31, count 0 2006.229.16:34:55.43#ibcon#end of sib2, iclass 31, count 0 2006.229.16:34:55.43#ibcon#*after write, iclass 31, count 0 2006.229.16:34:55.43#ibcon#*before return 0, iclass 31, count 0 2006.229.16:34:55.43#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:55.43#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.16:34:55.43#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:34:55.43#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:34:55.44$vck44/vbbw=wide 2006.229.16:34:55.44#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:34:55.44#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:34:55.44#ibcon#ireg 8 cls_cnt 0 2006.229.16:34:55.44#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:34:55.49#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:34:55.49#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:34:55.49#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:34:55.49#ibcon#first serial, iclass 33, count 0 2006.229.16:34:55.49#ibcon#enter sib2, iclass 33, count 0 2006.229.16:34:55.49#ibcon#flushed, iclass 33, count 0 2006.229.16:34:55.49#ibcon#about to write, iclass 33, count 0 2006.229.16:34:55.49#ibcon#wrote, iclass 33, count 0 2006.229.16:34:55.49#ibcon#about to read 3, iclass 33, count 0 2006.229.16:34:55.51#ibcon#read 3, iclass 33, count 0 2006.229.16:34:55.51#ibcon#about to read 4, iclass 33, count 0 2006.229.16:34:55.51#ibcon#read 4, iclass 33, count 0 2006.229.16:34:55.51#ibcon#about to read 5, iclass 33, count 0 2006.229.16:34:55.51#ibcon#read 5, iclass 33, count 0 2006.229.16:34:55.51#ibcon#about to read 6, iclass 33, count 0 2006.229.16:34:55.51#ibcon#read 6, iclass 33, count 0 2006.229.16:34:55.51#ibcon#end of sib2, iclass 33, count 0 2006.229.16:34:55.51#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:34:55.51#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:34:55.51#ibcon#[27=BW32\r\n] 2006.229.16:34:55.51#ibcon#*before write, iclass 33, count 0 2006.229.16:34:55.51#ibcon#enter sib2, iclass 33, count 0 2006.229.16:34:55.51#ibcon#flushed, iclass 33, count 0 2006.229.16:34:55.51#ibcon#about to write, iclass 33, count 0 2006.229.16:34:55.51#ibcon#wrote, iclass 33, count 0 2006.229.16:34:55.51#ibcon#about to read 3, iclass 33, count 0 2006.229.16:34:55.54#ibcon#read 3, iclass 33, count 0 2006.229.16:34:55.54#ibcon#about to read 4, iclass 33, count 0 2006.229.16:34:55.54#ibcon#read 4, iclass 33, count 0 2006.229.16:34:55.54#ibcon#about to read 5, iclass 33, count 0 2006.229.16:34:55.54#ibcon#read 5, iclass 33, count 0 2006.229.16:34:55.54#ibcon#about to read 6, iclass 33, count 0 2006.229.16:34:55.54#ibcon#read 6, iclass 33, count 0 2006.229.16:34:55.54#ibcon#end of sib2, iclass 33, count 0 2006.229.16:34:55.54#ibcon#*after write, iclass 33, count 0 2006.229.16:34:55.54#ibcon#*before return 0, iclass 33, count 0 2006.229.16:34:55.54#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:34:55.54#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:34:55.54#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:34:55.54#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:34:55.55$setupk4/ifdk4 2006.229.16:34:55.55$ifdk4/lo= 2006.229.16:34:55.55$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:34:55.55$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:34:55.55$ifdk4/patch= 2006.229.16:34:55.55$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:34:55.55$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:34:55.55$setupk4/!*+20s 2006.229.16:34:58.71#abcon#<5=/05 1.2 1.8 27.151001001.8\r\n> 2006.229.16:34:58.72#abcon#{5=INTERFACE CLEAR} 2006.229.16:34:58.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:35:01.14#trakl#Source acquired 2006.229.16:35:03.14#flagr#flagr/antenna,acquired 2006.229.16:35:08.87#abcon#<5=/05 1.3 1.9 27.151001001.8\r\n> 2006.229.16:35:08.89#abcon#{5=INTERFACE CLEAR} 2006.229.16:35:08.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:35:10.22$setupk4/"tpicd 2006.229.16:35:10.22$setupk4/echo=off 2006.229.16:35:10.22$setupk4/xlog=off 2006.229.16:35:10.23:!2006.229.16:35:21 2006.229.16:35:21.02:preob 2006.229.16:35:22.15/onsource/TRACKING 2006.229.16:35:22.15:!2006.229.16:35:31 2006.229.16:35:31.02:"tape 2006.229.16:35:31.02:"st=record 2006.229.16:35:31.02:data_valid=on 2006.229.16:35:31.02:midob 2006.229.16:35:32.15/onsource/TRACKING 2006.229.16:35:32.15/wx/27.15,1001.8,100 2006.229.16:35:32.21/cable/+6.4148E-03 2006.229.16:35:33.30/va/01,08,usb,yes,37,40 2006.229.16:35:33.30/va/02,07,usb,yes,40,41 2006.229.16:35:33.30/va/03,06,usb,yes,50,53 2006.229.16:35:33.30/va/04,07,usb,yes,42,44 2006.229.16:35:33.30/va/05,04,usb,yes,37,38 2006.229.16:35:33.30/va/06,04,usb,yes,42,41 2006.229.16:35:33.30/va/07,05,usb,yes,37,38 2006.229.16:35:33.30/va/08,06,usb,yes,27,33 2006.229.16:35:33.53/valo/01,524.99,yes,locked 2006.229.16:35:33.53/valo/02,534.99,yes,locked 2006.229.16:35:33.53/valo/03,564.99,yes,locked 2006.229.16:35:33.53/valo/04,624.99,yes,locked 2006.229.16:35:33.53/valo/05,734.99,yes,locked 2006.229.16:35:33.53/valo/06,814.99,yes,locked 2006.229.16:35:33.53/valo/07,864.99,yes,locked 2006.229.16:35:33.53/valo/08,884.99,yes,locked 2006.229.16:35:34.62/vb/01,04,usb,yes,35,33 2006.229.16:35:34.62/vb/02,04,usb,yes,38,38 2006.229.16:35:34.62/vb/03,04,usb,yes,35,38 2006.229.16:35:34.62/vb/04,04,usb,yes,40,38 2006.229.16:35:34.62/vb/05,04,usb,yes,31,34 2006.229.16:35:34.62/vb/06,04,usb,yes,36,32 2006.229.16:35:34.62/vb/07,04,usb,yes,36,36 2006.229.16:35:34.62/vb/08,04,usb,yes,33,37 2006.229.16:35:34.86/vblo/01,629.99,yes,locked 2006.229.16:35:34.86/vblo/02,634.99,yes,locked 2006.229.16:35:34.86/vblo/03,649.99,yes,locked 2006.229.16:35:34.86/vblo/04,679.99,yes,locked 2006.229.16:35:34.86/vblo/05,709.99,yes,locked 2006.229.16:35:34.86/vblo/06,719.99,yes,locked 2006.229.16:35:34.86/vblo/07,734.99,yes,locked 2006.229.16:35:34.86/vblo/08,744.99,yes,locked 2006.229.16:35:35.01/vabw/8 2006.229.16:35:35.16/vbbw/8 2006.229.16:35:35.25/xfe/off,on,12.0 2006.229.16:35:35.63/ifatt/23,28,28,28 2006.229.16:35:36.07/fmout-gps/S +4.55E-07 2006.229.16:35:36.12:!2006.229.16:46:51 2006.229.16:46:51.00:data_valid=off 2006.229.16:46:51.00:"et 2006.229.16:46:51.00:!+3s 2006.229.16:46:54.01:"tape 2006.229.16:46:54.01:postob 2006.229.16:46:54.17/cable/+6.4141E-03 2006.229.16:46:54.17/wx/27.10,1001.7,100 2006.229.16:46:55.08/fmout-gps/S +4.51E-07 2006.229.16:46:55.08:scan_name=229-1648,jd0608,140 2006.229.16:46:55.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.16:46:56.14#flagr#flagr/antenna,new-source 2006.229.16:46:56.14:checkk5 2006.229.16:46:56.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:46:56.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:46:57.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:46:57.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:46:58.47/chk_obsdata//k5ts1/T2291635??a.dat file size is correct (nominal:2720MB, actual:2716MB). 2006.229.16:46:59.20/chk_obsdata//k5ts2/T2291635??b.dat file size is correct (nominal:2720MB, actual:2716MB). 2006.229.16:46:59.90/chk_obsdata//k5ts3/T2291635??c.dat file size is correct (nominal:2720MB, actual:2716MB). 2006.229.16:47:00.60/chk_obsdata//k5ts4/T2291635??d.dat file size is correct (nominal:2720MB, actual:2716MB). 2006.229.16:47:01.34/k5log//k5ts1_log_newline 2006.229.16:47:02.05/k5log//k5ts2_log_newline 2006.229.16:47:02.75/k5log//k5ts3_log_newline 2006.229.16:47:03.47/k5log//k5ts4_log_newline 2006.229.16:47:03.50/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:47:03.50:setupk4=1 2006.229.16:47:03.50$setupk4/echo=on 2006.229.16:47:03.50$setupk4/pcalon 2006.229.16:47:03.50$pcalon/"no phase cal control is implemented here 2006.229.16:47:03.50$setupk4/"tpicd=stop 2006.229.16:47:03.50$setupk4/"rec=synch_on 2006.229.16:47:03.50$setupk4/"rec_mode=128 2006.229.16:47:03.50$setupk4/!* 2006.229.16:47:03.50$setupk4/recpk4 2006.229.16:47:03.50$recpk4/recpatch= 2006.229.16:47:03.50$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:47:03.50$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:47:03.50$setupk4/vck44 2006.229.16:47:03.50$vck44/valo=1,524.99 2006.229.16:47:03.50#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.16:47:03.50#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.16:47:03.50#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:03.50#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:03.50#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:03.50#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:03.50#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:47:03.50#ibcon#first serial, iclass 38, count 0 2006.229.16:47:03.50#ibcon#enter sib2, iclass 38, count 0 2006.229.16:47:03.50#ibcon#flushed, iclass 38, count 0 2006.229.16:47:03.50#ibcon#about to write, iclass 38, count 0 2006.229.16:47:03.50#ibcon#wrote, iclass 38, count 0 2006.229.16:47:03.50#ibcon#about to read 3, iclass 38, count 0 2006.229.16:47:03.52#ibcon#read 3, iclass 38, count 0 2006.229.16:47:03.52#ibcon#about to read 4, iclass 38, count 0 2006.229.16:47:03.52#ibcon#read 4, iclass 38, count 0 2006.229.16:47:03.52#ibcon#about to read 5, iclass 38, count 0 2006.229.16:47:03.52#ibcon#read 5, iclass 38, count 0 2006.229.16:47:03.52#ibcon#about to read 6, iclass 38, count 0 2006.229.16:47:03.52#ibcon#read 6, iclass 38, count 0 2006.229.16:47:03.52#ibcon#end of sib2, iclass 38, count 0 2006.229.16:47:03.52#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:47:03.52#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:47:03.52#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:47:03.52#ibcon#*before write, iclass 38, count 0 2006.229.16:47:03.52#ibcon#enter sib2, iclass 38, count 0 2006.229.16:47:03.52#ibcon#flushed, iclass 38, count 0 2006.229.16:47:03.52#ibcon#about to write, iclass 38, count 0 2006.229.16:47:03.52#ibcon#wrote, iclass 38, count 0 2006.229.16:47:03.52#ibcon#about to read 3, iclass 38, count 0 2006.229.16:47:03.57#ibcon#read 3, iclass 38, count 0 2006.229.16:47:03.57#ibcon#about to read 4, iclass 38, count 0 2006.229.16:47:03.57#ibcon#read 4, iclass 38, count 0 2006.229.16:47:03.57#ibcon#about to read 5, iclass 38, count 0 2006.229.16:47:03.57#ibcon#read 5, iclass 38, count 0 2006.229.16:47:03.57#ibcon#about to read 6, iclass 38, count 0 2006.229.16:47:03.57#ibcon#read 6, iclass 38, count 0 2006.229.16:47:03.57#ibcon#end of sib2, iclass 38, count 0 2006.229.16:47:03.57#ibcon#*after write, iclass 38, count 0 2006.229.16:47:03.57#ibcon#*before return 0, iclass 38, count 0 2006.229.16:47:03.57#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:03.57#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:03.57#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:47:03.57#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:47:03.57$vck44/va=1,8 2006.229.16:47:03.57#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.16:47:03.57#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.16:47:03.57#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:03.57#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:03.57#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:03.57#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:03.57#ibcon#enter wrdev, iclass 40, count 2 2006.229.16:47:03.57#ibcon#first serial, iclass 40, count 2 2006.229.16:47:03.57#ibcon#enter sib2, iclass 40, count 2 2006.229.16:47:03.57#ibcon#flushed, iclass 40, count 2 2006.229.16:47:03.57#ibcon#about to write, iclass 40, count 2 2006.229.16:47:03.57#ibcon#wrote, iclass 40, count 2 2006.229.16:47:03.57#ibcon#about to read 3, iclass 40, count 2 2006.229.16:47:03.59#ibcon#read 3, iclass 40, count 2 2006.229.16:47:03.59#ibcon#about to read 4, iclass 40, count 2 2006.229.16:47:03.59#ibcon#read 4, iclass 40, count 2 2006.229.16:47:03.59#ibcon#about to read 5, iclass 40, count 2 2006.229.16:47:03.59#ibcon#read 5, iclass 40, count 2 2006.229.16:47:03.59#ibcon#about to read 6, iclass 40, count 2 2006.229.16:47:03.59#ibcon#read 6, iclass 40, count 2 2006.229.16:47:03.59#ibcon#end of sib2, iclass 40, count 2 2006.229.16:47:03.59#ibcon#*mode == 0, iclass 40, count 2 2006.229.16:47:03.59#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.16:47:03.59#ibcon#[25=AT01-08\r\n] 2006.229.16:47:03.59#ibcon#*before write, iclass 40, count 2 2006.229.16:47:03.59#ibcon#enter sib2, iclass 40, count 2 2006.229.16:47:03.59#ibcon#flushed, iclass 40, count 2 2006.229.16:47:03.59#ibcon#about to write, iclass 40, count 2 2006.229.16:47:03.59#ibcon#wrote, iclass 40, count 2 2006.229.16:47:03.59#ibcon#about to read 3, iclass 40, count 2 2006.229.16:47:03.62#ibcon#read 3, iclass 40, count 2 2006.229.16:47:03.62#ibcon#about to read 4, iclass 40, count 2 2006.229.16:47:03.62#ibcon#read 4, iclass 40, count 2 2006.229.16:47:03.62#ibcon#about to read 5, iclass 40, count 2 2006.229.16:47:03.62#ibcon#read 5, iclass 40, count 2 2006.229.16:47:03.62#ibcon#about to read 6, iclass 40, count 2 2006.229.16:47:03.62#ibcon#read 6, iclass 40, count 2 2006.229.16:47:03.62#ibcon#end of sib2, iclass 40, count 2 2006.229.16:47:03.62#ibcon#*after write, iclass 40, count 2 2006.229.16:47:03.62#ibcon#*before return 0, iclass 40, count 2 2006.229.16:47:03.62#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:03.62#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:03.62#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.16:47:03.62#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:03.62#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:03.74#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:03.74#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:03.74#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:47:03.74#ibcon#first serial, iclass 40, count 0 2006.229.16:47:03.74#ibcon#enter sib2, iclass 40, count 0 2006.229.16:47:03.74#ibcon#flushed, iclass 40, count 0 2006.229.16:47:03.74#ibcon#about to write, iclass 40, count 0 2006.229.16:47:03.74#ibcon#wrote, iclass 40, count 0 2006.229.16:47:03.74#ibcon#about to read 3, iclass 40, count 0 2006.229.16:47:03.76#ibcon#read 3, iclass 40, count 0 2006.229.16:47:03.76#ibcon#about to read 4, iclass 40, count 0 2006.229.16:47:03.76#ibcon#read 4, iclass 40, count 0 2006.229.16:47:03.76#ibcon#about to read 5, iclass 40, count 0 2006.229.16:47:03.76#ibcon#read 5, iclass 40, count 0 2006.229.16:47:03.76#ibcon#about to read 6, iclass 40, count 0 2006.229.16:47:03.76#ibcon#read 6, iclass 40, count 0 2006.229.16:47:03.76#ibcon#end of sib2, iclass 40, count 0 2006.229.16:47:03.76#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:47:03.76#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:47:03.76#ibcon#[25=USB\r\n] 2006.229.16:47:03.76#ibcon#*before write, iclass 40, count 0 2006.229.16:47:03.76#ibcon#enter sib2, iclass 40, count 0 2006.229.16:47:03.76#ibcon#flushed, iclass 40, count 0 2006.229.16:47:03.76#ibcon#about to write, iclass 40, count 0 2006.229.16:47:03.76#ibcon#wrote, iclass 40, count 0 2006.229.16:47:03.76#ibcon#about to read 3, iclass 40, count 0 2006.229.16:47:03.79#ibcon#read 3, iclass 40, count 0 2006.229.16:47:03.79#ibcon#about to read 4, iclass 40, count 0 2006.229.16:47:03.79#ibcon#read 4, iclass 40, count 0 2006.229.16:47:03.79#ibcon#about to read 5, iclass 40, count 0 2006.229.16:47:03.79#ibcon#read 5, iclass 40, count 0 2006.229.16:47:03.79#ibcon#about to read 6, iclass 40, count 0 2006.229.16:47:03.79#ibcon#read 6, iclass 40, count 0 2006.229.16:47:03.79#ibcon#end of sib2, iclass 40, count 0 2006.229.16:47:03.79#ibcon#*after write, iclass 40, count 0 2006.229.16:47:03.79#ibcon#*before return 0, iclass 40, count 0 2006.229.16:47:03.79#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:03.79#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:03.79#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:47:03.79#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:47:03.79$vck44/valo=2,534.99 2006.229.16:47:03.79#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.16:47:03.79#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.16:47:03.79#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:03.79#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:03.79#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:03.79#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:03.79#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:47:03.79#ibcon#first serial, iclass 4, count 0 2006.229.16:47:03.79#ibcon#enter sib2, iclass 4, count 0 2006.229.16:47:03.79#ibcon#flushed, iclass 4, count 0 2006.229.16:47:03.79#ibcon#about to write, iclass 4, count 0 2006.229.16:47:03.79#ibcon#wrote, iclass 4, count 0 2006.229.16:47:03.79#ibcon#about to read 3, iclass 4, count 0 2006.229.16:47:03.81#ibcon#read 3, iclass 4, count 0 2006.229.16:47:03.81#ibcon#about to read 4, iclass 4, count 0 2006.229.16:47:03.81#ibcon#read 4, iclass 4, count 0 2006.229.16:47:03.81#ibcon#about to read 5, iclass 4, count 0 2006.229.16:47:03.81#ibcon#read 5, iclass 4, count 0 2006.229.16:47:03.81#ibcon#about to read 6, iclass 4, count 0 2006.229.16:47:03.81#ibcon#read 6, iclass 4, count 0 2006.229.16:47:03.81#ibcon#end of sib2, iclass 4, count 0 2006.229.16:47:03.81#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:47:03.81#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:47:03.81#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:47:03.81#ibcon#*before write, iclass 4, count 0 2006.229.16:47:03.81#ibcon#enter sib2, iclass 4, count 0 2006.229.16:47:03.81#ibcon#flushed, iclass 4, count 0 2006.229.16:47:03.81#ibcon#about to write, iclass 4, count 0 2006.229.16:47:03.81#ibcon#wrote, iclass 4, count 0 2006.229.16:47:03.81#ibcon#about to read 3, iclass 4, count 0 2006.229.16:47:03.85#ibcon#read 3, iclass 4, count 0 2006.229.16:47:03.85#ibcon#about to read 4, iclass 4, count 0 2006.229.16:47:03.85#ibcon#read 4, iclass 4, count 0 2006.229.16:47:03.85#ibcon#about to read 5, iclass 4, count 0 2006.229.16:47:03.85#ibcon#read 5, iclass 4, count 0 2006.229.16:47:03.85#ibcon#about to read 6, iclass 4, count 0 2006.229.16:47:03.85#ibcon#read 6, iclass 4, count 0 2006.229.16:47:03.85#ibcon#end of sib2, iclass 4, count 0 2006.229.16:47:03.85#ibcon#*after write, iclass 4, count 0 2006.229.16:47:03.85#ibcon#*before return 0, iclass 4, count 0 2006.229.16:47:03.85#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:03.85#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:03.85#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:47:03.85#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:47:03.85$vck44/va=2,7 2006.229.16:47:03.85#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.16:47:03.85#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.16:47:03.85#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:03.85#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:03.91#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:03.91#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:03.91#ibcon#enter wrdev, iclass 6, count 2 2006.229.16:47:03.91#ibcon#first serial, iclass 6, count 2 2006.229.16:47:03.91#ibcon#enter sib2, iclass 6, count 2 2006.229.16:47:03.91#ibcon#flushed, iclass 6, count 2 2006.229.16:47:03.91#ibcon#about to write, iclass 6, count 2 2006.229.16:47:03.91#ibcon#wrote, iclass 6, count 2 2006.229.16:47:03.91#ibcon#about to read 3, iclass 6, count 2 2006.229.16:47:03.93#ibcon#read 3, iclass 6, count 2 2006.229.16:47:03.93#ibcon#about to read 4, iclass 6, count 2 2006.229.16:47:03.93#ibcon#read 4, iclass 6, count 2 2006.229.16:47:03.93#ibcon#about to read 5, iclass 6, count 2 2006.229.16:47:03.93#ibcon#read 5, iclass 6, count 2 2006.229.16:47:03.93#ibcon#about to read 6, iclass 6, count 2 2006.229.16:47:03.93#ibcon#read 6, iclass 6, count 2 2006.229.16:47:03.93#ibcon#end of sib2, iclass 6, count 2 2006.229.16:47:03.93#ibcon#*mode == 0, iclass 6, count 2 2006.229.16:47:03.93#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.16:47:03.93#ibcon#[25=AT02-07\r\n] 2006.229.16:47:03.93#ibcon#*before write, iclass 6, count 2 2006.229.16:47:03.93#ibcon#enter sib2, iclass 6, count 2 2006.229.16:47:03.93#ibcon#flushed, iclass 6, count 2 2006.229.16:47:03.93#ibcon#about to write, iclass 6, count 2 2006.229.16:47:03.93#ibcon#wrote, iclass 6, count 2 2006.229.16:47:03.93#ibcon#about to read 3, iclass 6, count 2 2006.229.16:47:03.96#ibcon#read 3, iclass 6, count 2 2006.229.16:47:03.96#ibcon#about to read 4, iclass 6, count 2 2006.229.16:47:03.96#ibcon#read 4, iclass 6, count 2 2006.229.16:47:03.96#ibcon#about to read 5, iclass 6, count 2 2006.229.16:47:03.96#ibcon#read 5, iclass 6, count 2 2006.229.16:47:03.96#ibcon#about to read 6, iclass 6, count 2 2006.229.16:47:03.96#ibcon#read 6, iclass 6, count 2 2006.229.16:47:03.96#ibcon#end of sib2, iclass 6, count 2 2006.229.16:47:03.96#ibcon#*after write, iclass 6, count 2 2006.229.16:47:03.96#ibcon#*before return 0, iclass 6, count 2 2006.229.16:47:03.96#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:03.96#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:03.96#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.16:47:03.96#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:03.96#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:04.08#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:04.08#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:04.08#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:47:04.08#ibcon#first serial, iclass 6, count 0 2006.229.16:47:04.08#ibcon#enter sib2, iclass 6, count 0 2006.229.16:47:04.08#ibcon#flushed, iclass 6, count 0 2006.229.16:47:04.08#ibcon#about to write, iclass 6, count 0 2006.229.16:47:04.08#ibcon#wrote, iclass 6, count 0 2006.229.16:47:04.08#ibcon#about to read 3, iclass 6, count 0 2006.229.16:47:04.10#ibcon#read 3, iclass 6, count 0 2006.229.16:47:04.10#ibcon#about to read 4, iclass 6, count 0 2006.229.16:47:04.10#ibcon#read 4, iclass 6, count 0 2006.229.16:47:04.10#ibcon#about to read 5, iclass 6, count 0 2006.229.16:47:04.10#ibcon#read 5, iclass 6, count 0 2006.229.16:47:04.10#ibcon#about to read 6, iclass 6, count 0 2006.229.16:47:04.10#ibcon#read 6, iclass 6, count 0 2006.229.16:47:04.10#ibcon#end of sib2, iclass 6, count 0 2006.229.16:47:04.10#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:47:04.10#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:47:04.10#ibcon#[25=USB\r\n] 2006.229.16:47:04.10#ibcon#*before write, iclass 6, count 0 2006.229.16:47:04.10#ibcon#enter sib2, iclass 6, count 0 2006.229.16:47:04.10#ibcon#flushed, iclass 6, count 0 2006.229.16:47:04.10#ibcon#about to write, iclass 6, count 0 2006.229.16:47:04.10#ibcon#wrote, iclass 6, count 0 2006.229.16:47:04.10#ibcon#about to read 3, iclass 6, count 0 2006.229.16:47:04.13#ibcon#read 3, iclass 6, count 0 2006.229.16:47:04.13#ibcon#about to read 4, iclass 6, count 0 2006.229.16:47:04.13#ibcon#read 4, iclass 6, count 0 2006.229.16:47:04.13#ibcon#about to read 5, iclass 6, count 0 2006.229.16:47:04.13#ibcon#read 5, iclass 6, count 0 2006.229.16:47:04.13#ibcon#about to read 6, iclass 6, count 0 2006.229.16:47:04.13#ibcon#read 6, iclass 6, count 0 2006.229.16:47:04.13#ibcon#end of sib2, iclass 6, count 0 2006.229.16:47:04.13#ibcon#*after write, iclass 6, count 0 2006.229.16:47:04.13#ibcon#*before return 0, iclass 6, count 0 2006.229.16:47:04.13#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:04.13#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:04.13#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:47:04.13#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:47:04.13$vck44/valo=3,564.99 2006.229.16:47:04.13#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.16:47:04.13#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.16:47:04.13#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:04.13#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:04.13#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:04.13#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:04.13#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:47:04.13#ibcon#first serial, iclass 10, count 0 2006.229.16:47:04.13#ibcon#enter sib2, iclass 10, count 0 2006.229.16:47:04.13#ibcon#flushed, iclass 10, count 0 2006.229.16:47:04.13#ibcon#about to write, iclass 10, count 0 2006.229.16:47:04.13#ibcon#wrote, iclass 10, count 0 2006.229.16:47:04.13#ibcon#about to read 3, iclass 10, count 0 2006.229.16:47:04.15#ibcon#read 3, iclass 10, count 0 2006.229.16:47:04.15#ibcon#about to read 4, iclass 10, count 0 2006.229.16:47:04.15#ibcon#read 4, iclass 10, count 0 2006.229.16:47:04.15#ibcon#about to read 5, iclass 10, count 0 2006.229.16:47:04.15#ibcon#read 5, iclass 10, count 0 2006.229.16:47:04.15#ibcon#about to read 6, iclass 10, count 0 2006.229.16:47:04.15#ibcon#read 6, iclass 10, count 0 2006.229.16:47:04.15#ibcon#end of sib2, iclass 10, count 0 2006.229.16:47:04.15#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:47:04.15#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:47:04.15#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:47:04.15#ibcon#*before write, iclass 10, count 0 2006.229.16:47:04.15#ibcon#enter sib2, iclass 10, count 0 2006.229.16:47:04.15#ibcon#flushed, iclass 10, count 0 2006.229.16:47:04.15#ibcon#about to write, iclass 10, count 0 2006.229.16:47:04.15#ibcon#wrote, iclass 10, count 0 2006.229.16:47:04.15#ibcon#about to read 3, iclass 10, count 0 2006.229.16:47:04.19#ibcon#read 3, iclass 10, count 0 2006.229.16:47:04.19#ibcon#about to read 4, iclass 10, count 0 2006.229.16:47:04.19#ibcon#read 4, iclass 10, count 0 2006.229.16:47:04.19#ibcon#about to read 5, iclass 10, count 0 2006.229.16:47:04.19#ibcon#read 5, iclass 10, count 0 2006.229.16:47:04.19#ibcon#about to read 6, iclass 10, count 0 2006.229.16:47:04.19#ibcon#read 6, iclass 10, count 0 2006.229.16:47:04.19#ibcon#end of sib2, iclass 10, count 0 2006.229.16:47:04.19#ibcon#*after write, iclass 10, count 0 2006.229.16:47:04.19#ibcon#*before return 0, iclass 10, count 0 2006.229.16:47:04.19#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:04.19#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:04.19#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:47:04.19#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:47:04.19$vck44/va=3,6 2006.229.16:47:04.19#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.16:47:04.19#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.16:47:04.19#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:04.19#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:04.25#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:04.25#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:04.25#ibcon#enter wrdev, iclass 12, count 2 2006.229.16:47:04.25#ibcon#first serial, iclass 12, count 2 2006.229.16:47:04.25#ibcon#enter sib2, iclass 12, count 2 2006.229.16:47:04.25#ibcon#flushed, iclass 12, count 2 2006.229.16:47:04.25#ibcon#about to write, iclass 12, count 2 2006.229.16:47:04.25#ibcon#wrote, iclass 12, count 2 2006.229.16:47:04.25#ibcon#about to read 3, iclass 12, count 2 2006.229.16:47:04.27#ibcon#read 3, iclass 12, count 2 2006.229.16:47:04.27#ibcon#about to read 4, iclass 12, count 2 2006.229.16:47:04.27#ibcon#read 4, iclass 12, count 2 2006.229.16:47:04.27#ibcon#about to read 5, iclass 12, count 2 2006.229.16:47:04.27#ibcon#read 5, iclass 12, count 2 2006.229.16:47:04.27#ibcon#about to read 6, iclass 12, count 2 2006.229.16:47:04.27#ibcon#read 6, iclass 12, count 2 2006.229.16:47:04.27#ibcon#end of sib2, iclass 12, count 2 2006.229.16:47:04.27#ibcon#*mode == 0, iclass 12, count 2 2006.229.16:47:04.27#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.16:47:04.27#ibcon#[25=AT03-06\r\n] 2006.229.16:47:04.27#ibcon#*before write, iclass 12, count 2 2006.229.16:47:04.27#ibcon#enter sib2, iclass 12, count 2 2006.229.16:47:04.27#ibcon#flushed, iclass 12, count 2 2006.229.16:47:04.27#ibcon#about to write, iclass 12, count 2 2006.229.16:47:04.27#ibcon#wrote, iclass 12, count 2 2006.229.16:47:04.27#ibcon#about to read 3, iclass 12, count 2 2006.229.16:47:04.30#ibcon#read 3, iclass 12, count 2 2006.229.16:47:04.30#ibcon#about to read 4, iclass 12, count 2 2006.229.16:47:04.30#ibcon#read 4, iclass 12, count 2 2006.229.16:47:04.30#ibcon#about to read 5, iclass 12, count 2 2006.229.16:47:04.30#ibcon#read 5, iclass 12, count 2 2006.229.16:47:04.30#ibcon#about to read 6, iclass 12, count 2 2006.229.16:47:04.30#ibcon#read 6, iclass 12, count 2 2006.229.16:47:04.30#ibcon#end of sib2, iclass 12, count 2 2006.229.16:47:04.30#ibcon#*after write, iclass 12, count 2 2006.229.16:47:04.30#ibcon#*before return 0, iclass 12, count 2 2006.229.16:47:04.30#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:04.30#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:04.30#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.16:47:04.30#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:04.30#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:04.42#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:04.42#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:04.42#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:47:04.42#ibcon#first serial, iclass 12, count 0 2006.229.16:47:04.42#ibcon#enter sib2, iclass 12, count 0 2006.229.16:47:04.42#ibcon#flushed, iclass 12, count 0 2006.229.16:47:04.42#ibcon#about to write, iclass 12, count 0 2006.229.16:47:04.42#ibcon#wrote, iclass 12, count 0 2006.229.16:47:04.42#ibcon#about to read 3, iclass 12, count 0 2006.229.16:47:04.44#ibcon#read 3, iclass 12, count 0 2006.229.16:47:04.44#ibcon#about to read 4, iclass 12, count 0 2006.229.16:47:04.44#ibcon#read 4, iclass 12, count 0 2006.229.16:47:04.44#ibcon#about to read 5, iclass 12, count 0 2006.229.16:47:04.44#ibcon#read 5, iclass 12, count 0 2006.229.16:47:04.44#ibcon#about to read 6, iclass 12, count 0 2006.229.16:47:04.44#ibcon#read 6, iclass 12, count 0 2006.229.16:47:04.44#ibcon#end of sib2, iclass 12, count 0 2006.229.16:47:04.44#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:47:04.44#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:47:04.44#ibcon#[25=USB\r\n] 2006.229.16:47:04.44#ibcon#*before write, iclass 12, count 0 2006.229.16:47:04.44#ibcon#enter sib2, iclass 12, count 0 2006.229.16:47:04.44#ibcon#flushed, iclass 12, count 0 2006.229.16:47:04.44#ibcon#about to write, iclass 12, count 0 2006.229.16:47:04.44#ibcon#wrote, iclass 12, count 0 2006.229.16:47:04.44#ibcon#about to read 3, iclass 12, count 0 2006.229.16:47:04.47#ibcon#read 3, iclass 12, count 0 2006.229.16:47:04.47#ibcon#about to read 4, iclass 12, count 0 2006.229.16:47:04.47#ibcon#read 4, iclass 12, count 0 2006.229.16:47:04.47#ibcon#about to read 5, iclass 12, count 0 2006.229.16:47:04.47#ibcon#read 5, iclass 12, count 0 2006.229.16:47:04.47#ibcon#about to read 6, iclass 12, count 0 2006.229.16:47:04.47#ibcon#read 6, iclass 12, count 0 2006.229.16:47:04.47#ibcon#end of sib2, iclass 12, count 0 2006.229.16:47:04.47#ibcon#*after write, iclass 12, count 0 2006.229.16:47:04.47#ibcon#*before return 0, iclass 12, count 0 2006.229.16:47:04.47#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:04.47#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:04.47#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:47:04.47#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:47:04.47$vck44/valo=4,624.99 2006.229.16:47:04.47#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.16:47:04.47#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.16:47:04.47#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:04.47#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:04.47#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:04.47#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:04.47#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:47:04.47#ibcon#first serial, iclass 14, count 0 2006.229.16:47:04.47#ibcon#enter sib2, iclass 14, count 0 2006.229.16:47:04.47#ibcon#flushed, iclass 14, count 0 2006.229.16:47:04.47#ibcon#about to write, iclass 14, count 0 2006.229.16:47:04.47#ibcon#wrote, iclass 14, count 0 2006.229.16:47:04.47#ibcon#about to read 3, iclass 14, count 0 2006.229.16:47:04.49#ibcon#read 3, iclass 14, count 0 2006.229.16:47:04.49#ibcon#about to read 4, iclass 14, count 0 2006.229.16:47:04.49#ibcon#read 4, iclass 14, count 0 2006.229.16:47:04.49#ibcon#about to read 5, iclass 14, count 0 2006.229.16:47:04.49#ibcon#read 5, iclass 14, count 0 2006.229.16:47:04.49#ibcon#about to read 6, iclass 14, count 0 2006.229.16:47:04.49#ibcon#read 6, iclass 14, count 0 2006.229.16:47:04.49#ibcon#end of sib2, iclass 14, count 0 2006.229.16:47:04.49#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:47:04.49#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:47:04.49#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:47:04.49#ibcon#*before write, iclass 14, count 0 2006.229.16:47:04.49#ibcon#enter sib2, iclass 14, count 0 2006.229.16:47:04.49#ibcon#flushed, iclass 14, count 0 2006.229.16:47:04.49#ibcon#about to write, iclass 14, count 0 2006.229.16:47:04.49#ibcon#wrote, iclass 14, count 0 2006.229.16:47:04.49#ibcon#about to read 3, iclass 14, count 0 2006.229.16:47:04.53#ibcon#read 3, iclass 14, count 0 2006.229.16:47:04.53#ibcon#about to read 4, iclass 14, count 0 2006.229.16:47:04.53#ibcon#read 4, iclass 14, count 0 2006.229.16:47:04.53#ibcon#about to read 5, iclass 14, count 0 2006.229.16:47:04.53#ibcon#read 5, iclass 14, count 0 2006.229.16:47:04.53#ibcon#about to read 6, iclass 14, count 0 2006.229.16:47:04.53#ibcon#read 6, iclass 14, count 0 2006.229.16:47:04.53#ibcon#end of sib2, iclass 14, count 0 2006.229.16:47:04.53#ibcon#*after write, iclass 14, count 0 2006.229.16:47:04.53#ibcon#*before return 0, iclass 14, count 0 2006.229.16:47:04.53#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:04.53#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:04.53#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:47:04.53#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:47:04.53$vck44/va=4,7 2006.229.16:47:04.53#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.16:47:04.53#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.16:47:04.53#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:04.53#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:04.59#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:04.59#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:04.59#ibcon#enter wrdev, iclass 16, count 2 2006.229.16:47:04.59#ibcon#first serial, iclass 16, count 2 2006.229.16:47:04.59#ibcon#enter sib2, iclass 16, count 2 2006.229.16:47:04.59#ibcon#flushed, iclass 16, count 2 2006.229.16:47:04.59#ibcon#about to write, iclass 16, count 2 2006.229.16:47:04.59#ibcon#wrote, iclass 16, count 2 2006.229.16:47:04.59#ibcon#about to read 3, iclass 16, count 2 2006.229.16:47:04.61#ibcon#read 3, iclass 16, count 2 2006.229.16:47:04.61#ibcon#about to read 4, iclass 16, count 2 2006.229.16:47:04.61#ibcon#read 4, iclass 16, count 2 2006.229.16:47:04.61#ibcon#about to read 5, iclass 16, count 2 2006.229.16:47:04.61#ibcon#read 5, iclass 16, count 2 2006.229.16:47:04.61#ibcon#about to read 6, iclass 16, count 2 2006.229.16:47:04.61#ibcon#read 6, iclass 16, count 2 2006.229.16:47:04.61#ibcon#end of sib2, iclass 16, count 2 2006.229.16:47:04.61#ibcon#*mode == 0, iclass 16, count 2 2006.229.16:47:04.61#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.16:47:04.61#ibcon#[25=AT04-07\r\n] 2006.229.16:47:04.61#ibcon#*before write, iclass 16, count 2 2006.229.16:47:04.61#ibcon#enter sib2, iclass 16, count 2 2006.229.16:47:04.61#ibcon#flushed, iclass 16, count 2 2006.229.16:47:04.61#ibcon#about to write, iclass 16, count 2 2006.229.16:47:04.61#ibcon#wrote, iclass 16, count 2 2006.229.16:47:04.61#ibcon#about to read 3, iclass 16, count 2 2006.229.16:47:04.64#ibcon#read 3, iclass 16, count 2 2006.229.16:47:04.64#ibcon#about to read 4, iclass 16, count 2 2006.229.16:47:04.64#ibcon#read 4, iclass 16, count 2 2006.229.16:47:04.64#ibcon#about to read 5, iclass 16, count 2 2006.229.16:47:04.64#ibcon#read 5, iclass 16, count 2 2006.229.16:47:04.64#ibcon#about to read 6, iclass 16, count 2 2006.229.16:47:04.64#ibcon#read 6, iclass 16, count 2 2006.229.16:47:04.64#ibcon#end of sib2, iclass 16, count 2 2006.229.16:47:04.64#ibcon#*after write, iclass 16, count 2 2006.229.16:47:04.64#ibcon#*before return 0, iclass 16, count 2 2006.229.16:47:04.67#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:04.67#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:04.67#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.16:47:04.67#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:04.67#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:04.78#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:04.78#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:04.78#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:47:04.78#ibcon#first serial, iclass 16, count 0 2006.229.16:47:04.78#ibcon#enter sib2, iclass 16, count 0 2006.229.16:47:04.78#ibcon#flushed, iclass 16, count 0 2006.229.16:47:04.78#ibcon#about to write, iclass 16, count 0 2006.229.16:47:04.78#ibcon#wrote, iclass 16, count 0 2006.229.16:47:04.78#ibcon#about to read 3, iclass 16, count 0 2006.229.16:47:04.80#ibcon#read 3, iclass 16, count 0 2006.229.16:47:04.80#ibcon#about to read 4, iclass 16, count 0 2006.229.16:47:04.80#ibcon#read 4, iclass 16, count 0 2006.229.16:47:04.80#ibcon#about to read 5, iclass 16, count 0 2006.229.16:47:04.80#ibcon#read 5, iclass 16, count 0 2006.229.16:47:04.80#ibcon#about to read 6, iclass 16, count 0 2006.229.16:47:04.80#ibcon#read 6, iclass 16, count 0 2006.229.16:47:04.80#ibcon#end of sib2, iclass 16, count 0 2006.229.16:47:04.80#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:47:04.80#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:47:04.80#ibcon#[25=USB\r\n] 2006.229.16:47:04.80#ibcon#*before write, iclass 16, count 0 2006.229.16:47:04.80#ibcon#enter sib2, iclass 16, count 0 2006.229.16:47:04.80#ibcon#flushed, iclass 16, count 0 2006.229.16:47:04.80#ibcon#about to write, iclass 16, count 0 2006.229.16:47:04.80#ibcon#wrote, iclass 16, count 0 2006.229.16:47:04.80#ibcon#about to read 3, iclass 16, count 0 2006.229.16:47:04.83#ibcon#read 3, iclass 16, count 0 2006.229.16:47:04.83#ibcon#about to read 4, iclass 16, count 0 2006.229.16:47:04.83#ibcon#read 4, iclass 16, count 0 2006.229.16:47:04.83#ibcon#about to read 5, iclass 16, count 0 2006.229.16:47:04.83#ibcon#read 5, iclass 16, count 0 2006.229.16:47:04.83#ibcon#about to read 6, iclass 16, count 0 2006.229.16:47:04.83#ibcon#read 6, iclass 16, count 0 2006.229.16:47:04.83#ibcon#end of sib2, iclass 16, count 0 2006.229.16:47:04.83#ibcon#*after write, iclass 16, count 0 2006.229.16:47:04.83#ibcon#*before return 0, iclass 16, count 0 2006.229.16:47:04.83#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:04.83#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:04.83#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:47:04.83#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:47:04.83$vck44/valo=5,734.99 2006.229.16:47:04.83#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.16:47:04.83#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.16:47:04.83#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:04.83#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:04.83#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:04.83#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:04.83#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:47:04.83#ibcon#first serial, iclass 18, count 0 2006.229.16:47:04.83#ibcon#enter sib2, iclass 18, count 0 2006.229.16:47:04.83#ibcon#flushed, iclass 18, count 0 2006.229.16:47:04.83#ibcon#about to write, iclass 18, count 0 2006.229.16:47:04.83#ibcon#wrote, iclass 18, count 0 2006.229.16:47:04.83#ibcon#about to read 3, iclass 18, count 0 2006.229.16:47:04.85#ibcon#read 3, iclass 18, count 0 2006.229.16:47:04.85#ibcon#about to read 4, iclass 18, count 0 2006.229.16:47:04.85#ibcon#read 4, iclass 18, count 0 2006.229.16:47:04.85#ibcon#about to read 5, iclass 18, count 0 2006.229.16:47:04.85#ibcon#read 5, iclass 18, count 0 2006.229.16:47:04.85#ibcon#about to read 6, iclass 18, count 0 2006.229.16:47:04.85#ibcon#read 6, iclass 18, count 0 2006.229.16:47:04.85#ibcon#end of sib2, iclass 18, count 0 2006.229.16:47:04.85#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:47:04.85#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:47:04.85#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:47:04.85#ibcon#*before write, iclass 18, count 0 2006.229.16:47:04.85#ibcon#enter sib2, iclass 18, count 0 2006.229.16:47:04.85#ibcon#flushed, iclass 18, count 0 2006.229.16:47:04.85#ibcon#about to write, iclass 18, count 0 2006.229.16:47:04.85#ibcon#wrote, iclass 18, count 0 2006.229.16:47:04.85#ibcon#about to read 3, iclass 18, count 0 2006.229.16:47:04.89#ibcon#read 3, iclass 18, count 0 2006.229.16:47:04.89#ibcon#about to read 4, iclass 18, count 0 2006.229.16:47:04.89#ibcon#read 4, iclass 18, count 0 2006.229.16:47:04.89#ibcon#about to read 5, iclass 18, count 0 2006.229.16:47:04.89#ibcon#read 5, iclass 18, count 0 2006.229.16:47:04.89#ibcon#about to read 6, iclass 18, count 0 2006.229.16:47:04.89#ibcon#read 6, iclass 18, count 0 2006.229.16:47:04.89#ibcon#end of sib2, iclass 18, count 0 2006.229.16:47:04.89#ibcon#*after write, iclass 18, count 0 2006.229.16:47:04.89#ibcon#*before return 0, iclass 18, count 0 2006.229.16:47:04.89#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:04.89#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:04.89#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:47:04.89#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:47:04.89$vck44/va=5,4 2006.229.16:47:04.89#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.16:47:04.89#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.16:47:04.89#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:04.89#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:04.95#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:04.95#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:04.95#ibcon#enter wrdev, iclass 20, count 2 2006.229.16:47:04.95#ibcon#first serial, iclass 20, count 2 2006.229.16:47:04.95#ibcon#enter sib2, iclass 20, count 2 2006.229.16:47:04.95#ibcon#flushed, iclass 20, count 2 2006.229.16:47:04.95#ibcon#about to write, iclass 20, count 2 2006.229.16:47:04.95#ibcon#wrote, iclass 20, count 2 2006.229.16:47:04.95#ibcon#about to read 3, iclass 20, count 2 2006.229.16:47:04.97#ibcon#read 3, iclass 20, count 2 2006.229.16:47:04.97#ibcon#about to read 4, iclass 20, count 2 2006.229.16:47:04.97#ibcon#read 4, iclass 20, count 2 2006.229.16:47:04.97#ibcon#about to read 5, iclass 20, count 2 2006.229.16:47:04.97#ibcon#read 5, iclass 20, count 2 2006.229.16:47:04.97#ibcon#about to read 6, iclass 20, count 2 2006.229.16:47:04.97#ibcon#read 6, iclass 20, count 2 2006.229.16:47:04.97#ibcon#end of sib2, iclass 20, count 2 2006.229.16:47:04.97#ibcon#*mode == 0, iclass 20, count 2 2006.229.16:47:04.97#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.16:47:04.97#ibcon#[25=AT05-04\r\n] 2006.229.16:47:04.97#ibcon#*before write, iclass 20, count 2 2006.229.16:47:04.97#ibcon#enter sib2, iclass 20, count 2 2006.229.16:47:04.97#ibcon#flushed, iclass 20, count 2 2006.229.16:47:04.97#ibcon#about to write, iclass 20, count 2 2006.229.16:47:04.97#ibcon#wrote, iclass 20, count 2 2006.229.16:47:04.97#ibcon#about to read 3, iclass 20, count 2 2006.229.16:47:05.00#ibcon#read 3, iclass 20, count 2 2006.229.16:47:05.00#ibcon#about to read 4, iclass 20, count 2 2006.229.16:47:05.00#ibcon#read 4, iclass 20, count 2 2006.229.16:47:05.00#ibcon#about to read 5, iclass 20, count 2 2006.229.16:47:05.00#ibcon#read 5, iclass 20, count 2 2006.229.16:47:05.00#ibcon#about to read 6, iclass 20, count 2 2006.229.16:47:05.00#ibcon#read 6, iclass 20, count 2 2006.229.16:47:05.00#ibcon#end of sib2, iclass 20, count 2 2006.229.16:47:05.00#ibcon#*after write, iclass 20, count 2 2006.229.16:47:05.00#ibcon#*before return 0, iclass 20, count 2 2006.229.16:47:05.00#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:05.00#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:05.00#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.16:47:05.00#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:05.00#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:05.12#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:05.12#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:05.12#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:47:05.12#ibcon#first serial, iclass 20, count 0 2006.229.16:47:05.12#ibcon#enter sib2, iclass 20, count 0 2006.229.16:47:05.12#ibcon#flushed, iclass 20, count 0 2006.229.16:47:05.12#ibcon#about to write, iclass 20, count 0 2006.229.16:47:05.12#ibcon#wrote, iclass 20, count 0 2006.229.16:47:05.12#ibcon#about to read 3, iclass 20, count 0 2006.229.16:47:05.14#ibcon#read 3, iclass 20, count 0 2006.229.16:47:05.14#ibcon#about to read 4, iclass 20, count 0 2006.229.16:47:05.14#ibcon#read 4, iclass 20, count 0 2006.229.16:47:05.14#ibcon#about to read 5, iclass 20, count 0 2006.229.16:47:05.14#ibcon#read 5, iclass 20, count 0 2006.229.16:47:05.14#ibcon#about to read 6, iclass 20, count 0 2006.229.16:47:05.14#ibcon#read 6, iclass 20, count 0 2006.229.16:47:05.14#ibcon#end of sib2, iclass 20, count 0 2006.229.16:47:05.14#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:47:05.14#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:47:05.14#ibcon#[25=USB\r\n] 2006.229.16:47:05.14#ibcon#*before write, iclass 20, count 0 2006.229.16:47:05.14#ibcon#enter sib2, iclass 20, count 0 2006.229.16:47:05.14#ibcon#flushed, iclass 20, count 0 2006.229.16:47:05.14#ibcon#about to write, iclass 20, count 0 2006.229.16:47:05.14#ibcon#wrote, iclass 20, count 0 2006.229.16:47:05.14#ibcon#about to read 3, iclass 20, count 0 2006.229.16:47:05.17#ibcon#read 3, iclass 20, count 0 2006.229.16:47:05.17#ibcon#about to read 4, iclass 20, count 0 2006.229.16:47:05.17#ibcon#read 4, iclass 20, count 0 2006.229.16:47:05.17#ibcon#about to read 5, iclass 20, count 0 2006.229.16:47:05.17#ibcon#read 5, iclass 20, count 0 2006.229.16:47:05.17#ibcon#about to read 6, iclass 20, count 0 2006.229.16:47:05.17#ibcon#read 6, iclass 20, count 0 2006.229.16:47:05.17#ibcon#end of sib2, iclass 20, count 0 2006.229.16:47:05.17#ibcon#*after write, iclass 20, count 0 2006.229.16:47:05.17#ibcon#*before return 0, iclass 20, count 0 2006.229.16:47:05.17#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:05.17#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:05.17#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:47:05.17#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:47:05.17$vck44/valo=6,814.99 2006.229.16:47:05.17#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.16:47:05.17#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.16:47:05.17#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:05.17#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:05.17#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:05.17#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:05.17#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:47:05.17#ibcon#first serial, iclass 22, count 0 2006.229.16:47:05.17#ibcon#enter sib2, iclass 22, count 0 2006.229.16:47:05.17#ibcon#flushed, iclass 22, count 0 2006.229.16:47:05.17#ibcon#about to write, iclass 22, count 0 2006.229.16:47:05.17#ibcon#wrote, iclass 22, count 0 2006.229.16:47:05.17#ibcon#about to read 3, iclass 22, count 0 2006.229.16:47:05.19#ibcon#read 3, iclass 22, count 0 2006.229.16:47:05.19#ibcon#about to read 4, iclass 22, count 0 2006.229.16:47:05.19#ibcon#read 4, iclass 22, count 0 2006.229.16:47:05.19#ibcon#about to read 5, iclass 22, count 0 2006.229.16:47:05.19#ibcon#read 5, iclass 22, count 0 2006.229.16:47:05.19#ibcon#about to read 6, iclass 22, count 0 2006.229.16:47:05.19#ibcon#read 6, iclass 22, count 0 2006.229.16:47:05.19#ibcon#end of sib2, iclass 22, count 0 2006.229.16:47:05.19#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:47:05.19#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:47:05.19#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:47:05.19#ibcon#*before write, iclass 22, count 0 2006.229.16:47:05.19#ibcon#enter sib2, iclass 22, count 0 2006.229.16:47:05.19#ibcon#flushed, iclass 22, count 0 2006.229.16:47:05.19#ibcon#about to write, iclass 22, count 0 2006.229.16:47:05.19#ibcon#wrote, iclass 22, count 0 2006.229.16:47:05.19#ibcon#about to read 3, iclass 22, count 0 2006.229.16:47:05.23#ibcon#read 3, iclass 22, count 0 2006.229.16:47:05.23#ibcon#about to read 4, iclass 22, count 0 2006.229.16:47:05.23#ibcon#read 4, iclass 22, count 0 2006.229.16:47:05.23#ibcon#about to read 5, iclass 22, count 0 2006.229.16:47:05.23#ibcon#read 5, iclass 22, count 0 2006.229.16:47:05.23#ibcon#about to read 6, iclass 22, count 0 2006.229.16:47:05.23#ibcon#read 6, iclass 22, count 0 2006.229.16:47:05.23#ibcon#end of sib2, iclass 22, count 0 2006.229.16:47:05.23#ibcon#*after write, iclass 22, count 0 2006.229.16:47:05.23#ibcon#*before return 0, iclass 22, count 0 2006.229.16:47:05.23#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:05.23#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:05.23#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:47:05.23#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:47:05.23$vck44/va=6,4 2006.229.16:47:05.23#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.16:47:05.23#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.16:47:05.23#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:05.23#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:05.29#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:05.29#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:05.29#ibcon#enter wrdev, iclass 24, count 2 2006.229.16:47:05.29#ibcon#first serial, iclass 24, count 2 2006.229.16:47:05.29#ibcon#enter sib2, iclass 24, count 2 2006.229.16:47:05.29#ibcon#flushed, iclass 24, count 2 2006.229.16:47:05.29#ibcon#about to write, iclass 24, count 2 2006.229.16:47:05.29#ibcon#wrote, iclass 24, count 2 2006.229.16:47:05.29#ibcon#about to read 3, iclass 24, count 2 2006.229.16:47:05.31#ibcon#read 3, iclass 24, count 2 2006.229.16:47:05.31#ibcon#about to read 4, iclass 24, count 2 2006.229.16:47:05.31#ibcon#read 4, iclass 24, count 2 2006.229.16:47:05.31#ibcon#about to read 5, iclass 24, count 2 2006.229.16:47:05.31#ibcon#read 5, iclass 24, count 2 2006.229.16:47:05.31#ibcon#about to read 6, iclass 24, count 2 2006.229.16:47:05.31#ibcon#read 6, iclass 24, count 2 2006.229.16:47:05.31#ibcon#end of sib2, iclass 24, count 2 2006.229.16:47:05.31#ibcon#*mode == 0, iclass 24, count 2 2006.229.16:47:05.31#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.16:47:05.31#ibcon#[25=AT06-04\r\n] 2006.229.16:47:05.31#ibcon#*before write, iclass 24, count 2 2006.229.16:47:05.31#ibcon#enter sib2, iclass 24, count 2 2006.229.16:47:05.31#ibcon#flushed, iclass 24, count 2 2006.229.16:47:05.31#ibcon#about to write, iclass 24, count 2 2006.229.16:47:05.31#ibcon#wrote, iclass 24, count 2 2006.229.16:47:05.31#ibcon#about to read 3, iclass 24, count 2 2006.229.16:47:05.34#ibcon#read 3, iclass 24, count 2 2006.229.16:47:05.34#ibcon#about to read 4, iclass 24, count 2 2006.229.16:47:05.34#ibcon#read 4, iclass 24, count 2 2006.229.16:47:05.34#ibcon#about to read 5, iclass 24, count 2 2006.229.16:47:05.34#ibcon#read 5, iclass 24, count 2 2006.229.16:47:05.34#ibcon#about to read 6, iclass 24, count 2 2006.229.16:47:05.34#ibcon#read 6, iclass 24, count 2 2006.229.16:47:05.34#ibcon#end of sib2, iclass 24, count 2 2006.229.16:47:05.34#ibcon#*after write, iclass 24, count 2 2006.229.16:47:05.34#ibcon#*before return 0, iclass 24, count 2 2006.229.16:47:05.34#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:05.34#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:05.34#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.16:47:05.34#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:05.34#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:05.46#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:05.46#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:05.46#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:47:05.46#ibcon#first serial, iclass 24, count 0 2006.229.16:47:05.46#ibcon#enter sib2, iclass 24, count 0 2006.229.16:47:05.46#ibcon#flushed, iclass 24, count 0 2006.229.16:47:05.46#ibcon#about to write, iclass 24, count 0 2006.229.16:47:05.46#ibcon#wrote, iclass 24, count 0 2006.229.16:47:05.46#ibcon#about to read 3, iclass 24, count 0 2006.229.16:47:05.48#ibcon#read 3, iclass 24, count 0 2006.229.16:47:05.48#ibcon#about to read 4, iclass 24, count 0 2006.229.16:47:05.48#ibcon#read 4, iclass 24, count 0 2006.229.16:47:05.48#ibcon#about to read 5, iclass 24, count 0 2006.229.16:47:05.48#ibcon#read 5, iclass 24, count 0 2006.229.16:47:05.48#ibcon#about to read 6, iclass 24, count 0 2006.229.16:47:05.48#ibcon#read 6, iclass 24, count 0 2006.229.16:47:05.48#ibcon#end of sib2, iclass 24, count 0 2006.229.16:47:05.48#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:47:05.48#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:47:05.48#ibcon#[25=USB\r\n] 2006.229.16:47:05.48#ibcon#*before write, iclass 24, count 0 2006.229.16:47:05.48#ibcon#enter sib2, iclass 24, count 0 2006.229.16:47:05.48#ibcon#flushed, iclass 24, count 0 2006.229.16:47:05.48#ibcon#about to write, iclass 24, count 0 2006.229.16:47:05.48#ibcon#wrote, iclass 24, count 0 2006.229.16:47:05.48#ibcon#about to read 3, iclass 24, count 0 2006.229.16:47:05.51#ibcon#read 3, iclass 24, count 0 2006.229.16:47:05.51#ibcon#about to read 4, iclass 24, count 0 2006.229.16:47:05.51#ibcon#read 4, iclass 24, count 0 2006.229.16:47:05.51#ibcon#about to read 5, iclass 24, count 0 2006.229.16:47:05.51#ibcon#read 5, iclass 24, count 0 2006.229.16:47:05.51#ibcon#about to read 6, iclass 24, count 0 2006.229.16:47:05.51#ibcon#read 6, iclass 24, count 0 2006.229.16:47:05.51#ibcon#end of sib2, iclass 24, count 0 2006.229.16:47:05.51#ibcon#*after write, iclass 24, count 0 2006.229.16:47:05.51#ibcon#*before return 0, iclass 24, count 0 2006.229.16:47:05.51#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:05.51#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:05.51#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:47:05.51#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:47:05.51$vck44/valo=7,864.99 2006.229.16:47:05.51#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.16:47:05.51#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.16:47:05.51#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:05.51#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:05.51#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:05.51#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:05.51#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:47:05.51#ibcon#first serial, iclass 26, count 0 2006.229.16:47:05.51#ibcon#enter sib2, iclass 26, count 0 2006.229.16:47:05.51#ibcon#flushed, iclass 26, count 0 2006.229.16:47:05.51#ibcon#about to write, iclass 26, count 0 2006.229.16:47:05.51#ibcon#wrote, iclass 26, count 0 2006.229.16:47:05.51#ibcon#about to read 3, iclass 26, count 0 2006.229.16:47:05.53#ibcon#read 3, iclass 26, count 0 2006.229.16:47:05.53#ibcon#about to read 4, iclass 26, count 0 2006.229.16:47:05.53#ibcon#read 4, iclass 26, count 0 2006.229.16:47:05.53#ibcon#about to read 5, iclass 26, count 0 2006.229.16:47:05.53#ibcon#read 5, iclass 26, count 0 2006.229.16:47:05.53#ibcon#about to read 6, iclass 26, count 0 2006.229.16:47:05.53#ibcon#read 6, iclass 26, count 0 2006.229.16:47:05.53#ibcon#end of sib2, iclass 26, count 0 2006.229.16:47:05.53#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:47:05.53#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:47:05.53#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:47:05.53#ibcon#*before write, iclass 26, count 0 2006.229.16:47:05.53#ibcon#enter sib2, iclass 26, count 0 2006.229.16:47:05.53#ibcon#flushed, iclass 26, count 0 2006.229.16:47:05.53#ibcon#about to write, iclass 26, count 0 2006.229.16:47:05.53#ibcon#wrote, iclass 26, count 0 2006.229.16:47:05.53#ibcon#about to read 3, iclass 26, count 0 2006.229.16:47:05.57#ibcon#read 3, iclass 26, count 0 2006.229.16:47:05.57#ibcon#about to read 4, iclass 26, count 0 2006.229.16:47:05.57#ibcon#read 4, iclass 26, count 0 2006.229.16:47:05.57#ibcon#about to read 5, iclass 26, count 0 2006.229.16:47:05.57#ibcon#read 5, iclass 26, count 0 2006.229.16:47:05.57#ibcon#about to read 6, iclass 26, count 0 2006.229.16:47:05.57#ibcon#read 6, iclass 26, count 0 2006.229.16:47:05.57#ibcon#end of sib2, iclass 26, count 0 2006.229.16:47:05.57#ibcon#*after write, iclass 26, count 0 2006.229.16:47:05.57#ibcon#*before return 0, iclass 26, count 0 2006.229.16:47:05.57#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:05.57#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:05.57#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:47:05.57#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:47:05.57$vck44/va=7,5 2006.229.16:47:05.57#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.16:47:05.57#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.16:47:05.57#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:05.57#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:05.63#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:05.63#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:05.63#ibcon#enter wrdev, iclass 28, count 2 2006.229.16:47:05.63#ibcon#first serial, iclass 28, count 2 2006.229.16:47:05.63#ibcon#enter sib2, iclass 28, count 2 2006.229.16:47:05.63#ibcon#flushed, iclass 28, count 2 2006.229.16:47:05.63#ibcon#about to write, iclass 28, count 2 2006.229.16:47:05.63#ibcon#wrote, iclass 28, count 2 2006.229.16:47:05.63#ibcon#about to read 3, iclass 28, count 2 2006.229.16:47:05.65#ibcon#read 3, iclass 28, count 2 2006.229.16:47:05.65#ibcon#about to read 4, iclass 28, count 2 2006.229.16:47:05.65#ibcon#read 4, iclass 28, count 2 2006.229.16:47:05.65#ibcon#about to read 5, iclass 28, count 2 2006.229.16:47:05.65#ibcon#read 5, iclass 28, count 2 2006.229.16:47:05.65#ibcon#about to read 6, iclass 28, count 2 2006.229.16:47:05.65#ibcon#read 6, iclass 28, count 2 2006.229.16:47:05.65#ibcon#end of sib2, iclass 28, count 2 2006.229.16:47:05.65#ibcon#*mode == 0, iclass 28, count 2 2006.229.16:47:05.65#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.16:47:05.65#ibcon#[25=AT07-05\r\n] 2006.229.16:47:05.65#ibcon#*before write, iclass 28, count 2 2006.229.16:47:05.65#ibcon#enter sib2, iclass 28, count 2 2006.229.16:47:05.65#ibcon#flushed, iclass 28, count 2 2006.229.16:47:05.65#ibcon#about to write, iclass 28, count 2 2006.229.16:47:05.65#ibcon#wrote, iclass 28, count 2 2006.229.16:47:05.65#ibcon#about to read 3, iclass 28, count 2 2006.229.16:47:05.68#ibcon#read 3, iclass 28, count 2 2006.229.16:47:05.68#ibcon#about to read 4, iclass 28, count 2 2006.229.16:47:05.68#ibcon#read 4, iclass 28, count 2 2006.229.16:47:05.68#ibcon#about to read 5, iclass 28, count 2 2006.229.16:47:05.68#ibcon#read 5, iclass 28, count 2 2006.229.16:47:05.68#ibcon#about to read 6, iclass 28, count 2 2006.229.16:47:05.68#ibcon#read 6, iclass 28, count 2 2006.229.16:47:05.68#ibcon#end of sib2, iclass 28, count 2 2006.229.16:47:05.68#ibcon#*after write, iclass 28, count 2 2006.229.16:47:05.68#ibcon#*before return 0, iclass 28, count 2 2006.229.16:47:05.68#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:05.68#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:05.68#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.16:47:05.68#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:05.68#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:05.80#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:05.80#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:05.80#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:47:05.80#ibcon#first serial, iclass 28, count 0 2006.229.16:47:05.80#ibcon#enter sib2, iclass 28, count 0 2006.229.16:47:05.80#ibcon#flushed, iclass 28, count 0 2006.229.16:47:05.80#ibcon#about to write, iclass 28, count 0 2006.229.16:47:05.80#ibcon#wrote, iclass 28, count 0 2006.229.16:47:05.80#ibcon#about to read 3, iclass 28, count 0 2006.229.16:47:05.82#ibcon#read 3, iclass 28, count 0 2006.229.16:47:05.82#ibcon#about to read 4, iclass 28, count 0 2006.229.16:47:05.82#ibcon#read 4, iclass 28, count 0 2006.229.16:47:05.82#ibcon#about to read 5, iclass 28, count 0 2006.229.16:47:05.82#ibcon#read 5, iclass 28, count 0 2006.229.16:47:05.82#ibcon#about to read 6, iclass 28, count 0 2006.229.16:47:05.82#ibcon#read 6, iclass 28, count 0 2006.229.16:47:05.82#ibcon#end of sib2, iclass 28, count 0 2006.229.16:47:05.82#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:47:05.82#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:47:05.82#ibcon#[25=USB\r\n] 2006.229.16:47:05.82#ibcon#*before write, iclass 28, count 0 2006.229.16:47:05.82#ibcon#enter sib2, iclass 28, count 0 2006.229.16:47:05.82#ibcon#flushed, iclass 28, count 0 2006.229.16:47:05.82#ibcon#about to write, iclass 28, count 0 2006.229.16:47:05.82#ibcon#wrote, iclass 28, count 0 2006.229.16:47:05.82#ibcon#about to read 3, iclass 28, count 0 2006.229.16:47:05.85#ibcon#read 3, iclass 28, count 0 2006.229.16:47:05.85#ibcon#about to read 4, iclass 28, count 0 2006.229.16:47:05.85#ibcon#read 4, iclass 28, count 0 2006.229.16:47:05.85#ibcon#about to read 5, iclass 28, count 0 2006.229.16:47:05.85#ibcon#read 5, iclass 28, count 0 2006.229.16:47:05.85#ibcon#about to read 6, iclass 28, count 0 2006.229.16:47:05.85#ibcon#read 6, iclass 28, count 0 2006.229.16:47:05.85#ibcon#end of sib2, iclass 28, count 0 2006.229.16:47:05.85#ibcon#*after write, iclass 28, count 0 2006.229.16:47:05.85#ibcon#*before return 0, iclass 28, count 0 2006.229.16:47:05.85#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:05.85#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:05.85#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:47:05.85#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:47:05.85$vck44/valo=8,884.99 2006.229.16:47:05.85#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.16:47:05.85#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.16:47:05.85#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:05.85#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:05.85#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:05.85#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:05.85#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:47:05.85#ibcon#first serial, iclass 30, count 0 2006.229.16:47:05.85#ibcon#enter sib2, iclass 30, count 0 2006.229.16:47:05.85#ibcon#flushed, iclass 30, count 0 2006.229.16:47:05.85#ibcon#about to write, iclass 30, count 0 2006.229.16:47:05.85#ibcon#wrote, iclass 30, count 0 2006.229.16:47:05.85#ibcon#about to read 3, iclass 30, count 0 2006.229.16:47:05.87#ibcon#read 3, iclass 30, count 0 2006.229.16:47:05.87#ibcon#about to read 4, iclass 30, count 0 2006.229.16:47:05.87#ibcon#read 4, iclass 30, count 0 2006.229.16:47:05.87#ibcon#about to read 5, iclass 30, count 0 2006.229.16:47:05.87#ibcon#read 5, iclass 30, count 0 2006.229.16:47:05.87#ibcon#about to read 6, iclass 30, count 0 2006.229.16:47:05.87#ibcon#read 6, iclass 30, count 0 2006.229.16:47:05.87#ibcon#end of sib2, iclass 30, count 0 2006.229.16:47:05.87#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:47:05.87#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:47:05.87#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:47:05.87#ibcon#*before write, iclass 30, count 0 2006.229.16:47:05.87#ibcon#enter sib2, iclass 30, count 0 2006.229.16:47:05.87#ibcon#flushed, iclass 30, count 0 2006.229.16:47:05.87#ibcon#about to write, iclass 30, count 0 2006.229.16:47:05.87#ibcon#wrote, iclass 30, count 0 2006.229.16:47:05.87#ibcon#about to read 3, iclass 30, count 0 2006.229.16:47:05.91#ibcon#read 3, iclass 30, count 0 2006.229.16:47:05.91#ibcon#about to read 4, iclass 30, count 0 2006.229.16:47:05.91#ibcon#read 4, iclass 30, count 0 2006.229.16:47:05.91#ibcon#about to read 5, iclass 30, count 0 2006.229.16:47:05.91#ibcon#read 5, iclass 30, count 0 2006.229.16:47:05.91#ibcon#about to read 6, iclass 30, count 0 2006.229.16:47:05.91#ibcon#read 6, iclass 30, count 0 2006.229.16:47:05.91#ibcon#end of sib2, iclass 30, count 0 2006.229.16:47:05.91#ibcon#*after write, iclass 30, count 0 2006.229.16:47:05.91#ibcon#*before return 0, iclass 30, count 0 2006.229.16:47:05.91#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:05.91#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:05.91#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:47:05.91#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:47:05.91$vck44/va=8,6 2006.229.16:47:05.91#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.16:47:05.91#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.16:47:05.91#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:05.91#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:47:05.97#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:47:05.97#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:47:05.97#ibcon#enter wrdev, iclass 32, count 2 2006.229.16:47:05.97#ibcon#first serial, iclass 32, count 2 2006.229.16:47:05.97#ibcon#enter sib2, iclass 32, count 2 2006.229.16:47:05.97#ibcon#flushed, iclass 32, count 2 2006.229.16:47:05.97#ibcon#about to write, iclass 32, count 2 2006.229.16:47:05.97#ibcon#wrote, iclass 32, count 2 2006.229.16:47:05.97#ibcon#about to read 3, iclass 32, count 2 2006.229.16:47:05.99#ibcon#read 3, iclass 32, count 2 2006.229.16:47:05.99#ibcon#about to read 4, iclass 32, count 2 2006.229.16:47:05.99#ibcon#read 4, iclass 32, count 2 2006.229.16:47:05.99#ibcon#about to read 5, iclass 32, count 2 2006.229.16:47:05.99#ibcon#read 5, iclass 32, count 2 2006.229.16:47:05.99#ibcon#about to read 6, iclass 32, count 2 2006.229.16:47:05.99#ibcon#read 6, iclass 32, count 2 2006.229.16:47:05.99#ibcon#end of sib2, iclass 32, count 2 2006.229.16:47:05.99#ibcon#*mode == 0, iclass 32, count 2 2006.229.16:47:05.99#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.16:47:05.99#ibcon#[25=AT08-06\r\n] 2006.229.16:47:05.99#ibcon#*before write, iclass 32, count 2 2006.229.16:47:05.99#ibcon#enter sib2, iclass 32, count 2 2006.229.16:47:05.99#ibcon#flushed, iclass 32, count 2 2006.229.16:47:05.99#ibcon#about to write, iclass 32, count 2 2006.229.16:47:05.99#ibcon#wrote, iclass 32, count 2 2006.229.16:47:05.99#ibcon#about to read 3, iclass 32, count 2 2006.229.16:47:06.02#ibcon#read 3, iclass 32, count 2 2006.229.16:47:06.02#ibcon#about to read 4, iclass 32, count 2 2006.229.16:47:06.02#ibcon#read 4, iclass 32, count 2 2006.229.16:47:06.02#ibcon#about to read 5, iclass 32, count 2 2006.229.16:47:06.02#ibcon#read 5, iclass 32, count 2 2006.229.16:47:06.02#ibcon#about to read 6, iclass 32, count 2 2006.229.16:47:06.02#ibcon#read 6, iclass 32, count 2 2006.229.16:47:06.02#ibcon#end of sib2, iclass 32, count 2 2006.229.16:47:06.02#ibcon#*after write, iclass 32, count 2 2006.229.16:47:06.02#ibcon#*before return 0, iclass 32, count 2 2006.229.16:47:06.02#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:47:06.02#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.16:47:06.02#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.16:47:06.02#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:06.02#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:47:06.14#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:47:06.14#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:47:06.14#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:47:06.14#ibcon#first serial, iclass 32, count 0 2006.229.16:47:06.14#ibcon#enter sib2, iclass 32, count 0 2006.229.16:47:06.14#ibcon#flushed, iclass 32, count 0 2006.229.16:47:06.14#ibcon#about to write, iclass 32, count 0 2006.229.16:47:06.14#ibcon#wrote, iclass 32, count 0 2006.229.16:47:06.14#ibcon#about to read 3, iclass 32, count 0 2006.229.16:47:06.16#ibcon#read 3, iclass 32, count 0 2006.229.16:47:06.16#ibcon#about to read 4, iclass 32, count 0 2006.229.16:47:06.16#ibcon#read 4, iclass 32, count 0 2006.229.16:47:06.16#ibcon#about to read 5, iclass 32, count 0 2006.229.16:47:06.16#ibcon#read 5, iclass 32, count 0 2006.229.16:47:06.16#ibcon#about to read 6, iclass 32, count 0 2006.229.16:47:06.16#ibcon#read 6, iclass 32, count 0 2006.229.16:47:06.16#ibcon#end of sib2, iclass 32, count 0 2006.229.16:47:06.16#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:47:06.16#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:47:06.16#ibcon#[25=USB\r\n] 2006.229.16:47:06.16#ibcon#*before write, iclass 32, count 0 2006.229.16:47:06.16#ibcon#enter sib2, iclass 32, count 0 2006.229.16:47:06.16#ibcon#flushed, iclass 32, count 0 2006.229.16:47:06.16#ibcon#about to write, iclass 32, count 0 2006.229.16:47:06.16#ibcon#wrote, iclass 32, count 0 2006.229.16:47:06.16#ibcon#about to read 3, iclass 32, count 0 2006.229.16:47:06.19#ibcon#read 3, iclass 32, count 0 2006.229.16:47:06.19#ibcon#about to read 4, iclass 32, count 0 2006.229.16:47:06.19#ibcon#read 4, iclass 32, count 0 2006.229.16:47:06.19#ibcon#about to read 5, iclass 32, count 0 2006.229.16:47:06.19#ibcon#read 5, iclass 32, count 0 2006.229.16:47:06.19#ibcon#about to read 6, iclass 32, count 0 2006.229.16:47:06.19#ibcon#read 6, iclass 32, count 0 2006.229.16:47:06.19#ibcon#end of sib2, iclass 32, count 0 2006.229.16:47:06.19#ibcon#*after write, iclass 32, count 0 2006.229.16:47:06.19#ibcon#*before return 0, iclass 32, count 0 2006.229.16:47:06.19#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:47:06.19#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.16:47:06.19#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:47:06.19#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:47:06.19$vck44/vblo=1,629.99 2006.229.16:47:06.19#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.16:47:06.19#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.16:47:06.19#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:06.19#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:47:06.19#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:47:06.19#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:47:06.19#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:47:06.19#ibcon#first serial, iclass 34, count 0 2006.229.16:47:06.19#ibcon#enter sib2, iclass 34, count 0 2006.229.16:47:06.19#ibcon#flushed, iclass 34, count 0 2006.229.16:47:06.19#ibcon#about to write, iclass 34, count 0 2006.229.16:47:06.19#ibcon#wrote, iclass 34, count 0 2006.229.16:47:06.19#ibcon#about to read 3, iclass 34, count 0 2006.229.16:47:06.21#ibcon#read 3, iclass 34, count 0 2006.229.16:47:06.21#ibcon#about to read 4, iclass 34, count 0 2006.229.16:47:06.21#ibcon#read 4, iclass 34, count 0 2006.229.16:47:06.21#ibcon#about to read 5, iclass 34, count 0 2006.229.16:47:06.21#ibcon#read 5, iclass 34, count 0 2006.229.16:47:06.21#ibcon#about to read 6, iclass 34, count 0 2006.229.16:47:06.21#ibcon#read 6, iclass 34, count 0 2006.229.16:47:06.21#ibcon#end of sib2, iclass 34, count 0 2006.229.16:47:06.21#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:47:06.21#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:47:06.21#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:47:06.21#ibcon#*before write, iclass 34, count 0 2006.229.16:47:06.21#ibcon#enter sib2, iclass 34, count 0 2006.229.16:47:06.21#ibcon#flushed, iclass 34, count 0 2006.229.16:47:06.21#ibcon#about to write, iclass 34, count 0 2006.229.16:47:06.21#ibcon#wrote, iclass 34, count 0 2006.229.16:47:06.21#ibcon#about to read 3, iclass 34, count 0 2006.229.16:47:06.25#ibcon#read 3, iclass 34, count 0 2006.229.16:47:06.25#ibcon#about to read 4, iclass 34, count 0 2006.229.16:47:06.25#ibcon#read 4, iclass 34, count 0 2006.229.16:47:06.25#ibcon#about to read 5, iclass 34, count 0 2006.229.16:47:06.25#ibcon#read 5, iclass 34, count 0 2006.229.16:47:06.25#ibcon#about to read 6, iclass 34, count 0 2006.229.16:47:06.25#ibcon#read 6, iclass 34, count 0 2006.229.16:47:06.25#ibcon#end of sib2, iclass 34, count 0 2006.229.16:47:06.25#ibcon#*after write, iclass 34, count 0 2006.229.16:47:06.25#ibcon#*before return 0, iclass 34, count 0 2006.229.16:47:06.25#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:47:06.25#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.16:47:06.25#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:47:06.25#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:47:06.25$vck44/vb=1,4 2006.229.16:47:06.25#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.16:47:06.25#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.16:47:06.25#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:06.25#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:47:06.25#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:47:06.25#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:47:06.25#ibcon#enter wrdev, iclass 36, count 2 2006.229.16:47:06.25#ibcon#first serial, iclass 36, count 2 2006.229.16:47:06.25#ibcon#enter sib2, iclass 36, count 2 2006.229.16:47:06.25#ibcon#flushed, iclass 36, count 2 2006.229.16:47:06.25#ibcon#about to write, iclass 36, count 2 2006.229.16:47:06.25#ibcon#wrote, iclass 36, count 2 2006.229.16:47:06.25#ibcon#about to read 3, iclass 36, count 2 2006.229.16:47:06.27#ibcon#read 3, iclass 36, count 2 2006.229.16:47:06.27#ibcon#about to read 4, iclass 36, count 2 2006.229.16:47:06.27#ibcon#read 4, iclass 36, count 2 2006.229.16:47:06.27#ibcon#about to read 5, iclass 36, count 2 2006.229.16:47:06.27#ibcon#read 5, iclass 36, count 2 2006.229.16:47:06.27#ibcon#about to read 6, iclass 36, count 2 2006.229.16:47:06.27#ibcon#read 6, iclass 36, count 2 2006.229.16:47:06.27#ibcon#end of sib2, iclass 36, count 2 2006.229.16:47:06.27#ibcon#*mode == 0, iclass 36, count 2 2006.229.16:47:06.27#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.16:47:06.27#ibcon#[27=AT01-04\r\n] 2006.229.16:47:06.27#ibcon#*before write, iclass 36, count 2 2006.229.16:47:06.27#ibcon#enter sib2, iclass 36, count 2 2006.229.16:47:06.27#ibcon#flushed, iclass 36, count 2 2006.229.16:47:06.27#ibcon#about to write, iclass 36, count 2 2006.229.16:47:06.27#ibcon#wrote, iclass 36, count 2 2006.229.16:47:06.27#ibcon#about to read 3, iclass 36, count 2 2006.229.16:47:06.30#ibcon#read 3, iclass 36, count 2 2006.229.16:47:06.30#ibcon#about to read 4, iclass 36, count 2 2006.229.16:47:06.30#ibcon#read 4, iclass 36, count 2 2006.229.16:47:06.30#ibcon#about to read 5, iclass 36, count 2 2006.229.16:47:06.30#ibcon#read 5, iclass 36, count 2 2006.229.16:47:06.30#ibcon#about to read 6, iclass 36, count 2 2006.229.16:47:06.30#ibcon#read 6, iclass 36, count 2 2006.229.16:47:06.30#ibcon#end of sib2, iclass 36, count 2 2006.229.16:47:06.30#ibcon#*after write, iclass 36, count 2 2006.229.16:47:06.30#ibcon#*before return 0, iclass 36, count 2 2006.229.16:47:06.30#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:47:06.30#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.16:47:06.30#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.16:47:06.30#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:06.30#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:47:06.42#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:47:06.42#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:47:06.42#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:47:06.42#ibcon#first serial, iclass 36, count 0 2006.229.16:47:06.42#ibcon#enter sib2, iclass 36, count 0 2006.229.16:47:06.42#ibcon#flushed, iclass 36, count 0 2006.229.16:47:06.42#ibcon#about to write, iclass 36, count 0 2006.229.16:47:06.42#ibcon#wrote, iclass 36, count 0 2006.229.16:47:06.42#ibcon#about to read 3, iclass 36, count 0 2006.229.16:47:06.44#ibcon#read 3, iclass 36, count 0 2006.229.16:47:06.44#ibcon#about to read 4, iclass 36, count 0 2006.229.16:47:06.44#ibcon#read 4, iclass 36, count 0 2006.229.16:47:06.44#ibcon#about to read 5, iclass 36, count 0 2006.229.16:47:06.44#ibcon#read 5, iclass 36, count 0 2006.229.16:47:06.44#ibcon#about to read 6, iclass 36, count 0 2006.229.16:47:06.44#ibcon#read 6, iclass 36, count 0 2006.229.16:47:06.44#ibcon#end of sib2, iclass 36, count 0 2006.229.16:47:06.44#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:47:06.44#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:47:06.44#ibcon#[27=USB\r\n] 2006.229.16:47:06.44#ibcon#*before write, iclass 36, count 0 2006.229.16:47:06.44#ibcon#enter sib2, iclass 36, count 0 2006.229.16:47:06.44#ibcon#flushed, iclass 36, count 0 2006.229.16:47:06.44#ibcon#about to write, iclass 36, count 0 2006.229.16:47:06.44#ibcon#wrote, iclass 36, count 0 2006.229.16:47:06.44#ibcon#about to read 3, iclass 36, count 0 2006.229.16:47:06.47#ibcon#read 3, iclass 36, count 0 2006.229.16:47:06.47#ibcon#about to read 4, iclass 36, count 0 2006.229.16:47:06.47#ibcon#read 4, iclass 36, count 0 2006.229.16:47:06.47#ibcon#about to read 5, iclass 36, count 0 2006.229.16:47:06.47#ibcon#read 5, iclass 36, count 0 2006.229.16:47:06.47#ibcon#about to read 6, iclass 36, count 0 2006.229.16:47:06.47#ibcon#read 6, iclass 36, count 0 2006.229.16:47:06.47#ibcon#end of sib2, iclass 36, count 0 2006.229.16:47:06.47#ibcon#*after write, iclass 36, count 0 2006.229.16:47:06.47#ibcon#*before return 0, iclass 36, count 0 2006.229.16:47:06.47#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:47:06.47#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.16:47:06.47#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:47:06.47#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:47:06.47$vck44/vblo=2,634.99 2006.229.16:47:06.47#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.16:47:06.47#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.16:47:06.47#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:06.47#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:06.47#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:06.47#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:06.47#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:47:06.47#ibcon#first serial, iclass 38, count 0 2006.229.16:47:06.47#ibcon#enter sib2, iclass 38, count 0 2006.229.16:47:06.47#ibcon#flushed, iclass 38, count 0 2006.229.16:47:06.47#ibcon#about to write, iclass 38, count 0 2006.229.16:47:06.47#ibcon#wrote, iclass 38, count 0 2006.229.16:47:06.47#ibcon#about to read 3, iclass 38, count 0 2006.229.16:47:06.49#ibcon#read 3, iclass 38, count 0 2006.229.16:47:06.49#ibcon#about to read 4, iclass 38, count 0 2006.229.16:47:06.49#ibcon#read 4, iclass 38, count 0 2006.229.16:47:06.49#ibcon#about to read 5, iclass 38, count 0 2006.229.16:47:06.49#ibcon#read 5, iclass 38, count 0 2006.229.16:47:06.49#ibcon#about to read 6, iclass 38, count 0 2006.229.16:47:06.49#ibcon#read 6, iclass 38, count 0 2006.229.16:47:06.49#ibcon#end of sib2, iclass 38, count 0 2006.229.16:47:06.49#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:47:06.49#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:47:06.49#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:47:06.49#ibcon#*before write, iclass 38, count 0 2006.229.16:47:06.49#ibcon#enter sib2, iclass 38, count 0 2006.229.16:47:06.49#ibcon#flushed, iclass 38, count 0 2006.229.16:47:06.49#ibcon#about to write, iclass 38, count 0 2006.229.16:47:06.49#ibcon#wrote, iclass 38, count 0 2006.229.16:47:06.49#ibcon#about to read 3, iclass 38, count 0 2006.229.16:47:06.53#ibcon#read 3, iclass 38, count 0 2006.229.16:47:06.53#ibcon#about to read 4, iclass 38, count 0 2006.229.16:47:06.53#ibcon#read 4, iclass 38, count 0 2006.229.16:47:06.53#ibcon#about to read 5, iclass 38, count 0 2006.229.16:47:06.53#ibcon#read 5, iclass 38, count 0 2006.229.16:47:06.53#ibcon#about to read 6, iclass 38, count 0 2006.229.16:47:06.53#ibcon#read 6, iclass 38, count 0 2006.229.16:47:06.53#ibcon#end of sib2, iclass 38, count 0 2006.229.16:47:06.53#ibcon#*after write, iclass 38, count 0 2006.229.16:47:06.53#ibcon#*before return 0, iclass 38, count 0 2006.229.16:47:06.53#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:06.53#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.16:47:06.53#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:47:06.53#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:47:06.53$vck44/vb=2,4 2006.229.16:47:06.53#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.16:47:06.53#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.16:47:06.53#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:06.53#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:06.59#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:06.59#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:06.59#ibcon#enter wrdev, iclass 40, count 2 2006.229.16:47:06.59#ibcon#first serial, iclass 40, count 2 2006.229.16:47:06.59#ibcon#enter sib2, iclass 40, count 2 2006.229.16:47:06.59#ibcon#flushed, iclass 40, count 2 2006.229.16:47:06.59#ibcon#about to write, iclass 40, count 2 2006.229.16:47:06.59#ibcon#wrote, iclass 40, count 2 2006.229.16:47:06.59#ibcon#about to read 3, iclass 40, count 2 2006.229.16:47:06.61#ibcon#read 3, iclass 40, count 2 2006.229.16:47:06.61#ibcon#about to read 4, iclass 40, count 2 2006.229.16:47:06.61#ibcon#read 4, iclass 40, count 2 2006.229.16:47:06.61#ibcon#about to read 5, iclass 40, count 2 2006.229.16:47:06.61#ibcon#read 5, iclass 40, count 2 2006.229.16:47:06.61#ibcon#about to read 6, iclass 40, count 2 2006.229.16:47:06.61#ibcon#read 6, iclass 40, count 2 2006.229.16:47:06.61#ibcon#end of sib2, iclass 40, count 2 2006.229.16:47:06.61#ibcon#*mode == 0, iclass 40, count 2 2006.229.16:47:06.61#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.16:47:06.61#ibcon#[27=AT02-04\r\n] 2006.229.16:47:06.61#ibcon#*before write, iclass 40, count 2 2006.229.16:47:06.61#ibcon#enter sib2, iclass 40, count 2 2006.229.16:47:06.61#ibcon#flushed, iclass 40, count 2 2006.229.16:47:06.61#ibcon#about to write, iclass 40, count 2 2006.229.16:47:06.61#ibcon#wrote, iclass 40, count 2 2006.229.16:47:06.61#ibcon#about to read 3, iclass 40, count 2 2006.229.16:47:06.64#ibcon#read 3, iclass 40, count 2 2006.229.16:47:06.64#ibcon#about to read 4, iclass 40, count 2 2006.229.16:47:06.64#ibcon#read 4, iclass 40, count 2 2006.229.16:47:06.64#ibcon#about to read 5, iclass 40, count 2 2006.229.16:47:06.64#ibcon#read 5, iclass 40, count 2 2006.229.16:47:06.64#ibcon#about to read 6, iclass 40, count 2 2006.229.16:47:06.64#ibcon#read 6, iclass 40, count 2 2006.229.16:47:06.64#ibcon#end of sib2, iclass 40, count 2 2006.229.16:47:06.64#ibcon#*after write, iclass 40, count 2 2006.229.16:47:06.64#ibcon#*before return 0, iclass 40, count 2 2006.229.16:47:06.64#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:06.64#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.16:47:06.64#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.16:47:06.64#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:06.64#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:06.76#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:06.76#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:06.76#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:47:06.76#ibcon#first serial, iclass 40, count 0 2006.229.16:47:06.76#ibcon#enter sib2, iclass 40, count 0 2006.229.16:47:06.76#ibcon#flushed, iclass 40, count 0 2006.229.16:47:06.76#ibcon#about to write, iclass 40, count 0 2006.229.16:47:06.76#ibcon#wrote, iclass 40, count 0 2006.229.16:47:06.76#ibcon#about to read 3, iclass 40, count 0 2006.229.16:47:06.78#ibcon#read 3, iclass 40, count 0 2006.229.16:47:06.78#ibcon#about to read 4, iclass 40, count 0 2006.229.16:47:06.78#ibcon#read 4, iclass 40, count 0 2006.229.16:47:06.78#ibcon#about to read 5, iclass 40, count 0 2006.229.16:47:06.78#ibcon#read 5, iclass 40, count 0 2006.229.16:47:06.78#ibcon#about to read 6, iclass 40, count 0 2006.229.16:47:06.78#ibcon#read 6, iclass 40, count 0 2006.229.16:47:06.78#ibcon#end of sib2, iclass 40, count 0 2006.229.16:47:06.78#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:47:06.78#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:47:06.78#ibcon#[27=USB\r\n] 2006.229.16:47:06.78#ibcon#*before write, iclass 40, count 0 2006.229.16:47:06.78#ibcon#enter sib2, iclass 40, count 0 2006.229.16:47:06.78#ibcon#flushed, iclass 40, count 0 2006.229.16:47:06.78#ibcon#about to write, iclass 40, count 0 2006.229.16:47:06.78#ibcon#wrote, iclass 40, count 0 2006.229.16:47:06.78#ibcon#about to read 3, iclass 40, count 0 2006.229.16:47:06.81#ibcon#read 3, iclass 40, count 0 2006.229.16:47:06.81#ibcon#about to read 4, iclass 40, count 0 2006.229.16:47:06.81#ibcon#read 4, iclass 40, count 0 2006.229.16:47:06.81#ibcon#about to read 5, iclass 40, count 0 2006.229.16:47:06.81#ibcon#read 5, iclass 40, count 0 2006.229.16:47:06.81#ibcon#about to read 6, iclass 40, count 0 2006.229.16:47:06.81#ibcon#read 6, iclass 40, count 0 2006.229.16:47:06.81#ibcon#end of sib2, iclass 40, count 0 2006.229.16:47:06.81#ibcon#*after write, iclass 40, count 0 2006.229.16:47:06.81#ibcon#*before return 0, iclass 40, count 0 2006.229.16:47:06.81#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:06.81#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.16:47:06.81#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:47:06.81#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:47:06.81$vck44/vblo=3,649.99 2006.229.16:47:06.81#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.16:47:06.81#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.16:47:06.81#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:06.81#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:06.81#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:06.81#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:06.81#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:47:06.81#ibcon#first serial, iclass 4, count 0 2006.229.16:47:06.81#ibcon#enter sib2, iclass 4, count 0 2006.229.16:47:06.81#ibcon#flushed, iclass 4, count 0 2006.229.16:47:06.81#ibcon#about to write, iclass 4, count 0 2006.229.16:47:06.81#ibcon#wrote, iclass 4, count 0 2006.229.16:47:06.81#ibcon#about to read 3, iclass 4, count 0 2006.229.16:47:06.83#ibcon#read 3, iclass 4, count 0 2006.229.16:47:06.83#ibcon#about to read 4, iclass 4, count 0 2006.229.16:47:06.83#ibcon#read 4, iclass 4, count 0 2006.229.16:47:06.83#ibcon#about to read 5, iclass 4, count 0 2006.229.16:47:06.83#ibcon#read 5, iclass 4, count 0 2006.229.16:47:06.83#ibcon#about to read 6, iclass 4, count 0 2006.229.16:47:06.83#ibcon#read 6, iclass 4, count 0 2006.229.16:47:06.83#ibcon#end of sib2, iclass 4, count 0 2006.229.16:47:06.83#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:47:06.83#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:47:06.83#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:47:06.83#ibcon#*before write, iclass 4, count 0 2006.229.16:47:06.83#ibcon#enter sib2, iclass 4, count 0 2006.229.16:47:06.83#ibcon#flushed, iclass 4, count 0 2006.229.16:47:06.83#ibcon#about to write, iclass 4, count 0 2006.229.16:47:06.83#ibcon#wrote, iclass 4, count 0 2006.229.16:47:06.83#ibcon#about to read 3, iclass 4, count 0 2006.229.16:47:06.87#ibcon#read 3, iclass 4, count 0 2006.229.16:47:06.87#ibcon#about to read 4, iclass 4, count 0 2006.229.16:47:06.87#ibcon#read 4, iclass 4, count 0 2006.229.16:47:06.87#ibcon#about to read 5, iclass 4, count 0 2006.229.16:47:06.87#ibcon#read 5, iclass 4, count 0 2006.229.16:47:06.87#ibcon#about to read 6, iclass 4, count 0 2006.229.16:47:06.87#ibcon#read 6, iclass 4, count 0 2006.229.16:47:06.87#ibcon#end of sib2, iclass 4, count 0 2006.229.16:47:06.87#ibcon#*after write, iclass 4, count 0 2006.229.16:47:06.87#ibcon#*before return 0, iclass 4, count 0 2006.229.16:47:06.87#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:06.87#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.16:47:06.87#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:47:06.87#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:47:06.87$vck44/vb=3,4 2006.229.16:47:06.87#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.16:47:06.87#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.16:47:06.87#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:06.87#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:06.93#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:06.93#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:06.93#ibcon#enter wrdev, iclass 6, count 2 2006.229.16:47:06.93#ibcon#first serial, iclass 6, count 2 2006.229.16:47:06.93#ibcon#enter sib2, iclass 6, count 2 2006.229.16:47:06.93#ibcon#flushed, iclass 6, count 2 2006.229.16:47:06.93#ibcon#about to write, iclass 6, count 2 2006.229.16:47:06.93#ibcon#wrote, iclass 6, count 2 2006.229.16:47:06.93#ibcon#about to read 3, iclass 6, count 2 2006.229.16:47:06.95#ibcon#read 3, iclass 6, count 2 2006.229.16:47:06.95#ibcon#about to read 4, iclass 6, count 2 2006.229.16:47:06.95#ibcon#read 4, iclass 6, count 2 2006.229.16:47:06.95#ibcon#about to read 5, iclass 6, count 2 2006.229.16:47:06.95#ibcon#read 5, iclass 6, count 2 2006.229.16:47:06.95#ibcon#about to read 6, iclass 6, count 2 2006.229.16:47:06.95#ibcon#read 6, iclass 6, count 2 2006.229.16:47:06.95#ibcon#end of sib2, iclass 6, count 2 2006.229.16:47:06.95#ibcon#*mode == 0, iclass 6, count 2 2006.229.16:47:06.95#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.16:47:06.95#ibcon#[27=AT03-04\r\n] 2006.229.16:47:06.95#ibcon#*before write, iclass 6, count 2 2006.229.16:47:06.95#ibcon#enter sib2, iclass 6, count 2 2006.229.16:47:06.95#ibcon#flushed, iclass 6, count 2 2006.229.16:47:06.95#ibcon#about to write, iclass 6, count 2 2006.229.16:47:06.95#ibcon#wrote, iclass 6, count 2 2006.229.16:47:06.95#ibcon#about to read 3, iclass 6, count 2 2006.229.16:47:06.98#ibcon#read 3, iclass 6, count 2 2006.229.16:47:06.98#ibcon#about to read 4, iclass 6, count 2 2006.229.16:47:06.98#ibcon#read 4, iclass 6, count 2 2006.229.16:47:06.98#ibcon#about to read 5, iclass 6, count 2 2006.229.16:47:06.98#ibcon#read 5, iclass 6, count 2 2006.229.16:47:06.98#ibcon#about to read 6, iclass 6, count 2 2006.229.16:47:06.98#ibcon#read 6, iclass 6, count 2 2006.229.16:47:06.98#ibcon#end of sib2, iclass 6, count 2 2006.229.16:47:06.98#ibcon#*after write, iclass 6, count 2 2006.229.16:47:06.98#ibcon#*before return 0, iclass 6, count 2 2006.229.16:47:06.98#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:06.98#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.16:47:06.98#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.16:47:06.98#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:06.98#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:07.10#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:07.10#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:07.10#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:47:07.10#ibcon#first serial, iclass 6, count 0 2006.229.16:47:07.10#ibcon#enter sib2, iclass 6, count 0 2006.229.16:47:07.10#ibcon#flushed, iclass 6, count 0 2006.229.16:47:07.10#ibcon#about to write, iclass 6, count 0 2006.229.16:47:07.10#ibcon#wrote, iclass 6, count 0 2006.229.16:47:07.10#ibcon#about to read 3, iclass 6, count 0 2006.229.16:47:07.12#ibcon#read 3, iclass 6, count 0 2006.229.16:47:07.12#ibcon#about to read 4, iclass 6, count 0 2006.229.16:47:07.12#ibcon#read 4, iclass 6, count 0 2006.229.16:47:07.12#ibcon#about to read 5, iclass 6, count 0 2006.229.16:47:07.12#ibcon#read 5, iclass 6, count 0 2006.229.16:47:07.12#ibcon#about to read 6, iclass 6, count 0 2006.229.16:47:07.12#ibcon#read 6, iclass 6, count 0 2006.229.16:47:07.12#ibcon#end of sib2, iclass 6, count 0 2006.229.16:47:07.12#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:47:07.12#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:47:07.12#ibcon#[27=USB\r\n] 2006.229.16:47:07.12#ibcon#*before write, iclass 6, count 0 2006.229.16:47:07.12#ibcon#enter sib2, iclass 6, count 0 2006.229.16:47:07.12#ibcon#flushed, iclass 6, count 0 2006.229.16:47:07.12#ibcon#about to write, iclass 6, count 0 2006.229.16:47:07.12#ibcon#wrote, iclass 6, count 0 2006.229.16:47:07.12#ibcon#about to read 3, iclass 6, count 0 2006.229.16:47:07.15#ibcon#read 3, iclass 6, count 0 2006.229.16:47:07.15#ibcon#about to read 4, iclass 6, count 0 2006.229.16:47:07.15#ibcon#read 4, iclass 6, count 0 2006.229.16:47:07.15#ibcon#about to read 5, iclass 6, count 0 2006.229.16:47:07.15#ibcon#read 5, iclass 6, count 0 2006.229.16:47:07.15#ibcon#about to read 6, iclass 6, count 0 2006.229.16:47:07.15#ibcon#read 6, iclass 6, count 0 2006.229.16:47:07.15#ibcon#end of sib2, iclass 6, count 0 2006.229.16:47:07.15#ibcon#*after write, iclass 6, count 0 2006.229.16:47:07.15#ibcon#*before return 0, iclass 6, count 0 2006.229.16:47:07.15#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:07.15#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.16:47:07.15#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:47:07.15#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:47:07.15$vck44/vblo=4,679.99 2006.229.16:47:07.15#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.16:47:07.15#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.16:47:07.15#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:07.15#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:07.15#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:07.15#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:07.15#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:47:07.15#ibcon#first serial, iclass 10, count 0 2006.229.16:47:07.15#ibcon#enter sib2, iclass 10, count 0 2006.229.16:47:07.15#ibcon#flushed, iclass 10, count 0 2006.229.16:47:07.15#ibcon#about to write, iclass 10, count 0 2006.229.16:47:07.15#ibcon#wrote, iclass 10, count 0 2006.229.16:47:07.15#ibcon#about to read 3, iclass 10, count 0 2006.229.16:47:07.17#ibcon#read 3, iclass 10, count 0 2006.229.16:47:07.17#ibcon#about to read 4, iclass 10, count 0 2006.229.16:47:07.17#ibcon#read 4, iclass 10, count 0 2006.229.16:47:07.17#ibcon#about to read 5, iclass 10, count 0 2006.229.16:47:07.17#ibcon#read 5, iclass 10, count 0 2006.229.16:47:07.17#ibcon#about to read 6, iclass 10, count 0 2006.229.16:47:07.17#ibcon#read 6, iclass 10, count 0 2006.229.16:47:07.17#ibcon#end of sib2, iclass 10, count 0 2006.229.16:47:07.17#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:47:07.17#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:47:07.17#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:47:07.17#ibcon#*before write, iclass 10, count 0 2006.229.16:47:07.17#ibcon#enter sib2, iclass 10, count 0 2006.229.16:47:07.17#ibcon#flushed, iclass 10, count 0 2006.229.16:47:07.17#ibcon#about to write, iclass 10, count 0 2006.229.16:47:07.17#ibcon#wrote, iclass 10, count 0 2006.229.16:47:07.17#ibcon#about to read 3, iclass 10, count 0 2006.229.16:47:07.21#ibcon#read 3, iclass 10, count 0 2006.229.16:47:07.21#ibcon#about to read 4, iclass 10, count 0 2006.229.16:47:07.21#ibcon#read 4, iclass 10, count 0 2006.229.16:47:07.21#ibcon#about to read 5, iclass 10, count 0 2006.229.16:47:07.21#ibcon#read 5, iclass 10, count 0 2006.229.16:47:07.21#ibcon#about to read 6, iclass 10, count 0 2006.229.16:47:07.21#ibcon#read 6, iclass 10, count 0 2006.229.16:47:07.21#ibcon#end of sib2, iclass 10, count 0 2006.229.16:47:07.21#ibcon#*after write, iclass 10, count 0 2006.229.16:47:07.21#ibcon#*before return 0, iclass 10, count 0 2006.229.16:47:07.21#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:07.21#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.16:47:07.21#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:47:07.21#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:47:07.21$vck44/vb=4,4 2006.229.16:47:07.21#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.16:47:07.21#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.16:47:07.21#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:07.21#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:07.27#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:07.27#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:07.27#ibcon#enter wrdev, iclass 12, count 2 2006.229.16:47:07.27#ibcon#first serial, iclass 12, count 2 2006.229.16:47:07.27#ibcon#enter sib2, iclass 12, count 2 2006.229.16:47:07.27#ibcon#flushed, iclass 12, count 2 2006.229.16:47:07.27#ibcon#about to write, iclass 12, count 2 2006.229.16:47:07.27#ibcon#wrote, iclass 12, count 2 2006.229.16:47:07.27#ibcon#about to read 3, iclass 12, count 2 2006.229.16:47:07.29#ibcon#read 3, iclass 12, count 2 2006.229.16:47:07.29#ibcon#about to read 4, iclass 12, count 2 2006.229.16:47:07.29#ibcon#read 4, iclass 12, count 2 2006.229.16:47:07.29#ibcon#about to read 5, iclass 12, count 2 2006.229.16:47:07.29#ibcon#read 5, iclass 12, count 2 2006.229.16:47:07.29#ibcon#about to read 6, iclass 12, count 2 2006.229.16:47:07.29#ibcon#read 6, iclass 12, count 2 2006.229.16:47:07.29#ibcon#end of sib2, iclass 12, count 2 2006.229.16:47:07.29#ibcon#*mode == 0, iclass 12, count 2 2006.229.16:47:07.29#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.16:47:07.29#ibcon#[27=AT04-04\r\n] 2006.229.16:47:07.29#ibcon#*before write, iclass 12, count 2 2006.229.16:47:07.29#ibcon#enter sib2, iclass 12, count 2 2006.229.16:47:07.29#ibcon#flushed, iclass 12, count 2 2006.229.16:47:07.29#ibcon#about to write, iclass 12, count 2 2006.229.16:47:07.29#ibcon#wrote, iclass 12, count 2 2006.229.16:47:07.29#ibcon#about to read 3, iclass 12, count 2 2006.229.16:47:07.32#ibcon#read 3, iclass 12, count 2 2006.229.16:47:07.32#ibcon#about to read 4, iclass 12, count 2 2006.229.16:47:07.32#ibcon#read 4, iclass 12, count 2 2006.229.16:47:07.32#ibcon#about to read 5, iclass 12, count 2 2006.229.16:47:07.32#ibcon#read 5, iclass 12, count 2 2006.229.16:47:07.32#ibcon#about to read 6, iclass 12, count 2 2006.229.16:47:07.32#ibcon#read 6, iclass 12, count 2 2006.229.16:47:07.32#ibcon#end of sib2, iclass 12, count 2 2006.229.16:47:07.32#ibcon#*after write, iclass 12, count 2 2006.229.16:47:07.32#ibcon#*before return 0, iclass 12, count 2 2006.229.16:47:07.32#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:07.32#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.16:47:07.32#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.16:47:07.32#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:07.32#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:07.44#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:07.44#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:07.44#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:47:07.44#ibcon#first serial, iclass 12, count 0 2006.229.16:47:07.44#ibcon#enter sib2, iclass 12, count 0 2006.229.16:47:07.44#ibcon#flushed, iclass 12, count 0 2006.229.16:47:07.44#ibcon#about to write, iclass 12, count 0 2006.229.16:47:07.44#ibcon#wrote, iclass 12, count 0 2006.229.16:47:07.44#ibcon#about to read 3, iclass 12, count 0 2006.229.16:47:07.46#ibcon#read 3, iclass 12, count 0 2006.229.16:47:07.46#ibcon#about to read 4, iclass 12, count 0 2006.229.16:47:07.46#ibcon#read 4, iclass 12, count 0 2006.229.16:47:07.46#ibcon#about to read 5, iclass 12, count 0 2006.229.16:47:07.46#ibcon#read 5, iclass 12, count 0 2006.229.16:47:07.46#ibcon#about to read 6, iclass 12, count 0 2006.229.16:47:07.46#ibcon#read 6, iclass 12, count 0 2006.229.16:47:07.46#ibcon#end of sib2, iclass 12, count 0 2006.229.16:47:07.46#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:47:07.46#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:47:07.46#ibcon#[27=USB\r\n] 2006.229.16:47:07.46#ibcon#*before write, iclass 12, count 0 2006.229.16:47:07.46#ibcon#enter sib2, iclass 12, count 0 2006.229.16:47:07.46#ibcon#flushed, iclass 12, count 0 2006.229.16:47:07.46#ibcon#about to write, iclass 12, count 0 2006.229.16:47:07.46#ibcon#wrote, iclass 12, count 0 2006.229.16:47:07.46#ibcon#about to read 3, iclass 12, count 0 2006.229.16:47:07.49#ibcon#read 3, iclass 12, count 0 2006.229.16:47:07.49#ibcon#about to read 4, iclass 12, count 0 2006.229.16:47:07.49#ibcon#read 4, iclass 12, count 0 2006.229.16:47:07.49#ibcon#about to read 5, iclass 12, count 0 2006.229.16:47:07.49#ibcon#read 5, iclass 12, count 0 2006.229.16:47:07.49#ibcon#about to read 6, iclass 12, count 0 2006.229.16:47:07.49#ibcon#read 6, iclass 12, count 0 2006.229.16:47:07.49#ibcon#end of sib2, iclass 12, count 0 2006.229.16:47:07.49#ibcon#*after write, iclass 12, count 0 2006.229.16:47:07.49#ibcon#*before return 0, iclass 12, count 0 2006.229.16:47:07.49#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:07.49#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.16:47:07.49#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:47:07.49#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:47:07.49$vck44/vblo=5,709.99 2006.229.16:47:07.49#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.16:47:07.49#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.16:47:07.49#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:07.49#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:07.49#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:07.49#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:07.49#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:47:07.49#ibcon#first serial, iclass 14, count 0 2006.229.16:47:07.49#ibcon#enter sib2, iclass 14, count 0 2006.229.16:47:07.49#ibcon#flushed, iclass 14, count 0 2006.229.16:47:07.49#ibcon#about to write, iclass 14, count 0 2006.229.16:47:07.49#ibcon#wrote, iclass 14, count 0 2006.229.16:47:07.49#ibcon#about to read 3, iclass 14, count 0 2006.229.16:47:07.51#ibcon#read 3, iclass 14, count 0 2006.229.16:47:07.51#ibcon#about to read 4, iclass 14, count 0 2006.229.16:47:07.51#ibcon#read 4, iclass 14, count 0 2006.229.16:47:07.51#ibcon#about to read 5, iclass 14, count 0 2006.229.16:47:07.51#ibcon#read 5, iclass 14, count 0 2006.229.16:47:07.51#ibcon#about to read 6, iclass 14, count 0 2006.229.16:47:07.51#ibcon#read 6, iclass 14, count 0 2006.229.16:47:07.51#ibcon#end of sib2, iclass 14, count 0 2006.229.16:47:07.51#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:47:07.51#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:47:07.51#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:47:07.51#ibcon#*before write, iclass 14, count 0 2006.229.16:47:07.51#ibcon#enter sib2, iclass 14, count 0 2006.229.16:47:07.51#ibcon#flushed, iclass 14, count 0 2006.229.16:47:07.51#ibcon#about to write, iclass 14, count 0 2006.229.16:47:07.51#ibcon#wrote, iclass 14, count 0 2006.229.16:47:07.51#ibcon#about to read 3, iclass 14, count 0 2006.229.16:47:07.55#ibcon#read 3, iclass 14, count 0 2006.229.16:47:07.55#ibcon#about to read 4, iclass 14, count 0 2006.229.16:47:07.55#ibcon#read 4, iclass 14, count 0 2006.229.16:47:07.55#ibcon#about to read 5, iclass 14, count 0 2006.229.16:47:07.55#ibcon#read 5, iclass 14, count 0 2006.229.16:47:07.55#ibcon#about to read 6, iclass 14, count 0 2006.229.16:47:07.55#ibcon#read 6, iclass 14, count 0 2006.229.16:47:07.55#ibcon#end of sib2, iclass 14, count 0 2006.229.16:47:07.55#ibcon#*after write, iclass 14, count 0 2006.229.16:47:07.55#ibcon#*before return 0, iclass 14, count 0 2006.229.16:47:07.55#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:07.55#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.16:47:07.55#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:47:07.55#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:47:07.55$vck44/vb=5,4 2006.229.16:47:07.55#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.16:47:07.55#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.16:47:07.55#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:07.55#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:07.61#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:07.61#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:07.61#ibcon#enter wrdev, iclass 16, count 2 2006.229.16:47:07.61#ibcon#first serial, iclass 16, count 2 2006.229.16:47:07.61#ibcon#enter sib2, iclass 16, count 2 2006.229.16:47:07.61#ibcon#flushed, iclass 16, count 2 2006.229.16:47:07.61#ibcon#about to write, iclass 16, count 2 2006.229.16:47:07.61#ibcon#wrote, iclass 16, count 2 2006.229.16:47:07.61#ibcon#about to read 3, iclass 16, count 2 2006.229.16:47:07.63#ibcon#read 3, iclass 16, count 2 2006.229.16:47:07.63#ibcon#about to read 4, iclass 16, count 2 2006.229.16:47:07.63#ibcon#read 4, iclass 16, count 2 2006.229.16:47:07.63#ibcon#about to read 5, iclass 16, count 2 2006.229.16:47:07.63#ibcon#read 5, iclass 16, count 2 2006.229.16:47:07.63#ibcon#about to read 6, iclass 16, count 2 2006.229.16:47:07.63#ibcon#read 6, iclass 16, count 2 2006.229.16:47:07.63#ibcon#end of sib2, iclass 16, count 2 2006.229.16:47:07.63#ibcon#*mode == 0, iclass 16, count 2 2006.229.16:47:07.63#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.16:47:07.63#ibcon#[27=AT05-04\r\n] 2006.229.16:47:07.63#ibcon#*before write, iclass 16, count 2 2006.229.16:47:07.63#ibcon#enter sib2, iclass 16, count 2 2006.229.16:47:07.63#ibcon#flushed, iclass 16, count 2 2006.229.16:47:07.63#ibcon#about to write, iclass 16, count 2 2006.229.16:47:07.63#ibcon#wrote, iclass 16, count 2 2006.229.16:47:07.63#ibcon#about to read 3, iclass 16, count 2 2006.229.16:47:07.66#ibcon#read 3, iclass 16, count 2 2006.229.16:47:07.66#ibcon#about to read 4, iclass 16, count 2 2006.229.16:47:07.66#ibcon#read 4, iclass 16, count 2 2006.229.16:47:07.66#ibcon#about to read 5, iclass 16, count 2 2006.229.16:47:07.66#ibcon#read 5, iclass 16, count 2 2006.229.16:47:07.66#ibcon#about to read 6, iclass 16, count 2 2006.229.16:47:07.66#ibcon#read 6, iclass 16, count 2 2006.229.16:47:07.66#ibcon#end of sib2, iclass 16, count 2 2006.229.16:47:07.66#ibcon#*after write, iclass 16, count 2 2006.229.16:47:07.66#ibcon#*before return 0, iclass 16, count 2 2006.229.16:47:07.66#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:07.66#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.16:47:07.66#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.16:47:07.66#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:07.66#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:07.78#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:07.78#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:07.78#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:47:07.78#ibcon#first serial, iclass 16, count 0 2006.229.16:47:07.78#ibcon#enter sib2, iclass 16, count 0 2006.229.16:47:07.78#ibcon#flushed, iclass 16, count 0 2006.229.16:47:07.78#ibcon#about to write, iclass 16, count 0 2006.229.16:47:07.78#ibcon#wrote, iclass 16, count 0 2006.229.16:47:07.78#ibcon#about to read 3, iclass 16, count 0 2006.229.16:47:07.80#ibcon#read 3, iclass 16, count 0 2006.229.16:47:07.80#ibcon#about to read 4, iclass 16, count 0 2006.229.16:47:07.80#ibcon#read 4, iclass 16, count 0 2006.229.16:47:07.80#ibcon#about to read 5, iclass 16, count 0 2006.229.16:47:07.80#ibcon#read 5, iclass 16, count 0 2006.229.16:47:07.80#ibcon#about to read 6, iclass 16, count 0 2006.229.16:47:07.80#ibcon#read 6, iclass 16, count 0 2006.229.16:47:07.80#ibcon#end of sib2, iclass 16, count 0 2006.229.16:47:07.80#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:47:07.80#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:47:07.80#ibcon#[27=USB\r\n] 2006.229.16:47:07.80#ibcon#*before write, iclass 16, count 0 2006.229.16:47:07.80#ibcon#enter sib2, iclass 16, count 0 2006.229.16:47:07.80#ibcon#flushed, iclass 16, count 0 2006.229.16:47:07.80#ibcon#about to write, iclass 16, count 0 2006.229.16:47:07.80#ibcon#wrote, iclass 16, count 0 2006.229.16:47:07.80#ibcon#about to read 3, iclass 16, count 0 2006.229.16:47:07.83#ibcon#read 3, iclass 16, count 0 2006.229.16:47:07.83#ibcon#about to read 4, iclass 16, count 0 2006.229.16:47:07.83#ibcon#read 4, iclass 16, count 0 2006.229.16:47:07.83#ibcon#about to read 5, iclass 16, count 0 2006.229.16:47:07.83#ibcon#read 5, iclass 16, count 0 2006.229.16:47:07.83#ibcon#about to read 6, iclass 16, count 0 2006.229.16:47:07.83#ibcon#read 6, iclass 16, count 0 2006.229.16:47:07.83#ibcon#end of sib2, iclass 16, count 0 2006.229.16:47:07.83#ibcon#*after write, iclass 16, count 0 2006.229.16:47:07.83#ibcon#*before return 0, iclass 16, count 0 2006.229.16:47:07.83#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:07.83#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.16:47:07.83#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:47:07.83#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:47:07.83$vck44/vblo=6,719.99 2006.229.16:47:07.83#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.16:47:07.83#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.16:47:07.83#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:07.83#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:07.83#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:07.83#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:07.83#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:47:07.83#ibcon#first serial, iclass 18, count 0 2006.229.16:47:07.83#ibcon#enter sib2, iclass 18, count 0 2006.229.16:47:07.83#ibcon#flushed, iclass 18, count 0 2006.229.16:47:07.83#ibcon#about to write, iclass 18, count 0 2006.229.16:47:07.83#ibcon#wrote, iclass 18, count 0 2006.229.16:47:07.83#ibcon#about to read 3, iclass 18, count 0 2006.229.16:47:07.85#ibcon#read 3, iclass 18, count 0 2006.229.16:47:07.85#ibcon#about to read 4, iclass 18, count 0 2006.229.16:47:07.85#ibcon#read 4, iclass 18, count 0 2006.229.16:47:07.85#ibcon#about to read 5, iclass 18, count 0 2006.229.16:47:07.85#ibcon#read 5, iclass 18, count 0 2006.229.16:47:07.85#ibcon#about to read 6, iclass 18, count 0 2006.229.16:47:07.85#ibcon#read 6, iclass 18, count 0 2006.229.16:47:07.85#ibcon#end of sib2, iclass 18, count 0 2006.229.16:47:07.85#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:47:07.85#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:47:07.85#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:47:07.85#ibcon#*before write, iclass 18, count 0 2006.229.16:47:07.85#ibcon#enter sib2, iclass 18, count 0 2006.229.16:47:07.85#ibcon#flushed, iclass 18, count 0 2006.229.16:47:07.85#ibcon#about to write, iclass 18, count 0 2006.229.16:47:07.85#ibcon#wrote, iclass 18, count 0 2006.229.16:47:07.85#ibcon#about to read 3, iclass 18, count 0 2006.229.16:47:07.89#ibcon#read 3, iclass 18, count 0 2006.229.16:47:07.89#ibcon#about to read 4, iclass 18, count 0 2006.229.16:47:07.89#ibcon#read 4, iclass 18, count 0 2006.229.16:47:07.89#ibcon#about to read 5, iclass 18, count 0 2006.229.16:47:07.89#ibcon#read 5, iclass 18, count 0 2006.229.16:47:07.89#ibcon#about to read 6, iclass 18, count 0 2006.229.16:47:07.89#ibcon#read 6, iclass 18, count 0 2006.229.16:47:07.89#ibcon#end of sib2, iclass 18, count 0 2006.229.16:47:07.89#ibcon#*after write, iclass 18, count 0 2006.229.16:47:07.89#ibcon#*before return 0, iclass 18, count 0 2006.229.16:47:07.89#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:07.89#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.16:47:07.89#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:47:07.89#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:47:07.89$vck44/vb=6,4 2006.229.16:47:07.89#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.16:47:07.89#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.16:47:07.89#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:07.89#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:07.95#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:07.95#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:07.95#ibcon#enter wrdev, iclass 20, count 2 2006.229.16:47:07.95#ibcon#first serial, iclass 20, count 2 2006.229.16:47:07.95#ibcon#enter sib2, iclass 20, count 2 2006.229.16:47:07.95#ibcon#flushed, iclass 20, count 2 2006.229.16:47:07.95#ibcon#about to write, iclass 20, count 2 2006.229.16:47:07.95#ibcon#wrote, iclass 20, count 2 2006.229.16:47:07.95#ibcon#about to read 3, iclass 20, count 2 2006.229.16:47:07.97#ibcon#read 3, iclass 20, count 2 2006.229.16:47:07.97#ibcon#about to read 4, iclass 20, count 2 2006.229.16:47:07.97#ibcon#read 4, iclass 20, count 2 2006.229.16:47:07.97#ibcon#about to read 5, iclass 20, count 2 2006.229.16:47:07.97#ibcon#read 5, iclass 20, count 2 2006.229.16:47:07.97#ibcon#about to read 6, iclass 20, count 2 2006.229.16:47:07.97#ibcon#read 6, iclass 20, count 2 2006.229.16:47:07.97#ibcon#end of sib2, iclass 20, count 2 2006.229.16:47:07.97#ibcon#*mode == 0, iclass 20, count 2 2006.229.16:47:07.97#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.16:47:07.97#ibcon#[27=AT06-04\r\n] 2006.229.16:47:07.97#ibcon#*before write, iclass 20, count 2 2006.229.16:47:07.97#ibcon#enter sib2, iclass 20, count 2 2006.229.16:47:07.97#ibcon#flushed, iclass 20, count 2 2006.229.16:47:07.97#ibcon#about to write, iclass 20, count 2 2006.229.16:47:07.97#ibcon#wrote, iclass 20, count 2 2006.229.16:47:07.97#ibcon#about to read 3, iclass 20, count 2 2006.229.16:47:08.00#ibcon#read 3, iclass 20, count 2 2006.229.16:47:08.00#ibcon#about to read 4, iclass 20, count 2 2006.229.16:47:08.00#ibcon#read 4, iclass 20, count 2 2006.229.16:47:08.00#ibcon#about to read 5, iclass 20, count 2 2006.229.16:47:08.00#ibcon#read 5, iclass 20, count 2 2006.229.16:47:08.00#ibcon#about to read 6, iclass 20, count 2 2006.229.16:47:08.00#ibcon#read 6, iclass 20, count 2 2006.229.16:47:08.00#ibcon#end of sib2, iclass 20, count 2 2006.229.16:47:08.00#ibcon#*after write, iclass 20, count 2 2006.229.16:47:08.00#ibcon#*before return 0, iclass 20, count 2 2006.229.16:47:08.00#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:08.00#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.16:47:08.00#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.16:47:08.00#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:08.00#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:08.12#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:08.12#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:08.12#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:47:08.12#ibcon#first serial, iclass 20, count 0 2006.229.16:47:08.12#ibcon#enter sib2, iclass 20, count 0 2006.229.16:47:08.12#ibcon#flushed, iclass 20, count 0 2006.229.16:47:08.12#ibcon#about to write, iclass 20, count 0 2006.229.16:47:08.12#ibcon#wrote, iclass 20, count 0 2006.229.16:47:08.12#ibcon#about to read 3, iclass 20, count 0 2006.229.16:47:08.14#ibcon#read 3, iclass 20, count 0 2006.229.16:47:08.14#ibcon#about to read 4, iclass 20, count 0 2006.229.16:47:08.14#ibcon#read 4, iclass 20, count 0 2006.229.16:47:08.14#ibcon#about to read 5, iclass 20, count 0 2006.229.16:47:08.14#ibcon#read 5, iclass 20, count 0 2006.229.16:47:08.14#ibcon#about to read 6, iclass 20, count 0 2006.229.16:47:08.14#ibcon#read 6, iclass 20, count 0 2006.229.16:47:08.14#ibcon#end of sib2, iclass 20, count 0 2006.229.16:47:08.14#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:47:08.14#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:47:08.14#ibcon#[27=USB\r\n] 2006.229.16:47:08.14#ibcon#*before write, iclass 20, count 0 2006.229.16:47:08.14#ibcon#enter sib2, iclass 20, count 0 2006.229.16:47:08.14#ibcon#flushed, iclass 20, count 0 2006.229.16:47:08.14#ibcon#about to write, iclass 20, count 0 2006.229.16:47:08.14#ibcon#wrote, iclass 20, count 0 2006.229.16:47:08.14#ibcon#about to read 3, iclass 20, count 0 2006.229.16:47:08.17#ibcon#read 3, iclass 20, count 0 2006.229.16:47:08.17#ibcon#about to read 4, iclass 20, count 0 2006.229.16:47:08.17#ibcon#read 4, iclass 20, count 0 2006.229.16:47:08.17#ibcon#about to read 5, iclass 20, count 0 2006.229.16:47:08.17#ibcon#read 5, iclass 20, count 0 2006.229.16:47:08.17#ibcon#about to read 6, iclass 20, count 0 2006.229.16:47:08.17#ibcon#read 6, iclass 20, count 0 2006.229.16:47:08.17#ibcon#end of sib2, iclass 20, count 0 2006.229.16:47:08.17#ibcon#*after write, iclass 20, count 0 2006.229.16:47:08.17#ibcon#*before return 0, iclass 20, count 0 2006.229.16:47:08.17#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:08.17#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.16:47:08.17#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:47:08.17#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:47:08.17$vck44/vblo=7,734.99 2006.229.16:47:08.17#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.16:47:08.17#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.16:47:08.17#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:08.17#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:08.17#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:08.17#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:08.17#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:47:08.17#ibcon#first serial, iclass 22, count 0 2006.229.16:47:08.17#ibcon#enter sib2, iclass 22, count 0 2006.229.16:47:08.17#ibcon#flushed, iclass 22, count 0 2006.229.16:47:08.17#ibcon#about to write, iclass 22, count 0 2006.229.16:47:08.17#ibcon#wrote, iclass 22, count 0 2006.229.16:47:08.17#ibcon#about to read 3, iclass 22, count 0 2006.229.16:47:08.19#ibcon#read 3, iclass 22, count 0 2006.229.16:47:08.19#ibcon#about to read 4, iclass 22, count 0 2006.229.16:47:08.19#ibcon#read 4, iclass 22, count 0 2006.229.16:47:08.19#ibcon#about to read 5, iclass 22, count 0 2006.229.16:47:08.19#ibcon#read 5, iclass 22, count 0 2006.229.16:47:08.19#ibcon#about to read 6, iclass 22, count 0 2006.229.16:47:08.19#ibcon#read 6, iclass 22, count 0 2006.229.16:47:08.19#ibcon#end of sib2, iclass 22, count 0 2006.229.16:47:08.19#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:47:08.19#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:47:08.19#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:47:08.19#ibcon#*before write, iclass 22, count 0 2006.229.16:47:08.19#ibcon#enter sib2, iclass 22, count 0 2006.229.16:47:08.19#ibcon#flushed, iclass 22, count 0 2006.229.16:47:08.19#ibcon#about to write, iclass 22, count 0 2006.229.16:47:08.19#ibcon#wrote, iclass 22, count 0 2006.229.16:47:08.19#ibcon#about to read 3, iclass 22, count 0 2006.229.16:47:08.23#ibcon#read 3, iclass 22, count 0 2006.229.16:47:08.23#ibcon#about to read 4, iclass 22, count 0 2006.229.16:47:08.23#ibcon#read 4, iclass 22, count 0 2006.229.16:47:08.23#ibcon#about to read 5, iclass 22, count 0 2006.229.16:47:08.23#ibcon#read 5, iclass 22, count 0 2006.229.16:47:08.23#ibcon#about to read 6, iclass 22, count 0 2006.229.16:47:08.23#ibcon#read 6, iclass 22, count 0 2006.229.16:47:08.23#ibcon#end of sib2, iclass 22, count 0 2006.229.16:47:08.23#ibcon#*after write, iclass 22, count 0 2006.229.16:47:08.23#ibcon#*before return 0, iclass 22, count 0 2006.229.16:47:08.23#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:08.23#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:47:08.23#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:47:08.23#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:47:08.23$vck44/vb=7,4 2006.229.16:47:08.23#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.16:47:08.23#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.16:47:08.23#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:08.23#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:08.29#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:08.29#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:08.29#ibcon#enter wrdev, iclass 24, count 2 2006.229.16:47:08.29#ibcon#first serial, iclass 24, count 2 2006.229.16:47:08.29#ibcon#enter sib2, iclass 24, count 2 2006.229.16:47:08.29#ibcon#flushed, iclass 24, count 2 2006.229.16:47:08.29#ibcon#about to write, iclass 24, count 2 2006.229.16:47:08.29#ibcon#wrote, iclass 24, count 2 2006.229.16:47:08.29#ibcon#about to read 3, iclass 24, count 2 2006.229.16:47:08.31#ibcon#read 3, iclass 24, count 2 2006.229.16:47:08.31#ibcon#about to read 4, iclass 24, count 2 2006.229.16:47:08.31#ibcon#read 4, iclass 24, count 2 2006.229.16:47:08.31#ibcon#about to read 5, iclass 24, count 2 2006.229.16:47:08.31#ibcon#read 5, iclass 24, count 2 2006.229.16:47:08.31#ibcon#about to read 6, iclass 24, count 2 2006.229.16:47:08.31#ibcon#read 6, iclass 24, count 2 2006.229.16:47:08.31#ibcon#end of sib2, iclass 24, count 2 2006.229.16:47:08.31#ibcon#*mode == 0, iclass 24, count 2 2006.229.16:47:08.31#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.16:47:08.31#ibcon#[27=AT07-04\r\n] 2006.229.16:47:08.31#ibcon#*before write, iclass 24, count 2 2006.229.16:47:08.31#ibcon#enter sib2, iclass 24, count 2 2006.229.16:47:08.31#ibcon#flushed, iclass 24, count 2 2006.229.16:47:08.31#ibcon#about to write, iclass 24, count 2 2006.229.16:47:08.31#ibcon#wrote, iclass 24, count 2 2006.229.16:47:08.31#ibcon#about to read 3, iclass 24, count 2 2006.229.16:47:08.34#ibcon#read 3, iclass 24, count 2 2006.229.16:47:08.34#ibcon#about to read 4, iclass 24, count 2 2006.229.16:47:08.34#ibcon#read 4, iclass 24, count 2 2006.229.16:47:08.34#ibcon#about to read 5, iclass 24, count 2 2006.229.16:47:08.34#ibcon#read 5, iclass 24, count 2 2006.229.16:47:08.34#ibcon#about to read 6, iclass 24, count 2 2006.229.16:47:08.34#ibcon#read 6, iclass 24, count 2 2006.229.16:47:08.34#ibcon#end of sib2, iclass 24, count 2 2006.229.16:47:08.34#ibcon#*after write, iclass 24, count 2 2006.229.16:47:08.34#ibcon#*before return 0, iclass 24, count 2 2006.229.16:47:08.34#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:08.34#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.16:47:08.34#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.16:47:08.34#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:08.34#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:08.46#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:08.46#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:08.46#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:47:08.46#ibcon#first serial, iclass 24, count 0 2006.229.16:47:08.46#ibcon#enter sib2, iclass 24, count 0 2006.229.16:47:08.46#ibcon#flushed, iclass 24, count 0 2006.229.16:47:08.46#ibcon#about to write, iclass 24, count 0 2006.229.16:47:08.46#ibcon#wrote, iclass 24, count 0 2006.229.16:47:08.46#ibcon#about to read 3, iclass 24, count 0 2006.229.16:47:08.48#ibcon#read 3, iclass 24, count 0 2006.229.16:47:08.48#ibcon#about to read 4, iclass 24, count 0 2006.229.16:47:08.48#ibcon#read 4, iclass 24, count 0 2006.229.16:47:08.48#ibcon#about to read 5, iclass 24, count 0 2006.229.16:47:08.48#ibcon#read 5, iclass 24, count 0 2006.229.16:47:08.48#ibcon#about to read 6, iclass 24, count 0 2006.229.16:47:08.48#ibcon#read 6, iclass 24, count 0 2006.229.16:47:08.48#ibcon#end of sib2, iclass 24, count 0 2006.229.16:47:08.48#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:47:08.48#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:47:08.48#ibcon#[27=USB\r\n] 2006.229.16:47:08.48#ibcon#*before write, iclass 24, count 0 2006.229.16:47:08.48#ibcon#enter sib2, iclass 24, count 0 2006.229.16:47:08.48#ibcon#flushed, iclass 24, count 0 2006.229.16:47:08.48#ibcon#about to write, iclass 24, count 0 2006.229.16:47:08.48#ibcon#wrote, iclass 24, count 0 2006.229.16:47:08.48#ibcon#about to read 3, iclass 24, count 0 2006.229.16:47:08.51#ibcon#read 3, iclass 24, count 0 2006.229.16:47:08.51#ibcon#about to read 4, iclass 24, count 0 2006.229.16:47:08.51#ibcon#read 4, iclass 24, count 0 2006.229.16:47:08.51#ibcon#about to read 5, iclass 24, count 0 2006.229.16:47:08.51#ibcon#read 5, iclass 24, count 0 2006.229.16:47:08.51#ibcon#about to read 6, iclass 24, count 0 2006.229.16:47:08.51#ibcon#read 6, iclass 24, count 0 2006.229.16:47:08.51#ibcon#end of sib2, iclass 24, count 0 2006.229.16:47:08.51#ibcon#*after write, iclass 24, count 0 2006.229.16:47:08.51#ibcon#*before return 0, iclass 24, count 0 2006.229.16:47:08.51#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:08.51#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.16:47:08.51#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:47:08.51#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:47:08.51$vck44/vblo=8,744.99 2006.229.16:47:08.51#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.16:47:08.51#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.16:47:08.51#ibcon#ireg 17 cls_cnt 0 2006.229.16:47:08.51#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:08.51#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:08.51#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:08.51#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:47:08.51#ibcon#first serial, iclass 26, count 0 2006.229.16:47:08.51#ibcon#enter sib2, iclass 26, count 0 2006.229.16:47:08.51#ibcon#flushed, iclass 26, count 0 2006.229.16:47:08.51#ibcon#about to write, iclass 26, count 0 2006.229.16:47:08.51#ibcon#wrote, iclass 26, count 0 2006.229.16:47:08.51#ibcon#about to read 3, iclass 26, count 0 2006.229.16:47:08.53#ibcon#read 3, iclass 26, count 0 2006.229.16:47:08.53#ibcon#about to read 4, iclass 26, count 0 2006.229.16:47:08.53#ibcon#read 4, iclass 26, count 0 2006.229.16:47:08.53#ibcon#about to read 5, iclass 26, count 0 2006.229.16:47:08.53#ibcon#read 5, iclass 26, count 0 2006.229.16:47:08.53#ibcon#about to read 6, iclass 26, count 0 2006.229.16:47:08.53#ibcon#read 6, iclass 26, count 0 2006.229.16:47:08.53#ibcon#end of sib2, iclass 26, count 0 2006.229.16:47:08.53#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:47:08.53#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:47:08.53#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:47:08.53#ibcon#*before write, iclass 26, count 0 2006.229.16:47:08.53#ibcon#enter sib2, iclass 26, count 0 2006.229.16:47:08.53#ibcon#flushed, iclass 26, count 0 2006.229.16:47:08.53#ibcon#about to write, iclass 26, count 0 2006.229.16:47:08.53#ibcon#wrote, iclass 26, count 0 2006.229.16:47:08.53#ibcon#about to read 3, iclass 26, count 0 2006.229.16:47:08.57#ibcon#read 3, iclass 26, count 0 2006.229.16:47:08.57#ibcon#about to read 4, iclass 26, count 0 2006.229.16:47:08.57#ibcon#read 4, iclass 26, count 0 2006.229.16:47:08.57#ibcon#about to read 5, iclass 26, count 0 2006.229.16:47:08.57#ibcon#read 5, iclass 26, count 0 2006.229.16:47:08.57#ibcon#about to read 6, iclass 26, count 0 2006.229.16:47:08.57#ibcon#read 6, iclass 26, count 0 2006.229.16:47:08.57#ibcon#end of sib2, iclass 26, count 0 2006.229.16:47:08.57#ibcon#*after write, iclass 26, count 0 2006.229.16:47:08.57#ibcon#*before return 0, iclass 26, count 0 2006.229.16:47:08.57#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:08.57#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.16:47:08.57#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:47:08.57#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:47:08.57$vck44/vb=8,4 2006.229.16:47:08.57#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.16:47:08.57#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.16:47:08.57#ibcon#ireg 11 cls_cnt 2 2006.229.16:47:08.57#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:08.63#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:08.63#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:08.63#ibcon#enter wrdev, iclass 28, count 2 2006.229.16:47:08.63#ibcon#first serial, iclass 28, count 2 2006.229.16:47:08.63#ibcon#enter sib2, iclass 28, count 2 2006.229.16:47:08.63#ibcon#flushed, iclass 28, count 2 2006.229.16:47:08.63#ibcon#about to write, iclass 28, count 2 2006.229.16:47:08.63#ibcon#wrote, iclass 28, count 2 2006.229.16:47:08.63#ibcon#about to read 3, iclass 28, count 2 2006.229.16:47:08.65#ibcon#read 3, iclass 28, count 2 2006.229.16:47:08.65#ibcon#about to read 4, iclass 28, count 2 2006.229.16:47:08.65#ibcon#read 4, iclass 28, count 2 2006.229.16:47:08.65#ibcon#about to read 5, iclass 28, count 2 2006.229.16:47:08.65#ibcon#read 5, iclass 28, count 2 2006.229.16:47:08.65#ibcon#about to read 6, iclass 28, count 2 2006.229.16:47:08.65#ibcon#read 6, iclass 28, count 2 2006.229.16:47:08.65#ibcon#end of sib2, iclass 28, count 2 2006.229.16:47:08.65#ibcon#*mode == 0, iclass 28, count 2 2006.229.16:47:08.65#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.16:47:08.65#ibcon#[27=AT08-04\r\n] 2006.229.16:47:08.65#ibcon#*before write, iclass 28, count 2 2006.229.16:47:08.65#ibcon#enter sib2, iclass 28, count 2 2006.229.16:47:08.65#ibcon#flushed, iclass 28, count 2 2006.229.16:47:08.65#ibcon#about to write, iclass 28, count 2 2006.229.16:47:08.65#ibcon#wrote, iclass 28, count 2 2006.229.16:47:08.65#ibcon#about to read 3, iclass 28, count 2 2006.229.16:47:08.68#ibcon#read 3, iclass 28, count 2 2006.229.16:47:08.68#ibcon#about to read 4, iclass 28, count 2 2006.229.16:47:08.68#ibcon#read 4, iclass 28, count 2 2006.229.16:47:08.68#ibcon#about to read 5, iclass 28, count 2 2006.229.16:47:08.68#ibcon#read 5, iclass 28, count 2 2006.229.16:47:08.68#ibcon#about to read 6, iclass 28, count 2 2006.229.16:47:08.68#ibcon#read 6, iclass 28, count 2 2006.229.16:47:08.68#ibcon#end of sib2, iclass 28, count 2 2006.229.16:47:08.68#ibcon#*after write, iclass 28, count 2 2006.229.16:47:08.68#ibcon#*before return 0, iclass 28, count 2 2006.229.16:47:08.68#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:08.68#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.16:47:08.68#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.16:47:08.68#ibcon#ireg 7 cls_cnt 0 2006.229.16:47:08.68#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:08.80#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:08.80#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:08.80#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:47:08.80#ibcon#first serial, iclass 28, count 0 2006.229.16:47:08.80#ibcon#enter sib2, iclass 28, count 0 2006.229.16:47:08.80#ibcon#flushed, iclass 28, count 0 2006.229.16:47:08.80#ibcon#about to write, iclass 28, count 0 2006.229.16:47:08.80#ibcon#wrote, iclass 28, count 0 2006.229.16:47:08.80#ibcon#about to read 3, iclass 28, count 0 2006.229.16:47:08.82#ibcon#read 3, iclass 28, count 0 2006.229.16:47:08.82#ibcon#about to read 4, iclass 28, count 0 2006.229.16:47:08.82#ibcon#read 4, iclass 28, count 0 2006.229.16:47:08.82#ibcon#about to read 5, iclass 28, count 0 2006.229.16:47:08.82#ibcon#read 5, iclass 28, count 0 2006.229.16:47:08.82#ibcon#about to read 6, iclass 28, count 0 2006.229.16:47:08.82#ibcon#read 6, iclass 28, count 0 2006.229.16:47:08.82#ibcon#end of sib2, iclass 28, count 0 2006.229.16:47:08.82#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:47:08.82#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:47:08.82#ibcon#[27=USB\r\n] 2006.229.16:47:08.82#ibcon#*before write, iclass 28, count 0 2006.229.16:47:08.82#ibcon#enter sib2, iclass 28, count 0 2006.229.16:47:08.82#ibcon#flushed, iclass 28, count 0 2006.229.16:47:08.82#ibcon#about to write, iclass 28, count 0 2006.229.16:47:08.82#ibcon#wrote, iclass 28, count 0 2006.229.16:47:08.82#ibcon#about to read 3, iclass 28, count 0 2006.229.16:47:08.85#ibcon#read 3, iclass 28, count 0 2006.229.16:47:08.85#ibcon#about to read 4, iclass 28, count 0 2006.229.16:47:08.85#ibcon#read 4, iclass 28, count 0 2006.229.16:47:08.85#ibcon#about to read 5, iclass 28, count 0 2006.229.16:47:08.85#ibcon#read 5, iclass 28, count 0 2006.229.16:47:08.85#ibcon#about to read 6, iclass 28, count 0 2006.229.16:47:08.85#ibcon#read 6, iclass 28, count 0 2006.229.16:47:08.85#ibcon#end of sib2, iclass 28, count 0 2006.229.16:47:08.85#ibcon#*after write, iclass 28, count 0 2006.229.16:47:08.85#ibcon#*before return 0, iclass 28, count 0 2006.229.16:47:08.85#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:08.85#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.16:47:08.85#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:47:08.85#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:47:08.85$vck44/vabw=wide 2006.229.16:47:08.85#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.16:47:08.85#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.16:47:08.85#ibcon#ireg 8 cls_cnt 0 2006.229.16:47:08.85#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:08.85#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:08.85#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:08.85#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:47:08.85#ibcon#first serial, iclass 30, count 0 2006.229.16:47:08.85#ibcon#enter sib2, iclass 30, count 0 2006.229.16:47:08.85#ibcon#flushed, iclass 30, count 0 2006.229.16:47:08.85#ibcon#about to write, iclass 30, count 0 2006.229.16:47:08.85#ibcon#wrote, iclass 30, count 0 2006.229.16:47:08.85#ibcon#about to read 3, iclass 30, count 0 2006.229.16:47:08.87#ibcon#read 3, iclass 30, count 0 2006.229.16:47:08.87#ibcon#about to read 4, iclass 30, count 0 2006.229.16:47:08.87#ibcon#read 4, iclass 30, count 0 2006.229.16:47:08.87#ibcon#about to read 5, iclass 30, count 0 2006.229.16:47:08.87#ibcon#read 5, iclass 30, count 0 2006.229.16:47:08.87#ibcon#about to read 6, iclass 30, count 0 2006.229.16:47:08.87#ibcon#read 6, iclass 30, count 0 2006.229.16:47:08.87#ibcon#end of sib2, iclass 30, count 0 2006.229.16:47:08.87#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:47:08.87#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:47:08.87#ibcon#[25=BW32\r\n] 2006.229.16:47:08.87#ibcon#*before write, iclass 30, count 0 2006.229.16:47:08.87#ibcon#enter sib2, iclass 30, count 0 2006.229.16:47:08.87#ibcon#flushed, iclass 30, count 0 2006.229.16:47:08.87#ibcon#about to write, iclass 30, count 0 2006.229.16:47:08.87#ibcon#wrote, iclass 30, count 0 2006.229.16:47:08.87#ibcon#about to read 3, iclass 30, count 0 2006.229.16:47:08.90#ibcon#read 3, iclass 30, count 0 2006.229.16:47:08.90#ibcon#about to read 4, iclass 30, count 0 2006.229.16:47:08.90#ibcon#read 4, iclass 30, count 0 2006.229.16:47:08.90#ibcon#about to read 5, iclass 30, count 0 2006.229.16:47:08.90#ibcon#read 5, iclass 30, count 0 2006.229.16:47:08.90#ibcon#about to read 6, iclass 30, count 0 2006.229.16:47:08.90#ibcon#read 6, iclass 30, count 0 2006.229.16:47:08.90#ibcon#end of sib2, iclass 30, count 0 2006.229.16:47:08.90#ibcon#*after write, iclass 30, count 0 2006.229.16:47:08.90#ibcon#*before return 0, iclass 30, count 0 2006.229.16:47:08.90#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:08.90#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.16:47:08.90#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:47:08.90#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:47:08.90$vck44/vbbw=wide 2006.229.16:47:08.90#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:47:08.90#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:47:08.90#ibcon#ireg 8 cls_cnt 0 2006.229.16:47:08.90#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:47:08.97#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:47:08.97#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:47:08.97#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:47:08.97#ibcon#first serial, iclass 32, count 0 2006.229.16:47:08.97#ibcon#enter sib2, iclass 32, count 0 2006.229.16:47:08.97#ibcon#flushed, iclass 32, count 0 2006.229.16:47:08.97#ibcon#about to write, iclass 32, count 0 2006.229.16:47:08.97#ibcon#wrote, iclass 32, count 0 2006.229.16:47:08.97#ibcon#about to read 3, iclass 32, count 0 2006.229.16:47:08.99#ibcon#read 3, iclass 32, count 0 2006.229.16:47:08.99#ibcon#about to read 4, iclass 32, count 0 2006.229.16:47:08.99#ibcon#read 4, iclass 32, count 0 2006.229.16:47:08.99#ibcon#about to read 5, iclass 32, count 0 2006.229.16:47:08.99#ibcon#read 5, iclass 32, count 0 2006.229.16:47:08.99#ibcon#about to read 6, iclass 32, count 0 2006.229.16:47:08.99#ibcon#read 6, iclass 32, count 0 2006.229.16:47:08.99#ibcon#end of sib2, iclass 32, count 0 2006.229.16:47:08.99#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:47:08.99#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:47:08.99#ibcon#[27=BW32\r\n] 2006.229.16:47:08.99#ibcon#*before write, iclass 32, count 0 2006.229.16:47:08.99#ibcon#enter sib2, iclass 32, count 0 2006.229.16:47:08.99#ibcon#flushed, iclass 32, count 0 2006.229.16:47:08.99#ibcon#about to write, iclass 32, count 0 2006.229.16:47:08.99#ibcon#wrote, iclass 32, count 0 2006.229.16:47:08.99#ibcon#about to read 3, iclass 32, count 0 2006.229.16:47:09.02#ibcon#read 3, iclass 32, count 0 2006.229.16:47:09.02#ibcon#about to read 4, iclass 32, count 0 2006.229.16:47:09.02#ibcon#read 4, iclass 32, count 0 2006.229.16:47:09.02#ibcon#about to read 5, iclass 32, count 0 2006.229.16:47:09.02#ibcon#read 5, iclass 32, count 0 2006.229.16:47:09.02#ibcon#about to read 6, iclass 32, count 0 2006.229.16:47:09.02#ibcon#read 6, iclass 32, count 0 2006.229.16:47:09.02#ibcon#end of sib2, iclass 32, count 0 2006.229.16:47:09.02#ibcon#*after write, iclass 32, count 0 2006.229.16:47:09.02#ibcon#*before return 0, iclass 32, count 0 2006.229.16:47:09.02#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:47:09.02#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:47:09.02#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:47:09.02#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:47:09.02$setupk4/ifdk4 2006.229.16:47:09.02$ifdk4/lo= 2006.229.16:47:09.02$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:47:09.02$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:47:09.02$ifdk4/patch= 2006.229.16:47:09.02$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:47:09.02$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:47:09.02$setupk4/!*+20s 2006.229.16:47:11.09#abcon#<5=/05 1.1 1.8 27.091001001.7\r\n> 2006.229.16:47:11.11#abcon#{5=INTERFACE CLEAR} 2006.229.16:47:11.17#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:47:21.14#trakl#Source acquired 2006.229.16:47:21.14#flagr#flagr/antenna,acquired 2006.229.16:47:21.26#abcon#<5=/05 1.1 1.8 27.091001001.7\r\n> 2006.229.16:47:21.28#abcon#{5=INTERFACE CLEAR} 2006.229.16:47:21.34#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:47:23.51$setupk4/"tpicd 2006.229.16:47:23.51$setupk4/echo=off 2006.229.16:47:23.51$setupk4/xlog=off 2006.229.16:47:23.51:!2006.229.16:47:58 2006.229.16:47:58.00:preob 2006.229.16:47:58.14/onsource/TRACKING 2006.229.16:47:58.14:!2006.229.16:48:08 2006.229.16:48:08.00:"tape 2006.229.16:48:08.00:"st=record 2006.229.16:48:08.00:data_valid=on 2006.229.16:48:08.00:midob 2006.229.16:48:09.14/onsource/TRACKING 2006.229.16:48:09.14/wx/27.09,1001.7,100 2006.229.16:48:09.22/cable/+6.4146E-03 2006.229.16:48:10.31/va/01,08,usb,yes,34,37 2006.229.16:48:10.31/va/02,07,usb,yes,37,37 2006.229.16:48:10.31/va/03,06,usb,yes,45,48 2006.229.16:48:10.31/va/04,07,usb,yes,38,40 2006.229.16:48:10.31/va/05,04,usb,yes,34,34 2006.229.16:48:10.31/va/06,04,usb,yes,38,38 2006.229.16:48:10.31/va/07,05,usb,yes,34,34 2006.229.16:48:10.31/va/08,06,usb,yes,25,30 2006.229.16:48:10.54/valo/01,524.99,yes,locked 2006.229.16:48:10.54/valo/02,534.99,yes,locked 2006.229.16:48:10.54/valo/03,564.99,yes,locked 2006.229.16:48:10.54/valo/04,624.99,yes,locked 2006.229.16:48:10.54/valo/05,734.99,yes,locked 2006.229.16:48:10.54/valo/06,814.99,yes,locked 2006.229.16:48:10.54/valo/07,864.99,yes,locked 2006.229.16:48:10.54/valo/08,884.99,yes,locked 2006.229.16:48:11.63/vb/01,04,usb,yes,33,32 2006.229.16:48:11.63/vb/02,04,usb,yes,35,37 2006.229.16:48:11.63/vb/03,04,usb,yes,32,36 2006.229.16:48:11.63/vb/04,04,usb,yes,37,36 2006.229.16:48:11.63/vb/05,04,usb,yes,29,32 2006.229.16:48:11.63/vb/06,04,usb,yes,34,30 2006.229.16:48:11.63/vb/07,04,usb,yes,34,34 2006.229.16:48:11.63/vb/08,04,usb,yes,31,35 2006.229.16:48:11.86/vblo/01,629.99,yes,locked 2006.229.16:48:11.86/vblo/02,634.99,yes,locked 2006.229.16:48:11.86/vblo/03,649.99,yes,locked 2006.229.16:48:11.86/vblo/04,679.99,yes,locked 2006.229.16:48:11.86/vblo/05,709.99,yes,locked 2006.229.16:48:11.86/vblo/06,719.99,yes,locked 2006.229.16:48:11.86/vblo/07,734.99,yes,locked 2006.229.16:48:11.86/vblo/08,744.99,yes,locked 2006.229.16:48:12.01/vabw/8 2006.229.16:48:12.16/vbbw/8 2006.229.16:48:12.33/xfe/off,on,12.2 2006.229.16:48:12.72/ifatt/23,28,28,28 2006.229.16:48:13.08/fmout-gps/S +4.50E-07 2006.229.16:48:13.12:!2006.229.16:50:28 2006.229.16:50:28.01:data_valid=off 2006.229.16:50:28.01:"et 2006.229.16:50:28.02:!+3s 2006.229.16:50:31.03:"tape 2006.229.16:50:31.03:postob 2006.229.16:50:31.14/cable/+6.4141E-03 2006.229.16:50:31.14/wx/27.06,1001.7,100 2006.229.16:50:31.20/fmout-gps/S +4.49E-07 2006.229.16:50:31.20:scan_name=229-1652,jd0608,40 2006.229.16:50:31.21:source=1958-179,200057.09,-174857.7,2000.0,cw 2006.229.16:50:32.13#flagr#flagr/antenna,new-source 2006.229.16:50:32.13:checkk5 2006.229.16:50:32.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:50:32.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:50:33.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:50:33.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:50:34.11/chk_obsdata//k5ts1/T2291648??a.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:50:34.50/chk_obsdata//k5ts2/T2291648??b.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:50:34.91/chk_obsdata//k5ts3/T2291648??c.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:50:35.32/chk_obsdata//k5ts4/T2291648??d.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.16:50:36.03/k5log//k5ts1_log_newline 2006.229.16:50:36.73/k5log//k5ts2_log_newline 2006.229.16:50:37.45/k5log//k5ts3_log_newline 2006.229.16:50:38.17/k5log//k5ts4_log_newline 2006.229.16:50:38.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:50:38.19:setupk4=1 2006.229.16:50:38.19$setupk4/echo=on 2006.229.16:50:38.19$setupk4/pcalon 2006.229.16:50:38.19$pcalon/"no phase cal control is implemented here 2006.229.16:50:38.19$setupk4/"tpicd=stop 2006.229.16:50:38.19$setupk4/"rec=synch_on 2006.229.16:50:38.19$setupk4/"rec_mode=128 2006.229.16:50:38.19$setupk4/!* 2006.229.16:50:38.19$setupk4/recpk4 2006.229.16:50:38.19$recpk4/recpatch= 2006.229.16:50:38.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:50:38.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:50:38.20$setupk4/vck44 2006.229.16:50:38.20$vck44/valo=1,524.99 2006.229.16:50:38.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.16:50:38.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.16:50:38.20#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:38.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:38.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:38.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:38.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:50:38.20#ibcon#first serial, iclass 13, count 0 2006.229.16:50:38.20#ibcon#enter sib2, iclass 13, count 0 2006.229.16:50:38.20#ibcon#flushed, iclass 13, count 0 2006.229.16:50:38.20#ibcon#about to write, iclass 13, count 0 2006.229.16:50:38.20#ibcon#wrote, iclass 13, count 0 2006.229.16:50:38.20#ibcon#about to read 3, iclass 13, count 0 2006.229.16:50:38.22#ibcon#read 3, iclass 13, count 0 2006.229.16:50:38.22#ibcon#about to read 4, iclass 13, count 0 2006.229.16:50:38.22#ibcon#read 4, iclass 13, count 0 2006.229.16:50:38.22#ibcon#about to read 5, iclass 13, count 0 2006.229.16:50:38.22#ibcon#read 5, iclass 13, count 0 2006.229.16:50:38.22#ibcon#about to read 6, iclass 13, count 0 2006.229.16:50:38.22#ibcon#read 6, iclass 13, count 0 2006.229.16:50:38.22#ibcon#end of sib2, iclass 13, count 0 2006.229.16:50:38.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:50:38.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:50:38.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:50:38.22#ibcon#*before write, iclass 13, count 0 2006.229.16:50:38.22#ibcon#enter sib2, iclass 13, count 0 2006.229.16:50:38.22#ibcon#flushed, iclass 13, count 0 2006.229.16:50:38.22#ibcon#about to write, iclass 13, count 0 2006.229.16:50:38.22#ibcon#wrote, iclass 13, count 0 2006.229.16:50:38.22#ibcon#about to read 3, iclass 13, count 0 2006.229.16:50:38.27#ibcon#read 3, iclass 13, count 0 2006.229.16:50:38.27#ibcon#about to read 4, iclass 13, count 0 2006.229.16:50:38.27#ibcon#read 4, iclass 13, count 0 2006.229.16:50:38.27#ibcon#about to read 5, iclass 13, count 0 2006.229.16:50:38.27#ibcon#read 5, iclass 13, count 0 2006.229.16:50:38.27#ibcon#about to read 6, iclass 13, count 0 2006.229.16:50:38.27#ibcon#read 6, iclass 13, count 0 2006.229.16:50:38.27#ibcon#end of sib2, iclass 13, count 0 2006.229.16:50:38.27#ibcon#*after write, iclass 13, count 0 2006.229.16:50:38.27#ibcon#*before return 0, iclass 13, count 0 2006.229.16:50:38.27#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:38.27#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:38.27#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:50:38.27#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:50:38.27$vck44/va=1,8 2006.229.16:50:38.27#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.16:50:38.27#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.16:50:38.27#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:38.27#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:38.27#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:38.27#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:38.27#ibcon#enter wrdev, iclass 15, count 2 2006.229.16:50:38.27#ibcon#first serial, iclass 15, count 2 2006.229.16:50:38.27#ibcon#enter sib2, iclass 15, count 2 2006.229.16:50:38.27#ibcon#flushed, iclass 15, count 2 2006.229.16:50:38.27#ibcon#about to write, iclass 15, count 2 2006.229.16:50:38.27#ibcon#wrote, iclass 15, count 2 2006.229.16:50:38.27#ibcon#about to read 3, iclass 15, count 2 2006.229.16:50:38.29#ibcon#read 3, iclass 15, count 2 2006.229.16:50:38.29#ibcon#about to read 4, iclass 15, count 2 2006.229.16:50:38.29#ibcon#read 4, iclass 15, count 2 2006.229.16:50:38.29#ibcon#about to read 5, iclass 15, count 2 2006.229.16:50:38.29#ibcon#read 5, iclass 15, count 2 2006.229.16:50:38.29#ibcon#about to read 6, iclass 15, count 2 2006.229.16:50:38.29#ibcon#read 6, iclass 15, count 2 2006.229.16:50:38.29#ibcon#end of sib2, iclass 15, count 2 2006.229.16:50:38.29#ibcon#*mode == 0, iclass 15, count 2 2006.229.16:50:38.29#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.16:50:38.29#ibcon#[25=AT01-08\r\n] 2006.229.16:50:38.29#ibcon#*before write, iclass 15, count 2 2006.229.16:50:38.29#ibcon#enter sib2, iclass 15, count 2 2006.229.16:50:38.29#ibcon#flushed, iclass 15, count 2 2006.229.16:50:38.29#ibcon#about to write, iclass 15, count 2 2006.229.16:50:38.29#ibcon#wrote, iclass 15, count 2 2006.229.16:50:38.29#ibcon#about to read 3, iclass 15, count 2 2006.229.16:50:38.32#ibcon#read 3, iclass 15, count 2 2006.229.16:50:38.32#ibcon#about to read 4, iclass 15, count 2 2006.229.16:50:38.32#ibcon#read 4, iclass 15, count 2 2006.229.16:50:38.32#ibcon#about to read 5, iclass 15, count 2 2006.229.16:50:38.32#ibcon#read 5, iclass 15, count 2 2006.229.16:50:38.32#ibcon#about to read 6, iclass 15, count 2 2006.229.16:50:38.32#ibcon#read 6, iclass 15, count 2 2006.229.16:50:38.32#ibcon#end of sib2, iclass 15, count 2 2006.229.16:50:38.32#ibcon#*after write, iclass 15, count 2 2006.229.16:50:38.32#ibcon#*before return 0, iclass 15, count 2 2006.229.16:50:38.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:38.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:38.32#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.16:50:38.32#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:38.32#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:38.44#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:38.44#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:38.44#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:50:38.44#ibcon#first serial, iclass 15, count 0 2006.229.16:50:38.44#ibcon#enter sib2, iclass 15, count 0 2006.229.16:50:38.44#ibcon#flushed, iclass 15, count 0 2006.229.16:50:38.44#ibcon#about to write, iclass 15, count 0 2006.229.16:50:38.44#ibcon#wrote, iclass 15, count 0 2006.229.16:50:38.44#ibcon#about to read 3, iclass 15, count 0 2006.229.16:50:38.46#ibcon#read 3, iclass 15, count 0 2006.229.16:50:38.46#ibcon#about to read 4, iclass 15, count 0 2006.229.16:50:38.46#ibcon#read 4, iclass 15, count 0 2006.229.16:50:38.46#ibcon#about to read 5, iclass 15, count 0 2006.229.16:50:38.46#ibcon#read 5, iclass 15, count 0 2006.229.16:50:38.46#ibcon#about to read 6, iclass 15, count 0 2006.229.16:50:38.46#ibcon#read 6, iclass 15, count 0 2006.229.16:50:38.46#ibcon#end of sib2, iclass 15, count 0 2006.229.16:50:38.46#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:50:38.46#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:50:38.46#ibcon#[25=USB\r\n] 2006.229.16:50:38.46#ibcon#*before write, iclass 15, count 0 2006.229.16:50:38.46#ibcon#enter sib2, iclass 15, count 0 2006.229.16:50:38.46#ibcon#flushed, iclass 15, count 0 2006.229.16:50:38.46#ibcon#about to write, iclass 15, count 0 2006.229.16:50:38.46#ibcon#wrote, iclass 15, count 0 2006.229.16:50:38.46#ibcon#about to read 3, iclass 15, count 0 2006.229.16:50:38.49#ibcon#read 3, iclass 15, count 0 2006.229.16:50:38.49#ibcon#about to read 4, iclass 15, count 0 2006.229.16:50:38.49#ibcon#read 4, iclass 15, count 0 2006.229.16:50:38.49#ibcon#about to read 5, iclass 15, count 0 2006.229.16:50:38.49#ibcon#read 5, iclass 15, count 0 2006.229.16:50:38.49#ibcon#about to read 6, iclass 15, count 0 2006.229.16:50:38.49#ibcon#read 6, iclass 15, count 0 2006.229.16:50:38.49#ibcon#end of sib2, iclass 15, count 0 2006.229.16:50:38.49#ibcon#*after write, iclass 15, count 0 2006.229.16:50:38.49#ibcon#*before return 0, iclass 15, count 0 2006.229.16:50:38.49#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:38.49#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:38.49#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:50:38.49#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:50:38.49$vck44/valo=2,534.99 2006.229.16:50:38.49#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.16:50:38.49#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.16:50:38.49#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:38.49#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:38.49#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:38.49#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:38.49#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:50:38.49#ibcon#first serial, iclass 17, count 0 2006.229.16:50:38.49#ibcon#enter sib2, iclass 17, count 0 2006.229.16:50:38.49#ibcon#flushed, iclass 17, count 0 2006.229.16:50:38.49#ibcon#about to write, iclass 17, count 0 2006.229.16:50:38.49#ibcon#wrote, iclass 17, count 0 2006.229.16:50:38.49#ibcon#about to read 3, iclass 17, count 0 2006.229.16:50:38.51#ibcon#read 3, iclass 17, count 0 2006.229.16:50:38.51#ibcon#about to read 4, iclass 17, count 0 2006.229.16:50:38.51#ibcon#read 4, iclass 17, count 0 2006.229.16:50:38.51#ibcon#about to read 5, iclass 17, count 0 2006.229.16:50:38.51#ibcon#read 5, iclass 17, count 0 2006.229.16:50:38.51#ibcon#about to read 6, iclass 17, count 0 2006.229.16:50:38.51#ibcon#read 6, iclass 17, count 0 2006.229.16:50:38.51#ibcon#end of sib2, iclass 17, count 0 2006.229.16:50:38.51#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:50:38.51#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:50:38.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:50:38.51#ibcon#*before write, iclass 17, count 0 2006.229.16:50:38.51#ibcon#enter sib2, iclass 17, count 0 2006.229.16:50:38.51#ibcon#flushed, iclass 17, count 0 2006.229.16:50:38.51#ibcon#about to write, iclass 17, count 0 2006.229.16:50:38.51#ibcon#wrote, iclass 17, count 0 2006.229.16:50:38.51#ibcon#about to read 3, iclass 17, count 0 2006.229.16:50:38.55#ibcon#read 3, iclass 17, count 0 2006.229.16:50:38.55#ibcon#about to read 4, iclass 17, count 0 2006.229.16:50:38.55#ibcon#read 4, iclass 17, count 0 2006.229.16:50:38.55#ibcon#about to read 5, iclass 17, count 0 2006.229.16:50:38.55#ibcon#read 5, iclass 17, count 0 2006.229.16:50:38.55#ibcon#about to read 6, iclass 17, count 0 2006.229.16:50:38.55#ibcon#read 6, iclass 17, count 0 2006.229.16:50:38.55#ibcon#end of sib2, iclass 17, count 0 2006.229.16:50:38.55#ibcon#*after write, iclass 17, count 0 2006.229.16:50:38.55#ibcon#*before return 0, iclass 17, count 0 2006.229.16:50:38.55#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:38.55#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:38.55#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:50:38.55#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:50:38.55$vck44/va=2,7 2006.229.16:50:38.55#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.16:50:38.55#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.16:50:38.55#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:38.55#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:38.61#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:38.61#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:38.61#ibcon#enter wrdev, iclass 19, count 2 2006.229.16:50:38.61#ibcon#first serial, iclass 19, count 2 2006.229.16:50:38.61#ibcon#enter sib2, iclass 19, count 2 2006.229.16:50:38.61#ibcon#flushed, iclass 19, count 2 2006.229.16:50:38.61#ibcon#about to write, iclass 19, count 2 2006.229.16:50:38.61#ibcon#wrote, iclass 19, count 2 2006.229.16:50:38.61#ibcon#about to read 3, iclass 19, count 2 2006.229.16:50:38.63#ibcon#read 3, iclass 19, count 2 2006.229.16:50:38.63#ibcon#about to read 4, iclass 19, count 2 2006.229.16:50:38.63#ibcon#read 4, iclass 19, count 2 2006.229.16:50:38.63#ibcon#about to read 5, iclass 19, count 2 2006.229.16:50:38.63#ibcon#read 5, iclass 19, count 2 2006.229.16:50:38.63#ibcon#about to read 6, iclass 19, count 2 2006.229.16:50:38.63#ibcon#read 6, iclass 19, count 2 2006.229.16:50:38.63#ibcon#end of sib2, iclass 19, count 2 2006.229.16:50:38.63#ibcon#*mode == 0, iclass 19, count 2 2006.229.16:50:38.63#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.16:50:38.63#ibcon#[25=AT02-07\r\n] 2006.229.16:50:38.63#ibcon#*before write, iclass 19, count 2 2006.229.16:50:38.63#ibcon#enter sib2, iclass 19, count 2 2006.229.16:50:38.63#ibcon#flushed, iclass 19, count 2 2006.229.16:50:38.63#ibcon#about to write, iclass 19, count 2 2006.229.16:50:38.63#ibcon#wrote, iclass 19, count 2 2006.229.16:50:38.63#ibcon#about to read 3, iclass 19, count 2 2006.229.16:50:38.66#ibcon#read 3, iclass 19, count 2 2006.229.16:50:38.66#ibcon#about to read 4, iclass 19, count 2 2006.229.16:50:38.66#ibcon#read 4, iclass 19, count 2 2006.229.16:50:38.66#ibcon#about to read 5, iclass 19, count 2 2006.229.16:50:38.66#ibcon#read 5, iclass 19, count 2 2006.229.16:50:38.66#ibcon#about to read 6, iclass 19, count 2 2006.229.16:50:38.66#ibcon#read 6, iclass 19, count 2 2006.229.16:50:38.66#ibcon#end of sib2, iclass 19, count 2 2006.229.16:50:38.66#ibcon#*after write, iclass 19, count 2 2006.229.16:50:38.66#ibcon#*before return 0, iclass 19, count 2 2006.229.16:50:38.66#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:38.66#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:38.66#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.16:50:38.66#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:38.66#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:38.78#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:38.78#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:38.78#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:50:38.78#ibcon#first serial, iclass 19, count 0 2006.229.16:50:38.78#ibcon#enter sib2, iclass 19, count 0 2006.229.16:50:38.78#ibcon#flushed, iclass 19, count 0 2006.229.16:50:38.78#ibcon#about to write, iclass 19, count 0 2006.229.16:50:38.78#ibcon#wrote, iclass 19, count 0 2006.229.16:50:38.78#ibcon#about to read 3, iclass 19, count 0 2006.229.16:50:38.80#ibcon#read 3, iclass 19, count 0 2006.229.16:50:38.80#ibcon#about to read 4, iclass 19, count 0 2006.229.16:50:38.80#ibcon#read 4, iclass 19, count 0 2006.229.16:50:38.80#ibcon#about to read 5, iclass 19, count 0 2006.229.16:50:38.80#ibcon#read 5, iclass 19, count 0 2006.229.16:50:38.80#ibcon#about to read 6, iclass 19, count 0 2006.229.16:50:38.80#ibcon#read 6, iclass 19, count 0 2006.229.16:50:38.80#ibcon#end of sib2, iclass 19, count 0 2006.229.16:50:38.80#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:50:38.80#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:50:38.80#ibcon#[25=USB\r\n] 2006.229.16:50:38.80#ibcon#*before write, iclass 19, count 0 2006.229.16:50:38.80#ibcon#enter sib2, iclass 19, count 0 2006.229.16:50:38.80#ibcon#flushed, iclass 19, count 0 2006.229.16:50:38.80#ibcon#about to write, iclass 19, count 0 2006.229.16:50:38.80#ibcon#wrote, iclass 19, count 0 2006.229.16:50:38.80#ibcon#about to read 3, iclass 19, count 0 2006.229.16:50:38.83#ibcon#read 3, iclass 19, count 0 2006.229.16:50:38.83#ibcon#about to read 4, iclass 19, count 0 2006.229.16:50:38.83#ibcon#read 4, iclass 19, count 0 2006.229.16:50:38.83#ibcon#about to read 5, iclass 19, count 0 2006.229.16:50:38.83#ibcon#read 5, iclass 19, count 0 2006.229.16:50:38.83#ibcon#about to read 6, iclass 19, count 0 2006.229.16:50:38.83#ibcon#read 6, iclass 19, count 0 2006.229.16:50:38.83#ibcon#end of sib2, iclass 19, count 0 2006.229.16:50:38.83#ibcon#*after write, iclass 19, count 0 2006.229.16:50:38.83#ibcon#*before return 0, iclass 19, count 0 2006.229.16:50:38.83#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:38.83#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:38.83#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:50:38.83#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:50:38.83$vck44/valo=3,564.99 2006.229.16:50:38.83#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:50:38.83#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:50:38.83#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:38.83#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:38.83#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:38.83#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:38.83#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:50:38.83#ibcon#first serial, iclass 21, count 0 2006.229.16:50:38.83#ibcon#enter sib2, iclass 21, count 0 2006.229.16:50:38.83#ibcon#flushed, iclass 21, count 0 2006.229.16:50:38.83#ibcon#about to write, iclass 21, count 0 2006.229.16:50:38.83#ibcon#wrote, iclass 21, count 0 2006.229.16:50:38.83#ibcon#about to read 3, iclass 21, count 0 2006.229.16:50:38.85#ibcon#read 3, iclass 21, count 0 2006.229.16:50:38.85#ibcon#about to read 4, iclass 21, count 0 2006.229.16:50:38.85#ibcon#read 4, iclass 21, count 0 2006.229.16:50:38.85#ibcon#about to read 5, iclass 21, count 0 2006.229.16:50:38.85#ibcon#read 5, iclass 21, count 0 2006.229.16:50:38.85#ibcon#about to read 6, iclass 21, count 0 2006.229.16:50:38.85#ibcon#read 6, iclass 21, count 0 2006.229.16:50:38.85#ibcon#end of sib2, iclass 21, count 0 2006.229.16:50:38.85#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:50:38.85#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:50:38.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:50:38.85#ibcon#*before write, iclass 21, count 0 2006.229.16:50:38.85#ibcon#enter sib2, iclass 21, count 0 2006.229.16:50:38.85#ibcon#flushed, iclass 21, count 0 2006.229.16:50:38.85#ibcon#about to write, iclass 21, count 0 2006.229.16:50:38.85#ibcon#wrote, iclass 21, count 0 2006.229.16:50:38.85#ibcon#about to read 3, iclass 21, count 0 2006.229.16:50:38.89#ibcon#read 3, iclass 21, count 0 2006.229.16:50:38.89#ibcon#about to read 4, iclass 21, count 0 2006.229.16:50:38.89#ibcon#read 4, iclass 21, count 0 2006.229.16:50:38.89#ibcon#about to read 5, iclass 21, count 0 2006.229.16:50:38.89#ibcon#read 5, iclass 21, count 0 2006.229.16:50:38.89#ibcon#about to read 6, iclass 21, count 0 2006.229.16:50:38.89#ibcon#read 6, iclass 21, count 0 2006.229.16:50:38.89#ibcon#end of sib2, iclass 21, count 0 2006.229.16:50:38.89#ibcon#*after write, iclass 21, count 0 2006.229.16:50:38.89#ibcon#*before return 0, iclass 21, count 0 2006.229.16:50:38.89#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:38.89#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:38.89#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:50:38.89#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:50:38.89$vck44/va=3,6 2006.229.16:50:38.89#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.16:50:38.89#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.16:50:38.89#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:38.89#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:38.95#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:38.95#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:38.95#ibcon#enter wrdev, iclass 23, count 2 2006.229.16:50:38.95#ibcon#first serial, iclass 23, count 2 2006.229.16:50:38.95#ibcon#enter sib2, iclass 23, count 2 2006.229.16:50:38.95#ibcon#flushed, iclass 23, count 2 2006.229.16:50:38.95#ibcon#about to write, iclass 23, count 2 2006.229.16:50:38.95#ibcon#wrote, iclass 23, count 2 2006.229.16:50:38.95#ibcon#about to read 3, iclass 23, count 2 2006.229.16:50:38.97#ibcon#read 3, iclass 23, count 2 2006.229.16:50:38.97#ibcon#about to read 4, iclass 23, count 2 2006.229.16:50:38.97#ibcon#read 4, iclass 23, count 2 2006.229.16:50:38.97#ibcon#about to read 5, iclass 23, count 2 2006.229.16:50:38.97#ibcon#read 5, iclass 23, count 2 2006.229.16:50:38.97#ibcon#about to read 6, iclass 23, count 2 2006.229.16:50:38.97#ibcon#read 6, iclass 23, count 2 2006.229.16:50:38.97#ibcon#end of sib2, iclass 23, count 2 2006.229.16:50:38.97#ibcon#*mode == 0, iclass 23, count 2 2006.229.16:50:38.97#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.16:50:38.97#ibcon#[25=AT03-06\r\n] 2006.229.16:50:38.97#ibcon#*before write, iclass 23, count 2 2006.229.16:50:38.97#ibcon#enter sib2, iclass 23, count 2 2006.229.16:50:38.97#ibcon#flushed, iclass 23, count 2 2006.229.16:50:38.97#ibcon#about to write, iclass 23, count 2 2006.229.16:50:38.97#ibcon#wrote, iclass 23, count 2 2006.229.16:50:38.97#ibcon#about to read 3, iclass 23, count 2 2006.229.16:50:39.00#ibcon#read 3, iclass 23, count 2 2006.229.16:50:39.00#ibcon#about to read 4, iclass 23, count 2 2006.229.16:50:39.00#ibcon#read 4, iclass 23, count 2 2006.229.16:50:39.00#ibcon#about to read 5, iclass 23, count 2 2006.229.16:50:39.00#ibcon#read 5, iclass 23, count 2 2006.229.16:50:39.00#ibcon#about to read 6, iclass 23, count 2 2006.229.16:50:39.00#ibcon#read 6, iclass 23, count 2 2006.229.16:50:39.00#ibcon#end of sib2, iclass 23, count 2 2006.229.16:50:39.00#ibcon#*after write, iclass 23, count 2 2006.229.16:50:39.00#ibcon#*before return 0, iclass 23, count 2 2006.229.16:50:39.00#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:39.00#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:39.00#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.16:50:39.00#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:39.00#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:39.12#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:39.12#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:39.12#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:50:39.12#ibcon#first serial, iclass 23, count 0 2006.229.16:50:39.12#ibcon#enter sib2, iclass 23, count 0 2006.229.16:50:39.12#ibcon#flushed, iclass 23, count 0 2006.229.16:50:39.12#ibcon#about to write, iclass 23, count 0 2006.229.16:50:39.12#ibcon#wrote, iclass 23, count 0 2006.229.16:50:39.12#ibcon#about to read 3, iclass 23, count 0 2006.229.16:50:39.14#ibcon#read 3, iclass 23, count 0 2006.229.16:50:39.14#ibcon#about to read 4, iclass 23, count 0 2006.229.16:50:39.14#ibcon#read 4, iclass 23, count 0 2006.229.16:50:39.14#ibcon#about to read 5, iclass 23, count 0 2006.229.16:50:39.14#ibcon#read 5, iclass 23, count 0 2006.229.16:50:39.14#ibcon#about to read 6, iclass 23, count 0 2006.229.16:50:39.14#ibcon#read 6, iclass 23, count 0 2006.229.16:50:39.14#ibcon#end of sib2, iclass 23, count 0 2006.229.16:50:39.14#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:50:39.14#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:50:39.14#ibcon#[25=USB\r\n] 2006.229.16:50:39.14#ibcon#*before write, iclass 23, count 0 2006.229.16:50:39.14#ibcon#enter sib2, iclass 23, count 0 2006.229.16:50:39.14#ibcon#flushed, iclass 23, count 0 2006.229.16:50:39.14#ibcon#about to write, iclass 23, count 0 2006.229.16:50:39.14#ibcon#wrote, iclass 23, count 0 2006.229.16:50:39.14#ibcon#about to read 3, iclass 23, count 0 2006.229.16:50:39.17#ibcon#read 3, iclass 23, count 0 2006.229.16:50:39.17#ibcon#about to read 4, iclass 23, count 0 2006.229.16:50:39.17#ibcon#read 4, iclass 23, count 0 2006.229.16:50:39.17#ibcon#about to read 5, iclass 23, count 0 2006.229.16:50:39.17#ibcon#read 5, iclass 23, count 0 2006.229.16:50:39.17#ibcon#about to read 6, iclass 23, count 0 2006.229.16:50:39.17#ibcon#read 6, iclass 23, count 0 2006.229.16:50:39.17#ibcon#end of sib2, iclass 23, count 0 2006.229.16:50:39.17#ibcon#*after write, iclass 23, count 0 2006.229.16:50:39.17#ibcon#*before return 0, iclass 23, count 0 2006.229.16:50:39.17#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:39.17#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:39.17#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:50:39.17#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:50:39.17$vck44/valo=4,624.99 2006.229.16:50:39.17#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.16:50:39.17#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.16:50:39.17#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:39.17#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:39.17#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:39.17#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:39.17#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:50:39.17#ibcon#first serial, iclass 25, count 0 2006.229.16:50:39.17#ibcon#enter sib2, iclass 25, count 0 2006.229.16:50:39.17#ibcon#flushed, iclass 25, count 0 2006.229.16:50:39.17#ibcon#about to write, iclass 25, count 0 2006.229.16:50:39.17#ibcon#wrote, iclass 25, count 0 2006.229.16:50:39.17#ibcon#about to read 3, iclass 25, count 0 2006.229.16:50:39.19#ibcon#read 3, iclass 25, count 0 2006.229.16:50:39.19#ibcon#about to read 4, iclass 25, count 0 2006.229.16:50:39.19#ibcon#read 4, iclass 25, count 0 2006.229.16:50:39.19#ibcon#about to read 5, iclass 25, count 0 2006.229.16:50:39.19#ibcon#read 5, iclass 25, count 0 2006.229.16:50:39.19#ibcon#about to read 6, iclass 25, count 0 2006.229.16:50:39.19#ibcon#read 6, iclass 25, count 0 2006.229.16:50:39.19#ibcon#end of sib2, iclass 25, count 0 2006.229.16:50:39.19#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:50:39.19#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:50:39.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:50:39.19#ibcon#*before write, iclass 25, count 0 2006.229.16:50:39.19#ibcon#enter sib2, iclass 25, count 0 2006.229.16:50:39.19#ibcon#flushed, iclass 25, count 0 2006.229.16:50:39.19#ibcon#about to write, iclass 25, count 0 2006.229.16:50:39.19#ibcon#wrote, iclass 25, count 0 2006.229.16:50:39.19#ibcon#about to read 3, iclass 25, count 0 2006.229.16:50:39.23#ibcon#read 3, iclass 25, count 0 2006.229.16:50:39.23#ibcon#about to read 4, iclass 25, count 0 2006.229.16:50:39.23#ibcon#read 4, iclass 25, count 0 2006.229.16:50:39.23#ibcon#about to read 5, iclass 25, count 0 2006.229.16:50:39.23#ibcon#read 5, iclass 25, count 0 2006.229.16:50:39.23#ibcon#about to read 6, iclass 25, count 0 2006.229.16:50:39.23#ibcon#read 6, iclass 25, count 0 2006.229.16:50:39.23#ibcon#end of sib2, iclass 25, count 0 2006.229.16:50:39.23#ibcon#*after write, iclass 25, count 0 2006.229.16:50:39.23#ibcon#*before return 0, iclass 25, count 0 2006.229.16:50:39.23#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:39.23#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:39.23#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:50:39.23#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:50:39.23$vck44/va=4,7 2006.229.16:50:39.23#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.16:50:39.23#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.16:50:39.23#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:39.23#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:39.29#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:39.29#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:39.29#ibcon#enter wrdev, iclass 27, count 2 2006.229.16:50:39.29#ibcon#first serial, iclass 27, count 2 2006.229.16:50:39.29#ibcon#enter sib2, iclass 27, count 2 2006.229.16:50:39.29#ibcon#flushed, iclass 27, count 2 2006.229.16:50:39.29#ibcon#about to write, iclass 27, count 2 2006.229.16:50:39.29#ibcon#wrote, iclass 27, count 2 2006.229.16:50:39.29#ibcon#about to read 3, iclass 27, count 2 2006.229.16:50:39.31#ibcon#read 3, iclass 27, count 2 2006.229.16:50:39.31#ibcon#about to read 4, iclass 27, count 2 2006.229.16:50:39.31#ibcon#read 4, iclass 27, count 2 2006.229.16:50:39.31#ibcon#about to read 5, iclass 27, count 2 2006.229.16:50:39.31#ibcon#read 5, iclass 27, count 2 2006.229.16:50:39.31#ibcon#about to read 6, iclass 27, count 2 2006.229.16:50:39.31#ibcon#read 6, iclass 27, count 2 2006.229.16:50:39.31#ibcon#end of sib2, iclass 27, count 2 2006.229.16:50:39.31#ibcon#*mode == 0, iclass 27, count 2 2006.229.16:50:39.31#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.16:50:39.31#ibcon#[25=AT04-07\r\n] 2006.229.16:50:39.31#ibcon#*before write, iclass 27, count 2 2006.229.16:50:39.31#ibcon#enter sib2, iclass 27, count 2 2006.229.16:50:39.31#ibcon#flushed, iclass 27, count 2 2006.229.16:50:39.31#ibcon#about to write, iclass 27, count 2 2006.229.16:50:39.31#ibcon#wrote, iclass 27, count 2 2006.229.16:50:39.31#ibcon#about to read 3, iclass 27, count 2 2006.229.16:50:39.34#ibcon#read 3, iclass 27, count 2 2006.229.16:50:39.34#ibcon#about to read 4, iclass 27, count 2 2006.229.16:50:39.34#ibcon#read 4, iclass 27, count 2 2006.229.16:50:39.34#ibcon#about to read 5, iclass 27, count 2 2006.229.16:50:39.34#ibcon#read 5, iclass 27, count 2 2006.229.16:50:39.34#ibcon#about to read 6, iclass 27, count 2 2006.229.16:50:39.34#ibcon#read 6, iclass 27, count 2 2006.229.16:50:39.34#ibcon#end of sib2, iclass 27, count 2 2006.229.16:50:39.34#ibcon#*after write, iclass 27, count 2 2006.229.16:50:39.34#ibcon#*before return 0, iclass 27, count 2 2006.229.16:50:39.34#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:39.34#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:39.34#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.16:50:39.34#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:39.34#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:39.46#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:39.46#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:39.46#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:50:39.46#ibcon#first serial, iclass 27, count 0 2006.229.16:50:39.46#ibcon#enter sib2, iclass 27, count 0 2006.229.16:50:39.46#ibcon#flushed, iclass 27, count 0 2006.229.16:50:39.46#ibcon#about to write, iclass 27, count 0 2006.229.16:50:39.46#ibcon#wrote, iclass 27, count 0 2006.229.16:50:39.46#ibcon#about to read 3, iclass 27, count 0 2006.229.16:50:39.48#ibcon#read 3, iclass 27, count 0 2006.229.16:50:39.48#ibcon#about to read 4, iclass 27, count 0 2006.229.16:50:39.48#ibcon#read 4, iclass 27, count 0 2006.229.16:50:39.48#ibcon#about to read 5, iclass 27, count 0 2006.229.16:50:39.48#ibcon#read 5, iclass 27, count 0 2006.229.16:50:39.48#ibcon#about to read 6, iclass 27, count 0 2006.229.16:50:39.48#ibcon#read 6, iclass 27, count 0 2006.229.16:50:39.48#ibcon#end of sib2, iclass 27, count 0 2006.229.16:50:39.48#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:50:39.48#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:50:39.48#ibcon#[25=USB\r\n] 2006.229.16:50:39.48#ibcon#*before write, iclass 27, count 0 2006.229.16:50:39.48#ibcon#enter sib2, iclass 27, count 0 2006.229.16:50:39.48#ibcon#flushed, iclass 27, count 0 2006.229.16:50:39.48#ibcon#about to write, iclass 27, count 0 2006.229.16:50:39.48#ibcon#wrote, iclass 27, count 0 2006.229.16:50:39.48#ibcon#about to read 3, iclass 27, count 0 2006.229.16:50:39.51#ibcon#read 3, iclass 27, count 0 2006.229.16:50:39.51#ibcon#about to read 4, iclass 27, count 0 2006.229.16:50:39.51#ibcon#read 4, iclass 27, count 0 2006.229.16:50:39.51#ibcon#about to read 5, iclass 27, count 0 2006.229.16:50:39.51#ibcon#read 5, iclass 27, count 0 2006.229.16:50:39.51#ibcon#about to read 6, iclass 27, count 0 2006.229.16:50:39.51#ibcon#read 6, iclass 27, count 0 2006.229.16:50:39.51#ibcon#end of sib2, iclass 27, count 0 2006.229.16:50:39.51#ibcon#*after write, iclass 27, count 0 2006.229.16:50:39.51#ibcon#*before return 0, iclass 27, count 0 2006.229.16:50:39.51#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:39.51#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:39.51#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:50:39.51#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:50:39.51$vck44/valo=5,734.99 2006.229.16:50:39.51#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.16:50:39.51#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.16:50:39.51#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:39.51#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:39.51#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:39.51#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:39.51#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:50:39.51#ibcon#first serial, iclass 29, count 0 2006.229.16:50:39.51#ibcon#enter sib2, iclass 29, count 0 2006.229.16:50:39.51#ibcon#flushed, iclass 29, count 0 2006.229.16:50:39.51#ibcon#about to write, iclass 29, count 0 2006.229.16:50:39.51#ibcon#wrote, iclass 29, count 0 2006.229.16:50:39.51#ibcon#about to read 3, iclass 29, count 0 2006.229.16:50:39.53#ibcon#read 3, iclass 29, count 0 2006.229.16:50:39.53#ibcon#about to read 4, iclass 29, count 0 2006.229.16:50:39.53#ibcon#read 4, iclass 29, count 0 2006.229.16:50:39.53#ibcon#about to read 5, iclass 29, count 0 2006.229.16:50:39.53#ibcon#read 5, iclass 29, count 0 2006.229.16:50:39.53#ibcon#about to read 6, iclass 29, count 0 2006.229.16:50:39.53#ibcon#read 6, iclass 29, count 0 2006.229.16:50:39.53#ibcon#end of sib2, iclass 29, count 0 2006.229.16:50:39.53#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:50:39.53#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:50:39.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:50:39.53#ibcon#*before write, iclass 29, count 0 2006.229.16:50:39.53#ibcon#enter sib2, iclass 29, count 0 2006.229.16:50:39.53#ibcon#flushed, iclass 29, count 0 2006.229.16:50:39.53#ibcon#about to write, iclass 29, count 0 2006.229.16:50:39.53#ibcon#wrote, iclass 29, count 0 2006.229.16:50:39.53#ibcon#about to read 3, iclass 29, count 0 2006.229.16:50:39.57#ibcon#read 3, iclass 29, count 0 2006.229.16:50:39.57#ibcon#about to read 4, iclass 29, count 0 2006.229.16:50:39.57#ibcon#read 4, iclass 29, count 0 2006.229.16:50:39.57#ibcon#about to read 5, iclass 29, count 0 2006.229.16:50:39.57#ibcon#read 5, iclass 29, count 0 2006.229.16:50:39.57#ibcon#about to read 6, iclass 29, count 0 2006.229.16:50:39.57#ibcon#read 6, iclass 29, count 0 2006.229.16:50:39.57#ibcon#end of sib2, iclass 29, count 0 2006.229.16:50:39.57#ibcon#*after write, iclass 29, count 0 2006.229.16:50:39.57#ibcon#*before return 0, iclass 29, count 0 2006.229.16:50:39.57#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:39.57#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:39.57#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:50:39.57#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:50:39.57$vck44/va=5,4 2006.229.16:50:39.57#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.16:50:39.57#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.16:50:39.57#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:39.57#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:39.63#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:39.63#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:39.63#ibcon#enter wrdev, iclass 31, count 2 2006.229.16:50:39.63#ibcon#first serial, iclass 31, count 2 2006.229.16:50:39.63#ibcon#enter sib2, iclass 31, count 2 2006.229.16:50:39.63#ibcon#flushed, iclass 31, count 2 2006.229.16:50:39.63#ibcon#about to write, iclass 31, count 2 2006.229.16:50:39.63#ibcon#wrote, iclass 31, count 2 2006.229.16:50:39.63#ibcon#about to read 3, iclass 31, count 2 2006.229.16:50:39.65#ibcon#read 3, iclass 31, count 2 2006.229.16:50:39.65#ibcon#about to read 4, iclass 31, count 2 2006.229.16:50:39.65#ibcon#read 4, iclass 31, count 2 2006.229.16:50:39.65#ibcon#about to read 5, iclass 31, count 2 2006.229.16:50:39.65#ibcon#read 5, iclass 31, count 2 2006.229.16:50:39.65#ibcon#about to read 6, iclass 31, count 2 2006.229.16:50:39.65#ibcon#read 6, iclass 31, count 2 2006.229.16:50:39.65#ibcon#end of sib2, iclass 31, count 2 2006.229.16:50:39.65#ibcon#*mode == 0, iclass 31, count 2 2006.229.16:50:39.65#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.16:50:39.65#ibcon#[25=AT05-04\r\n] 2006.229.16:50:39.65#ibcon#*before write, iclass 31, count 2 2006.229.16:50:39.65#ibcon#enter sib2, iclass 31, count 2 2006.229.16:50:39.65#ibcon#flushed, iclass 31, count 2 2006.229.16:50:39.65#ibcon#about to write, iclass 31, count 2 2006.229.16:50:39.65#ibcon#wrote, iclass 31, count 2 2006.229.16:50:39.65#ibcon#about to read 3, iclass 31, count 2 2006.229.16:50:39.68#ibcon#read 3, iclass 31, count 2 2006.229.16:50:39.68#ibcon#about to read 4, iclass 31, count 2 2006.229.16:50:39.68#ibcon#read 4, iclass 31, count 2 2006.229.16:50:39.68#ibcon#about to read 5, iclass 31, count 2 2006.229.16:50:39.68#ibcon#read 5, iclass 31, count 2 2006.229.16:50:39.68#ibcon#about to read 6, iclass 31, count 2 2006.229.16:50:39.68#ibcon#read 6, iclass 31, count 2 2006.229.16:50:39.68#ibcon#end of sib2, iclass 31, count 2 2006.229.16:50:39.68#ibcon#*after write, iclass 31, count 2 2006.229.16:50:39.68#ibcon#*before return 0, iclass 31, count 2 2006.229.16:50:39.68#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:39.68#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:39.68#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.16:50:39.68#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:39.68#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:39.80#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:39.80#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:39.80#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:50:39.80#ibcon#first serial, iclass 31, count 0 2006.229.16:50:39.80#ibcon#enter sib2, iclass 31, count 0 2006.229.16:50:39.80#ibcon#flushed, iclass 31, count 0 2006.229.16:50:39.80#ibcon#about to write, iclass 31, count 0 2006.229.16:50:39.80#ibcon#wrote, iclass 31, count 0 2006.229.16:50:39.80#ibcon#about to read 3, iclass 31, count 0 2006.229.16:50:39.82#ibcon#read 3, iclass 31, count 0 2006.229.16:50:39.82#ibcon#about to read 4, iclass 31, count 0 2006.229.16:50:39.82#ibcon#read 4, iclass 31, count 0 2006.229.16:50:39.82#ibcon#about to read 5, iclass 31, count 0 2006.229.16:50:39.82#ibcon#read 5, iclass 31, count 0 2006.229.16:50:39.82#ibcon#about to read 6, iclass 31, count 0 2006.229.16:50:39.82#ibcon#read 6, iclass 31, count 0 2006.229.16:50:39.82#ibcon#end of sib2, iclass 31, count 0 2006.229.16:50:39.82#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:50:39.82#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:50:39.82#ibcon#[25=USB\r\n] 2006.229.16:50:39.82#ibcon#*before write, iclass 31, count 0 2006.229.16:50:39.82#ibcon#enter sib2, iclass 31, count 0 2006.229.16:50:39.82#ibcon#flushed, iclass 31, count 0 2006.229.16:50:39.82#ibcon#about to write, iclass 31, count 0 2006.229.16:50:39.82#ibcon#wrote, iclass 31, count 0 2006.229.16:50:39.82#ibcon#about to read 3, iclass 31, count 0 2006.229.16:50:39.85#ibcon#read 3, iclass 31, count 0 2006.229.16:50:39.85#ibcon#about to read 4, iclass 31, count 0 2006.229.16:50:39.85#ibcon#read 4, iclass 31, count 0 2006.229.16:50:39.85#ibcon#about to read 5, iclass 31, count 0 2006.229.16:50:39.85#ibcon#read 5, iclass 31, count 0 2006.229.16:50:39.85#ibcon#about to read 6, iclass 31, count 0 2006.229.16:50:39.85#ibcon#read 6, iclass 31, count 0 2006.229.16:50:39.85#ibcon#end of sib2, iclass 31, count 0 2006.229.16:50:39.85#ibcon#*after write, iclass 31, count 0 2006.229.16:50:39.85#ibcon#*before return 0, iclass 31, count 0 2006.229.16:50:39.85#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:39.85#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:39.85#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:50:39.85#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:50:39.85$vck44/valo=6,814.99 2006.229.16:50:39.85#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:50:39.85#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:50:39.85#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:39.85#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:39.85#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:39.85#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:39.85#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:50:39.85#ibcon#first serial, iclass 33, count 0 2006.229.16:50:39.85#ibcon#enter sib2, iclass 33, count 0 2006.229.16:50:39.85#ibcon#flushed, iclass 33, count 0 2006.229.16:50:39.85#ibcon#about to write, iclass 33, count 0 2006.229.16:50:39.85#ibcon#wrote, iclass 33, count 0 2006.229.16:50:39.85#ibcon#about to read 3, iclass 33, count 0 2006.229.16:50:39.87#ibcon#read 3, iclass 33, count 0 2006.229.16:50:39.87#ibcon#about to read 4, iclass 33, count 0 2006.229.16:50:39.87#ibcon#read 4, iclass 33, count 0 2006.229.16:50:39.87#ibcon#about to read 5, iclass 33, count 0 2006.229.16:50:39.87#ibcon#read 5, iclass 33, count 0 2006.229.16:50:39.87#ibcon#about to read 6, iclass 33, count 0 2006.229.16:50:39.87#ibcon#read 6, iclass 33, count 0 2006.229.16:50:39.87#ibcon#end of sib2, iclass 33, count 0 2006.229.16:50:39.87#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:50:39.87#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:50:39.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:50:39.87#ibcon#*before write, iclass 33, count 0 2006.229.16:50:39.87#ibcon#enter sib2, iclass 33, count 0 2006.229.16:50:39.87#ibcon#flushed, iclass 33, count 0 2006.229.16:50:39.87#ibcon#about to write, iclass 33, count 0 2006.229.16:50:39.87#ibcon#wrote, iclass 33, count 0 2006.229.16:50:39.87#ibcon#about to read 3, iclass 33, count 0 2006.229.16:50:39.91#ibcon#read 3, iclass 33, count 0 2006.229.16:50:39.91#ibcon#about to read 4, iclass 33, count 0 2006.229.16:50:39.91#ibcon#read 4, iclass 33, count 0 2006.229.16:50:39.91#ibcon#about to read 5, iclass 33, count 0 2006.229.16:50:39.91#ibcon#read 5, iclass 33, count 0 2006.229.16:50:39.91#ibcon#about to read 6, iclass 33, count 0 2006.229.16:50:39.91#ibcon#read 6, iclass 33, count 0 2006.229.16:50:39.91#ibcon#end of sib2, iclass 33, count 0 2006.229.16:50:39.91#ibcon#*after write, iclass 33, count 0 2006.229.16:50:39.91#ibcon#*before return 0, iclass 33, count 0 2006.229.16:50:39.91#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:39.91#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:39.91#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:50:39.91#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:50:39.91$vck44/va=6,4 2006.229.16:50:39.91#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:50:39.91#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:50:39.91#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:39.91#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:39.97#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:39.97#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:39.97#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:50:39.97#ibcon#first serial, iclass 35, count 2 2006.229.16:50:39.97#ibcon#enter sib2, iclass 35, count 2 2006.229.16:50:39.97#ibcon#flushed, iclass 35, count 2 2006.229.16:50:39.97#ibcon#about to write, iclass 35, count 2 2006.229.16:50:39.97#ibcon#wrote, iclass 35, count 2 2006.229.16:50:39.97#ibcon#about to read 3, iclass 35, count 2 2006.229.16:50:39.99#ibcon#read 3, iclass 35, count 2 2006.229.16:50:39.99#ibcon#about to read 4, iclass 35, count 2 2006.229.16:50:39.99#ibcon#read 4, iclass 35, count 2 2006.229.16:50:39.99#ibcon#about to read 5, iclass 35, count 2 2006.229.16:50:39.99#ibcon#read 5, iclass 35, count 2 2006.229.16:50:39.99#ibcon#about to read 6, iclass 35, count 2 2006.229.16:50:39.99#ibcon#read 6, iclass 35, count 2 2006.229.16:50:39.99#ibcon#end of sib2, iclass 35, count 2 2006.229.16:50:39.99#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:50:39.99#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:50:39.99#ibcon#[25=AT06-04\r\n] 2006.229.16:50:39.99#ibcon#*before write, iclass 35, count 2 2006.229.16:50:39.99#ibcon#enter sib2, iclass 35, count 2 2006.229.16:50:39.99#ibcon#flushed, iclass 35, count 2 2006.229.16:50:39.99#ibcon#about to write, iclass 35, count 2 2006.229.16:50:39.99#ibcon#wrote, iclass 35, count 2 2006.229.16:50:39.99#ibcon#about to read 3, iclass 35, count 2 2006.229.16:50:40.02#ibcon#read 3, iclass 35, count 2 2006.229.16:50:40.02#ibcon#about to read 4, iclass 35, count 2 2006.229.16:50:40.02#ibcon#read 4, iclass 35, count 2 2006.229.16:50:40.02#ibcon#about to read 5, iclass 35, count 2 2006.229.16:50:40.02#ibcon#read 5, iclass 35, count 2 2006.229.16:50:40.02#ibcon#about to read 6, iclass 35, count 2 2006.229.16:50:40.02#ibcon#read 6, iclass 35, count 2 2006.229.16:50:40.02#ibcon#end of sib2, iclass 35, count 2 2006.229.16:50:40.02#ibcon#*after write, iclass 35, count 2 2006.229.16:50:40.02#ibcon#*before return 0, iclass 35, count 2 2006.229.16:50:40.02#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:40.02#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:40.02#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:50:40.02#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:40.02#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:40.14#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:40.14#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:40.14#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:50:40.14#ibcon#first serial, iclass 35, count 0 2006.229.16:50:40.14#ibcon#enter sib2, iclass 35, count 0 2006.229.16:50:40.14#ibcon#flushed, iclass 35, count 0 2006.229.16:50:40.14#ibcon#about to write, iclass 35, count 0 2006.229.16:50:40.14#ibcon#wrote, iclass 35, count 0 2006.229.16:50:40.14#ibcon#about to read 3, iclass 35, count 0 2006.229.16:50:40.16#ibcon#read 3, iclass 35, count 0 2006.229.16:50:40.16#ibcon#about to read 4, iclass 35, count 0 2006.229.16:50:40.16#ibcon#read 4, iclass 35, count 0 2006.229.16:50:40.16#ibcon#about to read 5, iclass 35, count 0 2006.229.16:50:40.16#ibcon#read 5, iclass 35, count 0 2006.229.16:50:40.16#ibcon#about to read 6, iclass 35, count 0 2006.229.16:50:40.16#ibcon#read 6, iclass 35, count 0 2006.229.16:50:40.16#ibcon#end of sib2, iclass 35, count 0 2006.229.16:50:40.16#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:50:40.16#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:50:40.16#ibcon#[25=USB\r\n] 2006.229.16:50:40.16#ibcon#*before write, iclass 35, count 0 2006.229.16:50:40.16#ibcon#enter sib2, iclass 35, count 0 2006.229.16:50:40.16#ibcon#flushed, iclass 35, count 0 2006.229.16:50:40.16#ibcon#about to write, iclass 35, count 0 2006.229.16:50:40.16#ibcon#wrote, iclass 35, count 0 2006.229.16:50:40.16#ibcon#about to read 3, iclass 35, count 0 2006.229.16:50:40.19#ibcon#read 3, iclass 35, count 0 2006.229.16:50:40.19#ibcon#about to read 4, iclass 35, count 0 2006.229.16:50:40.19#ibcon#read 4, iclass 35, count 0 2006.229.16:50:40.19#ibcon#about to read 5, iclass 35, count 0 2006.229.16:50:40.19#ibcon#read 5, iclass 35, count 0 2006.229.16:50:40.19#ibcon#about to read 6, iclass 35, count 0 2006.229.16:50:40.19#ibcon#read 6, iclass 35, count 0 2006.229.16:50:40.19#ibcon#end of sib2, iclass 35, count 0 2006.229.16:50:40.19#ibcon#*after write, iclass 35, count 0 2006.229.16:50:40.19#ibcon#*before return 0, iclass 35, count 0 2006.229.16:50:40.19#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:40.19#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:40.19#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:50:40.19#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:50:40.19$vck44/valo=7,864.99 2006.229.16:50:40.19#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.16:50:40.19#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.16:50:40.19#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:40.19#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:40.19#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:40.19#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:40.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:50:40.19#ibcon#first serial, iclass 37, count 0 2006.229.16:50:40.19#ibcon#enter sib2, iclass 37, count 0 2006.229.16:50:40.19#ibcon#flushed, iclass 37, count 0 2006.229.16:50:40.19#ibcon#about to write, iclass 37, count 0 2006.229.16:50:40.19#ibcon#wrote, iclass 37, count 0 2006.229.16:50:40.19#ibcon#about to read 3, iclass 37, count 0 2006.229.16:50:40.21#ibcon#read 3, iclass 37, count 0 2006.229.16:50:40.21#ibcon#about to read 4, iclass 37, count 0 2006.229.16:50:40.21#ibcon#read 4, iclass 37, count 0 2006.229.16:50:40.21#ibcon#about to read 5, iclass 37, count 0 2006.229.16:50:40.21#ibcon#read 5, iclass 37, count 0 2006.229.16:50:40.21#ibcon#about to read 6, iclass 37, count 0 2006.229.16:50:40.21#ibcon#read 6, iclass 37, count 0 2006.229.16:50:40.21#ibcon#end of sib2, iclass 37, count 0 2006.229.16:50:40.21#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:50:40.21#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:50:40.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:50:40.21#ibcon#*before write, iclass 37, count 0 2006.229.16:50:40.21#ibcon#enter sib2, iclass 37, count 0 2006.229.16:50:40.21#ibcon#flushed, iclass 37, count 0 2006.229.16:50:40.21#ibcon#about to write, iclass 37, count 0 2006.229.16:50:40.21#ibcon#wrote, iclass 37, count 0 2006.229.16:50:40.21#ibcon#about to read 3, iclass 37, count 0 2006.229.16:50:40.25#ibcon#read 3, iclass 37, count 0 2006.229.16:50:40.25#ibcon#about to read 4, iclass 37, count 0 2006.229.16:50:40.25#ibcon#read 4, iclass 37, count 0 2006.229.16:50:40.25#ibcon#about to read 5, iclass 37, count 0 2006.229.16:50:40.25#ibcon#read 5, iclass 37, count 0 2006.229.16:50:40.25#ibcon#about to read 6, iclass 37, count 0 2006.229.16:50:40.25#ibcon#read 6, iclass 37, count 0 2006.229.16:50:40.25#ibcon#end of sib2, iclass 37, count 0 2006.229.16:50:40.25#ibcon#*after write, iclass 37, count 0 2006.229.16:50:40.25#ibcon#*before return 0, iclass 37, count 0 2006.229.16:50:40.25#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:40.25#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:40.25#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:50:40.25#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:50:40.25$vck44/va=7,5 2006.229.16:50:40.25#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.16:50:40.25#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.16:50:40.25#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:40.25#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:40.31#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:40.31#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:40.31#ibcon#enter wrdev, iclass 39, count 2 2006.229.16:50:40.31#ibcon#first serial, iclass 39, count 2 2006.229.16:50:40.31#ibcon#enter sib2, iclass 39, count 2 2006.229.16:50:40.31#ibcon#flushed, iclass 39, count 2 2006.229.16:50:40.31#ibcon#about to write, iclass 39, count 2 2006.229.16:50:40.31#ibcon#wrote, iclass 39, count 2 2006.229.16:50:40.31#ibcon#about to read 3, iclass 39, count 2 2006.229.16:50:40.33#ibcon#read 3, iclass 39, count 2 2006.229.16:50:40.33#ibcon#about to read 4, iclass 39, count 2 2006.229.16:50:40.33#ibcon#read 4, iclass 39, count 2 2006.229.16:50:40.33#ibcon#about to read 5, iclass 39, count 2 2006.229.16:50:40.33#ibcon#read 5, iclass 39, count 2 2006.229.16:50:40.33#ibcon#about to read 6, iclass 39, count 2 2006.229.16:50:40.33#ibcon#read 6, iclass 39, count 2 2006.229.16:50:40.33#ibcon#end of sib2, iclass 39, count 2 2006.229.16:50:40.33#ibcon#*mode == 0, iclass 39, count 2 2006.229.16:50:40.33#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.16:50:40.33#ibcon#[25=AT07-05\r\n] 2006.229.16:50:40.33#ibcon#*before write, iclass 39, count 2 2006.229.16:50:40.33#ibcon#enter sib2, iclass 39, count 2 2006.229.16:50:40.33#ibcon#flushed, iclass 39, count 2 2006.229.16:50:40.33#ibcon#about to write, iclass 39, count 2 2006.229.16:50:40.33#ibcon#wrote, iclass 39, count 2 2006.229.16:50:40.33#ibcon#about to read 3, iclass 39, count 2 2006.229.16:50:40.36#ibcon#read 3, iclass 39, count 2 2006.229.16:50:40.36#ibcon#about to read 4, iclass 39, count 2 2006.229.16:50:40.36#ibcon#read 4, iclass 39, count 2 2006.229.16:50:40.36#ibcon#about to read 5, iclass 39, count 2 2006.229.16:50:40.36#ibcon#read 5, iclass 39, count 2 2006.229.16:50:40.36#ibcon#about to read 6, iclass 39, count 2 2006.229.16:50:40.36#ibcon#read 6, iclass 39, count 2 2006.229.16:50:40.36#ibcon#end of sib2, iclass 39, count 2 2006.229.16:50:40.36#ibcon#*after write, iclass 39, count 2 2006.229.16:50:40.36#ibcon#*before return 0, iclass 39, count 2 2006.229.16:50:40.36#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:40.36#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:40.36#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.16:50:40.36#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:40.36#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:40.48#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:40.48#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:40.48#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:50:40.48#ibcon#first serial, iclass 39, count 0 2006.229.16:50:40.48#ibcon#enter sib2, iclass 39, count 0 2006.229.16:50:40.48#ibcon#flushed, iclass 39, count 0 2006.229.16:50:40.48#ibcon#about to write, iclass 39, count 0 2006.229.16:50:40.48#ibcon#wrote, iclass 39, count 0 2006.229.16:50:40.48#ibcon#about to read 3, iclass 39, count 0 2006.229.16:50:40.50#ibcon#read 3, iclass 39, count 0 2006.229.16:50:40.50#ibcon#about to read 4, iclass 39, count 0 2006.229.16:50:40.50#ibcon#read 4, iclass 39, count 0 2006.229.16:50:40.50#ibcon#about to read 5, iclass 39, count 0 2006.229.16:50:40.50#ibcon#read 5, iclass 39, count 0 2006.229.16:50:40.50#ibcon#about to read 6, iclass 39, count 0 2006.229.16:50:40.50#ibcon#read 6, iclass 39, count 0 2006.229.16:50:40.50#ibcon#end of sib2, iclass 39, count 0 2006.229.16:50:40.50#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:50:40.50#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:50:40.50#ibcon#[25=USB\r\n] 2006.229.16:50:40.50#ibcon#*before write, iclass 39, count 0 2006.229.16:50:40.50#ibcon#enter sib2, iclass 39, count 0 2006.229.16:50:40.50#ibcon#flushed, iclass 39, count 0 2006.229.16:50:40.50#ibcon#about to write, iclass 39, count 0 2006.229.16:50:40.50#ibcon#wrote, iclass 39, count 0 2006.229.16:50:40.50#ibcon#about to read 3, iclass 39, count 0 2006.229.16:50:40.53#ibcon#read 3, iclass 39, count 0 2006.229.16:50:40.53#ibcon#about to read 4, iclass 39, count 0 2006.229.16:50:40.53#ibcon#read 4, iclass 39, count 0 2006.229.16:50:40.53#ibcon#about to read 5, iclass 39, count 0 2006.229.16:50:40.53#ibcon#read 5, iclass 39, count 0 2006.229.16:50:40.53#ibcon#about to read 6, iclass 39, count 0 2006.229.16:50:40.53#ibcon#read 6, iclass 39, count 0 2006.229.16:50:40.53#ibcon#end of sib2, iclass 39, count 0 2006.229.16:50:40.53#ibcon#*after write, iclass 39, count 0 2006.229.16:50:40.53#ibcon#*before return 0, iclass 39, count 0 2006.229.16:50:40.53#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:40.53#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:40.53#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:50:40.53#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:50:40.53$vck44/valo=8,884.99 2006.229.16:50:40.53#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.16:50:40.53#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.16:50:40.53#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:40.53#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:40.53#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:40.53#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:40.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:50:40.53#ibcon#first serial, iclass 3, count 0 2006.229.16:50:40.53#ibcon#enter sib2, iclass 3, count 0 2006.229.16:50:40.53#ibcon#flushed, iclass 3, count 0 2006.229.16:50:40.53#ibcon#about to write, iclass 3, count 0 2006.229.16:50:40.53#ibcon#wrote, iclass 3, count 0 2006.229.16:50:40.53#ibcon#about to read 3, iclass 3, count 0 2006.229.16:50:40.55#ibcon#read 3, iclass 3, count 0 2006.229.16:50:40.55#ibcon#about to read 4, iclass 3, count 0 2006.229.16:50:40.55#ibcon#read 4, iclass 3, count 0 2006.229.16:50:40.55#ibcon#about to read 5, iclass 3, count 0 2006.229.16:50:40.55#ibcon#read 5, iclass 3, count 0 2006.229.16:50:40.55#ibcon#about to read 6, iclass 3, count 0 2006.229.16:50:40.55#ibcon#read 6, iclass 3, count 0 2006.229.16:50:40.55#ibcon#end of sib2, iclass 3, count 0 2006.229.16:50:40.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:50:40.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:50:40.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:50:40.55#ibcon#*before write, iclass 3, count 0 2006.229.16:50:40.55#ibcon#enter sib2, iclass 3, count 0 2006.229.16:50:40.55#ibcon#flushed, iclass 3, count 0 2006.229.16:50:40.55#ibcon#about to write, iclass 3, count 0 2006.229.16:50:40.55#ibcon#wrote, iclass 3, count 0 2006.229.16:50:40.55#ibcon#about to read 3, iclass 3, count 0 2006.229.16:50:40.59#ibcon#read 3, iclass 3, count 0 2006.229.16:50:40.59#ibcon#about to read 4, iclass 3, count 0 2006.229.16:50:40.59#ibcon#read 4, iclass 3, count 0 2006.229.16:50:40.59#ibcon#about to read 5, iclass 3, count 0 2006.229.16:50:40.59#ibcon#read 5, iclass 3, count 0 2006.229.16:50:40.59#ibcon#about to read 6, iclass 3, count 0 2006.229.16:50:40.59#ibcon#read 6, iclass 3, count 0 2006.229.16:50:40.59#ibcon#end of sib2, iclass 3, count 0 2006.229.16:50:40.59#ibcon#*after write, iclass 3, count 0 2006.229.16:50:40.59#ibcon#*before return 0, iclass 3, count 0 2006.229.16:50:40.59#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:40.59#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:40.59#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:50:40.59#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:50:40.59$vck44/va=8,6 2006.229.16:50:40.59#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.16:50:40.59#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.16:50:40.59#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:40.59#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:50:40.65#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:50:40.65#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:50:40.65#ibcon#enter wrdev, iclass 5, count 2 2006.229.16:50:40.65#ibcon#first serial, iclass 5, count 2 2006.229.16:50:40.65#ibcon#enter sib2, iclass 5, count 2 2006.229.16:50:40.65#ibcon#flushed, iclass 5, count 2 2006.229.16:50:40.65#ibcon#about to write, iclass 5, count 2 2006.229.16:50:40.65#ibcon#wrote, iclass 5, count 2 2006.229.16:50:40.65#ibcon#about to read 3, iclass 5, count 2 2006.229.16:50:40.67#ibcon#read 3, iclass 5, count 2 2006.229.16:50:40.67#ibcon#about to read 4, iclass 5, count 2 2006.229.16:50:40.67#ibcon#read 4, iclass 5, count 2 2006.229.16:50:40.67#ibcon#about to read 5, iclass 5, count 2 2006.229.16:50:40.67#ibcon#read 5, iclass 5, count 2 2006.229.16:50:40.67#ibcon#about to read 6, iclass 5, count 2 2006.229.16:50:40.67#ibcon#read 6, iclass 5, count 2 2006.229.16:50:40.67#ibcon#end of sib2, iclass 5, count 2 2006.229.16:50:40.67#ibcon#*mode == 0, iclass 5, count 2 2006.229.16:50:40.67#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.16:50:40.67#ibcon#[25=AT08-06\r\n] 2006.229.16:50:40.67#ibcon#*before write, iclass 5, count 2 2006.229.16:50:40.67#ibcon#enter sib2, iclass 5, count 2 2006.229.16:50:40.67#ibcon#flushed, iclass 5, count 2 2006.229.16:50:40.67#ibcon#about to write, iclass 5, count 2 2006.229.16:50:40.67#ibcon#wrote, iclass 5, count 2 2006.229.16:50:40.67#ibcon#about to read 3, iclass 5, count 2 2006.229.16:50:40.70#ibcon#read 3, iclass 5, count 2 2006.229.16:50:40.70#ibcon#about to read 4, iclass 5, count 2 2006.229.16:50:40.70#ibcon#read 4, iclass 5, count 2 2006.229.16:50:40.70#ibcon#about to read 5, iclass 5, count 2 2006.229.16:50:40.70#ibcon#read 5, iclass 5, count 2 2006.229.16:50:40.70#ibcon#about to read 6, iclass 5, count 2 2006.229.16:50:40.70#ibcon#read 6, iclass 5, count 2 2006.229.16:50:40.70#ibcon#end of sib2, iclass 5, count 2 2006.229.16:50:40.70#ibcon#*after write, iclass 5, count 2 2006.229.16:50:40.70#ibcon#*before return 0, iclass 5, count 2 2006.229.16:50:40.70#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:50:40.70#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.16:50:40.70#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.16:50:40.70#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:40.70#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:50:40.82#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:50:40.82#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:50:40.82#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:50:40.82#ibcon#first serial, iclass 5, count 0 2006.229.16:50:40.82#ibcon#enter sib2, iclass 5, count 0 2006.229.16:50:40.82#ibcon#flushed, iclass 5, count 0 2006.229.16:50:40.82#ibcon#about to write, iclass 5, count 0 2006.229.16:50:40.82#ibcon#wrote, iclass 5, count 0 2006.229.16:50:40.82#ibcon#about to read 3, iclass 5, count 0 2006.229.16:50:40.84#ibcon#read 3, iclass 5, count 0 2006.229.16:50:40.84#ibcon#about to read 4, iclass 5, count 0 2006.229.16:50:40.84#ibcon#read 4, iclass 5, count 0 2006.229.16:50:40.84#ibcon#about to read 5, iclass 5, count 0 2006.229.16:50:40.84#ibcon#read 5, iclass 5, count 0 2006.229.16:50:40.84#ibcon#about to read 6, iclass 5, count 0 2006.229.16:50:40.84#ibcon#read 6, iclass 5, count 0 2006.229.16:50:40.84#ibcon#end of sib2, iclass 5, count 0 2006.229.16:50:40.84#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:50:40.84#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:50:40.84#ibcon#[25=USB\r\n] 2006.229.16:50:40.84#ibcon#*before write, iclass 5, count 0 2006.229.16:50:40.84#ibcon#enter sib2, iclass 5, count 0 2006.229.16:50:40.84#ibcon#flushed, iclass 5, count 0 2006.229.16:50:40.84#ibcon#about to write, iclass 5, count 0 2006.229.16:50:40.84#ibcon#wrote, iclass 5, count 0 2006.229.16:50:40.84#ibcon#about to read 3, iclass 5, count 0 2006.229.16:50:40.87#ibcon#read 3, iclass 5, count 0 2006.229.16:50:40.87#ibcon#about to read 4, iclass 5, count 0 2006.229.16:50:40.87#ibcon#read 4, iclass 5, count 0 2006.229.16:50:40.87#ibcon#about to read 5, iclass 5, count 0 2006.229.16:50:40.87#ibcon#read 5, iclass 5, count 0 2006.229.16:50:40.87#ibcon#about to read 6, iclass 5, count 0 2006.229.16:50:40.87#ibcon#read 6, iclass 5, count 0 2006.229.16:50:40.87#ibcon#end of sib2, iclass 5, count 0 2006.229.16:50:40.87#ibcon#*after write, iclass 5, count 0 2006.229.16:50:40.87#ibcon#*before return 0, iclass 5, count 0 2006.229.16:50:40.87#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:50:40.87#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.16:50:40.87#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:50:40.87#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:50:40.87$vck44/vblo=1,629.99 2006.229.16:50:40.87#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.16:50:40.87#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.16:50:40.87#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:40.87#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:50:40.87#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:50:40.87#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:50:40.87#ibcon#enter wrdev, iclass 7, count 0 2006.229.16:50:40.87#ibcon#first serial, iclass 7, count 0 2006.229.16:50:40.87#ibcon#enter sib2, iclass 7, count 0 2006.229.16:50:40.87#ibcon#flushed, iclass 7, count 0 2006.229.16:50:40.87#ibcon#about to write, iclass 7, count 0 2006.229.16:50:40.87#ibcon#wrote, iclass 7, count 0 2006.229.16:50:40.87#ibcon#about to read 3, iclass 7, count 0 2006.229.16:50:40.89#ibcon#read 3, iclass 7, count 0 2006.229.16:50:40.89#ibcon#about to read 4, iclass 7, count 0 2006.229.16:50:40.89#ibcon#read 4, iclass 7, count 0 2006.229.16:50:40.89#ibcon#about to read 5, iclass 7, count 0 2006.229.16:50:40.89#ibcon#read 5, iclass 7, count 0 2006.229.16:50:40.89#ibcon#about to read 6, iclass 7, count 0 2006.229.16:50:40.89#ibcon#read 6, iclass 7, count 0 2006.229.16:50:40.89#ibcon#end of sib2, iclass 7, count 0 2006.229.16:50:40.89#ibcon#*mode == 0, iclass 7, count 0 2006.229.16:50:40.89#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.16:50:40.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:50:40.89#ibcon#*before write, iclass 7, count 0 2006.229.16:50:40.89#ibcon#enter sib2, iclass 7, count 0 2006.229.16:50:40.89#ibcon#flushed, iclass 7, count 0 2006.229.16:50:40.89#ibcon#about to write, iclass 7, count 0 2006.229.16:50:40.89#ibcon#wrote, iclass 7, count 0 2006.229.16:50:40.89#ibcon#about to read 3, iclass 7, count 0 2006.229.16:50:40.93#ibcon#read 3, iclass 7, count 0 2006.229.16:50:40.93#ibcon#about to read 4, iclass 7, count 0 2006.229.16:50:40.93#ibcon#read 4, iclass 7, count 0 2006.229.16:50:40.93#ibcon#about to read 5, iclass 7, count 0 2006.229.16:50:40.93#ibcon#read 5, iclass 7, count 0 2006.229.16:50:40.93#ibcon#about to read 6, iclass 7, count 0 2006.229.16:50:40.93#ibcon#read 6, iclass 7, count 0 2006.229.16:50:40.93#ibcon#end of sib2, iclass 7, count 0 2006.229.16:50:40.93#ibcon#*after write, iclass 7, count 0 2006.229.16:50:40.93#ibcon#*before return 0, iclass 7, count 0 2006.229.16:50:40.93#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:50:40.93#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.16:50:40.93#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.16:50:40.93#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.16:50:40.93$vck44/vb=1,4 2006.229.16:50:40.93#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.16:50:40.93#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.16:50:40.93#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:40.93#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:50:40.93#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:50:40.93#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:50:40.93#ibcon#enter wrdev, iclass 11, count 2 2006.229.16:50:40.93#ibcon#first serial, iclass 11, count 2 2006.229.16:50:40.93#ibcon#enter sib2, iclass 11, count 2 2006.229.16:50:40.93#ibcon#flushed, iclass 11, count 2 2006.229.16:50:40.93#ibcon#about to write, iclass 11, count 2 2006.229.16:50:40.93#ibcon#wrote, iclass 11, count 2 2006.229.16:50:40.93#ibcon#about to read 3, iclass 11, count 2 2006.229.16:50:40.95#ibcon#read 3, iclass 11, count 2 2006.229.16:50:40.95#ibcon#about to read 4, iclass 11, count 2 2006.229.16:50:40.95#ibcon#read 4, iclass 11, count 2 2006.229.16:50:40.95#ibcon#about to read 5, iclass 11, count 2 2006.229.16:50:40.95#ibcon#read 5, iclass 11, count 2 2006.229.16:50:40.95#ibcon#about to read 6, iclass 11, count 2 2006.229.16:50:40.95#ibcon#read 6, iclass 11, count 2 2006.229.16:50:40.95#ibcon#end of sib2, iclass 11, count 2 2006.229.16:50:40.95#ibcon#*mode == 0, iclass 11, count 2 2006.229.16:50:40.95#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.16:50:40.95#ibcon#[27=AT01-04\r\n] 2006.229.16:50:40.95#ibcon#*before write, iclass 11, count 2 2006.229.16:50:40.95#ibcon#enter sib2, iclass 11, count 2 2006.229.16:50:40.95#ibcon#flushed, iclass 11, count 2 2006.229.16:50:40.95#ibcon#about to write, iclass 11, count 2 2006.229.16:50:40.95#ibcon#wrote, iclass 11, count 2 2006.229.16:50:40.95#ibcon#about to read 3, iclass 11, count 2 2006.229.16:50:40.98#ibcon#read 3, iclass 11, count 2 2006.229.16:50:40.98#ibcon#about to read 4, iclass 11, count 2 2006.229.16:50:40.98#ibcon#read 4, iclass 11, count 2 2006.229.16:50:40.98#ibcon#about to read 5, iclass 11, count 2 2006.229.16:50:40.98#ibcon#read 5, iclass 11, count 2 2006.229.16:50:40.98#ibcon#about to read 6, iclass 11, count 2 2006.229.16:50:40.98#ibcon#read 6, iclass 11, count 2 2006.229.16:50:40.98#ibcon#end of sib2, iclass 11, count 2 2006.229.16:50:40.98#ibcon#*after write, iclass 11, count 2 2006.229.16:50:40.98#ibcon#*before return 0, iclass 11, count 2 2006.229.16:50:40.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:50:40.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.16:50:40.98#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.16:50:40.98#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:40.98#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:50:41.10#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:50:41.10#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:50:41.10#ibcon#enter wrdev, iclass 11, count 0 2006.229.16:50:41.10#ibcon#first serial, iclass 11, count 0 2006.229.16:50:41.10#ibcon#enter sib2, iclass 11, count 0 2006.229.16:50:41.10#ibcon#flushed, iclass 11, count 0 2006.229.16:50:41.10#ibcon#about to write, iclass 11, count 0 2006.229.16:50:41.10#ibcon#wrote, iclass 11, count 0 2006.229.16:50:41.10#ibcon#about to read 3, iclass 11, count 0 2006.229.16:50:41.12#ibcon#read 3, iclass 11, count 0 2006.229.16:50:41.12#ibcon#about to read 4, iclass 11, count 0 2006.229.16:50:41.12#ibcon#read 4, iclass 11, count 0 2006.229.16:50:41.12#ibcon#about to read 5, iclass 11, count 0 2006.229.16:50:41.12#ibcon#read 5, iclass 11, count 0 2006.229.16:50:41.12#ibcon#about to read 6, iclass 11, count 0 2006.229.16:50:41.12#ibcon#read 6, iclass 11, count 0 2006.229.16:50:41.12#ibcon#end of sib2, iclass 11, count 0 2006.229.16:50:41.12#ibcon#*mode == 0, iclass 11, count 0 2006.229.16:50:41.12#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.16:50:41.12#ibcon#[27=USB\r\n] 2006.229.16:50:41.12#ibcon#*before write, iclass 11, count 0 2006.229.16:50:41.12#ibcon#enter sib2, iclass 11, count 0 2006.229.16:50:41.12#ibcon#flushed, iclass 11, count 0 2006.229.16:50:41.12#ibcon#about to write, iclass 11, count 0 2006.229.16:50:41.12#ibcon#wrote, iclass 11, count 0 2006.229.16:50:41.12#ibcon#about to read 3, iclass 11, count 0 2006.229.16:50:41.15#ibcon#read 3, iclass 11, count 0 2006.229.16:50:41.15#ibcon#about to read 4, iclass 11, count 0 2006.229.16:50:41.15#ibcon#read 4, iclass 11, count 0 2006.229.16:50:41.15#ibcon#about to read 5, iclass 11, count 0 2006.229.16:50:41.15#ibcon#read 5, iclass 11, count 0 2006.229.16:50:41.15#ibcon#about to read 6, iclass 11, count 0 2006.229.16:50:41.15#ibcon#read 6, iclass 11, count 0 2006.229.16:50:41.15#ibcon#end of sib2, iclass 11, count 0 2006.229.16:50:41.15#ibcon#*after write, iclass 11, count 0 2006.229.16:50:41.15#ibcon#*before return 0, iclass 11, count 0 2006.229.16:50:41.15#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:50:41.15#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.16:50:41.15#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.16:50:41.15#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.16:50:41.15$vck44/vblo=2,634.99 2006.229.16:50:41.15#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.16:50:41.15#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.16:50:41.15#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:41.15#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:41.15#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:41.15#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:41.15#ibcon#enter wrdev, iclass 13, count 0 2006.229.16:50:41.15#ibcon#first serial, iclass 13, count 0 2006.229.16:50:41.15#ibcon#enter sib2, iclass 13, count 0 2006.229.16:50:41.15#ibcon#flushed, iclass 13, count 0 2006.229.16:50:41.15#ibcon#about to write, iclass 13, count 0 2006.229.16:50:41.15#ibcon#wrote, iclass 13, count 0 2006.229.16:50:41.15#ibcon#about to read 3, iclass 13, count 0 2006.229.16:50:41.17#ibcon#read 3, iclass 13, count 0 2006.229.16:50:41.17#ibcon#about to read 4, iclass 13, count 0 2006.229.16:50:41.17#ibcon#read 4, iclass 13, count 0 2006.229.16:50:41.17#ibcon#about to read 5, iclass 13, count 0 2006.229.16:50:41.17#ibcon#read 5, iclass 13, count 0 2006.229.16:50:41.17#ibcon#about to read 6, iclass 13, count 0 2006.229.16:50:41.17#ibcon#read 6, iclass 13, count 0 2006.229.16:50:41.17#ibcon#end of sib2, iclass 13, count 0 2006.229.16:50:41.17#ibcon#*mode == 0, iclass 13, count 0 2006.229.16:50:41.17#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.16:50:41.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:50:41.17#ibcon#*before write, iclass 13, count 0 2006.229.16:50:41.17#ibcon#enter sib2, iclass 13, count 0 2006.229.16:50:41.17#ibcon#flushed, iclass 13, count 0 2006.229.16:50:41.17#ibcon#about to write, iclass 13, count 0 2006.229.16:50:41.17#ibcon#wrote, iclass 13, count 0 2006.229.16:50:41.17#ibcon#about to read 3, iclass 13, count 0 2006.229.16:50:41.21#ibcon#read 3, iclass 13, count 0 2006.229.16:50:41.21#ibcon#about to read 4, iclass 13, count 0 2006.229.16:50:41.21#ibcon#read 4, iclass 13, count 0 2006.229.16:50:41.21#ibcon#about to read 5, iclass 13, count 0 2006.229.16:50:41.21#ibcon#read 5, iclass 13, count 0 2006.229.16:50:41.21#ibcon#about to read 6, iclass 13, count 0 2006.229.16:50:41.21#ibcon#read 6, iclass 13, count 0 2006.229.16:50:41.21#ibcon#end of sib2, iclass 13, count 0 2006.229.16:50:41.21#ibcon#*after write, iclass 13, count 0 2006.229.16:50:41.21#ibcon#*before return 0, iclass 13, count 0 2006.229.16:50:41.21#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:41.21#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.16:50:41.21#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.16:50:41.21#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.16:50:41.21$vck44/vb=2,4 2006.229.16:50:41.21#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.16:50:41.21#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.16:50:41.21#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:41.21#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:41.27#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:41.27#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:41.27#ibcon#enter wrdev, iclass 15, count 2 2006.229.16:50:41.27#ibcon#first serial, iclass 15, count 2 2006.229.16:50:41.27#ibcon#enter sib2, iclass 15, count 2 2006.229.16:50:41.27#ibcon#flushed, iclass 15, count 2 2006.229.16:50:41.27#ibcon#about to write, iclass 15, count 2 2006.229.16:50:41.27#ibcon#wrote, iclass 15, count 2 2006.229.16:50:41.27#ibcon#about to read 3, iclass 15, count 2 2006.229.16:50:41.29#ibcon#read 3, iclass 15, count 2 2006.229.16:50:41.29#ibcon#about to read 4, iclass 15, count 2 2006.229.16:50:41.29#ibcon#read 4, iclass 15, count 2 2006.229.16:50:41.29#ibcon#about to read 5, iclass 15, count 2 2006.229.16:50:41.29#ibcon#read 5, iclass 15, count 2 2006.229.16:50:41.29#ibcon#about to read 6, iclass 15, count 2 2006.229.16:50:41.29#ibcon#read 6, iclass 15, count 2 2006.229.16:50:41.29#ibcon#end of sib2, iclass 15, count 2 2006.229.16:50:41.29#ibcon#*mode == 0, iclass 15, count 2 2006.229.16:50:41.29#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.16:50:41.29#ibcon#[27=AT02-04\r\n] 2006.229.16:50:41.29#ibcon#*before write, iclass 15, count 2 2006.229.16:50:41.29#ibcon#enter sib2, iclass 15, count 2 2006.229.16:50:41.29#ibcon#flushed, iclass 15, count 2 2006.229.16:50:41.29#ibcon#about to write, iclass 15, count 2 2006.229.16:50:41.29#ibcon#wrote, iclass 15, count 2 2006.229.16:50:41.29#ibcon#about to read 3, iclass 15, count 2 2006.229.16:50:41.32#ibcon#read 3, iclass 15, count 2 2006.229.16:50:41.32#ibcon#about to read 4, iclass 15, count 2 2006.229.16:50:41.32#ibcon#read 4, iclass 15, count 2 2006.229.16:50:41.32#ibcon#about to read 5, iclass 15, count 2 2006.229.16:50:41.32#ibcon#read 5, iclass 15, count 2 2006.229.16:50:41.32#ibcon#about to read 6, iclass 15, count 2 2006.229.16:50:41.32#ibcon#read 6, iclass 15, count 2 2006.229.16:50:41.32#ibcon#end of sib2, iclass 15, count 2 2006.229.16:50:41.32#ibcon#*after write, iclass 15, count 2 2006.229.16:50:41.32#ibcon#*before return 0, iclass 15, count 2 2006.229.16:50:41.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:41.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.16:50:41.32#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.16:50:41.32#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:41.32#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:41.44#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:41.44#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:41.44#ibcon#enter wrdev, iclass 15, count 0 2006.229.16:50:41.44#ibcon#first serial, iclass 15, count 0 2006.229.16:50:41.44#ibcon#enter sib2, iclass 15, count 0 2006.229.16:50:41.44#ibcon#flushed, iclass 15, count 0 2006.229.16:50:41.44#ibcon#about to write, iclass 15, count 0 2006.229.16:50:41.44#ibcon#wrote, iclass 15, count 0 2006.229.16:50:41.44#ibcon#about to read 3, iclass 15, count 0 2006.229.16:50:41.46#ibcon#read 3, iclass 15, count 0 2006.229.16:50:41.46#ibcon#about to read 4, iclass 15, count 0 2006.229.16:50:41.46#ibcon#read 4, iclass 15, count 0 2006.229.16:50:41.46#ibcon#about to read 5, iclass 15, count 0 2006.229.16:50:41.46#ibcon#read 5, iclass 15, count 0 2006.229.16:50:41.46#ibcon#about to read 6, iclass 15, count 0 2006.229.16:50:41.46#ibcon#read 6, iclass 15, count 0 2006.229.16:50:41.46#ibcon#end of sib2, iclass 15, count 0 2006.229.16:50:41.46#ibcon#*mode == 0, iclass 15, count 0 2006.229.16:50:41.46#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.16:50:41.46#ibcon#[27=USB\r\n] 2006.229.16:50:41.46#ibcon#*before write, iclass 15, count 0 2006.229.16:50:41.46#ibcon#enter sib2, iclass 15, count 0 2006.229.16:50:41.46#ibcon#flushed, iclass 15, count 0 2006.229.16:50:41.46#ibcon#about to write, iclass 15, count 0 2006.229.16:50:41.46#ibcon#wrote, iclass 15, count 0 2006.229.16:50:41.46#ibcon#about to read 3, iclass 15, count 0 2006.229.16:50:41.49#ibcon#read 3, iclass 15, count 0 2006.229.16:50:41.49#ibcon#about to read 4, iclass 15, count 0 2006.229.16:50:41.49#ibcon#read 4, iclass 15, count 0 2006.229.16:50:41.49#ibcon#about to read 5, iclass 15, count 0 2006.229.16:50:41.49#ibcon#read 5, iclass 15, count 0 2006.229.16:50:41.49#ibcon#about to read 6, iclass 15, count 0 2006.229.16:50:41.49#ibcon#read 6, iclass 15, count 0 2006.229.16:50:41.49#ibcon#end of sib2, iclass 15, count 0 2006.229.16:50:41.49#ibcon#*after write, iclass 15, count 0 2006.229.16:50:41.49#ibcon#*before return 0, iclass 15, count 0 2006.229.16:50:41.49#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:41.49#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.16:50:41.49#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.16:50:41.49#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.16:50:41.49$vck44/vblo=3,649.99 2006.229.16:50:41.49#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.16:50:41.49#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.16:50:41.49#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:41.49#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:41.49#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:41.49#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:41.49#ibcon#enter wrdev, iclass 17, count 0 2006.229.16:50:41.49#ibcon#first serial, iclass 17, count 0 2006.229.16:50:41.49#ibcon#enter sib2, iclass 17, count 0 2006.229.16:50:41.49#ibcon#flushed, iclass 17, count 0 2006.229.16:50:41.49#ibcon#about to write, iclass 17, count 0 2006.229.16:50:41.49#ibcon#wrote, iclass 17, count 0 2006.229.16:50:41.49#ibcon#about to read 3, iclass 17, count 0 2006.229.16:50:41.51#ibcon#read 3, iclass 17, count 0 2006.229.16:50:41.51#ibcon#about to read 4, iclass 17, count 0 2006.229.16:50:41.51#ibcon#read 4, iclass 17, count 0 2006.229.16:50:41.51#ibcon#about to read 5, iclass 17, count 0 2006.229.16:50:41.51#ibcon#read 5, iclass 17, count 0 2006.229.16:50:41.51#ibcon#about to read 6, iclass 17, count 0 2006.229.16:50:41.51#ibcon#read 6, iclass 17, count 0 2006.229.16:50:41.51#ibcon#end of sib2, iclass 17, count 0 2006.229.16:50:41.51#ibcon#*mode == 0, iclass 17, count 0 2006.229.16:50:41.51#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.16:50:41.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:50:41.51#ibcon#*before write, iclass 17, count 0 2006.229.16:50:41.51#ibcon#enter sib2, iclass 17, count 0 2006.229.16:50:41.51#ibcon#flushed, iclass 17, count 0 2006.229.16:50:41.51#ibcon#about to write, iclass 17, count 0 2006.229.16:50:41.51#ibcon#wrote, iclass 17, count 0 2006.229.16:50:41.51#ibcon#about to read 3, iclass 17, count 0 2006.229.16:50:41.55#ibcon#read 3, iclass 17, count 0 2006.229.16:50:41.55#ibcon#about to read 4, iclass 17, count 0 2006.229.16:50:41.55#ibcon#read 4, iclass 17, count 0 2006.229.16:50:41.55#ibcon#about to read 5, iclass 17, count 0 2006.229.16:50:41.55#ibcon#read 5, iclass 17, count 0 2006.229.16:50:41.55#ibcon#about to read 6, iclass 17, count 0 2006.229.16:50:41.55#ibcon#read 6, iclass 17, count 0 2006.229.16:50:41.55#ibcon#end of sib2, iclass 17, count 0 2006.229.16:50:41.55#ibcon#*after write, iclass 17, count 0 2006.229.16:50:41.55#ibcon#*before return 0, iclass 17, count 0 2006.229.16:50:41.55#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:41.55#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.16:50:41.55#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.16:50:41.55#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.16:50:41.55$vck44/vb=3,4 2006.229.16:50:41.55#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.16:50:41.55#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.16:50:41.55#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:41.55#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:41.61#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:41.61#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:41.61#ibcon#enter wrdev, iclass 19, count 2 2006.229.16:50:41.61#ibcon#first serial, iclass 19, count 2 2006.229.16:50:41.61#ibcon#enter sib2, iclass 19, count 2 2006.229.16:50:41.61#ibcon#flushed, iclass 19, count 2 2006.229.16:50:41.61#ibcon#about to write, iclass 19, count 2 2006.229.16:50:41.61#ibcon#wrote, iclass 19, count 2 2006.229.16:50:41.61#ibcon#about to read 3, iclass 19, count 2 2006.229.16:50:41.63#ibcon#read 3, iclass 19, count 2 2006.229.16:50:41.63#ibcon#about to read 4, iclass 19, count 2 2006.229.16:50:41.63#ibcon#read 4, iclass 19, count 2 2006.229.16:50:41.63#ibcon#about to read 5, iclass 19, count 2 2006.229.16:50:41.63#ibcon#read 5, iclass 19, count 2 2006.229.16:50:41.63#ibcon#about to read 6, iclass 19, count 2 2006.229.16:50:41.63#ibcon#read 6, iclass 19, count 2 2006.229.16:50:41.63#ibcon#end of sib2, iclass 19, count 2 2006.229.16:50:41.63#ibcon#*mode == 0, iclass 19, count 2 2006.229.16:50:41.63#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.16:50:41.63#ibcon#[27=AT03-04\r\n] 2006.229.16:50:41.63#ibcon#*before write, iclass 19, count 2 2006.229.16:50:41.63#ibcon#enter sib2, iclass 19, count 2 2006.229.16:50:41.63#ibcon#flushed, iclass 19, count 2 2006.229.16:50:41.63#ibcon#about to write, iclass 19, count 2 2006.229.16:50:41.63#ibcon#wrote, iclass 19, count 2 2006.229.16:50:41.63#ibcon#about to read 3, iclass 19, count 2 2006.229.16:50:41.66#ibcon#read 3, iclass 19, count 2 2006.229.16:50:41.66#ibcon#about to read 4, iclass 19, count 2 2006.229.16:50:41.66#ibcon#read 4, iclass 19, count 2 2006.229.16:50:41.66#ibcon#about to read 5, iclass 19, count 2 2006.229.16:50:41.66#ibcon#read 5, iclass 19, count 2 2006.229.16:50:41.66#ibcon#about to read 6, iclass 19, count 2 2006.229.16:50:41.66#ibcon#read 6, iclass 19, count 2 2006.229.16:50:41.66#ibcon#end of sib2, iclass 19, count 2 2006.229.16:50:41.66#ibcon#*after write, iclass 19, count 2 2006.229.16:50:41.66#ibcon#*before return 0, iclass 19, count 2 2006.229.16:50:41.66#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:41.66#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.16:50:41.66#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.16:50:41.66#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:41.66#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:41.78#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:41.78#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:41.78#ibcon#enter wrdev, iclass 19, count 0 2006.229.16:50:41.78#ibcon#first serial, iclass 19, count 0 2006.229.16:50:41.78#ibcon#enter sib2, iclass 19, count 0 2006.229.16:50:41.78#ibcon#flushed, iclass 19, count 0 2006.229.16:50:41.78#ibcon#about to write, iclass 19, count 0 2006.229.16:50:41.78#ibcon#wrote, iclass 19, count 0 2006.229.16:50:41.78#ibcon#about to read 3, iclass 19, count 0 2006.229.16:50:41.80#ibcon#read 3, iclass 19, count 0 2006.229.16:50:41.80#ibcon#about to read 4, iclass 19, count 0 2006.229.16:50:41.80#ibcon#read 4, iclass 19, count 0 2006.229.16:50:41.80#ibcon#about to read 5, iclass 19, count 0 2006.229.16:50:41.80#ibcon#read 5, iclass 19, count 0 2006.229.16:50:41.80#ibcon#about to read 6, iclass 19, count 0 2006.229.16:50:41.80#ibcon#read 6, iclass 19, count 0 2006.229.16:50:41.80#ibcon#end of sib2, iclass 19, count 0 2006.229.16:50:41.80#ibcon#*mode == 0, iclass 19, count 0 2006.229.16:50:41.80#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.16:50:41.80#ibcon#[27=USB\r\n] 2006.229.16:50:41.80#ibcon#*before write, iclass 19, count 0 2006.229.16:50:41.80#ibcon#enter sib2, iclass 19, count 0 2006.229.16:50:41.80#ibcon#flushed, iclass 19, count 0 2006.229.16:50:41.80#ibcon#about to write, iclass 19, count 0 2006.229.16:50:41.80#ibcon#wrote, iclass 19, count 0 2006.229.16:50:41.80#ibcon#about to read 3, iclass 19, count 0 2006.229.16:50:41.83#ibcon#read 3, iclass 19, count 0 2006.229.16:50:41.83#ibcon#about to read 4, iclass 19, count 0 2006.229.16:50:41.83#ibcon#read 4, iclass 19, count 0 2006.229.16:50:41.83#ibcon#about to read 5, iclass 19, count 0 2006.229.16:50:41.83#ibcon#read 5, iclass 19, count 0 2006.229.16:50:41.83#ibcon#about to read 6, iclass 19, count 0 2006.229.16:50:41.83#ibcon#read 6, iclass 19, count 0 2006.229.16:50:41.83#ibcon#end of sib2, iclass 19, count 0 2006.229.16:50:41.83#ibcon#*after write, iclass 19, count 0 2006.229.16:50:41.83#ibcon#*before return 0, iclass 19, count 0 2006.229.16:50:41.83#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:41.83#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.16:50:41.83#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.16:50:41.83#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.16:50:41.83$vck44/vblo=4,679.99 2006.229.16:50:41.83#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.16:50:41.83#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.16:50:41.83#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:41.83#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:41.83#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:41.83#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:41.83#ibcon#enter wrdev, iclass 21, count 0 2006.229.16:50:41.83#ibcon#first serial, iclass 21, count 0 2006.229.16:50:41.83#ibcon#enter sib2, iclass 21, count 0 2006.229.16:50:41.83#ibcon#flushed, iclass 21, count 0 2006.229.16:50:41.83#ibcon#about to write, iclass 21, count 0 2006.229.16:50:41.83#ibcon#wrote, iclass 21, count 0 2006.229.16:50:41.83#ibcon#about to read 3, iclass 21, count 0 2006.229.16:50:41.85#ibcon#read 3, iclass 21, count 0 2006.229.16:50:41.85#ibcon#about to read 4, iclass 21, count 0 2006.229.16:50:41.85#ibcon#read 4, iclass 21, count 0 2006.229.16:50:41.85#ibcon#about to read 5, iclass 21, count 0 2006.229.16:50:41.85#ibcon#read 5, iclass 21, count 0 2006.229.16:50:41.85#ibcon#about to read 6, iclass 21, count 0 2006.229.16:50:41.85#ibcon#read 6, iclass 21, count 0 2006.229.16:50:41.85#ibcon#end of sib2, iclass 21, count 0 2006.229.16:50:41.85#ibcon#*mode == 0, iclass 21, count 0 2006.229.16:50:41.85#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.16:50:41.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:50:41.85#ibcon#*before write, iclass 21, count 0 2006.229.16:50:41.85#ibcon#enter sib2, iclass 21, count 0 2006.229.16:50:41.85#ibcon#flushed, iclass 21, count 0 2006.229.16:50:41.85#ibcon#about to write, iclass 21, count 0 2006.229.16:50:41.85#ibcon#wrote, iclass 21, count 0 2006.229.16:50:41.85#ibcon#about to read 3, iclass 21, count 0 2006.229.16:50:41.89#ibcon#read 3, iclass 21, count 0 2006.229.16:50:41.89#ibcon#about to read 4, iclass 21, count 0 2006.229.16:50:41.89#ibcon#read 4, iclass 21, count 0 2006.229.16:50:41.89#ibcon#about to read 5, iclass 21, count 0 2006.229.16:50:41.89#ibcon#read 5, iclass 21, count 0 2006.229.16:50:41.89#ibcon#about to read 6, iclass 21, count 0 2006.229.16:50:41.89#ibcon#read 6, iclass 21, count 0 2006.229.16:50:41.89#ibcon#end of sib2, iclass 21, count 0 2006.229.16:50:41.89#ibcon#*after write, iclass 21, count 0 2006.229.16:50:41.89#ibcon#*before return 0, iclass 21, count 0 2006.229.16:50:41.89#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:41.89#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.16:50:41.89#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.16:50:41.89#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.16:50:41.89$vck44/vb=4,4 2006.229.16:50:41.89#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.16:50:41.89#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.16:50:41.89#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:41.89#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:41.95#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:41.95#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:41.95#ibcon#enter wrdev, iclass 23, count 2 2006.229.16:50:41.95#ibcon#first serial, iclass 23, count 2 2006.229.16:50:41.95#ibcon#enter sib2, iclass 23, count 2 2006.229.16:50:41.95#ibcon#flushed, iclass 23, count 2 2006.229.16:50:41.95#ibcon#about to write, iclass 23, count 2 2006.229.16:50:41.95#ibcon#wrote, iclass 23, count 2 2006.229.16:50:41.95#ibcon#about to read 3, iclass 23, count 2 2006.229.16:50:41.97#ibcon#read 3, iclass 23, count 2 2006.229.16:50:41.97#ibcon#about to read 4, iclass 23, count 2 2006.229.16:50:41.97#ibcon#read 4, iclass 23, count 2 2006.229.16:50:41.97#ibcon#about to read 5, iclass 23, count 2 2006.229.16:50:41.97#ibcon#read 5, iclass 23, count 2 2006.229.16:50:41.97#ibcon#about to read 6, iclass 23, count 2 2006.229.16:50:41.97#ibcon#read 6, iclass 23, count 2 2006.229.16:50:41.97#ibcon#end of sib2, iclass 23, count 2 2006.229.16:50:41.97#ibcon#*mode == 0, iclass 23, count 2 2006.229.16:50:41.97#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.16:50:41.97#ibcon#[27=AT04-04\r\n] 2006.229.16:50:41.97#ibcon#*before write, iclass 23, count 2 2006.229.16:50:41.97#ibcon#enter sib2, iclass 23, count 2 2006.229.16:50:41.97#ibcon#flushed, iclass 23, count 2 2006.229.16:50:41.97#ibcon#about to write, iclass 23, count 2 2006.229.16:50:41.97#ibcon#wrote, iclass 23, count 2 2006.229.16:50:41.97#ibcon#about to read 3, iclass 23, count 2 2006.229.16:50:42.00#ibcon#read 3, iclass 23, count 2 2006.229.16:50:42.00#ibcon#about to read 4, iclass 23, count 2 2006.229.16:50:42.00#ibcon#read 4, iclass 23, count 2 2006.229.16:50:42.00#ibcon#about to read 5, iclass 23, count 2 2006.229.16:50:42.00#ibcon#read 5, iclass 23, count 2 2006.229.16:50:42.00#ibcon#about to read 6, iclass 23, count 2 2006.229.16:50:42.00#ibcon#read 6, iclass 23, count 2 2006.229.16:50:42.00#ibcon#end of sib2, iclass 23, count 2 2006.229.16:50:42.00#ibcon#*after write, iclass 23, count 2 2006.229.16:50:42.00#ibcon#*before return 0, iclass 23, count 2 2006.229.16:50:42.00#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:42.00#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.16:50:42.00#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.16:50:42.00#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:42.00#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:42.12#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:42.12#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:42.12#ibcon#enter wrdev, iclass 23, count 0 2006.229.16:50:42.12#ibcon#first serial, iclass 23, count 0 2006.229.16:50:42.12#ibcon#enter sib2, iclass 23, count 0 2006.229.16:50:42.12#ibcon#flushed, iclass 23, count 0 2006.229.16:50:42.12#ibcon#about to write, iclass 23, count 0 2006.229.16:50:42.12#ibcon#wrote, iclass 23, count 0 2006.229.16:50:42.12#ibcon#about to read 3, iclass 23, count 0 2006.229.16:50:42.14#ibcon#read 3, iclass 23, count 0 2006.229.16:50:42.14#ibcon#about to read 4, iclass 23, count 0 2006.229.16:50:42.14#ibcon#read 4, iclass 23, count 0 2006.229.16:50:42.14#ibcon#about to read 5, iclass 23, count 0 2006.229.16:50:42.14#ibcon#read 5, iclass 23, count 0 2006.229.16:50:42.14#ibcon#about to read 6, iclass 23, count 0 2006.229.16:50:42.14#ibcon#read 6, iclass 23, count 0 2006.229.16:50:42.14#ibcon#end of sib2, iclass 23, count 0 2006.229.16:50:42.14#ibcon#*mode == 0, iclass 23, count 0 2006.229.16:50:42.14#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.16:50:42.14#ibcon#[27=USB\r\n] 2006.229.16:50:42.14#ibcon#*before write, iclass 23, count 0 2006.229.16:50:42.14#ibcon#enter sib2, iclass 23, count 0 2006.229.16:50:42.14#ibcon#flushed, iclass 23, count 0 2006.229.16:50:42.14#ibcon#about to write, iclass 23, count 0 2006.229.16:50:42.14#ibcon#wrote, iclass 23, count 0 2006.229.16:50:42.14#ibcon#about to read 3, iclass 23, count 0 2006.229.16:50:42.17#ibcon#read 3, iclass 23, count 0 2006.229.16:50:42.17#ibcon#about to read 4, iclass 23, count 0 2006.229.16:50:42.17#ibcon#read 4, iclass 23, count 0 2006.229.16:50:42.17#ibcon#about to read 5, iclass 23, count 0 2006.229.16:50:42.17#ibcon#read 5, iclass 23, count 0 2006.229.16:50:42.17#ibcon#about to read 6, iclass 23, count 0 2006.229.16:50:42.17#ibcon#read 6, iclass 23, count 0 2006.229.16:50:42.17#ibcon#end of sib2, iclass 23, count 0 2006.229.16:50:42.17#ibcon#*after write, iclass 23, count 0 2006.229.16:50:42.17#ibcon#*before return 0, iclass 23, count 0 2006.229.16:50:42.17#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:42.17#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.16:50:42.17#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.16:50:42.17#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.16:50:42.17$vck44/vblo=5,709.99 2006.229.16:50:42.17#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.16:50:42.17#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.16:50:42.17#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:42.17#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:42.17#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:42.17#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:42.17#ibcon#enter wrdev, iclass 25, count 0 2006.229.16:50:42.17#ibcon#first serial, iclass 25, count 0 2006.229.16:50:42.17#ibcon#enter sib2, iclass 25, count 0 2006.229.16:50:42.17#ibcon#flushed, iclass 25, count 0 2006.229.16:50:42.17#ibcon#about to write, iclass 25, count 0 2006.229.16:50:42.17#ibcon#wrote, iclass 25, count 0 2006.229.16:50:42.17#ibcon#about to read 3, iclass 25, count 0 2006.229.16:50:42.19#ibcon#read 3, iclass 25, count 0 2006.229.16:50:42.19#ibcon#about to read 4, iclass 25, count 0 2006.229.16:50:42.19#ibcon#read 4, iclass 25, count 0 2006.229.16:50:42.19#ibcon#about to read 5, iclass 25, count 0 2006.229.16:50:42.19#ibcon#read 5, iclass 25, count 0 2006.229.16:50:42.19#ibcon#about to read 6, iclass 25, count 0 2006.229.16:50:42.19#ibcon#read 6, iclass 25, count 0 2006.229.16:50:42.19#ibcon#end of sib2, iclass 25, count 0 2006.229.16:50:42.19#ibcon#*mode == 0, iclass 25, count 0 2006.229.16:50:42.19#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.16:50:42.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:50:42.19#ibcon#*before write, iclass 25, count 0 2006.229.16:50:42.19#ibcon#enter sib2, iclass 25, count 0 2006.229.16:50:42.19#ibcon#flushed, iclass 25, count 0 2006.229.16:50:42.19#ibcon#about to write, iclass 25, count 0 2006.229.16:50:42.19#ibcon#wrote, iclass 25, count 0 2006.229.16:50:42.19#ibcon#about to read 3, iclass 25, count 0 2006.229.16:50:42.23#ibcon#read 3, iclass 25, count 0 2006.229.16:50:42.23#ibcon#about to read 4, iclass 25, count 0 2006.229.16:50:42.23#ibcon#read 4, iclass 25, count 0 2006.229.16:50:42.23#ibcon#about to read 5, iclass 25, count 0 2006.229.16:50:42.23#ibcon#read 5, iclass 25, count 0 2006.229.16:50:42.23#ibcon#about to read 6, iclass 25, count 0 2006.229.16:50:42.23#ibcon#read 6, iclass 25, count 0 2006.229.16:50:42.23#ibcon#end of sib2, iclass 25, count 0 2006.229.16:50:42.23#ibcon#*after write, iclass 25, count 0 2006.229.16:50:42.23#ibcon#*before return 0, iclass 25, count 0 2006.229.16:50:42.23#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:42.23#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.16:50:42.23#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.16:50:42.23#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.16:50:42.23$vck44/vb=5,4 2006.229.16:50:42.23#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.16:50:42.23#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.16:50:42.23#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:42.23#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:42.29#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:42.29#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:42.29#ibcon#enter wrdev, iclass 27, count 2 2006.229.16:50:42.29#ibcon#first serial, iclass 27, count 2 2006.229.16:50:42.29#ibcon#enter sib2, iclass 27, count 2 2006.229.16:50:42.29#ibcon#flushed, iclass 27, count 2 2006.229.16:50:42.29#ibcon#about to write, iclass 27, count 2 2006.229.16:50:42.29#ibcon#wrote, iclass 27, count 2 2006.229.16:50:42.29#ibcon#about to read 3, iclass 27, count 2 2006.229.16:50:42.31#ibcon#read 3, iclass 27, count 2 2006.229.16:50:42.31#ibcon#about to read 4, iclass 27, count 2 2006.229.16:50:42.31#ibcon#read 4, iclass 27, count 2 2006.229.16:50:42.31#ibcon#about to read 5, iclass 27, count 2 2006.229.16:50:42.31#ibcon#read 5, iclass 27, count 2 2006.229.16:50:42.31#ibcon#about to read 6, iclass 27, count 2 2006.229.16:50:42.31#ibcon#read 6, iclass 27, count 2 2006.229.16:50:42.31#ibcon#end of sib2, iclass 27, count 2 2006.229.16:50:42.31#ibcon#*mode == 0, iclass 27, count 2 2006.229.16:50:42.31#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.16:50:42.31#ibcon#[27=AT05-04\r\n] 2006.229.16:50:42.31#ibcon#*before write, iclass 27, count 2 2006.229.16:50:42.31#ibcon#enter sib2, iclass 27, count 2 2006.229.16:50:42.31#ibcon#flushed, iclass 27, count 2 2006.229.16:50:42.31#ibcon#about to write, iclass 27, count 2 2006.229.16:50:42.31#ibcon#wrote, iclass 27, count 2 2006.229.16:50:42.31#ibcon#about to read 3, iclass 27, count 2 2006.229.16:50:42.34#ibcon#read 3, iclass 27, count 2 2006.229.16:50:42.34#ibcon#about to read 4, iclass 27, count 2 2006.229.16:50:42.34#ibcon#read 4, iclass 27, count 2 2006.229.16:50:42.34#ibcon#about to read 5, iclass 27, count 2 2006.229.16:50:42.34#ibcon#read 5, iclass 27, count 2 2006.229.16:50:42.34#ibcon#about to read 6, iclass 27, count 2 2006.229.16:50:42.34#ibcon#read 6, iclass 27, count 2 2006.229.16:50:42.34#ibcon#end of sib2, iclass 27, count 2 2006.229.16:50:42.34#ibcon#*after write, iclass 27, count 2 2006.229.16:50:42.34#ibcon#*before return 0, iclass 27, count 2 2006.229.16:50:42.34#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:42.34#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.16:50:42.34#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.16:50:42.34#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:42.34#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:42.46#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:42.46#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:42.46#ibcon#enter wrdev, iclass 27, count 0 2006.229.16:50:42.46#ibcon#first serial, iclass 27, count 0 2006.229.16:50:42.46#ibcon#enter sib2, iclass 27, count 0 2006.229.16:50:42.46#ibcon#flushed, iclass 27, count 0 2006.229.16:50:42.46#ibcon#about to write, iclass 27, count 0 2006.229.16:50:42.46#ibcon#wrote, iclass 27, count 0 2006.229.16:50:42.46#ibcon#about to read 3, iclass 27, count 0 2006.229.16:50:42.48#ibcon#read 3, iclass 27, count 0 2006.229.16:50:42.48#ibcon#about to read 4, iclass 27, count 0 2006.229.16:50:42.48#ibcon#read 4, iclass 27, count 0 2006.229.16:50:42.48#ibcon#about to read 5, iclass 27, count 0 2006.229.16:50:42.48#ibcon#read 5, iclass 27, count 0 2006.229.16:50:42.48#ibcon#about to read 6, iclass 27, count 0 2006.229.16:50:42.48#ibcon#read 6, iclass 27, count 0 2006.229.16:50:42.48#ibcon#end of sib2, iclass 27, count 0 2006.229.16:50:42.48#ibcon#*mode == 0, iclass 27, count 0 2006.229.16:50:42.48#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.16:50:42.48#ibcon#[27=USB\r\n] 2006.229.16:50:42.48#ibcon#*before write, iclass 27, count 0 2006.229.16:50:42.48#ibcon#enter sib2, iclass 27, count 0 2006.229.16:50:42.48#ibcon#flushed, iclass 27, count 0 2006.229.16:50:42.48#ibcon#about to write, iclass 27, count 0 2006.229.16:50:42.48#ibcon#wrote, iclass 27, count 0 2006.229.16:50:42.48#ibcon#about to read 3, iclass 27, count 0 2006.229.16:50:42.51#ibcon#read 3, iclass 27, count 0 2006.229.16:50:42.51#ibcon#about to read 4, iclass 27, count 0 2006.229.16:50:42.51#ibcon#read 4, iclass 27, count 0 2006.229.16:50:42.51#ibcon#about to read 5, iclass 27, count 0 2006.229.16:50:42.51#ibcon#read 5, iclass 27, count 0 2006.229.16:50:42.51#ibcon#about to read 6, iclass 27, count 0 2006.229.16:50:42.51#ibcon#read 6, iclass 27, count 0 2006.229.16:50:42.51#ibcon#end of sib2, iclass 27, count 0 2006.229.16:50:42.51#ibcon#*after write, iclass 27, count 0 2006.229.16:50:42.51#ibcon#*before return 0, iclass 27, count 0 2006.229.16:50:42.51#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:42.51#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.16:50:42.51#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.16:50:42.51#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.16:50:42.51$vck44/vblo=6,719.99 2006.229.16:50:42.51#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.16:50:42.51#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.16:50:42.51#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:42.51#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:42.51#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:42.51#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:42.51#ibcon#enter wrdev, iclass 29, count 0 2006.229.16:50:42.51#ibcon#first serial, iclass 29, count 0 2006.229.16:50:42.51#ibcon#enter sib2, iclass 29, count 0 2006.229.16:50:42.51#ibcon#flushed, iclass 29, count 0 2006.229.16:50:42.51#ibcon#about to write, iclass 29, count 0 2006.229.16:50:42.51#ibcon#wrote, iclass 29, count 0 2006.229.16:50:42.51#ibcon#about to read 3, iclass 29, count 0 2006.229.16:50:42.53#ibcon#read 3, iclass 29, count 0 2006.229.16:50:42.53#ibcon#about to read 4, iclass 29, count 0 2006.229.16:50:42.53#ibcon#read 4, iclass 29, count 0 2006.229.16:50:42.53#ibcon#about to read 5, iclass 29, count 0 2006.229.16:50:42.53#ibcon#read 5, iclass 29, count 0 2006.229.16:50:42.53#ibcon#about to read 6, iclass 29, count 0 2006.229.16:50:42.53#ibcon#read 6, iclass 29, count 0 2006.229.16:50:42.53#ibcon#end of sib2, iclass 29, count 0 2006.229.16:50:42.53#ibcon#*mode == 0, iclass 29, count 0 2006.229.16:50:42.53#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.16:50:42.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:50:42.53#ibcon#*before write, iclass 29, count 0 2006.229.16:50:42.53#ibcon#enter sib2, iclass 29, count 0 2006.229.16:50:42.53#ibcon#flushed, iclass 29, count 0 2006.229.16:50:42.53#ibcon#about to write, iclass 29, count 0 2006.229.16:50:42.53#ibcon#wrote, iclass 29, count 0 2006.229.16:50:42.53#ibcon#about to read 3, iclass 29, count 0 2006.229.16:50:42.57#ibcon#read 3, iclass 29, count 0 2006.229.16:50:42.57#ibcon#about to read 4, iclass 29, count 0 2006.229.16:50:42.57#ibcon#read 4, iclass 29, count 0 2006.229.16:50:42.57#ibcon#about to read 5, iclass 29, count 0 2006.229.16:50:42.57#ibcon#read 5, iclass 29, count 0 2006.229.16:50:42.57#ibcon#about to read 6, iclass 29, count 0 2006.229.16:50:42.57#ibcon#read 6, iclass 29, count 0 2006.229.16:50:42.57#ibcon#end of sib2, iclass 29, count 0 2006.229.16:50:42.57#ibcon#*after write, iclass 29, count 0 2006.229.16:50:42.57#ibcon#*before return 0, iclass 29, count 0 2006.229.16:50:42.57#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:42.57#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.16:50:42.57#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.16:50:42.57#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.16:50:42.57$vck44/vb=6,4 2006.229.16:50:42.57#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.16:50:42.57#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.16:50:42.57#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:42.57#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:42.63#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:42.63#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:42.63#ibcon#enter wrdev, iclass 31, count 2 2006.229.16:50:42.63#ibcon#first serial, iclass 31, count 2 2006.229.16:50:42.63#ibcon#enter sib2, iclass 31, count 2 2006.229.16:50:42.63#ibcon#flushed, iclass 31, count 2 2006.229.16:50:42.63#ibcon#about to write, iclass 31, count 2 2006.229.16:50:42.63#ibcon#wrote, iclass 31, count 2 2006.229.16:50:42.63#ibcon#about to read 3, iclass 31, count 2 2006.229.16:50:42.65#ibcon#read 3, iclass 31, count 2 2006.229.16:50:42.65#ibcon#about to read 4, iclass 31, count 2 2006.229.16:50:42.65#ibcon#read 4, iclass 31, count 2 2006.229.16:50:42.65#ibcon#about to read 5, iclass 31, count 2 2006.229.16:50:42.65#ibcon#read 5, iclass 31, count 2 2006.229.16:50:42.65#ibcon#about to read 6, iclass 31, count 2 2006.229.16:50:42.65#ibcon#read 6, iclass 31, count 2 2006.229.16:50:42.65#ibcon#end of sib2, iclass 31, count 2 2006.229.16:50:42.65#ibcon#*mode == 0, iclass 31, count 2 2006.229.16:50:42.65#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.16:50:42.65#ibcon#[27=AT06-04\r\n] 2006.229.16:50:42.65#ibcon#*before write, iclass 31, count 2 2006.229.16:50:42.65#ibcon#enter sib2, iclass 31, count 2 2006.229.16:50:42.65#ibcon#flushed, iclass 31, count 2 2006.229.16:50:42.65#ibcon#about to write, iclass 31, count 2 2006.229.16:50:42.65#ibcon#wrote, iclass 31, count 2 2006.229.16:50:42.65#ibcon#about to read 3, iclass 31, count 2 2006.229.16:50:42.68#ibcon#read 3, iclass 31, count 2 2006.229.16:50:42.68#ibcon#about to read 4, iclass 31, count 2 2006.229.16:50:42.68#ibcon#read 4, iclass 31, count 2 2006.229.16:50:42.68#ibcon#about to read 5, iclass 31, count 2 2006.229.16:50:42.68#ibcon#read 5, iclass 31, count 2 2006.229.16:50:42.68#ibcon#about to read 6, iclass 31, count 2 2006.229.16:50:42.68#ibcon#read 6, iclass 31, count 2 2006.229.16:50:42.68#ibcon#end of sib2, iclass 31, count 2 2006.229.16:50:42.68#ibcon#*after write, iclass 31, count 2 2006.229.16:50:42.68#ibcon#*before return 0, iclass 31, count 2 2006.229.16:50:42.68#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:42.68#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.16:50:42.68#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.16:50:42.68#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:42.68#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:42.80#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:42.80#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:42.80#ibcon#enter wrdev, iclass 31, count 0 2006.229.16:50:42.80#ibcon#first serial, iclass 31, count 0 2006.229.16:50:42.80#ibcon#enter sib2, iclass 31, count 0 2006.229.16:50:42.80#ibcon#flushed, iclass 31, count 0 2006.229.16:50:42.80#ibcon#about to write, iclass 31, count 0 2006.229.16:50:42.80#ibcon#wrote, iclass 31, count 0 2006.229.16:50:42.80#ibcon#about to read 3, iclass 31, count 0 2006.229.16:50:42.82#ibcon#read 3, iclass 31, count 0 2006.229.16:50:42.82#ibcon#about to read 4, iclass 31, count 0 2006.229.16:50:42.82#ibcon#read 4, iclass 31, count 0 2006.229.16:50:42.82#ibcon#about to read 5, iclass 31, count 0 2006.229.16:50:42.82#ibcon#read 5, iclass 31, count 0 2006.229.16:50:42.82#ibcon#about to read 6, iclass 31, count 0 2006.229.16:50:42.82#ibcon#read 6, iclass 31, count 0 2006.229.16:50:42.82#ibcon#end of sib2, iclass 31, count 0 2006.229.16:50:42.82#ibcon#*mode == 0, iclass 31, count 0 2006.229.16:50:42.82#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.16:50:42.82#ibcon#[27=USB\r\n] 2006.229.16:50:42.82#ibcon#*before write, iclass 31, count 0 2006.229.16:50:42.82#ibcon#enter sib2, iclass 31, count 0 2006.229.16:50:42.82#ibcon#flushed, iclass 31, count 0 2006.229.16:50:42.82#ibcon#about to write, iclass 31, count 0 2006.229.16:50:42.82#ibcon#wrote, iclass 31, count 0 2006.229.16:50:42.82#ibcon#about to read 3, iclass 31, count 0 2006.229.16:50:42.85#ibcon#read 3, iclass 31, count 0 2006.229.16:50:42.85#ibcon#about to read 4, iclass 31, count 0 2006.229.16:50:42.85#ibcon#read 4, iclass 31, count 0 2006.229.16:50:42.85#ibcon#about to read 5, iclass 31, count 0 2006.229.16:50:42.85#ibcon#read 5, iclass 31, count 0 2006.229.16:50:42.85#ibcon#about to read 6, iclass 31, count 0 2006.229.16:50:42.85#ibcon#read 6, iclass 31, count 0 2006.229.16:50:42.85#ibcon#end of sib2, iclass 31, count 0 2006.229.16:50:42.85#ibcon#*after write, iclass 31, count 0 2006.229.16:50:42.85#ibcon#*before return 0, iclass 31, count 0 2006.229.16:50:42.85#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:42.85#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.16:50:42.85#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.16:50:42.85#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.16:50:42.85$vck44/vblo=7,734.99 2006.229.16:50:42.85#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.16:50:42.85#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.16:50:42.85#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:42.85#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:42.85#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:42.85#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:42.85#ibcon#enter wrdev, iclass 33, count 0 2006.229.16:50:42.85#ibcon#first serial, iclass 33, count 0 2006.229.16:50:42.85#ibcon#enter sib2, iclass 33, count 0 2006.229.16:50:42.85#ibcon#flushed, iclass 33, count 0 2006.229.16:50:42.85#ibcon#about to write, iclass 33, count 0 2006.229.16:50:42.85#ibcon#wrote, iclass 33, count 0 2006.229.16:50:42.85#ibcon#about to read 3, iclass 33, count 0 2006.229.16:50:42.87#ibcon#read 3, iclass 33, count 0 2006.229.16:50:42.87#ibcon#about to read 4, iclass 33, count 0 2006.229.16:50:42.87#ibcon#read 4, iclass 33, count 0 2006.229.16:50:42.87#ibcon#about to read 5, iclass 33, count 0 2006.229.16:50:42.87#ibcon#read 5, iclass 33, count 0 2006.229.16:50:42.87#ibcon#about to read 6, iclass 33, count 0 2006.229.16:50:42.87#ibcon#read 6, iclass 33, count 0 2006.229.16:50:42.87#ibcon#end of sib2, iclass 33, count 0 2006.229.16:50:42.87#ibcon#*mode == 0, iclass 33, count 0 2006.229.16:50:42.87#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.16:50:42.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:50:42.87#ibcon#*before write, iclass 33, count 0 2006.229.16:50:42.87#ibcon#enter sib2, iclass 33, count 0 2006.229.16:50:42.87#ibcon#flushed, iclass 33, count 0 2006.229.16:50:42.87#ibcon#about to write, iclass 33, count 0 2006.229.16:50:42.87#ibcon#wrote, iclass 33, count 0 2006.229.16:50:42.87#ibcon#about to read 3, iclass 33, count 0 2006.229.16:50:42.91#ibcon#read 3, iclass 33, count 0 2006.229.16:50:42.91#ibcon#about to read 4, iclass 33, count 0 2006.229.16:50:42.91#ibcon#read 4, iclass 33, count 0 2006.229.16:50:42.91#ibcon#about to read 5, iclass 33, count 0 2006.229.16:50:42.91#ibcon#read 5, iclass 33, count 0 2006.229.16:50:42.91#ibcon#about to read 6, iclass 33, count 0 2006.229.16:50:42.91#ibcon#read 6, iclass 33, count 0 2006.229.16:50:42.91#ibcon#end of sib2, iclass 33, count 0 2006.229.16:50:42.91#ibcon#*after write, iclass 33, count 0 2006.229.16:50:42.91#ibcon#*before return 0, iclass 33, count 0 2006.229.16:50:42.91#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:42.91#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.16:50:42.91#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.16:50:42.91#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.16:50:42.91$vck44/vb=7,4 2006.229.16:50:42.91#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.16:50:42.91#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.16:50:42.91#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:42.91#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:42.97#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:42.97#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:42.97#ibcon#enter wrdev, iclass 35, count 2 2006.229.16:50:42.97#ibcon#first serial, iclass 35, count 2 2006.229.16:50:42.97#ibcon#enter sib2, iclass 35, count 2 2006.229.16:50:42.97#ibcon#flushed, iclass 35, count 2 2006.229.16:50:42.97#ibcon#about to write, iclass 35, count 2 2006.229.16:50:42.97#ibcon#wrote, iclass 35, count 2 2006.229.16:50:42.97#ibcon#about to read 3, iclass 35, count 2 2006.229.16:50:42.99#ibcon#read 3, iclass 35, count 2 2006.229.16:50:42.99#ibcon#about to read 4, iclass 35, count 2 2006.229.16:50:42.99#ibcon#read 4, iclass 35, count 2 2006.229.16:50:42.99#ibcon#about to read 5, iclass 35, count 2 2006.229.16:50:42.99#ibcon#read 5, iclass 35, count 2 2006.229.16:50:42.99#ibcon#about to read 6, iclass 35, count 2 2006.229.16:50:42.99#ibcon#read 6, iclass 35, count 2 2006.229.16:50:42.99#ibcon#end of sib2, iclass 35, count 2 2006.229.16:50:42.99#ibcon#*mode == 0, iclass 35, count 2 2006.229.16:50:42.99#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.16:50:42.99#ibcon#[27=AT07-04\r\n] 2006.229.16:50:42.99#ibcon#*before write, iclass 35, count 2 2006.229.16:50:42.99#ibcon#enter sib2, iclass 35, count 2 2006.229.16:50:42.99#ibcon#flushed, iclass 35, count 2 2006.229.16:50:42.99#ibcon#about to write, iclass 35, count 2 2006.229.16:50:42.99#ibcon#wrote, iclass 35, count 2 2006.229.16:50:42.99#ibcon#about to read 3, iclass 35, count 2 2006.229.16:50:43.02#ibcon#read 3, iclass 35, count 2 2006.229.16:50:43.02#ibcon#about to read 4, iclass 35, count 2 2006.229.16:50:43.02#ibcon#read 4, iclass 35, count 2 2006.229.16:50:43.02#ibcon#about to read 5, iclass 35, count 2 2006.229.16:50:43.02#ibcon#read 5, iclass 35, count 2 2006.229.16:50:43.02#ibcon#about to read 6, iclass 35, count 2 2006.229.16:50:43.02#ibcon#read 6, iclass 35, count 2 2006.229.16:50:43.02#ibcon#end of sib2, iclass 35, count 2 2006.229.16:50:43.02#ibcon#*after write, iclass 35, count 2 2006.229.16:50:43.02#ibcon#*before return 0, iclass 35, count 2 2006.229.16:50:43.02#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:43.02#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.16:50:43.02#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.16:50:43.02#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:43.02#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:43.14#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:43.14#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:43.14#ibcon#enter wrdev, iclass 35, count 0 2006.229.16:50:43.14#ibcon#first serial, iclass 35, count 0 2006.229.16:50:43.14#ibcon#enter sib2, iclass 35, count 0 2006.229.16:50:43.14#ibcon#flushed, iclass 35, count 0 2006.229.16:50:43.14#ibcon#about to write, iclass 35, count 0 2006.229.16:50:43.14#ibcon#wrote, iclass 35, count 0 2006.229.16:50:43.14#ibcon#about to read 3, iclass 35, count 0 2006.229.16:50:43.16#ibcon#read 3, iclass 35, count 0 2006.229.16:50:43.16#ibcon#about to read 4, iclass 35, count 0 2006.229.16:50:43.16#ibcon#read 4, iclass 35, count 0 2006.229.16:50:43.16#ibcon#about to read 5, iclass 35, count 0 2006.229.16:50:43.16#ibcon#read 5, iclass 35, count 0 2006.229.16:50:43.16#ibcon#about to read 6, iclass 35, count 0 2006.229.16:50:43.16#ibcon#read 6, iclass 35, count 0 2006.229.16:50:43.16#ibcon#end of sib2, iclass 35, count 0 2006.229.16:50:43.16#ibcon#*mode == 0, iclass 35, count 0 2006.229.16:50:43.16#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.16:50:43.16#ibcon#[27=USB\r\n] 2006.229.16:50:43.16#ibcon#*before write, iclass 35, count 0 2006.229.16:50:43.16#ibcon#enter sib2, iclass 35, count 0 2006.229.16:50:43.16#ibcon#flushed, iclass 35, count 0 2006.229.16:50:43.16#ibcon#about to write, iclass 35, count 0 2006.229.16:50:43.16#ibcon#wrote, iclass 35, count 0 2006.229.16:50:43.16#ibcon#about to read 3, iclass 35, count 0 2006.229.16:50:43.19#ibcon#read 3, iclass 35, count 0 2006.229.16:50:43.19#ibcon#about to read 4, iclass 35, count 0 2006.229.16:50:43.19#ibcon#read 4, iclass 35, count 0 2006.229.16:50:43.19#ibcon#about to read 5, iclass 35, count 0 2006.229.16:50:43.19#ibcon#read 5, iclass 35, count 0 2006.229.16:50:43.19#ibcon#about to read 6, iclass 35, count 0 2006.229.16:50:43.19#ibcon#read 6, iclass 35, count 0 2006.229.16:50:43.19#ibcon#end of sib2, iclass 35, count 0 2006.229.16:50:43.19#ibcon#*after write, iclass 35, count 0 2006.229.16:50:43.19#ibcon#*before return 0, iclass 35, count 0 2006.229.16:50:43.19#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:43.19#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.16:50:43.19#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.16:50:43.19#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.16:50:43.19$vck44/vblo=8,744.99 2006.229.16:50:43.19#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.16:50:43.19#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.16:50:43.19#ibcon#ireg 17 cls_cnt 0 2006.229.16:50:43.19#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:43.19#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:43.19#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:43.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.16:50:43.19#ibcon#first serial, iclass 37, count 0 2006.229.16:50:43.19#ibcon#enter sib2, iclass 37, count 0 2006.229.16:50:43.19#ibcon#flushed, iclass 37, count 0 2006.229.16:50:43.19#ibcon#about to write, iclass 37, count 0 2006.229.16:50:43.19#ibcon#wrote, iclass 37, count 0 2006.229.16:50:43.19#ibcon#about to read 3, iclass 37, count 0 2006.229.16:50:43.21#ibcon#read 3, iclass 37, count 0 2006.229.16:50:43.21#ibcon#about to read 4, iclass 37, count 0 2006.229.16:50:43.21#ibcon#read 4, iclass 37, count 0 2006.229.16:50:43.21#ibcon#about to read 5, iclass 37, count 0 2006.229.16:50:43.21#ibcon#read 5, iclass 37, count 0 2006.229.16:50:43.21#ibcon#about to read 6, iclass 37, count 0 2006.229.16:50:43.21#ibcon#read 6, iclass 37, count 0 2006.229.16:50:43.21#ibcon#end of sib2, iclass 37, count 0 2006.229.16:50:43.21#ibcon#*mode == 0, iclass 37, count 0 2006.229.16:50:43.21#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.16:50:43.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:50:43.21#ibcon#*before write, iclass 37, count 0 2006.229.16:50:43.21#ibcon#enter sib2, iclass 37, count 0 2006.229.16:50:43.21#ibcon#flushed, iclass 37, count 0 2006.229.16:50:43.21#ibcon#about to write, iclass 37, count 0 2006.229.16:50:43.21#ibcon#wrote, iclass 37, count 0 2006.229.16:50:43.21#ibcon#about to read 3, iclass 37, count 0 2006.229.16:50:43.25#ibcon#read 3, iclass 37, count 0 2006.229.16:50:43.25#ibcon#about to read 4, iclass 37, count 0 2006.229.16:50:43.25#ibcon#read 4, iclass 37, count 0 2006.229.16:50:43.25#ibcon#about to read 5, iclass 37, count 0 2006.229.16:50:43.25#ibcon#read 5, iclass 37, count 0 2006.229.16:50:43.25#ibcon#about to read 6, iclass 37, count 0 2006.229.16:50:43.25#ibcon#read 6, iclass 37, count 0 2006.229.16:50:43.25#ibcon#end of sib2, iclass 37, count 0 2006.229.16:50:43.25#ibcon#*after write, iclass 37, count 0 2006.229.16:50:43.25#ibcon#*before return 0, iclass 37, count 0 2006.229.16:50:43.25#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:43.25#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.16:50:43.25#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.16:50:43.25#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.16:50:43.25$vck44/vb=8,4 2006.229.16:50:43.25#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.16:50:43.25#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.16:50:43.25#ibcon#ireg 11 cls_cnt 2 2006.229.16:50:43.25#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:43.31#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:43.31#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:43.31#ibcon#enter wrdev, iclass 39, count 2 2006.229.16:50:43.31#ibcon#first serial, iclass 39, count 2 2006.229.16:50:43.31#ibcon#enter sib2, iclass 39, count 2 2006.229.16:50:43.31#ibcon#flushed, iclass 39, count 2 2006.229.16:50:43.31#ibcon#about to write, iclass 39, count 2 2006.229.16:50:43.31#ibcon#wrote, iclass 39, count 2 2006.229.16:50:43.31#ibcon#about to read 3, iclass 39, count 2 2006.229.16:50:43.33#ibcon#read 3, iclass 39, count 2 2006.229.16:50:43.33#ibcon#about to read 4, iclass 39, count 2 2006.229.16:50:43.33#ibcon#read 4, iclass 39, count 2 2006.229.16:50:43.33#ibcon#about to read 5, iclass 39, count 2 2006.229.16:50:43.33#ibcon#read 5, iclass 39, count 2 2006.229.16:50:43.33#ibcon#about to read 6, iclass 39, count 2 2006.229.16:50:43.33#ibcon#read 6, iclass 39, count 2 2006.229.16:50:43.33#ibcon#end of sib2, iclass 39, count 2 2006.229.16:50:43.33#ibcon#*mode == 0, iclass 39, count 2 2006.229.16:50:43.33#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.16:50:43.33#ibcon#[27=AT08-04\r\n] 2006.229.16:50:43.33#ibcon#*before write, iclass 39, count 2 2006.229.16:50:43.33#ibcon#enter sib2, iclass 39, count 2 2006.229.16:50:43.33#ibcon#flushed, iclass 39, count 2 2006.229.16:50:43.33#ibcon#about to write, iclass 39, count 2 2006.229.16:50:43.33#ibcon#wrote, iclass 39, count 2 2006.229.16:50:43.33#ibcon#about to read 3, iclass 39, count 2 2006.229.16:50:43.36#ibcon#read 3, iclass 39, count 2 2006.229.16:50:43.36#ibcon#about to read 4, iclass 39, count 2 2006.229.16:50:43.36#ibcon#read 4, iclass 39, count 2 2006.229.16:50:43.36#ibcon#about to read 5, iclass 39, count 2 2006.229.16:50:43.36#ibcon#read 5, iclass 39, count 2 2006.229.16:50:43.36#ibcon#about to read 6, iclass 39, count 2 2006.229.16:50:43.36#ibcon#read 6, iclass 39, count 2 2006.229.16:50:43.36#ibcon#end of sib2, iclass 39, count 2 2006.229.16:50:43.36#ibcon#*after write, iclass 39, count 2 2006.229.16:50:43.36#ibcon#*before return 0, iclass 39, count 2 2006.229.16:50:43.36#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:43.36#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.16:50:43.36#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.16:50:43.36#ibcon#ireg 7 cls_cnt 0 2006.229.16:50:43.36#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:43.48#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:43.48#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:43.48#ibcon#enter wrdev, iclass 39, count 0 2006.229.16:50:43.48#ibcon#first serial, iclass 39, count 0 2006.229.16:50:43.48#ibcon#enter sib2, iclass 39, count 0 2006.229.16:50:43.48#ibcon#flushed, iclass 39, count 0 2006.229.16:50:43.48#ibcon#about to write, iclass 39, count 0 2006.229.16:50:43.48#ibcon#wrote, iclass 39, count 0 2006.229.16:50:43.48#ibcon#about to read 3, iclass 39, count 0 2006.229.16:50:43.50#ibcon#read 3, iclass 39, count 0 2006.229.16:50:43.50#ibcon#about to read 4, iclass 39, count 0 2006.229.16:50:43.50#ibcon#read 4, iclass 39, count 0 2006.229.16:50:43.50#ibcon#about to read 5, iclass 39, count 0 2006.229.16:50:43.50#ibcon#read 5, iclass 39, count 0 2006.229.16:50:43.50#ibcon#about to read 6, iclass 39, count 0 2006.229.16:50:43.50#ibcon#read 6, iclass 39, count 0 2006.229.16:50:43.50#ibcon#end of sib2, iclass 39, count 0 2006.229.16:50:43.50#ibcon#*mode == 0, iclass 39, count 0 2006.229.16:50:43.50#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.16:50:43.50#ibcon#[27=USB\r\n] 2006.229.16:50:43.50#ibcon#*before write, iclass 39, count 0 2006.229.16:50:43.50#ibcon#enter sib2, iclass 39, count 0 2006.229.16:50:43.50#ibcon#flushed, iclass 39, count 0 2006.229.16:50:43.50#ibcon#about to write, iclass 39, count 0 2006.229.16:50:43.50#ibcon#wrote, iclass 39, count 0 2006.229.16:50:43.50#ibcon#about to read 3, iclass 39, count 0 2006.229.16:50:43.53#ibcon#read 3, iclass 39, count 0 2006.229.16:50:43.53#ibcon#about to read 4, iclass 39, count 0 2006.229.16:50:43.53#ibcon#read 4, iclass 39, count 0 2006.229.16:50:43.53#ibcon#about to read 5, iclass 39, count 0 2006.229.16:50:43.53#ibcon#read 5, iclass 39, count 0 2006.229.16:50:43.53#ibcon#about to read 6, iclass 39, count 0 2006.229.16:50:43.53#ibcon#read 6, iclass 39, count 0 2006.229.16:50:43.53#ibcon#end of sib2, iclass 39, count 0 2006.229.16:50:43.53#ibcon#*after write, iclass 39, count 0 2006.229.16:50:43.53#ibcon#*before return 0, iclass 39, count 0 2006.229.16:50:43.53#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:43.53#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.16:50:43.53#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.16:50:43.53#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.16:50:43.53$vck44/vabw=wide 2006.229.16:50:43.53#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.16:50:43.53#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.16:50:43.53#ibcon#ireg 8 cls_cnt 0 2006.229.16:50:43.53#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:43.53#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:43.53#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:43.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.16:50:43.53#ibcon#first serial, iclass 3, count 0 2006.229.16:50:43.53#ibcon#enter sib2, iclass 3, count 0 2006.229.16:50:43.53#ibcon#flushed, iclass 3, count 0 2006.229.16:50:43.53#ibcon#about to write, iclass 3, count 0 2006.229.16:50:43.53#ibcon#wrote, iclass 3, count 0 2006.229.16:50:43.53#ibcon#about to read 3, iclass 3, count 0 2006.229.16:50:43.55#ibcon#read 3, iclass 3, count 0 2006.229.16:50:43.55#ibcon#about to read 4, iclass 3, count 0 2006.229.16:50:43.55#ibcon#read 4, iclass 3, count 0 2006.229.16:50:43.55#ibcon#about to read 5, iclass 3, count 0 2006.229.16:50:43.55#ibcon#read 5, iclass 3, count 0 2006.229.16:50:43.55#ibcon#about to read 6, iclass 3, count 0 2006.229.16:50:43.55#ibcon#read 6, iclass 3, count 0 2006.229.16:50:43.55#ibcon#end of sib2, iclass 3, count 0 2006.229.16:50:43.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.16:50:43.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.16:50:43.55#ibcon#[25=BW32\r\n] 2006.229.16:50:43.55#ibcon#*before write, iclass 3, count 0 2006.229.16:50:43.55#ibcon#enter sib2, iclass 3, count 0 2006.229.16:50:43.55#ibcon#flushed, iclass 3, count 0 2006.229.16:50:43.55#ibcon#about to write, iclass 3, count 0 2006.229.16:50:43.55#ibcon#wrote, iclass 3, count 0 2006.229.16:50:43.55#ibcon#about to read 3, iclass 3, count 0 2006.229.16:50:43.58#ibcon#read 3, iclass 3, count 0 2006.229.16:50:43.58#ibcon#about to read 4, iclass 3, count 0 2006.229.16:50:43.58#ibcon#read 4, iclass 3, count 0 2006.229.16:50:43.58#ibcon#about to read 5, iclass 3, count 0 2006.229.16:50:43.58#ibcon#read 5, iclass 3, count 0 2006.229.16:50:43.58#ibcon#about to read 6, iclass 3, count 0 2006.229.16:50:43.58#ibcon#read 6, iclass 3, count 0 2006.229.16:50:43.58#ibcon#end of sib2, iclass 3, count 0 2006.229.16:50:43.58#ibcon#*after write, iclass 3, count 0 2006.229.16:50:43.58#ibcon#*before return 0, iclass 3, count 0 2006.229.16:50:43.58#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:43.58#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.16:50:43.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.16:50:43.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.16:50:43.58$vck44/vbbw=wide 2006.229.16:50:43.58#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.16:50:43.58#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.16:50:43.58#ibcon#ireg 8 cls_cnt 0 2006.229.16:50:43.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:50:43.65#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:50:43.65#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:50:43.65#ibcon#enter wrdev, iclass 5, count 0 2006.229.16:50:43.65#ibcon#first serial, iclass 5, count 0 2006.229.16:50:43.65#ibcon#enter sib2, iclass 5, count 0 2006.229.16:50:43.65#ibcon#flushed, iclass 5, count 0 2006.229.16:50:43.65#ibcon#about to write, iclass 5, count 0 2006.229.16:50:43.65#ibcon#wrote, iclass 5, count 0 2006.229.16:50:43.65#ibcon#about to read 3, iclass 5, count 0 2006.229.16:50:43.67#ibcon#read 3, iclass 5, count 0 2006.229.16:50:43.67#ibcon#about to read 4, iclass 5, count 0 2006.229.16:50:43.67#ibcon#read 4, iclass 5, count 0 2006.229.16:50:43.67#ibcon#about to read 5, iclass 5, count 0 2006.229.16:50:43.67#ibcon#read 5, iclass 5, count 0 2006.229.16:50:43.67#ibcon#about to read 6, iclass 5, count 0 2006.229.16:50:43.67#ibcon#read 6, iclass 5, count 0 2006.229.16:50:43.67#ibcon#end of sib2, iclass 5, count 0 2006.229.16:50:43.67#ibcon#*mode == 0, iclass 5, count 0 2006.229.16:50:43.67#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.16:50:43.67#ibcon#[27=BW32\r\n] 2006.229.16:50:43.67#ibcon#*before write, iclass 5, count 0 2006.229.16:50:43.67#ibcon#enter sib2, iclass 5, count 0 2006.229.16:50:43.67#ibcon#flushed, iclass 5, count 0 2006.229.16:50:43.67#ibcon#about to write, iclass 5, count 0 2006.229.16:50:43.67#ibcon#wrote, iclass 5, count 0 2006.229.16:50:43.67#ibcon#about to read 3, iclass 5, count 0 2006.229.16:50:43.70#ibcon#read 3, iclass 5, count 0 2006.229.16:50:43.70#ibcon#about to read 4, iclass 5, count 0 2006.229.16:50:43.70#ibcon#read 4, iclass 5, count 0 2006.229.16:50:43.70#ibcon#about to read 5, iclass 5, count 0 2006.229.16:50:43.70#ibcon#read 5, iclass 5, count 0 2006.229.16:50:43.70#ibcon#about to read 6, iclass 5, count 0 2006.229.16:50:43.70#ibcon#read 6, iclass 5, count 0 2006.229.16:50:43.70#ibcon#end of sib2, iclass 5, count 0 2006.229.16:50:43.70#ibcon#*after write, iclass 5, count 0 2006.229.16:50:43.70#ibcon#*before return 0, iclass 5, count 0 2006.229.16:50:43.70#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:50:43.70#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.16:50:43.70#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.16:50:43.70#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.16:50:43.70$setupk4/ifdk4 2006.229.16:50:43.70$ifdk4/lo= 2006.229.16:50:43.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:50:43.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:50:43.70$ifdk4/patch= 2006.229.16:50:43.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:50:43.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:50:43.70$setupk4/!*+20s 2006.229.16:50:45.31#abcon#<5=/05 1.1 1.9 27.061001001.7\r\n> 2006.229.16:50:45.33#abcon#{5=INTERFACE CLEAR} 2006.229.16:50:45.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:50:55.48#abcon#<5=/05 1.1 1.9 27.061001001.7\r\n> 2006.229.16:50:55.50#abcon#{5=INTERFACE CLEAR} 2006.229.16:50:55.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:50:58.20$setupk4/"tpicd 2006.229.16:50:58.20$setupk4/echo=off 2006.229.16:50:58.20$setupk4/xlog=off 2006.229.16:50:58.20:!2006.229.16:51:50 2006.229.16:51:30.13#trakl#Source acquired 2006.229.16:51:30.13#flagr#flagr/antenna,acquired 2006.229.16:51:50.00:preob 2006.229.16:51:50.14/onsource/TRACKING 2006.229.16:51:50.14:!2006.229.16:52:00 2006.229.16:52:00.00:"tape 2006.229.16:52:00.00:"st=record 2006.229.16:52:00.00:data_valid=on 2006.229.16:52:00.00:midob 2006.229.16:52:00.14/onsource/TRACKING 2006.229.16:52:00.14/wx/27.05,1001.8,100 2006.229.16:52:00.21/cable/+6.4165E-03 2006.229.16:52:01.30/va/01,08,usb,yes,34,37 2006.229.16:52:01.30/va/02,07,usb,yes,37,38 2006.229.16:52:01.30/va/03,06,usb,yes,46,48 2006.229.16:52:01.30/va/04,07,usb,yes,38,40 2006.229.16:52:01.30/va/05,04,usb,yes,34,35 2006.229.16:52:01.30/va/06,04,usb,yes,38,38 2006.229.16:52:01.30/va/07,05,usb,yes,34,35 2006.229.16:52:01.30/va/08,06,usb,yes,25,30 2006.229.16:52:01.53/valo/01,524.99,yes,locked 2006.229.16:52:01.53/valo/02,534.99,yes,locked 2006.229.16:52:01.53/valo/03,564.99,yes,locked 2006.229.16:52:01.53/valo/04,624.99,yes,locked 2006.229.16:52:01.53/valo/05,734.99,yes,locked 2006.229.16:52:01.53/valo/06,814.99,yes,locked 2006.229.16:52:01.53/valo/07,864.99,yes,locked 2006.229.16:52:01.53/valo/08,884.99,yes,locked 2006.229.16:52:02.62/vb/01,04,usb,yes,33,31 2006.229.16:52:02.62/vb/02,04,usb,yes,36,36 2006.229.16:52:02.62/vb/03,04,usb,yes,33,36 2006.229.16:52:02.62/vb/04,04,usb,yes,37,36 2006.229.16:52:02.62/vb/05,04,usb,yes,29,32 2006.229.16:52:02.62/vb/06,04,usb,yes,34,30 2006.229.16:52:02.62/vb/07,04,usb,yes,34,34 2006.229.16:52:02.62/vb/08,04,usb,yes,31,35 2006.229.16:52:02.85/vblo/01,629.99,yes,locked 2006.229.16:52:02.85/vblo/02,634.99,yes,locked 2006.229.16:52:02.85/vblo/03,649.99,yes,locked 2006.229.16:52:02.85/vblo/04,679.99,yes,locked 2006.229.16:52:02.85/vblo/05,709.99,yes,locked 2006.229.16:52:02.85/vblo/06,719.99,yes,locked 2006.229.16:52:02.85/vblo/07,734.99,yes,locked 2006.229.16:52:02.85/vblo/08,744.99,yes,locked 2006.229.16:52:03.00/vabw/8 2006.229.16:52:03.15/vbbw/8 2006.229.16:52:03.24/xfe/off,on,12.2 2006.229.16:52:03.61/ifatt/23,28,28,28 2006.229.16:52:04.07/fmout-gps/S +4.49E-07 2006.229.16:52:04.11:!2006.229.16:52:40 2006.229.16:52:40.00:data_valid=off 2006.229.16:52:40.00:"et 2006.229.16:52:40.00:!+3s 2006.229.16:52:43.01:"tape 2006.229.16:52:43.01:postob 2006.229.16:52:43.10/cable/+6.4144E-03 2006.229.16:52:43.10/wx/27.05,1001.8,100 2006.229.16:52:44.07/fmout-gps/S +4.49E-07 2006.229.16:52:44.07:scan_name=229-1658,jd0608,70 2006.229.16:52:44.07:source=2121+053,212344.52,053522.1,2000.0,cw 2006.229.16:52:45.14#flagr#flagr/antenna,new-source 2006.229.16:52:45.14:checkk5 2006.229.16:52:45.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.16:52:45.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.16:52:46.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.16:52:46.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.16:52:47.14/chk_obsdata//k5ts1/T2291652??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.16:52:47.54/chk_obsdata//k5ts2/T2291652??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.16:52:47.93/chk_obsdata//k5ts3/T2291652??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.16:52:48.32/chk_obsdata//k5ts4/T2291652??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.16:52:49.06/k5log//k5ts1_log_newline 2006.229.16:52:49.78/k5log//k5ts2_log_newline 2006.229.16:52:50.49/k5log//k5ts3_log_newline 2006.229.16:52:51.21/k5log//k5ts4_log_newline 2006.229.16:52:51.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.16:52:51.24:setupk4=1 2006.229.16:52:51.24$setupk4/echo=on 2006.229.16:52:51.24$setupk4/pcalon 2006.229.16:52:51.24$pcalon/"no phase cal control is implemented here 2006.229.16:52:51.24$setupk4/"tpicd=stop 2006.229.16:52:51.24$setupk4/"rec=synch_on 2006.229.16:52:51.24$setupk4/"rec_mode=128 2006.229.16:52:51.24$setupk4/!* 2006.229.16:52:51.24$setupk4/recpk4 2006.229.16:52:51.24$recpk4/recpatch= 2006.229.16:52:51.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.16:52:51.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.16:52:51.24$setupk4/vck44 2006.229.16:52:51.24$vck44/valo=1,524.99 2006.229.16:52:51.24#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.16:52:51.24#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.16:52:51.24#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:51.24#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:51.24#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:51.24#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:51.24#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:52:51.24#ibcon#first serial, iclass 28, count 0 2006.229.16:52:51.24#ibcon#enter sib2, iclass 28, count 0 2006.229.16:52:51.24#ibcon#flushed, iclass 28, count 0 2006.229.16:52:51.24#ibcon#about to write, iclass 28, count 0 2006.229.16:52:51.24#ibcon#wrote, iclass 28, count 0 2006.229.16:52:51.24#ibcon#about to read 3, iclass 28, count 0 2006.229.16:52:51.26#ibcon#read 3, iclass 28, count 0 2006.229.16:52:51.26#ibcon#about to read 4, iclass 28, count 0 2006.229.16:52:51.26#ibcon#read 4, iclass 28, count 0 2006.229.16:52:51.26#ibcon#about to read 5, iclass 28, count 0 2006.229.16:52:51.26#ibcon#read 5, iclass 28, count 0 2006.229.16:52:51.26#ibcon#about to read 6, iclass 28, count 0 2006.229.16:52:51.26#ibcon#read 6, iclass 28, count 0 2006.229.16:52:51.26#ibcon#end of sib2, iclass 28, count 0 2006.229.16:52:51.26#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:52:51.26#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:52:51.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.16:52:51.26#ibcon#*before write, iclass 28, count 0 2006.229.16:52:51.26#ibcon#enter sib2, iclass 28, count 0 2006.229.16:52:51.26#ibcon#flushed, iclass 28, count 0 2006.229.16:52:51.26#ibcon#about to write, iclass 28, count 0 2006.229.16:52:51.26#ibcon#wrote, iclass 28, count 0 2006.229.16:52:51.26#ibcon#about to read 3, iclass 28, count 0 2006.229.16:52:51.31#ibcon#read 3, iclass 28, count 0 2006.229.16:52:51.31#ibcon#about to read 4, iclass 28, count 0 2006.229.16:52:51.31#ibcon#read 4, iclass 28, count 0 2006.229.16:52:51.31#ibcon#about to read 5, iclass 28, count 0 2006.229.16:52:51.31#ibcon#read 5, iclass 28, count 0 2006.229.16:52:51.31#ibcon#about to read 6, iclass 28, count 0 2006.229.16:52:51.31#ibcon#read 6, iclass 28, count 0 2006.229.16:52:51.31#ibcon#end of sib2, iclass 28, count 0 2006.229.16:52:51.31#ibcon#*after write, iclass 28, count 0 2006.229.16:52:51.31#ibcon#*before return 0, iclass 28, count 0 2006.229.16:52:51.31#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:51.31#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:51.31#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:52:51.31#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:52:51.31$vck44/va=1,8 2006.229.16:52:51.31#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.16:52:51.31#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.16:52:51.31#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:51.31#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:51.31#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:51.31#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:51.31#ibcon#enter wrdev, iclass 30, count 2 2006.229.16:52:51.31#ibcon#first serial, iclass 30, count 2 2006.229.16:52:51.31#ibcon#enter sib2, iclass 30, count 2 2006.229.16:52:51.31#ibcon#flushed, iclass 30, count 2 2006.229.16:52:51.31#ibcon#about to write, iclass 30, count 2 2006.229.16:52:51.31#ibcon#wrote, iclass 30, count 2 2006.229.16:52:51.31#ibcon#about to read 3, iclass 30, count 2 2006.229.16:52:51.33#ibcon#read 3, iclass 30, count 2 2006.229.16:52:51.33#ibcon#about to read 4, iclass 30, count 2 2006.229.16:52:51.33#ibcon#read 4, iclass 30, count 2 2006.229.16:52:51.33#ibcon#about to read 5, iclass 30, count 2 2006.229.16:52:51.33#ibcon#read 5, iclass 30, count 2 2006.229.16:52:51.33#ibcon#about to read 6, iclass 30, count 2 2006.229.16:52:51.33#ibcon#read 6, iclass 30, count 2 2006.229.16:52:51.33#ibcon#end of sib2, iclass 30, count 2 2006.229.16:52:51.33#ibcon#*mode == 0, iclass 30, count 2 2006.229.16:52:51.33#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.16:52:51.33#ibcon#[25=AT01-08\r\n] 2006.229.16:52:51.33#ibcon#*before write, iclass 30, count 2 2006.229.16:52:51.33#ibcon#enter sib2, iclass 30, count 2 2006.229.16:52:51.33#ibcon#flushed, iclass 30, count 2 2006.229.16:52:51.33#ibcon#about to write, iclass 30, count 2 2006.229.16:52:51.33#ibcon#wrote, iclass 30, count 2 2006.229.16:52:51.33#ibcon#about to read 3, iclass 30, count 2 2006.229.16:52:51.36#ibcon#read 3, iclass 30, count 2 2006.229.16:52:51.36#ibcon#about to read 4, iclass 30, count 2 2006.229.16:52:51.36#ibcon#read 4, iclass 30, count 2 2006.229.16:52:51.36#ibcon#about to read 5, iclass 30, count 2 2006.229.16:52:51.36#ibcon#read 5, iclass 30, count 2 2006.229.16:52:51.36#ibcon#about to read 6, iclass 30, count 2 2006.229.16:52:51.36#ibcon#read 6, iclass 30, count 2 2006.229.16:52:51.36#ibcon#end of sib2, iclass 30, count 2 2006.229.16:52:51.36#ibcon#*after write, iclass 30, count 2 2006.229.16:52:51.36#ibcon#*before return 0, iclass 30, count 2 2006.229.16:52:51.36#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:51.36#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:51.36#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.16:52:51.36#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:51.36#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:51.48#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:51.48#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:51.48#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:52:51.48#ibcon#first serial, iclass 30, count 0 2006.229.16:52:51.48#ibcon#enter sib2, iclass 30, count 0 2006.229.16:52:51.48#ibcon#flushed, iclass 30, count 0 2006.229.16:52:51.48#ibcon#about to write, iclass 30, count 0 2006.229.16:52:51.48#ibcon#wrote, iclass 30, count 0 2006.229.16:52:51.48#ibcon#about to read 3, iclass 30, count 0 2006.229.16:52:51.50#ibcon#read 3, iclass 30, count 0 2006.229.16:52:51.50#ibcon#about to read 4, iclass 30, count 0 2006.229.16:52:51.50#ibcon#read 4, iclass 30, count 0 2006.229.16:52:51.50#ibcon#about to read 5, iclass 30, count 0 2006.229.16:52:51.50#ibcon#read 5, iclass 30, count 0 2006.229.16:52:51.50#ibcon#about to read 6, iclass 30, count 0 2006.229.16:52:51.50#ibcon#read 6, iclass 30, count 0 2006.229.16:52:51.50#ibcon#end of sib2, iclass 30, count 0 2006.229.16:52:51.50#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:52:51.50#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:52:51.50#ibcon#[25=USB\r\n] 2006.229.16:52:51.50#ibcon#*before write, iclass 30, count 0 2006.229.16:52:51.50#ibcon#enter sib2, iclass 30, count 0 2006.229.16:52:51.50#ibcon#flushed, iclass 30, count 0 2006.229.16:52:51.50#ibcon#about to write, iclass 30, count 0 2006.229.16:52:51.50#ibcon#wrote, iclass 30, count 0 2006.229.16:52:51.50#ibcon#about to read 3, iclass 30, count 0 2006.229.16:52:51.53#ibcon#read 3, iclass 30, count 0 2006.229.16:52:51.53#ibcon#about to read 4, iclass 30, count 0 2006.229.16:52:51.53#ibcon#read 4, iclass 30, count 0 2006.229.16:52:51.53#ibcon#about to read 5, iclass 30, count 0 2006.229.16:52:51.53#ibcon#read 5, iclass 30, count 0 2006.229.16:52:51.53#ibcon#about to read 6, iclass 30, count 0 2006.229.16:52:51.53#ibcon#read 6, iclass 30, count 0 2006.229.16:52:51.53#ibcon#end of sib2, iclass 30, count 0 2006.229.16:52:51.53#ibcon#*after write, iclass 30, count 0 2006.229.16:52:51.53#ibcon#*before return 0, iclass 30, count 0 2006.229.16:52:51.53#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:51.53#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:51.53#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:52:51.53#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:52:51.53$vck44/valo=2,534.99 2006.229.16:52:51.53#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:52:51.53#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:52:51.53#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:51.53#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:51.53#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:51.53#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:51.53#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:52:51.53#ibcon#first serial, iclass 32, count 0 2006.229.16:52:51.53#ibcon#enter sib2, iclass 32, count 0 2006.229.16:52:51.53#ibcon#flushed, iclass 32, count 0 2006.229.16:52:51.53#ibcon#about to write, iclass 32, count 0 2006.229.16:52:51.53#ibcon#wrote, iclass 32, count 0 2006.229.16:52:51.53#ibcon#about to read 3, iclass 32, count 0 2006.229.16:52:51.55#ibcon#read 3, iclass 32, count 0 2006.229.16:52:51.55#ibcon#about to read 4, iclass 32, count 0 2006.229.16:52:51.55#ibcon#read 4, iclass 32, count 0 2006.229.16:52:51.55#ibcon#about to read 5, iclass 32, count 0 2006.229.16:52:51.55#ibcon#read 5, iclass 32, count 0 2006.229.16:52:51.55#ibcon#about to read 6, iclass 32, count 0 2006.229.16:52:51.55#ibcon#read 6, iclass 32, count 0 2006.229.16:52:51.55#ibcon#end of sib2, iclass 32, count 0 2006.229.16:52:51.55#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:52:51.55#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:52:51.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.16:52:51.55#ibcon#*before write, iclass 32, count 0 2006.229.16:52:51.55#ibcon#enter sib2, iclass 32, count 0 2006.229.16:52:51.55#ibcon#flushed, iclass 32, count 0 2006.229.16:52:51.55#ibcon#about to write, iclass 32, count 0 2006.229.16:52:51.55#ibcon#wrote, iclass 32, count 0 2006.229.16:52:51.55#ibcon#about to read 3, iclass 32, count 0 2006.229.16:52:51.59#ibcon#read 3, iclass 32, count 0 2006.229.16:52:51.59#ibcon#about to read 4, iclass 32, count 0 2006.229.16:52:51.59#ibcon#read 4, iclass 32, count 0 2006.229.16:52:51.59#ibcon#about to read 5, iclass 32, count 0 2006.229.16:52:51.59#ibcon#read 5, iclass 32, count 0 2006.229.16:52:51.59#ibcon#about to read 6, iclass 32, count 0 2006.229.16:52:51.59#ibcon#read 6, iclass 32, count 0 2006.229.16:52:51.59#ibcon#end of sib2, iclass 32, count 0 2006.229.16:52:51.59#ibcon#*after write, iclass 32, count 0 2006.229.16:52:51.59#ibcon#*before return 0, iclass 32, count 0 2006.229.16:52:51.59#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:51.59#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:51.59#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:52:51.59#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:52:51.59$vck44/va=2,7 2006.229.16:52:51.59#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.16:52:51.59#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.16:52:51.59#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:51.59#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:51.65#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:51.65#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:51.65#ibcon#enter wrdev, iclass 34, count 2 2006.229.16:52:51.65#ibcon#first serial, iclass 34, count 2 2006.229.16:52:51.65#ibcon#enter sib2, iclass 34, count 2 2006.229.16:52:51.65#ibcon#flushed, iclass 34, count 2 2006.229.16:52:51.65#ibcon#about to write, iclass 34, count 2 2006.229.16:52:51.65#ibcon#wrote, iclass 34, count 2 2006.229.16:52:51.65#ibcon#about to read 3, iclass 34, count 2 2006.229.16:52:51.67#ibcon#read 3, iclass 34, count 2 2006.229.16:52:51.67#ibcon#about to read 4, iclass 34, count 2 2006.229.16:52:51.67#ibcon#read 4, iclass 34, count 2 2006.229.16:52:51.67#ibcon#about to read 5, iclass 34, count 2 2006.229.16:52:51.67#ibcon#read 5, iclass 34, count 2 2006.229.16:52:51.67#ibcon#about to read 6, iclass 34, count 2 2006.229.16:52:51.67#ibcon#read 6, iclass 34, count 2 2006.229.16:52:51.67#ibcon#end of sib2, iclass 34, count 2 2006.229.16:52:51.67#ibcon#*mode == 0, iclass 34, count 2 2006.229.16:52:51.67#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.16:52:51.67#ibcon#[25=AT02-07\r\n] 2006.229.16:52:51.67#ibcon#*before write, iclass 34, count 2 2006.229.16:52:51.67#ibcon#enter sib2, iclass 34, count 2 2006.229.16:52:51.67#ibcon#flushed, iclass 34, count 2 2006.229.16:52:51.67#ibcon#about to write, iclass 34, count 2 2006.229.16:52:51.67#ibcon#wrote, iclass 34, count 2 2006.229.16:52:51.67#ibcon#about to read 3, iclass 34, count 2 2006.229.16:52:51.70#ibcon#read 3, iclass 34, count 2 2006.229.16:52:51.70#ibcon#about to read 4, iclass 34, count 2 2006.229.16:52:51.70#ibcon#read 4, iclass 34, count 2 2006.229.16:52:51.70#ibcon#about to read 5, iclass 34, count 2 2006.229.16:52:51.70#ibcon#read 5, iclass 34, count 2 2006.229.16:52:51.70#ibcon#about to read 6, iclass 34, count 2 2006.229.16:52:51.70#ibcon#read 6, iclass 34, count 2 2006.229.16:52:51.70#ibcon#end of sib2, iclass 34, count 2 2006.229.16:52:51.70#ibcon#*after write, iclass 34, count 2 2006.229.16:52:51.70#ibcon#*before return 0, iclass 34, count 2 2006.229.16:52:51.70#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:51.70#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:51.70#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.16:52:51.70#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:51.70#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:51.82#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:51.82#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:51.82#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:52:51.82#ibcon#first serial, iclass 34, count 0 2006.229.16:52:51.82#ibcon#enter sib2, iclass 34, count 0 2006.229.16:52:51.82#ibcon#flushed, iclass 34, count 0 2006.229.16:52:51.82#ibcon#about to write, iclass 34, count 0 2006.229.16:52:51.82#ibcon#wrote, iclass 34, count 0 2006.229.16:52:51.82#ibcon#about to read 3, iclass 34, count 0 2006.229.16:52:51.84#ibcon#read 3, iclass 34, count 0 2006.229.16:52:51.84#ibcon#about to read 4, iclass 34, count 0 2006.229.16:52:51.84#ibcon#read 4, iclass 34, count 0 2006.229.16:52:51.84#ibcon#about to read 5, iclass 34, count 0 2006.229.16:52:51.84#ibcon#read 5, iclass 34, count 0 2006.229.16:52:51.84#ibcon#about to read 6, iclass 34, count 0 2006.229.16:52:51.84#ibcon#read 6, iclass 34, count 0 2006.229.16:52:51.84#ibcon#end of sib2, iclass 34, count 0 2006.229.16:52:51.84#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:52:51.84#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:52:51.84#ibcon#[25=USB\r\n] 2006.229.16:52:51.84#ibcon#*before write, iclass 34, count 0 2006.229.16:52:51.84#ibcon#enter sib2, iclass 34, count 0 2006.229.16:52:51.84#ibcon#flushed, iclass 34, count 0 2006.229.16:52:51.84#ibcon#about to write, iclass 34, count 0 2006.229.16:52:51.84#ibcon#wrote, iclass 34, count 0 2006.229.16:52:51.84#ibcon#about to read 3, iclass 34, count 0 2006.229.16:52:51.87#ibcon#read 3, iclass 34, count 0 2006.229.16:52:51.87#ibcon#about to read 4, iclass 34, count 0 2006.229.16:52:51.87#ibcon#read 4, iclass 34, count 0 2006.229.16:52:51.87#ibcon#about to read 5, iclass 34, count 0 2006.229.16:52:51.87#ibcon#read 5, iclass 34, count 0 2006.229.16:52:51.87#ibcon#about to read 6, iclass 34, count 0 2006.229.16:52:51.87#ibcon#read 6, iclass 34, count 0 2006.229.16:52:51.87#ibcon#end of sib2, iclass 34, count 0 2006.229.16:52:51.87#ibcon#*after write, iclass 34, count 0 2006.229.16:52:51.87#ibcon#*before return 0, iclass 34, count 0 2006.229.16:52:51.87#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:51.87#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:51.87#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:52:51.87#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:52:51.87$vck44/valo=3,564.99 2006.229.16:52:51.87#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.16:52:51.87#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.16:52:51.87#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:51.87#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:51.87#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:51.87#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:51.87#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:52:51.87#ibcon#first serial, iclass 36, count 0 2006.229.16:52:51.87#ibcon#enter sib2, iclass 36, count 0 2006.229.16:52:51.87#ibcon#flushed, iclass 36, count 0 2006.229.16:52:51.87#ibcon#about to write, iclass 36, count 0 2006.229.16:52:51.87#ibcon#wrote, iclass 36, count 0 2006.229.16:52:51.87#ibcon#about to read 3, iclass 36, count 0 2006.229.16:52:51.89#ibcon#read 3, iclass 36, count 0 2006.229.16:52:51.89#ibcon#about to read 4, iclass 36, count 0 2006.229.16:52:51.89#ibcon#read 4, iclass 36, count 0 2006.229.16:52:51.89#ibcon#about to read 5, iclass 36, count 0 2006.229.16:52:51.89#ibcon#read 5, iclass 36, count 0 2006.229.16:52:51.89#ibcon#about to read 6, iclass 36, count 0 2006.229.16:52:51.89#ibcon#read 6, iclass 36, count 0 2006.229.16:52:51.89#ibcon#end of sib2, iclass 36, count 0 2006.229.16:52:51.89#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:52:51.89#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:52:51.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.16:52:51.89#ibcon#*before write, iclass 36, count 0 2006.229.16:52:51.89#ibcon#enter sib2, iclass 36, count 0 2006.229.16:52:51.89#ibcon#flushed, iclass 36, count 0 2006.229.16:52:51.89#ibcon#about to write, iclass 36, count 0 2006.229.16:52:51.89#ibcon#wrote, iclass 36, count 0 2006.229.16:52:51.89#ibcon#about to read 3, iclass 36, count 0 2006.229.16:52:51.93#ibcon#read 3, iclass 36, count 0 2006.229.16:52:51.93#ibcon#about to read 4, iclass 36, count 0 2006.229.16:52:51.93#ibcon#read 4, iclass 36, count 0 2006.229.16:52:51.93#ibcon#about to read 5, iclass 36, count 0 2006.229.16:52:51.93#ibcon#read 5, iclass 36, count 0 2006.229.16:52:51.93#ibcon#about to read 6, iclass 36, count 0 2006.229.16:52:51.93#ibcon#read 6, iclass 36, count 0 2006.229.16:52:51.93#ibcon#end of sib2, iclass 36, count 0 2006.229.16:52:51.93#ibcon#*after write, iclass 36, count 0 2006.229.16:52:51.93#ibcon#*before return 0, iclass 36, count 0 2006.229.16:52:51.93#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:51.93#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:51.93#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:52:51.93#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:52:51.93$vck44/va=3,6 2006.229.16:52:51.93#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.16:52:51.93#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.16:52:51.93#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:51.93#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:51.99#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:51.99#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:51.99#ibcon#enter wrdev, iclass 38, count 2 2006.229.16:52:51.99#ibcon#first serial, iclass 38, count 2 2006.229.16:52:51.99#ibcon#enter sib2, iclass 38, count 2 2006.229.16:52:51.99#ibcon#flushed, iclass 38, count 2 2006.229.16:52:51.99#ibcon#about to write, iclass 38, count 2 2006.229.16:52:51.99#ibcon#wrote, iclass 38, count 2 2006.229.16:52:51.99#ibcon#about to read 3, iclass 38, count 2 2006.229.16:52:52.01#ibcon#read 3, iclass 38, count 2 2006.229.16:52:52.01#ibcon#about to read 4, iclass 38, count 2 2006.229.16:52:52.01#ibcon#read 4, iclass 38, count 2 2006.229.16:52:52.01#ibcon#about to read 5, iclass 38, count 2 2006.229.16:52:52.01#ibcon#read 5, iclass 38, count 2 2006.229.16:52:52.01#ibcon#about to read 6, iclass 38, count 2 2006.229.16:52:52.01#ibcon#read 6, iclass 38, count 2 2006.229.16:52:52.01#ibcon#end of sib2, iclass 38, count 2 2006.229.16:52:52.01#ibcon#*mode == 0, iclass 38, count 2 2006.229.16:52:52.01#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.16:52:52.01#ibcon#[25=AT03-06\r\n] 2006.229.16:52:52.01#ibcon#*before write, iclass 38, count 2 2006.229.16:52:52.01#ibcon#enter sib2, iclass 38, count 2 2006.229.16:52:52.01#ibcon#flushed, iclass 38, count 2 2006.229.16:52:52.01#ibcon#about to write, iclass 38, count 2 2006.229.16:52:52.01#ibcon#wrote, iclass 38, count 2 2006.229.16:52:52.01#ibcon#about to read 3, iclass 38, count 2 2006.229.16:52:52.04#ibcon#read 3, iclass 38, count 2 2006.229.16:52:52.04#ibcon#about to read 4, iclass 38, count 2 2006.229.16:52:52.04#ibcon#read 4, iclass 38, count 2 2006.229.16:52:52.04#ibcon#about to read 5, iclass 38, count 2 2006.229.16:52:52.04#ibcon#read 5, iclass 38, count 2 2006.229.16:52:52.04#ibcon#about to read 6, iclass 38, count 2 2006.229.16:52:52.04#ibcon#read 6, iclass 38, count 2 2006.229.16:52:52.04#ibcon#end of sib2, iclass 38, count 2 2006.229.16:52:52.04#ibcon#*after write, iclass 38, count 2 2006.229.16:52:52.04#ibcon#*before return 0, iclass 38, count 2 2006.229.16:52:52.04#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:52.04#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:52.04#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.16:52:52.04#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:52.04#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:52.16#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:52.16#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:52.16#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:52:52.16#ibcon#first serial, iclass 38, count 0 2006.229.16:52:52.16#ibcon#enter sib2, iclass 38, count 0 2006.229.16:52:52.16#ibcon#flushed, iclass 38, count 0 2006.229.16:52:52.16#ibcon#about to write, iclass 38, count 0 2006.229.16:52:52.16#ibcon#wrote, iclass 38, count 0 2006.229.16:52:52.16#ibcon#about to read 3, iclass 38, count 0 2006.229.16:52:52.18#ibcon#read 3, iclass 38, count 0 2006.229.16:52:52.18#ibcon#about to read 4, iclass 38, count 0 2006.229.16:52:52.18#ibcon#read 4, iclass 38, count 0 2006.229.16:52:52.18#ibcon#about to read 5, iclass 38, count 0 2006.229.16:52:52.18#ibcon#read 5, iclass 38, count 0 2006.229.16:52:52.18#ibcon#about to read 6, iclass 38, count 0 2006.229.16:52:52.18#ibcon#read 6, iclass 38, count 0 2006.229.16:52:52.18#ibcon#end of sib2, iclass 38, count 0 2006.229.16:52:52.18#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:52:52.18#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:52:52.18#ibcon#[25=USB\r\n] 2006.229.16:52:52.18#ibcon#*before write, iclass 38, count 0 2006.229.16:52:52.18#ibcon#enter sib2, iclass 38, count 0 2006.229.16:52:52.18#ibcon#flushed, iclass 38, count 0 2006.229.16:52:52.18#ibcon#about to write, iclass 38, count 0 2006.229.16:52:52.18#ibcon#wrote, iclass 38, count 0 2006.229.16:52:52.18#ibcon#about to read 3, iclass 38, count 0 2006.229.16:52:52.21#ibcon#read 3, iclass 38, count 0 2006.229.16:52:52.21#ibcon#about to read 4, iclass 38, count 0 2006.229.16:52:52.21#ibcon#read 4, iclass 38, count 0 2006.229.16:52:52.21#ibcon#about to read 5, iclass 38, count 0 2006.229.16:52:52.21#ibcon#read 5, iclass 38, count 0 2006.229.16:52:52.21#ibcon#about to read 6, iclass 38, count 0 2006.229.16:52:52.21#ibcon#read 6, iclass 38, count 0 2006.229.16:52:52.21#ibcon#end of sib2, iclass 38, count 0 2006.229.16:52:52.21#ibcon#*after write, iclass 38, count 0 2006.229.16:52:52.21#ibcon#*before return 0, iclass 38, count 0 2006.229.16:52:52.21#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:52.21#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:52.21#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:52:52.21#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:52:52.21$vck44/valo=4,624.99 2006.229.16:52:52.21#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.16:52:52.21#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.16:52:52.21#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:52.21#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:52.21#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:52.21#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:52.21#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:52:52.21#ibcon#first serial, iclass 40, count 0 2006.229.16:52:52.21#ibcon#enter sib2, iclass 40, count 0 2006.229.16:52:52.21#ibcon#flushed, iclass 40, count 0 2006.229.16:52:52.21#ibcon#about to write, iclass 40, count 0 2006.229.16:52:52.21#ibcon#wrote, iclass 40, count 0 2006.229.16:52:52.21#ibcon#about to read 3, iclass 40, count 0 2006.229.16:52:52.23#ibcon#read 3, iclass 40, count 0 2006.229.16:52:52.23#ibcon#about to read 4, iclass 40, count 0 2006.229.16:52:52.23#ibcon#read 4, iclass 40, count 0 2006.229.16:52:52.23#ibcon#about to read 5, iclass 40, count 0 2006.229.16:52:52.23#ibcon#read 5, iclass 40, count 0 2006.229.16:52:52.23#ibcon#about to read 6, iclass 40, count 0 2006.229.16:52:52.23#ibcon#read 6, iclass 40, count 0 2006.229.16:52:52.23#ibcon#end of sib2, iclass 40, count 0 2006.229.16:52:52.23#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:52:52.23#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:52:52.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.16:52:52.23#ibcon#*before write, iclass 40, count 0 2006.229.16:52:52.23#ibcon#enter sib2, iclass 40, count 0 2006.229.16:52:52.23#ibcon#flushed, iclass 40, count 0 2006.229.16:52:52.23#ibcon#about to write, iclass 40, count 0 2006.229.16:52:52.23#ibcon#wrote, iclass 40, count 0 2006.229.16:52:52.23#ibcon#about to read 3, iclass 40, count 0 2006.229.16:52:52.27#ibcon#read 3, iclass 40, count 0 2006.229.16:52:52.27#ibcon#about to read 4, iclass 40, count 0 2006.229.16:52:52.27#ibcon#read 4, iclass 40, count 0 2006.229.16:52:52.27#ibcon#about to read 5, iclass 40, count 0 2006.229.16:52:52.27#ibcon#read 5, iclass 40, count 0 2006.229.16:52:52.27#ibcon#about to read 6, iclass 40, count 0 2006.229.16:52:52.27#ibcon#read 6, iclass 40, count 0 2006.229.16:52:52.27#ibcon#end of sib2, iclass 40, count 0 2006.229.16:52:52.27#ibcon#*after write, iclass 40, count 0 2006.229.16:52:52.27#ibcon#*before return 0, iclass 40, count 0 2006.229.16:52:52.27#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:52.27#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:52.27#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:52:52.27#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:52:52.27$vck44/va=4,7 2006.229.16:52:52.27#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.16:52:52.27#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.16:52:52.27#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:52.27#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:52.33#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:52.33#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:52.33#ibcon#enter wrdev, iclass 4, count 2 2006.229.16:52:52.33#ibcon#first serial, iclass 4, count 2 2006.229.16:52:52.33#ibcon#enter sib2, iclass 4, count 2 2006.229.16:52:52.33#ibcon#flushed, iclass 4, count 2 2006.229.16:52:52.33#ibcon#about to write, iclass 4, count 2 2006.229.16:52:52.33#ibcon#wrote, iclass 4, count 2 2006.229.16:52:52.33#ibcon#about to read 3, iclass 4, count 2 2006.229.16:52:52.35#ibcon#read 3, iclass 4, count 2 2006.229.16:52:52.35#ibcon#about to read 4, iclass 4, count 2 2006.229.16:52:52.35#ibcon#read 4, iclass 4, count 2 2006.229.16:52:52.35#ibcon#about to read 5, iclass 4, count 2 2006.229.16:52:52.35#ibcon#read 5, iclass 4, count 2 2006.229.16:52:52.35#ibcon#about to read 6, iclass 4, count 2 2006.229.16:52:52.35#ibcon#read 6, iclass 4, count 2 2006.229.16:52:52.35#ibcon#end of sib2, iclass 4, count 2 2006.229.16:52:52.35#ibcon#*mode == 0, iclass 4, count 2 2006.229.16:52:52.35#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.16:52:52.35#ibcon#[25=AT04-07\r\n] 2006.229.16:52:52.35#ibcon#*before write, iclass 4, count 2 2006.229.16:52:52.35#ibcon#enter sib2, iclass 4, count 2 2006.229.16:52:52.35#ibcon#flushed, iclass 4, count 2 2006.229.16:52:52.35#ibcon#about to write, iclass 4, count 2 2006.229.16:52:52.35#ibcon#wrote, iclass 4, count 2 2006.229.16:52:52.35#ibcon#about to read 3, iclass 4, count 2 2006.229.16:52:52.38#ibcon#read 3, iclass 4, count 2 2006.229.16:52:52.38#ibcon#about to read 4, iclass 4, count 2 2006.229.16:52:52.38#ibcon#read 4, iclass 4, count 2 2006.229.16:52:52.38#ibcon#about to read 5, iclass 4, count 2 2006.229.16:52:52.38#ibcon#read 5, iclass 4, count 2 2006.229.16:52:52.38#ibcon#about to read 6, iclass 4, count 2 2006.229.16:52:52.38#ibcon#read 6, iclass 4, count 2 2006.229.16:52:52.38#ibcon#end of sib2, iclass 4, count 2 2006.229.16:52:52.38#ibcon#*after write, iclass 4, count 2 2006.229.16:52:52.38#ibcon#*before return 0, iclass 4, count 2 2006.229.16:52:52.38#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:52.38#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:52.38#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.16:52:52.38#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:52.38#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:52.50#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:52.50#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:52.50#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:52:52.50#ibcon#first serial, iclass 4, count 0 2006.229.16:52:52.50#ibcon#enter sib2, iclass 4, count 0 2006.229.16:52:52.50#ibcon#flushed, iclass 4, count 0 2006.229.16:52:52.50#ibcon#about to write, iclass 4, count 0 2006.229.16:52:52.50#ibcon#wrote, iclass 4, count 0 2006.229.16:52:52.50#ibcon#about to read 3, iclass 4, count 0 2006.229.16:52:52.52#ibcon#read 3, iclass 4, count 0 2006.229.16:52:52.52#ibcon#about to read 4, iclass 4, count 0 2006.229.16:52:52.52#ibcon#read 4, iclass 4, count 0 2006.229.16:52:52.52#ibcon#about to read 5, iclass 4, count 0 2006.229.16:52:52.52#ibcon#read 5, iclass 4, count 0 2006.229.16:52:52.52#ibcon#about to read 6, iclass 4, count 0 2006.229.16:52:52.52#ibcon#read 6, iclass 4, count 0 2006.229.16:52:52.52#ibcon#end of sib2, iclass 4, count 0 2006.229.16:52:52.52#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:52:52.52#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:52:52.52#ibcon#[25=USB\r\n] 2006.229.16:52:52.52#ibcon#*before write, iclass 4, count 0 2006.229.16:52:52.52#ibcon#enter sib2, iclass 4, count 0 2006.229.16:52:52.52#ibcon#flushed, iclass 4, count 0 2006.229.16:52:52.52#ibcon#about to write, iclass 4, count 0 2006.229.16:52:52.52#ibcon#wrote, iclass 4, count 0 2006.229.16:52:52.52#ibcon#about to read 3, iclass 4, count 0 2006.229.16:52:52.55#ibcon#read 3, iclass 4, count 0 2006.229.16:52:52.55#ibcon#about to read 4, iclass 4, count 0 2006.229.16:52:52.55#ibcon#read 4, iclass 4, count 0 2006.229.16:52:52.55#ibcon#about to read 5, iclass 4, count 0 2006.229.16:52:52.55#ibcon#read 5, iclass 4, count 0 2006.229.16:52:52.55#ibcon#about to read 6, iclass 4, count 0 2006.229.16:52:52.55#ibcon#read 6, iclass 4, count 0 2006.229.16:52:52.55#ibcon#end of sib2, iclass 4, count 0 2006.229.16:52:52.55#ibcon#*after write, iclass 4, count 0 2006.229.16:52:52.55#ibcon#*before return 0, iclass 4, count 0 2006.229.16:52:52.55#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:52.55#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:52.55#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:52:52.55#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:52:52.55$vck44/valo=5,734.99 2006.229.16:52:52.55#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.16:52:52.55#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.16:52:52.55#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:52.55#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:52.55#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:52.55#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:52.55#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:52:52.55#ibcon#first serial, iclass 6, count 0 2006.229.16:52:52.55#ibcon#enter sib2, iclass 6, count 0 2006.229.16:52:52.55#ibcon#flushed, iclass 6, count 0 2006.229.16:52:52.55#ibcon#about to write, iclass 6, count 0 2006.229.16:52:52.55#ibcon#wrote, iclass 6, count 0 2006.229.16:52:52.55#ibcon#about to read 3, iclass 6, count 0 2006.229.16:52:52.57#ibcon#read 3, iclass 6, count 0 2006.229.16:52:52.57#ibcon#about to read 4, iclass 6, count 0 2006.229.16:52:52.57#ibcon#read 4, iclass 6, count 0 2006.229.16:52:52.57#ibcon#about to read 5, iclass 6, count 0 2006.229.16:52:52.57#ibcon#read 5, iclass 6, count 0 2006.229.16:52:52.57#ibcon#about to read 6, iclass 6, count 0 2006.229.16:52:52.57#ibcon#read 6, iclass 6, count 0 2006.229.16:52:52.57#ibcon#end of sib2, iclass 6, count 0 2006.229.16:52:52.57#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:52:52.57#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:52:52.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.16:52:52.57#ibcon#*before write, iclass 6, count 0 2006.229.16:52:52.57#ibcon#enter sib2, iclass 6, count 0 2006.229.16:52:52.57#ibcon#flushed, iclass 6, count 0 2006.229.16:52:52.57#ibcon#about to write, iclass 6, count 0 2006.229.16:52:52.57#ibcon#wrote, iclass 6, count 0 2006.229.16:52:52.57#ibcon#about to read 3, iclass 6, count 0 2006.229.16:52:52.61#ibcon#read 3, iclass 6, count 0 2006.229.16:52:52.61#ibcon#about to read 4, iclass 6, count 0 2006.229.16:52:52.61#ibcon#read 4, iclass 6, count 0 2006.229.16:52:52.61#ibcon#about to read 5, iclass 6, count 0 2006.229.16:52:52.61#ibcon#read 5, iclass 6, count 0 2006.229.16:52:52.61#ibcon#about to read 6, iclass 6, count 0 2006.229.16:52:52.61#ibcon#read 6, iclass 6, count 0 2006.229.16:52:52.61#ibcon#end of sib2, iclass 6, count 0 2006.229.16:52:52.61#ibcon#*after write, iclass 6, count 0 2006.229.16:52:52.61#ibcon#*before return 0, iclass 6, count 0 2006.229.16:52:52.61#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:52.61#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:52.61#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:52:52.61#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:52:52.61$vck44/va=5,4 2006.229.16:52:52.61#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.16:52:52.61#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.16:52:52.61#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:52.61#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:52.67#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:52.67#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:52.67#ibcon#enter wrdev, iclass 10, count 2 2006.229.16:52:52.67#ibcon#first serial, iclass 10, count 2 2006.229.16:52:52.67#ibcon#enter sib2, iclass 10, count 2 2006.229.16:52:52.67#ibcon#flushed, iclass 10, count 2 2006.229.16:52:52.67#ibcon#about to write, iclass 10, count 2 2006.229.16:52:52.67#ibcon#wrote, iclass 10, count 2 2006.229.16:52:52.67#ibcon#about to read 3, iclass 10, count 2 2006.229.16:52:52.69#ibcon#read 3, iclass 10, count 2 2006.229.16:52:52.69#ibcon#about to read 4, iclass 10, count 2 2006.229.16:52:52.69#ibcon#read 4, iclass 10, count 2 2006.229.16:52:52.69#ibcon#about to read 5, iclass 10, count 2 2006.229.16:52:52.69#ibcon#read 5, iclass 10, count 2 2006.229.16:52:52.69#ibcon#about to read 6, iclass 10, count 2 2006.229.16:52:52.69#ibcon#read 6, iclass 10, count 2 2006.229.16:52:52.69#ibcon#end of sib2, iclass 10, count 2 2006.229.16:52:52.69#ibcon#*mode == 0, iclass 10, count 2 2006.229.16:52:52.69#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.16:52:52.69#ibcon#[25=AT05-04\r\n] 2006.229.16:52:52.69#ibcon#*before write, iclass 10, count 2 2006.229.16:52:52.69#ibcon#enter sib2, iclass 10, count 2 2006.229.16:52:52.69#ibcon#flushed, iclass 10, count 2 2006.229.16:52:52.69#ibcon#about to write, iclass 10, count 2 2006.229.16:52:52.69#ibcon#wrote, iclass 10, count 2 2006.229.16:52:52.69#ibcon#about to read 3, iclass 10, count 2 2006.229.16:52:52.72#ibcon#read 3, iclass 10, count 2 2006.229.16:52:52.72#ibcon#about to read 4, iclass 10, count 2 2006.229.16:52:52.72#ibcon#read 4, iclass 10, count 2 2006.229.16:52:52.72#ibcon#about to read 5, iclass 10, count 2 2006.229.16:52:52.72#ibcon#read 5, iclass 10, count 2 2006.229.16:52:52.72#ibcon#about to read 6, iclass 10, count 2 2006.229.16:52:52.72#ibcon#read 6, iclass 10, count 2 2006.229.16:52:52.72#ibcon#end of sib2, iclass 10, count 2 2006.229.16:52:52.72#ibcon#*after write, iclass 10, count 2 2006.229.16:52:52.72#ibcon#*before return 0, iclass 10, count 2 2006.229.16:52:52.72#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:52.72#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:52.72#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.16:52:52.72#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:52.72#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:52.84#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:52.84#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:52.84#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:52:52.84#ibcon#first serial, iclass 10, count 0 2006.229.16:52:52.84#ibcon#enter sib2, iclass 10, count 0 2006.229.16:52:52.84#ibcon#flushed, iclass 10, count 0 2006.229.16:52:52.84#ibcon#about to write, iclass 10, count 0 2006.229.16:52:52.84#ibcon#wrote, iclass 10, count 0 2006.229.16:52:52.84#ibcon#about to read 3, iclass 10, count 0 2006.229.16:52:52.86#ibcon#read 3, iclass 10, count 0 2006.229.16:52:52.86#ibcon#about to read 4, iclass 10, count 0 2006.229.16:52:52.86#ibcon#read 4, iclass 10, count 0 2006.229.16:52:52.86#ibcon#about to read 5, iclass 10, count 0 2006.229.16:52:52.86#ibcon#read 5, iclass 10, count 0 2006.229.16:52:52.86#ibcon#about to read 6, iclass 10, count 0 2006.229.16:52:52.86#ibcon#read 6, iclass 10, count 0 2006.229.16:52:52.86#ibcon#end of sib2, iclass 10, count 0 2006.229.16:52:52.86#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:52:52.86#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:52:52.86#ibcon#[25=USB\r\n] 2006.229.16:52:52.86#ibcon#*before write, iclass 10, count 0 2006.229.16:52:52.86#ibcon#enter sib2, iclass 10, count 0 2006.229.16:52:52.86#ibcon#flushed, iclass 10, count 0 2006.229.16:52:52.86#ibcon#about to write, iclass 10, count 0 2006.229.16:52:52.86#ibcon#wrote, iclass 10, count 0 2006.229.16:52:52.86#ibcon#about to read 3, iclass 10, count 0 2006.229.16:52:52.89#ibcon#read 3, iclass 10, count 0 2006.229.16:52:52.89#ibcon#about to read 4, iclass 10, count 0 2006.229.16:52:52.89#ibcon#read 4, iclass 10, count 0 2006.229.16:52:52.89#ibcon#about to read 5, iclass 10, count 0 2006.229.16:52:52.89#ibcon#read 5, iclass 10, count 0 2006.229.16:52:52.89#ibcon#about to read 6, iclass 10, count 0 2006.229.16:52:52.89#ibcon#read 6, iclass 10, count 0 2006.229.16:52:52.89#ibcon#end of sib2, iclass 10, count 0 2006.229.16:52:52.89#ibcon#*after write, iclass 10, count 0 2006.229.16:52:52.89#ibcon#*before return 0, iclass 10, count 0 2006.229.16:52:52.89#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:52.89#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:52.89#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:52:52.89#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:52:52.89$vck44/valo=6,814.99 2006.229.16:52:52.89#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.16:52:52.89#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.16:52:52.89#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:52.89#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:52.89#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:52.89#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:52.89#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:52:52.89#ibcon#first serial, iclass 12, count 0 2006.229.16:52:52.89#ibcon#enter sib2, iclass 12, count 0 2006.229.16:52:52.89#ibcon#flushed, iclass 12, count 0 2006.229.16:52:52.89#ibcon#about to write, iclass 12, count 0 2006.229.16:52:52.89#ibcon#wrote, iclass 12, count 0 2006.229.16:52:52.89#ibcon#about to read 3, iclass 12, count 0 2006.229.16:52:52.91#ibcon#read 3, iclass 12, count 0 2006.229.16:52:52.91#ibcon#about to read 4, iclass 12, count 0 2006.229.16:52:52.91#ibcon#read 4, iclass 12, count 0 2006.229.16:52:52.91#ibcon#about to read 5, iclass 12, count 0 2006.229.16:52:52.91#ibcon#read 5, iclass 12, count 0 2006.229.16:52:52.91#ibcon#about to read 6, iclass 12, count 0 2006.229.16:52:52.91#ibcon#read 6, iclass 12, count 0 2006.229.16:52:52.91#ibcon#end of sib2, iclass 12, count 0 2006.229.16:52:52.91#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:52:52.91#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:52:52.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.16:52:52.91#ibcon#*before write, iclass 12, count 0 2006.229.16:52:52.91#ibcon#enter sib2, iclass 12, count 0 2006.229.16:52:52.91#ibcon#flushed, iclass 12, count 0 2006.229.16:52:52.91#ibcon#about to write, iclass 12, count 0 2006.229.16:52:52.91#ibcon#wrote, iclass 12, count 0 2006.229.16:52:52.91#ibcon#about to read 3, iclass 12, count 0 2006.229.16:52:52.95#ibcon#read 3, iclass 12, count 0 2006.229.16:52:52.95#ibcon#about to read 4, iclass 12, count 0 2006.229.16:52:52.95#ibcon#read 4, iclass 12, count 0 2006.229.16:52:52.95#ibcon#about to read 5, iclass 12, count 0 2006.229.16:52:52.95#ibcon#read 5, iclass 12, count 0 2006.229.16:52:52.95#ibcon#about to read 6, iclass 12, count 0 2006.229.16:52:52.95#ibcon#read 6, iclass 12, count 0 2006.229.16:52:52.95#ibcon#end of sib2, iclass 12, count 0 2006.229.16:52:52.95#ibcon#*after write, iclass 12, count 0 2006.229.16:52:52.95#ibcon#*before return 0, iclass 12, count 0 2006.229.16:52:52.95#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:52.95#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:52.95#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:52:52.95#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:52:52.95$vck44/va=6,4 2006.229.16:52:52.95#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.16:52:52.95#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.16:52:52.95#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:52.95#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:53.01#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:53.01#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:53.01#ibcon#enter wrdev, iclass 14, count 2 2006.229.16:52:53.01#ibcon#first serial, iclass 14, count 2 2006.229.16:52:53.01#ibcon#enter sib2, iclass 14, count 2 2006.229.16:52:53.01#ibcon#flushed, iclass 14, count 2 2006.229.16:52:53.01#ibcon#about to write, iclass 14, count 2 2006.229.16:52:53.01#ibcon#wrote, iclass 14, count 2 2006.229.16:52:53.01#ibcon#about to read 3, iclass 14, count 2 2006.229.16:52:53.03#ibcon#read 3, iclass 14, count 2 2006.229.16:52:53.03#ibcon#about to read 4, iclass 14, count 2 2006.229.16:52:53.03#ibcon#read 4, iclass 14, count 2 2006.229.16:52:53.03#ibcon#about to read 5, iclass 14, count 2 2006.229.16:52:53.03#ibcon#read 5, iclass 14, count 2 2006.229.16:52:53.03#ibcon#about to read 6, iclass 14, count 2 2006.229.16:52:53.03#ibcon#read 6, iclass 14, count 2 2006.229.16:52:53.03#ibcon#end of sib2, iclass 14, count 2 2006.229.16:52:53.03#ibcon#*mode == 0, iclass 14, count 2 2006.229.16:52:53.03#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.16:52:53.03#ibcon#[25=AT06-04\r\n] 2006.229.16:52:53.03#ibcon#*before write, iclass 14, count 2 2006.229.16:52:53.03#ibcon#enter sib2, iclass 14, count 2 2006.229.16:52:53.03#ibcon#flushed, iclass 14, count 2 2006.229.16:52:53.03#ibcon#about to write, iclass 14, count 2 2006.229.16:52:53.03#ibcon#wrote, iclass 14, count 2 2006.229.16:52:53.03#ibcon#about to read 3, iclass 14, count 2 2006.229.16:52:53.06#ibcon#read 3, iclass 14, count 2 2006.229.16:52:53.06#ibcon#about to read 4, iclass 14, count 2 2006.229.16:52:53.06#ibcon#read 4, iclass 14, count 2 2006.229.16:52:53.06#ibcon#about to read 5, iclass 14, count 2 2006.229.16:52:53.06#ibcon#read 5, iclass 14, count 2 2006.229.16:52:53.06#ibcon#about to read 6, iclass 14, count 2 2006.229.16:52:53.06#ibcon#read 6, iclass 14, count 2 2006.229.16:52:53.06#ibcon#end of sib2, iclass 14, count 2 2006.229.16:52:53.06#ibcon#*after write, iclass 14, count 2 2006.229.16:52:53.06#ibcon#*before return 0, iclass 14, count 2 2006.229.16:52:53.06#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:53.06#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:53.06#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.16:52:53.06#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:53.06#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:53.18#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:53.18#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:53.18#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:52:53.18#ibcon#first serial, iclass 14, count 0 2006.229.16:52:53.18#ibcon#enter sib2, iclass 14, count 0 2006.229.16:52:53.18#ibcon#flushed, iclass 14, count 0 2006.229.16:52:53.18#ibcon#about to write, iclass 14, count 0 2006.229.16:52:53.18#ibcon#wrote, iclass 14, count 0 2006.229.16:52:53.18#ibcon#about to read 3, iclass 14, count 0 2006.229.16:52:53.20#ibcon#read 3, iclass 14, count 0 2006.229.16:52:53.20#ibcon#about to read 4, iclass 14, count 0 2006.229.16:52:53.20#ibcon#read 4, iclass 14, count 0 2006.229.16:52:53.20#ibcon#about to read 5, iclass 14, count 0 2006.229.16:52:53.20#ibcon#read 5, iclass 14, count 0 2006.229.16:52:53.20#ibcon#about to read 6, iclass 14, count 0 2006.229.16:52:53.20#ibcon#read 6, iclass 14, count 0 2006.229.16:52:53.20#ibcon#end of sib2, iclass 14, count 0 2006.229.16:52:53.20#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:52:53.20#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:52:53.20#ibcon#[25=USB\r\n] 2006.229.16:52:53.20#ibcon#*before write, iclass 14, count 0 2006.229.16:52:53.20#ibcon#enter sib2, iclass 14, count 0 2006.229.16:52:53.20#ibcon#flushed, iclass 14, count 0 2006.229.16:52:53.20#ibcon#about to write, iclass 14, count 0 2006.229.16:52:53.20#ibcon#wrote, iclass 14, count 0 2006.229.16:52:53.20#ibcon#about to read 3, iclass 14, count 0 2006.229.16:52:53.23#ibcon#read 3, iclass 14, count 0 2006.229.16:52:53.23#ibcon#about to read 4, iclass 14, count 0 2006.229.16:52:53.23#ibcon#read 4, iclass 14, count 0 2006.229.16:52:53.23#ibcon#about to read 5, iclass 14, count 0 2006.229.16:52:53.23#ibcon#read 5, iclass 14, count 0 2006.229.16:52:53.23#ibcon#about to read 6, iclass 14, count 0 2006.229.16:52:53.23#ibcon#read 6, iclass 14, count 0 2006.229.16:52:53.23#ibcon#end of sib2, iclass 14, count 0 2006.229.16:52:53.23#ibcon#*after write, iclass 14, count 0 2006.229.16:52:53.23#ibcon#*before return 0, iclass 14, count 0 2006.229.16:52:53.23#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:53.23#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:53.23#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:52:53.23#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:52:53.23$vck44/valo=7,864.99 2006.229.16:52:53.23#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:52:53.23#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:52:53.23#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:53.23#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:53.23#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:53.23#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:53.23#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:52:53.23#ibcon#first serial, iclass 16, count 0 2006.229.16:52:53.23#ibcon#enter sib2, iclass 16, count 0 2006.229.16:52:53.23#ibcon#flushed, iclass 16, count 0 2006.229.16:52:53.23#ibcon#about to write, iclass 16, count 0 2006.229.16:52:53.23#ibcon#wrote, iclass 16, count 0 2006.229.16:52:53.23#ibcon#about to read 3, iclass 16, count 0 2006.229.16:52:53.25#ibcon#read 3, iclass 16, count 0 2006.229.16:52:53.25#ibcon#about to read 4, iclass 16, count 0 2006.229.16:52:53.25#ibcon#read 4, iclass 16, count 0 2006.229.16:52:53.25#ibcon#about to read 5, iclass 16, count 0 2006.229.16:52:53.25#ibcon#read 5, iclass 16, count 0 2006.229.16:52:53.25#ibcon#about to read 6, iclass 16, count 0 2006.229.16:52:53.25#ibcon#read 6, iclass 16, count 0 2006.229.16:52:53.25#ibcon#end of sib2, iclass 16, count 0 2006.229.16:52:53.25#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:52:53.25#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:52:53.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.16:52:53.25#ibcon#*before write, iclass 16, count 0 2006.229.16:52:53.25#ibcon#enter sib2, iclass 16, count 0 2006.229.16:52:53.25#ibcon#flushed, iclass 16, count 0 2006.229.16:52:53.25#ibcon#about to write, iclass 16, count 0 2006.229.16:52:53.25#ibcon#wrote, iclass 16, count 0 2006.229.16:52:53.25#ibcon#about to read 3, iclass 16, count 0 2006.229.16:52:53.29#ibcon#read 3, iclass 16, count 0 2006.229.16:52:53.29#ibcon#about to read 4, iclass 16, count 0 2006.229.16:52:53.29#ibcon#read 4, iclass 16, count 0 2006.229.16:52:53.29#ibcon#about to read 5, iclass 16, count 0 2006.229.16:52:53.29#ibcon#read 5, iclass 16, count 0 2006.229.16:52:53.29#ibcon#about to read 6, iclass 16, count 0 2006.229.16:52:53.29#ibcon#read 6, iclass 16, count 0 2006.229.16:52:53.29#ibcon#end of sib2, iclass 16, count 0 2006.229.16:52:53.29#ibcon#*after write, iclass 16, count 0 2006.229.16:52:53.29#ibcon#*before return 0, iclass 16, count 0 2006.229.16:52:53.29#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:53.29#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:53.29#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:52:53.29#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:52:53.29$vck44/va=7,5 2006.229.16:52:53.29#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:52:53.29#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:52:53.29#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:53.29#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:53.35#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:53.35#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:53.35#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:52:53.35#ibcon#first serial, iclass 18, count 2 2006.229.16:52:53.35#ibcon#enter sib2, iclass 18, count 2 2006.229.16:52:53.35#ibcon#flushed, iclass 18, count 2 2006.229.16:52:53.35#ibcon#about to write, iclass 18, count 2 2006.229.16:52:53.35#ibcon#wrote, iclass 18, count 2 2006.229.16:52:53.35#ibcon#about to read 3, iclass 18, count 2 2006.229.16:52:53.37#ibcon#read 3, iclass 18, count 2 2006.229.16:52:53.37#ibcon#about to read 4, iclass 18, count 2 2006.229.16:52:53.37#ibcon#read 4, iclass 18, count 2 2006.229.16:52:53.37#ibcon#about to read 5, iclass 18, count 2 2006.229.16:52:53.37#ibcon#read 5, iclass 18, count 2 2006.229.16:52:53.37#ibcon#about to read 6, iclass 18, count 2 2006.229.16:52:53.37#ibcon#read 6, iclass 18, count 2 2006.229.16:52:53.37#ibcon#end of sib2, iclass 18, count 2 2006.229.16:52:53.37#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:52:53.37#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:52:53.37#ibcon#[25=AT07-05\r\n] 2006.229.16:52:53.37#ibcon#*before write, iclass 18, count 2 2006.229.16:52:53.37#ibcon#enter sib2, iclass 18, count 2 2006.229.16:52:53.37#ibcon#flushed, iclass 18, count 2 2006.229.16:52:53.37#ibcon#about to write, iclass 18, count 2 2006.229.16:52:53.37#ibcon#wrote, iclass 18, count 2 2006.229.16:52:53.37#ibcon#about to read 3, iclass 18, count 2 2006.229.16:52:53.40#ibcon#read 3, iclass 18, count 2 2006.229.16:52:53.40#ibcon#about to read 4, iclass 18, count 2 2006.229.16:52:53.40#ibcon#read 4, iclass 18, count 2 2006.229.16:52:53.40#ibcon#about to read 5, iclass 18, count 2 2006.229.16:52:53.40#ibcon#read 5, iclass 18, count 2 2006.229.16:52:53.40#ibcon#about to read 6, iclass 18, count 2 2006.229.16:52:53.40#ibcon#read 6, iclass 18, count 2 2006.229.16:52:53.40#ibcon#end of sib2, iclass 18, count 2 2006.229.16:52:53.40#ibcon#*after write, iclass 18, count 2 2006.229.16:52:53.40#ibcon#*before return 0, iclass 18, count 2 2006.229.16:52:53.40#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:53.40#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:53.40#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:52:53.40#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:53.40#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:53.52#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:53.52#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:53.52#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:52:53.52#ibcon#first serial, iclass 18, count 0 2006.229.16:52:53.52#ibcon#enter sib2, iclass 18, count 0 2006.229.16:52:53.52#ibcon#flushed, iclass 18, count 0 2006.229.16:52:53.52#ibcon#about to write, iclass 18, count 0 2006.229.16:52:53.52#ibcon#wrote, iclass 18, count 0 2006.229.16:52:53.52#ibcon#about to read 3, iclass 18, count 0 2006.229.16:52:53.54#ibcon#read 3, iclass 18, count 0 2006.229.16:52:53.54#ibcon#about to read 4, iclass 18, count 0 2006.229.16:52:53.54#ibcon#read 4, iclass 18, count 0 2006.229.16:52:53.54#ibcon#about to read 5, iclass 18, count 0 2006.229.16:52:53.54#ibcon#read 5, iclass 18, count 0 2006.229.16:52:53.54#ibcon#about to read 6, iclass 18, count 0 2006.229.16:52:53.54#ibcon#read 6, iclass 18, count 0 2006.229.16:52:53.54#ibcon#end of sib2, iclass 18, count 0 2006.229.16:52:53.54#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:52:53.54#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:52:53.54#ibcon#[25=USB\r\n] 2006.229.16:52:53.54#ibcon#*before write, iclass 18, count 0 2006.229.16:52:53.54#ibcon#enter sib2, iclass 18, count 0 2006.229.16:52:53.54#ibcon#flushed, iclass 18, count 0 2006.229.16:52:53.54#ibcon#about to write, iclass 18, count 0 2006.229.16:52:53.54#ibcon#wrote, iclass 18, count 0 2006.229.16:52:53.54#ibcon#about to read 3, iclass 18, count 0 2006.229.16:52:53.57#ibcon#read 3, iclass 18, count 0 2006.229.16:52:53.57#ibcon#about to read 4, iclass 18, count 0 2006.229.16:52:53.57#ibcon#read 4, iclass 18, count 0 2006.229.16:52:53.57#ibcon#about to read 5, iclass 18, count 0 2006.229.16:52:53.57#ibcon#read 5, iclass 18, count 0 2006.229.16:52:53.57#ibcon#about to read 6, iclass 18, count 0 2006.229.16:52:53.57#ibcon#read 6, iclass 18, count 0 2006.229.16:52:53.57#ibcon#end of sib2, iclass 18, count 0 2006.229.16:52:53.57#ibcon#*after write, iclass 18, count 0 2006.229.16:52:53.57#ibcon#*before return 0, iclass 18, count 0 2006.229.16:52:53.57#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:53.57#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:53.57#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:52:53.57#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:52:53.57$vck44/valo=8,884.99 2006.229.16:52:53.57#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.16:52:53.57#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.16:52:53.57#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:53.57#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:53.57#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:53.57#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:53.57#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:52:53.57#ibcon#first serial, iclass 20, count 0 2006.229.16:52:53.57#ibcon#enter sib2, iclass 20, count 0 2006.229.16:52:53.57#ibcon#flushed, iclass 20, count 0 2006.229.16:52:53.57#ibcon#about to write, iclass 20, count 0 2006.229.16:52:53.57#ibcon#wrote, iclass 20, count 0 2006.229.16:52:53.57#ibcon#about to read 3, iclass 20, count 0 2006.229.16:52:53.59#ibcon#read 3, iclass 20, count 0 2006.229.16:52:53.59#ibcon#about to read 4, iclass 20, count 0 2006.229.16:52:53.59#ibcon#read 4, iclass 20, count 0 2006.229.16:52:53.59#ibcon#about to read 5, iclass 20, count 0 2006.229.16:52:53.59#ibcon#read 5, iclass 20, count 0 2006.229.16:52:53.59#ibcon#about to read 6, iclass 20, count 0 2006.229.16:52:53.59#ibcon#read 6, iclass 20, count 0 2006.229.16:52:53.59#ibcon#end of sib2, iclass 20, count 0 2006.229.16:52:53.59#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:52:53.59#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:52:53.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.16:52:53.59#ibcon#*before write, iclass 20, count 0 2006.229.16:52:53.59#ibcon#enter sib2, iclass 20, count 0 2006.229.16:52:53.59#ibcon#flushed, iclass 20, count 0 2006.229.16:52:53.59#ibcon#about to write, iclass 20, count 0 2006.229.16:52:53.59#ibcon#wrote, iclass 20, count 0 2006.229.16:52:53.59#ibcon#about to read 3, iclass 20, count 0 2006.229.16:52:53.63#ibcon#read 3, iclass 20, count 0 2006.229.16:52:53.63#ibcon#about to read 4, iclass 20, count 0 2006.229.16:52:53.63#ibcon#read 4, iclass 20, count 0 2006.229.16:52:53.63#ibcon#about to read 5, iclass 20, count 0 2006.229.16:52:53.63#ibcon#read 5, iclass 20, count 0 2006.229.16:52:53.63#ibcon#about to read 6, iclass 20, count 0 2006.229.16:52:53.63#ibcon#read 6, iclass 20, count 0 2006.229.16:52:53.63#ibcon#end of sib2, iclass 20, count 0 2006.229.16:52:53.63#ibcon#*after write, iclass 20, count 0 2006.229.16:52:53.63#ibcon#*before return 0, iclass 20, count 0 2006.229.16:52:53.63#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:53.63#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:53.63#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:52:53.63#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:52:53.63$vck44/va=8,6 2006.229.16:52:53.63#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.16:52:53.63#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.16:52:53.63#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:53.63#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:52:53.69#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:52:53.69#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:52:53.69#ibcon#enter wrdev, iclass 22, count 2 2006.229.16:52:53.69#ibcon#first serial, iclass 22, count 2 2006.229.16:52:53.69#ibcon#enter sib2, iclass 22, count 2 2006.229.16:52:53.69#ibcon#flushed, iclass 22, count 2 2006.229.16:52:53.69#ibcon#about to write, iclass 22, count 2 2006.229.16:52:53.69#ibcon#wrote, iclass 22, count 2 2006.229.16:52:53.69#ibcon#about to read 3, iclass 22, count 2 2006.229.16:52:53.71#ibcon#read 3, iclass 22, count 2 2006.229.16:52:53.71#ibcon#about to read 4, iclass 22, count 2 2006.229.16:52:53.71#ibcon#read 4, iclass 22, count 2 2006.229.16:52:53.71#ibcon#about to read 5, iclass 22, count 2 2006.229.16:52:53.71#ibcon#read 5, iclass 22, count 2 2006.229.16:52:53.71#ibcon#about to read 6, iclass 22, count 2 2006.229.16:52:53.71#ibcon#read 6, iclass 22, count 2 2006.229.16:52:53.71#ibcon#end of sib2, iclass 22, count 2 2006.229.16:52:53.71#ibcon#*mode == 0, iclass 22, count 2 2006.229.16:52:53.71#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.16:52:53.71#ibcon#[25=AT08-06\r\n] 2006.229.16:52:53.71#ibcon#*before write, iclass 22, count 2 2006.229.16:52:53.71#ibcon#enter sib2, iclass 22, count 2 2006.229.16:52:53.71#ibcon#flushed, iclass 22, count 2 2006.229.16:52:53.71#ibcon#about to write, iclass 22, count 2 2006.229.16:52:53.71#ibcon#wrote, iclass 22, count 2 2006.229.16:52:53.71#ibcon#about to read 3, iclass 22, count 2 2006.229.16:52:53.74#ibcon#read 3, iclass 22, count 2 2006.229.16:52:53.74#ibcon#about to read 4, iclass 22, count 2 2006.229.16:52:53.74#ibcon#read 4, iclass 22, count 2 2006.229.16:52:53.74#ibcon#about to read 5, iclass 22, count 2 2006.229.16:52:53.74#ibcon#read 5, iclass 22, count 2 2006.229.16:52:53.74#ibcon#about to read 6, iclass 22, count 2 2006.229.16:52:53.74#ibcon#read 6, iclass 22, count 2 2006.229.16:52:53.74#ibcon#end of sib2, iclass 22, count 2 2006.229.16:52:53.74#ibcon#*after write, iclass 22, count 2 2006.229.16:52:53.74#ibcon#*before return 0, iclass 22, count 2 2006.229.16:52:53.74#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:52:53.74#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.16:52:53.74#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.16:52:53.74#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:53.74#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:52:53.86#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:52:53.86#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:52:53.86#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:52:53.86#ibcon#first serial, iclass 22, count 0 2006.229.16:52:53.86#ibcon#enter sib2, iclass 22, count 0 2006.229.16:52:53.86#ibcon#flushed, iclass 22, count 0 2006.229.16:52:53.86#ibcon#about to write, iclass 22, count 0 2006.229.16:52:53.86#ibcon#wrote, iclass 22, count 0 2006.229.16:52:53.86#ibcon#about to read 3, iclass 22, count 0 2006.229.16:52:53.88#ibcon#read 3, iclass 22, count 0 2006.229.16:52:53.88#ibcon#about to read 4, iclass 22, count 0 2006.229.16:52:53.88#ibcon#read 4, iclass 22, count 0 2006.229.16:52:53.88#ibcon#about to read 5, iclass 22, count 0 2006.229.16:52:53.88#ibcon#read 5, iclass 22, count 0 2006.229.16:52:53.88#ibcon#about to read 6, iclass 22, count 0 2006.229.16:52:53.88#ibcon#read 6, iclass 22, count 0 2006.229.16:52:53.88#ibcon#end of sib2, iclass 22, count 0 2006.229.16:52:53.88#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:52:53.88#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:52:53.88#ibcon#[25=USB\r\n] 2006.229.16:52:53.88#ibcon#*before write, iclass 22, count 0 2006.229.16:52:53.88#ibcon#enter sib2, iclass 22, count 0 2006.229.16:52:53.88#ibcon#flushed, iclass 22, count 0 2006.229.16:52:53.88#ibcon#about to write, iclass 22, count 0 2006.229.16:52:53.88#ibcon#wrote, iclass 22, count 0 2006.229.16:52:53.88#ibcon#about to read 3, iclass 22, count 0 2006.229.16:52:53.91#ibcon#read 3, iclass 22, count 0 2006.229.16:52:53.91#ibcon#about to read 4, iclass 22, count 0 2006.229.16:52:53.91#ibcon#read 4, iclass 22, count 0 2006.229.16:52:53.91#ibcon#about to read 5, iclass 22, count 0 2006.229.16:52:53.91#ibcon#read 5, iclass 22, count 0 2006.229.16:52:53.91#ibcon#about to read 6, iclass 22, count 0 2006.229.16:52:53.91#ibcon#read 6, iclass 22, count 0 2006.229.16:52:53.91#ibcon#end of sib2, iclass 22, count 0 2006.229.16:52:53.91#ibcon#*after write, iclass 22, count 0 2006.229.16:52:53.91#ibcon#*before return 0, iclass 22, count 0 2006.229.16:52:53.91#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:52:53.91#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.16:52:53.91#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:52:53.91#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:52:53.91$vck44/vblo=1,629.99 2006.229.16:52:53.91#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.16:52:53.91#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.16:52:53.91#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:53.91#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:52:53.91#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:52:53.91#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:52:53.91#ibcon#enter wrdev, iclass 24, count 0 2006.229.16:52:53.91#ibcon#first serial, iclass 24, count 0 2006.229.16:52:53.91#ibcon#enter sib2, iclass 24, count 0 2006.229.16:52:53.91#ibcon#flushed, iclass 24, count 0 2006.229.16:52:53.91#ibcon#about to write, iclass 24, count 0 2006.229.16:52:53.91#ibcon#wrote, iclass 24, count 0 2006.229.16:52:53.91#ibcon#about to read 3, iclass 24, count 0 2006.229.16:52:53.93#ibcon#read 3, iclass 24, count 0 2006.229.16:52:53.93#ibcon#about to read 4, iclass 24, count 0 2006.229.16:52:53.93#ibcon#read 4, iclass 24, count 0 2006.229.16:52:53.93#ibcon#about to read 5, iclass 24, count 0 2006.229.16:52:53.93#ibcon#read 5, iclass 24, count 0 2006.229.16:52:53.93#ibcon#about to read 6, iclass 24, count 0 2006.229.16:52:53.93#ibcon#read 6, iclass 24, count 0 2006.229.16:52:53.93#ibcon#end of sib2, iclass 24, count 0 2006.229.16:52:53.93#ibcon#*mode == 0, iclass 24, count 0 2006.229.16:52:53.93#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.16:52:53.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.16:52:53.93#ibcon#*before write, iclass 24, count 0 2006.229.16:52:53.93#ibcon#enter sib2, iclass 24, count 0 2006.229.16:52:53.93#ibcon#flushed, iclass 24, count 0 2006.229.16:52:53.93#ibcon#about to write, iclass 24, count 0 2006.229.16:52:53.93#ibcon#wrote, iclass 24, count 0 2006.229.16:52:53.93#ibcon#about to read 3, iclass 24, count 0 2006.229.16:52:53.97#ibcon#read 3, iclass 24, count 0 2006.229.16:52:53.97#ibcon#about to read 4, iclass 24, count 0 2006.229.16:52:53.97#ibcon#read 4, iclass 24, count 0 2006.229.16:52:53.97#ibcon#about to read 5, iclass 24, count 0 2006.229.16:52:53.97#ibcon#read 5, iclass 24, count 0 2006.229.16:52:53.97#ibcon#about to read 6, iclass 24, count 0 2006.229.16:52:53.97#ibcon#read 6, iclass 24, count 0 2006.229.16:52:53.97#ibcon#end of sib2, iclass 24, count 0 2006.229.16:52:53.97#ibcon#*after write, iclass 24, count 0 2006.229.16:52:53.97#ibcon#*before return 0, iclass 24, count 0 2006.229.16:52:53.97#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:52:53.97#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.16:52:53.97#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.16:52:53.97#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.16:52:53.97$vck44/vb=1,4 2006.229.16:52:53.97#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.16:52:53.97#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.16:52:53.97#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:53.97#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:52:53.97#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:52:53.97#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:52:53.97#ibcon#enter wrdev, iclass 26, count 2 2006.229.16:52:53.97#ibcon#first serial, iclass 26, count 2 2006.229.16:52:53.97#ibcon#enter sib2, iclass 26, count 2 2006.229.16:52:53.97#ibcon#flushed, iclass 26, count 2 2006.229.16:52:53.97#ibcon#about to write, iclass 26, count 2 2006.229.16:52:53.97#ibcon#wrote, iclass 26, count 2 2006.229.16:52:53.97#ibcon#about to read 3, iclass 26, count 2 2006.229.16:52:53.99#ibcon#read 3, iclass 26, count 2 2006.229.16:52:53.99#ibcon#about to read 4, iclass 26, count 2 2006.229.16:52:53.99#ibcon#read 4, iclass 26, count 2 2006.229.16:52:53.99#ibcon#about to read 5, iclass 26, count 2 2006.229.16:52:53.99#ibcon#read 5, iclass 26, count 2 2006.229.16:52:53.99#ibcon#about to read 6, iclass 26, count 2 2006.229.16:52:53.99#ibcon#read 6, iclass 26, count 2 2006.229.16:52:53.99#ibcon#end of sib2, iclass 26, count 2 2006.229.16:52:53.99#ibcon#*mode == 0, iclass 26, count 2 2006.229.16:52:53.99#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.16:52:53.99#ibcon#[27=AT01-04\r\n] 2006.229.16:52:53.99#ibcon#*before write, iclass 26, count 2 2006.229.16:52:53.99#ibcon#enter sib2, iclass 26, count 2 2006.229.16:52:53.99#ibcon#flushed, iclass 26, count 2 2006.229.16:52:53.99#ibcon#about to write, iclass 26, count 2 2006.229.16:52:53.99#ibcon#wrote, iclass 26, count 2 2006.229.16:52:53.99#ibcon#about to read 3, iclass 26, count 2 2006.229.16:52:54.02#ibcon#read 3, iclass 26, count 2 2006.229.16:52:54.02#ibcon#about to read 4, iclass 26, count 2 2006.229.16:52:54.02#ibcon#read 4, iclass 26, count 2 2006.229.16:52:54.02#ibcon#about to read 5, iclass 26, count 2 2006.229.16:52:54.02#ibcon#read 5, iclass 26, count 2 2006.229.16:52:54.02#ibcon#about to read 6, iclass 26, count 2 2006.229.16:52:54.02#ibcon#read 6, iclass 26, count 2 2006.229.16:52:54.02#ibcon#end of sib2, iclass 26, count 2 2006.229.16:52:54.02#ibcon#*after write, iclass 26, count 2 2006.229.16:52:54.02#ibcon#*before return 0, iclass 26, count 2 2006.229.16:52:54.02#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:52:54.02#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.16:52:54.02#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.16:52:54.02#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:54.02#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:52:54.14#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:52:54.14#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:52:54.14#ibcon#enter wrdev, iclass 26, count 0 2006.229.16:52:54.14#ibcon#first serial, iclass 26, count 0 2006.229.16:52:54.14#ibcon#enter sib2, iclass 26, count 0 2006.229.16:52:54.14#ibcon#flushed, iclass 26, count 0 2006.229.16:52:54.14#ibcon#about to write, iclass 26, count 0 2006.229.16:52:54.14#ibcon#wrote, iclass 26, count 0 2006.229.16:52:54.14#ibcon#about to read 3, iclass 26, count 0 2006.229.16:52:54.16#ibcon#read 3, iclass 26, count 0 2006.229.16:52:54.16#ibcon#about to read 4, iclass 26, count 0 2006.229.16:52:54.16#ibcon#read 4, iclass 26, count 0 2006.229.16:52:54.16#ibcon#about to read 5, iclass 26, count 0 2006.229.16:52:54.16#ibcon#read 5, iclass 26, count 0 2006.229.16:52:54.16#ibcon#about to read 6, iclass 26, count 0 2006.229.16:52:54.16#ibcon#read 6, iclass 26, count 0 2006.229.16:52:54.16#ibcon#end of sib2, iclass 26, count 0 2006.229.16:52:54.16#ibcon#*mode == 0, iclass 26, count 0 2006.229.16:52:54.16#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.16:52:54.16#ibcon#[27=USB\r\n] 2006.229.16:52:54.16#ibcon#*before write, iclass 26, count 0 2006.229.16:52:54.16#ibcon#enter sib2, iclass 26, count 0 2006.229.16:52:54.16#ibcon#flushed, iclass 26, count 0 2006.229.16:52:54.16#ibcon#about to write, iclass 26, count 0 2006.229.16:52:54.16#ibcon#wrote, iclass 26, count 0 2006.229.16:52:54.16#ibcon#about to read 3, iclass 26, count 0 2006.229.16:52:54.19#ibcon#read 3, iclass 26, count 0 2006.229.16:52:54.19#ibcon#about to read 4, iclass 26, count 0 2006.229.16:52:54.19#ibcon#read 4, iclass 26, count 0 2006.229.16:52:54.19#ibcon#about to read 5, iclass 26, count 0 2006.229.16:52:54.19#ibcon#read 5, iclass 26, count 0 2006.229.16:52:54.19#ibcon#about to read 6, iclass 26, count 0 2006.229.16:52:54.19#ibcon#read 6, iclass 26, count 0 2006.229.16:52:54.19#ibcon#end of sib2, iclass 26, count 0 2006.229.16:52:54.19#ibcon#*after write, iclass 26, count 0 2006.229.16:52:54.19#ibcon#*before return 0, iclass 26, count 0 2006.229.16:52:54.19#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:52:54.19#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.16:52:54.19#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.16:52:54.19#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.16:52:54.19$vck44/vblo=2,634.99 2006.229.16:52:54.19#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.16:52:54.19#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.16:52:54.19#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:54.19#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:54.19#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:54.19#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:54.19#ibcon#enter wrdev, iclass 28, count 0 2006.229.16:52:54.19#ibcon#first serial, iclass 28, count 0 2006.229.16:52:54.19#ibcon#enter sib2, iclass 28, count 0 2006.229.16:52:54.19#ibcon#flushed, iclass 28, count 0 2006.229.16:52:54.19#ibcon#about to write, iclass 28, count 0 2006.229.16:52:54.19#ibcon#wrote, iclass 28, count 0 2006.229.16:52:54.19#ibcon#about to read 3, iclass 28, count 0 2006.229.16:52:54.21#ibcon#read 3, iclass 28, count 0 2006.229.16:52:54.21#ibcon#about to read 4, iclass 28, count 0 2006.229.16:52:54.21#ibcon#read 4, iclass 28, count 0 2006.229.16:52:54.21#ibcon#about to read 5, iclass 28, count 0 2006.229.16:52:54.21#ibcon#read 5, iclass 28, count 0 2006.229.16:52:54.21#ibcon#about to read 6, iclass 28, count 0 2006.229.16:52:54.21#ibcon#read 6, iclass 28, count 0 2006.229.16:52:54.21#ibcon#end of sib2, iclass 28, count 0 2006.229.16:52:54.21#ibcon#*mode == 0, iclass 28, count 0 2006.229.16:52:54.21#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.16:52:54.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.16:52:54.21#ibcon#*before write, iclass 28, count 0 2006.229.16:52:54.21#ibcon#enter sib2, iclass 28, count 0 2006.229.16:52:54.21#ibcon#flushed, iclass 28, count 0 2006.229.16:52:54.21#ibcon#about to write, iclass 28, count 0 2006.229.16:52:54.21#ibcon#wrote, iclass 28, count 0 2006.229.16:52:54.21#ibcon#about to read 3, iclass 28, count 0 2006.229.16:52:54.25#ibcon#read 3, iclass 28, count 0 2006.229.16:52:54.25#ibcon#about to read 4, iclass 28, count 0 2006.229.16:52:54.25#ibcon#read 4, iclass 28, count 0 2006.229.16:52:54.25#ibcon#about to read 5, iclass 28, count 0 2006.229.16:52:54.25#ibcon#read 5, iclass 28, count 0 2006.229.16:52:54.25#ibcon#about to read 6, iclass 28, count 0 2006.229.16:52:54.25#ibcon#read 6, iclass 28, count 0 2006.229.16:52:54.25#ibcon#end of sib2, iclass 28, count 0 2006.229.16:52:54.25#ibcon#*after write, iclass 28, count 0 2006.229.16:52:54.25#ibcon#*before return 0, iclass 28, count 0 2006.229.16:52:54.25#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:54.25#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.16:52:54.25#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.16:52:54.25#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.16:52:54.25$vck44/vb=2,4 2006.229.16:52:54.25#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.16:52:54.25#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.16:52:54.25#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:54.25#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:54.31#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:54.31#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:54.31#ibcon#enter wrdev, iclass 30, count 2 2006.229.16:52:54.31#ibcon#first serial, iclass 30, count 2 2006.229.16:52:54.31#ibcon#enter sib2, iclass 30, count 2 2006.229.16:52:54.31#ibcon#flushed, iclass 30, count 2 2006.229.16:52:54.31#ibcon#about to write, iclass 30, count 2 2006.229.16:52:54.31#ibcon#wrote, iclass 30, count 2 2006.229.16:52:54.31#ibcon#about to read 3, iclass 30, count 2 2006.229.16:52:54.33#ibcon#read 3, iclass 30, count 2 2006.229.16:52:54.33#ibcon#about to read 4, iclass 30, count 2 2006.229.16:52:54.33#ibcon#read 4, iclass 30, count 2 2006.229.16:52:54.33#ibcon#about to read 5, iclass 30, count 2 2006.229.16:52:54.33#ibcon#read 5, iclass 30, count 2 2006.229.16:52:54.33#ibcon#about to read 6, iclass 30, count 2 2006.229.16:52:54.33#ibcon#read 6, iclass 30, count 2 2006.229.16:52:54.33#ibcon#end of sib2, iclass 30, count 2 2006.229.16:52:54.33#ibcon#*mode == 0, iclass 30, count 2 2006.229.16:52:54.33#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.16:52:54.33#ibcon#[27=AT02-04\r\n] 2006.229.16:52:54.33#ibcon#*before write, iclass 30, count 2 2006.229.16:52:54.33#ibcon#enter sib2, iclass 30, count 2 2006.229.16:52:54.33#ibcon#flushed, iclass 30, count 2 2006.229.16:52:54.33#ibcon#about to write, iclass 30, count 2 2006.229.16:52:54.33#ibcon#wrote, iclass 30, count 2 2006.229.16:52:54.33#ibcon#about to read 3, iclass 30, count 2 2006.229.16:52:54.36#ibcon#read 3, iclass 30, count 2 2006.229.16:52:54.36#ibcon#about to read 4, iclass 30, count 2 2006.229.16:52:54.36#ibcon#read 4, iclass 30, count 2 2006.229.16:52:54.36#ibcon#about to read 5, iclass 30, count 2 2006.229.16:52:54.36#ibcon#read 5, iclass 30, count 2 2006.229.16:52:54.36#ibcon#about to read 6, iclass 30, count 2 2006.229.16:52:54.36#ibcon#read 6, iclass 30, count 2 2006.229.16:52:54.36#ibcon#end of sib2, iclass 30, count 2 2006.229.16:52:54.36#ibcon#*after write, iclass 30, count 2 2006.229.16:52:54.36#ibcon#*before return 0, iclass 30, count 2 2006.229.16:52:54.36#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:54.36#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.16:52:54.36#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.16:52:54.36#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:54.36#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:54.48#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:54.48#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:54.48#ibcon#enter wrdev, iclass 30, count 0 2006.229.16:52:54.48#ibcon#first serial, iclass 30, count 0 2006.229.16:52:54.48#ibcon#enter sib2, iclass 30, count 0 2006.229.16:52:54.48#ibcon#flushed, iclass 30, count 0 2006.229.16:52:54.48#ibcon#about to write, iclass 30, count 0 2006.229.16:52:54.48#ibcon#wrote, iclass 30, count 0 2006.229.16:52:54.48#ibcon#about to read 3, iclass 30, count 0 2006.229.16:52:54.50#ibcon#read 3, iclass 30, count 0 2006.229.16:52:54.50#ibcon#about to read 4, iclass 30, count 0 2006.229.16:52:54.50#ibcon#read 4, iclass 30, count 0 2006.229.16:52:54.50#ibcon#about to read 5, iclass 30, count 0 2006.229.16:52:54.50#ibcon#read 5, iclass 30, count 0 2006.229.16:52:54.50#ibcon#about to read 6, iclass 30, count 0 2006.229.16:52:54.50#ibcon#read 6, iclass 30, count 0 2006.229.16:52:54.50#ibcon#end of sib2, iclass 30, count 0 2006.229.16:52:54.50#ibcon#*mode == 0, iclass 30, count 0 2006.229.16:52:54.50#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.16:52:54.50#ibcon#[27=USB\r\n] 2006.229.16:52:54.50#ibcon#*before write, iclass 30, count 0 2006.229.16:52:54.50#ibcon#enter sib2, iclass 30, count 0 2006.229.16:52:54.50#ibcon#flushed, iclass 30, count 0 2006.229.16:52:54.50#ibcon#about to write, iclass 30, count 0 2006.229.16:52:54.50#ibcon#wrote, iclass 30, count 0 2006.229.16:52:54.50#ibcon#about to read 3, iclass 30, count 0 2006.229.16:52:54.53#ibcon#read 3, iclass 30, count 0 2006.229.16:52:54.53#ibcon#about to read 4, iclass 30, count 0 2006.229.16:52:54.53#ibcon#read 4, iclass 30, count 0 2006.229.16:52:54.53#ibcon#about to read 5, iclass 30, count 0 2006.229.16:52:54.53#ibcon#read 5, iclass 30, count 0 2006.229.16:52:54.53#ibcon#about to read 6, iclass 30, count 0 2006.229.16:52:54.53#ibcon#read 6, iclass 30, count 0 2006.229.16:52:54.53#ibcon#end of sib2, iclass 30, count 0 2006.229.16:52:54.53#ibcon#*after write, iclass 30, count 0 2006.229.16:52:54.53#ibcon#*before return 0, iclass 30, count 0 2006.229.16:52:54.53#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:54.53#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.16:52:54.53#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.16:52:54.53#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.16:52:54.53$vck44/vblo=3,649.99 2006.229.16:52:54.53#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.16:52:54.53#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.16:52:54.53#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:54.53#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:54.53#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:54.53#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:54.53#ibcon#enter wrdev, iclass 32, count 0 2006.229.16:52:54.53#ibcon#first serial, iclass 32, count 0 2006.229.16:52:54.53#ibcon#enter sib2, iclass 32, count 0 2006.229.16:52:54.53#ibcon#flushed, iclass 32, count 0 2006.229.16:52:54.53#ibcon#about to write, iclass 32, count 0 2006.229.16:52:54.53#ibcon#wrote, iclass 32, count 0 2006.229.16:52:54.53#ibcon#about to read 3, iclass 32, count 0 2006.229.16:52:54.55#ibcon#read 3, iclass 32, count 0 2006.229.16:52:54.55#ibcon#about to read 4, iclass 32, count 0 2006.229.16:52:54.55#ibcon#read 4, iclass 32, count 0 2006.229.16:52:54.55#ibcon#about to read 5, iclass 32, count 0 2006.229.16:52:54.55#ibcon#read 5, iclass 32, count 0 2006.229.16:52:54.55#ibcon#about to read 6, iclass 32, count 0 2006.229.16:52:54.55#ibcon#read 6, iclass 32, count 0 2006.229.16:52:54.55#ibcon#end of sib2, iclass 32, count 0 2006.229.16:52:54.55#ibcon#*mode == 0, iclass 32, count 0 2006.229.16:52:54.55#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.16:52:54.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.16:52:54.55#ibcon#*before write, iclass 32, count 0 2006.229.16:52:54.55#ibcon#enter sib2, iclass 32, count 0 2006.229.16:52:54.55#ibcon#flushed, iclass 32, count 0 2006.229.16:52:54.55#ibcon#about to write, iclass 32, count 0 2006.229.16:52:54.55#ibcon#wrote, iclass 32, count 0 2006.229.16:52:54.55#ibcon#about to read 3, iclass 32, count 0 2006.229.16:52:54.59#ibcon#read 3, iclass 32, count 0 2006.229.16:52:54.59#ibcon#about to read 4, iclass 32, count 0 2006.229.16:52:54.59#ibcon#read 4, iclass 32, count 0 2006.229.16:52:54.59#ibcon#about to read 5, iclass 32, count 0 2006.229.16:52:54.59#ibcon#read 5, iclass 32, count 0 2006.229.16:52:54.59#ibcon#about to read 6, iclass 32, count 0 2006.229.16:52:54.59#ibcon#read 6, iclass 32, count 0 2006.229.16:52:54.59#ibcon#end of sib2, iclass 32, count 0 2006.229.16:52:54.59#ibcon#*after write, iclass 32, count 0 2006.229.16:52:54.59#ibcon#*before return 0, iclass 32, count 0 2006.229.16:52:54.59#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:54.59#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.16:52:54.59#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.16:52:54.59#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.16:52:54.59$vck44/vb=3,4 2006.229.16:52:54.59#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.16:52:54.59#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.16:52:54.59#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:54.59#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:54.65#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:54.65#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:54.65#ibcon#enter wrdev, iclass 34, count 2 2006.229.16:52:54.65#ibcon#first serial, iclass 34, count 2 2006.229.16:52:54.65#ibcon#enter sib2, iclass 34, count 2 2006.229.16:52:54.65#ibcon#flushed, iclass 34, count 2 2006.229.16:52:54.65#ibcon#about to write, iclass 34, count 2 2006.229.16:52:54.65#ibcon#wrote, iclass 34, count 2 2006.229.16:52:54.65#ibcon#about to read 3, iclass 34, count 2 2006.229.16:52:54.67#ibcon#read 3, iclass 34, count 2 2006.229.16:52:54.67#ibcon#about to read 4, iclass 34, count 2 2006.229.16:52:54.67#ibcon#read 4, iclass 34, count 2 2006.229.16:52:54.67#ibcon#about to read 5, iclass 34, count 2 2006.229.16:52:54.67#ibcon#read 5, iclass 34, count 2 2006.229.16:52:54.67#ibcon#about to read 6, iclass 34, count 2 2006.229.16:52:54.67#ibcon#read 6, iclass 34, count 2 2006.229.16:52:54.67#ibcon#end of sib2, iclass 34, count 2 2006.229.16:52:54.67#ibcon#*mode == 0, iclass 34, count 2 2006.229.16:52:54.67#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.16:52:54.67#ibcon#[27=AT03-04\r\n] 2006.229.16:52:54.67#ibcon#*before write, iclass 34, count 2 2006.229.16:52:54.67#ibcon#enter sib2, iclass 34, count 2 2006.229.16:52:54.67#ibcon#flushed, iclass 34, count 2 2006.229.16:52:54.67#ibcon#about to write, iclass 34, count 2 2006.229.16:52:54.67#ibcon#wrote, iclass 34, count 2 2006.229.16:52:54.67#ibcon#about to read 3, iclass 34, count 2 2006.229.16:52:54.70#ibcon#read 3, iclass 34, count 2 2006.229.16:52:54.70#ibcon#about to read 4, iclass 34, count 2 2006.229.16:52:54.70#ibcon#read 4, iclass 34, count 2 2006.229.16:52:54.70#ibcon#about to read 5, iclass 34, count 2 2006.229.16:52:54.70#ibcon#read 5, iclass 34, count 2 2006.229.16:52:54.70#ibcon#about to read 6, iclass 34, count 2 2006.229.16:52:54.70#ibcon#read 6, iclass 34, count 2 2006.229.16:52:54.70#ibcon#end of sib2, iclass 34, count 2 2006.229.16:52:54.70#ibcon#*after write, iclass 34, count 2 2006.229.16:52:54.70#ibcon#*before return 0, iclass 34, count 2 2006.229.16:52:54.70#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:54.70#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.16:52:54.70#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.16:52:54.70#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:54.70#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:54.82#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:54.82#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:54.82#ibcon#enter wrdev, iclass 34, count 0 2006.229.16:52:54.82#ibcon#first serial, iclass 34, count 0 2006.229.16:52:54.82#ibcon#enter sib2, iclass 34, count 0 2006.229.16:52:54.82#ibcon#flushed, iclass 34, count 0 2006.229.16:52:54.82#ibcon#about to write, iclass 34, count 0 2006.229.16:52:54.82#ibcon#wrote, iclass 34, count 0 2006.229.16:52:54.82#ibcon#about to read 3, iclass 34, count 0 2006.229.16:52:54.84#ibcon#read 3, iclass 34, count 0 2006.229.16:52:54.84#ibcon#about to read 4, iclass 34, count 0 2006.229.16:52:54.84#ibcon#read 4, iclass 34, count 0 2006.229.16:52:54.84#ibcon#about to read 5, iclass 34, count 0 2006.229.16:52:54.84#ibcon#read 5, iclass 34, count 0 2006.229.16:52:54.84#ibcon#about to read 6, iclass 34, count 0 2006.229.16:52:54.84#ibcon#read 6, iclass 34, count 0 2006.229.16:52:54.84#ibcon#end of sib2, iclass 34, count 0 2006.229.16:52:54.84#ibcon#*mode == 0, iclass 34, count 0 2006.229.16:52:54.84#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.16:52:54.84#ibcon#[27=USB\r\n] 2006.229.16:52:54.84#ibcon#*before write, iclass 34, count 0 2006.229.16:52:54.84#ibcon#enter sib2, iclass 34, count 0 2006.229.16:52:54.84#ibcon#flushed, iclass 34, count 0 2006.229.16:52:54.84#ibcon#about to write, iclass 34, count 0 2006.229.16:52:54.84#ibcon#wrote, iclass 34, count 0 2006.229.16:52:54.84#ibcon#about to read 3, iclass 34, count 0 2006.229.16:52:54.87#ibcon#read 3, iclass 34, count 0 2006.229.16:52:54.87#ibcon#about to read 4, iclass 34, count 0 2006.229.16:52:54.87#ibcon#read 4, iclass 34, count 0 2006.229.16:52:54.87#ibcon#about to read 5, iclass 34, count 0 2006.229.16:52:54.87#ibcon#read 5, iclass 34, count 0 2006.229.16:52:54.87#ibcon#about to read 6, iclass 34, count 0 2006.229.16:52:54.87#ibcon#read 6, iclass 34, count 0 2006.229.16:52:54.87#ibcon#end of sib2, iclass 34, count 0 2006.229.16:52:54.87#ibcon#*after write, iclass 34, count 0 2006.229.16:52:54.87#ibcon#*before return 0, iclass 34, count 0 2006.229.16:52:54.87#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:54.87#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.16:52:54.87#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.16:52:54.87#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.16:52:54.87$vck44/vblo=4,679.99 2006.229.16:52:54.87#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.16:52:54.87#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.16:52:54.87#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:54.87#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:54.87#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:54.87#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:54.87#ibcon#enter wrdev, iclass 36, count 0 2006.229.16:52:54.87#ibcon#first serial, iclass 36, count 0 2006.229.16:52:54.87#ibcon#enter sib2, iclass 36, count 0 2006.229.16:52:54.87#ibcon#flushed, iclass 36, count 0 2006.229.16:52:54.87#ibcon#about to write, iclass 36, count 0 2006.229.16:52:54.87#ibcon#wrote, iclass 36, count 0 2006.229.16:52:54.87#ibcon#about to read 3, iclass 36, count 0 2006.229.16:52:54.89#ibcon#read 3, iclass 36, count 0 2006.229.16:52:54.89#ibcon#about to read 4, iclass 36, count 0 2006.229.16:52:54.89#ibcon#read 4, iclass 36, count 0 2006.229.16:52:54.89#ibcon#about to read 5, iclass 36, count 0 2006.229.16:52:54.89#ibcon#read 5, iclass 36, count 0 2006.229.16:52:54.89#ibcon#about to read 6, iclass 36, count 0 2006.229.16:52:54.89#ibcon#read 6, iclass 36, count 0 2006.229.16:52:54.89#ibcon#end of sib2, iclass 36, count 0 2006.229.16:52:54.89#ibcon#*mode == 0, iclass 36, count 0 2006.229.16:52:54.89#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.16:52:54.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.16:52:54.89#ibcon#*before write, iclass 36, count 0 2006.229.16:52:54.89#ibcon#enter sib2, iclass 36, count 0 2006.229.16:52:54.89#ibcon#flushed, iclass 36, count 0 2006.229.16:52:54.89#ibcon#about to write, iclass 36, count 0 2006.229.16:52:54.89#ibcon#wrote, iclass 36, count 0 2006.229.16:52:54.89#ibcon#about to read 3, iclass 36, count 0 2006.229.16:52:54.93#ibcon#read 3, iclass 36, count 0 2006.229.16:52:54.93#ibcon#about to read 4, iclass 36, count 0 2006.229.16:52:54.93#ibcon#read 4, iclass 36, count 0 2006.229.16:52:54.93#ibcon#about to read 5, iclass 36, count 0 2006.229.16:52:54.93#ibcon#read 5, iclass 36, count 0 2006.229.16:52:54.93#ibcon#about to read 6, iclass 36, count 0 2006.229.16:52:54.93#ibcon#read 6, iclass 36, count 0 2006.229.16:52:54.93#ibcon#end of sib2, iclass 36, count 0 2006.229.16:52:54.93#ibcon#*after write, iclass 36, count 0 2006.229.16:52:54.93#ibcon#*before return 0, iclass 36, count 0 2006.229.16:52:54.93#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:54.93#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.16:52:54.93#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.16:52:54.93#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.16:52:54.93$vck44/vb=4,4 2006.229.16:52:54.93#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.16:52:54.93#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.16:52:54.93#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:54.93#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:54.99#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:54.99#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:54.99#ibcon#enter wrdev, iclass 38, count 2 2006.229.16:52:54.99#ibcon#first serial, iclass 38, count 2 2006.229.16:52:54.99#ibcon#enter sib2, iclass 38, count 2 2006.229.16:52:54.99#ibcon#flushed, iclass 38, count 2 2006.229.16:52:54.99#ibcon#about to write, iclass 38, count 2 2006.229.16:52:54.99#ibcon#wrote, iclass 38, count 2 2006.229.16:52:54.99#ibcon#about to read 3, iclass 38, count 2 2006.229.16:52:55.01#ibcon#read 3, iclass 38, count 2 2006.229.16:52:55.01#ibcon#about to read 4, iclass 38, count 2 2006.229.16:52:55.01#ibcon#read 4, iclass 38, count 2 2006.229.16:52:55.01#ibcon#about to read 5, iclass 38, count 2 2006.229.16:52:55.01#ibcon#read 5, iclass 38, count 2 2006.229.16:52:55.01#ibcon#about to read 6, iclass 38, count 2 2006.229.16:52:55.01#ibcon#read 6, iclass 38, count 2 2006.229.16:52:55.01#ibcon#end of sib2, iclass 38, count 2 2006.229.16:52:55.01#ibcon#*mode == 0, iclass 38, count 2 2006.229.16:52:55.01#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.16:52:55.01#ibcon#[27=AT04-04\r\n] 2006.229.16:52:55.01#ibcon#*before write, iclass 38, count 2 2006.229.16:52:55.01#ibcon#enter sib2, iclass 38, count 2 2006.229.16:52:55.01#ibcon#flushed, iclass 38, count 2 2006.229.16:52:55.01#ibcon#about to write, iclass 38, count 2 2006.229.16:52:55.01#ibcon#wrote, iclass 38, count 2 2006.229.16:52:55.01#ibcon#about to read 3, iclass 38, count 2 2006.229.16:52:55.04#ibcon#read 3, iclass 38, count 2 2006.229.16:52:55.04#ibcon#about to read 4, iclass 38, count 2 2006.229.16:52:55.04#ibcon#read 4, iclass 38, count 2 2006.229.16:52:55.04#ibcon#about to read 5, iclass 38, count 2 2006.229.16:52:55.04#ibcon#read 5, iclass 38, count 2 2006.229.16:52:55.04#ibcon#about to read 6, iclass 38, count 2 2006.229.16:52:55.04#ibcon#read 6, iclass 38, count 2 2006.229.16:52:55.04#ibcon#end of sib2, iclass 38, count 2 2006.229.16:52:55.04#ibcon#*after write, iclass 38, count 2 2006.229.16:52:55.04#ibcon#*before return 0, iclass 38, count 2 2006.229.16:52:55.04#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:55.04#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.16:52:55.04#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.16:52:55.04#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:55.04#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:55.16#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:55.16#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:55.16#ibcon#enter wrdev, iclass 38, count 0 2006.229.16:52:55.16#ibcon#first serial, iclass 38, count 0 2006.229.16:52:55.16#ibcon#enter sib2, iclass 38, count 0 2006.229.16:52:55.16#ibcon#flushed, iclass 38, count 0 2006.229.16:52:55.16#ibcon#about to write, iclass 38, count 0 2006.229.16:52:55.16#ibcon#wrote, iclass 38, count 0 2006.229.16:52:55.16#ibcon#about to read 3, iclass 38, count 0 2006.229.16:52:55.18#ibcon#read 3, iclass 38, count 0 2006.229.16:52:55.18#ibcon#about to read 4, iclass 38, count 0 2006.229.16:52:55.18#ibcon#read 4, iclass 38, count 0 2006.229.16:52:55.18#ibcon#about to read 5, iclass 38, count 0 2006.229.16:52:55.18#ibcon#read 5, iclass 38, count 0 2006.229.16:52:55.18#ibcon#about to read 6, iclass 38, count 0 2006.229.16:52:55.18#ibcon#read 6, iclass 38, count 0 2006.229.16:52:55.18#ibcon#end of sib2, iclass 38, count 0 2006.229.16:52:55.18#ibcon#*mode == 0, iclass 38, count 0 2006.229.16:52:55.18#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.16:52:55.18#ibcon#[27=USB\r\n] 2006.229.16:52:55.18#ibcon#*before write, iclass 38, count 0 2006.229.16:52:55.18#ibcon#enter sib2, iclass 38, count 0 2006.229.16:52:55.18#ibcon#flushed, iclass 38, count 0 2006.229.16:52:55.18#ibcon#about to write, iclass 38, count 0 2006.229.16:52:55.18#ibcon#wrote, iclass 38, count 0 2006.229.16:52:55.18#ibcon#about to read 3, iclass 38, count 0 2006.229.16:52:55.21#ibcon#read 3, iclass 38, count 0 2006.229.16:52:55.21#ibcon#about to read 4, iclass 38, count 0 2006.229.16:52:55.21#ibcon#read 4, iclass 38, count 0 2006.229.16:52:55.21#ibcon#about to read 5, iclass 38, count 0 2006.229.16:52:55.21#ibcon#read 5, iclass 38, count 0 2006.229.16:52:55.21#ibcon#about to read 6, iclass 38, count 0 2006.229.16:52:55.21#ibcon#read 6, iclass 38, count 0 2006.229.16:52:55.21#ibcon#end of sib2, iclass 38, count 0 2006.229.16:52:55.21#ibcon#*after write, iclass 38, count 0 2006.229.16:52:55.21#ibcon#*before return 0, iclass 38, count 0 2006.229.16:52:55.21#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:55.21#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.16:52:55.21#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.16:52:55.21#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.16:52:55.21$vck44/vblo=5,709.99 2006.229.16:52:55.21#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.16:52:55.21#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.16:52:55.21#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:55.21#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:55.21#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:55.21#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:55.21#ibcon#enter wrdev, iclass 40, count 0 2006.229.16:52:55.21#ibcon#first serial, iclass 40, count 0 2006.229.16:52:55.21#ibcon#enter sib2, iclass 40, count 0 2006.229.16:52:55.21#ibcon#flushed, iclass 40, count 0 2006.229.16:52:55.21#ibcon#about to write, iclass 40, count 0 2006.229.16:52:55.21#ibcon#wrote, iclass 40, count 0 2006.229.16:52:55.21#ibcon#about to read 3, iclass 40, count 0 2006.229.16:52:55.23#ibcon#read 3, iclass 40, count 0 2006.229.16:52:55.23#ibcon#about to read 4, iclass 40, count 0 2006.229.16:52:55.23#ibcon#read 4, iclass 40, count 0 2006.229.16:52:55.23#ibcon#about to read 5, iclass 40, count 0 2006.229.16:52:55.23#ibcon#read 5, iclass 40, count 0 2006.229.16:52:55.23#ibcon#about to read 6, iclass 40, count 0 2006.229.16:52:55.23#ibcon#read 6, iclass 40, count 0 2006.229.16:52:55.23#ibcon#end of sib2, iclass 40, count 0 2006.229.16:52:55.23#ibcon#*mode == 0, iclass 40, count 0 2006.229.16:52:55.23#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.16:52:55.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.16:52:55.23#ibcon#*before write, iclass 40, count 0 2006.229.16:52:55.23#ibcon#enter sib2, iclass 40, count 0 2006.229.16:52:55.23#ibcon#flushed, iclass 40, count 0 2006.229.16:52:55.23#ibcon#about to write, iclass 40, count 0 2006.229.16:52:55.23#ibcon#wrote, iclass 40, count 0 2006.229.16:52:55.23#ibcon#about to read 3, iclass 40, count 0 2006.229.16:52:55.27#ibcon#read 3, iclass 40, count 0 2006.229.16:52:55.27#ibcon#about to read 4, iclass 40, count 0 2006.229.16:52:55.27#ibcon#read 4, iclass 40, count 0 2006.229.16:52:55.27#ibcon#about to read 5, iclass 40, count 0 2006.229.16:52:55.27#ibcon#read 5, iclass 40, count 0 2006.229.16:52:55.27#ibcon#about to read 6, iclass 40, count 0 2006.229.16:52:55.27#ibcon#read 6, iclass 40, count 0 2006.229.16:52:55.27#ibcon#end of sib2, iclass 40, count 0 2006.229.16:52:55.27#ibcon#*after write, iclass 40, count 0 2006.229.16:52:55.27#ibcon#*before return 0, iclass 40, count 0 2006.229.16:52:55.27#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:55.27#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.16:52:55.27#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.16:52:55.27#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.16:52:55.27$vck44/vb=5,4 2006.229.16:52:55.27#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.16:52:55.27#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.16:52:55.27#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:55.27#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:55.33#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:55.33#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:55.33#ibcon#enter wrdev, iclass 4, count 2 2006.229.16:52:55.33#ibcon#first serial, iclass 4, count 2 2006.229.16:52:55.33#ibcon#enter sib2, iclass 4, count 2 2006.229.16:52:55.33#ibcon#flushed, iclass 4, count 2 2006.229.16:52:55.33#ibcon#about to write, iclass 4, count 2 2006.229.16:52:55.33#ibcon#wrote, iclass 4, count 2 2006.229.16:52:55.33#ibcon#about to read 3, iclass 4, count 2 2006.229.16:52:55.35#ibcon#read 3, iclass 4, count 2 2006.229.16:52:55.35#ibcon#about to read 4, iclass 4, count 2 2006.229.16:52:55.35#ibcon#read 4, iclass 4, count 2 2006.229.16:52:55.35#ibcon#about to read 5, iclass 4, count 2 2006.229.16:52:55.35#ibcon#read 5, iclass 4, count 2 2006.229.16:52:55.35#ibcon#about to read 6, iclass 4, count 2 2006.229.16:52:55.35#ibcon#read 6, iclass 4, count 2 2006.229.16:52:55.35#ibcon#end of sib2, iclass 4, count 2 2006.229.16:52:55.35#ibcon#*mode == 0, iclass 4, count 2 2006.229.16:52:55.35#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.16:52:55.35#ibcon#[27=AT05-04\r\n] 2006.229.16:52:55.35#ibcon#*before write, iclass 4, count 2 2006.229.16:52:55.35#ibcon#enter sib2, iclass 4, count 2 2006.229.16:52:55.35#ibcon#flushed, iclass 4, count 2 2006.229.16:52:55.35#ibcon#about to write, iclass 4, count 2 2006.229.16:52:55.35#ibcon#wrote, iclass 4, count 2 2006.229.16:52:55.35#ibcon#about to read 3, iclass 4, count 2 2006.229.16:52:55.38#ibcon#read 3, iclass 4, count 2 2006.229.16:52:55.38#ibcon#about to read 4, iclass 4, count 2 2006.229.16:52:55.38#ibcon#read 4, iclass 4, count 2 2006.229.16:52:55.38#ibcon#about to read 5, iclass 4, count 2 2006.229.16:52:55.38#ibcon#read 5, iclass 4, count 2 2006.229.16:52:55.38#ibcon#about to read 6, iclass 4, count 2 2006.229.16:52:55.38#ibcon#read 6, iclass 4, count 2 2006.229.16:52:55.38#ibcon#end of sib2, iclass 4, count 2 2006.229.16:52:55.38#ibcon#*after write, iclass 4, count 2 2006.229.16:52:55.38#ibcon#*before return 0, iclass 4, count 2 2006.229.16:52:55.38#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:55.38#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.16:52:55.38#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.16:52:55.38#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:55.38#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:55.50#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:55.50#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:55.50#ibcon#enter wrdev, iclass 4, count 0 2006.229.16:52:55.50#ibcon#first serial, iclass 4, count 0 2006.229.16:52:55.50#ibcon#enter sib2, iclass 4, count 0 2006.229.16:52:55.50#ibcon#flushed, iclass 4, count 0 2006.229.16:52:55.50#ibcon#about to write, iclass 4, count 0 2006.229.16:52:55.50#ibcon#wrote, iclass 4, count 0 2006.229.16:52:55.50#ibcon#about to read 3, iclass 4, count 0 2006.229.16:52:55.52#ibcon#read 3, iclass 4, count 0 2006.229.16:52:55.52#ibcon#about to read 4, iclass 4, count 0 2006.229.16:52:55.52#ibcon#read 4, iclass 4, count 0 2006.229.16:52:55.52#ibcon#about to read 5, iclass 4, count 0 2006.229.16:52:55.52#ibcon#read 5, iclass 4, count 0 2006.229.16:52:55.52#ibcon#about to read 6, iclass 4, count 0 2006.229.16:52:55.52#ibcon#read 6, iclass 4, count 0 2006.229.16:52:55.52#ibcon#end of sib2, iclass 4, count 0 2006.229.16:52:55.52#ibcon#*mode == 0, iclass 4, count 0 2006.229.16:52:55.52#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.16:52:55.52#ibcon#[27=USB\r\n] 2006.229.16:52:55.52#ibcon#*before write, iclass 4, count 0 2006.229.16:52:55.52#ibcon#enter sib2, iclass 4, count 0 2006.229.16:52:55.52#ibcon#flushed, iclass 4, count 0 2006.229.16:52:55.52#ibcon#about to write, iclass 4, count 0 2006.229.16:52:55.52#ibcon#wrote, iclass 4, count 0 2006.229.16:52:55.52#ibcon#about to read 3, iclass 4, count 0 2006.229.16:52:55.55#ibcon#read 3, iclass 4, count 0 2006.229.16:52:55.55#ibcon#about to read 4, iclass 4, count 0 2006.229.16:52:55.55#ibcon#read 4, iclass 4, count 0 2006.229.16:52:55.55#ibcon#about to read 5, iclass 4, count 0 2006.229.16:52:55.55#ibcon#read 5, iclass 4, count 0 2006.229.16:52:55.55#ibcon#about to read 6, iclass 4, count 0 2006.229.16:52:55.55#ibcon#read 6, iclass 4, count 0 2006.229.16:52:55.55#ibcon#end of sib2, iclass 4, count 0 2006.229.16:52:55.55#ibcon#*after write, iclass 4, count 0 2006.229.16:52:55.55#ibcon#*before return 0, iclass 4, count 0 2006.229.16:52:55.55#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:55.55#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.16:52:55.55#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.16:52:55.55#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.16:52:55.55$vck44/vblo=6,719.99 2006.229.16:52:55.55#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.16:52:55.55#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.16:52:55.55#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:55.55#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:55.55#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:55.55#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:55.55#ibcon#enter wrdev, iclass 6, count 0 2006.229.16:52:55.55#ibcon#first serial, iclass 6, count 0 2006.229.16:52:55.55#ibcon#enter sib2, iclass 6, count 0 2006.229.16:52:55.55#ibcon#flushed, iclass 6, count 0 2006.229.16:52:55.55#ibcon#about to write, iclass 6, count 0 2006.229.16:52:55.55#ibcon#wrote, iclass 6, count 0 2006.229.16:52:55.55#ibcon#about to read 3, iclass 6, count 0 2006.229.16:52:55.57#ibcon#read 3, iclass 6, count 0 2006.229.16:52:55.57#ibcon#about to read 4, iclass 6, count 0 2006.229.16:52:55.57#ibcon#read 4, iclass 6, count 0 2006.229.16:52:55.57#ibcon#about to read 5, iclass 6, count 0 2006.229.16:52:55.57#ibcon#read 5, iclass 6, count 0 2006.229.16:52:55.57#ibcon#about to read 6, iclass 6, count 0 2006.229.16:52:55.57#ibcon#read 6, iclass 6, count 0 2006.229.16:52:55.57#ibcon#end of sib2, iclass 6, count 0 2006.229.16:52:55.57#ibcon#*mode == 0, iclass 6, count 0 2006.229.16:52:55.57#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.16:52:55.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.16:52:55.57#ibcon#*before write, iclass 6, count 0 2006.229.16:52:55.57#ibcon#enter sib2, iclass 6, count 0 2006.229.16:52:55.57#ibcon#flushed, iclass 6, count 0 2006.229.16:52:55.57#ibcon#about to write, iclass 6, count 0 2006.229.16:52:55.57#ibcon#wrote, iclass 6, count 0 2006.229.16:52:55.57#ibcon#about to read 3, iclass 6, count 0 2006.229.16:52:55.61#ibcon#read 3, iclass 6, count 0 2006.229.16:52:55.61#ibcon#about to read 4, iclass 6, count 0 2006.229.16:52:55.61#ibcon#read 4, iclass 6, count 0 2006.229.16:52:55.61#ibcon#about to read 5, iclass 6, count 0 2006.229.16:52:55.61#ibcon#read 5, iclass 6, count 0 2006.229.16:52:55.61#ibcon#about to read 6, iclass 6, count 0 2006.229.16:52:55.61#ibcon#read 6, iclass 6, count 0 2006.229.16:52:55.61#ibcon#end of sib2, iclass 6, count 0 2006.229.16:52:55.61#ibcon#*after write, iclass 6, count 0 2006.229.16:52:55.61#ibcon#*before return 0, iclass 6, count 0 2006.229.16:52:55.61#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:55.61#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.16:52:55.61#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.16:52:55.61#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.16:52:55.61$vck44/vb=6,4 2006.229.16:52:55.61#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.16:52:55.61#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.16:52:55.61#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:55.61#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:55.67#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:55.67#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:55.67#ibcon#enter wrdev, iclass 10, count 2 2006.229.16:52:55.67#ibcon#first serial, iclass 10, count 2 2006.229.16:52:55.67#ibcon#enter sib2, iclass 10, count 2 2006.229.16:52:55.67#ibcon#flushed, iclass 10, count 2 2006.229.16:52:55.67#ibcon#about to write, iclass 10, count 2 2006.229.16:52:55.67#ibcon#wrote, iclass 10, count 2 2006.229.16:52:55.67#ibcon#about to read 3, iclass 10, count 2 2006.229.16:52:55.69#ibcon#read 3, iclass 10, count 2 2006.229.16:52:55.69#ibcon#about to read 4, iclass 10, count 2 2006.229.16:52:55.69#ibcon#read 4, iclass 10, count 2 2006.229.16:52:55.69#ibcon#about to read 5, iclass 10, count 2 2006.229.16:52:55.69#ibcon#read 5, iclass 10, count 2 2006.229.16:52:55.69#ibcon#about to read 6, iclass 10, count 2 2006.229.16:52:55.69#ibcon#read 6, iclass 10, count 2 2006.229.16:52:55.69#ibcon#end of sib2, iclass 10, count 2 2006.229.16:52:55.69#ibcon#*mode == 0, iclass 10, count 2 2006.229.16:52:55.69#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.16:52:55.69#ibcon#[27=AT06-04\r\n] 2006.229.16:52:55.69#ibcon#*before write, iclass 10, count 2 2006.229.16:52:55.69#ibcon#enter sib2, iclass 10, count 2 2006.229.16:52:55.69#ibcon#flushed, iclass 10, count 2 2006.229.16:52:55.69#ibcon#about to write, iclass 10, count 2 2006.229.16:52:55.69#ibcon#wrote, iclass 10, count 2 2006.229.16:52:55.69#ibcon#about to read 3, iclass 10, count 2 2006.229.16:52:55.72#ibcon#read 3, iclass 10, count 2 2006.229.16:52:55.72#ibcon#about to read 4, iclass 10, count 2 2006.229.16:52:55.72#ibcon#read 4, iclass 10, count 2 2006.229.16:52:55.72#ibcon#about to read 5, iclass 10, count 2 2006.229.16:52:55.72#ibcon#read 5, iclass 10, count 2 2006.229.16:52:55.72#ibcon#about to read 6, iclass 10, count 2 2006.229.16:52:55.72#ibcon#read 6, iclass 10, count 2 2006.229.16:52:55.72#ibcon#end of sib2, iclass 10, count 2 2006.229.16:52:55.72#ibcon#*after write, iclass 10, count 2 2006.229.16:52:55.72#ibcon#*before return 0, iclass 10, count 2 2006.229.16:52:55.72#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:55.72#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.16:52:55.72#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.16:52:55.72#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:55.72#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:55.84#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:55.84#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:55.84#ibcon#enter wrdev, iclass 10, count 0 2006.229.16:52:55.84#ibcon#first serial, iclass 10, count 0 2006.229.16:52:55.84#ibcon#enter sib2, iclass 10, count 0 2006.229.16:52:55.84#ibcon#flushed, iclass 10, count 0 2006.229.16:52:55.84#ibcon#about to write, iclass 10, count 0 2006.229.16:52:55.84#ibcon#wrote, iclass 10, count 0 2006.229.16:52:55.84#ibcon#about to read 3, iclass 10, count 0 2006.229.16:52:55.86#ibcon#read 3, iclass 10, count 0 2006.229.16:52:55.86#ibcon#about to read 4, iclass 10, count 0 2006.229.16:52:55.86#ibcon#read 4, iclass 10, count 0 2006.229.16:52:55.86#ibcon#about to read 5, iclass 10, count 0 2006.229.16:52:55.86#ibcon#read 5, iclass 10, count 0 2006.229.16:52:55.86#ibcon#about to read 6, iclass 10, count 0 2006.229.16:52:55.86#ibcon#read 6, iclass 10, count 0 2006.229.16:52:55.86#ibcon#end of sib2, iclass 10, count 0 2006.229.16:52:55.86#ibcon#*mode == 0, iclass 10, count 0 2006.229.16:52:55.86#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.16:52:55.86#ibcon#[27=USB\r\n] 2006.229.16:52:55.86#ibcon#*before write, iclass 10, count 0 2006.229.16:52:55.86#ibcon#enter sib2, iclass 10, count 0 2006.229.16:52:55.86#ibcon#flushed, iclass 10, count 0 2006.229.16:52:55.86#ibcon#about to write, iclass 10, count 0 2006.229.16:52:55.86#ibcon#wrote, iclass 10, count 0 2006.229.16:52:55.86#ibcon#about to read 3, iclass 10, count 0 2006.229.16:52:55.89#ibcon#read 3, iclass 10, count 0 2006.229.16:52:55.89#ibcon#about to read 4, iclass 10, count 0 2006.229.16:52:55.89#ibcon#read 4, iclass 10, count 0 2006.229.16:52:55.89#ibcon#about to read 5, iclass 10, count 0 2006.229.16:52:55.89#ibcon#read 5, iclass 10, count 0 2006.229.16:52:55.89#ibcon#about to read 6, iclass 10, count 0 2006.229.16:52:55.89#ibcon#read 6, iclass 10, count 0 2006.229.16:52:55.89#ibcon#end of sib2, iclass 10, count 0 2006.229.16:52:55.89#ibcon#*after write, iclass 10, count 0 2006.229.16:52:55.89#ibcon#*before return 0, iclass 10, count 0 2006.229.16:52:55.89#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:55.89#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.16:52:55.89#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.16:52:55.89#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.16:52:55.89$vck44/vblo=7,734.99 2006.229.16:52:55.89#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.16:52:55.89#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.16:52:55.89#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:55.89#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:55.89#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:55.89#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:55.89#ibcon#enter wrdev, iclass 12, count 0 2006.229.16:52:55.89#ibcon#first serial, iclass 12, count 0 2006.229.16:52:55.89#ibcon#enter sib2, iclass 12, count 0 2006.229.16:52:55.89#ibcon#flushed, iclass 12, count 0 2006.229.16:52:55.89#ibcon#about to write, iclass 12, count 0 2006.229.16:52:55.89#ibcon#wrote, iclass 12, count 0 2006.229.16:52:55.89#ibcon#about to read 3, iclass 12, count 0 2006.229.16:52:55.91#ibcon#read 3, iclass 12, count 0 2006.229.16:52:55.91#ibcon#about to read 4, iclass 12, count 0 2006.229.16:52:55.91#ibcon#read 4, iclass 12, count 0 2006.229.16:52:55.91#ibcon#about to read 5, iclass 12, count 0 2006.229.16:52:55.91#ibcon#read 5, iclass 12, count 0 2006.229.16:52:55.91#ibcon#about to read 6, iclass 12, count 0 2006.229.16:52:55.91#ibcon#read 6, iclass 12, count 0 2006.229.16:52:55.91#ibcon#end of sib2, iclass 12, count 0 2006.229.16:52:55.91#ibcon#*mode == 0, iclass 12, count 0 2006.229.16:52:55.91#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.16:52:55.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.16:52:55.91#ibcon#*before write, iclass 12, count 0 2006.229.16:52:55.91#ibcon#enter sib2, iclass 12, count 0 2006.229.16:52:55.91#ibcon#flushed, iclass 12, count 0 2006.229.16:52:55.91#ibcon#about to write, iclass 12, count 0 2006.229.16:52:55.91#ibcon#wrote, iclass 12, count 0 2006.229.16:52:55.91#ibcon#about to read 3, iclass 12, count 0 2006.229.16:52:55.95#ibcon#read 3, iclass 12, count 0 2006.229.16:52:55.95#ibcon#about to read 4, iclass 12, count 0 2006.229.16:52:55.95#ibcon#read 4, iclass 12, count 0 2006.229.16:52:55.95#ibcon#about to read 5, iclass 12, count 0 2006.229.16:52:55.95#ibcon#read 5, iclass 12, count 0 2006.229.16:52:55.95#ibcon#about to read 6, iclass 12, count 0 2006.229.16:52:55.95#ibcon#read 6, iclass 12, count 0 2006.229.16:52:55.95#ibcon#end of sib2, iclass 12, count 0 2006.229.16:52:55.95#ibcon#*after write, iclass 12, count 0 2006.229.16:52:55.95#ibcon#*before return 0, iclass 12, count 0 2006.229.16:52:55.95#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:55.95#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.16:52:55.95#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.16:52:55.95#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.16:52:55.95$vck44/vb=7,4 2006.229.16:52:55.95#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.16:52:55.95#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.16:52:55.95#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:55.95#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:56.01#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:56.01#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:56.01#ibcon#enter wrdev, iclass 14, count 2 2006.229.16:52:56.01#ibcon#first serial, iclass 14, count 2 2006.229.16:52:56.01#ibcon#enter sib2, iclass 14, count 2 2006.229.16:52:56.01#ibcon#flushed, iclass 14, count 2 2006.229.16:52:56.01#ibcon#about to write, iclass 14, count 2 2006.229.16:52:56.01#ibcon#wrote, iclass 14, count 2 2006.229.16:52:56.01#ibcon#about to read 3, iclass 14, count 2 2006.229.16:52:56.03#ibcon#read 3, iclass 14, count 2 2006.229.16:52:56.03#ibcon#about to read 4, iclass 14, count 2 2006.229.16:52:56.03#ibcon#read 4, iclass 14, count 2 2006.229.16:52:56.03#ibcon#about to read 5, iclass 14, count 2 2006.229.16:52:56.03#ibcon#read 5, iclass 14, count 2 2006.229.16:52:56.03#ibcon#about to read 6, iclass 14, count 2 2006.229.16:52:56.03#ibcon#read 6, iclass 14, count 2 2006.229.16:52:56.03#ibcon#end of sib2, iclass 14, count 2 2006.229.16:52:56.03#ibcon#*mode == 0, iclass 14, count 2 2006.229.16:52:56.03#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.16:52:56.03#ibcon#[27=AT07-04\r\n] 2006.229.16:52:56.03#ibcon#*before write, iclass 14, count 2 2006.229.16:52:56.03#ibcon#enter sib2, iclass 14, count 2 2006.229.16:52:56.03#ibcon#flushed, iclass 14, count 2 2006.229.16:52:56.03#ibcon#about to write, iclass 14, count 2 2006.229.16:52:56.03#ibcon#wrote, iclass 14, count 2 2006.229.16:52:56.03#ibcon#about to read 3, iclass 14, count 2 2006.229.16:52:56.06#ibcon#read 3, iclass 14, count 2 2006.229.16:52:56.06#ibcon#about to read 4, iclass 14, count 2 2006.229.16:52:56.06#ibcon#read 4, iclass 14, count 2 2006.229.16:52:56.06#ibcon#about to read 5, iclass 14, count 2 2006.229.16:52:56.06#ibcon#read 5, iclass 14, count 2 2006.229.16:52:56.06#ibcon#about to read 6, iclass 14, count 2 2006.229.16:52:56.06#ibcon#read 6, iclass 14, count 2 2006.229.16:52:56.06#ibcon#end of sib2, iclass 14, count 2 2006.229.16:52:56.06#ibcon#*after write, iclass 14, count 2 2006.229.16:52:56.06#ibcon#*before return 0, iclass 14, count 2 2006.229.16:52:56.06#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:56.06#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.16:52:56.06#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.16:52:56.06#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:56.06#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:56.18#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:56.18#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:56.18#ibcon#enter wrdev, iclass 14, count 0 2006.229.16:52:56.18#ibcon#first serial, iclass 14, count 0 2006.229.16:52:56.18#ibcon#enter sib2, iclass 14, count 0 2006.229.16:52:56.18#ibcon#flushed, iclass 14, count 0 2006.229.16:52:56.18#ibcon#about to write, iclass 14, count 0 2006.229.16:52:56.18#ibcon#wrote, iclass 14, count 0 2006.229.16:52:56.18#ibcon#about to read 3, iclass 14, count 0 2006.229.16:52:56.20#ibcon#read 3, iclass 14, count 0 2006.229.16:52:56.20#ibcon#about to read 4, iclass 14, count 0 2006.229.16:52:56.20#ibcon#read 4, iclass 14, count 0 2006.229.16:52:56.20#ibcon#about to read 5, iclass 14, count 0 2006.229.16:52:56.20#ibcon#read 5, iclass 14, count 0 2006.229.16:52:56.20#ibcon#about to read 6, iclass 14, count 0 2006.229.16:52:56.20#ibcon#read 6, iclass 14, count 0 2006.229.16:52:56.20#ibcon#end of sib2, iclass 14, count 0 2006.229.16:52:56.20#ibcon#*mode == 0, iclass 14, count 0 2006.229.16:52:56.20#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.16:52:56.20#ibcon#[27=USB\r\n] 2006.229.16:52:56.20#ibcon#*before write, iclass 14, count 0 2006.229.16:52:56.20#ibcon#enter sib2, iclass 14, count 0 2006.229.16:52:56.20#ibcon#flushed, iclass 14, count 0 2006.229.16:52:56.20#ibcon#about to write, iclass 14, count 0 2006.229.16:52:56.20#ibcon#wrote, iclass 14, count 0 2006.229.16:52:56.20#ibcon#about to read 3, iclass 14, count 0 2006.229.16:52:56.23#ibcon#read 3, iclass 14, count 0 2006.229.16:52:56.23#ibcon#about to read 4, iclass 14, count 0 2006.229.16:52:56.23#ibcon#read 4, iclass 14, count 0 2006.229.16:52:56.23#ibcon#about to read 5, iclass 14, count 0 2006.229.16:52:56.23#ibcon#read 5, iclass 14, count 0 2006.229.16:52:56.23#ibcon#about to read 6, iclass 14, count 0 2006.229.16:52:56.23#ibcon#read 6, iclass 14, count 0 2006.229.16:52:56.23#ibcon#end of sib2, iclass 14, count 0 2006.229.16:52:56.23#ibcon#*after write, iclass 14, count 0 2006.229.16:52:56.23#ibcon#*before return 0, iclass 14, count 0 2006.229.16:52:56.23#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:56.23#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.16:52:56.23#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.16:52:56.23#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.16:52:56.23$vck44/vblo=8,744.99 2006.229.16:52:56.23#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.16:52:56.23#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.16:52:56.23#ibcon#ireg 17 cls_cnt 0 2006.229.16:52:56.23#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:56.23#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:56.23#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:56.23#ibcon#enter wrdev, iclass 16, count 0 2006.229.16:52:56.23#ibcon#first serial, iclass 16, count 0 2006.229.16:52:56.23#ibcon#enter sib2, iclass 16, count 0 2006.229.16:52:56.23#ibcon#flushed, iclass 16, count 0 2006.229.16:52:56.23#ibcon#about to write, iclass 16, count 0 2006.229.16:52:56.23#ibcon#wrote, iclass 16, count 0 2006.229.16:52:56.23#ibcon#about to read 3, iclass 16, count 0 2006.229.16:52:56.25#ibcon#read 3, iclass 16, count 0 2006.229.16:52:56.25#ibcon#about to read 4, iclass 16, count 0 2006.229.16:52:56.25#ibcon#read 4, iclass 16, count 0 2006.229.16:52:56.25#ibcon#about to read 5, iclass 16, count 0 2006.229.16:52:56.25#ibcon#read 5, iclass 16, count 0 2006.229.16:52:56.25#ibcon#about to read 6, iclass 16, count 0 2006.229.16:52:56.25#ibcon#read 6, iclass 16, count 0 2006.229.16:52:56.25#ibcon#end of sib2, iclass 16, count 0 2006.229.16:52:56.25#ibcon#*mode == 0, iclass 16, count 0 2006.229.16:52:56.25#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.16:52:56.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.16:52:56.25#ibcon#*before write, iclass 16, count 0 2006.229.16:52:56.25#ibcon#enter sib2, iclass 16, count 0 2006.229.16:52:56.25#ibcon#flushed, iclass 16, count 0 2006.229.16:52:56.25#ibcon#about to write, iclass 16, count 0 2006.229.16:52:56.25#ibcon#wrote, iclass 16, count 0 2006.229.16:52:56.25#ibcon#about to read 3, iclass 16, count 0 2006.229.16:52:56.29#ibcon#read 3, iclass 16, count 0 2006.229.16:52:56.29#ibcon#about to read 4, iclass 16, count 0 2006.229.16:52:56.29#ibcon#read 4, iclass 16, count 0 2006.229.16:52:56.29#ibcon#about to read 5, iclass 16, count 0 2006.229.16:52:56.29#ibcon#read 5, iclass 16, count 0 2006.229.16:52:56.29#ibcon#about to read 6, iclass 16, count 0 2006.229.16:52:56.29#ibcon#read 6, iclass 16, count 0 2006.229.16:52:56.29#ibcon#end of sib2, iclass 16, count 0 2006.229.16:52:56.29#ibcon#*after write, iclass 16, count 0 2006.229.16:52:56.29#ibcon#*before return 0, iclass 16, count 0 2006.229.16:52:56.29#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:56.29#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.16:52:56.29#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.16:52:56.29#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.16:52:56.29$vck44/vb=8,4 2006.229.16:52:56.29#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.16:52:56.29#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.16:52:56.29#ibcon#ireg 11 cls_cnt 2 2006.229.16:52:56.29#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:56.35#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:56.35#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:56.35#ibcon#enter wrdev, iclass 18, count 2 2006.229.16:52:56.35#ibcon#first serial, iclass 18, count 2 2006.229.16:52:56.35#ibcon#enter sib2, iclass 18, count 2 2006.229.16:52:56.35#ibcon#flushed, iclass 18, count 2 2006.229.16:52:56.35#ibcon#about to write, iclass 18, count 2 2006.229.16:52:56.35#ibcon#wrote, iclass 18, count 2 2006.229.16:52:56.35#ibcon#about to read 3, iclass 18, count 2 2006.229.16:52:56.37#ibcon#read 3, iclass 18, count 2 2006.229.16:52:56.37#ibcon#about to read 4, iclass 18, count 2 2006.229.16:52:56.37#ibcon#read 4, iclass 18, count 2 2006.229.16:52:56.37#ibcon#about to read 5, iclass 18, count 2 2006.229.16:52:56.37#ibcon#read 5, iclass 18, count 2 2006.229.16:52:56.37#ibcon#about to read 6, iclass 18, count 2 2006.229.16:52:56.37#ibcon#read 6, iclass 18, count 2 2006.229.16:52:56.37#ibcon#end of sib2, iclass 18, count 2 2006.229.16:52:56.37#ibcon#*mode == 0, iclass 18, count 2 2006.229.16:52:56.37#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.16:52:56.37#ibcon#[27=AT08-04\r\n] 2006.229.16:52:56.37#ibcon#*before write, iclass 18, count 2 2006.229.16:52:56.37#ibcon#enter sib2, iclass 18, count 2 2006.229.16:52:56.37#ibcon#flushed, iclass 18, count 2 2006.229.16:52:56.37#ibcon#about to write, iclass 18, count 2 2006.229.16:52:56.37#ibcon#wrote, iclass 18, count 2 2006.229.16:52:56.37#ibcon#about to read 3, iclass 18, count 2 2006.229.16:52:56.40#ibcon#read 3, iclass 18, count 2 2006.229.16:52:56.40#ibcon#about to read 4, iclass 18, count 2 2006.229.16:52:56.40#ibcon#read 4, iclass 18, count 2 2006.229.16:52:56.40#ibcon#about to read 5, iclass 18, count 2 2006.229.16:52:56.40#ibcon#read 5, iclass 18, count 2 2006.229.16:52:56.40#ibcon#about to read 6, iclass 18, count 2 2006.229.16:52:56.40#ibcon#read 6, iclass 18, count 2 2006.229.16:52:56.40#ibcon#end of sib2, iclass 18, count 2 2006.229.16:52:56.40#ibcon#*after write, iclass 18, count 2 2006.229.16:52:56.40#ibcon#*before return 0, iclass 18, count 2 2006.229.16:52:56.40#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:56.40#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.16:52:56.40#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.16:52:56.40#ibcon#ireg 7 cls_cnt 0 2006.229.16:52:56.40#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:56.52#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:56.52#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:56.52#ibcon#enter wrdev, iclass 18, count 0 2006.229.16:52:56.52#ibcon#first serial, iclass 18, count 0 2006.229.16:52:56.52#ibcon#enter sib2, iclass 18, count 0 2006.229.16:52:56.52#ibcon#flushed, iclass 18, count 0 2006.229.16:52:56.52#ibcon#about to write, iclass 18, count 0 2006.229.16:52:56.52#ibcon#wrote, iclass 18, count 0 2006.229.16:52:56.52#ibcon#about to read 3, iclass 18, count 0 2006.229.16:52:56.54#ibcon#read 3, iclass 18, count 0 2006.229.16:52:56.54#ibcon#about to read 4, iclass 18, count 0 2006.229.16:52:56.54#ibcon#read 4, iclass 18, count 0 2006.229.16:52:56.54#ibcon#about to read 5, iclass 18, count 0 2006.229.16:52:56.54#ibcon#read 5, iclass 18, count 0 2006.229.16:52:56.54#ibcon#about to read 6, iclass 18, count 0 2006.229.16:52:56.54#ibcon#read 6, iclass 18, count 0 2006.229.16:52:56.54#ibcon#end of sib2, iclass 18, count 0 2006.229.16:52:56.54#ibcon#*mode == 0, iclass 18, count 0 2006.229.16:52:56.54#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.16:52:56.54#ibcon#[27=USB\r\n] 2006.229.16:52:56.54#ibcon#*before write, iclass 18, count 0 2006.229.16:52:56.54#ibcon#enter sib2, iclass 18, count 0 2006.229.16:52:56.54#ibcon#flushed, iclass 18, count 0 2006.229.16:52:56.54#ibcon#about to write, iclass 18, count 0 2006.229.16:52:56.54#ibcon#wrote, iclass 18, count 0 2006.229.16:52:56.54#ibcon#about to read 3, iclass 18, count 0 2006.229.16:52:56.57#ibcon#read 3, iclass 18, count 0 2006.229.16:52:56.57#ibcon#about to read 4, iclass 18, count 0 2006.229.16:52:56.57#ibcon#read 4, iclass 18, count 0 2006.229.16:52:56.57#ibcon#about to read 5, iclass 18, count 0 2006.229.16:52:56.57#ibcon#read 5, iclass 18, count 0 2006.229.16:52:56.57#ibcon#about to read 6, iclass 18, count 0 2006.229.16:52:56.57#ibcon#read 6, iclass 18, count 0 2006.229.16:52:56.57#ibcon#end of sib2, iclass 18, count 0 2006.229.16:52:56.57#ibcon#*after write, iclass 18, count 0 2006.229.16:52:56.57#ibcon#*before return 0, iclass 18, count 0 2006.229.16:52:56.57#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:56.57#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.16:52:56.57#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.16:52:56.57#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.16:52:56.57$vck44/vabw=wide 2006.229.16:52:56.57#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.16:52:56.57#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.16:52:56.57#ibcon#ireg 8 cls_cnt 0 2006.229.16:52:56.57#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:56.57#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:56.57#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:56.57#ibcon#enter wrdev, iclass 20, count 0 2006.229.16:52:56.57#ibcon#first serial, iclass 20, count 0 2006.229.16:52:56.57#ibcon#enter sib2, iclass 20, count 0 2006.229.16:52:56.57#ibcon#flushed, iclass 20, count 0 2006.229.16:52:56.57#ibcon#about to write, iclass 20, count 0 2006.229.16:52:56.57#ibcon#wrote, iclass 20, count 0 2006.229.16:52:56.57#ibcon#about to read 3, iclass 20, count 0 2006.229.16:52:56.59#ibcon#read 3, iclass 20, count 0 2006.229.16:52:56.59#ibcon#about to read 4, iclass 20, count 0 2006.229.16:52:56.59#ibcon#read 4, iclass 20, count 0 2006.229.16:52:56.59#ibcon#about to read 5, iclass 20, count 0 2006.229.16:52:56.59#ibcon#read 5, iclass 20, count 0 2006.229.16:52:56.59#ibcon#about to read 6, iclass 20, count 0 2006.229.16:52:56.59#ibcon#read 6, iclass 20, count 0 2006.229.16:52:56.59#ibcon#end of sib2, iclass 20, count 0 2006.229.16:52:56.59#ibcon#*mode == 0, iclass 20, count 0 2006.229.16:52:56.59#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.16:52:56.59#ibcon#[25=BW32\r\n] 2006.229.16:52:56.59#ibcon#*before write, iclass 20, count 0 2006.229.16:52:56.59#ibcon#enter sib2, iclass 20, count 0 2006.229.16:52:56.59#ibcon#flushed, iclass 20, count 0 2006.229.16:52:56.59#ibcon#about to write, iclass 20, count 0 2006.229.16:52:56.59#ibcon#wrote, iclass 20, count 0 2006.229.16:52:56.59#ibcon#about to read 3, iclass 20, count 0 2006.229.16:52:56.62#ibcon#read 3, iclass 20, count 0 2006.229.16:52:56.62#ibcon#about to read 4, iclass 20, count 0 2006.229.16:52:56.62#ibcon#read 4, iclass 20, count 0 2006.229.16:52:56.62#ibcon#about to read 5, iclass 20, count 0 2006.229.16:52:56.62#ibcon#read 5, iclass 20, count 0 2006.229.16:52:56.62#ibcon#about to read 6, iclass 20, count 0 2006.229.16:52:56.62#ibcon#read 6, iclass 20, count 0 2006.229.16:52:56.62#ibcon#end of sib2, iclass 20, count 0 2006.229.16:52:56.62#ibcon#*after write, iclass 20, count 0 2006.229.16:52:56.62#ibcon#*before return 0, iclass 20, count 0 2006.229.16:52:56.62#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:56.62#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.16:52:56.62#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.16:52:56.62#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.16:52:56.62$vck44/vbbw=wide 2006.229.16:52:56.62#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.16:52:56.62#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.16:52:56.62#ibcon#ireg 8 cls_cnt 0 2006.229.16:52:56.62#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:52:56.69#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:52:56.69#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:52:56.69#ibcon#enter wrdev, iclass 22, count 0 2006.229.16:52:56.69#ibcon#first serial, iclass 22, count 0 2006.229.16:52:56.69#ibcon#enter sib2, iclass 22, count 0 2006.229.16:52:56.69#ibcon#flushed, iclass 22, count 0 2006.229.16:52:56.69#ibcon#about to write, iclass 22, count 0 2006.229.16:52:56.69#ibcon#wrote, iclass 22, count 0 2006.229.16:52:56.69#ibcon#about to read 3, iclass 22, count 0 2006.229.16:52:56.71#ibcon#read 3, iclass 22, count 0 2006.229.16:52:56.71#ibcon#about to read 4, iclass 22, count 0 2006.229.16:52:56.71#ibcon#read 4, iclass 22, count 0 2006.229.16:52:56.71#ibcon#about to read 5, iclass 22, count 0 2006.229.16:52:56.71#ibcon#read 5, iclass 22, count 0 2006.229.16:52:56.71#ibcon#about to read 6, iclass 22, count 0 2006.229.16:52:56.71#ibcon#read 6, iclass 22, count 0 2006.229.16:52:56.71#ibcon#end of sib2, iclass 22, count 0 2006.229.16:52:56.71#ibcon#*mode == 0, iclass 22, count 0 2006.229.16:52:56.71#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.16:52:56.71#ibcon#[27=BW32\r\n] 2006.229.16:52:56.71#ibcon#*before write, iclass 22, count 0 2006.229.16:52:56.71#ibcon#enter sib2, iclass 22, count 0 2006.229.16:52:56.71#ibcon#flushed, iclass 22, count 0 2006.229.16:52:56.71#ibcon#about to write, iclass 22, count 0 2006.229.16:52:56.71#ibcon#wrote, iclass 22, count 0 2006.229.16:52:56.71#ibcon#about to read 3, iclass 22, count 0 2006.229.16:52:56.74#ibcon#read 3, iclass 22, count 0 2006.229.16:52:56.74#ibcon#about to read 4, iclass 22, count 0 2006.229.16:52:56.74#ibcon#read 4, iclass 22, count 0 2006.229.16:52:56.74#ibcon#about to read 5, iclass 22, count 0 2006.229.16:52:56.74#ibcon#read 5, iclass 22, count 0 2006.229.16:52:56.74#ibcon#about to read 6, iclass 22, count 0 2006.229.16:52:56.74#ibcon#read 6, iclass 22, count 0 2006.229.16:52:56.74#ibcon#end of sib2, iclass 22, count 0 2006.229.16:52:56.74#ibcon#*after write, iclass 22, count 0 2006.229.16:52:56.74#ibcon#*before return 0, iclass 22, count 0 2006.229.16:52:56.74#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:52:56.74#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.16:52:56.74#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.16:52:56.74#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.16:52:56.74$setupk4/ifdk4 2006.229.16:52:56.74$ifdk4/lo= 2006.229.16:52:56.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.16:52:56.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.16:52:56.74$ifdk4/patch= 2006.229.16:52:56.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.16:52:56.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.16:52:56.74$setupk4/!*+20s 2006.229.16:52:57.52#abcon#<5=/05 1.2 1.9 27.041001001.8\r\n> 2006.229.16:52:57.54#abcon#{5=INTERFACE CLEAR} 2006.229.16:52:57.60#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:53:05.14#trakl#Source acquired 2006.229.16:53:07.14#flagr#flagr/antenna,acquired 2006.229.16:53:07.69#abcon#<5=/05 1.2 1.9 27.041001001.7\r\n> 2006.229.16:53:07.71#abcon#{5=INTERFACE CLEAR} 2006.229.16:53:07.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.16:53:11.25$setupk4/"tpicd 2006.229.16:53:11.25$setupk4/echo=off 2006.229.16:53:11.25$setupk4/xlog=off 2006.229.16:53:11.25:!2006.229.16:58:47 2006.229.16:58:47.00:preob 2006.229.16:58:47.13/onsource/TRACKING 2006.229.16:58:47.13:!2006.229.16:58:57 2006.229.16:58:57.00:"tape 2006.229.16:58:57.00:"st=record 2006.229.16:58:57.00:data_valid=on 2006.229.16:58:57.00:midob 2006.229.16:58:58.13/onsource/TRACKING 2006.229.16:58:58.13/wx/27.00,1001.8,100 2006.229.16:58:58.27/cable/+6.4154E-03 2006.229.16:58:59.36/va/01,08,usb,yes,29,32 2006.229.16:58:59.36/va/02,07,usb,yes,32,32 2006.229.16:58:59.36/va/03,06,usb,yes,39,42 2006.229.16:58:59.36/va/04,07,usb,yes,33,34 2006.229.16:58:59.36/va/05,04,usb,yes,29,30 2006.229.16:58:59.36/va/06,04,usb,yes,33,33 2006.229.16:58:59.36/va/07,05,usb,yes,29,30 2006.229.16:58:59.36/va/08,06,usb,yes,21,26 2006.229.16:58:59.59/valo/01,524.99,yes,locked 2006.229.16:58:59.59/valo/02,534.99,yes,locked 2006.229.16:58:59.59/valo/03,564.99,yes,locked 2006.229.16:58:59.59/valo/04,624.99,yes,locked 2006.229.16:58:59.59/valo/05,734.99,yes,locked 2006.229.16:58:59.59/valo/06,814.99,yes,locked 2006.229.16:58:59.59/valo/07,864.99,yes,locked 2006.229.16:58:59.59/valo/08,884.99,yes,locked 2006.229.16:59:00.68/vb/01,04,usb,yes,31,29 2006.229.16:59:00.68/vb/02,04,usb,yes,33,33 2006.229.16:59:00.68/vb/03,04,usb,yes,30,33 2006.229.16:59:00.68/vb/04,04,usb,yes,35,33 2006.229.16:59:00.68/vb/05,04,usb,yes,27,29 2006.229.16:59:00.68/vb/06,04,usb,yes,31,27 2006.229.16:59:00.68/vb/07,04,usb,yes,31,31 2006.229.16:59:00.68/vb/08,04,usb,yes,29,32 2006.229.16:59:00.92/vblo/01,629.99,yes,locked 2006.229.16:59:00.92/vblo/02,634.99,yes,locked 2006.229.16:59:00.92/vblo/03,649.99,yes,locked 2006.229.16:59:00.92/vblo/04,679.99,yes,locked 2006.229.16:59:00.92/vblo/05,709.99,yes,locked 2006.229.16:59:00.92/vblo/06,719.99,yes,locked 2006.229.16:59:00.92/vblo/07,734.99,yes,locked 2006.229.16:59:00.92/vblo/08,744.99,yes,locked 2006.229.16:59:01.07/vabw/8 2006.229.16:59:01.22/vbbw/8 2006.229.16:59:01.31/xfe/off,on,12.2 2006.229.16:59:01.69/ifatt/23,28,28,28 2006.229.16:59:02.08/fmout-gps/S +4.46E-07 2006.229.16:59:02.12:!2006.229.17:00:07 2006.229.17:00:07.00:data_valid=off 2006.229.17:00:07.00:"et 2006.229.17:00:07.00:!+3s 2006.229.17:00:10.01:"tape 2006.229.17:00:10.01:postob 2006.229.17:00:10.15/cable/+6.4150E-03 2006.229.17:00:10.15/wx/26.98,1001.8,100 2006.229.17:00:11.08/fmout-gps/S +4.47E-07 2006.229.17:00:11.08:scan_name=229-1701,jd0608,170 2006.229.17:00:11.08:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.17:00:12.14#flagr#flagr/antenna,new-source 2006.229.17:00:12.14:checkk5 2006.229.17:00:12.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:00:12.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:00:13.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:00:13.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:00:14.10/chk_obsdata//k5ts1/T2291658??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.17:00:14.49/chk_obsdata//k5ts2/T2291658??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.17:00:14.87/chk_obsdata//k5ts3/T2291658??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.17:00:15.28/chk_obsdata//k5ts4/T2291658??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.17:00:15.99/k5log//k5ts1_log_newline 2006.229.17:00:16.70/k5log//k5ts2_log_newline 2006.229.17:00:17.42/k5log//k5ts3_log_newline 2006.229.17:00:18.12/k5log//k5ts4_log_newline 2006.229.17:00:18.14/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:00:18.14:setupk4=1 2006.229.17:00:18.14$setupk4/echo=on 2006.229.17:00:18.14$setupk4/pcalon 2006.229.17:00:18.14$pcalon/"no phase cal control is implemented here 2006.229.17:00:18.14$setupk4/"tpicd=stop 2006.229.17:00:18.14$setupk4/"rec=synch_on 2006.229.17:00:18.14$setupk4/"rec_mode=128 2006.229.17:00:18.14$setupk4/!* 2006.229.17:00:18.14$setupk4/recpk4 2006.229.17:00:18.14$recpk4/recpatch= 2006.229.17:00:18.14$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:00:18.14$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:00:18.14$setupk4/vck44 2006.229.17:00:18.14$vck44/valo=1,524.99 2006.229.17:00:18.14#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.17:00:18.14#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.17:00:18.14#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:18.14#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:18.14#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:18.14#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:18.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:00:18.14#ibcon#first serial, iclass 18, count 0 2006.229.17:00:18.14#ibcon#enter sib2, iclass 18, count 0 2006.229.17:00:18.14#ibcon#flushed, iclass 18, count 0 2006.229.17:00:18.14#ibcon#about to write, iclass 18, count 0 2006.229.17:00:18.14#ibcon#wrote, iclass 18, count 0 2006.229.17:00:18.14#ibcon#about to read 3, iclass 18, count 0 2006.229.17:00:18.16#ibcon#read 3, iclass 18, count 0 2006.229.17:00:18.16#ibcon#about to read 4, iclass 18, count 0 2006.229.17:00:18.16#ibcon#read 4, iclass 18, count 0 2006.229.17:00:18.16#ibcon#about to read 5, iclass 18, count 0 2006.229.17:00:18.16#ibcon#read 5, iclass 18, count 0 2006.229.17:00:18.16#ibcon#about to read 6, iclass 18, count 0 2006.229.17:00:18.16#ibcon#read 6, iclass 18, count 0 2006.229.17:00:18.16#ibcon#end of sib2, iclass 18, count 0 2006.229.17:00:18.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:00:18.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:00:18.16#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:00:18.16#ibcon#*before write, iclass 18, count 0 2006.229.17:00:18.16#ibcon#enter sib2, iclass 18, count 0 2006.229.17:00:18.16#ibcon#flushed, iclass 18, count 0 2006.229.17:00:18.16#ibcon#about to write, iclass 18, count 0 2006.229.17:00:18.16#ibcon#wrote, iclass 18, count 0 2006.229.17:00:18.16#ibcon#about to read 3, iclass 18, count 0 2006.229.17:00:18.21#ibcon#read 3, iclass 18, count 0 2006.229.17:00:18.21#ibcon#about to read 4, iclass 18, count 0 2006.229.17:00:18.21#ibcon#read 4, iclass 18, count 0 2006.229.17:00:18.21#ibcon#about to read 5, iclass 18, count 0 2006.229.17:00:18.21#ibcon#read 5, iclass 18, count 0 2006.229.17:00:18.21#ibcon#about to read 6, iclass 18, count 0 2006.229.17:00:18.21#ibcon#read 6, iclass 18, count 0 2006.229.17:00:18.21#ibcon#end of sib2, iclass 18, count 0 2006.229.17:00:18.21#ibcon#*after write, iclass 18, count 0 2006.229.17:00:18.21#ibcon#*before return 0, iclass 18, count 0 2006.229.17:00:18.21#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:18.21#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:18.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:00:18.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:00:18.21$vck44/va=1,8 2006.229.17:00:18.21#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.17:00:18.21#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.17:00:18.21#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:18.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:18.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:18.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:18.21#ibcon#enter wrdev, iclass 20, count 2 2006.229.17:00:18.21#ibcon#first serial, iclass 20, count 2 2006.229.17:00:18.21#ibcon#enter sib2, iclass 20, count 2 2006.229.17:00:18.21#ibcon#flushed, iclass 20, count 2 2006.229.17:00:18.21#ibcon#about to write, iclass 20, count 2 2006.229.17:00:18.21#ibcon#wrote, iclass 20, count 2 2006.229.17:00:18.21#ibcon#about to read 3, iclass 20, count 2 2006.229.17:00:18.23#ibcon#read 3, iclass 20, count 2 2006.229.17:00:18.23#ibcon#about to read 4, iclass 20, count 2 2006.229.17:00:18.23#ibcon#read 4, iclass 20, count 2 2006.229.17:00:18.23#ibcon#about to read 5, iclass 20, count 2 2006.229.17:00:18.23#ibcon#read 5, iclass 20, count 2 2006.229.17:00:18.23#ibcon#about to read 6, iclass 20, count 2 2006.229.17:00:18.23#ibcon#read 6, iclass 20, count 2 2006.229.17:00:18.23#ibcon#end of sib2, iclass 20, count 2 2006.229.17:00:18.23#ibcon#*mode == 0, iclass 20, count 2 2006.229.17:00:18.23#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.17:00:18.23#ibcon#[25=AT01-08\r\n] 2006.229.17:00:18.23#ibcon#*before write, iclass 20, count 2 2006.229.17:00:18.23#ibcon#enter sib2, iclass 20, count 2 2006.229.17:00:18.23#ibcon#flushed, iclass 20, count 2 2006.229.17:00:18.23#ibcon#about to write, iclass 20, count 2 2006.229.17:00:18.23#ibcon#wrote, iclass 20, count 2 2006.229.17:00:18.23#ibcon#about to read 3, iclass 20, count 2 2006.229.17:00:18.26#ibcon#read 3, iclass 20, count 2 2006.229.17:00:18.26#ibcon#about to read 4, iclass 20, count 2 2006.229.17:00:18.26#ibcon#read 4, iclass 20, count 2 2006.229.17:00:18.26#ibcon#about to read 5, iclass 20, count 2 2006.229.17:00:18.26#ibcon#read 5, iclass 20, count 2 2006.229.17:00:18.26#ibcon#about to read 6, iclass 20, count 2 2006.229.17:00:18.26#ibcon#read 6, iclass 20, count 2 2006.229.17:00:18.26#ibcon#end of sib2, iclass 20, count 2 2006.229.17:00:18.26#ibcon#*after write, iclass 20, count 2 2006.229.17:00:18.26#ibcon#*before return 0, iclass 20, count 2 2006.229.17:00:18.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:18.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:18.26#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.17:00:18.26#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:18.26#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:18.38#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:18.38#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:18.38#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:00:18.38#ibcon#first serial, iclass 20, count 0 2006.229.17:00:18.38#ibcon#enter sib2, iclass 20, count 0 2006.229.17:00:18.38#ibcon#flushed, iclass 20, count 0 2006.229.17:00:18.38#ibcon#about to write, iclass 20, count 0 2006.229.17:00:18.38#ibcon#wrote, iclass 20, count 0 2006.229.17:00:18.38#ibcon#about to read 3, iclass 20, count 0 2006.229.17:00:18.40#ibcon#read 3, iclass 20, count 0 2006.229.17:00:18.40#ibcon#about to read 4, iclass 20, count 0 2006.229.17:00:18.40#ibcon#read 4, iclass 20, count 0 2006.229.17:00:18.40#ibcon#about to read 5, iclass 20, count 0 2006.229.17:00:18.40#ibcon#read 5, iclass 20, count 0 2006.229.17:00:18.40#ibcon#about to read 6, iclass 20, count 0 2006.229.17:00:18.40#ibcon#read 6, iclass 20, count 0 2006.229.17:00:18.40#ibcon#end of sib2, iclass 20, count 0 2006.229.17:00:18.40#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:00:18.40#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:00:18.40#ibcon#[25=USB\r\n] 2006.229.17:00:18.40#ibcon#*before write, iclass 20, count 0 2006.229.17:00:18.40#ibcon#enter sib2, iclass 20, count 0 2006.229.17:00:18.40#ibcon#flushed, iclass 20, count 0 2006.229.17:00:18.40#ibcon#about to write, iclass 20, count 0 2006.229.17:00:18.40#ibcon#wrote, iclass 20, count 0 2006.229.17:00:18.40#ibcon#about to read 3, iclass 20, count 0 2006.229.17:00:18.43#ibcon#read 3, iclass 20, count 0 2006.229.17:00:18.43#ibcon#about to read 4, iclass 20, count 0 2006.229.17:00:18.43#ibcon#read 4, iclass 20, count 0 2006.229.17:00:18.43#ibcon#about to read 5, iclass 20, count 0 2006.229.17:00:18.43#ibcon#read 5, iclass 20, count 0 2006.229.17:00:18.43#ibcon#about to read 6, iclass 20, count 0 2006.229.17:00:18.43#ibcon#read 6, iclass 20, count 0 2006.229.17:00:18.43#ibcon#end of sib2, iclass 20, count 0 2006.229.17:00:18.43#ibcon#*after write, iclass 20, count 0 2006.229.17:00:18.43#ibcon#*before return 0, iclass 20, count 0 2006.229.17:00:18.43#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:18.43#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:18.43#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:00:18.43#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:00:18.43$vck44/valo=2,534.99 2006.229.17:00:18.43#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:00:18.43#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:00:18.43#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:18.43#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:18.43#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:18.43#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:18.43#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:00:18.43#ibcon#first serial, iclass 22, count 0 2006.229.17:00:18.43#ibcon#enter sib2, iclass 22, count 0 2006.229.17:00:18.43#ibcon#flushed, iclass 22, count 0 2006.229.17:00:18.43#ibcon#about to write, iclass 22, count 0 2006.229.17:00:18.43#ibcon#wrote, iclass 22, count 0 2006.229.17:00:18.43#ibcon#about to read 3, iclass 22, count 0 2006.229.17:00:18.45#ibcon#read 3, iclass 22, count 0 2006.229.17:00:18.45#ibcon#about to read 4, iclass 22, count 0 2006.229.17:00:18.45#ibcon#read 4, iclass 22, count 0 2006.229.17:00:18.45#ibcon#about to read 5, iclass 22, count 0 2006.229.17:00:18.45#ibcon#read 5, iclass 22, count 0 2006.229.17:00:18.45#ibcon#about to read 6, iclass 22, count 0 2006.229.17:00:18.45#ibcon#read 6, iclass 22, count 0 2006.229.17:00:18.45#ibcon#end of sib2, iclass 22, count 0 2006.229.17:00:18.45#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:00:18.45#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:00:18.45#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:00:18.45#ibcon#*before write, iclass 22, count 0 2006.229.17:00:18.45#ibcon#enter sib2, iclass 22, count 0 2006.229.17:00:18.45#ibcon#flushed, iclass 22, count 0 2006.229.17:00:18.45#ibcon#about to write, iclass 22, count 0 2006.229.17:00:18.45#ibcon#wrote, iclass 22, count 0 2006.229.17:00:18.45#ibcon#about to read 3, iclass 22, count 0 2006.229.17:00:18.49#ibcon#read 3, iclass 22, count 0 2006.229.17:00:18.49#ibcon#about to read 4, iclass 22, count 0 2006.229.17:00:18.49#ibcon#read 4, iclass 22, count 0 2006.229.17:00:18.49#ibcon#about to read 5, iclass 22, count 0 2006.229.17:00:18.49#ibcon#read 5, iclass 22, count 0 2006.229.17:00:18.49#ibcon#about to read 6, iclass 22, count 0 2006.229.17:00:18.49#ibcon#read 6, iclass 22, count 0 2006.229.17:00:18.49#ibcon#end of sib2, iclass 22, count 0 2006.229.17:00:18.49#ibcon#*after write, iclass 22, count 0 2006.229.17:00:18.49#ibcon#*before return 0, iclass 22, count 0 2006.229.17:00:18.49#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:18.49#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:18.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:00:18.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:00:18.49$vck44/va=2,7 2006.229.17:00:18.49#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.17:00:18.49#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.17:00:18.49#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:18.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:18.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:18.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:18.55#ibcon#enter wrdev, iclass 24, count 2 2006.229.17:00:18.55#ibcon#first serial, iclass 24, count 2 2006.229.17:00:18.55#ibcon#enter sib2, iclass 24, count 2 2006.229.17:00:18.55#ibcon#flushed, iclass 24, count 2 2006.229.17:00:18.55#ibcon#about to write, iclass 24, count 2 2006.229.17:00:18.55#ibcon#wrote, iclass 24, count 2 2006.229.17:00:18.55#ibcon#about to read 3, iclass 24, count 2 2006.229.17:00:18.57#ibcon#read 3, iclass 24, count 2 2006.229.17:00:18.57#ibcon#about to read 4, iclass 24, count 2 2006.229.17:00:18.57#ibcon#read 4, iclass 24, count 2 2006.229.17:00:18.57#ibcon#about to read 5, iclass 24, count 2 2006.229.17:00:18.57#ibcon#read 5, iclass 24, count 2 2006.229.17:00:18.57#ibcon#about to read 6, iclass 24, count 2 2006.229.17:00:18.57#ibcon#read 6, iclass 24, count 2 2006.229.17:00:18.57#ibcon#end of sib2, iclass 24, count 2 2006.229.17:00:18.57#ibcon#*mode == 0, iclass 24, count 2 2006.229.17:00:18.57#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.17:00:18.57#ibcon#[25=AT02-07\r\n] 2006.229.17:00:18.57#ibcon#*before write, iclass 24, count 2 2006.229.17:00:18.57#ibcon#enter sib2, iclass 24, count 2 2006.229.17:00:18.57#ibcon#flushed, iclass 24, count 2 2006.229.17:00:18.57#ibcon#about to write, iclass 24, count 2 2006.229.17:00:18.57#ibcon#wrote, iclass 24, count 2 2006.229.17:00:18.57#ibcon#about to read 3, iclass 24, count 2 2006.229.17:00:18.60#ibcon#read 3, iclass 24, count 2 2006.229.17:00:18.60#ibcon#about to read 4, iclass 24, count 2 2006.229.17:00:18.60#ibcon#read 4, iclass 24, count 2 2006.229.17:00:18.60#ibcon#about to read 5, iclass 24, count 2 2006.229.17:00:18.60#ibcon#read 5, iclass 24, count 2 2006.229.17:00:18.60#ibcon#about to read 6, iclass 24, count 2 2006.229.17:00:18.60#ibcon#read 6, iclass 24, count 2 2006.229.17:00:18.60#ibcon#end of sib2, iclass 24, count 2 2006.229.17:00:18.60#ibcon#*after write, iclass 24, count 2 2006.229.17:00:18.60#ibcon#*before return 0, iclass 24, count 2 2006.229.17:00:18.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:18.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:18.60#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.17:00:18.60#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:18.60#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:18.72#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:18.72#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:18.72#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:00:18.72#ibcon#first serial, iclass 24, count 0 2006.229.17:00:18.72#ibcon#enter sib2, iclass 24, count 0 2006.229.17:00:18.72#ibcon#flushed, iclass 24, count 0 2006.229.17:00:18.72#ibcon#about to write, iclass 24, count 0 2006.229.17:00:18.72#ibcon#wrote, iclass 24, count 0 2006.229.17:00:18.72#ibcon#about to read 3, iclass 24, count 0 2006.229.17:00:18.74#ibcon#read 3, iclass 24, count 0 2006.229.17:00:18.74#ibcon#about to read 4, iclass 24, count 0 2006.229.17:00:18.74#ibcon#read 4, iclass 24, count 0 2006.229.17:00:18.74#ibcon#about to read 5, iclass 24, count 0 2006.229.17:00:18.74#ibcon#read 5, iclass 24, count 0 2006.229.17:00:18.74#ibcon#about to read 6, iclass 24, count 0 2006.229.17:00:18.74#ibcon#read 6, iclass 24, count 0 2006.229.17:00:18.74#ibcon#end of sib2, iclass 24, count 0 2006.229.17:00:18.74#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:00:18.74#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:00:18.74#ibcon#[25=USB\r\n] 2006.229.17:00:18.74#ibcon#*before write, iclass 24, count 0 2006.229.17:00:18.74#ibcon#enter sib2, iclass 24, count 0 2006.229.17:00:18.74#ibcon#flushed, iclass 24, count 0 2006.229.17:00:18.74#ibcon#about to write, iclass 24, count 0 2006.229.17:00:18.74#ibcon#wrote, iclass 24, count 0 2006.229.17:00:18.74#ibcon#about to read 3, iclass 24, count 0 2006.229.17:00:18.77#ibcon#read 3, iclass 24, count 0 2006.229.17:00:18.77#ibcon#about to read 4, iclass 24, count 0 2006.229.17:00:18.77#ibcon#read 4, iclass 24, count 0 2006.229.17:00:18.77#ibcon#about to read 5, iclass 24, count 0 2006.229.17:00:18.77#ibcon#read 5, iclass 24, count 0 2006.229.17:00:18.77#ibcon#about to read 6, iclass 24, count 0 2006.229.17:00:18.77#ibcon#read 6, iclass 24, count 0 2006.229.17:00:18.77#ibcon#end of sib2, iclass 24, count 0 2006.229.17:00:18.77#ibcon#*after write, iclass 24, count 0 2006.229.17:00:18.77#ibcon#*before return 0, iclass 24, count 0 2006.229.17:00:18.77#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:18.77#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:18.77#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:00:18.77#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:00:18.77$vck44/valo=3,564.99 2006.229.17:00:18.77#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.17:00:18.77#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.17:00:18.77#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:18.77#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:18.77#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:18.77#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:18.77#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:00:18.77#ibcon#first serial, iclass 26, count 0 2006.229.17:00:18.77#ibcon#enter sib2, iclass 26, count 0 2006.229.17:00:18.77#ibcon#flushed, iclass 26, count 0 2006.229.17:00:18.77#ibcon#about to write, iclass 26, count 0 2006.229.17:00:18.77#ibcon#wrote, iclass 26, count 0 2006.229.17:00:18.77#ibcon#about to read 3, iclass 26, count 0 2006.229.17:00:18.79#ibcon#read 3, iclass 26, count 0 2006.229.17:00:18.79#ibcon#about to read 4, iclass 26, count 0 2006.229.17:00:18.79#ibcon#read 4, iclass 26, count 0 2006.229.17:00:18.79#ibcon#about to read 5, iclass 26, count 0 2006.229.17:00:18.79#ibcon#read 5, iclass 26, count 0 2006.229.17:00:18.79#ibcon#about to read 6, iclass 26, count 0 2006.229.17:00:18.79#ibcon#read 6, iclass 26, count 0 2006.229.17:00:18.79#ibcon#end of sib2, iclass 26, count 0 2006.229.17:00:18.79#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:00:18.79#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:00:18.79#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:00:18.79#ibcon#*before write, iclass 26, count 0 2006.229.17:00:18.79#ibcon#enter sib2, iclass 26, count 0 2006.229.17:00:18.79#ibcon#flushed, iclass 26, count 0 2006.229.17:00:18.79#ibcon#about to write, iclass 26, count 0 2006.229.17:00:18.79#ibcon#wrote, iclass 26, count 0 2006.229.17:00:18.79#ibcon#about to read 3, iclass 26, count 0 2006.229.17:00:18.83#ibcon#read 3, iclass 26, count 0 2006.229.17:00:18.83#ibcon#about to read 4, iclass 26, count 0 2006.229.17:00:18.83#ibcon#read 4, iclass 26, count 0 2006.229.17:00:18.83#ibcon#about to read 5, iclass 26, count 0 2006.229.17:00:18.83#ibcon#read 5, iclass 26, count 0 2006.229.17:00:18.83#ibcon#about to read 6, iclass 26, count 0 2006.229.17:00:18.83#ibcon#read 6, iclass 26, count 0 2006.229.17:00:18.83#ibcon#end of sib2, iclass 26, count 0 2006.229.17:00:18.83#ibcon#*after write, iclass 26, count 0 2006.229.17:00:18.83#ibcon#*before return 0, iclass 26, count 0 2006.229.17:00:18.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:18.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:18.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:00:18.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:00:18.83$vck44/va=3,6 2006.229.17:00:18.83#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.17:00:18.83#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.17:00:18.83#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:18.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:18.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:18.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:18.89#ibcon#enter wrdev, iclass 28, count 2 2006.229.17:00:18.89#ibcon#first serial, iclass 28, count 2 2006.229.17:00:18.89#ibcon#enter sib2, iclass 28, count 2 2006.229.17:00:18.89#ibcon#flushed, iclass 28, count 2 2006.229.17:00:18.89#ibcon#about to write, iclass 28, count 2 2006.229.17:00:18.89#ibcon#wrote, iclass 28, count 2 2006.229.17:00:18.89#ibcon#about to read 3, iclass 28, count 2 2006.229.17:00:18.91#ibcon#read 3, iclass 28, count 2 2006.229.17:00:18.91#ibcon#about to read 4, iclass 28, count 2 2006.229.17:00:18.91#ibcon#read 4, iclass 28, count 2 2006.229.17:00:18.91#ibcon#about to read 5, iclass 28, count 2 2006.229.17:00:18.91#ibcon#read 5, iclass 28, count 2 2006.229.17:00:18.91#ibcon#about to read 6, iclass 28, count 2 2006.229.17:00:18.91#ibcon#read 6, iclass 28, count 2 2006.229.17:00:18.91#ibcon#end of sib2, iclass 28, count 2 2006.229.17:00:18.91#ibcon#*mode == 0, iclass 28, count 2 2006.229.17:00:18.91#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.17:00:18.91#ibcon#[25=AT03-06\r\n] 2006.229.17:00:18.91#ibcon#*before write, iclass 28, count 2 2006.229.17:00:18.91#ibcon#enter sib2, iclass 28, count 2 2006.229.17:00:18.91#ibcon#flushed, iclass 28, count 2 2006.229.17:00:18.91#ibcon#about to write, iclass 28, count 2 2006.229.17:00:18.91#ibcon#wrote, iclass 28, count 2 2006.229.17:00:18.91#ibcon#about to read 3, iclass 28, count 2 2006.229.17:00:18.94#ibcon#read 3, iclass 28, count 2 2006.229.17:00:18.94#ibcon#about to read 4, iclass 28, count 2 2006.229.17:00:18.94#ibcon#read 4, iclass 28, count 2 2006.229.17:00:18.94#ibcon#about to read 5, iclass 28, count 2 2006.229.17:00:18.94#ibcon#read 5, iclass 28, count 2 2006.229.17:00:18.94#ibcon#about to read 6, iclass 28, count 2 2006.229.17:00:18.94#ibcon#read 6, iclass 28, count 2 2006.229.17:00:18.94#ibcon#end of sib2, iclass 28, count 2 2006.229.17:00:18.94#ibcon#*after write, iclass 28, count 2 2006.229.17:00:18.94#ibcon#*before return 0, iclass 28, count 2 2006.229.17:00:18.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:18.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:18.94#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.17:00:18.94#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:18.94#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:19.06#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:19.06#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:19.06#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:00:19.06#ibcon#first serial, iclass 28, count 0 2006.229.17:00:19.06#ibcon#enter sib2, iclass 28, count 0 2006.229.17:00:19.06#ibcon#flushed, iclass 28, count 0 2006.229.17:00:19.06#ibcon#about to write, iclass 28, count 0 2006.229.17:00:19.06#ibcon#wrote, iclass 28, count 0 2006.229.17:00:19.06#ibcon#about to read 3, iclass 28, count 0 2006.229.17:00:19.08#ibcon#read 3, iclass 28, count 0 2006.229.17:00:19.08#ibcon#about to read 4, iclass 28, count 0 2006.229.17:00:19.08#ibcon#read 4, iclass 28, count 0 2006.229.17:00:19.08#ibcon#about to read 5, iclass 28, count 0 2006.229.17:00:19.08#ibcon#read 5, iclass 28, count 0 2006.229.17:00:19.08#ibcon#about to read 6, iclass 28, count 0 2006.229.17:00:19.08#ibcon#read 6, iclass 28, count 0 2006.229.17:00:19.08#ibcon#end of sib2, iclass 28, count 0 2006.229.17:00:19.08#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:00:19.08#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:00:19.08#ibcon#[25=USB\r\n] 2006.229.17:00:19.08#ibcon#*before write, iclass 28, count 0 2006.229.17:00:19.08#ibcon#enter sib2, iclass 28, count 0 2006.229.17:00:19.08#ibcon#flushed, iclass 28, count 0 2006.229.17:00:19.08#ibcon#about to write, iclass 28, count 0 2006.229.17:00:19.08#ibcon#wrote, iclass 28, count 0 2006.229.17:00:19.08#ibcon#about to read 3, iclass 28, count 0 2006.229.17:00:19.11#ibcon#read 3, iclass 28, count 0 2006.229.17:00:19.11#ibcon#about to read 4, iclass 28, count 0 2006.229.17:00:19.11#ibcon#read 4, iclass 28, count 0 2006.229.17:00:19.11#ibcon#about to read 5, iclass 28, count 0 2006.229.17:00:19.11#ibcon#read 5, iclass 28, count 0 2006.229.17:00:19.11#ibcon#about to read 6, iclass 28, count 0 2006.229.17:00:19.11#ibcon#read 6, iclass 28, count 0 2006.229.17:00:19.11#ibcon#end of sib2, iclass 28, count 0 2006.229.17:00:19.11#ibcon#*after write, iclass 28, count 0 2006.229.17:00:19.11#ibcon#*before return 0, iclass 28, count 0 2006.229.17:00:19.11#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:19.11#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:19.11#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:00:19.11#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:00:19.11$vck44/valo=4,624.99 2006.229.17:00:19.11#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:00:19.11#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:00:19.11#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:19.11#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:19.11#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:19.11#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:19.11#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:00:19.11#ibcon#first serial, iclass 30, count 0 2006.229.17:00:19.11#ibcon#enter sib2, iclass 30, count 0 2006.229.17:00:19.11#ibcon#flushed, iclass 30, count 0 2006.229.17:00:19.11#ibcon#about to write, iclass 30, count 0 2006.229.17:00:19.11#ibcon#wrote, iclass 30, count 0 2006.229.17:00:19.11#ibcon#about to read 3, iclass 30, count 0 2006.229.17:00:19.13#ibcon#read 3, iclass 30, count 0 2006.229.17:00:19.13#ibcon#about to read 4, iclass 30, count 0 2006.229.17:00:19.13#ibcon#read 4, iclass 30, count 0 2006.229.17:00:19.13#ibcon#about to read 5, iclass 30, count 0 2006.229.17:00:19.13#ibcon#read 5, iclass 30, count 0 2006.229.17:00:19.13#ibcon#about to read 6, iclass 30, count 0 2006.229.17:00:19.13#ibcon#read 6, iclass 30, count 0 2006.229.17:00:19.13#ibcon#end of sib2, iclass 30, count 0 2006.229.17:00:19.13#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:00:19.13#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:00:19.13#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:00:19.13#ibcon#*before write, iclass 30, count 0 2006.229.17:00:19.13#ibcon#enter sib2, iclass 30, count 0 2006.229.17:00:19.13#ibcon#flushed, iclass 30, count 0 2006.229.17:00:19.13#ibcon#about to write, iclass 30, count 0 2006.229.17:00:19.13#ibcon#wrote, iclass 30, count 0 2006.229.17:00:19.13#ibcon#about to read 3, iclass 30, count 0 2006.229.17:00:19.17#ibcon#read 3, iclass 30, count 0 2006.229.17:00:19.17#ibcon#about to read 4, iclass 30, count 0 2006.229.17:00:19.17#ibcon#read 4, iclass 30, count 0 2006.229.17:00:19.17#ibcon#about to read 5, iclass 30, count 0 2006.229.17:00:19.17#ibcon#read 5, iclass 30, count 0 2006.229.17:00:19.17#ibcon#about to read 6, iclass 30, count 0 2006.229.17:00:19.17#ibcon#read 6, iclass 30, count 0 2006.229.17:00:19.17#ibcon#end of sib2, iclass 30, count 0 2006.229.17:00:19.17#ibcon#*after write, iclass 30, count 0 2006.229.17:00:19.17#ibcon#*before return 0, iclass 30, count 0 2006.229.17:00:19.17#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:19.17#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:19.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:00:19.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:00:19.17$vck44/va=4,7 2006.229.17:00:19.17#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.17:00:19.17#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.17:00:19.17#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:19.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:19.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:19.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:19.23#ibcon#enter wrdev, iclass 32, count 2 2006.229.17:00:19.23#ibcon#first serial, iclass 32, count 2 2006.229.17:00:19.23#ibcon#enter sib2, iclass 32, count 2 2006.229.17:00:19.23#ibcon#flushed, iclass 32, count 2 2006.229.17:00:19.23#ibcon#about to write, iclass 32, count 2 2006.229.17:00:19.23#ibcon#wrote, iclass 32, count 2 2006.229.17:00:19.23#ibcon#about to read 3, iclass 32, count 2 2006.229.17:00:19.25#ibcon#read 3, iclass 32, count 2 2006.229.17:00:19.25#ibcon#about to read 4, iclass 32, count 2 2006.229.17:00:19.25#ibcon#read 4, iclass 32, count 2 2006.229.17:00:19.25#ibcon#about to read 5, iclass 32, count 2 2006.229.17:00:19.25#ibcon#read 5, iclass 32, count 2 2006.229.17:00:19.25#ibcon#about to read 6, iclass 32, count 2 2006.229.17:00:19.25#ibcon#read 6, iclass 32, count 2 2006.229.17:00:19.25#ibcon#end of sib2, iclass 32, count 2 2006.229.17:00:19.25#ibcon#*mode == 0, iclass 32, count 2 2006.229.17:00:19.25#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.17:00:19.25#ibcon#[25=AT04-07\r\n] 2006.229.17:00:19.25#ibcon#*before write, iclass 32, count 2 2006.229.17:00:19.25#ibcon#enter sib2, iclass 32, count 2 2006.229.17:00:19.25#ibcon#flushed, iclass 32, count 2 2006.229.17:00:19.25#ibcon#about to write, iclass 32, count 2 2006.229.17:00:19.25#ibcon#wrote, iclass 32, count 2 2006.229.17:00:19.25#ibcon#about to read 3, iclass 32, count 2 2006.229.17:00:19.28#ibcon#read 3, iclass 32, count 2 2006.229.17:00:19.28#ibcon#about to read 4, iclass 32, count 2 2006.229.17:00:19.28#ibcon#read 4, iclass 32, count 2 2006.229.17:00:19.28#ibcon#about to read 5, iclass 32, count 2 2006.229.17:00:19.28#ibcon#read 5, iclass 32, count 2 2006.229.17:00:19.28#ibcon#about to read 6, iclass 32, count 2 2006.229.17:00:19.28#ibcon#read 6, iclass 32, count 2 2006.229.17:00:19.28#ibcon#end of sib2, iclass 32, count 2 2006.229.17:00:19.28#ibcon#*after write, iclass 32, count 2 2006.229.17:00:19.28#ibcon#*before return 0, iclass 32, count 2 2006.229.17:00:19.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:19.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:19.28#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.17:00:19.28#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:19.28#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:19.40#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:19.40#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:19.40#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:00:19.40#ibcon#first serial, iclass 32, count 0 2006.229.17:00:19.40#ibcon#enter sib2, iclass 32, count 0 2006.229.17:00:19.40#ibcon#flushed, iclass 32, count 0 2006.229.17:00:19.40#ibcon#about to write, iclass 32, count 0 2006.229.17:00:19.40#ibcon#wrote, iclass 32, count 0 2006.229.17:00:19.40#ibcon#about to read 3, iclass 32, count 0 2006.229.17:00:19.42#ibcon#read 3, iclass 32, count 0 2006.229.17:00:19.42#ibcon#about to read 4, iclass 32, count 0 2006.229.17:00:19.42#ibcon#read 4, iclass 32, count 0 2006.229.17:00:19.42#ibcon#about to read 5, iclass 32, count 0 2006.229.17:00:19.42#ibcon#read 5, iclass 32, count 0 2006.229.17:00:19.42#ibcon#about to read 6, iclass 32, count 0 2006.229.17:00:19.42#ibcon#read 6, iclass 32, count 0 2006.229.17:00:19.42#ibcon#end of sib2, iclass 32, count 0 2006.229.17:00:19.42#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:00:19.42#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:00:19.42#ibcon#[25=USB\r\n] 2006.229.17:00:19.42#ibcon#*before write, iclass 32, count 0 2006.229.17:00:19.42#ibcon#enter sib2, iclass 32, count 0 2006.229.17:00:19.42#ibcon#flushed, iclass 32, count 0 2006.229.17:00:19.42#ibcon#about to write, iclass 32, count 0 2006.229.17:00:19.42#ibcon#wrote, iclass 32, count 0 2006.229.17:00:19.42#ibcon#about to read 3, iclass 32, count 0 2006.229.17:00:19.45#ibcon#read 3, iclass 32, count 0 2006.229.17:00:19.45#ibcon#about to read 4, iclass 32, count 0 2006.229.17:00:19.45#ibcon#read 4, iclass 32, count 0 2006.229.17:00:19.45#ibcon#about to read 5, iclass 32, count 0 2006.229.17:00:19.45#ibcon#read 5, iclass 32, count 0 2006.229.17:00:19.45#ibcon#about to read 6, iclass 32, count 0 2006.229.17:00:19.45#ibcon#read 6, iclass 32, count 0 2006.229.17:00:19.45#ibcon#end of sib2, iclass 32, count 0 2006.229.17:00:19.45#ibcon#*after write, iclass 32, count 0 2006.229.17:00:19.45#ibcon#*before return 0, iclass 32, count 0 2006.229.17:00:19.45#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:19.45#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:19.45#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:00:19.45#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:00:19.45$vck44/valo=5,734.99 2006.229.17:00:19.45#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.17:00:19.45#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.17:00:19.45#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:19.45#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:19.45#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:19.45#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:19.45#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:00:19.45#ibcon#first serial, iclass 34, count 0 2006.229.17:00:19.45#ibcon#enter sib2, iclass 34, count 0 2006.229.17:00:19.45#ibcon#flushed, iclass 34, count 0 2006.229.17:00:19.45#ibcon#about to write, iclass 34, count 0 2006.229.17:00:19.45#ibcon#wrote, iclass 34, count 0 2006.229.17:00:19.45#ibcon#about to read 3, iclass 34, count 0 2006.229.17:00:19.47#ibcon#read 3, iclass 34, count 0 2006.229.17:00:19.47#ibcon#about to read 4, iclass 34, count 0 2006.229.17:00:19.47#ibcon#read 4, iclass 34, count 0 2006.229.17:00:19.47#ibcon#about to read 5, iclass 34, count 0 2006.229.17:00:19.47#ibcon#read 5, iclass 34, count 0 2006.229.17:00:19.47#ibcon#about to read 6, iclass 34, count 0 2006.229.17:00:19.47#ibcon#read 6, iclass 34, count 0 2006.229.17:00:19.47#ibcon#end of sib2, iclass 34, count 0 2006.229.17:00:19.47#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:00:19.47#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:00:19.47#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:00:19.47#ibcon#*before write, iclass 34, count 0 2006.229.17:00:19.47#ibcon#enter sib2, iclass 34, count 0 2006.229.17:00:19.47#ibcon#flushed, iclass 34, count 0 2006.229.17:00:19.47#ibcon#about to write, iclass 34, count 0 2006.229.17:00:19.47#ibcon#wrote, iclass 34, count 0 2006.229.17:00:19.47#ibcon#about to read 3, iclass 34, count 0 2006.229.17:00:19.51#ibcon#read 3, iclass 34, count 0 2006.229.17:00:19.51#ibcon#about to read 4, iclass 34, count 0 2006.229.17:00:19.51#ibcon#read 4, iclass 34, count 0 2006.229.17:00:19.51#ibcon#about to read 5, iclass 34, count 0 2006.229.17:00:19.51#ibcon#read 5, iclass 34, count 0 2006.229.17:00:19.51#ibcon#about to read 6, iclass 34, count 0 2006.229.17:00:19.51#ibcon#read 6, iclass 34, count 0 2006.229.17:00:19.51#ibcon#end of sib2, iclass 34, count 0 2006.229.17:00:19.51#ibcon#*after write, iclass 34, count 0 2006.229.17:00:19.51#ibcon#*before return 0, iclass 34, count 0 2006.229.17:00:19.51#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:19.51#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:19.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:00:19.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:00:19.51$vck44/va=5,4 2006.229.17:00:19.51#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.17:00:19.51#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.17:00:19.51#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:19.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:19.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:19.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:19.57#ibcon#enter wrdev, iclass 36, count 2 2006.229.17:00:19.57#ibcon#first serial, iclass 36, count 2 2006.229.17:00:19.57#ibcon#enter sib2, iclass 36, count 2 2006.229.17:00:19.57#ibcon#flushed, iclass 36, count 2 2006.229.17:00:19.57#ibcon#about to write, iclass 36, count 2 2006.229.17:00:19.57#ibcon#wrote, iclass 36, count 2 2006.229.17:00:19.57#ibcon#about to read 3, iclass 36, count 2 2006.229.17:00:19.59#ibcon#read 3, iclass 36, count 2 2006.229.17:00:19.59#ibcon#about to read 4, iclass 36, count 2 2006.229.17:00:19.59#ibcon#read 4, iclass 36, count 2 2006.229.17:00:19.59#ibcon#about to read 5, iclass 36, count 2 2006.229.17:00:19.59#ibcon#read 5, iclass 36, count 2 2006.229.17:00:19.59#ibcon#about to read 6, iclass 36, count 2 2006.229.17:00:19.59#ibcon#read 6, iclass 36, count 2 2006.229.17:00:19.59#ibcon#end of sib2, iclass 36, count 2 2006.229.17:00:19.59#ibcon#*mode == 0, iclass 36, count 2 2006.229.17:00:19.59#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.17:00:19.59#ibcon#[25=AT05-04\r\n] 2006.229.17:00:19.59#ibcon#*before write, iclass 36, count 2 2006.229.17:00:19.59#ibcon#enter sib2, iclass 36, count 2 2006.229.17:00:19.59#ibcon#flushed, iclass 36, count 2 2006.229.17:00:19.59#ibcon#about to write, iclass 36, count 2 2006.229.17:00:19.59#ibcon#wrote, iclass 36, count 2 2006.229.17:00:19.59#ibcon#about to read 3, iclass 36, count 2 2006.229.17:00:19.62#ibcon#read 3, iclass 36, count 2 2006.229.17:00:19.62#ibcon#about to read 4, iclass 36, count 2 2006.229.17:00:19.62#ibcon#read 4, iclass 36, count 2 2006.229.17:00:19.62#ibcon#about to read 5, iclass 36, count 2 2006.229.17:00:19.62#ibcon#read 5, iclass 36, count 2 2006.229.17:00:19.62#ibcon#about to read 6, iclass 36, count 2 2006.229.17:00:19.62#ibcon#read 6, iclass 36, count 2 2006.229.17:00:19.62#ibcon#end of sib2, iclass 36, count 2 2006.229.17:00:19.62#ibcon#*after write, iclass 36, count 2 2006.229.17:00:19.62#ibcon#*before return 0, iclass 36, count 2 2006.229.17:00:19.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:19.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:19.62#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.17:00:19.62#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:19.62#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:19.74#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:19.74#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:19.74#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:00:19.74#ibcon#first serial, iclass 36, count 0 2006.229.17:00:19.74#ibcon#enter sib2, iclass 36, count 0 2006.229.17:00:19.74#ibcon#flushed, iclass 36, count 0 2006.229.17:00:19.74#ibcon#about to write, iclass 36, count 0 2006.229.17:00:19.74#ibcon#wrote, iclass 36, count 0 2006.229.17:00:19.74#ibcon#about to read 3, iclass 36, count 0 2006.229.17:00:19.76#ibcon#read 3, iclass 36, count 0 2006.229.17:00:19.76#ibcon#about to read 4, iclass 36, count 0 2006.229.17:00:19.76#ibcon#read 4, iclass 36, count 0 2006.229.17:00:19.76#ibcon#about to read 5, iclass 36, count 0 2006.229.17:00:19.76#ibcon#read 5, iclass 36, count 0 2006.229.17:00:19.76#ibcon#about to read 6, iclass 36, count 0 2006.229.17:00:19.76#ibcon#read 6, iclass 36, count 0 2006.229.17:00:19.76#ibcon#end of sib2, iclass 36, count 0 2006.229.17:00:19.76#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:00:19.76#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:00:19.76#ibcon#[25=USB\r\n] 2006.229.17:00:19.76#ibcon#*before write, iclass 36, count 0 2006.229.17:00:19.76#ibcon#enter sib2, iclass 36, count 0 2006.229.17:00:19.76#ibcon#flushed, iclass 36, count 0 2006.229.17:00:19.76#ibcon#about to write, iclass 36, count 0 2006.229.17:00:19.76#ibcon#wrote, iclass 36, count 0 2006.229.17:00:19.76#ibcon#about to read 3, iclass 36, count 0 2006.229.17:00:19.79#ibcon#read 3, iclass 36, count 0 2006.229.17:00:19.79#ibcon#about to read 4, iclass 36, count 0 2006.229.17:00:19.79#ibcon#read 4, iclass 36, count 0 2006.229.17:00:19.79#ibcon#about to read 5, iclass 36, count 0 2006.229.17:00:19.79#ibcon#read 5, iclass 36, count 0 2006.229.17:00:19.79#ibcon#about to read 6, iclass 36, count 0 2006.229.17:00:19.79#ibcon#read 6, iclass 36, count 0 2006.229.17:00:19.79#ibcon#end of sib2, iclass 36, count 0 2006.229.17:00:19.79#ibcon#*after write, iclass 36, count 0 2006.229.17:00:19.79#ibcon#*before return 0, iclass 36, count 0 2006.229.17:00:19.79#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:19.79#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:19.79#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:00:19.79#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:00:19.79$vck44/valo=6,814.99 2006.229.17:00:19.79#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.17:00:19.79#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.17:00:19.79#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:19.79#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:19.79#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:19.79#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:19.79#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:00:19.79#ibcon#first serial, iclass 38, count 0 2006.229.17:00:19.79#ibcon#enter sib2, iclass 38, count 0 2006.229.17:00:19.79#ibcon#flushed, iclass 38, count 0 2006.229.17:00:19.79#ibcon#about to write, iclass 38, count 0 2006.229.17:00:19.79#ibcon#wrote, iclass 38, count 0 2006.229.17:00:19.79#ibcon#about to read 3, iclass 38, count 0 2006.229.17:00:19.81#ibcon#read 3, iclass 38, count 0 2006.229.17:00:19.81#ibcon#about to read 4, iclass 38, count 0 2006.229.17:00:19.81#ibcon#read 4, iclass 38, count 0 2006.229.17:00:19.81#ibcon#about to read 5, iclass 38, count 0 2006.229.17:00:19.81#ibcon#read 5, iclass 38, count 0 2006.229.17:00:19.81#ibcon#about to read 6, iclass 38, count 0 2006.229.17:00:19.81#ibcon#read 6, iclass 38, count 0 2006.229.17:00:19.81#ibcon#end of sib2, iclass 38, count 0 2006.229.17:00:19.81#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:00:19.81#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:00:19.81#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:00:19.81#ibcon#*before write, iclass 38, count 0 2006.229.17:00:19.81#ibcon#enter sib2, iclass 38, count 0 2006.229.17:00:19.81#ibcon#flushed, iclass 38, count 0 2006.229.17:00:19.81#ibcon#about to write, iclass 38, count 0 2006.229.17:00:19.81#ibcon#wrote, iclass 38, count 0 2006.229.17:00:19.81#ibcon#about to read 3, iclass 38, count 0 2006.229.17:00:19.85#ibcon#read 3, iclass 38, count 0 2006.229.17:00:19.85#ibcon#about to read 4, iclass 38, count 0 2006.229.17:00:19.85#ibcon#read 4, iclass 38, count 0 2006.229.17:00:19.85#ibcon#about to read 5, iclass 38, count 0 2006.229.17:00:19.85#ibcon#read 5, iclass 38, count 0 2006.229.17:00:19.85#ibcon#about to read 6, iclass 38, count 0 2006.229.17:00:19.85#ibcon#read 6, iclass 38, count 0 2006.229.17:00:19.85#ibcon#end of sib2, iclass 38, count 0 2006.229.17:00:19.85#ibcon#*after write, iclass 38, count 0 2006.229.17:00:19.85#ibcon#*before return 0, iclass 38, count 0 2006.229.17:00:19.85#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:19.85#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:19.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:00:19.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:00:19.85$vck44/va=6,4 2006.229.17:00:19.85#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.17:00:19.85#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.17:00:19.85#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:19.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:19.91#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:19.91#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:19.91#ibcon#enter wrdev, iclass 40, count 2 2006.229.17:00:19.91#ibcon#first serial, iclass 40, count 2 2006.229.17:00:19.91#ibcon#enter sib2, iclass 40, count 2 2006.229.17:00:19.91#ibcon#flushed, iclass 40, count 2 2006.229.17:00:19.91#ibcon#about to write, iclass 40, count 2 2006.229.17:00:19.91#ibcon#wrote, iclass 40, count 2 2006.229.17:00:19.91#ibcon#about to read 3, iclass 40, count 2 2006.229.17:00:19.93#ibcon#read 3, iclass 40, count 2 2006.229.17:00:19.93#ibcon#about to read 4, iclass 40, count 2 2006.229.17:00:19.93#ibcon#read 4, iclass 40, count 2 2006.229.17:00:19.93#ibcon#about to read 5, iclass 40, count 2 2006.229.17:00:19.93#ibcon#read 5, iclass 40, count 2 2006.229.17:00:19.93#ibcon#about to read 6, iclass 40, count 2 2006.229.17:00:19.93#ibcon#read 6, iclass 40, count 2 2006.229.17:00:19.93#ibcon#end of sib2, iclass 40, count 2 2006.229.17:00:19.93#ibcon#*mode == 0, iclass 40, count 2 2006.229.17:00:19.93#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.17:00:19.93#ibcon#[25=AT06-04\r\n] 2006.229.17:00:19.93#ibcon#*before write, iclass 40, count 2 2006.229.17:00:19.93#ibcon#enter sib2, iclass 40, count 2 2006.229.17:00:19.93#ibcon#flushed, iclass 40, count 2 2006.229.17:00:19.93#ibcon#about to write, iclass 40, count 2 2006.229.17:00:19.93#ibcon#wrote, iclass 40, count 2 2006.229.17:00:19.93#ibcon#about to read 3, iclass 40, count 2 2006.229.17:00:19.96#ibcon#read 3, iclass 40, count 2 2006.229.17:00:19.96#ibcon#about to read 4, iclass 40, count 2 2006.229.17:00:19.96#ibcon#read 4, iclass 40, count 2 2006.229.17:00:19.96#ibcon#about to read 5, iclass 40, count 2 2006.229.17:00:19.96#ibcon#read 5, iclass 40, count 2 2006.229.17:00:19.96#ibcon#about to read 6, iclass 40, count 2 2006.229.17:00:19.96#ibcon#read 6, iclass 40, count 2 2006.229.17:00:19.96#ibcon#end of sib2, iclass 40, count 2 2006.229.17:00:19.96#ibcon#*after write, iclass 40, count 2 2006.229.17:00:19.96#ibcon#*before return 0, iclass 40, count 2 2006.229.17:00:19.96#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:19.96#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:19.96#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.17:00:19.96#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:19.96#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:20.08#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:20.08#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:20.08#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:00:20.08#ibcon#first serial, iclass 40, count 0 2006.229.17:00:20.08#ibcon#enter sib2, iclass 40, count 0 2006.229.17:00:20.08#ibcon#flushed, iclass 40, count 0 2006.229.17:00:20.08#ibcon#about to write, iclass 40, count 0 2006.229.17:00:20.08#ibcon#wrote, iclass 40, count 0 2006.229.17:00:20.08#ibcon#about to read 3, iclass 40, count 0 2006.229.17:00:20.10#ibcon#read 3, iclass 40, count 0 2006.229.17:00:20.10#ibcon#about to read 4, iclass 40, count 0 2006.229.17:00:20.10#ibcon#read 4, iclass 40, count 0 2006.229.17:00:20.10#ibcon#about to read 5, iclass 40, count 0 2006.229.17:00:20.10#ibcon#read 5, iclass 40, count 0 2006.229.17:00:20.10#ibcon#about to read 6, iclass 40, count 0 2006.229.17:00:20.10#ibcon#read 6, iclass 40, count 0 2006.229.17:00:20.10#ibcon#end of sib2, iclass 40, count 0 2006.229.17:00:20.10#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:00:20.10#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:00:20.10#ibcon#[25=USB\r\n] 2006.229.17:00:20.10#ibcon#*before write, iclass 40, count 0 2006.229.17:00:20.10#ibcon#enter sib2, iclass 40, count 0 2006.229.17:00:20.10#ibcon#flushed, iclass 40, count 0 2006.229.17:00:20.10#ibcon#about to write, iclass 40, count 0 2006.229.17:00:20.10#ibcon#wrote, iclass 40, count 0 2006.229.17:00:20.10#ibcon#about to read 3, iclass 40, count 0 2006.229.17:00:20.13#ibcon#read 3, iclass 40, count 0 2006.229.17:00:20.13#ibcon#about to read 4, iclass 40, count 0 2006.229.17:00:20.13#ibcon#read 4, iclass 40, count 0 2006.229.17:00:20.13#ibcon#about to read 5, iclass 40, count 0 2006.229.17:00:20.13#ibcon#read 5, iclass 40, count 0 2006.229.17:00:20.13#ibcon#about to read 6, iclass 40, count 0 2006.229.17:00:20.13#ibcon#read 6, iclass 40, count 0 2006.229.17:00:20.13#ibcon#end of sib2, iclass 40, count 0 2006.229.17:00:20.13#ibcon#*after write, iclass 40, count 0 2006.229.17:00:20.13#ibcon#*before return 0, iclass 40, count 0 2006.229.17:00:20.13#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:20.13#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:20.13#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:00:20.13#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:00:20.13$vck44/valo=7,864.99 2006.229.17:00:20.13#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.17:00:20.13#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.17:00:20.13#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:20.13#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:20.13#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:20.13#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:20.13#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:00:20.13#ibcon#first serial, iclass 4, count 0 2006.229.17:00:20.13#ibcon#enter sib2, iclass 4, count 0 2006.229.17:00:20.13#ibcon#flushed, iclass 4, count 0 2006.229.17:00:20.13#ibcon#about to write, iclass 4, count 0 2006.229.17:00:20.13#ibcon#wrote, iclass 4, count 0 2006.229.17:00:20.13#ibcon#about to read 3, iclass 4, count 0 2006.229.17:00:20.15#ibcon#read 3, iclass 4, count 0 2006.229.17:00:20.15#ibcon#about to read 4, iclass 4, count 0 2006.229.17:00:20.15#ibcon#read 4, iclass 4, count 0 2006.229.17:00:20.15#ibcon#about to read 5, iclass 4, count 0 2006.229.17:00:20.15#ibcon#read 5, iclass 4, count 0 2006.229.17:00:20.15#ibcon#about to read 6, iclass 4, count 0 2006.229.17:00:20.15#ibcon#read 6, iclass 4, count 0 2006.229.17:00:20.15#ibcon#end of sib2, iclass 4, count 0 2006.229.17:00:20.15#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:00:20.15#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:00:20.15#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:00:20.15#ibcon#*before write, iclass 4, count 0 2006.229.17:00:20.15#ibcon#enter sib2, iclass 4, count 0 2006.229.17:00:20.15#ibcon#flushed, iclass 4, count 0 2006.229.17:00:20.15#ibcon#about to write, iclass 4, count 0 2006.229.17:00:20.15#ibcon#wrote, iclass 4, count 0 2006.229.17:00:20.15#ibcon#about to read 3, iclass 4, count 0 2006.229.17:00:20.19#ibcon#read 3, iclass 4, count 0 2006.229.17:00:20.19#ibcon#about to read 4, iclass 4, count 0 2006.229.17:00:20.19#ibcon#read 4, iclass 4, count 0 2006.229.17:00:20.19#ibcon#about to read 5, iclass 4, count 0 2006.229.17:00:20.19#ibcon#read 5, iclass 4, count 0 2006.229.17:00:20.19#ibcon#about to read 6, iclass 4, count 0 2006.229.17:00:20.19#ibcon#read 6, iclass 4, count 0 2006.229.17:00:20.19#ibcon#end of sib2, iclass 4, count 0 2006.229.17:00:20.19#ibcon#*after write, iclass 4, count 0 2006.229.17:00:20.19#ibcon#*before return 0, iclass 4, count 0 2006.229.17:00:20.19#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:20.19#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:20.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:00:20.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:00:20.19$vck44/va=7,5 2006.229.17:00:20.19#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.17:00:20.19#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.17:00:20.19#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:20.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:20.25#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:20.25#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:20.25#ibcon#enter wrdev, iclass 6, count 2 2006.229.17:00:20.25#ibcon#first serial, iclass 6, count 2 2006.229.17:00:20.25#ibcon#enter sib2, iclass 6, count 2 2006.229.17:00:20.25#ibcon#flushed, iclass 6, count 2 2006.229.17:00:20.25#ibcon#about to write, iclass 6, count 2 2006.229.17:00:20.25#ibcon#wrote, iclass 6, count 2 2006.229.17:00:20.25#ibcon#about to read 3, iclass 6, count 2 2006.229.17:00:20.27#ibcon#read 3, iclass 6, count 2 2006.229.17:00:20.27#ibcon#about to read 4, iclass 6, count 2 2006.229.17:00:20.27#ibcon#read 4, iclass 6, count 2 2006.229.17:00:20.27#ibcon#about to read 5, iclass 6, count 2 2006.229.17:00:20.27#ibcon#read 5, iclass 6, count 2 2006.229.17:00:20.27#ibcon#about to read 6, iclass 6, count 2 2006.229.17:00:20.27#ibcon#read 6, iclass 6, count 2 2006.229.17:00:20.27#ibcon#end of sib2, iclass 6, count 2 2006.229.17:00:20.27#ibcon#*mode == 0, iclass 6, count 2 2006.229.17:00:20.27#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.17:00:20.27#ibcon#[25=AT07-05\r\n] 2006.229.17:00:20.27#ibcon#*before write, iclass 6, count 2 2006.229.17:00:20.27#ibcon#enter sib2, iclass 6, count 2 2006.229.17:00:20.27#ibcon#flushed, iclass 6, count 2 2006.229.17:00:20.27#ibcon#about to write, iclass 6, count 2 2006.229.17:00:20.27#ibcon#wrote, iclass 6, count 2 2006.229.17:00:20.27#ibcon#about to read 3, iclass 6, count 2 2006.229.17:00:20.30#ibcon#read 3, iclass 6, count 2 2006.229.17:00:20.30#ibcon#about to read 4, iclass 6, count 2 2006.229.17:00:20.30#ibcon#read 4, iclass 6, count 2 2006.229.17:00:20.30#ibcon#about to read 5, iclass 6, count 2 2006.229.17:00:20.30#ibcon#read 5, iclass 6, count 2 2006.229.17:00:20.30#ibcon#about to read 6, iclass 6, count 2 2006.229.17:00:20.30#ibcon#read 6, iclass 6, count 2 2006.229.17:00:20.30#ibcon#end of sib2, iclass 6, count 2 2006.229.17:00:20.30#ibcon#*after write, iclass 6, count 2 2006.229.17:00:20.30#ibcon#*before return 0, iclass 6, count 2 2006.229.17:00:20.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:20.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:20.30#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.17:00:20.30#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:20.30#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:20.42#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:20.42#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:20.42#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:00:20.42#ibcon#first serial, iclass 6, count 0 2006.229.17:00:20.42#ibcon#enter sib2, iclass 6, count 0 2006.229.17:00:20.42#ibcon#flushed, iclass 6, count 0 2006.229.17:00:20.42#ibcon#about to write, iclass 6, count 0 2006.229.17:00:20.42#ibcon#wrote, iclass 6, count 0 2006.229.17:00:20.42#ibcon#about to read 3, iclass 6, count 0 2006.229.17:00:20.44#ibcon#read 3, iclass 6, count 0 2006.229.17:00:20.44#ibcon#about to read 4, iclass 6, count 0 2006.229.17:00:20.44#ibcon#read 4, iclass 6, count 0 2006.229.17:00:20.44#ibcon#about to read 5, iclass 6, count 0 2006.229.17:00:20.44#ibcon#read 5, iclass 6, count 0 2006.229.17:00:20.44#ibcon#about to read 6, iclass 6, count 0 2006.229.17:00:20.44#ibcon#read 6, iclass 6, count 0 2006.229.17:00:20.44#ibcon#end of sib2, iclass 6, count 0 2006.229.17:00:20.44#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:00:20.44#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:00:20.44#ibcon#[25=USB\r\n] 2006.229.17:00:20.44#ibcon#*before write, iclass 6, count 0 2006.229.17:00:20.44#ibcon#enter sib2, iclass 6, count 0 2006.229.17:00:20.44#ibcon#flushed, iclass 6, count 0 2006.229.17:00:20.44#ibcon#about to write, iclass 6, count 0 2006.229.17:00:20.44#ibcon#wrote, iclass 6, count 0 2006.229.17:00:20.44#ibcon#about to read 3, iclass 6, count 0 2006.229.17:00:20.47#ibcon#read 3, iclass 6, count 0 2006.229.17:00:20.47#ibcon#about to read 4, iclass 6, count 0 2006.229.17:00:20.47#ibcon#read 4, iclass 6, count 0 2006.229.17:00:20.47#ibcon#about to read 5, iclass 6, count 0 2006.229.17:00:20.47#ibcon#read 5, iclass 6, count 0 2006.229.17:00:20.47#ibcon#about to read 6, iclass 6, count 0 2006.229.17:00:20.47#ibcon#read 6, iclass 6, count 0 2006.229.17:00:20.47#ibcon#end of sib2, iclass 6, count 0 2006.229.17:00:20.47#ibcon#*after write, iclass 6, count 0 2006.229.17:00:20.47#ibcon#*before return 0, iclass 6, count 0 2006.229.17:00:20.47#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:20.47#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:20.47#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:00:20.47#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:00:20.47$vck44/valo=8,884.99 2006.229.17:00:20.47#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.17:00:20.47#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.17:00:20.47#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:20.47#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:20.47#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:20.47#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:20.47#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:00:20.47#ibcon#first serial, iclass 10, count 0 2006.229.17:00:20.47#ibcon#enter sib2, iclass 10, count 0 2006.229.17:00:20.47#ibcon#flushed, iclass 10, count 0 2006.229.17:00:20.47#ibcon#about to write, iclass 10, count 0 2006.229.17:00:20.47#ibcon#wrote, iclass 10, count 0 2006.229.17:00:20.47#ibcon#about to read 3, iclass 10, count 0 2006.229.17:00:20.49#ibcon#read 3, iclass 10, count 0 2006.229.17:00:20.49#ibcon#about to read 4, iclass 10, count 0 2006.229.17:00:20.49#ibcon#read 4, iclass 10, count 0 2006.229.17:00:20.49#ibcon#about to read 5, iclass 10, count 0 2006.229.17:00:20.49#ibcon#read 5, iclass 10, count 0 2006.229.17:00:20.49#ibcon#about to read 6, iclass 10, count 0 2006.229.17:00:20.49#ibcon#read 6, iclass 10, count 0 2006.229.17:00:20.49#ibcon#end of sib2, iclass 10, count 0 2006.229.17:00:20.49#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:00:20.49#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:00:20.49#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:00:20.49#ibcon#*before write, iclass 10, count 0 2006.229.17:00:20.49#ibcon#enter sib2, iclass 10, count 0 2006.229.17:00:20.49#ibcon#flushed, iclass 10, count 0 2006.229.17:00:20.49#ibcon#about to write, iclass 10, count 0 2006.229.17:00:20.49#ibcon#wrote, iclass 10, count 0 2006.229.17:00:20.49#ibcon#about to read 3, iclass 10, count 0 2006.229.17:00:20.53#ibcon#read 3, iclass 10, count 0 2006.229.17:00:20.53#ibcon#about to read 4, iclass 10, count 0 2006.229.17:00:20.53#ibcon#read 4, iclass 10, count 0 2006.229.17:00:20.53#ibcon#about to read 5, iclass 10, count 0 2006.229.17:00:20.53#ibcon#read 5, iclass 10, count 0 2006.229.17:00:20.53#ibcon#about to read 6, iclass 10, count 0 2006.229.17:00:20.53#ibcon#read 6, iclass 10, count 0 2006.229.17:00:20.53#ibcon#end of sib2, iclass 10, count 0 2006.229.17:00:20.53#ibcon#*after write, iclass 10, count 0 2006.229.17:00:20.53#ibcon#*before return 0, iclass 10, count 0 2006.229.17:00:20.53#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:20.53#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:20.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:00:20.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:00:20.53$vck44/va=8,6 2006.229.17:00:20.53#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.17:00:20.53#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.17:00:20.53#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:20.53#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:00:20.59#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:00:20.59#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:00:20.59#ibcon#enter wrdev, iclass 12, count 2 2006.229.17:00:20.59#ibcon#first serial, iclass 12, count 2 2006.229.17:00:20.59#ibcon#enter sib2, iclass 12, count 2 2006.229.17:00:20.59#ibcon#flushed, iclass 12, count 2 2006.229.17:00:20.59#ibcon#about to write, iclass 12, count 2 2006.229.17:00:20.59#ibcon#wrote, iclass 12, count 2 2006.229.17:00:20.59#ibcon#about to read 3, iclass 12, count 2 2006.229.17:00:20.61#ibcon#read 3, iclass 12, count 2 2006.229.17:00:20.61#ibcon#about to read 4, iclass 12, count 2 2006.229.17:00:20.61#ibcon#read 4, iclass 12, count 2 2006.229.17:00:20.61#ibcon#about to read 5, iclass 12, count 2 2006.229.17:00:20.61#ibcon#read 5, iclass 12, count 2 2006.229.17:00:20.61#ibcon#about to read 6, iclass 12, count 2 2006.229.17:00:20.61#ibcon#read 6, iclass 12, count 2 2006.229.17:00:20.61#ibcon#end of sib2, iclass 12, count 2 2006.229.17:00:20.61#ibcon#*mode == 0, iclass 12, count 2 2006.229.17:00:20.61#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.17:00:20.61#ibcon#[25=AT08-06\r\n] 2006.229.17:00:20.61#ibcon#*before write, iclass 12, count 2 2006.229.17:00:20.61#ibcon#enter sib2, iclass 12, count 2 2006.229.17:00:20.61#ibcon#flushed, iclass 12, count 2 2006.229.17:00:20.61#ibcon#about to write, iclass 12, count 2 2006.229.17:00:20.61#ibcon#wrote, iclass 12, count 2 2006.229.17:00:20.61#ibcon#about to read 3, iclass 12, count 2 2006.229.17:00:20.64#ibcon#read 3, iclass 12, count 2 2006.229.17:00:20.64#ibcon#about to read 4, iclass 12, count 2 2006.229.17:00:20.64#ibcon#read 4, iclass 12, count 2 2006.229.17:00:20.64#ibcon#about to read 5, iclass 12, count 2 2006.229.17:00:20.64#ibcon#read 5, iclass 12, count 2 2006.229.17:00:20.64#ibcon#about to read 6, iclass 12, count 2 2006.229.17:00:20.64#ibcon#read 6, iclass 12, count 2 2006.229.17:00:20.64#ibcon#end of sib2, iclass 12, count 2 2006.229.17:00:20.64#ibcon#*after write, iclass 12, count 2 2006.229.17:00:20.64#ibcon#*before return 0, iclass 12, count 2 2006.229.17:00:20.64#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:00:20.64#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:00:20.64#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.17:00:20.64#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:20.64#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:00:20.76#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:00:20.76#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:00:20.76#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:00:20.76#ibcon#first serial, iclass 12, count 0 2006.229.17:00:20.76#ibcon#enter sib2, iclass 12, count 0 2006.229.17:00:20.76#ibcon#flushed, iclass 12, count 0 2006.229.17:00:20.76#ibcon#about to write, iclass 12, count 0 2006.229.17:00:20.76#ibcon#wrote, iclass 12, count 0 2006.229.17:00:20.76#ibcon#about to read 3, iclass 12, count 0 2006.229.17:00:20.78#ibcon#read 3, iclass 12, count 0 2006.229.17:00:20.78#ibcon#about to read 4, iclass 12, count 0 2006.229.17:00:20.78#ibcon#read 4, iclass 12, count 0 2006.229.17:00:20.78#ibcon#about to read 5, iclass 12, count 0 2006.229.17:00:20.78#ibcon#read 5, iclass 12, count 0 2006.229.17:00:20.78#ibcon#about to read 6, iclass 12, count 0 2006.229.17:00:20.78#ibcon#read 6, iclass 12, count 0 2006.229.17:00:20.78#ibcon#end of sib2, iclass 12, count 0 2006.229.17:00:20.78#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:00:20.78#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:00:20.78#ibcon#[25=USB\r\n] 2006.229.17:00:20.78#ibcon#*before write, iclass 12, count 0 2006.229.17:00:20.78#ibcon#enter sib2, iclass 12, count 0 2006.229.17:00:20.78#ibcon#flushed, iclass 12, count 0 2006.229.17:00:20.78#ibcon#about to write, iclass 12, count 0 2006.229.17:00:20.78#ibcon#wrote, iclass 12, count 0 2006.229.17:00:20.78#ibcon#about to read 3, iclass 12, count 0 2006.229.17:00:20.81#ibcon#read 3, iclass 12, count 0 2006.229.17:00:20.81#ibcon#about to read 4, iclass 12, count 0 2006.229.17:00:20.81#ibcon#read 4, iclass 12, count 0 2006.229.17:00:20.81#ibcon#about to read 5, iclass 12, count 0 2006.229.17:00:20.81#ibcon#read 5, iclass 12, count 0 2006.229.17:00:20.81#ibcon#about to read 6, iclass 12, count 0 2006.229.17:00:20.81#ibcon#read 6, iclass 12, count 0 2006.229.17:00:20.81#ibcon#end of sib2, iclass 12, count 0 2006.229.17:00:20.81#ibcon#*after write, iclass 12, count 0 2006.229.17:00:20.81#ibcon#*before return 0, iclass 12, count 0 2006.229.17:00:20.81#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:00:20.81#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:00:20.81#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:00:20.81#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:00:20.81$vck44/vblo=1,629.99 2006.229.17:00:20.81#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.17:00:20.81#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.17:00:20.81#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:20.81#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:00:20.81#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:00:20.81#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:00:20.81#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:00:20.81#ibcon#first serial, iclass 14, count 0 2006.229.17:00:20.81#ibcon#enter sib2, iclass 14, count 0 2006.229.17:00:20.81#ibcon#flushed, iclass 14, count 0 2006.229.17:00:20.81#ibcon#about to write, iclass 14, count 0 2006.229.17:00:20.81#ibcon#wrote, iclass 14, count 0 2006.229.17:00:20.81#ibcon#about to read 3, iclass 14, count 0 2006.229.17:00:20.83#ibcon#read 3, iclass 14, count 0 2006.229.17:00:20.83#ibcon#about to read 4, iclass 14, count 0 2006.229.17:00:20.83#ibcon#read 4, iclass 14, count 0 2006.229.17:00:20.83#ibcon#about to read 5, iclass 14, count 0 2006.229.17:00:20.83#ibcon#read 5, iclass 14, count 0 2006.229.17:00:20.83#ibcon#about to read 6, iclass 14, count 0 2006.229.17:00:20.83#ibcon#read 6, iclass 14, count 0 2006.229.17:00:20.83#ibcon#end of sib2, iclass 14, count 0 2006.229.17:00:20.83#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:00:20.83#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:00:20.83#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:00:20.83#ibcon#*before write, iclass 14, count 0 2006.229.17:00:20.83#ibcon#enter sib2, iclass 14, count 0 2006.229.17:00:20.83#ibcon#flushed, iclass 14, count 0 2006.229.17:00:20.83#ibcon#about to write, iclass 14, count 0 2006.229.17:00:20.83#ibcon#wrote, iclass 14, count 0 2006.229.17:00:20.83#ibcon#about to read 3, iclass 14, count 0 2006.229.17:00:20.87#ibcon#read 3, iclass 14, count 0 2006.229.17:00:20.87#ibcon#about to read 4, iclass 14, count 0 2006.229.17:00:20.87#ibcon#read 4, iclass 14, count 0 2006.229.17:00:20.87#ibcon#about to read 5, iclass 14, count 0 2006.229.17:00:20.87#ibcon#read 5, iclass 14, count 0 2006.229.17:00:20.87#ibcon#about to read 6, iclass 14, count 0 2006.229.17:00:20.87#ibcon#read 6, iclass 14, count 0 2006.229.17:00:20.87#ibcon#end of sib2, iclass 14, count 0 2006.229.17:00:20.87#ibcon#*after write, iclass 14, count 0 2006.229.17:00:20.87#ibcon#*before return 0, iclass 14, count 0 2006.229.17:00:20.87#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:00:20.87#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:00:20.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:00:20.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:00:20.87$vck44/vb=1,4 2006.229.17:00:20.87#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.17:00:20.87#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.17:00:20.87#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:20.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:00:20.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:00:20.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:00:20.87#ibcon#enter wrdev, iclass 16, count 2 2006.229.17:00:20.87#ibcon#first serial, iclass 16, count 2 2006.229.17:00:20.87#ibcon#enter sib2, iclass 16, count 2 2006.229.17:00:20.87#ibcon#flushed, iclass 16, count 2 2006.229.17:00:20.87#ibcon#about to write, iclass 16, count 2 2006.229.17:00:20.87#ibcon#wrote, iclass 16, count 2 2006.229.17:00:20.87#ibcon#about to read 3, iclass 16, count 2 2006.229.17:00:20.89#ibcon#read 3, iclass 16, count 2 2006.229.17:00:20.89#ibcon#about to read 4, iclass 16, count 2 2006.229.17:00:20.89#ibcon#read 4, iclass 16, count 2 2006.229.17:00:20.89#ibcon#about to read 5, iclass 16, count 2 2006.229.17:00:20.89#ibcon#read 5, iclass 16, count 2 2006.229.17:00:20.89#ibcon#about to read 6, iclass 16, count 2 2006.229.17:00:20.89#ibcon#read 6, iclass 16, count 2 2006.229.17:00:20.89#ibcon#end of sib2, iclass 16, count 2 2006.229.17:00:20.89#ibcon#*mode == 0, iclass 16, count 2 2006.229.17:00:20.89#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.17:00:20.89#ibcon#[27=AT01-04\r\n] 2006.229.17:00:20.89#ibcon#*before write, iclass 16, count 2 2006.229.17:00:20.89#ibcon#enter sib2, iclass 16, count 2 2006.229.17:00:20.89#ibcon#flushed, iclass 16, count 2 2006.229.17:00:20.89#ibcon#about to write, iclass 16, count 2 2006.229.17:00:20.89#ibcon#wrote, iclass 16, count 2 2006.229.17:00:20.89#ibcon#about to read 3, iclass 16, count 2 2006.229.17:00:20.92#ibcon#read 3, iclass 16, count 2 2006.229.17:00:20.92#ibcon#about to read 4, iclass 16, count 2 2006.229.17:00:20.92#ibcon#read 4, iclass 16, count 2 2006.229.17:00:20.92#ibcon#about to read 5, iclass 16, count 2 2006.229.17:00:20.92#ibcon#read 5, iclass 16, count 2 2006.229.17:00:20.92#ibcon#about to read 6, iclass 16, count 2 2006.229.17:00:20.92#ibcon#read 6, iclass 16, count 2 2006.229.17:00:20.92#ibcon#end of sib2, iclass 16, count 2 2006.229.17:00:20.92#ibcon#*after write, iclass 16, count 2 2006.229.17:00:20.92#ibcon#*before return 0, iclass 16, count 2 2006.229.17:00:20.92#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:00:20.92#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:00:20.92#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.17:00:20.92#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:20.92#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:00:21.04#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:00:21.04#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:00:21.04#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:00:21.04#ibcon#first serial, iclass 16, count 0 2006.229.17:00:21.04#ibcon#enter sib2, iclass 16, count 0 2006.229.17:00:21.04#ibcon#flushed, iclass 16, count 0 2006.229.17:00:21.04#ibcon#about to write, iclass 16, count 0 2006.229.17:00:21.04#ibcon#wrote, iclass 16, count 0 2006.229.17:00:21.04#ibcon#about to read 3, iclass 16, count 0 2006.229.17:00:21.06#ibcon#read 3, iclass 16, count 0 2006.229.17:00:21.06#ibcon#about to read 4, iclass 16, count 0 2006.229.17:00:21.06#ibcon#read 4, iclass 16, count 0 2006.229.17:00:21.06#ibcon#about to read 5, iclass 16, count 0 2006.229.17:00:21.06#ibcon#read 5, iclass 16, count 0 2006.229.17:00:21.06#ibcon#about to read 6, iclass 16, count 0 2006.229.17:00:21.06#ibcon#read 6, iclass 16, count 0 2006.229.17:00:21.06#ibcon#end of sib2, iclass 16, count 0 2006.229.17:00:21.06#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:00:21.06#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:00:21.06#ibcon#[27=USB\r\n] 2006.229.17:00:21.06#ibcon#*before write, iclass 16, count 0 2006.229.17:00:21.06#ibcon#enter sib2, iclass 16, count 0 2006.229.17:00:21.06#ibcon#flushed, iclass 16, count 0 2006.229.17:00:21.06#ibcon#about to write, iclass 16, count 0 2006.229.17:00:21.06#ibcon#wrote, iclass 16, count 0 2006.229.17:00:21.06#ibcon#about to read 3, iclass 16, count 0 2006.229.17:00:21.09#ibcon#read 3, iclass 16, count 0 2006.229.17:00:21.09#ibcon#about to read 4, iclass 16, count 0 2006.229.17:00:21.09#ibcon#read 4, iclass 16, count 0 2006.229.17:00:21.09#ibcon#about to read 5, iclass 16, count 0 2006.229.17:00:21.09#ibcon#read 5, iclass 16, count 0 2006.229.17:00:21.09#ibcon#about to read 6, iclass 16, count 0 2006.229.17:00:21.09#ibcon#read 6, iclass 16, count 0 2006.229.17:00:21.09#ibcon#end of sib2, iclass 16, count 0 2006.229.17:00:21.09#ibcon#*after write, iclass 16, count 0 2006.229.17:00:21.09#ibcon#*before return 0, iclass 16, count 0 2006.229.17:00:21.09#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:00:21.09#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:00:21.09#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:00:21.09#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:00:21.09$vck44/vblo=2,634.99 2006.229.17:00:21.09#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.17:00:21.09#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.17:00:21.09#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:21.09#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:21.09#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:21.09#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:21.09#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:00:21.09#ibcon#first serial, iclass 18, count 0 2006.229.17:00:21.09#ibcon#enter sib2, iclass 18, count 0 2006.229.17:00:21.09#ibcon#flushed, iclass 18, count 0 2006.229.17:00:21.09#ibcon#about to write, iclass 18, count 0 2006.229.17:00:21.09#ibcon#wrote, iclass 18, count 0 2006.229.17:00:21.09#ibcon#about to read 3, iclass 18, count 0 2006.229.17:00:21.11#ibcon#read 3, iclass 18, count 0 2006.229.17:00:21.11#ibcon#about to read 4, iclass 18, count 0 2006.229.17:00:21.11#ibcon#read 4, iclass 18, count 0 2006.229.17:00:21.11#ibcon#about to read 5, iclass 18, count 0 2006.229.17:00:21.11#ibcon#read 5, iclass 18, count 0 2006.229.17:00:21.11#ibcon#about to read 6, iclass 18, count 0 2006.229.17:00:21.11#ibcon#read 6, iclass 18, count 0 2006.229.17:00:21.11#ibcon#end of sib2, iclass 18, count 0 2006.229.17:00:21.11#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:00:21.11#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:00:21.11#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:00:21.11#ibcon#*before write, iclass 18, count 0 2006.229.17:00:21.11#ibcon#enter sib2, iclass 18, count 0 2006.229.17:00:21.11#ibcon#flushed, iclass 18, count 0 2006.229.17:00:21.11#ibcon#about to write, iclass 18, count 0 2006.229.17:00:21.11#ibcon#wrote, iclass 18, count 0 2006.229.17:00:21.11#ibcon#about to read 3, iclass 18, count 0 2006.229.17:00:21.15#ibcon#read 3, iclass 18, count 0 2006.229.17:00:21.15#ibcon#about to read 4, iclass 18, count 0 2006.229.17:00:21.15#ibcon#read 4, iclass 18, count 0 2006.229.17:00:21.15#ibcon#about to read 5, iclass 18, count 0 2006.229.17:00:21.15#ibcon#read 5, iclass 18, count 0 2006.229.17:00:21.15#ibcon#about to read 6, iclass 18, count 0 2006.229.17:00:21.15#ibcon#read 6, iclass 18, count 0 2006.229.17:00:21.15#ibcon#end of sib2, iclass 18, count 0 2006.229.17:00:21.15#ibcon#*after write, iclass 18, count 0 2006.229.17:00:21.15#ibcon#*before return 0, iclass 18, count 0 2006.229.17:00:21.15#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:21.15#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:00:21.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:00:21.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:00:21.15$vck44/vb=2,4 2006.229.17:00:21.15#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.17:00:21.15#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.17:00:21.15#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:21.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:21.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:21.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:21.21#ibcon#enter wrdev, iclass 20, count 2 2006.229.17:00:21.21#ibcon#first serial, iclass 20, count 2 2006.229.17:00:21.21#ibcon#enter sib2, iclass 20, count 2 2006.229.17:00:21.21#ibcon#flushed, iclass 20, count 2 2006.229.17:00:21.21#ibcon#about to write, iclass 20, count 2 2006.229.17:00:21.21#ibcon#wrote, iclass 20, count 2 2006.229.17:00:21.21#ibcon#about to read 3, iclass 20, count 2 2006.229.17:00:21.23#ibcon#read 3, iclass 20, count 2 2006.229.17:00:21.23#ibcon#about to read 4, iclass 20, count 2 2006.229.17:00:21.23#ibcon#read 4, iclass 20, count 2 2006.229.17:00:21.23#ibcon#about to read 5, iclass 20, count 2 2006.229.17:00:21.23#ibcon#read 5, iclass 20, count 2 2006.229.17:00:21.23#ibcon#about to read 6, iclass 20, count 2 2006.229.17:00:21.23#ibcon#read 6, iclass 20, count 2 2006.229.17:00:21.23#ibcon#end of sib2, iclass 20, count 2 2006.229.17:00:21.23#ibcon#*mode == 0, iclass 20, count 2 2006.229.17:00:21.23#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.17:00:21.23#ibcon#[27=AT02-04\r\n] 2006.229.17:00:21.23#ibcon#*before write, iclass 20, count 2 2006.229.17:00:21.23#ibcon#enter sib2, iclass 20, count 2 2006.229.17:00:21.23#ibcon#flushed, iclass 20, count 2 2006.229.17:00:21.23#ibcon#about to write, iclass 20, count 2 2006.229.17:00:21.23#ibcon#wrote, iclass 20, count 2 2006.229.17:00:21.23#ibcon#about to read 3, iclass 20, count 2 2006.229.17:00:21.26#ibcon#read 3, iclass 20, count 2 2006.229.17:00:21.26#ibcon#about to read 4, iclass 20, count 2 2006.229.17:00:21.26#ibcon#read 4, iclass 20, count 2 2006.229.17:00:21.26#ibcon#about to read 5, iclass 20, count 2 2006.229.17:00:21.26#ibcon#read 5, iclass 20, count 2 2006.229.17:00:21.26#ibcon#about to read 6, iclass 20, count 2 2006.229.17:00:21.26#ibcon#read 6, iclass 20, count 2 2006.229.17:00:21.26#ibcon#end of sib2, iclass 20, count 2 2006.229.17:00:21.26#ibcon#*after write, iclass 20, count 2 2006.229.17:00:21.26#ibcon#*before return 0, iclass 20, count 2 2006.229.17:00:21.26#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:21.26#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:00:21.26#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.17:00:21.26#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:21.26#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:21.38#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:21.38#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:21.38#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:00:21.38#ibcon#first serial, iclass 20, count 0 2006.229.17:00:21.38#ibcon#enter sib2, iclass 20, count 0 2006.229.17:00:21.38#ibcon#flushed, iclass 20, count 0 2006.229.17:00:21.38#ibcon#about to write, iclass 20, count 0 2006.229.17:00:21.38#ibcon#wrote, iclass 20, count 0 2006.229.17:00:21.38#ibcon#about to read 3, iclass 20, count 0 2006.229.17:00:21.40#ibcon#read 3, iclass 20, count 0 2006.229.17:00:21.40#ibcon#about to read 4, iclass 20, count 0 2006.229.17:00:21.40#ibcon#read 4, iclass 20, count 0 2006.229.17:00:21.40#ibcon#about to read 5, iclass 20, count 0 2006.229.17:00:21.40#ibcon#read 5, iclass 20, count 0 2006.229.17:00:21.40#ibcon#about to read 6, iclass 20, count 0 2006.229.17:00:21.40#ibcon#read 6, iclass 20, count 0 2006.229.17:00:21.40#ibcon#end of sib2, iclass 20, count 0 2006.229.17:00:21.40#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:00:21.40#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:00:21.40#ibcon#[27=USB\r\n] 2006.229.17:00:21.40#ibcon#*before write, iclass 20, count 0 2006.229.17:00:21.40#ibcon#enter sib2, iclass 20, count 0 2006.229.17:00:21.40#ibcon#flushed, iclass 20, count 0 2006.229.17:00:21.40#ibcon#about to write, iclass 20, count 0 2006.229.17:00:21.40#ibcon#wrote, iclass 20, count 0 2006.229.17:00:21.40#ibcon#about to read 3, iclass 20, count 0 2006.229.17:00:21.43#ibcon#read 3, iclass 20, count 0 2006.229.17:00:21.43#ibcon#about to read 4, iclass 20, count 0 2006.229.17:00:21.43#ibcon#read 4, iclass 20, count 0 2006.229.17:00:21.43#ibcon#about to read 5, iclass 20, count 0 2006.229.17:00:21.43#ibcon#read 5, iclass 20, count 0 2006.229.17:00:21.43#ibcon#about to read 6, iclass 20, count 0 2006.229.17:00:21.43#ibcon#read 6, iclass 20, count 0 2006.229.17:00:21.43#ibcon#end of sib2, iclass 20, count 0 2006.229.17:00:21.43#ibcon#*after write, iclass 20, count 0 2006.229.17:00:21.43#ibcon#*before return 0, iclass 20, count 0 2006.229.17:00:21.43#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:21.43#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:00:21.43#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:00:21.43#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:00:21.43$vck44/vblo=3,649.99 2006.229.17:00:21.43#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:00:21.43#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:00:21.43#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:21.43#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:21.43#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:21.43#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:21.43#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:00:21.43#ibcon#first serial, iclass 22, count 0 2006.229.17:00:21.43#ibcon#enter sib2, iclass 22, count 0 2006.229.17:00:21.43#ibcon#flushed, iclass 22, count 0 2006.229.17:00:21.43#ibcon#about to write, iclass 22, count 0 2006.229.17:00:21.43#ibcon#wrote, iclass 22, count 0 2006.229.17:00:21.43#ibcon#about to read 3, iclass 22, count 0 2006.229.17:00:21.45#ibcon#read 3, iclass 22, count 0 2006.229.17:00:21.45#ibcon#about to read 4, iclass 22, count 0 2006.229.17:00:21.45#ibcon#read 4, iclass 22, count 0 2006.229.17:00:21.45#ibcon#about to read 5, iclass 22, count 0 2006.229.17:00:21.45#ibcon#read 5, iclass 22, count 0 2006.229.17:00:21.45#ibcon#about to read 6, iclass 22, count 0 2006.229.17:00:21.45#ibcon#read 6, iclass 22, count 0 2006.229.17:00:21.45#ibcon#end of sib2, iclass 22, count 0 2006.229.17:00:21.45#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:00:21.45#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:00:21.45#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:00:21.45#ibcon#*before write, iclass 22, count 0 2006.229.17:00:21.45#ibcon#enter sib2, iclass 22, count 0 2006.229.17:00:21.45#ibcon#flushed, iclass 22, count 0 2006.229.17:00:21.45#ibcon#about to write, iclass 22, count 0 2006.229.17:00:21.45#ibcon#wrote, iclass 22, count 0 2006.229.17:00:21.45#ibcon#about to read 3, iclass 22, count 0 2006.229.17:00:21.49#ibcon#read 3, iclass 22, count 0 2006.229.17:00:21.49#ibcon#about to read 4, iclass 22, count 0 2006.229.17:00:21.49#ibcon#read 4, iclass 22, count 0 2006.229.17:00:21.49#ibcon#about to read 5, iclass 22, count 0 2006.229.17:00:21.49#ibcon#read 5, iclass 22, count 0 2006.229.17:00:21.49#ibcon#about to read 6, iclass 22, count 0 2006.229.17:00:21.49#ibcon#read 6, iclass 22, count 0 2006.229.17:00:21.49#ibcon#end of sib2, iclass 22, count 0 2006.229.17:00:21.49#ibcon#*after write, iclass 22, count 0 2006.229.17:00:21.49#ibcon#*before return 0, iclass 22, count 0 2006.229.17:00:21.49#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:21.49#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:00:21.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:00:21.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:00:21.49$vck44/vb=3,4 2006.229.17:00:21.49#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.17:00:21.49#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.17:00:21.49#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:21.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:21.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:21.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:21.55#ibcon#enter wrdev, iclass 24, count 2 2006.229.17:00:21.55#ibcon#first serial, iclass 24, count 2 2006.229.17:00:21.55#ibcon#enter sib2, iclass 24, count 2 2006.229.17:00:21.55#ibcon#flushed, iclass 24, count 2 2006.229.17:00:21.55#ibcon#about to write, iclass 24, count 2 2006.229.17:00:21.55#ibcon#wrote, iclass 24, count 2 2006.229.17:00:21.55#ibcon#about to read 3, iclass 24, count 2 2006.229.17:00:21.57#ibcon#read 3, iclass 24, count 2 2006.229.17:00:21.57#ibcon#about to read 4, iclass 24, count 2 2006.229.17:00:21.57#ibcon#read 4, iclass 24, count 2 2006.229.17:00:21.57#ibcon#about to read 5, iclass 24, count 2 2006.229.17:00:21.57#ibcon#read 5, iclass 24, count 2 2006.229.17:00:21.57#ibcon#about to read 6, iclass 24, count 2 2006.229.17:00:21.57#ibcon#read 6, iclass 24, count 2 2006.229.17:00:21.57#ibcon#end of sib2, iclass 24, count 2 2006.229.17:00:21.57#ibcon#*mode == 0, iclass 24, count 2 2006.229.17:00:21.57#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.17:00:21.57#ibcon#[27=AT03-04\r\n] 2006.229.17:00:21.57#ibcon#*before write, iclass 24, count 2 2006.229.17:00:21.57#ibcon#enter sib2, iclass 24, count 2 2006.229.17:00:21.57#ibcon#flushed, iclass 24, count 2 2006.229.17:00:21.57#ibcon#about to write, iclass 24, count 2 2006.229.17:00:21.57#ibcon#wrote, iclass 24, count 2 2006.229.17:00:21.57#ibcon#about to read 3, iclass 24, count 2 2006.229.17:00:21.60#ibcon#read 3, iclass 24, count 2 2006.229.17:00:21.60#ibcon#about to read 4, iclass 24, count 2 2006.229.17:00:21.60#ibcon#read 4, iclass 24, count 2 2006.229.17:00:21.60#ibcon#about to read 5, iclass 24, count 2 2006.229.17:00:21.60#ibcon#read 5, iclass 24, count 2 2006.229.17:00:21.60#ibcon#about to read 6, iclass 24, count 2 2006.229.17:00:21.60#ibcon#read 6, iclass 24, count 2 2006.229.17:00:21.60#ibcon#end of sib2, iclass 24, count 2 2006.229.17:00:21.60#ibcon#*after write, iclass 24, count 2 2006.229.17:00:21.60#ibcon#*before return 0, iclass 24, count 2 2006.229.17:00:21.60#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:21.60#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:00:21.60#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.17:00:21.60#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:21.60#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:21.72#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:21.72#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:21.72#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:00:21.72#ibcon#first serial, iclass 24, count 0 2006.229.17:00:21.72#ibcon#enter sib2, iclass 24, count 0 2006.229.17:00:21.72#ibcon#flushed, iclass 24, count 0 2006.229.17:00:21.72#ibcon#about to write, iclass 24, count 0 2006.229.17:00:21.72#ibcon#wrote, iclass 24, count 0 2006.229.17:00:21.72#ibcon#about to read 3, iclass 24, count 0 2006.229.17:00:21.74#ibcon#read 3, iclass 24, count 0 2006.229.17:00:21.74#ibcon#about to read 4, iclass 24, count 0 2006.229.17:00:21.74#ibcon#read 4, iclass 24, count 0 2006.229.17:00:21.74#ibcon#about to read 5, iclass 24, count 0 2006.229.17:00:21.74#ibcon#read 5, iclass 24, count 0 2006.229.17:00:21.74#ibcon#about to read 6, iclass 24, count 0 2006.229.17:00:21.74#ibcon#read 6, iclass 24, count 0 2006.229.17:00:21.74#ibcon#end of sib2, iclass 24, count 0 2006.229.17:00:21.74#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:00:21.74#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:00:21.74#ibcon#[27=USB\r\n] 2006.229.17:00:21.74#ibcon#*before write, iclass 24, count 0 2006.229.17:00:21.74#ibcon#enter sib2, iclass 24, count 0 2006.229.17:00:21.74#ibcon#flushed, iclass 24, count 0 2006.229.17:00:21.74#ibcon#about to write, iclass 24, count 0 2006.229.17:00:21.74#ibcon#wrote, iclass 24, count 0 2006.229.17:00:21.74#ibcon#about to read 3, iclass 24, count 0 2006.229.17:00:21.77#ibcon#read 3, iclass 24, count 0 2006.229.17:00:21.77#ibcon#about to read 4, iclass 24, count 0 2006.229.17:00:21.77#ibcon#read 4, iclass 24, count 0 2006.229.17:00:21.77#ibcon#about to read 5, iclass 24, count 0 2006.229.17:00:21.77#ibcon#read 5, iclass 24, count 0 2006.229.17:00:21.77#ibcon#about to read 6, iclass 24, count 0 2006.229.17:00:21.77#ibcon#read 6, iclass 24, count 0 2006.229.17:00:21.77#ibcon#end of sib2, iclass 24, count 0 2006.229.17:00:21.77#ibcon#*after write, iclass 24, count 0 2006.229.17:00:21.77#ibcon#*before return 0, iclass 24, count 0 2006.229.17:00:21.77#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:21.77#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:00:21.77#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:00:21.77#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:00:21.77$vck44/vblo=4,679.99 2006.229.17:00:21.77#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.17:00:21.77#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.17:00:21.77#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:21.77#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:21.77#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:21.77#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:21.77#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:00:21.77#ibcon#first serial, iclass 26, count 0 2006.229.17:00:21.77#ibcon#enter sib2, iclass 26, count 0 2006.229.17:00:21.77#ibcon#flushed, iclass 26, count 0 2006.229.17:00:21.77#ibcon#about to write, iclass 26, count 0 2006.229.17:00:21.77#ibcon#wrote, iclass 26, count 0 2006.229.17:00:21.77#ibcon#about to read 3, iclass 26, count 0 2006.229.17:00:21.79#ibcon#read 3, iclass 26, count 0 2006.229.17:00:21.79#ibcon#about to read 4, iclass 26, count 0 2006.229.17:00:21.79#ibcon#read 4, iclass 26, count 0 2006.229.17:00:21.79#ibcon#about to read 5, iclass 26, count 0 2006.229.17:00:21.79#ibcon#read 5, iclass 26, count 0 2006.229.17:00:21.79#ibcon#about to read 6, iclass 26, count 0 2006.229.17:00:21.79#ibcon#read 6, iclass 26, count 0 2006.229.17:00:21.79#ibcon#end of sib2, iclass 26, count 0 2006.229.17:00:21.79#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:00:21.79#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:00:21.79#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:00:21.79#ibcon#*before write, iclass 26, count 0 2006.229.17:00:21.79#ibcon#enter sib2, iclass 26, count 0 2006.229.17:00:21.79#ibcon#flushed, iclass 26, count 0 2006.229.17:00:21.79#ibcon#about to write, iclass 26, count 0 2006.229.17:00:21.79#ibcon#wrote, iclass 26, count 0 2006.229.17:00:21.79#ibcon#about to read 3, iclass 26, count 0 2006.229.17:00:21.83#ibcon#read 3, iclass 26, count 0 2006.229.17:00:21.83#ibcon#about to read 4, iclass 26, count 0 2006.229.17:00:21.83#ibcon#read 4, iclass 26, count 0 2006.229.17:00:21.83#ibcon#about to read 5, iclass 26, count 0 2006.229.17:00:21.83#ibcon#read 5, iclass 26, count 0 2006.229.17:00:21.83#ibcon#about to read 6, iclass 26, count 0 2006.229.17:00:21.83#ibcon#read 6, iclass 26, count 0 2006.229.17:00:21.83#ibcon#end of sib2, iclass 26, count 0 2006.229.17:00:21.83#ibcon#*after write, iclass 26, count 0 2006.229.17:00:21.83#ibcon#*before return 0, iclass 26, count 0 2006.229.17:00:21.83#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:21.83#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:00:21.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:00:21.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:00:21.83$vck44/vb=4,4 2006.229.17:00:21.83#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.17:00:21.83#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.17:00:21.83#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:21.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:21.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:21.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:21.89#ibcon#enter wrdev, iclass 28, count 2 2006.229.17:00:21.89#ibcon#first serial, iclass 28, count 2 2006.229.17:00:21.89#ibcon#enter sib2, iclass 28, count 2 2006.229.17:00:21.89#ibcon#flushed, iclass 28, count 2 2006.229.17:00:21.89#ibcon#about to write, iclass 28, count 2 2006.229.17:00:21.89#ibcon#wrote, iclass 28, count 2 2006.229.17:00:21.89#ibcon#about to read 3, iclass 28, count 2 2006.229.17:00:21.91#ibcon#read 3, iclass 28, count 2 2006.229.17:00:21.91#ibcon#about to read 4, iclass 28, count 2 2006.229.17:00:21.91#ibcon#read 4, iclass 28, count 2 2006.229.17:00:21.91#ibcon#about to read 5, iclass 28, count 2 2006.229.17:00:21.91#ibcon#read 5, iclass 28, count 2 2006.229.17:00:21.91#ibcon#about to read 6, iclass 28, count 2 2006.229.17:00:21.91#ibcon#read 6, iclass 28, count 2 2006.229.17:00:21.91#ibcon#end of sib2, iclass 28, count 2 2006.229.17:00:21.91#ibcon#*mode == 0, iclass 28, count 2 2006.229.17:00:21.91#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.17:00:21.91#ibcon#[27=AT04-04\r\n] 2006.229.17:00:21.91#ibcon#*before write, iclass 28, count 2 2006.229.17:00:21.91#ibcon#enter sib2, iclass 28, count 2 2006.229.17:00:21.91#ibcon#flushed, iclass 28, count 2 2006.229.17:00:21.91#ibcon#about to write, iclass 28, count 2 2006.229.17:00:21.91#ibcon#wrote, iclass 28, count 2 2006.229.17:00:21.91#ibcon#about to read 3, iclass 28, count 2 2006.229.17:00:21.94#ibcon#read 3, iclass 28, count 2 2006.229.17:00:21.94#ibcon#about to read 4, iclass 28, count 2 2006.229.17:00:21.94#ibcon#read 4, iclass 28, count 2 2006.229.17:00:21.94#ibcon#about to read 5, iclass 28, count 2 2006.229.17:00:21.94#ibcon#read 5, iclass 28, count 2 2006.229.17:00:21.94#ibcon#about to read 6, iclass 28, count 2 2006.229.17:00:21.94#ibcon#read 6, iclass 28, count 2 2006.229.17:00:21.94#ibcon#end of sib2, iclass 28, count 2 2006.229.17:00:21.94#ibcon#*after write, iclass 28, count 2 2006.229.17:00:21.94#ibcon#*before return 0, iclass 28, count 2 2006.229.17:00:21.94#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:21.94#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:00:21.94#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.17:00:21.94#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:21.94#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:22.06#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:22.06#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:22.06#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:00:22.06#ibcon#first serial, iclass 28, count 0 2006.229.17:00:22.06#ibcon#enter sib2, iclass 28, count 0 2006.229.17:00:22.06#ibcon#flushed, iclass 28, count 0 2006.229.17:00:22.06#ibcon#about to write, iclass 28, count 0 2006.229.17:00:22.06#ibcon#wrote, iclass 28, count 0 2006.229.17:00:22.06#ibcon#about to read 3, iclass 28, count 0 2006.229.17:00:22.08#ibcon#read 3, iclass 28, count 0 2006.229.17:00:22.08#ibcon#about to read 4, iclass 28, count 0 2006.229.17:00:22.08#ibcon#read 4, iclass 28, count 0 2006.229.17:00:22.08#ibcon#about to read 5, iclass 28, count 0 2006.229.17:00:22.08#ibcon#read 5, iclass 28, count 0 2006.229.17:00:22.08#ibcon#about to read 6, iclass 28, count 0 2006.229.17:00:22.08#ibcon#read 6, iclass 28, count 0 2006.229.17:00:22.08#ibcon#end of sib2, iclass 28, count 0 2006.229.17:00:22.08#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:00:22.08#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:00:22.08#ibcon#[27=USB\r\n] 2006.229.17:00:22.08#ibcon#*before write, iclass 28, count 0 2006.229.17:00:22.08#ibcon#enter sib2, iclass 28, count 0 2006.229.17:00:22.08#ibcon#flushed, iclass 28, count 0 2006.229.17:00:22.08#ibcon#about to write, iclass 28, count 0 2006.229.17:00:22.08#ibcon#wrote, iclass 28, count 0 2006.229.17:00:22.08#ibcon#about to read 3, iclass 28, count 0 2006.229.17:00:22.11#ibcon#read 3, iclass 28, count 0 2006.229.17:00:22.11#ibcon#about to read 4, iclass 28, count 0 2006.229.17:00:22.11#ibcon#read 4, iclass 28, count 0 2006.229.17:00:22.11#ibcon#about to read 5, iclass 28, count 0 2006.229.17:00:22.11#ibcon#read 5, iclass 28, count 0 2006.229.17:00:22.11#ibcon#about to read 6, iclass 28, count 0 2006.229.17:00:22.11#ibcon#read 6, iclass 28, count 0 2006.229.17:00:22.11#ibcon#end of sib2, iclass 28, count 0 2006.229.17:00:22.11#ibcon#*after write, iclass 28, count 0 2006.229.17:00:22.11#ibcon#*before return 0, iclass 28, count 0 2006.229.17:00:22.11#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:22.11#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:00:22.11#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:00:22.11#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:00:22.11$vck44/vblo=5,709.99 2006.229.17:00:22.11#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:00:22.11#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:00:22.11#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:22.11#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:22.11#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:22.11#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:22.11#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:00:22.11#ibcon#first serial, iclass 30, count 0 2006.229.17:00:22.11#ibcon#enter sib2, iclass 30, count 0 2006.229.17:00:22.11#ibcon#flushed, iclass 30, count 0 2006.229.17:00:22.11#ibcon#about to write, iclass 30, count 0 2006.229.17:00:22.11#ibcon#wrote, iclass 30, count 0 2006.229.17:00:22.11#ibcon#about to read 3, iclass 30, count 0 2006.229.17:00:22.13#ibcon#read 3, iclass 30, count 0 2006.229.17:00:22.13#ibcon#about to read 4, iclass 30, count 0 2006.229.17:00:22.13#ibcon#read 4, iclass 30, count 0 2006.229.17:00:22.13#ibcon#about to read 5, iclass 30, count 0 2006.229.17:00:22.13#ibcon#read 5, iclass 30, count 0 2006.229.17:00:22.13#ibcon#about to read 6, iclass 30, count 0 2006.229.17:00:22.13#ibcon#read 6, iclass 30, count 0 2006.229.17:00:22.13#ibcon#end of sib2, iclass 30, count 0 2006.229.17:00:22.13#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:00:22.13#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:00:22.13#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:00:22.13#ibcon#*before write, iclass 30, count 0 2006.229.17:00:22.13#ibcon#enter sib2, iclass 30, count 0 2006.229.17:00:22.13#ibcon#flushed, iclass 30, count 0 2006.229.17:00:22.13#ibcon#about to write, iclass 30, count 0 2006.229.17:00:22.13#ibcon#wrote, iclass 30, count 0 2006.229.17:00:22.13#ibcon#about to read 3, iclass 30, count 0 2006.229.17:00:22.17#ibcon#read 3, iclass 30, count 0 2006.229.17:00:22.17#ibcon#about to read 4, iclass 30, count 0 2006.229.17:00:22.17#ibcon#read 4, iclass 30, count 0 2006.229.17:00:22.17#ibcon#about to read 5, iclass 30, count 0 2006.229.17:00:22.17#ibcon#read 5, iclass 30, count 0 2006.229.17:00:22.17#ibcon#about to read 6, iclass 30, count 0 2006.229.17:00:22.17#ibcon#read 6, iclass 30, count 0 2006.229.17:00:22.17#ibcon#end of sib2, iclass 30, count 0 2006.229.17:00:22.17#ibcon#*after write, iclass 30, count 0 2006.229.17:00:22.17#ibcon#*before return 0, iclass 30, count 0 2006.229.17:00:22.17#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:22.17#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:00:22.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:00:22.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:00:22.17$vck44/vb=5,4 2006.229.17:00:22.17#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.17:00:22.17#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.17:00:22.17#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:22.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:22.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:22.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:22.23#ibcon#enter wrdev, iclass 32, count 2 2006.229.17:00:22.23#ibcon#first serial, iclass 32, count 2 2006.229.17:00:22.23#ibcon#enter sib2, iclass 32, count 2 2006.229.17:00:22.23#ibcon#flushed, iclass 32, count 2 2006.229.17:00:22.23#ibcon#about to write, iclass 32, count 2 2006.229.17:00:22.23#ibcon#wrote, iclass 32, count 2 2006.229.17:00:22.23#ibcon#about to read 3, iclass 32, count 2 2006.229.17:00:22.25#ibcon#read 3, iclass 32, count 2 2006.229.17:00:22.25#ibcon#about to read 4, iclass 32, count 2 2006.229.17:00:22.25#ibcon#read 4, iclass 32, count 2 2006.229.17:00:22.25#ibcon#about to read 5, iclass 32, count 2 2006.229.17:00:22.25#ibcon#read 5, iclass 32, count 2 2006.229.17:00:22.25#ibcon#about to read 6, iclass 32, count 2 2006.229.17:00:22.25#ibcon#read 6, iclass 32, count 2 2006.229.17:00:22.25#ibcon#end of sib2, iclass 32, count 2 2006.229.17:00:22.25#ibcon#*mode == 0, iclass 32, count 2 2006.229.17:00:22.25#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.17:00:22.25#ibcon#[27=AT05-04\r\n] 2006.229.17:00:22.25#ibcon#*before write, iclass 32, count 2 2006.229.17:00:22.25#ibcon#enter sib2, iclass 32, count 2 2006.229.17:00:22.25#ibcon#flushed, iclass 32, count 2 2006.229.17:00:22.25#ibcon#about to write, iclass 32, count 2 2006.229.17:00:22.25#ibcon#wrote, iclass 32, count 2 2006.229.17:00:22.25#ibcon#about to read 3, iclass 32, count 2 2006.229.17:00:22.28#ibcon#read 3, iclass 32, count 2 2006.229.17:00:22.28#ibcon#about to read 4, iclass 32, count 2 2006.229.17:00:22.28#ibcon#read 4, iclass 32, count 2 2006.229.17:00:22.28#ibcon#about to read 5, iclass 32, count 2 2006.229.17:00:22.28#ibcon#read 5, iclass 32, count 2 2006.229.17:00:22.28#ibcon#about to read 6, iclass 32, count 2 2006.229.17:00:22.28#ibcon#read 6, iclass 32, count 2 2006.229.17:00:22.28#ibcon#end of sib2, iclass 32, count 2 2006.229.17:00:22.28#ibcon#*after write, iclass 32, count 2 2006.229.17:00:22.28#ibcon#*before return 0, iclass 32, count 2 2006.229.17:00:22.28#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:22.28#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:00:22.28#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.17:00:22.28#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:22.28#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:22.40#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:22.40#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:22.40#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:00:22.40#ibcon#first serial, iclass 32, count 0 2006.229.17:00:22.40#ibcon#enter sib2, iclass 32, count 0 2006.229.17:00:22.40#ibcon#flushed, iclass 32, count 0 2006.229.17:00:22.40#ibcon#about to write, iclass 32, count 0 2006.229.17:00:22.40#ibcon#wrote, iclass 32, count 0 2006.229.17:00:22.40#ibcon#about to read 3, iclass 32, count 0 2006.229.17:00:22.42#ibcon#read 3, iclass 32, count 0 2006.229.17:00:22.42#ibcon#about to read 4, iclass 32, count 0 2006.229.17:00:22.42#ibcon#read 4, iclass 32, count 0 2006.229.17:00:22.42#ibcon#about to read 5, iclass 32, count 0 2006.229.17:00:22.42#ibcon#read 5, iclass 32, count 0 2006.229.17:00:22.42#ibcon#about to read 6, iclass 32, count 0 2006.229.17:00:22.42#ibcon#read 6, iclass 32, count 0 2006.229.17:00:22.42#ibcon#end of sib2, iclass 32, count 0 2006.229.17:00:22.42#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:00:22.42#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:00:22.42#ibcon#[27=USB\r\n] 2006.229.17:00:22.42#ibcon#*before write, iclass 32, count 0 2006.229.17:00:22.42#ibcon#enter sib2, iclass 32, count 0 2006.229.17:00:22.42#ibcon#flushed, iclass 32, count 0 2006.229.17:00:22.42#ibcon#about to write, iclass 32, count 0 2006.229.17:00:22.42#ibcon#wrote, iclass 32, count 0 2006.229.17:00:22.42#ibcon#about to read 3, iclass 32, count 0 2006.229.17:00:22.45#ibcon#read 3, iclass 32, count 0 2006.229.17:00:22.45#ibcon#about to read 4, iclass 32, count 0 2006.229.17:00:22.45#ibcon#read 4, iclass 32, count 0 2006.229.17:00:22.45#ibcon#about to read 5, iclass 32, count 0 2006.229.17:00:22.45#ibcon#read 5, iclass 32, count 0 2006.229.17:00:22.45#ibcon#about to read 6, iclass 32, count 0 2006.229.17:00:22.45#ibcon#read 6, iclass 32, count 0 2006.229.17:00:22.45#ibcon#end of sib2, iclass 32, count 0 2006.229.17:00:22.45#ibcon#*after write, iclass 32, count 0 2006.229.17:00:22.45#ibcon#*before return 0, iclass 32, count 0 2006.229.17:00:22.45#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:22.45#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:00:22.45#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:00:22.45#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:00:22.45$vck44/vblo=6,719.99 2006.229.17:00:22.45#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.17:00:22.45#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.17:00:22.45#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:22.45#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:22.45#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:22.45#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:22.45#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:00:22.45#ibcon#first serial, iclass 34, count 0 2006.229.17:00:22.45#ibcon#enter sib2, iclass 34, count 0 2006.229.17:00:22.45#ibcon#flushed, iclass 34, count 0 2006.229.17:00:22.45#ibcon#about to write, iclass 34, count 0 2006.229.17:00:22.45#ibcon#wrote, iclass 34, count 0 2006.229.17:00:22.45#ibcon#about to read 3, iclass 34, count 0 2006.229.17:00:22.47#ibcon#read 3, iclass 34, count 0 2006.229.17:00:22.47#ibcon#about to read 4, iclass 34, count 0 2006.229.17:00:22.47#ibcon#read 4, iclass 34, count 0 2006.229.17:00:22.47#ibcon#about to read 5, iclass 34, count 0 2006.229.17:00:22.47#ibcon#read 5, iclass 34, count 0 2006.229.17:00:22.47#ibcon#about to read 6, iclass 34, count 0 2006.229.17:00:22.47#ibcon#read 6, iclass 34, count 0 2006.229.17:00:22.47#ibcon#end of sib2, iclass 34, count 0 2006.229.17:00:22.47#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:00:22.47#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:00:22.47#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:00:22.47#ibcon#*before write, iclass 34, count 0 2006.229.17:00:22.47#ibcon#enter sib2, iclass 34, count 0 2006.229.17:00:22.47#ibcon#flushed, iclass 34, count 0 2006.229.17:00:22.47#ibcon#about to write, iclass 34, count 0 2006.229.17:00:22.47#ibcon#wrote, iclass 34, count 0 2006.229.17:00:22.47#ibcon#about to read 3, iclass 34, count 0 2006.229.17:00:22.51#ibcon#read 3, iclass 34, count 0 2006.229.17:00:22.51#ibcon#about to read 4, iclass 34, count 0 2006.229.17:00:22.51#ibcon#read 4, iclass 34, count 0 2006.229.17:00:22.51#ibcon#about to read 5, iclass 34, count 0 2006.229.17:00:22.51#ibcon#read 5, iclass 34, count 0 2006.229.17:00:22.51#ibcon#about to read 6, iclass 34, count 0 2006.229.17:00:22.51#ibcon#read 6, iclass 34, count 0 2006.229.17:00:22.51#ibcon#end of sib2, iclass 34, count 0 2006.229.17:00:22.51#ibcon#*after write, iclass 34, count 0 2006.229.17:00:22.51#ibcon#*before return 0, iclass 34, count 0 2006.229.17:00:22.51#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:22.51#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:00:22.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:00:22.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:00:22.51$vck44/vb=6,4 2006.229.17:00:22.51#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.17:00:22.51#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.17:00:22.51#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:22.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:22.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:22.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:22.57#ibcon#enter wrdev, iclass 36, count 2 2006.229.17:00:22.57#ibcon#first serial, iclass 36, count 2 2006.229.17:00:22.57#ibcon#enter sib2, iclass 36, count 2 2006.229.17:00:22.57#ibcon#flushed, iclass 36, count 2 2006.229.17:00:22.57#ibcon#about to write, iclass 36, count 2 2006.229.17:00:22.57#ibcon#wrote, iclass 36, count 2 2006.229.17:00:22.57#ibcon#about to read 3, iclass 36, count 2 2006.229.17:00:22.59#ibcon#read 3, iclass 36, count 2 2006.229.17:00:22.59#ibcon#about to read 4, iclass 36, count 2 2006.229.17:00:22.59#ibcon#read 4, iclass 36, count 2 2006.229.17:00:22.59#ibcon#about to read 5, iclass 36, count 2 2006.229.17:00:22.59#ibcon#read 5, iclass 36, count 2 2006.229.17:00:22.59#ibcon#about to read 6, iclass 36, count 2 2006.229.17:00:22.59#ibcon#read 6, iclass 36, count 2 2006.229.17:00:22.59#ibcon#end of sib2, iclass 36, count 2 2006.229.17:00:22.59#ibcon#*mode == 0, iclass 36, count 2 2006.229.17:00:22.59#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.17:00:22.59#ibcon#[27=AT06-04\r\n] 2006.229.17:00:22.59#ibcon#*before write, iclass 36, count 2 2006.229.17:00:22.59#ibcon#enter sib2, iclass 36, count 2 2006.229.17:00:22.59#ibcon#flushed, iclass 36, count 2 2006.229.17:00:22.59#ibcon#about to write, iclass 36, count 2 2006.229.17:00:22.59#ibcon#wrote, iclass 36, count 2 2006.229.17:00:22.59#ibcon#about to read 3, iclass 36, count 2 2006.229.17:00:22.62#ibcon#read 3, iclass 36, count 2 2006.229.17:00:22.62#ibcon#about to read 4, iclass 36, count 2 2006.229.17:00:22.62#ibcon#read 4, iclass 36, count 2 2006.229.17:00:22.62#ibcon#about to read 5, iclass 36, count 2 2006.229.17:00:22.62#ibcon#read 5, iclass 36, count 2 2006.229.17:00:22.62#ibcon#about to read 6, iclass 36, count 2 2006.229.17:00:22.62#ibcon#read 6, iclass 36, count 2 2006.229.17:00:22.62#ibcon#end of sib2, iclass 36, count 2 2006.229.17:00:22.62#ibcon#*after write, iclass 36, count 2 2006.229.17:00:22.62#ibcon#*before return 0, iclass 36, count 2 2006.229.17:00:22.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:22.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:00:22.62#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.17:00:22.62#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:22.62#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:22.74#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:22.74#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:22.74#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:00:22.74#ibcon#first serial, iclass 36, count 0 2006.229.17:00:22.74#ibcon#enter sib2, iclass 36, count 0 2006.229.17:00:22.74#ibcon#flushed, iclass 36, count 0 2006.229.17:00:22.74#ibcon#about to write, iclass 36, count 0 2006.229.17:00:22.74#ibcon#wrote, iclass 36, count 0 2006.229.17:00:22.74#ibcon#about to read 3, iclass 36, count 0 2006.229.17:00:22.76#ibcon#read 3, iclass 36, count 0 2006.229.17:00:22.76#ibcon#about to read 4, iclass 36, count 0 2006.229.17:00:22.76#ibcon#read 4, iclass 36, count 0 2006.229.17:00:22.76#ibcon#about to read 5, iclass 36, count 0 2006.229.17:00:22.76#ibcon#read 5, iclass 36, count 0 2006.229.17:00:22.76#ibcon#about to read 6, iclass 36, count 0 2006.229.17:00:22.76#ibcon#read 6, iclass 36, count 0 2006.229.17:00:22.76#ibcon#end of sib2, iclass 36, count 0 2006.229.17:00:22.76#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:00:22.76#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:00:22.76#ibcon#[27=USB\r\n] 2006.229.17:00:22.76#ibcon#*before write, iclass 36, count 0 2006.229.17:00:22.76#ibcon#enter sib2, iclass 36, count 0 2006.229.17:00:22.76#ibcon#flushed, iclass 36, count 0 2006.229.17:00:22.76#ibcon#about to write, iclass 36, count 0 2006.229.17:00:22.76#ibcon#wrote, iclass 36, count 0 2006.229.17:00:22.76#ibcon#about to read 3, iclass 36, count 0 2006.229.17:00:22.79#ibcon#read 3, iclass 36, count 0 2006.229.17:00:22.79#ibcon#about to read 4, iclass 36, count 0 2006.229.17:00:22.79#ibcon#read 4, iclass 36, count 0 2006.229.17:00:22.79#ibcon#about to read 5, iclass 36, count 0 2006.229.17:00:22.79#ibcon#read 5, iclass 36, count 0 2006.229.17:00:22.79#ibcon#about to read 6, iclass 36, count 0 2006.229.17:00:22.79#ibcon#read 6, iclass 36, count 0 2006.229.17:00:22.79#ibcon#end of sib2, iclass 36, count 0 2006.229.17:00:22.79#ibcon#*after write, iclass 36, count 0 2006.229.17:00:22.79#ibcon#*before return 0, iclass 36, count 0 2006.229.17:00:22.79#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:22.79#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:00:22.79#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:00:22.79#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:00:22.79$vck44/vblo=7,734.99 2006.229.17:00:22.79#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.17:00:22.79#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.17:00:22.79#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:22.79#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:22.79#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:22.79#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:22.79#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:00:22.79#ibcon#first serial, iclass 38, count 0 2006.229.17:00:22.79#ibcon#enter sib2, iclass 38, count 0 2006.229.17:00:22.79#ibcon#flushed, iclass 38, count 0 2006.229.17:00:22.79#ibcon#about to write, iclass 38, count 0 2006.229.17:00:22.79#ibcon#wrote, iclass 38, count 0 2006.229.17:00:22.79#ibcon#about to read 3, iclass 38, count 0 2006.229.17:00:22.81#ibcon#read 3, iclass 38, count 0 2006.229.17:00:22.81#ibcon#about to read 4, iclass 38, count 0 2006.229.17:00:22.81#ibcon#read 4, iclass 38, count 0 2006.229.17:00:22.81#ibcon#about to read 5, iclass 38, count 0 2006.229.17:00:22.81#ibcon#read 5, iclass 38, count 0 2006.229.17:00:22.81#ibcon#about to read 6, iclass 38, count 0 2006.229.17:00:22.81#ibcon#read 6, iclass 38, count 0 2006.229.17:00:22.81#ibcon#end of sib2, iclass 38, count 0 2006.229.17:00:22.81#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:00:22.81#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:00:22.81#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:00:22.81#ibcon#*before write, iclass 38, count 0 2006.229.17:00:22.81#ibcon#enter sib2, iclass 38, count 0 2006.229.17:00:22.81#ibcon#flushed, iclass 38, count 0 2006.229.17:00:22.81#ibcon#about to write, iclass 38, count 0 2006.229.17:00:22.81#ibcon#wrote, iclass 38, count 0 2006.229.17:00:22.81#ibcon#about to read 3, iclass 38, count 0 2006.229.17:00:22.85#ibcon#read 3, iclass 38, count 0 2006.229.17:00:22.85#ibcon#about to read 4, iclass 38, count 0 2006.229.17:00:22.85#ibcon#read 4, iclass 38, count 0 2006.229.17:00:22.85#ibcon#about to read 5, iclass 38, count 0 2006.229.17:00:22.85#ibcon#read 5, iclass 38, count 0 2006.229.17:00:22.85#ibcon#about to read 6, iclass 38, count 0 2006.229.17:00:22.85#ibcon#read 6, iclass 38, count 0 2006.229.17:00:22.85#ibcon#end of sib2, iclass 38, count 0 2006.229.17:00:22.85#ibcon#*after write, iclass 38, count 0 2006.229.17:00:22.85#ibcon#*before return 0, iclass 38, count 0 2006.229.17:00:22.85#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:22.85#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:00:22.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:00:22.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:00:22.85$vck44/vb=7,4 2006.229.17:00:22.85#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.17:00:22.85#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.17:00:22.85#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:22.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:22.91#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:22.91#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:22.91#ibcon#enter wrdev, iclass 40, count 2 2006.229.17:00:22.91#ibcon#first serial, iclass 40, count 2 2006.229.17:00:22.91#ibcon#enter sib2, iclass 40, count 2 2006.229.17:00:22.91#ibcon#flushed, iclass 40, count 2 2006.229.17:00:22.91#ibcon#about to write, iclass 40, count 2 2006.229.17:00:22.91#ibcon#wrote, iclass 40, count 2 2006.229.17:00:22.91#ibcon#about to read 3, iclass 40, count 2 2006.229.17:00:22.93#ibcon#read 3, iclass 40, count 2 2006.229.17:00:22.93#ibcon#about to read 4, iclass 40, count 2 2006.229.17:00:22.93#ibcon#read 4, iclass 40, count 2 2006.229.17:00:22.93#ibcon#about to read 5, iclass 40, count 2 2006.229.17:00:22.93#ibcon#read 5, iclass 40, count 2 2006.229.17:00:22.93#ibcon#about to read 6, iclass 40, count 2 2006.229.17:00:22.93#ibcon#read 6, iclass 40, count 2 2006.229.17:00:22.93#ibcon#end of sib2, iclass 40, count 2 2006.229.17:00:22.93#ibcon#*mode == 0, iclass 40, count 2 2006.229.17:00:22.93#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.17:00:22.93#ibcon#[27=AT07-04\r\n] 2006.229.17:00:22.93#ibcon#*before write, iclass 40, count 2 2006.229.17:00:22.93#ibcon#enter sib2, iclass 40, count 2 2006.229.17:00:22.93#ibcon#flushed, iclass 40, count 2 2006.229.17:00:22.93#ibcon#about to write, iclass 40, count 2 2006.229.17:00:22.93#ibcon#wrote, iclass 40, count 2 2006.229.17:00:22.93#ibcon#about to read 3, iclass 40, count 2 2006.229.17:00:22.96#ibcon#read 3, iclass 40, count 2 2006.229.17:00:22.96#ibcon#about to read 4, iclass 40, count 2 2006.229.17:00:22.96#ibcon#read 4, iclass 40, count 2 2006.229.17:00:22.96#ibcon#about to read 5, iclass 40, count 2 2006.229.17:00:22.96#ibcon#read 5, iclass 40, count 2 2006.229.17:00:22.96#ibcon#about to read 6, iclass 40, count 2 2006.229.17:00:22.96#ibcon#read 6, iclass 40, count 2 2006.229.17:00:22.96#ibcon#end of sib2, iclass 40, count 2 2006.229.17:00:22.96#ibcon#*after write, iclass 40, count 2 2006.229.17:00:22.96#ibcon#*before return 0, iclass 40, count 2 2006.229.17:00:22.96#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:22.96#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:00:22.96#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.17:00:22.96#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:22.96#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:23.08#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:23.08#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:23.08#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:00:23.08#ibcon#first serial, iclass 40, count 0 2006.229.17:00:23.08#ibcon#enter sib2, iclass 40, count 0 2006.229.17:00:23.08#ibcon#flushed, iclass 40, count 0 2006.229.17:00:23.08#ibcon#about to write, iclass 40, count 0 2006.229.17:00:23.08#ibcon#wrote, iclass 40, count 0 2006.229.17:00:23.08#ibcon#about to read 3, iclass 40, count 0 2006.229.17:00:23.10#ibcon#read 3, iclass 40, count 0 2006.229.17:00:23.10#ibcon#about to read 4, iclass 40, count 0 2006.229.17:00:23.10#ibcon#read 4, iclass 40, count 0 2006.229.17:00:23.10#ibcon#about to read 5, iclass 40, count 0 2006.229.17:00:23.10#ibcon#read 5, iclass 40, count 0 2006.229.17:00:23.10#ibcon#about to read 6, iclass 40, count 0 2006.229.17:00:23.10#ibcon#read 6, iclass 40, count 0 2006.229.17:00:23.10#ibcon#end of sib2, iclass 40, count 0 2006.229.17:00:23.10#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:00:23.10#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:00:23.10#ibcon#[27=USB\r\n] 2006.229.17:00:23.10#ibcon#*before write, iclass 40, count 0 2006.229.17:00:23.10#ibcon#enter sib2, iclass 40, count 0 2006.229.17:00:23.10#ibcon#flushed, iclass 40, count 0 2006.229.17:00:23.10#ibcon#about to write, iclass 40, count 0 2006.229.17:00:23.10#ibcon#wrote, iclass 40, count 0 2006.229.17:00:23.10#ibcon#about to read 3, iclass 40, count 0 2006.229.17:00:23.13#ibcon#read 3, iclass 40, count 0 2006.229.17:00:23.13#ibcon#about to read 4, iclass 40, count 0 2006.229.17:00:23.13#ibcon#read 4, iclass 40, count 0 2006.229.17:00:23.13#ibcon#about to read 5, iclass 40, count 0 2006.229.17:00:23.13#ibcon#read 5, iclass 40, count 0 2006.229.17:00:23.13#ibcon#about to read 6, iclass 40, count 0 2006.229.17:00:23.13#ibcon#read 6, iclass 40, count 0 2006.229.17:00:23.13#ibcon#end of sib2, iclass 40, count 0 2006.229.17:00:23.13#ibcon#*after write, iclass 40, count 0 2006.229.17:00:23.13#ibcon#*before return 0, iclass 40, count 0 2006.229.17:00:23.13#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:23.13#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:00:23.13#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:00:23.13#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:00:23.13$vck44/vblo=8,744.99 2006.229.17:00:23.13#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.17:00:23.13#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.17:00:23.13#ibcon#ireg 17 cls_cnt 0 2006.229.17:00:23.13#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:23.13#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:23.13#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:23.13#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:00:23.13#ibcon#first serial, iclass 4, count 0 2006.229.17:00:23.13#ibcon#enter sib2, iclass 4, count 0 2006.229.17:00:23.13#ibcon#flushed, iclass 4, count 0 2006.229.17:00:23.13#ibcon#about to write, iclass 4, count 0 2006.229.17:00:23.13#ibcon#wrote, iclass 4, count 0 2006.229.17:00:23.13#ibcon#about to read 3, iclass 4, count 0 2006.229.17:00:23.15#ibcon#read 3, iclass 4, count 0 2006.229.17:00:23.15#ibcon#about to read 4, iclass 4, count 0 2006.229.17:00:23.15#ibcon#read 4, iclass 4, count 0 2006.229.17:00:23.15#ibcon#about to read 5, iclass 4, count 0 2006.229.17:00:23.15#ibcon#read 5, iclass 4, count 0 2006.229.17:00:23.15#ibcon#about to read 6, iclass 4, count 0 2006.229.17:00:23.15#ibcon#read 6, iclass 4, count 0 2006.229.17:00:23.15#ibcon#end of sib2, iclass 4, count 0 2006.229.17:00:23.15#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:00:23.15#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:00:23.15#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:00:23.15#ibcon#*before write, iclass 4, count 0 2006.229.17:00:23.15#ibcon#enter sib2, iclass 4, count 0 2006.229.17:00:23.15#ibcon#flushed, iclass 4, count 0 2006.229.17:00:23.15#ibcon#about to write, iclass 4, count 0 2006.229.17:00:23.15#ibcon#wrote, iclass 4, count 0 2006.229.17:00:23.15#ibcon#about to read 3, iclass 4, count 0 2006.229.17:00:23.19#ibcon#read 3, iclass 4, count 0 2006.229.17:00:23.19#ibcon#about to read 4, iclass 4, count 0 2006.229.17:00:23.19#ibcon#read 4, iclass 4, count 0 2006.229.17:00:23.19#ibcon#about to read 5, iclass 4, count 0 2006.229.17:00:23.19#ibcon#read 5, iclass 4, count 0 2006.229.17:00:23.19#ibcon#about to read 6, iclass 4, count 0 2006.229.17:00:23.19#ibcon#read 6, iclass 4, count 0 2006.229.17:00:23.19#ibcon#end of sib2, iclass 4, count 0 2006.229.17:00:23.19#ibcon#*after write, iclass 4, count 0 2006.229.17:00:23.19#ibcon#*before return 0, iclass 4, count 0 2006.229.17:00:23.19#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:23.19#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:00:23.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:00:23.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:00:23.19$vck44/vb=8,4 2006.229.17:00:23.19#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.17:00:23.19#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.17:00:23.19#ibcon#ireg 11 cls_cnt 2 2006.229.17:00:23.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:23.25#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:23.25#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:23.25#ibcon#enter wrdev, iclass 6, count 2 2006.229.17:00:23.25#ibcon#first serial, iclass 6, count 2 2006.229.17:00:23.25#ibcon#enter sib2, iclass 6, count 2 2006.229.17:00:23.25#ibcon#flushed, iclass 6, count 2 2006.229.17:00:23.25#ibcon#about to write, iclass 6, count 2 2006.229.17:00:23.25#ibcon#wrote, iclass 6, count 2 2006.229.17:00:23.25#ibcon#about to read 3, iclass 6, count 2 2006.229.17:00:23.27#ibcon#read 3, iclass 6, count 2 2006.229.17:00:23.27#ibcon#about to read 4, iclass 6, count 2 2006.229.17:00:23.27#ibcon#read 4, iclass 6, count 2 2006.229.17:00:23.27#ibcon#about to read 5, iclass 6, count 2 2006.229.17:00:23.27#ibcon#read 5, iclass 6, count 2 2006.229.17:00:23.27#ibcon#about to read 6, iclass 6, count 2 2006.229.17:00:23.27#ibcon#read 6, iclass 6, count 2 2006.229.17:00:23.27#ibcon#end of sib2, iclass 6, count 2 2006.229.17:00:23.27#ibcon#*mode == 0, iclass 6, count 2 2006.229.17:00:23.27#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.17:00:23.27#ibcon#[27=AT08-04\r\n] 2006.229.17:00:23.27#ibcon#*before write, iclass 6, count 2 2006.229.17:00:23.27#ibcon#enter sib2, iclass 6, count 2 2006.229.17:00:23.27#ibcon#flushed, iclass 6, count 2 2006.229.17:00:23.27#ibcon#about to write, iclass 6, count 2 2006.229.17:00:23.27#ibcon#wrote, iclass 6, count 2 2006.229.17:00:23.27#ibcon#about to read 3, iclass 6, count 2 2006.229.17:00:23.30#ibcon#read 3, iclass 6, count 2 2006.229.17:00:23.30#ibcon#about to read 4, iclass 6, count 2 2006.229.17:00:23.30#ibcon#read 4, iclass 6, count 2 2006.229.17:00:23.30#ibcon#about to read 5, iclass 6, count 2 2006.229.17:00:23.30#ibcon#read 5, iclass 6, count 2 2006.229.17:00:23.30#ibcon#about to read 6, iclass 6, count 2 2006.229.17:00:23.30#ibcon#read 6, iclass 6, count 2 2006.229.17:00:23.30#ibcon#end of sib2, iclass 6, count 2 2006.229.17:00:23.30#ibcon#*after write, iclass 6, count 2 2006.229.17:00:23.30#ibcon#*before return 0, iclass 6, count 2 2006.229.17:00:23.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:23.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:00:23.30#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.17:00:23.30#ibcon#ireg 7 cls_cnt 0 2006.229.17:00:23.30#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:23.42#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:23.42#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:23.42#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:00:23.42#ibcon#first serial, iclass 6, count 0 2006.229.17:00:23.42#ibcon#enter sib2, iclass 6, count 0 2006.229.17:00:23.42#ibcon#flushed, iclass 6, count 0 2006.229.17:00:23.42#ibcon#about to write, iclass 6, count 0 2006.229.17:00:23.42#ibcon#wrote, iclass 6, count 0 2006.229.17:00:23.42#ibcon#about to read 3, iclass 6, count 0 2006.229.17:00:23.44#ibcon#read 3, iclass 6, count 0 2006.229.17:00:23.44#ibcon#about to read 4, iclass 6, count 0 2006.229.17:00:23.44#ibcon#read 4, iclass 6, count 0 2006.229.17:00:23.44#ibcon#about to read 5, iclass 6, count 0 2006.229.17:00:23.44#ibcon#read 5, iclass 6, count 0 2006.229.17:00:23.44#ibcon#about to read 6, iclass 6, count 0 2006.229.17:00:23.44#ibcon#read 6, iclass 6, count 0 2006.229.17:00:23.44#ibcon#end of sib2, iclass 6, count 0 2006.229.17:00:23.44#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:00:23.44#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:00:23.44#ibcon#[27=USB\r\n] 2006.229.17:00:23.44#ibcon#*before write, iclass 6, count 0 2006.229.17:00:23.44#ibcon#enter sib2, iclass 6, count 0 2006.229.17:00:23.44#ibcon#flushed, iclass 6, count 0 2006.229.17:00:23.44#ibcon#about to write, iclass 6, count 0 2006.229.17:00:23.44#ibcon#wrote, iclass 6, count 0 2006.229.17:00:23.44#ibcon#about to read 3, iclass 6, count 0 2006.229.17:00:23.47#ibcon#read 3, iclass 6, count 0 2006.229.17:00:23.47#ibcon#about to read 4, iclass 6, count 0 2006.229.17:00:23.47#ibcon#read 4, iclass 6, count 0 2006.229.17:00:23.47#ibcon#about to read 5, iclass 6, count 0 2006.229.17:00:23.47#ibcon#read 5, iclass 6, count 0 2006.229.17:00:23.47#ibcon#about to read 6, iclass 6, count 0 2006.229.17:00:23.47#ibcon#read 6, iclass 6, count 0 2006.229.17:00:23.47#ibcon#end of sib2, iclass 6, count 0 2006.229.17:00:23.47#ibcon#*after write, iclass 6, count 0 2006.229.17:00:23.47#ibcon#*before return 0, iclass 6, count 0 2006.229.17:00:23.47#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:23.47#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:00:23.47#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:00:23.47#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:00:23.47$vck44/vabw=wide 2006.229.17:00:23.47#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.17:00:23.47#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.17:00:23.47#ibcon#ireg 8 cls_cnt 0 2006.229.17:00:23.47#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:23.47#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:23.47#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:23.47#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:00:23.47#ibcon#first serial, iclass 10, count 0 2006.229.17:00:23.47#ibcon#enter sib2, iclass 10, count 0 2006.229.17:00:23.47#ibcon#flushed, iclass 10, count 0 2006.229.17:00:23.47#ibcon#about to write, iclass 10, count 0 2006.229.17:00:23.47#ibcon#wrote, iclass 10, count 0 2006.229.17:00:23.47#ibcon#about to read 3, iclass 10, count 0 2006.229.17:00:23.49#ibcon#read 3, iclass 10, count 0 2006.229.17:00:23.49#ibcon#about to read 4, iclass 10, count 0 2006.229.17:00:23.49#ibcon#read 4, iclass 10, count 0 2006.229.17:00:23.49#ibcon#about to read 5, iclass 10, count 0 2006.229.17:00:23.49#ibcon#read 5, iclass 10, count 0 2006.229.17:00:23.49#ibcon#about to read 6, iclass 10, count 0 2006.229.17:00:23.49#ibcon#read 6, iclass 10, count 0 2006.229.17:00:23.49#ibcon#end of sib2, iclass 10, count 0 2006.229.17:00:23.49#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:00:23.49#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:00:23.49#ibcon#[25=BW32\r\n] 2006.229.17:00:23.49#ibcon#*before write, iclass 10, count 0 2006.229.17:00:23.49#ibcon#enter sib2, iclass 10, count 0 2006.229.17:00:23.49#ibcon#flushed, iclass 10, count 0 2006.229.17:00:23.49#ibcon#about to write, iclass 10, count 0 2006.229.17:00:23.49#ibcon#wrote, iclass 10, count 0 2006.229.17:00:23.49#ibcon#about to read 3, iclass 10, count 0 2006.229.17:00:23.52#ibcon#read 3, iclass 10, count 0 2006.229.17:00:23.52#ibcon#about to read 4, iclass 10, count 0 2006.229.17:00:23.52#ibcon#read 4, iclass 10, count 0 2006.229.17:00:23.52#ibcon#about to read 5, iclass 10, count 0 2006.229.17:00:23.52#ibcon#read 5, iclass 10, count 0 2006.229.17:00:23.52#ibcon#about to read 6, iclass 10, count 0 2006.229.17:00:23.52#ibcon#read 6, iclass 10, count 0 2006.229.17:00:23.52#ibcon#end of sib2, iclass 10, count 0 2006.229.17:00:23.52#ibcon#*after write, iclass 10, count 0 2006.229.17:00:23.52#ibcon#*before return 0, iclass 10, count 0 2006.229.17:00:23.52#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:23.52#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:00:23.52#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:00:23.52#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:00:23.52$vck44/vbbw=wide 2006.229.17:00:23.52#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.17:00:23.52#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.17:00:23.52#ibcon#ireg 8 cls_cnt 0 2006.229.17:00:23.52#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:00:23.59#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:00:23.59#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:00:23.59#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:00:23.59#ibcon#first serial, iclass 12, count 0 2006.229.17:00:23.59#ibcon#enter sib2, iclass 12, count 0 2006.229.17:00:23.59#ibcon#flushed, iclass 12, count 0 2006.229.17:00:23.59#ibcon#about to write, iclass 12, count 0 2006.229.17:00:23.59#ibcon#wrote, iclass 12, count 0 2006.229.17:00:23.59#ibcon#about to read 3, iclass 12, count 0 2006.229.17:00:23.61#ibcon#read 3, iclass 12, count 0 2006.229.17:00:23.61#ibcon#about to read 4, iclass 12, count 0 2006.229.17:00:23.61#ibcon#read 4, iclass 12, count 0 2006.229.17:00:23.61#ibcon#about to read 5, iclass 12, count 0 2006.229.17:00:23.61#ibcon#read 5, iclass 12, count 0 2006.229.17:00:23.61#ibcon#about to read 6, iclass 12, count 0 2006.229.17:00:23.61#ibcon#read 6, iclass 12, count 0 2006.229.17:00:23.61#ibcon#end of sib2, iclass 12, count 0 2006.229.17:00:23.61#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:00:23.61#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:00:23.61#ibcon#[27=BW32\r\n] 2006.229.17:00:23.61#ibcon#*before write, iclass 12, count 0 2006.229.17:00:23.61#ibcon#enter sib2, iclass 12, count 0 2006.229.17:00:23.61#ibcon#flushed, iclass 12, count 0 2006.229.17:00:23.61#ibcon#about to write, iclass 12, count 0 2006.229.17:00:23.61#ibcon#wrote, iclass 12, count 0 2006.229.17:00:23.61#ibcon#about to read 3, iclass 12, count 0 2006.229.17:00:23.64#ibcon#read 3, iclass 12, count 0 2006.229.17:00:23.64#ibcon#about to read 4, iclass 12, count 0 2006.229.17:00:23.64#ibcon#read 4, iclass 12, count 0 2006.229.17:00:23.64#ibcon#about to read 5, iclass 12, count 0 2006.229.17:00:23.64#ibcon#read 5, iclass 12, count 0 2006.229.17:00:23.64#ibcon#about to read 6, iclass 12, count 0 2006.229.17:00:23.64#ibcon#read 6, iclass 12, count 0 2006.229.17:00:23.64#ibcon#end of sib2, iclass 12, count 0 2006.229.17:00:23.64#ibcon#*after write, iclass 12, count 0 2006.229.17:00:23.64#ibcon#*before return 0, iclass 12, count 0 2006.229.17:00:23.64#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:00:23.64#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:00:23.64#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:00:23.64#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:00:23.64$setupk4/ifdk4 2006.229.17:00:23.64$ifdk4/lo= 2006.229.17:00:23.64$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:00:23.64$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:00:23.64$ifdk4/patch= 2006.229.17:00:23.64$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:00:23.64$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:00:23.64$setupk4/!*+20s 2006.229.17:00:27.92#abcon#<5=/07 0.9 1.8 26.971001001.8\r\n> 2006.229.17:00:27.94#abcon#{5=INTERFACE CLEAR} 2006.229.17:00:28.00#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:00:30.14#trakl#Source acquired 2006.229.17:00:31.14#flagr#flagr/antenna,acquired 2006.229.17:00:38.09#abcon#<5=/07 0.9 1.8 26.971001001.8\r\n> 2006.229.17:00:38.11#abcon#{5=INTERFACE CLEAR} 2006.229.17:00:38.15$setupk4/"tpicd 2006.229.17:00:38.15$setupk4/echo=off 2006.229.17:00:38.15$setupk4/xlog=off 2006.229.17:00:38.15:!2006.229.17:01:34 2006.229.17:01:34.00:preob 2006.229.17:01:35.14/onsource/TRACKING 2006.229.17:01:35.14:!2006.229.17:01:44 2006.229.17:01:44.00:"tape 2006.229.17:01:44.00:"st=record 2006.229.17:01:44.00:data_valid=on 2006.229.17:01:44.00:midob 2006.229.17:01:44.14/onsource/TRACKING 2006.229.17:01:44.14/wx/26.96,1001.7,100 2006.229.17:01:44.30/cable/+6.4168E-03 2006.229.17:01:45.39/va/01,08,usb,yes,31,33 2006.229.17:01:45.39/va/02,07,usb,yes,33,34 2006.229.17:01:45.39/va/03,06,usb,yes,41,44 2006.229.17:01:45.39/va/04,07,usb,yes,34,36 2006.229.17:01:45.39/va/05,04,usb,yes,31,31 2006.229.17:01:45.39/va/06,04,usb,yes,34,34 2006.229.17:01:45.39/va/07,05,usb,yes,30,31 2006.229.17:01:45.39/va/08,06,usb,yes,22,27 2006.229.17:01:45.62/valo/01,524.99,yes,locked 2006.229.17:01:45.62/valo/02,534.99,yes,locked 2006.229.17:01:45.62/valo/03,564.99,yes,locked 2006.229.17:01:45.62/valo/04,624.99,yes,locked 2006.229.17:01:45.62/valo/05,734.99,yes,locked 2006.229.17:01:45.62/valo/06,814.99,yes,locked 2006.229.17:01:45.62/valo/07,864.99,yes,locked 2006.229.17:01:45.62/valo/08,884.99,yes,locked 2006.229.17:01:46.71/vb/01,04,usb,yes,31,29 2006.229.17:01:46.71/vb/02,04,usb,yes,33,33 2006.229.17:01:46.71/vb/03,04,usb,yes,30,33 2006.229.17:01:46.71/vb/04,04,usb,yes,35,34 2006.229.17:01:46.71/vb/05,04,usb,yes,27,30 2006.229.17:01:46.71/vb/06,04,usb,yes,32,28 2006.229.17:01:46.71/vb/07,04,usb,yes,31,31 2006.229.17:01:46.71/vb/08,04,usb,yes,29,32 2006.229.17:01:46.95/vblo/01,629.99,yes,locked 2006.229.17:01:46.95/vblo/02,634.99,yes,locked 2006.229.17:01:46.95/vblo/03,649.99,yes,locked 2006.229.17:01:46.95/vblo/04,679.99,yes,locked 2006.229.17:01:46.95/vblo/05,709.99,yes,locked 2006.229.17:01:46.95/vblo/06,719.99,yes,locked 2006.229.17:01:46.95/vblo/07,734.99,yes,locked 2006.229.17:01:46.95/vblo/08,744.99,yes,locked 2006.229.17:01:47.10/vabw/8 2006.229.17:01:47.25/vbbw/8 2006.229.17:01:47.34/xfe/off,on,12.2 2006.229.17:01:47.72/ifatt/23,28,28,28 2006.229.17:01:48.08/fmout-gps/S +4.46E-07 2006.229.17:01:48.12:!2006.229.17:04:34 2006.229.17:04:34.00:data_valid=off 2006.229.17:04:34.00:"et 2006.229.17:04:34.00:!+3s 2006.229.17:04:37.01:"tape 2006.229.17:04:37.01:postob 2006.229.17:04:37.14/cable/+6.4149E-03 2006.229.17:04:37.14/wx/26.97,1001.8,100 2006.229.17:04:38.08/fmout-gps/S +4.45E-07 2006.229.17:04:38.08:scan_name=229-1707,jd0608,80 2006.229.17:04:38.08:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.17:04:39.14#flagr#flagr/antenna,new-source 2006.229.17:04:39.14:checkk5 2006.229.17:04:39.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:04:39.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:04:40.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:04:40.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:04:41.17/chk_obsdata//k5ts1/T2291701??a.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.17:04:41.57/chk_obsdata//k5ts2/T2291701??b.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.17:04:41.98/chk_obsdata//k5ts3/T2291701??c.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.17:04:42.38/chk_obsdata//k5ts4/T2291701??d.dat file size is correct (nominal:680MB, actual:680MB). 2006.229.17:04:43.12/k5log//k5ts1_log_newline 2006.229.17:04:43.83/k5log//k5ts2_log_newline 2006.229.17:04:44.52/k5log//k5ts3_log_newline 2006.229.17:04:45.23/k5log//k5ts4_log_newline 2006.229.17:04:45.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:04:45.25:setupk4=1 2006.229.17:04:45.25$setupk4/echo=on 2006.229.17:04:45.25$setupk4/pcalon 2006.229.17:04:45.25$pcalon/"no phase cal control is implemented here 2006.229.17:04:45.25$setupk4/"tpicd=stop 2006.229.17:04:45.25$setupk4/"rec=synch_on 2006.229.17:04:45.25$setupk4/"rec_mode=128 2006.229.17:04:45.25$setupk4/!* 2006.229.17:04:45.25$setupk4/recpk4 2006.229.17:04:45.25$recpk4/recpatch= 2006.229.17:04:45.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:04:45.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:04:45.25$setupk4/vck44 2006.229.17:04:45.25$vck44/valo=1,524.99 2006.229.17:04:45.25#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.17:04:45.25#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.17:04:45.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:45.25#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:45.25#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:45.25#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:45.25#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:04:45.25#ibcon#first serial, iclass 13, count 0 2006.229.17:04:45.25#ibcon#enter sib2, iclass 13, count 0 2006.229.17:04:45.25#ibcon#flushed, iclass 13, count 0 2006.229.17:04:45.25#ibcon#about to write, iclass 13, count 0 2006.229.17:04:45.25#ibcon#wrote, iclass 13, count 0 2006.229.17:04:45.25#ibcon#about to read 3, iclass 13, count 0 2006.229.17:04:45.27#ibcon#read 3, iclass 13, count 0 2006.229.17:04:45.27#ibcon#about to read 4, iclass 13, count 0 2006.229.17:04:45.27#ibcon#read 4, iclass 13, count 0 2006.229.17:04:45.27#ibcon#about to read 5, iclass 13, count 0 2006.229.17:04:45.27#ibcon#read 5, iclass 13, count 0 2006.229.17:04:45.27#ibcon#about to read 6, iclass 13, count 0 2006.229.17:04:45.27#ibcon#read 6, iclass 13, count 0 2006.229.17:04:45.27#ibcon#end of sib2, iclass 13, count 0 2006.229.17:04:45.27#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:04:45.27#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:04:45.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:04:45.27#ibcon#*before write, iclass 13, count 0 2006.229.17:04:45.27#ibcon#enter sib2, iclass 13, count 0 2006.229.17:04:45.27#ibcon#flushed, iclass 13, count 0 2006.229.17:04:45.27#ibcon#about to write, iclass 13, count 0 2006.229.17:04:45.27#ibcon#wrote, iclass 13, count 0 2006.229.17:04:45.27#ibcon#about to read 3, iclass 13, count 0 2006.229.17:04:45.32#ibcon#read 3, iclass 13, count 0 2006.229.17:04:45.32#ibcon#about to read 4, iclass 13, count 0 2006.229.17:04:45.32#ibcon#read 4, iclass 13, count 0 2006.229.17:04:45.32#ibcon#about to read 5, iclass 13, count 0 2006.229.17:04:45.32#ibcon#read 5, iclass 13, count 0 2006.229.17:04:45.32#ibcon#about to read 6, iclass 13, count 0 2006.229.17:04:45.32#ibcon#read 6, iclass 13, count 0 2006.229.17:04:45.32#ibcon#end of sib2, iclass 13, count 0 2006.229.17:04:45.32#ibcon#*after write, iclass 13, count 0 2006.229.17:04:45.32#ibcon#*before return 0, iclass 13, count 0 2006.229.17:04:45.32#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:45.32#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:45.32#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:04:45.32#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:04:45.32$vck44/va=1,8 2006.229.17:04:45.32#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.17:04:45.32#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.17:04:45.32#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:45.32#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:45.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:45.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:45.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.17:04:45.32#ibcon#first serial, iclass 15, count 2 2006.229.17:04:45.32#ibcon#enter sib2, iclass 15, count 2 2006.229.17:04:45.32#ibcon#flushed, iclass 15, count 2 2006.229.17:04:45.32#ibcon#about to write, iclass 15, count 2 2006.229.17:04:45.32#ibcon#wrote, iclass 15, count 2 2006.229.17:04:45.32#ibcon#about to read 3, iclass 15, count 2 2006.229.17:04:45.34#ibcon#read 3, iclass 15, count 2 2006.229.17:04:45.34#ibcon#about to read 4, iclass 15, count 2 2006.229.17:04:45.34#ibcon#read 4, iclass 15, count 2 2006.229.17:04:45.34#ibcon#about to read 5, iclass 15, count 2 2006.229.17:04:45.34#ibcon#read 5, iclass 15, count 2 2006.229.17:04:45.34#ibcon#about to read 6, iclass 15, count 2 2006.229.17:04:45.34#ibcon#read 6, iclass 15, count 2 2006.229.17:04:45.34#ibcon#end of sib2, iclass 15, count 2 2006.229.17:04:45.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.17:04:45.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.17:04:45.34#ibcon#[25=AT01-08\r\n] 2006.229.17:04:45.34#ibcon#*before write, iclass 15, count 2 2006.229.17:04:45.34#ibcon#enter sib2, iclass 15, count 2 2006.229.17:04:45.34#ibcon#flushed, iclass 15, count 2 2006.229.17:04:45.34#ibcon#about to write, iclass 15, count 2 2006.229.17:04:45.34#ibcon#wrote, iclass 15, count 2 2006.229.17:04:45.34#ibcon#about to read 3, iclass 15, count 2 2006.229.17:04:45.37#ibcon#read 3, iclass 15, count 2 2006.229.17:04:45.37#ibcon#about to read 4, iclass 15, count 2 2006.229.17:04:45.37#ibcon#read 4, iclass 15, count 2 2006.229.17:04:45.37#ibcon#about to read 5, iclass 15, count 2 2006.229.17:04:45.37#ibcon#read 5, iclass 15, count 2 2006.229.17:04:45.37#ibcon#about to read 6, iclass 15, count 2 2006.229.17:04:45.37#ibcon#read 6, iclass 15, count 2 2006.229.17:04:45.37#ibcon#end of sib2, iclass 15, count 2 2006.229.17:04:45.37#ibcon#*after write, iclass 15, count 2 2006.229.17:04:45.37#ibcon#*before return 0, iclass 15, count 2 2006.229.17:04:45.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:45.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:45.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.17:04:45.37#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:45.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:45.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:45.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:45.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:04:45.49#ibcon#first serial, iclass 15, count 0 2006.229.17:04:45.49#ibcon#enter sib2, iclass 15, count 0 2006.229.17:04:45.49#ibcon#flushed, iclass 15, count 0 2006.229.17:04:45.49#ibcon#about to write, iclass 15, count 0 2006.229.17:04:45.49#ibcon#wrote, iclass 15, count 0 2006.229.17:04:45.49#ibcon#about to read 3, iclass 15, count 0 2006.229.17:04:45.51#ibcon#read 3, iclass 15, count 0 2006.229.17:04:45.51#ibcon#about to read 4, iclass 15, count 0 2006.229.17:04:45.51#ibcon#read 4, iclass 15, count 0 2006.229.17:04:45.51#ibcon#about to read 5, iclass 15, count 0 2006.229.17:04:45.51#ibcon#read 5, iclass 15, count 0 2006.229.17:04:45.51#ibcon#about to read 6, iclass 15, count 0 2006.229.17:04:45.51#ibcon#read 6, iclass 15, count 0 2006.229.17:04:45.51#ibcon#end of sib2, iclass 15, count 0 2006.229.17:04:45.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:04:45.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:04:45.51#ibcon#[25=USB\r\n] 2006.229.17:04:45.51#ibcon#*before write, iclass 15, count 0 2006.229.17:04:45.51#ibcon#enter sib2, iclass 15, count 0 2006.229.17:04:45.51#ibcon#flushed, iclass 15, count 0 2006.229.17:04:45.51#ibcon#about to write, iclass 15, count 0 2006.229.17:04:45.51#ibcon#wrote, iclass 15, count 0 2006.229.17:04:45.51#ibcon#about to read 3, iclass 15, count 0 2006.229.17:04:45.54#ibcon#read 3, iclass 15, count 0 2006.229.17:04:45.54#ibcon#about to read 4, iclass 15, count 0 2006.229.17:04:45.54#ibcon#read 4, iclass 15, count 0 2006.229.17:04:45.54#ibcon#about to read 5, iclass 15, count 0 2006.229.17:04:45.54#ibcon#read 5, iclass 15, count 0 2006.229.17:04:45.54#ibcon#about to read 6, iclass 15, count 0 2006.229.17:04:45.54#ibcon#read 6, iclass 15, count 0 2006.229.17:04:45.54#ibcon#end of sib2, iclass 15, count 0 2006.229.17:04:45.54#ibcon#*after write, iclass 15, count 0 2006.229.17:04:45.54#ibcon#*before return 0, iclass 15, count 0 2006.229.17:04:45.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:45.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:45.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:04:45.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:04:45.54$vck44/valo=2,534.99 2006.229.17:04:45.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.17:04:45.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.17:04:45.54#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:45.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:45.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:45.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:45.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:04:45.54#ibcon#first serial, iclass 17, count 0 2006.229.17:04:45.54#ibcon#enter sib2, iclass 17, count 0 2006.229.17:04:45.54#ibcon#flushed, iclass 17, count 0 2006.229.17:04:45.54#ibcon#about to write, iclass 17, count 0 2006.229.17:04:45.54#ibcon#wrote, iclass 17, count 0 2006.229.17:04:45.54#ibcon#about to read 3, iclass 17, count 0 2006.229.17:04:45.56#ibcon#read 3, iclass 17, count 0 2006.229.17:04:45.56#ibcon#about to read 4, iclass 17, count 0 2006.229.17:04:45.56#ibcon#read 4, iclass 17, count 0 2006.229.17:04:45.56#ibcon#about to read 5, iclass 17, count 0 2006.229.17:04:45.56#ibcon#read 5, iclass 17, count 0 2006.229.17:04:45.56#ibcon#about to read 6, iclass 17, count 0 2006.229.17:04:45.56#ibcon#read 6, iclass 17, count 0 2006.229.17:04:45.56#ibcon#end of sib2, iclass 17, count 0 2006.229.17:04:45.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:04:45.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:04:45.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:04:45.56#ibcon#*before write, iclass 17, count 0 2006.229.17:04:45.56#ibcon#enter sib2, iclass 17, count 0 2006.229.17:04:45.56#ibcon#flushed, iclass 17, count 0 2006.229.17:04:45.56#ibcon#about to write, iclass 17, count 0 2006.229.17:04:45.56#ibcon#wrote, iclass 17, count 0 2006.229.17:04:45.56#ibcon#about to read 3, iclass 17, count 0 2006.229.17:04:45.60#ibcon#read 3, iclass 17, count 0 2006.229.17:04:45.60#ibcon#about to read 4, iclass 17, count 0 2006.229.17:04:45.60#ibcon#read 4, iclass 17, count 0 2006.229.17:04:45.60#ibcon#about to read 5, iclass 17, count 0 2006.229.17:04:45.60#ibcon#read 5, iclass 17, count 0 2006.229.17:04:45.60#ibcon#about to read 6, iclass 17, count 0 2006.229.17:04:45.60#ibcon#read 6, iclass 17, count 0 2006.229.17:04:45.60#ibcon#end of sib2, iclass 17, count 0 2006.229.17:04:45.60#ibcon#*after write, iclass 17, count 0 2006.229.17:04:45.60#ibcon#*before return 0, iclass 17, count 0 2006.229.17:04:45.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:45.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:45.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:04:45.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:04:45.60$vck44/va=2,7 2006.229.17:04:45.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.17:04:45.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.17:04:45.60#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:45.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:45.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:45.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:45.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.17:04:45.66#ibcon#first serial, iclass 19, count 2 2006.229.17:04:45.66#ibcon#enter sib2, iclass 19, count 2 2006.229.17:04:45.66#ibcon#flushed, iclass 19, count 2 2006.229.17:04:45.66#ibcon#about to write, iclass 19, count 2 2006.229.17:04:45.66#ibcon#wrote, iclass 19, count 2 2006.229.17:04:45.66#ibcon#about to read 3, iclass 19, count 2 2006.229.17:04:45.68#ibcon#read 3, iclass 19, count 2 2006.229.17:04:45.68#ibcon#about to read 4, iclass 19, count 2 2006.229.17:04:45.68#ibcon#read 4, iclass 19, count 2 2006.229.17:04:45.68#ibcon#about to read 5, iclass 19, count 2 2006.229.17:04:45.68#ibcon#read 5, iclass 19, count 2 2006.229.17:04:45.68#ibcon#about to read 6, iclass 19, count 2 2006.229.17:04:45.68#ibcon#read 6, iclass 19, count 2 2006.229.17:04:45.68#ibcon#end of sib2, iclass 19, count 2 2006.229.17:04:45.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.17:04:45.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.17:04:45.68#ibcon#[25=AT02-07\r\n] 2006.229.17:04:45.68#ibcon#*before write, iclass 19, count 2 2006.229.17:04:45.68#ibcon#enter sib2, iclass 19, count 2 2006.229.17:04:45.68#ibcon#flushed, iclass 19, count 2 2006.229.17:04:45.68#ibcon#about to write, iclass 19, count 2 2006.229.17:04:45.68#ibcon#wrote, iclass 19, count 2 2006.229.17:04:45.68#ibcon#about to read 3, iclass 19, count 2 2006.229.17:04:45.71#ibcon#read 3, iclass 19, count 2 2006.229.17:04:45.71#ibcon#about to read 4, iclass 19, count 2 2006.229.17:04:45.71#ibcon#read 4, iclass 19, count 2 2006.229.17:04:45.71#ibcon#about to read 5, iclass 19, count 2 2006.229.17:04:45.71#ibcon#read 5, iclass 19, count 2 2006.229.17:04:45.71#ibcon#about to read 6, iclass 19, count 2 2006.229.17:04:45.71#ibcon#read 6, iclass 19, count 2 2006.229.17:04:45.71#ibcon#end of sib2, iclass 19, count 2 2006.229.17:04:45.71#ibcon#*after write, iclass 19, count 2 2006.229.17:04:45.71#ibcon#*before return 0, iclass 19, count 2 2006.229.17:04:45.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:45.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:45.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.17:04:45.71#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:45.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:45.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:45.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:45.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:04:45.83#ibcon#first serial, iclass 19, count 0 2006.229.17:04:45.83#ibcon#enter sib2, iclass 19, count 0 2006.229.17:04:45.83#ibcon#flushed, iclass 19, count 0 2006.229.17:04:45.83#ibcon#about to write, iclass 19, count 0 2006.229.17:04:45.83#ibcon#wrote, iclass 19, count 0 2006.229.17:04:45.83#ibcon#about to read 3, iclass 19, count 0 2006.229.17:04:45.85#ibcon#read 3, iclass 19, count 0 2006.229.17:04:45.85#ibcon#about to read 4, iclass 19, count 0 2006.229.17:04:45.85#ibcon#read 4, iclass 19, count 0 2006.229.17:04:45.85#ibcon#about to read 5, iclass 19, count 0 2006.229.17:04:45.85#ibcon#read 5, iclass 19, count 0 2006.229.17:04:45.85#ibcon#about to read 6, iclass 19, count 0 2006.229.17:04:45.85#ibcon#read 6, iclass 19, count 0 2006.229.17:04:45.85#ibcon#end of sib2, iclass 19, count 0 2006.229.17:04:45.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:04:45.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:04:45.85#ibcon#[25=USB\r\n] 2006.229.17:04:45.85#ibcon#*before write, iclass 19, count 0 2006.229.17:04:45.85#ibcon#enter sib2, iclass 19, count 0 2006.229.17:04:45.85#ibcon#flushed, iclass 19, count 0 2006.229.17:04:45.85#ibcon#about to write, iclass 19, count 0 2006.229.17:04:45.85#ibcon#wrote, iclass 19, count 0 2006.229.17:04:45.85#ibcon#about to read 3, iclass 19, count 0 2006.229.17:04:45.88#ibcon#read 3, iclass 19, count 0 2006.229.17:04:45.88#ibcon#about to read 4, iclass 19, count 0 2006.229.17:04:45.88#ibcon#read 4, iclass 19, count 0 2006.229.17:04:45.88#ibcon#about to read 5, iclass 19, count 0 2006.229.17:04:45.88#ibcon#read 5, iclass 19, count 0 2006.229.17:04:45.88#ibcon#about to read 6, iclass 19, count 0 2006.229.17:04:45.88#ibcon#read 6, iclass 19, count 0 2006.229.17:04:45.88#ibcon#end of sib2, iclass 19, count 0 2006.229.17:04:45.88#ibcon#*after write, iclass 19, count 0 2006.229.17:04:45.88#ibcon#*before return 0, iclass 19, count 0 2006.229.17:04:45.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:45.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:45.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:04:45.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:04:45.88$vck44/valo=3,564.99 2006.229.17:04:45.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.17:04:45.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.17:04:45.88#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:45.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:45.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:45.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:45.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:04:45.88#ibcon#first serial, iclass 21, count 0 2006.229.17:04:45.88#ibcon#enter sib2, iclass 21, count 0 2006.229.17:04:45.88#ibcon#flushed, iclass 21, count 0 2006.229.17:04:45.88#ibcon#about to write, iclass 21, count 0 2006.229.17:04:45.88#ibcon#wrote, iclass 21, count 0 2006.229.17:04:45.88#ibcon#about to read 3, iclass 21, count 0 2006.229.17:04:45.90#ibcon#read 3, iclass 21, count 0 2006.229.17:04:45.90#ibcon#about to read 4, iclass 21, count 0 2006.229.17:04:45.90#ibcon#read 4, iclass 21, count 0 2006.229.17:04:45.90#ibcon#about to read 5, iclass 21, count 0 2006.229.17:04:45.90#ibcon#read 5, iclass 21, count 0 2006.229.17:04:45.90#ibcon#about to read 6, iclass 21, count 0 2006.229.17:04:45.90#ibcon#read 6, iclass 21, count 0 2006.229.17:04:45.90#ibcon#end of sib2, iclass 21, count 0 2006.229.17:04:45.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:04:45.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:04:45.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:04:45.90#ibcon#*before write, iclass 21, count 0 2006.229.17:04:45.90#ibcon#enter sib2, iclass 21, count 0 2006.229.17:04:45.90#ibcon#flushed, iclass 21, count 0 2006.229.17:04:45.90#ibcon#about to write, iclass 21, count 0 2006.229.17:04:45.90#ibcon#wrote, iclass 21, count 0 2006.229.17:04:45.90#ibcon#about to read 3, iclass 21, count 0 2006.229.17:04:45.94#ibcon#read 3, iclass 21, count 0 2006.229.17:04:45.94#ibcon#about to read 4, iclass 21, count 0 2006.229.17:04:45.94#ibcon#read 4, iclass 21, count 0 2006.229.17:04:45.94#ibcon#about to read 5, iclass 21, count 0 2006.229.17:04:45.94#ibcon#read 5, iclass 21, count 0 2006.229.17:04:45.94#ibcon#about to read 6, iclass 21, count 0 2006.229.17:04:45.94#ibcon#read 6, iclass 21, count 0 2006.229.17:04:45.94#ibcon#end of sib2, iclass 21, count 0 2006.229.17:04:45.94#ibcon#*after write, iclass 21, count 0 2006.229.17:04:45.94#ibcon#*before return 0, iclass 21, count 0 2006.229.17:04:45.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:45.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:45.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:04:45.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:04:45.94$vck44/va=3,6 2006.229.17:04:45.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.17:04:45.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.17:04:45.94#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:45.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:46.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:46.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:46.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.17:04:46.00#ibcon#first serial, iclass 23, count 2 2006.229.17:04:46.00#ibcon#enter sib2, iclass 23, count 2 2006.229.17:04:46.00#ibcon#flushed, iclass 23, count 2 2006.229.17:04:46.00#ibcon#about to write, iclass 23, count 2 2006.229.17:04:46.00#ibcon#wrote, iclass 23, count 2 2006.229.17:04:46.00#ibcon#about to read 3, iclass 23, count 2 2006.229.17:04:46.02#ibcon#read 3, iclass 23, count 2 2006.229.17:04:46.02#ibcon#about to read 4, iclass 23, count 2 2006.229.17:04:46.02#ibcon#read 4, iclass 23, count 2 2006.229.17:04:46.02#ibcon#about to read 5, iclass 23, count 2 2006.229.17:04:46.02#ibcon#read 5, iclass 23, count 2 2006.229.17:04:46.02#ibcon#about to read 6, iclass 23, count 2 2006.229.17:04:46.02#ibcon#read 6, iclass 23, count 2 2006.229.17:04:46.02#ibcon#end of sib2, iclass 23, count 2 2006.229.17:04:46.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.17:04:46.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.17:04:46.02#ibcon#[25=AT03-06\r\n] 2006.229.17:04:46.02#ibcon#*before write, iclass 23, count 2 2006.229.17:04:46.02#ibcon#enter sib2, iclass 23, count 2 2006.229.17:04:46.02#ibcon#flushed, iclass 23, count 2 2006.229.17:04:46.02#ibcon#about to write, iclass 23, count 2 2006.229.17:04:46.02#ibcon#wrote, iclass 23, count 2 2006.229.17:04:46.02#ibcon#about to read 3, iclass 23, count 2 2006.229.17:04:46.05#ibcon#read 3, iclass 23, count 2 2006.229.17:04:46.05#ibcon#about to read 4, iclass 23, count 2 2006.229.17:04:46.05#ibcon#read 4, iclass 23, count 2 2006.229.17:04:46.05#ibcon#about to read 5, iclass 23, count 2 2006.229.17:04:46.05#ibcon#read 5, iclass 23, count 2 2006.229.17:04:46.05#ibcon#about to read 6, iclass 23, count 2 2006.229.17:04:46.05#ibcon#read 6, iclass 23, count 2 2006.229.17:04:46.05#ibcon#end of sib2, iclass 23, count 2 2006.229.17:04:46.05#ibcon#*after write, iclass 23, count 2 2006.229.17:04:46.05#ibcon#*before return 0, iclass 23, count 2 2006.229.17:04:46.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:46.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:46.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.17:04:46.05#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:46.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:46.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:46.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:46.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:04:46.17#ibcon#first serial, iclass 23, count 0 2006.229.17:04:46.17#ibcon#enter sib2, iclass 23, count 0 2006.229.17:04:46.17#ibcon#flushed, iclass 23, count 0 2006.229.17:04:46.17#ibcon#about to write, iclass 23, count 0 2006.229.17:04:46.17#ibcon#wrote, iclass 23, count 0 2006.229.17:04:46.17#ibcon#about to read 3, iclass 23, count 0 2006.229.17:04:46.19#ibcon#read 3, iclass 23, count 0 2006.229.17:04:46.19#ibcon#about to read 4, iclass 23, count 0 2006.229.17:04:46.19#ibcon#read 4, iclass 23, count 0 2006.229.17:04:46.19#ibcon#about to read 5, iclass 23, count 0 2006.229.17:04:46.19#ibcon#read 5, iclass 23, count 0 2006.229.17:04:46.19#ibcon#about to read 6, iclass 23, count 0 2006.229.17:04:46.19#ibcon#read 6, iclass 23, count 0 2006.229.17:04:46.19#ibcon#end of sib2, iclass 23, count 0 2006.229.17:04:46.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:04:46.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:04:46.19#ibcon#[25=USB\r\n] 2006.229.17:04:46.19#ibcon#*before write, iclass 23, count 0 2006.229.17:04:46.19#ibcon#enter sib2, iclass 23, count 0 2006.229.17:04:46.19#ibcon#flushed, iclass 23, count 0 2006.229.17:04:46.19#ibcon#about to write, iclass 23, count 0 2006.229.17:04:46.19#ibcon#wrote, iclass 23, count 0 2006.229.17:04:46.19#ibcon#about to read 3, iclass 23, count 0 2006.229.17:04:46.22#ibcon#read 3, iclass 23, count 0 2006.229.17:04:46.22#ibcon#about to read 4, iclass 23, count 0 2006.229.17:04:46.22#ibcon#read 4, iclass 23, count 0 2006.229.17:04:46.22#ibcon#about to read 5, iclass 23, count 0 2006.229.17:04:46.22#ibcon#read 5, iclass 23, count 0 2006.229.17:04:46.22#ibcon#about to read 6, iclass 23, count 0 2006.229.17:04:46.22#ibcon#read 6, iclass 23, count 0 2006.229.17:04:46.22#ibcon#end of sib2, iclass 23, count 0 2006.229.17:04:46.22#ibcon#*after write, iclass 23, count 0 2006.229.17:04:46.22#ibcon#*before return 0, iclass 23, count 0 2006.229.17:04:46.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:46.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:46.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:04:46.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:04:46.22$vck44/valo=4,624.99 2006.229.17:04:46.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.17:04:46.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.17:04:46.22#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:46.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:46.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:46.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:46.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:04:46.22#ibcon#first serial, iclass 25, count 0 2006.229.17:04:46.22#ibcon#enter sib2, iclass 25, count 0 2006.229.17:04:46.22#ibcon#flushed, iclass 25, count 0 2006.229.17:04:46.22#ibcon#about to write, iclass 25, count 0 2006.229.17:04:46.22#ibcon#wrote, iclass 25, count 0 2006.229.17:04:46.22#ibcon#about to read 3, iclass 25, count 0 2006.229.17:04:46.24#ibcon#read 3, iclass 25, count 0 2006.229.17:04:46.24#ibcon#about to read 4, iclass 25, count 0 2006.229.17:04:46.24#ibcon#read 4, iclass 25, count 0 2006.229.17:04:46.24#ibcon#about to read 5, iclass 25, count 0 2006.229.17:04:46.24#ibcon#read 5, iclass 25, count 0 2006.229.17:04:46.24#ibcon#about to read 6, iclass 25, count 0 2006.229.17:04:46.24#ibcon#read 6, iclass 25, count 0 2006.229.17:04:46.24#ibcon#end of sib2, iclass 25, count 0 2006.229.17:04:46.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:04:46.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:04:46.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:04:46.24#ibcon#*before write, iclass 25, count 0 2006.229.17:04:46.24#ibcon#enter sib2, iclass 25, count 0 2006.229.17:04:46.24#ibcon#flushed, iclass 25, count 0 2006.229.17:04:46.24#ibcon#about to write, iclass 25, count 0 2006.229.17:04:46.24#ibcon#wrote, iclass 25, count 0 2006.229.17:04:46.24#ibcon#about to read 3, iclass 25, count 0 2006.229.17:04:46.28#ibcon#read 3, iclass 25, count 0 2006.229.17:04:46.28#ibcon#about to read 4, iclass 25, count 0 2006.229.17:04:46.28#ibcon#read 4, iclass 25, count 0 2006.229.17:04:46.28#ibcon#about to read 5, iclass 25, count 0 2006.229.17:04:46.28#ibcon#read 5, iclass 25, count 0 2006.229.17:04:46.28#ibcon#about to read 6, iclass 25, count 0 2006.229.17:04:46.28#ibcon#read 6, iclass 25, count 0 2006.229.17:04:46.28#ibcon#end of sib2, iclass 25, count 0 2006.229.17:04:46.28#ibcon#*after write, iclass 25, count 0 2006.229.17:04:46.28#ibcon#*before return 0, iclass 25, count 0 2006.229.17:04:46.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:46.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:46.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:04:46.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:04:46.28$vck44/va=4,7 2006.229.17:04:46.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.17:04:46.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.17:04:46.28#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:46.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:46.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:46.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:46.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.17:04:46.34#ibcon#first serial, iclass 27, count 2 2006.229.17:04:46.34#ibcon#enter sib2, iclass 27, count 2 2006.229.17:04:46.34#ibcon#flushed, iclass 27, count 2 2006.229.17:04:46.34#ibcon#about to write, iclass 27, count 2 2006.229.17:04:46.34#ibcon#wrote, iclass 27, count 2 2006.229.17:04:46.34#ibcon#about to read 3, iclass 27, count 2 2006.229.17:04:46.36#ibcon#read 3, iclass 27, count 2 2006.229.17:04:46.36#ibcon#about to read 4, iclass 27, count 2 2006.229.17:04:46.36#ibcon#read 4, iclass 27, count 2 2006.229.17:04:46.36#ibcon#about to read 5, iclass 27, count 2 2006.229.17:04:46.36#ibcon#read 5, iclass 27, count 2 2006.229.17:04:46.36#ibcon#about to read 6, iclass 27, count 2 2006.229.17:04:46.36#ibcon#read 6, iclass 27, count 2 2006.229.17:04:46.36#ibcon#end of sib2, iclass 27, count 2 2006.229.17:04:46.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.17:04:46.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.17:04:46.36#ibcon#[25=AT04-07\r\n] 2006.229.17:04:46.36#ibcon#*before write, iclass 27, count 2 2006.229.17:04:46.36#ibcon#enter sib2, iclass 27, count 2 2006.229.17:04:46.36#ibcon#flushed, iclass 27, count 2 2006.229.17:04:46.36#ibcon#about to write, iclass 27, count 2 2006.229.17:04:46.36#ibcon#wrote, iclass 27, count 2 2006.229.17:04:46.36#ibcon#about to read 3, iclass 27, count 2 2006.229.17:04:46.39#ibcon#read 3, iclass 27, count 2 2006.229.17:04:46.39#ibcon#about to read 4, iclass 27, count 2 2006.229.17:04:46.39#ibcon#read 4, iclass 27, count 2 2006.229.17:04:46.39#ibcon#about to read 5, iclass 27, count 2 2006.229.17:04:46.39#ibcon#read 5, iclass 27, count 2 2006.229.17:04:46.39#ibcon#about to read 6, iclass 27, count 2 2006.229.17:04:46.39#ibcon#read 6, iclass 27, count 2 2006.229.17:04:46.39#ibcon#end of sib2, iclass 27, count 2 2006.229.17:04:46.39#ibcon#*after write, iclass 27, count 2 2006.229.17:04:46.39#ibcon#*before return 0, iclass 27, count 2 2006.229.17:04:46.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:46.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:46.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.17:04:46.39#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:46.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:46.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:46.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:46.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:04:46.51#ibcon#first serial, iclass 27, count 0 2006.229.17:04:46.51#ibcon#enter sib2, iclass 27, count 0 2006.229.17:04:46.51#ibcon#flushed, iclass 27, count 0 2006.229.17:04:46.51#ibcon#about to write, iclass 27, count 0 2006.229.17:04:46.51#ibcon#wrote, iclass 27, count 0 2006.229.17:04:46.51#ibcon#about to read 3, iclass 27, count 0 2006.229.17:04:46.53#ibcon#read 3, iclass 27, count 0 2006.229.17:04:46.53#ibcon#about to read 4, iclass 27, count 0 2006.229.17:04:46.53#ibcon#read 4, iclass 27, count 0 2006.229.17:04:46.53#ibcon#about to read 5, iclass 27, count 0 2006.229.17:04:46.53#ibcon#read 5, iclass 27, count 0 2006.229.17:04:46.53#ibcon#about to read 6, iclass 27, count 0 2006.229.17:04:46.53#ibcon#read 6, iclass 27, count 0 2006.229.17:04:46.53#ibcon#end of sib2, iclass 27, count 0 2006.229.17:04:46.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:04:46.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:04:46.53#ibcon#[25=USB\r\n] 2006.229.17:04:46.53#ibcon#*before write, iclass 27, count 0 2006.229.17:04:46.53#ibcon#enter sib2, iclass 27, count 0 2006.229.17:04:46.53#ibcon#flushed, iclass 27, count 0 2006.229.17:04:46.53#ibcon#about to write, iclass 27, count 0 2006.229.17:04:46.53#ibcon#wrote, iclass 27, count 0 2006.229.17:04:46.53#ibcon#about to read 3, iclass 27, count 0 2006.229.17:04:46.56#ibcon#read 3, iclass 27, count 0 2006.229.17:04:46.56#ibcon#about to read 4, iclass 27, count 0 2006.229.17:04:46.56#ibcon#read 4, iclass 27, count 0 2006.229.17:04:46.56#ibcon#about to read 5, iclass 27, count 0 2006.229.17:04:46.56#ibcon#read 5, iclass 27, count 0 2006.229.17:04:46.56#ibcon#about to read 6, iclass 27, count 0 2006.229.17:04:46.56#ibcon#read 6, iclass 27, count 0 2006.229.17:04:46.56#ibcon#end of sib2, iclass 27, count 0 2006.229.17:04:46.56#ibcon#*after write, iclass 27, count 0 2006.229.17:04:46.56#ibcon#*before return 0, iclass 27, count 0 2006.229.17:04:46.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:46.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:46.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:04:46.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:04:46.56$vck44/valo=5,734.99 2006.229.17:04:46.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:04:46.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:04:46.56#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:46.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:46.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:46.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:46.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:04:46.56#ibcon#first serial, iclass 29, count 0 2006.229.17:04:46.56#ibcon#enter sib2, iclass 29, count 0 2006.229.17:04:46.56#ibcon#flushed, iclass 29, count 0 2006.229.17:04:46.56#ibcon#about to write, iclass 29, count 0 2006.229.17:04:46.56#ibcon#wrote, iclass 29, count 0 2006.229.17:04:46.56#ibcon#about to read 3, iclass 29, count 0 2006.229.17:04:46.58#ibcon#read 3, iclass 29, count 0 2006.229.17:04:46.58#ibcon#about to read 4, iclass 29, count 0 2006.229.17:04:46.58#ibcon#read 4, iclass 29, count 0 2006.229.17:04:46.58#ibcon#about to read 5, iclass 29, count 0 2006.229.17:04:46.58#ibcon#read 5, iclass 29, count 0 2006.229.17:04:46.58#ibcon#about to read 6, iclass 29, count 0 2006.229.17:04:46.58#ibcon#read 6, iclass 29, count 0 2006.229.17:04:46.58#ibcon#end of sib2, iclass 29, count 0 2006.229.17:04:46.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:04:46.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:04:46.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:04:46.58#ibcon#*before write, iclass 29, count 0 2006.229.17:04:46.58#ibcon#enter sib2, iclass 29, count 0 2006.229.17:04:46.58#ibcon#flushed, iclass 29, count 0 2006.229.17:04:46.58#ibcon#about to write, iclass 29, count 0 2006.229.17:04:46.58#ibcon#wrote, iclass 29, count 0 2006.229.17:04:46.58#ibcon#about to read 3, iclass 29, count 0 2006.229.17:04:46.62#ibcon#read 3, iclass 29, count 0 2006.229.17:04:46.62#ibcon#about to read 4, iclass 29, count 0 2006.229.17:04:46.62#ibcon#read 4, iclass 29, count 0 2006.229.17:04:46.62#ibcon#about to read 5, iclass 29, count 0 2006.229.17:04:46.62#ibcon#read 5, iclass 29, count 0 2006.229.17:04:46.62#ibcon#about to read 6, iclass 29, count 0 2006.229.17:04:46.62#ibcon#read 6, iclass 29, count 0 2006.229.17:04:46.62#ibcon#end of sib2, iclass 29, count 0 2006.229.17:04:46.62#ibcon#*after write, iclass 29, count 0 2006.229.17:04:46.62#ibcon#*before return 0, iclass 29, count 0 2006.229.17:04:46.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:46.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:46.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:04:46.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:04:46.62$vck44/va=5,4 2006.229.17:04:46.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.17:04:46.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.17:04:46.62#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:46.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:46.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:46.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:46.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.17:04:46.68#ibcon#first serial, iclass 31, count 2 2006.229.17:04:46.68#ibcon#enter sib2, iclass 31, count 2 2006.229.17:04:46.68#ibcon#flushed, iclass 31, count 2 2006.229.17:04:46.68#ibcon#about to write, iclass 31, count 2 2006.229.17:04:46.68#ibcon#wrote, iclass 31, count 2 2006.229.17:04:46.68#ibcon#about to read 3, iclass 31, count 2 2006.229.17:04:46.70#ibcon#read 3, iclass 31, count 2 2006.229.17:04:46.70#ibcon#about to read 4, iclass 31, count 2 2006.229.17:04:46.70#ibcon#read 4, iclass 31, count 2 2006.229.17:04:46.70#ibcon#about to read 5, iclass 31, count 2 2006.229.17:04:46.70#ibcon#read 5, iclass 31, count 2 2006.229.17:04:46.70#ibcon#about to read 6, iclass 31, count 2 2006.229.17:04:46.70#ibcon#read 6, iclass 31, count 2 2006.229.17:04:46.70#ibcon#end of sib2, iclass 31, count 2 2006.229.17:04:46.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.17:04:46.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.17:04:46.70#ibcon#[25=AT05-04\r\n] 2006.229.17:04:46.70#ibcon#*before write, iclass 31, count 2 2006.229.17:04:46.70#ibcon#enter sib2, iclass 31, count 2 2006.229.17:04:46.70#ibcon#flushed, iclass 31, count 2 2006.229.17:04:46.70#ibcon#about to write, iclass 31, count 2 2006.229.17:04:46.70#ibcon#wrote, iclass 31, count 2 2006.229.17:04:46.70#ibcon#about to read 3, iclass 31, count 2 2006.229.17:04:46.73#ibcon#read 3, iclass 31, count 2 2006.229.17:04:46.73#ibcon#about to read 4, iclass 31, count 2 2006.229.17:04:46.73#ibcon#read 4, iclass 31, count 2 2006.229.17:04:46.73#ibcon#about to read 5, iclass 31, count 2 2006.229.17:04:46.73#ibcon#read 5, iclass 31, count 2 2006.229.17:04:46.73#ibcon#about to read 6, iclass 31, count 2 2006.229.17:04:46.73#ibcon#read 6, iclass 31, count 2 2006.229.17:04:46.73#ibcon#end of sib2, iclass 31, count 2 2006.229.17:04:46.73#ibcon#*after write, iclass 31, count 2 2006.229.17:04:46.73#ibcon#*before return 0, iclass 31, count 2 2006.229.17:04:46.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:46.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:46.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.17:04:46.73#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:46.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:46.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:46.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:46.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:04:46.85#ibcon#first serial, iclass 31, count 0 2006.229.17:04:46.85#ibcon#enter sib2, iclass 31, count 0 2006.229.17:04:46.85#ibcon#flushed, iclass 31, count 0 2006.229.17:04:46.85#ibcon#about to write, iclass 31, count 0 2006.229.17:04:46.85#ibcon#wrote, iclass 31, count 0 2006.229.17:04:46.85#ibcon#about to read 3, iclass 31, count 0 2006.229.17:04:46.87#ibcon#read 3, iclass 31, count 0 2006.229.17:04:46.87#ibcon#about to read 4, iclass 31, count 0 2006.229.17:04:46.87#ibcon#read 4, iclass 31, count 0 2006.229.17:04:46.87#ibcon#about to read 5, iclass 31, count 0 2006.229.17:04:46.87#ibcon#read 5, iclass 31, count 0 2006.229.17:04:46.87#ibcon#about to read 6, iclass 31, count 0 2006.229.17:04:46.87#ibcon#read 6, iclass 31, count 0 2006.229.17:04:46.87#ibcon#end of sib2, iclass 31, count 0 2006.229.17:04:46.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:04:46.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:04:46.87#ibcon#[25=USB\r\n] 2006.229.17:04:46.87#ibcon#*before write, iclass 31, count 0 2006.229.17:04:46.87#ibcon#enter sib2, iclass 31, count 0 2006.229.17:04:46.87#ibcon#flushed, iclass 31, count 0 2006.229.17:04:46.87#ibcon#about to write, iclass 31, count 0 2006.229.17:04:46.87#ibcon#wrote, iclass 31, count 0 2006.229.17:04:46.87#ibcon#about to read 3, iclass 31, count 0 2006.229.17:04:46.90#ibcon#read 3, iclass 31, count 0 2006.229.17:04:46.90#ibcon#about to read 4, iclass 31, count 0 2006.229.17:04:46.90#ibcon#read 4, iclass 31, count 0 2006.229.17:04:46.90#ibcon#about to read 5, iclass 31, count 0 2006.229.17:04:46.90#ibcon#read 5, iclass 31, count 0 2006.229.17:04:46.90#ibcon#about to read 6, iclass 31, count 0 2006.229.17:04:46.90#ibcon#read 6, iclass 31, count 0 2006.229.17:04:46.90#ibcon#end of sib2, iclass 31, count 0 2006.229.17:04:46.90#ibcon#*after write, iclass 31, count 0 2006.229.17:04:46.90#ibcon#*before return 0, iclass 31, count 0 2006.229.17:04:46.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:46.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:46.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:04:46.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:04:46.90$vck44/valo=6,814.99 2006.229.17:04:46.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.17:04:46.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.17:04:46.90#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:46.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:46.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:46.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:46.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:04:46.90#ibcon#first serial, iclass 33, count 0 2006.229.17:04:46.90#ibcon#enter sib2, iclass 33, count 0 2006.229.17:04:46.90#ibcon#flushed, iclass 33, count 0 2006.229.17:04:46.90#ibcon#about to write, iclass 33, count 0 2006.229.17:04:46.90#ibcon#wrote, iclass 33, count 0 2006.229.17:04:46.90#ibcon#about to read 3, iclass 33, count 0 2006.229.17:04:46.92#ibcon#read 3, iclass 33, count 0 2006.229.17:04:46.92#ibcon#about to read 4, iclass 33, count 0 2006.229.17:04:46.92#ibcon#read 4, iclass 33, count 0 2006.229.17:04:46.92#ibcon#about to read 5, iclass 33, count 0 2006.229.17:04:46.92#ibcon#read 5, iclass 33, count 0 2006.229.17:04:46.92#ibcon#about to read 6, iclass 33, count 0 2006.229.17:04:46.92#ibcon#read 6, iclass 33, count 0 2006.229.17:04:46.92#ibcon#end of sib2, iclass 33, count 0 2006.229.17:04:46.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:04:46.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:04:46.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:04:46.92#ibcon#*before write, iclass 33, count 0 2006.229.17:04:46.92#ibcon#enter sib2, iclass 33, count 0 2006.229.17:04:46.92#ibcon#flushed, iclass 33, count 0 2006.229.17:04:46.92#ibcon#about to write, iclass 33, count 0 2006.229.17:04:46.92#ibcon#wrote, iclass 33, count 0 2006.229.17:04:46.92#ibcon#about to read 3, iclass 33, count 0 2006.229.17:04:46.96#ibcon#read 3, iclass 33, count 0 2006.229.17:04:46.96#ibcon#about to read 4, iclass 33, count 0 2006.229.17:04:46.96#ibcon#read 4, iclass 33, count 0 2006.229.17:04:46.96#ibcon#about to read 5, iclass 33, count 0 2006.229.17:04:46.96#ibcon#read 5, iclass 33, count 0 2006.229.17:04:46.96#ibcon#about to read 6, iclass 33, count 0 2006.229.17:04:46.96#ibcon#read 6, iclass 33, count 0 2006.229.17:04:46.96#ibcon#end of sib2, iclass 33, count 0 2006.229.17:04:46.96#ibcon#*after write, iclass 33, count 0 2006.229.17:04:46.96#ibcon#*before return 0, iclass 33, count 0 2006.229.17:04:46.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:46.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:46.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:04:46.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:04:46.96$vck44/va=6,4 2006.229.17:04:46.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.17:04:46.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.17:04:46.96#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:46.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:47.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:47.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:47.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.17:04:47.02#ibcon#first serial, iclass 35, count 2 2006.229.17:04:47.02#ibcon#enter sib2, iclass 35, count 2 2006.229.17:04:47.02#ibcon#flushed, iclass 35, count 2 2006.229.17:04:47.02#ibcon#about to write, iclass 35, count 2 2006.229.17:04:47.02#ibcon#wrote, iclass 35, count 2 2006.229.17:04:47.02#ibcon#about to read 3, iclass 35, count 2 2006.229.17:04:47.04#ibcon#read 3, iclass 35, count 2 2006.229.17:04:47.04#ibcon#about to read 4, iclass 35, count 2 2006.229.17:04:47.04#ibcon#read 4, iclass 35, count 2 2006.229.17:04:47.04#ibcon#about to read 5, iclass 35, count 2 2006.229.17:04:47.04#ibcon#read 5, iclass 35, count 2 2006.229.17:04:47.04#ibcon#about to read 6, iclass 35, count 2 2006.229.17:04:47.04#ibcon#read 6, iclass 35, count 2 2006.229.17:04:47.04#ibcon#end of sib2, iclass 35, count 2 2006.229.17:04:47.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.17:04:47.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.17:04:47.04#ibcon#[25=AT06-04\r\n] 2006.229.17:04:47.04#ibcon#*before write, iclass 35, count 2 2006.229.17:04:47.04#ibcon#enter sib2, iclass 35, count 2 2006.229.17:04:47.04#ibcon#flushed, iclass 35, count 2 2006.229.17:04:47.04#ibcon#about to write, iclass 35, count 2 2006.229.17:04:47.04#ibcon#wrote, iclass 35, count 2 2006.229.17:04:47.04#ibcon#about to read 3, iclass 35, count 2 2006.229.17:04:47.07#ibcon#read 3, iclass 35, count 2 2006.229.17:04:47.07#ibcon#about to read 4, iclass 35, count 2 2006.229.17:04:47.07#ibcon#read 4, iclass 35, count 2 2006.229.17:04:47.07#ibcon#about to read 5, iclass 35, count 2 2006.229.17:04:47.07#ibcon#read 5, iclass 35, count 2 2006.229.17:04:47.07#ibcon#about to read 6, iclass 35, count 2 2006.229.17:04:47.07#ibcon#read 6, iclass 35, count 2 2006.229.17:04:47.07#ibcon#end of sib2, iclass 35, count 2 2006.229.17:04:47.07#ibcon#*after write, iclass 35, count 2 2006.229.17:04:47.07#ibcon#*before return 0, iclass 35, count 2 2006.229.17:04:47.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:47.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:47.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.17:04:47.07#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:47.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:47.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:47.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:47.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:04:47.19#ibcon#first serial, iclass 35, count 0 2006.229.17:04:47.19#ibcon#enter sib2, iclass 35, count 0 2006.229.17:04:47.19#ibcon#flushed, iclass 35, count 0 2006.229.17:04:47.19#ibcon#about to write, iclass 35, count 0 2006.229.17:04:47.19#ibcon#wrote, iclass 35, count 0 2006.229.17:04:47.19#ibcon#about to read 3, iclass 35, count 0 2006.229.17:04:47.21#ibcon#read 3, iclass 35, count 0 2006.229.17:04:47.21#ibcon#about to read 4, iclass 35, count 0 2006.229.17:04:47.21#ibcon#read 4, iclass 35, count 0 2006.229.17:04:47.21#ibcon#about to read 5, iclass 35, count 0 2006.229.17:04:47.21#ibcon#read 5, iclass 35, count 0 2006.229.17:04:47.21#ibcon#about to read 6, iclass 35, count 0 2006.229.17:04:47.21#ibcon#read 6, iclass 35, count 0 2006.229.17:04:47.21#ibcon#end of sib2, iclass 35, count 0 2006.229.17:04:47.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:04:47.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:04:47.21#ibcon#[25=USB\r\n] 2006.229.17:04:47.21#ibcon#*before write, iclass 35, count 0 2006.229.17:04:47.21#ibcon#enter sib2, iclass 35, count 0 2006.229.17:04:47.21#ibcon#flushed, iclass 35, count 0 2006.229.17:04:47.21#ibcon#about to write, iclass 35, count 0 2006.229.17:04:47.21#ibcon#wrote, iclass 35, count 0 2006.229.17:04:47.21#ibcon#about to read 3, iclass 35, count 0 2006.229.17:04:47.24#ibcon#read 3, iclass 35, count 0 2006.229.17:04:47.24#ibcon#about to read 4, iclass 35, count 0 2006.229.17:04:47.24#ibcon#read 4, iclass 35, count 0 2006.229.17:04:47.24#ibcon#about to read 5, iclass 35, count 0 2006.229.17:04:47.24#ibcon#read 5, iclass 35, count 0 2006.229.17:04:47.24#ibcon#about to read 6, iclass 35, count 0 2006.229.17:04:47.24#ibcon#read 6, iclass 35, count 0 2006.229.17:04:47.24#ibcon#end of sib2, iclass 35, count 0 2006.229.17:04:47.24#ibcon#*after write, iclass 35, count 0 2006.229.17:04:47.24#ibcon#*before return 0, iclass 35, count 0 2006.229.17:04:47.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:47.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:47.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:04:47.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:04:47.24$vck44/valo=7,864.99 2006.229.17:04:47.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.17:04:47.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.17:04:47.24#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:47.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:47.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:47.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:47.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:04:47.24#ibcon#first serial, iclass 37, count 0 2006.229.17:04:47.24#ibcon#enter sib2, iclass 37, count 0 2006.229.17:04:47.24#ibcon#flushed, iclass 37, count 0 2006.229.17:04:47.24#ibcon#about to write, iclass 37, count 0 2006.229.17:04:47.24#ibcon#wrote, iclass 37, count 0 2006.229.17:04:47.24#ibcon#about to read 3, iclass 37, count 0 2006.229.17:04:47.26#ibcon#read 3, iclass 37, count 0 2006.229.17:04:47.26#ibcon#about to read 4, iclass 37, count 0 2006.229.17:04:47.26#ibcon#read 4, iclass 37, count 0 2006.229.17:04:47.26#ibcon#about to read 5, iclass 37, count 0 2006.229.17:04:47.26#ibcon#read 5, iclass 37, count 0 2006.229.17:04:47.26#ibcon#about to read 6, iclass 37, count 0 2006.229.17:04:47.26#ibcon#read 6, iclass 37, count 0 2006.229.17:04:47.26#ibcon#end of sib2, iclass 37, count 0 2006.229.17:04:47.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:04:47.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:04:47.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:04:47.26#ibcon#*before write, iclass 37, count 0 2006.229.17:04:47.26#ibcon#enter sib2, iclass 37, count 0 2006.229.17:04:47.26#ibcon#flushed, iclass 37, count 0 2006.229.17:04:47.26#ibcon#about to write, iclass 37, count 0 2006.229.17:04:47.26#ibcon#wrote, iclass 37, count 0 2006.229.17:04:47.26#ibcon#about to read 3, iclass 37, count 0 2006.229.17:04:47.30#ibcon#read 3, iclass 37, count 0 2006.229.17:04:47.30#ibcon#about to read 4, iclass 37, count 0 2006.229.17:04:47.30#ibcon#read 4, iclass 37, count 0 2006.229.17:04:47.30#ibcon#about to read 5, iclass 37, count 0 2006.229.17:04:47.30#ibcon#read 5, iclass 37, count 0 2006.229.17:04:47.30#ibcon#about to read 6, iclass 37, count 0 2006.229.17:04:47.30#ibcon#read 6, iclass 37, count 0 2006.229.17:04:47.30#ibcon#end of sib2, iclass 37, count 0 2006.229.17:04:47.30#ibcon#*after write, iclass 37, count 0 2006.229.17:04:47.30#ibcon#*before return 0, iclass 37, count 0 2006.229.17:04:47.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:47.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:47.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:04:47.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:04:47.30$vck44/va=7,5 2006.229.17:04:47.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.17:04:47.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.17:04:47.30#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:47.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:47.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:47.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:47.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.17:04:47.36#ibcon#first serial, iclass 39, count 2 2006.229.17:04:47.36#ibcon#enter sib2, iclass 39, count 2 2006.229.17:04:47.36#ibcon#flushed, iclass 39, count 2 2006.229.17:04:47.36#ibcon#about to write, iclass 39, count 2 2006.229.17:04:47.36#ibcon#wrote, iclass 39, count 2 2006.229.17:04:47.36#ibcon#about to read 3, iclass 39, count 2 2006.229.17:04:47.38#ibcon#read 3, iclass 39, count 2 2006.229.17:04:47.38#ibcon#about to read 4, iclass 39, count 2 2006.229.17:04:47.38#ibcon#read 4, iclass 39, count 2 2006.229.17:04:47.38#ibcon#about to read 5, iclass 39, count 2 2006.229.17:04:47.38#ibcon#read 5, iclass 39, count 2 2006.229.17:04:47.38#ibcon#about to read 6, iclass 39, count 2 2006.229.17:04:47.38#ibcon#read 6, iclass 39, count 2 2006.229.17:04:47.38#ibcon#end of sib2, iclass 39, count 2 2006.229.17:04:47.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.17:04:47.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.17:04:47.38#ibcon#[25=AT07-05\r\n] 2006.229.17:04:47.38#ibcon#*before write, iclass 39, count 2 2006.229.17:04:47.38#ibcon#enter sib2, iclass 39, count 2 2006.229.17:04:47.38#ibcon#flushed, iclass 39, count 2 2006.229.17:04:47.38#ibcon#about to write, iclass 39, count 2 2006.229.17:04:47.38#ibcon#wrote, iclass 39, count 2 2006.229.17:04:47.38#ibcon#about to read 3, iclass 39, count 2 2006.229.17:04:47.41#ibcon#read 3, iclass 39, count 2 2006.229.17:04:47.41#ibcon#about to read 4, iclass 39, count 2 2006.229.17:04:47.41#ibcon#read 4, iclass 39, count 2 2006.229.17:04:47.41#ibcon#about to read 5, iclass 39, count 2 2006.229.17:04:47.41#ibcon#read 5, iclass 39, count 2 2006.229.17:04:47.41#ibcon#about to read 6, iclass 39, count 2 2006.229.17:04:47.41#ibcon#read 6, iclass 39, count 2 2006.229.17:04:47.41#ibcon#end of sib2, iclass 39, count 2 2006.229.17:04:47.41#ibcon#*after write, iclass 39, count 2 2006.229.17:04:47.41#ibcon#*before return 0, iclass 39, count 2 2006.229.17:04:47.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:47.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:47.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.17:04:47.41#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:47.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:47.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:47.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:47.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:04:47.53#ibcon#first serial, iclass 39, count 0 2006.229.17:04:47.53#ibcon#enter sib2, iclass 39, count 0 2006.229.17:04:47.53#ibcon#flushed, iclass 39, count 0 2006.229.17:04:47.53#ibcon#about to write, iclass 39, count 0 2006.229.17:04:47.53#ibcon#wrote, iclass 39, count 0 2006.229.17:04:47.53#ibcon#about to read 3, iclass 39, count 0 2006.229.17:04:47.55#ibcon#read 3, iclass 39, count 0 2006.229.17:04:47.55#ibcon#about to read 4, iclass 39, count 0 2006.229.17:04:47.55#ibcon#read 4, iclass 39, count 0 2006.229.17:04:47.55#ibcon#about to read 5, iclass 39, count 0 2006.229.17:04:47.55#ibcon#read 5, iclass 39, count 0 2006.229.17:04:47.55#ibcon#about to read 6, iclass 39, count 0 2006.229.17:04:47.55#ibcon#read 6, iclass 39, count 0 2006.229.17:04:47.55#ibcon#end of sib2, iclass 39, count 0 2006.229.17:04:47.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:04:47.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:04:47.55#ibcon#[25=USB\r\n] 2006.229.17:04:47.55#ibcon#*before write, iclass 39, count 0 2006.229.17:04:47.55#ibcon#enter sib2, iclass 39, count 0 2006.229.17:04:47.55#ibcon#flushed, iclass 39, count 0 2006.229.17:04:47.55#ibcon#about to write, iclass 39, count 0 2006.229.17:04:47.55#ibcon#wrote, iclass 39, count 0 2006.229.17:04:47.55#ibcon#about to read 3, iclass 39, count 0 2006.229.17:04:47.58#ibcon#read 3, iclass 39, count 0 2006.229.17:04:47.58#ibcon#about to read 4, iclass 39, count 0 2006.229.17:04:47.58#ibcon#read 4, iclass 39, count 0 2006.229.17:04:47.58#ibcon#about to read 5, iclass 39, count 0 2006.229.17:04:47.58#ibcon#read 5, iclass 39, count 0 2006.229.17:04:47.58#ibcon#about to read 6, iclass 39, count 0 2006.229.17:04:47.58#ibcon#read 6, iclass 39, count 0 2006.229.17:04:47.58#ibcon#end of sib2, iclass 39, count 0 2006.229.17:04:47.58#ibcon#*after write, iclass 39, count 0 2006.229.17:04:47.58#ibcon#*before return 0, iclass 39, count 0 2006.229.17:04:47.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:47.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:47.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:04:47.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:04:47.58$vck44/valo=8,884.99 2006.229.17:04:47.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:04:47.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:04:47.58#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:47.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:47.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:47.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:47.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:04:47.58#ibcon#first serial, iclass 3, count 0 2006.229.17:04:47.58#ibcon#enter sib2, iclass 3, count 0 2006.229.17:04:47.58#ibcon#flushed, iclass 3, count 0 2006.229.17:04:47.58#ibcon#about to write, iclass 3, count 0 2006.229.17:04:47.58#ibcon#wrote, iclass 3, count 0 2006.229.17:04:47.58#ibcon#about to read 3, iclass 3, count 0 2006.229.17:04:47.60#ibcon#read 3, iclass 3, count 0 2006.229.17:04:47.60#ibcon#about to read 4, iclass 3, count 0 2006.229.17:04:47.60#ibcon#read 4, iclass 3, count 0 2006.229.17:04:47.60#ibcon#about to read 5, iclass 3, count 0 2006.229.17:04:47.60#ibcon#read 5, iclass 3, count 0 2006.229.17:04:47.60#ibcon#about to read 6, iclass 3, count 0 2006.229.17:04:47.60#ibcon#read 6, iclass 3, count 0 2006.229.17:04:47.60#ibcon#end of sib2, iclass 3, count 0 2006.229.17:04:47.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:04:47.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:04:47.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:04:47.60#ibcon#*before write, iclass 3, count 0 2006.229.17:04:47.60#ibcon#enter sib2, iclass 3, count 0 2006.229.17:04:47.60#ibcon#flushed, iclass 3, count 0 2006.229.17:04:47.60#ibcon#about to write, iclass 3, count 0 2006.229.17:04:47.60#ibcon#wrote, iclass 3, count 0 2006.229.17:04:47.60#ibcon#about to read 3, iclass 3, count 0 2006.229.17:04:47.64#ibcon#read 3, iclass 3, count 0 2006.229.17:04:47.64#ibcon#about to read 4, iclass 3, count 0 2006.229.17:04:47.64#ibcon#read 4, iclass 3, count 0 2006.229.17:04:47.64#ibcon#about to read 5, iclass 3, count 0 2006.229.17:04:47.64#ibcon#read 5, iclass 3, count 0 2006.229.17:04:47.64#ibcon#about to read 6, iclass 3, count 0 2006.229.17:04:47.64#ibcon#read 6, iclass 3, count 0 2006.229.17:04:47.64#ibcon#end of sib2, iclass 3, count 0 2006.229.17:04:47.64#ibcon#*after write, iclass 3, count 0 2006.229.17:04:47.64#ibcon#*before return 0, iclass 3, count 0 2006.229.17:04:47.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:47.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:47.64#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:04:47.64#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:04:47.64$vck44/va=8,6 2006.229.17:04:47.64#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.17:04:47.64#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.17:04:47.64#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:47.64#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:04:47.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:04:47.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:04:47.70#ibcon#enter wrdev, iclass 5, count 2 2006.229.17:04:47.70#ibcon#first serial, iclass 5, count 2 2006.229.17:04:47.70#ibcon#enter sib2, iclass 5, count 2 2006.229.17:04:47.70#ibcon#flushed, iclass 5, count 2 2006.229.17:04:47.70#ibcon#about to write, iclass 5, count 2 2006.229.17:04:47.70#ibcon#wrote, iclass 5, count 2 2006.229.17:04:47.70#ibcon#about to read 3, iclass 5, count 2 2006.229.17:04:47.72#ibcon#read 3, iclass 5, count 2 2006.229.17:04:47.72#ibcon#about to read 4, iclass 5, count 2 2006.229.17:04:47.72#ibcon#read 4, iclass 5, count 2 2006.229.17:04:47.72#ibcon#about to read 5, iclass 5, count 2 2006.229.17:04:47.72#ibcon#read 5, iclass 5, count 2 2006.229.17:04:47.72#ibcon#about to read 6, iclass 5, count 2 2006.229.17:04:47.72#ibcon#read 6, iclass 5, count 2 2006.229.17:04:47.72#ibcon#end of sib2, iclass 5, count 2 2006.229.17:04:47.72#ibcon#*mode == 0, iclass 5, count 2 2006.229.17:04:47.72#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.17:04:47.72#ibcon#[25=AT08-06\r\n] 2006.229.17:04:47.72#ibcon#*before write, iclass 5, count 2 2006.229.17:04:47.72#ibcon#enter sib2, iclass 5, count 2 2006.229.17:04:47.72#ibcon#flushed, iclass 5, count 2 2006.229.17:04:47.72#ibcon#about to write, iclass 5, count 2 2006.229.17:04:47.72#ibcon#wrote, iclass 5, count 2 2006.229.17:04:47.72#ibcon#about to read 3, iclass 5, count 2 2006.229.17:04:47.75#ibcon#read 3, iclass 5, count 2 2006.229.17:04:47.75#ibcon#about to read 4, iclass 5, count 2 2006.229.17:04:47.75#ibcon#read 4, iclass 5, count 2 2006.229.17:04:47.75#ibcon#about to read 5, iclass 5, count 2 2006.229.17:04:47.75#ibcon#read 5, iclass 5, count 2 2006.229.17:04:47.75#ibcon#about to read 6, iclass 5, count 2 2006.229.17:04:47.75#ibcon#read 6, iclass 5, count 2 2006.229.17:04:47.75#ibcon#end of sib2, iclass 5, count 2 2006.229.17:04:47.75#ibcon#*after write, iclass 5, count 2 2006.229.17:04:47.75#ibcon#*before return 0, iclass 5, count 2 2006.229.17:04:47.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:04:47.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:04:47.75#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.17:04:47.75#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:47.75#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:04:47.87#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:04:47.87#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:04:47.87#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:04:47.87#ibcon#first serial, iclass 5, count 0 2006.229.17:04:47.87#ibcon#enter sib2, iclass 5, count 0 2006.229.17:04:47.87#ibcon#flushed, iclass 5, count 0 2006.229.17:04:47.87#ibcon#about to write, iclass 5, count 0 2006.229.17:04:47.87#ibcon#wrote, iclass 5, count 0 2006.229.17:04:47.87#ibcon#about to read 3, iclass 5, count 0 2006.229.17:04:47.89#ibcon#read 3, iclass 5, count 0 2006.229.17:04:47.89#ibcon#about to read 4, iclass 5, count 0 2006.229.17:04:47.89#ibcon#read 4, iclass 5, count 0 2006.229.17:04:47.89#ibcon#about to read 5, iclass 5, count 0 2006.229.17:04:47.89#ibcon#read 5, iclass 5, count 0 2006.229.17:04:47.89#ibcon#about to read 6, iclass 5, count 0 2006.229.17:04:47.89#ibcon#read 6, iclass 5, count 0 2006.229.17:04:47.89#ibcon#end of sib2, iclass 5, count 0 2006.229.17:04:47.89#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:04:47.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:04:47.89#ibcon#[25=USB\r\n] 2006.229.17:04:47.89#ibcon#*before write, iclass 5, count 0 2006.229.17:04:47.89#ibcon#enter sib2, iclass 5, count 0 2006.229.17:04:47.89#ibcon#flushed, iclass 5, count 0 2006.229.17:04:47.89#ibcon#about to write, iclass 5, count 0 2006.229.17:04:47.89#ibcon#wrote, iclass 5, count 0 2006.229.17:04:47.89#ibcon#about to read 3, iclass 5, count 0 2006.229.17:04:47.92#ibcon#read 3, iclass 5, count 0 2006.229.17:04:47.92#ibcon#about to read 4, iclass 5, count 0 2006.229.17:04:47.92#ibcon#read 4, iclass 5, count 0 2006.229.17:04:47.92#ibcon#about to read 5, iclass 5, count 0 2006.229.17:04:47.92#ibcon#read 5, iclass 5, count 0 2006.229.17:04:47.92#ibcon#about to read 6, iclass 5, count 0 2006.229.17:04:47.92#ibcon#read 6, iclass 5, count 0 2006.229.17:04:47.92#ibcon#end of sib2, iclass 5, count 0 2006.229.17:04:47.92#ibcon#*after write, iclass 5, count 0 2006.229.17:04:47.92#ibcon#*before return 0, iclass 5, count 0 2006.229.17:04:47.92#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:04:47.92#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:04:47.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:04:47.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:04:47.92$vck44/vblo=1,629.99 2006.229.17:04:47.92#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.17:04:47.92#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.17:04:47.92#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:47.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:04:47.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:04:47.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:04:47.92#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:04:47.92#ibcon#first serial, iclass 7, count 0 2006.229.17:04:47.92#ibcon#enter sib2, iclass 7, count 0 2006.229.17:04:47.92#ibcon#flushed, iclass 7, count 0 2006.229.17:04:47.92#ibcon#about to write, iclass 7, count 0 2006.229.17:04:47.92#ibcon#wrote, iclass 7, count 0 2006.229.17:04:47.92#ibcon#about to read 3, iclass 7, count 0 2006.229.17:04:47.94#ibcon#read 3, iclass 7, count 0 2006.229.17:04:47.94#ibcon#about to read 4, iclass 7, count 0 2006.229.17:04:47.94#ibcon#read 4, iclass 7, count 0 2006.229.17:04:47.94#ibcon#about to read 5, iclass 7, count 0 2006.229.17:04:47.94#ibcon#read 5, iclass 7, count 0 2006.229.17:04:47.94#ibcon#about to read 6, iclass 7, count 0 2006.229.17:04:47.94#ibcon#read 6, iclass 7, count 0 2006.229.17:04:47.94#ibcon#end of sib2, iclass 7, count 0 2006.229.17:04:47.94#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:04:47.94#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:04:47.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:04:47.94#ibcon#*before write, iclass 7, count 0 2006.229.17:04:47.94#ibcon#enter sib2, iclass 7, count 0 2006.229.17:04:47.94#ibcon#flushed, iclass 7, count 0 2006.229.17:04:47.94#ibcon#about to write, iclass 7, count 0 2006.229.17:04:47.94#ibcon#wrote, iclass 7, count 0 2006.229.17:04:47.94#ibcon#about to read 3, iclass 7, count 0 2006.229.17:04:47.98#ibcon#read 3, iclass 7, count 0 2006.229.17:04:47.98#ibcon#about to read 4, iclass 7, count 0 2006.229.17:04:47.98#ibcon#read 4, iclass 7, count 0 2006.229.17:04:47.98#ibcon#about to read 5, iclass 7, count 0 2006.229.17:04:47.98#ibcon#read 5, iclass 7, count 0 2006.229.17:04:47.98#ibcon#about to read 6, iclass 7, count 0 2006.229.17:04:47.98#ibcon#read 6, iclass 7, count 0 2006.229.17:04:47.98#ibcon#end of sib2, iclass 7, count 0 2006.229.17:04:47.98#ibcon#*after write, iclass 7, count 0 2006.229.17:04:47.98#ibcon#*before return 0, iclass 7, count 0 2006.229.17:04:47.98#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:04:47.98#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:04:47.98#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:04:47.98#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:04:47.98$vck44/vb=1,4 2006.229.17:04:47.98#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.17:04:47.98#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.17:04:47.98#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:47.98#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:04:47.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:04:47.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:04:47.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.17:04:47.98#ibcon#first serial, iclass 11, count 2 2006.229.17:04:47.98#ibcon#enter sib2, iclass 11, count 2 2006.229.17:04:47.98#ibcon#flushed, iclass 11, count 2 2006.229.17:04:47.98#ibcon#about to write, iclass 11, count 2 2006.229.17:04:47.98#ibcon#wrote, iclass 11, count 2 2006.229.17:04:47.98#ibcon#about to read 3, iclass 11, count 2 2006.229.17:04:48.00#ibcon#read 3, iclass 11, count 2 2006.229.17:04:48.00#ibcon#about to read 4, iclass 11, count 2 2006.229.17:04:48.00#ibcon#read 4, iclass 11, count 2 2006.229.17:04:48.00#ibcon#about to read 5, iclass 11, count 2 2006.229.17:04:48.00#ibcon#read 5, iclass 11, count 2 2006.229.17:04:48.00#ibcon#about to read 6, iclass 11, count 2 2006.229.17:04:48.00#ibcon#read 6, iclass 11, count 2 2006.229.17:04:48.00#ibcon#end of sib2, iclass 11, count 2 2006.229.17:04:48.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.17:04:48.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.17:04:48.00#ibcon#[27=AT01-04\r\n] 2006.229.17:04:48.00#ibcon#*before write, iclass 11, count 2 2006.229.17:04:48.00#ibcon#enter sib2, iclass 11, count 2 2006.229.17:04:48.00#ibcon#flushed, iclass 11, count 2 2006.229.17:04:48.00#ibcon#about to write, iclass 11, count 2 2006.229.17:04:48.00#ibcon#wrote, iclass 11, count 2 2006.229.17:04:48.00#ibcon#about to read 3, iclass 11, count 2 2006.229.17:04:48.03#ibcon#read 3, iclass 11, count 2 2006.229.17:04:48.03#ibcon#about to read 4, iclass 11, count 2 2006.229.17:04:48.03#ibcon#read 4, iclass 11, count 2 2006.229.17:04:48.03#ibcon#about to read 5, iclass 11, count 2 2006.229.17:04:48.03#ibcon#read 5, iclass 11, count 2 2006.229.17:04:48.03#ibcon#about to read 6, iclass 11, count 2 2006.229.17:04:48.03#ibcon#read 6, iclass 11, count 2 2006.229.17:04:48.03#ibcon#end of sib2, iclass 11, count 2 2006.229.17:04:48.03#ibcon#*after write, iclass 11, count 2 2006.229.17:04:48.03#ibcon#*before return 0, iclass 11, count 2 2006.229.17:04:48.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:04:48.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:04:48.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.17:04:48.03#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:48.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:04:48.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:04:48.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:04:48.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:04:48.15#ibcon#first serial, iclass 11, count 0 2006.229.17:04:48.15#ibcon#enter sib2, iclass 11, count 0 2006.229.17:04:48.15#ibcon#flushed, iclass 11, count 0 2006.229.17:04:48.15#ibcon#about to write, iclass 11, count 0 2006.229.17:04:48.15#ibcon#wrote, iclass 11, count 0 2006.229.17:04:48.15#ibcon#about to read 3, iclass 11, count 0 2006.229.17:04:48.17#ibcon#read 3, iclass 11, count 0 2006.229.17:04:48.17#ibcon#about to read 4, iclass 11, count 0 2006.229.17:04:48.17#ibcon#read 4, iclass 11, count 0 2006.229.17:04:48.17#ibcon#about to read 5, iclass 11, count 0 2006.229.17:04:48.17#ibcon#read 5, iclass 11, count 0 2006.229.17:04:48.17#ibcon#about to read 6, iclass 11, count 0 2006.229.17:04:48.17#ibcon#read 6, iclass 11, count 0 2006.229.17:04:48.17#ibcon#end of sib2, iclass 11, count 0 2006.229.17:04:48.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:04:48.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:04:48.17#ibcon#[27=USB\r\n] 2006.229.17:04:48.17#ibcon#*before write, iclass 11, count 0 2006.229.17:04:48.17#ibcon#enter sib2, iclass 11, count 0 2006.229.17:04:48.17#ibcon#flushed, iclass 11, count 0 2006.229.17:04:48.17#ibcon#about to write, iclass 11, count 0 2006.229.17:04:48.17#ibcon#wrote, iclass 11, count 0 2006.229.17:04:48.17#ibcon#about to read 3, iclass 11, count 0 2006.229.17:04:48.20#ibcon#read 3, iclass 11, count 0 2006.229.17:04:48.20#ibcon#about to read 4, iclass 11, count 0 2006.229.17:04:48.20#ibcon#read 4, iclass 11, count 0 2006.229.17:04:48.20#ibcon#about to read 5, iclass 11, count 0 2006.229.17:04:48.20#ibcon#read 5, iclass 11, count 0 2006.229.17:04:48.20#ibcon#about to read 6, iclass 11, count 0 2006.229.17:04:48.20#ibcon#read 6, iclass 11, count 0 2006.229.17:04:48.20#ibcon#end of sib2, iclass 11, count 0 2006.229.17:04:48.20#ibcon#*after write, iclass 11, count 0 2006.229.17:04:48.20#ibcon#*before return 0, iclass 11, count 0 2006.229.17:04:48.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:04:48.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:04:48.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:04:48.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:04:48.20$vck44/vblo=2,634.99 2006.229.17:04:48.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.17:04:48.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.17:04:48.20#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:48.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:48.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:48.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:48.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:04:48.20#ibcon#first serial, iclass 13, count 0 2006.229.17:04:48.20#ibcon#enter sib2, iclass 13, count 0 2006.229.17:04:48.20#ibcon#flushed, iclass 13, count 0 2006.229.17:04:48.20#ibcon#about to write, iclass 13, count 0 2006.229.17:04:48.20#ibcon#wrote, iclass 13, count 0 2006.229.17:04:48.20#ibcon#about to read 3, iclass 13, count 0 2006.229.17:04:48.22#ibcon#read 3, iclass 13, count 0 2006.229.17:04:48.22#ibcon#about to read 4, iclass 13, count 0 2006.229.17:04:48.22#ibcon#read 4, iclass 13, count 0 2006.229.17:04:48.22#ibcon#about to read 5, iclass 13, count 0 2006.229.17:04:48.22#ibcon#read 5, iclass 13, count 0 2006.229.17:04:48.22#ibcon#about to read 6, iclass 13, count 0 2006.229.17:04:48.22#ibcon#read 6, iclass 13, count 0 2006.229.17:04:48.22#ibcon#end of sib2, iclass 13, count 0 2006.229.17:04:48.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:04:48.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:04:48.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:04:48.22#ibcon#*before write, iclass 13, count 0 2006.229.17:04:48.22#ibcon#enter sib2, iclass 13, count 0 2006.229.17:04:48.22#ibcon#flushed, iclass 13, count 0 2006.229.17:04:48.22#ibcon#about to write, iclass 13, count 0 2006.229.17:04:48.22#ibcon#wrote, iclass 13, count 0 2006.229.17:04:48.22#ibcon#about to read 3, iclass 13, count 0 2006.229.17:04:48.26#ibcon#read 3, iclass 13, count 0 2006.229.17:04:48.26#ibcon#about to read 4, iclass 13, count 0 2006.229.17:04:48.26#ibcon#read 4, iclass 13, count 0 2006.229.17:04:48.26#ibcon#about to read 5, iclass 13, count 0 2006.229.17:04:48.26#ibcon#read 5, iclass 13, count 0 2006.229.17:04:48.26#ibcon#about to read 6, iclass 13, count 0 2006.229.17:04:48.26#ibcon#read 6, iclass 13, count 0 2006.229.17:04:48.26#ibcon#end of sib2, iclass 13, count 0 2006.229.17:04:48.26#ibcon#*after write, iclass 13, count 0 2006.229.17:04:48.26#ibcon#*before return 0, iclass 13, count 0 2006.229.17:04:48.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:48.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:04:48.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:04:48.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:04:48.26$vck44/vb=2,4 2006.229.17:04:48.26#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.17:04:48.26#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.17:04:48.26#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:48.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:48.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:48.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:48.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.17:04:48.32#ibcon#first serial, iclass 15, count 2 2006.229.17:04:48.32#ibcon#enter sib2, iclass 15, count 2 2006.229.17:04:48.32#ibcon#flushed, iclass 15, count 2 2006.229.17:04:48.32#ibcon#about to write, iclass 15, count 2 2006.229.17:04:48.32#ibcon#wrote, iclass 15, count 2 2006.229.17:04:48.32#ibcon#about to read 3, iclass 15, count 2 2006.229.17:04:48.34#ibcon#read 3, iclass 15, count 2 2006.229.17:04:48.34#ibcon#about to read 4, iclass 15, count 2 2006.229.17:04:48.34#ibcon#read 4, iclass 15, count 2 2006.229.17:04:48.34#ibcon#about to read 5, iclass 15, count 2 2006.229.17:04:48.34#ibcon#read 5, iclass 15, count 2 2006.229.17:04:48.34#ibcon#about to read 6, iclass 15, count 2 2006.229.17:04:48.34#ibcon#read 6, iclass 15, count 2 2006.229.17:04:48.34#ibcon#end of sib2, iclass 15, count 2 2006.229.17:04:48.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.17:04:48.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.17:04:48.34#ibcon#[27=AT02-04\r\n] 2006.229.17:04:48.34#ibcon#*before write, iclass 15, count 2 2006.229.17:04:48.34#ibcon#enter sib2, iclass 15, count 2 2006.229.17:04:48.34#ibcon#flushed, iclass 15, count 2 2006.229.17:04:48.34#ibcon#about to write, iclass 15, count 2 2006.229.17:04:48.34#ibcon#wrote, iclass 15, count 2 2006.229.17:04:48.34#ibcon#about to read 3, iclass 15, count 2 2006.229.17:04:48.37#ibcon#read 3, iclass 15, count 2 2006.229.17:04:48.37#ibcon#about to read 4, iclass 15, count 2 2006.229.17:04:48.37#ibcon#read 4, iclass 15, count 2 2006.229.17:04:48.37#ibcon#about to read 5, iclass 15, count 2 2006.229.17:04:48.37#ibcon#read 5, iclass 15, count 2 2006.229.17:04:48.37#ibcon#about to read 6, iclass 15, count 2 2006.229.17:04:48.37#ibcon#read 6, iclass 15, count 2 2006.229.17:04:48.37#ibcon#end of sib2, iclass 15, count 2 2006.229.17:04:48.37#ibcon#*after write, iclass 15, count 2 2006.229.17:04:48.37#ibcon#*before return 0, iclass 15, count 2 2006.229.17:04:48.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:48.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:04:48.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.17:04:48.37#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:48.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:48.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:48.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:48.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:04:48.49#ibcon#first serial, iclass 15, count 0 2006.229.17:04:48.49#ibcon#enter sib2, iclass 15, count 0 2006.229.17:04:48.49#ibcon#flushed, iclass 15, count 0 2006.229.17:04:48.49#ibcon#about to write, iclass 15, count 0 2006.229.17:04:48.49#ibcon#wrote, iclass 15, count 0 2006.229.17:04:48.49#ibcon#about to read 3, iclass 15, count 0 2006.229.17:04:48.51#ibcon#read 3, iclass 15, count 0 2006.229.17:04:48.51#ibcon#about to read 4, iclass 15, count 0 2006.229.17:04:48.51#ibcon#read 4, iclass 15, count 0 2006.229.17:04:48.51#ibcon#about to read 5, iclass 15, count 0 2006.229.17:04:48.51#ibcon#read 5, iclass 15, count 0 2006.229.17:04:48.51#ibcon#about to read 6, iclass 15, count 0 2006.229.17:04:48.51#ibcon#read 6, iclass 15, count 0 2006.229.17:04:48.51#ibcon#end of sib2, iclass 15, count 0 2006.229.17:04:48.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:04:48.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:04:48.51#ibcon#[27=USB\r\n] 2006.229.17:04:48.51#ibcon#*before write, iclass 15, count 0 2006.229.17:04:48.51#ibcon#enter sib2, iclass 15, count 0 2006.229.17:04:48.51#ibcon#flushed, iclass 15, count 0 2006.229.17:04:48.51#ibcon#about to write, iclass 15, count 0 2006.229.17:04:48.51#ibcon#wrote, iclass 15, count 0 2006.229.17:04:48.51#ibcon#about to read 3, iclass 15, count 0 2006.229.17:04:48.54#ibcon#read 3, iclass 15, count 0 2006.229.17:04:48.54#ibcon#about to read 4, iclass 15, count 0 2006.229.17:04:48.54#ibcon#read 4, iclass 15, count 0 2006.229.17:04:48.54#ibcon#about to read 5, iclass 15, count 0 2006.229.17:04:48.54#ibcon#read 5, iclass 15, count 0 2006.229.17:04:48.54#ibcon#about to read 6, iclass 15, count 0 2006.229.17:04:48.54#ibcon#read 6, iclass 15, count 0 2006.229.17:04:48.54#ibcon#end of sib2, iclass 15, count 0 2006.229.17:04:48.54#ibcon#*after write, iclass 15, count 0 2006.229.17:04:48.54#ibcon#*before return 0, iclass 15, count 0 2006.229.17:04:48.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:48.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:04:48.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:04:48.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:04:48.54$vck44/vblo=3,649.99 2006.229.17:04:48.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.17:04:48.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.17:04:48.54#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:48.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:48.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:48.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:48.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:04:48.54#ibcon#first serial, iclass 17, count 0 2006.229.17:04:48.54#ibcon#enter sib2, iclass 17, count 0 2006.229.17:04:48.54#ibcon#flushed, iclass 17, count 0 2006.229.17:04:48.54#ibcon#about to write, iclass 17, count 0 2006.229.17:04:48.54#ibcon#wrote, iclass 17, count 0 2006.229.17:04:48.54#ibcon#about to read 3, iclass 17, count 0 2006.229.17:04:48.56#ibcon#read 3, iclass 17, count 0 2006.229.17:04:48.56#ibcon#about to read 4, iclass 17, count 0 2006.229.17:04:48.56#ibcon#read 4, iclass 17, count 0 2006.229.17:04:48.56#ibcon#about to read 5, iclass 17, count 0 2006.229.17:04:48.56#ibcon#read 5, iclass 17, count 0 2006.229.17:04:48.56#ibcon#about to read 6, iclass 17, count 0 2006.229.17:04:48.56#ibcon#read 6, iclass 17, count 0 2006.229.17:04:48.56#ibcon#end of sib2, iclass 17, count 0 2006.229.17:04:48.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:04:48.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:04:48.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:04:48.56#ibcon#*before write, iclass 17, count 0 2006.229.17:04:48.56#ibcon#enter sib2, iclass 17, count 0 2006.229.17:04:48.56#ibcon#flushed, iclass 17, count 0 2006.229.17:04:48.56#ibcon#about to write, iclass 17, count 0 2006.229.17:04:48.56#ibcon#wrote, iclass 17, count 0 2006.229.17:04:48.56#ibcon#about to read 3, iclass 17, count 0 2006.229.17:04:48.60#ibcon#read 3, iclass 17, count 0 2006.229.17:04:48.60#ibcon#about to read 4, iclass 17, count 0 2006.229.17:04:48.60#ibcon#read 4, iclass 17, count 0 2006.229.17:04:48.60#ibcon#about to read 5, iclass 17, count 0 2006.229.17:04:48.60#ibcon#read 5, iclass 17, count 0 2006.229.17:04:48.60#ibcon#about to read 6, iclass 17, count 0 2006.229.17:04:48.60#ibcon#read 6, iclass 17, count 0 2006.229.17:04:48.60#ibcon#end of sib2, iclass 17, count 0 2006.229.17:04:48.60#ibcon#*after write, iclass 17, count 0 2006.229.17:04:48.60#ibcon#*before return 0, iclass 17, count 0 2006.229.17:04:48.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:48.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:04:48.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:04:48.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:04:48.60$vck44/vb=3,4 2006.229.17:04:48.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.17:04:48.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.17:04:48.60#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:48.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:48.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:48.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:48.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.17:04:48.66#ibcon#first serial, iclass 19, count 2 2006.229.17:04:48.66#ibcon#enter sib2, iclass 19, count 2 2006.229.17:04:48.66#ibcon#flushed, iclass 19, count 2 2006.229.17:04:48.66#ibcon#about to write, iclass 19, count 2 2006.229.17:04:48.66#ibcon#wrote, iclass 19, count 2 2006.229.17:04:48.66#ibcon#about to read 3, iclass 19, count 2 2006.229.17:04:48.68#ibcon#read 3, iclass 19, count 2 2006.229.17:04:48.68#ibcon#about to read 4, iclass 19, count 2 2006.229.17:04:48.68#ibcon#read 4, iclass 19, count 2 2006.229.17:04:48.68#ibcon#about to read 5, iclass 19, count 2 2006.229.17:04:48.68#ibcon#read 5, iclass 19, count 2 2006.229.17:04:48.68#ibcon#about to read 6, iclass 19, count 2 2006.229.17:04:48.68#ibcon#read 6, iclass 19, count 2 2006.229.17:04:48.68#ibcon#end of sib2, iclass 19, count 2 2006.229.17:04:48.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.17:04:48.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.17:04:48.68#ibcon#[27=AT03-04\r\n] 2006.229.17:04:48.68#ibcon#*before write, iclass 19, count 2 2006.229.17:04:48.68#ibcon#enter sib2, iclass 19, count 2 2006.229.17:04:48.68#ibcon#flushed, iclass 19, count 2 2006.229.17:04:48.68#ibcon#about to write, iclass 19, count 2 2006.229.17:04:48.68#ibcon#wrote, iclass 19, count 2 2006.229.17:04:48.68#ibcon#about to read 3, iclass 19, count 2 2006.229.17:04:48.71#ibcon#read 3, iclass 19, count 2 2006.229.17:04:48.71#ibcon#about to read 4, iclass 19, count 2 2006.229.17:04:48.71#ibcon#read 4, iclass 19, count 2 2006.229.17:04:48.71#ibcon#about to read 5, iclass 19, count 2 2006.229.17:04:48.71#ibcon#read 5, iclass 19, count 2 2006.229.17:04:48.71#ibcon#about to read 6, iclass 19, count 2 2006.229.17:04:48.71#ibcon#read 6, iclass 19, count 2 2006.229.17:04:48.71#ibcon#end of sib2, iclass 19, count 2 2006.229.17:04:48.71#ibcon#*after write, iclass 19, count 2 2006.229.17:04:48.71#ibcon#*before return 0, iclass 19, count 2 2006.229.17:04:48.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:48.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:04:48.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.17:04:48.71#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:48.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:48.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:48.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:48.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:04:48.83#ibcon#first serial, iclass 19, count 0 2006.229.17:04:48.83#ibcon#enter sib2, iclass 19, count 0 2006.229.17:04:48.83#ibcon#flushed, iclass 19, count 0 2006.229.17:04:48.83#ibcon#about to write, iclass 19, count 0 2006.229.17:04:48.83#ibcon#wrote, iclass 19, count 0 2006.229.17:04:48.83#ibcon#about to read 3, iclass 19, count 0 2006.229.17:04:48.85#ibcon#read 3, iclass 19, count 0 2006.229.17:04:48.85#ibcon#about to read 4, iclass 19, count 0 2006.229.17:04:48.85#ibcon#read 4, iclass 19, count 0 2006.229.17:04:48.85#ibcon#about to read 5, iclass 19, count 0 2006.229.17:04:48.85#ibcon#read 5, iclass 19, count 0 2006.229.17:04:48.85#ibcon#about to read 6, iclass 19, count 0 2006.229.17:04:48.85#ibcon#read 6, iclass 19, count 0 2006.229.17:04:48.85#ibcon#end of sib2, iclass 19, count 0 2006.229.17:04:48.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:04:48.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:04:48.85#ibcon#[27=USB\r\n] 2006.229.17:04:48.85#ibcon#*before write, iclass 19, count 0 2006.229.17:04:48.85#ibcon#enter sib2, iclass 19, count 0 2006.229.17:04:48.85#ibcon#flushed, iclass 19, count 0 2006.229.17:04:48.85#ibcon#about to write, iclass 19, count 0 2006.229.17:04:48.85#ibcon#wrote, iclass 19, count 0 2006.229.17:04:48.85#ibcon#about to read 3, iclass 19, count 0 2006.229.17:04:48.88#ibcon#read 3, iclass 19, count 0 2006.229.17:04:48.88#ibcon#about to read 4, iclass 19, count 0 2006.229.17:04:48.88#ibcon#read 4, iclass 19, count 0 2006.229.17:04:48.88#ibcon#about to read 5, iclass 19, count 0 2006.229.17:04:48.88#ibcon#read 5, iclass 19, count 0 2006.229.17:04:48.88#ibcon#about to read 6, iclass 19, count 0 2006.229.17:04:48.88#ibcon#read 6, iclass 19, count 0 2006.229.17:04:48.88#ibcon#end of sib2, iclass 19, count 0 2006.229.17:04:48.88#ibcon#*after write, iclass 19, count 0 2006.229.17:04:48.88#ibcon#*before return 0, iclass 19, count 0 2006.229.17:04:48.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:48.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:04:48.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:04:48.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:04:48.88$vck44/vblo=4,679.99 2006.229.17:04:48.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.17:04:48.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.17:04:48.88#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:48.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:48.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:48.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:48.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:04:48.88#ibcon#first serial, iclass 21, count 0 2006.229.17:04:48.88#ibcon#enter sib2, iclass 21, count 0 2006.229.17:04:48.88#ibcon#flushed, iclass 21, count 0 2006.229.17:04:48.88#ibcon#about to write, iclass 21, count 0 2006.229.17:04:48.88#ibcon#wrote, iclass 21, count 0 2006.229.17:04:48.88#ibcon#about to read 3, iclass 21, count 0 2006.229.17:04:48.90#ibcon#read 3, iclass 21, count 0 2006.229.17:04:48.90#ibcon#about to read 4, iclass 21, count 0 2006.229.17:04:48.90#ibcon#read 4, iclass 21, count 0 2006.229.17:04:48.90#ibcon#about to read 5, iclass 21, count 0 2006.229.17:04:48.90#ibcon#read 5, iclass 21, count 0 2006.229.17:04:48.90#ibcon#about to read 6, iclass 21, count 0 2006.229.17:04:48.90#ibcon#read 6, iclass 21, count 0 2006.229.17:04:48.90#ibcon#end of sib2, iclass 21, count 0 2006.229.17:04:48.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:04:48.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:04:48.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:04:48.90#ibcon#*before write, iclass 21, count 0 2006.229.17:04:48.90#ibcon#enter sib2, iclass 21, count 0 2006.229.17:04:48.90#ibcon#flushed, iclass 21, count 0 2006.229.17:04:48.90#ibcon#about to write, iclass 21, count 0 2006.229.17:04:48.90#ibcon#wrote, iclass 21, count 0 2006.229.17:04:48.90#ibcon#about to read 3, iclass 21, count 0 2006.229.17:04:48.94#ibcon#read 3, iclass 21, count 0 2006.229.17:04:48.94#ibcon#about to read 4, iclass 21, count 0 2006.229.17:04:48.94#ibcon#read 4, iclass 21, count 0 2006.229.17:04:48.94#ibcon#about to read 5, iclass 21, count 0 2006.229.17:04:48.94#ibcon#read 5, iclass 21, count 0 2006.229.17:04:48.94#ibcon#about to read 6, iclass 21, count 0 2006.229.17:04:48.94#ibcon#read 6, iclass 21, count 0 2006.229.17:04:48.94#ibcon#end of sib2, iclass 21, count 0 2006.229.17:04:48.94#ibcon#*after write, iclass 21, count 0 2006.229.17:04:48.94#ibcon#*before return 0, iclass 21, count 0 2006.229.17:04:48.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:48.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:04:48.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:04:48.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:04:48.94$vck44/vb=4,4 2006.229.17:04:48.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.17:04:48.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.17:04:48.94#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:48.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:49.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:49.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:49.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.17:04:49.00#ibcon#first serial, iclass 23, count 2 2006.229.17:04:49.00#ibcon#enter sib2, iclass 23, count 2 2006.229.17:04:49.00#ibcon#flushed, iclass 23, count 2 2006.229.17:04:49.00#ibcon#about to write, iclass 23, count 2 2006.229.17:04:49.00#ibcon#wrote, iclass 23, count 2 2006.229.17:04:49.00#ibcon#about to read 3, iclass 23, count 2 2006.229.17:04:49.02#ibcon#read 3, iclass 23, count 2 2006.229.17:04:49.02#ibcon#about to read 4, iclass 23, count 2 2006.229.17:04:49.02#ibcon#read 4, iclass 23, count 2 2006.229.17:04:49.02#ibcon#about to read 5, iclass 23, count 2 2006.229.17:04:49.02#ibcon#read 5, iclass 23, count 2 2006.229.17:04:49.02#ibcon#about to read 6, iclass 23, count 2 2006.229.17:04:49.02#ibcon#read 6, iclass 23, count 2 2006.229.17:04:49.02#ibcon#end of sib2, iclass 23, count 2 2006.229.17:04:49.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.17:04:49.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.17:04:49.02#ibcon#[27=AT04-04\r\n] 2006.229.17:04:49.02#ibcon#*before write, iclass 23, count 2 2006.229.17:04:49.02#ibcon#enter sib2, iclass 23, count 2 2006.229.17:04:49.02#ibcon#flushed, iclass 23, count 2 2006.229.17:04:49.02#ibcon#about to write, iclass 23, count 2 2006.229.17:04:49.02#ibcon#wrote, iclass 23, count 2 2006.229.17:04:49.02#ibcon#about to read 3, iclass 23, count 2 2006.229.17:04:49.05#ibcon#read 3, iclass 23, count 2 2006.229.17:04:49.05#ibcon#about to read 4, iclass 23, count 2 2006.229.17:04:49.05#ibcon#read 4, iclass 23, count 2 2006.229.17:04:49.05#ibcon#about to read 5, iclass 23, count 2 2006.229.17:04:49.05#ibcon#read 5, iclass 23, count 2 2006.229.17:04:49.05#ibcon#about to read 6, iclass 23, count 2 2006.229.17:04:49.05#ibcon#read 6, iclass 23, count 2 2006.229.17:04:49.05#ibcon#end of sib2, iclass 23, count 2 2006.229.17:04:49.05#ibcon#*after write, iclass 23, count 2 2006.229.17:04:49.05#ibcon#*before return 0, iclass 23, count 2 2006.229.17:04:49.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:49.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:04:49.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.17:04:49.05#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:49.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:49.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:49.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:49.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:04:49.17#ibcon#first serial, iclass 23, count 0 2006.229.17:04:49.17#ibcon#enter sib2, iclass 23, count 0 2006.229.17:04:49.17#ibcon#flushed, iclass 23, count 0 2006.229.17:04:49.17#ibcon#about to write, iclass 23, count 0 2006.229.17:04:49.17#ibcon#wrote, iclass 23, count 0 2006.229.17:04:49.17#ibcon#about to read 3, iclass 23, count 0 2006.229.17:04:49.19#ibcon#read 3, iclass 23, count 0 2006.229.17:04:49.19#ibcon#about to read 4, iclass 23, count 0 2006.229.17:04:49.19#ibcon#read 4, iclass 23, count 0 2006.229.17:04:49.19#ibcon#about to read 5, iclass 23, count 0 2006.229.17:04:49.19#ibcon#read 5, iclass 23, count 0 2006.229.17:04:49.19#ibcon#about to read 6, iclass 23, count 0 2006.229.17:04:49.19#ibcon#read 6, iclass 23, count 0 2006.229.17:04:49.19#ibcon#end of sib2, iclass 23, count 0 2006.229.17:04:49.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:04:49.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:04:49.19#ibcon#[27=USB\r\n] 2006.229.17:04:49.19#ibcon#*before write, iclass 23, count 0 2006.229.17:04:49.19#ibcon#enter sib2, iclass 23, count 0 2006.229.17:04:49.19#ibcon#flushed, iclass 23, count 0 2006.229.17:04:49.19#ibcon#about to write, iclass 23, count 0 2006.229.17:04:49.19#ibcon#wrote, iclass 23, count 0 2006.229.17:04:49.19#ibcon#about to read 3, iclass 23, count 0 2006.229.17:04:49.22#ibcon#read 3, iclass 23, count 0 2006.229.17:04:49.22#ibcon#about to read 4, iclass 23, count 0 2006.229.17:04:49.22#ibcon#read 4, iclass 23, count 0 2006.229.17:04:49.22#ibcon#about to read 5, iclass 23, count 0 2006.229.17:04:49.22#ibcon#read 5, iclass 23, count 0 2006.229.17:04:49.22#ibcon#about to read 6, iclass 23, count 0 2006.229.17:04:49.22#ibcon#read 6, iclass 23, count 0 2006.229.17:04:49.22#ibcon#end of sib2, iclass 23, count 0 2006.229.17:04:49.22#ibcon#*after write, iclass 23, count 0 2006.229.17:04:49.22#ibcon#*before return 0, iclass 23, count 0 2006.229.17:04:49.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:49.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:04:49.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:04:49.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:04:49.22$vck44/vblo=5,709.99 2006.229.17:04:49.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.17:04:49.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.17:04:49.22#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:49.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:49.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:49.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:49.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:04:49.22#ibcon#first serial, iclass 25, count 0 2006.229.17:04:49.22#ibcon#enter sib2, iclass 25, count 0 2006.229.17:04:49.22#ibcon#flushed, iclass 25, count 0 2006.229.17:04:49.22#ibcon#about to write, iclass 25, count 0 2006.229.17:04:49.22#ibcon#wrote, iclass 25, count 0 2006.229.17:04:49.22#ibcon#about to read 3, iclass 25, count 0 2006.229.17:04:49.24#ibcon#read 3, iclass 25, count 0 2006.229.17:04:49.24#ibcon#about to read 4, iclass 25, count 0 2006.229.17:04:49.24#ibcon#read 4, iclass 25, count 0 2006.229.17:04:49.24#ibcon#about to read 5, iclass 25, count 0 2006.229.17:04:49.24#ibcon#read 5, iclass 25, count 0 2006.229.17:04:49.24#ibcon#about to read 6, iclass 25, count 0 2006.229.17:04:49.24#ibcon#read 6, iclass 25, count 0 2006.229.17:04:49.24#ibcon#end of sib2, iclass 25, count 0 2006.229.17:04:49.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:04:49.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:04:49.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:04:49.24#ibcon#*before write, iclass 25, count 0 2006.229.17:04:49.24#ibcon#enter sib2, iclass 25, count 0 2006.229.17:04:49.24#ibcon#flushed, iclass 25, count 0 2006.229.17:04:49.24#ibcon#about to write, iclass 25, count 0 2006.229.17:04:49.24#ibcon#wrote, iclass 25, count 0 2006.229.17:04:49.24#ibcon#about to read 3, iclass 25, count 0 2006.229.17:04:49.28#ibcon#read 3, iclass 25, count 0 2006.229.17:04:49.28#ibcon#about to read 4, iclass 25, count 0 2006.229.17:04:49.28#ibcon#read 4, iclass 25, count 0 2006.229.17:04:49.28#ibcon#about to read 5, iclass 25, count 0 2006.229.17:04:49.28#ibcon#read 5, iclass 25, count 0 2006.229.17:04:49.28#ibcon#about to read 6, iclass 25, count 0 2006.229.17:04:49.28#ibcon#read 6, iclass 25, count 0 2006.229.17:04:49.28#ibcon#end of sib2, iclass 25, count 0 2006.229.17:04:49.28#ibcon#*after write, iclass 25, count 0 2006.229.17:04:49.28#ibcon#*before return 0, iclass 25, count 0 2006.229.17:04:49.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:49.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:04:49.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:04:49.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:04:49.28$vck44/vb=5,4 2006.229.17:04:49.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.17:04:49.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.17:04:49.28#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:49.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:49.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:49.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:49.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.17:04:49.34#ibcon#first serial, iclass 27, count 2 2006.229.17:04:49.34#ibcon#enter sib2, iclass 27, count 2 2006.229.17:04:49.34#ibcon#flushed, iclass 27, count 2 2006.229.17:04:49.34#ibcon#about to write, iclass 27, count 2 2006.229.17:04:49.34#ibcon#wrote, iclass 27, count 2 2006.229.17:04:49.34#ibcon#about to read 3, iclass 27, count 2 2006.229.17:04:49.36#ibcon#read 3, iclass 27, count 2 2006.229.17:04:49.36#ibcon#about to read 4, iclass 27, count 2 2006.229.17:04:49.36#ibcon#read 4, iclass 27, count 2 2006.229.17:04:49.36#ibcon#about to read 5, iclass 27, count 2 2006.229.17:04:49.36#ibcon#read 5, iclass 27, count 2 2006.229.17:04:49.36#ibcon#about to read 6, iclass 27, count 2 2006.229.17:04:49.36#ibcon#read 6, iclass 27, count 2 2006.229.17:04:49.36#ibcon#end of sib2, iclass 27, count 2 2006.229.17:04:49.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.17:04:49.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.17:04:49.36#ibcon#[27=AT05-04\r\n] 2006.229.17:04:49.36#ibcon#*before write, iclass 27, count 2 2006.229.17:04:49.36#ibcon#enter sib2, iclass 27, count 2 2006.229.17:04:49.36#ibcon#flushed, iclass 27, count 2 2006.229.17:04:49.36#ibcon#about to write, iclass 27, count 2 2006.229.17:04:49.36#ibcon#wrote, iclass 27, count 2 2006.229.17:04:49.36#ibcon#about to read 3, iclass 27, count 2 2006.229.17:04:49.39#ibcon#read 3, iclass 27, count 2 2006.229.17:04:49.39#ibcon#about to read 4, iclass 27, count 2 2006.229.17:04:49.39#ibcon#read 4, iclass 27, count 2 2006.229.17:04:49.39#ibcon#about to read 5, iclass 27, count 2 2006.229.17:04:49.39#ibcon#read 5, iclass 27, count 2 2006.229.17:04:49.39#ibcon#about to read 6, iclass 27, count 2 2006.229.17:04:49.39#ibcon#read 6, iclass 27, count 2 2006.229.17:04:49.39#ibcon#end of sib2, iclass 27, count 2 2006.229.17:04:49.39#ibcon#*after write, iclass 27, count 2 2006.229.17:04:49.39#ibcon#*before return 0, iclass 27, count 2 2006.229.17:04:49.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:49.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:04:49.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.17:04:49.39#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:49.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:49.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:49.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:49.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:04:49.51#ibcon#first serial, iclass 27, count 0 2006.229.17:04:49.51#ibcon#enter sib2, iclass 27, count 0 2006.229.17:04:49.51#ibcon#flushed, iclass 27, count 0 2006.229.17:04:49.51#ibcon#about to write, iclass 27, count 0 2006.229.17:04:49.51#ibcon#wrote, iclass 27, count 0 2006.229.17:04:49.51#ibcon#about to read 3, iclass 27, count 0 2006.229.17:04:49.53#ibcon#read 3, iclass 27, count 0 2006.229.17:04:49.53#ibcon#about to read 4, iclass 27, count 0 2006.229.17:04:49.53#ibcon#read 4, iclass 27, count 0 2006.229.17:04:49.53#ibcon#about to read 5, iclass 27, count 0 2006.229.17:04:49.53#ibcon#read 5, iclass 27, count 0 2006.229.17:04:49.53#ibcon#about to read 6, iclass 27, count 0 2006.229.17:04:49.53#ibcon#read 6, iclass 27, count 0 2006.229.17:04:49.53#ibcon#end of sib2, iclass 27, count 0 2006.229.17:04:49.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:04:49.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:04:49.53#ibcon#[27=USB\r\n] 2006.229.17:04:49.53#ibcon#*before write, iclass 27, count 0 2006.229.17:04:49.53#ibcon#enter sib2, iclass 27, count 0 2006.229.17:04:49.53#ibcon#flushed, iclass 27, count 0 2006.229.17:04:49.53#ibcon#about to write, iclass 27, count 0 2006.229.17:04:49.53#ibcon#wrote, iclass 27, count 0 2006.229.17:04:49.53#ibcon#about to read 3, iclass 27, count 0 2006.229.17:04:49.56#ibcon#read 3, iclass 27, count 0 2006.229.17:04:49.56#ibcon#about to read 4, iclass 27, count 0 2006.229.17:04:49.56#ibcon#read 4, iclass 27, count 0 2006.229.17:04:49.56#ibcon#about to read 5, iclass 27, count 0 2006.229.17:04:49.56#ibcon#read 5, iclass 27, count 0 2006.229.17:04:49.56#ibcon#about to read 6, iclass 27, count 0 2006.229.17:04:49.56#ibcon#read 6, iclass 27, count 0 2006.229.17:04:49.56#ibcon#end of sib2, iclass 27, count 0 2006.229.17:04:49.56#ibcon#*after write, iclass 27, count 0 2006.229.17:04:49.56#ibcon#*before return 0, iclass 27, count 0 2006.229.17:04:49.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:49.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:04:49.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:04:49.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:04:49.56$vck44/vblo=6,719.99 2006.229.17:04:49.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:04:49.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:04:49.56#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:49.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:49.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:49.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:49.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:04:49.56#ibcon#first serial, iclass 29, count 0 2006.229.17:04:49.56#ibcon#enter sib2, iclass 29, count 0 2006.229.17:04:49.56#ibcon#flushed, iclass 29, count 0 2006.229.17:04:49.56#ibcon#about to write, iclass 29, count 0 2006.229.17:04:49.56#ibcon#wrote, iclass 29, count 0 2006.229.17:04:49.56#ibcon#about to read 3, iclass 29, count 0 2006.229.17:04:49.58#ibcon#read 3, iclass 29, count 0 2006.229.17:04:49.58#ibcon#about to read 4, iclass 29, count 0 2006.229.17:04:49.58#ibcon#read 4, iclass 29, count 0 2006.229.17:04:49.58#ibcon#about to read 5, iclass 29, count 0 2006.229.17:04:49.58#ibcon#read 5, iclass 29, count 0 2006.229.17:04:49.58#ibcon#about to read 6, iclass 29, count 0 2006.229.17:04:49.58#ibcon#read 6, iclass 29, count 0 2006.229.17:04:49.58#ibcon#end of sib2, iclass 29, count 0 2006.229.17:04:49.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:04:49.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:04:49.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:04:49.58#ibcon#*before write, iclass 29, count 0 2006.229.17:04:49.58#ibcon#enter sib2, iclass 29, count 0 2006.229.17:04:49.58#ibcon#flushed, iclass 29, count 0 2006.229.17:04:49.58#ibcon#about to write, iclass 29, count 0 2006.229.17:04:49.58#ibcon#wrote, iclass 29, count 0 2006.229.17:04:49.58#ibcon#about to read 3, iclass 29, count 0 2006.229.17:04:49.62#ibcon#read 3, iclass 29, count 0 2006.229.17:04:49.62#ibcon#about to read 4, iclass 29, count 0 2006.229.17:04:49.62#ibcon#read 4, iclass 29, count 0 2006.229.17:04:49.62#ibcon#about to read 5, iclass 29, count 0 2006.229.17:04:49.62#ibcon#read 5, iclass 29, count 0 2006.229.17:04:49.62#ibcon#about to read 6, iclass 29, count 0 2006.229.17:04:49.62#ibcon#read 6, iclass 29, count 0 2006.229.17:04:49.62#ibcon#end of sib2, iclass 29, count 0 2006.229.17:04:49.62#ibcon#*after write, iclass 29, count 0 2006.229.17:04:49.62#ibcon#*before return 0, iclass 29, count 0 2006.229.17:04:49.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:49.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:04:49.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:04:49.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:04:49.62$vck44/vb=6,4 2006.229.17:04:49.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.17:04:49.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.17:04:49.62#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:49.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:49.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:49.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:49.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.17:04:49.68#ibcon#first serial, iclass 31, count 2 2006.229.17:04:49.68#ibcon#enter sib2, iclass 31, count 2 2006.229.17:04:49.68#ibcon#flushed, iclass 31, count 2 2006.229.17:04:49.68#ibcon#about to write, iclass 31, count 2 2006.229.17:04:49.68#ibcon#wrote, iclass 31, count 2 2006.229.17:04:49.68#ibcon#about to read 3, iclass 31, count 2 2006.229.17:04:49.70#ibcon#read 3, iclass 31, count 2 2006.229.17:04:49.70#ibcon#about to read 4, iclass 31, count 2 2006.229.17:04:49.70#ibcon#read 4, iclass 31, count 2 2006.229.17:04:49.70#ibcon#about to read 5, iclass 31, count 2 2006.229.17:04:49.70#ibcon#read 5, iclass 31, count 2 2006.229.17:04:49.70#ibcon#about to read 6, iclass 31, count 2 2006.229.17:04:49.70#ibcon#read 6, iclass 31, count 2 2006.229.17:04:49.70#ibcon#end of sib2, iclass 31, count 2 2006.229.17:04:49.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.17:04:49.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.17:04:49.70#ibcon#[27=AT06-04\r\n] 2006.229.17:04:49.70#ibcon#*before write, iclass 31, count 2 2006.229.17:04:49.70#ibcon#enter sib2, iclass 31, count 2 2006.229.17:04:49.70#ibcon#flushed, iclass 31, count 2 2006.229.17:04:49.70#ibcon#about to write, iclass 31, count 2 2006.229.17:04:49.70#ibcon#wrote, iclass 31, count 2 2006.229.17:04:49.70#ibcon#about to read 3, iclass 31, count 2 2006.229.17:04:49.73#ibcon#read 3, iclass 31, count 2 2006.229.17:04:49.73#ibcon#about to read 4, iclass 31, count 2 2006.229.17:04:49.73#ibcon#read 4, iclass 31, count 2 2006.229.17:04:49.73#ibcon#about to read 5, iclass 31, count 2 2006.229.17:04:49.73#ibcon#read 5, iclass 31, count 2 2006.229.17:04:49.73#ibcon#about to read 6, iclass 31, count 2 2006.229.17:04:49.73#ibcon#read 6, iclass 31, count 2 2006.229.17:04:49.73#ibcon#end of sib2, iclass 31, count 2 2006.229.17:04:49.73#ibcon#*after write, iclass 31, count 2 2006.229.17:04:49.73#ibcon#*before return 0, iclass 31, count 2 2006.229.17:04:49.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:49.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:04:49.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.17:04:49.73#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:49.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:49.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:49.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:49.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:04:49.85#ibcon#first serial, iclass 31, count 0 2006.229.17:04:49.85#ibcon#enter sib2, iclass 31, count 0 2006.229.17:04:49.85#ibcon#flushed, iclass 31, count 0 2006.229.17:04:49.85#ibcon#about to write, iclass 31, count 0 2006.229.17:04:49.85#ibcon#wrote, iclass 31, count 0 2006.229.17:04:49.85#ibcon#about to read 3, iclass 31, count 0 2006.229.17:04:49.87#ibcon#read 3, iclass 31, count 0 2006.229.17:04:49.87#ibcon#about to read 4, iclass 31, count 0 2006.229.17:04:49.87#ibcon#read 4, iclass 31, count 0 2006.229.17:04:49.87#ibcon#about to read 5, iclass 31, count 0 2006.229.17:04:49.87#ibcon#read 5, iclass 31, count 0 2006.229.17:04:49.87#ibcon#about to read 6, iclass 31, count 0 2006.229.17:04:49.87#ibcon#read 6, iclass 31, count 0 2006.229.17:04:49.87#ibcon#end of sib2, iclass 31, count 0 2006.229.17:04:49.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:04:49.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:04:49.87#ibcon#[27=USB\r\n] 2006.229.17:04:49.87#ibcon#*before write, iclass 31, count 0 2006.229.17:04:49.87#ibcon#enter sib2, iclass 31, count 0 2006.229.17:04:49.87#ibcon#flushed, iclass 31, count 0 2006.229.17:04:49.87#ibcon#about to write, iclass 31, count 0 2006.229.17:04:49.87#ibcon#wrote, iclass 31, count 0 2006.229.17:04:49.87#ibcon#about to read 3, iclass 31, count 0 2006.229.17:04:49.90#ibcon#read 3, iclass 31, count 0 2006.229.17:04:49.90#ibcon#about to read 4, iclass 31, count 0 2006.229.17:04:49.90#ibcon#read 4, iclass 31, count 0 2006.229.17:04:49.90#ibcon#about to read 5, iclass 31, count 0 2006.229.17:04:49.90#ibcon#read 5, iclass 31, count 0 2006.229.17:04:49.90#ibcon#about to read 6, iclass 31, count 0 2006.229.17:04:49.90#ibcon#read 6, iclass 31, count 0 2006.229.17:04:49.90#ibcon#end of sib2, iclass 31, count 0 2006.229.17:04:49.90#ibcon#*after write, iclass 31, count 0 2006.229.17:04:49.90#ibcon#*before return 0, iclass 31, count 0 2006.229.17:04:49.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:49.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:04:49.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:04:49.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:04:49.90$vck44/vblo=7,734.99 2006.229.17:04:49.90#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.17:04:49.90#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.17:04:49.90#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:49.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:49.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:49.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:49.90#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:04:49.90#ibcon#first serial, iclass 33, count 0 2006.229.17:04:49.90#ibcon#enter sib2, iclass 33, count 0 2006.229.17:04:49.90#ibcon#flushed, iclass 33, count 0 2006.229.17:04:49.90#ibcon#about to write, iclass 33, count 0 2006.229.17:04:49.90#ibcon#wrote, iclass 33, count 0 2006.229.17:04:49.90#ibcon#about to read 3, iclass 33, count 0 2006.229.17:04:49.92#ibcon#read 3, iclass 33, count 0 2006.229.17:04:49.92#ibcon#about to read 4, iclass 33, count 0 2006.229.17:04:49.92#ibcon#read 4, iclass 33, count 0 2006.229.17:04:49.92#ibcon#about to read 5, iclass 33, count 0 2006.229.17:04:49.92#ibcon#read 5, iclass 33, count 0 2006.229.17:04:49.92#ibcon#about to read 6, iclass 33, count 0 2006.229.17:04:49.92#ibcon#read 6, iclass 33, count 0 2006.229.17:04:49.92#ibcon#end of sib2, iclass 33, count 0 2006.229.17:04:49.92#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:04:49.92#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:04:49.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:04:49.92#ibcon#*before write, iclass 33, count 0 2006.229.17:04:49.92#ibcon#enter sib2, iclass 33, count 0 2006.229.17:04:49.92#ibcon#flushed, iclass 33, count 0 2006.229.17:04:49.92#ibcon#about to write, iclass 33, count 0 2006.229.17:04:49.92#ibcon#wrote, iclass 33, count 0 2006.229.17:04:49.92#ibcon#about to read 3, iclass 33, count 0 2006.229.17:04:49.96#ibcon#read 3, iclass 33, count 0 2006.229.17:04:49.96#ibcon#about to read 4, iclass 33, count 0 2006.229.17:04:49.96#ibcon#read 4, iclass 33, count 0 2006.229.17:04:49.96#ibcon#about to read 5, iclass 33, count 0 2006.229.17:04:49.96#ibcon#read 5, iclass 33, count 0 2006.229.17:04:49.96#ibcon#about to read 6, iclass 33, count 0 2006.229.17:04:49.96#ibcon#read 6, iclass 33, count 0 2006.229.17:04:49.96#ibcon#end of sib2, iclass 33, count 0 2006.229.17:04:49.96#ibcon#*after write, iclass 33, count 0 2006.229.17:04:49.96#ibcon#*before return 0, iclass 33, count 0 2006.229.17:04:49.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:49.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:04:49.96#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:04:49.96#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:04:49.96$vck44/vb=7,4 2006.229.17:04:49.96#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.17:04:49.96#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.17:04:49.96#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:49.96#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:50.02#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:50.02#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:50.02#ibcon#enter wrdev, iclass 35, count 2 2006.229.17:04:50.02#ibcon#first serial, iclass 35, count 2 2006.229.17:04:50.02#ibcon#enter sib2, iclass 35, count 2 2006.229.17:04:50.02#ibcon#flushed, iclass 35, count 2 2006.229.17:04:50.02#ibcon#about to write, iclass 35, count 2 2006.229.17:04:50.02#ibcon#wrote, iclass 35, count 2 2006.229.17:04:50.02#ibcon#about to read 3, iclass 35, count 2 2006.229.17:04:50.04#ibcon#read 3, iclass 35, count 2 2006.229.17:04:50.04#ibcon#about to read 4, iclass 35, count 2 2006.229.17:04:50.04#ibcon#read 4, iclass 35, count 2 2006.229.17:04:50.04#ibcon#about to read 5, iclass 35, count 2 2006.229.17:04:50.04#ibcon#read 5, iclass 35, count 2 2006.229.17:04:50.04#ibcon#about to read 6, iclass 35, count 2 2006.229.17:04:50.04#ibcon#read 6, iclass 35, count 2 2006.229.17:04:50.04#ibcon#end of sib2, iclass 35, count 2 2006.229.17:04:50.04#ibcon#*mode == 0, iclass 35, count 2 2006.229.17:04:50.04#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.17:04:50.04#ibcon#[27=AT07-04\r\n] 2006.229.17:04:50.04#ibcon#*before write, iclass 35, count 2 2006.229.17:04:50.04#ibcon#enter sib2, iclass 35, count 2 2006.229.17:04:50.04#ibcon#flushed, iclass 35, count 2 2006.229.17:04:50.04#ibcon#about to write, iclass 35, count 2 2006.229.17:04:50.04#ibcon#wrote, iclass 35, count 2 2006.229.17:04:50.04#ibcon#about to read 3, iclass 35, count 2 2006.229.17:04:50.07#ibcon#read 3, iclass 35, count 2 2006.229.17:04:50.07#ibcon#about to read 4, iclass 35, count 2 2006.229.17:04:50.07#ibcon#read 4, iclass 35, count 2 2006.229.17:04:50.07#ibcon#about to read 5, iclass 35, count 2 2006.229.17:04:50.07#ibcon#read 5, iclass 35, count 2 2006.229.17:04:50.07#ibcon#about to read 6, iclass 35, count 2 2006.229.17:04:50.07#ibcon#read 6, iclass 35, count 2 2006.229.17:04:50.07#ibcon#end of sib2, iclass 35, count 2 2006.229.17:04:50.07#ibcon#*after write, iclass 35, count 2 2006.229.17:04:50.07#ibcon#*before return 0, iclass 35, count 2 2006.229.17:04:50.07#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:50.07#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:04:50.07#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.17:04:50.07#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:50.07#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:50.19#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:50.19#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:50.19#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:04:50.19#ibcon#first serial, iclass 35, count 0 2006.229.17:04:50.19#ibcon#enter sib2, iclass 35, count 0 2006.229.17:04:50.19#ibcon#flushed, iclass 35, count 0 2006.229.17:04:50.19#ibcon#about to write, iclass 35, count 0 2006.229.17:04:50.19#ibcon#wrote, iclass 35, count 0 2006.229.17:04:50.19#ibcon#about to read 3, iclass 35, count 0 2006.229.17:04:50.21#ibcon#read 3, iclass 35, count 0 2006.229.17:04:50.21#ibcon#about to read 4, iclass 35, count 0 2006.229.17:04:50.21#ibcon#read 4, iclass 35, count 0 2006.229.17:04:50.21#ibcon#about to read 5, iclass 35, count 0 2006.229.17:04:50.21#ibcon#read 5, iclass 35, count 0 2006.229.17:04:50.21#ibcon#about to read 6, iclass 35, count 0 2006.229.17:04:50.21#ibcon#read 6, iclass 35, count 0 2006.229.17:04:50.21#ibcon#end of sib2, iclass 35, count 0 2006.229.17:04:50.21#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:04:50.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:04:50.21#ibcon#[27=USB\r\n] 2006.229.17:04:50.21#ibcon#*before write, iclass 35, count 0 2006.229.17:04:50.21#ibcon#enter sib2, iclass 35, count 0 2006.229.17:04:50.21#ibcon#flushed, iclass 35, count 0 2006.229.17:04:50.21#ibcon#about to write, iclass 35, count 0 2006.229.17:04:50.21#ibcon#wrote, iclass 35, count 0 2006.229.17:04:50.21#ibcon#about to read 3, iclass 35, count 0 2006.229.17:04:50.24#ibcon#read 3, iclass 35, count 0 2006.229.17:04:50.24#ibcon#about to read 4, iclass 35, count 0 2006.229.17:04:50.24#ibcon#read 4, iclass 35, count 0 2006.229.17:04:50.24#ibcon#about to read 5, iclass 35, count 0 2006.229.17:04:50.24#ibcon#read 5, iclass 35, count 0 2006.229.17:04:50.24#ibcon#about to read 6, iclass 35, count 0 2006.229.17:04:50.24#ibcon#read 6, iclass 35, count 0 2006.229.17:04:50.24#ibcon#end of sib2, iclass 35, count 0 2006.229.17:04:50.24#ibcon#*after write, iclass 35, count 0 2006.229.17:04:50.24#ibcon#*before return 0, iclass 35, count 0 2006.229.17:04:50.24#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:50.24#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:04:50.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:04:50.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:04:50.24$vck44/vblo=8,744.99 2006.229.17:04:50.24#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.17:04:50.24#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.17:04:50.24#ibcon#ireg 17 cls_cnt 0 2006.229.17:04:50.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:50.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:50.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:50.24#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:04:50.24#ibcon#first serial, iclass 37, count 0 2006.229.17:04:50.24#ibcon#enter sib2, iclass 37, count 0 2006.229.17:04:50.24#ibcon#flushed, iclass 37, count 0 2006.229.17:04:50.24#ibcon#about to write, iclass 37, count 0 2006.229.17:04:50.24#ibcon#wrote, iclass 37, count 0 2006.229.17:04:50.24#ibcon#about to read 3, iclass 37, count 0 2006.229.17:04:50.26#ibcon#read 3, iclass 37, count 0 2006.229.17:04:50.26#ibcon#about to read 4, iclass 37, count 0 2006.229.17:04:50.26#ibcon#read 4, iclass 37, count 0 2006.229.17:04:50.26#ibcon#about to read 5, iclass 37, count 0 2006.229.17:04:50.26#ibcon#read 5, iclass 37, count 0 2006.229.17:04:50.26#ibcon#about to read 6, iclass 37, count 0 2006.229.17:04:50.26#ibcon#read 6, iclass 37, count 0 2006.229.17:04:50.26#ibcon#end of sib2, iclass 37, count 0 2006.229.17:04:50.26#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:04:50.26#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:04:50.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:04:50.26#ibcon#*before write, iclass 37, count 0 2006.229.17:04:50.26#ibcon#enter sib2, iclass 37, count 0 2006.229.17:04:50.26#ibcon#flushed, iclass 37, count 0 2006.229.17:04:50.26#ibcon#about to write, iclass 37, count 0 2006.229.17:04:50.26#ibcon#wrote, iclass 37, count 0 2006.229.17:04:50.26#ibcon#about to read 3, iclass 37, count 0 2006.229.17:04:50.30#ibcon#read 3, iclass 37, count 0 2006.229.17:04:50.30#ibcon#about to read 4, iclass 37, count 0 2006.229.17:04:50.30#ibcon#read 4, iclass 37, count 0 2006.229.17:04:50.30#ibcon#about to read 5, iclass 37, count 0 2006.229.17:04:50.30#ibcon#read 5, iclass 37, count 0 2006.229.17:04:50.30#ibcon#about to read 6, iclass 37, count 0 2006.229.17:04:50.30#ibcon#read 6, iclass 37, count 0 2006.229.17:04:50.30#ibcon#end of sib2, iclass 37, count 0 2006.229.17:04:50.30#ibcon#*after write, iclass 37, count 0 2006.229.17:04:50.30#ibcon#*before return 0, iclass 37, count 0 2006.229.17:04:50.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:50.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:04:50.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:04:50.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:04:50.30$vck44/vb=8,4 2006.229.17:04:50.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.17:04:50.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.17:04:50.30#ibcon#ireg 11 cls_cnt 2 2006.229.17:04:50.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:50.36#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:50.36#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:50.36#ibcon#enter wrdev, iclass 39, count 2 2006.229.17:04:50.36#ibcon#first serial, iclass 39, count 2 2006.229.17:04:50.36#ibcon#enter sib2, iclass 39, count 2 2006.229.17:04:50.36#ibcon#flushed, iclass 39, count 2 2006.229.17:04:50.36#ibcon#about to write, iclass 39, count 2 2006.229.17:04:50.36#ibcon#wrote, iclass 39, count 2 2006.229.17:04:50.36#ibcon#about to read 3, iclass 39, count 2 2006.229.17:04:50.38#ibcon#read 3, iclass 39, count 2 2006.229.17:04:50.38#ibcon#about to read 4, iclass 39, count 2 2006.229.17:04:50.38#ibcon#read 4, iclass 39, count 2 2006.229.17:04:50.38#ibcon#about to read 5, iclass 39, count 2 2006.229.17:04:50.38#ibcon#read 5, iclass 39, count 2 2006.229.17:04:50.38#ibcon#about to read 6, iclass 39, count 2 2006.229.17:04:50.38#ibcon#read 6, iclass 39, count 2 2006.229.17:04:50.38#ibcon#end of sib2, iclass 39, count 2 2006.229.17:04:50.38#ibcon#*mode == 0, iclass 39, count 2 2006.229.17:04:50.38#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.17:04:50.38#ibcon#[27=AT08-04\r\n] 2006.229.17:04:50.38#ibcon#*before write, iclass 39, count 2 2006.229.17:04:50.38#ibcon#enter sib2, iclass 39, count 2 2006.229.17:04:50.38#ibcon#flushed, iclass 39, count 2 2006.229.17:04:50.38#ibcon#about to write, iclass 39, count 2 2006.229.17:04:50.38#ibcon#wrote, iclass 39, count 2 2006.229.17:04:50.38#ibcon#about to read 3, iclass 39, count 2 2006.229.17:04:50.41#ibcon#read 3, iclass 39, count 2 2006.229.17:04:50.41#ibcon#about to read 4, iclass 39, count 2 2006.229.17:04:50.41#ibcon#read 4, iclass 39, count 2 2006.229.17:04:50.41#ibcon#about to read 5, iclass 39, count 2 2006.229.17:04:50.41#ibcon#read 5, iclass 39, count 2 2006.229.17:04:50.41#ibcon#about to read 6, iclass 39, count 2 2006.229.17:04:50.41#ibcon#read 6, iclass 39, count 2 2006.229.17:04:50.41#ibcon#end of sib2, iclass 39, count 2 2006.229.17:04:50.41#ibcon#*after write, iclass 39, count 2 2006.229.17:04:50.41#ibcon#*before return 0, iclass 39, count 2 2006.229.17:04:50.41#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:50.41#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:04:50.41#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.17:04:50.41#ibcon#ireg 7 cls_cnt 0 2006.229.17:04:50.41#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:50.53#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:50.53#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:50.53#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:04:50.53#ibcon#first serial, iclass 39, count 0 2006.229.17:04:50.53#ibcon#enter sib2, iclass 39, count 0 2006.229.17:04:50.53#ibcon#flushed, iclass 39, count 0 2006.229.17:04:50.53#ibcon#about to write, iclass 39, count 0 2006.229.17:04:50.53#ibcon#wrote, iclass 39, count 0 2006.229.17:04:50.53#ibcon#about to read 3, iclass 39, count 0 2006.229.17:04:50.55#ibcon#read 3, iclass 39, count 0 2006.229.17:04:50.55#ibcon#about to read 4, iclass 39, count 0 2006.229.17:04:50.55#ibcon#read 4, iclass 39, count 0 2006.229.17:04:50.55#ibcon#about to read 5, iclass 39, count 0 2006.229.17:04:50.55#ibcon#read 5, iclass 39, count 0 2006.229.17:04:50.55#ibcon#about to read 6, iclass 39, count 0 2006.229.17:04:50.55#ibcon#read 6, iclass 39, count 0 2006.229.17:04:50.55#ibcon#end of sib2, iclass 39, count 0 2006.229.17:04:50.55#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:04:50.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:04:50.55#ibcon#[27=USB\r\n] 2006.229.17:04:50.55#ibcon#*before write, iclass 39, count 0 2006.229.17:04:50.55#ibcon#enter sib2, iclass 39, count 0 2006.229.17:04:50.55#ibcon#flushed, iclass 39, count 0 2006.229.17:04:50.55#ibcon#about to write, iclass 39, count 0 2006.229.17:04:50.55#ibcon#wrote, iclass 39, count 0 2006.229.17:04:50.55#ibcon#about to read 3, iclass 39, count 0 2006.229.17:04:50.58#ibcon#read 3, iclass 39, count 0 2006.229.17:04:50.58#ibcon#about to read 4, iclass 39, count 0 2006.229.17:04:50.58#ibcon#read 4, iclass 39, count 0 2006.229.17:04:50.58#ibcon#about to read 5, iclass 39, count 0 2006.229.17:04:50.58#ibcon#read 5, iclass 39, count 0 2006.229.17:04:50.58#ibcon#about to read 6, iclass 39, count 0 2006.229.17:04:50.58#ibcon#read 6, iclass 39, count 0 2006.229.17:04:50.58#ibcon#end of sib2, iclass 39, count 0 2006.229.17:04:50.58#ibcon#*after write, iclass 39, count 0 2006.229.17:04:50.58#ibcon#*before return 0, iclass 39, count 0 2006.229.17:04:50.58#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:50.58#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:04:50.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:04:50.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:04:50.58$vck44/vabw=wide 2006.229.17:04:50.58#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:04:50.58#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:04:50.58#ibcon#ireg 8 cls_cnt 0 2006.229.17:04:50.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:50.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:50.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:50.58#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:04:50.58#ibcon#first serial, iclass 3, count 0 2006.229.17:04:50.58#ibcon#enter sib2, iclass 3, count 0 2006.229.17:04:50.58#ibcon#flushed, iclass 3, count 0 2006.229.17:04:50.58#ibcon#about to write, iclass 3, count 0 2006.229.17:04:50.58#ibcon#wrote, iclass 3, count 0 2006.229.17:04:50.58#ibcon#about to read 3, iclass 3, count 0 2006.229.17:04:50.60#ibcon#read 3, iclass 3, count 0 2006.229.17:04:50.60#ibcon#about to read 4, iclass 3, count 0 2006.229.17:04:50.60#ibcon#read 4, iclass 3, count 0 2006.229.17:04:50.60#ibcon#about to read 5, iclass 3, count 0 2006.229.17:04:50.60#ibcon#read 5, iclass 3, count 0 2006.229.17:04:50.60#ibcon#about to read 6, iclass 3, count 0 2006.229.17:04:50.60#ibcon#read 6, iclass 3, count 0 2006.229.17:04:50.60#ibcon#end of sib2, iclass 3, count 0 2006.229.17:04:50.60#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:04:50.60#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:04:50.60#ibcon#[25=BW32\r\n] 2006.229.17:04:50.60#ibcon#*before write, iclass 3, count 0 2006.229.17:04:50.60#ibcon#enter sib2, iclass 3, count 0 2006.229.17:04:50.60#ibcon#flushed, iclass 3, count 0 2006.229.17:04:50.60#ibcon#about to write, iclass 3, count 0 2006.229.17:04:50.60#ibcon#wrote, iclass 3, count 0 2006.229.17:04:50.60#ibcon#about to read 3, iclass 3, count 0 2006.229.17:04:50.63#ibcon#read 3, iclass 3, count 0 2006.229.17:04:50.63#ibcon#about to read 4, iclass 3, count 0 2006.229.17:04:50.63#ibcon#read 4, iclass 3, count 0 2006.229.17:04:50.63#ibcon#about to read 5, iclass 3, count 0 2006.229.17:04:50.63#ibcon#read 5, iclass 3, count 0 2006.229.17:04:50.63#ibcon#about to read 6, iclass 3, count 0 2006.229.17:04:50.63#ibcon#read 6, iclass 3, count 0 2006.229.17:04:50.63#ibcon#end of sib2, iclass 3, count 0 2006.229.17:04:50.63#ibcon#*after write, iclass 3, count 0 2006.229.17:04:50.63#ibcon#*before return 0, iclass 3, count 0 2006.229.17:04:50.63#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:50.63#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:04:50.63#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:04:50.63#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:04:50.63$vck44/vbbw=wide 2006.229.17:04:50.63#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.17:04:50.63#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.17:04:50.63#ibcon#ireg 8 cls_cnt 0 2006.229.17:04:50.63#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:04:50.70#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:04:50.70#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:04:50.70#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:04:50.70#ibcon#first serial, iclass 5, count 0 2006.229.17:04:50.70#ibcon#enter sib2, iclass 5, count 0 2006.229.17:04:50.70#ibcon#flushed, iclass 5, count 0 2006.229.17:04:50.70#ibcon#about to write, iclass 5, count 0 2006.229.17:04:50.70#ibcon#wrote, iclass 5, count 0 2006.229.17:04:50.70#ibcon#about to read 3, iclass 5, count 0 2006.229.17:04:50.72#ibcon#read 3, iclass 5, count 0 2006.229.17:04:50.72#ibcon#about to read 4, iclass 5, count 0 2006.229.17:04:50.72#ibcon#read 4, iclass 5, count 0 2006.229.17:04:50.72#ibcon#about to read 5, iclass 5, count 0 2006.229.17:04:50.72#ibcon#read 5, iclass 5, count 0 2006.229.17:04:50.72#ibcon#about to read 6, iclass 5, count 0 2006.229.17:04:50.72#ibcon#read 6, iclass 5, count 0 2006.229.17:04:50.72#ibcon#end of sib2, iclass 5, count 0 2006.229.17:04:50.72#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:04:50.72#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:04:50.72#ibcon#[27=BW32\r\n] 2006.229.17:04:50.72#ibcon#*before write, iclass 5, count 0 2006.229.17:04:50.72#ibcon#enter sib2, iclass 5, count 0 2006.229.17:04:50.72#ibcon#flushed, iclass 5, count 0 2006.229.17:04:50.72#ibcon#about to write, iclass 5, count 0 2006.229.17:04:50.72#ibcon#wrote, iclass 5, count 0 2006.229.17:04:50.72#ibcon#about to read 3, iclass 5, count 0 2006.229.17:04:50.75#ibcon#read 3, iclass 5, count 0 2006.229.17:04:50.75#ibcon#about to read 4, iclass 5, count 0 2006.229.17:04:50.75#ibcon#read 4, iclass 5, count 0 2006.229.17:04:50.75#ibcon#about to read 5, iclass 5, count 0 2006.229.17:04:50.75#ibcon#read 5, iclass 5, count 0 2006.229.17:04:50.75#ibcon#about to read 6, iclass 5, count 0 2006.229.17:04:50.75#ibcon#read 6, iclass 5, count 0 2006.229.17:04:50.75#ibcon#end of sib2, iclass 5, count 0 2006.229.17:04:50.75#ibcon#*after write, iclass 5, count 0 2006.229.17:04:50.75#ibcon#*before return 0, iclass 5, count 0 2006.229.17:04:50.75#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:04:50.75#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:04:50.75#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:04:50.75#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:04:50.75$setupk4/ifdk4 2006.229.17:04:50.75$ifdk4/lo= 2006.229.17:04:50.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:04:50.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:04:50.75$ifdk4/patch= 2006.229.17:04:50.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:04:50.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:04:50.75$setupk4/!*+20s 2006.229.17:04:52.43#abcon#<5=/07 0.9 1.8 26.971001001.8\r\n> 2006.229.17:04:52.45#abcon#{5=INTERFACE CLEAR} 2006.229.17:04:52.51#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:04:58.14#trakl#Source acquired 2006.229.17:04:59.14#flagr#flagr/antenna,acquired 2006.229.17:05:02.60#abcon#<5=/07 0.9 1.8 26.971001001.8\r\n> 2006.229.17:05:02.62#abcon#{5=INTERFACE CLEAR} 2006.229.17:05:02.68#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:05:05.26$setupk4/"tpicd 2006.229.17:05:05.26$setupk4/echo=off 2006.229.17:05:05.26$setupk4/xlog=off 2006.229.17:05:05.26:!2006.229.17:07:01 2006.229.17:07:01.00:preob 2006.229.17:07:01.14/onsource/TRACKING 2006.229.17:07:01.14:!2006.229.17:07:11 2006.229.17:07:11.00:"tape 2006.229.17:07:11.00:"st=record 2006.229.17:07:11.00:data_valid=on 2006.229.17:07:11.00:midob 2006.229.17:07:11.13/onsource/TRACKING 2006.229.17:07:11.13/wx/26.98,1001.8,100 2006.229.17:07:11.34/cable/+6.4153E-03 2006.229.17:07:12.43/va/01,08,usb,yes,31,33 2006.229.17:07:12.43/va/02,07,usb,yes,33,34 2006.229.17:07:12.43/va/03,06,usb,yes,41,44 2006.229.17:07:12.43/va/04,07,usb,yes,35,36 2006.229.17:07:12.43/va/05,04,usb,yes,31,31 2006.229.17:07:12.43/va/06,04,usb,yes,35,34 2006.229.17:07:12.43/va/07,05,usb,yes,31,31 2006.229.17:07:12.43/va/08,06,usb,yes,22,28 2006.229.17:07:12.66/valo/01,524.99,yes,locked 2006.229.17:07:12.66/valo/02,534.99,yes,locked 2006.229.17:07:12.66/valo/03,564.99,yes,locked 2006.229.17:07:12.66/valo/04,624.99,yes,locked 2006.229.17:07:12.66/valo/05,734.99,yes,locked 2006.229.17:07:12.66/valo/06,814.99,yes,locked 2006.229.17:07:12.66/valo/07,864.99,yes,locked 2006.229.17:07:12.66/valo/08,884.99,yes,locked 2006.229.17:07:13.75/vb/01,04,usb,yes,31,29 2006.229.17:07:13.75/vb/02,04,usb,yes,33,33 2006.229.17:07:13.75/vb/03,04,usb,yes,30,33 2006.229.17:07:13.75/vb/04,04,usb,yes,34,33 2006.229.17:07:13.75/vb/05,04,usb,yes,27,29 2006.229.17:07:13.75/vb/06,04,usb,yes,31,27 2006.229.17:07:13.75/vb/07,04,usb,yes,31,31 2006.229.17:07:13.75/vb/08,04,usb,yes,29,32 2006.229.17:07:13.98/vblo/01,629.99,yes,locked 2006.229.17:07:13.98/vblo/02,634.99,yes,locked 2006.229.17:07:13.98/vblo/03,649.99,yes,locked 2006.229.17:07:13.98/vblo/04,679.99,yes,locked 2006.229.17:07:13.98/vblo/05,709.99,yes,locked 2006.229.17:07:13.98/vblo/06,719.99,yes,locked 2006.229.17:07:13.98/vblo/07,734.99,yes,locked 2006.229.17:07:13.98/vblo/08,744.99,yes,locked 2006.229.17:07:14.13/vabw/8 2006.229.17:07:14.28/vbbw/8 2006.229.17:07:14.37/xfe/off,on,12.2 2006.229.17:07:14.75/ifatt/23,28,28,28 2006.229.17:07:15.08/fmout-gps/S +4.47E-07 2006.229.17:07:15.12:!2006.229.17:08:31 2006.229.17:08:31.00:data_valid=off 2006.229.17:08:31.00:"et 2006.229.17:08:31.00:!+3s 2006.229.17:08:34.01:"tape 2006.229.17:08:34.01:postob 2006.229.17:08:34.07/cable/+6.4159E-03 2006.229.17:08:34.07/wx/26.98,1001.8,100 2006.229.17:08:35.08/fmout-gps/S +4.48E-07 2006.229.17:08:35.08:scan_name=229-1712,jd0608,50 2006.229.17:08:35.08:source=3c345,164258.81,394837.0,2000.0,cw 2006.229.17:08:36.13#flagr#flagr/antenna,new-source 2006.229.17:08:36.14:checkk5 2006.229.17:08:36.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:08:36.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:08:37.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:08:37.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:08:38.13/chk_obsdata//k5ts1/T2291707??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.17:08:38.53/chk_obsdata//k5ts2/T2291707??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.17:08:38.94/chk_obsdata//k5ts3/T2291707??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.17:08:39.34/chk_obsdata//k5ts4/T2291707??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.17:08:40.05/k5log//k5ts1_log_newline 2006.229.17:08:40.76/k5log//k5ts2_log_newline 2006.229.17:08:41.47/k5log//k5ts3_log_newline 2006.229.17:08:42.17/k5log//k5ts4_log_newline 2006.229.17:08:42.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:08:42.19:setupk4=1 2006.229.17:08:42.19$setupk4/echo=on 2006.229.17:08:42.19$setupk4/pcalon 2006.229.17:08:42.19$pcalon/"no phase cal control is implemented here 2006.229.17:08:42.19$setupk4/"tpicd=stop 2006.229.17:08:42.19$setupk4/"rec=synch_on 2006.229.17:08:42.19$setupk4/"rec_mode=128 2006.229.17:08:42.19$setupk4/!* 2006.229.17:08:42.19$setupk4/recpk4 2006.229.17:08:42.19$recpk4/recpatch= 2006.229.17:08:42.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:08:42.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:08:42.20$setupk4/vck44 2006.229.17:08:42.20$vck44/valo=1,524.99 2006.229.17:08:42.20#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.17:08:42.20#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.17:08:42.20#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:42.20#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:42.20#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:42.20#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:42.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:08:42.20#ibcon#first serial, iclass 32, count 0 2006.229.17:08:42.20#ibcon#enter sib2, iclass 32, count 0 2006.229.17:08:42.20#ibcon#flushed, iclass 32, count 0 2006.229.17:08:42.20#ibcon#about to write, iclass 32, count 0 2006.229.17:08:42.20#ibcon#wrote, iclass 32, count 0 2006.229.17:08:42.20#ibcon#about to read 3, iclass 32, count 0 2006.229.17:08:42.22#ibcon#read 3, iclass 32, count 0 2006.229.17:08:42.22#ibcon#about to read 4, iclass 32, count 0 2006.229.17:08:42.22#ibcon#read 4, iclass 32, count 0 2006.229.17:08:42.22#ibcon#about to read 5, iclass 32, count 0 2006.229.17:08:42.22#ibcon#read 5, iclass 32, count 0 2006.229.17:08:42.22#ibcon#about to read 6, iclass 32, count 0 2006.229.17:08:42.22#ibcon#read 6, iclass 32, count 0 2006.229.17:08:42.22#ibcon#end of sib2, iclass 32, count 0 2006.229.17:08:42.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:08:42.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:08:42.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:08:42.22#ibcon#*before write, iclass 32, count 0 2006.229.17:08:42.22#ibcon#enter sib2, iclass 32, count 0 2006.229.17:08:42.22#ibcon#flushed, iclass 32, count 0 2006.229.17:08:42.22#ibcon#about to write, iclass 32, count 0 2006.229.17:08:42.22#ibcon#wrote, iclass 32, count 0 2006.229.17:08:42.22#ibcon#about to read 3, iclass 32, count 0 2006.229.17:08:42.27#ibcon#read 3, iclass 32, count 0 2006.229.17:08:42.27#ibcon#about to read 4, iclass 32, count 0 2006.229.17:08:42.27#ibcon#read 4, iclass 32, count 0 2006.229.17:08:42.27#ibcon#about to read 5, iclass 32, count 0 2006.229.17:08:42.27#ibcon#read 5, iclass 32, count 0 2006.229.17:08:42.27#ibcon#about to read 6, iclass 32, count 0 2006.229.17:08:42.27#ibcon#read 6, iclass 32, count 0 2006.229.17:08:42.27#ibcon#end of sib2, iclass 32, count 0 2006.229.17:08:42.27#ibcon#*after write, iclass 32, count 0 2006.229.17:08:42.27#ibcon#*before return 0, iclass 32, count 0 2006.229.17:08:42.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:42.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:42.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:08:42.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:08:42.27$vck44/va=1,8 2006.229.17:08:42.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.17:08:42.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.17:08:42.27#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:42.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:42.27#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:42.27#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:42.27#ibcon#enter wrdev, iclass 34, count 2 2006.229.17:08:42.27#ibcon#first serial, iclass 34, count 2 2006.229.17:08:42.27#ibcon#enter sib2, iclass 34, count 2 2006.229.17:08:42.27#ibcon#flushed, iclass 34, count 2 2006.229.17:08:42.27#ibcon#about to write, iclass 34, count 2 2006.229.17:08:42.27#ibcon#wrote, iclass 34, count 2 2006.229.17:08:42.27#ibcon#about to read 3, iclass 34, count 2 2006.229.17:08:42.29#ibcon#read 3, iclass 34, count 2 2006.229.17:08:42.29#ibcon#about to read 4, iclass 34, count 2 2006.229.17:08:42.29#ibcon#read 4, iclass 34, count 2 2006.229.17:08:42.29#ibcon#about to read 5, iclass 34, count 2 2006.229.17:08:42.29#ibcon#read 5, iclass 34, count 2 2006.229.17:08:42.29#ibcon#about to read 6, iclass 34, count 2 2006.229.17:08:42.29#ibcon#read 6, iclass 34, count 2 2006.229.17:08:42.29#ibcon#end of sib2, iclass 34, count 2 2006.229.17:08:42.29#ibcon#*mode == 0, iclass 34, count 2 2006.229.17:08:42.29#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.17:08:42.29#ibcon#[25=AT01-08\r\n] 2006.229.17:08:42.29#ibcon#*before write, iclass 34, count 2 2006.229.17:08:42.29#ibcon#enter sib2, iclass 34, count 2 2006.229.17:08:42.29#ibcon#flushed, iclass 34, count 2 2006.229.17:08:42.29#ibcon#about to write, iclass 34, count 2 2006.229.17:08:42.29#ibcon#wrote, iclass 34, count 2 2006.229.17:08:42.29#ibcon#about to read 3, iclass 34, count 2 2006.229.17:08:42.32#ibcon#read 3, iclass 34, count 2 2006.229.17:08:42.32#ibcon#about to read 4, iclass 34, count 2 2006.229.17:08:42.32#ibcon#read 4, iclass 34, count 2 2006.229.17:08:42.32#ibcon#about to read 5, iclass 34, count 2 2006.229.17:08:42.32#ibcon#read 5, iclass 34, count 2 2006.229.17:08:42.32#ibcon#about to read 6, iclass 34, count 2 2006.229.17:08:42.32#ibcon#read 6, iclass 34, count 2 2006.229.17:08:42.32#ibcon#end of sib2, iclass 34, count 2 2006.229.17:08:42.32#ibcon#*after write, iclass 34, count 2 2006.229.17:08:42.32#ibcon#*before return 0, iclass 34, count 2 2006.229.17:08:42.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:42.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:42.32#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.17:08:42.32#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:42.32#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:42.44#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:42.44#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:42.44#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:08:42.44#ibcon#first serial, iclass 34, count 0 2006.229.17:08:42.44#ibcon#enter sib2, iclass 34, count 0 2006.229.17:08:42.44#ibcon#flushed, iclass 34, count 0 2006.229.17:08:42.44#ibcon#about to write, iclass 34, count 0 2006.229.17:08:42.44#ibcon#wrote, iclass 34, count 0 2006.229.17:08:42.44#ibcon#about to read 3, iclass 34, count 0 2006.229.17:08:42.46#ibcon#read 3, iclass 34, count 0 2006.229.17:08:42.46#ibcon#about to read 4, iclass 34, count 0 2006.229.17:08:42.46#ibcon#read 4, iclass 34, count 0 2006.229.17:08:42.46#ibcon#about to read 5, iclass 34, count 0 2006.229.17:08:42.46#ibcon#read 5, iclass 34, count 0 2006.229.17:08:42.46#ibcon#about to read 6, iclass 34, count 0 2006.229.17:08:42.46#ibcon#read 6, iclass 34, count 0 2006.229.17:08:42.46#ibcon#end of sib2, iclass 34, count 0 2006.229.17:08:42.46#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:08:42.46#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:08:42.46#ibcon#[25=USB\r\n] 2006.229.17:08:42.46#ibcon#*before write, iclass 34, count 0 2006.229.17:08:42.46#ibcon#enter sib2, iclass 34, count 0 2006.229.17:08:42.46#ibcon#flushed, iclass 34, count 0 2006.229.17:08:42.46#ibcon#about to write, iclass 34, count 0 2006.229.17:08:42.46#ibcon#wrote, iclass 34, count 0 2006.229.17:08:42.46#ibcon#about to read 3, iclass 34, count 0 2006.229.17:08:42.49#ibcon#read 3, iclass 34, count 0 2006.229.17:08:42.49#ibcon#about to read 4, iclass 34, count 0 2006.229.17:08:42.49#ibcon#read 4, iclass 34, count 0 2006.229.17:08:42.49#ibcon#about to read 5, iclass 34, count 0 2006.229.17:08:42.49#ibcon#read 5, iclass 34, count 0 2006.229.17:08:42.49#ibcon#about to read 6, iclass 34, count 0 2006.229.17:08:42.49#ibcon#read 6, iclass 34, count 0 2006.229.17:08:42.49#ibcon#end of sib2, iclass 34, count 0 2006.229.17:08:42.49#ibcon#*after write, iclass 34, count 0 2006.229.17:08:42.49#ibcon#*before return 0, iclass 34, count 0 2006.229.17:08:42.49#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:42.49#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:42.49#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:08:42.49#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:08:42.49$vck44/valo=2,534.99 2006.229.17:08:42.49#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.17:08:42.49#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.17:08:42.49#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:42.49#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:42.49#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:42.49#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:42.49#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:08:42.49#ibcon#first serial, iclass 36, count 0 2006.229.17:08:42.49#ibcon#enter sib2, iclass 36, count 0 2006.229.17:08:42.49#ibcon#flushed, iclass 36, count 0 2006.229.17:08:42.49#ibcon#about to write, iclass 36, count 0 2006.229.17:08:42.49#ibcon#wrote, iclass 36, count 0 2006.229.17:08:42.49#ibcon#about to read 3, iclass 36, count 0 2006.229.17:08:42.51#ibcon#read 3, iclass 36, count 0 2006.229.17:08:42.51#ibcon#about to read 4, iclass 36, count 0 2006.229.17:08:42.51#ibcon#read 4, iclass 36, count 0 2006.229.17:08:42.51#ibcon#about to read 5, iclass 36, count 0 2006.229.17:08:42.51#ibcon#read 5, iclass 36, count 0 2006.229.17:08:42.51#ibcon#about to read 6, iclass 36, count 0 2006.229.17:08:42.51#ibcon#read 6, iclass 36, count 0 2006.229.17:08:42.51#ibcon#end of sib2, iclass 36, count 0 2006.229.17:08:42.51#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:08:42.51#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:08:42.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:08:42.51#ibcon#*before write, iclass 36, count 0 2006.229.17:08:42.51#ibcon#enter sib2, iclass 36, count 0 2006.229.17:08:42.51#ibcon#flushed, iclass 36, count 0 2006.229.17:08:42.51#ibcon#about to write, iclass 36, count 0 2006.229.17:08:42.51#ibcon#wrote, iclass 36, count 0 2006.229.17:08:42.51#ibcon#about to read 3, iclass 36, count 0 2006.229.17:08:42.55#ibcon#read 3, iclass 36, count 0 2006.229.17:08:42.55#ibcon#about to read 4, iclass 36, count 0 2006.229.17:08:42.55#ibcon#read 4, iclass 36, count 0 2006.229.17:08:42.55#ibcon#about to read 5, iclass 36, count 0 2006.229.17:08:42.55#ibcon#read 5, iclass 36, count 0 2006.229.17:08:42.55#ibcon#about to read 6, iclass 36, count 0 2006.229.17:08:42.55#ibcon#read 6, iclass 36, count 0 2006.229.17:08:42.55#ibcon#end of sib2, iclass 36, count 0 2006.229.17:08:42.55#ibcon#*after write, iclass 36, count 0 2006.229.17:08:42.55#ibcon#*before return 0, iclass 36, count 0 2006.229.17:08:42.55#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:42.55#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:42.55#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:08:42.55#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:08:42.55$vck44/va=2,7 2006.229.17:08:42.55#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.17:08:42.55#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.17:08:42.55#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:42.55#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:42.61#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:42.61#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:42.61#ibcon#enter wrdev, iclass 38, count 2 2006.229.17:08:42.61#ibcon#first serial, iclass 38, count 2 2006.229.17:08:42.61#ibcon#enter sib2, iclass 38, count 2 2006.229.17:08:42.61#ibcon#flushed, iclass 38, count 2 2006.229.17:08:42.61#ibcon#about to write, iclass 38, count 2 2006.229.17:08:42.61#ibcon#wrote, iclass 38, count 2 2006.229.17:08:42.61#ibcon#about to read 3, iclass 38, count 2 2006.229.17:08:42.63#ibcon#read 3, iclass 38, count 2 2006.229.17:08:42.63#ibcon#about to read 4, iclass 38, count 2 2006.229.17:08:42.63#ibcon#read 4, iclass 38, count 2 2006.229.17:08:42.63#ibcon#about to read 5, iclass 38, count 2 2006.229.17:08:42.63#ibcon#read 5, iclass 38, count 2 2006.229.17:08:42.63#ibcon#about to read 6, iclass 38, count 2 2006.229.17:08:42.63#ibcon#read 6, iclass 38, count 2 2006.229.17:08:42.63#ibcon#end of sib2, iclass 38, count 2 2006.229.17:08:42.63#ibcon#*mode == 0, iclass 38, count 2 2006.229.17:08:42.63#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.17:08:42.63#ibcon#[25=AT02-07\r\n] 2006.229.17:08:42.63#ibcon#*before write, iclass 38, count 2 2006.229.17:08:42.63#ibcon#enter sib2, iclass 38, count 2 2006.229.17:08:42.63#ibcon#flushed, iclass 38, count 2 2006.229.17:08:42.63#ibcon#about to write, iclass 38, count 2 2006.229.17:08:42.63#ibcon#wrote, iclass 38, count 2 2006.229.17:08:42.63#ibcon#about to read 3, iclass 38, count 2 2006.229.17:08:42.66#ibcon#read 3, iclass 38, count 2 2006.229.17:08:42.66#ibcon#about to read 4, iclass 38, count 2 2006.229.17:08:42.66#ibcon#read 4, iclass 38, count 2 2006.229.17:08:42.66#ibcon#about to read 5, iclass 38, count 2 2006.229.17:08:42.66#ibcon#read 5, iclass 38, count 2 2006.229.17:08:42.66#ibcon#about to read 6, iclass 38, count 2 2006.229.17:08:42.66#ibcon#read 6, iclass 38, count 2 2006.229.17:08:42.66#ibcon#end of sib2, iclass 38, count 2 2006.229.17:08:42.66#ibcon#*after write, iclass 38, count 2 2006.229.17:08:42.66#ibcon#*before return 0, iclass 38, count 2 2006.229.17:08:42.66#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:42.66#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:42.66#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.17:08:42.66#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:42.66#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:42.78#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:42.78#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:42.78#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:08:42.78#ibcon#first serial, iclass 38, count 0 2006.229.17:08:42.78#ibcon#enter sib2, iclass 38, count 0 2006.229.17:08:42.78#ibcon#flushed, iclass 38, count 0 2006.229.17:08:42.78#ibcon#about to write, iclass 38, count 0 2006.229.17:08:42.78#ibcon#wrote, iclass 38, count 0 2006.229.17:08:42.78#ibcon#about to read 3, iclass 38, count 0 2006.229.17:08:42.80#ibcon#read 3, iclass 38, count 0 2006.229.17:08:42.80#ibcon#about to read 4, iclass 38, count 0 2006.229.17:08:42.80#ibcon#read 4, iclass 38, count 0 2006.229.17:08:42.80#ibcon#about to read 5, iclass 38, count 0 2006.229.17:08:42.80#ibcon#read 5, iclass 38, count 0 2006.229.17:08:42.80#ibcon#about to read 6, iclass 38, count 0 2006.229.17:08:42.80#ibcon#read 6, iclass 38, count 0 2006.229.17:08:42.80#ibcon#end of sib2, iclass 38, count 0 2006.229.17:08:42.80#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:08:42.80#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:08:42.80#ibcon#[25=USB\r\n] 2006.229.17:08:42.80#ibcon#*before write, iclass 38, count 0 2006.229.17:08:42.80#ibcon#enter sib2, iclass 38, count 0 2006.229.17:08:42.80#ibcon#flushed, iclass 38, count 0 2006.229.17:08:42.80#ibcon#about to write, iclass 38, count 0 2006.229.17:08:42.80#ibcon#wrote, iclass 38, count 0 2006.229.17:08:42.80#ibcon#about to read 3, iclass 38, count 0 2006.229.17:08:42.83#ibcon#read 3, iclass 38, count 0 2006.229.17:08:42.83#ibcon#about to read 4, iclass 38, count 0 2006.229.17:08:42.83#ibcon#read 4, iclass 38, count 0 2006.229.17:08:42.83#ibcon#about to read 5, iclass 38, count 0 2006.229.17:08:42.83#ibcon#read 5, iclass 38, count 0 2006.229.17:08:42.83#ibcon#about to read 6, iclass 38, count 0 2006.229.17:08:42.83#ibcon#read 6, iclass 38, count 0 2006.229.17:08:42.83#ibcon#end of sib2, iclass 38, count 0 2006.229.17:08:42.83#ibcon#*after write, iclass 38, count 0 2006.229.17:08:42.83#ibcon#*before return 0, iclass 38, count 0 2006.229.17:08:42.83#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:42.83#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:42.83#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:08:42.83#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:08:42.83$vck44/valo=3,564.99 2006.229.17:08:42.83#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.17:08:42.83#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.17:08:42.83#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:42.83#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:42.83#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:42.83#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:42.83#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:08:42.83#ibcon#first serial, iclass 40, count 0 2006.229.17:08:42.83#ibcon#enter sib2, iclass 40, count 0 2006.229.17:08:42.83#ibcon#flushed, iclass 40, count 0 2006.229.17:08:42.83#ibcon#about to write, iclass 40, count 0 2006.229.17:08:42.83#ibcon#wrote, iclass 40, count 0 2006.229.17:08:42.83#ibcon#about to read 3, iclass 40, count 0 2006.229.17:08:42.85#ibcon#read 3, iclass 40, count 0 2006.229.17:08:42.85#ibcon#about to read 4, iclass 40, count 0 2006.229.17:08:42.85#ibcon#read 4, iclass 40, count 0 2006.229.17:08:42.85#ibcon#about to read 5, iclass 40, count 0 2006.229.17:08:42.85#ibcon#read 5, iclass 40, count 0 2006.229.17:08:42.85#ibcon#about to read 6, iclass 40, count 0 2006.229.17:08:42.85#ibcon#read 6, iclass 40, count 0 2006.229.17:08:42.85#ibcon#end of sib2, iclass 40, count 0 2006.229.17:08:42.85#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:08:42.85#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:08:42.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:08:42.85#ibcon#*before write, iclass 40, count 0 2006.229.17:08:42.85#ibcon#enter sib2, iclass 40, count 0 2006.229.17:08:42.85#ibcon#flushed, iclass 40, count 0 2006.229.17:08:42.85#ibcon#about to write, iclass 40, count 0 2006.229.17:08:42.85#ibcon#wrote, iclass 40, count 0 2006.229.17:08:42.85#ibcon#about to read 3, iclass 40, count 0 2006.229.17:08:42.89#ibcon#read 3, iclass 40, count 0 2006.229.17:08:42.89#ibcon#about to read 4, iclass 40, count 0 2006.229.17:08:42.89#ibcon#read 4, iclass 40, count 0 2006.229.17:08:42.89#ibcon#about to read 5, iclass 40, count 0 2006.229.17:08:42.89#ibcon#read 5, iclass 40, count 0 2006.229.17:08:42.89#ibcon#about to read 6, iclass 40, count 0 2006.229.17:08:42.89#ibcon#read 6, iclass 40, count 0 2006.229.17:08:42.89#ibcon#end of sib2, iclass 40, count 0 2006.229.17:08:42.89#ibcon#*after write, iclass 40, count 0 2006.229.17:08:42.89#ibcon#*before return 0, iclass 40, count 0 2006.229.17:08:42.89#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:42.89#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:42.89#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:08:42.89#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:08:42.89$vck44/va=3,6 2006.229.17:08:42.89#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.17:08:42.89#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.17:08:42.89#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:42.89#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:42.95#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:42.95#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:42.95#ibcon#enter wrdev, iclass 4, count 2 2006.229.17:08:42.95#ibcon#first serial, iclass 4, count 2 2006.229.17:08:42.95#ibcon#enter sib2, iclass 4, count 2 2006.229.17:08:42.95#ibcon#flushed, iclass 4, count 2 2006.229.17:08:42.95#ibcon#about to write, iclass 4, count 2 2006.229.17:08:42.95#ibcon#wrote, iclass 4, count 2 2006.229.17:08:42.95#ibcon#about to read 3, iclass 4, count 2 2006.229.17:08:42.97#ibcon#read 3, iclass 4, count 2 2006.229.17:08:42.97#ibcon#about to read 4, iclass 4, count 2 2006.229.17:08:42.97#ibcon#read 4, iclass 4, count 2 2006.229.17:08:42.97#ibcon#about to read 5, iclass 4, count 2 2006.229.17:08:42.97#ibcon#read 5, iclass 4, count 2 2006.229.17:08:42.97#ibcon#about to read 6, iclass 4, count 2 2006.229.17:08:42.97#ibcon#read 6, iclass 4, count 2 2006.229.17:08:42.97#ibcon#end of sib2, iclass 4, count 2 2006.229.17:08:42.97#ibcon#*mode == 0, iclass 4, count 2 2006.229.17:08:42.97#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.17:08:42.97#ibcon#[25=AT03-06\r\n] 2006.229.17:08:42.97#ibcon#*before write, iclass 4, count 2 2006.229.17:08:42.97#ibcon#enter sib2, iclass 4, count 2 2006.229.17:08:42.97#ibcon#flushed, iclass 4, count 2 2006.229.17:08:42.97#ibcon#about to write, iclass 4, count 2 2006.229.17:08:42.97#ibcon#wrote, iclass 4, count 2 2006.229.17:08:42.97#ibcon#about to read 3, iclass 4, count 2 2006.229.17:08:43.00#ibcon#read 3, iclass 4, count 2 2006.229.17:08:43.00#ibcon#about to read 4, iclass 4, count 2 2006.229.17:08:43.00#ibcon#read 4, iclass 4, count 2 2006.229.17:08:43.00#ibcon#about to read 5, iclass 4, count 2 2006.229.17:08:43.00#ibcon#read 5, iclass 4, count 2 2006.229.17:08:43.00#ibcon#about to read 6, iclass 4, count 2 2006.229.17:08:43.00#ibcon#read 6, iclass 4, count 2 2006.229.17:08:43.00#ibcon#end of sib2, iclass 4, count 2 2006.229.17:08:43.00#ibcon#*after write, iclass 4, count 2 2006.229.17:08:43.00#ibcon#*before return 0, iclass 4, count 2 2006.229.17:08:43.00#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:43.00#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:43.00#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.17:08:43.00#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:43.00#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:43.12#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:43.12#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:43.12#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:08:43.12#ibcon#first serial, iclass 4, count 0 2006.229.17:08:43.12#ibcon#enter sib2, iclass 4, count 0 2006.229.17:08:43.12#ibcon#flushed, iclass 4, count 0 2006.229.17:08:43.12#ibcon#about to write, iclass 4, count 0 2006.229.17:08:43.12#ibcon#wrote, iclass 4, count 0 2006.229.17:08:43.12#ibcon#about to read 3, iclass 4, count 0 2006.229.17:08:43.14#ibcon#read 3, iclass 4, count 0 2006.229.17:08:43.14#ibcon#about to read 4, iclass 4, count 0 2006.229.17:08:43.14#ibcon#read 4, iclass 4, count 0 2006.229.17:08:43.14#ibcon#about to read 5, iclass 4, count 0 2006.229.17:08:43.14#ibcon#read 5, iclass 4, count 0 2006.229.17:08:43.14#ibcon#about to read 6, iclass 4, count 0 2006.229.17:08:43.14#ibcon#read 6, iclass 4, count 0 2006.229.17:08:43.14#ibcon#end of sib2, iclass 4, count 0 2006.229.17:08:43.14#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:08:43.14#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:08:43.14#ibcon#[25=USB\r\n] 2006.229.17:08:43.14#ibcon#*before write, iclass 4, count 0 2006.229.17:08:43.14#ibcon#enter sib2, iclass 4, count 0 2006.229.17:08:43.14#ibcon#flushed, iclass 4, count 0 2006.229.17:08:43.14#ibcon#about to write, iclass 4, count 0 2006.229.17:08:43.14#ibcon#wrote, iclass 4, count 0 2006.229.17:08:43.14#ibcon#about to read 3, iclass 4, count 0 2006.229.17:08:43.17#ibcon#read 3, iclass 4, count 0 2006.229.17:08:43.17#ibcon#about to read 4, iclass 4, count 0 2006.229.17:08:43.17#ibcon#read 4, iclass 4, count 0 2006.229.17:08:43.17#ibcon#about to read 5, iclass 4, count 0 2006.229.17:08:43.17#ibcon#read 5, iclass 4, count 0 2006.229.17:08:43.17#ibcon#about to read 6, iclass 4, count 0 2006.229.17:08:43.17#ibcon#read 6, iclass 4, count 0 2006.229.17:08:43.17#ibcon#end of sib2, iclass 4, count 0 2006.229.17:08:43.17#ibcon#*after write, iclass 4, count 0 2006.229.17:08:43.17#ibcon#*before return 0, iclass 4, count 0 2006.229.17:08:43.17#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:43.17#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:43.17#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:08:43.17#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:08:43.17$vck44/valo=4,624.99 2006.229.17:08:43.17#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.17:08:43.17#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.17:08:43.17#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:43.17#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:43.17#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:43.17#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:43.17#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:08:43.17#ibcon#first serial, iclass 6, count 0 2006.229.17:08:43.17#ibcon#enter sib2, iclass 6, count 0 2006.229.17:08:43.17#ibcon#flushed, iclass 6, count 0 2006.229.17:08:43.17#ibcon#about to write, iclass 6, count 0 2006.229.17:08:43.17#ibcon#wrote, iclass 6, count 0 2006.229.17:08:43.17#ibcon#about to read 3, iclass 6, count 0 2006.229.17:08:43.19#ibcon#read 3, iclass 6, count 0 2006.229.17:08:43.19#ibcon#about to read 4, iclass 6, count 0 2006.229.17:08:43.19#ibcon#read 4, iclass 6, count 0 2006.229.17:08:43.19#ibcon#about to read 5, iclass 6, count 0 2006.229.17:08:43.19#ibcon#read 5, iclass 6, count 0 2006.229.17:08:43.19#ibcon#about to read 6, iclass 6, count 0 2006.229.17:08:43.19#ibcon#read 6, iclass 6, count 0 2006.229.17:08:43.19#ibcon#end of sib2, iclass 6, count 0 2006.229.17:08:43.19#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:08:43.19#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:08:43.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:08:43.19#ibcon#*before write, iclass 6, count 0 2006.229.17:08:43.19#ibcon#enter sib2, iclass 6, count 0 2006.229.17:08:43.19#ibcon#flushed, iclass 6, count 0 2006.229.17:08:43.19#ibcon#about to write, iclass 6, count 0 2006.229.17:08:43.19#ibcon#wrote, iclass 6, count 0 2006.229.17:08:43.19#ibcon#about to read 3, iclass 6, count 0 2006.229.17:08:43.23#ibcon#read 3, iclass 6, count 0 2006.229.17:08:43.23#ibcon#about to read 4, iclass 6, count 0 2006.229.17:08:43.23#ibcon#read 4, iclass 6, count 0 2006.229.17:08:43.23#ibcon#about to read 5, iclass 6, count 0 2006.229.17:08:43.23#ibcon#read 5, iclass 6, count 0 2006.229.17:08:43.23#ibcon#about to read 6, iclass 6, count 0 2006.229.17:08:43.23#ibcon#read 6, iclass 6, count 0 2006.229.17:08:43.23#ibcon#end of sib2, iclass 6, count 0 2006.229.17:08:43.23#ibcon#*after write, iclass 6, count 0 2006.229.17:08:43.23#ibcon#*before return 0, iclass 6, count 0 2006.229.17:08:43.23#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:43.23#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:43.23#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:08:43.23#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:08:43.23$vck44/va=4,7 2006.229.17:08:43.23#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.17:08:43.23#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.17:08:43.23#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:43.23#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:43.29#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:43.29#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:43.29#ibcon#enter wrdev, iclass 10, count 2 2006.229.17:08:43.29#ibcon#first serial, iclass 10, count 2 2006.229.17:08:43.29#ibcon#enter sib2, iclass 10, count 2 2006.229.17:08:43.29#ibcon#flushed, iclass 10, count 2 2006.229.17:08:43.29#ibcon#about to write, iclass 10, count 2 2006.229.17:08:43.29#ibcon#wrote, iclass 10, count 2 2006.229.17:08:43.29#ibcon#about to read 3, iclass 10, count 2 2006.229.17:08:43.31#ibcon#read 3, iclass 10, count 2 2006.229.17:08:43.31#ibcon#about to read 4, iclass 10, count 2 2006.229.17:08:43.31#ibcon#read 4, iclass 10, count 2 2006.229.17:08:43.31#ibcon#about to read 5, iclass 10, count 2 2006.229.17:08:43.31#ibcon#read 5, iclass 10, count 2 2006.229.17:08:43.31#ibcon#about to read 6, iclass 10, count 2 2006.229.17:08:43.31#ibcon#read 6, iclass 10, count 2 2006.229.17:08:43.31#ibcon#end of sib2, iclass 10, count 2 2006.229.17:08:43.31#ibcon#*mode == 0, iclass 10, count 2 2006.229.17:08:43.31#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.17:08:43.31#ibcon#[25=AT04-07\r\n] 2006.229.17:08:43.31#ibcon#*before write, iclass 10, count 2 2006.229.17:08:43.31#ibcon#enter sib2, iclass 10, count 2 2006.229.17:08:43.31#ibcon#flushed, iclass 10, count 2 2006.229.17:08:43.31#ibcon#about to write, iclass 10, count 2 2006.229.17:08:43.31#ibcon#wrote, iclass 10, count 2 2006.229.17:08:43.31#ibcon#about to read 3, iclass 10, count 2 2006.229.17:08:43.34#ibcon#read 3, iclass 10, count 2 2006.229.17:08:43.34#ibcon#about to read 4, iclass 10, count 2 2006.229.17:08:43.34#ibcon#read 4, iclass 10, count 2 2006.229.17:08:43.34#ibcon#about to read 5, iclass 10, count 2 2006.229.17:08:43.34#ibcon#read 5, iclass 10, count 2 2006.229.17:08:43.34#ibcon#about to read 6, iclass 10, count 2 2006.229.17:08:43.34#ibcon#read 6, iclass 10, count 2 2006.229.17:08:43.34#ibcon#end of sib2, iclass 10, count 2 2006.229.17:08:43.34#ibcon#*after write, iclass 10, count 2 2006.229.17:08:43.34#ibcon#*before return 0, iclass 10, count 2 2006.229.17:08:43.34#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:43.34#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:43.34#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.17:08:43.34#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:43.34#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:43.46#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:43.46#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:43.46#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:08:43.46#ibcon#first serial, iclass 10, count 0 2006.229.17:08:43.46#ibcon#enter sib2, iclass 10, count 0 2006.229.17:08:43.46#ibcon#flushed, iclass 10, count 0 2006.229.17:08:43.46#ibcon#about to write, iclass 10, count 0 2006.229.17:08:43.46#ibcon#wrote, iclass 10, count 0 2006.229.17:08:43.46#ibcon#about to read 3, iclass 10, count 0 2006.229.17:08:43.48#ibcon#read 3, iclass 10, count 0 2006.229.17:08:43.48#ibcon#about to read 4, iclass 10, count 0 2006.229.17:08:43.48#ibcon#read 4, iclass 10, count 0 2006.229.17:08:43.48#ibcon#about to read 5, iclass 10, count 0 2006.229.17:08:43.48#ibcon#read 5, iclass 10, count 0 2006.229.17:08:43.48#ibcon#about to read 6, iclass 10, count 0 2006.229.17:08:43.48#ibcon#read 6, iclass 10, count 0 2006.229.17:08:43.48#ibcon#end of sib2, iclass 10, count 0 2006.229.17:08:43.48#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:08:43.48#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:08:43.48#ibcon#[25=USB\r\n] 2006.229.17:08:43.48#ibcon#*before write, iclass 10, count 0 2006.229.17:08:43.48#ibcon#enter sib2, iclass 10, count 0 2006.229.17:08:43.48#ibcon#flushed, iclass 10, count 0 2006.229.17:08:43.48#ibcon#about to write, iclass 10, count 0 2006.229.17:08:43.48#ibcon#wrote, iclass 10, count 0 2006.229.17:08:43.48#ibcon#about to read 3, iclass 10, count 0 2006.229.17:08:43.51#ibcon#read 3, iclass 10, count 0 2006.229.17:08:43.51#ibcon#about to read 4, iclass 10, count 0 2006.229.17:08:43.51#ibcon#read 4, iclass 10, count 0 2006.229.17:08:43.51#ibcon#about to read 5, iclass 10, count 0 2006.229.17:08:43.51#ibcon#read 5, iclass 10, count 0 2006.229.17:08:43.51#ibcon#about to read 6, iclass 10, count 0 2006.229.17:08:43.51#ibcon#read 6, iclass 10, count 0 2006.229.17:08:43.51#ibcon#end of sib2, iclass 10, count 0 2006.229.17:08:43.51#ibcon#*after write, iclass 10, count 0 2006.229.17:08:43.51#ibcon#*before return 0, iclass 10, count 0 2006.229.17:08:43.51#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:43.51#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:43.51#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:08:43.51#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:08:43.51$vck44/valo=5,734.99 2006.229.17:08:43.51#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.17:08:43.51#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.17:08:43.51#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:43.51#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:08:43.51#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:08:43.51#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:08:43.51#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:08:43.51#ibcon#first serial, iclass 12, count 0 2006.229.17:08:43.51#ibcon#enter sib2, iclass 12, count 0 2006.229.17:08:43.51#ibcon#flushed, iclass 12, count 0 2006.229.17:08:43.51#ibcon#about to write, iclass 12, count 0 2006.229.17:08:43.51#ibcon#wrote, iclass 12, count 0 2006.229.17:08:43.51#ibcon#about to read 3, iclass 12, count 0 2006.229.17:08:43.53#ibcon#read 3, iclass 12, count 0 2006.229.17:08:43.53#ibcon#about to read 4, iclass 12, count 0 2006.229.17:08:43.53#ibcon#read 4, iclass 12, count 0 2006.229.17:08:43.53#ibcon#about to read 5, iclass 12, count 0 2006.229.17:08:43.53#ibcon#read 5, iclass 12, count 0 2006.229.17:08:43.53#ibcon#about to read 6, iclass 12, count 0 2006.229.17:08:43.53#ibcon#read 6, iclass 12, count 0 2006.229.17:08:43.53#ibcon#end of sib2, iclass 12, count 0 2006.229.17:08:43.53#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:08:43.53#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:08:43.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:08:43.53#ibcon#*before write, iclass 12, count 0 2006.229.17:08:43.53#ibcon#enter sib2, iclass 12, count 0 2006.229.17:08:43.53#ibcon#flushed, iclass 12, count 0 2006.229.17:08:43.53#ibcon#about to write, iclass 12, count 0 2006.229.17:08:43.53#ibcon#wrote, iclass 12, count 0 2006.229.17:08:43.53#ibcon#about to read 3, iclass 12, count 0 2006.229.17:08:43.57#ibcon#read 3, iclass 12, count 0 2006.229.17:08:43.57#ibcon#about to read 4, iclass 12, count 0 2006.229.17:08:43.57#ibcon#read 4, iclass 12, count 0 2006.229.17:08:43.57#ibcon#about to read 5, iclass 12, count 0 2006.229.17:08:43.57#ibcon#read 5, iclass 12, count 0 2006.229.17:08:43.57#ibcon#about to read 6, iclass 12, count 0 2006.229.17:08:43.57#ibcon#read 6, iclass 12, count 0 2006.229.17:08:43.57#ibcon#end of sib2, iclass 12, count 0 2006.229.17:08:43.57#ibcon#*after write, iclass 12, count 0 2006.229.17:08:43.57#ibcon#*before return 0, iclass 12, count 0 2006.229.17:08:43.57#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:08:43.57#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:08:43.57#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:08:43.57#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:08:43.57$vck44/va=5,4 2006.229.17:08:43.57#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.17:08:43.57#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.17:08:43.57#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:43.57#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:08:43.63#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:08:43.63#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:08:43.63#ibcon#enter wrdev, iclass 14, count 2 2006.229.17:08:43.63#ibcon#first serial, iclass 14, count 2 2006.229.17:08:43.63#ibcon#enter sib2, iclass 14, count 2 2006.229.17:08:43.63#ibcon#flushed, iclass 14, count 2 2006.229.17:08:43.63#ibcon#about to write, iclass 14, count 2 2006.229.17:08:43.63#ibcon#wrote, iclass 14, count 2 2006.229.17:08:43.63#ibcon#about to read 3, iclass 14, count 2 2006.229.17:08:43.65#ibcon#read 3, iclass 14, count 2 2006.229.17:08:43.65#ibcon#about to read 4, iclass 14, count 2 2006.229.17:08:43.65#ibcon#read 4, iclass 14, count 2 2006.229.17:08:43.65#ibcon#about to read 5, iclass 14, count 2 2006.229.17:08:43.65#ibcon#read 5, iclass 14, count 2 2006.229.17:08:43.65#ibcon#about to read 6, iclass 14, count 2 2006.229.17:08:43.65#ibcon#read 6, iclass 14, count 2 2006.229.17:08:43.65#ibcon#end of sib2, iclass 14, count 2 2006.229.17:08:43.65#ibcon#*mode == 0, iclass 14, count 2 2006.229.17:08:43.65#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.17:08:43.65#ibcon#[25=AT05-04\r\n] 2006.229.17:08:43.65#ibcon#*before write, iclass 14, count 2 2006.229.17:08:43.65#ibcon#enter sib2, iclass 14, count 2 2006.229.17:08:43.65#ibcon#flushed, iclass 14, count 2 2006.229.17:08:43.65#ibcon#about to write, iclass 14, count 2 2006.229.17:08:43.65#ibcon#wrote, iclass 14, count 2 2006.229.17:08:43.65#ibcon#about to read 3, iclass 14, count 2 2006.229.17:08:43.68#ibcon#read 3, iclass 14, count 2 2006.229.17:08:43.68#ibcon#about to read 4, iclass 14, count 2 2006.229.17:08:43.68#ibcon#read 4, iclass 14, count 2 2006.229.17:08:43.68#ibcon#about to read 5, iclass 14, count 2 2006.229.17:08:43.68#ibcon#read 5, iclass 14, count 2 2006.229.17:08:43.68#ibcon#about to read 6, iclass 14, count 2 2006.229.17:08:43.68#ibcon#read 6, iclass 14, count 2 2006.229.17:08:43.68#ibcon#end of sib2, iclass 14, count 2 2006.229.17:08:43.68#ibcon#*after write, iclass 14, count 2 2006.229.17:08:43.68#ibcon#*before return 0, iclass 14, count 2 2006.229.17:08:43.68#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:08:43.68#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:08:43.68#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.17:08:43.68#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:43.68#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:08:43.80#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:08:43.80#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:08:43.80#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:08:43.80#ibcon#first serial, iclass 14, count 0 2006.229.17:08:43.80#ibcon#enter sib2, iclass 14, count 0 2006.229.17:08:43.80#ibcon#flushed, iclass 14, count 0 2006.229.17:08:43.80#ibcon#about to write, iclass 14, count 0 2006.229.17:08:43.80#ibcon#wrote, iclass 14, count 0 2006.229.17:08:43.80#ibcon#about to read 3, iclass 14, count 0 2006.229.17:08:43.82#ibcon#read 3, iclass 14, count 0 2006.229.17:08:43.82#ibcon#about to read 4, iclass 14, count 0 2006.229.17:08:43.82#ibcon#read 4, iclass 14, count 0 2006.229.17:08:43.82#ibcon#about to read 5, iclass 14, count 0 2006.229.17:08:43.82#ibcon#read 5, iclass 14, count 0 2006.229.17:08:43.82#ibcon#about to read 6, iclass 14, count 0 2006.229.17:08:43.82#ibcon#read 6, iclass 14, count 0 2006.229.17:08:43.82#ibcon#end of sib2, iclass 14, count 0 2006.229.17:08:43.82#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:08:43.82#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:08:43.82#ibcon#[25=USB\r\n] 2006.229.17:08:43.82#ibcon#*before write, iclass 14, count 0 2006.229.17:08:43.82#ibcon#enter sib2, iclass 14, count 0 2006.229.17:08:43.82#ibcon#flushed, iclass 14, count 0 2006.229.17:08:43.82#ibcon#about to write, iclass 14, count 0 2006.229.17:08:43.82#ibcon#wrote, iclass 14, count 0 2006.229.17:08:43.82#ibcon#about to read 3, iclass 14, count 0 2006.229.17:08:43.85#ibcon#read 3, iclass 14, count 0 2006.229.17:08:43.85#ibcon#about to read 4, iclass 14, count 0 2006.229.17:08:43.85#ibcon#read 4, iclass 14, count 0 2006.229.17:08:43.85#ibcon#about to read 5, iclass 14, count 0 2006.229.17:08:43.85#ibcon#read 5, iclass 14, count 0 2006.229.17:08:43.85#ibcon#about to read 6, iclass 14, count 0 2006.229.17:08:43.85#ibcon#read 6, iclass 14, count 0 2006.229.17:08:43.85#ibcon#end of sib2, iclass 14, count 0 2006.229.17:08:43.85#ibcon#*after write, iclass 14, count 0 2006.229.17:08:43.85#ibcon#*before return 0, iclass 14, count 0 2006.229.17:08:43.85#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:08:43.85#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:08:43.85#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:08:43.85#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:08:43.85$vck44/valo=6,814.99 2006.229.17:08:43.85#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.17:08:43.85#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.17:08:43.85#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:43.85#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:08:43.85#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:08:43.85#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:08:43.85#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:08:43.85#ibcon#first serial, iclass 16, count 0 2006.229.17:08:43.85#ibcon#enter sib2, iclass 16, count 0 2006.229.17:08:43.85#ibcon#flushed, iclass 16, count 0 2006.229.17:08:43.85#ibcon#about to write, iclass 16, count 0 2006.229.17:08:43.85#ibcon#wrote, iclass 16, count 0 2006.229.17:08:43.85#ibcon#about to read 3, iclass 16, count 0 2006.229.17:08:43.87#ibcon#read 3, iclass 16, count 0 2006.229.17:08:43.87#ibcon#about to read 4, iclass 16, count 0 2006.229.17:08:43.87#ibcon#read 4, iclass 16, count 0 2006.229.17:08:43.87#ibcon#about to read 5, iclass 16, count 0 2006.229.17:08:43.87#ibcon#read 5, iclass 16, count 0 2006.229.17:08:43.87#ibcon#about to read 6, iclass 16, count 0 2006.229.17:08:43.87#ibcon#read 6, iclass 16, count 0 2006.229.17:08:43.87#ibcon#end of sib2, iclass 16, count 0 2006.229.17:08:43.87#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:08:43.87#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:08:43.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:08:43.87#ibcon#*before write, iclass 16, count 0 2006.229.17:08:43.87#ibcon#enter sib2, iclass 16, count 0 2006.229.17:08:43.87#ibcon#flushed, iclass 16, count 0 2006.229.17:08:43.87#ibcon#about to write, iclass 16, count 0 2006.229.17:08:43.87#ibcon#wrote, iclass 16, count 0 2006.229.17:08:43.87#ibcon#about to read 3, iclass 16, count 0 2006.229.17:08:43.91#ibcon#read 3, iclass 16, count 0 2006.229.17:08:43.91#ibcon#about to read 4, iclass 16, count 0 2006.229.17:08:43.91#ibcon#read 4, iclass 16, count 0 2006.229.17:08:43.91#ibcon#about to read 5, iclass 16, count 0 2006.229.17:08:43.91#ibcon#read 5, iclass 16, count 0 2006.229.17:08:43.91#ibcon#about to read 6, iclass 16, count 0 2006.229.17:08:43.91#ibcon#read 6, iclass 16, count 0 2006.229.17:08:43.91#ibcon#end of sib2, iclass 16, count 0 2006.229.17:08:43.91#ibcon#*after write, iclass 16, count 0 2006.229.17:08:43.91#ibcon#*before return 0, iclass 16, count 0 2006.229.17:08:43.91#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:08:43.91#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:08:43.91#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:08:43.91#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:08:43.91$vck44/va=6,4 2006.229.17:08:43.91#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.17:08:43.91#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.17:08:43.91#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:43.91#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:43.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:43.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:43.97#ibcon#enter wrdev, iclass 18, count 2 2006.229.17:08:43.97#ibcon#first serial, iclass 18, count 2 2006.229.17:08:43.97#ibcon#enter sib2, iclass 18, count 2 2006.229.17:08:43.97#ibcon#flushed, iclass 18, count 2 2006.229.17:08:43.97#ibcon#about to write, iclass 18, count 2 2006.229.17:08:43.97#ibcon#wrote, iclass 18, count 2 2006.229.17:08:43.97#ibcon#about to read 3, iclass 18, count 2 2006.229.17:08:43.99#ibcon#read 3, iclass 18, count 2 2006.229.17:08:43.99#ibcon#about to read 4, iclass 18, count 2 2006.229.17:08:43.99#ibcon#read 4, iclass 18, count 2 2006.229.17:08:43.99#ibcon#about to read 5, iclass 18, count 2 2006.229.17:08:43.99#ibcon#read 5, iclass 18, count 2 2006.229.17:08:43.99#ibcon#about to read 6, iclass 18, count 2 2006.229.17:08:43.99#ibcon#read 6, iclass 18, count 2 2006.229.17:08:43.99#ibcon#end of sib2, iclass 18, count 2 2006.229.17:08:43.99#ibcon#*mode == 0, iclass 18, count 2 2006.229.17:08:43.99#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.17:08:43.99#ibcon#[25=AT06-04\r\n] 2006.229.17:08:43.99#ibcon#*before write, iclass 18, count 2 2006.229.17:08:43.99#ibcon#enter sib2, iclass 18, count 2 2006.229.17:08:43.99#ibcon#flushed, iclass 18, count 2 2006.229.17:08:43.99#ibcon#about to write, iclass 18, count 2 2006.229.17:08:43.99#ibcon#wrote, iclass 18, count 2 2006.229.17:08:43.99#ibcon#about to read 3, iclass 18, count 2 2006.229.17:08:44.02#ibcon#read 3, iclass 18, count 2 2006.229.17:08:44.02#ibcon#about to read 4, iclass 18, count 2 2006.229.17:08:44.02#ibcon#read 4, iclass 18, count 2 2006.229.17:08:44.02#ibcon#about to read 5, iclass 18, count 2 2006.229.17:08:44.02#ibcon#read 5, iclass 18, count 2 2006.229.17:08:44.02#ibcon#about to read 6, iclass 18, count 2 2006.229.17:08:44.02#ibcon#read 6, iclass 18, count 2 2006.229.17:08:44.02#ibcon#end of sib2, iclass 18, count 2 2006.229.17:08:44.02#ibcon#*after write, iclass 18, count 2 2006.229.17:08:44.02#ibcon#*before return 0, iclass 18, count 2 2006.229.17:08:44.02#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:44.02#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:44.02#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.17:08:44.02#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:44.02#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:44.14#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:44.14#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:44.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:08:44.14#ibcon#first serial, iclass 18, count 0 2006.229.17:08:44.14#ibcon#enter sib2, iclass 18, count 0 2006.229.17:08:44.14#ibcon#flushed, iclass 18, count 0 2006.229.17:08:44.14#ibcon#about to write, iclass 18, count 0 2006.229.17:08:44.14#ibcon#wrote, iclass 18, count 0 2006.229.17:08:44.14#ibcon#about to read 3, iclass 18, count 0 2006.229.17:08:44.16#ibcon#read 3, iclass 18, count 0 2006.229.17:08:44.16#ibcon#about to read 4, iclass 18, count 0 2006.229.17:08:44.16#ibcon#read 4, iclass 18, count 0 2006.229.17:08:44.16#ibcon#about to read 5, iclass 18, count 0 2006.229.17:08:44.16#ibcon#read 5, iclass 18, count 0 2006.229.17:08:44.16#ibcon#about to read 6, iclass 18, count 0 2006.229.17:08:44.16#ibcon#read 6, iclass 18, count 0 2006.229.17:08:44.16#ibcon#end of sib2, iclass 18, count 0 2006.229.17:08:44.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:08:44.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:08:44.16#ibcon#[25=USB\r\n] 2006.229.17:08:44.16#ibcon#*before write, iclass 18, count 0 2006.229.17:08:44.16#ibcon#enter sib2, iclass 18, count 0 2006.229.17:08:44.16#ibcon#flushed, iclass 18, count 0 2006.229.17:08:44.16#ibcon#about to write, iclass 18, count 0 2006.229.17:08:44.16#ibcon#wrote, iclass 18, count 0 2006.229.17:08:44.16#ibcon#about to read 3, iclass 18, count 0 2006.229.17:08:44.19#ibcon#read 3, iclass 18, count 0 2006.229.17:08:44.19#ibcon#about to read 4, iclass 18, count 0 2006.229.17:08:44.19#ibcon#read 4, iclass 18, count 0 2006.229.17:08:44.19#ibcon#about to read 5, iclass 18, count 0 2006.229.17:08:44.19#ibcon#read 5, iclass 18, count 0 2006.229.17:08:44.19#ibcon#about to read 6, iclass 18, count 0 2006.229.17:08:44.19#ibcon#read 6, iclass 18, count 0 2006.229.17:08:44.19#ibcon#end of sib2, iclass 18, count 0 2006.229.17:08:44.19#ibcon#*after write, iclass 18, count 0 2006.229.17:08:44.19#ibcon#*before return 0, iclass 18, count 0 2006.229.17:08:44.19#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:44.19#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:44.19#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:08:44.19#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:08:44.19$vck44/valo=7,864.99 2006.229.17:08:44.19#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.17:08:44.19#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.17:08:44.19#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:44.19#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:44.19#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:44.19#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:44.19#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:08:44.19#ibcon#first serial, iclass 20, count 0 2006.229.17:08:44.19#ibcon#enter sib2, iclass 20, count 0 2006.229.17:08:44.19#ibcon#flushed, iclass 20, count 0 2006.229.17:08:44.19#ibcon#about to write, iclass 20, count 0 2006.229.17:08:44.19#ibcon#wrote, iclass 20, count 0 2006.229.17:08:44.19#ibcon#about to read 3, iclass 20, count 0 2006.229.17:08:44.21#ibcon#read 3, iclass 20, count 0 2006.229.17:08:44.21#ibcon#about to read 4, iclass 20, count 0 2006.229.17:08:44.21#ibcon#read 4, iclass 20, count 0 2006.229.17:08:44.21#ibcon#about to read 5, iclass 20, count 0 2006.229.17:08:44.21#ibcon#read 5, iclass 20, count 0 2006.229.17:08:44.21#ibcon#about to read 6, iclass 20, count 0 2006.229.17:08:44.21#ibcon#read 6, iclass 20, count 0 2006.229.17:08:44.21#ibcon#end of sib2, iclass 20, count 0 2006.229.17:08:44.21#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:08:44.21#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:08:44.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:08:44.21#ibcon#*before write, iclass 20, count 0 2006.229.17:08:44.21#ibcon#enter sib2, iclass 20, count 0 2006.229.17:08:44.21#ibcon#flushed, iclass 20, count 0 2006.229.17:08:44.21#ibcon#about to write, iclass 20, count 0 2006.229.17:08:44.21#ibcon#wrote, iclass 20, count 0 2006.229.17:08:44.21#ibcon#about to read 3, iclass 20, count 0 2006.229.17:08:44.25#ibcon#read 3, iclass 20, count 0 2006.229.17:08:44.25#ibcon#about to read 4, iclass 20, count 0 2006.229.17:08:44.25#ibcon#read 4, iclass 20, count 0 2006.229.17:08:44.25#ibcon#about to read 5, iclass 20, count 0 2006.229.17:08:44.25#ibcon#read 5, iclass 20, count 0 2006.229.17:08:44.25#ibcon#about to read 6, iclass 20, count 0 2006.229.17:08:44.25#ibcon#read 6, iclass 20, count 0 2006.229.17:08:44.25#ibcon#end of sib2, iclass 20, count 0 2006.229.17:08:44.25#ibcon#*after write, iclass 20, count 0 2006.229.17:08:44.25#ibcon#*before return 0, iclass 20, count 0 2006.229.17:08:44.25#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:44.25#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:44.25#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:08:44.25#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:08:44.25$vck44/va=7,5 2006.229.17:08:44.25#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.17:08:44.25#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.17:08:44.25#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:44.25#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:44.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:44.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:44.31#ibcon#enter wrdev, iclass 22, count 2 2006.229.17:08:44.31#ibcon#first serial, iclass 22, count 2 2006.229.17:08:44.31#ibcon#enter sib2, iclass 22, count 2 2006.229.17:08:44.31#ibcon#flushed, iclass 22, count 2 2006.229.17:08:44.31#ibcon#about to write, iclass 22, count 2 2006.229.17:08:44.31#ibcon#wrote, iclass 22, count 2 2006.229.17:08:44.31#ibcon#about to read 3, iclass 22, count 2 2006.229.17:08:44.33#ibcon#read 3, iclass 22, count 2 2006.229.17:08:44.33#ibcon#about to read 4, iclass 22, count 2 2006.229.17:08:44.33#ibcon#read 4, iclass 22, count 2 2006.229.17:08:44.33#ibcon#about to read 5, iclass 22, count 2 2006.229.17:08:44.33#ibcon#read 5, iclass 22, count 2 2006.229.17:08:44.33#ibcon#about to read 6, iclass 22, count 2 2006.229.17:08:44.33#ibcon#read 6, iclass 22, count 2 2006.229.17:08:44.33#ibcon#end of sib2, iclass 22, count 2 2006.229.17:08:44.33#ibcon#*mode == 0, iclass 22, count 2 2006.229.17:08:44.33#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.17:08:44.33#ibcon#[25=AT07-05\r\n] 2006.229.17:08:44.33#ibcon#*before write, iclass 22, count 2 2006.229.17:08:44.33#ibcon#enter sib2, iclass 22, count 2 2006.229.17:08:44.33#ibcon#flushed, iclass 22, count 2 2006.229.17:08:44.33#ibcon#about to write, iclass 22, count 2 2006.229.17:08:44.33#ibcon#wrote, iclass 22, count 2 2006.229.17:08:44.33#ibcon#about to read 3, iclass 22, count 2 2006.229.17:08:44.36#ibcon#read 3, iclass 22, count 2 2006.229.17:08:44.36#ibcon#about to read 4, iclass 22, count 2 2006.229.17:08:44.36#ibcon#read 4, iclass 22, count 2 2006.229.17:08:44.36#ibcon#about to read 5, iclass 22, count 2 2006.229.17:08:44.36#ibcon#read 5, iclass 22, count 2 2006.229.17:08:44.36#ibcon#about to read 6, iclass 22, count 2 2006.229.17:08:44.36#ibcon#read 6, iclass 22, count 2 2006.229.17:08:44.36#ibcon#end of sib2, iclass 22, count 2 2006.229.17:08:44.36#ibcon#*after write, iclass 22, count 2 2006.229.17:08:44.36#ibcon#*before return 0, iclass 22, count 2 2006.229.17:08:44.36#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:44.36#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:44.36#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.17:08:44.36#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:44.36#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:44.48#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:44.48#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:44.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:08:44.48#ibcon#first serial, iclass 22, count 0 2006.229.17:08:44.48#ibcon#enter sib2, iclass 22, count 0 2006.229.17:08:44.48#ibcon#flushed, iclass 22, count 0 2006.229.17:08:44.48#ibcon#about to write, iclass 22, count 0 2006.229.17:08:44.48#ibcon#wrote, iclass 22, count 0 2006.229.17:08:44.48#ibcon#about to read 3, iclass 22, count 0 2006.229.17:08:44.50#ibcon#read 3, iclass 22, count 0 2006.229.17:08:44.50#ibcon#about to read 4, iclass 22, count 0 2006.229.17:08:44.50#ibcon#read 4, iclass 22, count 0 2006.229.17:08:44.50#ibcon#about to read 5, iclass 22, count 0 2006.229.17:08:44.50#ibcon#read 5, iclass 22, count 0 2006.229.17:08:44.50#ibcon#about to read 6, iclass 22, count 0 2006.229.17:08:44.50#ibcon#read 6, iclass 22, count 0 2006.229.17:08:44.50#ibcon#end of sib2, iclass 22, count 0 2006.229.17:08:44.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:08:44.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:08:44.50#ibcon#[25=USB\r\n] 2006.229.17:08:44.50#ibcon#*before write, iclass 22, count 0 2006.229.17:08:44.50#ibcon#enter sib2, iclass 22, count 0 2006.229.17:08:44.50#ibcon#flushed, iclass 22, count 0 2006.229.17:08:44.50#ibcon#about to write, iclass 22, count 0 2006.229.17:08:44.50#ibcon#wrote, iclass 22, count 0 2006.229.17:08:44.50#ibcon#about to read 3, iclass 22, count 0 2006.229.17:08:44.53#ibcon#read 3, iclass 22, count 0 2006.229.17:08:44.53#ibcon#about to read 4, iclass 22, count 0 2006.229.17:08:44.53#ibcon#read 4, iclass 22, count 0 2006.229.17:08:44.53#ibcon#about to read 5, iclass 22, count 0 2006.229.17:08:44.53#ibcon#read 5, iclass 22, count 0 2006.229.17:08:44.53#ibcon#about to read 6, iclass 22, count 0 2006.229.17:08:44.53#ibcon#read 6, iclass 22, count 0 2006.229.17:08:44.53#ibcon#end of sib2, iclass 22, count 0 2006.229.17:08:44.53#ibcon#*after write, iclass 22, count 0 2006.229.17:08:44.53#ibcon#*before return 0, iclass 22, count 0 2006.229.17:08:44.53#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:44.53#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:44.53#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:08:44.53#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:08:44.53$vck44/valo=8,884.99 2006.229.17:08:44.53#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.17:08:44.53#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.17:08:44.53#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:44.53#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:44.53#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:44.53#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:44.53#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:08:44.53#ibcon#first serial, iclass 24, count 0 2006.229.17:08:44.53#ibcon#enter sib2, iclass 24, count 0 2006.229.17:08:44.53#ibcon#flushed, iclass 24, count 0 2006.229.17:08:44.53#ibcon#about to write, iclass 24, count 0 2006.229.17:08:44.53#ibcon#wrote, iclass 24, count 0 2006.229.17:08:44.53#ibcon#about to read 3, iclass 24, count 0 2006.229.17:08:44.55#ibcon#read 3, iclass 24, count 0 2006.229.17:08:44.55#ibcon#about to read 4, iclass 24, count 0 2006.229.17:08:44.55#ibcon#read 4, iclass 24, count 0 2006.229.17:08:44.55#ibcon#about to read 5, iclass 24, count 0 2006.229.17:08:44.55#ibcon#read 5, iclass 24, count 0 2006.229.17:08:44.55#ibcon#about to read 6, iclass 24, count 0 2006.229.17:08:44.55#ibcon#read 6, iclass 24, count 0 2006.229.17:08:44.55#ibcon#end of sib2, iclass 24, count 0 2006.229.17:08:44.55#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:08:44.55#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:08:44.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:08:44.55#ibcon#*before write, iclass 24, count 0 2006.229.17:08:44.55#ibcon#enter sib2, iclass 24, count 0 2006.229.17:08:44.55#ibcon#flushed, iclass 24, count 0 2006.229.17:08:44.55#ibcon#about to write, iclass 24, count 0 2006.229.17:08:44.55#ibcon#wrote, iclass 24, count 0 2006.229.17:08:44.55#ibcon#about to read 3, iclass 24, count 0 2006.229.17:08:44.59#ibcon#read 3, iclass 24, count 0 2006.229.17:08:44.59#ibcon#about to read 4, iclass 24, count 0 2006.229.17:08:44.59#ibcon#read 4, iclass 24, count 0 2006.229.17:08:44.59#ibcon#about to read 5, iclass 24, count 0 2006.229.17:08:44.59#ibcon#read 5, iclass 24, count 0 2006.229.17:08:44.59#ibcon#about to read 6, iclass 24, count 0 2006.229.17:08:44.59#ibcon#read 6, iclass 24, count 0 2006.229.17:08:44.59#ibcon#end of sib2, iclass 24, count 0 2006.229.17:08:44.59#ibcon#*after write, iclass 24, count 0 2006.229.17:08:44.59#ibcon#*before return 0, iclass 24, count 0 2006.229.17:08:44.59#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:44.59#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:44.59#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:08:44.59#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:08:44.59$vck44/va=8,6 2006.229.17:08:44.59#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.17:08:44.59#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.17:08:44.59#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:44.59#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:44.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:44.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:44.65#ibcon#enter wrdev, iclass 26, count 2 2006.229.17:08:44.65#ibcon#first serial, iclass 26, count 2 2006.229.17:08:44.65#ibcon#enter sib2, iclass 26, count 2 2006.229.17:08:44.65#ibcon#flushed, iclass 26, count 2 2006.229.17:08:44.65#ibcon#about to write, iclass 26, count 2 2006.229.17:08:44.65#ibcon#wrote, iclass 26, count 2 2006.229.17:08:44.65#ibcon#about to read 3, iclass 26, count 2 2006.229.17:08:44.67#ibcon#read 3, iclass 26, count 2 2006.229.17:08:44.67#ibcon#about to read 4, iclass 26, count 2 2006.229.17:08:44.67#ibcon#read 4, iclass 26, count 2 2006.229.17:08:44.67#ibcon#about to read 5, iclass 26, count 2 2006.229.17:08:44.67#ibcon#read 5, iclass 26, count 2 2006.229.17:08:44.67#ibcon#about to read 6, iclass 26, count 2 2006.229.17:08:44.67#ibcon#read 6, iclass 26, count 2 2006.229.17:08:44.67#ibcon#end of sib2, iclass 26, count 2 2006.229.17:08:44.67#ibcon#*mode == 0, iclass 26, count 2 2006.229.17:08:44.67#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.17:08:44.67#ibcon#[25=AT08-06\r\n] 2006.229.17:08:44.67#ibcon#*before write, iclass 26, count 2 2006.229.17:08:44.67#ibcon#enter sib2, iclass 26, count 2 2006.229.17:08:44.67#ibcon#flushed, iclass 26, count 2 2006.229.17:08:44.67#ibcon#about to write, iclass 26, count 2 2006.229.17:08:44.67#ibcon#wrote, iclass 26, count 2 2006.229.17:08:44.67#ibcon#about to read 3, iclass 26, count 2 2006.229.17:08:44.70#ibcon#read 3, iclass 26, count 2 2006.229.17:08:44.70#ibcon#about to read 4, iclass 26, count 2 2006.229.17:08:44.70#ibcon#read 4, iclass 26, count 2 2006.229.17:08:44.70#ibcon#about to read 5, iclass 26, count 2 2006.229.17:08:44.70#ibcon#read 5, iclass 26, count 2 2006.229.17:08:44.70#ibcon#about to read 6, iclass 26, count 2 2006.229.17:08:44.70#ibcon#read 6, iclass 26, count 2 2006.229.17:08:44.70#ibcon#end of sib2, iclass 26, count 2 2006.229.17:08:44.70#ibcon#*after write, iclass 26, count 2 2006.229.17:08:44.70#ibcon#*before return 0, iclass 26, count 2 2006.229.17:08:44.70#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:44.70#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:44.70#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.17:08:44.70#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:44.70#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:44.82#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:44.82#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:44.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:08:44.82#ibcon#first serial, iclass 26, count 0 2006.229.17:08:44.82#ibcon#enter sib2, iclass 26, count 0 2006.229.17:08:44.82#ibcon#flushed, iclass 26, count 0 2006.229.17:08:44.82#ibcon#about to write, iclass 26, count 0 2006.229.17:08:44.82#ibcon#wrote, iclass 26, count 0 2006.229.17:08:44.82#ibcon#about to read 3, iclass 26, count 0 2006.229.17:08:44.84#ibcon#read 3, iclass 26, count 0 2006.229.17:08:44.84#ibcon#about to read 4, iclass 26, count 0 2006.229.17:08:44.84#ibcon#read 4, iclass 26, count 0 2006.229.17:08:44.84#ibcon#about to read 5, iclass 26, count 0 2006.229.17:08:44.84#ibcon#read 5, iclass 26, count 0 2006.229.17:08:44.84#ibcon#about to read 6, iclass 26, count 0 2006.229.17:08:44.84#ibcon#read 6, iclass 26, count 0 2006.229.17:08:44.84#ibcon#end of sib2, iclass 26, count 0 2006.229.17:08:44.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:08:44.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:08:44.84#ibcon#[25=USB\r\n] 2006.229.17:08:44.84#ibcon#*before write, iclass 26, count 0 2006.229.17:08:44.84#ibcon#enter sib2, iclass 26, count 0 2006.229.17:08:44.84#ibcon#flushed, iclass 26, count 0 2006.229.17:08:44.84#ibcon#about to write, iclass 26, count 0 2006.229.17:08:44.84#ibcon#wrote, iclass 26, count 0 2006.229.17:08:44.84#ibcon#about to read 3, iclass 26, count 0 2006.229.17:08:44.87#ibcon#read 3, iclass 26, count 0 2006.229.17:08:44.87#ibcon#about to read 4, iclass 26, count 0 2006.229.17:08:44.87#ibcon#read 4, iclass 26, count 0 2006.229.17:08:44.87#ibcon#about to read 5, iclass 26, count 0 2006.229.17:08:44.87#ibcon#read 5, iclass 26, count 0 2006.229.17:08:44.87#ibcon#about to read 6, iclass 26, count 0 2006.229.17:08:44.87#ibcon#read 6, iclass 26, count 0 2006.229.17:08:44.87#ibcon#end of sib2, iclass 26, count 0 2006.229.17:08:44.87#ibcon#*after write, iclass 26, count 0 2006.229.17:08:44.87#ibcon#*before return 0, iclass 26, count 0 2006.229.17:08:44.87#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:44.87#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:44.87#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:08:44.87#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:08:44.87$vck44/vblo=1,629.99 2006.229.17:08:44.87#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.17:08:44.87#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.17:08:44.87#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:44.87#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:44.87#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:44.87#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:44.87#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:08:44.87#ibcon#first serial, iclass 28, count 0 2006.229.17:08:44.87#ibcon#enter sib2, iclass 28, count 0 2006.229.17:08:44.87#ibcon#flushed, iclass 28, count 0 2006.229.17:08:44.87#ibcon#about to write, iclass 28, count 0 2006.229.17:08:44.87#ibcon#wrote, iclass 28, count 0 2006.229.17:08:44.87#ibcon#about to read 3, iclass 28, count 0 2006.229.17:08:44.89#ibcon#read 3, iclass 28, count 0 2006.229.17:08:44.89#ibcon#about to read 4, iclass 28, count 0 2006.229.17:08:44.89#ibcon#read 4, iclass 28, count 0 2006.229.17:08:44.89#ibcon#about to read 5, iclass 28, count 0 2006.229.17:08:44.89#ibcon#read 5, iclass 28, count 0 2006.229.17:08:44.89#ibcon#about to read 6, iclass 28, count 0 2006.229.17:08:44.89#ibcon#read 6, iclass 28, count 0 2006.229.17:08:44.89#ibcon#end of sib2, iclass 28, count 0 2006.229.17:08:44.89#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:08:44.89#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:08:44.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:08:44.89#ibcon#*before write, iclass 28, count 0 2006.229.17:08:44.89#ibcon#enter sib2, iclass 28, count 0 2006.229.17:08:44.89#ibcon#flushed, iclass 28, count 0 2006.229.17:08:44.89#ibcon#about to write, iclass 28, count 0 2006.229.17:08:44.89#ibcon#wrote, iclass 28, count 0 2006.229.17:08:44.89#ibcon#about to read 3, iclass 28, count 0 2006.229.17:08:44.93#ibcon#read 3, iclass 28, count 0 2006.229.17:08:44.93#ibcon#about to read 4, iclass 28, count 0 2006.229.17:08:44.93#ibcon#read 4, iclass 28, count 0 2006.229.17:08:44.93#ibcon#about to read 5, iclass 28, count 0 2006.229.17:08:44.93#ibcon#read 5, iclass 28, count 0 2006.229.17:08:44.93#ibcon#about to read 6, iclass 28, count 0 2006.229.17:08:44.93#ibcon#read 6, iclass 28, count 0 2006.229.17:08:44.93#ibcon#end of sib2, iclass 28, count 0 2006.229.17:08:44.93#ibcon#*after write, iclass 28, count 0 2006.229.17:08:44.93#ibcon#*before return 0, iclass 28, count 0 2006.229.17:08:44.93#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:44.93#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:44.93#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:08:44.93#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:08:44.93$vck44/vb=1,4 2006.229.17:08:44.93#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.17:08:44.93#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.17:08:44.93#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:44.93#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:08:44.93#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:08:44.93#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:08:44.93#ibcon#enter wrdev, iclass 30, count 2 2006.229.17:08:44.93#ibcon#first serial, iclass 30, count 2 2006.229.17:08:44.93#ibcon#enter sib2, iclass 30, count 2 2006.229.17:08:44.93#ibcon#flushed, iclass 30, count 2 2006.229.17:08:44.93#ibcon#about to write, iclass 30, count 2 2006.229.17:08:44.93#ibcon#wrote, iclass 30, count 2 2006.229.17:08:44.93#ibcon#about to read 3, iclass 30, count 2 2006.229.17:08:44.95#ibcon#read 3, iclass 30, count 2 2006.229.17:08:44.95#ibcon#about to read 4, iclass 30, count 2 2006.229.17:08:44.95#ibcon#read 4, iclass 30, count 2 2006.229.17:08:44.95#ibcon#about to read 5, iclass 30, count 2 2006.229.17:08:44.95#ibcon#read 5, iclass 30, count 2 2006.229.17:08:44.95#ibcon#about to read 6, iclass 30, count 2 2006.229.17:08:44.95#ibcon#read 6, iclass 30, count 2 2006.229.17:08:44.95#ibcon#end of sib2, iclass 30, count 2 2006.229.17:08:44.95#ibcon#*mode == 0, iclass 30, count 2 2006.229.17:08:44.95#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.17:08:44.95#ibcon#[27=AT01-04\r\n] 2006.229.17:08:44.95#ibcon#*before write, iclass 30, count 2 2006.229.17:08:44.95#ibcon#enter sib2, iclass 30, count 2 2006.229.17:08:44.95#ibcon#flushed, iclass 30, count 2 2006.229.17:08:44.95#ibcon#about to write, iclass 30, count 2 2006.229.17:08:44.95#ibcon#wrote, iclass 30, count 2 2006.229.17:08:44.95#ibcon#about to read 3, iclass 30, count 2 2006.229.17:08:44.98#ibcon#read 3, iclass 30, count 2 2006.229.17:08:44.98#ibcon#about to read 4, iclass 30, count 2 2006.229.17:08:44.98#ibcon#read 4, iclass 30, count 2 2006.229.17:08:44.98#ibcon#about to read 5, iclass 30, count 2 2006.229.17:08:44.98#ibcon#read 5, iclass 30, count 2 2006.229.17:08:44.98#ibcon#about to read 6, iclass 30, count 2 2006.229.17:08:44.98#ibcon#read 6, iclass 30, count 2 2006.229.17:08:44.98#ibcon#end of sib2, iclass 30, count 2 2006.229.17:08:44.98#ibcon#*after write, iclass 30, count 2 2006.229.17:08:44.98#ibcon#*before return 0, iclass 30, count 2 2006.229.17:08:44.98#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:08:44.98#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:08:44.98#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.17:08:44.98#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:44.98#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:08:45.10#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:08:45.10#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:08:45.10#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:08:45.10#ibcon#first serial, iclass 30, count 0 2006.229.17:08:45.10#ibcon#enter sib2, iclass 30, count 0 2006.229.17:08:45.10#ibcon#flushed, iclass 30, count 0 2006.229.17:08:45.10#ibcon#about to write, iclass 30, count 0 2006.229.17:08:45.10#ibcon#wrote, iclass 30, count 0 2006.229.17:08:45.10#ibcon#about to read 3, iclass 30, count 0 2006.229.17:08:45.12#ibcon#read 3, iclass 30, count 0 2006.229.17:08:45.12#ibcon#about to read 4, iclass 30, count 0 2006.229.17:08:45.12#ibcon#read 4, iclass 30, count 0 2006.229.17:08:45.12#ibcon#about to read 5, iclass 30, count 0 2006.229.17:08:45.12#ibcon#read 5, iclass 30, count 0 2006.229.17:08:45.12#ibcon#about to read 6, iclass 30, count 0 2006.229.17:08:45.12#ibcon#read 6, iclass 30, count 0 2006.229.17:08:45.12#ibcon#end of sib2, iclass 30, count 0 2006.229.17:08:45.12#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:08:45.12#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:08:45.12#ibcon#[27=USB\r\n] 2006.229.17:08:45.12#ibcon#*before write, iclass 30, count 0 2006.229.17:08:45.12#ibcon#enter sib2, iclass 30, count 0 2006.229.17:08:45.12#ibcon#flushed, iclass 30, count 0 2006.229.17:08:45.12#ibcon#about to write, iclass 30, count 0 2006.229.17:08:45.12#ibcon#wrote, iclass 30, count 0 2006.229.17:08:45.12#ibcon#about to read 3, iclass 30, count 0 2006.229.17:08:45.15#ibcon#read 3, iclass 30, count 0 2006.229.17:08:45.15#ibcon#about to read 4, iclass 30, count 0 2006.229.17:08:45.15#ibcon#read 4, iclass 30, count 0 2006.229.17:08:45.15#ibcon#about to read 5, iclass 30, count 0 2006.229.17:08:45.15#ibcon#read 5, iclass 30, count 0 2006.229.17:08:45.15#ibcon#about to read 6, iclass 30, count 0 2006.229.17:08:45.15#ibcon#read 6, iclass 30, count 0 2006.229.17:08:45.15#ibcon#end of sib2, iclass 30, count 0 2006.229.17:08:45.15#ibcon#*after write, iclass 30, count 0 2006.229.17:08:45.15#ibcon#*before return 0, iclass 30, count 0 2006.229.17:08:45.15#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:08:45.15#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:08:45.15#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:08:45.15#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:08:45.15$vck44/vblo=2,634.99 2006.229.17:08:45.15#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.17:08:45.15#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.17:08:45.15#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:45.15#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:45.15#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:45.15#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:45.15#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:08:45.15#ibcon#first serial, iclass 32, count 0 2006.229.17:08:45.15#ibcon#enter sib2, iclass 32, count 0 2006.229.17:08:45.15#ibcon#flushed, iclass 32, count 0 2006.229.17:08:45.15#ibcon#about to write, iclass 32, count 0 2006.229.17:08:45.15#ibcon#wrote, iclass 32, count 0 2006.229.17:08:45.15#ibcon#about to read 3, iclass 32, count 0 2006.229.17:08:45.17#ibcon#read 3, iclass 32, count 0 2006.229.17:08:45.17#ibcon#about to read 4, iclass 32, count 0 2006.229.17:08:45.17#ibcon#read 4, iclass 32, count 0 2006.229.17:08:45.17#ibcon#about to read 5, iclass 32, count 0 2006.229.17:08:45.17#ibcon#read 5, iclass 32, count 0 2006.229.17:08:45.17#ibcon#about to read 6, iclass 32, count 0 2006.229.17:08:45.17#ibcon#read 6, iclass 32, count 0 2006.229.17:08:45.17#ibcon#end of sib2, iclass 32, count 0 2006.229.17:08:45.17#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:08:45.17#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:08:45.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:08:45.17#ibcon#*before write, iclass 32, count 0 2006.229.17:08:45.17#ibcon#enter sib2, iclass 32, count 0 2006.229.17:08:45.17#ibcon#flushed, iclass 32, count 0 2006.229.17:08:45.17#ibcon#about to write, iclass 32, count 0 2006.229.17:08:45.17#ibcon#wrote, iclass 32, count 0 2006.229.17:08:45.17#ibcon#about to read 3, iclass 32, count 0 2006.229.17:08:45.21#ibcon#read 3, iclass 32, count 0 2006.229.17:08:45.21#ibcon#about to read 4, iclass 32, count 0 2006.229.17:08:45.21#ibcon#read 4, iclass 32, count 0 2006.229.17:08:45.21#ibcon#about to read 5, iclass 32, count 0 2006.229.17:08:45.21#ibcon#read 5, iclass 32, count 0 2006.229.17:08:45.21#ibcon#about to read 6, iclass 32, count 0 2006.229.17:08:45.21#ibcon#read 6, iclass 32, count 0 2006.229.17:08:45.21#ibcon#end of sib2, iclass 32, count 0 2006.229.17:08:45.21#ibcon#*after write, iclass 32, count 0 2006.229.17:08:45.21#ibcon#*before return 0, iclass 32, count 0 2006.229.17:08:45.21#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:45.21#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:08:45.21#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:08:45.21#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:08:45.21$vck44/vb=2,4 2006.229.17:08:45.21#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.17:08:45.21#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.17:08:45.21#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:45.21#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:45.27#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:45.27#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:45.27#ibcon#enter wrdev, iclass 34, count 2 2006.229.17:08:45.27#ibcon#first serial, iclass 34, count 2 2006.229.17:08:45.27#ibcon#enter sib2, iclass 34, count 2 2006.229.17:08:45.27#ibcon#flushed, iclass 34, count 2 2006.229.17:08:45.27#ibcon#about to write, iclass 34, count 2 2006.229.17:08:45.27#ibcon#wrote, iclass 34, count 2 2006.229.17:08:45.27#ibcon#about to read 3, iclass 34, count 2 2006.229.17:08:45.29#ibcon#read 3, iclass 34, count 2 2006.229.17:08:45.29#ibcon#about to read 4, iclass 34, count 2 2006.229.17:08:45.29#ibcon#read 4, iclass 34, count 2 2006.229.17:08:45.29#ibcon#about to read 5, iclass 34, count 2 2006.229.17:08:45.29#ibcon#read 5, iclass 34, count 2 2006.229.17:08:45.29#ibcon#about to read 6, iclass 34, count 2 2006.229.17:08:45.29#ibcon#read 6, iclass 34, count 2 2006.229.17:08:45.29#ibcon#end of sib2, iclass 34, count 2 2006.229.17:08:45.29#ibcon#*mode == 0, iclass 34, count 2 2006.229.17:08:45.29#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.17:08:45.29#ibcon#[27=AT02-04\r\n] 2006.229.17:08:45.29#ibcon#*before write, iclass 34, count 2 2006.229.17:08:45.29#ibcon#enter sib2, iclass 34, count 2 2006.229.17:08:45.29#ibcon#flushed, iclass 34, count 2 2006.229.17:08:45.29#ibcon#about to write, iclass 34, count 2 2006.229.17:08:45.29#ibcon#wrote, iclass 34, count 2 2006.229.17:08:45.29#ibcon#about to read 3, iclass 34, count 2 2006.229.17:08:45.32#ibcon#read 3, iclass 34, count 2 2006.229.17:08:45.32#ibcon#about to read 4, iclass 34, count 2 2006.229.17:08:45.32#ibcon#read 4, iclass 34, count 2 2006.229.17:08:45.32#ibcon#about to read 5, iclass 34, count 2 2006.229.17:08:45.32#ibcon#read 5, iclass 34, count 2 2006.229.17:08:45.32#ibcon#about to read 6, iclass 34, count 2 2006.229.17:08:45.32#ibcon#read 6, iclass 34, count 2 2006.229.17:08:45.32#ibcon#end of sib2, iclass 34, count 2 2006.229.17:08:45.32#ibcon#*after write, iclass 34, count 2 2006.229.17:08:45.32#ibcon#*before return 0, iclass 34, count 2 2006.229.17:08:45.32#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:45.32#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:08:45.32#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.17:08:45.32#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:45.32#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:45.44#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:45.44#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:45.44#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:08:45.44#ibcon#first serial, iclass 34, count 0 2006.229.17:08:45.44#ibcon#enter sib2, iclass 34, count 0 2006.229.17:08:45.44#ibcon#flushed, iclass 34, count 0 2006.229.17:08:45.44#ibcon#about to write, iclass 34, count 0 2006.229.17:08:45.44#ibcon#wrote, iclass 34, count 0 2006.229.17:08:45.44#ibcon#about to read 3, iclass 34, count 0 2006.229.17:08:45.46#ibcon#read 3, iclass 34, count 0 2006.229.17:08:45.46#ibcon#about to read 4, iclass 34, count 0 2006.229.17:08:45.46#ibcon#read 4, iclass 34, count 0 2006.229.17:08:45.46#ibcon#about to read 5, iclass 34, count 0 2006.229.17:08:45.46#ibcon#read 5, iclass 34, count 0 2006.229.17:08:45.46#ibcon#about to read 6, iclass 34, count 0 2006.229.17:08:45.46#ibcon#read 6, iclass 34, count 0 2006.229.17:08:45.46#ibcon#end of sib2, iclass 34, count 0 2006.229.17:08:45.46#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:08:45.46#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:08:45.46#ibcon#[27=USB\r\n] 2006.229.17:08:45.46#ibcon#*before write, iclass 34, count 0 2006.229.17:08:45.46#ibcon#enter sib2, iclass 34, count 0 2006.229.17:08:45.46#ibcon#flushed, iclass 34, count 0 2006.229.17:08:45.46#ibcon#about to write, iclass 34, count 0 2006.229.17:08:45.46#ibcon#wrote, iclass 34, count 0 2006.229.17:08:45.46#ibcon#about to read 3, iclass 34, count 0 2006.229.17:08:45.49#ibcon#read 3, iclass 34, count 0 2006.229.17:08:45.49#ibcon#about to read 4, iclass 34, count 0 2006.229.17:08:45.49#ibcon#read 4, iclass 34, count 0 2006.229.17:08:45.49#ibcon#about to read 5, iclass 34, count 0 2006.229.17:08:45.49#ibcon#read 5, iclass 34, count 0 2006.229.17:08:45.49#ibcon#about to read 6, iclass 34, count 0 2006.229.17:08:45.49#ibcon#read 6, iclass 34, count 0 2006.229.17:08:45.49#ibcon#end of sib2, iclass 34, count 0 2006.229.17:08:45.49#ibcon#*after write, iclass 34, count 0 2006.229.17:08:45.49#ibcon#*before return 0, iclass 34, count 0 2006.229.17:08:45.49#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:45.49#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:08:45.49#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:08:45.49#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:08:45.49$vck44/vblo=3,649.99 2006.229.17:08:45.49#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.17:08:45.49#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.17:08:45.49#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:45.49#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:45.49#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:45.49#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:45.49#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:08:45.49#ibcon#first serial, iclass 36, count 0 2006.229.17:08:45.49#ibcon#enter sib2, iclass 36, count 0 2006.229.17:08:45.49#ibcon#flushed, iclass 36, count 0 2006.229.17:08:45.49#ibcon#about to write, iclass 36, count 0 2006.229.17:08:45.49#ibcon#wrote, iclass 36, count 0 2006.229.17:08:45.49#ibcon#about to read 3, iclass 36, count 0 2006.229.17:08:45.51#ibcon#read 3, iclass 36, count 0 2006.229.17:08:45.51#ibcon#about to read 4, iclass 36, count 0 2006.229.17:08:45.51#ibcon#read 4, iclass 36, count 0 2006.229.17:08:45.51#ibcon#about to read 5, iclass 36, count 0 2006.229.17:08:45.51#ibcon#read 5, iclass 36, count 0 2006.229.17:08:45.51#ibcon#about to read 6, iclass 36, count 0 2006.229.17:08:45.51#ibcon#read 6, iclass 36, count 0 2006.229.17:08:45.51#ibcon#end of sib2, iclass 36, count 0 2006.229.17:08:45.51#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:08:45.51#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:08:45.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:08:45.51#ibcon#*before write, iclass 36, count 0 2006.229.17:08:45.51#ibcon#enter sib2, iclass 36, count 0 2006.229.17:08:45.51#ibcon#flushed, iclass 36, count 0 2006.229.17:08:45.51#ibcon#about to write, iclass 36, count 0 2006.229.17:08:45.51#ibcon#wrote, iclass 36, count 0 2006.229.17:08:45.51#ibcon#about to read 3, iclass 36, count 0 2006.229.17:08:45.55#ibcon#read 3, iclass 36, count 0 2006.229.17:08:45.55#ibcon#about to read 4, iclass 36, count 0 2006.229.17:08:45.55#ibcon#read 4, iclass 36, count 0 2006.229.17:08:45.55#ibcon#about to read 5, iclass 36, count 0 2006.229.17:08:45.55#ibcon#read 5, iclass 36, count 0 2006.229.17:08:45.55#ibcon#about to read 6, iclass 36, count 0 2006.229.17:08:45.55#ibcon#read 6, iclass 36, count 0 2006.229.17:08:45.55#ibcon#end of sib2, iclass 36, count 0 2006.229.17:08:45.55#ibcon#*after write, iclass 36, count 0 2006.229.17:08:45.55#ibcon#*before return 0, iclass 36, count 0 2006.229.17:08:45.55#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:45.55#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:08:45.55#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:08:45.55#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:08:45.55$vck44/vb=3,4 2006.229.17:08:45.55#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.17:08:45.55#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.17:08:45.55#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:45.55#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:45.61#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:45.61#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:45.61#ibcon#enter wrdev, iclass 38, count 2 2006.229.17:08:45.61#ibcon#first serial, iclass 38, count 2 2006.229.17:08:45.61#ibcon#enter sib2, iclass 38, count 2 2006.229.17:08:45.61#ibcon#flushed, iclass 38, count 2 2006.229.17:08:45.61#ibcon#about to write, iclass 38, count 2 2006.229.17:08:45.61#ibcon#wrote, iclass 38, count 2 2006.229.17:08:45.61#ibcon#about to read 3, iclass 38, count 2 2006.229.17:08:45.63#ibcon#read 3, iclass 38, count 2 2006.229.17:08:45.63#ibcon#about to read 4, iclass 38, count 2 2006.229.17:08:45.63#ibcon#read 4, iclass 38, count 2 2006.229.17:08:45.63#ibcon#about to read 5, iclass 38, count 2 2006.229.17:08:45.63#ibcon#read 5, iclass 38, count 2 2006.229.17:08:45.63#ibcon#about to read 6, iclass 38, count 2 2006.229.17:08:45.63#ibcon#read 6, iclass 38, count 2 2006.229.17:08:45.63#ibcon#end of sib2, iclass 38, count 2 2006.229.17:08:45.63#ibcon#*mode == 0, iclass 38, count 2 2006.229.17:08:45.63#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.17:08:45.63#ibcon#[27=AT03-04\r\n] 2006.229.17:08:45.63#ibcon#*before write, iclass 38, count 2 2006.229.17:08:45.63#ibcon#enter sib2, iclass 38, count 2 2006.229.17:08:45.63#ibcon#flushed, iclass 38, count 2 2006.229.17:08:45.63#ibcon#about to write, iclass 38, count 2 2006.229.17:08:45.63#ibcon#wrote, iclass 38, count 2 2006.229.17:08:45.63#ibcon#about to read 3, iclass 38, count 2 2006.229.17:08:45.66#ibcon#read 3, iclass 38, count 2 2006.229.17:08:45.66#ibcon#about to read 4, iclass 38, count 2 2006.229.17:08:45.66#ibcon#read 4, iclass 38, count 2 2006.229.17:08:45.66#ibcon#about to read 5, iclass 38, count 2 2006.229.17:08:45.66#ibcon#read 5, iclass 38, count 2 2006.229.17:08:45.66#ibcon#about to read 6, iclass 38, count 2 2006.229.17:08:45.66#ibcon#read 6, iclass 38, count 2 2006.229.17:08:45.66#ibcon#end of sib2, iclass 38, count 2 2006.229.17:08:45.66#ibcon#*after write, iclass 38, count 2 2006.229.17:08:45.66#ibcon#*before return 0, iclass 38, count 2 2006.229.17:08:45.66#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:45.66#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:08:45.66#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.17:08:45.66#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:45.66#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:45.78#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:45.78#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:45.78#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:08:45.78#ibcon#first serial, iclass 38, count 0 2006.229.17:08:45.78#ibcon#enter sib2, iclass 38, count 0 2006.229.17:08:45.78#ibcon#flushed, iclass 38, count 0 2006.229.17:08:45.78#ibcon#about to write, iclass 38, count 0 2006.229.17:08:45.78#ibcon#wrote, iclass 38, count 0 2006.229.17:08:45.78#ibcon#about to read 3, iclass 38, count 0 2006.229.17:08:45.80#ibcon#read 3, iclass 38, count 0 2006.229.17:08:45.80#ibcon#about to read 4, iclass 38, count 0 2006.229.17:08:45.80#ibcon#read 4, iclass 38, count 0 2006.229.17:08:45.80#ibcon#about to read 5, iclass 38, count 0 2006.229.17:08:45.80#ibcon#read 5, iclass 38, count 0 2006.229.17:08:45.80#ibcon#about to read 6, iclass 38, count 0 2006.229.17:08:45.80#ibcon#read 6, iclass 38, count 0 2006.229.17:08:45.80#ibcon#end of sib2, iclass 38, count 0 2006.229.17:08:45.80#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:08:45.80#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:08:45.80#ibcon#[27=USB\r\n] 2006.229.17:08:45.80#ibcon#*before write, iclass 38, count 0 2006.229.17:08:45.80#ibcon#enter sib2, iclass 38, count 0 2006.229.17:08:45.80#ibcon#flushed, iclass 38, count 0 2006.229.17:08:45.80#ibcon#about to write, iclass 38, count 0 2006.229.17:08:45.80#ibcon#wrote, iclass 38, count 0 2006.229.17:08:45.80#ibcon#about to read 3, iclass 38, count 0 2006.229.17:08:45.83#ibcon#read 3, iclass 38, count 0 2006.229.17:08:45.83#ibcon#about to read 4, iclass 38, count 0 2006.229.17:08:45.83#ibcon#read 4, iclass 38, count 0 2006.229.17:08:45.83#ibcon#about to read 5, iclass 38, count 0 2006.229.17:08:45.83#ibcon#read 5, iclass 38, count 0 2006.229.17:08:45.83#ibcon#about to read 6, iclass 38, count 0 2006.229.17:08:45.83#ibcon#read 6, iclass 38, count 0 2006.229.17:08:45.83#ibcon#end of sib2, iclass 38, count 0 2006.229.17:08:45.83#ibcon#*after write, iclass 38, count 0 2006.229.17:08:45.83#ibcon#*before return 0, iclass 38, count 0 2006.229.17:08:45.83#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:45.83#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:08:45.83#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:08:45.83#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:08:45.83$vck44/vblo=4,679.99 2006.229.17:08:45.83#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.17:08:45.83#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.17:08:45.83#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:45.83#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:45.83#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:45.83#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:45.83#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:08:45.83#ibcon#first serial, iclass 40, count 0 2006.229.17:08:45.83#ibcon#enter sib2, iclass 40, count 0 2006.229.17:08:45.83#ibcon#flushed, iclass 40, count 0 2006.229.17:08:45.83#ibcon#about to write, iclass 40, count 0 2006.229.17:08:45.83#ibcon#wrote, iclass 40, count 0 2006.229.17:08:45.83#ibcon#about to read 3, iclass 40, count 0 2006.229.17:08:45.85#ibcon#read 3, iclass 40, count 0 2006.229.17:08:45.85#ibcon#about to read 4, iclass 40, count 0 2006.229.17:08:45.85#ibcon#read 4, iclass 40, count 0 2006.229.17:08:45.85#ibcon#about to read 5, iclass 40, count 0 2006.229.17:08:45.85#ibcon#read 5, iclass 40, count 0 2006.229.17:08:45.85#ibcon#about to read 6, iclass 40, count 0 2006.229.17:08:45.85#ibcon#read 6, iclass 40, count 0 2006.229.17:08:45.85#ibcon#end of sib2, iclass 40, count 0 2006.229.17:08:45.85#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:08:45.85#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:08:45.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:08:45.85#ibcon#*before write, iclass 40, count 0 2006.229.17:08:45.85#ibcon#enter sib2, iclass 40, count 0 2006.229.17:08:45.85#ibcon#flushed, iclass 40, count 0 2006.229.17:08:45.85#ibcon#about to write, iclass 40, count 0 2006.229.17:08:45.85#ibcon#wrote, iclass 40, count 0 2006.229.17:08:45.85#ibcon#about to read 3, iclass 40, count 0 2006.229.17:08:45.89#ibcon#read 3, iclass 40, count 0 2006.229.17:08:45.89#ibcon#about to read 4, iclass 40, count 0 2006.229.17:08:45.89#ibcon#read 4, iclass 40, count 0 2006.229.17:08:45.89#ibcon#about to read 5, iclass 40, count 0 2006.229.17:08:45.89#ibcon#read 5, iclass 40, count 0 2006.229.17:08:45.89#ibcon#about to read 6, iclass 40, count 0 2006.229.17:08:45.89#ibcon#read 6, iclass 40, count 0 2006.229.17:08:45.89#ibcon#end of sib2, iclass 40, count 0 2006.229.17:08:45.89#ibcon#*after write, iclass 40, count 0 2006.229.17:08:45.89#ibcon#*before return 0, iclass 40, count 0 2006.229.17:08:45.89#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:45.89#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:08:45.89#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:08:45.89#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:08:45.89$vck44/vb=4,4 2006.229.17:08:45.89#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.17:08:45.89#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.17:08:45.89#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:45.89#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:45.95#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:45.95#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:45.95#ibcon#enter wrdev, iclass 4, count 2 2006.229.17:08:45.95#ibcon#first serial, iclass 4, count 2 2006.229.17:08:45.95#ibcon#enter sib2, iclass 4, count 2 2006.229.17:08:45.95#ibcon#flushed, iclass 4, count 2 2006.229.17:08:45.95#ibcon#about to write, iclass 4, count 2 2006.229.17:08:45.95#ibcon#wrote, iclass 4, count 2 2006.229.17:08:45.95#ibcon#about to read 3, iclass 4, count 2 2006.229.17:08:45.97#ibcon#read 3, iclass 4, count 2 2006.229.17:08:45.97#ibcon#about to read 4, iclass 4, count 2 2006.229.17:08:45.97#ibcon#read 4, iclass 4, count 2 2006.229.17:08:45.97#ibcon#about to read 5, iclass 4, count 2 2006.229.17:08:45.97#ibcon#read 5, iclass 4, count 2 2006.229.17:08:45.97#ibcon#about to read 6, iclass 4, count 2 2006.229.17:08:45.97#ibcon#read 6, iclass 4, count 2 2006.229.17:08:45.97#ibcon#end of sib2, iclass 4, count 2 2006.229.17:08:45.97#ibcon#*mode == 0, iclass 4, count 2 2006.229.17:08:45.97#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.17:08:45.97#ibcon#[27=AT04-04\r\n] 2006.229.17:08:45.97#ibcon#*before write, iclass 4, count 2 2006.229.17:08:45.97#ibcon#enter sib2, iclass 4, count 2 2006.229.17:08:45.97#ibcon#flushed, iclass 4, count 2 2006.229.17:08:45.97#ibcon#about to write, iclass 4, count 2 2006.229.17:08:45.97#ibcon#wrote, iclass 4, count 2 2006.229.17:08:45.97#ibcon#about to read 3, iclass 4, count 2 2006.229.17:08:46.00#ibcon#read 3, iclass 4, count 2 2006.229.17:08:46.00#ibcon#about to read 4, iclass 4, count 2 2006.229.17:08:46.00#ibcon#read 4, iclass 4, count 2 2006.229.17:08:46.00#ibcon#about to read 5, iclass 4, count 2 2006.229.17:08:46.00#ibcon#read 5, iclass 4, count 2 2006.229.17:08:46.00#ibcon#about to read 6, iclass 4, count 2 2006.229.17:08:46.00#ibcon#read 6, iclass 4, count 2 2006.229.17:08:46.00#ibcon#end of sib2, iclass 4, count 2 2006.229.17:08:46.00#ibcon#*after write, iclass 4, count 2 2006.229.17:08:46.00#ibcon#*before return 0, iclass 4, count 2 2006.229.17:08:46.00#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:46.00#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:08:46.00#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.17:08:46.00#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:46.00#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:46.12#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:46.12#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:46.12#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:08:46.12#ibcon#first serial, iclass 4, count 0 2006.229.17:08:46.12#ibcon#enter sib2, iclass 4, count 0 2006.229.17:08:46.12#ibcon#flushed, iclass 4, count 0 2006.229.17:08:46.12#ibcon#about to write, iclass 4, count 0 2006.229.17:08:46.12#ibcon#wrote, iclass 4, count 0 2006.229.17:08:46.12#ibcon#about to read 3, iclass 4, count 0 2006.229.17:08:46.14#ibcon#read 3, iclass 4, count 0 2006.229.17:08:46.14#ibcon#about to read 4, iclass 4, count 0 2006.229.17:08:46.14#ibcon#read 4, iclass 4, count 0 2006.229.17:08:46.14#ibcon#about to read 5, iclass 4, count 0 2006.229.17:08:46.14#ibcon#read 5, iclass 4, count 0 2006.229.17:08:46.14#ibcon#about to read 6, iclass 4, count 0 2006.229.17:08:46.14#ibcon#read 6, iclass 4, count 0 2006.229.17:08:46.14#ibcon#end of sib2, iclass 4, count 0 2006.229.17:08:46.14#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:08:46.14#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:08:46.14#ibcon#[27=USB\r\n] 2006.229.17:08:46.14#ibcon#*before write, iclass 4, count 0 2006.229.17:08:46.14#ibcon#enter sib2, iclass 4, count 0 2006.229.17:08:46.14#ibcon#flushed, iclass 4, count 0 2006.229.17:08:46.14#ibcon#about to write, iclass 4, count 0 2006.229.17:08:46.14#ibcon#wrote, iclass 4, count 0 2006.229.17:08:46.14#ibcon#about to read 3, iclass 4, count 0 2006.229.17:08:46.17#ibcon#read 3, iclass 4, count 0 2006.229.17:08:46.17#ibcon#about to read 4, iclass 4, count 0 2006.229.17:08:46.17#ibcon#read 4, iclass 4, count 0 2006.229.17:08:46.17#ibcon#about to read 5, iclass 4, count 0 2006.229.17:08:46.17#ibcon#read 5, iclass 4, count 0 2006.229.17:08:46.17#ibcon#about to read 6, iclass 4, count 0 2006.229.17:08:46.17#ibcon#read 6, iclass 4, count 0 2006.229.17:08:46.17#ibcon#end of sib2, iclass 4, count 0 2006.229.17:08:46.17#ibcon#*after write, iclass 4, count 0 2006.229.17:08:46.17#ibcon#*before return 0, iclass 4, count 0 2006.229.17:08:46.17#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:46.17#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:08:46.17#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:08:46.17#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:08:46.17$vck44/vblo=5,709.99 2006.229.17:08:46.17#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.17:08:46.17#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.17:08:46.17#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:46.17#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:46.17#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:46.17#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:46.17#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:08:46.17#ibcon#first serial, iclass 6, count 0 2006.229.17:08:46.17#ibcon#enter sib2, iclass 6, count 0 2006.229.17:08:46.17#ibcon#flushed, iclass 6, count 0 2006.229.17:08:46.17#ibcon#about to write, iclass 6, count 0 2006.229.17:08:46.17#ibcon#wrote, iclass 6, count 0 2006.229.17:08:46.17#ibcon#about to read 3, iclass 6, count 0 2006.229.17:08:46.19#ibcon#read 3, iclass 6, count 0 2006.229.17:08:46.19#ibcon#about to read 4, iclass 6, count 0 2006.229.17:08:46.19#ibcon#read 4, iclass 6, count 0 2006.229.17:08:46.19#ibcon#about to read 5, iclass 6, count 0 2006.229.17:08:46.19#ibcon#read 5, iclass 6, count 0 2006.229.17:08:46.19#ibcon#about to read 6, iclass 6, count 0 2006.229.17:08:46.19#ibcon#read 6, iclass 6, count 0 2006.229.17:08:46.19#ibcon#end of sib2, iclass 6, count 0 2006.229.17:08:46.19#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:08:46.19#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:08:46.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:08:46.19#ibcon#*before write, iclass 6, count 0 2006.229.17:08:46.19#ibcon#enter sib2, iclass 6, count 0 2006.229.17:08:46.19#ibcon#flushed, iclass 6, count 0 2006.229.17:08:46.19#ibcon#about to write, iclass 6, count 0 2006.229.17:08:46.19#ibcon#wrote, iclass 6, count 0 2006.229.17:08:46.19#ibcon#about to read 3, iclass 6, count 0 2006.229.17:08:46.23#ibcon#read 3, iclass 6, count 0 2006.229.17:08:46.23#ibcon#about to read 4, iclass 6, count 0 2006.229.17:08:46.23#ibcon#read 4, iclass 6, count 0 2006.229.17:08:46.23#ibcon#about to read 5, iclass 6, count 0 2006.229.17:08:46.23#ibcon#read 5, iclass 6, count 0 2006.229.17:08:46.23#ibcon#about to read 6, iclass 6, count 0 2006.229.17:08:46.23#ibcon#read 6, iclass 6, count 0 2006.229.17:08:46.23#ibcon#end of sib2, iclass 6, count 0 2006.229.17:08:46.23#ibcon#*after write, iclass 6, count 0 2006.229.17:08:46.23#ibcon#*before return 0, iclass 6, count 0 2006.229.17:08:46.23#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:46.23#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:08:46.23#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:08:46.23#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:08:46.23$vck44/vb=5,4 2006.229.17:08:46.23#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.17:08:46.23#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.17:08:46.23#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:46.23#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:46.29#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:46.29#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:46.29#ibcon#enter wrdev, iclass 10, count 2 2006.229.17:08:46.29#ibcon#first serial, iclass 10, count 2 2006.229.17:08:46.29#ibcon#enter sib2, iclass 10, count 2 2006.229.17:08:46.29#ibcon#flushed, iclass 10, count 2 2006.229.17:08:46.29#ibcon#about to write, iclass 10, count 2 2006.229.17:08:46.29#ibcon#wrote, iclass 10, count 2 2006.229.17:08:46.29#ibcon#about to read 3, iclass 10, count 2 2006.229.17:08:46.31#ibcon#read 3, iclass 10, count 2 2006.229.17:08:46.31#ibcon#about to read 4, iclass 10, count 2 2006.229.17:08:46.31#ibcon#read 4, iclass 10, count 2 2006.229.17:08:46.31#ibcon#about to read 5, iclass 10, count 2 2006.229.17:08:46.31#ibcon#read 5, iclass 10, count 2 2006.229.17:08:46.31#ibcon#about to read 6, iclass 10, count 2 2006.229.17:08:46.31#ibcon#read 6, iclass 10, count 2 2006.229.17:08:46.31#ibcon#end of sib2, iclass 10, count 2 2006.229.17:08:46.31#ibcon#*mode == 0, iclass 10, count 2 2006.229.17:08:46.31#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.17:08:46.31#ibcon#[27=AT05-04\r\n] 2006.229.17:08:46.31#ibcon#*before write, iclass 10, count 2 2006.229.17:08:46.31#ibcon#enter sib2, iclass 10, count 2 2006.229.17:08:46.31#ibcon#flushed, iclass 10, count 2 2006.229.17:08:46.31#ibcon#about to write, iclass 10, count 2 2006.229.17:08:46.31#ibcon#wrote, iclass 10, count 2 2006.229.17:08:46.31#ibcon#about to read 3, iclass 10, count 2 2006.229.17:08:46.34#ibcon#read 3, iclass 10, count 2 2006.229.17:08:46.34#ibcon#about to read 4, iclass 10, count 2 2006.229.17:08:46.34#ibcon#read 4, iclass 10, count 2 2006.229.17:08:46.34#ibcon#about to read 5, iclass 10, count 2 2006.229.17:08:46.34#ibcon#read 5, iclass 10, count 2 2006.229.17:08:46.34#ibcon#about to read 6, iclass 10, count 2 2006.229.17:08:46.34#ibcon#read 6, iclass 10, count 2 2006.229.17:08:46.34#ibcon#end of sib2, iclass 10, count 2 2006.229.17:08:46.34#ibcon#*after write, iclass 10, count 2 2006.229.17:08:46.34#ibcon#*before return 0, iclass 10, count 2 2006.229.17:08:46.34#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:46.34#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:08:46.34#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.17:08:46.34#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:46.34#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:46.46#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:46.46#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:46.46#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:08:46.46#ibcon#first serial, iclass 10, count 0 2006.229.17:08:46.46#ibcon#enter sib2, iclass 10, count 0 2006.229.17:08:46.46#ibcon#flushed, iclass 10, count 0 2006.229.17:08:46.46#ibcon#about to write, iclass 10, count 0 2006.229.17:08:46.46#ibcon#wrote, iclass 10, count 0 2006.229.17:08:46.46#ibcon#about to read 3, iclass 10, count 0 2006.229.17:08:46.48#ibcon#read 3, iclass 10, count 0 2006.229.17:08:46.48#ibcon#about to read 4, iclass 10, count 0 2006.229.17:08:46.48#ibcon#read 4, iclass 10, count 0 2006.229.17:08:46.48#ibcon#about to read 5, iclass 10, count 0 2006.229.17:08:46.48#ibcon#read 5, iclass 10, count 0 2006.229.17:08:46.48#ibcon#about to read 6, iclass 10, count 0 2006.229.17:08:46.48#ibcon#read 6, iclass 10, count 0 2006.229.17:08:46.48#ibcon#end of sib2, iclass 10, count 0 2006.229.17:08:46.48#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:08:46.48#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:08:46.48#ibcon#[27=USB\r\n] 2006.229.17:08:46.48#ibcon#*before write, iclass 10, count 0 2006.229.17:08:46.48#ibcon#enter sib2, iclass 10, count 0 2006.229.17:08:46.48#ibcon#flushed, iclass 10, count 0 2006.229.17:08:46.48#ibcon#about to write, iclass 10, count 0 2006.229.17:08:46.48#ibcon#wrote, iclass 10, count 0 2006.229.17:08:46.48#ibcon#about to read 3, iclass 10, count 0 2006.229.17:08:46.50#abcon#<5=/07 1.1 2.8 26.981001001.8\r\n> 2006.229.17:08:46.51#ibcon#read 3, iclass 10, count 0 2006.229.17:08:46.51#ibcon#about to read 4, iclass 10, count 0 2006.229.17:08:46.51#ibcon#read 4, iclass 10, count 0 2006.229.17:08:46.51#ibcon#about to read 5, iclass 10, count 0 2006.229.17:08:46.51#ibcon#read 5, iclass 10, count 0 2006.229.17:08:46.51#ibcon#about to read 6, iclass 10, count 0 2006.229.17:08:46.51#ibcon#read 6, iclass 10, count 0 2006.229.17:08:46.51#ibcon#end of sib2, iclass 10, count 0 2006.229.17:08:46.51#ibcon#*after write, iclass 10, count 0 2006.229.17:08:46.51#ibcon#*before return 0, iclass 10, count 0 2006.229.17:08:46.51#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:46.51#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:08:46.51#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:08:46.51#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:08:46.51$vck44/vblo=6,719.99 2006.229.17:08:46.51#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.17:08:46.51#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.17:08:46.51#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:46.51#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:08:46.51#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:08:46.51#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:08:46.51#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:08:46.51#ibcon#first serial, iclass 15, count 0 2006.229.17:08:46.51#ibcon#enter sib2, iclass 15, count 0 2006.229.17:08:46.51#ibcon#flushed, iclass 15, count 0 2006.229.17:08:46.51#ibcon#about to write, iclass 15, count 0 2006.229.17:08:46.51#ibcon#wrote, iclass 15, count 0 2006.229.17:08:46.51#ibcon#about to read 3, iclass 15, count 0 2006.229.17:08:46.52#abcon#{5=INTERFACE CLEAR} 2006.229.17:08:46.53#ibcon#read 3, iclass 15, count 0 2006.229.17:08:46.53#ibcon#about to read 4, iclass 15, count 0 2006.229.17:08:46.53#ibcon#read 4, iclass 15, count 0 2006.229.17:08:46.53#ibcon#about to read 5, iclass 15, count 0 2006.229.17:08:46.53#ibcon#read 5, iclass 15, count 0 2006.229.17:08:46.53#ibcon#about to read 6, iclass 15, count 0 2006.229.17:08:46.53#ibcon#read 6, iclass 15, count 0 2006.229.17:08:46.53#ibcon#end of sib2, iclass 15, count 0 2006.229.17:08:46.53#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:08:46.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:08:46.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:08:46.53#ibcon#*before write, iclass 15, count 0 2006.229.17:08:46.53#ibcon#enter sib2, iclass 15, count 0 2006.229.17:08:46.53#ibcon#flushed, iclass 15, count 0 2006.229.17:08:46.53#ibcon#about to write, iclass 15, count 0 2006.229.17:08:46.53#ibcon#wrote, iclass 15, count 0 2006.229.17:08:46.53#ibcon#about to read 3, iclass 15, count 0 2006.229.17:08:46.57#ibcon#read 3, iclass 15, count 0 2006.229.17:08:46.57#ibcon#about to read 4, iclass 15, count 0 2006.229.17:08:46.57#ibcon#read 4, iclass 15, count 0 2006.229.17:08:46.57#ibcon#about to read 5, iclass 15, count 0 2006.229.17:08:46.57#ibcon#read 5, iclass 15, count 0 2006.229.17:08:46.57#ibcon#about to read 6, iclass 15, count 0 2006.229.17:08:46.57#ibcon#read 6, iclass 15, count 0 2006.229.17:08:46.57#ibcon#end of sib2, iclass 15, count 0 2006.229.17:08:46.57#ibcon#*after write, iclass 15, count 0 2006.229.17:08:46.57#ibcon#*before return 0, iclass 15, count 0 2006.229.17:08:46.57#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:08:46.57#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:08:46.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:08:46.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:08:46.57$vck44/vb=6,4 2006.229.17:08:46.57#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.17:08:46.57#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.17:08:46.57#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:46.57#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:46.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:08:46.63#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:46.63#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:46.63#ibcon#enter wrdev, iclass 18, count 2 2006.229.17:08:46.63#ibcon#first serial, iclass 18, count 2 2006.229.17:08:46.63#ibcon#enter sib2, iclass 18, count 2 2006.229.17:08:46.63#ibcon#flushed, iclass 18, count 2 2006.229.17:08:46.63#ibcon#about to write, iclass 18, count 2 2006.229.17:08:46.63#ibcon#wrote, iclass 18, count 2 2006.229.17:08:46.63#ibcon#about to read 3, iclass 18, count 2 2006.229.17:08:46.65#ibcon#read 3, iclass 18, count 2 2006.229.17:08:46.65#ibcon#about to read 4, iclass 18, count 2 2006.229.17:08:46.65#ibcon#read 4, iclass 18, count 2 2006.229.17:08:46.65#ibcon#about to read 5, iclass 18, count 2 2006.229.17:08:46.65#ibcon#read 5, iclass 18, count 2 2006.229.17:08:46.65#ibcon#about to read 6, iclass 18, count 2 2006.229.17:08:46.65#ibcon#read 6, iclass 18, count 2 2006.229.17:08:46.65#ibcon#end of sib2, iclass 18, count 2 2006.229.17:08:46.65#ibcon#*mode == 0, iclass 18, count 2 2006.229.17:08:46.65#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.17:08:46.65#ibcon#[27=AT06-04\r\n] 2006.229.17:08:46.65#ibcon#*before write, iclass 18, count 2 2006.229.17:08:46.65#ibcon#enter sib2, iclass 18, count 2 2006.229.17:08:46.65#ibcon#flushed, iclass 18, count 2 2006.229.17:08:46.65#ibcon#about to write, iclass 18, count 2 2006.229.17:08:46.65#ibcon#wrote, iclass 18, count 2 2006.229.17:08:46.65#ibcon#about to read 3, iclass 18, count 2 2006.229.17:08:46.68#ibcon#read 3, iclass 18, count 2 2006.229.17:08:46.68#ibcon#about to read 4, iclass 18, count 2 2006.229.17:08:46.68#ibcon#read 4, iclass 18, count 2 2006.229.17:08:46.68#ibcon#about to read 5, iclass 18, count 2 2006.229.17:08:46.68#ibcon#read 5, iclass 18, count 2 2006.229.17:08:46.68#ibcon#about to read 6, iclass 18, count 2 2006.229.17:08:46.68#ibcon#read 6, iclass 18, count 2 2006.229.17:08:46.68#ibcon#end of sib2, iclass 18, count 2 2006.229.17:08:46.68#ibcon#*after write, iclass 18, count 2 2006.229.17:08:46.68#ibcon#*before return 0, iclass 18, count 2 2006.229.17:08:46.68#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:46.68#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:08:46.68#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.17:08:46.68#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:46.68#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:46.80#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:46.80#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:46.80#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:08:46.80#ibcon#first serial, iclass 18, count 0 2006.229.17:08:46.80#ibcon#enter sib2, iclass 18, count 0 2006.229.17:08:46.80#ibcon#flushed, iclass 18, count 0 2006.229.17:08:46.80#ibcon#about to write, iclass 18, count 0 2006.229.17:08:46.80#ibcon#wrote, iclass 18, count 0 2006.229.17:08:46.80#ibcon#about to read 3, iclass 18, count 0 2006.229.17:08:46.82#ibcon#read 3, iclass 18, count 0 2006.229.17:08:46.82#ibcon#about to read 4, iclass 18, count 0 2006.229.17:08:46.82#ibcon#read 4, iclass 18, count 0 2006.229.17:08:46.82#ibcon#about to read 5, iclass 18, count 0 2006.229.17:08:46.82#ibcon#read 5, iclass 18, count 0 2006.229.17:08:46.82#ibcon#about to read 6, iclass 18, count 0 2006.229.17:08:46.82#ibcon#read 6, iclass 18, count 0 2006.229.17:08:46.82#ibcon#end of sib2, iclass 18, count 0 2006.229.17:08:46.82#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:08:46.82#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:08:46.82#ibcon#[27=USB\r\n] 2006.229.17:08:46.82#ibcon#*before write, iclass 18, count 0 2006.229.17:08:46.82#ibcon#enter sib2, iclass 18, count 0 2006.229.17:08:46.82#ibcon#flushed, iclass 18, count 0 2006.229.17:08:46.82#ibcon#about to write, iclass 18, count 0 2006.229.17:08:46.82#ibcon#wrote, iclass 18, count 0 2006.229.17:08:46.82#ibcon#about to read 3, iclass 18, count 0 2006.229.17:08:46.85#ibcon#read 3, iclass 18, count 0 2006.229.17:08:46.85#ibcon#about to read 4, iclass 18, count 0 2006.229.17:08:46.85#ibcon#read 4, iclass 18, count 0 2006.229.17:08:46.85#ibcon#about to read 5, iclass 18, count 0 2006.229.17:08:46.85#ibcon#read 5, iclass 18, count 0 2006.229.17:08:46.85#ibcon#about to read 6, iclass 18, count 0 2006.229.17:08:46.85#ibcon#read 6, iclass 18, count 0 2006.229.17:08:46.85#ibcon#end of sib2, iclass 18, count 0 2006.229.17:08:46.85#ibcon#*after write, iclass 18, count 0 2006.229.17:08:46.85#ibcon#*before return 0, iclass 18, count 0 2006.229.17:08:46.85#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:46.85#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:08:46.85#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:08:46.85#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:08:46.85$vck44/vblo=7,734.99 2006.229.17:08:46.85#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.17:08:46.85#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.17:08:46.85#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:46.85#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:46.85#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:46.85#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:46.85#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:08:46.85#ibcon#first serial, iclass 20, count 0 2006.229.17:08:46.85#ibcon#enter sib2, iclass 20, count 0 2006.229.17:08:46.85#ibcon#flushed, iclass 20, count 0 2006.229.17:08:46.85#ibcon#about to write, iclass 20, count 0 2006.229.17:08:46.85#ibcon#wrote, iclass 20, count 0 2006.229.17:08:46.85#ibcon#about to read 3, iclass 20, count 0 2006.229.17:08:46.87#ibcon#read 3, iclass 20, count 0 2006.229.17:08:46.87#ibcon#about to read 4, iclass 20, count 0 2006.229.17:08:46.87#ibcon#read 4, iclass 20, count 0 2006.229.17:08:46.87#ibcon#about to read 5, iclass 20, count 0 2006.229.17:08:46.87#ibcon#read 5, iclass 20, count 0 2006.229.17:08:46.87#ibcon#about to read 6, iclass 20, count 0 2006.229.17:08:46.87#ibcon#read 6, iclass 20, count 0 2006.229.17:08:46.87#ibcon#end of sib2, iclass 20, count 0 2006.229.17:08:46.87#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:08:46.87#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:08:46.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:08:46.87#ibcon#*before write, iclass 20, count 0 2006.229.17:08:46.87#ibcon#enter sib2, iclass 20, count 0 2006.229.17:08:46.87#ibcon#flushed, iclass 20, count 0 2006.229.17:08:46.87#ibcon#about to write, iclass 20, count 0 2006.229.17:08:46.87#ibcon#wrote, iclass 20, count 0 2006.229.17:08:46.87#ibcon#about to read 3, iclass 20, count 0 2006.229.17:08:46.91#ibcon#read 3, iclass 20, count 0 2006.229.17:08:46.91#ibcon#about to read 4, iclass 20, count 0 2006.229.17:08:46.91#ibcon#read 4, iclass 20, count 0 2006.229.17:08:46.91#ibcon#about to read 5, iclass 20, count 0 2006.229.17:08:46.91#ibcon#read 5, iclass 20, count 0 2006.229.17:08:46.91#ibcon#about to read 6, iclass 20, count 0 2006.229.17:08:46.91#ibcon#read 6, iclass 20, count 0 2006.229.17:08:46.91#ibcon#end of sib2, iclass 20, count 0 2006.229.17:08:46.91#ibcon#*after write, iclass 20, count 0 2006.229.17:08:46.91#ibcon#*before return 0, iclass 20, count 0 2006.229.17:08:46.91#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:46.91#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:08:46.91#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:08:46.91#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:08:46.91$vck44/vb=7,4 2006.229.17:08:46.91#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.17:08:46.91#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.17:08:46.91#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:46.91#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:46.97#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:46.97#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:46.97#ibcon#enter wrdev, iclass 22, count 2 2006.229.17:08:46.97#ibcon#first serial, iclass 22, count 2 2006.229.17:08:46.97#ibcon#enter sib2, iclass 22, count 2 2006.229.17:08:46.97#ibcon#flushed, iclass 22, count 2 2006.229.17:08:46.97#ibcon#about to write, iclass 22, count 2 2006.229.17:08:46.97#ibcon#wrote, iclass 22, count 2 2006.229.17:08:46.97#ibcon#about to read 3, iclass 22, count 2 2006.229.17:08:46.99#ibcon#read 3, iclass 22, count 2 2006.229.17:08:46.99#ibcon#about to read 4, iclass 22, count 2 2006.229.17:08:46.99#ibcon#read 4, iclass 22, count 2 2006.229.17:08:46.99#ibcon#about to read 5, iclass 22, count 2 2006.229.17:08:46.99#ibcon#read 5, iclass 22, count 2 2006.229.17:08:46.99#ibcon#about to read 6, iclass 22, count 2 2006.229.17:08:46.99#ibcon#read 6, iclass 22, count 2 2006.229.17:08:46.99#ibcon#end of sib2, iclass 22, count 2 2006.229.17:08:46.99#ibcon#*mode == 0, iclass 22, count 2 2006.229.17:08:46.99#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.17:08:46.99#ibcon#[27=AT07-04\r\n] 2006.229.17:08:46.99#ibcon#*before write, iclass 22, count 2 2006.229.17:08:46.99#ibcon#enter sib2, iclass 22, count 2 2006.229.17:08:46.99#ibcon#flushed, iclass 22, count 2 2006.229.17:08:46.99#ibcon#about to write, iclass 22, count 2 2006.229.17:08:46.99#ibcon#wrote, iclass 22, count 2 2006.229.17:08:46.99#ibcon#about to read 3, iclass 22, count 2 2006.229.17:08:47.02#ibcon#read 3, iclass 22, count 2 2006.229.17:08:47.02#ibcon#about to read 4, iclass 22, count 2 2006.229.17:08:47.02#ibcon#read 4, iclass 22, count 2 2006.229.17:08:47.02#ibcon#about to read 5, iclass 22, count 2 2006.229.17:08:47.02#ibcon#read 5, iclass 22, count 2 2006.229.17:08:47.02#ibcon#about to read 6, iclass 22, count 2 2006.229.17:08:47.02#ibcon#read 6, iclass 22, count 2 2006.229.17:08:47.02#ibcon#end of sib2, iclass 22, count 2 2006.229.17:08:47.02#ibcon#*after write, iclass 22, count 2 2006.229.17:08:47.02#ibcon#*before return 0, iclass 22, count 2 2006.229.17:08:47.02#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:47.02#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:08:47.02#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.17:08:47.02#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:47.02#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:47.14#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:47.14#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:47.14#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:08:47.14#ibcon#first serial, iclass 22, count 0 2006.229.17:08:47.14#ibcon#enter sib2, iclass 22, count 0 2006.229.17:08:47.14#ibcon#flushed, iclass 22, count 0 2006.229.17:08:47.14#ibcon#about to write, iclass 22, count 0 2006.229.17:08:47.14#ibcon#wrote, iclass 22, count 0 2006.229.17:08:47.14#ibcon#about to read 3, iclass 22, count 0 2006.229.17:08:47.16#ibcon#read 3, iclass 22, count 0 2006.229.17:08:47.16#ibcon#about to read 4, iclass 22, count 0 2006.229.17:08:47.16#ibcon#read 4, iclass 22, count 0 2006.229.17:08:47.16#ibcon#about to read 5, iclass 22, count 0 2006.229.17:08:47.16#ibcon#read 5, iclass 22, count 0 2006.229.17:08:47.16#ibcon#about to read 6, iclass 22, count 0 2006.229.17:08:47.16#ibcon#read 6, iclass 22, count 0 2006.229.17:08:47.16#ibcon#end of sib2, iclass 22, count 0 2006.229.17:08:47.16#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:08:47.16#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:08:47.16#ibcon#[27=USB\r\n] 2006.229.17:08:47.16#ibcon#*before write, iclass 22, count 0 2006.229.17:08:47.16#ibcon#enter sib2, iclass 22, count 0 2006.229.17:08:47.16#ibcon#flushed, iclass 22, count 0 2006.229.17:08:47.16#ibcon#about to write, iclass 22, count 0 2006.229.17:08:47.16#ibcon#wrote, iclass 22, count 0 2006.229.17:08:47.16#ibcon#about to read 3, iclass 22, count 0 2006.229.17:08:47.19#ibcon#read 3, iclass 22, count 0 2006.229.17:08:47.19#ibcon#about to read 4, iclass 22, count 0 2006.229.17:08:47.19#ibcon#read 4, iclass 22, count 0 2006.229.17:08:47.19#ibcon#about to read 5, iclass 22, count 0 2006.229.17:08:47.19#ibcon#read 5, iclass 22, count 0 2006.229.17:08:47.19#ibcon#about to read 6, iclass 22, count 0 2006.229.17:08:47.19#ibcon#read 6, iclass 22, count 0 2006.229.17:08:47.19#ibcon#end of sib2, iclass 22, count 0 2006.229.17:08:47.19#ibcon#*after write, iclass 22, count 0 2006.229.17:08:47.19#ibcon#*before return 0, iclass 22, count 0 2006.229.17:08:47.19#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:47.19#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:08:47.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:08:47.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:08:47.19$vck44/vblo=8,744.99 2006.229.17:08:47.19#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.17:08:47.19#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.17:08:47.19#ibcon#ireg 17 cls_cnt 0 2006.229.17:08:47.19#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:47.19#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:47.19#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:47.19#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:08:47.19#ibcon#first serial, iclass 24, count 0 2006.229.17:08:47.19#ibcon#enter sib2, iclass 24, count 0 2006.229.17:08:47.19#ibcon#flushed, iclass 24, count 0 2006.229.17:08:47.19#ibcon#about to write, iclass 24, count 0 2006.229.17:08:47.19#ibcon#wrote, iclass 24, count 0 2006.229.17:08:47.19#ibcon#about to read 3, iclass 24, count 0 2006.229.17:08:47.21#ibcon#read 3, iclass 24, count 0 2006.229.17:08:47.21#ibcon#about to read 4, iclass 24, count 0 2006.229.17:08:47.21#ibcon#read 4, iclass 24, count 0 2006.229.17:08:47.21#ibcon#about to read 5, iclass 24, count 0 2006.229.17:08:47.21#ibcon#read 5, iclass 24, count 0 2006.229.17:08:47.21#ibcon#about to read 6, iclass 24, count 0 2006.229.17:08:47.21#ibcon#read 6, iclass 24, count 0 2006.229.17:08:47.21#ibcon#end of sib2, iclass 24, count 0 2006.229.17:08:47.21#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:08:47.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:08:47.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:08:47.21#ibcon#*before write, iclass 24, count 0 2006.229.17:08:47.21#ibcon#enter sib2, iclass 24, count 0 2006.229.17:08:47.21#ibcon#flushed, iclass 24, count 0 2006.229.17:08:47.21#ibcon#about to write, iclass 24, count 0 2006.229.17:08:47.21#ibcon#wrote, iclass 24, count 0 2006.229.17:08:47.21#ibcon#about to read 3, iclass 24, count 0 2006.229.17:08:47.25#ibcon#read 3, iclass 24, count 0 2006.229.17:08:47.25#ibcon#about to read 4, iclass 24, count 0 2006.229.17:08:47.25#ibcon#read 4, iclass 24, count 0 2006.229.17:08:47.25#ibcon#about to read 5, iclass 24, count 0 2006.229.17:08:47.25#ibcon#read 5, iclass 24, count 0 2006.229.17:08:47.25#ibcon#about to read 6, iclass 24, count 0 2006.229.17:08:47.25#ibcon#read 6, iclass 24, count 0 2006.229.17:08:47.25#ibcon#end of sib2, iclass 24, count 0 2006.229.17:08:47.25#ibcon#*after write, iclass 24, count 0 2006.229.17:08:47.25#ibcon#*before return 0, iclass 24, count 0 2006.229.17:08:47.25#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:47.25#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:08:47.25#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:08:47.25#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:08:47.25$vck44/vb=8,4 2006.229.17:08:47.25#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.17:08:47.25#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.17:08:47.25#ibcon#ireg 11 cls_cnt 2 2006.229.17:08:47.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:47.31#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:47.31#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:47.31#ibcon#enter wrdev, iclass 26, count 2 2006.229.17:08:47.31#ibcon#first serial, iclass 26, count 2 2006.229.17:08:47.31#ibcon#enter sib2, iclass 26, count 2 2006.229.17:08:47.31#ibcon#flushed, iclass 26, count 2 2006.229.17:08:47.31#ibcon#about to write, iclass 26, count 2 2006.229.17:08:47.31#ibcon#wrote, iclass 26, count 2 2006.229.17:08:47.31#ibcon#about to read 3, iclass 26, count 2 2006.229.17:08:47.33#ibcon#read 3, iclass 26, count 2 2006.229.17:08:47.33#ibcon#about to read 4, iclass 26, count 2 2006.229.17:08:47.33#ibcon#read 4, iclass 26, count 2 2006.229.17:08:47.33#ibcon#about to read 5, iclass 26, count 2 2006.229.17:08:47.33#ibcon#read 5, iclass 26, count 2 2006.229.17:08:47.33#ibcon#about to read 6, iclass 26, count 2 2006.229.17:08:47.33#ibcon#read 6, iclass 26, count 2 2006.229.17:08:47.33#ibcon#end of sib2, iclass 26, count 2 2006.229.17:08:47.33#ibcon#*mode == 0, iclass 26, count 2 2006.229.17:08:47.33#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.17:08:47.33#ibcon#[27=AT08-04\r\n] 2006.229.17:08:47.33#ibcon#*before write, iclass 26, count 2 2006.229.17:08:47.33#ibcon#enter sib2, iclass 26, count 2 2006.229.17:08:47.33#ibcon#flushed, iclass 26, count 2 2006.229.17:08:47.33#ibcon#about to write, iclass 26, count 2 2006.229.17:08:47.33#ibcon#wrote, iclass 26, count 2 2006.229.17:08:47.33#ibcon#about to read 3, iclass 26, count 2 2006.229.17:08:47.36#ibcon#read 3, iclass 26, count 2 2006.229.17:08:47.36#ibcon#about to read 4, iclass 26, count 2 2006.229.17:08:47.36#ibcon#read 4, iclass 26, count 2 2006.229.17:08:47.36#ibcon#about to read 5, iclass 26, count 2 2006.229.17:08:47.36#ibcon#read 5, iclass 26, count 2 2006.229.17:08:47.36#ibcon#about to read 6, iclass 26, count 2 2006.229.17:08:47.36#ibcon#read 6, iclass 26, count 2 2006.229.17:08:47.36#ibcon#end of sib2, iclass 26, count 2 2006.229.17:08:47.36#ibcon#*after write, iclass 26, count 2 2006.229.17:08:47.36#ibcon#*before return 0, iclass 26, count 2 2006.229.17:08:47.36#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:47.36#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:08:47.36#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.17:08:47.36#ibcon#ireg 7 cls_cnt 0 2006.229.17:08:47.36#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:47.48#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:47.48#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:47.48#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:08:47.48#ibcon#first serial, iclass 26, count 0 2006.229.17:08:47.48#ibcon#enter sib2, iclass 26, count 0 2006.229.17:08:47.48#ibcon#flushed, iclass 26, count 0 2006.229.17:08:47.48#ibcon#about to write, iclass 26, count 0 2006.229.17:08:47.48#ibcon#wrote, iclass 26, count 0 2006.229.17:08:47.48#ibcon#about to read 3, iclass 26, count 0 2006.229.17:08:47.50#ibcon#read 3, iclass 26, count 0 2006.229.17:08:47.50#ibcon#about to read 4, iclass 26, count 0 2006.229.17:08:47.50#ibcon#read 4, iclass 26, count 0 2006.229.17:08:47.50#ibcon#about to read 5, iclass 26, count 0 2006.229.17:08:47.50#ibcon#read 5, iclass 26, count 0 2006.229.17:08:47.50#ibcon#about to read 6, iclass 26, count 0 2006.229.17:08:47.50#ibcon#read 6, iclass 26, count 0 2006.229.17:08:47.50#ibcon#end of sib2, iclass 26, count 0 2006.229.17:08:47.50#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:08:47.50#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:08:47.50#ibcon#[27=USB\r\n] 2006.229.17:08:47.50#ibcon#*before write, iclass 26, count 0 2006.229.17:08:47.50#ibcon#enter sib2, iclass 26, count 0 2006.229.17:08:47.50#ibcon#flushed, iclass 26, count 0 2006.229.17:08:47.50#ibcon#about to write, iclass 26, count 0 2006.229.17:08:47.50#ibcon#wrote, iclass 26, count 0 2006.229.17:08:47.50#ibcon#about to read 3, iclass 26, count 0 2006.229.17:08:47.53#ibcon#read 3, iclass 26, count 0 2006.229.17:08:47.53#ibcon#about to read 4, iclass 26, count 0 2006.229.17:08:47.53#ibcon#read 4, iclass 26, count 0 2006.229.17:08:47.53#ibcon#about to read 5, iclass 26, count 0 2006.229.17:08:47.53#ibcon#read 5, iclass 26, count 0 2006.229.17:08:47.53#ibcon#about to read 6, iclass 26, count 0 2006.229.17:08:47.53#ibcon#read 6, iclass 26, count 0 2006.229.17:08:47.53#ibcon#end of sib2, iclass 26, count 0 2006.229.17:08:47.53#ibcon#*after write, iclass 26, count 0 2006.229.17:08:47.53#ibcon#*before return 0, iclass 26, count 0 2006.229.17:08:47.53#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:47.53#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:08:47.53#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:08:47.53#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:08:47.53$vck44/vabw=wide 2006.229.17:08:47.53#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.17:08:47.53#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.17:08:47.53#ibcon#ireg 8 cls_cnt 0 2006.229.17:08:47.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:47.53#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:47.53#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:47.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:08:47.53#ibcon#first serial, iclass 28, count 0 2006.229.17:08:47.53#ibcon#enter sib2, iclass 28, count 0 2006.229.17:08:47.53#ibcon#flushed, iclass 28, count 0 2006.229.17:08:47.53#ibcon#about to write, iclass 28, count 0 2006.229.17:08:47.53#ibcon#wrote, iclass 28, count 0 2006.229.17:08:47.53#ibcon#about to read 3, iclass 28, count 0 2006.229.17:08:47.55#ibcon#read 3, iclass 28, count 0 2006.229.17:08:47.55#ibcon#about to read 4, iclass 28, count 0 2006.229.17:08:47.55#ibcon#read 4, iclass 28, count 0 2006.229.17:08:47.55#ibcon#about to read 5, iclass 28, count 0 2006.229.17:08:47.55#ibcon#read 5, iclass 28, count 0 2006.229.17:08:47.55#ibcon#about to read 6, iclass 28, count 0 2006.229.17:08:47.55#ibcon#read 6, iclass 28, count 0 2006.229.17:08:47.55#ibcon#end of sib2, iclass 28, count 0 2006.229.17:08:47.55#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:08:47.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:08:47.55#ibcon#[25=BW32\r\n] 2006.229.17:08:47.55#ibcon#*before write, iclass 28, count 0 2006.229.17:08:47.55#ibcon#enter sib2, iclass 28, count 0 2006.229.17:08:47.55#ibcon#flushed, iclass 28, count 0 2006.229.17:08:47.55#ibcon#about to write, iclass 28, count 0 2006.229.17:08:47.55#ibcon#wrote, iclass 28, count 0 2006.229.17:08:47.55#ibcon#about to read 3, iclass 28, count 0 2006.229.17:08:47.58#ibcon#read 3, iclass 28, count 0 2006.229.17:08:47.58#ibcon#about to read 4, iclass 28, count 0 2006.229.17:08:47.58#ibcon#read 4, iclass 28, count 0 2006.229.17:08:47.58#ibcon#about to read 5, iclass 28, count 0 2006.229.17:08:47.58#ibcon#read 5, iclass 28, count 0 2006.229.17:08:47.58#ibcon#about to read 6, iclass 28, count 0 2006.229.17:08:47.58#ibcon#read 6, iclass 28, count 0 2006.229.17:08:47.58#ibcon#end of sib2, iclass 28, count 0 2006.229.17:08:47.58#ibcon#*after write, iclass 28, count 0 2006.229.17:08:47.58#ibcon#*before return 0, iclass 28, count 0 2006.229.17:08:47.58#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:47.58#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:08:47.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:08:47.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:08:47.58$vck44/vbbw=wide 2006.229.17:08:47.58#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:08:47.58#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:08:47.58#ibcon#ireg 8 cls_cnt 0 2006.229.17:08:47.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:08:47.65#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:08:47.65#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:08:47.65#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:08:47.65#ibcon#first serial, iclass 30, count 0 2006.229.17:08:47.65#ibcon#enter sib2, iclass 30, count 0 2006.229.17:08:47.65#ibcon#flushed, iclass 30, count 0 2006.229.17:08:47.65#ibcon#about to write, iclass 30, count 0 2006.229.17:08:47.65#ibcon#wrote, iclass 30, count 0 2006.229.17:08:47.65#ibcon#about to read 3, iclass 30, count 0 2006.229.17:08:47.67#ibcon#read 3, iclass 30, count 0 2006.229.17:08:47.67#ibcon#about to read 4, iclass 30, count 0 2006.229.17:08:47.67#ibcon#read 4, iclass 30, count 0 2006.229.17:08:47.67#ibcon#about to read 5, iclass 30, count 0 2006.229.17:08:47.67#ibcon#read 5, iclass 30, count 0 2006.229.17:08:47.67#ibcon#about to read 6, iclass 30, count 0 2006.229.17:08:47.67#ibcon#read 6, iclass 30, count 0 2006.229.17:08:47.67#ibcon#end of sib2, iclass 30, count 0 2006.229.17:08:47.67#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:08:47.67#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:08:47.67#ibcon#[27=BW32\r\n] 2006.229.17:08:47.67#ibcon#*before write, iclass 30, count 0 2006.229.17:08:47.67#ibcon#enter sib2, iclass 30, count 0 2006.229.17:08:47.67#ibcon#flushed, iclass 30, count 0 2006.229.17:08:47.67#ibcon#about to write, iclass 30, count 0 2006.229.17:08:47.67#ibcon#wrote, iclass 30, count 0 2006.229.17:08:47.67#ibcon#about to read 3, iclass 30, count 0 2006.229.17:08:47.70#ibcon#read 3, iclass 30, count 0 2006.229.17:08:47.70#ibcon#about to read 4, iclass 30, count 0 2006.229.17:08:47.70#ibcon#read 4, iclass 30, count 0 2006.229.17:08:47.70#ibcon#about to read 5, iclass 30, count 0 2006.229.17:08:47.70#ibcon#read 5, iclass 30, count 0 2006.229.17:08:47.70#ibcon#about to read 6, iclass 30, count 0 2006.229.17:08:47.70#ibcon#read 6, iclass 30, count 0 2006.229.17:08:47.70#ibcon#end of sib2, iclass 30, count 0 2006.229.17:08:47.70#ibcon#*after write, iclass 30, count 0 2006.229.17:08:47.70#ibcon#*before return 0, iclass 30, count 0 2006.229.17:08:47.70#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:08:47.70#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:08:47.70#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:08:47.70#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:08:47.70$setupk4/ifdk4 2006.229.17:08:47.70$ifdk4/lo= 2006.229.17:08:47.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:08:47.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:08:47.70$ifdk4/patch= 2006.229.17:08:47.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:08:47.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:08:47.70$setupk4/!*+20s 2006.229.17:08:56.67#abcon#<5=/07 1.1 2.8 26.981001001.8\r\n> 2006.229.17:08:56.69#abcon#{5=INTERFACE CLEAR} 2006.229.17:08:56.75#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:09:02.20$setupk4/"tpicd 2006.229.17:09:02.20$setupk4/echo=off 2006.229.17:09:02.20$setupk4/xlog=off 2006.229.17:09:02.20:!2006.229.17:12:40 2006.229.17:09:06.14#trakl#Source acquired 2006.229.17:09:08.14#flagr#flagr/antenna,acquired 2006.229.17:12:40.01:preob 2006.229.17:12:41.14/onsource/TRACKING 2006.229.17:12:41.15:!2006.229.17:12:50 2006.229.17:12:50.01:"tape 2006.229.17:12:50.01:"st=record 2006.229.17:12:50.02:data_valid=on 2006.229.17:12:50.02:midob 2006.229.17:12:51.14/onsource/TRACKING 2006.229.17:12:51.15/wx/27.00,1001.8,100 2006.229.17:12:51.33/cable/+6.4155E-03 2006.229.17:12:52.42/va/01,08,usb,yes,49,52 2006.229.17:12:52.42/va/02,07,usb,yes,53,53 2006.229.17:12:52.42/va/03,06,usb,yes,64,68 2006.229.17:12:52.42/va/04,07,usb,yes,55,57 2006.229.17:12:52.42/va/05,04,usb,yes,49,50 2006.229.17:12:52.42/va/06,04,usb,yes,54,54 2006.229.17:12:52.42/va/07,05,usb,yes,48,49 2006.229.17:12:52.42/va/08,06,usb,yes,36,43 2006.229.17:12:52.65/valo/01,524.99,yes,locked 2006.229.17:12:52.65/valo/02,534.99,yes,locked 2006.229.17:12:52.65/valo/03,564.99,yes,locked 2006.229.17:12:52.65/valo/04,624.99,yes,locked 2006.229.17:12:52.65/valo/05,734.99,yes,locked 2006.229.17:12:52.65/valo/06,814.99,yes,locked 2006.229.17:12:52.65/valo/07,864.99,yes,locked 2006.229.17:12:52.65/valo/08,884.99,yes,locked 2006.229.17:12:53.74/vb/01,04,usb,yes,45,43 2006.229.17:12:53.74/vb/02,04,usb,yes,48,48 2006.229.17:12:53.74/vb/03,04,usb,yes,45,49 2006.229.17:12:53.74/vb/04,04,usb,yes,50,49 2006.229.17:12:53.74/vb/05,04,usb,yes,40,44 2006.229.17:12:53.74/vb/06,04,usb,yes,47,42 2006.229.17:12:53.74/vb/07,04,usb,yes,46,46 2006.229.17:12:53.74/vb/08,04,usb,yes,42,47 2006.229.17:12:53.98/vblo/01,629.99,yes,locked 2006.229.17:12:53.98/vblo/02,634.99,yes,locked 2006.229.17:12:53.98/vblo/03,649.99,yes,locked 2006.229.17:12:53.98/vblo/04,679.99,yes,locked 2006.229.17:12:53.98/vblo/05,709.99,yes,locked 2006.229.17:12:53.98/vblo/06,719.99,yes,locked 2006.229.17:12:53.98/vblo/07,734.99,yes,locked 2006.229.17:12:53.98/vblo/08,744.99,yes,locked 2006.229.17:12:54.13/vabw/8 2006.229.17:12:54.28/vbbw/8 2006.229.17:12:54.37/xfe/off,on,12.2 2006.229.17:12:54.75/ifatt/23,28,28,28 2006.229.17:12:55.07/fmout-gps/S +4.50E-07 2006.229.17:12:55.12:!2006.229.17:13:40 2006.229.17:13:40.01:data_valid=off 2006.229.17:13:40.02:"et 2006.229.17:13:40.02:!+3s 2006.229.17:13:43.04:"tape 2006.229.17:13:43.04:postob 2006.229.17:13:43.18/cable/+6.4167E-03 2006.229.17:13:43.19/wx/27.00,1001.8,100 2006.229.17:13:43.24/fmout-gps/S +4.51E-07 2006.229.17:13:43.24:scan_name=229-1715,jd0608,160 2006.229.17:13:43.25:source=2201+315,220314.98,314538.3,2000.0,cw 2006.229.17:13:45.14#flagr#flagr/antenna,new-source 2006.229.17:13:45.15:checkk5 2006.229.17:13:45.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:13:45.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:13:46.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:13:46.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:13:47.14/chk_obsdata//k5ts1/T2291712??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:13:47.56/chk_obsdata//k5ts2/T2291712??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:13:47.95/chk_obsdata//k5ts3/T2291712??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:13:48.35/chk_obsdata//k5ts4/T2291712??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:13:49.10/k5log//k5ts1_log_newline 2006.229.17:13:49.81/k5log//k5ts2_log_newline 2006.229.17:13:50.52/k5log//k5ts3_log_newline 2006.229.17:13:51.22/k5log//k5ts4_log_newline 2006.229.17:13:51.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:13:51.25:setupk4=1 2006.229.17:13:51.25$setupk4/echo=on 2006.229.17:13:51.25$setupk4/pcalon 2006.229.17:13:51.25$pcalon/"no phase cal control is implemented here 2006.229.17:13:51.25$setupk4/"tpicd=stop 2006.229.17:13:51.25$setupk4/"rec=synch_on 2006.229.17:13:51.25$setupk4/"rec_mode=128 2006.229.17:13:51.25$setupk4/!* 2006.229.17:13:51.25$setupk4/recpk4 2006.229.17:13:51.25$recpk4/recpatch= 2006.229.17:13:51.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:13:51.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:13:51.26$setupk4/vck44 2006.229.17:13:51.26$vck44/valo=1,524.99 2006.229.17:13:51.26#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.17:13:51.26#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.17:13:51.26#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:51.26#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:51.26#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:51.26#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:51.26#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:13:51.26#ibcon#first serial, iclass 5, count 0 2006.229.17:13:51.26#ibcon#enter sib2, iclass 5, count 0 2006.229.17:13:51.26#ibcon#flushed, iclass 5, count 0 2006.229.17:13:51.26#ibcon#about to write, iclass 5, count 0 2006.229.17:13:51.26#ibcon#wrote, iclass 5, count 0 2006.229.17:13:51.26#ibcon#about to read 3, iclass 5, count 0 2006.229.17:13:51.27#ibcon#read 3, iclass 5, count 0 2006.229.17:13:51.27#ibcon#about to read 4, iclass 5, count 0 2006.229.17:13:51.27#ibcon#read 4, iclass 5, count 0 2006.229.17:13:51.27#ibcon#about to read 5, iclass 5, count 0 2006.229.17:13:51.27#ibcon#read 5, iclass 5, count 0 2006.229.17:13:51.27#ibcon#about to read 6, iclass 5, count 0 2006.229.17:13:51.27#ibcon#read 6, iclass 5, count 0 2006.229.17:13:51.27#ibcon#end of sib2, iclass 5, count 0 2006.229.17:13:51.27#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:13:51.27#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:13:51.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:13:51.27#ibcon#*before write, iclass 5, count 0 2006.229.17:13:51.27#ibcon#enter sib2, iclass 5, count 0 2006.229.17:13:51.27#ibcon#flushed, iclass 5, count 0 2006.229.17:13:51.27#ibcon#about to write, iclass 5, count 0 2006.229.17:13:51.27#ibcon#wrote, iclass 5, count 0 2006.229.17:13:51.27#ibcon#about to read 3, iclass 5, count 0 2006.229.17:13:51.32#ibcon#read 3, iclass 5, count 0 2006.229.17:13:51.32#ibcon#about to read 4, iclass 5, count 0 2006.229.17:13:51.32#ibcon#read 4, iclass 5, count 0 2006.229.17:13:51.32#ibcon#about to read 5, iclass 5, count 0 2006.229.17:13:51.32#ibcon#read 5, iclass 5, count 0 2006.229.17:13:51.32#ibcon#about to read 6, iclass 5, count 0 2006.229.17:13:51.32#ibcon#read 6, iclass 5, count 0 2006.229.17:13:51.32#ibcon#end of sib2, iclass 5, count 0 2006.229.17:13:51.32#ibcon#*after write, iclass 5, count 0 2006.229.17:13:51.32#ibcon#*before return 0, iclass 5, count 0 2006.229.17:13:51.32#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:51.32#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:51.32#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:13:51.32#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:13:51.32$vck44/va=1,8 2006.229.17:13:51.33#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.17:13:51.33#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.17:13:51.33#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:51.33#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:51.33#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:51.33#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:51.33#ibcon#enter wrdev, iclass 7, count 2 2006.229.17:13:51.33#ibcon#first serial, iclass 7, count 2 2006.229.17:13:51.33#ibcon#enter sib2, iclass 7, count 2 2006.229.17:13:51.33#ibcon#flushed, iclass 7, count 2 2006.229.17:13:51.33#ibcon#about to write, iclass 7, count 2 2006.229.17:13:51.33#ibcon#wrote, iclass 7, count 2 2006.229.17:13:51.33#ibcon#about to read 3, iclass 7, count 2 2006.229.17:13:51.34#ibcon#read 3, iclass 7, count 2 2006.229.17:13:51.34#ibcon#about to read 4, iclass 7, count 2 2006.229.17:13:51.34#ibcon#read 4, iclass 7, count 2 2006.229.17:13:51.34#ibcon#about to read 5, iclass 7, count 2 2006.229.17:13:51.34#ibcon#read 5, iclass 7, count 2 2006.229.17:13:51.34#ibcon#about to read 6, iclass 7, count 2 2006.229.17:13:51.34#ibcon#read 6, iclass 7, count 2 2006.229.17:13:51.34#ibcon#end of sib2, iclass 7, count 2 2006.229.17:13:51.34#ibcon#*mode == 0, iclass 7, count 2 2006.229.17:13:51.34#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.17:13:51.34#ibcon#[25=AT01-08\r\n] 2006.229.17:13:51.34#ibcon#*before write, iclass 7, count 2 2006.229.17:13:51.34#ibcon#enter sib2, iclass 7, count 2 2006.229.17:13:51.34#ibcon#flushed, iclass 7, count 2 2006.229.17:13:51.34#ibcon#about to write, iclass 7, count 2 2006.229.17:13:51.34#ibcon#wrote, iclass 7, count 2 2006.229.17:13:51.34#ibcon#about to read 3, iclass 7, count 2 2006.229.17:13:51.37#ibcon#read 3, iclass 7, count 2 2006.229.17:13:51.37#ibcon#about to read 4, iclass 7, count 2 2006.229.17:13:51.37#ibcon#read 4, iclass 7, count 2 2006.229.17:13:51.37#ibcon#about to read 5, iclass 7, count 2 2006.229.17:13:51.37#ibcon#read 5, iclass 7, count 2 2006.229.17:13:51.37#ibcon#about to read 6, iclass 7, count 2 2006.229.17:13:51.37#ibcon#read 6, iclass 7, count 2 2006.229.17:13:51.37#ibcon#end of sib2, iclass 7, count 2 2006.229.17:13:51.37#ibcon#*after write, iclass 7, count 2 2006.229.17:13:51.37#ibcon#*before return 0, iclass 7, count 2 2006.229.17:13:51.37#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:51.37#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:51.37#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.17:13:51.37#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:51.37#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:51.49#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:51.49#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:51.49#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:13:51.49#ibcon#first serial, iclass 7, count 0 2006.229.17:13:51.49#ibcon#enter sib2, iclass 7, count 0 2006.229.17:13:51.49#ibcon#flushed, iclass 7, count 0 2006.229.17:13:51.49#ibcon#about to write, iclass 7, count 0 2006.229.17:13:51.49#ibcon#wrote, iclass 7, count 0 2006.229.17:13:51.49#ibcon#about to read 3, iclass 7, count 0 2006.229.17:13:51.51#ibcon#read 3, iclass 7, count 0 2006.229.17:13:51.51#ibcon#about to read 4, iclass 7, count 0 2006.229.17:13:51.51#ibcon#read 4, iclass 7, count 0 2006.229.17:13:51.51#ibcon#about to read 5, iclass 7, count 0 2006.229.17:13:51.51#ibcon#read 5, iclass 7, count 0 2006.229.17:13:51.51#ibcon#about to read 6, iclass 7, count 0 2006.229.17:13:51.51#ibcon#read 6, iclass 7, count 0 2006.229.17:13:51.51#ibcon#end of sib2, iclass 7, count 0 2006.229.17:13:51.51#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:13:51.51#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:13:51.51#ibcon#[25=USB\r\n] 2006.229.17:13:51.51#ibcon#*before write, iclass 7, count 0 2006.229.17:13:51.51#ibcon#enter sib2, iclass 7, count 0 2006.229.17:13:51.51#ibcon#flushed, iclass 7, count 0 2006.229.17:13:51.51#ibcon#about to write, iclass 7, count 0 2006.229.17:13:51.51#ibcon#wrote, iclass 7, count 0 2006.229.17:13:51.51#ibcon#about to read 3, iclass 7, count 0 2006.229.17:13:51.54#ibcon#read 3, iclass 7, count 0 2006.229.17:13:51.54#ibcon#about to read 4, iclass 7, count 0 2006.229.17:13:51.54#ibcon#read 4, iclass 7, count 0 2006.229.17:13:51.54#ibcon#about to read 5, iclass 7, count 0 2006.229.17:13:51.54#ibcon#read 5, iclass 7, count 0 2006.229.17:13:51.54#ibcon#about to read 6, iclass 7, count 0 2006.229.17:13:51.54#ibcon#read 6, iclass 7, count 0 2006.229.17:13:51.54#ibcon#end of sib2, iclass 7, count 0 2006.229.17:13:51.54#ibcon#*after write, iclass 7, count 0 2006.229.17:13:51.54#ibcon#*before return 0, iclass 7, count 0 2006.229.17:13:51.54#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:51.54#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:51.54#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:13:51.54#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:13:51.54$vck44/valo=2,534.99 2006.229.17:13:51.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.17:13:51.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.17:13:51.54#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:51.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:13:51.55#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:13:51.55#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:13:51.55#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:13:51.55#ibcon#first serial, iclass 12, count 0 2006.229.17:13:51.55#ibcon#enter sib2, iclass 12, count 0 2006.229.17:13:51.55#ibcon#flushed, iclass 12, count 0 2006.229.17:13:51.55#ibcon#about to write, iclass 12, count 0 2006.229.17:13:51.55#ibcon#wrote, iclass 12, count 0 2006.229.17:13:51.55#ibcon#about to read 3, iclass 12, count 0 2006.229.17:13:51.56#ibcon#read 3, iclass 12, count 0 2006.229.17:13:51.56#ibcon#about to read 4, iclass 12, count 0 2006.229.17:13:51.56#ibcon#read 4, iclass 12, count 0 2006.229.17:13:51.56#ibcon#about to read 5, iclass 12, count 0 2006.229.17:13:51.56#ibcon#read 5, iclass 12, count 0 2006.229.17:13:51.56#ibcon#about to read 6, iclass 12, count 0 2006.229.17:13:51.56#ibcon#read 6, iclass 12, count 0 2006.229.17:13:51.56#ibcon#end of sib2, iclass 12, count 0 2006.229.17:13:51.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:13:51.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:13:51.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:13:51.56#ibcon#*before write, iclass 12, count 0 2006.229.17:13:51.56#ibcon#enter sib2, iclass 12, count 0 2006.229.17:13:51.56#ibcon#flushed, iclass 12, count 0 2006.229.17:13:51.56#ibcon#about to write, iclass 12, count 0 2006.229.17:13:51.56#ibcon#wrote, iclass 12, count 0 2006.229.17:13:51.56#ibcon#about to read 3, iclass 12, count 0 2006.229.17:13:51.59#abcon#<5=/07 1.4 3.1 27.001001001.8\r\n> 2006.229.17:13:51.60#ibcon#read 3, iclass 12, count 0 2006.229.17:13:51.60#ibcon#about to read 4, iclass 12, count 0 2006.229.17:13:51.60#ibcon#read 4, iclass 12, count 0 2006.229.17:13:51.60#ibcon#about to read 5, iclass 12, count 0 2006.229.17:13:51.60#ibcon#read 5, iclass 12, count 0 2006.229.17:13:51.60#ibcon#about to read 6, iclass 12, count 0 2006.229.17:13:51.60#ibcon#read 6, iclass 12, count 0 2006.229.17:13:51.60#ibcon#end of sib2, iclass 12, count 0 2006.229.17:13:51.60#ibcon#*after write, iclass 12, count 0 2006.229.17:13:51.60#ibcon#*before return 0, iclass 12, count 0 2006.229.17:13:51.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:13:51.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:13:51.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:13:51.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:13:51.60$vck44/va=2,7 2006.229.17:13:51.60#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.17:13:51.60#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.17:13:51.60#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:51.60#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:13:51.61#abcon#{5=INTERFACE CLEAR} 2006.229.17:13:51.66#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:13:51.66#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:13:51.66#ibcon#enter wrdev, iclass 16, count 2 2006.229.17:13:51.66#ibcon#first serial, iclass 16, count 2 2006.229.17:13:51.66#ibcon#enter sib2, iclass 16, count 2 2006.229.17:13:51.66#ibcon#flushed, iclass 16, count 2 2006.229.17:13:51.66#ibcon#about to write, iclass 16, count 2 2006.229.17:13:51.66#ibcon#wrote, iclass 16, count 2 2006.229.17:13:51.66#ibcon#about to read 3, iclass 16, count 2 2006.229.17:13:51.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:13:51.68#ibcon#read 3, iclass 16, count 2 2006.229.17:13:51.68#ibcon#about to read 4, iclass 16, count 2 2006.229.17:13:51.68#ibcon#read 4, iclass 16, count 2 2006.229.17:13:51.68#ibcon#about to read 5, iclass 16, count 2 2006.229.17:13:51.68#ibcon#read 5, iclass 16, count 2 2006.229.17:13:51.68#ibcon#about to read 6, iclass 16, count 2 2006.229.17:13:51.68#ibcon#read 6, iclass 16, count 2 2006.229.17:13:51.68#ibcon#end of sib2, iclass 16, count 2 2006.229.17:13:51.68#ibcon#*mode == 0, iclass 16, count 2 2006.229.17:13:51.68#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.17:13:51.68#ibcon#[25=AT02-07\r\n] 2006.229.17:13:51.68#ibcon#*before write, iclass 16, count 2 2006.229.17:13:51.68#ibcon#enter sib2, iclass 16, count 2 2006.229.17:13:51.68#ibcon#flushed, iclass 16, count 2 2006.229.17:13:51.68#ibcon#about to write, iclass 16, count 2 2006.229.17:13:51.68#ibcon#wrote, iclass 16, count 2 2006.229.17:13:51.68#ibcon#about to read 3, iclass 16, count 2 2006.229.17:13:51.71#ibcon#read 3, iclass 16, count 2 2006.229.17:13:51.71#ibcon#about to read 4, iclass 16, count 2 2006.229.17:13:51.71#ibcon#read 4, iclass 16, count 2 2006.229.17:13:51.71#ibcon#about to read 5, iclass 16, count 2 2006.229.17:13:51.71#ibcon#read 5, iclass 16, count 2 2006.229.17:13:51.71#ibcon#about to read 6, iclass 16, count 2 2006.229.17:13:51.71#ibcon#read 6, iclass 16, count 2 2006.229.17:13:51.71#ibcon#end of sib2, iclass 16, count 2 2006.229.17:13:51.71#ibcon#*after write, iclass 16, count 2 2006.229.17:13:51.71#ibcon#*before return 0, iclass 16, count 2 2006.229.17:13:51.71#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:13:51.71#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:13:51.71#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.17:13:51.71#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:51.71#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:13:51.83#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:13:51.83#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:13:51.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:13:51.83#ibcon#first serial, iclass 16, count 0 2006.229.17:13:51.83#ibcon#enter sib2, iclass 16, count 0 2006.229.17:13:51.83#ibcon#flushed, iclass 16, count 0 2006.229.17:13:51.83#ibcon#about to write, iclass 16, count 0 2006.229.17:13:51.83#ibcon#wrote, iclass 16, count 0 2006.229.17:13:51.83#ibcon#about to read 3, iclass 16, count 0 2006.229.17:13:51.85#ibcon#read 3, iclass 16, count 0 2006.229.17:13:51.85#ibcon#about to read 4, iclass 16, count 0 2006.229.17:13:51.85#ibcon#read 4, iclass 16, count 0 2006.229.17:13:51.85#ibcon#about to read 5, iclass 16, count 0 2006.229.17:13:51.85#ibcon#read 5, iclass 16, count 0 2006.229.17:13:51.85#ibcon#about to read 6, iclass 16, count 0 2006.229.17:13:51.85#ibcon#read 6, iclass 16, count 0 2006.229.17:13:51.85#ibcon#end of sib2, iclass 16, count 0 2006.229.17:13:51.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:13:51.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:13:51.85#ibcon#[25=USB\r\n] 2006.229.17:13:51.85#ibcon#*before write, iclass 16, count 0 2006.229.17:13:51.85#ibcon#enter sib2, iclass 16, count 0 2006.229.17:13:51.85#ibcon#flushed, iclass 16, count 0 2006.229.17:13:51.85#ibcon#about to write, iclass 16, count 0 2006.229.17:13:51.85#ibcon#wrote, iclass 16, count 0 2006.229.17:13:51.85#ibcon#about to read 3, iclass 16, count 0 2006.229.17:13:51.88#ibcon#read 3, iclass 16, count 0 2006.229.17:13:51.88#ibcon#about to read 4, iclass 16, count 0 2006.229.17:13:51.88#ibcon#read 4, iclass 16, count 0 2006.229.17:13:51.88#ibcon#about to read 5, iclass 16, count 0 2006.229.17:13:51.88#ibcon#read 5, iclass 16, count 0 2006.229.17:13:51.88#ibcon#about to read 6, iclass 16, count 0 2006.229.17:13:51.88#ibcon#read 6, iclass 16, count 0 2006.229.17:13:51.88#ibcon#end of sib2, iclass 16, count 0 2006.229.17:13:51.88#ibcon#*after write, iclass 16, count 0 2006.229.17:13:51.88#ibcon#*before return 0, iclass 16, count 0 2006.229.17:13:51.88#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:13:51.88#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:13:51.88#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:13:51.88#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:13:51.88$vck44/valo=3,564.99 2006.229.17:13:51.88#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.17:13:51.88#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.17:13:51.88#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:51.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:51.88#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:51.88#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:51.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:13:51.88#ibcon#first serial, iclass 19, count 0 2006.229.17:13:51.88#ibcon#enter sib2, iclass 19, count 0 2006.229.17:13:51.88#ibcon#flushed, iclass 19, count 0 2006.229.17:13:51.88#ibcon#about to write, iclass 19, count 0 2006.229.17:13:51.88#ibcon#wrote, iclass 19, count 0 2006.229.17:13:51.88#ibcon#about to read 3, iclass 19, count 0 2006.229.17:13:51.90#ibcon#read 3, iclass 19, count 0 2006.229.17:13:51.90#ibcon#about to read 4, iclass 19, count 0 2006.229.17:13:51.90#ibcon#read 4, iclass 19, count 0 2006.229.17:13:51.90#ibcon#about to read 5, iclass 19, count 0 2006.229.17:13:51.90#ibcon#read 5, iclass 19, count 0 2006.229.17:13:51.90#ibcon#about to read 6, iclass 19, count 0 2006.229.17:13:51.90#ibcon#read 6, iclass 19, count 0 2006.229.17:13:51.90#ibcon#end of sib2, iclass 19, count 0 2006.229.17:13:51.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:13:51.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:13:51.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:13:51.90#ibcon#*before write, iclass 19, count 0 2006.229.17:13:51.90#ibcon#enter sib2, iclass 19, count 0 2006.229.17:13:51.90#ibcon#flushed, iclass 19, count 0 2006.229.17:13:51.90#ibcon#about to write, iclass 19, count 0 2006.229.17:13:51.90#ibcon#wrote, iclass 19, count 0 2006.229.17:13:51.90#ibcon#about to read 3, iclass 19, count 0 2006.229.17:13:51.94#ibcon#read 3, iclass 19, count 0 2006.229.17:13:51.94#ibcon#about to read 4, iclass 19, count 0 2006.229.17:13:51.94#ibcon#read 4, iclass 19, count 0 2006.229.17:13:51.94#ibcon#about to read 5, iclass 19, count 0 2006.229.17:13:51.94#ibcon#read 5, iclass 19, count 0 2006.229.17:13:51.94#ibcon#about to read 6, iclass 19, count 0 2006.229.17:13:51.94#ibcon#read 6, iclass 19, count 0 2006.229.17:13:51.94#ibcon#end of sib2, iclass 19, count 0 2006.229.17:13:51.94#ibcon#*after write, iclass 19, count 0 2006.229.17:13:51.94#ibcon#*before return 0, iclass 19, count 0 2006.229.17:13:51.94#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:51.94#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:51.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:13:51.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:13:51.94$vck44/va=3,6 2006.229.17:13:51.94#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.17:13:51.94#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.17:13:51.94#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:51.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:52.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:52.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:52.00#ibcon#enter wrdev, iclass 21, count 2 2006.229.17:13:52.00#ibcon#first serial, iclass 21, count 2 2006.229.17:13:52.00#ibcon#enter sib2, iclass 21, count 2 2006.229.17:13:52.00#ibcon#flushed, iclass 21, count 2 2006.229.17:13:52.00#ibcon#about to write, iclass 21, count 2 2006.229.17:13:52.00#ibcon#wrote, iclass 21, count 2 2006.229.17:13:52.00#ibcon#about to read 3, iclass 21, count 2 2006.229.17:13:52.02#ibcon#read 3, iclass 21, count 2 2006.229.17:13:52.02#ibcon#about to read 4, iclass 21, count 2 2006.229.17:13:52.02#ibcon#read 4, iclass 21, count 2 2006.229.17:13:52.02#ibcon#about to read 5, iclass 21, count 2 2006.229.17:13:52.02#ibcon#read 5, iclass 21, count 2 2006.229.17:13:52.02#ibcon#about to read 6, iclass 21, count 2 2006.229.17:13:52.02#ibcon#read 6, iclass 21, count 2 2006.229.17:13:52.02#ibcon#end of sib2, iclass 21, count 2 2006.229.17:13:52.02#ibcon#*mode == 0, iclass 21, count 2 2006.229.17:13:52.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.17:13:52.02#ibcon#[25=AT03-06\r\n] 2006.229.17:13:52.02#ibcon#*before write, iclass 21, count 2 2006.229.17:13:52.02#ibcon#enter sib2, iclass 21, count 2 2006.229.17:13:52.02#ibcon#flushed, iclass 21, count 2 2006.229.17:13:52.02#ibcon#about to write, iclass 21, count 2 2006.229.17:13:52.02#ibcon#wrote, iclass 21, count 2 2006.229.17:13:52.02#ibcon#about to read 3, iclass 21, count 2 2006.229.17:13:52.05#ibcon#read 3, iclass 21, count 2 2006.229.17:13:52.05#ibcon#about to read 4, iclass 21, count 2 2006.229.17:13:52.05#ibcon#read 4, iclass 21, count 2 2006.229.17:13:52.05#ibcon#about to read 5, iclass 21, count 2 2006.229.17:13:52.05#ibcon#read 5, iclass 21, count 2 2006.229.17:13:52.05#ibcon#about to read 6, iclass 21, count 2 2006.229.17:13:52.05#ibcon#read 6, iclass 21, count 2 2006.229.17:13:52.05#ibcon#end of sib2, iclass 21, count 2 2006.229.17:13:52.05#ibcon#*after write, iclass 21, count 2 2006.229.17:13:52.05#ibcon#*before return 0, iclass 21, count 2 2006.229.17:13:52.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:52.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:52.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.17:13:52.05#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:52.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:52.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:52.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:52.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:13:52.17#ibcon#first serial, iclass 21, count 0 2006.229.17:13:52.17#ibcon#enter sib2, iclass 21, count 0 2006.229.17:13:52.17#ibcon#flushed, iclass 21, count 0 2006.229.17:13:52.17#ibcon#about to write, iclass 21, count 0 2006.229.17:13:52.17#ibcon#wrote, iclass 21, count 0 2006.229.17:13:52.17#ibcon#about to read 3, iclass 21, count 0 2006.229.17:13:52.19#ibcon#read 3, iclass 21, count 0 2006.229.17:13:52.19#ibcon#about to read 4, iclass 21, count 0 2006.229.17:13:52.19#ibcon#read 4, iclass 21, count 0 2006.229.17:13:52.19#ibcon#about to read 5, iclass 21, count 0 2006.229.17:13:52.19#ibcon#read 5, iclass 21, count 0 2006.229.17:13:52.19#ibcon#about to read 6, iclass 21, count 0 2006.229.17:13:52.19#ibcon#read 6, iclass 21, count 0 2006.229.17:13:52.19#ibcon#end of sib2, iclass 21, count 0 2006.229.17:13:52.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:13:52.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:13:52.19#ibcon#[25=USB\r\n] 2006.229.17:13:52.19#ibcon#*before write, iclass 21, count 0 2006.229.17:13:52.19#ibcon#enter sib2, iclass 21, count 0 2006.229.17:13:52.19#ibcon#flushed, iclass 21, count 0 2006.229.17:13:52.19#ibcon#about to write, iclass 21, count 0 2006.229.17:13:52.19#ibcon#wrote, iclass 21, count 0 2006.229.17:13:52.19#ibcon#about to read 3, iclass 21, count 0 2006.229.17:13:52.22#ibcon#read 3, iclass 21, count 0 2006.229.17:13:52.22#ibcon#about to read 4, iclass 21, count 0 2006.229.17:13:52.22#ibcon#read 4, iclass 21, count 0 2006.229.17:13:52.22#ibcon#about to read 5, iclass 21, count 0 2006.229.17:13:52.22#ibcon#read 5, iclass 21, count 0 2006.229.17:13:52.22#ibcon#about to read 6, iclass 21, count 0 2006.229.17:13:52.22#ibcon#read 6, iclass 21, count 0 2006.229.17:13:52.22#ibcon#end of sib2, iclass 21, count 0 2006.229.17:13:52.22#ibcon#*after write, iclass 21, count 0 2006.229.17:13:52.22#ibcon#*before return 0, iclass 21, count 0 2006.229.17:13:52.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:52.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:52.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:13:52.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:13:52.22$vck44/valo=4,624.99 2006.229.17:13:52.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.17:13:52.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.17:13:52.22#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:52.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:52.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:52.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:52.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:13:52.22#ibcon#first serial, iclass 23, count 0 2006.229.17:13:52.22#ibcon#enter sib2, iclass 23, count 0 2006.229.17:13:52.22#ibcon#flushed, iclass 23, count 0 2006.229.17:13:52.22#ibcon#about to write, iclass 23, count 0 2006.229.17:13:52.22#ibcon#wrote, iclass 23, count 0 2006.229.17:13:52.22#ibcon#about to read 3, iclass 23, count 0 2006.229.17:13:52.24#ibcon#read 3, iclass 23, count 0 2006.229.17:13:52.24#ibcon#about to read 4, iclass 23, count 0 2006.229.17:13:52.24#ibcon#read 4, iclass 23, count 0 2006.229.17:13:52.24#ibcon#about to read 5, iclass 23, count 0 2006.229.17:13:52.24#ibcon#read 5, iclass 23, count 0 2006.229.17:13:52.24#ibcon#about to read 6, iclass 23, count 0 2006.229.17:13:52.24#ibcon#read 6, iclass 23, count 0 2006.229.17:13:52.24#ibcon#end of sib2, iclass 23, count 0 2006.229.17:13:52.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:13:52.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:13:52.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:13:52.24#ibcon#*before write, iclass 23, count 0 2006.229.17:13:52.24#ibcon#enter sib2, iclass 23, count 0 2006.229.17:13:52.24#ibcon#flushed, iclass 23, count 0 2006.229.17:13:52.24#ibcon#about to write, iclass 23, count 0 2006.229.17:13:52.24#ibcon#wrote, iclass 23, count 0 2006.229.17:13:52.24#ibcon#about to read 3, iclass 23, count 0 2006.229.17:13:52.28#ibcon#read 3, iclass 23, count 0 2006.229.17:13:52.28#ibcon#about to read 4, iclass 23, count 0 2006.229.17:13:52.28#ibcon#read 4, iclass 23, count 0 2006.229.17:13:52.28#ibcon#about to read 5, iclass 23, count 0 2006.229.17:13:52.28#ibcon#read 5, iclass 23, count 0 2006.229.17:13:52.28#ibcon#about to read 6, iclass 23, count 0 2006.229.17:13:52.28#ibcon#read 6, iclass 23, count 0 2006.229.17:13:52.28#ibcon#end of sib2, iclass 23, count 0 2006.229.17:13:52.28#ibcon#*after write, iclass 23, count 0 2006.229.17:13:52.28#ibcon#*before return 0, iclass 23, count 0 2006.229.17:13:52.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:52.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:52.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:13:52.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:13:52.28$vck44/va=4,7 2006.229.17:13:52.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.17:13:52.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.17:13:52.28#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:52.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:52.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:52.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:52.34#ibcon#enter wrdev, iclass 25, count 2 2006.229.17:13:52.34#ibcon#first serial, iclass 25, count 2 2006.229.17:13:52.34#ibcon#enter sib2, iclass 25, count 2 2006.229.17:13:52.34#ibcon#flushed, iclass 25, count 2 2006.229.17:13:52.34#ibcon#about to write, iclass 25, count 2 2006.229.17:13:52.34#ibcon#wrote, iclass 25, count 2 2006.229.17:13:52.34#ibcon#about to read 3, iclass 25, count 2 2006.229.17:13:52.36#ibcon#read 3, iclass 25, count 2 2006.229.17:13:52.36#ibcon#about to read 4, iclass 25, count 2 2006.229.17:13:52.36#ibcon#read 4, iclass 25, count 2 2006.229.17:13:52.36#ibcon#about to read 5, iclass 25, count 2 2006.229.17:13:52.36#ibcon#read 5, iclass 25, count 2 2006.229.17:13:52.36#ibcon#about to read 6, iclass 25, count 2 2006.229.17:13:52.36#ibcon#read 6, iclass 25, count 2 2006.229.17:13:52.36#ibcon#end of sib2, iclass 25, count 2 2006.229.17:13:52.36#ibcon#*mode == 0, iclass 25, count 2 2006.229.17:13:52.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.17:13:52.36#ibcon#[25=AT04-07\r\n] 2006.229.17:13:52.36#ibcon#*before write, iclass 25, count 2 2006.229.17:13:52.36#ibcon#enter sib2, iclass 25, count 2 2006.229.17:13:52.36#ibcon#flushed, iclass 25, count 2 2006.229.17:13:52.36#ibcon#about to write, iclass 25, count 2 2006.229.17:13:52.36#ibcon#wrote, iclass 25, count 2 2006.229.17:13:52.36#ibcon#about to read 3, iclass 25, count 2 2006.229.17:13:52.39#ibcon#read 3, iclass 25, count 2 2006.229.17:13:52.39#ibcon#about to read 4, iclass 25, count 2 2006.229.17:13:52.39#ibcon#read 4, iclass 25, count 2 2006.229.17:13:52.39#ibcon#about to read 5, iclass 25, count 2 2006.229.17:13:52.39#ibcon#read 5, iclass 25, count 2 2006.229.17:13:52.39#ibcon#about to read 6, iclass 25, count 2 2006.229.17:13:52.39#ibcon#read 6, iclass 25, count 2 2006.229.17:13:52.39#ibcon#end of sib2, iclass 25, count 2 2006.229.17:13:52.39#ibcon#*after write, iclass 25, count 2 2006.229.17:13:52.39#ibcon#*before return 0, iclass 25, count 2 2006.229.17:13:52.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:52.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:52.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.17:13:52.39#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:52.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:52.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:52.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:52.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:13:52.51#ibcon#first serial, iclass 25, count 0 2006.229.17:13:52.51#ibcon#enter sib2, iclass 25, count 0 2006.229.17:13:52.51#ibcon#flushed, iclass 25, count 0 2006.229.17:13:52.51#ibcon#about to write, iclass 25, count 0 2006.229.17:13:52.51#ibcon#wrote, iclass 25, count 0 2006.229.17:13:52.51#ibcon#about to read 3, iclass 25, count 0 2006.229.17:13:52.53#ibcon#read 3, iclass 25, count 0 2006.229.17:13:52.53#ibcon#about to read 4, iclass 25, count 0 2006.229.17:13:52.53#ibcon#read 4, iclass 25, count 0 2006.229.17:13:52.53#ibcon#about to read 5, iclass 25, count 0 2006.229.17:13:52.53#ibcon#read 5, iclass 25, count 0 2006.229.17:13:52.53#ibcon#about to read 6, iclass 25, count 0 2006.229.17:13:52.53#ibcon#read 6, iclass 25, count 0 2006.229.17:13:52.53#ibcon#end of sib2, iclass 25, count 0 2006.229.17:13:52.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:13:52.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:13:52.53#ibcon#[25=USB\r\n] 2006.229.17:13:52.53#ibcon#*before write, iclass 25, count 0 2006.229.17:13:52.53#ibcon#enter sib2, iclass 25, count 0 2006.229.17:13:52.53#ibcon#flushed, iclass 25, count 0 2006.229.17:13:52.53#ibcon#about to write, iclass 25, count 0 2006.229.17:13:52.53#ibcon#wrote, iclass 25, count 0 2006.229.17:13:52.53#ibcon#about to read 3, iclass 25, count 0 2006.229.17:13:52.56#ibcon#read 3, iclass 25, count 0 2006.229.17:13:52.56#ibcon#about to read 4, iclass 25, count 0 2006.229.17:13:52.56#ibcon#read 4, iclass 25, count 0 2006.229.17:13:52.56#ibcon#about to read 5, iclass 25, count 0 2006.229.17:13:52.56#ibcon#read 5, iclass 25, count 0 2006.229.17:13:52.56#ibcon#about to read 6, iclass 25, count 0 2006.229.17:13:52.56#ibcon#read 6, iclass 25, count 0 2006.229.17:13:52.56#ibcon#end of sib2, iclass 25, count 0 2006.229.17:13:52.56#ibcon#*after write, iclass 25, count 0 2006.229.17:13:52.56#ibcon#*before return 0, iclass 25, count 0 2006.229.17:13:52.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:52.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:52.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:13:52.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:13:52.56$vck44/valo=5,734.99 2006.229.17:13:52.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.17:13:52.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.17:13:52.56#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:52.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:52.56#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:52.56#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:52.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:13:52.56#ibcon#first serial, iclass 27, count 0 2006.229.17:13:52.56#ibcon#enter sib2, iclass 27, count 0 2006.229.17:13:52.56#ibcon#flushed, iclass 27, count 0 2006.229.17:13:52.56#ibcon#about to write, iclass 27, count 0 2006.229.17:13:52.56#ibcon#wrote, iclass 27, count 0 2006.229.17:13:52.56#ibcon#about to read 3, iclass 27, count 0 2006.229.17:13:52.58#ibcon#read 3, iclass 27, count 0 2006.229.17:13:52.58#ibcon#about to read 4, iclass 27, count 0 2006.229.17:13:52.58#ibcon#read 4, iclass 27, count 0 2006.229.17:13:52.58#ibcon#about to read 5, iclass 27, count 0 2006.229.17:13:52.58#ibcon#read 5, iclass 27, count 0 2006.229.17:13:52.58#ibcon#about to read 6, iclass 27, count 0 2006.229.17:13:52.58#ibcon#read 6, iclass 27, count 0 2006.229.17:13:52.58#ibcon#end of sib2, iclass 27, count 0 2006.229.17:13:52.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:13:52.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:13:52.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:13:52.58#ibcon#*before write, iclass 27, count 0 2006.229.17:13:52.58#ibcon#enter sib2, iclass 27, count 0 2006.229.17:13:52.58#ibcon#flushed, iclass 27, count 0 2006.229.17:13:52.58#ibcon#about to write, iclass 27, count 0 2006.229.17:13:52.58#ibcon#wrote, iclass 27, count 0 2006.229.17:13:52.58#ibcon#about to read 3, iclass 27, count 0 2006.229.17:13:52.62#ibcon#read 3, iclass 27, count 0 2006.229.17:13:52.62#ibcon#about to read 4, iclass 27, count 0 2006.229.17:13:52.62#ibcon#read 4, iclass 27, count 0 2006.229.17:13:52.62#ibcon#about to read 5, iclass 27, count 0 2006.229.17:13:52.62#ibcon#read 5, iclass 27, count 0 2006.229.17:13:52.62#ibcon#about to read 6, iclass 27, count 0 2006.229.17:13:52.62#ibcon#read 6, iclass 27, count 0 2006.229.17:13:52.62#ibcon#end of sib2, iclass 27, count 0 2006.229.17:13:52.62#ibcon#*after write, iclass 27, count 0 2006.229.17:13:52.62#ibcon#*before return 0, iclass 27, count 0 2006.229.17:13:52.62#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:52.62#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:52.62#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:13:52.62#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:13:52.62$vck44/va=5,4 2006.229.17:13:52.62#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.17:13:52.62#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.17:13:52.62#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:52.62#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:52.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:52.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:52.68#ibcon#enter wrdev, iclass 29, count 2 2006.229.17:13:52.68#ibcon#first serial, iclass 29, count 2 2006.229.17:13:52.68#ibcon#enter sib2, iclass 29, count 2 2006.229.17:13:52.68#ibcon#flushed, iclass 29, count 2 2006.229.17:13:52.68#ibcon#about to write, iclass 29, count 2 2006.229.17:13:52.68#ibcon#wrote, iclass 29, count 2 2006.229.17:13:52.68#ibcon#about to read 3, iclass 29, count 2 2006.229.17:13:52.70#ibcon#read 3, iclass 29, count 2 2006.229.17:13:52.70#ibcon#about to read 4, iclass 29, count 2 2006.229.17:13:52.70#ibcon#read 4, iclass 29, count 2 2006.229.17:13:52.70#ibcon#about to read 5, iclass 29, count 2 2006.229.17:13:52.70#ibcon#read 5, iclass 29, count 2 2006.229.17:13:52.70#ibcon#about to read 6, iclass 29, count 2 2006.229.17:13:52.70#ibcon#read 6, iclass 29, count 2 2006.229.17:13:52.70#ibcon#end of sib2, iclass 29, count 2 2006.229.17:13:52.70#ibcon#*mode == 0, iclass 29, count 2 2006.229.17:13:52.70#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.17:13:52.70#ibcon#[25=AT05-04\r\n] 2006.229.17:13:52.70#ibcon#*before write, iclass 29, count 2 2006.229.17:13:52.70#ibcon#enter sib2, iclass 29, count 2 2006.229.17:13:52.70#ibcon#flushed, iclass 29, count 2 2006.229.17:13:52.70#ibcon#about to write, iclass 29, count 2 2006.229.17:13:52.70#ibcon#wrote, iclass 29, count 2 2006.229.17:13:52.70#ibcon#about to read 3, iclass 29, count 2 2006.229.17:13:52.73#ibcon#read 3, iclass 29, count 2 2006.229.17:13:52.73#ibcon#about to read 4, iclass 29, count 2 2006.229.17:13:52.73#ibcon#read 4, iclass 29, count 2 2006.229.17:13:52.73#ibcon#about to read 5, iclass 29, count 2 2006.229.17:13:52.73#ibcon#read 5, iclass 29, count 2 2006.229.17:13:52.73#ibcon#about to read 6, iclass 29, count 2 2006.229.17:13:52.73#ibcon#read 6, iclass 29, count 2 2006.229.17:13:52.73#ibcon#end of sib2, iclass 29, count 2 2006.229.17:13:52.73#ibcon#*after write, iclass 29, count 2 2006.229.17:13:52.73#ibcon#*before return 0, iclass 29, count 2 2006.229.17:13:52.73#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:52.73#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:52.73#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.17:13:52.73#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:52.73#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:52.85#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:52.85#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:52.85#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:13:52.85#ibcon#first serial, iclass 29, count 0 2006.229.17:13:52.85#ibcon#enter sib2, iclass 29, count 0 2006.229.17:13:52.85#ibcon#flushed, iclass 29, count 0 2006.229.17:13:52.85#ibcon#about to write, iclass 29, count 0 2006.229.17:13:52.85#ibcon#wrote, iclass 29, count 0 2006.229.17:13:52.85#ibcon#about to read 3, iclass 29, count 0 2006.229.17:13:52.87#ibcon#read 3, iclass 29, count 0 2006.229.17:13:52.87#ibcon#about to read 4, iclass 29, count 0 2006.229.17:13:52.87#ibcon#read 4, iclass 29, count 0 2006.229.17:13:52.87#ibcon#about to read 5, iclass 29, count 0 2006.229.17:13:52.87#ibcon#read 5, iclass 29, count 0 2006.229.17:13:52.87#ibcon#about to read 6, iclass 29, count 0 2006.229.17:13:52.87#ibcon#read 6, iclass 29, count 0 2006.229.17:13:52.87#ibcon#end of sib2, iclass 29, count 0 2006.229.17:13:52.87#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:13:52.87#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:13:52.87#ibcon#[25=USB\r\n] 2006.229.17:13:52.87#ibcon#*before write, iclass 29, count 0 2006.229.17:13:52.87#ibcon#enter sib2, iclass 29, count 0 2006.229.17:13:52.87#ibcon#flushed, iclass 29, count 0 2006.229.17:13:52.87#ibcon#about to write, iclass 29, count 0 2006.229.17:13:52.87#ibcon#wrote, iclass 29, count 0 2006.229.17:13:52.87#ibcon#about to read 3, iclass 29, count 0 2006.229.17:13:52.90#ibcon#read 3, iclass 29, count 0 2006.229.17:13:52.90#ibcon#about to read 4, iclass 29, count 0 2006.229.17:13:52.90#ibcon#read 4, iclass 29, count 0 2006.229.17:13:52.90#ibcon#about to read 5, iclass 29, count 0 2006.229.17:13:52.90#ibcon#read 5, iclass 29, count 0 2006.229.17:13:52.90#ibcon#about to read 6, iclass 29, count 0 2006.229.17:13:52.90#ibcon#read 6, iclass 29, count 0 2006.229.17:13:52.90#ibcon#end of sib2, iclass 29, count 0 2006.229.17:13:52.90#ibcon#*after write, iclass 29, count 0 2006.229.17:13:52.90#ibcon#*before return 0, iclass 29, count 0 2006.229.17:13:52.90#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:52.90#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:52.90#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:13:52.90#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:13:52.90$vck44/valo=6,814.99 2006.229.17:13:52.90#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.17:13:52.90#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.17:13:52.90#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:52.90#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:52.90#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:52.90#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:52.90#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:13:52.90#ibcon#first serial, iclass 31, count 0 2006.229.17:13:52.90#ibcon#enter sib2, iclass 31, count 0 2006.229.17:13:52.90#ibcon#flushed, iclass 31, count 0 2006.229.17:13:52.91#ibcon#about to write, iclass 31, count 0 2006.229.17:13:52.91#ibcon#wrote, iclass 31, count 0 2006.229.17:13:52.91#ibcon#about to read 3, iclass 31, count 0 2006.229.17:13:52.92#ibcon#read 3, iclass 31, count 0 2006.229.17:13:52.92#ibcon#about to read 4, iclass 31, count 0 2006.229.17:13:52.92#ibcon#read 4, iclass 31, count 0 2006.229.17:13:52.92#ibcon#about to read 5, iclass 31, count 0 2006.229.17:13:52.92#ibcon#read 5, iclass 31, count 0 2006.229.17:13:52.92#ibcon#about to read 6, iclass 31, count 0 2006.229.17:13:52.92#ibcon#read 6, iclass 31, count 0 2006.229.17:13:52.92#ibcon#end of sib2, iclass 31, count 0 2006.229.17:13:52.92#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:13:52.92#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:13:52.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:13:52.92#ibcon#*before write, iclass 31, count 0 2006.229.17:13:52.92#ibcon#enter sib2, iclass 31, count 0 2006.229.17:13:52.92#ibcon#flushed, iclass 31, count 0 2006.229.17:13:52.92#ibcon#about to write, iclass 31, count 0 2006.229.17:13:52.92#ibcon#wrote, iclass 31, count 0 2006.229.17:13:52.92#ibcon#about to read 3, iclass 31, count 0 2006.229.17:13:52.96#ibcon#read 3, iclass 31, count 0 2006.229.17:13:52.96#ibcon#about to read 4, iclass 31, count 0 2006.229.17:13:52.96#ibcon#read 4, iclass 31, count 0 2006.229.17:13:52.96#ibcon#about to read 5, iclass 31, count 0 2006.229.17:13:52.96#ibcon#read 5, iclass 31, count 0 2006.229.17:13:52.96#ibcon#about to read 6, iclass 31, count 0 2006.229.17:13:52.96#ibcon#read 6, iclass 31, count 0 2006.229.17:13:52.96#ibcon#end of sib2, iclass 31, count 0 2006.229.17:13:52.96#ibcon#*after write, iclass 31, count 0 2006.229.17:13:52.96#ibcon#*before return 0, iclass 31, count 0 2006.229.17:13:52.96#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:52.96#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:52.96#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:13:52.96#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:13:52.96$vck44/va=6,4 2006.229.17:13:52.96#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.17:13:52.96#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.17:13:52.96#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:52.96#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:53.02#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:53.02#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:53.02#ibcon#enter wrdev, iclass 33, count 2 2006.229.17:13:53.02#ibcon#first serial, iclass 33, count 2 2006.229.17:13:53.02#ibcon#enter sib2, iclass 33, count 2 2006.229.17:13:53.02#ibcon#flushed, iclass 33, count 2 2006.229.17:13:53.02#ibcon#about to write, iclass 33, count 2 2006.229.17:13:53.02#ibcon#wrote, iclass 33, count 2 2006.229.17:13:53.02#ibcon#about to read 3, iclass 33, count 2 2006.229.17:13:53.04#ibcon#read 3, iclass 33, count 2 2006.229.17:13:53.04#ibcon#about to read 4, iclass 33, count 2 2006.229.17:13:53.04#ibcon#read 4, iclass 33, count 2 2006.229.17:13:53.04#ibcon#about to read 5, iclass 33, count 2 2006.229.17:13:53.04#ibcon#read 5, iclass 33, count 2 2006.229.17:13:53.04#ibcon#about to read 6, iclass 33, count 2 2006.229.17:13:53.04#ibcon#read 6, iclass 33, count 2 2006.229.17:13:53.04#ibcon#end of sib2, iclass 33, count 2 2006.229.17:13:53.04#ibcon#*mode == 0, iclass 33, count 2 2006.229.17:13:53.04#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.17:13:53.04#ibcon#[25=AT06-04\r\n] 2006.229.17:13:53.04#ibcon#*before write, iclass 33, count 2 2006.229.17:13:53.04#ibcon#enter sib2, iclass 33, count 2 2006.229.17:13:53.04#ibcon#flushed, iclass 33, count 2 2006.229.17:13:53.04#ibcon#about to write, iclass 33, count 2 2006.229.17:13:53.04#ibcon#wrote, iclass 33, count 2 2006.229.17:13:53.04#ibcon#about to read 3, iclass 33, count 2 2006.229.17:13:53.07#ibcon#read 3, iclass 33, count 2 2006.229.17:13:53.07#ibcon#about to read 4, iclass 33, count 2 2006.229.17:13:53.07#ibcon#read 4, iclass 33, count 2 2006.229.17:13:53.07#ibcon#about to read 5, iclass 33, count 2 2006.229.17:13:53.07#ibcon#read 5, iclass 33, count 2 2006.229.17:13:53.07#ibcon#about to read 6, iclass 33, count 2 2006.229.17:13:53.07#ibcon#read 6, iclass 33, count 2 2006.229.17:13:53.07#ibcon#end of sib2, iclass 33, count 2 2006.229.17:13:53.07#ibcon#*after write, iclass 33, count 2 2006.229.17:13:53.07#ibcon#*before return 0, iclass 33, count 2 2006.229.17:13:53.07#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:53.07#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:53.07#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.17:13:53.07#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:53.07#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:53.19#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:53.19#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:53.19#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:13:53.19#ibcon#first serial, iclass 33, count 0 2006.229.17:13:53.19#ibcon#enter sib2, iclass 33, count 0 2006.229.17:13:53.19#ibcon#flushed, iclass 33, count 0 2006.229.17:13:53.19#ibcon#about to write, iclass 33, count 0 2006.229.17:13:53.19#ibcon#wrote, iclass 33, count 0 2006.229.17:13:53.19#ibcon#about to read 3, iclass 33, count 0 2006.229.17:13:53.21#ibcon#read 3, iclass 33, count 0 2006.229.17:13:53.21#ibcon#about to read 4, iclass 33, count 0 2006.229.17:13:53.21#ibcon#read 4, iclass 33, count 0 2006.229.17:13:53.21#ibcon#about to read 5, iclass 33, count 0 2006.229.17:13:53.21#ibcon#read 5, iclass 33, count 0 2006.229.17:13:53.21#ibcon#about to read 6, iclass 33, count 0 2006.229.17:13:53.21#ibcon#read 6, iclass 33, count 0 2006.229.17:13:53.21#ibcon#end of sib2, iclass 33, count 0 2006.229.17:13:53.21#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:13:53.21#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:13:53.21#ibcon#[25=USB\r\n] 2006.229.17:13:53.21#ibcon#*before write, iclass 33, count 0 2006.229.17:13:53.21#ibcon#enter sib2, iclass 33, count 0 2006.229.17:13:53.21#ibcon#flushed, iclass 33, count 0 2006.229.17:13:53.21#ibcon#about to write, iclass 33, count 0 2006.229.17:13:53.21#ibcon#wrote, iclass 33, count 0 2006.229.17:13:53.21#ibcon#about to read 3, iclass 33, count 0 2006.229.17:13:53.24#ibcon#read 3, iclass 33, count 0 2006.229.17:13:53.24#ibcon#about to read 4, iclass 33, count 0 2006.229.17:13:53.24#ibcon#read 4, iclass 33, count 0 2006.229.17:13:53.24#ibcon#about to read 5, iclass 33, count 0 2006.229.17:13:53.24#ibcon#read 5, iclass 33, count 0 2006.229.17:13:53.24#ibcon#about to read 6, iclass 33, count 0 2006.229.17:13:53.24#ibcon#read 6, iclass 33, count 0 2006.229.17:13:53.24#ibcon#end of sib2, iclass 33, count 0 2006.229.17:13:53.24#ibcon#*after write, iclass 33, count 0 2006.229.17:13:53.24#ibcon#*before return 0, iclass 33, count 0 2006.229.17:13:53.24#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:53.24#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:53.24#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:13:53.24#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:13:53.24$vck44/valo=7,864.99 2006.229.17:13:53.24#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.17:13:53.24#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.17:13:53.24#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:53.24#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:53.24#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:53.24#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:53.24#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:13:53.24#ibcon#first serial, iclass 35, count 0 2006.229.17:13:53.24#ibcon#enter sib2, iclass 35, count 0 2006.229.17:13:53.24#ibcon#flushed, iclass 35, count 0 2006.229.17:13:53.24#ibcon#about to write, iclass 35, count 0 2006.229.17:13:53.24#ibcon#wrote, iclass 35, count 0 2006.229.17:13:53.24#ibcon#about to read 3, iclass 35, count 0 2006.229.17:13:53.26#ibcon#read 3, iclass 35, count 0 2006.229.17:13:53.26#ibcon#about to read 4, iclass 35, count 0 2006.229.17:13:53.26#ibcon#read 4, iclass 35, count 0 2006.229.17:13:53.26#ibcon#about to read 5, iclass 35, count 0 2006.229.17:13:53.26#ibcon#read 5, iclass 35, count 0 2006.229.17:13:53.26#ibcon#about to read 6, iclass 35, count 0 2006.229.17:13:53.26#ibcon#read 6, iclass 35, count 0 2006.229.17:13:53.26#ibcon#end of sib2, iclass 35, count 0 2006.229.17:13:53.26#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:13:53.26#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:13:53.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:13:53.26#ibcon#*before write, iclass 35, count 0 2006.229.17:13:53.26#ibcon#enter sib2, iclass 35, count 0 2006.229.17:13:53.26#ibcon#flushed, iclass 35, count 0 2006.229.17:13:53.26#ibcon#about to write, iclass 35, count 0 2006.229.17:13:53.26#ibcon#wrote, iclass 35, count 0 2006.229.17:13:53.26#ibcon#about to read 3, iclass 35, count 0 2006.229.17:13:53.30#ibcon#read 3, iclass 35, count 0 2006.229.17:13:53.30#ibcon#about to read 4, iclass 35, count 0 2006.229.17:13:53.30#ibcon#read 4, iclass 35, count 0 2006.229.17:13:53.30#ibcon#about to read 5, iclass 35, count 0 2006.229.17:13:53.30#ibcon#read 5, iclass 35, count 0 2006.229.17:13:53.30#ibcon#about to read 6, iclass 35, count 0 2006.229.17:13:53.30#ibcon#read 6, iclass 35, count 0 2006.229.17:13:53.30#ibcon#end of sib2, iclass 35, count 0 2006.229.17:13:53.30#ibcon#*after write, iclass 35, count 0 2006.229.17:13:53.30#ibcon#*before return 0, iclass 35, count 0 2006.229.17:13:53.30#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:53.30#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:53.30#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:13:53.30#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:13:53.30$vck44/va=7,5 2006.229.17:13:53.30#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.17:13:53.30#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.17:13:53.30#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:53.30#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:53.36#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:53.36#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:53.36#ibcon#enter wrdev, iclass 37, count 2 2006.229.17:13:53.36#ibcon#first serial, iclass 37, count 2 2006.229.17:13:53.36#ibcon#enter sib2, iclass 37, count 2 2006.229.17:13:53.36#ibcon#flushed, iclass 37, count 2 2006.229.17:13:53.36#ibcon#about to write, iclass 37, count 2 2006.229.17:13:53.36#ibcon#wrote, iclass 37, count 2 2006.229.17:13:53.36#ibcon#about to read 3, iclass 37, count 2 2006.229.17:13:53.38#ibcon#read 3, iclass 37, count 2 2006.229.17:13:53.38#ibcon#about to read 4, iclass 37, count 2 2006.229.17:13:53.38#ibcon#read 4, iclass 37, count 2 2006.229.17:13:53.38#ibcon#about to read 5, iclass 37, count 2 2006.229.17:13:53.38#ibcon#read 5, iclass 37, count 2 2006.229.17:13:53.38#ibcon#about to read 6, iclass 37, count 2 2006.229.17:13:53.38#ibcon#read 6, iclass 37, count 2 2006.229.17:13:53.38#ibcon#end of sib2, iclass 37, count 2 2006.229.17:13:53.38#ibcon#*mode == 0, iclass 37, count 2 2006.229.17:13:53.38#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.17:13:53.38#ibcon#[25=AT07-05\r\n] 2006.229.17:13:53.38#ibcon#*before write, iclass 37, count 2 2006.229.17:13:53.38#ibcon#enter sib2, iclass 37, count 2 2006.229.17:13:53.38#ibcon#flushed, iclass 37, count 2 2006.229.17:13:53.38#ibcon#about to write, iclass 37, count 2 2006.229.17:13:53.38#ibcon#wrote, iclass 37, count 2 2006.229.17:13:53.38#ibcon#about to read 3, iclass 37, count 2 2006.229.17:13:53.41#ibcon#read 3, iclass 37, count 2 2006.229.17:13:53.41#ibcon#about to read 4, iclass 37, count 2 2006.229.17:13:53.41#ibcon#read 4, iclass 37, count 2 2006.229.17:13:53.41#ibcon#about to read 5, iclass 37, count 2 2006.229.17:13:53.41#ibcon#read 5, iclass 37, count 2 2006.229.17:13:53.41#ibcon#about to read 6, iclass 37, count 2 2006.229.17:13:53.41#ibcon#read 6, iclass 37, count 2 2006.229.17:13:53.41#ibcon#end of sib2, iclass 37, count 2 2006.229.17:13:53.41#ibcon#*after write, iclass 37, count 2 2006.229.17:13:53.41#ibcon#*before return 0, iclass 37, count 2 2006.229.17:13:53.41#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:53.41#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:53.41#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.17:13:53.41#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:53.41#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:53.53#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:53.53#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:53.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:13:53.53#ibcon#first serial, iclass 37, count 0 2006.229.17:13:53.53#ibcon#enter sib2, iclass 37, count 0 2006.229.17:13:53.53#ibcon#flushed, iclass 37, count 0 2006.229.17:13:53.53#ibcon#about to write, iclass 37, count 0 2006.229.17:13:53.53#ibcon#wrote, iclass 37, count 0 2006.229.17:13:53.53#ibcon#about to read 3, iclass 37, count 0 2006.229.17:13:53.55#ibcon#read 3, iclass 37, count 0 2006.229.17:13:53.55#ibcon#about to read 4, iclass 37, count 0 2006.229.17:13:53.55#ibcon#read 4, iclass 37, count 0 2006.229.17:13:53.55#ibcon#about to read 5, iclass 37, count 0 2006.229.17:13:53.55#ibcon#read 5, iclass 37, count 0 2006.229.17:13:53.55#ibcon#about to read 6, iclass 37, count 0 2006.229.17:13:53.55#ibcon#read 6, iclass 37, count 0 2006.229.17:13:53.55#ibcon#end of sib2, iclass 37, count 0 2006.229.17:13:53.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:13:53.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:13:53.55#ibcon#[25=USB\r\n] 2006.229.17:13:53.55#ibcon#*before write, iclass 37, count 0 2006.229.17:13:53.55#ibcon#enter sib2, iclass 37, count 0 2006.229.17:13:53.55#ibcon#flushed, iclass 37, count 0 2006.229.17:13:53.55#ibcon#about to write, iclass 37, count 0 2006.229.17:13:53.55#ibcon#wrote, iclass 37, count 0 2006.229.17:13:53.55#ibcon#about to read 3, iclass 37, count 0 2006.229.17:13:53.58#ibcon#read 3, iclass 37, count 0 2006.229.17:13:53.58#ibcon#about to read 4, iclass 37, count 0 2006.229.17:13:53.58#ibcon#read 4, iclass 37, count 0 2006.229.17:13:53.58#ibcon#about to read 5, iclass 37, count 0 2006.229.17:13:53.58#ibcon#read 5, iclass 37, count 0 2006.229.17:13:53.58#ibcon#about to read 6, iclass 37, count 0 2006.229.17:13:53.58#ibcon#read 6, iclass 37, count 0 2006.229.17:13:53.58#ibcon#end of sib2, iclass 37, count 0 2006.229.17:13:53.58#ibcon#*after write, iclass 37, count 0 2006.229.17:13:53.58#ibcon#*before return 0, iclass 37, count 0 2006.229.17:13:53.58#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:53.58#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:53.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:13:53.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:13:53.58$vck44/valo=8,884.99 2006.229.17:13:53.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.17:13:53.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.17:13:53.58#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:53.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:53.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:53.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:53.58#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:13:53.58#ibcon#first serial, iclass 39, count 0 2006.229.17:13:53.58#ibcon#enter sib2, iclass 39, count 0 2006.229.17:13:53.58#ibcon#flushed, iclass 39, count 0 2006.229.17:13:53.58#ibcon#about to write, iclass 39, count 0 2006.229.17:13:53.58#ibcon#wrote, iclass 39, count 0 2006.229.17:13:53.58#ibcon#about to read 3, iclass 39, count 0 2006.229.17:13:53.60#ibcon#read 3, iclass 39, count 0 2006.229.17:13:53.60#ibcon#about to read 4, iclass 39, count 0 2006.229.17:13:53.60#ibcon#read 4, iclass 39, count 0 2006.229.17:13:53.60#ibcon#about to read 5, iclass 39, count 0 2006.229.17:13:53.60#ibcon#read 5, iclass 39, count 0 2006.229.17:13:53.60#ibcon#about to read 6, iclass 39, count 0 2006.229.17:13:53.60#ibcon#read 6, iclass 39, count 0 2006.229.17:13:53.60#ibcon#end of sib2, iclass 39, count 0 2006.229.17:13:53.60#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:13:53.60#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:13:53.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:13:53.60#ibcon#*before write, iclass 39, count 0 2006.229.17:13:53.60#ibcon#enter sib2, iclass 39, count 0 2006.229.17:13:53.60#ibcon#flushed, iclass 39, count 0 2006.229.17:13:53.60#ibcon#about to write, iclass 39, count 0 2006.229.17:13:53.60#ibcon#wrote, iclass 39, count 0 2006.229.17:13:53.60#ibcon#about to read 3, iclass 39, count 0 2006.229.17:13:53.64#ibcon#read 3, iclass 39, count 0 2006.229.17:13:53.64#ibcon#about to read 4, iclass 39, count 0 2006.229.17:13:53.64#ibcon#read 4, iclass 39, count 0 2006.229.17:13:53.64#ibcon#about to read 5, iclass 39, count 0 2006.229.17:13:53.64#ibcon#read 5, iclass 39, count 0 2006.229.17:13:53.64#ibcon#about to read 6, iclass 39, count 0 2006.229.17:13:53.64#ibcon#read 6, iclass 39, count 0 2006.229.17:13:53.64#ibcon#end of sib2, iclass 39, count 0 2006.229.17:13:53.64#ibcon#*after write, iclass 39, count 0 2006.229.17:13:53.64#ibcon#*before return 0, iclass 39, count 0 2006.229.17:13:53.64#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:53.64#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:53.64#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:13:53.64#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:13:53.64$vck44/va=8,6 2006.229.17:13:53.64#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.17:13:53.64#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.17:13:53.64#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:53.64#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:13:53.70#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:13:53.70#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:13:53.70#ibcon#enter wrdev, iclass 3, count 2 2006.229.17:13:53.70#ibcon#first serial, iclass 3, count 2 2006.229.17:13:53.70#ibcon#enter sib2, iclass 3, count 2 2006.229.17:13:53.70#ibcon#flushed, iclass 3, count 2 2006.229.17:13:53.70#ibcon#about to write, iclass 3, count 2 2006.229.17:13:53.70#ibcon#wrote, iclass 3, count 2 2006.229.17:13:53.70#ibcon#about to read 3, iclass 3, count 2 2006.229.17:13:53.72#ibcon#read 3, iclass 3, count 2 2006.229.17:13:53.72#ibcon#about to read 4, iclass 3, count 2 2006.229.17:13:53.72#ibcon#read 4, iclass 3, count 2 2006.229.17:13:53.72#ibcon#about to read 5, iclass 3, count 2 2006.229.17:13:53.72#ibcon#read 5, iclass 3, count 2 2006.229.17:13:53.72#ibcon#about to read 6, iclass 3, count 2 2006.229.17:13:53.72#ibcon#read 6, iclass 3, count 2 2006.229.17:13:53.72#ibcon#end of sib2, iclass 3, count 2 2006.229.17:13:53.72#ibcon#*mode == 0, iclass 3, count 2 2006.229.17:13:53.72#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.17:13:53.72#ibcon#[25=AT08-06\r\n] 2006.229.17:13:53.72#ibcon#*before write, iclass 3, count 2 2006.229.17:13:53.72#ibcon#enter sib2, iclass 3, count 2 2006.229.17:13:53.72#ibcon#flushed, iclass 3, count 2 2006.229.17:13:53.72#ibcon#about to write, iclass 3, count 2 2006.229.17:13:53.72#ibcon#wrote, iclass 3, count 2 2006.229.17:13:53.72#ibcon#about to read 3, iclass 3, count 2 2006.229.17:13:53.75#ibcon#read 3, iclass 3, count 2 2006.229.17:13:53.75#ibcon#about to read 4, iclass 3, count 2 2006.229.17:13:53.75#ibcon#read 4, iclass 3, count 2 2006.229.17:13:53.75#ibcon#about to read 5, iclass 3, count 2 2006.229.17:13:53.75#ibcon#read 5, iclass 3, count 2 2006.229.17:13:53.75#ibcon#about to read 6, iclass 3, count 2 2006.229.17:13:53.75#ibcon#read 6, iclass 3, count 2 2006.229.17:13:53.75#ibcon#end of sib2, iclass 3, count 2 2006.229.17:13:53.75#ibcon#*after write, iclass 3, count 2 2006.229.17:13:53.75#ibcon#*before return 0, iclass 3, count 2 2006.229.17:13:53.75#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:13:53.75#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:13:53.75#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.17:13:53.75#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:53.75#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:13:53.87#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:13:53.87#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:13:53.87#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:13:53.87#ibcon#first serial, iclass 3, count 0 2006.229.17:13:53.87#ibcon#enter sib2, iclass 3, count 0 2006.229.17:13:53.87#ibcon#flushed, iclass 3, count 0 2006.229.17:13:53.87#ibcon#about to write, iclass 3, count 0 2006.229.17:13:53.87#ibcon#wrote, iclass 3, count 0 2006.229.17:13:53.87#ibcon#about to read 3, iclass 3, count 0 2006.229.17:13:53.89#ibcon#read 3, iclass 3, count 0 2006.229.17:13:53.89#ibcon#about to read 4, iclass 3, count 0 2006.229.17:13:53.89#ibcon#read 4, iclass 3, count 0 2006.229.17:13:53.89#ibcon#about to read 5, iclass 3, count 0 2006.229.17:13:53.89#ibcon#read 5, iclass 3, count 0 2006.229.17:13:53.89#ibcon#about to read 6, iclass 3, count 0 2006.229.17:13:53.89#ibcon#read 6, iclass 3, count 0 2006.229.17:13:53.89#ibcon#end of sib2, iclass 3, count 0 2006.229.17:13:53.89#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:13:53.89#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:13:53.89#ibcon#[25=USB\r\n] 2006.229.17:13:53.89#ibcon#*before write, iclass 3, count 0 2006.229.17:13:53.89#ibcon#enter sib2, iclass 3, count 0 2006.229.17:13:53.89#ibcon#flushed, iclass 3, count 0 2006.229.17:13:53.89#ibcon#about to write, iclass 3, count 0 2006.229.17:13:53.89#ibcon#wrote, iclass 3, count 0 2006.229.17:13:53.89#ibcon#about to read 3, iclass 3, count 0 2006.229.17:13:53.92#ibcon#read 3, iclass 3, count 0 2006.229.17:13:53.92#ibcon#about to read 4, iclass 3, count 0 2006.229.17:13:53.92#ibcon#read 4, iclass 3, count 0 2006.229.17:13:53.92#ibcon#about to read 5, iclass 3, count 0 2006.229.17:13:53.92#ibcon#read 5, iclass 3, count 0 2006.229.17:13:53.92#ibcon#about to read 6, iclass 3, count 0 2006.229.17:13:53.92#ibcon#read 6, iclass 3, count 0 2006.229.17:13:53.92#ibcon#end of sib2, iclass 3, count 0 2006.229.17:13:53.92#ibcon#*after write, iclass 3, count 0 2006.229.17:13:53.92#ibcon#*before return 0, iclass 3, count 0 2006.229.17:13:53.92#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:13:53.92#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:13:53.92#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:13:53.92#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:13:53.92$vck44/vblo=1,629.99 2006.229.17:13:53.92#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.17:13:53.92#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.17:13:53.92#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:53.92#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:53.92#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:53.92#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:53.92#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:13:53.92#ibcon#first serial, iclass 5, count 0 2006.229.17:13:53.92#ibcon#enter sib2, iclass 5, count 0 2006.229.17:13:53.92#ibcon#flushed, iclass 5, count 0 2006.229.17:13:53.92#ibcon#about to write, iclass 5, count 0 2006.229.17:13:53.92#ibcon#wrote, iclass 5, count 0 2006.229.17:13:53.92#ibcon#about to read 3, iclass 5, count 0 2006.229.17:13:53.94#ibcon#read 3, iclass 5, count 0 2006.229.17:13:53.94#ibcon#about to read 4, iclass 5, count 0 2006.229.17:13:53.94#ibcon#read 4, iclass 5, count 0 2006.229.17:13:53.94#ibcon#about to read 5, iclass 5, count 0 2006.229.17:13:53.94#ibcon#read 5, iclass 5, count 0 2006.229.17:13:53.94#ibcon#about to read 6, iclass 5, count 0 2006.229.17:13:53.94#ibcon#read 6, iclass 5, count 0 2006.229.17:13:53.94#ibcon#end of sib2, iclass 5, count 0 2006.229.17:13:53.94#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:13:53.94#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:13:53.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:13:53.94#ibcon#*before write, iclass 5, count 0 2006.229.17:13:53.94#ibcon#enter sib2, iclass 5, count 0 2006.229.17:13:53.94#ibcon#flushed, iclass 5, count 0 2006.229.17:13:53.94#ibcon#about to write, iclass 5, count 0 2006.229.17:13:53.94#ibcon#wrote, iclass 5, count 0 2006.229.17:13:53.94#ibcon#about to read 3, iclass 5, count 0 2006.229.17:13:53.98#ibcon#read 3, iclass 5, count 0 2006.229.17:13:53.98#ibcon#about to read 4, iclass 5, count 0 2006.229.17:13:53.98#ibcon#read 4, iclass 5, count 0 2006.229.17:13:53.98#ibcon#about to read 5, iclass 5, count 0 2006.229.17:13:53.98#ibcon#read 5, iclass 5, count 0 2006.229.17:13:53.98#ibcon#about to read 6, iclass 5, count 0 2006.229.17:13:53.98#ibcon#read 6, iclass 5, count 0 2006.229.17:13:53.98#ibcon#end of sib2, iclass 5, count 0 2006.229.17:13:53.98#ibcon#*after write, iclass 5, count 0 2006.229.17:13:53.98#ibcon#*before return 0, iclass 5, count 0 2006.229.17:13:53.98#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:53.98#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:13:53.98#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:13:53.98#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:13:53.98$vck44/vb=1,4 2006.229.17:13:53.98#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.17:13:53.98#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.17:13:53.98#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:53.98#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:53.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:53.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:53.98#ibcon#enter wrdev, iclass 7, count 2 2006.229.17:13:53.98#ibcon#first serial, iclass 7, count 2 2006.229.17:13:53.98#ibcon#enter sib2, iclass 7, count 2 2006.229.17:13:53.98#ibcon#flushed, iclass 7, count 2 2006.229.17:13:53.98#ibcon#about to write, iclass 7, count 2 2006.229.17:13:53.98#ibcon#wrote, iclass 7, count 2 2006.229.17:13:53.98#ibcon#about to read 3, iclass 7, count 2 2006.229.17:13:54.00#ibcon#read 3, iclass 7, count 2 2006.229.17:13:54.00#ibcon#about to read 4, iclass 7, count 2 2006.229.17:13:54.00#ibcon#read 4, iclass 7, count 2 2006.229.17:13:54.00#ibcon#about to read 5, iclass 7, count 2 2006.229.17:13:54.00#ibcon#read 5, iclass 7, count 2 2006.229.17:13:54.00#ibcon#about to read 6, iclass 7, count 2 2006.229.17:13:54.00#ibcon#read 6, iclass 7, count 2 2006.229.17:13:54.00#ibcon#end of sib2, iclass 7, count 2 2006.229.17:13:54.00#ibcon#*mode == 0, iclass 7, count 2 2006.229.17:13:54.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.17:13:54.00#ibcon#[27=AT01-04\r\n] 2006.229.17:13:54.00#ibcon#*before write, iclass 7, count 2 2006.229.17:13:54.00#ibcon#enter sib2, iclass 7, count 2 2006.229.17:13:54.00#ibcon#flushed, iclass 7, count 2 2006.229.17:13:54.00#ibcon#about to write, iclass 7, count 2 2006.229.17:13:54.00#ibcon#wrote, iclass 7, count 2 2006.229.17:13:54.00#ibcon#about to read 3, iclass 7, count 2 2006.229.17:13:54.03#ibcon#read 3, iclass 7, count 2 2006.229.17:13:54.03#ibcon#about to read 4, iclass 7, count 2 2006.229.17:13:54.03#ibcon#read 4, iclass 7, count 2 2006.229.17:13:54.03#ibcon#about to read 5, iclass 7, count 2 2006.229.17:13:54.03#ibcon#read 5, iclass 7, count 2 2006.229.17:13:54.03#ibcon#about to read 6, iclass 7, count 2 2006.229.17:13:54.03#ibcon#read 6, iclass 7, count 2 2006.229.17:13:54.03#ibcon#end of sib2, iclass 7, count 2 2006.229.17:13:54.03#ibcon#*after write, iclass 7, count 2 2006.229.17:13:54.03#ibcon#*before return 0, iclass 7, count 2 2006.229.17:13:54.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:54.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:13:54.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.17:13:54.03#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:54.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:54.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:54.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:54.15#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:13:54.15#ibcon#first serial, iclass 7, count 0 2006.229.17:13:54.15#ibcon#enter sib2, iclass 7, count 0 2006.229.17:13:54.15#ibcon#flushed, iclass 7, count 0 2006.229.17:13:54.15#ibcon#about to write, iclass 7, count 0 2006.229.17:13:54.15#ibcon#wrote, iclass 7, count 0 2006.229.17:13:54.15#ibcon#about to read 3, iclass 7, count 0 2006.229.17:13:54.17#ibcon#read 3, iclass 7, count 0 2006.229.17:13:54.17#ibcon#about to read 4, iclass 7, count 0 2006.229.17:13:54.17#ibcon#read 4, iclass 7, count 0 2006.229.17:13:54.17#ibcon#about to read 5, iclass 7, count 0 2006.229.17:13:54.17#ibcon#read 5, iclass 7, count 0 2006.229.17:13:54.17#ibcon#about to read 6, iclass 7, count 0 2006.229.17:13:54.17#ibcon#read 6, iclass 7, count 0 2006.229.17:13:54.17#ibcon#end of sib2, iclass 7, count 0 2006.229.17:13:54.17#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:13:54.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:13:54.17#ibcon#[27=USB\r\n] 2006.229.17:13:54.17#ibcon#*before write, iclass 7, count 0 2006.229.17:13:54.17#ibcon#enter sib2, iclass 7, count 0 2006.229.17:13:54.17#ibcon#flushed, iclass 7, count 0 2006.229.17:13:54.17#ibcon#about to write, iclass 7, count 0 2006.229.17:13:54.17#ibcon#wrote, iclass 7, count 0 2006.229.17:13:54.17#ibcon#about to read 3, iclass 7, count 0 2006.229.17:13:54.20#ibcon#read 3, iclass 7, count 0 2006.229.17:13:54.20#ibcon#about to read 4, iclass 7, count 0 2006.229.17:13:54.20#ibcon#read 4, iclass 7, count 0 2006.229.17:13:54.20#ibcon#about to read 5, iclass 7, count 0 2006.229.17:13:54.20#ibcon#read 5, iclass 7, count 0 2006.229.17:13:54.20#ibcon#about to read 6, iclass 7, count 0 2006.229.17:13:54.20#ibcon#read 6, iclass 7, count 0 2006.229.17:13:54.20#ibcon#end of sib2, iclass 7, count 0 2006.229.17:13:54.20#ibcon#*after write, iclass 7, count 0 2006.229.17:13:54.20#ibcon#*before return 0, iclass 7, count 0 2006.229.17:13:54.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:54.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:13:54.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:13:54.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:13:54.20$vck44/vblo=2,634.99 2006.229.17:13:54.20#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.17:13:54.20#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.17:13:54.20#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:54.20#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:13:54.20#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:13:54.20#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:13:54.20#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:13:54.20#ibcon#first serial, iclass 11, count 0 2006.229.17:13:54.20#ibcon#enter sib2, iclass 11, count 0 2006.229.17:13:54.20#ibcon#flushed, iclass 11, count 0 2006.229.17:13:54.20#ibcon#about to write, iclass 11, count 0 2006.229.17:13:54.20#ibcon#wrote, iclass 11, count 0 2006.229.17:13:54.20#ibcon#about to read 3, iclass 11, count 0 2006.229.17:13:54.22#ibcon#read 3, iclass 11, count 0 2006.229.17:13:54.22#ibcon#about to read 4, iclass 11, count 0 2006.229.17:13:54.22#ibcon#read 4, iclass 11, count 0 2006.229.17:13:54.22#ibcon#about to read 5, iclass 11, count 0 2006.229.17:13:54.22#ibcon#read 5, iclass 11, count 0 2006.229.17:13:54.22#ibcon#about to read 6, iclass 11, count 0 2006.229.17:13:54.22#ibcon#read 6, iclass 11, count 0 2006.229.17:13:54.22#ibcon#end of sib2, iclass 11, count 0 2006.229.17:13:54.22#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:13:54.22#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:13:54.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:13:54.22#ibcon#*before write, iclass 11, count 0 2006.229.17:13:54.22#ibcon#enter sib2, iclass 11, count 0 2006.229.17:13:54.22#ibcon#flushed, iclass 11, count 0 2006.229.17:13:54.22#ibcon#about to write, iclass 11, count 0 2006.229.17:13:54.22#ibcon#wrote, iclass 11, count 0 2006.229.17:13:54.22#ibcon#about to read 3, iclass 11, count 0 2006.229.17:13:54.26#ibcon#read 3, iclass 11, count 0 2006.229.17:13:54.26#ibcon#about to read 4, iclass 11, count 0 2006.229.17:13:54.26#ibcon#read 4, iclass 11, count 0 2006.229.17:13:54.26#ibcon#about to read 5, iclass 11, count 0 2006.229.17:13:54.26#ibcon#read 5, iclass 11, count 0 2006.229.17:13:54.26#ibcon#about to read 6, iclass 11, count 0 2006.229.17:13:54.26#ibcon#read 6, iclass 11, count 0 2006.229.17:13:54.26#ibcon#end of sib2, iclass 11, count 0 2006.229.17:13:54.26#ibcon#*after write, iclass 11, count 0 2006.229.17:13:54.26#ibcon#*before return 0, iclass 11, count 0 2006.229.17:13:54.26#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:13:54.26#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:13:54.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:13:54.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:13:54.26$vck44/vb=2,4 2006.229.17:13:54.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.17:13:54.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.17:13:54.26#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:54.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:13:54.32#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:13:54.32#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:13:54.32#ibcon#enter wrdev, iclass 13, count 2 2006.229.17:13:54.32#ibcon#first serial, iclass 13, count 2 2006.229.17:13:54.32#ibcon#enter sib2, iclass 13, count 2 2006.229.17:13:54.32#ibcon#flushed, iclass 13, count 2 2006.229.17:13:54.32#ibcon#about to write, iclass 13, count 2 2006.229.17:13:54.32#ibcon#wrote, iclass 13, count 2 2006.229.17:13:54.32#ibcon#about to read 3, iclass 13, count 2 2006.229.17:13:54.34#ibcon#read 3, iclass 13, count 2 2006.229.17:13:54.34#ibcon#about to read 4, iclass 13, count 2 2006.229.17:13:54.34#ibcon#read 4, iclass 13, count 2 2006.229.17:13:54.34#ibcon#about to read 5, iclass 13, count 2 2006.229.17:13:54.34#ibcon#read 5, iclass 13, count 2 2006.229.17:13:54.34#ibcon#about to read 6, iclass 13, count 2 2006.229.17:13:54.34#ibcon#read 6, iclass 13, count 2 2006.229.17:13:54.34#ibcon#end of sib2, iclass 13, count 2 2006.229.17:13:54.34#ibcon#*mode == 0, iclass 13, count 2 2006.229.17:13:54.34#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.17:13:54.34#ibcon#[27=AT02-04\r\n] 2006.229.17:13:54.34#ibcon#*before write, iclass 13, count 2 2006.229.17:13:54.34#ibcon#enter sib2, iclass 13, count 2 2006.229.17:13:54.34#ibcon#flushed, iclass 13, count 2 2006.229.17:13:54.34#ibcon#about to write, iclass 13, count 2 2006.229.17:13:54.34#ibcon#wrote, iclass 13, count 2 2006.229.17:13:54.34#ibcon#about to read 3, iclass 13, count 2 2006.229.17:13:54.37#ibcon#read 3, iclass 13, count 2 2006.229.17:13:54.37#ibcon#about to read 4, iclass 13, count 2 2006.229.17:13:54.37#ibcon#read 4, iclass 13, count 2 2006.229.17:13:54.37#ibcon#about to read 5, iclass 13, count 2 2006.229.17:13:54.37#ibcon#read 5, iclass 13, count 2 2006.229.17:13:54.37#ibcon#about to read 6, iclass 13, count 2 2006.229.17:13:54.37#ibcon#read 6, iclass 13, count 2 2006.229.17:13:54.37#ibcon#end of sib2, iclass 13, count 2 2006.229.17:13:54.37#ibcon#*after write, iclass 13, count 2 2006.229.17:13:54.37#ibcon#*before return 0, iclass 13, count 2 2006.229.17:13:54.37#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:13:54.37#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:13:54.37#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.17:13:54.37#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:54.37#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:13:54.49#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:13:54.49#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:13:54.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:13:54.49#ibcon#first serial, iclass 13, count 0 2006.229.17:13:54.49#ibcon#enter sib2, iclass 13, count 0 2006.229.17:13:54.49#ibcon#flushed, iclass 13, count 0 2006.229.17:13:54.49#ibcon#about to write, iclass 13, count 0 2006.229.17:13:54.49#ibcon#wrote, iclass 13, count 0 2006.229.17:13:54.49#ibcon#about to read 3, iclass 13, count 0 2006.229.17:13:54.51#ibcon#read 3, iclass 13, count 0 2006.229.17:13:54.51#ibcon#about to read 4, iclass 13, count 0 2006.229.17:13:54.51#ibcon#read 4, iclass 13, count 0 2006.229.17:13:54.51#ibcon#about to read 5, iclass 13, count 0 2006.229.17:13:54.51#ibcon#read 5, iclass 13, count 0 2006.229.17:13:54.51#ibcon#about to read 6, iclass 13, count 0 2006.229.17:13:54.51#ibcon#read 6, iclass 13, count 0 2006.229.17:13:54.51#ibcon#end of sib2, iclass 13, count 0 2006.229.17:13:54.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:13:54.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:13:54.51#ibcon#[27=USB\r\n] 2006.229.17:13:54.51#ibcon#*before write, iclass 13, count 0 2006.229.17:13:54.51#ibcon#enter sib2, iclass 13, count 0 2006.229.17:13:54.51#ibcon#flushed, iclass 13, count 0 2006.229.17:13:54.51#ibcon#about to write, iclass 13, count 0 2006.229.17:13:54.51#ibcon#wrote, iclass 13, count 0 2006.229.17:13:54.51#ibcon#about to read 3, iclass 13, count 0 2006.229.17:13:54.54#ibcon#read 3, iclass 13, count 0 2006.229.17:13:54.54#ibcon#about to read 4, iclass 13, count 0 2006.229.17:13:54.54#ibcon#read 4, iclass 13, count 0 2006.229.17:13:54.54#ibcon#about to read 5, iclass 13, count 0 2006.229.17:13:54.54#ibcon#read 5, iclass 13, count 0 2006.229.17:13:54.54#ibcon#about to read 6, iclass 13, count 0 2006.229.17:13:54.54#ibcon#read 6, iclass 13, count 0 2006.229.17:13:54.54#ibcon#end of sib2, iclass 13, count 0 2006.229.17:13:54.54#ibcon#*after write, iclass 13, count 0 2006.229.17:13:54.54#ibcon#*before return 0, iclass 13, count 0 2006.229.17:13:54.54#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:13:54.54#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:13:54.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:13:54.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:13:54.54$vck44/vblo=3,649.99 2006.229.17:13:54.54#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.17:13:54.54#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.17:13:54.54#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:54.54#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:13:54.54#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:13:54.54#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:13:54.54#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:13:54.54#ibcon#first serial, iclass 15, count 0 2006.229.17:13:54.54#ibcon#enter sib2, iclass 15, count 0 2006.229.17:13:54.54#ibcon#flushed, iclass 15, count 0 2006.229.17:13:54.54#ibcon#about to write, iclass 15, count 0 2006.229.17:13:54.54#ibcon#wrote, iclass 15, count 0 2006.229.17:13:54.54#ibcon#about to read 3, iclass 15, count 0 2006.229.17:13:54.56#ibcon#read 3, iclass 15, count 0 2006.229.17:13:54.56#ibcon#about to read 4, iclass 15, count 0 2006.229.17:13:54.56#ibcon#read 4, iclass 15, count 0 2006.229.17:13:54.56#ibcon#about to read 5, iclass 15, count 0 2006.229.17:13:54.56#ibcon#read 5, iclass 15, count 0 2006.229.17:13:54.56#ibcon#about to read 6, iclass 15, count 0 2006.229.17:13:54.56#ibcon#read 6, iclass 15, count 0 2006.229.17:13:54.56#ibcon#end of sib2, iclass 15, count 0 2006.229.17:13:54.56#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:13:54.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:13:54.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:13:54.56#ibcon#*before write, iclass 15, count 0 2006.229.17:13:54.56#ibcon#enter sib2, iclass 15, count 0 2006.229.17:13:54.56#ibcon#flushed, iclass 15, count 0 2006.229.17:13:54.56#ibcon#about to write, iclass 15, count 0 2006.229.17:13:54.56#ibcon#wrote, iclass 15, count 0 2006.229.17:13:54.56#ibcon#about to read 3, iclass 15, count 0 2006.229.17:13:54.60#ibcon#read 3, iclass 15, count 0 2006.229.17:13:54.60#ibcon#about to read 4, iclass 15, count 0 2006.229.17:13:54.60#ibcon#read 4, iclass 15, count 0 2006.229.17:13:54.60#ibcon#about to read 5, iclass 15, count 0 2006.229.17:13:54.60#ibcon#read 5, iclass 15, count 0 2006.229.17:13:54.60#ibcon#about to read 6, iclass 15, count 0 2006.229.17:13:54.60#ibcon#read 6, iclass 15, count 0 2006.229.17:13:54.60#ibcon#end of sib2, iclass 15, count 0 2006.229.17:13:54.60#ibcon#*after write, iclass 15, count 0 2006.229.17:13:54.60#ibcon#*before return 0, iclass 15, count 0 2006.229.17:13:54.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:13:54.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:13:54.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:13:54.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:13:54.60$vck44/vb=3,4 2006.229.17:13:54.60#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.17:13:54.60#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.17:13:54.60#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:54.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:13:54.66#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:13:54.66#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:13:54.66#ibcon#enter wrdev, iclass 17, count 2 2006.229.17:13:54.66#ibcon#first serial, iclass 17, count 2 2006.229.17:13:54.66#ibcon#enter sib2, iclass 17, count 2 2006.229.17:13:54.66#ibcon#flushed, iclass 17, count 2 2006.229.17:13:54.66#ibcon#about to write, iclass 17, count 2 2006.229.17:13:54.66#ibcon#wrote, iclass 17, count 2 2006.229.17:13:54.66#ibcon#about to read 3, iclass 17, count 2 2006.229.17:13:54.68#ibcon#read 3, iclass 17, count 2 2006.229.17:13:54.68#ibcon#about to read 4, iclass 17, count 2 2006.229.17:13:54.68#ibcon#read 4, iclass 17, count 2 2006.229.17:13:54.68#ibcon#about to read 5, iclass 17, count 2 2006.229.17:13:54.68#ibcon#read 5, iclass 17, count 2 2006.229.17:13:54.68#ibcon#about to read 6, iclass 17, count 2 2006.229.17:13:54.68#ibcon#read 6, iclass 17, count 2 2006.229.17:13:54.68#ibcon#end of sib2, iclass 17, count 2 2006.229.17:13:54.68#ibcon#*mode == 0, iclass 17, count 2 2006.229.17:13:54.68#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.17:13:54.68#ibcon#[27=AT03-04\r\n] 2006.229.17:13:54.68#ibcon#*before write, iclass 17, count 2 2006.229.17:13:54.68#ibcon#enter sib2, iclass 17, count 2 2006.229.17:13:54.68#ibcon#flushed, iclass 17, count 2 2006.229.17:13:54.68#ibcon#about to write, iclass 17, count 2 2006.229.17:13:54.68#ibcon#wrote, iclass 17, count 2 2006.229.17:13:54.68#ibcon#about to read 3, iclass 17, count 2 2006.229.17:13:54.71#ibcon#read 3, iclass 17, count 2 2006.229.17:13:54.71#ibcon#about to read 4, iclass 17, count 2 2006.229.17:13:54.71#ibcon#read 4, iclass 17, count 2 2006.229.17:13:54.71#ibcon#about to read 5, iclass 17, count 2 2006.229.17:13:54.71#ibcon#read 5, iclass 17, count 2 2006.229.17:13:54.71#ibcon#about to read 6, iclass 17, count 2 2006.229.17:13:54.71#ibcon#read 6, iclass 17, count 2 2006.229.17:13:54.71#ibcon#end of sib2, iclass 17, count 2 2006.229.17:13:54.71#ibcon#*after write, iclass 17, count 2 2006.229.17:13:54.71#ibcon#*before return 0, iclass 17, count 2 2006.229.17:13:54.71#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:13:54.71#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:13:54.71#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.17:13:54.71#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:54.71#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:13:54.83#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:13:54.83#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:13:54.83#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:13:54.83#ibcon#first serial, iclass 17, count 0 2006.229.17:13:54.83#ibcon#enter sib2, iclass 17, count 0 2006.229.17:13:54.83#ibcon#flushed, iclass 17, count 0 2006.229.17:13:54.83#ibcon#about to write, iclass 17, count 0 2006.229.17:13:54.83#ibcon#wrote, iclass 17, count 0 2006.229.17:13:54.83#ibcon#about to read 3, iclass 17, count 0 2006.229.17:13:54.85#ibcon#read 3, iclass 17, count 0 2006.229.17:13:54.85#ibcon#about to read 4, iclass 17, count 0 2006.229.17:13:54.85#ibcon#read 4, iclass 17, count 0 2006.229.17:13:54.85#ibcon#about to read 5, iclass 17, count 0 2006.229.17:13:54.85#ibcon#read 5, iclass 17, count 0 2006.229.17:13:54.85#ibcon#about to read 6, iclass 17, count 0 2006.229.17:13:54.85#ibcon#read 6, iclass 17, count 0 2006.229.17:13:54.85#ibcon#end of sib2, iclass 17, count 0 2006.229.17:13:54.85#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:13:54.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:13:54.85#ibcon#[27=USB\r\n] 2006.229.17:13:54.85#ibcon#*before write, iclass 17, count 0 2006.229.17:13:54.85#ibcon#enter sib2, iclass 17, count 0 2006.229.17:13:54.85#ibcon#flushed, iclass 17, count 0 2006.229.17:13:54.85#ibcon#about to write, iclass 17, count 0 2006.229.17:13:54.85#ibcon#wrote, iclass 17, count 0 2006.229.17:13:54.85#ibcon#about to read 3, iclass 17, count 0 2006.229.17:13:54.88#ibcon#read 3, iclass 17, count 0 2006.229.17:13:54.88#ibcon#about to read 4, iclass 17, count 0 2006.229.17:13:54.88#ibcon#read 4, iclass 17, count 0 2006.229.17:13:54.88#ibcon#about to read 5, iclass 17, count 0 2006.229.17:13:54.88#ibcon#read 5, iclass 17, count 0 2006.229.17:13:54.88#ibcon#about to read 6, iclass 17, count 0 2006.229.17:13:54.88#ibcon#read 6, iclass 17, count 0 2006.229.17:13:54.88#ibcon#end of sib2, iclass 17, count 0 2006.229.17:13:54.88#ibcon#*after write, iclass 17, count 0 2006.229.17:13:54.88#ibcon#*before return 0, iclass 17, count 0 2006.229.17:13:54.88#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:13:54.88#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:13:54.88#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:13:54.88#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:13:54.88$vck44/vblo=4,679.99 2006.229.17:13:54.88#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.17:13:54.88#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.17:13:54.88#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:54.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:54.88#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:54.88#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:54.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:13:54.88#ibcon#first serial, iclass 19, count 0 2006.229.17:13:54.88#ibcon#enter sib2, iclass 19, count 0 2006.229.17:13:54.88#ibcon#flushed, iclass 19, count 0 2006.229.17:13:54.88#ibcon#about to write, iclass 19, count 0 2006.229.17:13:54.88#ibcon#wrote, iclass 19, count 0 2006.229.17:13:54.88#ibcon#about to read 3, iclass 19, count 0 2006.229.17:13:54.90#ibcon#read 3, iclass 19, count 0 2006.229.17:13:54.90#ibcon#about to read 4, iclass 19, count 0 2006.229.17:13:54.90#ibcon#read 4, iclass 19, count 0 2006.229.17:13:54.90#ibcon#about to read 5, iclass 19, count 0 2006.229.17:13:54.90#ibcon#read 5, iclass 19, count 0 2006.229.17:13:54.90#ibcon#about to read 6, iclass 19, count 0 2006.229.17:13:54.90#ibcon#read 6, iclass 19, count 0 2006.229.17:13:54.90#ibcon#end of sib2, iclass 19, count 0 2006.229.17:13:54.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:13:54.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:13:54.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:13:54.90#ibcon#*before write, iclass 19, count 0 2006.229.17:13:54.90#ibcon#enter sib2, iclass 19, count 0 2006.229.17:13:54.90#ibcon#flushed, iclass 19, count 0 2006.229.17:13:54.90#ibcon#about to write, iclass 19, count 0 2006.229.17:13:54.90#ibcon#wrote, iclass 19, count 0 2006.229.17:13:54.90#ibcon#about to read 3, iclass 19, count 0 2006.229.17:13:54.94#ibcon#read 3, iclass 19, count 0 2006.229.17:13:54.94#ibcon#about to read 4, iclass 19, count 0 2006.229.17:13:54.94#ibcon#read 4, iclass 19, count 0 2006.229.17:13:54.94#ibcon#about to read 5, iclass 19, count 0 2006.229.17:13:54.94#ibcon#read 5, iclass 19, count 0 2006.229.17:13:54.94#ibcon#about to read 6, iclass 19, count 0 2006.229.17:13:54.94#ibcon#read 6, iclass 19, count 0 2006.229.17:13:54.94#ibcon#end of sib2, iclass 19, count 0 2006.229.17:13:54.94#ibcon#*after write, iclass 19, count 0 2006.229.17:13:54.94#ibcon#*before return 0, iclass 19, count 0 2006.229.17:13:54.94#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:54.94#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:13:54.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:13:54.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:13:54.94$vck44/vb=4,4 2006.229.17:13:54.94#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.17:13:54.94#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.17:13:54.94#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:54.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:55.00#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:55.00#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:55.00#ibcon#enter wrdev, iclass 21, count 2 2006.229.17:13:55.00#ibcon#first serial, iclass 21, count 2 2006.229.17:13:55.00#ibcon#enter sib2, iclass 21, count 2 2006.229.17:13:55.00#ibcon#flushed, iclass 21, count 2 2006.229.17:13:55.00#ibcon#about to write, iclass 21, count 2 2006.229.17:13:55.00#ibcon#wrote, iclass 21, count 2 2006.229.17:13:55.00#ibcon#about to read 3, iclass 21, count 2 2006.229.17:13:55.02#ibcon#read 3, iclass 21, count 2 2006.229.17:13:55.02#ibcon#about to read 4, iclass 21, count 2 2006.229.17:13:55.02#ibcon#read 4, iclass 21, count 2 2006.229.17:13:55.02#ibcon#about to read 5, iclass 21, count 2 2006.229.17:13:55.02#ibcon#read 5, iclass 21, count 2 2006.229.17:13:55.02#ibcon#about to read 6, iclass 21, count 2 2006.229.17:13:55.02#ibcon#read 6, iclass 21, count 2 2006.229.17:13:55.02#ibcon#end of sib2, iclass 21, count 2 2006.229.17:13:55.02#ibcon#*mode == 0, iclass 21, count 2 2006.229.17:13:55.02#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.17:13:55.02#ibcon#[27=AT04-04\r\n] 2006.229.17:13:55.02#ibcon#*before write, iclass 21, count 2 2006.229.17:13:55.02#ibcon#enter sib2, iclass 21, count 2 2006.229.17:13:55.02#ibcon#flushed, iclass 21, count 2 2006.229.17:13:55.02#ibcon#about to write, iclass 21, count 2 2006.229.17:13:55.02#ibcon#wrote, iclass 21, count 2 2006.229.17:13:55.02#ibcon#about to read 3, iclass 21, count 2 2006.229.17:13:55.05#ibcon#read 3, iclass 21, count 2 2006.229.17:13:55.05#ibcon#about to read 4, iclass 21, count 2 2006.229.17:13:55.05#ibcon#read 4, iclass 21, count 2 2006.229.17:13:55.05#ibcon#about to read 5, iclass 21, count 2 2006.229.17:13:55.05#ibcon#read 5, iclass 21, count 2 2006.229.17:13:55.05#ibcon#about to read 6, iclass 21, count 2 2006.229.17:13:55.05#ibcon#read 6, iclass 21, count 2 2006.229.17:13:55.05#ibcon#end of sib2, iclass 21, count 2 2006.229.17:13:55.05#ibcon#*after write, iclass 21, count 2 2006.229.17:13:55.05#ibcon#*before return 0, iclass 21, count 2 2006.229.17:13:55.05#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:55.05#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:13:55.05#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.17:13:55.05#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:55.05#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:55.17#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:55.17#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:55.17#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:13:55.17#ibcon#first serial, iclass 21, count 0 2006.229.17:13:55.17#ibcon#enter sib2, iclass 21, count 0 2006.229.17:13:55.17#ibcon#flushed, iclass 21, count 0 2006.229.17:13:55.17#ibcon#about to write, iclass 21, count 0 2006.229.17:13:55.17#ibcon#wrote, iclass 21, count 0 2006.229.17:13:55.17#ibcon#about to read 3, iclass 21, count 0 2006.229.17:13:55.19#ibcon#read 3, iclass 21, count 0 2006.229.17:13:55.19#ibcon#about to read 4, iclass 21, count 0 2006.229.17:13:55.19#ibcon#read 4, iclass 21, count 0 2006.229.17:13:55.19#ibcon#about to read 5, iclass 21, count 0 2006.229.17:13:55.19#ibcon#read 5, iclass 21, count 0 2006.229.17:13:55.19#ibcon#about to read 6, iclass 21, count 0 2006.229.17:13:55.19#ibcon#read 6, iclass 21, count 0 2006.229.17:13:55.19#ibcon#end of sib2, iclass 21, count 0 2006.229.17:13:55.19#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:13:55.19#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:13:55.19#ibcon#[27=USB\r\n] 2006.229.17:13:55.19#ibcon#*before write, iclass 21, count 0 2006.229.17:13:55.19#ibcon#enter sib2, iclass 21, count 0 2006.229.17:13:55.19#ibcon#flushed, iclass 21, count 0 2006.229.17:13:55.19#ibcon#about to write, iclass 21, count 0 2006.229.17:13:55.19#ibcon#wrote, iclass 21, count 0 2006.229.17:13:55.19#ibcon#about to read 3, iclass 21, count 0 2006.229.17:13:55.22#ibcon#read 3, iclass 21, count 0 2006.229.17:13:55.22#ibcon#about to read 4, iclass 21, count 0 2006.229.17:13:55.22#ibcon#read 4, iclass 21, count 0 2006.229.17:13:55.22#ibcon#about to read 5, iclass 21, count 0 2006.229.17:13:55.22#ibcon#read 5, iclass 21, count 0 2006.229.17:13:55.22#ibcon#about to read 6, iclass 21, count 0 2006.229.17:13:55.22#ibcon#read 6, iclass 21, count 0 2006.229.17:13:55.22#ibcon#end of sib2, iclass 21, count 0 2006.229.17:13:55.22#ibcon#*after write, iclass 21, count 0 2006.229.17:13:55.22#ibcon#*before return 0, iclass 21, count 0 2006.229.17:13:55.22#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:55.22#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:13:55.22#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:13:55.22#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:13:55.22$vck44/vblo=5,709.99 2006.229.17:13:55.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.17:13:55.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.17:13:55.22#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:55.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:55.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:55.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:55.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:13:55.22#ibcon#first serial, iclass 23, count 0 2006.229.17:13:55.22#ibcon#enter sib2, iclass 23, count 0 2006.229.17:13:55.22#ibcon#flushed, iclass 23, count 0 2006.229.17:13:55.22#ibcon#about to write, iclass 23, count 0 2006.229.17:13:55.22#ibcon#wrote, iclass 23, count 0 2006.229.17:13:55.22#ibcon#about to read 3, iclass 23, count 0 2006.229.17:13:55.24#ibcon#read 3, iclass 23, count 0 2006.229.17:13:55.24#ibcon#about to read 4, iclass 23, count 0 2006.229.17:13:55.24#ibcon#read 4, iclass 23, count 0 2006.229.17:13:55.24#ibcon#about to read 5, iclass 23, count 0 2006.229.17:13:55.24#ibcon#read 5, iclass 23, count 0 2006.229.17:13:55.24#ibcon#about to read 6, iclass 23, count 0 2006.229.17:13:55.24#ibcon#read 6, iclass 23, count 0 2006.229.17:13:55.24#ibcon#end of sib2, iclass 23, count 0 2006.229.17:13:55.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:13:55.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:13:55.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:13:55.24#ibcon#*before write, iclass 23, count 0 2006.229.17:13:55.24#ibcon#enter sib2, iclass 23, count 0 2006.229.17:13:55.24#ibcon#flushed, iclass 23, count 0 2006.229.17:13:55.24#ibcon#about to write, iclass 23, count 0 2006.229.17:13:55.24#ibcon#wrote, iclass 23, count 0 2006.229.17:13:55.24#ibcon#about to read 3, iclass 23, count 0 2006.229.17:13:55.28#ibcon#read 3, iclass 23, count 0 2006.229.17:13:55.28#ibcon#about to read 4, iclass 23, count 0 2006.229.17:13:55.28#ibcon#read 4, iclass 23, count 0 2006.229.17:13:55.28#ibcon#about to read 5, iclass 23, count 0 2006.229.17:13:55.28#ibcon#read 5, iclass 23, count 0 2006.229.17:13:55.28#ibcon#about to read 6, iclass 23, count 0 2006.229.17:13:55.28#ibcon#read 6, iclass 23, count 0 2006.229.17:13:55.28#ibcon#end of sib2, iclass 23, count 0 2006.229.17:13:55.28#ibcon#*after write, iclass 23, count 0 2006.229.17:13:55.28#ibcon#*before return 0, iclass 23, count 0 2006.229.17:13:55.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:55.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:13:55.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:13:55.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:13:55.28$vck44/vb=5,4 2006.229.17:13:55.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.17:13:55.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.17:13:55.28#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:55.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:55.34#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:55.34#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:55.34#ibcon#enter wrdev, iclass 25, count 2 2006.229.17:13:55.34#ibcon#first serial, iclass 25, count 2 2006.229.17:13:55.34#ibcon#enter sib2, iclass 25, count 2 2006.229.17:13:55.34#ibcon#flushed, iclass 25, count 2 2006.229.17:13:55.34#ibcon#about to write, iclass 25, count 2 2006.229.17:13:55.34#ibcon#wrote, iclass 25, count 2 2006.229.17:13:55.34#ibcon#about to read 3, iclass 25, count 2 2006.229.17:13:55.36#ibcon#read 3, iclass 25, count 2 2006.229.17:13:55.36#ibcon#about to read 4, iclass 25, count 2 2006.229.17:13:55.36#ibcon#read 4, iclass 25, count 2 2006.229.17:13:55.36#ibcon#about to read 5, iclass 25, count 2 2006.229.17:13:55.36#ibcon#read 5, iclass 25, count 2 2006.229.17:13:55.36#ibcon#about to read 6, iclass 25, count 2 2006.229.17:13:55.36#ibcon#read 6, iclass 25, count 2 2006.229.17:13:55.36#ibcon#end of sib2, iclass 25, count 2 2006.229.17:13:55.36#ibcon#*mode == 0, iclass 25, count 2 2006.229.17:13:55.36#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.17:13:55.36#ibcon#[27=AT05-04\r\n] 2006.229.17:13:55.36#ibcon#*before write, iclass 25, count 2 2006.229.17:13:55.36#ibcon#enter sib2, iclass 25, count 2 2006.229.17:13:55.36#ibcon#flushed, iclass 25, count 2 2006.229.17:13:55.36#ibcon#about to write, iclass 25, count 2 2006.229.17:13:55.36#ibcon#wrote, iclass 25, count 2 2006.229.17:13:55.36#ibcon#about to read 3, iclass 25, count 2 2006.229.17:13:55.39#ibcon#read 3, iclass 25, count 2 2006.229.17:13:55.39#ibcon#about to read 4, iclass 25, count 2 2006.229.17:13:55.39#ibcon#read 4, iclass 25, count 2 2006.229.17:13:55.39#ibcon#about to read 5, iclass 25, count 2 2006.229.17:13:55.39#ibcon#read 5, iclass 25, count 2 2006.229.17:13:55.39#ibcon#about to read 6, iclass 25, count 2 2006.229.17:13:55.39#ibcon#read 6, iclass 25, count 2 2006.229.17:13:55.39#ibcon#end of sib2, iclass 25, count 2 2006.229.17:13:55.39#ibcon#*after write, iclass 25, count 2 2006.229.17:13:55.39#ibcon#*before return 0, iclass 25, count 2 2006.229.17:13:55.39#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:55.39#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:13:55.39#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.17:13:55.39#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:55.39#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:55.51#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:55.51#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:55.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:13:55.51#ibcon#first serial, iclass 25, count 0 2006.229.17:13:55.51#ibcon#enter sib2, iclass 25, count 0 2006.229.17:13:55.51#ibcon#flushed, iclass 25, count 0 2006.229.17:13:55.51#ibcon#about to write, iclass 25, count 0 2006.229.17:13:55.51#ibcon#wrote, iclass 25, count 0 2006.229.17:13:55.51#ibcon#about to read 3, iclass 25, count 0 2006.229.17:13:55.53#ibcon#read 3, iclass 25, count 0 2006.229.17:13:55.53#ibcon#about to read 4, iclass 25, count 0 2006.229.17:13:55.53#ibcon#read 4, iclass 25, count 0 2006.229.17:13:55.53#ibcon#about to read 5, iclass 25, count 0 2006.229.17:13:55.53#ibcon#read 5, iclass 25, count 0 2006.229.17:13:55.53#ibcon#about to read 6, iclass 25, count 0 2006.229.17:13:55.53#ibcon#read 6, iclass 25, count 0 2006.229.17:13:55.53#ibcon#end of sib2, iclass 25, count 0 2006.229.17:13:55.53#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:13:55.53#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:13:55.53#ibcon#[27=USB\r\n] 2006.229.17:13:55.53#ibcon#*before write, iclass 25, count 0 2006.229.17:13:55.53#ibcon#enter sib2, iclass 25, count 0 2006.229.17:13:55.53#ibcon#flushed, iclass 25, count 0 2006.229.17:13:55.53#ibcon#about to write, iclass 25, count 0 2006.229.17:13:55.53#ibcon#wrote, iclass 25, count 0 2006.229.17:13:55.53#ibcon#about to read 3, iclass 25, count 0 2006.229.17:13:55.56#ibcon#read 3, iclass 25, count 0 2006.229.17:13:55.56#ibcon#about to read 4, iclass 25, count 0 2006.229.17:13:55.56#ibcon#read 4, iclass 25, count 0 2006.229.17:13:55.56#ibcon#about to read 5, iclass 25, count 0 2006.229.17:13:55.56#ibcon#read 5, iclass 25, count 0 2006.229.17:13:55.56#ibcon#about to read 6, iclass 25, count 0 2006.229.17:13:55.56#ibcon#read 6, iclass 25, count 0 2006.229.17:13:55.56#ibcon#end of sib2, iclass 25, count 0 2006.229.17:13:55.56#ibcon#*after write, iclass 25, count 0 2006.229.17:13:55.56#ibcon#*before return 0, iclass 25, count 0 2006.229.17:13:55.56#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:55.56#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:13:55.56#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:13:55.56#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:13:55.56$vck44/vblo=6,719.99 2006.229.17:13:55.56#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.17:13:55.56#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.17:13:55.56#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:55.56#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:55.56#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:55.56#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:55.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:13:55.56#ibcon#first serial, iclass 27, count 0 2006.229.17:13:55.56#ibcon#enter sib2, iclass 27, count 0 2006.229.17:13:55.56#ibcon#flushed, iclass 27, count 0 2006.229.17:13:55.56#ibcon#about to write, iclass 27, count 0 2006.229.17:13:55.57#ibcon#wrote, iclass 27, count 0 2006.229.17:13:55.57#ibcon#about to read 3, iclass 27, count 0 2006.229.17:13:55.58#ibcon#read 3, iclass 27, count 0 2006.229.17:13:55.58#ibcon#about to read 4, iclass 27, count 0 2006.229.17:13:55.58#ibcon#read 4, iclass 27, count 0 2006.229.17:13:55.58#ibcon#about to read 5, iclass 27, count 0 2006.229.17:13:55.58#ibcon#read 5, iclass 27, count 0 2006.229.17:13:55.58#ibcon#about to read 6, iclass 27, count 0 2006.229.17:13:55.58#ibcon#read 6, iclass 27, count 0 2006.229.17:13:55.58#ibcon#end of sib2, iclass 27, count 0 2006.229.17:13:55.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:13:55.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:13:55.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:13:55.58#ibcon#*before write, iclass 27, count 0 2006.229.17:13:55.58#ibcon#enter sib2, iclass 27, count 0 2006.229.17:13:55.58#ibcon#flushed, iclass 27, count 0 2006.229.17:13:55.58#ibcon#about to write, iclass 27, count 0 2006.229.17:13:55.58#ibcon#wrote, iclass 27, count 0 2006.229.17:13:55.58#ibcon#about to read 3, iclass 27, count 0 2006.229.17:13:55.62#ibcon#read 3, iclass 27, count 0 2006.229.17:13:55.62#ibcon#about to read 4, iclass 27, count 0 2006.229.17:13:55.62#ibcon#read 4, iclass 27, count 0 2006.229.17:13:55.62#ibcon#about to read 5, iclass 27, count 0 2006.229.17:13:55.62#ibcon#read 5, iclass 27, count 0 2006.229.17:13:55.62#ibcon#about to read 6, iclass 27, count 0 2006.229.17:13:55.62#ibcon#read 6, iclass 27, count 0 2006.229.17:13:55.62#ibcon#end of sib2, iclass 27, count 0 2006.229.17:13:55.62#ibcon#*after write, iclass 27, count 0 2006.229.17:13:55.62#ibcon#*before return 0, iclass 27, count 0 2006.229.17:13:55.62#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:55.62#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:13:55.62#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:13:55.62#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:13:55.62$vck44/vb=6,4 2006.229.17:13:55.62#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.17:13:55.62#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.17:13:55.62#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:55.62#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:55.68#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:55.68#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:55.68#ibcon#enter wrdev, iclass 29, count 2 2006.229.17:13:55.68#ibcon#first serial, iclass 29, count 2 2006.229.17:13:55.68#ibcon#enter sib2, iclass 29, count 2 2006.229.17:13:55.68#ibcon#flushed, iclass 29, count 2 2006.229.17:13:55.68#ibcon#about to write, iclass 29, count 2 2006.229.17:13:55.68#ibcon#wrote, iclass 29, count 2 2006.229.17:13:55.68#ibcon#about to read 3, iclass 29, count 2 2006.229.17:13:55.70#ibcon#read 3, iclass 29, count 2 2006.229.17:13:55.70#ibcon#about to read 4, iclass 29, count 2 2006.229.17:13:55.70#ibcon#read 4, iclass 29, count 2 2006.229.17:13:55.70#ibcon#about to read 5, iclass 29, count 2 2006.229.17:13:55.70#ibcon#read 5, iclass 29, count 2 2006.229.17:13:55.70#ibcon#about to read 6, iclass 29, count 2 2006.229.17:13:55.70#ibcon#read 6, iclass 29, count 2 2006.229.17:13:55.70#ibcon#end of sib2, iclass 29, count 2 2006.229.17:13:55.70#ibcon#*mode == 0, iclass 29, count 2 2006.229.17:13:55.70#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.17:13:55.70#ibcon#[27=AT06-04\r\n] 2006.229.17:13:55.70#ibcon#*before write, iclass 29, count 2 2006.229.17:13:55.70#ibcon#enter sib2, iclass 29, count 2 2006.229.17:13:55.70#ibcon#flushed, iclass 29, count 2 2006.229.17:13:55.70#ibcon#about to write, iclass 29, count 2 2006.229.17:13:55.70#ibcon#wrote, iclass 29, count 2 2006.229.17:13:55.70#ibcon#about to read 3, iclass 29, count 2 2006.229.17:13:55.73#ibcon#read 3, iclass 29, count 2 2006.229.17:13:55.73#ibcon#about to read 4, iclass 29, count 2 2006.229.17:13:55.73#ibcon#read 4, iclass 29, count 2 2006.229.17:13:55.73#ibcon#about to read 5, iclass 29, count 2 2006.229.17:13:55.73#ibcon#read 5, iclass 29, count 2 2006.229.17:13:55.73#ibcon#about to read 6, iclass 29, count 2 2006.229.17:13:55.73#ibcon#read 6, iclass 29, count 2 2006.229.17:13:55.73#ibcon#end of sib2, iclass 29, count 2 2006.229.17:13:55.73#ibcon#*after write, iclass 29, count 2 2006.229.17:13:55.73#ibcon#*before return 0, iclass 29, count 2 2006.229.17:13:55.73#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:55.73#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:13:55.73#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.17:13:55.73#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:55.73#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:55.85#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:55.85#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:55.85#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:13:55.85#ibcon#first serial, iclass 29, count 0 2006.229.17:13:55.85#ibcon#enter sib2, iclass 29, count 0 2006.229.17:13:55.85#ibcon#flushed, iclass 29, count 0 2006.229.17:13:55.85#ibcon#about to write, iclass 29, count 0 2006.229.17:13:55.85#ibcon#wrote, iclass 29, count 0 2006.229.17:13:55.85#ibcon#about to read 3, iclass 29, count 0 2006.229.17:13:55.87#ibcon#read 3, iclass 29, count 0 2006.229.17:13:55.87#ibcon#about to read 4, iclass 29, count 0 2006.229.17:13:55.87#ibcon#read 4, iclass 29, count 0 2006.229.17:13:55.87#ibcon#about to read 5, iclass 29, count 0 2006.229.17:13:55.87#ibcon#read 5, iclass 29, count 0 2006.229.17:13:55.87#ibcon#about to read 6, iclass 29, count 0 2006.229.17:13:55.87#ibcon#read 6, iclass 29, count 0 2006.229.17:13:55.87#ibcon#end of sib2, iclass 29, count 0 2006.229.17:13:55.87#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:13:55.87#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:13:55.87#ibcon#[27=USB\r\n] 2006.229.17:13:55.87#ibcon#*before write, iclass 29, count 0 2006.229.17:13:55.87#ibcon#enter sib2, iclass 29, count 0 2006.229.17:13:55.87#ibcon#flushed, iclass 29, count 0 2006.229.17:13:55.87#ibcon#about to write, iclass 29, count 0 2006.229.17:13:55.87#ibcon#wrote, iclass 29, count 0 2006.229.17:13:55.87#ibcon#about to read 3, iclass 29, count 0 2006.229.17:13:55.90#ibcon#read 3, iclass 29, count 0 2006.229.17:13:55.90#ibcon#about to read 4, iclass 29, count 0 2006.229.17:13:55.90#ibcon#read 4, iclass 29, count 0 2006.229.17:13:55.90#ibcon#about to read 5, iclass 29, count 0 2006.229.17:13:55.90#ibcon#read 5, iclass 29, count 0 2006.229.17:13:55.90#ibcon#about to read 6, iclass 29, count 0 2006.229.17:13:55.90#ibcon#read 6, iclass 29, count 0 2006.229.17:13:55.90#ibcon#end of sib2, iclass 29, count 0 2006.229.17:13:55.90#ibcon#*after write, iclass 29, count 0 2006.229.17:13:55.90#ibcon#*before return 0, iclass 29, count 0 2006.229.17:13:55.90#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:55.90#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:13:55.90#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:13:55.90#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:13:55.90$vck44/vblo=7,734.99 2006.229.17:13:55.90#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.17:13:55.90#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.17:13:55.90#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:55.90#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:55.90#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:55.90#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:55.90#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:13:55.90#ibcon#first serial, iclass 31, count 0 2006.229.17:13:55.90#ibcon#enter sib2, iclass 31, count 0 2006.229.17:13:55.90#ibcon#flushed, iclass 31, count 0 2006.229.17:13:55.90#ibcon#about to write, iclass 31, count 0 2006.229.17:13:55.90#ibcon#wrote, iclass 31, count 0 2006.229.17:13:55.90#ibcon#about to read 3, iclass 31, count 0 2006.229.17:13:55.92#ibcon#read 3, iclass 31, count 0 2006.229.17:13:55.92#ibcon#about to read 4, iclass 31, count 0 2006.229.17:13:55.92#ibcon#read 4, iclass 31, count 0 2006.229.17:13:55.92#ibcon#about to read 5, iclass 31, count 0 2006.229.17:13:55.92#ibcon#read 5, iclass 31, count 0 2006.229.17:13:55.92#ibcon#about to read 6, iclass 31, count 0 2006.229.17:13:55.92#ibcon#read 6, iclass 31, count 0 2006.229.17:13:55.92#ibcon#end of sib2, iclass 31, count 0 2006.229.17:13:55.92#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:13:55.92#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:13:55.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:13:55.92#ibcon#*before write, iclass 31, count 0 2006.229.17:13:55.92#ibcon#enter sib2, iclass 31, count 0 2006.229.17:13:55.92#ibcon#flushed, iclass 31, count 0 2006.229.17:13:55.92#ibcon#about to write, iclass 31, count 0 2006.229.17:13:55.92#ibcon#wrote, iclass 31, count 0 2006.229.17:13:55.92#ibcon#about to read 3, iclass 31, count 0 2006.229.17:13:55.96#ibcon#read 3, iclass 31, count 0 2006.229.17:13:55.96#ibcon#about to read 4, iclass 31, count 0 2006.229.17:13:55.96#ibcon#read 4, iclass 31, count 0 2006.229.17:13:55.96#ibcon#about to read 5, iclass 31, count 0 2006.229.17:13:55.96#ibcon#read 5, iclass 31, count 0 2006.229.17:13:55.96#ibcon#about to read 6, iclass 31, count 0 2006.229.17:13:55.96#ibcon#read 6, iclass 31, count 0 2006.229.17:13:55.96#ibcon#end of sib2, iclass 31, count 0 2006.229.17:13:55.96#ibcon#*after write, iclass 31, count 0 2006.229.17:13:55.96#ibcon#*before return 0, iclass 31, count 0 2006.229.17:13:55.96#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:55.96#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:13:55.96#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:13:55.96#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:13:55.96$vck44/vb=7,4 2006.229.17:13:55.96#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.17:13:55.96#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.17:13:55.96#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:55.96#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:56.02#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:56.02#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:56.02#ibcon#enter wrdev, iclass 33, count 2 2006.229.17:13:56.02#ibcon#first serial, iclass 33, count 2 2006.229.17:13:56.02#ibcon#enter sib2, iclass 33, count 2 2006.229.17:13:56.02#ibcon#flushed, iclass 33, count 2 2006.229.17:13:56.02#ibcon#about to write, iclass 33, count 2 2006.229.17:13:56.02#ibcon#wrote, iclass 33, count 2 2006.229.17:13:56.02#ibcon#about to read 3, iclass 33, count 2 2006.229.17:13:56.04#ibcon#read 3, iclass 33, count 2 2006.229.17:13:56.04#ibcon#about to read 4, iclass 33, count 2 2006.229.17:13:56.04#ibcon#read 4, iclass 33, count 2 2006.229.17:13:56.04#ibcon#about to read 5, iclass 33, count 2 2006.229.17:13:56.04#ibcon#read 5, iclass 33, count 2 2006.229.17:13:56.04#ibcon#about to read 6, iclass 33, count 2 2006.229.17:13:56.04#ibcon#read 6, iclass 33, count 2 2006.229.17:13:56.04#ibcon#end of sib2, iclass 33, count 2 2006.229.17:13:56.04#ibcon#*mode == 0, iclass 33, count 2 2006.229.17:13:56.04#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.17:13:56.04#ibcon#[27=AT07-04\r\n] 2006.229.17:13:56.04#ibcon#*before write, iclass 33, count 2 2006.229.17:13:56.04#ibcon#enter sib2, iclass 33, count 2 2006.229.17:13:56.04#ibcon#flushed, iclass 33, count 2 2006.229.17:13:56.04#ibcon#about to write, iclass 33, count 2 2006.229.17:13:56.04#ibcon#wrote, iclass 33, count 2 2006.229.17:13:56.04#ibcon#about to read 3, iclass 33, count 2 2006.229.17:13:56.07#ibcon#read 3, iclass 33, count 2 2006.229.17:13:56.07#ibcon#about to read 4, iclass 33, count 2 2006.229.17:13:56.07#ibcon#read 4, iclass 33, count 2 2006.229.17:13:56.07#ibcon#about to read 5, iclass 33, count 2 2006.229.17:13:56.07#ibcon#read 5, iclass 33, count 2 2006.229.17:13:56.07#ibcon#about to read 6, iclass 33, count 2 2006.229.17:13:56.07#ibcon#read 6, iclass 33, count 2 2006.229.17:13:56.07#ibcon#end of sib2, iclass 33, count 2 2006.229.17:13:56.07#ibcon#*after write, iclass 33, count 2 2006.229.17:13:56.07#ibcon#*before return 0, iclass 33, count 2 2006.229.17:13:56.07#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:56.07#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:13:56.07#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.17:13:56.07#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:56.07#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:56.19#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:56.19#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:56.19#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:13:56.19#ibcon#first serial, iclass 33, count 0 2006.229.17:13:56.19#ibcon#enter sib2, iclass 33, count 0 2006.229.17:13:56.19#ibcon#flushed, iclass 33, count 0 2006.229.17:13:56.19#ibcon#about to write, iclass 33, count 0 2006.229.17:13:56.19#ibcon#wrote, iclass 33, count 0 2006.229.17:13:56.19#ibcon#about to read 3, iclass 33, count 0 2006.229.17:13:56.21#ibcon#read 3, iclass 33, count 0 2006.229.17:13:56.21#ibcon#about to read 4, iclass 33, count 0 2006.229.17:13:56.21#ibcon#read 4, iclass 33, count 0 2006.229.17:13:56.21#ibcon#about to read 5, iclass 33, count 0 2006.229.17:13:56.21#ibcon#read 5, iclass 33, count 0 2006.229.17:13:56.21#ibcon#about to read 6, iclass 33, count 0 2006.229.17:13:56.21#ibcon#read 6, iclass 33, count 0 2006.229.17:13:56.21#ibcon#end of sib2, iclass 33, count 0 2006.229.17:13:56.21#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:13:56.21#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:13:56.21#ibcon#[27=USB\r\n] 2006.229.17:13:56.21#ibcon#*before write, iclass 33, count 0 2006.229.17:13:56.21#ibcon#enter sib2, iclass 33, count 0 2006.229.17:13:56.21#ibcon#flushed, iclass 33, count 0 2006.229.17:13:56.21#ibcon#about to write, iclass 33, count 0 2006.229.17:13:56.21#ibcon#wrote, iclass 33, count 0 2006.229.17:13:56.21#ibcon#about to read 3, iclass 33, count 0 2006.229.17:13:56.24#ibcon#read 3, iclass 33, count 0 2006.229.17:13:56.24#ibcon#about to read 4, iclass 33, count 0 2006.229.17:13:56.24#ibcon#read 4, iclass 33, count 0 2006.229.17:13:56.24#ibcon#about to read 5, iclass 33, count 0 2006.229.17:13:56.24#ibcon#read 5, iclass 33, count 0 2006.229.17:13:56.24#ibcon#about to read 6, iclass 33, count 0 2006.229.17:13:56.24#ibcon#read 6, iclass 33, count 0 2006.229.17:13:56.24#ibcon#end of sib2, iclass 33, count 0 2006.229.17:13:56.24#ibcon#*after write, iclass 33, count 0 2006.229.17:13:56.24#ibcon#*before return 0, iclass 33, count 0 2006.229.17:13:56.24#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:56.24#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:13:56.24#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:13:56.24#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:13:56.24$vck44/vblo=8,744.99 2006.229.17:13:56.24#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.17:13:56.24#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.17:13:56.24#ibcon#ireg 17 cls_cnt 0 2006.229.17:13:56.24#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:56.24#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:56.24#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:56.24#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:13:56.24#ibcon#first serial, iclass 35, count 0 2006.229.17:13:56.24#ibcon#enter sib2, iclass 35, count 0 2006.229.17:13:56.24#ibcon#flushed, iclass 35, count 0 2006.229.17:13:56.24#ibcon#about to write, iclass 35, count 0 2006.229.17:13:56.24#ibcon#wrote, iclass 35, count 0 2006.229.17:13:56.24#ibcon#about to read 3, iclass 35, count 0 2006.229.17:13:56.26#ibcon#read 3, iclass 35, count 0 2006.229.17:13:56.26#ibcon#about to read 4, iclass 35, count 0 2006.229.17:13:56.26#ibcon#read 4, iclass 35, count 0 2006.229.17:13:56.26#ibcon#about to read 5, iclass 35, count 0 2006.229.17:13:56.26#ibcon#read 5, iclass 35, count 0 2006.229.17:13:56.26#ibcon#about to read 6, iclass 35, count 0 2006.229.17:13:56.26#ibcon#read 6, iclass 35, count 0 2006.229.17:13:56.26#ibcon#end of sib2, iclass 35, count 0 2006.229.17:13:56.26#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:13:56.26#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:13:56.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:13:56.26#ibcon#*before write, iclass 35, count 0 2006.229.17:13:56.26#ibcon#enter sib2, iclass 35, count 0 2006.229.17:13:56.26#ibcon#flushed, iclass 35, count 0 2006.229.17:13:56.26#ibcon#about to write, iclass 35, count 0 2006.229.17:13:56.26#ibcon#wrote, iclass 35, count 0 2006.229.17:13:56.26#ibcon#about to read 3, iclass 35, count 0 2006.229.17:13:56.30#ibcon#read 3, iclass 35, count 0 2006.229.17:13:56.30#ibcon#about to read 4, iclass 35, count 0 2006.229.17:13:56.30#ibcon#read 4, iclass 35, count 0 2006.229.17:13:56.30#ibcon#about to read 5, iclass 35, count 0 2006.229.17:13:56.30#ibcon#read 5, iclass 35, count 0 2006.229.17:13:56.30#ibcon#about to read 6, iclass 35, count 0 2006.229.17:13:56.30#ibcon#read 6, iclass 35, count 0 2006.229.17:13:56.30#ibcon#end of sib2, iclass 35, count 0 2006.229.17:13:56.30#ibcon#*after write, iclass 35, count 0 2006.229.17:13:56.30#ibcon#*before return 0, iclass 35, count 0 2006.229.17:13:56.30#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:56.30#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:13:56.30#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:13:56.30#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:13:56.30$vck44/vb=8,4 2006.229.17:13:56.30#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.17:13:56.30#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.17:13:56.30#ibcon#ireg 11 cls_cnt 2 2006.229.17:13:56.30#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:56.36#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:56.36#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:56.36#ibcon#enter wrdev, iclass 37, count 2 2006.229.17:13:56.36#ibcon#first serial, iclass 37, count 2 2006.229.17:13:56.36#ibcon#enter sib2, iclass 37, count 2 2006.229.17:13:56.36#ibcon#flushed, iclass 37, count 2 2006.229.17:13:56.36#ibcon#about to write, iclass 37, count 2 2006.229.17:13:56.36#ibcon#wrote, iclass 37, count 2 2006.229.17:13:56.36#ibcon#about to read 3, iclass 37, count 2 2006.229.17:13:56.38#ibcon#read 3, iclass 37, count 2 2006.229.17:13:56.38#ibcon#about to read 4, iclass 37, count 2 2006.229.17:13:56.38#ibcon#read 4, iclass 37, count 2 2006.229.17:13:56.38#ibcon#about to read 5, iclass 37, count 2 2006.229.17:13:56.38#ibcon#read 5, iclass 37, count 2 2006.229.17:13:56.38#ibcon#about to read 6, iclass 37, count 2 2006.229.17:13:56.38#ibcon#read 6, iclass 37, count 2 2006.229.17:13:56.38#ibcon#end of sib2, iclass 37, count 2 2006.229.17:13:56.38#ibcon#*mode == 0, iclass 37, count 2 2006.229.17:13:56.38#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.17:13:56.38#ibcon#[27=AT08-04\r\n] 2006.229.17:13:56.38#ibcon#*before write, iclass 37, count 2 2006.229.17:13:56.38#ibcon#enter sib2, iclass 37, count 2 2006.229.17:13:56.38#ibcon#flushed, iclass 37, count 2 2006.229.17:13:56.38#ibcon#about to write, iclass 37, count 2 2006.229.17:13:56.38#ibcon#wrote, iclass 37, count 2 2006.229.17:13:56.38#ibcon#about to read 3, iclass 37, count 2 2006.229.17:13:56.41#ibcon#read 3, iclass 37, count 2 2006.229.17:13:56.41#ibcon#about to read 4, iclass 37, count 2 2006.229.17:13:56.41#ibcon#read 4, iclass 37, count 2 2006.229.17:13:56.41#ibcon#about to read 5, iclass 37, count 2 2006.229.17:13:56.41#ibcon#read 5, iclass 37, count 2 2006.229.17:13:56.41#ibcon#about to read 6, iclass 37, count 2 2006.229.17:13:56.41#ibcon#read 6, iclass 37, count 2 2006.229.17:13:56.41#ibcon#end of sib2, iclass 37, count 2 2006.229.17:13:56.41#ibcon#*after write, iclass 37, count 2 2006.229.17:13:56.41#ibcon#*before return 0, iclass 37, count 2 2006.229.17:13:56.41#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:56.41#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:13:56.41#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.17:13:56.41#ibcon#ireg 7 cls_cnt 0 2006.229.17:13:56.41#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:56.53#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:56.53#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:56.53#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:13:56.53#ibcon#first serial, iclass 37, count 0 2006.229.17:13:56.53#ibcon#enter sib2, iclass 37, count 0 2006.229.17:13:56.53#ibcon#flushed, iclass 37, count 0 2006.229.17:13:56.53#ibcon#about to write, iclass 37, count 0 2006.229.17:13:56.53#ibcon#wrote, iclass 37, count 0 2006.229.17:13:56.53#ibcon#about to read 3, iclass 37, count 0 2006.229.17:13:56.55#ibcon#read 3, iclass 37, count 0 2006.229.17:13:56.55#ibcon#about to read 4, iclass 37, count 0 2006.229.17:13:56.55#ibcon#read 4, iclass 37, count 0 2006.229.17:13:56.55#ibcon#about to read 5, iclass 37, count 0 2006.229.17:13:56.55#ibcon#read 5, iclass 37, count 0 2006.229.17:13:56.55#ibcon#about to read 6, iclass 37, count 0 2006.229.17:13:56.55#ibcon#read 6, iclass 37, count 0 2006.229.17:13:56.55#ibcon#end of sib2, iclass 37, count 0 2006.229.17:13:56.55#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:13:56.55#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:13:56.55#ibcon#[27=USB\r\n] 2006.229.17:13:56.55#ibcon#*before write, iclass 37, count 0 2006.229.17:13:56.55#ibcon#enter sib2, iclass 37, count 0 2006.229.17:13:56.55#ibcon#flushed, iclass 37, count 0 2006.229.17:13:56.55#ibcon#about to write, iclass 37, count 0 2006.229.17:13:56.55#ibcon#wrote, iclass 37, count 0 2006.229.17:13:56.55#ibcon#about to read 3, iclass 37, count 0 2006.229.17:13:56.58#ibcon#read 3, iclass 37, count 0 2006.229.17:13:56.58#ibcon#about to read 4, iclass 37, count 0 2006.229.17:13:56.58#ibcon#read 4, iclass 37, count 0 2006.229.17:13:56.58#ibcon#about to read 5, iclass 37, count 0 2006.229.17:13:56.58#ibcon#read 5, iclass 37, count 0 2006.229.17:13:56.58#ibcon#about to read 6, iclass 37, count 0 2006.229.17:13:56.58#ibcon#read 6, iclass 37, count 0 2006.229.17:13:56.58#ibcon#end of sib2, iclass 37, count 0 2006.229.17:13:56.58#ibcon#*after write, iclass 37, count 0 2006.229.17:13:56.58#ibcon#*before return 0, iclass 37, count 0 2006.229.17:13:56.58#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:56.58#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:13:56.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:13:56.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:13:56.58$vck44/vabw=wide 2006.229.17:13:56.58#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.17:13:56.58#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.17:13:56.58#ibcon#ireg 8 cls_cnt 0 2006.229.17:13:56.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:56.58#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:56.58#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:56.58#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:13:56.58#ibcon#first serial, iclass 39, count 0 2006.229.17:13:56.58#ibcon#enter sib2, iclass 39, count 0 2006.229.17:13:56.58#ibcon#flushed, iclass 39, count 0 2006.229.17:13:56.58#ibcon#about to write, iclass 39, count 0 2006.229.17:13:56.58#ibcon#wrote, iclass 39, count 0 2006.229.17:13:56.58#ibcon#about to read 3, iclass 39, count 0 2006.229.17:13:56.60#ibcon#read 3, iclass 39, count 0 2006.229.17:13:56.60#ibcon#about to read 4, iclass 39, count 0 2006.229.17:13:56.60#ibcon#read 4, iclass 39, count 0 2006.229.17:13:56.60#ibcon#about to read 5, iclass 39, count 0 2006.229.17:13:56.60#ibcon#read 5, iclass 39, count 0 2006.229.17:13:56.60#ibcon#about to read 6, iclass 39, count 0 2006.229.17:13:56.60#ibcon#read 6, iclass 39, count 0 2006.229.17:13:56.60#ibcon#end of sib2, iclass 39, count 0 2006.229.17:13:56.60#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:13:56.60#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:13:56.60#ibcon#[25=BW32\r\n] 2006.229.17:13:56.60#ibcon#*before write, iclass 39, count 0 2006.229.17:13:56.60#ibcon#enter sib2, iclass 39, count 0 2006.229.17:13:56.60#ibcon#flushed, iclass 39, count 0 2006.229.17:13:56.60#ibcon#about to write, iclass 39, count 0 2006.229.17:13:56.60#ibcon#wrote, iclass 39, count 0 2006.229.17:13:56.60#ibcon#about to read 3, iclass 39, count 0 2006.229.17:13:56.63#ibcon#read 3, iclass 39, count 0 2006.229.17:13:56.63#ibcon#about to read 4, iclass 39, count 0 2006.229.17:13:56.63#ibcon#read 4, iclass 39, count 0 2006.229.17:13:56.63#ibcon#about to read 5, iclass 39, count 0 2006.229.17:13:56.63#ibcon#read 5, iclass 39, count 0 2006.229.17:13:56.63#ibcon#about to read 6, iclass 39, count 0 2006.229.17:13:56.63#ibcon#read 6, iclass 39, count 0 2006.229.17:13:56.63#ibcon#end of sib2, iclass 39, count 0 2006.229.17:13:56.63#ibcon#*after write, iclass 39, count 0 2006.229.17:13:56.63#ibcon#*before return 0, iclass 39, count 0 2006.229.17:13:56.63#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:56.63#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:13:56.63#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:13:56.63#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:13:56.63$vck44/vbbw=wide 2006.229.17:13:56.63#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:13:56.63#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:13:56.63#ibcon#ireg 8 cls_cnt 0 2006.229.17:13:56.63#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:13:56.70#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:13:56.70#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:13:56.70#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:13:56.70#ibcon#first serial, iclass 3, count 0 2006.229.17:13:56.70#ibcon#enter sib2, iclass 3, count 0 2006.229.17:13:56.70#ibcon#flushed, iclass 3, count 0 2006.229.17:13:56.70#ibcon#about to write, iclass 3, count 0 2006.229.17:13:56.70#ibcon#wrote, iclass 3, count 0 2006.229.17:13:56.70#ibcon#about to read 3, iclass 3, count 0 2006.229.17:13:56.72#ibcon#read 3, iclass 3, count 0 2006.229.17:13:56.72#ibcon#about to read 4, iclass 3, count 0 2006.229.17:13:56.72#ibcon#read 4, iclass 3, count 0 2006.229.17:13:56.72#ibcon#about to read 5, iclass 3, count 0 2006.229.17:13:56.72#ibcon#read 5, iclass 3, count 0 2006.229.17:13:56.72#ibcon#about to read 6, iclass 3, count 0 2006.229.17:13:56.72#ibcon#read 6, iclass 3, count 0 2006.229.17:13:56.72#ibcon#end of sib2, iclass 3, count 0 2006.229.17:13:56.72#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:13:56.72#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:13:56.72#ibcon#[27=BW32\r\n] 2006.229.17:13:56.72#ibcon#*before write, iclass 3, count 0 2006.229.17:13:56.72#ibcon#enter sib2, iclass 3, count 0 2006.229.17:13:56.72#ibcon#flushed, iclass 3, count 0 2006.229.17:13:56.72#ibcon#about to write, iclass 3, count 0 2006.229.17:13:56.72#ibcon#wrote, iclass 3, count 0 2006.229.17:13:56.72#ibcon#about to read 3, iclass 3, count 0 2006.229.17:13:56.75#ibcon#read 3, iclass 3, count 0 2006.229.17:13:56.75#ibcon#about to read 4, iclass 3, count 0 2006.229.17:13:56.75#ibcon#read 4, iclass 3, count 0 2006.229.17:13:56.75#ibcon#about to read 5, iclass 3, count 0 2006.229.17:13:56.75#ibcon#read 5, iclass 3, count 0 2006.229.17:13:56.75#ibcon#about to read 6, iclass 3, count 0 2006.229.17:13:56.75#ibcon#read 6, iclass 3, count 0 2006.229.17:13:56.75#ibcon#end of sib2, iclass 3, count 0 2006.229.17:13:56.75#ibcon#*after write, iclass 3, count 0 2006.229.17:13:56.75#ibcon#*before return 0, iclass 3, count 0 2006.229.17:13:56.75#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:13:56.75#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:13:56.75#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:13:56.75#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:13:56.75$setupk4/ifdk4 2006.229.17:13:56.75$ifdk4/lo= 2006.229.17:13:56.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:13:56.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:13:56.76$ifdk4/patch= 2006.229.17:13:56.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:13:56.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:13:56.76$setupk4/!*+20s 2006.229.17:14:01.76#abcon#<5=/07 1.5 3.1 27.011001001.8\r\n> 2006.229.17:14:01.78#abcon#{5=INTERFACE CLEAR} 2006.229.17:14:01.84#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:14:11.27$setupk4/"tpicd 2006.229.17:14:11.27$setupk4/echo=off 2006.229.17:14:11.27$setupk4/xlog=off 2006.229.17:14:11.27:!2006.229.17:14:52 2006.229.17:14:13.14#trakl#Source acquired 2006.229.17:14:13.14#flagr#flagr/antenna,acquired 2006.229.17:14:52.00:preob 2006.229.17:14:53.14/onsource/TRACKING 2006.229.17:14:53.14:!2006.229.17:15:02 2006.229.17:15:02.00:"tape 2006.229.17:15:02.00:"st=record 2006.229.17:15:02.00:data_valid=on 2006.229.17:15:02.00:midob 2006.229.17:15:02.13/onsource/TRACKING 2006.229.17:15:02.14/wx/27.01,1001.8,100 2006.229.17:15:02.33/cable/+6.4155E-03 2006.229.17:15:03.42/va/01,08,usb,yes,35,38 2006.229.17:15:03.42/va/02,07,usb,yes,38,38 2006.229.17:15:03.42/va/03,06,usb,yes,47,50 2006.229.17:15:03.42/va/04,07,usb,yes,39,41 2006.229.17:15:03.42/va/05,04,usb,yes,35,36 2006.229.17:15:03.42/va/06,04,usb,yes,39,39 2006.229.17:15:03.42/va/07,05,usb,yes,35,35 2006.229.17:15:03.42/va/08,06,usb,yes,26,31 2006.229.17:15:03.65/valo/01,524.99,yes,locked 2006.229.17:15:03.65/valo/02,534.99,yes,locked 2006.229.17:15:03.65/valo/03,564.99,yes,locked 2006.229.17:15:03.65/valo/04,624.99,yes,locked 2006.229.17:15:03.65/valo/05,734.99,yes,locked 2006.229.17:15:03.65/valo/06,814.99,yes,locked 2006.229.17:15:03.65/valo/07,864.99,yes,locked 2006.229.17:15:03.65/valo/08,884.99,yes,locked 2006.229.17:15:04.74/vb/01,04,usb,yes,31,29 2006.229.17:15:04.74/vb/02,04,usb,yes,33,33 2006.229.17:15:04.74/vb/03,04,usb,yes,30,33 2006.229.17:15:04.74/vb/04,04,usb,yes,35,34 2006.229.17:15:04.74/vb/05,04,usb,yes,27,30 2006.229.17:15:04.74/vb/06,04,usb,yes,32,28 2006.229.17:15:04.74/vb/07,04,usb,yes,31,31 2006.229.17:15:04.74/vb/08,04,usb,yes,29,32 2006.229.17:15:04.97/vblo/01,629.99,yes,locked 2006.229.17:15:04.97/vblo/02,634.99,yes,locked 2006.229.17:15:04.97/vblo/03,649.99,yes,locked 2006.229.17:15:04.97/vblo/04,679.99,yes,locked 2006.229.17:15:04.97/vblo/05,709.99,yes,locked 2006.229.17:15:04.97/vblo/06,719.99,yes,locked 2006.229.17:15:04.97/vblo/07,734.99,yes,locked 2006.229.17:15:04.97/vblo/08,744.99,yes,locked 2006.229.17:15:05.12/vabw/8 2006.229.17:15:05.27/vbbw/8 2006.229.17:15:05.36/xfe/off,on,12.2 2006.229.17:15:05.75/ifatt/23,28,28,28 2006.229.17:15:06.07/fmout-gps/S +4.52E-07 2006.229.17:15:06.11:!2006.229.17:17:42 2006.229.17:17:42.01:data_valid=off 2006.229.17:17:42.02:"et 2006.229.17:17:42.02:!+3s 2006.229.17:17:45.03:"tape 2006.229.17:17:45.04:postob 2006.229.17:17:45.17/cable/+6.4176E-03 2006.229.17:17:45.18/wx/27.01,1001.7,100 2006.229.17:17:45.23/fmout-gps/S +4.55E-07 2006.229.17:17:45.24:scan_name=229-1726,jd0608,50 2006.229.17:17:45.24:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.17:17:47.14#flagr#flagr/antenna,new-source 2006.229.17:17:47.15:checkk5 2006.229.17:17:47.58/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:17:47.97/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:17:48.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:17:48.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:17:49.15/chk_obsdata//k5ts1/T2291715??a.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.17:17:49.54/chk_obsdata//k5ts2/T2291715??b.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.17:17:49.94/chk_obsdata//k5ts3/T2291715??c.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.17:17:50.32/chk_obsdata//k5ts4/T2291715??d.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.17:17:51.05/k5log//k5ts1_log_newline 2006.229.17:17:51.76/k5log//k5ts2_log_newline 2006.229.17:17:52.48/k5log//k5ts3_log_newline 2006.229.17:17:53.22/k5log//k5ts4_log_newline 2006.229.17:17:53.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:17:53.24:setupk4=1 2006.229.17:17:53.24$setupk4/echo=on 2006.229.17:17:53.24$setupk4/pcalon 2006.229.17:17:53.24$pcalon/"no phase cal control is implemented here 2006.229.17:17:53.24$setupk4/"tpicd=stop 2006.229.17:17:53.24$setupk4/"rec=synch_on 2006.229.17:17:53.24$setupk4/"rec_mode=128 2006.229.17:17:53.24$setupk4/!* 2006.229.17:17:53.24$setupk4/recpk4 2006.229.17:17:53.24$recpk4/recpatch= 2006.229.17:17:53.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:17:53.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:17:53.25$setupk4/vck44 2006.229.17:17:53.25$vck44/valo=1,524.99 2006.229.17:17:53.25#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:17:53.25#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:17:53.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:53.25#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:53.25#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:53.25#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:53.25#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:17:53.25#ibcon#first serial, iclass 30, count 0 2006.229.17:17:53.25#ibcon#enter sib2, iclass 30, count 0 2006.229.17:17:53.25#ibcon#flushed, iclass 30, count 0 2006.229.17:17:53.25#ibcon#about to write, iclass 30, count 0 2006.229.17:17:53.25#ibcon#wrote, iclass 30, count 0 2006.229.17:17:53.25#ibcon#about to read 3, iclass 30, count 0 2006.229.17:17:53.26#ibcon#read 3, iclass 30, count 0 2006.229.17:17:53.26#ibcon#about to read 4, iclass 30, count 0 2006.229.17:17:53.26#ibcon#read 4, iclass 30, count 0 2006.229.17:17:53.26#ibcon#about to read 5, iclass 30, count 0 2006.229.17:17:53.26#ibcon#read 5, iclass 30, count 0 2006.229.17:17:53.26#ibcon#about to read 6, iclass 30, count 0 2006.229.17:17:53.26#ibcon#read 6, iclass 30, count 0 2006.229.17:17:53.26#ibcon#end of sib2, iclass 30, count 0 2006.229.17:17:53.26#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:17:53.26#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:17:53.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:17:53.26#ibcon#*before write, iclass 30, count 0 2006.229.17:17:53.26#ibcon#enter sib2, iclass 30, count 0 2006.229.17:17:53.26#ibcon#flushed, iclass 30, count 0 2006.229.17:17:53.26#ibcon#about to write, iclass 30, count 0 2006.229.17:17:53.26#ibcon#wrote, iclass 30, count 0 2006.229.17:17:53.26#ibcon#about to read 3, iclass 30, count 0 2006.229.17:17:53.31#ibcon#read 3, iclass 30, count 0 2006.229.17:17:53.31#ibcon#about to read 4, iclass 30, count 0 2006.229.17:17:53.31#ibcon#read 4, iclass 30, count 0 2006.229.17:17:53.31#ibcon#about to read 5, iclass 30, count 0 2006.229.17:17:53.31#ibcon#read 5, iclass 30, count 0 2006.229.17:17:53.31#ibcon#about to read 6, iclass 30, count 0 2006.229.17:17:53.31#ibcon#read 6, iclass 30, count 0 2006.229.17:17:53.31#ibcon#end of sib2, iclass 30, count 0 2006.229.17:17:53.31#ibcon#*after write, iclass 30, count 0 2006.229.17:17:53.31#ibcon#*before return 0, iclass 30, count 0 2006.229.17:17:53.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:53.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:53.31#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:17:53.31#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:17:53.31$vck44/va=1,8 2006.229.17:17:53.31#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.17:17:53.31#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.17:17:53.31#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:53.31#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:53.31#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:53.31#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:53.31#ibcon#enter wrdev, iclass 32, count 2 2006.229.17:17:53.31#ibcon#first serial, iclass 32, count 2 2006.229.17:17:53.31#ibcon#enter sib2, iclass 32, count 2 2006.229.17:17:53.31#ibcon#flushed, iclass 32, count 2 2006.229.17:17:53.31#ibcon#about to write, iclass 32, count 2 2006.229.17:17:53.31#ibcon#wrote, iclass 32, count 2 2006.229.17:17:53.31#ibcon#about to read 3, iclass 32, count 2 2006.229.17:17:53.33#ibcon#read 3, iclass 32, count 2 2006.229.17:17:53.33#ibcon#about to read 4, iclass 32, count 2 2006.229.17:17:53.33#ibcon#read 4, iclass 32, count 2 2006.229.17:17:53.33#ibcon#about to read 5, iclass 32, count 2 2006.229.17:17:53.33#ibcon#read 5, iclass 32, count 2 2006.229.17:17:53.33#ibcon#about to read 6, iclass 32, count 2 2006.229.17:17:53.33#ibcon#read 6, iclass 32, count 2 2006.229.17:17:53.33#ibcon#end of sib2, iclass 32, count 2 2006.229.17:17:53.33#ibcon#*mode == 0, iclass 32, count 2 2006.229.17:17:53.33#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.17:17:53.33#ibcon#[25=AT01-08\r\n] 2006.229.17:17:53.33#ibcon#*before write, iclass 32, count 2 2006.229.17:17:53.33#ibcon#enter sib2, iclass 32, count 2 2006.229.17:17:53.33#ibcon#flushed, iclass 32, count 2 2006.229.17:17:53.33#ibcon#about to write, iclass 32, count 2 2006.229.17:17:53.33#ibcon#wrote, iclass 32, count 2 2006.229.17:17:53.33#ibcon#about to read 3, iclass 32, count 2 2006.229.17:17:53.36#ibcon#read 3, iclass 32, count 2 2006.229.17:17:53.36#ibcon#about to read 4, iclass 32, count 2 2006.229.17:17:53.36#ibcon#read 4, iclass 32, count 2 2006.229.17:17:53.36#ibcon#about to read 5, iclass 32, count 2 2006.229.17:17:53.36#ibcon#read 5, iclass 32, count 2 2006.229.17:17:53.36#ibcon#about to read 6, iclass 32, count 2 2006.229.17:17:53.36#ibcon#read 6, iclass 32, count 2 2006.229.17:17:53.36#ibcon#end of sib2, iclass 32, count 2 2006.229.17:17:53.36#ibcon#*after write, iclass 32, count 2 2006.229.17:17:53.36#ibcon#*before return 0, iclass 32, count 2 2006.229.17:17:53.36#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:53.36#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:53.36#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.17:17:53.36#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:53.36#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:53.48#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:53.48#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:53.48#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:17:53.48#ibcon#first serial, iclass 32, count 0 2006.229.17:17:53.48#ibcon#enter sib2, iclass 32, count 0 2006.229.17:17:53.48#ibcon#flushed, iclass 32, count 0 2006.229.17:17:53.48#ibcon#about to write, iclass 32, count 0 2006.229.17:17:53.48#ibcon#wrote, iclass 32, count 0 2006.229.17:17:53.48#ibcon#about to read 3, iclass 32, count 0 2006.229.17:17:53.50#ibcon#read 3, iclass 32, count 0 2006.229.17:17:53.50#ibcon#about to read 4, iclass 32, count 0 2006.229.17:17:53.50#ibcon#read 4, iclass 32, count 0 2006.229.17:17:53.50#ibcon#about to read 5, iclass 32, count 0 2006.229.17:17:53.50#ibcon#read 5, iclass 32, count 0 2006.229.17:17:53.50#ibcon#about to read 6, iclass 32, count 0 2006.229.17:17:53.50#ibcon#read 6, iclass 32, count 0 2006.229.17:17:53.50#ibcon#end of sib2, iclass 32, count 0 2006.229.17:17:53.50#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:17:53.50#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:17:53.50#ibcon#[25=USB\r\n] 2006.229.17:17:53.50#ibcon#*before write, iclass 32, count 0 2006.229.17:17:53.50#ibcon#enter sib2, iclass 32, count 0 2006.229.17:17:53.50#ibcon#flushed, iclass 32, count 0 2006.229.17:17:53.50#ibcon#about to write, iclass 32, count 0 2006.229.17:17:53.50#ibcon#wrote, iclass 32, count 0 2006.229.17:17:53.50#ibcon#about to read 3, iclass 32, count 0 2006.229.17:17:53.53#ibcon#read 3, iclass 32, count 0 2006.229.17:17:53.53#ibcon#about to read 4, iclass 32, count 0 2006.229.17:17:53.53#ibcon#read 4, iclass 32, count 0 2006.229.17:17:53.53#ibcon#about to read 5, iclass 32, count 0 2006.229.17:17:53.53#ibcon#read 5, iclass 32, count 0 2006.229.17:17:53.53#ibcon#about to read 6, iclass 32, count 0 2006.229.17:17:53.53#ibcon#read 6, iclass 32, count 0 2006.229.17:17:53.53#ibcon#end of sib2, iclass 32, count 0 2006.229.17:17:53.53#ibcon#*after write, iclass 32, count 0 2006.229.17:17:53.53#ibcon#*before return 0, iclass 32, count 0 2006.229.17:17:53.53#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:53.53#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:53.53#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:17:53.53#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:17:53.53$vck44/valo=2,534.99 2006.229.17:17:53.53#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.17:17:53.53#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.17:17:53.53#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:53.53#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:53.53#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:53.53#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:53.53#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:17:53.53#ibcon#first serial, iclass 34, count 0 2006.229.17:17:53.53#ibcon#enter sib2, iclass 34, count 0 2006.229.17:17:53.53#ibcon#flushed, iclass 34, count 0 2006.229.17:17:53.53#ibcon#about to write, iclass 34, count 0 2006.229.17:17:53.53#ibcon#wrote, iclass 34, count 0 2006.229.17:17:53.53#ibcon#about to read 3, iclass 34, count 0 2006.229.17:17:53.55#ibcon#read 3, iclass 34, count 0 2006.229.17:17:53.55#ibcon#about to read 4, iclass 34, count 0 2006.229.17:17:53.55#ibcon#read 4, iclass 34, count 0 2006.229.17:17:53.55#ibcon#about to read 5, iclass 34, count 0 2006.229.17:17:53.55#ibcon#read 5, iclass 34, count 0 2006.229.17:17:53.55#ibcon#about to read 6, iclass 34, count 0 2006.229.17:17:53.55#ibcon#read 6, iclass 34, count 0 2006.229.17:17:53.55#ibcon#end of sib2, iclass 34, count 0 2006.229.17:17:53.55#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:17:53.55#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:17:53.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:17:53.55#ibcon#*before write, iclass 34, count 0 2006.229.17:17:53.55#ibcon#enter sib2, iclass 34, count 0 2006.229.17:17:53.55#ibcon#flushed, iclass 34, count 0 2006.229.17:17:53.55#ibcon#about to write, iclass 34, count 0 2006.229.17:17:53.55#ibcon#wrote, iclass 34, count 0 2006.229.17:17:53.55#ibcon#about to read 3, iclass 34, count 0 2006.229.17:17:53.59#ibcon#read 3, iclass 34, count 0 2006.229.17:17:53.59#ibcon#about to read 4, iclass 34, count 0 2006.229.17:17:53.59#ibcon#read 4, iclass 34, count 0 2006.229.17:17:53.59#ibcon#about to read 5, iclass 34, count 0 2006.229.17:17:53.59#ibcon#read 5, iclass 34, count 0 2006.229.17:17:53.59#ibcon#about to read 6, iclass 34, count 0 2006.229.17:17:53.59#ibcon#read 6, iclass 34, count 0 2006.229.17:17:53.59#ibcon#end of sib2, iclass 34, count 0 2006.229.17:17:53.59#ibcon#*after write, iclass 34, count 0 2006.229.17:17:53.59#ibcon#*before return 0, iclass 34, count 0 2006.229.17:17:53.59#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:53.59#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:53.59#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:17:53.59#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:17:53.59$vck44/va=2,7 2006.229.17:17:53.59#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.17:17:53.59#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.17:17:53.59#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:53.59#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:53.65#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:53.65#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:53.65#ibcon#enter wrdev, iclass 36, count 2 2006.229.17:17:53.65#ibcon#first serial, iclass 36, count 2 2006.229.17:17:53.65#ibcon#enter sib2, iclass 36, count 2 2006.229.17:17:53.65#ibcon#flushed, iclass 36, count 2 2006.229.17:17:53.65#ibcon#about to write, iclass 36, count 2 2006.229.17:17:53.65#ibcon#wrote, iclass 36, count 2 2006.229.17:17:53.65#ibcon#about to read 3, iclass 36, count 2 2006.229.17:17:53.67#ibcon#read 3, iclass 36, count 2 2006.229.17:17:53.67#ibcon#about to read 4, iclass 36, count 2 2006.229.17:17:53.67#ibcon#read 4, iclass 36, count 2 2006.229.17:17:53.67#ibcon#about to read 5, iclass 36, count 2 2006.229.17:17:53.67#ibcon#read 5, iclass 36, count 2 2006.229.17:17:53.67#ibcon#about to read 6, iclass 36, count 2 2006.229.17:17:53.67#ibcon#read 6, iclass 36, count 2 2006.229.17:17:53.67#ibcon#end of sib2, iclass 36, count 2 2006.229.17:17:53.67#ibcon#*mode == 0, iclass 36, count 2 2006.229.17:17:53.67#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.17:17:53.67#ibcon#[25=AT02-07\r\n] 2006.229.17:17:53.67#ibcon#*before write, iclass 36, count 2 2006.229.17:17:53.67#ibcon#enter sib2, iclass 36, count 2 2006.229.17:17:53.67#ibcon#flushed, iclass 36, count 2 2006.229.17:17:53.67#ibcon#about to write, iclass 36, count 2 2006.229.17:17:53.67#ibcon#wrote, iclass 36, count 2 2006.229.17:17:53.67#ibcon#about to read 3, iclass 36, count 2 2006.229.17:17:53.70#ibcon#read 3, iclass 36, count 2 2006.229.17:17:53.70#ibcon#about to read 4, iclass 36, count 2 2006.229.17:17:53.70#ibcon#read 4, iclass 36, count 2 2006.229.17:17:53.70#ibcon#about to read 5, iclass 36, count 2 2006.229.17:17:53.70#ibcon#read 5, iclass 36, count 2 2006.229.17:17:53.70#ibcon#about to read 6, iclass 36, count 2 2006.229.17:17:53.70#ibcon#read 6, iclass 36, count 2 2006.229.17:17:53.70#ibcon#end of sib2, iclass 36, count 2 2006.229.17:17:53.70#ibcon#*after write, iclass 36, count 2 2006.229.17:17:53.70#ibcon#*before return 0, iclass 36, count 2 2006.229.17:17:53.70#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:53.70#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:53.70#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.17:17:53.70#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:53.70#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:53.82#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:53.82#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:53.82#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:17:53.82#ibcon#first serial, iclass 36, count 0 2006.229.17:17:53.82#ibcon#enter sib2, iclass 36, count 0 2006.229.17:17:53.82#ibcon#flushed, iclass 36, count 0 2006.229.17:17:53.82#ibcon#about to write, iclass 36, count 0 2006.229.17:17:53.82#ibcon#wrote, iclass 36, count 0 2006.229.17:17:53.82#ibcon#about to read 3, iclass 36, count 0 2006.229.17:17:53.84#ibcon#read 3, iclass 36, count 0 2006.229.17:17:53.84#ibcon#about to read 4, iclass 36, count 0 2006.229.17:17:53.84#ibcon#read 4, iclass 36, count 0 2006.229.17:17:53.84#ibcon#about to read 5, iclass 36, count 0 2006.229.17:17:53.84#ibcon#read 5, iclass 36, count 0 2006.229.17:17:53.84#ibcon#about to read 6, iclass 36, count 0 2006.229.17:17:53.84#ibcon#read 6, iclass 36, count 0 2006.229.17:17:53.84#ibcon#end of sib2, iclass 36, count 0 2006.229.17:17:53.84#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:17:53.84#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:17:53.84#ibcon#[25=USB\r\n] 2006.229.17:17:53.84#ibcon#*before write, iclass 36, count 0 2006.229.17:17:53.84#ibcon#enter sib2, iclass 36, count 0 2006.229.17:17:53.84#ibcon#flushed, iclass 36, count 0 2006.229.17:17:53.84#ibcon#about to write, iclass 36, count 0 2006.229.17:17:53.84#ibcon#wrote, iclass 36, count 0 2006.229.17:17:53.84#ibcon#about to read 3, iclass 36, count 0 2006.229.17:17:53.87#ibcon#read 3, iclass 36, count 0 2006.229.17:17:53.87#ibcon#about to read 4, iclass 36, count 0 2006.229.17:17:53.87#ibcon#read 4, iclass 36, count 0 2006.229.17:17:53.87#ibcon#about to read 5, iclass 36, count 0 2006.229.17:17:53.87#ibcon#read 5, iclass 36, count 0 2006.229.17:17:53.87#ibcon#about to read 6, iclass 36, count 0 2006.229.17:17:53.87#ibcon#read 6, iclass 36, count 0 2006.229.17:17:53.87#ibcon#end of sib2, iclass 36, count 0 2006.229.17:17:53.87#ibcon#*after write, iclass 36, count 0 2006.229.17:17:53.87#ibcon#*before return 0, iclass 36, count 0 2006.229.17:17:53.87#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:53.87#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:53.87#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:17:53.87#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:17:53.87$vck44/valo=3,564.99 2006.229.17:17:53.87#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.17:17:53.87#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.17:17:53.87#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:53.87#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:53.87#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:53.87#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:53.87#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:17:53.87#ibcon#first serial, iclass 38, count 0 2006.229.17:17:53.87#ibcon#enter sib2, iclass 38, count 0 2006.229.17:17:53.87#ibcon#flushed, iclass 38, count 0 2006.229.17:17:53.87#ibcon#about to write, iclass 38, count 0 2006.229.17:17:53.87#ibcon#wrote, iclass 38, count 0 2006.229.17:17:53.87#ibcon#about to read 3, iclass 38, count 0 2006.229.17:17:53.89#ibcon#read 3, iclass 38, count 0 2006.229.17:17:53.89#ibcon#about to read 4, iclass 38, count 0 2006.229.17:17:53.89#ibcon#read 4, iclass 38, count 0 2006.229.17:17:53.89#ibcon#about to read 5, iclass 38, count 0 2006.229.17:17:53.89#ibcon#read 5, iclass 38, count 0 2006.229.17:17:53.89#ibcon#about to read 6, iclass 38, count 0 2006.229.17:17:53.89#ibcon#read 6, iclass 38, count 0 2006.229.17:17:53.89#ibcon#end of sib2, iclass 38, count 0 2006.229.17:17:53.89#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:17:53.89#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:17:53.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:17:53.89#ibcon#*before write, iclass 38, count 0 2006.229.17:17:53.89#ibcon#enter sib2, iclass 38, count 0 2006.229.17:17:53.89#ibcon#flushed, iclass 38, count 0 2006.229.17:17:53.89#ibcon#about to write, iclass 38, count 0 2006.229.17:17:53.89#ibcon#wrote, iclass 38, count 0 2006.229.17:17:53.89#ibcon#about to read 3, iclass 38, count 0 2006.229.17:17:53.93#ibcon#read 3, iclass 38, count 0 2006.229.17:17:53.93#ibcon#about to read 4, iclass 38, count 0 2006.229.17:17:53.93#ibcon#read 4, iclass 38, count 0 2006.229.17:17:53.93#ibcon#about to read 5, iclass 38, count 0 2006.229.17:17:53.93#ibcon#read 5, iclass 38, count 0 2006.229.17:17:53.93#ibcon#about to read 6, iclass 38, count 0 2006.229.17:17:53.93#ibcon#read 6, iclass 38, count 0 2006.229.17:17:53.93#ibcon#end of sib2, iclass 38, count 0 2006.229.17:17:53.93#ibcon#*after write, iclass 38, count 0 2006.229.17:17:53.93#ibcon#*before return 0, iclass 38, count 0 2006.229.17:17:53.93#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:53.93#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:53.93#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:17:53.93#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:17:53.93$vck44/va=3,6 2006.229.17:17:53.93#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.17:17:53.93#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.17:17:53.93#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:53.93#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:53.99#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:53.99#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:53.99#ibcon#enter wrdev, iclass 40, count 2 2006.229.17:17:53.99#ibcon#first serial, iclass 40, count 2 2006.229.17:17:53.99#ibcon#enter sib2, iclass 40, count 2 2006.229.17:17:53.99#ibcon#flushed, iclass 40, count 2 2006.229.17:17:53.99#ibcon#about to write, iclass 40, count 2 2006.229.17:17:53.99#ibcon#wrote, iclass 40, count 2 2006.229.17:17:53.99#ibcon#about to read 3, iclass 40, count 2 2006.229.17:17:54.01#ibcon#read 3, iclass 40, count 2 2006.229.17:17:54.01#ibcon#about to read 4, iclass 40, count 2 2006.229.17:17:54.01#ibcon#read 4, iclass 40, count 2 2006.229.17:17:54.01#ibcon#about to read 5, iclass 40, count 2 2006.229.17:17:54.01#ibcon#read 5, iclass 40, count 2 2006.229.17:17:54.01#ibcon#about to read 6, iclass 40, count 2 2006.229.17:17:54.01#ibcon#read 6, iclass 40, count 2 2006.229.17:17:54.01#ibcon#end of sib2, iclass 40, count 2 2006.229.17:17:54.01#ibcon#*mode == 0, iclass 40, count 2 2006.229.17:17:54.01#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.17:17:54.01#ibcon#[25=AT03-06\r\n] 2006.229.17:17:54.01#ibcon#*before write, iclass 40, count 2 2006.229.17:17:54.01#ibcon#enter sib2, iclass 40, count 2 2006.229.17:17:54.01#ibcon#flushed, iclass 40, count 2 2006.229.17:17:54.01#ibcon#about to write, iclass 40, count 2 2006.229.17:17:54.01#ibcon#wrote, iclass 40, count 2 2006.229.17:17:54.01#ibcon#about to read 3, iclass 40, count 2 2006.229.17:17:54.04#ibcon#read 3, iclass 40, count 2 2006.229.17:17:54.04#ibcon#about to read 4, iclass 40, count 2 2006.229.17:17:54.04#ibcon#read 4, iclass 40, count 2 2006.229.17:17:54.04#ibcon#about to read 5, iclass 40, count 2 2006.229.17:17:54.04#ibcon#read 5, iclass 40, count 2 2006.229.17:17:54.04#ibcon#about to read 6, iclass 40, count 2 2006.229.17:17:54.04#ibcon#read 6, iclass 40, count 2 2006.229.17:17:54.04#ibcon#end of sib2, iclass 40, count 2 2006.229.17:17:54.04#ibcon#*after write, iclass 40, count 2 2006.229.17:17:54.04#ibcon#*before return 0, iclass 40, count 2 2006.229.17:17:54.04#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:54.04#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:54.04#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.17:17:54.04#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:54.04#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:54.16#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:54.16#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:54.16#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:17:54.16#ibcon#first serial, iclass 40, count 0 2006.229.17:17:54.16#ibcon#enter sib2, iclass 40, count 0 2006.229.17:17:54.16#ibcon#flushed, iclass 40, count 0 2006.229.17:17:54.16#ibcon#about to write, iclass 40, count 0 2006.229.17:17:54.16#ibcon#wrote, iclass 40, count 0 2006.229.17:17:54.16#ibcon#about to read 3, iclass 40, count 0 2006.229.17:17:54.18#ibcon#read 3, iclass 40, count 0 2006.229.17:17:54.18#ibcon#about to read 4, iclass 40, count 0 2006.229.17:17:54.18#ibcon#read 4, iclass 40, count 0 2006.229.17:17:54.18#ibcon#about to read 5, iclass 40, count 0 2006.229.17:17:54.18#ibcon#read 5, iclass 40, count 0 2006.229.17:17:54.18#ibcon#about to read 6, iclass 40, count 0 2006.229.17:17:54.18#ibcon#read 6, iclass 40, count 0 2006.229.17:17:54.18#ibcon#end of sib2, iclass 40, count 0 2006.229.17:17:54.18#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:17:54.18#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:17:54.18#ibcon#[25=USB\r\n] 2006.229.17:17:54.18#ibcon#*before write, iclass 40, count 0 2006.229.17:17:54.18#ibcon#enter sib2, iclass 40, count 0 2006.229.17:17:54.18#ibcon#flushed, iclass 40, count 0 2006.229.17:17:54.18#ibcon#about to write, iclass 40, count 0 2006.229.17:17:54.18#ibcon#wrote, iclass 40, count 0 2006.229.17:17:54.18#ibcon#about to read 3, iclass 40, count 0 2006.229.17:17:54.21#ibcon#read 3, iclass 40, count 0 2006.229.17:17:54.21#ibcon#about to read 4, iclass 40, count 0 2006.229.17:17:54.21#ibcon#read 4, iclass 40, count 0 2006.229.17:17:54.21#ibcon#about to read 5, iclass 40, count 0 2006.229.17:17:54.21#ibcon#read 5, iclass 40, count 0 2006.229.17:17:54.21#ibcon#about to read 6, iclass 40, count 0 2006.229.17:17:54.21#ibcon#read 6, iclass 40, count 0 2006.229.17:17:54.21#ibcon#end of sib2, iclass 40, count 0 2006.229.17:17:54.21#ibcon#*after write, iclass 40, count 0 2006.229.17:17:54.21#ibcon#*before return 0, iclass 40, count 0 2006.229.17:17:54.21#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:54.21#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:54.21#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:17:54.21#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:17:54.21$vck44/valo=4,624.99 2006.229.17:17:54.21#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.17:17:54.21#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.17:17:54.21#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:54.21#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:54.21#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:54.21#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:54.21#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:17:54.21#ibcon#first serial, iclass 4, count 0 2006.229.17:17:54.21#ibcon#enter sib2, iclass 4, count 0 2006.229.17:17:54.21#ibcon#flushed, iclass 4, count 0 2006.229.17:17:54.21#ibcon#about to write, iclass 4, count 0 2006.229.17:17:54.21#ibcon#wrote, iclass 4, count 0 2006.229.17:17:54.21#ibcon#about to read 3, iclass 4, count 0 2006.229.17:17:54.23#ibcon#read 3, iclass 4, count 0 2006.229.17:17:54.23#ibcon#about to read 4, iclass 4, count 0 2006.229.17:17:54.23#ibcon#read 4, iclass 4, count 0 2006.229.17:17:54.23#ibcon#about to read 5, iclass 4, count 0 2006.229.17:17:54.23#ibcon#read 5, iclass 4, count 0 2006.229.17:17:54.23#ibcon#about to read 6, iclass 4, count 0 2006.229.17:17:54.23#ibcon#read 6, iclass 4, count 0 2006.229.17:17:54.23#ibcon#end of sib2, iclass 4, count 0 2006.229.17:17:54.23#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:17:54.23#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:17:54.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:17:54.23#ibcon#*before write, iclass 4, count 0 2006.229.17:17:54.23#ibcon#enter sib2, iclass 4, count 0 2006.229.17:17:54.23#ibcon#flushed, iclass 4, count 0 2006.229.17:17:54.23#ibcon#about to write, iclass 4, count 0 2006.229.17:17:54.23#ibcon#wrote, iclass 4, count 0 2006.229.17:17:54.23#ibcon#about to read 3, iclass 4, count 0 2006.229.17:17:54.27#ibcon#read 3, iclass 4, count 0 2006.229.17:17:54.27#ibcon#about to read 4, iclass 4, count 0 2006.229.17:17:54.27#ibcon#read 4, iclass 4, count 0 2006.229.17:17:54.27#ibcon#about to read 5, iclass 4, count 0 2006.229.17:17:54.27#ibcon#read 5, iclass 4, count 0 2006.229.17:17:54.27#ibcon#about to read 6, iclass 4, count 0 2006.229.17:17:54.27#ibcon#read 6, iclass 4, count 0 2006.229.17:17:54.27#ibcon#end of sib2, iclass 4, count 0 2006.229.17:17:54.27#ibcon#*after write, iclass 4, count 0 2006.229.17:17:54.27#ibcon#*before return 0, iclass 4, count 0 2006.229.17:17:54.27#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:54.27#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:54.27#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:17:54.27#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:17:54.27$vck44/va=4,7 2006.229.17:17:54.27#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.17:17:54.27#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.17:17:54.27#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:54.27#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:54.33#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:54.33#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:54.33#ibcon#enter wrdev, iclass 6, count 2 2006.229.17:17:54.33#ibcon#first serial, iclass 6, count 2 2006.229.17:17:54.33#ibcon#enter sib2, iclass 6, count 2 2006.229.17:17:54.33#ibcon#flushed, iclass 6, count 2 2006.229.17:17:54.33#ibcon#about to write, iclass 6, count 2 2006.229.17:17:54.33#ibcon#wrote, iclass 6, count 2 2006.229.17:17:54.33#ibcon#about to read 3, iclass 6, count 2 2006.229.17:17:54.35#ibcon#read 3, iclass 6, count 2 2006.229.17:17:54.35#ibcon#about to read 4, iclass 6, count 2 2006.229.17:17:54.35#ibcon#read 4, iclass 6, count 2 2006.229.17:17:54.35#ibcon#about to read 5, iclass 6, count 2 2006.229.17:17:54.35#ibcon#read 5, iclass 6, count 2 2006.229.17:17:54.35#ibcon#about to read 6, iclass 6, count 2 2006.229.17:17:54.35#ibcon#read 6, iclass 6, count 2 2006.229.17:17:54.35#ibcon#end of sib2, iclass 6, count 2 2006.229.17:17:54.35#ibcon#*mode == 0, iclass 6, count 2 2006.229.17:17:54.35#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.17:17:54.35#ibcon#[25=AT04-07\r\n] 2006.229.17:17:54.35#ibcon#*before write, iclass 6, count 2 2006.229.17:17:54.35#ibcon#enter sib2, iclass 6, count 2 2006.229.17:17:54.35#ibcon#flushed, iclass 6, count 2 2006.229.17:17:54.35#ibcon#about to write, iclass 6, count 2 2006.229.17:17:54.35#ibcon#wrote, iclass 6, count 2 2006.229.17:17:54.35#ibcon#about to read 3, iclass 6, count 2 2006.229.17:17:54.38#ibcon#read 3, iclass 6, count 2 2006.229.17:17:54.38#ibcon#about to read 4, iclass 6, count 2 2006.229.17:17:54.38#ibcon#read 4, iclass 6, count 2 2006.229.17:17:54.38#ibcon#about to read 5, iclass 6, count 2 2006.229.17:17:54.38#ibcon#read 5, iclass 6, count 2 2006.229.17:17:54.38#ibcon#about to read 6, iclass 6, count 2 2006.229.17:17:54.38#ibcon#read 6, iclass 6, count 2 2006.229.17:17:54.38#ibcon#end of sib2, iclass 6, count 2 2006.229.17:17:54.38#ibcon#*after write, iclass 6, count 2 2006.229.17:17:54.38#ibcon#*before return 0, iclass 6, count 2 2006.229.17:17:54.44#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:54.44#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:54.44#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.17:17:54.44#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:54.44#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:54.56#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:54.56#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:54.56#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:17:54.56#ibcon#first serial, iclass 6, count 0 2006.229.17:17:54.56#ibcon#enter sib2, iclass 6, count 0 2006.229.17:17:54.56#ibcon#flushed, iclass 6, count 0 2006.229.17:17:54.56#ibcon#about to write, iclass 6, count 0 2006.229.17:17:54.56#ibcon#wrote, iclass 6, count 0 2006.229.17:17:54.56#ibcon#about to read 3, iclass 6, count 0 2006.229.17:17:54.58#ibcon#read 3, iclass 6, count 0 2006.229.17:17:54.58#ibcon#about to read 4, iclass 6, count 0 2006.229.17:17:54.58#ibcon#read 4, iclass 6, count 0 2006.229.17:17:54.58#ibcon#about to read 5, iclass 6, count 0 2006.229.17:17:54.58#ibcon#read 5, iclass 6, count 0 2006.229.17:17:54.58#ibcon#about to read 6, iclass 6, count 0 2006.229.17:17:54.58#ibcon#read 6, iclass 6, count 0 2006.229.17:17:54.58#ibcon#end of sib2, iclass 6, count 0 2006.229.17:17:54.58#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:17:54.58#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:17:54.58#ibcon#[25=USB\r\n] 2006.229.17:17:54.58#ibcon#*before write, iclass 6, count 0 2006.229.17:17:54.58#ibcon#enter sib2, iclass 6, count 0 2006.229.17:17:54.58#ibcon#flushed, iclass 6, count 0 2006.229.17:17:54.58#ibcon#about to write, iclass 6, count 0 2006.229.17:17:54.58#ibcon#wrote, iclass 6, count 0 2006.229.17:17:54.58#ibcon#about to read 3, iclass 6, count 0 2006.229.17:17:54.61#ibcon#read 3, iclass 6, count 0 2006.229.17:17:54.61#ibcon#about to read 4, iclass 6, count 0 2006.229.17:17:54.61#ibcon#read 4, iclass 6, count 0 2006.229.17:17:54.61#ibcon#about to read 5, iclass 6, count 0 2006.229.17:17:54.61#ibcon#read 5, iclass 6, count 0 2006.229.17:17:54.61#ibcon#about to read 6, iclass 6, count 0 2006.229.17:17:54.61#ibcon#read 6, iclass 6, count 0 2006.229.17:17:54.61#ibcon#end of sib2, iclass 6, count 0 2006.229.17:17:54.61#ibcon#*after write, iclass 6, count 0 2006.229.17:17:54.61#ibcon#*before return 0, iclass 6, count 0 2006.229.17:17:54.61#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:54.61#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:54.61#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:17:54.61#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:17:54.61$vck44/valo=5,734.99 2006.229.17:17:54.61#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.17:17:54.61#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.17:17:54.61#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:54.61#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:54.61#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:54.61#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:54.61#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:17:54.61#ibcon#first serial, iclass 10, count 0 2006.229.17:17:54.61#ibcon#enter sib2, iclass 10, count 0 2006.229.17:17:54.61#ibcon#flushed, iclass 10, count 0 2006.229.17:17:54.61#ibcon#about to write, iclass 10, count 0 2006.229.17:17:54.61#ibcon#wrote, iclass 10, count 0 2006.229.17:17:54.61#ibcon#about to read 3, iclass 10, count 0 2006.229.17:17:54.63#ibcon#read 3, iclass 10, count 0 2006.229.17:17:54.63#ibcon#about to read 4, iclass 10, count 0 2006.229.17:17:54.63#ibcon#read 4, iclass 10, count 0 2006.229.17:17:54.63#ibcon#about to read 5, iclass 10, count 0 2006.229.17:17:54.63#ibcon#read 5, iclass 10, count 0 2006.229.17:17:54.63#ibcon#about to read 6, iclass 10, count 0 2006.229.17:17:54.63#ibcon#read 6, iclass 10, count 0 2006.229.17:17:54.63#ibcon#end of sib2, iclass 10, count 0 2006.229.17:17:54.63#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:17:54.63#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:17:54.63#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:17:54.63#ibcon#*before write, iclass 10, count 0 2006.229.17:17:54.63#ibcon#enter sib2, iclass 10, count 0 2006.229.17:17:54.63#ibcon#flushed, iclass 10, count 0 2006.229.17:17:54.63#ibcon#about to write, iclass 10, count 0 2006.229.17:17:54.63#ibcon#wrote, iclass 10, count 0 2006.229.17:17:54.63#ibcon#about to read 3, iclass 10, count 0 2006.229.17:17:54.67#ibcon#read 3, iclass 10, count 0 2006.229.17:17:54.67#ibcon#about to read 4, iclass 10, count 0 2006.229.17:17:54.67#ibcon#read 4, iclass 10, count 0 2006.229.17:17:54.67#ibcon#about to read 5, iclass 10, count 0 2006.229.17:17:54.67#ibcon#read 5, iclass 10, count 0 2006.229.17:17:54.67#ibcon#about to read 6, iclass 10, count 0 2006.229.17:17:54.67#ibcon#read 6, iclass 10, count 0 2006.229.17:17:54.67#ibcon#end of sib2, iclass 10, count 0 2006.229.17:17:54.67#ibcon#*after write, iclass 10, count 0 2006.229.17:17:54.67#ibcon#*before return 0, iclass 10, count 0 2006.229.17:17:54.67#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:54.67#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:54.67#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:17:54.67#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:17:54.67$vck44/va=5,4 2006.229.17:17:54.67#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.17:17:54.67#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.17:17:54.67#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:54.67#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:54.73#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:54.73#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:54.73#ibcon#enter wrdev, iclass 12, count 2 2006.229.17:17:54.73#ibcon#first serial, iclass 12, count 2 2006.229.17:17:54.73#ibcon#enter sib2, iclass 12, count 2 2006.229.17:17:54.73#ibcon#flushed, iclass 12, count 2 2006.229.17:17:54.73#ibcon#about to write, iclass 12, count 2 2006.229.17:17:54.73#ibcon#wrote, iclass 12, count 2 2006.229.17:17:54.73#ibcon#about to read 3, iclass 12, count 2 2006.229.17:17:54.75#ibcon#read 3, iclass 12, count 2 2006.229.17:17:54.75#ibcon#about to read 4, iclass 12, count 2 2006.229.17:17:54.75#ibcon#read 4, iclass 12, count 2 2006.229.17:17:54.75#ibcon#about to read 5, iclass 12, count 2 2006.229.17:17:54.75#ibcon#read 5, iclass 12, count 2 2006.229.17:17:54.75#ibcon#about to read 6, iclass 12, count 2 2006.229.17:17:54.75#ibcon#read 6, iclass 12, count 2 2006.229.17:17:54.75#ibcon#end of sib2, iclass 12, count 2 2006.229.17:17:54.75#ibcon#*mode == 0, iclass 12, count 2 2006.229.17:17:54.75#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.17:17:54.75#ibcon#[25=AT05-04\r\n] 2006.229.17:17:54.75#ibcon#*before write, iclass 12, count 2 2006.229.17:17:54.75#ibcon#enter sib2, iclass 12, count 2 2006.229.17:17:54.75#ibcon#flushed, iclass 12, count 2 2006.229.17:17:54.75#ibcon#about to write, iclass 12, count 2 2006.229.17:17:54.75#ibcon#wrote, iclass 12, count 2 2006.229.17:17:54.75#ibcon#about to read 3, iclass 12, count 2 2006.229.17:17:54.78#ibcon#read 3, iclass 12, count 2 2006.229.17:17:54.78#ibcon#about to read 4, iclass 12, count 2 2006.229.17:17:54.78#ibcon#read 4, iclass 12, count 2 2006.229.17:17:54.78#ibcon#about to read 5, iclass 12, count 2 2006.229.17:17:54.78#ibcon#read 5, iclass 12, count 2 2006.229.17:17:54.78#ibcon#about to read 6, iclass 12, count 2 2006.229.17:17:54.78#ibcon#read 6, iclass 12, count 2 2006.229.17:17:54.78#ibcon#end of sib2, iclass 12, count 2 2006.229.17:17:54.78#ibcon#*after write, iclass 12, count 2 2006.229.17:17:54.78#ibcon#*before return 0, iclass 12, count 2 2006.229.17:17:54.78#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:54.78#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:54.78#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.17:17:54.78#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:54.78#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:54.90#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:54.90#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:54.90#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:17:54.90#ibcon#first serial, iclass 12, count 0 2006.229.17:17:54.90#ibcon#enter sib2, iclass 12, count 0 2006.229.17:17:54.90#ibcon#flushed, iclass 12, count 0 2006.229.17:17:54.90#ibcon#about to write, iclass 12, count 0 2006.229.17:17:54.90#ibcon#wrote, iclass 12, count 0 2006.229.17:17:54.90#ibcon#about to read 3, iclass 12, count 0 2006.229.17:17:54.92#ibcon#read 3, iclass 12, count 0 2006.229.17:17:54.92#ibcon#about to read 4, iclass 12, count 0 2006.229.17:17:54.92#ibcon#read 4, iclass 12, count 0 2006.229.17:17:54.92#ibcon#about to read 5, iclass 12, count 0 2006.229.17:17:54.92#ibcon#read 5, iclass 12, count 0 2006.229.17:17:54.92#ibcon#about to read 6, iclass 12, count 0 2006.229.17:17:54.92#ibcon#read 6, iclass 12, count 0 2006.229.17:17:54.92#ibcon#end of sib2, iclass 12, count 0 2006.229.17:17:54.92#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:17:54.92#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:17:54.92#ibcon#[25=USB\r\n] 2006.229.17:17:54.92#ibcon#*before write, iclass 12, count 0 2006.229.17:17:54.92#ibcon#enter sib2, iclass 12, count 0 2006.229.17:17:54.92#ibcon#flushed, iclass 12, count 0 2006.229.17:17:54.92#ibcon#about to write, iclass 12, count 0 2006.229.17:17:54.92#ibcon#wrote, iclass 12, count 0 2006.229.17:17:54.92#ibcon#about to read 3, iclass 12, count 0 2006.229.17:17:54.95#ibcon#read 3, iclass 12, count 0 2006.229.17:17:54.95#ibcon#about to read 4, iclass 12, count 0 2006.229.17:17:54.95#ibcon#read 4, iclass 12, count 0 2006.229.17:17:54.95#ibcon#about to read 5, iclass 12, count 0 2006.229.17:17:54.95#ibcon#read 5, iclass 12, count 0 2006.229.17:17:54.95#ibcon#about to read 6, iclass 12, count 0 2006.229.17:17:54.95#ibcon#read 6, iclass 12, count 0 2006.229.17:17:54.95#ibcon#end of sib2, iclass 12, count 0 2006.229.17:17:54.95#ibcon#*after write, iclass 12, count 0 2006.229.17:17:54.95#ibcon#*before return 0, iclass 12, count 0 2006.229.17:17:54.95#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:54.95#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:54.95#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:17:54.95#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:17:54.95$vck44/valo=6,814.99 2006.229.17:17:54.95#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.17:17:54.95#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.17:17:54.95#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:54.95#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:54.95#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:54.95#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:54.95#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:17:54.95#ibcon#first serial, iclass 14, count 0 2006.229.17:17:54.95#ibcon#enter sib2, iclass 14, count 0 2006.229.17:17:54.95#ibcon#flushed, iclass 14, count 0 2006.229.17:17:54.95#ibcon#about to write, iclass 14, count 0 2006.229.17:17:54.95#ibcon#wrote, iclass 14, count 0 2006.229.17:17:54.95#ibcon#about to read 3, iclass 14, count 0 2006.229.17:17:54.97#ibcon#read 3, iclass 14, count 0 2006.229.17:17:54.97#ibcon#about to read 4, iclass 14, count 0 2006.229.17:17:54.97#ibcon#read 4, iclass 14, count 0 2006.229.17:17:54.97#ibcon#about to read 5, iclass 14, count 0 2006.229.17:17:54.97#ibcon#read 5, iclass 14, count 0 2006.229.17:17:54.97#ibcon#about to read 6, iclass 14, count 0 2006.229.17:17:54.97#ibcon#read 6, iclass 14, count 0 2006.229.17:17:54.97#ibcon#end of sib2, iclass 14, count 0 2006.229.17:17:54.97#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:17:54.97#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:17:54.97#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:17:54.97#ibcon#*before write, iclass 14, count 0 2006.229.17:17:54.97#ibcon#enter sib2, iclass 14, count 0 2006.229.17:17:54.97#ibcon#flushed, iclass 14, count 0 2006.229.17:17:54.97#ibcon#about to write, iclass 14, count 0 2006.229.17:17:54.97#ibcon#wrote, iclass 14, count 0 2006.229.17:17:54.97#ibcon#about to read 3, iclass 14, count 0 2006.229.17:17:55.01#ibcon#read 3, iclass 14, count 0 2006.229.17:17:55.01#ibcon#about to read 4, iclass 14, count 0 2006.229.17:17:55.01#ibcon#read 4, iclass 14, count 0 2006.229.17:17:55.01#ibcon#about to read 5, iclass 14, count 0 2006.229.17:17:55.01#ibcon#read 5, iclass 14, count 0 2006.229.17:17:55.01#ibcon#about to read 6, iclass 14, count 0 2006.229.17:17:55.01#ibcon#read 6, iclass 14, count 0 2006.229.17:17:55.01#ibcon#end of sib2, iclass 14, count 0 2006.229.17:17:55.01#ibcon#*after write, iclass 14, count 0 2006.229.17:17:55.01#ibcon#*before return 0, iclass 14, count 0 2006.229.17:17:55.01#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:55.01#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:55.01#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:17:55.01#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:17:55.01$vck44/va=6,4 2006.229.17:17:55.01#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.17:17:55.01#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.17:17:55.01#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:55.01#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:55.07#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:55.07#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:55.07#ibcon#enter wrdev, iclass 16, count 2 2006.229.17:17:55.07#ibcon#first serial, iclass 16, count 2 2006.229.17:17:55.07#ibcon#enter sib2, iclass 16, count 2 2006.229.17:17:55.07#ibcon#flushed, iclass 16, count 2 2006.229.17:17:55.07#ibcon#about to write, iclass 16, count 2 2006.229.17:17:55.07#ibcon#wrote, iclass 16, count 2 2006.229.17:17:55.07#ibcon#about to read 3, iclass 16, count 2 2006.229.17:17:55.09#ibcon#read 3, iclass 16, count 2 2006.229.17:17:55.09#ibcon#about to read 4, iclass 16, count 2 2006.229.17:17:55.09#ibcon#read 4, iclass 16, count 2 2006.229.17:17:55.09#ibcon#about to read 5, iclass 16, count 2 2006.229.17:17:55.09#ibcon#read 5, iclass 16, count 2 2006.229.17:17:55.09#ibcon#about to read 6, iclass 16, count 2 2006.229.17:17:55.09#ibcon#read 6, iclass 16, count 2 2006.229.17:17:55.09#ibcon#end of sib2, iclass 16, count 2 2006.229.17:17:55.09#ibcon#*mode == 0, iclass 16, count 2 2006.229.17:17:55.09#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.17:17:55.09#ibcon#[25=AT06-04\r\n] 2006.229.17:17:55.09#ibcon#*before write, iclass 16, count 2 2006.229.17:17:55.09#ibcon#enter sib2, iclass 16, count 2 2006.229.17:17:55.09#ibcon#flushed, iclass 16, count 2 2006.229.17:17:55.09#ibcon#about to write, iclass 16, count 2 2006.229.17:17:55.09#ibcon#wrote, iclass 16, count 2 2006.229.17:17:55.09#ibcon#about to read 3, iclass 16, count 2 2006.229.17:17:55.12#ibcon#read 3, iclass 16, count 2 2006.229.17:17:55.12#ibcon#about to read 4, iclass 16, count 2 2006.229.17:17:55.12#ibcon#read 4, iclass 16, count 2 2006.229.17:17:55.12#ibcon#about to read 5, iclass 16, count 2 2006.229.17:17:55.12#ibcon#read 5, iclass 16, count 2 2006.229.17:17:55.12#ibcon#about to read 6, iclass 16, count 2 2006.229.17:17:55.12#ibcon#read 6, iclass 16, count 2 2006.229.17:17:55.12#ibcon#end of sib2, iclass 16, count 2 2006.229.17:17:55.12#ibcon#*after write, iclass 16, count 2 2006.229.17:17:55.12#ibcon#*before return 0, iclass 16, count 2 2006.229.17:17:55.12#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:55.12#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:55.12#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.17:17:55.12#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:55.12#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:55.24#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:55.24#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:55.24#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:17:55.24#ibcon#first serial, iclass 16, count 0 2006.229.17:17:55.24#ibcon#enter sib2, iclass 16, count 0 2006.229.17:17:55.24#ibcon#flushed, iclass 16, count 0 2006.229.17:17:55.24#ibcon#about to write, iclass 16, count 0 2006.229.17:17:55.24#ibcon#wrote, iclass 16, count 0 2006.229.17:17:55.24#ibcon#about to read 3, iclass 16, count 0 2006.229.17:17:55.26#ibcon#read 3, iclass 16, count 0 2006.229.17:17:55.26#ibcon#about to read 4, iclass 16, count 0 2006.229.17:17:55.26#ibcon#read 4, iclass 16, count 0 2006.229.17:17:55.26#ibcon#about to read 5, iclass 16, count 0 2006.229.17:17:55.26#ibcon#read 5, iclass 16, count 0 2006.229.17:17:55.26#ibcon#about to read 6, iclass 16, count 0 2006.229.17:17:55.26#ibcon#read 6, iclass 16, count 0 2006.229.17:17:55.26#ibcon#end of sib2, iclass 16, count 0 2006.229.17:17:55.26#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:17:55.26#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:17:55.26#ibcon#[25=USB\r\n] 2006.229.17:17:55.26#ibcon#*before write, iclass 16, count 0 2006.229.17:17:55.26#ibcon#enter sib2, iclass 16, count 0 2006.229.17:17:55.26#ibcon#flushed, iclass 16, count 0 2006.229.17:17:55.26#ibcon#about to write, iclass 16, count 0 2006.229.17:17:55.26#ibcon#wrote, iclass 16, count 0 2006.229.17:17:55.26#ibcon#about to read 3, iclass 16, count 0 2006.229.17:17:55.29#ibcon#read 3, iclass 16, count 0 2006.229.17:17:55.29#ibcon#about to read 4, iclass 16, count 0 2006.229.17:17:55.29#ibcon#read 4, iclass 16, count 0 2006.229.17:17:55.29#ibcon#about to read 5, iclass 16, count 0 2006.229.17:17:55.29#ibcon#read 5, iclass 16, count 0 2006.229.17:17:55.29#ibcon#about to read 6, iclass 16, count 0 2006.229.17:17:55.29#ibcon#read 6, iclass 16, count 0 2006.229.17:17:55.29#ibcon#end of sib2, iclass 16, count 0 2006.229.17:17:55.29#ibcon#*after write, iclass 16, count 0 2006.229.17:17:55.29#ibcon#*before return 0, iclass 16, count 0 2006.229.17:17:55.29#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:55.29#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:55.29#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:17:55.29#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:17:55.29$vck44/valo=7,864.99 2006.229.17:17:55.29#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.17:17:55.29#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.17:17:55.29#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:55.29#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:55.29#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:55.29#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:55.29#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:17:55.29#ibcon#first serial, iclass 18, count 0 2006.229.17:17:55.29#ibcon#enter sib2, iclass 18, count 0 2006.229.17:17:55.29#ibcon#flushed, iclass 18, count 0 2006.229.17:17:55.29#ibcon#about to write, iclass 18, count 0 2006.229.17:17:55.29#ibcon#wrote, iclass 18, count 0 2006.229.17:17:55.29#ibcon#about to read 3, iclass 18, count 0 2006.229.17:17:55.31#ibcon#read 3, iclass 18, count 0 2006.229.17:17:55.31#ibcon#about to read 4, iclass 18, count 0 2006.229.17:17:55.31#ibcon#read 4, iclass 18, count 0 2006.229.17:17:55.31#ibcon#about to read 5, iclass 18, count 0 2006.229.17:17:55.31#ibcon#read 5, iclass 18, count 0 2006.229.17:17:55.31#ibcon#about to read 6, iclass 18, count 0 2006.229.17:17:55.31#ibcon#read 6, iclass 18, count 0 2006.229.17:17:55.31#ibcon#end of sib2, iclass 18, count 0 2006.229.17:17:55.31#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:17:55.31#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:17:55.31#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:17:55.31#ibcon#*before write, iclass 18, count 0 2006.229.17:17:55.31#ibcon#enter sib2, iclass 18, count 0 2006.229.17:17:55.31#ibcon#flushed, iclass 18, count 0 2006.229.17:17:55.31#ibcon#about to write, iclass 18, count 0 2006.229.17:17:55.31#ibcon#wrote, iclass 18, count 0 2006.229.17:17:55.31#ibcon#about to read 3, iclass 18, count 0 2006.229.17:17:55.35#ibcon#read 3, iclass 18, count 0 2006.229.17:17:55.35#ibcon#about to read 4, iclass 18, count 0 2006.229.17:17:55.35#ibcon#read 4, iclass 18, count 0 2006.229.17:17:55.35#ibcon#about to read 5, iclass 18, count 0 2006.229.17:17:55.35#ibcon#read 5, iclass 18, count 0 2006.229.17:17:55.35#ibcon#about to read 6, iclass 18, count 0 2006.229.17:17:55.35#ibcon#read 6, iclass 18, count 0 2006.229.17:17:55.35#ibcon#end of sib2, iclass 18, count 0 2006.229.17:17:55.35#ibcon#*after write, iclass 18, count 0 2006.229.17:17:55.35#ibcon#*before return 0, iclass 18, count 0 2006.229.17:17:55.35#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:55.35#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:55.35#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:17:55.35#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:17:55.35$vck44/va=7,5 2006.229.17:17:55.35#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.17:17:55.35#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.17:17:55.35#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:55.35#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:55.41#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:55.41#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:55.41#ibcon#enter wrdev, iclass 20, count 2 2006.229.17:17:55.41#ibcon#first serial, iclass 20, count 2 2006.229.17:17:55.41#ibcon#enter sib2, iclass 20, count 2 2006.229.17:17:55.41#ibcon#flushed, iclass 20, count 2 2006.229.17:17:55.41#ibcon#about to write, iclass 20, count 2 2006.229.17:17:55.41#ibcon#wrote, iclass 20, count 2 2006.229.17:17:55.41#ibcon#about to read 3, iclass 20, count 2 2006.229.17:17:55.43#ibcon#read 3, iclass 20, count 2 2006.229.17:17:55.43#ibcon#about to read 4, iclass 20, count 2 2006.229.17:17:55.43#ibcon#read 4, iclass 20, count 2 2006.229.17:17:55.43#ibcon#about to read 5, iclass 20, count 2 2006.229.17:17:55.43#ibcon#read 5, iclass 20, count 2 2006.229.17:17:55.43#ibcon#about to read 6, iclass 20, count 2 2006.229.17:17:55.43#ibcon#read 6, iclass 20, count 2 2006.229.17:17:55.43#ibcon#end of sib2, iclass 20, count 2 2006.229.17:17:55.43#ibcon#*mode == 0, iclass 20, count 2 2006.229.17:17:55.43#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.17:17:55.43#ibcon#[25=AT07-05\r\n] 2006.229.17:17:55.43#ibcon#*before write, iclass 20, count 2 2006.229.17:17:55.43#ibcon#enter sib2, iclass 20, count 2 2006.229.17:17:55.43#ibcon#flushed, iclass 20, count 2 2006.229.17:17:55.43#ibcon#about to write, iclass 20, count 2 2006.229.17:17:55.43#ibcon#wrote, iclass 20, count 2 2006.229.17:17:55.43#ibcon#about to read 3, iclass 20, count 2 2006.229.17:17:55.46#ibcon#read 3, iclass 20, count 2 2006.229.17:17:55.46#ibcon#about to read 4, iclass 20, count 2 2006.229.17:17:55.46#ibcon#read 4, iclass 20, count 2 2006.229.17:17:55.46#ibcon#about to read 5, iclass 20, count 2 2006.229.17:17:55.46#ibcon#read 5, iclass 20, count 2 2006.229.17:17:55.46#ibcon#about to read 6, iclass 20, count 2 2006.229.17:17:55.46#ibcon#read 6, iclass 20, count 2 2006.229.17:17:55.46#ibcon#end of sib2, iclass 20, count 2 2006.229.17:17:55.46#ibcon#*after write, iclass 20, count 2 2006.229.17:17:55.46#ibcon#*before return 0, iclass 20, count 2 2006.229.17:17:55.46#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:55.46#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:55.46#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.17:17:55.46#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:55.46#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:55.58#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:55.58#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:55.58#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:17:55.58#ibcon#first serial, iclass 20, count 0 2006.229.17:17:55.58#ibcon#enter sib2, iclass 20, count 0 2006.229.17:17:55.58#ibcon#flushed, iclass 20, count 0 2006.229.17:17:55.58#ibcon#about to write, iclass 20, count 0 2006.229.17:17:55.58#ibcon#wrote, iclass 20, count 0 2006.229.17:17:55.58#ibcon#about to read 3, iclass 20, count 0 2006.229.17:17:55.60#ibcon#read 3, iclass 20, count 0 2006.229.17:17:55.60#ibcon#about to read 4, iclass 20, count 0 2006.229.17:17:55.60#ibcon#read 4, iclass 20, count 0 2006.229.17:17:55.60#ibcon#about to read 5, iclass 20, count 0 2006.229.17:17:55.60#ibcon#read 5, iclass 20, count 0 2006.229.17:17:55.60#ibcon#about to read 6, iclass 20, count 0 2006.229.17:17:55.60#ibcon#read 6, iclass 20, count 0 2006.229.17:17:55.60#ibcon#end of sib2, iclass 20, count 0 2006.229.17:17:55.60#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:17:55.60#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:17:55.60#ibcon#[25=USB\r\n] 2006.229.17:17:55.60#ibcon#*before write, iclass 20, count 0 2006.229.17:17:55.60#ibcon#enter sib2, iclass 20, count 0 2006.229.17:17:55.60#ibcon#flushed, iclass 20, count 0 2006.229.17:17:55.60#ibcon#about to write, iclass 20, count 0 2006.229.17:17:55.60#ibcon#wrote, iclass 20, count 0 2006.229.17:17:55.60#ibcon#about to read 3, iclass 20, count 0 2006.229.17:17:55.63#ibcon#read 3, iclass 20, count 0 2006.229.17:17:55.63#ibcon#about to read 4, iclass 20, count 0 2006.229.17:17:55.63#ibcon#read 4, iclass 20, count 0 2006.229.17:17:55.63#ibcon#about to read 5, iclass 20, count 0 2006.229.17:17:55.63#ibcon#read 5, iclass 20, count 0 2006.229.17:17:55.63#ibcon#about to read 6, iclass 20, count 0 2006.229.17:17:55.63#ibcon#read 6, iclass 20, count 0 2006.229.17:17:55.63#ibcon#end of sib2, iclass 20, count 0 2006.229.17:17:55.63#ibcon#*after write, iclass 20, count 0 2006.229.17:17:55.63#ibcon#*before return 0, iclass 20, count 0 2006.229.17:17:55.63#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:55.63#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:55.63#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:17:55.63#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:17:55.63$vck44/valo=8,884.99 2006.229.17:17:55.63#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:17:55.63#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:17:55.63#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:55.63#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:55.63#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:55.63#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:55.63#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:17:55.63#ibcon#first serial, iclass 22, count 0 2006.229.17:17:55.63#ibcon#enter sib2, iclass 22, count 0 2006.229.17:17:55.63#ibcon#flushed, iclass 22, count 0 2006.229.17:17:55.63#ibcon#about to write, iclass 22, count 0 2006.229.17:17:55.63#ibcon#wrote, iclass 22, count 0 2006.229.17:17:55.63#ibcon#about to read 3, iclass 22, count 0 2006.229.17:17:55.65#ibcon#read 3, iclass 22, count 0 2006.229.17:17:55.65#ibcon#about to read 4, iclass 22, count 0 2006.229.17:17:55.65#ibcon#read 4, iclass 22, count 0 2006.229.17:17:55.65#ibcon#about to read 5, iclass 22, count 0 2006.229.17:17:55.65#ibcon#read 5, iclass 22, count 0 2006.229.17:17:55.65#ibcon#about to read 6, iclass 22, count 0 2006.229.17:17:55.65#ibcon#read 6, iclass 22, count 0 2006.229.17:17:55.65#ibcon#end of sib2, iclass 22, count 0 2006.229.17:17:55.65#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:17:55.65#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:17:55.65#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:17:55.65#ibcon#*before write, iclass 22, count 0 2006.229.17:17:55.65#ibcon#enter sib2, iclass 22, count 0 2006.229.17:17:55.65#ibcon#flushed, iclass 22, count 0 2006.229.17:17:55.65#ibcon#about to write, iclass 22, count 0 2006.229.17:17:55.65#ibcon#wrote, iclass 22, count 0 2006.229.17:17:55.65#ibcon#about to read 3, iclass 22, count 0 2006.229.17:17:55.69#ibcon#read 3, iclass 22, count 0 2006.229.17:17:55.69#ibcon#about to read 4, iclass 22, count 0 2006.229.17:17:55.69#ibcon#read 4, iclass 22, count 0 2006.229.17:17:55.69#ibcon#about to read 5, iclass 22, count 0 2006.229.17:17:55.69#ibcon#read 5, iclass 22, count 0 2006.229.17:17:55.69#ibcon#about to read 6, iclass 22, count 0 2006.229.17:17:55.69#ibcon#read 6, iclass 22, count 0 2006.229.17:17:55.69#ibcon#end of sib2, iclass 22, count 0 2006.229.17:17:55.69#ibcon#*after write, iclass 22, count 0 2006.229.17:17:55.69#ibcon#*before return 0, iclass 22, count 0 2006.229.17:17:55.69#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:55.69#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:55.69#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:17:55.69#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:17:55.69$vck44/va=8,6 2006.229.17:17:55.69#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.17:17:55.69#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.17:17:55.69#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:55.69#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:55.75#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:55.75#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:55.75#ibcon#enter wrdev, iclass 24, count 2 2006.229.17:17:55.75#ibcon#first serial, iclass 24, count 2 2006.229.17:17:55.75#ibcon#enter sib2, iclass 24, count 2 2006.229.17:17:55.75#ibcon#flushed, iclass 24, count 2 2006.229.17:17:55.75#ibcon#about to write, iclass 24, count 2 2006.229.17:17:55.75#ibcon#wrote, iclass 24, count 2 2006.229.17:17:55.75#ibcon#about to read 3, iclass 24, count 2 2006.229.17:17:55.77#ibcon#read 3, iclass 24, count 2 2006.229.17:17:55.77#ibcon#about to read 4, iclass 24, count 2 2006.229.17:17:55.77#ibcon#read 4, iclass 24, count 2 2006.229.17:17:55.77#ibcon#about to read 5, iclass 24, count 2 2006.229.17:17:55.77#ibcon#read 5, iclass 24, count 2 2006.229.17:17:55.77#ibcon#about to read 6, iclass 24, count 2 2006.229.17:17:55.77#ibcon#read 6, iclass 24, count 2 2006.229.17:17:55.77#ibcon#end of sib2, iclass 24, count 2 2006.229.17:17:55.77#ibcon#*mode == 0, iclass 24, count 2 2006.229.17:17:55.77#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.17:17:55.77#ibcon#[25=AT08-06\r\n] 2006.229.17:17:55.77#ibcon#*before write, iclass 24, count 2 2006.229.17:17:55.77#ibcon#enter sib2, iclass 24, count 2 2006.229.17:17:55.77#ibcon#flushed, iclass 24, count 2 2006.229.17:17:55.77#ibcon#about to write, iclass 24, count 2 2006.229.17:17:55.77#ibcon#wrote, iclass 24, count 2 2006.229.17:17:55.77#ibcon#about to read 3, iclass 24, count 2 2006.229.17:17:55.80#ibcon#read 3, iclass 24, count 2 2006.229.17:17:55.80#ibcon#about to read 4, iclass 24, count 2 2006.229.17:17:55.80#ibcon#read 4, iclass 24, count 2 2006.229.17:17:55.80#ibcon#about to read 5, iclass 24, count 2 2006.229.17:17:55.80#ibcon#read 5, iclass 24, count 2 2006.229.17:17:55.80#ibcon#about to read 6, iclass 24, count 2 2006.229.17:17:55.80#ibcon#read 6, iclass 24, count 2 2006.229.17:17:55.80#ibcon#end of sib2, iclass 24, count 2 2006.229.17:17:55.80#ibcon#*after write, iclass 24, count 2 2006.229.17:17:55.80#ibcon#*before return 0, iclass 24, count 2 2006.229.17:17:55.80#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:55.80#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:55.80#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.17:17:55.80#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:55.80#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:55.81#abcon#<5=/07 1.6 3.1 27.011001001.6\r\n> 2006.229.17:17:55.83#abcon#{5=INTERFACE CLEAR} 2006.229.17:17:55.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:17:55.92#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:55.92#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:55.92#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:17:55.92#ibcon#first serial, iclass 24, count 0 2006.229.17:17:55.92#ibcon#enter sib2, iclass 24, count 0 2006.229.17:17:55.92#ibcon#flushed, iclass 24, count 0 2006.229.17:17:55.92#ibcon#about to write, iclass 24, count 0 2006.229.17:17:55.92#ibcon#wrote, iclass 24, count 0 2006.229.17:17:55.92#ibcon#about to read 3, iclass 24, count 0 2006.229.17:17:55.94#ibcon#read 3, iclass 24, count 0 2006.229.17:17:55.94#ibcon#about to read 4, iclass 24, count 0 2006.229.17:17:55.94#ibcon#read 4, iclass 24, count 0 2006.229.17:17:55.94#ibcon#about to read 5, iclass 24, count 0 2006.229.17:17:55.94#ibcon#read 5, iclass 24, count 0 2006.229.17:17:55.94#ibcon#about to read 6, iclass 24, count 0 2006.229.17:17:55.94#ibcon#read 6, iclass 24, count 0 2006.229.17:17:55.94#ibcon#end of sib2, iclass 24, count 0 2006.229.17:17:55.94#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:17:55.94#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:17:55.94#ibcon#[25=USB\r\n] 2006.229.17:17:55.94#ibcon#*before write, iclass 24, count 0 2006.229.17:17:55.94#ibcon#enter sib2, iclass 24, count 0 2006.229.17:17:55.94#ibcon#flushed, iclass 24, count 0 2006.229.17:17:55.94#ibcon#about to write, iclass 24, count 0 2006.229.17:17:55.94#ibcon#wrote, iclass 24, count 0 2006.229.17:17:55.94#ibcon#about to read 3, iclass 24, count 0 2006.229.17:17:55.97#ibcon#read 3, iclass 24, count 0 2006.229.17:17:55.97#ibcon#about to read 4, iclass 24, count 0 2006.229.17:17:55.97#ibcon#read 4, iclass 24, count 0 2006.229.17:17:55.97#ibcon#about to read 5, iclass 24, count 0 2006.229.17:17:55.97#ibcon#read 5, iclass 24, count 0 2006.229.17:17:55.97#ibcon#about to read 6, iclass 24, count 0 2006.229.17:17:55.97#ibcon#read 6, iclass 24, count 0 2006.229.17:17:55.97#ibcon#end of sib2, iclass 24, count 0 2006.229.17:17:55.97#ibcon#*after write, iclass 24, count 0 2006.229.17:17:55.97#ibcon#*before return 0, iclass 24, count 0 2006.229.17:17:55.97#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:55.97#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:55.97#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:17:55.97#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:17:55.97$vck44/vblo=1,629.99 2006.229.17:17:55.97#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:17:55.97#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:17:55.97#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:55.97#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:55.97#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:55.97#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:55.97#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:17:55.97#ibcon#first serial, iclass 30, count 0 2006.229.17:17:55.97#ibcon#enter sib2, iclass 30, count 0 2006.229.17:17:55.97#ibcon#flushed, iclass 30, count 0 2006.229.17:17:55.97#ibcon#about to write, iclass 30, count 0 2006.229.17:17:55.97#ibcon#wrote, iclass 30, count 0 2006.229.17:17:55.97#ibcon#about to read 3, iclass 30, count 0 2006.229.17:17:55.99#ibcon#read 3, iclass 30, count 0 2006.229.17:17:55.99#ibcon#about to read 4, iclass 30, count 0 2006.229.17:17:55.99#ibcon#read 4, iclass 30, count 0 2006.229.17:17:55.99#ibcon#about to read 5, iclass 30, count 0 2006.229.17:17:55.99#ibcon#read 5, iclass 30, count 0 2006.229.17:17:55.99#ibcon#about to read 6, iclass 30, count 0 2006.229.17:17:55.99#ibcon#read 6, iclass 30, count 0 2006.229.17:17:55.99#ibcon#end of sib2, iclass 30, count 0 2006.229.17:17:55.99#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:17:55.99#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:17:55.99#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:17:55.99#ibcon#*before write, iclass 30, count 0 2006.229.17:17:55.99#ibcon#enter sib2, iclass 30, count 0 2006.229.17:17:55.99#ibcon#flushed, iclass 30, count 0 2006.229.17:17:55.99#ibcon#about to write, iclass 30, count 0 2006.229.17:17:55.99#ibcon#wrote, iclass 30, count 0 2006.229.17:17:55.99#ibcon#about to read 3, iclass 30, count 0 2006.229.17:17:56.03#ibcon#read 3, iclass 30, count 0 2006.229.17:17:56.03#ibcon#about to read 4, iclass 30, count 0 2006.229.17:17:56.03#ibcon#read 4, iclass 30, count 0 2006.229.17:17:56.03#ibcon#about to read 5, iclass 30, count 0 2006.229.17:17:56.03#ibcon#read 5, iclass 30, count 0 2006.229.17:17:56.03#ibcon#about to read 6, iclass 30, count 0 2006.229.17:17:56.03#ibcon#read 6, iclass 30, count 0 2006.229.17:17:56.03#ibcon#end of sib2, iclass 30, count 0 2006.229.17:17:56.03#ibcon#*after write, iclass 30, count 0 2006.229.17:17:56.03#ibcon#*before return 0, iclass 30, count 0 2006.229.17:17:56.03#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:56.03#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:17:56.03#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:17:56.03#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:17:56.03$vck44/vb=1,4 2006.229.17:17:56.03#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.17:17:56.03#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.17:17:56.03#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:56.03#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:56.03#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:56.03#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:56.03#ibcon#enter wrdev, iclass 32, count 2 2006.229.17:17:56.03#ibcon#first serial, iclass 32, count 2 2006.229.17:17:56.03#ibcon#enter sib2, iclass 32, count 2 2006.229.17:17:56.03#ibcon#flushed, iclass 32, count 2 2006.229.17:17:56.03#ibcon#about to write, iclass 32, count 2 2006.229.17:17:56.03#ibcon#wrote, iclass 32, count 2 2006.229.17:17:56.03#ibcon#about to read 3, iclass 32, count 2 2006.229.17:17:56.05#ibcon#read 3, iclass 32, count 2 2006.229.17:17:56.05#ibcon#about to read 4, iclass 32, count 2 2006.229.17:17:56.05#ibcon#read 4, iclass 32, count 2 2006.229.17:17:56.05#ibcon#about to read 5, iclass 32, count 2 2006.229.17:17:56.05#ibcon#read 5, iclass 32, count 2 2006.229.17:17:56.05#ibcon#about to read 6, iclass 32, count 2 2006.229.17:17:56.05#ibcon#read 6, iclass 32, count 2 2006.229.17:17:56.05#ibcon#end of sib2, iclass 32, count 2 2006.229.17:17:56.05#ibcon#*mode == 0, iclass 32, count 2 2006.229.17:17:56.05#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.17:17:56.05#ibcon#[27=AT01-04\r\n] 2006.229.17:17:56.05#ibcon#*before write, iclass 32, count 2 2006.229.17:17:56.05#ibcon#enter sib2, iclass 32, count 2 2006.229.17:17:56.05#ibcon#flushed, iclass 32, count 2 2006.229.17:17:56.05#ibcon#about to write, iclass 32, count 2 2006.229.17:17:56.05#ibcon#wrote, iclass 32, count 2 2006.229.17:17:56.05#ibcon#about to read 3, iclass 32, count 2 2006.229.17:17:56.08#ibcon#read 3, iclass 32, count 2 2006.229.17:17:56.08#ibcon#about to read 4, iclass 32, count 2 2006.229.17:17:56.08#ibcon#read 4, iclass 32, count 2 2006.229.17:17:56.08#ibcon#about to read 5, iclass 32, count 2 2006.229.17:17:56.08#ibcon#read 5, iclass 32, count 2 2006.229.17:17:56.08#ibcon#about to read 6, iclass 32, count 2 2006.229.17:17:56.08#ibcon#read 6, iclass 32, count 2 2006.229.17:17:56.08#ibcon#end of sib2, iclass 32, count 2 2006.229.17:17:56.08#ibcon#*after write, iclass 32, count 2 2006.229.17:17:56.08#ibcon#*before return 0, iclass 32, count 2 2006.229.17:17:56.08#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:56.08#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:17:56.08#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.17:17:56.08#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:56.08#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:56.20#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:56.20#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:56.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:17:56.20#ibcon#first serial, iclass 32, count 0 2006.229.17:17:56.20#ibcon#enter sib2, iclass 32, count 0 2006.229.17:17:56.20#ibcon#flushed, iclass 32, count 0 2006.229.17:17:56.20#ibcon#about to write, iclass 32, count 0 2006.229.17:17:56.20#ibcon#wrote, iclass 32, count 0 2006.229.17:17:56.20#ibcon#about to read 3, iclass 32, count 0 2006.229.17:17:56.22#ibcon#read 3, iclass 32, count 0 2006.229.17:17:56.22#ibcon#about to read 4, iclass 32, count 0 2006.229.17:17:56.22#ibcon#read 4, iclass 32, count 0 2006.229.17:17:56.22#ibcon#about to read 5, iclass 32, count 0 2006.229.17:17:56.22#ibcon#read 5, iclass 32, count 0 2006.229.17:17:56.22#ibcon#about to read 6, iclass 32, count 0 2006.229.17:17:56.22#ibcon#read 6, iclass 32, count 0 2006.229.17:17:56.22#ibcon#end of sib2, iclass 32, count 0 2006.229.17:17:56.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:17:56.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:17:56.22#ibcon#[27=USB\r\n] 2006.229.17:17:56.22#ibcon#*before write, iclass 32, count 0 2006.229.17:17:56.22#ibcon#enter sib2, iclass 32, count 0 2006.229.17:17:56.22#ibcon#flushed, iclass 32, count 0 2006.229.17:17:56.22#ibcon#about to write, iclass 32, count 0 2006.229.17:17:56.22#ibcon#wrote, iclass 32, count 0 2006.229.17:17:56.22#ibcon#about to read 3, iclass 32, count 0 2006.229.17:17:56.25#ibcon#read 3, iclass 32, count 0 2006.229.17:17:56.25#ibcon#about to read 4, iclass 32, count 0 2006.229.17:17:56.25#ibcon#read 4, iclass 32, count 0 2006.229.17:17:56.25#ibcon#about to read 5, iclass 32, count 0 2006.229.17:17:56.25#ibcon#read 5, iclass 32, count 0 2006.229.17:17:56.25#ibcon#about to read 6, iclass 32, count 0 2006.229.17:17:56.25#ibcon#read 6, iclass 32, count 0 2006.229.17:17:56.25#ibcon#end of sib2, iclass 32, count 0 2006.229.17:17:56.25#ibcon#*after write, iclass 32, count 0 2006.229.17:17:56.25#ibcon#*before return 0, iclass 32, count 0 2006.229.17:17:56.25#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:56.25#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:17:56.25#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:17:56.25#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:17:56.25$vck44/vblo=2,634.99 2006.229.17:17:56.25#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.17:17:56.25#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.17:17:56.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:56.25#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:56.25#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:56.25#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:56.25#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:17:56.25#ibcon#first serial, iclass 34, count 0 2006.229.17:17:56.25#ibcon#enter sib2, iclass 34, count 0 2006.229.17:17:56.25#ibcon#flushed, iclass 34, count 0 2006.229.17:17:56.25#ibcon#about to write, iclass 34, count 0 2006.229.17:17:56.25#ibcon#wrote, iclass 34, count 0 2006.229.17:17:56.25#ibcon#about to read 3, iclass 34, count 0 2006.229.17:17:56.27#ibcon#read 3, iclass 34, count 0 2006.229.17:17:56.27#ibcon#about to read 4, iclass 34, count 0 2006.229.17:17:56.27#ibcon#read 4, iclass 34, count 0 2006.229.17:17:56.27#ibcon#about to read 5, iclass 34, count 0 2006.229.17:17:56.27#ibcon#read 5, iclass 34, count 0 2006.229.17:17:56.27#ibcon#about to read 6, iclass 34, count 0 2006.229.17:17:56.27#ibcon#read 6, iclass 34, count 0 2006.229.17:17:56.27#ibcon#end of sib2, iclass 34, count 0 2006.229.17:17:56.27#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:17:56.27#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:17:56.27#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:17:56.27#ibcon#*before write, iclass 34, count 0 2006.229.17:17:56.27#ibcon#enter sib2, iclass 34, count 0 2006.229.17:17:56.27#ibcon#flushed, iclass 34, count 0 2006.229.17:17:56.27#ibcon#about to write, iclass 34, count 0 2006.229.17:17:56.27#ibcon#wrote, iclass 34, count 0 2006.229.17:17:56.27#ibcon#about to read 3, iclass 34, count 0 2006.229.17:17:56.31#ibcon#read 3, iclass 34, count 0 2006.229.17:17:56.31#ibcon#about to read 4, iclass 34, count 0 2006.229.17:17:56.31#ibcon#read 4, iclass 34, count 0 2006.229.17:17:56.31#ibcon#about to read 5, iclass 34, count 0 2006.229.17:17:56.31#ibcon#read 5, iclass 34, count 0 2006.229.17:17:56.31#ibcon#about to read 6, iclass 34, count 0 2006.229.17:17:56.31#ibcon#read 6, iclass 34, count 0 2006.229.17:17:56.31#ibcon#end of sib2, iclass 34, count 0 2006.229.17:17:56.31#ibcon#*after write, iclass 34, count 0 2006.229.17:17:56.31#ibcon#*before return 0, iclass 34, count 0 2006.229.17:17:56.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:56.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:17:56.31#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:17:56.31#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:17:56.31$vck44/vb=2,4 2006.229.17:17:56.31#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.17:17:56.31#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.17:17:56.31#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:56.31#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:56.37#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:56.37#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:56.37#ibcon#enter wrdev, iclass 36, count 2 2006.229.17:17:56.37#ibcon#first serial, iclass 36, count 2 2006.229.17:17:56.37#ibcon#enter sib2, iclass 36, count 2 2006.229.17:17:56.37#ibcon#flushed, iclass 36, count 2 2006.229.17:17:56.37#ibcon#about to write, iclass 36, count 2 2006.229.17:17:56.37#ibcon#wrote, iclass 36, count 2 2006.229.17:17:56.37#ibcon#about to read 3, iclass 36, count 2 2006.229.17:17:56.39#ibcon#read 3, iclass 36, count 2 2006.229.17:17:56.39#ibcon#about to read 4, iclass 36, count 2 2006.229.17:17:56.39#ibcon#read 4, iclass 36, count 2 2006.229.17:17:56.39#ibcon#about to read 5, iclass 36, count 2 2006.229.17:17:56.39#ibcon#read 5, iclass 36, count 2 2006.229.17:17:56.39#ibcon#about to read 6, iclass 36, count 2 2006.229.17:17:56.39#ibcon#read 6, iclass 36, count 2 2006.229.17:17:56.39#ibcon#end of sib2, iclass 36, count 2 2006.229.17:17:56.39#ibcon#*mode == 0, iclass 36, count 2 2006.229.17:17:56.39#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.17:17:56.39#ibcon#[27=AT02-04\r\n] 2006.229.17:17:56.39#ibcon#*before write, iclass 36, count 2 2006.229.17:17:56.39#ibcon#enter sib2, iclass 36, count 2 2006.229.17:17:56.39#ibcon#flushed, iclass 36, count 2 2006.229.17:17:56.39#ibcon#about to write, iclass 36, count 2 2006.229.17:17:56.39#ibcon#wrote, iclass 36, count 2 2006.229.17:17:56.39#ibcon#about to read 3, iclass 36, count 2 2006.229.17:17:56.42#ibcon#read 3, iclass 36, count 2 2006.229.17:17:56.42#ibcon#about to read 4, iclass 36, count 2 2006.229.17:17:56.42#ibcon#read 4, iclass 36, count 2 2006.229.17:17:56.42#ibcon#about to read 5, iclass 36, count 2 2006.229.17:17:56.42#ibcon#read 5, iclass 36, count 2 2006.229.17:17:56.42#ibcon#about to read 6, iclass 36, count 2 2006.229.17:17:56.42#ibcon#read 6, iclass 36, count 2 2006.229.17:17:56.42#ibcon#end of sib2, iclass 36, count 2 2006.229.17:17:56.42#ibcon#*after write, iclass 36, count 2 2006.229.17:17:56.42#ibcon#*before return 0, iclass 36, count 2 2006.229.17:17:56.42#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:56.42#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:17:56.42#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.17:17:56.42#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:56.42#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:56.54#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:56.54#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:56.54#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:17:56.54#ibcon#first serial, iclass 36, count 0 2006.229.17:17:56.54#ibcon#enter sib2, iclass 36, count 0 2006.229.17:17:56.54#ibcon#flushed, iclass 36, count 0 2006.229.17:17:56.54#ibcon#about to write, iclass 36, count 0 2006.229.17:17:56.54#ibcon#wrote, iclass 36, count 0 2006.229.17:17:56.54#ibcon#about to read 3, iclass 36, count 0 2006.229.17:17:56.56#ibcon#read 3, iclass 36, count 0 2006.229.17:17:56.56#ibcon#about to read 4, iclass 36, count 0 2006.229.17:17:56.56#ibcon#read 4, iclass 36, count 0 2006.229.17:17:56.56#ibcon#about to read 5, iclass 36, count 0 2006.229.17:17:56.56#ibcon#read 5, iclass 36, count 0 2006.229.17:17:56.56#ibcon#about to read 6, iclass 36, count 0 2006.229.17:17:56.56#ibcon#read 6, iclass 36, count 0 2006.229.17:17:56.56#ibcon#end of sib2, iclass 36, count 0 2006.229.17:17:56.56#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:17:56.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:17:56.56#ibcon#[27=USB\r\n] 2006.229.17:17:56.56#ibcon#*before write, iclass 36, count 0 2006.229.17:17:56.56#ibcon#enter sib2, iclass 36, count 0 2006.229.17:17:56.56#ibcon#flushed, iclass 36, count 0 2006.229.17:17:56.56#ibcon#about to write, iclass 36, count 0 2006.229.17:17:56.56#ibcon#wrote, iclass 36, count 0 2006.229.17:17:56.56#ibcon#about to read 3, iclass 36, count 0 2006.229.17:17:56.59#ibcon#read 3, iclass 36, count 0 2006.229.17:17:56.59#ibcon#about to read 4, iclass 36, count 0 2006.229.17:17:56.59#ibcon#read 4, iclass 36, count 0 2006.229.17:17:56.59#ibcon#about to read 5, iclass 36, count 0 2006.229.17:17:56.59#ibcon#read 5, iclass 36, count 0 2006.229.17:17:56.59#ibcon#about to read 6, iclass 36, count 0 2006.229.17:17:56.59#ibcon#read 6, iclass 36, count 0 2006.229.17:17:56.59#ibcon#end of sib2, iclass 36, count 0 2006.229.17:17:56.59#ibcon#*after write, iclass 36, count 0 2006.229.17:17:56.59#ibcon#*before return 0, iclass 36, count 0 2006.229.17:17:56.59#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:56.59#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:17:56.59#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:17:56.59#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:17:56.59$vck44/vblo=3,649.99 2006.229.17:17:56.59#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.17:17:56.59#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.17:17:56.59#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:56.59#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:56.59#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:56.59#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:56.59#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:17:56.59#ibcon#first serial, iclass 38, count 0 2006.229.17:17:56.59#ibcon#enter sib2, iclass 38, count 0 2006.229.17:17:56.59#ibcon#flushed, iclass 38, count 0 2006.229.17:17:56.59#ibcon#about to write, iclass 38, count 0 2006.229.17:17:56.59#ibcon#wrote, iclass 38, count 0 2006.229.17:17:56.59#ibcon#about to read 3, iclass 38, count 0 2006.229.17:17:56.61#ibcon#read 3, iclass 38, count 0 2006.229.17:17:56.61#ibcon#about to read 4, iclass 38, count 0 2006.229.17:17:56.61#ibcon#read 4, iclass 38, count 0 2006.229.17:17:56.61#ibcon#about to read 5, iclass 38, count 0 2006.229.17:17:56.61#ibcon#read 5, iclass 38, count 0 2006.229.17:17:56.61#ibcon#about to read 6, iclass 38, count 0 2006.229.17:17:56.61#ibcon#read 6, iclass 38, count 0 2006.229.17:17:56.61#ibcon#end of sib2, iclass 38, count 0 2006.229.17:17:56.61#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:17:56.61#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:17:56.61#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:17:56.61#ibcon#*before write, iclass 38, count 0 2006.229.17:17:56.61#ibcon#enter sib2, iclass 38, count 0 2006.229.17:17:56.61#ibcon#flushed, iclass 38, count 0 2006.229.17:17:56.61#ibcon#about to write, iclass 38, count 0 2006.229.17:17:56.61#ibcon#wrote, iclass 38, count 0 2006.229.17:17:56.61#ibcon#about to read 3, iclass 38, count 0 2006.229.17:17:56.65#ibcon#read 3, iclass 38, count 0 2006.229.17:17:56.65#ibcon#about to read 4, iclass 38, count 0 2006.229.17:17:56.65#ibcon#read 4, iclass 38, count 0 2006.229.17:17:56.65#ibcon#about to read 5, iclass 38, count 0 2006.229.17:17:56.65#ibcon#read 5, iclass 38, count 0 2006.229.17:17:56.65#ibcon#about to read 6, iclass 38, count 0 2006.229.17:17:56.65#ibcon#read 6, iclass 38, count 0 2006.229.17:17:56.65#ibcon#end of sib2, iclass 38, count 0 2006.229.17:17:56.65#ibcon#*after write, iclass 38, count 0 2006.229.17:17:56.65#ibcon#*before return 0, iclass 38, count 0 2006.229.17:17:56.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:56.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:17:56.65#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:17:56.65#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:17:56.65$vck44/vb=3,4 2006.229.17:17:56.65#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.17:17:56.65#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.17:17:56.65#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:56.65#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:56.71#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:56.71#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:56.71#ibcon#enter wrdev, iclass 40, count 2 2006.229.17:17:56.71#ibcon#first serial, iclass 40, count 2 2006.229.17:17:56.71#ibcon#enter sib2, iclass 40, count 2 2006.229.17:17:56.71#ibcon#flushed, iclass 40, count 2 2006.229.17:17:56.71#ibcon#about to write, iclass 40, count 2 2006.229.17:17:56.71#ibcon#wrote, iclass 40, count 2 2006.229.17:17:56.71#ibcon#about to read 3, iclass 40, count 2 2006.229.17:17:56.73#ibcon#read 3, iclass 40, count 2 2006.229.17:17:56.73#ibcon#about to read 4, iclass 40, count 2 2006.229.17:17:56.73#ibcon#read 4, iclass 40, count 2 2006.229.17:17:56.73#ibcon#about to read 5, iclass 40, count 2 2006.229.17:17:56.73#ibcon#read 5, iclass 40, count 2 2006.229.17:17:56.73#ibcon#about to read 6, iclass 40, count 2 2006.229.17:17:56.73#ibcon#read 6, iclass 40, count 2 2006.229.17:17:56.73#ibcon#end of sib2, iclass 40, count 2 2006.229.17:17:56.73#ibcon#*mode == 0, iclass 40, count 2 2006.229.17:17:56.73#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.17:17:56.73#ibcon#[27=AT03-04\r\n] 2006.229.17:17:56.73#ibcon#*before write, iclass 40, count 2 2006.229.17:17:56.73#ibcon#enter sib2, iclass 40, count 2 2006.229.17:17:56.73#ibcon#flushed, iclass 40, count 2 2006.229.17:17:56.73#ibcon#about to write, iclass 40, count 2 2006.229.17:17:56.73#ibcon#wrote, iclass 40, count 2 2006.229.17:17:56.73#ibcon#about to read 3, iclass 40, count 2 2006.229.17:17:56.76#ibcon#read 3, iclass 40, count 2 2006.229.17:17:56.76#ibcon#about to read 4, iclass 40, count 2 2006.229.17:17:56.76#ibcon#read 4, iclass 40, count 2 2006.229.17:17:56.76#ibcon#about to read 5, iclass 40, count 2 2006.229.17:17:56.76#ibcon#read 5, iclass 40, count 2 2006.229.17:17:56.76#ibcon#about to read 6, iclass 40, count 2 2006.229.17:17:56.76#ibcon#read 6, iclass 40, count 2 2006.229.17:17:56.76#ibcon#end of sib2, iclass 40, count 2 2006.229.17:17:56.76#ibcon#*after write, iclass 40, count 2 2006.229.17:17:56.76#ibcon#*before return 0, iclass 40, count 2 2006.229.17:17:56.76#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:56.76#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:17:56.76#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.17:17:56.76#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:56.76#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:56.88#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:56.88#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:56.88#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:17:56.88#ibcon#first serial, iclass 40, count 0 2006.229.17:17:56.88#ibcon#enter sib2, iclass 40, count 0 2006.229.17:17:56.88#ibcon#flushed, iclass 40, count 0 2006.229.17:17:56.88#ibcon#about to write, iclass 40, count 0 2006.229.17:17:56.88#ibcon#wrote, iclass 40, count 0 2006.229.17:17:56.88#ibcon#about to read 3, iclass 40, count 0 2006.229.17:17:56.90#ibcon#read 3, iclass 40, count 0 2006.229.17:17:56.90#ibcon#about to read 4, iclass 40, count 0 2006.229.17:17:56.90#ibcon#read 4, iclass 40, count 0 2006.229.17:17:56.90#ibcon#about to read 5, iclass 40, count 0 2006.229.17:17:56.90#ibcon#read 5, iclass 40, count 0 2006.229.17:17:56.90#ibcon#about to read 6, iclass 40, count 0 2006.229.17:17:56.90#ibcon#read 6, iclass 40, count 0 2006.229.17:17:56.90#ibcon#end of sib2, iclass 40, count 0 2006.229.17:17:56.90#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:17:56.90#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:17:56.90#ibcon#[27=USB\r\n] 2006.229.17:17:56.90#ibcon#*before write, iclass 40, count 0 2006.229.17:17:56.90#ibcon#enter sib2, iclass 40, count 0 2006.229.17:17:56.90#ibcon#flushed, iclass 40, count 0 2006.229.17:17:56.90#ibcon#about to write, iclass 40, count 0 2006.229.17:17:56.90#ibcon#wrote, iclass 40, count 0 2006.229.17:17:56.90#ibcon#about to read 3, iclass 40, count 0 2006.229.17:17:56.93#ibcon#read 3, iclass 40, count 0 2006.229.17:17:56.93#ibcon#about to read 4, iclass 40, count 0 2006.229.17:17:56.93#ibcon#read 4, iclass 40, count 0 2006.229.17:17:56.93#ibcon#about to read 5, iclass 40, count 0 2006.229.17:17:56.93#ibcon#read 5, iclass 40, count 0 2006.229.17:17:56.93#ibcon#about to read 6, iclass 40, count 0 2006.229.17:17:56.93#ibcon#read 6, iclass 40, count 0 2006.229.17:17:56.93#ibcon#end of sib2, iclass 40, count 0 2006.229.17:17:56.93#ibcon#*after write, iclass 40, count 0 2006.229.17:17:56.93#ibcon#*before return 0, iclass 40, count 0 2006.229.17:17:56.93#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:56.93#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:17:56.93#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:17:56.93#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:17:56.93$vck44/vblo=4,679.99 2006.229.17:17:56.93#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.17:17:56.93#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.17:17:56.93#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:56.93#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:56.93#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:56.93#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:56.93#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:17:56.93#ibcon#first serial, iclass 4, count 0 2006.229.17:17:56.93#ibcon#enter sib2, iclass 4, count 0 2006.229.17:17:56.93#ibcon#flushed, iclass 4, count 0 2006.229.17:17:56.93#ibcon#about to write, iclass 4, count 0 2006.229.17:17:56.93#ibcon#wrote, iclass 4, count 0 2006.229.17:17:56.93#ibcon#about to read 3, iclass 4, count 0 2006.229.17:17:56.95#ibcon#read 3, iclass 4, count 0 2006.229.17:17:56.95#ibcon#about to read 4, iclass 4, count 0 2006.229.17:17:56.95#ibcon#read 4, iclass 4, count 0 2006.229.17:17:56.95#ibcon#about to read 5, iclass 4, count 0 2006.229.17:17:56.95#ibcon#read 5, iclass 4, count 0 2006.229.17:17:56.95#ibcon#about to read 6, iclass 4, count 0 2006.229.17:17:56.95#ibcon#read 6, iclass 4, count 0 2006.229.17:17:56.95#ibcon#end of sib2, iclass 4, count 0 2006.229.17:17:56.95#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:17:56.95#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:17:56.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:17:56.95#ibcon#*before write, iclass 4, count 0 2006.229.17:17:56.95#ibcon#enter sib2, iclass 4, count 0 2006.229.17:17:56.95#ibcon#flushed, iclass 4, count 0 2006.229.17:17:56.95#ibcon#about to write, iclass 4, count 0 2006.229.17:17:56.95#ibcon#wrote, iclass 4, count 0 2006.229.17:17:56.95#ibcon#about to read 3, iclass 4, count 0 2006.229.17:17:56.99#ibcon#read 3, iclass 4, count 0 2006.229.17:17:56.99#ibcon#about to read 4, iclass 4, count 0 2006.229.17:17:56.99#ibcon#read 4, iclass 4, count 0 2006.229.17:17:56.99#ibcon#about to read 5, iclass 4, count 0 2006.229.17:17:56.99#ibcon#read 5, iclass 4, count 0 2006.229.17:17:56.99#ibcon#about to read 6, iclass 4, count 0 2006.229.17:17:56.99#ibcon#read 6, iclass 4, count 0 2006.229.17:17:56.99#ibcon#end of sib2, iclass 4, count 0 2006.229.17:17:56.99#ibcon#*after write, iclass 4, count 0 2006.229.17:17:56.99#ibcon#*before return 0, iclass 4, count 0 2006.229.17:17:56.99#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:56.99#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:17:56.99#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:17:56.99#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:17:56.99$vck44/vb=4,4 2006.229.17:17:56.99#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.17:17:56.99#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.17:17:56.99#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:56.99#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:57.05#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:57.05#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:57.05#ibcon#enter wrdev, iclass 6, count 2 2006.229.17:17:57.05#ibcon#first serial, iclass 6, count 2 2006.229.17:17:57.05#ibcon#enter sib2, iclass 6, count 2 2006.229.17:17:57.05#ibcon#flushed, iclass 6, count 2 2006.229.17:17:57.05#ibcon#about to write, iclass 6, count 2 2006.229.17:17:57.05#ibcon#wrote, iclass 6, count 2 2006.229.17:17:57.05#ibcon#about to read 3, iclass 6, count 2 2006.229.17:17:57.07#ibcon#read 3, iclass 6, count 2 2006.229.17:17:57.07#ibcon#about to read 4, iclass 6, count 2 2006.229.17:17:57.07#ibcon#read 4, iclass 6, count 2 2006.229.17:17:57.07#ibcon#about to read 5, iclass 6, count 2 2006.229.17:17:57.07#ibcon#read 5, iclass 6, count 2 2006.229.17:17:57.07#ibcon#about to read 6, iclass 6, count 2 2006.229.17:17:57.07#ibcon#read 6, iclass 6, count 2 2006.229.17:17:57.07#ibcon#end of sib2, iclass 6, count 2 2006.229.17:17:57.07#ibcon#*mode == 0, iclass 6, count 2 2006.229.17:17:57.07#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.17:17:57.07#ibcon#[27=AT04-04\r\n] 2006.229.17:17:57.07#ibcon#*before write, iclass 6, count 2 2006.229.17:17:57.07#ibcon#enter sib2, iclass 6, count 2 2006.229.17:17:57.07#ibcon#flushed, iclass 6, count 2 2006.229.17:17:57.07#ibcon#about to write, iclass 6, count 2 2006.229.17:17:57.07#ibcon#wrote, iclass 6, count 2 2006.229.17:17:57.07#ibcon#about to read 3, iclass 6, count 2 2006.229.17:17:57.10#ibcon#read 3, iclass 6, count 2 2006.229.17:17:57.10#ibcon#about to read 4, iclass 6, count 2 2006.229.17:17:57.10#ibcon#read 4, iclass 6, count 2 2006.229.17:17:57.10#ibcon#about to read 5, iclass 6, count 2 2006.229.17:17:57.10#ibcon#read 5, iclass 6, count 2 2006.229.17:17:57.10#ibcon#about to read 6, iclass 6, count 2 2006.229.17:17:57.10#ibcon#read 6, iclass 6, count 2 2006.229.17:17:57.10#ibcon#end of sib2, iclass 6, count 2 2006.229.17:17:57.10#ibcon#*after write, iclass 6, count 2 2006.229.17:17:57.10#ibcon#*before return 0, iclass 6, count 2 2006.229.17:17:57.10#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:57.10#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:17:57.10#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.17:17:57.10#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:57.10#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:57.22#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:57.22#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:57.22#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:17:57.22#ibcon#first serial, iclass 6, count 0 2006.229.17:17:57.22#ibcon#enter sib2, iclass 6, count 0 2006.229.17:17:57.22#ibcon#flushed, iclass 6, count 0 2006.229.17:17:57.22#ibcon#about to write, iclass 6, count 0 2006.229.17:17:57.22#ibcon#wrote, iclass 6, count 0 2006.229.17:17:57.22#ibcon#about to read 3, iclass 6, count 0 2006.229.17:17:57.24#ibcon#read 3, iclass 6, count 0 2006.229.17:17:57.24#ibcon#about to read 4, iclass 6, count 0 2006.229.17:17:57.24#ibcon#read 4, iclass 6, count 0 2006.229.17:17:57.24#ibcon#about to read 5, iclass 6, count 0 2006.229.17:17:57.24#ibcon#read 5, iclass 6, count 0 2006.229.17:17:57.24#ibcon#about to read 6, iclass 6, count 0 2006.229.17:17:57.24#ibcon#read 6, iclass 6, count 0 2006.229.17:17:57.24#ibcon#end of sib2, iclass 6, count 0 2006.229.17:17:57.24#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:17:57.24#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:17:57.24#ibcon#[27=USB\r\n] 2006.229.17:17:57.24#ibcon#*before write, iclass 6, count 0 2006.229.17:17:57.24#ibcon#enter sib2, iclass 6, count 0 2006.229.17:17:57.24#ibcon#flushed, iclass 6, count 0 2006.229.17:17:57.24#ibcon#about to write, iclass 6, count 0 2006.229.17:17:57.24#ibcon#wrote, iclass 6, count 0 2006.229.17:17:57.24#ibcon#about to read 3, iclass 6, count 0 2006.229.17:17:57.27#ibcon#read 3, iclass 6, count 0 2006.229.17:17:57.27#ibcon#about to read 4, iclass 6, count 0 2006.229.17:17:57.27#ibcon#read 4, iclass 6, count 0 2006.229.17:17:57.27#ibcon#about to read 5, iclass 6, count 0 2006.229.17:17:57.27#ibcon#read 5, iclass 6, count 0 2006.229.17:17:57.27#ibcon#about to read 6, iclass 6, count 0 2006.229.17:17:57.27#ibcon#read 6, iclass 6, count 0 2006.229.17:17:57.27#ibcon#end of sib2, iclass 6, count 0 2006.229.17:17:57.27#ibcon#*after write, iclass 6, count 0 2006.229.17:17:57.27#ibcon#*before return 0, iclass 6, count 0 2006.229.17:17:57.27#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:57.27#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:17:57.27#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:17:57.27#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:17:57.27$vck44/vblo=5,709.99 2006.229.17:17:57.27#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.17:17:57.27#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.17:17:57.27#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:57.27#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:57.27#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:57.27#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:57.27#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:17:57.27#ibcon#first serial, iclass 10, count 0 2006.229.17:17:57.27#ibcon#enter sib2, iclass 10, count 0 2006.229.17:17:57.27#ibcon#flushed, iclass 10, count 0 2006.229.17:17:57.27#ibcon#about to write, iclass 10, count 0 2006.229.17:17:57.27#ibcon#wrote, iclass 10, count 0 2006.229.17:17:57.27#ibcon#about to read 3, iclass 10, count 0 2006.229.17:17:57.29#ibcon#read 3, iclass 10, count 0 2006.229.17:17:57.29#ibcon#about to read 4, iclass 10, count 0 2006.229.17:17:57.29#ibcon#read 4, iclass 10, count 0 2006.229.17:17:57.29#ibcon#about to read 5, iclass 10, count 0 2006.229.17:17:57.29#ibcon#read 5, iclass 10, count 0 2006.229.17:17:57.29#ibcon#about to read 6, iclass 10, count 0 2006.229.17:17:57.29#ibcon#read 6, iclass 10, count 0 2006.229.17:17:57.29#ibcon#end of sib2, iclass 10, count 0 2006.229.17:17:57.29#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:17:57.29#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:17:57.29#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:17:57.29#ibcon#*before write, iclass 10, count 0 2006.229.17:17:57.29#ibcon#enter sib2, iclass 10, count 0 2006.229.17:17:57.29#ibcon#flushed, iclass 10, count 0 2006.229.17:17:57.29#ibcon#about to write, iclass 10, count 0 2006.229.17:17:57.29#ibcon#wrote, iclass 10, count 0 2006.229.17:17:57.29#ibcon#about to read 3, iclass 10, count 0 2006.229.17:17:57.33#ibcon#read 3, iclass 10, count 0 2006.229.17:17:57.33#ibcon#about to read 4, iclass 10, count 0 2006.229.17:17:57.33#ibcon#read 4, iclass 10, count 0 2006.229.17:17:57.33#ibcon#about to read 5, iclass 10, count 0 2006.229.17:17:57.33#ibcon#read 5, iclass 10, count 0 2006.229.17:17:57.33#ibcon#about to read 6, iclass 10, count 0 2006.229.17:17:57.33#ibcon#read 6, iclass 10, count 0 2006.229.17:17:57.33#ibcon#end of sib2, iclass 10, count 0 2006.229.17:17:57.33#ibcon#*after write, iclass 10, count 0 2006.229.17:17:57.33#ibcon#*before return 0, iclass 10, count 0 2006.229.17:17:57.33#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:57.33#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:17:57.33#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:17:57.33#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:17:57.33$vck44/vb=5,4 2006.229.17:17:57.33#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.17:17:57.33#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.17:17:57.33#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:57.33#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:57.39#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:57.39#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:57.39#ibcon#enter wrdev, iclass 12, count 2 2006.229.17:17:57.39#ibcon#first serial, iclass 12, count 2 2006.229.17:17:57.39#ibcon#enter sib2, iclass 12, count 2 2006.229.17:17:57.39#ibcon#flushed, iclass 12, count 2 2006.229.17:17:57.39#ibcon#about to write, iclass 12, count 2 2006.229.17:17:57.39#ibcon#wrote, iclass 12, count 2 2006.229.17:17:57.39#ibcon#about to read 3, iclass 12, count 2 2006.229.17:17:57.41#ibcon#read 3, iclass 12, count 2 2006.229.17:17:57.41#ibcon#about to read 4, iclass 12, count 2 2006.229.17:17:57.41#ibcon#read 4, iclass 12, count 2 2006.229.17:17:57.41#ibcon#about to read 5, iclass 12, count 2 2006.229.17:17:57.41#ibcon#read 5, iclass 12, count 2 2006.229.17:17:57.41#ibcon#about to read 6, iclass 12, count 2 2006.229.17:17:57.41#ibcon#read 6, iclass 12, count 2 2006.229.17:17:57.41#ibcon#end of sib2, iclass 12, count 2 2006.229.17:17:57.41#ibcon#*mode == 0, iclass 12, count 2 2006.229.17:17:57.41#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.17:17:57.41#ibcon#[27=AT05-04\r\n] 2006.229.17:17:57.41#ibcon#*before write, iclass 12, count 2 2006.229.17:17:57.41#ibcon#enter sib2, iclass 12, count 2 2006.229.17:17:57.41#ibcon#flushed, iclass 12, count 2 2006.229.17:17:57.41#ibcon#about to write, iclass 12, count 2 2006.229.17:17:57.41#ibcon#wrote, iclass 12, count 2 2006.229.17:17:57.41#ibcon#about to read 3, iclass 12, count 2 2006.229.17:17:57.44#ibcon#read 3, iclass 12, count 2 2006.229.17:17:57.44#ibcon#about to read 4, iclass 12, count 2 2006.229.17:17:57.44#ibcon#read 4, iclass 12, count 2 2006.229.17:17:57.44#ibcon#about to read 5, iclass 12, count 2 2006.229.17:17:57.44#ibcon#read 5, iclass 12, count 2 2006.229.17:17:57.44#ibcon#about to read 6, iclass 12, count 2 2006.229.17:17:57.44#ibcon#read 6, iclass 12, count 2 2006.229.17:17:57.44#ibcon#end of sib2, iclass 12, count 2 2006.229.17:17:57.44#ibcon#*after write, iclass 12, count 2 2006.229.17:17:57.44#ibcon#*before return 0, iclass 12, count 2 2006.229.17:17:57.44#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:57.44#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:17:57.44#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.17:17:57.44#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:57.44#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:57.56#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:57.56#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:57.56#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:17:57.56#ibcon#first serial, iclass 12, count 0 2006.229.17:17:57.56#ibcon#enter sib2, iclass 12, count 0 2006.229.17:17:57.56#ibcon#flushed, iclass 12, count 0 2006.229.17:17:57.56#ibcon#about to write, iclass 12, count 0 2006.229.17:17:57.56#ibcon#wrote, iclass 12, count 0 2006.229.17:17:57.56#ibcon#about to read 3, iclass 12, count 0 2006.229.17:17:57.58#ibcon#read 3, iclass 12, count 0 2006.229.17:17:57.58#ibcon#about to read 4, iclass 12, count 0 2006.229.17:17:57.58#ibcon#read 4, iclass 12, count 0 2006.229.17:17:57.58#ibcon#about to read 5, iclass 12, count 0 2006.229.17:17:57.58#ibcon#read 5, iclass 12, count 0 2006.229.17:17:57.58#ibcon#about to read 6, iclass 12, count 0 2006.229.17:17:57.58#ibcon#read 6, iclass 12, count 0 2006.229.17:17:57.58#ibcon#end of sib2, iclass 12, count 0 2006.229.17:17:57.58#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:17:57.58#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:17:57.58#ibcon#[27=USB\r\n] 2006.229.17:17:57.58#ibcon#*before write, iclass 12, count 0 2006.229.17:17:57.58#ibcon#enter sib2, iclass 12, count 0 2006.229.17:17:57.58#ibcon#flushed, iclass 12, count 0 2006.229.17:17:57.58#ibcon#about to write, iclass 12, count 0 2006.229.17:17:57.58#ibcon#wrote, iclass 12, count 0 2006.229.17:17:57.58#ibcon#about to read 3, iclass 12, count 0 2006.229.17:17:57.61#ibcon#read 3, iclass 12, count 0 2006.229.17:17:57.61#ibcon#about to read 4, iclass 12, count 0 2006.229.17:17:57.61#ibcon#read 4, iclass 12, count 0 2006.229.17:17:57.61#ibcon#about to read 5, iclass 12, count 0 2006.229.17:17:57.61#ibcon#read 5, iclass 12, count 0 2006.229.17:17:57.61#ibcon#about to read 6, iclass 12, count 0 2006.229.17:17:57.61#ibcon#read 6, iclass 12, count 0 2006.229.17:17:57.61#ibcon#end of sib2, iclass 12, count 0 2006.229.17:17:57.61#ibcon#*after write, iclass 12, count 0 2006.229.17:17:57.61#ibcon#*before return 0, iclass 12, count 0 2006.229.17:17:57.61#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:57.61#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:17:57.61#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:17:57.61#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:17:57.61$vck44/vblo=6,719.99 2006.229.17:17:57.61#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.17:17:57.61#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.17:17:57.61#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:57.61#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:57.61#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:57.61#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:57.61#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:17:57.61#ibcon#first serial, iclass 14, count 0 2006.229.17:17:57.61#ibcon#enter sib2, iclass 14, count 0 2006.229.17:17:57.61#ibcon#flushed, iclass 14, count 0 2006.229.17:17:57.61#ibcon#about to write, iclass 14, count 0 2006.229.17:17:57.61#ibcon#wrote, iclass 14, count 0 2006.229.17:17:57.61#ibcon#about to read 3, iclass 14, count 0 2006.229.17:17:57.63#ibcon#read 3, iclass 14, count 0 2006.229.17:17:57.63#ibcon#about to read 4, iclass 14, count 0 2006.229.17:17:57.63#ibcon#read 4, iclass 14, count 0 2006.229.17:17:57.63#ibcon#about to read 5, iclass 14, count 0 2006.229.17:17:57.63#ibcon#read 5, iclass 14, count 0 2006.229.17:17:57.63#ibcon#about to read 6, iclass 14, count 0 2006.229.17:17:57.63#ibcon#read 6, iclass 14, count 0 2006.229.17:17:57.63#ibcon#end of sib2, iclass 14, count 0 2006.229.17:17:57.63#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:17:57.63#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:17:57.63#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:17:57.63#ibcon#*before write, iclass 14, count 0 2006.229.17:17:57.63#ibcon#enter sib2, iclass 14, count 0 2006.229.17:17:57.63#ibcon#flushed, iclass 14, count 0 2006.229.17:17:57.63#ibcon#about to write, iclass 14, count 0 2006.229.17:17:57.63#ibcon#wrote, iclass 14, count 0 2006.229.17:17:57.63#ibcon#about to read 3, iclass 14, count 0 2006.229.17:17:57.67#ibcon#read 3, iclass 14, count 0 2006.229.17:17:57.67#ibcon#about to read 4, iclass 14, count 0 2006.229.17:17:57.67#ibcon#read 4, iclass 14, count 0 2006.229.17:17:57.67#ibcon#about to read 5, iclass 14, count 0 2006.229.17:17:57.67#ibcon#read 5, iclass 14, count 0 2006.229.17:17:57.67#ibcon#about to read 6, iclass 14, count 0 2006.229.17:17:57.67#ibcon#read 6, iclass 14, count 0 2006.229.17:17:57.67#ibcon#end of sib2, iclass 14, count 0 2006.229.17:17:57.67#ibcon#*after write, iclass 14, count 0 2006.229.17:17:57.67#ibcon#*before return 0, iclass 14, count 0 2006.229.17:17:57.67#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:57.67#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:17:57.67#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:17:57.67#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:17:57.67$vck44/vb=6,4 2006.229.17:17:57.67#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.17:17:57.67#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.17:17:57.67#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:57.67#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:57.73#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:57.73#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:57.73#ibcon#enter wrdev, iclass 16, count 2 2006.229.17:17:57.73#ibcon#first serial, iclass 16, count 2 2006.229.17:17:57.73#ibcon#enter sib2, iclass 16, count 2 2006.229.17:17:57.73#ibcon#flushed, iclass 16, count 2 2006.229.17:17:57.73#ibcon#about to write, iclass 16, count 2 2006.229.17:17:57.73#ibcon#wrote, iclass 16, count 2 2006.229.17:17:57.73#ibcon#about to read 3, iclass 16, count 2 2006.229.17:17:57.75#ibcon#read 3, iclass 16, count 2 2006.229.17:17:57.75#ibcon#about to read 4, iclass 16, count 2 2006.229.17:17:57.75#ibcon#read 4, iclass 16, count 2 2006.229.17:17:57.75#ibcon#about to read 5, iclass 16, count 2 2006.229.17:17:57.75#ibcon#read 5, iclass 16, count 2 2006.229.17:17:57.75#ibcon#about to read 6, iclass 16, count 2 2006.229.17:17:57.75#ibcon#read 6, iclass 16, count 2 2006.229.17:17:57.75#ibcon#end of sib2, iclass 16, count 2 2006.229.17:17:57.75#ibcon#*mode == 0, iclass 16, count 2 2006.229.17:17:57.75#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.17:17:57.75#ibcon#[27=AT06-04\r\n] 2006.229.17:17:57.75#ibcon#*before write, iclass 16, count 2 2006.229.17:17:57.75#ibcon#enter sib2, iclass 16, count 2 2006.229.17:17:57.75#ibcon#flushed, iclass 16, count 2 2006.229.17:17:57.75#ibcon#about to write, iclass 16, count 2 2006.229.17:17:57.75#ibcon#wrote, iclass 16, count 2 2006.229.17:17:57.75#ibcon#about to read 3, iclass 16, count 2 2006.229.17:17:57.78#ibcon#read 3, iclass 16, count 2 2006.229.17:17:57.78#ibcon#about to read 4, iclass 16, count 2 2006.229.17:17:57.78#ibcon#read 4, iclass 16, count 2 2006.229.17:17:57.78#ibcon#about to read 5, iclass 16, count 2 2006.229.17:17:57.78#ibcon#read 5, iclass 16, count 2 2006.229.17:17:57.78#ibcon#about to read 6, iclass 16, count 2 2006.229.17:17:57.78#ibcon#read 6, iclass 16, count 2 2006.229.17:17:57.78#ibcon#end of sib2, iclass 16, count 2 2006.229.17:17:57.78#ibcon#*after write, iclass 16, count 2 2006.229.17:17:57.78#ibcon#*before return 0, iclass 16, count 2 2006.229.17:17:57.78#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:57.78#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:17:57.78#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.17:17:57.78#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:57.78#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:57.90#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:57.90#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:57.90#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:17:57.90#ibcon#first serial, iclass 16, count 0 2006.229.17:17:57.90#ibcon#enter sib2, iclass 16, count 0 2006.229.17:17:57.90#ibcon#flushed, iclass 16, count 0 2006.229.17:17:57.90#ibcon#about to write, iclass 16, count 0 2006.229.17:17:57.90#ibcon#wrote, iclass 16, count 0 2006.229.17:17:57.90#ibcon#about to read 3, iclass 16, count 0 2006.229.17:17:57.92#ibcon#read 3, iclass 16, count 0 2006.229.17:17:57.92#ibcon#about to read 4, iclass 16, count 0 2006.229.17:17:57.92#ibcon#read 4, iclass 16, count 0 2006.229.17:17:57.92#ibcon#about to read 5, iclass 16, count 0 2006.229.17:17:57.92#ibcon#read 5, iclass 16, count 0 2006.229.17:17:57.92#ibcon#about to read 6, iclass 16, count 0 2006.229.17:17:57.92#ibcon#read 6, iclass 16, count 0 2006.229.17:17:57.92#ibcon#end of sib2, iclass 16, count 0 2006.229.17:17:57.92#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:17:57.92#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:17:57.92#ibcon#[27=USB\r\n] 2006.229.17:17:57.92#ibcon#*before write, iclass 16, count 0 2006.229.17:17:57.92#ibcon#enter sib2, iclass 16, count 0 2006.229.17:17:57.92#ibcon#flushed, iclass 16, count 0 2006.229.17:17:57.92#ibcon#about to write, iclass 16, count 0 2006.229.17:17:57.92#ibcon#wrote, iclass 16, count 0 2006.229.17:17:57.92#ibcon#about to read 3, iclass 16, count 0 2006.229.17:17:57.95#ibcon#read 3, iclass 16, count 0 2006.229.17:17:57.95#ibcon#about to read 4, iclass 16, count 0 2006.229.17:17:57.95#ibcon#read 4, iclass 16, count 0 2006.229.17:17:57.95#ibcon#about to read 5, iclass 16, count 0 2006.229.17:17:57.95#ibcon#read 5, iclass 16, count 0 2006.229.17:17:57.95#ibcon#about to read 6, iclass 16, count 0 2006.229.17:17:57.95#ibcon#read 6, iclass 16, count 0 2006.229.17:17:57.95#ibcon#end of sib2, iclass 16, count 0 2006.229.17:17:57.95#ibcon#*after write, iclass 16, count 0 2006.229.17:17:57.95#ibcon#*before return 0, iclass 16, count 0 2006.229.17:17:57.95#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:57.95#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:17:57.95#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:17:57.95#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:17:57.95$vck44/vblo=7,734.99 2006.229.17:17:57.95#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.17:17:57.95#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.17:17:57.95#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:57.95#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:57.95#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:57.95#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:57.95#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:17:57.95#ibcon#first serial, iclass 18, count 0 2006.229.17:17:57.95#ibcon#enter sib2, iclass 18, count 0 2006.229.17:17:57.95#ibcon#flushed, iclass 18, count 0 2006.229.17:17:57.95#ibcon#about to write, iclass 18, count 0 2006.229.17:17:57.95#ibcon#wrote, iclass 18, count 0 2006.229.17:17:57.95#ibcon#about to read 3, iclass 18, count 0 2006.229.17:17:57.97#ibcon#read 3, iclass 18, count 0 2006.229.17:17:57.97#ibcon#about to read 4, iclass 18, count 0 2006.229.17:17:57.97#ibcon#read 4, iclass 18, count 0 2006.229.17:17:57.97#ibcon#about to read 5, iclass 18, count 0 2006.229.17:17:57.97#ibcon#read 5, iclass 18, count 0 2006.229.17:17:57.97#ibcon#about to read 6, iclass 18, count 0 2006.229.17:17:57.97#ibcon#read 6, iclass 18, count 0 2006.229.17:17:57.97#ibcon#end of sib2, iclass 18, count 0 2006.229.17:17:57.97#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:17:57.97#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:17:57.97#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:17:57.97#ibcon#*before write, iclass 18, count 0 2006.229.17:17:57.97#ibcon#enter sib2, iclass 18, count 0 2006.229.17:17:57.97#ibcon#flushed, iclass 18, count 0 2006.229.17:17:57.97#ibcon#about to write, iclass 18, count 0 2006.229.17:17:57.97#ibcon#wrote, iclass 18, count 0 2006.229.17:17:57.97#ibcon#about to read 3, iclass 18, count 0 2006.229.17:17:58.01#ibcon#read 3, iclass 18, count 0 2006.229.17:17:58.01#ibcon#about to read 4, iclass 18, count 0 2006.229.17:17:58.01#ibcon#read 4, iclass 18, count 0 2006.229.17:17:58.01#ibcon#about to read 5, iclass 18, count 0 2006.229.17:17:58.01#ibcon#read 5, iclass 18, count 0 2006.229.17:17:58.01#ibcon#about to read 6, iclass 18, count 0 2006.229.17:17:58.01#ibcon#read 6, iclass 18, count 0 2006.229.17:17:58.01#ibcon#end of sib2, iclass 18, count 0 2006.229.17:17:58.01#ibcon#*after write, iclass 18, count 0 2006.229.17:17:58.01#ibcon#*before return 0, iclass 18, count 0 2006.229.17:17:58.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:58.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:17:58.01#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:17:58.01#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:17:58.01$vck44/vb=7,4 2006.229.17:17:58.01#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.17:17:58.01#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.17:17:58.01#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:58.01#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:58.07#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:58.07#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:58.07#ibcon#enter wrdev, iclass 20, count 2 2006.229.17:17:58.07#ibcon#first serial, iclass 20, count 2 2006.229.17:17:58.07#ibcon#enter sib2, iclass 20, count 2 2006.229.17:17:58.07#ibcon#flushed, iclass 20, count 2 2006.229.17:17:58.07#ibcon#about to write, iclass 20, count 2 2006.229.17:17:58.07#ibcon#wrote, iclass 20, count 2 2006.229.17:17:58.07#ibcon#about to read 3, iclass 20, count 2 2006.229.17:17:58.09#ibcon#read 3, iclass 20, count 2 2006.229.17:17:58.09#ibcon#about to read 4, iclass 20, count 2 2006.229.17:17:58.09#ibcon#read 4, iclass 20, count 2 2006.229.17:17:58.09#ibcon#about to read 5, iclass 20, count 2 2006.229.17:17:58.09#ibcon#read 5, iclass 20, count 2 2006.229.17:17:58.09#ibcon#about to read 6, iclass 20, count 2 2006.229.17:17:58.09#ibcon#read 6, iclass 20, count 2 2006.229.17:17:58.09#ibcon#end of sib2, iclass 20, count 2 2006.229.17:17:58.09#ibcon#*mode == 0, iclass 20, count 2 2006.229.17:17:58.09#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.17:17:58.09#ibcon#[27=AT07-04\r\n] 2006.229.17:17:58.09#ibcon#*before write, iclass 20, count 2 2006.229.17:17:58.09#ibcon#enter sib2, iclass 20, count 2 2006.229.17:17:58.09#ibcon#flushed, iclass 20, count 2 2006.229.17:17:58.09#ibcon#about to write, iclass 20, count 2 2006.229.17:17:58.09#ibcon#wrote, iclass 20, count 2 2006.229.17:17:58.09#ibcon#about to read 3, iclass 20, count 2 2006.229.17:17:58.12#ibcon#read 3, iclass 20, count 2 2006.229.17:17:58.12#ibcon#about to read 4, iclass 20, count 2 2006.229.17:17:58.12#ibcon#read 4, iclass 20, count 2 2006.229.17:17:58.12#ibcon#about to read 5, iclass 20, count 2 2006.229.17:17:58.12#ibcon#read 5, iclass 20, count 2 2006.229.17:17:58.12#ibcon#about to read 6, iclass 20, count 2 2006.229.17:17:58.12#ibcon#read 6, iclass 20, count 2 2006.229.17:17:58.12#ibcon#end of sib2, iclass 20, count 2 2006.229.17:17:58.12#ibcon#*after write, iclass 20, count 2 2006.229.17:17:58.12#ibcon#*before return 0, iclass 20, count 2 2006.229.17:17:58.12#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:58.12#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:17:58.12#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.17:17:58.12#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:58.12#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:58.24#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:58.24#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:58.24#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:17:58.24#ibcon#first serial, iclass 20, count 0 2006.229.17:17:58.24#ibcon#enter sib2, iclass 20, count 0 2006.229.17:17:58.24#ibcon#flushed, iclass 20, count 0 2006.229.17:17:58.24#ibcon#about to write, iclass 20, count 0 2006.229.17:17:58.24#ibcon#wrote, iclass 20, count 0 2006.229.17:17:58.24#ibcon#about to read 3, iclass 20, count 0 2006.229.17:17:58.26#ibcon#read 3, iclass 20, count 0 2006.229.17:17:58.26#ibcon#about to read 4, iclass 20, count 0 2006.229.17:17:58.26#ibcon#read 4, iclass 20, count 0 2006.229.17:17:58.26#ibcon#about to read 5, iclass 20, count 0 2006.229.17:17:58.26#ibcon#read 5, iclass 20, count 0 2006.229.17:17:58.26#ibcon#about to read 6, iclass 20, count 0 2006.229.17:17:58.26#ibcon#read 6, iclass 20, count 0 2006.229.17:17:58.26#ibcon#end of sib2, iclass 20, count 0 2006.229.17:17:58.26#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:17:58.26#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:17:58.26#ibcon#[27=USB\r\n] 2006.229.17:17:58.26#ibcon#*before write, iclass 20, count 0 2006.229.17:17:58.26#ibcon#enter sib2, iclass 20, count 0 2006.229.17:17:58.26#ibcon#flushed, iclass 20, count 0 2006.229.17:17:58.26#ibcon#about to write, iclass 20, count 0 2006.229.17:17:58.26#ibcon#wrote, iclass 20, count 0 2006.229.17:17:58.26#ibcon#about to read 3, iclass 20, count 0 2006.229.17:17:58.29#ibcon#read 3, iclass 20, count 0 2006.229.17:17:58.29#ibcon#about to read 4, iclass 20, count 0 2006.229.17:17:58.29#ibcon#read 4, iclass 20, count 0 2006.229.17:17:58.29#ibcon#about to read 5, iclass 20, count 0 2006.229.17:17:58.29#ibcon#read 5, iclass 20, count 0 2006.229.17:17:58.29#ibcon#about to read 6, iclass 20, count 0 2006.229.17:17:58.29#ibcon#read 6, iclass 20, count 0 2006.229.17:17:58.29#ibcon#end of sib2, iclass 20, count 0 2006.229.17:17:58.29#ibcon#*after write, iclass 20, count 0 2006.229.17:17:58.29#ibcon#*before return 0, iclass 20, count 0 2006.229.17:17:58.29#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:58.29#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:17:58.29#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:17:58.29#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:17:58.29$vck44/vblo=8,744.99 2006.229.17:17:58.29#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:17:58.29#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:17:58.29#ibcon#ireg 17 cls_cnt 0 2006.229.17:17:58.29#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:58.29#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:58.29#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:58.29#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:17:58.29#ibcon#first serial, iclass 22, count 0 2006.229.17:17:58.29#ibcon#enter sib2, iclass 22, count 0 2006.229.17:17:58.29#ibcon#flushed, iclass 22, count 0 2006.229.17:17:58.29#ibcon#about to write, iclass 22, count 0 2006.229.17:17:58.29#ibcon#wrote, iclass 22, count 0 2006.229.17:17:58.29#ibcon#about to read 3, iclass 22, count 0 2006.229.17:17:58.31#ibcon#read 3, iclass 22, count 0 2006.229.17:17:58.31#ibcon#about to read 4, iclass 22, count 0 2006.229.17:17:58.31#ibcon#read 4, iclass 22, count 0 2006.229.17:17:58.31#ibcon#about to read 5, iclass 22, count 0 2006.229.17:17:58.31#ibcon#read 5, iclass 22, count 0 2006.229.17:17:58.31#ibcon#about to read 6, iclass 22, count 0 2006.229.17:17:58.31#ibcon#read 6, iclass 22, count 0 2006.229.17:17:58.31#ibcon#end of sib2, iclass 22, count 0 2006.229.17:17:58.31#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:17:58.31#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:17:58.31#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:17:58.31#ibcon#*before write, iclass 22, count 0 2006.229.17:17:58.31#ibcon#enter sib2, iclass 22, count 0 2006.229.17:17:58.31#ibcon#flushed, iclass 22, count 0 2006.229.17:17:58.31#ibcon#about to write, iclass 22, count 0 2006.229.17:17:58.31#ibcon#wrote, iclass 22, count 0 2006.229.17:17:58.31#ibcon#about to read 3, iclass 22, count 0 2006.229.17:17:58.35#ibcon#read 3, iclass 22, count 0 2006.229.17:17:58.35#ibcon#about to read 4, iclass 22, count 0 2006.229.17:17:58.35#ibcon#read 4, iclass 22, count 0 2006.229.17:17:58.35#ibcon#about to read 5, iclass 22, count 0 2006.229.17:17:58.35#ibcon#read 5, iclass 22, count 0 2006.229.17:17:58.35#ibcon#about to read 6, iclass 22, count 0 2006.229.17:17:58.35#ibcon#read 6, iclass 22, count 0 2006.229.17:17:58.35#ibcon#end of sib2, iclass 22, count 0 2006.229.17:17:58.35#ibcon#*after write, iclass 22, count 0 2006.229.17:17:58.35#ibcon#*before return 0, iclass 22, count 0 2006.229.17:17:58.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:58.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:17:58.35#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:17:58.35#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:17:58.35$vck44/vb=8,4 2006.229.17:17:58.35#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.17:17:58.35#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.17:17:58.35#ibcon#ireg 11 cls_cnt 2 2006.229.17:17:58.35#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:58.41#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:58.41#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:58.41#ibcon#enter wrdev, iclass 24, count 2 2006.229.17:17:58.41#ibcon#first serial, iclass 24, count 2 2006.229.17:17:58.41#ibcon#enter sib2, iclass 24, count 2 2006.229.17:17:58.41#ibcon#flushed, iclass 24, count 2 2006.229.17:17:58.41#ibcon#about to write, iclass 24, count 2 2006.229.17:17:58.41#ibcon#wrote, iclass 24, count 2 2006.229.17:17:58.41#ibcon#about to read 3, iclass 24, count 2 2006.229.17:17:58.43#ibcon#read 3, iclass 24, count 2 2006.229.17:17:58.43#ibcon#about to read 4, iclass 24, count 2 2006.229.17:17:58.43#ibcon#read 4, iclass 24, count 2 2006.229.17:17:58.43#ibcon#about to read 5, iclass 24, count 2 2006.229.17:17:58.43#ibcon#read 5, iclass 24, count 2 2006.229.17:17:58.43#ibcon#about to read 6, iclass 24, count 2 2006.229.17:17:58.43#ibcon#read 6, iclass 24, count 2 2006.229.17:17:58.43#ibcon#end of sib2, iclass 24, count 2 2006.229.17:17:58.43#ibcon#*mode == 0, iclass 24, count 2 2006.229.17:17:58.43#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.17:17:58.43#ibcon#[27=AT08-04\r\n] 2006.229.17:17:58.43#ibcon#*before write, iclass 24, count 2 2006.229.17:17:58.43#ibcon#enter sib2, iclass 24, count 2 2006.229.17:17:58.43#ibcon#flushed, iclass 24, count 2 2006.229.17:17:58.43#ibcon#about to write, iclass 24, count 2 2006.229.17:17:58.43#ibcon#wrote, iclass 24, count 2 2006.229.17:17:58.43#ibcon#about to read 3, iclass 24, count 2 2006.229.17:17:58.46#ibcon#read 3, iclass 24, count 2 2006.229.17:17:58.46#ibcon#about to read 4, iclass 24, count 2 2006.229.17:17:58.46#ibcon#read 4, iclass 24, count 2 2006.229.17:17:58.46#ibcon#about to read 5, iclass 24, count 2 2006.229.17:17:58.46#ibcon#read 5, iclass 24, count 2 2006.229.17:17:58.46#ibcon#about to read 6, iclass 24, count 2 2006.229.17:17:58.46#ibcon#read 6, iclass 24, count 2 2006.229.17:17:58.46#ibcon#end of sib2, iclass 24, count 2 2006.229.17:17:58.46#ibcon#*after write, iclass 24, count 2 2006.229.17:17:58.46#ibcon#*before return 0, iclass 24, count 2 2006.229.17:17:58.46#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:58.46#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:17:58.46#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.17:17:58.46#ibcon#ireg 7 cls_cnt 0 2006.229.17:17:58.46#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:58.58#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:58.58#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:58.58#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:17:58.58#ibcon#first serial, iclass 24, count 0 2006.229.17:17:58.58#ibcon#enter sib2, iclass 24, count 0 2006.229.17:17:58.58#ibcon#flushed, iclass 24, count 0 2006.229.17:17:58.58#ibcon#about to write, iclass 24, count 0 2006.229.17:17:58.58#ibcon#wrote, iclass 24, count 0 2006.229.17:17:58.58#ibcon#about to read 3, iclass 24, count 0 2006.229.17:17:58.60#ibcon#read 3, iclass 24, count 0 2006.229.17:17:58.60#ibcon#about to read 4, iclass 24, count 0 2006.229.17:17:58.60#ibcon#read 4, iclass 24, count 0 2006.229.17:17:58.60#ibcon#about to read 5, iclass 24, count 0 2006.229.17:17:58.60#ibcon#read 5, iclass 24, count 0 2006.229.17:17:58.60#ibcon#about to read 6, iclass 24, count 0 2006.229.17:17:58.60#ibcon#read 6, iclass 24, count 0 2006.229.17:17:58.60#ibcon#end of sib2, iclass 24, count 0 2006.229.17:17:58.60#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:17:58.60#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:17:58.60#ibcon#[27=USB\r\n] 2006.229.17:17:58.60#ibcon#*before write, iclass 24, count 0 2006.229.17:17:58.60#ibcon#enter sib2, iclass 24, count 0 2006.229.17:17:58.60#ibcon#flushed, iclass 24, count 0 2006.229.17:17:58.60#ibcon#about to write, iclass 24, count 0 2006.229.17:17:58.60#ibcon#wrote, iclass 24, count 0 2006.229.17:17:58.60#ibcon#about to read 3, iclass 24, count 0 2006.229.17:17:58.63#ibcon#read 3, iclass 24, count 0 2006.229.17:17:58.63#ibcon#about to read 4, iclass 24, count 0 2006.229.17:17:58.63#ibcon#read 4, iclass 24, count 0 2006.229.17:17:58.63#ibcon#about to read 5, iclass 24, count 0 2006.229.17:17:58.63#ibcon#read 5, iclass 24, count 0 2006.229.17:17:58.63#ibcon#about to read 6, iclass 24, count 0 2006.229.17:17:58.63#ibcon#read 6, iclass 24, count 0 2006.229.17:17:58.63#ibcon#end of sib2, iclass 24, count 0 2006.229.17:17:58.63#ibcon#*after write, iclass 24, count 0 2006.229.17:17:58.63#ibcon#*before return 0, iclass 24, count 0 2006.229.17:17:58.63#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:58.63#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:17:58.63#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:17:58.63#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:17:58.63$vck44/vabw=wide 2006.229.17:17:58.63#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.17:17:58.63#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.17:17:58.63#ibcon#ireg 8 cls_cnt 0 2006.229.17:17:58.63#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:17:58.63#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:17:58.63#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:17:58.63#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:17:58.63#ibcon#first serial, iclass 26, count 0 2006.229.17:17:58.63#ibcon#enter sib2, iclass 26, count 0 2006.229.17:17:58.63#ibcon#flushed, iclass 26, count 0 2006.229.17:17:58.63#ibcon#about to write, iclass 26, count 0 2006.229.17:17:58.63#ibcon#wrote, iclass 26, count 0 2006.229.17:17:58.63#ibcon#about to read 3, iclass 26, count 0 2006.229.17:17:58.65#ibcon#read 3, iclass 26, count 0 2006.229.17:17:58.65#ibcon#about to read 4, iclass 26, count 0 2006.229.17:17:58.65#ibcon#read 4, iclass 26, count 0 2006.229.17:17:58.65#ibcon#about to read 5, iclass 26, count 0 2006.229.17:17:58.65#ibcon#read 5, iclass 26, count 0 2006.229.17:17:58.65#ibcon#about to read 6, iclass 26, count 0 2006.229.17:17:58.65#ibcon#read 6, iclass 26, count 0 2006.229.17:17:58.65#ibcon#end of sib2, iclass 26, count 0 2006.229.17:17:58.65#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:17:58.65#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:17:58.65#ibcon#[25=BW32\r\n] 2006.229.17:17:58.65#ibcon#*before write, iclass 26, count 0 2006.229.17:17:58.65#ibcon#enter sib2, iclass 26, count 0 2006.229.17:17:58.65#ibcon#flushed, iclass 26, count 0 2006.229.17:17:58.65#ibcon#about to write, iclass 26, count 0 2006.229.17:17:58.65#ibcon#wrote, iclass 26, count 0 2006.229.17:17:58.65#ibcon#about to read 3, iclass 26, count 0 2006.229.17:17:58.68#ibcon#read 3, iclass 26, count 0 2006.229.17:17:58.68#ibcon#about to read 4, iclass 26, count 0 2006.229.17:17:58.68#ibcon#read 4, iclass 26, count 0 2006.229.17:17:58.68#ibcon#about to read 5, iclass 26, count 0 2006.229.17:17:58.68#ibcon#read 5, iclass 26, count 0 2006.229.17:17:58.68#ibcon#about to read 6, iclass 26, count 0 2006.229.17:17:58.68#ibcon#read 6, iclass 26, count 0 2006.229.17:17:58.68#ibcon#end of sib2, iclass 26, count 0 2006.229.17:17:58.68#ibcon#*after write, iclass 26, count 0 2006.229.17:17:58.68#ibcon#*before return 0, iclass 26, count 0 2006.229.17:17:58.68#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:17:58.68#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:17:58.68#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:17:58.68#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:17:58.68$vck44/vbbw=wide 2006.229.17:17:58.68#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.17:17:58.68#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.17:17:58.68#ibcon#ireg 8 cls_cnt 0 2006.229.17:17:58.68#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:17:58.75#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:17:58.75#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:17:58.75#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:17:58.75#ibcon#first serial, iclass 28, count 0 2006.229.17:17:58.75#ibcon#enter sib2, iclass 28, count 0 2006.229.17:17:58.75#ibcon#flushed, iclass 28, count 0 2006.229.17:17:58.75#ibcon#about to write, iclass 28, count 0 2006.229.17:17:58.75#ibcon#wrote, iclass 28, count 0 2006.229.17:17:58.75#ibcon#about to read 3, iclass 28, count 0 2006.229.17:17:58.77#ibcon#read 3, iclass 28, count 0 2006.229.17:17:58.77#ibcon#about to read 4, iclass 28, count 0 2006.229.17:17:58.77#ibcon#read 4, iclass 28, count 0 2006.229.17:17:58.77#ibcon#about to read 5, iclass 28, count 0 2006.229.17:17:58.77#ibcon#read 5, iclass 28, count 0 2006.229.17:17:58.77#ibcon#about to read 6, iclass 28, count 0 2006.229.17:17:58.77#ibcon#read 6, iclass 28, count 0 2006.229.17:17:58.77#ibcon#end of sib2, iclass 28, count 0 2006.229.17:17:58.77#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:17:58.77#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:17:58.77#ibcon#[27=BW32\r\n] 2006.229.17:17:58.77#ibcon#*before write, iclass 28, count 0 2006.229.17:17:58.77#ibcon#enter sib2, iclass 28, count 0 2006.229.17:17:58.77#ibcon#flushed, iclass 28, count 0 2006.229.17:17:58.77#ibcon#about to write, iclass 28, count 0 2006.229.17:17:58.77#ibcon#wrote, iclass 28, count 0 2006.229.17:17:58.77#ibcon#about to read 3, iclass 28, count 0 2006.229.17:17:58.80#ibcon#read 3, iclass 28, count 0 2006.229.17:17:58.80#ibcon#about to read 4, iclass 28, count 0 2006.229.17:17:58.80#ibcon#read 4, iclass 28, count 0 2006.229.17:17:58.80#ibcon#about to read 5, iclass 28, count 0 2006.229.17:17:58.80#ibcon#read 5, iclass 28, count 0 2006.229.17:17:58.80#ibcon#about to read 6, iclass 28, count 0 2006.229.17:17:58.80#ibcon#read 6, iclass 28, count 0 2006.229.17:17:58.80#ibcon#end of sib2, iclass 28, count 0 2006.229.17:17:58.80#ibcon#*after write, iclass 28, count 0 2006.229.17:17:58.80#ibcon#*before return 0, iclass 28, count 0 2006.229.17:17:58.80#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:17:58.80#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:17:58.80#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:17:58.80#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:17:58.80$setupk4/ifdk4 2006.229.17:17:58.80$ifdk4/lo= 2006.229.17:17:58.80$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:17:58.80$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:17:58.80$ifdk4/patch= 2006.229.17:17:58.80$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:17:58.80$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:17:58.80$setupk4/!*+20s 2006.229.17:18:05.98#abcon#<5=/07 1.6 3.1 27.011001001.6\r\n> 2006.229.17:18:06.00#abcon#{5=INTERFACE CLEAR} 2006.229.17:18:06.06#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:18:13.25$setupk4/"tpicd 2006.229.17:18:13.25$setupk4/echo=off 2006.229.17:18:13.25$setupk4/xlog=off 2006.229.17:18:13.25:!2006.229.17:26:16 2006.229.17:19:02.14#trakl#Source acquired 2006.229.17:19:03.14#flagr#flagr/antenna,acquired 2006.229.17:26:16.00:preob 2006.229.17:26:16.14/onsource/TRACKING 2006.229.17:26:16.14:!2006.229.17:26:26 2006.229.17:26:26.00:"tape 2006.229.17:26:26.00:"st=record 2006.229.17:26:26.00:data_valid=on 2006.229.17:26:26.00:midob 2006.229.17:26:27.14/onsource/TRACKING 2006.229.17:26:27.14/wx/26.98,1001.6,100 2006.229.17:26:27.23/cable/+6.4162E-03 2006.229.17:26:28.32/va/01,08,usb,yes,34,37 2006.229.17:26:28.32/va/02,07,usb,yes,37,38 2006.229.17:26:28.32/va/03,06,usb,yes,46,48 2006.229.17:26:28.32/va/04,07,usb,yes,38,40 2006.229.17:26:28.32/va/05,04,usb,yes,34,35 2006.229.17:26:28.32/va/06,04,usb,yes,38,38 2006.229.17:26:28.32/va/07,05,usb,yes,34,35 2006.229.17:26:28.32/va/08,06,usb,yes,25,30 2006.229.17:26:28.55/valo/01,524.99,yes,locked 2006.229.17:26:28.55/valo/02,534.99,yes,locked 2006.229.17:26:28.55/valo/03,564.99,yes,locked 2006.229.17:26:28.55/valo/04,624.99,yes,locked 2006.229.17:26:28.55/valo/05,734.99,yes,locked 2006.229.17:26:28.55/valo/06,814.99,yes,locked 2006.229.17:26:28.55/valo/07,864.99,yes,locked 2006.229.17:26:28.55/valo/08,884.99,yes,locked 2006.229.17:26:29.64/vb/01,04,usb,yes,32,30 2006.229.17:26:29.64/vb/02,04,usb,yes,34,34 2006.229.17:26:29.64/vb/03,04,usb,yes,31,34 2006.229.17:26:29.64/vb/04,04,usb,yes,36,35 2006.229.17:26:29.64/vb/05,04,usb,yes,28,30 2006.229.17:26:29.64/vb/06,04,usb,yes,33,29 2006.229.17:26:29.64/vb/07,04,usb,yes,32,32 2006.229.17:26:29.64/vb/08,04,usb,yes,30,33 2006.229.17:26:29.88/vblo/01,629.99,yes,locked 2006.229.17:26:29.88/vblo/02,634.99,yes,locked 2006.229.17:26:29.88/vblo/03,649.99,yes,locked 2006.229.17:26:29.88/vblo/04,679.99,yes,locked 2006.229.17:26:29.88/vblo/05,709.99,yes,locked 2006.229.17:26:29.88/vblo/06,719.99,yes,locked 2006.229.17:26:29.88/vblo/07,734.99,yes,locked 2006.229.17:26:29.88/vblo/08,744.99,yes,locked 2006.229.17:26:30.03/vabw/8 2006.229.17:26:30.18/vbbw/8 2006.229.17:26:30.27/xfe/off,on,12.2 2006.229.17:26:30.66/ifatt/23,28,28,28 2006.229.17:26:31.07/fmout-gps/S +4.62E-07 2006.229.17:26:31.11:!2006.229.17:27:16 2006.229.17:27:16.00:data_valid=off 2006.229.17:27:16.00:"et 2006.229.17:27:16.00:!+3s 2006.229.17:27:19.01:"tape 2006.229.17:27:19.01:postob 2006.229.17:27:19.22/cable/+6.4155E-03 2006.229.17:27:19.22/wx/26.97,1001.6,100 2006.229.17:27:20.08/fmout-gps/S +4.63E-07 2006.229.17:27:20.08:scan_name=229-1730,jd0608,120 2006.229.17:27:20.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.17:27:21.14#flagr#flagr/antenna,new-source 2006.229.17:27:21.14:checkk5 2006.229.17:27:21.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:27:21.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:27:22.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:27:22.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:27:23.15/chk_obsdata//k5ts1/T2291726??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:27:23.56/chk_obsdata//k5ts2/T2291726??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:27:23.96/chk_obsdata//k5ts3/T2291726??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:27:24.36/chk_obsdata//k5ts4/T2291726??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.17:27:25.07/k5log//k5ts1_log_newline 2006.229.17:27:25.78/k5log//k5ts2_log_newline 2006.229.17:27:26.48/k5log//k5ts3_log_newline 2006.229.17:27:27.20/k5log//k5ts4_log_newline 2006.229.17:27:27.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:27:27.22:setupk4=1 2006.229.17:27:27.22$setupk4/echo=on 2006.229.17:27:27.22$setupk4/pcalon 2006.229.17:27:27.22$pcalon/"no phase cal control is implemented here 2006.229.17:27:27.22$setupk4/"tpicd=stop 2006.229.17:27:27.22$setupk4/"rec=synch_on 2006.229.17:27:27.22$setupk4/"rec_mode=128 2006.229.17:27:27.22$setupk4/!* 2006.229.17:27:27.22$setupk4/recpk4 2006.229.17:27:27.22$recpk4/recpatch= 2006.229.17:27:27.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:27:27.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:27:27.22$setupk4/vck44 2006.229.17:27:27.22$vck44/valo=1,524.99 2006.229.17:27:27.22#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:27:27.22#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:27:27.22#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:27.22#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:27.22#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:27.22#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:27.22#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:27:27.22#ibcon#first serial, iclass 3, count 0 2006.229.17:27:27.22#ibcon#enter sib2, iclass 3, count 0 2006.229.17:27:27.22#ibcon#flushed, iclass 3, count 0 2006.229.17:27:27.22#ibcon#about to write, iclass 3, count 0 2006.229.17:27:27.22#ibcon#wrote, iclass 3, count 0 2006.229.17:27:27.22#ibcon#about to read 3, iclass 3, count 0 2006.229.17:27:27.24#ibcon#read 3, iclass 3, count 0 2006.229.17:27:27.24#ibcon#about to read 4, iclass 3, count 0 2006.229.17:27:27.24#ibcon#read 4, iclass 3, count 0 2006.229.17:27:27.24#ibcon#about to read 5, iclass 3, count 0 2006.229.17:27:27.24#ibcon#read 5, iclass 3, count 0 2006.229.17:27:27.24#ibcon#about to read 6, iclass 3, count 0 2006.229.17:27:27.24#ibcon#read 6, iclass 3, count 0 2006.229.17:27:27.24#ibcon#end of sib2, iclass 3, count 0 2006.229.17:27:27.24#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:27:27.24#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:27:27.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:27:27.24#ibcon#*before write, iclass 3, count 0 2006.229.17:27:27.24#ibcon#enter sib2, iclass 3, count 0 2006.229.17:27:27.24#ibcon#flushed, iclass 3, count 0 2006.229.17:27:27.24#ibcon#about to write, iclass 3, count 0 2006.229.17:27:27.24#ibcon#wrote, iclass 3, count 0 2006.229.17:27:27.24#ibcon#about to read 3, iclass 3, count 0 2006.229.17:27:27.29#ibcon#read 3, iclass 3, count 0 2006.229.17:27:27.29#ibcon#about to read 4, iclass 3, count 0 2006.229.17:27:27.29#ibcon#read 4, iclass 3, count 0 2006.229.17:27:27.29#ibcon#about to read 5, iclass 3, count 0 2006.229.17:27:27.29#ibcon#read 5, iclass 3, count 0 2006.229.17:27:27.29#ibcon#about to read 6, iclass 3, count 0 2006.229.17:27:27.29#ibcon#read 6, iclass 3, count 0 2006.229.17:27:27.29#ibcon#end of sib2, iclass 3, count 0 2006.229.17:27:27.29#ibcon#*after write, iclass 3, count 0 2006.229.17:27:27.29#ibcon#*before return 0, iclass 3, count 0 2006.229.17:27:27.29#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:27.29#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:27.29#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:27:27.29#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:27:27.29$vck44/va=1,8 2006.229.17:27:27.29#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.17:27:27.29#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.17:27:27.29#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:27.29#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:27.29#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:27.29#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:27.29#ibcon#enter wrdev, iclass 5, count 2 2006.229.17:27:27.29#ibcon#first serial, iclass 5, count 2 2006.229.17:27:27.29#ibcon#enter sib2, iclass 5, count 2 2006.229.17:27:27.29#ibcon#flushed, iclass 5, count 2 2006.229.17:27:27.29#ibcon#about to write, iclass 5, count 2 2006.229.17:27:27.29#ibcon#wrote, iclass 5, count 2 2006.229.17:27:27.29#ibcon#about to read 3, iclass 5, count 2 2006.229.17:27:27.31#ibcon#read 3, iclass 5, count 2 2006.229.17:27:27.31#ibcon#about to read 4, iclass 5, count 2 2006.229.17:27:27.31#ibcon#read 4, iclass 5, count 2 2006.229.17:27:27.31#ibcon#about to read 5, iclass 5, count 2 2006.229.17:27:27.31#ibcon#read 5, iclass 5, count 2 2006.229.17:27:27.31#ibcon#about to read 6, iclass 5, count 2 2006.229.17:27:27.31#ibcon#read 6, iclass 5, count 2 2006.229.17:27:27.31#ibcon#end of sib2, iclass 5, count 2 2006.229.17:27:27.31#ibcon#*mode == 0, iclass 5, count 2 2006.229.17:27:27.31#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.17:27:27.31#ibcon#[25=AT01-08\r\n] 2006.229.17:27:27.31#ibcon#*before write, iclass 5, count 2 2006.229.17:27:27.31#ibcon#enter sib2, iclass 5, count 2 2006.229.17:27:27.31#ibcon#flushed, iclass 5, count 2 2006.229.17:27:27.31#ibcon#about to write, iclass 5, count 2 2006.229.17:27:27.31#ibcon#wrote, iclass 5, count 2 2006.229.17:27:27.31#ibcon#about to read 3, iclass 5, count 2 2006.229.17:27:27.34#ibcon#read 3, iclass 5, count 2 2006.229.17:27:27.34#ibcon#about to read 4, iclass 5, count 2 2006.229.17:27:27.34#ibcon#read 4, iclass 5, count 2 2006.229.17:27:27.34#ibcon#about to read 5, iclass 5, count 2 2006.229.17:27:27.34#ibcon#read 5, iclass 5, count 2 2006.229.17:27:27.34#ibcon#about to read 6, iclass 5, count 2 2006.229.17:27:27.34#ibcon#read 6, iclass 5, count 2 2006.229.17:27:27.34#ibcon#end of sib2, iclass 5, count 2 2006.229.17:27:27.34#ibcon#*after write, iclass 5, count 2 2006.229.17:27:27.34#ibcon#*before return 0, iclass 5, count 2 2006.229.17:27:27.34#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:27.34#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:27.34#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.17:27:27.34#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:27.34#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:27.46#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:27.46#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:27.46#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:27:27.46#ibcon#first serial, iclass 5, count 0 2006.229.17:27:27.46#ibcon#enter sib2, iclass 5, count 0 2006.229.17:27:27.46#ibcon#flushed, iclass 5, count 0 2006.229.17:27:27.46#ibcon#about to write, iclass 5, count 0 2006.229.17:27:27.46#ibcon#wrote, iclass 5, count 0 2006.229.17:27:27.46#ibcon#about to read 3, iclass 5, count 0 2006.229.17:27:27.48#ibcon#read 3, iclass 5, count 0 2006.229.17:27:27.48#ibcon#about to read 4, iclass 5, count 0 2006.229.17:27:27.48#ibcon#read 4, iclass 5, count 0 2006.229.17:27:27.48#ibcon#about to read 5, iclass 5, count 0 2006.229.17:27:27.48#ibcon#read 5, iclass 5, count 0 2006.229.17:27:27.48#ibcon#about to read 6, iclass 5, count 0 2006.229.17:27:27.48#ibcon#read 6, iclass 5, count 0 2006.229.17:27:27.48#ibcon#end of sib2, iclass 5, count 0 2006.229.17:27:27.48#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:27:27.48#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:27:27.48#ibcon#[25=USB\r\n] 2006.229.17:27:27.48#ibcon#*before write, iclass 5, count 0 2006.229.17:27:27.48#ibcon#enter sib2, iclass 5, count 0 2006.229.17:27:27.48#ibcon#flushed, iclass 5, count 0 2006.229.17:27:27.48#ibcon#about to write, iclass 5, count 0 2006.229.17:27:27.48#ibcon#wrote, iclass 5, count 0 2006.229.17:27:27.48#ibcon#about to read 3, iclass 5, count 0 2006.229.17:27:27.51#ibcon#read 3, iclass 5, count 0 2006.229.17:27:27.51#ibcon#about to read 4, iclass 5, count 0 2006.229.17:27:27.51#ibcon#read 4, iclass 5, count 0 2006.229.17:27:27.51#ibcon#about to read 5, iclass 5, count 0 2006.229.17:27:27.51#ibcon#read 5, iclass 5, count 0 2006.229.17:27:27.51#ibcon#about to read 6, iclass 5, count 0 2006.229.17:27:27.51#ibcon#read 6, iclass 5, count 0 2006.229.17:27:27.51#ibcon#end of sib2, iclass 5, count 0 2006.229.17:27:27.51#ibcon#*after write, iclass 5, count 0 2006.229.17:27:27.51#ibcon#*before return 0, iclass 5, count 0 2006.229.17:27:27.51#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:27.51#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:27.51#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:27:27.51#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:27:27.51$vck44/valo=2,534.99 2006.229.17:27:27.51#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.17:27:27.51#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.17:27:27.51#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:27.51#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:27.51#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:27.51#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:27.51#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:27:27.51#ibcon#first serial, iclass 7, count 0 2006.229.17:27:27.51#ibcon#enter sib2, iclass 7, count 0 2006.229.17:27:27.51#ibcon#flushed, iclass 7, count 0 2006.229.17:27:27.51#ibcon#about to write, iclass 7, count 0 2006.229.17:27:27.51#ibcon#wrote, iclass 7, count 0 2006.229.17:27:27.51#ibcon#about to read 3, iclass 7, count 0 2006.229.17:27:27.53#ibcon#read 3, iclass 7, count 0 2006.229.17:27:27.53#ibcon#about to read 4, iclass 7, count 0 2006.229.17:27:27.53#ibcon#read 4, iclass 7, count 0 2006.229.17:27:27.53#ibcon#about to read 5, iclass 7, count 0 2006.229.17:27:27.53#ibcon#read 5, iclass 7, count 0 2006.229.17:27:27.53#ibcon#about to read 6, iclass 7, count 0 2006.229.17:27:27.53#ibcon#read 6, iclass 7, count 0 2006.229.17:27:27.53#ibcon#end of sib2, iclass 7, count 0 2006.229.17:27:27.53#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:27:27.53#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:27:27.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:27:27.53#ibcon#*before write, iclass 7, count 0 2006.229.17:27:27.53#ibcon#enter sib2, iclass 7, count 0 2006.229.17:27:27.53#ibcon#flushed, iclass 7, count 0 2006.229.17:27:27.53#ibcon#about to write, iclass 7, count 0 2006.229.17:27:27.53#ibcon#wrote, iclass 7, count 0 2006.229.17:27:27.53#ibcon#about to read 3, iclass 7, count 0 2006.229.17:27:27.57#ibcon#read 3, iclass 7, count 0 2006.229.17:27:27.57#ibcon#about to read 4, iclass 7, count 0 2006.229.17:27:27.57#ibcon#read 4, iclass 7, count 0 2006.229.17:27:27.57#ibcon#about to read 5, iclass 7, count 0 2006.229.17:27:27.57#ibcon#read 5, iclass 7, count 0 2006.229.17:27:27.57#ibcon#about to read 6, iclass 7, count 0 2006.229.17:27:27.57#ibcon#read 6, iclass 7, count 0 2006.229.17:27:27.57#ibcon#end of sib2, iclass 7, count 0 2006.229.17:27:27.57#ibcon#*after write, iclass 7, count 0 2006.229.17:27:27.57#ibcon#*before return 0, iclass 7, count 0 2006.229.17:27:27.57#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:27.57#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:27.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:27:27.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:27:27.57$vck44/va=2,7 2006.229.17:27:27.57#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.17:27:27.57#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.17:27:27.57#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:27.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:27.63#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:27.63#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:27.63#ibcon#enter wrdev, iclass 11, count 2 2006.229.17:27:27.63#ibcon#first serial, iclass 11, count 2 2006.229.17:27:27.63#ibcon#enter sib2, iclass 11, count 2 2006.229.17:27:27.63#ibcon#flushed, iclass 11, count 2 2006.229.17:27:27.63#ibcon#about to write, iclass 11, count 2 2006.229.17:27:27.63#ibcon#wrote, iclass 11, count 2 2006.229.17:27:27.63#ibcon#about to read 3, iclass 11, count 2 2006.229.17:27:27.65#ibcon#read 3, iclass 11, count 2 2006.229.17:27:27.65#ibcon#about to read 4, iclass 11, count 2 2006.229.17:27:27.65#ibcon#read 4, iclass 11, count 2 2006.229.17:27:27.65#ibcon#about to read 5, iclass 11, count 2 2006.229.17:27:27.65#ibcon#read 5, iclass 11, count 2 2006.229.17:27:27.65#ibcon#about to read 6, iclass 11, count 2 2006.229.17:27:27.65#ibcon#read 6, iclass 11, count 2 2006.229.17:27:27.65#ibcon#end of sib2, iclass 11, count 2 2006.229.17:27:27.65#ibcon#*mode == 0, iclass 11, count 2 2006.229.17:27:27.65#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.17:27:27.65#ibcon#[25=AT02-07\r\n] 2006.229.17:27:27.65#ibcon#*before write, iclass 11, count 2 2006.229.17:27:27.65#ibcon#enter sib2, iclass 11, count 2 2006.229.17:27:27.65#ibcon#flushed, iclass 11, count 2 2006.229.17:27:27.65#ibcon#about to write, iclass 11, count 2 2006.229.17:27:27.65#ibcon#wrote, iclass 11, count 2 2006.229.17:27:27.65#ibcon#about to read 3, iclass 11, count 2 2006.229.17:27:27.68#ibcon#read 3, iclass 11, count 2 2006.229.17:27:27.68#ibcon#about to read 4, iclass 11, count 2 2006.229.17:27:27.68#ibcon#read 4, iclass 11, count 2 2006.229.17:27:27.68#ibcon#about to read 5, iclass 11, count 2 2006.229.17:27:27.68#ibcon#read 5, iclass 11, count 2 2006.229.17:27:27.68#ibcon#about to read 6, iclass 11, count 2 2006.229.17:27:27.68#ibcon#read 6, iclass 11, count 2 2006.229.17:27:27.68#ibcon#end of sib2, iclass 11, count 2 2006.229.17:27:27.68#ibcon#*after write, iclass 11, count 2 2006.229.17:27:27.68#ibcon#*before return 0, iclass 11, count 2 2006.229.17:27:27.68#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:27.68#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:27.68#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.17:27:27.68#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:27.68#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:27.80#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:27.80#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:27.80#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:27:27.80#ibcon#first serial, iclass 11, count 0 2006.229.17:27:27.80#ibcon#enter sib2, iclass 11, count 0 2006.229.17:27:27.80#ibcon#flushed, iclass 11, count 0 2006.229.17:27:27.80#ibcon#about to write, iclass 11, count 0 2006.229.17:27:27.80#ibcon#wrote, iclass 11, count 0 2006.229.17:27:27.80#ibcon#about to read 3, iclass 11, count 0 2006.229.17:27:27.82#ibcon#read 3, iclass 11, count 0 2006.229.17:27:27.82#ibcon#about to read 4, iclass 11, count 0 2006.229.17:27:27.82#ibcon#read 4, iclass 11, count 0 2006.229.17:27:27.82#ibcon#about to read 5, iclass 11, count 0 2006.229.17:27:27.82#ibcon#read 5, iclass 11, count 0 2006.229.17:27:27.82#ibcon#about to read 6, iclass 11, count 0 2006.229.17:27:27.82#ibcon#read 6, iclass 11, count 0 2006.229.17:27:27.82#ibcon#end of sib2, iclass 11, count 0 2006.229.17:27:27.82#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:27:27.82#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:27:27.82#ibcon#[25=USB\r\n] 2006.229.17:27:27.82#ibcon#*before write, iclass 11, count 0 2006.229.17:27:27.82#ibcon#enter sib2, iclass 11, count 0 2006.229.17:27:27.82#ibcon#flushed, iclass 11, count 0 2006.229.17:27:27.82#ibcon#about to write, iclass 11, count 0 2006.229.17:27:27.82#ibcon#wrote, iclass 11, count 0 2006.229.17:27:27.82#ibcon#about to read 3, iclass 11, count 0 2006.229.17:27:27.85#ibcon#read 3, iclass 11, count 0 2006.229.17:27:27.85#ibcon#about to read 4, iclass 11, count 0 2006.229.17:27:27.85#ibcon#read 4, iclass 11, count 0 2006.229.17:27:27.85#ibcon#about to read 5, iclass 11, count 0 2006.229.17:27:27.85#ibcon#read 5, iclass 11, count 0 2006.229.17:27:27.85#ibcon#about to read 6, iclass 11, count 0 2006.229.17:27:27.85#ibcon#read 6, iclass 11, count 0 2006.229.17:27:27.85#ibcon#end of sib2, iclass 11, count 0 2006.229.17:27:27.85#ibcon#*after write, iclass 11, count 0 2006.229.17:27:27.85#ibcon#*before return 0, iclass 11, count 0 2006.229.17:27:27.85#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:27.85#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:27.85#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:27:27.85#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:27:27.85$vck44/valo=3,564.99 2006.229.17:27:27.85#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.17:27:27.85#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.17:27:27.85#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:27.85#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:27.85#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:27.85#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:27.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:27:27.85#ibcon#first serial, iclass 13, count 0 2006.229.17:27:27.85#ibcon#enter sib2, iclass 13, count 0 2006.229.17:27:27.85#ibcon#flushed, iclass 13, count 0 2006.229.17:27:27.85#ibcon#about to write, iclass 13, count 0 2006.229.17:27:27.85#ibcon#wrote, iclass 13, count 0 2006.229.17:27:27.85#ibcon#about to read 3, iclass 13, count 0 2006.229.17:27:27.87#ibcon#read 3, iclass 13, count 0 2006.229.17:27:27.87#ibcon#about to read 4, iclass 13, count 0 2006.229.17:27:27.87#ibcon#read 4, iclass 13, count 0 2006.229.17:27:27.87#ibcon#about to read 5, iclass 13, count 0 2006.229.17:27:27.87#ibcon#read 5, iclass 13, count 0 2006.229.17:27:27.87#ibcon#about to read 6, iclass 13, count 0 2006.229.17:27:27.87#ibcon#read 6, iclass 13, count 0 2006.229.17:27:27.87#ibcon#end of sib2, iclass 13, count 0 2006.229.17:27:27.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:27:27.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:27:27.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:27:27.87#ibcon#*before write, iclass 13, count 0 2006.229.17:27:27.87#ibcon#enter sib2, iclass 13, count 0 2006.229.17:27:27.87#ibcon#flushed, iclass 13, count 0 2006.229.17:27:27.87#ibcon#about to write, iclass 13, count 0 2006.229.17:27:27.87#ibcon#wrote, iclass 13, count 0 2006.229.17:27:27.87#ibcon#about to read 3, iclass 13, count 0 2006.229.17:27:27.91#ibcon#read 3, iclass 13, count 0 2006.229.17:27:27.91#ibcon#about to read 4, iclass 13, count 0 2006.229.17:27:27.91#ibcon#read 4, iclass 13, count 0 2006.229.17:27:27.91#ibcon#about to read 5, iclass 13, count 0 2006.229.17:27:27.91#ibcon#read 5, iclass 13, count 0 2006.229.17:27:27.91#ibcon#about to read 6, iclass 13, count 0 2006.229.17:27:27.91#ibcon#read 6, iclass 13, count 0 2006.229.17:27:27.91#ibcon#end of sib2, iclass 13, count 0 2006.229.17:27:27.91#ibcon#*after write, iclass 13, count 0 2006.229.17:27:27.91#ibcon#*before return 0, iclass 13, count 0 2006.229.17:27:27.91#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:27.91#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:27.91#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:27:27.91#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:27:27.91$vck44/va=3,6 2006.229.17:27:27.91#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.17:27:27.91#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.17:27:27.91#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:27.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:27.97#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:27.97#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:27.97#ibcon#enter wrdev, iclass 15, count 2 2006.229.17:27:27.97#ibcon#first serial, iclass 15, count 2 2006.229.17:27:27.97#ibcon#enter sib2, iclass 15, count 2 2006.229.17:27:27.97#ibcon#flushed, iclass 15, count 2 2006.229.17:27:27.97#ibcon#about to write, iclass 15, count 2 2006.229.17:27:27.97#ibcon#wrote, iclass 15, count 2 2006.229.17:27:27.97#ibcon#about to read 3, iclass 15, count 2 2006.229.17:27:27.99#ibcon#read 3, iclass 15, count 2 2006.229.17:27:27.99#ibcon#about to read 4, iclass 15, count 2 2006.229.17:27:27.99#ibcon#read 4, iclass 15, count 2 2006.229.17:27:27.99#ibcon#about to read 5, iclass 15, count 2 2006.229.17:27:27.99#ibcon#read 5, iclass 15, count 2 2006.229.17:27:27.99#ibcon#about to read 6, iclass 15, count 2 2006.229.17:27:27.99#ibcon#read 6, iclass 15, count 2 2006.229.17:27:27.99#ibcon#end of sib2, iclass 15, count 2 2006.229.17:27:27.99#ibcon#*mode == 0, iclass 15, count 2 2006.229.17:27:27.99#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.17:27:27.99#ibcon#[25=AT03-06\r\n] 2006.229.17:27:27.99#ibcon#*before write, iclass 15, count 2 2006.229.17:27:27.99#ibcon#enter sib2, iclass 15, count 2 2006.229.17:27:27.99#ibcon#flushed, iclass 15, count 2 2006.229.17:27:27.99#ibcon#about to write, iclass 15, count 2 2006.229.17:27:27.99#ibcon#wrote, iclass 15, count 2 2006.229.17:27:27.99#ibcon#about to read 3, iclass 15, count 2 2006.229.17:27:28.02#ibcon#read 3, iclass 15, count 2 2006.229.17:27:28.02#ibcon#about to read 4, iclass 15, count 2 2006.229.17:27:28.02#ibcon#read 4, iclass 15, count 2 2006.229.17:27:28.02#ibcon#about to read 5, iclass 15, count 2 2006.229.17:27:28.02#ibcon#read 5, iclass 15, count 2 2006.229.17:27:28.02#ibcon#about to read 6, iclass 15, count 2 2006.229.17:27:28.02#ibcon#read 6, iclass 15, count 2 2006.229.17:27:28.02#ibcon#end of sib2, iclass 15, count 2 2006.229.17:27:28.02#ibcon#*after write, iclass 15, count 2 2006.229.17:27:28.02#ibcon#*before return 0, iclass 15, count 2 2006.229.17:27:28.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:28.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:28.02#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.17:27:28.02#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:28.02#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:28.14#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:28.14#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:28.14#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:27:28.14#ibcon#first serial, iclass 15, count 0 2006.229.17:27:28.14#ibcon#enter sib2, iclass 15, count 0 2006.229.17:27:28.14#ibcon#flushed, iclass 15, count 0 2006.229.17:27:28.14#ibcon#about to write, iclass 15, count 0 2006.229.17:27:28.14#ibcon#wrote, iclass 15, count 0 2006.229.17:27:28.14#ibcon#about to read 3, iclass 15, count 0 2006.229.17:27:28.16#ibcon#read 3, iclass 15, count 0 2006.229.17:27:28.16#ibcon#about to read 4, iclass 15, count 0 2006.229.17:27:28.16#ibcon#read 4, iclass 15, count 0 2006.229.17:27:28.16#ibcon#about to read 5, iclass 15, count 0 2006.229.17:27:28.16#ibcon#read 5, iclass 15, count 0 2006.229.17:27:28.16#ibcon#about to read 6, iclass 15, count 0 2006.229.17:27:28.16#ibcon#read 6, iclass 15, count 0 2006.229.17:27:28.16#ibcon#end of sib2, iclass 15, count 0 2006.229.17:27:28.16#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:27:28.16#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:27:28.16#ibcon#[25=USB\r\n] 2006.229.17:27:28.16#ibcon#*before write, iclass 15, count 0 2006.229.17:27:28.16#ibcon#enter sib2, iclass 15, count 0 2006.229.17:27:28.16#ibcon#flushed, iclass 15, count 0 2006.229.17:27:28.16#ibcon#about to write, iclass 15, count 0 2006.229.17:27:28.16#ibcon#wrote, iclass 15, count 0 2006.229.17:27:28.16#ibcon#about to read 3, iclass 15, count 0 2006.229.17:27:28.19#ibcon#read 3, iclass 15, count 0 2006.229.17:27:28.19#ibcon#about to read 4, iclass 15, count 0 2006.229.17:27:28.19#ibcon#read 4, iclass 15, count 0 2006.229.17:27:28.19#ibcon#about to read 5, iclass 15, count 0 2006.229.17:27:28.19#ibcon#read 5, iclass 15, count 0 2006.229.17:27:28.19#ibcon#about to read 6, iclass 15, count 0 2006.229.17:27:28.19#ibcon#read 6, iclass 15, count 0 2006.229.17:27:28.19#ibcon#end of sib2, iclass 15, count 0 2006.229.17:27:28.19#ibcon#*after write, iclass 15, count 0 2006.229.17:27:28.19#ibcon#*before return 0, iclass 15, count 0 2006.229.17:27:28.19#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:28.19#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:28.19#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:27:28.19#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:27:28.19$vck44/valo=4,624.99 2006.229.17:27:28.19#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.17:27:28.19#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.17:27:28.19#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:28.19#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:28.19#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:28.19#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:28.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:27:28.19#ibcon#first serial, iclass 17, count 0 2006.229.17:27:28.19#ibcon#enter sib2, iclass 17, count 0 2006.229.17:27:28.19#ibcon#flushed, iclass 17, count 0 2006.229.17:27:28.19#ibcon#about to write, iclass 17, count 0 2006.229.17:27:28.19#ibcon#wrote, iclass 17, count 0 2006.229.17:27:28.19#ibcon#about to read 3, iclass 17, count 0 2006.229.17:27:28.21#ibcon#read 3, iclass 17, count 0 2006.229.17:27:28.21#ibcon#about to read 4, iclass 17, count 0 2006.229.17:27:28.21#ibcon#read 4, iclass 17, count 0 2006.229.17:27:28.21#ibcon#about to read 5, iclass 17, count 0 2006.229.17:27:28.21#ibcon#read 5, iclass 17, count 0 2006.229.17:27:28.21#ibcon#about to read 6, iclass 17, count 0 2006.229.17:27:28.21#ibcon#read 6, iclass 17, count 0 2006.229.17:27:28.21#ibcon#end of sib2, iclass 17, count 0 2006.229.17:27:28.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:27:28.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:27:28.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:27:28.21#ibcon#*before write, iclass 17, count 0 2006.229.17:27:28.21#ibcon#enter sib2, iclass 17, count 0 2006.229.17:27:28.21#ibcon#flushed, iclass 17, count 0 2006.229.17:27:28.21#ibcon#about to write, iclass 17, count 0 2006.229.17:27:28.21#ibcon#wrote, iclass 17, count 0 2006.229.17:27:28.21#ibcon#about to read 3, iclass 17, count 0 2006.229.17:27:28.25#ibcon#read 3, iclass 17, count 0 2006.229.17:27:28.25#ibcon#about to read 4, iclass 17, count 0 2006.229.17:27:28.25#ibcon#read 4, iclass 17, count 0 2006.229.17:27:28.25#ibcon#about to read 5, iclass 17, count 0 2006.229.17:27:28.25#ibcon#read 5, iclass 17, count 0 2006.229.17:27:28.25#ibcon#about to read 6, iclass 17, count 0 2006.229.17:27:28.25#ibcon#read 6, iclass 17, count 0 2006.229.17:27:28.25#ibcon#end of sib2, iclass 17, count 0 2006.229.17:27:28.25#ibcon#*after write, iclass 17, count 0 2006.229.17:27:28.25#ibcon#*before return 0, iclass 17, count 0 2006.229.17:27:28.25#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:28.25#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:28.25#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:27:28.25#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:27:28.25$vck44/va=4,7 2006.229.17:27:28.25#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.17:27:28.25#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.17:27:28.25#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:28.25#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:28.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:28.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:28.31#ibcon#enter wrdev, iclass 19, count 2 2006.229.17:27:28.31#ibcon#first serial, iclass 19, count 2 2006.229.17:27:28.31#ibcon#enter sib2, iclass 19, count 2 2006.229.17:27:28.31#ibcon#flushed, iclass 19, count 2 2006.229.17:27:28.31#ibcon#about to write, iclass 19, count 2 2006.229.17:27:28.31#ibcon#wrote, iclass 19, count 2 2006.229.17:27:28.31#ibcon#about to read 3, iclass 19, count 2 2006.229.17:27:28.33#ibcon#read 3, iclass 19, count 2 2006.229.17:27:28.33#ibcon#about to read 4, iclass 19, count 2 2006.229.17:27:28.33#ibcon#read 4, iclass 19, count 2 2006.229.17:27:28.33#ibcon#about to read 5, iclass 19, count 2 2006.229.17:27:28.33#ibcon#read 5, iclass 19, count 2 2006.229.17:27:28.33#ibcon#about to read 6, iclass 19, count 2 2006.229.17:27:28.33#ibcon#read 6, iclass 19, count 2 2006.229.17:27:28.33#ibcon#end of sib2, iclass 19, count 2 2006.229.17:27:28.33#ibcon#*mode == 0, iclass 19, count 2 2006.229.17:27:28.33#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.17:27:28.33#ibcon#[25=AT04-07\r\n] 2006.229.17:27:28.33#ibcon#*before write, iclass 19, count 2 2006.229.17:27:28.33#ibcon#enter sib2, iclass 19, count 2 2006.229.17:27:28.33#ibcon#flushed, iclass 19, count 2 2006.229.17:27:28.33#ibcon#about to write, iclass 19, count 2 2006.229.17:27:28.33#ibcon#wrote, iclass 19, count 2 2006.229.17:27:28.33#ibcon#about to read 3, iclass 19, count 2 2006.229.17:27:28.36#ibcon#read 3, iclass 19, count 2 2006.229.17:27:28.36#ibcon#about to read 4, iclass 19, count 2 2006.229.17:27:28.36#ibcon#read 4, iclass 19, count 2 2006.229.17:27:28.36#ibcon#about to read 5, iclass 19, count 2 2006.229.17:27:28.36#ibcon#read 5, iclass 19, count 2 2006.229.17:27:28.36#ibcon#about to read 6, iclass 19, count 2 2006.229.17:27:28.36#ibcon#read 6, iclass 19, count 2 2006.229.17:27:28.36#ibcon#end of sib2, iclass 19, count 2 2006.229.17:27:28.36#ibcon#*after write, iclass 19, count 2 2006.229.17:27:28.36#ibcon#*before return 0, iclass 19, count 2 2006.229.17:27:28.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:28.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:28.36#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.17:27:28.36#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:28.36#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:28.48#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:28.48#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:28.48#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:27:28.48#ibcon#first serial, iclass 19, count 0 2006.229.17:27:28.48#ibcon#enter sib2, iclass 19, count 0 2006.229.17:27:28.48#ibcon#flushed, iclass 19, count 0 2006.229.17:27:28.48#ibcon#about to write, iclass 19, count 0 2006.229.17:27:28.48#ibcon#wrote, iclass 19, count 0 2006.229.17:27:28.48#ibcon#about to read 3, iclass 19, count 0 2006.229.17:27:28.50#ibcon#read 3, iclass 19, count 0 2006.229.17:27:28.50#ibcon#about to read 4, iclass 19, count 0 2006.229.17:27:28.50#ibcon#read 4, iclass 19, count 0 2006.229.17:27:28.50#ibcon#about to read 5, iclass 19, count 0 2006.229.17:27:28.50#ibcon#read 5, iclass 19, count 0 2006.229.17:27:28.50#ibcon#about to read 6, iclass 19, count 0 2006.229.17:27:28.50#ibcon#read 6, iclass 19, count 0 2006.229.17:27:28.50#ibcon#end of sib2, iclass 19, count 0 2006.229.17:27:28.50#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:27:28.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:27:28.50#ibcon#[25=USB\r\n] 2006.229.17:27:28.50#ibcon#*before write, iclass 19, count 0 2006.229.17:27:28.50#ibcon#enter sib2, iclass 19, count 0 2006.229.17:27:28.50#ibcon#flushed, iclass 19, count 0 2006.229.17:27:28.50#ibcon#about to write, iclass 19, count 0 2006.229.17:27:28.50#ibcon#wrote, iclass 19, count 0 2006.229.17:27:28.50#ibcon#about to read 3, iclass 19, count 0 2006.229.17:27:28.53#ibcon#read 3, iclass 19, count 0 2006.229.17:27:28.53#ibcon#about to read 4, iclass 19, count 0 2006.229.17:27:28.53#ibcon#read 4, iclass 19, count 0 2006.229.17:27:28.53#ibcon#about to read 5, iclass 19, count 0 2006.229.17:27:28.53#ibcon#read 5, iclass 19, count 0 2006.229.17:27:28.53#ibcon#about to read 6, iclass 19, count 0 2006.229.17:27:28.53#ibcon#read 6, iclass 19, count 0 2006.229.17:27:28.53#ibcon#end of sib2, iclass 19, count 0 2006.229.17:27:28.53#ibcon#*after write, iclass 19, count 0 2006.229.17:27:28.53#ibcon#*before return 0, iclass 19, count 0 2006.229.17:27:28.53#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:28.53#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:28.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:27:28.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:27:28.53$vck44/valo=5,734.99 2006.229.17:27:28.53#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.17:27:28.53#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.17:27:28.53#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:28.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:28.53#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:28.53#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:28.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:27:28.53#ibcon#first serial, iclass 21, count 0 2006.229.17:27:28.53#ibcon#enter sib2, iclass 21, count 0 2006.229.17:27:28.53#ibcon#flushed, iclass 21, count 0 2006.229.17:27:28.53#ibcon#about to write, iclass 21, count 0 2006.229.17:27:28.53#ibcon#wrote, iclass 21, count 0 2006.229.17:27:28.53#ibcon#about to read 3, iclass 21, count 0 2006.229.17:27:28.55#ibcon#read 3, iclass 21, count 0 2006.229.17:27:28.55#ibcon#about to read 4, iclass 21, count 0 2006.229.17:27:28.55#ibcon#read 4, iclass 21, count 0 2006.229.17:27:28.55#ibcon#about to read 5, iclass 21, count 0 2006.229.17:27:28.55#ibcon#read 5, iclass 21, count 0 2006.229.17:27:28.55#ibcon#about to read 6, iclass 21, count 0 2006.229.17:27:28.55#ibcon#read 6, iclass 21, count 0 2006.229.17:27:28.55#ibcon#end of sib2, iclass 21, count 0 2006.229.17:27:28.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:27:28.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:27:28.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:27:28.55#ibcon#*before write, iclass 21, count 0 2006.229.17:27:28.55#ibcon#enter sib2, iclass 21, count 0 2006.229.17:27:28.55#ibcon#flushed, iclass 21, count 0 2006.229.17:27:28.55#ibcon#about to write, iclass 21, count 0 2006.229.17:27:28.55#ibcon#wrote, iclass 21, count 0 2006.229.17:27:28.55#ibcon#about to read 3, iclass 21, count 0 2006.229.17:27:28.59#ibcon#read 3, iclass 21, count 0 2006.229.17:27:28.59#ibcon#about to read 4, iclass 21, count 0 2006.229.17:27:28.59#ibcon#read 4, iclass 21, count 0 2006.229.17:27:28.59#ibcon#about to read 5, iclass 21, count 0 2006.229.17:27:28.59#ibcon#read 5, iclass 21, count 0 2006.229.17:27:28.59#ibcon#about to read 6, iclass 21, count 0 2006.229.17:27:28.59#ibcon#read 6, iclass 21, count 0 2006.229.17:27:28.59#ibcon#end of sib2, iclass 21, count 0 2006.229.17:27:28.59#ibcon#*after write, iclass 21, count 0 2006.229.17:27:28.59#ibcon#*before return 0, iclass 21, count 0 2006.229.17:27:28.59#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:28.59#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:28.59#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:27:28.59#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:27:28.59$vck44/va=5,4 2006.229.17:27:28.59#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.17:27:28.59#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.17:27:28.59#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:28.59#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:28.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:28.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:28.65#ibcon#enter wrdev, iclass 23, count 2 2006.229.17:27:28.65#ibcon#first serial, iclass 23, count 2 2006.229.17:27:28.65#ibcon#enter sib2, iclass 23, count 2 2006.229.17:27:28.65#ibcon#flushed, iclass 23, count 2 2006.229.17:27:28.65#ibcon#about to write, iclass 23, count 2 2006.229.17:27:28.65#ibcon#wrote, iclass 23, count 2 2006.229.17:27:28.65#ibcon#about to read 3, iclass 23, count 2 2006.229.17:27:28.67#ibcon#read 3, iclass 23, count 2 2006.229.17:27:28.67#ibcon#about to read 4, iclass 23, count 2 2006.229.17:27:28.67#ibcon#read 4, iclass 23, count 2 2006.229.17:27:28.67#ibcon#about to read 5, iclass 23, count 2 2006.229.17:27:28.67#ibcon#read 5, iclass 23, count 2 2006.229.17:27:28.67#ibcon#about to read 6, iclass 23, count 2 2006.229.17:27:28.67#ibcon#read 6, iclass 23, count 2 2006.229.17:27:28.67#ibcon#end of sib2, iclass 23, count 2 2006.229.17:27:28.67#ibcon#*mode == 0, iclass 23, count 2 2006.229.17:27:28.67#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.17:27:28.67#ibcon#[25=AT05-04\r\n] 2006.229.17:27:28.67#ibcon#*before write, iclass 23, count 2 2006.229.17:27:28.67#ibcon#enter sib2, iclass 23, count 2 2006.229.17:27:28.67#ibcon#flushed, iclass 23, count 2 2006.229.17:27:28.67#ibcon#about to write, iclass 23, count 2 2006.229.17:27:28.67#ibcon#wrote, iclass 23, count 2 2006.229.17:27:28.67#ibcon#about to read 3, iclass 23, count 2 2006.229.17:27:28.70#ibcon#read 3, iclass 23, count 2 2006.229.17:27:28.70#ibcon#about to read 4, iclass 23, count 2 2006.229.17:27:28.70#ibcon#read 4, iclass 23, count 2 2006.229.17:27:28.70#ibcon#about to read 5, iclass 23, count 2 2006.229.17:27:28.70#ibcon#read 5, iclass 23, count 2 2006.229.17:27:28.70#ibcon#about to read 6, iclass 23, count 2 2006.229.17:27:28.70#ibcon#read 6, iclass 23, count 2 2006.229.17:27:28.70#ibcon#end of sib2, iclass 23, count 2 2006.229.17:27:28.70#ibcon#*after write, iclass 23, count 2 2006.229.17:27:28.70#ibcon#*before return 0, iclass 23, count 2 2006.229.17:27:28.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:28.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:28.70#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.17:27:28.70#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:28.70#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:28.82#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:28.82#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:28.82#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:27:28.82#ibcon#first serial, iclass 23, count 0 2006.229.17:27:28.82#ibcon#enter sib2, iclass 23, count 0 2006.229.17:27:28.82#ibcon#flushed, iclass 23, count 0 2006.229.17:27:28.82#ibcon#about to write, iclass 23, count 0 2006.229.17:27:28.82#ibcon#wrote, iclass 23, count 0 2006.229.17:27:28.82#ibcon#about to read 3, iclass 23, count 0 2006.229.17:27:28.84#ibcon#read 3, iclass 23, count 0 2006.229.17:27:28.84#ibcon#about to read 4, iclass 23, count 0 2006.229.17:27:28.84#ibcon#read 4, iclass 23, count 0 2006.229.17:27:28.84#ibcon#about to read 5, iclass 23, count 0 2006.229.17:27:28.84#ibcon#read 5, iclass 23, count 0 2006.229.17:27:28.84#ibcon#about to read 6, iclass 23, count 0 2006.229.17:27:28.84#ibcon#read 6, iclass 23, count 0 2006.229.17:27:28.84#ibcon#end of sib2, iclass 23, count 0 2006.229.17:27:28.84#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:27:28.84#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:27:28.84#ibcon#[25=USB\r\n] 2006.229.17:27:28.84#ibcon#*before write, iclass 23, count 0 2006.229.17:27:28.84#ibcon#enter sib2, iclass 23, count 0 2006.229.17:27:28.84#ibcon#flushed, iclass 23, count 0 2006.229.17:27:28.84#ibcon#about to write, iclass 23, count 0 2006.229.17:27:28.84#ibcon#wrote, iclass 23, count 0 2006.229.17:27:28.84#ibcon#about to read 3, iclass 23, count 0 2006.229.17:27:28.87#ibcon#read 3, iclass 23, count 0 2006.229.17:27:28.87#ibcon#about to read 4, iclass 23, count 0 2006.229.17:27:28.87#ibcon#read 4, iclass 23, count 0 2006.229.17:27:28.87#ibcon#about to read 5, iclass 23, count 0 2006.229.17:27:28.87#ibcon#read 5, iclass 23, count 0 2006.229.17:27:28.87#ibcon#about to read 6, iclass 23, count 0 2006.229.17:27:28.87#ibcon#read 6, iclass 23, count 0 2006.229.17:27:28.87#ibcon#end of sib2, iclass 23, count 0 2006.229.17:27:28.87#ibcon#*after write, iclass 23, count 0 2006.229.17:27:28.87#ibcon#*before return 0, iclass 23, count 0 2006.229.17:27:28.87#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:28.87#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:28.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:27:28.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:27:28.87$vck44/valo=6,814.99 2006.229.17:27:28.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.17:27:28.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.17:27:28.87#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:28.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:28.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:28.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:28.87#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:27:28.87#ibcon#first serial, iclass 25, count 0 2006.229.17:27:28.87#ibcon#enter sib2, iclass 25, count 0 2006.229.17:27:28.87#ibcon#flushed, iclass 25, count 0 2006.229.17:27:28.87#ibcon#about to write, iclass 25, count 0 2006.229.17:27:28.87#ibcon#wrote, iclass 25, count 0 2006.229.17:27:28.87#ibcon#about to read 3, iclass 25, count 0 2006.229.17:27:28.89#ibcon#read 3, iclass 25, count 0 2006.229.17:27:28.89#ibcon#about to read 4, iclass 25, count 0 2006.229.17:27:28.89#ibcon#read 4, iclass 25, count 0 2006.229.17:27:28.89#ibcon#about to read 5, iclass 25, count 0 2006.229.17:27:28.89#ibcon#read 5, iclass 25, count 0 2006.229.17:27:28.89#ibcon#about to read 6, iclass 25, count 0 2006.229.17:27:28.89#ibcon#read 6, iclass 25, count 0 2006.229.17:27:28.89#ibcon#end of sib2, iclass 25, count 0 2006.229.17:27:28.89#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:27:28.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:27:28.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:27:28.89#ibcon#*before write, iclass 25, count 0 2006.229.17:27:28.89#ibcon#enter sib2, iclass 25, count 0 2006.229.17:27:28.89#ibcon#flushed, iclass 25, count 0 2006.229.17:27:28.89#ibcon#about to write, iclass 25, count 0 2006.229.17:27:28.89#ibcon#wrote, iclass 25, count 0 2006.229.17:27:28.89#ibcon#about to read 3, iclass 25, count 0 2006.229.17:27:28.93#ibcon#read 3, iclass 25, count 0 2006.229.17:27:28.93#ibcon#about to read 4, iclass 25, count 0 2006.229.17:27:28.93#ibcon#read 4, iclass 25, count 0 2006.229.17:27:28.93#ibcon#about to read 5, iclass 25, count 0 2006.229.17:27:28.93#ibcon#read 5, iclass 25, count 0 2006.229.17:27:28.93#ibcon#about to read 6, iclass 25, count 0 2006.229.17:27:28.93#ibcon#read 6, iclass 25, count 0 2006.229.17:27:28.93#ibcon#end of sib2, iclass 25, count 0 2006.229.17:27:28.93#ibcon#*after write, iclass 25, count 0 2006.229.17:27:28.93#ibcon#*before return 0, iclass 25, count 0 2006.229.17:27:28.93#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:28.93#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:28.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:27:28.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:27:28.93$vck44/va=6,4 2006.229.17:27:28.93#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.17:27:28.93#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.17:27:28.93#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:28.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:28.99#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:28.99#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:28.99#ibcon#enter wrdev, iclass 27, count 2 2006.229.17:27:28.99#ibcon#first serial, iclass 27, count 2 2006.229.17:27:28.99#ibcon#enter sib2, iclass 27, count 2 2006.229.17:27:28.99#ibcon#flushed, iclass 27, count 2 2006.229.17:27:28.99#ibcon#about to write, iclass 27, count 2 2006.229.17:27:28.99#ibcon#wrote, iclass 27, count 2 2006.229.17:27:28.99#ibcon#about to read 3, iclass 27, count 2 2006.229.17:27:29.01#ibcon#read 3, iclass 27, count 2 2006.229.17:27:29.01#ibcon#about to read 4, iclass 27, count 2 2006.229.17:27:29.01#ibcon#read 4, iclass 27, count 2 2006.229.17:27:29.01#ibcon#about to read 5, iclass 27, count 2 2006.229.17:27:29.01#ibcon#read 5, iclass 27, count 2 2006.229.17:27:29.01#ibcon#about to read 6, iclass 27, count 2 2006.229.17:27:29.01#ibcon#read 6, iclass 27, count 2 2006.229.17:27:29.01#ibcon#end of sib2, iclass 27, count 2 2006.229.17:27:29.01#ibcon#*mode == 0, iclass 27, count 2 2006.229.17:27:29.01#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.17:27:29.01#ibcon#[25=AT06-04\r\n] 2006.229.17:27:29.01#ibcon#*before write, iclass 27, count 2 2006.229.17:27:29.01#ibcon#enter sib2, iclass 27, count 2 2006.229.17:27:29.01#ibcon#flushed, iclass 27, count 2 2006.229.17:27:29.01#ibcon#about to write, iclass 27, count 2 2006.229.17:27:29.01#ibcon#wrote, iclass 27, count 2 2006.229.17:27:29.01#ibcon#about to read 3, iclass 27, count 2 2006.229.17:27:29.04#ibcon#read 3, iclass 27, count 2 2006.229.17:27:29.04#ibcon#about to read 4, iclass 27, count 2 2006.229.17:27:29.04#ibcon#read 4, iclass 27, count 2 2006.229.17:27:29.04#ibcon#about to read 5, iclass 27, count 2 2006.229.17:27:29.04#ibcon#read 5, iclass 27, count 2 2006.229.17:27:29.04#ibcon#about to read 6, iclass 27, count 2 2006.229.17:27:29.04#ibcon#read 6, iclass 27, count 2 2006.229.17:27:29.04#ibcon#end of sib2, iclass 27, count 2 2006.229.17:27:29.04#ibcon#*after write, iclass 27, count 2 2006.229.17:27:29.04#ibcon#*before return 0, iclass 27, count 2 2006.229.17:27:29.04#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:29.04#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:29.04#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.17:27:29.04#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:29.04#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:29.16#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:29.16#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:29.16#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:27:29.16#ibcon#first serial, iclass 27, count 0 2006.229.17:27:29.16#ibcon#enter sib2, iclass 27, count 0 2006.229.17:27:29.16#ibcon#flushed, iclass 27, count 0 2006.229.17:27:29.16#ibcon#about to write, iclass 27, count 0 2006.229.17:27:29.16#ibcon#wrote, iclass 27, count 0 2006.229.17:27:29.16#ibcon#about to read 3, iclass 27, count 0 2006.229.17:27:29.18#ibcon#read 3, iclass 27, count 0 2006.229.17:27:29.18#ibcon#about to read 4, iclass 27, count 0 2006.229.17:27:29.18#ibcon#read 4, iclass 27, count 0 2006.229.17:27:29.18#ibcon#about to read 5, iclass 27, count 0 2006.229.17:27:29.18#ibcon#read 5, iclass 27, count 0 2006.229.17:27:29.18#ibcon#about to read 6, iclass 27, count 0 2006.229.17:27:29.18#ibcon#read 6, iclass 27, count 0 2006.229.17:27:29.18#ibcon#end of sib2, iclass 27, count 0 2006.229.17:27:29.18#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:27:29.18#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:27:29.18#ibcon#[25=USB\r\n] 2006.229.17:27:29.18#ibcon#*before write, iclass 27, count 0 2006.229.17:27:29.18#ibcon#enter sib2, iclass 27, count 0 2006.229.17:27:29.18#ibcon#flushed, iclass 27, count 0 2006.229.17:27:29.18#ibcon#about to write, iclass 27, count 0 2006.229.17:27:29.18#ibcon#wrote, iclass 27, count 0 2006.229.17:27:29.18#ibcon#about to read 3, iclass 27, count 0 2006.229.17:27:29.21#ibcon#read 3, iclass 27, count 0 2006.229.17:27:29.21#ibcon#about to read 4, iclass 27, count 0 2006.229.17:27:29.21#ibcon#read 4, iclass 27, count 0 2006.229.17:27:29.21#ibcon#about to read 5, iclass 27, count 0 2006.229.17:27:29.21#ibcon#read 5, iclass 27, count 0 2006.229.17:27:29.21#ibcon#about to read 6, iclass 27, count 0 2006.229.17:27:29.21#ibcon#read 6, iclass 27, count 0 2006.229.17:27:29.21#ibcon#end of sib2, iclass 27, count 0 2006.229.17:27:29.21#ibcon#*after write, iclass 27, count 0 2006.229.17:27:29.21#ibcon#*before return 0, iclass 27, count 0 2006.229.17:27:29.21#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:29.21#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:29.21#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:27:29.21#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:27:29.21$vck44/valo=7,864.99 2006.229.17:27:29.21#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:27:29.21#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:27:29.21#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:29.21#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:29.21#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:29.21#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:29.21#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:27:29.21#ibcon#first serial, iclass 29, count 0 2006.229.17:27:29.21#ibcon#enter sib2, iclass 29, count 0 2006.229.17:27:29.21#ibcon#flushed, iclass 29, count 0 2006.229.17:27:29.21#ibcon#about to write, iclass 29, count 0 2006.229.17:27:29.21#ibcon#wrote, iclass 29, count 0 2006.229.17:27:29.21#ibcon#about to read 3, iclass 29, count 0 2006.229.17:27:29.23#ibcon#read 3, iclass 29, count 0 2006.229.17:27:29.23#ibcon#about to read 4, iclass 29, count 0 2006.229.17:27:29.23#ibcon#read 4, iclass 29, count 0 2006.229.17:27:29.23#ibcon#about to read 5, iclass 29, count 0 2006.229.17:27:29.23#ibcon#read 5, iclass 29, count 0 2006.229.17:27:29.23#ibcon#about to read 6, iclass 29, count 0 2006.229.17:27:29.23#ibcon#read 6, iclass 29, count 0 2006.229.17:27:29.23#ibcon#end of sib2, iclass 29, count 0 2006.229.17:27:29.23#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:27:29.23#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:27:29.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:27:29.23#ibcon#*before write, iclass 29, count 0 2006.229.17:27:29.23#ibcon#enter sib2, iclass 29, count 0 2006.229.17:27:29.23#ibcon#flushed, iclass 29, count 0 2006.229.17:27:29.23#ibcon#about to write, iclass 29, count 0 2006.229.17:27:29.23#ibcon#wrote, iclass 29, count 0 2006.229.17:27:29.23#ibcon#about to read 3, iclass 29, count 0 2006.229.17:27:29.27#ibcon#read 3, iclass 29, count 0 2006.229.17:27:29.27#ibcon#about to read 4, iclass 29, count 0 2006.229.17:27:29.27#ibcon#read 4, iclass 29, count 0 2006.229.17:27:29.27#ibcon#about to read 5, iclass 29, count 0 2006.229.17:27:29.27#ibcon#read 5, iclass 29, count 0 2006.229.17:27:29.27#ibcon#about to read 6, iclass 29, count 0 2006.229.17:27:29.27#ibcon#read 6, iclass 29, count 0 2006.229.17:27:29.27#ibcon#end of sib2, iclass 29, count 0 2006.229.17:27:29.27#ibcon#*after write, iclass 29, count 0 2006.229.17:27:29.27#ibcon#*before return 0, iclass 29, count 0 2006.229.17:27:29.27#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:29.27#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:29.27#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:27:29.27#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:27:29.27$vck44/va=7,5 2006.229.17:27:29.27#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.17:27:29.27#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.17:27:29.27#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:29.27#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:29.33#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:29.33#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:29.33#ibcon#enter wrdev, iclass 31, count 2 2006.229.17:27:29.33#ibcon#first serial, iclass 31, count 2 2006.229.17:27:29.33#ibcon#enter sib2, iclass 31, count 2 2006.229.17:27:29.33#ibcon#flushed, iclass 31, count 2 2006.229.17:27:29.33#ibcon#about to write, iclass 31, count 2 2006.229.17:27:29.33#ibcon#wrote, iclass 31, count 2 2006.229.17:27:29.33#ibcon#about to read 3, iclass 31, count 2 2006.229.17:27:29.35#ibcon#read 3, iclass 31, count 2 2006.229.17:27:29.35#ibcon#about to read 4, iclass 31, count 2 2006.229.17:27:29.35#ibcon#read 4, iclass 31, count 2 2006.229.17:27:29.35#ibcon#about to read 5, iclass 31, count 2 2006.229.17:27:29.35#ibcon#read 5, iclass 31, count 2 2006.229.17:27:29.35#ibcon#about to read 6, iclass 31, count 2 2006.229.17:27:29.35#ibcon#read 6, iclass 31, count 2 2006.229.17:27:29.35#ibcon#end of sib2, iclass 31, count 2 2006.229.17:27:29.35#ibcon#*mode == 0, iclass 31, count 2 2006.229.17:27:29.35#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.17:27:29.35#ibcon#[25=AT07-05\r\n] 2006.229.17:27:29.35#ibcon#*before write, iclass 31, count 2 2006.229.17:27:29.35#ibcon#enter sib2, iclass 31, count 2 2006.229.17:27:29.35#ibcon#flushed, iclass 31, count 2 2006.229.17:27:29.35#ibcon#about to write, iclass 31, count 2 2006.229.17:27:29.35#ibcon#wrote, iclass 31, count 2 2006.229.17:27:29.35#ibcon#about to read 3, iclass 31, count 2 2006.229.17:27:29.38#ibcon#read 3, iclass 31, count 2 2006.229.17:27:29.38#ibcon#about to read 4, iclass 31, count 2 2006.229.17:27:29.38#ibcon#read 4, iclass 31, count 2 2006.229.17:27:29.38#ibcon#about to read 5, iclass 31, count 2 2006.229.17:27:29.38#ibcon#read 5, iclass 31, count 2 2006.229.17:27:29.38#ibcon#about to read 6, iclass 31, count 2 2006.229.17:27:29.38#ibcon#read 6, iclass 31, count 2 2006.229.17:27:29.38#ibcon#end of sib2, iclass 31, count 2 2006.229.17:27:29.38#ibcon#*after write, iclass 31, count 2 2006.229.17:27:29.38#ibcon#*before return 0, iclass 31, count 2 2006.229.17:27:29.38#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:29.38#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:29.38#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.17:27:29.38#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:29.38#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:29.50#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:29.50#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:29.50#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:27:29.50#ibcon#first serial, iclass 31, count 0 2006.229.17:27:29.50#ibcon#enter sib2, iclass 31, count 0 2006.229.17:27:29.50#ibcon#flushed, iclass 31, count 0 2006.229.17:27:29.50#ibcon#about to write, iclass 31, count 0 2006.229.17:27:29.50#ibcon#wrote, iclass 31, count 0 2006.229.17:27:29.50#ibcon#about to read 3, iclass 31, count 0 2006.229.17:27:29.52#ibcon#read 3, iclass 31, count 0 2006.229.17:27:29.52#ibcon#about to read 4, iclass 31, count 0 2006.229.17:27:29.52#ibcon#read 4, iclass 31, count 0 2006.229.17:27:29.52#ibcon#about to read 5, iclass 31, count 0 2006.229.17:27:29.52#ibcon#read 5, iclass 31, count 0 2006.229.17:27:29.52#ibcon#about to read 6, iclass 31, count 0 2006.229.17:27:29.52#ibcon#read 6, iclass 31, count 0 2006.229.17:27:29.52#ibcon#end of sib2, iclass 31, count 0 2006.229.17:27:29.52#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:27:29.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:27:29.52#ibcon#[25=USB\r\n] 2006.229.17:27:29.52#ibcon#*before write, iclass 31, count 0 2006.229.17:27:29.52#ibcon#enter sib2, iclass 31, count 0 2006.229.17:27:29.52#ibcon#flushed, iclass 31, count 0 2006.229.17:27:29.52#ibcon#about to write, iclass 31, count 0 2006.229.17:27:29.52#ibcon#wrote, iclass 31, count 0 2006.229.17:27:29.52#ibcon#about to read 3, iclass 31, count 0 2006.229.17:27:29.55#ibcon#read 3, iclass 31, count 0 2006.229.17:27:29.55#ibcon#about to read 4, iclass 31, count 0 2006.229.17:27:29.55#ibcon#read 4, iclass 31, count 0 2006.229.17:27:29.55#ibcon#about to read 5, iclass 31, count 0 2006.229.17:27:29.55#ibcon#read 5, iclass 31, count 0 2006.229.17:27:29.55#ibcon#about to read 6, iclass 31, count 0 2006.229.17:27:29.55#ibcon#read 6, iclass 31, count 0 2006.229.17:27:29.55#ibcon#end of sib2, iclass 31, count 0 2006.229.17:27:29.55#ibcon#*after write, iclass 31, count 0 2006.229.17:27:29.55#ibcon#*before return 0, iclass 31, count 0 2006.229.17:27:29.55#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:29.55#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:29.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:27:29.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:27:29.55$vck44/valo=8,884.99 2006.229.17:27:29.55#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.17:27:29.55#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.17:27:29.55#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:29.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:29.55#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:29.55#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:29.55#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:27:29.55#ibcon#first serial, iclass 33, count 0 2006.229.17:27:29.55#ibcon#enter sib2, iclass 33, count 0 2006.229.17:27:29.55#ibcon#flushed, iclass 33, count 0 2006.229.17:27:29.55#ibcon#about to write, iclass 33, count 0 2006.229.17:27:29.55#ibcon#wrote, iclass 33, count 0 2006.229.17:27:29.55#ibcon#about to read 3, iclass 33, count 0 2006.229.17:27:29.57#ibcon#read 3, iclass 33, count 0 2006.229.17:27:29.57#ibcon#about to read 4, iclass 33, count 0 2006.229.17:27:29.57#ibcon#read 4, iclass 33, count 0 2006.229.17:27:29.57#ibcon#about to read 5, iclass 33, count 0 2006.229.17:27:29.57#ibcon#read 5, iclass 33, count 0 2006.229.17:27:29.57#ibcon#about to read 6, iclass 33, count 0 2006.229.17:27:29.57#ibcon#read 6, iclass 33, count 0 2006.229.17:27:29.57#ibcon#end of sib2, iclass 33, count 0 2006.229.17:27:29.57#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:27:29.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:27:29.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:27:29.57#ibcon#*before write, iclass 33, count 0 2006.229.17:27:29.57#ibcon#enter sib2, iclass 33, count 0 2006.229.17:27:29.57#ibcon#flushed, iclass 33, count 0 2006.229.17:27:29.57#ibcon#about to write, iclass 33, count 0 2006.229.17:27:29.57#ibcon#wrote, iclass 33, count 0 2006.229.17:27:29.57#ibcon#about to read 3, iclass 33, count 0 2006.229.17:27:29.61#ibcon#read 3, iclass 33, count 0 2006.229.17:27:29.61#ibcon#about to read 4, iclass 33, count 0 2006.229.17:27:29.61#ibcon#read 4, iclass 33, count 0 2006.229.17:27:29.61#ibcon#about to read 5, iclass 33, count 0 2006.229.17:27:29.61#ibcon#read 5, iclass 33, count 0 2006.229.17:27:29.61#ibcon#about to read 6, iclass 33, count 0 2006.229.17:27:29.61#ibcon#read 6, iclass 33, count 0 2006.229.17:27:29.61#ibcon#end of sib2, iclass 33, count 0 2006.229.17:27:29.61#ibcon#*after write, iclass 33, count 0 2006.229.17:27:29.61#ibcon#*before return 0, iclass 33, count 0 2006.229.17:27:29.61#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:29.61#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:29.61#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:27:29.61#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:27:29.61$vck44/va=8,6 2006.229.17:27:29.61#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.17:27:29.61#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.17:27:29.61#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:29.61#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:27:29.67#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:27:29.67#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:27:29.67#ibcon#enter wrdev, iclass 35, count 2 2006.229.17:27:29.67#ibcon#first serial, iclass 35, count 2 2006.229.17:27:29.67#ibcon#enter sib2, iclass 35, count 2 2006.229.17:27:29.67#ibcon#flushed, iclass 35, count 2 2006.229.17:27:29.67#ibcon#about to write, iclass 35, count 2 2006.229.17:27:29.67#ibcon#wrote, iclass 35, count 2 2006.229.17:27:29.67#ibcon#about to read 3, iclass 35, count 2 2006.229.17:27:29.69#ibcon#read 3, iclass 35, count 2 2006.229.17:27:29.69#ibcon#about to read 4, iclass 35, count 2 2006.229.17:27:29.69#ibcon#read 4, iclass 35, count 2 2006.229.17:27:29.69#ibcon#about to read 5, iclass 35, count 2 2006.229.17:27:29.69#ibcon#read 5, iclass 35, count 2 2006.229.17:27:29.69#ibcon#about to read 6, iclass 35, count 2 2006.229.17:27:29.69#ibcon#read 6, iclass 35, count 2 2006.229.17:27:29.69#ibcon#end of sib2, iclass 35, count 2 2006.229.17:27:29.69#ibcon#*mode == 0, iclass 35, count 2 2006.229.17:27:29.69#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.17:27:29.69#ibcon#[25=AT08-06\r\n] 2006.229.17:27:29.69#ibcon#*before write, iclass 35, count 2 2006.229.17:27:29.69#ibcon#enter sib2, iclass 35, count 2 2006.229.17:27:29.69#ibcon#flushed, iclass 35, count 2 2006.229.17:27:29.69#ibcon#about to write, iclass 35, count 2 2006.229.17:27:29.69#ibcon#wrote, iclass 35, count 2 2006.229.17:27:29.69#ibcon#about to read 3, iclass 35, count 2 2006.229.17:27:29.72#ibcon#read 3, iclass 35, count 2 2006.229.17:27:29.72#ibcon#about to read 4, iclass 35, count 2 2006.229.17:27:29.72#ibcon#read 4, iclass 35, count 2 2006.229.17:27:29.72#ibcon#about to read 5, iclass 35, count 2 2006.229.17:27:29.72#ibcon#read 5, iclass 35, count 2 2006.229.17:27:29.72#ibcon#about to read 6, iclass 35, count 2 2006.229.17:27:29.72#ibcon#read 6, iclass 35, count 2 2006.229.17:27:29.72#ibcon#end of sib2, iclass 35, count 2 2006.229.17:27:29.72#ibcon#*after write, iclass 35, count 2 2006.229.17:27:29.72#ibcon#*before return 0, iclass 35, count 2 2006.229.17:27:29.72#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:27:29.72#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:27:29.72#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.17:27:29.72#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:29.72#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:27:29.84#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:27:29.84#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:27:29.84#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:27:29.84#ibcon#first serial, iclass 35, count 0 2006.229.17:27:29.84#ibcon#enter sib2, iclass 35, count 0 2006.229.17:27:29.84#ibcon#flushed, iclass 35, count 0 2006.229.17:27:29.84#ibcon#about to write, iclass 35, count 0 2006.229.17:27:29.84#ibcon#wrote, iclass 35, count 0 2006.229.17:27:29.84#ibcon#about to read 3, iclass 35, count 0 2006.229.17:27:29.86#ibcon#read 3, iclass 35, count 0 2006.229.17:27:29.86#ibcon#about to read 4, iclass 35, count 0 2006.229.17:27:29.86#ibcon#read 4, iclass 35, count 0 2006.229.17:27:29.86#ibcon#about to read 5, iclass 35, count 0 2006.229.17:27:29.86#ibcon#read 5, iclass 35, count 0 2006.229.17:27:29.86#ibcon#about to read 6, iclass 35, count 0 2006.229.17:27:29.86#ibcon#read 6, iclass 35, count 0 2006.229.17:27:29.86#ibcon#end of sib2, iclass 35, count 0 2006.229.17:27:29.86#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:27:29.86#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:27:29.86#ibcon#[25=USB\r\n] 2006.229.17:27:29.86#ibcon#*before write, iclass 35, count 0 2006.229.17:27:29.86#ibcon#enter sib2, iclass 35, count 0 2006.229.17:27:29.86#ibcon#flushed, iclass 35, count 0 2006.229.17:27:29.86#ibcon#about to write, iclass 35, count 0 2006.229.17:27:29.86#ibcon#wrote, iclass 35, count 0 2006.229.17:27:29.86#ibcon#about to read 3, iclass 35, count 0 2006.229.17:27:29.89#ibcon#read 3, iclass 35, count 0 2006.229.17:27:29.89#ibcon#about to read 4, iclass 35, count 0 2006.229.17:27:29.89#ibcon#read 4, iclass 35, count 0 2006.229.17:27:29.89#ibcon#about to read 5, iclass 35, count 0 2006.229.17:27:29.89#ibcon#read 5, iclass 35, count 0 2006.229.17:27:29.89#ibcon#about to read 6, iclass 35, count 0 2006.229.17:27:29.89#ibcon#read 6, iclass 35, count 0 2006.229.17:27:29.89#ibcon#end of sib2, iclass 35, count 0 2006.229.17:27:29.89#ibcon#*after write, iclass 35, count 0 2006.229.17:27:29.89#ibcon#*before return 0, iclass 35, count 0 2006.229.17:27:29.89#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:27:29.89#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:27:29.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:27:29.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:27:29.89$vck44/vblo=1,629.99 2006.229.17:27:29.89#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.17:27:29.89#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.17:27:29.89#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:29.89#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:27:29.89#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:27:29.89#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:27:29.89#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:27:29.89#ibcon#first serial, iclass 37, count 0 2006.229.17:27:29.89#ibcon#enter sib2, iclass 37, count 0 2006.229.17:27:29.89#ibcon#flushed, iclass 37, count 0 2006.229.17:27:29.89#ibcon#about to write, iclass 37, count 0 2006.229.17:27:29.89#ibcon#wrote, iclass 37, count 0 2006.229.17:27:29.89#ibcon#about to read 3, iclass 37, count 0 2006.229.17:27:29.91#ibcon#read 3, iclass 37, count 0 2006.229.17:27:29.91#ibcon#about to read 4, iclass 37, count 0 2006.229.17:27:29.91#ibcon#read 4, iclass 37, count 0 2006.229.17:27:29.91#ibcon#about to read 5, iclass 37, count 0 2006.229.17:27:29.91#ibcon#read 5, iclass 37, count 0 2006.229.17:27:29.91#ibcon#about to read 6, iclass 37, count 0 2006.229.17:27:29.91#ibcon#read 6, iclass 37, count 0 2006.229.17:27:29.91#ibcon#end of sib2, iclass 37, count 0 2006.229.17:27:29.91#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:27:29.91#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:27:29.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:27:29.91#ibcon#*before write, iclass 37, count 0 2006.229.17:27:29.91#ibcon#enter sib2, iclass 37, count 0 2006.229.17:27:29.91#ibcon#flushed, iclass 37, count 0 2006.229.17:27:29.91#ibcon#about to write, iclass 37, count 0 2006.229.17:27:29.91#ibcon#wrote, iclass 37, count 0 2006.229.17:27:29.91#ibcon#about to read 3, iclass 37, count 0 2006.229.17:27:29.95#ibcon#read 3, iclass 37, count 0 2006.229.17:27:29.95#ibcon#about to read 4, iclass 37, count 0 2006.229.17:27:29.95#ibcon#read 4, iclass 37, count 0 2006.229.17:27:29.95#ibcon#about to read 5, iclass 37, count 0 2006.229.17:27:29.95#ibcon#read 5, iclass 37, count 0 2006.229.17:27:29.95#ibcon#about to read 6, iclass 37, count 0 2006.229.17:27:29.95#ibcon#read 6, iclass 37, count 0 2006.229.17:27:29.95#ibcon#end of sib2, iclass 37, count 0 2006.229.17:27:29.95#ibcon#*after write, iclass 37, count 0 2006.229.17:27:29.95#ibcon#*before return 0, iclass 37, count 0 2006.229.17:27:29.95#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:27:29.95#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:27:29.95#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:27:29.95#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:27:29.95$vck44/vb=1,4 2006.229.17:27:29.95#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.17:27:29.95#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.17:27:29.95#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:29.95#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:27:29.95#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:27:29.95#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:27:29.95#ibcon#enter wrdev, iclass 39, count 2 2006.229.17:27:29.95#ibcon#first serial, iclass 39, count 2 2006.229.17:27:29.95#ibcon#enter sib2, iclass 39, count 2 2006.229.17:27:29.95#ibcon#flushed, iclass 39, count 2 2006.229.17:27:29.95#ibcon#about to write, iclass 39, count 2 2006.229.17:27:29.95#ibcon#wrote, iclass 39, count 2 2006.229.17:27:29.95#ibcon#about to read 3, iclass 39, count 2 2006.229.17:27:29.97#ibcon#read 3, iclass 39, count 2 2006.229.17:27:29.97#ibcon#about to read 4, iclass 39, count 2 2006.229.17:27:29.97#ibcon#read 4, iclass 39, count 2 2006.229.17:27:29.97#ibcon#about to read 5, iclass 39, count 2 2006.229.17:27:29.97#ibcon#read 5, iclass 39, count 2 2006.229.17:27:29.97#ibcon#about to read 6, iclass 39, count 2 2006.229.17:27:29.97#ibcon#read 6, iclass 39, count 2 2006.229.17:27:29.97#ibcon#end of sib2, iclass 39, count 2 2006.229.17:27:29.97#ibcon#*mode == 0, iclass 39, count 2 2006.229.17:27:29.97#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.17:27:29.97#ibcon#[27=AT01-04\r\n] 2006.229.17:27:29.97#ibcon#*before write, iclass 39, count 2 2006.229.17:27:29.97#ibcon#enter sib2, iclass 39, count 2 2006.229.17:27:29.97#ibcon#flushed, iclass 39, count 2 2006.229.17:27:29.97#ibcon#about to write, iclass 39, count 2 2006.229.17:27:29.97#ibcon#wrote, iclass 39, count 2 2006.229.17:27:29.97#ibcon#about to read 3, iclass 39, count 2 2006.229.17:27:30.00#ibcon#read 3, iclass 39, count 2 2006.229.17:27:30.00#ibcon#about to read 4, iclass 39, count 2 2006.229.17:27:30.00#ibcon#read 4, iclass 39, count 2 2006.229.17:27:30.00#ibcon#about to read 5, iclass 39, count 2 2006.229.17:27:30.00#ibcon#read 5, iclass 39, count 2 2006.229.17:27:30.00#ibcon#about to read 6, iclass 39, count 2 2006.229.17:27:30.00#ibcon#read 6, iclass 39, count 2 2006.229.17:27:30.00#ibcon#end of sib2, iclass 39, count 2 2006.229.17:27:30.00#ibcon#*after write, iclass 39, count 2 2006.229.17:27:30.00#ibcon#*before return 0, iclass 39, count 2 2006.229.17:27:30.00#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:27:30.00#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:27:30.00#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.17:27:30.00#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:30.00#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:27:30.12#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:27:30.12#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:27:30.12#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:27:30.12#ibcon#first serial, iclass 39, count 0 2006.229.17:27:30.12#ibcon#enter sib2, iclass 39, count 0 2006.229.17:27:30.12#ibcon#flushed, iclass 39, count 0 2006.229.17:27:30.12#ibcon#about to write, iclass 39, count 0 2006.229.17:27:30.12#ibcon#wrote, iclass 39, count 0 2006.229.17:27:30.12#ibcon#about to read 3, iclass 39, count 0 2006.229.17:27:30.14#ibcon#read 3, iclass 39, count 0 2006.229.17:27:30.14#ibcon#about to read 4, iclass 39, count 0 2006.229.17:27:30.14#ibcon#read 4, iclass 39, count 0 2006.229.17:27:30.14#ibcon#about to read 5, iclass 39, count 0 2006.229.17:27:30.14#ibcon#read 5, iclass 39, count 0 2006.229.17:27:30.14#ibcon#about to read 6, iclass 39, count 0 2006.229.17:27:30.14#ibcon#read 6, iclass 39, count 0 2006.229.17:27:30.14#ibcon#end of sib2, iclass 39, count 0 2006.229.17:27:30.14#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:27:30.14#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:27:30.14#ibcon#[27=USB\r\n] 2006.229.17:27:30.14#ibcon#*before write, iclass 39, count 0 2006.229.17:27:30.14#ibcon#enter sib2, iclass 39, count 0 2006.229.17:27:30.14#ibcon#flushed, iclass 39, count 0 2006.229.17:27:30.14#ibcon#about to write, iclass 39, count 0 2006.229.17:27:30.14#ibcon#wrote, iclass 39, count 0 2006.229.17:27:30.14#ibcon#about to read 3, iclass 39, count 0 2006.229.17:27:30.17#ibcon#read 3, iclass 39, count 0 2006.229.17:27:30.17#ibcon#about to read 4, iclass 39, count 0 2006.229.17:27:30.17#ibcon#read 4, iclass 39, count 0 2006.229.17:27:30.17#ibcon#about to read 5, iclass 39, count 0 2006.229.17:27:30.17#ibcon#read 5, iclass 39, count 0 2006.229.17:27:30.17#ibcon#about to read 6, iclass 39, count 0 2006.229.17:27:30.17#ibcon#read 6, iclass 39, count 0 2006.229.17:27:30.17#ibcon#end of sib2, iclass 39, count 0 2006.229.17:27:30.17#ibcon#*after write, iclass 39, count 0 2006.229.17:27:30.17#ibcon#*before return 0, iclass 39, count 0 2006.229.17:27:30.17#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:27:30.17#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:27:30.17#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:27:30.17#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:27:30.17$vck44/vblo=2,634.99 2006.229.17:27:30.17#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:27:30.17#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:27:30.17#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:30.17#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:30.17#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:30.17#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:30.17#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:27:30.17#ibcon#first serial, iclass 3, count 0 2006.229.17:27:30.17#ibcon#enter sib2, iclass 3, count 0 2006.229.17:27:30.17#ibcon#flushed, iclass 3, count 0 2006.229.17:27:30.17#ibcon#about to write, iclass 3, count 0 2006.229.17:27:30.17#ibcon#wrote, iclass 3, count 0 2006.229.17:27:30.17#ibcon#about to read 3, iclass 3, count 0 2006.229.17:27:30.19#ibcon#read 3, iclass 3, count 0 2006.229.17:27:30.19#ibcon#about to read 4, iclass 3, count 0 2006.229.17:27:30.19#ibcon#read 4, iclass 3, count 0 2006.229.17:27:30.19#ibcon#about to read 5, iclass 3, count 0 2006.229.17:27:30.19#ibcon#read 5, iclass 3, count 0 2006.229.17:27:30.19#ibcon#about to read 6, iclass 3, count 0 2006.229.17:27:30.19#ibcon#read 6, iclass 3, count 0 2006.229.17:27:30.19#ibcon#end of sib2, iclass 3, count 0 2006.229.17:27:30.19#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:27:30.19#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:27:30.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:27:30.19#ibcon#*before write, iclass 3, count 0 2006.229.17:27:30.19#ibcon#enter sib2, iclass 3, count 0 2006.229.17:27:30.19#ibcon#flushed, iclass 3, count 0 2006.229.17:27:30.19#ibcon#about to write, iclass 3, count 0 2006.229.17:27:30.19#ibcon#wrote, iclass 3, count 0 2006.229.17:27:30.19#ibcon#about to read 3, iclass 3, count 0 2006.229.17:27:30.23#ibcon#read 3, iclass 3, count 0 2006.229.17:27:30.23#ibcon#about to read 4, iclass 3, count 0 2006.229.17:27:30.23#ibcon#read 4, iclass 3, count 0 2006.229.17:27:30.23#ibcon#about to read 5, iclass 3, count 0 2006.229.17:27:30.23#ibcon#read 5, iclass 3, count 0 2006.229.17:27:30.23#ibcon#about to read 6, iclass 3, count 0 2006.229.17:27:30.23#ibcon#read 6, iclass 3, count 0 2006.229.17:27:30.23#ibcon#end of sib2, iclass 3, count 0 2006.229.17:27:30.23#ibcon#*after write, iclass 3, count 0 2006.229.17:27:30.23#ibcon#*before return 0, iclass 3, count 0 2006.229.17:27:30.23#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:30.23#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:27:30.23#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:27:30.23#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:27:30.23$vck44/vb=2,4 2006.229.17:27:30.23#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.17:27:30.23#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.17:27:30.23#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:30.23#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:30.29#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:30.29#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:30.29#ibcon#enter wrdev, iclass 5, count 2 2006.229.17:27:30.29#ibcon#first serial, iclass 5, count 2 2006.229.17:27:30.29#ibcon#enter sib2, iclass 5, count 2 2006.229.17:27:30.29#ibcon#flushed, iclass 5, count 2 2006.229.17:27:30.29#ibcon#about to write, iclass 5, count 2 2006.229.17:27:30.29#ibcon#wrote, iclass 5, count 2 2006.229.17:27:30.29#ibcon#about to read 3, iclass 5, count 2 2006.229.17:27:30.31#ibcon#read 3, iclass 5, count 2 2006.229.17:27:30.31#ibcon#about to read 4, iclass 5, count 2 2006.229.17:27:30.31#ibcon#read 4, iclass 5, count 2 2006.229.17:27:30.31#ibcon#about to read 5, iclass 5, count 2 2006.229.17:27:30.31#ibcon#read 5, iclass 5, count 2 2006.229.17:27:30.31#ibcon#about to read 6, iclass 5, count 2 2006.229.17:27:30.31#ibcon#read 6, iclass 5, count 2 2006.229.17:27:30.31#ibcon#end of sib2, iclass 5, count 2 2006.229.17:27:30.31#ibcon#*mode == 0, iclass 5, count 2 2006.229.17:27:30.31#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.17:27:30.31#ibcon#[27=AT02-04\r\n] 2006.229.17:27:30.31#ibcon#*before write, iclass 5, count 2 2006.229.17:27:30.31#ibcon#enter sib2, iclass 5, count 2 2006.229.17:27:30.31#ibcon#flushed, iclass 5, count 2 2006.229.17:27:30.31#ibcon#about to write, iclass 5, count 2 2006.229.17:27:30.31#ibcon#wrote, iclass 5, count 2 2006.229.17:27:30.31#ibcon#about to read 3, iclass 5, count 2 2006.229.17:27:30.34#ibcon#read 3, iclass 5, count 2 2006.229.17:27:30.34#ibcon#about to read 4, iclass 5, count 2 2006.229.17:27:30.34#ibcon#read 4, iclass 5, count 2 2006.229.17:27:30.34#ibcon#about to read 5, iclass 5, count 2 2006.229.17:27:30.34#ibcon#read 5, iclass 5, count 2 2006.229.17:27:30.34#ibcon#about to read 6, iclass 5, count 2 2006.229.17:27:30.34#ibcon#read 6, iclass 5, count 2 2006.229.17:27:30.34#ibcon#end of sib2, iclass 5, count 2 2006.229.17:27:30.34#ibcon#*after write, iclass 5, count 2 2006.229.17:27:30.34#ibcon#*before return 0, iclass 5, count 2 2006.229.17:27:30.34#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:30.34#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:27:30.34#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.17:27:30.34#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:30.34#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:30.46#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:30.46#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:30.46#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:27:30.46#ibcon#first serial, iclass 5, count 0 2006.229.17:27:30.46#ibcon#enter sib2, iclass 5, count 0 2006.229.17:27:30.46#ibcon#flushed, iclass 5, count 0 2006.229.17:27:30.46#ibcon#about to write, iclass 5, count 0 2006.229.17:27:30.46#ibcon#wrote, iclass 5, count 0 2006.229.17:27:30.46#ibcon#about to read 3, iclass 5, count 0 2006.229.17:27:30.48#ibcon#read 3, iclass 5, count 0 2006.229.17:27:30.48#ibcon#about to read 4, iclass 5, count 0 2006.229.17:27:30.48#ibcon#read 4, iclass 5, count 0 2006.229.17:27:30.48#ibcon#about to read 5, iclass 5, count 0 2006.229.17:27:30.48#ibcon#read 5, iclass 5, count 0 2006.229.17:27:30.48#ibcon#about to read 6, iclass 5, count 0 2006.229.17:27:30.48#ibcon#read 6, iclass 5, count 0 2006.229.17:27:30.48#ibcon#end of sib2, iclass 5, count 0 2006.229.17:27:30.48#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:27:30.48#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:27:30.48#ibcon#[27=USB\r\n] 2006.229.17:27:30.48#ibcon#*before write, iclass 5, count 0 2006.229.17:27:30.48#ibcon#enter sib2, iclass 5, count 0 2006.229.17:27:30.48#ibcon#flushed, iclass 5, count 0 2006.229.17:27:30.48#ibcon#about to write, iclass 5, count 0 2006.229.17:27:30.48#ibcon#wrote, iclass 5, count 0 2006.229.17:27:30.48#ibcon#about to read 3, iclass 5, count 0 2006.229.17:27:30.51#ibcon#read 3, iclass 5, count 0 2006.229.17:27:30.51#ibcon#about to read 4, iclass 5, count 0 2006.229.17:27:30.51#ibcon#read 4, iclass 5, count 0 2006.229.17:27:30.51#ibcon#about to read 5, iclass 5, count 0 2006.229.17:27:30.51#ibcon#read 5, iclass 5, count 0 2006.229.17:27:30.51#ibcon#about to read 6, iclass 5, count 0 2006.229.17:27:30.51#ibcon#read 6, iclass 5, count 0 2006.229.17:27:30.51#ibcon#end of sib2, iclass 5, count 0 2006.229.17:27:30.51#ibcon#*after write, iclass 5, count 0 2006.229.17:27:30.51#ibcon#*before return 0, iclass 5, count 0 2006.229.17:27:30.51#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:30.51#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:27:30.51#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:27:30.51#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:27:30.51$vck44/vblo=3,649.99 2006.229.17:27:30.51#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.17:27:30.51#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.17:27:30.51#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:30.51#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:30.51#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:30.51#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:30.51#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:27:30.51#ibcon#first serial, iclass 7, count 0 2006.229.17:27:30.51#ibcon#enter sib2, iclass 7, count 0 2006.229.17:27:30.51#ibcon#flushed, iclass 7, count 0 2006.229.17:27:30.51#ibcon#about to write, iclass 7, count 0 2006.229.17:27:30.51#ibcon#wrote, iclass 7, count 0 2006.229.17:27:30.51#ibcon#about to read 3, iclass 7, count 0 2006.229.17:27:30.53#ibcon#read 3, iclass 7, count 0 2006.229.17:27:30.53#ibcon#about to read 4, iclass 7, count 0 2006.229.17:27:30.53#ibcon#read 4, iclass 7, count 0 2006.229.17:27:30.53#ibcon#about to read 5, iclass 7, count 0 2006.229.17:27:30.53#ibcon#read 5, iclass 7, count 0 2006.229.17:27:30.53#ibcon#about to read 6, iclass 7, count 0 2006.229.17:27:30.53#ibcon#read 6, iclass 7, count 0 2006.229.17:27:30.53#ibcon#end of sib2, iclass 7, count 0 2006.229.17:27:30.53#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:27:30.53#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:27:30.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:27:30.53#ibcon#*before write, iclass 7, count 0 2006.229.17:27:30.53#ibcon#enter sib2, iclass 7, count 0 2006.229.17:27:30.53#ibcon#flushed, iclass 7, count 0 2006.229.17:27:30.53#ibcon#about to write, iclass 7, count 0 2006.229.17:27:30.53#ibcon#wrote, iclass 7, count 0 2006.229.17:27:30.53#ibcon#about to read 3, iclass 7, count 0 2006.229.17:27:30.57#ibcon#read 3, iclass 7, count 0 2006.229.17:27:30.57#ibcon#about to read 4, iclass 7, count 0 2006.229.17:27:30.57#ibcon#read 4, iclass 7, count 0 2006.229.17:27:30.57#ibcon#about to read 5, iclass 7, count 0 2006.229.17:27:30.57#ibcon#read 5, iclass 7, count 0 2006.229.17:27:30.57#ibcon#about to read 6, iclass 7, count 0 2006.229.17:27:30.57#ibcon#read 6, iclass 7, count 0 2006.229.17:27:30.57#ibcon#end of sib2, iclass 7, count 0 2006.229.17:27:30.57#ibcon#*after write, iclass 7, count 0 2006.229.17:27:30.57#ibcon#*before return 0, iclass 7, count 0 2006.229.17:27:30.57#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:30.57#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:27:30.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:27:30.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:27:30.57$vck44/vb=3,4 2006.229.17:27:30.57#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.17:27:30.57#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.17:27:30.57#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:30.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:30.63#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:30.63#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:30.63#ibcon#enter wrdev, iclass 11, count 2 2006.229.17:27:30.63#ibcon#first serial, iclass 11, count 2 2006.229.17:27:30.63#ibcon#enter sib2, iclass 11, count 2 2006.229.17:27:30.63#ibcon#flushed, iclass 11, count 2 2006.229.17:27:30.63#ibcon#about to write, iclass 11, count 2 2006.229.17:27:30.63#ibcon#wrote, iclass 11, count 2 2006.229.17:27:30.63#ibcon#about to read 3, iclass 11, count 2 2006.229.17:27:30.65#ibcon#read 3, iclass 11, count 2 2006.229.17:27:30.65#ibcon#about to read 4, iclass 11, count 2 2006.229.17:27:30.65#ibcon#read 4, iclass 11, count 2 2006.229.17:27:30.65#ibcon#about to read 5, iclass 11, count 2 2006.229.17:27:30.65#ibcon#read 5, iclass 11, count 2 2006.229.17:27:30.65#ibcon#about to read 6, iclass 11, count 2 2006.229.17:27:30.65#ibcon#read 6, iclass 11, count 2 2006.229.17:27:30.65#ibcon#end of sib2, iclass 11, count 2 2006.229.17:27:30.65#ibcon#*mode == 0, iclass 11, count 2 2006.229.17:27:30.65#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.17:27:30.65#ibcon#[27=AT03-04\r\n] 2006.229.17:27:30.65#ibcon#*before write, iclass 11, count 2 2006.229.17:27:30.65#ibcon#enter sib2, iclass 11, count 2 2006.229.17:27:30.65#ibcon#flushed, iclass 11, count 2 2006.229.17:27:30.65#ibcon#about to write, iclass 11, count 2 2006.229.17:27:30.65#ibcon#wrote, iclass 11, count 2 2006.229.17:27:30.65#ibcon#about to read 3, iclass 11, count 2 2006.229.17:27:30.68#ibcon#read 3, iclass 11, count 2 2006.229.17:27:30.68#ibcon#about to read 4, iclass 11, count 2 2006.229.17:27:30.68#ibcon#read 4, iclass 11, count 2 2006.229.17:27:30.68#ibcon#about to read 5, iclass 11, count 2 2006.229.17:27:30.68#ibcon#read 5, iclass 11, count 2 2006.229.17:27:30.68#ibcon#about to read 6, iclass 11, count 2 2006.229.17:27:30.68#ibcon#read 6, iclass 11, count 2 2006.229.17:27:30.68#ibcon#end of sib2, iclass 11, count 2 2006.229.17:27:30.68#ibcon#*after write, iclass 11, count 2 2006.229.17:27:30.68#ibcon#*before return 0, iclass 11, count 2 2006.229.17:27:30.68#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:30.68#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:27:30.68#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.17:27:30.68#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:30.68#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:30.80#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:30.80#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:30.80#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:27:30.80#ibcon#first serial, iclass 11, count 0 2006.229.17:27:30.80#ibcon#enter sib2, iclass 11, count 0 2006.229.17:27:30.80#ibcon#flushed, iclass 11, count 0 2006.229.17:27:30.80#ibcon#about to write, iclass 11, count 0 2006.229.17:27:30.80#ibcon#wrote, iclass 11, count 0 2006.229.17:27:30.80#ibcon#about to read 3, iclass 11, count 0 2006.229.17:27:30.82#ibcon#read 3, iclass 11, count 0 2006.229.17:27:30.82#ibcon#about to read 4, iclass 11, count 0 2006.229.17:27:30.82#ibcon#read 4, iclass 11, count 0 2006.229.17:27:30.82#ibcon#about to read 5, iclass 11, count 0 2006.229.17:27:30.82#ibcon#read 5, iclass 11, count 0 2006.229.17:27:30.82#ibcon#about to read 6, iclass 11, count 0 2006.229.17:27:30.82#ibcon#read 6, iclass 11, count 0 2006.229.17:27:30.82#ibcon#end of sib2, iclass 11, count 0 2006.229.17:27:30.82#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:27:30.82#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:27:30.82#ibcon#[27=USB\r\n] 2006.229.17:27:30.82#ibcon#*before write, iclass 11, count 0 2006.229.17:27:30.82#ibcon#enter sib2, iclass 11, count 0 2006.229.17:27:30.82#ibcon#flushed, iclass 11, count 0 2006.229.17:27:30.82#ibcon#about to write, iclass 11, count 0 2006.229.17:27:30.82#ibcon#wrote, iclass 11, count 0 2006.229.17:27:30.82#ibcon#about to read 3, iclass 11, count 0 2006.229.17:27:30.85#ibcon#read 3, iclass 11, count 0 2006.229.17:27:30.85#ibcon#about to read 4, iclass 11, count 0 2006.229.17:27:30.85#ibcon#read 4, iclass 11, count 0 2006.229.17:27:30.85#ibcon#about to read 5, iclass 11, count 0 2006.229.17:27:30.85#ibcon#read 5, iclass 11, count 0 2006.229.17:27:30.85#ibcon#about to read 6, iclass 11, count 0 2006.229.17:27:30.85#ibcon#read 6, iclass 11, count 0 2006.229.17:27:30.85#ibcon#end of sib2, iclass 11, count 0 2006.229.17:27:30.85#ibcon#*after write, iclass 11, count 0 2006.229.17:27:30.85#ibcon#*before return 0, iclass 11, count 0 2006.229.17:27:30.85#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:30.85#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:27:30.85#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:27:30.85#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:27:30.85$vck44/vblo=4,679.99 2006.229.17:27:30.85#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.17:27:30.85#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.17:27:30.85#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:30.85#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:30.85#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:30.85#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:30.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:27:30.85#ibcon#first serial, iclass 13, count 0 2006.229.17:27:30.85#ibcon#enter sib2, iclass 13, count 0 2006.229.17:27:30.85#ibcon#flushed, iclass 13, count 0 2006.229.17:27:30.85#ibcon#about to write, iclass 13, count 0 2006.229.17:27:30.85#ibcon#wrote, iclass 13, count 0 2006.229.17:27:30.85#ibcon#about to read 3, iclass 13, count 0 2006.229.17:27:30.87#ibcon#read 3, iclass 13, count 0 2006.229.17:27:30.87#ibcon#about to read 4, iclass 13, count 0 2006.229.17:27:30.87#ibcon#read 4, iclass 13, count 0 2006.229.17:27:30.87#ibcon#about to read 5, iclass 13, count 0 2006.229.17:27:30.87#ibcon#read 5, iclass 13, count 0 2006.229.17:27:30.87#ibcon#about to read 6, iclass 13, count 0 2006.229.17:27:30.87#ibcon#read 6, iclass 13, count 0 2006.229.17:27:30.87#ibcon#end of sib2, iclass 13, count 0 2006.229.17:27:30.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:27:30.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:27:30.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:27:30.87#ibcon#*before write, iclass 13, count 0 2006.229.17:27:30.87#ibcon#enter sib2, iclass 13, count 0 2006.229.17:27:30.87#ibcon#flushed, iclass 13, count 0 2006.229.17:27:30.87#ibcon#about to write, iclass 13, count 0 2006.229.17:27:30.87#ibcon#wrote, iclass 13, count 0 2006.229.17:27:30.87#ibcon#about to read 3, iclass 13, count 0 2006.229.17:27:30.91#ibcon#read 3, iclass 13, count 0 2006.229.17:27:30.91#ibcon#about to read 4, iclass 13, count 0 2006.229.17:27:30.91#ibcon#read 4, iclass 13, count 0 2006.229.17:27:30.91#ibcon#about to read 5, iclass 13, count 0 2006.229.17:27:30.91#ibcon#read 5, iclass 13, count 0 2006.229.17:27:30.91#ibcon#about to read 6, iclass 13, count 0 2006.229.17:27:30.91#ibcon#read 6, iclass 13, count 0 2006.229.17:27:30.91#ibcon#end of sib2, iclass 13, count 0 2006.229.17:27:30.91#ibcon#*after write, iclass 13, count 0 2006.229.17:27:30.91#ibcon#*before return 0, iclass 13, count 0 2006.229.17:27:30.91#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:30.91#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:27:30.91#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:27:30.91#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:27:30.91$vck44/vb=4,4 2006.229.17:27:30.91#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.17:27:30.91#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.17:27:30.91#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:30.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:30.97#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:30.97#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:30.97#ibcon#enter wrdev, iclass 15, count 2 2006.229.17:27:30.97#ibcon#first serial, iclass 15, count 2 2006.229.17:27:30.97#ibcon#enter sib2, iclass 15, count 2 2006.229.17:27:30.97#ibcon#flushed, iclass 15, count 2 2006.229.17:27:30.97#ibcon#about to write, iclass 15, count 2 2006.229.17:27:30.97#ibcon#wrote, iclass 15, count 2 2006.229.17:27:30.97#ibcon#about to read 3, iclass 15, count 2 2006.229.17:27:30.99#ibcon#read 3, iclass 15, count 2 2006.229.17:27:30.99#ibcon#about to read 4, iclass 15, count 2 2006.229.17:27:30.99#ibcon#read 4, iclass 15, count 2 2006.229.17:27:30.99#ibcon#about to read 5, iclass 15, count 2 2006.229.17:27:30.99#ibcon#read 5, iclass 15, count 2 2006.229.17:27:30.99#ibcon#about to read 6, iclass 15, count 2 2006.229.17:27:30.99#ibcon#read 6, iclass 15, count 2 2006.229.17:27:30.99#ibcon#end of sib2, iclass 15, count 2 2006.229.17:27:30.99#ibcon#*mode == 0, iclass 15, count 2 2006.229.17:27:30.99#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.17:27:30.99#ibcon#[27=AT04-04\r\n] 2006.229.17:27:30.99#ibcon#*before write, iclass 15, count 2 2006.229.17:27:30.99#ibcon#enter sib2, iclass 15, count 2 2006.229.17:27:30.99#ibcon#flushed, iclass 15, count 2 2006.229.17:27:30.99#ibcon#about to write, iclass 15, count 2 2006.229.17:27:30.99#ibcon#wrote, iclass 15, count 2 2006.229.17:27:30.99#ibcon#about to read 3, iclass 15, count 2 2006.229.17:27:31.02#ibcon#read 3, iclass 15, count 2 2006.229.17:27:31.02#ibcon#about to read 4, iclass 15, count 2 2006.229.17:27:31.02#ibcon#read 4, iclass 15, count 2 2006.229.17:27:31.02#ibcon#about to read 5, iclass 15, count 2 2006.229.17:27:31.02#ibcon#read 5, iclass 15, count 2 2006.229.17:27:31.02#ibcon#about to read 6, iclass 15, count 2 2006.229.17:27:31.02#ibcon#read 6, iclass 15, count 2 2006.229.17:27:31.02#ibcon#end of sib2, iclass 15, count 2 2006.229.17:27:31.02#ibcon#*after write, iclass 15, count 2 2006.229.17:27:31.02#ibcon#*before return 0, iclass 15, count 2 2006.229.17:27:31.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:31.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:27:31.02#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.17:27:31.02#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:31.02#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:31.14#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:31.14#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:31.14#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:27:31.14#ibcon#first serial, iclass 15, count 0 2006.229.17:27:31.14#ibcon#enter sib2, iclass 15, count 0 2006.229.17:27:31.14#ibcon#flushed, iclass 15, count 0 2006.229.17:27:31.14#ibcon#about to write, iclass 15, count 0 2006.229.17:27:31.14#ibcon#wrote, iclass 15, count 0 2006.229.17:27:31.14#ibcon#about to read 3, iclass 15, count 0 2006.229.17:27:31.16#ibcon#read 3, iclass 15, count 0 2006.229.17:27:31.16#ibcon#about to read 4, iclass 15, count 0 2006.229.17:27:31.16#ibcon#read 4, iclass 15, count 0 2006.229.17:27:31.16#ibcon#about to read 5, iclass 15, count 0 2006.229.17:27:31.16#ibcon#read 5, iclass 15, count 0 2006.229.17:27:31.16#ibcon#about to read 6, iclass 15, count 0 2006.229.17:27:31.16#ibcon#read 6, iclass 15, count 0 2006.229.17:27:31.16#ibcon#end of sib2, iclass 15, count 0 2006.229.17:27:31.16#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:27:31.16#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:27:31.16#ibcon#[27=USB\r\n] 2006.229.17:27:31.16#ibcon#*before write, iclass 15, count 0 2006.229.17:27:31.16#ibcon#enter sib2, iclass 15, count 0 2006.229.17:27:31.16#ibcon#flushed, iclass 15, count 0 2006.229.17:27:31.16#ibcon#about to write, iclass 15, count 0 2006.229.17:27:31.16#ibcon#wrote, iclass 15, count 0 2006.229.17:27:31.16#ibcon#about to read 3, iclass 15, count 0 2006.229.17:27:31.19#ibcon#read 3, iclass 15, count 0 2006.229.17:27:31.19#ibcon#about to read 4, iclass 15, count 0 2006.229.17:27:31.19#ibcon#read 4, iclass 15, count 0 2006.229.17:27:31.19#ibcon#about to read 5, iclass 15, count 0 2006.229.17:27:31.19#ibcon#read 5, iclass 15, count 0 2006.229.17:27:31.19#ibcon#about to read 6, iclass 15, count 0 2006.229.17:27:31.19#ibcon#read 6, iclass 15, count 0 2006.229.17:27:31.19#ibcon#end of sib2, iclass 15, count 0 2006.229.17:27:31.19#ibcon#*after write, iclass 15, count 0 2006.229.17:27:31.19#ibcon#*before return 0, iclass 15, count 0 2006.229.17:27:31.19#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:31.19#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:27:31.19#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:27:31.19#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:27:31.19$vck44/vblo=5,709.99 2006.229.17:27:31.19#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.17:27:31.19#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.17:27:31.19#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:31.19#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:31.19#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:31.19#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:31.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:27:31.19#ibcon#first serial, iclass 17, count 0 2006.229.17:27:31.19#ibcon#enter sib2, iclass 17, count 0 2006.229.17:27:31.19#ibcon#flushed, iclass 17, count 0 2006.229.17:27:31.19#ibcon#about to write, iclass 17, count 0 2006.229.17:27:31.19#ibcon#wrote, iclass 17, count 0 2006.229.17:27:31.19#ibcon#about to read 3, iclass 17, count 0 2006.229.17:27:31.21#ibcon#read 3, iclass 17, count 0 2006.229.17:27:31.21#ibcon#about to read 4, iclass 17, count 0 2006.229.17:27:31.21#ibcon#read 4, iclass 17, count 0 2006.229.17:27:31.21#ibcon#about to read 5, iclass 17, count 0 2006.229.17:27:31.21#ibcon#read 5, iclass 17, count 0 2006.229.17:27:31.21#ibcon#about to read 6, iclass 17, count 0 2006.229.17:27:31.21#ibcon#read 6, iclass 17, count 0 2006.229.17:27:31.21#ibcon#end of sib2, iclass 17, count 0 2006.229.17:27:31.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:27:31.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:27:31.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:27:31.21#ibcon#*before write, iclass 17, count 0 2006.229.17:27:31.21#ibcon#enter sib2, iclass 17, count 0 2006.229.17:27:31.21#ibcon#flushed, iclass 17, count 0 2006.229.17:27:31.21#ibcon#about to write, iclass 17, count 0 2006.229.17:27:31.21#ibcon#wrote, iclass 17, count 0 2006.229.17:27:31.21#ibcon#about to read 3, iclass 17, count 0 2006.229.17:27:31.25#ibcon#read 3, iclass 17, count 0 2006.229.17:27:31.25#ibcon#about to read 4, iclass 17, count 0 2006.229.17:27:31.25#ibcon#read 4, iclass 17, count 0 2006.229.17:27:31.25#ibcon#about to read 5, iclass 17, count 0 2006.229.17:27:31.25#ibcon#read 5, iclass 17, count 0 2006.229.17:27:31.25#ibcon#about to read 6, iclass 17, count 0 2006.229.17:27:31.25#ibcon#read 6, iclass 17, count 0 2006.229.17:27:31.25#ibcon#end of sib2, iclass 17, count 0 2006.229.17:27:31.25#ibcon#*after write, iclass 17, count 0 2006.229.17:27:31.25#ibcon#*before return 0, iclass 17, count 0 2006.229.17:27:31.25#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:31.25#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:27:31.25#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:27:31.25#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:27:31.25$vck44/vb=5,4 2006.229.17:27:31.25#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.17:27:31.25#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.17:27:31.25#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:31.25#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:31.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:31.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:31.31#ibcon#enter wrdev, iclass 19, count 2 2006.229.17:27:31.31#ibcon#first serial, iclass 19, count 2 2006.229.17:27:31.31#ibcon#enter sib2, iclass 19, count 2 2006.229.17:27:31.31#ibcon#flushed, iclass 19, count 2 2006.229.17:27:31.31#ibcon#about to write, iclass 19, count 2 2006.229.17:27:31.31#ibcon#wrote, iclass 19, count 2 2006.229.17:27:31.31#ibcon#about to read 3, iclass 19, count 2 2006.229.17:27:31.33#ibcon#read 3, iclass 19, count 2 2006.229.17:27:31.33#ibcon#about to read 4, iclass 19, count 2 2006.229.17:27:31.33#ibcon#read 4, iclass 19, count 2 2006.229.17:27:31.33#ibcon#about to read 5, iclass 19, count 2 2006.229.17:27:31.33#ibcon#read 5, iclass 19, count 2 2006.229.17:27:31.33#ibcon#about to read 6, iclass 19, count 2 2006.229.17:27:31.33#ibcon#read 6, iclass 19, count 2 2006.229.17:27:31.33#ibcon#end of sib2, iclass 19, count 2 2006.229.17:27:31.33#ibcon#*mode == 0, iclass 19, count 2 2006.229.17:27:31.33#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.17:27:31.33#ibcon#[27=AT05-04\r\n] 2006.229.17:27:31.33#ibcon#*before write, iclass 19, count 2 2006.229.17:27:31.33#ibcon#enter sib2, iclass 19, count 2 2006.229.17:27:31.33#ibcon#flushed, iclass 19, count 2 2006.229.17:27:31.33#ibcon#about to write, iclass 19, count 2 2006.229.17:27:31.33#ibcon#wrote, iclass 19, count 2 2006.229.17:27:31.33#ibcon#about to read 3, iclass 19, count 2 2006.229.17:27:31.36#ibcon#read 3, iclass 19, count 2 2006.229.17:27:31.36#ibcon#about to read 4, iclass 19, count 2 2006.229.17:27:31.36#ibcon#read 4, iclass 19, count 2 2006.229.17:27:31.36#ibcon#about to read 5, iclass 19, count 2 2006.229.17:27:31.36#ibcon#read 5, iclass 19, count 2 2006.229.17:27:31.36#ibcon#about to read 6, iclass 19, count 2 2006.229.17:27:31.36#ibcon#read 6, iclass 19, count 2 2006.229.17:27:31.36#ibcon#end of sib2, iclass 19, count 2 2006.229.17:27:31.36#ibcon#*after write, iclass 19, count 2 2006.229.17:27:31.36#ibcon#*before return 0, iclass 19, count 2 2006.229.17:27:31.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:31.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:27:31.36#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.17:27:31.36#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:31.36#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:31.48#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:31.48#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:31.48#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:27:31.48#ibcon#first serial, iclass 19, count 0 2006.229.17:27:31.48#ibcon#enter sib2, iclass 19, count 0 2006.229.17:27:31.48#ibcon#flushed, iclass 19, count 0 2006.229.17:27:31.48#ibcon#about to write, iclass 19, count 0 2006.229.17:27:31.48#ibcon#wrote, iclass 19, count 0 2006.229.17:27:31.48#ibcon#about to read 3, iclass 19, count 0 2006.229.17:27:31.50#ibcon#read 3, iclass 19, count 0 2006.229.17:27:31.50#ibcon#about to read 4, iclass 19, count 0 2006.229.17:27:31.50#ibcon#read 4, iclass 19, count 0 2006.229.17:27:31.50#ibcon#about to read 5, iclass 19, count 0 2006.229.17:27:31.50#ibcon#read 5, iclass 19, count 0 2006.229.17:27:31.50#ibcon#about to read 6, iclass 19, count 0 2006.229.17:27:31.50#ibcon#read 6, iclass 19, count 0 2006.229.17:27:31.50#ibcon#end of sib2, iclass 19, count 0 2006.229.17:27:31.50#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:27:31.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:27:31.50#ibcon#[27=USB\r\n] 2006.229.17:27:31.50#ibcon#*before write, iclass 19, count 0 2006.229.17:27:31.50#ibcon#enter sib2, iclass 19, count 0 2006.229.17:27:31.50#ibcon#flushed, iclass 19, count 0 2006.229.17:27:31.50#ibcon#about to write, iclass 19, count 0 2006.229.17:27:31.50#ibcon#wrote, iclass 19, count 0 2006.229.17:27:31.50#ibcon#about to read 3, iclass 19, count 0 2006.229.17:27:31.53#ibcon#read 3, iclass 19, count 0 2006.229.17:27:31.53#ibcon#about to read 4, iclass 19, count 0 2006.229.17:27:31.53#ibcon#read 4, iclass 19, count 0 2006.229.17:27:31.53#ibcon#about to read 5, iclass 19, count 0 2006.229.17:27:31.53#ibcon#read 5, iclass 19, count 0 2006.229.17:27:31.53#ibcon#about to read 6, iclass 19, count 0 2006.229.17:27:31.53#ibcon#read 6, iclass 19, count 0 2006.229.17:27:31.53#ibcon#end of sib2, iclass 19, count 0 2006.229.17:27:31.53#ibcon#*after write, iclass 19, count 0 2006.229.17:27:31.53#ibcon#*before return 0, iclass 19, count 0 2006.229.17:27:31.53#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:31.53#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:27:31.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:27:31.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:27:31.53$vck44/vblo=6,719.99 2006.229.17:27:31.53#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.17:27:31.53#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.17:27:31.53#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:31.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:31.53#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:31.53#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:31.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:27:31.53#ibcon#first serial, iclass 21, count 0 2006.229.17:27:31.53#ibcon#enter sib2, iclass 21, count 0 2006.229.17:27:31.53#ibcon#flushed, iclass 21, count 0 2006.229.17:27:31.53#ibcon#about to write, iclass 21, count 0 2006.229.17:27:31.53#ibcon#wrote, iclass 21, count 0 2006.229.17:27:31.53#ibcon#about to read 3, iclass 21, count 0 2006.229.17:27:31.55#ibcon#read 3, iclass 21, count 0 2006.229.17:27:31.55#ibcon#about to read 4, iclass 21, count 0 2006.229.17:27:31.55#ibcon#read 4, iclass 21, count 0 2006.229.17:27:31.55#ibcon#about to read 5, iclass 21, count 0 2006.229.17:27:31.55#ibcon#read 5, iclass 21, count 0 2006.229.17:27:31.55#ibcon#about to read 6, iclass 21, count 0 2006.229.17:27:31.55#ibcon#read 6, iclass 21, count 0 2006.229.17:27:31.55#ibcon#end of sib2, iclass 21, count 0 2006.229.17:27:31.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:27:31.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:27:31.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:27:31.55#ibcon#*before write, iclass 21, count 0 2006.229.17:27:31.55#ibcon#enter sib2, iclass 21, count 0 2006.229.17:27:31.55#ibcon#flushed, iclass 21, count 0 2006.229.17:27:31.55#ibcon#about to write, iclass 21, count 0 2006.229.17:27:31.55#ibcon#wrote, iclass 21, count 0 2006.229.17:27:31.55#ibcon#about to read 3, iclass 21, count 0 2006.229.17:27:31.59#ibcon#read 3, iclass 21, count 0 2006.229.17:27:31.59#ibcon#about to read 4, iclass 21, count 0 2006.229.17:27:31.59#ibcon#read 4, iclass 21, count 0 2006.229.17:27:31.59#ibcon#about to read 5, iclass 21, count 0 2006.229.17:27:31.59#ibcon#read 5, iclass 21, count 0 2006.229.17:27:31.59#ibcon#about to read 6, iclass 21, count 0 2006.229.17:27:31.59#ibcon#read 6, iclass 21, count 0 2006.229.17:27:31.59#ibcon#end of sib2, iclass 21, count 0 2006.229.17:27:31.59#ibcon#*after write, iclass 21, count 0 2006.229.17:27:31.59#ibcon#*before return 0, iclass 21, count 0 2006.229.17:27:31.59#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:31.59#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:27:31.59#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:27:31.59#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:27:31.59$vck44/vb=6,4 2006.229.17:27:31.59#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.17:27:31.59#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.17:27:31.59#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:31.59#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:31.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:31.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:31.65#ibcon#enter wrdev, iclass 23, count 2 2006.229.17:27:31.65#ibcon#first serial, iclass 23, count 2 2006.229.17:27:31.65#ibcon#enter sib2, iclass 23, count 2 2006.229.17:27:31.65#ibcon#flushed, iclass 23, count 2 2006.229.17:27:31.65#ibcon#about to write, iclass 23, count 2 2006.229.17:27:31.65#ibcon#wrote, iclass 23, count 2 2006.229.17:27:31.65#ibcon#about to read 3, iclass 23, count 2 2006.229.17:27:31.67#ibcon#read 3, iclass 23, count 2 2006.229.17:27:31.67#ibcon#about to read 4, iclass 23, count 2 2006.229.17:27:31.67#ibcon#read 4, iclass 23, count 2 2006.229.17:27:31.67#ibcon#about to read 5, iclass 23, count 2 2006.229.17:27:31.67#ibcon#read 5, iclass 23, count 2 2006.229.17:27:31.67#ibcon#about to read 6, iclass 23, count 2 2006.229.17:27:31.67#ibcon#read 6, iclass 23, count 2 2006.229.17:27:31.67#ibcon#end of sib2, iclass 23, count 2 2006.229.17:27:31.67#ibcon#*mode == 0, iclass 23, count 2 2006.229.17:27:31.67#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.17:27:31.67#ibcon#[27=AT06-04\r\n] 2006.229.17:27:31.67#ibcon#*before write, iclass 23, count 2 2006.229.17:27:31.67#ibcon#enter sib2, iclass 23, count 2 2006.229.17:27:31.67#ibcon#flushed, iclass 23, count 2 2006.229.17:27:31.67#ibcon#about to write, iclass 23, count 2 2006.229.17:27:31.67#ibcon#wrote, iclass 23, count 2 2006.229.17:27:31.67#ibcon#about to read 3, iclass 23, count 2 2006.229.17:27:31.70#ibcon#read 3, iclass 23, count 2 2006.229.17:27:31.70#ibcon#about to read 4, iclass 23, count 2 2006.229.17:27:31.70#ibcon#read 4, iclass 23, count 2 2006.229.17:27:31.70#ibcon#about to read 5, iclass 23, count 2 2006.229.17:27:31.70#ibcon#read 5, iclass 23, count 2 2006.229.17:27:31.70#ibcon#about to read 6, iclass 23, count 2 2006.229.17:27:31.70#ibcon#read 6, iclass 23, count 2 2006.229.17:27:31.70#ibcon#end of sib2, iclass 23, count 2 2006.229.17:27:31.70#ibcon#*after write, iclass 23, count 2 2006.229.17:27:31.70#ibcon#*before return 0, iclass 23, count 2 2006.229.17:27:31.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:31.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:27:31.70#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.17:27:31.70#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:31.70#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:31.82#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:31.82#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:31.82#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:27:31.82#ibcon#first serial, iclass 23, count 0 2006.229.17:27:31.82#ibcon#enter sib2, iclass 23, count 0 2006.229.17:27:31.82#ibcon#flushed, iclass 23, count 0 2006.229.17:27:31.82#ibcon#about to write, iclass 23, count 0 2006.229.17:27:31.82#ibcon#wrote, iclass 23, count 0 2006.229.17:27:31.82#ibcon#about to read 3, iclass 23, count 0 2006.229.17:27:31.84#ibcon#read 3, iclass 23, count 0 2006.229.17:27:31.84#ibcon#about to read 4, iclass 23, count 0 2006.229.17:27:31.84#ibcon#read 4, iclass 23, count 0 2006.229.17:27:31.84#ibcon#about to read 5, iclass 23, count 0 2006.229.17:27:31.84#ibcon#read 5, iclass 23, count 0 2006.229.17:27:31.84#ibcon#about to read 6, iclass 23, count 0 2006.229.17:27:31.84#ibcon#read 6, iclass 23, count 0 2006.229.17:27:31.84#ibcon#end of sib2, iclass 23, count 0 2006.229.17:27:31.84#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:27:31.84#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:27:31.84#ibcon#[27=USB\r\n] 2006.229.17:27:31.84#ibcon#*before write, iclass 23, count 0 2006.229.17:27:31.84#ibcon#enter sib2, iclass 23, count 0 2006.229.17:27:31.84#ibcon#flushed, iclass 23, count 0 2006.229.17:27:31.84#ibcon#about to write, iclass 23, count 0 2006.229.17:27:31.84#ibcon#wrote, iclass 23, count 0 2006.229.17:27:31.84#ibcon#about to read 3, iclass 23, count 0 2006.229.17:27:31.87#ibcon#read 3, iclass 23, count 0 2006.229.17:27:31.87#ibcon#about to read 4, iclass 23, count 0 2006.229.17:27:31.87#ibcon#read 4, iclass 23, count 0 2006.229.17:27:31.87#ibcon#about to read 5, iclass 23, count 0 2006.229.17:27:31.87#ibcon#read 5, iclass 23, count 0 2006.229.17:27:31.87#ibcon#about to read 6, iclass 23, count 0 2006.229.17:27:31.87#ibcon#read 6, iclass 23, count 0 2006.229.17:27:31.87#ibcon#end of sib2, iclass 23, count 0 2006.229.17:27:31.87#ibcon#*after write, iclass 23, count 0 2006.229.17:27:31.87#ibcon#*before return 0, iclass 23, count 0 2006.229.17:27:31.87#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:31.87#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:27:31.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:27:31.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:27:31.87$vck44/vblo=7,734.99 2006.229.17:27:31.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.17:27:31.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.17:27:31.87#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:31.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:31.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:31.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:31.87#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:27:31.87#ibcon#first serial, iclass 25, count 0 2006.229.17:27:31.87#ibcon#enter sib2, iclass 25, count 0 2006.229.17:27:31.87#ibcon#flushed, iclass 25, count 0 2006.229.17:27:31.87#ibcon#about to write, iclass 25, count 0 2006.229.17:27:31.87#ibcon#wrote, iclass 25, count 0 2006.229.17:27:31.87#ibcon#about to read 3, iclass 25, count 0 2006.229.17:27:31.89#ibcon#read 3, iclass 25, count 0 2006.229.17:27:31.89#ibcon#about to read 4, iclass 25, count 0 2006.229.17:27:31.89#ibcon#read 4, iclass 25, count 0 2006.229.17:27:31.89#ibcon#about to read 5, iclass 25, count 0 2006.229.17:27:31.89#ibcon#read 5, iclass 25, count 0 2006.229.17:27:31.89#ibcon#about to read 6, iclass 25, count 0 2006.229.17:27:31.89#ibcon#read 6, iclass 25, count 0 2006.229.17:27:31.89#ibcon#end of sib2, iclass 25, count 0 2006.229.17:27:31.89#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:27:31.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:27:31.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:27:31.89#ibcon#*before write, iclass 25, count 0 2006.229.17:27:31.89#ibcon#enter sib2, iclass 25, count 0 2006.229.17:27:31.89#ibcon#flushed, iclass 25, count 0 2006.229.17:27:31.89#ibcon#about to write, iclass 25, count 0 2006.229.17:27:31.89#ibcon#wrote, iclass 25, count 0 2006.229.17:27:31.89#ibcon#about to read 3, iclass 25, count 0 2006.229.17:27:31.93#ibcon#read 3, iclass 25, count 0 2006.229.17:27:31.93#ibcon#about to read 4, iclass 25, count 0 2006.229.17:27:31.93#ibcon#read 4, iclass 25, count 0 2006.229.17:27:31.93#ibcon#about to read 5, iclass 25, count 0 2006.229.17:27:31.93#ibcon#read 5, iclass 25, count 0 2006.229.17:27:31.93#ibcon#about to read 6, iclass 25, count 0 2006.229.17:27:31.93#ibcon#read 6, iclass 25, count 0 2006.229.17:27:31.93#ibcon#end of sib2, iclass 25, count 0 2006.229.17:27:31.93#ibcon#*after write, iclass 25, count 0 2006.229.17:27:31.93#ibcon#*before return 0, iclass 25, count 0 2006.229.17:27:31.93#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:31.93#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:27:31.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:27:31.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:27:31.93$vck44/vb=7,4 2006.229.17:27:31.93#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.17:27:31.93#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.17:27:31.93#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:31.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:31.99#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:31.99#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:31.99#ibcon#enter wrdev, iclass 27, count 2 2006.229.17:27:31.99#ibcon#first serial, iclass 27, count 2 2006.229.17:27:31.99#ibcon#enter sib2, iclass 27, count 2 2006.229.17:27:31.99#ibcon#flushed, iclass 27, count 2 2006.229.17:27:31.99#ibcon#about to write, iclass 27, count 2 2006.229.17:27:31.99#ibcon#wrote, iclass 27, count 2 2006.229.17:27:31.99#ibcon#about to read 3, iclass 27, count 2 2006.229.17:27:32.01#ibcon#read 3, iclass 27, count 2 2006.229.17:27:32.01#ibcon#about to read 4, iclass 27, count 2 2006.229.17:27:32.01#ibcon#read 4, iclass 27, count 2 2006.229.17:27:32.01#ibcon#about to read 5, iclass 27, count 2 2006.229.17:27:32.01#ibcon#read 5, iclass 27, count 2 2006.229.17:27:32.01#ibcon#about to read 6, iclass 27, count 2 2006.229.17:27:32.01#ibcon#read 6, iclass 27, count 2 2006.229.17:27:32.01#ibcon#end of sib2, iclass 27, count 2 2006.229.17:27:32.01#ibcon#*mode == 0, iclass 27, count 2 2006.229.17:27:32.01#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.17:27:32.01#ibcon#[27=AT07-04\r\n] 2006.229.17:27:32.01#ibcon#*before write, iclass 27, count 2 2006.229.17:27:32.01#ibcon#enter sib2, iclass 27, count 2 2006.229.17:27:32.01#ibcon#flushed, iclass 27, count 2 2006.229.17:27:32.01#ibcon#about to write, iclass 27, count 2 2006.229.17:27:32.01#ibcon#wrote, iclass 27, count 2 2006.229.17:27:32.01#ibcon#about to read 3, iclass 27, count 2 2006.229.17:27:32.04#ibcon#read 3, iclass 27, count 2 2006.229.17:27:32.04#ibcon#about to read 4, iclass 27, count 2 2006.229.17:27:32.04#ibcon#read 4, iclass 27, count 2 2006.229.17:27:32.04#ibcon#about to read 5, iclass 27, count 2 2006.229.17:27:32.04#ibcon#read 5, iclass 27, count 2 2006.229.17:27:32.04#ibcon#about to read 6, iclass 27, count 2 2006.229.17:27:32.04#ibcon#read 6, iclass 27, count 2 2006.229.17:27:32.04#ibcon#end of sib2, iclass 27, count 2 2006.229.17:27:32.04#ibcon#*after write, iclass 27, count 2 2006.229.17:27:32.04#ibcon#*before return 0, iclass 27, count 2 2006.229.17:27:32.04#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:32.04#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:27:32.04#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.17:27:32.04#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:32.04#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:32.16#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:32.16#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:32.16#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:27:32.16#ibcon#first serial, iclass 27, count 0 2006.229.17:27:32.16#ibcon#enter sib2, iclass 27, count 0 2006.229.17:27:32.16#ibcon#flushed, iclass 27, count 0 2006.229.17:27:32.16#ibcon#about to write, iclass 27, count 0 2006.229.17:27:32.16#ibcon#wrote, iclass 27, count 0 2006.229.17:27:32.16#ibcon#about to read 3, iclass 27, count 0 2006.229.17:27:32.18#ibcon#read 3, iclass 27, count 0 2006.229.17:27:32.18#ibcon#about to read 4, iclass 27, count 0 2006.229.17:27:32.18#ibcon#read 4, iclass 27, count 0 2006.229.17:27:32.18#ibcon#about to read 5, iclass 27, count 0 2006.229.17:27:32.18#ibcon#read 5, iclass 27, count 0 2006.229.17:27:32.18#ibcon#about to read 6, iclass 27, count 0 2006.229.17:27:32.18#ibcon#read 6, iclass 27, count 0 2006.229.17:27:32.18#ibcon#end of sib2, iclass 27, count 0 2006.229.17:27:32.18#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:27:32.18#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:27:32.18#ibcon#[27=USB\r\n] 2006.229.17:27:32.18#ibcon#*before write, iclass 27, count 0 2006.229.17:27:32.18#ibcon#enter sib2, iclass 27, count 0 2006.229.17:27:32.18#ibcon#flushed, iclass 27, count 0 2006.229.17:27:32.18#ibcon#about to write, iclass 27, count 0 2006.229.17:27:32.18#ibcon#wrote, iclass 27, count 0 2006.229.17:27:32.18#ibcon#about to read 3, iclass 27, count 0 2006.229.17:27:32.21#ibcon#read 3, iclass 27, count 0 2006.229.17:27:32.21#ibcon#about to read 4, iclass 27, count 0 2006.229.17:27:32.21#ibcon#read 4, iclass 27, count 0 2006.229.17:27:32.21#ibcon#about to read 5, iclass 27, count 0 2006.229.17:27:32.21#ibcon#read 5, iclass 27, count 0 2006.229.17:27:32.21#ibcon#about to read 6, iclass 27, count 0 2006.229.17:27:32.21#ibcon#read 6, iclass 27, count 0 2006.229.17:27:32.21#ibcon#end of sib2, iclass 27, count 0 2006.229.17:27:32.21#ibcon#*after write, iclass 27, count 0 2006.229.17:27:32.21#ibcon#*before return 0, iclass 27, count 0 2006.229.17:27:32.21#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:32.21#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:27:32.21#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:27:32.21#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:27:32.21$vck44/vblo=8,744.99 2006.229.17:27:32.21#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:27:32.21#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:27:32.21#ibcon#ireg 17 cls_cnt 0 2006.229.17:27:32.21#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:32.21#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:32.21#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:32.21#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:27:32.21#ibcon#first serial, iclass 29, count 0 2006.229.17:27:32.21#ibcon#enter sib2, iclass 29, count 0 2006.229.17:27:32.21#ibcon#flushed, iclass 29, count 0 2006.229.17:27:32.21#ibcon#about to write, iclass 29, count 0 2006.229.17:27:32.21#ibcon#wrote, iclass 29, count 0 2006.229.17:27:32.21#ibcon#about to read 3, iclass 29, count 0 2006.229.17:27:32.23#ibcon#read 3, iclass 29, count 0 2006.229.17:27:32.23#ibcon#about to read 4, iclass 29, count 0 2006.229.17:27:32.23#ibcon#read 4, iclass 29, count 0 2006.229.17:27:32.23#ibcon#about to read 5, iclass 29, count 0 2006.229.17:27:32.23#ibcon#read 5, iclass 29, count 0 2006.229.17:27:32.23#ibcon#about to read 6, iclass 29, count 0 2006.229.17:27:32.23#ibcon#read 6, iclass 29, count 0 2006.229.17:27:32.23#ibcon#end of sib2, iclass 29, count 0 2006.229.17:27:32.23#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:27:32.23#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:27:32.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:27:32.23#ibcon#*before write, iclass 29, count 0 2006.229.17:27:32.23#ibcon#enter sib2, iclass 29, count 0 2006.229.17:27:32.23#ibcon#flushed, iclass 29, count 0 2006.229.17:27:32.23#ibcon#about to write, iclass 29, count 0 2006.229.17:27:32.23#ibcon#wrote, iclass 29, count 0 2006.229.17:27:32.23#ibcon#about to read 3, iclass 29, count 0 2006.229.17:27:32.27#ibcon#read 3, iclass 29, count 0 2006.229.17:27:32.27#ibcon#about to read 4, iclass 29, count 0 2006.229.17:27:32.27#ibcon#read 4, iclass 29, count 0 2006.229.17:27:32.27#ibcon#about to read 5, iclass 29, count 0 2006.229.17:27:32.27#ibcon#read 5, iclass 29, count 0 2006.229.17:27:32.27#ibcon#about to read 6, iclass 29, count 0 2006.229.17:27:32.27#ibcon#read 6, iclass 29, count 0 2006.229.17:27:32.27#ibcon#end of sib2, iclass 29, count 0 2006.229.17:27:32.27#ibcon#*after write, iclass 29, count 0 2006.229.17:27:32.27#ibcon#*before return 0, iclass 29, count 0 2006.229.17:27:32.27#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:32.27#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:27:32.27#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:27:32.27#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:27:32.27$vck44/vb=8,4 2006.229.17:27:32.27#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.17:27:32.27#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.17:27:32.27#ibcon#ireg 11 cls_cnt 2 2006.229.17:27:32.27#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:32.33#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:32.33#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:32.33#ibcon#enter wrdev, iclass 31, count 2 2006.229.17:27:32.33#ibcon#first serial, iclass 31, count 2 2006.229.17:27:32.33#ibcon#enter sib2, iclass 31, count 2 2006.229.17:27:32.33#ibcon#flushed, iclass 31, count 2 2006.229.17:27:32.33#ibcon#about to write, iclass 31, count 2 2006.229.17:27:32.33#ibcon#wrote, iclass 31, count 2 2006.229.17:27:32.33#ibcon#about to read 3, iclass 31, count 2 2006.229.17:27:32.35#ibcon#read 3, iclass 31, count 2 2006.229.17:27:32.35#ibcon#about to read 4, iclass 31, count 2 2006.229.17:27:32.35#ibcon#read 4, iclass 31, count 2 2006.229.17:27:32.35#ibcon#about to read 5, iclass 31, count 2 2006.229.17:27:32.35#ibcon#read 5, iclass 31, count 2 2006.229.17:27:32.35#ibcon#about to read 6, iclass 31, count 2 2006.229.17:27:32.35#ibcon#read 6, iclass 31, count 2 2006.229.17:27:32.35#ibcon#end of sib2, iclass 31, count 2 2006.229.17:27:32.35#ibcon#*mode == 0, iclass 31, count 2 2006.229.17:27:32.35#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.17:27:32.35#ibcon#[27=AT08-04\r\n] 2006.229.17:27:32.35#ibcon#*before write, iclass 31, count 2 2006.229.17:27:32.35#ibcon#enter sib2, iclass 31, count 2 2006.229.17:27:32.35#ibcon#flushed, iclass 31, count 2 2006.229.17:27:32.35#ibcon#about to write, iclass 31, count 2 2006.229.17:27:32.35#ibcon#wrote, iclass 31, count 2 2006.229.17:27:32.35#ibcon#about to read 3, iclass 31, count 2 2006.229.17:27:32.38#ibcon#read 3, iclass 31, count 2 2006.229.17:27:32.38#ibcon#about to read 4, iclass 31, count 2 2006.229.17:27:32.38#ibcon#read 4, iclass 31, count 2 2006.229.17:27:32.38#ibcon#about to read 5, iclass 31, count 2 2006.229.17:27:32.38#ibcon#read 5, iclass 31, count 2 2006.229.17:27:32.38#ibcon#about to read 6, iclass 31, count 2 2006.229.17:27:32.38#ibcon#read 6, iclass 31, count 2 2006.229.17:27:32.38#ibcon#end of sib2, iclass 31, count 2 2006.229.17:27:32.38#ibcon#*after write, iclass 31, count 2 2006.229.17:27:32.38#ibcon#*before return 0, iclass 31, count 2 2006.229.17:27:32.38#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:32.38#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:27:32.38#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.17:27:32.38#ibcon#ireg 7 cls_cnt 0 2006.229.17:27:32.38#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:32.50#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:32.50#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:32.50#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:27:32.50#ibcon#first serial, iclass 31, count 0 2006.229.17:27:32.50#ibcon#enter sib2, iclass 31, count 0 2006.229.17:27:32.50#ibcon#flushed, iclass 31, count 0 2006.229.17:27:32.50#ibcon#about to write, iclass 31, count 0 2006.229.17:27:32.50#ibcon#wrote, iclass 31, count 0 2006.229.17:27:32.50#ibcon#about to read 3, iclass 31, count 0 2006.229.17:27:32.52#ibcon#read 3, iclass 31, count 0 2006.229.17:27:32.52#ibcon#about to read 4, iclass 31, count 0 2006.229.17:27:32.52#ibcon#read 4, iclass 31, count 0 2006.229.17:27:32.52#ibcon#about to read 5, iclass 31, count 0 2006.229.17:27:32.52#ibcon#read 5, iclass 31, count 0 2006.229.17:27:32.52#ibcon#about to read 6, iclass 31, count 0 2006.229.17:27:32.52#ibcon#read 6, iclass 31, count 0 2006.229.17:27:32.52#ibcon#end of sib2, iclass 31, count 0 2006.229.17:27:32.52#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:27:32.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:27:32.52#ibcon#[27=USB\r\n] 2006.229.17:27:32.52#ibcon#*before write, iclass 31, count 0 2006.229.17:27:32.52#ibcon#enter sib2, iclass 31, count 0 2006.229.17:27:32.52#ibcon#flushed, iclass 31, count 0 2006.229.17:27:32.52#ibcon#about to write, iclass 31, count 0 2006.229.17:27:32.52#ibcon#wrote, iclass 31, count 0 2006.229.17:27:32.52#ibcon#about to read 3, iclass 31, count 0 2006.229.17:27:32.55#ibcon#read 3, iclass 31, count 0 2006.229.17:27:32.55#ibcon#about to read 4, iclass 31, count 0 2006.229.17:27:32.55#ibcon#read 4, iclass 31, count 0 2006.229.17:27:32.55#ibcon#about to read 5, iclass 31, count 0 2006.229.17:27:32.55#ibcon#read 5, iclass 31, count 0 2006.229.17:27:32.55#ibcon#about to read 6, iclass 31, count 0 2006.229.17:27:32.55#ibcon#read 6, iclass 31, count 0 2006.229.17:27:32.55#ibcon#end of sib2, iclass 31, count 0 2006.229.17:27:32.55#ibcon#*after write, iclass 31, count 0 2006.229.17:27:32.55#ibcon#*before return 0, iclass 31, count 0 2006.229.17:27:32.55#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:32.55#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:27:32.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:27:32.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:27:32.55$vck44/vabw=wide 2006.229.17:27:32.55#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.17:27:32.55#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.17:27:32.55#ibcon#ireg 8 cls_cnt 0 2006.229.17:27:32.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:32.55#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:32.55#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:32.55#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:27:32.55#ibcon#first serial, iclass 33, count 0 2006.229.17:27:32.55#ibcon#enter sib2, iclass 33, count 0 2006.229.17:27:32.55#ibcon#flushed, iclass 33, count 0 2006.229.17:27:32.55#ibcon#about to write, iclass 33, count 0 2006.229.17:27:32.55#ibcon#wrote, iclass 33, count 0 2006.229.17:27:32.55#ibcon#about to read 3, iclass 33, count 0 2006.229.17:27:32.57#ibcon#read 3, iclass 33, count 0 2006.229.17:27:32.57#ibcon#about to read 4, iclass 33, count 0 2006.229.17:27:32.57#ibcon#read 4, iclass 33, count 0 2006.229.17:27:32.57#ibcon#about to read 5, iclass 33, count 0 2006.229.17:27:32.57#ibcon#read 5, iclass 33, count 0 2006.229.17:27:32.57#ibcon#about to read 6, iclass 33, count 0 2006.229.17:27:32.57#ibcon#read 6, iclass 33, count 0 2006.229.17:27:32.57#ibcon#end of sib2, iclass 33, count 0 2006.229.17:27:32.57#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:27:32.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:27:32.57#ibcon#[25=BW32\r\n] 2006.229.17:27:32.57#ibcon#*before write, iclass 33, count 0 2006.229.17:27:32.57#ibcon#enter sib2, iclass 33, count 0 2006.229.17:27:32.57#ibcon#flushed, iclass 33, count 0 2006.229.17:27:32.57#ibcon#about to write, iclass 33, count 0 2006.229.17:27:32.57#ibcon#wrote, iclass 33, count 0 2006.229.17:27:32.57#ibcon#about to read 3, iclass 33, count 0 2006.229.17:27:32.60#ibcon#read 3, iclass 33, count 0 2006.229.17:27:32.60#ibcon#about to read 4, iclass 33, count 0 2006.229.17:27:32.60#ibcon#read 4, iclass 33, count 0 2006.229.17:27:32.60#ibcon#about to read 5, iclass 33, count 0 2006.229.17:27:32.60#ibcon#read 5, iclass 33, count 0 2006.229.17:27:32.60#ibcon#about to read 6, iclass 33, count 0 2006.229.17:27:32.60#ibcon#read 6, iclass 33, count 0 2006.229.17:27:32.60#ibcon#end of sib2, iclass 33, count 0 2006.229.17:27:32.60#ibcon#*after write, iclass 33, count 0 2006.229.17:27:32.60#ibcon#*before return 0, iclass 33, count 0 2006.229.17:27:32.60#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:32.60#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:27:32.60#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:27:32.60#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:27:32.60$vck44/vbbw=wide 2006.229.17:27:32.60#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.17:27:32.60#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.17:27:32.60#ibcon#ireg 8 cls_cnt 0 2006.229.17:27:32.60#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:27:32.67#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:27:32.67#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:27:32.67#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:27:32.67#ibcon#first serial, iclass 35, count 0 2006.229.17:27:32.67#ibcon#enter sib2, iclass 35, count 0 2006.229.17:27:32.67#ibcon#flushed, iclass 35, count 0 2006.229.17:27:32.67#ibcon#about to write, iclass 35, count 0 2006.229.17:27:32.67#ibcon#wrote, iclass 35, count 0 2006.229.17:27:32.67#ibcon#about to read 3, iclass 35, count 0 2006.229.17:27:32.69#ibcon#read 3, iclass 35, count 0 2006.229.17:27:32.69#ibcon#about to read 4, iclass 35, count 0 2006.229.17:27:32.69#ibcon#read 4, iclass 35, count 0 2006.229.17:27:32.69#ibcon#about to read 5, iclass 35, count 0 2006.229.17:27:32.69#ibcon#read 5, iclass 35, count 0 2006.229.17:27:32.69#ibcon#about to read 6, iclass 35, count 0 2006.229.17:27:32.69#ibcon#read 6, iclass 35, count 0 2006.229.17:27:32.69#ibcon#end of sib2, iclass 35, count 0 2006.229.17:27:32.69#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:27:32.69#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:27:32.69#ibcon#[27=BW32\r\n] 2006.229.17:27:32.69#ibcon#*before write, iclass 35, count 0 2006.229.17:27:32.69#ibcon#enter sib2, iclass 35, count 0 2006.229.17:27:32.69#ibcon#flushed, iclass 35, count 0 2006.229.17:27:32.69#ibcon#about to write, iclass 35, count 0 2006.229.17:27:32.69#ibcon#wrote, iclass 35, count 0 2006.229.17:27:32.69#ibcon#about to read 3, iclass 35, count 0 2006.229.17:27:32.72#ibcon#read 3, iclass 35, count 0 2006.229.17:27:32.72#ibcon#about to read 4, iclass 35, count 0 2006.229.17:27:32.72#ibcon#read 4, iclass 35, count 0 2006.229.17:27:32.72#ibcon#about to read 5, iclass 35, count 0 2006.229.17:27:32.72#ibcon#read 5, iclass 35, count 0 2006.229.17:27:32.72#ibcon#about to read 6, iclass 35, count 0 2006.229.17:27:32.72#ibcon#read 6, iclass 35, count 0 2006.229.17:27:32.72#ibcon#end of sib2, iclass 35, count 0 2006.229.17:27:32.72#ibcon#*after write, iclass 35, count 0 2006.229.17:27:32.72#ibcon#*before return 0, iclass 35, count 0 2006.229.17:27:32.72#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:27:32.72#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:27:32.72#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:27:32.72#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:27:32.72$setupk4/ifdk4 2006.229.17:27:32.72$ifdk4/lo= 2006.229.17:27:32.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:27:32.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:27:32.72$ifdk4/patch= 2006.229.17:27:32.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:27:32.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:27:32.72$setupk4/!*+20s 2006.229.17:27:35.64#abcon#<5=/06 2.0 3.9 26.971001001.6\r\n> 2006.229.17:27:35.66#abcon#{5=INTERFACE CLEAR} 2006.229.17:27:35.72#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:27:39.14#trakl#Source acquired 2006.229.17:27:41.14#flagr#flagr/antenna,acquired 2006.229.17:27:45.81#abcon#<5=/06 2.1 3.9 26.971001001.6\r\n> 2006.229.17:27:45.83#abcon#{5=INTERFACE CLEAR} 2006.229.17:27:45.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:27:47.23$setupk4/"tpicd 2006.229.17:27:47.23$setupk4/echo=off 2006.229.17:27:47.23$setupk4/xlog=off 2006.229.17:27:47.23:!2006.229.17:30:43 2006.229.17:30:43.00:preob 2006.229.17:30:43.14/onsource/TRACKING 2006.229.17:30:43.14:!2006.229.17:30:53 2006.229.17:30:53.00:"tape 2006.229.17:30:53.00:"st=record 2006.229.17:30:53.00:data_valid=on 2006.229.17:30:53.00:midob 2006.229.17:30:53.14/onsource/TRACKING 2006.229.17:30:53.14/wx/26.95,1001.6,100 2006.229.17:30:53.33/cable/+6.4163E-03 2006.229.17:30:54.42/va/01,08,usb,yes,35,38 2006.229.17:30:54.42/va/02,07,usb,yes,38,39 2006.229.17:30:54.42/va/03,06,usb,yes,47,50 2006.229.17:30:54.42/va/04,07,usb,yes,40,41 2006.229.17:30:54.42/va/05,04,usb,yes,35,36 2006.229.17:30:54.42/va/06,04,usb,yes,40,39 2006.229.17:30:54.42/va/07,05,usb,yes,35,36 2006.229.17:30:54.42/va/08,06,usb,yes,26,32 2006.229.17:30:54.65/valo/01,524.99,yes,locked 2006.229.17:30:54.65/valo/02,534.99,yes,locked 2006.229.17:30:54.65/valo/03,564.99,yes,locked 2006.229.17:30:54.65/valo/04,624.99,yes,locked 2006.229.17:30:54.65/valo/05,734.99,yes,locked 2006.229.17:30:54.65/valo/06,814.99,yes,locked 2006.229.17:30:54.65/valo/07,864.99,yes,locked 2006.229.17:30:54.65/valo/08,884.99,yes,locked 2006.229.17:30:55.74/vb/01,04,usb,yes,32,30 2006.229.17:30:55.74/vb/02,04,usb,yes,35,35 2006.229.17:30:55.74/vb/03,04,usb,yes,32,35 2006.229.17:30:55.74/vb/04,04,usb,yes,36,35 2006.229.17:30:55.74/vb/05,04,usb,yes,28,31 2006.229.17:30:55.74/vb/06,04,usb,yes,33,29 2006.229.17:30:55.74/vb/07,04,usb,yes,33,33 2006.229.17:30:55.74/vb/08,04,usb,yes,30,34 2006.229.17:30:55.98/vblo/01,629.99,yes,locked 2006.229.17:30:55.98/vblo/02,634.99,yes,locked 2006.229.17:30:55.98/vblo/03,649.99,yes,locked 2006.229.17:30:55.98/vblo/04,679.99,yes,locked 2006.229.17:30:55.98/vblo/05,709.99,yes,locked 2006.229.17:30:55.98/vblo/06,719.99,yes,locked 2006.229.17:30:55.98/vblo/07,734.99,yes,locked 2006.229.17:30:55.98/vblo/08,744.99,yes,locked 2006.229.17:30:56.13/vabw/8 2006.229.17:30:56.28/vbbw/8 2006.229.17:30:56.37/xfe/off,on,12.0 2006.229.17:30:56.75/ifatt/23,28,28,28 2006.229.17:30:57.08/fmout-gps/S +4.67E-07 2006.229.17:30:57.12:!2006.229.17:32:53 2006.229.17:32:53.01:data_valid=off 2006.229.17:32:53.01:"et 2006.229.17:32:53.02:!+3s 2006.229.17:32:56.03:"tape 2006.229.17:32:56.03:postob 2006.229.17:32:56.10/cable/+6.4164E-03 2006.229.17:32:56.10/wx/26.94,1001.6,100 2006.229.17:32:56.16/fmout-gps/S +4.69E-07 2006.229.17:32:56.16:scan_name=229-1736,jd0608,260 2006.229.17:32:56.16:source=1044+719,104827.62,714335.9,2000.0,neutral 2006.229.17:32:57.13#flagr#flagr/antenna,new-source 2006.229.17:32:57.13:checkk5 2006.229.17:32:57.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:32:57.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:32:58.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:32:58.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:32:59.12/chk_obsdata//k5ts1/T2291730??a.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.17:32:59.53/chk_obsdata//k5ts2/T2291730??b.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.17:32:59.92/chk_obsdata//k5ts3/T2291730??c.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.17:33:00.34/chk_obsdata//k5ts4/T2291730??d.dat file size is correct (nominal:480MB, actual:476MB). 2006.229.17:33:01.07/k5log//k5ts1_log_newline 2006.229.17:33:01.78/k5log//k5ts2_log_newline 2006.229.17:33:02.49/k5log//k5ts3_log_newline 2006.229.17:33:03.18/k5log//k5ts4_log_newline 2006.229.17:33:03.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:33:03.21:setupk4=1 2006.229.17:33:03.21$setupk4/echo=on 2006.229.17:33:03.21$setupk4/pcalon 2006.229.17:33:03.21$pcalon/"no phase cal control is implemented here 2006.229.17:33:03.21$setupk4/"tpicd=stop 2006.229.17:33:03.21$setupk4/"rec=synch_on 2006.229.17:33:03.21$setupk4/"rec_mode=128 2006.229.17:33:03.21$setupk4/!* 2006.229.17:33:03.21$setupk4/recpk4 2006.229.17:33:03.21$recpk4/recpatch= 2006.229.17:33:03.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:33:03.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:33:03.22$setupk4/vck44 2006.229.17:33:03.22$vck44/valo=1,524.99 2006.229.17:33:03.22#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.17:33:03.22#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.17:33:03.22#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:03.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:03.22#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:03.22#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:03.22#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:33:03.22#ibcon#first serial, iclass 28, count 0 2006.229.17:33:03.22#ibcon#enter sib2, iclass 28, count 0 2006.229.17:33:03.22#ibcon#flushed, iclass 28, count 0 2006.229.17:33:03.22#ibcon#about to write, iclass 28, count 0 2006.229.17:33:03.22#ibcon#wrote, iclass 28, count 0 2006.229.17:33:03.22#ibcon#about to read 3, iclass 28, count 0 2006.229.17:33:03.23#ibcon#read 3, iclass 28, count 0 2006.229.17:33:03.23#ibcon#about to read 4, iclass 28, count 0 2006.229.17:33:03.23#ibcon#read 4, iclass 28, count 0 2006.229.17:33:03.23#ibcon#about to read 5, iclass 28, count 0 2006.229.17:33:03.23#ibcon#read 5, iclass 28, count 0 2006.229.17:33:03.23#ibcon#about to read 6, iclass 28, count 0 2006.229.17:33:03.23#ibcon#read 6, iclass 28, count 0 2006.229.17:33:03.23#ibcon#end of sib2, iclass 28, count 0 2006.229.17:33:03.23#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:33:03.23#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:33:03.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:33:03.23#ibcon#*before write, iclass 28, count 0 2006.229.17:33:03.23#ibcon#enter sib2, iclass 28, count 0 2006.229.17:33:03.23#ibcon#flushed, iclass 28, count 0 2006.229.17:33:03.23#ibcon#about to write, iclass 28, count 0 2006.229.17:33:03.23#ibcon#wrote, iclass 28, count 0 2006.229.17:33:03.23#ibcon#about to read 3, iclass 28, count 0 2006.229.17:33:03.28#ibcon#read 3, iclass 28, count 0 2006.229.17:33:03.28#ibcon#about to read 4, iclass 28, count 0 2006.229.17:33:03.28#ibcon#read 4, iclass 28, count 0 2006.229.17:33:03.28#ibcon#about to read 5, iclass 28, count 0 2006.229.17:33:03.28#ibcon#read 5, iclass 28, count 0 2006.229.17:33:03.28#ibcon#about to read 6, iclass 28, count 0 2006.229.17:33:03.28#ibcon#read 6, iclass 28, count 0 2006.229.17:33:03.28#ibcon#end of sib2, iclass 28, count 0 2006.229.17:33:03.28#ibcon#*after write, iclass 28, count 0 2006.229.17:33:03.28#ibcon#*before return 0, iclass 28, count 0 2006.229.17:33:03.28#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:03.28#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:03.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:33:03.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:33:03.28$vck44/va=1,8 2006.229.17:33:03.28#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.17:33:03.28#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.17:33:03.28#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:03.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:03.28#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:03.28#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:03.28#ibcon#enter wrdev, iclass 30, count 2 2006.229.17:33:03.28#ibcon#first serial, iclass 30, count 2 2006.229.17:33:03.28#ibcon#enter sib2, iclass 30, count 2 2006.229.17:33:03.28#ibcon#flushed, iclass 30, count 2 2006.229.17:33:03.28#ibcon#about to write, iclass 30, count 2 2006.229.17:33:03.28#ibcon#wrote, iclass 30, count 2 2006.229.17:33:03.28#ibcon#about to read 3, iclass 30, count 2 2006.229.17:33:03.30#ibcon#read 3, iclass 30, count 2 2006.229.17:33:03.30#ibcon#about to read 4, iclass 30, count 2 2006.229.17:33:03.30#ibcon#read 4, iclass 30, count 2 2006.229.17:33:03.30#ibcon#about to read 5, iclass 30, count 2 2006.229.17:33:03.30#ibcon#read 5, iclass 30, count 2 2006.229.17:33:03.30#ibcon#about to read 6, iclass 30, count 2 2006.229.17:33:03.30#ibcon#read 6, iclass 30, count 2 2006.229.17:33:03.30#ibcon#end of sib2, iclass 30, count 2 2006.229.17:33:03.30#ibcon#*mode == 0, iclass 30, count 2 2006.229.17:33:03.30#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.17:33:03.30#ibcon#[25=AT01-08\r\n] 2006.229.17:33:03.30#ibcon#*before write, iclass 30, count 2 2006.229.17:33:03.30#ibcon#enter sib2, iclass 30, count 2 2006.229.17:33:03.30#ibcon#flushed, iclass 30, count 2 2006.229.17:33:03.30#ibcon#about to write, iclass 30, count 2 2006.229.17:33:03.30#ibcon#wrote, iclass 30, count 2 2006.229.17:33:03.30#ibcon#about to read 3, iclass 30, count 2 2006.229.17:33:03.33#ibcon#read 3, iclass 30, count 2 2006.229.17:33:03.33#ibcon#about to read 4, iclass 30, count 2 2006.229.17:33:03.33#ibcon#read 4, iclass 30, count 2 2006.229.17:33:03.33#ibcon#about to read 5, iclass 30, count 2 2006.229.17:33:03.33#ibcon#read 5, iclass 30, count 2 2006.229.17:33:03.33#ibcon#about to read 6, iclass 30, count 2 2006.229.17:33:03.33#ibcon#read 6, iclass 30, count 2 2006.229.17:33:03.33#ibcon#end of sib2, iclass 30, count 2 2006.229.17:33:03.33#ibcon#*after write, iclass 30, count 2 2006.229.17:33:03.33#ibcon#*before return 0, iclass 30, count 2 2006.229.17:33:03.33#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:03.33#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:03.33#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.17:33:03.33#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:03.33#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:03.45#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:03.45#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:03.45#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:33:03.45#ibcon#first serial, iclass 30, count 0 2006.229.17:33:03.45#ibcon#enter sib2, iclass 30, count 0 2006.229.17:33:03.45#ibcon#flushed, iclass 30, count 0 2006.229.17:33:03.45#ibcon#about to write, iclass 30, count 0 2006.229.17:33:03.45#ibcon#wrote, iclass 30, count 0 2006.229.17:33:03.45#ibcon#about to read 3, iclass 30, count 0 2006.229.17:33:03.47#ibcon#read 3, iclass 30, count 0 2006.229.17:33:03.47#ibcon#about to read 4, iclass 30, count 0 2006.229.17:33:03.47#ibcon#read 4, iclass 30, count 0 2006.229.17:33:03.47#ibcon#about to read 5, iclass 30, count 0 2006.229.17:33:03.47#ibcon#read 5, iclass 30, count 0 2006.229.17:33:03.47#ibcon#about to read 6, iclass 30, count 0 2006.229.17:33:03.47#ibcon#read 6, iclass 30, count 0 2006.229.17:33:03.47#ibcon#end of sib2, iclass 30, count 0 2006.229.17:33:03.47#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:33:03.47#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:33:03.47#ibcon#[25=USB\r\n] 2006.229.17:33:03.47#ibcon#*before write, iclass 30, count 0 2006.229.17:33:03.47#ibcon#enter sib2, iclass 30, count 0 2006.229.17:33:03.47#ibcon#flushed, iclass 30, count 0 2006.229.17:33:03.47#ibcon#about to write, iclass 30, count 0 2006.229.17:33:03.47#ibcon#wrote, iclass 30, count 0 2006.229.17:33:03.47#ibcon#about to read 3, iclass 30, count 0 2006.229.17:33:03.50#ibcon#read 3, iclass 30, count 0 2006.229.17:33:03.50#ibcon#about to read 4, iclass 30, count 0 2006.229.17:33:03.50#ibcon#read 4, iclass 30, count 0 2006.229.17:33:03.50#ibcon#about to read 5, iclass 30, count 0 2006.229.17:33:03.50#ibcon#read 5, iclass 30, count 0 2006.229.17:33:03.50#ibcon#about to read 6, iclass 30, count 0 2006.229.17:33:03.50#ibcon#read 6, iclass 30, count 0 2006.229.17:33:03.50#ibcon#end of sib2, iclass 30, count 0 2006.229.17:33:03.50#ibcon#*after write, iclass 30, count 0 2006.229.17:33:03.50#ibcon#*before return 0, iclass 30, count 0 2006.229.17:33:03.50#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:03.50#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:03.50#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:33:03.50#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:33:03.50$vck44/valo=2,534.99 2006.229.17:33:03.50#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.17:33:03.50#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.17:33:03.50#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:03.50#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:03.50#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:03.50#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:03.50#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:33:03.50#ibcon#first serial, iclass 32, count 0 2006.229.17:33:03.50#ibcon#enter sib2, iclass 32, count 0 2006.229.17:33:03.50#ibcon#flushed, iclass 32, count 0 2006.229.17:33:03.50#ibcon#about to write, iclass 32, count 0 2006.229.17:33:03.50#ibcon#wrote, iclass 32, count 0 2006.229.17:33:03.50#ibcon#about to read 3, iclass 32, count 0 2006.229.17:33:03.52#ibcon#read 3, iclass 32, count 0 2006.229.17:33:03.52#ibcon#about to read 4, iclass 32, count 0 2006.229.17:33:03.52#ibcon#read 4, iclass 32, count 0 2006.229.17:33:03.52#ibcon#about to read 5, iclass 32, count 0 2006.229.17:33:03.52#ibcon#read 5, iclass 32, count 0 2006.229.17:33:03.52#ibcon#about to read 6, iclass 32, count 0 2006.229.17:33:03.52#ibcon#read 6, iclass 32, count 0 2006.229.17:33:03.52#ibcon#end of sib2, iclass 32, count 0 2006.229.17:33:03.52#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:33:03.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:33:03.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:33:03.52#ibcon#*before write, iclass 32, count 0 2006.229.17:33:03.52#ibcon#enter sib2, iclass 32, count 0 2006.229.17:33:03.52#ibcon#flushed, iclass 32, count 0 2006.229.17:33:03.52#ibcon#about to write, iclass 32, count 0 2006.229.17:33:03.52#ibcon#wrote, iclass 32, count 0 2006.229.17:33:03.52#ibcon#about to read 3, iclass 32, count 0 2006.229.17:33:03.56#ibcon#read 3, iclass 32, count 0 2006.229.17:33:03.56#ibcon#about to read 4, iclass 32, count 0 2006.229.17:33:03.56#ibcon#read 4, iclass 32, count 0 2006.229.17:33:03.56#ibcon#about to read 5, iclass 32, count 0 2006.229.17:33:03.56#ibcon#read 5, iclass 32, count 0 2006.229.17:33:03.56#ibcon#about to read 6, iclass 32, count 0 2006.229.17:33:03.56#ibcon#read 6, iclass 32, count 0 2006.229.17:33:03.56#ibcon#end of sib2, iclass 32, count 0 2006.229.17:33:03.56#ibcon#*after write, iclass 32, count 0 2006.229.17:33:03.56#ibcon#*before return 0, iclass 32, count 0 2006.229.17:33:03.56#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:03.56#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:03.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:33:03.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:33:03.56$vck44/va=2,7 2006.229.17:33:03.56#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.17:33:03.56#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.17:33:03.56#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:03.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:03.62#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:03.62#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:03.62#ibcon#enter wrdev, iclass 34, count 2 2006.229.17:33:03.62#ibcon#first serial, iclass 34, count 2 2006.229.17:33:03.62#ibcon#enter sib2, iclass 34, count 2 2006.229.17:33:03.62#ibcon#flushed, iclass 34, count 2 2006.229.17:33:03.62#ibcon#about to write, iclass 34, count 2 2006.229.17:33:03.62#ibcon#wrote, iclass 34, count 2 2006.229.17:33:03.62#ibcon#about to read 3, iclass 34, count 2 2006.229.17:33:03.64#ibcon#read 3, iclass 34, count 2 2006.229.17:33:03.64#ibcon#about to read 4, iclass 34, count 2 2006.229.17:33:03.64#ibcon#read 4, iclass 34, count 2 2006.229.17:33:03.64#ibcon#about to read 5, iclass 34, count 2 2006.229.17:33:03.64#ibcon#read 5, iclass 34, count 2 2006.229.17:33:03.64#ibcon#about to read 6, iclass 34, count 2 2006.229.17:33:03.64#ibcon#read 6, iclass 34, count 2 2006.229.17:33:03.64#ibcon#end of sib2, iclass 34, count 2 2006.229.17:33:03.64#ibcon#*mode == 0, iclass 34, count 2 2006.229.17:33:03.64#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.17:33:03.64#ibcon#[25=AT02-07\r\n] 2006.229.17:33:03.64#ibcon#*before write, iclass 34, count 2 2006.229.17:33:03.64#ibcon#enter sib2, iclass 34, count 2 2006.229.17:33:03.64#ibcon#flushed, iclass 34, count 2 2006.229.17:33:03.64#ibcon#about to write, iclass 34, count 2 2006.229.17:33:03.64#ibcon#wrote, iclass 34, count 2 2006.229.17:33:03.64#ibcon#about to read 3, iclass 34, count 2 2006.229.17:33:03.67#ibcon#read 3, iclass 34, count 2 2006.229.17:33:03.67#ibcon#about to read 4, iclass 34, count 2 2006.229.17:33:03.67#ibcon#read 4, iclass 34, count 2 2006.229.17:33:03.67#ibcon#about to read 5, iclass 34, count 2 2006.229.17:33:03.67#ibcon#read 5, iclass 34, count 2 2006.229.17:33:03.67#ibcon#about to read 6, iclass 34, count 2 2006.229.17:33:03.67#ibcon#read 6, iclass 34, count 2 2006.229.17:33:03.67#ibcon#end of sib2, iclass 34, count 2 2006.229.17:33:03.67#ibcon#*after write, iclass 34, count 2 2006.229.17:33:03.67#ibcon#*before return 0, iclass 34, count 2 2006.229.17:33:03.67#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:03.67#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:03.67#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.17:33:03.67#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:03.67#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:03.79#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:03.79#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:03.79#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:33:03.79#ibcon#first serial, iclass 34, count 0 2006.229.17:33:03.79#ibcon#enter sib2, iclass 34, count 0 2006.229.17:33:03.79#ibcon#flushed, iclass 34, count 0 2006.229.17:33:03.79#ibcon#about to write, iclass 34, count 0 2006.229.17:33:03.79#ibcon#wrote, iclass 34, count 0 2006.229.17:33:03.79#ibcon#about to read 3, iclass 34, count 0 2006.229.17:33:03.81#ibcon#read 3, iclass 34, count 0 2006.229.17:33:03.81#ibcon#about to read 4, iclass 34, count 0 2006.229.17:33:03.81#ibcon#read 4, iclass 34, count 0 2006.229.17:33:03.81#ibcon#about to read 5, iclass 34, count 0 2006.229.17:33:03.81#ibcon#read 5, iclass 34, count 0 2006.229.17:33:03.81#ibcon#about to read 6, iclass 34, count 0 2006.229.17:33:03.81#ibcon#read 6, iclass 34, count 0 2006.229.17:33:03.81#ibcon#end of sib2, iclass 34, count 0 2006.229.17:33:03.81#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:33:03.81#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:33:03.81#ibcon#[25=USB\r\n] 2006.229.17:33:03.81#ibcon#*before write, iclass 34, count 0 2006.229.17:33:03.81#ibcon#enter sib2, iclass 34, count 0 2006.229.17:33:03.81#ibcon#flushed, iclass 34, count 0 2006.229.17:33:03.81#ibcon#about to write, iclass 34, count 0 2006.229.17:33:03.81#ibcon#wrote, iclass 34, count 0 2006.229.17:33:03.81#ibcon#about to read 3, iclass 34, count 0 2006.229.17:33:03.84#ibcon#read 3, iclass 34, count 0 2006.229.17:33:03.84#ibcon#about to read 4, iclass 34, count 0 2006.229.17:33:03.84#ibcon#read 4, iclass 34, count 0 2006.229.17:33:03.84#ibcon#about to read 5, iclass 34, count 0 2006.229.17:33:03.84#ibcon#read 5, iclass 34, count 0 2006.229.17:33:03.84#ibcon#about to read 6, iclass 34, count 0 2006.229.17:33:03.84#ibcon#read 6, iclass 34, count 0 2006.229.17:33:03.84#ibcon#end of sib2, iclass 34, count 0 2006.229.17:33:03.84#ibcon#*after write, iclass 34, count 0 2006.229.17:33:03.84#ibcon#*before return 0, iclass 34, count 0 2006.229.17:33:03.84#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:03.84#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:03.84#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:33:03.84#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:33:03.84$vck44/valo=3,564.99 2006.229.17:33:03.84#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.17:33:03.84#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.17:33:03.84#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:03.84#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:03.84#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:03.84#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:03.84#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:33:03.84#ibcon#first serial, iclass 36, count 0 2006.229.17:33:03.84#ibcon#enter sib2, iclass 36, count 0 2006.229.17:33:03.84#ibcon#flushed, iclass 36, count 0 2006.229.17:33:03.84#ibcon#about to write, iclass 36, count 0 2006.229.17:33:03.84#ibcon#wrote, iclass 36, count 0 2006.229.17:33:03.84#ibcon#about to read 3, iclass 36, count 0 2006.229.17:33:03.86#ibcon#read 3, iclass 36, count 0 2006.229.17:33:03.86#ibcon#about to read 4, iclass 36, count 0 2006.229.17:33:03.86#ibcon#read 4, iclass 36, count 0 2006.229.17:33:03.86#ibcon#about to read 5, iclass 36, count 0 2006.229.17:33:03.86#ibcon#read 5, iclass 36, count 0 2006.229.17:33:03.86#ibcon#about to read 6, iclass 36, count 0 2006.229.17:33:03.86#ibcon#read 6, iclass 36, count 0 2006.229.17:33:03.86#ibcon#end of sib2, iclass 36, count 0 2006.229.17:33:03.86#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:33:03.86#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:33:03.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:33:03.86#ibcon#*before write, iclass 36, count 0 2006.229.17:33:03.86#ibcon#enter sib2, iclass 36, count 0 2006.229.17:33:03.86#ibcon#flushed, iclass 36, count 0 2006.229.17:33:03.86#ibcon#about to write, iclass 36, count 0 2006.229.17:33:03.86#ibcon#wrote, iclass 36, count 0 2006.229.17:33:03.86#ibcon#about to read 3, iclass 36, count 0 2006.229.17:33:03.90#ibcon#read 3, iclass 36, count 0 2006.229.17:33:03.90#ibcon#about to read 4, iclass 36, count 0 2006.229.17:33:03.90#ibcon#read 4, iclass 36, count 0 2006.229.17:33:03.90#ibcon#about to read 5, iclass 36, count 0 2006.229.17:33:03.90#ibcon#read 5, iclass 36, count 0 2006.229.17:33:03.90#ibcon#about to read 6, iclass 36, count 0 2006.229.17:33:03.90#ibcon#read 6, iclass 36, count 0 2006.229.17:33:03.90#ibcon#end of sib2, iclass 36, count 0 2006.229.17:33:03.90#ibcon#*after write, iclass 36, count 0 2006.229.17:33:03.90#ibcon#*before return 0, iclass 36, count 0 2006.229.17:33:03.90#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:03.90#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:03.90#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:33:03.90#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:33:03.90$vck44/va=3,6 2006.229.17:33:03.90#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.17:33:03.90#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.17:33:03.90#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:03.90#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:03.96#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:03.96#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:03.96#ibcon#enter wrdev, iclass 38, count 2 2006.229.17:33:03.96#ibcon#first serial, iclass 38, count 2 2006.229.17:33:03.96#ibcon#enter sib2, iclass 38, count 2 2006.229.17:33:03.96#ibcon#flushed, iclass 38, count 2 2006.229.17:33:03.96#ibcon#about to write, iclass 38, count 2 2006.229.17:33:03.96#ibcon#wrote, iclass 38, count 2 2006.229.17:33:03.96#ibcon#about to read 3, iclass 38, count 2 2006.229.17:33:03.98#ibcon#read 3, iclass 38, count 2 2006.229.17:33:03.98#ibcon#about to read 4, iclass 38, count 2 2006.229.17:33:03.98#ibcon#read 4, iclass 38, count 2 2006.229.17:33:03.98#ibcon#about to read 5, iclass 38, count 2 2006.229.17:33:03.98#ibcon#read 5, iclass 38, count 2 2006.229.17:33:03.98#ibcon#about to read 6, iclass 38, count 2 2006.229.17:33:03.98#ibcon#read 6, iclass 38, count 2 2006.229.17:33:03.98#ibcon#end of sib2, iclass 38, count 2 2006.229.17:33:03.98#ibcon#*mode == 0, iclass 38, count 2 2006.229.17:33:03.98#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.17:33:03.98#ibcon#[25=AT03-06\r\n] 2006.229.17:33:03.98#ibcon#*before write, iclass 38, count 2 2006.229.17:33:03.98#ibcon#enter sib2, iclass 38, count 2 2006.229.17:33:03.98#ibcon#flushed, iclass 38, count 2 2006.229.17:33:03.98#ibcon#about to write, iclass 38, count 2 2006.229.17:33:03.98#ibcon#wrote, iclass 38, count 2 2006.229.17:33:03.98#ibcon#about to read 3, iclass 38, count 2 2006.229.17:33:04.01#ibcon#read 3, iclass 38, count 2 2006.229.17:33:04.01#ibcon#about to read 4, iclass 38, count 2 2006.229.17:33:04.01#ibcon#read 4, iclass 38, count 2 2006.229.17:33:04.01#ibcon#about to read 5, iclass 38, count 2 2006.229.17:33:04.01#ibcon#read 5, iclass 38, count 2 2006.229.17:33:04.01#ibcon#about to read 6, iclass 38, count 2 2006.229.17:33:04.01#ibcon#read 6, iclass 38, count 2 2006.229.17:33:04.01#ibcon#end of sib2, iclass 38, count 2 2006.229.17:33:04.01#ibcon#*after write, iclass 38, count 2 2006.229.17:33:04.01#ibcon#*before return 0, iclass 38, count 2 2006.229.17:33:04.01#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:04.01#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:04.01#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.17:33:04.01#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:04.01#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:04.13#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:04.13#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:04.13#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:33:04.13#ibcon#first serial, iclass 38, count 0 2006.229.17:33:04.13#ibcon#enter sib2, iclass 38, count 0 2006.229.17:33:04.13#ibcon#flushed, iclass 38, count 0 2006.229.17:33:04.13#ibcon#about to write, iclass 38, count 0 2006.229.17:33:04.13#ibcon#wrote, iclass 38, count 0 2006.229.17:33:04.13#ibcon#about to read 3, iclass 38, count 0 2006.229.17:33:04.15#ibcon#read 3, iclass 38, count 0 2006.229.17:33:04.15#ibcon#about to read 4, iclass 38, count 0 2006.229.17:33:04.15#ibcon#read 4, iclass 38, count 0 2006.229.17:33:04.15#ibcon#about to read 5, iclass 38, count 0 2006.229.17:33:04.15#ibcon#read 5, iclass 38, count 0 2006.229.17:33:04.15#ibcon#about to read 6, iclass 38, count 0 2006.229.17:33:04.15#ibcon#read 6, iclass 38, count 0 2006.229.17:33:04.15#ibcon#end of sib2, iclass 38, count 0 2006.229.17:33:04.15#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:33:04.15#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:33:04.15#ibcon#[25=USB\r\n] 2006.229.17:33:04.15#ibcon#*before write, iclass 38, count 0 2006.229.17:33:04.15#ibcon#enter sib2, iclass 38, count 0 2006.229.17:33:04.15#ibcon#flushed, iclass 38, count 0 2006.229.17:33:04.15#ibcon#about to write, iclass 38, count 0 2006.229.17:33:04.15#ibcon#wrote, iclass 38, count 0 2006.229.17:33:04.15#ibcon#about to read 3, iclass 38, count 0 2006.229.17:33:04.18#ibcon#read 3, iclass 38, count 0 2006.229.17:33:04.18#ibcon#about to read 4, iclass 38, count 0 2006.229.17:33:04.18#ibcon#read 4, iclass 38, count 0 2006.229.17:33:04.18#ibcon#about to read 5, iclass 38, count 0 2006.229.17:33:04.18#ibcon#read 5, iclass 38, count 0 2006.229.17:33:04.18#ibcon#about to read 6, iclass 38, count 0 2006.229.17:33:04.18#ibcon#read 6, iclass 38, count 0 2006.229.17:33:04.18#ibcon#end of sib2, iclass 38, count 0 2006.229.17:33:04.18#ibcon#*after write, iclass 38, count 0 2006.229.17:33:04.18#ibcon#*before return 0, iclass 38, count 0 2006.229.17:33:04.18#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:04.18#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:04.18#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:33:04.18#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:33:04.18$vck44/valo=4,624.99 2006.229.17:33:04.18#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.17:33:04.18#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.17:33:04.18#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:04.18#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:04.18#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:04.18#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:04.18#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:33:04.18#ibcon#first serial, iclass 40, count 0 2006.229.17:33:04.18#ibcon#enter sib2, iclass 40, count 0 2006.229.17:33:04.18#ibcon#flushed, iclass 40, count 0 2006.229.17:33:04.18#ibcon#about to write, iclass 40, count 0 2006.229.17:33:04.18#ibcon#wrote, iclass 40, count 0 2006.229.17:33:04.18#ibcon#about to read 3, iclass 40, count 0 2006.229.17:33:04.20#ibcon#read 3, iclass 40, count 0 2006.229.17:33:04.20#ibcon#about to read 4, iclass 40, count 0 2006.229.17:33:04.20#ibcon#read 4, iclass 40, count 0 2006.229.17:33:04.20#ibcon#about to read 5, iclass 40, count 0 2006.229.17:33:04.20#ibcon#read 5, iclass 40, count 0 2006.229.17:33:04.20#ibcon#about to read 6, iclass 40, count 0 2006.229.17:33:04.20#ibcon#read 6, iclass 40, count 0 2006.229.17:33:04.20#ibcon#end of sib2, iclass 40, count 0 2006.229.17:33:04.20#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:33:04.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:33:04.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:33:04.20#ibcon#*before write, iclass 40, count 0 2006.229.17:33:04.20#ibcon#enter sib2, iclass 40, count 0 2006.229.17:33:04.20#ibcon#flushed, iclass 40, count 0 2006.229.17:33:04.20#ibcon#about to write, iclass 40, count 0 2006.229.17:33:04.20#ibcon#wrote, iclass 40, count 0 2006.229.17:33:04.20#ibcon#about to read 3, iclass 40, count 0 2006.229.17:33:04.24#ibcon#read 3, iclass 40, count 0 2006.229.17:33:04.24#ibcon#about to read 4, iclass 40, count 0 2006.229.17:33:04.24#ibcon#read 4, iclass 40, count 0 2006.229.17:33:04.24#ibcon#about to read 5, iclass 40, count 0 2006.229.17:33:04.24#ibcon#read 5, iclass 40, count 0 2006.229.17:33:04.24#ibcon#about to read 6, iclass 40, count 0 2006.229.17:33:04.24#ibcon#read 6, iclass 40, count 0 2006.229.17:33:04.24#ibcon#end of sib2, iclass 40, count 0 2006.229.17:33:04.24#ibcon#*after write, iclass 40, count 0 2006.229.17:33:04.24#ibcon#*before return 0, iclass 40, count 0 2006.229.17:33:04.24#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:04.24#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:04.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:33:04.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:33:04.24$vck44/va=4,7 2006.229.17:33:04.24#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.17:33:04.24#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.17:33:04.24#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:04.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:04.30#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:04.30#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:04.30#ibcon#enter wrdev, iclass 4, count 2 2006.229.17:33:04.30#ibcon#first serial, iclass 4, count 2 2006.229.17:33:04.30#ibcon#enter sib2, iclass 4, count 2 2006.229.17:33:04.30#ibcon#flushed, iclass 4, count 2 2006.229.17:33:04.30#ibcon#about to write, iclass 4, count 2 2006.229.17:33:04.30#ibcon#wrote, iclass 4, count 2 2006.229.17:33:04.30#ibcon#about to read 3, iclass 4, count 2 2006.229.17:33:04.32#ibcon#read 3, iclass 4, count 2 2006.229.17:33:04.32#ibcon#about to read 4, iclass 4, count 2 2006.229.17:33:04.32#ibcon#read 4, iclass 4, count 2 2006.229.17:33:04.32#ibcon#about to read 5, iclass 4, count 2 2006.229.17:33:04.32#ibcon#read 5, iclass 4, count 2 2006.229.17:33:04.32#ibcon#about to read 6, iclass 4, count 2 2006.229.17:33:04.32#ibcon#read 6, iclass 4, count 2 2006.229.17:33:04.32#ibcon#end of sib2, iclass 4, count 2 2006.229.17:33:04.32#ibcon#*mode == 0, iclass 4, count 2 2006.229.17:33:04.32#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.17:33:04.32#ibcon#[25=AT04-07\r\n] 2006.229.17:33:04.32#ibcon#*before write, iclass 4, count 2 2006.229.17:33:04.32#ibcon#enter sib2, iclass 4, count 2 2006.229.17:33:04.32#ibcon#flushed, iclass 4, count 2 2006.229.17:33:04.32#ibcon#about to write, iclass 4, count 2 2006.229.17:33:04.32#ibcon#wrote, iclass 4, count 2 2006.229.17:33:04.32#ibcon#about to read 3, iclass 4, count 2 2006.229.17:33:04.35#ibcon#read 3, iclass 4, count 2 2006.229.17:33:04.35#ibcon#about to read 4, iclass 4, count 2 2006.229.17:33:04.35#ibcon#read 4, iclass 4, count 2 2006.229.17:33:04.35#ibcon#about to read 5, iclass 4, count 2 2006.229.17:33:04.35#ibcon#read 5, iclass 4, count 2 2006.229.17:33:04.35#ibcon#about to read 6, iclass 4, count 2 2006.229.17:33:04.35#ibcon#read 6, iclass 4, count 2 2006.229.17:33:04.35#ibcon#end of sib2, iclass 4, count 2 2006.229.17:33:04.35#ibcon#*after write, iclass 4, count 2 2006.229.17:33:04.35#ibcon#*before return 0, iclass 4, count 2 2006.229.17:33:04.35#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:04.35#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:04.35#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.17:33:04.35#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:04.35#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:04.47#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:04.47#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:04.47#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:33:04.47#ibcon#first serial, iclass 4, count 0 2006.229.17:33:04.47#ibcon#enter sib2, iclass 4, count 0 2006.229.17:33:04.47#ibcon#flushed, iclass 4, count 0 2006.229.17:33:04.47#ibcon#about to write, iclass 4, count 0 2006.229.17:33:04.47#ibcon#wrote, iclass 4, count 0 2006.229.17:33:04.47#ibcon#about to read 3, iclass 4, count 0 2006.229.17:33:04.49#ibcon#read 3, iclass 4, count 0 2006.229.17:33:04.49#ibcon#about to read 4, iclass 4, count 0 2006.229.17:33:04.49#ibcon#read 4, iclass 4, count 0 2006.229.17:33:04.49#ibcon#about to read 5, iclass 4, count 0 2006.229.17:33:04.49#ibcon#read 5, iclass 4, count 0 2006.229.17:33:04.49#ibcon#about to read 6, iclass 4, count 0 2006.229.17:33:04.49#ibcon#read 6, iclass 4, count 0 2006.229.17:33:04.49#ibcon#end of sib2, iclass 4, count 0 2006.229.17:33:04.49#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:33:04.49#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:33:04.49#ibcon#[25=USB\r\n] 2006.229.17:33:04.49#ibcon#*before write, iclass 4, count 0 2006.229.17:33:04.49#ibcon#enter sib2, iclass 4, count 0 2006.229.17:33:04.49#ibcon#flushed, iclass 4, count 0 2006.229.17:33:04.49#ibcon#about to write, iclass 4, count 0 2006.229.17:33:04.49#ibcon#wrote, iclass 4, count 0 2006.229.17:33:04.49#ibcon#about to read 3, iclass 4, count 0 2006.229.17:33:04.52#ibcon#read 3, iclass 4, count 0 2006.229.17:33:04.52#ibcon#about to read 4, iclass 4, count 0 2006.229.17:33:04.52#ibcon#read 4, iclass 4, count 0 2006.229.17:33:04.52#ibcon#about to read 5, iclass 4, count 0 2006.229.17:33:04.52#ibcon#read 5, iclass 4, count 0 2006.229.17:33:04.52#ibcon#about to read 6, iclass 4, count 0 2006.229.17:33:04.52#ibcon#read 6, iclass 4, count 0 2006.229.17:33:04.52#ibcon#end of sib2, iclass 4, count 0 2006.229.17:33:04.52#ibcon#*after write, iclass 4, count 0 2006.229.17:33:04.52#ibcon#*before return 0, iclass 4, count 0 2006.229.17:33:04.52#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:04.52#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:04.52#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:33:04.52#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:33:04.52$vck44/valo=5,734.99 2006.229.17:33:04.52#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.17:33:04.52#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.17:33:04.52#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:04.52#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:04.52#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:04.52#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:04.52#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:33:04.52#ibcon#first serial, iclass 6, count 0 2006.229.17:33:04.52#ibcon#enter sib2, iclass 6, count 0 2006.229.17:33:04.52#ibcon#flushed, iclass 6, count 0 2006.229.17:33:04.52#ibcon#about to write, iclass 6, count 0 2006.229.17:33:04.52#ibcon#wrote, iclass 6, count 0 2006.229.17:33:04.52#ibcon#about to read 3, iclass 6, count 0 2006.229.17:33:04.54#ibcon#read 3, iclass 6, count 0 2006.229.17:33:04.54#ibcon#about to read 4, iclass 6, count 0 2006.229.17:33:04.54#ibcon#read 4, iclass 6, count 0 2006.229.17:33:04.54#ibcon#about to read 5, iclass 6, count 0 2006.229.17:33:04.54#ibcon#read 5, iclass 6, count 0 2006.229.17:33:04.54#ibcon#about to read 6, iclass 6, count 0 2006.229.17:33:04.54#ibcon#read 6, iclass 6, count 0 2006.229.17:33:04.54#ibcon#end of sib2, iclass 6, count 0 2006.229.17:33:04.54#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:33:04.54#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:33:04.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:33:04.54#ibcon#*before write, iclass 6, count 0 2006.229.17:33:04.54#ibcon#enter sib2, iclass 6, count 0 2006.229.17:33:04.54#ibcon#flushed, iclass 6, count 0 2006.229.17:33:04.54#ibcon#about to write, iclass 6, count 0 2006.229.17:33:04.54#ibcon#wrote, iclass 6, count 0 2006.229.17:33:04.54#ibcon#about to read 3, iclass 6, count 0 2006.229.17:33:04.58#ibcon#read 3, iclass 6, count 0 2006.229.17:33:04.58#ibcon#about to read 4, iclass 6, count 0 2006.229.17:33:04.58#ibcon#read 4, iclass 6, count 0 2006.229.17:33:04.58#ibcon#about to read 5, iclass 6, count 0 2006.229.17:33:04.58#ibcon#read 5, iclass 6, count 0 2006.229.17:33:04.58#ibcon#about to read 6, iclass 6, count 0 2006.229.17:33:04.58#ibcon#read 6, iclass 6, count 0 2006.229.17:33:04.58#ibcon#end of sib2, iclass 6, count 0 2006.229.17:33:04.58#ibcon#*after write, iclass 6, count 0 2006.229.17:33:04.58#ibcon#*before return 0, iclass 6, count 0 2006.229.17:33:04.58#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:04.58#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:04.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:33:04.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:33:04.58$vck44/va=5,4 2006.229.17:33:04.58#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.17:33:04.58#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.17:33:04.58#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:04.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:04.64#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:04.64#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:04.64#ibcon#enter wrdev, iclass 10, count 2 2006.229.17:33:04.64#ibcon#first serial, iclass 10, count 2 2006.229.17:33:04.64#ibcon#enter sib2, iclass 10, count 2 2006.229.17:33:04.64#ibcon#flushed, iclass 10, count 2 2006.229.17:33:04.64#ibcon#about to write, iclass 10, count 2 2006.229.17:33:04.64#ibcon#wrote, iclass 10, count 2 2006.229.17:33:04.64#ibcon#about to read 3, iclass 10, count 2 2006.229.17:33:04.66#ibcon#read 3, iclass 10, count 2 2006.229.17:33:04.66#ibcon#about to read 4, iclass 10, count 2 2006.229.17:33:04.66#ibcon#read 4, iclass 10, count 2 2006.229.17:33:04.66#ibcon#about to read 5, iclass 10, count 2 2006.229.17:33:04.66#ibcon#read 5, iclass 10, count 2 2006.229.17:33:04.66#ibcon#about to read 6, iclass 10, count 2 2006.229.17:33:04.66#ibcon#read 6, iclass 10, count 2 2006.229.17:33:04.66#ibcon#end of sib2, iclass 10, count 2 2006.229.17:33:04.66#ibcon#*mode == 0, iclass 10, count 2 2006.229.17:33:04.66#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.17:33:04.66#ibcon#[25=AT05-04\r\n] 2006.229.17:33:04.66#ibcon#*before write, iclass 10, count 2 2006.229.17:33:04.66#ibcon#enter sib2, iclass 10, count 2 2006.229.17:33:04.66#ibcon#flushed, iclass 10, count 2 2006.229.17:33:04.66#ibcon#about to write, iclass 10, count 2 2006.229.17:33:04.66#ibcon#wrote, iclass 10, count 2 2006.229.17:33:04.66#ibcon#about to read 3, iclass 10, count 2 2006.229.17:33:04.69#ibcon#read 3, iclass 10, count 2 2006.229.17:33:04.69#ibcon#about to read 4, iclass 10, count 2 2006.229.17:33:04.69#ibcon#read 4, iclass 10, count 2 2006.229.17:33:04.69#ibcon#about to read 5, iclass 10, count 2 2006.229.17:33:04.69#ibcon#read 5, iclass 10, count 2 2006.229.17:33:04.69#ibcon#about to read 6, iclass 10, count 2 2006.229.17:33:04.69#ibcon#read 6, iclass 10, count 2 2006.229.17:33:04.69#ibcon#end of sib2, iclass 10, count 2 2006.229.17:33:04.69#ibcon#*after write, iclass 10, count 2 2006.229.17:33:04.69#ibcon#*before return 0, iclass 10, count 2 2006.229.17:33:04.69#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:04.69#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:04.69#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.17:33:04.69#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:04.69#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:04.81#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:04.81#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:04.81#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:33:04.81#ibcon#first serial, iclass 10, count 0 2006.229.17:33:04.81#ibcon#enter sib2, iclass 10, count 0 2006.229.17:33:04.81#ibcon#flushed, iclass 10, count 0 2006.229.17:33:04.81#ibcon#about to write, iclass 10, count 0 2006.229.17:33:04.81#ibcon#wrote, iclass 10, count 0 2006.229.17:33:04.81#ibcon#about to read 3, iclass 10, count 0 2006.229.17:33:04.83#ibcon#read 3, iclass 10, count 0 2006.229.17:33:04.83#ibcon#about to read 4, iclass 10, count 0 2006.229.17:33:04.83#ibcon#read 4, iclass 10, count 0 2006.229.17:33:04.83#ibcon#about to read 5, iclass 10, count 0 2006.229.17:33:04.83#ibcon#read 5, iclass 10, count 0 2006.229.17:33:04.83#ibcon#about to read 6, iclass 10, count 0 2006.229.17:33:04.83#ibcon#read 6, iclass 10, count 0 2006.229.17:33:04.83#ibcon#end of sib2, iclass 10, count 0 2006.229.17:33:04.83#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:33:04.83#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:33:04.83#ibcon#[25=USB\r\n] 2006.229.17:33:04.83#ibcon#*before write, iclass 10, count 0 2006.229.17:33:04.83#ibcon#enter sib2, iclass 10, count 0 2006.229.17:33:04.83#ibcon#flushed, iclass 10, count 0 2006.229.17:33:04.83#ibcon#about to write, iclass 10, count 0 2006.229.17:33:04.83#ibcon#wrote, iclass 10, count 0 2006.229.17:33:04.83#ibcon#about to read 3, iclass 10, count 0 2006.229.17:33:04.86#ibcon#read 3, iclass 10, count 0 2006.229.17:33:04.86#ibcon#about to read 4, iclass 10, count 0 2006.229.17:33:04.86#ibcon#read 4, iclass 10, count 0 2006.229.17:33:04.86#ibcon#about to read 5, iclass 10, count 0 2006.229.17:33:04.86#ibcon#read 5, iclass 10, count 0 2006.229.17:33:04.86#ibcon#about to read 6, iclass 10, count 0 2006.229.17:33:04.86#ibcon#read 6, iclass 10, count 0 2006.229.17:33:04.86#ibcon#end of sib2, iclass 10, count 0 2006.229.17:33:04.86#ibcon#*after write, iclass 10, count 0 2006.229.17:33:04.86#ibcon#*before return 0, iclass 10, count 0 2006.229.17:33:04.86#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:04.86#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:04.86#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:33:04.86#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:33:04.86$vck44/valo=6,814.99 2006.229.17:33:04.86#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.17:33:04.86#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.17:33:04.86#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:04.86#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:04.86#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:04.86#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:04.86#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:33:04.86#ibcon#first serial, iclass 12, count 0 2006.229.17:33:04.86#ibcon#enter sib2, iclass 12, count 0 2006.229.17:33:04.86#ibcon#flushed, iclass 12, count 0 2006.229.17:33:04.86#ibcon#about to write, iclass 12, count 0 2006.229.17:33:04.86#ibcon#wrote, iclass 12, count 0 2006.229.17:33:04.86#ibcon#about to read 3, iclass 12, count 0 2006.229.17:33:04.88#ibcon#read 3, iclass 12, count 0 2006.229.17:33:04.88#ibcon#about to read 4, iclass 12, count 0 2006.229.17:33:04.88#ibcon#read 4, iclass 12, count 0 2006.229.17:33:04.88#ibcon#about to read 5, iclass 12, count 0 2006.229.17:33:04.88#ibcon#read 5, iclass 12, count 0 2006.229.17:33:04.88#ibcon#about to read 6, iclass 12, count 0 2006.229.17:33:04.88#ibcon#read 6, iclass 12, count 0 2006.229.17:33:04.88#ibcon#end of sib2, iclass 12, count 0 2006.229.17:33:04.88#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:33:04.88#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:33:04.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:33:04.88#ibcon#*before write, iclass 12, count 0 2006.229.17:33:04.88#ibcon#enter sib2, iclass 12, count 0 2006.229.17:33:04.88#ibcon#flushed, iclass 12, count 0 2006.229.17:33:04.88#ibcon#about to write, iclass 12, count 0 2006.229.17:33:04.88#ibcon#wrote, iclass 12, count 0 2006.229.17:33:04.88#ibcon#about to read 3, iclass 12, count 0 2006.229.17:33:04.92#ibcon#read 3, iclass 12, count 0 2006.229.17:33:04.92#ibcon#about to read 4, iclass 12, count 0 2006.229.17:33:04.92#ibcon#read 4, iclass 12, count 0 2006.229.17:33:04.92#ibcon#about to read 5, iclass 12, count 0 2006.229.17:33:04.92#ibcon#read 5, iclass 12, count 0 2006.229.17:33:04.92#ibcon#about to read 6, iclass 12, count 0 2006.229.17:33:04.92#ibcon#read 6, iclass 12, count 0 2006.229.17:33:04.92#ibcon#end of sib2, iclass 12, count 0 2006.229.17:33:04.92#ibcon#*after write, iclass 12, count 0 2006.229.17:33:04.92#ibcon#*before return 0, iclass 12, count 0 2006.229.17:33:04.92#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:04.92#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:04.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:33:04.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:33:04.92$vck44/va=6,4 2006.229.17:33:04.92#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.17:33:04.92#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.17:33:04.92#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:04.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:04.98#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:04.98#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:04.98#ibcon#enter wrdev, iclass 14, count 2 2006.229.17:33:04.98#ibcon#first serial, iclass 14, count 2 2006.229.17:33:04.98#ibcon#enter sib2, iclass 14, count 2 2006.229.17:33:04.98#ibcon#flushed, iclass 14, count 2 2006.229.17:33:04.98#ibcon#about to write, iclass 14, count 2 2006.229.17:33:04.98#ibcon#wrote, iclass 14, count 2 2006.229.17:33:04.98#ibcon#about to read 3, iclass 14, count 2 2006.229.17:33:05.00#ibcon#read 3, iclass 14, count 2 2006.229.17:33:05.00#ibcon#about to read 4, iclass 14, count 2 2006.229.17:33:05.00#ibcon#read 4, iclass 14, count 2 2006.229.17:33:05.00#ibcon#about to read 5, iclass 14, count 2 2006.229.17:33:05.00#ibcon#read 5, iclass 14, count 2 2006.229.17:33:05.00#ibcon#about to read 6, iclass 14, count 2 2006.229.17:33:05.00#ibcon#read 6, iclass 14, count 2 2006.229.17:33:05.00#ibcon#end of sib2, iclass 14, count 2 2006.229.17:33:05.00#ibcon#*mode == 0, iclass 14, count 2 2006.229.17:33:05.00#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.17:33:05.00#ibcon#[25=AT06-04\r\n] 2006.229.17:33:05.00#ibcon#*before write, iclass 14, count 2 2006.229.17:33:05.00#ibcon#enter sib2, iclass 14, count 2 2006.229.17:33:05.00#ibcon#flushed, iclass 14, count 2 2006.229.17:33:05.00#ibcon#about to write, iclass 14, count 2 2006.229.17:33:05.00#ibcon#wrote, iclass 14, count 2 2006.229.17:33:05.00#ibcon#about to read 3, iclass 14, count 2 2006.229.17:33:05.03#ibcon#read 3, iclass 14, count 2 2006.229.17:33:05.03#ibcon#about to read 4, iclass 14, count 2 2006.229.17:33:05.03#ibcon#read 4, iclass 14, count 2 2006.229.17:33:05.03#ibcon#about to read 5, iclass 14, count 2 2006.229.17:33:05.03#ibcon#read 5, iclass 14, count 2 2006.229.17:33:05.03#ibcon#about to read 6, iclass 14, count 2 2006.229.17:33:05.03#ibcon#read 6, iclass 14, count 2 2006.229.17:33:05.03#ibcon#end of sib2, iclass 14, count 2 2006.229.17:33:05.03#ibcon#*after write, iclass 14, count 2 2006.229.17:33:05.03#ibcon#*before return 0, iclass 14, count 2 2006.229.17:33:05.03#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:05.03#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:05.03#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.17:33:05.03#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:05.03#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:05.15#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:05.15#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:05.15#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:33:05.15#ibcon#first serial, iclass 14, count 0 2006.229.17:33:05.15#ibcon#enter sib2, iclass 14, count 0 2006.229.17:33:05.15#ibcon#flushed, iclass 14, count 0 2006.229.17:33:05.15#ibcon#about to write, iclass 14, count 0 2006.229.17:33:05.15#ibcon#wrote, iclass 14, count 0 2006.229.17:33:05.15#ibcon#about to read 3, iclass 14, count 0 2006.229.17:33:05.17#ibcon#read 3, iclass 14, count 0 2006.229.17:33:05.17#ibcon#about to read 4, iclass 14, count 0 2006.229.17:33:05.17#ibcon#read 4, iclass 14, count 0 2006.229.17:33:05.17#ibcon#about to read 5, iclass 14, count 0 2006.229.17:33:05.17#ibcon#read 5, iclass 14, count 0 2006.229.17:33:05.17#ibcon#about to read 6, iclass 14, count 0 2006.229.17:33:05.17#ibcon#read 6, iclass 14, count 0 2006.229.17:33:05.17#ibcon#end of sib2, iclass 14, count 0 2006.229.17:33:05.17#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:33:05.17#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:33:05.17#ibcon#[25=USB\r\n] 2006.229.17:33:05.17#ibcon#*before write, iclass 14, count 0 2006.229.17:33:05.17#ibcon#enter sib2, iclass 14, count 0 2006.229.17:33:05.17#ibcon#flushed, iclass 14, count 0 2006.229.17:33:05.17#ibcon#about to write, iclass 14, count 0 2006.229.17:33:05.17#ibcon#wrote, iclass 14, count 0 2006.229.17:33:05.17#ibcon#about to read 3, iclass 14, count 0 2006.229.17:33:05.20#ibcon#read 3, iclass 14, count 0 2006.229.17:33:05.20#ibcon#about to read 4, iclass 14, count 0 2006.229.17:33:05.20#ibcon#read 4, iclass 14, count 0 2006.229.17:33:05.20#ibcon#about to read 5, iclass 14, count 0 2006.229.17:33:05.20#ibcon#read 5, iclass 14, count 0 2006.229.17:33:05.20#ibcon#about to read 6, iclass 14, count 0 2006.229.17:33:05.20#ibcon#read 6, iclass 14, count 0 2006.229.17:33:05.20#ibcon#end of sib2, iclass 14, count 0 2006.229.17:33:05.20#ibcon#*after write, iclass 14, count 0 2006.229.17:33:05.20#ibcon#*before return 0, iclass 14, count 0 2006.229.17:33:05.20#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:05.20#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:05.20#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:33:05.20#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:33:05.20$vck44/valo=7,864.99 2006.229.17:33:05.20#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.17:33:05.20#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.17:33:05.20#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:05.20#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:05.20#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:05.20#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:05.20#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:33:05.20#ibcon#first serial, iclass 16, count 0 2006.229.17:33:05.20#ibcon#enter sib2, iclass 16, count 0 2006.229.17:33:05.20#ibcon#flushed, iclass 16, count 0 2006.229.17:33:05.20#ibcon#about to write, iclass 16, count 0 2006.229.17:33:05.20#ibcon#wrote, iclass 16, count 0 2006.229.17:33:05.20#ibcon#about to read 3, iclass 16, count 0 2006.229.17:33:05.22#ibcon#read 3, iclass 16, count 0 2006.229.17:33:05.22#ibcon#about to read 4, iclass 16, count 0 2006.229.17:33:05.22#ibcon#read 4, iclass 16, count 0 2006.229.17:33:05.22#ibcon#about to read 5, iclass 16, count 0 2006.229.17:33:05.22#ibcon#read 5, iclass 16, count 0 2006.229.17:33:05.22#ibcon#about to read 6, iclass 16, count 0 2006.229.17:33:05.22#ibcon#read 6, iclass 16, count 0 2006.229.17:33:05.22#ibcon#end of sib2, iclass 16, count 0 2006.229.17:33:05.22#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:33:05.22#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:33:05.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:33:05.22#ibcon#*before write, iclass 16, count 0 2006.229.17:33:05.22#ibcon#enter sib2, iclass 16, count 0 2006.229.17:33:05.22#ibcon#flushed, iclass 16, count 0 2006.229.17:33:05.22#ibcon#about to write, iclass 16, count 0 2006.229.17:33:05.22#ibcon#wrote, iclass 16, count 0 2006.229.17:33:05.22#ibcon#about to read 3, iclass 16, count 0 2006.229.17:33:05.26#ibcon#read 3, iclass 16, count 0 2006.229.17:33:05.26#ibcon#about to read 4, iclass 16, count 0 2006.229.17:33:05.26#ibcon#read 4, iclass 16, count 0 2006.229.17:33:05.26#ibcon#about to read 5, iclass 16, count 0 2006.229.17:33:05.26#ibcon#read 5, iclass 16, count 0 2006.229.17:33:05.26#ibcon#about to read 6, iclass 16, count 0 2006.229.17:33:05.26#ibcon#read 6, iclass 16, count 0 2006.229.17:33:05.26#ibcon#end of sib2, iclass 16, count 0 2006.229.17:33:05.26#ibcon#*after write, iclass 16, count 0 2006.229.17:33:05.26#ibcon#*before return 0, iclass 16, count 0 2006.229.17:33:05.26#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:05.26#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:05.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:33:05.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:33:05.26$vck44/va=7,5 2006.229.17:33:05.26#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.17:33:05.26#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.17:33:05.26#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:05.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:05.32#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:05.32#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:05.32#ibcon#enter wrdev, iclass 18, count 2 2006.229.17:33:05.32#ibcon#first serial, iclass 18, count 2 2006.229.17:33:05.32#ibcon#enter sib2, iclass 18, count 2 2006.229.17:33:05.32#ibcon#flushed, iclass 18, count 2 2006.229.17:33:05.32#ibcon#about to write, iclass 18, count 2 2006.229.17:33:05.32#ibcon#wrote, iclass 18, count 2 2006.229.17:33:05.32#ibcon#about to read 3, iclass 18, count 2 2006.229.17:33:05.34#ibcon#read 3, iclass 18, count 2 2006.229.17:33:05.34#ibcon#about to read 4, iclass 18, count 2 2006.229.17:33:05.34#ibcon#read 4, iclass 18, count 2 2006.229.17:33:05.34#ibcon#about to read 5, iclass 18, count 2 2006.229.17:33:05.34#ibcon#read 5, iclass 18, count 2 2006.229.17:33:05.34#ibcon#about to read 6, iclass 18, count 2 2006.229.17:33:05.34#ibcon#read 6, iclass 18, count 2 2006.229.17:33:05.34#ibcon#end of sib2, iclass 18, count 2 2006.229.17:33:05.34#ibcon#*mode == 0, iclass 18, count 2 2006.229.17:33:05.34#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.17:33:05.34#ibcon#[25=AT07-05\r\n] 2006.229.17:33:05.34#ibcon#*before write, iclass 18, count 2 2006.229.17:33:05.34#ibcon#enter sib2, iclass 18, count 2 2006.229.17:33:05.34#ibcon#flushed, iclass 18, count 2 2006.229.17:33:05.34#ibcon#about to write, iclass 18, count 2 2006.229.17:33:05.34#ibcon#wrote, iclass 18, count 2 2006.229.17:33:05.34#ibcon#about to read 3, iclass 18, count 2 2006.229.17:33:05.37#ibcon#read 3, iclass 18, count 2 2006.229.17:33:05.37#ibcon#about to read 4, iclass 18, count 2 2006.229.17:33:05.37#ibcon#read 4, iclass 18, count 2 2006.229.17:33:05.37#ibcon#about to read 5, iclass 18, count 2 2006.229.17:33:05.37#ibcon#read 5, iclass 18, count 2 2006.229.17:33:05.37#ibcon#about to read 6, iclass 18, count 2 2006.229.17:33:05.37#ibcon#read 6, iclass 18, count 2 2006.229.17:33:05.37#ibcon#end of sib2, iclass 18, count 2 2006.229.17:33:05.37#ibcon#*after write, iclass 18, count 2 2006.229.17:33:05.37#ibcon#*before return 0, iclass 18, count 2 2006.229.17:33:05.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:05.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:05.37#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.17:33:05.37#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:05.37#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:05.49#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:05.49#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:05.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:33:05.49#ibcon#first serial, iclass 18, count 0 2006.229.17:33:05.49#ibcon#enter sib2, iclass 18, count 0 2006.229.17:33:05.49#ibcon#flushed, iclass 18, count 0 2006.229.17:33:05.49#ibcon#about to write, iclass 18, count 0 2006.229.17:33:05.49#ibcon#wrote, iclass 18, count 0 2006.229.17:33:05.49#ibcon#about to read 3, iclass 18, count 0 2006.229.17:33:05.51#ibcon#read 3, iclass 18, count 0 2006.229.17:33:05.51#ibcon#about to read 4, iclass 18, count 0 2006.229.17:33:05.51#ibcon#read 4, iclass 18, count 0 2006.229.17:33:05.51#ibcon#about to read 5, iclass 18, count 0 2006.229.17:33:05.51#ibcon#read 5, iclass 18, count 0 2006.229.17:33:05.51#ibcon#about to read 6, iclass 18, count 0 2006.229.17:33:05.51#ibcon#read 6, iclass 18, count 0 2006.229.17:33:05.51#ibcon#end of sib2, iclass 18, count 0 2006.229.17:33:05.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:33:05.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:33:05.51#ibcon#[25=USB\r\n] 2006.229.17:33:05.51#ibcon#*before write, iclass 18, count 0 2006.229.17:33:05.51#ibcon#enter sib2, iclass 18, count 0 2006.229.17:33:05.51#ibcon#flushed, iclass 18, count 0 2006.229.17:33:05.51#ibcon#about to write, iclass 18, count 0 2006.229.17:33:05.51#ibcon#wrote, iclass 18, count 0 2006.229.17:33:05.51#ibcon#about to read 3, iclass 18, count 0 2006.229.17:33:05.54#ibcon#read 3, iclass 18, count 0 2006.229.17:33:05.54#ibcon#about to read 4, iclass 18, count 0 2006.229.17:33:05.54#ibcon#read 4, iclass 18, count 0 2006.229.17:33:05.54#ibcon#about to read 5, iclass 18, count 0 2006.229.17:33:05.54#ibcon#read 5, iclass 18, count 0 2006.229.17:33:05.54#ibcon#about to read 6, iclass 18, count 0 2006.229.17:33:05.54#ibcon#read 6, iclass 18, count 0 2006.229.17:33:05.54#ibcon#end of sib2, iclass 18, count 0 2006.229.17:33:05.54#ibcon#*after write, iclass 18, count 0 2006.229.17:33:05.54#ibcon#*before return 0, iclass 18, count 0 2006.229.17:33:05.54#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:05.54#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:05.54#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:33:05.54#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:33:05.54$vck44/valo=8,884.99 2006.229.17:33:05.54#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.17:33:05.54#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.17:33:05.54#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:05.54#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:05.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:05.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:05.54#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:33:05.54#ibcon#first serial, iclass 20, count 0 2006.229.17:33:05.54#ibcon#enter sib2, iclass 20, count 0 2006.229.17:33:05.54#ibcon#flushed, iclass 20, count 0 2006.229.17:33:05.54#ibcon#about to write, iclass 20, count 0 2006.229.17:33:05.54#ibcon#wrote, iclass 20, count 0 2006.229.17:33:05.54#ibcon#about to read 3, iclass 20, count 0 2006.229.17:33:05.56#ibcon#read 3, iclass 20, count 0 2006.229.17:33:05.56#ibcon#about to read 4, iclass 20, count 0 2006.229.17:33:05.56#ibcon#read 4, iclass 20, count 0 2006.229.17:33:05.56#ibcon#about to read 5, iclass 20, count 0 2006.229.17:33:05.56#ibcon#read 5, iclass 20, count 0 2006.229.17:33:05.56#ibcon#about to read 6, iclass 20, count 0 2006.229.17:33:05.56#ibcon#read 6, iclass 20, count 0 2006.229.17:33:05.56#ibcon#end of sib2, iclass 20, count 0 2006.229.17:33:05.56#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:33:05.56#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:33:05.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:33:05.56#ibcon#*before write, iclass 20, count 0 2006.229.17:33:05.56#ibcon#enter sib2, iclass 20, count 0 2006.229.17:33:05.56#ibcon#flushed, iclass 20, count 0 2006.229.17:33:05.56#ibcon#about to write, iclass 20, count 0 2006.229.17:33:05.56#ibcon#wrote, iclass 20, count 0 2006.229.17:33:05.56#ibcon#about to read 3, iclass 20, count 0 2006.229.17:33:05.60#ibcon#read 3, iclass 20, count 0 2006.229.17:33:05.60#ibcon#about to read 4, iclass 20, count 0 2006.229.17:33:05.60#ibcon#read 4, iclass 20, count 0 2006.229.17:33:05.60#ibcon#about to read 5, iclass 20, count 0 2006.229.17:33:05.60#ibcon#read 5, iclass 20, count 0 2006.229.17:33:05.60#ibcon#about to read 6, iclass 20, count 0 2006.229.17:33:05.60#ibcon#read 6, iclass 20, count 0 2006.229.17:33:05.60#ibcon#end of sib2, iclass 20, count 0 2006.229.17:33:05.60#ibcon#*after write, iclass 20, count 0 2006.229.17:33:05.60#ibcon#*before return 0, iclass 20, count 0 2006.229.17:33:05.60#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:05.60#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:05.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:33:05.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:33:05.60$vck44/va=8,6 2006.229.17:33:05.60#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.17:33:05.60#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.17:33:05.60#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:05.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:33:05.66#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:33:05.66#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:33:05.66#ibcon#enter wrdev, iclass 22, count 2 2006.229.17:33:05.66#ibcon#first serial, iclass 22, count 2 2006.229.17:33:05.66#ibcon#enter sib2, iclass 22, count 2 2006.229.17:33:05.66#ibcon#flushed, iclass 22, count 2 2006.229.17:33:05.66#ibcon#about to write, iclass 22, count 2 2006.229.17:33:05.66#ibcon#wrote, iclass 22, count 2 2006.229.17:33:05.66#ibcon#about to read 3, iclass 22, count 2 2006.229.17:33:05.68#ibcon#read 3, iclass 22, count 2 2006.229.17:33:05.68#ibcon#about to read 4, iclass 22, count 2 2006.229.17:33:05.68#ibcon#read 4, iclass 22, count 2 2006.229.17:33:05.68#ibcon#about to read 5, iclass 22, count 2 2006.229.17:33:05.68#ibcon#read 5, iclass 22, count 2 2006.229.17:33:05.68#ibcon#about to read 6, iclass 22, count 2 2006.229.17:33:05.68#ibcon#read 6, iclass 22, count 2 2006.229.17:33:05.68#ibcon#end of sib2, iclass 22, count 2 2006.229.17:33:05.68#ibcon#*mode == 0, iclass 22, count 2 2006.229.17:33:05.68#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.17:33:05.68#ibcon#[25=AT08-06\r\n] 2006.229.17:33:05.68#ibcon#*before write, iclass 22, count 2 2006.229.17:33:05.68#ibcon#enter sib2, iclass 22, count 2 2006.229.17:33:05.68#ibcon#flushed, iclass 22, count 2 2006.229.17:33:05.68#ibcon#about to write, iclass 22, count 2 2006.229.17:33:05.68#ibcon#wrote, iclass 22, count 2 2006.229.17:33:05.68#ibcon#about to read 3, iclass 22, count 2 2006.229.17:33:05.71#ibcon#read 3, iclass 22, count 2 2006.229.17:33:05.71#ibcon#about to read 4, iclass 22, count 2 2006.229.17:33:05.71#ibcon#read 4, iclass 22, count 2 2006.229.17:33:05.71#ibcon#about to read 5, iclass 22, count 2 2006.229.17:33:05.71#ibcon#read 5, iclass 22, count 2 2006.229.17:33:05.71#ibcon#about to read 6, iclass 22, count 2 2006.229.17:33:05.71#ibcon#read 6, iclass 22, count 2 2006.229.17:33:05.71#ibcon#end of sib2, iclass 22, count 2 2006.229.17:33:05.71#ibcon#*after write, iclass 22, count 2 2006.229.17:33:05.71#ibcon#*before return 0, iclass 22, count 2 2006.229.17:33:05.71#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:33:05.71#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.17:33:05.71#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.17:33:05.71#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:05.71#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:33:05.83#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:33:05.83#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:33:05.83#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:33:05.83#ibcon#first serial, iclass 22, count 0 2006.229.17:33:05.83#ibcon#enter sib2, iclass 22, count 0 2006.229.17:33:05.83#ibcon#flushed, iclass 22, count 0 2006.229.17:33:05.83#ibcon#about to write, iclass 22, count 0 2006.229.17:33:05.83#ibcon#wrote, iclass 22, count 0 2006.229.17:33:05.83#ibcon#about to read 3, iclass 22, count 0 2006.229.17:33:05.85#ibcon#read 3, iclass 22, count 0 2006.229.17:33:05.85#ibcon#about to read 4, iclass 22, count 0 2006.229.17:33:05.85#ibcon#read 4, iclass 22, count 0 2006.229.17:33:05.85#ibcon#about to read 5, iclass 22, count 0 2006.229.17:33:05.85#ibcon#read 5, iclass 22, count 0 2006.229.17:33:05.85#ibcon#about to read 6, iclass 22, count 0 2006.229.17:33:05.85#ibcon#read 6, iclass 22, count 0 2006.229.17:33:05.85#ibcon#end of sib2, iclass 22, count 0 2006.229.17:33:05.85#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:33:05.85#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:33:05.85#ibcon#[25=USB\r\n] 2006.229.17:33:05.85#ibcon#*before write, iclass 22, count 0 2006.229.17:33:05.85#ibcon#enter sib2, iclass 22, count 0 2006.229.17:33:05.85#ibcon#flushed, iclass 22, count 0 2006.229.17:33:05.85#ibcon#about to write, iclass 22, count 0 2006.229.17:33:05.85#ibcon#wrote, iclass 22, count 0 2006.229.17:33:05.85#ibcon#about to read 3, iclass 22, count 0 2006.229.17:33:05.88#ibcon#read 3, iclass 22, count 0 2006.229.17:33:05.88#ibcon#about to read 4, iclass 22, count 0 2006.229.17:33:05.88#ibcon#read 4, iclass 22, count 0 2006.229.17:33:05.88#ibcon#about to read 5, iclass 22, count 0 2006.229.17:33:05.88#ibcon#read 5, iclass 22, count 0 2006.229.17:33:05.88#ibcon#about to read 6, iclass 22, count 0 2006.229.17:33:05.88#ibcon#read 6, iclass 22, count 0 2006.229.17:33:05.88#ibcon#end of sib2, iclass 22, count 0 2006.229.17:33:05.88#ibcon#*after write, iclass 22, count 0 2006.229.17:33:05.88#ibcon#*before return 0, iclass 22, count 0 2006.229.17:33:05.88#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:33:05.88#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.17:33:05.88#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:33:05.88#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:33:05.88$vck44/vblo=1,629.99 2006.229.17:33:05.88#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.17:33:05.88#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.17:33:05.88#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:05.88#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:33:05.88#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:33:05.88#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:33:05.88#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:33:05.88#ibcon#first serial, iclass 24, count 0 2006.229.17:33:05.88#ibcon#enter sib2, iclass 24, count 0 2006.229.17:33:05.88#ibcon#flushed, iclass 24, count 0 2006.229.17:33:05.88#ibcon#about to write, iclass 24, count 0 2006.229.17:33:05.88#ibcon#wrote, iclass 24, count 0 2006.229.17:33:05.88#ibcon#about to read 3, iclass 24, count 0 2006.229.17:33:05.90#ibcon#read 3, iclass 24, count 0 2006.229.17:33:05.90#ibcon#about to read 4, iclass 24, count 0 2006.229.17:33:05.90#ibcon#read 4, iclass 24, count 0 2006.229.17:33:05.90#ibcon#about to read 5, iclass 24, count 0 2006.229.17:33:05.90#ibcon#read 5, iclass 24, count 0 2006.229.17:33:05.90#ibcon#about to read 6, iclass 24, count 0 2006.229.17:33:05.90#ibcon#read 6, iclass 24, count 0 2006.229.17:33:05.90#ibcon#end of sib2, iclass 24, count 0 2006.229.17:33:05.90#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:33:05.90#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:33:05.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:33:05.90#ibcon#*before write, iclass 24, count 0 2006.229.17:33:05.90#ibcon#enter sib2, iclass 24, count 0 2006.229.17:33:05.90#ibcon#flushed, iclass 24, count 0 2006.229.17:33:05.90#ibcon#about to write, iclass 24, count 0 2006.229.17:33:05.90#ibcon#wrote, iclass 24, count 0 2006.229.17:33:05.90#ibcon#about to read 3, iclass 24, count 0 2006.229.17:33:05.94#ibcon#read 3, iclass 24, count 0 2006.229.17:33:05.94#ibcon#about to read 4, iclass 24, count 0 2006.229.17:33:05.94#ibcon#read 4, iclass 24, count 0 2006.229.17:33:05.94#ibcon#about to read 5, iclass 24, count 0 2006.229.17:33:05.94#ibcon#read 5, iclass 24, count 0 2006.229.17:33:05.94#ibcon#about to read 6, iclass 24, count 0 2006.229.17:33:05.94#ibcon#read 6, iclass 24, count 0 2006.229.17:33:05.94#ibcon#end of sib2, iclass 24, count 0 2006.229.17:33:05.94#ibcon#*after write, iclass 24, count 0 2006.229.17:33:05.94#ibcon#*before return 0, iclass 24, count 0 2006.229.17:33:05.94#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:33:05.94#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.17:33:05.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:33:05.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:33:05.94$vck44/vb=1,4 2006.229.17:33:05.94#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.17:33:05.94#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.17:33:05.94#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:05.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:33:05.94#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:33:05.94#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:33:05.94#ibcon#enter wrdev, iclass 26, count 2 2006.229.17:33:05.94#ibcon#first serial, iclass 26, count 2 2006.229.17:33:05.94#ibcon#enter sib2, iclass 26, count 2 2006.229.17:33:05.94#ibcon#flushed, iclass 26, count 2 2006.229.17:33:05.94#ibcon#about to write, iclass 26, count 2 2006.229.17:33:05.94#ibcon#wrote, iclass 26, count 2 2006.229.17:33:05.94#ibcon#about to read 3, iclass 26, count 2 2006.229.17:33:05.96#ibcon#read 3, iclass 26, count 2 2006.229.17:33:05.96#ibcon#about to read 4, iclass 26, count 2 2006.229.17:33:05.96#ibcon#read 4, iclass 26, count 2 2006.229.17:33:05.96#ibcon#about to read 5, iclass 26, count 2 2006.229.17:33:05.96#ibcon#read 5, iclass 26, count 2 2006.229.17:33:05.96#ibcon#about to read 6, iclass 26, count 2 2006.229.17:33:05.96#ibcon#read 6, iclass 26, count 2 2006.229.17:33:05.96#ibcon#end of sib2, iclass 26, count 2 2006.229.17:33:05.96#ibcon#*mode == 0, iclass 26, count 2 2006.229.17:33:05.96#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.17:33:05.96#ibcon#[27=AT01-04\r\n] 2006.229.17:33:05.96#ibcon#*before write, iclass 26, count 2 2006.229.17:33:05.96#ibcon#enter sib2, iclass 26, count 2 2006.229.17:33:05.96#ibcon#flushed, iclass 26, count 2 2006.229.17:33:05.96#ibcon#about to write, iclass 26, count 2 2006.229.17:33:05.96#ibcon#wrote, iclass 26, count 2 2006.229.17:33:05.96#ibcon#about to read 3, iclass 26, count 2 2006.229.17:33:05.99#ibcon#read 3, iclass 26, count 2 2006.229.17:33:05.99#ibcon#about to read 4, iclass 26, count 2 2006.229.17:33:05.99#ibcon#read 4, iclass 26, count 2 2006.229.17:33:05.99#ibcon#about to read 5, iclass 26, count 2 2006.229.17:33:05.99#ibcon#read 5, iclass 26, count 2 2006.229.17:33:05.99#ibcon#about to read 6, iclass 26, count 2 2006.229.17:33:05.99#ibcon#read 6, iclass 26, count 2 2006.229.17:33:05.99#ibcon#end of sib2, iclass 26, count 2 2006.229.17:33:05.99#ibcon#*after write, iclass 26, count 2 2006.229.17:33:05.99#ibcon#*before return 0, iclass 26, count 2 2006.229.17:33:05.99#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:33:05.99#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.17:33:05.99#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.17:33:05.99#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:05.99#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:33:06.11#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:33:06.11#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:33:06.11#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:33:06.11#ibcon#first serial, iclass 26, count 0 2006.229.17:33:06.11#ibcon#enter sib2, iclass 26, count 0 2006.229.17:33:06.11#ibcon#flushed, iclass 26, count 0 2006.229.17:33:06.11#ibcon#about to write, iclass 26, count 0 2006.229.17:33:06.11#ibcon#wrote, iclass 26, count 0 2006.229.17:33:06.11#ibcon#about to read 3, iclass 26, count 0 2006.229.17:33:06.13#ibcon#read 3, iclass 26, count 0 2006.229.17:33:06.13#ibcon#about to read 4, iclass 26, count 0 2006.229.17:33:06.13#ibcon#read 4, iclass 26, count 0 2006.229.17:33:06.13#ibcon#about to read 5, iclass 26, count 0 2006.229.17:33:06.13#ibcon#read 5, iclass 26, count 0 2006.229.17:33:06.13#ibcon#about to read 6, iclass 26, count 0 2006.229.17:33:06.13#ibcon#read 6, iclass 26, count 0 2006.229.17:33:06.13#ibcon#end of sib2, iclass 26, count 0 2006.229.17:33:06.13#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:33:06.13#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:33:06.13#ibcon#[27=USB\r\n] 2006.229.17:33:06.13#ibcon#*before write, iclass 26, count 0 2006.229.17:33:06.13#ibcon#enter sib2, iclass 26, count 0 2006.229.17:33:06.13#ibcon#flushed, iclass 26, count 0 2006.229.17:33:06.13#ibcon#about to write, iclass 26, count 0 2006.229.17:33:06.13#ibcon#wrote, iclass 26, count 0 2006.229.17:33:06.13#ibcon#about to read 3, iclass 26, count 0 2006.229.17:33:06.16#ibcon#read 3, iclass 26, count 0 2006.229.17:33:06.16#ibcon#about to read 4, iclass 26, count 0 2006.229.17:33:06.16#ibcon#read 4, iclass 26, count 0 2006.229.17:33:06.16#ibcon#about to read 5, iclass 26, count 0 2006.229.17:33:06.16#ibcon#read 5, iclass 26, count 0 2006.229.17:33:06.16#ibcon#about to read 6, iclass 26, count 0 2006.229.17:33:06.16#ibcon#read 6, iclass 26, count 0 2006.229.17:33:06.16#ibcon#end of sib2, iclass 26, count 0 2006.229.17:33:06.16#ibcon#*after write, iclass 26, count 0 2006.229.17:33:06.16#ibcon#*before return 0, iclass 26, count 0 2006.229.17:33:06.16#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:33:06.16#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.17:33:06.16#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:33:06.16#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:33:06.16$vck44/vblo=2,634.99 2006.229.17:33:06.16#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.17:33:06.16#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.17:33:06.16#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:06.16#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:06.16#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:06.16#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:06.16#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:33:06.16#ibcon#first serial, iclass 28, count 0 2006.229.17:33:06.16#ibcon#enter sib2, iclass 28, count 0 2006.229.17:33:06.16#ibcon#flushed, iclass 28, count 0 2006.229.17:33:06.16#ibcon#about to write, iclass 28, count 0 2006.229.17:33:06.16#ibcon#wrote, iclass 28, count 0 2006.229.17:33:06.16#ibcon#about to read 3, iclass 28, count 0 2006.229.17:33:06.18#ibcon#read 3, iclass 28, count 0 2006.229.17:33:06.18#ibcon#about to read 4, iclass 28, count 0 2006.229.17:33:06.18#ibcon#read 4, iclass 28, count 0 2006.229.17:33:06.18#ibcon#about to read 5, iclass 28, count 0 2006.229.17:33:06.18#ibcon#read 5, iclass 28, count 0 2006.229.17:33:06.18#ibcon#about to read 6, iclass 28, count 0 2006.229.17:33:06.18#ibcon#read 6, iclass 28, count 0 2006.229.17:33:06.18#ibcon#end of sib2, iclass 28, count 0 2006.229.17:33:06.18#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:33:06.18#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:33:06.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:33:06.18#ibcon#*before write, iclass 28, count 0 2006.229.17:33:06.18#ibcon#enter sib2, iclass 28, count 0 2006.229.17:33:06.18#ibcon#flushed, iclass 28, count 0 2006.229.17:33:06.18#ibcon#about to write, iclass 28, count 0 2006.229.17:33:06.18#ibcon#wrote, iclass 28, count 0 2006.229.17:33:06.18#ibcon#about to read 3, iclass 28, count 0 2006.229.17:33:06.22#ibcon#read 3, iclass 28, count 0 2006.229.17:33:06.22#ibcon#about to read 4, iclass 28, count 0 2006.229.17:33:06.22#ibcon#read 4, iclass 28, count 0 2006.229.17:33:06.22#ibcon#about to read 5, iclass 28, count 0 2006.229.17:33:06.22#ibcon#read 5, iclass 28, count 0 2006.229.17:33:06.22#ibcon#about to read 6, iclass 28, count 0 2006.229.17:33:06.22#ibcon#read 6, iclass 28, count 0 2006.229.17:33:06.22#ibcon#end of sib2, iclass 28, count 0 2006.229.17:33:06.22#ibcon#*after write, iclass 28, count 0 2006.229.17:33:06.22#ibcon#*before return 0, iclass 28, count 0 2006.229.17:33:06.22#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:06.22#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.17:33:06.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:33:06.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:33:06.22$vck44/vb=2,4 2006.229.17:33:06.22#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.17:33:06.22#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.17:33:06.22#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:06.22#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:06.28#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:06.28#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:06.28#ibcon#enter wrdev, iclass 30, count 2 2006.229.17:33:06.28#ibcon#first serial, iclass 30, count 2 2006.229.17:33:06.28#ibcon#enter sib2, iclass 30, count 2 2006.229.17:33:06.28#ibcon#flushed, iclass 30, count 2 2006.229.17:33:06.28#ibcon#about to write, iclass 30, count 2 2006.229.17:33:06.28#ibcon#wrote, iclass 30, count 2 2006.229.17:33:06.28#ibcon#about to read 3, iclass 30, count 2 2006.229.17:33:06.30#ibcon#read 3, iclass 30, count 2 2006.229.17:33:06.30#ibcon#about to read 4, iclass 30, count 2 2006.229.17:33:06.30#ibcon#read 4, iclass 30, count 2 2006.229.17:33:06.30#ibcon#about to read 5, iclass 30, count 2 2006.229.17:33:06.30#ibcon#read 5, iclass 30, count 2 2006.229.17:33:06.30#ibcon#about to read 6, iclass 30, count 2 2006.229.17:33:06.30#ibcon#read 6, iclass 30, count 2 2006.229.17:33:06.30#ibcon#end of sib2, iclass 30, count 2 2006.229.17:33:06.30#ibcon#*mode == 0, iclass 30, count 2 2006.229.17:33:06.30#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.17:33:06.30#ibcon#[27=AT02-04\r\n] 2006.229.17:33:06.30#ibcon#*before write, iclass 30, count 2 2006.229.17:33:06.30#ibcon#enter sib2, iclass 30, count 2 2006.229.17:33:06.30#ibcon#flushed, iclass 30, count 2 2006.229.17:33:06.30#ibcon#about to write, iclass 30, count 2 2006.229.17:33:06.30#ibcon#wrote, iclass 30, count 2 2006.229.17:33:06.30#ibcon#about to read 3, iclass 30, count 2 2006.229.17:33:06.33#ibcon#read 3, iclass 30, count 2 2006.229.17:33:06.33#ibcon#about to read 4, iclass 30, count 2 2006.229.17:33:06.33#ibcon#read 4, iclass 30, count 2 2006.229.17:33:06.33#ibcon#about to read 5, iclass 30, count 2 2006.229.17:33:06.33#ibcon#read 5, iclass 30, count 2 2006.229.17:33:06.33#ibcon#about to read 6, iclass 30, count 2 2006.229.17:33:06.33#ibcon#read 6, iclass 30, count 2 2006.229.17:33:06.33#ibcon#end of sib2, iclass 30, count 2 2006.229.17:33:06.33#ibcon#*after write, iclass 30, count 2 2006.229.17:33:06.33#ibcon#*before return 0, iclass 30, count 2 2006.229.17:33:06.33#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:06.33#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.17:33:06.33#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.17:33:06.33#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:06.33#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:06.45#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:06.45#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:06.45#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:33:06.45#ibcon#first serial, iclass 30, count 0 2006.229.17:33:06.45#ibcon#enter sib2, iclass 30, count 0 2006.229.17:33:06.45#ibcon#flushed, iclass 30, count 0 2006.229.17:33:06.45#ibcon#about to write, iclass 30, count 0 2006.229.17:33:06.45#ibcon#wrote, iclass 30, count 0 2006.229.17:33:06.45#ibcon#about to read 3, iclass 30, count 0 2006.229.17:33:06.47#ibcon#read 3, iclass 30, count 0 2006.229.17:33:06.47#ibcon#about to read 4, iclass 30, count 0 2006.229.17:33:06.47#ibcon#read 4, iclass 30, count 0 2006.229.17:33:06.47#ibcon#about to read 5, iclass 30, count 0 2006.229.17:33:06.47#ibcon#read 5, iclass 30, count 0 2006.229.17:33:06.47#ibcon#about to read 6, iclass 30, count 0 2006.229.17:33:06.47#ibcon#read 6, iclass 30, count 0 2006.229.17:33:06.47#ibcon#end of sib2, iclass 30, count 0 2006.229.17:33:06.47#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:33:06.47#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:33:06.47#ibcon#[27=USB\r\n] 2006.229.17:33:06.47#ibcon#*before write, iclass 30, count 0 2006.229.17:33:06.47#ibcon#enter sib2, iclass 30, count 0 2006.229.17:33:06.47#ibcon#flushed, iclass 30, count 0 2006.229.17:33:06.47#ibcon#about to write, iclass 30, count 0 2006.229.17:33:06.47#ibcon#wrote, iclass 30, count 0 2006.229.17:33:06.47#ibcon#about to read 3, iclass 30, count 0 2006.229.17:33:06.50#ibcon#read 3, iclass 30, count 0 2006.229.17:33:06.50#ibcon#about to read 4, iclass 30, count 0 2006.229.17:33:06.50#ibcon#read 4, iclass 30, count 0 2006.229.17:33:06.50#ibcon#about to read 5, iclass 30, count 0 2006.229.17:33:06.50#ibcon#read 5, iclass 30, count 0 2006.229.17:33:06.50#ibcon#about to read 6, iclass 30, count 0 2006.229.17:33:06.50#ibcon#read 6, iclass 30, count 0 2006.229.17:33:06.50#ibcon#end of sib2, iclass 30, count 0 2006.229.17:33:06.50#ibcon#*after write, iclass 30, count 0 2006.229.17:33:06.50#ibcon#*before return 0, iclass 30, count 0 2006.229.17:33:06.50#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:06.50#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.17:33:06.50#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:33:06.50#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:33:06.50$vck44/vblo=3,649.99 2006.229.17:33:06.50#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.17:33:06.50#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.17:33:06.50#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:06.50#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:06.50#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:06.50#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:06.50#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:33:06.50#ibcon#first serial, iclass 32, count 0 2006.229.17:33:06.50#ibcon#enter sib2, iclass 32, count 0 2006.229.17:33:06.50#ibcon#flushed, iclass 32, count 0 2006.229.17:33:06.50#ibcon#about to write, iclass 32, count 0 2006.229.17:33:06.50#ibcon#wrote, iclass 32, count 0 2006.229.17:33:06.50#ibcon#about to read 3, iclass 32, count 0 2006.229.17:33:06.52#ibcon#read 3, iclass 32, count 0 2006.229.17:33:06.52#ibcon#about to read 4, iclass 32, count 0 2006.229.17:33:06.52#ibcon#read 4, iclass 32, count 0 2006.229.17:33:06.52#ibcon#about to read 5, iclass 32, count 0 2006.229.17:33:06.52#ibcon#read 5, iclass 32, count 0 2006.229.17:33:06.52#ibcon#about to read 6, iclass 32, count 0 2006.229.17:33:06.52#ibcon#read 6, iclass 32, count 0 2006.229.17:33:06.52#ibcon#end of sib2, iclass 32, count 0 2006.229.17:33:06.52#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:33:06.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:33:06.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:33:06.52#ibcon#*before write, iclass 32, count 0 2006.229.17:33:06.52#ibcon#enter sib2, iclass 32, count 0 2006.229.17:33:06.52#ibcon#flushed, iclass 32, count 0 2006.229.17:33:06.52#ibcon#about to write, iclass 32, count 0 2006.229.17:33:06.52#ibcon#wrote, iclass 32, count 0 2006.229.17:33:06.52#ibcon#about to read 3, iclass 32, count 0 2006.229.17:33:06.56#ibcon#read 3, iclass 32, count 0 2006.229.17:33:06.56#ibcon#about to read 4, iclass 32, count 0 2006.229.17:33:06.56#ibcon#read 4, iclass 32, count 0 2006.229.17:33:06.56#ibcon#about to read 5, iclass 32, count 0 2006.229.17:33:06.56#ibcon#read 5, iclass 32, count 0 2006.229.17:33:06.56#ibcon#about to read 6, iclass 32, count 0 2006.229.17:33:06.56#ibcon#read 6, iclass 32, count 0 2006.229.17:33:06.56#ibcon#end of sib2, iclass 32, count 0 2006.229.17:33:06.56#ibcon#*after write, iclass 32, count 0 2006.229.17:33:06.56#ibcon#*before return 0, iclass 32, count 0 2006.229.17:33:06.56#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:06.56#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.17:33:06.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:33:06.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:33:06.56$vck44/vb=3,4 2006.229.17:33:06.56#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.17:33:06.56#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.17:33:06.56#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:06.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:06.62#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:06.62#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:06.62#ibcon#enter wrdev, iclass 34, count 2 2006.229.17:33:06.62#ibcon#first serial, iclass 34, count 2 2006.229.17:33:06.62#ibcon#enter sib2, iclass 34, count 2 2006.229.17:33:06.62#ibcon#flushed, iclass 34, count 2 2006.229.17:33:06.62#ibcon#about to write, iclass 34, count 2 2006.229.17:33:06.62#ibcon#wrote, iclass 34, count 2 2006.229.17:33:06.62#ibcon#about to read 3, iclass 34, count 2 2006.229.17:33:06.64#ibcon#read 3, iclass 34, count 2 2006.229.17:33:06.64#ibcon#about to read 4, iclass 34, count 2 2006.229.17:33:06.64#ibcon#read 4, iclass 34, count 2 2006.229.17:33:06.64#ibcon#about to read 5, iclass 34, count 2 2006.229.17:33:06.64#ibcon#read 5, iclass 34, count 2 2006.229.17:33:06.64#ibcon#about to read 6, iclass 34, count 2 2006.229.17:33:06.64#ibcon#read 6, iclass 34, count 2 2006.229.17:33:06.64#ibcon#end of sib2, iclass 34, count 2 2006.229.17:33:06.64#ibcon#*mode == 0, iclass 34, count 2 2006.229.17:33:06.64#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.17:33:06.64#ibcon#[27=AT03-04\r\n] 2006.229.17:33:06.64#ibcon#*before write, iclass 34, count 2 2006.229.17:33:06.64#ibcon#enter sib2, iclass 34, count 2 2006.229.17:33:06.64#ibcon#flushed, iclass 34, count 2 2006.229.17:33:06.64#ibcon#about to write, iclass 34, count 2 2006.229.17:33:06.64#ibcon#wrote, iclass 34, count 2 2006.229.17:33:06.64#ibcon#about to read 3, iclass 34, count 2 2006.229.17:33:06.67#ibcon#read 3, iclass 34, count 2 2006.229.17:33:06.67#ibcon#about to read 4, iclass 34, count 2 2006.229.17:33:06.67#ibcon#read 4, iclass 34, count 2 2006.229.17:33:06.67#ibcon#about to read 5, iclass 34, count 2 2006.229.17:33:06.67#ibcon#read 5, iclass 34, count 2 2006.229.17:33:06.67#ibcon#about to read 6, iclass 34, count 2 2006.229.17:33:06.67#ibcon#read 6, iclass 34, count 2 2006.229.17:33:06.67#ibcon#end of sib2, iclass 34, count 2 2006.229.17:33:06.67#ibcon#*after write, iclass 34, count 2 2006.229.17:33:06.67#ibcon#*before return 0, iclass 34, count 2 2006.229.17:33:06.67#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:06.67#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:33:06.67#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.17:33:06.67#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:06.67#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:06.79#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:06.79#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:06.79#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:33:06.79#ibcon#first serial, iclass 34, count 0 2006.229.17:33:06.79#ibcon#enter sib2, iclass 34, count 0 2006.229.17:33:06.79#ibcon#flushed, iclass 34, count 0 2006.229.17:33:06.79#ibcon#about to write, iclass 34, count 0 2006.229.17:33:06.79#ibcon#wrote, iclass 34, count 0 2006.229.17:33:06.79#ibcon#about to read 3, iclass 34, count 0 2006.229.17:33:06.81#ibcon#read 3, iclass 34, count 0 2006.229.17:33:06.81#ibcon#about to read 4, iclass 34, count 0 2006.229.17:33:06.81#ibcon#read 4, iclass 34, count 0 2006.229.17:33:06.81#ibcon#about to read 5, iclass 34, count 0 2006.229.17:33:06.81#ibcon#read 5, iclass 34, count 0 2006.229.17:33:06.81#ibcon#about to read 6, iclass 34, count 0 2006.229.17:33:06.81#ibcon#read 6, iclass 34, count 0 2006.229.17:33:06.81#ibcon#end of sib2, iclass 34, count 0 2006.229.17:33:06.81#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:33:06.81#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:33:06.81#ibcon#[27=USB\r\n] 2006.229.17:33:06.81#ibcon#*before write, iclass 34, count 0 2006.229.17:33:06.81#ibcon#enter sib2, iclass 34, count 0 2006.229.17:33:06.81#ibcon#flushed, iclass 34, count 0 2006.229.17:33:06.81#ibcon#about to write, iclass 34, count 0 2006.229.17:33:06.81#ibcon#wrote, iclass 34, count 0 2006.229.17:33:06.81#ibcon#about to read 3, iclass 34, count 0 2006.229.17:33:06.84#ibcon#read 3, iclass 34, count 0 2006.229.17:33:06.84#ibcon#about to read 4, iclass 34, count 0 2006.229.17:33:06.84#ibcon#read 4, iclass 34, count 0 2006.229.17:33:06.84#ibcon#about to read 5, iclass 34, count 0 2006.229.17:33:06.84#ibcon#read 5, iclass 34, count 0 2006.229.17:33:06.84#ibcon#about to read 6, iclass 34, count 0 2006.229.17:33:06.84#ibcon#read 6, iclass 34, count 0 2006.229.17:33:06.84#ibcon#end of sib2, iclass 34, count 0 2006.229.17:33:06.84#ibcon#*after write, iclass 34, count 0 2006.229.17:33:06.84#ibcon#*before return 0, iclass 34, count 0 2006.229.17:33:06.84#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:06.84#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:33:06.84#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:33:06.84#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:33:06.84$vck44/vblo=4,679.99 2006.229.17:33:06.84#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.17:33:06.84#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.17:33:06.84#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:06.84#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:06.84#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:06.84#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:06.84#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:33:06.84#ibcon#first serial, iclass 36, count 0 2006.229.17:33:06.84#ibcon#enter sib2, iclass 36, count 0 2006.229.17:33:06.84#ibcon#flushed, iclass 36, count 0 2006.229.17:33:06.84#ibcon#about to write, iclass 36, count 0 2006.229.17:33:06.84#ibcon#wrote, iclass 36, count 0 2006.229.17:33:06.84#ibcon#about to read 3, iclass 36, count 0 2006.229.17:33:06.86#ibcon#read 3, iclass 36, count 0 2006.229.17:33:06.86#ibcon#about to read 4, iclass 36, count 0 2006.229.17:33:06.86#ibcon#read 4, iclass 36, count 0 2006.229.17:33:06.86#ibcon#about to read 5, iclass 36, count 0 2006.229.17:33:06.86#ibcon#read 5, iclass 36, count 0 2006.229.17:33:06.86#ibcon#about to read 6, iclass 36, count 0 2006.229.17:33:06.86#ibcon#read 6, iclass 36, count 0 2006.229.17:33:06.86#ibcon#end of sib2, iclass 36, count 0 2006.229.17:33:06.86#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:33:06.86#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:33:06.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:33:06.86#ibcon#*before write, iclass 36, count 0 2006.229.17:33:06.86#ibcon#enter sib2, iclass 36, count 0 2006.229.17:33:06.86#ibcon#flushed, iclass 36, count 0 2006.229.17:33:06.86#ibcon#about to write, iclass 36, count 0 2006.229.17:33:06.86#ibcon#wrote, iclass 36, count 0 2006.229.17:33:06.86#ibcon#about to read 3, iclass 36, count 0 2006.229.17:33:06.90#ibcon#read 3, iclass 36, count 0 2006.229.17:33:06.90#ibcon#about to read 4, iclass 36, count 0 2006.229.17:33:06.90#ibcon#read 4, iclass 36, count 0 2006.229.17:33:06.90#ibcon#about to read 5, iclass 36, count 0 2006.229.17:33:06.90#ibcon#read 5, iclass 36, count 0 2006.229.17:33:06.90#ibcon#about to read 6, iclass 36, count 0 2006.229.17:33:06.90#ibcon#read 6, iclass 36, count 0 2006.229.17:33:06.90#ibcon#end of sib2, iclass 36, count 0 2006.229.17:33:06.90#ibcon#*after write, iclass 36, count 0 2006.229.17:33:06.90#ibcon#*before return 0, iclass 36, count 0 2006.229.17:33:06.90#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:06.90#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.17:33:06.90#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:33:06.90#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:33:06.90$vck44/vb=4,4 2006.229.17:33:06.90#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.17:33:06.90#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.17:33:06.90#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:06.90#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:06.96#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:06.96#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:06.96#ibcon#enter wrdev, iclass 38, count 2 2006.229.17:33:06.96#ibcon#first serial, iclass 38, count 2 2006.229.17:33:06.96#ibcon#enter sib2, iclass 38, count 2 2006.229.17:33:06.96#ibcon#flushed, iclass 38, count 2 2006.229.17:33:06.96#ibcon#about to write, iclass 38, count 2 2006.229.17:33:06.96#ibcon#wrote, iclass 38, count 2 2006.229.17:33:06.96#ibcon#about to read 3, iclass 38, count 2 2006.229.17:33:06.98#ibcon#read 3, iclass 38, count 2 2006.229.17:33:06.98#ibcon#about to read 4, iclass 38, count 2 2006.229.17:33:06.98#ibcon#read 4, iclass 38, count 2 2006.229.17:33:06.98#ibcon#about to read 5, iclass 38, count 2 2006.229.17:33:06.98#ibcon#read 5, iclass 38, count 2 2006.229.17:33:06.98#ibcon#about to read 6, iclass 38, count 2 2006.229.17:33:06.98#ibcon#read 6, iclass 38, count 2 2006.229.17:33:06.98#ibcon#end of sib2, iclass 38, count 2 2006.229.17:33:06.98#ibcon#*mode == 0, iclass 38, count 2 2006.229.17:33:06.98#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.17:33:06.98#ibcon#[27=AT04-04\r\n] 2006.229.17:33:06.98#ibcon#*before write, iclass 38, count 2 2006.229.17:33:06.98#ibcon#enter sib2, iclass 38, count 2 2006.229.17:33:06.98#ibcon#flushed, iclass 38, count 2 2006.229.17:33:06.98#ibcon#about to write, iclass 38, count 2 2006.229.17:33:06.98#ibcon#wrote, iclass 38, count 2 2006.229.17:33:06.98#ibcon#about to read 3, iclass 38, count 2 2006.229.17:33:07.01#ibcon#read 3, iclass 38, count 2 2006.229.17:33:07.01#ibcon#about to read 4, iclass 38, count 2 2006.229.17:33:07.01#ibcon#read 4, iclass 38, count 2 2006.229.17:33:07.01#ibcon#about to read 5, iclass 38, count 2 2006.229.17:33:07.01#ibcon#read 5, iclass 38, count 2 2006.229.17:33:07.01#ibcon#about to read 6, iclass 38, count 2 2006.229.17:33:07.01#ibcon#read 6, iclass 38, count 2 2006.229.17:33:07.01#ibcon#end of sib2, iclass 38, count 2 2006.229.17:33:07.01#ibcon#*after write, iclass 38, count 2 2006.229.17:33:07.01#ibcon#*before return 0, iclass 38, count 2 2006.229.17:33:07.01#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:07.01#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.17:33:07.01#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.17:33:07.01#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:07.01#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:07.13#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:07.13#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:07.13#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:33:07.13#ibcon#first serial, iclass 38, count 0 2006.229.17:33:07.13#ibcon#enter sib2, iclass 38, count 0 2006.229.17:33:07.13#ibcon#flushed, iclass 38, count 0 2006.229.17:33:07.13#ibcon#about to write, iclass 38, count 0 2006.229.17:33:07.13#ibcon#wrote, iclass 38, count 0 2006.229.17:33:07.13#ibcon#about to read 3, iclass 38, count 0 2006.229.17:33:07.15#ibcon#read 3, iclass 38, count 0 2006.229.17:33:07.15#ibcon#about to read 4, iclass 38, count 0 2006.229.17:33:07.15#ibcon#read 4, iclass 38, count 0 2006.229.17:33:07.15#ibcon#about to read 5, iclass 38, count 0 2006.229.17:33:07.15#ibcon#read 5, iclass 38, count 0 2006.229.17:33:07.15#ibcon#about to read 6, iclass 38, count 0 2006.229.17:33:07.15#ibcon#read 6, iclass 38, count 0 2006.229.17:33:07.15#ibcon#end of sib2, iclass 38, count 0 2006.229.17:33:07.15#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:33:07.15#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:33:07.15#ibcon#[27=USB\r\n] 2006.229.17:33:07.15#ibcon#*before write, iclass 38, count 0 2006.229.17:33:07.15#ibcon#enter sib2, iclass 38, count 0 2006.229.17:33:07.15#ibcon#flushed, iclass 38, count 0 2006.229.17:33:07.15#ibcon#about to write, iclass 38, count 0 2006.229.17:33:07.15#ibcon#wrote, iclass 38, count 0 2006.229.17:33:07.15#ibcon#about to read 3, iclass 38, count 0 2006.229.17:33:07.18#ibcon#read 3, iclass 38, count 0 2006.229.17:33:07.18#ibcon#about to read 4, iclass 38, count 0 2006.229.17:33:07.18#ibcon#read 4, iclass 38, count 0 2006.229.17:33:07.18#ibcon#about to read 5, iclass 38, count 0 2006.229.17:33:07.18#ibcon#read 5, iclass 38, count 0 2006.229.17:33:07.18#ibcon#about to read 6, iclass 38, count 0 2006.229.17:33:07.18#ibcon#read 6, iclass 38, count 0 2006.229.17:33:07.18#ibcon#end of sib2, iclass 38, count 0 2006.229.17:33:07.18#ibcon#*after write, iclass 38, count 0 2006.229.17:33:07.18#ibcon#*before return 0, iclass 38, count 0 2006.229.17:33:07.18#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:07.18#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.17:33:07.18#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:33:07.18#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:33:07.18$vck44/vblo=5,709.99 2006.229.17:33:07.18#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.17:33:07.18#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.17:33:07.18#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:07.18#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:07.18#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:07.18#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:07.18#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:33:07.18#ibcon#first serial, iclass 40, count 0 2006.229.17:33:07.18#ibcon#enter sib2, iclass 40, count 0 2006.229.17:33:07.18#ibcon#flushed, iclass 40, count 0 2006.229.17:33:07.18#ibcon#about to write, iclass 40, count 0 2006.229.17:33:07.18#ibcon#wrote, iclass 40, count 0 2006.229.17:33:07.18#ibcon#about to read 3, iclass 40, count 0 2006.229.17:33:07.20#ibcon#read 3, iclass 40, count 0 2006.229.17:33:07.20#ibcon#about to read 4, iclass 40, count 0 2006.229.17:33:07.20#ibcon#read 4, iclass 40, count 0 2006.229.17:33:07.20#ibcon#about to read 5, iclass 40, count 0 2006.229.17:33:07.20#ibcon#read 5, iclass 40, count 0 2006.229.17:33:07.20#ibcon#about to read 6, iclass 40, count 0 2006.229.17:33:07.20#ibcon#read 6, iclass 40, count 0 2006.229.17:33:07.20#ibcon#end of sib2, iclass 40, count 0 2006.229.17:33:07.20#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:33:07.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:33:07.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:33:07.20#ibcon#*before write, iclass 40, count 0 2006.229.17:33:07.20#ibcon#enter sib2, iclass 40, count 0 2006.229.17:33:07.20#ibcon#flushed, iclass 40, count 0 2006.229.17:33:07.20#ibcon#about to write, iclass 40, count 0 2006.229.17:33:07.20#ibcon#wrote, iclass 40, count 0 2006.229.17:33:07.20#ibcon#about to read 3, iclass 40, count 0 2006.229.17:33:07.24#ibcon#read 3, iclass 40, count 0 2006.229.17:33:07.24#ibcon#about to read 4, iclass 40, count 0 2006.229.17:33:07.24#ibcon#read 4, iclass 40, count 0 2006.229.17:33:07.24#ibcon#about to read 5, iclass 40, count 0 2006.229.17:33:07.24#ibcon#read 5, iclass 40, count 0 2006.229.17:33:07.24#ibcon#about to read 6, iclass 40, count 0 2006.229.17:33:07.24#ibcon#read 6, iclass 40, count 0 2006.229.17:33:07.24#ibcon#end of sib2, iclass 40, count 0 2006.229.17:33:07.24#ibcon#*after write, iclass 40, count 0 2006.229.17:33:07.24#ibcon#*before return 0, iclass 40, count 0 2006.229.17:33:07.24#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:07.24#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:33:07.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:33:07.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:33:07.24$vck44/vb=5,4 2006.229.17:33:07.24#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.17:33:07.24#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.17:33:07.24#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:07.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:07.30#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:07.30#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:07.30#ibcon#enter wrdev, iclass 4, count 2 2006.229.17:33:07.30#ibcon#first serial, iclass 4, count 2 2006.229.17:33:07.30#ibcon#enter sib2, iclass 4, count 2 2006.229.17:33:07.30#ibcon#flushed, iclass 4, count 2 2006.229.17:33:07.30#ibcon#about to write, iclass 4, count 2 2006.229.17:33:07.30#ibcon#wrote, iclass 4, count 2 2006.229.17:33:07.30#ibcon#about to read 3, iclass 4, count 2 2006.229.17:33:07.32#ibcon#read 3, iclass 4, count 2 2006.229.17:33:07.32#ibcon#about to read 4, iclass 4, count 2 2006.229.17:33:07.32#ibcon#read 4, iclass 4, count 2 2006.229.17:33:07.32#ibcon#about to read 5, iclass 4, count 2 2006.229.17:33:07.32#ibcon#read 5, iclass 4, count 2 2006.229.17:33:07.32#ibcon#about to read 6, iclass 4, count 2 2006.229.17:33:07.32#ibcon#read 6, iclass 4, count 2 2006.229.17:33:07.32#ibcon#end of sib2, iclass 4, count 2 2006.229.17:33:07.32#ibcon#*mode == 0, iclass 4, count 2 2006.229.17:33:07.32#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.17:33:07.32#ibcon#[27=AT05-04\r\n] 2006.229.17:33:07.32#ibcon#*before write, iclass 4, count 2 2006.229.17:33:07.32#ibcon#enter sib2, iclass 4, count 2 2006.229.17:33:07.32#ibcon#flushed, iclass 4, count 2 2006.229.17:33:07.32#ibcon#about to write, iclass 4, count 2 2006.229.17:33:07.32#ibcon#wrote, iclass 4, count 2 2006.229.17:33:07.32#ibcon#about to read 3, iclass 4, count 2 2006.229.17:33:07.35#ibcon#read 3, iclass 4, count 2 2006.229.17:33:07.35#ibcon#about to read 4, iclass 4, count 2 2006.229.17:33:07.35#ibcon#read 4, iclass 4, count 2 2006.229.17:33:07.35#ibcon#about to read 5, iclass 4, count 2 2006.229.17:33:07.35#ibcon#read 5, iclass 4, count 2 2006.229.17:33:07.35#ibcon#about to read 6, iclass 4, count 2 2006.229.17:33:07.35#ibcon#read 6, iclass 4, count 2 2006.229.17:33:07.35#ibcon#end of sib2, iclass 4, count 2 2006.229.17:33:07.35#ibcon#*after write, iclass 4, count 2 2006.229.17:33:07.35#ibcon#*before return 0, iclass 4, count 2 2006.229.17:33:07.35#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:07.35#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.17:33:07.35#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.17:33:07.35#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:07.35#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:07.47#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:07.47#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:07.47#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:33:07.47#ibcon#first serial, iclass 4, count 0 2006.229.17:33:07.47#ibcon#enter sib2, iclass 4, count 0 2006.229.17:33:07.47#ibcon#flushed, iclass 4, count 0 2006.229.17:33:07.47#ibcon#about to write, iclass 4, count 0 2006.229.17:33:07.47#ibcon#wrote, iclass 4, count 0 2006.229.17:33:07.47#ibcon#about to read 3, iclass 4, count 0 2006.229.17:33:07.49#ibcon#read 3, iclass 4, count 0 2006.229.17:33:07.49#ibcon#about to read 4, iclass 4, count 0 2006.229.17:33:07.49#ibcon#read 4, iclass 4, count 0 2006.229.17:33:07.49#ibcon#about to read 5, iclass 4, count 0 2006.229.17:33:07.49#ibcon#read 5, iclass 4, count 0 2006.229.17:33:07.49#ibcon#about to read 6, iclass 4, count 0 2006.229.17:33:07.49#ibcon#read 6, iclass 4, count 0 2006.229.17:33:07.49#ibcon#end of sib2, iclass 4, count 0 2006.229.17:33:07.49#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:33:07.49#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:33:07.49#ibcon#[27=USB\r\n] 2006.229.17:33:07.49#ibcon#*before write, iclass 4, count 0 2006.229.17:33:07.49#ibcon#enter sib2, iclass 4, count 0 2006.229.17:33:07.49#ibcon#flushed, iclass 4, count 0 2006.229.17:33:07.49#ibcon#about to write, iclass 4, count 0 2006.229.17:33:07.49#ibcon#wrote, iclass 4, count 0 2006.229.17:33:07.49#ibcon#about to read 3, iclass 4, count 0 2006.229.17:33:07.52#ibcon#read 3, iclass 4, count 0 2006.229.17:33:07.52#ibcon#about to read 4, iclass 4, count 0 2006.229.17:33:07.52#ibcon#read 4, iclass 4, count 0 2006.229.17:33:07.52#ibcon#about to read 5, iclass 4, count 0 2006.229.17:33:07.52#ibcon#read 5, iclass 4, count 0 2006.229.17:33:07.52#ibcon#about to read 6, iclass 4, count 0 2006.229.17:33:07.52#ibcon#read 6, iclass 4, count 0 2006.229.17:33:07.52#ibcon#end of sib2, iclass 4, count 0 2006.229.17:33:07.52#ibcon#*after write, iclass 4, count 0 2006.229.17:33:07.52#ibcon#*before return 0, iclass 4, count 0 2006.229.17:33:07.52#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:07.52#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.17:33:07.52#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:33:07.52#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:33:07.52$vck44/vblo=6,719.99 2006.229.17:33:07.52#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.17:33:07.52#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.17:33:07.52#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:07.52#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:07.52#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:07.52#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:07.52#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:33:07.52#ibcon#first serial, iclass 6, count 0 2006.229.17:33:07.52#ibcon#enter sib2, iclass 6, count 0 2006.229.17:33:07.52#ibcon#flushed, iclass 6, count 0 2006.229.17:33:07.52#ibcon#about to write, iclass 6, count 0 2006.229.17:33:07.52#ibcon#wrote, iclass 6, count 0 2006.229.17:33:07.52#ibcon#about to read 3, iclass 6, count 0 2006.229.17:33:07.54#ibcon#read 3, iclass 6, count 0 2006.229.17:33:07.54#ibcon#about to read 4, iclass 6, count 0 2006.229.17:33:07.54#ibcon#read 4, iclass 6, count 0 2006.229.17:33:07.54#ibcon#about to read 5, iclass 6, count 0 2006.229.17:33:07.54#ibcon#read 5, iclass 6, count 0 2006.229.17:33:07.54#ibcon#about to read 6, iclass 6, count 0 2006.229.17:33:07.54#ibcon#read 6, iclass 6, count 0 2006.229.17:33:07.54#ibcon#end of sib2, iclass 6, count 0 2006.229.17:33:07.54#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:33:07.54#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:33:07.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:33:07.54#ibcon#*before write, iclass 6, count 0 2006.229.17:33:07.54#ibcon#enter sib2, iclass 6, count 0 2006.229.17:33:07.54#ibcon#flushed, iclass 6, count 0 2006.229.17:33:07.54#ibcon#about to write, iclass 6, count 0 2006.229.17:33:07.54#ibcon#wrote, iclass 6, count 0 2006.229.17:33:07.54#ibcon#about to read 3, iclass 6, count 0 2006.229.17:33:07.58#ibcon#read 3, iclass 6, count 0 2006.229.17:33:07.58#ibcon#about to read 4, iclass 6, count 0 2006.229.17:33:07.58#ibcon#read 4, iclass 6, count 0 2006.229.17:33:07.58#ibcon#about to read 5, iclass 6, count 0 2006.229.17:33:07.58#ibcon#read 5, iclass 6, count 0 2006.229.17:33:07.58#ibcon#about to read 6, iclass 6, count 0 2006.229.17:33:07.58#ibcon#read 6, iclass 6, count 0 2006.229.17:33:07.58#ibcon#end of sib2, iclass 6, count 0 2006.229.17:33:07.58#ibcon#*after write, iclass 6, count 0 2006.229.17:33:07.58#ibcon#*before return 0, iclass 6, count 0 2006.229.17:33:07.58#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:07.58#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.17:33:07.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:33:07.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:33:07.58$vck44/vb=6,4 2006.229.17:33:07.58#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.17:33:07.58#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.17:33:07.58#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:07.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:07.64#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:07.64#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:07.64#ibcon#enter wrdev, iclass 10, count 2 2006.229.17:33:07.64#ibcon#first serial, iclass 10, count 2 2006.229.17:33:07.64#ibcon#enter sib2, iclass 10, count 2 2006.229.17:33:07.64#ibcon#flushed, iclass 10, count 2 2006.229.17:33:07.64#ibcon#about to write, iclass 10, count 2 2006.229.17:33:07.64#ibcon#wrote, iclass 10, count 2 2006.229.17:33:07.64#ibcon#about to read 3, iclass 10, count 2 2006.229.17:33:07.66#ibcon#read 3, iclass 10, count 2 2006.229.17:33:07.66#ibcon#about to read 4, iclass 10, count 2 2006.229.17:33:07.66#ibcon#read 4, iclass 10, count 2 2006.229.17:33:07.66#ibcon#about to read 5, iclass 10, count 2 2006.229.17:33:07.66#ibcon#read 5, iclass 10, count 2 2006.229.17:33:07.66#ibcon#about to read 6, iclass 10, count 2 2006.229.17:33:07.66#ibcon#read 6, iclass 10, count 2 2006.229.17:33:07.66#ibcon#end of sib2, iclass 10, count 2 2006.229.17:33:07.66#ibcon#*mode == 0, iclass 10, count 2 2006.229.17:33:07.66#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.17:33:07.66#ibcon#[27=AT06-04\r\n] 2006.229.17:33:07.66#ibcon#*before write, iclass 10, count 2 2006.229.17:33:07.66#ibcon#enter sib2, iclass 10, count 2 2006.229.17:33:07.66#ibcon#flushed, iclass 10, count 2 2006.229.17:33:07.66#ibcon#about to write, iclass 10, count 2 2006.229.17:33:07.66#ibcon#wrote, iclass 10, count 2 2006.229.17:33:07.66#ibcon#about to read 3, iclass 10, count 2 2006.229.17:33:07.69#ibcon#read 3, iclass 10, count 2 2006.229.17:33:07.69#ibcon#about to read 4, iclass 10, count 2 2006.229.17:33:07.69#ibcon#read 4, iclass 10, count 2 2006.229.17:33:07.69#ibcon#about to read 5, iclass 10, count 2 2006.229.17:33:07.69#ibcon#read 5, iclass 10, count 2 2006.229.17:33:07.69#ibcon#about to read 6, iclass 10, count 2 2006.229.17:33:07.69#ibcon#read 6, iclass 10, count 2 2006.229.17:33:07.69#ibcon#end of sib2, iclass 10, count 2 2006.229.17:33:07.69#ibcon#*after write, iclass 10, count 2 2006.229.17:33:07.69#ibcon#*before return 0, iclass 10, count 2 2006.229.17:33:07.69#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:07.69#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.17:33:07.69#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.17:33:07.69#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:07.69#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:07.81#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:07.81#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:07.81#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:33:07.81#ibcon#first serial, iclass 10, count 0 2006.229.17:33:07.81#ibcon#enter sib2, iclass 10, count 0 2006.229.17:33:07.81#ibcon#flushed, iclass 10, count 0 2006.229.17:33:07.81#ibcon#about to write, iclass 10, count 0 2006.229.17:33:07.81#ibcon#wrote, iclass 10, count 0 2006.229.17:33:07.81#ibcon#about to read 3, iclass 10, count 0 2006.229.17:33:07.83#ibcon#read 3, iclass 10, count 0 2006.229.17:33:07.83#ibcon#about to read 4, iclass 10, count 0 2006.229.17:33:07.83#ibcon#read 4, iclass 10, count 0 2006.229.17:33:07.83#ibcon#about to read 5, iclass 10, count 0 2006.229.17:33:07.83#ibcon#read 5, iclass 10, count 0 2006.229.17:33:07.83#ibcon#about to read 6, iclass 10, count 0 2006.229.17:33:07.83#ibcon#read 6, iclass 10, count 0 2006.229.17:33:07.83#ibcon#end of sib2, iclass 10, count 0 2006.229.17:33:07.83#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:33:07.83#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:33:07.83#ibcon#[27=USB\r\n] 2006.229.17:33:07.83#ibcon#*before write, iclass 10, count 0 2006.229.17:33:07.83#ibcon#enter sib2, iclass 10, count 0 2006.229.17:33:07.83#ibcon#flushed, iclass 10, count 0 2006.229.17:33:07.83#ibcon#about to write, iclass 10, count 0 2006.229.17:33:07.83#ibcon#wrote, iclass 10, count 0 2006.229.17:33:07.83#ibcon#about to read 3, iclass 10, count 0 2006.229.17:33:07.86#ibcon#read 3, iclass 10, count 0 2006.229.17:33:07.86#ibcon#about to read 4, iclass 10, count 0 2006.229.17:33:07.86#ibcon#read 4, iclass 10, count 0 2006.229.17:33:07.86#ibcon#about to read 5, iclass 10, count 0 2006.229.17:33:07.86#ibcon#read 5, iclass 10, count 0 2006.229.17:33:07.86#ibcon#about to read 6, iclass 10, count 0 2006.229.17:33:07.86#ibcon#read 6, iclass 10, count 0 2006.229.17:33:07.86#ibcon#end of sib2, iclass 10, count 0 2006.229.17:33:07.86#ibcon#*after write, iclass 10, count 0 2006.229.17:33:07.86#ibcon#*before return 0, iclass 10, count 0 2006.229.17:33:07.86#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:07.86#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.17:33:07.86#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:33:07.86#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:33:07.86$vck44/vblo=7,734.99 2006.229.17:33:07.86#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.17:33:07.86#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.17:33:07.86#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:07.86#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:07.86#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:07.86#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:07.86#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:33:07.86#ibcon#first serial, iclass 12, count 0 2006.229.17:33:07.86#ibcon#enter sib2, iclass 12, count 0 2006.229.17:33:07.86#ibcon#flushed, iclass 12, count 0 2006.229.17:33:07.86#ibcon#about to write, iclass 12, count 0 2006.229.17:33:07.86#ibcon#wrote, iclass 12, count 0 2006.229.17:33:07.86#ibcon#about to read 3, iclass 12, count 0 2006.229.17:33:07.88#ibcon#read 3, iclass 12, count 0 2006.229.17:33:07.88#ibcon#about to read 4, iclass 12, count 0 2006.229.17:33:07.88#ibcon#read 4, iclass 12, count 0 2006.229.17:33:07.88#ibcon#about to read 5, iclass 12, count 0 2006.229.17:33:07.88#ibcon#read 5, iclass 12, count 0 2006.229.17:33:07.88#ibcon#about to read 6, iclass 12, count 0 2006.229.17:33:07.88#ibcon#read 6, iclass 12, count 0 2006.229.17:33:07.88#ibcon#end of sib2, iclass 12, count 0 2006.229.17:33:07.88#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:33:07.88#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:33:07.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:33:07.88#ibcon#*before write, iclass 12, count 0 2006.229.17:33:07.88#ibcon#enter sib2, iclass 12, count 0 2006.229.17:33:07.88#ibcon#flushed, iclass 12, count 0 2006.229.17:33:07.88#ibcon#about to write, iclass 12, count 0 2006.229.17:33:07.88#ibcon#wrote, iclass 12, count 0 2006.229.17:33:07.88#ibcon#about to read 3, iclass 12, count 0 2006.229.17:33:07.92#ibcon#read 3, iclass 12, count 0 2006.229.17:33:07.92#ibcon#about to read 4, iclass 12, count 0 2006.229.17:33:07.92#ibcon#read 4, iclass 12, count 0 2006.229.17:33:07.92#ibcon#about to read 5, iclass 12, count 0 2006.229.17:33:07.92#ibcon#read 5, iclass 12, count 0 2006.229.17:33:07.92#ibcon#about to read 6, iclass 12, count 0 2006.229.17:33:07.92#ibcon#read 6, iclass 12, count 0 2006.229.17:33:07.92#ibcon#end of sib2, iclass 12, count 0 2006.229.17:33:07.92#ibcon#*after write, iclass 12, count 0 2006.229.17:33:07.92#ibcon#*before return 0, iclass 12, count 0 2006.229.17:33:07.92#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:07.92#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.17:33:07.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:33:07.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:33:07.92$vck44/vb=7,4 2006.229.17:33:07.92#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.17:33:07.92#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.17:33:07.92#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:07.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:07.98#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:07.98#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:07.98#ibcon#enter wrdev, iclass 14, count 2 2006.229.17:33:07.98#ibcon#first serial, iclass 14, count 2 2006.229.17:33:07.98#ibcon#enter sib2, iclass 14, count 2 2006.229.17:33:07.98#ibcon#flushed, iclass 14, count 2 2006.229.17:33:07.98#ibcon#about to write, iclass 14, count 2 2006.229.17:33:07.98#ibcon#wrote, iclass 14, count 2 2006.229.17:33:07.98#ibcon#about to read 3, iclass 14, count 2 2006.229.17:33:08.00#ibcon#read 3, iclass 14, count 2 2006.229.17:33:08.00#ibcon#about to read 4, iclass 14, count 2 2006.229.17:33:08.00#ibcon#read 4, iclass 14, count 2 2006.229.17:33:08.00#ibcon#about to read 5, iclass 14, count 2 2006.229.17:33:08.00#ibcon#read 5, iclass 14, count 2 2006.229.17:33:08.00#ibcon#about to read 6, iclass 14, count 2 2006.229.17:33:08.00#ibcon#read 6, iclass 14, count 2 2006.229.17:33:08.00#ibcon#end of sib2, iclass 14, count 2 2006.229.17:33:08.00#ibcon#*mode == 0, iclass 14, count 2 2006.229.17:33:08.00#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.17:33:08.00#ibcon#[27=AT07-04\r\n] 2006.229.17:33:08.00#ibcon#*before write, iclass 14, count 2 2006.229.17:33:08.00#ibcon#enter sib2, iclass 14, count 2 2006.229.17:33:08.00#ibcon#flushed, iclass 14, count 2 2006.229.17:33:08.00#ibcon#about to write, iclass 14, count 2 2006.229.17:33:08.00#ibcon#wrote, iclass 14, count 2 2006.229.17:33:08.00#ibcon#about to read 3, iclass 14, count 2 2006.229.17:33:08.03#ibcon#read 3, iclass 14, count 2 2006.229.17:33:08.03#ibcon#about to read 4, iclass 14, count 2 2006.229.17:33:08.03#ibcon#read 4, iclass 14, count 2 2006.229.17:33:08.03#ibcon#about to read 5, iclass 14, count 2 2006.229.17:33:08.03#ibcon#read 5, iclass 14, count 2 2006.229.17:33:08.03#ibcon#about to read 6, iclass 14, count 2 2006.229.17:33:08.03#ibcon#read 6, iclass 14, count 2 2006.229.17:33:08.03#ibcon#end of sib2, iclass 14, count 2 2006.229.17:33:08.03#ibcon#*after write, iclass 14, count 2 2006.229.17:33:08.03#ibcon#*before return 0, iclass 14, count 2 2006.229.17:33:08.03#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:08.03#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.17:33:08.03#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.17:33:08.03#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:08.03#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:08.15#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:08.15#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:08.15#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:33:08.15#ibcon#first serial, iclass 14, count 0 2006.229.17:33:08.15#ibcon#enter sib2, iclass 14, count 0 2006.229.17:33:08.15#ibcon#flushed, iclass 14, count 0 2006.229.17:33:08.15#ibcon#about to write, iclass 14, count 0 2006.229.17:33:08.15#ibcon#wrote, iclass 14, count 0 2006.229.17:33:08.15#ibcon#about to read 3, iclass 14, count 0 2006.229.17:33:08.17#ibcon#read 3, iclass 14, count 0 2006.229.17:33:08.17#ibcon#about to read 4, iclass 14, count 0 2006.229.17:33:08.17#ibcon#read 4, iclass 14, count 0 2006.229.17:33:08.17#ibcon#about to read 5, iclass 14, count 0 2006.229.17:33:08.17#ibcon#read 5, iclass 14, count 0 2006.229.17:33:08.17#ibcon#about to read 6, iclass 14, count 0 2006.229.17:33:08.17#ibcon#read 6, iclass 14, count 0 2006.229.17:33:08.17#ibcon#end of sib2, iclass 14, count 0 2006.229.17:33:08.17#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:33:08.17#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:33:08.17#ibcon#[27=USB\r\n] 2006.229.17:33:08.17#ibcon#*before write, iclass 14, count 0 2006.229.17:33:08.17#ibcon#enter sib2, iclass 14, count 0 2006.229.17:33:08.17#ibcon#flushed, iclass 14, count 0 2006.229.17:33:08.17#ibcon#about to write, iclass 14, count 0 2006.229.17:33:08.17#ibcon#wrote, iclass 14, count 0 2006.229.17:33:08.17#ibcon#about to read 3, iclass 14, count 0 2006.229.17:33:08.20#ibcon#read 3, iclass 14, count 0 2006.229.17:33:08.20#ibcon#about to read 4, iclass 14, count 0 2006.229.17:33:08.20#ibcon#read 4, iclass 14, count 0 2006.229.17:33:08.20#ibcon#about to read 5, iclass 14, count 0 2006.229.17:33:08.20#ibcon#read 5, iclass 14, count 0 2006.229.17:33:08.20#ibcon#about to read 6, iclass 14, count 0 2006.229.17:33:08.20#ibcon#read 6, iclass 14, count 0 2006.229.17:33:08.20#ibcon#end of sib2, iclass 14, count 0 2006.229.17:33:08.20#ibcon#*after write, iclass 14, count 0 2006.229.17:33:08.20#ibcon#*before return 0, iclass 14, count 0 2006.229.17:33:08.20#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:08.20#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.17:33:08.20#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:33:08.20#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:33:08.20$vck44/vblo=8,744.99 2006.229.17:33:08.20#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.17:33:08.20#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.17:33:08.20#ibcon#ireg 17 cls_cnt 0 2006.229.17:33:08.20#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:08.20#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:08.20#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:08.20#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:33:08.20#ibcon#first serial, iclass 16, count 0 2006.229.17:33:08.20#ibcon#enter sib2, iclass 16, count 0 2006.229.17:33:08.20#ibcon#flushed, iclass 16, count 0 2006.229.17:33:08.20#ibcon#about to write, iclass 16, count 0 2006.229.17:33:08.20#ibcon#wrote, iclass 16, count 0 2006.229.17:33:08.20#ibcon#about to read 3, iclass 16, count 0 2006.229.17:33:08.22#ibcon#read 3, iclass 16, count 0 2006.229.17:33:08.22#ibcon#about to read 4, iclass 16, count 0 2006.229.17:33:08.22#ibcon#read 4, iclass 16, count 0 2006.229.17:33:08.22#ibcon#about to read 5, iclass 16, count 0 2006.229.17:33:08.22#ibcon#read 5, iclass 16, count 0 2006.229.17:33:08.22#ibcon#about to read 6, iclass 16, count 0 2006.229.17:33:08.22#ibcon#read 6, iclass 16, count 0 2006.229.17:33:08.22#ibcon#end of sib2, iclass 16, count 0 2006.229.17:33:08.22#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:33:08.22#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:33:08.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:33:08.22#ibcon#*before write, iclass 16, count 0 2006.229.17:33:08.22#ibcon#enter sib2, iclass 16, count 0 2006.229.17:33:08.22#ibcon#flushed, iclass 16, count 0 2006.229.17:33:08.22#ibcon#about to write, iclass 16, count 0 2006.229.17:33:08.22#ibcon#wrote, iclass 16, count 0 2006.229.17:33:08.22#ibcon#about to read 3, iclass 16, count 0 2006.229.17:33:08.26#ibcon#read 3, iclass 16, count 0 2006.229.17:33:08.26#ibcon#about to read 4, iclass 16, count 0 2006.229.17:33:08.26#ibcon#read 4, iclass 16, count 0 2006.229.17:33:08.26#ibcon#about to read 5, iclass 16, count 0 2006.229.17:33:08.26#ibcon#read 5, iclass 16, count 0 2006.229.17:33:08.26#ibcon#about to read 6, iclass 16, count 0 2006.229.17:33:08.26#ibcon#read 6, iclass 16, count 0 2006.229.17:33:08.26#ibcon#end of sib2, iclass 16, count 0 2006.229.17:33:08.26#ibcon#*after write, iclass 16, count 0 2006.229.17:33:08.26#ibcon#*before return 0, iclass 16, count 0 2006.229.17:33:08.26#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:08.26#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.17:33:08.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:33:08.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:33:08.26$vck44/vb=8,4 2006.229.17:33:08.26#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.17:33:08.26#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.17:33:08.26#ibcon#ireg 11 cls_cnt 2 2006.229.17:33:08.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:08.32#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:08.32#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:08.32#ibcon#enter wrdev, iclass 18, count 2 2006.229.17:33:08.32#ibcon#first serial, iclass 18, count 2 2006.229.17:33:08.32#ibcon#enter sib2, iclass 18, count 2 2006.229.17:33:08.32#ibcon#flushed, iclass 18, count 2 2006.229.17:33:08.32#ibcon#about to write, iclass 18, count 2 2006.229.17:33:08.32#ibcon#wrote, iclass 18, count 2 2006.229.17:33:08.32#ibcon#about to read 3, iclass 18, count 2 2006.229.17:33:08.34#ibcon#read 3, iclass 18, count 2 2006.229.17:33:08.34#ibcon#about to read 4, iclass 18, count 2 2006.229.17:33:08.34#ibcon#read 4, iclass 18, count 2 2006.229.17:33:08.34#ibcon#about to read 5, iclass 18, count 2 2006.229.17:33:08.34#ibcon#read 5, iclass 18, count 2 2006.229.17:33:08.34#ibcon#about to read 6, iclass 18, count 2 2006.229.17:33:08.34#ibcon#read 6, iclass 18, count 2 2006.229.17:33:08.34#ibcon#end of sib2, iclass 18, count 2 2006.229.17:33:08.34#ibcon#*mode == 0, iclass 18, count 2 2006.229.17:33:08.34#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.17:33:08.34#ibcon#[27=AT08-04\r\n] 2006.229.17:33:08.34#ibcon#*before write, iclass 18, count 2 2006.229.17:33:08.34#ibcon#enter sib2, iclass 18, count 2 2006.229.17:33:08.34#ibcon#flushed, iclass 18, count 2 2006.229.17:33:08.34#ibcon#about to write, iclass 18, count 2 2006.229.17:33:08.34#ibcon#wrote, iclass 18, count 2 2006.229.17:33:08.34#ibcon#about to read 3, iclass 18, count 2 2006.229.17:33:08.37#ibcon#read 3, iclass 18, count 2 2006.229.17:33:08.37#ibcon#about to read 4, iclass 18, count 2 2006.229.17:33:08.37#ibcon#read 4, iclass 18, count 2 2006.229.17:33:08.37#ibcon#about to read 5, iclass 18, count 2 2006.229.17:33:08.37#ibcon#read 5, iclass 18, count 2 2006.229.17:33:08.37#ibcon#about to read 6, iclass 18, count 2 2006.229.17:33:08.37#ibcon#read 6, iclass 18, count 2 2006.229.17:33:08.37#ibcon#end of sib2, iclass 18, count 2 2006.229.17:33:08.37#ibcon#*after write, iclass 18, count 2 2006.229.17:33:08.37#ibcon#*before return 0, iclass 18, count 2 2006.229.17:33:08.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:08.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.17:33:08.37#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.17:33:08.37#ibcon#ireg 7 cls_cnt 0 2006.229.17:33:08.37#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:08.49#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:08.49#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:08.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:33:08.49#ibcon#first serial, iclass 18, count 0 2006.229.17:33:08.49#ibcon#enter sib2, iclass 18, count 0 2006.229.17:33:08.49#ibcon#flushed, iclass 18, count 0 2006.229.17:33:08.49#ibcon#about to write, iclass 18, count 0 2006.229.17:33:08.49#ibcon#wrote, iclass 18, count 0 2006.229.17:33:08.49#ibcon#about to read 3, iclass 18, count 0 2006.229.17:33:08.51#ibcon#read 3, iclass 18, count 0 2006.229.17:33:08.51#ibcon#about to read 4, iclass 18, count 0 2006.229.17:33:08.51#ibcon#read 4, iclass 18, count 0 2006.229.17:33:08.51#ibcon#about to read 5, iclass 18, count 0 2006.229.17:33:08.51#ibcon#read 5, iclass 18, count 0 2006.229.17:33:08.51#ibcon#about to read 6, iclass 18, count 0 2006.229.17:33:08.51#ibcon#read 6, iclass 18, count 0 2006.229.17:33:08.51#ibcon#end of sib2, iclass 18, count 0 2006.229.17:33:08.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:33:08.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:33:08.51#ibcon#[27=USB\r\n] 2006.229.17:33:08.51#ibcon#*before write, iclass 18, count 0 2006.229.17:33:08.51#ibcon#enter sib2, iclass 18, count 0 2006.229.17:33:08.51#ibcon#flushed, iclass 18, count 0 2006.229.17:33:08.51#ibcon#about to write, iclass 18, count 0 2006.229.17:33:08.51#ibcon#wrote, iclass 18, count 0 2006.229.17:33:08.51#ibcon#about to read 3, iclass 18, count 0 2006.229.17:33:08.54#ibcon#read 3, iclass 18, count 0 2006.229.17:33:08.54#ibcon#about to read 4, iclass 18, count 0 2006.229.17:33:08.54#ibcon#read 4, iclass 18, count 0 2006.229.17:33:08.54#ibcon#about to read 5, iclass 18, count 0 2006.229.17:33:08.54#ibcon#read 5, iclass 18, count 0 2006.229.17:33:08.54#ibcon#about to read 6, iclass 18, count 0 2006.229.17:33:08.54#ibcon#read 6, iclass 18, count 0 2006.229.17:33:08.54#ibcon#end of sib2, iclass 18, count 0 2006.229.17:33:08.54#ibcon#*after write, iclass 18, count 0 2006.229.17:33:08.54#ibcon#*before return 0, iclass 18, count 0 2006.229.17:33:08.54#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:08.54#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.17:33:08.54#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:33:08.54#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:33:08.54$vck44/vabw=wide 2006.229.17:33:08.54#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.17:33:08.54#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.17:33:08.54#ibcon#ireg 8 cls_cnt 0 2006.229.17:33:08.54#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:08.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:08.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:08.54#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:33:08.54#ibcon#first serial, iclass 20, count 0 2006.229.17:33:08.54#ibcon#enter sib2, iclass 20, count 0 2006.229.17:33:08.54#ibcon#flushed, iclass 20, count 0 2006.229.17:33:08.54#ibcon#about to write, iclass 20, count 0 2006.229.17:33:08.54#ibcon#wrote, iclass 20, count 0 2006.229.17:33:08.54#ibcon#about to read 3, iclass 20, count 0 2006.229.17:33:08.56#ibcon#read 3, iclass 20, count 0 2006.229.17:33:08.56#ibcon#about to read 4, iclass 20, count 0 2006.229.17:33:08.56#ibcon#read 4, iclass 20, count 0 2006.229.17:33:08.56#ibcon#about to read 5, iclass 20, count 0 2006.229.17:33:08.56#ibcon#read 5, iclass 20, count 0 2006.229.17:33:08.56#ibcon#about to read 6, iclass 20, count 0 2006.229.17:33:08.56#ibcon#read 6, iclass 20, count 0 2006.229.17:33:08.56#ibcon#end of sib2, iclass 20, count 0 2006.229.17:33:08.56#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:33:08.56#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:33:08.56#ibcon#[25=BW32\r\n] 2006.229.17:33:08.56#ibcon#*before write, iclass 20, count 0 2006.229.17:33:08.56#ibcon#enter sib2, iclass 20, count 0 2006.229.17:33:08.56#ibcon#flushed, iclass 20, count 0 2006.229.17:33:08.56#ibcon#about to write, iclass 20, count 0 2006.229.17:33:08.56#ibcon#wrote, iclass 20, count 0 2006.229.17:33:08.56#ibcon#about to read 3, iclass 20, count 0 2006.229.17:33:08.59#ibcon#read 3, iclass 20, count 0 2006.229.17:33:08.59#ibcon#about to read 4, iclass 20, count 0 2006.229.17:33:08.59#ibcon#read 4, iclass 20, count 0 2006.229.17:33:08.59#ibcon#about to read 5, iclass 20, count 0 2006.229.17:33:08.59#ibcon#read 5, iclass 20, count 0 2006.229.17:33:08.59#ibcon#about to read 6, iclass 20, count 0 2006.229.17:33:08.59#ibcon#read 6, iclass 20, count 0 2006.229.17:33:08.59#ibcon#end of sib2, iclass 20, count 0 2006.229.17:33:08.59#ibcon#*after write, iclass 20, count 0 2006.229.17:33:08.59#ibcon#*before return 0, iclass 20, count 0 2006.229.17:33:08.59#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:08.59#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.17:33:08.59#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:33:08.59#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:33:08.59$vck44/vbbw=wide 2006.229.17:33:08.59#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:33:08.59#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:33:08.59#ibcon#ireg 8 cls_cnt 0 2006.229.17:33:08.59#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:33:08.66#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:33:08.66#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:33:08.66#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:33:08.66#ibcon#first serial, iclass 22, count 0 2006.229.17:33:08.66#ibcon#enter sib2, iclass 22, count 0 2006.229.17:33:08.66#ibcon#flushed, iclass 22, count 0 2006.229.17:33:08.66#ibcon#about to write, iclass 22, count 0 2006.229.17:33:08.66#ibcon#wrote, iclass 22, count 0 2006.229.17:33:08.66#ibcon#about to read 3, iclass 22, count 0 2006.229.17:33:08.68#ibcon#read 3, iclass 22, count 0 2006.229.17:33:08.68#ibcon#about to read 4, iclass 22, count 0 2006.229.17:33:08.68#ibcon#read 4, iclass 22, count 0 2006.229.17:33:08.68#ibcon#about to read 5, iclass 22, count 0 2006.229.17:33:08.68#ibcon#read 5, iclass 22, count 0 2006.229.17:33:08.68#ibcon#about to read 6, iclass 22, count 0 2006.229.17:33:08.68#ibcon#read 6, iclass 22, count 0 2006.229.17:33:08.68#ibcon#end of sib2, iclass 22, count 0 2006.229.17:33:08.68#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:33:08.68#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:33:08.68#ibcon#[27=BW32\r\n] 2006.229.17:33:08.68#ibcon#*before write, iclass 22, count 0 2006.229.17:33:08.68#ibcon#enter sib2, iclass 22, count 0 2006.229.17:33:08.68#ibcon#flushed, iclass 22, count 0 2006.229.17:33:08.68#ibcon#about to write, iclass 22, count 0 2006.229.17:33:08.68#ibcon#wrote, iclass 22, count 0 2006.229.17:33:08.68#ibcon#about to read 3, iclass 22, count 0 2006.229.17:33:08.71#ibcon#read 3, iclass 22, count 0 2006.229.17:33:08.71#ibcon#about to read 4, iclass 22, count 0 2006.229.17:33:08.71#ibcon#read 4, iclass 22, count 0 2006.229.17:33:08.71#ibcon#about to read 5, iclass 22, count 0 2006.229.17:33:08.71#ibcon#read 5, iclass 22, count 0 2006.229.17:33:08.71#ibcon#about to read 6, iclass 22, count 0 2006.229.17:33:08.71#ibcon#read 6, iclass 22, count 0 2006.229.17:33:08.71#ibcon#end of sib2, iclass 22, count 0 2006.229.17:33:08.71#ibcon#*after write, iclass 22, count 0 2006.229.17:33:08.71#ibcon#*before return 0, iclass 22, count 0 2006.229.17:33:08.71#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:33:08.71#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:33:08.71#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:33:08.71#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:33:08.71$setupk4/ifdk4 2006.229.17:33:08.71$ifdk4/lo= 2006.229.17:33:08.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:33:08.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:33:08.71$ifdk4/patch= 2006.229.17:33:08.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:33:08.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:33:08.71$setupk4/!*+20s 2006.229.17:33:11.35#abcon#<5=/07 1.9 3.9 26.941001001.6\r\n> 2006.229.17:33:11.37#abcon#{5=INTERFACE CLEAR} 2006.229.17:33:11.43#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:33:21.52#abcon#<5=/07 1.9 3.9 26.941001001.6\r\n> 2006.229.17:33:21.54#abcon#{5=INTERFACE CLEAR} 2006.229.17:33:21.60#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:33:23.22$setupk4/"tpicd 2006.229.17:33:23.22$setupk4/echo=off 2006.229.17:33:23.22$setupk4/xlog=off 2006.229.17:33:23.22:!2006.229.17:36:15 2006.229.17:33:32.13#trakl#Source acquired 2006.229.17:33:32.13#flagr#flagr/antenna,acquired 2006.229.17:36:15.00:preob 2006.229.17:36:15.14/onsource/TRACKING 2006.229.17:36:15.14:!2006.229.17:36:25 2006.229.17:36:25.00:"tape 2006.229.17:36:25.00:"st=record 2006.229.17:36:25.00:data_valid=on 2006.229.17:36:25.00:midob 2006.229.17:36:26.14/onsource/TRACKING 2006.229.17:36:26.14/wx/26.92,1001.6,100 2006.229.17:36:26.26/cable/+6.4157E-03 2006.229.17:36:27.35/va/01,08,usb,yes,34,37 2006.229.17:36:27.35/va/02,07,usb,yes,37,38 2006.229.17:36:27.35/va/03,06,usb,yes,46,49 2006.229.17:36:27.35/va/04,07,usb,yes,39,40 2006.229.17:36:27.35/va/05,04,usb,yes,35,35 2006.229.17:36:27.35/va/06,04,usb,yes,39,38 2006.229.17:36:27.35/va/07,05,usb,yes,34,35 2006.229.17:36:27.35/va/08,06,usb,yes,25,31 2006.229.17:36:27.58/valo/01,524.99,yes,locked 2006.229.17:36:27.58/valo/02,534.99,yes,locked 2006.229.17:36:27.58/valo/03,564.99,yes,locked 2006.229.17:36:27.58/valo/04,624.99,yes,locked 2006.229.17:36:27.58/valo/05,734.99,yes,locked 2006.229.17:36:27.58/valo/06,814.99,yes,locked 2006.229.17:36:27.58/valo/07,864.99,yes,locked 2006.229.17:36:27.58/valo/08,884.99,yes,locked 2006.229.17:36:28.67/vb/01,04,usb,yes,31,41 2006.229.17:36:28.67/vb/02,04,usb,yes,34,47 2006.229.17:36:28.67/vb/03,04,usb,yes,31,36 2006.229.17:36:28.67/vb/04,04,usb,yes,35,34 2006.229.17:36:28.67/vb/05,04,usb,yes,28,30 2006.229.17:36:28.67/vb/06,04,usb,yes,33,29 2006.229.17:36:28.67/vb/07,04,usb,yes,32,32 2006.229.17:36:28.67/vb/08,04,usb,yes,30,33 2006.229.17:36:28.91/vblo/01,629.99,yes,locked 2006.229.17:36:28.91/vblo/02,634.99,yes,locked 2006.229.17:36:28.91/vblo/03,649.99,yes,locked 2006.229.17:36:28.91/vblo/04,679.99,yes,locked 2006.229.17:36:28.91/vblo/05,709.99,yes,locked 2006.229.17:36:28.91/vblo/06,719.99,yes,locked 2006.229.17:36:28.91/vblo/07,734.99,yes,locked 2006.229.17:36:28.91/vblo/08,744.99,yes,locked 2006.229.17:36:29.06/vabw/8 2006.229.17:36:29.21/vbbw/8 2006.229.17:36:29.30/xfe/off,on,12.2 2006.229.17:36:29.67/ifatt/23,28,28,28 2006.229.17:36:30.08/fmout-gps/S +4.68E-07 2006.229.17:36:30.12:!2006.229.17:40:45 2006.229.17:40:45.00:data_valid=off 2006.229.17:40:45.00:"et 2006.229.17:40:45.00:!+3s 2006.229.17:40:48.01:"tape 2006.229.17:40:48.01:postob 2006.229.17:40:48.07/cable/+6.4157E-03 2006.229.17:40:48.07/wx/26.89,1001.6,100 2006.229.17:40:49.08/fmout-gps/S +4.66E-07 2006.229.17:40:49.08:scan_name=229-1741,jd0608,260 2006.229.17:40:49.08:source=0014+813,001708.47,813508.1,2000.0,neutral 2006.229.17:40:50.13#flagr#flagr/antenna,new-source 2006.229.17:40:50.13:checkk5 2006.229.17:40:50.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:40:50.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:40:51.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:40:51.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:40:52.15/chk_obsdata//k5ts1/T2291736??a.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:40:52.54/chk_obsdata//k5ts2/T2291736??b.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:40:52.95/chk_obsdata//k5ts3/T2291736??c.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:40:53.35/chk_obsdata//k5ts4/T2291736??d.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:40:54.06/k5log//k5ts1_log_newline 2006.229.17:40:54.78/k5log//k5ts2_log_newline 2006.229.17:40:55.52/k5log//k5ts3_log_newline 2006.229.17:40:56.23/k5log//k5ts4_log_newline 2006.229.17:40:56.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:40:56.26:setupk4=1 2006.229.17:40:56.26$setupk4/echo=on 2006.229.17:40:56.26$setupk4/pcalon 2006.229.17:40:56.26$pcalon/"no phase cal control is implemented here 2006.229.17:40:56.26$setupk4/"tpicd=stop 2006.229.17:40:56.26$setupk4/"rec=synch_on 2006.229.17:40:56.26$setupk4/"rec_mode=128 2006.229.17:40:56.26$setupk4/!* 2006.229.17:40:56.26$setupk4/recpk4 2006.229.17:40:56.26$recpk4/recpatch= 2006.229.17:40:56.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:40:56.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:40:56.27$setupk4/vck44 2006.229.17:40:56.27$vck44/valo=1,524.99 2006.229.17:40:56.27#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.17:40:56.27#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.17:40:56.27#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:56.27#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:56.27#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:56.27#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:56.27#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:40:56.27#ibcon#first serial, iclass 31, count 0 2006.229.17:40:56.27#ibcon#enter sib2, iclass 31, count 0 2006.229.17:40:56.27#ibcon#flushed, iclass 31, count 0 2006.229.17:40:56.27#ibcon#about to write, iclass 31, count 0 2006.229.17:40:56.27#ibcon#wrote, iclass 31, count 0 2006.229.17:40:56.27#ibcon#about to read 3, iclass 31, count 0 2006.229.17:40:56.28#ibcon#read 3, iclass 31, count 0 2006.229.17:40:56.28#ibcon#about to read 4, iclass 31, count 0 2006.229.17:40:56.28#ibcon#read 4, iclass 31, count 0 2006.229.17:40:56.28#ibcon#about to read 5, iclass 31, count 0 2006.229.17:40:56.28#ibcon#read 5, iclass 31, count 0 2006.229.17:40:56.28#ibcon#about to read 6, iclass 31, count 0 2006.229.17:40:56.28#ibcon#read 6, iclass 31, count 0 2006.229.17:40:56.28#ibcon#end of sib2, iclass 31, count 0 2006.229.17:40:56.28#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:40:56.28#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:40:56.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:40:56.28#ibcon#*before write, iclass 31, count 0 2006.229.17:40:56.28#ibcon#enter sib2, iclass 31, count 0 2006.229.17:40:56.28#ibcon#flushed, iclass 31, count 0 2006.229.17:40:56.28#ibcon#about to write, iclass 31, count 0 2006.229.17:40:56.28#ibcon#wrote, iclass 31, count 0 2006.229.17:40:56.28#ibcon#about to read 3, iclass 31, count 0 2006.229.17:40:56.33#ibcon#read 3, iclass 31, count 0 2006.229.17:40:56.33#ibcon#about to read 4, iclass 31, count 0 2006.229.17:40:56.33#ibcon#read 4, iclass 31, count 0 2006.229.17:40:56.33#ibcon#about to read 5, iclass 31, count 0 2006.229.17:40:56.33#ibcon#read 5, iclass 31, count 0 2006.229.17:40:56.33#ibcon#about to read 6, iclass 31, count 0 2006.229.17:40:56.33#ibcon#read 6, iclass 31, count 0 2006.229.17:40:56.33#ibcon#end of sib2, iclass 31, count 0 2006.229.17:40:56.33#ibcon#*after write, iclass 31, count 0 2006.229.17:40:56.33#ibcon#*before return 0, iclass 31, count 0 2006.229.17:40:56.33#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:56.33#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:56.33#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:40:56.33#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:40:56.33$vck44/va=1,8 2006.229.17:40:56.33#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.17:40:56.33#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.17:40:56.33#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:56.33#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:40:56.33#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:40:56.33#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:40:56.33#ibcon#enter wrdev, iclass 33, count 2 2006.229.17:40:56.33#ibcon#first serial, iclass 33, count 2 2006.229.17:40:56.33#ibcon#enter sib2, iclass 33, count 2 2006.229.17:40:56.33#ibcon#flushed, iclass 33, count 2 2006.229.17:40:56.33#ibcon#about to write, iclass 33, count 2 2006.229.17:40:56.33#ibcon#wrote, iclass 33, count 2 2006.229.17:40:56.33#ibcon#about to read 3, iclass 33, count 2 2006.229.17:40:56.35#ibcon#read 3, iclass 33, count 2 2006.229.17:40:56.35#ibcon#about to read 4, iclass 33, count 2 2006.229.17:40:56.35#ibcon#read 4, iclass 33, count 2 2006.229.17:40:56.35#ibcon#about to read 5, iclass 33, count 2 2006.229.17:40:56.35#ibcon#read 5, iclass 33, count 2 2006.229.17:40:56.35#ibcon#about to read 6, iclass 33, count 2 2006.229.17:40:56.35#ibcon#read 6, iclass 33, count 2 2006.229.17:40:56.35#ibcon#end of sib2, iclass 33, count 2 2006.229.17:40:56.35#ibcon#*mode == 0, iclass 33, count 2 2006.229.17:40:56.35#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.17:40:56.35#ibcon#[25=AT01-08\r\n] 2006.229.17:40:56.35#ibcon#*before write, iclass 33, count 2 2006.229.17:40:56.35#ibcon#enter sib2, iclass 33, count 2 2006.229.17:40:56.35#ibcon#flushed, iclass 33, count 2 2006.229.17:40:56.35#ibcon#about to write, iclass 33, count 2 2006.229.17:40:56.35#ibcon#wrote, iclass 33, count 2 2006.229.17:40:56.35#ibcon#about to read 3, iclass 33, count 2 2006.229.17:40:56.38#ibcon#read 3, iclass 33, count 2 2006.229.17:40:56.38#ibcon#about to read 4, iclass 33, count 2 2006.229.17:40:56.38#ibcon#read 4, iclass 33, count 2 2006.229.17:40:56.38#ibcon#about to read 5, iclass 33, count 2 2006.229.17:40:56.38#ibcon#read 5, iclass 33, count 2 2006.229.17:40:56.38#ibcon#about to read 6, iclass 33, count 2 2006.229.17:40:56.38#ibcon#read 6, iclass 33, count 2 2006.229.17:40:56.38#ibcon#end of sib2, iclass 33, count 2 2006.229.17:40:56.38#ibcon#*after write, iclass 33, count 2 2006.229.17:40:56.38#ibcon#*before return 0, iclass 33, count 2 2006.229.17:40:56.38#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:40:56.38#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.17:40:56.38#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.17:40:56.38#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:56.38#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:40:56.50#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:40:56.50#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:40:56.50#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:40:56.50#ibcon#first serial, iclass 33, count 0 2006.229.17:40:56.50#ibcon#enter sib2, iclass 33, count 0 2006.229.17:40:56.50#ibcon#flushed, iclass 33, count 0 2006.229.17:40:56.50#ibcon#about to write, iclass 33, count 0 2006.229.17:40:56.50#ibcon#wrote, iclass 33, count 0 2006.229.17:40:56.50#ibcon#about to read 3, iclass 33, count 0 2006.229.17:40:56.52#ibcon#read 3, iclass 33, count 0 2006.229.17:40:56.52#ibcon#about to read 4, iclass 33, count 0 2006.229.17:40:56.52#ibcon#read 4, iclass 33, count 0 2006.229.17:40:56.52#ibcon#about to read 5, iclass 33, count 0 2006.229.17:40:56.52#ibcon#read 5, iclass 33, count 0 2006.229.17:40:56.52#ibcon#about to read 6, iclass 33, count 0 2006.229.17:40:56.52#ibcon#read 6, iclass 33, count 0 2006.229.17:40:56.52#ibcon#end of sib2, iclass 33, count 0 2006.229.17:40:56.52#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:40:56.52#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:40:56.52#ibcon#[25=USB\r\n] 2006.229.17:40:56.52#ibcon#*before write, iclass 33, count 0 2006.229.17:40:56.52#ibcon#enter sib2, iclass 33, count 0 2006.229.17:40:56.52#ibcon#flushed, iclass 33, count 0 2006.229.17:40:56.52#ibcon#about to write, iclass 33, count 0 2006.229.17:40:56.52#ibcon#wrote, iclass 33, count 0 2006.229.17:40:56.52#ibcon#about to read 3, iclass 33, count 0 2006.229.17:40:56.55#ibcon#read 3, iclass 33, count 0 2006.229.17:40:56.55#ibcon#about to read 4, iclass 33, count 0 2006.229.17:40:56.55#ibcon#read 4, iclass 33, count 0 2006.229.17:40:56.55#ibcon#about to read 5, iclass 33, count 0 2006.229.17:40:56.55#ibcon#read 5, iclass 33, count 0 2006.229.17:40:56.55#ibcon#about to read 6, iclass 33, count 0 2006.229.17:40:56.55#ibcon#read 6, iclass 33, count 0 2006.229.17:40:56.55#ibcon#end of sib2, iclass 33, count 0 2006.229.17:40:56.55#ibcon#*after write, iclass 33, count 0 2006.229.17:40:56.55#ibcon#*before return 0, iclass 33, count 0 2006.229.17:40:56.55#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:40:56.55#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.17:40:56.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:40:56.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:40:56.55$vck44/valo=2,534.99 2006.229.17:40:56.55#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.17:40:56.55#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.17:40:56.55#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:56.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:40:56.55#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:40:56.55#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:40:56.55#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:40:56.55#ibcon#first serial, iclass 35, count 0 2006.229.17:40:56.55#ibcon#enter sib2, iclass 35, count 0 2006.229.17:40:56.55#ibcon#flushed, iclass 35, count 0 2006.229.17:40:56.55#ibcon#about to write, iclass 35, count 0 2006.229.17:40:56.55#ibcon#wrote, iclass 35, count 0 2006.229.17:40:56.55#ibcon#about to read 3, iclass 35, count 0 2006.229.17:40:56.57#ibcon#read 3, iclass 35, count 0 2006.229.17:40:56.57#ibcon#about to read 4, iclass 35, count 0 2006.229.17:40:56.57#ibcon#read 4, iclass 35, count 0 2006.229.17:40:56.57#ibcon#about to read 5, iclass 35, count 0 2006.229.17:40:56.57#ibcon#read 5, iclass 35, count 0 2006.229.17:40:56.57#ibcon#about to read 6, iclass 35, count 0 2006.229.17:40:56.57#ibcon#read 6, iclass 35, count 0 2006.229.17:40:56.57#ibcon#end of sib2, iclass 35, count 0 2006.229.17:40:56.57#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:40:56.57#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:40:56.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:40:56.57#ibcon#*before write, iclass 35, count 0 2006.229.17:40:56.57#ibcon#enter sib2, iclass 35, count 0 2006.229.17:40:56.57#ibcon#flushed, iclass 35, count 0 2006.229.17:40:56.57#ibcon#about to write, iclass 35, count 0 2006.229.17:40:56.57#ibcon#wrote, iclass 35, count 0 2006.229.17:40:56.57#ibcon#about to read 3, iclass 35, count 0 2006.229.17:40:56.61#ibcon#read 3, iclass 35, count 0 2006.229.17:40:56.61#ibcon#about to read 4, iclass 35, count 0 2006.229.17:40:56.61#ibcon#read 4, iclass 35, count 0 2006.229.17:40:56.61#ibcon#about to read 5, iclass 35, count 0 2006.229.17:40:56.61#ibcon#read 5, iclass 35, count 0 2006.229.17:40:56.61#ibcon#about to read 6, iclass 35, count 0 2006.229.17:40:56.61#ibcon#read 6, iclass 35, count 0 2006.229.17:40:56.61#ibcon#end of sib2, iclass 35, count 0 2006.229.17:40:56.61#ibcon#*after write, iclass 35, count 0 2006.229.17:40:56.61#ibcon#*before return 0, iclass 35, count 0 2006.229.17:40:56.61#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:40:56.61#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.17:40:56.61#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:40:56.61#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:40:56.61$vck44/va=2,7 2006.229.17:40:56.61#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.17:40:56.61#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.17:40:56.61#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:56.61#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:40:56.67#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:40:56.67#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:40:56.67#ibcon#enter wrdev, iclass 37, count 2 2006.229.17:40:56.67#ibcon#first serial, iclass 37, count 2 2006.229.17:40:56.67#ibcon#enter sib2, iclass 37, count 2 2006.229.17:40:56.67#ibcon#flushed, iclass 37, count 2 2006.229.17:40:56.67#ibcon#about to write, iclass 37, count 2 2006.229.17:40:56.67#ibcon#wrote, iclass 37, count 2 2006.229.17:40:56.67#ibcon#about to read 3, iclass 37, count 2 2006.229.17:40:56.69#ibcon#read 3, iclass 37, count 2 2006.229.17:40:56.69#ibcon#about to read 4, iclass 37, count 2 2006.229.17:40:56.69#ibcon#read 4, iclass 37, count 2 2006.229.17:40:56.69#ibcon#about to read 5, iclass 37, count 2 2006.229.17:40:56.69#ibcon#read 5, iclass 37, count 2 2006.229.17:40:56.69#ibcon#about to read 6, iclass 37, count 2 2006.229.17:40:56.69#ibcon#read 6, iclass 37, count 2 2006.229.17:40:56.69#ibcon#end of sib2, iclass 37, count 2 2006.229.17:40:56.69#ibcon#*mode == 0, iclass 37, count 2 2006.229.17:40:56.69#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.17:40:56.69#ibcon#[25=AT02-07\r\n] 2006.229.17:40:56.69#ibcon#*before write, iclass 37, count 2 2006.229.17:40:56.69#ibcon#enter sib2, iclass 37, count 2 2006.229.17:40:56.69#ibcon#flushed, iclass 37, count 2 2006.229.17:40:56.69#ibcon#about to write, iclass 37, count 2 2006.229.17:40:56.69#ibcon#wrote, iclass 37, count 2 2006.229.17:40:56.69#ibcon#about to read 3, iclass 37, count 2 2006.229.17:40:56.72#ibcon#read 3, iclass 37, count 2 2006.229.17:40:56.72#ibcon#about to read 4, iclass 37, count 2 2006.229.17:40:56.72#ibcon#read 4, iclass 37, count 2 2006.229.17:40:56.72#ibcon#about to read 5, iclass 37, count 2 2006.229.17:40:56.72#ibcon#read 5, iclass 37, count 2 2006.229.17:40:56.72#ibcon#about to read 6, iclass 37, count 2 2006.229.17:40:56.72#ibcon#read 6, iclass 37, count 2 2006.229.17:40:56.72#ibcon#end of sib2, iclass 37, count 2 2006.229.17:40:56.72#ibcon#*after write, iclass 37, count 2 2006.229.17:40:56.72#ibcon#*before return 0, iclass 37, count 2 2006.229.17:40:56.72#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:40:56.72#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.17:40:56.72#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.17:40:56.72#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:56.72#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:40:56.84#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:40:56.84#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:40:56.84#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:40:56.84#ibcon#first serial, iclass 37, count 0 2006.229.17:40:56.84#ibcon#enter sib2, iclass 37, count 0 2006.229.17:40:56.84#ibcon#flushed, iclass 37, count 0 2006.229.17:40:56.84#ibcon#about to write, iclass 37, count 0 2006.229.17:40:56.84#ibcon#wrote, iclass 37, count 0 2006.229.17:40:56.84#ibcon#about to read 3, iclass 37, count 0 2006.229.17:40:56.86#ibcon#read 3, iclass 37, count 0 2006.229.17:40:56.86#ibcon#about to read 4, iclass 37, count 0 2006.229.17:40:56.86#ibcon#read 4, iclass 37, count 0 2006.229.17:40:56.86#ibcon#about to read 5, iclass 37, count 0 2006.229.17:40:56.86#ibcon#read 5, iclass 37, count 0 2006.229.17:40:56.86#ibcon#about to read 6, iclass 37, count 0 2006.229.17:40:56.86#ibcon#read 6, iclass 37, count 0 2006.229.17:40:56.86#ibcon#end of sib2, iclass 37, count 0 2006.229.17:40:56.86#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:40:56.86#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:40:56.86#ibcon#[25=USB\r\n] 2006.229.17:40:56.86#ibcon#*before write, iclass 37, count 0 2006.229.17:40:56.86#ibcon#enter sib2, iclass 37, count 0 2006.229.17:40:56.86#ibcon#flushed, iclass 37, count 0 2006.229.17:40:56.86#ibcon#about to write, iclass 37, count 0 2006.229.17:40:56.86#ibcon#wrote, iclass 37, count 0 2006.229.17:40:56.86#ibcon#about to read 3, iclass 37, count 0 2006.229.17:40:56.89#ibcon#read 3, iclass 37, count 0 2006.229.17:40:56.89#ibcon#about to read 4, iclass 37, count 0 2006.229.17:40:56.89#ibcon#read 4, iclass 37, count 0 2006.229.17:40:56.89#ibcon#about to read 5, iclass 37, count 0 2006.229.17:40:56.89#ibcon#read 5, iclass 37, count 0 2006.229.17:40:56.89#ibcon#about to read 6, iclass 37, count 0 2006.229.17:40:56.89#ibcon#read 6, iclass 37, count 0 2006.229.17:40:56.89#ibcon#end of sib2, iclass 37, count 0 2006.229.17:40:56.89#ibcon#*after write, iclass 37, count 0 2006.229.17:40:56.89#ibcon#*before return 0, iclass 37, count 0 2006.229.17:40:56.89#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:40:56.89#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.17:40:56.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:40:56.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:40:56.89$vck44/valo=3,564.99 2006.229.17:40:56.89#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.17:40:56.89#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.17:40:56.89#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:56.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:56.89#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:56.89#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:56.89#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:40:56.89#ibcon#first serial, iclass 39, count 0 2006.229.17:40:56.89#ibcon#enter sib2, iclass 39, count 0 2006.229.17:40:56.89#ibcon#flushed, iclass 39, count 0 2006.229.17:40:56.89#ibcon#about to write, iclass 39, count 0 2006.229.17:40:56.89#ibcon#wrote, iclass 39, count 0 2006.229.17:40:56.89#ibcon#about to read 3, iclass 39, count 0 2006.229.17:40:56.91#ibcon#read 3, iclass 39, count 0 2006.229.17:40:56.91#ibcon#about to read 4, iclass 39, count 0 2006.229.17:40:56.91#ibcon#read 4, iclass 39, count 0 2006.229.17:40:56.91#ibcon#about to read 5, iclass 39, count 0 2006.229.17:40:56.91#ibcon#read 5, iclass 39, count 0 2006.229.17:40:56.91#ibcon#about to read 6, iclass 39, count 0 2006.229.17:40:56.91#ibcon#read 6, iclass 39, count 0 2006.229.17:40:56.91#ibcon#end of sib2, iclass 39, count 0 2006.229.17:40:56.91#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:40:56.91#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:40:56.91#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:40:56.91#ibcon#*before write, iclass 39, count 0 2006.229.17:40:56.91#ibcon#enter sib2, iclass 39, count 0 2006.229.17:40:56.91#ibcon#flushed, iclass 39, count 0 2006.229.17:40:56.91#ibcon#about to write, iclass 39, count 0 2006.229.17:40:56.91#ibcon#wrote, iclass 39, count 0 2006.229.17:40:56.91#ibcon#about to read 3, iclass 39, count 0 2006.229.17:40:56.95#ibcon#read 3, iclass 39, count 0 2006.229.17:40:56.95#ibcon#about to read 4, iclass 39, count 0 2006.229.17:40:56.95#ibcon#read 4, iclass 39, count 0 2006.229.17:40:56.95#ibcon#about to read 5, iclass 39, count 0 2006.229.17:40:56.95#ibcon#read 5, iclass 39, count 0 2006.229.17:40:56.95#ibcon#about to read 6, iclass 39, count 0 2006.229.17:40:56.95#ibcon#read 6, iclass 39, count 0 2006.229.17:40:56.95#ibcon#end of sib2, iclass 39, count 0 2006.229.17:40:56.95#ibcon#*after write, iclass 39, count 0 2006.229.17:40:56.95#ibcon#*before return 0, iclass 39, count 0 2006.229.17:40:56.95#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:56.95#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:56.95#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:40:56.95#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:40:56.95$vck44/va=3,6 2006.229.17:40:56.95#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.17:40:56.95#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.17:40:56.95#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:56.95#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:57.01#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:57.01#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:57.01#ibcon#enter wrdev, iclass 3, count 2 2006.229.17:40:57.01#ibcon#first serial, iclass 3, count 2 2006.229.17:40:57.01#ibcon#enter sib2, iclass 3, count 2 2006.229.17:40:57.01#ibcon#flushed, iclass 3, count 2 2006.229.17:40:57.01#ibcon#about to write, iclass 3, count 2 2006.229.17:40:57.01#ibcon#wrote, iclass 3, count 2 2006.229.17:40:57.01#ibcon#about to read 3, iclass 3, count 2 2006.229.17:40:57.03#ibcon#read 3, iclass 3, count 2 2006.229.17:40:57.03#ibcon#about to read 4, iclass 3, count 2 2006.229.17:40:57.03#ibcon#read 4, iclass 3, count 2 2006.229.17:40:57.03#ibcon#about to read 5, iclass 3, count 2 2006.229.17:40:57.03#ibcon#read 5, iclass 3, count 2 2006.229.17:40:57.03#ibcon#about to read 6, iclass 3, count 2 2006.229.17:40:57.03#ibcon#read 6, iclass 3, count 2 2006.229.17:40:57.03#ibcon#end of sib2, iclass 3, count 2 2006.229.17:40:57.03#ibcon#*mode == 0, iclass 3, count 2 2006.229.17:40:57.03#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.17:40:57.03#ibcon#[25=AT03-06\r\n] 2006.229.17:40:57.03#ibcon#*before write, iclass 3, count 2 2006.229.17:40:57.03#ibcon#enter sib2, iclass 3, count 2 2006.229.17:40:57.03#ibcon#flushed, iclass 3, count 2 2006.229.17:40:57.03#ibcon#about to write, iclass 3, count 2 2006.229.17:40:57.03#ibcon#wrote, iclass 3, count 2 2006.229.17:40:57.03#ibcon#about to read 3, iclass 3, count 2 2006.229.17:40:57.06#ibcon#read 3, iclass 3, count 2 2006.229.17:40:57.06#ibcon#about to read 4, iclass 3, count 2 2006.229.17:40:57.06#ibcon#read 4, iclass 3, count 2 2006.229.17:40:57.06#ibcon#about to read 5, iclass 3, count 2 2006.229.17:40:57.06#ibcon#read 5, iclass 3, count 2 2006.229.17:40:57.06#ibcon#about to read 6, iclass 3, count 2 2006.229.17:40:57.06#ibcon#read 6, iclass 3, count 2 2006.229.17:40:57.06#ibcon#end of sib2, iclass 3, count 2 2006.229.17:40:57.06#ibcon#*after write, iclass 3, count 2 2006.229.17:40:57.06#ibcon#*before return 0, iclass 3, count 2 2006.229.17:40:57.06#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:57.06#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:57.06#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.17:40:57.06#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:57.06#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:57.18#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:57.18#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:57.18#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:40:57.18#ibcon#first serial, iclass 3, count 0 2006.229.17:40:57.18#ibcon#enter sib2, iclass 3, count 0 2006.229.17:40:57.18#ibcon#flushed, iclass 3, count 0 2006.229.17:40:57.18#ibcon#about to write, iclass 3, count 0 2006.229.17:40:57.18#ibcon#wrote, iclass 3, count 0 2006.229.17:40:57.18#ibcon#about to read 3, iclass 3, count 0 2006.229.17:40:57.20#ibcon#read 3, iclass 3, count 0 2006.229.17:40:57.20#ibcon#about to read 4, iclass 3, count 0 2006.229.17:40:57.20#ibcon#read 4, iclass 3, count 0 2006.229.17:40:57.20#ibcon#about to read 5, iclass 3, count 0 2006.229.17:40:57.20#ibcon#read 5, iclass 3, count 0 2006.229.17:40:57.20#ibcon#about to read 6, iclass 3, count 0 2006.229.17:40:57.20#ibcon#read 6, iclass 3, count 0 2006.229.17:40:57.20#ibcon#end of sib2, iclass 3, count 0 2006.229.17:40:57.20#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:40:57.20#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:40:57.20#ibcon#[25=USB\r\n] 2006.229.17:40:57.20#ibcon#*before write, iclass 3, count 0 2006.229.17:40:57.20#ibcon#enter sib2, iclass 3, count 0 2006.229.17:40:57.20#ibcon#flushed, iclass 3, count 0 2006.229.17:40:57.20#ibcon#about to write, iclass 3, count 0 2006.229.17:40:57.20#ibcon#wrote, iclass 3, count 0 2006.229.17:40:57.20#ibcon#about to read 3, iclass 3, count 0 2006.229.17:40:57.23#ibcon#read 3, iclass 3, count 0 2006.229.17:40:57.23#ibcon#about to read 4, iclass 3, count 0 2006.229.17:40:57.23#ibcon#read 4, iclass 3, count 0 2006.229.17:40:57.23#ibcon#about to read 5, iclass 3, count 0 2006.229.17:40:57.23#ibcon#read 5, iclass 3, count 0 2006.229.17:40:57.23#ibcon#about to read 6, iclass 3, count 0 2006.229.17:40:57.23#ibcon#read 6, iclass 3, count 0 2006.229.17:40:57.23#ibcon#end of sib2, iclass 3, count 0 2006.229.17:40:57.23#ibcon#*after write, iclass 3, count 0 2006.229.17:40:57.23#ibcon#*before return 0, iclass 3, count 0 2006.229.17:40:57.23#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:57.23#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:57.23#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:40:57.23#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:40:57.23$vck44/valo=4,624.99 2006.229.17:40:57.23#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.17:40:57.23#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.17:40:57.23#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:57.23#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:57.23#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:57.23#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:57.23#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:40:57.23#ibcon#first serial, iclass 5, count 0 2006.229.17:40:57.23#ibcon#enter sib2, iclass 5, count 0 2006.229.17:40:57.23#ibcon#flushed, iclass 5, count 0 2006.229.17:40:57.23#ibcon#about to write, iclass 5, count 0 2006.229.17:40:57.23#ibcon#wrote, iclass 5, count 0 2006.229.17:40:57.23#ibcon#about to read 3, iclass 5, count 0 2006.229.17:40:57.25#ibcon#read 3, iclass 5, count 0 2006.229.17:40:57.25#ibcon#about to read 4, iclass 5, count 0 2006.229.17:40:57.25#ibcon#read 4, iclass 5, count 0 2006.229.17:40:57.25#ibcon#about to read 5, iclass 5, count 0 2006.229.17:40:57.25#ibcon#read 5, iclass 5, count 0 2006.229.17:40:57.25#ibcon#about to read 6, iclass 5, count 0 2006.229.17:40:57.25#ibcon#read 6, iclass 5, count 0 2006.229.17:40:57.25#ibcon#end of sib2, iclass 5, count 0 2006.229.17:40:57.25#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:40:57.25#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:40:57.25#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:40:57.25#ibcon#*before write, iclass 5, count 0 2006.229.17:40:57.25#ibcon#enter sib2, iclass 5, count 0 2006.229.17:40:57.25#ibcon#flushed, iclass 5, count 0 2006.229.17:40:57.25#ibcon#about to write, iclass 5, count 0 2006.229.17:40:57.25#ibcon#wrote, iclass 5, count 0 2006.229.17:40:57.25#ibcon#about to read 3, iclass 5, count 0 2006.229.17:40:57.29#ibcon#read 3, iclass 5, count 0 2006.229.17:40:57.29#ibcon#about to read 4, iclass 5, count 0 2006.229.17:40:57.29#ibcon#read 4, iclass 5, count 0 2006.229.17:40:57.29#ibcon#about to read 5, iclass 5, count 0 2006.229.17:40:57.29#ibcon#read 5, iclass 5, count 0 2006.229.17:40:57.29#ibcon#about to read 6, iclass 5, count 0 2006.229.17:40:57.29#ibcon#read 6, iclass 5, count 0 2006.229.17:40:57.29#ibcon#end of sib2, iclass 5, count 0 2006.229.17:40:57.29#ibcon#*after write, iclass 5, count 0 2006.229.17:40:57.29#ibcon#*before return 0, iclass 5, count 0 2006.229.17:40:57.29#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:57.29#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:57.29#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:40:57.29#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:40:57.29$vck44/va=4,7 2006.229.17:40:57.29#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.17:40:57.29#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.17:40:57.29#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:57.29#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:40:57.35#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:40:57.35#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:40:57.35#ibcon#enter wrdev, iclass 7, count 2 2006.229.17:40:57.35#ibcon#first serial, iclass 7, count 2 2006.229.17:40:57.35#ibcon#enter sib2, iclass 7, count 2 2006.229.17:40:57.35#ibcon#flushed, iclass 7, count 2 2006.229.17:40:57.35#ibcon#about to write, iclass 7, count 2 2006.229.17:40:57.35#ibcon#wrote, iclass 7, count 2 2006.229.17:40:57.35#ibcon#about to read 3, iclass 7, count 2 2006.229.17:40:57.37#ibcon#read 3, iclass 7, count 2 2006.229.17:40:57.37#ibcon#about to read 4, iclass 7, count 2 2006.229.17:40:57.37#ibcon#read 4, iclass 7, count 2 2006.229.17:40:57.37#ibcon#about to read 5, iclass 7, count 2 2006.229.17:40:57.37#ibcon#read 5, iclass 7, count 2 2006.229.17:40:57.37#ibcon#about to read 6, iclass 7, count 2 2006.229.17:40:57.37#ibcon#read 6, iclass 7, count 2 2006.229.17:40:57.37#ibcon#end of sib2, iclass 7, count 2 2006.229.17:40:57.37#ibcon#*mode == 0, iclass 7, count 2 2006.229.17:40:57.37#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.17:40:57.37#ibcon#[25=AT04-07\r\n] 2006.229.17:40:57.37#ibcon#*before write, iclass 7, count 2 2006.229.17:40:57.37#ibcon#enter sib2, iclass 7, count 2 2006.229.17:40:57.37#ibcon#flushed, iclass 7, count 2 2006.229.17:40:57.37#ibcon#about to write, iclass 7, count 2 2006.229.17:40:57.37#ibcon#wrote, iclass 7, count 2 2006.229.17:40:57.37#ibcon#about to read 3, iclass 7, count 2 2006.229.17:40:57.40#ibcon#read 3, iclass 7, count 2 2006.229.17:40:57.40#ibcon#about to read 4, iclass 7, count 2 2006.229.17:40:57.40#ibcon#read 4, iclass 7, count 2 2006.229.17:40:57.40#ibcon#about to read 5, iclass 7, count 2 2006.229.17:40:57.40#ibcon#read 5, iclass 7, count 2 2006.229.17:40:57.40#ibcon#about to read 6, iclass 7, count 2 2006.229.17:40:57.40#ibcon#read 6, iclass 7, count 2 2006.229.17:40:57.40#ibcon#end of sib2, iclass 7, count 2 2006.229.17:40:57.40#ibcon#*after write, iclass 7, count 2 2006.229.17:40:57.40#ibcon#*before return 0, iclass 7, count 2 2006.229.17:40:57.40#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:40:57.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:40:57.40#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.17:40:57.40#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:57.40#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:40:57.52#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:40:57.52#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:40:57.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:40:57.52#ibcon#first serial, iclass 7, count 0 2006.229.17:40:57.52#ibcon#enter sib2, iclass 7, count 0 2006.229.17:40:57.52#ibcon#flushed, iclass 7, count 0 2006.229.17:40:57.52#ibcon#about to write, iclass 7, count 0 2006.229.17:40:57.52#ibcon#wrote, iclass 7, count 0 2006.229.17:40:57.52#ibcon#about to read 3, iclass 7, count 0 2006.229.17:40:57.54#ibcon#read 3, iclass 7, count 0 2006.229.17:40:57.54#ibcon#about to read 4, iclass 7, count 0 2006.229.17:40:57.54#ibcon#read 4, iclass 7, count 0 2006.229.17:40:57.54#ibcon#about to read 5, iclass 7, count 0 2006.229.17:40:57.54#ibcon#read 5, iclass 7, count 0 2006.229.17:40:57.54#ibcon#about to read 6, iclass 7, count 0 2006.229.17:40:57.54#ibcon#read 6, iclass 7, count 0 2006.229.17:40:57.54#ibcon#end of sib2, iclass 7, count 0 2006.229.17:40:57.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:40:57.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:40:57.54#ibcon#[25=USB\r\n] 2006.229.17:40:57.54#ibcon#*before write, iclass 7, count 0 2006.229.17:40:57.54#ibcon#enter sib2, iclass 7, count 0 2006.229.17:40:57.54#ibcon#flushed, iclass 7, count 0 2006.229.17:40:57.54#ibcon#about to write, iclass 7, count 0 2006.229.17:40:57.54#ibcon#wrote, iclass 7, count 0 2006.229.17:40:57.54#ibcon#about to read 3, iclass 7, count 0 2006.229.17:40:57.57#ibcon#read 3, iclass 7, count 0 2006.229.17:40:57.57#ibcon#about to read 4, iclass 7, count 0 2006.229.17:40:57.57#ibcon#read 4, iclass 7, count 0 2006.229.17:40:57.57#ibcon#about to read 5, iclass 7, count 0 2006.229.17:40:57.57#ibcon#read 5, iclass 7, count 0 2006.229.17:40:57.57#ibcon#about to read 6, iclass 7, count 0 2006.229.17:40:57.57#ibcon#read 6, iclass 7, count 0 2006.229.17:40:57.57#ibcon#end of sib2, iclass 7, count 0 2006.229.17:40:57.57#ibcon#*after write, iclass 7, count 0 2006.229.17:40:57.57#ibcon#*before return 0, iclass 7, count 0 2006.229.17:40:57.57#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:40:57.57#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:40:57.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:40:57.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:40:57.57$vck44/valo=5,734.99 2006.229.17:40:57.57#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.17:40:57.57#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.17:40:57.57#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:57.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:40:57.57#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:40:57.57#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:40:57.57#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:40:57.57#ibcon#first serial, iclass 11, count 0 2006.229.17:40:57.57#ibcon#enter sib2, iclass 11, count 0 2006.229.17:40:57.57#ibcon#flushed, iclass 11, count 0 2006.229.17:40:57.57#ibcon#about to write, iclass 11, count 0 2006.229.17:40:57.57#ibcon#wrote, iclass 11, count 0 2006.229.17:40:57.57#ibcon#about to read 3, iclass 11, count 0 2006.229.17:40:57.59#ibcon#read 3, iclass 11, count 0 2006.229.17:40:57.59#ibcon#about to read 4, iclass 11, count 0 2006.229.17:40:57.59#ibcon#read 4, iclass 11, count 0 2006.229.17:40:57.59#ibcon#about to read 5, iclass 11, count 0 2006.229.17:40:57.59#ibcon#read 5, iclass 11, count 0 2006.229.17:40:57.59#ibcon#about to read 6, iclass 11, count 0 2006.229.17:40:57.59#ibcon#read 6, iclass 11, count 0 2006.229.17:40:57.59#ibcon#end of sib2, iclass 11, count 0 2006.229.17:40:57.59#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:40:57.59#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:40:57.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:40:57.59#ibcon#*before write, iclass 11, count 0 2006.229.17:40:57.59#ibcon#enter sib2, iclass 11, count 0 2006.229.17:40:57.59#ibcon#flushed, iclass 11, count 0 2006.229.17:40:57.59#ibcon#about to write, iclass 11, count 0 2006.229.17:40:57.59#ibcon#wrote, iclass 11, count 0 2006.229.17:40:57.59#ibcon#about to read 3, iclass 11, count 0 2006.229.17:40:57.63#ibcon#read 3, iclass 11, count 0 2006.229.17:40:57.63#ibcon#about to read 4, iclass 11, count 0 2006.229.17:40:57.63#ibcon#read 4, iclass 11, count 0 2006.229.17:40:57.63#ibcon#about to read 5, iclass 11, count 0 2006.229.17:40:57.63#ibcon#read 5, iclass 11, count 0 2006.229.17:40:57.63#ibcon#about to read 6, iclass 11, count 0 2006.229.17:40:57.63#ibcon#read 6, iclass 11, count 0 2006.229.17:40:57.63#ibcon#end of sib2, iclass 11, count 0 2006.229.17:40:57.63#ibcon#*after write, iclass 11, count 0 2006.229.17:40:57.63#ibcon#*before return 0, iclass 11, count 0 2006.229.17:40:57.63#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:40:57.63#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:40:57.63#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:40:57.63#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:40:57.63$vck44/va=5,4 2006.229.17:40:57.63#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.17:40:57.63#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.17:40:57.63#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:57.63#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:40:57.69#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:40:57.69#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:40:57.69#ibcon#enter wrdev, iclass 13, count 2 2006.229.17:40:57.69#ibcon#first serial, iclass 13, count 2 2006.229.17:40:57.69#ibcon#enter sib2, iclass 13, count 2 2006.229.17:40:57.69#ibcon#flushed, iclass 13, count 2 2006.229.17:40:57.69#ibcon#about to write, iclass 13, count 2 2006.229.17:40:57.69#ibcon#wrote, iclass 13, count 2 2006.229.17:40:57.69#ibcon#about to read 3, iclass 13, count 2 2006.229.17:40:57.71#ibcon#read 3, iclass 13, count 2 2006.229.17:40:57.71#ibcon#about to read 4, iclass 13, count 2 2006.229.17:40:57.71#ibcon#read 4, iclass 13, count 2 2006.229.17:40:57.71#ibcon#about to read 5, iclass 13, count 2 2006.229.17:40:57.71#ibcon#read 5, iclass 13, count 2 2006.229.17:40:57.71#ibcon#about to read 6, iclass 13, count 2 2006.229.17:40:57.71#ibcon#read 6, iclass 13, count 2 2006.229.17:40:57.71#ibcon#end of sib2, iclass 13, count 2 2006.229.17:40:57.71#ibcon#*mode == 0, iclass 13, count 2 2006.229.17:40:57.71#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.17:40:57.71#ibcon#[25=AT05-04\r\n] 2006.229.17:40:57.71#ibcon#*before write, iclass 13, count 2 2006.229.17:40:57.71#ibcon#enter sib2, iclass 13, count 2 2006.229.17:40:57.71#ibcon#flushed, iclass 13, count 2 2006.229.17:40:57.71#ibcon#about to write, iclass 13, count 2 2006.229.17:40:57.71#ibcon#wrote, iclass 13, count 2 2006.229.17:40:57.71#ibcon#about to read 3, iclass 13, count 2 2006.229.17:40:57.74#ibcon#read 3, iclass 13, count 2 2006.229.17:40:57.74#ibcon#about to read 4, iclass 13, count 2 2006.229.17:40:57.74#ibcon#read 4, iclass 13, count 2 2006.229.17:40:57.74#ibcon#about to read 5, iclass 13, count 2 2006.229.17:40:57.74#ibcon#read 5, iclass 13, count 2 2006.229.17:40:57.74#ibcon#about to read 6, iclass 13, count 2 2006.229.17:40:57.74#ibcon#read 6, iclass 13, count 2 2006.229.17:40:57.74#ibcon#end of sib2, iclass 13, count 2 2006.229.17:40:57.74#ibcon#*after write, iclass 13, count 2 2006.229.17:40:57.74#ibcon#*before return 0, iclass 13, count 2 2006.229.17:40:57.74#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:40:57.74#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:40:57.74#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.17:40:57.74#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:57.74#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:40:57.86#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:40:57.86#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:40:57.86#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:40:57.86#ibcon#first serial, iclass 13, count 0 2006.229.17:40:57.86#ibcon#enter sib2, iclass 13, count 0 2006.229.17:40:57.86#ibcon#flushed, iclass 13, count 0 2006.229.17:40:57.86#ibcon#about to write, iclass 13, count 0 2006.229.17:40:57.86#ibcon#wrote, iclass 13, count 0 2006.229.17:40:57.86#ibcon#about to read 3, iclass 13, count 0 2006.229.17:40:57.88#ibcon#read 3, iclass 13, count 0 2006.229.17:40:57.88#ibcon#about to read 4, iclass 13, count 0 2006.229.17:40:57.88#ibcon#read 4, iclass 13, count 0 2006.229.17:40:57.88#ibcon#about to read 5, iclass 13, count 0 2006.229.17:40:57.88#ibcon#read 5, iclass 13, count 0 2006.229.17:40:57.88#ibcon#about to read 6, iclass 13, count 0 2006.229.17:40:57.88#ibcon#read 6, iclass 13, count 0 2006.229.17:40:57.88#ibcon#end of sib2, iclass 13, count 0 2006.229.17:40:57.88#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:40:57.88#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:40:57.88#ibcon#[25=USB\r\n] 2006.229.17:40:57.88#ibcon#*before write, iclass 13, count 0 2006.229.17:40:57.88#ibcon#enter sib2, iclass 13, count 0 2006.229.17:40:57.88#ibcon#flushed, iclass 13, count 0 2006.229.17:40:57.88#ibcon#about to write, iclass 13, count 0 2006.229.17:40:57.88#ibcon#wrote, iclass 13, count 0 2006.229.17:40:57.88#ibcon#about to read 3, iclass 13, count 0 2006.229.17:40:57.91#ibcon#read 3, iclass 13, count 0 2006.229.17:40:57.91#ibcon#about to read 4, iclass 13, count 0 2006.229.17:40:57.91#ibcon#read 4, iclass 13, count 0 2006.229.17:40:57.91#ibcon#about to read 5, iclass 13, count 0 2006.229.17:40:57.91#ibcon#read 5, iclass 13, count 0 2006.229.17:40:57.91#ibcon#about to read 6, iclass 13, count 0 2006.229.17:40:57.91#ibcon#read 6, iclass 13, count 0 2006.229.17:40:57.91#ibcon#end of sib2, iclass 13, count 0 2006.229.17:40:57.91#ibcon#*after write, iclass 13, count 0 2006.229.17:40:57.91#ibcon#*before return 0, iclass 13, count 0 2006.229.17:40:57.91#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:40:57.91#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:40:57.91#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:40:57.91#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:40:57.91$vck44/valo=6,814.99 2006.229.17:40:57.91#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.17:40:57.91#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.17:40:57.91#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:57.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:40:57.91#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:40:57.91#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:40:57.91#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:40:57.91#ibcon#first serial, iclass 15, count 0 2006.229.17:40:57.91#ibcon#enter sib2, iclass 15, count 0 2006.229.17:40:57.91#ibcon#flushed, iclass 15, count 0 2006.229.17:40:57.91#ibcon#about to write, iclass 15, count 0 2006.229.17:40:57.91#ibcon#wrote, iclass 15, count 0 2006.229.17:40:57.91#ibcon#about to read 3, iclass 15, count 0 2006.229.17:40:57.93#ibcon#read 3, iclass 15, count 0 2006.229.17:40:57.93#ibcon#about to read 4, iclass 15, count 0 2006.229.17:40:57.93#ibcon#read 4, iclass 15, count 0 2006.229.17:40:57.93#ibcon#about to read 5, iclass 15, count 0 2006.229.17:40:57.93#ibcon#read 5, iclass 15, count 0 2006.229.17:40:57.93#ibcon#about to read 6, iclass 15, count 0 2006.229.17:40:57.93#ibcon#read 6, iclass 15, count 0 2006.229.17:40:57.93#ibcon#end of sib2, iclass 15, count 0 2006.229.17:40:57.93#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:40:57.93#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:40:57.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:40:57.93#ibcon#*before write, iclass 15, count 0 2006.229.17:40:57.93#ibcon#enter sib2, iclass 15, count 0 2006.229.17:40:57.93#ibcon#flushed, iclass 15, count 0 2006.229.17:40:57.93#ibcon#about to write, iclass 15, count 0 2006.229.17:40:57.93#ibcon#wrote, iclass 15, count 0 2006.229.17:40:57.93#ibcon#about to read 3, iclass 15, count 0 2006.229.17:40:57.97#ibcon#read 3, iclass 15, count 0 2006.229.17:40:57.97#ibcon#about to read 4, iclass 15, count 0 2006.229.17:40:57.97#ibcon#read 4, iclass 15, count 0 2006.229.17:40:57.97#ibcon#about to read 5, iclass 15, count 0 2006.229.17:40:57.97#ibcon#read 5, iclass 15, count 0 2006.229.17:40:57.97#ibcon#about to read 6, iclass 15, count 0 2006.229.17:40:57.97#ibcon#read 6, iclass 15, count 0 2006.229.17:40:57.97#ibcon#end of sib2, iclass 15, count 0 2006.229.17:40:57.97#ibcon#*after write, iclass 15, count 0 2006.229.17:40:57.97#ibcon#*before return 0, iclass 15, count 0 2006.229.17:40:57.97#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:40:57.97#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:40:57.97#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:40:57.97#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:40:57.97$vck44/va=6,4 2006.229.17:40:57.97#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.17:40:57.97#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.17:40:57.97#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:57.97#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:40:58.03#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:40:58.03#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:40:58.03#ibcon#enter wrdev, iclass 17, count 2 2006.229.17:40:58.03#ibcon#first serial, iclass 17, count 2 2006.229.17:40:58.03#ibcon#enter sib2, iclass 17, count 2 2006.229.17:40:58.03#ibcon#flushed, iclass 17, count 2 2006.229.17:40:58.03#ibcon#about to write, iclass 17, count 2 2006.229.17:40:58.03#ibcon#wrote, iclass 17, count 2 2006.229.17:40:58.03#ibcon#about to read 3, iclass 17, count 2 2006.229.17:40:58.05#ibcon#read 3, iclass 17, count 2 2006.229.17:40:58.05#ibcon#about to read 4, iclass 17, count 2 2006.229.17:40:58.05#ibcon#read 4, iclass 17, count 2 2006.229.17:40:58.05#ibcon#about to read 5, iclass 17, count 2 2006.229.17:40:58.05#ibcon#read 5, iclass 17, count 2 2006.229.17:40:58.05#ibcon#about to read 6, iclass 17, count 2 2006.229.17:40:58.05#ibcon#read 6, iclass 17, count 2 2006.229.17:40:58.05#ibcon#end of sib2, iclass 17, count 2 2006.229.17:40:58.05#ibcon#*mode == 0, iclass 17, count 2 2006.229.17:40:58.05#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.17:40:58.05#ibcon#[25=AT06-04\r\n] 2006.229.17:40:58.05#ibcon#*before write, iclass 17, count 2 2006.229.17:40:58.05#ibcon#enter sib2, iclass 17, count 2 2006.229.17:40:58.05#ibcon#flushed, iclass 17, count 2 2006.229.17:40:58.05#ibcon#about to write, iclass 17, count 2 2006.229.17:40:58.05#ibcon#wrote, iclass 17, count 2 2006.229.17:40:58.05#ibcon#about to read 3, iclass 17, count 2 2006.229.17:40:58.08#ibcon#read 3, iclass 17, count 2 2006.229.17:40:58.08#ibcon#about to read 4, iclass 17, count 2 2006.229.17:40:58.08#ibcon#read 4, iclass 17, count 2 2006.229.17:40:58.08#ibcon#about to read 5, iclass 17, count 2 2006.229.17:40:58.08#ibcon#read 5, iclass 17, count 2 2006.229.17:40:58.08#ibcon#about to read 6, iclass 17, count 2 2006.229.17:40:58.08#ibcon#read 6, iclass 17, count 2 2006.229.17:40:58.08#ibcon#end of sib2, iclass 17, count 2 2006.229.17:40:58.08#ibcon#*after write, iclass 17, count 2 2006.229.17:40:58.08#ibcon#*before return 0, iclass 17, count 2 2006.229.17:40:58.08#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:40:58.08#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:40:58.08#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.17:40:58.08#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:58.08#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:40:58.20#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:40:58.20#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:40:58.20#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:40:58.20#ibcon#first serial, iclass 17, count 0 2006.229.17:40:58.20#ibcon#enter sib2, iclass 17, count 0 2006.229.17:40:58.20#ibcon#flushed, iclass 17, count 0 2006.229.17:40:58.20#ibcon#about to write, iclass 17, count 0 2006.229.17:40:58.20#ibcon#wrote, iclass 17, count 0 2006.229.17:40:58.20#ibcon#about to read 3, iclass 17, count 0 2006.229.17:40:58.22#ibcon#read 3, iclass 17, count 0 2006.229.17:40:58.22#ibcon#about to read 4, iclass 17, count 0 2006.229.17:40:58.22#ibcon#read 4, iclass 17, count 0 2006.229.17:40:58.22#ibcon#about to read 5, iclass 17, count 0 2006.229.17:40:58.22#ibcon#read 5, iclass 17, count 0 2006.229.17:40:58.22#ibcon#about to read 6, iclass 17, count 0 2006.229.17:40:58.22#ibcon#read 6, iclass 17, count 0 2006.229.17:40:58.22#ibcon#end of sib2, iclass 17, count 0 2006.229.17:40:58.22#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:40:58.22#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:40:58.22#ibcon#[25=USB\r\n] 2006.229.17:40:58.22#ibcon#*before write, iclass 17, count 0 2006.229.17:40:58.22#ibcon#enter sib2, iclass 17, count 0 2006.229.17:40:58.22#ibcon#flushed, iclass 17, count 0 2006.229.17:40:58.22#ibcon#about to write, iclass 17, count 0 2006.229.17:40:58.22#ibcon#wrote, iclass 17, count 0 2006.229.17:40:58.22#ibcon#about to read 3, iclass 17, count 0 2006.229.17:40:58.25#ibcon#read 3, iclass 17, count 0 2006.229.17:40:58.25#ibcon#about to read 4, iclass 17, count 0 2006.229.17:40:58.25#ibcon#read 4, iclass 17, count 0 2006.229.17:40:58.25#ibcon#about to read 5, iclass 17, count 0 2006.229.17:40:58.25#ibcon#read 5, iclass 17, count 0 2006.229.17:40:58.25#ibcon#about to read 6, iclass 17, count 0 2006.229.17:40:58.25#ibcon#read 6, iclass 17, count 0 2006.229.17:40:58.25#ibcon#end of sib2, iclass 17, count 0 2006.229.17:40:58.25#ibcon#*after write, iclass 17, count 0 2006.229.17:40:58.25#ibcon#*before return 0, iclass 17, count 0 2006.229.17:40:58.25#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:40:58.25#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:40:58.25#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:40:58.25#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:40:58.25$vck44/valo=7,864.99 2006.229.17:40:58.25#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.17:40:58.25#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.17:40:58.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:58.25#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:40:58.25#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:40:58.25#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:40:58.25#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:40:58.25#ibcon#first serial, iclass 19, count 0 2006.229.17:40:58.25#ibcon#enter sib2, iclass 19, count 0 2006.229.17:40:58.25#ibcon#flushed, iclass 19, count 0 2006.229.17:40:58.25#ibcon#about to write, iclass 19, count 0 2006.229.17:40:58.25#ibcon#wrote, iclass 19, count 0 2006.229.17:40:58.25#ibcon#about to read 3, iclass 19, count 0 2006.229.17:40:58.27#ibcon#read 3, iclass 19, count 0 2006.229.17:40:58.27#ibcon#about to read 4, iclass 19, count 0 2006.229.17:40:58.27#ibcon#read 4, iclass 19, count 0 2006.229.17:40:58.27#ibcon#about to read 5, iclass 19, count 0 2006.229.17:40:58.27#ibcon#read 5, iclass 19, count 0 2006.229.17:40:58.27#ibcon#about to read 6, iclass 19, count 0 2006.229.17:40:58.27#ibcon#read 6, iclass 19, count 0 2006.229.17:40:58.27#ibcon#end of sib2, iclass 19, count 0 2006.229.17:40:58.27#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:40:58.27#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:40:58.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:40:58.27#ibcon#*before write, iclass 19, count 0 2006.229.17:40:58.27#ibcon#enter sib2, iclass 19, count 0 2006.229.17:40:58.27#ibcon#flushed, iclass 19, count 0 2006.229.17:40:58.27#ibcon#about to write, iclass 19, count 0 2006.229.17:40:58.27#ibcon#wrote, iclass 19, count 0 2006.229.17:40:58.27#ibcon#about to read 3, iclass 19, count 0 2006.229.17:40:58.31#ibcon#read 3, iclass 19, count 0 2006.229.17:40:58.31#ibcon#about to read 4, iclass 19, count 0 2006.229.17:40:58.31#ibcon#read 4, iclass 19, count 0 2006.229.17:40:58.31#ibcon#about to read 5, iclass 19, count 0 2006.229.17:40:58.31#ibcon#read 5, iclass 19, count 0 2006.229.17:40:58.31#ibcon#about to read 6, iclass 19, count 0 2006.229.17:40:58.31#ibcon#read 6, iclass 19, count 0 2006.229.17:40:58.31#ibcon#end of sib2, iclass 19, count 0 2006.229.17:40:58.31#ibcon#*after write, iclass 19, count 0 2006.229.17:40:58.31#ibcon#*before return 0, iclass 19, count 0 2006.229.17:40:58.31#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:40:58.31#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:40:58.31#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:40:58.31#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:40:58.31$vck44/va=7,5 2006.229.17:40:58.31#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.17:40:58.31#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.17:40:58.31#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:58.31#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:40:58.37#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:40:58.37#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:40:58.37#ibcon#enter wrdev, iclass 21, count 2 2006.229.17:40:58.37#ibcon#first serial, iclass 21, count 2 2006.229.17:40:58.37#ibcon#enter sib2, iclass 21, count 2 2006.229.17:40:58.37#ibcon#flushed, iclass 21, count 2 2006.229.17:40:58.37#ibcon#about to write, iclass 21, count 2 2006.229.17:40:58.37#ibcon#wrote, iclass 21, count 2 2006.229.17:40:58.37#ibcon#about to read 3, iclass 21, count 2 2006.229.17:40:58.39#ibcon#read 3, iclass 21, count 2 2006.229.17:40:58.39#ibcon#about to read 4, iclass 21, count 2 2006.229.17:40:58.39#ibcon#read 4, iclass 21, count 2 2006.229.17:40:58.39#ibcon#about to read 5, iclass 21, count 2 2006.229.17:40:58.39#ibcon#read 5, iclass 21, count 2 2006.229.17:40:58.39#ibcon#about to read 6, iclass 21, count 2 2006.229.17:40:58.39#ibcon#read 6, iclass 21, count 2 2006.229.17:40:58.39#ibcon#end of sib2, iclass 21, count 2 2006.229.17:40:58.39#ibcon#*mode == 0, iclass 21, count 2 2006.229.17:40:58.39#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.17:40:58.39#ibcon#[25=AT07-05\r\n] 2006.229.17:40:58.39#ibcon#*before write, iclass 21, count 2 2006.229.17:40:58.39#ibcon#enter sib2, iclass 21, count 2 2006.229.17:40:58.39#ibcon#flushed, iclass 21, count 2 2006.229.17:40:58.39#ibcon#about to write, iclass 21, count 2 2006.229.17:40:58.39#ibcon#wrote, iclass 21, count 2 2006.229.17:40:58.39#ibcon#about to read 3, iclass 21, count 2 2006.229.17:40:58.42#ibcon#read 3, iclass 21, count 2 2006.229.17:40:58.42#ibcon#about to read 4, iclass 21, count 2 2006.229.17:40:58.42#ibcon#read 4, iclass 21, count 2 2006.229.17:40:58.42#ibcon#about to read 5, iclass 21, count 2 2006.229.17:40:58.42#ibcon#read 5, iclass 21, count 2 2006.229.17:40:58.42#ibcon#about to read 6, iclass 21, count 2 2006.229.17:40:58.42#ibcon#read 6, iclass 21, count 2 2006.229.17:40:58.42#ibcon#end of sib2, iclass 21, count 2 2006.229.17:40:58.42#ibcon#*after write, iclass 21, count 2 2006.229.17:40:58.42#ibcon#*before return 0, iclass 21, count 2 2006.229.17:40:58.42#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:40:58.42#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:40:58.42#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.17:40:58.42#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:58.42#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:40:58.54#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:40:58.54#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:40:58.54#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:40:58.54#ibcon#first serial, iclass 21, count 0 2006.229.17:40:58.54#ibcon#enter sib2, iclass 21, count 0 2006.229.17:40:58.54#ibcon#flushed, iclass 21, count 0 2006.229.17:40:58.54#ibcon#about to write, iclass 21, count 0 2006.229.17:40:58.54#ibcon#wrote, iclass 21, count 0 2006.229.17:40:58.54#ibcon#about to read 3, iclass 21, count 0 2006.229.17:40:58.56#ibcon#read 3, iclass 21, count 0 2006.229.17:40:58.56#ibcon#about to read 4, iclass 21, count 0 2006.229.17:40:58.56#ibcon#read 4, iclass 21, count 0 2006.229.17:40:58.56#ibcon#about to read 5, iclass 21, count 0 2006.229.17:40:58.56#ibcon#read 5, iclass 21, count 0 2006.229.17:40:58.56#ibcon#about to read 6, iclass 21, count 0 2006.229.17:40:58.56#ibcon#read 6, iclass 21, count 0 2006.229.17:40:58.56#ibcon#end of sib2, iclass 21, count 0 2006.229.17:40:58.56#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:40:58.56#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:40:58.56#ibcon#[25=USB\r\n] 2006.229.17:40:58.56#ibcon#*before write, iclass 21, count 0 2006.229.17:40:58.56#ibcon#enter sib2, iclass 21, count 0 2006.229.17:40:58.56#ibcon#flushed, iclass 21, count 0 2006.229.17:40:58.56#ibcon#about to write, iclass 21, count 0 2006.229.17:40:58.56#ibcon#wrote, iclass 21, count 0 2006.229.17:40:58.56#ibcon#about to read 3, iclass 21, count 0 2006.229.17:40:58.59#ibcon#read 3, iclass 21, count 0 2006.229.17:40:58.59#ibcon#about to read 4, iclass 21, count 0 2006.229.17:40:58.59#ibcon#read 4, iclass 21, count 0 2006.229.17:40:58.59#ibcon#about to read 5, iclass 21, count 0 2006.229.17:40:58.59#ibcon#read 5, iclass 21, count 0 2006.229.17:40:58.59#ibcon#about to read 6, iclass 21, count 0 2006.229.17:40:58.59#ibcon#read 6, iclass 21, count 0 2006.229.17:40:58.59#ibcon#end of sib2, iclass 21, count 0 2006.229.17:40:58.59#ibcon#*after write, iclass 21, count 0 2006.229.17:40:58.59#ibcon#*before return 0, iclass 21, count 0 2006.229.17:40:58.59#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:40:58.59#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:40:58.59#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:40:58.59#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:40:58.59$vck44/valo=8,884.99 2006.229.17:40:58.59#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.17:40:58.59#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.17:40:58.59#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:58.59#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:40:58.59#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:40:58.59#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:40:58.59#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:40:58.59#ibcon#first serial, iclass 23, count 0 2006.229.17:40:58.59#ibcon#enter sib2, iclass 23, count 0 2006.229.17:40:58.59#ibcon#flushed, iclass 23, count 0 2006.229.17:40:58.59#ibcon#about to write, iclass 23, count 0 2006.229.17:40:58.59#ibcon#wrote, iclass 23, count 0 2006.229.17:40:58.59#ibcon#about to read 3, iclass 23, count 0 2006.229.17:40:58.61#ibcon#read 3, iclass 23, count 0 2006.229.17:40:58.61#ibcon#about to read 4, iclass 23, count 0 2006.229.17:40:58.61#ibcon#read 4, iclass 23, count 0 2006.229.17:40:58.61#ibcon#about to read 5, iclass 23, count 0 2006.229.17:40:58.61#ibcon#read 5, iclass 23, count 0 2006.229.17:40:58.61#ibcon#about to read 6, iclass 23, count 0 2006.229.17:40:58.61#ibcon#read 6, iclass 23, count 0 2006.229.17:40:58.61#ibcon#end of sib2, iclass 23, count 0 2006.229.17:40:58.61#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:40:58.61#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:40:58.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:40:58.61#ibcon#*before write, iclass 23, count 0 2006.229.17:40:58.61#ibcon#enter sib2, iclass 23, count 0 2006.229.17:40:58.61#ibcon#flushed, iclass 23, count 0 2006.229.17:40:58.61#ibcon#about to write, iclass 23, count 0 2006.229.17:40:58.61#ibcon#wrote, iclass 23, count 0 2006.229.17:40:58.61#ibcon#about to read 3, iclass 23, count 0 2006.229.17:40:58.65#ibcon#read 3, iclass 23, count 0 2006.229.17:40:58.65#ibcon#about to read 4, iclass 23, count 0 2006.229.17:40:58.65#ibcon#read 4, iclass 23, count 0 2006.229.17:40:58.65#ibcon#about to read 5, iclass 23, count 0 2006.229.17:40:58.65#ibcon#read 5, iclass 23, count 0 2006.229.17:40:58.65#ibcon#about to read 6, iclass 23, count 0 2006.229.17:40:58.65#ibcon#read 6, iclass 23, count 0 2006.229.17:40:58.65#ibcon#end of sib2, iclass 23, count 0 2006.229.17:40:58.65#ibcon#*after write, iclass 23, count 0 2006.229.17:40:58.65#ibcon#*before return 0, iclass 23, count 0 2006.229.17:40:58.65#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:40:58.65#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:40:58.65#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:40:58.65#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:40:58.65$vck44/va=8,6 2006.229.17:40:58.65#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.17:40:58.65#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.17:40:58.65#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:58.65#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:40:58.71#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:40:58.71#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:40:58.71#ibcon#enter wrdev, iclass 25, count 2 2006.229.17:40:58.71#ibcon#first serial, iclass 25, count 2 2006.229.17:40:58.71#ibcon#enter sib2, iclass 25, count 2 2006.229.17:40:58.71#ibcon#flushed, iclass 25, count 2 2006.229.17:40:58.71#ibcon#about to write, iclass 25, count 2 2006.229.17:40:58.71#ibcon#wrote, iclass 25, count 2 2006.229.17:40:58.71#ibcon#about to read 3, iclass 25, count 2 2006.229.17:40:58.73#ibcon#read 3, iclass 25, count 2 2006.229.17:40:58.73#ibcon#about to read 4, iclass 25, count 2 2006.229.17:40:58.73#ibcon#read 4, iclass 25, count 2 2006.229.17:40:58.73#ibcon#about to read 5, iclass 25, count 2 2006.229.17:40:58.73#ibcon#read 5, iclass 25, count 2 2006.229.17:40:58.73#ibcon#about to read 6, iclass 25, count 2 2006.229.17:40:58.73#ibcon#read 6, iclass 25, count 2 2006.229.17:40:58.73#ibcon#end of sib2, iclass 25, count 2 2006.229.17:40:58.73#ibcon#*mode == 0, iclass 25, count 2 2006.229.17:40:58.73#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.17:40:58.73#ibcon#[25=AT08-06\r\n] 2006.229.17:40:58.73#ibcon#*before write, iclass 25, count 2 2006.229.17:40:58.73#ibcon#enter sib2, iclass 25, count 2 2006.229.17:40:58.73#ibcon#flushed, iclass 25, count 2 2006.229.17:40:58.73#ibcon#about to write, iclass 25, count 2 2006.229.17:40:58.73#ibcon#wrote, iclass 25, count 2 2006.229.17:40:58.73#ibcon#about to read 3, iclass 25, count 2 2006.229.17:40:58.76#ibcon#read 3, iclass 25, count 2 2006.229.17:40:58.76#ibcon#about to read 4, iclass 25, count 2 2006.229.17:40:58.76#ibcon#read 4, iclass 25, count 2 2006.229.17:40:58.76#ibcon#about to read 5, iclass 25, count 2 2006.229.17:40:58.76#ibcon#read 5, iclass 25, count 2 2006.229.17:40:58.76#ibcon#about to read 6, iclass 25, count 2 2006.229.17:40:58.76#ibcon#read 6, iclass 25, count 2 2006.229.17:40:58.76#ibcon#end of sib2, iclass 25, count 2 2006.229.17:40:58.76#ibcon#*after write, iclass 25, count 2 2006.229.17:40:58.76#ibcon#*before return 0, iclass 25, count 2 2006.229.17:40:58.76#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:40:58.76#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:40:58.76#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.17:40:58.76#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:58.76#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:40:58.88#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:40:58.88#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:40:58.88#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:40:58.88#ibcon#first serial, iclass 25, count 0 2006.229.17:40:58.88#ibcon#enter sib2, iclass 25, count 0 2006.229.17:40:58.88#ibcon#flushed, iclass 25, count 0 2006.229.17:40:58.88#ibcon#about to write, iclass 25, count 0 2006.229.17:40:58.88#ibcon#wrote, iclass 25, count 0 2006.229.17:40:58.88#ibcon#about to read 3, iclass 25, count 0 2006.229.17:40:58.90#ibcon#read 3, iclass 25, count 0 2006.229.17:40:58.90#ibcon#about to read 4, iclass 25, count 0 2006.229.17:40:58.90#ibcon#read 4, iclass 25, count 0 2006.229.17:40:58.90#ibcon#about to read 5, iclass 25, count 0 2006.229.17:40:58.90#ibcon#read 5, iclass 25, count 0 2006.229.17:40:58.90#ibcon#about to read 6, iclass 25, count 0 2006.229.17:40:58.90#ibcon#read 6, iclass 25, count 0 2006.229.17:40:58.90#ibcon#end of sib2, iclass 25, count 0 2006.229.17:40:58.90#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:40:58.90#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:40:58.90#ibcon#[25=USB\r\n] 2006.229.17:40:58.90#ibcon#*before write, iclass 25, count 0 2006.229.17:40:58.90#ibcon#enter sib2, iclass 25, count 0 2006.229.17:40:58.90#ibcon#flushed, iclass 25, count 0 2006.229.17:40:58.90#ibcon#about to write, iclass 25, count 0 2006.229.17:40:58.90#ibcon#wrote, iclass 25, count 0 2006.229.17:40:58.90#ibcon#about to read 3, iclass 25, count 0 2006.229.17:40:58.93#ibcon#read 3, iclass 25, count 0 2006.229.17:40:58.93#ibcon#about to read 4, iclass 25, count 0 2006.229.17:40:58.93#ibcon#read 4, iclass 25, count 0 2006.229.17:40:58.93#ibcon#about to read 5, iclass 25, count 0 2006.229.17:40:58.93#ibcon#read 5, iclass 25, count 0 2006.229.17:40:58.93#ibcon#about to read 6, iclass 25, count 0 2006.229.17:40:58.93#ibcon#read 6, iclass 25, count 0 2006.229.17:40:58.93#ibcon#end of sib2, iclass 25, count 0 2006.229.17:40:58.93#ibcon#*after write, iclass 25, count 0 2006.229.17:40:58.93#ibcon#*before return 0, iclass 25, count 0 2006.229.17:40:58.93#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:40:58.93#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:40:58.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:40:58.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:40:58.93$vck44/vblo=1,629.99 2006.229.17:40:58.93#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.17:40:58.93#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.17:40:58.93#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:58.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:40:58.93#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:40:58.93#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:40:58.93#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:40:58.93#ibcon#first serial, iclass 27, count 0 2006.229.17:40:58.93#ibcon#enter sib2, iclass 27, count 0 2006.229.17:40:58.93#ibcon#flushed, iclass 27, count 0 2006.229.17:40:58.93#ibcon#about to write, iclass 27, count 0 2006.229.17:40:58.93#ibcon#wrote, iclass 27, count 0 2006.229.17:40:58.93#ibcon#about to read 3, iclass 27, count 0 2006.229.17:40:58.95#ibcon#read 3, iclass 27, count 0 2006.229.17:40:58.95#ibcon#about to read 4, iclass 27, count 0 2006.229.17:40:58.95#ibcon#read 4, iclass 27, count 0 2006.229.17:40:58.95#ibcon#about to read 5, iclass 27, count 0 2006.229.17:40:58.95#ibcon#read 5, iclass 27, count 0 2006.229.17:40:58.95#ibcon#about to read 6, iclass 27, count 0 2006.229.17:40:58.95#ibcon#read 6, iclass 27, count 0 2006.229.17:40:58.95#ibcon#end of sib2, iclass 27, count 0 2006.229.17:40:58.95#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:40:58.95#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:40:58.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:40:58.95#ibcon#*before write, iclass 27, count 0 2006.229.17:40:58.95#ibcon#enter sib2, iclass 27, count 0 2006.229.17:40:58.95#ibcon#flushed, iclass 27, count 0 2006.229.17:40:58.95#ibcon#about to write, iclass 27, count 0 2006.229.17:40:58.95#ibcon#wrote, iclass 27, count 0 2006.229.17:40:58.95#ibcon#about to read 3, iclass 27, count 0 2006.229.17:40:58.99#ibcon#read 3, iclass 27, count 0 2006.229.17:40:58.99#ibcon#about to read 4, iclass 27, count 0 2006.229.17:40:58.99#ibcon#read 4, iclass 27, count 0 2006.229.17:40:58.99#ibcon#about to read 5, iclass 27, count 0 2006.229.17:40:58.99#ibcon#read 5, iclass 27, count 0 2006.229.17:40:58.99#ibcon#about to read 6, iclass 27, count 0 2006.229.17:40:58.99#ibcon#read 6, iclass 27, count 0 2006.229.17:40:58.99#ibcon#end of sib2, iclass 27, count 0 2006.229.17:40:58.99#ibcon#*after write, iclass 27, count 0 2006.229.17:40:58.99#ibcon#*before return 0, iclass 27, count 0 2006.229.17:40:58.99#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:40:58.99#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:40:58.99#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:40:58.99#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:40:58.99$vck44/vb=1,4 2006.229.17:40:58.99#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.17:40:58.99#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.17:40:58.99#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:58.99#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:40:58.99#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:40:58.99#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:40:58.99#ibcon#enter wrdev, iclass 29, count 2 2006.229.17:40:58.99#ibcon#first serial, iclass 29, count 2 2006.229.17:40:58.99#ibcon#enter sib2, iclass 29, count 2 2006.229.17:40:58.99#ibcon#flushed, iclass 29, count 2 2006.229.17:40:58.99#ibcon#about to write, iclass 29, count 2 2006.229.17:40:58.99#ibcon#wrote, iclass 29, count 2 2006.229.17:40:58.99#ibcon#about to read 3, iclass 29, count 2 2006.229.17:40:59.01#ibcon#read 3, iclass 29, count 2 2006.229.17:40:59.01#ibcon#about to read 4, iclass 29, count 2 2006.229.17:40:59.01#ibcon#read 4, iclass 29, count 2 2006.229.17:40:59.01#ibcon#about to read 5, iclass 29, count 2 2006.229.17:40:59.01#ibcon#read 5, iclass 29, count 2 2006.229.17:40:59.01#ibcon#about to read 6, iclass 29, count 2 2006.229.17:40:59.01#ibcon#read 6, iclass 29, count 2 2006.229.17:40:59.01#ibcon#end of sib2, iclass 29, count 2 2006.229.17:40:59.01#ibcon#*mode == 0, iclass 29, count 2 2006.229.17:40:59.01#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.17:40:59.01#ibcon#[27=AT01-04\r\n] 2006.229.17:40:59.01#ibcon#*before write, iclass 29, count 2 2006.229.17:40:59.01#ibcon#enter sib2, iclass 29, count 2 2006.229.17:40:59.01#ibcon#flushed, iclass 29, count 2 2006.229.17:40:59.01#ibcon#about to write, iclass 29, count 2 2006.229.17:40:59.01#ibcon#wrote, iclass 29, count 2 2006.229.17:40:59.01#ibcon#about to read 3, iclass 29, count 2 2006.229.17:40:59.04#ibcon#read 3, iclass 29, count 2 2006.229.17:40:59.04#ibcon#about to read 4, iclass 29, count 2 2006.229.17:40:59.04#ibcon#read 4, iclass 29, count 2 2006.229.17:40:59.04#ibcon#about to read 5, iclass 29, count 2 2006.229.17:40:59.04#ibcon#read 5, iclass 29, count 2 2006.229.17:40:59.04#ibcon#about to read 6, iclass 29, count 2 2006.229.17:40:59.04#ibcon#read 6, iclass 29, count 2 2006.229.17:40:59.04#ibcon#end of sib2, iclass 29, count 2 2006.229.17:40:59.04#ibcon#*after write, iclass 29, count 2 2006.229.17:40:59.04#ibcon#*before return 0, iclass 29, count 2 2006.229.17:40:59.04#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:40:59.04#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.17:40:59.04#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.17:40:59.04#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:59.04#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:40:59.16#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:40:59.16#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:40:59.16#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:40:59.16#ibcon#first serial, iclass 29, count 0 2006.229.17:40:59.16#ibcon#enter sib2, iclass 29, count 0 2006.229.17:40:59.16#ibcon#flushed, iclass 29, count 0 2006.229.17:40:59.16#ibcon#about to write, iclass 29, count 0 2006.229.17:40:59.16#ibcon#wrote, iclass 29, count 0 2006.229.17:40:59.16#ibcon#about to read 3, iclass 29, count 0 2006.229.17:40:59.18#ibcon#read 3, iclass 29, count 0 2006.229.17:40:59.18#ibcon#about to read 4, iclass 29, count 0 2006.229.17:40:59.18#ibcon#read 4, iclass 29, count 0 2006.229.17:40:59.18#ibcon#about to read 5, iclass 29, count 0 2006.229.17:40:59.18#ibcon#read 5, iclass 29, count 0 2006.229.17:40:59.18#ibcon#about to read 6, iclass 29, count 0 2006.229.17:40:59.18#ibcon#read 6, iclass 29, count 0 2006.229.17:40:59.18#ibcon#end of sib2, iclass 29, count 0 2006.229.17:40:59.18#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:40:59.18#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:40:59.18#ibcon#[27=USB\r\n] 2006.229.17:40:59.18#ibcon#*before write, iclass 29, count 0 2006.229.17:40:59.18#ibcon#enter sib2, iclass 29, count 0 2006.229.17:40:59.18#ibcon#flushed, iclass 29, count 0 2006.229.17:40:59.18#ibcon#about to write, iclass 29, count 0 2006.229.17:40:59.18#ibcon#wrote, iclass 29, count 0 2006.229.17:40:59.18#ibcon#about to read 3, iclass 29, count 0 2006.229.17:40:59.21#ibcon#read 3, iclass 29, count 0 2006.229.17:40:59.21#ibcon#about to read 4, iclass 29, count 0 2006.229.17:40:59.21#ibcon#read 4, iclass 29, count 0 2006.229.17:40:59.21#ibcon#about to read 5, iclass 29, count 0 2006.229.17:40:59.21#ibcon#read 5, iclass 29, count 0 2006.229.17:40:59.21#ibcon#about to read 6, iclass 29, count 0 2006.229.17:40:59.21#ibcon#read 6, iclass 29, count 0 2006.229.17:40:59.21#ibcon#end of sib2, iclass 29, count 0 2006.229.17:40:59.21#ibcon#*after write, iclass 29, count 0 2006.229.17:40:59.21#ibcon#*before return 0, iclass 29, count 0 2006.229.17:40:59.21#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:40:59.21#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.17:40:59.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:40:59.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:40:59.21$vck44/vblo=2,634.99 2006.229.17:40:59.21#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.17:40:59.21#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.17:40:59.21#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:59.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:59.21#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:59.21#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:59.21#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:40:59.21#ibcon#first serial, iclass 31, count 0 2006.229.17:40:59.21#ibcon#enter sib2, iclass 31, count 0 2006.229.17:40:59.21#ibcon#flushed, iclass 31, count 0 2006.229.17:40:59.21#ibcon#about to write, iclass 31, count 0 2006.229.17:40:59.21#ibcon#wrote, iclass 31, count 0 2006.229.17:40:59.21#ibcon#about to read 3, iclass 31, count 0 2006.229.17:40:59.23#ibcon#read 3, iclass 31, count 0 2006.229.17:40:59.23#ibcon#about to read 4, iclass 31, count 0 2006.229.17:40:59.23#ibcon#read 4, iclass 31, count 0 2006.229.17:40:59.23#ibcon#about to read 5, iclass 31, count 0 2006.229.17:40:59.23#ibcon#read 5, iclass 31, count 0 2006.229.17:40:59.23#ibcon#about to read 6, iclass 31, count 0 2006.229.17:40:59.23#ibcon#read 6, iclass 31, count 0 2006.229.17:40:59.23#ibcon#end of sib2, iclass 31, count 0 2006.229.17:40:59.23#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:40:59.23#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:40:59.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:40:59.23#ibcon#*before write, iclass 31, count 0 2006.229.17:40:59.23#ibcon#enter sib2, iclass 31, count 0 2006.229.17:40:59.23#ibcon#flushed, iclass 31, count 0 2006.229.17:40:59.23#ibcon#about to write, iclass 31, count 0 2006.229.17:40:59.23#ibcon#wrote, iclass 31, count 0 2006.229.17:40:59.23#ibcon#about to read 3, iclass 31, count 0 2006.229.17:40:59.27#ibcon#read 3, iclass 31, count 0 2006.229.17:40:59.27#ibcon#about to read 4, iclass 31, count 0 2006.229.17:40:59.27#ibcon#read 4, iclass 31, count 0 2006.229.17:40:59.27#ibcon#about to read 5, iclass 31, count 0 2006.229.17:40:59.27#ibcon#read 5, iclass 31, count 0 2006.229.17:40:59.27#ibcon#about to read 6, iclass 31, count 0 2006.229.17:40:59.27#ibcon#read 6, iclass 31, count 0 2006.229.17:40:59.27#ibcon#end of sib2, iclass 31, count 0 2006.229.17:40:59.27#ibcon#*after write, iclass 31, count 0 2006.229.17:40:59.27#ibcon#*before return 0, iclass 31, count 0 2006.229.17:40:59.27#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:59.27#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:40:59.27#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:40:59.27#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:40:59.27$vck44/vb=2,4 2006.229.17:40:59.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.17:40:59.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.17:40:59.27#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:59.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:40:59.31#abcon#<5=/07 1.3 3.3 26.891001001.6\r\n> 2006.229.17:40:59.33#abcon#{5=INTERFACE CLEAR} 2006.229.17:40:59.33#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:40:59.33#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:40:59.33#ibcon#enter wrdev, iclass 34, count 2 2006.229.17:40:59.33#ibcon#first serial, iclass 34, count 2 2006.229.17:40:59.33#ibcon#enter sib2, iclass 34, count 2 2006.229.17:40:59.33#ibcon#flushed, iclass 34, count 2 2006.229.17:40:59.33#ibcon#about to write, iclass 34, count 2 2006.229.17:40:59.33#ibcon#wrote, iclass 34, count 2 2006.229.17:40:59.33#ibcon#about to read 3, iclass 34, count 2 2006.229.17:40:59.35#ibcon#read 3, iclass 34, count 2 2006.229.17:40:59.35#ibcon#about to read 4, iclass 34, count 2 2006.229.17:40:59.35#ibcon#read 4, iclass 34, count 2 2006.229.17:40:59.35#ibcon#about to read 5, iclass 34, count 2 2006.229.17:40:59.35#ibcon#read 5, iclass 34, count 2 2006.229.17:40:59.35#ibcon#about to read 6, iclass 34, count 2 2006.229.17:40:59.35#ibcon#read 6, iclass 34, count 2 2006.229.17:40:59.35#ibcon#end of sib2, iclass 34, count 2 2006.229.17:40:59.35#ibcon#*mode == 0, iclass 34, count 2 2006.229.17:40:59.35#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.17:40:59.35#ibcon#[27=AT02-04\r\n] 2006.229.17:40:59.35#ibcon#*before write, iclass 34, count 2 2006.229.17:40:59.35#ibcon#enter sib2, iclass 34, count 2 2006.229.17:40:59.35#ibcon#flushed, iclass 34, count 2 2006.229.17:40:59.35#ibcon#about to write, iclass 34, count 2 2006.229.17:40:59.35#ibcon#wrote, iclass 34, count 2 2006.229.17:40:59.35#ibcon#about to read 3, iclass 34, count 2 2006.229.17:40:59.38#ibcon#read 3, iclass 34, count 2 2006.229.17:40:59.38#ibcon#about to read 4, iclass 34, count 2 2006.229.17:40:59.38#ibcon#read 4, iclass 34, count 2 2006.229.17:40:59.38#ibcon#about to read 5, iclass 34, count 2 2006.229.17:40:59.38#ibcon#read 5, iclass 34, count 2 2006.229.17:40:59.38#ibcon#about to read 6, iclass 34, count 2 2006.229.17:40:59.38#ibcon#read 6, iclass 34, count 2 2006.229.17:40:59.38#ibcon#end of sib2, iclass 34, count 2 2006.229.17:40:59.38#ibcon#*after write, iclass 34, count 2 2006.229.17:40:59.38#ibcon#*before return 0, iclass 34, count 2 2006.229.17:40:59.38#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:40:59.38#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.17:40:59.38#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.17:40:59.38#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:59.38#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:40:59.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:40:59.50#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:40:59.50#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:40:59.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:40:59.50#ibcon#first serial, iclass 34, count 0 2006.229.17:40:59.50#ibcon#enter sib2, iclass 34, count 0 2006.229.17:40:59.50#ibcon#flushed, iclass 34, count 0 2006.229.17:40:59.50#ibcon#about to write, iclass 34, count 0 2006.229.17:40:59.50#ibcon#wrote, iclass 34, count 0 2006.229.17:40:59.50#ibcon#about to read 3, iclass 34, count 0 2006.229.17:40:59.52#ibcon#read 3, iclass 34, count 0 2006.229.17:40:59.52#ibcon#about to read 4, iclass 34, count 0 2006.229.17:40:59.52#ibcon#read 4, iclass 34, count 0 2006.229.17:40:59.52#ibcon#about to read 5, iclass 34, count 0 2006.229.17:40:59.52#ibcon#read 5, iclass 34, count 0 2006.229.17:40:59.52#ibcon#about to read 6, iclass 34, count 0 2006.229.17:40:59.52#ibcon#read 6, iclass 34, count 0 2006.229.17:40:59.52#ibcon#end of sib2, iclass 34, count 0 2006.229.17:40:59.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:40:59.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:40:59.52#ibcon#[27=USB\r\n] 2006.229.17:40:59.52#ibcon#*before write, iclass 34, count 0 2006.229.17:40:59.52#ibcon#enter sib2, iclass 34, count 0 2006.229.17:40:59.52#ibcon#flushed, iclass 34, count 0 2006.229.17:40:59.52#ibcon#about to write, iclass 34, count 0 2006.229.17:40:59.52#ibcon#wrote, iclass 34, count 0 2006.229.17:40:59.52#ibcon#about to read 3, iclass 34, count 0 2006.229.17:40:59.55#ibcon#read 3, iclass 34, count 0 2006.229.17:40:59.55#ibcon#about to read 4, iclass 34, count 0 2006.229.17:40:59.55#ibcon#read 4, iclass 34, count 0 2006.229.17:40:59.55#ibcon#about to read 5, iclass 34, count 0 2006.229.17:40:59.55#ibcon#read 5, iclass 34, count 0 2006.229.17:40:59.55#ibcon#about to read 6, iclass 34, count 0 2006.229.17:40:59.55#ibcon#read 6, iclass 34, count 0 2006.229.17:40:59.55#ibcon#end of sib2, iclass 34, count 0 2006.229.17:40:59.55#ibcon#*after write, iclass 34, count 0 2006.229.17:40:59.55#ibcon#*before return 0, iclass 34, count 0 2006.229.17:40:59.55#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:40:59.55#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.17:40:59.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:40:59.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:40:59.55$vck44/vblo=3,649.99 2006.229.17:40:59.55#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.17:40:59.55#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.17:40:59.55#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:59.55#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:59.55#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:59.55#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:59.55#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:40:59.55#ibcon#first serial, iclass 39, count 0 2006.229.17:40:59.55#ibcon#enter sib2, iclass 39, count 0 2006.229.17:40:59.55#ibcon#flushed, iclass 39, count 0 2006.229.17:40:59.55#ibcon#about to write, iclass 39, count 0 2006.229.17:40:59.55#ibcon#wrote, iclass 39, count 0 2006.229.17:40:59.55#ibcon#about to read 3, iclass 39, count 0 2006.229.17:40:59.57#ibcon#read 3, iclass 39, count 0 2006.229.17:40:59.57#ibcon#about to read 4, iclass 39, count 0 2006.229.17:40:59.57#ibcon#read 4, iclass 39, count 0 2006.229.17:40:59.57#ibcon#about to read 5, iclass 39, count 0 2006.229.17:40:59.57#ibcon#read 5, iclass 39, count 0 2006.229.17:40:59.57#ibcon#about to read 6, iclass 39, count 0 2006.229.17:40:59.57#ibcon#read 6, iclass 39, count 0 2006.229.17:40:59.57#ibcon#end of sib2, iclass 39, count 0 2006.229.17:40:59.57#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:40:59.57#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:40:59.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:40:59.57#ibcon#*before write, iclass 39, count 0 2006.229.17:40:59.57#ibcon#enter sib2, iclass 39, count 0 2006.229.17:40:59.57#ibcon#flushed, iclass 39, count 0 2006.229.17:40:59.57#ibcon#about to write, iclass 39, count 0 2006.229.17:40:59.57#ibcon#wrote, iclass 39, count 0 2006.229.17:40:59.57#ibcon#about to read 3, iclass 39, count 0 2006.229.17:40:59.61#ibcon#read 3, iclass 39, count 0 2006.229.17:40:59.61#ibcon#about to read 4, iclass 39, count 0 2006.229.17:40:59.61#ibcon#read 4, iclass 39, count 0 2006.229.17:40:59.61#ibcon#about to read 5, iclass 39, count 0 2006.229.17:40:59.61#ibcon#read 5, iclass 39, count 0 2006.229.17:40:59.61#ibcon#about to read 6, iclass 39, count 0 2006.229.17:40:59.61#ibcon#read 6, iclass 39, count 0 2006.229.17:40:59.61#ibcon#end of sib2, iclass 39, count 0 2006.229.17:40:59.61#ibcon#*after write, iclass 39, count 0 2006.229.17:40:59.61#ibcon#*before return 0, iclass 39, count 0 2006.229.17:40:59.61#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:59.61#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.17:40:59.61#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:40:59.61#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:40:59.61$vck44/vb=3,4 2006.229.17:40:59.61#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.17:40:59.61#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.17:40:59.61#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:59.61#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:59.67#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:59.67#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:59.67#ibcon#enter wrdev, iclass 3, count 2 2006.229.17:40:59.67#ibcon#first serial, iclass 3, count 2 2006.229.17:40:59.67#ibcon#enter sib2, iclass 3, count 2 2006.229.17:40:59.67#ibcon#flushed, iclass 3, count 2 2006.229.17:40:59.67#ibcon#about to write, iclass 3, count 2 2006.229.17:40:59.67#ibcon#wrote, iclass 3, count 2 2006.229.17:40:59.67#ibcon#about to read 3, iclass 3, count 2 2006.229.17:40:59.69#ibcon#read 3, iclass 3, count 2 2006.229.17:40:59.69#ibcon#about to read 4, iclass 3, count 2 2006.229.17:40:59.69#ibcon#read 4, iclass 3, count 2 2006.229.17:40:59.69#ibcon#about to read 5, iclass 3, count 2 2006.229.17:40:59.69#ibcon#read 5, iclass 3, count 2 2006.229.17:40:59.69#ibcon#about to read 6, iclass 3, count 2 2006.229.17:40:59.69#ibcon#read 6, iclass 3, count 2 2006.229.17:40:59.69#ibcon#end of sib2, iclass 3, count 2 2006.229.17:40:59.69#ibcon#*mode == 0, iclass 3, count 2 2006.229.17:40:59.69#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.17:40:59.69#ibcon#[27=AT03-04\r\n] 2006.229.17:40:59.69#ibcon#*before write, iclass 3, count 2 2006.229.17:40:59.69#ibcon#enter sib2, iclass 3, count 2 2006.229.17:40:59.69#ibcon#flushed, iclass 3, count 2 2006.229.17:40:59.69#ibcon#about to write, iclass 3, count 2 2006.229.17:40:59.69#ibcon#wrote, iclass 3, count 2 2006.229.17:40:59.69#ibcon#about to read 3, iclass 3, count 2 2006.229.17:40:59.72#ibcon#read 3, iclass 3, count 2 2006.229.17:40:59.72#ibcon#about to read 4, iclass 3, count 2 2006.229.17:40:59.72#ibcon#read 4, iclass 3, count 2 2006.229.17:40:59.72#ibcon#about to read 5, iclass 3, count 2 2006.229.17:40:59.72#ibcon#read 5, iclass 3, count 2 2006.229.17:40:59.72#ibcon#about to read 6, iclass 3, count 2 2006.229.17:40:59.72#ibcon#read 6, iclass 3, count 2 2006.229.17:40:59.72#ibcon#end of sib2, iclass 3, count 2 2006.229.17:40:59.72#ibcon#*after write, iclass 3, count 2 2006.229.17:40:59.72#ibcon#*before return 0, iclass 3, count 2 2006.229.17:40:59.72#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:59.72#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.17:40:59.72#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.17:40:59.72#ibcon#ireg 7 cls_cnt 0 2006.229.17:40:59.72#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:59.84#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:59.84#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:59.84#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:40:59.84#ibcon#first serial, iclass 3, count 0 2006.229.17:40:59.84#ibcon#enter sib2, iclass 3, count 0 2006.229.17:40:59.84#ibcon#flushed, iclass 3, count 0 2006.229.17:40:59.84#ibcon#about to write, iclass 3, count 0 2006.229.17:40:59.84#ibcon#wrote, iclass 3, count 0 2006.229.17:40:59.84#ibcon#about to read 3, iclass 3, count 0 2006.229.17:40:59.86#ibcon#read 3, iclass 3, count 0 2006.229.17:40:59.86#ibcon#about to read 4, iclass 3, count 0 2006.229.17:40:59.86#ibcon#read 4, iclass 3, count 0 2006.229.17:40:59.86#ibcon#about to read 5, iclass 3, count 0 2006.229.17:40:59.86#ibcon#read 5, iclass 3, count 0 2006.229.17:40:59.86#ibcon#about to read 6, iclass 3, count 0 2006.229.17:40:59.86#ibcon#read 6, iclass 3, count 0 2006.229.17:40:59.86#ibcon#end of sib2, iclass 3, count 0 2006.229.17:40:59.86#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:40:59.86#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:40:59.86#ibcon#[27=USB\r\n] 2006.229.17:40:59.86#ibcon#*before write, iclass 3, count 0 2006.229.17:40:59.86#ibcon#enter sib2, iclass 3, count 0 2006.229.17:40:59.86#ibcon#flushed, iclass 3, count 0 2006.229.17:40:59.86#ibcon#about to write, iclass 3, count 0 2006.229.17:40:59.86#ibcon#wrote, iclass 3, count 0 2006.229.17:40:59.86#ibcon#about to read 3, iclass 3, count 0 2006.229.17:40:59.89#ibcon#read 3, iclass 3, count 0 2006.229.17:40:59.89#ibcon#about to read 4, iclass 3, count 0 2006.229.17:40:59.89#ibcon#read 4, iclass 3, count 0 2006.229.17:40:59.89#ibcon#about to read 5, iclass 3, count 0 2006.229.17:40:59.89#ibcon#read 5, iclass 3, count 0 2006.229.17:40:59.89#ibcon#about to read 6, iclass 3, count 0 2006.229.17:40:59.89#ibcon#read 6, iclass 3, count 0 2006.229.17:40:59.89#ibcon#end of sib2, iclass 3, count 0 2006.229.17:40:59.89#ibcon#*after write, iclass 3, count 0 2006.229.17:40:59.89#ibcon#*before return 0, iclass 3, count 0 2006.229.17:40:59.89#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:59.89#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.17:40:59.89#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:40:59.89#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:40:59.89$vck44/vblo=4,679.99 2006.229.17:40:59.89#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.17:40:59.89#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.17:40:59.89#ibcon#ireg 17 cls_cnt 0 2006.229.17:40:59.89#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:59.89#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:59.89#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:59.89#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:40:59.89#ibcon#first serial, iclass 5, count 0 2006.229.17:40:59.89#ibcon#enter sib2, iclass 5, count 0 2006.229.17:40:59.89#ibcon#flushed, iclass 5, count 0 2006.229.17:40:59.89#ibcon#about to write, iclass 5, count 0 2006.229.17:40:59.89#ibcon#wrote, iclass 5, count 0 2006.229.17:40:59.89#ibcon#about to read 3, iclass 5, count 0 2006.229.17:40:59.91#ibcon#read 3, iclass 5, count 0 2006.229.17:40:59.91#ibcon#about to read 4, iclass 5, count 0 2006.229.17:40:59.91#ibcon#read 4, iclass 5, count 0 2006.229.17:40:59.91#ibcon#about to read 5, iclass 5, count 0 2006.229.17:40:59.91#ibcon#read 5, iclass 5, count 0 2006.229.17:40:59.91#ibcon#about to read 6, iclass 5, count 0 2006.229.17:40:59.91#ibcon#read 6, iclass 5, count 0 2006.229.17:40:59.91#ibcon#end of sib2, iclass 5, count 0 2006.229.17:40:59.91#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:40:59.91#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:40:59.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:40:59.91#ibcon#*before write, iclass 5, count 0 2006.229.17:40:59.91#ibcon#enter sib2, iclass 5, count 0 2006.229.17:40:59.91#ibcon#flushed, iclass 5, count 0 2006.229.17:40:59.91#ibcon#about to write, iclass 5, count 0 2006.229.17:40:59.91#ibcon#wrote, iclass 5, count 0 2006.229.17:40:59.91#ibcon#about to read 3, iclass 5, count 0 2006.229.17:40:59.95#ibcon#read 3, iclass 5, count 0 2006.229.17:40:59.95#ibcon#about to read 4, iclass 5, count 0 2006.229.17:40:59.95#ibcon#read 4, iclass 5, count 0 2006.229.17:40:59.95#ibcon#about to read 5, iclass 5, count 0 2006.229.17:40:59.95#ibcon#read 5, iclass 5, count 0 2006.229.17:40:59.95#ibcon#about to read 6, iclass 5, count 0 2006.229.17:40:59.95#ibcon#read 6, iclass 5, count 0 2006.229.17:40:59.95#ibcon#end of sib2, iclass 5, count 0 2006.229.17:40:59.95#ibcon#*after write, iclass 5, count 0 2006.229.17:40:59.95#ibcon#*before return 0, iclass 5, count 0 2006.229.17:40:59.95#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:59.95#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.17:40:59.95#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:40:59.95#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:40:59.95$vck44/vb=4,4 2006.229.17:40:59.95#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.17:40:59.95#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.17:40:59.95#ibcon#ireg 11 cls_cnt 2 2006.229.17:40:59.95#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:41:00.01#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:41:00.01#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:41:00.01#ibcon#enter wrdev, iclass 7, count 2 2006.229.17:41:00.01#ibcon#first serial, iclass 7, count 2 2006.229.17:41:00.01#ibcon#enter sib2, iclass 7, count 2 2006.229.17:41:00.01#ibcon#flushed, iclass 7, count 2 2006.229.17:41:00.01#ibcon#about to write, iclass 7, count 2 2006.229.17:41:00.01#ibcon#wrote, iclass 7, count 2 2006.229.17:41:00.01#ibcon#about to read 3, iclass 7, count 2 2006.229.17:41:00.03#ibcon#read 3, iclass 7, count 2 2006.229.17:41:00.03#ibcon#about to read 4, iclass 7, count 2 2006.229.17:41:00.03#ibcon#read 4, iclass 7, count 2 2006.229.17:41:00.03#ibcon#about to read 5, iclass 7, count 2 2006.229.17:41:00.03#ibcon#read 5, iclass 7, count 2 2006.229.17:41:00.03#ibcon#about to read 6, iclass 7, count 2 2006.229.17:41:00.03#ibcon#read 6, iclass 7, count 2 2006.229.17:41:00.03#ibcon#end of sib2, iclass 7, count 2 2006.229.17:41:00.03#ibcon#*mode == 0, iclass 7, count 2 2006.229.17:41:00.03#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.17:41:00.03#ibcon#[27=AT04-04\r\n] 2006.229.17:41:00.03#ibcon#*before write, iclass 7, count 2 2006.229.17:41:00.03#ibcon#enter sib2, iclass 7, count 2 2006.229.17:41:00.03#ibcon#flushed, iclass 7, count 2 2006.229.17:41:00.03#ibcon#about to write, iclass 7, count 2 2006.229.17:41:00.03#ibcon#wrote, iclass 7, count 2 2006.229.17:41:00.03#ibcon#about to read 3, iclass 7, count 2 2006.229.17:41:00.06#ibcon#read 3, iclass 7, count 2 2006.229.17:41:00.06#ibcon#about to read 4, iclass 7, count 2 2006.229.17:41:00.06#ibcon#read 4, iclass 7, count 2 2006.229.17:41:00.06#ibcon#about to read 5, iclass 7, count 2 2006.229.17:41:00.06#ibcon#read 5, iclass 7, count 2 2006.229.17:41:00.06#ibcon#about to read 6, iclass 7, count 2 2006.229.17:41:00.06#ibcon#read 6, iclass 7, count 2 2006.229.17:41:00.06#ibcon#end of sib2, iclass 7, count 2 2006.229.17:41:00.06#ibcon#*after write, iclass 7, count 2 2006.229.17:41:00.06#ibcon#*before return 0, iclass 7, count 2 2006.229.17:41:00.06#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:41:00.06#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.17:41:00.06#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.17:41:00.06#ibcon#ireg 7 cls_cnt 0 2006.229.17:41:00.06#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:41:00.18#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:41:00.18#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:41:00.18#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:41:00.18#ibcon#first serial, iclass 7, count 0 2006.229.17:41:00.18#ibcon#enter sib2, iclass 7, count 0 2006.229.17:41:00.18#ibcon#flushed, iclass 7, count 0 2006.229.17:41:00.18#ibcon#about to write, iclass 7, count 0 2006.229.17:41:00.18#ibcon#wrote, iclass 7, count 0 2006.229.17:41:00.18#ibcon#about to read 3, iclass 7, count 0 2006.229.17:41:00.20#ibcon#read 3, iclass 7, count 0 2006.229.17:41:00.20#ibcon#about to read 4, iclass 7, count 0 2006.229.17:41:00.20#ibcon#read 4, iclass 7, count 0 2006.229.17:41:00.20#ibcon#about to read 5, iclass 7, count 0 2006.229.17:41:00.20#ibcon#read 5, iclass 7, count 0 2006.229.17:41:00.20#ibcon#about to read 6, iclass 7, count 0 2006.229.17:41:00.20#ibcon#read 6, iclass 7, count 0 2006.229.17:41:00.20#ibcon#end of sib2, iclass 7, count 0 2006.229.17:41:00.20#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:41:00.20#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:41:00.20#ibcon#[27=USB\r\n] 2006.229.17:41:00.20#ibcon#*before write, iclass 7, count 0 2006.229.17:41:00.20#ibcon#enter sib2, iclass 7, count 0 2006.229.17:41:00.20#ibcon#flushed, iclass 7, count 0 2006.229.17:41:00.20#ibcon#about to write, iclass 7, count 0 2006.229.17:41:00.20#ibcon#wrote, iclass 7, count 0 2006.229.17:41:00.20#ibcon#about to read 3, iclass 7, count 0 2006.229.17:41:00.23#ibcon#read 3, iclass 7, count 0 2006.229.17:41:00.23#ibcon#about to read 4, iclass 7, count 0 2006.229.17:41:00.23#ibcon#read 4, iclass 7, count 0 2006.229.17:41:00.23#ibcon#about to read 5, iclass 7, count 0 2006.229.17:41:00.23#ibcon#read 5, iclass 7, count 0 2006.229.17:41:00.23#ibcon#about to read 6, iclass 7, count 0 2006.229.17:41:00.23#ibcon#read 6, iclass 7, count 0 2006.229.17:41:00.23#ibcon#end of sib2, iclass 7, count 0 2006.229.17:41:00.23#ibcon#*after write, iclass 7, count 0 2006.229.17:41:00.23#ibcon#*before return 0, iclass 7, count 0 2006.229.17:41:00.23#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:41:00.23#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.17:41:00.23#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:41:00.23#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:41:00.23$vck44/vblo=5,709.99 2006.229.17:41:00.23#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.17:41:00.23#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.17:41:00.23#ibcon#ireg 17 cls_cnt 0 2006.229.17:41:00.23#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:41:00.23#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:41:00.23#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:41:00.23#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:41:00.23#ibcon#first serial, iclass 11, count 0 2006.229.17:41:00.23#ibcon#enter sib2, iclass 11, count 0 2006.229.17:41:00.23#ibcon#flushed, iclass 11, count 0 2006.229.17:41:00.23#ibcon#about to write, iclass 11, count 0 2006.229.17:41:00.23#ibcon#wrote, iclass 11, count 0 2006.229.17:41:00.23#ibcon#about to read 3, iclass 11, count 0 2006.229.17:41:00.25#ibcon#read 3, iclass 11, count 0 2006.229.17:41:00.25#ibcon#about to read 4, iclass 11, count 0 2006.229.17:41:00.25#ibcon#read 4, iclass 11, count 0 2006.229.17:41:00.25#ibcon#about to read 5, iclass 11, count 0 2006.229.17:41:00.25#ibcon#read 5, iclass 11, count 0 2006.229.17:41:00.25#ibcon#about to read 6, iclass 11, count 0 2006.229.17:41:00.25#ibcon#read 6, iclass 11, count 0 2006.229.17:41:00.25#ibcon#end of sib2, iclass 11, count 0 2006.229.17:41:00.25#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:41:00.25#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:41:00.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:41:00.25#ibcon#*before write, iclass 11, count 0 2006.229.17:41:00.25#ibcon#enter sib2, iclass 11, count 0 2006.229.17:41:00.25#ibcon#flushed, iclass 11, count 0 2006.229.17:41:00.25#ibcon#about to write, iclass 11, count 0 2006.229.17:41:00.25#ibcon#wrote, iclass 11, count 0 2006.229.17:41:00.25#ibcon#about to read 3, iclass 11, count 0 2006.229.17:41:00.29#ibcon#read 3, iclass 11, count 0 2006.229.17:41:00.29#ibcon#about to read 4, iclass 11, count 0 2006.229.17:41:00.29#ibcon#read 4, iclass 11, count 0 2006.229.17:41:00.29#ibcon#about to read 5, iclass 11, count 0 2006.229.17:41:00.29#ibcon#read 5, iclass 11, count 0 2006.229.17:41:00.29#ibcon#about to read 6, iclass 11, count 0 2006.229.17:41:00.29#ibcon#read 6, iclass 11, count 0 2006.229.17:41:00.29#ibcon#end of sib2, iclass 11, count 0 2006.229.17:41:00.29#ibcon#*after write, iclass 11, count 0 2006.229.17:41:00.29#ibcon#*before return 0, iclass 11, count 0 2006.229.17:41:00.29#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:41:00.29#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.17:41:00.29#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:41:00.29#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:41:00.29$vck44/vb=5,4 2006.229.17:41:00.29#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.17:41:00.29#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.17:41:00.29#ibcon#ireg 11 cls_cnt 2 2006.229.17:41:00.29#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:41:00.35#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:41:00.35#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:41:00.35#ibcon#enter wrdev, iclass 13, count 2 2006.229.17:41:00.35#ibcon#first serial, iclass 13, count 2 2006.229.17:41:00.35#ibcon#enter sib2, iclass 13, count 2 2006.229.17:41:00.35#ibcon#flushed, iclass 13, count 2 2006.229.17:41:00.35#ibcon#about to write, iclass 13, count 2 2006.229.17:41:00.35#ibcon#wrote, iclass 13, count 2 2006.229.17:41:00.35#ibcon#about to read 3, iclass 13, count 2 2006.229.17:41:00.37#ibcon#read 3, iclass 13, count 2 2006.229.17:41:00.37#ibcon#about to read 4, iclass 13, count 2 2006.229.17:41:00.37#ibcon#read 4, iclass 13, count 2 2006.229.17:41:00.37#ibcon#about to read 5, iclass 13, count 2 2006.229.17:41:00.37#ibcon#read 5, iclass 13, count 2 2006.229.17:41:00.37#ibcon#about to read 6, iclass 13, count 2 2006.229.17:41:00.37#ibcon#read 6, iclass 13, count 2 2006.229.17:41:00.37#ibcon#end of sib2, iclass 13, count 2 2006.229.17:41:00.37#ibcon#*mode == 0, iclass 13, count 2 2006.229.17:41:00.37#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.17:41:00.37#ibcon#[27=AT05-04\r\n] 2006.229.17:41:00.37#ibcon#*before write, iclass 13, count 2 2006.229.17:41:00.37#ibcon#enter sib2, iclass 13, count 2 2006.229.17:41:00.37#ibcon#flushed, iclass 13, count 2 2006.229.17:41:00.37#ibcon#about to write, iclass 13, count 2 2006.229.17:41:00.37#ibcon#wrote, iclass 13, count 2 2006.229.17:41:00.37#ibcon#about to read 3, iclass 13, count 2 2006.229.17:41:00.40#ibcon#read 3, iclass 13, count 2 2006.229.17:41:00.40#ibcon#about to read 4, iclass 13, count 2 2006.229.17:41:00.40#ibcon#read 4, iclass 13, count 2 2006.229.17:41:00.40#ibcon#about to read 5, iclass 13, count 2 2006.229.17:41:00.40#ibcon#read 5, iclass 13, count 2 2006.229.17:41:00.40#ibcon#about to read 6, iclass 13, count 2 2006.229.17:41:00.40#ibcon#read 6, iclass 13, count 2 2006.229.17:41:00.40#ibcon#end of sib2, iclass 13, count 2 2006.229.17:41:00.40#ibcon#*after write, iclass 13, count 2 2006.229.17:41:00.40#ibcon#*before return 0, iclass 13, count 2 2006.229.17:41:00.40#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:41:00.40#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.17:41:00.40#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.17:41:00.40#ibcon#ireg 7 cls_cnt 0 2006.229.17:41:00.40#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:41:00.52#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:41:00.52#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:41:00.52#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:41:00.52#ibcon#first serial, iclass 13, count 0 2006.229.17:41:00.52#ibcon#enter sib2, iclass 13, count 0 2006.229.17:41:00.52#ibcon#flushed, iclass 13, count 0 2006.229.17:41:00.52#ibcon#about to write, iclass 13, count 0 2006.229.17:41:00.52#ibcon#wrote, iclass 13, count 0 2006.229.17:41:00.52#ibcon#about to read 3, iclass 13, count 0 2006.229.17:41:00.54#ibcon#read 3, iclass 13, count 0 2006.229.17:41:00.54#ibcon#about to read 4, iclass 13, count 0 2006.229.17:41:00.54#ibcon#read 4, iclass 13, count 0 2006.229.17:41:00.54#ibcon#about to read 5, iclass 13, count 0 2006.229.17:41:00.54#ibcon#read 5, iclass 13, count 0 2006.229.17:41:00.54#ibcon#about to read 6, iclass 13, count 0 2006.229.17:41:00.54#ibcon#read 6, iclass 13, count 0 2006.229.17:41:00.54#ibcon#end of sib2, iclass 13, count 0 2006.229.17:41:00.54#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:41:00.54#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:41:00.54#ibcon#[27=USB\r\n] 2006.229.17:41:00.54#ibcon#*before write, iclass 13, count 0 2006.229.17:41:00.54#ibcon#enter sib2, iclass 13, count 0 2006.229.17:41:00.54#ibcon#flushed, iclass 13, count 0 2006.229.17:41:00.54#ibcon#about to write, iclass 13, count 0 2006.229.17:41:00.54#ibcon#wrote, iclass 13, count 0 2006.229.17:41:00.54#ibcon#about to read 3, iclass 13, count 0 2006.229.17:41:00.57#ibcon#read 3, iclass 13, count 0 2006.229.17:41:00.57#ibcon#about to read 4, iclass 13, count 0 2006.229.17:41:00.57#ibcon#read 4, iclass 13, count 0 2006.229.17:41:00.57#ibcon#about to read 5, iclass 13, count 0 2006.229.17:41:00.57#ibcon#read 5, iclass 13, count 0 2006.229.17:41:00.57#ibcon#about to read 6, iclass 13, count 0 2006.229.17:41:00.57#ibcon#read 6, iclass 13, count 0 2006.229.17:41:00.57#ibcon#end of sib2, iclass 13, count 0 2006.229.17:41:00.57#ibcon#*after write, iclass 13, count 0 2006.229.17:41:00.57#ibcon#*before return 0, iclass 13, count 0 2006.229.17:41:00.57#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:41:00.57#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.17:41:00.57#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:41:00.57#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:41:00.57$vck44/vblo=6,719.99 2006.229.17:41:00.57#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.17:41:00.57#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.17:41:00.57#ibcon#ireg 17 cls_cnt 0 2006.229.17:41:00.57#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:41:00.57#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:41:00.57#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:41:00.57#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:41:00.57#ibcon#first serial, iclass 15, count 0 2006.229.17:41:00.57#ibcon#enter sib2, iclass 15, count 0 2006.229.17:41:00.57#ibcon#flushed, iclass 15, count 0 2006.229.17:41:00.57#ibcon#about to write, iclass 15, count 0 2006.229.17:41:00.57#ibcon#wrote, iclass 15, count 0 2006.229.17:41:00.57#ibcon#about to read 3, iclass 15, count 0 2006.229.17:41:00.59#ibcon#read 3, iclass 15, count 0 2006.229.17:41:00.59#ibcon#about to read 4, iclass 15, count 0 2006.229.17:41:00.59#ibcon#read 4, iclass 15, count 0 2006.229.17:41:00.59#ibcon#about to read 5, iclass 15, count 0 2006.229.17:41:00.59#ibcon#read 5, iclass 15, count 0 2006.229.17:41:00.59#ibcon#about to read 6, iclass 15, count 0 2006.229.17:41:00.59#ibcon#read 6, iclass 15, count 0 2006.229.17:41:00.59#ibcon#end of sib2, iclass 15, count 0 2006.229.17:41:00.59#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:41:00.59#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:41:00.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:41:00.59#ibcon#*before write, iclass 15, count 0 2006.229.17:41:00.59#ibcon#enter sib2, iclass 15, count 0 2006.229.17:41:00.59#ibcon#flushed, iclass 15, count 0 2006.229.17:41:00.59#ibcon#about to write, iclass 15, count 0 2006.229.17:41:00.59#ibcon#wrote, iclass 15, count 0 2006.229.17:41:00.59#ibcon#about to read 3, iclass 15, count 0 2006.229.17:41:00.63#ibcon#read 3, iclass 15, count 0 2006.229.17:41:00.63#ibcon#about to read 4, iclass 15, count 0 2006.229.17:41:00.63#ibcon#read 4, iclass 15, count 0 2006.229.17:41:00.63#ibcon#about to read 5, iclass 15, count 0 2006.229.17:41:00.63#ibcon#read 5, iclass 15, count 0 2006.229.17:41:00.63#ibcon#about to read 6, iclass 15, count 0 2006.229.17:41:00.63#ibcon#read 6, iclass 15, count 0 2006.229.17:41:00.63#ibcon#end of sib2, iclass 15, count 0 2006.229.17:41:00.63#ibcon#*after write, iclass 15, count 0 2006.229.17:41:00.63#ibcon#*before return 0, iclass 15, count 0 2006.229.17:41:00.63#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:41:00.63#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.17:41:00.63#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:41:00.63#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:41:00.63$vck44/vb=6,4 2006.229.17:41:00.63#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.17:41:00.63#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.17:41:00.63#ibcon#ireg 11 cls_cnt 2 2006.229.17:41:00.63#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:41:00.69#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:41:00.69#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:41:00.69#ibcon#enter wrdev, iclass 17, count 2 2006.229.17:41:00.69#ibcon#first serial, iclass 17, count 2 2006.229.17:41:00.69#ibcon#enter sib2, iclass 17, count 2 2006.229.17:41:00.69#ibcon#flushed, iclass 17, count 2 2006.229.17:41:00.69#ibcon#about to write, iclass 17, count 2 2006.229.17:41:00.69#ibcon#wrote, iclass 17, count 2 2006.229.17:41:00.69#ibcon#about to read 3, iclass 17, count 2 2006.229.17:41:00.71#ibcon#read 3, iclass 17, count 2 2006.229.17:41:00.71#ibcon#about to read 4, iclass 17, count 2 2006.229.17:41:00.71#ibcon#read 4, iclass 17, count 2 2006.229.17:41:00.71#ibcon#about to read 5, iclass 17, count 2 2006.229.17:41:00.71#ibcon#read 5, iclass 17, count 2 2006.229.17:41:00.71#ibcon#about to read 6, iclass 17, count 2 2006.229.17:41:00.71#ibcon#read 6, iclass 17, count 2 2006.229.17:41:00.71#ibcon#end of sib2, iclass 17, count 2 2006.229.17:41:00.71#ibcon#*mode == 0, iclass 17, count 2 2006.229.17:41:00.71#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.17:41:00.71#ibcon#[27=AT06-04\r\n] 2006.229.17:41:00.71#ibcon#*before write, iclass 17, count 2 2006.229.17:41:00.71#ibcon#enter sib2, iclass 17, count 2 2006.229.17:41:00.71#ibcon#flushed, iclass 17, count 2 2006.229.17:41:00.71#ibcon#about to write, iclass 17, count 2 2006.229.17:41:00.71#ibcon#wrote, iclass 17, count 2 2006.229.17:41:00.71#ibcon#about to read 3, iclass 17, count 2 2006.229.17:41:00.74#ibcon#read 3, iclass 17, count 2 2006.229.17:41:00.74#ibcon#about to read 4, iclass 17, count 2 2006.229.17:41:00.74#ibcon#read 4, iclass 17, count 2 2006.229.17:41:00.74#ibcon#about to read 5, iclass 17, count 2 2006.229.17:41:00.74#ibcon#read 5, iclass 17, count 2 2006.229.17:41:00.74#ibcon#about to read 6, iclass 17, count 2 2006.229.17:41:00.74#ibcon#read 6, iclass 17, count 2 2006.229.17:41:00.74#ibcon#end of sib2, iclass 17, count 2 2006.229.17:41:00.74#ibcon#*after write, iclass 17, count 2 2006.229.17:41:00.74#ibcon#*before return 0, iclass 17, count 2 2006.229.17:41:00.74#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:41:00.74#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.17:41:00.74#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.17:41:00.74#ibcon#ireg 7 cls_cnt 0 2006.229.17:41:00.74#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:41:00.86#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:41:00.86#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:41:00.86#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:41:00.86#ibcon#first serial, iclass 17, count 0 2006.229.17:41:00.86#ibcon#enter sib2, iclass 17, count 0 2006.229.17:41:00.86#ibcon#flushed, iclass 17, count 0 2006.229.17:41:00.86#ibcon#about to write, iclass 17, count 0 2006.229.17:41:00.86#ibcon#wrote, iclass 17, count 0 2006.229.17:41:00.86#ibcon#about to read 3, iclass 17, count 0 2006.229.17:41:00.88#ibcon#read 3, iclass 17, count 0 2006.229.17:41:00.88#ibcon#about to read 4, iclass 17, count 0 2006.229.17:41:00.88#ibcon#read 4, iclass 17, count 0 2006.229.17:41:00.88#ibcon#about to read 5, iclass 17, count 0 2006.229.17:41:00.88#ibcon#read 5, iclass 17, count 0 2006.229.17:41:00.88#ibcon#about to read 6, iclass 17, count 0 2006.229.17:41:00.88#ibcon#read 6, iclass 17, count 0 2006.229.17:41:00.88#ibcon#end of sib2, iclass 17, count 0 2006.229.17:41:00.88#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:41:00.88#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:41:00.88#ibcon#[27=USB\r\n] 2006.229.17:41:00.88#ibcon#*before write, iclass 17, count 0 2006.229.17:41:00.88#ibcon#enter sib2, iclass 17, count 0 2006.229.17:41:00.88#ibcon#flushed, iclass 17, count 0 2006.229.17:41:00.88#ibcon#about to write, iclass 17, count 0 2006.229.17:41:00.88#ibcon#wrote, iclass 17, count 0 2006.229.17:41:00.88#ibcon#about to read 3, iclass 17, count 0 2006.229.17:41:00.91#ibcon#read 3, iclass 17, count 0 2006.229.17:41:00.91#ibcon#about to read 4, iclass 17, count 0 2006.229.17:41:00.91#ibcon#read 4, iclass 17, count 0 2006.229.17:41:00.91#ibcon#about to read 5, iclass 17, count 0 2006.229.17:41:00.91#ibcon#read 5, iclass 17, count 0 2006.229.17:41:00.91#ibcon#about to read 6, iclass 17, count 0 2006.229.17:41:00.91#ibcon#read 6, iclass 17, count 0 2006.229.17:41:00.91#ibcon#end of sib2, iclass 17, count 0 2006.229.17:41:00.91#ibcon#*after write, iclass 17, count 0 2006.229.17:41:00.91#ibcon#*before return 0, iclass 17, count 0 2006.229.17:41:00.91#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:41:00.91#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.17:41:00.91#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:41:00.91#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:41:00.91$vck44/vblo=7,734.99 2006.229.17:41:00.91#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.17:41:00.91#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.17:41:00.91#ibcon#ireg 17 cls_cnt 0 2006.229.17:41:00.91#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:41:00.91#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:41:00.91#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:41:00.91#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:41:00.91#ibcon#first serial, iclass 19, count 0 2006.229.17:41:00.91#ibcon#enter sib2, iclass 19, count 0 2006.229.17:41:00.91#ibcon#flushed, iclass 19, count 0 2006.229.17:41:00.91#ibcon#about to write, iclass 19, count 0 2006.229.17:41:00.91#ibcon#wrote, iclass 19, count 0 2006.229.17:41:00.91#ibcon#about to read 3, iclass 19, count 0 2006.229.17:41:00.93#ibcon#read 3, iclass 19, count 0 2006.229.17:41:00.93#ibcon#about to read 4, iclass 19, count 0 2006.229.17:41:00.93#ibcon#read 4, iclass 19, count 0 2006.229.17:41:00.93#ibcon#about to read 5, iclass 19, count 0 2006.229.17:41:00.93#ibcon#read 5, iclass 19, count 0 2006.229.17:41:00.93#ibcon#about to read 6, iclass 19, count 0 2006.229.17:41:00.93#ibcon#read 6, iclass 19, count 0 2006.229.17:41:00.93#ibcon#end of sib2, iclass 19, count 0 2006.229.17:41:00.93#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:41:00.93#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:41:00.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:41:00.93#ibcon#*before write, iclass 19, count 0 2006.229.17:41:00.93#ibcon#enter sib2, iclass 19, count 0 2006.229.17:41:00.93#ibcon#flushed, iclass 19, count 0 2006.229.17:41:00.93#ibcon#about to write, iclass 19, count 0 2006.229.17:41:00.93#ibcon#wrote, iclass 19, count 0 2006.229.17:41:00.93#ibcon#about to read 3, iclass 19, count 0 2006.229.17:41:00.97#ibcon#read 3, iclass 19, count 0 2006.229.17:41:00.97#ibcon#about to read 4, iclass 19, count 0 2006.229.17:41:00.97#ibcon#read 4, iclass 19, count 0 2006.229.17:41:00.97#ibcon#about to read 5, iclass 19, count 0 2006.229.17:41:00.97#ibcon#read 5, iclass 19, count 0 2006.229.17:41:00.97#ibcon#about to read 6, iclass 19, count 0 2006.229.17:41:00.97#ibcon#read 6, iclass 19, count 0 2006.229.17:41:00.97#ibcon#end of sib2, iclass 19, count 0 2006.229.17:41:00.97#ibcon#*after write, iclass 19, count 0 2006.229.17:41:00.97#ibcon#*before return 0, iclass 19, count 0 2006.229.17:41:00.97#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:41:00.97#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.17:41:00.97#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:41:00.97#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:41:00.97$vck44/vb=7,4 2006.229.17:41:00.97#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.17:41:00.97#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.17:41:00.97#ibcon#ireg 11 cls_cnt 2 2006.229.17:41:00.97#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:41:01.03#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:41:01.03#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:41:01.03#ibcon#enter wrdev, iclass 21, count 2 2006.229.17:41:01.03#ibcon#first serial, iclass 21, count 2 2006.229.17:41:01.03#ibcon#enter sib2, iclass 21, count 2 2006.229.17:41:01.03#ibcon#flushed, iclass 21, count 2 2006.229.17:41:01.03#ibcon#about to write, iclass 21, count 2 2006.229.17:41:01.03#ibcon#wrote, iclass 21, count 2 2006.229.17:41:01.03#ibcon#about to read 3, iclass 21, count 2 2006.229.17:41:01.05#ibcon#read 3, iclass 21, count 2 2006.229.17:41:01.05#ibcon#about to read 4, iclass 21, count 2 2006.229.17:41:01.05#ibcon#read 4, iclass 21, count 2 2006.229.17:41:01.05#ibcon#about to read 5, iclass 21, count 2 2006.229.17:41:01.05#ibcon#read 5, iclass 21, count 2 2006.229.17:41:01.05#ibcon#about to read 6, iclass 21, count 2 2006.229.17:41:01.05#ibcon#read 6, iclass 21, count 2 2006.229.17:41:01.05#ibcon#end of sib2, iclass 21, count 2 2006.229.17:41:01.05#ibcon#*mode == 0, iclass 21, count 2 2006.229.17:41:01.05#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.17:41:01.05#ibcon#[27=AT07-04\r\n] 2006.229.17:41:01.05#ibcon#*before write, iclass 21, count 2 2006.229.17:41:01.05#ibcon#enter sib2, iclass 21, count 2 2006.229.17:41:01.05#ibcon#flushed, iclass 21, count 2 2006.229.17:41:01.05#ibcon#about to write, iclass 21, count 2 2006.229.17:41:01.05#ibcon#wrote, iclass 21, count 2 2006.229.17:41:01.05#ibcon#about to read 3, iclass 21, count 2 2006.229.17:41:01.08#ibcon#read 3, iclass 21, count 2 2006.229.17:41:01.08#ibcon#about to read 4, iclass 21, count 2 2006.229.17:41:01.08#ibcon#read 4, iclass 21, count 2 2006.229.17:41:01.08#ibcon#about to read 5, iclass 21, count 2 2006.229.17:41:01.08#ibcon#read 5, iclass 21, count 2 2006.229.17:41:01.08#ibcon#about to read 6, iclass 21, count 2 2006.229.17:41:01.08#ibcon#read 6, iclass 21, count 2 2006.229.17:41:01.08#ibcon#end of sib2, iclass 21, count 2 2006.229.17:41:01.08#ibcon#*after write, iclass 21, count 2 2006.229.17:41:01.08#ibcon#*before return 0, iclass 21, count 2 2006.229.17:41:01.08#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:41:01.08#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.17:41:01.08#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.17:41:01.08#ibcon#ireg 7 cls_cnt 0 2006.229.17:41:01.08#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:41:01.20#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:41:01.20#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:41:01.20#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:41:01.20#ibcon#first serial, iclass 21, count 0 2006.229.17:41:01.20#ibcon#enter sib2, iclass 21, count 0 2006.229.17:41:01.20#ibcon#flushed, iclass 21, count 0 2006.229.17:41:01.20#ibcon#about to write, iclass 21, count 0 2006.229.17:41:01.20#ibcon#wrote, iclass 21, count 0 2006.229.17:41:01.20#ibcon#about to read 3, iclass 21, count 0 2006.229.17:41:01.22#ibcon#read 3, iclass 21, count 0 2006.229.17:41:01.22#ibcon#about to read 4, iclass 21, count 0 2006.229.17:41:01.22#ibcon#read 4, iclass 21, count 0 2006.229.17:41:01.22#ibcon#about to read 5, iclass 21, count 0 2006.229.17:41:01.22#ibcon#read 5, iclass 21, count 0 2006.229.17:41:01.22#ibcon#about to read 6, iclass 21, count 0 2006.229.17:41:01.22#ibcon#read 6, iclass 21, count 0 2006.229.17:41:01.22#ibcon#end of sib2, iclass 21, count 0 2006.229.17:41:01.22#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:41:01.22#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:41:01.22#ibcon#[27=USB\r\n] 2006.229.17:41:01.22#ibcon#*before write, iclass 21, count 0 2006.229.17:41:01.22#ibcon#enter sib2, iclass 21, count 0 2006.229.17:41:01.22#ibcon#flushed, iclass 21, count 0 2006.229.17:41:01.22#ibcon#about to write, iclass 21, count 0 2006.229.17:41:01.22#ibcon#wrote, iclass 21, count 0 2006.229.17:41:01.22#ibcon#about to read 3, iclass 21, count 0 2006.229.17:41:01.25#ibcon#read 3, iclass 21, count 0 2006.229.17:41:01.25#ibcon#about to read 4, iclass 21, count 0 2006.229.17:41:01.25#ibcon#read 4, iclass 21, count 0 2006.229.17:41:01.25#ibcon#about to read 5, iclass 21, count 0 2006.229.17:41:01.25#ibcon#read 5, iclass 21, count 0 2006.229.17:41:01.25#ibcon#about to read 6, iclass 21, count 0 2006.229.17:41:01.25#ibcon#read 6, iclass 21, count 0 2006.229.17:41:01.25#ibcon#end of sib2, iclass 21, count 0 2006.229.17:41:01.25#ibcon#*after write, iclass 21, count 0 2006.229.17:41:01.25#ibcon#*before return 0, iclass 21, count 0 2006.229.17:41:01.25#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:41:01.25#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.17:41:01.25#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:41:01.25#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:41:01.25$vck44/vblo=8,744.99 2006.229.17:41:01.25#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.17:41:01.25#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.17:41:01.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:41:01.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:41:01.25#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:41:01.25#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:41:01.25#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:41:01.25#ibcon#first serial, iclass 23, count 0 2006.229.17:41:01.25#ibcon#enter sib2, iclass 23, count 0 2006.229.17:41:01.25#ibcon#flushed, iclass 23, count 0 2006.229.17:41:01.25#ibcon#about to write, iclass 23, count 0 2006.229.17:41:01.25#ibcon#wrote, iclass 23, count 0 2006.229.17:41:01.25#ibcon#about to read 3, iclass 23, count 0 2006.229.17:41:01.27#ibcon#read 3, iclass 23, count 0 2006.229.17:41:01.27#ibcon#about to read 4, iclass 23, count 0 2006.229.17:41:01.27#ibcon#read 4, iclass 23, count 0 2006.229.17:41:01.27#ibcon#about to read 5, iclass 23, count 0 2006.229.17:41:01.27#ibcon#read 5, iclass 23, count 0 2006.229.17:41:01.27#ibcon#about to read 6, iclass 23, count 0 2006.229.17:41:01.27#ibcon#read 6, iclass 23, count 0 2006.229.17:41:01.27#ibcon#end of sib2, iclass 23, count 0 2006.229.17:41:01.27#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:41:01.27#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:41:01.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:41:01.27#ibcon#*before write, iclass 23, count 0 2006.229.17:41:01.27#ibcon#enter sib2, iclass 23, count 0 2006.229.17:41:01.27#ibcon#flushed, iclass 23, count 0 2006.229.17:41:01.27#ibcon#about to write, iclass 23, count 0 2006.229.17:41:01.27#ibcon#wrote, iclass 23, count 0 2006.229.17:41:01.27#ibcon#about to read 3, iclass 23, count 0 2006.229.17:41:01.31#ibcon#read 3, iclass 23, count 0 2006.229.17:41:01.31#ibcon#about to read 4, iclass 23, count 0 2006.229.17:41:01.31#ibcon#read 4, iclass 23, count 0 2006.229.17:41:01.31#ibcon#about to read 5, iclass 23, count 0 2006.229.17:41:01.31#ibcon#read 5, iclass 23, count 0 2006.229.17:41:01.31#ibcon#about to read 6, iclass 23, count 0 2006.229.17:41:01.31#ibcon#read 6, iclass 23, count 0 2006.229.17:41:01.31#ibcon#end of sib2, iclass 23, count 0 2006.229.17:41:01.31#ibcon#*after write, iclass 23, count 0 2006.229.17:41:01.31#ibcon#*before return 0, iclass 23, count 0 2006.229.17:41:01.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:41:01.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.17:41:01.31#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:41:01.31#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:41:01.31$vck44/vb=8,4 2006.229.17:41:01.31#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.17:41:01.31#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.17:41:01.31#ibcon#ireg 11 cls_cnt 2 2006.229.17:41:01.31#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:41:01.37#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:41:01.37#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:41:01.37#ibcon#enter wrdev, iclass 25, count 2 2006.229.17:41:01.37#ibcon#first serial, iclass 25, count 2 2006.229.17:41:01.37#ibcon#enter sib2, iclass 25, count 2 2006.229.17:41:01.37#ibcon#flushed, iclass 25, count 2 2006.229.17:41:01.37#ibcon#about to write, iclass 25, count 2 2006.229.17:41:01.37#ibcon#wrote, iclass 25, count 2 2006.229.17:41:01.37#ibcon#about to read 3, iclass 25, count 2 2006.229.17:41:01.39#ibcon#read 3, iclass 25, count 2 2006.229.17:41:01.39#ibcon#about to read 4, iclass 25, count 2 2006.229.17:41:01.39#ibcon#read 4, iclass 25, count 2 2006.229.17:41:01.39#ibcon#about to read 5, iclass 25, count 2 2006.229.17:41:01.39#ibcon#read 5, iclass 25, count 2 2006.229.17:41:01.39#ibcon#about to read 6, iclass 25, count 2 2006.229.17:41:01.39#ibcon#read 6, iclass 25, count 2 2006.229.17:41:01.39#ibcon#end of sib2, iclass 25, count 2 2006.229.17:41:01.39#ibcon#*mode == 0, iclass 25, count 2 2006.229.17:41:01.39#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.17:41:01.39#ibcon#[27=AT08-04\r\n] 2006.229.17:41:01.39#ibcon#*before write, iclass 25, count 2 2006.229.17:41:01.39#ibcon#enter sib2, iclass 25, count 2 2006.229.17:41:01.39#ibcon#flushed, iclass 25, count 2 2006.229.17:41:01.39#ibcon#about to write, iclass 25, count 2 2006.229.17:41:01.39#ibcon#wrote, iclass 25, count 2 2006.229.17:41:01.39#ibcon#about to read 3, iclass 25, count 2 2006.229.17:41:01.42#ibcon#read 3, iclass 25, count 2 2006.229.17:41:01.42#ibcon#about to read 4, iclass 25, count 2 2006.229.17:41:01.42#ibcon#read 4, iclass 25, count 2 2006.229.17:41:01.42#ibcon#about to read 5, iclass 25, count 2 2006.229.17:41:01.42#ibcon#read 5, iclass 25, count 2 2006.229.17:41:01.42#ibcon#about to read 6, iclass 25, count 2 2006.229.17:41:01.42#ibcon#read 6, iclass 25, count 2 2006.229.17:41:01.42#ibcon#end of sib2, iclass 25, count 2 2006.229.17:41:01.42#ibcon#*after write, iclass 25, count 2 2006.229.17:41:01.42#ibcon#*before return 0, iclass 25, count 2 2006.229.17:41:01.42#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:41:01.42#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.17:41:01.42#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.17:41:01.42#ibcon#ireg 7 cls_cnt 0 2006.229.17:41:01.42#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:41:01.54#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:41:01.54#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:41:01.54#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:41:01.54#ibcon#first serial, iclass 25, count 0 2006.229.17:41:01.54#ibcon#enter sib2, iclass 25, count 0 2006.229.17:41:01.54#ibcon#flushed, iclass 25, count 0 2006.229.17:41:01.54#ibcon#about to write, iclass 25, count 0 2006.229.17:41:01.54#ibcon#wrote, iclass 25, count 0 2006.229.17:41:01.54#ibcon#about to read 3, iclass 25, count 0 2006.229.17:41:01.56#ibcon#read 3, iclass 25, count 0 2006.229.17:41:01.56#ibcon#about to read 4, iclass 25, count 0 2006.229.17:41:01.56#ibcon#read 4, iclass 25, count 0 2006.229.17:41:01.56#ibcon#about to read 5, iclass 25, count 0 2006.229.17:41:01.56#ibcon#read 5, iclass 25, count 0 2006.229.17:41:01.56#ibcon#about to read 6, iclass 25, count 0 2006.229.17:41:01.56#ibcon#read 6, iclass 25, count 0 2006.229.17:41:01.56#ibcon#end of sib2, iclass 25, count 0 2006.229.17:41:01.56#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:41:01.56#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:41:01.56#ibcon#[27=USB\r\n] 2006.229.17:41:01.56#ibcon#*before write, iclass 25, count 0 2006.229.17:41:01.56#ibcon#enter sib2, iclass 25, count 0 2006.229.17:41:01.56#ibcon#flushed, iclass 25, count 0 2006.229.17:41:01.56#ibcon#about to write, iclass 25, count 0 2006.229.17:41:01.56#ibcon#wrote, iclass 25, count 0 2006.229.17:41:01.56#ibcon#about to read 3, iclass 25, count 0 2006.229.17:41:01.59#ibcon#read 3, iclass 25, count 0 2006.229.17:41:01.59#ibcon#about to read 4, iclass 25, count 0 2006.229.17:41:01.59#ibcon#read 4, iclass 25, count 0 2006.229.17:41:01.59#ibcon#about to read 5, iclass 25, count 0 2006.229.17:41:01.59#ibcon#read 5, iclass 25, count 0 2006.229.17:41:01.59#ibcon#about to read 6, iclass 25, count 0 2006.229.17:41:01.59#ibcon#read 6, iclass 25, count 0 2006.229.17:41:01.59#ibcon#end of sib2, iclass 25, count 0 2006.229.17:41:01.59#ibcon#*after write, iclass 25, count 0 2006.229.17:41:01.59#ibcon#*before return 0, iclass 25, count 0 2006.229.17:41:01.59#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:41:01.59#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.17:41:01.59#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:41:01.59#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:41:01.59$vck44/vabw=wide 2006.229.17:41:01.59#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.17:41:01.59#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.17:41:01.59#ibcon#ireg 8 cls_cnt 0 2006.229.17:41:01.59#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:41:01.59#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:41:01.59#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:41:01.59#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:41:01.59#ibcon#first serial, iclass 27, count 0 2006.229.17:41:01.59#ibcon#enter sib2, iclass 27, count 0 2006.229.17:41:01.59#ibcon#flushed, iclass 27, count 0 2006.229.17:41:01.59#ibcon#about to write, iclass 27, count 0 2006.229.17:41:01.59#ibcon#wrote, iclass 27, count 0 2006.229.17:41:01.59#ibcon#about to read 3, iclass 27, count 0 2006.229.17:41:01.61#ibcon#read 3, iclass 27, count 0 2006.229.17:41:01.61#ibcon#about to read 4, iclass 27, count 0 2006.229.17:41:01.61#ibcon#read 4, iclass 27, count 0 2006.229.17:41:01.61#ibcon#about to read 5, iclass 27, count 0 2006.229.17:41:01.61#ibcon#read 5, iclass 27, count 0 2006.229.17:41:01.61#ibcon#about to read 6, iclass 27, count 0 2006.229.17:41:01.61#ibcon#read 6, iclass 27, count 0 2006.229.17:41:01.61#ibcon#end of sib2, iclass 27, count 0 2006.229.17:41:01.61#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:41:01.61#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:41:01.61#ibcon#[25=BW32\r\n] 2006.229.17:41:01.61#ibcon#*before write, iclass 27, count 0 2006.229.17:41:01.61#ibcon#enter sib2, iclass 27, count 0 2006.229.17:41:01.61#ibcon#flushed, iclass 27, count 0 2006.229.17:41:01.61#ibcon#about to write, iclass 27, count 0 2006.229.17:41:01.61#ibcon#wrote, iclass 27, count 0 2006.229.17:41:01.61#ibcon#about to read 3, iclass 27, count 0 2006.229.17:41:01.64#ibcon#read 3, iclass 27, count 0 2006.229.17:41:01.64#ibcon#about to read 4, iclass 27, count 0 2006.229.17:41:01.64#ibcon#read 4, iclass 27, count 0 2006.229.17:41:01.64#ibcon#about to read 5, iclass 27, count 0 2006.229.17:41:01.64#ibcon#read 5, iclass 27, count 0 2006.229.17:41:01.64#ibcon#about to read 6, iclass 27, count 0 2006.229.17:41:01.64#ibcon#read 6, iclass 27, count 0 2006.229.17:41:01.64#ibcon#end of sib2, iclass 27, count 0 2006.229.17:41:01.64#ibcon#*after write, iclass 27, count 0 2006.229.17:41:01.64#ibcon#*before return 0, iclass 27, count 0 2006.229.17:41:01.64#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:41:01.64#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.17:41:01.64#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:41:01.64#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:41:01.64$vck44/vbbw=wide 2006.229.17:41:01.64#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:41:01.64#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:41:01.64#ibcon#ireg 8 cls_cnt 0 2006.229.17:41:01.64#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:41:01.71#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:41:01.71#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:41:01.71#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:41:01.71#ibcon#first serial, iclass 29, count 0 2006.229.17:41:01.71#ibcon#enter sib2, iclass 29, count 0 2006.229.17:41:01.71#ibcon#flushed, iclass 29, count 0 2006.229.17:41:01.71#ibcon#about to write, iclass 29, count 0 2006.229.17:41:01.71#ibcon#wrote, iclass 29, count 0 2006.229.17:41:01.71#ibcon#about to read 3, iclass 29, count 0 2006.229.17:41:01.73#ibcon#read 3, iclass 29, count 0 2006.229.17:41:01.73#ibcon#about to read 4, iclass 29, count 0 2006.229.17:41:01.73#ibcon#read 4, iclass 29, count 0 2006.229.17:41:01.73#ibcon#about to read 5, iclass 29, count 0 2006.229.17:41:01.73#ibcon#read 5, iclass 29, count 0 2006.229.17:41:01.73#ibcon#about to read 6, iclass 29, count 0 2006.229.17:41:01.73#ibcon#read 6, iclass 29, count 0 2006.229.17:41:01.73#ibcon#end of sib2, iclass 29, count 0 2006.229.17:41:01.73#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:41:01.73#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:41:01.73#ibcon#[27=BW32\r\n] 2006.229.17:41:01.73#ibcon#*before write, iclass 29, count 0 2006.229.17:41:01.73#ibcon#enter sib2, iclass 29, count 0 2006.229.17:41:01.73#ibcon#flushed, iclass 29, count 0 2006.229.17:41:01.73#ibcon#about to write, iclass 29, count 0 2006.229.17:41:01.73#ibcon#wrote, iclass 29, count 0 2006.229.17:41:01.73#ibcon#about to read 3, iclass 29, count 0 2006.229.17:41:01.76#ibcon#read 3, iclass 29, count 0 2006.229.17:41:01.76#ibcon#about to read 4, iclass 29, count 0 2006.229.17:41:01.76#ibcon#read 4, iclass 29, count 0 2006.229.17:41:01.76#ibcon#about to read 5, iclass 29, count 0 2006.229.17:41:01.76#ibcon#read 5, iclass 29, count 0 2006.229.17:41:01.76#ibcon#about to read 6, iclass 29, count 0 2006.229.17:41:01.76#ibcon#read 6, iclass 29, count 0 2006.229.17:41:01.76#ibcon#end of sib2, iclass 29, count 0 2006.229.17:41:01.76#ibcon#*after write, iclass 29, count 0 2006.229.17:41:01.76#ibcon#*before return 0, iclass 29, count 0 2006.229.17:41:01.76#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:41:01.76#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:41:01.76#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:41:01.76#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:41:01.76$setupk4/ifdk4 2006.229.17:41:01.76$ifdk4/lo= 2006.229.17:41:01.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:41:01.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:41:01.76$ifdk4/patch= 2006.229.17:41:01.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:41:01.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:41:01.76$setupk4/!*+20s 2006.229.17:41:09.13#trakl#Source acquired 2006.229.17:41:09.48#abcon#<5=/07 1.3 3.3 26.891001001.5\r\n> 2006.229.17:41:09.50#abcon#{5=INTERFACE CLEAR} 2006.229.17:41:09.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:41:10.13#flagr#flagr/antenna,acquired 2006.229.17:41:16.27$setupk4/"tpicd 2006.229.17:41:16.27$setupk4/echo=off 2006.229.17:41:16.27$setupk4/xlog=off 2006.229.17:41:16.27:!2006.229.17:41:26 2006.229.17:41:26.00:preob 2006.229.17:41:26.13/onsource/TRACKING 2006.229.17:41:26.13:!2006.229.17:41:36 2006.229.17:41:36.00:"tape 2006.229.17:41:36.00:"st=record 2006.229.17:41:36.00:data_valid=on 2006.229.17:41:36.00:midob 2006.229.17:41:37.13/onsource/TRACKING 2006.229.17:41:37.13/wx/26.89,1001.6,100 2006.229.17:41:37.22/cable/+6.4165E-03 2006.229.17:41:38.31/va/01,08,usb,yes,32,35 2006.229.17:41:38.31/va/02,07,usb,yes,35,35 2006.229.17:41:38.31/va/03,06,usb,yes,43,46 2006.229.17:41:38.31/va/04,07,usb,yes,36,38 2006.229.17:41:38.31/va/05,04,usb,yes,32,33 2006.229.17:41:38.31/va/06,04,usb,yes,36,36 2006.229.17:41:38.31/va/07,05,usb,yes,32,33 2006.229.17:41:38.31/va/08,06,usb,yes,23,29 2006.229.17:41:38.54/valo/01,524.99,yes,locked 2006.229.17:41:38.54/valo/02,534.99,yes,locked 2006.229.17:41:38.54/valo/03,564.99,yes,locked 2006.229.17:41:38.54/valo/04,624.99,yes,locked 2006.229.17:41:38.54/valo/05,734.99,yes,locked 2006.229.17:41:38.54/valo/06,814.99,yes,locked 2006.229.17:41:38.54/valo/07,864.99,yes,locked 2006.229.17:41:38.54/valo/08,884.99,yes,locked 2006.229.17:41:39.63/vb/01,04,usb,yes,31,29 2006.229.17:41:39.63/vb/02,04,usb,yes,33,33 2006.229.17:41:39.63/vb/03,04,usb,yes,30,33 2006.229.17:41:39.63/vb/04,04,usb,yes,35,33 2006.229.17:41:39.63/vb/05,04,usb,yes,27,29 2006.229.17:41:39.63/vb/06,04,usb,yes,32,28 2006.229.17:41:39.63/vb/07,04,usb,yes,31,31 2006.229.17:41:39.63/vb/08,04,usb,yes,29,32 2006.229.17:41:39.87/vblo/01,629.99,yes,locked 2006.229.17:41:39.87/vblo/02,634.99,yes,locked 2006.229.17:41:39.87/vblo/03,649.99,yes,locked 2006.229.17:41:39.87/vblo/04,679.99,yes,locked 2006.229.17:41:39.87/vblo/05,709.99,yes,locked 2006.229.17:41:39.87/vblo/06,719.99,yes,locked 2006.229.17:41:39.87/vblo/07,734.99,yes,locked 2006.229.17:41:39.87/vblo/08,744.99,yes,locked 2006.229.17:41:40.02/vabw/8 2006.229.17:41:40.17/vbbw/8 2006.229.17:41:40.26/xfe/off,on,12.2 2006.229.17:41:40.65/ifatt/23,28,28,28 2006.229.17:41:41.08/fmout-gps/S +4.65E-07 2006.229.17:41:41.12:!2006.229.17:45:56 2006.229.17:45:56.00:data_valid=off 2006.229.17:45:56.00:"et 2006.229.17:45:56.00:!+3s 2006.229.17:45:59.01:"tape 2006.229.17:45:59.01:postob 2006.229.17:45:59.14/cable/+6.4167E-03 2006.229.17:45:59.14/wx/26.87,1001.5,100 2006.229.17:46:00.08/fmout-gps/S +4.62E-07 2006.229.17:46:00.08:scan_name=229-1755,jd0608,140 2006.229.17:46:00.08:source=0059+581,010245.76,582411.1,2000.0,neutral 2006.229.17:46:01.14#flagr#flagr/antenna,new-source 2006.229.17:46:01.14:checkk5 2006.229.17:46:01.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:46:01.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:46:02.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:46:02.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:46:03.11/chk_obsdata//k5ts1/T2291741??a.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:46:03.51/chk_obsdata//k5ts2/T2291741??b.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:46:03.90/chk_obsdata//k5ts3/T2291741??c.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:46:04.31/chk_obsdata//k5ts4/T2291741??d.dat file size is correct (nominal:1040MB, actual:1036MB). 2006.229.17:46:05.03/k5log//k5ts1_log_newline 2006.229.17:46:05.74/k5log//k5ts2_log_newline 2006.229.17:46:06.43/k5log//k5ts3_log_newline 2006.229.17:46:07.13/k5log//k5ts4_log_newline 2006.229.17:46:07.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:46:07.16:setupk4=1 2006.229.17:46:07.16$setupk4/echo=on 2006.229.17:46:07.16$setupk4/pcalon 2006.229.17:46:07.16$pcalon/"no phase cal control is implemented here 2006.229.17:46:07.16$setupk4/"tpicd=stop 2006.229.17:46:07.16$setupk4/"rec=synch_on 2006.229.17:46:07.16$setupk4/"rec_mode=128 2006.229.17:46:07.16$setupk4/!* 2006.229.17:46:07.16$setupk4/recpk4 2006.229.17:46:07.16$recpk4/recpatch= 2006.229.17:46:07.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:46:07.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:46:07.16$setupk4/vck44 2006.229.17:46:07.16$vck44/valo=1,524.99 2006.229.17:46:07.16#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.17:46:07.16#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.17:46:07.16#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:07.16#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:07.16#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:07.16#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:07.16#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:46:07.16#ibcon#first serial, iclass 10, count 0 2006.229.17:46:07.16#ibcon#enter sib2, iclass 10, count 0 2006.229.17:46:07.16#ibcon#flushed, iclass 10, count 0 2006.229.17:46:07.16#ibcon#about to write, iclass 10, count 0 2006.229.17:46:07.16#ibcon#wrote, iclass 10, count 0 2006.229.17:46:07.16#ibcon#about to read 3, iclass 10, count 0 2006.229.17:46:07.18#ibcon#read 3, iclass 10, count 0 2006.229.17:46:07.18#ibcon#about to read 4, iclass 10, count 0 2006.229.17:46:07.18#ibcon#read 4, iclass 10, count 0 2006.229.17:46:07.18#ibcon#about to read 5, iclass 10, count 0 2006.229.17:46:07.18#ibcon#read 5, iclass 10, count 0 2006.229.17:46:07.18#ibcon#about to read 6, iclass 10, count 0 2006.229.17:46:07.18#ibcon#read 6, iclass 10, count 0 2006.229.17:46:07.18#ibcon#end of sib2, iclass 10, count 0 2006.229.17:46:07.18#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:46:07.18#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:46:07.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:46:07.18#ibcon#*before write, iclass 10, count 0 2006.229.17:46:07.18#ibcon#enter sib2, iclass 10, count 0 2006.229.17:46:07.18#ibcon#flushed, iclass 10, count 0 2006.229.17:46:07.18#ibcon#about to write, iclass 10, count 0 2006.229.17:46:07.18#ibcon#wrote, iclass 10, count 0 2006.229.17:46:07.18#ibcon#about to read 3, iclass 10, count 0 2006.229.17:46:07.23#ibcon#read 3, iclass 10, count 0 2006.229.17:46:07.23#ibcon#about to read 4, iclass 10, count 0 2006.229.17:46:07.23#ibcon#read 4, iclass 10, count 0 2006.229.17:46:07.23#ibcon#about to read 5, iclass 10, count 0 2006.229.17:46:07.23#ibcon#read 5, iclass 10, count 0 2006.229.17:46:07.23#ibcon#about to read 6, iclass 10, count 0 2006.229.17:46:07.23#ibcon#read 6, iclass 10, count 0 2006.229.17:46:07.23#ibcon#end of sib2, iclass 10, count 0 2006.229.17:46:07.23#ibcon#*after write, iclass 10, count 0 2006.229.17:46:07.23#ibcon#*before return 0, iclass 10, count 0 2006.229.17:46:07.23#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:07.23#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:07.23#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:46:07.23#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:46:07.23$vck44/va=1,8 2006.229.17:46:07.23#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.17:46:07.23#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.17:46:07.23#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:07.23#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:07.23#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:07.23#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:07.23#ibcon#enter wrdev, iclass 12, count 2 2006.229.17:46:07.23#ibcon#first serial, iclass 12, count 2 2006.229.17:46:07.23#ibcon#enter sib2, iclass 12, count 2 2006.229.17:46:07.23#ibcon#flushed, iclass 12, count 2 2006.229.17:46:07.23#ibcon#about to write, iclass 12, count 2 2006.229.17:46:07.23#ibcon#wrote, iclass 12, count 2 2006.229.17:46:07.23#ibcon#about to read 3, iclass 12, count 2 2006.229.17:46:07.25#ibcon#read 3, iclass 12, count 2 2006.229.17:46:07.25#ibcon#about to read 4, iclass 12, count 2 2006.229.17:46:07.25#ibcon#read 4, iclass 12, count 2 2006.229.17:46:07.25#ibcon#about to read 5, iclass 12, count 2 2006.229.17:46:07.25#ibcon#read 5, iclass 12, count 2 2006.229.17:46:07.25#ibcon#about to read 6, iclass 12, count 2 2006.229.17:46:07.25#ibcon#read 6, iclass 12, count 2 2006.229.17:46:07.25#ibcon#end of sib2, iclass 12, count 2 2006.229.17:46:07.25#ibcon#*mode == 0, iclass 12, count 2 2006.229.17:46:07.25#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.17:46:07.25#ibcon#[25=AT01-08\r\n] 2006.229.17:46:07.25#ibcon#*before write, iclass 12, count 2 2006.229.17:46:07.25#ibcon#enter sib2, iclass 12, count 2 2006.229.17:46:07.25#ibcon#flushed, iclass 12, count 2 2006.229.17:46:07.25#ibcon#about to write, iclass 12, count 2 2006.229.17:46:07.25#ibcon#wrote, iclass 12, count 2 2006.229.17:46:07.25#ibcon#about to read 3, iclass 12, count 2 2006.229.17:46:07.28#ibcon#read 3, iclass 12, count 2 2006.229.17:46:07.28#ibcon#about to read 4, iclass 12, count 2 2006.229.17:46:07.28#ibcon#read 4, iclass 12, count 2 2006.229.17:46:07.28#ibcon#about to read 5, iclass 12, count 2 2006.229.17:46:07.28#ibcon#read 5, iclass 12, count 2 2006.229.17:46:07.28#ibcon#about to read 6, iclass 12, count 2 2006.229.17:46:07.28#ibcon#read 6, iclass 12, count 2 2006.229.17:46:07.28#ibcon#end of sib2, iclass 12, count 2 2006.229.17:46:07.28#ibcon#*after write, iclass 12, count 2 2006.229.17:46:07.28#ibcon#*before return 0, iclass 12, count 2 2006.229.17:46:07.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:07.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:07.28#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.17:46:07.28#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:07.28#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:07.40#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:07.40#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:07.40#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:46:07.40#ibcon#first serial, iclass 12, count 0 2006.229.17:46:07.40#ibcon#enter sib2, iclass 12, count 0 2006.229.17:46:07.40#ibcon#flushed, iclass 12, count 0 2006.229.17:46:07.40#ibcon#about to write, iclass 12, count 0 2006.229.17:46:07.40#ibcon#wrote, iclass 12, count 0 2006.229.17:46:07.40#ibcon#about to read 3, iclass 12, count 0 2006.229.17:46:07.42#ibcon#read 3, iclass 12, count 0 2006.229.17:46:07.42#ibcon#about to read 4, iclass 12, count 0 2006.229.17:46:07.42#ibcon#read 4, iclass 12, count 0 2006.229.17:46:07.42#ibcon#about to read 5, iclass 12, count 0 2006.229.17:46:07.42#ibcon#read 5, iclass 12, count 0 2006.229.17:46:07.42#ibcon#about to read 6, iclass 12, count 0 2006.229.17:46:07.42#ibcon#read 6, iclass 12, count 0 2006.229.17:46:07.42#ibcon#end of sib2, iclass 12, count 0 2006.229.17:46:07.42#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:46:07.42#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:46:07.42#ibcon#[25=USB\r\n] 2006.229.17:46:07.42#ibcon#*before write, iclass 12, count 0 2006.229.17:46:07.42#ibcon#enter sib2, iclass 12, count 0 2006.229.17:46:07.42#ibcon#flushed, iclass 12, count 0 2006.229.17:46:07.42#ibcon#about to write, iclass 12, count 0 2006.229.17:46:07.42#ibcon#wrote, iclass 12, count 0 2006.229.17:46:07.42#ibcon#about to read 3, iclass 12, count 0 2006.229.17:46:07.45#ibcon#read 3, iclass 12, count 0 2006.229.17:46:07.45#ibcon#about to read 4, iclass 12, count 0 2006.229.17:46:07.45#ibcon#read 4, iclass 12, count 0 2006.229.17:46:07.45#ibcon#about to read 5, iclass 12, count 0 2006.229.17:46:07.45#ibcon#read 5, iclass 12, count 0 2006.229.17:46:07.45#ibcon#about to read 6, iclass 12, count 0 2006.229.17:46:07.45#ibcon#read 6, iclass 12, count 0 2006.229.17:46:07.45#ibcon#end of sib2, iclass 12, count 0 2006.229.17:46:07.45#ibcon#*after write, iclass 12, count 0 2006.229.17:46:07.45#ibcon#*before return 0, iclass 12, count 0 2006.229.17:46:07.45#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:07.45#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:07.45#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:46:07.45#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:46:07.45$vck44/valo=2,534.99 2006.229.17:46:07.45#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.17:46:07.45#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.17:46:07.45#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:07.45#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:07.45#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:07.45#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:07.45#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:46:07.45#ibcon#first serial, iclass 14, count 0 2006.229.17:46:07.45#ibcon#enter sib2, iclass 14, count 0 2006.229.17:46:07.45#ibcon#flushed, iclass 14, count 0 2006.229.17:46:07.45#ibcon#about to write, iclass 14, count 0 2006.229.17:46:07.45#ibcon#wrote, iclass 14, count 0 2006.229.17:46:07.45#ibcon#about to read 3, iclass 14, count 0 2006.229.17:46:07.47#ibcon#read 3, iclass 14, count 0 2006.229.17:46:07.47#ibcon#about to read 4, iclass 14, count 0 2006.229.17:46:07.47#ibcon#read 4, iclass 14, count 0 2006.229.17:46:07.47#ibcon#about to read 5, iclass 14, count 0 2006.229.17:46:07.47#ibcon#read 5, iclass 14, count 0 2006.229.17:46:07.47#ibcon#about to read 6, iclass 14, count 0 2006.229.17:46:07.47#ibcon#read 6, iclass 14, count 0 2006.229.17:46:07.47#ibcon#end of sib2, iclass 14, count 0 2006.229.17:46:07.47#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:46:07.47#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:46:07.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:46:07.47#ibcon#*before write, iclass 14, count 0 2006.229.17:46:07.47#ibcon#enter sib2, iclass 14, count 0 2006.229.17:46:07.47#ibcon#flushed, iclass 14, count 0 2006.229.17:46:07.47#ibcon#about to write, iclass 14, count 0 2006.229.17:46:07.47#ibcon#wrote, iclass 14, count 0 2006.229.17:46:07.47#ibcon#about to read 3, iclass 14, count 0 2006.229.17:46:07.51#ibcon#read 3, iclass 14, count 0 2006.229.17:46:07.51#ibcon#about to read 4, iclass 14, count 0 2006.229.17:46:07.51#ibcon#read 4, iclass 14, count 0 2006.229.17:46:07.51#ibcon#about to read 5, iclass 14, count 0 2006.229.17:46:07.51#ibcon#read 5, iclass 14, count 0 2006.229.17:46:07.51#ibcon#about to read 6, iclass 14, count 0 2006.229.17:46:07.51#ibcon#read 6, iclass 14, count 0 2006.229.17:46:07.51#ibcon#end of sib2, iclass 14, count 0 2006.229.17:46:07.51#ibcon#*after write, iclass 14, count 0 2006.229.17:46:07.51#ibcon#*before return 0, iclass 14, count 0 2006.229.17:46:07.51#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:07.51#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:07.51#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:46:07.51#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:46:07.51$vck44/va=2,7 2006.229.17:46:07.51#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.17:46:07.51#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.17:46:07.51#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:07.51#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:07.57#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:07.57#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:07.57#ibcon#enter wrdev, iclass 16, count 2 2006.229.17:46:07.57#ibcon#first serial, iclass 16, count 2 2006.229.17:46:07.57#ibcon#enter sib2, iclass 16, count 2 2006.229.17:46:07.57#ibcon#flushed, iclass 16, count 2 2006.229.17:46:07.57#ibcon#about to write, iclass 16, count 2 2006.229.17:46:07.57#ibcon#wrote, iclass 16, count 2 2006.229.17:46:07.57#ibcon#about to read 3, iclass 16, count 2 2006.229.17:46:07.59#ibcon#read 3, iclass 16, count 2 2006.229.17:46:07.59#ibcon#about to read 4, iclass 16, count 2 2006.229.17:46:07.59#ibcon#read 4, iclass 16, count 2 2006.229.17:46:07.59#ibcon#about to read 5, iclass 16, count 2 2006.229.17:46:07.59#ibcon#read 5, iclass 16, count 2 2006.229.17:46:07.59#ibcon#about to read 6, iclass 16, count 2 2006.229.17:46:07.59#ibcon#read 6, iclass 16, count 2 2006.229.17:46:07.59#ibcon#end of sib2, iclass 16, count 2 2006.229.17:46:07.59#ibcon#*mode == 0, iclass 16, count 2 2006.229.17:46:07.59#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.17:46:07.59#ibcon#[25=AT02-07\r\n] 2006.229.17:46:07.59#ibcon#*before write, iclass 16, count 2 2006.229.17:46:07.59#ibcon#enter sib2, iclass 16, count 2 2006.229.17:46:07.59#ibcon#flushed, iclass 16, count 2 2006.229.17:46:07.59#ibcon#about to write, iclass 16, count 2 2006.229.17:46:07.59#ibcon#wrote, iclass 16, count 2 2006.229.17:46:07.59#ibcon#about to read 3, iclass 16, count 2 2006.229.17:46:07.62#ibcon#read 3, iclass 16, count 2 2006.229.17:46:07.62#ibcon#about to read 4, iclass 16, count 2 2006.229.17:46:07.62#ibcon#read 4, iclass 16, count 2 2006.229.17:46:07.62#ibcon#about to read 5, iclass 16, count 2 2006.229.17:46:07.62#ibcon#read 5, iclass 16, count 2 2006.229.17:46:07.62#ibcon#about to read 6, iclass 16, count 2 2006.229.17:46:07.62#ibcon#read 6, iclass 16, count 2 2006.229.17:46:07.62#ibcon#end of sib2, iclass 16, count 2 2006.229.17:46:07.62#ibcon#*after write, iclass 16, count 2 2006.229.17:46:07.62#ibcon#*before return 0, iclass 16, count 2 2006.229.17:46:07.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:07.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:07.62#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.17:46:07.62#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:07.62#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:07.74#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:07.74#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:07.74#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:46:07.74#ibcon#first serial, iclass 16, count 0 2006.229.17:46:07.74#ibcon#enter sib2, iclass 16, count 0 2006.229.17:46:07.74#ibcon#flushed, iclass 16, count 0 2006.229.17:46:07.74#ibcon#about to write, iclass 16, count 0 2006.229.17:46:07.74#ibcon#wrote, iclass 16, count 0 2006.229.17:46:07.74#ibcon#about to read 3, iclass 16, count 0 2006.229.17:46:07.76#ibcon#read 3, iclass 16, count 0 2006.229.17:46:07.76#ibcon#about to read 4, iclass 16, count 0 2006.229.17:46:07.76#ibcon#read 4, iclass 16, count 0 2006.229.17:46:07.76#ibcon#about to read 5, iclass 16, count 0 2006.229.17:46:07.76#ibcon#read 5, iclass 16, count 0 2006.229.17:46:07.76#ibcon#about to read 6, iclass 16, count 0 2006.229.17:46:07.76#ibcon#read 6, iclass 16, count 0 2006.229.17:46:07.76#ibcon#end of sib2, iclass 16, count 0 2006.229.17:46:07.76#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:46:07.76#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:46:07.76#ibcon#[25=USB\r\n] 2006.229.17:46:07.76#ibcon#*before write, iclass 16, count 0 2006.229.17:46:07.76#ibcon#enter sib2, iclass 16, count 0 2006.229.17:46:07.76#ibcon#flushed, iclass 16, count 0 2006.229.17:46:07.76#ibcon#about to write, iclass 16, count 0 2006.229.17:46:07.76#ibcon#wrote, iclass 16, count 0 2006.229.17:46:07.76#ibcon#about to read 3, iclass 16, count 0 2006.229.17:46:07.79#ibcon#read 3, iclass 16, count 0 2006.229.17:46:07.79#ibcon#about to read 4, iclass 16, count 0 2006.229.17:46:07.79#ibcon#read 4, iclass 16, count 0 2006.229.17:46:07.79#ibcon#about to read 5, iclass 16, count 0 2006.229.17:46:07.79#ibcon#read 5, iclass 16, count 0 2006.229.17:46:07.79#ibcon#about to read 6, iclass 16, count 0 2006.229.17:46:07.79#ibcon#read 6, iclass 16, count 0 2006.229.17:46:07.79#ibcon#end of sib2, iclass 16, count 0 2006.229.17:46:07.79#ibcon#*after write, iclass 16, count 0 2006.229.17:46:07.79#ibcon#*before return 0, iclass 16, count 0 2006.229.17:46:07.79#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:07.79#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:07.79#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:46:07.79#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:46:07.79$vck44/valo=3,564.99 2006.229.17:46:07.79#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.17:46:07.79#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.17:46:07.79#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:07.79#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:07.79#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:07.79#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:07.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:46:07.79#ibcon#first serial, iclass 18, count 0 2006.229.17:46:07.79#ibcon#enter sib2, iclass 18, count 0 2006.229.17:46:07.79#ibcon#flushed, iclass 18, count 0 2006.229.17:46:07.79#ibcon#about to write, iclass 18, count 0 2006.229.17:46:07.79#ibcon#wrote, iclass 18, count 0 2006.229.17:46:07.79#ibcon#about to read 3, iclass 18, count 0 2006.229.17:46:07.81#ibcon#read 3, iclass 18, count 0 2006.229.17:46:07.81#ibcon#about to read 4, iclass 18, count 0 2006.229.17:46:07.81#ibcon#read 4, iclass 18, count 0 2006.229.17:46:07.81#ibcon#about to read 5, iclass 18, count 0 2006.229.17:46:07.81#ibcon#read 5, iclass 18, count 0 2006.229.17:46:07.81#ibcon#about to read 6, iclass 18, count 0 2006.229.17:46:07.81#ibcon#read 6, iclass 18, count 0 2006.229.17:46:07.81#ibcon#end of sib2, iclass 18, count 0 2006.229.17:46:07.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:46:07.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:46:07.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:46:07.81#ibcon#*before write, iclass 18, count 0 2006.229.17:46:07.81#ibcon#enter sib2, iclass 18, count 0 2006.229.17:46:07.81#ibcon#flushed, iclass 18, count 0 2006.229.17:46:07.81#ibcon#about to write, iclass 18, count 0 2006.229.17:46:07.81#ibcon#wrote, iclass 18, count 0 2006.229.17:46:07.81#ibcon#about to read 3, iclass 18, count 0 2006.229.17:46:07.85#ibcon#read 3, iclass 18, count 0 2006.229.17:46:07.85#ibcon#about to read 4, iclass 18, count 0 2006.229.17:46:07.85#ibcon#read 4, iclass 18, count 0 2006.229.17:46:07.85#ibcon#about to read 5, iclass 18, count 0 2006.229.17:46:07.85#ibcon#read 5, iclass 18, count 0 2006.229.17:46:07.85#ibcon#about to read 6, iclass 18, count 0 2006.229.17:46:07.85#ibcon#read 6, iclass 18, count 0 2006.229.17:46:07.85#ibcon#end of sib2, iclass 18, count 0 2006.229.17:46:07.85#ibcon#*after write, iclass 18, count 0 2006.229.17:46:07.85#ibcon#*before return 0, iclass 18, count 0 2006.229.17:46:07.85#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:07.85#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:07.85#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:46:07.85#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:46:07.85$vck44/va=3,6 2006.229.17:46:07.85#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.17:46:07.85#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.17:46:07.85#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:07.85#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:07.91#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:07.91#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:07.91#ibcon#enter wrdev, iclass 20, count 2 2006.229.17:46:07.91#ibcon#first serial, iclass 20, count 2 2006.229.17:46:07.91#ibcon#enter sib2, iclass 20, count 2 2006.229.17:46:07.91#ibcon#flushed, iclass 20, count 2 2006.229.17:46:07.91#ibcon#about to write, iclass 20, count 2 2006.229.17:46:07.91#ibcon#wrote, iclass 20, count 2 2006.229.17:46:07.91#ibcon#about to read 3, iclass 20, count 2 2006.229.17:46:07.93#ibcon#read 3, iclass 20, count 2 2006.229.17:46:07.93#ibcon#about to read 4, iclass 20, count 2 2006.229.17:46:07.93#ibcon#read 4, iclass 20, count 2 2006.229.17:46:07.93#ibcon#about to read 5, iclass 20, count 2 2006.229.17:46:07.93#ibcon#read 5, iclass 20, count 2 2006.229.17:46:07.93#ibcon#about to read 6, iclass 20, count 2 2006.229.17:46:07.93#ibcon#read 6, iclass 20, count 2 2006.229.17:46:07.93#ibcon#end of sib2, iclass 20, count 2 2006.229.17:46:07.93#ibcon#*mode == 0, iclass 20, count 2 2006.229.17:46:07.93#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.17:46:07.93#ibcon#[25=AT03-06\r\n] 2006.229.17:46:07.93#ibcon#*before write, iclass 20, count 2 2006.229.17:46:07.93#ibcon#enter sib2, iclass 20, count 2 2006.229.17:46:07.93#ibcon#flushed, iclass 20, count 2 2006.229.17:46:07.93#ibcon#about to write, iclass 20, count 2 2006.229.17:46:07.93#ibcon#wrote, iclass 20, count 2 2006.229.17:46:07.93#ibcon#about to read 3, iclass 20, count 2 2006.229.17:46:07.96#ibcon#read 3, iclass 20, count 2 2006.229.17:46:07.96#ibcon#about to read 4, iclass 20, count 2 2006.229.17:46:07.96#ibcon#read 4, iclass 20, count 2 2006.229.17:46:07.96#ibcon#about to read 5, iclass 20, count 2 2006.229.17:46:07.96#ibcon#read 5, iclass 20, count 2 2006.229.17:46:07.96#ibcon#about to read 6, iclass 20, count 2 2006.229.17:46:07.96#ibcon#read 6, iclass 20, count 2 2006.229.17:46:07.96#ibcon#end of sib2, iclass 20, count 2 2006.229.17:46:07.96#ibcon#*after write, iclass 20, count 2 2006.229.17:46:07.96#ibcon#*before return 0, iclass 20, count 2 2006.229.17:46:07.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:07.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:07.96#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.17:46:07.96#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:07.96#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:08.08#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:08.08#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:08.08#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:46:08.08#ibcon#first serial, iclass 20, count 0 2006.229.17:46:08.08#ibcon#enter sib2, iclass 20, count 0 2006.229.17:46:08.08#ibcon#flushed, iclass 20, count 0 2006.229.17:46:08.08#ibcon#about to write, iclass 20, count 0 2006.229.17:46:08.08#ibcon#wrote, iclass 20, count 0 2006.229.17:46:08.08#ibcon#about to read 3, iclass 20, count 0 2006.229.17:46:08.10#ibcon#read 3, iclass 20, count 0 2006.229.17:46:08.10#ibcon#about to read 4, iclass 20, count 0 2006.229.17:46:08.10#ibcon#read 4, iclass 20, count 0 2006.229.17:46:08.10#ibcon#about to read 5, iclass 20, count 0 2006.229.17:46:08.10#ibcon#read 5, iclass 20, count 0 2006.229.17:46:08.10#ibcon#about to read 6, iclass 20, count 0 2006.229.17:46:08.10#ibcon#read 6, iclass 20, count 0 2006.229.17:46:08.10#ibcon#end of sib2, iclass 20, count 0 2006.229.17:46:08.10#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:46:08.10#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:46:08.10#ibcon#[25=USB\r\n] 2006.229.17:46:08.10#ibcon#*before write, iclass 20, count 0 2006.229.17:46:08.10#ibcon#enter sib2, iclass 20, count 0 2006.229.17:46:08.10#ibcon#flushed, iclass 20, count 0 2006.229.17:46:08.10#ibcon#about to write, iclass 20, count 0 2006.229.17:46:08.10#ibcon#wrote, iclass 20, count 0 2006.229.17:46:08.10#ibcon#about to read 3, iclass 20, count 0 2006.229.17:46:08.13#ibcon#read 3, iclass 20, count 0 2006.229.17:46:08.13#ibcon#about to read 4, iclass 20, count 0 2006.229.17:46:08.13#ibcon#read 4, iclass 20, count 0 2006.229.17:46:08.13#ibcon#about to read 5, iclass 20, count 0 2006.229.17:46:08.13#ibcon#read 5, iclass 20, count 0 2006.229.17:46:08.13#ibcon#about to read 6, iclass 20, count 0 2006.229.17:46:08.13#ibcon#read 6, iclass 20, count 0 2006.229.17:46:08.13#ibcon#end of sib2, iclass 20, count 0 2006.229.17:46:08.13#ibcon#*after write, iclass 20, count 0 2006.229.17:46:08.13#ibcon#*before return 0, iclass 20, count 0 2006.229.17:46:08.13#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:08.13#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:08.13#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:46:08.13#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:46:08.13$vck44/valo=4,624.99 2006.229.17:46:08.13#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:46:08.13#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:46:08.13#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:08.13#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:08.13#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:08.13#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:08.13#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:46:08.13#ibcon#first serial, iclass 22, count 0 2006.229.17:46:08.13#ibcon#enter sib2, iclass 22, count 0 2006.229.17:46:08.13#ibcon#flushed, iclass 22, count 0 2006.229.17:46:08.13#ibcon#about to write, iclass 22, count 0 2006.229.17:46:08.13#ibcon#wrote, iclass 22, count 0 2006.229.17:46:08.13#ibcon#about to read 3, iclass 22, count 0 2006.229.17:46:08.15#ibcon#read 3, iclass 22, count 0 2006.229.17:46:08.15#ibcon#about to read 4, iclass 22, count 0 2006.229.17:46:08.15#ibcon#read 4, iclass 22, count 0 2006.229.17:46:08.15#ibcon#about to read 5, iclass 22, count 0 2006.229.17:46:08.15#ibcon#read 5, iclass 22, count 0 2006.229.17:46:08.15#ibcon#about to read 6, iclass 22, count 0 2006.229.17:46:08.15#ibcon#read 6, iclass 22, count 0 2006.229.17:46:08.15#ibcon#end of sib2, iclass 22, count 0 2006.229.17:46:08.15#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:46:08.15#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:46:08.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:46:08.15#ibcon#*before write, iclass 22, count 0 2006.229.17:46:08.15#ibcon#enter sib2, iclass 22, count 0 2006.229.17:46:08.15#ibcon#flushed, iclass 22, count 0 2006.229.17:46:08.15#ibcon#about to write, iclass 22, count 0 2006.229.17:46:08.15#ibcon#wrote, iclass 22, count 0 2006.229.17:46:08.15#ibcon#about to read 3, iclass 22, count 0 2006.229.17:46:08.19#ibcon#read 3, iclass 22, count 0 2006.229.17:46:08.19#ibcon#about to read 4, iclass 22, count 0 2006.229.17:46:08.19#ibcon#read 4, iclass 22, count 0 2006.229.17:46:08.19#ibcon#about to read 5, iclass 22, count 0 2006.229.17:46:08.19#ibcon#read 5, iclass 22, count 0 2006.229.17:46:08.19#ibcon#about to read 6, iclass 22, count 0 2006.229.17:46:08.19#ibcon#read 6, iclass 22, count 0 2006.229.17:46:08.19#ibcon#end of sib2, iclass 22, count 0 2006.229.17:46:08.19#ibcon#*after write, iclass 22, count 0 2006.229.17:46:08.19#ibcon#*before return 0, iclass 22, count 0 2006.229.17:46:08.19#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:08.19#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:08.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:46:08.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:46:08.19$vck44/va=4,7 2006.229.17:46:08.19#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.17:46:08.19#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.17:46:08.19#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:08.19#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:08.25#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:08.25#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:08.25#ibcon#enter wrdev, iclass 24, count 2 2006.229.17:46:08.25#ibcon#first serial, iclass 24, count 2 2006.229.17:46:08.25#ibcon#enter sib2, iclass 24, count 2 2006.229.17:46:08.25#ibcon#flushed, iclass 24, count 2 2006.229.17:46:08.25#ibcon#about to write, iclass 24, count 2 2006.229.17:46:08.25#ibcon#wrote, iclass 24, count 2 2006.229.17:46:08.25#ibcon#about to read 3, iclass 24, count 2 2006.229.17:46:08.27#ibcon#read 3, iclass 24, count 2 2006.229.17:46:08.27#ibcon#about to read 4, iclass 24, count 2 2006.229.17:46:08.27#ibcon#read 4, iclass 24, count 2 2006.229.17:46:08.27#ibcon#about to read 5, iclass 24, count 2 2006.229.17:46:08.27#ibcon#read 5, iclass 24, count 2 2006.229.17:46:08.27#ibcon#about to read 6, iclass 24, count 2 2006.229.17:46:08.27#ibcon#read 6, iclass 24, count 2 2006.229.17:46:08.27#ibcon#end of sib2, iclass 24, count 2 2006.229.17:46:08.27#ibcon#*mode == 0, iclass 24, count 2 2006.229.17:46:08.27#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.17:46:08.27#ibcon#[25=AT04-07\r\n] 2006.229.17:46:08.27#ibcon#*before write, iclass 24, count 2 2006.229.17:46:08.27#ibcon#enter sib2, iclass 24, count 2 2006.229.17:46:08.27#ibcon#flushed, iclass 24, count 2 2006.229.17:46:08.27#ibcon#about to write, iclass 24, count 2 2006.229.17:46:08.27#ibcon#wrote, iclass 24, count 2 2006.229.17:46:08.27#ibcon#about to read 3, iclass 24, count 2 2006.229.17:46:08.30#ibcon#read 3, iclass 24, count 2 2006.229.17:46:08.30#ibcon#about to read 4, iclass 24, count 2 2006.229.17:46:08.30#ibcon#read 4, iclass 24, count 2 2006.229.17:46:08.30#ibcon#about to read 5, iclass 24, count 2 2006.229.17:46:08.30#ibcon#read 5, iclass 24, count 2 2006.229.17:46:08.30#ibcon#about to read 6, iclass 24, count 2 2006.229.17:46:08.30#ibcon#read 6, iclass 24, count 2 2006.229.17:46:08.30#ibcon#end of sib2, iclass 24, count 2 2006.229.17:46:08.30#ibcon#*after write, iclass 24, count 2 2006.229.17:46:08.30#ibcon#*before return 0, iclass 24, count 2 2006.229.17:46:08.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:08.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:08.30#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.17:46:08.30#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:08.30#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:08.42#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:08.42#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:08.42#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:46:08.42#ibcon#first serial, iclass 24, count 0 2006.229.17:46:08.42#ibcon#enter sib2, iclass 24, count 0 2006.229.17:46:08.42#ibcon#flushed, iclass 24, count 0 2006.229.17:46:08.42#ibcon#about to write, iclass 24, count 0 2006.229.17:46:08.42#ibcon#wrote, iclass 24, count 0 2006.229.17:46:08.42#ibcon#about to read 3, iclass 24, count 0 2006.229.17:46:08.44#ibcon#read 3, iclass 24, count 0 2006.229.17:46:08.44#ibcon#about to read 4, iclass 24, count 0 2006.229.17:46:08.44#ibcon#read 4, iclass 24, count 0 2006.229.17:46:08.44#ibcon#about to read 5, iclass 24, count 0 2006.229.17:46:08.44#ibcon#read 5, iclass 24, count 0 2006.229.17:46:08.44#ibcon#about to read 6, iclass 24, count 0 2006.229.17:46:08.44#ibcon#read 6, iclass 24, count 0 2006.229.17:46:08.44#ibcon#end of sib2, iclass 24, count 0 2006.229.17:46:08.44#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:46:08.44#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:46:08.44#ibcon#[25=USB\r\n] 2006.229.17:46:08.44#ibcon#*before write, iclass 24, count 0 2006.229.17:46:08.44#ibcon#enter sib2, iclass 24, count 0 2006.229.17:46:08.44#ibcon#flushed, iclass 24, count 0 2006.229.17:46:08.44#ibcon#about to write, iclass 24, count 0 2006.229.17:46:08.44#ibcon#wrote, iclass 24, count 0 2006.229.17:46:08.44#ibcon#about to read 3, iclass 24, count 0 2006.229.17:46:08.47#ibcon#read 3, iclass 24, count 0 2006.229.17:46:08.47#ibcon#about to read 4, iclass 24, count 0 2006.229.17:46:08.47#ibcon#read 4, iclass 24, count 0 2006.229.17:46:08.47#ibcon#about to read 5, iclass 24, count 0 2006.229.17:46:08.47#ibcon#read 5, iclass 24, count 0 2006.229.17:46:08.47#ibcon#about to read 6, iclass 24, count 0 2006.229.17:46:08.47#ibcon#read 6, iclass 24, count 0 2006.229.17:46:08.47#ibcon#end of sib2, iclass 24, count 0 2006.229.17:46:08.47#ibcon#*after write, iclass 24, count 0 2006.229.17:46:08.47#ibcon#*before return 0, iclass 24, count 0 2006.229.17:46:08.47#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:08.47#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:08.47#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:46:08.47#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:46:08.47$vck44/valo=5,734.99 2006.229.17:46:08.47#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.17:46:08.47#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.17:46:08.47#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:08.47#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:08.47#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:08.47#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:08.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:46:08.47#ibcon#first serial, iclass 26, count 0 2006.229.17:46:08.47#ibcon#enter sib2, iclass 26, count 0 2006.229.17:46:08.47#ibcon#flushed, iclass 26, count 0 2006.229.17:46:08.47#ibcon#about to write, iclass 26, count 0 2006.229.17:46:08.47#ibcon#wrote, iclass 26, count 0 2006.229.17:46:08.47#ibcon#about to read 3, iclass 26, count 0 2006.229.17:46:08.49#ibcon#read 3, iclass 26, count 0 2006.229.17:46:08.49#ibcon#about to read 4, iclass 26, count 0 2006.229.17:46:08.49#ibcon#read 4, iclass 26, count 0 2006.229.17:46:08.49#ibcon#about to read 5, iclass 26, count 0 2006.229.17:46:08.49#ibcon#read 5, iclass 26, count 0 2006.229.17:46:08.49#ibcon#about to read 6, iclass 26, count 0 2006.229.17:46:08.49#ibcon#read 6, iclass 26, count 0 2006.229.17:46:08.49#ibcon#end of sib2, iclass 26, count 0 2006.229.17:46:08.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:46:08.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:46:08.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:46:08.49#ibcon#*before write, iclass 26, count 0 2006.229.17:46:08.49#ibcon#enter sib2, iclass 26, count 0 2006.229.17:46:08.49#ibcon#flushed, iclass 26, count 0 2006.229.17:46:08.49#ibcon#about to write, iclass 26, count 0 2006.229.17:46:08.49#ibcon#wrote, iclass 26, count 0 2006.229.17:46:08.49#ibcon#about to read 3, iclass 26, count 0 2006.229.17:46:08.53#ibcon#read 3, iclass 26, count 0 2006.229.17:46:08.53#ibcon#about to read 4, iclass 26, count 0 2006.229.17:46:08.53#ibcon#read 4, iclass 26, count 0 2006.229.17:46:08.53#ibcon#about to read 5, iclass 26, count 0 2006.229.17:46:08.53#ibcon#read 5, iclass 26, count 0 2006.229.17:46:08.53#ibcon#about to read 6, iclass 26, count 0 2006.229.17:46:08.53#ibcon#read 6, iclass 26, count 0 2006.229.17:46:08.53#ibcon#end of sib2, iclass 26, count 0 2006.229.17:46:08.53#ibcon#*after write, iclass 26, count 0 2006.229.17:46:08.53#ibcon#*before return 0, iclass 26, count 0 2006.229.17:46:08.53#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:08.53#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:08.53#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:46:08.53#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:46:08.53$vck44/va=5,4 2006.229.17:46:08.53#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.17:46:08.53#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.17:46:08.53#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:08.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:08.59#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:08.59#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:08.59#ibcon#enter wrdev, iclass 28, count 2 2006.229.17:46:08.59#ibcon#first serial, iclass 28, count 2 2006.229.17:46:08.59#ibcon#enter sib2, iclass 28, count 2 2006.229.17:46:08.59#ibcon#flushed, iclass 28, count 2 2006.229.17:46:08.59#ibcon#about to write, iclass 28, count 2 2006.229.17:46:08.59#ibcon#wrote, iclass 28, count 2 2006.229.17:46:08.59#ibcon#about to read 3, iclass 28, count 2 2006.229.17:46:08.61#ibcon#read 3, iclass 28, count 2 2006.229.17:46:08.61#ibcon#about to read 4, iclass 28, count 2 2006.229.17:46:08.61#ibcon#read 4, iclass 28, count 2 2006.229.17:46:08.61#ibcon#about to read 5, iclass 28, count 2 2006.229.17:46:08.61#ibcon#read 5, iclass 28, count 2 2006.229.17:46:08.61#ibcon#about to read 6, iclass 28, count 2 2006.229.17:46:08.61#ibcon#read 6, iclass 28, count 2 2006.229.17:46:08.61#ibcon#end of sib2, iclass 28, count 2 2006.229.17:46:08.61#ibcon#*mode == 0, iclass 28, count 2 2006.229.17:46:08.61#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.17:46:08.61#ibcon#[25=AT05-04\r\n] 2006.229.17:46:08.61#ibcon#*before write, iclass 28, count 2 2006.229.17:46:08.61#ibcon#enter sib2, iclass 28, count 2 2006.229.17:46:08.61#ibcon#flushed, iclass 28, count 2 2006.229.17:46:08.61#ibcon#about to write, iclass 28, count 2 2006.229.17:46:08.61#ibcon#wrote, iclass 28, count 2 2006.229.17:46:08.61#ibcon#about to read 3, iclass 28, count 2 2006.229.17:46:08.64#ibcon#read 3, iclass 28, count 2 2006.229.17:46:08.64#ibcon#about to read 4, iclass 28, count 2 2006.229.17:46:08.64#ibcon#read 4, iclass 28, count 2 2006.229.17:46:08.64#ibcon#about to read 5, iclass 28, count 2 2006.229.17:46:08.64#ibcon#read 5, iclass 28, count 2 2006.229.17:46:08.64#ibcon#about to read 6, iclass 28, count 2 2006.229.17:46:08.64#ibcon#read 6, iclass 28, count 2 2006.229.17:46:08.64#ibcon#end of sib2, iclass 28, count 2 2006.229.17:46:08.64#ibcon#*after write, iclass 28, count 2 2006.229.17:46:08.64#ibcon#*before return 0, iclass 28, count 2 2006.229.17:46:08.64#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:08.64#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:08.64#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.17:46:08.64#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:08.64#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:08.76#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:08.76#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:08.76#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:46:08.76#ibcon#first serial, iclass 28, count 0 2006.229.17:46:08.76#ibcon#enter sib2, iclass 28, count 0 2006.229.17:46:08.76#ibcon#flushed, iclass 28, count 0 2006.229.17:46:08.76#ibcon#about to write, iclass 28, count 0 2006.229.17:46:08.76#ibcon#wrote, iclass 28, count 0 2006.229.17:46:08.76#ibcon#about to read 3, iclass 28, count 0 2006.229.17:46:08.78#ibcon#read 3, iclass 28, count 0 2006.229.17:46:08.78#ibcon#about to read 4, iclass 28, count 0 2006.229.17:46:08.78#ibcon#read 4, iclass 28, count 0 2006.229.17:46:08.78#ibcon#about to read 5, iclass 28, count 0 2006.229.17:46:08.78#ibcon#read 5, iclass 28, count 0 2006.229.17:46:08.78#ibcon#about to read 6, iclass 28, count 0 2006.229.17:46:08.78#ibcon#read 6, iclass 28, count 0 2006.229.17:46:08.78#ibcon#end of sib2, iclass 28, count 0 2006.229.17:46:08.78#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:46:08.78#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:46:08.78#ibcon#[25=USB\r\n] 2006.229.17:46:08.78#ibcon#*before write, iclass 28, count 0 2006.229.17:46:08.78#ibcon#enter sib2, iclass 28, count 0 2006.229.17:46:08.78#ibcon#flushed, iclass 28, count 0 2006.229.17:46:08.78#ibcon#about to write, iclass 28, count 0 2006.229.17:46:08.78#ibcon#wrote, iclass 28, count 0 2006.229.17:46:08.78#ibcon#about to read 3, iclass 28, count 0 2006.229.17:46:08.81#ibcon#read 3, iclass 28, count 0 2006.229.17:46:08.81#ibcon#about to read 4, iclass 28, count 0 2006.229.17:46:08.81#ibcon#read 4, iclass 28, count 0 2006.229.17:46:08.81#ibcon#about to read 5, iclass 28, count 0 2006.229.17:46:08.81#ibcon#read 5, iclass 28, count 0 2006.229.17:46:08.81#ibcon#about to read 6, iclass 28, count 0 2006.229.17:46:08.81#ibcon#read 6, iclass 28, count 0 2006.229.17:46:08.81#ibcon#end of sib2, iclass 28, count 0 2006.229.17:46:08.81#ibcon#*after write, iclass 28, count 0 2006.229.17:46:08.81#ibcon#*before return 0, iclass 28, count 0 2006.229.17:46:08.81#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:08.81#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:08.81#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:46:08.81#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:46:08.81$vck44/valo=6,814.99 2006.229.17:46:08.81#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:46:08.81#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:46:08.81#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:08.81#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:08.81#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:08.81#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:08.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:46:08.81#ibcon#first serial, iclass 30, count 0 2006.229.17:46:08.81#ibcon#enter sib2, iclass 30, count 0 2006.229.17:46:08.81#ibcon#flushed, iclass 30, count 0 2006.229.17:46:08.81#ibcon#about to write, iclass 30, count 0 2006.229.17:46:08.81#ibcon#wrote, iclass 30, count 0 2006.229.17:46:08.81#ibcon#about to read 3, iclass 30, count 0 2006.229.17:46:08.83#ibcon#read 3, iclass 30, count 0 2006.229.17:46:08.83#ibcon#about to read 4, iclass 30, count 0 2006.229.17:46:08.83#ibcon#read 4, iclass 30, count 0 2006.229.17:46:08.83#ibcon#about to read 5, iclass 30, count 0 2006.229.17:46:08.83#ibcon#read 5, iclass 30, count 0 2006.229.17:46:08.83#ibcon#about to read 6, iclass 30, count 0 2006.229.17:46:08.83#ibcon#read 6, iclass 30, count 0 2006.229.17:46:08.83#ibcon#end of sib2, iclass 30, count 0 2006.229.17:46:08.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:46:08.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:46:08.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:46:08.83#ibcon#*before write, iclass 30, count 0 2006.229.17:46:08.83#ibcon#enter sib2, iclass 30, count 0 2006.229.17:46:08.83#ibcon#flushed, iclass 30, count 0 2006.229.17:46:08.83#ibcon#about to write, iclass 30, count 0 2006.229.17:46:08.83#ibcon#wrote, iclass 30, count 0 2006.229.17:46:08.83#ibcon#about to read 3, iclass 30, count 0 2006.229.17:46:08.87#ibcon#read 3, iclass 30, count 0 2006.229.17:46:08.87#ibcon#about to read 4, iclass 30, count 0 2006.229.17:46:08.87#ibcon#read 4, iclass 30, count 0 2006.229.17:46:08.87#ibcon#about to read 5, iclass 30, count 0 2006.229.17:46:08.87#ibcon#read 5, iclass 30, count 0 2006.229.17:46:08.87#ibcon#about to read 6, iclass 30, count 0 2006.229.17:46:08.87#ibcon#read 6, iclass 30, count 0 2006.229.17:46:08.87#ibcon#end of sib2, iclass 30, count 0 2006.229.17:46:08.87#ibcon#*after write, iclass 30, count 0 2006.229.17:46:08.87#ibcon#*before return 0, iclass 30, count 0 2006.229.17:46:08.87#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:08.87#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:08.87#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:46:08.87#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:46:08.87$vck44/va=6,4 2006.229.17:46:08.87#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.17:46:08.87#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.17:46:08.87#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:08.87#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:08.93#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:08.93#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:08.93#ibcon#enter wrdev, iclass 32, count 2 2006.229.17:46:08.93#ibcon#first serial, iclass 32, count 2 2006.229.17:46:08.93#ibcon#enter sib2, iclass 32, count 2 2006.229.17:46:08.93#ibcon#flushed, iclass 32, count 2 2006.229.17:46:08.93#ibcon#about to write, iclass 32, count 2 2006.229.17:46:08.93#ibcon#wrote, iclass 32, count 2 2006.229.17:46:08.93#ibcon#about to read 3, iclass 32, count 2 2006.229.17:46:08.95#ibcon#read 3, iclass 32, count 2 2006.229.17:46:08.95#ibcon#about to read 4, iclass 32, count 2 2006.229.17:46:08.95#ibcon#read 4, iclass 32, count 2 2006.229.17:46:08.95#ibcon#about to read 5, iclass 32, count 2 2006.229.17:46:08.95#ibcon#read 5, iclass 32, count 2 2006.229.17:46:08.95#ibcon#about to read 6, iclass 32, count 2 2006.229.17:46:08.95#ibcon#read 6, iclass 32, count 2 2006.229.17:46:08.95#ibcon#end of sib2, iclass 32, count 2 2006.229.17:46:08.95#ibcon#*mode == 0, iclass 32, count 2 2006.229.17:46:08.95#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.17:46:08.95#ibcon#[25=AT06-04\r\n] 2006.229.17:46:08.95#ibcon#*before write, iclass 32, count 2 2006.229.17:46:08.95#ibcon#enter sib2, iclass 32, count 2 2006.229.17:46:08.95#ibcon#flushed, iclass 32, count 2 2006.229.17:46:08.95#ibcon#about to write, iclass 32, count 2 2006.229.17:46:08.95#ibcon#wrote, iclass 32, count 2 2006.229.17:46:08.95#ibcon#about to read 3, iclass 32, count 2 2006.229.17:46:08.98#ibcon#read 3, iclass 32, count 2 2006.229.17:46:08.98#ibcon#about to read 4, iclass 32, count 2 2006.229.17:46:08.98#ibcon#read 4, iclass 32, count 2 2006.229.17:46:08.98#ibcon#about to read 5, iclass 32, count 2 2006.229.17:46:08.98#ibcon#read 5, iclass 32, count 2 2006.229.17:46:08.98#ibcon#about to read 6, iclass 32, count 2 2006.229.17:46:08.98#ibcon#read 6, iclass 32, count 2 2006.229.17:46:08.98#ibcon#end of sib2, iclass 32, count 2 2006.229.17:46:08.98#ibcon#*after write, iclass 32, count 2 2006.229.17:46:08.98#ibcon#*before return 0, iclass 32, count 2 2006.229.17:46:08.98#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:08.98#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:08.98#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.17:46:08.98#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:08.98#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:09.10#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:09.10#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:09.10#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:46:09.10#ibcon#first serial, iclass 32, count 0 2006.229.17:46:09.10#ibcon#enter sib2, iclass 32, count 0 2006.229.17:46:09.10#ibcon#flushed, iclass 32, count 0 2006.229.17:46:09.10#ibcon#about to write, iclass 32, count 0 2006.229.17:46:09.10#ibcon#wrote, iclass 32, count 0 2006.229.17:46:09.10#ibcon#about to read 3, iclass 32, count 0 2006.229.17:46:09.12#ibcon#read 3, iclass 32, count 0 2006.229.17:46:09.12#ibcon#about to read 4, iclass 32, count 0 2006.229.17:46:09.12#ibcon#read 4, iclass 32, count 0 2006.229.17:46:09.12#ibcon#about to read 5, iclass 32, count 0 2006.229.17:46:09.12#ibcon#read 5, iclass 32, count 0 2006.229.17:46:09.12#ibcon#about to read 6, iclass 32, count 0 2006.229.17:46:09.12#ibcon#read 6, iclass 32, count 0 2006.229.17:46:09.12#ibcon#end of sib2, iclass 32, count 0 2006.229.17:46:09.12#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:46:09.12#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:46:09.12#ibcon#[25=USB\r\n] 2006.229.17:46:09.12#ibcon#*before write, iclass 32, count 0 2006.229.17:46:09.12#ibcon#enter sib2, iclass 32, count 0 2006.229.17:46:09.12#ibcon#flushed, iclass 32, count 0 2006.229.17:46:09.12#ibcon#about to write, iclass 32, count 0 2006.229.17:46:09.12#ibcon#wrote, iclass 32, count 0 2006.229.17:46:09.12#ibcon#about to read 3, iclass 32, count 0 2006.229.17:46:09.15#ibcon#read 3, iclass 32, count 0 2006.229.17:46:09.15#ibcon#about to read 4, iclass 32, count 0 2006.229.17:46:09.15#ibcon#read 4, iclass 32, count 0 2006.229.17:46:09.15#ibcon#about to read 5, iclass 32, count 0 2006.229.17:46:09.15#ibcon#read 5, iclass 32, count 0 2006.229.17:46:09.15#ibcon#about to read 6, iclass 32, count 0 2006.229.17:46:09.15#ibcon#read 6, iclass 32, count 0 2006.229.17:46:09.15#ibcon#end of sib2, iclass 32, count 0 2006.229.17:46:09.15#ibcon#*after write, iclass 32, count 0 2006.229.17:46:09.15#ibcon#*before return 0, iclass 32, count 0 2006.229.17:46:09.15#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:09.15#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:09.15#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:46:09.15#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:46:09.15$vck44/valo=7,864.99 2006.229.17:46:09.15#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.17:46:09.15#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.17:46:09.15#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:09.15#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:09.15#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:09.15#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:09.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:46:09.15#ibcon#first serial, iclass 34, count 0 2006.229.17:46:09.15#ibcon#enter sib2, iclass 34, count 0 2006.229.17:46:09.15#ibcon#flushed, iclass 34, count 0 2006.229.17:46:09.15#ibcon#about to write, iclass 34, count 0 2006.229.17:46:09.15#ibcon#wrote, iclass 34, count 0 2006.229.17:46:09.15#ibcon#about to read 3, iclass 34, count 0 2006.229.17:46:09.17#ibcon#read 3, iclass 34, count 0 2006.229.17:46:09.17#ibcon#about to read 4, iclass 34, count 0 2006.229.17:46:09.17#ibcon#read 4, iclass 34, count 0 2006.229.17:46:09.17#ibcon#about to read 5, iclass 34, count 0 2006.229.17:46:09.17#ibcon#read 5, iclass 34, count 0 2006.229.17:46:09.17#ibcon#about to read 6, iclass 34, count 0 2006.229.17:46:09.17#ibcon#read 6, iclass 34, count 0 2006.229.17:46:09.17#ibcon#end of sib2, iclass 34, count 0 2006.229.17:46:09.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:46:09.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:46:09.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:46:09.17#ibcon#*before write, iclass 34, count 0 2006.229.17:46:09.17#ibcon#enter sib2, iclass 34, count 0 2006.229.17:46:09.17#ibcon#flushed, iclass 34, count 0 2006.229.17:46:09.17#ibcon#about to write, iclass 34, count 0 2006.229.17:46:09.17#ibcon#wrote, iclass 34, count 0 2006.229.17:46:09.17#ibcon#about to read 3, iclass 34, count 0 2006.229.17:46:09.21#ibcon#read 3, iclass 34, count 0 2006.229.17:46:09.21#ibcon#about to read 4, iclass 34, count 0 2006.229.17:46:09.21#ibcon#read 4, iclass 34, count 0 2006.229.17:46:09.21#ibcon#about to read 5, iclass 34, count 0 2006.229.17:46:09.21#ibcon#read 5, iclass 34, count 0 2006.229.17:46:09.21#ibcon#about to read 6, iclass 34, count 0 2006.229.17:46:09.21#ibcon#read 6, iclass 34, count 0 2006.229.17:46:09.21#ibcon#end of sib2, iclass 34, count 0 2006.229.17:46:09.21#ibcon#*after write, iclass 34, count 0 2006.229.17:46:09.21#ibcon#*before return 0, iclass 34, count 0 2006.229.17:46:09.21#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:09.21#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:09.21#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:46:09.21#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:46:09.21$vck44/va=7,5 2006.229.17:46:09.21#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.17:46:09.21#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.17:46:09.21#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:09.21#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:09.27#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:09.27#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:09.27#ibcon#enter wrdev, iclass 36, count 2 2006.229.17:46:09.27#ibcon#first serial, iclass 36, count 2 2006.229.17:46:09.27#ibcon#enter sib2, iclass 36, count 2 2006.229.17:46:09.27#ibcon#flushed, iclass 36, count 2 2006.229.17:46:09.27#ibcon#about to write, iclass 36, count 2 2006.229.17:46:09.27#ibcon#wrote, iclass 36, count 2 2006.229.17:46:09.27#ibcon#about to read 3, iclass 36, count 2 2006.229.17:46:09.29#ibcon#read 3, iclass 36, count 2 2006.229.17:46:09.29#ibcon#about to read 4, iclass 36, count 2 2006.229.17:46:09.29#ibcon#read 4, iclass 36, count 2 2006.229.17:46:09.29#ibcon#about to read 5, iclass 36, count 2 2006.229.17:46:09.29#ibcon#read 5, iclass 36, count 2 2006.229.17:46:09.29#ibcon#about to read 6, iclass 36, count 2 2006.229.17:46:09.29#ibcon#read 6, iclass 36, count 2 2006.229.17:46:09.29#ibcon#end of sib2, iclass 36, count 2 2006.229.17:46:09.29#ibcon#*mode == 0, iclass 36, count 2 2006.229.17:46:09.29#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.17:46:09.29#ibcon#[25=AT07-05\r\n] 2006.229.17:46:09.29#ibcon#*before write, iclass 36, count 2 2006.229.17:46:09.29#ibcon#enter sib2, iclass 36, count 2 2006.229.17:46:09.29#ibcon#flushed, iclass 36, count 2 2006.229.17:46:09.29#ibcon#about to write, iclass 36, count 2 2006.229.17:46:09.29#ibcon#wrote, iclass 36, count 2 2006.229.17:46:09.29#ibcon#about to read 3, iclass 36, count 2 2006.229.17:46:09.32#ibcon#read 3, iclass 36, count 2 2006.229.17:46:09.32#ibcon#about to read 4, iclass 36, count 2 2006.229.17:46:09.32#ibcon#read 4, iclass 36, count 2 2006.229.17:46:09.32#ibcon#about to read 5, iclass 36, count 2 2006.229.17:46:09.32#ibcon#read 5, iclass 36, count 2 2006.229.17:46:09.32#ibcon#about to read 6, iclass 36, count 2 2006.229.17:46:09.32#ibcon#read 6, iclass 36, count 2 2006.229.17:46:09.32#ibcon#end of sib2, iclass 36, count 2 2006.229.17:46:09.32#ibcon#*after write, iclass 36, count 2 2006.229.17:46:09.32#ibcon#*before return 0, iclass 36, count 2 2006.229.17:46:09.32#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:09.32#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:09.32#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.17:46:09.32#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:09.32#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:09.44#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:09.44#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:09.44#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:46:09.44#ibcon#first serial, iclass 36, count 0 2006.229.17:46:09.44#ibcon#enter sib2, iclass 36, count 0 2006.229.17:46:09.44#ibcon#flushed, iclass 36, count 0 2006.229.17:46:09.44#ibcon#about to write, iclass 36, count 0 2006.229.17:46:09.44#ibcon#wrote, iclass 36, count 0 2006.229.17:46:09.44#ibcon#about to read 3, iclass 36, count 0 2006.229.17:46:09.46#ibcon#read 3, iclass 36, count 0 2006.229.17:46:09.46#ibcon#about to read 4, iclass 36, count 0 2006.229.17:46:09.46#ibcon#read 4, iclass 36, count 0 2006.229.17:46:09.46#ibcon#about to read 5, iclass 36, count 0 2006.229.17:46:09.46#ibcon#read 5, iclass 36, count 0 2006.229.17:46:09.46#ibcon#about to read 6, iclass 36, count 0 2006.229.17:46:09.46#ibcon#read 6, iclass 36, count 0 2006.229.17:46:09.46#ibcon#end of sib2, iclass 36, count 0 2006.229.17:46:09.46#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:46:09.46#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:46:09.46#ibcon#[25=USB\r\n] 2006.229.17:46:09.46#ibcon#*before write, iclass 36, count 0 2006.229.17:46:09.46#ibcon#enter sib2, iclass 36, count 0 2006.229.17:46:09.46#ibcon#flushed, iclass 36, count 0 2006.229.17:46:09.46#ibcon#about to write, iclass 36, count 0 2006.229.17:46:09.46#ibcon#wrote, iclass 36, count 0 2006.229.17:46:09.46#ibcon#about to read 3, iclass 36, count 0 2006.229.17:46:09.49#ibcon#read 3, iclass 36, count 0 2006.229.17:46:09.49#ibcon#about to read 4, iclass 36, count 0 2006.229.17:46:09.49#ibcon#read 4, iclass 36, count 0 2006.229.17:46:09.49#ibcon#about to read 5, iclass 36, count 0 2006.229.17:46:09.49#ibcon#read 5, iclass 36, count 0 2006.229.17:46:09.49#ibcon#about to read 6, iclass 36, count 0 2006.229.17:46:09.49#ibcon#read 6, iclass 36, count 0 2006.229.17:46:09.49#ibcon#end of sib2, iclass 36, count 0 2006.229.17:46:09.49#ibcon#*after write, iclass 36, count 0 2006.229.17:46:09.49#ibcon#*before return 0, iclass 36, count 0 2006.229.17:46:09.49#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:09.49#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:09.49#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:46:09.49#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:46:09.49$vck44/valo=8,884.99 2006.229.17:46:09.49#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.17:46:09.49#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.17:46:09.49#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:09.49#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:09.49#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:09.49#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:09.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:46:09.49#ibcon#first serial, iclass 38, count 0 2006.229.17:46:09.49#ibcon#enter sib2, iclass 38, count 0 2006.229.17:46:09.49#ibcon#flushed, iclass 38, count 0 2006.229.17:46:09.49#ibcon#about to write, iclass 38, count 0 2006.229.17:46:09.49#ibcon#wrote, iclass 38, count 0 2006.229.17:46:09.49#ibcon#about to read 3, iclass 38, count 0 2006.229.17:46:09.51#ibcon#read 3, iclass 38, count 0 2006.229.17:46:09.51#ibcon#about to read 4, iclass 38, count 0 2006.229.17:46:09.51#ibcon#read 4, iclass 38, count 0 2006.229.17:46:09.51#ibcon#about to read 5, iclass 38, count 0 2006.229.17:46:09.51#ibcon#read 5, iclass 38, count 0 2006.229.17:46:09.51#ibcon#about to read 6, iclass 38, count 0 2006.229.17:46:09.51#ibcon#read 6, iclass 38, count 0 2006.229.17:46:09.51#ibcon#end of sib2, iclass 38, count 0 2006.229.17:46:09.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:46:09.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:46:09.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:46:09.51#ibcon#*before write, iclass 38, count 0 2006.229.17:46:09.51#ibcon#enter sib2, iclass 38, count 0 2006.229.17:46:09.51#ibcon#flushed, iclass 38, count 0 2006.229.17:46:09.51#ibcon#about to write, iclass 38, count 0 2006.229.17:46:09.51#ibcon#wrote, iclass 38, count 0 2006.229.17:46:09.51#ibcon#about to read 3, iclass 38, count 0 2006.229.17:46:09.55#ibcon#read 3, iclass 38, count 0 2006.229.17:46:09.55#ibcon#about to read 4, iclass 38, count 0 2006.229.17:46:09.55#ibcon#read 4, iclass 38, count 0 2006.229.17:46:09.55#ibcon#about to read 5, iclass 38, count 0 2006.229.17:46:09.55#ibcon#read 5, iclass 38, count 0 2006.229.17:46:09.55#ibcon#about to read 6, iclass 38, count 0 2006.229.17:46:09.55#ibcon#read 6, iclass 38, count 0 2006.229.17:46:09.55#ibcon#end of sib2, iclass 38, count 0 2006.229.17:46:09.55#ibcon#*after write, iclass 38, count 0 2006.229.17:46:09.55#ibcon#*before return 0, iclass 38, count 0 2006.229.17:46:09.55#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:09.55#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:09.55#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:46:09.55#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:46:09.55$vck44/va=8,6 2006.229.17:46:09.55#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.17:46:09.55#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.17:46:09.55#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:09.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:46:09.61#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:46:09.61#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:46:09.61#ibcon#enter wrdev, iclass 40, count 2 2006.229.17:46:09.61#ibcon#first serial, iclass 40, count 2 2006.229.17:46:09.61#ibcon#enter sib2, iclass 40, count 2 2006.229.17:46:09.61#ibcon#flushed, iclass 40, count 2 2006.229.17:46:09.61#ibcon#about to write, iclass 40, count 2 2006.229.17:46:09.61#ibcon#wrote, iclass 40, count 2 2006.229.17:46:09.61#ibcon#about to read 3, iclass 40, count 2 2006.229.17:46:09.63#ibcon#read 3, iclass 40, count 2 2006.229.17:46:09.63#ibcon#about to read 4, iclass 40, count 2 2006.229.17:46:09.63#ibcon#read 4, iclass 40, count 2 2006.229.17:46:09.63#ibcon#about to read 5, iclass 40, count 2 2006.229.17:46:09.63#ibcon#read 5, iclass 40, count 2 2006.229.17:46:09.63#ibcon#about to read 6, iclass 40, count 2 2006.229.17:46:09.63#ibcon#read 6, iclass 40, count 2 2006.229.17:46:09.63#ibcon#end of sib2, iclass 40, count 2 2006.229.17:46:09.63#ibcon#*mode == 0, iclass 40, count 2 2006.229.17:46:09.63#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.17:46:09.63#ibcon#[25=AT08-06\r\n] 2006.229.17:46:09.63#ibcon#*before write, iclass 40, count 2 2006.229.17:46:09.63#ibcon#enter sib2, iclass 40, count 2 2006.229.17:46:09.63#ibcon#flushed, iclass 40, count 2 2006.229.17:46:09.63#ibcon#about to write, iclass 40, count 2 2006.229.17:46:09.63#ibcon#wrote, iclass 40, count 2 2006.229.17:46:09.63#ibcon#about to read 3, iclass 40, count 2 2006.229.17:46:09.66#ibcon#read 3, iclass 40, count 2 2006.229.17:46:09.66#ibcon#about to read 4, iclass 40, count 2 2006.229.17:46:09.66#ibcon#read 4, iclass 40, count 2 2006.229.17:46:09.66#ibcon#about to read 5, iclass 40, count 2 2006.229.17:46:09.66#ibcon#read 5, iclass 40, count 2 2006.229.17:46:09.66#ibcon#about to read 6, iclass 40, count 2 2006.229.17:46:09.66#ibcon#read 6, iclass 40, count 2 2006.229.17:46:09.66#ibcon#end of sib2, iclass 40, count 2 2006.229.17:46:09.66#ibcon#*after write, iclass 40, count 2 2006.229.17:46:09.66#ibcon#*before return 0, iclass 40, count 2 2006.229.17:46:09.66#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:46:09.66#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.17:46:09.66#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.17:46:09.66#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:09.66#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:46:09.78#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:46:09.78#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:46:09.78#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:46:09.78#ibcon#first serial, iclass 40, count 0 2006.229.17:46:09.78#ibcon#enter sib2, iclass 40, count 0 2006.229.17:46:09.78#ibcon#flushed, iclass 40, count 0 2006.229.17:46:09.78#ibcon#about to write, iclass 40, count 0 2006.229.17:46:09.78#ibcon#wrote, iclass 40, count 0 2006.229.17:46:09.78#ibcon#about to read 3, iclass 40, count 0 2006.229.17:46:09.80#ibcon#read 3, iclass 40, count 0 2006.229.17:46:09.80#ibcon#about to read 4, iclass 40, count 0 2006.229.17:46:09.80#ibcon#read 4, iclass 40, count 0 2006.229.17:46:09.80#ibcon#about to read 5, iclass 40, count 0 2006.229.17:46:09.80#ibcon#read 5, iclass 40, count 0 2006.229.17:46:09.80#ibcon#about to read 6, iclass 40, count 0 2006.229.17:46:09.80#ibcon#read 6, iclass 40, count 0 2006.229.17:46:09.80#ibcon#end of sib2, iclass 40, count 0 2006.229.17:46:09.80#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:46:09.80#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:46:09.80#ibcon#[25=USB\r\n] 2006.229.17:46:09.80#ibcon#*before write, iclass 40, count 0 2006.229.17:46:09.80#ibcon#enter sib2, iclass 40, count 0 2006.229.17:46:09.80#ibcon#flushed, iclass 40, count 0 2006.229.17:46:09.80#ibcon#about to write, iclass 40, count 0 2006.229.17:46:09.80#ibcon#wrote, iclass 40, count 0 2006.229.17:46:09.80#ibcon#about to read 3, iclass 40, count 0 2006.229.17:46:09.83#ibcon#read 3, iclass 40, count 0 2006.229.17:46:09.83#ibcon#about to read 4, iclass 40, count 0 2006.229.17:46:09.83#ibcon#read 4, iclass 40, count 0 2006.229.17:46:09.83#ibcon#about to read 5, iclass 40, count 0 2006.229.17:46:09.83#ibcon#read 5, iclass 40, count 0 2006.229.17:46:09.83#ibcon#about to read 6, iclass 40, count 0 2006.229.17:46:09.83#ibcon#read 6, iclass 40, count 0 2006.229.17:46:09.83#ibcon#end of sib2, iclass 40, count 0 2006.229.17:46:09.83#ibcon#*after write, iclass 40, count 0 2006.229.17:46:09.83#ibcon#*before return 0, iclass 40, count 0 2006.229.17:46:09.83#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:46:09.83#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.17:46:09.83#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:46:09.83#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:46:09.83$vck44/vblo=1,629.99 2006.229.17:46:09.83#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.17:46:09.83#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.17:46:09.83#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:09.83#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:46:09.83#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:46:09.83#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:46:09.83#ibcon#enter wrdev, iclass 4, count 0 2006.229.17:46:09.83#ibcon#first serial, iclass 4, count 0 2006.229.17:46:09.83#ibcon#enter sib2, iclass 4, count 0 2006.229.17:46:09.83#ibcon#flushed, iclass 4, count 0 2006.229.17:46:09.83#ibcon#about to write, iclass 4, count 0 2006.229.17:46:09.83#ibcon#wrote, iclass 4, count 0 2006.229.17:46:09.83#ibcon#about to read 3, iclass 4, count 0 2006.229.17:46:09.85#ibcon#read 3, iclass 4, count 0 2006.229.17:46:09.85#ibcon#about to read 4, iclass 4, count 0 2006.229.17:46:09.85#ibcon#read 4, iclass 4, count 0 2006.229.17:46:09.85#ibcon#about to read 5, iclass 4, count 0 2006.229.17:46:09.85#ibcon#read 5, iclass 4, count 0 2006.229.17:46:09.85#ibcon#about to read 6, iclass 4, count 0 2006.229.17:46:09.85#ibcon#read 6, iclass 4, count 0 2006.229.17:46:09.85#ibcon#end of sib2, iclass 4, count 0 2006.229.17:46:09.85#ibcon#*mode == 0, iclass 4, count 0 2006.229.17:46:09.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.17:46:09.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:46:09.85#ibcon#*before write, iclass 4, count 0 2006.229.17:46:09.85#ibcon#enter sib2, iclass 4, count 0 2006.229.17:46:09.85#ibcon#flushed, iclass 4, count 0 2006.229.17:46:09.85#ibcon#about to write, iclass 4, count 0 2006.229.17:46:09.85#ibcon#wrote, iclass 4, count 0 2006.229.17:46:09.85#ibcon#about to read 3, iclass 4, count 0 2006.229.17:46:09.89#ibcon#read 3, iclass 4, count 0 2006.229.17:46:09.89#ibcon#about to read 4, iclass 4, count 0 2006.229.17:46:09.89#ibcon#read 4, iclass 4, count 0 2006.229.17:46:09.89#ibcon#about to read 5, iclass 4, count 0 2006.229.17:46:09.89#ibcon#read 5, iclass 4, count 0 2006.229.17:46:09.89#ibcon#about to read 6, iclass 4, count 0 2006.229.17:46:09.89#ibcon#read 6, iclass 4, count 0 2006.229.17:46:09.89#ibcon#end of sib2, iclass 4, count 0 2006.229.17:46:09.89#ibcon#*after write, iclass 4, count 0 2006.229.17:46:09.89#ibcon#*before return 0, iclass 4, count 0 2006.229.17:46:09.89#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:46:09.89#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.17:46:09.89#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.17:46:09.89#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.17:46:09.89$vck44/vb=1,4 2006.229.17:46:09.89#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.17:46:09.89#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.17:46:09.89#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:09.89#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:46:09.89#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:46:09.89#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:46:09.89#ibcon#enter wrdev, iclass 6, count 2 2006.229.17:46:09.89#ibcon#first serial, iclass 6, count 2 2006.229.17:46:09.89#ibcon#enter sib2, iclass 6, count 2 2006.229.17:46:09.89#ibcon#flushed, iclass 6, count 2 2006.229.17:46:09.89#ibcon#about to write, iclass 6, count 2 2006.229.17:46:09.89#ibcon#wrote, iclass 6, count 2 2006.229.17:46:09.89#ibcon#about to read 3, iclass 6, count 2 2006.229.17:46:09.91#ibcon#read 3, iclass 6, count 2 2006.229.17:46:09.91#ibcon#about to read 4, iclass 6, count 2 2006.229.17:46:09.91#ibcon#read 4, iclass 6, count 2 2006.229.17:46:09.91#ibcon#about to read 5, iclass 6, count 2 2006.229.17:46:09.91#ibcon#read 5, iclass 6, count 2 2006.229.17:46:09.91#ibcon#about to read 6, iclass 6, count 2 2006.229.17:46:09.91#ibcon#read 6, iclass 6, count 2 2006.229.17:46:09.91#ibcon#end of sib2, iclass 6, count 2 2006.229.17:46:09.91#ibcon#*mode == 0, iclass 6, count 2 2006.229.17:46:09.91#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.17:46:09.91#ibcon#[27=AT01-04\r\n] 2006.229.17:46:09.91#ibcon#*before write, iclass 6, count 2 2006.229.17:46:09.91#ibcon#enter sib2, iclass 6, count 2 2006.229.17:46:09.91#ibcon#flushed, iclass 6, count 2 2006.229.17:46:09.91#ibcon#about to write, iclass 6, count 2 2006.229.17:46:09.91#ibcon#wrote, iclass 6, count 2 2006.229.17:46:09.91#ibcon#about to read 3, iclass 6, count 2 2006.229.17:46:09.94#ibcon#read 3, iclass 6, count 2 2006.229.17:46:09.94#ibcon#about to read 4, iclass 6, count 2 2006.229.17:46:09.94#ibcon#read 4, iclass 6, count 2 2006.229.17:46:09.94#ibcon#about to read 5, iclass 6, count 2 2006.229.17:46:09.94#ibcon#read 5, iclass 6, count 2 2006.229.17:46:09.94#ibcon#about to read 6, iclass 6, count 2 2006.229.17:46:09.94#ibcon#read 6, iclass 6, count 2 2006.229.17:46:09.94#ibcon#end of sib2, iclass 6, count 2 2006.229.17:46:09.94#ibcon#*after write, iclass 6, count 2 2006.229.17:46:09.94#ibcon#*before return 0, iclass 6, count 2 2006.229.17:46:09.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:46:09.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.17:46:09.94#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.17:46:09.94#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:09.94#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:46:10.06#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:46:10.06#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:46:10.06#ibcon#enter wrdev, iclass 6, count 0 2006.229.17:46:10.06#ibcon#first serial, iclass 6, count 0 2006.229.17:46:10.06#ibcon#enter sib2, iclass 6, count 0 2006.229.17:46:10.06#ibcon#flushed, iclass 6, count 0 2006.229.17:46:10.06#ibcon#about to write, iclass 6, count 0 2006.229.17:46:10.06#ibcon#wrote, iclass 6, count 0 2006.229.17:46:10.06#ibcon#about to read 3, iclass 6, count 0 2006.229.17:46:10.08#ibcon#read 3, iclass 6, count 0 2006.229.17:46:10.08#ibcon#about to read 4, iclass 6, count 0 2006.229.17:46:10.08#ibcon#read 4, iclass 6, count 0 2006.229.17:46:10.08#ibcon#about to read 5, iclass 6, count 0 2006.229.17:46:10.08#ibcon#read 5, iclass 6, count 0 2006.229.17:46:10.08#ibcon#about to read 6, iclass 6, count 0 2006.229.17:46:10.08#ibcon#read 6, iclass 6, count 0 2006.229.17:46:10.08#ibcon#end of sib2, iclass 6, count 0 2006.229.17:46:10.08#ibcon#*mode == 0, iclass 6, count 0 2006.229.17:46:10.08#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.17:46:10.08#ibcon#[27=USB\r\n] 2006.229.17:46:10.08#ibcon#*before write, iclass 6, count 0 2006.229.17:46:10.08#ibcon#enter sib2, iclass 6, count 0 2006.229.17:46:10.08#ibcon#flushed, iclass 6, count 0 2006.229.17:46:10.08#ibcon#about to write, iclass 6, count 0 2006.229.17:46:10.08#ibcon#wrote, iclass 6, count 0 2006.229.17:46:10.08#ibcon#about to read 3, iclass 6, count 0 2006.229.17:46:10.11#ibcon#read 3, iclass 6, count 0 2006.229.17:46:10.11#ibcon#about to read 4, iclass 6, count 0 2006.229.17:46:10.11#ibcon#read 4, iclass 6, count 0 2006.229.17:46:10.11#ibcon#about to read 5, iclass 6, count 0 2006.229.17:46:10.11#ibcon#read 5, iclass 6, count 0 2006.229.17:46:10.11#ibcon#about to read 6, iclass 6, count 0 2006.229.17:46:10.11#ibcon#read 6, iclass 6, count 0 2006.229.17:46:10.11#ibcon#end of sib2, iclass 6, count 0 2006.229.17:46:10.11#ibcon#*after write, iclass 6, count 0 2006.229.17:46:10.11#ibcon#*before return 0, iclass 6, count 0 2006.229.17:46:10.11#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:46:10.11#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.17:46:10.11#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.17:46:10.11#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.17:46:10.11$vck44/vblo=2,634.99 2006.229.17:46:10.11#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.17:46:10.11#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.17:46:10.11#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:10.11#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:10.11#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:10.11#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:10.11#ibcon#enter wrdev, iclass 10, count 0 2006.229.17:46:10.11#ibcon#first serial, iclass 10, count 0 2006.229.17:46:10.11#ibcon#enter sib2, iclass 10, count 0 2006.229.17:46:10.11#ibcon#flushed, iclass 10, count 0 2006.229.17:46:10.11#ibcon#about to write, iclass 10, count 0 2006.229.17:46:10.11#ibcon#wrote, iclass 10, count 0 2006.229.17:46:10.11#ibcon#about to read 3, iclass 10, count 0 2006.229.17:46:10.13#ibcon#read 3, iclass 10, count 0 2006.229.17:46:10.13#ibcon#about to read 4, iclass 10, count 0 2006.229.17:46:10.13#ibcon#read 4, iclass 10, count 0 2006.229.17:46:10.13#ibcon#about to read 5, iclass 10, count 0 2006.229.17:46:10.13#ibcon#read 5, iclass 10, count 0 2006.229.17:46:10.13#ibcon#about to read 6, iclass 10, count 0 2006.229.17:46:10.13#ibcon#read 6, iclass 10, count 0 2006.229.17:46:10.13#ibcon#end of sib2, iclass 10, count 0 2006.229.17:46:10.13#ibcon#*mode == 0, iclass 10, count 0 2006.229.17:46:10.13#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.17:46:10.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:46:10.13#ibcon#*before write, iclass 10, count 0 2006.229.17:46:10.13#ibcon#enter sib2, iclass 10, count 0 2006.229.17:46:10.13#ibcon#flushed, iclass 10, count 0 2006.229.17:46:10.13#ibcon#about to write, iclass 10, count 0 2006.229.17:46:10.13#ibcon#wrote, iclass 10, count 0 2006.229.17:46:10.13#ibcon#about to read 3, iclass 10, count 0 2006.229.17:46:10.17#ibcon#read 3, iclass 10, count 0 2006.229.17:46:10.17#ibcon#about to read 4, iclass 10, count 0 2006.229.17:46:10.17#ibcon#read 4, iclass 10, count 0 2006.229.17:46:10.17#ibcon#about to read 5, iclass 10, count 0 2006.229.17:46:10.17#ibcon#read 5, iclass 10, count 0 2006.229.17:46:10.17#ibcon#about to read 6, iclass 10, count 0 2006.229.17:46:10.17#ibcon#read 6, iclass 10, count 0 2006.229.17:46:10.17#ibcon#end of sib2, iclass 10, count 0 2006.229.17:46:10.17#ibcon#*after write, iclass 10, count 0 2006.229.17:46:10.17#ibcon#*before return 0, iclass 10, count 0 2006.229.17:46:10.17#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:10.17#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.17:46:10.17#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.17:46:10.17#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.17:46:10.17$vck44/vb=2,4 2006.229.17:46:10.17#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.17:46:10.17#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.17:46:10.17#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:10.17#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:10.23#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:10.23#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:10.23#ibcon#enter wrdev, iclass 12, count 2 2006.229.17:46:10.23#ibcon#first serial, iclass 12, count 2 2006.229.17:46:10.23#ibcon#enter sib2, iclass 12, count 2 2006.229.17:46:10.23#ibcon#flushed, iclass 12, count 2 2006.229.17:46:10.23#ibcon#about to write, iclass 12, count 2 2006.229.17:46:10.23#ibcon#wrote, iclass 12, count 2 2006.229.17:46:10.23#ibcon#about to read 3, iclass 12, count 2 2006.229.17:46:10.25#ibcon#read 3, iclass 12, count 2 2006.229.17:46:10.25#ibcon#about to read 4, iclass 12, count 2 2006.229.17:46:10.25#ibcon#read 4, iclass 12, count 2 2006.229.17:46:10.25#ibcon#about to read 5, iclass 12, count 2 2006.229.17:46:10.25#ibcon#read 5, iclass 12, count 2 2006.229.17:46:10.25#ibcon#about to read 6, iclass 12, count 2 2006.229.17:46:10.25#ibcon#read 6, iclass 12, count 2 2006.229.17:46:10.25#ibcon#end of sib2, iclass 12, count 2 2006.229.17:46:10.25#ibcon#*mode == 0, iclass 12, count 2 2006.229.17:46:10.25#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.17:46:10.25#ibcon#[27=AT02-04\r\n] 2006.229.17:46:10.25#ibcon#*before write, iclass 12, count 2 2006.229.17:46:10.25#ibcon#enter sib2, iclass 12, count 2 2006.229.17:46:10.25#ibcon#flushed, iclass 12, count 2 2006.229.17:46:10.25#ibcon#about to write, iclass 12, count 2 2006.229.17:46:10.25#ibcon#wrote, iclass 12, count 2 2006.229.17:46:10.25#ibcon#about to read 3, iclass 12, count 2 2006.229.17:46:10.28#ibcon#read 3, iclass 12, count 2 2006.229.17:46:10.28#ibcon#about to read 4, iclass 12, count 2 2006.229.17:46:10.28#ibcon#read 4, iclass 12, count 2 2006.229.17:46:10.28#ibcon#about to read 5, iclass 12, count 2 2006.229.17:46:10.28#ibcon#read 5, iclass 12, count 2 2006.229.17:46:10.28#ibcon#about to read 6, iclass 12, count 2 2006.229.17:46:10.28#ibcon#read 6, iclass 12, count 2 2006.229.17:46:10.28#ibcon#end of sib2, iclass 12, count 2 2006.229.17:46:10.28#ibcon#*after write, iclass 12, count 2 2006.229.17:46:10.28#ibcon#*before return 0, iclass 12, count 2 2006.229.17:46:10.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:10.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.17:46:10.28#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.17:46:10.28#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:10.28#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:10.40#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:10.40#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:10.40#ibcon#enter wrdev, iclass 12, count 0 2006.229.17:46:10.40#ibcon#first serial, iclass 12, count 0 2006.229.17:46:10.40#ibcon#enter sib2, iclass 12, count 0 2006.229.17:46:10.40#ibcon#flushed, iclass 12, count 0 2006.229.17:46:10.40#ibcon#about to write, iclass 12, count 0 2006.229.17:46:10.40#ibcon#wrote, iclass 12, count 0 2006.229.17:46:10.40#ibcon#about to read 3, iclass 12, count 0 2006.229.17:46:10.42#ibcon#read 3, iclass 12, count 0 2006.229.17:46:10.42#ibcon#about to read 4, iclass 12, count 0 2006.229.17:46:10.42#ibcon#read 4, iclass 12, count 0 2006.229.17:46:10.42#ibcon#about to read 5, iclass 12, count 0 2006.229.17:46:10.42#ibcon#read 5, iclass 12, count 0 2006.229.17:46:10.42#ibcon#about to read 6, iclass 12, count 0 2006.229.17:46:10.42#ibcon#read 6, iclass 12, count 0 2006.229.17:46:10.42#ibcon#end of sib2, iclass 12, count 0 2006.229.17:46:10.42#ibcon#*mode == 0, iclass 12, count 0 2006.229.17:46:10.42#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.17:46:10.42#ibcon#[27=USB\r\n] 2006.229.17:46:10.42#ibcon#*before write, iclass 12, count 0 2006.229.17:46:10.42#ibcon#enter sib2, iclass 12, count 0 2006.229.17:46:10.42#ibcon#flushed, iclass 12, count 0 2006.229.17:46:10.42#ibcon#about to write, iclass 12, count 0 2006.229.17:46:10.42#ibcon#wrote, iclass 12, count 0 2006.229.17:46:10.42#ibcon#about to read 3, iclass 12, count 0 2006.229.17:46:10.45#ibcon#read 3, iclass 12, count 0 2006.229.17:46:10.45#ibcon#about to read 4, iclass 12, count 0 2006.229.17:46:10.45#ibcon#read 4, iclass 12, count 0 2006.229.17:46:10.45#ibcon#about to read 5, iclass 12, count 0 2006.229.17:46:10.45#ibcon#read 5, iclass 12, count 0 2006.229.17:46:10.45#ibcon#about to read 6, iclass 12, count 0 2006.229.17:46:10.45#ibcon#read 6, iclass 12, count 0 2006.229.17:46:10.45#ibcon#end of sib2, iclass 12, count 0 2006.229.17:46:10.45#ibcon#*after write, iclass 12, count 0 2006.229.17:46:10.45#ibcon#*before return 0, iclass 12, count 0 2006.229.17:46:10.45#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:10.45#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.17:46:10.45#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.17:46:10.45#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.17:46:10.45$vck44/vblo=3,649.99 2006.229.17:46:10.45#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.17:46:10.45#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.17:46:10.45#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:10.45#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:10.45#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:10.45#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:10.45#ibcon#enter wrdev, iclass 14, count 0 2006.229.17:46:10.45#ibcon#first serial, iclass 14, count 0 2006.229.17:46:10.45#ibcon#enter sib2, iclass 14, count 0 2006.229.17:46:10.45#ibcon#flushed, iclass 14, count 0 2006.229.17:46:10.45#ibcon#about to write, iclass 14, count 0 2006.229.17:46:10.45#ibcon#wrote, iclass 14, count 0 2006.229.17:46:10.45#ibcon#about to read 3, iclass 14, count 0 2006.229.17:46:10.47#ibcon#read 3, iclass 14, count 0 2006.229.17:46:10.47#ibcon#about to read 4, iclass 14, count 0 2006.229.17:46:10.47#ibcon#read 4, iclass 14, count 0 2006.229.17:46:10.47#ibcon#about to read 5, iclass 14, count 0 2006.229.17:46:10.47#ibcon#read 5, iclass 14, count 0 2006.229.17:46:10.47#ibcon#about to read 6, iclass 14, count 0 2006.229.17:46:10.47#ibcon#read 6, iclass 14, count 0 2006.229.17:46:10.47#ibcon#end of sib2, iclass 14, count 0 2006.229.17:46:10.47#ibcon#*mode == 0, iclass 14, count 0 2006.229.17:46:10.47#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.17:46:10.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:46:10.47#ibcon#*before write, iclass 14, count 0 2006.229.17:46:10.47#ibcon#enter sib2, iclass 14, count 0 2006.229.17:46:10.47#ibcon#flushed, iclass 14, count 0 2006.229.17:46:10.47#ibcon#about to write, iclass 14, count 0 2006.229.17:46:10.47#ibcon#wrote, iclass 14, count 0 2006.229.17:46:10.47#ibcon#about to read 3, iclass 14, count 0 2006.229.17:46:10.51#ibcon#read 3, iclass 14, count 0 2006.229.17:46:10.51#ibcon#about to read 4, iclass 14, count 0 2006.229.17:46:10.51#ibcon#read 4, iclass 14, count 0 2006.229.17:46:10.51#ibcon#about to read 5, iclass 14, count 0 2006.229.17:46:10.51#ibcon#read 5, iclass 14, count 0 2006.229.17:46:10.51#ibcon#about to read 6, iclass 14, count 0 2006.229.17:46:10.51#ibcon#read 6, iclass 14, count 0 2006.229.17:46:10.51#ibcon#end of sib2, iclass 14, count 0 2006.229.17:46:10.51#ibcon#*after write, iclass 14, count 0 2006.229.17:46:10.51#ibcon#*before return 0, iclass 14, count 0 2006.229.17:46:10.51#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:10.51#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.17:46:10.51#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.17:46:10.51#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.17:46:10.51$vck44/vb=3,4 2006.229.17:46:10.51#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.17:46:10.51#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.17:46:10.51#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:10.51#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:10.57#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:10.57#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:10.57#ibcon#enter wrdev, iclass 16, count 2 2006.229.17:46:10.57#ibcon#first serial, iclass 16, count 2 2006.229.17:46:10.57#ibcon#enter sib2, iclass 16, count 2 2006.229.17:46:10.57#ibcon#flushed, iclass 16, count 2 2006.229.17:46:10.57#ibcon#about to write, iclass 16, count 2 2006.229.17:46:10.57#ibcon#wrote, iclass 16, count 2 2006.229.17:46:10.57#ibcon#about to read 3, iclass 16, count 2 2006.229.17:46:10.59#ibcon#read 3, iclass 16, count 2 2006.229.17:46:10.59#ibcon#about to read 4, iclass 16, count 2 2006.229.17:46:10.59#ibcon#read 4, iclass 16, count 2 2006.229.17:46:10.59#ibcon#about to read 5, iclass 16, count 2 2006.229.17:46:10.59#ibcon#read 5, iclass 16, count 2 2006.229.17:46:10.59#ibcon#about to read 6, iclass 16, count 2 2006.229.17:46:10.59#ibcon#read 6, iclass 16, count 2 2006.229.17:46:10.59#ibcon#end of sib2, iclass 16, count 2 2006.229.17:46:10.59#ibcon#*mode == 0, iclass 16, count 2 2006.229.17:46:10.59#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.17:46:10.59#ibcon#[27=AT03-04\r\n] 2006.229.17:46:10.59#ibcon#*before write, iclass 16, count 2 2006.229.17:46:10.59#ibcon#enter sib2, iclass 16, count 2 2006.229.17:46:10.59#ibcon#flushed, iclass 16, count 2 2006.229.17:46:10.59#ibcon#about to write, iclass 16, count 2 2006.229.17:46:10.59#ibcon#wrote, iclass 16, count 2 2006.229.17:46:10.59#ibcon#about to read 3, iclass 16, count 2 2006.229.17:46:10.62#ibcon#read 3, iclass 16, count 2 2006.229.17:46:10.62#ibcon#about to read 4, iclass 16, count 2 2006.229.17:46:10.62#ibcon#read 4, iclass 16, count 2 2006.229.17:46:10.62#ibcon#about to read 5, iclass 16, count 2 2006.229.17:46:10.62#ibcon#read 5, iclass 16, count 2 2006.229.17:46:10.62#ibcon#about to read 6, iclass 16, count 2 2006.229.17:46:10.62#ibcon#read 6, iclass 16, count 2 2006.229.17:46:10.62#ibcon#end of sib2, iclass 16, count 2 2006.229.17:46:10.62#ibcon#*after write, iclass 16, count 2 2006.229.17:46:10.62#ibcon#*before return 0, iclass 16, count 2 2006.229.17:46:10.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:10.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.17:46:10.62#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.17:46:10.62#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:10.62#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:10.74#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:10.74#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:10.74#ibcon#enter wrdev, iclass 16, count 0 2006.229.17:46:10.74#ibcon#first serial, iclass 16, count 0 2006.229.17:46:10.74#ibcon#enter sib2, iclass 16, count 0 2006.229.17:46:10.74#ibcon#flushed, iclass 16, count 0 2006.229.17:46:10.74#ibcon#about to write, iclass 16, count 0 2006.229.17:46:10.74#ibcon#wrote, iclass 16, count 0 2006.229.17:46:10.74#ibcon#about to read 3, iclass 16, count 0 2006.229.17:46:10.76#ibcon#read 3, iclass 16, count 0 2006.229.17:46:10.76#ibcon#about to read 4, iclass 16, count 0 2006.229.17:46:10.76#ibcon#read 4, iclass 16, count 0 2006.229.17:46:10.76#ibcon#about to read 5, iclass 16, count 0 2006.229.17:46:10.76#ibcon#read 5, iclass 16, count 0 2006.229.17:46:10.76#ibcon#about to read 6, iclass 16, count 0 2006.229.17:46:10.76#ibcon#read 6, iclass 16, count 0 2006.229.17:46:10.76#ibcon#end of sib2, iclass 16, count 0 2006.229.17:46:10.76#ibcon#*mode == 0, iclass 16, count 0 2006.229.17:46:10.76#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.17:46:10.76#ibcon#[27=USB\r\n] 2006.229.17:46:10.76#ibcon#*before write, iclass 16, count 0 2006.229.17:46:10.76#ibcon#enter sib2, iclass 16, count 0 2006.229.17:46:10.76#ibcon#flushed, iclass 16, count 0 2006.229.17:46:10.76#ibcon#about to write, iclass 16, count 0 2006.229.17:46:10.76#ibcon#wrote, iclass 16, count 0 2006.229.17:46:10.76#ibcon#about to read 3, iclass 16, count 0 2006.229.17:46:10.79#ibcon#read 3, iclass 16, count 0 2006.229.17:46:10.79#ibcon#about to read 4, iclass 16, count 0 2006.229.17:46:10.79#ibcon#read 4, iclass 16, count 0 2006.229.17:46:10.79#ibcon#about to read 5, iclass 16, count 0 2006.229.17:46:10.79#ibcon#read 5, iclass 16, count 0 2006.229.17:46:10.79#ibcon#about to read 6, iclass 16, count 0 2006.229.17:46:10.79#ibcon#read 6, iclass 16, count 0 2006.229.17:46:10.79#ibcon#end of sib2, iclass 16, count 0 2006.229.17:46:10.79#ibcon#*after write, iclass 16, count 0 2006.229.17:46:10.79#ibcon#*before return 0, iclass 16, count 0 2006.229.17:46:10.79#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:10.79#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.17:46:10.79#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.17:46:10.79#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.17:46:10.79$vck44/vblo=4,679.99 2006.229.17:46:10.79#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.17:46:10.79#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.17:46:10.79#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:10.79#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:10.79#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:10.79#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:10.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.17:46:10.79#ibcon#first serial, iclass 18, count 0 2006.229.17:46:10.79#ibcon#enter sib2, iclass 18, count 0 2006.229.17:46:10.79#ibcon#flushed, iclass 18, count 0 2006.229.17:46:10.79#ibcon#about to write, iclass 18, count 0 2006.229.17:46:10.79#ibcon#wrote, iclass 18, count 0 2006.229.17:46:10.79#ibcon#about to read 3, iclass 18, count 0 2006.229.17:46:10.81#ibcon#read 3, iclass 18, count 0 2006.229.17:46:10.81#ibcon#about to read 4, iclass 18, count 0 2006.229.17:46:10.81#ibcon#read 4, iclass 18, count 0 2006.229.17:46:10.81#ibcon#about to read 5, iclass 18, count 0 2006.229.17:46:10.81#ibcon#read 5, iclass 18, count 0 2006.229.17:46:10.81#ibcon#about to read 6, iclass 18, count 0 2006.229.17:46:10.81#ibcon#read 6, iclass 18, count 0 2006.229.17:46:10.81#ibcon#end of sib2, iclass 18, count 0 2006.229.17:46:10.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.17:46:10.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.17:46:10.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:46:10.81#ibcon#*before write, iclass 18, count 0 2006.229.17:46:10.81#ibcon#enter sib2, iclass 18, count 0 2006.229.17:46:10.81#ibcon#flushed, iclass 18, count 0 2006.229.17:46:10.81#ibcon#about to write, iclass 18, count 0 2006.229.17:46:10.81#ibcon#wrote, iclass 18, count 0 2006.229.17:46:10.81#ibcon#about to read 3, iclass 18, count 0 2006.229.17:46:10.85#ibcon#read 3, iclass 18, count 0 2006.229.17:46:10.85#ibcon#about to read 4, iclass 18, count 0 2006.229.17:46:10.85#ibcon#read 4, iclass 18, count 0 2006.229.17:46:10.85#ibcon#about to read 5, iclass 18, count 0 2006.229.17:46:10.85#ibcon#read 5, iclass 18, count 0 2006.229.17:46:10.85#ibcon#about to read 6, iclass 18, count 0 2006.229.17:46:10.85#ibcon#read 6, iclass 18, count 0 2006.229.17:46:10.85#ibcon#end of sib2, iclass 18, count 0 2006.229.17:46:10.85#ibcon#*after write, iclass 18, count 0 2006.229.17:46:10.85#ibcon#*before return 0, iclass 18, count 0 2006.229.17:46:10.85#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:10.85#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.17:46:10.85#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.17:46:10.85#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.17:46:10.85$vck44/vb=4,4 2006.229.17:46:10.85#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.17:46:10.85#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.17:46:10.85#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:10.85#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:10.91#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:10.91#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:10.91#ibcon#enter wrdev, iclass 20, count 2 2006.229.17:46:10.91#ibcon#first serial, iclass 20, count 2 2006.229.17:46:10.91#ibcon#enter sib2, iclass 20, count 2 2006.229.17:46:10.91#ibcon#flushed, iclass 20, count 2 2006.229.17:46:10.91#ibcon#about to write, iclass 20, count 2 2006.229.17:46:10.91#ibcon#wrote, iclass 20, count 2 2006.229.17:46:10.91#ibcon#about to read 3, iclass 20, count 2 2006.229.17:46:10.93#ibcon#read 3, iclass 20, count 2 2006.229.17:46:10.93#ibcon#about to read 4, iclass 20, count 2 2006.229.17:46:10.93#ibcon#read 4, iclass 20, count 2 2006.229.17:46:10.93#ibcon#about to read 5, iclass 20, count 2 2006.229.17:46:10.93#ibcon#read 5, iclass 20, count 2 2006.229.17:46:10.93#ibcon#about to read 6, iclass 20, count 2 2006.229.17:46:10.93#ibcon#read 6, iclass 20, count 2 2006.229.17:46:10.93#ibcon#end of sib2, iclass 20, count 2 2006.229.17:46:10.93#ibcon#*mode == 0, iclass 20, count 2 2006.229.17:46:10.93#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.17:46:10.93#ibcon#[27=AT04-04\r\n] 2006.229.17:46:10.93#ibcon#*before write, iclass 20, count 2 2006.229.17:46:10.93#ibcon#enter sib2, iclass 20, count 2 2006.229.17:46:10.93#ibcon#flushed, iclass 20, count 2 2006.229.17:46:10.93#ibcon#about to write, iclass 20, count 2 2006.229.17:46:10.93#ibcon#wrote, iclass 20, count 2 2006.229.17:46:10.93#ibcon#about to read 3, iclass 20, count 2 2006.229.17:46:10.96#ibcon#read 3, iclass 20, count 2 2006.229.17:46:10.96#ibcon#about to read 4, iclass 20, count 2 2006.229.17:46:10.96#ibcon#read 4, iclass 20, count 2 2006.229.17:46:10.96#ibcon#about to read 5, iclass 20, count 2 2006.229.17:46:10.96#ibcon#read 5, iclass 20, count 2 2006.229.17:46:10.96#ibcon#about to read 6, iclass 20, count 2 2006.229.17:46:10.96#ibcon#read 6, iclass 20, count 2 2006.229.17:46:10.96#ibcon#end of sib2, iclass 20, count 2 2006.229.17:46:10.96#ibcon#*after write, iclass 20, count 2 2006.229.17:46:10.96#ibcon#*before return 0, iclass 20, count 2 2006.229.17:46:10.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:10.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.17:46:10.96#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.17:46:10.96#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:10.96#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:11.08#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:11.08#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:11.08#ibcon#enter wrdev, iclass 20, count 0 2006.229.17:46:11.08#ibcon#first serial, iclass 20, count 0 2006.229.17:46:11.08#ibcon#enter sib2, iclass 20, count 0 2006.229.17:46:11.08#ibcon#flushed, iclass 20, count 0 2006.229.17:46:11.08#ibcon#about to write, iclass 20, count 0 2006.229.17:46:11.08#ibcon#wrote, iclass 20, count 0 2006.229.17:46:11.08#ibcon#about to read 3, iclass 20, count 0 2006.229.17:46:11.10#ibcon#read 3, iclass 20, count 0 2006.229.17:46:11.10#ibcon#about to read 4, iclass 20, count 0 2006.229.17:46:11.10#ibcon#read 4, iclass 20, count 0 2006.229.17:46:11.10#ibcon#about to read 5, iclass 20, count 0 2006.229.17:46:11.10#ibcon#read 5, iclass 20, count 0 2006.229.17:46:11.10#ibcon#about to read 6, iclass 20, count 0 2006.229.17:46:11.10#ibcon#read 6, iclass 20, count 0 2006.229.17:46:11.10#ibcon#end of sib2, iclass 20, count 0 2006.229.17:46:11.10#ibcon#*mode == 0, iclass 20, count 0 2006.229.17:46:11.10#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.17:46:11.10#ibcon#[27=USB\r\n] 2006.229.17:46:11.10#ibcon#*before write, iclass 20, count 0 2006.229.17:46:11.10#ibcon#enter sib2, iclass 20, count 0 2006.229.17:46:11.10#ibcon#flushed, iclass 20, count 0 2006.229.17:46:11.10#ibcon#about to write, iclass 20, count 0 2006.229.17:46:11.10#ibcon#wrote, iclass 20, count 0 2006.229.17:46:11.10#ibcon#about to read 3, iclass 20, count 0 2006.229.17:46:11.13#ibcon#read 3, iclass 20, count 0 2006.229.17:46:11.13#ibcon#about to read 4, iclass 20, count 0 2006.229.17:46:11.13#ibcon#read 4, iclass 20, count 0 2006.229.17:46:11.13#ibcon#about to read 5, iclass 20, count 0 2006.229.17:46:11.13#ibcon#read 5, iclass 20, count 0 2006.229.17:46:11.13#ibcon#about to read 6, iclass 20, count 0 2006.229.17:46:11.13#ibcon#read 6, iclass 20, count 0 2006.229.17:46:11.13#ibcon#end of sib2, iclass 20, count 0 2006.229.17:46:11.13#ibcon#*after write, iclass 20, count 0 2006.229.17:46:11.13#ibcon#*before return 0, iclass 20, count 0 2006.229.17:46:11.13#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:11.13#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.17:46:11.13#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.17:46:11.13#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.17:46:11.13$vck44/vblo=5,709.99 2006.229.17:46:11.13#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.17:46:11.13#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.17:46:11.13#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:11.13#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:11.13#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:11.13#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:11.13#ibcon#enter wrdev, iclass 22, count 0 2006.229.17:46:11.13#ibcon#first serial, iclass 22, count 0 2006.229.17:46:11.13#ibcon#enter sib2, iclass 22, count 0 2006.229.17:46:11.13#ibcon#flushed, iclass 22, count 0 2006.229.17:46:11.13#ibcon#about to write, iclass 22, count 0 2006.229.17:46:11.13#ibcon#wrote, iclass 22, count 0 2006.229.17:46:11.13#ibcon#about to read 3, iclass 22, count 0 2006.229.17:46:11.15#ibcon#read 3, iclass 22, count 0 2006.229.17:46:11.15#ibcon#about to read 4, iclass 22, count 0 2006.229.17:46:11.15#ibcon#read 4, iclass 22, count 0 2006.229.17:46:11.15#ibcon#about to read 5, iclass 22, count 0 2006.229.17:46:11.15#ibcon#read 5, iclass 22, count 0 2006.229.17:46:11.15#ibcon#about to read 6, iclass 22, count 0 2006.229.17:46:11.15#ibcon#read 6, iclass 22, count 0 2006.229.17:46:11.15#ibcon#end of sib2, iclass 22, count 0 2006.229.17:46:11.15#ibcon#*mode == 0, iclass 22, count 0 2006.229.17:46:11.15#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.17:46:11.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:46:11.15#ibcon#*before write, iclass 22, count 0 2006.229.17:46:11.15#ibcon#enter sib2, iclass 22, count 0 2006.229.17:46:11.15#ibcon#flushed, iclass 22, count 0 2006.229.17:46:11.15#ibcon#about to write, iclass 22, count 0 2006.229.17:46:11.15#ibcon#wrote, iclass 22, count 0 2006.229.17:46:11.15#ibcon#about to read 3, iclass 22, count 0 2006.229.17:46:11.19#ibcon#read 3, iclass 22, count 0 2006.229.17:46:11.19#ibcon#about to read 4, iclass 22, count 0 2006.229.17:46:11.19#ibcon#read 4, iclass 22, count 0 2006.229.17:46:11.19#ibcon#about to read 5, iclass 22, count 0 2006.229.17:46:11.19#ibcon#read 5, iclass 22, count 0 2006.229.17:46:11.19#ibcon#about to read 6, iclass 22, count 0 2006.229.17:46:11.19#ibcon#read 6, iclass 22, count 0 2006.229.17:46:11.19#ibcon#end of sib2, iclass 22, count 0 2006.229.17:46:11.19#ibcon#*after write, iclass 22, count 0 2006.229.17:46:11.19#ibcon#*before return 0, iclass 22, count 0 2006.229.17:46:11.19#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:11.19#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.17:46:11.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.17:46:11.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.17:46:11.19$vck44/vb=5,4 2006.229.17:46:11.19#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.17:46:11.19#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.17:46:11.19#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:11.19#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:11.25#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:11.25#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:11.25#ibcon#enter wrdev, iclass 24, count 2 2006.229.17:46:11.25#ibcon#first serial, iclass 24, count 2 2006.229.17:46:11.25#ibcon#enter sib2, iclass 24, count 2 2006.229.17:46:11.25#ibcon#flushed, iclass 24, count 2 2006.229.17:46:11.25#ibcon#about to write, iclass 24, count 2 2006.229.17:46:11.25#ibcon#wrote, iclass 24, count 2 2006.229.17:46:11.25#ibcon#about to read 3, iclass 24, count 2 2006.229.17:46:11.27#ibcon#read 3, iclass 24, count 2 2006.229.17:46:11.27#ibcon#about to read 4, iclass 24, count 2 2006.229.17:46:11.27#ibcon#read 4, iclass 24, count 2 2006.229.17:46:11.27#ibcon#about to read 5, iclass 24, count 2 2006.229.17:46:11.27#ibcon#read 5, iclass 24, count 2 2006.229.17:46:11.27#ibcon#about to read 6, iclass 24, count 2 2006.229.17:46:11.27#ibcon#read 6, iclass 24, count 2 2006.229.17:46:11.27#ibcon#end of sib2, iclass 24, count 2 2006.229.17:46:11.27#ibcon#*mode == 0, iclass 24, count 2 2006.229.17:46:11.27#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.17:46:11.27#ibcon#[27=AT05-04\r\n] 2006.229.17:46:11.27#ibcon#*before write, iclass 24, count 2 2006.229.17:46:11.27#ibcon#enter sib2, iclass 24, count 2 2006.229.17:46:11.27#ibcon#flushed, iclass 24, count 2 2006.229.17:46:11.27#ibcon#about to write, iclass 24, count 2 2006.229.17:46:11.27#ibcon#wrote, iclass 24, count 2 2006.229.17:46:11.27#ibcon#about to read 3, iclass 24, count 2 2006.229.17:46:11.30#ibcon#read 3, iclass 24, count 2 2006.229.17:46:11.30#ibcon#about to read 4, iclass 24, count 2 2006.229.17:46:11.30#ibcon#read 4, iclass 24, count 2 2006.229.17:46:11.30#ibcon#about to read 5, iclass 24, count 2 2006.229.17:46:11.30#ibcon#read 5, iclass 24, count 2 2006.229.17:46:11.30#ibcon#about to read 6, iclass 24, count 2 2006.229.17:46:11.30#ibcon#read 6, iclass 24, count 2 2006.229.17:46:11.30#ibcon#end of sib2, iclass 24, count 2 2006.229.17:46:11.30#ibcon#*after write, iclass 24, count 2 2006.229.17:46:11.30#ibcon#*before return 0, iclass 24, count 2 2006.229.17:46:11.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:11.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.17:46:11.30#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.17:46:11.30#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:11.30#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:11.42#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:11.42#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:11.42#ibcon#enter wrdev, iclass 24, count 0 2006.229.17:46:11.42#ibcon#first serial, iclass 24, count 0 2006.229.17:46:11.42#ibcon#enter sib2, iclass 24, count 0 2006.229.17:46:11.42#ibcon#flushed, iclass 24, count 0 2006.229.17:46:11.42#ibcon#about to write, iclass 24, count 0 2006.229.17:46:11.42#ibcon#wrote, iclass 24, count 0 2006.229.17:46:11.42#ibcon#about to read 3, iclass 24, count 0 2006.229.17:46:11.44#ibcon#read 3, iclass 24, count 0 2006.229.17:46:11.44#ibcon#about to read 4, iclass 24, count 0 2006.229.17:46:11.44#ibcon#read 4, iclass 24, count 0 2006.229.17:46:11.44#ibcon#about to read 5, iclass 24, count 0 2006.229.17:46:11.44#ibcon#read 5, iclass 24, count 0 2006.229.17:46:11.44#ibcon#about to read 6, iclass 24, count 0 2006.229.17:46:11.44#ibcon#read 6, iclass 24, count 0 2006.229.17:46:11.44#ibcon#end of sib2, iclass 24, count 0 2006.229.17:46:11.44#ibcon#*mode == 0, iclass 24, count 0 2006.229.17:46:11.44#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.17:46:11.44#ibcon#[27=USB\r\n] 2006.229.17:46:11.44#ibcon#*before write, iclass 24, count 0 2006.229.17:46:11.44#ibcon#enter sib2, iclass 24, count 0 2006.229.17:46:11.44#ibcon#flushed, iclass 24, count 0 2006.229.17:46:11.44#ibcon#about to write, iclass 24, count 0 2006.229.17:46:11.44#ibcon#wrote, iclass 24, count 0 2006.229.17:46:11.44#ibcon#about to read 3, iclass 24, count 0 2006.229.17:46:11.47#ibcon#read 3, iclass 24, count 0 2006.229.17:46:11.47#ibcon#about to read 4, iclass 24, count 0 2006.229.17:46:11.47#ibcon#read 4, iclass 24, count 0 2006.229.17:46:11.47#ibcon#about to read 5, iclass 24, count 0 2006.229.17:46:11.47#ibcon#read 5, iclass 24, count 0 2006.229.17:46:11.47#ibcon#about to read 6, iclass 24, count 0 2006.229.17:46:11.47#ibcon#read 6, iclass 24, count 0 2006.229.17:46:11.47#ibcon#end of sib2, iclass 24, count 0 2006.229.17:46:11.47#ibcon#*after write, iclass 24, count 0 2006.229.17:46:11.47#ibcon#*before return 0, iclass 24, count 0 2006.229.17:46:11.47#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:11.47#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.17:46:11.47#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.17:46:11.47#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.17:46:11.47$vck44/vblo=6,719.99 2006.229.17:46:11.47#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.17:46:11.47#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.17:46:11.47#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:11.47#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:11.47#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:11.47#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:11.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.17:46:11.47#ibcon#first serial, iclass 26, count 0 2006.229.17:46:11.47#ibcon#enter sib2, iclass 26, count 0 2006.229.17:46:11.47#ibcon#flushed, iclass 26, count 0 2006.229.17:46:11.47#ibcon#about to write, iclass 26, count 0 2006.229.17:46:11.47#ibcon#wrote, iclass 26, count 0 2006.229.17:46:11.47#ibcon#about to read 3, iclass 26, count 0 2006.229.17:46:11.49#ibcon#read 3, iclass 26, count 0 2006.229.17:46:11.49#ibcon#about to read 4, iclass 26, count 0 2006.229.17:46:11.49#ibcon#read 4, iclass 26, count 0 2006.229.17:46:11.49#ibcon#about to read 5, iclass 26, count 0 2006.229.17:46:11.49#ibcon#read 5, iclass 26, count 0 2006.229.17:46:11.49#ibcon#about to read 6, iclass 26, count 0 2006.229.17:46:11.49#ibcon#read 6, iclass 26, count 0 2006.229.17:46:11.49#ibcon#end of sib2, iclass 26, count 0 2006.229.17:46:11.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.17:46:11.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.17:46:11.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:46:11.49#ibcon#*before write, iclass 26, count 0 2006.229.17:46:11.49#ibcon#enter sib2, iclass 26, count 0 2006.229.17:46:11.49#ibcon#flushed, iclass 26, count 0 2006.229.17:46:11.49#ibcon#about to write, iclass 26, count 0 2006.229.17:46:11.49#ibcon#wrote, iclass 26, count 0 2006.229.17:46:11.49#ibcon#about to read 3, iclass 26, count 0 2006.229.17:46:11.53#ibcon#read 3, iclass 26, count 0 2006.229.17:46:11.53#ibcon#about to read 4, iclass 26, count 0 2006.229.17:46:11.53#ibcon#read 4, iclass 26, count 0 2006.229.17:46:11.53#ibcon#about to read 5, iclass 26, count 0 2006.229.17:46:11.53#ibcon#read 5, iclass 26, count 0 2006.229.17:46:11.53#ibcon#about to read 6, iclass 26, count 0 2006.229.17:46:11.53#ibcon#read 6, iclass 26, count 0 2006.229.17:46:11.53#ibcon#end of sib2, iclass 26, count 0 2006.229.17:46:11.53#ibcon#*after write, iclass 26, count 0 2006.229.17:46:11.53#ibcon#*before return 0, iclass 26, count 0 2006.229.17:46:11.53#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:11.53#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.17:46:11.53#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.17:46:11.53#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.17:46:11.53$vck44/vb=6,4 2006.229.17:46:11.53#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.17:46:11.53#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.17:46:11.53#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:11.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:11.59#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:11.59#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:11.59#ibcon#enter wrdev, iclass 28, count 2 2006.229.17:46:11.59#ibcon#first serial, iclass 28, count 2 2006.229.17:46:11.59#ibcon#enter sib2, iclass 28, count 2 2006.229.17:46:11.59#ibcon#flushed, iclass 28, count 2 2006.229.17:46:11.59#ibcon#about to write, iclass 28, count 2 2006.229.17:46:11.59#ibcon#wrote, iclass 28, count 2 2006.229.17:46:11.59#ibcon#about to read 3, iclass 28, count 2 2006.229.17:46:11.61#ibcon#read 3, iclass 28, count 2 2006.229.17:46:11.61#ibcon#about to read 4, iclass 28, count 2 2006.229.17:46:11.61#ibcon#read 4, iclass 28, count 2 2006.229.17:46:11.61#ibcon#about to read 5, iclass 28, count 2 2006.229.17:46:11.61#ibcon#read 5, iclass 28, count 2 2006.229.17:46:11.61#ibcon#about to read 6, iclass 28, count 2 2006.229.17:46:11.61#ibcon#read 6, iclass 28, count 2 2006.229.17:46:11.61#ibcon#end of sib2, iclass 28, count 2 2006.229.17:46:11.61#ibcon#*mode == 0, iclass 28, count 2 2006.229.17:46:11.61#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.17:46:11.61#ibcon#[27=AT06-04\r\n] 2006.229.17:46:11.61#ibcon#*before write, iclass 28, count 2 2006.229.17:46:11.61#ibcon#enter sib2, iclass 28, count 2 2006.229.17:46:11.61#ibcon#flushed, iclass 28, count 2 2006.229.17:46:11.61#ibcon#about to write, iclass 28, count 2 2006.229.17:46:11.61#ibcon#wrote, iclass 28, count 2 2006.229.17:46:11.61#ibcon#about to read 3, iclass 28, count 2 2006.229.17:46:11.64#ibcon#read 3, iclass 28, count 2 2006.229.17:46:11.64#ibcon#about to read 4, iclass 28, count 2 2006.229.17:46:11.64#ibcon#read 4, iclass 28, count 2 2006.229.17:46:11.64#ibcon#about to read 5, iclass 28, count 2 2006.229.17:46:11.64#ibcon#read 5, iclass 28, count 2 2006.229.17:46:11.64#ibcon#about to read 6, iclass 28, count 2 2006.229.17:46:11.64#ibcon#read 6, iclass 28, count 2 2006.229.17:46:11.64#ibcon#end of sib2, iclass 28, count 2 2006.229.17:46:11.64#ibcon#*after write, iclass 28, count 2 2006.229.17:46:11.64#ibcon#*before return 0, iclass 28, count 2 2006.229.17:46:11.64#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:11.64#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.17:46:11.64#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.17:46:11.64#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:11.64#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:11.76#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:11.76#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:11.76#ibcon#enter wrdev, iclass 28, count 0 2006.229.17:46:11.76#ibcon#first serial, iclass 28, count 0 2006.229.17:46:11.76#ibcon#enter sib2, iclass 28, count 0 2006.229.17:46:11.76#ibcon#flushed, iclass 28, count 0 2006.229.17:46:11.76#ibcon#about to write, iclass 28, count 0 2006.229.17:46:11.76#ibcon#wrote, iclass 28, count 0 2006.229.17:46:11.76#ibcon#about to read 3, iclass 28, count 0 2006.229.17:46:11.78#ibcon#read 3, iclass 28, count 0 2006.229.17:46:11.78#ibcon#about to read 4, iclass 28, count 0 2006.229.17:46:11.78#ibcon#read 4, iclass 28, count 0 2006.229.17:46:11.78#ibcon#about to read 5, iclass 28, count 0 2006.229.17:46:11.78#ibcon#read 5, iclass 28, count 0 2006.229.17:46:11.78#ibcon#about to read 6, iclass 28, count 0 2006.229.17:46:11.78#ibcon#read 6, iclass 28, count 0 2006.229.17:46:11.78#ibcon#end of sib2, iclass 28, count 0 2006.229.17:46:11.78#ibcon#*mode == 0, iclass 28, count 0 2006.229.17:46:11.78#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.17:46:11.78#ibcon#[27=USB\r\n] 2006.229.17:46:11.78#ibcon#*before write, iclass 28, count 0 2006.229.17:46:11.78#ibcon#enter sib2, iclass 28, count 0 2006.229.17:46:11.78#ibcon#flushed, iclass 28, count 0 2006.229.17:46:11.78#ibcon#about to write, iclass 28, count 0 2006.229.17:46:11.78#ibcon#wrote, iclass 28, count 0 2006.229.17:46:11.78#ibcon#about to read 3, iclass 28, count 0 2006.229.17:46:11.81#ibcon#read 3, iclass 28, count 0 2006.229.17:46:11.81#ibcon#about to read 4, iclass 28, count 0 2006.229.17:46:11.81#ibcon#read 4, iclass 28, count 0 2006.229.17:46:11.81#ibcon#about to read 5, iclass 28, count 0 2006.229.17:46:11.81#ibcon#read 5, iclass 28, count 0 2006.229.17:46:11.81#ibcon#about to read 6, iclass 28, count 0 2006.229.17:46:11.81#ibcon#read 6, iclass 28, count 0 2006.229.17:46:11.81#ibcon#end of sib2, iclass 28, count 0 2006.229.17:46:11.81#ibcon#*after write, iclass 28, count 0 2006.229.17:46:11.81#ibcon#*before return 0, iclass 28, count 0 2006.229.17:46:11.81#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:11.81#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.17:46:11.81#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.17:46:11.81#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.17:46:11.81$vck44/vblo=7,734.99 2006.229.17:46:11.81#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.17:46:11.81#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.17:46:11.81#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:11.81#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:11.81#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:11.81#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:11.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.17:46:11.81#ibcon#first serial, iclass 30, count 0 2006.229.17:46:11.81#ibcon#enter sib2, iclass 30, count 0 2006.229.17:46:11.81#ibcon#flushed, iclass 30, count 0 2006.229.17:46:11.81#ibcon#about to write, iclass 30, count 0 2006.229.17:46:11.81#ibcon#wrote, iclass 30, count 0 2006.229.17:46:11.81#ibcon#about to read 3, iclass 30, count 0 2006.229.17:46:11.83#ibcon#read 3, iclass 30, count 0 2006.229.17:46:11.83#ibcon#about to read 4, iclass 30, count 0 2006.229.17:46:11.83#ibcon#read 4, iclass 30, count 0 2006.229.17:46:11.83#ibcon#about to read 5, iclass 30, count 0 2006.229.17:46:11.83#ibcon#read 5, iclass 30, count 0 2006.229.17:46:11.83#ibcon#about to read 6, iclass 30, count 0 2006.229.17:46:11.83#ibcon#read 6, iclass 30, count 0 2006.229.17:46:11.83#ibcon#end of sib2, iclass 30, count 0 2006.229.17:46:11.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.17:46:11.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.17:46:11.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:46:11.83#ibcon#*before write, iclass 30, count 0 2006.229.17:46:11.83#ibcon#enter sib2, iclass 30, count 0 2006.229.17:46:11.83#ibcon#flushed, iclass 30, count 0 2006.229.17:46:11.83#ibcon#about to write, iclass 30, count 0 2006.229.17:46:11.83#ibcon#wrote, iclass 30, count 0 2006.229.17:46:11.83#ibcon#about to read 3, iclass 30, count 0 2006.229.17:46:11.87#ibcon#read 3, iclass 30, count 0 2006.229.17:46:11.87#ibcon#about to read 4, iclass 30, count 0 2006.229.17:46:11.87#ibcon#read 4, iclass 30, count 0 2006.229.17:46:11.87#ibcon#about to read 5, iclass 30, count 0 2006.229.17:46:11.87#ibcon#read 5, iclass 30, count 0 2006.229.17:46:11.87#ibcon#about to read 6, iclass 30, count 0 2006.229.17:46:11.87#ibcon#read 6, iclass 30, count 0 2006.229.17:46:11.87#ibcon#end of sib2, iclass 30, count 0 2006.229.17:46:11.87#ibcon#*after write, iclass 30, count 0 2006.229.17:46:11.87#ibcon#*before return 0, iclass 30, count 0 2006.229.17:46:11.87#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:11.87#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.17:46:11.87#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.17:46:11.87#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.17:46:11.87$vck44/vb=7,4 2006.229.17:46:11.87#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.17:46:11.87#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.17:46:11.87#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:11.87#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:11.93#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:11.93#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:11.93#ibcon#enter wrdev, iclass 32, count 2 2006.229.17:46:11.93#ibcon#first serial, iclass 32, count 2 2006.229.17:46:11.93#ibcon#enter sib2, iclass 32, count 2 2006.229.17:46:11.93#ibcon#flushed, iclass 32, count 2 2006.229.17:46:11.93#ibcon#about to write, iclass 32, count 2 2006.229.17:46:11.93#ibcon#wrote, iclass 32, count 2 2006.229.17:46:11.93#ibcon#about to read 3, iclass 32, count 2 2006.229.17:46:11.95#ibcon#read 3, iclass 32, count 2 2006.229.17:46:11.95#ibcon#about to read 4, iclass 32, count 2 2006.229.17:46:11.95#ibcon#read 4, iclass 32, count 2 2006.229.17:46:11.95#ibcon#about to read 5, iclass 32, count 2 2006.229.17:46:11.95#ibcon#read 5, iclass 32, count 2 2006.229.17:46:11.95#ibcon#about to read 6, iclass 32, count 2 2006.229.17:46:11.95#ibcon#read 6, iclass 32, count 2 2006.229.17:46:11.95#ibcon#end of sib2, iclass 32, count 2 2006.229.17:46:11.95#ibcon#*mode == 0, iclass 32, count 2 2006.229.17:46:11.95#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.17:46:11.95#ibcon#[27=AT07-04\r\n] 2006.229.17:46:11.95#ibcon#*before write, iclass 32, count 2 2006.229.17:46:11.95#ibcon#enter sib2, iclass 32, count 2 2006.229.17:46:11.95#ibcon#flushed, iclass 32, count 2 2006.229.17:46:11.95#ibcon#about to write, iclass 32, count 2 2006.229.17:46:11.95#ibcon#wrote, iclass 32, count 2 2006.229.17:46:11.95#ibcon#about to read 3, iclass 32, count 2 2006.229.17:46:11.98#ibcon#read 3, iclass 32, count 2 2006.229.17:46:11.98#ibcon#about to read 4, iclass 32, count 2 2006.229.17:46:11.98#ibcon#read 4, iclass 32, count 2 2006.229.17:46:11.98#ibcon#about to read 5, iclass 32, count 2 2006.229.17:46:11.98#ibcon#read 5, iclass 32, count 2 2006.229.17:46:11.98#ibcon#about to read 6, iclass 32, count 2 2006.229.17:46:11.98#ibcon#read 6, iclass 32, count 2 2006.229.17:46:11.98#ibcon#end of sib2, iclass 32, count 2 2006.229.17:46:11.98#ibcon#*after write, iclass 32, count 2 2006.229.17:46:11.98#ibcon#*before return 0, iclass 32, count 2 2006.229.17:46:11.98#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:11.98#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.17:46:11.98#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.17:46:11.98#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:11.98#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:12.10#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:12.10#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:12.10#ibcon#enter wrdev, iclass 32, count 0 2006.229.17:46:12.10#ibcon#first serial, iclass 32, count 0 2006.229.17:46:12.10#ibcon#enter sib2, iclass 32, count 0 2006.229.17:46:12.10#ibcon#flushed, iclass 32, count 0 2006.229.17:46:12.10#ibcon#about to write, iclass 32, count 0 2006.229.17:46:12.10#ibcon#wrote, iclass 32, count 0 2006.229.17:46:12.10#ibcon#about to read 3, iclass 32, count 0 2006.229.17:46:12.12#ibcon#read 3, iclass 32, count 0 2006.229.17:46:12.12#ibcon#about to read 4, iclass 32, count 0 2006.229.17:46:12.12#ibcon#read 4, iclass 32, count 0 2006.229.17:46:12.12#ibcon#about to read 5, iclass 32, count 0 2006.229.17:46:12.12#ibcon#read 5, iclass 32, count 0 2006.229.17:46:12.12#ibcon#about to read 6, iclass 32, count 0 2006.229.17:46:12.12#ibcon#read 6, iclass 32, count 0 2006.229.17:46:12.12#ibcon#end of sib2, iclass 32, count 0 2006.229.17:46:12.12#ibcon#*mode == 0, iclass 32, count 0 2006.229.17:46:12.12#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.17:46:12.12#ibcon#[27=USB\r\n] 2006.229.17:46:12.12#ibcon#*before write, iclass 32, count 0 2006.229.17:46:12.12#ibcon#enter sib2, iclass 32, count 0 2006.229.17:46:12.12#ibcon#flushed, iclass 32, count 0 2006.229.17:46:12.12#ibcon#about to write, iclass 32, count 0 2006.229.17:46:12.12#ibcon#wrote, iclass 32, count 0 2006.229.17:46:12.12#ibcon#about to read 3, iclass 32, count 0 2006.229.17:46:12.15#ibcon#read 3, iclass 32, count 0 2006.229.17:46:12.15#ibcon#about to read 4, iclass 32, count 0 2006.229.17:46:12.15#ibcon#read 4, iclass 32, count 0 2006.229.17:46:12.15#ibcon#about to read 5, iclass 32, count 0 2006.229.17:46:12.15#ibcon#read 5, iclass 32, count 0 2006.229.17:46:12.15#ibcon#about to read 6, iclass 32, count 0 2006.229.17:46:12.15#ibcon#read 6, iclass 32, count 0 2006.229.17:46:12.15#ibcon#end of sib2, iclass 32, count 0 2006.229.17:46:12.15#ibcon#*after write, iclass 32, count 0 2006.229.17:46:12.15#ibcon#*before return 0, iclass 32, count 0 2006.229.17:46:12.15#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:12.15#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.17:46:12.15#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.17:46:12.15#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.17:46:12.15$vck44/vblo=8,744.99 2006.229.17:46:12.15#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.17:46:12.15#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.17:46:12.15#ibcon#ireg 17 cls_cnt 0 2006.229.17:46:12.15#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:12.15#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:12.15#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:12.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.17:46:12.15#ibcon#first serial, iclass 34, count 0 2006.229.17:46:12.15#ibcon#enter sib2, iclass 34, count 0 2006.229.17:46:12.15#ibcon#flushed, iclass 34, count 0 2006.229.17:46:12.15#ibcon#about to write, iclass 34, count 0 2006.229.17:46:12.15#ibcon#wrote, iclass 34, count 0 2006.229.17:46:12.15#ibcon#about to read 3, iclass 34, count 0 2006.229.17:46:12.17#ibcon#read 3, iclass 34, count 0 2006.229.17:46:12.17#ibcon#about to read 4, iclass 34, count 0 2006.229.17:46:12.17#ibcon#read 4, iclass 34, count 0 2006.229.17:46:12.17#ibcon#about to read 5, iclass 34, count 0 2006.229.17:46:12.17#ibcon#read 5, iclass 34, count 0 2006.229.17:46:12.17#ibcon#about to read 6, iclass 34, count 0 2006.229.17:46:12.17#ibcon#read 6, iclass 34, count 0 2006.229.17:46:12.17#ibcon#end of sib2, iclass 34, count 0 2006.229.17:46:12.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.17:46:12.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.17:46:12.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:46:12.17#ibcon#*before write, iclass 34, count 0 2006.229.17:46:12.17#ibcon#enter sib2, iclass 34, count 0 2006.229.17:46:12.17#ibcon#flushed, iclass 34, count 0 2006.229.17:46:12.17#ibcon#about to write, iclass 34, count 0 2006.229.17:46:12.17#ibcon#wrote, iclass 34, count 0 2006.229.17:46:12.17#ibcon#about to read 3, iclass 34, count 0 2006.229.17:46:12.21#ibcon#read 3, iclass 34, count 0 2006.229.17:46:12.21#ibcon#about to read 4, iclass 34, count 0 2006.229.17:46:12.21#ibcon#read 4, iclass 34, count 0 2006.229.17:46:12.21#ibcon#about to read 5, iclass 34, count 0 2006.229.17:46:12.21#ibcon#read 5, iclass 34, count 0 2006.229.17:46:12.21#ibcon#about to read 6, iclass 34, count 0 2006.229.17:46:12.21#ibcon#read 6, iclass 34, count 0 2006.229.17:46:12.21#ibcon#end of sib2, iclass 34, count 0 2006.229.17:46:12.21#ibcon#*after write, iclass 34, count 0 2006.229.17:46:12.21#ibcon#*before return 0, iclass 34, count 0 2006.229.17:46:12.21#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:12.21#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.17:46:12.21#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.17:46:12.21#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.17:46:12.21$vck44/vb=8,4 2006.229.17:46:12.21#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.17:46:12.21#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.17:46:12.21#ibcon#ireg 11 cls_cnt 2 2006.229.17:46:12.21#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:12.27#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:12.27#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:12.27#ibcon#enter wrdev, iclass 36, count 2 2006.229.17:46:12.27#ibcon#first serial, iclass 36, count 2 2006.229.17:46:12.27#ibcon#enter sib2, iclass 36, count 2 2006.229.17:46:12.27#ibcon#flushed, iclass 36, count 2 2006.229.17:46:12.27#ibcon#about to write, iclass 36, count 2 2006.229.17:46:12.27#ibcon#wrote, iclass 36, count 2 2006.229.17:46:12.27#ibcon#about to read 3, iclass 36, count 2 2006.229.17:46:12.29#ibcon#read 3, iclass 36, count 2 2006.229.17:46:12.29#ibcon#about to read 4, iclass 36, count 2 2006.229.17:46:12.29#ibcon#read 4, iclass 36, count 2 2006.229.17:46:12.29#ibcon#about to read 5, iclass 36, count 2 2006.229.17:46:12.29#ibcon#read 5, iclass 36, count 2 2006.229.17:46:12.29#ibcon#about to read 6, iclass 36, count 2 2006.229.17:46:12.29#ibcon#read 6, iclass 36, count 2 2006.229.17:46:12.29#ibcon#end of sib2, iclass 36, count 2 2006.229.17:46:12.29#ibcon#*mode == 0, iclass 36, count 2 2006.229.17:46:12.29#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.17:46:12.29#ibcon#[27=AT08-04\r\n] 2006.229.17:46:12.29#ibcon#*before write, iclass 36, count 2 2006.229.17:46:12.29#ibcon#enter sib2, iclass 36, count 2 2006.229.17:46:12.29#ibcon#flushed, iclass 36, count 2 2006.229.17:46:12.29#ibcon#about to write, iclass 36, count 2 2006.229.17:46:12.29#ibcon#wrote, iclass 36, count 2 2006.229.17:46:12.29#ibcon#about to read 3, iclass 36, count 2 2006.229.17:46:12.32#ibcon#read 3, iclass 36, count 2 2006.229.17:46:12.32#ibcon#about to read 4, iclass 36, count 2 2006.229.17:46:12.32#ibcon#read 4, iclass 36, count 2 2006.229.17:46:12.32#ibcon#about to read 5, iclass 36, count 2 2006.229.17:46:12.32#ibcon#read 5, iclass 36, count 2 2006.229.17:46:12.32#ibcon#about to read 6, iclass 36, count 2 2006.229.17:46:12.32#ibcon#read 6, iclass 36, count 2 2006.229.17:46:12.32#ibcon#end of sib2, iclass 36, count 2 2006.229.17:46:12.32#ibcon#*after write, iclass 36, count 2 2006.229.17:46:12.32#ibcon#*before return 0, iclass 36, count 2 2006.229.17:46:12.32#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:12.32#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.17:46:12.32#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.17:46:12.32#ibcon#ireg 7 cls_cnt 0 2006.229.17:46:12.32#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:12.44#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:12.44#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:12.44#ibcon#enter wrdev, iclass 36, count 0 2006.229.17:46:12.44#ibcon#first serial, iclass 36, count 0 2006.229.17:46:12.44#ibcon#enter sib2, iclass 36, count 0 2006.229.17:46:12.44#ibcon#flushed, iclass 36, count 0 2006.229.17:46:12.44#ibcon#about to write, iclass 36, count 0 2006.229.17:46:12.44#ibcon#wrote, iclass 36, count 0 2006.229.17:46:12.44#ibcon#about to read 3, iclass 36, count 0 2006.229.17:46:12.46#ibcon#read 3, iclass 36, count 0 2006.229.17:46:12.46#ibcon#about to read 4, iclass 36, count 0 2006.229.17:46:12.46#ibcon#read 4, iclass 36, count 0 2006.229.17:46:12.46#ibcon#about to read 5, iclass 36, count 0 2006.229.17:46:12.46#ibcon#read 5, iclass 36, count 0 2006.229.17:46:12.46#ibcon#about to read 6, iclass 36, count 0 2006.229.17:46:12.46#ibcon#read 6, iclass 36, count 0 2006.229.17:46:12.46#ibcon#end of sib2, iclass 36, count 0 2006.229.17:46:12.46#ibcon#*mode == 0, iclass 36, count 0 2006.229.17:46:12.46#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.17:46:12.46#ibcon#[27=USB\r\n] 2006.229.17:46:12.46#ibcon#*before write, iclass 36, count 0 2006.229.17:46:12.46#ibcon#enter sib2, iclass 36, count 0 2006.229.17:46:12.46#ibcon#flushed, iclass 36, count 0 2006.229.17:46:12.46#ibcon#about to write, iclass 36, count 0 2006.229.17:46:12.46#ibcon#wrote, iclass 36, count 0 2006.229.17:46:12.46#ibcon#about to read 3, iclass 36, count 0 2006.229.17:46:12.49#ibcon#read 3, iclass 36, count 0 2006.229.17:46:12.49#ibcon#about to read 4, iclass 36, count 0 2006.229.17:46:12.49#ibcon#read 4, iclass 36, count 0 2006.229.17:46:12.49#ibcon#about to read 5, iclass 36, count 0 2006.229.17:46:12.49#ibcon#read 5, iclass 36, count 0 2006.229.17:46:12.49#ibcon#about to read 6, iclass 36, count 0 2006.229.17:46:12.49#ibcon#read 6, iclass 36, count 0 2006.229.17:46:12.49#ibcon#end of sib2, iclass 36, count 0 2006.229.17:46:12.49#ibcon#*after write, iclass 36, count 0 2006.229.17:46:12.49#ibcon#*before return 0, iclass 36, count 0 2006.229.17:46:12.49#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:12.49#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.17:46:12.49#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.17:46:12.49#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.17:46:12.49$vck44/vabw=wide 2006.229.17:46:12.49#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.17:46:12.49#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.17:46:12.49#ibcon#ireg 8 cls_cnt 0 2006.229.17:46:12.49#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:12.49#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:12.49#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:12.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.17:46:12.49#ibcon#first serial, iclass 38, count 0 2006.229.17:46:12.49#ibcon#enter sib2, iclass 38, count 0 2006.229.17:46:12.49#ibcon#flushed, iclass 38, count 0 2006.229.17:46:12.49#ibcon#about to write, iclass 38, count 0 2006.229.17:46:12.49#ibcon#wrote, iclass 38, count 0 2006.229.17:46:12.49#ibcon#about to read 3, iclass 38, count 0 2006.229.17:46:12.51#ibcon#read 3, iclass 38, count 0 2006.229.17:46:12.51#ibcon#about to read 4, iclass 38, count 0 2006.229.17:46:12.51#ibcon#read 4, iclass 38, count 0 2006.229.17:46:12.51#ibcon#about to read 5, iclass 38, count 0 2006.229.17:46:12.51#ibcon#read 5, iclass 38, count 0 2006.229.17:46:12.51#ibcon#about to read 6, iclass 38, count 0 2006.229.17:46:12.51#ibcon#read 6, iclass 38, count 0 2006.229.17:46:12.51#ibcon#end of sib2, iclass 38, count 0 2006.229.17:46:12.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.17:46:12.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.17:46:12.51#ibcon#[25=BW32\r\n] 2006.229.17:46:12.51#ibcon#*before write, iclass 38, count 0 2006.229.17:46:12.51#ibcon#enter sib2, iclass 38, count 0 2006.229.17:46:12.51#ibcon#flushed, iclass 38, count 0 2006.229.17:46:12.51#ibcon#about to write, iclass 38, count 0 2006.229.17:46:12.51#ibcon#wrote, iclass 38, count 0 2006.229.17:46:12.51#ibcon#about to read 3, iclass 38, count 0 2006.229.17:46:12.54#ibcon#read 3, iclass 38, count 0 2006.229.17:46:12.54#ibcon#about to read 4, iclass 38, count 0 2006.229.17:46:12.54#ibcon#read 4, iclass 38, count 0 2006.229.17:46:12.54#ibcon#about to read 5, iclass 38, count 0 2006.229.17:46:12.54#ibcon#read 5, iclass 38, count 0 2006.229.17:46:12.54#ibcon#about to read 6, iclass 38, count 0 2006.229.17:46:12.54#ibcon#read 6, iclass 38, count 0 2006.229.17:46:12.54#ibcon#end of sib2, iclass 38, count 0 2006.229.17:46:12.54#ibcon#*after write, iclass 38, count 0 2006.229.17:46:12.54#ibcon#*before return 0, iclass 38, count 0 2006.229.17:46:12.54#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:12.54#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.17:46:12.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.17:46:12.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.17:46:12.54$vck44/vbbw=wide 2006.229.17:46:12.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.17:46:12.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.17:46:12.54#ibcon#ireg 8 cls_cnt 0 2006.229.17:46:12.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:46:12.61#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:46:12.61#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:46:12.61#ibcon#enter wrdev, iclass 40, count 0 2006.229.17:46:12.61#ibcon#first serial, iclass 40, count 0 2006.229.17:46:12.61#ibcon#enter sib2, iclass 40, count 0 2006.229.17:46:12.61#ibcon#flushed, iclass 40, count 0 2006.229.17:46:12.61#ibcon#about to write, iclass 40, count 0 2006.229.17:46:12.61#ibcon#wrote, iclass 40, count 0 2006.229.17:46:12.61#ibcon#about to read 3, iclass 40, count 0 2006.229.17:46:12.63#ibcon#read 3, iclass 40, count 0 2006.229.17:46:12.63#ibcon#about to read 4, iclass 40, count 0 2006.229.17:46:12.63#ibcon#read 4, iclass 40, count 0 2006.229.17:46:12.63#ibcon#about to read 5, iclass 40, count 0 2006.229.17:46:12.63#ibcon#read 5, iclass 40, count 0 2006.229.17:46:12.63#ibcon#about to read 6, iclass 40, count 0 2006.229.17:46:12.63#ibcon#read 6, iclass 40, count 0 2006.229.17:46:12.63#ibcon#end of sib2, iclass 40, count 0 2006.229.17:46:12.63#ibcon#*mode == 0, iclass 40, count 0 2006.229.17:46:12.63#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.17:46:12.63#ibcon#[27=BW32\r\n] 2006.229.17:46:12.63#ibcon#*before write, iclass 40, count 0 2006.229.17:46:12.63#ibcon#enter sib2, iclass 40, count 0 2006.229.17:46:12.63#ibcon#flushed, iclass 40, count 0 2006.229.17:46:12.63#ibcon#about to write, iclass 40, count 0 2006.229.17:46:12.63#ibcon#wrote, iclass 40, count 0 2006.229.17:46:12.63#ibcon#about to read 3, iclass 40, count 0 2006.229.17:46:12.66#ibcon#read 3, iclass 40, count 0 2006.229.17:46:12.66#ibcon#about to read 4, iclass 40, count 0 2006.229.17:46:12.66#ibcon#read 4, iclass 40, count 0 2006.229.17:46:12.66#ibcon#about to read 5, iclass 40, count 0 2006.229.17:46:12.66#ibcon#read 5, iclass 40, count 0 2006.229.17:46:12.66#ibcon#about to read 6, iclass 40, count 0 2006.229.17:46:12.66#ibcon#read 6, iclass 40, count 0 2006.229.17:46:12.66#ibcon#end of sib2, iclass 40, count 0 2006.229.17:46:12.66#ibcon#*after write, iclass 40, count 0 2006.229.17:46:12.66#ibcon#*before return 0, iclass 40, count 0 2006.229.17:46:12.66#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:46:12.66#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.17:46:12.66#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.17:46:12.66#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.17:46:12.66$setupk4/ifdk4 2006.229.17:46:12.66$ifdk4/lo= 2006.229.17:46:12.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:46:12.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:46:12.66$ifdk4/patch= 2006.229.17:46:12.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:46:12.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:46:12.66$setupk4/!*+20s 2006.229.17:46:14.63#abcon#<5=/08 1.1 3.0 26.871001001.5\r\n> 2006.229.17:46:14.65#abcon#{5=INTERFACE CLEAR} 2006.229.17:46:14.71#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:46:19.14#trakl#Source acquired 2006.229.17:46:21.14#flagr#flagr/antenna,acquired 2006.229.17:46:24.80#abcon#<5=/08 1.1 2.6 26.861001001.5\r\n> 2006.229.17:46:24.82#abcon#{5=INTERFACE CLEAR} 2006.229.17:46:24.88#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:46:27.17$setupk4/"tpicd 2006.229.17:46:27.17$setupk4/echo=off 2006.229.17:46:27.17$setupk4/xlog=off 2006.229.17:46:27.17:!2006.229.17:55:17 2006.229.17:55:17.00:preob 2006.229.17:55:17.14/onsource/TRACKING 2006.229.17:55:17.14:!2006.229.17:55:27 2006.229.17:55:27.00:"tape 2006.229.17:55:27.00:"st=record 2006.229.17:55:27.00:data_valid=on 2006.229.17:55:27.00:midob 2006.229.17:55:27.14/onsource/TRACKING 2006.229.17:55:27.14/wx/26.76,1001.4,100 2006.229.17:55:27.37/cable/+6.4181E-03 2006.229.17:55:28.46/va/01,08,usb,yes,38,41 2006.229.17:55:28.46/va/02,07,usb,yes,41,42 2006.229.17:55:28.46/va/03,06,usb,yes,51,54 2006.229.17:55:28.46/va/04,07,usb,yes,42,44 2006.229.17:55:28.46/va/05,04,usb,yes,38,39 2006.229.17:55:28.46/va/06,04,usb,yes,43,42 2006.229.17:55:28.46/va/07,05,usb,yes,38,39 2006.229.17:55:28.46/va/08,06,usb,yes,28,34 2006.229.17:55:28.69/valo/01,524.99,yes,locked 2006.229.17:55:28.69/valo/02,534.99,yes,locked 2006.229.17:55:28.69/valo/03,564.99,yes,locked 2006.229.17:55:28.69/valo/04,624.99,yes,locked 2006.229.17:55:28.69/valo/05,734.99,yes,locked 2006.229.17:55:28.69/valo/06,814.99,yes,locked 2006.229.17:55:28.69/valo/07,864.99,yes,locked 2006.229.17:55:28.69/valo/08,884.99,yes,locked 2006.229.17:55:29.78/vb/01,04,usb,yes,31,29 2006.229.17:55:29.78/vb/02,04,usb,yes,34,33 2006.229.17:55:29.78/vb/03,04,usb,yes,31,34 2006.229.17:55:29.78/vb/04,04,usb,yes,35,34 2006.229.17:55:29.78/vb/05,04,usb,yes,27,30 2006.229.17:55:29.78/vb/06,04,usb,yes,32,28 2006.229.17:55:29.78/vb/07,04,usb,yes,32,32 2006.229.17:55:29.78/vb/08,04,usb,yes,29,33 2006.229.17:55:30.02/vblo/01,629.99,yes,locked 2006.229.17:55:30.02/vblo/02,634.99,yes,locked 2006.229.17:55:30.02/vblo/03,649.99,yes,locked 2006.229.17:55:30.02/vblo/04,679.99,yes,locked 2006.229.17:55:30.02/vblo/05,709.99,yes,locked 2006.229.17:55:30.02/vblo/06,719.99,yes,locked 2006.229.17:55:30.02/vblo/07,734.99,yes,locked 2006.229.17:55:30.02/vblo/08,744.99,yes,locked 2006.229.17:55:30.17/vabw/8 2006.229.17:55:30.32/vbbw/8 2006.229.17:55:30.48/xfe/off,on,12.0 2006.229.17:55:30.86/ifatt/23,28,28,28 2006.229.17:55:31.07/fmout-gps/S +4.59E-07 2006.229.17:55:31.11:!2006.229.17:57:47 2006.229.17:57:47.01:data_valid=off 2006.229.17:57:47.02:"et 2006.229.17:57:47.02:!+3s 2006.229.17:57:50.03:"tape 2006.229.17:57:50.04:postob 2006.229.17:57:50.09/cable/+6.4161E-03 2006.229.17:57:50.10/wx/26.73,1001.4,100 2006.229.17:57:50.15/fmout-gps/S +4.58E-07 2006.229.17:57:50.16:scan_name=229-1800,jd0608,80 2006.229.17:57:50.16:source=2136+141,213901.31,142336.0,2000.0,ccw 2006.229.17:57:51.13#flagr#flagr/antenna,new-source 2006.229.17:57:51.14:checkk5 2006.229.17:57:51.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.17:57:51.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.17:57:52.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.17:57:52.78/chk_autoobs//k5ts4/ autoobs is running! 2006.229.17:57:53.18/chk_obsdata//k5ts1/T2291755??a.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.17:57:53.58/chk_obsdata//k5ts2/T2291755??b.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.17:57:53.98/chk_obsdata//k5ts3/T2291755??c.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.17:57:54.38/chk_obsdata//k5ts4/T2291755??d.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.17:57:55.09/k5log//k5ts1_log_newline 2006.229.17:57:55.80/k5log//k5ts2_log_newline 2006.229.17:57:56.51/k5log//k5ts3_log_newline 2006.229.17:57:57.23/k5log//k5ts4_log_newline 2006.229.17:57:57.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.17:57:57.26:setupk4=1 2006.229.17:57:57.26$setupk4/echo=on 2006.229.17:57:57.26$setupk4/pcalon 2006.229.17:57:57.26$pcalon/"no phase cal control is implemented here 2006.229.17:57:57.26$setupk4/"tpicd=stop 2006.229.17:57:57.26$setupk4/"rec=synch_on 2006.229.17:57:57.26$setupk4/"rec_mode=128 2006.229.17:57:57.26$setupk4/!* 2006.229.17:57:57.26$setupk4/recpk4 2006.229.17:57:57.26$recpk4/recpatch= 2006.229.17:57:57.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.17:57:57.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.17:57:57.26$setupk4/vck44 2006.229.17:57:57.26$vck44/valo=1,524.99 2006.229.17:57:57.26#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.17:57:57.26#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.17:57:57.26#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:57.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:57:57.26#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:57:57.26#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:57:57.26#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:57:57.26#ibcon#first serial, iclass 37, count 0 2006.229.17:57:57.26#ibcon#enter sib2, iclass 37, count 0 2006.229.17:57:57.26#ibcon#flushed, iclass 37, count 0 2006.229.17:57:57.26#ibcon#about to write, iclass 37, count 0 2006.229.17:57:57.26#ibcon#wrote, iclass 37, count 0 2006.229.17:57:57.26#ibcon#about to read 3, iclass 37, count 0 2006.229.17:57:57.28#ibcon#read 3, iclass 37, count 0 2006.229.17:57:57.28#ibcon#about to read 4, iclass 37, count 0 2006.229.17:57:57.28#ibcon#read 4, iclass 37, count 0 2006.229.17:57:57.28#ibcon#about to read 5, iclass 37, count 0 2006.229.17:57:57.28#ibcon#read 5, iclass 37, count 0 2006.229.17:57:57.28#ibcon#about to read 6, iclass 37, count 0 2006.229.17:57:57.28#ibcon#read 6, iclass 37, count 0 2006.229.17:57:57.28#ibcon#end of sib2, iclass 37, count 0 2006.229.17:57:57.28#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:57:57.28#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:57:57.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.17:57:57.28#ibcon#*before write, iclass 37, count 0 2006.229.17:57:57.28#ibcon#enter sib2, iclass 37, count 0 2006.229.17:57:57.28#ibcon#flushed, iclass 37, count 0 2006.229.17:57:57.28#ibcon#about to write, iclass 37, count 0 2006.229.17:57:57.28#ibcon#wrote, iclass 37, count 0 2006.229.17:57:57.28#ibcon#about to read 3, iclass 37, count 0 2006.229.17:57:57.33#ibcon#read 3, iclass 37, count 0 2006.229.17:57:57.33#ibcon#about to read 4, iclass 37, count 0 2006.229.17:57:57.33#ibcon#read 4, iclass 37, count 0 2006.229.17:57:57.33#ibcon#about to read 5, iclass 37, count 0 2006.229.17:57:57.33#ibcon#read 5, iclass 37, count 0 2006.229.17:57:57.33#ibcon#about to read 6, iclass 37, count 0 2006.229.17:57:57.33#ibcon#read 6, iclass 37, count 0 2006.229.17:57:57.33#ibcon#end of sib2, iclass 37, count 0 2006.229.17:57:57.33#ibcon#*after write, iclass 37, count 0 2006.229.17:57:57.33#ibcon#*before return 0, iclass 37, count 0 2006.229.17:57:57.33#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:57:57.33#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:57:57.33#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:57:57.33#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:57:57.33$vck44/va=1,8 2006.229.17:57:57.33#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.17:57:57.33#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.17:57:57.33#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:57.33#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:57:57.33#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:57:57.33#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:57:57.33#ibcon#enter wrdev, iclass 39, count 2 2006.229.17:57:57.33#ibcon#first serial, iclass 39, count 2 2006.229.17:57:57.33#ibcon#enter sib2, iclass 39, count 2 2006.229.17:57:57.33#ibcon#flushed, iclass 39, count 2 2006.229.17:57:57.33#ibcon#about to write, iclass 39, count 2 2006.229.17:57:57.33#ibcon#wrote, iclass 39, count 2 2006.229.17:57:57.33#ibcon#about to read 3, iclass 39, count 2 2006.229.17:57:57.35#ibcon#read 3, iclass 39, count 2 2006.229.17:57:57.35#ibcon#about to read 4, iclass 39, count 2 2006.229.17:57:57.35#ibcon#read 4, iclass 39, count 2 2006.229.17:57:57.35#ibcon#about to read 5, iclass 39, count 2 2006.229.17:57:57.35#ibcon#read 5, iclass 39, count 2 2006.229.17:57:57.35#ibcon#about to read 6, iclass 39, count 2 2006.229.17:57:57.35#ibcon#read 6, iclass 39, count 2 2006.229.17:57:57.35#ibcon#end of sib2, iclass 39, count 2 2006.229.17:57:57.35#ibcon#*mode == 0, iclass 39, count 2 2006.229.17:57:57.35#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.17:57:57.35#ibcon#[25=AT01-08\r\n] 2006.229.17:57:57.35#ibcon#*before write, iclass 39, count 2 2006.229.17:57:57.35#ibcon#enter sib2, iclass 39, count 2 2006.229.17:57:57.35#ibcon#flushed, iclass 39, count 2 2006.229.17:57:57.35#ibcon#about to write, iclass 39, count 2 2006.229.17:57:57.35#ibcon#wrote, iclass 39, count 2 2006.229.17:57:57.35#ibcon#about to read 3, iclass 39, count 2 2006.229.17:57:57.38#ibcon#read 3, iclass 39, count 2 2006.229.17:57:57.38#ibcon#about to read 4, iclass 39, count 2 2006.229.17:57:57.38#ibcon#read 4, iclass 39, count 2 2006.229.17:57:57.38#ibcon#about to read 5, iclass 39, count 2 2006.229.17:57:57.38#ibcon#read 5, iclass 39, count 2 2006.229.17:57:57.38#ibcon#about to read 6, iclass 39, count 2 2006.229.17:57:57.38#ibcon#read 6, iclass 39, count 2 2006.229.17:57:57.38#ibcon#end of sib2, iclass 39, count 2 2006.229.17:57:57.38#ibcon#*after write, iclass 39, count 2 2006.229.17:57:57.38#ibcon#*before return 0, iclass 39, count 2 2006.229.17:57:57.38#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:57:57.38#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:57:57.38#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.17:57:57.38#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:57.38#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:57:57.50#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:57:57.50#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:57:57.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:57:57.50#ibcon#first serial, iclass 39, count 0 2006.229.17:57:57.50#ibcon#enter sib2, iclass 39, count 0 2006.229.17:57:57.50#ibcon#flushed, iclass 39, count 0 2006.229.17:57:57.50#ibcon#about to write, iclass 39, count 0 2006.229.17:57:57.50#ibcon#wrote, iclass 39, count 0 2006.229.17:57:57.50#ibcon#about to read 3, iclass 39, count 0 2006.229.17:57:57.52#ibcon#read 3, iclass 39, count 0 2006.229.17:57:57.52#ibcon#about to read 4, iclass 39, count 0 2006.229.17:57:57.52#ibcon#read 4, iclass 39, count 0 2006.229.17:57:57.52#ibcon#about to read 5, iclass 39, count 0 2006.229.17:57:57.52#ibcon#read 5, iclass 39, count 0 2006.229.17:57:57.52#ibcon#about to read 6, iclass 39, count 0 2006.229.17:57:57.52#ibcon#read 6, iclass 39, count 0 2006.229.17:57:57.52#ibcon#end of sib2, iclass 39, count 0 2006.229.17:57:57.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:57:57.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:57:57.52#ibcon#[25=USB\r\n] 2006.229.17:57:57.52#ibcon#*before write, iclass 39, count 0 2006.229.17:57:57.52#ibcon#enter sib2, iclass 39, count 0 2006.229.17:57:57.52#ibcon#flushed, iclass 39, count 0 2006.229.17:57:57.52#ibcon#about to write, iclass 39, count 0 2006.229.17:57:57.52#ibcon#wrote, iclass 39, count 0 2006.229.17:57:57.52#ibcon#about to read 3, iclass 39, count 0 2006.229.17:57:57.55#ibcon#read 3, iclass 39, count 0 2006.229.17:57:57.55#ibcon#about to read 4, iclass 39, count 0 2006.229.17:57:57.55#ibcon#read 4, iclass 39, count 0 2006.229.17:57:57.55#ibcon#about to read 5, iclass 39, count 0 2006.229.17:57:57.55#ibcon#read 5, iclass 39, count 0 2006.229.17:57:57.55#ibcon#about to read 6, iclass 39, count 0 2006.229.17:57:57.55#ibcon#read 6, iclass 39, count 0 2006.229.17:57:57.55#ibcon#end of sib2, iclass 39, count 0 2006.229.17:57:57.55#ibcon#*after write, iclass 39, count 0 2006.229.17:57:57.55#ibcon#*before return 0, iclass 39, count 0 2006.229.17:57:57.55#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:57:57.55#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:57:57.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:57:57.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:57:57.55$vck44/valo=2,534.99 2006.229.17:57:57.55#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:57:57.55#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:57:57.55#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:57.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:57:57.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:57:57.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:57:57.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:57:57.55#ibcon#first serial, iclass 3, count 0 2006.229.17:57:57.55#ibcon#enter sib2, iclass 3, count 0 2006.229.17:57:57.55#ibcon#flushed, iclass 3, count 0 2006.229.17:57:57.55#ibcon#about to write, iclass 3, count 0 2006.229.17:57:57.55#ibcon#wrote, iclass 3, count 0 2006.229.17:57:57.55#ibcon#about to read 3, iclass 3, count 0 2006.229.17:57:57.57#ibcon#read 3, iclass 3, count 0 2006.229.17:57:57.57#ibcon#about to read 4, iclass 3, count 0 2006.229.17:57:57.57#ibcon#read 4, iclass 3, count 0 2006.229.17:57:57.57#ibcon#about to read 5, iclass 3, count 0 2006.229.17:57:57.57#ibcon#read 5, iclass 3, count 0 2006.229.17:57:57.57#ibcon#about to read 6, iclass 3, count 0 2006.229.17:57:57.57#ibcon#read 6, iclass 3, count 0 2006.229.17:57:57.57#ibcon#end of sib2, iclass 3, count 0 2006.229.17:57:57.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:57:57.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:57:57.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.17:57:57.57#ibcon#*before write, iclass 3, count 0 2006.229.17:57:57.57#ibcon#enter sib2, iclass 3, count 0 2006.229.17:57:57.57#ibcon#flushed, iclass 3, count 0 2006.229.17:57:57.57#ibcon#about to write, iclass 3, count 0 2006.229.17:57:57.57#ibcon#wrote, iclass 3, count 0 2006.229.17:57:57.57#ibcon#about to read 3, iclass 3, count 0 2006.229.17:57:57.61#ibcon#read 3, iclass 3, count 0 2006.229.17:57:57.61#ibcon#about to read 4, iclass 3, count 0 2006.229.17:57:57.61#ibcon#read 4, iclass 3, count 0 2006.229.17:57:57.61#ibcon#about to read 5, iclass 3, count 0 2006.229.17:57:57.61#ibcon#read 5, iclass 3, count 0 2006.229.17:57:57.61#ibcon#about to read 6, iclass 3, count 0 2006.229.17:57:57.61#ibcon#read 6, iclass 3, count 0 2006.229.17:57:57.61#ibcon#end of sib2, iclass 3, count 0 2006.229.17:57:57.61#ibcon#*after write, iclass 3, count 0 2006.229.17:57:57.61#ibcon#*before return 0, iclass 3, count 0 2006.229.17:57:57.61#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:57:57.61#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:57:57.61#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:57:57.61#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:57:57.61$vck44/va=2,7 2006.229.17:57:57.61#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.17:57:57.61#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.17:57:57.61#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:57.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:57:57.67#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:57:57.67#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:57:57.67#ibcon#enter wrdev, iclass 5, count 2 2006.229.17:57:57.67#ibcon#first serial, iclass 5, count 2 2006.229.17:57:57.67#ibcon#enter sib2, iclass 5, count 2 2006.229.17:57:57.67#ibcon#flushed, iclass 5, count 2 2006.229.17:57:57.67#ibcon#about to write, iclass 5, count 2 2006.229.17:57:57.67#ibcon#wrote, iclass 5, count 2 2006.229.17:57:57.67#ibcon#about to read 3, iclass 5, count 2 2006.229.17:57:57.69#ibcon#read 3, iclass 5, count 2 2006.229.17:57:57.69#ibcon#about to read 4, iclass 5, count 2 2006.229.17:57:57.69#ibcon#read 4, iclass 5, count 2 2006.229.17:57:57.69#ibcon#about to read 5, iclass 5, count 2 2006.229.17:57:57.69#ibcon#read 5, iclass 5, count 2 2006.229.17:57:57.69#ibcon#about to read 6, iclass 5, count 2 2006.229.17:57:57.69#ibcon#read 6, iclass 5, count 2 2006.229.17:57:57.69#ibcon#end of sib2, iclass 5, count 2 2006.229.17:57:57.69#ibcon#*mode == 0, iclass 5, count 2 2006.229.17:57:57.69#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.17:57:57.69#ibcon#[25=AT02-07\r\n] 2006.229.17:57:57.69#ibcon#*before write, iclass 5, count 2 2006.229.17:57:57.69#ibcon#enter sib2, iclass 5, count 2 2006.229.17:57:57.69#ibcon#flushed, iclass 5, count 2 2006.229.17:57:57.69#ibcon#about to write, iclass 5, count 2 2006.229.17:57:57.69#ibcon#wrote, iclass 5, count 2 2006.229.17:57:57.69#ibcon#about to read 3, iclass 5, count 2 2006.229.17:57:57.72#ibcon#read 3, iclass 5, count 2 2006.229.17:57:57.72#ibcon#about to read 4, iclass 5, count 2 2006.229.17:57:57.72#ibcon#read 4, iclass 5, count 2 2006.229.17:57:57.72#ibcon#about to read 5, iclass 5, count 2 2006.229.17:57:57.72#ibcon#read 5, iclass 5, count 2 2006.229.17:57:57.72#ibcon#about to read 6, iclass 5, count 2 2006.229.17:57:57.72#ibcon#read 6, iclass 5, count 2 2006.229.17:57:57.72#ibcon#end of sib2, iclass 5, count 2 2006.229.17:57:57.72#ibcon#*after write, iclass 5, count 2 2006.229.17:57:57.72#ibcon#*before return 0, iclass 5, count 2 2006.229.17:57:57.72#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:57:57.72#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:57:57.72#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.17:57:57.72#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:57.72#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:57:57.84#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:57:57.84#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:57:57.84#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:57:57.84#ibcon#first serial, iclass 5, count 0 2006.229.17:57:57.84#ibcon#enter sib2, iclass 5, count 0 2006.229.17:57:57.84#ibcon#flushed, iclass 5, count 0 2006.229.17:57:57.84#ibcon#about to write, iclass 5, count 0 2006.229.17:57:57.84#ibcon#wrote, iclass 5, count 0 2006.229.17:57:57.84#ibcon#about to read 3, iclass 5, count 0 2006.229.17:57:57.86#ibcon#read 3, iclass 5, count 0 2006.229.17:57:57.86#ibcon#about to read 4, iclass 5, count 0 2006.229.17:57:57.86#ibcon#read 4, iclass 5, count 0 2006.229.17:57:57.86#ibcon#about to read 5, iclass 5, count 0 2006.229.17:57:57.86#ibcon#read 5, iclass 5, count 0 2006.229.17:57:57.86#ibcon#about to read 6, iclass 5, count 0 2006.229.17:57:57.86#ibcon#read 6, iclass 5, count 0 2006.229.17:57:57.86#ibcon#end of sib2, iclass 5, count 0 2006.229.17:57:57.86#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:57:57.86#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:57:57.86#ibcon#[25=USB\r\n] 2006.229.17:57:57.86#ibcon#*before write, iclass 5, count 0 2006.229.17:57:57.86#ibcon#enter sib2, iclass 5, count 0 2006.229.17:57:57.86#ibcon#flushed, iclass 5, count 0 2006.229.17:57:57.86#ibcon#about to write, iclass 5, count 0 2006.229.17:57:57.86#ibcon#wrote, iclass 5, count 0 2006.229.17:57:57.86#ibcon#about to read 3, iclass 5, count 0 2006.229.17:57:57.89#ibcon#read 3, iclass 5, count 0 2006.229.17:57:57.89#ibcon#about to read 4, iclass 5, count 0 2006.229.17:57:57.89#ibcon#read 4, iclass 5, count 0 2006.229.17:57:57.89#ibcon#about to read 5, iclass 5, count 0 2006.229.17:57:57.89#ibcon#read 5, iclass 5, count 0 2006.229.17:57:57.89#ibcon#about to read 6, iclass 5, count 0 2006.229.17:57:57.89#ibcon#read 6, iclass 5, count 0 2006.229.17:57:57.89#ibcon#end of sib2, iclass 5, count 0 2006.229.17:57:57.89#ibcon#*after write, iclass 5, count 0 2006.229.17:57:57.89#ibcon#*before return 0, iclass 5, count 0 2006.229.17:57:57.89#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:57:57.89#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:57:57.89#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:57:57.89#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:57:57.89$vck44/valo=3,564.99 2006.229.17:57:57.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.17:57:57.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.17:57:57.89#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:57.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:57:57.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:57:57.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:57:57.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:57:57.89#ibcon#first serial, iclass 7, count 0 2006.229.17:57:57.89#ibcon#enter sib2, iclass 7, count 0 2006.229.17:57:57.89#ibcon#flushed, iclass 7, count 0 2006.229.17:57:57.89#ibcon#about to write, iclass 7, count 0 2006.229.17:57:57.89#ibcon#wrote, iclass 7, count 0 2006.229.17:57:57.89#ibcon#about to read 3, iclass 7, count 0 2006.229.17:57:57.91#ibcon#read 3, iclass 7, count 0 2006.229.17:57:57.91#ibcon#about to read 4, iclass 7, count 0 2006.229.17:57:57.91#ibcon#read 4, iclass 7, count 0 2006.229.17:57:57.91#ibcon#about to read 5, iclass 7, count 0 2006.229.17:57:57.91#ibcon#read 5, iclass 7, count 0 2006.229.17:57:57.91#ibcon#about to read 6, iclass 7, count 0 2006.229.17:57:57.91#ibcon#read 6, iclass 7, count 0 2006.229.17:57:57.91#ibcon#end of sib2, iclass 7, count 0 2006.229.17:57:57.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:57:57.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:57:57.91#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.17:57:57.91#ibcon#*before write, iclass 7, count 0 2006.229.17:57:57.91#ibcon#enter sib2, iclass 7, count 0 2006.229.17:57:57.91#ibcon#flushed, iclass 7, count 0 2006.229.17:57:57.91#ibcon#about to write, iclass 7, count 0 2006.229.17:57:57.91#ibcon#wrote, iclass 7, count 0 2006.229.17:57:57.91#ibcon#about to read 3, iclass 7, count 0 2006.229.17:57:57.95#ibcon#read 3, iclass 7, count 0 2006.229.17:57:57.95#ibcon#about to read 4, iclass 7, count 0 2006.229.17:57:57.95#ibcon#read 4, iclass 7, count 0 2006.229.17:57:57.95#ibcon#about to read 5, iclass 7, count 0 2006.229.17:57:57.95#ibcon#read 5, iclass 7, count 0 2006.229.17:57:57.95#ibcon#about to read 6, iclass 7, count 0 2006.229.17:57:57.95#ibcon#read 6, iclass 7, count 0 2006.229.17:57:57.95#ibcon#end of sib2, iclass 7, count 0 2006.229.17:57:57.95#ibcon#*after write, iclass 7, count 0 2006.229.17:57:57.95#ibcon#*before return 0, iclass 7, count 0 2006.229.17:57:57.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:57:57.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:57:57.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:57:57.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:57:57.95$vck44/va=3,6 2006.229.17:57:57.95#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.17:57:57.95#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.17:57:57.95#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:57.95#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:57:58.01#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:57:58.01#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:57:58.01#ibcon#enter wrdev, iclass 11, count 2 2006.229.17:57:58.01#ibcon#first serial, iclass 11, count 2 2006.229.17:57:58.01#ibcon#enter sib2, iclass 11, count 2 2006.229.17:57:58.01#ibcon#flushed, iclass 11, count 2 2006.229.17:57:58.01#ibcon#about to write, iclass 11, count 2 2006.229.17:57:58.01#ibcon#wrote, iclass 11, count 2 2006.229.17:57:58.01#ibcon#about to read 3, iclass 11, count 2 2006.229.17:57:58.03#ibcon#read 3, iclass 11, count 2 2006.229.17:57:58.03#ibcon#about to read 4, iclass 11, count 2 2006.229.17:57:58.03#ibcon#read 4, iclass 11, count 2 2006.229.17:57:58.03#ibcon#about to read 5, iclass 11, count 2 2006.229.17:57:58.03#ibcon#read 5, iclass 11, count 2 2006.229.17:57:58.03#ibcon#about to read 6, iclass 11, count 2 2006.229.17:57:58.03#ibcon#read 6, iclass 11, count 2 2006.229.17:57:58.03#ibcon#end of sib2, iclass 11, count 2 2006.229.17:57:58.03#ibcon#*mode == 0, iclass 11, count 2 2006.229.17:57:58.03#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.17:57:58.03#ibcon#[25=AT03-06\r\n] 2006.229.17:57:58.03#ibcon#*before write, iclass 11, count 2 2006.229.17:57:58.03#ibcon#enter sib2, iclass 11, count 2 2006.229.17:57:58.03#ibcon#flushed, iclass 11, count 2 2006.229.17:57:58.03#ibcon#about to write, iclass 11, count 2 2006.229.17:57:58.03#ibcon#wrote, iclass 11, count 2 2006.229.17:57:58.03#ibcon#about to read 3, iclass 11, count 2 2006.229.17:57:58.06#ibcon#read 3, iclass 11, count 2 2006.229.17:57:58.06#ibcon#about to read 4, iclass 11, count 2 2006.229.17:57:58.06#ibcon#read 4, iclass 11, count 2 2006.229.17:57:58.06#ibcon#about to read 5, iclass 11, count 2 2006.229.17:57:58.06#ibcon#read 5, iclass 11, count 2 2006.229.17:57:58.06#ibcon#about to read 6, iclass 11, count 2 2006.229.17:57:58.06#ibcon#read 6, iclass 11, count 2 2006.229.17:57:58.06#ibcon#end of sib2, iclass 11, count 2 2006.229.17:57:58.06#ibcon#*after write, iclass 11, count 2 2006.229.17:57:58.06#ibcon#*before return 0, iclass 11, count 2 2006.229.17:57:58.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:57:58.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:57:58.06#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.17:57:58.06#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:58.06#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:57:58.18#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:57:58.18#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:57:58.18#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:57:58.18#ibcon#first serial, iclass 11, count 0 2006.229.17:57:58.18#ibcon#enter sib2, iclass 11, count 0 2006.229.17:57:58.18#ibcon#flushed, iclass 11, count 0 2006.229.17:57:58.18#ibcon#about to write, iclass 11, count 0 2006.229.17:57:58.18#ibcon#wrote, iclass 11, count 0 2006.229.17:57:58.18#ibcon#about to read 3, iclass 11, count 0 2006.229.17:57:58.20#ibcon#read 3, iclass 11, count 0 2006.229.17:57:58.20#ibcon#about to read 4, iclass 11, count 0 2006.229.17:57:58.20#ibcon#read 4, iclass 11, count 0 2006.229.17:57:58.20#ibcon#about to read 5, iclass 11, count 0 2006.229.17:57:58.20#ibcon#read 5, iclass 11, count 0 2006.229.17:57:58.20#ibcon#about to read 6, iclass 11, count 0 2006.229.17:57:58.20#ibcon#read 6, iclass 11, count 0 2006.229.17:57:58.20#ibcon#end of sib2, iclass 11, count 0 2006.229.17:57:58.20#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:57:58.20#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:57:58.20#ibcon#[25=USB\r\n] 2006.229.17:57:58.20#ibcon#*before write, iclass 11, count 0 2006.229.17:57:58.20#ibcon#enter sib2, iclass 11, count 0 2006.229.17:57:58.20#ibcon#flushed, iclass 11, count 0 2006.229.17:57:58.20#ibcon#about to write, iclass 11, count 0 2006.229.17:57:58.20#ibcon#wrote, iclass 11, count 0 2006.229.17:57:58.20#ibcon#about to read 3, iclass 11, count 0 2006.229.17:57:58.23#ibcon#read 3, iclass 11, count 0 2006.229.17:57:58.23#ibcon#about to read 4, iclass 11, count 0 2006.229.17:57:58.23#ibcon#read 4, iclass 11, count 0 2006.229.17:57:58.23#ibcon#about to read 5, iclass 11, count 0 2006.229.17:57:58.23#ibcon#read 5, iclass 11, count 0 2006.229.17:57:58.23#ibcon#about to read 6, iclass 11, count 0 2006.229.17:57:58.23#ibcon#read 6, iclass 11, count 0 2006.229.17:57:58.23#ibcon#end of sib2, iclass 11, count 0 2006.229.17:57:58.23#ibcon#*after write, iclass 11, count 0 2006.229.17:57:58.23#ibcon#*before return 0, iclass 11, count 0 2006.229.17:57:58.23#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:57:58.23#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:57:58.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:57:58.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:57:58.23$vck44/valo=4,624.99 2006.229.17:57:58.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.17:57:58.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.17:57:58.23#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:58.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:57:58.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:57:58.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:57:58.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:57:58.23#ibcon#first serial, iclass 13, count 0 2006.229.17:57:58.23#ibcon#enter sib2, iclass 13, count 0 2006.229.17:57:58.23#ibcon#flushed, iclass 13, count 0 2006.229.17:57:58.23#ibcon#about to write, iclass 13, count 0 2006.229.17:57:58.23#ibcon#wrote, iclass 13, count 0 2006.229.17:57:58.23#ibcon#about to read 3, iclass 13, count 0 2006.229.17:57:58.25#ibcon#read 3, iclass 13, count 0 2006.229.17:57:58.25#ibcon#about to read 4, iclass 13, count 0 2006.229.17:57:58.25#ibcon#read 4, iclass 13, count 0 2006.229.17:57:58.25#ibcon#about to read 5, iclass 13, count 0 2006.229.17:57:58.25#ibcon#read 5, iclass 13, count 0 2006.229.17:57:58.25#ibcon#about to read 6, iclass 13, count 0 2006.229.17:57:58.25#ibcon#read 6, iclass 13, count 0 2006.229.17:57:58.25#ibcon#end of sib2, iclass 13, count 0 2006.229.17:57:58.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:57:58.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:57:58.25#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.17:57:58.25#ibcon#*before write, iclass 13, count 0 2006.229.17:57:58.25#ibcon#enter sib2, iclass 13, count 0 2006.229.17:57:58.25#ibcon#flushed, iclass 13, count 0 2006.229.17:57:58.25#ibcon#about to write, iclass 13, count 0 2006.229.17:57:58.25#ibcon#wrote, iclass 13, count 0 2006.229.17:57:58.25#ibcon#about to read 3, iclass 13, count 0 2006.229.17:57:58.29#ibcon#read 3, iclass 13, count 0 2006.229.17:57:58.29#ibcon#about to read 4, iclass 13, count 0 2006.229.17:57:58.29#ibcon#read 4, iclass 13, count 0 2006.229.17:57:58.29#ibcon#about to read 5, iclass 13, count 0 2006.229.17:57:58.29#ibcon#read 5, iclass 13, count 0 2006.229.17:57:58.29#ibcon#about to read 6, iclass 13, count 0 2006.229.17:57:58.29#ibcon#read 6, iclass 13, count 0 2006.229.17:57:58.29#ibcon#end of sib2, iclass 13, count 0 2006.229.17:57:58.29#ibcon#*after write, iclass 13, count 0 2006.229.17:57:58.29#ibcon#*before return 0, iclass 13, count 0 2006.229.17:57:58.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:57:58.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:57:58.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:57:58.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:57:58.29$vck44/va=4,7 2006.229.17:57:58.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.17:57:58.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.17:57:58.29#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:58.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:57:58.35#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:57:58.35#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:57:58.35#ibcon#enter wrdev, iclass 15, count 2 2006.229.17:57:58.35#ibcon#first serial, iclass 15, count 2 2006.229.17:57:58.35#ibcon#enter sib2, iclass 15, count 2 2006.229.17:57:58.35#ibcon#flushed, iclass 15, count 2 2006.229.17:57:58.35#ibcon#about to write, iclass 15, count 2 2006.229.17:57:58.35#ibcon#wrote, iclass 15, count 2 2006.229.17:57:58.35#ibcon#about to read 3, iclass 15, count 2 2006.229.17:57:58.37#ibcon#read 3, iclass 15, count 2 2006.229.17:57:58.37#ibcon#about to read 4, iclass 15, count 2 2006.229.17:57:58.37#ibcon#read 4, iclass 15, count 2 2006.229.17:57:58.37#ibcon#about to read 5, iclass 15, count 2 2006.229.17:57:58.37#ibcon#read 5, iclass 15, count 2 2006.229.17:57:58.37#ibcon#about to read 6, iclass 15, count 2 2006.229.17:57:58.37#ibcon#read 6, iclass 15, count 2 2006.229.17:57:58.37#ibcon#end of sib2, iclass 15, count 2 2006.229.17:57:58.37#ibcon#*mode == 0, iclass 15, count 2 2006.229.17:57:58.37#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.17:57:58.37#ibcon#[25=AT04-07\r\n] 2006.229.17:57:58.37#ibcon#*before write, iclass 15, count 2 2006.229.17:57:58.37#ibcon#enter sib2, iclass 15, count 2 2006.229.17:57:58.37#ibcon#flushed, iclass 15, count 2 2006.229.17:57:58.37#ibcon#about to write, iclass 15, count 2 2006.229.17:57:58.37#ibcon#wrote, iclass 15, count 2 2006.229.17:57:58.37#ibcon#about to read 3, iclass 15, count 2 2006.229.17:57:58.40#ibcon#read 3, iclass 15, count 2 2006.229.17:57:58.40#ibcon#about to read 4, iclass 15, count 2 2006.229.17:57:58.40#ibcon#read 4, iclass 15, count 2 2006.229.17:57:58.40#ibcon#about to read 5, iclass 15, count 2 2006.229.17:57:58.40#ibcon#read 5, iclass 15, count 2 2006.229.17:57:58.40#ibcon#about to read 6, iclass 15, count 2 2006.229.17:57:58.40#ibcon#read 6, iclass 15, count 2 2006.229.17:57:58.40#ibcon#end of sib2, iclass 15, count 2 2006.229.17:57:58.40#ibcon#*after write, iclass 15, count 2 2006.229.17:57:58.40#ibcon#*before return 0, iclass 15, count 2 2006.229.17:57:58.40#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:57:58.40#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:57:58.40#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.17:57:58.40#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:58.40#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:57:58.52#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:57:58.52#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:57:58.52#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:57:58.52#ibcon#first serial, iclass 15, count 0 2006.229.17:57:58.52#ibcon#enter sib2, iclass 15, count 0 2006.229.17:57:58.52#ibcon#flushed, iclass 15, count 0 2006.229.17:57:58.52#ibcon#about to write, iclass 15, count 0 2006.229.17:57:58.52#ibcon#wrote, iclass 15, count 0 2006.229.17:57:58.52#ibcon#about to read 3, iclass 15, count 0 2006.229.17:57:58.54#ibcon#read 3, iclass 15, count 0 2006.229.17:57:58.54#ibcon#about to read 4, iclass 15, count 0 2006.229.17:57:58.54#ibcon#read 4, iclass 15, count 0 2006.229.17:57:58.54#ibcon#about to read 5, iclass 15, count 0 2006.229.17:57:58.54#ibcon#read 5, iclass 15, count 0 2006.229.17:57:58.54#ibcon#about to read 6, iclass 15, count 0 2006.229.17:57:58.54#ibcon#read 6, iclass 15, count 0 2006.229.17:57:58.54#ibcon#end of sib2, iclass 15, count 0 2006.229.17:57:58.54#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:57:58.54#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:57:58.54#ibcon#[25=USB\r\n] 2006.229.17:57:58.54#ibcon#*before write, iclass 15, count 0 2006.229.17:57:58.54#ibcon#enter sib2, iclass 15, count 0 2006.229.17:57:58.54#ibcon#flushed, iclass 15, count 0 2006.229.17:57:58.54#ibcon#about to write, iclass 15, count 0 2006.229.17:57:58.54#ibcon#wrote, iclass 15, count 0 2006.229.17:57:58.54#ibcon#about to read 3, iclass 15, count 0 2006.229.17:57:58.57#ibcon#read 3, iclass 15, count 0 2006.229.17:57:58.57#ibcon#about to read 4, iclass 15, count 0 2006.229.17:57:58.57#ibcon#read 4, iclass 15, count 0 2006.229.17:57:58.57#ibcon#about to read 5, iclass 15, count 0 2006.229.17:57:58.57#ibcon#read 5, iclass 15, count 0 2006.229.17:57:58.57#ibcon#about to read 6, iclass 15, count 0 2006.229.17:57:58.57#ibcon#read 6, iclass 15, count 0 2006.229.17:57:58.57#ibcon#end of sib2, iclass 15, count 0 2006.229.17:57:58.57#ibcon#*after write, iclass 15, count 0 2006.229.17:57:58.57#ibcon#*before return 0, iclass 15, count 0 2006.229.17:57:58.57#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:57:58.57#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:57:58.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:57:58.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:57:58.57$vck44/valo=5,734.99 2006.229.17:57:58.57#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.17:57:58.57#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.17:57:58.57#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:58.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:57:58.57#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:57:58.57#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:57:58.57#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:57:58.57#ibcon#first serial, iclass 17, count 0 2006.229.17:57:58.57#ibcon#enter sib2, iclass 17, count 0 2006.229.17:57:58.57#ibcon#flushed, iclass 17, count 0 2006.229.17:57:58.57#ibcon#about to write, iclass 17, count 0 2006.229.17:57:58.57#ibcon#wrote, iclass 17, count 0 2006.229.17:57:58.57#ibcon#about to read 3, iclass 17, count 0 2006.229.17:57:58.59#ibcon#read 3, iclass 17, count 0 2006.229.17:57:58.59#ibcon#about to read 4, iclass 17, count 0 2006.229.17:57:58.59#ibcon#read 4, iclass 17, count 0 2006.229.17:57:58.59#ibcon#about to read 5, iclass 17, count 0 2006.229.17:57:58.59#ibcon#read 5, iclass 17, count 0 2006.229.17:57:58.59#ibcon#about to read 6, iclass 17, count 0 2006.229.17:57:58.59#ibcon#read 6, iclass 17, count 0 2006.229.17:57:58.59#ibcon#end of sib2, iclass 17, count 0 2006.229.17:57:58.59#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:57:58.59#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:57:58.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.17:57:58.59#ibcon#*before write, iclass 17, count 0 2006.229.17:57:58.59#ibcon#enter sib2, iclass 17, count 0 2006.229.17:57:58.59#ibcon#flushed, iclass 17, count 0 2006.229.17:57:58.59#ibcon#about to write, iclass 17, count 0 2006.229.17:57:58.59#ibcon#wrote, iclass 17, count 0 2006.229.17:57:58.59#ibcon#about to read 3, iclass 17, count 0 2006.229.17:57:58.63#ibcon#read 3, iclass 17, count 0 2006.229.17:57:58.63#ibcon#about to read 4, iclass 17, count 0 2006.229.17:57:58.63#ibcon#read 4, iclass 17, count 0 2006.229.17:57:58.63#ibcon#about to read 5, iclass 17, count 0 2006.229.17:57:58.63#ibcon#read 5, iclass 17, count 0 2006.229.17:57:58.63#ibcon#about to read 6, iclass 17, count 0 2006.229.17:57:58.63#ibcon#read 6, iclass 17, count 0 2006.229.17:57:58.63#ibcon#end of sib2, iclass 17, count 0 2006.229.17:57:58.63#ibcon#*after write, iclass 17, count 0 2006.229.17:57:58.63#ibcon#*before return 0, iclass 17, count 0 2006.229.17:57:58.63#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:57:58.63#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:57:58.63#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:57:58.63#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:57:58.63$vck44/va=5,4 2006.229.17:57:58.63#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.17:57:58.63#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.17:57:58.63#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:58.63#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:57:58.69#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:57:58.69#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:57:58.69#ibcon#enter wrdev, iclass 19, count 2 2006.229.17:57:58.69#ibcon#first serial, iclass 19, count 2 2006.229.17:57:58.69#ibcon#enter sib2, iclass 19, count 2 2006.229.17:57:58.69#ibcon#flushed, iclass 19, count 2 2006.229.17:57:58.69#ibcon#about to write, iclass 19, count 2 2006.229.17:57:58.69#ibcon#wrote, iclass 19, count 2 2006.229.17:57:58.69#ibcon#about to read 3, iclass 19, count 2 2006.229.17:57:58.71#ibcon#read 3, iclass 19, count 2 2006.229.17:57:58.71#ibcon#about to read 4, iclass 19, count 2 2006.229.17:57:58.71#ibcon#read 4, iclass 19, count 2 2006.229.17:57:58.71#ibcon#about to read 5, iclass 19, count 2 2006.229.17:57:58.71#ibcon#read 5, iclass 19, count 2 2006.229.17:57:58.71#ibcon#about to read 6, iclass 19, count 2 2006.229.17:57:58.71#ibcon#read 6, iclass 19, count 2 2006.229.17:57:58.71#ibcon#end of sib2, iclass 19, count 2 2006.229.17:57:58.71#ibcon#*mode == 0, iclass 19, count 2 2006.229.17:57:58.71#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.17:57:58.71#ibcon#[25=AT05-04\r\n] 2006.229.17:57:58.71#ibcon#*before write, iclass 19, count 2 2006.229.17:57:58.71#ibcon#enter sib2, iclass 19, count 2 2006.229.17:57:58.71#ibcon#flushed, iclass 19, count 2 2006.229.17:57:58.71#ibcon#about to write, iclass 19, count 2 2006.229.17:57:58.71#ibcon#wrote, iclass 19, count 2 2006.229.17:57:58.71#ibcon#about to read 3, iclass 19, count 2 2006.229.17:57:58.74#ibcon#read 3, iclass 19, count 2 2006.229.17:57:58.74#ibcon#about to read 4, iclass 19, count 2 2006.229.17:57:58.74#ibcon#read 4, iclass 19, count 2 2006.229.17:57:58.74#ibcon#about to read 5, iclass 19, count 2 2006.229.17:57:58.74#ibcon#read 5, iclass 19, count 2 2006.229.17:57:58.74#ibcon#about to read 6, iclass 19, count 2 2006.229.17:57:58.74#ibcon#read 6, iclass 19, count 2 2006.229.17:57:58.74#ibcon#end of sib2, iclass 19, count 2 2006.229.17:57:58.74#ibcon#*after write, iclass 19, count 2 2006.229.17:57:58.74#ibcon#*before return 0, iclass 19, count 2 2006.229.17:57:58.74#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:57:58.74#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:57:58.74#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.17:57:58.74#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:58.74#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:57:58.86#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:57:58.86#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:57:58.86#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:57:58.86#ibcon#first serial, iclass 19, count 0 2006.229.17:57:58.86#ibcon#enter sib2, iclass 19, count 0 2006.229.17:57:58.86#ibcon#flushed, iclass 19, count 0 2006.229.17:57:58.86#ibcon#about to write, iclass 19, count 0 2006.229.17:57:58.86#ibcon#wrote, iclass 19, count 0 2006.229.17:57:58.86#ibcon#about to read 3, iclass 19, count 0 2006.229.17:57:58.88#ibcon#read 3, iclass 19, count 0 2006.229.17:57:58.88#ibcon#about to read 4, iclass 19, count 0 2006.229.17:57:58.88#ibcon#read 4, iclass 19, count 0 2006.229.17:57:58.88#ibcon#about to read 5, iclass 19, count 0 2006.229.17:57:58.88#ibcon#read 5, iclass 19, count 0 2006.229.17:57:58.88#ibcon#about to read 6, iclass 19, count 0 2006.229.17:57:58.88#ibcon#read 6, iclass 19, count 0 2006.229.17:57:58.88#ibcon#end of sib2, iclass 19, count 0 2006.229.17:57:58.88#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:57:58.88#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:57:58.88#ibcon#[25=USB\r\n] 2006.229.17:57:58.88#ibcon#*before write, iclass 19, count 0 2006.229.17:57:58.88#ibcon#enter sib2, iclass 19, count 0 2006.229.17:57:58.88#ibcon#flushed, iclass 19, count 0 2006.229.17:57:58.88#ibcon#about to write, iclass 19, count 0 2006.229.17:57:58.88#ibcon#wrote, iclass 19, count 0 2006.229.17:57:58.88#ibcon#about to read 3, iclass 19, count 0 2006.229.17:57:58.91#ibcon#read 3, iclass 19, count 0 2006.229.17:57:58.91#ibcon#about to read 4, iclass 19, count 0 2006.229.17:57:58.91#ibcon#read 4, iclass 19, count 0 2006.229.17:57:58.91#ibcon#about to read 5, iclass 19, count 0 2006.229.17:57:58.91#ibcon#read 5, iclass 19, count 0 2006.229.17:57:58.91#ibcon#about to read 6, iclass 19, count 0 2006.229.17:57:58.91#ibcon#read 6, iclass 19, count 0 2006.229.17:57:58.91#ibcon#end of sib2, iclass 19, count 0 2006.229.17:57:58.91#ibcon#*after write, iclass 19, count 0 2006.229.17:57:58.91#ibcon#*before return 0, iclass 19, count 0 2006.229.17:57:58.91#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:57:58.91#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:57:58.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:57:58.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:57:58.91$vck44/valo=6,814.99 2006.229.17:57:58.91#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.17:57:58.91#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.17:57:58.91#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:58.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:57:58.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:57:58.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:57:58.91#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:57:58.91#ibcon#first serial, iclass 21, count 0 2006.229.17:57:58.91#ibcon#enter sib2, iclass 21, count 0 2006.229.17:57:58.91#ibcon#flushed, iclass 21, count 0 2006.229.17:57:58.91#ibcon#about to write, iclass 21, count 0 2006.229.17:57:58.91#ibcon#wrote, iclass 21, count 0 2006.229.17:57:58.91#ibcon#about to read 3, iclass 21, count 0 2006.229.17:57:58.93#ibcon#read 3, iclass 21, count 0 2006.229.17:57:58.93#ibcon#about to read 4, iclass 21, count 0 2006.229.17:57:58.93#ibcon#read 4, iclass 21, count 0 2006.229.17:57:58.93#ibcon#about to read 5, iclass 21, count 0 2006.229.17:57:58.93#ibcon#read 5, iclass 21, count 0 2006.229.17:57:58.93#ibcon#about to read 6, iclass 21, count 0 2006.229.17:57:58.93#ibcon#read 6, iclass 21, count 0 2006.229.17:57:58.93#ibcon#end of sib2, iclass 21, count 0 2006.229.17:57:58.93#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:57:58.93#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:57:58.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.17:57:58.93#ibcon#*before write, iclass 21, count 0 2006.229.17:57:58.93#ibcon#enter sib2, iclass 21, count 0 2006.229.17:57:58.93#ibcon#flushed, iclass 21, count 0 2006.229.17:57:58.93#ibcon#about to write, iclass 21, count 0 2006.229.17:57:58.93#ibcon#wrote, iclass 21, count 0 2006.229.17:57:58.93#ibcon#about to read 3, iclass 21, count 0 2006.229.17:57:58.97#ibcon#read 3, iclass 21, count 0 2006.229.17:57:58.97#ibcon#about to read 4, iclass 21, count 0 2006.229.17:57:58.97#ibcon#read 4, iclass 21, count 0 2006.229.17:57:58.97#ibcon#about to read 5, iclass 21, count 0 2006.229.17:57:58.97#ibcon#read 5, iclass 21, count 0 2006.229.17:57:58.97#ibcon#about to read 6, iclass 21, count 0 2006.229.17:57:58.97#ibcon#read 6, iclass 21, count 0 2006.229.17:57:58.97#ibcon#end of sib2, iclass 21, count 0 2006.229.17:57:58.97#ibcon#*after write, iclass 21, count 0 2006.229.17:57:58.97#ibcon#*before return 0, iclass 21, count 0 2006.229.17:57:58.97#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:57:58.97#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:57:58.97#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:57:58.97#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:57:58.97$vck44/va=6,4 2006.229.17:57:58.97#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.17:57:58.97#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.17:57:58.97#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:58.97#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:57:59.03#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:57:59.03#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:57:59.03#ibcon#enter wrdev, iclass 23, count 2 2006.229.17:57:59.03#ibcon#first serial, iclass 23, count 2 2006.229.17:57:59.03#ibcon#enter sib2, iclass 23, count 2 2006.229.17:57:59.03#ibcon#flushed, iclass 23, count 2 2006.229.17:57:59.03#ibcon#about to write, iclass 23, count 2 2006.229.17:57:59.03#ibcon#wrote, iclass 23, count 2 2006.229.17:57:59.03#ibcon#about to read 3, iclass 23, count 2 2006.229.17:57:59.05#ibcon#read 3, iclass 23, count 2 2006.229.17:57:59.05#ibcon#about to read 4, iclass 23, count 2 2006.229.17:57:59.05#ibcon#read 4, iclass 23, count 2 2006.229.17:57:59.05#ibcon#about to read 5, iclass 23, count 2 2006.229.17:57:59.05#ibcon#read 5, iclass 23, count 2 2006.229.17:57:59.05#ibcon#about to read 6, iclass 23, count 2 2006.229.17:57:59.05#ibcon#read 6, iclass 23, count 2 2006.229.17:57:59.05#ibcon#end of sib2, iclass 23, count 2 2006.229.17:57:59.05#ibcon#*mode == 0, iclass 23, count 2 2006.229.17:57:59.05#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.17:57:59.05#ibcon#[25=AT06-04\r\n] 2006.229.17:57:59.05#ibcon#*before write, iclass 23, count 2 2006.229.17:57:59.05#ibcon#enter sib2, iclass 23, count 2 2006.229.17:57:59.05#ibcon#flushed, iclass 23, count 2 2006.229.17:57:59.05#ibcon#about to write, iclass 23, count 2 2006.229.17:57:59.05#ibcon#wrote, iclass 23, count 2 2006.229.17:57:59.05#ibcon#about to read 3, iclass 23, count 2 2006.229.17:57:59.08#ibcon#read 3, iclass 23, count 2 2006.229.17:57:59.08#ibcon#about to read 4, iclass 23, count 2 2006.229.17:57:59.08#ibcon#read 4, iclass 23, count 2 2006.229.17:57:59.08#ibcon#about to read 5, iclass 23, count 2 2006.229.17:57:59.08#ibcon#read 5, iclass 23, count 2 2006.229.17:57:59.08#ibcon#about to read 6, iclass 23, count 2 2006.229.17:57:59.08#ibcon#read 6, iclass 23, count 2 2006.229.17:57:59.08#ibcon#end of sib2, iclass 23, count 2 2006.229.17:57:59.08#ibcon#*after write, iclass 23, count 2 2006.229.17:57:59.08#ibcon#*before return 0, iclass 23, count 2 2006.229.17:57:59.08#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:57:59.08#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:57:59.08#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.17:57:59.08#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:59.08#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:57:59.20#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:57:59.20#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:57:59.20#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:57:59.20#ibcon#first serial, iclass 23, count 0 2006.229.17:57:59.20#ibcon#enter sib2, iclass 23, count 0 2006.229.17:57:59.20#ibcon#flushed, iclass 23, count 0 2006.229.17:57:59.20#ibcon#about to write, iclass 23, count 0 2006.229.17:57:59.20#ibcon#wrote, iclass 23, count 0 2006.229.17:57:59.20#ibcon#about to read 3, iclass 23, count 0 2006.229.17:57:59.22#ibcon#read 3, iclass 23, count 0 2006.229.17:57:59.22#ibcon#about to read 4, iclass 23, count 0 2006.229.17:57:59.22#ibcon#read 4, iclass 23, count 0 2006.229.17:57:59.22#ibcon#about to read 5, iclass 23, count 0 2006.229.17:57:59.22#ibcon#read 5, iclass 23, count 0 2006.229.17:57:59.22#ibcon#about to read 6, iclass 23, count 0 2006.229.17:57:59.22#ibcon#read 6, iclass 23, count 0 2006.229.17:57:59.22#ibcon#end of sib2, iclass 23, count 0 2006.229.17:57:59.22#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:57:59.22#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:57:59.22#ibcon#[25=USB\r\n] 2006.229.17:57:59.22#ibcon#*before write, iclass 23, count 0 2006.229.17:57:59.22#ibcon#enter sib2, iclass 23, count 0 2006.229.17:57:59.22#ibcon#flushed, iclass 23, count 0 2006.229.17:57:59.22#ibcon#about to write, iclass 23, count 0 2006.229.17:57:59.22#ibcon#wrote, iclass 23, count 0 2006.229.17:57:59.22#ibcon#about to read 3, iclass 23, count 0 2006.229.17:57:59.25#ibcon#read 3, iclass 23, count 0 2006.229.17:57:59.25#ibcon#about to read 4, iclass 23, count 0 2006.229.17:57:59.25#ibcon#read 4, iclass 23, count 0 2006.229.17:57:59.25#ibcon#about to read 5, iclass 23, count 0 2006.229.17:57:59.25#ibcon#read 5, iclass 23, count 0 2006.229.17:57:59.25#ibcon#about to read 6, iclass 23, count 0 2006.229.17:57:59.25#ibcon#read 6, iclass 23, count 0 2006.229.17:57:59.25#ibcon#end of sib2, iclass 23, count 0 2006.229.17:57:59.25#ibcon#*after write, iclass 23, count 0 2006.229.17:57:59.25#ibcon#*before return 0, iclass 23, count 0 2006.229.17:57:59.25#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:57:59.25#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:57:59.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:57:59.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:57:59.25$vck44/valo=7,864.99 2006.229.17:57:59.25#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.17:57:59.25#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.17:57:59.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:59.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:57:59.25#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:57:59.25#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:57:59.25#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:57:59.25#ibcon#first serial, iclass 25, count 0 2006.229.17:57:59.25#ibcon#enter sib2, iclass 25, count 0 2006.229.17:57:59.25#ibcon#flushed, iclass 25, count 0 2006.229.17:57:59.25#ibcon#about to write, iclass 25, count 0 2006.229.17:57:59.25#ibcon#wrote, iclass 25, count 0 2006.229.17:57:59.25#ibcon#about to read 3, iclass 25, count 0 2006.229.17:57:59.27#ibcon#read 3, iclass 25, count 0 2006.229.17:57:59.27#ibcon#about to read 4, iclass 25, count 0 2006.229.17:57:59.27#ibcon#read 4, iclass 25, count 0 2006.229.17:57:59.27#ibcon#about to read 5, iclass 25, count 0 2006.229.17:57:59.27#ibcon#read 5, iclass 25, count 0 2006.229.17:57:59.27#ibcon#about to read 6, iclass 25, count 0 2006.229.17:57:59.27#ibcon#read 6, iclass 25, count 0 2006.229.17:57:59.27#ibcon#end of sib2, iclass 25, count 0 2006.229.17:57:59.27#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:57:59.27#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:57:59.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.17:57:59.27#ibcon#*before write, iclass 25, count 0 2006.229.17:57:59.27#ibcon#enter sib2, iclass 25, count 0 2006.229.17:57:59.27#ibcon#flushed, iclass 25, count 0 2006.229.17:57:59.27#ibcon#about to write, iclass 25, count 0 2006.229.17:57:59.27#ibcon#wrote, iclass 25, count 0 2006.229.17:57:59.27#ibcon#about to read 3, iclass 25, count 0 2006.229.17:57:59.31#ibcon#read 3, iclass 25, count 0 2006.229.17:57:59.31#ibcon#about to read 4, iclass 25, count 0 2006.229.17:57:59.31#ibcon#read 4, iclass 25, count 0 2006.229.17:57:59.31#ibcon#about to read 5, iclass 25, count 0 2006.229.17:57:59.31#ibcon#read 5, iclass 25, count 0 2006.229.17:57:59.31#ibcon#about to read 6, iclass 25, count 0 2006.229.17:57:59.31#ibcon#read 6, iclass 25, count 0 2006.229.17:57:59.31#ibcon#end of sib2, iclass 25, count 0 2006.229.17:57:59.31#ibcon#*after write, iclass 25, count 0 2006.229.17:57:59.31#ibcon#*before return 0, iclass 25, count 0 2006.229.17:57:59.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:57:59.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:57:59.31#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:57:59.31#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:57:59.31$vck44/va=7,5 2006.229.17:57:59.31#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.17:57:59.31#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.17:57:59.31#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:59.31#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:57:59.37#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:57:59.37#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:57:59.37#ibcon#enter wrdev, iclass 27, count 2 2006.229.17:57:59.37#ibcon#first serial, iclass 27, count 2 2006.229.17:57:59.37#ibcon#enter sib2, iclass 27, count 2 2006.229.17:57:59.37#ibcon#flushed, iclass 27, count 2 2006.229.17:57:59.37#ibcon#about to write, iclass 27, count 2 2006.229.17:57:59.37#ibcon#wrote, iclass 27, count 2 2006.229.17:57:59.37#ibcon#about to read 3, iclass 27, count 2 2006.229.17:57:59.39#ibcon#read 3, iclass 27, count 2 2006.229.17:57:59.39#ibcon#about to read 4, iclass 27, count 2 2006.229.17:57:59.39#ibcon#read 4, iclass 27, count 2 2006.229.17:57:59.39#ibcon#about to read 5, iclass 27, count 2 2006.229.17:57:59.39#ibcon#read 5, iclass 27, count 2 2006.229.17:57:59.39#ibcon#about to read 6, iclass 27, count 2 2006.229.17:57:59.39#ibcon#read 6, iclass 27, count 2 2006.229.17:57:59.39#ibcon#end of sib2, iclass 27, count 2 2006.229.17:57:59.39#ibcon#*mode == 0, iclass 27, count 2 2006.229.17:57:59.39#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.17:57:59.39#ibcon#[25=AT07-05\r\n] 2006.229.17:57:59.39#ibcon#*before write, iclass 27, count 2 2006.229.17:57:59.39#ibcon#enter sib2, iclass 27, count 2 2006.229.17:57:59.39#ibcon#flushed, iclass 27, count 2 2006.229.17:57:59.39#ibcon#about to write, iclass 27, count 2 2006.229.17:57:59.39#ibcon#wrote, iclass 27, count 2 2006.229.17:57:59.39#ibcon#about to read 3, iclass 27, count 2 2006.229.17:57:59.42#ibcon#read 3, iclass 27, count 2 2006.229.17:57:59.42#ibcon#about to read 4, iclass 27, count 2 2006.229.17:57:59.42#ibcon#read 4, iclass 27, count 2 2006.229.17:57:59.42#ibcon#about to read 5, iclass 27, count 2 2006.229.17:57:59.42#ibcon#read 5, iclass 27, count 2 2006.229.17:57:59.42#ibcon#about to read 6, iclass 27, count 2 2006.229.17:57:59.42#ibcon#read 6, iclass 27, count 2 2006.229.17:57:59.42#ibcon#end of sib2, iclass 27, count 2 2006.229.17:57:59.42#ibcon#*after write, iclass 27, count 2 2006.229.17:57:59.42#ibcon#*before return 0, iclass 27, count 2 2006.229.17:57:59.42#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:57:59.42#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:57:59.42#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.17:57:59.42#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:59.42#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:57:59.54#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:57:59.54#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:57:59.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:57:59.54#ibcon#first serial, iclass 27, count 0 2006.229.17:57:59.54#ibcon#enter sib2, iclass 27, count 0 2006.229.17:57:59.54#ibcon#flushed, iclass 27, count 0 2006.229.17:57:59.54#ibcon#about to write, iclass 27, count 0 2006.229.17:57:59.54#ibcon#wrote, iclass 27, count 0 2006.229.17:57:59.54#ibcon#about to read 3, iclass 27, count 0 2006.229.17:57:59.56#ibcon#read 3, iclass 27, count 0 2006.229.17:57:59.56#ibcon#about to read 4, iclass 27, count 0 2006.229.17:57:59.56#ibcon#read 4, iclass 27, count 0 2006.229.17:57:59.56#ibcon#about to read 5, iclass 27, count 0 2006.229.17:57:59.56#ibcon#read 5, iclass 27, count 0 2006.229.17:57:59.56#ibcon#about to read 6, iclass 27, count 0 2006.229.17:57:59.56#ibcon#read 6, iclass 27, count 0 2006.229.17:57:59.56#ibcon#end of sib2, iclass 27, count 0 2006.229.17:57:59.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:57:59.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:57:59.56#ibcon#[25=USB\r\n] 2006.229.17:57:59.56#ibcon#*before write, iclass 27, count 0 2006.229.17:57:59.56#ibcon#enter sib2, iclass 27, count 0 2006.229.17:57:59.56#ibcon#flushed, iclass 27, count 0 2006.229.17:57:59.56#ibcon#about to write, iclass 27, count 0 2006.229.17:57:59.56#ibcon#wrote, iclass 27, count 0 2006.229.17:57:59.56#ibcon#about to read 3, iclass 27, count 0 2006.229.17:57:59.59#ibcon#read 3, iclass 27, count 0 2006.229.17:57:59.59#ibcon#about to read 4, iclass 27, count 0 2006.229.17:57:59.59#ibcon#read 4, iclass 27, count 0 2006.229.17:57:59.59#ibcon#about to read 5, iclass 27, count 0 2006.229.17:57:59.59#ibcon#read 5, iclass 27, count 0 2006.229.17:57:59.59#ibcon#about to read 6, iclass 27, count 0 2006.229.17:57:59.59#ibcon#read 6, iclass 27, count 0 2006.229.17:57:59.59#ibcon#end of sib2, iclass 27, count 0 2006.229.17:57:59.59#ibcon#*after write, iclass 27, count 0 2006.229.17:57:59.59#ibcon#*before return 0, iclass 27, count 0 2006.229.17:57:59.59#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:57:59.59#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:57:59.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:57:59.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:57:59.59$vck44/valo=8,884.99 2006.229.17:57:59.59#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:57:59.59#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:57:59.59#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:59.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:57:59.59#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:57:59.59#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:57:59.59#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:57:59.59#ibcon#first serial, iclass 29, count 0 2006.229.17:57:59.59#ibcon#enter sib2, iclass 29, count 0 2006.229.17:57:59.59#ibcon#flushed, iclass 29, count 0 2006.229.17:57:59.59#ibcon#about to write, iclass 29, count 0 2006.229.17:57:59.59#ibcon#wrote, iclass 29, count 0 2006.229.17:57:59.59#ibcon#about to read 3, iclass 29, count 0 2006.229.17:57:59.61#ibcon#read 3, iclass 29, count 0 2006.229.17:57:59.61#ibcon#about to read 4, iclass 29, count 0 2006.229.17:57:59.61#ibcon#read 4, iclass 29, count 0 2006.229.17:57:59.61#ibcon#about to read 5, iclass 29, count 0 2006.229.17:57:59.61#ibcon#read 5, iclass 29, count 0 2006.229.17:57:59.61#ibcon#about to read 6, iclass 29, count 0 2006.229.17:57:59.61#ibcon#read 6, iclass 29, count 0 2006.229.17:57:59.61#ibcon#end of sib2, iclass 29, count 0 2006.229.17:57:59.61#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:57:59.61#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:57:59.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.17:57:59.61#ibcon#*before write, iclass 29, count 0 2006.229.17:57:59.61#ibcon#enter sib2, iclass 29, count 0 2006.229.17:57:59.61#ibcon#flushed, iclass 29, count 0 2006.229.17:57:59.61#ibcon#about to write, iclass 29, count 0 2006.229.17:57:59.61#ibcon#wrote, iclass 29, count 0 2006.229.17:57:59.61#ibcon#about to read 3, iclass 29, count 0 2006.229.17:57:59.65#ibcon#read 3, iclass 29, count 0 2006.229.17:57:59.65#ibcon#about to read 4, iclass 29, count 0 2006.229.17:57:59.65#ibcon#read 4, iclass 29, count 0 2006.229.17:57:59.65#ibcon#about to read 5, iclass 29, count 0 2006.229.17:57:59.65#ibcon#read 5, iclass 29, count 0 2006.229.17:57:59.65#ibcon#about to read 6, iclass 29, count 0 2006.229.17:57:59.65#ibcon#read 6, iclass 29, count 0 2006.229.17:57:59.65#ibcon#end of sib2, iclass 29, count 0 2006.229.17:57:59.65#ibcon#*after write, iclass 29, count 0 2006.229.17:57:59.65#ibcon#*before return 0, iclass 29, count 0 2006.229.17:57:59.65#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:57:59.65#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:57:59.65#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:57:59.65#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:57:59.65$vck44/va=8,6 2006.229.17:57:59.65#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.17:57:59.65#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.17:57:59.65#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:59.65#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:57:59.71#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:57:59.71#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:57:59.71#ibcon#enter wrdev, iclass 31, count 2 2006.229.17:57:59.71#ibcon#first serial, iclass 31, count 2 2006.229.17:57:59.71#ibcon#enter sib2, iclass 31, count 2 2006.229.17:57:59.71#ibcon#flushed, iclass 31, count 2 2006.229.17:57:59.71#ibcon#about to write, iclass 31, count 2 2006.229.17:57:59.71#ibcon#wrote, iclass 31, count 2 2006.229.17:57:59.71#ibcon#about to read 3, iclass 31, count 2 2006.229.17:57:59.73#ibcon#read 3, iclass 31, count 2 2006.229.17:57:59.73#ibcon#about to read 4, iclass 31, count 2 2006.229.17:57:59.73#ibcon#read 4, iclass 31, count 2 2006.229.17:57:59.73#ibcon#about to read 5, iclass 31, count 2 2006.229.17:57:59.73#ibcon#read 5, iclass 31, count 2 2006.229.17:57:59.73#ibcon#about to read 6, iclass 31, count 2 2006.229.17:57:59.73#ibcon#read 6, iclass 31, count 2 2006.229.17:57:59.73#ibcon#end of sib2, iclass 31, count 2 2006.229.17:57:59.73#ibcon#*mode == 0, iclass 31, count 2 2006.229.17:57:59.73#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.17:57:59.73#ibcon#[25=AT08-06\r\n] 2006.229.17:57:59.73#ibcon#*before write, iclass 31, count 2 2006.229.17:57:59.73#ibcon#enter sib2, iclass 31, count 2 2006.229.17:57:59.73#ibcon#flushed, iclass 31, count 2 2006.229.17:57:59.73#ibcon#about to write, iclass 31, count 2 2006.229.17:57:59.73#ibcon#wrote, iclass 31, count 2 2006.229.17:57:59.73#ibcon#about to read 3, iclass 31, count 2 2006.229.17:57:59.76#ibcon#read 3, iclass 31, count 2 2006.229.17:57:59.76#ibcon#about to read 4, iclass 31, count 2 2006.229.17:57:59.76#ibcon#read 4, iclass 31, count 2 2006.229.17:57:59.76#ibcon#about to read 5, iclass 31, count 2 2006.229.17:57:59.76#ibcon#read 5, iclass 31, count 2 2006.229.17:57:59.76#ibcon#about to read 6, iclass 31, count 2 2006.229.17:57:59.76#ibcon#read 6, iclass 31, count 2 2006.229.17:57:59.76#ibcon#end of sib2, iclass 31, count 2 2006.229.17:57:59.76#ibcon#*after write, iclass 31, count 2 2006.229.17:57:59.76#ibcon#*before return 0, iclass 31, count 2 2006.229.17:57:59.76#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:57:59.76#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.17:57:59.76#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.17:57:59.76#ibcon#ireg 7 cls_cnt 0 2006.229.17:57:59.76#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:57:59.88#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:57:59.88#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:57:59.88#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:57:59.88#ibcon#first serial, iclass 31, count 0 2006.229.17:57:59.88#ibcon#enter sib2, iclass 31, count 0 2006.229.17:57:59.88#ibcon#flushed, iclass 31, count 0 2006.229.17:57:59.88#ibcon#about to write, iclass 31, count 0 2006.229.17:57:59.88#ibcon#wrote, iclass 31, count 0 2006.229.17:57:59.88#ibcon#about to read 3, iclass 31, count 0 2006.229.17:57:59.90#ibcon#read 3, iclass 31, count 0 2006.229.17:57:59.90#ibcon#about to read 4, iclass 31, count 0 2006.229.17:57:59.90#ibcon#read 4, iclass 31, count 0 2006.229.17:57:59.90#ibcon#about to read 5, iclass 31, count 0 2006.229.17:57:59.90#ibcon#read 5, iclass 31, count 0 2006.229.17:57:59.90#ibcon#about to read 6, iclass 31, count 0 2006.229.17:57:59.90#ibcon#read 6, iclass 31, count 0 2006.229.17:57:59.90#ibcon#end of sib2, iclass 31, count 0 2006.229.17:57:59.90#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:57:59.90#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:57:59.90#ibcon#[25=USB\r\n] 2006.229.17:57:59.90#ibcon#*before write, iclass 31, count 0 2006.229.17:57:59.90#ibcon#enter sib2, iclass 31, count 0 2006.229.17:57:59.90#ibcon#flushed, iclass 31, count 0 2006.229.17:57:59.90#ibcon#about to write, iclass 31, count 0 2006.229.17:57:59.90#ibcon#wrote, iclass 31, count 0 2006.229.17:57:59.90#ibcon#about to read 3, iclass 31, count 0 2006.229.17:57:59.93#ibcon#read 3, iclass 31, count 0 2006.229.17:57:59.93#ibcon#about to read 4, iclass 31, count 0 2006.229.17:57:59.93#ibcon#read 4, iclass 31, count 0 2006.229.17:57:59.93#ibcon#about to read 5, iclass 31, count 0 2006.229.17:57:59.93#ibcon#read 5, iclass 31, count 0 2006.229.17:57:59.93#ibcon#about to read 6, iclass 31, count 0 2006.229.17:57:59.93#ibcon#read 6, iclass 31, count 0 2006.229.17:57:59.93#ibcon#end of sib2, iclass 31, count 0 2006.229.17:57:59.93#ibcon#*after write, iclass 31, count 0 2006.229.17:57:59.93#ibcon#*before return 0, iclass 31, count 0 2006.229.17:57:59.93#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:57:59.93#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.17:57:59.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:57:59.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:57:59.93$vck44/vblo=1,629.99 2006.229.17:57:59.93#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.17:57:59.93#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.17:57:59.93#ibcon#ireg 17 cls_cnt 0 2006.229.17:57:59.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:57:59.93#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:57:59.93#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:57:59.93#ibcon#enter wrdev, iclass 33, count 0 2006.229.17:57:59.93#ibcon#first serial, iclass 33, count 0 2006.229.17:57:59.93#ibcon#enter sib2, iclass 33, count 0 2006.229.17:57:59.93#ibcon#flushed, iclass 33, count 0 2006.229.17:57:59.93#ibcon#about to write, iclass 33, count 0 2006.229.17:57:59.93#ibcon#wrote, iclass 33, count 0 2006.229.17:57:59.93#ibcon#about to read 3, iclass 33, count 0 2006.229.17:57:59.95#ibcon#read 3, iclass 33, count 0 2006.229.17:57:59.95#ibcon#about to read 4, iclass 33, count 0 2006.229.17:57:59.95#ibcon#read 4, iclass 33, count 0 2006.229.17:57:59.95#ibcon#about to read 5, iclass 33, count 0 2006.229.17:57:59.95#ibcon#read 5, iclass 33, count 0 2006.229.17:57:59.95#ibcon#about to read 6, iclass 33, count 0 2006.229.17:57:59.95#ibcon#read 6, iclass 33, count 0 2006.229.17:57:59.95#ibcon#end of sib2, iclass 33, count 0 2006.229.17:57:59.95#ibcon#*mode == 0, iclass 33, count 0 2006.229.17:57:59.95#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.17:57:59.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.17:57:59.95#ibcon#*before write, iclass 33, count 0 2006.229.17:57:59.95#ibcon#enter sib2, iclass 33, count 0 2006.229.17:57:59.95#ibcon#flushed, iclass 33, count 0 2006.229.17:57:59.95#ibcon#about to write, iclass 33, count 0 2006.229.17:57:59.95#ibcon#wrote, iclass 33, count 0 2006.229.17:57:59.95#ibcon#about to read 3, iclass 33, count 0 2006.229.17:57:59.99#ibcon#read 3, iclass 33, count 0 2006.229.17:57:59.99#ibcon#about to read 4, iclass 33, count 0 2006.229.17:57:59.99#ibcon#read 4, iclass 33, count 0 2006.229.17:57:59.99#ibcon#about to read 5, iclass 33, count 0 2006.229.17:57:59.99#ibcon#read 5, iclass 33, count 0 2006.229.17:57:59.99#ibcon#about to read 6, iclass 33, count 0 2006.229.17:57:59.99#ibcon#read 6, iclass 33, count 0 2006.229.17:57:59.99#ibcon#end of sib2, iclass 33, count 0 2006.229.17:57:59.99#ibcon#*after write, iclass 33, count 0 2006.229.17:57:59.99#ibcon#*before return 0, iclass 33, count 0 2006.229.17:57:59.99#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:57:59.99#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.17:57:59.99#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.17:57:59.99#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.17:57:59.99$vck44/vb=1,4 2006.229.17:57:59.99#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.17:57:59.99#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.17:57:59.99#ibcon#ireg 11 cls_cnt 2 2006.229.17:57:59.99#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:57:59.99#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:57:59.99#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:57:59.99#ibcon#enter wrdev, iclass 35, count 2 2006.229.17:57:59.99#ibcon#first serial, iclass 35, count 2 2006.229.17:57:59.99#ibcon#enter sib2, iclass 35, count 2 2006.229.17:57:59.99#ibcon#flushed, iclass 35, count 2 2006.229.17:57:59.99#ibcon#about to write, iclass 35, count 2 2006.229.17:57:59.99#ibcon#wrote, iclass 35, count 2 2006.229.17:57:59.99#ibcon#about to read 3, iclass 35, count 2 2006.229.17:58:00.01#ibcon#read 3, iclass 35, count 2 2006.229.17:58:00.01#ibcon#about to read 4, iclass 35, count 2 2006.229.17:58:00.01#ibcon#read 4, iclass 35, count 2 2006.229.17:58:00.01#ibcon#about to read 5, iclass 35, count 2 2006.229.17:58:00.01#ibcon#read 5, iclass 35, count 2 2006.229.17:58:00.01#ibcon#about to read 6, iclass 35, count 2 2006.229.17:58:00.01#ibcon#read 6, iclass 35, count 2 2006.229.17:58:00.01#ibcon#end of sib2, iclass 35, count 2 2006.229.17:58:00.01#ibcon#*mode == 0, iclass 35, count 2 2006.229.17:58:00.01#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.17:58:00.01#ibcon#[27=AT01-04\r\n] 2006.229.17:58:00.01#ibcon#*before write, iclass 35, count 2 2006.229.17:58:00.01#ibcon#enter sib2, iclass 35, count 2 2006.229.17:58:00.01#ibcon#flushed, iclass 35, count 2 2006.229.17:58:00.01#ibcon#about to write, iclass 35, count 2 2006.229.17:58:00.01#ibcon#wrote, iclass 35, count 2 2006.229.17:58:00.01#ibcon#about to read 3, iclass 35, count 2 2006.229.17:58:00.04#ibcon#read 3, iclass 35, count 2 2006.229.17:58:00.04#ibcon#about to read 4, iclass 35, count 2 2006.229.17:58:00.04#ibcon#read 4, iclass 35, count 2 2006.229.17:58:00.04#ibcon#about to read 5, iclass 35, count 2 2006.229.17:58:00.04#ibcon#read 5, iclass 35, count 2 2006.229.17:58:00.04#ibcon#about to read 6, iclass 35, count 2 2006.229.17:58:00.04#ibcon#read 6, iclass 35, count 2 2006.229.17:58:00.04#ibcon#end of sib2, iclass 35, count 2 2006.229.17:58:00.04#ibcon#*after write, iclass 35, count 2 2006.229.17:58:00.04#ibcon#*before return 0, iclass 35, count 2 2006.229.17:58:00.04#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:58:00.04#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.17:58:00.04#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.17:58:00.04#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:00.04#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:58:00.16#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:58:00.16#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:58:00.16#ibcon#enter wrdev, iclass 35, count 0 2006.229.17:58:00.16#ibcon#first serial, iclass 35, count 0 2006.229.17:58:00.16#ibcon#enter sib2, iclass 35, count 0 2006.229.17:58:00.16#ibcon#flushed, iclass 35, count 0 2006.229.17:58:00.16#ibcon#about to write, iclass 35, count 0 2006.229.17:58:00.16#ibcon#wrote, iclass 35, count 0 2006.229.17:58:00.16#ibcon#about to read 3, iclass 35, count 0 2006.229.17:58:00.18#ibcon#read 3, iclass 35, count 0 2006.229.17:58:00.18#ibcon#about to read 4, iclass 35, count 0 2006.229.17:58:00.18#ibcon#read 4, iclass 35, count 0 2006.229.17:58:00.18#ibcon#about to read 5, iclass 35, count 0 2006.229.17:58:00.18#ibcon#read 5, iclass 35, count 0 2006.229.17:58:00.18#ibcon#about to read 6, iclass 35, count 0 2006.229.17:58:00.18#ibcon#read 6, iclass 35, count 0 2006.229.17:58:00.18#ibcon#end of sib2, iclass 35, count 0 2006.229.17:58:00.18#ibcon#*mode == 0, iclass 35, count 0 2006.229.17:58:00.18#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.17:58:00.18#ibcon#[27=USB\r\n] 2006.229.17:58:00.18#ibcon#*before write, iclass 35, count 0 2006.229.17:58:00.18#ibcon#enter sib2, iclass 35, count 0 2006.229.17:58:00.18#ibcon#flushed, iclass 35, count 0 2006.229.17:58:00.18#ibcon#about to write, iclass 35, count 0 2006.229.17:58:00.18#ibcon#wrote, iclass 35, count 0 2006.229.17:58:00.18#ibcon#about to read 3, iclass 35, count 0 2006.229.17:58:00.21#ibcon#read 3, iclass 35, count 0 2006.229.17:58:00.21#ibcon#about to read 4, iclass 35, count 0 2006.229.17:58:00.21#ibcon#read 4, iclass 35, count 0 2006.229.17:58:00.21#ibcon#about to read 5, iclass 35, count 0 2006.229.17:58:00.21#ibcon#read 5, iclass 35, count 0 2006.229.17:58:00.21#ibcon#about to read 6, iclass 35, count 0 2006.229.17:58:00.21#ibcon#read 6, iclass 35, count 0 2006.229.17:58:00.21#ibcon#end of sib2, iclass 35, count 0 2006.229.17:58:00.21#ibcon#*after write, iclass 35, count 0 2006.229.17:58:00.21#ibcon#*before return 0, iclass 35, count 0 2006.229.17:58:00.21#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:58:00.21#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.17:58:00.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.17:58:00.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.17:58:00.21$vck44/vblo=2,634.99 2006.229.17:58:00.21#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.17:58:00.21#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.17:58:00.21#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:00.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:58:00.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:58:00.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:58:00.21#ibcon#enter wrdev, iclass 37, count 0 2006.229.17:58:00.21#ibcon#first serial, iclass 37, count 0 2006.229.17:58:00.21#ibcon#enter sib2, iclass 37, count 0 2006.229.17:58:00.21#ibcon#flushed, iclass 37, count 0 2006.229.17:58:00.21#ibcon#about to write, iclass 37, count 0 2006.229.17:58:00.21#ibcon#wrote, iclass 37, count 0 2006.229.17:58:00.21#ibcon#about to read 3, iclass 37, count 0 2006.229.17:58:00.23#ibcon#read 3, iclass 37, count 0 2006.229.17:58:00.23#ibcon#about to read 4, iclass 37, count 0 2006.229.17:58:00.23#ibcon#read 4, iclass 37, count 0 2006.229.17:58:00.23#ibcon#about to read 5, iclass 37, count 0 2006.229.17:58:00.23#ibcon#read 5, iclass 37, count 0 2006.229.17:58:00.23#ibcon#about to read 6, iclass 37, count 0 2006.229.17:58:00.23#ibcon#read 6, iclass 37, count 0 2006.229.17:58:00.23#ibcon#end of sib2, iclass 37, count 0 2006.229.17:58:00.23#ibcon#*mode == 0, iclass 37, count 0 2006.229.17:58:00.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.17:58:00.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.17:58:00.23#ibcon#*before write, iclass 37, count 0 2006.229.17:58:00.23#ibcon#enter sib2, iclass 37, count 0 2006.229.17:58:00.23#ibcon#flushed, iclass 37, count 0 2006.229.17:58:00.23#ibcon#about to write, iclass 37, count 0 2006.229.17:58:00.23#ibcon#wrote, iclass 37, count 0 2006.229.17:58:00.23#ibcon#about to read 3, iclass 37, count 0 2006.229.17:58:00.27#ibcon#read 3, iclass 37, count 0 2006.229.17:58:00.27#ibcon#about to read 4, iclass 37, count 0 2006.229.17:58:00.27#ibcon#read 4, iclass 37, count 0 2006.229.17:58:00.27#ibcon#about to read 5, iclass 37, count 0 2006.229.17:58:00.27#ibcon#read 5, iclass 37, count 0 2006.229.17:58:00.27#ibcon#about to read 6, iclass 37, count 0 2006.229.17:58:00.27#ibcon#read 6, iclass 37, count 0 2006.229.17:58:00.27#ibcon#end of sib2, iclass 37, count 0 2006.229.17:58:00.27#ibcon#*after write, iclass 37, count 0 2006.229.17:58:00.27#ibcon#*before return 0, iclass 37, count 0 2006.229.17:58:00.27#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:58:00.27#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.17:58:00.27#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.17:58:00.27#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.17:58:00.27$vck44/vb=2,4 2006.229.17:58:00.27#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.17:58:00.27#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.17:58:00.27#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:00.27#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:58:00.33#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:58:00.33#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:58:00.33#ibcon#enter wrdev, iclass 39, count 2 2006.229.17:58:00.33#ibcon#first serial, iclass 39, count 2 2006.229.17:58:00.33#ibcon#enter sib2, iclass 39, count 2 2006.229.17:58:00.33#ibcon#flushed, iclass 39, count 2 2006.229.17:58:00.33#ibcon#about to write, iclass 39, count 2 2006.229.17:58:00.33#ibcon#wrote, iclass 39, count 2 2006.229.17:58:00.33#ibcon#about to read 3, iclass 39, count 2 2006.229.17:58:00.35#ibcon#read 3, iclass 39, count 2 2006.229.17:58:00.35#ibcon#about to read 4, iclass 39, count 2 2006.229.17:58:00.35#ibcon#read 4, iclass 39, count 2 2006.229.17:58:00.35#ibcon#about to read 5, iclass 39, count 2 2006.229.17:58:00.35#ibcon#read 5, iclass 39, count 2 2006.229.17:58:00.35#ibcon#about to read 6, iclass 39, count 2 2006.229.17:58:00.35#ibcon#read 6, iclass 39, count 2 2006.229.17:58:00.35#ibcon#end of sib2, iclass 39, count 2 2006.229.17:58:00.35#ibcon#*mode == 0, iclass 39, count 2 2006.229.17:58:00.35#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.17:58:00.35#ibcon#[27=AT02-04\r\n] 2006.229.17:58:00.35#ibcon#*before write, iclass 39, count 2 2006.229.17:58:00.35#ibcon#enter sib2, iclass 39, count 2 2006.229.17:58:00.35#ibcon#flushed, iclass 39, count 2 2006.229.17:58:00.35#ibcon#about to write, iclass 39, count 2 2006.229.17:58:00.35#ibcon#wrote, iclass 39, count 2 2006.229.17:58:00.35#ibcon#about to read 3, iclass 39, count 2 2006.229.17:58:00.38#ibcon#read 3, iclass 39, count 2 2006.229.17:58:00.38#ibcon#about to read 4, iclass 39, count 2 2006.229.17:58:00.38#ibcon#read 4, iclass 39, count 2 2006.229.17:58:00.38#ibcon#about to read 5, iclass 39, count 2 2006.229.17:58:00.38#ibcon#read 5, iclass 39, count 2 2006.229.17:58:00.38#ibcon#about to read 6, iclass 39, count 2 2006.229.17:58:00.38#ibcon#read 6, iclass 39, count 2 2006.229.17:58:00.38#ibcon#end of sib2, iclass 39, count 2 2006.229.17:58:00.38#ibcon#*after write, iclass 39, count 2 2006.229.17:58:00.38#ibcon#*before return 0, iclass 39, count 2 2006.229.17:58:00.38#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:58:00.38#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.17:58:00.38#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.17:58:00.38#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:00.38#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:58:00.50#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:58:00.50#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:58:00.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.17:58:00.50#ibcon#first serial, iclass 39, count 0 2006.229.17:58:00.50#ibcon#enter sib2, iclass 39, count 0 2006.229.17:58:00.50#ibcon#flushed, iclass 39, count 0 2006.229.17:58:00.50#ibcon#about to write, iclass 39, count 0 2006.229.17:58:00.50#ibcon#wrote, iclass 39, count 0 2006.229.17:58:00.50#ibcon#about to read 3, iclass 39, count 0 2006.229.17:58:00.52#ibcon#read 3, iclass 39, count 0 2006.229.17:58:00.52#ibcon#about to read 4, iclass 39, count 0 2006.229.17:58:00.52#ibcon#read 4, iclass 39, count 0 2006.229.17:58:00.52#ibcon#about to read 5, iclass 39, count 0 2006.229.17:58:00.52#ibcon#read 5, iclass 39, count 0 2006.229.17:58:00.52#ibcon#about to read 6, iclass 39, count 0 2006.229.17:58:00.52#ibcon#read 6, iclass 39, count 0 2006.229.17:58:00.52#ibcon#end of sib2, iclass 39, count 0 2006.229.17:58:00.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.17:58:00.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.17:58:00.52#ibcon#[27=USB\r\n] 2006.229.17:58:00.52#ibcon#*before write, iclass 39, count 0 2006.229.17:58:00.52#ibcon#enter sib2, iclass 39, count 0 2006.229.17:58:00.52#ibcon#flushed, iclass 39, count 0 2006.229.17:58:00.52#ibcon#about to write, iclass 39, count 0 2006.229.17:58:00.52#ibcon#wrote, iclass 39, count 0 2006.229.17:58:00.52#ibcon#about to read 3, iclass 39, count 0 2006.229.17:58:00.55#ibcon#read 3, iclass 39, count 0 2006.229.17:58:00.55#ibcon#about to read 4, iclass 39, count 0 2006.229.17:58:00.55#ibcon#read 4, iclass 39, count 0 2006.229.17:58:00.55#ibcon#about to read 5, iclass 39, count 0 2006.229.17:58:00.55#ibcon#read 5, iclass 39, count 0 2006.229.17:58:00.55#ibcon#about to read 6, iclass 39, count 0 2006.229.17:58:00.55#ibcon#read 6, iclass 39, count 0 2006.229.17:58:00.55#ibcon#end of sib2, iclass 39, count 0 2006.229.17:58:00.55#ibcon#*after write, iclass 39, count 0 2006.229.17:58:00.55#ibcon#*before return 0, iclass 39, count 0 2006.229.17:58:00.55#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:58:00.55#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.17:58:00.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.17:58:00.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.17:58:00.55$vck44/vblo=3,649.99 2006.229.17:58:00.55#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.17:58:00.55#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.17:58:00.55#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:00.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:58:00.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:58:00.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:58:00.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.17:58:00.55#ibcon#first serial, iclass 3, count 0 2006.229.17:58:00.55#ibcon#enter sib2, iclass 3, count 0 2006.229.17:58:00.55#ibcon#flushed, iclass 3, count 0 2006.229.17:58:00.55#ibcon#about to write, iclass 3, count 0 2006.229.17:58:00.55#ibcon#wrote, iclass 3, count 0 2006.229.17:58:00.55#ibcon#about to read 3, iclass 3, count 0 2006.229.17:58:00.57#ibcon#read 3, iclass 3, count 0 2006.229.17:58:00.57#ibcon#about to read 4, iclass 3, count 0 2006.229.17:58:00.57#ibcon#read 4, iclass 3, count 0 2006.229.17:58:00.57#ibcon#about to read 5, iclass 3, count 0 2006.229.17:58:00.57#ibcon#read 5, iclass 3, count 0 2006.229.17:58:00.57#ibcon#about to read 6, iclass 3, count 0 2006.229.17:58:00.57#ibcon#read 6, iclass 3, count 0 2006.229.17:58:00.57#ibcon#end of sib2, iclass 3, count 0 2006.229.17:58:00.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.17:58:00.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.17:58:00.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.17:58:00.57#ibcon#*before write, iclass 3, count 0 2006.229.17:58:00.57#ibcon#enter sib2, iclass 3, count 0 2006.229.17:58:00.57#ibcon#flushed, iclass 3, count 0 2006.229.17:58:00.57#ibcon#about to write, iclass 3, count 0 2006.229.17:58:00.57#ibcon#wrote, iclass 3, count 0 2006.229.17:58:00.57#ibcon#about to read 3, iclass 3, count 0 2006.229.17:58:00.61#ibcon#read 3, iclass 3, count 0 2006.229.17:58:00.61#ibcon#about to read 4, iclass 3, count 0 2006.229.17:58:00.61#ibcon#read 4, iclass 3, count 0 2006.229.17:58:00.61#ibcon#about to read 5, iclass 3, count 0 2006.229.17:58:00.61#ibcon#read 5, iclass 3, count 0 2006.229.17:58:00.61#ibcon#about to read 6, iclass 3, count 0 2006.229.17:58:00.61#ibcon#read 6, iclass 3, count 0 2006.229.17:58:00.61#ibcon#end of sib2, iclass 3, count 0 2006.229.17:58:00.61#ibcon#*after write, iclass 3, count 0 2006.229.17:58:00.61#ibcon#*before return 0, iclass 3, count 0 2006.229.17:58:00.61#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:58:00.61#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.17:58:00.61#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.17:58:00.61#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.17:58:00.61$vck44/vb=3,4 2006.229.17:58:00.61#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.17:58:00.61#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.17:58:00.61#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:00.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:58:00.67#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:58:00.67#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:58:00.67#ibcon#enter wrdev, iclass 5, count 2 2006.229.17:58:00.67#ibcon#first serial, iclass 5, count 2 2006.229.17:58:00.67#ibcon#enter sib2, iclass 5, count 2 2006.229.17:58:00.67#ibcon#flushed, iclass 5, count 2 2006.229.17:58:00.67#ibcon#about to write, iclass 5, count 2 2006.229.17:58:00.67#ibcon#wrote, iclass 5, count 2 2006.229.17:58:00.67#ibcon#about to read 3, iclass 5, count 2 2006.229.17:58:00.69#ibcon#read 3, iclass 5, count 2 2006.229.17:58:00.69#ibcon#about to read 4, iclass 5, count 2 2006.229.17:58:00.69#ibcon#read 4, iclass 5, count 2 2006.229.17:58:00.69#ibcon#about to read 5, iclass 5, count 2 2006.229.17:58:00.69#ibcon#read 5, iclass 5, count 2 2006.229.17:58:00.69#ibcon#about to read 6, iclass 5, count 2 2006.229.17:58:00.69#ibcon#read 6, iclass 5, count 2 2006.229.17:58:00.69#ibcon#end of sib2, iclass 5, count 2 2006.229.17:58:00.69#ibcon#*mode == 0, iclass 5, count 2 2006.229.17:58:00.69#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.17:58:00.69#ibcon#[27=AT03-04\r\n] 2006.229.17:58:00.69#ibcon#*before write, iclass 5, count 2 2006.229.17:58:00.69#ibcon#enter sib2, iclass 5, count 2 2006.229.17:58:00.69#ibcon#flushed, iclass 5, count 2 2006.229.17:58:00.69#ibcon#about to write, iclass 5, count 2 2006.229.17:58:00.69#ibcon#wrote, iclass 5, count 2 2006.229.17:58:00.69#ibcon#about to read 3, iclass 5, count 2 2006.229.17:58:00.72#ibcon#read 3, iclass 5, count 2 2006.229.17:58:00.72#ibcon#about to read 4, iclass 5, count 2 2006.229.17:58:00.72#ibcon#read 4, iclass 5, count 2 2006.229.17:58:00.72#ibcon#about to read 5, iclass 5, count 2 2006.229.17:58:00.72#ibcon#read 5, iclass 5, count 2 2006.229.17:58:00.72#ibcon#about to read 6, iclass 5, count 2 2006.229.17:58:00.72#ibcon#read 6, iclass 5, count 2 2006.229.17:58:00.72#ibcon#end of sib2, iclass 5, count 2 2006.229.17:58:00.72#ibcon#*after write, iclass 5, count 2 2006.229.17:58:00.72#ibcon#*before return 0, iclass 5, count 2 2006.229.17:58:00.72#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:58:00.72#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.17:58:00.72#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.17:58:00.72#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:00.72#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:58:00.84#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:58:00.84#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:58:00.84#ibcon#enter wrdev, iclass 5, count 0 2006.229.17:58:00.84#ibcon#first serial, iclass 5, count 0 2006.229.17:58:00.84#ibcon#enter sib2, iclass 5, count 0 2006.229.17:58:00.84#ibcon#flushed, iclass 5, count 0 2006.229.17:58:00.84#ibcon#about to write, iclass 5, count 0 2006.229.17:58:00.84#ibcon#wrote, iclass 5, count 0 2006.229.17:58:00.84#ibcon#about to read 3, iclass 5, count 0 2006.229.17:58:00.86#ibcon#read 3, iclass 5, count 0 2006.229.17:58:00.86#ibcon#about to read 4, iclass 5, count 0 2006.229.17:58:00.86#ibcon#read 4, iclass 5, count 0 2006.229.17:58:00.86#ibcon#about to read 5, iclass 5, count 0 2006.229.17:58:00.86#ibcon#read 5, iclass 5, count 0 2006.229.17:58:00.86#ibcon#about to read 6, iclass 5, count 0 2006.229.17:58:00.86#ibcon#read 6, iclass 5, count 0 2006.229.17:58:00.86#ibcon#end of sib2, iclass 5, count 0 2006.229.17:58:00.86#ibcon#*mode == 0, iclass 5, count 0 2006.229.17:58:00.86#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.17:58:00.86#ibcon#[27=USB\r\n] 2006.229.17:58:00.86#ibcon#*before write, iclass 5, count 0 2006.229.17:58:00.86#ibcon#enter sib2, iclass 5, count 0 2006.229.17:58:00.86#ibcon#flushed, iclass 5, count 0 2006.229.17:58:00.86#ibcon#about to write, iclass 5, count 0 2006.229.17:58:00.86#ibcon#wrote, iclass 5, count 0 2006.229.17:58:00.86#ibcon#about to read 3, iclass 5, count 0 2006.229.17:58:00.89#ibcon#read 3, iclass 5, count 0 2006.229.17:58:00.89#ibcon#about to read 4, iclass 5, count 0 2006.229.17:58:00.89#ibcon#read 4, iclass 5, count 0 2006.229.17:58:00.89#ibcon#about to read 5, iclass 5, count 0 2006.229.17:58:00.89#ibcon#read 5, iclass 5, count 0 2006.229.17:58:00.89#ibcon#about to read 6, iclass 5, count 0 2006.229.17:58:00.89#ibcon#read 6, iclass 5, count 0 2006.229.17:58:00.89#ibcon#end of sib2, iclass 5, count 0 2006.229.17:58:00.89#ibcon#*after write, iclass 5, count 0 2006.229.17:58:00.89#ibcon#*before return 0, iclass 5, count 0 2006.229.17:58:00.89#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:58:00.89#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.17:58:00.89#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.17:58:00.89#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.17:58:00.89$vck44/vblo=4,679.99 2006.229.17:58:00.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.17:58:00.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.17:58:00.89#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:00.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:58:00.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:58:00.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:58:00.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.17:58:00.89#ibcon#first serial, iclass 7, count 0 2006.229.17:58:00.89#ibcon#enter sib2, iclass 7, count 0 2006.229.17:58:00.89#ibcon#flushed, iclass 7, count 0 2006.229.17:58:00.89#ibcon#about to write, iclass 7, count 0 2006.229.17:58:00.89#ibcon#wrote, iclass 7, count 0 2006.229.17:58:00.89#ibcon#about to read 3, iclass 7, count 0 2006.229.17:58:00.91#ibcon#read 3, iclass 7, count 0 2006.229.17:58:00.91#ibcon#about to read 4, iclass 7, count 0 2006.229.17:58:00.91#ibcon#read 4, iclass 7, count 0 2006.229.17:58:00.91#ibcon#about to read 5, iclass 7, count 0 2006.229.17:58:00.91#ibcon#read 5, iclass 7, count 0 2006.229.17:58:00.91#ibcon#about to read 6, iclass 7, count 0 2006.229.17:58:00.91#ibcon#read 6, iclass 7, count 0 2006.229.17:58:00.91#ibcon#end of sib2, iclass 7, count 0 2006.229.17:58:00.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.17:58:00.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.17:58:00.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.17:58:00.91#ibcon#*before write, iclass 7, count 0 2006.229.17:58:00.91#ibcon#enter sib2, iclass 7, count 0 2006.229.17:58:00.91#ibcon#flushed, iclass 7, count 0 2006.229.17:58:00.91#ibcon#about to write, iclass 7, count 0 2006.229.17:58:00.91#ibcon#wrote, iclass 7, count 0 2006.229.17:58:00.91#ibcon#about to read 3, iclass 7, count 0 2006.229.17:58:00.95#ibcon#read 3, iclass 7, count 0 2006.229.17:58:00.95#ibcon#about to read 4, iclass 7, count 0 2006.229.17:58:00.95#ibcon#read 4, iclass 7, count 0 2006.229.17:58:00.95#ibcon#about to read 5, iclass 7, count 0 2006.229.17:58:00.95#ibcon#read 5, iclass 7, count 0 2006.229.17:58:00.95#ibcon#about to read 6, iclass 7, count 0 2006.229.17:58:00.95#ibcon#read 6, iclass 7, count 0 2006.229.17:58:00.95#ibcon#end of sib2, iclass 7, count 0 2006.229.17:58:00.95#ibcon#*after write, iclass 7, count 0 2006.229.17:58:00.95#ibcon#*before return 0, iclass 7, count 0 2006.229.17:58:00.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:58:00.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.17:58:00.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.17:58:00.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.17:58:00.95$vck44/vb=4,4 2006.229.17:58:00.95#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.17:58:00.95#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.17:58:00.95#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:00.95#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:58:01.01#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:58:01.01#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:58:01.01#ibcon#enter wrdev, iclass 11, count 2 2006.229.17:58:01.01#ibcon#first serial, iclass 11, count 2 2006.229.17:58:01.01#ibcon#enter sib2, iclass 11, count 2 2006.229.17:58:01.01#ibcon#flushed, iclass 11, count 2 2006.229.17:58:01.01#ibcon#about to write, iclass 11, count 2 2006.229.17:58:01.01#ibcon#wrote, iclass 11, count 2 2006.229.17:58:01.01#ibcon#about to read 3, iclass 11, count 2 2006.229.17:58:01.03#ibcon#read 3, iclass 11, count 2 2006.229.17:58:01.03#ibcon#about to read 4, iclass 11, count 2 2006.229.17:58:01.03#ibcon#read 4, iclass 11, count 2 2006.229.17:58:01.03#ibcon#about to read 5, iclass 11, count 2 2006.229.17:58:01.03#ibcon#read 5, iclass 11, count 2 2006.229.17:58:01.03#ibcon#about to read 6, iclass 11, count 2 2006.229.17:58:01.03#ibcon#read 6, iclass 11, count 2 2006.229.17:58:01.03#ibcon#end of sib2, iclass 11, count 2 2006.229.17:58:01.03#ibcon#*mode == 0, iclass 11, count 2 2006.229.17:58:01.03#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.17:58:01.03#ibcon#[27=AT04-04\r\n] 2006.229.17:58:01.03#ibcon#*before write, iclass 11, count 2 2006.229.17:58:01.03#ibcon#enter sib2, iclass 11, count 2 2006.229.17:58:01.03#ibcon#flushed, iclass 11, count 2 2006.229.17:58:01.03#ibcon#about to write, iclass 11, count 2 2006.229.17:58:01.03#ibcon#wrote, iclass 11, count 2 2006.229.17:58:01.03#ibcon#about to read 3, iclass 11, count 2 2006.229.17:58:01.06#ibcon#read 3, iclass 11, count 2 2006.229.17:58:01.06#ibcon#about to read 4, iclass 11, count 2 2006.229.17:58:01.06#ibcon#read 4, iclass 11, count 2 2006.229.17:58:01.06#ibcon#about to read 5, iclass 11, count 2 2006.229.17:58:01.06#ibcon#read 5, iclass 11, count 2 2006.229.17:58:01.06#ibcon#about to read 6, iclass 11, count 2 2006.229.17:58:01.06#ibcon#read 6, iclass 11, count 2 2006.229.17:58:01.06#ibcon#end of sib2, iclass 11, count 2 2006.229.17:58:01.06#ibcon#*after write, iclass 11, count 2 2006.229.17:58:01.06#ibcon#*before return 0, iclass 11, count 2 2006.229.17:58:01.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:58:01.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.17:58:01.06#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.17:58:01.06#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:01.06#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:58:01.18#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:58:01.18#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:58:01.18#ibcon#enter wrdev, iclass 11, count 0 2006.229.17:58:01.18#ibcon#first serial, iclass 11, count 0 2006.229.17:58:01.18#ibcon#enter sib2, iclass 11, count 0 2006.229.17:58:01.18#ibcon#flushed, iclass 11, count 0 2006.229.17:58:01.18#ibcon#about to write, iclass 11, count 0 2006.229.17:58:01.18#ibcon#wrote, iclass 11, count 0 2006.229.17:58:01.18#ibcon#about to read 3, iclass 11, count 0 2006.229.17:58:01.20#ibcon#read 3, iclass 11, count 0 2006.229.17:58:01.20#ibcon#about to read 4, iclass 11, count 0 2006.229.17:58:01.20#ibcon#read 4, iclass 11, count 0 2006.229.17:58:01.20#ibcon#about to read 5, iclass 11, count 0 2006.229.17:58:01.20#ibcon#read 5, iclass 11, count 0 2006.229.17:58:01.20#ibcon#about to read 6, iclass 11, count 0 2006.229.17:58:01.20#ibcon#read 6, iclass 11, count 0 2006.229.17:58:01.20#ibcon#end of sib2, iclass 11, count 0 2006.229.17:58:01.20#ibcon#*mode == 0, iclass 11, count 0 2006.229.17:58:01.20#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.17:58:01.20#ibcon#[27=USB\r\n] 2006.229.17:58:01.20#ibcon#*before write, iclass 11, count 0 2006.229.17:58:01.20#ibcon#enter sib2, iclass 11, count 0 2006.229.17:58:01.20#ibcon#flushed, iclass 11, count 0 2006.229.17:58:01.20#ibcon#about to write, iclass 11, count 0 2006.229.17:58:01.20#ibcon#wrote, iclass 11, count 0 2006.229.17:58:01.20#ibcon#about to read 3, iclass 11, count 0 2006.229.17:58:01.23#ibcon#read 3, iclass 11, count 0 2006.229.17:58:01.23#ibcon#about to read 4, iclass 11, count 0 2006.229.17:58:01.23#ibcon#read 4, iclass 11, count 0 2006.229.17:58:01.23#ibcon#about to read 5, iclass 11, count 0 2006.229.17:58:01.23#ibcon#read 5, iclass 11, count 0 2006.229.17:58:01.23#ibcon#about to read 6, iclass 11, count 0 2006.229.17:58:01.23#ibcon#read 6, iclass 11, count 0 2006.229.17:58:01.23#ibcon#end of sib2, iclass 11, count 0 2006.229.17:58:01.23#ibcon#*after write, iclass 11, count 0 2006.229.17:58:01.23#ibcon#*before return 0, iclass 11, count 0 2006.229.17:58:01.23#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:58:01.23#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.17:58:01.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.17:58:01.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.17:58:01.23$vck44/vblo=5,709.99 2006.229.17:58:01.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.17:58:01.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.17:58:01.23#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:01.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:58:01.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:58:01.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:58:01.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.17:58:01.23#ibcon#first serial, iclass 13, count 0 2006.229.17:58:01.23#ibcon#enter sib2, iclass 13, count 0 2006.229.17:58:01.23#ibcon#flushed, iclass 13, count 0 2006.229.17:58:01.23#ibcon#about to write, iclass 13, count 0 2006.229.17:58:01.23#ibcon#wrote, iclass 13, count 0 2006.229.17:58:01.23#ibcon#about to read 3, iclass 13, count 0 2006.229.17:58:01.25#ibcon#read 3, iclass 13, count 0 2006.229.17:58:01.25#ibcon#about to read 4, iclass 13, count 0 2006.229.17:58:01.25#ibcon#read 4, iclass 13, count 0 2006.229.17:58:01.25#ibcon#about to read 5, iclass 13, count 0 2006.229.17:58:01.25#ibcon#read 5, iclass 13, count 0 2006.229.17:58:01.25#ibcon#about to read 6, iclass 13, count 0 2006.229.17:58:01.25#ibcon#read 6, iclass 13, count 0 2006.229.17:58:01.25#ibcon#end of sib2, iclass 13, count 0 2006.229.17:58:01.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.17:58:01.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.17:58:01.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.17:58:01.25#ibcon#*before write, iclass 13, count 0 2006.229.17:58:01.25#ibcon#enter sib2, iclass 13, count 0 2006.229.17:58:01.25#ibcon#flushed, iclass 13, count 0 2006.229.17:58:01.25#ibcon#about to write, iclass 13, count 0 2006.229.17:58:01.25#ibcon#wrote, iclass 13, count 0 2006.229.17:58:01.25#ibcon#about to read 3, iclass 13, count 0 2006.229.17:58:01.29#ibcon#read 3, iclass 13, count 0 2006.229.17:58:01.29#ibcon#about to read 4, iclass 13, count 0 2006.229.17:58:01.29#ibcon#read 4, iclass 13, count 0 2006.229.17:58:01.29#ibcon#about to read 5, iclass 13, count 0 2006.229.17:58:01.29#ibcon#read 5, iclass 13, count 0 2006.229.17:58:01.29#ibcon#about to read 6, iclass 13, count 0 2006.229.17:58:01.29#ibcon#read 6, iclass 13, count 0 2006.229.17:58:01.29#ibcon#end of sib2, iclass 13, count 0 2006.229.17:58:01.29#ibcon#*after write, iclass 13, count 0 2006.229.17:58:01.29#ibcon#*before return 0, iclass 13, count 0 2006.229.17:58:01.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:58:01.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.17:58:01.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.17:58:01.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.17:58:01.29$vck44/vb=5,4 2006.229.17:58:01.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.17:58:01.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.17:58:01.29#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:01.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:58:01.35#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:58:01.35#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:58:01.35#ibcon#enter wrdev, iclass 15, count 2 2006.229.17:58:01.35#ibcon#first serial, iclass 15, count 2 2006.229.17:58:01.35#ibcon#enter sib2, iclass 15, count 2 2006.229.17:58:01.35#ibcon#flushed, iclass 15, count 2 2006.229.17:58:01.35#ibcon#about to write, iclass 15, count 2 2006.229.17:58:01.35#ibcon#wrote, iclass 15, count 2 2006.229.17:58:01.35#ibcon#about to read 3, iclass 15, count 2 2006.229.17:58:01.37#ibcon#read 3, iclass 15, count 2 2006.229.17:58:01.37#ibcon#about to read 4, iclass 15, count 2 2006.229.17:58:01.37#ibcon#read 4, iclass 15, count 2 2006.229.17:58:01.37#ibcon#about to read 5, iclass 15, count 2 2006.229.17:58:01.37#ibcon#read 5, iclass 15, count 2 2006.229.17:58:01.37#ibcon#about to read 6, iclass 15, count 2 2006.229.17:58:01.37#ibcon#read 6, iclass 15, count 2 2006.229.17:58:01.37#ibcon#end of sib2, iclass 15, count 2 2006.229.17:58:01.37#ibcon#*mode == 0, iclass 15, count 2 2006.229.17:58:01.37#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.17:58:01.37#ibcon#[27=AT05-04\r\n] 2006.229.17:58:01.37#ibcon#*before write, iclass 15, count 2 2006.229.17:58:01.37#ibcon#enter sib2, iclass 15, count 2 2006.229.17:58:01.37#ibcon#flushed, iclass 15, count 2 2006.229.17:58:01.37#ibcon#about to write, iclass 15, count 2 2006.229.17:58:01.37#ibcon#wrote, iclass 15, count 2 2006.229.17:58:01.37#ibcon#about to read 3, iclass 15, count 2 2006.229.17:58:01.40#ibcon#read 3, iclass 15, count 2 2006.229.17:58:01.40#ibcon#about to read 4, iclass 15, count 2 2006.229.17:58:01.40#ibcon#read 4, iclass 15, count 2 2006.229.17:58:01.40#ibcon#about to read 5, iclass 15, count 2 2006.229.17:58:01.40#ibcon#read 5, iclass 15, count 2 2006.229.17:58:01.40#ibcon#about to read 6, iclass 15, count 2 2006.229.17:58:01.40#ibcon#read 6, iclass 15, count 2 2006.229.17:58:01.40#ibcon#end of sib2, iclass 15, count 2 2006.229.17:58:01.40#ibcon#*after write, iclass 15, count 2 2006.229.17:58:01.40#ibcon#*before return 0, iclass 15, count 2 2006.229.17:58:01.40#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:58:01.40#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.17:58:01.40#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.17:58:01.40#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:01.40#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:58:01.52#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:58:01.52#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:58:01.52#ibcon#enter wrdev, iclass 15, count 0 2006.229.17:58:01.52#ibcon#first serial, iclass 15, count 0 2006.229.17:58:01.52#ibcon#enter sib2, iclass 15, count 0 2006.229.17:58:01.52#ibcon#flushed, iclass 15, count 0 2006.229.17:58:01.52#ibcon#about to write, iclass 15, count 0 2006.229.17:58:01.52#ibcon#wrote, iclass 15, count 0 2006.229.17:58:01.52#ibcon#about to read 3, iclass 15, count 0 2006.229.17:58:01.54#ibcon#read 3, iclass 15, count 0 2006.229.17:58:01.54#ibcon#about to read 4, iclass 15, count 0 2006.229.17:58:01.54#ibcon#read 4, iclass 15, count 0 2006.229.17:58:01.54#ibcon#about to read 5, iclass 15, count 0 2006.229.17:58:01.54#ibcon#read 5, iclass 15, count 0 2006.229.17:58:01.54#ibcon#about to read 6, iclass 15, count 0 2006.229.17:58:01.54#ibcon#read 6, iclass 15, count 0 2006.229.17:58:01.54#ibcon#end of sib2, iclass 15, count 0 2006.229.17:58:01.54#ibcon#*mode == 0, iclass 15, count 0 2006.229.17:58:01.54#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.17:58:01.54#ibcon#[27=USB\r\n] 2006.229.17:58:01.54#ibcon#*before write, iclass 15, count 0 2006.229.17:58:01.54#ibcon#enter sib2, iclass 15, count 0 2006.229.17:58:01.54#ibcon#flushed, iclass 15, count 0 2006.229.17:58:01.54#ibcon#about to write, iclass 15, count 0 2006.229.17:58:01.54#ibcon#wrote, iclass 15, count 0 2006.229.17:58:01.54#ibcon#about to read 3, iclass 15, count 0 2006.229.17:58:01.57#ibcon#read 3, iclass 15, count 0 2006.229.17:58:01.57#ibcon#about to read 4, iclass 15, count 0 2006.229.17:58:01.57#ibcon#read 4, iclass 15, count 0 2006.229.17:58:01.57#ibcon#about to read 5, iclass 15, count 0 2006.229.17:58:01.57#ibcon#read 5, iclass 15, count 0 2006.229.17:58:01.57#ibcon#about to read 6, iclass 15, count 0 2006.229.17:58:01.57#ibcon#read 6, iclass 15, count 0 2006.229.17:58:01.57#ibcon#end of sib2, iclass 15, count 0 2006.229.17:58:01.57#ibcon#*after write, iclass 15, count 0 2006.229.17:58:01.57#ibcon#*before return 0, iclass 15, count 0 2006.229.17:58:01.57#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:58:01.57#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.17:58:01.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.17:58:01.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.17:58:01.57$vck44/vblo=6,719.99 2006.229.17:58:01.57#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.17:58:01.57#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.17:58:01.57#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:01.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:58:01.57#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:58:01.57#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:58:01.57#ibcon#enter wrdev, iclass 17, count 0 2006.229.17:58:01.57#ibcon#first serial, iclass 17, count 0 2006.229.17:58:01.57#ibcon#enter sib2, iclass 17, count 0 2006.229.17:58:01.57#ibcon#flushed, iclass 17, count 0 2006.229.17:58:01.57#ibcon#about to write, iclass 17, count 0 2006.229.17:58:01.57#ibcon#wrote, iclass 17, count 0 2006.229.17:58:01.57#ibcon#about to read 3, iclass 17, count 0 2006.229.17:58:01.59#ibcon#read 3, iclass 17, count 0 2006.229.17:58:01.59#ibcon#about to read 4, iclass 17, count 0 2006.229.17:58:01.59#ibcon#read 4, iclass 17, count 0 2006.229.17:58:01.59#ibcon#about to read 5, iclass 17, count 0 2006.229.17:58:01.59#ibcon#read 5, iclass 17, count 0 2006.229.17:58:01.59#ibcon#about to read 6, iclass 17, count 0 2006.229.17:58:01.59#ibcon#read 6, iclass 17, count 0 2006.229.17:58:01.59#ibcon#end of sib2, iclass 17, count 0 2006.229.17:58:01.59#ibcon#*mode == 0, iclass 17, count 0 2006.229.17:58:01.59#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.17:58:01.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.17:58:01.59#ibcon#*before write, iclass 17, count 0 2006.229.17:58:01.59#ibcon#enter sib2, iclass 17, count 0 2006.229.17:58:01.59#ibcon#flushed, iclass 17, count 0 2006.229.17:58:01.59#ibcon#about to write, iclass 17, count 0 2006.229.17:58:01.59#ibcon#wrote, iclass 17, count 0 2006.229.17:58:01.59#ibcon#about to read 3, iclass 17, count 0 2006.229.17:58:01.63#ibcon#read 3, iclass 17, count 0 2006.229.17:58:01.63#ibcon#about to read 4, iclass 17, count 0 2006.229.17:58:01.63#ibcon#read 4, iclass 17, count 0 2006.229.17:58:01.63#ibcon#about to read 5, iclass 17, count 0 2006.229.17:58:01.63#ibcon#read 5, iclass 17, count 0 2006.229.17:58:01.63#ibcon#about to read 6, iclass 17, count 0 2006.229.17:58:01.63#ibcon#read 6, iclass 17, count 0 2006.229.17:58:01.63#ibcon#end of sib2, iclass 17, count 0 2006.229.17:58:01.63#ibcon#*after write, iclass 17, count 0 2006.229.17:58:01.63#ibcon#*before return 0, iclass 17, count 0 2006.229.17:58:01.63#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:58:01.63#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.17:58:01.63#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.17:58:01.63#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.17:58:01.63$vck44/vb=6,4 2006.229.17:58:01.63#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.17:58:01.63#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.17:58:01.63#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:01.63#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:58:01.69#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:58:01.69#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:58:01.69#ibcon#enter wrdev, iclass 19, count 2 2006.229.17:58:01.69#ibcon#first serial, iclass 19, count 2 2006.229.17:58:01.69#ibcon#enter sib2, iclass 19, count 2 2006.229.17:58:01.69#ibcon#flushed, iclass 19, count 2 2006.229.17:58:01.69#ibcon#about to write, iclass 19, count 2 2006.229.17:58:01.69#ibcon#wrote, iclass 19, count 2 2006.229.17:58:01.69#ibcon#about to read 3, iclass 19, count 2 2006.229.17:58:01.71#ibcon#read 3, iclass 19, count 2 2006.229.17:58:01.71#ibcon#about to read 4, iclass 19, count 2 2006.229.17:58:01.71#ibcon#read 4, iclass 19, count 2 2006.229.17:58:01.71#ibcon#about to read 5, iclass 19, count 2 2006.229.17:58:01.71#ibcon#read 5, iclass 19, count 2 2006.229.17:58:01.71#ibcon#about to read 6, iclass 19, count 2 2006.229.17:58:01.71#ibcon#read 6, iclass 19, count 2 2006.229.17:58:01.71#ibcon#end of sib2, iclass 19, count 2 2006.229.17:58:01.71#ibcon#*mode == 0, iclass 19, count 2 2006.229.17:58:01.71#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.17:58:01.71#ibcon#[27=AT06-04\r\n] 2006.229.17:58:01.71#ibcon#*before write, iclass 19, count 2 2006.229.17:58:01.71#ibcon#enter sib2, iclass 19, count 2 2006.229.17:58:01.71#ibcon#flushed, iclass 19, count 2 2006.229.17:58:01.71#ibcon#about to write, iclass 19, count 2 2006.229.17:58:01.71#ibcon#wrote, iclass 19, count 2 2006.229.17:58:01.71#ibcon#about to read 3, iclass 19, count 2 2006.229.17:58:01.74#ibcon#read 3, iclass 19, count 2 2006.229.17:58:01.74#ibcon#about to read 4, iclass 19, count 2 2006.229.17:58:01.74#ibcon#read 4, iclass 19, count 2 2006.229.17:58:01.74#ibcon#about to read 5, iclass 19, count 2 2006.229.17:58:01.74#ibcon#read 5, iclass 19, count 2 2006.229.17:58:01.74#ibcon#about to read 6, iclass 19, count 2 2006.229.17:58:01.74#ibcon#read 6, iclass 19, count 2 2006.229.17:58:01.74#ibcon#end of sib2, iclass 19, count 2 2006.229.17:58:01.74#ibcon#*after write, iclass 19, count 2 2006.229.17:58:01.74#ibcon#*before return 0, iclass 19, count 2 2006.229.17:58:01.74#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:58:01.74#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.17:58:01.74#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.17:58:01.74#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:01.74#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:58:01.86#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:58:01.86#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:58:01.86#ibcon#enter wrdev, iclass 19, count 0 2006.229.17:58:01.86#ibcon#first serial, iclass 19, count 0 2006.229.17:58:01.86#ibcon#enter sib2, iclass 19, count 0 2006.229.17:58:01.86#ibcon#flushed, iclass 19, count 0 2006.229.17:58:01.86#ibcon#about to write, iclass 19, count 0 2006.229.17:58:01.86#ibcon#wrote, iclass 19, count 0 2006.229.17:58:01.86#ibcon#about to read 3, iclass 19, count 0 2006.229.17:58:01.88#ibcon#read 3, iclass 19, count 0 2006.229.17:58:01.88#ibcon#about to read 4, iclass 19, count 0 2006.229.17:58:01.88#ibcon#read 4, iclass 19, count 0 2006.229.17:58:01.88#ibcon#about to read 5, iclass 19, count 0 2006.229.17:58:01.88#ibcon#read 5, iclass 19, count 0 2006.229.17:58:01.88#ibcon#about to read 6, iclass 19, count 0 2006.229.17:58:01.88#ibcon#read 6, iclass 19, count 0 2006.229.17:58:01.88#ibcon#end of sib2, iclass 19, count 0 2006.229.17:58:01.88#ibcon#*mode == 0, iclass 19, count 0 2006.229.17:58:01.88#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.17:58:01.88#ibcon#[27=USB\r\n] 2006.229.17:58:01.88#ibcon#*before write, iclass 19, count 0 2006.229.17:58:01.88#ibcon#enter sib2, iclass 19, count 0 2006.229.17:58:01.88#ibcon#flushed, iclass 19, count 0 2006.229.17:58:01.88#ibcon#about to write, iclass 19, count 0 2006.229.17:58:01.88#ibcon#wrote, iclass 19, count 0 2006.229.17:58:01.88#ibcon#about to read 3, iclass 19, count 0 2006.229.17:58:01.91#ibcon#read 3, iclass 19, count 0 2006.229.17:58:01.91#ibcon#about to read 4, iclass 19, count 0 2006.229.17:58:01.91#ibcon#read 4, iclass 19, count 0 2006.229.17:58:01.91#ibcon#about to read 5, iclass 19, count 0 2006.229.17:58:01.91#ibcon#read 5, iclass 19, count 0 2006.229.17:58:01.91#ibcon#about to read 6, iclass 19, count 0 2006.229.17:58:01.91#ibcon#read 6, iclass 19, count 0 2006.229.17:58:01.91#ibcon#end of sib2, iclass 19, count 0 2006.229.17:58:01.91#ibcon#*after write, iclass 19, count 0 2006.229.17:58:01.91#ibcon#*before return 0, iclass 19, count 0 2006.229.17:58:01.91#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:58:01.91#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.17:58:01.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.17:58:01.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.17:58:01.91$vck44/vblo=7,734.99 2006.229.17:58:01.91#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.17:58:01.91#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.17:58:01.91#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:01.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:58:01.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:58:01.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:58:01.91#ibcon#enter wrdev, iclass 21, count 0 2006.229.17:58:01.91#ibcon#first serial, iclass 21, count 0 2006.229.17:58:01.91#ibcon#enter sib2, iclass 21, count 0 2006.229.17:58:01.91#ibcon#flushed, iclass 21, count 0 2006.229.17:58:01.91#ibcon#about to write, iclass 21, count 0 2006.229.17:58:01.91#ibcon#wrote, iclass 21, count 0 2006.229.17:58:01.91#ibcon#about to read 3, iclass 21, count 0 2006.229.17:58:01.93#ibcon#read 3, iclass 21, count 0 2006.229.17:58:01.93#ibcon#about to read 4, iclass 21, count 0 2006.229.17:58:01.93#ibcon#read 4, iclass 21, count 0 2006.229.17:58:01.93#ibcon#about to read 5, iclass 21, count 0 2006.229.17:58:01.93#ibcon#read 5, iclass 21, count 0 2006.229.17:58:01.93#ibcon#about to read 6, iclass 21, count 0 2006.229.17:58:01.93#ibcon#read 6, iclass 21, count 0 2006.229.17:58:01.93#ibcon#end of sib2, iclass 21, count 0 2006.229.17:58:01.93#ibcon#*mode == 0, iclass 21, count 0 2006.229.17:58:01.93#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.17:58:01.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.17:58:01.93#ibcon#*before write, iclass 21, count 0 2006.229.17:58:01.93#ibcon#enter sib2, iclass 21, count 0 2006.229.17:58:01.93#ibcon#flushed, iclass 21, count 0 2006.229.17:58:01.93#ibcon#about to write, iclass 21, count 0 2006.229.17:58:01.93#ibcon#wrote, iclass 21, count 0 2006.229.17:58:01.93#ibcon#about to read 3, iclass 21, count 0 2006.229.17:58:01.97#ibcon#read 3, iclass 21, count 0 2006.229.17:58:01.97#ibcon#about to read 4, iclass 21, count 0 2006.229.17:58:01.97#ibcon#read 4, iclass 21, count 0 2006.229.17:58:01.97#ibcon#about to read 5, iclass 21, count 0 2006.229.17:58:01.97#ibcon#read 5, iclass 21, count 0 2006.229.17:58:01.97#ibcon#about to read 6, iclass 21, count 0 2006.229.17:58:01.97#ibcon#read 6, iclass 21, count 0 2006.229.17:58:01.97#ibcon#end of sib2, iclass 21, count 0 2006.229.17:58:01.97#ibcon#*after write, iclass 21, count 0 2006.229.17:58:01.97#ibcon#*before return 0, iclass 21, count 0 2006.229.17:58:01.97#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:58:01.97#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.17:58:01.97#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.17:58:01.97#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.17:58:01.97$vck44/vb=7,4 2006.229.17:58:01.97#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.17:58:01.97#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.17:58:01.97#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:01.97#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:58:02.03#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:58:02.03#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:58:02.03#ibcon#enter wrdev, iclass 23, count 2 2006.229.17:58:02.03#ibcon#first serial, iclass 23, count 2 2006.229.17:58:02.03#ibcon#enter sib2, iclass 23, count 2 2006.229.17:58:02.03#ibcon#flushed, iclass 23, count 2 2006.229.17:58:02.03#ibcon#about to write, iclass 23, count 2 2006.229.17:58:02.03#ibcon#wrote, iclass 23, count 2 2006.229.17:58:02.03#ibcon#about to read 3, iclass 23, count 2 2006.229.17:58:02.05#ibcon#read 3, iclass 23, count 2 2006.229.17:58:02.05#ibcon#about to read 4, iclass 23, count 2 2006.229.17:58:02.05#ibcon#read 4, iclass 23, count 2 2006.229.17:58:02.05#ibcon#about to read 5, iclass 23, count 2 2006.229.17:58:02.05#ibcon#read 5, iclass 23, count 2 2006.229.17:58:02.05#ibcon#about to read 6, iclass 23, count 2 2006.229.17:58:02.05#ibcon#read 6, iclass 23, count 2 2006.229.17:58:02.05#ibcon#end of sib2, iclass 23, count 2 2006.229.17:58:02.05#ibcon#*mode == 0, iclass 23, count 2 2006.229.17:58:02.05#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.17:58:02.05#ibcon#[27=AT07-04\r\n] 2006.229.17:58:02.05#ibcon#*before write, iclass 23, count 2 2006.229.17:58:02.05#ibcon#enter sib2, iclass 23, count 2 2006.229.17:58:02.05#ibcon#flushed, iclass 23, count 2 2006.229.17:58:02.05#ibcon#about to write, iclass 23, count 2 2006.229.17:58:02.05#ibcon#wrote, iclass 23, count 2 2006.229.17:58:02.05#ibcon#about to read 3, iclass 23, count 2 2006.229.17:58:02.08#ibcon#read 3, iclass 23, count 2 2006.229.17:58:02.08#ibcon#about to read 4, iclass 23, count 2 2006.229.17:58:02.08#ibcon#read 4, iclass 23, count 2 2006.229.17:58:02.08#ibcon#about to read 5, iclass 23, count 2 2006.229.17:58:02.08#ibcon#read 5, iclass 23, count 2 2006.229.17:58:02.08#ibcon#about to read 6, iclass 23, count 2 2006.229.17:58:02.08#ibcon#read 6, iclass 23, count 2 2006.229.17:58:02.08#ibcon#end of sib2, iclass 23, count 2 2006.229.17:58:02.08#ibcon#*after write, iclass 23, count 2 2006.229.17:58:02.08#ibcon#*before return 0, iclass 23, count 2 2006.229.17:58:02.08#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:58:02.08#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.17:58:02.08#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.17:58:02.08#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:02.08#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:58:02.20#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:58:02.20#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:58:02.20#ibcon#enter wrdev, iclass 23, count 0 2006.229.17:58:02.20#ibcon#first serial, iclass 23, count 0 2006.229.17:58:02.20#ibcon#enter sib2, iclass 23, count 0 2006.229.17:58:02.20#ibcon#flushed, iclass 23, count 0 2006.229.17:58:02.20#ibcon#about to write, iclass 23, count 0 2006.229.17:58:02.20#ibcon#wrote, iclass 23, count 0 2006.229.17:58:02.20#ibcon#about to read 3, iclass 23, count 0 2006.229.17:58:02.22#ibcon#read 3, iclass 23, count 0 2006.229.17:58:02.22#ibcon#about to read 4, iclass 23, count 0 2006.229.17:58:02.22#ibcon#read 4, iclass 23, count 0 2006.229.17:58:02.22#ibcon#about to read 5, iclass 23, count 0 2006.229.17:58:02.22#ibcon#read 5, iclass 23, count 0 2006.229.17:58:02.22#ibcon#about to read 6, iclass 23, count 0 2006.229.17:58:02.22#ibcon#read 6, iclass 23, count 0 2006.229.17:58:02.22#ibcon#end of sib2, iclass 23, count 0 2006.229.17:58:02.22#ibcon#*mode == 0, iclass 23, count 0 2006.229.17:58:02.22#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.17:58:02.22#ibcon#[27=USB\r\n] 2006.229.17:58:02.22#ibcon#*before write, iclass 23, count 0 2006.229.17:58:02.22#ibcon#enter sib2, iclass 23, count 0 2006.229.17:58:02.22#ibcon#flushed, iclass 23, count 0 2006.229.17:58:02.22#ibcon#about to write, iclass 23, count 0 2006.229.17:58:02.22#ibcon#wrote, iclass 23, count 0 2006.229.17:58:02.22#ibcon#about to read 3, iclass 23, count 0 2006.229.17:58:02.25#ibcon#read 3, iclass 23, count 0 2006.229.17:58:02.25#ibcon#about to read 4, iclass 23, count 0 2006.229.17:58:02.25#ibcon#read 4, iclass 23, count 0 2006.229.17:58:02.25#ibcon#about to read 5, iclass 23, count 0 2006.229.17:58:02.25#ibcon#read 5, iclass 23, count 0 2006.229.17:58:02.25#ibcon#about to read 6, iclass 23, count 0 2006.229.17:58:02.25#ibcon#read 6, iclass 23, count 0 2006.229.17:58:02.25#ibcon#end of sib2, iclass 23, count 0 2006.229.17:58:02.25#ibcon#*after write, iclass 23, count 0 2006.229.17:58:02.25#ibcon#*before return 0, iclass 23, count 0 2006.229.17:58:02.25#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:58:02.25#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.17:58:02.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.17:58:02.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.17:58:02.25$vck44/vblo=8,744.99 2006.229.17:58:02.25#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.17:58:02.25#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.17:58:02.25#ibcon#ireg 17 cls_cnt 0 2006.229.17:58:02.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:58:02.25#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:58:02.25#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:58:02.25#ibcon#enter wrdev, iclass 25, count 0 2006.229.17:58:02.25#ibcon#first serial, iclass 25, count 0 2006.229.17:58:02.25#ibcon#enter sib2, iclass 25, count 0 2006.229.17:58:02.25#ibcon#flushed, iclass 25, count 0 2006.229.17:58:02.25#ibcon#about to write, iclass 25, count 0 2006.229.17:58:02.25#ibcon#wrote, iclass 25, count 0 2006.229.17:58:02.25#ibcon#about to read 3, iclass 25, count 0 2006.229.17:58:02.27#ibcon#read 3, iclass 25, count 0 2006.229.17:58:02.27#ibcon#about to read 4, iclass 25, count 0 2006.229.17:58:02.27#ibcon#read 4, iclass 25, count 0 2006.229.17:58:02.27#ibcon#about to read 5, iclass 25, count 0 2006.229.17:58:02.27#ibcon#read 5, iclass 25, count 0 2006.229.17:58:02.27#ibcon#about to read 6, iclass 25, count 0 2006.229.17:58:02.27#ibcon#read 6, iclass 25, count 0 2006.229.17:58:02.27#ibcon#end of sib2, iclass 25, count 0 2006.229.17:58:02.27#ibcon#*mode == 0, iclass 25, count 0 2006.229.17:58:02.27#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.17:58:02.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.17:58:02.27#ibcon#*before write, iclass 25, count 0 2006.229.17:58:02.27#ibcon#enter sib2, iclass 25, count 0 2006.229.17:58:02.27#ibcon#flushed, iclass 25, count 0 2006.229.17:58:02.27#ibcon#about to write, iclass 25, count 0 2006.229.17:58:02.27#ibcon#wrote, iclass 25, count 0 2006.229.17:58:02.27#ibcon#about to read 3, iclass 25, count 0 2006.229.17:58:02.31#ibcon#read 3, iclass 25, count 0 2006.229.17:58:02.31#ibcon#about to read 4, iclass 25, count 0 2006.229.17:58:02.31#ibcon#read 4, iclass 25, count 0 2006.229.17:58:02.31#ibcon#about to read 5, iclass 25, count 0 2006.229.17:58:02.31#ibcon#read 5, iclass 25, count 0 2006.229.17:58:02.31#ibcon#about to read 6, iclass 25, count 0 2006.229.17:58:02.31#ibcon#read 6, iclass 25, count 0 2006.229.17:58:02.31#ibcon#end of sib2, iclass 25, count 0 2006.229.17:58:02.31#ibcon#*after write, iclass 25, count 0 2006.229.17:58:02.31#ibcon#*before return 0, iclass 25, count 0 2006.229.17:58:02.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:58:02.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.17:58:02.31#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.17:58:02.31#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.17:58:02.31$vck44/vb=8,4 2006.229.17:58:02.31#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.17:58:02.31#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.17:58:02.31#ibcon#ireg 11 cls_cnt 2 2006.229.17:58:02.31#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:58:02.37#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:58:02.37#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:58:02.37#ibcon#enter wrdev, iclass 27, count 2 2006.229.17:58:02.37#ibcon#first serial, iclass 27, count 2 2006.229.17:58:02.37#ibcon#enter sib2, iclass 27, count 2 2006.229.17:58:02.37#ibcon#flushed, iclass 27, count 2 2006.229.17:58:02.37#ibcon#about to write, iclass 27, count 2 2006.229.17:58:02.37#ibcon#wrote, iclass 27, count 2 2006.229.17:58:02.37#ibcon#about to read 3, iclass 27, count 2 2006.229.17:58:02.39#ibcon#read 3, iclass 27, count 2 2006.229.17:58:02.39#ibcon#about to read 4, iclass 27, count 2 2006.229.17:58:02.39#ibcon#read 4, iclass 27, count 2 2006.229.17:58:02.39#ibcon#about to read 5, iclass 27, count 2 2006.229.17:58:02.39#ibcon#read 5, iclass 27, count 2 2006.229.17:58:02.39#ibcon#about to read 6, iclass 27, count 2 2006.229.17:58:02.39#ibcon#read 6, iclass 27, count 2 2006.229.17:58:02.39#ibcon#end of sib2, iclass 27, count 2 2006.229.17:58:02.39#ibcon#*mode == 0, iclass 27, count 2 2006.229.17:58:02.39#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.17:58:02.39#ibcon#[27=AT08-04\r\n] 2006.229.17:58:02.39#ibcon#*before write, iclass 27, count 2 2006.229.17:58:02.39#ibcon#enter sib2, iclass 27, count 2 2006.229.17:58:02.39#ibcon#flushed, iclass 27, count 2 2006.229.17:58:02.39#ibcon#about to write, iclass 27, count 2 2006.229.17:58:02.39#ibcon#wrote, iclass 27, count 2 2006.229.17:58:02.39#ibcon#about to read 3, iclass 27, count 2 2006.229.17:58:02.42#ibcon#read 3, iclass 27, count 2 2006.229.17:58:02.42#ibcon#about to read 4, iclass 27, count 2 2006.229.17:58:02.42#ibcon#read 4, iclass 27, count 2 2006.229.17:58:02.42#ibcon#about to read 5, iclass 27, count 2 2006.229.17:58:02.42#ibcon#read 5, iclass 27, count 2 2006.229.17:58:02.42#ibcon#about to read 6, iclass 27, count 2 2006.229.17:58:02.42#ibcon#read 6, iclass 27, count 2 2006.229.17:58:02.42#ibcon#end of sib2, iclass 27, count 2 2006.229.17:58:02.42#ibcon#*after write, iclass 27, count 2 2006.229.17:58:02.42#ibcon#*before return 0, iclass 27, count 2 2006.229.17:58:02.42#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:58:02.42#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.17:58:02.42#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.17:58:02.42#ibcon#ireg 7 cls_cnt 0 2006.229.17:58:02.42#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:58:02.54#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:58:02.54#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:58:02.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.17:58:02.54#ibcon#first serial, iclass 27, count 0 2006.229.17:58:02.54#ibcon#enter sib2, iclass 27, count 0 2006.229.17:58:02.54#ibcon#flushed, iclass 27, count 0 2006.229.17:58:02.54#ibcon#about to write, iclass 27, count 0 2006.229.17:58:02.54#ibcon#wrote, iclass 27, count 0 2006.229.17:58:02.54#ibcon#about to read 3, iclass 27, count 0 2006.229.17:58:02.56#ibcon#read 3, iclass 27, count 0 2006.229.17:58:02.56#ibcon#about to read 4, iclass 27, count 0 2006.229.17:58:02.56#ibcon#read 4, iclass 27, count 0 2006.229.17:58:02.56#ibcon#about to read 5, iclass 27, count 0 2006.229.17:58:02.56#ibcon#read 5, iclass 27, count 0 2006.229.17:58:02.56#ibcon#about to read 6, iclass 27, count 0 2006.229.17:58:02.56#ibcon#read 6, iclass 27, count 0 2006.229.17:58:02.56#ibcon#end of sib2, iclass 27, count 0 2006.229.17:58:02.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.17:58:02.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.17:58:02.56#ibcon#[27=USB\r\n] 2006.229.17:58:02.56#ibcon#*before write, iclass 27, count 0 2006.229.17:58:02.56#ibcon#enter sib2, iclass 27, count 0 2006.229.17:58:02.56#ibcon#flushed, iclass 27, count 0 2006.229.17:58:02.56#ibcon#about to write, iclass 27, count 0 2006.229.17:58:02.56#ibcon#wrote, iclass 27, count 0 2006.229.17:58:02.56#ibcon#about to read 3, iclass 27, count 0 2006.229.17:58:02.59#ibcon#read 3, iclass 27, count 0 2006.229.17:58:02.59#ibcon#about to read 4, iclass 27, count 0 2006.229.17:58:02.59#ibcon#read 4, iclass 27, count 0 2006.229.17:58:02.59#ibcon#about to read 5, iclass 27, count 0 2006.229.17:58:02.59#ibcon#read 5, iclass 27, count 0 2006.229.17:58:02.59#ibcon#about to read 6, iclass 27, count 0 2006.229.17:58:02.59#ibcon#read 6, iclass 27, count 0 2006.229.17:58:02.59#ibcon#end of sib2, iclass 27, count 0 2006.229.17:58:02.59#ibcon#*after write, iclass 27, count 0 2006.229.17:58:02.59#ibcon#*before return 0, iclass 27, count 0 2006.229.17:58:02.59#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:58:02.59#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.17:58:02.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.17:58:02.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.17:58:02.59$vck44/vabw=wide 2006.229.17:58:02.59#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.17:58:02.59#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.17:58:02.59#ibcon#ireg 8 cls_cnt 0 2006.229.17:58:02.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:58:02.59#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:58:02.59#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:58:02.59#ibcon#enter wrdev, iclass 29, count 0 2006.229.17:58:02.59#ibcon#first serial, iclass 29, count 0 2006.229.17:58:02.59#ibcon#enter sib2, iclass 29, count 0 2006.229.17:58:02.59#ibcon#flushed, iclass 29, count 0 2006.229.17:58:02.59#ibcon#about to write, iclass 29, count 0 2006.229.17:58:02.59#ibcon#wrote, iclass 29, count 0 2006.229.17:58:02.59#ibcon#about to read 3, iclass 29, count 0 2006.229.17:58:02.61#ibcon#read 3, iclass 29, count 0 2006.229.17:58:02.61#ibcon#about to read 4, iclass 29, count 0 2006.229.17:58:02.61#ibcon#read 4, iclass 29, count 0 2006.229.17:58:02.61#ibcon#about to read 5, iclass 29, count 0 2006.229.17:58:02.61#ibcon#read 5, iclass 29, count 0 2006.229.17:58:02.61#ibcon#about to read 6, iclass 29, count 0 2006.229.17:58:02.61#ibcon#read 6, iclass 29, count 0 2006.229.17:58:02.61#ibcon#end of sib2, iclass 29, count 0 2006.229.17:58:02.61#ibcon#*mode == 0, iclass 29, count 0 2006.229.17:58:02.61#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.17:58:02.61#ibcon#[25=BW32\r\n] 2006.229.17:58:02.61#ibcon#*before write, iclass 29, count 0 2006.229.17:58:02.61#ibcon#enter sib2, iclass 29, count 0 2006.229.17:58:02.61#ibcon#flushed, iclass 29, count 0 2006.229.17:58:02.61#ibcon#about to write, iclass 29, count 0 2006.229.17:58:02.61#ibcon#wrote, iclass 29, count 0 2006.229.17:58:02.61#ibcon#about to read 3, iclass 29, count 0 2006.229.17:58:02.64#ibcon#read 3, iclass 29, count 0 2006.229.17:58:02.64#ibcon#about to read 4, iclass 29, count 0 2006.229.17:58:02.64#ibcon#read 4, iclass 29, count 0 2006.229.17:58:02.64#ibcon#about to read 5, iclass 29, count 0 2006.229.17:58:02.64#ibcon#read 5, iclass 29, count 0 2006.229.17:58:02.64#ibcon#about to read 6, iclass 29, count 0 2006.229.17:58:02.64#ibcon#read 6, iclass 29, count 0 2006.229.17:58:02.64#ibcon#end of sib2, iclass 29, count 0 2006.229.17:58:02.64#ibcon#*after write, iclass 29, count 0 2006.229.17:58:02.64#ibcon#*before return 0, iclass 29, count 0 2006.229.17:58:02.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:58:02.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.17:58:02.64#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.17:58:02.64#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.17:58:02.64$vck44/vbbw=wide 2006.229.17:58:02.64#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.17:58:02.64#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.17:58:02.64#ibcon#ireg 8 cls_cnt 0 2006.229.17:58:02.64#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:58:02.71#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:58:02.71#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:58:02.71#ibcon#enter wrdev, iclass 31, count 0 2006.229.17:58:02.71#ibcon#first serial, iclass 31, count 0 2006.229.17:58:02.71#ibcon#enter sib2, iclass 31, count 0 2006.229.17:58:02.71#ibcon#flushed, iclass 31, count 0 2006.229.17:58:02.71#ibcon#about to write, iclass 31, count 0 2006.229.17:58:02.71#ibcon#wrote, iclass 31, count 0 2006.229.17:58:02.71#ibcon#about to read 3, iclass 31, count 0 2006.229.17:58:02.73#ibcon#read 3, iclass 31, count 0 2006.229.17:58:02.73#ibcon#about to read 4, iclass 31, count 0 2006.229.17:58:02.73#ibcon#read 4, iclass 31, count 0 2006.229.17:58:02.73#ibcon#about to read 5, iclass 31, count 0 2006.229.17:58:02.73#ibcon#read 5, iclass 31, count 0 2006.229.17:58:02.73#ibcon#about to read 6, iclass 31, count 0 2006.229.17:58:02.73#ibcon#read 6, iclass 31, count 0 2006.229.17:58:02.73#ibcon#end of sib2, iclass 31, count 0 2006.229.17:58:02.73#ibcon#*mode == 0, iclass 31, count 0 2006.229.17:58:02.73#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.17:58:02.73#ibcon#[27=BW32\r\n] 2006.229.17:58:02.73#ibcon#*before write, iclass 31, count 0 2006.229.17:58:02.73#ibcon#enter sib2, iclass 31, count 0 2006.229.17:58:02.73#ibcon#flushed, iclass 31, count 0 2006.229.17:58:02.73#ibcon#about to write, iclass 31, count 0 2006.229.17:58:02.73#ibcon#wrote, iclass 31, count 0 2006.229.17:58:02.73#ibcon#about to read 3, iclass 31, count 0 2006.229.17:58:02.76#ibcon#read 3, iclass 31, count 0 2006.229.17:58:02.76#ibcon#about to read 4, iclass 31, count 0 2006.229.17:58:02.76#ibcon#read 4, iclass 31, count 0 2006.229.17:58:02.76#ibcon#about to read 5, iclass 31, count 0 2006.229.17:58:02.76#ibcon#read 5, iclass 31, count 0 2006.229.17:58:02.76#ibcon#about to read 6, iclass 31, count 0 2006.229.17:58:02.76#ibcon#read 6, iclass 31, count 0 2006.229.17:58:02.76#ibcon#end of sib2, iclass 31, count 0 2006.229.17:58:02.76#ibcon#*after write, iclass 31, count 0 2006.229.17:58:02.76#ibcon#*before return 0, iclass 31, count 0 2006.229.17:58:02.76#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:58:02.76#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.17:58:02.76#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.17:58:02.76#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.17:58:02.76$setupk4/ifdk4 2006.229.17:58:02.76$ifdk4/lo= 2006.229.17:58:02.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.17:58:02.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.17:58:02.76$ifdk4/patch= 2006.229.17:58:02.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.17:58:02.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.17:58:02.76$setupk4/!*+20s 2006.229.17:58:06.67#abcon#<5=/08 0.6 2.3 26.731001001.4\r\n> 2006.229.17:58:06.69#abcon#{5=INTERFACE CLEAR} 2006.229.17:58:06.75#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:58:16.84#abcon#<5=/08 0.7 2.3 26.731001001.4\r\n> 2006.229.17:58:16.86#abcon#{5=INTERFACE CLEAR} 2006.229.17:58:16.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.17:58:17.27$setupk4/"tpicd 2006.229.17:58:17.27$setupk4/echo=off 2006.229.17:58:17.27$setupk4/xlog=off 2006.229.17:58:17.27:!2006.229.18:00:32 2006.229.17:58:32.13#trakl#Source acquired 2006.229.17:58:34.13#flagr#flagr/antenna,acquired 2006.229.18:00:32.00:preob 2006.229.18:00:32.14/onsource/TRACKING 2006.229.18:00:32.14:!2006.229.18:00:42 2006.229.18:00:42.00:"tape 2006.229.18:00:42.00:"st=record 2006.229.18:00:42.00:data_valid=on 2006.229.18:00:42.00:midob 2006.229.18:00:43.14/onsource/TRACKING 2006.229.18:00:43.14/wx/26.68,1001.4,100 2006.229.18:00:43.22/cable/+6.4166E-03 2006.229.18:00:44.31/va/01,08,usb,yes,36,38 2006.229.18:00:44.31/va/02,07,usb,yes,39,39 2006.229.18:00:44.31/va/03,06,usb,yes,48,51 2006.229.18:00:44.31/va/04,07,usb,yes,40,42 2006.229.18:00:44.31/va/05,04,usb,yes,36,36 2006.229.18:00:44.31/va/06,04,usb,yes,40,40 2006.229.18:00:44.31/va/07,05,usb,yes,36,36 2006.229.18:00:44.31/va/08,06,usb,yes,26,32 2006.229.18:00:44.54/valo/01,524.99,yes,locked 2006.229.18:00:44.54/valo/02,534.99,yes,locked 2006.229.18:00:44.54/valo/03,564.99,yes,locked 2006.229.18:00:44.54/valo/04,624.99,yes,locked 2006.229.18:00:44.54/valo/05,734.99,yes,locked 2006.229.18:00:44.54/valo/06,814.99,yes,locked 2006.229.18:00:44.54/valo/07,864.99,yes,locked 2006.229.18:00:44.54/valo/08,884.99,yes,locked 2006.229.18:00:45.63/vb/01,04,usb,yes,31,29 2006.229.18:00:45.63/vb/02,04,usb,yes,34,33 2006.229.18:00:45.63/vb/03,04,usb,yes,31,34 2006.229.18:00:45.63/vb/04,04,usb,yes,35,34 2006.229.18:00:45.63/vb/05,04,usb,yes,27,30 2006.229.18:00:45.63/vb/06,04,usb,yes,32,28 2006.229.18:00:45.63/vb/07,04,usb,yes,32,32 2006.229.18:00:45.63/vb/08,04,usb,yes,29,33 2006.229.18:00:45.86/vblo/01,629.99,yes,locked 2006.229.18:00:45.86/vblo/02,634.99,yes,locked 2006.229.18:00:45.86/vblo/03,649.99,yes,locked 2006.229.18:00:45.86/vblo/04,679.99,yes,locked 2006.229.18:00:45.86/vblo/05,709.99,yes,locked 2006.229.18:00:45.86/vblo/06,719.99,yes,locked 2006.229.18:00:45.86/vblo/07,734.99,yes,locked 2006.229.18:00:45.86/vblo/08,744.99,yes,locked 2006.229.18:00:46.01/vabw/8 2006.229.18:00:46.16/vbbw/8 2006.229.18:00:46.36/xfe/off,on,12.0 2006.229.18:00:46.74/ifatt/23,28,28,28 2006.229.18:00:47.07/fmout-gps/S +4.56E-07 2006.229.18:00:47.11:!2006.229.18:02:02 2006.229.18:02:02.00:data_valid=off 2006.229.18:02:02.00:"et 2006.229.18:02:02.00:!+3s 2006.229.18:02:05.01:"tape 2006.229.18:02:05.01:postob 2006.229.18:02:05.09/cable/+6.4182E-03 2006.229.18:02:05.09/wx/26.65,1001.4,100 2006.229.18:02:06.08/fmout-gps/S +4.57E-07 2006.229.18:02:06.08:scan_name=229-1806,jd0608,180 2006.229.18:02:06.08:source=3c446,222547.26,-045701.4,2000.0,ccw 2006.229.18:02:07.14#flagr#flagr/antenna,new-source 2006.229.18:02:07.14:checkk5 2006.229.18:02:07.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:02:07.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:02:08.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:02:08.69/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:02:09.07/chk_obsdata//k5ts1/T2291800??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.18:02:09.49/chk_obsdata//k5ts2/T2291800??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.18:02:09.89/chk_obsdata//k5ts3/T2291800??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.18:02:10.30/chk_obsdata//k5ts4/T2291800??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.18:02:11.02/k5log//k5ts1_log_newline 2006.229.18:02:11.73/k5log//k5ts2_log_newline 2006.229.18:02:12.43/k5log//k5ts3_log_newline 2006.229.18:02:13.13/k5log//k5ts4_log_newline 2006.229.18:02:13.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:02:13.16:setupk4=1 2006.229.18:02:13.16$setupk4/echo=on 2006.229.18:02:13.16$setupk4/pcalon 2006.229.18:02:13.16$pcalon/"no phase cal control is implemented here 2006.229.18:02:13.16$setupk4/"tpicd=stop 2006.229.18:02:13.16$setupk4/"rec=synch_on 2006.229.18:02:13.16$setupk4/"rec_mode=128 2006.229.18:02:13.16$setupk4/!* 2006.229.18:02:13.16$setupk4/recpk4 2006.229.18:02:13.16$recpk4/recpatch= 2006.229.18:02:13.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:02:13.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:02:13.17$setupk4/vck44 2006.229.18:02:13.17$vck44/valo=1,524.99 2006.229.18:02:13.17#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.18:02:13.17#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.18:02:13.17#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:13.17#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:13.17#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:13.17#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:13.17#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:02:13.17#ibcon#first serial, iclass 28, count 0 2006.229.18:02:13.17#ibcon#enter sib2, iclass 28, count 0 2006.229.18:02:13.17#ibcon#flushed, iclass 28, count 0 2006.229.18:02:13.17#ibcon#about to write, iclass 28, count 0 2006.229.18:02:13.17#ibcon#wrote, iclass 28, count 0 2006.229.18:02:13.17#ibcon#about to read 3, iclass 28, count 0 2006.229.18:02:13.18#ibcon#read 3, iclass 28, count 0 2006.229.18:02:13.18#ibcon#about to read 4, iclass 28, count 0 2006.229.18:02:13.18#ibcon#read 4, iclass 28, count 0 2006.229.18:02:13.18#ibcon#about to read 5, iclass 28, count 0 2006.229.18:02:13.18#ibcon#read 5, iclass 28, count 0 2006.229.18:02:13.18#ibcon#about to read 6, iclass 28, count 0 2006.229.18:02:13.18#ibcon#read 6, iclass 28, count 0 2006.229.18:02:13.18#ibcon#end of sib2, iclass 28, count 0 2006.229.18:02:13.18#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:02:13.18#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:02:13.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:02:13.18#ibcon#*before write, iclass 28, count 0 2006.229.18:02:13.18#ibcon#enter sib2, iclass 28, count 0 2006.229.18:02:13.18#ibcon#flushed, iclass 28, count 0 2006.229.18:02:13.18#ibcon#about to write, iclass 28, count 0 2006.229.18:02:13.18#ibcon#wrote, iclass 28, count 0 2006.229.18:02:13.18#ibcon#about to read 3, iclass 28, count 0 2006.229.18:02:13.23#ibcon#read 3, iclass 28, count 0 2006.229.18:02:13.23#ibcon#about to read 4, iclass 28, count 0 2006.229.18:02:13.23#ibcon#read 4, iclass 28, count 0 2006.229.18:02:13.23#ibcon#about to read 5, iclass 28, count 0 2006.229.18:02:13.23#ibcon#read 5, iclass 28, count 0 2006.229.18:02:13.23#ibcon#about to read 6, iclass 28, count 0 2006.229.18:02:13.23#ibcon#read 6, iclass 28, count 0 2006.229.18:02:13.23#ibcon#end of sib2, iclass 28, count 0 2006.229.18:02:13.23#ibcon#*after write, iclass 28, count 0 2006.229.18:02:13.23#ibcon#*before return 0, iclass 28, count 0 2006.229.18:02:13.23#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:13.23#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:13.23#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:02:13.23#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:02:13.23$vck44/va=1,8 2006.229.18:02:13.23#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.18:02:13.23#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.18:02:13.23#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:13.23#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:13.23#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:13.23#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:13.23#ibcon#enter wrdev, iclass 30, count 2 2006.229.18:02:13.23#ibcon#first serial, iclass 30, count 2 2006.229.18:02:13.23#ibcon#enter sib2, iclass 30, count 2 2006.229.18:02:13.23#ibcon#flushed, iclass 30, count 2 2006.229.18:02:13.23#ibcon#about to write, iclass 30, count 2 2006.229.18:02:13.23#ibcon#wrote, iclass 30, count 2 2006.229.18:02:13.23#ibcon#about to read 3, iclass 30, count 2 2006.229.18:02:13.25#ibcon#read 3, iclass 30, count 2 2006.229.18:02:13.25#ibcon#about to read 4, iclass 30, count 2 2006.229.18:02:13.25#ibcon#read 4, iclass 30, count 2 2006.229.18:02:13.25#ibcon#about to read 5, iclass 30, count 2 2006.229.18:02:13.25#ibcon#read 5, iclass 30, count 2 2006.229.18:02:13.25#ibcon#about to read 6, iclass 30, count 2 2006.229.18:02:13.25#ibcon#read 6, iclass 30, count 2 2006.229.18:02:13.25#ibcon#end of sib2, iclass 30, count 2 2006.229.18:02:13.25#ibcon#*mode == 0, iclass 30, count 2 2006.229.18:02:13.25#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.18:02:13.25#ibcon#[25=AT01-08\r\n] 2006.229.18:02:13.25#ibcon#*before write, iclass 30, count 2 2006.229.18:02:13.25#ibcon#enter sib2, iclass 30, count 2 2006.229.18:02:13.25#ibcon#flushed, iclass 30, count 2 2006.229.18:02:13.25#ibcon#about to write, iclass 30, count 2 2006.229.18:02:13.25#ibcon#wrote, iclass 30, count 2 2006.229.18:02:13.25#ibcon#about to read 3, iclass 30, count 2 2006.229.18:02:13.28#ibcon#read 3, iclass 30, count 2 2006.229.18:02:13.28#ibcon#about to read 4, iclass 30, count 2 2006.229.18:02:13.28#ibcon#read 4, iclass 30, count 2 2006.229.18:02:13.28#ibcon#about to read 5, iclass 30, count 2 2006.229.18:02:13.28#ibcon#read 5, iclass 30, count 2 2006.229.18:02:13.28#ibcon#about to read 6, iclass 30, count 2 2006.229.18:02:13.28#ibcon#read 6, iclass 30, count 2 2006.229.18:02:13.28#ibcon#end of sib2, iclass 30, count 2 2006.229.18:02:13.28#ibcon#*after write, iclass 30, count 2 2006.229.18:02:13.28#ibcon#*before return 0, iclass 30, count 2 2006.229.18:02:13.28#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:13.28#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:13.28#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.18:02:13.28#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:13.28#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:13.40#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:13.40#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:13.40#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:02:13.40#ibcon#first serial, iclass 30, count 0 2006.229.18:02:13.40#ibcon#enter sib2, iclass 30, count 0 2006.229.18:02:13.40#ibcon#flushed, iclass 30, count 0 2006.229.18:02:13.40#ibcon#about to write, iclass 30, count 0 2006.229.18:02:13.40#ibcon#wrote, iclass 30, count 0 2006.229.18:02:13.40#ibcon#about to read 3, iclass 30, count 0 2006.229.18:02:13.42#ibcon#read 3, iclass 30, count 0 2006.229.18:02:13.42#ibcon#about to read 4, iclass 30, count 0 2006.229.18:02:13.42#ibcon#read 4, iclass 30, count 0 2006.229.18:02:13.42#ibcon#about to read 5, iclass 30, count 0 2006.229.18:02:13.42#ibcon#read 5, iclass 30, count 0 2006.229.18:02:13.42#ibcon#about to read 6, iclass 30, count 0 2006.229.18:02:13.42#ibcon#read 6, iclass 30, count 0 2006.229.18:02:13.42#ibcon#end of sib2, iclass 30, count 0 2006.229.18:02:13.42#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:02:13.42#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:02:13.42#ibcon#[25=USB\r\n] 2006.229.18:02:13.42#ibcon#*before write, iclass 30, count 0 2006.229.18:02:13.42#ibcon#enter sib2, iclass 30, count 0 2006.229.18:02:13.42#ibcon#flushed, iclass 30, count 0 2006.229.18:02:13.42#ibcon#about to write, iclass 30, count 0 2006.229.18:02:13.42#ibcon#wrote, iclass 30, count 0 2006.229.18:02:13.42#ibcon#about to read 3, iclass 30, count 0 2006.229.18:02:13.45#ibcon#read 3, iclass 30, count 0 2006.229.18:02:13.45#ibcon#about to read 4, iclass 30, count 0 2006.229.18:02:13.45#ibcon#read 4, iclass 30, count 0 2006.229.18:02:13.45#ibcon#about to read 5, iclass 30, count 0 2006.229.18:02:13.45#ibcon#read 5, iclass 30, count 0 2006.229.18:02:13.45#ibcon#about to read 6, iclass 30, count 0 2006.229.18:02:13.45#ibcon#read 6, iclass 30, count 0 2006.229.18:02:13.45#ibcon#end of sib2, iclass 30, count 0 2006.229.18:02:13.45#ibcon#*after write, iclass 30, count 0 2006.229.18:02:13.45#ibcon#*before return 0, iclass 30, count 0 2006.229.18:02:13.45#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:13.45#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:13.45#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:02:13.45#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:02:13.45$vck44/valo=2,534.99 2006.229.18:02:13.45#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.18:02:13.45#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.18:02:13.45#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:13.45#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:13.45#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:13.45#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:13.45#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:02:13.45#ibcon#first serial, iclass 32, count 0 2006.229.18:02:13.45#ibcon#enter sib2, iclass 32, count 0 2006.229.18:02:13.45#ibcon#flushed, iclass 32, count 0 2006.229.18:02:13.45#ibcon#about to write, iclass 32, count 0 2006.229.18:02:13.45#ibcon#wrote, iclass 32, count 0 2006.229.18:02:13.45#ibcon#about to read 3, iclass 32, count 0 2006.229.18:02:13.47#ibcon#read 3, iclass 32, count 0 2006.229.18:02:13.47#ibcon#about to read 4, iclass 32, count 0 2006.229.18:02:13.47#ibcon#read 4, iclass 32, count 0 2006.229.18:02:13.47#ibcon#about to read 5, iclass 32, count 0 2006.229.18:02:13.47#ibcon#read 5, iclass 32, count 0 2006.229.18:02:13.47#ibcon#about to read 6, iclass 32, count 0 2006.229.18:02:13.47#ibcon#read 6, iclass 32, count 0 2006.229.18:02:13.47#ibcon#end of sib2, iclass 32, count 0 2006.229.18:02:13.47#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:02:13.47#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:02:13.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:02:13.47#ibcon#*before write, iclass 32, count 0 2006.229.18:02:13.47#ibcon#enter sib2, iclass 32, count 0 2006.229.18:02:13.47#ibcon#flushed, iclass 32, count 0 2006.229.18:02:13.47#ibcon#about to write, iclass 32, count 0 2006.229.18:02:13.47#ibcon#wrote, iclass 32, count 0 2006.229.18:02:13.47#ibcon#about to read 3, iclass 32, count 0 2006.229.18:02:13.51#ibcon#read 3, iclass 32, count 0 2006.229.18:02:13.51#ibcon#about to read 4, iclass 32, count 0 2006.229.18:02:13.51#ibcon#read 4, iclass 32, count 0 2006.229.18:02:13.51#ibcon#about to read 5, iclass 32, count 0 2006.229.18:02:13.51#ibcon#read 5, iclass 32, count 0 2006.229.18:02:13.51#ibcon#about to read 6, iclass 32, count 0 2006.229.18:02:13.51#ibcon#read 6, iclass 32, count 0 2006.229.18:02:13.51#ibcon#end of sib2, iclass 32, count 0 2006.229.18:02:13.51#ibcon#*after write, iclass 32, count 0 2006.229.18:02:13.51#ibcon#*before return 0, iclass 32, count 0 2006.229.18:02:13.51#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:13.51#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:13.51#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:02:13.51#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:02:13.51$vck44/va=2,7 2006.229.18:02:13.51#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.18:02:13.51#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.18:02:13.51#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:13.51#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:13.57#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:13.57#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:13.57#ibcon#enter wrdev, iclass 34, count 2 2006.229.18:02:13.57#ibcon#first serial, iclass 34, count 2 2006.229.18:02:13.57#ibcon#enter sib2, iclass 34, count 2 2006.229.18:02:13.57#ibcon#flushed, iclass 34, count 2 2006.229.18:02:13.57#ibcon#about to write, iclass 34, count 2 2006.229.18:02:13.57#ibcon#wrote, iclass 34, count 2 2006.229.18:02:13.57#ibcon#about to read 3, iclass 34, count 2 2006.229.18:02:13.59#ibcon#read 3, iclass 34, count 2 2006.229.18:02:13.59#ibcon#about to read 4, iclass 34, count 2 2006.229.18:02:13.59#ibcon#read 4, iclass 34, count 2 2006.229.18:02:13.59#ibcon#about to read 5, iclass 34, count 2 2006.229.18:02:13.59#ibcon#read 5, iclass 34, count 2 2006.229.18:02:13.59#ibcon#about to read 6, iclass 34, count 2 2006.229.18:02:13.59#ibcon#read 6, iclass 34, count 2 2006.229.18:02:13.59#ibcon#end of sib2, iclass 34, count 2 2006.229.18:02:13.59#ibcon#*mode == 0, iclass 34, count 2 2006.229.18:02:13.59#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.18:02:13.59#ibcon#[25=AT02-07\r\n] 2006.229.18:02:13.59#ibcon#*before write, iclass 34, count 2 2006.229.18:02:13.59#ibcon#enter sib2, iclass 34, count 2 2006.229.18:02:13.59#ibcon#flushed, iclass 34, count 2 2006.229.18:02:13.59#ibcon#about to write, iclass 34, count 2 2006.229.18:02:13.59#ibcon#wrote, iclass 34, count 2 2006.229.18:02:13.59#ibcon#about to read 3, iclass 34, count 2 2006.229.18:02:13.62#ibcon#read 3, iclass 34, count 2 2006.229.18:02:13.62#ibcon#about to read 4, iclass 34, count 2 2006.229.18:02:13.62#ibcon#read 4, iclass 34, count 2 2006.229.18:02:13.62#ibcon#about to read 5, iclass 34, count 2 2006.229.18:02:13.62#ibcon#read 5, iclass 34, count 2 2006.229.18:02:13.62#ibcon#about to read 6, iclass 34, count 2 2006.229.18:02:13.62#ibcon#read 6, iclass 34, count 2 2006.229.18:02:13.62#ibcon#end of sib2, iclass 34, count 2 2006.229.18:02:13.62#ibcon#*after write, iclass 34, count 2 2006.229.18:02:13.62#ibcon#*before return 0, iclass 34, count 2 2006.229.18:02:13.62#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:13.62#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:13.62#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.18:02:13.62#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:13.62#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:13.74#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:13.74#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:13.74#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:02:13.74#ibcon#first serial, iclass 34, count 0 2006.229.18:02:13.74#ibcon#enter sib2, iclass 34, count 0 2006.229.18:02:13.74#ibcon#flushed, iclass 34, count 0 2006.229.18:02:13.74#ibcon#about to write, iclass 34, count 0 2006.229.18:02:13.74#ibcon#wrote, iclass 34, count 0 2006.229.18:02:13.74#ibcon#about to read 3, iclass 34, count 0 2006.229.18:02:13.76#ibcon#read 3, iclass 34, count 0 2006.229.18:02:13.76#ibcon#about to read 4, iclass 34, count 0 2006.229.18:02:13.76#ibcon#read 4, iclass 34, count 0 2006.229.18:02:13.76#ibcon#about to read 5, iclass 34, count 0 2006.229.18:02:13.76#ibcon#read 5, iclass 34, count 0 2006.229.18:02:13.76#ibcon#about to read 6, iclass 34, count 0 2006.229.18:02:13.76#ibcon#read 6, iclass 34, count 0 2006.229.18:02:13.76#ibcon#end of sib2, iclass 34, count 0 2006.229.18:02:13.76#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:02:13.76#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:02:13.76#ibcon#[25=USB\r\n] 2006.229.18:02:13.76#ibcon#*before write, iclass 34, count 0 2006.229.18:02:13.76#ibcon#enter sib2, iclass 34, count 0 2006.229.18:02:13.76#ibcon#flushed, iclass 34, count 0 2006.229.18:02:13.76#ibcon#about to write, iclass 34, count 0 2006.229.18:02:13.76#ibcon#wrote, iclass 34, count 0 2006.229.18:02:13.76#ibcon#about to read 3, iclass 34, count 0 2006.229.18:02:13.79#ibcon#read 3, iclass 34, count 0 2006.229.18:02:13.79#ibcon#about to read 4, iclass 34, count 0 2006.229.18:02:13.79#ibcon#read 4, iclass 34, count 0 2006.229.18:02:13.79#ibcon#about to read 5, iclass 34, count 0 2006.229.18:02:13.79#ibcon#read 5, iclass 34, count 0 2006.229.18:02:13.79#ibcon#about to read 6, iclass 34, count 0 2006.229.18:02:13.79#ibcon#read 6, iclass 34, count 0 2006.229.18:02:13.79#ibcon#end of sib2, iclass 34, count 0 2006.229.18:02:13.79#ibcon#*after write, iclass 34, count 0 2006.229.18:02:13.79#ibcon#*before return 0, iclass 34, count 0 2006.229.18:02:13.79#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:13.79#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:13.79#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:02:13.79#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:02:13.79$vck44/valo=3,564.99 2006.229.18:02:13.79#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.18:02:13.79#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.18:02:13.79#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:13.79#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:13.79#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:13.79#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:13.79#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:02:13.79#ibcon#first serial, iclass 36, count 0 2006.229.18:02:13.79#ibcon#enter sib2, iclass 36, count 0 2006.229.18:02:13.79#ibcon#flushed, iclass 36, count 0 2006.229.18:02:13.79#ibcon#about to write, iclass 36, count 0 2006.229.18:02:13.79#ibcon#wrote, iclass 36, count 0 2006.229.18:02:13.79#ibcon#about to read 3, iclass 36, count 0 2006.229.18:02:13.81#ibcon#read 3, iclass 36, count 0 2006.229.18:02:13.81#ibcon#about to read 4, iclass 36, count 0 2006.229.18:02:13.81#ibcon#read 4, iclass 36, count 0 2006.229.18:02:13.81#ibcon#about to read 5, iclass 36, count 0 2006.229.18:02:13.81#ibcon#read 5, iclass 36, count 0 2006.229.18:02:13.81#ibcon#about to read 6, iclass 36, count 0 2006.229.18:02:13.81#ibcon#read 6, iclass 36, count 0 2006.229.18:02:13.81#ibcon#end of sib2, iclass 36, count 0 2006.229.18:02:13.81#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:02:13.81#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:02:13.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:02:13.81#ibcon#*before write, iclass 36, count 0 2006.229.18:02:13.81#ibcon#enter sib2, iclass 36, count 0 2006.229.18:02:13.81#ibcon#flushed, iclass 36, count 0 2006.229.18:02:13.81#ibcon#about to write, iclass 36, count 0 2006.229.18:02:13.81#ibcon#wrote, iclass 36, count 0 2006.229.18:02:13.81#ibcon#about to read 3, iclass 36, count 0 2006.229.18:02:13.85#ibcon#read 3, iclass 36, count 0 2006.229.18:02:13.85#ibcon#about to read 4, iclass 36, count 0 2006.229.18:02:13.85#ibcon#read 4, iclass 36, count 0 2006.229.18:02:13.85#ibcon#about to read 5, iclass 36, count 0 2006.229.18:02:13.85#ibcon#read 5, iclass 36, count 0 2006.229.18:02:13.85#ibcon#about to read 6, iclass 36, count 0 2006.229.18:02:13.85#ibcon#read 6, iclass 36, count 0 2006.229.18:02:13.85#ibcon#end of sib2, iclass 36, count 0 2006.229.18:02:13.85#ibcon#*after write, iclass 36, count 0 2006.229.18:02:13.85#ibcon#*before return 0, iclass 36, count 0 2006.229.18:02:13.85#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:13.85#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:13.85#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:02:13.85#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:02:13.85$vck44/va=3,6 2006.229.18:02:13.85#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.18:02:13.85#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.18:02:13.85#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:13.85#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:13.91#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:13.91#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:13.91#ibcon#enter wrdev, iclass 38, count 2 2006.229.18:02:13.91#ibcon#first serial, iclass 38, count 2 2006.229.18:02:13.91#ibcon#enter sib2, iclass 38, count 2 2006.229.18:02:13.91#ibcon#flushed, iclass 38, count 2 2006.229.18:02:13.91#ibcon#about to write, iclass 38, count 2 2006.229.18:02:13.91#ibcon#wrote, iclass 38, count 2 2006.229.18:02:13.91#ibcon#about to read 3, iclass 38, count 2 2006.229.18:02:13.93#ibcon#read 3, iclass 38, count 2 2006.229.18:02:13.93#ibcon#about to read 4, iclass 38, count 2 2006.229.18:02:13.93#ibcon#read 4, iclass 38, count 2 2006.229.18:02:13.93#ibcon#about to read 5, iclass 38, count 2 2006.229.18:02:13.93#ibcon#read 5, iclass 38, count 2 2006.229.18:02:13.93#ibcon#about to read 6, iclass 38, count 2 2006.229.18:02:13.93#ibcon#read 6, iclass 38, count 2 2006.229.18:02:13.93#ibcon#end of sib2, iclass 38, count 2 2006.229.18:02:13.93#ibcon#*mode == 0, iclass 38, count 2 2006.229.18:02:13.93#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.18:02:13.93#ibcon#[25=AT03-06\r\n] 2006.229.18:02:13.93#ibcon#*before write, iclass 38, count 2 2006.229.18:02:13.93#ibcon#enter sib2, iclass 38, count 2 2006.229.18:02:13.93#ibcon#flushed, iclass 38, count 2 2006.229.18:02:13.93#ibcon#about to write, iclass 38, count 2 2006.229.18:02:13.93#ibcon#wrote, iclass 38, count 2 2006.229.18:02:13.93#ibcon#about to read 3, iclass 38, count 2 2006.229.18:02:13.96#ibcon#read 3, iclass 38, count 2 2006.229.18:02:13.96#ibcon#about to read 4, iclass 38, count 2 2006.229.18:02:13.96#ibcon#read 4, iclass 38, count 2 2006.229.18:02:13.96#ibcon#about to read 5, iclass 38, count 2 2006.229.18:02:13.96#ibcon#read 5, iclass 38, count 2 2006.229.18:02:13.96#ibcon#about to read 6, iclass 38, count 2 2006.229.18:02:13.96#ibcon#read 6, iclass 38, count 2 2006.229.18:02:13.96#ibcon#end of sib2, iclass 38, count 2 2006.229.18:02:13.96#ibcon#*after write, iclass 38, count 2 2006.229.18:02:13.96#ibcon#*before return 0, iclass 38, count 2 2006.229.18:02:13.96#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:13.96#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:13.96#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.18:02:13.96#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:13.96#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:14.08#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:14.08#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:14.08#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:02:14.08#ibcon#first serial, iclass 38, count 0 2006.229.18:02:14.08#ibcon#enter sib2, iclass 38, count 0 2006.229.18:02:14.08#ibcon#flushed, iclass 38, count 0 2006.229.18:02:14.08#ibcon#about to write, iclass 38, count 0 2006.229.18:02:14.08#ibcon#wrote, iclass 38, count 0 2006.229.18:02:14.08#ibcon#about to read 3, iclass 38, count 0 2006.229.18:02:14.10#ibcon#read 3, iclass 38, count 0 2006.229.18:02:14.10#ibcon#about to read 4, iclass 38, count 0 2006.229.18:02:14.10#ibcon#read 4, iclass 38, count 0 2006.229.18:02:14.10#ibcon#about to read 5, iclass 38, count 0 2006.229.18:02:14.10#ibcon#read 5, iclass 38, count 0 2006.229.18:02:14.10#ibcon#about to read 6, iclass 38, count 0 2006.229.18:02:14.10#ibcon#read 6, iclass 38, count 0 2006.229.18:02:14.10#ibcon#end of sib2, iclass 38, count 0 2006.229.18:02:14.10#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:02:14.10#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:02:14.10#ibcon#[25=USB\r\n] 2006.229.18:02:14.10#ibcon#*before write, iclass 38, count 0 2006.229.18:02:14.10#ibcon#enter sib2, iclass 38, count 0 2006.229.18:02:14.10#ibcon#flushed, iclass 38, count 0 2006.229.18:02:14.10#ibcon#about to write, iclass 38, count 0 2006.229.18:02:14.10#ibcon#wrote, iclass 38, count 0 2006.229.18:02:14.10#ibcon#about to read 3, iclass 38, count 0 2006.229.18:02:14.13#ibcon#read 3, iclass 38, count 0 2006.229.18:02:14.13#ibcon#about to read 4, iclass 38, count 0 2006.229.18:02:14.13#ibcon#read 4, iclass 38, count 0 2006.229.18:02:14.13#ibcon#about to read 5, iclass 38, count 0 2006.229.18:02:14.13#ibcon#read 5, iclass 38, count 0 2006.229.18:02:14.13#ibcon#about to read 6, iclass 38, count 0 2006.229.18:02:14.13#ibcon#read 6, iclass 38, count 0 2006.229.18:02:14.13#ibcon#end of sib2, iclass 38, count 0 2006.229.18:02:14.13#ibcon#*after write, iclass 38, count 0 2006.229.18:02:14.13#ibcon#*before return 0, iclass 38, count 0 2006.229.18:02:14.13#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:14.13#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:14.13#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:02:14.13#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:02:14.13$vck44/valo=4,624.99 2006.229.18:02:14.13#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.18:02:14.13#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.18:02:14.13#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:14.13#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:14.13#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:14.13#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:14.13#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:02:14.13#ibcon#first serial, iclass 40, count 0 2006.229.18:02:14.13#ibcon#enter sib2, iclass 40, count 0 2006.229.18:02:14.13#ibcon#flushed, iclass 40, count 0 2006.229.18:02:14.13#ibcon#about to write, iclass 40, count 0 2006.229.18:02:14.13#ibcon#wrote, iclass 40, count 0 2006.229.18:02:14.13#ibcon#about to read 3, iclass 40, count 0 2006.229.18:02:14.15#ibcon#read 3, iclass 40, count 0 2006.229.18:02:14.15#ibcon#about to read 4, iclass 40, count 0 2006.229.18:02:14.15#ibcon#read 4, iclass 40, count 0 2006.229.18:02:14.15#ibcon#about to read 5, iclass 40, count 0 2006.229.18:02:14.15#ibcon#read 5, iclass 40, count 0 2006.229.18:02:14.15#ibcon#about to read 6, iclass 40, count 0 2006.229.18:02:14.15#ibcon#read 6, iclass 40, count 0 2006.229.18:02:14.15#ibcon#end of sib2, iclass 40, count 0 2006.229.18:02:14.15#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:02:14.15#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:02:14.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:02:14.15#ibcon#*before write, iclass 40, count 0 2006.229.18:02:14.15#ibcon#enter sib2, iclass 40, count 0 2006.229.18:02:14.15#ibcon#flushed, iclass 40, count 0 2006.229.18:02:14.15#ibcon#about to write, iclass 40, count 0 2006.229.18:02:14.15#ibcon#wrote, iclass 40, count 0 2006.229.18:02:14.15#ibcon#about to read 3, iclass 40, count 0 2006.229.18:02:14.19#ibcon#read 3, iclass 40, count 0 2006.229.18:02:14.19#ibcon#about to read 4, iclass 40, count 0 2006.229.18:02:14.19#ibcon#read 4, iclass 40, count 0 2006.229.18:02:14.19#ibcon#about to read 5, iclass 40, count 0 2006.229.18:02:14.19#ibcon#read 5, iclass 40, count 0 2006.229.18:02:14.19#ibcon#about to read 6, iclass 40, count 0 2006.229.18:02:14.19#ibcon#read 6, iclass 40, count 0 2006.229.18:02:14.19#ibcon#end of sib2, iclass 40, count 0 2006.229.18:02:14.19#ibcon#*after write, iclass 40, count 0 2006.229.18:02:14.19#ibcon#*before return 0, iclass 40, count 0 2006.229.18:02:14.19#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:14.19#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:14.19#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:02:14.19#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:02:14.19$vck44/va=4,7 2006.229.18:02:14.19#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.18:02:14.19#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.18:02:14.19#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:14.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:14.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:14.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:14.25#ibcon#enter wrdev, iclass 4, count 2 2006.229.18:02:14.25#ibcon#first serial, iclass 4, count 2 2006.229.18:02:14.25#ibcon#enter sib2, iclass 4, count 2 2006.229.18:02:14.25#ibcon#flushed, iclass 4, count 2 2006.229.18:02:14.25#ibcon#about to write, iclass 4, count 2 2006.229.18:02:14.25#ibcon#wrote, iclass 4, count 2 2006.229.18:02:14.25#ibcon#about to read 3, iclass 4, count 2 2006.229.18:02:14.27#ibcon#read 3, iclass 4, count 2 2006.229.18:02:14.27#ibcon#about to read 4, iclass 4, count 2 2006.229.18:02:14.27#ibcon#read 4, iclass 4, count 2 2006.229.18:02:14.27#ibcon#about to read 5, iclass 4, count 2 2006.229.18:02:14.27#ibcon#read 5, iclass 4, count 2 2006.229.18:02:14.27#ibcon#about to read 6, iclass 4, count 2 2006.229.18:02:14.27#ibcon#read 6, iclass 4, count 2 2006.229.18:02:14.27#ibcon#end of sib2, iclass 4, count 2 2006.229.18:02:14.27#ibcon#*mode == 0, iclass 4, count 2 2006.229.18:02:14.27#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.18:02:14.27#ibcon#[25=AT04-07\r\n] 2006.229.18:02:14.27#ibcon#*before write, iclass 4, count 2 2006.229.18:02:14.27#ibcon#enter sib2, iclass 4, count 2 2006.229.18:02:14.27#ibcon#flushed, iclass 4, count 2 2006.229.18:02:14.27#ibcon#about to write, iclass 4, count 2 2006.229.18:02:14.27#ibcon#wrote, iclass 4, count 2 2006.229.18:02:14.27#ibcon#about to read 3, iclass 4, count 2 2006.229.18:02:14.30#ibcon#read 3, iclass 4, count 2 2006.229.18:02:14.30#ibcon#about to read 4, iclass 4, count 2 2006.229.18:02:14.30#ibcon#read 4, iclass 4, count 2 2006.229.18:02:14.30#ibcon#about to read 5, iclass 4, count 2 2006.229.18:02:14.30#ibcon#read 5, iclass 4, count 2 2006.229.18:02:14.30#ibcon#about to read 6, iclass 4, count 2 2006.229.18:02:14.30#ibcon#read 6, iclass 4, count 2 2006.229.18:02:14.30#ibcon#end of sib2, iclass 4, count 2 2006.229.18:02:14.30#ibcon#*after write, iclass 4, count 2 2006.229.18:02:14.30#ibcon#*before return 0, iclass 4, count 2 2006.229.18:02:14.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:14.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:14.30#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.18:02:14.30#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:14.30#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:14.42#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:14.42#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:14.42#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:02:14.42#ibcon#first serial, iclass 4, count 0 2006.229.18:02:14.42#ibcon#enter sib2, iclass 4, count 0 2006.229.18:02:14.42#ibcon#flushed, iclass 4, count 0 2006.229.18:02:14.42#ibcon#about to write, iclass 4, count 0 2006.229.18:02:14.42#ibcon#wrote, iclass 4, count 0 2006.229.18:02:14.42#ibcon#about to read 3, iclass 4, count 0 2006.229.18:02:14.44#ibcon#read 3, iclass 4, count 0 2006.229.18:02:14.44#ibcon#about to read 4, iclass 4, count 0 2006.229.18:02:14.44#ibcon#read 4, iclass 4, count 0 2006.229.18:02:14.44#ibcon#about to read 5, iclass 4, count 0 2006.229.18:02:14.44#ibcon#read 5, iclass 4, count 0 2006.229.18:02:14.44#ibcon#about to read 6, iclass 4, count 0 2006.229.18:02:14.44#ibcon#read 6, iclass 4, count 0 2006.229.18:02:14.44#ibcon#end of sib2, iclass 4, count 0 2006.229.18:02:14.44#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:02:14.44#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:02:14.44#ibcon#[25=USB\r\n] 2006.229.18:02:14.44#ibcon#*before write, iclass 4, count 0 2006.229.18:02:14.44#ibcon#enter sib2, iclass 4, count 0 2006.229.18:02:14.44#ibcon#flushed, iclass 4, count 0 2006.229.18:02:14.44#ibcon#about to write, iclass 4, count 0 2006.229.18:02:14.44#ibcon#wrote, iclass 4, count 0 2006.229.18:02:14.44#ibcon#about to read 3, iclass 4, count 0 2006.229.18:02:14.47#ibcon#read 3, iclass 4, count 0 2006.229.18:02:14.47#ibcon#about to read 4, iclass 4, count 0 2006.229.18:02:14.47#ibcon#read 4, iclass 4, count 0 2006.229.18:02:14.47#ibcon#about to read 5, iclass 4, count 0 2006.229.18:02:14.47#ibcon#read 5, iclass 4, count 0 2006.229.18:02:14.47#ibcon#about to read 6, iclass 4, count 0 2006.229.18:02:14.47#ibcon#read 6, iclass 4, count 0 2006.229.18:02:14.47#ibcon#end of sib2, iclass 4, count 0 2006.229.18:02:14.47#ibcon#*after write, iclass 4, count 0 2006.229.18:02:14.47#ibcon#*before return 0, iclass 4, count 0 2006.229.18:02:14.47#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:14.47#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:14.47#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:02:14.47#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:02:14.47$vck44/valo=5,734.99 2006.229.18:02:14.47#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.18:02:14.47#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.18:02:14.47#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:14.47#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:14.47#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:14.47#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:14.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:02:14.47#ibcon#first serial, iclass 6, count 0 2006.229.18:02:14.47#ibcon#enter sib2, iclass 6, count 0 2006.229.18:02:14.47#ibcon#flushed, iclass 6, count 0 2006.229.18:02:14.47#ibcon#about to write, iclass 6, count 0 2006.229.18:02:14.47#ibcon#wrote, iclass 6, count 0 2006.229.18:02:14.47#ibcon#about to read 3, iclass 6, count 0 2006.229.18:02:14.49#ibcon#read 3, iclass 6, count 0 2006.229.18:02:14.49#ibcon#about to read 4, iclass 6, count 0 2006.229.18:02:14.49#ibcon#read 4, iclass 6, count 0 2006.229.18:02:14.49#ibcon#about to read 5, iclass 6, count 0 2006.229.18:02:14.49#ibcon#read 5, iclass 6, count 0 2006.229.18:02:14.49#ibcon#about to read 6, iclass 6, count 0 2006.229.18:02:14.49#ibcon#read 6, iclass 6, count 0 2006.229.18:02:14.49#ibcon#end of sib2, iclass 6, count 0 2006.229.18:02:14.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:02:14.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:02:14.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:02:14.49#ibcon#*before write, iclass 6, count 0 2006.229.18:02:14.49#ibcon#enter sib2, iclass 6, count 0 2006.229.18:02:14.49#ibcon#flushed, iclass 6, count 0 2006.229.18:02:14.49#ibcon#about to write, iclass 6, count 0 2006.229.18:02:14.49#ibcon#wrote, iclass 6, count 0 2006.229.18:02:14.49#ibcon#about to read 3, iclass 6, count 0 2006.229.18:02:14.53#ibcon#read 3, iclass 6, count 0 2006.229.18:02:14.53#ibcon#about to read 4, iclass 6, count 0 2006.229.18:02:14.53#ibcon#read 4, iclass 6, count 0 2006.229.18:02:14.53#ibcon#about to read 5, iclass 6, count 0 2006.229.18:02:14.53#ibcon#read 5, iclass 6, count 0 2006.229.18:02:14.53#ibcon#about to read 6, iclass 6, count 0 2006.229.18:02:14.53#ibcon#read 6, iclass 6, count 0 2006.229.18:02:14.53#ibcon#end of sib2, iclass 6, count 0 2006.229.18:02:14.53#ibcon#*after write, iclass 6, count 0 2006.229.18:02:14.53#ibcon#*before return 0, iclass 6, count 0 2006.229.18:02:14.53#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:14.53#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:14.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:02:14.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:02:14.53$vck44/va=5,4 2006.229.18:02:14.53#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.18:02:14.53#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.18:02:14.53#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:14.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:14.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:14.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:14.59#ibcon#enter wrdev, iclass 10, count 2 2006.229.18:02:14.59#ibcon#first serial, iclass 10, count 2 2006.229.18:02:14.59#ibcon#enter sib2, iclass 10, count 2 2006.229.18:02:14.59#ibcon#flushed, iclass 10, count 2 2006.229.18:02:14.59#ibcon#about to write, iclass 10, count 2 2006.229.18:02:14.59#ibcon#wrote, iclass 10, count 2 2006.229.18:02:14.59#ibcon#about to read 3, iclass 10, count 2 2006.229.18:02:14.61#ibcon#read 3, iclass 10, count 2 2006.229.18:02:14.61#ibcon#about to read 4, iclass 10, count 2 2006.229.18:02:14.61#ibcon#read 4, iclass 10, count 2 2006.229.18:02:14.61#ibcon#about to read 5, iclass 10, count 2 2006.229.18:02:14.61#ibcon#read 5, iclass 10, count 2 2006.229.18:02:14.61#ibcon#about to read 6, iclass 10, count 2 2006.229.18:02:14.61#ibcon#read 6, iclass 10, count 2 2006.229.18:02:14.61#ibcon#end of sib2, iclass 10, count 2 2006.229.18:02:14.61#ibcon#*mode == 0, iclass 10, count 2 2006.229.18:02:14.61#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.18:02:14.61#ibcon#[25=AT05-04\r\n] 2006.229.18:02:14.61#ibcon#*before write, iclass 10, count 2 2006.229.18:02:14.61#ibcon#enter sib2, iclass 10, count 2 2006.229.18:02:14.61#ibcon#flushed, iclass 10, count 2 2006.229.18:02:14.61#ibcon#about to write, iclass 10, count 2 2006.229.18:02:14.61#ibcon#wrote, iclass 10, count 2 2006.229.18:02:14.61#ibcon#about to read 3, iclass 10, count 2 2006.229.18:02:14.64#ibcon#read 3, iclass 10, count 2 2006.229.18:02:14.64#ibcon#about to read 4, iclass 10, count 2 2006.229.18:02:14.64#ibcon#read 4, iclass 10, count 2 2006.229.18:02:14.64#ibcon#about to read 5, iclass 10, count 2 2006.229.18:02:14.64#ibcon#read 5, iclass 10, count 2 2006.229.18:02:14.64#ibcon#about to read 6, iclass 10, count 2 2006.229.18:02:14.64#ibcon#read 6, iclass 10, count 2 2006.229.18:02:14.64#ibcon#end of sib2, iclass 10, count 2 2006.229.18:02:14.64#ibcon#*after write, iclass 10, count 2 2006.229.18:02:14.64#ibcon#*before return 0, iclass 10, count 2 2006.229.18:02:14.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:14.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:14.64#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.18:02:14.64#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:14.64#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:14.76#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:14.76#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:14.76#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:02:14.76#ibcon#first serial, iclass 10, count 0 2006.229.18:02:14.76#ibcon#enter sib2, iclass 10, count 0 2006.229.18:02:14.76#ibcon#flushed, iclass 10, count 0 2006.229.18:02:14.76#ibcon#about to write, iclass 10, count 0 2006.229.18:02:14.76#ibcon#wrote, iclass 10, count 0 2006.229.18:02:14.76#ibcon#about to read 3, iclass 10, count 0 2006.229.18:02:14.78#ibcon#read 3, iclass 10, count 0 2006.229.18:02:14.78#ibcon#about to read 4, iclass 10, count 0 2006.229.18:02:14.78#ibcon#read 4, iclass 10, count 0 2006.229.18:02:14.78#ibcon#about to read 5, iclass 10, count 0 2006.229.18:02:14.78#ibcon#read 5, iclass 10, count 0 2006.229.18:02:14.78#ibcon#about to read 6, iclass 10, count 0 2006.229.18:02:14.78#ibcon#read 6, iclass 10, count 0 2006.229.18:02:14.78#ibcon#end of sib2, iclass 10, count 0 2006.229.18:02:14.78#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:02:14.78#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:02:14.78#ibcon#[25=USB\r\n] 2006.229.18:02:14.78#ibcon#*before write, iclass 10, count 0 2006.229.18:02:14.78#ibcon#enter sib2, iclass 10, count 0 2006.229.18:02:14.78#ibcon#flushed, iclass 10, count 0 2006.229.18:02:14.78#ibcon#about to write, iclass 10, count 0 2006.229.18:02:14.78#ibcon#wrote, iclass 10, count 0 2006.229.18:02:14.78#ibcon#about to read 3, iclass 10, count 0 2006.229.18:02:14.81#ibcon#read 3, iclass 10, count 0 2006.229.18:02:14.81#ibcon#about to read 4, iclass 10, count 0 2006.229.18:02:14.81#ibcon#read 4, iclass 10, count 0 2006.229.18:02:14.81#ibcon#about to read 5, iclass 10, count 0 2006.229.18:02:14.81#ibcon#read 5, iclass 10, count 0 2006.229.18:02:14.81#ibcon#about to read 6, iclass 10, count 0 2006.229.18:02:14.81#ibcon#read 6, iclass 10, count 0 2006.229.18:02:14.81#ibcon#end of sib2, iclass 10, count 0 2006.229.18:02:14.81#ibcon#*after write, iclass 10, count 0 2006.229.18:02:14.81#ibcon#*before return 0, iclass 10, count 0 2006.229.18:02:14.81#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:14.81#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:14.81#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:02:14.81#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:02:14.81$vck44/valo=6,814.99 2006.229.18:02:14.81#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:02:14.81#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:02:14.81#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:14.81#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:14.81#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:14.81#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:14.81#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:02:14.81#ibcon#first serial, iclass 12, count 0 2006.229.18:02:14.81#ibcon#enter sib2, iclass 12, count 0 2006.229.18:02:14.81#ibcon#flushed, iclass 12, count 0 2006.229.18:02:14.81#ibcon#about to write, iclass 12, count 0 2006.229.18:02:14.81#ibcon#wrote, iclass 12, count 0 2006.229.18:02:14.81#ibcon#about to read 3, iclass 12, count 0 2006.229.18:02:14.83#ibcon#read 3, iclass 12, count 0 2006.229.18:02:14.83#ibcon#about to read 4, iclass 12, count 0 2006.229.18:02:14.83#ibcon#read 4, iclass 12, count 0 2006.229.18:02:14.83#ibcon#about to read 5, iclass 12, count 0 2006.229.18:02:14.83#ibcon#read 5, iclass 12, count 0 2006.229.18:02:14.83#ibcon#about to read 6, iclass 12, count 0 2006.229.18:02:14.83#ibcon#read 6, iclass 12, count 0 2006.229.18:02:14.83#ibcon#end of sib2, iclass 12, count 0 2006.229.18:02:14.83#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:02:14.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:02:14.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:02:14.83#ibcon#*before write, iclass 12, count 0 2006.229.18:02:14.83#ibcon#enter sib2, iclass 12, count 0 2006.229.18:02:14.83#ibcon#flushed, iclass 12, count 0 2006.229.18:02:14.83#ibcon#about to write, iclass 12, count 0 2006.229.18:02:14.83#ibcon#wrote, iclass 12, count 0 2006.229.18:02:14.83#ibcon#about to read 3, iclass 12, count 0 2006.229.18:02:14.87#ibcon#read 3, iclass 12, count 0 2006.229.18:02:14.87#ibcon#about to read 4, iclass 12, count 0 2006.229.18:02:14.87#ibcon#read 4, iclass 12, count 0 2006.229.18:02:14.87#ibcon#about to read 5, iclass 12, count 0 2006.229.18:02:14.87#ibcon#read 5, iclass 12, count 0 2006.229.18:02:14.87#ibcon#about to read 6, iclass 12, count 0 2006.229.18:02:14.87#ibcon#read 6, iclass 12, count 0 2006.229.18:02:14.87#ibcon#end of sib2, iclass 12, count 0 2006.229.18:02:14.87#ibcon#*after write, iclass 12, count 0 2006.229.18:02:14.87#ibcon#*before return 0, iclass 12, count 0 2006.229.18:02:14.87#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:14.87#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:14.87#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:02:14.87#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:02:14.87$vck44/va=6,4 2006.229.18:02:14.87#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.18:02:14.87#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.18:02:14.87#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:14.87#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:14.93#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:14.93#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:14.93#ibcon#enter wrdev, iclass 14, count 2 2006.229.18:02:14.93#ibcon#first serial, iclass 14, count 2 2006.229.18:02:14.93#ibcon#enter sib2, iclass 14, count 2 2006.229.18:02:14.93#ibcon#flushed, iclass 14, count 2 2006.229.18:02:14.93#ibcon#about to write, iclass 14, count 2 2006.229.18:02:14.93#ibcon#wrote, iclass 14, count 2 2006.229.18:02:14.93#ibcon#about to read 3, iclass 14, count 2 2006.229.18:02:14.95#ibcon#read 3, iclass 14, count 2 2006.229.18:02:14.95#ibcon#about to read 4, iclass 14, count 2 2006.229.18:02:14.95#ibcon#read 4, iclass 14, count 2 2006.229.18:02:14.95#ibcon#about to read 5, iclass 14, count 2 2006.229.18:02:14.95#ibcon#read 5, iclass 14, count 2 2006.229.18:02:14.95#ibcon#about to read 6, iclass 14, count 2 2006.229.18:02:14.95#ibcon#read 6, iclass 14, count 2 2006.229.18:02:14.95#ibcon#end of sib2, iclass 14, count 2 2006.229.18:02:14.95#ibcon#*mode == 0, iclass 14, count 2 2006.229.18:02:14.95#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.18:02:14.95#ibcon#[25=AT06-04\r\n] 2006.229.18:02:14.95#ibcon#*before write, iclass 14, count 2 2006.229.18:02:14.95#ibcon#enter sib2, iclass 14, count 2 2006.229.18:02:14.95#ibcon#flushed, iclass 14, count 2 2006.229.18:02:14.95#ibcon#about to write, iclass 14, count 2 2006.229.18:02:14.95#ibcon#wrote, iclass 14, count 2 2006.229.18:02:14.95#ibcon#about to read 3, iclass 14, count 2 2006.229.18:02:14.98#ibcon#read 3, iclass 14, count 2 2006.229.18:02:14.98#ibcon#about to read 4, iclass 14, count 2 2006.229.18:02:14.98#ibcon#read 4, iclass 14, count 2 2006.229.18:02:14.98#ibcon#about to read 5, iclass 14, count 2 2006.229.18:02:14.98#ibcon#read 5, iclass 14, count 2 2006.229.18:02:14.98#ibcon#about to read 6, iclass 14, count 2 2006.229.18:02:14.98#ibcon#read 6, iclass 14, count 2 2006.229.18:02:14.98#ibcon#end of sib2, iclass 14, count 2 2006.229.18:02:14.98#ibcon#*after write, iclass 14, count 2 2006.229.18:02:14.98#ibcon#*before return 0, iclass 14, count 2 2006.229.18:02:14.98#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:14.98#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:14.98#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.18:02:14.98#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:14.98#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:15.10#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:15.10#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:15.10#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:02:15.10#ibcon#first serial, iclass 14, count 0 2006.229.18:02:15.10#ibcon#enter sib2, iclass 14, count 0 2006.229.18:02:15.10#ibcon#flushed, iclass 14, count 0 2006.229.18:02:15.10#ibcon#about to write, iclass 14, count 0 2006.229.18:02:15.10#ibcon#wrote, iclass 14, count 0 2006.229.18:02:15.10#ibcon#about to read 3, iclass 14, count 0 2006.229.18:02:15.12#ibcon#read 3, iclass 14, count 0 2006.229.18:02:15.12#ibcon#about to read 4, iclass 14, count 0 2006.229.18:02:15.12#ibcon#read 4, iclass 14, count 0 2006.229.18:02:15.12#ibcon#about to read 5, iclass 14, count 0 2006.229.18:02:15.12#ibcon#read 5, iclass 14, count 0 2006.229.18:02:15.12#ibcon#about to read 6, iclass 14, count 0 2006.229.18:02:15.12#ibcon#read 6, iclass 14, count 0 2006.229.18:02:15.12#ibcon#end of sib2, iclass 14, count 0 2006.229.18:02:15.12#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:02:15.12#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:02:15.12#ibcon#[25=USB\r\n] 2006.229.18:02:15.12#ibcon#*before write, iclass 14, count 0 2006.229.18:02:15.12#ibcon#enter sib2, iclass 14, count 0 2006.229.18:02:15.12#ibcon#flushed, iclass 14, count 0 2006.229.18:02:15.12#ibcon#about to write, iclass 14, count 0 2006.229.18:02:15.12#ibcon#wrote, iclass 14, count 0 2006.229.18:02:15.12#ibcon#about to read 3, iclass 14, count 0 2006.229.18:02:15.15#ibcon#read 3, iclass 14, count 0 2006.229.18:02:15.15#ibcon#about to read 4, iclass 14, count 0 2006.229.18:02:15.15#ibcon#read 4, iclass 14, count 0 2006.229.18:02:15.15#ibcon#about to read 5, iclass 14, count 0 2006.229.18:02:15.15#ibcon#read 5, iclass 14, count 0 2006.229.18:02:15.15#ibcon#about to read 6, iclass 14, count 0 2006.229.18:02:15.15#ibcon#read 6, iclass 14, count 0 2006.229.18:02:15.15#ibcon#end of sib2, iclass 14, count 0 2006.229.18:02:15.15#ibcon#*after write, iclass 14, count 0 2006.229.18:02:15.15#ibcon#*before return 0, iclass 14, count 0 2006.229.18:02:15.15#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:15.15#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:15.15#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:02:15.15#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:02:15.15$vck44/valo=7,864.99 2006.229.18:02:15.15#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.18:02:15.15#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.18:02:15.15#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:15.15#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:15.15#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:15.15#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:15.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:02:15.15#ibcon#first serial, iclass 16, count 0 2006.229.18:02:15.15#ibcon#enter sib2, iclass 16, count 0 2006.229.18:02:15.15#ibcon#flushed, iclass 16, count 0 2006.229.18:02:15.15#ibcon#about to write, iclass 16, count 0 2006.229.18:02:15.15#ibcon#wrote, iclass 16, count 0 2006.229.18:02:15.15#ibcon#about to read 3, iclass 16, count 0 2006.229.18:02:15.17#ibcon#read 3, iclass 16, count 0 2006.229.18:02:15.17#ibcon#about to read 4, iclass 16, count 0 2006.229.18:02:15.17#ibcon#read 4, iclass 16, count 0 2006.229.18:02:15.17#ibcon#about to read 5, iclass 16, count 0 2006.229.18:02:15.17#ibcon#read 5, iclass 16, count 0 2006.229.18:02:15.17#ibcon#about to read 6, iclass 16, count 0 2006.229.18:02:15.17#ibcon#read 6, iclass 16, count 0 2006.229.18:02:15.17#ibcon#end of sib2, iclass 16, count 0 2006.229.18:02:15.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:02:15.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:02:15.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:02:15.17#ibcon#*before write, iclass 16, count 0 2006.229.18:02:15.17#ibcon#enter sib2, iclass 16, count 0 2006.229.18:02:15.17#ibcon#flushed, iclass 16, count 0 2006.229.18:02:15.17#ibcon#about to write, iclass 16, count 0 2006.229.18:02:15.17#ibcon#wrote, iclass 16, count 0 2006.229.18:02:15.17#ibcon#about to read 3, iclass 16, count 0 2006.229.18:02:15.21#ibcon#read 3, iclass 16, count 0 2006.229.18:02:15.21#ibcon#about to read 4, iclass 16, count 0 2006.229.18:02:15.21#ibcon#read 4, iclass 16, count 0 2006.229.18:02:15.21#ibcon#about to read 5, iclass 16, count 0 2006.229.18:02:15.21#ibcon#read 5, iclass 16, count 0 2006.229.18:02:15.21#ibcon#about to read 6, iclass 16, count 0 2006.229.18:02:15.21#ibcon#read 6, iclass 16, count 0 2006.229.18:02:15.21#ibcon#end of sib2, iclass 16, count 0 2006.229.18:02:15.21#ibcon#*after write, iclass 16, count 0 2006.229.18:02:15.21#ibcon#*before return 0, iclass 16, count 0 2006.229.18:02:15.21#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:15.21#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:15.21#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:02:15.21#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:02:15.21$vck44/va=7,5 2006.229.18:02:15.21#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.18:02:15.21#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.18:02:15.21#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:15.21#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:15.27#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:15.27#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:15.27#ibcon#enter wrdev, iclass 18, count 2 2006.229.18:02:15.27#ibcon#first serial, iclass 18, count 2 2006.229.18:02:15.27#ibcon#enter sib2, iclass 18, count 2 2006.229.18:02:15.27#ibcon#flushed, iclass 18, count 2 2006.229.18:02:15.27#ibcon#about to write, iclass 18, count 2 2006.229.18:02:15.27#ibcon#wrote, iclass 18, count 2 2006.229.18:02:15.27#ibcon#about to read 3, iclass 18, count 2 2006.229.18:02:15.29#ibcon#read 3, iclass 18, count 2 2006.229.18:02:15.29#ibcon#about to read 4, iclass 18, count 2 2006.229.18:02:15.29#ibcon#read 4, iclass 18, count 2 2006.229.18:02:15.29#ibcon#about to read 5, iclass 18, count 2 2006.229.18:02:15.29#ibcon#read 5, iclass 18, count 2 2006.229.18:02:15.29#ibcon#about to read 6, iclass 18, count 2 2006.229.18:02:15.29#ibcon#read 6, iclass 18, count 2 2006.229.18:02:15.29#ibcon#end of sib2, iclass 18, count 2 2006.229.18:02:15.29#ibcon#*mode == 0, iclass 18, count 2 2006.229.18:02:15.29#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.18:02:15.29#ibcon#[25=AT07-05\r\n] 2006.229.18:02:15.29#ibcon#*before write, iclass 18, count 2 2006.229.18:02:15.29#ibcon#enter sib2, iclass 18, count 2 2006.229.18:02:15.29#ibcon#flushed, iclass 18, count 2 2006.229.18:02:15.29#ibcon#about to write, iclass 18, count 2 2006.229.18:02:15.29#ibcon#wrote, iclass 18, count 2 2006.229.18:02:15.29#ibcon#about to read 3, iclass 18, count 2 2006.229.18:02:15.32#ibcon#read 3, iclass 18, count 2 2006.229.18:02:15.32#ibcon#about to read 4, iclass 18, count 2 2006.229.18:02:15.32#ibcon#read 4, iclass 18, count 2 2006.229.18:02:15.32#ibcon#about to read 5, iclass 18, count 2 2006.229.18:02:15.32#ibcon#read 5, iclass 18, count 2 2006.229.18:02:15.32#ibcon#about to read 6, iclass 18, count 2 2006.229.18:02:15.32#ibcon#read 6, iclass 18, count 2 2006.229.18:02:15.32#ibcon#end of sib2, iclass 18, count 2 2006.229.18:02:15.32#ibcon#*after write, iclass 18, count 2 2006.229.18:02:15.32#ibcon#*before return 0, iclass 18, count 2 2006.229.18:02:15.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:15.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:15.32#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.18:02:15.32#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:15.32#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:15.44#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:15.44#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:15.44#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:02:15.44#ibcon#first serial, iclass 18, count 0 2006.229.18:02:15.44#ibcon#enter sib2, iclass 18, count 0 2006.229.18:02:15.44#ibcon#flushed, iclass 18, count 0 2006.229.18:02:15.44#ibcon#about to write, iclass 18, count 0 2006.229.18:02:15.44#ibcon#wrote, iclass 18, count 0 2006.229.18:02:15.44#ibcon#about to read 3, iclass 18, count 0 2006.229.18:02:15.46#ibcon#read 3, iclass 18, count 0 2006.229.18:02:15.46#ibcon#about to read 4, iclass 18, count 0 2006.229.18:02:15.46#ibcon#read 4, iclass 18, count 0 2006.229.18:02:15.46#ibcon#about to read 5, iclass 18, count 0 2006.229.18:02:15.46#ibcon#read 5, iclass 18, count 0 2006.229.18:02:15.46#ibcon#about to read 6, iclass 18, count 0 2006.229.18:02:15.46#ibcon#read 6, iclass 18, count 0 2006.229.18:02:15.46#ibcon#end of sib2, iclass 18, count 0 2006.229.18:02:15.46#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:02:15.46#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:02:15.46#ibcon#[25=USB\r\n] 2006.229.18:02:15.46#ibcon#*before write, iclass 18, count 0 2006.229.18:02:15.46#ibcon#enter sib2, iclass 18, count 0 2006.229.18:02:15.46#ibcon#flushed, iclass 18, count 0 2006.229.18:02:15.46#ibcon#about to write, iclass 18, count 0 2006.229.18:02:15.46#ibcon#wrote, iclass 18, count 0 2006.229.18:02:15.46#ibcon#about to read 3, iclass 18, count 0 2006.229.18:02:15.49#ibcon#read 3, iclass 18, count 0 2006.229.18:02:15.49#ibcon#about to read 4, iclass 18, count 0 2006.229.18:02:15.49#ibcon#read 4, iclass 18, count 0 2006.229.18:02:15.49#ibcon#about to read 5, iclass 18, count 0 2006.229.18:02:15.49#ibcon#read 5, iclass 18, count 0 2006.229.18:02:15.49#ibcon#about to read 6, iclass 18, count 0 2006.229.18:02:15.49#ibcon#read 6, iclass 18, count 0 2006.229.18:02:15.49#ibcon#end of sib2, iclass 18, count 0 2006.229.18:02:15.49#ibcon#*after write, iclass 18, count 0 2006.229.18:02:15.49#ibcon#*before return 0, iclass 18, count 0 2006.229.18:02:15.49#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:15.49#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:15.49#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:02:15.49#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:02:15.49$vck44/valo=8,884.99 2006.229.18:02:15.49#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.18:02:15.49#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.18:02:15.49#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:15.49#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:15.49#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:15.49#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:15.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:02:15.49#ibcon#first serial, iclass 20, count 0 2006.229.18:02:15.49#ibcon#enter sib2, iclass 20, count 0 2006.229.18:02:15.49#ibcon#flushed, iclass 20, count 0 2006.229.18:02:15.49#ibcon#about to write, iclass 20, count 0 2006.229.18:02:15.49#ibcon#wrote, iclass 20, count 0 2006.229.18:02:15.49#ibcon#about to read 3, iclass 20, count 0 2006.229.18:02:15.51#ibcon#read 3, iclass 20, count 0 2006.229.18:02:15.51#ibcon#about to read 4, iclass 20, count 0 2006.229.18:02:15.51#ibcon#read 4, iclass 20, count 0 2006.229.18:02:15.51#ibcon#about to read 5, iclass 20, count 0 2006.229.18:02:15.51#ibcon#read 5, iclass 20, count 0 2006.229.18:02:15.51#ibcon#about to read 6, iclass 20, count 0 2006.229.18:02:15.51#ibcon#read 6, iclass 20, count 0 2006.229.18:02:15.51#ibcon#end of sib2, iclass 20, count 0 2006.229.18:02:15.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:02:15.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:02:15.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:02:15.51#ibcon#*before write, iclass 20, count 0 2006.229.18:02:15.51#ibcon#enter sib2, iclass 20, count 0 2006.229.18:02:15.51#ibcon#flushed, iclass 20, count 0 2006.229.18:02:15.51#ibcon#about to write, iclass 20, count 0 2006.229.18:02:15.51#ibcon#wrote, iclass 20, count 0 2006.229.18:02:15.51#ibcon#about to read 3, iclass 20, count 0 2006.229.18:02:15.55#ibcon#read 3, iclass 20, count 0 2006.229.18:02:15.55#ibcon#about to read 4, iclass 20, count 0 2006.229.18:02:15.55#ibcon#read 4, iclass 20, count 0 2006.229.18:02:15.55#ibcon#about to read 5, iclass 20, count 0 2006.229.18:02:15.55#ibcon#read 5, iclass 20, count 0 2006.229.18:02:15.55#ibcon#about to read 6, iclass 20, count 0 2006.229.18:02:15.55#ibcon#read 6, iclass 20, count 0 2006.229.18:02:15.55#ibcon#end of sib2, iclass 20, count 0 2006.229.18:02:15.55#ibcon#*after write, iclass 20, count 0 2006.229.18:02:15.55#ibcon#*before return 0, iclass 20, count 0 2006.229.18:02:15.55#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:15.55#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:15.55#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:02:15.55#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:02:15.55$vck44/va=8,6 2006.229.18:02:15.55#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.18:02:15.55#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.18:02:15.55#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:15.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:02:15.61#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:02:15.61#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:02:15.61#ibcon#enter wrdev, iclass 22, count 2 2006.229.18:02:15.61#ibcon#first serial, iclass 22, count 2 2006.229.18:02:15.61#ibcon#enter sib2, iclass 22, count 2 2006.229.18:02:15.61#ibcon#flushed, iclass 22, count 2 2006.229.18:02:15.61#ibcon#about to write, iclass 22, count 2 2006.229.18:02:15.61#ibcon#wrote, iclass 22, count 2 2006.229.18:02:15.61#ibcon#about to read 3, iclass 22, count 2 2006.229.18:02:15.63#ibcon#read 3, iclass 22, count 2 2006.229.18:02:15.63#ibcon#about to read 4, iclass 22, count 2 2006.229.18:02:15.63#ibcon#read 4, iclass 22, count 2 2006.229.18:02:15.63#ibcon#about to read 5, iclass 22, count 2 2006.229.18:02:15.63#ibcon#read 5, iclass 22, count 2 2006.229.18:02:15.63#ibcon#about to read 6, iclass 22, count 2 2006.229.18:02:15.63#ibcon#read 6, iclass 22, count 2 2006.229.18:02:15.63#ibcon#end of sib2, iclass 22, count 2 2006.229.18:02:15.63#ibcon#*mode == 0, iclass 22, count 2 2006.229.18:02:15.63#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.18:02:15.63#ibcon#[25=AT08-06\r\n] 2006.229.18:02:15.63#ibcon#*before write, iclass 22, count 2 2006.229.18:02:15.63#ibcon#enter sib2, iclass 22, count 2 2006.229.18:02:15.63#ibcon#flushed, iclass 22, count 2 2006.229.18:02:15.63#ibcon#about to write, iclass 22, count 2 2006.229.18:02:15.63#ibcon#wrote, iclass 22, count 2 2006.229.18:02:15.63#ibcon#about to read 3, iclass 22, count 2 2006.229.18:02:15.66#ibcon#read 3, iclass 22, count 2 2006.229.18:02:15.66#ibcon#about to read 4, iclass 22, count 2 2006.229.18:02:15.66#ibcon#read 4, iclass 22, count 2 2006.229.18:02:15.66#ibcon#about to read 5, iclass 22, count 2 2006.229.18:02:15.66#ibcon#read 5, iclass 22, count 2 2006.229.18:02:15.66#ibcon#about to read 6, iclass 22, count 2 2006.229.18:02:15.66#ibcon#read 6, iclass 22, count 2 2006.229.18:02:15.66#ibcon#end of sib2, iclass 22, count 2 2006.229.18:02:15.66#ibcon#*after write, iclass 22, count 2 2006.229.18:02:15.66#ibcon#*before return 0, iclass 22, count 2 2006.229.18:02:15.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:02:15.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:02:15.66#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.18:02:15.66#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:15.66#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:02:15.78#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:02:15.78#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:02:15.78#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:02:15.78#ibcon#first serial, iclass 22, count 0 2006.229.18:02:15.78#ibcon#enter sib2, iclass 22, count 0 2006.229.18:02:15.78#ibcon#flushed, iclass 22, count 0 2006.229.18:02:15.78#ibcon#about to write, iclass 22, count 0 2006.229.18:02:15.78#ibcon#wrote, iclass 22, count 0 2006.229.18:02:15.78#ibcon#about to read 3, iclass 22, count 0 2006.229.18:02:15.80#ibcon#read 3, iclass 22, count 0 2006.229.18:02:15.80#ibcon#about to read 4, iclass 22, count 0 2006.229.18:02:15.80#ibcon#read 4, iclass 22, count 0 2006.229.18:02:15.80#ibcon#about to read 5, iclass 22, count 0 2006.229.18:02:15.80#ibcon#read 5, iclass 22, count 0 2006.229.18:02:15.80#ibcon#about to read 6, iclass 22, count 0 2006.229.18:02:15.80#ibcon#read 6, iclass 22, count 0 2006.229.18:02:15.80#ibcon#end of sib2, iclass 22, count 0 2006.229.18:02:15.80#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:02:15.80#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:02:15.80#ibcon#[25=USB\r\n] 2006.229.18:02:15.80#ibcon#*before write, iclass 22, count 0 2006.229.18:02:15.80#ibcon#enter sib2, iclass 22, count 0 2006.229.18:02:15.80#ibcon#flushed, iclass 22, count 0 2006.229.18:02:15.80#ibcon#about to write, iclass 22, count 0 2006.229.18:02:15.80#ibcon#wrote, iclass 22, count 0 2006.229.18:02:15.80#ibcon#about to read 3, iclass 22, count 0 2006.229.18:02:15.83#ibcon#read 3, iclass 22, count 0 2006.229.18:02:15.83#ibcon#about to read 4, iclass 22, count 0 2006.229.18:02:15.83#ibcon#read 4, iclass 22, count 0 2006.229.18:02:15.83#ibcon#about to read 5, iclass 22, count 0 2006.229.18:02:15.83#ibcon#read 5, iclass 22, count 0 2006.229.18:02:15.83#ibcon#about to read 6, iclass 22, count 0 2006.229.18:02:15.83#ibcon#read 6, iclass 22, count 0 2006.229.18:02:15.83#ibcon#end of sib2, iclass 22, count 0 2006.229.18:02:15.83#ibcon#*after write, iclass 22, count 0 2006.229.18:02:15.83#ibcon#*before return 0, iclass 22, count 0 2006.229.18:02:15.83#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:02:15.83#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:02:15.83#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:02:15.83#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:02:15.83$vck44/vblo=1,629.99 2006.229.18:02:15.83#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.18:02:15.83#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.18:02:15.83#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:15.83#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:02:15.83#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:02:15.83#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:02:15.83#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:02:15.83#ibcon#first serial, iclass 24, count 0 2006.229.18:02:15.83#ibcon#enter sib2, iclass 24, count 0 2006.229.18:02:15.83#ibcon#flushed, iclass 24, count 0 2006.229.18:02:15.83#ibcon#about to write, iclass 24, count 0 2006.229.18:02:15.83#ibcon#wrote, iclass 24, count 0 2006.229.18:02:15.83#ibcon#about to read 3, iclass 24, count 0 2006.229.18:02:15.85#ibcon#read 3, iclass 24, count 0 2006.229.18:02:15.85#ibcon#about to read 4, iclass 24, count 0 2006.229.18:02:15.85#ibcon#read 4, iclass 24, count 0 2006.229.18:02:15.85#ibcon#about to read 5, iclass 24, count 0 2006.229.18:02:15.85#ibcon#read 5, iclass 24, count 0 2006.229.18:02:15.85#ibcon#about to read 6, iclass 24, count 0 2006.229.18:02:15.85#ibcon#read 6, iclass 24, count 0 2006.229.18:02:15.85#ibcon#end of sib2, iclass 24, count 0 2006.229.18:02:15.85#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:02:15.85#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:02:15.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:02:15.85#ibcon#*before write, iclass 24, count 0 2006.229.18:02:15.85#ibcon#enter sib2, iclass 24, count 0 2006.229.18:02:15.85#ibcon#flushed, iclass 24, count 0 2006.229.18:02:15.85#ibcon#about to write, iclass 24, count 0 2006.229.18:02:15.85#ibcon#wrote, iclass 24, count 0 2006.229.18:02:15.85#ibcon#about to read 3, iclass 24, count 0 2006.229.18:02:15.89#ibcon#read 3, iclass 24, count 0 2006.229.18:02:15.89#ibcon#about to read 4, iclass 24, count 0 2006.229.18:02:15.89#ibcon#read 4, iclass 24, count 0 2006.229.18:02:15.89#ibcon#about to read 5, iclass 24, count 0 2006.229.18:02:15.89#ibcon#read 5, iclass 24, count 0 2006.229.18:02:15.89#ibcon#about to read 6, iclass 24, count 0 2006.229.18:02:15.89#ibcon#read 6, iclass 24, count 0 2006.229.18:02:15.89#ibcon#end of sib2, iclass 24, count 0 2006.229.18:02:15.89#ibcon#*after write, iclass 24, count 0 2006.229.18:02:15.89#ibcon#*before return 0, iclass 24, count 0 2006.229.18:02:15.89#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:02:15.89#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:02:15.89#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:02:15.89#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:02:15.89$vck44/vb=1,4 2006.229.18:02:15.89#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.18:02:15.89#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.18:02:15.89#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:15.89#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:02:15.89#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:02:15.89#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:02:15.89#ibcon#enter wrdev, iclass 26, count 2 2006.229.18:02:15.89#ibcon#first serial, iclass 26, count 2 2006.229.18:02:15.89#ibcon#enter sib2, iclass 26, count 2 2006.229.18:02:15.89#ibcon#flushed, iclass 26, count 2 2006.229.18:02:15.89#ibcon#about to write, iclass 26, count 2 2006.229.18:02:15.89#ibcon#wrote, iclass 26, count 2 2006.229.18:02:15.89#ibcon#about to read 3, iclass 26, count 2 2006.229.18:02:15.91#ibcon#read 3, iclass 26, count 2 2006.229.18:02:15.91#ibcon#about to read 4, iclass 26, count 2 2006.229.18:02:15.91#ibcon#read 4, iclass 26, count 2 2006.229.18:02:15.91#ibcon#about to read 5, iclass 26, count 2 2006.229.18:02:15.91#ibcon#read 5, iclass 26, count 2 2006.229.18:02:15.91#ibcon#about to read 6, iclass 26, count 2 2006.229.18:02:15.91#ibcon#read 6, iclass 26, count 2 2006.229.18:02:15.91#ibcon#end of sib2, iclass 26, count 2 2006.229.18:02:15.91#ibcon#*mode == 0, iclass 26, count 2 2006.229.18:02:15.91#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.18:02:15.91#ibcon#[27=AT01-04\r\n] 2006.229.18:02:15.91#ibcon#*before write, iclass 26, count 2 2006.229.18:02:15.91#ibcon#enter sib2, iclass 26, count 2 2006.229.18:02:15.91#ibcon#flushed, iclass 26, count 2 2006.229.18:02:15.91#ibcon#about to write, iclass 26, count 2 2006.229.18:02:15.91#ibcon#wrote, iclass 26, count 2 2006.229.18:02:15.91#ibcon#about to read 3, iclass 26, count 2 2006.229.18:02:15.94#ibcon#read 3, iclass 26, count 2 2006.229.18:02:15.94#ibcon#about to read 4, iclass 26, count 2 2006.229.18:02:15.94#ibcon#read 4, iclass 26, count 2 2006.229.18:02:15.94#ibcon#about to read 5, iclass 26, count 2 2006.229.18:02:15.94#ibcon#read 5, iclass 26, count 2 2006.229.18:02:15.94#ibcon#about to read 6, iclass 26, count 2 2006.229.18:02:15.94#ibcon#read 6, iclass 26, count 2 2006.229.18:02:15.94#ibcon#end of sib2, iclass 26, count 2 2006.229.18:02:15.94#ibcon#*after write, iclass 26, count 2 2006.229.18:02:15.94#ibcon#*before return 0, iclass 26, count 2 2006.229.18:02:15.94#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:02:15.94#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:02:15.94#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.18:02:15.94#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:15.94#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:02:16.06#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:02:16.06#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:02:16.06#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:02:16.06#ibcon#first serial, iclass 26, count 0 2006.229.18:02:16.06#ibcon#enter sib2, iclass 26, count 0 2006.229.18:02:16.06#ibcon#flushed, iclass 26, count 0 2006.229.18:02:16.06#ibcon#about to write, iclass 26, count 0 2006.229.18:02:16.06#ibcon#wrote, iclass 26, count 0 2006.229.18:02:16.06#ibcon#about to read 3, iclass 26, count 0 2006.229.18:02:16.08#ibcon#read 3, iclass 26, count 0 2006.229.18:02:16.08#ibcon#about to read 4, iclass 26, count 0 2006.229.18:02:16.08#ibcon#read 4, iclass 26, count 0 2006.229.18:02:16.08#ibcon#about to read 5, iclass 26, count 0 2006.229.18:02:16.08#ibcon#read 5, iclass 26, count 0 2006.229.18:02:16.08#ibcon#about to read 6, iclass 26, count 0 2006.229.18:02:16.08#ibcon#read 6, iclass 26, count 0 2006.229.18:02:16.08#ibcon#end of sib2, iclass 26, count 0 2006.229.18:02:16.08#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:02:16.08#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:02:16.08#ibcon#[27=USB\r\n] 2006.229.18:02:16.08#ibcon#*before write, iclass 26, count 0 2006.229.18:02:16.08#ibcon#enter sib2, iclass 26, count 0 2006.229.18:02:16.08#ibcon#flushed, iclass 26, count 0 2006.229.18:02:16.08#ibcon#about to write, iclass 26, count 0 2006.229.18:02:16.08#ibcon#wrote, iclass 26, count 0 2006.229.18:02:16.08#ibcon#about to read 3, iclass 26, count 0 2006.229.18:02:16.11#ibcon#read 3, iclass 26, count 0 2006.229.18:02:16.11#ibcon#about to read 4, iclass 26, count 0 2006.229.18:02:16.11#ibcon#read 4, iclass 26, count 0 2006.229.18:02:16.11#ibcon#about to read 5, iclass 26, count 0 2006.229.18:02:16.11#ibcon#read 5, iclass 26, count 0 2006.229.18:02:16.11#ibcon#about to read 6, iclass 26, count 0 2006.229.18:02:16.11#ibcon#read 6, iclass 26, count 0 2006.229.18:02:16.11#ibcon#end of sib2, iclass 26, count 0 2006.229.18:02:16.11#ibcon#*after write, iclass 26, count 0 2006.229.18:02:16.11#ibcon#*before return 0, iclass 26, count 0 2006.229.18:02:16.11#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:02:16.11#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:02:16.11#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:02:16.11#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:02:16.11$vck44/vblo=2,634.99 2006.229.18:02:16.11#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.18:02:16.11#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.18:02:16.11#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:16.11#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:16.11#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:16.11#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:16.11#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:02:16.11#ibcon#first serial, iclass 28, count 0 2006.229.18:02:16.11#ibcon#enter sib2, iclass 28, count 0 2006.229.18:02:16.11#ibcon#flushed, iclass 28, count 0 2006.229.18:02:16.11#ibcon#about to write, iclass 28, count 0 2006.229.18:02:16.11#ibcon#wrote, iclass 28, count 0 2006.229.18:02:16.11#ibcon#about to read 3, iclass 28, count 0 2006.229.18:02:16.13#ibcon#read 3, iclass 28, count 0 2006.229.18:02:16.13#ibcon#about to read 4, iclass 28, count 0 2006.229.18:02:16.13#ibcon#read 4, iclass 28, count 0 2006.229.18:02:16.13#ibcon#about to read 5, iclass 28, count 0 2006.229.18:02:16.13#ibcon#read 5, iclass 28, count 0 2006.229.18:02:16.13#ibcon#about to read 6, iclass 28, count 0 2006.229.18:02:16.13#ibcon#read 6, iclass 28, count 0 2006.229.18:02:16.13#ibcon#end of sib2, iclass 28, count 0 2006.229.18:02:16.13#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:02:16.13#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:02:16.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:02:16.13#ibcon#*before write, iclass 28, count 0 2006.229.18:02:16.13#ibcon#enter sib2, iclass 28, count 0 2006.229.18:02:16.13#ibcon#flushed, iclass 28, count 0 2006.229.18:02:16.13#ibcon#about to write, iclass 28, count 0 2006.229.18:02:16.13#ibcon#wrote, iclass 28, count 0 2006.229.18:02:16.13#ibcon#about to read 3, iclass 28, count 0 2006.229.18:02:16.17#ibcon#read 3, iclass 28, count 0 2006.229.18:02:16.17#ibcon#about to read 4, iclass 28, count 0 2006.229.18:02:16.17#ibcon#read 4, iclass 28, count 0 2006.229.18:02:16.17#ibcon#about to read 5, iclass 28, count 0 2006.229.18:02:16.17#ibcon#read 5, iclass 28, count 0 2006.229.18:02:16.17#ibcon#about to read 6, iclass 28, count 0 2006.229.18:02:16.17#ibcon#read 6, iclass 28, count 0 2006.229.18:02:16.17#ibcon#end of sib2, iclass 28, count 0 2006.229.18:02:16.17#ibcon#*after write, iclass 28, count 0 2006.229.18:02:16.17#ibcon#*before return 0, iclass 28, count 0 2006.229.18:02:16.17#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:16.17#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:02:16.17#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:02:16.17#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:02:16.17$vck44/vb=2,4 2006.229.18:02:16.17#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.18:02:16.17#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.18:02:16.17#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:16.17#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:16.23#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:16.23#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:16.23#ibcon#enter wrdev, iclass 30, count 2 2006.229.18:02:16.23#ibcon#first serial, iclass 30, count 2 2006.229.18:02:16.23#ibcon#enter sib2, iclass 30, count 2 2006.229.18:02:16.23#ibcon#flushed, iclass 30, count 2 2006.229.18:02:16.23#ibcon#about to write, iclass 30, count 2 2006.229.18:02:16.23#ibcon#wrote, iclass 30, count 2 2006.229.18:02:16.23#ibcon#about to read 3, iclass 30, count 2 2006.229.18:02:16.25#ibcon#read 3, iclass 30, count 2 2006.229.18:02:16.25#ibcon#about to read 4, iclass 30, count 2 2006.229.18:02:16.25#ibcon#read 4, iclass 30, count 2 2006.229.18:02:16.25#ibcon#about to read 5, iclass 30, count 2 2006.229.18:02:16.25#ibcon#read 5, iclass 30, count 2 2006.229.18:02:16.25#ibcon#about to read 6, iclass 30, count 2 2006.229.18:02:16.25#ibcon#read 6, iclass 30, count 2 2006.229.18:02:16.25#ibcon#end of sib2, iclass 30, count 2 2006.229.18:02:16.25#ibcon#*mode == 0, iclass 30, count 2 2006.229.18:02:16.25#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.18:02:16.25#ibcon#[27=AT02-04\r\n] 2006.229.18:02:16.25#ibcon#*before write, iclass 30, count 2 2006.229.18:02:16.25#ibcon#enter sib2, iclass 30, count 2 2006.229.18:02:16.25#ibcon#flushed, iclass 30, count 2 2006.229.18:02:16.25#ibcon#about to write, iclass 30, count 2 2006.229.18:02:16.25#ibcon#wrote, iclass 30, count 2 2006.229.18:02:16.25#ibcon#about to read 3, iclass 30, count 2 2006.229.18:02:16.28#ibcon#read 3, iclass 30, count 2 2006.229.18:02:16.28#ibcon#about to read 4, iclass 30, count 2 2006.229.18:02:16.28#ibcon#read 4, iclass 30, count 2 2006.229.18:02:16.28#ibcon#about to read 5, iclass 30, count 2 2006.229.18:02:16.28#ibcon#read 5, iclass 30, count 2 2006.229.18:02:16.28#ibcon#about to read 6, iclass 30, count 2 2006.229.18:02:16.28#ibcon#read 6, iclass 30, count 2 2006.229.18:02:16.28#ibcon#end of sib2, iclass 30, count 2 2006.229.18:02:16.28#ibcon#*after write, iclass 30, count 2 2006.229.18:02:16.28#ibcon#*before return 0, iclass 30, count 2 2006.229.18:02:16.28#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:16.28#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:02:16.28#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.18:02:16.28#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:16.28#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:16.40#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:16.40#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:16.40#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:02:16.40#ibcon#first serial, iclass 30, count 0 2006.229.18:02:16.40#ibcon#enter sib2, iclass 30, count 0 2006.229.18:02:16.40#ibcon#flushed, iclass 30, count 0 2006.229.18:02:16.40#ibcon#about to write, iclass 30, count 0 2006.229.18:02:16.40#ibcon#wrote, iclass 30, count 0 2006.229.18:02:16.40#ibcon#about to read 3, iclass 30, count 0 2006.229.18:02:16.42#ibcon#read 3, iclass 30, count 0 2006.229.18:02:16.42#ibcon#about to read 4, iclass 30, count 0 2006.229.18:02:16.42#ibcon#read 4, iclass 30, count 0 2006.229.18:02:16.42#ibcon#about to read 5, iclass 30, count 0 2006.229.18:02:16.42#ibcon#read 5, iclass 30, count 0 2006.229.18:02:16.42#ibcon#about to read 6, iclass 30, count 0 2006.229.18:02:16.42#ibcon#read 6, iclass 30, count 0 2006.229.18:02:16.42#ibcon#end of sib2, iclass 30, count 0 2006.229.18:02:16.42#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:02:16.42#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:02:16.42#ibcon#[27=USB\r\n] 2006.229.18:02:16.42#ibcon#*before write, iclass 30, count 0 2006.229.18:02:16.42#ibcon#enter sib2, iclass 30, count 0 2006.229.18:02:16.42#ibcon#flushed, iclass 30, count 0 2006.229.18:02:16.42#ibcon#about to write, iclass 30, count 0 2006.229.18:02:16.42#ibcon#wrote, iclass 30, count 0 2006.229.18:02:16.42#ibcon#about to read 3, iclass 30, count 0 2006.229.18:02:16.45#ibcon#read 3, iclass 30, count 0 2006.229.18:02:16.45#ibcon#about to read 4, iclass 30, count 0 2006.229.18:02:16.45#ibcon#read 4, iclass 30, count 0 2006.229.18:02:16.45#ibcon#about to read 5, iclass 30, count 0 2006.229.18:02:16.45#ibcon#read 5, iclass 30, count 0 2006.229.18:02:16.45#ibcon#about to read 6, iclass 30, count 0 2006.229.18:02:16.45#ibcon#read 6, iclass 30, count 0 2006.229.18:02:16.45#ibcon#end of sib2, iclass 30, count 0 2006.229.18:02:16.45#ibcon#*after write, iclass 30, count 0 2006.229.18:02:16.45#ibcon#*before return 0, iclass 30, count 0 2006.229.18:02:16.45#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:16.45#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:02:16.45#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:02:16.45#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:02:16.45$vck44/vblo=3,649.99 2006.229.18:02:16.45#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.18:02:16.45#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.18:02:16.45#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:16.45#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:16.45#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:16.45#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:16.45#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:02:16.45#ibcon#first serial, iclass 32, count 0 2006.229.18:02:16.45#ibcon#enter sib2, iclass 32, count 0 2006.229.18:02:16.45#ibcon#flushed, iclass 32, count 0 2006.229.18:02:16.45#ibcon#about to write, iclass 32, count 0 2006.229.18:02:16.45#ibcon#wrote, iclass 32, count 0 2006.229.18:02:16.45#ibcon#about to read 3, iclass 32, count 0 2006.229.18:02:16.47#ibcon#read 3, iclass 32, count 0 2006.229.18:02:16.47#ibcon#about to read 4, iclass 32, count 0 2006.229.18:02:16.47#ibcon#read 4, iclass 32, count 0 2006.229.18:02:16.47#ibcon#about to read 5, iclass 32, count 0 2006.229.18:02:16.47#ibcon#read 5, iclass 32, count 0 2006.229.18:02:16.47#ibcon#about to read 6, iclass 32, count 0 2006.229.18:02:16.47#ibcon#read 6, iclass 32, count 0 2006.229.18:02:16.47#ibcon#end of sib2, iclass 32, count 0 2006.229.18:02:16.47#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:02:16.47#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:02:16.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:02:16.47#ibcon#*before write, iclass 32, count 0 2006.229.18:02:16.47#ibcon#enter sib2, iclass 32, count 0 2006.229.18:02:16.47#ibcon#flushed, iclass 32, count 0 2006.229.18:02:16.47#ibcon#about to write, iclass 32, count 0 2006.229.18:02:16.47#ibcon#wrote, iclass 32, count 0 2006.229.18:02:16.47#ibcon#about to read 3, iclass 32, count 0 2006.229.18:02:16.51#ibcon#read 3, iclass 32, count 0 2006.229.18:02:16.51#ibcon#about to read 4, iclass 32, count 0 2006.229.18:02:16.51#ibcon#read 4, iclass 32, count 0 2006.229.18:02:16.51#ibcon#about to read 5, iclass 32, count 0 2006.229.18:02:16.51#ibcon#read 5, iclass 32, count 0 2006.229.18:02:16.51#ibcon#about to read 6, iclass 32, count 0 2006.229.18:02:16.51#ibcon#read 6, iclass 32, count 0 2006.229.18:02:16.51#ibcon#end of sib2, iclass 32, count 0 2006.229.18:02:16.51#ibcon#*after write, iclass 32, count 0 2006.229.18:02:16.51#ibcon#*before return 0, iclass 32, count 0 2006.229.18:02:16.51#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:16.51#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:02:16.51#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:02:16.51#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:02:16.51$vck44/vb=3,4 2006.229.18:02:16.51#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.18:02:16.51#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.18:02:16.51#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:16.51#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:16.57#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:16.57#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:16.57#ibcon#enter wrdev, iclass 34, count 2 2006.229.18:02:16.57#ibcon#first serial, iclass 34, count 2 2006.229.18:02:16.57#ibcon#enter sib2, iclass 34, count 2 2006.229.18:02:16.57#ibcon#flushed, iclass 34, count 2 2006.229.18:02:16.57#ibcon#about to write, iclass 34, count 2 2006.229.18:02:16.57#ibcon#wrote, iclass 34, count 2 2006.229.18:02:16.57#ibcon#about to read 3, iclass 34, count 2 2006.229.18:02:16.59#ibcon#read 3, iclass 34, count 2 2006.229.18:02:16.59#ibcon#about to read 4, iclass 34, count 2 2006.229.18:02:16.59#ibcon#read 4, iclass 34, count 2 2006.229.18:02:16.59#ibcon#about to read 5, iclass 34, count 2 2006.229.18:02:16.59#ibcon#read 5, iclass 34, count 2 2006.229.18:02:16.59#ibcon#about to read 6, iclass 34, count 2 2006.229.18:02:16.59#ibcon#read 6, iclass 34, count 2 2006.229.18:02:16.59#ibcon#end of sib2, iclass 34, count 2 2006.229.18:02:16.59#ibcon#*mode == 0, iclass 34, count 2 2006.229.18:02:16.59#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.18:02:16.59#ibcon#[27=AT03-04\r\n] 2006.229.18:02:16.59#ibcon#*before write, iclass 34, count 2 2006.229.18:02:16.59#ibcon#enter sib2, iclass 34, count 2 2006.229.18:02:16.59#ibcon#flushed, iclass 34, count 2 2006.229.18:02:16.59#ibcon#about to write, iclass 34, count 2 2006.229.18:02:16.59#ibcon#wrote, iclass 34, count 2 2006.229.18:02:16.59#ibcon#about to read 3, iclass 34, count 2 2006.229.18:02:16.62#ibcon#read 3, iclass 34, count 2 2006.229.18:02:16.62#ibcon#about to read 4, iclass 34, count 2 2006.229.18:02:16.62#ibcon#read 4, iclass 34, count 2 2006.229.18:02:16.62#ibcon#about to read 5, iclass 34, count 2 2006.229.18:02:16.62#ibcon#read 5, iclass 34, count 2 2006.229.18:02:16.62#ibcon#about to read 6, iclass 34, count 2 2006.229.18:02:16.62#ibcon#read 6, iclass 34, count 2 2006.229.18:02:16.62#ibcon#end of sib2, iclass 34, count 2 2006.229.18:02:16.62#ibcon#*after write, iclass 34, count 2 2006.229.18:02:16.62#ibcon#*before return 0, iclass 34, count 2 2006.229.18:02:16.62#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:16.62#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:02:16.62#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.18:02:16.62#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:16.62#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:16.74#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:16.74#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:16.74#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:02:16.74#ibcon#first serial, iclass 34, count 0 2006.229.18:02:16.74#ibcon#enter sib2, iclass 34, count 0 2006.229.18:02:16.74#ibcon#flushed, iclass 34, count 0 2006.229.18:02:16.74#ibcon#about to write, iclass 34, count 0 2006.229.18:02:16.74#ibcon#wrote, iclass 34, count 0 2006.229.18:02:16.74#ibcon#about to read 3, iclass 34, count 0 2006.229.18:02:16.76#ibcon#read 3, iclass 34, count 0 2006.229.18:02:16.76#ibcon#about to read 4, iclass 34, count 0 2006.229.18:02:16.76#ibcon#read 4, iclass 34, count 0 2006.229.18:02:16.76#ibcon#about to read 5, iclass 34, count 0 2006.229.18:02:16.76#ibcon#read 5, iclass 34, count 0 2006.229.18:02:16.76#ibcon#about to read 6, iclass 34, count 0 2006.229.18:02:16.76#ibcon#read 6, iclass 34, count 0 2006.229.18:02:16.76#ibcon#end of sib2, iclass 34, count 0 2006.229.18:02:16.76#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:02:16.76#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:02:16.76#ibcon#[27=USB\r\n] 2006.229.18:02:16.76#ibcon#*before write, iclass 34, count 0 2006.229.18:02:16.76#ibcon#enter sib2, iclass 34, count 0 2006.229.18:02:16.76#ibcon#flushed, iclass 34, count 0 2006.229.18:02:16.76#ibcon#about to write, iclass 34, count 0 2006.229.18:02:16.76#ibcon#wrote, iclass 34, count 0 2006.229.18:02:16.76#ibcon#about to read 3, iclass 34, count 0 2006.229.18:02:16.79#ibcon#read 3, iclass 34, count 0 2006.229.18:02:16.79#ibcon#about to read 4, iclass 34, count 0 2006.229.18:02:16.79#ibcon#read 4, iclass 34, count 0 2006.229.18:02:16.79#ibcon#about to read 5, iclass 34, count 0 2006.229.18:02:16.79#ibcon#read 5, iclass 34, count 0 2006.229.18:02:16.79#ibcon#about to read 6, iclass 34, count 0 2006.229.18:02:16.79#ibcon#read 6, iclass 34, count 0 2006.229.18:02:16.79#ibcon#end of sib2, iclass 34, count 0 2006.229.18:02:16.79#ibcon#*after write, iclass 34, count 0 2006.229.18:02:16.79#ibcon#*before return 0, iclass 34, count 0 2006.229.18:02:16.79#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:16.79#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:02:16.79#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:02:16.79#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:02:16.79$vck44/vblo=4,679.99 2006.229.18:02:16.79#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.18:02:16.79#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.18:02:16.79#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:16.79#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:16.79#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:16.79#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:16.79#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:02:16.79#ibcon#first serial, iclass 36, count 0 2006.229.18:02:16.79#ibcon#enter sib2, iclass 36, count 0 2006.229.18:02:16.79#ibcon#flushed, iclass 36, count 0 2006.229.18:02:16.79#ibcon#about to write, iclass 36, count 0 2006.229.18:02:16.79#ibcon#wrote, iclass 36, count 0 2006.229.18:02:16.79#ibcon#about to read 3, iclass 36, count 0 2006.229.18:02:16.81#ibcon#read 3, iclass 36, count 0 2006.229.18:02:16.81#ibcon#about to read 4, iclass 36, count 0 2006.229.18:02:16.81#ibcon#read 4, iclass 36, count 0 2006.229.18:02:16.81#ibcon#about to read 5, iclass 36, count 0 2006.229.18:02:16.81#ibcon#read 5, iclass 36, count 0 2006.229.18:02:16.81#ibcon#about to read 6, iclass 36, count 0 2006.229.18:02:16.81#ibcon#read 6, iclass 36, count 0 2006.229.18:02:16.81#ibcon#end of sib2, iclass 36, count 0 2006.229.18:02:16.81#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:02:16.81#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:02:16.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:02:16.81#ibcon#*before write, iclass 36, count 0 2006.229.18:02:16.81#ibcon#enter sib2, iclass 36, count 0 2006.229.18:02:16.81#ibcon#flushed, iclass 36, count 0 2006.229.18:02:16.81#ibcon#about to write, iclass 36, count 0 2006.229.18:02:16.81#ibcon#wrote, iclass 36, count 0 2006.229.18:02:16.81#ibcon#about to read 3, iclass 36, count 0 2006.229.18:02:16.85#ibcon#read 3, iclass 36, count 0 2006.229.18:02:16.85#ibcon#about to read 4, iclass 36, count 0 2006.229.18:02:16.85#ibcon#read 4, iclass 36, count 0 2006.229.18:02:16.85#ibcon#about to read 5, iclass 36, count 0 2006.229.18:02:16.85#ibcon#read 5, iclass 36, count 0 2006.229.18:02:16.85#ibcon#about to read 6, iclass 36, count 0 2006.229.18:02:16.85#ibcon#read 6, iclass 36, count 0 2006.229.18:02:16.85#ibcon#end of sib2, iclass 36, count 0 2006.229.18:02:16.85#ibcon#*after write, iclass 36, count 0 2006.229.18:02:16.85#ibcon#*before return 0, iclass 36, count 0 2006.229.18:02:16.85#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:16.85#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:02:16.85#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:02:16.85#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:02:16.85$vck44/vb=4,4 2006.229.18:02:16.85#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.18:02:16.85#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.18:02:16.85#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:16.85#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:16.91#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:16.91#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:16.91#ibcon#enter wrdev, iclass 38, count 2 2006.229.18:02:16.91#ibcon#first serial, iclass 38, count 2 2006.229.18:02:16.91#ibcon#enter sib2, iclass 38, count 2 2006.229.18:02:16.91#ibcon#flushed, iclass 38, count 2 2006.229.18:02:16.91#ibcon#about to write, iclass 38, count 2 2006.229.18:02:16.91#ibcon#wrote, iclass 38, count 2 2006.229.18:02:16.91#ibcon#about to read 3, iclass 38, count 2 2006.229.18:02:16.93#ibcon#read 3, iclass 38, count 2 2006.229.18:02:16.93#ibcon#about to read 4, iclass 38, count 2 2006.229.18:02:16.93#ibcon#read 4, iclass 38, count 2 2006.229.18:02:16.93#ibcon#about to read 5, iclass 38, count 2 2006.229.18:02:16.93#ibcon#read 5, iclass 38, count 2 2006.229.18:02:16.93#ibcon#about to read 6, iclass 38, count 2 2006.229.18:02:16.93#ibcon#read 6, iclass 38, count 2 2006.229.18:02:16.93#ibcon#end of sib2, iclass 38, count 2 2006.229.18:02:16.93#ibcon#*mode == 0, iclass 38, count 2 2006.229.18:02:16.93#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.18:02:16.93#ibcon#[27=AT04-04\r\n] 2006.229.18:02:16.93#ibcon#*before write, iclass 38, count 2 2006.229.18:02:16.93#ibcon#enter sib2, iclass 38, count 2 2006.229.18:02:16.93#ibcon#flushed, iclass 38, count 2 2006.229.18:02:16.93#ibcon#about to write, iclass 38, count 2 2006.229.18:02:16.93#ibcon#wrote, iclass 38, count 2 2006.229.18:02:16.93#ibcon#about to read 3, iclass 38, count 2 2006.229.18:02:16.96#ibcon#read 3, iclass 38, count 2 2006.229.18:02:16.96#ibcon#about to read 4, iclass 38, count 2 2006.229.18:02:16.96#ibcon#read 4, iclass 38, count 2 2006.229.18:02:16.96#ibcon#about to read 5, iclass 38, count 2 2006.229.18:02:16.96#ibcon#read 5, iclass 38, count 2 2006.229.18:02:16.96#ibcon#about to read 6, iclass 38, count 2 2006.229.18:02:16.96#ibcon#read 6, iclass 38, count 2 2006.229.18:02:16.96#ibcon#end of sib2, iclass 38, count 2 2006.229.18:02:16.96#ibcon#*after write, iclass 38, count 2 2006.229.18:02:16.96#ibcon#*before return 0, iclass 38, count 2 2006.229.18:02:16.96#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:16.96#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:02:16.96#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.18:02:16.96#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:16.96#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:17.08#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:17.08#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:17.08#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:02:17.08#ibcon#first serial, iclass 38, count 0 2006.229.18:02:17.08#ibcon#enter sib2, iclass 38, count 0 2006.229.18:02:17.08#ibcon#flushed, iclass 38, count 0 2006.229.18:02:17.08#ibcon#about to write, iclass 38, count 0 2006.229.18:02:17.08#ibcon#wrote, iclass 38, count 0 2006.229.18:02:17.08#ibcon#about to read 3, iclass 38, count 0 2006.229.18:02:17.10#ibcon#read 3, iclass 38, count 0 2006.229.18:02:17.10#ibcon#about to read 4, iclass 38, count 0 2006.229.18:02:17.10#ibcon#read 4, iclass 38, count 0 2006.229.18:02:17.10#ibcon#about to read 5, iclass 38, count 0 2006.229.18:02:17.10#ibcon#read 5, iclass 38, count 0 2006.229.18:02:17.10#ibcon#about to read 6, iclass 38, count 0 2006.229.18:02:17.10#ibcon#read 6, iclass 38, count 0 2006.229.18:02:17.10#ibcon#end of sib2, iclass 38, count 0 2006.229.18:02:17.10#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:02:17.10#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:02:17.10#ibcon#[27=USB\r\n] 2006.229.18:02:17.10#ibcon#*before write, iclass 38, count 0 2006.229.18:02:17.10#ibcon#enter sib2, iclass 38, count 0 2006.229.18:02:17.10#ibcon#flushed, iclass 38, count 0 2006.229.18:02:17.10#ibcon#about to write, iclass 38, count 0 2006.229.18:02:17.10#ibcon#wrote, iclass 38, count 0 2006.229.18:02:17.10#ibcon#about to read 3, iclass 38, count 0 2006.229.18:02:17.13#ibcon#read 3, iclass 38, count 0 2006.229.18:02:17.13#ibcon#about to read 4, iclass 38, count 0 2006.229.18:02:17.13#ibcon#read 4, iclass 38, count 0 2006.229.18:02:17.13#ibcon#about to read 5, iclass 38, count 0 2006.229.18:02:17.13#ibcon#read 5, iclass 38, count 0 2006.229.18:02:17.13#ibcon#about to read 6, iclass 38, count 0 2006.229.18:02:17.13#ibcon#read 6, iclass 38, count 0 2006.229.18:02:17.13#ibcon#end of sib2, iclass 38, count 0 2006.229.18:02:17.13#ibcon#*after write, iclass 38, count 0 2006.229.18:02:17.13#ibcon#*before return 0, iclass 38, count 0 2006.229.18:02:17.13#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:17.13#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:02:17.13#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:02:17.13#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:02:17.13$vck44/vblo=5,709.99 2006.229.18:02:17.13#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.18:02:17.13#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.18:02:17.13#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:17.13#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:17.13#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:17.13#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:17.13#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:02:17.13#ibcon#first serial, iclass 40, count 0 2006.229.18:02:17.13#ibcon#enter sib2, iclass 40, count 0 2006.229.18:02:17.13#ibcon#flushed, iclass 40, count 0 2006.229.18:02:17.13#ibcon#about to write, iclass 40, count 0 2006.229.18:02:17.13#ibcon#wrote, iclass 40, count 0 2006.229.18:02:17.13#ibcon#about to read 3, iclass 40, count 0 2006.229.18:02:17.15#ibcon#read 3, iclass 40, count 0 2006.229.18:02:17.15#ibcon#about to read 4, iclass 40, count 0 2006.229.18:02:17.15#ibcon#read 4, iclass 40, count 0 2006.229.18:02:17.15#ibcon#about to read 5, iclass 40, count 0 2006.229.18:02:17.15#ibcon#read 5, iclass 40, count 0 2006.229.18:02:17.15#ibcon#about to read 6, iclass 40, count 0 2006.229.18:02:17.15#ibcon#read 6, iclass 40, count 0 2006.229.18:02:17.15#ibcon#end of sib2, iclass 40, count 0 2006.229.18:02:17.15#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:02:17.15#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:02:17.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:02:17.15#ibcon#*before write, iclass 40, count 0 2006.229.18:02:17.15#ibcon#enter sib2, iclass 40, count 0 2006.229.18:02:17.15#ibcon#flushed, iclass 40, count 0 2006.229.18:02:17.15#ibcon#about to write, iclass 40, count 0 2006.229.18:02:17.15#ibcon#wrote, iclass 40, count 0 2006.229.18:02:17.15#ibcon#about to read 3, iclass 40, count 0 2006.229.18:02:17.19#ibcon#read 3, iclass 40, count 0 2006.229.18:02:17.19#ibcon#about to read 4, iclass 40, count 0 2006.229.18:02:17.19#ibcon#read 4, iclass 40, count 0 2006.229.18:02:17.19#ibcon#about to read 5, iclass 40, count 0 2006.229.18:02:17.19#ibcon#read 5, iclass 40, count 0 2006.229.18:02:17.19#ibcon#about to read 6, iclass 40, count 0 2006.229.18:02:17.19#ibcon#read 6, iclass 40, count 0 2006.229.18:02:17.19#ibcon#end of sib2, iclass 40, count 0 2006.229.18:02:17.19#ibcon#*after write, iclass 40, count 0 2006.229.18:02:17.19#ibcon#*before return 0, iclass 40, count 0 2006.229.18:02:17.19#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:17.19#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:02:17.19#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:02:17.19#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:02:17.19$vck44/vb=5,4 2006.229.18:02:17.19#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.18:02:17.19#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.18:02:17.19#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:17.19#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:17.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:17.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:17.25#ibcon#enter wrdev, iclass 4, count 2 2006.229.18:02:17.25#ibcon#first serial, iclass 4, count 2 2006.229.18:02:17.25#ibcon#enter sib2, iclass 4, count 2 2006.229.18:02:17.25#ibcon#flushed, iclass 4, count 2 2006.229.18:02:17.25#ibcon#about to write, iclass 4, count 2 2006.229.18:02:17.25#ibcon#wrote, iclass 4, count 2 2006.229.18:02:17.25#ibcon#about to read 3, iclass 4, count 2 2006.229.18:02:17.27#ibcon#read 3, iclass 4, count 2 2006.229.18:02:17.27#ibcon#about to read 4, iclass 4, count 2 2006.229.18:02:17.27#ibcon#read 4, iclass 4, count 2 2006.229.18:02:17.27#ibcon#about to read 5, iclass 4, count 2 2006.229.18:02:17.27#ibcon#read 5, iclass 4, count 2 2006.229.18:02:17.27#ibcon#about to read 6, iclass 4, count 2 2006.229.18:02:17.27#ibcon#read 6, iclass 4, count 2 2006.229.18:02:17.27#ibcon#end of sib2, iclass 4, count 2 2006.229.18:02:17.27#ibcon#*mode == 0, iclass 4, count 2 2006.229.18:02:17.27#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.18:02:17.27#ibcon#[27=AT05-04\r\n] 2006.229.18:02:17.27#ibcon#*before write, iclass 4, count 2 2006.229.18:02:17.27#ibcon#enter sib2, iclass 4, count 2 2006.229.18:02:17.27#ibcon#flushed, iclass 4, count 2 2006.229.18:02:17.27#ibcon#about to write, iclass 4, count 2 2006.229.18:02:17.27#ibcon#wrote, iclass 4, count 2 2006.229.18:02:17.27#ibcon#about to read 3, iclass 4, count 2 2006.229.18:02:17.30#ibcon#read 3, iclass 4, count 2 2006.229.18:02:17.30#ibcon#about to read 4, iclass 4, count 2 2006.229.18:02:17.30#ibcon#read 4, iclass 4, count 2 2006.229.18:02:17.30#ibcon#about to read 5, iclass 4, count 2 2006.229.18:02:17.30#ibcon#read 5, iclass 4, count 2 2006.229.18:02:17.30#ibcon#about to read 6, iclass 4, count 2 2006.229.18:02:17.30#ibcon#read 6, iclass 4, count 2 2006.229.18:02:17.30#ibcon#end of sib2, iclass 4, count 2 2006.229.18:02:17.30#ibcon#*after write, iclass 4, count 2 2006.229.18:02:17.30#ibcon#*before return 0, iclass 4, count 2 2006.229.18:02:17.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:17.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:02:17.30#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.18:02:17.30#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:17.30#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:17.42#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:17.42#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:17.42#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:02:17.42#ibcon#first serial, iclass 4, count 0 2006.229.18:02:17.42#ibcon#enter sib2, iclass 4, count 0 2006.229.18:02:17.42#ibcon#flushed, iclass 4, count 0 2006.229.18:02:17.42#ibcon#about to write, iclass 4, count 0 2006.229.18:02:17.42#ibcon#wrote, iclass 4, count 0 2006.229.18:02:17.42#ibcon#about to read 3, iclass 4, count 0 2006.229.18:02:17.44#ibcon#read 3, iclass 4, count 0 2006.229.18:02:17.44#ibcon#about to read 4, iclass 4, count 0 2006.229.18:02:17.44#ibcon#read 4, iclass 4, count 0 2006.229.18:02:17.44#ibcon#about to read 5, iclass 4, count 0 2006.229.18:02:17.44#ibcon#read 5, iclass 4, count 0 2006.229.18:02:17.44#ibcon#about to read 6, iclass 4, count 0 2006.229.18:02:17.44#ibcon#read 6, iclass 4, count 0 2006.229.18:02:17.44#ibcon#end of sib2, iclass 4, count 0 2006.229.18:02:17.44#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:02:17.44#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:02:17.44#ibcon#[27=USB\r\n] 2006.229.18:02:17.44#ibcon#*before write, iclass 4, count 0 2006.229.18:02:17.44#ibcon#enter sib2, iclass 4, count 0 2006.229.18:02:17.44#ibcon#flushed, iclass 4, count 0 2006.229.18:02:17.44#ibcon#about to write, iclass 4, count 0 2006.229.18:02:17.44#ibcon#wrote, iclass 4, count 0 2006.229.18:02:17.44#ibcon#about to read 3, iclass 4, count 0 2006.229.18:02:17.47#ibcon#read 3, iclass 4, count 0 2006.229.18:02:17.47#ibcon#about to read 4, iclass 4, count 0 2006.229.18:02:17.47#ibcon#read 4, iclass 4, count 0 2006.229.18:02:17.47#ibcon#about to read 5, iclass 4, count 0 2006.229.18:02:17.47#ibcon#read 5, iclass 4, count 0 2006.229.18:02:17.47#ibcon#about to read 6, iclass 4, count 0 2006.229.18:02:17.47#ibcon#read 6, iclass 4, count 0 2006.229.18:02:17.47#ibcon#end of sib2, iclass 4, count 0 2006.229.18:02:17.47#ibcon#*after write, iclass 4, count 0 2006.229.18:02:17.47#ibcon#*before return 0, iclass 4, count 0 2006.229.18:02:17.47#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:17.47#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:02:17.47#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:02:17.47#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:02:17.47$vck44/vblo=6,719.99 2006.229.18:02:17.47#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.18:02:17.47#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.18:02:17.47#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:17.47#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:17.47#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:17.47#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:17.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:02:17.47#ibcon#first serial, iclass 6, count 0 2006.229.18:02:17.47#ibcon#enter sib2, iclass 6, count 0 2006.229.18:02:17.47#ibcon#flushed, iclass 6, count 0 2006.229.18:02:17.47#ibcon#about to write, iclass 6, count 0 2006.229.18:02:17.47#ibcon#wrote, iclass 6, count 0 2006.229.18:02:17.47#ibcon#about to read 3, iclass 6, count 0 2006.229.18:02:17.49#ibcon#read 3, iclass 6, count 0 2006.229.18:02:17.49#ibcon#about to read 4, iclass 6, count 0 2006.229.18:02:17.49#ibcon#read 4, iclass 6, count 0 2006.229.18:02:17.49#ibcon#about to read 5, iclass 6, count 0 2006.229.18:02:17.49#ibcon#read 5, iclass 6, count 0 2006.229.18:02:17.49#ibcon#about to read 6, iclass 6, count 0 2006.229.18:02:17.49#ibcon#read 6, iclass 6, count 0 2006.229.18:02:17.49#ibcon#end of sib2, iclass 6, count 0 2006.229.18:02:17.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:02:17.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:02:17.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:02:17.49#ibcon#*before write, iclass 6, count 0 2006.229.18:02:17.49#ibcon#enter sib2, iclass 6, count 0 2006.229.18:02:17.49#ibcon#flushed, iclass 6, count 0 2006.229.18:02:17.49#ibcon#about to write, iclass 6, count 0 2006.229.18:02:17.49#ibcon#wrote, iclass 6, count 0 2006.229.18:02:17.49#ibcon#about to read 3, iclass 6, count 0 2006.229.18:02:17.53#ibcon#read 3, iclass 6, count 0 2006.229.18:02:17.53#ibcon#about to read 4, iclass 6, count 0 2006.229.18:02:17.53#ibcon#read 4, iclass 6, count 0 2006.229.18:02:17.53#ibcon#about to read 5, iclass 6, count 0 2006.229.18:02:17.53#ibcon#read 5, iclass 6, count 0 2006.229.18:02:17.53#ibcon#about to read 6, iclass 6, count 0 2006.229.18:02:17.53#ibcon#read 6, iclass 6, count 0 2006.229.18:02:17.53#ibcon#end of sib2, iclass 6, count 0 2006.229.18:02:17.53#ibcon#*after write, iclass 6, count 0 2006.229.18:02:17.53#ibcon#*before return 0, iclass 6, count 0 2006.229.18:02:17.53#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:17.53#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:02:17.53#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:02:17.53#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:02:17.53$vck44/vb=6,4 2006.229.18:02:17.53#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.18:02:17.53#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.18:02:17.53#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:17.53#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:17.59#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:17.59#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:17.59#ibcon#enter wrdev, iclass 10, count 2 2006.229.18:02:17.59#ibcon#first serial, iclass 10, count 2 2006.229.18:02:17.59#ibcon#enter sib2, iclass 10, count 2 2006.229.18:02:17.59#ibcon#flushed, iclass 10, count 2 2006.229.18:02:17.59#ibcon#about to write, iclass 10, count 2 2006.229.18:02:17.59#ibcon#wrote, iclass 10, count 2 2006.229.18:02:17.59#ibcon#about to read 3, iclass 10, count 2 2006.229.18:02:17.61#ibcon#read 3, iclass 10, count 2 2006.229.18:02:17.61#ibcon#about to read 4, iclass 10, count 2 2006.229.18:02:17.61#ibcon#read 4, iclass 10, count 2 2006.229.18:02:17.61#ibcon#about to read 5, iclass 10, count 2 2006.229.18:02:17.61#ibcon#read 5, iclass 10, count 2 2006.229.18:02:17.61#ibcon#about to read 6, iclass 10, count 2 2006.229.18:02:17.61#ibcon#read 6, iclass 10, count 2 2006.229.18:02:17.61#ibcon#end of sib2, iclass 10, count 2 2006.229.18:02:17.61#ibcon#*mode == 0, iclass 10, count 2 2006.229.18:02:17.61#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.18:02:17.61#ibcon#[27=AT06-04\r\n] 2006.229.18:02:17.61#ibcon#*before write, iclass 10, count 2 2006.229.18:02:17.61#ibcon#enter sib2, iclass 10, count 2 2006.229.18:02:17.61#ibcon#flushed, iclass 10, count 2 2006.229.18:02:17.61#ibcon#about to write, iclass 10, count 2 2006.229.18:02:17.61#ibcon#wrote, iclass 10, count 2 2006.229.18:02:17.61#ibcon#about to read 3, iclass 10, count 2 2006.229.18:02:17.64#ibcon#read 3, iclass 10, count 2 2006.229.18:02:17.64#ibcon#about to read 4, iclass 10, count 2 2006.229.18:02:17.64#ibcon#read 4, iclass 10, count 2 2006.229.18:02:17.64#ibcon#about to read 5, iclass 10, count 2 2006.229.18:02:17.64#ibcon#read 5, iclass 10, count 2 2006.229.18:02:17.64#ibcon#about to read 6, iclass 10, count 2 2006.229.18:02:17.64#ibcon#read 6, iclass 10, count 2 2006.229.18:02:17.64#ibcon#end of sib2, iclass 10, count 2 2006.229.18:02:17.64#ibcon#*after write, iclass 10, count 2 2006.229.18:02:17.64#ibcon#*before return 0, iclass 10, count 2 2006.229.18:02:17.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:17.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:02:17.64#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.18:02:17.64#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:17.64#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:17.76#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:17.76#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:17.76#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:02:17.76#ibcon#first serial, iclass 10, count 0 2006.229.18:02:17.76#ibcon#enter sib2, iclass 10, count 0 2006.229.18:02:17.76#ibcon#flushed, iclass 10, count 0 2006.229.18:02:17.76#ibcon#about to write, iclass 10, count 0 2006.229.18:02:17.76#ibcon#wrote, iclass 10, count 0 2006.229.18:02:17.76#ibcon#about to read 3, iclass 10, count 0 2006.229.18:02:17.78#ibcon#read 3, iclass 10, count 0 2006.229.18:02:17.78#ibcon#about to read 4, iclass 10, count 0 2006.229.18:02:17.78#ibcon#read 4, iclass 10, count 0 2006.229.18:02:17.78#ibcon#about to read 5, iclass 10, count 0 2006.229.18:02:17.78#ibcon#read 5, iclass 10, count 0 2006.229.18:02:17.78#ibcon#about to read 6, iclass 10, count 0 2006.229.18:02:17.78#ibcon#read 6, iclass 10, count 0 2006.229.18:02:17.78#ibcon#end of sib2, iclass 10, count 0 2006.229.18:02:17.78#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:02:17.78#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:02:17.78#ibcon#[27=USB\r\n] 2006.229.18:02:17.78#ibcon#*before write, iclass 10, count 0 2006.229.18:02:17.78#ibcon#enter sib2, iclass 10, count 0 2006.229.18:02:17.78#ibcon#flushed, iclass 10, count 0 2006.229.18:02:17.78#ibcon#about to write, iclass 10, count 0 2006.229.18:02:17.78#ibcon#wrote, iclass 10, count 0 2006.229.18:02:17.78#ibcon#about to read 3, iclass 10, count 0 2006.229.18:02:17.81#ibcon#read 3, iclass 10, count 0 2006.229.18:02:17.81#ibcon#about to read 4, iclass 10, count 0 2006.229.18:02:17.81#ibcon#read 4, iclass 10, count 0 2006.229.18:02:17.81#ibcon#about to read 5, iclass 10, count 0 2006.229.18:02:17.81#ibcon#read 5, iclass 10, count 0 2006.229.18:02:17.81#ibcon#about to read 6, iclass 10, count 0 2006.229.18:02:17.81#ibcon#read 6, iclass 10, count 0 2006.229.18:02:17.81#ibcon#end of sib2, iclass 10, count 0 2006.229.18:02:17.81#ibcon#*after write, iclass 10, count 0 2006.229.18:02:17.81#ibcon#*before return 0, iclass 10, count 0 2006.229.18:02:17.81#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:17.81#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:02:17.81#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:02:17.81#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:02:17.81$vck44/vblo=7,734.99 2006.229.18:02:17.81#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:02:17.81#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:02:17.81#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:17.81#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:17.81#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:17.81#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:17.81#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:02:17.81#ibcon#first serial, iclass 12, count 0 2006.229.18:02:17.81#ibcon#enter sib2, iclass 12, count 0 2006.229.18:02:17.81#ibcon#flushed, iclass 12, count 0 2006.229.18:02:17.81#ibcon#about to write, iclass 12, count 0 2006.229.18:02:17.81#ibcon#wrote, iclass 12, count 0 2006.229.18:02:17.81#ibcon#about to read 3, iclass 12, count 0 2006.229.18:02:17.83#ibcon#read 3, iclass 12, count 0 2006.229.18:02:17.83#ibcon#about to read 4, iclass 12, count 0 2006.229.18:02:17.83#ibcon#read 4, iclass 12, count 0 2006.229.18:02:17.83#ibcon#about to read 5, iclass 12, count 0 2006.229.18:02:17.83#ibcon#read 5, iclass 12, count 0 2006.229.18:02:17.83#ibcon#about to read 6, iclass 12, count 0 2006.229.18:02:17.83#ibcon#read 6, iclass 12, count 0 2006.229.18:02:17.83#ibcon#end of sib2, iclass 12, count 0 2006.229.18:02:17.83#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:02:17.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:02:17.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:02:17.83#ibcon#*before write, iclass 12, count 0 2006.229.18:02:17.83#ibcon#enter sib2, iclass 12, count 0 2006.229.18:02:17.83#ibcon#flushed, iclass 12, count 0 2006.229.18:02:17.83#ibcon#about to write, iclass 12, count 0 2006.229.18:02:17.83#ibcon#wrote, iclass 12, count 0 2006.229.18:02:17.83#ibcon#about to read 3, iclass 12, count 0 2006.229.18:02:17.87#ibcon#read 3, iclass 12, count 0 2006.229.18:02:17.87#ibcon#about to read 4, iclass 12, count 0 2006.229.18:02:17.87#ibcon#read 4, iclass 12, count 0 2006.229.18:02:17.87#ibcon#about to read 5, iclass 12, count 0 2006.229.18:02:17.87#ibcon#read 5, iclass 12, count 0 2006.229.18:02:17.87#ibcon#about to read 6, iclass 12, count 0 2006.229.18:02:17.87#ibcon#read 6, iclass 12, count 0 2006.229.18:02:17.87#ibcon#end of sib2, iclass 12, count 0 2006.229.18:02:17.87#ibcon#*after write, iclass 12, count 0 2006.229.18:02:17.87#ibcon#*before return 0, iclass 12, count 0 2006.229.18:02:17.87#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:17.87#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:02:17.87#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:02:17.87#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:02:17.87$vck44/vb=7,4 2006.229.18:02:17.87#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.18:02:17.87#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.18:02:17.87#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:17.87#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:17.93#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:17.93#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:17.93#ibcon#enter wrdev, iclass 14, count 2 2006.229.18:02:17.93#ibcon#first serial, iclass 14, count 2 2006.229.18:02:17.93#ibcon#enter sib2, iclass 14, count 2 2006.229.18:02:17.93#ibcon#flushed, iclass 14, count 2 2006.229.18:02:17.93#ibcon#about to write, iclass 14, count 2 2006.229.18:02:17.93#ibcon#wrote, iclass 14, count 2 2006.229.18:02:17.93#ibcon#about to read 3, iclass 14, count 2 2006.229.18:02:17.95#ibcon#read 3, iclass 14, count 2 2006.229.18:02:17.95#ibcon#about to read 4, iclass 14, count 2 2006.229.18:02:17.95#ibcon#read 4, iclass 14, count 2 2006.229.18:02:17.95#ibcon#about to read 5, iclass 14, count 2 2006.229.18:02:17.95#ibcon#read 5, iclass 14, count 2 2006.229.18:02:17.95#ibcon#about to read 6, iclass 14, count 2 2006.229.18:02:17.95#ibcon#read 6, iclass 14, count 2 2006.229.18:02:17.95#ibcon#end of sib2, iclass 14, count 2 2006.229.18:02:17.95#ibcon#*mode == 0, iclass 14, count 2 2006.229.18:02:17.95#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.18:02:17.95#ibcon#[27=AT07-04\r\n] 2006.229.18:02:17.95#ibcon#*before write, iclass 14, count 2 2006.229.18:02:17.95#ibcon#enter sib2, iclass 14, count 2 2006.229.18:02:17.95#ibcon#flushed, iclass 14, count 2 2006.229.18:02:17.95#ibcon#about to write, iclass 14, count 2 2006.229.18:02:17.95#ibcon#wrote, iclass 14, count 2 2006.229.18:02:17.95#ibcon#about to read 3, iclass 14, count 2 2006.229.18:02:17.98#ibcon#read 3, iclass 14, count 2 2006.229.18:02:17.98#ibcon#about to read 4, iclass 14, count 2 2006.229.18:02:17.98#ibcon#read 4, iclass 14, count 2 2006.229.18:02:17.98#ibcon#about to read 5, iclass 14, count 2 2006.229.18:02:17.98#ibcon#read 5, iclass 14, count 2 2006.229.18:02:17.98#ibcon#about to read 6, iclass 14, count 2 2006.229.18:02:17.98#ibcon#read 6, iclass 14, count 2 2006.229.18:02:17.98#ibcon#end of sib2, iclass 14, count 2 2006.229.18:02:17.98#ibcon#*after write, iclass 14, count 2 2006.229.18:02:17.98#ibcon#*before return 0, iclass 14, count 2 2006.229.18:02:17.98#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:17.98#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:02:17.98#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.18:02:17.98#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:17.98#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:18.10#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:18.10#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:18.10#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:02:18.10#ibcon#first serial, iclass 14, count 0 2006.229.18:02:18.10#ibcon#enter sib2, iclass 14, count 0 2006.229.18:02:18.10#ibcon#flushed, iclass 14, count 0 2006.229.18:02:18.10#ibcon#about to write, iclass 14, count 0 2006.229.18:02:18.10#ibcon#wrote, iclass 14, count 0 2006.229.18:02:18.10#ibcon#about to read 3, iclass 14, count 0 2006.229.18:02:18.12#ibcon#read 3, iclass 14, count 0 2006.229.18:02:18.12#ibcon#about to read 4, iclass 14, count 0 2006.229.18:02:18.12#ibcon#read 4, iclass 14, count 0 2006.229.18:02:18.12#ibcon#about to read 5, iclass 14, count 0 2006.229.18:02:18.12#ibcon#read 5, iclass 14, count 0 2006.229.18:02:18.12#ibcon#about to read 6, iclass 14, count 0 2006.229.18:02:18.12#ibcon#read 6, iclass 14, count 0 2006.229.18:02:18.12#ibcon#end of sib2, iclass 14, count 0 2006.229.18:02:18.12#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:02:18.12#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:02:18.12#ibcon#[27=USB\r\n] 2006.229.18:02:18.12#ibcon#*before write, iclass 14, count 0 2006.229.18:02:18.12#ibcon#enter sib2, iclass 14, count 0 2006.229.18:02:18.12#ibcon#flushed, iclass 14, count 0 2006.229.18:02:18.12#ibcon#about to write, iclass 14, count 0 2006.229.18:02:18.12#ibcon#wrote, iclass 14, count 0 2006.229.18:02:18.12#ibcon#about to read 3, iclass 14, count 0 2006.229.18:02:18.15#ibcon#read 3, iclass 14, count 0 2006.229.18:02:18.15#ibcon#about to read 4, iclass 14, count 0 2006.229.18:02:18.15#ibcon#read 4, iclass 14, count 0 2006.229.18:02:18.15#ibcon#about to read 5, iclass 14, count 0 2006.229.18:02:18.15#ibcon#read 5, iclass 14, count 0 2006.229.18:02:18.15#ibcon#about to read 6, iclass 14, count 0 2006.229.18:02:18.15#ibcon#read 6, iclass 14, count 0 2006.229.18:02:18.15#ibcon#end of sib2, iclass 14, count 0 2006.229.18:02:18.15#ibcon#*after write, iclass 14, count 0 2006.229.18:02:18.15#ibcon#*before return 0, iclass 14, count 0 2006.229.18:02:18.15#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:18.15#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:02:18.15#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:02:18.15#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:02:18.15$vck44/vblo=8,744.99 2006.229.18:02:18.15#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.18:02:18.15#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.18:02:18.15#ibcon#ireg 17 cls_cnt 0 2006.229.18:02:18.15#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:18.15#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:18.15#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:18.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:02:18.15#ibcon#first serial, iclass 16, count 0 2006.229.18:02:18.15#ibcon#enter sib2, iclass 16, count 0 2006.229.18:02:18.15#ibcon#flushed, iclass 16, count 0 2006.229.18:02:18.15#ibcon#about to write, iclass 16, count 0 2006.229.18:02:18.15#ibcon#wrote, iclass 16, count 0 2006.229.18:02:18.15#ibcon#about to read 3, iclass 16, count 0 2006.229.18:02:18.17#ibcon#read 3, iclass 16, count 0 2006.229.18:02:18.17#ibcon#about to read 4, iclass 16, count 0 2006.229.18:02:18.17#ibcon#read 4, iclass 16, count 0 2006.229.18:02:18.17#ibcon#about to read 5, iclass 16, count 0 2006.229.18:02:18.17#ibcon#read 5, iclass 16, count 0 2006.229.18:02:18.17#ibcon#about to read 6, iclass 16, count 0 2006.229.18:02:18.17#ibcon#read 6, iclass 16, count 0 2006.229.18:02:18.17#ibcon#end of sib2, iclass 16, count 0 2006.229.18:02:18.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:02:18.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:02:18.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:02:18.17#ibcon#*before write, iclass 16, count 0 2006.229.18:02:18.17#ibcon#enter sib2, iclass 16, count 0 2006.229.18:02:18.17#ibcon#flushed, iclass 16, count 0 2006.229.18:02:18.17#ibcon#about to write, iclass 16, count 0 2006.229.18:02:18.17#ibcon#wrote, iclass 16, count 0 2006.229.18:02:18.17#ibcon#about to read 3, iclass 16, count 0 2006.229.18:02:18.21#ibcon#read 3, iclass 16, count 0 2006.229.18:02:18.21#ibcon#about to read 4, iclass 16, count 0 2006.229.18:02:18.21#ibcon#read 4, iclass 16, count 0 2006.229.18:02:18.21#ibcon#about to read 5, iclass 16, count 0 2006.229.18:02:18.21#ibcon#read 5, iclass 16, count 0 2006.229.18:02:18.21#ibcon#about to read 6, iclass 16, count 0 2006.229.18:02:18.21#ibcon#read 6, iclass 16, count 0 2006.229.18:02:18.21#ibcon#end of sib2, iclass 16, count 0 2006.229.18:02:18.21#ibcon#*after write, iclass 16, count 0 2006.229.18:02:18.21#ibcon#*before return 0, iclass 16, count 0 2006.229.18:02:18.21#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:18.21#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:02:18.21#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:02:18.21#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:02:18.21$vck44/vb=8,4 2006.229.18:02:18.21#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.18:02:18.21#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.18:02:18.21#ibcon#ireg 11 cls_cnt 2 2006.229.18:02:18.21#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:18.27#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:18.27#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:18.27#ibcon#enter wrdev, iclass 18, count 2 2006.229.18:02:18.27#ibcon#first serial, iclass 18, count 2 2006.229.18:02:18.27#ibcon#enter sib2, iclass 18, count 2 2006.229.18:02:18.27#ibcon#flushed, iclass 18, count 2 2006.229.18:02:18.27#ibcon#about to write, iclass 18, count 2 2006.229.18:02:18.27#ibcon#wrote, iclass 18, count 2 2006.229.18:02:18.27#ibcon#about to read 3, iclass 18, count 2 2006.229.18:02:18.29#ibcon#read 3, iclass 18, count 2 2006.229.18:02:18.29#ibcon#about to read 4, iclass 18, count 2 2006.229.18:02:18.29#ibcon#read 4, iclass 18, count 2 2006.229.18:02:18.29#ibcon#about to read 5, iclass 18, count 2 2006.229.18:02:18.29#ibcon#read 5, iclass 18, count 2 2006.229.18:02:18.29#ibcon#about to read 6, iclass 18, count 2 2006.229.18:02:18.29#ibcon#read 6, iclass 18, count 2 2006.229.18:02:18.29#ibcon#end of sib2, iclass 18, count 2 2006.229.18:02:18.29#ibcon#*mode == 0, iclass 18, count 2 2006.229.18:02:18.29#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.18:02:18.29#ibcon#[27=AT08-04\r\n] 2006.229.18:02:18.29#ibcon#*before write, iclass 18, count 2 2006.229.18:02:18.29#ibcon#enter sib2, iclass 18, count 2 2006.229.18:02:18.29#ibcon#flushed, iclass 18, count 2 2006.229.18:02:18.29#ibcon#about to write, iclass 18, count 2 2006.229.18:02:18.29#ibcon#wrote, iclass 18, count 2 2006.229.18:02:18.29#ibcon#about to read 3, iclass 18, count 2 2006.229.18:02:18.32#ibcon#read 3, iclass 18, count 2 2006.229.18:02:18.32#ibcon#about to read 4, iclass 18, count 2 2006.229.18:02:18.32#ibcon#read 4, iclass 18, count 2 2006.229.18:02:18.32#ibcon#about to read 5, iclass 18, count 2 2006.229.18:02:18.32#ibcon#read 5, iclass 18, count 2 2006.229.18:02:18.32#ibcon#about to read 6, iclass 18, count 2 2006.229.18:02:18.32#ibcon#read 6, iclass 18, count 2 2006.229.18:02:18.32#ibcon#end of sib2, iclass 18, count 2 2006.229.18:02:18.32#ibcon#*after write, iclass 18, count 2 2006.229.18:02:18.32#ibcon#*before return 0, iclass 18, count 2 2006.229.18:02:18.32#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:18.32#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:02:18.32#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.18:02:18.32#ibcon#ireg 7 cls_cnt 0 2006.229.18:02:18.32#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:18.44#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:18.44#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:18.44#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:02:18.44#ibcon#first serial, iclass 18, count 0 2006.229.18:02:18.44#ibcon#enter sib2, iclass 18, count 0 2006.229.18:02:18.44#ibcon#flushed, iclass 18, count 0 2006.229.18:02:18.44#ibcon#about to write, iclass 18, count 0 2006.229.18:02:18.44#ibcon#wrote, iclass 18, count 0 2006.229.18:02:18.44#ibcon#about to read 3, iclass 18, count 0 2006.229.18:02:18.46#ibcon#read 3, iclass 18, count 0 2006.229.18:02:18.46#ibcon#about to read 4, iclass 18, count 0 2006.229.18:02:18.46#ibcon#read 4, iclass 18, count 0 2006.229.18:02:18.46#ibcon#about to read 5, iclass 18, count 0 2006.229.18:02:18.46#ibcon#read 5, iclass 18, count 0 2006.229.18:02:18.46#ibcon#about to read 6, iclass 18, count 0 2006.229.18:02:18.46#ibcon#read 6, iclass 18, count 0 2006.229.18:02:18.46#ibcon#end of sib2, iclass 18, count 0 2006.229.18:02:18.46#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:02:18.46#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:02:18.46#ibcon#[27=USB\r\n] 2006.229.18:02:18.46#ibcon#*before write, iclass 18, count 0 2006.229.18:02:18.46#ibcon#enter sib2, iclass 18, count 0 2006.229.18:02:18.46#ibcon#flushed, iclass 18, count 0 2006.229.18:02:18.46#ibcon#about to write, iclass 18, count 0 2006.229.18:02:18.46#ibcon#wrote, iclass 18, count 0 2006.229.18:02:18.46#ibcon#about to read 3, iclass 18, count 0 2006.229.18:02:18.49#ibcon#read 3, iclass 18, count 0 2006.229.18:02:18.49#ibcon#about to read 4, iclass 18, count 0 2006.229.18:02:18.49#ibcon#read 4, iclass 18, count 0 2006.229.18:02:18.49#ibcon#about to read 5, iclass 18, count 0 2006.229.18:02:18.49#ibcon#read 5, iclass 18, count 0 2006.229.18:02:18.49#ibcon#about to read 6, iclass 18, count 0 2006.229.18:02:18.49#ibcon#read 6, iclass 18, count 0 2006.229.18:02:18.49#ibcon#end of sib2, iclass 18, count 0 2006.229.18:02:18.49#ibcon#*after write, iclass 18, count 0 2006.229.18:02:18.49#ibcon#*before return 0, iclass 18, count 0 2006.229.18:02:18.49#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:18.49#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:02:18.49#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:02:18.49#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:02:18.49$vck44/vabw=wide 2006.229.18:02:18.49#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.18:02:18.49#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.18:02:18.49#ibcon#ireg 8 cls_cnt 0 2006.229.18:02:18.49#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:18.49#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:18.49#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:18.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:02:18.49#ibcon#first serial, iclass 20, count 0 2006.229.18:02:18.49#ibcon#enter sib2, iclass 20, count 0 2006.229.18:02:18.49#ibcon#flushed, iclass 20, count 0 2006.229.18:02:18.49#ibcon#about to write, iclass 20, count 0 2006.229.18:02:18.49#ibcon#wrote, iclass 20, count 0 2006.229.18:02:18.49#ibcon#about to read 3, iclass 20, count 0 2006.229.18:02:18.51#ibcon#read 3, iclass 20, count 0 2006.229.18:02:18.51#ibcon#about to read 4, iclass 20, count 0 2006.229.18:02:18.51#ibcon#read 4, iclass 20, count 0 2006.229.18:02:18.51#ibcon#about to read 5, iclass 20, count 0 2006.229.18:02:18.51#ibcon#read 5, iclass 20, count 0 2006.229.18:02:18.51#ibcon#about to read 6, iclass 20, count 0 2006.229.18:02:18.51#ibcon#read 6, iclass 20, count 0 2006.229.18:02:18.51#ibcon#end of sib2, iclass 20, count 0 2006.229.18:02:18.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:02:18.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:02:18.51#ibcon#[25=BW32\r\n] 2006.229.18:02:18.51#ibcon#*before write, iclass 20, count 0 2006.229.18:02:18.51#ibcon#enter sib2, iclass 20, count 0 2006.229.18:02:18.51#ibcon#flushed, iclass 20, count 0 2006.229.18:02:18.51#ibcon#about to write, iclass 20, count 0 2006.229.18:02:18.51#ibcon#wrote, iclass 20, count 0 2006.229.18:02:18.51#ibcon#about to read 3, iclass 20, count 0 2006.229.18:02:18.54#ibcon#read 3, iclass 20, count 0 2006.229.18:02:18.54#ibcon#about to read 4, iclass 20, count 0 2006.229.18:02:18.54#ibcon#read 4, iclass 20, count 0 2006.229.18:02:18.54#ibcon#about to read 5, iclass 20, count 0 2006.229.18:02:18.54#ibcon#read 5, iclass 20, count 0 2006.229.18:02:18.54#ibcon#about to read 6, iclass 20, count 0 2006.229.18:02:18.54#ibcon#read 6, iclass 20, count 0 2006.229.18:02:18.54#ibcon#end of sib2, iclass 20, count 0 2006.229.18:02:18.54#ibcon#*after write, iclass 20, count 0 2006.229.18:02:18.54#ibcon#*before return 0, iclass 20, count 0 2006.229.18:02:18.54#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:18.54#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:02:18.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:02:18.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:02:18.54$vck44/vbbw=wide 2006.229.18:02:18.54#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.18:02:18.54#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.18:02:18.54#ibcon#ireg 8 cls_cnt 0 2006.229.18:02:18.54#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:02:18.61#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:02:18.61#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:02:18.61#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:02:18.61#ibcon#first serial, iclass 22, count 0 2006.229.18:02:18.61#ibcon#enter sib2, iclass 22, count 0 2006.229.18:02:18.61#ibcon#flushed, iclass 22, count 0 2006.229.18:02:18.61#ibcon#about to write, iclass 22, count 0 2006.229.18:02:18.61#ibcon#wrote, iclass 22, count 0 2006.229.18:02:18.61#ibcon#about to read 3, iclass 22, count 0 2006.229.18:02:18.63#ibcon#read 3, iclass 22, count 0 2006.229.18:02:18.63#ibcon#about to read 4, iclass 22, count 0 2006.229.18:02:18.63#ibcon#read 4, iclass 22, count 0 2006.229.18:02:18.63#ibcon#about to read 5, iclass 22, count 0 2006.229.18:02:18.63#ibcon#read 5, iclass 22, count 0 2006.229.18:02:18.63#ibcon#about to read 6, iclass 22, count 0 2006.229.18:02:18.63#ibcon#read 6, iclass 22, count 0 2006.229.18:02:18.63#ibcon#end of sib2, iclass 22, count 0 2006.229.18:02:18.63#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:02:18.63#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:02:18.63#ibcon#[27=BW32\r\n] 2006.229.18:02:18.63#ibcon#*before write, iclass 22, count 0 2006.229.18:02:18.63#ibcon#enter sib2, iclass 22, count 0 2006.229.18:02:18.63#ibcon#flushed, iclass 22, count 0 2006.229.18:02:18.63#ibcon#about to write, iclass 22, count 0 2006.229.18:02:18.63#ibcon#wrote, iclass 22, count 0 2006.229.18:02:18.63#ibcon#about to read 3, iclass 22, count 0 2006.229.18:02:18.66#ibcon#read 3, iclass 22, count 0 2006.229.18:02:18.66#ibcon#about to read 4, iclass 22, count 0 2006.229.18:02:18.66#ibcon#read 4, iclass 22, count 0 2006.229.18:02:18.66#ibcon#about to read 5, iclass 22, count 0 2006.229.18:02:18.66#ibcon#read 5, iclass 22, count 0 2006.229.18:02:18.66#ibcon#about to read 6, iclass 22, count 0 2006.229.18:02:18.66#ibcon#read 6, iclass 22, count 0 2006.229.18:02:18.66#ibcon#end of sib2, iclass 22, count 0 2006.229.18:02:18.66#ibcon#*after write, iclass 22, count 0 2006.229.18:02:18.66#ibcon#*before return 0, iclass 22, count 0 2006.229.18:02:18.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:02:18.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:02:18.66#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:02:18.66#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:02:18.66$setupk4/ifdk4 2006.229.18:02:18.66$ifdk4/lo= 2006.229.18:02:18.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:02:18.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:02:18.66$ifdk4/patch= 2006.229.18:02:18.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:02:18.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:02:18.66$setupk4/!*+20s 2006.229.18:02:20.92#abcon#<5=/08 0.5 1.6 26.651001001.4\r\n> 2006.229.18:02:20.94#abcon#{5=INTERFACE CLEAR} 2006.229.18:02:21.00#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:02:25.14#trakl#Source acquired 2006.229.18:02:27.14#flagr#flagr/antenna,acquired 2006.229.18:02:31.09#abcon#<5=/08 0.4 1.6 26.641001001.4\r\n> 2006.229.18:02:31.11#abcon#{5=INTERFACE CLEAR} 2006.229.18:02:31.17#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:02:33.17$setupk4/"tpicd 2006.229.18:02:33.17$setupk4/echo=off 2006.229.18:02:33.17$setupk4/xlog=off 2006.229.18:02:33.17:!2006.229.18:06:29 2006.229.18:06:29.00:preob 2006.229.18:06:29.13/onsource/TRACKING 2006.229.18:06:29.13:!2006.229.18:06:39 2006.229.18:06:39.00:"tape 2006.229.18:06:39.00:"st=record 2006.229.18:06:39.00:data_valid=on 2006.229.18:06:39.00:midob 2006.229.18:06:39.13/onsource/TRACKING 2006.229.18:06:39.13/wx/26.57,1001.4,100 2006.229.18:06:39.34/cable/+6.4174E-03 2006.229.18:06:40.43/va/01,08,usb,yes,35,37 2006.229.18:06:40.43/va/02,07,usb,yes,37,38 2006.229.18:06:40.43/va/03,06,usb,yes,46,49 2006.229.18:06:40.43/va/04,07,usb,yes,39,41 2006.229.18:06:40.43/va/05,04,usb,yes,35,35 2006.229.18:06:40.43/va/06,04,usb,yes,39,38 2006.229.18:06:40.43/va/07,05,usb,yes,34,35 2006.229.18:06:40.43/va/08,06,usb,yes,25,31 2006.229.18:06:40.66/valo/01,524.99,yes,locked 2006.229.18:06:40.66/valo/02,534.99,yes,locked 2006.229.18:06:40.66/valo/03,564.99,yes,locked 2006.229.18:06:40.66/valo/04,624.99,yes,locked 2006.229.18:06:40.66/valo/05,734.99,yes,locked 2006.229.18:06:40.66/valo/06,814.99,yes,locked 2006.229.18:06:40.66/valo/07,864.99,yes,locked 2006.229.18:06:40.66/valo/08,884.99,yes,locked 2006.229.18:06:41.75/vb/01,04,usb,yes,44,31 2006.229.18:06:41.75/vb/02,04,usb,yes,37,44 2006.229.18:06:41.75/vb/03,04,usb,yes,31,38 2006.229.18:06:41.75/vb/04,04,usb,yes,35,34 2006.229.18:06:41.75/vb/05,04,usb,yes,28,30 2006.229.18:06:41.75/vb/06,04,usb,yes,32,28 2006.229.18:06:41.75/vb/07,04,usb,yes,32,32 2006.229.18:06:41.75/vb/08,04,usb,yes,29,33 2006.229.18:06:41.98/vblo/01,629.99,yes,locked 2006.229.18:06:41.98/vblo/02,634.99,yes,locked 2006.229.18:06:41.98/vblo/03,649.99,yes,locked 2006.229.18:06:41.98/vblo/04,679.99,yes,locked 2006.229.18:06:41.98/vblo/05,709.99,yes,locked 2006.229.18:06:41.98/vblo/06,719.99,yes,locked 2006.229.18:06:41.98/vblo/07,734.99,yes,locked 2006.229.18:06:41.98/vblo/08,744.99,yes,locked 2006.229.18:06:42.13/vabw/8 2006.229.18:06:42.28/vbbw/8 2006.229.18:06:42.39/xfe/off,on,12.2 2006.229.18:06:42.76/ifatt/23,28,28,28 2006.229.18:06:43.08/fmout-gps/S +4.55E-07 2006.229.18:06:43.12:!2006.229.18:09:39 2006.229.18:09:39.00:data_valid=off 2006.229.18:09:39.00:"et 2006.229.18:09:39.00:!+3s 2006.229.18:09:42.01:"tape 2006.229.18:09:42.01:postob 2006.229.18:09:42.21/cable/+6.4162E-03 2006.229.18:09:42.21/wx/26.54,1001.4,100 2006.229.18:09:43.08/fmout-gps/S +4.53E-07 2006.229.18:09:43.08:scan_name=229-1812,jd0608,170 2006.229.18:09:43.08:source=2201+315,220314.98,314538.3,2000.0,ccw 2006.229.18:09:43.14#flagr#flagr/antenna,new-source 2006.229.18:09:44.14:checkk5 2006.229.18:09:44.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:09:44.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:09:45.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:09:45.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:09:46.13/chk_obsdata//k5ts1/T2291806??a.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.18:09:46.53/chk_obsdata//k5ts2/T2291806??b.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.18:09:46.93/chk_obsdata//k5ts3/T2291806??c.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.18:09:47.35/chk_obsdata//k5ts4/T2291806??d.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.18:09:48.08/k5log//k5ts1_log_newline 2006.229.18:09:48.79/k5log//k5ts2_log_newline 2006.229.18:09:49.51/k5log//k5ts3_log_newline 2006.229.18:09:50.24/k5log//k5ts4_log_newline 2006.229.18:09:50.27/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:09:50.27:setupk4=1 2006.229.18:09:50.27$setupk4/echo=on 2006.229.18:09:50.27$setupk4/pcalon 2006.229.18:09:50.27$pcalon/"no phase cal control is implemented here 2006.229.18:09:50.27$setupk4/"tpicd=stop 2006.229.18:09:50.27$setupk4/"rec=synch_on 2006.229.18:09:50.27$setupk4/"rec_mode=128 2006.229.18:09:50.27$setupk4/!* 2006.229.18:09:50.27$setupk4/recpk4 2006.229.18:09:50.27$recpk4/recpatch= 2006.229.18:09:50.28$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:09:50.28$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:09:50.28$setupk4/vck44 2006.229.18:09:50.28$vck44/valo=1,524.99 2006.229.18:09:50.28#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.18:09:50.28#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.18:09:50.28#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:50.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:50.28#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:50.28#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:50.28#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:09:50.28#ibcon#first serial, iclass 27, count 0 2006.229.18:09:50.28#ibcon#enter sib2, iclass 27, count 0 2006.229.18:09:50.28#ibcon#flushed, iclass 27, count 0 2006.229.18:09:50.28#ibcon#about to write, iclass 27, count 0 2006.229.18:09:50.28#ibcon#wrote, iclass 27, count 0 2006.229.18:09:50.28#ibcon#about to read 3, iclass 27, count 0 2006.229.18:09:50.29#ibcon#read 3, iclass 27, count 0 2006.229.18:09:50.29#ibcon#about to read 4, iclass 27, count 0 2006.229.18:09:50.29#ibcon#read 4, iclass 27, count 0 2006.229.18:09:50.29#ibcon#about to read 5, iclass 27, count 0 2006.229.18:09:50.29#ibcon#read 5, iclass 27, count 0 2006.229.18:09:50.29#ibcon#about to read 6, iclass 27, count 0 2006.229.18:09:50.29#ibcon#read 6, iclass 27, count 0 2006.229.18:09:50.29#ibcon#end of sib2, iclass 27, count 0 2006.229.18:09:50.29#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:09:50.29#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:09:50.29#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:09:50.29#ibcon#*before write, iclass 27, count 0 2006.229.18:09:50.29#ibcon#enter sib2, iclass 27, count 0 2006.229.18:09:50.29#ibcon#flushed, iclass 27, count 0 2006.229.18:09:50.29#ibcon#about to write, iclass 27, count 0 2006.229.18:09:50.29#ibcon#wrote, iclass 27, count 0 2006.229.18:09:50.29#ibcon#about to read 3, iclass 27, count 0 2006.229.18:09:50.34#ibcon#read 3, iclass 27, count 0 2006.229.18:09:50.34#ibcon#about to read 4, iclass 27, count 0 2006.229.18:09:50.34#ibcon#read 4, iclass 27, count 0 2006.229.18:09:50.34#ibcon#about to read 5, iclass 27, count 0 2006.229.18:09:50.34#ibcon#read 5, iclass 27, count 0 2006.229.18:09:50.34#ibcon#about to read 6, iclass 27, count 0 2006.229.18:09:50.34#ibcon#read 6, iclass 27, count 0 2006.229.18:09:50.34#ibcon#end of sib2, iclass 27, count 0 2006.229.18:09:50.34#ibcon#*after write, iclass 27, count 0 2006.229.18:09:50.34#ibcon#*before return 0, iclass 27, count 0 2006.229.18:09:50.34#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:50.34#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:50.34#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:09:50.34#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:09:50.34$vck44/va=1,8 2006.229.18:09:50.34#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.18:09:50.34#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.18:09:50.34#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:50.34#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:50.34#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:50.34#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:50.34#ibcon#enter wrdev, iclass 29, count 2 2006.229.18:09:50.34#ibcon#first serial, iclass 29, count 2 2006.229.18:09:50.34#ibcon#enter sib2, iclass 29, count 2 2006.229.18:09:50.34#ibcon#flushed, iclass 29, count 2 2006.229.18:09:50.34#ibcon#about to write, iclass 29, count 2 2006.229.18:09:50.34#ibcon#wrote, iclass 29, count 2 2006.229.18:09:50.34#ibcon#about to read 3, iclass 29, count 2 2006.229.18:09:50.36#ibcon#read 3, iclass 29, count 2 2006.229.18:09:50.36#ibcon#about to read 4, iclass 29, count 2 2006.229.18:09:50.36#ibcon#read 4, iclass 29, count 2 2006.229.18:09:50.36#ibcon#about to read 5, iclass 29, count 2 2006.229.18:09:50.36#ibcon#read 5, iclass 29, count 2 2006.229.18:09:50.36#ibcon#about to read 6, iclass 29, count 2 2006.229.18:09:50.36#ibcon#read 6, iclass 29, count 2 2006.229.18:09:50.36#ibcon#end of sib2, iclass 29, count 2 2006.229.18:09:50.36#ibcon#*mode == 0, iclass 29, count 2 2006.229.18:09:50.36#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.18:09:50.36#ibcon#[25=AT01-08\r\n] 2006.229.18:09:50.36#ibcon#*before write, iclass 29, count 2 2006.229.18:09:50.36#ibcon#enter sib2, iclass 29, count 2 2006.229.18:09:50.36#ibcon#flushed, iclass 29, count 2 2006.229.18:09:50.36#ibcon#about to write, iclass 29, count 2 2006.229.18:09:50.36#ibcon#wrote, iclass 29, count 2 2006.229.18:09:50.36#ibcon#about to read 3, iclass 29, count 2 2006.229.18:09:50.39#ibcon#read 3, iclass 29, count 2 2006.229.18:09:50.39#ibcon#about to read 4, iclass 29, count 2 2006.229.18:09:50.39#ibcon#read 4, iclass 29, count 2 2006.229.18:09:50.39#ibcon#about to read 5, iclass 29, count 2 2006.229.18:09:50.39#ibcon#read 5, iclass 29, count 2 2006.229.18:09:50.39#ibcon#about to read 6, iclass 29, count 2 2006.229.18:09:50.39#ibcon#read 6, iclass 29, count 2 2006.229.18:09:50.39#ibcon#end of sib2, iclass 29, count 2 2006.229.18:09:50.39#ibcon#*after write, iclass 29, count 2 2006.229.18:09:50.39#ibcon#*before return 0, iclass 29, count 2 2006.229.18:09:50.39#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:50.39#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:50.39#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.18:09:50.39#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:50.39#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:50.51#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:50.51#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:50.51#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:09:50.51#ibcon#first serial, iclass 29, count 0 2006.229.18:09:50.51#ibcon#enter sib2, iclass 29, count 0 2006.229.18:09:50.51#ibcon#flushed, iclass 29, count 0 2006.229.18:09:50.51#ibcon#about to write, iclass 29, count 0 2006.229.18:09:50.51#ibcon#wrote, iclass 29, count 0 2006.229.18:09:50.51#ibcon#about to read 3, iclass 29, count 0 2006.229.18:09:50.53#ibcon#read 3, iclass 29, count 0 2006.229.18:09:50.53#ibcon#about to read 4, iclass 29, count 0 2006.229.18:09:50.53#ibcon#read 4, iclass 29, count 0 2006.229.18:09:50.53#ibcon#about to read 5, iclass 29, count 0 2006.229.18:09:50.53#ibcon#read 5, iclass 29, count 0 2006.229.18:09:50.53#ibcon#about to read 6, iclass 29, count 0 2006.229.18:09:50.53#ibcon#read 6, iclass 29, count 0 2006.229.18:09:50.53#ibcon#end of sib2, iclass 29, count 0 2006.229.18:09:50.53#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:09:50.53#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:09:50.53#ibcon#[25=USB\r\n] 2006.229.18:09:50.53#ibcon#*before write, iclass 29, count 0 2006.229.18:09:50.53#ibcon#enter sib2, iclass 29, count 0 2006.229.18:09:50.53#ibcon#flushed, iclass 29, count 0 2006.229.18:09:50.53#ibcon#about to write, iclass 29, count 0 2006.229.18:09:50.53#ibcon#wrote, iclass 29, count 0 2006.229.18:09:50.53#ibcon#about to read 3, iclass 29, count 0 2006.229.18:09:50.56#ibcon#read 3, iclass 29, count 0 2006.229.18:09:50.56#ibcon#about to read 4, iclass 29, count 0 2006.229.18:09:50.56#ibcon#read 4, iclass 29, count 0 2006.229.18:09:50.56#ibcon#about to read 5, iclass 29, count 0 2006.229.18:09:50.56#ibcon#read 5, iclass 29, count 0 2006.229.18:09:50.56#ibcon#about to read 6, iclass 29, count 0 2006.229.18:09:50.56#ibcon#read 6, iclass 29, count 0 2006.229.18:09:50.56#ibcon#end of sib2, iclass 29, count 0 2006.229.18:09:50.56#ibcon#*after write, iclass 29, count 0 2006.229.18:09:50.56#ibcon#*before return 0, iclass 29, count 0 2006.229.18:09:50.56#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:50.56#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:50.56#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:09:50.56#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:09:50.56$vck44/valo=2,534.99 2006.229.18:09:50.56#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.18:09:50.56#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.18:09:50.56#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:50.56#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:50.56#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:50.56#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:50.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:09:50.56#ibcon#first serial, iclass 31, count 0 2006.229.18:09:50.56#ibcon#enter sib2, iclass 31, count 0 2006.229.18:09:50.56#ibcon#flushed, iclass 31, count 0 2006.229.18:09:50.56#ibcon#about to write, iclass 31, count 0 2006.229.18:09:50.56#ibcon#wrote, iclass 31, count 0 2006.229.18:09:50.56#ibcon#about to read 3, iclass 31, count 0 2006.229.18:09:50.58#ibcon#read 3, iclass 31, count 0 2006.229.18:09:50.58#ibcon#about to read 4, iclass 31, count 0 2006.229.18:09:50.58#ibcon#read 4, iclass 31, count 0 2006.229.18:09:50.58#ibcon#about to read 5, iclass 31, count 0 2006.229.18:09:50.58#ibcon#read 5, iclass 31, count 0 2006.229.18:09:50.58#ibcon#about to read 6, iclass 31, count 0 2006.229.18:09:50.58#ibcon#read 6, iclass 31, count 0 2006.229.18:09:50.58#ibcon#end of sib2, iclass 31, count 0 2006.229.18:09:50.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:09:50.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:09:50.58#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:09:50.58#ibcon#*before write, iclass 31, count 0 2006.229.18:09:50.58#ibcon#enter sib2, iclass 31, count 0 2006.229.18:09:50.58#ibcon#flushed, iclass 31, count 0 2006.229.18:09:50.58#ibcon#about to write, iclass 31, count 0 2006.229.18:09:50.58#ibcon#wrote, iclass 31, count 0 2006.229.18:09:50.58#ibcon#about to read 3, iclass 31, count 0 2006.229.18:09:50.62#ibcon#read 3, iclass 31, count 0 2006.229.18:09:50.62#ibcon#about to read 4, iclass 31, count 0 2006.229.18:09:50.62#ibcon#read 4, iclass 31, count 0 2006.229.18:09:50.62#ibcon#about to read 5, iclass 31, count 0 2006.229.18:09:50.62#ibcon#read 5, iclass 31, count 0 2006.229.18:09:50.62#ibcon#about to read 6, iclass 31, count 0 2006.229.18:09:50.62#ibcon#read 6, iclass 31, count 0 2006.229.18:09:50.62#ibcon#end of sib2, iclass 31, count 0 2006.229.18:09:50.62#ibcon#*after write, iclass 31, count 0 2006.229.18:09:50.62#ibcon#*before return 0, iclass 31, count 0 2006.229.18:09:50.62#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:50.62#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:50.62#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:09:50.62#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:09:50.62$vck44/va=2,7 2006.229.18:09:50.62#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.18:09:50.62#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.18:09:50.62#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:50.62#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:50.68#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:50.68#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:50.68#ibcon#enter wrdev, iclass 33, count 2 2006.229.18:09:50.68#ibcon#first serial, iclass 33, count 2 2006.229.18:09:50.68#ibcon#enter sib2, iclass 33, count 2 2006.229.18:09:50.68#ibcon#flushed, iclass 33, count 2 2006.229.18:09:50.68#ibcon#about to write, iclass 33, count 2 2006.229.18:09:50.68#ibcon#wrote, iclass 33, count 2 2006.229.18:09:50.68#ibcon#about to read 3, iclass 33, count 2 2006.229.18:09:50.70#ibcon#read 3, iclass 33, count 2 2006.229.18:09:50.70#ibcon#about to read 4, iclass 33, count 2 2006.229.18:09:50.70#ibcon#read 4, iclass 33, count 2 2006.229.18:09:50.70#ibcon#about to read 5, iclass 33, count 2 2006.229.18:09:50.70#ibcon#read 5, iclass 33, count 2 2006.229.18:09:50.70#ibcon#about to read 6, iclass 33, count 2 2006.229.18:09:50.70#ibcon#read 6, iclass 33, count 2 2006.229.18:09:50.70#ibcon#end of sib2, iclass 33, count 2 2006.229.18:09:50.70#ibcon#*mode == 0, iclass 33, count 2 2006.229.18:09:50.70#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.18:09:50.70#ibcon#[25=AT02-07\r\n] 2006.229.18:09:50.70#ibcon#*before write, iclass 33, count 2 2006.229.18:09:50.70#ibcon#enter sib2, iclass 33, count 2 2006.229.18:09:50.70#ibcon#flushed, iclass 33, count 2 2006.229.18:09:50.70#ibcon#about to write, iclass 33, count 2 2006.229.18:09:50.70#ibcon#wrote, iclass 33, count 2 2006.229.18:09:50.70#ibcon#about to read 3, iclass 33, count 2 2006.229.18:09:50.73#ibcon#read 3, iclass 33, count 2 2006.229.18:09:50.73#ibcon#about to read 4, iclass 33, count 2 2006.229.18:09:50.73#ibcon#read 4, iclass 33, count 2 2006.229.18:09:50.73#ibcon#about to read 5, iclass 33, count 2 2006.229.18:09:50.73#ibcon#read 5, iclass 33, count 2 2006.229.18:09:50.73#ibcon#about to read 6, iclass 33, count 2 2006.229.18:09:50.73#ibcon#read 6, iclass 33, count 2 2006.229.18:09:50.73#ibcon#end of sib2, iclass 33, count 2 2006.229.18:09:50.73#ibcon#*after write, iclass 33, count 2 2006.229.18:09:50.73#ibcon#*before return 0, iclass 33, count 2 2006.229.18:09:50.73#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:50.73#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:50.73#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.18:09:50.73#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:50.73#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:50.85#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:50.85#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:50.85#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:09:50.85#ibcon#first serial, iclass 33, count 0 2006.229.18:09:50.85#ibcon#enter sib2, iclass 33, count 0 2006.229.18:09:50.85#ibcon#flushed, iclass 33, count 0 2006.229.18:09:50.85#ibcon#about to write, iclass 33, count 0 2006.229.18:09:50.85#ibcon#wrote, iclass 33, count 0 2006.229.18:09:50.85#ibcon#about to read 3, iclass 33, count 0 2006.229.18:09:50.87#ibcon#read 3, iclass 33, count 0 2006.229.18:09:50.87#ibcon#about to read 4, iclass 33, count 0 2006.229.18:09:50.87#ibcon#read 4, iclass 33, count 0 2006.229.18:09:50.87#ibcon#about to read 5, iclass 33, count 0 2006.229.18:09:50.87#ibcon#read 5, iclass 33, count 0 2006.229.18:09:50.87#ibcon#about to read 6, iclass 33, count 0 2006.229.18:09:50.87#ibcon#read 6, iclass 33, count 0 2006.229.18:09:50.87#ibcon#end of sib2, iclass 33, count 0 2006.229.18:09:50.87#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:09:50.87#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:09:50.87#ibcon#[25=USB\r\n] 2006.229.18:09:50.87#ibcon#*before write, iclass 33, count 0 2006.229.18:09:50.87#ibcon#enter sib2, iclass 33, count 0 2006.229.18:09:50.87#ibcon#flushed, iclass 33, count 0 2006.229.18:09:50.87#ibcon#about to write, iclass 33, count 0 2006.229.18:09:50.87#ibcon#wrote, iclass 33, count 0 2006.229.18:09:50.87#ibcon#about to read 3, iclass 33, count 0 2006.229.18:09:50.90#ibcon#read 3, iclass 33, count 0 2006.229.18:09:50.90#ibcon#about to read 4, iclass 33, count 0 2006.229.18:09:50.90#ibcon#read 4, iclass 33, count 0 2006.229.18:09:50.90#ibcon#about to read 5, iclass 33, count 0 2006.229.18:09:50.90#ibcon#read 5, iclass 33, count 0 2006.229.18:09:50.90#ibcon#about to read 6, iclass 33, count 0 2006.229.18:09:50.90#ibcon#read 6, iclass 33, count 0 2006.229.18:09:50.90#ibcon#end of sib2, iclass 33, count 0 2006.229.18:09:50.90#ibcon#*after write, iclass 33, count 0 2006.229.18:09:50.90#ibcon#*before return 0, iclass 33, count 0 2006.229.18:09:50.90#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:50.90#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:50.90#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:09:50.90#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:09:50.90$vck44/valo=3,564.99 2006.229.18:09:50.90#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.18:09:50.90#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.18:09:50.90#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:50.90#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:50.90#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:50.90#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:50.90#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:09:50.90#ibcon#first serial, iclass 35, count 0 2006.229.18:09:50.90#ibcon#enter sib2, iclass 35, count 0 2006.229.18:09:50.90#ibcon#flushed, iclass 35, count 0 2006.229.18:09:50.90#ibcon#about to write, iclass 35, count 0 2006.229.18:09:50.90#ibcon#wrote, iclass 35, count 0 2006.229.18:09:50.90#ibcon#about to read 3, iclass 35, count 0 2006.229.18:09:50.92#ibcon#read 3, iclass 35, count 0 2006.229.18:09:50.92#ibcon#about to read 4, iclass 35, count 0 2006.229.18:09:50.92#ibcon#read 4, iclass 35, count 0 2006.229.18:09:50.92#ibcon#about to read 5, iclass 35, count 0 2006.229.18:09:50.92#ibcon#read 5, iclass 35, count 0 2006.229.18:09:50.92#ibcon#about to read 6, iclass 35, count 0 2006.229.18:09:50.92#ibcon#read 6, iclass 35, count 0 2006.229.18:09:50.92#ibcon#end of sib2, iclass 35, count 0 2006.229.18:09:50.92#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:09:50.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:09:50.92#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:09:50.92#ibcon#*before write, iclass 35, count 0 2006.229.18:09:50.92#ibcon#enter sib2, iclass 35, count 0 2006.229.18:09:50.92#ibcon#flushed, iclass 35, count 0 2006.229.18:09:50.92#ibcon#about to write, iclass 35, count 0 2006.229.18:09:50.92#ibcon#wrote, iclass 35, count 0 2006.229.18:09:50.92#ibcon#about to read 3, iclass 35, count 0 2006.229.18:09:50.96#ibcon#read 3, iclass 35, count 0 2006.229.18:09:50.96#ibcon#about to read 4, iclass 35, count 0 2006.229.18:09:50.96#ibcon#read 4, iclass 35, count 0 2006.229.18:09:50.96#ibcon#about to read 5, iclass 35, count 0 2006.229.18:09:50.96#ibcon#read 5, iclass 35, count 0 2006.229.18:09:50.96#ibcon#about to read 6, iclass 35, count 0 2006.229.18:09:50.96#ibcon#read 6, iclass 35, count 0 2006.229.18:09:50.96#ibcon#end of sib2, iclass 35, count 0 2006.229.18:09:50.96#ibcon#*after write, iclass 35, count 0 2006.229.18:09:50.96#ibcon#*before return 0, iclass 35, count 0 2006.229.18:09:50.96#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:50.96#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:50.96#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:09:50.96#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:09:50.96$vck44/va=3,6 2006.229.18:09:50.96#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.18:09:50.96#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.18:09:50.96#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:50.96#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:51.02#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:51.02#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:51.02#ibcon#enter wrdev, iclass 37, count 2 2006.229.18:09:51.02#ibcon#first serial, iclass 37, count 2 2006.229.18:09:51.02#ibcon#enter sib2, iclass 37, count 2 2006.229.18:09:51.02#ibcon#flushed, iclass 37, count 2 2006.229.18:09:51.02#ibcon#about to write, iclass 37, count 2 2006.229.18:09:51.02#ibcon#wrote, iclass 37, count 2 2006.229.18:09:51.02#ibcon#about to read 3, iclass 37, count 2 2006.229.18:09:51.04#ibcon#read 3, iclass 37, count 2 2006.229.18:09:51.04#ibcon#about to read 4, iclass 37, count 2 2006.229.18:09:51.04#ibcon#read 4, iclass 37, count 2 2006.229.18:09:51.04#ibcon#about to read 5, iclass 37, count 2 2006.229.18:09:51.04#ibcon#read 5, iclass 37, count 2 2006.229.18:09:51.04#ibcon#about to read 6, iclass 37, count 2 2006.229.18:09:51.04#ibcon#read 6, iclass 37, count 2 2006.229.18:09:51.04#ibcon#end of sib2, iclass 37, count 2 2006.229.18:09:51.04#ibcon#*mode == 0, iclass 37, count 2 2006.229.18:09:51.04#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.18:09:51.04#ibcon#[25=AT03-06\r\n] 2006.229.18:09:51.04#ibcon#*before write, iclass 37, count 2 2006.229.18:09:51.04#ibcon#enter sib2, iclass 37, count 2 2006.229.18:09:51.04#ibcon#flushed, iclass 37, count 2 2006.229.18:09:51.04#ibcon#about to write, iclass 37, count 2 2006.229.18:09:51.04#ibcon#wrote, iclass 37, count 2 2006.229.18:09:51.04#ibcon#about to read 3, iclass 37, count 2 2006.229.18:09:51.07#ibcon#read 3, iclass 37, count 2 2006.229.18:09:51.07#ibcon#about to read 4, iclass 37, count 2 2006.229.18:09:51.07#ibcon#read 4, iclass 37, count 2 2006.229.18:09:51.07#ibcon#about to read 5, iclass 37, count 2 2006.229.18:09:51.07#ibcon#read 5, iclass 37, count 2 2006.229.18:09:51.07#ibcon#about to read 6, iclass 37, count 2 2006.229.18:09:51.07#ibcon#read 6, iclass 37, count 2 2006.229.18:09:51.07#ibcon#end of sib2, iclass 37, count 2 2006.229.18:09:51.07#ibcon#*after write, iclass 37, count 2 2006.229.18:09:51.07#ibcon#*before return 0, iclass 37, count 2 2006.229.18:09:51.07#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:51.07#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:51.07#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.18:09:51.07#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:51.07#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:51.19#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:51.19#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:51.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.18:09:51.19#ibcon#first serial, iclass 37, count 0 2006.229.18:09:51.19#ibcon#enter sib2, iclass 37, count 0 2006.229.18:09:51.19#ibcon#flushed, iclass 37, count 0 2006.229.18:09:51.19#ibcon#about to write, iclass 37, count 0 2006.229.18:09:51.19#ibcon#wrote, iclass 37, count 0 2006.229.18:09:51.19#ibcon#about to read 3, iclass 37, count 0 2006.229.18:09:51.21#ibcon#read 3, iclass 37, count 0 2006.229.18:09:51.21#ibcon#about to read 4, iclass 37, count 0 2006.229.18:09:51.21#ibcon#read 4, iclass 37, count 0 2006.229.18:09:51.21#ibcon#about to read 5, iclass 37, count 0 2006.229.18:09:51.21#ibcon#read 5, iclass 37, count 0 2006.229.18:09:51.21#ibcon#about to read 6, iclass 37, count 0 2006.229.18:09:51.21#ibcon#read 6, iclass 37, count 0 2006.229.18:09:51.21#ibcon#end of sib2, iclass 37, count 0 2006.229.18:09:51.21#ibcon#*mode == 0, iclass 37, count 0 2006.229.18:09:51.21#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.18:09:51.21#ibcon#[25=USB\r\n] 2006.229.18:09:51.21#ibcon#*before write, iclass 37, count 0 2006.229.18:09:51.21#ibcon#enter sib2, iclass 37, count 0 2006.229.18:09:51.21#ibcon#flushed, iclass 37, count 0 2006.229.18:09:51.21#ibcon#about to write, iclass 37, count 0 2006.229.18:09:51.21#ibcon#wrote, iclass 37, count 0 2006.229.18:09:51.21#ibcon#about to read 3, iclass 37, count 0 2006.229.18:09:51.24#ibcon#read 3, iclass 37, count 0 2006.229.18:09:51.24#ibcon#about to read 4, iclass 37, count 0 2006.229.18:09:51.24#ibcon#read 4, iclass 37, count 0 2006.229.18:09:51.24#ibcon#about to read 5, iclass 37, count 0 2006.229.18:09:51.24#ibcon#read 5, iclass 37, count 0 2006.229.18:09:51.24#ibcon#about to read 6, iclass 37, count 0 2006.229.18:09:51.24#ibcon#read 6, iclass 37, count 0 2006.229.18:09:51.24#ibcon#end of sib2, iclass 37, count 0 2006.229.18:09:51.24#ibcon#*after write, iclass 37, count 0 2006.229.18:09:51.24#ibcon#*before return 0, iclass 37, count 0 2006.229.18:09:51.24#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:51.24#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:51.24#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.18:09:51.24#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.18:09:51.24$vck44/valo=4,624.99 2006.229.18:09:51.24#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.18:09:51.24#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.18:09:51.24#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:51.24#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:51.24#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:51.24#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:51.24#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:09:51.24#ibcon#first serial, iclass 39, count 0 2006.229.18:09:51.24#ibcon#enter sib2, iclass 39, count 0 2006.229.18:09:51.24#ibcon#flushed, iclass 39, count 0 2006.229.18:09:51.24#ibcon#about to write, iclass 39, count 0 2006.229.18:09:51.24#ibcon#wrote, iclass 39, count 0 2006.229.18:09:51.24#ibcon#about to read 3, iclass 39, count 0 2006.229.18:09:51.26#ibcon#read 3, iclass 39, count 0 2006.229.18:09:51.26#ibcon#about to read 4, iclass 39, count 0 2006.229.18:09:51.26#ibcon#read 4, iclass 39, count 0 2006.229.18:09:51.26#ibcon#about to read 5, iclass 39, count 0 2006.229.18:09:51.26#ibcon#read 5, iclass 39, count 0 2006.229.18:09:51.26#ibcon#about to read 6, iclass 39, count 0 2006.229.18:09:51.26#ibcon#read 6, iclass 39, count 0 2006.229.18:09:51.26#ibcon#end of sib2, iclass 39, count 0 2006.229.18:09:51.26#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:09:51.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:09:51.26#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:09:51.26#ibcon#*before write, iclass 39, count 0 2006.229.18:09:51.26#ibcon#enter sib2, iclass 39, count 0 2006.229.18:09:51.26#ibcon#flushed, iclass 39, count 0 2006.229.18:09:51.26#ibcon#about to write, iclass 39, count 0 2006.229.18:09:51.26#ibcon#wrote, iclass 39, count 0 2006.229.18:09:51.26#ibcon#about to read 3, iclass 39, count 0 2006.229.18:09:51.30#ibcon#read 3, iclass 39, count 0 2006.229.18:09:51.30#ibcon#about to read 4, iclass 39, count 0 2006.229.18:09:51.30#ibcon#read 4, iclass 39, count 0 2006.229.18:09:51.30#ibcon#about to read 5, iclass 39, count 0 2006.229.18:09:51.30#ibcon#read 5, iclass 39, count 0 2006.229.18:09:51.30#ibcon#about to read 6, iclass 39, count 0 2006.229.18:09:51.30#ibcon#read 6, iclass 39, count 0 2006.229.18:09:51.30#ibcon#end of sib2, iclass 39, count 0 2006.229.18:09:51.30#ibcon#*after write, iclass 39, count 0 2006.229.18:09:51.30#ibcon#*before return 0, iclass 39, count 0 2006.229.18:09:51.30#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:51.30#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:51.30#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:09:51.30#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:09:51.30$vck44/va=4,7 2006.229.18:09:51.30#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.18:09:51.30#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.18:09:51.30#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:51.30#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:51.36#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:51.36#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:51.36#ibcon#enter wrdev, iclass 3, count 2 2006.229.18:09:51.36#ibcon#first serial, iclass 3, count 2 2006.229.18:09:51.36#ibcon#enter sib2, iclass 3, count 2 2006.229.18:09:51.36#ibcon#flushed, iclass 3, count 2 2006.229.18:09:51.36#ibcon#about to write, iclass 3, count 2 2006.229.18:09:51.36#ibcon#wrote, iclass 3, count 2 2006.229.18:09:51.36#ibcon#about to read 3, iclass 3, count 2 2006.229.18:09:51.38#ibcon#read 3, iclass 3, count 2 2006.229.18:09:51.38#ibcon#about to read 4, iclass 3, count 2 2006.229.18:09:51.38#ibcon#read 4, iclass 3, count 2 2006.229.18:09:51.38#ibcon#about to read 5, iclass 3, count 2 2006.229.18:09:51.38#ibcon#read 5, iclass 3, count 2 2006.229.18:09:51.38#ibcon#about to read 6, iclass 3, count 2 2006.229.18:09:51.38#ibcon#read 6, iclass 3, count 2 2006.229.18:09:51.38#ibcon#end of sib2, iclass 3, count 2 2006.229.18:09:51.38#ibcon#*mode == 0, iclass 3, count 2 2006.229.18:09:51.38#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.18:09:51.38#ibcon#[25=AT04-07\r\n] 2006.229.18:09:51.38#ibcon#*before write, iclass 3, count 2 2006.229.18:09:51.38#ibcon#enter sib2, iclass 3, count 2 2006.229.18:09:51.38#ibcon#flushed, iclass 3, count 2 2006.229.18:09:51.38#ibcon#about to write, iclass 3, count 2 2006.229.18:09:51.38#ibcon#wrote, iclass 3, count 2 2006.229.18:09:51.38#ibcon#about to read 3, iclass 3, count 2 2006.229.18:09:51.41#ibcon#read 3, iclass 3, count 2 2006.229.18:09:51.41#ibcon#about to read 4, iclass 3, count 2 2006.229.18:09:51.41#ibcon#read 4, iclass 3, count 2 2006.229.18:09:51.41#ibcon#about to read 5, iclass 3, count 2 2006.229.18:09:51.41#ibcon#read 5, iclass 3, count 2 2006.229.18:09:51.41#ibcon#about to read 6, iclass 3, count 2 2006.229.18:09:51.41#ibcon#read 6, iclass 3, count 2 2006.229.18:09:51.41#ibcon#end of sib2, iclass 3, count 2 2006.229.18:09:51.41#ibcon#*after write, iclass 3, count 2 2006.229.18:09:51.41#ibcon#*before return 0, iclass 3, count 2 2006.229.18:09:51.41#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:51.41#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:51.41#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.18:09:51.41#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:51.41#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:51.53#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:51.53#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:51.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:09:51.53#ibcon#first serial, iclass 3, count 0 2006.229.18:09:51.53#ibcon#enter sib2, iclass 3, count 0 2006.229.18:09:51.53#ibcon#flushed, iclass 3, count 0 2006.229.18:09:51.53#ibcon#about to write, iclass 3, count 0 2006.229.18:09:51.53#ibcon#wrote, iclass 3, count 0 2006.229.18:09:51.53#ibcon#about to read 3, iclass 3, count 0 2006.229.18:09:51.55#ibcon#read 3, iclass 3, count 0 2006.229.18:09:51.55#ibcon#about to read 4, iclass 3, count 0 2006.229.18:09:51.55#ibcon#read 4, iclass 3, count 0 2006.229.18:09:51.55#ibcon#about to read 5, iclass 3, count 0 2006.229.18:09:51.55#ibcon#read 5, iclass 3, count 0 2006.229.18:09:51.55#ibcon#about to read 6, iclass 3, count 0 2006.229.18:09:51.55#ibcon#read 6, iclass 3, count 0 2006.229.18:09:51.55#ibcon#end of sib2, iclass 3, count 0 2006.229.18:09:51.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:09:51.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:09:51.55#ibcon#[25=USB\r\n] 2006.229.18:09:51.55#ibcon#*before write, iclass 3, count 0 2006.229.18:09:51.55#ibcon#enter sib2, iclass 3, count 0 2006.229.18:09:51.55#ibcon#flushed, iclass 3, count 0 2006.229.18:09:51.55#ibcon#about to write, iclass 3, count 0 2006.229.18:09:51.55#ibcon#wrote, iclass 3, count 0 2006.229.18:09:51.55#ibcon#about to read 3, iclass 3, count 0 2006.229.18:09:51.58#ibcon#read 3, iclass 3, count 0 2006.229.18:09:51.58#ibcon#about to read 4, iclass 3, count 0 2006.229.18:09:51.58#ibcon#read 4, iclass 3, count 0 2006.229.18:09:51.58#ibcon#about to read 5, iclass 3, count 0 2006.229.18:09:51.58#ibcon#read 5, iclass 3, count 0 2006.229.18:09:51.58#ibcon#about to read 6, iclass 3, count 0 2006.229.18:09:51.58#ibcon#read 6, iclass 3, count 0 2006.229.18:09:51.58#ibcon#end of sib2, iclass 3, count 0 2006.229.18:09:51.58#ibcon#*after write, iclass 3, count 0 2006.229.18:09:51.58#ibcon#*before return 0, iclass 3, count 0 2006.229.18:09:51.58#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:51.58#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:51.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:09:51.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:09:51.58$vck44/valo=5,734.99 2006.229.18:09:51.58#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.18:09:51.58#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.18:09:51.58#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:51.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:51.58#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:51.58#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:51.58#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:09:51.58#ibcon#first serial, iclass 5, count 0 2006.229.18:09:51.58#ibcon#enter sib2, iclass 5, count 0 2006.229.18:09:51.58#ibcon#flushed, iclass 5, count 0 2006.229.18:09:51.58#ibcon#about to write, iclass 5, count 0 2006.229.18:09:51.58#ibcon#wrote, iclass 5, count 0 2006.229.18:09:51.58#ibcon#about to read 3, iclass 5, count 0 2006.229.18:09:51.60#ibcon#read 3, iclass 5, count 0 2006.229.18:09:51.60#ibcon#about to read 4, iclass 5, count 0 2006.229.18:09:51.60#ibcon#read 4, iclass 5, count 0 2006.229.18:09:51.60#ibcon#about to read 5, iclass 5, count 0 2006.229.18:09:51.60#ibcon#read 5, iclass 5, count 0 2006.229.18:09:51.60#ibcon#about to read 6, iclass 5, count 0 2006.229.18:09:51.60#ibcon#read 6, iclass 5, count 0 2006.229.18:09:51.60#ibcon#end of sib2, iclass 5, count 0 2006.229.18:09:51.60#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:09:51.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:09:51.60#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:09:51.60#ibcon#*before write, iclass 5, count 0 2006.229.18:09:51.60#ibcon#enter sib2, iclass 5, count 0 2006.229.18:09:51.60#ibcon#flushed, iclass 5, count 0 2006.229.18:09:51.60#ibcon#about to write, iclass 5, count 0 2006.229.18:09:51.60#ibcon#wrote, iclass 5, count 0 2006.229.18:09:51.60#ibcon#about to read 3, iclass 5, count 0 2006.229.18:09:51.64#ibcon#read 3, iclass 5, count 0 2006.229.18:09:51.64#ibcon#about to read 4, iclass 5, count 0 2006.229.18:09:51.64#ibcon#read 4, iclass 5, count 0 2006.229.18:09:51.64#ibcon#about to read 5, iclass 5, count 0 2006.229.18:09:51.64#ibcon#read 5, iclass 5, count 0 2006.229.18:09:51.64#ibcon#about to read 6, iclass 5, count 0 2006.229.18:09:51.64#ibcon#read 6, iclass 5, count 0 2006.229.18:09:51.64#ibcon#end of sib2, iclass 5, count 0 2006.229.18:09:51.64#ibcon#*after write, iclass 5, count 0 2006.229.18:09:51.64#ibcon#*before return 0, iclass 5, count 0 2006.229.18:09:51.64#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:51.64#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:51.64#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:09:51.64#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:09:51.64$vck44/va=5,4 2006.229.18:09:51.64#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.18:09:51.64#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.18:09:51.64#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:51.64#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:51.70#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:51.70#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:51.70#ibcon#enter wrdev, iclass 7, count 2 2006.229.18:09:51.70#ibcon#first serial, iclass 7, count 2 2006.229.18:09:51.70#ibcon#enter sib2, iclass 7, count 2 2006.229.18:09:51.70#ibcon#flushed, iclass 7, count 2 2006.229.18:09:51.70#ibcon#about to write, iclass 7, count 2 2006.229.18:09:51.70#ibcon#wrote, iclass 7, count 2 2006.229.18:09:51.70#ibcon#about to read 3, iclass 7, count 2 2006.229.18:09:51.72#ibcon#read 3, iclass 7, count 2 2006.229.18:09:51.72#ibcon#about to read 4, iclass 7, count 2 2006.229.18:09:51.72#ibcon#read 4, iclass 7, count 2 2006.229.18:09:51.72#ibcon#about to read 5, iclass 7, count 2 2006.229.18:09:51.72#ibcon#read 5, iclass 7, count 2 2006.229.18:09:51.72#ibcon#about to read 6, iclass 7, count 2 2006.229.18:09:51.72#ibcon#read 6, iclass 7, count 2 2006.229.18:09:51.72#ibcon#end of sib2, iclass 7, count 2 2006.229.18:09:51.72#ibcon#*mode == 0, iclass 7, count 2 2006.229.18:09:51.72#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.18:09:51.72#ibcon#[25=AT05-04\r\n] 2006.229.18:09:51.72#ibcon#*before write, iclass 7, count 2 2006.229.18:09:51.72#ibcon#enter sib2, iclass 7, count 2 2006.229.18:09:51.72#ibcon#flushed, iclass 7, count 2 2006.229.18:09:51.72#ibcon#about to write, iclass 7, count 2 2006.229.18:09:51.72#ibcon#wrote, iclass 7, count 2 2006.229.18:09:51.72#ibcon#about to read 3, iclass 7, count 2 2006.229.18:09:51.75#ibcon#read 3, iclass 7, count 2 2006.229.18:09:51.75#ibcon#about to read 4, iclass 7, count 2 2006.229.18:09:51.75#ibcon#read 4, iclass 7, count 2 2006.229.18:09:51.75#ibcon#about to read 5, iclass 7, count 2 2006.229.18:09:51.75#ibcon#read 5, iclass 7, count 2 2006.229.18:09:51.75#ibcon#about to read 6, iclass 7, count 2 2006.229.18:09:51.75#ibcon#read 6, iclass 7, count 2 2006.229.18:09:51.75#ibcon#end of sib2, iclass 7, count 2 2006.229.18:09:51.75#ibcon#*after write, iclass 7, count 2 2006.229.18:09:51.75#ibcon#*before return 0, iclass 7, count 2 2006.229.18:09:51.75#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:51.75#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:51.75#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.18:09:51.75#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:51.75#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:51.87#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:51.87#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:51.87#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:09:51.87#ibcon#first serial, iclass 7, count 0 2006.229.18:09:51.87#ibcon#enter sib2, iclass 7, count 0 2006.229.18:09:51.87#ibcon#flushed, iclass 7, count 0 2006.229.18:09:51.87#ibcon#about to write, iclass 7, count 0 2006.229.18:09:51.87#ibcon#wrote, iclass 7, count 0 2006.229.18:09:51.87#ibcon#about to read 3, iclass 7, count 0 2006.229.18:09:51.89#ibcon#read 3, iclass 7, count 0 2006.229.18:09:51.89#ibcon#about to read 4, iclass 7, count 0 2006.229.18:09:51.89#ibcon#read 4, iclass 7, count 0 2006.229.18:09:51.89#ibcon#about to read 5, iclass 7, count 0 2006.229.18:09:51.89#ibcon#read 5, iclass 7, count 0 2006.229.18:09:51.89#ibcon#about to read 6, iclass 7, count 0 2006.229.18:09:51.89#ibcon#read 6, iclass 7, count 0 2006.229.18:09:51.89#ibcon#end of sib2, iclass 7, count 0 2006.229.18:09:51.89#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:09:51.89#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:09:51.89#ibcon#[25=USB\r\n] 2006.229.18:09:51.89#ibcon#*before write, iclass 7, count 0 2006.229.18:09:51.89#ibcon#enter sib2, iclass 7, count 0 2006.229.18:09:51.89#ibcon#flushed, iclass 7, count 0 2006.229.18:09:51.89#ibcon#about to write, iclass 7, count 0 2006.229.18:09:51.89#ibcon#wrote, iclass 7, count 0 2006.229.18:09:51.89#ibcon#about to read 3, iclass 7, count 0 2006.229.18:09:51.92#ibcon#read 3, iclass 7, count 0 2006.229.18:09:51.92#ibcon#about to read 4, iclass 7, count 0 2006.229.18:09:51.92#ibcon#read 4, iclass 7, count 0 2006.229.18:09:51.92#ibcon#about to read 5, iclass 7, count 0 2006.229.18:09:51.92#ibcon#read 5, iclass 7, count 0 2006.229.18:09:51.92#ibcon#about to read 6, iclass 7, count 0 2006.229.18:09:51.92#ibcon#read 6, iclass 7, count 0 2006.229.18:09:51.92#ibcon#end of sib2, iclass 7, count 0 2006.229.18:09:51.92#ibcon#*after write, iclass 7, count 0 2006.229.18:09:51.92#ibcon#*before return 0, iclass 7, count 0 2006.229.18:09:51.92#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:51.92#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:51.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:09:51.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:09:51.92$vck44/valo=6,814.99 2006.229.18:09:51.92#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.18:09:51.92#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.18:09:51.92#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:51.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:51.92#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:51.92#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:51.92#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:09:51.92#ibcon#first serial, iclass 11, count 0 2006.229.18:09:51.92#ibcon#enter sib2, iclass 11, count 0 2006.229.18:09:51.92#ibcon#flushed, iclass 11, count 0 2006.229.18:09:51.92#ibcon#about to write, iclass 11, count 0 2006.229.18:09:51.92#ibcon#wrote, iclass 11, count 0 2006.229.18:09:51.92#ibcon#about to read 3, iclass 11, count 0 2006.229.18:09:51.94#ibcon#read 3, iclass 11, count 0 2006.229.18:09:51.94#ibcon#about to read 4, iclass 11, count 0 2006.229.18:09:51.94#ibcon#read 4, iclass 11, count 0 2006.229.18:09:51.94#ibcon#about to read 5, iclass 11, count 0 2006.229.18:09:51.94#ibcon#read 5, iclass 11, count 0 2006.229.18:09:51.94#ibcon#about to read 6, iclass 11, count 0 2006.229.18:09:51.94#ibcon#read 6, iclass 11, count 0 2006.229.18:09:51.94#ibcon#end of sib2, iclass 11, count 0 2006.229.18:09:51.94#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:09:51.94#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:09:51.94#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:09:51.94#ibcon#*before write, iclass 11, count 0 2006.229.18:09:51.94#ibcon#enter sib2, iclass 11, count 0 2006.229.18:09:51.94#ibcon#flushed, iclass 11, count 0 2006.229.18:09:51.94#ibcon#about to write, iclass 11, count 0 2006.229.18:09:51.94#ibcon#wrote, iclass 11, count 0 2006.229.18:09:51.94#ibcon#about to read 3, iclass 11, count 0 2006.229.18:09:51.98#ibcon#read 3, iclass 11, count 0 2006.229.18:09:51.98#ibcon#about to read 4, iclass 11, count 0 2006.229.18:09:51.98#ibcon#read 4, iclass 11, count 0 2006.229.18:09:51.98#ibcon#about to read 5, iclass 11, count 0 2006.229.18:09:51.98#ibcon#read 5, iclass 11, count 0 2006.229.18:09:51.98#ibcon#about to read 6, iclass 11, count 0 2006.229.18:09:51.98#ibcon#read 6, iclass 11, count 0 2006.229.18:09:51.98#ibcon#end of sib2, iclass 11, count 0 2006.229.18:09:51.98#ibcon#*after write, iclass 11, count 0 2006.229.18:09:51.98#ibcon#*before return 0, iclass 11, count 0 2006.229.18:09:51.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:51.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:51.98#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:09:51.98#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:09:51.98$vck44/va=6,4 2006.229.18:09:51.98#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.18:09:51.98#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.18:09:51.98#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:51.98#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:52.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:52.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:52.04#ibcon#enter wrdev, iclass 13, count 2 2006.229.18:09:52.04#ibcon#first serial, iclass 13, count 2 2006.229.18:09:52.04#ibcon#enter sib2, iclass 13, count 2 2006.229.18:09:52.04#ibcon#flushed, iclass 13, count 2 2006.229.18:09:52.04#ibcon#about to write, iclass 13, count 2 2006.229.18:09:52.04#ibcon#wrote, iclass 13, count 2 2006.229.18:09:52.04#ibcon#about to read 3, iclass 13, count 2 2006.229.18:09:52.06#ibcon#read 3, iclass 13, count 2 2006.229.18:09:52.06#ibcon#about to read 4, iclass 13, count 2 2006.229.18:09:52.06#ibcon#read 4, iclass 13, count 2 2006.229.18:09:52.06#ibcon#about to read 5, iclass 13, count 2 2006.229.18:09:52.06#ibcon#read 5, iclass 13, count 2 2006.229.18:09:52.06#ibcon#about to read 6, iclass 13, count 2 2006.229.18:09:52.06#ibcon#read 6, iclass 13, count 2 2006.229.18:09:52.06#ibcon#end of sib2, iclass 13, count 2 2006.229.18:09:52.06#ibcon#*mode == 0, iclass 13, count 2 2006.229.18:09:52.06#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.18:09:52.06#ibcon#[25=AT06-04\r\n] 2006.229.18:09:52.06#ibcon#*before write, iclass 13, count 2 2006.229.18:09:52.06#ibcon#enter sib2, iclass 13, count 2 2006.229.18:09:52.06#ibcon#flushed, iclass 13, count 2 2006.229.18:09:52.06#ibcon#about to write, iclass 13, count 2 2006.229.18:09:52.06#ibcon#wrote, iclass 13, count 2 2006.229.18:09:52.06#ibcon#about to read 3, iclass 13, count 2 2006.229.18:09:52.09#ibcon#read 3, iclass 13, count 2 2006.229.18:09:52.09#ibcon#about to read 4, iclass 13, count 2 2006.229.18:09:52.09#ibcon#read 4, iclass 13, count 2 2006.229.18:09:52.09#ibcon#about to read 5, iclass 13, count 2 2006.229.18:09:52.09#ibcon#read 5, iclass 13, count 2 2006.229.18:09:52.09#ibcon#about to read 6, iclass 13, count 2 2006.229.18:09:52.09#ibcon#read 6, iclass 13, count 2 2006.229.18:09:52.09#ibcon#end of sib2, iclass 13, count 2 2006.229.18:09:52.09#ibcon#*after write, iclass 13, count 2 2006.229.18:09:52.09#ibcon#*before return 0, iclass 13, count 2 2006.229.18:09:52.09#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:52.09#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:52.09#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.18:09:52.09#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:52.09#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:52.21#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:52.21#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:52.21#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:09:52.21#ibcon#first serial, iclass 13, count 0 2006.229.18:09:52.21#ibcon#enter sib2, iclass 13, count 0 2006.229.18:09:52.21#ibcon#flushed, iclass 13, count 0 2006.229.18:09:52.21#ibcon#about to write, iclass 13, count 0 2006.229.18:09:52.21#ibcon#wrote, iclass 13, count 0 2006.229.18:09:52.21#ibcon#about to read 3, iclass 13, count 0 2006.229.18:09:52.23#ibcon#read 3, iclass 13, count 0 2006.229.18:09:52.23#ibcon#about to read 4, iclass 13, count 0 2006.229.18:09:52.23#ibcon#read 4, iclass 13, count 0 2006.229.18:09:52.23#ibcon#about to read 5, iclass 13, count 0 2006.229.18:09:52.23#ibcon#read 5, iclass 13, count 0 2006.229.18:09:52.23#ibcon#about to read 6, iclass 13, count 0 2006.229.18:09:52.23#ibcon#read 6, iclass 13, count 0 2006.229.18:09:52.23#ibcon#end of sib2, iclass 13, count 0 2006.229.18:09:52.23#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:09:52.23#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:09:52.23#ibcon#[25=USB\r\n] 2006.229.18:09:52.23#ibcon#*before write, iclass 13, count 0 2006.229.18:09:52.23#ibcon#enter sib2, iclass 13, count 0 2006.229.18:09:52.23#ibcon#flushed, iclass 13, count 0 2006.229.18:09:52.23#ibcon#about to write, iclass 13, count 0 2006.229.18:09:52.23#ibcon#wrote, iclass 13, count 0 2006.229.18:09:52.23#ibcon#about to read 3, iclass 13, count 0 2006.229.18:09:52.26#ibcon#read 3, iclass 13, count 0 2006.229.18:09:52.26#ibcon#about to read 4, iclass 13, count 0 2006.229.18:09:52.26#ibcon#read 4, iclass 13, count 0 2006.229.18:09:52.26#ibcon#about to read 5, iclass 13, count 0 2006.229.18:09:52.26#ibcon#read 5, iclass 13, count 0 2006.229.18:09:52.26#ibcon#about to read 6, iclass 13, count 0 2006.229.18:09:52.26#ibcon#read 6, iclass 13, count 0 2006.229.18:09:52.26#ibcon#end of sib2, iclass 13, count 0 2006.229.18:09:52.26#ibcon#*after write, iclass 13, count 0 2006.229.18:09:52.26#ibcon#*before return 0, iclass 13, count 0 2006.229.18:09:52.26#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:52.26#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:52.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:09:52.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:09:52.26$vck44/valo=7,864.99 2006.229.18:09:52.26#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.18:09:52.26#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.18:09:52.26#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:52.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:52.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:52.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:52.26#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:09:52.26#ibcon#first serial, iclass 15, count 0 2006.229.18:09:52.26#ibcon#enter sib2, iclass 15, count 0 2006.229.18:09:52.26#ibcon#flushed, iclass 15, count 0 2006.229.18:09:52.26#ibcon#about to write, iclass 15, count 0 2006.229.18:09:52.26#ibcon#wrote, iclass 15, count 0 2006.229.18:09:52.26#ibcon#about to read 3, iclass 15, count 0 2006.229.18:09:52.28#ibcon#read 3, iclass 15, count 0 2006.229.18:09:52.28#ibcon#about to read 4, iclass 15, count 0 2006.229.18:09:52.28#ibcon#read 4, iclass 15, count 0 2006.229.18:09:52.28#ibcon#about to read 5, iclass 15, count 0 2006.229.18:09:52.28#ibcon#read 5, iclass 15, count 0 2006.229.18:09:52.28#ibcon#about to read 6, iclass 15, count 0 2006.229.18:09:52.28#ibcon#read 6, iclass 15, count 0 2006.229.18:09:52.28#ibcon#end of sib2, iclass 15, count 0 2006.229.18:09:52.28#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:09:52.28#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:09:52.28#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:09:52.28#ibcon#*before write, iclass 15, count 0 2006.229.18:09:52.28#ibcon#enter sib2, iclass 15, count 0 2006.229.18:09:52.28#ibcon#flushed, iclass 15, count 0 2006.229.18:09:52.28#ibcon#about to write, iclass 15, count 0 2006.229.18:09:52.28#ibcon#wrote, iclass 15, count 0 2006.229.18:09:52.28#ibcon#about to read 3, iclass 15, count 0 2006.229.18:09:52.32#ibcon#read 3, iclass 15, count 0 2006.229.18:09:52.32#ibcon#about to read 4, iclass 15, count 0 2006.229.18:09:52.32#ibcon#read 4, iclass 15, count 0 2006.229.18:09:52.32#ibcon#about to read 5, iclass 15, count 0 2006.229.18:09:52.32#ibcon#read 5, iclass 15, count 0 2006.229.18:09:52.32#ibcon#about to read 6, iclass 15, count 0 2006.229.18:09:52.32#ibcon#read 6, iclass 15, count 0 2006.229.18:09:52.32#ibcon#end of sib2, iclass 15, count 0 2006.229.18:09:52.32#ibcon#*after write, iclass 15, count 0 2006.229.18:09:52.32#ibcon#*before return 0, iclass 15, count 0 2006.229.18:09:52.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:52.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:52.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:09:52.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:09:52.32$vck44/va=7,5 2006.229.18:09:52.32#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.18:09:52.32#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.18:09:52.32#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:52.32#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:52.38#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:52.38#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:52.38#ibcon#enter wrdev, iclass 17, count 2 2006.229.18:09:52.38#ibcon#first serial, iclass 17, count 2 2006.229.18:09:52.38#ibcon#enter sib2, iclass 17, count 2 2006.229.18:09:52.38#ibcon#flushed, iclass 17, count 2 2006.229.18:09:52.38#ibcon#about to write, iclass 17, count 2 2006.229.18:09:52.38#ibcon#wrote, iclass 17, count 2 2006.229.18:09:52.38#ibcon#about to read 3, iclass 17, count 2 2006.229.18:09:52.40#ibcon#read 3, iclass 17, count 2 2006.229.18:09:52.40#ibcon#about to read 4, iclass 17, count 2 2006.229.18:09:52.40#ibcon#read 4, iclass 17, count 2 2006.229.18:09:52.40#ibcon#about to read 5, iclass 17, count 2 2006.229.18:09:52.40#ibcon#read 5, iclass 17, count 2 2006.229.18:09:52.40#ibcon#about to read 6, iclass 17, count 2 2006.229.18:09:52.40#ibcon#read 6, iclass 17, count 2 2006.229.18:09:52.40#ibcon#end of sib2, iclass 17, count 2 2006.229.18:09:52.40#ibcon#*mode == 0, iclass 17, count 2 2006.229.18:09:52.40#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.18:09:52.40#ibcon#[25=AT07-05\r\n] 2006.229.18:09:52.40#ibcon#*before write, iclass 17, count 2 2006.229.18:09:52.40#ibcon#enter sib2, iclass 17, count 2 2006.229.18:09:52.40#ibcon#flushed, iclass 17, count 2 2006.229.18:09:52.40#ibcon#about to write, iclass 17, count 2 2006.229.18:09:52.40#ibcon#wrote, iclass 17, count 2 2006.229.18:09:52.40#ibcon#about to read 3, iclass 17, count 2 2006.229.18:09:52.43#ibcon#read 3, iclass 17, count 2 2006.229.18:09:52.43#ibcon#about to read 4, iclass 17, count 2 2006.229.18:09:52.43#ibcon#read 4, iclass 17, count 2 2006.229.18:09:52.43#ibcon#about to read 5, iclass 17, count 2 2006.229.18:09:52.43#ibcon#read 5, iclass 17, count 2 2006.229.18:09:52.43#ibcon#about to read 6, iclass 17, count 2 2006.229.18:09:52.43#ibcon#read 6, iclass 17, count 2 2006.229.18:09:52.43#ibcon#end of sib2, iclass 17, count 2 2006.229.18:09:52.43#ibcon#*after write, iclass 17, count 2 2006.229.18:09:52.43#ibcon#*before return 0, iclass 17, count 2 2006.229.18:09:52.43#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:52.43#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:52.43#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.18:09:52.43#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:52.43#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:52.55#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:52.55#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:52.55#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:09:52.55#ibcon#first serial, iclass 17, count 0 2006.229.18:09:52.55#ibcon#enter sib2, iclass 17, count 0 2006.229.18:09:52.55#ibcon#flushed, iclass 17, count 0 2006.229.18:09:52.55#ibcon#about to write, iclass 17, count 0 2006.229.18:09:52.55#ibcon#wrote, iclass 17, count 0 2006.229.18:09:52.55#ibcon#about to read 3, iclass 17, count 0 2006.229.18:09:52.57#ibcon#read 3, iclass 17, count 0 2006.229.18:09:52.57#ibcon#about to read 4, iclass 17, count 0 2006.229.18:09:52.57#ibcon#read 4, iclass 17, count 0 2006.229.18:09:52.57#ibcon#about to read 5, iclass 17, count 0 2006.229.18:09:52.57#ibcon#read 5, iclass 17, count 0 2006.229.18:09:52.57#ibcon#about to read 6, iclass 17, count 0 2006.229.18:09:52.57#ibcon#read 6, iclass 17, count 0 2006.229.18:09:52.57#ibcon#end of sib2, iclass 17, count 0 2006.229.18:09:52.57#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:09:52.57#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:09:52.57#ibcon#[25=USB\r\n] 2006.229.18:09:52.57#ibcon#*before write, iclass 17, count 0 2006.229.18:09:52.57#ibcon#enter sib2, iclass 17, count 0 2006.229.18:09:52.57#ibcon#flushed, iclass 17, count 0 2006.229.18:09:52.57#ibcon#about to write, iclass 17, count 0 2006.229.18:09:52.57#ibcon#wrote, iclass 17, count 0 2006.229.18:09:52.57#ibcon#about to read 3, iclass 17, count 0 2006.229.18:09:52.60#ibcon#read 3, iclass 17, count 0 2006.229.18:09:52.60#ibcon#about to read 4, iclass 17, count 0 2006.229.18:09:52.60#ibcon#read 4, iclass 17, count 0 2006.229.18:09:52.60#ibcon#about to read 5, iclass 17, count 0 2006.229.18:09:52.60#ibcon#read 5, iclass 17, count 0 2006.229.18:09:52.60#ibcon#about to read 6, iclass 17, count 0 2006.229.18:09:52.60#ibcon#read 6, iclass 17, count 0 2006.229.18:09:52.60#ibcon#end of sib2, iclass 17, count 0 2006.229.18:09:52.60#ibcon#*after write, iclass 17, count 0 2006.229.18:09:52.60#ibcon#*before return 0, iclass 17, count 0 2006.229.18:09:52.60#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:52.60#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:52.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:09:52.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:09:52.60$vck44/valo=8,884.99 2006.229.18:09:52.60#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.18:09:52.60#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.18:09:52.60#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:52.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:52.60#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:52.60#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:52.60#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:09:52.60#ibcon#first serial, iclass 19, count 0 2006.229.18:09:52.60#ibcon#enter sib2, iclass 19, count 0 2006.229.18:09:52.60#ibcon#flushed, iclass 19, count 0 2006.229.18:09:52.60#ibcon#about to write, iclass 19, count 0 2006.229.18:09:52.60#ibcon#wrote, iclass 19, count 0 2006.229.18:09:52.60#ibcon#about to read 3, iclass 19, count 0 2006.229.18:09:52.62#ibcon#read 3, iclass 19, count 0 2006.229.18:09:52.62#ibcon#about to read 4, iclass 19, count 0 2006.229.18:09:52.62#ibcon#read 4, iclass 19, count 0 2006.229.18:09:52.62#ibcon#about to read 5, iclass 19, count 0 2006.229.18:09:52.62#ibcon#read 5, iclass 19, count 0 2006.229.18:09:52.62#ibcon#about to read 6, iclass 19, count 0 2006.229.18:09:52.62#ibcon#read 6, iclass 19, count 0 2006.229.18:09:52.62#ibcon#end of sib2, iclass 19, count 0 2006.229.18:09:52.62#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:09:52.62#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:09:52.62#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:09:52.62#ibcon#*before write, iclass 19, count 0 2006.229.18:09:52.62#ibcon#enter sib2, iclass 19, count 0 2006.229.18:09:52.62#ibcon#flushed, iclass 19, count 0 2006.229.18:09:52.62#ibcon#about to write, iclass 19, count 0 2006.229.18:09:52.62#ibcon#wrote, iclass 19, count 0 2006.229.18:09:52.62#ibcon#about to read 3, iclass 19, count 0 2006.229.18:09:52.66#ibcon#read 3, iclass 19, count 0 2006.229.18:09:52.66#ibcon#about to read 4, iclass 19, count 0 2006.229.18:09:52.66#ibcon#read 4, iclass 19, count 0 2006.229.18:09:52.66#ibcon#about to read 5, iclass 19, count 0 2006.229.18:09:52.66#ibcon#read 5, iclass 19, count 0 2006.229.18:09:52.66#ibcon#about to read 6, iclass 19, count 0 2006.229.18:09:52.66#ibcon#read 6, iclass 19, count 0 2006.229.18:09:52.66#ibcon#end of sib2, iclass 19, count 0 2006.229.18:09:52.66#ibcon#*after write, iclass 19, count 0 2006.229.18:09:52.66#ibcon#*before return 0, iclass 19, count 0 2006.229.18:09:52.66#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:52.66#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:52.66#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:09:52.66#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:09:52.66$vck44/va=8,6 2006.229.18:09:52.66#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.18:09:52.66#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.18:09:52.66#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:52.66#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:09:52.72#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:09:52.72#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:09:52.72#ibcon#enter wrdev, iclass 21, count 2 2006.229.18:09:52.72#ibcon#first serial, iclass 21, count 2 2006.229.18:09:52.72#ibcon#enter sib2, iclass 21, count 2 2006.229.18:09:52.72#ibcon#flushed, iclass 21, count 2 2006.229.18:09:52.72#ibcon#about to write, iclass 21, count 2 2006.229.18:09:52.72#ibcon#wrote, iclass 21, count 2 2006.229.18:09:52.72#ibcon#about to read 3, iclass 21, count 2 2006.229.18:09:52.74#ibcon#read 3, iclass 21, count 2 2006.229.18:09:52.74#ibcon#about to read 4, iclass 21, count 2 2006.229.18:09:52.74#ibcon#read 4, iclass 21, count 2 2006.229.18:09:52.74#ibcon#about to read 5, iclass 21, count 2 2006.229.18:09:52.74#ibcon#read 5, iclass 21, count 2 2006.229.18:09:52.74#ibcon#about to read 6, iclass 21, count 2 2006.229.18:09:52.74#ibcon#read 6, iclass 21, count 2 2006.229.18:09:52.74#ibcon#end of sib2, iclass 21, count 2 2006.229.18:09:52.74#ibcon#*mode == 0, iclass 21, count 2 2006.229.18:09:52.74#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.18:09:52.74#ibcon#[25=AT08-06\r\n] 2006.229.18:09:52.74#ibcon#*before write, iclass 21, count 2 2006.229.18:09:52.74#ibcon#enter sib2, iclass 21, count 2 2006.229.18:09:52.74#ibcon#flushed, iclass 21, count 2 2006.229.18:09:52.74#ibcon#about to write, iclass 21, count 2 2006.229.18:09:52.74#ibcon#wrote, iclass 21, count 2 2006.229.18:09:52.74#ibcon#about to read 3, iclass 21, count 2 2006.229.18:09:52.77#ibcon#read 3, iclass 21, count 2 2006.229.18:09:52.77#ibcon#about to read 4, iclass 21, count 2 2006.229.18:09:52.77#ibcon#read 4, iclass 21, count 2 2006.229.18:09:52.77#ibcon#about to read 5, iclass 21, count 2 2006.229.18:09:52.77#ibcon#read 5, iclass 21, count 2 2006.229.18:09:52.77#ibcon#about to read 6, iclass 21, count 2 2006.229.18:09:52.77#ibcon#read 6, iclass 21, count 2 2006.229.18:09:52.77#ibcon#end of sib2, iclass 21, count 2 2006.229.18:09:52.77#ibcon#*after write, iclass 21, count 2 2006.229.18:09:52.77#ibcon#*before return 0, iclass 21, count 2 2006.229.18:09:52.77#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:09:52.77#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:09:52.77#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.18:09:52.77#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:52.77#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:09:52.89#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:09:52.89#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:09:52.89#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:09:52.89#ibcon#first serial, iclass 21, count 0 2006.229.18:09:52.89#ibcon#enter sib2, iclass 21, count 0 2006.229.18:09:52.89#ibcon#flushed, iclass 21, count 0 2006.229.18:09:52.89#ibcon#about to write, iclass 21, count 0 2006.229.18:09:52.89#ibcon#wrote, iclass 21, count 0 2006.229.18:09:52.89#ibcon#about to read 3, iclass 21, count 0 2006.229.18:09:52.91#ibcon#read 3, iclass 21, count 0 2006.229.18:09:52.91#ibcon#about to read 4, iclass 21, count 0 2006.229.18:09:52.91#ibcon#read 4, iclass 21, count 0 2006.229.18:09:52.91#ibcon#about to read 5, iclass 21, count 0 2006.229.18:09:52.91#ibcon#read 5, iclass 21, count 0 2006.229.18:09:52.91#ibcon#about to read 6, iclass 21, count 0 2006.229.18:09:52.91#ibcon#read 6, iclass 21, count 0 2006.229.18:09:52.91#ibcon#end of sib2, iclass 21, count 0 2006.229.18:09:52.91#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:09:52.91#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:09:52.91#ibcon#[25=USB\r\n] 2006.229.18:09:52.91#ibcon#*before write, iclass 21, count 0 2006.229.18:09:52.91#ibcon#enter sib2, iclass 21, count 0 2006.229.18:09:52.91#ibcon#flushed, iclass 21, count 0 2006.229.18:09:52.91#ibcon#about to write, iclass 21, count 0 2006.229.18:09:52.91#ibcon#wrote, iclass 21, count 0 2006.229.18:09:52.91#ibcon#about to read 3, iclass 21, count 0 2006.229.18:09:52.94#ibcon#read 3, iclass 21, count 0 2006.229.18:09:52.94#ibcon#about to read 4, iclass 21, count 0 2006.229.18:09:52.94#ibcon#read 4, iclass 21, count 0 2006.229.18:09:52.94#ibcon#about to read 5, iclass 21, count 0 2006.229.18:09:52.94#ibcon#read 5, iclass 21, count 0 2006.229.18:09:52.94#ibcon#about to read 6, iclass 21, count 0 2006.229.18:09:52.94#ibcon#read 6, iclass 21, count 0 2006.229.18:09:52.94#ibcon#end of sib2, iclass 21, count 0 2006.229.18:09:52.94#ibcon#*after write, iclass 21, count 0 2006.229.18:09:52.94#ibcon#*before return 0, iclass 21, count 0 2006.229.18:09:52.94#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:09:52.94#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:09:52.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:09:52.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:09:52.94$vck44/vblo=1,629.99 2006.229.18:09:52.94#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.18:09:52.94#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.18:09:52.94#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:52.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:09:52.94#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:09:52.94#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:09:52.94#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:09:52.94#ibcon#first serial, iclass 23, count 0 2006.229.18:09:52.94#ibcon#enter sib2, iclass 23, count 0 2006.229.18:09:52.94#ibcon#flushed, iclass 23, count 0 2006.229.18:09:52.94#ibcon#about to write, iclass 23, count 0 2006.229.18:09:52.94#ibcon#wrote, iclass 23, count 0 2006.229.18:09:52.94#ibcon#about to read 3, iclass 23, count 0 2006.229.18:09:52.96#ibcon#read 3, iclass 23, count 0 2006.229.18:09:52.96#ibcon#about to read 4, iclass 23, count 0 2006.229.18:09:52.96#ibcon#read 4, iclass 23, count 0 2006.229.18:09:52.96#ibcon#about to read 5, iclass 23, count 0 2006.229.18:09:52.96#ibcon#read 5, iclass 23, count 0 2006.229.18:09:52.96#ibcon#about to read 6, iclass 23, count 0 2006.229.18:09:52.96#ibcon#read 6, iclass 23, count 0 2006.229.18:09:52.96#ibcon#end of sib2, iclass 23, count 0 2006.229.18:09:52.96#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:09:52.96#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:09:52.96#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:09:52.96#ibcon#*before write, iclass 23, count 0 2006.229.18:09:52.96#ibcon#enter sib2, iclass 23, count 0 2006.229.18:09:52.96#ibcon#flushed, iclass 23, count 0 2006.229.18:09:52.96#ibcon#about to write, iclass 23, count 0 2006.229.18:09:52.96#ibcon#wrote, iclass 23, count 0 2006.229.18:09:52.96#ibcon#about to read 3, iclass 23, count 0 2006.229.18:09:53.00#ibcon#read 3, iclass 23, count 0 2006.229.18:09:53.00#ibcon#about to read 4, iclass 23, count 0 2006.229.18:09:53.00#ibcon#read 4, iclass 23, count 0 2006.229.18:09:53.00#ibcon#about to read 5, iclass 23, count 0 2006.229.18:09:53.00#ibcon#read 5, iclass 23, count 0 2006.229.18:09:53.00#ibcon#about to read 6, iclass 23, count 0 2006.229.18:09:53.00#ibcon#read 6, iclass 23, count 0 2006.229.18:09:53.00#ibcon#end of sib2, iclass 23, count 0 2006.229.18:09:53.00#ibcon#*after write, iclass 23, count 0 2006.229.18:09:53.00#ibcon#*before return 0, iclass 23, count 0 2006.229.18:09:53.00#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:09:53.00#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:09:53.00#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:09:53.00#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:09:53.00$vck44/vb=1,4 2006.229.18:09:53.00#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.18:09:53.00#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.18:09:53.00#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:53.00#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:09:53.00#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:09:53.00#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:09:53.00#ibcon#enter wrdev, iclass 25, count 2 2006.229.18:09:53.00#ibcon#first serial, iclass 25, count 2 2006.229.18:09:53.00#ibcon#enter sib2, iclass 25, count 2 2006.229.18:09:53.00#ibcon#flushed, iclass 25, count 2 2006.229.18:09:53.00#ibcon#about to write, iclass 25, count 2 2006.229.18:09:53.00#ibcon#wrote, iclass 25, count 2 2006.229.18:09:53.00#ibcon#about to read 3, iclass 25, count 2 2006.229.18:09:53.02#ibcon#read 3, iclass 25, count 2 2006.229.18:09:53.02#ibcon#about to read 4, iclass 25, count 2 2006.229.18:09:53.02#ibcon#read 4, iclass 25, count 2 2006.229.18:09:53.02#ibcon#about to read 5, iclass 25, count 2 2006.229.18:09:53.02#ibcon#read 5, iclass 25, count 2 2006.229.18:09:53.02#ibcon#about to read 6, iclass 25, count 2 2006.229.18:09:53.02#ibcon#read 6, iclass 25, count 2 2006.229.18:09:53.02#ibcon#end of sib2, iclass 25, count 2 2006.229.18:09:53.02#ibcon#*mode == 0, iclass 25, count 2 2006.229.18:09:53.02#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.18:09:53.02#ibcon#[27=AT01-04\r\n] 2006.229.18:09:53.02#ibcon#*before write, iclass 25, count 2 2006.229.18:09:53.02#ibcon#enter sib2, iclass 25, count 2 2006.229.18:09:53.02#ibcon#flushed, iclass 25, count 2 2006.229.18:09:53.02#ibcon#about to write, iclass 25, count 2 2006.229.18:09:53.02#ibcon#wrote, iclass 25, count 2 2006.229.18:09:53.02#ibcon#about to read 3, iclass 25, count 2 2006.229.18:09:53.05#ibcon#read 3, iclass 25, count 2 2006.229.18:09:53.05#ibcon#about to read 4, iclass 25, count 2 2006.229.18:09:53.05#ibcon#read 4, iclass 25, count 2 2006.229.18:09:53.05#ibcon#about to read 5, iclass 25, count 2 2006.229.18:09:53.05#ibcon#read 5, iclass 25, count 2 2006.229.18:09:53.05#ibcon#about to read 6, iclass 25, count 2 2006.229.18:09:53.05#ibcon#read 6, iclass 25, count 2 2006.229.18:09:53.05#ibcon#end of sib2, iclass 25, count 2 2006.229.18:09:53.05#ibcon#*after write, iclass 25, count 2 2006.229.18:09:53.05#ibcon#*before return 0, iclass 25, count 2 2006.229.18:09:53.05#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:09:53.05#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:09:53.05#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.18:09:53.05#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:53.05#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:09:53.17#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:09:53.17#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:09:53.17#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:09:53.17#ibcon#first serial, iclass 25, count 0 2006.229.18:09:53.17#ibcon#enter sib2, iclass 25, count 0 2006.229.18:09:53.17#ibcon#flushed, iclass 25, count 0 2006.229.18:09:53.17#ibcon#about to write, iclass 25, count 0 2006.229.18:09:53.17#ibcon#wrote, iclass 25, count 0 2006.229.18:09:53.17#ibcon#about to read 3, iclass 25, count 0 2006.229.18:09:53.19#ibcon#read 3, iclass 25, count 0 2006.229.18:09:53.19#ibcon#about to read 4, iclass 25, count 0 2006.229.18:09:53.19#ibcon#read 4, iclass 25, count 0 2006.229.18:09:53.19#ibcon#about to read 5, iclass 25, count 0 2006.229.18:09:53.19#ibcon#read 5, iclass 25, count 0 2006.229.18:09:53.19#ibcon#about to read 6, iclass 25, count 0 2006.229.18:09:53.19#ibcon#read 6, iclass 25, count 0 2006.229.18:09:53.19#ibcon#end of sib2, iclass 25, count 0 2006.229.18:09:53.19#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:09:53.19#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:09:53.19#ibcon#[27=USB\r\n] 2006.229.18:09:53.19#ibcon#*before write, iclass 25, count 0 2006.229.18:09:53.19#ibcon#enter sib2, iclass 25, count 0 2006.229.18:09:53.19#ibcon#flushed, iclass 25, count 0 2006.229.18:09:53.19#ibcon#about to write, iclass 25, count 0 2006.229.18:09:53.19#ibcon#wrote, iclass 25, count 0 2006.229.18:09:53.19#ibcon#about to read 3, iclass 25, count 0 2006.229.18:09:53.22#ibcon#read 3, iclass 25, count 0 2006.229.18:09:53.22#ibcon#about to read 4, iclass 25, count 0 2006.229.18:09:53.22#ibcon#read 4, iclass 25, count 0 2006.229.18:09:53.22#ibcon#about to read 5, iclass 25, count 0 2006.229.18:09:53.22#ibcon#read 5, iclass 25, count 0 2006.229.18:09:53.22#ibcon#about to read 6, iclass 25, count 0 2006.229.18:09:53.22#ibcon#read 6, iclass 25, count 0 2006.229.18:09:53.22#ibcon#end of sib2, iclass 25, count 0 2006.229.18:09:53.22#ibcon#*after write, iclass 25, count 0 2006.229.18:09:53.22#ibcon#*before return 0, iclass 25, count 0 2006.229.18:09:53.22#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:09:53.22#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:09:53.22#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:09:53.22#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:09:53.22$vck44/vblo=2,634.99 2006.229.18:09:53.22#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.18:09:53.22#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.18:09:53.22#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:53.22#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:53.22#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:53.22#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:53.22#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:09:53.22#ibcon#first serial, iclass 27, count 0 2006.229.18:09:53.22#ibcon#enter sib2, iclass 27, count 0 2006.229.18:09:53.22#ibcon#flushed, iclass 27, count 0 2006.229.18:09:53.22#ibcon#about to write, iclass 27, count 0 2006.229.18:09:53.22#ibcon#wrote, iclass 27, count 0 2006.229.18:09:53.22#ibcon#about to read 3, iclass 27, count 0 2006.229.18:09:53.24#ibcon#read 3, iclass 27, count 0 2006.229.18:09:53.24#ibcon#about to read 4, iclass 27, count 0 2006.229.18:09:53.24#ibcon#read 4, iclass 27, count 0 2006.229.18:09:53.24#ibcon#about to read 5, iclass 27, count 0 2006.229.18:09:53.24#ibcon#read 5, iclass 27, count 0 2006.229.18:09:53.24#ibcon#about to read 6, iclass 27, count 0 2006.229.18:09:53.24#ibcon#read 6, iclass 27, count 0 2006.229.18:09:53.24#ibcon#end of sib2, iclass 27, count 0 2006.229.18:09:53.24#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:09:53.24#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:09:53.24#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:09:53.24#ibcon#*before write, iclass 27, count 0 2006.229.18:09:53.24#ibcon#enter sib2, iclass 27, count 0 2006.229.18:09:53.24#ibcon#flushed, iclass 27, count 0 2006.229.18:09:53.24#ibcon#about to write, iclass 27, count 0 2006.229.18:09:53.24#ibcon#wrote, iclass 27, count 0 2006.229.18:09:53.24#ibcon#about to read 3, iclass 27, count 0 2006.229.18:09:53.28#ibcon#read 3, iclass 27, count 0 2006.229.18:09:53.28#ibcon#about to read 4, iclass 27, count 0 2006.229.18:09:53.28#ibcon#read 4, iclass 27, count 0 2006.229.18:09:53.28#ibcon#about to read 5, iclass 27, count 0 2006.229.18:09:53.28#ibcon#read 5, iclass 27, count 0 2006.229.18:09:53.28#ibcon#about to read 6, iclass 27, count 0 2006.229.18:09:53.28#ibcon#read 6, iclass 27, count 0 2006.229.18:09:53.28#ibcon#end of sib2, iclass 27, count 0 2006.229.18:09:53.28#ibcon#*after write, iclass 27, count 0 2006.229.18:09:53.28#ibcon#*before return 0, iclass 27, count 0 2006.229.18:09:53.28#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:53.28#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:09:53.28#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:09:53.28#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:09:53.28$vck44/vb=2,4 2006.229.18:09:53.28#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.18:09:53.28#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.18:09:53.28#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:53.28#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:53.34#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:53.34#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:53.34#ibcon#enter wrdev, iclass 29, count 2 2006.229.18:09:53.34#ibcon#first serial, iclass 29, count 2 2006.229.18:09:53.34#ibcon#enter sib2, iclass 29, count 2 2006.229.18:09:53.34#ibcon#flushed, iclass 29, count 2 2006.229.18:09:53.34#ibcon#about to write, iclass 29, count 2 2006.229.18:09:53.34#ibcon#wrote, iclass 29, count 2 2006.229.18:09:53.34#ibcon#about to read 3, iclass 29, count 2 2006.229.18:09:53.36#ibcon#read 3, iclass 29, count 2 2006.229.18:09:53.36#ibcon#about to read 4, iclass 29, count 2 2006.229.18:09:53.36#ibcon#read 4, iclass 29, count 2 2006.229.18:09:53.36#ibcon#about to read 5, iclass 29, count 2 2006.229.18:09:53.36#ibcon#read 5, iclass 29, count 2 2006.229.18:09:53.36#ibcon#about to read 6, iclass 29, count 2 2006.229.18:09:53.36#ibcon#read 6, iclass 29, count 2 2006.229.18:09:53.36#ibcon#end of sib2, iclass 29, count 2 2006.229.18:09:53.36#ibcon#*mode == 0, iclass 29, count 2 2006.229.18:09:53.36#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.18:09:53.36#ibcon#[27=AT02-04\r\n] 2006.229.18:09:53.36#ibcon#*before write, iclass 29, count 2 2006.229.18:09:53.36#ibcon#enter sib2, iclass 29, count 2 2006.229.18:09:53.36#ibcon#flushed, iclass 29, count 2 2006.229.18:09:53.36#ibcon#about to write, iclass 29, count 2 2006.229.18:09:53.36#ibcon#wrote, iclass 29, count 2 2006.229.18:09:53.36#ibcon#about to read 3, iclass 29, count 2 2006.229.18:09:53.39#ibcon#read 3, iclass 29, count 2 2006.229.18:09:53.39#ibcon#about to read 4, iclass 29, count 2 2006.229.18:09:53.39#ibcon#read 4, iclass 29, count 2 2006.229.18:09:53.39#ibcon#about to read 5, iclass 29, count 2 2006.229.18:09:53.39#ibcon#read 5, iclass 29, count 2 2006.229.18:09:53.39#ibcon#about to read 6, iclass 29, count 2 2006.229.18:09:53.39#ibcon#read 6, iclass 29, count 2 2006.229.18:09:53.39#ibcon#end of sib2, iclass 29, count 2 2006.229.18:09:53.39#ibcon#*after write, iclass 29, count 2 2006.229.18:09:53.39#ibcon#*before return 0, iclass 29, count 2 2006.229.18:09:53.39#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:53.39#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:09:53.39#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.18:09:53.39#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:53.39#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:53.51#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:53.51#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:53.51#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:09:53.51#ibcon#first serial, iclass 29, count 0 2006.229.18:09:53.51#ibcon#enter sib2, iclass 29, count 0 2006.229.18:09:53.51#ibcon#flushed, iclass 29, count 0 2006.229.18:09:53.51#ibcon#about to write, iclass 29, count 0 2006.229.18:09:53.51#ibcon#wrote, iclass 29, count 0 2006.229.18:09:53.51#ibcon#about to read 3, iclass 29, count 0 2006.229.18:09:53.53#ibcon#read 3, iclass 29, count 0 2006.229.18:09:53.53#ibcon#about to read 4, iclass 29, count 0 2006.229.18:09:53.53#ibcon#read 4, iclass 29, count 0 2006.229.18:09:53.53#ibcon#about to read 5, iclass 29, count 0 2006.229.18:09:53.53#ibcon#read 5, iclass 29, count 0 2006.229.18:09:53.53#ibcon#about to read 6, iclass 29, count 0 2006.229.18:09:53.53#ibcon#read 6, iclass 29, count 0 2006.229.18:09:53.53#ibcon#end of sib2, iclass 29, count 0 2006.229.18:09:53.53#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:09:53.53#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:09:53.53#ibcon#[27=USB\r\n] 2006.229.18:09:53.53#ibcon#*before write, iclass 29, count 0 2006.229.18:09:53.53#ibcon#enter sib2, iclass 29, count 0 2006.229.18:09:53.53#ibcon#flushed, iclass 29, count 0 2006.229.18:09:53.53#ibcon#about to write, iclass 29, count 0 2006.229.18:09:53.53#ibcon#wrote, iclass 29, count 0 2006.229.18:09:53.53#ibcon#about to read 3, iclass 29, count 0 2006.229.18:09:53.56#ibcon#read 3, iclass 29, count 0 2006.229.18:09:53.56#ibcon#about to read 4, iclass 29, count 0 2006.229.18:09:53.56#ibcon#read 4, iclass 29, count 0 2006.229.18:09:53.56#ibcon#about to read 5, iclass 29, count 0 2006.229.18:09:53.56#ibcon#read 5, iclass 29, count 0 2006.229.18:09:53.56#ibcon#about to read 6, iclass 29, count 0 2006.229.18:09:53.56#ibcon#read 6, iclass 29, count 0 2006.229.18:09:53.56#ibcon#end of sib2, iclass 29, count 0 2006.229.18:09:53.56#ibcon#*after write, iclass 29, count 0 2006.229.18:09:53.56#ibcon#*before return 0, iclass 29, count 0 2006.229.18:09:53.56#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:53.56#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:09:53.56#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:09:53.56#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:09:53.56$vck44/vblo=3,649.99 2006.229.18:09:53.56#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.18:09:53.56#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.18:09:53.56#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:53.56#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:53.56#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:53.56#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:53.56#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:09:53.56#ibcon#first serial, iclass 31, count 0 2006.229.18:09:53.56#ibcon#enter sib2, iclass 31, count 0 2006.229.18:09:53.56#ibcon#flushed, iclass 31, count 0 2006.229.18:09:53.56#ibcon#about to write, iclass 31, count 0 2006.229.18:09:53.56#ibcon#wrote, iclass 31, count 0 2006.229.18:09:53.56#ibcon#about to read 3, iclass 31, count 0 2006.229.18:09:53.58#ibcon#read 3, iclass 31, count 0 2006.229.18:09:53.58#ibcon#about to read 4, iclass 31, count 0 2006.229.18:09:53.58#ibcon#read 4, iclass 31, count 0 2006.229.18:09:53.58#ibcon#about to read 5, iclass 31, count 0 2006.229.18:09:53.58#ibcon#read 5, iclass 31, count 0 2006.229.18:09:53.58#ibcon#about to read 6, iclass 31, count 0 2006.229.18:09:53.58#ibcon#read 6, iclass 31, count 0 2006.229.18:09:53.58#ibcon#end of sib2, iclass 31, count 0 2006.229.18:09:53.58#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:09:53.58#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:09:53.58#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:09:53.58#ibcon#*before write, iclass 31, count 0 2006.229.18:09:53.58#ibcon#enter sib2, iclass 31, count 0 2006.229.18:09:53.58#ibcon#flushed, iclass 31, count 0 2006.229.18:09:53.58#ibcon#about to write, iclass 31, count 0 2006.229.18:09:53.58#ibcon#wrote, iclass 31, count 0 2006.229.18:09:53.58#ibcon#about to read 3, iclass 31, count 0 2006.229.18:09:53.62#ibcon#read 3, iclass 31, count 0 2006.229.18:09:53.62#ibcon#about to read 4, iclass 31, count 0 2006.229.18:09:53.62#ibcon#read 4, iclass 31, count 0 2006.229.18:09:53.62#ibcon#about to read 5, iclass 31, count 0 2006.229.18:09:53.62#ibcon#read 5, iclass 31, count 0 2006.229.18:09:53.62#ibcon#about to read 6, iclass 31, count 0 2006.229.18:09:53.62#ibcon#read 6, iclass 31, count 0 2006.229.18:09:53.62#ibcon#end of sib2, iclass 31, count 0 2006.229.18:09:53.62#ibcon#*after write, iclass 31, count 0 2006.229.18:09:53.62#ibcon#*before return 0, iclass 31, count 0 2006.229.18:09:53.62#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:53.62#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:09:53.62#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:09:53.62#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:09:53.62$vck44/vb=3,4 2006.229.18:09:53.62#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.18:09:53.62#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.18:09:53.62#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:53.62#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:53.68#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:53.68#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:53.68#ibcon#enter wrdev, iclass 33, count 2 2006.229.18:09:53.68#ibcon#first serial, iclass 33, count 2 2006.229.18:09:53.68#ibcon#enter sib2, iclass 33, count 2 2006.229.18:09:53.68#ibcon#flushed, iclass 33, count 2 2006.229.18:09:53.68#ibcon#about to write, iclass 33, count 2 2006.229.18:09:53.68#ibcon#wrote, iclass 33, count 2 2006.229.18:09:53.68#ibcon#about to read 3, iclass 33, count 2 2006.229.18:09:53.70#ibcon#read 3, iclass 33, count 2 2006.229.18:09:53.70#ibcon#about to read 4, iclass 33, count 2 2006.229.18:09:53.70#ibcon#read 4, iclass 33, count 2 2006.229.18:09:53.70#ibcon#about to read 5, iclass 33, count 2 2006.229.18:09:53.70#ibcon#read 5, iclass 33, count 2 2006.229.18:09:53.70#ibcon#about to read 6, iclass 33, count 2 2006.229.18:09:53.70#ibcon#read 6, iclass 33, count 2 2006.229.18:09:53.70#ibcon#end of sib2, iclass 33, count 2 2006.229.18:09:53.70#ibcon#*mode == 0, iclass 33, count 2 2006.229.18:09:53.70#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.18:09:53.70#ibcon#[27=AT03-04\r\n] 2006.229.18:09:53.70#ibcon#*before write, iclass 33, count 2 2006.229.18:09:53.70#ibcon#enter sib2, iclass 33, count 2 2006.229.18:09:53.70#ibcon#flushed, iclass 33, count 2 2006.229.18:09:53.70#ibcon#about to write, iclass 33, count 2 2006.229.18:09:53.70#ibcon#wrote, iclass 33, count 2 2006.229.18:09:53.70#ibcon#about to read 3, iclass 33, count 2 2006.229.18:09:53.73#ibcon#read 3, iclass 33, count 2 2006.229.18:09:53.73#ibcon#about to read 4, iclass 33, count 2 2006.229.18:09:53.73#ibcon#read 4, iclass 33, count 2 2006.229.18:09:53.73#ibcon#about to read 5, iclass 33, count 2 2006.229.18:09:53.73#ibcon#read 5, iclass 33, count 2 2006.229.18:09:53.73#ibcon#about to read 6, iclass 33, count 2 2006.229.18:09:53.73#ibcon#read 6, iclass 33, count 2 2006.229.18:09:53.73#ibcon#end of sib2, iclass 33, count 2 2006.229.18:09:53.73#ibcon#*after write, iclass 33, count 2 2006.229.18:09:53.73#ibcon#*before return 0, iclass 33, count 2 2006.229.18:09:53.73#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:53.73#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:09:53.73#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.18:09:53.73#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:53.73#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:53.85#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:53.85#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:53.85#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:09:53.85#ibcon#first serial, iclass 33, count 0 2006.229.18:09:53.85#ibcon#enter sib2, iclass 33, count 0 2006.229.18:09:53.85#ibcon#flushed, iclass 33, count 0 2006.229.18:09:53.85#ibcon#about to write, iclass 33, count 0 2006.229.18:09:53.85#ibcon#wrote, iclass 33, count 0 2006.229.18:09:53.85#ibcon#about to read 3, iclass 33, count 0 2006.229.18:09:53.87#ibcon#read 3, iclass 33, count 0 2006.229.18:09:53.87#ibcon#about to read 4, iclass 33, count 0 2006.229.18:09:53.87#ibcon#read 4, iclass 33, count 0 2006.229.18:09:53.87#ibcon#about to read 5, iclass 33, count 0 2006.229.18:09:53.87#ibcon#read 5, iclass 33, count 0 2006.229.18:09:53.87#ibcon#about to read 6, iclass 33, count 0 2006.229.18:09:53.87#ibcon#read 6, iclass 33, count 0 2006.229.18:09:53.87#ibcon#end of sib2, iclass 33, count 0 2006.229.18:09:53.87#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:09:53.87#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:09:53.87#ibcon#[27=USB\r\n] 2006.229.18:09:53.87#ibcon#*before write, iclass 33, count 0 2006.229.18:09:53.87#ibcon#enter sib2, iclass 33, count 0 2006.229.18:09:53.87#ibcon#flushed, iclass 33, count 0 2006.229.18:09:53.87#ibcon#about to write, iclass 33, count 0 2006.229.18:09:53.87#ibcon#wrote, iclass 33, count 0 2006.229.18:09:53.87#ibcon#about to read 3, iclass 33, count 0 2006.229.18:09:53.90#ibcon#read 3, iclass 33, count 0 2006.229.18:09:53.90#ibcon#about to read 4, iclass 33, count 0 2006.229.18:09:53.90#ibcon#read 4, iclass 33, count 0 2006.229.18:09:53.90#ibcon#about to read 5, iclass 33, count 0 2006.229.18:09:53.90#ibcon#read 5, iclass 33, count 0 2006.229.18:09:53.90#ibcon#about to read 6, iclass 33, count 0 2006.229.18:09:53.90#ibcon#read 6, iclass 33, count 0 2006.229.18:09:53.90#ibcon#end of sib2, iclass 33, count 0 2006.229.18:09:53.90#ibcon#*after write, iclass 33, count 0 2006.229.18:09:53.90#ibcon#*before return 0, iclass 33, count 0 2006.229.18:09:53.90#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:53.90#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:09:53.90#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:09:53.90#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:09:53.90$vck44/vblo=4,679.99 2006.229.18:09:53.90#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.18:09:53.90#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.18:09:53.90#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:53.90#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:53.90#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:53.90#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:53.90#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:09:53.90#ibcon#first serial, iclass 35, count 0 2006.229.18:09:53.90#ibcon#enter sib2, iclass 35, count 0 2006.229.18:09:53.90#ibcon#flushed, iclass 35, count 0 2006.229.18:09:53.90#ibcon#about to write, iclass 35, count 0 2006.229.18:09:53.90#ibcon#wrote, iclass 35, count 0 2006.229.18:09:53.90#ibcon#about to read 3, iclass 35, count 0 2006.229.18:09:53.92#ibcon#read 3, iclass 35, count 0 2006.229.18:09:53.92#ibcon#about to read 4, iclass 35, count 0 2006.229.18:09:53.92#ibcon#read 4, iclass 35, count 0 2006.229.18:09:53.92#ibcon#about to read 5, iclass 35, count 0 2006.229.18:09:53.92#ibcon#read 5, iclass 35, count 0 2006.229.18:09:53.92#ibcon#about to read 6, iclass 35, count 0 2006.229.18:09:53.92#ibcon#read 6, iclass 35, count 0 2006.229.18:09:53.92#ibcon#end of sib2, iclass 35, count 0 2006.229.18:09:53.92#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:09:53.92#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:09:53.92#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:09:53.92#ibcon#*before write, iclass 35, count 0 2006.229.18:09:53.92#ibcon#enter sib2, iclass 35, count 0 2006.229.18:09:53.92#ibcon#flushed, iclass 35, count 0 2006.229.18:09:53.92#ibcon#about to write, iclass 35, count 0 2006.229.18:09:53.92#ibcon#wrote, iclass 35, count 0 2006.229.18:09:53.92#ibcon#about to read 3, iclass 35, count 0 2006.229.18:09:53.96#ibcon#read 3, iclass 35, count 0 2006.229.18:09:53.96#ibcon#about to read 4, iclass 35, count 0 2006.229.18:09:53.96#ibcon#read 4, iclass 35, count 0 2006.229.18:09:53.96#ibcon#about to read 5, iclass 35, count 0 2006.229.18:09:53.96#ibcon#read 5, iclass 35, count 0 2006.229.18:09:53.96#ibcon#about to read 6, iclass 35, count 0 2006.229.18:09:53.96#ibcon#read 6, iclass 35, count 0 2006.229.18:09:53.96#ibcon#end of sib2, iclass 35, count 0 2006.229.18:09:53.96#ibcon#*after write, iclass 35, count 0 2006.229.18:09:53.96#ibcon#*before return 0, iclass 35, count 0 2006.229.18:09:53.96#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:53.96#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:09:53.96#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:09:53.96#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:09:53.96$vck44/vb=4,4 2006.229.18:09:53.96#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.18:09:53.96#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.18:09:53.96#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:53.96#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:54.02#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:54.02#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:54.02#ibcon#enter wrdev, iclass 37, count 2 2006.229.18:09:54.02#ibcon#first serial, iclass 37, count 2 2006.229.18:09:54.02#ibcon#enter sib2, iclass 37, count 2 2006.229.18:09:54.02#ibcon#flushed, iclass 37, count 2 2006.229.18:09:54.02#ibcon#about to write, iclass 37, count 2 2006.229.18:09:54.02#ibcon#wrote, iclass 37, count 2 2006.229.18:09:54.02#ibcon#about to read 3, iclass 37, count 2 2006.229.18:09:54.04#ibcon#read 3, iclass 37, count 2 2006.229.18:09:54.04#ibcon#about to read 4, iclass 37, count 2 2006.229.18:09:54.04#ibcon#read 4, iclass 37, count 2 2006.229.18:09:54.04#ibcon#about to read 5, iclass 37, count 2 2006.229.18:09:54.04#ibcon#read 5, iclass 37, count 2 2006.229.18:09:54.04#ibcon#about to read 6, iclass 37, count 2 2006.229.18:09:54.04#ibcon#read 6, iclass 37, count 2 2006.229.18:09:54.04#ibcon#end of sib2, iclass 37, count 2 2006.229.18:09:54.04#ibcon#*mode == 0, iclass 37, count 2 2006.229.18:09:54.04#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.18:09:54.04#ibcon#[27=AT04-04\r\n] 2006.229.18:09:54.04#ibcon#*before write, iclass 37, count 2 2006.229.18:09:54.04#ibcon#enter sib2, iclass 37, count 2 2006.229.18:09:54.04#ibcon#flushed, iclass 37, count 2 2006.229.18:09:54.04#ibcon#about to write, iclass 37, count 2 2006.229.18:09:54.04#ibcon#wrote, iclass 37, count 2 2006.229.18:09:54.04#ibcon#about to read 3, iclass 37, count 2 2006.229.18:09:54.07#ibcon#read 3, iclass 37, count 2 2006.229.18:09:54.07#ibcon#about to read 4, iclass 37, count 2 2006.229.18:09:54.07#ibcon#read 4, iclass 37, count 2 2006.229.18:09:54.07#ibcon#about to read 5, iclass 37, count 2 2006.229.18:09:54.07#ibcon#read 5, iclass 37, count 2 2006.229.18:09:54.07#ibcon#about to read 6, iclass 37, count 2 2006.229.18:09:54.07#ibcon#read 6, iclass 37, count 2 2006.229.18:09:54.07#ibcon#end of sib2, iclass 37, count 2 2006.229.18:09:54.07#ibcon#*after write, iclass 37, count 2 2006.229.18:09:54.07#ibcon#*before return 0, iclass 37, count 2 2006.229.18:09:54.07#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:54.07#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:09:54.07#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.18:09:54.07#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:54.07#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:54.19#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:54.19#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:54.19#ibcon#enter wrdev, iclass 37, count 0 2006.229.18:09:54.19#ibcon#first serial, iclass 37, count 0 2006.229.18:09:54.19#ibcon#enter sib2, iclass 37, count 0 2006.229.18:09:54.19#ibcon#flushed, iclass 37, count 0 2006.229.18:09:54.19#ibcon#about to write, iclass 37, count 0 2006.229.18:09:54.19#ibcon#wrote, iclass 37, count 0 2006.229.18:09:54.19#ibcon#about to read 3, iclass 37, count 0 2006.229.18:09:54.21#ibcon#read 3, iclass 37, count 0 2006.229.18:09:54.21#ibcon#about to read 4, iclass 37, count 0 2006.229.18:09:54.21#ibcon#read 4, iclass 37, count 0 2006.229.18:09:54.21#ibcon#about to read 5, iclass 37, count 0 2006.229.18:09:54.21#ibcon#read 5, iclass 37, count 0 2006.229.18:09:54.21#ibcon#about to read 6, iclass 37, count 0 2006.229.18:09:54.21#ibcon#read 6, iclass 37, count 0 2006.229.18:09:54.21#ibcon#end of sib2, iclass 37, count 0 2006.229.18:09:54.21#ibcon#*mode == 0, iclass 37, count 0 2006.229.18:09:54.21#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.18:09:54.21#ibcon#[27=USB\r\n] 2006.229.18:09:54.21#ibcon#*before write, iclass 37, count 0 2006.229.18:09:54.21#ibcon#enter sib2, iclass 37, count 0 2006.229.18:09:54.21#ibcon#flushed, iclass 37, count 0 2006.229.18:09:54.21#ibcon#about to write, iclass 37, count 0 2006.229.18:09:54.21#ibcon#wrote, iclass 37, count 0 2006.229.18:09:54.21#ibcon#about to read 3, iclass 37, count 0 2006.229.18:09:54.24#ibcon#read 3, iclass 37, count 0 2006.229.18:09:54.24#ibcon#about to read 4, iclass 37, count 0 2006.229.18:09:54.24#ibcon#read 4, iclass 37, count 0 2006.229.18:09:54.24#ibcon#about to read 5, iclass 37, count 0 2006.229.18:09:54.24#ibcon#read 5, iclass 37, count 0 2006.229.18:09:54.24#ibcon#about to read 6, iclass 37, count 0 2006.229.18:09:54.24#ibcon#read 6, iclass 37, count 0 2006.229.18:09:54.24#ibcon#end of sib2, iclass 37, count 0 2006.229.18:09:54.24#ibcon#*after write, iclass 37, count 0 2006.229.18:09:54.24#ibcon#*before return 0, iclass 37, count 0 2006.229.18:09:54.24#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:54.24#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:09:54.24#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.18:09:54.24#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.18:09:54.24$vck44/vblo=5,709.99 2006.229.18:09:54.24#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.18:09:54.24#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.18:09:54.24#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:54.24#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:54.24#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:54.24#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:54.24#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:09:54.24#ibcon#first serial, iclass 39, count 0 2006.229.18:09:54.24#ibcon#enter sib2, iclass 39, count 0 2006.229.18:09:54.24#ibcon#flushed, iclass 39, count 0 2006.229.18:09:54.24#ibcon#about to write, iclass 39, count 0 2006.229.18:09:54.24#ibcon#wrote, iclass 39, count 0 2006.229.18:09:54.24#ibcon#about to read 3, iclass 39, count 0 2006.229.18:09:54.26#ibcon#read 3, iclass 39, count 0 2006.229.18:09:54.26#ibcon#about to read 4, iclass 39, count 0 2006.229.18:09:54.26#ibcon#read 4, iclass 39, count 0 2006.229.18:09:54.26#ibcon#about to read 5, iclass 39, count 0 2006.229.18:09:54.26#ibcon#read 5, iclass 39, count 0 2006.229.18:09:54.26#ibcon#about to read 6, iclass 39, count 0 2006.229.18:09:54.26#ibcon#read 6, iclass 39, count 0 2006.229.18:09:54.26#ibcon#end of sib2, iclass 39, count 0 2006.229.18:09:54.26#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:09:54.26#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:09:54.26#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:09:54.26#ibcon#*before write, iclass 39, count 0 2006.229.18:09:54.26#ibcon#enter sib2, iclass 39, count 0 2006.229.18:09:54.26#ibcon#flushed, iclass 39, count 0 2006.229.18:09:54.26#ibcon#about to write, iclass 39, count 0 2006.229.18:09:54.26#ibcon#wrote, iclass 39, count 0 2006.229.18:09:54.26#ibcon#about to read 3, iclass 39, count 0 2006.229.18:09:54.30#ibcon#read 3, iclass 39, count 0 2006.229.18:09:54.30#ibcon#about to read 4, iclass 39, count 0 2006.229.18:09:54.30#ibcon#read 4, iclass 39, count 0 2006.229.18:09:54.30#ibcon#about to read 5, iclass 39, count 0 2006.229.18:09:54.30#ibcon#read 5, iclass 39, count 0 2006.229.18:09:54.30#ibcon#about to read 6, iclass 39, count 0 2006.229.18:09:54.30#ibcon#read 6, iclass 39, count 0 2006.229.18:09:54.30#ibcon#end of sib2, iclass 39, count 0 2006.229.18:09:54.30#ibcon#*after write, iclass 39, count 0 2006.229.18:09:54.30#ibcon#*before return 0, iclass 39, count 0 2006.229.18:09:54.30#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:54.30#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:09:54.30#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:09:54.30#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:09:54.30$vck44/vb=5,4 2006.229.18:09:54.30#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.18:09:54.30#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.18:09:54.30#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:54.30#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:54.36#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:54.36#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:54.36#ibcon#enter wrdev, iclass 3, count 2 2006.229.18:09:54.36#ibcon#first serial, iclass 3, count 2 2006.229.18:09:54.36#ibcon#enter sib2, iclass 3, count 2 2006.229.18:09:54.36#ibcon#flushed, iclass 3, count 2 2006.229.18:09:54.36#ibcon#about to write, iclass 3, count 2 2006.229.18:09:54.36#ibcon#wrote, iclass 3, count 2 2006.229.18:09:54.36#ibcon#about to read 3, iclass 3, count 2 2006.229.18:09:54.38#ibcon#read 3, iclass 3, count 2 2006.229.18:09:54.38#ibcon#about to read 4, iclass 3, count 2 2006.229.18:09:54.38#ibcon#read 4, iclass 3, count 2 2006.229.18:09:54.38#ibcon#about to read 5, iclass 3, count 2 2006.229.18:09:54.38#ibcon#read 5, iclass 3, count 2 2006.229.18:09:54.38#ibcon#about to read 6, iclass 3, count 2 2006.229.18:09:54.38#ibcon#read 6, iclass 3, count 2 2006.229.18:09:54.38#ibcon#end of sib2, iclass 3, count 2 2006.229.18:09:54.38#ibcon#*mode == 0, iclass 3, count 2 2006.229.18:09:54.38#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.18:09:54.38#ibcon#[27=AT05-04\r\n] 2006.229.18:09:54.38#ibcon#*before write, iclass 3, count 2 2006.229.18:09:54.38#ibcon#enter sib2, iclass 3, count 2 2006.229.18:09:54.38#ibcon#flushed, iclass 3, count 2 2006.229.18:09:54.38#ibcon#about to write, iclass 3, count 2 2006.229.18:09:54.38#ibcon#wrote, iclass 3, count 2 2006.229.18:09:54.38#ibcon#about to read 3, iclass 3, count 2 2006.229.18:09:54.41#ibcon#read 3, iclass 3, count 2 2006.229.18:09:54.41#ibcon#about to read 4, iclass 3, count 2 2006.229.18:09:54.41#ibcon#read 4, iclass 3, count 2 2006.229.18:09:54.41#ibcon#about to read 5, iclass 3, count 2 2006.229.18:09:54.41#ibcon#read 5, iclass 3, count 2 2006.229.18:09:54.41#ibcon#about to read 6, iclass 3, count 2 2006.229.18:09:54.41#ibcon#read 6, iclass 3, count 2 2006.229.18:09:54.41#ibcon#end of sib2, iclass 3, count 2 2006.229.18:09:54.41#ibcon#*after write, iclass 3, count 2 2006.229.18:09:54.41#ibcon#*before return 0, iclass 3, count 2 2006.229.18:09:54.41#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:54.41#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:09:54.41#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.18:09:54.41#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:54.41#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:54.53#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:54.53#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:54.53#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:09:54.53#ibcon#first serial, iclass 3, count 0 2006.229.18:09:54.53#ibcon#enter sib2, iclass 3, count 0 2006.229.18:09:54.53#ibcon#flushed, iclass 3, count 0 2006.229.18:09:54.53#ibcon#about to write, iclass 3, count 0 2006.229.18:09:54.53#ibcon#wrote, iclass 3, count 0 2006.229.18:09:54.53#ibcon#about to read 3, iclass 3, count 0 2006.229.18:09:54.55#ibcon#read 3, iclass 3, count 0 2006.229.18:09:54.55#ibcon#about to read 4, iclass 3, count 0 2006.229.18:09:54.55#ibcon#read 4, iclass 3, count 0 2006.229.18:09:54.55#ibcon#about to read 5, iclass 3, count 0 2006.229.18:09:54.55#ibcon#read 5, iclass 3, count 0 2006.229.18:09:54.55#ibcon#about to read 6, iclass 3, count 0 2006.229.18:09:54.55#ibcon#read 6, iclass 3, count 0 2006.229.18:09:54.55#ibcon#end of sib2, iclass 3, count 0 2006.229.18:09:54.55#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:09:54.55#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:09:54.55#ibcon#[27=USB\r\n] 2006.229.18:09:54.55#ibcon#*before write, iclass 3, count 0 2006.229.18:09:54.55#ibcon#enter sib2, iclass 3, count 0 2006.229.18:09:54.55#ibcon#flushed, iclass 3, count 0 2006.229.18:09:54.55#ibcon#about to write, iclass 3, count 0 2006.229.18:09:54.55#ibcon#wrote, iclass 3, count 0 2006.229.18:09:54.55#ibcon#about to read 3, iclass 3, count 0 2006.229.18:09:54.58#ibcon#read 3, iclass 3, count 0 2006.229.18:09:54.58#ibcon#about to read 4, iclass 3, count 0 2006.229.18:09:54.58#ibcon#read 4, iclass 3, count 0 2006.229.18:09:54.58#ibcon#about to read 5, iclass 3, count 0 2006.229.18:09:54.58#ibcon#read 5, iclass 3, count 0 2006.229.18:09:54.58#ibcon#about to read 6, iclass 3, count 0 2006.229.18:09:54.58#ibcon#read 6, iclass 3, count 0 2006.229.18:09:54.58#ibcon#end of sib2, iclass 3, count 0 2006.229.18:09:54.58#ibcon#*after write, iclass 3, count 0 2006.229.18:09:54.58#ibcon#*before return 0, iclass 3, count 0 2006.229.18:09:54.58#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:54.58#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:09:54.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:09:54.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:09:54.58$vck44/vblo=6,719.99 2006.229.18:09:54.58#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.18:09:54.58#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.18:09:54.58#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:54.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:54.58#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:54.58#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:54.58#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:09:54.58#ibcon#first serial, iclass 5, count 0 2006.229.18:09:54.58#ibcon#enter sib2, iclass 5, count 0 2006.229.18:09:54.58#ibcon#flushed, iclass 5, count 0 2006.229.18:09:54.58#ibcon#about to write, iclass 5, count 0 2006.229.18:09:54.58#ibcon#wrote, iclass 5, count 0 2006.229.18:09:54.58#ibcon#about to read 3, iclass 5, count 0 2006.229.18:09:54.60#ibcon#read 3, iclass 5, count 0 2006.229.18:09:54.60#ibcon#about to read 4, iclass 5, count 0 2006.229.18:09:54.60#ibcon#read 4, iclass 5, count 0 2006.229.18:09:54.60#ibcon#about to read 5, iclass 5, count 0 2006.229.18:09:54.60#ibcon#read 5, iclass 5, count 0 2006.229.18:09:54.60#ibcon#about to read 6, iclass 5, count 0 2006.229.18:09:54.60#ibcon#read 6, iclass 5, count 0 2006.229.18:09:54.60#ibcon#end of sib2, iclass 5, count 0 2006.229.18:09:54.60#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:09:54.60#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:09:54.60#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:09:54.60#ibcon#*before write, iclass 5, count 0 2006.229.18:09:54.60#ibcon#enter sib2, iclass 5, count 0 2006.229.18:09:54.60#ibcon#flushed, iclass 5, count 0 2006.229.18:09:54.60#ibcon#about to write, iclass 5, count 0 2006.229.18:09:54.60#ibcon#wrote, iclass 5, count 0 2006.229.18:09:54.60#ibcon#about to read 3, iclass 5, count 0 2006.229.18:09:54.64#ibcon#read 3, iclass 5, count 0 2006.229.18:09:54.64#ibcon#about to read 4, iclass 5, count 0 2006.229.18:09:54.64#ibcon#read 4, iclass 5, count 0 2006.229.18:09:54.64#ibcon#about to read 5, iclass 5, count 0 2006.229.18:09:54.64#ibcon#read 5, iclass 5, count 0 2006.229.18:09:54.64#ibcon#about to read 6, iclass 5, count 0 2006.229.18:09:54.64#ibcon#read 6, iclass 5, count 0 2006.229.18:09:54.64#ibcon#end of sib2, iclass 5, count 0 2006.229.18:09:54.64#ibcon#*after write, iclass 5, count 0 2006.229.18:09:54.64#ibcon#*before return 0, iclass 5, count 0 2006.229.18:09:54.64#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:54.64#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:09:54.64#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:09:54.64#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:09:54.64$vck44/vb=6,4 2006.229.18:09:54.64#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.18:09:54.64#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.18:09:54.64#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:54.64#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:54.70#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:54.70#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:54.70#ibcon#enter wrdev, iclass 7, count 2 2006.229.18:09:54.70#ibcon#first serial, iclass 7, count 2 2006.229.18:09:54.70#ibcon#enter sib2, iclass 7, count 2 2006.229.18:09:54.70#ibcon#flushed, iclass 7, count 2 2006.229.18:09:54.70#ibcon#about to write, iclass 7, count 2 2006.229.18:09:54.70#ibcon#wrote, iclass 7, count 2 2006.229.18:09:54.70#ibcon#about to read 3, iclass 7, count 2 2006.229.18:09:54.72#ibcon#read 3, iclass 7, count 2 2006.229.18:09:54.72#ibcon#about to read 4, iclass 7, count 2 2006.229.18:09:54.72#ibcon#read 4, iclass 7, count 2 2006.229.18:09:54.72#ibcon#about to read 5, iclass 7, count 2 2006.229.18:09:54.72#ibcon#read 5, iclass 7, count 2 2006.229.18:09:54.72#ibcon#about to read 6, iclass 7, count 2 2006.229.18:09:54.72#ibcon#read 6, iclass 7, count 2 2006.229.18:09:54.72#ibcon#end of sib2, iclass 7, count 2 2006.229.18:09:54.72#ibcon#*mode == 0, iclass 7, count 2 2006.229.18:09:54.72#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.18:09:54.72#ibcon#[27=AT06-04\r\n] 2006.229.18:09:54.72#ibcon#*before write, iclass 7, count 2 2006.229.18:09:54.72#ibcon#enter sib2, iclass 7, count 2 2006.229.18:09:54.72#ibcon#flushed, iclass 7, count 2 2006.229.18:09:54.72#ibcon#about to write, iclass 7, count 2 2006.229.18:09:54.72#ibcon#wrote, iclass 7, count 2 2006.229.18:09:54.72#ibcon#about to read 3, iclass 7, count 2 2006.229.18:09:54.75#ibcon#read 3, iclass 7, count 2 2006.229.18:09:54.75#ibcon#about to read 4, iclass 7, count 2 2006.229.18:09:54.75#ibcon#read 4, iclass 7, count 2 2006.229.18:09:54.75#ibcon#about to read 5, iclass 7, count 2 2006.229.18:09:54.75#ibcon#read 5, iclass 7, count 2 2006.229.18:09:54.75#ibcon#about to read 6, iclass 7, count 2 2006.229.18:09:54.75#ibcon#read 6, iclass 7, count 2 2006.229.18:09:54.75#ibcon#end of sib2, iclass 7, count 2 2006.229.18:09:54.75#ibcon#*after write, iclass 7, count 2 2006.229.18:09:54.75#ibcon#*before return 0, iclass 7, count 2 2006.229.18:09:54.75#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:54.75#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:09:54.75#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.18:09:54.75#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:54.75#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:54.87#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:54.87#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:54.87#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:09:54.87#ibcon#first serial, iclass 7, count 0 2006.229.18:09:54.87#ibcon#enter sib2, iclass 7, count 0 2006.229.18:09:54.87#ibcon#flushed, iclass 7, count 0 2006.229.18:09:54.87#ibcon#about to write, iclass 7, count 0 2006.229.18:09:54.87#ibcon#wrote, iclass 7, count 0 2006.229.18:09:54.87#ibcon#about to read 3, iclass 7, count 0 2006.229.18:09:54.89#ibcon#read 3, iclass 7, count 0 2006.229.18:09:54.89#ibcon#about to read 4, iclass 7, count 0 2006.229.18:09:54.89#ibcon#read 4, iclass 7, count 0 2006.229.18:09:54.89#ibcon#about to read 5, iclass 7, count 0 2006.229.18:09:54.89#ibcon#read 5, iclass 7, count 0 2006.229.18:09:54.89#ibcon#about to read 6, iclass 7, count 0 2006.229.18:09:54.89#ibcon#read 6, iclass 7, count 0 2006.229.18:09:54.89#ibcon#end of sib2, iclass 7, count 0 2006.229.18:09:54.89#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:09:54.89#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:09:54.89#ibcon#[27=USB\r\n] 2006.229.18:09:54.89#ibcon#*before write, iclass 7, count 0 2006.229.18:09:54.89#ibcon#enter sib2, iclass 7, count 0 2006.229.18:09:54.89#ibcon#flushed, iclass 7, count 0 2006.229.18:09:54.89#ibcon#about to write, iclass 7, count 0 2006.229.18:09:54.89#ibcon#wrote, iclass 7, count 0 2006.229.18:09:54.89#ibcon#about to read 3, iclass 7, count 0 2006.229.18:09:54.92#ibcon#read 3, iclass 7, count 0 2006.229.18:09:54.92#ibcon#about to read 4, iclass 7, count 0 2006.229.18:09:54.92#ibcon#read 4, iclass 7, count 0 2006.229.18:09:54.92#ibcon#about to read 5, iclass 7, count 0 2006.229.18:09:54.92#ibcon#read 5, iclass 7, count 0 2006.229.18:09:54.92#ibcon#about to read 6, iclass 7, count 0 2006.229.18:09:54.92#ibcon#read 6, iclass 7, count 0 2006.229.18:09:54.92#ibcon#end of sib2, iclass 7, count 0 2006.229.18:09:54.92#ibcon#*after write, iclass 7, count 0 2006.229.18:09:54.92#ibcon#*before return 0, iclass 7, count 0 2006.229.18:09:54.92#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:54.92#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:09:54.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:09:54.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:09:54.92$vck44/vblo=7,734.99 2006.229.18:09:54.92#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.18:09:54.92#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.18:09:54.92#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:54.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:54.92#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:54.92#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:54.92#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:09:54.92#ibcon#first serial, iclass 11, count 0 2006.229.18:09:54.92#ibcon#enter sib2, iclass 11, count 0 2006.229.18:09:54.92#ibcon#flushed, iclass 11, count 0 2006.229.18:09:54.92#ibcon#about to write, iclass 11, count 0 2006.229.18:09:54.92#ibcon#wrote, iclass 11, count 0 2006.229.18:09:54.92#ibcon#about to read 3, iclass 11, count 0 2006.229.18:09:54.94#ibcon#read 3, iclass 11, count 0 2006.229.18:09:54.94#ibcon#about to read 4, iclass 11, count 0 2006.229.18:09:54.94#ibcon#read 4, iclass 11, count 0 2006.229.18:09:54.94#ibcon#about to read 5, iclass 11, count 0 2006.229.18:09:54.94#ibcon#read 5, iclass 11, count 0 2006.229.18:09:54.94#ibcon#about to read 6, iclass 11, count 0 2006.229.18:09:54.94#ibcon#read 6, iclass 11, count 0 2006.229.18:09:54.94#ibcon#end of sib2, iclass 11, count 0 2006.229.18:09:54.94#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:09:54.94#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:09:54.94#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:09:54.94#ibcon#*before write, iclass 11, count 0 2006.229.18:09:54.94#ibcon#enter sib2, iclass 11, count 0 2006.229.18:09:54.94#ibcon#flushed, iclass 11, count 0 2006.229.18:09:54.94#ibcon#about to write, iclass 11, count 0 2006.229.18:09:54.94#ibcon#wrote, iclass 11, count 0 2006.229.18:09:54.94#ibcon#about to read 3, iclass 11, count 0 2006.229.18:09:54.98#ibcon#read 3, iclass 11, count 0 2006.229.18:09:54.98#ibcon#about to read 4, iclass 11, count 0 2006.229.18:09:54.98#ibcon#read 4, iclass 11, count 0 2006.229.18:09:54.98#ibcon#about to read 5, iclass 11, count 0 2006.229.18:09:54.98#ibcon#read 5, iclass 11, count 0 2006.229.18:09:54.98#ibcon#about to read 6, iclass 11, count 0 2006.229.18:09:54.98#ibcon#read 6, iclass 11, count 0 2006.229.18:09:54.98#ibcon#end of sib2, iclass 11, count 0 2006.229.18:09:54.98#ibcon#*after write, iclass 11, count 0 2006.229.18:09:54.98#ibcon#*before return 0, iclass 11, count 0 2006.229.18:09:54.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:54.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:09:54.98#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:09:54.98#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:09:54.98$vck44/vb=7,4 2006.229.18:09:54.98#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.18:09:54.98#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.18:09:54.98#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:54.98#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:55.04#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:55.04#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:55.04#ibcon#enter wrdev, iclass 13, count 2 2006.229.18:09:55.04#ibcon#first serial, iclass 13, count 2 2006.229.18:09:55.04#ibcon#enter sib2, iclass 13, count 2 2006.229.18:09:55.04#ibcon#flushed, iclass 13, count 2 2006.229.18:09:55.04#ibcon#about to write, iclass 13, count 2 2006.229.18:09:55.04#ibcon#wrote, iclass 13, count 2 2006.229.18:09:55.04#ibcon#about to read 3, iclass 13, count 2 2006.229.18:09:55.06#ibcon#read 3, iclass 13, count 2 2006.229.18:09:55.06#ibcon#about to read 4, iclass 13, count 2 2006.229.18:09:55.06#ibcon#read 4, iclass 13, count 2 2006.229.18:09:55.06#ibcon#about to read 5, iclass 13, count 2 2006.229.18:09:55.06#ibcon#read 5, iclass 13, count 2 2006.229.18:09:55.06#ibcon#about to read 6, iclass 13, count 2 2006.229.18:09:55.06#ibcon#read 6, iclass 13, count 2 2006.229.18:09:55.06#ibcon#end of sib2, iclass 13, count 2 2006.229.18:09:55.06#ibcon#*mode == 0, iclass 13, count 2 2006.229.18:09:55.06#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.18:09:55.06#ibcon#[27=AT07-04\r\n] 2006.229.18:09:55.06#ibcon#*before write, iclass 13, count 2 2006.229.18:09:55.06#ibcon#enter sib2, iclass 13, count 2 2006.229.18:09:55.06#ibcon#flushed, iclass 13, count 2 2006.229.18:09:55.06#ibcon#about to write, iclass 13, count 2 2006.229.18:09:55.06#ibcon#wrote, iclass 13, count 2 2006.229.18:09:55.06#ibcon#about to read 3, iclass 13, count 2 2006.229.18:09:55.09#ibcon#read 3, iclass 13, count 2 2006.229.18:09:55.09#ibcon#about to read 4, iclass 13, count 2 2006.229.18:09:55.09#ibcon#read 4, iclass 13, count 2 2006.229.18:09:55.09#ibcon#about to read 5, iclass 13, count 2 2006.229.18:09:55.09#ibcon#read 5, iclass 13, count 2 2006.229.18:09:55.09#ibcon#about to read 6, iclass 13, count 2 2006.229.18:09:55.09#ibcon#read 6, iclass 13, count 2 2006.229.18:09:55.09#ibcon#end of sib2, iclass 13, count 2 2006.229.18:09:55.09#ibcon#*after write, iclass 13, count 2 2006.229.18:09:55.09#ibcon#*before return 0, iclass 13, count 2 2006.229.18:09:55.09#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:55.09#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:09:55.09#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.18:09:55.09#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:55.09#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:55.21#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:55.21#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:55.21#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:09:55.21#ibcon#first serial, iclass 13, count 0 2006.229.18:09:55.21#ibcon#enter sib2, iclass 13, count 0 2006.229.18:09:55.21#ibcon#flushed, iclass 13, count 0 2006.229.18:09:55.21#ibcon#about to write, iclass 13, count 0 2006.229.18:09:55.21#ibcon#wrote, iclass 13, count 0 2006.229.18:09:55.21#ibcon#about to read 3, iclass 13, count 0 2006.229.18:09:55.23#ibcon#read 3, iclass 13, count 0 2006.229.18:09:55.23#ibcon#about to read 4, iclass 13, count 0 2006.229.18:09:55.23#ibcon#read 4, iclass 13, count 0 2006.229.18:09:55.23#ibcon#about to read 5, iclass 13, count 0 2006.229.18:09:55.23#ibcon#read 5, iclass 13, count 0 2006.229.18:09:55.23#ibcon#about to read 6, iclass 13, count 0 2006.229.18:09:55.23#ibcon#read 6, iclass 13, count 0 2006.229.18:09:55.23#ibcon#end of sib2, iclass 13, count 0 2006.229.18:09:55.23#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:09:55.23#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:09:55.23#ibcon#[27=USB\r\n] 2006.229.18:09:55.23#ibcon#*before write, iclass 13, count 0 2006.229.18:09:55.23#ibcon#enter sib2, iclass 13, count 0 2006.229.18:09:55.23#ibcon#flushed, iclass 13, count 0 2006.229.18:09:55.23#ibcon#about to write, iclass 13, count 0 2006.229.18:09:55.23#ibcon#wrote, iclass 13, count 0 2006.229.18:09:55.23#ibcon#about to read 3, iclass 13, count 0 2006.229.18:09:55.26#ibcon#read 3, iclass 13, count 0 2006.229.18:09:55.26#ibcon#about to read 4, iclass 13, count 0 2006.229.18:09:55.26#ibcon#read 4, iclass 13, count 0 2006.229.18:09:55.26#ibcon#about to read 5, iclass 13, count 0 2006.229.18:09:55.26#ibcon#read 5, iclass 13, count 0 2006.229.18:09:55.26#ibcon#about to read 6, iclass 13, count 0 2006.229.18:09:55.26#ibcon#read 6, iclass 13, count 0 2006.229.18:09:55.26#ibcon#end of sib2, iclass 13, count 0 2006.229.18:09:55.26#ibcon#*after write, iclass 13, count 0 2006.229.18:09:55.26#ibcon#*before return 0, iclass 13, count 0 2006.229.18:09:55.26#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:55.26#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:09:55.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:09:55.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:09:55.26$vck44/vblo=8,744.99 2006.229.18:09:55.26#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.18:09:55.26#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.18:09:55.26#ibcon#ireg 17 cls_cnt 0 2006.229.18:09:55.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:55.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:55.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:55.26#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:09:55.26#ibcon#first serial, iclass 15, count 0 2006.229.18:09:55.26#ibcon#enter sib2, iclass 15, count 0 2006.229.18:09:55.26#ibcon#flushed, iclass 15, count 0 2006.229.18:09:55.26#ibcon#about to write, iclass 15, count 0 2006.229.18:09:55.26#ibcon#wrote, iclass 15, count 0 2006.229.18:09:55.26#ibcon#about to read 3, iclass 15, count 0 2006.229.18:09:55.28#ibcon#read 3, iclass 15, count 0 2006.229.18:09:55.28#ibcon#about to read 4, iclass 15, count 0 2006.229.18:09:55.28#ibcon#read 4, iclass 15, count 0 2006.229.18:09:55.28#ibcon#about to read 5, iclass 15, count 0 2006.229.18:09:55.28#ibcon#read 5, iclass 15, count 0 2006.229.18:09:55.28#ibcon#about to read 6, iclass 15, count 0 2006.229.18:09:55.28#ibcon#read 6, iclass 15, count 0 2006.229.18:09:55.28#ibcon#end of sib2, iclass 15, count 0 2006.229.18:09:55.28#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:09:55.28#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:09:55.28#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:09:55.28#ibcon#*before write, iclass 15, count 0 2006.229.18:09:55.28#ibcon#enter sib2, iclass 15, count 0 2006.229.18:09:55.28#ibcon#flushed, iclass 15, count 0 2006.229.18:09:55.28#ibcon#about to write, iclass 15, count 0 2006.229.18:09:55.28#ibcon#wrote, iclass 15, count 0 2006.229.18:09:55.28#ibcon#about to read 3, iclass 15, count 0 2006.229.18:09:55.32#ibcon#read 3, iclass 15, count 0 2006.229.18:09:55.32#ibcon#about to read 4, iclass 15, count 0 2006.229.18:09:55.32#ibcon#read 4, iclass 15, count 0 2006.229.18:09:55.32#ibcon#about to read 5, iclass 15, count 0 2006.229.18:09:55.32#ibcon#read 5, iclass 15, count 0 2006.229.18:09:55.32#ibcon#about to read 6, iclass 15, count 0 2006.229.18:09:55.32#ibcon#read 6, iclass 15, count 0 2006.229.18:09:55.32#ibcon#end of sib2, iclass 15, count 0 2006.229.18:09:55.32#ibcon#*after write, iclass 15, count 0 2006.229.18:09:55.32#ibcon#*before return 0, iclass 15, count 0 2006.229.18:09:55.32#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:55.32#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:09:55.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:09:55.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:09:55.32$vck44/vb=8,4 2006.229.18:09:55.32#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.18:09:55.32#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.18:09:55.32#ibcon#ireg 11 cls_cnt 2 2006.229.18:09:55.32#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:55.38#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:55.38#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:55.38#ibcon#enter wrdev, iclass 17, count 2 2006.229.18:09:55.38#ibcon#first serial, iclass 17, count 2 2006.229.18:09:55.38#ibcon#enter sib2, iclass 17, count 2 2006.229.18:09:55.38#ibcon#flushed, iclass 17, count 2 2006.229.18:09:55.38#ibcon#about to write, iclass 17, count 2 2006.229.18:09:55.38#ibcon#wrote, iclass 17, count 2 2006.229.18:09:55.38#ibcon#about to read 3, iclass 17, count 2 2006.229.18:09:55.40#ibcon#read 3, iclass 17, count 2 2006.229.18:09:55.40#ibcon#about to read 4, iclass 17, count 2 2006.229.18:09:55.40#ibcon#read 4, iclass 17, count 2 2006.229.18:09:55.40#ibcon#about to read 5, iclass 17, count 2 2006.229.18:09:55.40#ibcon#read 5, iclass 17, count 2 2006.229.18:09:55.40#ibcon#about to read 6, iclass 17, count 2 2006.229.18:09:55.40#ibcon#read 6, iclass 17, count 2 2006.229.18:09:55.40#ibcon#end of sib2, iclass 17, count 2 2006.229.18:09:55.40#ibcon#*mode == 0, iclass 17, count 2 2006.229.18:09:55.40#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.18:09:55.40#ibcon#[27=AT08-04\r\n] 2006.229.18:09:55.40#ibcon#*before write, iclass 17, count 2 2006.229.18:09:55.40#ibcon#enter sib2, iclass 17, count 2 2006.229.18:09:55.40#ibcon#flushed, iclass 17, count 2 2006.229.18:09:55.40#ibcon#about to write, iclass 17, count 2 2006.229.18:09:55.40#ibcon#wrote, iclass 17, count 2 2006.229.18:09:55.40#ibcon#about to read 3, iclass 17, count 2 2006.229.18:09:55.43#ibcon#read 3, iclass 17, count 2 2006.229.18:09:55.43#ibcon#about to read 4, iclass 17, count 2 2006.229.18:09:55.43#ibcon#read 4, iclass 17, count 2 2006.229.18:09:55.43#ibcon#about to read 5, iclass 17, count 2 2006.229.18:09:55.43#ibcon#read 5, iclass 17, count 2 2006.229.18:09:55.43#ibcon#about to read 6, iclass 17, count 2 2006.229.18:09:55.43#ibcon#read 6, iclass 17, count 2 2006.229.18:09:55.43#ibcon#end of sib2, iclass 17, count 2 2006.229.18:09:55.43#ibcon#*after write, iclass 17, count 2 2006.229.18:09:55.43#ibcon#*before return 0, iclass 17, count 2 2006.229.18:09:55.43#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:55.43#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:09:55.43#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.18:09:55.43#ibcon#ireg 7 cls_cnt 0 2006.229.18:09:55.43#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:55.55#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:55.55#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:55.55#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:09:55.55#ibcon#first serial, iclass 17, count 0 2006.229.18:09:55.55#ibcon#enter sib2, iclass 17, count 0 2006.229.18:09:55.55#ibcon#flushed, iclass 17, count 0 2006.229.18:09:55.55#ibcon#about to write, iclass 17, count 0 2006.229.18:09:55.55#ibcon#wrote, iclass 17, count 0 2006.229.18:09:55.55#ibcon#about to read 3, iclass 17, count 0 2006.229.18:09:55.57#ibcon#read 3, iclass 17, count 0 2006.229.18:09:55.57#ibcon#about to read 4, iclass 17, count 0 2006.229.18:09:55.57#ibcon#read 4, iclass 17, count 0 2006.229.18:09:55.57#ibcon#about to read 5, iclass 17, count 0 2006.229.18:09:55.57#ibcon#read 5, iclass 17, count 0 2006.229.18:09:55.57#ibcon#about to read 6, iclass 17, count 0 2006.229.18:09:55.57#ibcon#read 6, iclass 17, count 0 2006.229.18:09:55.57#ibcon#end of sib2, iclass 17, count 0 2006.229.18:09:55.57#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:09:55.57#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:09:55.57#ibcon#[27=USB\r\n] 2006.229.18:09:55.57#ibcon#*before write, iclass 17, count 0 2006.229.18:09:55.57#ibcon#enter sib2, iclass 17, count 0 2006.229.18:09:55.57#ibcon#flushed, iclass 17, count 0 2006.229.18:09:55.57#ibcon#about to write, iclass 17, count 0 2006.229.18:09:55.57#ibcon#wrote, iclass 17, count 0 2006.229.18:09:55.57#ibcon#about to read 3, iclass 17, count 0 2006.229.18:09:55.60#ibcon#read 3, iclass 17, count 0 2006.229.18:09:55.60#ibcon#about to read 4, iclass 17, count 0 2006.229.18:09:55.60#ibcon#read 4, iclass 17, count 0 2006.229.18:09:55.60#ibcon#about to read 5, iclass 17, count 0 2006.229.18:09:55.60#ibcon#read 5, iclass 17, count 0 2006.229.18:09:55.60#ibcon#about to read 6, iclass 17, count 0 2006.229.18:09:55.60#ibcon#read 6, iclass 17, count 0 2006.229.18:09:55.60#ibcon#end of sib2, iclass 17, count 0 2006.229.18:09:55.60#ibcon#*after write, iclass 17, count 0 2006.229.18:09:55.60#ibcon#*before return 0, iclass 17, count 0 2006.229.18:09:55.60#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:55.60#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:09:55.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:09:55.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:09:55.60$vck44/vabw=wide 2006.229.18:09:55.60#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.18:09:55.60#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.18:09:55.60#ibcon#ireg 8 cls_cnt 0 2006.229.18:09:55.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:55.60#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:55.60#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:55.60#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:09:55.60#ibcon#first serial, iclass 19, count 0 2006.229.18:09:55.60#ibcon#enter sib2, iclass 19, count 0 2006.229.18:09:55.60#ibcon#flushed, iclass 19, count 0 2006.229.18:09:55.60#ibcon#about to write, iclass 19, count 0 2006.229.18:09:55.60#ibcon#wrote, iclass 19, count 0 2006.229.18:09:55.60#ibcon#about to read 3, iclass 19, count 0 2006.229.18:09:55.62#ibcon#read 3, iclass 19, count 0 2006.229.18:09:55.62#ibcon#about to read 4, iclass 19, count 0 2006.229.18:09:55.62#ibcon#read 4, iclass 19, count 0 2006.229.18:09:55.62#ibcon#about to read 5, iclass 19, count 0 2006.229.18:09:55.62#ibcon#read 5, iclass 19, count 0 2006.229.18:09:55.62#ibcon#about to read 6, iclass 19, count 0 2006.229.18:09:55.62#ibcon#read 6, iclass 19, count 0 2006.229.18:09:55.62#ibcon#end of sib2, iclass 19, count 0 2006.229.18:09:55.62#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:09:55.62#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:09:55.62#ibcon#[25=BW32\r\n] 2006.229.18:09:55.62#ibcon#*before write, iclass 19, count 0 2006.229.18:09:55.62#ibcon#enter sib2, iclass 19, count 0 2006.229.18:09:55.62#ibcon#flushed, iclass 19, count 0 2006.229.18:09:55.62#ibcon#about to write, iclass 19, count 0 2006.229.18:09:55.62#ibcon#wrote, iclass 19, count 0 2006.229.18:09:55.62#ibcon#about to read 3, iclass 19, count 0 2006.229.18:09:55.65#ibcon#read 3, iclass 19, count 0 2006.229.18:09:55.65#ibcon#about to read 4, iclass 19, count 0 2006.229.18:09:55.65#ibcon#read 4, iclass 19, count 0 2006.229.18:09:55.65#ibcon#about to read 5, iclass 19, count 0 2006.229.18:09:55.65#ibcon#read 5, iclass 19, count 0 2006.229.18:09:55.65#ibcon#about to read 6, iclass 19, count 0 2006.229.18:09:55.65#ibcon#read 6, iclass 19, count 0 2006.229.18:09:55.65#ibcon#end of sib2, iclass 19, count 0 2006.229.18:09:55.65#ibcon#*after write, iclass 19, count 0 2006.229.18:09:55.65#ibcon#*before return 0, iclass 19, count 0 2006.229.18:09:55.65#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:55.65#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:09:55.65#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:09:55.65#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:09:55.65$vck44/vbbw=wide 2006.229.18:09:55.65#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.18:09:55.65#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.18:09:55.65#ibcon#ireg 8 cls_cnt 0 2006.229.18:09:55.65#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:09:55.72#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:09:55.72#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:09:55.72#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:09:55.72#ibcon#first serial, iclass 21, count 0 2006.229.18:09:55.72#ibcon#enter sib2, iclass 21, count 0 2006.229.18:09:55.72#ibcon#flushed, iclass 21, count 0 2006.229.18:09:55.72#ibcon#about to write, iclass 21, count 0 2006.229.18:09:55.72#ibcon#wrote, iclass 21, count 0 2006.229.18:09:55.72#ibcon#about to read 3, iclass 21, count 0 2006.229.18:09:55.74#ibcon#read 3, iclass 21, count 0 2006.229.18:09:55.74#ibcon#about to read 4, iclass 21, count 0 2006.229.18:09:55.74#ibcon#read 4, iclass 21, count 0 2006.229.18:09:55.74#ibcon#about to read 5, iclass 21, count 0 2006.229.18:09:55.74#ibcon#read 5, iclass 21, count 0 2006.229.18:09:55.74#ibcon#about to read 6, iclass 21, count 0 2006.229.18:09:55.74#ibcon#read 6, iclass 21, count 0 2006.229.18:09:55.74#ibcon#end of sib2, iclass 21, count 0 2006.229.18:09:55.74#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:09:55.74#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:09:55.74#ibcon#[27=BW32\r\n] 2006.229.18:09:55.74#ibcon#*before write, iclass 21, count 0 2006.229.18:09:55.74#ibcon#enter sib2, iclass 21, count 0 2006.229.18:09:55.74#ibcon#flushed, iclass 21, count 0 2006.229.18:09:55.74#ibcon#about to write, iclass 21, count 0 2006.229.18:09:55.74#ibcon#wrote, iclass 21, count 0 2006.229.18:09:55.74#ibcon#about to read 3, iclass 21, count 0 2006.229.18:09:55.77#ibcon#read 3, iclass 21, count 0 2006.229.18:09:55.77#ibcon#about to read 4, iclass 21, count 0 2006.229.18:09:55.77#ibcon#read 4, iclass 21, count 0 2006.229.18:09:55.77#ibcon#about to read 5, iclass 21, count 0 2006.229.18:09:55.77#ibcon#read 5, iclass 21, count 0 2006.229.18:09:55.77#ibcon#about to read 6, iclass 21, count 0 2006.229.18:09:55.77#ibcon#read 6, iclass 21, count 0 2006.229.18:09:55.77#ibcon#end of sib2, iclass 21, count 0 2006.229.18:09:55.77#ibcon#*after write, iclass 21, count 0 2006.229.18:09:55.77#ibcon#*before return 0, iclass 21, count 0 2006.229.18:09:55.77#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:09:55.77#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:09:55.77#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:09:55.77#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:09:55.77$setupk4/ifdk4 2006.229.18:09:55.77$ifdk4/lo= 2006.229.18:09:55.77$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:09:55.77$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:09:55.77$ifdk4/patch= 2006.229.18:09:55.77$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:09:55.77$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:09:55.77$setupk4/!*+20s 2006.229.18:09:58.70#abcon#<5=/08 0.4 1.5 26.531001001.5\r\n> 2006.229.18:09:58.72#abcon#{5=INTERFACE CLEAR} 2006.229.18:09:58.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:10:08.14#trakl#Source acquired 2006.229.18:10:08.87#abcon#<5=/08 0.4 1.5 26.531001001.4\r\n> 2006.229.18:10:08.89#abcon#{5=INTERFACE CLEAR} 2006.229.18:10:08.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:10:10.14#flagr#flagr/antenna,acquired 2006.229.18:10:10.28$setupk4/"tpicd 2006.229.18:10:10.28$setupk4/echo=off 2006.229.18:10:10.28$setupk4/xlog=off 2006.229.18:10:10.28:!2006.229.18:12:06 2006.229.18:12:06.00:preob 2006.229.18:12:06.14/onsource/TRACKING 2006.229.18:12:06.14:!2006.229.18:12:16 2006.229.18:12:16.00:"tape 2006.229.18:12:16.00:"st=record 2006.229.18:12:16.00:data_valid=on 2006.229.18:12:16.00:midob 2006.229.18:12:16.14/onsource/TRACKING 2006.229.18:12:16.14/wx/26.52,1001.5,100 2006.229.18:12:16.34/cable/+6.4173E-03 2006.229.18:12:17.43/va/01,08,usb,yes,33,36 2006.229.18:12:17.43/va/02,07,usb,yes,36,36 2006.229.18:12:17.43/va/03,06,usb,yes,44,47 2006.229.18:12:17.43/va/04,07,usb,yes,37,39 2006.229.18:12:17.43/va/05,04,usb,yes,33,34 2006.229.18:12:17.43/va/06,04,usb,yes,37,37 2006.229.18:12:17.43/va/07,05,usb,yes,33,33 2006.229.18:12:17.43/va/08,06,usb,yes,24,29 2006.229.18:12:17.66/valo/01,524.99,yes,locked 2006.229.18:12:17.66/valo/02,534.99,yes,locked 2006.229.18:12:17.66/valo/03,564.99,yes,locked 2006.229.18:12:17.66/valo/04,624.99,yes,locked 2006.229.18:12:17.66/valo/05,734.99,yes,locked 2006.229.18:12:17.66/valo/06,814.99,yes,locked 2006.229.18:12:17.66/valo/07,864.99,yes,locked 2006.229.18:12:17.66/valo/08,884.99,yes,locked 2006.229.18:12:18.75/vb/01,04,usb,yes,31,29 2006.229.18:12:18.75/vb/02,04,usb,yes,33,33 2006.229.18:12:18.75/vb/03,04,usb,yes,30,33 2006.229.18:12:18.75/vb/04,04,usb,yes,35,34 2006.229.18:12:18.75/vb/05,04,usb,yes,27,30 2006.229.18:12:18.75/vb/06,04,usb,yes,32,28 2006.229.18:12:18.75/vb/07,04,usb,yes,31,31 2006.229.18:12:18.75/vb/08,04,usb,yes,29,32 2006.229.18:12:18.98/vblo/01,629.99,yes,locked 2006.229.18:12:18.98/vblo/02,634.99,yes,locked 2006.229.18:12:18.98/vblo/03,649.99,yes,locked 2006.229.18:12:18.98/vblo/04,679.99,yes,locked 2006.229.18:12:18.98/vblo/05,709.99,yes,locked 2006.229.18:12:18.98/vblo/06,719.99,yes,locked 2006.229.18:12:18.98/vblo/07,734.99,yes,locked 2006.229.18:12:18.98/vblo/08,744.99,yes,locked 2006.229.18:12:19.13/vabw/8 2006.229.18:12:19.28/vbbw/8 2006.229.18:12:19.37/xfe/off,on,12.2 2006.229.18:12:19.75/ifatt/23,28,28,28 2006.229.18:12:20.08/fmout-gps/S +4.51E-07 2006.229.18:12:20.12:!2006.229.18:15:06 2006.229.18:15:06.00:data_valid=off 2006.229.18:15:06.00:"et 2006.229.18:15:06.00:!+3s 2006.229.18:15:09.01:"tape 2006.229.18:15:09.01:postob 2006.229.18:15:09.14/cable/+6.4190E-03 2006.229.18:15:09.14/wx/26.49,1001.5,100 2006.229.18:15:10.08/fmout-gps/S +4.50E-07 2006.229.18:15:10.08:scan_name=229-1823,jd0608,50 2006.229.18:15:10.08:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.18:15:11.13#flagr#flagr/antenna,new-source 2006.229.18:15:11.13:checkk5 2006.229.18:15:11.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:15:11.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:15:12.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:15:12.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:15:13.09/chk_obsdata//k5ts1/T2291812??a.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.18:15:13.49/chk_obsdata//k5ts2/T2291812??b.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.18:15:13.90/chk_obsdata//k5ts3/T2291812??c.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.18:15:14.30/chk_obsdata//k5ts4/T2291812??d.dat file size is correct (nominal:680MB, actual:676MB). 2006.229.18:15:15.02/k5log//k5ts1_log_newline 2006.229.18:15:15.74/k5log//k5ts2_log_newline 2006.229.18:15:16.45/k5log//k5ts3_log_newline 2006.229.18:15:17.15/k5log//k5ts4_log_newline 2006.229.18:15:17.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:15:17.17:setupk4=1 2006.229.18:15:17.17$setupk4/echo=on 2006.229.18:15:17.17$setupk4/pcalon 2006.229.18:15:17.17$pcalon/"no phase cal control is implemented here 2006.229.18:15:17.17$setupk4/"tpicd=stop 2006.229.18:15:17.18$setupk4/"rec=synch_on 2006.229.18:15:17.18$setupk4/"rec_mode=128 2006.229.18:15:17.18$setupk4/!* 2006.229.18:15:17.18$setupk4/recpk4 2006.229.18:15:17.18$recpk4/recpatch= 2006.229.18:15:17.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:15:17.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:15:17.18$setupk4/vck44 2006.229.18:15:17.18$vck44/valo=1,524.99 2006.229.18:15:17.18#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.18:15:17.18#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.18:15:17.18#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:17.18#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:17.18#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:17.18#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:17.18#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:15:17.18#ibcon#first serial, iclass 3, count 0 2006.229.18:15:17.18#ibcon#enter sib2, iclass 3, count 0 2006.229.18:15:17.18#ibcon#flushed, iclass 3, count 0 2006.229.18:15:17.18#ibcon#about to write, iclass 3, count 0 2006.229.18:15:17.18#ibcon#wrote, iclass 3, count 0 2006.229.18:15:17.18#ibcon#about to read 3, iclass 3, count 0 2006.229.18:15:17.20#ibcon#read 3, iclass 3, count 0 2006.229.18:15:17.20#ibcon#about to read 4, iclass 3, count 0 2006.229.18:15:17.20#ibcon#read 4, iclass 3, count 0 2006.229.18:15:17.20#ibcon#about to read 5, iclass 3, count 0 2006.229.18:15:17.20#ibcon#read 5, iclass 3, count 0 2006.229.18:15:17.20#ibcon#about to read 6, iclass 3, count 0 2006.229.18:15:17.20#ibcon#read 6, iclass 3, count 0 2006.229.18:15:17.20#ibcon#end of sib2, iclass 3, count 0 2006.229.18:15:17.20#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:15:17.20#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:15:17.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:15:17.20#ibcon#*before write, iclass 3, count 0 2006.229.18:15:17.20#ibcon#enter sib2, iclass 3, count 0 2006.229.18:15:17.20#ibcon#flushed, iclass 3, count 0 2006.229.18:15:17.20#ibcon#about to write, iclass 3, count 0 2006.229.18:15:17.20#ibcon#wrote, iclass 3, count 0 2006.229.18:15:17.20#ibcon#about to read 3, iclass 3, count 0 2006.229.18:15:17.25#ibcon#read 3, iclass 3, count 0 2006.229.18:15:17.25#ibcon#about to read 4, iclass 3, count 0 2006.229.18:15:17.25#ibcon#read 4, iclass 3, count 0 2006.229.18:15:17.25#ibcon#about to read 5, iclass 3, count 0 2006.229.18:15:17.25#ibcon#read 5, iclass 3, count 0 2006.229.18:15:17.25#ibcon#about to read 6, iclass 3, count 0 2006.229.18:15:17.25#ibcon#read 6, iclass 3, count 0 2006.229.18:15:17.25#ibcon#end of sib2, iclass 3, count 0 2006.229.18:15:17.25#ibcon#*after write, iclass 3, count 0 2006.229.18:15:17.25#ibcon#*before return 0, iclass 3, count 0 2006.229.18:15:17.25#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:17.25#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:17.25#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:15:17.25#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:15:17.25$vck44/va=1,8 2006.229.18:15:17.25#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.18:15:17.25#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.18:15:17.25#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:17.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:17.25#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:17.25#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:17.25#ibcon#enter wrdev, iclass 5, count 2 2006.229.18:15:17.25#ibcon#first serial, iclass 5, count 2 2006.229.18:15:17.25#ibcon#enter sib2, iclass 5, count 2 2006.229.18:15:17.25#ibcon#flushed, iclass 5, count 2 2006.229.18:15:17.25#ibcon#about to write, iclass 5, count 2 2006.229.18:15:17.25#ibcon#wrote, iclass 5, count 2 2006.229.18:15:17.25#ibcon#about to read 3, iclass 5, count 2 2006.229.18:15:17.27#ibcon#read 3, iclass 5, count 2 2006.229.18:15:17.27#ibcon#about to read 4, iclass 5, count 2 2006.229.18:15:17.27#ibcon#read 4, iclass 5, count 2 2006.229.18:15:17.27#ibcon#about to read 5, iclass 5, count 2 2006.229.18:15:17.27#ibcon#read 5, iclass 5, count 2 2006.229.18:15:17.27#ibcon#about to read 6, iclass 5, count 2 2006.229.18:15:17.27#ibcon#read 6, iclass 5, count 2 2006.229.18:15:17.27#ibcon#end of sib2, iclass 5, count 2 2006.229.18:15:17.27#ibcon#*mode == 0, iclass 5, count 2 2006.229.18:15:17.27#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.18:15:17.27#ibcon#[25=AT01-08\r\n] 2006.229.18:15:17.27#ibcon#*before write, iclass 5, count 2 2006.229.18:15:17.27#ibcon#enter sib2, iclass 5, count 2 2006.229.18:15:17.27#ibcon#flushed, iclass 5, count 2 2006.229.18:15:17.27#ibcon#about to write, iclass 5, count 2 2006.229.18:15:17.27#ibcon#wrote, iclass 5, count 2 2006.229.18:15:17.27#ibcon#about to read 3, iclass 5, count 2 2006.229.18:15:17.30#ibcon#read 3, iclass 5, count 2 2006.229.18:15:17.30#ibcon#about to read 4, iclass 5, count 2 2006.229.18:15:17.30#ibcon#read 4, iclass 5, count 2 2006.229.18:15:17.30#ibcon#about to read 5, iclass 5, count 2 2006.229.18:15:17.30#ibcon#read 5, iclass 5, count 2 2006.229.18:15:17.30#ibcon#about to read 6, iclass 5, count 2 2006.229.18:15:17.30#ibcon#read 6, iclass 5, count 2 2006.229.18:15:17.30#ibcon#end of sib2, iclass 5, count 2 2006.229.18:15:17.30#ibcon#*after write, iclass 5, count 2 2006.229.18:15:17.30#ibcon#*before return 0, iclass 5, count 2 2006.229.18:15:17.30#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:17.30#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:17.30#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.18:15:17.30#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:17.30#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:17.42#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:17.42#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:17.42#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:15:17.42#ibcon#first serial, iclass 5, count 0 2006.229.18:15:17.42#ibcon#enter sib2, iclass 5, count 0 2006.229.18:15:17.42#ibcon#flushed, iclass 5, count 0 2006.229.18:15:17.42#ibcon#about to write, iclass 5, count 0 2006.229.18:15:17.42#ibcon#wrote, iclass 5, count 0 2006.229.18:15:17.42#ibcon#about to read 3, iclass 5, count 0 2006.229.18:15:17.44#ibcon#read 3, iclass 5, count 0 2006.229.18:15:17.44#ibcon#about to read 4, iclass 5, count 0 2006.229.18:15:17.44#ibcon#read 4, iclass 5, count 0 2006.229.18:15:17.44#ibcon#about to read 5, iclass 5, count 0 2006.229.18:15:17.44#ibcon#read 5, iclass 5, count 0 2006.229.18:15:17.44#ibcon#about to read 6, iclass 5, count 0 2006.229.18:15:17.44#ibcon#read 6, iclass 5, count 0 2006.229.18:15:17.44#ibcon#end of sib2, iclass 5, count 0 2006.229.18:15:17.44#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:15:17.44#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:15:17.44#ibcon#[25=USB\r\n] 2006.229.18:15:17.44#ibcon#*before write, iclass 5, count 0 2006.229.18:15:17.44#ibcon#enter sib2, iclass 5, count 0 2006.229.18:15:17.44#ibcon#flushed, iclass 5, count 0 2006.229.18:15:17.44#ibcon#about to write, iclass 5, count 0 2006.229.18:15:17.44#ibcon#wrote, iclass 5, count 0 2006.229.18:15:17.44#ibcon#about to read 3, iclass 5, count 0 2006.229.18:15:17.47#ibcon#read 3, iclass 5, count 0 2006.229.18:15:17.47#ibcon#about to read 4, iclass 5, count 0 2006.229.18:15:17.47#ibcon#read 4, iclass 5, count 0 2006.229.18:15:17.47#ibcon#about to read 5, iclass 5, count 0 2006.229.18:15:17.47#ibcon#read 5, iclass 5, count 0 2006.229.18:15:17.47#ibcon#about to read 6, iclass 5, count 0 2006.229.18:15:17.47#ibcon#read 6, iclass 5, count 0 2006.229.18:15:17.47#ibcon#end of sib2, iclass 5, count 0 2006.229.18:15:17.47#ibcon#*after write, iclass 5, count 0 2006.229.18:15:17.47#ibcon#*before return 0, iclass 5, count 0 2006.229.18:15:17.47#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:17.47#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:17.47#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:15:17.47#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:15:17.47$vck44/valo=2,534.99 2006.229.18:15:17.47#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.18:15:17.47#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.18:15:17.47#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:17.47#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:17.47#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:17.47#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:17.47#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:15:17.47#ibcon#first serial, iclass 7, count 0 2006.229.18:15:17.47#ibcon#enter sib2, iclass 7, count 0 2006.229.18:15:17.47#ibcon#flushed, iclass 7, count 0 2006.229.18:15:17.47#ibcon#about to write, iclass 7, count 0 2006.229.18:15:17.47#ibcon#wrote, iclass 7, count 0 2006.229.18:15:17.47#ibcon#about to read 3, iclass 7, count 0 2006.229.18:15:17.49#ibcon#read 3, iclass 7, count 0 2006.229.18:15:17.49#ibcon#about to read 4, iclass 7, count 0 2006.229.18:15:17.49#ibcon#read 4, iclass 7, count 0 2006.229.18:15:17.49#ibcon#about to read 5, iclass 7, count 0 2006.229.18:15:17.49#ibcon#read 5, iclass 7, count 0 2006.229.18:15:17.49#ibcon#about to read 6, iclass 7, count 0 2006.229.18:15:17.49#ibcon#read 6, iclass 7, count 0 2006.229.18:15:17.49#ibcon#end of sib2, iclass 7, count 0 2006.229.18:15:17.49#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:15:17.49#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:15:17.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:15:17.49#ibcon#*before write, iclass 7, count 0 2006.229.18:15:17.49#ibcon#enter sib2, iclass 7, count 0 2006.229.18:15:17.49#ibcon#flushed, iclass 7, count 0 2006.229.18:15:17.49#ibcon#about to write, iclass 7, count 0 2006.229.18:15:17.49#ibcon#wrote, iclass 7, count 0 2006.229.18:15:17.49#ibcon#about to read 3, iclass 7, count 0 2006.229.18:15:17.53#ibcon#read 3, iclass 7, count 0 2006.229.18:15:17.53#ibcon#about to read 4, iclass 7, count 0 2006.229.18:15:17.53#ibcon#read 4, iclass 7, count 0 2006.229.18:15:17.53#ibcon#about to read 5, iclass 7, count 0 2006.229.18:15:17.53#ibcon#read 5, iclass 7, count 0 2006.229.18:15:17.53#ibcon#about to read 6, iclass 7, count 0 2006.229.18:15:17.53#ibcon#read 6, iclass 7, count 0 2006.229.18:15:17.53#ibcon#end of sib2, iclass 7, count 0 2006.229.18:15:17.53#ibcon#*after write, iclass 7, count 0 2006.229.18:15:17.53#ibcon#*before return 0, iclass 7, count 0 2006.229.18:15:17.53#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:17.53#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:17.53#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:15:17.53#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:15:17.53$vck44/va=2,7 2006.229.18:15:17.53#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.18:15:17.53#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.18:15:17.53#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:17.53#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:17.59#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:17.59#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:17.59#ibcon#enter wrdev, iclass 11, count 2 2006.229.18:15:17.59#ibcon#first serial, iclass 11, count 2 2006.229.18:15:17.59#ibcon#enter sib2, iclass 11, count 2 2006.229.18:15:17.59#ibcon#flushed, iclass 11, count 2 2006.229.18:15:17.59#ibcon#about to write, iclass 11, count 2 2006.229.18:15:17.59#ibcon#wrote, iclass 11, count 2 2006.229.18:15:17.59#ibcon#about to read 3, iclass 11, count 2 2006.229.18:15:17.61#ibcon#read 3, iclass 11, count 2 2006.229.18:15:17.61#ibcon#about to read 4, iclass 11, count 2 2006.229.18:15:17.61#ibcon#read 4, iclass 11, count 2 2006.229.18:15:17.61#ibcon#about to read 5, iclass 11, count 2 2006.229.18:15:17.61#ibcon#read 5, iclass 11, count 2 2006.229.18:15:17.61#ibcon#about to read 6, iclass 11, count 2 2006.229.18:15:17.61#ibcon#read 6, iclass 11, count 2 2006.229.18:15:17.61#ibcon#end of sib2, iclass 11, count 2 2006.229.18:15:17.61#ibcon#*mode == 0, iclass 11, count 2 2006.229.18:15:17.61#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.18:15:17.61#ibcon#[25=AT02-07\r\n] 2006.229.18:15:17.61#ibcon#*before write, iclass 11, count 2 2006.229.18:15:17.61#ibcon#enter sib2, iclass 11, count 2 2006.229.18:15:17.61#ibcon#flushed, iclass 11, count 2 2006.229.18:15:17.61#ibcon#about to write, iclass 11, count 2 2006.229.18:15:17.61#ibcon#wrote, iclass 11, count 2 2006.229.18:15:17.61#ibcon#about to read 3, iclass 11, count 2 2006.229.18:15:17.64#ibcon#read 3, iclass 11, count 2 2006.229.18:15:17.64#ibcon#about to read 4, iclass 11, count 2 2006.229.18:15:17.64#ibcon#read 4, iclass 11, count 2 2006.229.18:15:17.64#ibcon#about to read 5, iclass 11, count 2 2006.229.18:15:17.64#ibcon#read 5, iclass 11, count 2 2006.229.18:15:17.64#ibcon#about to read 6, iclass 11, count 2 2006.229.18:15:17.64#ibcon#read 6, iclass 11, count 2 2006.229.18:15:17.64#ibcon#end of sib2, iclass 11, count 2 2006.229.18:15:17.64#ibcon#*after write, iclass 11, count 2 2006.229.18:15:17.64#ibcon#*before return 0, iclass 11, count 2 2006.229.18:15:17.64#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:17.64#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:17.64#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.18:15:17.64#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:17.64#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:17.76#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:17.76#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:17.76#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:15:17.76#ibcon#first serial, iclass 11, count 0 2006.229.18:15:17.76#ibcon#enter sib2, iclass 11, count 0 2006.229.18:15:17.76#ibcon#flushed, iclass 11, count 0 2006.229.18:15:17.76#ibcon#about to write, iclass 11, count 0 2006.229.18:15:17.76#ibcon#wrote, iclass 11, count 0 2006.229.18:15:17.76#ibcon#about to read 3, iclass 11, count 0 2006.229.18:15:17.78#ibcon#read 3, iclass 11, count 0 2006.229.18:15:17.78#ibcon#about to read 4, iclass 11, count 0 2006.229.18:15:17.78#ibcon#read 4, iclass 11, count 0 2006.229.18:15:17.78#ibcon#about to read 5, iclass 11, count 0 2006.229.18:15:17.78#ibcon#read 5, iclass 11, count 0 2006.229.18:15:17.78#ibcon#about to read 6, iclass 11, count 0 2006.229.18:15:17.78#ibcon#read 6, iclass 11, count 0 2006.229.18:15:17.78#ibcon#end of sib2, iclass 11, count 0 2006.229.18:15:17.78#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:15:17.78#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:15:17.78#ibcon#[25=USB\r\n] 2006.229.18:15:17.78#ibcon#*before write, iclass 11, count 0 2006.229.18:15:17.78#ibcon#enter sib2, iclass 11, count 0 2006.229.18:15:17.78#ibcon#flushed, iclass 11, count 0 2006.229.18:15:17.78#ibcon#about to write, iclass 11, count 0 2006.229.18:15:17.78#ibcon#wrote, iclass 11, count 0 2006.229.18:15:17.78#ibcon#about to read 3, iclass 11, count 0 2006.229.18:15:17.81#ibcon#read 3, iclass 11, count 0 2006.229.18:15:17.81#ibcon#about to read 4, iclass 11, count 0 2006.229.18:15:17.81#ibcon#read 4, iclass 11, count 0 2006.229.18:15:17.81#ibcon#about to read 5, iclass 11, count 0 2006.229.18:15:17.81#ibcon#read 5, iclass 11, count 0 2006.229.18:15:17.81#ibcon#about to read 6, iclass 11, count 0 2006.229.18:15:17.81#ibcon#read 6, iclass 11, count 0 2006.229.18:15:17.81#ibcon#end of sib2, iclass 11, count 0 2006.229.18:15:17.81#ibcon#*after write, iclass 11, count 0 2006.229.18:15:17.81#ibcon#*before return 0, iclass 11, count 0 2006.229.18:15:17.81#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:17.81#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:17.81#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:15:17.81#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:15:17.81$vck44/valo=3,564.99 2006.229.18:15:17.81#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.18:15:17.81#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.18:15:17.81#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:17.81#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:17.81#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:17.81#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:17.81#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:15:17.81#ibcon#first serial, iclass 13, count 0 2006.229.18:15:17.81#ibcon#enter sib2, iclass 13, count 0 2006.229.18:15:17.81#ibcon#flushed, iclass 13, count 0 2006.229.18:15:17.81#ibcon#about to write, iclass 13, count 0 2006.229.18:15:17.81#ibcon#wrote, iclass 13, count 0 2006.229.18:15:17.81#ibcon#about to read 3, iclass 13, count 0 2006.229.18:15:17.83#ibcon#read 3, iclass 13, count 0 2006.229.18:15:17.83#ibcon#about to read 4, iclass 13, count 0 2006.229.18:15:17.83#ibcon#read 4, iclass 13, count 0 2006.229.18:15:17.83#ibcon#about to read 5, iclass 13, count 0 2006.229.18:15:17.83#ibcon#read 5, iclass 13, count 0 2006.229.18:15:17.83#ibcon#about to read 6, iclass 13, count 0 2006.229.18:15:17.83#ibcon#read 6, iclass 13, count 0 2006.229.18:15:17.83#ibcon#end of sib2, iclass 13, count 0 2006.229.18:15:17.83#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:15:17.83#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:15:17.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:15:17.83#ibcon#*before write, iclass 13, count 0 2006.229.18:15:17.83#ibcon#enter sib2, iclass 13, count 0 2006.229.18:15:17.83#ibcon#flushed, iclass 13, count 0 2006.229.18:15:17.83#ibcon#about to write, iclass 13, count 0 2006.229.18:15:17.83#ibcon#wrote, iclass 13, count 0 2006.229.18:15:17.83#ibcon#about to read 3, iclass 13, count 0 2006.229.18:15:17.87#ibcon#read 3, iclass 13, count 0 2006.229.18:15:17.87#ibcon#about to read 4, iclass 13, count 0 2006.229.18:15:17.87#ibcon#read 4, iclass 13, count 0 2006.229.18:15:17.87#ibcon#about to read 5, iclass 13, count 0 2006.229.18:15:17.87#ibcon#read 5, iclass 13, count 0 2006.229.18:15:17.87#ibcon#about to read 6, iclass 13, count 0 2006.229.18:15:17.87#ibcon#read 6, iclass 13, count 0 2006.229.18:15:17.87#ibcon#end of sib2, iclass 13, count 0 2006.229.18:15:17.87#ibcon#*after write, iclass 13, count 0 2006.229.18:15:17.87#ibcon#*before return 0, iclass 13, count 0 2006.229.18:15:17.87#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:17.87#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:17.87#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:15:17.87#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:15:17.87$vck44/va=3,6 2006.229.18:15:17.87#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.18:15:17.87#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.18:15:17.87#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:17.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:17.93#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:17.93#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:17.93#ibcon#enter wrdev, iclass 15, count 2 2006.229.18:15:17.93#ibcon#first serial, iclass 15, count 2 2006.229.18:15:17.93#ibcon#enter sib2, iclass 15, count 2 2006.229.18:15:17.93#ibcon#flushed, iclass 15, count 2 2006.229.18:15:17.93#ibcon#about to write, iclass 15, count 2 2006.229.18:15:17.93#ibcon#wrote, iclass 15, count 2 2006.229.18:15:17.93#ibcon#about to read 3, iclass 15, count 2 2006.229.18:15:17.95#ibcon#read 3, iclass 15, count 2 2006.229.18:15:17.95#ibcon#about to read 4, iclass 15, count 2 2006.229.18:15:17.95#ibcon#read 4, iclass 15, count 2 2006.229.18:15:17.95#ibcon#about to read 5, iclass 15, count 2 2006.229.18:15:17.95#ibcon#read 5, iclass 15, count 2 2006.229.18:15:17.95#ibcon#about to read 6, iclass 15, count 2 2006.229.18:15:17.95#ibcon#read 6, iclass 15, count 2 2006.229.18:15:17.95#ibcon#end of sib2, iclass 15, count 2 2006.229.18:15:17.95#ibcon#*mode == 0, iclass 15, count 2 2006.229.18:15:17.95#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.18:15:17.95#ibcon#[25=AT03-06\r\n] 2006.229.18:15:17.95#ibcon#*before write, iclass 15, count 2 2006.229.18:15:17.95#ibcon#enter sib2, iclass 15, count 2 2006.229.18:15:17.95#ibcon#flushed, iclass 15, count 2 2006.229.18:15:17.95#ibcon#about to write, iclass 15, count 2 2006.229.18:15:17.95#ibcon#wrote, iclass 15, count 2 2006.229.18:15:17.95#ibcon#about to read 3, iclass 15, count 2 2006.229.18:15:17.98#ibcon#read 3, iclass 15, count 2 2006.229.18:15:17.98#ibcon#about to read 4, iclass 15, count 2 2006.229.18:15:17.98#ibcon#read 4, iclass 15, count 2 2006.229.18:15:17.98#ibcon#about to read 5, iclass 15, count 2 2006.229.18:15:17.98#ibcon#read 5, iclass 15, count 2 2006.229.18:15:17.98#ibcon#about to read 6, iclass 15, count 2 2006.229.18:15:17.98#ibcon#read 6, iclass 15, count 2 2006.229.18:15:17.98#ibcon#end of sib2, iclass 15, count 2 2006.229.18:15:17.98#ibcon#*after write, iclass 15, count 2 2006.229.18:15:17.98#ibcon#*before return 0, iclass 15, count 2 2006.229.18:15:17.98#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:17.98#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:17.98#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.18:15:17.98#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:17.98#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:18.10#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:18.10#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:18.10#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:15:18.10#ibcon#first serial, iclass 15, count 0 2006.229.18:15:18.10#ibcon#enter sib2, iclass 15, count 0 2006.229.18:15:18.10#ibcon#flushed, iclass 15, count 0 2006.229.18:15:18.10#ibcon#about to write, iclass 15, count 0 2006.229.18:15:18.10#ibcon#wrote, iclass 15, count 0 2006.229.18:15:18.10#ibcon#about to read 3, iclass 15, count 0 2006.229.18:15:18.12#ibcon#read 3, iclass 15, count 0 2006.229.18:15:18.12#ibcon#about to read 4, iclass 15, count 0 2006.229.18:15:18.12#ibcon#read 4, iclass 15, count 0 2006.229.18:15:18.12#ibcon#about to read 5, iclass 15, count 0 2006.229.18:15:18.12#ibcon#read 5, iclass 15, count 0 2006.229.18:15:18.12#ibcon#about to read 6, iclass 15, count 0 2006.229.18:15:18.12#ibcon#read 6, iclass 15, count 0 2006.229.18:15:18.12#ibcon#end of sib2, iclass 15, count 0 2006.229.18:15:18.12#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:15:18.12#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:15:18.12#ibcon#[25=USB\r\n] 2006.229.18:15:18.12#ibcon#*before write, iclass 15, count 0 2006.229.18:15:18.12#ibcon#enter sib2, iclass 15, count 0 2006.229.18:15:18.12#ibcon#flushed, iclass 15, count 0 2006.229.18:15:18.12#ibcon#about to write, iclass 15, count 0 2006.229.18:15:18.12#ibcon#wrote, iclass 15, count 0 2006.229.18:15:18.12#ibcon#about to read 3, iclass 15, count 0 2006.229.18:15:18.15#ibcon#read 3, iclass 15, count 0 2006.229.18:15:18.15#ibcon#about to read 4, iclass 15, count 0 2006.229.18:15:18.15#ibcon#read 4, iclass 15, count 0 2006.229.18:15:18.15#ibcon#about to read 5, iclass 15, count 0 2006.229.18:15:18.15#ibcon#read 5, iclass 15, count 0 2006.229.18:15:18.15#ibcon#about to read 6, iclass 15, count 0 2006.229.18:15:18.15#ibcon#read 6, iclass 15, count 0 2006.229.18:15:18.15#ibcon#end of sib2, iclass 15, count 0 2006.229.18:15:18.15#ibcon#*after write, iclass 15, count 0 2006.229.18:15:18.15#ibcon#*before return 0, iclass 15, count 0 2006.229.18:15:18.15#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:18.15#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:18.15#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:15:18.15#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:15:18.15$vck44/valo=4,624.99 2006.229.18:15:18.15#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.18:15:18.15#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.18:15:18.15#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:18.15#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:18.15#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:18.15#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:18.15#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:15:18.15#ibcon#first serial, iclass 17, count 0 2006.229.18:15:18.15#ibcon#enter sib2, iclass 17, count 0 2006.229.18:15:18.15#ibcon#flushed, iclass 17, count 0 2006.229.18:15:18.15#ibcon#about to write, iclass 17, count 0 2006.229.18:15:18.15#ibcon#wrote, iclass 17, count 0 2006.229.18:15:18.15#ibcon#about to read 3, iclass 17, count 0 2006.229.18:15:18.17#ibcon#read 3, iclass 17, count 0 2006.229.18:15:18.17#ibcon#about to read 4, iclass 17, count 0 2006.229.18:15:18.17#ibcon#read 4, iclass 17, count 0 2006.229.18:15:18.17#ibcon#about to read 5, iclass 17, count 0 2006.229.18:15:18.17#ibcon#read 5, iclass 17, count 0 2006.229.18:15:18.17#ibcon#about to read 6, iclass 17, count 0 2006.229.18:15:18.17#ibcon#read 6, iclass 17, count 0 2006.229.18:15:18.17#ibcon#end of sib2, iclass 17, count 0 2006.229.18:15:18.17#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:15:18.17#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:15:18.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:15:18.17#ibcon#*before write, iclass 17, count 0 2006.229.18:15:18.17#ibcon#enter sib2, iclass 17, count 0 2006.229.18:15:18.17#ibcon#flushed, iclass 17, count 0 2006.229.18:15:18.17#ibcon#about to write, iclass 17, count 0 2006.229.18:15:18.17#ibcon#wrote, iclass 17, count 0 2006.229.18:15:18.17#ibcon#about to read 3, iclass 17, count 0 2006.229.18:15:18.21#ibcon#read 3, iclass 17, count 0 2006.229.18:15:18.21#ibcon#about to read 4, iclass 17, count 0 2006.229.18:15:18.21#ibcon#read 4, iclass 17, count 0 2006.229.18:15:18.21#ibcon#about to read 5, iclass 17, count 0 2006.229.18:15:18.21#ibcon#read 5, iclass 17, count 0 2006.229.18:15:18.21#ibcon#about to read 6, iclass 17, count 0 2006.229.18:15:18.21#ibcon#read 6, iclass 17, count 0 2006.229.18:15:18.21#ibcon#end of sib2, iclass 17, count 0 2006.229.18:15:18.21#ibcon#*after write, iclass 17, count 0 2006.229.18:15:18.21#ibcon#*before return 0, iclass 17, count 0 2006.229.18:15:18.21#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:18.21#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:18.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:15:18.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:15:18.21$vck44/va=4,7 2006.229.18:15:18.21#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.18:15:18.21#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.18:15:18.21#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:18.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:18.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:18.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:18.27#ibcon#enter wrdev, iclass 19, count 2 2006.229.18:15:18.27#ibcon#first serial, iclass 19, count 2 2006.229.18:15:18.27#ibcon#enter sib2, iclass 19, count 2 2006.229.18:15:18.27#ibcon#flushed, iclass 19, count 2 2006.229.18:15:18.27#ibcon#about to write, iclass 19, count 2 2006.229.18:15:18.27#ibcon#wrote, iclass 19, count 2 2006.229.18:15:18.27#ibcon#about to read 3, iclass 19, count 2 2006.229.18:15:18.29#ibcon#read 3, iclass 19, count 2 2006.229.18:15:18.29#ibcon#about to read 4, iclass 19, count 2 2006.229.18:15:18.29#ibcon#read 4, iclass 19, count 2 2006.229.18:15:18.29#ibcon#about to read 5, iclass 19, count 2 2006.229.18:15:18.29#ibcon#read 5, iclass 19, count 2 2006.229.18:15:18.29#ibcon#about to read 6, iclass 19, count 2 2006.229.18:15:18.29#ibcon#read 6, iclass 19, count 2 2006.229.18:15:18.29#ibcon#end of sib2, iclass 19, count 2 2006.229.18:15:18.29#ibcon#*mode == 0, iclass 19, count 2 2006.229.18:15:18.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.18:15:18.29#ibcon#[25=AT04-07\r\n] 2006.229.18:15:18.29#ibcon#*before write, iclass 19, count 2 2006.229.18:15:18.29#ibcon#enter sib2, iclass 19, count 2 2006.229.18:15:18.29#ibcon#flushed, iclass 19, count 2 2006.229.18:15:18.29#ibcon#about to write, iclass 19, count 2 2006.229.18:15:18.29#ibcon#wrote, iclass 19, count 2 2006.229.18:15:18.29#ibcon#about to read 3, iclass 19, count 2 2006.229.18:15:18.32#ibcon#read 3, iclass 19, count 2 2006.229.18:15:18.32#ibcon#about to read 4, iclass 19, count 2 2006.229.18:15:18.32#ibcon#read 4, iclass 19, count 2 2006.229.18:15:18.32#ibcon#about to read 5, iclass 19, count 2 2006.229.18:15:18.32#ibcon#read 5, iclass 19, count 2 2006.229.18:15:18.32#ibcon#about to read 6, iclass 19, count 2 2006.229.18:15:18.32#ibcon#read 6, iclass 19, count 2 2006.229.18:15:18.32#ibcon#end of sib2, iclass 19, count 2 2006.229.18:15:18.32#ibcon#*after write, iclass 19, count 2 2006.229.18:15:18.32#ibcon#*before return 0, iclass 19, count 2 2006.229.18:15:18.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:18.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:18.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.18:15:18.32#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:18.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:18.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:18.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:18.44#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:15:18.44#ibcon#first serial, iclass 19, count 0 2006.229.18:15:18.44#ibcon#enter sib2, iclass 19, count 0 2006.229.18:15:18.44#ibcon#flushed, iclass 19, count 0 2006.229.18:15:18.44#ibcon#about to write, iclass 19, count 0 2006.229.18:15:18.44#ibcon#wrote, iclass 19, count 0 2006.229.18:15:18.44#ibcon#about to read 3, iclass 19, count 0 2006.229.18:15:18.46#ibcon#read 3, iclass 19, count 0 2006.229.18:15:18.46#ibcon#about to read 4, iclass 19, count 0 2006.229.18:15:18.46#ibcon#read 4, iclass 19, count 0 2006.229.18:15:18.46#ibcon#about to read 5, iclass 19, count 0 2006.229.18:15:18.46#ibcon#read 5, iclass 19, count 0 2006.229.18:15:18.46#ibcon#about to read 6, iclass 19, count 0 2006.229.18:15:18.46#ibcon#read 6, iclass 19, count 0 2006.229.18:15:18.46#ibcon#end of sib2, iclass 19, count 0 2006.229.18:15:18.46#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:15:18.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:15:18.46#ibcon#[25=USB\r\n] 2006.229.18:15:18.46#ibcon#*before write, iclass 19, count 0 2006.229.18:15:18.46#ibcon#enter sib2, iclass 19, count 0 2006.229.18:15:18.46#ibcon#flushed, iclass 19, count 0 2006.229.18:15:18.46#ibcon#about to write, iclass 19, count 0 2006.229.18:15:18.46#ibcon#wrote, iclass 19, count 0 2006.229.18:15:18.46#ibcon#about to read 3, iclass 19, count 0 2006.229.18:15:18.49#ibcon#read 3, iclass 19, count 0 2006.229.18:15:18.49#ibcon#about to read 4, iclass 19, count 0 2006.229.18:15:18.49#ibcon#read 4, iclass 19, count 0 2006.229.18:15:18.49#ibcon#about to read 5, iclass 19, count 0 2006.229.18:15:18.49#ibcon#read 5, iclass 19, count 0 2006.229.18:15:18.49#ibcon#about to read 6, iclass 19, count 0 2006.229.18:15:18.49#ibcon#read 6, iclass 19, count 0 2006.229.18:15:18.49#ibcon#end of sib2, iclass 19, count 0 2006.229.18:15:18.49#ibcon#*after write, iclass 19, count 0 2006.229.18:15:18.49#ibcon#*before return 0, iclass 19, count 0 2006.229.18:15:18.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:18.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:18.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:15:18.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:15:18.49$vck44/valo=5,734.99 2006.229.18:15:18.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.18:15:18.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.18:15:18.49#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:18.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:18.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:18.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:18.49#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:15:18.49#ibcon#first serial, iclass 21, count 0 2006.229.18:15:18.49#ibcon#enter sib2, iclass 21, count 0 2006.229.18:15:18.49#ibcon#flushed, iclass 21, count 0 2006.229.18:15:18.49#ibcon#about to write, iclass 21, count 0 2006.229.18:15:18.49#ibcon#wrote, iclass 21, count 0 2006.229.18:15:18.49#ibcon#about to read 3, iclass 21, count 0 2006.229.18:15:18.51#ibcon#read 3, iclass 21, count 0 2006.229.18:15:18.51#ibcon#about to read 4, iclass 21, count 0 2006.229.18:15:18.51#ibcon#read 4, iclass 21, count 0 2006.229.18:15:18.51#ibcon#about to read 5, iclass 21, count 0 2006.229.18:15:18.51#ibcon#read 5, iclass 21, count 0 2006.229.18:15:18.51#ibcon#about to read 6, iclass 21, count 0 2006.229.18:15:18.51#ibcon#read 6, iclass 21, count 0 2006.229.18:15:18.51#ibcon#end of sib2, iclass 21, count 0 2006.229.18:15:18.51#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:15:18.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:15:18.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:15:18.51#ibcon#*before write, iclass 21, count 0 2006.229.18:15:18.51#ibcon#enter sib2, iclass 21, count 0 2006.229.18:15:18.51#ibcon#flushed, iclass 21, count 0 2006.229.18:15:18.51#ibcon#about to write, iclass 21, count 0 2006.229.18:15:18.51#ibcon#wrote, iclass 21, count 0 2006.229.18:15:18.51#ibcon#about to read 3, iclass 21, count 0 2006.229.18:15:18.55#ibcon#read 3, iclass 21, count 0 2006.229.18:15:18.55#ibcon#about to read 4, iclass 21, count 0 2006.229.18:15:18.55#ibcon#read 4, iclass 21, count 0 2006.229.18:15:18.55#ibcon#about to read 5, iclass 21, count 0 2006.229.18:15:18.55#ibcon#read 5, iclass 21, count 0 2006.229.18:15:18.55#ibcon#about to read 6, iclass 21, count 0 2006.229.18:15:18.55#ibcon#read 6, iclass 21, count 0 2006.229.18:15:18.55#ibcon#end of sib2, iclass 21, count 0 2006.229.18:15:18.55#ibcon#*after write, iclass 21, count 0 2006.229.18:15:18.55#ibcon#*before return 0, iclass 21, count 0 2006.229.18:15:18.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:18.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:18.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:15:18.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:15:18.55$vck44/va=5,4 2006.229.18:15:18.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.18:15:18.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.18:15:18.55#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:18.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:18.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:18.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:18.61#ibcon#enter wrdev, iclass 23, count 2 2006.229.18:15:18.61#ibcon#first serial, iclass 23, count 2 2006.229.18:15:18.61#ibcon#enter sib2, iclass 23, count 2 2006.229.18:15:18.61#ibcon#flushed, iclass 23, count 2 2006.229.18:15:18.61#ibcon#about to write, iclass 23, count 2 2006.229.18:15:18.61#ibcon#wrote, iclass 23, count 2 2006.229.18:15:18.61#ibcon#about to read 3, iclass 23, count 2 2006.229.18:15:18.63#ibcon#read 3, iclass 23, count 2 2006.229.18:15:18.63#ibcon#about to read 4, iclass 23, count 2 2006.229.18:15:18.63#ibcon#read 4, iclass 23, count 2 2006.229.18:15:18.63#ibcon#about to read 5, iclass 23, count 2 2006.229.18:15:18.63#ibcon#read 5, iclass 23, count 2 2006.229.18:15:18.63#ibcon#about to read 6, iclass 23, count 2 2006.229.18:15:18.63#ibcon#read 6, iclass 23, count 2 2006.229.18:15:18.63#ibcon#end of sib2, iclass 23, count 2 2006.229.18:15:18.63#ibcon#*mode == 0, iclass 23, count 2 2006.229.18:15:18.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.18:15:18.63#ibcon#[25=AT05-04\r\n] 2006.229.18:15:18.63#ibcon#*before write, iclass 23, count 2 2006.229.18:15:18.63#ibcon#enter sib2, iclass 23, count 2 2006.229.18:15:18.63#ibcon#flushed, iclass 23, count 2 2006.229.18:15:18.63#ibcon#about to write, iclass 23, count 2 2006.229.18:15:18.63#ibcon#wrote, iclass 23, count 2 2006.229.18:15:18.63#ibcon#about to read 3, iclass 23, count 2 2006.229.18:15:18.66#ibcon#read 3, iclass 23, count 2 2006.229.18:15:18.66#ibcon#about to read 4, iclass 23, count 2 2006.229.18:15:18.66#ibcon#read 4, iclass 23, count 2 2006.229.18:15:18.66#ibcon#about to read 5, iclass 23, count 2 2006.229.18:15:18.66#ibcon#read 5, iclass 23, count 2 2006.229.18:15:18.66#ibcon#about to read 6, iclass 23, count 2 2006.229.18:15:18.66#ibcon#read 6, iclass 23, count 2 2006.229.18:15:18.66#ibcon#end of sib2, iclass 23, count 2 2006.229.18:15:18.66#ibcon#*after write, iclass 23, count 2 2006.229.18:15:18.66#ibcon#*before return 0, iclass 23, count 2 2006.229.18:15:18.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:18.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:18.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.18:15:18.66#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:18.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:18.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:18.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:18.78#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:15:18.78#ibcon#first serial, iclass 23, count 0 2006.229.18:15:18.78#ibcon#enter sib2, iclass 23, count 0 2006.229.18:15:18.78#ibcon#flushed, iclass 23, count 0 2006.229.18:15:18.78#ibcon#about to write, iclass 23, count 0 2006.229.18:15:18.78#ibcon#wrote, iclass 23, count 0 2006.229.18:15:18.78#ibcon#about to read 3, iclass 23, count 0 2006.229.18:15:18.80#ibcon#read 3, iclass 23, count 0 2006.229.18:15:18.80#ibcon#about to read 4, iclass 23, count 0 2006.229.18:15:18.80#ibcon#read 4, iclass 23, count 0 2006.229.18:15:18.80#ibcon#about to read 5, iclass 23, count 0 2006.229.18:15:18.80#ibcon#read 5, iclass 23, count 0 2006.229.18:15:18.80#ibcon#about to read 6, iclass 23, count 0 2006.229.18:15:18.80#ibcon#read 6, iclass 23, count 0 2006.229.18:15:18.80#ibcon#end of sib2, iclass 23, count 0 2006.229.18:15:18.80#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:15:18.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:15:18.80#ibcon#[25=USB\r\n] 2006.229.18:15:18.80#ibcon#*before write, iclass 23, count 0 2006.229.18:15:18.80#ibcon#enter sib2, iclass 23, count 0 2006.229.18:15:18.80#ibcon#flushed, iclass 23, count 0 2006.229.18:15:18.80#ibcon#about to write, iclass 23, count 0 2006.229.18:15:18.80#ibcon#wrote, iclass 23, count 0 2006.229.18:15:18.80#ibcon#about to read 3, iclass 23, count 0 2006.229.18:15:18.83#ibcon#read 3, iclass 23, count 0 2006.229.18:15:18.83#ibcon#about to read 4, iclass 23, count 0 2006.229.18:15:18.83#ibcon#read 4, iclass 23, count 0 2006.229.18:15:18.83#ibcon#about to read 5, iclass 23, count 0 2006.229.18:15:18.83#ibcon#read 5, iclass 23, count 0 2006.229.18:15:18.83#ibcon#about to read 6, iclass 23, count 0 2006.229.18:15:18.83#ibcon#read 6, iclass 23, count 0 2006.229.18:15:18.83#ibcon#end of sib2, iclass 23, count 0 2006.229.18:15:18.83#ibcon#*after write, iclass 23, count 0 2006.229.18:15:18.83#ibcon#*before return 0, iclass 23, count 0 2006.229.18:15:18.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:18.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:18.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:15:18.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:15:18.83$vck44/valo=6,814.99 2006.229.18:15:18.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.18:15:18.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.18:15:18.83#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:18.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:18.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:18.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:18.83#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:15:18.83#ibcon#first serial, iclass 25, count 0 2006.229.18:15:18.83#ibcon#enter sib2, iclass 25, count 0 2006.229.18:15:18.83#ibcon#flushed, iclass 25, count 0 2006.229.18:15:18.83#ibcon#about to write, iclass 25, count 0 2006.229.18:15:18.83#ibcon#wrote, iclass 25, count 0 2006.229.18:15:18.83#ibcon#about to read 3, iclass 25, count 0 2006.229.18:15:18.85#ibcon#read 3, iclass 25, count 0 2006.229.18:15:18.85#ibcon#about to read 4, iclass 25, count 0 2006.229.18:15:18.85#ibcon#read 4, iclass 25, count 0 2006.229.18:15:18.85#ibcon#about to read 5, iclass 25, count 0 2006.229.18:15:18.85#ibcon#read 5, iclass 25, count 0 2006.229.18:15:18.85#ibcon#about to read 6, iclass 25, count 0 2006.229.18:15:18.85#ibcon#read 6, iclass 25, count 0 2006.229.18:15:18.85#ibcon#end of sib2, iclass 25, count 0 2006.229.18:15:18.85#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:15:18.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:15:18.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:15:18.85#ibcon#*before write, iclass 25, count 0 2006.229.18:15:18.85#ibcon#enter sib2, iclass 25, count 0 2006.229.18:15:18.85#ibcon#flushed, iclass 25, count 0 2006.229.18:15:18.85#ibcon#about to write, iclass 25, count 0 2006.229.18:15:18.85#ibcon#wrote, iclass 25, count 0 2006.229.18:15:18.85#ibcon#about to read 3, iclass 25, count 0 2006.229.18:15:18.89#ibcon#read 3, iclass 25, count 0 2006.229.18:15:18.89#ibcon#about to read 4, iclass 25, count 0 2006.229.18:15:18.89#ibcon#read 4, iclass 25, count 0 2006.229.18:15:18.89#ibcon#about to read 5, iclass 25, count 0 2006.229.18:15:18.89#ibcon#read 5, iclass 25, count 0 2006.229.18:15:18.89#ibcon#about to read 6, iclass 25, count 0 2006.229.18:15:18.89#ibcon#read 6, iclass 25, count 0 2006.229.18:15:18.89#ibcon#end of sib2, iclass 25, count 0 2006.229.18:15:18.89#ibcon#*after write, iclass 25, count 0 2006.229.18:15:18.89#ibcon#*before return 0, iclass 25, count 0 2006.229.18:15:18.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:18.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:18.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:15:18.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:15:18.89$vck44/va=6,4 2006.229.18:15:18.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.18:15:18.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.18:15:18.89#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:18.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:18.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:18.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:18.95#ibcon#enter wrdev, iclass 27, count 2 2006.229.18:15:18.95#ibcon#first serial, iclass 27, count 2 2006.229.18:15:18.95#ibcon#enter sib2, iclass 27, count 2 2006.229.18:15:18.95#ibcon#flushed, iclass 27, count 2 2006.229.18:15:18.95#ibcon#about to write, iclass 27, count 2 2006.229.18:15:18.95#ibcon#wrote, iclass 27, count 2 2006.229.18:15:18.95#ibcon#about to read 3, iclass 27, count 2 2006.229.18:15:18.97#ibcon#read 3, iclass 27, count 2 2006.229.18:15:18.97#ibcon#about to read 4, iclass 27, count 2 2006.229.18:15:18.97#ibcon#read 4, iclass 27, count 2 2006.229.18:15:18.97#ibcon#about to read 5, iclass 27, count 2 2006.229.18:15:18.97#ibcon#read 5, iclass 27, count 2 2006.229.18:15:18.97#ibcon#about to read 6, iclass 27, count 2 2006.229.18:15:18.97#ibcon#read 6, iclass 27, count 2 2006.229.18:15:18.97#ibcon#end of sib2, iclass 27, count 2 2006.229.18:15:18.97#ibcon#*mode == 0, iclass 27, count 2 2006.229.18:15:18.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.18:15:18.97#ibcon#[25=AT06-04\r\n] 2006.229.18:15:18.97#ibcon#*before write, iclass 27, count 2 2006.229.18:15:18.97#ibcon#enter sib2, iclass 27, count 2 2006.229.18:15:18.97#ibcon#flushed, iclass 27, count 2 2006.229.18:15:18.97#ibcon#about to write, iclass 27, count 2 2006.229.18:15:18.97#ibcon#wrote, iclass 27, count 2 2006.229.18:15:18.97#ibcon#about to read 3, iclass 27, count 2 2006.229.18:15:19.00#ibcon#read 3, iclass 27, count 2 2006.229.18:15:19.00#ibcon#about to read 4, iclass 27, count 2 2006.229.18:15:19.00#ibcon#read 4, iclass 27, count 2 2006.229.18:15:19.00#ibcon#about to read 5, iclass 27, count 2 2006.229.18:15:19.00#ibcon#read 5, iclass 27, count 2 2006.229.18:15:19.00#ibcon#about to read 6, iclass 27, count 2 2006.229.18:15:19.00#ibcon#read 6, iclass 27, count 2 2006.229.18:15:19.00#ibcon#end of sib2, iclass 27, count 2 2006.229.18:15:19.00#ibcon#*after write, iclass 27, count 2 2006.229.18:15:19.00#ibcon#*before return 0, iclass 27, count 2 2006.229.18:15:19.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:19.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:19.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.18:15:19.00#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:19.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:19.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:19.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:19.12#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:15:19.12#ibcon#first serial, iclass 27, count 0 2006.229.18:15:19.12#ibcon#enter sib2, iclass 27, count 0 2006.229.18:15:19.12#ibcon#flushed, iclass 27, count 0 2006.229.18:15:19.12#ibcon#about to write, iclass 27, count 0 2006.229.18:15:19.12#ibcon#wrote, iclass 27, count 0 2006.229.18:15:19.12#ibcon#about to read 3, iclass 27, count 0 2006.229.18:15:19.14#ibcon#read 3, iclass 27, count 0 2006.229.18:15:19.14#ibcon#about to read 4, iclass 27, count 0 2006.229.18:15:19.14#ibcon#read 4, iclass 27, count 0 2006.229.18:15:19.14#ibcon#about to read 5, iclass 27, count 0 2006.229.18:15:19.14#ibcon#read 5, iclass 27, count 0 2006.229.18:15:19.14#ibcon#about to read 6, iclass 27, count 0 2006.229.18:15:19.14#ibcon#read 6, iclass 27, count 0 2006.229.18:15:19.14#ibcon#end of sib2, iclass 27, count 0 2006.229.18:15:19.14#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:15:19.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:15:19.14#ibcon#[25=USB\r\n] 2006.229.18:15:19.14#ibcon#*before write, iclass 27, count 0 2006.229.18:15:19.14#ibcon#enter sib2, iclass 27, count 0 2006.229.18:15:19.14#ibcon#flushed, iclass 27, count 0 2006.229.18:15:19.14#ibcon#about to write, iclass 27, count 0 2006.229.18:15:19.14#ibcon#wrote, iclass 27, count 0 2006.229.18:15:19.14#ibcon#about to read 3, iclass 27, count 0 2006.229.18:15:19.17#ibcon#read 3, iclass 27, count 0 2006.229.18:15:19.17#ibcon#about to read 4, iclass 27, count 0 2006.229.18:15:19.17#ibcon#read 4, iclass 27, count 0 2006.229.18:15:19.17#ibcon#about to read 5, iclass 27, count 0 2006.229.18:15:19.17#ibcon#read 5, iclass 27, count 0 2006.229.18:15:19.17#ibcon#about to read 6, iclass 27, count 0 2006.229.18:15:19.17#ibcon#read 6, iclass 27, count 0 2006.229.18:15:19.17#ibcon#end of sib2, iclass 27, count 0 2006.229.18:15:19.17#ibcon#*after write, iclass 27, count 0 2006.229.18:15:19.17#ibcon#*before return 0, iclass 27, count 0 2006.229.18:15:19.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:19.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:19.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:15:19.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:15:19.17$vck44/valo=7,864.99 2006.229.18:15:19.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.18:15:19.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.18:15:19.17#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:19.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:19.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:19.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:19.17#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:15:19.17#ibcon#first serial, iclass 29, count 0 2006.229.18:15:19.17#ibcon#enter sib2, iclass 29, count 0 2006.229.18:15:19.17#ibcon#flushed, iclass 29, count 0 2006.229.18:15:19.17#ibcon#about to write, iclass 29, count 0 2006.229.18:15:19.17#ibcon#wrote, iclass 29, count 0 2006.229.18:15:19.17#ibcon#about to read 3, iclass 29, count 0 2006.229.18:15:19.19#ibcon#read 3, iclass 29, count 0 2006.229.18:15:19.19#ibcon#about to read 4, iclass 29, count 0 2006.229.18:15:19.19#ibcon#read 4, iclass 29, count 0 2006.229.18:15:19.19#ibcon#about to read 5, iclass 29, count 0 2006.229.18:15:19.19#ibcon#read 5, iclass 29, count 0 2006.229.18:15:19.19#ibcon#about to read 6, iclass 29, count 0 2006.229.18:15:19.19#ibcon#read 6, iclass 29, count 0 2006.229.18:15:19.19#ibcon#end of sib2, iclass 29, count 0 2006.229.18:15:19.19#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:15:19.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:15:19.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:15:19.19#ibcon#*before write, iclass 29, count 0 2006.229.18:15:19.19#ibcon#enter sib2, iclass 29, count 0 2006.229.18:15:19.19#ibcon#flushed, iclass 29, count 0 2006.229.18:15:19.19#ibcon#about to write, iclass 29, count 0 2006.229.18:15:19.19#ibcon#wrote, iclass 29, count 0 2006.229.18:15:19.19#ibcon#about to read 3, iclass 29, count 0 2006.229.18:15:19.23#ibcon#read 3, iclass 29, count 0 2006.229.18:15:19.23#ibcon#about to read 4, iclass 29, count 0 2006.229.18:15:19.23#ibcon#read 4, iclass 29, count 0 2006.229.18:15:19.23#ibcon#about to read 5, iclass 29, count 0 2006.229.18:15:19.23#ibcon#read 5, iclass 29, count 0 2006.229.18:15:19.23#ibcon#about to read 6, iclass 29, count 0 2006.229.18:15:19.23#ibcon#read 6, iclass 29, count 0 2006.229.18:15:19.23#ibcon#end of sib2, iclass 29, count 0 2006.229.18:15:19.23#ibcon#*after write, iclass 29, count 0 2006.229.18:15:19.23#ibcon#*before return 0, iclass 29, count 0 2006.229.18:15:19.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:19.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:19.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:15:19.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:15:19.23$vck44/va=7,5 2006.229.18:15:19.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.18:15:19.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.18:15:19.23#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:19.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:19.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:19.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:19.29#ibcon#enter wrdev, iclass 31, count 2 2006.229.18:15:19.29#ibcon#first serial, iclass 31, count 2 2006.229.18:15:19.29#ibcon#enter sib2, iclass 31, count 2 2006.229.18:15:19.29#ibcon#flushed, iclass 31, count 2 2006.229.18:15:19.29#ibcon#about to write, iclass 31, count 2 2006.229.18:15:19.29#ibcon#wrote, iclass 31, count 2 2006.229.18:15:19.29#ibcon#about to read 3, iclass 31, count 2 2006.229.18:15:19.31#ibcon#read 3, iclass 31, count 2 2006.229.18:15:19.31#ibcon#about to read 4, iclass 31, count 2 2006.229.18:15:19.31#ibcon#read 4, iclass 31, count 2 2006.229.18:15:19.31#ibcon#about to read 5, iclass 31, count 2 2006.229.18:15:19.31#ibcon#read 5, iclass 31, count 2 2006.229.18:15:19.31#ibcon#about to read 6, iclass 31, count 2 2006.229.18:15:19.31#ibcon#read 6, iclass 31, count 2 2006.229.18:15:19.31#ibcon#end of sib2, iclass 31, count 2 2006.229.18:15:19.31#ibcon#*mode == 0, iclass 31, count 2 2006.229.18:15:19.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.18:15:19.31#ibcon#[25=AT07-05\r\n] 2006.229.18:15:19.31#ibcon#*before write, iclass 31, count 2 2006.229.18:15:19.31#ibcon#enter sib2, iclass 31, count 2 2006.229.18:15:19.31#ibcon#flushed, iclass 31, count 2 2006.229.18:15:19.31#ibcon#about to write, iclass 31, count 2 2006.229.18:15:19.31#ibcon#wrote, iclass 31, count 2 2006.229.18:15:19.31#ibcon#about to read 3, iclass 31, count 2 2006.229.18:15:19.34#ibcon#read 3, iclass 31, count 2 2006.229.18:15:19.34#ibcon#about to read 4, iclass 31, count 2 2006.229.18:15:19.34#ibcon#read 4, iclass 31, count 2 2006.229.18:15:19.34#ibcon#about to read 5, iclass 31, count 2 2006.229.18:15:19.34#ibcon#read 5, iclass 31, count 2 2006.229.18:15:19.34#ibcon#about to read 6, iclass 31, count 2 2006.229.18:15:19.34#ibcon#read 6, iclass 31, count 2 2006.229.18:15:19.34#ibcon#end of sib2, iclass 31, count 2 2006.229.18:15:19.34#ibcon#*after write, iclass 31, count 2 2006.229.18:15:19.34#ibcon#*before return 0, iclass 31, count 2 2006.229.18:15:19.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:19.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:19.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.18:15:19.34#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:19.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:19.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:19.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:19.46#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:15:19.46#ibcon#first serial, iclass 31, count 0 2006.229.18:15:19.46#ibcon#enter sib2, iclass 31, count 0 2006.229.18:15:19.46#ibcon#flushed, iclass 31, count 0 2006.229.18:15:19.46#ibcon#about to write, iclass 31, count 0 2006.229.18:15:19.46#ibcon#wrote, iclass 31, count 0 2006.229.18:15:19.46#ibcon#about to read 3, iclass 31, count 0 2006.229.18:15:19.48#ibcon#read 3, iclass 31, count 0 2006.229.18:15:19.48#ibcon#about to read 4, iclass 31, count 0 2006.229.18:15:19.48#ibcon#read 4, iclass 31, count 0 2006.229.18:15:19.48#ibcon#about to read 5, iclass 31, count 0 2006.229.18:15:19.48#ibcon#read 5, iclass 31, count 0 2006.229.18:15:19.48#ibcon#about to read 6, iclass 31, count 0 2006.229.18:15:19.48#ibcon#read 6, iclass 31, count 0 2006.229.18:15:19.48#ibcon#end of sib2, iclass 31, count 0 2006.229.18:15:19.48#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:15:19.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:15:19.48#ibcon#[25=USB\r\n] 2006.229.18:15:19.48#ibcon#*before write, iclass 31, count 0 2006.229.18:15:19.48#ibcon#enter sib2, iclass 31, count 0 2006.229.18:15:19.48#ibcon#flushed, iclass 31, count 0 2006.229.18:15:19.48#ibcon#about to write, iclass 31, count 0 2006.229.18:15:19.48#ibcon#wrote, iclass 31, count 0 2006.229.18:15:19.48#ibcon#about to read 3, iclass 31, count 0 2006.229.18:15:19.51#ibcon#read 3, iclass 31, count 0 2006.229.18:15:19.51#ibcon#about to read 4, iclass 31, count 0 2006.229.18:15:19.51#ibcon#read 4, iclass 31, count 0 2006.229.18:15:19.51#ibcon#about to read 5, iclass 31, count 0 2006.229.18:15:19.51#ibcon#read 5, iclass 31, count 0 2006.229.18:15:19.51#ibcon#about to read 6, iclass 31, count 0 2006.229.18:15:19.51#ibcon#read 6, iclass 31, count 0 2006.229.18:15:19.51#ibcon#end of sib2, iclass 31, count 0 2006.229.18:15:19.51#ibcon#*after write, iclass 31, count 0 2006.229.18:15:19.51#ibcon#*before return 0, iclass 31, count 0 2006.229.18:15:19.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:19.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:19.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:15:19.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:15:19.51$vck44/valo=8,884.99 2006.229.18:15:19.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.18:15:19.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.18:15:19.51#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:19.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:19.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:19.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:19.51#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:15:19.51#ibcon#first serial, iclass 33, count 0 2006.229.18:15:19.51#ibcon#enter sib2, iclass 33, count 0 2006.229.18:15:19.51#ibcon#flushed, iclass 33, count 0 2006.229.18:15:19.51#ibcon#about to write, iclass 33, count 0 2006.229.18:15:19.51#ibcon#wrote, iclass 33, count 0 2006.229.18:15:19.51#ibcon#about to read 3, iclass 33, count 0 2006.229.18:15:19.53#ibcon#read 3, iclass 33, count 0 2006.229.18:15:19.53#ibcon#about to read 4, iclass 33, count 0 2006.229.18:15:19.53#ibcon#read 4, iclass 33, count 0 2006.229.18:15:19.53#ibcon#about to read 5, iclass 33, count 0 2006.229.18:15:19.53#ibcon#read 5, iclass 33, count 0 2006.229.18:15:19.53#ibcon#about to read 6, iclass 33, count 0 2006.229.18:15:19.53#ibcon#read 6, iclass 33, count 0 2006.229.18:15:19.53#ibcon#end of sib2, iclass 33, count 0 2006.229.18:15:19.53#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:15:19.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:15:19.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:15:19.53#ibcon#*before write, iclass 33, count 0 2006.229.18:15:19.53#ibcon#enter sib2, iclass 33, count 0 2006.229.18:15:19.53#ibcon#flushed, iclass 33, count 0 2006.229.18:15:19.53#ibcon#about to write, iclass 33, count 0 2006.229.18:15:19.53#ibcon#wrote, iclass 33, count 0 2006.229.18:15:19.53#ibcon#about to read 3, iclass 33, count 0 2006.229.18:15:19.57#ibcon#read 3, iclass 33, count 0 2006.229.18:15:19.57#ibcon#about to read 4, iclass 33, count 0 2006.229.18:15:19.57#ibcon#read 4, iclass 33, count 0 2006.229.18:15:19.57#ibcon#about to read 5, iclass 33, count 0 2006.229.18:15:19.57#ibcon#read 5, iclass 33, count 0 2006.229.18:15:19.57#ibcon#about to read 6, iclass 33, count 0 2006.229.18:15:19.57#ibcon#read 6, iclass 33, count 0 2006.229.18:15:19.57#ibcon#end of sib2, iclass 33, count 0 2006.229.18:15:19.57#ibcon#*after write, iclass 33, count 0 2006.229.18:15:19.57#ibcon#*before return 0, iclass 33, count 0 2006.229.18:15:19.57#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:19.57#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:19.57#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:15:19.57#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:15:19.57$vck44/va=8,6 2006.229.18:15:19.57#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.18:15:19.57#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.18:15:19.57#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:19.57#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:15:19.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:15:19.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:15:19.63#ibcon#enter wrdev, iclass 35, count 2 2006.229.18:15:19.63#ibcon#first serial, iclass 35, count 2 2006.229.18:15:19.63#ibcon#enter sib2, iclass 35, count 2 2006.229.18:15:19.63#ibcon#flushed, iclass 35, count 2 2006.229.18:15:19.63#ibcon#about to write, iclass 35, count 2 2006.229.18:15:19.63#ibcon#wrote, iclass 35, count 2 2006.229.18:15:19.63#ibcon#about to read 3, iclass 35, count 2 2006.229.18:15:19.65#ibcon#read 3, iclass 35, count 2 2006.229.18:15:19.65#ibcon#about to read 4, iclass 35, count 2 2006.229.18:15:19.65#ibcon#read 4, iclass 35, count 2 2006.229.18:15:19.65#ibcon#about to read 5, iclass 35, count 2 2006.229.18:15:19.65#ibcon#read 5, iclass 35, count 2 2006.229.18:15:19.65#ibcon#about to read 6, iclass 35, count 2 2006.229.18:15:19.65#ibcon#read 6, iclass 35, count 2 2006.229.18:15:19.65#ibcon#end of sib2, iclass 35, count 2 2006.229.18:15:19.65#ibcon#*mode == 0, iclass 35, count 2 2006.229.18:15:19.65#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.18:15:19.65#ibcon#[25=AT08-06\r\n] 2006.229.18:15:19.65#ibcon#*before write, iclass 35, count 2 2006.229.18:15:19.65#ibcon#enter sib2, iclass 35, count 2 2006.229.18:15:19.65#ibcon#flushed, iclass 35, count 2 2006.229.18:15:19.65#ibcon#about to write, iclass 35, count 2 2006.229.18:15:19.65#ibcon#wrote, iclass 35, count 2 2006.229.18:15:19.65#ibcon#about to read 3, iclass 35, count 2 2006.229.18:15:19.68#ibcon#read 3, iclass 35, count 2 2006.229.18:15:19.68#ibcon#about to read 4, iclass 35, count 2 2006.229.18:15:19.68#ibcon#read 4, iclass 35, count 2 2006.229.18:15:19.68#ibcon#about to read 5, iclass 35, count 2 2006.229.18:15:19.68#ibcon#read 5, iclass 35, count 2 2006.229.18:15:19.68#ibcon#about to read 6, iclass 35, count 2 2006.229.18:15:19.68#ibcon#read 6, iclass 35, count 2 2006.229.18:15:19.68#ibcon#end of sib2, iclass 35, count 2 2006.229.18:15:19.68#ibcon#*after write, iclass 35, count 2 2006.229.18:15:19.68#ibcon#*before return 0, iclass 35, count 2 2006.229.18:15:19.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:15:19.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:15:19.68#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.18:15:19.68#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:19.68#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:15:19.80#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:15:19.80#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:15:19.80#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:15:19.80#ibcon#first serial, iclass 35, count 0 2006.229.18:15:19.80#ibcon#enter sib2, iclass 35, count 0 2006.229.18:15:19.80#ibcon#flushed, iclass 35, count 0 2006.229.18:15:19.80#ibcon#about to write, iclass 35, count 0 2006.229.18:15:19.80#ibcon#wrote, iclass 35, count 0 2006.229.18:15:19.80#ibcon#about to read 3, iclass 35, count 0 2006.229.18:15:19.82#ibcon#read 3, iclass 35, count 0 2006.229.18:15:19.82#ibcon#about to read 4, iclass 35, count 0 2006.229.18:15:19.82#ibcon#read 4, iclass 35, count 0 2006.229.18:15:19.82#ibcon#about to read 5, iclass 35, count 0 2006.229.18:15:19.82#ibcon#read 5, iclass 35, count 0 2006.229.18:15:19.82#ibcon#about to read 6, iclass 35, count 0 2006.229.18:15:19.82#ibcon#read 6, iclass 35, count 0 2006.229.18:15:19.82#ibcon#end of sib2, iclass 35, count 0 2006.229.18:15:19.82#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:15:19.82#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:15:19.82#ibcon#[25=USB\r\n] 2006.229.18:15:19.82#ibcon#*before write, iclass 35, count 0 2006.229.18:15:19.82#ibcon#enter sib2, iclass 35, count 0 2006.229.18:15:19.82#ibcon#flushed, iclass 35, count 0 2006.229.18:15:19.82#ibcon#about to write, iclass 35, count 0 2006.229.18:15:19.82#ibcon#wrote, iclass 35, count 0 2006.229.18:15:19.82#ibcon#about to read 3, iclass 35, count 0 2006.229.18:15:19.85#ibcon#read 3, iclass 35, count 0 2006.229.18:15:19.85#ibcon#about to read 4, iclass 35, count 0 2006.229.18:15:19.85#ibcon#read 4, iclass 35, count 0 2006.229.18:15:19.85#ibcon#about to read 5, iclass 35, count 0 2006.229.18:15:19.85#ibcon#read 5, iclass 35, count 0 2006.229.18:15:19.85#ibcon#about to read 6, iclass 35, count 0 2006.229.18:15:19.85#ibcon#read 6, iclass 35, count 0 2006.229.18:15:19.85#ibcon#end of sib2, iclass 35, count 0 2006.229.18:15:19.85#ibcon#*after write, iclass 35, count 0 2006.229.18:15:19.85#ibcon#*before return 0, iclass 35, count 0 2006.229.18:15:19.85#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:15:19.85#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:15:19.85#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:15:19.85#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:15:19.85$vck44/vblo=1,629.99 2006.229.18:15:19.85#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.18:15:19.85#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.18:15:19.85#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:19.85#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:15:19.85#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:15:19.85#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:15:19.85#ibcon#enter wrdev, iclass 37, count 0 2006.229.18:15:19.85#ibcon#first serial, iclass 37, count 0 2006.229.18:15:19.85#ibcon#enter sib2, iclass 37, count 0 2006.229.18:15:19.85#ibcon#flushed, iclass 37, count 0 2006.229.18:15:19.85#ibcon#about to write, iclass 37, count 0 2006.229.18:15:19.85#ibcon#wrote, iclass 37, count 0 2006.229.18:15:19.85#ibcon#about to read 3, iclass 37, count 0 2006.229.18:15:19.87#ibcon#read 3, iclass 37, count 0 2006.229.18:15:19.87#ibcon#about to read 4, iclass 37, count 0 2006.229.18:15:19.87#ibcon#read 4, iclass 37, count 0 2006.229.18:15:19.87#ibcon#about to read 5, iclass 37, count 0 2006.229.18:15:19.87#ibcon#read 5, iclass 37, count 0 2006.229.18:15:19.87#ibcon#about to read 6, iclass 37, count 0 2006.229.18:15:19.87#ibcon#read 6, iclass 37, count 0 2006.229.18:15:19.87#ibcon#end of sib2, iclass 37, count 0 2006.229.18:15:19.87#ibcon#*mode == 0, iclass 37, count 0 2006.229.18:15:19.87#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.18:15:19.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:15:19.87#ibcon#*before write, iclass 37, count 0 2006.229.18:15:19.87#ibcon#enter sib2, iclass 37, count 0 2006.229.18:15:19.87#ibcon#flushed, iclass 37, count 0 2006.229.18:15:19.87#ibcon#about to write, iclass 37, count 0 2006.229.18:15:19.87#ibcon#wrote, iclass 37, count 0 2006.229.18:15:19.87#ibcon#about to read 3, iclass 37, count 0 2006.229.18:15:19.91#ibcon#read 3, iclass 37, count 0 2006.229.18:15:19.91#ibcon#about to read 4, iclass 37, count 0 2006.229.18:15:19.91#ibcon#read 4, iclass 37, count 0 2006.229.18:15:19.91#ibcon#about to read 5, iclass 37, count 0 2006.229.18:15:19.91#ibcon#read 5, iclass 37, count 0 2006.229.18:15:19.91#ibcon#about to read 6, iclass 37, count 0 2006.229.18:15:19.91#ibcon#read 6, iclass 37, count 0 2006.229.18:15:19.91#ibcon#end of sib2, iclass 37, count 0 2006.229.18:15:19.91#ibcon#*after write, iclass 37, count 0 2006.229.18:15:19.91#ibcon#*before return 0, iclass 37, count 0 2006.229.18:15:19.91#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:15:19.91#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:15:19.91#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.18:15:19.91#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.18:15:19.91$vck44/vb=1,4 2006.229.18:15:19.91#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.18:15:19.91#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.18:15:19.91#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:19.91#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:15:19.91#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:15:19.91#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:15:19.91#ibcon#enter wrdev, iclass 39, count 2 2006.229.18:15:19.91#ibcon#first serial, iclass 39, count 2 2006.229.18:15:19.91#ibcon#enter sib2, iclass 39, count 2 2006.229.18:15:19.91#ibcon#flushed, iclass 39, count 2 2006.229.18:15:19.91#ibcon#about to write, iclass 39, count 2 2006.229.18:15:19.91#ibcon#wrote, iclass 39, count 2 2006.229.18:15:19.91#ibcon#about to read 3, iclass 39, count 2 2006.229.18:15:19.93#ibcon#read 3, iclass 39, count 2 2006.229.18:15:19.93#ibcon#about to read 4, iclass 39, count 2 2006.229.18:15:19.93#ibcon#read 4, iclass 39, count 2 2006.229.18:15:19.93#ibcon#about to read 5, iclass 39, count 2 2006.229.18:15:19.93#ibcon#read 5, iclass 39, count 2 2006.229.18:15:19.93#ibcon#about to read 6, iclass 39, count 2 2006.229.18:15:19.93#ibcon#read 6, iclass 39, count 2 2006.229.18:15:19.93#ibcon#end of sib2, iclass 39, count 2 2006.229.18:15:19.93#ibcon#*mode == 0, iclass 39, count 2 2006.229.18:15:19.93#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.18:15:19.93#ibcon#[27=AT01-04\r\n] 2006.229.18:15:19.93#ibcon#*before write, iclass 39, count 2 2006.229.18:15:19.93#ibcon#enter sib2, iclass 39, count 2 2006.229.18:15:19.93#ibcon#flushed, iclass 39, count 2 2006.229.18:15:19.93#ibcon#about to write, iclass 39, count 2 2006.229.18:15:19.93#ibcon#wrote, iclass 39, count 2 2006.229.18:15:19.93#ibcon#about to read 3, iclass 39, count 2 2006.229.18:15:19.96#ibcon#read 3, iclass 39, count 2 2006.229.18:15:19.96#ibcon#about to read 4, iclass 39, count 2 2006.229.18:15:19.96#ibcon#read 4, iclass 39, count 2 2006.229.18:15:19.96#ibcon#about to read 5, iclass 39, count 2 2006.229.18:15:19.96#ibcon#read 5, iclass 39, count 2 2006.229.18:15:19.96#ibcon#about to read 6, iclass 39, count 2 2006.229.18:15:19.96#ibcon#read 6, iclass 39, count 2 2006.229.18:15:19.96#ibcon#end of sib2, iclass 39, count 2 2006.229.18:15:19.96#ibcon#*after write, iclass 39, count 2 2006.229.18:15:19.96#ibcon#*before return 0, iclass 39, count 2 2006.229.18:15:19.96#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:15:19.96#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:15:19.96#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.18:15:19.96#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:19.96#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:15:20.08#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:15:20.08#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:15:20.08#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:15:20.08#ibcon#first serial, iclass 39, count 0 2006.229.18:15:20.08#ibcon#enter sib2, iclass 39, count 0 2006.229.18:15:20.08#ibcon#flushed, iclass 39, count 0 2006.229.18:15:20.08#ibcon#about to write, iclass 39, count 0 2006.229.18:15:20.08#ibcon#wrote, iclass 39, count 0 2006.229.18:15:20.08#ibcon#about to read 3, iclass 39, count 0 2006.229.18:15:20.10#ibcon#read 3, iclass 39, count 0 2006.229.18:15:20.10#ibcon#about to read 4, iclass 39, count 0 2006.229.18:15:20.10#ibcon#read 4, iclass 39, count 0 2006.229.18:15:20.10#ibcon#about to read 5, iclass 39, count 0 2006.229.18:15:20.10#ibcon#read 5, iclass 39, count 0 2006.229.18:15:20.10#ibcon#about to read 6, iclass 39, count 0 2006.229.18:15:20.10#ibcon#read 6, iclass 39, count 0 2006.229.18:15:20.10#ibcon#end of sib2, iclass 39, count 0 2006.229.18:15:20.10#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:15:20.10#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:15:20.10#ibcon#[27=USB\r\n] 2006.229.18:15:20.10#ibcon#*before write, iclass 39, count 0 2006.229.18:15:20.10#ibcon#enter sib2, iclass 39, count 0 2006.229.18:15:20.10#ibcon#flushed, iclass 39, count 0 2006.229.18:15:20.10#ibcon#about to write, iclass 39, count 0 2006.229.18:15:20.10#ibcon#wrote, iclass 39, count 0 2006.229.18:15:20.10#ibcon#about to read 3, iclass 39, count 0 2006.229.18:15:20.13#ibcon#read 3, iclass 39, count 0 2006.229.18:15:20.13#ibcon#about to read 4, iclass 39, count 0 2006.229.18:15:20.13#ibcon#read 4, iclass 39, count 0 2006.229.18:15:20.13#ibcon#about to read 5, iclass 39, count 0 2006.229.18:15:20.13#ibcon#read 5, iclass 39, count 0 2006.229.18:15:20.13#ibcon#about to read 6, iclass 39, count 0 2006.229.18:15:20.13#ibcon#read 6, iclass 39, count 0 2006.229.18:15:20.13#ibcon#end of sib2, iclass 39, count 0 2006.229.18:15:20.13#ibcon#*after write, iclass 39, count 0 2006.229.18:15:20.13#ibcon#*before return 0, iclass 39, count 0 2006.229.18:15:20.13#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:15:20.13#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:15:20.13#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:15:20.13#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:15:20.13$vck44/vblo=2,634.99 2006.229.18:15:20.13#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.18:15:20.13#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.18:15:20.13#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:20.13#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:20.13#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:20.13#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:20.13#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:15:20.13#ibcon#first serial, iclass 3, count 0 2006.229.18:15:20.13#ibcon#enter sib2, iclass 3, count 0 2006.229.18:15:20.13#ibcon#flushed, iclass 3, count 0 2006.229.18:15:20.13#ibcon#about to write, iclass 3, count 0 2006.229.18:15:20.13#ibcon#wrote, iclass 3, count 0 2006.229.18:15:20.13#ibcon#about to read 3, iclass 3, count 0 2006.229.18:15:20.15#ibcon#read 3, iclass 3, count 0 2006.229.18:15:20.15#ibcon#about to read 4, iclass 3, count 0 2006.229.18:15:20.15#ibcon#read 4, iclass 3, count 0 2006.229.18:15:20.15#ibcon#about to read 5, iclass 3, count 0 2006.229.18:15:20.15#ibcon#read 5, iclass 3, count 0 2006.229.18:15:20.15#ibcon#about to read 6, iclass 3, count 0 2006.229.18:15:20.15#ibcon#read 6, iclass 3, count 0 2006.229.18:15:20.15#ibcon#end of sib2, iclass 3, count 0 2006.229.18:15:20.15#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:15:20.15#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:15:20.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:15:20.15#ibcon#*before write, iclass 3, count 0 2006.229.18:15:20.15#ibcon#enter sib2, iclass 3, count 0 2006.229.18:15:20.15#ibcon#flushed, iclass 3, count 0 2006.229.18:15:20.15#ibcon#about to write, iclass 3, count 0 2006.229.18:15:20.15#ibcon#wrote, iclass 3, count 0 2006.229.18:15:20.15#ibcon#about to read 3, iclass 3, count 0 2006.229.18:15:20.19#ibcon#read 3, iclass 3, count 0 2006.229.18:15:20.19#ibcon#about to read 4, iclass 3, count 0 2006.229.18:15:20.19#ibcon#read 4, iclass 3, count 0 2006.229.18:15:20.19#ibcon#about to read 5, iclass 3, count 0 2006.229.18:15:20.19#ibcon#read 5, iclass 3, count 0 2006.229.18:15:20.19#ibcon#about to read 6, iclass 3, count 0 2006.229.18:15:20.19#ibcon#read 6, iclass 3, count 0 2006.229.18:15:20.19#ibcon#end of sib2, iclass 3, count 0 2006.229.18:15:20.19#ibcon#*after write, iclass 3, count 0 2006.229.18:15:20.19#ibcon#*before return 0, iclass 3, count 0 2006.229.18:15:20.19#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:20.19#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:15:20.19#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:15:20.19#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:15:20.19$vck44/vb=2,4 2006.229.18:15:20.19#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.18:15:20.19#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.18:15:20.19#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:20.19#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:20.25#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:20.25#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:20.25#ibcon#enter wrdev, iclass 5, count 2 2006.229.18:15:20.25#ibcon#first serial, iclass 5, count 2 2006.229.18:15:20.25#ibcon#enter sib2, iclass 5, count 2 2006.229.18:15:20.25#ibcon#flushed, iclass 5, count 2 2006.229.18:15:20.25#ibcon#about to write, iclass 5, count 2 2006.229.18:15:20.25#ibcon#wrote, iclass 5, count 2 2006.229.18:15:20.25#ibcon#about to read 3, iclass 5, count 2 2006.229.18:15:20.27#ibcon#read 3, iclass 5, count 2 2006.229.18:15:20.27#ibcon#about to read 4, iclass 5, count 2 2006.229.18:15:20.27#ibcon#read 4, iclass 5, count 2 2006.229.18:15:20.27#ibcon#about to read 5, iclass 5, count 2 2006.229.18:15:20.27#ibcon#read 5, iclass 5, count 2 2006.229.18:15:20.27#ibcon#about to read 6, iclass 5, count 2 2006.229.18:15:20.27#ibcon#read 6, iclass 5, count 2 2006.229.18:15:20.27#ibcon#end of sib2, iclass 5, count 2 2006.229.18:15:20.27#ibcon#*mode == 0, iclass 5, count 2 2006.229.18:15:20.27#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.18:15:20.27#ibcon#[27=AT02-04\r\n] 2006.229.18:15:20.27#ibcon#*before write, iclass 5, count 2 2006.229.18:15:20.27#ibcon#enter sib2, iclass 5, count 2 2006.229.18:15:20.27#ibcon#flushed, iclass 5, count 2 2006.229.18:15:20.27#ibcon#about to write, iclass 5, count 2 2006.229.18:15:20.27#ibcon#wrote, iclass 5, count 2 2006.229.18:15:20.27#ibcon#about to read 3, iclass 5, count 2 2006.229.18:15:20.30#ibcon#read 3, iclass 5, count 2 2006.229.18:15:20.30#ibcon#about to read 4, iclass 5, count 2 2006.229.18:15:20.30#ibcon#read 4, iclass 5, count 2 2006.229.18:15:20.30#ibcon#about to read 5, iclass 5, count 2 2006.229.18:15:20.30#ibcon#read 5, iclass 5, count 2 2006.229.18:15:20.30#ibcon#about to read 6, iclass 5, count 2 2006.229.18:15:20.30#ibcon#read 6, iclass 5, count 2 2006.229.18:15:20.30#ibcon#end of sib2, iclass 5, count 2 2006.229.18:15:20.30#ibcon#*after write, iclass 5, count 2 2006.229.18:15:20.30#ibcon#*before return 0, iclass 5, count 2 2006.229.18:15:20.30#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:20.30#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:15:20.30#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.18:15:20.30#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:20.30#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:20.42#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:20.42#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:20.42#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:15:20.42#ibcon#first serial, iclass 5, count 0 2006.229.18:15:20.42#ibcon#enter sib2, iclass 5, count 0 2006.229.18:15:20.42#ibcon#flushed, iclass 5, count 0 2006.229.18:15:20.42#ibcon#about to write, iclass 5, count 0 2006.229.18:15:20.42#ibcon#wrote, iclass 5, count 0 2006.229.18:15:20.42#ibcon#about to read 3, iclass 5, count 0 2006.229.18:15:20.44#ibcon#read 3, iclass 5, count 0 2006.229.18:15:20.44#ibcon#about to read 4, iclass 5, count 0 2006.229.18:15:20.44#ibcon#read 4, iclass 5, count 0 2006.229.18:15:20.44#ibcon#about to read 5, iclass 5, count 0 2006.229.18:15:20.44#ibcon#read 5, iclass 5, count 0 2006.229.18:15:20.44#ibcon#about to read 6, iclass 5, count 0 2006.229.18:15:20.44#ibcon#read 6, iclass 5, count 0 2006.229.18:15:20.44#ibcon#end of sib2, iclass 5, count 0 2006.229.18:15:20.44#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:15:20.44#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:15:20.44#ibcon#[27=USB\r\n] 2006.229.18:15:20.44#ibcon#*before write, iclass 5, count 0 2006.229.18:15:20.44#ibcon#enter sib2, iclass 5, count 0 2006.229.18:15:20.44#ibcon#flushed, iclass 5, count 0 2006.229.18:15:20.44#ibcon#about to write, iclass 5, count 0 2006.229.18:15:20.44#ibcon#wrote, iclass 5, count 0 2006.229.18:15:20.44#ibcon#about to read 3, iclass 5, count 0 2006.229.18:15:20.47#ibcon#read 3, iclass 5, count 0 2006.229.18:15:20.47#ibcon#about to read 4, iclass 5, count 0 2006.229.18:15:20.47#ibcon#read 4, iclass 5, count 0 2006.229.18:15:20.47#ibcon#about to read 5, iclass 5, count 0 2006.229.18:15:20.47#ibcon#read 5, iclass 5, count 0 2006.229.18:15:20.47#ibcon#about to read 6, iclass 5, count 0 2006.229.18:15:20.47#ibcon#read 6, iclass 5, count 0 2006.229.18:15:20.47#ibcon#end of sib2, iclass 5, count 0 2006.229.18:15:20.47#ibcon#*after write, iclass 5, count 0 2006.229.18:15:20.47#ibcon#*before return 0, iclass 5, count 0 2006.229.18:15:20.47#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:20.47#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:15:20.47#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:15:20.47#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:15:20.47$vck44/vblo=3,649.99 2006.229.18:15:20.47#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.18:15:20.47#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.18:15:20.47#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:20.47#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:20.47#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:20.47#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:20.47#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:15:20.47#ibcon#first serial, iclass 7, count 0 2006.229.18:15:20.47#ibcon#enter sib2, iclass 7, count 0 2006.229.18:15:20.47#ibcon#flushed, iclass 7, count 0 2006.229.18:15:20.47#ibcon#about to write, iclass 7, count 0 2006.229.18:15:20.47#ibcon#wrote, iclass 7, count 0 2006.229.18:15:20.47#ibcon#about to read 3, iclass 7, count 0 2006.229.18:15:20.49#ibcon#read 3, iclass 7, count 0 2006.229.18:15:20.49#ibcon#about to read 4, iclass 7, count 0 2006.229.18:15:20.49#ibcon#read 4, iclass 7, count 0 2006.229.18:15:20.49#ibcon#about to read 5, iclass 7, count 0 2006.229.18:15:20.49#ibcon#read 5, iclass 7, count 0 2006.229.18:15:20.49#ibcon#about to read 6, iclass 7, count 0 2006.229.18:15:20.49#ibcon#read 6, iclass 7, count 0 2006.229.18:15:20.49#ibcon#end of sib2, iclass 7, count 0 2006.229.18:15:20.49#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:15:20.49#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:15:20.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:15:20.49#ibcon#*before write, iclass 7, count 0 2006.229.18:15:20.49#ibcon#enter sib2, iclass 7, count 0 2006.229.18:15:20.49#ibcon#flushed, iclass 7, count 0 2006.229.18:15:20.49#ibcon#about to write, iclass 7, count 0 2006.229.18:15:20.49#ibcon#wrote, iclass 7, count 0 2006.229.18:15:20.49#ibcon#about to read 3, iclass 7, count 0 2006.229.18:15:20.53#ibcon#read 3, iclass 7, count 0 2006.229.18:15:20.53#ibcon#about to read 4, iclass 7, count 0 2006.229.18:15:20.53#ibcon#read 4, iclass 7, count 0 2006.229.18:15:20.53#ibcon#about to read 5, iclass 7, count 0 2006.229.18:15:20.53#ibcon#read 5, iclass 7, count 0 2006.229.18:15:20.53#ibcon#about to read 6, iclass 7, count 0 2006.229.18:15:20.53#ibcon#read 6, iclass 7, count 0 2006.229.18:15:20.53#ibcon#end of sib2, iclass 7, count 0 2006.229.18:15:20.53#ibcon#*after write, iclass 7, count 0 2006.229.18:15:20.53#ibcon#*before return 0, iclass 7, count 0 2006.229.18:15:20.53#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:20.53#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:15:20.53#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:15:20.53#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:15:20.53$vck44/vb=3,4 2006.229.18:15:20.53#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.18:15:20.53#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.18:15:20.53#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:20.53#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:20.59#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:20.59#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:20.59#ibcon#enter wrdev, iclass 11, count 2 2006.229.18:15:20.59#ibcon#first serial, iclass 11, count 2 2006.229.18:15:20.59#ibcon#enter sib2, iclass 11, count 2 2006.229.18:15:20.59#ibcon#flushed, iclass 11, count 2 2006.229.18:15:20.59#ibcon#about to write, iclass 11, count 2 2006.229.18:15:20.59#ibcon#wrote, iclass 11, count 2 2006.229.18:15:20.59#ibcon#about to read 3, iclass 11, count 2 2006.229.18:15:20.61#ibcon#read 3, iclass 11, count 2 2006.229.18:15:20.61#ibcon#about to read 4, iclass 11, count 2 2006.229.18:15:20.61#ibcon#read 4, iclass 11, count 2 2006.229.18:15:20.61#ibcon#about to read 5, iclass 11, count 2 2006.229.18:15:20.61#ibcon#read 5, iclass 11, count 2 2006.229.18:15:20.61#ibcon#about to read 6, iclass 11, count 2 2006.229.18:15:20.61#ibcon#read 6, iclass 11, count 2 2006.229.18:15:20.61#ibcon#end of sib2, iclass 11, count 2 2006.229.18:15:20.61#ibcon#*mode == 0, iclass 11, count 2 2006.229.18:15:20.61#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.18:15:20.61#ibcon#[27=AT03-04\r\n] 2006.229.18:15:20.61#ibcon#*before write, iclass 11, count 2 2006.229.18:15:20.61#ibcon#enter sib2, iclass 11, count 2 2006.229.18:15:20.61#ibcon#flushed, iclass 11, count 2 2006.229.18:15:20.61#ibcon#about to write, iclass 11, count 2 2006.229.18:15:20.61#ibcon#wrote, iclass 11, count 2 2006.229.18:15:20.61#ibcon#about to read 3, iclass 11, count 2 2006.229.18:15:20.64#ibcon#read 3, iclass 11, count 2 2006.229.18:15:20.64#ibcon#about to read 4, iclass 11, count 2 2006.229.18:15:20.64#ibcon#read 4, iclass 11, count 2 2006.229.18:15:20.64#ibcon#about to read 5, iclass 11, count 2 2006.229.18:15:20.64#ibcon#read 5, iclass 11, count 2 2006.229.18:15:20.64#ibcon#about to read 6, iclass 11, count 2 2006.229.18:15:20.64#ibcon#read 6, iclass 11, count 2 2006.229.18:15:20.64#ibcon#end of sib2, iclass 11, count 2 2006.229.18:15:20.64#ibcon#*after write, iclass 11, count 2 2006.229.18:15:20.64#ibcon#*before return 0, iclass 11, count 2 2006.229.18:15:20.64#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:20.64#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:15:20.64#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.18:15:20.64#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:20.64#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:20.76#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:20.76#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:20.76#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:15:20.76#ibcon#first serial, iclass 11, count 0 2006.229.18:15:20.76#ibcon#enter sib2, iclass 11, count 0 2006.229.18:15:20.76#ibcon#flushed, iclass 11, count 0 2006.229.18:15:20.76#ibcon#about to write, iclass 11, count 0 2006.229.18:15:20.76#ibcon#wrote, iclass 11, count 0 2006.229.18:15:20.76#ibcon#about to read 3, iclass 11, count 0 2006.229.18:15:20.78#ibcon#read 3, iclass 11, count 0 2006.229.18:15:20.78#ibcon#about to read 4, iclass 11, count 0 2006.229.18:15:20.78#ibcon#read 4, iclass 11, count 0 2006.229.18:15:20.78#ibcon#about to read 5, iclass 11, count 0 2006.229.18:15:20.78#ibcon#read 5, iclass 11, count 0 2006.229.18:15:20.78#ibcon#about to read 6, iclass 11, count 0 2006.229.18:15:20.78#ibcon#read 6, iclass 11, count 0 2006.229.18:15:20.78#ibcon#end of sib2, iclass 11, count 0 2006.229.18:15:20.78#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:15:20.78#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:15:20.78#ibcon#[27=USB\r\n] 2006.229.18:15:20.78#ibcon#*before write, iclass 11, count 0 2006.229.18:15:20.78#ibcon#enter sib2, iclass 11, count 0 2006.229.18:15:20.78#ibcon#flushed, iclass 11, count 0 2006.229.18:15:20.78#ibcon#about to write, iclass 11, count 0 2006.229.18:15:20.78#ibcon#wrote, iclass 11, count 0 2006.229.18:15:20.78#ibcon#about to read 3, iclass 11, count 0 2006.229.18:15:20.81#ibcon#read 3, iclass 11, count 0 2006.229.18:15:20.81#ibcon#about to read 4, iclass 11, count 0 2006.229.18:15:20.81#ibcon#read 4, iclass 11, count 0 2006.229.18:15:20.81#ibcon#about to read 5, iclass 11, count 0 2006.229.18:15:20.81#ibcon#read 5, iclass 11, count 0 2006.229.18:15:20.81#ibcon#about to read 6, iclass 11, count 0 2006.229.18:15:20.81#ibcon#read 6, iclass 11, count 0 2006.229.18:15:20.81#ibcon#end of sib2, iclass 11, count 0 2006.229.18:15:20.81#ibcon#*after write, iclass 11, count 0 2006.229.18:15:20.81#ibcon#*before return 0, iclass 11, count 0 2006.229.18:15:20.81#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:20.81#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:15:20.81#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:15:20.81#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:15:20.81$vck44/vblo=4,679.99 2006.229.18:15:20.81#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.18:15:20.81#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.18:15:20.81#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:20.81#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:20.81#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:20.81#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:20.81#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:15:20.81#ibcon#first serial, iclass 13, count 0 2006.229.18:15:20.81#ibcon#enter sib2, iclass 13, count 0 2006.229.18:15:20.81#ibcon#flushed, iclass 13, count 0 2006.229.18:15:20.81#ibcon#about to write, iclass 13, count 0 2006.229.18:15:20.81#ibcon#wrote, iclass 13, count 0 2006.229.18:15:20.81#ibcon#about to read 3, iclass 13, count 0 2006.229.18:15:20.83#ibcon#read 3, iclass 13, count 0 2006.229.18:15:20.83#ibcon#about to read 4, iclass 13, count 0 2006.229.18:15:20.83#ibcon#read 4, iclass 13, count 0 2006.229.18:15:20.83#ibcon#about to read 5, iclass 13, count 0 2006.229.18:15:20.83#ibcon#read 5, iclass 13, count 0 2006.229.18:15:20.83#ibcon#about to read 6, iclass 13, count 0 2006.229.18:15:20.83#ibcon#read 6, iclass 13, count 0 2006.229.18:15:20.83#ibcon#end of sib2, iclass 13, count 0 2006.229.18:15:20.83#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:15:20.83#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:15:20.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:15:20.83#ibcon#*before write, iclass 13, count 0 2006.229.18:15:20.83#ibcon#enter sib2, iclass 13, count 0 2006.229.18:15:20.83#ibcon#flushed, iclass 13, count 0 2006.229.18:15:20.83#ibcon#about to write, iclass 13, count 0 2006.229.18:15:20.83#ibcon#wrote, iclass 13, count 0 2006.229.18:15:20.83#ibcon#about to read 3, iclass 13, count 0 2006.229.18:15:20.87#ibcon#read 3, iclass 13, count 0 2006.229.18:15:20.87#ibcon#about to read 4, iclass 13, count 0 2006.229.18:15:20.87#ibcon#read 4, iclass 13, count 0 2006.229.18:15:20.87#ibcon#about to read 5, iclass 13, count 0 2006.229.18:15:20.87#ibcon#read 5, iclass 13, count 0 2006.229.18:15:20.87#ibcon#about to read 6, iclass 13, count 0 2006.229.18:15:20.87#ibcon#read 6, iclass 13, count 0 2006.229.18:15:20.87#ibcon#end of sib2, iclass 13, count 0 2006.229.18:15:20.87#ibcon#*after write, iclass 13, count 0 2006.229.18:15:20.87#ibcon#*before return 0, iclass 13, count 0 2006.229.18:15:20.87#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:20.87#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:15:20.87#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:15:20.87#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:15:20.87$vck44/vb=4,4 2006.229.18:15:20.87#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.18:15:20.87#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.18:15:20.87#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:20.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:20.93#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:20.93#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:20.93#ibcon#enter wrdev, iclass 15, count 2 2006.229.18:15:20.93#ibcon#first serial, iclass 15, count 2 2006.229.18:15:20.93#ibcon#enter sib2, iclass 15, count 2 2006.229.18:15:20.93#ibcon#flushed, iclass 15, count 2 2006.229.18:15:20.93#ibcon#about to write, iclass 15, count 2 2006.229.18:15:20.93#ibcon#wrote, iclass 15, count 2 2006.229.18:15:20.93#ibcon#about to read 3, iclass 15, count 2 2006.229.18:15:20.95#ibcon#read 3, iclass 15, count 2 2006.229.18:15:20.95#ibcon#about to read 4, iclass 15, count 2 2006.229.18:15:20.95#ibcon#read 4, iclass 15, count 2 2006.229.18:15:20.95#ibcon#about to read 5, iclass 15, count 2 2006.229.18:15:20.95#ibcon#read 5, iclass 15, count 2 2006.229.18:15:20.95#ibcon#about to read 6, iclass 15, count 2 2006.229.18:15:20.95#ibcon#read 6, iclass 15, count 2 2006.229.18:15:20.95#ibcon#end of sib2, iclass 15, count 2 2006.229.18:15:20.95#ibcon#*mode == 0, iclass 15, count 2 2006.229.18:15:20.95#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.18:15:20.95#ibcon#[27=AT04-04\r\n] 2006.229.18:15:20.95#ibcon#*before write, iclass 15, count 2 2006.229.18:15:20.95#ibcon#enter sib2, iclass 15, count 2 2006.229.18:15:20.95#ibcon#flushed, iclass 15, count 2 2006.229.18:15:20.95#ibcon#about to write, iclass 15, count 2 2006.229.18:15:20.95#ibcon#wrote, iclass 15, count 2 2006.229.18:15:20.95#ibcon#about to read 3, iclass 15, count 2 2006.229.18:15:20.98#ibcon#read 3, iclass 15, count 2 2006.229.18:15:20.98#ibcon#about to read 4, iclass 15, count 2 2006.229.18:15:20.98#ibcon#read 4, iclass 15, count 2 2006.229.18:15:20.98#ibcon#about to read 5, iclass 15, count 2 2006.229.18:15:20.98#ibcon#read 5, iclass 15, count 2 2006.229.18:15:20.98#ibcon#about to read 6, iclass 15, count 2 2006.229.18:15:20.98#ibcon#read 6, iclass 15, count 2 2006.229.18:15:20.98#ibcon#end of sib2, iclass 15, count 2 2006.229.18:15:20.98#ibcon#*after write, iclass 15, count 2 2006.229.18:15:20.98#ibcon#*before return 0, iclass 15, count 2 2006.229.18:15:20.98#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:20.98#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:15:20.98#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.18:15:20.98#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:20.98#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:21.10#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:21.10#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:21.10#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:15:21.10#ibcon#first serial, iclass 15, count 0 2006.229.18:15:21.10#ibcon#enter sib2, iclass 15, count 0 2006.229.18:15:21.10#ibcon#flushed, iclass 15, count 0 2006.229.18:15:21.10#ibcon#about to write, iclass 15, count 0 2006.229.18:15:21.10#ibcon#wrote, iclass 15, count 0 2006.229.18:15:21.10#ibcon#about to read 3, iclass 15, count 0 2006.229.18:15:21.12#ibcon#read 3, iclass 15, count 0 2006.229.18:15:21.12#ibcon#about to read 4, iclass 15, count 0 2006.229.18:15:21.12#ibcon#read 4, iclass 15, count 0 2006.229.18:15:21.12#ibcon#about to read 5, iclass 15, count 0 2006.229.18:15:21.12#ibcon#read 5, iclass 15, count 0 2006.229.18:15:21.12#ibcon#about to read 6, iclass 15, count 0 2006.229.18:15:21.12#ibcon#read 6, iclass 15, count 0 2006.229.18:15:21.12#ibcon#end of sib2, iclass 15, count 0 2006.229.18:15:21.12#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:15:21.12#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:15:21.12#ibcon#[27=USB\r\n] 2006.229.18:15:21.12#ibcon#*before write, iclass 15, count 0 2006.229.18:15:21.12#ibcon#enter sib2, iclass 15, count 0 2006.229.18:15:21.12#ibcon#flushed, iclass 15, count 0 2006.229.18:15:21.12#ibcon#about to write, iclass 15, count 0 2006.229.18:15:21.12#ibcon#wrote, iclass 15, count 0 2006.229.18:15:21.12#ibcon#about to read 3, iclass 15, count 0 2006.229.18:15:21.15#ibcon#read 3, iclass 15, count 0 2006.229.18:15:21.15#ibcon#about to read 4, iclass 15, count 0 2006.229.18:15:21.15#ibcon#read 4, iclass 15, count 0 2006.229.18:15:21.15#ibcon#about to read 5, iclass 15, count 0 2006.229.18:15:21.15#ibcon#read 5, iclass 15, count 0 2006.229.18:15:21.15#ibcon#about to read 6, iclass 15, count 0 2006.229.18:15:21.15#ibcon#read 6, iclass 15, count 0 2006.229.18:15:21.15#ibcon#end of sib2, iclass 15, count 0 2006.229.18:15:21.15#ibcon#*after write, iclass 15, count 0 2006.229.18:15:21.15#ibcon#*before return 0, iclass 15, count 0 2006.229.18:15:21.15#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:21.15#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:15:21.15#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:15:21.15#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:15:21.15$vck44/vblo=5,709.99 2006.229.18:15:21.15#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.18:15:21.15#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.18:15:21.15#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:21.15#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:21.15#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:21.15#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:21.15#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:15:21.15#ibcon#first serial, iclass 17, count 0 2006.229.18:15:21.15#ibcon#enter sib2, iclass 17, count 0 2006.229.18:15:21.15#ibcon#flushed, iclass 17, count 0 2006.229.18:15:21.15#ibcon#about to write, iclass 17, count 0 2006.229.18:15:21.15#ibcon#wrote, iclass 17, count 0 2006.229.18:15:21.15#ibcon#about to read 3, iclass 17, count 0 2006.229.18:15:21.17#ibcon#read 3, iclass 17, count 0 2006.229.18:15:21.17#ibcon#about to read 4, iclass 17, count 0 2006.229.18:15:21.17#ibcon#read 4, iclass 17, count 0 2006.229.18:15:21.17#ibcon#about to read 5, iclass 17, count 0 2006.229.18:15:21.17#ibcon#read 5, iclass 17, count 0 2006.229.18:15:21.17#ibcon#about to read 6, iclass 17, count 0 2006.229.18:15:21.17#ibcon#read 6, iclass 17, count 0 2006.229.18:15:21.17#ibcon#end of sib2, iclass 17, count 0 2006.229.18:15:21.17#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:15:21.17#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:15:21.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:15:21.17#ibcon#*before write, iclass 17, count 0 2006.229.18:15:21.17#ibcon#enter sib2, iclass 17, count 0 2006.229.18:15:21.17#ibcon#flushed, iclass 17, count 0 2006.229.18:15:21.17#ibcon#about to write, iclass 17, count 0 2006.229.18:15:21.17#ibcon#wrote, iclass 17, count 0 2006.229.18:15:21.17#ibcon#about to read 3, iclass 17, count 0 2006.229.18:15:21.21#ibcon#read 3, iclass 17, count 0 2006.229.18:15:21.21#ibcon#about to read 4, iclass 17, count 0 2006.229.18:15:21.21#ibcon#read 4, iclass 17, count 0 2006.229.18:15:21.21#ibcon#about to read 5, iclass 17, count 0 2006.229.18:15:21.21#ibcon#read 5, iclass 17, count 0 2006.229.18:15:21.21#ibcon#about to read 6, iclass 17, count 0 2006.229.18:15:21.21#ibcon#read 6, iclass 17, count 0 2006.229.18:15:21.21#ibcon#end of sib2, iclass 17, count 0 2006.229.18:15:21.21#ibcon#*after write, iclass 17, count 0 2006.229.18:15:21.21#ibcon#*before return 0, iclass 17, count 0 2006.229.18:15:21.21#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:21.21#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:15:21.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:15:21.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:15:21.21$vck44/vb=5,4 2006.229.18:15:21.21#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.18:15:21.21#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.18:15:21.21#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:21.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:21.27#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:21.27#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:21.27#ibcon#enter wrdev, iclass 19, count 2 2006.229.18:15:21.27#ibcon#first serial, iclass 19, count 2 2006.229.18:15:21.27#ibcon#enter sib2, iclass 19, count 2 2006.229.18:15:21.27#ibcon#flushed, iclass 19, count 2 2006.229.18:15:21.27#ibcon#about to write, iclass 19, count 2 2006.229.18:15:21.27#ibcon#wrote, iclass 19, count 2 2006.229.18:15:21.27#ibcon#about to read 3, iclass 19, count 2 2006.229.18:15:21.29#ibcon#read 3, iclass 19, count 2 2006.229.18:15:21.29#ibcon#about to read 4, iclass 19, count 2 2006.229.18:15:21.29#ibcon#read 4, iclass 19, count 2 2006.229.18:15:21.29#ibcon#about to read 5, iclass 19, count 2 2006.229.18:15:21.29#ibcon#read 5, iclass 19, count 2 2006.229.18:15:21.29#ibcon#about to read 6, iclass 19, count 2 2006.229.18:15:21.29#ibcon#read 6, iclass 19, count 2 2006.229.18:15:21.29#ibcon#end of sib2, iclass 19, count 2 2006.229.18:15:21.29#ibcon#*mode == 0, iclass 19, count 2 2006.229.18:15:21.29#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.18:15:21.29#ibcon#[27=AT05-04\r\n] 2006.229.18:15:21.29#ibcon#*before write, iclass 19, count 2 2006.229.18:15:21.29#ibcon#enter sib2, iclass 19, count 2 2006.229.18:15:21.29#ibcon#flushed, iclass 19, count 2 2006.229.18:15:21.29#ibcon#about to write, iclass 19, count 2 2006.229.18:15:21.29#ibcon#wrote, iclass 19, count 2 2006.229.18:15:21.29#ibcon#about to read 3, iclass 19, count 2 2006.229.18:15:21.32#ibcon#read 3, iclass 19, count 2 2006.229.18:15:21.32#ibcon#about to read 4, iclass 19, count 2 2006.229.18:15:21.32#ibcon#read 4, iclass 19, count 2 2006.229.18:15:21.32#ibcon#about to read 5, iclass 19, count 2 2006.229.18:15:21.32#ibcon#read 5, iclass 19, count 2 2006.229.18:15:21.32#ibcon#about to read 6, iclass 19, count 2 2006.229.18:15:21.32#ibcon#read 6, iclass 19, count 2 2006.229.18:15:21.32#ibcon#end of sib2, iclass 19, count 2 2006.229.18:15:21.32#ibcon#*after write, iclass 19, count 2 2006.229.18:15:21.32#ibcon#*before return 0, iclass 19, count 2 2006.229.18:15:21.32#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:21.32#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:15:21.32#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.18:15:21.32#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:21.32#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:21.44#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:21.44#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:21.44#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:15:21.44#ibcon#first serial, iclass 19, count 0 2006.229.18:15:21.44#ibcon#enter sib2, iclass 19, count 0 2006.229.18:15:21.44#ibcon#flushed, iclass 19, count 0 2006.229.18:15:21.44#ibcon#about to write, iclass 19, count 0 2006.229.18:15:21.44#ibcon#wrote, iclass 19, count 0 2006.229.18:15:21.44#ibcon#about to read 3, iclass 19, count 0 2006.229.18:15:21.46#ibcon#read 3, iclass 19, count 0 2006.229.18:15:21.46#ibcon#about to read 4, iclass 19, count 0 2006.229.18:15:21.46#ibcon#read 4, iclass 19, count 0 2006.229.18:15:21.46#ibcon#about to read 5, iclass 19, count 0 2006.229.18:15:21.46#ibcon#read 5, iclass 19, count 0 2006.229.18:15:21.46#ibcon#about to read 6, iclass 19, count 0 2006.229.18:15:21.46#ibcon#read 6, iclass 19, count 0 2006.229.18:15:21.46#ibcon#end of sib2, iclass 19, count 0 2006.229.18:15:21.46#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:15:21.46#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:15:21.46#ibcon#[27=USB\r\n] 2006.229.18:15:21.46#ibcon#*before write, iclass 19, count 0 2006.229.18:15:21.46#ibcon#enter sib2, iclass 19, count 0 2006.229.18:15:21.46#ibcon#flushed, iclass 19, count 0 2006.229.18:15:21.46#ibcon#about to write, iclass 19, count 0 2006.229.18:15:21.46#ibcon#wrote, iclass 19, count 0 2006.229.18:15:21.46#ibcon#about to read 3, iclass 19, count 0 2006.229.18:15:21.49#ibcon#read 3, iclass 19, count 0 2006.229.18:15:21.49#ibcon#about to read 4, iclass 19, count 0 2006.229.18:15:21.49#ibcon#read 4, iclass 19, count 0 2006.229.18:15:21.49#ibcon#about to read 5, iclass 19, count 0 2006.229.18:15:21.49#ibcon#read 5, iclass 19, count 0 2006.229.18:15:21.49#ibcon#about to read 6, iclass 19, count 0 2006.229.18:15:21.49#ibcon#read 6, iclass 19, count 0 2006.229.18:15:21.49#ibcon#end of sib2, iclass 19, count 0 2006.229.18:15:21.49#ibcon#*after write, iclass 19, count 0 2006.229.18:15:21.49#ibcon#*before return 0, iclass 19, count 0 2006.229.18:15:21.49#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:21.49#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:15:21.49#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:15:21.49#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:15:21.49$vck44/vblo=6,719.99 2006.229.18:15:21.49#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.18:15:21.49#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.18:15:21.49#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:21.49#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:21.49#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:21.49#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:21.49#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:15:21.49#ibcon#first serial, iclass 21, count 0 2006.229.18:15:21.49#ibcon#enter sib2, iclass 21, count 0 2006.229.18:15:21.49#ibcon#flushed, iclass 21, count 0 2006.229.18:15:21.49#ibcon#about to write, iclass 21, count 0 2006.229.18:15:21.49#ibcon#wrote, iclass 21, count 0 2006.229.18:15:21.49#ibcon#about to read 3, iclass 21, count 0 2006.229.18:15:21.51#ibcon#read 3, iclass 21, count 0 2006.229.18:15:21.51#ibcon#about to read 4, iclass 21, count 0 2006.229.18:15:21.51#ibcon#read 4, iclass 21, count 0 2006.229.18:15:21.51#ibcon#about to read 5, iclass 21, count 0 2006.229.18:15:21.51#ibcon#read 5, iclass 21, count 0 2006.229.18:15:21.51#ibcon#about to read 6, iclass 21, count 0 2006.229.18:15:21.51#ibcon#read 6, iclass 21, count 0 2006.229.18:15:21.51#ibcon#end of sib2, iclass 21, count 0 2006.229.18:15:21.51#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:15:21.51#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:15:21.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:15:21.51#ibcon#*before write, iclass 21, count 0 2006.229.18:15:21.51#ibcon#enter sib2, iclass 21, count 0 2006.229.18:15:21.51#ibcon#flushed, iclass 21, count 0 2006.229.18:15:21.51#ibcon#about to write, iclass 21, count 0 2006.229.18:15:21.51#ibcon#wrote, iclass 21, count 0 2006.229.18:15:21.51#ibcon#about to read 3, iclass 21, count 0 2006.229.18:15:21.55#ibcon#read 3, iclass 21, count 0 2006.229.18:15:21.55#ibcon#about to read 4, iclass 21, count 0 2006.229.18:15:21.55#ibcon#read 4, iclass 21, count 0 2006.229.18:15:21.55#ibcon#about to read 5, iclass 21, count 0 2006.229.18:15:21.55#ibcon#read 5, iclass 21, count 0 2006.229.18:15:21.55#ibcon#about to read 6, iclass 21, count 0 2006.229.18:15:21.55#ibcon#read 6, iclass 21, count 0 2006.229.18:15:21.55#ibcon#end of sib2, iclass 21, count 0 2006.229.18:15:21.55#ibcon#*after write, iclass 21, count 0 2006.229.18:15:21.55#ibcon#*before return 0, iclass 21, count 0 2006.229.18:15:21.55#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:21.55#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:15:21.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:15:21.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:15:21.55$vck44/vb=6,4 2006.229.18:15:21.55#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.18:15:21.55#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.18:15:21.55#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:21.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:21.61#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:21.61#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:21.61#ibcon#enter wrdev, iclass 23, count 2 2006.229.18:15:21.61#ibcon#first serial, iclass 23, count 2 2006.229.18:15:21.61#ibcon#enter sib2, iclass 23, count 2 2006.229.18:15:21.61#ibcon#flushed, iclass 23, count 2 2006.229.18:15:21.61#ibcon#about to write, iclass 23, count 2 2006.229.18:15:21.61#ibcon#wrote, iclass 23, count 2 2006.229.18:15:21.61#ibcon#about to read 3, iclass 23, count 2 2006.229.18:15:21.63#ibcon#read 3, iclass 23, count 2 2006.229.18:15:21.63#ibcon#about to read 4, iclass 23, count 2 2006.229.18:15:21.63#ibcon#read 4, iclass 23, count 2 2006.229.18:15:21.63#ibcon#about to read 5, iclass 23, count 2 2006.229.18:15:21.63#ibcon#read 5, iclass 23, count 2 2006.229.18:15:21.63#ibcon#about to read 6, iclass 23, count 2 2006.229.18:15:21.63#ibcon#read 6, iclass 23, count 2 2006.229.18:15:21.63#ibcon#end of sib2, iclass 23, count 2 2006.229.18:15:21.63#ibcon#*mode == 0, iclass 23, count 2 2006.229.18:15:21.63#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.18:15:21.63#ibcon#[27=AT06-04\r\n] 2006.229.18:15:21.63#ibcon#*before write, iclass 23, count 2 2006.229.18:15:21.63#ibcon#enter sib2, iclass 23, count 2 2006.229.18:15:21.63#ibcon#flushed, iclass 23, count 2 2006.229.18:15:21.63#ibcon#about to write, iclass 23, count 2 2006.229.18:15:21.63#ibcon#wrote, iclass 23, count 2 2006.229.18:15:21.63#ibcon#about to read 3, iclass 23, count 2 2006.229.18:15:21.66#ibcon#read 3, iclass 23, count 2 2006.229.18:15:21.66#ibcon#about to read 4, iclass 23, count 2 2006.229.18:15:21.66#ibcon#read 4, iclass 23, count 2 2006.229.18:15:21.66#ibcon#about to read 5, iclass 23, count 2 2006.229.18:15:21.66#ibcon#read 5, iclass 23, count 2 2006.229.18:15:21.66#ibcon#about to read 6, iclass 23, count 2 2006.229.18:15:21.66#ibcon#read 6, iclass 23, count 2 2006.229.18:15:21.66#ibcon#end of sib2, iclass 23, count 2 2006.229.18:15:21.66#ibcon#*after write, iclass 23, count 2 2006.229.18:15:21.66#ibcon#*before return 0, iclass 23, count 2 2006.229.18:15:21.66#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:21.66#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:15:21.66#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.18:15:21.66#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:21.66#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:21.78#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:21.78#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:21.78#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:15:21.78#ibcon#first serial, iclass 23, count 0 2006.229.18:15:21.78#ibcon#enter sib2, iclass 23, count 0 2006.229.18:15:21.78#ibcon#flushed, iclass 23, count 0 2006.229.18:15:21.78#ibcon#about to write, iclass 23, count 0 2006.229.18:15:21.78#ibcon#wrote, iclass 23, count 0 2006.229.18:15:21.78#ibcon#about to read 3, iclass 23, count 0 2006.229.18:15:21.80#ibcon#read 3, iclass 23, count 0 2006.229.18:15:21.80#ibcon#about to read 4, iclass 23, count 0 2006.229.18:15:21.80#ibcon#read 4, iclass 23, count 0 2006.229.18:15:21.80#ibcon#about to read 5, iclass 23, count 0 2006.229.18:15:21.80#ibcon#read 5, iclass 23, count 0 2006.229.18:15:21.80#ibcon#about to read 6, iclass 23, count 0 2006.229.18:15:21.80#ibcon#read 6, iclass 23, count 0 2006.229.18:15:21.80#ibcon#end of sib2, iclass 23, count 0 2006.229.18:15:21.80#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:15:21.80#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:15:21.80#ibcon#[27=USB\r\n] 2006.229.18:15:21.80#ibcon#*before write, iclass 23, count 0 2006.229.18:15:21.80#ibcon#enter sib2, iclass 23, count 0 2006.229.18:15:21.80#ibcon#flushed, iclass 23, count 0 2006.229.18:15:21.80#ibcon#about to write, iclass 23, count 0 2006.229.18:15:21.80#ibcon#wrote, iclass 23, count 0 2006.229.18:15:21.80#ibcon#about to read 3, iclass 23, count 0 2006.229.18:15:21.83#ibcon#read 3, iclass 23, count 0 2006.229.18:15:21.83#ibcon#about to read 4, iclass 23, count 0 2006.229.18:15:21.83#ibcon#read 4, iclass 23, count 0 2006.229.18:15:21.83#ibcon#about to read 5, iclass 23, count 0 2006.229.18:15:21.83#ibcon#read 5, iclass 23, count 0 2006.229.18:15:21.83#ibcon#about to read 6, iclass 23, count 0 2006.229.18:15:21.83#ibcon#read 6, iclass 23, count 0 2006.229.18:15:21.83#ibcon#end of sib2, iclass 23, count 0 2006.229.18:15:21.83#ibcon#*after write, iclass 23, count 0 2006.229.18:15:21.83#ibcon#*before return 0, iclass 23, count 0 2006.229.18:15:21.83#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:21.83#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:15:21.83#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:15:21.83#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:15:21.83$vck44/vblo=7,734.99 2006.229.18:15:21.83#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.18:15:21.83#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.18:15:21.83#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:21.83#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:21.83#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:21.83#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:21.83#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:15:21.83#ibcon#first serial, iclass 25, count 0 2006.229.18:15:21.83#ibcon#enter sib2, iclass 25, count 0 2006.229.18:15:21.83#ibcon#flushed, iclass 25, count 0 2006.229.18:15:21.83#ibcon#about to write, iclass 25, count 0 2006.229.18:15:21.83#ibcon#wrote, iclass 25, count 0 2006.229.18:15:21.83#ibcon#about to read 3, iclass 25, count 0 2006.229.18:15:21.85#ibcon#read 3, iclass 25, count 0 2006.229.18:15:21.85#ibcon#about to read 4, iclass 25, count 0 2006.229.18:15:21.85#ibcon#read 4, iclass 25, count 0 2006.229.18:15:21.85#ibcon#about to read 5, iclass 25, count 0 2006.229.18:15:21.85#ibcon#read 5, iclass 25, count 0 2006.229.18:15:21.85#ibcon#about to read 6, iclass 25, count 0 2006.229.18:15:21.85#ibcon#read 6, iclass 25, count 0 2006.229.18:15:21.85#ibcon#end of sib2, iclass 25, count 0 2006.229.18:15:21.85#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:15:21.85#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:15:21.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:15:21.85#ibcon#*before write, iclass 25, count 0 2006.229.18:15:21.85#ibcon#enter sib2, iclass 25, count 0 2006.229.18:15:21.85#ibcon#flushed, iclass 25, count 0 2006.229.18:15:21.85#ibcon#about to write, iclass 25, count 0 2006.229.18:15:21.85#ibcon#wrote, iclass 25, count 0 2006.229.18:15:21.85#ibcon#about to read 3, iclass 25, count 0 2006.229.18:15:21.89#ibcon#read 3, iclass 25, count 0 2006.229.18:15:21.89#ibcon#about to read 4, iclass 25, count 0 2006.229.18:15:21.89#ibcon#read 4, iclass 25, count 0 2006.229.18:15:21.89#ibcon#about to read 5, iclass 25, count 0 2006.229.18:15:21.89#ibcon#read 5, iclass 25, count 0 2006.229.18:15:21.89#ibcon#about to read 6, iclass 25, count 0 2006.229.18:15:21.89#ibcon#read 6, iclass 25, count 0 2006.229.18:15:21.89#ibcon#end of sib2, iclass 25, count 0 2006.229.18:15:21.89#ibcon#*after write, iclass 25, count 0 2006.229.18:15:21.89#ibcon#*before return 0, iclass 25, count 0 2006.229.18:15:21.89#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:21.89#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:15:21.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:15:21.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:15:21.89$vck44/vb=7,4 2006.229.18:15:21.89#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.18:15:21.89#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.18:15:21.89#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:21.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:21.95#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:21.95#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:21.95#ibcon#enter wrdev, iclass 27, count 2 2006.229.18:15:21.95#ibcon#first serial, iclass 27, count 2 2006.229.18:15:21.95#ibcon#enter sib2, iclass 27, count 2 2006.229.18:15:21.95#ibcon#flushed, iclass 27, count 2 2006.229.18:15:21.95#ibcon#about to write, iclass 27, count 2 2006.229.18:15:21.95#ibcon#wrote, iclass 27, count 2 2006.229.18:15:21.95#ibcon#about to read 3, iclass 27, count 2 2006.229.18:15:21.97#ibcon#read 3, iclass 27, count 2 2006.229.18:15:21.97#ibcon#about to read 4, iclass 27, count 2 2006.229.18:15:21.97#ibcon#read 4, iclass 27, count 2 2006.229.18:15:21.97#ibcon#about to read 5, iclass 27, count 2 2006.229.18:15:21.97#ibcon#read 5, iclass 27, count 2 2006.229.18:15:21.97#ibcon#about to read 6, iclass 27, count 2 2006.229.18:15:21.97#ibcon#read 6, iclass 27, count 2 2006.229.18:15:21.97#ibcon#end of sib2, iclass 27, count 2 2006.229.18:15:21.97#ibcon#*mode == 0, iclass 27, count 2 2006.229.18:15:21.97#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.18:15:21.97#ibcon#[27=AT07-04\r\n] 2006.229.18:15:21.97#ibcon#*before write, iclass 27, count 2 2006.229.18:15:21.97#ibcon#enter sib2, iclass 27, count 2 2006.229.18:15:21.97#ibcon#flushed, iclass 27, count 2 2006.229.18:15:21.97#ibcon#about to write, iclass 27, count 2 2006.229.18:15:21.97#ibcon#wrote, iclass 27, count 2 2006.229.18:15:21.97#ibcon#about to read 3, iclass 27, count 2 2006.229.18:15:22.00#ibcon#read 3, iclass 27, count 2 2006.229.18:15:22.00#ibcon#about to read 4, iclass 27, count 2 2006.229.18:15:22.00#ibcon#read 4, iclass 27, count 2 2006.229.18:15:22.00#ibcon#about to read 5, iclass 27, count 2 2006.229.18:15:22.00#ibcon#read 5, iclass 27, count 2 2006.229.18:15:22.00#ibcon#about to read 6, iclass 27, count 2 2006.229.18:15:22.00#ibcon#read 6, iclass 27, count 2 2006.229.18:15:22.00#ibcon#end of sib2, iclass 27, count 2 2006.229.18:15:22.00#ibcon#*after write, iclass 27, count 2 2006.229.18:15:22.00#ibcon#*before return 0, iclass 27, count 2 2006.229.18:15:22.00#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:22.00#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:15:22.00#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.18:15:22.00#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:22.00#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:22.12#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:22.12#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:22.12#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:15:22.12#ibcon#first serial, iclass 27, count 0 2006.229.18:15:22.12#ibcon#enter sib2, iclass 27, count 0 2006.229.18:15:22.12#ibcon#flushed, iclass 27, count 0 2006.229.18:15:22.12#ibcon#about to write, iclass 27, count 0 2006.229.18:15:22.12#ibcon#wrote, iclass 27, count 0 2006.229.18:15:22.12#ibcon#about to read 3, iclass 27, count 0 2006.229.18:15:22.14#ibcon#read 3, iclass 27, count 0 2006.229.18:15:22.14#ibcon#about to read 4, iclass 27, count 0 2006.229.18:15:22.14#ibcon#read 4, iclass 27, count 0 2006.229.18:15:22.14#ibcon#about to read 5, iclass 27, count 0 2006.229.18:15:22.14#ibcon#read 5, iclass 27, count 0 2006.229.18:15:22.14#ibcon#about to read 6, iclass 27, count 0 2006.229.18:15:22.14#ibcon#read 6, iclass 27, count 0 2006.229.18:15:22.14#ibcon#end of sib2, iclass 27, count 0 2006.229.18:15:22.14#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:15:22.14#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:15:22.14#ibcon#[27=USB\r\n] 2006.229.18:15:22.14#ibcon#*before write, iclass 27, count 0 2006.229.18:15:22.14#ibcon#enter sib2, iclass 27, count 0 2006.229.18:15:22.14#ibcon#flushed, iclass 27, count 0 2006.229.18:15:22.14#ibcon#about to write, iclass 27, count 0 2006.229.18:15:22.14#ibcon#wrote, iclass 27, count 0 2006.229.18:15:22.14#ibcon#about to read 3, iclass 27, count 0 2006.229.18:15:22.17#ibcon#read 3, iclass 27, count 0 2006.229.18:15:22.17#ibcon#about to read 4, iclass 27, count 0 2006.229.18:15:22.17#ibcon#read 4, iclass 27, count 0 2006.229.18:15:22.17#ibcon#about to read 5, iclass 27, count 0 2006.229.18:15:22.17#ibcon#read 5, iclass 27, count 0 2006.229.18:15:22.17#ibcon#about to read 6, iclass 27, count 0 2006.229.18:15:22.17#ibcon#read 6, iclass 27, count 0 2006.229.18:15:22.17#ibcon#end of sib2, iclass 27, count 0 2006.229.18:15:22.17#ibcon#*after write, iclass 27, count 0 2006.229.18:15:22.17#ibcon#*before return 0, iclass 27, count 0 2006.229.18:15:22.17#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:22.17#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:15:22.17#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:15:22.17#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:15:22.17$vck44/vblo=8,744.99 2006.229.18:15:22.17#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.18:15:22.17#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.18:15:22.17#ibcon#ireg 17 cls_cnt 0 2006.229.18:15:22.17#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:22.17#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:22.17#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:22.17#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:15:22.17#ibcon#first serial, iclass 29, count 0 2006.229.18:15:22.17#ibcon#enter sib2, iclass 29, count 0 2006.229.18:15:22.17#ibcon#flushed, iclass 29, count 0 2006.229.18:15:22.17#ibcon#about to write, iclass 29, count 0 2006.229.18:15:22.17#ibcon#wrote, iclass 29, count 0 2006.229.18:15:22.17#ibcon#about to read 3, iclass 29, count 0 2006.229.18:15:22.19#ibcon#read 3, iclass 29, count 0 2006.229.18:15:22.19#ibcon#about to read 4, iclass 29, count 0 2006.229.18:15:22.19#ibcon#read 4, iclass 29, count 0 2006.229.18:15:22.19#ibcon#about to read 5, iclass 29, count 0 2006.229.18:15:22.19#ibcon#read 5, iclass 29, count 0 2006.229.18:15:22.19#ibcon#about to read 6, iclass 29, count 0 2006.229.18:15:22.19#ibcon#read 6, iclass 29, count 0 2006.229.18:15:22.19#ibcon#end of sib2, iclass 29, count 0 2006.229.18:15:22.19#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:15:22.19#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:15:22.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:15:22.19#ibcon#*before write, iclass 29, count 0 2006.229.18:15:22.19#ibcon#enter sib2, iclass 29, count 0 2006.229.18:15:22.19#ibcon#flushed, iclass 29, count 0 2006.229.18:15:22.19#ibcon#about to write, iclass 29, count 0 2006.229.18:15:22.19#ibcon#wrote, iclass 29, count 0 2006.229.18:15:22.19#ibcon#about to read 3, iclass 29, count 0 2006.229.18:15:22.23#ibcon#read 3, iclass 29, count 0 2006.229.18:15:22.23#ibcon#about to read 4, iclass 29, count 0 2006.229.18:15:22.23#ibcon#read 4, iclass 29, count 0 2006.229.18:15:22.23#ibcon#about to read 5, iclass 29, count 0 2006.229.18:15:22.23#ibcon#read 5, iclass 29, count 0 2006.229.18:15:22.23#ibcon#about to read 6, iclass 29, count 0 2006.229.18:15:22.23#ibcon#read 6, iclass 29, count 0 2006.229.18:15:22.23#ibcon#end of sib2, iclass 29, count 0 2006.229.18:15:22.23#ibcon#*after write, iclass 29, count 0 2006.229.18:15:22.23#ibcon#*before return 0, iclass 29, count 0 2006.229.18:15:22.23#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:22.23#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:15:22.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:15:22.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:15:22.23$vck44/vb=8,4 2006.229.18:15:22.23#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.18:15:22.23#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.18:15:22.23#ibcon#ireg 11 cls_cnt 2 2006.229.18:15:22.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:22.29#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:22.29#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:22.29#ibcon#enter wrdev, iclass 31, count 2 2006.229.18:15:22.29#ibcon#first serial, iclass 31, count 2 2006.229.18:15:22.29#ibcon#enter sib2, iclass 31, count 2 2006.229.18:15:22.29#ibcon#flushed, iclass 31, count 2 2006.229.18:15:22.29#ibcon#about to write, iclass 31, count 2 2006.229.18:15:22.29#ibcon#wrote, iclass 31, count 2 2006.229.18:15:22.29#ibcon#about to read 3, iclass 31, count 2 2006.229.18:15:22.31#ibcon#read 3, iclass 31, count 2 2006.229.18:15:22.31#ibcon#about to read 4, iclass 31, count 2 2006.229.18:15:22.31#ibcon#read 4, iclass 31, count 2 2006.229.18:15:22.31#ibcon#about to read 5, iclass 31, count 2 2006.229.18:15:22.31#ibcon#read 5, iclass 31, count 2 2006.229.18:15:22.31#ibcon#about to read 6, iclass 31, count 2 2006.229.18:15:22.31#ibcon#read 6, iclass 31, count 2 2006.229.18:15:22.31#ibcon#end of sib2, iclass 31, count 2 2006.229.18:15:22.31#ibcon#*mode == 0, iclass 31, count 2 2006.229.18:15:22.31#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.18:15:22.31#ibcon#[27=AT08-04\r\n] 2006.229.18:15:22.31#ibcon#*before write, iclass 31, count 2 2006.229.18:15:22.31#ibcon#enter sib2, iclass 31, count 2 2006.229.18:15:22.31#ibcon#flushed, iclass 31, count 2 2006.229.18:15:22.31#ibcon#about to write, iclass 31, count 2 2006.229.18:15:22.31#ibcon#wrote, iclass 31, count 2 2006.229.18:15:22.31#ibcon#about to read 3, iclass 31, count 2 2006.229.18:15:22.34#ibcon#read 3, iclass 31, count 2 2006.229.18:15:22.34#ibcon#about to read 4, iclass 31, count 2 2006.229.18:15:22.34#ibcon#read 4, iclass 31, count 2 2006.229.18:15:22.34#ibcon#about to read 5, iclass 31, count 2 2006.229.18:15:22.34#ibcon#read 5, iclass 31, count 2 2006.229.18:15:22.34#ibcon#about to read 6, iclass 31, count 2 2006.229.18:15:22.34#ibcon#read 6, iclass 31, count 2 2006.229.18:15:22.34#ibcon#end of sib2, iclass 31, count 2 2006.229.18:15:22.34#ibcon#*after write, iclass 31, count 2 2006.229.18:15:22.34#ibcon#*before return 0, iclass 31, count 2 2006.229.18:15:22.34#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:22.34#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:15:22.34#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.18:15:22.34#ibcon#ireg 7 cls_cnt 0 2006.229.18:15:22.34#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:22.46#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:22.46#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:22.46#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:15:22.46#ibcon#first serial, iclass 31, count 0 2006.229.18:15:22.46#ibcon#enter sib2, iclass 31, count 0 2006.229.18:15:22.46#ibcon#flushed, iclass 31, count 0 2006.229.18:15:22.46#ibcon#about to write, iclass 31, count 0 2006.229.18:15:22.46#ibcon#wrote, iclass 31, count 0 2006.229.18:15:22.46#ibcon#about to read 3, iclass 31, count 0 2006.229.18:15:22.48#ibcon#read 3, iclass 31, count 0 2006.229.18:15:22.48#ibcon#about to read 4, iclass 31, count 0 2006.229.18:15:22.48#ibcon#read 4, iclass 31, count 0 2006.229.18:15:22.48#ibcon#about to read 5, iclass 31, count 0 2006.229.18:15:22.48#ibcon#read 5, iclass 31, count 0 2006.229.18:15:22.48#ibcon#about to read 6, iclass 31, count 0 2006.229.18:15:22.48#ibcon#read 6, iclass 31, count 0 2006.229.18:15:22.48#ibcon#end of sib2, iclass 31, count 0 2006.229.18:15:22.48#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:15:22.48#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:15:22.48#ibcon#[27=USB\r\n] 2006.229.18:15:22.48#ibcon#*before write, iclass 31, count 0 2006.229.18:15:22.48#ibcon#enter sib2, iclass 31, count 0 2006.229.18:15:22.48#ibcon#flushed, iclass 31, count 0 2006.229.18:15:22.48#ibcon#about to write, iclass 31, count 0 2006.229.18:15:22.48#ibcon#wrote, iclass 31, count 0 2006.229.18:15:22.48#ibcon#about to read 3, iclass 31, count 0 2006.229.18:15:22.51#ibcon#read 3, iclass 31, count 0 2006.229.18:15:22.51#ibcon#about to read 4, iclass 31, count 0 2006.229.18:15:22.51#ibcon#read 4, iclass 31, count 0 2006.229.18:15:22.51#ibcon#about to read 5, iclass 31, count 0 2006.229.18:15:22.51#ibcon#read 5, iclass 31, count 0 2006.229.18:15:22.51#ibcon#about to read 6, iclass 31, count 0 2006.229.18:15:22.51#ibcon#read 6, iclass 31, count 0 2006.229.18:15:22.51#ibcon#end of sib2, iclass 31, count 0 2006.229.18:15:22.51#ibcon#*after write, iclass 31, count 0 2006.229.18:15:22.51#ibcon#*before return 0, iclass 31, count 0 2006.229.18:15:22.51#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:22.51#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:15:22.51#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:15:22.51#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:15:22.51$vck44/vabw=wide 2006.229.18:15:22.51#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.18:15:22.51#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.18:15:22.51#ibcon#ireg 8 cls_cnt 0 2006.229.18:15:22.51#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:22.51#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:22.51#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:22.51#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:15:22.51#ibcon#first serial, iclass 33, count 0 2006.229.18:15:22.51#ibcon#enter sib2, iclass 33, count 0 2006.229.18:15:22.51#ibcon#flushed, iclass 33, count 0 2006.229.18:15:22.51#ibcon#about to write, iclass 33, count 0 2006.229.18:15:22.51#ibcon#wrote, iclass 33, count 0 2006.229.18:15:22.51#ibcon#about to read 3, iclass 33, count 0 2006.229.18:15:22.53#ibcon#read 3, iclass 33, count 0 2006.229.18:15:22.53#ibcon#about to read 4, iclass 33, count 0 2006.229.18:15:22.53#ibcon#read 4, iclass 33, count 0 2006.229.18:15:22.53#ibcon#about to read 5, iclass 33, count 0 2006.229.18:15:22.53#ibcon#read 5, iclass 33, count 0 2006.229.18:15:22.53#ibcon#about to read 6, iclass 33, count 0 2006.229.18:15:22.53#ibcon#read 6, iclass 33, count 0 2006.229.18:15:22.53#ibcon#end of sib2, iclass 33, count 0 2006.229.18:15:22.53#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:15:22.53#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:15:22.53#ibcon#[25=BW32\r\n] 2006.229.18:15:22.53#ibcon#*before write, iclass 33, count 0 2006.229.18:15:22.53#ibcon#enter sib2, iclass 33, count 0 2006.229.18:15:22.53#ibcon#flushed, iclass 33, count 0 2006.229.18:15:22.53#ibcon#about to write, iclass 33, count 0 2006.229.18:15:22.53#ibcon#wrote, iclass 33, count 0 2006.229.18:15:22.53#ibcon#about to read 3, iclass 33, count 0 2006.229.18:15:22.56#ibcon#read 3, iclass 33, count 0 2006.229.18:15:22.56#ibcon#about to read 4, iclass 33, count 0 2006.229.18:15:22.56#ibcon#read 4, iclass 33, count 0 2006.229.18:15:22.56#ibcon#about to read 5, iclass 33, count 0 2006.229.18:15:22.56#ibcon#read 5, iclass 33, count 0 2006.229.18:15:22.56#ibcon#about to read 6, iclass 33, count 0 2006.229.18:15:22.56#ibcon#read 6, iclass 33, count 0 2006.229.18:15:22.56#ibcon#end of sib2, iclass 33, count 0 2006.229.18:15:22.56#ibcon#*after write, iclass 33, count 0 2006.229.18:15:22.56#ibcon#*before return 0, iclass 33, count 0 2006.229.18:15:22.56#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:22.56#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:15:22.56#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:15:22.56#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:15:22.56$vck44/vbbw=wide 2006.229.18:15:22.56#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.18:15:22.56#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.18:15:22.56#ibcon#ireg 8 cls_cnt 0 2006.229.18:15:22.56#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:15:22.63#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:15:22.63#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:15:22.63#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:15:22.63#ibcon#first serial, iclass 35, count 0 2006.229.18:15:22.63#ibcon#enter sib2, iclass 35, count 0 2006.229.18:15:22.63#ibcon#flushed, iclass 35, count 0 2006.229.18:15:22.63#ibcon#about to write, iclass 35, count 0 2006.229.18:15:22.63#ibcon#wrote, iclass 35, count 0 2006.229.18:15:22.63#ibcon#about to read 3, iclass 35, count 0 2006.229.18:15:22.65#ibcon#read 3, iclass 35, count 0 2006.229.18:15:22.65#ibcon#about to read 4, iclass 35, count 0 2006.229.18:15:22.65#ibcon#read 4, iclass 35, count 0 2006.229.18:15:22.65#ibcon#about to read 5, iclass 35, count 0 2006.229.18:15:22.65#ibcon#read 5, iclass 35, count 0 2006.229.18:15:22.65#ibcon#about to read 6, iclass 35, count 0 2006.229.18:15:22.65#ibcon#read 6, iclass 35, count 0 2006.229.18:15:22.65#ibcon#end of sib2, iclass 35, count 0 2006.229.18:15:22.65#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:15:22.65#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:15:22.65#ibcon#[27=BW32\r\n] 2006.229.18:15:22.65#ibcon#*before write, iclass 35, count 0 2006.229.18:15:22.65#ibcon#enter sib2, iclass 35, count 0 2006.229.18:15:22.65#ibcon#flushed, iclass 35, count 0 2006.229.18:15:22.65#ibcon#about to write, iclass 35, count 0 2006.229.18:15:22.65#ibcon#wrote, iclass 35, count 0 2006.229.18:15:22.65#ibcon#about to read 3, iclass 35, count 0 2006.229.18:15:22.68#ibcon#read 3, iclass 35, count 0 2006.229.18:15:22.68#ibcon#about to read 4, iclass 35, count 0 2006.229.18:15:22.68#ibcon#read 4, iclass 35, count 0 2006.229.18:15:22.68#ibcon#about to read 5, iclass 35, count 0 2006.229.18:15:22.68#ibcon#read 5, iclass 35, count 0 2006.229.18:15:22.68#ibcon#about to read 6, iclass 35, count 0 2006.229.18:15:22.68#ibcon#read 6, iclass 35, count 0 2006.229.18:15:22.68#ibcon#end of sib2, iclass 35, count 0 2006.229.18:15:22.68#ibcon#*after write, iclass 35, count 0 2006.229.18:15:22.68#ibcon#*before return 0, iclass 35, count 0 2006.229.18:15:22.68#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:15:22.68#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:15:22.68#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:15:22.68#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:15:22.68$setupk4/ifdk4 2006.229.18:15:22.68$ifdk4/lo= 2006.229.18:15:22.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:15:22.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:15:22.68$ifdk4/patch= 2006.229.18:15:22.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:15:22.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:15:22.68$setupk4/!*+20s 2006.229.18:15:27.06#abcon#<5=/08 0.4 1.5 26.481001001.5\r\n> 2006.229.18:15:27.08#abcon#{5=INTERFACE CLEAR} 2006.229.18:15:27.14#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:15:37.19$setupk4/"tpicd 2006.229.18:15:37.19$setupk4/echo=off 2006.229.18:15:37.19$setupk4/xlog=off 2006.229.18:15:37.19:!2006.229.18:23:18 2006.229.18:15:37.23#abcon#<5=/08 0.4 1.5 26.471001001.4\r\n> 2006.229.18:16:05.13#trakl#Source acquired 2006.229.18:16:07.13#flagr#flagr/antenna,acquired 2006.229.18:23:18.00:preob 2006.229.18:23:18.13/onsource/TRACKING 2006.229.18:23:18.13:!2006.229.18:23:28 2006.229.18:23:28.00:"tape 2006.229.18:23:28.00:"st=record 2006.229.18:23:28.00:data_valid=on 2006.229.18:23:28.00:midob 2006.229.18:23:28.13/onsource/TRACKING 2006.229.18:23:28.13/wx/26.42,1001.4,100 2006.229.18:23:28.34/cable/+6.4169E-03 2006.229.18:23:29.43/va/01,08,usb,yes,33,35 2006.229.18:23:29.43/va/02,07,usb,yes,35,36 2006.229.18:23:29.43/va/03,06,usb,yes,44,46 2006.229.18:23:29.43/va/04,07,usb,yes,36,38 2006.229.18:23:29.43/va/05,04,usb,yes,33,33 2006.229.18:23:29.43/va/06,04,usb,yes,37,36 2006.229.18:23:29.43/va/07,05,usb,yes,32,33 2006.229.18:23:29.43/va/08,06,usb,yes,24,29 2006.229.18:23:29.66/valo/01,524.99,yes,locked 2006.229.18:23:29.66/valo/02,534.99,yes,locked 2006.229.18:23:29.66/valo/03,564.99,yes,locked 2006.229.18:23:29.66/valo/04,624.99,yes,locked 2006.229.18:23:29.66/valo/05,734.99,yes,locked 2006.229.18:23:29.66/valo/06,814.99,yes,locked 2006.229.18:23:29.66/valo/07,864.99,yes,locked 2006.229.18:23:29.66/valo/08,884.99,yes,locked 2006.229.18:23:30.75/vb/01,04,usb,yes,31,29 2006.229.18:23:30.75/vb/02,04,usb,yes,34,34 2006.229.18:23:30.75/vb/03,04,usb,yes,31,34 2006.229.18:23:30.75/vb/04,04,usb,yes,35,34 2006.229.18:23:30.75/vb/05,04,usb,yes,27,30 2006.229.18:23:30.75/vb/06,04,usb,yes,32,28 2006.229.18:23:30.75/vb/07,04,usb,yes,32,32 2006.229.18:23:30.75/vb/08,04,usb,yes,29,33 2006.229.18:23:30.98/vblo/01,629.99,yes,locked 2006.229.18:23:30.98/vblo/02,634.99,yes,locked 2006.229.18:23:30.98/vblo/03,649.99,yes,locked 2006.229.18:23:30.98/vblo/04,679.99,yes,locked 2006.229.18:23:30.98/vblo/05,709.99,yes,locked 2006.229.18:23:30.98/vblo/06,719.99,yes,locked 2006.229.18:23:30.98/vblo/07,734.99,yes,locked 2006.229.18:23:30.98/vblo/08,744.99,yes,locked 2006.229.18:23:31.13/vabw/8 2006.229.18:23:31.28/vbbw/8 2006.229.18:23:31.37/xfe/off,on,12.0 2006.229.18:23:31.74/ifatt/23,28,28,28 2006.229.18:23:32.08/fmout-gps/S +4.49E-07 2006.229.18:23:32.12:!2006.229.18:24:18 2006.229.18:24:18.00:data_valid=off 2006.229.18:24:18.00:"et 2006.229.18:24:18.00:!+3s 2006.229.18:24:21.02:"tape 2006.229.18:24:21.02:postob 2006.229.18:24:21.14/cable/+6.4166E-03 2006.229.18:24:21.14/wx/26.42,1001.4,100 2006.229.18:24:22.08/fmout-gps/S +4.49E-07 2006.229.18:24:22.08:scan_name=229-1827,jd0608,110 2006.229.18:24:22.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.18:24:23.13#flagr#flagr/antenna,new-source 2006.229.18:24:23.13:checkk5 2006.229.18:24:23.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:24:23.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:24:24.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:24:24.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:24:25.15/chk_obsdata//k5ts1/T2291823??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.18:24:25.55/chk_obsdata//k5ts2/T2291823??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.18:24:25.94/chk_obsdata//k5ts3/T2291823??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.18:24:26.33/chk_obsdata//k5ts4/T2291823??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.18:24:27.06/k5log//k5ts1_log_newline 2006.229.18:24:27.77/k5log//k5ts2_log_newline 2006.229.18:24:28.48/k5log//k5ts3_log_newline 2006.229.18:24:29.20/k5log//k5ts4_log_newline 2006.229.18:24:29.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:24:29.22:setupk4=1 2006.229.18:24:29.22$setupk4/echo=on 2006.229.18:24:29.22$setupk4/pcalon 2006.229.18:24:29.22$pcalon/"no phase cal control is implemented here 2006.229.18:24:29.22$setupk4/"tpicd=stop 2006.229.18:24:29.22$setupk4/"rec=synch_on 2006.229.18:24:29.22$setupk4/"rec_mode=128 2006.229.18:24:29.22$setupk4/!* 2006.229.18:24:29.22$setupk4/recpk4 2006.229.18:24:29.22$recpk4/recpatch= 2006.229.18:24:29.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:24:29.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:24:29.23$setupk4/vck44 2006.229.18:24:29.23$vck44/valo=1,524.99 2006.229.18:24:29.23#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.18:24:29.23#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.18:24:29.23#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:29.23#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:29.23#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:29.23#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:29.23#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:24:29.23#ibcon#first serial, iclass 40, count 0 2006.229.18:24:29.23#ibcon#enter sib2, iclass 40, count 0 2006.229.18:24:29.23#ibcon#flushed, iclass 40, count 0 2006.229.18:24:29.23#ibcon#about to write, iclass 40, count 0 2006.229.18:24:29.23#ibcon#wrote, iclass 40, count 0 2006.229.18:24:29.23#ibcon#about to read 3, iclass 40, count 0 2006.229.18:24:29.24#ibcon#read 3, iclass 40, count 0 2006.229.18:24:29.25#ibcon#about to read 4, iclass 40, count 0 2006.229.18:24:29.25#ibcon#read 4, iclass 40, count 0 2006.229.18:24:29.25#ibcon#about to read 5, iclass 40, count 0 2006.229.18:24:29.25#ibcon#read 5, iclass 40, count 0 2006.229.18:24:29.25#ibcon#about to read 6, iclass 40, count 0 2006.229.18:24:29.25#ibcon#read 6, iclass 40, count 0 2006.229.18:24:29.25#ibcon#end of sib2, iclass 40, count 0 2006.229.18:24:29.25#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:24:29.25#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:24:29.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:24:29.25#ibcon#*before write, iclass 40, count 0 2006.229.18:24:29.25#ibcon#enter sib2, iclass 40, count 0 2006.229.18:24:29.25#ibcon#flushed, iclass 40, count 0 2006.229.18:24:29.25#ibcon#about to write, iclass 40, count 0 2006.229.18:24:29.25#ibcon#wrote, iclass 40, count 0 2006.229.18:24:29.25#ibcon#about to read 3, iclass 40, count 0 2006.229.18:24:29.29#ibcon#read 3, iclass 40, count 0 2006.229.18:24:29.30#ibcon#about to read 4, iclass 40, count 0 2006.229.18:24:29.30#ibcon#read 4, iclass 40, count 0 2006.229.18:24:29.30#ibcon#about to read 5, iclass 40, count 0 2006.229.18:24:29.30#ibcon#read 5, iclass 40, count 0 2006.229.18:24:29.30#ibcon#about to read 6, iclass 40, count 0 2006.229.18:24:29.30#ibcon#read 6, iclass 40, count 0 2006.229.18:24:29.30#ibcon#end of sib2, iclass 40, count 0 2006.229.18:24:29.30#ibcon#*after write, iclass 40, count 0 2006.229.18:24:29.30#ibcon#*before return 0, iclass 40, count 0 2006.229.18:24:29.30#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:29.30#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:29.30#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:24:29.30#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:24:29.30$vck44/va=1,8 2006.229.18:24:29.30#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.18:24:29.30#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.18:24:29.30#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:29.30#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:29.30#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:29.30#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:29.30#ibcon#enter wrdev, iclass 4, count 2 2006.229.18:24:29.30#ibcon#first serial, iclass 4, count 2 2006.229.18:24:29.30#ibcon#enter sib2, iclass 4, count 2 2006.229.18:24:29.30#ibcon#flushed, iclass 4, count 2 2006.229.18:24:29.30#ibcon#about to write, iclass 4, count 2 2006.229.18:24:29.30#ibcon#wrote, iclass 4, count 2 2006.229.18:24:29.30#ibcon#about to read 3, iclass 4, count 2 2006.229.18:24:29.31#ibcon#read 3, iclass 4, count 2 2006.229.18:24:29.31#ibcon#about to read 4, iclass 4, count 2 2006.229.18:24:29.32#ibcon#read 4, iclass 4, count 2 2006.229.18:24:29.32#ibcon#about to read 5, iclass 4, count 2 2006.229.18:24:29.32#ibcon#read 5, iclass 4, count 2 2006.229.18:24:29.32#ibcon#about to read 6, iclass 4, count 2 2006.229.18:24:29.32#ibcon#read 6, iclass 4, count 2 2006.229.18:24:29.32#ibcon#end of sib2, iclass 4, count 2 2006.229.18:24:29.32#ibcon#*mode == 0, iclass 4, count 2 2006.229.18:24:29.32#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.18:24:29.32#ibcon#[25=AT01-08\r\n] 2006.229.18:24:29.32#ibcon#*before write, iclass 4, count 2 2006.229.18:24:29.32#ibcon#enter sib2, iclass 4, count 2 2006.229.18:24:29.32#ibcon#flushed, iclass 4, count 2 2006.229.18:24:29.32#ibcon#about to write, iclass 4, count 2 2006.229.18:24:29.32#ibcon#wrote, iclass 4, count 2 2006.229.18:24:29.32#ibcon#about to read 3, iclass 4, count 2 2006.229.18:24:29.34#ibcon#read 3, iclass 4, count 2 2006.229.18:24:29.34#ibcon#about to read 4, iclass 4, count 2 2006.229.18:24:29.35#ibcon#read 4, iclass 4, count 2 2006.229.18:24:29.35#ibcon#about to read 5, iclass 4, count 2 2006.229.18:24:29.35#ibcon#read 5, iclass 4, count 2 2006.229.18:24:29.35#ibcon#about to read 6, iclass 4, count 2 2006.229.18:24:29.35#ibcon#read 6, iclass 4, count 2 2006.229.18:24:29.35#ibcon#end of sib2, iclass 4, count 2 2006.229.18:24:29.35#ibcon#*after write, iclass 4, count 2 2006.229.18:24:29.35#ibcon#*before return 0, iclass 4, count 2 2006.229.18:24:29.35#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:29.35#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:29.35#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.18:24:29.35#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:29.35#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:29.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:29.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:29.47#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:24:29.47#ibcon#first serial, iclass 4, count 0 2006.229.18:24:29.47#ibcon#enter sib2, iclass 4, count 0 2006.229.18:24:29.47#ibcon#flushed, iclass 4, count 0 2006.229.18:24:29.47#ibcon#about to write, iclass 4, count 0 2006.229.18:24:29.47#ibcon#wrote, iclass 4, count 0 2006.229.18:24:29.47#ibcon#about to read 3, iclass 4, count 0 2006.229.18:24:29.48#ibcon#read 3, iclass 4, count 0 2006.229.18:24:29.49#ibcon#about to read 4, iclass 4, count 0 2006.229.18:24:29.49#ibcon#read 4, iclass 4, count 0 2006.229.18:24:29.49#ibcon#about to read 5, iclass 4, count 0 2006.229.18:24:29.49#ibcon#read 5, iclass 4, count 0 2006.229.18:24:29.49#ibcon#about to read 6, iclass 4, count 0 2006.229.18:24:29.49#ibcon#read 6, iclass 4, count 0 2006.229.18:24:29.49#ibcon#end of sib2, iclass 4, count 0 2006.229.18:24:29.49#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:24:29.49#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:24:29.49#ibcon#[25=USB\r\n] 2006.229.18:24:29.49#ibcon#*before write, iclass 4, count 0 2006.229.18:24:29.49#ibcon#enter sib2, iclass 4, count 0 2006.229.18:24:29.49#ibcon#flushed, iclass 4, count 0 2006.229.18:24:29.49#ibcon#about to write, iclass 4, count 0 2006.229.18:24:29.49#ibcon#wrote, iclass 4, count 0 2006.229.18:24:29.49#ibcon#about to read 3, iclass 4, count 0 2006.229.18:24:29.51#ibcon#read 3, iclass 4, count 0 2006.229.18:24:29.52#ibcon#about to read 4, iclass 4, count 0 2006.229.18:24:29.52#ibcon#read 4, iclass 4, count 0 2006.229.18:24:29.52#ibcon#about to read 5, iclass 4, count 0 2006.229.18:24:29.52#ibcon#read 5, iclass 4, count 0 2006.229.18:24:29.52#ibcon#about to read 6, iclass 4, count 0 2006.229.18:24:29.52#ibcon#read 6, iclass 4, count 0 2006.229.18:24:29.52#ibcon#end of sib2, iclass 4, count 0 2006.229.18:24:29.52#ibcon#*after write, iclass 4, count 0 2006.229.18:24:29.52#ibcon#*before return 0, iclass 4, count 0 2006.229.18:24:29.52#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:29.52#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:29.52#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:24:29.52#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:24:29.52$vck44/valo=2,534.99 2006.229.18:24:29.52#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.18:24:29.52#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.18:24:29.52#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:29.52#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:29.52#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:29.52#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:29.52#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:24:29.52#ibcon#first serial, iclass 6, count 0 2006.229.18:24:29.52#ibcon#enter sib2, iclass 6, count 0 2006.229.18:24:29.52#ibcon#flushed, iclass 6, count 0 2006.229.18:24:29.52#ibcon#about to write, iclass 6, count 0 2006.229.18:24:29.52#ibcon#wrote, iclass 6, count 0 2006.229.18:24:29.52#ibcon#about to read 3, iclass 6, count 0 2006.229.18:24:29.53#ibcon#read 3, iclass 6, count 0 2006.229.18:24:29.53#ibcon#about to read 4, iclass 6, count 0 2006.229.18:24:29.54#ibcon#read 4, iclass 6, count 0 2006.229.18:24:29.54#ibcon#about to read 5, iclass 6, count 0 2006.229.18:24:29.54#ibcon#read 5, iclass 6, count 0 2006.229.18:24:29.54#ibcon#about to read 6, iclass 6, count 0 2006.229.18:24:29.54#ibcon#read 6, iclass 6, count 0 2006.229.18:24:29.54#ibcon#end of sib2, iclass 6, count 0 2006.229.18:24:29.54#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:24:29.54#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:24:29.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:24:29.54#ibcon#*before write, iclass 6, count 0 2006.229.18:24:29.54#ibcon#enter sib2, iclass 6, count 0 2006.229.18:24:29.54#ibcon#flushed, iclass 6, count 0 2006.229.18:24:29.54#ibcon#about to write, iclass 6, count 0 2006.229.18:24:29.54#ibcon#wrote, iclass 6, count 0 2006.229.18:24:29.54#ibcon#about to read 3, iclass 6, count 0 2006.229.18:24:29.57#ibcon#read 3, iclass 6, count 0 2006.229.18:24:29.57#ibcon#about to read 4, iclass 6, count 0 2006.229.18:24:29.58#ibcon#read 4, iclass 6, count 0 2006.229.18:24:29.58#ibcon#about to read 5, iclass 6, count 0 2006.229.18:24:29.58#ibcon#read 5, iclass 6, count 0 2006.229.18:24:29.58#ibcon#about to read 6, iclass 6, count 0 2006.229.18:24:29.58#ibcon#read 6, iclass 6, count 0 2006.229.18:24:29.58#ibcon#end of sib2, iclass 6, count 0 2006.229.18:24:29.58#ibcon#*after write, iclass 6, count 0 2006.229.18:24:29.58#ibcon#*before return 0, iclass 6, count 0 2006.229.18:24:29.58#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:29.58#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:29.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:24:29.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:24:29.58$vck44/va=2,7 2006.229.18:24:29.58#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.18:24:29.58#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.18:24:29.58#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:29.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:29.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:29.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:29.64#ibcon#enter wrdev, iclass 10, count 2 2006.229.18:24:29.64#ibcon#first serial, iclass 10, count 2 2006.229.18:24:29.64#ibcon#enter sib2, iclass 10, count 2 2006.229.18:24:29.64#ibcon#flushed, iclass 10, count 2 2006.229.18:24:29.64#ibcon#about to write, iclass 10, count 2 2006.229.18:24:29.64#ibcon#wrote, iclass 10, count 2 2006.229.18:24:29.64#ibcon#about to read 3, iclass 10, count 2 2006.229.18:24:29.65#ibcon#read 3, iclass 10, count 2 2006.229.18:24:29.65#ibcon#about to read 4, iclass 10, count 2 2006.229.18:24:29.66#ibcon#read 4, iclass 10, count 2 2006.229.18:24:29.66#ibcon#about to read 5, iclass 10, count 2 2006.229.18:24:29.66#ibcon#read 5, iclass 10, count 2 2006.229.18:24:29.66#ibcon#about to read 6, iclass 10, count 2 2006.229.18:24:29.66#ibcon#read 6, iclass 10, count 2 2006.229.18:24:29.66#ibcon#end of sib2, iclass 10, count 2 2006.229.18:24:29.66#ibcon#*mode == 0, iclass 10, count 2 2006.229.18:24:29.66#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.18:24:29.66#ibcon#[25=AT02-07\r\n] 2006.229.18:24:29.66#ibcon#*before write, iclass 10, count 2 2006.229.18:24:29.66#ibcon#enter sib2, iclass 10, count 2 2006.229.18:24:29.66#ibcon#flushed, iclass 10, count 2 2006.229.18:24:29.66#ibcon#about to write, iclass 10, count 2 2006.229.18:24:29.66#ibcon#wrote, iclass 10, count 2 2006.229.18:24:29.66#ibcon#about to read 3, iclass 10, count 2 2006.229.18:24:29.68#ibcon#read 3, iclass 10, count 2 2006.229.18:24:29.69#ibcon#about to read 4, iclass 10, count 2 2006.229.18:24:29.69#ibcon#read 4, iclass 10, count 2 2006.229.18:24:29.69#ibcon#about to read 5, iclass 10, count 2 2006.229.18:24:29.69#ibcon#read 5, iclass 10, count 2 2006.229.18:24:29.69#ibcon#about to read 6, iclass 10, count 2 2006.229.18:24:29.69#ibcon#read 6, iclass 10, count 2 2006.229.18:24:29.69#ibcon#end of sib2, iclass 10, count 2 2006.229.18:24:29.69#ibcon#*after write, iclass 10, count 2 2006.229.18:24:29.69#ibcon#*before return 0, iclass 10, count 2 2006.229.18:24:29.69#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:29.69#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:29.69#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.18:24:29.69#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:29.69#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:29.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:29.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:29.81#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:24:29.81#ibcon#first serial, iclass 10, count 0 2006.229.18:24:29.81#ibcon#enter sib2, iclass 10, count 0 2006.229.18:24:29.81#ibcon#flushed, iclass 10, count 0 2006.229.18:24:29.81#ibcon#about to write, iclass 10, count 0 2006.229.18:24:29.81#ibcon#wrote, iclass 10, count 0 2006.229.18:24:29.81#ibcon#about to read 3, iclass 10, count 0 2006.229.18:24:29.82#ibcon#read 3, iclass 10, count 0 2006.229.18:24:29.82#ibcon#about to read 4, iclass 10, count 0 2006.229.18:24:29.82#ibcon#read 4, iclass 10, count 0 2006.229.18:24:29.82#ibcon#about to read 5, iclass 10, count 0 2006.229.18:24:29.83#ibcon#read 5, iclass 10, count 0 2006.229.18:24:29.83#ibcon#about to read 6, iclass 10, count 0 2006.229.18:24:29.83#ibcon#read 6, iclass 10, count 0 2006.229.18:24:29.83#ibcon#end of sib2, iclass 10, count 0 2006.229.18:24:29.83#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:24:29.83#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:24:29.83#ibcon#[25=USB\r\n] 2006.229.18:24:29.83#ibcon#*before write, iclass 10, count 0 2006.229.18:24:29.83#ibcon#enter sib2, iclass 10, count 0 2006.229.18:24:29.83#ibcon#flushed, iclass 10, count 0 2006.229.18:24:29.83#ibcon#about to write, iclass 10, count 0 2006.229.18:24:29.83#ibcon#wrote, iclass 10, count 0 2006.229.18:24:29.83#ibcon#about to read 3, iclass 10, count 0 2006.229.18:24:29.85#ibcon#read 3, iclass 10, count 0 2006.229.18:24:29.85#ibcon#about to read 4, iclass 10, count 0 2006.229.18:24:29.85#ibcon#read 4, iclass 10, count 0 2006.229.18:24:29.86#ibcon#about to read 5, iclass 10, count 0 2006.229.18:24:29.86#ibcon#read 5, iclass 10, count 0 2006.229.18:24:29.86#ibcon#about to read 6, iclass 10, count 0 2006.229.18:24:29.86#ibcon#read 6, iclass 10, count 0 2006.229.18:24:29.86#ibcon#end of sib2, iclass 10, count 0 2006.229.18:24:29.86#ibcon#*after write, iclass 10, count 0 2006.229.18:24:29.86#ibcon#*before return 0, iclass 10, count 0 2006.229.18:24:29.86#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:29.86#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:29.86#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:24:29.86#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:24:29.86$vck44/valo=3,564.99 2006.229.18:24:29.86#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:24:29.86#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:24:29.86#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:29.86#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:29.86#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:29.86#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:29.86#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:24:29.86#ibcon#first serial, iclass 12, count 0 2006.229.18:24:29.86#ibcon#enter sib2, iclass 12, count 0 2006.229.18:24:29.86#ibcon#flushed, iclass 12, count 0 2006.229.18:24:29.86#ibcon#about to write, iclass 12, count 0 2006.229.18:24:29.86#ibcon#wrote, iclass 12, count 0 2006.229.18:24:29.86#ibcon#about to read 3, iclass 12, count 0 2006.229.18:24:29.87#ibcon#read 3, iclass 12, count 0 2006.229.18:24:29.87#ibcon#about to read 4, iclass 12, count 0 2006.229.18:24:29.87#ibcon#read 4, iclass 12, count 0 2006.229.18:24:29.87#ibcon#about to read 5, iclass 12, count 0 2006.229.18:24:29.87#ibcon#read 5, iclass 12, count 0 2006.229.18:24:29.88#ibcon#about to read 6, iclass 12, count 0 2006.229.18:24:29.88#ibcon#read 6, iclass 12, count 0 2006.229.18:24:29.88#ibcon#end of sib2, iclass 12, count 0 2006.229.18:24:29.88#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:24:29.88#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:24:29.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:24:29.88#ibcon#*before write, iclass 12, count 0 2006.229.18:24:29.88#ibcon#enter sib2, iclass 12, count 0 2006.229.18:24:29.88#ibcon#flushed, iclass 12, count 0 2006.229.18:24:29.88#ibcon#about to write, iclass 12, count 0 2006.229.18:24:29.88#ibcon#wrote, iclass 12, count 0 2006.229.18:24:29.88#ibcon#about to read 3, iclass 12, count 0 2006.229.18:24:29.91#ibcon#read 3, iclass 12, count 0 2006.229.18:24:29.91#ibcon#about to read 4, iclass 12, count 0 2006.229.18:24:29.92#ibcon#read 4, iclass 12, count 0 2006.229.18:24:29.92#ibcon#about to read 5, iclass 12, count 0 2006.229.18:24:29.92#ibcon#read 5, iclass 12, count 0 2006.229.18:24:29.92#ibcon#about to read 6, iclass 12, count 0 2006.229.18:24:29.92#ibcon#read 6, iclass 12, count 0 2006.229.18:24:29.92#ibcon#end of sib2, iclass 12, count 0 2006.229.18:24:29.92#ibcon#*after write, iclass 12, count 0 2006.229.18:24:29.92#ibcon#*before return 0, iclass 12, count 0 2006.229.18:24:29.92#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:29.92#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:29.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:24:29.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:24:29.92$vck44/va=3,6 2006.229.18:24:29.92#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.18:24:29.92#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.18:24:29.92#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:29.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:29.97#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:29.97#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:29.98#ibcon#enter wrdev, iclass 14, count 2 2006.229.18:24:29.98#ibcon#first serial, iclass 14, count 2 2006.229.18:24:29.98#ibcon#enter sib2, iclass 14, count 2 2006.229.18:24:29.98#ibcon#flushed, iclass 14, count 2 2006.229.18:24:29.98#ibcon#about to write, iclass 14, count 2 2006.229.18:24:29.98#ibcon#wrote, iclass 14, count 2 2006.229.18:24:29.98#ibcon#about to read 3, iclass 14, count 2 2006.229.18:24:29.99#ibcon#read 3, iclass 14, count 2 2006.229.18:24:29.99#ibcon#about to read 4, iclass 14, count 2 2006.229.18:24:29.99#ibcon#read 4, iclass 14, count 2 2006.229.18:24:30.00#ibcon#about to read 5, iclass 14, count 2 2006.229.18:24:30.00#ibcon#read 5, iclass 14, count 2 2006.229.18:24:30.00#ibcon#about to read 6, iclass 14, count 2 2006.229.18:24:30.00#ibcon#read 6, iclass 14, count 2 2006.229.18:24:30.00#ibcon#end of sib2, iclass 14, count 2 2006.229.18:24:30.00#ibcon#*mode == 0, iclass 14, count 2 2006.229.18:24:30.00#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.18:24:30.00#ibcon#[25=AT03-06\r\n] 2006.229.18:24:30.00#ibcon#*before write, iclass 14, count 2 2006.229.18:24:30.00#ibcon#enter sib2, iclass 14, count 2 2006.229.18:24:30.00#ibcon#flushed, iclass 14, count 2 2006.229.18:24:30.00#ibcon#about to write, iclass 14, count 2 2006.229.18:24:30.00#ibcon#wrote, iclass 14, count 2 2006.229.18:24:30.00#ibcon#about to read 3, iclass 14, count 2 2006.229.18:24:30.02#ibcon#read 3, iclass 14, count 2 2006.229.18:24:30.03#ibcon#about to read 4, iclass 14, count 2 2006.229.18:24:30.03#ibcon#read 4, iclass 14, count 2 2006.229.18:24:30.03#ibcon#about to read 5, iclass 14, count 2 2006.229.18:24:30.03#ibcon#read 5, iclass 14, count 2 2006.229.18:24:30.03#ibcon#about to read 6, iclass 14, count 2 2006.229.18:24:30.03#ibcon#read 6, iclass 14, count 2 2006.229.18:24:30.03#ibcon#end of sib2, iclass 14, count 2 2006.229.18:24:30.03#ibcon#*after write, iclass 14, count 2 2006.229.18:24:30.03#ibcon#*before return 0, iclass 14, count 2 2006.229.18:24:30.03#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:30.03#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:30.03#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.18:24:30.03#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:30.03#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:30.14#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:30.14#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:30.14#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:24:30.15#ibcon#first serial, iclass 14, count 0 2006.229.18:24:30.15#ibcon#enter sib2, iclass 14, count 0 2006.229.18:24:30.15#ibcon#flushed, iclass 14, count 0 2006.229.18:24:30.15#ibcon#about to write, iclass 14, count 0 2006.229.18:24:30.15#ibcon#wrote, iclass 14, count 0 2006.229.18:24:30.15#ibcon#about to read 3, iclass 14, count 0 2006.229.18:24:30.16#ibcon#read 3, iclass 14, count 0 2006.229.18:24:30.16#ibcon#about to read 4, iclass 14, count 0 2006.229.18:24:30.16#ibcon#read 4, iclass 14, count 0 2006.229.18:24:30.17#ibcon#about to read 5, iclass 14, count 0 2006.229.18:24:30.17#ibcon#read 5, iclass 14, count 0 2006.229.18:24:30.17#ibcon#about to read 6, iclass 14, count 0 2006.229.18:24:30.17#ibcon#read 6, iclass 14, count 0 2006.229.18:24:30.17#ibcon#end of sib2, iclass 14, count 0 2006.229.18:24:30.17#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:24:30.17#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:24:30.17#ibcon#[25=USB\r\n] 2006.229.18:24:30.17#ibcon#*before write, iclass 14, count 0 2006.229.18:24:30.17#ibcon#enter sib2, iclass 14, count 0 2006.229.18:24:30.17#ibcon#flushed, iclass 14, count 0 2006.229.18:24:30.17#ibcon#about to write, iclass 14, count 0 2006.229.18:24:30.17#ibcon#wrote, iclass 14, count 0 2006.229.18:24:30.17#ibcon#about to read 3, iclass 14, count 0 2006.229.18:24:30.19#ibcon#read 3, iclass 14, count 0 2006.229.18:24:30.19#ibcon#about to read 4, iclass 14, count 0 2006.229.18:24:30.19#ibcon#read 4, iclass 14, count 0 2006.229.18:24:30.19#ibcon#about to read 5, iclass 14, count 0 2006.229.18:24:30.20#ibcon#read 5, iclass 14, count 0 2006.229.18:24:30.20#ibcon#about to read 6, iclass 14, count 0 2006.229.18:24:30.20#ibcon#read 6, iclass 14, count 0 2006.229.18:24:30.20#ibcon#end of sib2, iclass 14, count 0 2006.229.18:24:30.20#ibcon#*after write, iclass 14, count 0 2006.229.18:24:30.20#ibcon#*before return 0, iclass 14, count 0 2006.229.18:24:30.20#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:30.20#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:30.20#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:24:30.20#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:24:30.20$vck44/valo=4,624.99 2006.229.18:24:30.20#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.18:24:30.20#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.18:24:30.20#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:30.20#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:30.20#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:30.20#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:30.20#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:24:30.20#ibcon#first serial, iclass 16, count 0 2006.229.18:24:30.20#ibcon#enter sib2, iclass 16, count 0 2006.229.18:24:30.20#ibcon#flushed, iclass 16, count 0 2006.229.18:24:30.20#ibcon#about to write, iclass 16, count 0 2006.229.18:24:30.20#ibcon#wrote, iclass 16, count 0 2006.229.18:24:30.20#ibcon#about to read 3, iclass 16, count 0 2006.229.18:24:30.21#ibcon#read 3, iclass 16, count 0 2006.229.18:24:30.21#ibcon#about to read 4, iclass 16, count 0 2006.229.18:24:30.22#ibcon#read 4, iclass 16, count 0 2006.229.18:24:30.22#ibcon#about to read 5, iclass 16, count 0 2006.229.18:24:30.22#ibcon#read 5, iclass 16, count 0 2006.229.18:24:30.22#ibcon#about to read 6, iclass 16, count 0 2006.229.18:24:30.22#ibcon#read 6, iclass 16, count 0 2006.229.18:24:30.22#ibcon#end of sib2, iclass 16, count 0 2006.229.18:24:30.22#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:24:30.22#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:24:30.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:24:30.22#ibcon#*before write, iclass 16, count 0 2006.229.18:24:30.22#ibcon#enter sib2, iclass 16, count 0 2006.229.18:24:30.22#ibcon#flushed, iclass 16, count 0 2006.229.18:24:30.22#ibcon#about to write, iclass 16, count 0 2006.229.18:24:30.22#ibcon#wrote, iclass 16, count 0 2006.229.18:24:30.22#ibcon#about to read 3, iclass 16, count 0 2006.229.18:24:30.25#ibcon#read 3, iclass 16, count 0 2006.229.18:24:30.25#ibcon#about to read 4, iclass 16, count 0 2006.229.18:24:30.26#ibcon#read 4, iclass 16, count 0 2006.229.18:24:30.26#ibcon#about to read 5, iclass 16, count 0 2006.229.18:24:30.26#ibcon#read 5, iclass 16, count 0 2006.229.18:24:30.26#ibcon#about to read 6, iclass 16, count 0 2006.229.18:24:30.26#ibcon#read 6, iclass 16, count 0 2006.229.18:24:30.26#ibcon#end of sib2, iclass 16, count 0 2006.229.18:24:30.26#ibcon#*after write, iclass 16, count 0 2006.229.18:24:30.26#ibcon#*before return 0, iclass 16, count 0 2006.229.18:24:30.26#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:30.26#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:30.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:24:30.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:24:30.26$vck44/va=4,7 2006.229.18:24:30.26#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.18:24:30.26#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.18:24:30.26#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:30.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:30.31#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:30.31#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:30.31#ibcon#enter wrdev, iclass 18, count 2 2006.229.18:24:30.32#ibcon#first serial, iclass 18, count 2 2006.229.18:24:30.32#ibcon#enter sib2, iclass 18, count 2 2006.229.18:24:30.32#ibcon#flushed, iclass 18, count 2 2006.229.18:24:30.32#ibcon#about to write, iclass 18, count 2 2006.229.18:24:30.32#ibcon#wrote, iclass 18, count 2 2006.229.18:24:30.32#ibcon#about to read 3, iclass 18, count 2 2006.229.18:24:30.33#ibcon#read 3, iclass 18, count 2 2006.229.18:24:30.33#ibcon#about to read 4, iclass 18, count 2 2006.229.18:24:30.34#ibcon#read 4, iclass 18, count 2 2006.229.18:24:30.34#ibcon#about to read 5, iclass 18, count 2 2006.229.18:24:30.34#ibcon#read 5, iclass 18, count 2 2006.229.18:24:30.34#ibcon#about to read 6, iclass 18, count 2 2006.229.18:24:30.34#ibcon#read 6, iclass 18, count 2 2006.229.18:24:30.34#ibcon#end of sib2, iclass 18, count 2 2006.229.18:24:30.34#ibcon#*mode == 0, iclass 18, count 2 2006.229.18:24:30.34#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.18:24:30.34#ibcon#[25=AT04-07\r\n] 2006.229.18:24:30.34#ibcon#*before write, iclass 18, count 2 2006.229.18:24:30.34#ibcon#enter sib2, iclass 18, count 2 2006.229.18:24:30.34#ibcon#flushed, iclass 18, count 2 2006.229.18:24:30.34#ibcon#about to write, iclass 18, count 2 2006.229.18:24:30.34#ibcon#wrote, iclass 18, count 2 2006.229.18:24:30.34#ibcon#about to read 3, iclass 18, count 2 2006.229.18:24:30.36#ibcon#read 3, iclass 18, count 2 2006.229.18:24:30.36#ibcon#about to read 4, iclass 18, count 2 2006.229.18:24:30.36#ibcon#read 4, iclass 18, count 2 2006.229.18:24:30.37#ibcon#about to read 5, iclass 18, count 2 2006.229.18:24:30.37#ibcon#read 5, iclass 18, count 2 2006.229.18:24:30.37#ibcon#about to read 6, iclass 18, count 2 2006.229.18:24:30.37#ibcon#read 6, iclass 18, count 2 2006.229.18:24:30.37#ibcon#end of sib2, iclass 18, count 2 2006.229.18:24:30.37#ibcon#*after write, iclass 18, count 2 2006.229.18:24:30.37#ibcon#*before return 0, iclass 18, count 2 2006.229.18:24:30.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:30.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:30.37#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.18:24:30.37#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:30.37#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:30.48#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:30.48#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:30.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:24:30.49#ibcon#first serial, iclass 18, count 0 2006.229.18:24:30.49#ibcon#enter sib2, iclass 18, count 0 2006.229.18:24:30.49#ibcon#flushed, iclass 18, count 0 2006.229.18:24:30.49#ibcon#about to write, iclass 18, count 0 2006.229.18:24:30.49#ibcon#wrote, iclass 18, count 0 2006.229.18:24:30.49#ibcon#about to read 3, iclass 18, count 0 2006.229.18:24:30.51#ibcon#read 3, iclass 18, count 0 2006.229.18:24:30.51#ibcon#about to read 4, iclass 18, count 0 2006.229.18:24:30.51#ibcon#read 4, iclass 18, count 0 2006.229.18:24:30.51#ibcon#about to read 5, iclass 18, count 0 2006.229.18:24:30.51#ibcon#read 5, iclass 18, count 0 2006.229.18:24:30.51#ibcon#about to read 6, iclass 18, count 0 2006.229.18:24:30.51#ibcon#read 6, iclass 18, count 0 2006.229.18:24:30.51#ibcon#end of sib2, iclass 18, count 0 2006.229.18:24:30.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:24:30.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:24:30.51#ibcon#[25=USB\r\n] 2006.229.18:24:30.51#ibcon#*before write, iclass 18, count 0 2006.229.18:24:30.51#ibcon#enter sib2, iclass 18, count 0 2006.229.18:24:30.51#ibcon#flushed, iclass 18, count 0 2006.229.18:24:30.51#ibcon#about to write, iclass 18, count 0 2006.229.18:24:30.51#ibcon#wrote, iclass 18, count 0 2006.229.18:24:30.51#ibcon#about to read 3, iclass 18, count 0 2006.229.18:24:30.53#ibcon#read 3, iclass 18, count 0 2006.229.18:24:30.54#ibcon#about to read 4, iclass 18, count 0 2006.229.18:24:30.54#ibcon#read 4, iclass 18, count 0 2006.229.18:24:30.54#ibcon#about to read 5, iclass 18, count 0 2006.229.18:24:30.54#ibcon#read 5, iclass 18, count 0 2006.229.18:24:30.54#ibcon#about to read 6, iclass 18, count 0 2006.229.18:24:30.54#ibcon#read 6, iclass 18, count 0 2006.229.18:24:30.54#ibcon#end of sib2, iclass 18, count 0 2006.229.18:24:30.54#ibcon#*after write, iclass 18, count 0 2006.229.18:24:30.54#ibcon#*before return 0, iclass 18, count 0 2006.229.18:24:30.54#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:30.54#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:30.54#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:24:30.54#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:24:30.54$vck44/valo=5,734.99 2006.229.18:24:30.54#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.18:24:30.54#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.18:24:30.54#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:30.54#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:30.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:30.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:30.54#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:24:30.54#ibcon#first serial, iclass 20, count 0 2006.229.18:24:30.54#ibcon#enter sib2, iclass 20, count 0 2006.229.18:24:30.54#ibcon#flushed, iclass 20, count 0 2006.229.18:24:30.54#ibcon#about to write, iclass 20, count 0 2006.229.18:24:30.54#ibcon#wrote, iclass 20, count 0 2006.229.18:24:30.54#ibcon#about to read 3, iclass 20, count 0 2006.229.18:24:30.55#ibcon#read 3, iclass 20, count 0 2006.229.18:24:30.56#ibcon#about to read 4, iclass 20, count 0 2006.229.18:24:30.56#ibcon#read 4, iclass 20, count 0 2006.229.18:24:30.56#ibcon#about to read 5, iclass 20, count 0 2006.229.18:24:30.56#ibcon#read 5, iclass 20, count 0 2006.229.18:24:30.56#ibcon#about to read 6, iclass 20, count 0 2006.229.18:24:30.56#ibcon#read 6, iclass 20, count 0 2006.229.18:24:30.56#ibcon#end of sib2, iclass 20, count 0 2006.229.18:24:30.56#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:24:30.56#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:24:30.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:24:30.56#ibcon#*before write, iclass 20, count 0 2006.229.18:24:30.56#ibcon#enter sib2, iclass 20, count 0 2006.229.18:24:30.56#ibcon#flushed, iclass 20, count 0 2006.229.18:24:30.56#ibcon#about to write, iclass 20, count 0 2006.229.18:24:30.56#ibcon#wrote, iclass 20, count 0 2006.229.18:24:30.56#ibcon#about to read 3, iclass 20, count 0 2006.229.18:24:30.59#ibcon#read 3, iclass 20, count 0 2006.229.18:24:30.59#ibcon#about to read 4, iclass 20, count 0 2006.229.18:24:30.60#ibcon#read 4, iclass 20, count 0 2006.229.18:24:30.60#ibcon#about to read 5, iclass 20, count 0 2006.229.18:24:30.60#ibcon#read 5, iclass 20, count 0 2006.229.18:24:30.60#ibcon#about to read 6, iclass 20, count 0 2006.229.18:24:30.60#ibcon#read 6, iclass 20, count 0 2006.229.18:24:30.60#ibcon#end of sib2, iclass 20, count 0 2006.229.18:24:30.60#ibcon#*after write, iclass 20, count 0 2006.229.18:24:30.60#ibcon#*before return 0, iclass 20, count 0 2006.229.18:24:30.60#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:30.60#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:30.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:24:30.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:24:30.60$vck44/va=5,4 2006.229.18:24:30.60#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.18:24:30.60#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.18:24:30.60#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:30.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:30.65#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:30.65#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:30.66#ibcon#enter wrdev, iclass 22, count 2 2006.229.18:24:30.66#ibcon#first serial, iclass 22, count 2 2006.229.18:24:30.66#ibcon#enter sib2, iclass 22, count 2 2006.229.18:24:30.66#ibcon#flushed, iclass 22, count 2 2006.229.18:24:30.66#ibcon#about to write, iclass 22, count 2 2006.229.18:24:30.66#ibcon#wrote, iclass 22, count 2 2006.229.18:24:30.66#ibcon#about to read 3, iclass 22, count 2 2006.229.18:24:30.67#ibcon#read 3, iclass 22, count 2 2006.229.18:24:30.67#ibcon#about to read 4, iclass 22, count 2 2006.229.18:24:30.68#ibcon#read 4, iclass 22, count 2 2006.229.18:24:30.68#ibcon#about to read 5, iclass 22, count 2 2006.229.18:24:30.68#ibcon#read 5, iclass 22, count 2 2006.229.18:24:30.68#ibcon#about to read 6, iclass 22, count 2 2006.229.18:24:30.68#ibcon#read 6, iclass 22, count 2 2006.229.18:24:30.68#ibcon#end of sib2, iclass 22, count 2 2006.229.18:24:30.68#ibcon#*mode == 0, iclass 22, count 2 2006.229.18:24:30.68#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.18:24:30.68#ibcon#[25=AT05-04\r\n] 2006.229.18:24:30.68#ibcon#*before write, iclass 22, count 2 2006.229.18:24:30.68#ibcon#enter sib2, iclass 22, count 2 2006.229.18:24:30.68#ibcon#flushed, iclass 22, count 2 2006.229.18:24:30.68#ibcon#about to write, iclass 22, count 2 2006.229.18:24:30.68#ibcon#wrote, iclass 22, count 2 2006.229.18:24:30.68#ibcon#about to read 3, iclass 22, count 2 2006.229.18:24:30.70#ibcon#read 3, iclass 22, count 2 2006.229.18:24:30.71#ibcon#about to read 4, iclass 22, count 2 2006.229.18:24:30.71#ibcon#read 4, iclass 22, count 2 2006.229.18:24:30.71#ibcon#about to read 5, iclass 22, count 2 2006.229.18:24:30.71#ibcon#read 5, iclass 22, count 2 2006.229.18:24:30.71#ibcon#about to read 6, iclass 22, count 2 2006.229.18:24:30.71#ibcon#read 6, iclass 22, count 2 2006.229.18:24:30.71#ibcon#end of sib2, iclass 22, count 2 2006.229.18:24:30.71#ibcon#*after write, iclass 22, count 2 2006.229.18:24:30.71#ibcon#*before return 0, iclass 22, count 2 2006.229.18:24:30.71#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:30.71#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:30.71#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.18:24:30.71#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:30.71#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:30.82#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:30.82#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:30.83#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:24:30.83#ibcon#first serial, iclass 22, count 0 2006.229.18:24:30.83#ibcon#enter sib2, iclass 22, count 0 2006.229.18:24:30.83#ibcon#flushed, iclass 22, count 0 2006.229.18:24:30.83#ibcon#about to write, iclass 22, count 0 2006.229.18:24:30.83#ibcon#wrote, iclass 22, count 0 2006.229.18:24:30.83#ibcon#about to read 3, iclass 22, count 0 2006.229.18:24:30.84#ibcon#read 3, iclass 22, count 0 2006.229.18:24:30.84#ibcon#about to read 4, iclass 22, count 0 2006.229.18:24:30.84#ibcon#read 4, iclass 22, count 0 2006.229.18:24:30.84#ibcon#about to read 5, iclass 22, count 0 2006.229.18:24:30.85#ibcon#read 5, iclass 22, count 0 2006.229.18:24:30.85#ibcon#about to read 6, iclass 22, count 0 2006.229.18:24:30.85#ibcon#read 6, iclass 22, count 0 2006.229.18:24:30.85#ibcon#end of sib2, iclass 22, count 0 2006.229.18:24:30.85#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:24:30.85#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:24:30.85#ibcon#[25=USB\r\n] 2006.229.18:24:30.85#ibcon#*before write, iclass 22, count 0 2006.229.18:24:30.85#ibcon#enter sib2, iclass 22, count 0 2006.229.18:24:30.85#ibcon#flushed, iclass 22, count 0 2006.229.18:24:30.85#ibcon#about to write, iclass 22, count 0 2006.229.18:24:30.85#ibcon#wrote, iclass 22, count 0 2006.229.18:24:30.85#ibcon#about to read 3, iclass 22, count 0 2006.229.18:24:30.87#ibcon#read 3, iclass 22, count 0 2006.229.18:24:30.87#ibcon#about to read 4, iclass 22, count 0 2006.229.18:24:30.87#ibcon#read 4, iclass 22, count 0 2006.229.18:24:30.88#ibcon#about to read 5, iclass 22, count 0 2006.229.18:24:30.88#ibcon#read 5, iclass 22, count 0 2006.229.18:24:30.88#ibcon#about to read 6, iclass 22, count 0 2006.229.18:24:30.88#ibcon#read 6, iclass 22, count 0 2006.229.18:24:30.88#ibcon#end of sib2, iclass 22, count 0 2006.229.18:24:30.88#ibcon#*after write, iclass 22, count 0 2006.229.18:24:30.88#ibcon#*before return 0, iclass 22, count 0 2006.229.18:24:30.88#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:30.88#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:30.88#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:24:30.88#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:24:30.88$vck44/valo=6,814.99 2006.229.18:24:30.88#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.18:24:30.88#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.18:24:30.88#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:30.88#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:30.88#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:30.88#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:30.88#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:24:30.88#ibcon#first serial, iclass 24, count 0 2006.229.18:24:30.88#ibcon#enter sib2, iclass 24, count 0 2006.229.18:24:30.88#ibcon#flushed, iclass 24, count 0 2006.229.18:24:30.88#ibcon#about to write, iclass 24, count 0 2006.229.18:24:30.88#ibcon#wrote, iclass 24, count 0 2006.229.18:24:30.88#ibcon#about to read 3, iclass 24, count 0 2006.229.18:24:30.89#ibcon#read 3, iclass 24, count 0 2006.229.18:24:30.89#ibcon#about to read 4, iclass 24, count 0 2006.229.18:24:30.89#ibcon#read 4, iclass 24, count 0 2006.229.18:24:30.89#ibcon#about to read 5, iclass 24, count 0 2006.229.18:24:30.90#ibcon#read 5, iclass 24, count 0 2006.229.18:24:30.90#ibcon#about to read 6, iclass 24, count 0 2006.229.18:24:30.90#ibcon#read 6, iclass 24, count 0 2006.229.18:24:30.90#ibcon#end of sib2, iclass 24, count 0 2006.229.18:24:30.90#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:24:30.90#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:24:30.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:24:30.90#ibcon#*before write, iclass 24, count 0 2006.229.18:24:30.90#ibcon#enter sib2, iclass 24, count 0 2006.229.18:24:30.90#ibcon#flushed, iclass 24, count 0 2006.229.18:24:30.90#ibcon#about to write, iclass 24, count 0 2006.229.18:24:30.90#ibcon#wrote, iclass 24, count 0 2006.229.18:24:30.90#ibcon#about to read 3, iclass 24, count 0 2006.229.18:24:30.93#ibcon#read 3, iclass 24, count 0 2006.229.18:24:30.93#ibcon#about to read 4, iclass 24, count 0 2006.229.18:24:30.93#ibcon#read 4, iclass 24, count 0 2006.229.18:24:30.94#ibcon#about to read 5, iclass 24, count 0 2006.229.18:24:30.94#ibcon#read 5, iclass 24, count 0 2006.229.18:24:30.94#ibcon#about to read 6, iclass 24, count 0 2006.229.18:24:30.94#ibcon#read 6, iclass 24, count 0 2006.229.18:24:30.94#ibcon#end of sib2, iclass 24, count 0 2006.229.18:24:30.94#ibcon#*after write, iclass 24, count 0 2006.229.18:24:30.94#ibcon#*before return 0, iclass 24, count 0 2006.229.18:24:30.94#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:30.94#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:30.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:24:30.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:24:30.94$vck44/va=6,4 2006.229.18:24:30.94#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.18:24:30.94#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.18:24:30.94#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:30.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:30.99#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:30.99#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:30.99#ibcon#enter wrdev, iclass 26, count 2 2006.229.18:24:31.00#ibcon#first serial, iclass 26, count 2 2006.229.18:24:31.00#ibcon#enter sib2, iclass 26, count 2 2006.229.18:24:31.00#ibcon#flushed, iclass 26, count 2 2006.229.18:24:31.00#ibcon#about to write, iclass 26, count 2 2006.229.18:24:31.00#ibcon#wrote, iclass 26, count 2 2006.229.18:24:31.00#ibcon#about to read 3, iclass 26, count 2 2006.229.18:24:31.01#ibcon#read 3, iclass 26, count 2 2006.229.18:24:31.01#ibcon#about to read 4, iclass 26, count 2 2006.229.18:24:31.01#ibcon#read 4, iclass 26, count 2 2006.229.18:24:31.02#ibcon#about to read 5, iclass 26, count 2 2006.229.18:24:31.02#ibcon#read 5, iclass 26, count 2 2006.229.18:24:31.02#ibcon#about to read 6, iclass 26, count 2 2006.229.18:24:31.02#ibcon#read 6, iclass 26, count 2 2006.229.18:24:31.02#ibcon#end of sib2, iclass 26, count 2 2006.229.18:24:31.02#ibcon#*mode == 0, iclass 26, count 2 2006.229.18:24:31.02#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.18:24:31.02#ibcon#[25=AT06-04\r\n] 2006.229.18:24:31.02#ibcon#*before write, iclass 26, count 2 2006.229.18:24:31.02#ibcon#enter sib2, iclass 26, count 2 2006.229.18:24:31.02#ibcon#flushed, iclass 26, count 2 2006.229.18:24:31.02#ibcon#about to write, iclass 26, count 2 2006.229.18:24:31.02#ibcon#wrote, iclass 26, count 2 2006.229.18:24:31.02#ibcon#about to read 3, iclass 26, count 2 2006.229.18:24:31.04#ibcon#read 3, iclass 26, count 2 2006.229.18:24:31.04#ibcon#about to read 4, iclass 26, count 2 2006.229.18:24:31.05#ibcon#read 4, iclass 26, count 2 2006.229.18:24:31.05#ibcon#about to read 5, iclass 26, count 2 2006.229.18:24:31.05#ibcon#read 5, iclass 26, count 2 2006.229.18:24:31.05#ibcon#about to read 6, iclass 26, count 2 2006.229.18:24:31.05#ibcon#read 6, iclass 26, count 2 2006.229.18:24:31.05#ibcon#end of sib2, iclass 26, count 2 2006.229.18:24:31.05#ibcon#*after write, iclass 26, count 2 2006.229.18:24:31.05#ibcon#*before return 0, iclass 26, count 2 2006.229.18:24:31.05#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:31.05#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:31.05#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.18:24:31.05#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:31.05#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:31.16#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:31.16#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:31.17#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:24:31.17#ibcon#first serial, iclass 26, count 0 2006.229.18:24:31.17#ibcon#enter sib2, iclass 26, count 0 2006.229.18:24:31.17#ibcon#flushed, iclass 26, count 0 2006.229.18:24:31.17#ibcon#about to write, iclass 26, count 0 2006.229.18:24:31.17#ibcon#wrote, iclass 26, count 0 2006.229.18:24:31.17#ibcon#about to read 3, iclass 26, count 0 2006.229.18:24:31.18#ibcon#read 3, iclass 26, count 0 2006.229.18:24:31.18#ibcon#about to read 4, iclass 26, count 0 2006.229.18:24:31.18#ibcon#read 4, iclass 26, count 0 2006.229.18:24:31.18#ibcon#about to read 5, iclass 26, count 0 2006.229.18:24:31.19#ibcon#read 5, iclass 26, count 0 2006.229.18:24:31.19#ibcon#about to read 6, iclass 26, count 0 2006.229.18:24:31.19#ibcon#read 6, iclass 26, count 0 2006.229.18:24:31.19#ibcon#end of sib2, iclass 26, count 0 2006.229.18:24:31.19#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:24:31.19#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:24:31.19#ibcon#[25=USB\r\n] 2006.229.18:24:31.19#ibcon#*before write, iclass 26, count 0 2006.229.18:24:31.19#ibcon#enter sib2, iclass 26, count 0 2006.229.18:24:31.19#ibcon#flushed, iclass 26, count 0 2006.229.18:24:31.19#ibcon#about to write, iclass 26, count 0 2006.229.18:24:31.19#ibcon#wrote, iclass 26, count 0 2006.229.18:24:31.19#ibcon#about to read 3, iclass 26, count 0 2006.229.18:24:31.21#ibcon#read 3, iclass 26, count 0 2006.229.18:24:31.21#ibcon#about to read 4, iclass 26, count 0 2006.229.18:24:31.21#ibcon#read 4, iclass 26, count 0 2006.229.18:24:31.22#ibcon#about to read 5, iclass 26, count 0 2006.229.18:24:31.22#ibcon#read 5, iclass 26, count 0 2006.229.18:24:31.22#ibcon#about to read 6, iclass 26, count 0 2006.229.18:24:31.22#ibcon#read 6, iclass 26, count 0 2006.229.18:24:31.22#ibcon#end of sib2, iclass 26, count 0 2006.229.18:24:31.22#ibcon#*after write, iclass 26, count 0 2006.229.18:24:31.22#ibcon#*before return 0, iclass 26, count 0 2006.229.18:24:31.22#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:31.22#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:31.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:24:31.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:24:31.22$vck44/valo=7,864.99 2006.229.18:24:31.22#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.18:24:31.22#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.18:24:31.22#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:31.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:31.22#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:31.22#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:31.22#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:24:31.22#ibcon#first serial, iclass 28, count 0 2006.229.18:24:31.22#ibcon#enter sib2, iclass 28, count 0 2006.229.18:24:31.22#ibcon#flushed, iclass 28, count 0 2006.229.18:24:31.22#ibcon#about to write, iclass 28, count 0 2006.229.18:24:31.22#ibcon#wrote, iclass 28, count 0 2006.229.18:24:31.22#ibcon#about to read 3, iclass 28, count 0 2006.229.18:24:31.23#ibcon#read 3, iclass 28, count 0 2006.229.18:24:31.23#ibcon#about to read 4, iclass 28, count 0 2006.229.18:24:31.23#ibcon#read 4, iclass 28, count 0 2006.229.18:24:31.23#ibcon#about to read 5, iclass 28, count 0 2006.229.18:24:31.24#ibcon#read 5, iclass 28, count 0 2006.229.18:24:31.24#ibcon#about to read 6, iclass 28, count 0 2006.229.18:24:31.24#ibcon#read 6, iclass 28, count 0 2006.229.18:24:31.24#ibcon#end of sib2, iclass 28, count 0 2006.229.18:24:31.24#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:24:31.24#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:24:31.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:24:31.24#ibcon#*before write, iclass 28, count 0 2006.229.18:24:31.24#ibcon#enter sib2, iclass 28, count 0 2006.229.18:24:31.24#ibcon#flushed, iclass 28, count 0 2006.229.18:24:31.24#ibcon#about to write, iclass 28, count 0 2006.229.18:24:31.24#ibcon#wrote, iclass 28, count 0 2006.229.18:24:31.24#ibcon#about to read 3, iclass 28, count 0 2006.229.18:24:31.27#ibcon#read 3, iclass 28, count 0 2006.229.18:24:31.28#ibcon#about to read 4, iclass 28, count 0 2006.229.18:24:31.28#ibcon#read 4, iclass 28, count 0 2006.229.18:24:31.28#ibcon#about to read 5, iclass 28, count 0 2006.229.18:24:31.28#ibcon#read 5, iclass 28, count 0 2006.229.18:24:31.28#ibcon#about to read 6, iclass 28, count 0 2006.229.18:24:31.28#ibcon#read 6, iclass 28, count 0 2006.229.18:24:31.28#ibcon#end of sib2, iclass 28, count 0 2006.229.18:24:31.28#ibcon#*after write, iclass 28, count 0 2006.229.18:24:31.28#ibcon#*before return 0, iclass 28, count 0 2006.229.18:24:31.28#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:31.28#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:31.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:24:31.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:24:31.28$vck44/va=7,5 2006.229.18:24:31.28#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.18:24:31.28#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.18:24:31.28#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:31.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:31.33#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:31.33#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:31.34#ibcon#enter wrdev, iclass 30, count 2 2006.229.18:24:31.34#ibcon#first serial, iclass 30, count 2 2006.229.18:24:31.34#ibcon#enter sib2, iclass 30, count 2 2006.229.18:24:31.34#ibcon#flushed, iclass 30, count 2 2006.229.18:24:31.34#ibcon#about to write, iclass 30, count 2 2006.229.18:24:31.34#ibcon#wrote, iclass 30, count 2 2006.229.18:24:31.34#ibcon#about to read 3, iclass 30, count 2 2006.229.18:24:31.35#ibcon#read 3, iclass 30, count 2 2006.229.18:24:31.35#ibcon#about to read 4, iclass 30, count 2 2006.229.18:24:31.35#ibcon#read 4, iclass 30, count 2 2006.229.18:24:31.36#ibcon#about to read 5, iclass 30, count 2 2006.229.18:24:31.36#ibcon#read 5, iclass 30, count 2 2006.229.18:24:31.36#ibcon#about to read 6, iclass 30, count 2 2006.229.18:24:31.36#ibcon#read 6, iclass 30, count 2 2006.229.18:24:31.36#ibcon#end of sib2, iclass 30, count 2 2006.229.18:24:31.36#ibcon#*mode == 0, iclass 30, count 2 2006.229.18:24:31.36#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.18:24:31.36#ibcon#[25=AT07-05\r\n] 2006.229.18:24:31.36#ibcon#*before write, iclass 30, count 2 2006.229.18:24:31.36#ibcon#enter sib2, iclass 30, count 2 2006.229.18:24:31.36#ibcon#flushed, iclass 30, count 2 2006.229.18:24:31.36#ibcon#about to write, iclass 30, count 2 2006.229.18:24:31.36#ibcon#wrote, iclass 30, count 2 2006.229.18:24:31.36#ibcon#about to read 3, iclass 30, count 2 2006.229.18:24:31.39#ibcon#read 3, iclass 30, count 2 2006.229.18:24:31.39#ibcon#about to read 4, iclass 30, count 2 2006.229.18:24:31.39#ibcon#read 4, iclass 30, count 2 2006.229.18:24:31.39#ibcon#about to read 5, iclass 30, count 2 2006.229.18:24:31.39#ibcon#read 5, iclass 30, count 2 2006.229.18:24:31.39#ibcon#about to read 6, iclass 30, count 2 2006.229.18:24:31.39#ibcon#read 6, iclass 30, count 2 2006.229.18:24:31.39#ibcon#end of sib2, iclass 30, count 2 2006.229.18:24:31.39#ibcon#*after write, iclass 30, count 2 2006.229.18:24:31.39#ibcon#*before return 0, iclass 30, count 2 2006.229.18:24:31.39#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:31.39#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:31.39#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.18:24:31.39#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:31.39#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:31.50#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:31.50#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:31.51#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:24:31.51#ibcon#first serial, iclass 30, count 0 2006.229.18:24:31.51#ibcon#enter sib2, iclass 30, count 0 2006.229.18:24:31.51#ibcon#flushed, iclass 30, count 0 2006.229.18:24:31.51#ibcon#about to write, iclass 30, count 0 2006.229.18:24:31.51#ibcon#wrote, iclass 30, count 0 2006.229.18:24:31.51#ibcon#about to read 3, iclass 30, count 0 2006.229.18:24:31.52#ibcon#read 3, iclass 30, count 0 2006.229.18:24:31.53#ibcon#about to read 4, iclass 30, count 0 2006.229.18:24:31.53#ibcon#read 4, iclass 30, count 0 2006.229.18:24:31.53#ibcon#about to read 5, iclass 30, count 0 2006.229.18:24:31.53#ibcon#read 5, iclass 30, count 0 2006.229.18:24:31.53#ibcon#about to read 6, iclass 30, count 0 2006.229.18:24:31.53#ibcon#read 6, iclass 30, count 0 2006.229.18:24:31.53#ibcon#end of sib2, iclass 30, count 0 2006.229.18:24:31.53#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:24:31.53#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:24:31.53#ibcon#[25=USB\r\n] 2006.229.18:24:31.53#ibcon#*before write, iclass 30, count 0 2006.229.18:24:31.53#ibcon#enter sib2, iclass 30, count 0 2006.229.18:24:31.53#ibcon#flushed, iclass 30, count 0 2006.229.18:24:31.53#ibcon#about to write, iclass 30, count 0 2006.229.18:24:31.53#ibcon#wrote, iclass 30, count 0 2006.229.18:24:31.53#ibcon#about to read 3, iclass 30, count 0 2006.229.18:24:31.55#ibcon#read 3, iclass 30, count 0 2006.229.18:24:31.56#ibcon#about to read 4, iclass 30, count 0 2006.229.18:24:31.56#ibcon#read 4, iclass 30, count 0 2006.229.18:24:31.56#ibcon#about to read 5, iclass 30, count 0 2006.229.18:24:31.56#ibcon#read 5, iclass 30, count 0 2006.229.18:24:31.56#ibcon#about to read 6, iclass 30, count 0 2006.229.18:24:31.56#ibcon#read 6, iclass 30, count 0 2006.229.18:24:31.56#ibcon#end of sib2, iclass 30, count 0 2006.229.18:24:31.56#ibcon#*after write, iclass 30, count 0 2006.229.18:24:31.56#ibcon#*before return 0, iclass 30, count 0 2006.229.18:24:31.56#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:31.56#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:31.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:24:31.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:24:31.56$vck44/valo=8,884.99 2006.229.18:24:31.56#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.18:24:31.56#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.18:24:31.56#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:31.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:31.56#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:31.56#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:31.56#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:24:31.56#ibcon#first serial, iclass 32, count 0 2006.229.18:24:31.56#ibcon#enter sib2, iclass 32, count 0 2006.229.18:24:31.56#ibcon#flushed, iclass 32, count 0 2006.229.18:24:31.56#ibcon#about to write, iclass 32, count 0 2006.229.18:24:31.56#ibcon#wrote, iclass 32, count 0 2006.229.18:24:31.56#ibcon#about to read 3, iclass 32, count 0 2006.229.18:24:31.57#ibcon#read 3, iclass 32, count 0 2006.229.18:24:31.58#ibcon#about to read 4, iclass 32, count 0 2006.229.18:24:31.58#ibcon#read 4, iclass 32, count 0 2006.229.18:24:31.58#ibcon#about to read 5, iclass 32, count 0 2006.229.18:24:31.58#ibcon#read 5, iclass 32, count 0 2006.229.18:24:31.58#ibcon#about to read 6, iclass 32, count 0 2006.229.18:24:31.58#ibcon#read 6, iclass 32, count 0 2006.229.18:24:31.58#ibcon#end of sib2, iclass 32, count 0 2006.229.18:24:31.58#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:24:31.58#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:24:31.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:24:31.58#ibcon#*before write, iclass 32, count 0 2006.229.18:24:31.58#ibcon#enter sib2, iclass 32, count 0 2006.229.18:24:31.58#ibcon#flushed, iclass 32, count 0 2006.229.18:24:31.58#ibcon#about to write, iclass 32, count 0 2006.229.18:24:31.58#ibcon#wrote, iclass 32, count 0 2006.229.18:24:31.58#ibcon#about to read 3, iclass 32, count 0 2006.229.18:24:31.61#ibcon#read 3, iclass 32, count 0 2006.229.18:24:31.62#ibcon#about to read 4, iclass 32, count 0 2006.229.18:24:31.62#ibcon#read 4, iclass 32, count 0 2006.229.18:24:31.62#ibcon#about to read 5, iclass 32, count 0 2006.229.18:24:31.62#ibcon#read 5, iclass 32, count 0 2006.229.18:24:31.62#ibcon#about to read 6, iclass 32, count 0 2006.229.18:24:31.62#ibcon#read 6, iclass 32, count 0 2006.229.18:24:31.62#ibcon#end of sib2, iclass 32, count 0 2006.229.18:24:31.62#ibcon#*after write, iclass 32, count 0 2006.229.18:24:31.62#ibcon#*before return 0, iclass 32, count 0 2006.229.18:24:31.62#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:31.62#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:31.62#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:24:31.62#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:24:31.62$vck44/va=8,6 2006.229.18:24:31.62#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.18:24:31.62#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.18:24:31.62#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:31.62#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:24:31.67#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:24:31.67#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:24:31.68#ibcon#enter wrdev, iclass 34, count 2 2006.229.18:24:31.68#ibcon#first serial, iclass 34, count 2 2006.229.18:24:31.68#ibcon#enter sib2, iclass 34, count 2 2006.229.18:24:31.68#ibcon#flushed, iclass 34, count 2 2006.229.18:24:31.68#ibcon#about to write, iclass 34, count 2 2006.229.18:24:31.68#ibcon#wrote, iclass 34, count 2 2006.229.18:24:31.68#ibcon#about to read 3, iclass 34, count 2 2006.229.18:24:31.69#ibcon#read 3, iclass 34, count 2 2006.229.18:24:31.69#ibcon#about to read 4, iclass 34, count 2 2006.229.18:24:31.70#ibcon#read 4, iclass 34, count 2 2006.229.18:24:31.70#ibcon#about to read 5, iclass 34, count 2 2006.229.18:24:31.70#ibcon#read 5, iclass 34, count 2 2006.229.18:24:31.70#ibcon#about to read 6, iclass 34, count 2 2006.229.18:24:31.70#ibcon#read 6, iclass 34, count 2 2006.229.18:24:31.70#ibcon#end of sib2, iclass 34, count 2 2006.229.18:24:31.70#ibcon#*mode == 0, iclass 34, count 2 2006.229.18:24:31.70#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.18:24:31.70#ibcon#[25=AT08-06\r\n] 2006.229.18:24:31.70#ibcon#*before write, iclass 34, count 2 2006.229.18:24:31.70#ibcon#enter sib2, iclass 34, count 2 2006.229.18:24:31.70#ibcon#flushed, iclass 34, count 2 2006.229.18:24:31.70#ibcon#about to write, iclass 34, count 2 2006.229.18:24:31.70#ibcon#wrote, iclass 34, count 2 2006.229.18:24:31.70#ibcon#about to read 3, iclass 34, count 2 2006.229.18:24:31.72#ibcon#read 3, iclass 34, count 2 2006.229.18:24:31.72#ibcon#about to read 4, iclass 34, count 2 2006.229.18:24:31.73#ibcon#read 4, iclass 34, count 2 2006.229.18:24:31.73#ibcon#about to read 5, iclass 34, count 2 2006.229.18:24:31.73#ibcon#read 5, iclass 34, count 2 2006.229.18:24:31.73#ibcon#about to read 6, iclass 34, count 2 2006.229.18:24:31.73#ibcon#read 6, iclass 34, count 2 2006.229.18:24:31.73#ibcon#end of sib2, iclass 34, count 2 2006.229.18:24:31.73#ibcon#*after write, iclass 34, count 2 2006.229.18:24:31.73#ibcon#*before return 0, iclass 34, count 2 2006.229.18:24:31.73#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:24:31.73#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:24:31.73#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.18:24:31.73#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:31.73#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:24:31.84#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:24:31.84#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:24:31.85#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:24:31.85#ibcon#first serial, iclass 34, count 0 2006.229.18:24:31.85#ibcon#enter sib2, iclass 34, count 0 2006.229.18:24:31.85#ibcon#flushed, iclass 34, count 0 2006.229.18:24:31.85#ibcon#about to write, iclass 34, count 0 2006.229.18:24:31.85#ibcon#wrote, iclass 34, count 0 2006.229.18:24:31.85#ibcon#about to read 3, iclass 34, count 0 2006.229.18:24:31.86#ibcon#read 3, iclass 34, count 0 2006.229.18:24:31.86#ibcon#about to read 4, iclass 34, count 0 2006.229.18:24:31.86#ibcon#read 4, iclass 34, count 0 2006.229.18:24:31.87#ibcon#about to read 5, iclass 34, count 0 2006.229.18:24:31.87#ibcon#read 5, iclass 34, count 0 2006.229.18:24:31.87#ibcon#about to read 6, iclass 34, count 0 2006.229.18:24:31.87#ibcon#read 6, iclass 34, count 0 2006.229.18:24:31.87#ibcon#end of sib2, iclass 34, count 0 2006.229.18:24:31.87#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:24:31.87#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:24:31.87#ibcon#[25=USB\r\n] 2006.229.18:24:31.87#ibcon#*before write, iclass 34, count 0 2006.229.18:24:31.87#ibcon#enter sib2, iclass 34, count 0 2006.229.18:24:31.87#ibcon#flushed, iclass 34, count 0 2006.229.18:24:31.87#ibcon#about to write, iclass 34, count 0 2006.229.18:24:31.87#ibcon#wrote, iclass 34, count 0 2006.229.18:24:31.87#ibcon#about to read 3, iclass 34, count 0 2006.229.18:24:31.89#ibcon#read 3, iclass 34, count 0 2006.229.18:24:31.89#ibcon#about to read 4, iclass 34, count 0 2006.229.18:24:31.90#ibcon#read 4, iclass 34, count 0 2006.229.18:24:31.90#ibcon#about to read 5, iclass 34, count 0 2006.229.18:24:31.90#ibcon#read 5, iclass 34, count 0 2006.229.18:24:31.90#ibcon#about to read 6, iclass 34, count 0 2006.229.18:24:31.90#ibcon#read 6, iclass 34, count 0 2006.229.18:24:31.90#ibcon#end of sib2, iclass 34, count 0 2006.229.18:24:31.90#ibcon#*after write, iclass 34, count 0 2006.229.18:24:31.90#ibcon#*before return 0, iclass 34, count 0 2006.229.18:24:31.90#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:24:31.90#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:24:31.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:24:31.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:24:31.90$vck44/vblo=1,629.99 2006.229.18:24:31.90#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.18:24:31.90#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.18:24:31.90#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:31.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:24:31.90#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:24:31.90#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:24:31.90#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:24:31.90#ibcon#first serial, iclass 36, count 0 2006.229.18:24:31.90#ibcon#enter sib2, iclass 36, count 0 2006.229.18:24:31.90#ibcon#flushed, iclass 36, count 0 2006.229.18:24:31.90#ibcon#about to write, iclass 36, count 0 2006.229.18:24:31.90#ibcon#wrote, iclass 36, count 0 2006.229.18:24:31.90#ibcon#about to read 3, iclass 36, count 0 2006.229.18:24:31.91#ibcon#read 3, iclass 36, count 0 2006.229.18:24:31.91#ibcon#about to read 4, iclass 36, count 0 2006.229.18:24:31.91#ibcon#read 4, iclass 36, count 0 2006.229.18:24:31.91#ibcon#about to read 5, iclass 36, count 0 2006.229.18:24:31.92#ibcon#read 5, iclass 36, count 0 2006.229.18:24:31.92#ibcon#about to read 6, iclass 36, count 0 2006.229.18:24:31.92#ibcon#read 6, iclass 36, count 0 2006.229.18:24:31.92#ibcon#end of sib2, iclass 36, count 0 2006.229.18:24:31.92#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:24:31.92#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:24:31.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:24:31.92#ibcon#*before write, iclass 36, count 0 2006.229.18:24:31.92#ibcon#enter sib2, iclass 36, count 0 2006.229.18:24:31.92#ibcon#flushed, iclass 36, count 0 2006.229.18:24:31.92#ibcon#about to write, iclass 36, count 0 2006.229.18:24:31.92#ibcon#wrote, iclass 36, count 0 2006.229.18:24:31.92#ibcon#about to read 3, iclass 36, count 0 2006.229.18:24:31.95#ibcon#read 3, iclass 36, count 0 2006.229.18:24:31.95#ibcon#about to read 4, iclass 36, count 0 2006.229.18:24:31.96#ibcon#read 4, iclass 36, count 0 2006.229.18:24:31.96#ibcon#about to read 5, iclass 36, count 0 2006.229.18:24:31.96#ibcon#read 5, iclass 36, count 0 2006.229.18:24:31.96#ibcon#about to read 6, iclass 36, count 0 2006.229.18:24:31.96#ibcon#read 6, iclass 36, count 0 2006.229.18:24:31.96#ibcon#end of sib2, iclass 36, count 0 2006.229.18:24:31.96#ibcon#*after write, iclass 36, count 0 2006.229.18:24:31.96#ibcon#*before return 0, iclass 36, count 0 2006.229.18:24:31.96#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:24:31.96#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:24:31.96#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:24:31.96#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:24:31.96$vck44/vb=1,4 2006.229.18:24:31.96#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.18:24:31.96#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.18:24:31.96#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:31.96#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:24:31.96#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:24:31.96#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:24:31.96#ibcon#enter wrdev, iclass 38, count 2 2006.229.18:24:31.96#ibcon#first serial, iclass 38, count 2 2006.229.18:24:31.96#ibcon#enter sib2, iclass 38, count 2 2006.229.18:24:31.96#ibcon#flushed, iclass 38, count 2 2006.229.18:24:31.96#ibcon#about to write, iclass 38, count 2 2006.229.18:24:31.96#ibcon#wrote, iclass 38, count 2 2006.229.18:24:31.96#ibcon#about to read 3, iclass 38, count 2 2006.229.18:24:31.97#ibcon#read 3, iclass 38, count 2 2006.229.18:24:31.97#ibcon#about to read 4, iclass 38, count 2 2006.229.18:24:31.98#ibcon#read 4, iclass 38, count 2 2006.229.18:24:31.98#ibcon#about to read 5, iclass 38, count 2 2006.229.18:24:31.98#ibcon#read 5, iclass 38, count 2 2006.229.18:24:31.98#ibcon#about to read 6, iclass 38, count 2 2006.229.18:24:31.98#ibcon#read 6, iclass 38, count 2 2006.229.18:24:31.98#ibcon#end of sib2, iclass 38, count 2 2006.229.18:24:31.98#ibcon#*mode == 0, iclass 38, count 2 2006.229.18:24:31.98#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.18:24:31.98#ibcon#[27=AT01-04\r\n] 2006.229.18:24:31.98#ibcon#*before write, iclass 38, count 2 2006.229.18:24:31.98#ibcon#enter sib2, iclass 38, count 2 2006.229.18:24:31.98#ibcon#flushed, iclass 38, count 2 2006.229.18:24:31.98#ibcon#about to write, iclass 38, count 2 2006.229.18:24:31.98#ibcon#wrote, iclass 38, count 2 2006.229.18:24:31.98#ibcon#about to read 3, iclass 38, count 2 2006.229.18:24:32.00#ibcon#read 3, iclass 38, count 2 2006.229.18:24:32.00#ibcon#about to read 4, iclass 38, count 2 2006.229.18:24:32.00#ibcon#read 4, iclass 38, count 2 2006.229.18:24:32.00#ibcon#about to read 5, iclass 38, count 2 2006.229.18:24:32.01#ibcon#read 5, iclass 38, count 2 2006.229.18:24:32.01#ibcon#about to read 6, iclass 38, count 2 2006.229.18:24:32.01#ibcon#read 6, iclass 38, count 2 2006.229.18:24:32.01#ibcon#end of sib2, iclass 38, count 2 2006.229.18:24:32.01#ibcon#*after write, iclass 38, count 2 2006.229.18:24:32.01#ibcon#*before return 0, iclass 38, count 2 2006.229.18:24:32.01#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:24:32.01#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:24:32.01#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.18:24:32.01#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:32.01#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:24:32.12#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:24:32.12#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:24:32.13#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:24:32.13#ibcon#first serial, iclass 38, count 0 2006.229.18:24:32.13#ibcon#enter sib2, iclass 38, count 0 2006.229.18:24:32.13#ibcon#flushed, iclass 38, count 0 2006.229.18:24:32.13#ibcon#about to write, iclass 38, count 0 2006.229.18:24:32.13#ibcon#wrote, iclass 38, count 0 2006.229.18:24:32.13#ibcon#about to read 3, iclass 38, count 0 2006.229.18:24:32.14#ibcon#read 3, iclass 38, count 0 2006.229.18:24:32.14#ibcon#about to read 4, iclass 38, count 0 2006.229.18:24:32.15#ibcon#read 4, iclass 38, count 0 2006.229.18:24:32.15#ibcon#about to read 5, iclass 38, count 0 2006.229.18:24:32.15#ibcon#read 5, iclass 38, count 0 2006.229.18:24:32.15#ibcon#about to read 6, iclass 38, count 0 2006.229.18:24:32.15#ibcon#read 6, iclass 38, count 0 2006.229.18:24:32.15#ibcon#end of sib2, iclass 38, count 0 2006.229.18:24:32.15#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:24:32.15#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:24:32.15#ibcon#[27=USB\r\n] 2006.229.18:24:32.15#ibcon#*before write, iclass 38, count 0 2006.229.18:24:32.15#ibcon#enter sib2, iclass 38, count 0 2006.229.18:24:32.15#ibcon#flushed, iclass 38, count 0 2006.229.18:24:32.15#ibcon#about to write, iclass 38, count 0 2006.229.18:24:32.15#ibcon#wrote, iclass 38, count 0 2006.229.18:24:32.15#ibcon#about to read 3, iclass 38, count 0 2006.229.18:24:32.17#ibcon#read 3, iclass 38, count 0 2006.229.18:24:32.17#ibcon#about to read 4, iclass 38, count 0 2006.229.18:24:32.18#ibcon#read 4, iclass 38, count 0 2006.229.18:24:32.18#ibcon#about to read 5, iclass 38, count 0 2006.229.18:24:32.18#ibcon#read 5, iclass 38, count 0 2006.229.18:24:32.18#ibcon#about to read 6, iclass 38, count 0 2006.229.18:24:32.18#ibcon#read 6, iclass 38, count 0 2006.229.18:24:32.18#ibcon#end of sib2, iclass 38, count 0 2006.229.18:24:32.18#ibcon#*after write, iclass 38, count 0 2006.229.18:24:32.18#ibcon#*before return 0, iclass 38, count 0 2006.229.18:24:32.18#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:24:32.18#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:24:32.18#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:24:32.18#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:24:32.18$vck44/vblo=2,634.99 2006.229.18:24:32.18#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.18:24:32.18#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.18:24:32.18#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:32.18#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:32.18#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:32.18#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:32.18#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:24:32.18#ibcon#first serial, iclass 40, count 0 2006.229.18:24:32.18#ibcon#enter sib2, iclass 40, count 0 2006.229.18:24:32.18#ibcon#flushed, iclass 40, count 0 2006.229.18:24:32.18#ibcon#about to write, iclass 40, count 0 2006.229.18:24:32.18#ibcon#wrote, iclass 40, count 0 2006.229.18:24:32.18#ibcon#about to read 3, iclass 40, count 0 2006.229.18:24:32.19#ibcon#read 3, iclass 40, count 0 2006.229.18:24:32.19#ibcon#about to read 4, iclass 40, count 0 2006.229.18:24:32.19#ibcon#read 4, iclass 40, count 0 2006.229.18:24:32.19#ibcon#about to read 5, iclass 40, count 0 2006.229.18:24:32.20#ibcon#read 5, iclass 40, count 0 2006.229.18:24:32.20#ibcon#about to read 6, iclass 40, count 0 2006.229.18:24:32.20#ibcon#read 6, iclass 40, count 0 2006.229.18:24:32.20#ibcon#end of sib2, iclass 40, count 0 2006.229.18:24:32.20#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:24:32.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:24:32.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:24:32.20#ibcon#*before write, iclass 40, count 0 2006.229.18:24:32.20#ibcon#enter sib2, iclass 40, count 0 2006.229.18:24:32.20#ibcon#flushed, iclass 40, count 0 2006.229.18:24:32.20#ibcon#about to write, iclass 40, count 0 2006.229.18:24:32.20#ibcon#wrote, iclass 40, count 0 2006.229.18:24:32.20#ibcon#about to read 3, iclass 40, count 0 2006.229.18:24:32.23#ibcon#read 3, iclass 40, count 0 2006.229.18:24:32.23#ibcon#about to read 4, iclass 40, count 0 2006.229.18:24:32.24#ibcon#read 4, iclass 40, count 0 2006.229.18:24:32.24#ibcon#about to read 5, iclass 40, count 0 2006.229.18:24:32.24#ibcon#read 5, iclass 40, count 0 2006.229.18:24:32.24#ibcon#about to read 6, iclass 40, count 0 2006.229.18:24:32.24#ibcon#read 6, iclass 40, count 0 2006.229.18:24:32.24#ibcon#end of sib2, iclass 40, count 0 2006.229.18:24:32.24#ibcon#*after write, iclass 40, count 0 2006.229.18:24:32.24#ibcon#*before return 0, iclass 40, count 0 2006.229.18:24:32.24#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:32.24#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:24:32.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:24:32.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:24:32.24$vck44/vb=2,4 2006.229.18:24:32.24#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.18:24:32.24#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.18:24:32.24#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:32.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:32.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:32.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:32.29#ibcon#enter wrdev, iclass 4, count 2 2006.229.18:24:32.30#ibcon#first serial, iclass 4, count 2 2006.229.18:24:32.30#ibcon#enter sib2, iclass 4, count 2 2006.229.18:24:32.30#ibcon#flushed, iclass 4, count 2 2006.229.18:24:32.30#ibcon#about to write, iclass 4, count 2 2006.229.18:24:32.30#ibcon#wrote, iclass 4, count 2 2006.229.18:24:32.30#ibcon#about to read 3, iclass 4, count 2 2006.229.18:24:32.31#ibcon#read 3, iclass 4, count 2 2006.229.18:24:32.31#ibcon#about to read 4, iclass 4, count 2 2006.229.18:24:32.31#ibcon#read 4, iclass 4, count 2 2006.229.18:24:32.31#ibcon#about to read 5, iclass 4, count 2 2006.229.18:24:32.32#ibcon#read 5, iclass 4, count 2 2006.229.18:24:32.32#ibcon#about to read 6, iclass 4, count 2 2006.229.18:24:32.32#ibcon#read 6, iclass 4, count 2 2006.229.18:24:32.32#ibcon#end of sib2, iclass 4, count 2 2006.229.18:24:32.32#ibcon#*mode == 0, iclass 4, count 2 2006.229.18:24:32.32#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.18:24:32.32#ibcon#[27=AT02-04\r\n] 2006.229.18:24:32.32#ibcon#*before write, iclass 4, count 2 2006.229.18:24:32.32#ibcon#enter sib2, iclass 4, count 2 2006.229.18:24:32.32#ibcon#flushed, iclass 4, count 2 2006.229.18:24:32.32#ibcon#about to write, iclass 4, count 2 2006.229.18:24:32.32#ibcon#wrote, iclass 4, count 2 2006.229.18:24:32.32#ibcon#about to read 3, iclass 4, count 2 2006.229.18:24:32.34#ibcon#read 3, iclass 4, count 2 2006.229.18:24:32.34#ibcon#about to read 4, iclass 4, count 2 2006.229.18:24:32.35#ibcon#read 4, iclass 4, count 2 2006.229.18:24:32.35#ibcon#about to read 5, iclass 4, count 2 2006.229.18:24:32.35#ibcon#read 5, iclass 4, count 2 2006.229.18:24:32.35#ibcon#about to read 6, iclass 4, count 2 2006.229.18:24:32.35#ibcon#read 6, iclass 4, count 2 2006.229.18:24:32.35#ibcon#end of sib2, iclass 4, count 2 2006.229.18:24:32.35#ibcon#*after write, iclass 4, count 2 2006.229.18:24:32.35#ibcon#*before return 0, iclass 4, count 2 2006.229.18:24:32.35#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:32.35#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:24:32.35#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.18:24:32.35#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:32.35#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:32.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:32.47#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:32.47#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:24:32.47#ibcon#first serial, iclass 4, count 0 2006.229.18:24:32.47#ibcon#enter sib2, iclass 4, count 0 2006.229.18:24:32.47#ibcon#flushed, iclass 4, count 0 2006.229.18:24:32.47#ibcon#about to write, iclass 4, count 0 2006.229.18:24:32.47#ibcon#wrote, iclass 4, count 0 2006.229.18:24:32.47#ibcon#about to read 3, iclass 4, count 0 2006.229.18:24:32.48#ibcon#read 3, iclass 4, count 0 2006.229.18:24:32.49#ibcon#about to read 4, iclass 4, count 0 2006.229.18:24:32.49#ibcon#read 4, iclass 4, count 0 2006.229.18:24:32.49#ibcon#about to read 5, iclass 4, count 0 2006.229.18:24:32.49#ibcon#read 5, iclass 4, count 0 2006.229.18:24:32.49#ibcon#about to read 6, iclass 4, count 0 2006.229.18:24:32.49#ibcon#read 6, iclass 4, count 0 2006.229.18:24:32.49#ibcon#end of sib2, iclass 4, count 0 2006.229.18:24:32.49#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:24:32.49#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:24:32.49#ibcon#[27=USB\r\n] 2006.229.18:24:32.49#ibcon#*before write, iclass 4, count 0 2006.229.18:24:32.49#ibcon#enter sib2, iclass 4, count 0 2006.229.18:24:32.49#ibcon#flushed, iclass 4, count 0 2006.229.18:24:32.49#ibcon#about to write, iclass 4, count 0 2006.229.18:24:32.49#ibcon#wrote, iclass 4, count 0 2006.229.18:24:32.49#ibcon#about to read 3, iclass 4, count 0 2006.229.18:24:32.51#ibcon#read 3, iclass 4, count 0 2006.229.18:24:32.52#ibcon#about to read 4, iclass 4, count 0 2006.229.18:24:32.52#ibcon#read 4, iclass 4, count 0 2006.229.18:24:32.52#ibcon#about to read 5, iclass 4, count 0 2006.229.18:24:32.52#ibcon#read 5, iclass 4, count 0 2006.229.18:24:32.52#ibcon#about to read 6, iclass 4, count 0 2006.229.18:24:32.52#ibcon#read 6, iclass 4, count 0 2006.229.18:24:32.52#ibcon#end of sib2, iclass 4, count 0 2006.229.18:24:32.52#ibcon#*after write, iclass 4, count 0 2006.229.18:24:32.52#ibcon#*before return 0, iclass 4, count 0 2006.229.18:24:32.52#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:32.52#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:24:32.52#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:24:32.52#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:24:32.52$vck44/vblo=3,649.99 2006.229.18:24:32.52#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.18:24:32.52#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.18:24:32.52#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:32.52#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:32.52#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:32.52#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:32.52#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:24:32.52#ibcon#first serial, iclass 6, count 0 2006.229.18:24:32.52#ibcon#enter sib2, iclass 6, count 0 2006.229.18:24:32.52#ibcon#flushed, iclass 6, count 0 2006.229.18:24:32.52#ibcon#about to write, iclass 6, count 0 2006.229.18:24:32.52#ibcon#wrote, iclass 6, count 0 2006.229.18:24:32.52#ibcon#about to read 3, iclass 6, count 0 2006.229.18:24:32.53#ibcon#read 3, iclass 6, count 0 2006.229.18:24:32.54#ibcon#about to read 4, iclass 6, count 0 2006.229.18:24:32.54#ibcon#read 4, iclass 6, count 0 2006.229.18:24:32.54#ibcon#about to read 5, iclass 6, count 0 2006.229.18:24:32.54#ibcon#read 5, iclass 6, count 0 2006.229.18:24:32.54#ibcon#about to read 6, iclass 6, count 0 2006.229.18:24:32.54#ibcon#read 6, iclass 6, count 0 2006.229.18:24:32.54#ibcon#end of sib2, iclass 6, count 0 2006.229.18:24:32.54#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:24:32.54#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:24:32.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:24:32.54#ibcon#*before write, iclass 6, count 0 2006.229.18:24:32.54#ibcon#enter sib2, iclass 6, count 0 2006.229.18:24:32.54#ibcon#flushed, iclass 6, count 0 2006.229.18:24:32.54#ibcon#about to write, iclass 6, count 0 2006.229.18:24:32.54#ibcon#wrote, iclass 6, count 0 2006.229.18:24:32.54#ibcon#about to read 3, iclass 6, count 0 2006.229.18:24:32.57#ibcon#read 3, iclass 6, count 0 2006.229.18:24:32.57#ibcon#about to read 4, iclass 6, count 0 2006.229.18:24:32.58#ibcon#read 4, iclass 6, count 0 2006.229.18:24:32.58#ibcon#about to read 5, iclass 6, count 0 2006.229.18:24:32.58#ibcon#read 5, iclass 6, count 0 2006.229.18:24:32.58#ibcon#about to read 6, iclass 6, count 0 2006.229.18:24:32.58#ibcon#read 6, iclass 6, count 0 2006.229.18:24:32.58#ibcon#end of sib2, iclass 6, count 0 2006.229.18:24:32.58#ibcon#*after write, iclass 6, count 0 2006.229.18:24:32.58#ibcon#*before return 0, iclass 6, count 0 2006.229.18:24:32.58#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:32.58#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:24:32.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:24:32.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:24:32.58$vck44/vb=3,4 2006.229.18:24:32.58#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.18:24:32.58#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.18:24:32.58#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:32.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:32.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:32.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:32.63#ibcon#enter wrdev, iclass 10, count 2 2006.229.18:24:32.64#ibcon#first serial, iclass 10, count 2 2006.229.18:24:32.64#ibcon#enter sib2, iclass 10, count 2 2006.229.18:24:32.64#ibcon#flushed, iclass 10, count 2 2006.229.18:24:32.64#ibcon#about to write, iclass 10, count 2 2006.229.18:24:32.64#ibcon#wrote, iclass 10, count 2 2006.229.18:24:32.64#ibcon#about to read 3, iclass 10, count 2 2006.229.18:24:32.65#ibcon#read 3, iclass 10, count 2 2006.229.18:24:32.66#ibcon#about to read 4, iclass 10, count 2 2006.229.18:24:32.66#ibcon#read 4, iclass 10, count 2 2006.229.18:24:32.66#ibcon#about to read 5, iclass 10, count 2 2006.229.18:24:32.66#ibcon#read 5, iclass 10, count 2 2006.229.18:24:32.66#ibcon#about to read 6, iclass 10, count 2 2006.229.18:24:32.66#ibcon#read 6, iclass 10, count 2 2006.229.18:24:32.66#ibcon#end of sib2, iclass 10, count 2 2006.229.18:24:32.66#ibcon#*mode == 0, iclass 10, count 2 2006.229.18:24:32.66#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.18:24:32.66#ibcon#[27=AT03-04\r\n] 2006.229.18:24:32.66#ibcon#*before write, iclass 10, count 2 2006.229.18:24:32.66#ibcon#enter sib2, iclass 10, count 2 2006.229.18:24:32.66#ibcon#flushed, iclass 10, count 2 2006.229.18:24:32.66#ibcon#about to write, iclass 10, count 2 2006.229.18:24:32.66#ibcon#wrote, iclass 10, count 2 2006.229.18:24:32.66#ibcon#about to read 3, iclass 10, count 2 2006.229.18:24:32.68#ibcon#read 3, iclass 10, count 2 2006.229.18:24:32.68#ibcon#about to read 4, iclass 10, count 2 2006.229.18:24:32.69#ibcon#read 4, iclass 10, count 2 2006.229.18:24:32.69#ibcon#about to read 5, iclass 10, count 2 2006.229.18:24:32.69#ibcon#read 5, iclass 10, count 2 2006.229.18:24:32.69#ibcon#about to read 6, iclass 10, count 2 2006.229.18:24:32.69#ibcon#read 6, iclass 10, count 2 2006.229.18:24:32.69#ibcon#end of sib2, iclass 10, count 2 2006.229.18:24:32.69#ibcon#*after write, iclass 10, count 2 2006.229.18:24:32.69#ibcon#*before return 0, iclass 10, count 2 2006.229.18:24:32.69#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:32.69#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:24:32.69#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.18:24:32.69#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:32.69#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:32.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:32.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:32.81#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:24:32.81#ibcon#first serial, iclass 10, count 0 2006.229.18:24:32.81#ibcon#enter sib2, iclass 10, count 0 2006.229.18:24:32.81#ibcon#flushed, iclass 10, count 0 2006.229.18:24:32.81#ibcon#about to write, iclass 10, count 0 2006.229.18:24:32.81#ibcon#wrote, iclass 10, count 0 2006.229.18:24:32.81#ibcon#about to read 3, iclass 10, count 0 2006.229.18:24:32.82#ibcon#read 3, iclass 10, count 0 2006.229.18:24:32.82#ibcon#about to read 4, iclass 10, count 0 2006.229.18:24:32.83#ibcon#read 4, iclass 10, count 0 2006.229.18:24:32.83#ibcon#about to read 5, iclass 10, count 0 2006.229.18:24:32.83#ibcon#read 5, iclass 10, count 0 2006.229.18:24:32.83#ibcon#about to read 6, iclass 10, count 0 2006.229.18:24:32.83#ibcon#read 6, iclass 10, count 0 2006.229.18:24:32.83#ibcon#end of sib2, iclass 10, count 0 2006.229.18:24:32.83#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:24:32.83#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:24:32.83#ibcon#[27=USB\r\n] 2006.229.18:24:32.83#ibcon#*before write, iclass 10, count 0 2006.229.18:24:32.83#ibcon#enter sib2, iclass 10, count 0 2006.229.18:24:32.83#ibcon#flushed, iclass 10, count 0 2006.229.18:24:32.83#ibcon#about to write, iclass 10, count 0 2006.229.18:24:32.83#ibcon#wrote, iclass 10, count 0 2006.229.18:24:32.83#ibcon#about to read 3, iclass 10, count 0 2006.229.18:24:32.85#ibcon#read 3, iclass 10, count 0 2006.229.18:24:32.85#ibcon#about to read 4, iclass 10, count 0 2006.229.18:24:32.85#ibcon#read 4, iclass 10, count 0 2006.229.18:24:32.85#ibcon#about to read 5, iclass 10, count 0 2006.229.18:24:32.86#ibcon#read 5, iclass 10, count 0 2006.229.18:24:32.86#ibcon#about to read 6, iclass 10, count 0 2006.229.18:24:32.86#ibcon#read 6, iclass 10, count 0 2006.229.18:24:32.86#ibcon#end of sib2, iclass 10, count 0 2006.229.18:24:32.86#ibcon#*after write, iclass 10, count 0 2006.229.18:24:32.86#ibcon#*before return 0, iclass 10, count 0 2006.229.18:24:32.86#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:32.86#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:24:32.86#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:24:32.86#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:24:32.86$vck44/vblo=4,679.99 2006.229.18:24:32.86#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:24:32.86#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:24:32.86#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:32.86#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:32.86#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:32.86#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:32.86#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:24:32.86#ibcon#first serial, iclass 12, count 0 2006.229.18:24:32.86#ibcon#enter sib2, iclass 12, count 0 2006.229.18:24:32.86#ibcon#flushed, iclass 12, count 0 2006.229.18:24:32.86#ibcon#about to write, iclass 12, count 0 2006.229.18:24:32.86#ibcon#wrote, iclass 12, count 0 2006.229.18:24:32.86#ibcon#about to read 3, iclass 12, count 0 2006.229.18:24:32.87#ibcon#read 3, iclass 12, count 0 2006.229.18:24:32.87#ibcon#about to read 4, iclass 12, count 0 2006.229.18:24:32.87#ibcon#read 4, iclass 12, count 0 2006.229.18:24:32.88#ibcon#about to read 5, iclass 12, count 0 2006.229.18:24:32.88#ibcon#read 5, iclass 12, count 0 2006.229.18:24:32.88#ibcon#about to read 6, iclass 12, count 0 2006.229.18:24:32.88#ibcon#read 6, iclass 12, count 0 2006.229.18:24:32.88#ibcon#end of sib2, iclass 12, count 0 2006.229.18:24:32.88#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:24:32.88#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:24:32.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:24:32.88#ibcon#*before write, iclass 12, count 0 2006.229.18:24:32.88#ibcon#enter sib2, iclass 12, count 0 2006.229.18:24:32.88#ibcon#flushed, iclass 12, count 0 2006.229.18:24:32.88#ibcon#about to write, iclass 12, count 0 2006.229.18:24:32.88#ibcon#wrote, iclass 12, count 0 2006.229.18:24:32.88#ibcon#about to read 3, iclass 12, count 0 2006.229.18:24:32.91#ibcon#read 3, iclass 12, count 0 2006.229.18:24:32.91#ibcon#about to read 4, iclass 12, count 0 2006.229.18:24:32.92#ibcon#read 4, iclass 12, count 0 2006.229.18:24:32.92#ibcon#about to read 5, iclass 12, count 0 2006.229.18:24:32.92#ibcon#read 5, iclass 12, count 0 2006.229.18:24:32.92#ibcon#about to read 6, iclass 12, count 0 2006.229.18:24:32.92#ibcon#read 6, iclass 12, count 0 2006.229.18:24:32.92#ibcon#end of sib2, iclass 12, count 0 2006.229.18:24:32.92#ibcon#*after write, iclass 12, count 0 2006.229.18:24:32.92#ibcon#*before return 0, iclass 12, count 0 2006.229.18:24:32.92#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:32.92#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:24:32.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:24:32.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:24:32.92$vck44/vb=4,4 2006.229.18:24:32.92#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.18:24:32.92#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.18:24:32.92#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:32.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:32.97#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:32.97#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:32.98#ibcon#enter wrdev, iclass 14, count 2 2006.229.18:24:32.98#ibcon#first serial, iclass 14, count 2 2006.229.18:24:32.98#ibcon#enter sib2, iclass 14, count 2 2006.229.18:24:32.98#ibcon#flushed, iclass 14, count 2 2006.229.18:24:32.98#ibcon#about to write, iclass 14, count 2 2006.229.18:24:32.98#ibcon#wrote, iclass 14, count 2 2006.229.18:24:32.98#ibcon#about to read 3, iclass 14, count 2 2006.229.18:24:32.99#ibcon#read 3, iclass 14, count 2 2006.229.18:24:32.99#ibcon#about to read 4, iclass 14, count 2 2006.229.18:24:32.99#ibcon#read 4, iclass 14, count 2 2006.229.18:24:33.00#ibcon#about to read 5, iclass 14, count 2 2006.229.18:24:33.00#ibcon#read 5, iclass 14, count 2 2006.229.18:24:33.00#ibcon#about to read 6, iclass 14, count 2 2006.229.18:24:33.00#ibcon#read 6, iclass 14, count 2 2006.229.18:24:33.00#ibcon#end of sib2, iclass 14, count 2 2006.229.18:24:33.00#ibcon#*mode == 0, iclass 14, count 2 2006.229.18:24:33.00#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.18:24:33.00#ibcon#[27=AT04-04\r\n] 2006.229.18:24:33.00#ibcon#*before write, iclass 14, count 2 2006.229.18:24:33.00#ibcon#enter sib2, iclass 14, count 2 2006.229.18:24:33.00#ibcon#flushed, iclass 14, count 2 2006.229.18:24:33.00#ibcon#about to write, iclass 14, count 2 2006.229.18:24:33.00#ibcon#wrote, iclass 14, count 2 2006.229.18:24:33.00#ibcon#about to read 3, iclass 14, count 2 2006.229.18:24:33.02#ibcon#read 3, iclass 14, count 2 2006.229.18:24:33.02#ibcon#about to read 4, iclass 14, count 2 2006.229.18:24:33.03#ibcon#read 4, iclass 14, count 2 2006.229.18:24:33.03#ibcon#about to read 5, iclass 14, count 2 2006.229.18:24:33.03#ibcon#read 5, iclass 14, count 2 2006.229.18:24:33.03#ibcon#about to read 6, iclass 14, count 2 2006.229.18:24:33.03#ibcon#read 6, iclass 14, count 2 2006.229.18:24:33.03#ibcon#end of sib2, iclass 14, count 2 2006.229.18:24:33.03#ibcon#*after write, iclass 14, count 2 2006.229.18:24:33.03#ibcon#*before return 0, iclass 14, count 2 2006.229.18:24:33.03#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:33.03#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:24:33.03#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.18:24:33.03#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:33.03#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:33.14#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:33.14#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:33.14#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:24:33.15#ibcon#first serial, iclass 14, count 0 2006.229.18:24:33.15#ibcon#enter sib2, iclass 14, count 0 2006.229.18:24:33.15#ibcon#flushed, iclass 14, count 0 2006.229.18:24:33.15#ibcon#about to write, iclass 14, count 0 2006.229.18:24:33.15#ibcon#wrote, iclass 14, count 0 2006.229.18:24:33.15#ibcon#about to read 3, iclass 14, count 0 2006.229.18:24:33.16#ibcon#read 3, iclass 14, count 0 2006.229.18:24:33.16#ibcon#about to read 4, iclass 14, count 0 2006.229.18:24:33.16#ibcon#read 4, iclass 14, count 0 2006.229.18:24:33.16#ibcon#about to read 5, iclass 14, count 0 2006.229.18:24:33.17#ibcon#read 5, iclass 14, count 0 2006.229.18:24:33.17#ibcon#about to read 6, iclass 14, count 0 2006.229.18:24:33.17#ibcon#read 6, iclass 14, count 0 2006.229.18:24:33.17#ibcon#end of sib2, iclass 14, count 0 2006.229.18:24:33.17#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:24:33.17#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:24:33.17#ibcon#[27=USB\r\n] 2006.229.18:24:33.17#ibcon#*before write, iclass 14, count 0 2006.229.18:24:33.17#ibcon#enter sib2, iclass 14, count 0 2006.229.18:24:33.17#ibcon#flushed, iclass 14, count 0 2006.229.18:24:33.17#ibcon#about to write, iclass 14, count 0 2006.229.18:24:33.17#ibcon#wrote, iclass 14, count 0 2006.229.18:24:33.17#ibcon#about to read 3, iclass 14, count 0 2006.229.18:24:33.19#ibcon#read 3, iclass 14, count 0 2006.229.18:24:33.19#ibcon#about to read 4, iclass 14, count 0 2006.229.18:24:33.20#ibcon#read 4, iclass 14, count 0 2006.229.18:24:33.20#ibcon#about to read 5, iclass 14, count 0 2006.229.18:24:33.20#ibcon#read 5, iclass 14, count 0 2006.229.18:24:33.20#ibcon#about to read 6, iclass 14, count 0 2006.229.18:24:33.20#ibcon#read 6, iclass 14, count 0 2006.229.18:24:33.20#ibcon#end of sib2, iclass 14, count 0 2006.229.18:24:33.20#ibcon#*after write, iclass 14, count 0 2006.229.18:24:33.20#ibcon#*before return 0, iclass 14, count 0 2006.229.18:24:33.20#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:33.20#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:24:33.20#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:24:33.20#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:24:33.20$vck44/vblo=5,709.99 2006.229.18:24:33.20#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.18:24:33.20#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.18:24:33.20#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:33.20#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:33.20#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:33.20#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:33.20#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:24:33.20#ibcon#first serial, iclass 16, count 0 2006.229.18:24:33.20#ibcon#enter sib2, iclass 16, count 0 2006.229.18:24:33.20#ibcon#flushed, iclass 16, count 0 2006.229.18:24:33.20#ibcon#about to write, iclass 16, count 0 2006.229.18:24:33.20#ibcon#wrote, iclass 16, count 0 2006.229.18:24:33.20#ibcon#about to read 3, iclass 16, count 0 2006.229.18:24:33.21#ibcon#read 3, iclass 16, count 0 2006.229.18:24:33.22#ibcon#about to read 4, iclass 16, count 0 2006.229.18:24:33.22#ibcon#read 4, iclass 16, count 0 2006.229.18:24:33.22#ibcon#about to read 5, iclass 16, count 0 2006.229.18:24:33.22#ibcon#read 5, iclass 16, count 0 2006.229.18:24:33.22#ibcon#about to read 6, iclass 16, count 0 2006.229.18:24:33.22#ibcon#read 6, iclass 16, count 0 2006.229.18:24:33.22#ibcon#end of sib2, iclass 16, count 0 2006.229.18:24:33.22#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:24:33.22#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:24:33.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:24:33.22#ibcon#*before write, iclass 16, count 0 2006.229.18:24:33.22#ibcon#enter sib2, iclass 16, count 0 2006.229.18:24:33.22#ibcon#flushed, iclass 16, count 0 2006.229.18:24:33.22#ibcon#about to write, iclass 16, count 0 2006.229.18:24:33.22#ibcon#wrote, iclass 16, count 0 2006.229.18:24:33.22#ibcon#about to read 3, iclass 16, count 0 2006.229.18:24:33.25#ibcon#read 3, iclass 16, count 0 2006.229.18:24:33.25#ibcon#about to read 4, iclass 16, count 0 2006.229.18:24:33.26#ibcon#read 4, iclass 16, count 0 2006.229.18:24:33.26#ibcon#about to read 5, iclass 16, count 0 2006.229.18:24:33.26#ibcon#read 5, iclass 16, count 0 2006.229.18:24:33.26#ibcon#about to read 6, iclass 16, count 0 2006.229.18:24:33.26#ibcon#read 6, iclass 16, count 0 2006.229.18:24:33.26#ibcon#end of sib2, iclass 16, count 0 2006.229.18:24:33.26#ibcon#*after write, iclass 16, count 0 2006.229.18:24:33.26#ibcon#*before return 0, iclass 16, count 0 2006.229.18:24:33.26#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:33.26#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:24:33.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:24:33.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:24:33.26$vck44/vb=5,4 2006.229.18:24:33.26#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.18:24:33.26#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.18:24:33.26#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:33.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:33.31#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:33.31#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:33.31#ibcon#enter wrdev, iclass 18, count 2 2006.229.18:24:33.32#ibcon#first serial, iclass 18, count 2 2006.229.18:24:33.32#ibcon#enter sib2, iclass 18, count 2 2006.229.18:24:33.32#ibcon#flushed, iclass 18, count 2 2006.229.18:24:33.32#ibcon#about to write, iclass 18, count 2 2006.229.18:24:33.32#ibcon#wrote, iclass 18, count 2 2006.229.18:24:33.32#ibcon#about to read 3, iclass 18, count 2 2006.229.18:24:33.33#ibcon#read 3, iclass 18, count 2 2006.229.18:24:33.33#ibcon#about to read 4, iclass 18, count 2 2006.229.18:24:33.33#ibcon#read 4, iclass 18, count 2 2006.229.18:24:33.33#ibcon#about to read 5, iclass 18, count 2 2006.229.18:24:33.33#ibcon#read 5, iclass 18, count 2 2006.229.18:24:33.34#ibcon#about to read 6, iclass 18, count 2 2006.229.18:24:33.34#ibcon#read 6, iclass 18, count 2 2006.229.18:24:33.34#ibcon#end of sib2, iclass 18, count 2 2006.229.18:24:33.34#ibcon#*mode == 0, iclass 18, count 2 2006.229.18:24:33.34#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.18:24:33.34#ibcon#[27=AT05-04\r\n] 2006.229.18:24:33.34#ibcon#*before write, iclass 18, count 2 2006.229.18:24:33.34#ibcon#enter sib2, iclass 18, count 2 2006.229.18:24:33.34#ibcon#flushed, iclass 18, count 2 2006.229.18:24:33.34#ibcon#about to write, iclass 18, count 2 2006.229.18:24:33.34#ibcon#wrote, iclass 18, count 2 2006.229.18:24:33.34#ibcon#about to read 3, iclass 18, count 2 2006.229.18:24:33.36#ibcon#read 3, iclass 18, count 2 2006.229.18:24:33.36#ibcon#about to read 4, iclass 18, count 2 2006.229.18:24:33.37#ibcon#read 4, iclass 18, count 2 2006.229.18:24:33.37#ibcon#about to read 5, iclass 18, count 2 2006.229.18:24:33.37#ibcon#read 5, iclass 18, count 2 2006.229.18:24:33.37#ibcon#about to read 6, iclass 18, count 2 2006.229.18:24:33.37#ibcon#read 6, iclass 18, count 2 2006.229.18:24:33.37#ibcon#end of sib2, iclass 18, count 2 2006.229.18:24:33.37#ibcon#*after write, iclass 18, count 2 2006.229.18:24:33.37#ibcon#*before return 0, iclass 18, count 2 2006.229.18:24:33.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:33.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:24:33.37#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.18:24:33.37#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:33.37#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:33.48#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:33.48#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:33.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:24:33.49#ibcon#first serial, iclass 18, count 0 2006.229.18:24:33.49#ibcon#enter sib2, iclass 18, count 0 2006.229.18:24:33.49#ibcon#flushed, iclass 18, count 0 2006.229.18:24:33.49#ibcon#about to write, iclass 18, count 0 2006.229.18:24:33.49#ibcon#wrote, iclass 18, count 0 2006.229.18:24:33.49#ibcon#about to read 3, iclass 18, count 0 2006.229.18:24:33.50#ibcon#read 3, iclass 18, count 0 2006.229.18:24:33.50#ibcon#about to read 4, iclass 18, count 0 2006.229.18:24:33.51#ibcon#read 4, iclass 18, count 0 2006.229.18:24:33.51#ibcon#about to read 5, iclass 18, count 0 2006.229.18:24:33.51#ibcon#read 5, iclass 18, count 0 2006.229.18:24:33.51#ibcon#about to read 6, iclass 18, count 0 2006.229.18:24:33.51#ibcon#read 6, iclass 18, count 0 2006.229.18:24:33.51#ibcon#end of sib2, iclass 18, count 0 2006.229.18:24:33.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:24:33.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:24:33.51#ibcon#[27=USB\r\n] 2006.229.18:24:33.51#ibcon#*before write, iclass 18, count 0 2006.229.18:24:33.51#ibcon#enter sib2, iclass 18, count 0 2006.229.18:24:33.51#ibcon#flushed, iclass 18, count 0 2006.229.18:24:33.51#ibcon#about to write, iclass 18, count 0 2006.229.18:24:33.51#ibcon#wrote, iclass 18, count 0 2006.229.18:24:33.51#ibcon#about to read 3, iclass 18, count 0 2006.229.18:24:33.53#ibcon#read 3, iclass 18, count 0 2006.229.18:24:33.54#ibcon#about to read 4, iclass 18, count 0 2006.229.18:24:33.54#ibcon#read 4, iclass 18, count 0 2006.229.18:24:33.54#ibcon#about to read 5, iclass 18, count 0 2006.229.18:24:33.54#ibcon#read 5, iclass 18, count 0 2006.229.18:24:33.54#ibcon#about to read 6, iclass 18, count 0 2006.229.18:24:33.54#ibcon#read 6, iclass 18, count 0 2006.229.18:24:33.54#ibcon#end of sib2, iclass 18, count 0 2006.229.18:24:33.54#ibcon#*after write, iclass 18, count 0 2006.229.18:24:33.54#ibcon#*before return 0, iclass 18, count 0 2006.229.18:24:33.54#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:33.54#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:24:33.54#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:24:33.54#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:24:33.54$vck44/vblo=6,719.99 2006.229.18:24:33.54#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.18:24:33.54#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.18:24:33.54#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:33.54#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:33.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:33.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:33.54#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:24:33.54#ibcon#first serial, iclass 20, count 0 2006.229.18:24:33.54#ibcon#enter sib2, iclass 20, count 0 2006.229.18:24:33.54#ibcon#flushed, iclass 20, count 0 2006.229.18:24:33.54#ibcon#about to write, iclass 20, count 0 2006.229.18:24:33.54#ibcon#wrote, iclass 20, count 0 2006.229.18:24:33.54#ibcon#about to read 3, iclass 20, count 0 2006.229.18:24:33.55#ibcon#read 3, iclass 20, count 0 2006.229.18:24:33.56#ibcon#about to read 4, iclass 20, count 0 2006.229.18:24:33.56#ibcon#read 4, iclass 20, count 0 2006.229.18:24:33.56#ibcon#about to read 5, iclass 20, count 0 2006.229.18:24:33.56#ibcon#read 5, iclass 20, count 0 2006.229.18:24:33.56#ibcon#about to read 6, iclass 20, count 0 2006.229.18:24:33.56#ibcon#read 6, iclass 20, count 0 2006.229.18:24:33.56#ibcon#end of sib2, iclass 20, count 0 2006.229.18:24:33.56#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:24:33.56#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:24:33.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:24:33.56#ibcon#*before write, iclass 20, count 0 2006.229.18:24:33.56#ibcon#enter sib2, iclass 20, count 0 2006.229.18:24:33.56#ibcon#flushed, iclass 20, count 0 2006.229.18:24:33.56#ibcon#about to write, iclass 20, count 0 2006.229.18:24:33.56#ibcon#wrote, iclass 20, count 0 2006.229.18:24:33.56#ibcon#about to read 3, iclass 20, count 0 2006.229.18:24:33.59#ibcon#read 3, iclass 20, count 0 2006.229.18:24:33.60#ibcon#about to read 4, iclass 20, count 0 2006.229.18:24:33.60#ibcon#read 4, iclass 20, count 0 2006.229.18:24:33.60#ibcon#about to read 5, iclass 20, count 0 2006.229.18:24:33.60#ibcon#read 5, iclass 20, count 0 2006.229.18:24:33.60#ibcon#about to read 6, iclass 20, count 0 2006.229.18:24:33.60#ibcon#read 6, iclass 20, count 0 2006.229.18:24:33.60#ibcon#end of sib2, iclass 20, count 0 2006.229.18:24:33.60#ibcon#*after write, iclass 20, count 0 2006.229.18:24:33.60#ibcon#*before return 0, iclass 20, count 0 2006.229.18:24:33.60#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:33.60#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:24:33.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:24:33.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:24:33.60$vck44/vb=6,4 2006.229.18:24:33.60#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.18:24:33.60#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.18:24:33.60#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:33.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:33.65#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:33.65#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:33.65#ibcon#enter wrdev, iclass 22, count 2 2006.229.18:24:33.66#ibcon#first serial, iclass 22, count 2 2006.229.18:24:33.66#ibcon#enter sib2, iclass 22, count 2 2006.229.18:24:33.66#ibcon#flushed, iclass 22, count 2 2006.229.18:24:33.66#ibcon#about to write, iclass 22, count 2 2006.229.18:24:33.66#ibcon#wrote, iclass 22, count 2 2006.229.18:24:33.66#ibcon#about to read 3, iclass 22, count 2 2006.229.18:24:33.67#ibcon#read 3, iclass 22, count 2 2006.229.18:24:33.68#ibcon#about to read 4, iclass 22, count 2 2006.229.18:24:33.68#ibcon#read 4, iclass 22, count 2 2006.229.18:24:33.68#ibcon#about to read 5, iclass 22, count 2 2006.229.18:24:33.68#ibcon#read 5, iclass 22, count 2 2006.229.18:24:33.68#ibcon#about to read 6, iclass 22, count 2 2006.229.18:24:33.68#ibcon#read 6, iclass 22, count 2 2006.229.18:24:33.68#ibcon#end of sib2, iclass 22, count 2 2006.229.18:24:33.68#ibcon#*mode == 0, iclass 22, count 2 2006.229.18:24:33.68#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.18:24:33.68#ibcon#[27=AT06-04\r\n] 2006.229.18:24:33.68#ibcon#*before write, iclass 22, count 2 2006.229.18:24:33.68#ibcon#enter sib2, iclass 22, count 2 2006.229.18:24:33.68#ibcon#flushed, iclass 22, count 2 2006.229.18:24:33.68#ibcon#about to write, iclass 22, count 2 2006.229.18:24:33.68#ibcon#wrote, iclass 22, count 2 2006.229.18:24:33.68#ibcon#about to read 3, iclass 22, count 2 2006.229.18:24:33.70#ibcon#read 3, iclass 22, count 2 2006.229.18:24:33.70#ibcon#about to read 4, iclass 22, count 2 2006.229.18:24:33.71#ibcon#read 4, iclass 22, count 2 2006.229.18:24:33.71#ibcon#about to read 5, iclass 22, count 2 2006.229.18:24:33.71#ibcon#read 5, iclass 22, count 2 2006.229.18:24:33.71#ibcon#about to read 6, iclass 22, count 2 2006.229.18:24:33.71#ibcon#read 6, iclass 22, count 2 2006.229.18:24:33.71#ibcon#end of sib2, iclass 22, count 2 2006.229.18:24:33.71#ibcon#*after write, iclass 22, count 2 2006.229.18:24:33.71#ibcon#*before return 0, iclass 22, count 2 2006.229.18:24:33.71#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:33.71#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:24:33.71#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.18:24:33.71#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:33.71#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:33.82#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:33.82#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:33.83#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:24:33.83#ibcon#first serial, iclass 22, count 0 2006.229.18:24:33.83#ibcon#enter sib2, iclass 22, count 0 2006.229.18:24:33.83#ibcon#flushed, iclass 22, count 0 2006.229.18:24:33.83#ibcon#about to write, iclass 22, count 0 2006.229.18:24:33.83#ibcon#wrote, iclass 22, count 0 2006.229.18:24:33.83#ibcon#about to read 3, iclass 22, count 0 2006.229.18:24:33.84#ibcon#read 3, iclass 22, count 0 2006.229.18:24:33.84#ibcon#about to read 4, iclass 22, count 0 2006.229.18:24:33.85#ibcon#read 4, iclass 22, count 0 2006.229.18:24:33.85#ibcon#about to read 5, iclass 22, count 0 2006.229.18:24:33.85#ibcon#read 5, iclass 22, count 0 2006.229.18:24:33.85#ibcon#about to read 6, iclass 22, count 0 2006.229.18:24:33.85#ibcon#read 6, iclass 22, count 0 2006.229.18:24:33.85#ibcon#end of sib2, iclass 22, count 0 2006.229.18:24:33.85#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:24:33.85#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:24:33.85#ibcon#[27=USB\r\n] 2006.229.18:24:33.85#ibcon#*before write, iclass 22, count 0 2006.229.18:24:33.85#ibcon#enter sib2, iclass 22, count 0 2006.229.18:24:33.85#ibcon#flushed, iclass 22, count 0 2006.229.18:24:33.85#ibcon#about to write, iclass 22, count 0 2006.229.18:24:33.85#ibcon#wrote, iclass 22, count 0 2006.229.18:24:33.85#ibcon#about to read 3, iclass 22, count 0 2006.229.18:24:33.87#ibcon#read 3, iclass 22, count 0 2006.229.18:24:33.87#ibcon#about to read 4, iclass 22, count 0 2006.229.18:24:33.88#ibcon#read 4, iclass 22, count 0 2006.229.18:24:33.88#ibcon#about to read 5, iclass 22, count 0 2006.229.18:24:33.88#ibcon#read 5, iclass 22, count 0 2006.229.18:24:33.88#ibcon#about to read 6, iclass 22, count 0 2006.229.18:24:33.88#ibcon#read 6, iclass 22, count 0 2006.229.18:24:33.88#ibcon#end of sib2, iclass 22, count 0 2006.229.18:24:33.88#ibcon#*after write, iclass 22, count 0 2006.229.18:24:33.88#ibcon#*before return 0, iclass 22, count 0 2006.229.18:24:33.88#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:33.88#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:24:33.88#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:24:33.88#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:24:33.88$vck44/vblo=7,734.99 2006.229.18:24:33.88#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.18:24:33.88#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.18:24:33.88#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:33.88#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:33.88#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:33.88#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:33.88#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:24:33.88#ibcon#first serial, iclass 24, count 0 2006.229.18:24:33.88#ibcon#enter sib2, iclass 24, count 0 2006.229.18:24:33.88#ibcon#flushed, iclass 24, count 0 2006.229.18:24:33.88#ibcon#about to write, iclass 24, count 0 2006.229.18:24:33.88#ibcon#wrote, iclass 24, count 0 2006.229.18:24:33.88#ibcon#about to read 3, iclass 24, count 0 2006.229.18:24:33.89#ibcon#read 3, iclass 24, count 0 2006.229.18:24:33.89#ibcon#about to read 4, iclass 24, count 0 2006.229.18:24:33.90#ibcon#read 4, iclass 24, count 0 2006.229.18:24:33.90#ibcon#about to read 5, iclass 24, count 0 2006.229.18:24:33.90#ibcon#read 5, iclass 24, count 0 2006.229.18:24:33.90#ibcon#about to read 6, iclass 24, count 0 2006.229.18:24:33.90#ibcon#read 6, iclass 24, count 0 2006.229.18:24:33.90#ibcon#end of sib2, iclass 24, count 0 2006.229.18:24:33.90#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:24:33.90#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:24:33.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:24:33.90#ibcon#*before write, iclass 24, count 0 2006.229.18:24:33.90#ibcon#enter sib2, iclass 24, count 0 2006.229.18:24:33.90#ibcon#flushed, iclass 24, count 0 2006.229.18:24:33.90#ibcon#about to write, iclass 24, count 0 2006.229.18:24:33.90#ibcon#wrote, iclass 24, count 0 2006.229.18:24:33.90#ibcon#about to read 3, iclass 24, count 0 2006.229.18:24:33.93#ibcon#read 3, iclass 24, count 0 2006.229.18:24:33.93#ibcon#about to read 4, iclass 24, count 0 2006.229.18:24:33.93#ibcon#read 4, iclass 24, count 0 2006.229.18:24:33.94#ibcon#about to read 5, iclass 24, count 0 2006.229.18:24:33.94#ibcon#read 5, iclass 24, count 0 2006.229.18:24:33.94#ibcon#about to read 6, iclass 24, count 0 2006.229.18:24:33.94#ibcon#read 6, iclass 24, count 0 2006.229.18:24:33.94#ibcon#end of sib2, iclass 24, count 0 2006.229.18:24:33.94#ibcon#*after write, iclass 24, count 0 2006.229.18:24:33.94#ibcon#*before return 0, iclass 24, count 0 2006.229.18:24:33.94#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:33.94#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:24:33.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:24:33.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:24:33.94$vck44/vb=7,4 2006.229.18:24:33.94#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.18:24:33.94#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.18:24:33.94#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:33.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:33.99#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:33.99#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:33.99#ibcon#enter wrdev, iclass 26, count 2 2006.229.18:24:34.00#ibcon#first serial, iclass 26, count 2 2006.229.18:24:34.00#ibcon#enter sib2, iclass 26, count 2 2006.229.18:24:34.00#ibcon#flushed, iclass 26, count 2 2006.229.18:24:34.00#ibcon#about to write, iclass 26, count 2 2006.229.18:24:34.00#ibcon#wrote, iclass 26, count 2 2006.229.18:24:34.00#ibcon#about to read 3, iclass 26, count 2 2006.229.18:24:34.01#ibcon#read 3, iclass 26, count 2 2006.229.18:24:34.01#ibcon#about to read 4, iclass 26, count 2 2006.229.18:24:34.01#ibcon#read 4, iclass 26, count 2 2006.229.18:24:34.02#ibcon#about to read 5, iclass 26, count 2 2006.229.18:24:34.02#ibcon#read 5, iclass 26, count 2 2006.229.18:24:34.02#ibcon#about to read 6, iclass 26, count 2 2006.229.18:24:34.02#ibcon#read 6, iclass 26, count 2 2006.229.18:24:34.02#ibcon#end of sib2, iclass 26, count 2 2006.229.18:24:34.02#ibcon#*mode == 0, iclass 26, count 2 2006.229.18:24:34.02#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.18:24:34.02#ibcon#[27=AT07-04\r\n] 2006.229.18:24:34.02#ibcon#*before write, iclass 26, count 2 2006.229.18:24:34.02#ibcon#enter sib2, iclass 26, count 2 2006.229.18:24:34.02#ibcon#flushed, iclass 26, count 2 2006.229.18:24:34.02#ibcon#about to write, iclass 26, count 2 2006.229.18:24:34.02#ibcon#wrote, iclass 26, count 2 2006.229.18:24:34.02#ibcon#about to read 3, iclass 26, count 2 2006.229.18:24:34.04#ibcon#read 3, iclass 26, count 2 2006.229.18:24:34.04#ibcon#about to read 4, iclass 26, count 2 2006.229.18:24:34.04#ibcon#read 4, iclass 26, count 2 2006.229.18:24:34.05#ibcon#about to read 5, iclass 26, count 2 2006.229.18:24:34.05#ibcon#read 5, iclass 26, count 2 2006.229.18:24:34.05#ibcon#about to read 6, iclass 26, count 2 2006.229.18:24:34.05#ibcon#read 6, iclass 26, count 2 2006.229.18:24:34.05#ibcon#end of sib2, iclass 26, count 2 2006.229.18:24:34.05#ibcon#*after write, iclass 26, count 2 2006.229.18:24:34.05#ibcon#*before return 0, iclass 26, count 2 2006.229.18:24:34.05#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:34.05#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:24:34.05#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.18:24:34.05#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:34.05#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:34.16#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:34.16#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:34.16#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:24:34.17#ibcon#first serial, iclass 26, count 0 2006.229.18:24:34.17#ibcon#enter sib2, iclass 26, count 0 2006.229.18:24:34.17#ibcon#flushed, iclass 26, count 0 2006.229.18:24:34.17#ibcon#about to write, iclass 26, count 0 2006.229.18:24:34.17#ibcon#wrote, iclass 26, count 0 2006.229.18:24:34.17#ibcon#about to read 3, iclass 26, count 0 2006.229.18:24:34.18#ibcon#read 3, iclass 26, count 0 2006.229.18:24:34.18#ibcon#about to read 4, iclass 26, count 0 2006.229.18:24:34.18#ibcon#read 4, iclass 26, count 0 2006.229.18:24:34.18#ibcon#about to read 5, iclass 26, count 0 2006.229.18:24:34.19#ibcon#read 5, iclass 26, count 0 2006.229.18:24:34.19#ibcon#about to read 6, iclass 26, count 0 2006.229.18:24:34.19#ibcon#read 6, iclass 26, count 0 2006.229.18:24:34.19#ibcon#end of sib2, iclass 26, count 0 2006.229.18:24:34.19#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:24:34.19#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:24:34.19#ibcon#[27=USB\r\n] 2006.229.18:24:34.19#ibcon#*before write, iclass 26, count 0 2006.229.18:24:34.19#ibcon#enter sib2, iclass 26, count 0 2006.229.18:24:34.19#ibcon#flushed, iclass 26, count 0 2006.229.18:24:34.19#ibcon#about to write, iclass 26, count 0 2006.229.18:24:34.19#ibcon#wrote, iclass 26, count 0 2006.229.18:24:34.19#ibcon#about to read 3, iclass 26, count 0 2006.229.18:24:34.21#ibcon#read 3, iclass 26, count 0 2006.229.18:24:34.21#ibcon#about to read 4, iclass 26, count 0 2006.229.18:24:34.22#ibcon#read 4, iclass 26, count 0 2006.229.18:24:34.22#ibcon#about to read 5, iclass 26, count 0 2006.229.18:24:34.22#ibcon#read 5, iclass 26, count 0 2006.229.18:24:34.22#ibcon#about to read 6, iclass 26, count 0 2006.229.18:24:34.22#ibcon#read 6, iclass 26, count 0 2006.229.18:24:34.22#ibcon#end of sib2, iclass 26, count 0 2006.229.18:24:34.22#ibcon#*after write, iclass 26, count 0 2006.229.18:24:34.22#ibcon#*before return 0, iclass 26, count 0 2006.229.18:24:34.22#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:34.22#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:24:34.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:24:34.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:24:34.22$vck44/vblo=8,744.99 2006.229.18:24:34.22#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.18:24:34.22#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.18:24:34.22#ibcon#ireg 17 cls_cnt 0 2006.229.18:24:34.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:34.22#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:34.22#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:34.22#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:24:34.22#ibcon#first serial, iclass 28, count 0 2006.229.18:24:34.22#ibcon#enter sib2, iclass 28, count 0 2006.229.18:24:34.22#ibcon#flushed, iclass 28, count 0 2006.229.18:24:34.22#ibcon#about to write, iclass 28, count 0 2006.229.18:24:34.22#ibcon#wrote, iclass 28, count 0 2006.229.18:24:34.22#ibcon#about to read 3, iclass 28, count 0 2006.229.18:24:34.23#ibcon#read 3, iclass 28, count 0 2006.229.18:24:34.23#ibcon#about to read 4, iclass 28, count 0 2006.229.18:24:34.24#ibcon#read 4, iclass 28, count 0 2006.229.18:24:34.24#ibcon#about to read 5, iclass 28, count 0 2006.229.18:24:34.24#ibcon#read 5, iclass 28, count 0 2006.229.18:24:34.24#ibcon#about to read 6, iclass 28, count 0 2006.229.18:24:34.24#ibcon#read 6, iclass 28, count 0 2006.229.18:24:34.24#ibcon#end of sib2, iclass 28, count 0 2006.229.18:24:34.24#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:24:34.24#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:24:34.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:24:34.24#ibcon#*before write, iclass 28, count 0 2006.229.18:24:34.24#ibcon#enter sib2, iclass 28, count 0 2006.229.18:24:34.24#ibcon#flushed, iclass 28, count 0 2006.229.18:24:34.24#ibcon#about to write, iclass 28, count 0 2006.229.18:24:34.24#ibcon#wrote, iclass 28, count 0 2006.229.18:24:34.24#ibcon#about to read 3, iclass 28, count 0 2006.229.18:24:34.27#ibcon#read 3, iclass 28, count 0 2006.229.18:24:34.27#ibcon#about to read 4, iclass 28, count 0 2006.229.18:24:34.28#ibcon#read 4, iclass 28, count 0 2006.229.18:24:34.28#ibcon#about to read 5, iclass 28, count 0 2006.229.18:24:34.28#ibcon#read 5, iclass 28, count 0 2006.229.18:24:34.28#ibcon#about to read 6, iclass 28, count 0 2006.229.18:24:34.28#ibcon#read 6, iclass 28, count 0 2006.229.18:24:34.28#ibcon#end of sib2, iclass 28, count 0 2006.229.18:24:34.28#ibcon#*after write, iclass 28, count 0 2006.229.18:24:34.28#ibcon#*before return 0, iclass 28, count 0 2006.229.18:24:34.28#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:34.28#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:24:34.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:24:34.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:24:34.28$vck44/vb=8,4 2006.229.18:24:34.28#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.18:24:34.28#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.18:24:34.28#ibcon#ireg 11 cls_cnt 2 2006.229.18:24:34.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:34.33#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:34.33#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:34.33#ibcon#enter wrdev, iclass 30, count 2 2006.229.18:24:34.33#ibcon#first serial, iclass 30, count 2 2006.229.18:24:34.34#ibcon#enter sib2, iclass 30, count 2 2006.229.18:24:34.34#ibcon#flushed, iclass 30, count 2 2006.229.18:24:34.34#ibcon#about to write, iclass 30, count 2 2006.229.18:24:34.34#ibcon#wrote, iclass 30, count 2 2006.229.18:24:34.34#ibcon#about to read 3, iclass 30, count 2 2006.229.18:24:34.35#ibcon#read 3, iclass 30, count 2 2006.229.18:24:34.35#ibcon#about to read 4, iclass 30, count 2 2006.229.18:24:34.35#ibcon#read 4, iclass 30, count 2 2006.229.18:24:34.35#ibcon#about to read 5, iclass 30, count 2 2006.229.18:24:34.35#ibcon#read 5, iclass 30, count 2 2006.229.18:24:34.36#ibcon#about to read 6, iclass 30, count 2 2006.229.18:24:34.36#ibcon#read 6, iclass 30, count 2 2006.229.18:24:34.36#ibcon#end of sib2, iclass 30, count 2 2006.229.18:24:34.36#ibcon#*mode == 0, iclass 30, count 2 2006.229.18:24:34.36#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.18:24:34.36#ibcon#[27=AT08-04\r\n] 2006.229.18:24:34.36#ibcon#*before write, iclass 30, count 2 2006.229.18:24:34.36#ibcon#enter sib2, iclass 30, count 2 2006.229.18:24:34.36#ibcon#flushed, iclass 30, count 2 2006.229.18:24:34.36#ibcon#about to write, iclass 30, count 2 2006.229.18:24:34.36#ibcon#wrote, iclass 30, count 2 2006.229.18:24:34.36#ibcon#about to read 3, iclass 30, count 2 2006.229.18:24:34.38#ibcon#read 3, iclass 30, count 2 2006.229.18:24:34.38#ibcon#about to read 4, iclass 30, count 2 2006.229.18:24:34.38#ibcon#read 4, iclass 30, count 2 2006.229.18:24:34.38#ibcon#about to read 5, iclass 30, count 2 2006.229.18:24:34.38#ibcon#read 5, iclass 30, count 2 2006.229.18:24:34.39#ibcon#about to read 6, iclass 30, count 2 2006.229.18:24:34.39#ibcon#read 6, iclass 30, count 2 2006.229.18:24:34.39#ibcon#end of sib2, iclass 30, count 2 2006.229.18:24:34.39#ibcon#*after write, iclass 30, count 2 2006.229.18:24:34.39#ibcon#*before return 0, iclass 30, count 2 2006.229.18:24:34.39#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:34.39#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:24:34.39#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.18:24:34.39#ibcon#ireg 7 cls_cnt 0 2006.229.18:24:34.39#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:34.50#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:34.51#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:34.51#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:24:34.51#ibcon#first serial, iclass 30, count 0 2006.229.18:24:34.51#ibcon#enter sib2, iclass 30, count 0 2006.229.18:24:34.51#ibcon#flushed, iclass 30, count 0 2006.229.18:24:34.51#ibcon#about to write, iclass 30, count 0 2006.229.18:24:34.51#ibcon#wrote, iclass 30, count 0 2006.229.18:24:34.51#ibcon#about to read 3, iclass 30, count 0 2006.229.18:24:34.52#ibcon#read 3, iclass 30, count 0 2006.229.18:24:34.52#ibcon#about to read 4, iclass 30, count 0 2006.229.18:24:34.53#ibcon#read 4, iclass 30, count 0 2006.229.18:24:34.53#ibcon#about to read 5, iclass 30, count 0 2006.229.18:24:34.53#ibcon#read 5, iclass 30, count 0 2006.229.18:24:34.53#ibcon#about to read 6, iclass 30, count 0 2006.229.18:24:34.53#ibcon#read 6, iclass 30, count 0 2006.229.18:24:34.53#ibcon#end of sib2, iclass 30, count 0 2006.229.18:24:34.53#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:24:34.53#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:24:34.53#ibcon#[27=USB\r\n] 2006.229.18:24:34.53#ibcon#*before write, iclass 30, count 0 2006.229.18:24:34.53#ibcon#enter sib2, iclass 30, count 0 2006.229.18:24:34.53#ibcon#flushed, iclass 30, count 0 2006.229.18:24:34.53#ibcon#about to write, iclass 30, count 0 2006.229.18:24:34.53#ibcon#wrote, iclass 30, count 0 2006.229.18:24:34.53#ibcon#about to read 3, iclass 30, count 0 2006.229.18:24:34.55#ibcon#read 3, iclass 30, count 0 2006.229.18:24:34.56#ibcon#about to read 4, iclass 30, count 0 2006.229.18:24:34.56#ibcon#read 4, iclass 30, count 0 2006.229.18:24:34.56#ibcon#about to read 5, iclass 30, count 0 2006.229.18:24:34.56#ibcon#read 5, iclass 30, count 0 2006.229.18:24:34.56#ibcon#about to read 6, iclass 30, count 0 2006.229.18:24:34.56#ibcon#read 6, iclass 30, count 0 2006.229.18:24:34.56#ibcon#end of sib2, iclass 30, count 0 2006.229.18:24:34.56#ibcon#*after write, iclass 30, count 0 2006.229.18:24:34.56#ibcon#*before return 0, iclass 30, count 0 2006.229.18:24:34.56#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:34.56#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:24:34.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:24:34.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:24:34.56$vck44/vabw=wide 2006.229.18:24:34.56#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.18:24:34.56#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.18:24:34.56#ibcon#ireg 8 cls_cnt 0 2006.229.18:24:34.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:34.56#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:34.56#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:34.56#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:24:34.56#ibcon#first serial, iclass 32, count 0 2006.229.18:24:34.56#ibcon#enter sib2, iclass 32, count 0 2006.229.18:24:34.56#ibcon#flushed, iclass 32, count 0 2006.229.18:24:34.56#ibcon#about to write, iclass 32, count 0 2006.229.18:24:34.56#ibcon#wrote, iclass 32, count 0 2006.229.18:24:34.56#ibcon#about to read 3, iclass 32, count 0 2006.229.18:24:34.57#ibcon#read 3, iclass 32, count 0 2006.229.18:24:34.58#ibcon#about to read 4, iclass 32, count 0 2006.229.18:24:34.58#ibcon#read 4, iclass 32, count 0 2006.229.18:24:34.58#ibcon#about to read 5, iclass 32, count 0 2006.229.18:24:34.58#ibcon#read 5, iclass 32, count 0 2006.229.18:24:34.58#ibcon#about to read 6, iclass 32, count 0 2006.229.18:24:34.58#ibcon#read 6, iclass 32, count 0 2006.229.18:24:34.58#ibcon#end of sib2, iclass 32, count 0 2006.229.18:24:34.58#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:24:34.58#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:24:34.58#ibcon#[25=BW32\r\n] 2006.229.18:24:34.58#ibcon#*before write, iclass 32, count 0 2006.229.18:24:34.58#ibcon#enter sib2, iclass 32, count 0 2006.229.18:24:34.58#ibcon#flushed, iclass 32, count 0 2006.229.18:24:34.58#ibcon#about to write, iclass 32, count 0 2006.229.18:24:34.58#ibcon#wrote, iclass 32, count 0 2006.229.18:24:34.58#ibcon#about to read 3, iclass 32, count 0 2006.229.18:24:34.60#ibcon#read 3, iclass 32, count 0 2006.229.18:24:34.60#ibcon#about to read 4, iclass 32, count 0 2006.229.18:24:34.61#ibcon#read 4, iclass 32, count 0 2006.229.18:24:34.61#ibcon#about to read 5, iclass 32, count 0 2006.229.18:24:34.61#ibcon#read 5, iclass 32, count 0 2006.229.18:24:34.61#ibcon#about to read 6, iclass 32, count 0 2006.229.18:24:34.61#ibcon#read 6, iclass 32, count 0 2006.229.18:24:34.61#ibcon#end of sib2, iclass 32, count 0 2006.229.18:24:34.61#ibcon#*after write, iclass 32, count 0 2006.229.18:24:34.61#ibcon#*before return 0, iclass 32, count 0 2006.229.18:24:34.61#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:34.61#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:24:34.61#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:24:34.61#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:24:34.61$vck44/vbbw=wide 2006.229.18:24:34.61#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.18:24:34.61#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.18:24:34.61#ibcon#ireg 8 cls_cnt 0 2006.229.18:24:34.61#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:24:34.67#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:24:34.67#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:24:34.67#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:24:34.68#ibcon#first serial, iclass 34, count 0 2006.229.18:24:34.68#ibcon#enter sib2, iclass 34, count 0 2006.229.18:24:34.68#ibcon#flushed, iclass 34, count 0 2006.229.18:24:34.68#ibcon#about to write, iclass 34, count 0 2006.229.18:24:34.68#ibcon#wrote, iclass 34, count 0 2006.229.18:24:34.68#ibcon#about to read 3, iclass 34, count 0 2006.229.18:24:34.69#ibcon#read 3, iclass 34, count 0 2006.229.18:24:34.70#ibcon#about to read 4, iclass 34, count 0 2006.229.18:24:34.70#ibcon#read 4, iclass 34, count 0 2006.229.18:24:34.70#ibcon#about to read 5, iclass 34, count 0 2006.229.18:24:34.70#ibcon#read 5, iclass 34, count 0 2006.229.18:24:34.70#ibcon#about to read 6, iclass 34, count 0 2006.229.18:24:34.70#ibcon#read 6, iclass 34, count 0 2006.229.18:24:34.70#ibcon#end of sib2, iclass 34, count 0 2006.229.18:24:34.70#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:24:34.70#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:24:34.70#ibcon#[27=BW32\r\n] 2006.229.18:24:34.70#ibcon#*before write, iclass 34, count 0 2006.229.18:24:34.70#ibcon#enter sib2, iclass 34, count 0 2006.229.18:24:34.70#ibcon#flushed, iclass 34, count 0 2006.229.18:24:34.70#ibcon#about to write, iclass 34, count 0 2006.229.18:24:34.70#ibcon#wrote, iclass 34, count 0 2006.229.18:24:34.70#ibcon#about to read 3, iclass 34, count 0 2006.229.18:24:34.72#ibcon#read 3, iclass 34, count 0 2006.229.18:24:34.72#ibcon#about to read 4, iclass 34, count 0 2006.229.18:24:34.73#ibcon#read 4, iclass 34, count 0 2006.229.18:24:34.73#ibcon#about to read 5, iclass 34, count 0 2006.229.18:24:34.73#ibcon#read 5, iclass 34, count 0 2006.229.18:24:34.73#ibcon#about to read 6, iclass 34, count 0 2006.229.18:24:34.73#ibcon#read 6, iclass 34, count 0 2006.229.18:24:34.73#ibcon#end of sib2, iclass 34, count 0 2006.229.18:24:34.73#ibcon#*after write, iclass 34, count 0 2006.229.18:24:34.73#ibcon#*before return 0, iclass 34, count 0 2006.229.18:24:34.73#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:24:34.73#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:24:34.73#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:24:34.73#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:24:34.73$setupk4/ifdk4 2006.229.18:24:34.73$ifdk4/lo= 2006.229.18:24:34.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:24:34.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:24:34.73$ifdk4/patch= 2006.229.18:24:34.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:24:34.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:24:34.73$setupk4/!*+20s 2006.229.18:24:36.32#abcon#<5=/07 0.4 1.1 26.411001001.4\r\n> 2006.229.18:24:36.34#abcon#{5=INTERFACE CLEAR} 2006.229.18:24:36.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:24:43.12#trakl#Source acquired 2006.229.18:24:43.13#flagr#flagr/antenna,acquired 2006.229.18:24:46.49#abcon#<5=/07 0.4 1.1 26.411001001.4\r\n> 2006.229.18:24:46.51#abcon#{5=INTERFACE CLEAR} 2006.229.18:24:46.57#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:24:49.24$setupk4/"tpicd 2006.229.18:24:49.25$setupk4/echo=off 2006.229.18:24:49.25$setupk4/xlog=off 2006.229.18:24:49.25:!2006.229.18:27:05 2006.229.18:27:05.01:preob 2006.229.18:27:06.14/onsource/TRACKING 2006.229.18:27:06.15:!2006.229.18:27:15 2006.229.18:27:15.01:"tape 2006.229.18:27:15.01:"st=record 2006.229.18:27:15.02:data_valid=on 2006.229.18:27:15.02:midob 2006.229.18:27:16.14/onsource/TRACKING 2006.229.18:27:16.15/wx/26.40,1001.4,100 2006.229.18:27:16.22/cable/+6.4175E-03 2006.229.18:27:17.31/va/01,08,usb,yes,33,35 2006.229.18:27:17.31/va/02,07,usb,yes,35,36 2006.229.18:27:17.31/va/03,06,usb,yes,44,46 2006.229.18:27:17.31/va/04,07,usb,yes,36,38 2006.229.18:27:17.31/va/05,04,usb,yes,33,33 2006.229.18:27:17.31/va/06,04,usb,yes,37,36 2006.229.18:27:17.31/va/07,05,usb,yes,32,33 2006.229.18:27:17.31/va/08,06,usb,yes,24,29 2006.229.18:27:17.54/valo/01,524.99,yes,locked 2006.229.18:27:17.54/valo/02,534.99,yes,locked 2006.229.18:27:17.54/valo/03,564.99,yes,locked 2006.229.18:27:17.54/valo/04,624.99,yes,locked 2006.229.18:27:17.54/valo/05,734.99,yes,locked 2006.229.18:27:17.54/valo/06,814.99,yes,locked 2006.229.18:27:17.54/valo/07,864.99,yes,locked 2006.229.18:27:17.54/valo/08,884.99,yes,locked 2006.229.18:27:18.63/vb/01,04,usb,yes,31,29 2006.229.18:27:18.63/vb/02,04,usb,yes,34,33 2006.229.18:27:18.63/vb/03,04,usb,yes,31,34 2006.229.18:27:18.63/vb/04,04,usb,yes,35,34 2006.229.18:27:18.63/vb/05,04,usb,yes,27,30 2006.229.18:27:18.63/vb/06,04,usb,yes,32,28 2006.229.18:27:18.63/vb/07,04,usb,yes,32,32 2006.229.18:27:18.63/vb/08,04,usb,yes,29,33 2006.229.18:27:18.87/vblo/01,629.99,yes,locked 2006.229.18:27:18.87/vblo/02,634.99,yes,locked 2006.229.18:27:18.87/vblo/03,649.99,yes,locked 2006.229.18:27:18.87/vblo/04,679.99,yes,locked 2006.229.18:27:18.87/vblo/05,709.99,yes,locked 2006.229.18:27:18.87/vblo/06,719.99,yes,locked 2006.229.18:27:18.87/vblo/07,734.99,yes,locked 2006.229.18:27:18.87/vblo/08,744.99,yes,locked 2006.229.18:27:19.02/vabw/8 2006.229.18:27:19.17/vbbw/8 2006.229.18:27:19.26/xfe/off,on,12.0 2006.229.18:27:19.67/ifatt/23,28,28,28 2006.229.18:27:20.07/fmout-gps/S +4.50E-07 2006.229.18:27:20.11:!2006.229.18:29:05 2006.229.18:29:05.01:data_valid=off 2006.229.18:29:05.01:"et 2006.229.18:29:05.02:!+3s 2006.229.18:29:08.04:"tape 2006.229.18:29:08.04:postob 2006.229.18:29:08.22/cable/+6.4159E-03 2006.229.18:29:08.22/wx/26.39,1001.4,100 2006.229.18:29:08.28/fmout-gps/S +4.50E-07 2006.229.18:29:08.28:scan_name=229-1831,jd0608,250 2006.229.18:29:08.28:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.18:29:10.14#flagr#flagr/antenna,new-source 2006.229.18:29:10.14:checkk5 2006.229.18:29:10.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:29:10.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:29:11.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:29:11.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:29:12.14/chk_obsdata//k5ts1/T2291827??a.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.18:29:12.54/chk_obsdata//k5ts2/T2291827??b.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.18:29:12.95/chk_obsdata//k5ts3/T2291827??c.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.18:29:13.35/chk_obsdata//k5ts4/T2291827??d.dat file size is correct (nominal:440MB, actual:436MB). 2006.229.18:29:14.06/k5log//k5ts1_log_newline 2006.229.18:29:14.78/k5log//k5ts2_log_newline 2006.229.18:29:15.50/k5log//k5ts3_log_newline 2006.229.18:29:16.22/k5log//k5ts4_log_newline 2006.229.18:29:16.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:29:16.24:setupk4=1 2006.229.18:29:16.24$setupk4/echo=on 2006.229.18:29:16.25$setupk4/pcalon 2006.229.18:29:16.25$pcalon/"no phase cal control is implemented here 2006.229.18:29:16.25$setupk4/"tpicd=stop 2006.229.18:29:16.25$setupk4/"rec=synch_on 2006.229.18:29:16.25$setupk4/"rec_mode=128 2006.229.18:29:16.25$setupk4/!* 2006.229.18:29:16.25$setupk4/recpk4 2006.229.18:29:16.25$recpk4/recpatch= 2006.229.18:29:16.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:29:16.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:29:16.25$setupk4/vck44 2006.229.18:29:16.25$vck44/valo=1,524.99 2006.229.18:29:16.25#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.18:29:16.25#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.18:29:16.25#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:16.25#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:16.25#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:16.25#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:16.25#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:29:16.25#ibcon#first serial, iclass 5, count 0 2006.229.18:29:16.25#ibcon#enter sib2, iclass 5, count 0 2006.229.18:29:16.25#ibcon#flushed, iclass 5, count 0 2006.229.18:29:16.25#ibcon#about to write, iclass 5, count 0 2006.229.18:29:16.25#ibcon#wrote, iclass 5, count 0 2006.229.18:29:16.25#ibcon#about to read 3, iclass 5, count 0 2006.229.18:29:16.27#ibcon#read 3, iclass 5, count 0 2006.229.18:29:16.27#ibcon#about to read 4, iclass 5, count 0 2006.229.18:29:16.27#ibcon#read 4, iclass 5, count 0 2006.229.18:29:16.27#ibcon#about to read 5, iclass 5, count 0 2006.229.18:29:16.27#ibcon#read 5, iclass 5, count 0 2006.229.18:29:16.27#ibcon#about to read 6, iclass 5, count 0 2006.229.18:29:16.27#ibcon#read 6, iclass 5, count 0 2006.229.18:29:16.27#ibcon#end of sib2, iclass 5, count 0 2006.229.18:29:16.27#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:29:16.27#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:29:16.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:29:16.27#ibcon#*before write, iclass 5, count 0 2006.229.18:29:16.27#ibcon#enter sib2, iclass 5, count 0 2006.229.18:29:16.27#ibcon#flushed, iclass 5, count 0 2006.229.18:29:16.27#ibcon#about to write, iclass 5, count 0 2006.229.18:29:16.27#ibcon#wrote, iclass 5, count 0 2006.229.18:29:16.27#ibcon#about to read 3, iclass 5, count 0 2006.229.18:29:16.31#ibcon#read 3, iclass 5, count 0 2006.229.18:29:16.31#ibcon#about to read 4, iclass 5, count 0 2006.229.18:29:16.31#ibcon#read 4, iclass 5, count 0 2006.229.18:29:16.31#ibcon#about to read 5, iclass 5, count 0 2006.229.18:29:16.31#ibcon#read 5, iclass 5, count 0 2006.229.18:29:16.31#ibcon#about to read 6, iclass 5, count 0 2006.229.18:29:16.31#ibcon#read 6, iclass 5, count 0 2006.229.18:29:16.31#ibcon#end of sib2, iclass 5, count 0 2006.229.18:29:16.31#ibcon#*after write, iclass 5, count 0 2006.229.18:29:16.31#ibcon#*before return 0, iclass 5, count 0 2006.229.18:29:16.31#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:16.31#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:16.31#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:29:16.31#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:29:16.31$vck44/va=1,8 2006.229.18:29:16.31#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.18:29:16.31#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.18:29:16.31#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:16.31#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:16.31#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:16.31#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:16.31#ibcon#enter wrdev, iclass 7, count 2 2006.229.18:29:16.31#ibcon#first serial, iclass 7, count 2 2006.229.18:29:16.31#ibcon#enter sib2, iclass 7, count 2 2006.229.18:29:16.31#ibcon#flushed, iclass 7, count 2 2006.229.18:29:16.31#ibcon#about to write, iclass 7, count 2 2006.229.18:29:16.31#ibcon#wrote, iclass 7, count 2 2006.229.18:29:16.31#ibcon#about to read 3, iclass 7, count 2 2006.229.18:29:16.33#ibcon#read 3, iclass 7, count 2 2006.229.18:29:16.33#ibcon#about to read 4, iclass 7, count 2 2006.229.18:29:16.33#ibcon#read 4, iclass 7, count 2 2006.229.18:29:16.33#ibcon#about to read 5, iclass 7, count 2 2006.229.18:29:16.33#ibcon#read 5, iclass 7, count 2 2006.229.18:29:16.33#ibcon#about to read 6, iclass 7, count 2 2006.229.18:29:16.33#ibcon#read 6, iclass 7, count 2 2006.229.18:29:16.33#ibcon#end of sib2, iclass 7, count 2 2006.229.18:29:16.33#ibcon#*mode == 0, iclass 7, count 2 2006.229.18:29:16.33#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.18:29:16.33#ibcon#[25=AT01-08\r\n] 2006.229.18:29:16.33#ibcon#*before write, iclass 7, count 2 2006.229.18:29:16.33#ibcon#enter sib2, iclass 7, count 2 2006.229.18:29:16.33#ibcon#flushed, iclass 7, count 2 2006.229.18:29:16.33#ibcon#about to write, iclass 7, count 2 2006.229.18:29:16.33#ibcon#wrote, iclass 7, count 2 2006.229.18:29:16.33#ibcon#about to read 3, iclass 7, count 2 2006.229.18:29:16.36#ibcon#read 3, iclass 7, count 2 2006.229.18:29:16.36#ibcon#about to read 4, iclass 7, count 2 2006.229.18:29:16.36#ibcon#read 4, iclass 7, count 2 2006.229.18:29:16.36#ibcon#about to read 5, iclass 7, count 2 2006.229.18:29:16.36#ibcon#read 5, iclass 7, count 2 2006.229.18:29:16.36#ibcon#about to read 6, iclass 7, count 2 2006.229.18:29:16.36#ibcon#read 6, iclass 7, count 2 2006.229.18:29:16.36#ibcon#end of sib2, iclass 7, count 2 2006.229.18:29:16.36#ibcon#*after write, iclass 7, count 2 2006.229.18:29:16.36#ibcon#*before return 0, iclass 7, count 2 2006.229.18:29:16.36#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:16.36#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:16.36#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.18:29:16.36#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:16.36#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:16.48#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:16.48#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:16.48#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:29:16.48#ibcon#first serial, iclass 7, count 0 2006.229.18:29:16.48#ibcon#enter sib2, iclass 7, count 0 2006.229.18:29:16.48#ibcon#flushed, iclass 7, count 0 2006.229.18:29:16.48#ibcon#about to write, iclass 7, count 0 2006.229.18:29:16.48#ibcon#wrote, iclass 7, count 0 2006.229.18:29:16.48#ibcon#about to read 3, iclass 7, count 0 2006.229.18:29:16.50#ibcon#read 3, iclass 7, count 0 2006.229.18:29:16.50#ibcon#about to read 4, iclass 7, count 0 2006.229.18:29:16.50#ibcon#read 4, iclass 7, count 0 2006.229.18:29:16.50#ibcon#about to read 5, iclass 7, count 0 2006.229.18:29:16.50#ibcon#read 5, iclass 7, count 0 2006.229.18:29:16.50#ibcon#about to read 6, iclass 7, count 0 2006.229.18:29:16.50#ibcon#read 6, iclass 7, count 0 2006.229.18:29:16.50#ibcon#end of sib2, iclass 7, count 0 2006.229.18:29:16.50#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:29:16.50#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:29:16.50#ibcon#[25=USB\r\n] 2006.229.18:29:16.50#ibcon#*before write, iclass 7, count 0 2006.229.18:29:16.50#ibcon#enter sib2, iclass 7, count 0 2006.229.18:29:16.50#ibcon#flushed, iclass 7, count 0 2006.229.18:29:16.50#ibcon#about to write, iclass 7, count 0 2006.229.18:29:16.50#ibcon#wrote, iclass 7, count 0 2006.229.18:29:16.50#ibcon#about to read 3, iclass 7, count 0 2006.229.18:29:16.53#ibcon#read 3, iclass 7, count 0 2006.229.18:29:16.53#ibcon#about to read 4, iclass 7, count 0 2006.229.18:29:16.53#ibcon#read 4, iclass 7, count 0 2006.229.18:29:16.53#ibcon#about to read 5, iclass 7, count 0 2006.229.18:29:16.53#ibcon#read 5, iclass 7, count 0 2006.229.18:29:16.53#ibcon#about to read 6, iclass 7, count 0 2006.229.18:29:16.53#ibcon#read 6, iclass 7, count 0 2006.229.18:29:16.53#ibcon#end of sib2, iclass 7, count 0 2006.229.18:29:16.53#ibcon#*after write, iclass 7, count 0 2006.229.18:29:16.53#ibcon#*before return 0, iclass 7, count 0 2006.229.18:29:16.53#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:16.53#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:16.53#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:29:16.53#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:29:16.53$vck44/valo=2,534.99 2006.229.18:29:16.53#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.18:29:16.53#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.18:29:16.53#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:16.53#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:16.53#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:16.53#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:16.53#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:29:16.53#ibcon#first serial, iclass 11, count 0 2006.229.18:29:16.53#ibcon#enter sib2, iclass 11, count 0 2006.229.18:29:16.53#ibcon#flushed, iclass 11, count 0 2006.229.18:29:16.53#ibcon#about to write, iclass 11, count 0 2006.229.18:29:16.53#ibcon#wrote, iclass 11, count 0 2006.229.18:29:16.53#ibcon#about to read 3, iclass 11, count 0 2006.229.18:29:16.55#ibcon#read 3, iclass 11, count 0 2006.229.18:29:16.55#ibcon#about to read 4, iclass 11, count 0 2006.229.18:29:16.55#ibcon#read 4, iclass 11, count 0 2006.229.18:29:16.55#ibcon#about to read 5, iclass 11, count 0 2006.229.18:29:16.55#ibcon#read 5, iclass 11, count 0 2006.229.18:29:16.55#ibcon#about to read 6, iclass 11, count 0 2006.229.18:29:16.55#ibcon#read 6, iclass 11, count 0 2006.229.18:29:16.55#ibcon#end of sib2, iclass 11, count 0 2006.229.18:29:16.55#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:29:16.55#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:29:16.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:29:16.55#ibcon#*before write, iclass 11, count 0 2006.229.18:29:16.55#ibcon#enter sib2, iclass 11, count 0 2006.229.18:29:16.55#ibcon#flushed, iclass 11, count 0 2006.229.18:29:16.55#ibcon#about to write, iclass 11, count 0 2006.229.18:29:16.55#ibcon#wrote, iclass 11, count 0 2006.229.18:29:16.55#ibcon#about to read 3, iclass 11, count 0 2006.229.18:29:16.59#ibcon#read 3, iclass 11, count 0 2006.229.18:29:16.59#ibcon#about to read 4, iclass 11, count 0 2006.229.18:29:16.59#ibcon#read 4, iclass 11, count 0 2006.229.18:29:16.59#ibcon#about to read 5, iclass 11, count 0 2006.229.18:29:16.59#ibcon#read 5, iclass 11, count 0 2006.229.18:29:16.59#ibcon#about to read 6, iclass 11, count 0 2006.229.18:29:16.59#ibcon#read 6, iclass 11, count 0 2006.229.18:29:16.59#ibcon#end of sib2, iclass 11, count 0 2006.229.18:29:16.59#ibcon#*after write, iclass 11, count 0 2006.229.18:29:16.59#ibcon#*before return 0, iclass 11, count 0 2006.229.18:29:16.59#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:16.59#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:16.59#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:29:16.59#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:29:16.59$vck44/va=2,7 2006.229.18:29:16.59#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.18:29:16.59#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.18:29:16.59#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:16.59#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:16.65#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:16.65#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:16.65#ibcon#enter wrdev, iclass 13, count 2 2006.229.18:29:16.65#ibcon#first serial, iclass 13, count 2 2006.229.18:29:16.65#ibcon#enter sib2, iclass 13, count 2 2006.229.18:29:16.65#ibcon#flushed, iclass 13, count 2 2006.229.18:29:16.65#ibcon#about to write, iclass 13, count 2 2006.229.18:29:16.65#ibcon#wrote, iclass 13, count 2 2006.229.18:29:16.65#ibcon#about to read 3, iclass 13, count 2 2006.229.18:29:16.67#ibcon#read 3, iclass 13, count 2 2006.229.18:29:16.67#ibcon#about to read 4, iclass 13, count 2 2006.229.18:29:16.67#ibcon#read 4, iclass 13, count 2 2006.229.18:29:16.67#ibcon#about to read 5, iclass 13, count 2 2006.229.18:29:16.67#ibcon#read 5, iclass 13, count 2 2006.229.18:29:16.67#ibcon#about to read 6, iclass 13, count 2 2006.229.18:29:16.67#ibcon#read 6, iclass 13, count 2 2006.229.18:29:16.67#ibcon#end of sib2, iclass 13, count 2 2006.229.18:29:16.67#ibcon#*mode == 0, iclass 13, count 2 2006.229.18:29:16.67#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.18:29:16.67#ibcon#[25=AT02-07\r\n] 2006.229.18:29:16.67#ibcon#*before write, iclass 13, count 2 2006.229.18:29:16.67#ibcon#enter sib2, iclass 13, count 2 2006.229.18:29:16.67#ibcon#flushed, iclass 13, count 2 2006.229.18:29:16.67#ibcon#about to write, iclass 13, count 2 2006.229.18:29:16.67#ibcon#wrote, iclass 13, count 2 2006.229.18:29:16.67#ibcon#about to read 3, iclass 13, count 2 2006.229.18:29:16.70#ibcon#read 3, iclass 13, count 2 2006.229.18:29:16.70#ibcon#about to read 4, iclass 13, count 2 2006.229.18:29:16.70#ibcon#read 4, iclass 13, count 2 2006.229.18:29:16.70#ibcon#about to read 5, iclass 13, count 2 2006.229.18:29:16.70#ibcon#read 5, iclass 13, count 2 2006.229.18:29:16.70#ibcon#about to read 6, iclass 13, count 2 2006.229.18:29:16.70#ibcon#read 6, iclass 13, count 2 2006.229.18:29:16.70#ibcon#end of sib2, iclass 13, count 2 2006.229.18:29:16.70#ibcon#*after write, iclass 13, count 2 2006.229.18:29:16.70#ibcon#*before return 0, iclass 13, count 2 2006.229.18:29:16.70#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:16.70#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:16.70#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.18:29:16.70#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:16.70#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:16.82#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:16.82#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:16.82#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:29:16.82#ibcon#first serial, iclass 13, count 0 2006.229.18:29:16.82#ibcon#enter sib2, iclass 13, count 0 2006.229.18:29:16.82#ibcon#flushed, iclass 13, count 0 2006.229.18:29:16.82#ibcon#about to write, iclass 13, count 0 2006.229.18:29:16.82#ibcon#wrote, iclass 13, count 0 2006.229.18:29:16.82#ibcon#about to read 3, iclass 13, count 0 2006.229.18:29:16.84#ibcon#read 3, iclass 13, count 0 2006.229.18:29:16.84#ibcon#about to read 4, iclass 13, count 0 2006.229.18:29:16.84#ibcon#read 4, iclass 13, count 0 2006.229.18:29:16.84#ibcon#about to read 5, iclass 13, count 0 2006.229.18:29:16.84#ibcon#read 5, iclass 13, count 0 2006.229.18:29:16.84#ibcon#about to read 6, iclass 13, count 0 2006.229.18:29:16.84#ibcon#read 6, iclass 13, count 0 2006.229.18:29:16.84#ibcon#end of sib2, iclass 13, count 0 2006.229.18:29:16.84#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:29:16.84#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:29:16.84#ibcon#[25=USB\r\n] 2006.229.18:29:16.84#ibcon#*before write, iclass 13, count 0 2006.229.18:29:16.84#ibcon#enter sib2, iclass 13, count 0 2006.229.18:29:16.84#ibcon#flushed, iclass 13, count 0 2006.229.18:29:16.84#ibcon#about to write, iclass 13, count 0 2006.229.18:29:16.84#ibcon#wrote, iclass 13, count 0 2006.229.18:29:16.84#ibcon#about to read 3, iclass 13, count 0 2006.229.18:29:16.87#ibcon#read 3, iclass 13, count 0 2006.229.18:29:16.87#ibcon#about to read 4, iclass 13, count 0 2006.229.18:29:16.87#ibcon#read 4, iclass 13, count 0 2006.229.18:29:16.87#ibcon#about to read 5, iclass 13, count 0 2006.229.18:29:16.87#ibcon#read 5, iclass 13, count 0 2006.229.18:29:16.87#ibcon#about to read 6, iclass 13, count 0 2006.229.18:29:16.87#ibcon#read 6, iclass 13, count 0 2006.229.18:29:16.87#ibcon#end of sib2, iclass 13, count 0 2006.229.18:29:16.87#ibcon#*after write, iclass 13, count 0 2006.229.18:29:16.87#ibcon#*before return 0, iclass 13, count 0 2006.229.18:29:16.87#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:16.87#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:16.87#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:29:16.87#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:29:16.87$vck44/valo=3,564.99 2006.229.18:29:16.87#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.18:29:16.87#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.18:29:16.87#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:16.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:16.87#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:16.87#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:16.87#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:29:16.87#ibcon#first serial, iclass 15, count 0 2006.229.18:29:16.87#ibcon#enter sib2, iclass 15, count 0 2006.229.18:29:16.87#ibcon#flushed, iclass 15, count 0 2006.229.18:29:16.87#ibcon#about to write, iclass 15, count 0 2006.229.18:29:16.87#ibcon#wrote, iclass 15, count 0 2006.229.18:29:16.87#ibcon#about to read 3, iclass 15, count 0 2006.229.18:29:16.89#ibcon#read 3, iclass 15, count 0 2006.229.18:29:16.89#ibcon#about to read 4, iclass 15, count 0 2006.229.18:29:16.89#ibcon#read 4, iclass 15, count 0 2006.229.18:29:16.89#ibcon#about to read 5, iclass 15, count 0 2006.229.18:29:16.89#ibcon#read 5, iclass 15, count 0 2006.229.18:29:16.89#ibcon#about to read 6, iclass 15, count 0 2006.229.18:29:16.89#ibcon#read 6, iclass 15, count 0 2006.229.18:29:16.89#ibcon#end of sib2, iclass 15, count 0 2006.229.18:29:16.89#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:29:16.89#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:29:16.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:29:16.89#ibcon#*before write, iclass 15, count 0 2006.229.18:29:16.89#ibcon#enter sib2, iclass 15, count 0 2006.229.18:29:16.89#ibcon#flushed, iclass 15, count 0 2006.229.18:29:16.89#ibcon#about to write, iclass 15, count 0 2006.229.18:29:16.89#ibcon#wrote, iclass 15, count 0 2006.229.18:29:16.89#ibcon#about to read 3, iclass 15, count 0 2006.229.18:29:16.93#ibcon#read 3, iclass 15, count 0 2006.229.18:29:16.93#ibcon#about to read 4, iclass 15, count 0 2006.229.18:29:16.93#ibcon#read 4, iclass 15, count 0 2006.229.18:29:16.93#ibcon#about to read 5, iclass 15, count 0 2006.229.18:29:16.93#ibcon#read 5, iclass 15, count 0 2006.229.18:29:16.93#ibcon#about to read 6, iclass 15, count 0 2006.229.18:29:16.93#ibcon#read 6, iclass 15, count 0 2006.229.18:29:16.93#ibcon#end of sib2, iclass 15, count 0 2006.229.18:29:16.93#ibcon#*after write, iclass 15, count 0 2006.229.18:29:16.93#ibcon#*before return 0, iclass 15, count 0 2006.229.18:29:16.93#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:16.93#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:16.93#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:29:16.93#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:29:16.93$vck44/va=3,6 2006.229.18:29:16.93#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.18:29:16.93#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.18:29:16.93#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:16.93#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:16.99#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:16.99#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:16.99#ibcon#enter wrdev, iclass 17, count 2 2006.229.18:29:16.99#ibcon#first serial, iclass 17, count 2 2006.229.18:29:16.99#ibcon#enter sib2, iclass 17, count 2 2006.229.18:29:16.99#ibcon#flushed, iclass 17, count 2 2006.229.18:29:16.99#ibcon#about to write, iclass 17, count 2 2006.229.18:29:16.99#ibcon#wrote, iclass 17, count 2 2006.229.18:29:16.99#ibcon#about to read 3, iclass 17, count 2 2006.229.18:29:17.01#ibcon#read 3, iclass 17, count 2 2006.229.18:29:17.01#ibcon#about to read 4, iclass 17, count 2 2006.229.18:29:17.01#ibcon#read 4, iclass 17, count 2 2006.229.18:29:17.01#ibcon#about to read 5, iclass 17, count 2 2006.229.18:29:17.01#ibcon#read 5, iclass 17, count 2 2006.229.18:29:17.01#ibcon#about to read 6, iclass 17, count 2 2006.229.18:29:17.01#ibcon#read 6, iclass 17, count 2 2006.229.18:29:17.01#ibcon#end of sib2, iclass 17, count 2 2006.229.18:29:17.01#ibcon#*mode == 0, iclass 17, count 2 2006.229.18:29:17.01#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.18:29:17.01#ibcon#[25=AT03-06\r\n] 2006.229.18:29:17.01#ibcon#*before write, iclass 17, count 2 2006.229.18:29:17.01#ibcon#enter sib2, iclass 17, count 2 2006.229.18:29:17.01#ibcon#flushed, iclass 17, count 2 2006.229.18:29:17.01#ibcon#about to write, iclass 17, count 2 2006.229.18:29:17.01#ibcon#wrote, iclass 17, count 2 2006.229.18:29:17.01#ibcon#about to read 3, iclass 17, count 2 2006.229.18:29:17.04#ibcon#read 3, iclass 17, count 2 2006.229.18:29:17.04#ibcon#about to read 4, iclass 17, count 2 2006.229.18:29:17.04#ibcon#read 4, iclass 17, count 2 2006.229.18:29:17.04#ibcon#about to read 5, iclass 17, count 2 2006.229.18:29:17.04#ibcon#read 5, iclass 17, count 2 2006.229.18:29:17.04#ibcon#about to read 6, iclass 17, count 2 2006.229.18:29:17.04#ibcon#read 6, iclass 17, count 2 2006.229.18:29:17.04#ibcon#end of sib2, iclass 17, count 2 2006.229.18:29:17.04#ibcon#*after write, iclass 17, count 2 2006.229.18:29:17.04#ibcon#*before return 0, iclass 17, count 2 2006.229.18:29:17.04#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:17.04#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:17.04#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.18:29:17.04#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:17.04#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:17.16#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:17.16#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:17.16#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:29:17.16#ibcon#first serial, iclass 17, count 0 2006.229.18:29:17.16#ibcon#enter sib2, iclass 17, count 0 2006.229.18:29:17.16#ibcon#flushed, iclass 17, count 0 2006.229.18:29:17.16#ibcon#about to write, iclass 17, count 0 2006.229.18:29:17.16#ibcon#wrote, iclass 17, count 0 2006.229.18:29:17.16#ibcon#about to read 3, iclass 17, count 0 2006.229.18:29:17.18#ibcon#read 3, iclass 17, count 0 2006.229.18:29:17.18#ibcon#about to read 4, iclass 17, count 0 2006.229.18:29:17.18#ibcon#read 4, iclass 17, count 0 2006.229.18:29:17.18#ibcon#about to read 5, iclass 17, count 0 2006.229.18:29:17.18#ibcon#read 5, iclass 17, count 0 2006.229.18:29:17.18#ibcon#about to read 6, iclass 17, count 0 2006.229.18:29:17.18#ibcon#read 6, iclass 17, count 0 2006.229.18:29:17.18#ibcon#end of sib2, iclass 17, count 0 2006.229.18:29:17.18#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:29:17.18#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:29:17.18#ibcon#[25=USB\r\n] 2006.229.18:29:17.18#ibcon#*before write, iclass 17, count 0 2006.229.18:29:17.18#ibcon#enter sib2, iclass 17, count 0 2006.229.18:29:17.18#ibcon#flushed, iclass 17, count 0 2006.229.18:29:17.18#ibcon#about to write, iclass 17, count 0 2006.229.18:29:17.18#ibcon#wrote, iclass 17, count 0 2006.229.18:29:17.18#ibcon#about to read 3, iclass 17, count 0 2006.229.18:29:17.21#ibcon#read 3, iclass 17, count 0 2006.229.18:29:17.21#ibcon#about to read 4, iclass 17, count 0 2006.229.18:29:17.21#ibcon#read 4, iclass 17, count 0 2006.229.18:29:17.21#ibcon#about to read 5, iclass 17, count 0 2006.229.18:29:17.21#ibcon#read 5, iclass 17, count 0 2006.229.18:29:17.21#ibcon#about to read 6, iclass 17, count 0 2006.229.18:29:17.21#ibcon#read 6, iclass 17, count 0 2006.229.18:29:17.21#ibcon#end of sib2, iclass 17, count 0 2006.229.18:29:17.21#ibcon#*after write, iclass 17, count 0 2006.229.18:29:17.21#ibcon#*before return 0, iclass 17, count 0 2006.229.18:29:17.21#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:17.21#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:17.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:29:17.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:29:17.21$vck44/valo=4,624.99 2006.229.18:29:17.21#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.18:29:17.21#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.18:29:17.21#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:17.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:17.21#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:17.21#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:17.21#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:29:17.21#ibcon#first serial, iclass 19, count 0 2006.229.18:29:17.21#ibcon#enter sib2, iclass 19, count 0 2006.229.18:29:17.21#ibcon#flushed, iclass 19, count 0 2006.229.18:29:17.21#ibcon#about to write, iclass 19, count 0 2006.229.18:29:17.21#ibcon#wrote, iclass 19, count 0 2006.229.18:29:17.21#ibcon#about to read 3, iclass 19, count 0 2006.229.18:29:17.23#ibcon#read 3, iclass 19, count 0 2006.229.18:29:17.23#ibcon#about to read 4, iclass 19, count 0 2006.229.18:29:17.23#ibcon#read 4, iclass 19, count 0 2006.229.18:29:17.23#ibcon#about to read 5, iclass 19, count 0 2006.229.18:29:17.23#ibcon#read 5, iclass 19, count 0 2006.229.18:29:17.23#ibcon#about to read 6, iclass 19, count 0 2006.229.18:29:17.23#ibcon#read 6, iclass 19, count 0 2006.229.18:29:17.23#ibcon#end of sib2, iclass 19, count 0 2006.229.18:29:17.23#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:29:17.23#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:29:17.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:29:17.23#ibcon#*before write, iclass 19, count 0 2006.229.18:29:17.23#ibcon#enter sib2, iclass 19, count 0 2006.229.18:29:17.23#ibcon#flushed, iclass 19, count 0 2006.229.18:29:17.23#ibcon#about to write, iclass 19, count 0 2006.229.18:29:17.23#ibcon#wrote, iclass 19, count 0 2006.229.18:29:17.23#ibcon#about to read 3, iclass 19, count 0 2006.229.18:29:17.27#ibcon#read 3, iclass 19, count 0 2006.229.18:29:17.27#ibcon#about to read 4, iclass 19, count 0 2006.229.18:29:17.27#ibcon#read 4, iclass 19, count 0 2006.229.18:29:17.27#ibcon#about to read 5, iclass 19, count 0 2006.229.18:29:17.27#ibcon#read 5, iclass 19, count 0 2006.229.18:29:17.27#ibcon#about to read 6, iclass 19, count 0 2006.229.18:29:17.27#ibcon#read 6, iclass 19, count 0 2006.229.18:29:17.27#ibcon#end of sib2, iclass 19, count 0 2006.229.18:29:17.27#ibcon#*after write, iclass 19, count 0 2006.229.18:29:17.27#ibcon#*before return 0, iclass 19, count 0 2006.229.18:29:17.27#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:17.27#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:17.27#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:29:17.27#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:29:17.27$vck44/va=4,7 2006.229.18:29:17.27#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.18:29:17.27#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.18:29:17.27#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:17.27#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:17.33#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:17.33#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:17.33#ibcon#enter wrdev, iclass 21, count 2 2006.229.18:29:17.33#ibcon#first serial, iclass 21, count 2 2006.229.18:29:17.33#ibcon#enter sib2, iclass 21, count 2 2006.229.18:29:17.33#ibcon#flushed, iclass 21, count 2 2006.229.18:29:17.33#ibcon#about to write, iclass 21, count 2 2006.229.18:29:17.33#ibcon#wrote, iclass 21, count 2 2006.229.18:29:17.33#ibcon#about to read 3, iclass 21, count 2 2006.229.18:29:17.35#ibcon#read 3, iclass 21, count 2 2006.229.18:29:17.35#ibcon#about to read 4, iclass 21, count 2 2006.229.18:29:17.35#ibcon#read 4, iclass 21, count 2 2006.229.18:29:17.35#ibcon#about to read 5, iclass 21, count 2 2006.229.18:29:17.35#ibcon#read 5, iclass 21, count 2 2006.229.18:29:17.35#ibcon#about to read 6, iclass 21, count 2 2006.229.18:29:17.35#ibcon#read 6, iclass 21, count 2 2006.229.18:29:17.35#ibcon#end of sib2, iclass 21, count 2 2006.229.18:29:17.35#ibcon#*mode == 0, iclass 21, count 2 2006.229.18:29:17.35#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.18:29:17.35#ibcon#[25=AT04-07\r\n] 2006.229.18:29:17.35#ibcon#*before write, iclass 21, count 2 2006.229.18:29:17.35#ibcon#enter sib2, iclass 21, count 2 2006.229.18:29:17.35#ibcon#flushed, iclass 21, count 2 2006.229.18:29:17.35#ibcon#about to write, iclass 21, count 2 2006.229.18:29:17.35#ibcon#wrote, iclass 21, count 2 2006.229.18:29:17.35#ibcon#about to read 3, iclass 21, count 2 2006.229.18:29:17.38#ibcon#read 3, iclass 21, count 2 2006.229.18:29:17.38#ibcon#about to read 4, iclass 21, count 2 2006.229.18:29:17.38#ibcon#read 4, iclass 21, count 2 2006.229.18:29:17.38#ibcon#about to read 5, iclass 21, count 2 2006.229.18:29:17.38#ibcon#read 5, iclass 21, count 2 2006.229.18:29:17.38#ibcon#about to read 6, iclass 21, count 2 2006.229.18:29:17.38#ibcon#read 6, iclass 21, count 2 2006.229.18:29:17.38#ibcon#end of sib2, iclass 21, count 2 2006.229.18:29:17.38#ibcon#*after write, iclass 21, count 2 2006.229.18:29:17.38#ibcon#*before return 0, iclass 21, count 2 2006.229.18:29:17.38#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:17.38#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:17.38#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.18:29:17.38#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:17.38#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:17.50#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:17.50#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:17.50#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:29:17.50#ibcon#first serial, iclass 21, count 0 2006.229.18:29:17.50#ibcon#enter sib2, iclass 21, count 0 2006.229.18:29:17.50#ibcon#flushed, iclass 21, count 0 2006.229.18:29:17.50#ibcon#about to write, iclass 21, count 0 2006.229.18:29:17.50#ibcon#wrote, iclass 21, count 0 2006.229.18:29:17.50#ibcon#about to read 3, iclass 21, count 0 2006.229.18:29:17.52#ibcon#read 3, iclass 21, count 0 2006.229.18:29:17.52#ibcon#about to read 4, iclass 21, count 0 2006.229.18:29:17.52#ibcon#read 4, iclass 21, count 0 2006.229.18:29:17.52#ibcon#about to read 5, iclass 21, count 0 2006.229.18:29:17.52#ibcon#read 5, iclass 21, count 0 2006.229.18:29:17.52#ibcon#about to read 6, iclass 21, count 0 2006.229.18:29:17.52#ibcon#read 6, iclass 21, count 0 2006.229.18:29:17.52#ibcon#end of sib2, iclass 21, count 0 2006.229.18:29:17.52#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:29:17.52#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:29:17.52#ibcon#[25=USB\r\n] 2006.229.18:29:17.52#ibcon#*before write, iclass 21, count 0 2006.229.18:29:17.52#ibcon#enter sib2, iclass 21, count 0 2006.229.18:29:17.52#ibcon#flushed, iclass 21, count 0 2006.229.18:29:17.52#ibcon#about to write, iclass 21, count 0 2006.229.18:29:17.52#ibcon#wrote, iclass 21, count 0 2006.229.18:29:17.52#ibcon#about to read 3, iclass 21, count 0 2006.229.18:29:17.55#ibcon#read 3, iclass 21, count 0 2006.229.18:29:17.55#ibcon#about to read 4, iclass 21, count 0 2006.229.18:29:17.55#ibcon#read 4, iclass 21, count 0 2006.229.18:29:17.55#ibcon#about to read 5, iclass 21, count 0 2006.229.18:29:17.55#ibcon#read 5, iclass 21, count 0 2006.229.18:29:17.55#ibcon#about to read 6, iclass 21, count 0 2006.229.18:29:17.55#ibcon#read 6, iclass 21, count 0 2006.229.18:29:17.55#ibcon#end of sib2, iclass 21, count 0 2006.229.18:29:17.55#ibcon#*after write, iclass 21, count 0 2006.229.18:29:17.55#ibcon#*before return 0, iclass 21, count 0 2006.229.18:29:17.55#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:17.55#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:17.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:29:17.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:29:17.55$vck44/valo=5,734.99 2006.229.18:29:17.55#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.18:29:17.55#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.18:29:17.55#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:17.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:17.55#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:17.55#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:17.55#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:29:17.55#ibcon#first serial, iclass 23, count 0 2006.229.18:29:17.55#ibcon#enter sib2, iclass 23, count 0 2006.229.18:29:17.55#ibcon#flushed, iclass 23, count 0 2006.229.18:29:17.55#ibcon#about to write, iclass 23, count 0 2006.229.18:29:17.55#ibcon#wrote, iclass 23, count 0 2006.229.18:29:17.55#ibcon#about to read 3, iclass 23, count 0 2006.229.18:29:17.57#ibcon#read 3, iclass 23, count 0 2006.229.18:29:17.57#ibcon#about to read 4, iclass 23, count 0 2006.229.18:29:17.57#ibcon#read 4, iclass 23, count 0 2006.229.18:29:17.57#ibcon#about to read 5, iclass 23, count 0 2006.229.18:29:17.57#ibcon#read 5, iclass 23, count 0 2006.229.18:29:17.57#ibcon#about to read 6, iclass 23, count 0 2006.229.18:29:17.57#ibcon#read 6, iclass 23, count 0 2006.229.18:29:17.57#ibcon#end of sib2, iclass 23, count 0 2006.229.18:29:17.57#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:29:17.57#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:29:17.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:29:17.57#ibcon#*before write, iclass 23, count 0 2006.229.18:29:17.57#ibcon#enter sib2, iclass 23, count 0 2006.229.18:29:17.57#ibcon#flushed, iclass 23, count 0 2006.229.18:29:17.57#ibcon#about to write, iclass 23, count 0 2006.229.18:29:17.57#ibcon#wrote, iclass 23, count 0 2006.229.18:29:17.57#ibcon#about to read 3, iclass 23, count 0 2006.229.18:29:17.61#ibcon#read 3, iclass 23, count 0 2006.229.18:29:17.61#ibcon#about to read 4, iclass 23, count 0 2006.229.18:29:17.61#ibcon#read 4, iclass 23, count 0 2006.229.18:29:17.61#ibcon#about to read 5, iclass 23, count 0 2006.229.18:29:17.61#ibcon#read 5, iclass 23, count 0 2006.229.18:29:17.61#ibcon#about to read 6, iclass 23, count 0 2006.229.18:29:17.61#ibcon#read 6, iclass 23, count 0 2006.229.18:29:17.61#ibcon#end of sib2, iclass 23, count 0 2006.229.18:29:17.61#ibcon#*after write, iclass 23, count 0 2006.229.18:29:17.61#ibcon#*before return 0, iclass 23, count 0 2006.229.18:29:17.61#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:17.61#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:17.61#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:29:17.61#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:29:17.61$vck44/va=5,4 2006.229.18:29:17.61#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.18:29:17.61#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.18:29:17.61#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:17.61#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:17.67#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:17.67#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:17.67#ibcon#enter wrdev, iclass 25, count 2 2006.229.18:29:17.67#ibcon#first serial, iclass 25, count 2 2006.229.18:29:17.67#ibcon#enter sib2, iclass 25, count 2 2006.229.18:29:17.67#ibcon#flushed, iclass 25, count 2 2006.229.18:29:17.67#ibcon#about to write, iclass 25, count 2 2006.229.18:29:17.67#ibcon#wrote, iclass 25, count 2 2006.229.18:29:17.67#ibcon#about to read 3, iclass 25, count 2 2006.229.18:29:17.69#ibcon#read 3, iclass 25, count 2 2006.229.18:29:17.69#ibcon#about to read 4, iclass 25, count 2 2006.229.18:29:17.69#ibcon#read 4, iclass 25, count 2 2006.229.18:29:17.69#ibcon#about to read 5, iclass 25, count 2 2006.229.18:29:17.69#ibcon#read 5, iclass 25, count 2 2006.229.18:29:17.69#ibcon#about to read 6, iclass 25, count 2 2006.229.18:29:17.69#ibcon#read 6, iclass 25, count 2 2006.229.18:29:17.69#ibcon#end of sib2, iclass 25, count 2 2006.229.18:29:17.69#ibcon#*mode == 0, iclass 25, count 2 2006.229.18:29:17.69#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.18:29:17.69#ibcon#[25=AT05-04\r\n] 2006.229.18:29:17.69#ibcon#*before write, iclass 25, count 2 2006.229.18:29:17.69#ibcon#enter sib2, iclass 25, count 2 2006.229.18:29:17.69#ibcon#flushed, iclass 25, count 2 2006.229.18:29:17.69#ibcon#about to write, iclass 25, count 2 2006.229.18:29:17.69#ibcon#wrote, iclass 25, count 2 2006.229.18:29:17.69#ibcon#about to read 3, iclass 25, count 2 2006.229.18:29:17.72#ibcon#read 3, iclass 25, count 2 2006.229.18:29:17.72#ibcon#about to read 4, iclass 25, count 2 2006.229.18:29:17.72#ibcon#read 4, iclass 25, count 2 2006.229.18:29:17.72#ibcon#about to read 5, iclass 25, count 2 2006.229.18:29:17.72#ibcon#read 5, iclass 25, count 2 2006.229.18:29:17.72#ibcon#about to read 6, iclass 25, count 2 2006.229.18:29:17.72#ibcon#read 6, iclass 25, count 2 2006.229.18:29:17.72#ibcon#end of sib2, iclass 25, count 2 2006.229.18:29:17.72#ibcon#*after write, iclass 25, count 2 2006.229.18:29:17.72#ibcon#*before return 0, iclass 25, count 2 2006.229.18:29:17.72#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:17.72#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:17.72#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.18:29:17.72#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:17.72#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:17.84#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:17.84#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:17.84#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:29:17.84#ibcon#first serial, iclass 25, count 0 2006.229.18:29:17.84#ibcon#enter sib2, iclass 25, count 0 2006.229.18:29:17.84#ibcon#flushed, iclass 25, count 0 2006.229.18:29:17.84#ibcon#about to write, iclass 25, count 0 2006.229.18:29:17.84#ibcon#wrote, iclass 25, count 0 2006.229.18:29:17.84#ibcon#about to read 3, iclass 25, count 0 2006.229.18:29:17.86#ibcon#read 3, iclass 25, count 0 2006.229.18:29:17.86#ibcon#about to read 4, iclass 25, count 0 2006.229.18:29:17.86#ibcon#read 4, iclass 25, count 0 2006.229.18:29:17.86#ibcon#about to read 5, iclass 25, count 0 2006.229.18:29:17.86#ibcon#read 5, iclass 25, count 0 2006.229.18:29:17.86#ibcon#about to read 6, iclass 25, count 0 2006.229.18:29:17.86#ibcon#read 6, iclass 25, count 0 2006.229.18:29:17.86#ibcon#end of sib2, iclass 25, count 0 2006.229.18:29:17.86#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:29:17.86#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:29:17.86#ibcon#[25=USB\r\n] 2006.229.18:29:17.86#ibcon#*before write, iclass 25, count 0 2006.229.18:29:17.86#ibcon#enter sib2, iclass 25, count 0 2006.229.18:29:17.86#ibcon#flushed, iclass 25, count 0 2006.229.18:29:17.86#ibcon#about to write, iclass 25, count 0 2006.229.18:29:17.86#ibcon#wrote, iclass 25, count 0 2006.229.18:29:17.86#ibcon#about to read 3, iclass 25, count 0 2006.229.18:29:17.89#ibcon#read 3, iclass 25, count 0 2006.229.18:29:17.89#ibcon#about to read 4, iclass 25, count 0 2006.229.18:29:17.89#ibcon#read 4, iclass 25, count 0 2006.229.18:29:17.89#ibcon#about to read 5, iclass 25, count 0 2006.229.18:29:17.89#ibcon#read 5, iclass 25, count 0 2006.229.18:29:17.89#ibcon#about to read 6, iclass 25, count 0 2006.229.18:29:17.89#ibcon#read 6, iclass 25, count 0 2006.229.18:29:17.89#ibcon#end of sib2, iclass 25, count 0 2006.229.18:29:17.89#ibcon#*after write, iclass 25, count 0 2006.229.18:29:17.89#ibcon#*before return 0, iclass 25, count 0 2006.229.18:29:17.89#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:17.89#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:17.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:29:17.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:29:17.89$vck44/valo=6,814.99 2006.229.18:29:17.89#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.18:29:17.89#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.18:29:17.89#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:17.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:17.89#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:17.89#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:17.89#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:29:17.89#ibcon#first serial, iclass 27, count 0 2006.229.18:29:17.89#ibcon#enter sib2, iclass 27, count 0 2006.229.18:29:17.89#ibcon#flushed, iclass 27, count 0 2006.229.18:29:17.89#ibcon#about to write, iclass 27, count 0 2006.229.18:29:17.89#ibcon#wrote, iclass 27, count 0 2006.229.18:29:17.89#ibcon#about to read 3, iclass 27, count 0 2006.229.18:29:17.91#ibcon#read 3, iclass 27, count 0 2006.229.18:29:17.91#ibcon#about to read 4, iclass 27, count 0 2006.229.18:29:17.91#ibcon#read 4, iclass 27, count 0 2006.229.18:29:17.91#ibcon#about to read 5, iclass 27, count 0 2006.229.18:29:17.91#ibcon#read 5, iclass 27, count 0 2006.229.18:29:17.91#ibcon#about to read 6, iclass 27, count 0 2006.229.18:29:17.91#ibcon#read 6, iclass 27, count 0 2006.229.18:29:17.91#ibcon#end of sib2, iclass 27, count 0 2006.229.18:29:17.91#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:29:17.91#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:29:17.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:29:17.91#ibcon#*before write, iclass 27, count 0 2006.229.18:29:17.91#ibcon#enter sib2, iclass 27, count 0 2006.229.18:29:17.91#ibcon#flushed, iclass 27, count 0 2006.229.18:29:17.91#ibcon#about to write, iclass 27, count 0 2006.229.18:29:17.91#ibcon#wrote, iclass 27, count 0 2006.229.18:29:17.91#ibcon#about to read 3, iclass 27, count 0 2006.229.18:29:17.95#ibcon#read 3, iclass 27, count 0 2006.229.18:29:17.95#ibcon#about to read 4, iclass 27, count 0 2006.229.18:29:17.95#ibcon#read 4, iclass 27, count 0 2006.229.18:29:17.95#ibcon#about to read 5, iclass 27, count 0 2006.229.18:29:17.95#ibcon#read 5, iclass 27, count 0 2006.229.18:29:17.95#ibcon#about to read 6, iclass 27, count 0 2006.229.18:29:17.95#ibcon#read 6, iclass 27, count 0 2006.229.18:29:17.95#ibcon#end of sib2, iclass 27, count 0 2006.229.18:29:17.95#ibcon#*after write, iclass 27, count 0 2006.229.18:29:17.95#ibcon#*before return 0, iclass 27, count 0 2006.229.18:29:17.95#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:17.95#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:17.95#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:29:17.95#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:29:17.95$vck44/va=6,4 2006.229.18:29:17.95#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.18:29:17.95#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.18:29:17.95#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:17.95#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:18.01#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:18.01#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:18.01#ibcon#enter wrdev, iclass 29, count 2 2006.229.18:29:18.01#ibcon#first serial, iclass 29, count 2 2006.229.18:29:18.01#ibcon#enter sib2, iclass 29, count 2 2006.229.18:29:18.01#ibcon#flushed, iclass 29, count 2 2006.229.18:29:18.01#ibcon#about to write, iclass 29, count 2 2006.229.18:29:18.01#ibcon#wrote, iclass 29, count 2 2006.229.18:29:18.01#ibcon#about to read 3, iclass 29, count 2 2006.229.18:29:18.03#ibcon#read 3, iclass 29, count 2 2006.229.18:29:18.03#ibcon#about to read 4, iclass 29, count 2 2006.229.18:29:18.03#ibcon#read 4, iclass 29, count 2 2006.229.18:29:18.03#ibcon#about to read 5, iclass 29, count 2 2006.229.18:29:18.03#ibcon#read 5, iclass 29, count 2 2006.229.18:29:18.03#ibcon#about to read 6, iclass 29, count 2 2006.229.18:29:18.03#ibcon#read 6, iclass 29, count 2 2006.229.18:29:18.03#ibcon#end of sib2, iclass 29, count 2 2006.229.18:29:18.03#ibcon#*mode == 0, iclass 29, count 2 2006.229.18:29:18.03#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.18:29:18.03#ibcon#[25=AT06-04\r\n] 2006.229.18:29:18.03#ibcon#*before write, iclass 29, count 2 2006.229.18:29:18.03#ibcon#enter sib2, iclass 29, count 2 2006.229.18:29:18.03#ibcon#flushed, iclass 29, count 2 2006.229.18:29:18.03#ibcon#about to write, iclass 29, count 2 2006.229.18:29:18.03#ibcon#wrote, iclass 29, count 2 2006.229.18:29:18.03#ibcon#about to read 3, iclass 29, count 2 2006.229.18:29:18.06#ibcon#read 3, iclass 29, count 2 2006.229.18:29:18.06#ibcon#about to read 4, iclass 29, count 2 2006.229.18:29:18.06#ibcon#read 4, iclass 29, count 2 2006.229.18:29:18.06#ibcon#about to read 5, iclass 29, count 2 2006.229.18:29:18.06#ibcon#read 5, iclass 29, count 2 2006.229.18:29:18.06#ibcon#about to read 6, iclass 29, count 2 2006.229.18:29:18.06#ibcon#read 6, iclass 29, count 2 2006.229.18:29:18.06#ibcon#end of sib2, iclass 29, count 2 2006.229.18:29:18.06#ibcon#*after write, iclass 29, count 2 2006.229.18:29:18.06#ibcon#*before return 0, iclass 29, count 2 2006.229.18:29:18.06#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:18.06#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:18.06#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.18:29:18.06#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:18.06#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:18.18#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:18.18#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:18.18#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:29:18.18#ibcon#first serial, iclass 29, count 0 2006.229.18:29:18.18#ibcon#enter sib2, iclass 29, count 0 2006.229.18:29:18.18#ibcon#flushed, iclass 29, count 0 2006.229.18:29:18.18#ibcon#about to write, iclass 29, count 0 2006.229.18:29:18.18#ibcon#wrote, iclass 29, count 0 2006.229.18:29:18.18#ibcon#about to read 3, iclass 29, count 0 2006.229.18:29:18.20#ibcon#read 3, iclass 29, count 0 2006.229.18:29:18.20#ibcon#about to read 4, iclass 29, count 0 2006.229.18:29:18.20#ibcon#read 4, iclass 29, count 0 2006.229.18:29:18.20#ibcon#about to read 5, iclass 29, count 0 2006.229.18:29:18.20#ibcon#read 5, iclass 29, count 0 2006.229.18:29:18.20#ibcon#about to read 6, iclass 29, count 0 2006.229.18:29:18.20#ibcon#read 6, iclass 29, count 0 2006.229.18:29:18.20#ibcon#end of sib2, iclass 29, count 0 2006.229.18:29:18.20#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:29:18.20#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:29:18.20#ibcon#[25=USB\r\n] 2006.229.18:29:18.20#ibcon#*before write, iclass 29, count 0 2006.229.18:29:18.20#ibcon#enter sib2, iclass 29, count 0 2006.229.18:29:18.20#ibcon#flushed, iclass 29, count 0 2006.229.18:29:18.20#ibcon#about to write, iclass 29, count 0 2006.229.18:29:18.20#ibcon#wrote, iclass 29, count 0 2006.229.18:29:18.20#ibcon#about to read 3, iclass 29, count 0 2006.229.18:29:18.23#ibcon#read 3, iclass 29, count 0 2006.229.18:29:18.23#ibcon#about to read 4, iclass 29, count 0 2006.229.18:29:18.23#ibcon#read 4, iclass 29, count 0 2006.229.18:29:18.23#ibcon#about to read 5, iclass 29, count 0 2006.229.18:29:18.23#ibcon#read 5, iclass 29, count 0 2006.229.18:29:18.23#ibcon#about to read 6, iclass 29, count 0 2006.229.18:29:18.23#ibcon#read 6, iclass 29, count 0 2006.229.18:29:18.23#ibcon#end of sib2, iclass 29, count 0 2006.229.18:29:18.23#ibcon#*after write, iclass 29, count 0 2006.229.18:29:18.23#ibcon#*before return 0, iclass 29, count 0 2006.229.18:29:18.23#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:18.23#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:18.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:29:18.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:29:18.23$vck44/valo=7,864.99 2006.229.18:29:18.23#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.18:29:18.23#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.18:29:18.23#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:18.23#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:29:18.23#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:29:18.23#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:29:18.23#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:29:18.23#ibcon#first serial, iclass 31, count 0 2006.229.18:29:18.23#ibcon#enter sib2, iclass 31, count 0 2006.229.18:29:18.23#ibcon#flushed, iclass 31, count 0 2006.229.18:29:18.23#ibcon#about to write, iclass 31, count 0 2006.229.18:29:18.23#ibcon#wrote, iclass 31, count 0 2006.229.18:29:18.23#ibcon#about to read 3, iclass 31, count 0 2006.229.18:29:18.25#ibcon#read 3, iclass 31, count 0 2006.229.18:29:18.25#ibcon#about to read 4, iclass 31, count 0 2006.229.18:29:18.25#ibcon#read 4, iclass 31, count 0 2006.229.18:29:18.25#ibcon#about to read 5, iclass 31, count 0 2006.229.18:29:18.25#ibcon#read 5, iclass 31, count 0 2006.229.18:29:18.25#ibcon#about to read 6, iclass 31, count 0 2006.229.18:29:18.25#ibcon#read 6, iclass 31, count 0 2006.229.18:29:18.25#ibcon#end of sib2, iclass 31, count 0 2006.229.18:29:18.25#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:29:18.25#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:29:18.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:29:18.25#ibcon#*before write, iclass 31, count 0 2006.229.18:29:18.25#ibcon#enter sib2, iclass 31, count 0 2006.229.18:29:18.25#ibcon#flushed, iclass 31, count 0 2006.229.18:29:18.25#ibcon#about to write, iclass 31, count 0 2006.229.18:29:18.25#ibcon#wrote, iclass 31, count 0 2006.229.18:29:18.25#ibcon#about to read 3, iclass 31, count 0 2006.229.18:29:18.29#ibcon#read 3, iclass 31, count 0 2006.229.18:29:18.29#ibcon#about to read 4, iclass 31, count 0 2006.229.18:29:18.29#ibcon#read 4, iclass 31, count 0 2006.229.18:29:18.29#ibcon#about to read 5, iclass 31, count 0 2006.229.18:29:18.29#ibcon#read 5, iclass 31, count 0 2006.229.18:29:18.29#ibcon#about to read 6, iclass 31, count 0 2006.229.18:29:18.29#ibcon#read 6, iclass 31, count 0 2006.229.18:29:18.29#ibcon#end of sib2, iclass 31, count 0 2006.229.18:29:18.29#ibcon#*after write, iclass 31, count 0 2006.229.18:29:18.29#ibcon#*before return 0, iclass 31, count 0 2006.229.18:29:18.29#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:29:18.29#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.18:29:18.29#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:29:18.29#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:29:18.29$vck44/va=7,5 2006.229.18:29:18.29#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.18:29:18.29#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.18:29:18.29#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:18.29#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:29:18.35#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:29:18.35#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:29:18.35#ibcon#enter wrdev, iclass 33, count 2 2006.229.18:29:18.35#ibcon#first serial, iclass 33, count 2 2006.229.18:29:18.35#ibcon#enter sib2, iclass 33, count 2 2006.229.18:29:18.35#ibcon#flushed, iclass 33, count 2 2006.229.18:29:18.35#ibcon#about to write, iclass 33, count 2 2006.229.18:29:18.35#ibcon#wrote, iclass 33, count 2 2006.229.18:29:18.35#ibcon#about to read 3, iclass 33, count 2 2006.229.18:29:18.37#ibcon#read 3, iclass 33, count 2 2006.229.18:29:18.37#ibcon#about to read 4, iclass 33, count 2 2006.229.18:29:18.37#ibcon#read 4, iclass 33, count 2 2006.229.18:29:18.37#ibcon#about to read 5, iclass 33, count 2 2006.229.18:29:18.37#ibcon#read 5, iclass 33, count 2 2006.229.18:29:18.37#ibcon#about to read 6, iclass 33, count 2 2006.229.18:29:18.37#ibcon#read 6, iclass 33, count 2 2006.229.18:29:18.37#ibcon#end of sib2, iclass 33, count 2 2006.229.18:29:18.37#ibcon#*mode == 0, iclass 33, count 2 2006.229.18:29:18.37#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.18:29:18.37#ibcon#[25=AT07-05\r\n] 2006.229.18:29:18.37#ibcon#*before write, iclass 33, count 2 2006.229.18:29:18.37#ibcon#enter sib2, iclass 33, count 2 2006.229.18:29:18.37#ibcon#flushed, iclass 33, count 2 2006.229.18:29:18.37#ibcon#about to write, iclass 33, count 2 2006.229.18:29:18.37#ibcon#wrote, iclass 33, count 2 2006.229.18:29:18.37#ibcon#about to read 3, iclass 33, count 2 2006.229.18:29:18.40#ibcon#read 3, iclass 33, count 2 2006.229.18:29:18.40#ibcon#about to read 4, iclass 33, count 2 2006.229.18:29:18.40#ibcon#read 4, iclass 33, count 2 2006.229.18:29:18.40#ibcon#about to read 5, iclass 33, count 2 2006.229.18:29:18.40#ibcon#read 5, iclass 33, count 2 2006.229.18:29:18.40#ibcon#about to read 6, iclass 33, count 2 2006.229.18:29:18.40#ibcon#read 6, iclass 33, count 2 2006.229.18:29:18.40#ibcon#end of sib2, iclass 33, count 2 2006.229.18:29:18.40#ibcon#*after write, iclass 33, count 2 2006.229.18:29:18.40#ibcon#*before return 0, iclass 33, count 2 2006.229.18:29:18.40#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:29:18.40#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.18:29:18.40#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.18:29:18.40#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:18.40#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:29:18.52#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:29:18.52#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:29:18.52#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:29:18.52#ibcon#first serial, iclass 33, count 0 2006.229.18:29:18.52#ibcon#enter sib2, iclass 33, count 0 2006.229.18:29:18.52#ibcon#flushed, iclass 33, count 0 2006.229.18:29:18.52#ibcon#about to write, iclass 33, count 0 2006.229.18:29:18.52#ibcon#wrote, iclass 33, count 0 2006.229.18:29:18.52#ibcon#about to read 3, iclass 33, count 0 2006.229.18:29:18.54#ibcon#read 3, iclass 33, count 0 2006.229.18:29:18.54#ibcon#about to read 4, iclass 33, count 0 2006.229.18:29:18.54#ibcon#read 4, iclass 33, count 0 2006.229.18:29:18.54#ibcon#about to read 5, iclass 33, count 0 2006.229.18:29:18.54#ibcon#read 5, iclass 33, count 0 2006.229.18:29:18.54#ibcon#about to read 6, iclass 33, count 0 2006.229.18:29:18.54#ibcon#read 6, iclass 33, count 0 2006.229.18:29:18.54#ibcon#end of sib2, iclass 33, count 0 2006.229.18:29:18.54#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:29:18.54#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:29:18.54#ibcon#[25=USB\r\n] 2006.229.18:29:18.54#ibcon#*before write, iclass 33, count 0 2006.229.18:29:18.54#ibcon#enter sib2, iclass 33, count 0 2006.229.18:29:18.54#ibcon#flushed, iclass 33, count 0 2006.229.18:29:18.54#ibcon#about to write, iclass 33, count 0 2006.229.18:29:18.54#ibcon#wrote, iclass 33, count 0 2006.229.18:29:18.54#ibcon#about to read 3, iclass 33, count 0 2006.229.18:29:18.57#ibcon#read 3, iclass 33, count 0 2006.229.18:29:18.57#ibcon#about to read 4, iclass 33, count 0 2006.229.18:29:18.57#ibcon#read 4, iclass 33, count 0 2006.229.18:29:18.57#ibcon#about to read 5, iclass 33, count 0 2006.229.18:29:18.57#ibcon#read 5, iclass 33, count 0 2006.229.18:29:18.57#ibcon#about to read 6, iclass 33, count 0 2006.229.18:29:18.57#ibcon#read 6, iclass 33, count 0 2006.229.18:29:18.57#ibcon#end of sib2, iclass 33, count 0 2006.229.18:29:18.57#ibcon#*after write, iclass 33, count 0 2006.229.18:29:18.57#ibcon#*before return 0, iclass 33, count 0 2006.229.18:29:18.57#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:29:18.57#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.18:29:18.57#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:29:18.57#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:29:18.57$vck44/valo=8,884.99 2006.229.18:29:18.57#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.18:29:18.57#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.18:29:18.57#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:18.57#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:29:18.57#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:29:18.57#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:29:18.57#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:29:18.57#ibcon#first serial, iclass 35, count 0 2006.229.18:29:18.57#ibcon#enter sib2, iclass 35, count 0 2006.229.18:29:18.57#ibcon#flushed, iclass 35, count 0 2006.229.18:29:18.57#ibcon#about to write, iclass 35, count 0 2006.229.18:29:18.57#ibcon#wrote, iclass 35, count 0 2006.229.18:29:18.57#ibcon#about to read 3, iclass 35, count 0 2006.229.18:29:18.59#ibcon#read 3, iclass 35, count 0 2006.229.18:29:18.59#ibcon#about to read 4, iclass 35, count 0 2006.229.18:29:18.59#ibcon#read 4, iclass 35, count 0 2006.229.18:29:18.59#ibcon#about to read 5, iclass 35, count 0 2006.229.18:29:18.59#ibcon#read 5, iclass 35, count 0 2006.229.18:29:18.59#ibcon#about to read 6, iclass 35, count 0 2006.229.18:29:18.59#ibcon#read 6, iclass 35, count 0 2006.229.18:29:18.59#ibcon#end of sib2, iclass 35, count 0 2006.229.18:29:18.59#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:29:18.59#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:29:18.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:29:18.59#ibcon#*before write, iclass 35, count 0 2006.229.18:29:18.59#ibcon#enter sib2, iclass 35, count 0 2006.229.18:29:18.59#ibcon#flushed, iclass 35, count 0 2006.229.18:29:18.59#ibcon#about to write, iclass 35, count 0 2006.229.18:29:18.59#ibcon#wrote, iclass 35, count 0 2006.229.18:29:18.59#ibcon#about to read 3, iclass 35, count 0 2006.229.18:29:18.63#ibcon#read 3, iclass 35, count 0 2006.229.18:29:18.63#ibcon#about to read 4, iclass 35, count 0 2006.229.18:29:18.63#ibcon#read 4, iclass 35, count 0 2006.229.18:29:18.63#ibcon#about to read 5, iclass 35, count 0 2006.229.18:29:18.63#ibcon#read 5, iclass 35, count 0 2006.229.18:29:18.63#ibcon#about to read 6, iclass 35, count 0 2006.229.18:29:18.63#ibcon#read 6, iclass 35, count 0 2006.229.18:29:18.63#ibcon#end of sib2, iclass 35, count 0 2006.229.18:29:18.63#ibcon#*after write, iclass 35, count 0 2006.229.18:29:18.63#ibcon#*before return 0, iclass 35, count 0 2006.229.18:29:18.63#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:29:18.63#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.18:29:18.63#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:29:18.63#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:29:18.63$vck44/va=8,6 2006.229.18:29:18.63#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.18:29:18.63#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.18:29:18.63#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:18.63#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:29:18.69#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:29:18.69#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:29:18.69#ibcon#enter wrdev, iclass 37, count 2 2006.229.18:29:18.69#ibcon#first serial, iclass 37, count 2 2006.229.18:29:18.69#ibcon#enter sib2, iclass 37, count 2 2006.229.18:29:18.69#ibcon#flushed, iclass 37, count 2 2006.229.18:29:18.69#ibcon#about to write, iclass 37, count 2 2006.229.18:29:18.69#ibcon#wrote, iclass 37, count 2 2006.229.18:29:18.69#ibcon#about to read 3, iclass 37, count 2 2006.229.18:29:18.71#ibcon#read 3, iclass 37, count 2 2006.229.18:29:18.71#ibcon#about to read 4, iclass 37, count 2 2006.229.18:29:18.71#ibcon#read 4, iclass 37, count 2 2006.229.18:29:18.71#ibcon#about to read 5, iclass 37, count 2 2006.229.18:29:18.71#ibcon#read 5, iclass 37, count 2 2006.229.18:29:18.71#ibcon#about to read 6, iclass 37, count 2 2006.229.18:29:18.71#ibcon#read 6, iclass 37, count 2 2006.229.18:29:18.71#ibcon#end of sib2, iclass 37, count 2 2006.229.18:29:18.71#ibcon#*mode == 0, iclass 37, count 2 2006.229.18:29:18.71#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.18:29:18.71#ibcon#[25=AT08-06\r\n] 2006.229.18:29:18.71#ibcon#*before write, iclass 37, count 2 2006.229.18:29:18.71#ibcon#enter sib2, iclass 37, count 2 2006.229.18:29:18.71#ibcon#flushed, iclass 37, count 2 2006.229.18:29:18.71#ibcon#about to write, iclass 37, count 2 2006.229.18:29:18.71#ibcon#wrote, iclass 37, count 2 2006.229.18:29:18.71#ibcon#about to read 3, iclass 37, count 2 2006.229.18:29:18.74#ibcon#read 3, iclass 37, count 2 2006.229.18:29:18.74#ibcon#about to read 4, iclass 37, count 2 2006.229.18:29:18.74#ibcon#read 4, iclass 37, count 2 2006.229.18:29:18.74#ibcon#about to read 5, iclass 37, count 2 2006.229.18:29:18.74#ibcon#read 5, iclass 37, count 2 2006.229.18:29:18.74#ibcon#about to read 6, iclass 37, count 2 2006.229.18:29:18.74#ibcon#read 6, iclass 37, count 2 2006.229.18:29:18.74#ibcon#end of sib2, iclass 37, count 2 2006.229.18:29:18.74#ibcon#*after write, iclass 37, count 2 2006.229.18:29:18.74#ibcon#*before return 0, iclass 37, count 2 2006.229.18:29:18.74#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:29:18.74#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.18:29:18.74#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.18:29:18.74#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:18.74#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:29:18.86#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:29:18.86#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:29:18.86#ibcon#enter wrdev, iclass 37, count 0 2006.229.18:29:18.86#ibcon#first serial, iclass 37, count 0 2006.229.18:29:18.86#ibcon#enter sib2, iclass 37, count 0 2006.229.18:29:18.86#ibcon#flushed, iclass 37, count 0 2006.229.18:29:18.86#ibcon#about to write, iclass 37, count 0 2006.229.18:29:18.86#ibcon#wrote, iclass 37, count 0 2006.229.18:29:18.86#ibcon#about to read 3, iclass 37, count 0 2006.229.18:29:18.88#ibcon#read 3, iclass 37, count 0 2006.229.18:29:18.88#ibcon#about to read 4, iclass 37, count 0 2006.229.18:29:18.88#ibcon#read 4, iclass 37, count 0 2006.229.18:29:18.88#ibcon#about to read 5, iclass 37, count 0 2006.229.18:29:18.88#ibcon#read 5, iclass 37, count 0 2006.229.18:29:18.88#ibcon#about to read 6, iclass 37, count 0 2006.229.18:29:18.88#ibcon#read 6, iclass 37, count 0 2006.229.18:29:18.88#ibcon#end of sib2, iclass 37, count 0 2006.229.18:29:18.88#ibcon#*mode == 0, iclass 37, count 0 2006.229.18:29:18.88#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.18:29:18.88#ibcon#[25=USB\r\n] 2006.229.18:29:18.88#ibcon#*before write, iclass 37, count 0 2006.229.18:29:18.88#ibcon#enter sib2, iclass 37, count 0 2006.229.18:29:18.88#ibcon#flushed, iclass 37, count 0 2006.229.18:29:18.88#ibcon#about to write, iclass 37, count 0 2006.229.18:29:18.88#ibcon#wrote, iclass 37, count 0 2006.229.18:29:18.88#ibcon#about to read 3, iclass 37, count 0 2006.229.18:29:18.91#ibcon#read 3, iclass 37, count 0 2006.229.18:29:18.91#ibcon#about to read 4, iclass 37, count 0 2006.229.18:29:18.91#ibcon#read 4, iclass 37, count 0 2006.229.18:29:18.91#ibcon#about to read 5, iclass 37, count 0 2006.229.18:29:18.91#ibcon#read 5, iclass 37, count 0 2006.229.18:29:18.91#ibcon#about to read 6, iclass 37, count 0 2006.229.18:29:18.91#ibcon#read 6, iclass 37, count 0 2006.229.18:29:18.91#ibcon#end of sib2, iclass 37, count 0 2006.229.18:29:18.91#ibcon#*after write, iclass 37, count 0 2006.229.18:29:18.91#ibcon#*before return 0, iclass 37, count 0 2006.229.18:29:18.91#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:29:18.91#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.18:29:18.91#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.18:29:18.91#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.18:29:18.91$vck44/vblo=1,629.99 2006.229.18:29:18.91#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.18:29:18.91#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.18:29:18.91#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:18.91#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:18.91#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:18.91#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:18.91#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:29:18.91#ibcon#first serial, iclass 39, count 0 2006.229.18:29:18.91#ibcon#enter sib2, iclass 39, count 0 2006.229.18:29:18.91#ibcon#flushed, iclass 39, count 0 2006.229.18:29:18.91#ibcon#about to write, iclass 39, count 0 2006.229.18:29:18.91#ibcon#wrote, iclass 39, count 0 2006.229.18:29:18.91#ibcon#about to read 3, iclass 39, count 0 2006.229.18:29:18.93#ibcon#read 3, iclass 39, count 0 2006.229.18:29:18.93#ibcon#about to read 4, iclass 39, count 0 2006.229.18:29:18.93#ibcon#read 4, iclass 39, count 0 2006.229.18:29:18.93#ibcon#about to read 5, iclass 39, count 0 2006.229.18:29:18.93#ibcon#read 5, iclass 39, count 0 2006.229.18:29:18.93#ibcon#about to read 6, iclass 39, count 0 2006.229.18:29:18.93#ibcon#read 6, iclass 39, count 0 2006.229.18:29:18.93#ibcon#end of sib2, iclass 39, count 0 2006.229.18:29:18.93#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:29:18.93#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:29:18.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:29:18.93#ibcon#*before write, iclass 39, count 0 2006.229.18:29:18.93#ibcon#enter sib2, iclass 39, count 0 2006.229.18:29:18.93#ibcon#flushed, iclass 39, count 0 2006.229.18:29:18.93#ibcon#about to write, iclass 39, count 0 2006.229.18:29:18.93#ibcon#wrote, iclass 39, count 0 2006.229.18:29:18.93#ibcon#about to read 3, iclass 39, count 0 2006.229.18:29:18.97#ibcon#read 3, iclass 39, count 0 2006.229.18:29:18.97#ibcon#about to read 4, iclass 39, count 0 2006.229.18:29:18.97#ibcon#read 4, iclass 39, count 0 2006.229.18:29:18.97#ibcon#about to read 5, iclass 39, count 0 2006.229.18:29:18.97#ibcon#read 5, iclass 39, count 0 2006.229.18:29:18.97#ibcon#about to read 6, iclass 39, count 0 2006.229.18:29:18.97#ibcon#read 6, iclass 39, count 0 2006.229.18:29:18.97#ibcon#end of sib2, iclass 39, count 0 2006.229.18:29:18.97#ibcon#*after write, iclass 39, count 0 2006.229.18:29:18.97#ibcon#*before return 0, iclass 39, count 0 2006.229.18:29:18.97#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:18.97#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:18.97#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:29:18.97#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:29:18.97$vck44/vb=1,4 2006.229.18:29:18.97#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.18:29:18.97#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.18:29:18.97#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:18.97#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:29:18.97#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:29:18.97#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:29:18.97#ibcon#enter wrdev, iclass 3, count 2 2006.229.18:29:18.97#ibcon#first serial, iclass 3, count 2 2006.229.18:29:18.97#ibcon#enter sib2, iclass 3, count 2 2006.229.18:29:18.97#ibcon#flushed, iclass 3, count 2 2006.229.18:29:18.97#ibcon#about to write, iclass 3, count 2 2006.229.18:29:18.97#ibcon#wrote, iclass 3, count 2 2006.229.18:29:18.97#ibcon#about to read 3, iclass 3, count 2 2006.229.18:29:18.99#ibcon#read 3, iclass 3, count 2 2006.229.18:29:18.99#ibcon#about to read 4, iclass 3, count 2 2006.229.18:29:18.99#ibcon#read 4, iclass 3, count 2 2006.229.18:29:18.99#ibcon#about to read 5, iclass 3, count 2 2006.229.18:29:18.99#ibcon#read 5, iclass 3, count 2 2006.229.18:29:18.99#ibcon#about to read 6, iclass 3, count 2 2006.229.18:29:18.99#ibcon#read 6, iclass 3, count 2 2006.229.18:29:18.99#ibcon#end of sib2, iclass 3, count 2 2006.229.18:29:18.99#ibcon#*mode == 0, iclass 3, count 2 2006.229.18:29:18.99#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.18:29:18.99#ibcon#[27=AT01-04\r\n] 2006.229.18:29:18.99#ibcon#*before write, iclass 3, count 2 2006.229.18:29:18.99#ibcon#enter sib2, iclass 3, count 2 2006.229.18:29:18.99#ibcon#flushed, iclass 3, count 2 2006.229.18:29:18.99#ibcon#about to write, iclass 3, count 2 2006.229.18:29:18.99#ibcon#wrote, iclass 3, count 2 2006.229.18:29:18.99#ibcon#about to read 3, iclass 3, count 2 2006.229.18:29:19.02#ibcon#read 3, iclass 3, count 2 2006.229.18:29:19.02#ibcon#about to read 4, iclass 3, count 2 2006.229.18:29:19.02#ibcon#read 4, iclass 3, count 2 2006.229.18:29:19.02#ibcon#about to read 5, iclass 3, count 2 2006.229.18:29:19.02#ibcon#read 5, iclass 3, count 2 2006.229.18:29:19.02#ibcon#about to read 6, iclass 3, count 2 2006.229.18:29:19.02#ibcon#read 6, iclass 3, count 2 2006.229.18:29:19.02#ibcon#end of sib2, iclass 3, count 2 2006.229.18:29:19.02#ibcon#*after write, iclass 3, count 2 2006.229.18:29:19.02#ibcon#*before return 0, iclass 3, count 2 2006.229.18:29:19.02#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:29:19.02#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.18:29:19.02#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.18:29:19.02#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:19.02#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:29:19.14#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:29:19.14#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:29:19.14#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:29:19.14#ibcon#first serial, iclass 3, count 0 2006.229.18:29:19.14#ibcon#enter sib2, iclass 3, count 0 2006.229.18:29:19.14#ibcon#flushed, iclass 3, count 0 2006.229.18:29:19.14#ibcon#about to write, iclass 3, count 0 2006.229.18:29:19.14#ibcon#wrote, iclass 3, count 0 2006.229.18:29:19.14#ibcon#about to read 3, iclass 3, count 0 2006.229.18:29:19.16#ibcon#read 3, iclass 3, count 0 2006.229.18:29:19.16#ibcon#about to read 4, iclass 3, count 0 2006.229.18:29:19.16#ibcon#read 4, iclass 3, count 0 2006.229.18:29:19.16#ibcon#about to read 5, iclass 3, count 0 2006.229.18:29:19.16#ibcon#read 5, iclass 3, count 0 2006.229.18:29:19.16#ibcon#about to read 6, iclass 3, count 0 2006.229.18:29:19.16#ibcon#read 6, iclass 3, count 0 2006.229.18:29:19.16#ibcon#end of sib2, iclass 3, count 0 2006.229.18:29:19.16#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:29:19.16#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:29:19.16#ibcon#[27=USB\r\n] 2006.229.18:29:19.16#ibcon#*before write, iclass 3, count 0 2006.229.18:29:19.16#ibcon#enter sib2, iclass 3, count 0 2006.229.18:29:19.16#ibcon#flushed, iclass 3, count 0 2006.229.18:29:19.16#ibcon#about to write, iclass 3, count 0 2006.229.18:29:19.16#ibcon#wrote, iclass 3, count 0 2006.229.18:29:19.16#ibcon#about to read 3, iclass 3, count 0 2006.229.18:29:19.19#ibcon#read 3, iclass 3, count 0 2006.229.18:29:19.19#ibcon#about to read 4, iclass 3, count 0 2006.229.18:29:19.19#ibcon#read 4, iclass 3, count 0 2006.229.18:29:19.19#ibcon#about to read 5, iclass 3, count 0 2006.229.18:29:19.19#ibcon#read 5, iclass 3, count 0 2006.229.18:29:19.19#ibcon#about to read 6, iclass 3, count 0 2006.229.18:29:19.19#ibcon#read 6, iclass 3, count 0 2006.229.18:29:19.19#ibcon#end of sib2, iclass 3, count 0 2006.229.18:29:19.19#ibcon#*after write, iclass 3, count 0 2006.229.18:29:19.19#ibcon#*before return 0, iclass 3, count 0 2006.229.18:29:19.19#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:29:19.19#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.18:29:19.19#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:29:19.19#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:29:19.19$vck44/vblo=2,634.99 2006.229.18:29:19.19#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.18:29:19.19#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.18:29:19.19#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:19.19#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:19.19#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:19.19#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:19.19#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:29:19.19#ibcon#first serial, iclass 5, count 0 2006.229.18:29:19.19#ibcon#enter sib2, iclass 5, count 0 2006.229.18:29:19.19#ibcon#flushed, iclass 5, count 0 2006.229.18:29:19.19#ibcon#about to write, iclass 5, count 0 2006.229.18:29:19.19#ibcon#wrote, iclass 5, count 0 2006.229.18:29:19.19#ibcon#about to read 3, iclass 5, count 0 2006.229.18:29:19.21#ibcon#read 3, iclass 5, count 0 2006.229.18:29:19.21#ibcon#about to read 4, iclass 5, count 0 2006.229.18:29:19.21#ibcon#read 4, iclass 5, count 0 2006.229.18:29:19.21#ibcon#about to read 5, iclass 5, count 0 2006.229.18:29:19.21#ibcon#read 5, iclass 5, count 0 2006.229.18:29:19.21#ibcon#about to read 6, iclass 5, count 0 2006.229.18:29:19.21#ibcon#read 6, iclass 5, count 0 2006.229.18:29:19.21#ibcon#end of sib2, iclass 5, count 0 2006.229.18:29:19.21#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:29:19.21#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:29:19.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:29:19.21#ibcon#*before write, iclass 5, count 0 2006.229.18:29:19.21#ibcon#enter sib2, iclass 5, count 0 2006.229.18:29:19.21#ibcon#flushed, iclass 5, count 0 2006.229.18:29:19.21#ibcon#about to write, iclass 5, count 0 2006.229.18:29:19.21#ibcon#wrote, iclass 5, count 0 2006.229.18:29:19.21#ibcon#about to read 3, iclass 5, count 0 2006.229.18:29:19.25#ibcon#read 3, iclass 5, count 0 2006.229.18:29:19.25#ibcon#about to read 4, iclass 5, count 0 2006.229.18:29:19.25#ibcon#read 4, iclass 5, count 0 2006.229.18:29:19.25#ibcon#about to read 5, iclass 5, count 0 2006.229.18:29:19.25#ibcon#read 5, iclass 5, count 0 2006.229.18:29:19.25#ibcon#about to read 6, iclass 5, count 0 2006.229.18:29:19.25#ibcon#read 6, iclass 5, count 0 2006.229.18:29:19.25#ibcon#end of sib2, iclass 5, count 0 2006.229.18:29:19.25#ibcon#*after write, iclass 5, count 0 2006.229.18:29:19.25#ibcon#*before return 0, iclass 5, count 0 2006.229.18:29:19.25#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:19.25#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.18:29:19.25#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:29:19.25#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:29:19.25$vck44/vb=2,4 2006.229.18:29:19.25#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.18:29:19.25#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.18:29:19.25#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:19.25#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:19.31#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:19.31#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:19.31#ibcon#enter wrdev, iclass 7, count 2 2006.229.18:29:19.31#ibcon#first serial, iclass 7, count 2 2006.229.18:29:19.31#ibcon#enter sib2, iclass 7, count 2 2006.229.18:29:19.31#ibcon#flushed, iclass 7, count 2 2006.229.18:29:19.31#ibcon#about to write, iclass 7, count 2 2006.229.18:29:19.31#ibcon#wrote, iclass 7, count 2 2006.229.18:29:19.31#ibcon#about to read 3, iclass 7, count 2 2006.229.18:29:19.33#ibcon#read 3, iclass 7, count 2 2006.229.18:29:19.33#ibcon#about to read 4, iclass 7, count 2 2006.229.18:29:19.33#ibcon#read 4, iclass 7, count 2 2006.229.18:29:19.33#ibcon#about to read 5, iclass 7, count 2 2006.229.18:29:19.33#ibcon#read 5, iclass 7, count 2 2006.229.18:29:19.33#ibcon#about to read 6, iclass 7, count 2 2006.229.18:29:19.33#ibcon#read 6, iclass 7, count 2 2006.229.18:29:19.33#ibcon#end of sib2, iclass 7, count 2 2006.229.18:29:19.33#ibcon#*mode == 0, iclass 7, count 2 2006.229.18:29:19.33#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.18:29:19.33#ibcon#[27=AT02-04\r\n] 2006.229.18:29:19.33#ibcon#*before write, iclass 7, count 2 2006.229.18:29:19.33#ibcon#enter sib2, iclass 7, count 2 2006.229.18:29:19.33#ibcon#flushed, iclass 7, count 2 2006.229.18:29:19.33#ibcon#about to write, iclass 7, count 2 2006.229.18:29:19.33#ibcon#wrote, iclass 7, count 2 2006.229.18:29:19.33#ibcon#about to read 3, iclass 7, count 2 2006.229.18:29:19.36#ibcon#read 3, iclass 7, count 2 2006.229.18:29:19.36#ibcon#about to read 4, iclass 7, count 2 2006.229.18:29:19.36#ibcon#read 4, iclass 7, count 2 2006.229.18:29:19.36#ibcon#about to read 5, iclass 7, count 2 2006.229.18:29:19.36#ibcon#read 5, iclass 7, count 2 2006.229.18:29:19.36#ibcon#about to read 6, iclass 7, count 2 2006.229.18:29:19.36#ibcon#read 6, iclass 7, count 2 2006.229.18:29:19.36#ibcon#end of sib2, iclass 7, count 2 2006.229.18:29:19.36#ibcon#*after write, iclass 7, count 2 2006.229.18:29:19.36#ibcon#*before return 0, iclass 7, count 2 2006.229.18:29:19.36#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:19.36#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.18:29:19.36#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.18:29:19.36#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:19.36#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:19.48#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:19.48#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:19.48#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:29:19.48#ibcon#first serial, iclass 7, count 0 2006.229.18:29:19.48#ibcon#enter sib2, iclass 7, count 0 2006.229.18:29:19.48#ibcon#flushed, iclass 7, count 0 2006.229.18:29:19.48#ibcon#about to write, iclass 7, count 0 2006.229.18:29:19.48#ibcon#wrote, iclass 7, count 0 2006.229.18:29:19.48#ibcon#about to read 3, iclass 7, count 0 2006.229.18:29:19.50#ibcon#read 3, iclass 7, count 0 2006.229.18:29:19.50#ibcon#about to read 4, iclass 7, count 0 2006.229.18:29:19.50#ibcon#read 4, iclass 7, count 0 2006.229.18:29:19.50#ibcon#about to read 5, iclass 7, count 0 2006.229.18:29:19.50#ibcon#read 5, iclass 7, count 0 2006.229.18:29:19.50#ibcon#about to read 6, iclass 7, count 0 2006.229.18:29:19.50#ibcon#read 6, iclass 7, count 0 2006.229.18:29:19.50#ibcon#end of sib2, iclass 7, count 0 2006.229.18:29:19.50#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:29:19.50#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:29:19.50#ibcon#[27=USB\r\n] 2006.229.18:29:19.50#ibcon#*before write, iclass 7, count 0 2006.229.18:29:19.50#ibcon#enter sib2, iclass 7, count 0 2006.229.18:29:19.50#ibcon#flushed, iclass 7, count 0 2006.229.18:29:19.50#ibcon#about to write, iclass 7, count 0 2006.229.18:29:19.50#ibcon#wrote, iclass 7, count 0 2006.229.18:29:19.50#ibcon#about to read 3, iclass 7, count 0 2006.229.18:29:19.53#ibcon#read 3, iclass 7, count 0 2006.229.18:29:19.53#ibcon#about to read 4, iclass 7, count 0 2006.229.18:29:19.53#ibcon#read 4, iclass 7, count 0 2006.229.18:29:19.53#ibcon#about to read 5, iclass 7, count 0 2006.229.18:29:19.53#ibcon#read 5, iclass 7, count 0 2006.229.18:29:19.53#ibcon#about to read 6, iclass 7, count 0 2006.229.18:29:19.53#ibcon#read 6, iclass 7, count 0 2006.229.18:29:19.53#ibcon#end of sib2, iclass 7, count 0 2006.229.18:29:19.53#ibcon#*after write, iclass 7, count 0 2006.229.18:29:19.53#ibcon#*before return 0, iclass 7, count 0 2006.229.18:29:19.53#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:19.53#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.18:29:19.53#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:29:19.53#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:29:19.53$vck44/vblo=3,649.99 2006.229.18:29:19.53#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.18:29:19.53#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.18:29:19.53#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:19.53#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:19.53#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:19.53#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:19.53#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:29:19.53#ibcon#first serial, iclass 11, count 0 2006.229.18:29:19.53#ibcon#enter sib2, iclass 11, count 0 2006.229.18:29:19.53#ibcon#flushed, iclass 11, count 0 2006.229.18:29:19.53#ibcon#about to write, iclass 11, count 0 2006.229.18:29:19.53#ibcon#wrote, iclass 11, count 0 2006.229.18:29:19.53#ibcon#about to read 3, iclass 11, count 0 2006.229.18:29:19.55#ibcon#read 3, iclass 11, count 0 2006.229.18:29:19.55#ibcon#about to read 4, iclass 11, count 0 2006.229.18:29:19.55#ibcon#read 4, iclass 11, count 0 2006.229.18:29:19.55#ibcon#about to read 5, iclass 11, count 0 2006.229.18:29:19.55#ibcon#read 5, iclass 11, count 0 2006.229.18:29:19.55#ibcon#about to read 6, iclass 11, count 0 2006.229.18:29:19.55#ibcon#read 6, iclass 11, count 0 2006.229.18:29:19.55#ibcon#end of sib2, iclass 11, count 0 2006.229.18:29:19.55#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:29:19.55#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:29:19.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:29:19.55#ibcon#*before write, iclass 11, count 0 2006.229.18:29:19.55#ibcon#enter sib2, iclass 11, count 0 2006.229.18:29:19.55#ibcon#flushed, iclass 11, count 0 2006.229.18:29:19.55#ibcon#about to write, iclass 11, count 0 2006.229.18:29:19.55#ibcon#wrote, iclass 11, count 0 2006.229.18:29:19.55#ibcon#about to read 3, iclass 11, count 0 2006.229.18:29:19.59#ibcon#read 3, iclass 11, count 0 2006.229.18:29:19.59#ibcon#about to read 4, iclass 11, count 0 2006.229.18:29:19.59#ibcon#read 4, iclass 11, count 0 2006.229.18:29:19.59#ibcon#about to read 5, iclass 11, count 0 2006.229.18:29:19.59#ibcon#read 5, iclass 11, count 0 2006.229.18:29:19.59#ibcon#about to read 6, iclass 11, count 0 2006.229.18:29:19.59#ibcon#read 6, iclass 11, count 0 2006.229.18:29:19.59#ibcon#end of sib2, iclass 11, count 0 2006.229.18:29:19.59#ibcon#*after write, iclass 11, count 0 2006.229.18:29:19.59#ibcon#*before return 0, iclass 11, count 0 2006.229.18:29:19.59#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:19.59#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.18:29:19.59#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:29:19.59#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:29:19.59$vck44/vb=3,4 2006.229.18:29:19.59#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.18:29:19.59#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.18:29:19.59#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:19.59#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:19.65#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:19.65#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:19.65#ibcon#enter wrdev, iclass 13, count 2 2006.229.18:29:19.65#ibcon#first serial, iclass 13, count 2 2006.229.18:29:19.65#ibcon#enter sib2, iclass 13, count 2 2006.229.18:29:19.65#ibcon#flushed, iclass 13, count 2 2006.229.18:29:19.65#ibcon#about to write, iclass 13, count 2 2006.229.18:29:19.65#ibcon#wrote, iclass 13, count 2 2006.229.18:29:19.65#ibcon#about to read 3, iclass 13, count 2 2006.229.18:29:19.67#ibcon#read 3, iclass 13, count 2 2006.229.18:29:19.67#ibcon#about to read 4, iclass 13, count 2 2006.229.18:29:19.67#ibcon#read 4, iclass 13, count 2 2006.229.18:29:19.67#ibcon#about to read 5, iclass 13, count 2 2006.229.18:29:19.67#ibcon#read 5, iclass 13, count 2 2006.229.18:29:19.67#ibcon#about to read 6, iclass 13, count 2 2006.229.18:29:19.67#ibcon#read 6, iclass 13, count 2 2006.229.18:29:19.67#ibcon#end of sib2, iclass 13, count 2 2006.229.18:29:19.67#ibcon#*mode == 0, iclass 13, count 2 2006.229.18:29:19.67#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.18:29:19.67#ibcon#[27=AT03-04\r\n] 2006.229.18:29:19.67#ibcon#*before write, iclass 13, count 2 2006.229.18:29:19.67#ibcon#enter sib2, iclass 13, count 2 2006.229.18:29:19.67#ibcon#flushed, iclass 13, count 2 2006.229.18:29:19.67#ibcon#about to write, iclass 13, count 2 2006.229.18:29:19.67#ibcon#wrote, iclass 13, count 2 2006.229.18:29:19.67#ibcon#about to read 3, iclass 13, count 2 2006.229.18:29:19.70#ibcon#read 3, iclass 13, count 2 2006.229.18:29:19.70#ibcon#about to read 4, iclass 13, count 2 2006.229.18:29:19.70#ibcon#read 4, iclass 13, count 2 2006.229.18:29:19.70#ibcon#about to read 5, iclass 13, count 2 2006.229.18:29:19.70#ibcon#read 5, iclass 13, count 2 2006.229.18:29:19.70#ibcon#about to read 6, iclass 13, count 2 2006.229.18:29:19.70#ibcon#read 6, iclass 13, count 2 2006.229.18:29:19.70#ibcon#end of sib2, iclass 13, count 2 2006.229.18:29:19.70#ibcon#*after write, iclass 13, count 2 2006.229.18:29:19.70#ibcon#*before return 0, iclass 13, count 2 2006.229.18:29:19.70#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:19.70#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.18:29:19.70#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.18:29:19.70#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:19.70#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:19.82#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:19.82#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:19.82#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:29:19.82#ibcon#first serial, iclass 13, count 0 2006.229.18:29:19.82#ibcon#enter sib2, iclass 13, count 0 2006.229.18:29:19.82#ibcon#flushed, iclass 13, count 0 2006.229.18:29:19.82#ibcon#about to write, iclass 13, count 0 2006.229.18:29:19.82#ibcon#wrote, iclass 13, count 0 2006.229.18:29:19.82#ibcon#about to read 3, iclass 13, count 0 2006.229.18:29:19.84#ibcon#read 3, iclass 13, count 0 2006.229.18:29:19.84#ibcon#about to read 4, iclass 13, count 0 2006.229.18:29:19.84#ibcon#read 4, iclass 13, count 0 2006.229.18:29:19.84#ibcon#about to read 5, iclass 13, count 0 2006.229.18:29:19.84#ibcon#read 5, iclass 13, count 0 2006.229.18:29:19.84#ibcon#about to read 6, iclass 13, count 0 2006.229.18:29:19.84#ibcon#read 6, iclass 13, count 0 2006.229.18:29:19.84#ibcon#end of sib2, iclass 13, count 0 2006.229.18:29:19.84#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:29:19.84#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:29:19.84#ibcon#[27=USB\r\n] 2006.229.18:29:19.84#ibcon#*before write, iclass 13, count 0 2006.229.18:29:19.84#ibcon#enter sib2, iclass 13, count 0 2006.229.18:29:19.84#ibcon#flushed, iclass 13, count 0 2006.229.18:29:19.84#ibcon#about to write, iclass 13, count 0 2006.229.18:29:19.84#ibcon#wrote, iclass 13, count 0 2006.229.18:29:19.84#ibcon#about to read 3, iclass 13, count 0 2006.229.18:29:19.87#ibcon#read 3, iclass 13, count 0 2006.229.18:29:19.87#ibcon#about to read 4, iclass 13, count 0 2006.229.18:29:19.87#ibcon#read 4, iclass 13, count 0 2006.229.18:29:19.87#ibcon#about to read 5, iclass 13, count 0 2006.229.18:29:19.87#ibcon#read 5, iclass 13, count 0 2006.229.18:29:19.87#ibcon#about to read 6, iclass 13, count 0 2006.229.18:29:19.87#ibcon#read 6, iclass 13, count 0 2006.229.18:29:19.87#ibcon#end of sib2, iclass 13, count 0 2006.229.18:29:19.87#ibcon#*after write, iclass 13, count 0 2006.229.18:29:19.87#ibcon#*before return 0, iclass 13, count 0 2006.229.18:29:19.87#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:19.87#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.18:29:19.87#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:29:19.87#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:29:19.87$vck44/vblo=4,679.99 2006.229.18:29:19.87#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.18:29:19.87#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.18:29:19.87#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:19.87#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:19.87#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:19.87#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:19.87#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:29:19.87#ibcon#first serial, iclass 15, count 0 2006.229.18:29:19.87#ibcon#enter sib2, iclass 15, count 0 2006.229.18:29:19.87#ibcon#flushed, iclass 15, count 0 2006.229.18:29:19.87#ibcon#about to write, iclass 15, count 0 2006.229.18:29:19.87#ibcon#wrote, iclass 15, count 0 2006.229.18:29:19.87#ibcon#about to read 3, iclass 15, count 0 2006.229.18:29:19.89#ibcon#read 3, iclass 15, count 0 2006.229.18:29:19.89#ibcon#about to read 4, iclass 15, count 0 2006.229.18:29:19.89#ibcon#read 4, iclass 15, count 0 2006.229.18:29:19.89#ibcon#about to read 5, iclass 15, count 0 2006.229.18:29:19.89#ibcon#read 5, iclass 15, count 0 2006.229.18:29:19.89#ibcon#about to read 6, iclass 15, count 0 2006.229.18:29:19.89#ibcon#read 6, iclass 15, count 0 2006.229.18:29:19.89#ibcon#end of sib2, iclass 15, count 0 2006.229.18:29:19.89#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:29:19.89#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:29:19.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:29:19.89#ibcon#*before write, iclass 15, count 0 2006.229.18:29:19.89#ibcon#enter sib2, iclass 15, count 0 2006.229.18:29:19.89#ibcon#flushed, iclass 15, count 0 2006.229.18:29:19.89#ibcon#about to write, iclass 15, count 0 2006.229.18:29:19.89#ibcon#wrote, iclass 15, count 0 2006.229.18:29:19.89#ibcon#about to read 3, iclass 15, count 0 2006.229.18:29:19.93#ibcon#read 3, iclass 15, count 0 2006.229.18:29:19.93#ibcon#about to read 4, iclass 15, count 0 2006.229.18:29:19.93#ibcon#read 4, iclass 15, count 0 2006.229.18:29:19.93#ibcon#about to read 5, iclass 15, count 0 2006.229.18:29:19.93#ibcon#read 5, iclass 15, count 0 2006.229.18:29:19.93#ibcon#about to read 6, iclass 15, count 0 2006.229.18:29:19.93#ibcon#read 6, iclass 15, count 0 2006.229.18:29:19.93#ibcon#end of sib2, iclass 15, count 0 2006.229.18:29:19.93#ibcon#*after write, iclass 15, count 0 2006.229.18:29:19.93#ibcon#*before return 0, iclass 15, count 0 2006.229.18:29:19.93#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:19.93#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.18:29:19.93#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:29:19.93#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:29:19.93$vck44/vb=4,4 2006.229.18:29:19.93#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.18:29:19.93#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.18:29:19.93#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:19.93#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:19.99#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:19.99#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:19.99#ibcon#enter wrdev, iclass 17, count 2 2006.229.18:29:19.99#ibcon#first serial, iclass 17, count 2 2006.229.18:29:19.99#ibcon#enter sib2, iclass 17, count 2 2006.229.18:29:19.99#ibcon#flushed, iclass 17, count 2 2006.229.18:29:19.99#ibcon#about to write, iclass 17, count 2 2006.229.18:29:19.99#ibcon#wrote, iclass 17, count 2 2006.229.18:29:19.99#ibcon#about to read 3, iclass 17, count 2 2006.229.18:29:20.01#ibcon#read 3, iclass 17, count 2 2006.229.18:29:20.01#ibcon#about to read 4, iclass 17, count 2 2006.229.18:29:20.01#ibcon#read 4, iclass 17, count 2 2006.229.18:29:20.01#ibcon#about to read 5, iclass 17, count 2 2006.229.18:29:20.01#ibcon#read 5, iclass 17, count 2 2006.229.18:29:20.01#ibcon#about to read 6, iclass 17, count 2 2006.229.18:29:20.01#ibcon#read 6, iclass 17, count 2 2006.229.18:29:20.01#ibcon#end of sib2, iclass 17, count 2 2006.229.18:29:20.01#ibcon#*mode == 0, iclass 17, count 2 2006.229.18:29:20.01#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.18:29:20.01#ibcon#[27=AT04-04\r\n] 2006.229.18:29:20.01#ibcon#*before write, iclass 17, count 2 2006.229.18:29:20.01#ibcon#enter sib2, iclass 17, count 2 2006.229.18:29:20.01#ibcon#flushed, iclass 17, count 2 2006.229.18:29:20.01#ibcon#about to write, iclass 17, count 2 2006.229.18:29:20.01#ibcon#wrote, iclass 17, count 2 2006.229.18:29:20.01#ibcon#about to read 3, iclass 17, count 2 2006.229.18:29:20.04#ibcon#read 3, iclass 17, count 2 2006.229.18:29:20.04#ibcon#about to read 4, iclass 17, count 2 2006.229.18:29:20.04#ibcon#read 4, iclass 17, count 2 2006.229.18:29:20.04#ibcon#about to read 5, iclass 17, count 2 2006.229.18:29:20.04#ibcon#read 5, iclass 17, count 2 2006.229.18:29:20.04#ibcon#about to read 6, iclass 17, count 2 2006.229.18:29:20.04#ibcon#read 6, iclass 17, count 2 2006.229.18:29:20.04#ibcon#end of sib2, iclass 17, count 2 2006.229.18:29:20.04#ibcon#*after write, iclass 17, count 2 2006.229.18:29:20.04#ibcon#*before return 0, iclass 17, count 2 2006.229.18:29:20.04#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:20.04#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.18:29:20.04#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.18:29:20.04#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:20.04#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:20.16#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:20.16#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:20.16#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:29:20.16#ibcon#first serial, iclass 17, count 0 2006.229.18:29:20.16#ibcon#enter sib2, iclass 17, count 0 2006.229.18:29:20.16#ibcon#flushed, iclass 17, count 0 2006.229.18:29:20.16#ibcon#about to write, iclass 17, count 0 2006.229.18:29:20.16#ibcon#wrote, iclass 17, count 0 2006.229.18:29:20.16#ibcon#about to read 3, iclass 17, count 0 2006.229.18:29:20.18#ibcon#read 3, iclass 17, count 0 2006.229.18:29:20.18#ibcon#about to read 4, iclass 17, count 0 2006.229.18:29:20.18#ibcon#read 4, iclass 17, count 0 2006.229.18:29:20.18#ibcon#about to read 5, iclass 17, count 0 2006.229.18:29:20.18#ibcon#read 5, iclass 17, count 0 2006.229.18:29:20.18#ibcon#about to read 6, iclass 17, count 0 2006.229.18:29:20.18#ibcon#read 6, iclass 17, count 0 2006.229.18:29:20.18#ibcon#end of sib2, iclass 17, count 0 2006.229.18:29:20.18#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:29:20.18#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:29:20.18#ibcon#[27=USB\r\n] 2006.229.18:29:20.18#ibcon#*before write, iclass 17, count 0 2006.229.18:29:20.18#ibcon#enter sib2, iclass 17, count 0 2006.229.18:29:20.18#ibcon#flushed, iclass 17, count 0 2006.229.18:29:20.18#ibcon#about to write, iclass 17, count 0 2006.229.18:29:20.18#ibcon#wrote, iclass 17, count 0 2006.229.18:29:20.18#ibcon#about to read 3, iclass 17, count 0 2006.229.18:29:20.21#ibcon#read 3, iclass 17, count 0 2006.229.18:29:20.21#ibcon#about to read 4, iclass 17, count 0 2006.229.18:29:20.21#ibcon#read 4, iclass 17, count 0 2006.229.18:29:20.21#ibcon#about to read 5, iclass 17, count 0 2006.229.18:29:20.21#ibcon#read 5, iclass 17, count 0 2006.229.18:29:20.21#ibcon#about to read 6, iclass 17, count 0 2006.229.18:29:20.21#ibcon#read 6, iclass 17, count 0 2006.229.18:29:20.21#ibcon#end of sib2, iclass 17, count 0 2006.229.18:29:20.21#ibcon#*after write, iclass 17, count 0 2006.229.18:29:20.21#ibcon#*before return 0, iclass 17, count 0 2006.229.18:29:20.21#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:20.21#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.18:29:20.21#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:29:20.21#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:29:20.21$vck44/vblo=5,709.99 2006.229.18:29:20.21#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.18:29:20.21#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.18:29:20.21#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:20.21#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:20.21#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:20.21#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:20.21#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:29:20.21#ibcon#first serial, iclass 19, count 0 2006.229.18:29:20.21#ibcon#enter sib2, iclass 19, count 0 2006.229.18:29:20.21#ibcon#flushed, iclass 19, count 0 2006.229.18:29:20.21#ibcon#about to write, iclass 19, count 0 2006.229.18:29:20.21#ibcon#wrote, iclass 19, count 0 2006.229.18:29:20.21#ibcon#about to read 3, iclass 19, count 0 2006.229.18:29:20.23#ibcon#read 3, iclass 19, count 0 2006.229.18:29:20.23#ibcon#about to read 4, iclass 19, count 0 2006.229.18:29:20.23#ibcon#read 4, iclass 19, count 0 2006.229.18:29:20.23#ibcon#about to read 5, iclass 19, count 0 2006.229.18:29:20.23#ibcon#read 5, iclass 19, count 0 2006.229.18:29:20.23#ibcon#about to read 6, iclass 19, count 0 2006.229.18:29:20.23#ibcon#read 6, iclass 19, count 0 2006.229.18:29:20.23#ibcon#end of sib2, iclass 19, count 0 2006.229.18:29:20.23#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:29:20.23#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:29:20.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:29:20.23#ibcon#*before write, iclass 19, count 0 2006.229.18:29:20.23#ibcon#enter sib2, iclass 19, count 0 2006.229.18:29:20.23#ibcon#flushed, iclass 19, count 0 2006.229.18:29:20.23#ibcon#about to write, iclass 19, count 0 2006.229.18:29:20.23#ibcon#wrote, iclass 19, count 0 2006.229.18:29:20.23#ibcon#about to read 3, iclass 19, count 0 2006.229.18:29:20.27#ibcon#read 3, iclass 19, count 0 2006.229.18:29:20.27#ibcon#about to read 4, iclass 19, count 0 2006.229.18:29:20.27#ibcon#read 4, iclass 19, count 0 2006.229.18:29:20.27#ibcon#about to read 5, iclass 19, count 0 2006.229.18:29:20.27#ibcon#read 5, iclass 19, count 0 2006.229.18:29:20.27#ibcon#about to read 6, iclass 19, count 0 2006.229.18:29:20.27#ibcon#read 6, iclass 19, count 0 2006.229.18:29:20.27#ibcon#end of sib2, iclass 19, count 0 2006.229.18:29:20.27#ibcon#*after write, iclass 19, count 0 2006.229.18:29:20.27#ibcon#*before return 0, iclass 19, count 0 2006.229.18:29:20.27#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:20.27#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.18:29:20.27#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:29:20.27#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:29:20.27$vck44/vb=5,4 2006.229.18:29:20.27#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.18:29:20.27#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.18:29:20.27#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:20.27#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:20.33#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:20.33#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:20.33#ibcon#enter wrdev, iclass 21, count 2 2006.229.18:29:20.33#ibcon#first serial, iclass 21, count 2 2006.229.18:29:20.33#ibcon#enter sib2, iclass 21, count 2 2006.229.18:29:20.33#ibcon#flushed, iclass 21, count 2 2006.229.18:29:20.33#ibcon#about to write, iclass 21, count 2 2006.229.18:29:20.33#ibcon#wrote, iclass 21, count 2 2006.229.18:29:20.33#ibcon#about to read 3, iclass 21, count 2 2006.229.18:29:20.35#ibcon#read 3, iclass 21, count 2 2006.229.18:29:20.35#ibcon#about to read 4, iclass 21, count 2 2006.229.18:29:20.35#ibcon#read 4, iclass 21, count 2 2006.229.18:29:20.35#ibcon#about to read 5, iclass 21, count 2 2006.229.18:29:20.35#ibcon#read 5, iclass 21, count 2 2006.229.18:29:20.35#ibcon#about to read 6, iclass 21, count 2 2006.229.18:29:20.35#ibcon#read 6, iclass 21, count 2 2006.229.18:29:20.35#ibcon#end of sib2, iclass 21, count 2 2006.229.18:29:20.35#ibcon#*mode == 0, iclass 21, count 2 2006.229.18:29:20.35#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.18:29:20.35#ibcon#[27=AT05-04\r\n] 2006.229.18:29:20.35#ibcon#*before write, iclass 21, count 2 2006.229.18:29:20.35#ibcon#enter sib2, iclass 21, count 2 2006.229.18:29:20.35#ibcon#flushed, iclass 21, count 2 2006.229.18:29:20.35#ibcon#about to write, iclass 21, count 2 2006.229.18:29:20.35#ibcon#wrote, iclass 21, count 2 2006.229.18:29:20.35#ibcon#about to read 3, iclass 21, count 2 2006.229.18:29:20.38#ibcon#read 3, iclass 21, count 2 2006.229.18:29:20.38#ibcon#about to read 4, iclass 21, count 2 2006.229.18:29:20.38#ibcon#read 4, iclass 21, count 2 2006.229.18:29:20.38#ibcon#about to read 5, iclass 21, count 2 2006.229.18:29:20.38#ibcon#read 5, iclass 21, count 2 2006.229.18:29:20.38#ibcon#about to read 6, iclass 21, count 2 2006.229.18:29:20.38#ibcon#read 6, iclass 21, count 2 2006.229.18:29:20.38#ibcon#end of sib2, iclass 21, count 2 2006.229.18:29:20.38#ibcon#*after write, iclass 21, count 2 2006.229.18:29:20.38#ibcon#*before return 0, iclass 21, count 2 2006.229.18:29:20.38#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:20.38#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.18:29:20.38#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.18:29:20.38#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:20.38#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:20.50#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:20.50#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:20.50#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:29:20.50#ibcon#first serial, iclass 21, count 0 2006.229.18:29:20.50#ibcon#enter sib2, iclass 21, count 0 2006.229.18:29:20.50#ibcon#flushed, iclass 21, count 0 2006.229.18:29:20.50#ibcon#about to write, iclass 21, count 0 2006.229.18:29:20.50#ibcon#wrote, iclass 21, count 0 2006.229.18:29:20.50#ibcon#about to read 3, iclass 21, count 0 2006.229.18:29:20.52#ibcon#read 3, iclass 21, count 0 2006.229.18:29:20.52#ibcon#about to read 4, iclass 21, count 0 2006.229.18:29:20.52#ibcon#read 4, iclass 21, count 0 2006.229.18:29:20.52#ibcon#about to read 5, iclass 21, count 0 2006.229.18:29:20.52#ibcon#read 5, iclass 21, count 0 2006.229.18:29:20.52#ibcon#about to read 6, iclass 21, count 0 2006.229.18:29:20.52#ibcon#read 6, iclass 21, count 0 2006.229.18:29:20.52#ibcon#end of sib2, iclass 21, count 0 2006.229.18:29:20.52#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:29:20.52#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:29:20.52#ibcon#[27=USB\r\n] 2006.229.18:29:20.52#ibcon#*before write, iclass 21, count 0 2006.229.18:29:20.52#ibcon#enter sib2, iclass 21, count 0 2006.229.18:29:20.52#ibcon#flushed, iclass 21, count 0 2006.229.18:29:20.52#ibcon#about to write, iclass 21, count 0 2006.229.18:29:20.52#ibcon#wrote, iclass 21, count 0 2006.229.18:29:20.52#ibcon#about to read 3, iclass 21, count 0 2006.229.18:29:20.55#ibcon#read 3, iclass 21, count 0 2006.229.18:29:20.55#ibcon#about to read 4, iclass 21, count 0 2006.229.18:29:20.55#ibcon#read 4, iclass 21, count 0 2006.229.18:29:20.55#ibcon#about to read 5, iclass 21, count 0 2006.229.18:29:20.55#ibcon#read 5, iclass 21, count 0 2006.229.18:29:20.55#ibcon#about to read 6, iclass 21, count 0 2006.229.18:29:20.55#ibcon#read 6, iclass 21, count 0 2006.229.18:29:20.55#ibcon#end of sib2, iclass 21, count 0 2006.229.18:29:20.55#ibcon#*after write, iclass 21, count 0 2006.229.18:29:20.55#ibcon#*before return 0, iclass 21, count 0 2006.229.18:29:20.55#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:20.55#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.18:29:20.55#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:29:20.55#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:29:20.55$vck44/vblo=6,719.99 2006.229.18:29:20.55#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.18:29:20.55#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.18:29:20.55#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:20.55#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:20.55#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:20.55#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:20.55#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:29:20.55#ibcon#first serial, iclass 23, count 0 2006.229.18:29:20.55#ibcon#enter sib2, iclass 23, count 0 2006.229.18:29:20.55#ibcon#flushed, iclass 23, count 0 2006.229.18:29:20.55#ibcon#about to write, iclass 23, count 0 2006.229.18:29:20.55#ibcon#wrote, iclass 23, count 0 2006.229.18:29:20.55#ibcon#about to read 3, iclass 23, count 0 2006.229.18:29:20.57#ibcon#read 3, iclass 23, count 0 2006.229.18:29:20.57#ibcon#about to read 4, iclass 23, count 0 2006.229.18:29:20.57#ibcon#read 4, iclass 23, count 0 2006.229.18:29:20.57#ibcon#about to read 5, iclass 23, count 0 2006.229.18:29:20.57#ibcon#read 5, iclass 23, count 0 2006.229.18:29:20.57#ibcon#about to read 6, iclass 23, count 0 2006.229.18:29:20.57#ibcon#read 6, iclass 23, count 0 2006.229.18:29:20.57#ibcon#end of sib2, iclass 23, count 0 2006.229.18:29:20.57#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:29:20.57#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:29:20.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:29:20.57#ibcon#*before write, iclass 23, count 0 2006.229.18:29:20.57#ibcon#enter sib2, iclass 23, count 0 2006.229.18:29:20.57#ibcon#flushed, iclass 23, count 0 2006.229.18:29:20.57#ibcon#about to write, iclass 23, count 0 2006.229.18:29:20.57#ibcon#wrote, iclass 23, count 0 2006.229.18:29:20.57#ibcon#about to read 3, iclass 23, count 0 2006.229.18:29:20.61#ibcon#read 3, iclass 23, count 0 2006.229.18:29:20.61#ibcon#about to read 4, iclass 23, count 0 2006.229.18:29:20.61#ibcon#read 4, iclass 23, count 0 2006.229.18:29:20.61#ibcon#about to read 5, iclass 23, count 0 2006.229.18:29:20.61#ibcon#read 5, iclass 23, count 0 2006.229.18:29:20.61#ibcon#about to read 6, iclass 23, count 0 2006.229.18:29:20.61#ibcon#read 6, iclass 23, count 0 2006.229.18:29:20.61#ibcon#end of sib2, iclass 23, count 0 2006.229.18:29:20.61#ibcon#*after write, iclass 23, count 0 2006.229.18:29:20.61#ibcon#*before return 0, iclass 23, count 0 2006.229.18:29:20.61#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:20.61#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:29:20.61#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:29:20.61#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:29:20.61$vck44/vb=6,4 2006.229.18:29:20.61#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.18:29:20.61#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.18:29:20.61#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:20.61#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:20.67#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:20.67#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:20.67#ibcon#enter wrdev, iclass 25, count 2 2006.229.18:29:20.67#ibcon#first serial, iclass 25, count 2 2006.229.18:29:20.67#ibcon#enter sib2, iclass 25, count 2 2006.229.18:29:20.67#ibcon#flushed, iclass 25, count 2 2006.229.18:29:20.67#ibcon#about to write, iclass 25, count 2 2006.229.18:29:20.67#ibcon#wrote, iclass 25, count 2 2006.229.18:29:20.67#ibcon#about to read 3, iclass 25, count 2 2006.229.18:29:20.69#ibcon#read 3, iclass 25, count 2 2006.229.18:29:20.69#ibcon#about to read 4, iclass 25, count 2 2006.229.18:29:20.69#ibcon#read 4, iclass 25, count 2 2006.229.18:29:20.69#ibcon#about to read 5, iclass 25, count 2 2006.229.18:29:20.69#ibcon#read 5, iclass 25, count 2 2006.229.18:29:20.69#ibcon#about to read 6, iclass 25, count 2 2006.229.18:29:20.69#ibcon#read 6, iclass 25, count 2 2006.229.18:29:20.69#ibcon#end of sib2, iclass 25, count 2 2006.229.18:29:20.69#ibcon#*mode == 0, iclass 25, count 2 2006.229.18:29:20.69#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.18:29:20.69#ibcon#[27=AT06-04\r\n] 2006.229.18:29:20.69#ibcon#*before write, iclass 25, count 2 2006.229.18:29:20.69#ibcon#enter sib2, iclass 25, count 2 2006.229.18:29:20.69#ibcon#flushed, iclass 25, count 2 2006.229.18:29:20.69#ibcon#about to write, iclass 25, count 2 2006.229.18:29:20.69#ibcon#wrote, iclass 25, count 2 2006.229.18:29:20.69#ibcon#about to read 3, iclass 25, count 2 2006.229.18:29:20.72#ibcon#read 3, iclass 25, count 2 2006.229.18:29:20.72#ibcon#about to read 4, iclass 25, count 2 2006.229.18:29:20.72#ibcon#read 4, iclass 25, count 2 2006.229.18:29:20.72#ibcon#about to read 5, iclass 25, count 2 2006.229.18:29:20.72#ibcon#read 5, iclass 25, count 2 2006.229.18:29:20.72#ibcon#about to read 6, iclass 25, count 2 2006.229.18:29:20.72#ibcon#read 6, iclass 25, count 2 2006.229.18:29:20.72#ibcon#end of sib2, iclass 25, count 2 2006.229.18:29:20.72#ibcon#*after write, iclass 25, count 2 2006.229.18:29:20.72#ibcon#*before return 0, iclass 25, count 2 2006.229.18:29:20.72#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:20.72#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.18:29:20.72#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.18:29:20.72#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:20.72#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:20.84#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:20.84#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:20.84#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:29:20.84#ibcon#first serial, iclass 25, count 0 2006.229.18:29:20.84#ibcon#enter sib2, iclass 25, count 0 2006.229.18:29:20.84#ibcon#flushed, iclass 25, count 0 2006.229.18:29:20.84#ibcon#about to write, iclass 25, count 0 2006.229.18:29:20.84#ibcon#wrote, iclass 25, count 0 2006.229.18:29:20.84#ibcon#about to read 3, iclass 25, count 0 2006.229.18:29:20.86#ibcon#read 3, iclass 25, count 0 2006.229.18:29:20.86#ibcon#about to read 4, iclass 25, count 0 2006.229.18:29:20.86#ibcon#read 4, iclass 25, count 0 2006.229.18:29:20.86#ibcon#about to read 5, iclass 25, count 0 2006.229.18:29:20.86#ibcon#read 5, iclass 25, count 0 2006.229.18:29:20.86#ibcon#about to read 6, iclass 25, count 0 2006.229.18:29:20.86#ibcon#read 6, iclass 25, count 0 2006.229.18:29:20.86#ibcon#end of sib2, iclass 25, count 0 2006.229.18:29:20.86#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:29:20.86#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:29:20.86#ibcon#[27=USB\r\n] 2006.229.18:29:20.86#ibcon#*before write, iclass 25, count 0 2006.229.18:29:20.86#ibcon#enter sib2, iclass 25, count 0 2006.229.18:29:20.86#ibcon#flushed, iclass 25, count 0 2006.229.18:29:20.86#ibcon#about to write, iclass 25, count 0 2006.229.18:29:20.86#ibcon#wrote, iclass 25, count 0 2006.229.18:29:20.86#ibcon#about to read 3, iclass 25, count 0 2006.229.18:29:20.89#ibcon#read 3, iclass 25, count 0 2006.229.18:29:20.89#ibcon#about to read 4, iclass 25, count 0 2006.229.18:29:20.89#ibcon#read 4, iclass 25, count 0 2006.229.18:29:20.89#ibcon#about to read 5, iclass 25, count 0 2006.229.18:29:20.89#ibcon#read 5, iclass 25, count 0 2006.229.18:29:20.89#ibcon#about to read 6, iclass 25, count 0 2006.229.18:29:20.89#ibcon#read 6, iclass 25, count 0 2006.229.18:29:20.89#ibcon#end of sib2, iclass 25, count 0 2006.229.18:29:20.89#ibcon#*after write, iclass 25, count 0 2006.229.18:29:20.89#ibcon#*before return 0, iclass 25, count 0 2006.229.18:29:20.89#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:20.89#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.18:29:20.89#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:29:20.89#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:29:20.89$vck44/vblo=7,734.99 2006.229.18:29:20.89#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.18:29:20.89#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.18:29:20.89#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:20.89#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:20.89#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:20.89#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:20.89#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:29:20.89#ibcon#first serial, iclass 27, count 0 2006.229.18:29:20.89#ibcon#enter sib2, iclass 27, count 0 2006.229.18:29:20.89#ibcon#flushed, iclass 27, count 0 2006.229.18:29:20.89#ibcon#about to write, iclass 27, count 0 2006.229.18:29:20.89#ibcon#wrote, iclass 27, count 0 2006.229.18:29:20.89#ibcon#about to read 3, iclass 27, count 0 2006.229.18:29:20.91#ibcon#read 3, iclass 27, count 0 2006.229.18:29:20.91#ibcon#about to read 4, iclass 27, count 0 2006.229.18:29:20.91#ibcon#read 4, iclass 27, count 0 2006.229.18:29:20.91#ibcon#about to read 5, iclass 27, count 0 2006.229.18:29:20.91#ibcon#read 5, iclass 27, count 0 2006.229.18:29:20.91#ibcon#about to read 6, iclass 27, count 0 2006.229.18:29:20.91#ibcon#read 6, iclass 27, count 0 2006.229.18:29:20.91#ibcon#end of sib2, iclass 27, count 0 2006.229.18:29:20.91#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:29:20.91#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:29:20.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:29:20.91#ibcon#*before write, iclass 27, count 0 2006.229.18:29:20.91#ibcon#enter sib2, iclass 27, count 0 2006.229.18:29:20.91#ibcon#flushed, iclass 27, count 0 2006.229.18:29:20.91#ibcon#about to write, iclass 27, count 0 2006.229.18:29:20.91#ibcon#wrote, iclass 27, count 0 2006.229.18:29:20.91#ibcon#about to read 3, iclass 27, count 0 2006.229.18:29:20.95#ibcon#read 3, iclass 27, count 0 2006.229.18:29:20.95#ibcon#about to read 4, iclass 27, count 0 2006.229.18:29:20.95#ibcon#read 4, iclass 27, count 0 2006.229.18:29:20.95#ibcon#about to read 5, iclass 27, count 0 2006.229.18:29:20.95#ibcon#read 5, iclass 27, count 0 2006.229.18:29:20.95#ibcon#about to read 6, iclass 27, count 0 2006.229.18:29:20.95#ibcon#read 6, iclass 27, count 0 2006.229.18:29:20.95#ibcon#end of sib2, iclass 27, count 0 2006.229.18:29:20.95#ibcon#*after write, iclass 27, count 0 2006.229.18:29:20.95#ibcon#*before return 0, iclass 27, count 0 2006.229.18:29:20.95#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:20.95#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.18:29:20.95#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:29:20.95#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:29:20.95$vck44/vb=7,4 2006.229.18:29:20.95#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.18:29:20.95#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.18:29:20.95#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:20.95#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:21.01#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:21.01#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:21.01#ibcon#enter wrdev, iclass 29, count 2 2006.229.18:29:21.01#ibcon#first serial, iclass 29, count 2 2006.229.18:29:21.01#ibcon#enter sib2, iclass 29, count 2 2006.229.18:29:21.01#ibcon#flushed, iclass 29, count 2 2006.229.18:29:21.01#ibcon#about to write, iclass 29, count 2 2006.229.18:29:21.01#ibcon#wrote, iclass 29, count 2 2006.229.18:29:21.01#ibcon#about to read 3, iclass 29, count 2 2006.229.18:29:21.03#ibcon#read 3, iclass 29, count 2 2006.229.18:29:21.03#ibcon#about to read 4, iclass 29, count 2 2006.229.18:29:21.03#ibcon#read 4, iclass 29, count 2 2006.229.18:29:21.03#ibcon#about to read 5, iclass 29, count 2 2006.229.18:29:21.03#ibcon#read 5, iclass 29, count 2 2006.229.18:29:21.03#ibcon#about to read 6, iclass 29, count 2 2006.229.18:29:21.03#ibcon#read 6, iclass 29, count 2 2006.229.18:29:21.03#ibcon#end of sib2, iclass 29, count 2 2006.229.18:29:21.03#ibcon#*mode == 0, iclass 29, count 2 2006.229.18:29:21.03#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.18:29:21.03#ibcon#[27=AT07-04\r\n] 2006.229.18:29:21.03#ibcon#*before write, iclass 29, count 2 2006.229.18:29:21.03#ibcon#enter sib2, iclass 29, count 2 2006.229.18:29:21.03#ibcon#flushed, iclass 29, count 2 2006.229.18:29:21.03#ibcon#about to write, iclass 29, count 2 2006.229.18:29:21.03#ibcon#wrote, iclass 29, count 2 2006.229.18:29:21.03#ibcon#about to read 3, iclass 29, count 2 2006.229.18:29:21.06#ibcon#read 3, iclass 29, count 2 2006.229.18:29:21.06#ibcon#about to read 4, iclass 29, count 2 2006.229.18:29:21.06#ibcon#read 4, iclass 29, count 2 2006.229.18:29:21.06#ibcon#about to read 5, iclass 29, count 2 2006.229.18:29:21.06#ibcon#read 5, iclass 29, count 2 2006.229.18:29:21.06#ibcon#about to read 6, iclass 29, count 2 2006.229.18:29:21.06#ibcon#read 6, iclass 29, count 2 2006.229.18:29:21.06#ibcon#end of sib2, iclass 29, count 2 2006.229.18:29:21.06#ibcon#*after write, iclass 29, count 2 2006.229.18:29:21.06#ibcon#*before return 0, iclass 29, count 2 2006.229.18:29:21.06#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:21.06#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.18:29:21.06#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.18:29:21.06#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:21.06#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:21.18#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:21.18#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:21.18#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:29:21.18#ibcon#first serial, iclass 29, count 0 2006.229.18:29:21.18#ibcon#enter sib2, iclass 29, count 0 2006.229.18:29:21.18#ibcon#flushed, iclass 29, count 0 2006.229.18:29:21.18#ibcon#about to write, iclass 29, count 0 2006.229.18:29:21.18#ibcon#wrote, iclass 29, count 0 2006.229.18:29:21.18#ibcon#about to read 3, iclass 29, count 0 2006.229.18:29:21.20#ibcon#read 3, iclass 29, count 0 2006.229.18:29:21.20#ibcon#about to read 4, iclass 29, count 0 2006.229.18:29:21.20#ibcon#read 4, iclass 29, count 0 2006.229.18:29:21.20#ibcon#about to read 5, iclass 29, count 0 2006.229.18:29:21.20#ibcon#read 5, iclass 29, count 0 2006.229.18:29:21.20#ibcon#about to read 6, iclass 29, count 0 2006.229.18:29:21.20#ibcon#read 6, iclass 29, count 0 2006.229.18:29:21.20#ibcon#end of sib2, iclass 29, count 0 2006.229.18:29:21.20#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:29:21.20#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:29:21.20#ibcon#[27=USB\r\n] 2006.229.18:29:21.20#ibcon#*before write, iclass 29, count 0 2006.229.18:29:21.20#ibcon#enter sib2, iclass 29, count 0 2006.229.18:29:21.20#ibcon#flushed, iclass 29, count 0 2006.229.18:29:21.20#ibcon#about to write, iclass 29, count 0 2006.229.18:29:21.20#ibcon#wrote, iclass 29, count 0 2006.229.18:29:21.20#ibcon#about to read 3, iclass 29, count 0 2006.229.18:29:21.23#ibcon#read 3, iclass 29, count 0 2006.229.18:29:21.23#ibcon#about to read 4, iclass 29, count 0 2006.229.18:29:21.23#ibcon#read 4, iclass 29, count 0 2006.229.18:29:21.23#ibcon#about to read 5, iclass 29, count 0 2006.229.18:29:21.23#ibcon#read 5, iclass 29, count 0 2006.229.18:29:21.23#ibcon#about to read 6, iclass 29, count 0 2006.229.18:29:21.23#ibcon#read 6, iclass 29, count 0 2006.229.18:29:21.23#ibcon#end of sib2, iclass 29, count 0 2006.229.18:29:21.23#ibcon#*after write, iclass 29, count 0 2006.229.18:29:21.23#ibcon#*before return 0, iclass 29, count 0 2006.229.18:29:21.23#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:21.23#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.18:29:21.23#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:29:21.23#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:29:21.23$vck44/vblo=8,744.99 2006.229.18:29:21.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.18:29:21.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.18:29:21.23#ibcon#ireg 17 cls_cnt 0 2006.229.18:29:21.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:29:21.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:29:21.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:29:21.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:29:21.23#ibcon#first serial, iclass 32, count 0 2006.229.18:29:21.23#ibcon#enter sib2, iclass 32, count 0 2006.229.18:29:21.23#ibcon#flushed, iclass 32, count 0 2006.229.18:29:21.23#ibcon#about to write, iclass 32, count 0 2006.229.18:29:21.23#ibcon#wrote, iclass 32, count 0 2006.229.18:29:21.23#ibcon#about to read 3, iclass 32, count 0 2006.229.18:29:21.24#abcon#<5=/07 0.6 1.4 26.391001001.4\r\n> 2006.229.18:29:21.25#ibcon#read 3, iclass 32, count 0 2006.229.18:29:21.25#ibcon#about to read 4, iclass 32, count 0 2006.229.18:29:21.25#ibcon#read 4, iclass 32, count 0 2006.229.18:29:21.25#ibcon#about to read 5, iclass 32, count 0 2006.229.18:29:21.25#ibcon#read 5, iclass 32, count 0 2006.229.18:29:21.25#ibcon#about to read 6, iclass 32, count 0 2006.229.18:29:21.25#ibcon#read 6, iclass 32, count 0 2006.229.18:29:21.25#ibcon#end of sib2, iclass 32, count 0 2006.229.18:29:21.25#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:29:21.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:29:21.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:29:21.25#ibcon#*before write, iclass 32, count 0 2006.229.18:29:21.25#ibcon#enter sib2, iclass 32, count 0 2006.229.18:29:21.25#ibcon#flushed, iclass 32, count 0 2006.229.18:29:21.25#ibcon#about to write, iclass 32, count 0 2006.229.18:29:21.25#ibcon#wrote, iclass 32, count 0 2006.229.18:29:21.25#ibcon#about to read 3, iclass 32, count 0 2006.229.18:29:21.26#abcon#{5=INTERFACE CLEAR} 2006.229.18:29:21.29#ibcon#read 3, iclass 32, count 0 2006.229.18:29:21.29#ibcon#about to read 4, iclass 32, count 0 2006.229.18:29:21.29#ibcon#read 4, iclass 32, count 0 2006.229.18:29:21.29#ibcon#about to read 5, iclass 32, count 0 2006.229.18:29:21.29#ibcon#read 5, iclass 32, count 0 2006.229.18:29:21.29#ibcon#about to read 6, iclass 32, count 0 2006.229.18:29:21.29#ibcon#read 6, iclass 32, count 0 2006.229.18:29:21.29#ibcon#end of sib2, iclass 32, count 0 2006.229.18:29:21.29#ibcon#*after write, iclass 32, count 0 2006.229.18:29:21.29#ibcon#*before return 0, iclass 32, count 0 2006.229.18:29:21.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:29:21.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:29:21.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:29:21.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:29:21.29$vck44/vb=8,4 2006.229.18:29:21.29#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.18:29:21.29#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.18:29:21.29#ibcon#ireg 11 cls_cnt 2 2006.229.18:29:21.29#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:29:21.32#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:29:21.35#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:29:21.35#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:29:21.35#ibcon#enter wrdev, iclass 36, count 2 2006.229.18:29:21.35#ibcon#first serial, iclass 36, count 2 2006.229.18:29:21.35#ibcon#enter sib2, iclass 36, count 2 2006.229.18:29:21.35#ibcon#flushed, iclass 36, count 2 2006.229.18:29:21.35#ibcon#about to write, iclass 36, count 2 2006.229.18:29:21.35#ibcon#wrote, iclass 36, count 2 2006.229.18:29:21.35#ibcon#about to read 3, iclass 36, count 2 2006.229.18:29:21.37#ibcon#read 3, iclass 36, count 2 2006.229.18:29:21.37#ibcon#about to read 4, iclass 36, count 2 2006.229.18:29:21.37#ibcon#read 4, iclass 36, count 2 2006.229.18:29:21.37#ibcon#about to read 5, iclass 36, count 2 2006.229.18:29:21.37#ibcon#read 5, iclass 36, count 2 2006.229.18:29:21.37#ibcon#about to read 6, iclass 36, count 2 2006.229.18:29:21.37#ibcon#read 6, iclass 36, count 2 2006.229.18:29:21.37#ibcon#end of sib2, iclass 36, count 2 2006.229.18:29:21.37#ibcon#*mode == 0, iclass 36, count 2 2006.229.18:29:21.37#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.18:29:21.37#ibcon#[27=AT08-04\r\n] 2006.229.18:29:21.37#ibcon#*before write, iclass 36, count 2 2006.229.18:29:21.37#ibcon#enter sib2, iclass 36, count 2 2006.229.18:29:21.37#ibcon#flushed, iclass 36, count 2 2006.229.18:29:21.37#ibcon#about to write, iclass 36, count 2 2006.229.18:29:21.37#ibcon#wrote, iclass 36, count 2 2006.229.18:29:21.37#ibcon#about to read 3, iclass 36, count 2 2006.229.18:29:21.40#ibcon#read 3, iclass 36, count 2 2006.229.18:29:21.40#ibcon#about to read 4, iclass 36, count 2 2006.229.18:29:21.40#ibcon#read 4, iclass 36, count 2 2006.229.18:29:21.40#ibcon#about to read 5, iclass 36, count 2 2006.229.18:29:21.40#ibcon#read 5, iclass 36, count 2 2006.229.18:29:21.40#ibcon#about to read 6, iclass 36, count 2 2006.229.18:29:21.40#ibcon#read 6, iclass 36, count 2 2006.229.18:29:21.40#ibcon#end of sib2, iclass 36, count 2 2006.229.18:29:21.40#ibcon#*after write, iclass 36, count 2 2006.229.18:29:21.40#ibcon#*before return 0, iclass 36, count 2 2006.229.18:29:21.40#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:29:21.40#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:29:21.40#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.18:29:21.40#ibcon#ireg 7 cls_cnt 0 2006.229.18:29:21.40#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:29:21.52#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:29:21.52#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:29:21.52#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:29:21.52#ibcon#first serial, iclass 36, count 0 2006.229.18:29:21.52#ibcon#enter sib2, iclass 36, count 0 2006.229.18:29:21.52#ibcon#flushed, iclass 36, count 0 2006.229.18:29:21.52#ibcon#about to write, iclass 36, count 0 2006.229.18:29:21.52#ibcon#wrote, iclass 36, count 0 2006.229.18:29:21.52#ibcon#about to read 3, iclass 36, count 0 2006.229.18:29:21.54#ibcon#read 3, iclass 36, count 0 2006.229.18:29:21.54#ibcon#about to read 4, iclass 36, count 0 2006.229.18:29:21.54#ibcon#read 4, iclass 36, count 0 2006.229.18:29:21.54#ibcon#about to read 5, iclass 36, count 0 2006.229.18:29:21.54#ibcon#read 5, iclass 36, count 0 2006.229.18:29:21.54#ibcon#about to read 6, iclass 36, count 0 2006.229.18:29:21.54#ibcon#read 6, iclass 36, count 0 2006.229.18:29:21.54#ibcon#end of sib2, iclass 36, count 0 2006.229.18:29:21.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:29:21.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:29:21.54#ibcon#[27=USB\r\n] 2006.229.18:29:21.54#ibcon#*before write, iclass 36, count 0 2006.229.18:29:21.54#ibcon#enter sib2, iclass 36, count 0 2006.229.18:29:21.54#ibcon#flushed, iclass 36, count 0 2006.229.18:29:21.54#ibcon#about to write, iclass 36, count 0 2006.229.18:29:21.54#ibcon#wrote, iclass 36, count 0 2006.229.18:29:21.54#ibcon#about to read 3, iclass 36, count 0 2006.229.18:29:21.57#ibcon#read 3, iclass 36, count 0 2006.229.18:29:21.57#ibcon#about to read 4, iclass 36, count 0 2006.229.18:29:21.57#ibcon#read 4, iclass 36, count 0 2006.229.18:29:21.57#ibcon#about to read 5, iclass 36, count 0 2006.229.18:29:21.57#ibcon#read 5, iclass 36, count 0 2006.229.18:29:21.57#ibcon#about to read 6, iclass 36, count 0 2006.229.18:29:21.57#ibcon#read 6, iclass 36, count 0 2006.229.18:29:21.57#ibcon#end of sib2, iclass 36, count 0 2006.229.18:29:21.57#ibcon#*after write, iclass 36, count 0 2006.229.18:29:21.57#ibcon#*before return 0, iclass 36, count 0 2006.229.18:29:21.57#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:29:21.57#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:29:21.57#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:29:21.57#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:29:21.57$vck44/vabw=wide 2006.229.18:29:21.57#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.18:29:21.57#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.18:29:21.57#ibcon#ireg 8 cls_cnt 0 2006.229.18:29:21.57#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:21.57#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:21.57#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:21.57#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:29:21.57#ibcon#first serial, iclass 39, count 0 2006.229.18:29:21.57#ibcon#enter sib2, iclass 39, count 0 2006.229.18:29:21.57#ibcon#flushed, iclass 39, count 0 2006.229.18:29:21.57#ibcon#about to write, iclass 39, count 0 2006.229.18:29:21.57#ibcon#wrote, iclass 39, count 0 2006.229.18:29:21.57#ibcon#about to read 3, iclass 39, count 0 2006.229.18:29:21.59#ibcon#read 3, iclass 39, count 0 2006.229.18:29:21.59#ibcon#about to read 4, iclass 39, count 0 2006.229.18:29:21.59#ibcon#read 4, iclass 39, count 0 2006.229.18:29:21.59#ibcon#about to read 5, iclass 39, count 0 2006.229.18:29:21.59#ibcon#read 5, iclass 39, count 0 2006.229.18:29:21.59#ibcon#about to read 6, iclass 39, count 0 2006.229.18:29:21.59#ibcon#read 6, iclass 39, count 0 2006.229.18:29:21.59#ibcon#end of sib2, iclass 39, count 0 2006.229.18:29:21.59#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:29:21.59#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:29:21.59#ibcon#[25=BW32\r\n] 2006.229.18:29:21.59#ibcon#*before write, iclass 39, count 0 2006.229.18:29:21.59#ibcon#enter sib2, iclass 39, count 0 2006.229.18:29:21.59#ibcon#flushed, iclass 39, count 0 2006.229.18:29:21.59#ibcon#about to write, iclass 39, count 0 2006.229.18:29:21.59#ibcon#wrote, iclass 39, count 0 2006.229.18:29:21.59#ibcon#about to read 3, iclass 39, count 0 2006.229.18:29:21.62#ibcon#read 3, iclass 39, count 0 2006.229.18:29:21.62#ibcon#about to read 4, iclass 39, count 0 2006.229.18:29:21.62#ibcon#read 4, iclass 39, count 0 2006.229.18:29:21.62#ibcon#about to read 5, iclass 39, count 0 2006.229.18:29:21.62#ibcon#read 5, iclass 39, count 0 2006.229.18:29:21.62#ibcon#about to read 6, iclass 39, count 0 2006.229.18:29:21.62#ibcon#read 6, iclass 39, count 0 2006.229.18:29:21.62#ibcon#end of sib2, iclass 39, count 0 2006.229.18:29:21.62#ibcon#*after write, iclass 39, count 0 2006.229.18:29:21.62#ibcon#*before return 0, iclass 39, count 0 2006.229.18:29:21.62#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:21.62#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.18:29:21.62#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:29:21.62#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:29:21.62$vck44/vbbw=wide 2006.229.18:29:21.62#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.18:29:21.62#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.18:29:21.62#ibcon#ireg 8 cls_cnt 0 2006.229.18:29:21.62#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:29:21.69#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:29:21.69#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:29:21.69#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:29:21.69#ibcon#first serial, iclass 3, count 0 2006.229.18:29:21.69#ibcon#enter sib2, iclass 3, count 0 2006.229.18:29:21.69#ibcon#flushed, iclass 3, count 0 2006.229.18:29:21.69#ibcon#about to write, iclass 3, count 0 2006.229.18:29:21.69#ibcon#wrote, iclass 3, count 0 2006.229.18:29:21.69#ibcon#about to read 3, iclass 3, count 0 2006.229.18:29:21.71#ibcon#read 3, iclass 3, count 0 2006.229.18:29:21.71#ibcon#about to read 4, iclass 3, count 0 2006.229.18:29:21.71#ibcon#read 4, iclass 3, count 0 2006.229.18:29:21.71#ibcon#about to read 5, iclass 3, count 0 2006.229.18:29:21.71#ibcon#read 5, iclass 3, count 0 2006.229.18:29:21.71#ibcon#about to read 6, iclass 3, count 0 2006.229.18:29:21.71#ibcon#read 6, iclass 3, count 0 2006.229.18:29:21.71#ibcon#end of sib2, iclass 3, count 0 2006.229.18:29:21.71#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:29:21.71#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:29:21.71#ibcon#[27=BW32\r\n] 2006.229.18:29:21.71#ibcon#*before write, iclass 3, count 0 2006.229.18:29:21.71#ibcon#enter sib2, iclass 3, count 0 2006.229.18:29:21.71#ibcon#flushed, iclass 3, count 0 2006.229.18:29:21.71#ibcon#about to write, iclass 3, count 0 2006.229.18:29:21.71#ibcon#wrote, iclass 3, count 0 2006.229.18:29:21.71#ibcon#about to read 3, iclass 3, count 0 2006.229.18:29:21.74#ibcon#read 3, iclass 3, count 0 2006.229.18:29:21.74#ibcon#about to read 4, iclass 3, count 0 2006.229.18:29:21.74#ibcon#read 4, iclass 3, count 0 2006.229.18:29:21.74#ibcon#about to read 5, iclass 3, count 0 2006.229.18:29:21.74#ibcon#read 5, iclass 3, count 0 2006.229.18:29:21.74#ibcon#about to read 6, iclass 3, count 0 2006.229.18:29:21.74#ibcon#read 6, iclass 3, count 0 2006.229.18:29:21.74#ibcon#end of sib2, iclass 3, count 0 2006.229.18:29:21.74#ibcon#*after write, iclass 3, count 0 2006.229.18:29:21.74#ibcon#*before return 0, iclass 3, count 0 2006.229.18:29:21.74#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:29:21.74#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:29:21.74#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:29:21.74#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:29:21.74$setupk4/ifdk4 2006.229.18:29:21.74$ifdk4/lo= 2006.229.18:29:21.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:29:21.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:29:21.74$ifdk4/patch= 2006.229.18:29:21.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:29:21.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:29:21.75$setupk4/!*+20s 2006.229.18:29:31.41#abcon#<5=/07 0.6 1.4 26.391001001.4\r\n> 2006.229.18:29:31.43#abcon#{5=INTERFACE CLEAR} 2006.229.18:29:31.49#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:29:36.27$setupk4/"tpicd 2006.229.18:29:36.27$setupk4/echo=off 2006.229.18:29:36.27$setupk4/xlog=off 2006.229.18:29:36.27:!2006.229.18:31:18 2006.229.18:29:46.14#trakl#Source acquired 2006.229.18:29:47.14#flagr#flagr/antenna,acquired 2006.229.18:31:18.00:preob 2006.229.18:31:18.13/onsource/TRACKING 2006.229.18:31:18.13:!2006.229.18:31:28 2006.229.18:31:28.00:"tape 2006.229.18:31:28.00:"st=record 2006.229.18:31:28.00:data_valid=on 2006.229.18:31:28.00:midob 2006.229.18:31:29.13/onsource/TRACKING 2006.229.18:31:29.13/wx/26.37,1001.4,100 2006.229.18:31:29.26/cable/+6.4172E-03 2006.229.18:31:30.35/va/01,08,usb,yes,34,36 2006.229.18:31:30.35/va/02,07,usb,yes,36,37 2006.229.18:31:30.35/va/03,06,usb,yes,45,48 2006.229.18:31:30.35/va/04,07,usb,yes,38,39 2006.229.18:31:30.35/va/05,04,usb,yes,34,34 2006.229.18:31:30.35/va/06,04,usb,yes,38,37 2006.229.18:31:30.35/va/07,05,usb,yes,33,34 2006.229.18:31:30.35/va/08,06,usb,yes,24,30 2006.229.18:31:30.58/valo/01,524.99,yes,locked 2006.229.18:31:30.58/valo/02,534.99,yes,locked 2006.229.18:31:30.58/valo/03,564.99,yes,locked 2006.229.18:31:30.58/valo/04,624.99,yes,locked 2006.229.18:31:30.58/valo/05,734.99,yes,locked 2006.229.18:31:30.58/valo/06,814.99,yes,locked 2006.229.18:31:30.58/valo/07,864.99,yes,locked 2006.229.18:31:30.58/valo/08,884.99,yes,locked 2006.229.18:31:31.67/vb/01,04,usb,yes,32,30 2006.229.18:31:31.67/vb/02,04,usb,yes,34,34 2006.229.18:31:31.67/vb/03,04,usb,yes,31,34 2006.229.18:31:31.67/vb/04,04,usb,yes,36,35 2006.229.18:31:31.67/vb/05,04,usb,yes,28,31 2006.229.18:31:31.67/vb/06,04,usb,yes,33,29 2006.229.18:31:31.67/vb/07,04,usb,yes,33,33 2006.229.18:31:31.67/vb/08,04,usb,yes,30,34 2006.229.18:31:31.90/vblo/01,629.99,yes,locked 2006.229.18:31:31.90/vblo/02,634.99,yes,locked 2006.229.18:31:31.90/vblo/03,649.99,yes,locked 2006.229.18:31:31.90/vblo/04,679.99,yes,locked 2006.229.18:31:31.90/vblo/05,709.99,yes,locked 2006.229.18:31:31.90/vblo/06,719.99,yes,locked 2006.229.18:31:31.90/vblo/07,734.99,yes,locked 2006.229.18:31:31.90/vblo/08,744.99,yes,locked 2006.229.18:31:32.05/vabw/8 2006.229.18:31:32.20/vbbw/8 2006.229.18:31:32.29/xfe/off,on,12.2 2006.229.18:31:32.67/ifatt/23,28,28,28 2006.229.18:31:33.07/fmout-gps/S +4.48E-07 2006.229.18:31:33.11:!2006.229.18:35:38 2006.229.18:35:38.01:data_valid=off 2006.229.18:35:38.01:"et 2006.229.18:35:38.01:!+3s 2006.229.18:35:41.02:"tape 2006.229.18:35:41.02:postob 2006.229.18:35:41.21/cable/+6.4168E-03 2006.229.18:35:41.21/wx/26.34,1001.4,100 2006.229.18:35:41.27/fmout-gps/S +4.50E-07 2006.229.18:35:41.27:scan_name=229-1840,jd0608,290 2006.229.18:35:41.27:source=1803+784,180045.68,782804.0,2000.0,ccw 2006.229.18:35:43.14#flagr#flagr/antenna,new-source 2006.229.18:35:43.14:checkk5 2006.229.18:35:43.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:35:43.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:35:44.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:35:44.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:35:45.13/chk_obsdata//k5ts1/T2291831??a.dat file size is correct (nominal:1000MB, actual:996MB). 2006.229.18:35:45.54/chk_obsdata//k5ts2/T2291831??b.dat file size is correct (nominal:1000MB, actual:996MB). 2006.229.18:35:45.93/chk_obsdata//k5ts3/T2291831??c.dat file size is correct (nominal:1000MB, actual:996MB). 2006.229.18:35:46.33/chk_obsdata//k5ts4/T2291831??d.dat file size is correct (nominal:1000MB, actual:996MB). 2006.229.18:35:47.03/k5log//k5ts1_log_newline 2006.229.18:35:47.75/k5log//k5ts2_log_newline 2006.229.18:35:48.46/k5log//k5ts3_log_newline 2006.229.18:35:49.17/k5log//k5ts4_log_newline 2006.229.18:35:49.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:35:49.20:setupk4=1 2006.229.18:35:49.20$setupk4/echo=on 2006.229.18:35:49.20$setupk4/pcalon 2006.229.18:35:49.20$pcalon/"no phase cal control is implemented here 2006.229.18:35:49.20$setupk4/"tpicd=stop 2006.229.18:35:49.20$setupk4/"rec=synch_on 2006.229.18:35:49.20$setupk4/"rec_mode=128 2006.229.18:35:49.20$setupk4/!* 2006.229.18:35:49.20$setupk4/recpk4 2006.229.18:35:49.20$recpk4/recpatch= 2006.229.18:35:49.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:35:49.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:35:49.20$setupk4/vck44 2006.229.18:35:49.20$vck44/valo=1,524.99 2006.229.18:35:49.20#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.18:35:49.20#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.18:35:49.20#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:49.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:49.20#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:49.20#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:49.20#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:35:49.20#ibcon#first serial, iclass 18, count 0 2006.229.18:35:49.20#ibcon#enter sib2, iclass 18, count 0 2006.229.18:35:49.20#ibcon#flushed, iclass 18, count 0 2006.229.18:35:49.20#ibcon#about to write, iclass 18, count 0 2006.229.18:35:49.20#ibcon#wrote, iclass 18, count 0 2006.229.18:35:49.20#ibcon#about to read 3, iclass 18, count 0 2006.229.18:35:49.21#ibcon#read 3, iclass 18, count 0 2006.229.18:35:49.21#ibcon#about to read 4, iclass 18, count 0 2006.229.18:35:49.21#ibcon#read 4, iclass 18, count 0 2006.229.18:35:49.21#ibcon#about to read 5, iclass 18, count 0 2006.229.18:35:49.21#ibcon#read 5, iclass 18, count 0 2006.229.18:35:49.21#ibcon#about to read 6, iclass 18, count 0 2006.229.18:35:49.21#ibcon#read 6, iclass 18, count 0 2006.229.18:35:49.21#ibcon#end of sib2, iclass 18, count 0 2006.229.18:35:49.21#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:35:49.21#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:35:49.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:35:49.21#ibcon#*before write, iclass 18, count 0 2006.229.18:35:49.21#ibcon#enter sib2, iclass 18, count 0 2006.229.18:35:49.21#ibcon#flushed, iclass 18, count 0 2006.229.18:35:49.21#ibcon#about to write, iclass 18, count 0 2006.229.18:35:49.21#ibcon#wrote, iclass 18, count 0 2006.229.18:35:49.21#ibcon#about to read 3, iclass 18, count 0 2006.229.18:35:49.26#ibcon#read 3, iclass 18, count 0 2006.229.18:35:49.26#ibcon#about to read 4, iclass 18, count 0 2006.229.18:35:49.26#ibcon#read 4, iclass 18, count 0 2006.229.18:35:49.26#ibcon#about to read 5, iclass 18, count 0 2006.229.18:35:49.26#ibcon#read 5, iclass 18, count 0 2006.229.18:35:49.26#ibcon#about to read 6, iclass 18, count 0 2006.229.18:35:49.26#ibcon#read 6, iclass 18, count 0 2006.229.18:35:49.26#ibcon#end of sib2, iclass 18, count 0 2006.229.18:35:49.26#ibcon#*after write, iclass 18, count 0 2006.229.18:35:49.26#ibcon#*before return 0, iclass 18, count 0 2006.229.18:35:49.26#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:49.26#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:49.26#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:35:49.26#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:35:49.26$vck44/va=1,8 2006.229.18:35:49.26#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.18:35:49.26#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.18:35:49.26#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:49.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:49.26#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:49.26#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:49.26#ibcon#enter wrdev, iclass 20, count 2 2006.229.18:35:49.26#ibcon#first serial, iclass 20, count 2 2006.229.18:35:49.26#ibcon#enter sib2, iclass 20, count 2 2006.229.18:35:49.26#ibcon#flushed, iclass 20, count 2 2006.229.18:35:49.26#ibcon#about to write, iclass 20, count 2 2006.229.18:35:49.26#ibcon#wrote, iclass 20, count 2 2006.229.18:35:49.26#ibcon#about to read 3, iclass 20, count 2 2006.229.18:35:49.28#ibcon#read 3, iclass 20, count 2 2006.229.18:35:49.28#ibcon#about to read 4, iclass 20, count 2 2006.229.18:35:49.28#ibcon#read 4, iclass 20, count 2 2006.229.18:35:49.28#ibcon#about to read 5, iclass 20, count 2 2006.229.18:35:49.28#ibcon#read 5, iclass 20, count 2 2006.229.18:35:49.28#ibcon#about to read 6, iclass 20, count 2 2006.229.18:35:49.28#ibcon#read 6, iclass 20, count 2 2006.229.18:35:49.28#ibcon#end of sib2, iclass 20, count 2 2006.229.18:35:49.28#ibcon#*mode == 0, iclass 20, count 2 2006.229.18:35:49.28#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.18:35:49.28#ibcon#[25=AT01-08\r\n] 2006.229.18:35:49.28#ibcon#*before write, iclass 20, count 2 2006.229.18:35:49.28#ibcon#enter sib2, iclass 20, count 2 2006.229.18:35:49.28#ibcon#flushed, iclass 20, count 2 2006.229.18:35:49.28#ibcon#about to write, iclass 20, count 2 2006.229.18:35:49.28#ibcon#wrote, iclass 20, count 2 2006.229.18:35:49.28#ibcon#about to read 3, iclass 20, count 2 2006.229.18:35:49.31#ibcon#read 3, iclass 20, count 2 2006.229.18:35:49.31#ibcon#about to read 4, iclass 20, count 2 2006.229.18:35:49.31#ibcon#read 4, iclass 20, count 2 2006.229.18:35:49.31#ibcon#about to read 5, iclass 20, count 2 2006.229.18:35:49.31#ibcon#read 5, iclass 20, count 2 2006.229.18:35:49.31#ibcon#about to read 6, iclass 20, count 2 2006.229.18:35:49.31#ibcon#read 6, iclass 20, count 2 2006.229.18:35:49.31#ibcon#end of sib2, iclass 20, count 2 2006.229.18:35:49.31#ibcon#*after write, iclass 20, count 2 2006.229.18:35:49.31#ibcon#*before return 0, iclass 20, count 2 2006.229.18:35:49.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:49.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:49.31#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.18:35:49.31#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:49.31#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:49.43#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:49.43#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:49.43#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:35:49.43#ibcon#first serial, iclass 20, count 0 2006.229.18:35:49.43#ibcon#enter sib2, iclass 20, count 0 2006.229.18:35:49.43#ibcon#flushed, iclass 20, count 0 2006.229.18:35:49.43#ibcon#about to write, iclass 20, count 0 2006.229.18:35:49.43#ibcon#wrote, iclass 20, count 0 2006.229.18:35:49.43#ibcon#about to read 3, iclass 20, count 0 2006.229.18:35:49.45#ibcon#read 3, iclass 20, count 0 2006.229.18:35:49.45#ibcon#about to read 4, iclass 20, count 0 2006.229.18:35:49.45#ibcon#read 4, iclass 20, count 0 2006.229.18:35:49.45#ibcon#about to read 5, iclass 20, count 0 2006.229.18:35:49.45#ibcon#read 5, iclass 20, count 0 2006.229.18:35:49.45#ibcon#about to read 6, iclass 20, count 0 2006.229.18:35:49.45#ibcon#read 6, iclass 20, count 0 2006.229.18:35:49.45#ibcon#end of sib2, iclass 20, count 0 2006.229.18:35:49.45#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:35:49.45#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:35:49.45#ibcon#[25=USB\r\n] 2006.229.18:35:49.45#ibcon#*before write, iclass 20, count 0 2006.229.18:35:49.45#ibcon#enter sib2, iclass 20, count 0 2006.229.18:35:49.45#ibcon#flushed, iclass 20, count 0 2006.229.18:35:49.45#ibcon#about to write, iclass 20, count 0 2006.229.18:35:49.45#ibcon#wrote, iclass 20, count 0 2006.229.18:35:49.45#ibcon#about to read 3, iclass 20, count 0 2006.229.18:35:49.48#ibcon#read 3, iclass 20, count 0 2006.229.18:35:49.48#ibcon#about to read 4, iclass 20, count 0 2006.229.18:35:49.48#ibcon#read 4, iclass 20, count 0 2006.229.18:35:49.48#ibcon#about to read 5, iclass 20, count 0 2006.229.18:35:49.48#ibcon#read 5, iclass 20, count 0 2006.229.18:35:49.48#ibcon#about to read 6, iclass 20, count 0 2006.229.18:35:49.48#ibcon#read 6, iclass 20, count 0 2006.229.18:35:49.48#ibcon#end of sib2, iclass 20, count 0 2006.229.18:35:49.48#ibcon#*after write, iclass 20, count 0 2006.229.18:35:49.48#ibcon#*before return 0, iclass 20, count 0 2006.229.18:35:49.48#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:49.48#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:49.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:35:49.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:35:49.48$vck44/valo=2,534.99 2006.229.18:35:49.48#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.18:35:49.48#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.18:35:49.48#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:49.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:49.48#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:49.48#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:49.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:35:49.48#ibcon#first serial, iclass 22, count 0 2006.229.18:35:49.48#ibcon#enter sib2, iclass 22, count 0 2006.229.18:35:49.48#ibcon#flushed, iclass 22, count 0 2006.229.18:35:49.48#ibcon#about to write, iclass 22, count 0 2006.229.18:35:49.48#ibcon#wrote, iclass 22, count 0 2006.229.18:35:49.48#ibcon#about to read 3, iclass 22, count 0 2006.229.18:35:49.50#ibcon#read 3, iclass 22, count 0 2006.229.18:35:49.50#ibcon#about to read 4, iclass 22, count 0 2006.229.18:35:49.50#ibcon#read 4, iclass 22, count 0 2006.229.18:35:49.50#ibcon#about to read 5, iclass 22, count 0 2006.229.18:35:49.50#ibcon#read 5, iclass 22, count 0 2006.229.18:35:49.50#ibcon#about to read 6, iclass 22, count 0 2006.229.18:35:49.50#ibcon#read 6, iclass 22, count 0 2006.229.18:35:49.50#ibcon#end of sib2, iclass 22, count 0 2006.229.18:35:49.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:35:49.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:35:49.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:35:49.50#ibcon#*before write, iclass 22, count 0 2006.229.18:35:49.50#ibcon#enter sib2, iclass 22, count 0 2006.229.18:35:49.50#ibcon#flushed, iclass 22, count 0 2006.229.18:35:49.50#ibcon#about to write, iclass 22, count 0 2006.229.18:35:49.50#ibcon#wrote, iclass 22, count 0 2006.229.18:35:49.50#ibcon#about to read 3, iclass 22, count 0 2006.229.18:35:49.54#ibcon#read 3, iclass 22, count 0 2006.229.18:35:49.54#ibcon#about to read 4, iclass 22, count 0 2006.229.18:35:49.54#ibcon#read 4, iclass 22, count 0 2006.229.18:35:49.54#ibcon#about to read 5, iclass 22, count 0 2006.229.18:35:49.54#ibcon#read 5, iclass 22, count 0 2006.229.18:35:49.54#ibcon#about to read 6, iclass 22, count 0 2006.229.18:35:49.54#ibcon#read 6, iclass 22, count 0 2006.229.18:35:49.54#ibcon#end of sib2, iclass 22, count 0 2006.229.18:35:49.54#ibcon#*after write, iclass 22, count 0 2006.229.18:35:49.54#ibcon#*before return 0, iclass 22, count 0 2006.229.18:35:49.54#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:49.54#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:49.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:35:49.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:35:49.54$vck44/va=2,7 2006.229.18:35:49.54#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.18:35:49.54#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.18:35:49.54#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:49.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:49.60#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:49.60#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:49.60#ibcon#enter wrdev, iclass 24, count 2 2006.229.18:35:49.60#ibcon#first serial, iclass 24, count 2 2006.229.18:35:49.60#ibcon#enter sib2, iclass 24, count 2 2006.229.18:35:49.60#ibcon#flushed, iclass 24, count 2 2006.229.18:35:49.60#ibcon#about to write, iclass 24, count 2 2006.229.18:35:49.60#ibcon#wrote, iclass 24, count 2 2006.229.18:35:49.60#ibcon#about to read 3, iclass 24, count 2 2006.229.18:35:49.62#ibcon#read 3, iclass 24, count 2 2006.229.18:35:49.62#ibcon#about to read 4, iclass 24, count 2 2006.229.18:35:49.62#ibcon#read 4, iclass 24, count 2 2006.229.18:35:49.62#ibcon#about to read 5, iclass 24, count 2 2006.229.18:35:49.62#ibcon#read 5, iclass 24, count 2 2006.229.18:35:49.62#ibcon#about to read 6, iclass 24, count 2 2006.229.18:35:49.62#ibcon#read 6, iclass 24, count 2 2006.229.18:35:49.62#ibcon#end of sib2, iclass 24, count 2 2006.229.18:35:49.62#ibcon#*mode == 0, iclass 24, count 2 2006.229.18:35:49.62#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.18:35:49.62#ibcon#[25=AT02-07\r\n] 2006.229.18:35:49.62#ibcon#*before write, iclass 24, count 2 2006.229.18:35:49.62#ibcon#enter sib2, iclass 24, count 2 2006.229.18:35:49.62#ibcon#flushed, iclass 24, count 2 2006.229.18:35:49.62#ibcon#about to write, iclass 24, count 2 2006.229.18:35:49.62#ibcon#wrote, iclass 24, count 2 2006.229.18:35:49.62#ibcon#about to read 3, iclass 24, count 2 2006.229.18:35:49.65#ibcon#read 3, iclass 24, count 2 2006.229.18:35:49.65#ibcon#about to read 4, iclass 24, count 2 2006.229.18:35:49.65#ibcon#read 4, iclass 24, count 2 2006.229.18:35:49.65#ibcon#about to read 5, iclass 24, count 2 2006.229.18:35:49.65#ibcon#read 5, iclass 24, count 2 2006.229.18:35:49.65#ibcon#about to read 6, iclass 24, count 2 2006.229.18:35:49.65#ibcon#read 6, iclass 24, count 2 2006.229.18:35:49.65#ibcon#end of sib2, iclass 24, count 2 2006.229.18:35:49.65#ibcon#*after write, iclass 24, count 2 2006.229.18:35:49.65#ibcon#*before return 0, iclass 24, count 2 2006.229.18:35:49.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:49.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:49.65#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.18:35:49.65#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:49.65#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:49.77#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:49.77#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:49.77#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:35:49.77#ibcon#first serial, iclass 24, count 0 2006.229.18:35:49.77#ibcon#enter sib2, iclass 24, count 0 2006.229.18:35:49.77#ibcon#flushed, iclass 24, count 0 2006.229.18:35:49.77#ibcon#about to write, iclass 24, count 0 2006.229.18:35:49.77#ibcon#wrote, iclass 24, count 0 2006.229.18:35:49.77#ibcon#about to read 3, iclass 24, count 0 2006.229.18:35:49.79#ibcon#read 3, iclass 24, count 0 2006.229.18:35:49.79#ibcon#about to read 4, iclass 24, count 0 2006.229.18:35:49.79#ibcon#read 4, iclass 24, count 0 2006.229.18:35:49.79#ibcon#about to read 5, iclass 24, count 0 2006.229.18:35:49.79#ibcon#read 5, iclass 24, count 0 2006.229.18:35:49.79#ibcon#about to read 6, iclass 24, count 0 2006.229.18:35:49.79#ibcon#read 6, iclass 24, count 0 2006.229.18:35:49.79#ibcon#end of sib2, iclass 24, count 0 2006.229.18:35:49.79#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:35:49.79#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:35:49.79#ibcon#[25=USB\r\n] 2006.229.18:35:49.79#ibcon#*before write, iclass 24, count 0 2006.229.18:35:49.79#ibcon#enter sib2, iclass 24, count 0 2006.229.18:35:49.79#ibcon#flushed, iclass 24, count 0 2006.229.18:35:49.79#ibcon#about to write, iclass 24, count 0 2006.229.18:35:49.79#ibcon#wrote, iclass 24, count 0 2006.229.18:35:49.79#ibcon#about to read 3, iclass 24, count 0 2006.229.18:35:49.82#ibcon#read 3, iclass 24, count 0 2006.229.18:35:49.82#ibcon#about to read 4, iclass 24, count 0 2006.229.18:35:49.82#ibcon#read 4, iclass 24, count 0 2006.229.18:35:49.82#ibcon#about to read 5, iclass 24, count 0 2006.229.18:35:49.82#ibcon#read 5, iclass 24, count 0 2006.229.18:35:49.82#ibcon#about to read 6, iclass 24, count 0 2006.229.18:35:49.82#ibcon#read 6, iclass 24, count 0 2006.229.18:35:49.82#ibcon#end of sib2, iclass 24, count 0 2006.229.18:35:49.82#ibcon#*after write, iclass 24, count 0 2006.229.18:35:49.82#ibcon#*before return 0, iclass 24, count 0 2006.229.18:35:49.82#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:49.82#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:49.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:35:49.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:35:49.82$vck44/valo=3,564.99 2006.229.18:35:49.82#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.18:35:49.82#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.18:35:49.82#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:49.82#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:49.82#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:49.82#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:49.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:35:49.82#ibcon#first serial, iclass 26, count 0 2006.229.18:35:49.82#ibcon#enter sib2, iclass 26, count 0 2006.229.18:35:49.82#ibcon#flushed, iclass 26, count 0 2006.229.18:35:49.82#ibcon#about to write, iclass 26, count 0 2006.229.18:35:49.82#ibcon#wrote, iclass 26, count 0 2006.229.18:35:49.82#ibcon#about to read 3, iclass 26, count 0 2006.229.18:35:49.84#ibcon#read 3, iclass 26, count 0 2006.229.18:35:49.84#ibcon#about to read 4, iclass 26, count 0 2006.229.18:35:49.84#ibcon#read 4, iclass 26, count 0 2006.229.18:35:49.84#ibcon#about to read 5, iclass 26, count 0 2006.229.18:35:49.84#ibcon#read 5, iclass 26, count 0 2006.229.18:35:49.84#ibcon#about to read 6, iclass 26, count 0 2006.229.18:35:49.84#ibcon#read 6, iclass 26, count 0 2006.229.18:35:49.84#ibcon#end of sib2, iclass 26, count 0 2006.229.18:35:49.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:35:49.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:35:49.84#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:35:49.84#ibcon#*before write, iclass 26, count 0 2006.229.18:35:49.84#ibcon#enter sib2, iclass 26, count 0 2006.229.18:35:49.84#ibcon#flushed, iclass 26, count 0 2006.229.18:35:49.84#ibcon#about to write, iclass 26, count 0 2006.229.18:35:49.84#ibcon#wrote, iclass 26, count 0 2006.229.18:35:49.84#ibcon#about to read 3, iclass 26, count 0 2006.229.18:35:49.88#ibcon#read 3, iclass 26, count 0 2006.229.18:35:49.88#ibcon#about to read 4, iclass 26, count 0 2006.229.18:35:49.88#ibcon#read 4, iclass 26, count 0 2006.229.18:35:49.88#ibcon#about to read 5, iclass 26, count 0 2006.229.18:35:49.88#ibcon#read 5, iclass 26, count 0 2006.229.18:35:49.88#ibcon#about to read 6, iclass 26, count 0 2006.229.18:35:49.88#ibcon#read 6, iclass 26, count 0 2006.229.18:35:49.88#ibcon#end of sib2, iclass 26, count 0 2006.229.18:35:49.88#ibcon#*after write, iclass 26, count 0 2006.229.18:35:49.88#ibcon#*before return 0, iclass 26, count 0 2006.229.18:35:49.88#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:49.88#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:49.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:35:49.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:35:49.88$vck44/va=3,6 2006.229.18:35:49.88#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.18:35:49.88#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.18:35:49.88#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:49.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:49.94#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:49.94#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:49.94#ibcon#enter wrdev, iclass 28, count 2 2006.229.18:35:49.94#ibcon#first serial, iclass 28, count 2 2006.229.18:35:49.94#ibcon#enter sib2, iclass 28, count 2 2006.229.18:35:49.94#ibcon#flushed, iclass 28, count 2 2006.229.18:35:49.94#ibcon#about to write, iclass 28, count 2 2006.229.18:35:49.94#ibcon#wrote, iclass 28, count 2 2006.229.18:35:49.94#ibcon#about to read 3, iclass 28, count 2 2006.229.18:35:49.96#ibcon#read 3, iclass 28, count 2 2006.229.18:35:49.96#ibcon#about to read 4, iclass 28, count 2 2006.229.18:35:49.96#ibcon#read 4, iclass 28, count 2 2006.229.18:35:49.96#ibcon#about to read 5, iclass 28, count 2 2006.229.18:35:49.96#ibcon#read 5, iclass 28, count 2 2006.229.18:35:49.96#ibcon#about to read 6, iclass 28, count 2 2006.229.18:35:49.96#ibcon#read 6, iclass 28, count 2 2006.229.18:35:49.96#ibcon#end of sib2, iclass 28, count 2 2006.229.18:35:49.96#ibcon#*mode == 0, iclass 28, count 2 2006.229.18:35:49.96#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.18:35:49.96#ibcon#[25=AT03-06\r\n] 2006.229.18:35:49.96#ibcon#*before write, iclass 28, count 2 2006.229.18:35:49.96#ibcon#enter sib2, iclass 28, count 2 2006.229.18:35:49.96#ibcon#flushed, iclass 28, count 2 2006.229.18:35:49.96#ibcon#about to write, iclass 28, count 2 2006.229.18:35:49.96#ibcon#wrote, iclass 28, count 2 2006.229.18:35:49.96#ibcon#about to read 3, iclass 28, count 2 2006.229.18:35:49.99#ibcon#read 3, iclass 28, count 2 2006.229.18:35:49.99#ibcon#about to read 4, iclass 28, count 2 2006.229.18:35:49.99#ibcon#read 4, iclass 28, count 2 2006.229.18:35:49.99#ibcon#about to read 5, iclass 28, count 2 2006.229.18:35:49.99#ibcon#read 5, iclass 28, count 2 2006.229.18:35:49.99#ibcon#about to read 6, iclass 28, count 2 2006.229.18:35:49.99#ibcon#read 6, iclass 28, count 2 2006.229.18:35:49.99#ibcon#end of sib2, iclass 28, count 2 2006.229.18:35:49.99#ibcon#*after write, iclass 28, count 2 2006.229.18:35:49.99#ibcon#*before return 0, iclass 28, count 2 2006.229.18:35:49.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:49.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:49.99#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.18:35:49.99#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:49.99#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:50.11#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:50.11#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:50.11#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:35:50.11#ibcon#first serial, iclass 28, count 0 2006.229.18:35:50.11#ibcon#enter sib2, iclass 28, count 0 2006.229.18:35:50.11#ibcon#flushed, iclass 28, count 0 2006.229.18:35:50.11#ibcon#about to write, iclass 28, count 0 2006.229.18:35:50.11#ibcon#wrote, iclass 28, count 0 2006.229.18:35:50.11#ibcon#about to read 3, iclass 28, count 0 2006.229.18:35:50.13#ibcon#read 3, iclass 28, count 0 2006.229.18:35:50.13#ibcon#about to read 4, iclass 28, count 0 2006.229.18:35:50.13#ibcon#read 4, iclass 28, count 0 2006.229.18:35:50.13#ibcon#about to read 5, iclass 28, count 0 2006.229.18:35:50.13#ibcon#read 5, iclass 28, count 0 2006.229.18:35:50.13#ibcon#about to read 6, iclass 28, count 0 2006.229.18:35:50.13#ibcon#read 6, iclass 28, count 0 2006.229.18:35:50.13#ibcon#end of sib2, iclass 28, count 0 2006.229.18:35:50.13#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:35:50.13#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:35:50.13#ibcon#[25=USB\r\n] 2006.229.18:35:50.13#ibcon#*before write, iclass 28, count 0 2006.229.18:35:50.13#ibcon#enter sib2, iclass 28, count 0 2006.229.18:35:50.13#ibcon#flushed, iclass 28, count 0 2006.229.18:35:50.13#ibcon#about to write, iclass 28, count 0 2006.229.18:35:50.13#ibcon#wrote, iclass 28, count 0 2006.229.18:35:50.13#ibcon#about to read 3, iclass 28, count 0 2006.229.18:35:50.16#ibcon#read 3, iclass 28, count 0 2006.229.18:35:50.16#ibcon#about to read 4, iclass 28, count 0 2006.229.18:35:50.16#ibcon#read 4, iclass 28, count 0 2006.229.18:35:50.16#ibcon#about to read 5, iclass 28, count 0 2006.229.18:35:50.16#ibcon#read 5, iclass 28, count 0 2006.229.18:35:50.16#ibcon#about to read 6, iclass 28, count 0 2006.229.18:35:50.16#ibcon#read 6, iclass 28, count 0 2006.229.18:35:50.16#ibcon#end of sib2, iclass 28, count 0 2006.229.18:35:50.16#ibcon#*after write, iclass 28, count 0 2006.229.18:35:50.16#ibcon#*before return 0, iclass 28, count 0 2006.229.18:35:50.16#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:50.16#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:50.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:35:50.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:35:50.16$vck44/valo=4,624.99 2006.229.18:35:50.16#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.18:35:50.16#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.18:35:50.16#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:50.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:50.16#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:50.16#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:50.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:35:50.16#ibcon#first serial, iclass 30, count 0 2006.229.18:35:50.16#ibcon#enter sib2, iclass 30, count 0 2006.229.18:35:50.16#ibcon#flushed, iclass 30, count 0 2006.229.18:35:50.16#ibcon#about to write, iclass 30, count 0 2006.229.18:35:50.16#ibcon#wrote, iclass 30, count 0 2006.229.18:35:50.16#ibcon#about to read 3, iclass 30, count 0 2006.229.18:35:50.18#ibcon#read 3, iclass 30, count 0 2006.229.18:35:50.18#ibcon#about to read 4, iclass 30, count 0 2006.229.18:35:50.18#ibcon#read 4, iclass 30, count 0 2006.229.18:35:50.18#ibcon#about to read 5, iclass 30, count 0 2006.229.18:35:50.18#ibcon#read 5, iclass 30, count 0 2006.229.18:35:50.18#ibcon#about to read 6, iclass 30, count 0 2006.229.18:35:50.18#ibcon#read 6, iclass 30, count 0 2006.229.18:35:50.18#ibcon#end of sib2, iclass 30, count 0 2006.229.18:35:50.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:35:50.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:35:50.18#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:35:50.18#ibcon#*before write, iclass 30, count 0 2006.229.18:35:50.18#ibcon#enter sib2, iclass 30, count 0 2006.229.18:35:50.18#ibcon#flushed, iclass 30, count 0 2006.229.18:35:50.18#ibcon#about to write, iclass 30, count 0 2006.229.18:35:50.18#ibcon#wrote, iclass 30, count 0 2006.229.18:35:50.18#ibcon#about to read 3, iclass 30, count 0 2006.229.18:35:50.22#ibcon#read 3, iclass 30, count 0 2006.229.18:35:50.22#ibcon#about to read 4, iclass 30, count 0 2006.229.18:35:50.22#ibcon#read 4, iclass 30, count 0 2006.229.18:35:50.22#ibcon#about to read 5, iclass 30, count 0 2006.229.18:35:50.22#ibcon#read 5, iclass 30, count 0 2006.229.18:35:50.22#ibcon#about to read 6, iclass 30, count 0 2006.229.18:35:50.22#ibcon#read 6, iclass 30, count 0 2006.229.18:35:50.22#ibcon#end of sib2, iclass 30, count 0 2006.229.18:35:50.22#ibcon#*after write, iclass 30, count 0 2006.229.18:35:50.22#ibcon#*before return 0, iclass 30, count 0 2006.229.18:35:50.22#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:50.22#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:50.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:35:50.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:35:50.22$vck44/va=4,7 2006.229.18:35:50.22#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.18:35:50.22#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.18:35:50.22#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:50.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:50.28#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:50.28#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:50.28#ibcon#enter wrdev, iclass 32, count 2 2006.229.18:35:50.28#ibcon#first serial, iclass 32, count 2 2006.229.18:35:50.28#ibcon#enter sib2, iclass 32, count 2 2006.229.18:35:50.28#ibcon#flushed, iclass 32, count 2 2006.229.18:35:50.28#ibcon#about to write, iclass 32, count 2 2006.229.18:35:50.28#ibcon#wrote, iclass 32, count 2 2006.229.18:35:50.28#ibcon#about to read 3, iclass 32, count 2 2006.229.18:35:50.30#ibcon#read 3, iclass 32, count 2 2006.229.18:35:50.30#ibcon#about to read 4, iclass 32, count 2 2006.229.18:35:50.30#ibcon#read 4, iclass 32, count 2 2006.229.18:35:50.30#ibcon#about to read 5, iclass 32, count 2 2006.229.18:35:50.30#ibcon#read 5, iclass 32, count 2 2006.229.18:35:50.30#ibcon#about to read 6, iclass 32, count 2 2006.229.18:35:50.30#ibcon#read 6, iclass 32, count 2 2006.229.18:35:50.30#ibcon#end of sib2, iclass 32, count 2 2006.229.18:35:50.30#ibcon#*mode == 0, iclass 32, count 2 2006.229.18:35:50.30#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.18:35:50.30#ibcon#[25=AT04-07\r\n] 2006.229.18:35:50.30#ibcon#*before write, iclass 32, count 2 2006.229.18:35:50.30#ibcon#enter sib2, iclass 32, count 2 2006.229.18:35:50.30#ibcon#flushed, iclass 32, count 2 2006.229.18:35:50.30#ibcon#about to write, iclass 32, count 2 2006.229.18:35:50.30#ibcon#wrote, iclass 32, count 2 2006.229.18:35:50.30#ibcon#about to read 3, iclass 32, count 2 2006.229.18:35:50.33#ibcon#read 3, iclass 32, count 2 2006.229.18:35:50.33#ibcon#about to read 4, iclass 32, count 2 2006.229.18:35:50.33#ibcon#read 4, iclass 32, count 2 2006.229.18:35:50.33#ibcon#about to read 5, iclass 32, count 2 2006.229.18:35:50.33#ibcon#read 5, iclass 32, count 2 2006.229.18:35:50.33#ibcon#about to read 6, iclass 32, count 2 2006.229.18:35:50.33#ibcon#read 6, iclass 32, count 2 2006.229.18:35:50.33#ibcon#end of sib2, iclass 32, count 2 2006.229.18:35:50.33#ibcon#*after write, iclass 32, count 2 2006.229.18:35:50.33#ibcon#*before return 0, iclass 32, count 2 2006.229.18:35:50.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:50.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:50.33#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.18:35:50.33#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:50.33#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:50.45#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:50.45#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:50.45#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:35:50.45#ibcon#first serial, iclass 32, count 0 2006.229.18:35:50.45#ibcon#enter sib2, iclass 32, count 0 2006.229.18:35:50.45#ibcon#flushed, iclass 32, count 0 2006.229.18:35:50.45#ibcon#about to write, iclass 32, count 0 2006.229.18:35:50.45#ibcon#wrote, iclass 32, count 0 2006.229.18:35:50.45#ibcon#about to read 3, iclass 32, count 0 2006.229.18:35:50.47#ibcon#read 3, iclass 32, count 0 2006.229.18:35:50.47#ibcon#about to read 4, iclass 32, count 0 2006.229.18:35:50.47#ibcon#read 4, iclass 32, count 0 2006.229.18:35:50.47#ibcon#about to read 5, iclass 32, count 0 2006.229.18:35:50.47#ibcon#read 5, iclass 32, count 0 2006.229.18:35:50.47#ibcon#about to read 6, iclass 32, count 0 2006.229.18:35:50.47#ibcon#read 6, iclass 32, count 0 2006.229.18:35:50.47#ibcon#end of sib2, iclass 32, count 0 2006.229.18:35:50.47#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:35:50.47#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:35:50.47#ibcon#[25=USB\r\n] 2006.229.18:35:50.47#ibcon#*before write, iclass 32, count 0 2006.229.18:35:50.47#ibcon#enter sib2, iclass 32, count 0 2006.229.18:35:50.47#ibcon#flushed, iclass 32, count 0 2006.229.18:35:50.47#ibcon#about to write, iclass 32, count 0 2006.229.18:35:50.47#ibcon#wrote, iclass 32, count 0 2006.229.18:35:50.47#ibcon#about to read 3, iclass 32, count 0 2006.229.18:35:50.50#ibcon#read 3, iclass 32, count 0 2006.229.18:35:50.50#ibcon#about to read 4, iclass 32, count 0 2006.229.18:35:50.50#ibcon#read 4, iclass 32, count 0 2006.229.18:35:50.50#ibcon#about to read 5, iclass 32, count 0 2006.229.18:35:50.50#ibcon#read 5, iclass 32, count 0 2006.229.18:35:50.50#ibcon#about to read 6, iclass 32, count 0 2006.229.18:35:50.50#ibcon#read 6, iclass 32, count 0 2006.229.18:35:50.50#ibcon#end of sib2, iclass 32, count 0 2006.229.18:35:50.50#ibcon#*after write, iclass 32, count 0 2006.229.18:35:50.50#ibcon#*before return 0, iclass 32, count 0 2006.229.18:35:50.50#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:50.50#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:50.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:35:50.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:35:50.50$vck44/valo=5,734.99 2006.229.18:35:50.50#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.18:35:50.50#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.18:35:50.50#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:50.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:50.50#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:50.50#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:50.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:35:50.50#ibcon#first serial, iclass 34, count 0 2006.229.18:35:50.50#ibcon#enter sib2, iclass 34, count 0 2006.229.18:35:50.50#ibcon#flushed, iclass 34, count 0 2006.229.18:35:50.50#ibcon#about to write, iclass 34, count 0 2006.229.18:35:50.50#ibcon#wrote, iclass 34, count 0 2006.229.18:35:50.50#ibcon#about to read 3, iclass 34, count 0 2006.229.18:35:50.52#ibcon#read 3, iclass 34, count 0 2006.229.18:35:50.52#ibcon#about to read 4, iclass 34, count 0 2006.229.18:35:50.52#ibcon#read 4, iclass 34, count 0 2006.229.18:35:50.52#ibcon#about to read 5, iclass 34, count 0 2006.229.18:35:50.52#ibcon#read 5, iclass 34, count 0 2006.229.18:35:50.52#ibcon#about to read 6, iclass 34, count 0 2006.229.18:35:50.52#ibcon#read 6, iclass 34, count 0 2006.229.18:35:50.52#ibcon#end of sib2, iclass 34, count 0 2006.229.18:35:50.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:35:50.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:35:50.52#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:35:50.52#ibcon#*before write, iclass 34, count 0 2006.229.18:35:50.52#ibcon#enter sib2, iclass 34, count 0 2006.229.18:35:50.52#ibcon#flushed, iclass 34, count 0 2006.229.18:35:50.52#ibcon#about to write, iclass 34, count 0 2006.229.18:35:50.52#ibcon#wrote, iclass 34, count 0 2006.229.18:35:50.52#ibcon#about to read 3, iclass 34, count 0 2006.229.18:35:50.56#ibcon#read 3, iclass 34, count 0 2006.229.18:35:50.56#ibcon#about to read 4, iclass 34, count 0 2006.229.18:35:50.56#ibcon#read 4, iclass 34, count 0 2006.229.18:35:50.56#ibcon#about to read 5, iclass 34, count 0 2006.229.18:35:50.56#ibcon#read 5, iclass 34, count 0 2006.229.18:35:50.56#ibcon#about to read 6, iclass 34, count 0 2006.229.18:35:50.56#ibcon#read 6, iclass 34, count 0 2006.229.18:35:50.56#ibcon#end of sib2, iclass 34, count 0 2006.229.18:35:50.56#ibcon#*after write, iclass 34, count 0 2006.229.18:35:50.56#ibcon#*before return 0, iclass 34, count 0 2006.229.18:35:50.56#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:50.56#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:50.56#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:35:50.56#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:35:50.56$vck44/va=5,4 2006.229.18:35:50.56#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.18:35:50.56#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.18:35:50.56#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:50.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:50.62#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:50.62#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:50.62#ibcon#enter wrdev, iclass 36, count 2 2006.229.18:35:50.62#ibcon#first serial, iclass 36, count 2 2006.229.18:35:50.62#ibcon#enter sib2, iclass 36, count 2 2006.229.18:35:50.62#ibcon#flushed, iclass 36, count 2 2006.229.18:35:50.62#ibcon#about to write, iclass 36, count 2 2006.229.18:35:50.62#ibcon#wrote, iclass 36, count 2 2006.229.18:35:50.62#ibcon#about to read 3, iclass 36, count 2 2006.229.18:35:50.64#ibcon#read 3, iclass 36, count 2 2006.229.18:35:50.64#ibcon#about to read 4, iclass 36, count 2 2006.229.18:35:50.64#ibcon#read 4, iclass 36, count 2 2006.229.18:35:50.64#ibcon#about to read 5, iclass 36, count 2 2006.229.18:35:50.64#ibcon#read 5, iclass 36, count 2 2006.229.18:35:50.64#ibcon#about to read 6, iclass 36, count 2 2006.229.18:35:50.64#ibcon#read 6, iclass 36, count 2 2006.229.18:35:50.64#ibcon#end of sib2, iclass 36, count 2 2006.229.18:35:50.64#ibcon#*mode == 0, iclass 36, count 2 2006.229.18:35:50.64#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.18:35:50.64#ibcon#[25=AT05-04\r\n] 2006.229.18:35:50.64#ibcon#*before write, iclass 36, count 2 2006.229.18:35:50.64#ibcon#enter sib2, iclass 36, count 2 2006.229.18:35:50.64#ibcon#flushed, iclass 36, count 2 2006.229.18:35:50.64#ibcon#about to write, iclass 36, count 2 2006.229.18:35:50.64#ibcon#wrote, iclass 36, count 2 2006.229.18:35:50.64#ibcon#about to read 3, iclass 36, count 2 2006.229.18:35:50.67#ibcon#read 3, iclass 36, count 2 2006.229.18:35:50.67#ibcon#about to read 4, iclass 36, count 2 2006.229.18:35:50.67#ibcon#read 4, iclass 36, count 2 2006.229.18:35:50.67#ibcon#about to read 5, iclass 36, count 2 2006.229.18:35:50.67#ibcon#read 5, iclass 36, count 2 2006.229.18:35:50.67#ibcon#about to read 6, iclass 36, count 2 2006.229.18:35:50.67#ibcon#read 6, iclass 36, count 2 2006.229.18:35:50.67#ibcon#end of sib2, iclass 36, count 2 2006.229.18:35:50.67#ibcon#*after write, iclass 36, count 2 2006.229.18:35:50.67#ibcon#*before return 0, iclass 36, count 2 2006.229.18:35:50.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:50.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:50.67#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.18:35:50.67#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:50.67#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:50.79#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:50.79#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:50.79#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:35:50.79#ibcon#first serial, iclass 36, count 0 2006.229.18:35:50.79#ibcon#enter sib2, iclass 36, count 0 2006.229.18:35:50.79#ibcon#flushed, iclass 36, count 0 2006.229.18:35:50.79#ibcon#about to write, iclass 36, count 0 2006.229.18:35:50.79#ibcon#wrote, iclass 36, count 0 2006.229.18:35:50.79#ibcon#about to read 3, iclass 36, count 0 2006.229.18:35:50.81#ibcon#read 3, iclass 36, count 0 2006.229.18:35:50.81#ibcon#about to read 4, iclass 36, count 0 2006.229.18:35:50.81#ibcon#read 4, iclass 36, count 0 2006.229.18:35:50.81#ibcon#about to read 5, iclass 36, count 0 2006.229.18:35:50.81#ibcon#read 5, iclass 36, count 0 2006.229.18:35:50.81#ibcon#about to read 6, iclass 36, count 0 2006.229.18:35:50.81#ibcon#read 6, iclass 36, count 0 2006.229.18:35:50.81#ibcon#end of sib2, iclass 36, count 0 2006.229.18:35:50.81#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:35:50.81#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:35:50.81#ibcon#[25=USB\r\n] 2006.229.18:35:50.81#ibcon#*before write, iclass 36, count 0 2006.229.18:35:50.81#ibcon#enter sib2, iclass 36, count 0 2006.229.18:35:50.81#ibcon#flushed, iclass 36, count 0 2006.229.18:35:50.81#ibcon#about to write, iclass 36, count 0 2006.229.18:35:50.81#ibcon#wrote, iclass 36, count 0 2006.229.18:35:50.81#ibcon#about to read 3, iclass 36, count 0 2006.229.18:35:50.84#ibcon#read 3, iclass 36, count 0 2006.229.18:35:50.84#ibcon#about to read 4, iclass 36, count 0 2006.229.18:35:50.84#ibcon#read 4, iclass 36, count 0 2006.229.18:35:50.84#ibcon#about to read 5, iclass 36, count 0 2006.229.18:35:50.84#ibcon#read 5, iclass 36, count 0 2006.229.18:35:50.84#ibcon#about to read 6, iclass 36, count 0 2006.229.18:35:50.84#ibcon#read 6, iclass 36, count 0 2006.229.18:35:50.84#ibcon#end of sib2, iclass 36, count 0 2006.229.18:35:50.84#ibcon#*after write, iclass 36, count 0 2006.229.18:35:50.84#ibcon#*before return 0, iclass 36, count 0 2006.229.18:35:50.84#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:50.84#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:50.84#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:35:50.84#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:35:50.84$vck44/valo=6,814.99 2006.229.18:35:50.84#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.18:35:50.84#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.18:35:50.84#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:50.84#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:50.84#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:50.84#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:50.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:35:50.84#ibcon#first serial, iclass 38, count 0 2006.229.18:35:50.84#ibcon#enter sib2, iclass 38, count 0 2006.229.18:35:50.84#ibcon#flushed, iclass 38, count 0 2006.229.18:35:50.84#ibcon#about to write, iclass 38, count 0 2006.229.18:35:50.84#ibcon#wrote, iclass 38, count 0 2006.229.18:35:50.84#ibcon#about to read 3, iclass 38, count 0 2006.229.18:35:50.86#ibcon#read 3, iclass 38, count 0 2006.229.18:35:50.86#ibcon#about to read 4, iclass 38, count 0 2006.229.18:35:50.86#ibcon#read 4, iclass 38, count 0 2006.229.18:35:50.86#ibcon#about to read 5, iclass 38, count 0 2006.229.18:35:50.86#ibcon#read 5, iclass 38, count 0 2006.229.18:35:50.86#ibcon#about to read 6, iclass 38, count 0 2006.229.18:35:50.86#ibcon#read 6, iclass 38, count 0 2006.229.18:35:50.86#ibcon#end of sib2, iclass 38, count 0 2006.229.18:35:50.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:35:50.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:35:50.86#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:35:50.86#ibcon#*before write, iclass 38, count 0 2006.229.18:35:50.86#ibcon#enter sib2, iclass 38, count 0 2006.229.18:35:50.86#ibcon#flushed, iclass 38, count 0 2006.229.18:35:50.86#ibcon#about to write, iclass 38, count 0 2006.229.18:35:50.86#ibcon#wrote, iclass 38, count 0 2006.229.18:35:50.86#ibcon#about to read 3, iclass 38, count 0 2006.229.18:35:50.90#ibcon#read 3, iclass 38, count 0 2006.229.18:35:50.90#ibcon#about to read 4, iclass 38, count 0 2006.229.18:35:50.90#ibcon#read 4, iclass 38, count 0 2006.229.18:35:50.90#ibcon#about to read 5, iclass 38, count 0 2006.229.18:35:50.90#ibcon#read 5, iclass 38, count 0 2006.229.18:35:50.90#ibcon#about to read 6, iclass 38, count 0 2006.229.18:35:50.90#ibcon#read 6, iclass 38, count 0 2006.229.18:35:50.90#ibcon#end of sib2, iclass 38, count 0 2006.229.18:35:50.90#ibcon#*after write, iclass 38, count 0 2006.229.18:35:50.90#ibcon#*before return 0, iclass 38, count 0 2006.229.18:35:50.90#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:50.90#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:50.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:35:50.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:35:50.90$vck44/va=6,4 2006.229.18:35:50.90#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.18:35:50.90#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.18:35:50.90#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:50.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:50.96#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:50.96#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:50.96#ibcon#enter wrdev, iclass 40, count 2 2006.229.18:35:50.96#ibcon#first serial, iclass 40, count 2 2006.229.18:35:50.96#ibcon#enter sib2, iclass 40, count 2 2006.229.18:35:50.96#ibcon#flushed, iclass 40, count 2 2006.229.18:35:50.96#ibcon#about to write, iclass 40, count 2 2006.229.18:35:50.96#ibcon#wrote, iclass 40, count 2 2006.229.18:35:50.96#ibcon#about to read 3, iclass 40, count 2 2006.229.18:35:50.98#ibcon#read 3, iclass 40, count 2 2006.229.18:35:50.98#ibcon#about to read 4, iclass 40, count 2 2006.229.18:35:50.98#ibcon#read 4, iclass 40, count 2 2006.229.18:35:50.98#ibcon#about to read 5, iclass 40, count 2 2006.229.18:35:50.98#ibcon#read 5, iclass 40, count 2 2006.229.18:35:50.98#ibcon#about to read 6, iclass 40, count 2 2006.229.18:35:50.98#ibcon#read 6, iclass 40, count 2 2006.229.18:35:50.98#ibcon#end of sib2, iclass 40, count 2 2006.229.18:35:50.98#ibcon#*mode == 0, iclass 40, count 2 2006.229.18:35:50.98#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.18:35:50.98#ibcon#[25=AT06-04\r\n] 2006.229.18:35:50.98#ibcon#*before write, iclass 40, count 2 2006.229.18:35:50.98#ibcon#enter sib2, iclass 40, count 2 2006.229.18:35:50.98#ibcon#flushed, iclass 40, count 2 2006.229.18:35:50.98#ibcon#about to write, iclass 40, count 2 2006.229.18:35:50.98#ibcon#wrote, iclass 40, count 2 2006.229.18:35:50.98#ibcon#about to read 3, iclass 40, count 2 2006.229.18:35:51.01#ibcon#read 3, iclass 40, count 2 2006.229.18:35:51.01#ibcon#about to read 4, iclass 40, count 2 2006.229.18:35:51.01#ibcon#read 4, iclass 40, count 2 2006.229.18:35:51.01#ibcon#about to read 5, iclass 40, count 2 2006.229.18:35:51.01#ibcon#read 5, iclass 40, count 2 2006.229.18:35:51.01#ibcon#about to read 6, iclass 40, count 2 2006.229.18:35:51.01#ibcon#read 6, iclass 40, count 2 2006.229.18:35:51.01#ibcon#end of sib2, iclass 40, count 2 2006.229.18:35:51.01#ibcon#*after write, iclass 40, count 2 2006.229.18:35:51.01#ibcon#*before return 0, iclass 40, count 2 2006.229.18:35:51.01#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:51.01#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:51.01#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.18:35:51.01#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:51.01#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:51.13#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:51.13#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:51.13#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:35:51.13#ibcon#first serial, iclass 40, count 0 2006.229.18:35:51.13#ibcon#enter sib2, iclass 40, count 0 2006.229.18:35:51.13#ibcon#flushed, iclass 40, count 0 2006.229.18:35:51.13#ibcon#about to write, iclass 40, count 0 2006.229.18:35:51.13#ibcon#wrote, iclass 40, count 0 2006.229.18:35:51.13#ibcon#about to read 3, iclass 40, count 0 2006.229.18:35:51.15#ibcon#read 3, iclass 40, count 0 2006.229.18:35:51.15#ibcon#about to read 4, iclass 40, count 0 2006.229.18:35:51.15#ibcon#read 4, iclass 40, count 0 2006.229.18:35:51.15#ibcon#about to read 5, iclass 40, count 0 2006.229.18:35:51.15#ibcon#read 5, iclass 40, count 0 2006.229.18:35:51.15#ibcon#about to read 6, iclass 40, count 0 2006.229.18:35:51.15#ibcon#read 6, iclass 40, count 0 2006.229.18:35:51.15#ibcon#end of sib2, iclass 40, count 0 2006.229.18:35:51.15#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:35:51.15#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:35:51.15#ibcon#[25=USB\r\n] 2006.229.18:35:51.15#ibcon#*before write, iclass 40, count 0 2006.229.18:35:51.15#ibcon#enter sib2, iclass 40, count 0 2006.229.18:35:51.15#ibcon#flushed, iclass 40, count 0 2006.229.18:35:51.15#ibcon#about to write, iclass 40, count 0 2006.229.18:35:51.15#ibcon#wrote, iclass 40, count 0 2006.229.18:35:51.15#ibcon#about to read 3, iclass 40, count 0 2006.229.18:35:51.18#ibcon#read 3, iclass 40, count 0 2006.229.18:35:51.18#ibcon#about to read 4, iclass 40, count 0 2006.229.18:35:51.18#ibcon#read 4, iclass 40, count 0 2006.229.18:35:51.18#ibcon#about to read 5, iclass 40, count 0 2006.229.18:35:51.18#ibcon#read 5, iclass 40, count 0 2006.229.18:35:51.18#ibcon#about to read 6, iclass 40, count 0 2006.229.18:35:51.18#ibcon#read 6, iclass 40, count 0 2006.229.18:35:51.18#ibcon#end of sib2, iclass 40, count 0 2006.229.18:35:51.18#ibcon#*after write, iclass 40, count 0 2006.229.18:35:51.18#ibcon#*before return 0, iclass 40, count 0 2006.229.18:35:51.18#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:51.18#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:51.18#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:35:51.18#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:35:51.18$vck44/valo=7,864.99 2006.229.18:35:51.18#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.18:35:51.18#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.18:35:51.18#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:51.18#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:51.18#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:51.18#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:51.18#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:35:51.18#ibcon#first serial, iclass 4, count 0 2006.229.18:35:51.18#ibcon#enter sib2, iclass 4, count 0 2006.229.18:35:51.18#ibcon#flushed, iclass 4, count 0 2006.229.18:35:51.18#ibcon#about to write, iclass 4, count 0 2006.229.18:35:51.18#ibcon#wrote, iclass 4, count 0 2006.229.18:35:51.18#ibcon#about to read 3, iclass 4, count 0 2006.229.18:35:51.20#ibcon#read 3, iclass 4, count 0 2006.229.18:35:51.20#ibcon#about to read 4, iclass 4, count 0 2006.229.18:35:51.20#ibcon#read 4, iclass 4, count 0 2006.229.18:35:51.20#ibcon#about to read 5, iclass 4, count 0 2006.229.18:35:51.20#ibcon#read 5, iclass 4, count 0 2006.229.18:35:51.20#ibcon#about to read 6, iclass 4, count 0 2006.229.18:35:51.20#ibcon#read 6, iclass 4, count 0 2006.229.18:35:51.20#ibcon#end of sib2, iclass 4, count 0 2006.229.18:35:51.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:35:51.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:35:51.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:35:51.20#ibcon#*before write, iclass 4, count 0 2006.229.18:35:51.20#ibcon#enter sib2, iclass 4, count 0 2006.229.18:35:51.20#ibcon#flushed, iclass 4, count 0 2006.229.18:35:51.20#ibcon#about to write, iclass 4, count 0 2006.229.18:35:51.20#ibcon#wrote, iclass 4, count 0 2006.229.18:35:51.20#ibcon#about to read 3, iclass 4, count 0 2006.229.18:35:51.24#ibcon#read 3, iclass 4, count 0 2006.229.18:35:51.24#ibcon#about to read 4, iclass 4, count 0 2006.229.18:35:51.24#ibcon#read 4, iclass 4, count 0 2006.229.18:35:51.24#ibcon#about to read 5, iclass 4, count 0 2006.229.18:35:51.24#ibcon#read 5, iclass 4, count 0 2006.229.18:35:51.24#ibcon#about to read 6, iclass 4, count 0 2006.229.18:35:51.24#ibcon#read 6, iclass 4, count 0 2006.229.18:35:51.24#ibcon#end of sib2, iclass 4, count 0 2006.229.18:35:51.24#ibcon#*after write, iclass 4, count 0 2006.229.18:35:51.24#ibcon#*before return 0, iclass 4, count 0 2006.229.18:35:51.24#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:51.24#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:51.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:35:51.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:35:51.24$vck44/va=7,5 2006.229.18:35:51.24#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.18:35:51.24#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.18:35:51.24#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:51.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:51.30#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:51.30#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:51.30#ibcon#enter wrdev, iclass 6, count 2 2006.229.18:35:51.30#ibcon#first serial, iclass 6, count 2 2006.229.18:35:51.30#ibcon#enter sib2, iclass 6, count 2 2006.229.18:35:51.30#ibcon#flushed, iclass 6, count 2 2006.229.18:35:51.30#ibcon#about to write, iclass 6, count 2 2006.229.18:35:51.30#ibcon#wrote, iclass 6, count 2 2006.229.18:35:51.30#ibcon#about to read 3, iclass 6, count 2 2006.229.18:35:51.32#ibcon#read 3, iclass 6, count 2 2006.229.18:35:51.32#ibcon#about to read 4, iclass 6, count 2 2006.229.18:35:51.32#ibcon#read 4, iclass 6, count 2 2006.229.18:35:51.32#ibcon#about to read 5, iclass 6, count 2 2006.229.18:35:51.32#ibcon#read 5, iclass 6, count 2 2006.229.18:35:51.32#ibcon#about to read 6, iclass 6, count 2 2006.229.18:35:51.32#ibcon#read 6, iclass 6, count 2 2006.229.18:35:51.32#ibcon#end of sib2, iclass 6, count 2 2006.229.18:35:51.32#ibcon#*mode == 0, iclass 6, count 2 2006.229.18:35:51.32#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.18:35:51.32#ibcon#[25=AT07-05\r\n] 2006.229.18:35:51.32#ibcon#*before write, iclass 6, count 2 2006.229.18:35:51.32#ibcon#enter sib2, iclass 6, count 2 2006.229.18:35:51.32#ibcon#flushed, iclass 6, count 2 2006.229.18:35:51.32#ibcon#about to write, iclass 6, count 2 2006.229.18:35:51.32#ibcon#wrote, iclass 6, count 2 2006.229.18:35:51.32#ibcon#about to read 3, iclass 6, count 2 2006.229.18:35:51.35#ibcon#read 3, iclass 6, count 2 2006.229.18:35:51.35#ibcon#about to read 4, iclass 6, count 2 2006.229.18:35:51.35#ibcon#read 4, iclass 6, count 2 2006.229.18:35:51.35#ibcon#about to read 5, iclass 6, count 2 2006.229.18:35:51.35#ibcon#read 5, iclass 6, count 2 2006.229.18:35:51.35#ibcon#about to read 6, iclass 6, count 2 2006.229.18:35:51.35#ibcon#read 6, iclass 6, count 2 2006.229.18:35:51.35#ibcon#end of sib2, iclass 6, count 2 2006.229.18:35:51.35#ibcon#*after write, iclass 6, count 2 2006.229.18:35:51.35#ibcon#*before return 0, iclass 6, count 2 2006.229.18:35:51.35#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:51.35#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:51.35#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.18:35:51.35#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:51.35#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:51.47#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:51.47#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:51.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:35:51.47#ibcon#first serial, iclass 6, count 0 2006.229.18:35:51.47#ibcon#enter sib2, iclass 6, count 0 2006.229.18:35:51.47#ibcon#flushed, iclass 6, count 0 2006.229.18:35:51.47#ibcon#about to write, iclass 6, count 0 2006.229.18:35:51.47#ibcon#wrote, iclass 6, count 0 2006.229.18:35:51.47#ibcon#about to read 3, iclass 6, count 0 2006.229.18:35:51.49#ibcon#read 3, iclass 6, count 0 2006.229.18:35:51.49#ibcon#about to read 4, iclass 6, count 0 2006.229.18:35:51.49#ibcon#read 4, iclass 6, count 0 2006.229.18:35:51.49#ibcon#about to read 5, iclass 6, count 0 2006.229.18:35:51.49#ibcon#read 5, iclass 6, count 0 2006.229.18:35:51.49#ibcon#about to read 6, iclass 6, count 0 2006.229.18:35:51.49#ibcon#read 6, iclass 6, count 0 2006.229.18:35:51.49#ibcon#end of sib2, iclass 6, count 0 2006.229.18:35:51.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:35:51.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:35:51.49#ibcon#[25=USB\r\n] 2006.229.18:35:51.49#ibcon#*before write, iclass 6, count 0 2006.229.18:35:51.49#ibcon#enter sib2, iclass 6, count 0 2006.229.18:35:51.49#ibcon#flushed, iclass 6, count 0 2006.229.18:35:51.49#ibcon#about to write, iclass 6, count 0 2006.229.18:35:51.49#ibcon#wrote, iclass 6, count 0 2006.229.18:35:51.49#ibcon#about to read 3, iclass 6, count 0 2006.229.18:35:51.52#ibcon#read 3, iclass 6, count 0 2006.229.18:35:51.52#ibcon#about to read 4, iclass 6, count 0 2006.229.18:35:51.52#ibcon#read 4, iclass 6, count 0 2006.229.18:35:51.52#ibcon#about to read 5, iclass 6, count 0 2006.229.18:35:51.52#ibcon#read 5, iclass 6, count 0 2006.229.18:35:51.52#ibcon#about to read 6, iclass 6, count 0 2006.229.18:35:51.52#ibcon#read 6, iclass 6, count 0 2006.229.18:35:51.52#ibcon#end of sib2, iclass 6, count 0 2006.229.18:35:51.52#ibcon#*after write, iclass 6, count 0 2006.229.18:35:51.52#ibcon#*before return 0, iclass 6, count 0 2006.229.18:35:51.52#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:51.52#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:51.52#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:35:51.52#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:35:51.52$vck44/valo=8,884.99 2006.229.18:35:51.52#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.18:35:51.52#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.18:35:51.52#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:51.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:51.52#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:51.52#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:51.52#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:35:51.52#ibcon#first serial, iclass 10, count 0 2006.229.18:35:51.52#ibcon#enter sib2, iclass 10, count 0 2006.229.18:35:51.52#ibcon#flushed, iclass 10, count 0 2006.229.18:35:51.52#ibcon#about to write, iclass 10, count 0 2006.229.18:35:51.52#ibcon#wrote, iclass 10, count 0 2006.229.18:35:51.52#ibcon#about to read 3, iclass 10, count 0 2006.229.18:35:51.54#ibcon#read 3, iclass 10, count 0 2006.229.18:35:51.54#ibcon#about to read 4, iclass 10, count 0 2006.229.18:35:51.54#ibcon#read 4, iclass 10, count 0 2006.229.18:35:51.54#ibcon#about to read 5, iclass 10, count 0 2006.229.18:35:51.54#ibcon#read 5, iclass 10, count 0 2006.229.18:35:51.54#ibcon#about to read 6, iclass 10, count 0 2006.229.18:35:51.54#ibcon#read 6, iclass 10, count 0 2006.229.18:35:51.54#ibcon#end of sib2, iclass 10, count 0 2006.229.18:35:51.54#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:35:51.54#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:35:51.54#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:35:51.54#ibcon#*before write, iclass 10, count 0 2006.229.18:35:51.54#ibcon#enter sib2, iclass 10, count 0 2006.229.18:35:51.54#ibcon#flushed, iclass 10, count 0 2006.229.18:35:51.54#ibcon#about to write, iclass 10, count 0 2006.229.18:35:51.54#ibcon#wrote, iclass 10, count 0 2006.229.18:35:51.54#ibcon#about to read 3, iclass 10, count 0 2006.229.18:35:51.58#ibcon#read 3, iclass 10, count 0 2006.229.18:35:51.58#ibcon#about to read 4, iclass 10, count 0 2006.229.18:35:51.58#ibcon#read 4, iclass 10, count 0 2006.229.18:35:51.58#ibcon#about to read 5, iclass 10, count 0 2006.229.18:35:51.58#ibcon#read 5, iclass 10, count 0 2006.229.18:35:51.58#ibcon#about to read 6, iclass 10, count 0 2006.229.18:35:51.58#ibcon#read 6, iclass 10, count 0 2006.229.18:35:51.58#ibcon#end of sib2, iclass 10, count 0 2006.229.18:35:51.58#ibcon#*after write, iclass 10, count 0 2006.229.18:35:51.58#ibcon#*before return 0, iclass 10, count 0 2006.229.18:35:51.58#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:51.58#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:51.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:35:51.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:35:51.58$vck44/va=8,6 2006.229.18:35:51.58#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.18:35:51.58#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.18:35:51.58#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:51.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.18:35:51.64#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.18:35:51.64#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.18:35:51.64#ibcon#enter wrdev, iclass 12, count 2 2006.229.18:35:51.64#ibcon#first serial, iclass 12, count 2 2006.229.18:35:51.64#ibcon#enter sib2, iclass 12, count 2 2006.229.18:35:51.64#ibcon#flushed, iclass 12, count 2 2006.229.18:35:51.64#ibcon#about to write, iclass 12, count 2 2006.229.18:35:51.64#ibcon#wrote, iclass 12, count 2 2006.229.18:35:51.64#ibcon#about to read 3, iclass 12, count 2 2006.229.18:35:51.66#ibcon#read 3, iclass 12, count 2 2006.229.18:35:51.66#ibcon#about to read 4, iclass 12, count 2 2006.229.18:35:51.66#ibcon#read 4, iclass 12, count 2 2006.229.18:35:51.66#ibcon#about to read 5, iclass 12, count 2 2006.229.18:35:51.66#ibcon#read 5, iclass 12, count 2 2006.229.18:35:51.66#ibcon#about to read 6, iclass 12, count 2 2006.229.18:35:51.66#ibcon#read 6, iclass 12, count 2 2006.229.18:35:51.66#ibcon#end of sib2, iclass 12, count 2 2006.229.18:35:51.66#ibcon#*mode == 0, iclass 12, count 2 2006.229.18:35:51.66#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.18:35:51.66#ibcon#[25=AT08-06\r\n] 2006.229.18:35:51.66#ibcon#*before write, iclass 12, count 2 2006.229.18:35:51.66#ibcon#enter sib2, iclass 12, count 2 2006.229.18:35:51.66#ibcon#flushed, iclass 12, count 2 2006.229.18:35:51.66#ibcon#about to write, iclass 12, count 2 2006.229.18:35:51.66#ibcon#wrote, iclass 12, count 2 2006.229.18:35:51.66#ibcon#about to read 3, iclass 12, count 2 2006.229.18:35:51.69#ibcon#read 3, iclass 12, count 2 2006.229.18:35:51.69#ibcon#about to read 4, iclass 12, count 2 2006.229.18:35:51.69#ibcon#read 4, iclass 12, count 2 2006.229.18:35:51.69#ibcon#about to read 5, iclass 12, count 2 2006.229.18:35:51.69#ibcon#read 5, iclass 12, count 2 2006.229.18:35:51.69#ibcon#about to read 6, iclass 12, count 2 2006.229.18:35:51.69#ibcon#read 6, iclass 12, count 2 2006.229.18:35:51.69#ibcon#end of sib2, iclass 12, count 2 2006.229.18:35:51.69#ibcon#*after write, iclass 12, count 2 2006.229.18:35:51.69#ibcon#*before return 0, iclass 12, count 2 2006.229.18:35:51.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.18:35:51.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.18:35:51.69#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.18:35:51.69#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:51.69#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.18:35:51.81#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.18:35:51.81#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.18:35:51.81#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:35:51.81#ibcon#first serial, iclass 12, count 0 2006.229.18:35:51.81#ibcon#enter sib2, iclass 12, count 0 2006.229.18:35:51.81#ibcon#flushed, iclass 12, count 0 2006.229.18:35:51.81#ibcon#about to write, iclass 12, count 0 2006.229.18:35:51.81#ibcon#wrote, iclass 12, count 0 2006.229.18:35:51.81#ibcon#about to read 3, iclass 12, count 0 2006.229.18:35:51.83#ibcon#read 3, iclass 12, count 0 2006.229.18:35:51.83#ibcon#about to read 4, iclass 12, count 0 2006.229.18:35:51.83#ibcon#read 4, iclass 12, count 0 2006.229.18:35:51.83#ibcon#about to read 5, iclass 12, count 0 2006.229.18:35:51.83#ibcon#read 5, iclass 12, count 0 2006.229.18:35:51.83#ibcon#about to read 6, iclass 12, count 0 2006.229.18:35:51.83#ibcon#read 6, iclass 12, count 0 2006.229.18:35:51.83#ibcon#end of sib2, iclass 12, count 0 2006.229.18:35:51.83#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:35:51.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:35:51.83#ibcon#[25=USB\r\n] 2006.229.18:35:51.83#ibcon#*before write, iclass 12, count 0 2006.229.18:35:51.83#ibcon#enter sib2, iclass 12, count 0 2006.229.18:35:51.83#ibcon#flushed, iclass 12, count 0 2006.229.18:35:51.83#ibcon#about to write, iclass 12, count 0 2006.229.18:35:51.83#ibcon#wrote, iclass 12, count 0 2006.229.18:35:51.83#ibcon#about to read 3, iclass 12, count 0 2006.229.18:35:51.86#ibcon#read 3, iclass 12, count 0 2006.229.18:35:51.86#ibcon#about to read 4, iclass 12, count 0 2006.229.18:35:51.86#ibcon#read 4, iclass 12, count 0 2006.229.18:35:51.86#ibcon#about to read 5, iclass 12, count 0 2006.229.18:35:51.86#ibcon#read 5, iclass 12, count 0 2006.229.18:35:51.86#ibcon#about to read 6, iclass 12, count 0 2006.229.18:35:51.86#ibcon#read 6, iclass 12, count 0 2006.229.18:35:51.86#ibcon#end of sib2, iclass 12, count 0 2006.229.18:35:51.86#ibcon#*after write, iclass 12, count 0 2006.229.18:35:51.86#ibcon#*before return 0, iclass 12, count 0 2006.229.18:35:51.86#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.18:35:51.86#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.18:35:51.86#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:35:51.86#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:35:51.86$vck44/vblo=1,629.99 2006.229.18:35:51.86#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.18:35:51.86#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.18:35:51.86#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:51.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:35:51.86#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:35:51.86#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:35:51.86#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:35:51.86#ibcon#first serial, iclass 14, count 0 2006.229.18:35:51.86#ibcon#enter sib2, iclass 14, count 0 2006.229.18:35:51.86#ibcon#flushed, iclass 14, count 0 2006.229.18:35:51.86#ibcon#about to write, iclass 14, count 0 2006.229.18:35:51.86#ibcon#wrote, iclass 14, count 0 2006.229.18:35:51.86#ibcon#about to read 3, iclass 14, count 0 2006.229.18:35:51.88#ibcon#read 3, iclass 14, count 0 2006.229.18:35:51.88#ibcon#about to read 4, iclass 14, count 0 2006.229.18:35:51.88#ibcon#read 4, iclass 14, count 0 2006.229.18:35:51.88#ibcon#about to read 5, iclass 14, count 0 2006.229.18:35:51.88#ibcon#read 5, iclass 14, count 0 2006.229.18:35:51.88#ibcon#about to read 6, iclass 14, count 0 2006.229.18:35:51.88#ibcon#read 6, iclass 14, count 0 2006.229.18:35:51.88#ibcon#end of sib2, iclass 14, count 0 2006.229.18:35:51.88#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:35:51.88#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:35:51.88#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:35:51.88#ibcon#*before write, iclass 14, count 0 2006.229.18:35:51.88#ibcon#enter sib2, iclass 14, count 0 2006.229.18:35:51.88#ibcon#flushed, iclass 14, count 0 2006.229.18:35:51.88#ibcon#about to write, iclass 14, count 0 2006.229.18:35:51.88#ibcon#wrote, iclass 14, count 0 2006.229.18:35:51.88#ibcon#about to read 3, iclass 14, count 0 2006.229.18:35:51.92#ibcon#read 3, iclass 14, count 0 2006.229.18:35:51.92#ibcon#about to read 4, iclass 14, count 0 2006.229.18:35:51.92#ibcon#read 4, iclass 14, count 0 2006.229.18:35:51.92#ibcon#about to read 5, iclass 14, count 0 2006.229.18:35:51.92#ibcon#read 5, iclass 14, count 0 2006.229.18:35:51.92#ibcon#about to read 6, iclass 14, count 0 2006.229.18:35:51.92#ibcon#read 6, iclass 14, count 0 2006.229.18:35:51.92#ibcon#end of sib2, iclass 14, count 0 2006.229.18:35:51.92#ibcon#*after write, iclass 14, count 0 2006.229.18:35:51.92#ibcon#*before return 0, iclass 14, count 0 2006.229.18:35:51.92#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:35:51.92#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:35:51.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:35:51.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:35:51.92$vck44/vb=1,4 2006.229.18:35:51.92#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.18:35:51.92#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.18:35:51.92#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:51.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.18:35:51.92#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.18:35:51.92#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.18:35:51.92#ibcon#enter wrdev, iclass 16, count 2 2006.229.18:35:51.92#ibcon#first serial, iclass 16, count 2 2006.229.18:35:51.92#ibcon#enter sib2, iclass 16, count 2 2006.229.18:35:51.92#ibcon#flushed, iclass 16, count 2 2006.229.18:35:51.92#ibcon#about to write, iclass 16, count 2 2006.229.18:35:51.92#ibcon#wrote, iclass 16, count 2 2006.229.18:35:51.92#ibcon#about to read 3, iclass 16, count 2 2006.229.18:35:51.94#ibcon#read 3, iclass 16, count 2 2006.229.18:35:51.94#ibcon#about to read 4, iclass 16, count 2 2006.229.18:35:51.94#ibcon#read 4, iclass 16, count 2 2006.229.18:35:51.94#ibcon#about to read 5, iclass 16, count 2 2006.229.18:35:51.94#ibcon#read 5, iclass 16, count 2 2006.229.18:35:51.94#ibcon#about to read 6, iclass 16, count 2 2006.229.18:35:51.94#ibcon#read 6, iclass 16, count 2 2006.229.18:35:51.94#ibcon#end of sib2, iclass 16, count 2 2006.229.18:35:51.94#ibcon#*mode == 0, iclass 16, count 2 2006.229.18:35:51.94#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.18:35:51.94#ibcon#[27=AT01-04\r\n] 2006.229.18:35:51.94#ibcon#*before write, iclass 16, count 2 2006.229.18:35:51.94#ibcon#enter sib2, iclass 16, count 2 2006.229.18:35:51.94#ibcon#flushed, iclass 16, count 2 2006.229.18:35:51.94#ibcon#about to write, iclass 16, count 2 2006.229.18:35:51.94#ibcon#wrote, iclass 16, count 2 2006.229.18:35:51.94#ibcon#about to read 3, iclass 16, count 2 2006.229.18:35:51.97#ibcon#read 3, iclass 16, count 2 2006.229.18:35:51.97#ibcon#about to read 4, iclass 16, count 2 2006.229.18:35:51.97#ibcon#read 4, iclass 16, count 2 2006.229.18:35:51.97#ibcon#about to read 5, iclass 16, count 2 2006.229.18:35:51.97#ibcon#read 5, iclass 16, count 2 2006.229.18:35:51.97#ibcon#about to read 6, iclass 16, count 2 2006.229.18:35:51.97#ibcon#read 6, iclass 16, count 2 2006.229.18:35:51.97#ibcon#end of sib2, iclass 16, count 2 2006.229.18:35:51.97#ibcon#*after write, iclass 16, count 2 2006.229.18:35:51.97#ibcon#*before return 0, iclass 16, count 2 2006.229.18:35:51.97#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.18:35:51.97#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.18:35:51.97#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.18:35:51.97#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:51.97#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.18:35:52.09#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.18:35:52.09#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.18:35:52.09#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:35:52.09#ibcon#first serial, iclass 16, count 0 2006.229.18:35:52.09#ibcon#enter sib2, iclass 16, count 0 2006.229.18:35:52.09#ibcon#flushed, iclass 16, count 0 2006.229.18:35:52.09#ibcon#about to write, iclass 16, count 0 2006.229.18:35:52.09#ibcon#wrote, iclass 16, count 0 2006.229.18:35:52.09#ibcon#about to read 3, iclass 16, count 0 2006.229.18:35:52.11#ibcon#read 3, iclass 16, count 0 2006.229.18:35:52.11#ibcon#about to read 4, iclass 16, count 0 2006.229.18:35:52.11#ibcon#read 4, iclass 16, count 0 2006.229.18:35:52.11#ibcon#about to read 5, iclass 16, count 0 2006.229.18:35:52.11#ibcon#read 5, iclass 16, count 0 2006.229.18:35:52.11#ibcon#about to read 6, iclass 16, count 0 2006.229.18:35:52.11#ibcon#read 6, iclass 16, count 0 2006.229.18:35:52.11#ibcon#end of sib2, iclass 16, count 0 2006.229.18:35:52.11#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:35:52.11#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:35:52.11#ibcon#[27=USB\r\n] 2006.229.18:35:52.11#ibcon#*before write, iclass 16, count 0 2006.229.18:35:52.11#ibcon#enter sib2, iclass 16, count 0 2006.229.18:35:52.11#ibcon#flushed, iclass 16, count 0 2006.229.18:35:52.11#ibcon#about to write, iclass 16, count 0 2006.229.18:35:52.11#ibcon#wrote, iclass 16, count 0 2006.229.18:35:52.11#ibcon#about to read 3, iclass 16, count 0 2006.229.18:35:52.14#ibcon#read 3, iclass 16, count 0 2006.229.18:35:52.14#ibcon#about to read 4, iclass 16, count 0 2006.229.18:35:52.14#ibcon#read 4, iclass 16, count 0 2006.229.18:35:52.14#ibcon#about to read 5, iclass 16, count 0 2006.229.18:35:52.14#ibcon#read 5, iclass 16, count 0 2006.229.18:35:52.14#ibcon#about to read 6, iclass 16, count 0 2006.229.18:35:52.14#ibcon#read 6, iclass 16, count 0 2006.229.18:35:52.14#ibcon#end of sib2, iclass 16, count 0 2006.229.18:35:52.14#ibcon#*after write, iclass 16, count 0 2006.229.18:35:52.14#ibcon#*before return 0, iclass 16, count 0 2006.229.18:35:52.14#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.18:35:52.14#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.18:35:52.14#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:35:52.14#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:35:52.14$vck44/vblo=2,634.99 2006.229.18:35:52.14#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.18:35:52.14#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.18:35:52.14#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:52.14#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:52.14#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:52.14#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:52.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:35:52.14#ibcon#first serial, iclass 18, count 0 2006.229.18:35:52.14#ibcon#enter sib2, iclass 18, count 0 2006.229.18:35:52.14#ibcon#flushed, iclass 18, count 0 2006.229.18:35:52.14#ibcon#about to write, iclass 18, count 0 2006.229.18:35:52.14#ibcon#wrote, iclass 18, count 0 2006.229.18:35:52.14#ibcon#about to read 3, iclass 18, count 0 2006.229.18:35:52.16#ibcon#read 3, iclass 18, count 0 2006.229.18:35:52.16#ibcon#about to read 4, iclass 18, count 0 2006.229.18:35:52.16#ibcon#read 4, iclass 18, count 0 2006.229.18:35:52.16#ibcon#about to read 5, iclass 18, count 0 2006.229.18:35:52.16#ibcon#read 5, iclass 18, count 0 2006.229.18:35:52.16#ibcon#about to read 6, iclass 18, count 0 2006.229.18:35:52.16#ibcon#read 6, iclass 18, count 0 2006.229.18:35:52.16#ibcon#end of sib2, iclass 18, count 0 2006.229.18:35:52.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:35:52.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:35:52.16#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:35:52.16#ibcon#*before write, iclass 18, count 0 2006.229.18:35:52.16#ibcon#enter sib2, iclass 18, count 0 2006.229.18:35:52.16#ibcon#flushed, iclass 18, count 0 2006.229.18:35:52.16#ibcon#about to write, iclass 18, count 0 2006.229.18:35:52.16#ibcon#wrote, iclass 18, count 0 2006.229.18:35:52.16#ibcon#about to read 3, iclass 18, count 0 2006.229.18:35:52.20#ibcon#read 3, iclass 18, count 0 2006.229.18:35:52.20#ibcon#about to read 4, iclass 18, count 0 2006.229.18:35:52.20#ibcon#read 4, iclass 18, count 0 2006.229.18:35:52.20#ibcon#about to read 5, iclass 18, count 0 2006.229.18:35:52.20#ibcon#read 5, iclass 18, count 0 2006.229.18:35:52.20#ibcon#about to read 6, iclass 18, count 0 2006.229.18:35:52.20#ibcon#read 6, iclass 18, count 0 2006.229.18:35:52.20#ibcon#end of sib2, iclass 18, count 0 2006.229.18:35:52.20#ibcon#*after write, iclass 18, count 0 2006.229.18:35:52.20#ibcon#*before return 0, iclass 18, count 0 2006.229.18:35:52.20#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:52.20#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.18:35:52.20#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:35:52.20#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:35:52.20$vck44/vb=2,4 2006.229.18:35:52.20#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.18:35:52.20#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.18:35:52.20#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:52.20#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:52.26#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:52.26#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:52.26#ibcon#enter wrdev, iclass 20, count 2 2006.229.18:35:52.26#ibcon#first serial, iclass 20, count 2 2006.229.18:35:52.26#ibcon#enter sib2, iclass 20, count 2 2006.229.18:35:52.26#ibcon#flushed, iclass 20, count 2 2006.229.18:35:52.26#ibcon#about to write, iclass 20, count 2 2006.229.18:35:52.26#ibcon#wrote, iclass 20, count 2 2006.229.18:35:52.26#ibcon#about to read 3, iclass 20, count 2 2006.229.18:35:52.28#ibcon#read 3, iclass 20, count 2 2006.229.18:35:52.28#ibcon#about to read 4, iclass 20, count 2 2006.229.18:35:52.28#ibcon#read 4, iclass 20, count 2 2006.229.18:35:52.28#ibcon#about to read 5, iclass 20, count 2 2006.229.18:35:52.28#ibcon#read 5, iclass 20, count 2 2006.229.18:35:52.28#ibcon#about to read 6, iclass 20, count 2 2006.229.18:35:52.28#ibcon#read 6, iclass 20, count 2 2006.229.18:35:52.28#ibcon#end of sib2, iclass 20, count 2 2006.229.18:35:52.28#ibcon#*mode == 0, iclass 20, count 2 2006.229.18:35:52.28#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.18:35:52.28#ibcon#[27=AT02-04\r\n] 2006.229.18:35:52.28#ibcon#*before write, iclass 20, count 2 2006.229.18:35:52.28#ibcon#enter sib2, iclass 20, count 2 2006.229.18:35:52.28#ibcon#flushed, iclass 20, count 2 2006.229.18:35:52.28#ibcon#about to write, iclass 20, count 2 2006.229.18:35:52.28#ibcon#wrote, iclass 20, count 2 2006.229.18:35:52.28#ibcon#about to read 3, iclass 20, count 2 2006.229.18:35:52.31#ibcon#read 3, iclass 20, count 2 2006.229.18:35:52.31#ibcon#about to read 4, iclass 20, count 2 2006.229.18:35:52.31#ibcon#read 4, iclass 20, count 2 2006.229.18:35:52.31#ibcon#about to read 5, iclass 20, count 2 2006.229.18:35:52.31#ibcon#read 5, iclass 20, count 2 2006.229.18:35:52.31#ibcon#about to read 6, iclass 20, count 2 2006.229.18:35:52.31#ibcon#read 6, iclass 20, count 2 2006.229.18:35:52.31#ibcon#end of sib2, iclass 20, count 2 2006.229.18:35:52.31#ibcon#*after write, iclass 20, count 2 2006.229.18:35:52.31#ibcon#*before return 0, iclass 20, count 2 2006.229.18:35:52.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:52.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.18:35:52.31#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.18:35:52.31#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:52.31#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:52.43#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:52.43#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:52.43#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:35:52.43#ibcon#first serial, iclass 20, count 0 2006.229.18:35:52.43#ibcon#enter sib2, iclass 20, count 0 2006.229.18:35:52.43#ibcon#flushed, iclass 20, count 0 2006.229.18:35:52.43#ibcon#about to write, iclass 20, count 0 2006.229.18:35:52.43#ibcon#wrote, iclass 20, count 0 2006.229.18:35:52.43#ibcon#about to read 3, iclass 20, count 0 2006.229.18:35:52.45#ibcon#read 3, iclass 20, count 0 2006.229.18:35:52.45#ibcon#about to read 4, iclass 20, count 0 2006.229.18:35:52.45#ibcon#read 4, iclass 20, count 0 2006.229.18:35:52.45#ibcon#about to read 5, iclass 20, count 0 2006.229.18:35:52.45#ibcon#read 5, iclass 20, count 0 2006.229.18:35:52.45#ibcon#about to read 6, iclass 20, count 0 2006.229.18:35:52.45#ibcon#read 6, iclass 20, count 0 2006.229.18:35:52.45#ibcon#end of sib2, iclass 20, count 0 2006.229.18:35:52.45#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:35:52.45#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:35:52.45#ibcon#[27=USB\r\n] 2006.229.18:35:52.45#ibcon#*before write, iclass 20, count 0 2006.229.18:35:52.45#ibcon#enter sib2, iclass 20, count 0 2006.229.18:35:52.45#ibcon#flushed, iclass 20, count 0 2006.229.18:35:52.45#ibcon#about to write, iclass 20, count 0 2006.229.18:35:52.45#ibcon#wrote, iclass 20, count 0 2006.229.18:35:52.45#ibcon#about to read 3, iclass 20, count 0 2006.229.18:35:52.48#ibcon#read 3, iclass 20, count 0 2006.229.18:35:52.48#ibcon#about to read 4, iclass 20, count 0 2006.229.18:35:52.48#ibcon#read 4, iclass 20, count 0 2006.229.18:35:52.48#ibcon#about to read 5, iclass 20, count 0 2006.229.18:35:52.48#ibcon#read 5, iclass 20, count 0 2006.229.18:35:52.48#ibcon#about to read 6, iclass 20, count 0 2006.229.18:35:52.48#ibcon#read 6, iclass 20, count 0 2006.229.18:35:52.48#ibcon#end of sib2, iclass 20, count 0 2006.229.18:35:52.48#ibcon#*after write, iclass 20, count 0 2006.229.18:35:52.48#ibcon#*before return 0, iclass 20, count 0 2006.229.18:35:52.48#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:52.48#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.18:35:52.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:35:52.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:35:52.48$vck44/vblo=3,649.99 2006.229.18:35:52.48#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.18:35:52.48#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.18:35:52.48#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:52.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:52.48#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:52.48#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:52.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:35:52.48#ibcon#first serial, iclass 22, count 0 2006.229.18:35:52.48#ibcon#enter sib2, iclass 22, count 0 2006.229.18:35:52.48#ibcon#flushed, iclass 22, count 0 2006.229.18:35:52.48#ibcon#about to write, iclass 22, count 0 2006.229.18:35:52.48#ibcon#wrote, iclass 22, count 0 2006.229.18:35:52.48#ibcon#about to read 3, iclass 22, count 0 2006.229.18:35:52.50#ibcon#read 3, iclass 22, count 0 2006.229.18:35:52.50#ibcon#about to read 4, iclass 22, count 0 2006.229.18:35:52.50#ibcon#read 4, iclass 22, count 0 2006.229.18:35:52.50#ibcon#about to read 5, iclass 22, count 0 2006.229.18:35:52.50#ibcon#read 5, iclass 22, count 0 2006.229.18:35:52.50#ibcon#about to read 6, iclass 22, count 0 2006.229.18:35:52.50#ibcon#read 6, iclass 22, count 0 2006.229.18:35:52.50#ibcon#end of sib2, iclass 22, count 0 2006.229.18:35:52.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:35:52.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:35:52.50#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:35:52.50#ibcon#*before write, iclass 22, count 0 2006.229.18:35:52.50#ibcon#enter sib2, iclass 22, count 0 2006.229.18:35:52.50#ibcon#flushed, iclass 22, count 0 2006.229.18:35:52.50#ibcon#about to write, iclass 22, count 0 2006.229.18:35:52.50#ibcon#wrote, iclass 22, count 0 2006.229.18:35:52.50#ibcon#about to read 3, iclass 22, count 0 2006.229.18:35:52.54#ibcon#read 3, iclass 22, count 0 2006.229.18:35:52.54#ibcon#about to read 4, iclass 22, count 0 2006.229.18:35:52.54#ibcon#read 4, iclass 22, count 0 2006.229.18:35:52.54#ibcon#about to read 5, iclass 22, count 0 2006.229.18:35:52.54#ibcon#read 5, iclass 22, count 0 2006.229.18:35:52.54#ibcon#about to read 6, iclass 22, count 0 2006.229.18:35:52.54#ibcon#read 6, iclass 22, count 0 2006.229.18:35:52.54#ibcon#end of sib2, iclass 22, count 0 2006.229.18:35:52.54#ibcon#*after write, iclass 22, count 0 2006.229.18:35:52.54#ibcon#*before return 0, iclass 22, count 0 2006.229.18:35:52.54#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:52.54#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.18:35:52.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:35:52.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:35:52.54$vck44/vb=3,4 2006.229.18:35:52.54#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.18:35:52.54#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.18:35:52.54#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:52.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:52.60#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:52.60#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:52.60#ibcon#enter wrdev, iclass 24, count 2 2006.229.18:35:52.60#ibcon#first serial, iclass 24, count 2 2006.229.18:35:52.60#ibcon#enter sib2, iclass 24, count 2 2006.229.18:35:52.60#ibcon#flushed, iclass 24, count 2 2006.229.18:35:52.60#ibcon#about to write, iclass 24, count 2 2006.229.18:35:52.60#ibcon#wrote, iclass 24, count 2 2006.229.18:35:52.60#ibcon#about to read 3, iclass 24, count 2 2006.229.18:35:52.62#ibcon#read 3, iclass 24, count 2 2006.229.18:35:52.62#ibcon#about to read 4, iclass 24, count 2 2006.229.18:35:52.62#ibcon#read 4, iclass 24, count 2 2006.229.18:35:52.62#ibcon#about to read 5, iclass 24, count 2 2006.229.18:35:52.62#ibcon#read 5, iclass 24, count 2 2006.229.18:35:52.62#ibcon#about to read 6, iclass 24, count 2 2006.229.18:35:52.62#ibcon#read 6, iclass 24, count 2 2006.229.18:35:52.62#ibcon#end of sib2, iclass 24, count 2 2006.229.18:35:52.62#ibcon#*mode == 0, iclass 24, count 2 2006.229.18:35:52.62#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.18:35:52.62#ibcon#[27=AT03-04\r\n] 2006.229.18:35:52.62#ibcon#*before write, iclass 24, count 2 2006.229.18:35:52.62#ibcon#enter sib2, iclass 24, count 2 2006.229.18:35:52.62#ibcon#flushed, iclass 24, count 2 2006.229.18:35:52.62#ibcon#about to write, iclass 24, count 2 2006.229.18:35:52.62#ibcon#wrote, iclass 24, count 2 2006.229.18:35:52.62#ibcon#about to read 3, iclass 24, count 2 2006.229.18:35:52.65#ibcon#read 3, iclass 24, count 2 2006.229.18:35:52.65#ibcon#about to read 4, iclass 24, count 2 2006.229.18:35:52.65#ibcon#read 4, iclass 24, count 2 2006.229.18:35:52.65#ibcon#about to read 5, iclass 24, count 2 2006.229.18:35:52.65#ibcon#read 5, iclass 24, count 2 2006.229.18:35:52.65#ibcon#about to read 6, iclass 24, count 2 2006.229.18:35:52.65#ibcon#read 6, iclass 24, count 2 2006.229.18:35:52.65#ibcon#end of sib2, iclass 24, count 2 2006.229.18:35:52.65#ibcon#*after write, iclass 24, count 2 2006.229.18:35:52.65#ibcon#*before return 0, iclass 24, count 2 2006.229.18:35:52.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:52.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.18:35:52.65#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.18:35:52.65#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:52.65#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:52.77#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:52.77#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:52.77#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:35:52.77#ibcon#first serial, iclass 24, count 0 2006.229.18:35:52.77#ibcon#enter sib2, iclass 24, count 0 2006.229.18:35:52.77#ibcon#flushed, iclass 24, count 0 2006.229.18:35:52.77#ibcon#about to write, iclass 24, count 0 2006.229.18:35:52.77#ibcon#wrote, iclass 24, count 0 2006.229.18:35:52.77#ibcon#about to read 3, iclass 24, count 0 2006.229.18:35:52.79#ibcon#read 3, iclass 24, count 0 2006.229.18:35:52.79#ibcon#about to read 4, iclass 24, count 0 2006.229.18:35:52.79#ibcon#read 4, iclass 24, count 0 2006.229.18:35:52.79#ibcon#about to read 5, iclass 24, count 0 2006.229.18:35:52.79#ibcon#read 5, iclass 24, count 0 2006.229.18:35:52.79#ibcon#about to read 6, iclass 24, count 0 2006.229.18:35:52.79#ibcon#read 6, iclass 24, count 0 2006.229.18:35:52.79#ibcon#end of sib2, iclass 24, count 0 2006.229.18:35:52.79#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:35:52.79#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:35:52.79#ibcon#[27=USB\r\n] 2006.229.18:35:52.79#ibcon#*before write, iclass 24, count 0 2006.229.18:35:52.79#ibcon#enter sib2, iclass 24, count 0 2006.229.18:35:52.79#ibcon#flushed, iclass 24, count 0 2006.229.18:35:52.79#ibcon#about to write, iclass 24, count 0 2006.229.18:35:52.79#ibcon#wrote, iclass 24, count 0 2006.229.18:35:52.79#ibcon#about to read 3, iclass 24, count 0 2006.229.18:35:52.82#ibcon#read 3, iclass 24, count 0 2006.229.18:35:52.82#ibcon#about to read 4, iclass 24, count 0 2006.229.18:35:52.82#ibcon#read 4, iclass 24, count 0 2006.229.18:35:52.82#ibcon#about to read 5, iclass 24, count 0 2006.229.18:35:52.82#ibcon#read 5, iclass 24, count 0 2006.229.18:35:52.82#ibcon#about to read 6, iclass 24, count 0 2006.229.18:35:52.82#ibcon#read 6, iclass 24, count 0 2006.229.18:35:52.82#ibcon#end of sib2, iclass 24, count 0 2006.229.18:35:52.82#ibcon#*after write, iclass 24, count 0 2006.229.18:35:52.82#ibcon#*before return 0, iclass 24, count 0 2006.229.18:35:52.82#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:52.82#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.18:35:52.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:35:52.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:35:52.82$vck44/vblo=4,679.99 2006.229.18:35:52.82#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.18:35:52.82#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.18:35:52.82#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:52.82#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:52.82#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:52.82#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:52.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:35:52.82#ibcon#first serial, iclass 26, count 0 2006.229.18:35:52.82#ibcon#enter sib2, iclass 26, count 0 2006.229.18:35:52.82#ibcon#flushed, iclass 26, count 0 2006.229.18:35:52.82#ibcon#about to write, iclass 26, count 0 2006.229.18:35:52.82#ibcon#wrote, iclass 26, count 0 2006.229.18:35:52.82#ibcon#about to read 3, iclass 26, count 0 2006.229.18:35:52.84#ibcon#read 3, iclass 26, count 0 2006.229.18:35:52.84#ibcon#about to read 4, iclass 26, count 0 2006.229.18:35:52.84#ibcon#read 4, iclass 26, count 0 2006.229.18:35:52.84#ibcon#about to read 5, iclass 26, count 0 2006.229.18:35:52.84#ibcon#read 5, iclass 26, count 0 2006.229.18:35:52.84#ibcon#about to read 6, iclass 26, count 0 2006.229.18:35:52.84#ibcon#read 6, iclass 26, count 0 2006.229.18:35:52.84#ibcon#end of sib2, iclass 26, count 0 2006.229.18:35:52.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:35:52.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:35:52.84#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:35:52.84#ibcon#*before write, iclass 26, count 0 2006.229.18:35:52.84#ibcon#enter sib2, iclass 26, count 0 2006.229.18:35:52.84#ibcon#flushed, iclass 26, count 0 2006.229.18:35:52.84#ibcon#about to write, iclass 26, count 0 2006.229.18:35:52.84#ibcon#wrote, iclass 26, count 0 2006.229.18:35:52.84#ibcon#about to read 3, iclass 26, count 0 2006.229.18:35:52.88#ibcon#read 3, iclass 26, count 0 2006.229.18:35:52.88#ibcon#about to read 4, iclass 26, count 0 2006.229.18:35:52.88#ibcon#read 4, iclass 26, count 0 2006.229.18:35:52.88#ibcon#about to read 5, iclass 26, count 0 2006.229.18:35:52.88#ibcon#read 5, iclass 26, count 0 2006.229.18:35:52.88#ibcon#about to read 6, iclass 26, count 0 2006.229.18:35:52.88#ibcon#read 6, iclass 26, count 0 2006.229.18:35:52.88#ibcon#end of sib2, iclass 26, count 0 2006.229.18:35:52.88#ibcon#*after write, iclass 26, count 0 2006.229.18:35:52.88#ibcon#*before return 0, iclass 26, count 0 2006.229.18:35:52.88#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:52.88#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.18:35:52.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:35:52.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:35:52.88$vck44/vb=4,4 2006.229.18:35:52.88#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.18:35:52.88#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.18:35:52.88#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:52.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:52.94#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:52.94#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:52.94#ibcon#enter wrdev, iclass 28, count 2 2006.229.18:35:52.94#ibcon#first serial, iclass 28, count 2 2006.229.18:35:52.94#ibcon#enter sib2, iclass 28, count 2 2006.229.18:35:52.94#ibcon#flushed, iclass 28, count 2 2006.229.18:35:52.94#ibcon#about to write, iclass 28, count 2 2006.229.18:35:52.94#ibcon#wrote, iclass 28, count 2 2006.229.18:35:52.94#ibcon#about to read 3, iclass 28, count 2 2006.229.18:35:52.96#ibcon#read 3, iclass 28, count 2 2006.229.18:35:52.96#ibcon#about to read 4, iclass 28, count 2 2006.229.18:35:52.96#ibcon#read 4, iclass 28, count 2 2006.229.18:35:52.96#ibcon#about to read 5, iclass 28, count 2 2006.229.18:35:52.96#ibcon#read 5, iclass 28, count 2 2006.229.18:35:52.96#ibcon#about to read 6, iclass 28, count 2 2006.229.18:35:52.96#ibcon#read 6, iclass 28, count 2 2006.229.18:35:52.96#ibcon#end of sib2, iclass 28, count 2 2006.229.18:35:52.96#ibcon#*mode == 0, iclass 28, count 2 2006.229.18:35:52.96#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.18:35:52.96#ibcon#[27=AT04-04\r\n] 2006.229.18:35:52.96#ibcon#*before write, iclass 28, count 2 2006.229.18:35:52.96#ibcon#enter sib2, iclass 28, count 2 2006.229.18:35:52.96#ibcon#flushed, iclass 28, count 2 2006.229.18:35:52.96#ibcon#about to write, iclass 28, count 2 2006.229.18:35:52.96#ibcon#wrote, iclass 28, count 2 2006.229.18:35:52.96#ibcon#about to read 3, iclass 28, count 2 2006.229.18:35:52.99#ibcon#read 3, iclass 28, count 2 2006.229.18:35:52.99#ibcon#about to read 4, iclass 28, count 2 2006.229.18:35:52.99#ibcon#read 4, iclass 28, count 2 2006.229.18:35:52.99#ibcon#about to read 5, iclass 28, count 2 2006.229.18:35:52.99#ibcon#read 5, iclass 28, count 2 2006.229.18:35:52.99#ibcon#about to read 6, iclass 28, count 2 2006.229.18:35:52.99#ibcon#read 6, iclass 28, count 2 2006.229.18:35:52.99#ibcon#end of sib2, iclass 28, count 2 2006.229.18:35:52.99#ibcon#*after write, iclass 28, count 2 2006.229.18:35:52.99#ibcon#*before return 0, iclass 28, count 2 2006.229.18:35:52.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:52.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.18:35:52.99#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.18:35:52.99#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:52.99#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:53.11#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:53.11#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:53.11#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:35:53.11#ibcon#first serial, iclass 28, count 0 2006.229.18:35:53.11#ibcon#enter sib2, iclass 28, count 0 2006.229.18:35:53.11#ibcon#flushed, iclass 28, count 0 2006.229.18:35:53.11#ibcon#about to write, iclass 28, count 0 2006.229.18:35:53.11#ibcon#wrote, iclass 28, count 0 2006.229.18:35:53.11#ibcon#about to read 3, iclass 28, count 0 2006.229.18:35:53.13#ibcon#read 3, iclass 28, count 0 2006.229.18:35:53.13#ibcon#about to read 4, iclass 28, count 0 2006.229.18:35:53.13#ibcon#read 4, iclass 28, count 0 2006.229.18:35:53.13#ibcon#about to read 5, iclass 28, count 0 2006.229.18:35:53.13#ibcon#read 5, iclass 28, count 0 2006.229.18:35:53.13#ibcon#about to read 6, iclass 28, count 0 2006.229.18:35:53.13#ibcon#read 6, iclass 28, count 0 2006.229.18:35:53.13#ibcon#end of sib2, iclass 28, count 0 2006.229.18:35:53.13#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:35:53.13#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:35:53.13#ibcon#[27=USB\r\n] 2006.229.18:35:53.13#ibcon#*before write, iclass 28, count 0 2006.229.18:35:53.13#ibcon#enter sib2, iclass 28, count 0 2006.229.18:35:53.13#ibcon#flushed, iclass 28, count 0 2006.229.18:35:53.13#ibcon#about to write, iclass 28, count 0 2006.229.18:35:53.13#ibcon#wrote, iclass 28, count 0 2006.229.18:35:53.13#ibcon#about to read 3, iclass 28, count 0 2006.229.18:35:53.16#ibcon#read 3, iclass 28, count 0 2006.229.18:35:53.16#ibcon#about to read 4, iclass 28, count 0 2006.229.18:35:53.16#ibcon#read 4, iclass 28, count 0 2006.229.18:35:53.16#ibcon#about to read 5, iclass 28, count 0 2006.229.18:35:53.16#ibcon#read 5, iclass 28, count 0 2006.229.18:35:53.16#ibcon#about to read 6, iclass 28, count 0 2006.229.18:35:53.16#ibcon#read 6, iclass 28, count 0 2006.229.18:35:53.16#ibcon#end of sib2, iclass 28, count 0 2006.229.18:35:53.16#ibcon#*after write, iclass 28, count 0 2006.229.18:35:53.16#ibcon#*before return 0, iclass 28, count 0 2006.229.18:35:53.16#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:53.16#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.18:35:53.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:35:53.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:35:53.16$vck44/vblo=5,709.99 2006.229.18:35:53.16#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.18:35:53.16#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.18:35:53.16#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:53.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:53.16#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:53.16#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:53.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:35:53.16#ibcon#first serial, iclass 30, count 0 2006.229.18:35:53.16#ibcon#enter sib2, iclass 30, count 0 2006.229.18:35:53.16#ibcon#flushed, iclass 30, count 0 2006.229.18:35:53.16#ibcon#about to write, iclass 30, count 0 2006.229.18:35:53.16#ibcon#wrote, iclass 30, count 0 2006.229.18:35:53.16#ibcon#about to read 3, iclass 30, count 0 2006.229.18:35:53.18#ibcon#read 3, iclass 30, count 0 2006.229.18:35:53.18#ibcon#about to read 4, iclass 30, count 0 2006.229.18:35:53.18#ibcon#read 4, iclass 30, count 0 2006.229.18:35:53.18#ibcon#about to read 5, iclass 30, count 0 2006.229.18:35:53.18#ibcon#read 5, iclass 30, count 0 2006.229.18:35:53.18#ibcon#about to read 6, iclass 30, count 0 2006.229.18:35:53.18#ibcon#read 6, iclass 30, count 0 2006.229.18:35:53.18#ibcon#end of sib2, iclass 30, count 0 2006.229.18:35:53.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:35:53.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:35:53.18#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:35:53.18#ibcon#*before write, iclass 30, count 0 2006.229.18:35:53.18#ibcon#enter sib2, iclass 30, count 0 2006.229.18:35:53.18#ibcon#flushed, iclass 30, count 0 2006.229.18:35:53.18#ibcon#about to write, iclass 30, count 0 2006.229.18:35:53.18#ibcon#wrote, iclass 30, count 0 2006.229.18:35:53.18#ibcon#about to read 3, iclass 30, count 0 2006.229.18:35:53.22#ibcon#read 3, iclass 30, count 0 2006.229.18:35:53.22#ibcon#about to read 4, iclass 30, count 0 2006.229.18:35:53.22#ibcon#read 4, iclass 30, count 0 2006.229.18:35:53.22#ibcon#about to read 5, iclass 30, count 0 2006.229.18:35:53.22#ibcon#read 5, iclass 30, count 0 2006.229.18:35:53.22#ibcon#about to read 6, iclass 30, count 0 2006.229.18:35:53.22#ibcon#read 6, iclass 30, count 0 2006.229.18:35:53.22#ibcon#end of sib2, iclass 30, count 0 2006.229.18:35:53.22#ibcon#*after write, iclass 30, count 0 2006.229.18:35:53.22#ibcon#*before return 0, iclass 30, count 0 2006.229.18:35:53.22#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:53.22#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.18:35:53.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:35:53.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:35:53.22$vck44/vb=5,4 2006.229.18:35:53.22#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.18:35:53.22#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.18:35:53.22#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:53.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:53.28#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:53.28#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:53.28#ibcon#enter wrdev, iclass 32, count 2 2006.229.18:35:53.28#ibcon#first serial, iclass 32, count 2 2006.229.18:35:53.28#ibcon#enter sib2, iclass 32, count 2 2006.229.18:35:53.28#ibcon#flushed, iclass 32, count 2 2006.229.18:35:53.28#ibcon#about to write, iclass 32, count 2 2006.229.18:35:53.28#ibcon#wrote, iclass 32, count 2 2006.229.18:35:53.28#ibcon#about to read 3, iclass 32, count 2 2006.229.18:35:53.30#ibcon#read 3, iclass 32, count 2 2006.229.18:35:53.30#ibcon#about to read 4, iclass 32, count 2 2006.229.18:35:53.30#ibcon#read 4, iclass 32, count 2 2006.229.18:35:53.30#ibcon#about to read 5, iclass 32, count 2 2006.229.18:35:53.30#ibcon#read 5, iclass 32, count 2 2006.229.18:35:53.30#ibcon#about to read 6, iclass 32, count 2 2006.229.18:35:53.30#ibcon#read 6, iclass 32, count 2 2006.229.18:35:53.30#ibcon#end of sib2, iclass 32, count 2 2006.229.18:35:53.30#ibcon#*mode == 0, iclass 32, count 2 2006.229.18:35:53.30#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.18:35:53.30#ibcon#[27=AT05-04\r\n] 2006.229.18:35:53.30#ibcon#*before write, iclass 32, count 2 2006.229.18:35:53.30#ibcon#enter sib2, iclass 32, count 2 2006.229.18:35:53.30#ibcon#flushed, iclass 32, count 2 2006.229.18:35:53.30#ibcon#about to write, iclass 32, count 2 2006.229.18:35:53.30#ibcon#wrote, iclass 32, count 2 2006.229.18:35:53.30#ibcon#about to read 3, iclass 32, count 2 2006.229.18:35:53.33#ibcon#read 3, iclass 32, count 2 2006.229.18:35:53.33#ibcon#about to read 4, iclass 32, count 2 2006.229.18:35:53.33#ibcon#read 4, iclass 32, count 2 2006.229.18:35:53.33#ibcon#about to read 5, iclass 32, count 2 2006.229.18:35:53.33#ibcon#read 5, iclass 32, count 2 2006.229.18:35:53.33#ibcon#about to read 6, iclass 32, count 2 2006.229.18:35:53.33#ibcon#read 6, iclass 32, count 2 2006.229.18:35:53.33#ibcon#end of sib2, iclass 32, count 2 2006.229.18:35:53.33#ibcon#*after write, iclass 32, count 2 2006.229.18:35:53.33#ibcon#*before return 0, iclass 32, count 2 2006.229.18:35:53.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:53.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.18:35:53.33#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.18:35:53.33#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:53.33#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:53.45#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:53.45#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:53.45#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:35:53.45#ibcon#first serial, iclass 32, count 0 2006.229.18:35:53.45#ibcon#enter sib2, iclass 32, count 0 2006.229.18:35:53.45#ibcon#flushed, iclass 32, count 0 2006.229.18:35:53.45#ibcon#about to write, iclass 32, count 0 2006.229.18:35:53.45#ibcon#wrote, iclass 32, count 0 2006.229.18:35:53.45#ibcon#about to read 3, iclass 32, count 0 2006.229.18:35:53.47#ibcon#read 3, iclass 32, count 0 2006.229.18:35:53.47#ibcon#about to read 4, iclass 32, count 0 2006.229.18:35:53.47#ibcon#read 4, iclass 32, count 0 2006.229.18:35:53.47#ibcon#about to read 5, iclass 32, count 0 2006.229.18:35:53.47#ibcon#read 5, iclass 32, count 0 2006.229.18:35:53.47#ibcon#about to read 6, iclass 32, count 0 2006.229.18:35:53.47#ibcon#read 6, iclass 32, count 0 2006.229.18:35:53.47#ibcon#end of sib2, iclass 32, count 0 2006.229.18:35:53.47#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:35:53.47#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:35:53.47#ibcon#[27=USB\r\n] 2006.229.18:35:53.47#ibcon#*before write, iclass 32, count 0 2006.229.18:35:53.47#ibcon#enter sib2, iclass 32, count 0 2006.229.18:35:53.47#ibcon#flushed, iclass 32, count 0 2006.229.18:35:53.47#ibcon#about to write, iclass 32, count 0 2006.229.18:35:53.47#ibcon#wrote, iclass 32, count 0 2006.229.18:35:53.47#ibcon#about to read 3, iclass 32, count 0 2006.229.18:35:53.50#ibcon#read 3, iclass 32, count 0 2006.229.18:35:53.50#ibcon#about to read 4, iclass 32, count 0 2006.229.18:35:53.50#ibcon#read 4, iclass 32, count 0 2006.229.18:35:53.50#ibcon#about to read 5, iclass 32, count 0 2006.229.18:35:53.50#ibcon#read 5, iclass 32, count 0 2006.229.18:35:53.50#ibcon#about to read 6, iclass 32, count 0 2006.229.18:35:53.50#ibcon#read 6, iclass 32, count 0 2006.229.18:35:53.50#ibcon#end of sib2, iclass 32, count 0 2006.229.18:35:53.50#ibcon#*after write, iclass 32, count 0 2006.229.18:35:53.50#ibcon#*before return 0, iclass 32, count 0 2006.229.18:35:53.50#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:53.50#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.18:35:53.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:35:53.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:35:53.50$vck44/vblo=6,719.99 2006.229.18:35:53.50#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.18:35:53.50#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.18:35:53.50#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:53.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:53.50#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:53.50#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:53.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:35:53.50#ibcon#first serial, iclass 34, count 0 2006.229.18:35:53.50#ibcon#enter sib2, iclass 34, count 0 2006.229.18:35:53.50#ibcon#flushed, iclass 34, count 0 2006.229.18:35:53.50#ibcon#about to write, iclass 34, count 0 2006.229.18:35:53.50#ibcon#wrote, iclass 34, count 0 2006.229.18:35:53.50#ibcon#about to read 3, iclass 34, count 0 2006.229.18:35:53.52#ibcon#read 3, iclass 34, count 0 2006.229.18:35:53.52#ibcon#about to read 4, iclass 34, count 0 2006.229.18:35:53.52#ibcon#read 4, iclass 34, count 0 2006.229.18:35:53.52#ibcon#about to read 5, iclass 34, count 0 2006.229.18:35:53.52#ibcon#read 5, iclass 34, count 0 2006.229.18:35:53.52#ibcon#about to read 6, iclass 34, count 0 2006.229.18:35:53.52#ibcon#read 6, iclass 34, count 0 2006.229.18:35:53.52#ibcon#end of sib2, iclass 34, count 0 2006.229.18:35:53.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:35:53.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:35:53.52#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:35:53.52#ibcon#*before write, iclass 34, count 0 2006.229.18:35:53.52#ibcon#enter sib2, iclass 34, count 0 2006.229.18:35:53.52#ibcon#flushed, iclass 34, count 0 2006.229.18:35:53.52#ibcon#about to write, iclass 34, count 0 2006.229.18:35:53.52#ibcon#wrote, iclass 34, count 0 2006.229.18:35:53.52#ibcon#about to read 3, iclass 34, count 0 2006.229.18:35:53.56#ibcon#read 3, iclass 34, count 0 2006.229.18:35:53.56#ibcon#about to read 4, iclass 34, count 0 2006.229.18:35:53.56#ibcon#read 4, iclass 34, count 0 2006.229.18:35:53.56#ibcon#about to read 5, iclass 34, count 0 2006.229.18:35:53.56#ibcon#read 5, iclass 34, count 0 2006.229.18:35:53.56#ibcon#about to read 6, iclass 34, count 0 2006.229.18:35:53.56#ibcon#read 6, iclass 34, count 0 2006.229.18:35:53.56#ibcon#end of sib2, iclass 34, count 0 2006.229.18:35:53.56#ibcon#*after write, iclass 34, count 0 2006.229.18:35:53.56#ibcon#*before return 0, iclass 34, count 0 2006.229.18:35:53.56#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:53.56#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.18:35:53.56#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:35:53.56#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:35:53.56$vck44/vb=6,4 2006.229.18:35:53.56#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.18:35:53.56#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.18:35:53.56#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:53.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:53.62#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:53.62#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:53.62#ibcon#enter wrdev, iclass 36, count 2 2006.229.18:35:53.62#ibcon#first serial, iclass 36, count 2 2006.229.18:35:53.62#ibcon#enter sib2, iclass 36, count 2 2006.229.18:35:53.62#ibcon#flushed, iclass 36, count 2 2006.229.18:35:53.62#ibcon#about to write, iclass 36, count 2 2006.229.18:35:53.62#ibcon#wrote, iclass 36, count 2 2006.229.18:35:53.62#ibcon#about to read 3, iclass 36, count 2 2006.229.18:35:53.64#ibcon#read 3, iclass 36, count 2 2006.229.18:35:53.64#ibcon#about to read 4, iclass 36, count 2 2006.229.18:35:53.64#ibcon#read 4, iclass 36, count 2 2006.229.18:35:53.64#ibcon#about to read 5, iclass 36, count 2 2006.229.18:35:53.64#ibcon#read 5, iclass 36, count 2 2006.229.18:35:53.64#ibcon#about to read 6, iclass 36, count 2 2006.229.18:35:53.64#ibcon#read 6, iclass 36, count 2 2006.229.18:35:53.64#ibcon#end of sib2, iclass 36, count 2 2006.229.18:35:53.64#ibcon#*mode == 0, iclass 36, count 2 2006.229.18:35:53.64#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.18:35:53.64#ibcon#[27=AT06-04\r\n] 2006.229.18:35:53.64#ibcon#*before write, iclass 36, count 2 2006.229.18:35:53.64#ibcon#enter sib2, iclass 36, count 2 2006.229.18:35:53.64#ibcon#flushed, iclass 36, count 2 2006.229.18:35:53.64#ibcon#about to write, iclass 36, count 2 2006.229.18:35:53.64#ibcon#wrote, iclass 36, count 2 2006.229.18:35:53.64#ibcon#about to read 3, iclass 36, count 2 2006.229.18:35:53.67#ibcon#read 3, iclass 36, count 2 2006.229.18:35:53.67#ibcon#about to read 4, iclass 36, count 2 2006.229.18:35:53.67#ibcon#read 4, iclass 36, count 2 2006.229.18:35:53.67#ibcon#about to read 5, iclass 36, count 2 2006.229.18:35:53.67#ibcon#read 5, iclass 36, count 2 2006.229.18:35:53.67#ibcon#about to read 6, iclass 36, count 2 2006.229.18:35:53.67#ibcon#read 6, iclass 36, count 2 2006.229.18:35:53.67#ibcon#end of sib2, iclass 36, count 2 2006.229.18:35:53.67#ibcon#*after write, iclass 36, count 2 2006.229.18:35:53.67#ibcon#*before return 0, iclass 36, count 2 2006.229.18:35:53.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:53.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.18:35:53.67#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.18:35:53.67#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:53.67#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:53.79#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:53.79#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:53.79#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:35:53.79#ibcon#first serial, iclass 36, count 0 2006.229.18:35:53.79#ibcon#enter sib2, iclass 36, count 0 2006.229.18:35:53.79#ibcon#flushed, iclass 36, count 0 2006.229.18:35:53.79#ibcon#about to write, iclass 36, count 0 2006.229.18:35:53.79#ibcon#wrote, iclass 36, count 0 2006.229.18:35:53.79#ibcon#about to read 3, iclass 36, count 0 2006.229.18:35:53.81#ibcon#read 3, iclass 36, count 0 2006.229.18:35:53.81#ibcon#about to read 4, iclass 36, count 0 2006.229.18:35:53.81#ibcon#read 4, iclass 36, count 0 2006.229.18:35:53.81#ibcon#about to read 5, iclass 36, count 0 2006.229.18:35:53.81#ibcon#read 5, iclass 36, count 0 2006.229.18:35:53.81#ibcon#about to read 6, iclass 36, count 0 2006.229.18:35:53.81#ibcon#read 6, iclass 36, count 0 2006.229.18:35:53.81#ibcon#end of sib2, iclass 36, count 0 2006.229.18:35:53.81#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:35:53.81#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:35:53.81#ibcon#[27=USB\r\n] 2006.229.18:35:53.81#ibcon#*before write, iclass 36, count 0 2006.229.18:35:53.81#ibcon#enter sib2, iclass 36, count 0 2006.229.18:35:53.81#ibcon#flushed, iclass 36, count 0 2006.229.18:35:53.81#ibcon#about to write, iclass 36, count 0 2006.229.18:35:53.81#ibcon#wrote, iclass 36, count 0 2006.229.18:35:53.81#ibcon#about to read 3, iclass 36, count 0 2006.229.18:35:53.84#ibcon#read 3, iclass 36, count 0 2006.229.18:35:53.84#ibcon#about to read 4, iclass 36, count 0 2006.229.18:35:53.84#ibcon#read 4, iclass 36, count 0 2006.229.18:35:53.84#ibcon#about to read 5, iclass 36, count 0 2006.229.18:35:53.84#ibcon#read 5, iclass 36, count 0 2006.229.18:35:53.84#ibcon#about to read 6, iclass 36, count 0 2006.229.18:35:53.84#ibcon#read 6, iclass 36, count 0 2006.229.18:35:53.84#ibcon#end of sib2, iclass 36, count 0 2006.229.18:35:53.84#ibcon#*after write, iclass 36, count 0 2006.229.18:35:53.84#ibcon#*before return 0, iclass 36, count 0 2006.229.18:35:53.84#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:53.84#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.18:35:53.84#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:35:53.84#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:35:53.84$vck44/vblo=7,734.99 2006.229.18:35:53.84#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.18:35:53.84#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.18:35:53.84#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:53.84#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:53.84#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:53.84#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:53.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:35:53.84#ibcon#first serial, iclass 38, count 0 2006.229.18:35:53.84#ibcon#enter sib2, iclass 38, count 0 2006.229.18:35:53.84#ibcon#flushed, iclass 38, count 0 2006.229.18:35:53.84#ibcon#about to write, iclass 38, count 0 2006.229.18:35:53.84#ibcon#wrote, iclass 38, count 0 2006.229.18:35:53.84#ibcon#about to read 3, iclass 38, count 0 2006.229.18:35:53.86#ibcon#read 3, iclass 38, count 0 2006.229.18:35:53.86#ibcon#about to read 4, iclass 38, count 0 2006.229.18:35:53.86#ibcon#read 4, iclass 38, count 0 2006.229.18:35:53.86#ibcon#about to read 5, iclass 38, count 0 2006.229.18:35:53.86#ibcon#read 5, iclass 38, count 0 2006.229.18:35:53.86#ibcon#about to read 6, iclass 38, count 0 2006.229.18:35:53.86#ibcon#read 6, iclass 38, count 0 2006.229.18:35:53.86#ibcon#end of sib2, iclass 38, count 0 2006.229.18:35:53.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:35:53.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:35:53.86#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:35:53.86#ibcon#*before write, iclass 38, count 0 2006.229.18:35:53.86#ibcon#enter sib2, iclass 38, count 0 2006.229.18:35:53.86#ibcon#flushed, iclass 38, count 0 2006.229.18:35:53.86#ibcon#about to write, iclass 38, count 0 2006.229.18:35:53.86#ibcon#wrote, iclass 38, count 0 2006.229.18:35:53.86#ibcon#about to read 3, iclass 38, count 0 2006.229.18:35:53.90#ibcon#read 3, iclass 38, count 0 2006.229.18:35:53.90#ibcon#about to read 4, iclass 38, count 0 2006.229.18:35:53.90#ibcon#read 4, iclass 38, count 0 2006.229.18:35:53.90#ibcon#about to read 5, iclass 38, count 0 2006.229.18:35:53.90#ibcon#read 5, iclass 38, count 0 2006.229.18:35:53.90#ibcon#about to read 6, iclass 38, count 0 2006.229.18:35:53.90#ibcon#read 6, iclass 38, count 0 2006.229.18:35:53.90#ibcon#end of sib2, iclass 38, count 0 2006.229.18:35:53.90#ibcon#*after write, iclass 38, count 0 2006.229.18:35:53.90#ibcon#*before return 0, iclass 38, count 0 2006.229.18:35:53.90#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:53.90#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.18:35:53.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:35:53.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:35:53.90$vck44/vb=7,4 2006.229.18:35:53.90#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.18:35:53.90#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.18:35:53.90#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:53.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:53.96#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:53.96#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:53.96#ibcon#enter wrdev, iclass 40, count 2 2006.229.18:35:53.96#ibcon#first serial, iclass 40, count 2 2006.229.18:35:53.96#ibcon#enter sib2, iclass 40, count 2 2006.229.18:35:53.96#ibcon#flushed, iclass 40, count 2 2006.229.18:35:53.96#ibcon#about to write, iclass 40, count 2 2006.229.18:35:53.96#ibcon#wrote, iclass 40, count 2 2006.229.18:35:53.96#ibcon#about to read 3, iclass 40, count 2 2006.229.18:35:53.98#ibcon#read 3, iclass 40, count 2 2006.229.18:35:53.98#ibcon#about to read 4, iclass 40, count 2 2006.229.18:35:53.98#ibcon#read 4, iclass 40, count 2 2006.229.18:35:53.98#ibcon#about to read 5, iclass 40, count 2 2006.229.18:35:53.98#ibcon#read 5, iclass 40, count 2 2006.229.18:35:53.98#ibcon#about to read 6, iclass 40, count 2 2006.229.18:35:53.98#ibcon#read 6, iclass 40, count 2 2006.229.18:35:53.98#ibcon#end of sib2, iclass 40, count 2 2006.229.18:35:53.98#ibcon#*mode == 0, iclass 40, count 2 2006.229.18:35:53.98#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.18:35:53.98#ibcon#[27=AT07-04\r\n] 2006.229.18:35:53.98#ibcon#*before write, iclass 40, count 2 2006.229.18:35:53.98#ibcon#enter sib2, iclass 40, count 2 2006.229.18:35:53.98#ibcon#flushed, iclass 40, count 2 2006.229.18:35:53.98#ibcon#about to write, iclass 40, count 2 2006.229.18:35:53.98#ibcon#wrote, iclass 40, count 2 2006.229.18:35:53.98#ibcon#about to read 3, iclass 40, count 2 2006.229.18:35:54.01#ibcon#read 3, iclass 40, count 2 2006.229.18:35:54.01#ibcon#about to read 4, iclass 40, count 2 2006.229.18:35:54.01#ibcon#read 4, iclass 40, count 2 2006.229.18:35:54.01#ibcon#about to read 5, iclass 40, count 2 2006.229.18:35:54.01#ibcon#read 5, iclass 40, count 2 2006.229.18:35:54.01#ibcon#about to read 6, iclass 40, count 2 2006.229.18:35:54.01#ibcon#read 6, iclass 40, count 2 2006.229.18:35:54.01#ibcon#end of sib2, iclass 40, count 2 2006.229.18:35:54.01#ibcon#*after write, iclass 40, count 2 2006.229.18:35:54.01#ibcon#*before return 0, iclass 40, count 2 2006.229.18:35:54.01#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:54.01#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.18:35:54.01#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.18:35:54.01#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:54.01#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:54.13#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:54.13#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:54.13#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:35:54.13#ibcon#first serial, iclass 40, count 0 2006.229.18:35:54.13#ibcon#enter sib2, iclass 40, count 0 2006.229.18:35:54.13#ibcon#flushed, iclass 40, count 0 2006.229.18:35:54.13#ibcon#about to write, iclass 40, count 0 2006.229.18:35:54.13#ibcon#wrote, iclass 40, count 0 2006.229.18:35:54.13#ibcon#about to read 3, iclass 40, count 0 2006.229.18:35:54.15#ibcon#read 3, iclass 40, count 0 2006.229.18:35:54.15#ibcon#about to read 4, iclass 40, count 0 2006.229.18:35:54.15#ibcon#read 4, iclass 40, count 0 2006.229.18:35:54.15#ibcon#about to read 5, iclass 40, count 0 2006.229.18:35:54.15#ibcon#read 5, iclass 40, count 0 2006.229.18:35:54.15#ibcon#about to read 6, iclass 40, count 0 2006.229.18:35:54.15#ibcon#read 6, iclass 40, count 0 2006.229.18:35:54.15#ibcon#end of sib2, iclass 40, count 0 2006.229.18:35:54.15#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:35:54.15#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:35:54.15#ibcon#[27=USB\r\n] 2006.229.18:35:54.15#ibcon#*before write, iclass 40, count 0 2006.229.18:35:54.15#ibcon#enter sib2, iclass 40, count 0 2006.229.18:35:54.15#ibcon#flushed, iclass 40, count 0 2006.229.18:35:54.15#ibcon#about to write, iclass 40, count 0 2006.229.18:35:54.15#ibcon#wrote, iclass 40, count 0 2006.229.18:35:54.15#ibcon#about to read 3, iclass 40, count 0 2006.229.18:35:54.18#ibcon#read 3, iclass 40, count 0 2006.229.18:35:54.18#ibcon#about to read 4, iclass 40, count 0 2006.229.18:35:54.18#ibcon#read 4, iclass 40, count 0 2006.229.18:35:54.18#ibcon#about to read 5, iclass 40, count 0 2006.229.18:35:54.18#ibcon#read 5, iclass 40, count 0 2006.229.18:35:54.18#ibcon#about to read 6, iclass 40, count 0 2006.229.18:35:54.18#ibcon#read 6, iclass 40, count 0 2006.229.18:35:54.18#ibcon#end of sib2, iclass 40, count 0 2006.229.18:35:54.18#ibcon#*after write, iclass 40, count 0 2006.229.18:35:54.18#ibcon#*before return 0, iclass 40, count 0 2006.229.18:35:54.18#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:54.18#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.18:35:54.18#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:35:54.18#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:35:54.18$vck44/vblo=8,744.99 2006.229.18:35:54.18#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.18:35:54.18#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.18:35:54.18#ibcon#ireg 17 cls_cnt 0 2006.229.18:35:54.18#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:54.18#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:54.18#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:54.18#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:35:54.18#ibcon#first serial, iclass 4, count 0 2006.229.18:35:54.18#ibcon#enter sib2, iclass 4, count 0 2006.229.18:35:54.18#ibcon#flushed, iclass 4, count 0 2006.229.18:35:54.18#ibcon#about to write, iclass 4, count 0 2006.229.18:35:54.18#ibcon#wrote, iclass 4, count 0 2006.229.18:35:54.18#ibcon#about to read 3, iclass 4, count 0 2006.229.18:35:54.20#ibcon#read 3, iclass 4, count 0 2006.229.18:35:54.20#ibcon#about to read 4, iclass 4, count 0 2006.229.18:35:54.20#ibcon#read 4, iclass 4, count 0 2006.229.18:35:54.20#ibcon#about to read 5, iclass 4, count 0 2006.229.18:35:54.20#ibcon#read 5, iclass 4, count 0 2006.229.18:35:54.20#ibcon#about to read 6, iclass 4, count 0 2006.229.18:35:54.20#ibcon#read 6, iclass 4, count 0 2006.229.18:35:54.20#ibcon#end of sib2, iclass 4, count 0 2006.229.18:35:54.20#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:35:54.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:35:54.20#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:35:54.20#ibcon#*before write, iclass 4, count 0 2006.229.18:35:54.20#ibcon#enter sib2, iclass 4, count 0 2006.229.18:35:54.20#ibcon#flushed, iclass 4, count 0 2006.229.18:35:54.20#ibcon#about to write, iclass 4, count 0 2006.229.18:35:54.20#ibcon#wrote, iclass 4, count 0 2006.229.18:35:54.20#ibcon#about to read 3, iclass 4, count 0 2006.229.18:35:54.24#ibcon#read 3, iclass 4, count 0 2006.229.18:35:54.24#ibcon#about to read 4, iclass 4, count 0 2006.229.18:35:54.24#ibcon#read 4, iclass 4, count 0 2006.229.18:35:54.24#ibcon#about to read 5, iclass 4, count 0 2006.229.18:35:54.24#ibcon#read 5, iclass 4, count 0 2006.229.18:35:54.24#ibcon#about to read 6, iclass 4, count 0 2006.229.18:35:54.24#ibcon#read 6, iclass 4, count 0 2006.229.18:35:54.24#ibcon#end of sib2, iclass 4, count 0 2006.229.18:35:54.24#ibcon#*after write, iclass 4, count 0 2006.229.18:35:54.24#ibcon#*before return 0, iclass 4, count 0 2006.229.18:35:54.24#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:54.24#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.18:35:54.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:35:54.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:35:54.24$vck44/vb=8,4 2006.229.18:35:54.24#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.18:35:54.24#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.18:35:54.24#ibcon#ireg 11 cls_cnt 2 2006.229.18:35:54.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:54.30#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:54.30#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:54.30#ibcon#enter wrdev, iclass 6, count 2 2006.229.18:35:54.30#ibcon#first serial, iclass 6, count 2 2006.229.18:35:54.30#ibcon#enter sib2, iclass 6, count 2 2006.229.18:35:54.30#ibcon#flushed, iclass 6, count 2 2006.229.18:35:54.30#ibcon#about to write, iclass 6, count 2 2006.229.18:35:54.30#ibcon#wrote, iclass 6, count 2 2006.229.18:35:54.30#ibcon#about to read 3, iclass 6, count 2 2006.229.18:35:54.32#ibcon#read 3, iclass 6, count 2 2006.229.18:35:54.32#ibcon#about to read 4, iclass 6, count 2 2006.229.18:35:54.32#ibcon#read 4, iclass 6, count 2 2006.229.18:35:54.32#ibcon#about to read 5, iclass 6, count 2 2006.229.18:35:54.32#ibcon#read 5, iclass 6, count 2 2006.229.18:35:54.32#ibcon#about to read 6, iclass 6, count 2 2006.229.18:35:54.32#ibcon#read 6, iclass 6, count 2 2006.229.18:35:54.32#ibcon#end of sib2, iclass 6, count 2 2006.229.18:35:54.32#ibcon#*mode == 0, iclass 6, count 2 2006.229.18:35:54.32#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.18:35:54.32#ibcon#[27=AT08-04\r\n] 2006.229.18:35:54.32#ibcon#*before write, iclass 6, count 2 2006.229.18:35:54.32#ibcon#enter sib2, iclass 6, count 2 2006.229.18:35:54.32#ibcon#flushed, iclass 6, count 2 2006.229.18:35:54.32#ibcon#about to write, iclass 6, count 2 2006.229.18:35:54.32#ibcon#wrote, iclass 6, count 2 2006.229.18:35:54.32#ibcon#about to read 3, iclass 6, count 2 2006.229.18:35:54.35#ibcon#read 3, iclass 6, count 2 2006.229.18:35:54.35#ibcon#about to read 4, iclass 6, count 2 2006.229.18:35:54.35#ibcon#read 4, iclass 6, count 2 2006.229.18:35:54.35#ibcon#about to read 5, iclass 6, count 2 2006.229.18:35:54.35#ibcon#read 5, iclass 6, count 2 2006.229.18:35:54.35#ibcon#about to read 6, iclass 6, count 2 2006.229.18:35:54.35#ibcon#read 6, iclass 6, count 2 2006.229.18:35:54.35#ibcon#end of sib2, iclass 6, count 2 2006.229.18:35:54.35#ibcon#*after write, iclass 6, count 2 2006.229.18:35:54.35#ibcon#*before return 0, iclass 6, count 2 2006.229.18:35:54.35#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:54.35#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.18:35:54.35#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.18:35:54.35#ibcon#ireg 7 cls_cnt 0 2006.229.18:35:54.35#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:54.47#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:54.47#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:54.47#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:35:54.47#ibcon#first serial, iclass 6, count 0 2006.229.18:35:54.47#ibcon#enter sib2, iclass 6, count 0 2006.229.18:35:54.47#ibcon#flushed, iclass 6, count 0 2006.229.18:35:54.47#ibcon#about to write, iclass 6, count 0 2006.229.18:35:54.47#ibcon#wrote, iclass 6, count 0 2006.229.18:35:54.47#ibcon#about to read 3, iclass 6, count 0 2006.229.18:35:54.49#ibcon#read 3, iclass 6, count 0 2006.229.18:35:54.49#ibcon#about to read 4, iclass 6, count 0 2006.229.18:35:54.49#ibcon#read 4, iclass 6, count 0 2006.229.18:35:54.49#ibcon#about to read 5, iclass 6, count 0 2006.229.18:35:54.49#ibcon#read 5, iclass 6, count 0 2006.229.18:35:54.49#ibcon#about to read 6, iclass 6, count 0 2006.229.18:35:54.49#ibcon#read 6, iclass 6, count 0 2006.229.18:35:54.49#ibcon#end of sib2, iclass 6, count 0 2006.229.18:35:54.49#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:35:54.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:35:54.49#ibcon#[27=USB\r\n] 2006.229.18:35:54.49#ibcon#*before write, iclass 6, count 0 2006.229.18:35:54.49#ibcon#enter sib2, iclass 6, count 0 2006.229.18:35:54.49#ibcon#flushed, iclass 6, count 0 2006.229.18:35:54.49#ibcon#about to write, iclass 6, count 0 2006.229.18:35:54.49#ibcon#wrote, iclass 6, count 0 2006.229.18:35:54.49#ibcon#about to read 3, iclass 6, count 0 2006.229.18:35:54.52#ibcon#read 3, iclass 6, count 0 2006.229.18:35:54.52#ibcon#about to read 4, iclass 6, count 0 2006.229.18:35:54.52#ibcon#read 4, iclass 6, count 0 2006.229.18:35:54.52#ibcon#about to read 5, iclass 6, count 0 2006.229.18:35:54.52#ibcon#read 5, iclass 6, count 0 2006.229.18:35:54.52#ibcon#about to read 6, iclass 6, count 0 2006.229.18:35:54.52#ibcon#read 6, iclass 6, count 0 2006.229.18:35:54.52#ibcon#end of sib2, iclass 6, count 0 2006.229.18:35:54.52#ibcon#*after write, iclass 6, count 0 2006.229.18:35:54.52#ibcon#*before return 0, iclass 6, count 0 2006.229.18:35:54.52#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:54.52#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.18:35:54.52#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:35:54.52#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:35:54.52$vck44/vabw=wide 2006.229.18:35:54.52#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.18:35:54.52#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.18:35:54.52#ibcon#ireg 8 cls_cnt 0 2006.229.18:35:54.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:54.52#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:54.52#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:54.52#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:35:54.52#ibcon#first serial, iclass 10, count 0 2006.229.18:35:54.52#ibcon#enter sib2, iclass 10, count 0 2006.229.18:35:54.52#ibcon#flushed, iclass 10, count 0 2006.229.18:35:54.52#ibcon#about to write, iclass 10, count 0 2006.229.18:35:54.52#ibcon#wrote, iclass 10, count 0 2006.229.18:35:54.52#ibcon#about to read 3, iclass 10, count 0 2006.229.18:35:54.54#ibcon#read 3, iclass 10, count 0 2006.229.18:35:54.54#ibcon#about to read 4, iclass 10, count 0 2006.229.18:35:54.54#ibcon#read 4, iclass 10, count 0 2006.229.18:35:54.54#ibcon#about to read 5, iclass 10, count 0 2006.229.18:35:54.54#ibcon#read 5, iclass 10, count 0 2006.229.18:35:54.54#ibcon#about to read 6, iclass 10, count 0 2006.229.18:35:54.54#ibcon#read 6, iclass 10, count 0 2006.229.18:35:54.54#ibcon#end of sib2, iclass 10, count 0 2006.229.18:35:54.54#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:35:54.54#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:35:54.54#ibcon#[25=BW32\r\n] 2006.229.18:35:54.54#ibcon#*before write, iclass 10, count 0 2006.229.18:35:54.54#ibcon#enter sib2, iclass 10, count 0 2006.229.18:35:54.54#ibcon#flushed, iclass 10, count 0 2006.229.18:35:54.54#ibcon#about to write, iclass 10, count 0 2006.229.18:35:54.54#ibcon#wrote, iclass 10, count 0 2006.229.18:35:54.54#ibcon#about to read 3, iclass 10, count 0 2006.229.18:35:54.57#ibcon#read 3, iclass 10, count 0 2006.229.18:35:54.57#ibcon#about to read 4, iclass 10, count 0 2006.229.18:35:54.57#ibcon#read 4, iclass 10, count 0 2006.229.18:35:54.57#ibcon#about to read 5, iclass 10, count 0 2006.229.18:35:54.57#ibcon#read 5, iclass 10, count 0 2006.229.18:35:54.57#ibcon#about to read 6, iclass 10, count 0 2006.229.18:35:54.57#ibcon#read 6, iclass 10, count 0 2006.229.18:35:54.57#ibcon#end of sib2, iclass 10, count 0 2006.229.18:35:54.57#ibcon#*after write, iclass 10, count 0 2006.229.18:35:54.57#ibcon#*before return 0, iclass 10, count 0 2006.229.18:35:54.57#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:54.57#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.18:35:54.57#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:35:54.57#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:35:54.57$vck44/vbbw=wide 2006.229.18:35:54.57#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:35:54.57#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:35:54.57#ibcon#ireg 8 cls_cnt 0 2006.229.18:35:54.57#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:35:54.64#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:35:54.64#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:35:54.64#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:35:54.64#ibcon#first serial, iclass 12, count 0 2006.229.18:35:54.64#ibcon#enter sib2, iclass 12, count 0 2006.229.18:35:54.64#ibcon#flushed, iclass 12, count 0 2006.229.18:35:54.64#ibcon#about to write, iclass 12, count 0 2006.229.18:35:54.64#ibcon#wrote, iclass 12, count 0 2006.229.18:35:54.64#ibcon#about to read 3, iclass 12, count 0 2006.229.18:35:54.66#ibcon#read 3, iclass 12, count 0 2006.229.18:35:54.66#ibcon#about to read 4, iclass 12, count 0 2006.229.18:35:54.66#ibcon#read 4, iclass 12, count 0 2006.229.18:35:54.66#ibcon#about to read 5, iclass 12, count 0 2006.229.18:35:54.66#ibcon#read 5, iclass 12, count 0 2006.229.18:35:54.66#ibcon#about to read 6, iclass 12, count 0 2006.229.18:35:54.66#ibcon#read 6, iclass 12, count 0 2006.229.18:35:54.66#ibcon#end of sib2, iclass 12, count 0 2006.229.18:35:54.66#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:35:54.66#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:35:54.66#ibcon#[27=BW32\r\n] 2006.229.18:35:54.66#ibcon#*before write, iclass 12, count 0 2006.229.18:35:54.66#ibcon#enter sib2, iclass 12, count 0 2006.229.18:35:54.66#ibcon#flushed, iclass 12, count 0 2006.229.18:35:54.66#ibcon#about to write, iclass 12, count 0 2006.229.18:35:54.66#ibcon#wrote, iclass 12, count 0 2006.229.18:35:54.66#ibcon#about to read 3, iclass 12, count 0 2006.229.18:35:54.69#ibcon#read 3, iclass 12, count 0 2006.229.18:35:54.69#ibcon#about to read 4, iclass 12, count 0 2006.229.18:35:54.69#ibcon#read 4, iclass 12, count 0 2006.229.18:35:54.69#ibcon#about to read 5, iclass 12, count 0 2006.229.18:35:54.69#ibcon#read 5, iclass 12, count 0 2006.229.18:35:54.69#ibcon#about to read 6, iclass 12, count 0 2006.229.18:35:54.69#ibcon#read 6, iclass 12, count 0 2006.229.18:35:54.69#ibcon#end of sib2, iclass 12, count 0 2006.229.18:35:54.69#ibcon#*after write, iclass 12, count 0 2006.229.18:35:54.69#ibcon#*before return 0, iclass 12, count 0 2006.229.18:35:54.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:35:54.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:35:54.69#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:35:54.69#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:35:54.69$setupk4/ifdk4 2006.229.18:35:54.69$ifdk4/lo= 2006.229.18:35:54.69$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:35:54.69$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:35:54.69$ifdk4/patch= 2006.229.18:35:54.69$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:35:54.69$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:35:54.69$setupk4/!*+20s 2006.229.18:35:58.03#abcon#<5=/07 1.0 1.8 26.341001001.4\r\n> 2006.229.18:35:58.05#abcon#{5=INTERFACE CLEAR} 2006.229.18:35:58.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:36:01.14#trakl#Source acquired 2006.229.18:36:02.14#flagr#flagr/antenna,acquired 2006.229.18:36:08.20#abcon#<5=/07 1.0 1.8 26.341001001.4\r\n> 2006.229.18:36:08.22#abcon#{5=INTERFACE CLEAR} 2006.229.18:36:08.28#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:36:09.21$setupk4/"tpicd 2006.229.18:36:09.21$setupk4/echo=off 2006.229.18:36:09.21$setupk4/xlog=off 2006.229.18:36:09.21:!2006.229.18:40:15 2006.229.18:40:15.00:preob 2006.229.18:40:15.13/onsource/TRACKING 2006.229.18:40:15.13:!2006.229.18:40:25 2006.229.18:40:25.00:"tape 2006.229.18:40:25.00:"st=record 2006.229.18:40:25.00:data_valid=on 2006.229.18:40:25.00:midob 2006.229.18:40:26.13/onsource/TRACKING 2006.229.18:40:26.13/wx/26.30,1001.4,100 2006.229.18:40:26.30/cable/+6.4182E-03 2006.229.18:40:27.39/va/01,08,usb,yes,32,34 2006.229.18:40:27.39/va/02,07,usb,yes,35,35 2006.229.18:40:27.39/va/03,06,usb,yes,43,45 2006.229.18:40:27.39/va/04,07,usb,yes,36,37 2006.229.18:40:27.39/va/05,04,usb,yes,32,32 2006.229.18:40:27.39/va/06,04,usb,yes,36,35 2006.229.18:40:27.39/va/07,05,usb,yes,32,32 2006.229.18:40:27.39/va/08,06,usb,yes,23,28 2006.229.18:40:27.62/valo/01,524.99,yes,locked 2006.229.18:40:27.62/valo/02,534.99,yes,locked 2006.229.18:40:27.62/valo/03,564.99,yes,locked 2006.229.18:40:27.62/valo/04,624.99,yes,locked 2006.229.18:40:27.62/valo/05,734.99,yes,locked 2006.229.18:40:27.62/valo/06,814.99,yes,locked 2006.229.18:40:27.62/valo/07,864.99,yes,locked 2006.229.18:40:27.62/valo/08,884.99,yes,locked 2006.229.18:40:28.71/vb/01,04,usb,yes,31,29 2006.229.18:40:28.71/vb/02,04,usb,yes,33,33 2006.229.18:40:28.71/vb/03,04,usb,yes,31,34 2006.229.18:40:28.71/vb/04,04,usb,yes,35,34 2006.229.18:40:28.71/vb/05,04,usb,yes,27,30 2006.229.18:40:28.71/vb/06,04,usb,yes,32,28 2006.229.18:40:28.71/vb/07,04,usb,yes,32,32 2006.229.18:40:28.71/vb/08,04,usb,yes,29,33 2006.229.18:40:28.95/vblo/01,629.99,yes,locked 2006.229.18:40:28.95/vblo/02,634.99,yes,locked 2006.229.18:40:28.95/vblo/03,649.99,yes,locked 2006.229.18:40:28.95/vblo/04,679.99,yes,locked 2006.229.18:40:28.95/vblo/05,709.99,yes,locked 2006.229.18:40:28.95/vblo/06,719.99,yes,locked 2006.229.18:40:28.95/vblo/07,734.99,yes,locked 2006.229.18:40:28.95/vblo/08,744.99,yes,locked 2006.229.18:40:29.10/vabw/8 2006.229.18:40:29.25/vbbw/8 2006.229.18:40:29.34/xfe/off,on,12.2 2006.229.18:40:29.72/ifatt/23,28,28,28 2006.229.18:40:30.08/fmout-gps/S +4.51E-07 2006.229.18:40:30.12:!2006.229.18:45:15 2006.229.18:45:15.00:data_valid=off 2006.229.18:45:15.00:"et 2006.229.18:45:15.00:!+3s 2006.229.18:45:18.01:"tape 2006.229.18:45:18.01:postob 2006.229.18:45:18.17/cable/+6.4165E-03 2006.229.18:45:18.17/wx/26.25,1001.3,100 2006.229.18:45:19.07/fmout-gps/S +4.49E-07 2006.229.18:45:19.07:scan_name=229-1854,jd0608,70 2006.229.18:45:19.07:source=2145+067,214805.46,065738.6,2000.0,ccw 2006.229.18:45:20.14#flagr#flagr/antenna,new-source 2006.229.18:45:20.14:checkk5 2006.229.18:45:20.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:45:20.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:45:21.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:45:21.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:45:22.12/chk_obsdata//k5ts1/T2291840??a.dat file size is correct (nominal:1160MB, actual:1160MB). 2006.229.18:45:22.52/chk_obsdata//k5ts2/T2291840??b.dat file size is correct (nominal:1160MB, actual:1160MB). 2006.229.18:45:22.92/chk_obsdata//k5ts3/T2291840??c.dat file size is correct (nominal:1160MB, actual:1160MB). 2006.229.18:45:23.32/chk_obsdata//k5ts4/T2291840??d.dat file size is correct (nominal:1160MB, actual:1160MB). 2006.229.18:45:24.04/k5log//k5ts1_log_newline 2006.229.18:45:24.75/k5log//k5ts2_log_newline 2006.229.18:45:25.46/k5log//k5ts3_log_newline 2006.229.18:45:26.17/k5log//k5ts4_log_newline 2006.229.18:45:26.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:45:26.20:setupk4=1 2006.229.18:45:26.20$setupk4/echo=on 2006.229.18:45:26.20$setupk4/pcalon 2006.229.18:45:26.20$pcalon/"no phase cal control is implemented here 2006.229.18:45:26.20$setupk4/"tpicd=stop 2006.229.18:45:26.20$setupk4/"rec=synch_on 2006.229.18:45:26.20$setupk4/"rec_mode=128 2006.229.18:45:26.20$setupk4/!* 2006.229.18:45:26.20$setupk4/recpk4 2006.229.18:45:26.20$recpk4/recpatch= 2006.229.18:45:26.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:45:26.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:45:26.21$setupk4/vck44 2006.229.18:45:26.21$vck44/valo=1,524.99 2006.229.18:45:26.21#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.18:45:26.21#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.18:45:26.21#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:26.21#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:26.21#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:26.21#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:26.21#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:45:26.21#ibcon#first serial, iclass 25, count 0 2006.229.18:45:26.21#ibcon#enter sib2, iclass 25, count 0 2006.229.18:45:26.21#ibcon#flushed, iclass 25, count 0 2006.229.18:45:26.21#ibcon#about to write, iclass 25, count 0 2006.229.18:45:26.21#ibcon#wrote, iclass 25, count 0 2006.229.18:45:26.21#ibcon#about to read 3, iclass 25, count 0 2006.229.18:45:26.22#ibcon#read 3, iclass 25, count 0 2006.229.18:45:26.22#ibcon#about to read 4, iclass 25, count 0 2006.229.18:45:26.22#ibcon#read 4, iclass 25, count 0 2006.229.18:45:26.22#ibcon#about to read 5, iclass 25, count 0 2006.229.18:45:26.22#ibcon#read 5, iclass 25, count 0 2006.229.18:45:26.22#ibcon#about to read 6, iclass 25, count 0 2006.229.18:45:26.22#ibcon#read 6, iclass 25, count 0 2006.229.18:45:26.22#ibcon#end of sib2, iclass 25, count 0 2006.229.18:45:26.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:45:26.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:45:26.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:45:26.22#ibcon#*before write, iclass 25, count 0 2006.229.18:45:26.22#ibcon#enter sib2, iclass 25, count 0 2006.229.18:45:26.22#ibcon#flushed, iclass 25, count 0 2006.229.18:45:26.22#ibcon#about to write, iclass 25, count 0 2006.229.18:45:26.22#ibcon#wrote, iclass 25, count 0 2006.229.18:45:26.22#ibcon#about to read 3, iclass 25, count 0 2006.229.18:45:26.27#ibcon#read 3, iclass 25, count 0 2006.229.18:45:26.27#ibcon#about to read 4, iclass 25, count 0 2006.229.18:45:26.27#ibcon#read 4, iclass 25, count 0 2006.229.18:45:26.27#ibcon#about to read 5, iclass 25, count 0 2006.229.18:45:26.27#ibcon#read 5, iclass 25, count 0 2006.229.18:45:26.27#ibcon#about to read 6, iclass 25, count 0 2006.229.18:45:26.27#ibcon#read 6, iclass 25, count 0 2006.229.18:45:26.27#ibcon#end of sib2, iclass 25, count 0 2006.229.18:45:26.27#ibcon#*after write, iclass 25, count 0 2006.229.18:45:26.27#ibcon#*before return 0, iclass 25, count 0 2006.229.18:45:26.27#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:26.27#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:26.27#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:45:26.27#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:45:26.27$vck44/va=1,8 2006.229.18:45:26.27#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.18:45:26.27#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.18:45:26.27#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:26.27#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:26.27#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:26.27#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:26.27#ibcon#enter wrdev, iclass 27, count 2 2006.229.18:45:26.27#ibcon#first serial, iclass 27, count 2 2006.229.18:45:26.27#ibcon#enter sib2, iclass 27, count 2 2006.229.18:45:26.27#ibcon#flushed, iclass 27, count 2 2006.229.18:45:26.27#ibcon#about to write, iclass 27, count 2 2006.229.18:45:26.27#ibcon#wrote, iclass 27, count 2 2006.229.18:45:26.27#ibcon#about to read 3, iclass 27, count 2 2006.229.18:45:26.29#ibcon#read 3, iclass 27, count 2 2006.229.18:45:26.29#ibcon#about to read 4, iclass 27, count 2 2006.229.18:45:26.29#ibcon#read 4, iclass 27, count 2 2006.229.18:45:26.29#ibcon#about to read 5, iclass 27, count 2 2006.229.18:45:26.29#ibcon#read 5, iclass 27, count 2 2006.229.18:45:26.29#ibcon#about to read 6, iclass 27, count 2 2006.229.18:45:26.29#ibcon#read 6, iclass 27, count 2 2006.229.18:45:26.29#ibcon#end of sib2, iclass 27, count 2 2006.229.18:45:26.29#ibcon#*mode == 0, iclass 27, count 2 2006.229.18:45:26.29#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.18:45:26.29#ibcon#[25=AT01-08\r\n] 2006.229.18:45:26.29#ibcon#*before write, iclass 27, count 2 2006.229.18:45:26.29#ibcon#enter sib2, iclass 27, count 2 2006.229.18:45:26.29#ibcon#flushed, iclass 27, count 2 2006.229.18:45:26.29#ibcon#about to write, iclass 27, count 2 2006.229.18:45:26.29#ibcon#wrote, iclass 27, count 2 2006.229.18:45:26.29#ibcon#about to read 3, iclass 27, count 2 2006.229.18:45:26.32#ibcon#read 3, iclass 27, count 2 2006.229.18:45:26.32#ibcon#about to read 4, iclass 27, count 2 2006.229.18:45:26.32#ibcon#read 4, iclass 27, count 2 2006.229.18:45:26.32#ibcon#about to read 5, iclass 27, count 2 2006.229.18:45:26.32#ibcon#read 5, iclass 27, count 2 2006.229.18:45:26.32#ibcon#about to read 6, iclass 27, count 2 2006.229.18:45:26.32#ibcon#read 6, iclass 27, count 2 2006.229.18:45:26.32#ibcon#end of sib2, iclass 27, count 2 2006.229.18:45:26.32#ibcon#*after write, iclass 27, count 2 2006.229.18:45:26.32#ibcon#*before return 0, iclass 27, count 2 2006.229.18:45:26.32#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:26.32#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:26.32#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.18:45:26.32#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:26.32#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:26.44#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:26.44#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:26.44#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:45:26.44#ibcon#first serial, iclass 27, count 0 2006.229.18:45:26.44#ibcon#enter sib2, iclass 27, count 0 2006.229.18:45:26.44#ibcon#flushed, iclass 27, count 0 2006.229.18:45:26.44#ibcon#about to write, iclass 27, count 0 2006.229.18:45:26.44#ibcon#wrote, iclass 27, count 0 2006.229.18:45:26.44#ibcon#about to read 3, iclass 27, count 0 2006.229.18:45:26.46#ibcon#read 3, iclass 27, count 0 2006.229.18:45:26.46#ibcon#about to read 4, iclass 27, count 0 2006.229.18:45:26.46#ibcon#read 4, iclass 27, count 0 2006.229.18:45:26.46#ibcon#about to read 5, iclass 27, count 0 2006.229.18:45:26.46#ibcon#read 5, iclass 27, count 0 2006.229.18:45:26.46#ibcon#about to read 6, iclass 27, count 0 2006.229.18:45:26.46#ibcon#read 6, iclass 27, count 0 2006.229.18:45:26.46#ibcon#end of sib2, iclass 27, count 0 2006.229.18:45:26.46#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:45:26.46#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:45:26.46#ibcon#[25=USB\r\n] 2006.229.18:45:26.46#ibcon#*before write, iclass 27, count 0 2006.229.18:45:26.46#ibcon#enter sib2, iclass 27, count 0 2006.229.18:45:26.46#ibcon#flushed, iclass 27, count 0 2006.229.18:45:26.46#ibcon#about to write, iclass 27, count 0 2006.229.18:45:26.46#ibcon#wrote, iclass 27, count 0 2006.229.18:45:26.46#ibcon#about to read 3, iclass 27, count 0 2006.229.18:45:26.49#ibcon#read 3, iclass 27, count 0 2006.229.18:45:26.49#ibcon#about to read 4, iclass 27, count 0 2006.229.18:45:26.49#ibcon#read 4, iclass 27, count 0 2006.229.18:45:26.49#ibcon#about to read 5, iclass 27, count 0 2006.229.18:45:26.49#ibcon#read 5, iclass 27, count 0 2006.229.18:45:26.49#ibcon#about to read 6, iclass 27, count 0 2006.229.18:45:26.49#ibcon#read 6, iclass 27, count 0 2006.229.18:45:26.49#ibcon#end of sib2, iclass 27, count 0 2006.229.18:45:26.49#ibcon#*after write, iclass 27, count 0 2006.229.18:45:26.49#ibcon#*before return 0, iclass 27, count 0 2006.229.18:45:26.49#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:26.49#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:26.49#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:45:26.49#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:45:26.49$vck44/valo=2,534.99 2006.229.18:45:26.49#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.18:45:26.49#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.18:45:26.49#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:26.49#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:26.49#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:26.49#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:26.49#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:45:26.49#ibcon#first serial, iclass 29, count 0 2006.229.18:45:26.49#ibcon#enter sib2, iclass 29, count 0 2006.229.18:45:26.49#ibcon#flushed, iclass 29, count 0 2006.229.18:45:26.49#ibcon#about to write, iclass 29, count 0 2006.229.18:45:26.49#ibcon#wrote, iclass 29, count 0 2006.229.18:45:26.49#ibcon#about to read 3, iclass 29, count 0 2006.229.18:45:26.51#ibcon#read 3, iclass 29, count 0 2006.229.18:45:26.51#ibcon#about to read 4, iclass 29, count 0 2006.229.18:45:26.51#ibcon#read 4, iclass 29, count 0 2006.229.18:45:26.51#ibcon#about to read 5, iclass 29, count 0 2006.229.18:45:26.51#ibcon#read 5, iclass 29, count 0 2006.229.18:45:26.51#ibcon#about to read 6, iclass 29, count 0 2006.229.18:45:26.51#ibcon#read 6, iclass 29, count 0 2006.229.18:45:26.51#ibcon#end of sib2, iclass 29, count 0 2006.229.18:45:26.51#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:45:26.51#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:45:26.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:45:26.51#ibcon#*before write, iclass 29, count 0 2006.229.18:45:26.51#ibcon#enter sib2, iclass 29, count 0 2006.229.18:45:26.51#ibcon#flushed, iclass 29, count 0 2006.229.18:45:26.51#ibcon#about to write, iclass 29, count 0 2006.229.18:45:26.51#ibcon#wrote, iclass 29, count 0 2006.229.18:45:26.51#ibcon#about to read 3, iclass 29, count 0 2006.229.18:45:26.55#ibcon#read 3, iclass 29, count 0 2006.229.18:45:26.55#ibcon#about to read 4, iclass 29, count 0 2006.229.18:45:26.55#ibcon#read 4, iclass 29, count 0 2006.229.18:45:26.55#ibcon#about to read 5, iclass 29, count 0 2006.229.18:45:26.55#ibcon#read 5, iclass 29, count 0 2006.229.18:45:26.55#ibcon#about to read 6, iclass 29, count 0 2006.229.18:45:26.55#ibcon#read 6, iclass 29, count 0 2006.229.18:45:26.55#ibcon#end of sib2, iclass 29, count 0 2006.229.18:45:26.55#ibcon#*after write, iclass 29, count 0 2006.229.18:45:26.55#ibcon#*before return 0, iclass 29, count 0 2006.229.18:45:26.55#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:26.55#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:26.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:45:26.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:45:26.55$vck44/va=2,7 2006.229.18:45:26.55#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.18:45:26.55#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.18:45:26.55#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:26.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:26.61#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:26.61#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:26.61#ibcon#enter wrdev, iclass 31, count 2 2006.229.18:45:26.61#ibcon#first serial, iclass 31, count 2 2006.229.18:45:26.61#ibcon#enter sib2, iclass 31, count 2 2006.229.18:45:26.61#ibcon#flushed, iclass 31, count 2 2006.229.18:45:26.61#ibcon#about to write, iclass 31, count 2 2006.229.18:45:26.61#ibcon#wrote, iclass 31, count 2 2006.229.18:45:26.61#ibcon#about to read 3, iclass 31, count 2 2006.229.18:45:26.63#ibcon#read 3, iclass 31, count 2 2006.229.18:45:26.63#ibcon#about to read 4, iclass 31, count 2 2006.229.18:45:26.63#ibcon#read 4, iclass 31, count 2 2006.229.18:45:26.63#ibcon#about to read 5, iclass 31, count 2 2006.229.18:45:26.63#ibcon#read 5, iclass 31, count 2 2006.229.18:45:26.63#ibcon#about to read 6, iclass 31, count 2 2006.229.18:45:26.63#ibcon#read 6, iclass 31, count 2 2006.229.18:45:26.63#ibcon#end of sib2, iclass 31, count 2 2006.229.18:45:26.63#ibcon#*mode == 0, iclass 31, count 2 2006.229.18:45:26.63#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.18:45:26.63#ibcon#[25=AT02-07\r\n] 2006.229.18:45:26.63#ibcon#*before write, iclass 31, count 2 2006.229.18:45:26.63#ibcon#enter sib2, iclass 31, count 2 2006.229.18:45:26.63#ibcon#flushed, iclass 31, count 2 2006.229.18:45:26.63#ibcon#about to write, iclass 31, count 2 2006.229.18:45:26.63#ibcon#wrote, iclass 31, count 2 2006.229.18:45:26.63#ibcon#about to read 3, iclass 31, count 2 2006.229.18:45:26.66#ibcon#read 3, iclass 31, count 2 2006.229.18:45:26.66#ibcon#about to read 4, iclass 31, count 2 2006.229.18:45:26.66#ibcon#read 4, iclass 31, count 2 2006.229.18:45:26.66#ibcon#about to read 5, iclass 31, count 2 2006.229.18:45:26.66#ibcon#read 5, iclass 31, count 2 2006.229.18:45:26.66#ibcon#about to read 6, iclass 31, count 2 2006.229.18:45:26.66#ibcon#read 6, iclass 31, count 2 2006.229.18:45:26.66#ibcon#end of sib2, iclass 31, count 2 2006.229.18:45:26.66#ibcon#*after write, iclass 31, count 2 2006.229.18:45:26.66#ibcon#*before return 0, iclass 31, count 2 2006.229.18:45:26.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:26.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:26.66#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.18:45:26.66#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:26.66#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:26.78#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:26.78#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:26.78#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:45:26.78#ibcon#first serial, iclass 31, count 0 2006.229.18:45:26.78#ibcon#enter sib2, iclass 31, count 0 2006.229.18:45:26.78#ibcon#flushed, iclass 31, count 0 2006.229.18:45:26.78#ibcon#about to write, iclass 31, count 0 2006.229.18:45:26.78#ibcon#wrote, iclass 31, count 0 2006.229.18:45:26.78#ibcon#about to read 3, iclass 31, count 0 2006.229.18:45:26.80#ibcon#read 3, iclass 31, count 0 2006.229.18:45:26.80#ibcon#about to read 4, iclass 31, count 0 2006.229.18:45:26.80#ibcon#read 4, iclass 31, count 0 2006.229.18:45:26.80#ibcon#about to read 5, iclass 31, count 0 2006.229.18:45:26.80#ibcon#read 5, iclass 31, count 0 2006.229.18:45:26.80#ibcon#about to read 6, iclass 31, count 0 2006.229.18:45:26.80#ibcon#read 6, iclass 31, count 0 2006.229.18:45:26.80#ibcon#end of sib2, iclass 31, count 0 2006.229.18:45:26.80#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:45:26.80#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:45:26.80#ibcon#[25=USB\r\n] 2006.229.18:45:26.80#ibcon#*before write, iclass 31, count 0 2006.229.18:45:26.80#ibcon#enter sib2, iclass 31, count 0 2006.229.18:45:26.80#ibcon#flushed, iclass 31, count 0 2006.229.18:45:26.80#ibcon#about to write, iclass 31, count 0 2006.229.18:45:26.80#ibcon#wrote, iclass 31, count 0 2006.229.18:45:26.80#ibcon#about to read 3, iclass 31, count 0 2006.229.18:45:26.83#ibcon#read 3, iclass 31, count 0 2006.229.18:45:26.83#ibcon#about to read 4, iclass 31, count 0 2006.229.18:45:26.83#ibcon#read 4, iclass 31, count 0 2006.229.18:45:26.83#ibcon#about to read 5, iclass 31, count 0 2006.229.18:45:26.83#ibcon#read 5, iclass 31, count 0 2006.229.18:45:26.83#ibcon#about to read 6, iclass 31, count 0 2006.229.18:45:26.83#ibcon#read 6, iclass 31, count 0 2006.229.18:45:26.83#ibcon#end of sib2, iclass 31, count 0 2006.229.18:45:26.83#ibcon#*after write, iclass 31, count 0 2006.229.18:45:26.83#ibcon#*before return 0, iclass 31, count 0 2006.229.18:45:26.83#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:26.83#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:26.83#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:45:26.83#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:45:26.83$vck44/valo=3,564.99 2006.229.18:45:26.83#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.18:45:26.83#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.18:45:26.83#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:26.83#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:26.83#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:26.83#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:26.83#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:45:26.83#ibcon#first serial, iclass 33, count 0 2006.229.18:45:26.83#ibcon#enter sib2, iclass 33, count 0 2006.229.18:45:26.83#ibcon#flushed, iclass 33, count 0 2006.229.18:45:26.83#ibcon#about to write, iclass 33, count 0 2006.229.18:45:26.83#ibcon#wrote, iclass 33, count 0 2006.229.18:45:26.83#ibcon#about to read 3, iclass 33, count 0 2006.229.18:45:26.85#ibcon#read 3, iclass 33, count 0 2006.229.18:45:26.85#ibcon#about to read 4, iclass 33, count 0 2006.229.18:45:26.85#ibcon#read 4, iclass 33, count 0 2006.229.18:45:26.85#ibcon#about to read 5, iclass 33, count 0 2006.229.18:45:26.85#ibcon#read 5, iclass 33, count 0 2006.229.18:45:26.85#ibcon#about to read 6, iclass 33, count 0 2006.229.18:45:26.85#ibcon#read 6, iclass 33, count 0 2006.229.18:45:26.85#ibcon#end of sib2, iclass 33, count 0 2006.229.18:45:26.85#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:45:26.85#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:45:26.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:45:26.85#ibcon#*before write, iclass 33, count 0 2006.229.18:45:26.85#ibcon#enter sib2, iclass 33, count 0 2006.229.18:45:26.85#ibcon#flushed, iclass 33, count 0 2006.229.18:45:26.85#ibcon#about to write, iclass 33, count 0 2006.229.18:45:26.85#ibcon#wrote, iclass 33, count 0 2006.229.18:45:26.85#ibcon#about to read 3, iclass 33, count 0 2006.229.18:45:26.89#ibcon#read 3, iclass 33, count 0 2006.229.18:45:26.89#ibcon#about to read 4, iclass 33, count 0 2006.229.18:45:26.89#ibcon#read 4, iclass 33, count 0 2006.229.18:45:26.89#ibcon#about to read 5, iclass 33, count 0 2006.229.18:45:26.89#ibcon#read 5, iclass 33, count 0 2006.229.18:45:26.89#ibcon#about to read 6, iclass 33, count 0 2006.229.18:45:26.89#ibcon#read 6, iclass 33, count 0 2006.229.18:45:26.89#ibcon#end of sib2, iclass 33, count 0 2006.229.18:45:26.89#ibcon#*after write, iclass 33, count 0 2006.229.18:45:26.89#ibcon#*before return 0, iclass 33, count 0 2006.229.18:45:26.89#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:26.89#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:26.89#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:45:26.89#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:45:26.89$vck44/va=3,6 2006.229.18:45:26.89#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.18:45:26.89#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.18:45:26.89#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:26.89#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:26.95#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:26.95#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:26.95#ibcon#enter wrdev, iclass 35, count 2 2006.229.18:45:26.95#ibcon#first serial, iclass 35, count 2 2006.229.18:45:26.95#ibcon#enter sib2, iclass 35, count 2 2006.229.18:45:26.95#ibcon#flushed, iclass 35, count 2 2006.229.18:45:26.95#ibcon#about to write, iclass 35, count 2 2006.229.18:45:26.95#ibcon#wrote, iclass 35, count 2 2006.229.18:45:26.95#ibcon#about to read 3, iclass 35, count 2 2006.229.18:45:26.97#ibcon#read 3, iclass 35, count 2 2006.229.18:45:26.97#ibcon#about to read 4, iclass 35, count 2 2006.229.18:45:26.97#ibcon#read 4, iclass 35, count 2 2006.229.18:45:26.97#ibcon#about to read 5, iclass 35, count 2 2006.229.18:45:26.97#ibcon#read 5, iclass 35, count 2 2006.229.18:45:26.97#ibcon#about to read 6, iclass 35, count 2 2006.229.18:45:26.97#ibcon#read 6, iclass 35, count 2 2006.229.18:45:26.97#ibcon#end of sib2, iclass 35, count 2 2006.229.18:45:26.97#ibcon#*mode == 0, iclass 35, count 2 2006.229.18:45:26.97#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.18:45:26.97#ibcon#[25=AT03-06\r\n] 2006.229.18:45:26.97#ibcon#*before write, iclass 35, count 2 2006.229.18:45:26.97#ibcon#enter sib2, iclass 35, count 2 2006.229.18:45:26.97#ibcon#flushed, iclass 35, count 2 2006.229.18:45:26.97#ibcon#about to write, iclass 35, count 2 2006.229.18:45:26.97#ibcon#wrote, iclass 35, count 2 2006.229.18:45:26.97#ibcon#about to read 3, iclass 35, count 2 2006.229.18:45:27.00#ibcon#read 3, iclass 35, count 2 2006.229.18:45:27.00#ibcon#about to read 4, iclass 35, count 2 2006.229.18:45:27.00#ibcon#read 4, iclass 35, count 2 2006.229.18:45:27.00#ibcon#about to read 5, iclass 35, count 2 2006.229.18:45:27.00#ibcon#read 5, iclass 35, count 2 2006.229.18:45:27.00#ibcon#about to read 6, iclass 35, count 2 2006.229.18:45:27.00#ibcon#read 6, iclass 35, count 2 2006.229.18:45:27.00#ibcon#end of sib2, iclass 35, count 2 2006.229.18:45:27.00#ibcon#*after write, iclass 35, count 2 2006.229.18:45:27.00#ibcon#*before return 0, iclass 35, count 2 2006.229.18:45:27.00#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:27.00#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:27.00#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.18:45:27.00#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:27.00#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:27.12#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:27.12#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:27.12#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:45:27.12#ibcon#first serial, iclass 35, count 0 2006.229.18:45:27.12#ibcon#enter sib2, iclass 35, count 0 2006.229.18:45:27.12#ibcon#flushed, iclass 35, count 0 2006.229.18:45:27.12#ibcon#about to write, iclass 35, count 0 2006.229.18:45:27.12#ibcon#wrote, iclass 35, count 0 2006.229.18:45:27.12#ibcon#about to read 3, iclass 35, count 0 2006.229.18:45:27.14#ibcon#read 3, iclass 35, count 0 2006.229.18:45:27.14#ibcon#about to read 4, iclass 35, count 0 2006.229.18:45:27.14#ibcon#read 4, iclass 35, count 0 2006.229.18:45:27.14#ibcon#about to read 5, iclass 35, count 0 2006.229.18:45:27.14#ibcon#read 5, iclass 35, count 0 2006.229.18:45:27.14#ibcon#about to read 6, iclass 35, count 0 2006.229.18:45:27.14#ibcon#read 6, iclass 35, count 0 2006.229.18:45:27.14#ibcon#end of sib2, iclass 35, count 0 2006.229.18:45:27.14#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:45:27.14#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:45:27.14#ibcon#[25=USB\r\n] 2006.229.18:45:27.14#ibcon#*before write, iclass 35, count 0 2006.229.18:45:27.14#ibcon#enter sib2, iclass 35, count 0 2006.229.18:45:27.14#ibcon#flushed, iclass 35, count 0 2006.229.18:45:27.14#ibcon#about to write, iclass 35, count 0 2006.229.18:45:27.14#ibcon#wrote, iclass 35, count 0 2006.229.18:45:27.14#ibcon#about to read 3, iclass 35, count 0 2006.229.18:45:27.17#ibcon#read 3, iclass 35, count 0 2006.229.18:45:27.17#ibcon#about to read 4, iclass 35, count 0 2006.229.18:45:27.17#ibcon#read 4, iclass 35, count 0 2006.229.18:45:27.17#ibcon#about to read 5, iclass 35, count 0 2006.229.18:45:27.17#ibcon#read 5, iclass 35, count 0 2006.229.18:45:27.17#ibcon#about to read 6, iclass 35, count 0 2006.229.18:45:27.17#ibcon#read 6, iclass 35, count 0 2006.229.18:45:27.17#ibcon#end of sib2, iclass 35, count 0 2006.229.18:45:27.17#ibcon#*after write, iclass 35, count 0 2006.229.18:45:27.17#ibcon#*before return 0, iclass 35, count 0 2006.229.18:45:27.17#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:27.17#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:27.17#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:45:27.17#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:45:27.17$vck44/valo=4,624.99 2006.229.18:45:27.17#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.18:45:27.17#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.18:45:27.17#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:27.17#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:27.17#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:27.17#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:27.17#ibcon#enter wrdev, iclass 37, count 0 2006.229.18:45:27.17#ibcon#first serial, iclass 37, count 0 2006.229.18:45:27.17#ibcon#enter sib2, iclass 37, count 0 2006.229.18:45:27.17#ibcon#flushed, iclass 37, count 0 2006.229.18:45:27.17#ibcon#about to write, iclass 37, count 0 2006.229.18:45:27.17#ibcon#wrote, iclass 37, count 0 2006.229.18:45:27.17#ibcon#about to read 3, iclass 37, count 0 2006.229.18:45:27.19#ibcon#read 3, iclass 37, count 0 2006.229.18:45:27.19#ibcon#about to read 4, iclass 37, count 0 2006.229.18:45:27.19#ibcon#read 4, iclass 37, count 0 2006.229.18:45:27.19#ibcon#about to read 5, iclass 37, count 0 2006.229.18:45:27.19#ibcon#read 5, iclass 37, count 0 2006.229.18:45:27.19#ibcon#about to read 6, iclass 37, count 0 2006.229.18:45:27.19#ibcon#read 6, iclass 37, count 0 2006.229.18:45:27.19#ibcon#end of sib2, iclass 37, count 0 2006.229.18:45:27.19#ibcon#*mode == 0, iclass 37, count 0 2006.229.18:45:27.19#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.18:45:27.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:45:27.19#ibcon#*before write, iclass 37, count 0 2006.229.18:45:27.19#ibcon#enter sib2, iclass 37, count 0 2006.229.18:45:27.19#ibcon#flushed, iclass 37, count 0 2006.229.18:45:27.19#ibcon#about to write, iclass 37, count 0 2006.229.18:45:27.19#ibcon#wrote, iclass 37, count 0 2006.229.18:45:27.19#ibcon#about to read 3, iclass 37, count 0 2006.229.18:45:27.23#ibcon#read 3, iclass 37, count 0 2006.229.18:45:27.23#ibcon#about to read 4, iclass 37, count 0 2006.229.18:45:27.23#ibcon#read 4, iclass 37, count 0 2006.229.18:45:27.23#ibcon#about to read 5, iclass 37, count 0 2006.229.18:45:27.23#ibcon#read 5, iclass 37, count 0 2006.229.18:45:27.23#ibcon#about to read 6, iclass 37, count 0 2006.229.18:45:27.23#ibcon#read 6, iclass 37, count 0 2006.229.18:45:27.23#ibcon#end of sib2, iclass 37, count 0 2006.229.18:45:27.23#ibcon#*after write, iclass 37, count 0 2006.229.18:45:27.23#ibcon#*before return 0, iclass 37, count 0 2006.229.18:45:27.23#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:27.23#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:27.23#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.18:45:27.23#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.18:45:27.23$vck44/va=4,7 2006.229.18:45:27.23#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.18:45:27.23#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.18:45:27.23#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:27.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:27.29#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:27.29#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:27.29#ibcon#enter wrdev, iclass 39, count 2 2006.229.18:45:27.29#ibcon#first serial, iclass 39, count 2 2006.229.18:45:27.29#ibcon#enter sib2, iclass 39, count 2 2006.229.18:45:27.29#ibcon#flushed, iclass 39, count 2 2006.229.18:45:27.29#ibcon#about to write, iclass 39, count 2 2006.229.18:45:27.29#ibcon#wrote, iclass 39, count 2 2006.229.18:45:27.29#ibcon#about to read 3, iclass 39, count 2 2006.229.18:45:27.31#ibcon#read 3, iclass 39, count 2 2006.229.18:45:27.31#ibcon#about to read 4, iclass 39, count 2 2006.229.18:45:27.31#ibcon#read 4, iclass 39, count 2 2006.229.18:45:27.31#ibcon#about to read 5, iclass 39, count 2 2006.229.18:45:27.31#ibcon#read 5, iclass 39, count 2 2006.229.18:45:27.31#ibcon#about to read 6, iclass 39, count 2 2006.229.18:45:27.31#ibcon#read 6, iclass 39, count 2 2006.229.18:45:27.31#ibcon#end of sib2, iclass 39, count 2 2006.229.18:45:27.31#ibcon#*mode == 0, iclass 39, count 2 2006.229.18:45:27.31#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.18:45:27.31#ibcon#[25=AT04-07\r\n] 2006.229.18:45:27.31#ibcon#*before write, iclass 39, count 2 2006.229.18:45:27.31#ibcon#enter sib2, iclass 39, count 2 2006.229.18:45:27.31#ibcon#flushed, iclass 39, count 2 2006.229.18:45:27.31#ibcon#about to write, iclass 39, count 2 2006.229.18:45:27.31#ibcon#wrote, iclass 39, count 2 2006.229.18:45:27.31#ibcon#about to read 3, iclass 39, count 2 2006.229.18:45:27.34#ibcon#read 3, iclass 39, count 2 2006.229.18:45:27.34#ibcon#about to read 4, iclass 39, count 2 2006.229.18:45:27.34#ibcon#read 4, iclass 39, count 2 2006.229.18:45:27.34#ibcon#about to read 5, iclass 39, count 2 2006.229.18:45:27.34#ibcon#read 5, iclass 39, count 2 2006.229.18:45:27.34#ibcon#about to read 6, iclass 39, count 2 2006.229.18:45:27.34#ibcon#read 6, iclass 39, count 2 2006.229.18:45:27.34#ibcon#end of sib2, iclass 39, count 2 2006.229.18:45:27.34#ibcon#*after write, iclass 39, count 2 2006.229.18:45:27.34#ibcon#*before return 0, iclass 39, count 2 2006.229.18:45:27.34#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:27.34#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:27.34#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.18:45:27.34#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:27.34#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:27.46#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:27.46#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:27.46#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:45:27.46#ibcon#first serial, iclass 39, count 0 2006.229.18:45:27.46#ibcon#enter sib2, iclass 39, count 0 2006.229.18:45:27.46#ibcon#flushed, iclass 39, count 0 2006.229.18:45:27.46#ibcon#about to write, iclass 39, count 0 2006.229.18:45:27.46#ibcon#wrote, iclass 39, count 0 2006.229.18:45:27.46#ibcon#about to read 3, iclass 39, count 0 2006.229.18:45:27.48#ibcon#read 3, iclass 39, count 0 2006.229.18:45:27.48#ibcon#about to read 4, iclass 39, count 0 2006.229.18:45:27.48#ibcon#read 4, iclass 39, count 0 2006.229.18:45:27.48#ibcon#about to read 5, iclass 39, count 0 2006.229.18:45:27.48#ibcon#read 5, iclass 39, count 0 2006.229.18:45:27.48#ibcon#about to read 6, iclass 39, count 0 2006.229.18:45:27.48#ibcon#read 6, iclass 39, count 0 2006.229.18:45:27.48#ibcon#end of sib2, iclass 39, count 0 2006.229.18:45:27.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:45:27.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:45:27.48#ibcon#[25=USB\r\n] 2006.229.18:45:27.48#ibcon#*before write, iclass 39, count 0 2006.229.18:45:27.48#ibcon#enter sib2, iclass 39, count 0 2006.229.18:45:27.48#ibcon#flushed, iclass 39, count 0 2006.229.18:45:27.48#ibcon#about to write, iclass 39, count 0 2006.229.18:45:27.48#ibcon#wrote, iclass 39, count 0 2006.229.18:45:27.48#ibcon#about to read 3, iclass 39, count 0 2006.229.18:45:27.51#ibcon#read 3, iclass 39, count 0 2006.229.18:45:27.51#ibcon#about to read 4, iclass 39, count 0 2006.229.18:45:27.51#ibcon#read 4, iclass 39, count 0 2006.229.18:45:27.51#ibcon#about to read 5, iclass 39, count 0 2006.229.18:45:27.51#ibcon#read 5, iclass 39, count 0 2006.229.18:45:27.51#ibcon#about to read 6, iclass 39, count 0 2006.229.18:45:27.51#ibcon#read 6, iclass 39, count 0 2006.229.18:45:27.51#ibcon#end of sib2, iclass 39, count 0 2006.229.18:45:27.51#ibcon#*after write, iclass 39, count 0 2006.229.18:45:27.51#ibcon#*before return 0, iclass 39, count 0 2006.229.18:45:27.51#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:27.51#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:27.51#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:45:27.51#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:45:27.51$vck44/valo=5,734.99 2006.229.18:45:27.51#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.18:45:27.51#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.18:45:27.51#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:27.51#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:27.51#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:27.51#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:27.51#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:45:27.51#ibcon#first serial, iclass 3, count 0 2006.229.18:45:27.51#ibcon#enter sib2, iclass 3, count 0 2006.229.18:45:27.51#ibcon#flushed, iclass 3, count 0 2006.229.18:45:27.51#ibcon#about to write, iclass 3, count 0 2006.229.18:45:27.51#ibcon#wrote, iclass 3, count 0 2006.229.18:45:27.51#ibcon#about to read 3, iclass 3, count 0 2006.229.18:45:27.53#ibcon#read 3, iclass 3, count 0 2006.229.18:45:27.53#ibcon#about to read 4, iclass 3, count 0 2006.229.18:45:27.53#ibcon#read 4, iclass 3, count 0 2006.229.18:45:27.53#ibcon#about to read 5, iclass 3, count 0 2006.229.18:45:27.53#ibcon#read 5, iclass 3, count 0 2006.229.18:45:27.53#ibcon#about to read 6, iclass 3, count 0 2006.229.18:45:27.53#ibcon#read 6, iclass 3, count 0 2006.229.18:45:27.53#ibcon#end of sib2, iclass 3, count 0 2006.229.18:45:27.53#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:45:27.53#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:45:27.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:45:27.53#ibcon#*before write, iclass 3, count 0 2006.229.18:45:27.53#ibcon#enter sib2, iclass 3, count 0 2006.229.18:45:27.53#ibcon#flushed, iclass 3, count 0 2006.229.18:45:27.53#ibcon#about to write, iclass 3, count 0 2006.229.18:45:27.53#ibcon#wrote, iclass 3, count 0 2006.229.18:45:27.53#ibcon#about to read 3, iclass 3, count 0 2006.229.18:45:27.57#ibcon#read 3, iclass 3, count 0 2006.229.18:45:27.57#ibcon#about to read 4, iclass 3, count 0 2006.229.18:45:27.57#ibcon#read 4, iclass 3, count 0 2006.229.18:45:27.57#ibcon#about to read 5, iclass 3, count 0 2006.229.18:45:27.57#ibcon#read 5, iclass 3, count 0 2006.229.18:45:27.57#ibcon#about to read 6, iclass 3, count 0 2006.229.18:45:27.57#ibcon#read 6, iclass 3, count 0 2006.229.18:45:27.57#ibcon#end of sib2, iclass 3, count 0 2006.229.18:45:27.57#ibcon#*after write, iclass 3, count 0 2006.229.18:45:27.57#ibcon#*before return 0, iclass 3, count 0 2006.229.18:45:27.57#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:27.57#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:27.57#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:45:27.57#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:45:27.57$vck44/va=5,4 2006.229.18:45:27.57#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.18:45:27.57#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.18:45:27.57#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:27.57#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:27.63#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:27.63#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:27.63#ibcon#enter wrdev, iclass 5, count 2 2006.229.18:45:27.63#ibcon#first serial, iclass 5, count 2 2006.229.18:45:27.63#ibcon#enter sib2, iclass 5, count 2 2006.229.18:45:27.63#ibcon#flushed, iclass 5, count 2 2006.229.18:45:27.63#ibcon#about to write, iclass 5, count 2 2006.229.18:45:27.63#ibcon#wrote, iclass 5, count 2 2006.229.18:45:27.63#ibcon#about to read 3, iclass 5, count 2 2006.229.18:45:27.65#ibcon#read 3, iclass 5, count 2 2006.229.18:45:27.65#ibcon#about to read 4, iclass 5, count 2 2006.229.18:45:27.65#ibcon#read 4, iclass 5, count 2 2006.229.18:45:27.65#ibcon#about to read 5, iclass 5, count 2 2006.229.18:45:27.65#ibcon#read 5, iclass 5, count 2 2006.229.18:45:27.65#ibcon#about to read 6, iclass 5, count 2 2006.229.18:45:27.65#ibcon#read 6, iclass 5, count 2 2006.229.18:45:27.65#ibcon#end of sib2, iclass 5, count 2 2006.229.18:45:27.65#ibcon#*mode == 0, iclass 5, count 2 2006.229.18:45:27.65#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.18:45:27.65#ibcon#[25=AT05-04\r\n] 2006.229.18:45:27.65#ibcon#*before write, iclass 5, count 2 2006.229.18:45:27.65#ibcon#enter sib2, iclass 5, count 2 2006.229.18:45:27.65#ibcon#flushed, iclass 5, count 2 2006.229.18:45:27.65#ibcon#about to write, iclass 5, count 2 2006.229.18:45:27.65#ibcon#wrote, iclass 5, count 2 2006.229.18:45:27.65#ibcon#about to read 3, iclass 5, count 2 2006.229.18:45:27.68#ibcon#read 3, iclass 5, count 2 2006.229.18:45:27.68#ibcon#about to read 4, iclass 5, count 2 2006.229.18:45:27.68#ibcon#read 4, iclass 5, count 2 2006.229.18:45:27.68#ibcon#about to read 5, iclass 5, count 2 2006.229.18:45:27.68#ibcon#read 5, iclass 5, count 2 2006.229.18:45:27.68#ibcon#about to read 6, iclass 5, count 2 2006.229.18:45:27.68#ibcon#read 6, iclass 5, count 2 2006.229.18:45:27.68#ibcon#end of sib2, iclass 5, count 2 2006.229.18:45:27.68#ibcon#*after write, iclass 5, count 2 2006.229.18:45:27.68#ibcon#*before return 0, iclass 5, count 2 2006.229.18:45:27.68#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:27.68#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:27.68#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.18:45:27.68#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:27.68#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:27.80#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:27.80#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:27.80#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:45:27.80#ibcon#first serial, iclass 5, count 0 2006.229.18:45:27.80#ibcon#enter sib2, iclass 5, count 0 2006.229.18:45:27.80#ibcon#flushed, iclass 5, count 0 2006.229.18:45:27.80#ibcon#about to write, iclass 5, count 0 2006.229.18:45:27.80#ibcon#wrote, iclass 5, count 0 2006.229.18:45:27.80#ibcon#about to read 3, iclass 5, count 0 2006.229.18:45:27.82#ibcon#read 3, iclass 5, count 0 2006.229.18:45:27.82#ibcon#about to read 4, iclass 5, count 0 2006.229.18:45:27.82#ibcon#read 4, iclass 5, count 0 2006.229.18:45:27.82#ibcon#about to read 5, iclass 5, count 0 2006.229.18:45:27.82#ibcon#read 5, iclass 5, count 0 2006.229.18:45:27.82#ibcon#about to read 6, iclass 5, count 0 2006.229.18:45:27.82#ibcon#read 6, iclass 5, count 0 2006.229.18:45:27.82#ibcon#end of sib2, iclass 5, count 0 2006.229.18:45:27.82#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:45:27.82#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:45:27.82#ibcon#[25=USB\r\n] 2006.229.18:45:27.82#ibcon#*before write, iclass 5, count 0 2006.229.18:45:27.82#ibcon#enter sib2, iclass 5, count 0 2006.229.18:45:27.82#ibcon#flushed, iclass 5, count 0 2006.229.18:45:27.82#ibcon#about to write, iclass 5, count 0 2006.229.18:45:27.82#ibcon#wrote, iclass 5, count 0 2006.229.18:45:27.82#ibcon#about to read 3, iclass 5, count 0 2006.229.18:45:27.85#abcon#<5=/07 1.0 2.2 26.251001001.3\r\n> 2006.229.18:45:27.85#ibcon#read 3, iclass 5, count 0 2006.229.18:45:27.85#ibcon#about to read 4, iclass 5, count 0 2006.229.18:45:27.85#ibcon#read 4, iclass 5, count 0 2006.229.18:45:27.85#ibcon#about to read 5, iclass 5, count 0 2006.229.18:45:27.85#ibcon#read 5, iclass 5, count 0 2006.229.18:45:27.85#ibcon#about to read 6, iclass 5, count 0 2006.229.18:45:27.85#ibcon#read 6, iclass 5, count 0 2006.229.18:45:27.85#ibcon#end of sib2, iclass 5, count 0 2006.229.18:45:27.85#ibcon#*after write, iclass 5, count 0 2006.229.18:45:27.85#ibcon#*before return 0, iclass 5, count 0 2006.229.18:45:27.85#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:27.85#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:27.85#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:45:27.85#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:45:27.85$vck44/valo=6,814.99 2006.229.18:45:27.85#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:45:27.85#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:45:27.85#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:27.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:45:27.85#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:45:27.85#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:45:27.85#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:45:27.85#ibcon#first serial, iclass 12, count 0 2006.229.18:45:27.85#ibcon#enter sib2, iclass 12, count 0 2006.229.18:45:27.85#ibcon#flushed, iclass 12, count 0 2006.229.18:45:27.85#ibcon#about to write, iclass 12, count 0 2006.229.18:45:27.85#ibcon#wrote, iclass 12, count 0 2006.229.18:45:27.85#ibcon#about to read 3, iclass 12, count 0 2006.229.18:45:27.87#abcon#{5=INTERFACE CLEAR} 2006.229.18:45:27.87#ibcon#read 3, iclass 12, count 0 2006.229.18:45:27.87#ibcon#about to read 4, iclass 12, count 0 2006.229.18:45:27.87#ibcon#read 4, iclass 12, count 0 2006.229.18:45:27.87#ibcon#about to read 5, iclass 12, count 0 2006.229.18:45:27.87#ibcon#read 5, iclass 12, count 0 2006.229.18:45:27.87#ibcon#about to read 6, iclass 12, count 0 2006.229.18:45:27.87#ibcon#read 6, iclass 12, count 0 2006.229.18:45:27.87#ibcon#end of sib2, iclass 12, count 0 2006.229.18:45:27.87#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:45:27.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:45:27.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:45:27.87#ibcon#*before write, iclass 12, count 0 2006.229.18:45:27.87#ibcon#enter sib2, iclass 12, count 0 2006.229.18:45:27.87#ibcon#flushed, iclass 12, count 0 2006.229.18:45:27.87#ibcon#about to write, iclass 12, count 0 2006.229.18:45:27.87#ibcon#wrote, iclass 12, count 0 2006.229.18:45:27.87#ibcon#about to read 3, iclass 12, count 0 2006.229.18:45:27.91#ibcon#read 3, iclass 12, count 0 2006.229.18:45:27.91#ibcon#about to read 4, iclass 12, count 0 2006.229.18:45:27.91#ibcon#read 4, iclass 12, count 0 2006.229.18:45:27.91#ibcon#about to read 5, iclass 12, count 0 2006.229.18:45:27.91#ibcon#read 5, iclass 12, count 0 2006.229.18:45:27.91#ibcon#about to read 6, iclass 12, count 0 2006.229.18:45:27.91#ibcon#read 6, iclass 12, count 0 2006.229.18:45:27.91#ibcon#end of sib2, iclass 12, count 0 2006.229.18:45:27.91#ibcon#*after write, iclass 12, count 0 2006.229.18:45:27.91#ibcon#*before return 0, iclass 12, count 0 2006.229.18:45:27.91#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:45:27.91#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:45:27.91#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:45:27.91#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:45:27.91$vck44/va=6,4 2006.229.18:45:27.91#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.18:45:27.91#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.18:45:27.91#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:27.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:27.93#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:45:27.97#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:27.97#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:27.97#ibcon#enter wrdev, iclass 15, count 2 2006.229.18:45:27.97#ibcon#first serial, iclass 15, count 2 2006.229.18:45:27.97#ibcon#enter sib2, iclass 15, count 2 2006.229.18:45:27.97#ibcon#flushed, iclass 15, count 2 2006.229.18:45:27.97#ibcon#about to write, iclass 15, count 2 2006.229.18:45:27.97#ibcon#wrote, iclass 15, count 2 2006.229.18:45:27.97#ibcon#about to read 3, iclass 15, count 2 2006.229.18:45:27.99#ibcon#read 3, iclass 15, count 2 2006.229.18:45:27.99#ibcon#about to read 4, iclass 15, count 2 2006.229.18:45:27.99#ibcon#read 4, iclass 15, count 2 2006.229.18:45:27.99#ibcon#about to read 5, iclass 15, count 2 2006.229.18:45:27.99#ibcon#read 5, iclass 15, count 2 2006.229.18:45:27.99#ibcon#about to read 6, iclass 15, count 2 2006.229.18:45:27.99#ibcon#read 6, iclass 15, count 2 2006.229.18:45:27.99#ibcon#end of sib2, iclass 15, count 2 2006.229.18:45:27.99#ibcon#*mode == 0, iclass 15, count 2 2006.229.18:45:27.99#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.18:45:27.99#ibcon#[25=AT06-04\r\n] 2006.229.18:45:27.99#ibcon#*before write, iclass 15, count 2 2006.229.18:45:27.99#ibcon#enter sib2, iclass 15, count 2 2006.229.18:45:27.99#ibcon#flushed, iclass 15, count 2 2006.229.18:45:27.99#ibcon#about to write, iclass 15, count 2 2006.229.18:45:27.99#ibcon#wrote, iclass 15, count 2 2006.229.18:45:27.99#ibcon#about to read 3, iclass 15, count 2 2006.229.18:45:28.02#ibcon#read 3, iclass 15, count 2 2006.229.18:45:28.02#ibcon#about to read 4, iclass 15, count 2 2006.229.18:45:28.02#ibcon#read 4, iclass 15, count 2 2006.229.18:45:28.02#ibcon#about to read 5, iclass 15, count 2 2006.229.18:45:28.02#ibcon#read 5, iclass 15, count 2 2006.229.18:45:28.02#ibcon#about to read 6, iclass 15, count 2 2006.229.18:45:28.02#ibcon#read 6, iclass 15, count 2 2006.229.18:45:28.02#ibcon#end of sib2, iclass 15, count 2 2006.229.18:45:28.02#ibcon#*after write, iclass 15, count 2 2006.229.18:45:28.02#ibcon#*before return 0, iclass 15, count 2 2006.229.18:45:28.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:28.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:28.02#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.18:45:28.02#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:28.02#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:28.14#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:28.14#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:28.14#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:45:28.14#ibcon#first serial, iclass 15, count 0 2006.229.18:45:28.14#ibcon#enter sib2, iclass 15, count 0 2006.229.18:45:28.14#ibcon#flushed, iclass 15, count 0 2006.229.18:45:28.14#ibcon#about to write, iclass 15, count 0 2006.229.18:45:28.14#ibcon#wrote, iclass 15, count 0 2006.229.18:45:28.14#ibcon#about to read 3, iclass 15, count 0 2006.229.18:45:28.16#ibcon#read 3, iclass 15, count 0 2006.229.18:45:28.16#ibcon#about to read 4, iclass 15, count 0 2006.229.18:45:28.16#ibcon#read 4, iclass 15, count 0 2006.229.18:45:28.16#ibcon#about to read 5, iclass 15, count 0 2006.229.18:45:28.16#ibcon#read 5, iclass 15, count 0 2006.229.18:45:28.16#ibcon#about to read 6, iclass 15, count 0 2006.229.18:45:28.16#ibcon#read 6, iclass 15, count 0 2006.229.18:45:28.16#ibcon#end of sib2, iclass 15, count 0 2006.229.18:45:28.16#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:45:28.16#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:45:28.16#ibcon#[25=USB\r\n] 2006.229.18:45:28.16#ibcon#*before write, iclass 15, count 0 2006.229.18:45:28.16#ibcon#enter sib2, iclass 15, count 0 2006.229.18:45:28.16#ibcon#flushed, iclass 15, count 0 2006.229.18:45:28.16#ibcon#about to write, iclass 15, count 0 2006.229.18:45:28.16#ibcon#wrote, iclass 15, count 0 2006.229.18:45:28.16#ibcon#about to read 3, iclass 15, count 0 2006.229.18:45:28.19#ibcon#read 3, iclass 15, count 0 2006.229.18:45:28.19#ibcon#about to read 4, iclass 15, count 0 2006.229.18:45:28.19#ibcon#read 4, iclass 15, count 0 2006.229.18:45:28.19#ibcon#about to read 5, iclass 15, count 0 2006.229.18:45:28.19#ibcon#read 5, iclass 15, count 0 2006.229.18:45:28.19#ibcon#about to read 6, iclass 15, count 0 2006.229.18:45:28.19#ibcon#read 6, iclass 15, count 0 2006.229.18:45:28.19#ibcon#end of sib2, iclass 15, count 0 2006.229.18:45:28.19#ibcon#*after write, iclass 15, count 0 2006.229.18:45:28.19#ibcon#*before return 0, iclass 15, count 0 2006.229.18:45:28.19#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:28.19#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:28.19#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:45:28.19#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:45:28.19$vck44/valo=7,864.99 2006.229.18:45:28.19#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.18:45:28.19#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.18:45:28.19#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:28.19#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:28.19#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:28.19#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:28.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:45:28.19#ibcon#first serial, iclass 17, count 0 2006.229.18:45:28.19#ibcon#enter sib2, iclass 17, count 0 2006.229.18:45:28.19#ibcon#flushed, iclass 17, count 0 2006.229.18:45:28.19#ibcon#about to write, iclass 17, count 0 2006.229.18:45:28.19#ibcon#wrote, iclass 17, count 0 2006.229.18:45:28.19#ibcon#about to read 3, iclass 17, count 0 2006.229.18:45:28.21#ibcon#read 3, iclass 17, count 0 2006.229.18:45:28.21#ibcon#about to read 4, iclass 17, count 0 2006.229.18:45:28.21#ibcon#read 4, iclass 17, count 0 2006.229.18:45:28.21#ibcon#about to read 5, iclass 17, count 0 2006.229.18:45:28.21#ibcon#read 5, iclass 17, count 0 2006.229.18:45:28.21#ibcon#about to read 6, iclass 17, count 0 2006.229.18:45:28.21#ibcon#read 6, iclass 17, count 0 2006.229.18:45:28.21#ibcon#end of sib2, iclass 17, count 0 2006.229.18:45:28.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:45:28.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:45:28.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:45:28.21#ibcon#*before write, iclass 17, count 0 2006.229.18:45:28.21#ibcon#enter sib2, iclass 17, count 0 2006.229.18:45:28.21#ibcon#flushed, iclass 17, count 0 2006.229.18:45:28.21#ibcon#about to write, iclass 17, count 0 2006.229.18:45:28.21#ibcon#wrote, iclass 17, count 0 2006.229.18:45:28.21#ibcon#about to read 3, iclass 17, count 0 2006.229.18:45:28.25#ibcon#read 3, iclass 17, count 0 2006.229.18:45:28.25#ibcon#about to read 4, iclass 17, count 0 2006.229.18:45:28.25#ibcon#read 4, iclass 17, count 0 2006.229.18:45:28.25#ibcon#about to read 5, iclass 17, count 0 2006.229.18:45:28.25#ibcon#read 5, iclass 17, count 0 2006.229.18:45:28.25#ibcon#about to read 6, iclass 17, count 0 2006.229.18:45:28.25#ibcon#read 6, iclass 17, count 0 2006.229.18:45:28.25#ibcon#end of sib2, iclass 17, count 0 2006.229.18:45:28.25#ibcon#*after write, iclass 17, count 0 2006.229.18:45:28.25#ibcon#*before return 0, iclass 17, count 0 2006.229.18:45:28.25#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:28.25#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:28.25#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:45:28.25#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:45:28.25$vck44/va=7,5 2006.229.18:45:28.25#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.18:45:28.25#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.18:45:28.25#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:28.25#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:28.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:28.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:28.31#ibcon#enter wrdev, iclass 19, count 2 2006.229.18:45:28.31#ibcon#first serial, iclass 19, count 2 2006.229.18:45:28.31#ibcon#enter sib2, iclass 19, count 2 2006.229.18:45:28.31#ibcon#flushed, iclass 19, count 2 2006.229.18:45:28.31#ibcon#about to write, iclass 19, count 2 2006.229.18:45:28.31#ibcon#wrote, iclass 19, count 2 2006.229.18:45:28.31#ibcon#about to read 3, iclass 19, count 2 2006.229.18:45:28.33#ibcon#read 3, iclass 19, count 2 2006.229.18:45:28.33#ibcon#about to read 4, iclass 19, count 2 2006.229.18:45:28.33#ibcon#read 4, iclass 19, count 2 2006.229.18:45:28.33#ibcon#about to read 5, iclass 19, count 2 2006.229.18:45:28.33#ibcon#read 5, iclass 19, count 2 2006.229.18:45:28.33#ibcon#about to read 6, iclass 19, count 2 2006.229.18:45:28.33#ibcon#read 6, iclass 19, count 2 2006.229.18:45:28.33#ibcon#end of sib2, iclass 19, count 2 2006.229.18:45:28.33#ibcon#*mode == 0, iclass 19, count 2 2006.229.18:45:28.33#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.18:45:28.33#ibcon#[25=AT07-05\r\n] 2006.229.18:45:28.33#ibcon#*before write, iclass 19, count 2 2006.229.18:45:28.33#ibcon#enter sib2, iclass 19, count 2 2006.229.18:45:28.33#ibcon#flushed, iclass 19, count 2 2006.229.18:45:28.33#ibcon#about to write, iclass 19, count 2 2006.229.18:45:28.33#ibcon#wrote, iclass 19, count 2 2006.229.18:45:28.33#ibcon#about to read 3, iclass 19, count 2 2006.229.18:45:28.36#ibcon#read 3, iclass 19, count 2 2006.229.18:45:28.36#ibcon#about to read 4, iclass 19, count 2 2006.229.18:45:28.36#ibcon#read 4, iclass 19, count 2 2006.229.18:45:28.36#ibcon#about to read 5, iclass 19, count 2 2006.229.18:45:28.36#ibcon#read 5, iclass 19, count 2 2006.229.18:45:28.36#ibcon#about to read 6, iclass 19, count 2 2006.229.18:45:28.36#ibcon#read 6, iclass 19, count 2 2006.229.18:45:28.36#ibcon#end of sib2, iclass 19, count 2 2006.229.18:45:28.36#ibcon#*after write, iclass 19, count 2 2006.229.18:45:28.36#ibcon#*before return 0, iclass 19, count 2 2006.229.18:45:28.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:28.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:28.36#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.18:45:28.36#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:28.36#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:28.48#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:28.48#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:28.48#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:45:28.48#ibcon#first serial, iclass 19, count 0 2006.229.18:45:28.48#ibcon#enter sib2, iclass 19, count 0 2006.229.18:45:28.48#ibcon#flushed, iclass 19, count 0 2006.229.18:45:28.48#ibcon#about to write, iclass 19, count 0 2006.229.18:45:28.48#ibcon#wrote, iclass 19, count 0 2006.229.18:45:28.48#ibcon#about to read 3, iclass 19, count 0 2006.229.18:45:28.50#ibcon#read 3, iclass 19, count 0 2006.229.18:45:28.50#ibcon#about to read 4, iclass 19, count 0 2006.229.18:45:28.50#ibcon#read 4, iclass 19, count 0 2006.229.18:45:28.50#ibcon#about to read 5, iclass 19, count 0 2006.229.18:45:28.50#ibcon#read 5, iclass 19, count 0 2006.229.18:45:28.50#ibcon#about to read 6, iclass 19, count 0 2006.229.18:45:28.50#ibcon#read 6, iclass 19, count 0 2006.229.18:45:28.50#ibcon#end of sib2, iclass 19, count 0 2006.229.18:45:28.50#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:45:28.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:45:28.50#ibcon#[25=USB\r\n] 2006.229.18:45:28.50#ibcon#*before write, iclass 19, count 0 2006.229.18:45:28.50#ibcon#enter sib2, iclass 19, count 0 2006.229.18:45:28.50#ibcon#flushed, iclass 19, count 0 2006.229.18:45:28.50#ibcon#about to write, iclass 19, count 0 2006.229.18:45:28.50#ibcon#wrote, iclass 19, count 0 2006.229.18:45:28.50#ibcon#about to read 3, iclass 19, count 0 2006.229.18:45:28.53#ibcon#read 3, iclass 19, count 0 2006.229.18:45:28.53#ibcon#about to read 4, iclass 19, count 0 2006.229.18:45:28.53#ibcon#read 4, iclass 19, count 0 2006.229.18:45:28.53#ibcon#about to read 5, iclass 19, count 0 2006.229.18:45:28.53#ibcon#read 5, iclass 19, count 0 2006.229.18:45:28.53#ibcon#about to read 6, iclass 19, count 0 2006.229.18:45:28.53#ibcon#read 6, iclass 19, count 0 2006.229.18:45:28.53#ibcon#end of sib2, iclass 19, count 0 2006.229.18:45:28.53#ibcon#*after write, iclass 19, count 0 2006.229.18:45:28.53#ibcon#*before return 0, iclass 19, count 0 2006.229.18:45:28.53#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:28.53#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:28.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:45:28.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:45:28.53$vck44/valo=8,884.99 2006.229.18:45:28.53#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.18:45:28.53#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.18:45:28.53#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:28.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:28.53#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:28.53#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:28.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:45:28.53#ibcon#first serial, iclass 21, count 0 2006.229.18:45:28.53#ibcon#enter sib2, iclass 21, count 0 2006.229.18:45:28.53#ibcon#flushed, iclass 21, count 0 2006.229.18:45:28.53#ibcon#about to write, iclass 21, count 0 2006.229.18:45:28.53#ibcon#wrote, iclass 21, count 0 2006.229.18:45:28.53#ibcon#about to read 3, iclass 21, count 0 2006.229.18:45:28.55#ibcon#read 3, iclass 21, count 0 2006.229.18:45:28.55#ibcon#about to read 4, iclass 21, count 0 2006.229.18:45:28.55#ibcon#read 4, iclass 21, count 0 2006.229.18:45:28.55#ibcon#about to read 5, iclass 21, count 0 2006.229.18:45:28.55#ibcon#read 5, iclass 21, count 0 2006.229.18:45:28.55#ibcon#about to read 6, iclass 21, count 0 2006.229.18:45:28.55#ibcon#read 6, iclass 21, count 0 2006.229.18:45:28.55#ibcon#end of sib2, iclass 21, count 0 2006.229.18:45:28.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:45:28.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:45:28.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:45:28.55#ibcon#*before write, iclass 21, count 0 2006.229.18:45:28.55#ibcon#enter sib2, iclass 21, count 0 2006.229.18:45:28.55#ibcon#flushed, iclass 21, count 0 2006.229.18:45:28.55#ibcon#about to write, iclass 21, count 0 2006.229.18:45:28.55#ibcon#wrote, iclass 21, count 0 2006.229.18:45:28.55#ibcon#about to read 3, iclass 21, count 0 2006.229.18:45:28.59#ibcon#read 3, iclass 21, count 0 2006.229.18:45:28.59#ibcon#about to read 4, iclass 21, count 0 2006.229.18:45:28.59#ibcon#read 4, iclass 21, count 0 2006.229.18:45:28.59#ibcon#about to read 5, iclass 21, count 0 2006.229.18:45:28.59#ibcon#read 5, iclass 21, count 0 2006.229.18:45:28.59#ibcon#about to read 6, iclass 21, count 0 2006.229.18:45:28.59#ibcon#read 6, iclass 21, count 0 2006.229.18:45:28.59#ibcon#end of sib2, iclass 21, count 0 2006.229.18:45:28.59#ibcon#*after write, iclass 21, count 0 2006.229.18:45:28.59#ibcon#*before return 0, iclass 21, count 0 2006.229.18:45:28.59#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:28.59#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:28.59#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:45:28.59#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:45:28.59$vck44/va=8,6 2006.229.18:45:28.59#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.18:45:28.59#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.18:45:28.59#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:28.59#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:45:28.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:45:28.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:45:28.65#ibcon#enter wrdev, iclass 23, count 2 2006.229.18:45:28.65#ibcon#first serial, iclass 23, count 2 2006.229.18:45:28.65#ibcon#enter sib2, iclass 23, count 2 2006.229.18:45:28.65#ibcon#flushed, iclass 23, count 2 2006.229.18:45:28.65#ibcon#about to write, iclass 23, count 2 2006.229.18:45:28.65#ibcon#wrote, iclass 23, count 2 2006.229.18:45:28.65#ibcon#about to read 3, iclass 23, count 2 2006.229.18:45:28.67#ibcon#read 3, iclass 23, count 2 2006.229.18:45:28.67#ibcon#about to read 4, iclass 23, count 2 2006.229.18:45:28.67#ibcon#read 4, iclass 23, count 2 2006.229.18:45:28.67#ibcon#about to read 5, iclass 23, count 2 2006.229.18:45:28.67#ibcon#read 5, iclass 23, count 2 2006.229.18:45:28.67#ibcon#about to read 6, iclass 23, count 2 2006.229.18:45:28.67#ibcon#read 6, iclass 23, count 2 2006.229.18:45:28.67#ibcon#end of sib2, iclass 23, count 2 2006.229.18:45:28.67#ibcon#*mode == 0, iclass 23, count 2 2006.229.18:45:28.67#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.18:45:28.67#ibcon#[25=AT08-06\r\n] 2006.229.18:45:28.67#ibcon#*before write, iclass 23, count 2 2006.229.18:45:28.67#ibcon#enter sib2, iclass 23, count 2 2006.229.18:45:28.67#ibcon#flushed, iclass 23, count 2 2006.229.18:45:28.67#ibcon#about to write, iclass 23, count 2 2006.229.18:45:28.67#ibcon#wrote, iclass 23, count 2 2006.229.18:45:28.67#ibcon#about to read 3, iclass 23, count 2 2006.229.18:45:28.70#ibcon#read 3, iclass 23, count 2 2006.229.18:45:28.70#ibcon#about to read 4, iclass 23, count 2 2006.229.18:45:28.70#ibcon#read 4, iclass 23, count 2 2006.229.18:45:28.70#ibcon#about to read 5, iclass 23, count 2 2006.229.18:45:28.70#ibcon#read 5, iclass 23, count 2 2006.229.18:45:28.70#ibcon#about to read 6, iclass 23, count 2 2006.229.18:45:28.70#ibcon#read 6, iclass 23, count 2 2006.229.18:45:28.70#ibcon#end of sib2, iclass 23, count 2 2006.229.18:45:28.70#ibcon#*after write, iclass 23, count 2 2006.229.18:45:28.70#ibcon#*before return 0, iclass 23, count 2 2006.229.18:45:28.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:45:28.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.18:45:28.70#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.18:45:28.70#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:28.70#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:45:28.82#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:45:28.82#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:45:28.82#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:45:28.82#ibcon#first serial, iclass 23, count 0 2006.229.18:45:28.82#ibcon#enter sib2, iclass 23, count 0 2006.229.18:45:28.82#ibcon#flushed, iclass 23, count 0 2006.229.18:45:28.82#ibcon#about to write, iclass 23, count 0 2006.229.18:45:28.82#ibcon#wrote, iclass 23, count 0 2006.229.18:45:28.82#ibcon#about to read 3, iclass 23, count 0 2006.229.18:45:28.84#ibcon#read 3, iclass 23, count 0 2006.229.18:45:28.84#ibcon#about to read 4, iclass 23, count 0 2006.229.18:45:28.84#ibcon#read 4, iclass 23, count 0 2006.229.18:45:28.84#ibcon#about to read 5, iclass 23, count 0 2006.229.18:45:28.84#ibcon#read 5, iclass 23, count 0 2006.229.18:45:28.84#ibcon#about to read 6, iclass 23, count 0 2006.229.18:45:28.84#ibcon#read 6, iclass 23, count 0 2006.229.18:45:28.84#ibcon#end of sib2, iclass 23, count 0 2006.229.18:45:28.84#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:45:28.84#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:45:28.84#ibcon#[25=USB\r\n] 2006.229.18:45:28.84#ibcon#*before write, iclass 23, count 0 2006.229.18:45:28.84#ibcon#enter sib2, iclass 23, count 0 2006.229.18:45:28.84#ibcon#flushed, iclass 23, count 0 2006.229.18:45:28.84#ibcon#about to write, iclass 23, count 0 2006.229.18:45:28.84#ibcon#wrote, iclass 23, count 0 2006.229.18:45:28.84#ibcon#about to read 3, iclass 23, count 0 2006.229.18:45:28.87#ibcon#read 3, iclass 23, count 0 2006.229.18:45:28.87#ibcon#about to read 4, iclass 23, count 0 2006.229.18:45:28.87#ibcon#read 4, iclass 23, count 0 2006.229.18:45:28.87#ibcon#about to read 5, iclass 23, count 0 2006.229.18:45:28.87#ibcon#read 5, iclass 23, count 0 2006.229.18:45:28.87#ibcon#about to read 6, iclass 23, count 0 2006.229.18:45:28.87#ibcon#read 6, iclass 23, count 0 2006.229.18:45:28.87#ibcon#end of sib2, iclass 23, count 0 2006.229.18:45:28.87#ibcon#*after write, iclass 23, count 0 2006.229.18:45:28.87#ibcon#*before return 0, iclass 23, count 0 2006.229.18:45:28.87#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:45:28.87#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.18:45:28.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:45:28.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:45:28.87$vck44/vblo=1,629.99 2006.229.18:45:28.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.18:45:28.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.18:45:28.87#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:28.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:28.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:28.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:28.87#ibcon#enter wrdev, iclass 25, count 0 2006.229.18:45:28.87#ibcon#first serial, iclass 25, count 0 2006.229.18:45:28.87#ibcon#enter sib2, iclass 25, count 0 2006.229.18:45:28.87#ibcon#flushed, iclass 25, count 0 2006.229.18:45:28.87#ibcon#about to write, iclass 25, count 0 2006.229.18:45:28.87#ibcon#wrote, iclass 25, count 0 2006.229.18:45:28.87#ibcon#about to read 3, iclass 25, count 0 2006.229.18:45:28.89#ibcon#read 3, iclass 25, count 0 2006.229.18:45:28.89#ibcon#about to read 4, iclass 25, count 0 2006.229.18:45:28.89#ibcon#read 4, iclass 25, count 0 2006.229.18:45:28.89#ibcon#about to read 5, iclass 25, count 0 2006.229.18:45:28.89#ibcon#read 5, iclass 25, count 0 2006.229.18:45:28.89#ibcon#about to read 6, iclass 25, count 0 2006.229.18:45:28.89#ibcon#read 6, iclass 25, count 0 2006.229.18:45:28.89#ibcon#end of sib2, iclass 25, count 0 2006.229.18:45:28.89#ibcon#*mode == 0, iclass 25, count 0 2006.229.18:45:28.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.18:45:28.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:45:28.89#ibcon#*before write, iclass 25, count 0 2006.229.18:45:28.89#ibcon#enter sib2, iclass 25, count 0 2006.229.18:45:28.89#ibcon#flushed, iclass 25, count 0 2006.229.18:45:28.89#ibcon#about to write, iclass 25, count 0 2006.229.18:45:28.89#ibcon#wrote, iclass 25, count 0 2006.229.18:45:28.89#ibcon#about to read 3, iclass 25, count 0 2006.229.18:45:28.93#ibcon#read 3, iclass 25, count 0 2006.229.18:45:28.93#ibcon#about to read 4, iclass 25, count 0 2006.229.18:45:28.93#ibcon#read 4, iclass 25, count 0 2006.229.18:45:28.93#ibcon#about to read 5, iclass 25, count 0 2006.229.18:45:28.93#ibcon#read 5, iclass 25, count 0 2006.229.18:45:28.93#ibcon#about to read 6, iclass 25, count 0 2006.229.18:45:28.93#ibcon#read 6, iclass 25, count 0 2006.229.18:45:28.93#ibcon#end of sib2, iclass 25, count 0 2006.229.18:45:28.93#ibcon#*after write, iclass 25, count 0 2006.229.18:45:28.93#ibcon#*before return 0, iclass 25, count 0 2006.229.18:45:28.93#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:28.93#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.18:45:28.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.18:45:28.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.18:45:28.93$vck44/vb=1,4 2006.229.18:45:28.93#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.18:45:28.93#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.18:45:28.93#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:28.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:28.93#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:28.93#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:28.93#ibcon#enter wrdev, iclass 27, count 2 2006.229.18:45:28.93#ibcon#first serial, iclass 27, count 2 2006.229.18:45:28.93#ibcon#enter sib2, iclass 27, count 2 2006.229.18:45:28.93#ibcon#flushed, iclass 27, count 2 2006.229.18:45:28.93#ibcon#about to write, iclass 27, count 2 2006.229.18:45:28.93#ibcon#wrote, iclass 27, count 2 2006.229.18:45:28.93#ibcon#about to read 3, iclass 27, count 2 2006.229.18:45:28.95#ibcon#read 3, iclass 27, count 2 2006.229.18:45:28.95#ibcon#about to read 4, iclass 27, count 2 2006.229.18:45:28.95#ibcon#read 4, iclass 27, count 2 2006.229.18:45:28.95#ibcon#about to read 5, iclass 27, count 2 2006.229.18:45:28.95#ibcon#read 5, iclass 27, count 2 2006.229.18:45:28.95#ibcon#about to read 6, iclass 27, count 2 2006.229.18:45:28.95#ibcon#read 6, iclass 27, count 2 2006.229.18:45:28.95#ibcon#end of sib2, iclass 27, count 2 2006.229.18:45:28.95#ibcon#*mode == 0, iclass 27, count 2 2006.229.18:45:28.95#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.18:45:28.95#ibcon#[27=AT01-04\r\n] 2006.229.18:45:28.95#ibcon#*before write, iclass 27, count 2 2006.229.18:45:28.95#ibcon#enter sib2, iclass 27, count 2 2006.229.18:45:28.95#ibcon#flushed, iclass 27, count 2 2006.229.18:45:28.95#ibcon#about to write, iclass 27, count 2 2006.229.18:45:28.95#ibcon#wrote, iclass 27, count 2 2006.229.18:45:28.95#ibcon#about to read 3, iclass 27, count 2 2006.229.18:45:28.98#ibcon#read 3, iclass 27, count 2 2006.229.18:45:28.98#ibcon#about to read 4, iclass 27, count 2 2006.229.18:45:28.98#ibcon#read 4, iclass 27, count 2 2006.229.18:45:28.98#ibcon#about to read 5, iclass 27, count 2 2006.229.18:45:28.98#ibcon#read 5, iclass 27, count 2 2006.229.18:45:28.98#ibcon#about to read 6, iclass 27, count 2 2006.229.18:45:28.98#ibcon#read 6, iclass 27, count 2 2006.229.18:45:28.98#ibcon#end of sib2, iclass 27, count 2 2006.229.18:45:28.98#ibcon#*after write, iclass 27, count 2 2006.229.18:45:28.98#ibcon#*before return 0, iclass 27, count 2 2006.229.18:45:28.98#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:28.98#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.18:45:28.98#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.18:45:28.98#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:28.98#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:29.10#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:29.10#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:29.10#ibcon#enter wrdev, iclass 27, count 0 2006.229.18:45:29.10#ibcon#first serial, iclass 27, count 0 2006.229.18:45:29.10#ibcon#enter sib2, iclass 27, count 0 2006.229.18:45:29.10#ibcon#flushed, iclass 27, count 0 2006.229.18:45:29.10#ibcon#about to write, iclass 27, count 0 2006.229.18:45:29.10#ibcon#wrote, iclass 27, count 0 2006.229.18:45:29.10#ibcon#about to read 3, iclass 27, count 0 2006.229.18:45:29.12#ibcon#read 3, iclass 27, count 0 2006.229.18:45:29.12#ibcon#about to read 4, iclass 27, count 0 2006.229.18:45:29.12#ibcon#read 4, iclass 27, count 0 2006.229.18:45:29.12#ibcon#about to read 5, iclass 27, count 0 2006.229.18:45:29.12#ibcon#read 5, iclass 27, count 0 2006.229.18:45:29.12#ibcon#about to read 6, iclass 27, count 0 2006.229.18:45:29.12#ibcon#read 6, iclass 27, count 0 2006.229.18:45:29.12#ibcon#end of sib2, iclass 27, count 0 2006.229.18:45:29.12#ibcon#*mode == 0, iclass 27, count 0 2006.229.18:45:29.12#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.18:45:29.12#ibcon#[27=USB\r\n] 2006.229.18:45:29.12#ibcon#*before write, iclass 27, count 0 2006.229.18:45:29.12#ibcon#enter sib2, iclass 27, count 0 2006.229.18:45:29.12#ibcon#flushed, iclass 27, count 0 2006.229.18:45:29.12#ibcon#about to write, iclass 27, count 0 2006.229.18:45:29.12#ibcon#wrote, iclass 27, count 0 2006.229.18:45:29.12#ibcon#about to read 3, iclass 27, count 0 2006.229.18:45:29.15#ibcon#read 3, iclass 27, count 0 2006.229.18:45:29.15#ibcon#about to read 4, iclass 27, count 0 2006.229.18:45:29.15#ibcon#read 4, iclass 27, count 0 2006.229.18:45:29.15#ibcon#about to read 5, iclass 27, count 0 2006.229.18:45:29.15#ibcon#read 5, iclass 27, count 0 2006.229.18:45:29.15#ibcon#about to read 6, iclass 27, count 0 2006.229.18:45:29.15#ibcon#read 6, iclass 27, count 0 2006.229.18:45:29.15#ibcon#end of sib2, iclass 27, count 0 2006.229.18:45:29.15#ibcon#*after write, iclass 27, count 0 2006.229.18:45:29.15#ibcon#*before return 0, iclass 27, count 0 2006.229.18:45:29.15#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:29.15#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.18:45:29.15#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.18:45:29.15#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.18:45:29.15$vck44/vblo=2,634.99 2006.229.18:45:29.15#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.18:45:29.15#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.18:45:29.15#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:29.15#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:29.15#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:29.15#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:29.15#ibcon#enter wrdev, iclass 29, count 0 2006.229.18:45:29.15#ibcon#first serial, iclass 29, count 0 2006.229.18:45:29.15#ibcon#enter sib2, iclass 29, count 0 2006.229.18:45:29.15#ibcon#flushed, iclass 29, count 0 2006.229.18:45:29.15#ibcon#about to write, iclass 29, count 0 2006.229.18:45:29.15#ibcon#wrote, iclass 29, count 0 2006.229.18:45:29.15#ibcon#about to read 3, iclass 29, count 0 2006.229.18:45:29.17#ibcon#read 3, iclass 29, count 0 2006.229.18:45:29.17#ibcon#about to read 4, iclass 29, count 0 2006.229.18:45:29.17#ibcon#read 4, iclass 29, count 0 2006.229.18:45:29.17#ibcon#about to read 5, iclass 29, count 0 2006.229.18:45:29.17#ibcon#read 5, iclass 29, count 0 2006.229.18:45:29.17#ibcon#about to read 6, iclass 29, count 0 2006.229.18:45:29.17#ibcon#read 6, iclass 29, count 0 2006.229.18:45:29.17#ibcon#end of sib2, iclass 29, count 0 2006.229.18:45:29.17#ibcon#*mode == 0, iclass 29, count 0 2006.229.18:45:29.17#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.18:45:29.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:45:29.17#ibcon#*before write, iclass 29, count 0 2006.229.18:45:29.17#ibcon#enter sib2, iclass 29, count 0 2006.229.18:45:29.17#ibcon#flushed, iclass 29, count 0 2006.229.18:45:29.17#ibcon#about to write, iclass 29, count 0 2006.229.18:45:29.17#ibcon#wrote, iclass 29, count 0 2006.229.18:45:29.17#ibcon#about to read 3, iclass 29, count 0 2006.229.18:45:29.21#ibcon#read 3, iclass 29, count 0 2006.229.18:45:29.21#ibcon#about to read 4, iclass 29, count 0 2006.229.18:45:29.21#ibcon#read 4, iclass 29, count 0 2006.229.18:45:29.21#ibcon#about to read 5, iclass 29, count 0 2006.229.18:45:29.21#ibcon#read 5, iclass 29, count 0 2006.229.18:45:29.21#ibcon#about to read 6, iclass 29, count 0 2006.229.18:45:29.21#ibcon#read 6, iclass 29, count 0 2006.229.18:45:29.21#ibcon#end of sib2, iclass 29, count 0 2006.229.18:45:29.21#ibcon#*after write, iclass 29, count 0 2006.229.18:45:29.21#ibcon#*before return 0, iclass 29, count 0 2006.229.18:45:29.21#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:29.21#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.18:45:29.21#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.18:45:29.21#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.18:45:29.21$vck44/vb=2,4 2006.229.18:45:29.21#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.18:45:29.21#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.18:45:29.21#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:29.21#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:29.27#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:29.27#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:29.27#ibcon#enter wrdev, iclass 31, count 2 2006.229.18:45:29.27#ibcon#first serial, iclass 31, count 2 2006.229.18:45:29.27#ibcon#enter sib2, iclass 31, count 2 2006.229.18:45:29.27#ibcon#flushed, iclass 31, count 2 2006.229.18:45:29.27#ibcon#about to write, iclass 31, count 2 2006.229.18:45:29.27#ibcon#wrote, iclass 31, count 2 2006.229.18:45:29.27#ibcon#about to read 3, iclass 31, count 2 2006.229.18:45:29.29#ibcon#read 3, iclass 31, count 2 2006.229.18:45:29.29#ibcon#about to read 4, iclass 31, count 2 2006.229.18:45:29.29#ibcon#read 4, iclass 31, count 2 2006.229.18:45:29.29#ibcon#about to read 5, iclass 31, count 2 2006.229.18:45:29.29#ibcon#read 5, iclass 31, count 2 2006.229.18:45:29.29#ibcon#about to read 6, iclass 31, count 2 2006.229.18:45:29.29#ibcon#read 6, iclass 31, count 2 2006.229.18:45:29.29#ibcon#end of sib2, iclass 31, count 2 2006.229.18:45:29.29#ibcon#*mode == 0, iclass 31, count 2 2006.229.18:45:29.29#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.18:45:29.29#ibcon#[27=AT02-04\r\n] 2006.229.18:45:29.29#ibcon#*before write, iclass 31, count 2 2006.229.18:45:29.29#ibcon#enter sib2, iclass 31, count 2 2006.229.18:45:29.29#ibcon#flushed, iclass 31, count 2 2006.229.18:45:29.29#ibcon#about to write, iclass 31, count 2 2006.229.18:45:29.29#ibcon#wrote, iclass 31, count 2 2006.229.18:45:29.29#ibcon#about to read 3, iclass 31, count 2 2006.229.18:45:29.32#ibcon#read 3, iclass 31, count 2 2006.229.18:45:29.32#ibcon#about to read 4, iclass 31, count 2 2006.229.18:45:29.32#ibcon#read 4, iclass 31, count 2 2006.229.18:45:29.32#ibcon#about to read 5, iclass 31, count 2 2006.229.18:45:29.32#ibcon#read 5, iclass 31, count 2 2006.229.18:45:29.32#ibcon#about to read 6, iclass 31, count 2 2006.229.18:45:29.32#ibcon#read 6, iclass 31, count 2 2006.229.18:45:29.32#ibcon#end of sib2, iclass 31, count 2 2006.229.18:45:29.32#ibcon#*after write, iclass 31, count 2 2006.229.18:45:29.32#ibcon#*before return 0, iclass 31, count 2 2006.229.18:45:29.32#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:29.32#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.18:45:29.32#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.18:45:29.32#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:29.32#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:29.44#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:29.44#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:29.44#ibcon#enter wrdev, iclass 31, count 0 2006.229.18:45:29.44#ibcon#first serial, iclass 31, count 0 2006.229.18:45:29.44#ibcon#enter sib2, iclass 31, count 0 2006.229.18:45:29.44#ibcon#flushed, iclass 31, count 0 2006.229.18:45:29.44#ibcon#about to write, iclass 31, count 0 2006.229.18:45:29.44#ibcon#wrote, iclass 31, count 0 2006.229.18:45:29.44#ibcon#about to read 3, iclass 31, count 0 2006.229.18:45:29.46#ibcon#read 3, iclass 31, count 0 2006.229.18:45:29.46#ibcon#about to read 4, iclass 31, count 0 2006.229.18:45:29.46#ibcon#read 4, iclass 31, count 0 2006.229.18:45:29.46#ibcon#about to read 5, iclass 31, count 0 2006.229.18:45:29.46#ibcon#read 5, iclass 31, count 0 2006.229.18:45:29.46#ibcon#about to read 6, iclass 31, count 0 2006.229.18:45:29.46#ibcon#read 6, iclass 31, count 0 2006.229.18:45:29.46#ibcon#end of sib2, iclass 31, count 0 2006.229.18:45:29.46#ibcon#*mode == 0, iclass 31, count 0 2006.229.18:45:29.46#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.18:45:29.46#ibcon#[27=USB\r\n] 2006.229.18:45:29.46#ibcon#*before write, iclass 31, count 0 2006.229.18:45:29.46#ibcon#enter sib2, iclass 31, count 0 2006.229.18:45:29.46#ibcon#flushed, iclass 31, count 0 2006.229.18:45:29.46#ibcon#about to write, iclass 31, count 0 2006.229.18:45:29.46#ibcon#wrote, iclass 31, count 0 2006.229.18:45:29.46#ibcon#about to read 3, iclass 31, count 0 2006.229.18:45:29.49#ibcon#read 3, iclass 31, count 0 2006.229.18:45:29.49#ibcon#about to read 4, iclass 31, count 0 2006.229.18:45:29.49#ibcon#read 4, iclass 31, count 0 2006.229.18:45:29.49#ibcon#about to read 5, iclass 31, count 0 2006.229.18:45:29.49#ibcon#read 5, iclass 31, count 0 2006.229.18:45:29.49#ibcon#about to read 6, iclass 31, count 0 2006.229.18:45:29.49#ibcon#read 6, iclass 31, count 0 2006.229.18:45:29.49#ibcon#end of sib2, iclass 31, count 0 2006.229.18:45:29.49#ibcon#*after write, iclass 31, count 0 2006.229.18:45:29.49#ibcon#*before return 0, iclass 31, count 0 2006.229.18:45:29.49#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:29.49#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.18:45:29.49#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.18:45:29.49#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.18:45:29.49$vck44/vblo=3,649.99 2006.229.18:45:29.49#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.18:45:29.49#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.18:45:29.49#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:29.49#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:29.49#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:29.49#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:29.49#ibcon#enter wrdev, iclass 33, count 0 2006.229.18:45:29.49#ibcon#first serial, iclass 33, count 0 2006.229.18:45:29.49#ibcon#enter sib2, iclass 33, count 0 2006.229.18:45:29.49#ibcon#flushed, iclass 33, count 0 2006.229.18:45:29.49#ibcon#about to write, iclass 33, count 0 2006.229.18:45:29.49#ibcon#wrote, iclass 33, count 0 2006.229.18:45:29.49#ibcon#about to read 3, iclass 33, count 0 2006.229.18:45:29.51#ibcon#read 3, iclass 33, count 0 2006.229.18:45:29.51#ibcon#about to read 4, iclass 33, count 0 2006.229.18:45:29.51#ibcon#read 4, iclass 33, count 0 2006.229.18:45:29.51#ibcon#about to read 5, iclass 33, count 0 2006.229.18:45:29.51#ibcon#read 5, iclass 33, count 0 2006.229.18:45:29.51#ibcon#about to read 6, iclass 33, count 0 2006.229.18:45:29.51#ibcon#read 6, iclass 33, count 0 2006.229.18:45:29.51#ibcon#end of sib2, iclass 33, count 0 2006.229.18:45:29.51#ibcon#*mode == 0, iclass 33, count 0 2006.229.18:45:29.51#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.18:45:29.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:45:29.51#ibcon#*before write, iclass 33, count 0 2006.229.18:45:29.51#ibcon#enter sib2, iclass 33, count 0 2006.229.18:45:29.51#ibcon#flushed, iclass 33, count 0 2006.229.18:45:29.51#ibcon#about to write, iclass 33, count 0 2006.229.18:45:29.51#ibcon#wrote, iclass 33, count 0 2006.229.18:45:29.51#ibcon#about to read 3, iclass 33, count 0 2006.229.18:45:29.55#ibcon#read 3, iclass 33, count 0 2006.229.18:45:29.55#ibcon#about to read 4, iclass 33, count 0 2006.229.18:45:29.55#ibcon#read 4, iclass 33, count 0 2006.229.18:45:29.55#ibcon#about to read 5, iclass 33, count 0 2006.229.18:45:29.55#ibcon#read 5, iclass 33, count 0 2006.229.18:45:29.55#ibcon#about to read 6, iclass 33, count 0 2006.229.18:45:29.55#ibcon#read 6, iclass 33, count 0 2006.229.18:45:29.55#ibcon#end of sib2, iclass 33, count 0 2006.229.18:45:29.55#ibcon#*after write, iclass 33, count 0 2006.229.18:45:29.55#ibcon#*before return 0, iclass 33, count 0 2006.229.18:45:29.55#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:29.55#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.18:45:29.55#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.18:45:29.55#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.18:45:29.55$vck44/vb=3,4 2006.229.18:45:29.55#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.18:45:29.55#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.18:45:29.55#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:29.55#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:29.61#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:29.61#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:29.61#ibcon#enter wrdev, iclass 35, count 2 2006.229.18:45:29.61#ibcon#first serial, iclass 35, count 2 2006.229.18:45:29.61#ibcon#enter sib2, iclass 35, count 2 2006.229.18:45:29.61#ibcon#flushed, iclass 35, count 2 2006.229.18:45:29.61#ibcon#about to write, iclass 35, count 2 2006.229.18:45:29.61#ibcon#wrote, iclass 35, count 2 2006.229.18:45:29.61#ibcon#about to read 3, iclass 35, count 2 2006.229.18:45:29.63#ibcon#read 3, iclass 35, count 2 2006.229.18:45:29.63#ibcon#about to read 4, iclass 35, count 2 2006.229.18:45:29.63#ibcon#read 4, iclass 35, count 2 2006.229.18:45:29.63#ibcon#about to read 5, iclass 35, count 2 2006.229.18:45:29.63#ibcon#read 5, iclass 35, count 2 2006.229.18:45:29.63#ibcon#about to read 6, iclass 35, count 2 2006.229.18:45:29.63#ibcon#read 6, iclass 35, count 2 2006.229.18:45:29.63#ibcon#end of sib2, iclass 35, count 2 2006.229.18:45:29.63#ibcon#*mode == 0, iclass 35, count 2 2006.229.18:45:29.63#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.18:45:29.63#ibcon#[27=AT03-04\r\n] 2006.229.18:45:29.63#ibcon#*before write, iclass 35, count 2 2006.229.18:45:29.63#ibcon#enter sib2, iclass 35, count 2 2006.229.18:45:29.63#ibcon#flushed, iclass 35, count 2 2006.229.18:45:29.63#ibcon#about to write, iclass 35, count 2 2006.229.18:45:29.63#ibcon#wrote, iclass 35, count 2 2006.229.18:45:29.63#ibcon#about to read 3, iclass 35, count 2 2006.229.18:45:29.66#ibcon#read 3, iclass 35, count 2 2006.229.18:45:29.66#ibcon#about to read 4, iclass 35, count 2 2006.229.18:45:29.66#ibcon#read 4, iclass 35, count 2 2006.229.18:45:29.66#ibcon#about to read 5, iclass 35, count 2 2006.229.18:45:29.66#ibcon#read 5, iclass 35, count 2 2006.229.18:45:29.66#ibcon#about to read 6, iclass 35, count 2 2006.229.18:45:29.66#ibcon#read 6, iclass 35, count 2 2006.229.18:45:29.66#ibcon#end of sib2, iclass 35, count 2 2006.229.18:45:29.66#ibcon#*after write, iclass 35, count 2 2006.229.18:45:29.66#ibcon#*before return 0, iclass 35, count 2 2006.229.18:45:29.66#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:29.66#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.18:45:29.66#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.18:45:29.66#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:29.66#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:29.78#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:29.78#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:29.78#ibcon#enter wrdev, iclass 35, count 0 2006.229.18:45:29.78#ibcon#first serial, iclass 35, count 0 2006.229.18:45:29.78#ibcon#enter sib2, iclass 35, count 0 2006.229.18:45:29.78#ibcon#flushed, iclass 35, count 0 2006.229.18:45:29.78#ibcon#about to write, iclass 35, count 0 2006.229.18:45:29.78#ibcon#wrote, iclass 35, count 0 2006.229.18:45:29.78#ibcon#about to read 3, iclass 35, count 0 2006.229.18:45:29.80#ibcon#read 3, iclass 35, count 0 2006.229.18:45:29.80#ibcon#about to read 4, iclass 35, count 0 2006.229.18:45:29.80#ibcon#read 4, iclass 35, count 0 2006.229.18:45:29.80#ibcon#about to read 5, iclass 35, count 0 2006.229.18:45:29.80#ibcon#read 5, iclass 35, count 0 2006.229.18:45:29.80#ibcon#about to read 6, iclass 35, count 0 2006.229.18:45:29.80#ibcon#read 6, iclass 35, count 0 2006.229.18:45:29.80#ibcon#end of sib2, iclass 35, count 0 2006.229.18:45:29.80#ibcon#*mode == 0, iclass 35, count 0 2006.229.18:45:29.80#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.18:45:29.80#ibcon#[27=USB\r\n] 2006.229.18:45:29.80#ibcon#*before write, iclass 35, count 0 2006.229.18:45:29.80#ibcon#enter sib2, iclass 35, count 0 2006.229.18:45:29.80#ibcon#flushed, iclass 35, count 0 2006.229.18:45:29.80#ibcon#about to write, iclass 35, count 0 2006.229.18:45:29.80#ibcon#wrote, iclass 35, count 0 2006.229.18:45:29.80#ibcon#about to read 3, iclass 35, count 0 2006.229.18:45:29.83#ibcon#read 3, iclass 35, count 0 2006.229.18:45:29.83#ibcon#about to read 4, iclass 35, count 0 2006.229.18:45:29.83#ibcon#read 4, iclass 35, count 0 2006.229.18:45:29.83#ibcon#about to read 5, iclass 35, count 0 2006.229.18:45:29.83#ibcon#read 5, iclass 35, count 0 2006.229.18:45:29.83#ibcon#about to read 6, iclass 35, count 0 2006.229.18:45:29.83#ibcon#read 6, iclass 35, count 0 2006.229.18:45:29.83#ibcon#end of sib2, iclass 35, count 0 2006.229.18:45:29.83#ibcon#*after write, iclass 35, count 0 2006.229.18:45:29.83#ibcon#*before return 0, iclass 35, count 0 2006.229.18:45:29.83#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:29.83#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.18:45:29.83#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.18:45:29.83#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.18:45:29.83$vck44/vblo=4,679.99 2006.229.18:45:29.83#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.18:45:29.83#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.18:45:29.83#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:29.83#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:29.83#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:29.83#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:29.83#ibcon#enter wrdev, iclass 37, count 0 2006.229.18:45:29.83#ibcon#first serial, iclass 37, count 0 2006.229.18:45:29.83#ibcon#enter sib2, iclass 37, count 0 2006.229.18:45:29.83#ibcon#flushed, iclass 37, count 0 2006.229.18:45:29.83#ibcon#about to write, iclass 37, count 0 2006.229.18:45:29.83#ibcon#wrote, iclass 37, count 0 2006.229.18:45:29.83#ibcon#about to read 3, iclass 37, count 0 2006.229.18:45:29.85#ibcon#read 3, iclass 37, count 0 2006.229.18:45:29.85#ibcon#about to read 4, iclass 37, count 0 2006.229.18:45:29.85#ibcon#read 4, iclass 37, count 0 2006.229.18:45:29.85#ibcon#about to read 5, iclass 37, count 0 2006.229.18:45:29.85#ibcon#read 5, iclass 37, count 0 2006.229.18:45:29.85#ibcon#about to read 6, iclass 37, count 0 2006.229.18:45:29.85#ibcon#read 6, iclass 37, count 0 2006.229.18:45:29.85#ibcon#end of sib2, iclass 37, count 0 2006.229.18:45:29.85#ibcon#*mode == 0, iclass 37, count 0 2006.229.18:45:29.85#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.18:45:29.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:45:29.85#ibcon#*before write, iclass 37, count 0 2006.229.18:45:29.85#ibcon#enter sib2, iclass 37, count 0 2006.229.18:45:29.85#ibcon#flushed, iclass 37, count 0 2006.229.18:45:29.85#ibcon#about to write, iclass 37, count 0 2006.229.18:45:29.85#ibcon#wrote, iclass 37, count 0 2006.229.18:45:29.85#ibcon#about to read 3, iclass 37, count 0 2006.229.18:45:29.89#ibcon#read 3, iclass 37, count 0 2006.229.18:45:29.89#ibcon#about to read 4, iclass 37, count 0 2006.229.18:45:29.89#ibcon#read 4, iclass 37, count 0 2006.229.18:45:29.89#ibcon#about to read 5, iclass 37, count 0 2006.229.18:45:29.89#ibcon#read 5, iclass 37, count 0 2006.229.18:45:29.89#ibcon#about to read 6, iclass 37, count 0 2006.229.18:45:29.89#ibcon#read 6, iclass 37, count 0 2006.229.18:45:29.89#ibcon#end of sib2, iclass 37, count 0 2006.229.18:45:29.89#ibcon#*after write, iclass 37, count 0 2006.229.18:45:29.89#ibcon#*before return 0, iclass 37, count 0 2006.229.18:45:29.89#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:29.89#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.18:45:29.89#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.18:45:29.89#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.18:45:29.89$vck44/vb=4,4 2006.229.18:45:29.89#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.18:45:29.89#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.18:45:29.89#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:29.89#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:29.95#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:29.95#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:29.95#ibcon#enter wrdev, iclass 39, count 2 2006.229.18:45:29.95#ibcon#first serial, iclass 39, count 2 2006.229.18:45:29.95#ibcon#enter sib2, iclass 39, count 2 2006.229.18:45:29.95#ibcon#flushed, iclass 39, count 2 2006.229.18:45:29.95#ibcon#about to write, iclass 39, count 2 2006.229.18:45:29.95#ibcon#wrote, iclass 39, count 2 2006.229.18:45:29.95#ibcon#about to read 3, iclass 39, count 2 2006.229.18:45:29.97#ibcon#read 3, iclass 39, count 2 2006.229.18:45:29.97#ibcon#about to read 4, iclass 39, count 2 2006.229.18:45:29.97#ibcon#read 4, iclass 39, count 2 2006.229.18:45:29.97#ibcon#about to read 5, iclass 39, count 2 2006.229.18:45:29.97#ibcon#read 5, iclass 39, count 2 2006.229.18:45:29.97#ibcon#about to read 6, iclass 39, count 2 2006.229.18:45:29.97#ibcon#read 6, iclass 39, count 2 2006.229.18:45:29.97#ibcon#end of sib2, iclass 39, count 2 2006.229.18:45:29.97#ibcon#*mode == 0, iclass 39, count 2 2006.229.18:45:29.97#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.18:45:29.97#ibcon#[27=AT04-04\r\n] 2006.229.18:45:29.97#ibcon#*before write, iclass 39, count 2 2006.229.18:45:29.97#ibcon#enter sib2, iclass 39, count 2 2006.229.18:45:29.97#ibcon#flushed, iclass 39, count 2 2006.229.18:45:29.97#ibcon#about to write, iclass 39, count 2 2006.229.18:45:29.97#ibcon#wrote, iclass 39, count 2 2006.229.18:45:29.97#ibcon#about to read 3, iclass 39, count 2 2006.229.18:45:30.00#ibcon#read 3, iclass 39, count 2 2006.229.18:45:30.00#ibcon#about to read 4, iclass 39, count 2 2006.229.18:45:30.00#ibcon#read 4, iclass 39, count 2 2006.229.18:45:30.00#ibcon#about to read 5, iclass 39, count 2 2006.229.18:45:30.00#ibcon#read 5, iclass 39, count 2 2006.229.18:45:30.00#ibcon#about to read 6, iclass 39, count 2 2006.229.18:45:30.00#ibcon#read 6, iclass 39, count 2 2006.229.18:45:30.00#ibcon#end of sib2, iclass 39, count 2 2006.229.18:45:30.00#ibcon#*after write, iclass 39, count 2 2006.229.18:45:30.00#ibcon#*before return 0, iclass 39, count 2 2006.229.18:45:30.00#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:30.00#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.18:45:30.00#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.18:45:30.00#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:30.00#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:30.12#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:30.12#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:30.12#ibcon#enter wrdev, iclass 39, count 0 2006.229.18:45:30.12#ibcon#first serial, iclass 39, count 0 2006.229.18:45:30.12#ibcon#enter sib2, iclass 39, count 0 2006.229.18:45:30.12#ibcon#flushed, iclass 39, count 0 2006.229.18:45:30.12#ibcon#about to write, iclass 39, count 0 2006.229.18:45:30.12#ibcon#wrote, iclass 39, count 0 2006.229.18:45:30.12#ibcon#about to read 3, iclass 39, count 0 2006.229.18:45:30.14#ibcon#read 3, iclass 39, count 0 2006.229.18:45:30.14#ibcon#about to read 4, iclass 39, count 0 2006.229.18:45:30.14#ibcon#read 4, iclass 39, count 0 2006.229.18:45:30.14#ibcon#about to read 5, iclass 39, count 0 2006.229.18:45:30.14#ibcon#read 5, iclass 39, count 0 2006.229.18:45:30.14#ibcon#about to read 6, iclass 39, count 0 2006.229.18:45:30.14#ibcon#read 6, iclass 39, count 0 2006.229.18:45:30.14#ibcon#end of sib2, iclass 39, count 0 2006.229.18:45:30.14#ibcon#*mode == 0, iclass 39, count 0 2006.229.18:45:30.14#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.18:45:30.14#ibcon#[27=USB\r\n] 2006.229.18:45:30.14#ibcon#*before write, iclass 39, count 0 2006.229.18:45:30.14#ibcon#enter sib2, iclass 39, count 0 2006.229.18:45:30.14#ibcon#flushed, iclass 39, count 0 2006.229.18:45:30.14#ibcon#about to write, iclass 39, count 0 2006.229.18:45:30.14#ibcon#wrote, iclass 39, count 0 2006.229.18:45:30.14#ibcon#about to read 3, iclass 39, count 0 2006.229.18:45:30.17#ibcon#read 3, iclass 39, count 0 2006.229.18:45:30.17#ibcon#about to read 4, iclass 39, count 0 2006.229.18:45:30.17#ibcon#read 4, iclass 39, count 0 2006.229.18:45:30.17#ibcon#about to read 5, iclass 39, count 0 2006.229.18:45:30.17#ibcon#read 5, iclass 39, count 0 2006.229.18:45:30.17#ibcon#about to read 6, iclass 39, count 0 2006.229.18:45:30.17#ibcon#read 6, iclass 39, count 0 2006.229.18:45:30.17#ibcon#end of sib2, iclass 39, count 0 2006.229.18:45:30.17#ibcon#*after write, iclass 39, count 0 2006.229.18:45:30.17#ibcon#*before return 0, iclass 39, count 0 2006.229.18:45:30.17#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:30.17#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.18:45:30.17#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.18:45:30.17#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.18:45:30.17$vck44/vblo=5,709.99 2006.229.18:45:30.17#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.18:45:30.17#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.18:45:30.17#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:30.17#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:30.17#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:30.17#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:30.17#ibcon#enter wrdev, iclass 3, count 0 2006.229.18:45:30.17#ibcon#first serial, iclass 3, count 0 2006.229.18:45:30.17#ibcon#enter sib2, iclass 3, count 0 2006.229.18:45:30.17#ibcon#flushed, iclass 3, count 0 2006.229.18:45:30.17#ibcon#about to write, iclass 3, count 0 2006.229.18:45:30.17#ibcon#wrote, iclass 3, count 0 2006.229.18:45:30.17#ibcon#about to read 3, iclass 3, count 0 2006.229.18:45:30.19#ibcon#read 3, iclass 3, count 0 2006.229.18:45:30.19#ibcon#about to read 4, iclass 3, count 0 2006.229.18:45:30.19#ibcon#read 4, iclass 3, count 0 2006.229.18:45:30.19#ibcon#about to read 5, iclass 3, count 0 2006.229.18:45:30.19#ibcon#read 5, iclass 3, count 0 2006.229.18:45:30.19#ibcon#about to read 6, iclass 3, count 0 2006.229.18:45:30.19#ibcon#read 6, iclass 3, count 0 2006.229.18:45:30.19#ibcon#end of sib2, iclass 3, count 0 2006.229.18:45:30.19#ibcon#*mode == 0, iclass 3, count 0 2006.229.18:45:30.19#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.18:45:30.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:45:30.19#ibcon#*before write, iclass 3, count 0 2006.229.18:45:30.19#ibcon#enter sib2, iclass 3, count 0 2006.229.18:45:30.19#ibcon#flushed, iclass 3, count 0 2006.229.18:45:30.19#ibcon#about to write, iclass 3, count 0 2006.229.18:45:30.19#ibcon#wrote, iclass 3, count 0 2006.229.18:45:30.19#ibcon#about to read 3, iclass 3, count 0 2006.229.18:45:30.23#ibcon#read 3, iclass 3, count 0 2006.229.18:45:30.23#ibcon#about to read 4, iclass 3, count 0 2006.229.18:45:30.23#ibcon#read 4, iclass 3, count 0 2006.229.18:45:30.23#ibcon#about to read 5, iclass 3, count 0 2006.229.18:45:30.23#ibcon#read 5, iclass 3, count 0 2006.229.18:45:30.23#ibcon#about to read 6, iclass 3, count 0 2006.229.18:45:30.23#ibcon#read 6, iclass 3, count 0 2006.229.18:45:30.23#ibcon#end of sib2, iclass 3, count 0 2006.229.18:45:30.23#ibcon#*after write, iclass 3, count 0 2006.229.18:45:30.23#ibcon#*before return 0, iclass 3, count 0 2006.229.18:45:30.23#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:30.23#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.18:45:30.23#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.18:45:30.23#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.18:45:30.23$vck44/vb=5,4 2006.229.18:45:30.23#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.18:45:30.23#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.18:45:30.23#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:30.23#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:30.29#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:30.29#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:30.29#ibcon#enter wrdev, iclass 5, count 2 2006.229.18:45:30.29#ibcon#first serial, iclass 5, count 2 2006.229.18:45:30.29#ibcon#enter sib2, iclass 5, count 2 2006.229.18:45:30.29#ibcon#flushed, iclass 5, count 2 2006.229.18:45:30.29#ibcon#about to write, iclass 5, count 2 2006.229.18:45:30.29#ibcon#wrote, iclass 5, count 2 2006.229.18:45:30.29#ibcon#about to read 3, iclass 5, count 2 2006.229.18:45:30.31#ibcon#read 3, iclass 5, count 2 2006.229.18:45:30.31#ibcon#about to read 4, iclass 5, count 2 2006.229.18:45:30.31#ibcon#read 4, iclass 5, count 2 2006.229.18:45:30.31#ibcon#about to read 5, iclass 5, count 2 2006.229.18:45:30.31#ibcon#read 5, iclass 5, count 2 2006.229.18:45:30.31#ibcon#about to read 6, iclass 5, count 2 2006.229.18:45:30.31#ibcon#read 6, iclass 5, count 2 2006.229.18:45:30.31#ibcon#end of sib2, iclass 5, count 2 2006.229.18:45:30.31#ibcon#*mode == 0, iclass 5, count 2 2006.229.18:45:30.31#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.18:45:30.31#ibcon#[27=AT05-04\r\n] 2006.229.18:45:30.31#ibcon#*before write, iclass 5, count 2 2006.229.18:45:30.31#ibcon#enter sib2, iclass 5, count 2 2006.229.18:45:30.31#ibcon#flushed, iclass 5, count 2 2006.229.18:45:30.31#ibcon#about to write, iclass 5, count 2 2006.229.18:45:30.31#ibcon#wrote, iclass 5, count 2 2006.229.18:45:30.31#ibcon#about to read 3, iclass 5, count 2 2006.229.18:45:30.34#ibcon#read 3, iclass 5, count 2 2006.229.18:45:30.34#ibcon#about to read 4, iclass 5, count 2 2006.229.18:45:30.34#ibcon#read 4, iclass 5, count 2 2006.229.18:45:30.34#ibcon#about to read 5, iclass 5, count 2 2006.229.18:45:30.34#ibcon#read 5, iclass 5, count 2 2006.229.18:45:30.34#ibcon#about to read 6, iclass 5, count 2 2006.229.18:45:30.34#ibcon#read 6, iclass 5, count 2 2006.229.18:45:30.34#ibcon#end of sib2, iclass 5, count 2 2006.229.18:45:30.34#ibcon#*after write, iclass 5, count 2 2006.229.18:45:30.34#ibcon#*before return 0, iclass 5, count 2 2006.229.18:45:30.34#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:30.34#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.18:45:30.34#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.18:45:30.34#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:30.34#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:30.46#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:30.46#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:30.46#ibcon#enter wrdev, iclass 5, count 0 2006.229.18:45:30.46#ibcon#first serial, iclass 5, count 0 2006.229.18:45:30.46#ibcon#enter sib2, iclass 5, count 0 2006.229.18:45:30.46#ibcon#flushed, iclass 5, count 0 2006.229.18:45:30.46#ibcon#about to write, iclass 5, count 0 2006.229.18:45:30.46#ibcon#wrote, iclass 5, count 0 2006.229.18:45:30.46#ibcon#about to read 3, iclass 5, count 0 2006.229.18:45:30.48#ibcon#read 3, iclass 5, count 0 2006.229.18:45:30.48#ibcon#about to read 4, iclass 5, count 0 2006.229.18:45:30.48#ibcon#read 4, iclass 5, count 0 2006.229.18:45:30.48#ibcon#about to read 5, iclass 5, count 0 2006.229.18:45:30.48#ibcon#read 5, iclass 5, count 0 2006.229.18:45:30.48#ibcon#about to read 6, iclass 5, count 0 2006.229.18:45:30.48#ibcon#read 6, iclass 5, count 0 2006.229.18:45:30.48#ibcon#end of sib2, iclass 5, count 0 2006.229.18:45:30.48#ibcon#*mode == 0, iclass 5, count 0 2006.229.18:45:30.48#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.18:45:30.48#ibcon#[27=USB\r\n] 2006.229.18:45:30.48#ibcon#*before write, iclass 5, count 0 2006.229.18:45:30.48#ibcon#enter sib2, iclass 5, count 0 2006.229.18:45:30.48#ibcon#flushed, iclass 5, count 0 2006.229.18:45:30.48#ibcon#about to write, iclass 5, count 0 2006.229.18:45:30.48#ibcon#wrote, iclass 5, count 0 2006.229.18:45:30.48#ibcon#about to read 3, iclass 5, count 0 2006.229.18:45:30.51#ibcon#read 3, iclass 5, count 0 2006.229.18:45:30.51#ibcon#about to read 4, iclass 5, count 0 2006.229.18:45:30.51#ibcon#read 4, iclass 5, count 0 2006.229.18:45:30.51#ibcon#about to read 5, iclass 5, count 0 2006.229.18:45:30.51#ibcon#read 5, iclass 5, count 0 2006.229.18:45:30.51#ibcon#about to read 6, iclass 5, count 0 2006.229.18:45:30.51#ibcon#read 6, iclass 5, count 0 2006.229.18:45:30.51#ibcon#end of sib2, iclass 5, count 0 2006.229.18:45:30.51#ibcon#*after write, iclass 5, count 0 2006.229.18:45:30.51#ibcon#*before return 0, iclass 5, count 0 2006.229.18:45:30.51#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:30.51#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.18:45:30.51#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.18:45:30.51#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.18:45:30.51$vck44/vblo=6,719.99 2006.229.18:45:30.51#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.18:45:30.51#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.18:45:30.51#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:30.51#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:45:30.51#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:45:30.51#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:45:30.51#ibcon#enter wrdev, iclass 7, count 0 2006.229.18:45:30.51#ibcon#first serial, iclass 7, count 0 2006.229.18:45:30.51#ibcon#enter sib2, iclass 7, count 0 2006.229.18:45:30.51#ibcon#flushed, iclass 7, count 0 2006.229.18:45:30.51#ibcon#about to write, iclass 7, count 0 2006.229.18:45:30.51#ibcon#wrote, iclass 7, count 0 2006.229.18:45:30.51#ibcon#about to read 3, iclass 7, count 0 2006.229.18:45:30.53#ibcon#read 3, iclass 7, count 0 2006.229.18:45:30.53#ibcon#about to read 4, iclass 7, count 0 2006.229.18:45:30.53#ibcon#read 4, iclass 7, count 0 2006.229.18:45:30.53#ibcon#about to read 5, iclass 7, count 0 2006.229.18:45:30.53#ibcon#read 5, iclass 7, count 0 2006.229.18:45:30.53#ibcon#about to read 6, iclass 7, count 0 2006.229.18:45:30.53#ibcon#read 6, iclass 7, count 0 2006.229.18:45:30.53#ibcon#end of sib2, iclass 7, count 0 2006.229.18:45:30.53#ibcon#*mode == 0, iclass 7, count 0 2006.229.18:45:30.53#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.18:45:30.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:45:30.53#ibcon#*before write, iclass 7, count 0 2006.229.18:45:30.53#ibcon#enter sib2, iclass 7, count 0 2006.229.18:45:30.53#ibcon#flushed, iclass 7, count 0 2006.229.18:45:30.53#ibcon#about to write, iclass 7, count 0 2006.229.18:45:30.53#ibcon#wrote, iclass 7, count 0 2006.229.18:45:30.53#ibcon#about to read 3, iclass 7, count 0 2006.229.18:45:30.57#ibcon#read 3, iclass 7, count 0 2006.229.18:45:30.57#ibcon#about to read 4, iclass 7, count 0 2006.229.18:45:30.57#ibcon#read 4, iclass 7, count 0 2006.229.18:45:30.57#ibcon#about to read 5, iclass 7, count 0 2006.229.18:45:30.57#ibcon#read 5, iclass 7, count 0 2006.229.18:45:30.57#ibcon#about to read 6, iclass 7, count 0 2006.229.18:45:30.57#ibcon#read 6, iclass 7, count 0 2006.229.18:45:30.57#ibcon#end of sib2, iclass 7, count 0 2006.229.18:45:30.57#ibcon#*after write, iclass 7, count 0 2006.229.18:45:30.57#ibcon#*before return 0, iclass 7, count 0 2006.229.18:45:30.57#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:45:30.57#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.18:45:30.57#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.18:45:30.57#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.18:45:30.57$vck44/vb=6,4 2006.229.18:45:30.57#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.18:45:30.57#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.18:45:30.57#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:30.57#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:45:30.63#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:45:30.63#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:45:30.63#ibcon#enter wrdev, iclass 11, count 2 2006.229.18:45:30.63#ibcon#first serial, iclass 11, count 2 2006.229.18:45:30.63#ibcon#enter sib2, iclass 11, count 2 2006.229.18:45:30.63#ibcon#flushed, iclass 11, count 2 2006.229.18:45:30.63#ibcon#about to write, iclass 11, count 2 2006.229.18:45:30.63#ibcon#wrote, iclass 11, count 2 2006.229.18:45:30.63#ibcon#about to read 3, iclass 11, count 2 2006.229.18:45:30.65#ibcon#read 3, iclass 11, count 2 2006.229.18:45:30.65#ibcon#about to read 4, iclass 11, count 2 2006.229.18:45:30.65#ibcon#read 4, iclass 11, count 2 2006.229.18:45:30.65#ibcon#about to read 5, iclass 11, count 2 2006.229.18:45:30.65#ibcon#read 5, iclass 11, count 2 2006.229.18:45:30.65#ibcon#about to read 6, iclass 11, count 2 2006.229.18:45:30.65#ibcon#read 6, iclass 11, count 2 2006.229.18:45:30.65#ibcon#end of sib2, iclass 11, count 2 2006.229.18:45:30.65#ibcon#*mode == 0, iclass 11, count 2 2006.229.18:45:30.65#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.18:45:30.65#ibcon#[27=AT06-04\r\n] 2006.229.18:45:30.65#ibcon#*before write, iclass 11, count 2 2006.229.18:45:30.65#ibcon#enter sib2, iclass 11, count 2 2006.229.18:45:30.65#ibcon#flushed, iclass 11, count 2 2006.229.18:45:30.65#ibcon#about to write, iclass 11, count 2 2006.229.18:45:30.65#ibcon#wrote, iclass 11, count 2 2006.229.18:45:30.65#ibcon#about to read 3, iclass 11, count 2 2006.229.18:45:30.68#ibcon#read 3, iclass 11, count 2 2006.229.18:45:30.68#ibcon#about to read 4, iclass 11, count 2 2006.229.18:45:30.68#ibcon#read 4, iclass 11, count 2 2006.229.18:45:30.68#ibcon#about to read 5, iclass 11, count 2 2006.229.18:45:30.68#ibcon#read 5, iclass 11, count 2 2006.229.18:45:30.68#ibcon#about to read 6, iclass 11, count 2 2006.229.18:45:30.68#ibcon#read 6, iclass 11, count 2 2006.229.18:45:30.68#ibcon#end of sib2, iclass 11, count 2 2006.229.18:45:30.68#ibcon#*after write, iclass 11, count 2 2006.229.18:45:30.68#ibcon#*before return 0, iclass 11, count 2 2006.229.18:45:30.68#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:45:30.68#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.18:45:30.68#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.18:45:30.68#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:30.68#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:45:30.80#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:45:30.80#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:45:30.80#ibcon#enter wrdev, iclass 11, count 0 2006.229.18:45:30.80#ibcon#first serial, iclass 11, count 0 2006.229.18:45:30.80#ibcon#enter sib2, iclass 11, count 0 2006.229.18:45:30.80#ibcon#flushed, iclass 11, count 0 2006.229.18:45:30.80#ibcon#about to write, iclass 11, count 0 2006.229.18:45:30.80#ibcon#wrote, iclass 11, count 0 2006.229.18:45:30.80#ibcon#about to read 3, iclass 11, count 0 2006.229.18:45:30.82#ibcon#read 3, iclass 11, count 0 2006.229.18:45:30.82#ibcon#about to read 4, iclass 11, count 0 2006.229.18:45:30.82#ibcon#read 4, iclass 11, count 0 2006.229.18:45:30.82#ibcon#about to read 5, iclass 11, count 0 2006.229.18:45:30.82#ibcon#read 5, iclass 11, count 0 2006.229.18:45:30.82#ibcon#about to read 6, iclass 11, count 0 2006.229.18:45:30.82#ibcon#read 6, iclass 11, count 0 2006.229.18:45:30.82#ibcon#end of sib2, iclass 11, count 0 2006.229.18:45:30.82#ibcon#*mode == 0, iclass 11, count 0 2006.229.18:45:30.82#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.18:45:30.82#ibcon#[27=USB\r\n] 2006.229.18:45:30.82#ibcon#*before write, iclass 11, count 0 2006.229.18:45:30.82#ibcon#enter sib2, iclass 11, count 0 2006.229.18:45:30.82#ibcon#flushed, iclass 11, count 0 2006.229.18:45:30.82#ibcon#about to write, iclass 11, count 0 2006.229.18:45:30.82#ibcon#wrote, iclass 11, count 0 2006.229.18:45:30.82#ibcon#about to read 3, iclass 11, count 0 2006.229.18:45:30.85#ibcon#read 3, iclass 11, count 0 2006.229.18:45:30.85#ibcon#about to read 4, iclass 11, count 0 2006.229.18:45:30.85#ibcon#read 4, iclass 11, count 0 2006.229.18:45:30.85#ibcon#about to read 5, iclass 11, count 0 2006.229.18:45:30.85#ibcon#read 5, iclass 11, count 0 2006.229.18:45:30.85#ibcon#about to read 6, iclass 11, count 0 2006.229.18:45:30.85#ibcon#read 6, iclass 11, count 0 2006.229.18:45:30.85#ibcon#end of sib2, iclass 11, count 0 2006.229.18:45:30.85#ibcon#*after write, iclass 11, count 0 2006.229.18:45:30.85#ibcon#*before return 0, iclass 11, count 0 2006.229.18:45:30.85#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:45:30.85#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.18:45:30.85#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.18:45:30.85#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.18:45:30.85$vck44/vblo=7,734.99 2006.229.18:45:30.85#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.18:45:30.85#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.18:45:30.85#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:30.85#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:45:30.85#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:45:30.85#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:45:30.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.18:45:30.85#ibcon#first serial, iclass 13, count 0 2006.229.18:45:30.85#ibcon#enter sib2, iclass 13, count 0 2006.229.18:45:30.85#ibcon#flushed, iclass 13, count 0 2006.229.18:45:30.85#ibcon#about to write, iclass 13, count 0 2006.229.18:45:30.85#ibcon#wrote, iclass 13, count 0 2006.229.18:45:30.85#ibcon#about to read 3, iclass 13, count 0 2006.229.18:45:30.87#ibcon#read 3, iclass 13, count 0 2006.229.18:45:30.87#ibcon#about to read 4, iclass 13, count 0 2006.229.18:45:30.87#ibcon#read 4, iclass 13, count 0 2006.229.18:45:30.87#ibcon#about to read 5, iclass 13, count 0 2006.229.18:45:30.87#ibcon#read 5, iclass 13, count 0 2006.229.18:45:30.87#ibcon#about to read 6, iclass 13, count 0 2006.229.18:45:30.87#ibcon#read 6, iclass 13, count 0 2006.229.18:45:30.87#ibcon#end of sib2, iclass 13, count 0 2006.229.18:45:30.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.18:45:30.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.18:45:30.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:45:30.87#ibcon#*before write, iclass 13, count 0 2006.229.18:45:30.87#ibcon#enter sib2, iclass 13, count 0 2006.229.18:45:30.87#ibcon#flushed, iclass 13, count 0 2006.229.18:45:30.87#ibcon#about to write, iclass 13, count 0 2006.229.18:45:30.87#ibcon#wrote, iclass 13, count 0 2006.229.18:45:30.87#ibcon#about to read 3, iclass 13, count 0 2006.229.18:45:30.91#ibcon#read 3, iclass 13, count 0 2006.229.18:45:30.91#ibcon#about to read 4, iclass 13, count 0 2006.229.18:45:30.91#ibcon#read 4, iclass 13, count 0 2006.229.18:45:30.91#ibcon#about to read 5, iclass 13, count 0 2006.229.18:45:30.91#ibcon#read 5, iclass 13, count 0 2006.229.18:45:30.91#ibcon#about to read 6, iclass 13, count 0 2006.229.18:45:30.91#ibcon#read 6, iclass 13, count 0 2006.229.18:45:30.91#ibcon#end of sib2, iclass 13, count 0 2006.229.18:45:30.91#ibcon#*after write, iclass 13, count 0 2006.229.18:45:30.91#ibcon#*before return 0, iclass 13, count 0 2006.229.18:45:30.91#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:45:30.91#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.18:45:30.91#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.18:45:30.91#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.18:45:30.91$vck44/vb=7,4 2006.229.18:45:30.91#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.18:45:30.91#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.18:45:30.91#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:30.91#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:30.97#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:30.97#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:30.97#ibcon#enter wrdev, iclass 15, count 2 2006.229.18:45:30.97#ibcon#first serial, iclass 15, count 2 2006.229.18:45:30.97#ibcon#enter sib2, iclass 15, count 2 2006.229.18:45:30.97#ibcon#flushed, iclass 15, count 2 2006.229.18:45:30.97#ibcon#about to write, iclass 15, count 2 2006.229.18:45:30.97#ibcon#wrote, iclass 15, count 2 2006.229.18:45:30.97#ibcon#about to read 3, iclass 15, count 2 2006.229.18:45:30.99#ibcon#read 3, iclass 15, count 2 2006.229.18:45:30.99#ibcon#about to read 4, iclass 15, count 2 2006.229.18:45:30.99#ibcon#read 4, iclass 15, count 2 2006.229.18:45:30.99#ibcon#about to read 5, iclass 15, count 2 2006.229.18:45:30.99#ibcon#read 5, iclass 15, count 2 2006.229.18:45:30.99#ibcon#about to read 6, iclass 15, count 2 2006.229.18:45:30.99#ibcon#read 6, iclass 15, count 2 2006.229.18:45:30.99#ibcon#end of sib2, iclass 15, count 2 2006.229.18:45:30.99#ibcon#*mode == 0, iclass 15, count 2 2006.229.18:45:30.99#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.18:45:30.99#ibcon#[27=AT07-04\r\n] 2006.229.18:45:30.99#ibcon#*before write, iclass 15, count 2 2006.229.18:45:30.99#ibcon#enter sib2, iclass 15, count 2 2006.229.18:45:30.99#ibcon#flushed, iclass 15, count 2 2006.229.18:45:30.99#ibcon#about to write, iclass 15, count 2 2006.229.18:45:30.99#ibcon#wrote, iclass 15, count 2 2006.229.18:45:30.99#ibcon#about to read 3, iclass 15, count 2 2006.229.18:45:31.02#ibcon#read 3, iclass 15, count 2 2006.229.18:45:31.02#ibcon#about to read 4, iclass 15, count 2 2006.229.18:45:31.02#ibcon#read 4, iclass 15, count 2 2006.229.18:45:31.02#ibcon#about to read 5, iclass 15, count 2 2006.229.18:45:31.02#ibcon#read 5, iclass 15, count 2 2006.229.18:45:31.02#ibcon#about to read 6, iclass 15, count 2 2006.229.18:45:31.02#ibcon#read 6, iclass 15, count 2 2006.229.18:45:31.02#ibcon#end of sib2, iclass 15, count 2 2006.229.18:45:31.02#ibcon#*after write, iclass 15, count 2 2006.229.18:45:31.02#ibcon#*before return 0, iclass 15, count 2 2006.229.18:45:31.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:31.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.18:45:31.02#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.18:45:31.02#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:31.02#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:31.14#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:31.14#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:31.14#ibcon#enter wrdev, iclass 15, count 0 2006.229.18:45:31.14#ibcon#first serial, iclass 15, count 0 2006.229.18:45:31.14#ibcon#enter sib2, iclass 15, count 0 2006.229.18:45:31.14#ibcon#flushed, iclass 15, count 0 2006.229.18:45:31.14#ibcon#about to write, iclass 15, count 0 2006.229.18:45:31.14#ibcon#wrote, iclass 15, count 0 2006.229.18:45:31.14#ibcon#about to read 3, iclass 15, count 0 2006.229.18:45:31.16#ibcon#read 3, iclass 15, count 0 2006.229.18:45:31.16#ibcon#about to read 4, iclass 15, count 0 2006.229.18:45:31.16#ibcon#read 4, iclass 15, count 0 2006.229.18:45:31.16#ibcon#about to read 5, iclass 15, count 0 2006.229.18:45:31.16#ibcon#read 5, iclass 15, count 0 2006.229.18:45:31.16#ibcon#about to read 6, iclass 15, count 0 2006.229.18:45:31.16#ibcon#read 6, iclass 15, count 0 2006.229.18:45:31.16#ibcon#end of sib2, iclass 15, count 0 2006.229.18:45:31.16#ibcon#*mode == 0, iclass 15, count 0 2006.229.18:45:31.16#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.18:45:31.16#ibcon#[27=USB\r\n] 2006.229.18:45:31.16#ibcon#*before write, iclass 15, count 0 2006.229.18:45:31.16#ibcon#enter sib2, iclass 15, count 0 2006.229.18:45:31.16#ibcon#flushed, iclass 15, count 0 2006.229.18:45:31.16#ibcon#about to write, iclass 15, count 0 2006.229.18:45:31.16#ibcon#wrote, iclass 15, count 0 2006.229.18:45:31.16#ibcon#about to read 3, iclass 15, count 0 2006.229.18:45:31.19#ibcon#read 3, iclass 15, count 0 2006.229.18:45:31.19#ibcon#about to read 4, iclass 15, count 0 2006.229.18:45:31.19#ibcon#read 4, iclass 15, count 0 2006.229.18:45:31.19#ibcon#about to read 5, iclass 15, count 0 2006.229.18:45:31.19#ibcon#read 5, iclass 15, count 0 2006.229.18:45:31.19#ibcon#about to read 6, iclass 15, count 0 2006.229.18:45:31.19#ibcon#read 6, iclass 15, count 0 2006.229.18:45:31.19#ibcon#end of sib2, iclass 15, count 0 2006.229.18:45:31.19#ibcon#*after write, iclass 15, count 0 2006.229.18:45:31.19#ibcon#*before return 0, iclass 15, count 0 2006.229.18:45:31.19#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:31.19#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.18:45:31.19#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.18:45:31.19#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.18:45:31.19$vck44/vblo=8,744.99 2006.229.18:45:31.19#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.18:45:31.19#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.18:45:31.19#ibcon#ireg 17 cls_cnt 0 2006.229.18:45:31.19#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:31.19#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:31.19#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:31.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.18:45:31.19#ibcon#first serial, iclass 17, count 0 2006.229.18:45:31.19#ibcon#enter sib2, iclass 17, count 0 2006.229.18:45:31.19#ibcon#flushed, iclass 17, count 0 2006.229.18:45:31.19#ibcon#about to write, iclass 17, count 0 2006.229.18:45:31.19#ibcon#wrote, iclass 17, count 0 2006.229.18:45:31.19#ibcon#about to read 3, iclass 17, count 0 2006.229.18:45:31.21#ibcon#read 3, iclass 17, count 0 2006.229.18:45:31.21#ibcon#about to read 4, iclass 17, count 0 2006.229.18:45:31.21#ibcon#read 4, iclass 17, count 0 2006.229.18:45:31.21#ibcon#about to read 5, iclass 17, count 0 2006.229.18:45:31.21#ibcon#read 5, iclass 17, count 0 2006.229.18:45:31.21#ibcon#about to read 6, iclass 17, count 0 2006.229.18:45:31.21#ibcon#read 6, iclass 17, count 0 2006.229.18:45:31.21#ibcon#end of sib2, iclass 17, count 0 2006.229.18:45:31.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.18:45:31.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.18:45:31.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:45:31.21#ibcon#*before write, iclass 17, count 0 2006.229.18:45:31.21#ibcon#enter sib2, iclass 17, count 0 2006.229.18:45:31.21#ibcon#flushed, iclass 17, count 0 2006.229.18:45:31.21#ibcon#about to write, iclass 17, count 0 2006.229.18:45:31.21#ibcon#wrote, iclass 17, count 0 2006.229.18:45:31.21#ibcon#about to read 3, iclass 17, count 0 2006.229.18:45:31.25#ibcon#read 3, iclass 17, count 0 2006.229.18:45:31.25#ibcon#about to read 4, iclass 17, count 0 2006.229.18:45:31.25#ibcon#read 4, iclass 17, count 0 2006.229.18:45:31.25#ibcon#about to read 5, iclass 17, count 0 2006.229.18:45:31.25#ibcon#read 5, iclass 17, count 0 2006.229.18:45:31.25#ibcon#about to read 6, iclass 17, count 0 2006.229.18:45:31.25#ibcon#read 6, iclass 17, count 0 2006.229.18:45:31.25#ibcon#end of sib2, iclass 17, count 0 2006.229.18:45:31.25#ibcon#*after write, iclass 17, count 0 2006.229.18:45:31.25#ibcon#*before return 0, iclass 17, count 0 2006.229.18:45:31.25#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:31.25#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.18:45:31.25#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.18:45:31.25#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.18:45:31.25$vck44/vb=8,4 2006.229.18:45:31.25#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.18:45:31.25#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.18:45:31.25#ibcon#ireg 11 cls_cnt 2 2006.229.18:45:31.25#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:31.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:31.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:31.31#ibcon#enter wrdev, iclass 19, count 2 2006.229.18:45:31.31#ibcon#first serial, iclass 19, count 2 2006.229.18:45:31.31#ibcon#enter sib2, iclass 19, count 2 2006.229.18:45:31.31#ibcon#flushed, iclass 19, count 2 2006.229.18:45:31.31#ibcon#about to write, iclass 19, count 2 2006.229.18:45:31.31#ibcon#wrote, iclass 19, count 2 2006.229.18:45:31.31#ibcon#about to read 3, iclass 19, count 2 2006.229.18:45:31.33#ibcon#read 3, iclass 19, count 2 2006.229.18:45:31.33#ibcon#about to read 4, iclass 19, count 2 2006.229.18:45:31.33#ibcon#read 4, iclass 19, count 2 2006.229.18:45:31.33#ibcon#about to read 5, iclass 19, count 2 2006.229.18:45:31.33#ibcon#read 5, iclass 19, count 2 2006.229.18:45:31.33#ibcon#about to read 6, iclass 19, count 2 2006.229.18:45:31.33#ibcon#read 6, iclass 19, count 2 2006.229.18:45:31.33#ibcon#end of sib2, iclass 19, count 2 2006.229.18:45:31.33#ibcon#*mode == 0, iclass 19, count 2 2006.229.18:45:31.33#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.18:45:31.33#ibcon#[27=AT08-04\r\n] 2006.229.18:45:31.33#ibcon#*before write, iclass 19, count 2 2006.229.18:45:31.33#ibcon#enter sib2, iclass 19, count 2 2006.229.18:45:31.33#ibcon#flushed, iclass 19, count 2 2006.229.18:45:31.33#ibcon#about to write, iclass 19, count 2 2006.229.18:45:31.33#ibcon#wrote, iclass 19, count 2 2006.229.18:45:31.33#ibcon#about to read 3, iclass 19, count 2 2006.229.18:45:31.36#ibcon#read 3, iclass 19, count 2 2006.229.18:45:31.36#ibcon#about to read 4, iclass 19, count 2 2006.229.18:45:31.36#ibcon#read 4, iclass 19, count 2 2006.229.18:45:31.36#ibcon#about to read 5, iclass 19, count 2 2006.229.18:45:31.36#ibcon#read 5, iclass 19, count 2 2006.229.18:45:31.36#ibcon#about to read 6, iclass 19, count 2 2006.229.18:45:31.36#ibcon#read 6, iclass 19, count 2 2006.229.18:45:31.36#ibcon#end of sib2, iclass 19, count 2 2006.229.18:45:31.36#ibcon#*after write, iclass 19, count 2 2006.229.18:45:31.36#ibcon#*before return 0, iclass 19, count 2 2006.229.18:45:31.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:31.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.18:45:31.36#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.18:45:31.36#ibcon#ireg 7 cls_cnt 0 2006.229.18:45:31.36#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:31.48#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:31.48#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:31.48#ibcon#enter wrdev, iclass 19, count 0 2006.229.18:45:31.48#ibcon#first serial, iclass 19, count 0 2006.229.18:45:31.48#ibcon#enter sib2, iclass 19, count 0 2006.229.18:45:31.48#ibcon#flushed, iclass 19, count 0 2006.229.18:45:31.48#ibcon#about to write, iclass 19, count 0 2006.229.18:45:31.48#ibcon#wrote, iclass 19, count 0 2006.229.18:45:31.48#ibcon#about to read 3, iclass 19, count 0 2006.229.18:45:31.50#ibcon#read 3, iclass 19, count 0 2006.229.18:45:31.50#ibcon#about to read 4, iclass 19, count 0 2006.229.18:45:31.50#ibcon#read 4, iclass 19, count 0 2006.229.18:45:31.50#ibcon#about to read 5, iclass 19, count 0 2006.229.18:45:31.50#ibcon#read 5, iclass 19, count 0 2006.229.18:45:31.50#ibcon#about to read 6, iclass 19, count 0 2006.229.18:45:31.50#ibcon#read 6, iclass 19, count 0 2006.229.18:45:31.50#ibcon#end of sib2, iclass 19, count 0 2006.229.18:45:31.50#ibcon#*mode == 0, iclass 19, count 0 2006.229.18:45:31.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.18:45:31.50#ibcon#[27=USB\r\n] 2006.229.18:45:31.50#ibcon#*before write, iclass 19, count 0 2006.229.18:45:31.50#ibcon#enter sib2, iclass 19, count 0 2006.229.18:45:31.50#ibcon#flushed, iclass 19, count 0 2006.229.18:45:31.50#ibcon#about to write, iclass 19, count 0 2006.229.18:45:31.50#ibcon#wrote, iclass 19, count 0 2006.229.18:45:31.50#ibcon#about to read 3, iclass 19, count 0 2006.229.18:45:31.53#ibcon#read 3, iclass 19, count 0 2006.229.18:45:31.53#ibcon#about to read 4, iclass 19, count 0 2006.229.18:45:31.53#ibcon#read 4, iclass 19, count 0 2006.229.18:45:31.53#ibcon#about to read 5, iclass 19, count 0 2006.229.18:45:31.53#ibcon#read 5, iclass 19, count 0 2006.229.18:45:31.53#ibcon#about to read 6, iclass 19, count 0 2006.229.18:45:31.53#ibcon#read 6, iclass 19, count 0 2006.229.18:45:31.53#ibcon#end of sib2, iclass 19, count 0 2006.229.18:45:31.53#ibcon#*after write, iclass 19, count 0 2006.229.18:45:31.53#ibcon#*before return 0, iclass 19, count 0 2006.229.18:45:31.53#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:31.53#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.18:45:31.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.18:45:31.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.18:45:31.53$vck44/vabw=wide 2006.229.18:45:31.53#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.18:45:31.53#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.18:45:31.53#ibcon#ireg 8 cls_cnt 0 2006.229.18:45:31.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:31.53#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:31.53#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:31.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.18:45:31.53#ibcon#first serial, iclass 21, count 0 2006.229.18:45:31.53#ibcon#enter sib2, iclass 21, count 0 2006.229.18:45:31.53#ibcon#flushed, iclass 21, count 0 2006.229.18:45:31.53#ibcon#about to write, iclass 21, count 0 2006.229.18:45:31.53#ibcon#wrote, iclass 21, count 0 2006.229.18:45:31.53#ibcon#about to read 3, iclass 21, count 0 2006.229.18:45:31.55#ibcon#read 3, iclass 21, count 0 2006.229.18:45:31.55#ibcon#about to read 4, iclass 21, count 0 2006.229.18:45:31.55#ibcon#read 4, iclass 21, count 0 2006.229.18:45:31.55#ibcon#about to read 5, iclass 21, count 0 2006.229.18:45:31.55#ibcon#read 5, iclass 21, count 0 2006.229.18:45:31.55#ibcon#about to read 6, iclass 21, count 0 2006.229.18:45:31.55#ibcon#read 6, iclass 21, count 0 2006.229.18:45:31.55#ibcon#end of sib2, iclass 21, count 0 2006.229.18:45:31.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.18:45:31.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.18:45:31.55#ibcon#[25=BW32\r\n] 2006.229.18:45:31.55#ibcon#*before write, iclass 21, count 0 2006.229.18:45:31.55#ibcon#enter sib2, iclass 21, count 0 2006.229.18:45:31.55#ibcon#flushed, iclass 21, count 0 2006.229.18:45:31.55#ibcon#about to write, iclass 21, count 0 2006.229.18:45:31.55#ibcon#wrote, iclass 21, count 0 2006.229.18:45:31.55#ibcon#about to read 3, iclass 21, count 0 2006.229.18:45:31.58#ibcon#read 3, iclass 21, count 0 2006.229.18:45:31.58#ibcon#about to read 4, iclass 21, count 0 2006.229.18:45:31.58#ibcon#read 4, iclass 21, count 0 2006.229.18:45:31.58#ibcon#about to read 5, iclass 21, count 0 2006.229.18:45:31.58#ibcon#read 5, iclass 21, count 0 2006.229.18:45:31.58#ibcon#about to read 6, iclass 21, count 0 2006.229.18:45:31.58#ibcon#read 6, iclass 21, count 0 2006.229.18:45:31.58#ibcon#end of sib2, iclass 21, count 0 2006.229.18:45:31.58#ibcon#*after write, iclass 21, count 0 2006.229.18:45:31.58#ibcon#*before return 0, iclass 21, count 0 2006.229.18:45:31.58#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:31.58#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.18:45:31.58#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.18:45:31.58#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.18:45:31.58$vck44/vbbw=wide 2006.229.18:45:31.58#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.18:45:31.58#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.18:45:31.58#ibcon#ireg 8 cls_cnt 0 2006.229.18:45:31.58#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:45:31.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:45:31.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:45:31.65#ibcon#enter wrdev, iclass 23, count 0 2006.229.18:45:31.65#ibcon#first serial, iclass 23, count 0 2006.229.18:45:31.65#ibcon#enter sib2, iclass 23, count 0 2006.229.18:45:31.65#ibcon#flushed, iclass 23, count 0 2006.229.18:45:31.65#ibcon#about to write, iclass 23, count 0 2006.229.18:45:31.65#ibcon#wrote, iclass 23, count 0 2006.229.18:45:31.65#ibcon#about to read 3, iclass 23, count 0 2006.229.18:45:31.67#ibcon#read 3, iclass 23, count 0 2006.229.18:45:31.67#ibcon#about to read 4, iclass 23, count 0 2006.229.18:45:31.67#ibcon#read 4, iclass 23, count 0 2006.229.18:45:31.67#ibcon#about to read 5, iclass 23, count 0 2006.229.18:45:31.67#ibcon#read 5, iclass 23, count 0 2006.229.18:45:31.67#ibcon#about to read 6, iclass 23, count 0 2006.229.18:45:31.67#ibcon#read 6, iclass 23, count 0 2006.229.18:45:31.67#ibcon#end of sib2, iclass 23, count 0 2006.229.18:45:31.67#ibcon#*mode == 0, iclass 23, count 0 2006.229.18:45:31.67#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.18:45:31.67#ibcon#[27=BW32\r\n] 2006.229.18:45:31.67#ibcon#*before write, iclass 23, count 0 2006.229.18:45:31.67#ibcon#enter sib2, iclass 23, count 0 2006.229.18:45:31.67#ibcon#flushed, iclass 23, count 0 2006.229.18:45:31.67#ibcon#about to write, iclass 23, count 0 2006.229.18:45:31.67#ibcon#wrote, iclass 23, count 0 2006.229.18:45:31.67#ibcon#about to read 3, iclass 23, count 0 2006.229.18:45:31.70#ibcon#read 3, iclass 23, count 0 2006.229.18:45:31.70#ibcon#about to read 4, iclass 23, count 0 2006.229.18:45:31.70#ibcon#read 4, iclass 23, count 0 2006.229.18:45:31.70#ibcon#about to read 5, iclass 23, count 0 2006.229.18:45:31.70#ibcon#read 5, iclass 23, count 0 2006.229.18:45:31.70#ibcon#about to read 6, iclass 23, count 0 2006.229.18:45:31.70#ibcon#read 6, iclass 23, count 0 2006.229.18:45:31.70#ibcon#end of sib2, iclass 23, count 0 2006.229.18:45:31.70#ibcon#*after write, iclass 23, count 0 2006.229.18:45:31.70#ibcon#*before return 0, iclass 23, count 0 2006.229.18:45:31.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:45:31.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.18:45:31.70#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.18:45:31.70#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.18:45:31.70$setupk4/ifdk4 2006.229.18:45:31.70$ifdk4/lo= 2006.229.18:45:31.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:45:31.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:45:31.70$ifdk4/patch= 2006.229.18:45:31.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:45:31.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:45:31.70$setupk4/!*+20s 2006.229.18:45:38.02#abcon#<5=/07 1.1 2.2 26.241001001.3\r\n> 2006.229.18:45:38.04#abcon#{5=INTERFACE CLEAR} 2006.229.18:45:38.10#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:45:46.21$setupk4/"tpicd 2006.229.18:45:46.21$setupk4/echo=off 2006.229.18:45:46.21$setupk4/xlog=off 2006.229.18:45:46.21:!2006.229.18:54:16 2006.229.18:45:58.14#trakl#Source acquired 2006.229.18:45:58.14#flagr#flagr/antenna,acquired 2006.229.18:54:16.00:preob 2006.229.18:54:17.14/onsource/TRACKING 2006.229.18:54:17.14:!2006.229.18:54:26 2006.229.18:54:26.00:"tape 2006.229.18:54:26.00:"st=record 2006.229.18:54:26.00:data_valid=on 2006.229.18:54:26.00:midob 2006.229.18:54:26.14/onsource/TRACKING 2006.229.18:54:26.14/wx/26.16,1001.3,100 2006.229.18:54:26.27/cable/+6.4184E-03 2006.229.18:54:27.36/va/01,08,usb,yes,32,34 2006.229.18:54:27.36/va/02,07,usb,yes,34,35 2006.229.18:54:27.36/va/03,06,usb,yes,43,45 2006.229.18:54:27.36/va/04,07,usb,yes,36,37 2006.229.18:54:27.36/va/05,04,usb,yes,32,32 2006.229.18:54:27.36/va/06,04,usb,yes,36,35 2006.229.18:54:27.36/va/07,05,usb,yes,31,32 2006.229.18:54:27.36/va/08,06,usb,yes,23,28 2006.229.18:54:27.59/valo/01,524.99,yes,locked 2006.229.18:54:27.59/valo/02,534.99,yes,locked 2006.229.18:54:27.59/valo/03,564.99,yes,locked 2006.229.18:54:27.59/valo/04,624.99,yes,locked 2006.229.18:54:27.59/valo/05,734.99,yes,locked 2006.229.18:54:27.59/valo/06,814.99,yes,locked 2006.229.18:54:27.59/valo/07,864.99,yes,locked 2006.229.18:54:27.59/valo/08,884.99,yes,locked 2006.229.18:54:28.68/vb/01,04,usb,yes,31,29 2006.229.18:54:28.68/vb/02,04,usb,yes,34,34 2006.229.18:54:28.68/vb/03,04,usb,yes,31,34 2006.229.18:54:28.68/vb/04,04,usb,yes,35,34 2006.229.18:54:28.68/vb/05,04,usb,yes,27,30 2006.229.18:54:28.68/vb/06,04,usb,yes,32,28 2006.229.18:54:28.68/vb/07,04,usb,yes,32,32 2006.229.18:54:28.68/vb/08,04,usb,yes,29,33 2006.229.18:54:28.92/vblo/01,629.99,yes,locked 2006.229.18:54:28.92/vblo/02,634.99,yes,locked 2006.229.18:54:28.92/vblo/03,649.99,yes,locked 2006.229.18:54:28.92/vblo/04,679.99,yes,locked 2006.229.18:54:28.92/vblo/05,709.99,yes,locked 2006.229.18:54:28.92/vblo/06,719.99,yes,locked 2006.229.18:54:28.92/vblo/07,734.99,yes,locked 2006.229.18:54:28.92/vblo/08,744.99,yes,locked 2006.229.18:54:29.07/vabw/8 2006.229.18:54:29.22/vbbw/8 2006.229.18:54:29.33/xfe/off,on,12.0 2006.229.18:54:29.70/ifatt/23,28,28,28 2006.229.18:54:30.08/fmout-gps/S +4.45E-07 2006.229.18:54:30.12:!2006.229.18:55:36 2006.229.18:55:36.00:data_valid=off 2006.229.18:55:36.00:"et 2006.229.18:55:36.00:!+3s 2006.229.18:55:39.01:"tape 2006.229.18:55:39.01:postob 2006.229.18:55:39.07/cable/+6.4161E-03 2006.229.18:55:39.07/wx/26.14,1001.3,100 2006.229.18:55:40.08/fmout-gps/S +4.43E-07 2006.229.18:55:40.08:scan_name=229-1857,jd0608,190 2006.229.18:55:40.08:source=3c446,222547.26,-045701.4,2000.0,ccw 2006.229.18:55:41.14#flagr#flagr/antenna,new-source 2006.229.18:55:41.14:checkk5 2006.229.18:55:41.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.18:55:41.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.18:55:42.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.18:55:42.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.18:55:43.10/chk_obsdata//k5ts1/T2291854??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.18:55:43.51/chk_obsdata//k5ts2/T2291854??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.18:55:43.90/chk_obsdata//k5ts3/T2291854??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.18:55:44.31/chk_obsdata//k5ts4/T2291854??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.18:55:45.03/k5log//k5ts1_log_newline 2006.229.18:55:45.74/k5log//k5ts2_log_newline 2006.229.18:55:46.45/k5log//k5ts3_log_newline 2006.229.18:55:47.17/k5log//k5ts4_log_newline 2006.229.18:55:47.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.18:55:47.20:setupk4=1 2006.229.18:55:47.20$setupk4/echo=on 2006.229.18:55:47.20$setupk4/pcalon 2006.229.18:55:47.20$pcalon/"no phase cal control is implemented here 2006.229.18:55:47.20$setupk4/"tpicd=stop 2006.229.18:55:47.20$setupk4/"rec=synch_on 2006.229.18:55:47.20$setupk4/"rec_mode=128 2006.229.18:55:47.20$setupk4/!* 2006.229.18:55:47.20$setupk4/recpk4 2006.229.18:55:47.20$recpk4/recpatch= 2006.229.18:55:47.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.18:55:47.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.18:55:47.21$setupk4/vck44 2006.229.18:55:47.21$vck44/valo=1,524.99 2006.229.18:55:47.21#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.18:55:47.21#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.18:55:47.21#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:47.21#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:47.21#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:47.21#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:47.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:55:47.21#ibcon#first serial, iclass 16, count 0 2006.229.18:55:47.21#ibcon#enter sib2, iclass 16, count 0 2006.229.18:55:47.21#ibcon#flushed, iclass 16, count 0 2006.229.18:55:47.21#ibcon#about to write, iclass 16, count 0 2006.229.18:55:47.21#ibcon#wrote, iclass 16, count 0 2006.229.18:55:47.21#ibcon#about to read 3, iclass 16, count 0 2006.229.18:55:47.23#ibcon#read 3, iclass 16, count 0 2006.229.18:55:47.23#ibcon#about to read 4, iclass 16, count 0 2006.229.18:55:47.23#ibcon#read 4, iclass 16, count 0 2006.229.18:55:47.23#ibcon#about to read 5, iclass 16, count 0 2006.229.18:55:47.23#ibcon#read 5, iclass 16, count 0 2006.229.18:55:47.23#ibcon#about to read 6, iclass 16, count 0 2006.229.18:55:47.23#ibcon#read 6, iclass 16, count 0 2006.229.18:55:47.23#ibcon#end of sib2, iclass 16, count 0 2006.229.18:55:47.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:55:47.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:55:47.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.18:55:47.23#ibcon#*before write, iclass 16, count 0 2006.229.18:55:47.23#ibcon#enter sib2, iclass 16, count 0 2006.229.18:55:47.23#ibcon#flushed, iclass 16, count 0 2006.229.18:55:47.23#ibcon#about to write, iclass 16, count 0 2006.229.18:55:47.23#ibcon#wrote, iclass 16, count 0 2006.229.18:55:47.23#ibcon#about to read 3, iclass 16, count 0 2006.229.18:55:47.28#ibcon#read 3, iclass 16, count 0 2006.229.18:55:47.28#ibcon#about to read 4, iclass 16, count 0 2006.229.18:55:47.28#ibcon#read 4, iclass 16, count 0 2006.229.18:55:47.28#ibcon#about to read 5, iclass 16, count 0 2006.229.18:55:47.28#ibcon#read 5, iclass 16, count 0 2006.229.18:55:47.28#ibcon#about to read 6, iclass 16, count 0 2006.229.18:55:47.28#ibcon#read 6, iclass 16, count 0 2006.229.18:55:47.28#ibcon#end of sib2, iclass 16, count 0 2006.229.18:55:47.28#ibcon#*after write, iclass 16, count 0 2006.229.18:55:47.28#ibcon#*before return 0, iclass 16, count 0 2006.229.18:55:47.28#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:47.28#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:47.28#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:55:47.28#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:55:47.28$vck44/va=1,8 2006.229.18:55:47.28#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.18:55:47.28#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.18:55:47.28#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:47.28#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:47.28#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:47.28#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:47.28#ibcon#enter wrdev, iclass 18, count 2 2006.229.18:55:47.28#ibcon#first serial, iclass 18, count 2 2006.229.18:55:47.28#ibcon#enter sib2, iclass 18, count 2 2006.229.18:55:47.28#ibcon#flushed, iclass 18, count 2 2006.229.18:55:47.28#ibcon#about to write, iclass 18, count 2 2006.229.18:55:47.28#ibcon#wrote, iclass 18, count 2 2006.229.18:55:47.28#ibcon#about to read 3, iclass 18, count 2 2006.229.18:55:47.30#ibcon#read 3, iclass 18, count 2 2006.229.18:55:47.30#ibcon#about to read 4, iclass 18, count 2 2006.229.18:55:47.30#ibcon#read 4, iclass 18, count 2 2006.229.18:55:47.30#ibcon#about to read 5, iclass 18, count 2 2006.229.18:55:47.30#ibcon#read 5, iclass 18, count 2 2006.229.18:55:47.30#ibcon#about to read 6, iclass 18, count 2 2006.229.18:55:47.30#ibcon#read 6, iclass 18, count 2 2006.229.18:55:47.30#ibcon#end of sib2, iclass 18, count 2 2006.229.18:55:47.30#ibcon#*mode == 0, iclass 18, count 2 2006.229.18:55:47.30#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.18:55:47.30#ibcon#[25=AT01-08\r\n] 2006.229.18:55:47.30#ibcon#*before write, iclass 18, count 2 2006.229.18:55:47.30#ibcon#enter sib2, iclass 18, count 2 2006.229.18:55:47.30#ibcon#flushed, iclass 18, count 2 2006.229.18:55:47.30#ibcon#about to write, iclass 18, count 2 2006.229.18:55:47.30#ibcon#wrote, iclass 18, count 2 2006.229.18:55:47.30#ibcon#about to read 3, iclass 18, count 2 2006.229.18:55:47.33#ibcon#read 3, iclass 18, count 2 2006.229.18:55:47.33#ibcon#about to read 4, iclass 18, count 2 2006.229.18:55:47.33#ibcon#read 4, iclass 18, count 2 2006.229.18:55:47.33#ibcon#about to read 5, iclass 18, count 2 2006.229.18:55:47.33#ibcon#read 5, iclass 18, count 2 2006.229.18:55:47.33#ibcon#about to read 6, iclass 18, count 2 2006.229.18:55:47.33#ibcon#read 6, iclass 18, count 2 2006.229.18:55:47.33#ibcon#end of sib2, iclass 18, count 2 2006.229.18:55:47.33#ibcon#*after write, iclass 18, count 2 2006.229.18:55:47.33#ibcon#*before return 0, iclass 18, count 2 2006.229.18:55:47.33#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:47.33#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:47.33#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.18:55:47.33#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:47.33#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:47.45#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:47.45#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:47.45#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:55:47.45#ibcon#first serial, iclass 18, count 0 2006.229.18:55:47.45#ibcon#enter sib2, iclass 18, count 0 2006.229.18:55:47.45#ibcon#flushed, iclass 18, count 0 2006.229.18:55:47.45#ibcon#about to write, iclass 18, count 0 2006.229.18:55:47.45#ibcon#wrote, iclass 18, count 0 2006.229.18:55:47.45#ibcon#about to read 3, iclass 18, count 0 2006.229.18:55:47.47#ibcon#read 3, iclass 18, count 0 2006.229.18:55:47.47#ibcon#about to read 4, iclass 18, count 0 2006.229.18:55:47.47#ibcon#read 4, iclass 18, count 0 2006.229.18:55:47.47#ibcon#about to read 5, iclass 18, count 0 2006.229.18:55:47.47#ibcon#read 5, iclass 18, count 0 2006.229.18:55:47.47#ibcon#about to read 6, iclass 18, count 0 2006.229.18:55:47.47#ibcon#read 6, iclass 18, count 0 2006.229.18:55:47.47#ibcon#end of sib2, iclass 18, count 0 2006.229.18:55:47.47#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:55:47.47#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:55:47.47#ibcon#[25=USB\r\n] 2006.229.18:55:47.47#ibcon#*before write, iclass 18, count 0 2006.229.18:55:47.47#ibcon#enter sib2, iclass 18, count 0 2006.229.18:55:47.47#ibcon#flushed, iclass 18, count 0 2006.229.18:55:47.47#ibcon#about to write, iclass 18, count 0 2006.229.18:55:47.47#ibcon#wrote, iclass 18, count 0 2006.229.18:55:47.47#ibcon#about to read 3, iclass 18, count 0 2006.229.18:55:47.50#ibcon#read 3, iclass 18, count 0 2006.229.18:55:47.50#ibcon#about to read 4, iclass 18, count 0 2006.229.18:55:47.50#ibcon#read 4, iclass 18, count 0 2006.229.18:55:47.50#ibcon#about to read 5, iclass 18, count 0 2006.229.18:55:47.50#ibcon#read 5, iclass 18, count 0 2006.229.18:55:47.50#ibcon#about to read 6, iclass 18, count 0 2006.229.18:55:47.50#ibcon#read 6, iclass 18, count 0 2006.229.18:55:47.50#ibcon#end of sib2, iclass 18, count 0 2006.229.18:55:47.50#ibcon#*after write, iclass 18, count 0 2006.229.18:55:47.50#ibcon#*before return 0, iclass 18, count 0 2006.229.18:55:47.50#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:47.50#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:47.50#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:55:47.50#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:55:47.50$vck44/valo=2,534.99 2006.229.18:55:47.50#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.18:55:47.50#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.18:55:47.50#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:47.50#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:47.50#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:47.50#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:47.50#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:55:47.50#ibcon#first serial, iclass 20, count 0 2006.229.18:55:47.50#ibcon#enter sib2, iclass 20, count 0 2006.229.18:55:47.50#ibcon#flushed, iclass 20, count 0 2006.229.18:55:47.50#ibcon#about to write, iclass 20, count 0 2006.229.18:55:47.50#ibcon#wrote, iclass 20, count 0 2006.229.18:55:47.50#ibcon#about to read 3, iclass 20, count 0 2006.229.18:55:47.52#ibcon#read 3, iclass 20, count 0 2006.229.18:55:47.52#ibcon#about to read 4, iclass 20, count 0 2006.229.18:55:47.52#ibcon#read 4, iclass 20, count 0 2006.229.18:55:47.52#ibcon#about to read 5, iclass 20, count 0 2006.229.18:55:47.52#ibcon#read 5, iclass 20, count 0 2006.229.18:55:47.52#ibcon#about to read 6, iclass 20, count 0 2006.229.18:55:47.52#ibcon#read 6, iclass 20, count 0 2006.229.18:55:47.52#ibcon#end of sib2, iclass 20, count 0 2006.229.18:55:47.52#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:55:47.52#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:55:47.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.18:55:47.52#ibcon#*before write, iclass 20, count 0 2006.229.18:55:47.52#ibcon#enter sib2, iclass 20, count 0 2006.229.18:55:47.52#ibcon#flushed, iclass 20, count 0 2006.229.18:55:47.52#ibcon#about to write, iclass 20, count 0 2006.229.18:55:47.52#ibcon#wrote, iclass 20, count 0 2006.229.18:55:47.52#ibcon#about to read 3, iclass 20, count 0 2006.229.18:55:47.56#ibcon#read 3, iclass 20, count 0 2006.229.18:55:47.56#ibcon#about to read 4, iclass 20, count 0 2006.229.18:55:47.56#ibcon#read 4, iclass 20, count 0 2006.229.18:55:47.56#ibcon#about to read 5, iclass 20, count 0 2006.229.18:55:47.56#ibcon#read 5, iclass 20, count 0 2006.229.18:55:47.56#ibcon#about to read 6, iclass 20, count 0 2006.229.18:55:47.56#ibcon#read 6, iclass 20, count 0 2006.229.18:55:47.56#ibcon#end of sib2, iclass 20, count 0 2006.229.18:55:47.56#ibcon#*after write, iclass 20, count 0 2006.229.18:55:47.56#ibcon#*before return 0, iclass 20, count 0 2006.229.18:55:47.56#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:47.56#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:47.56#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:55:47.56#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:55:47.56$vck44/va=2,7 2006.229.18:55:47.56#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.18:55:47.56#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.18:55:47.56#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:47.56#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:47.62#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:47.62#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:47.62#ibcon#enter wrdev, iclass 22, count 2 2006.229.18:55:47.62#ibcon#first serial, iclass 22, count 2 2006.229.18:55:47.62#ibcon#enter sib2, iclass 22, count 2 2006.229.18:55:47.62#ibcon#flushed, iclass 22, count 2 2006.229.18:55:47.62#ibcon#about to write, iclass 22, count 2 2006.229.18:55:47.62#ibcon#wrote, iclass 22, count 2 2006.229.18:55:47.62#ibcon#about to read 3, iclass 22, count 2 2006.229.18:55:47.64#ibcon#read 3, iclass 22, count 2 2006.229.18:55:47.64#ibcon#about to read 4, iclass 22, count 2 2006.229.18:55:47.64#ibcon#read 4, iclass 22, count 2 2006.229.18:55:47.64#ibcon#about to read 5, iclass 22, count 2 2006.229.18:55:47.64#ibcon#read 5, iclass 22, count 2 2006.229.18:55:47.64#ibcon#about to read 6, iclass 22, count 2 2006.229.18:55:47.64#ibcon#read 6, iclass 22, count 2 2006.229.18:55:47.64#ibcon#end of sib2, iclass 22, count 2 2006.229.18:55:47.64#ibcon#*mode == 0, iclass 22, count 2 2006.229.18:55:47.64#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.18:55:47.64#ibcon#[25=AT02-07\r\n] 2006.229.18:55:47.64#ibcon#*before write, iclass 22, count 2 2006.229.18:55:47.64#ibcon#enter sib2, iclass 22, count 2 2006.229.18:55:47.64#ibcon#flushed, iclass 22, count 2 2006.229.18:55:47.64#ibcon#about to write, iclass 22, count 2 2006.229.18:55:47.64#ibcon#wrote, iclass 22, count 2 2006.229.18:55:47.64#ibcon#about to read 3, iclass 22, count 2 2006.229.18:55:47.67#ibcon#read 3, iclass 22, count 2 2006.229.18:55:47.67#ibcon#about to read 4, iclass 22, count 2 2006.229.18:55:47.67#ibcon#read 4, iclass 22, count 2 2006.229.18:55:47.67#ibcon#about to read 5, iclass 22, count 2 2006.229.18:55:47.67#ibcon#read 5, iclass 22, count 2 2006.229.18:55:47.67#ibcon#about to read 6, iclass 22, count 2 2006.229.18:55:47.67#ibcon#read 6, iclass 22, count 2 2006.229.18:55:47.67#ibcon#end of sib2, iclass 22, count 2 2006.229.18:55:47.67#ibcon#*after write, iclass 22, count 2 2006.229.18:55:47.67#ibcon#*before return 0, iclass 22, count 2 2006.229.18:55:47.67#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:47.67#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:47.67#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.18:55:47.67#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:47.67#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:47.79#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:47.79#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:47.79#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:55:47.79#ibcon#first serial, iclass 22, count 0 2006.229.18:55:47.79#ibcon#enter sib2, iclass 22, count 0 2006.229.18:55:47.79#ibcon#flushed, iclass 22, count 0 2006.229.18:55:47.79#ibcon#about to write, iclass 22, count 0 2006.229.18:55:47.79#ibcon#wrote, iclass 22, count 0 2006.229.18:55:47.79#ibcon#about to read 3, iclass 22, count 0 2006.229.18:55:47.81#ibcon#read 3, iclass 22, count 0 2006.229.18:55:47.81#ibcon#about to read 4, iclass 22, count 0 2006.229.18:55:47.81#ibcon#read 4, iclass 22, count 0 2006.229.18:55:47.81#ibcon#about to read 5, iclass 22, count 0 2006.229.18:55:47.81#ibcon#read 5, iclass 22, count 0 2006.229.18:55:47.81#ibcon#about to read 6, iclass 22, count 0 2006.229.18:55:47.81#ibcon#read 6, iclass 22, count 0 2006.229.18:55:47.81#ibcon#end of sib2, iclass 22, count 0 2006.229.18:55:47.81#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:55:47.81#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:55:47.81#ibcon#[25=USB\r\n] 2006.229.18:55:47.81#ibcon#*before write, iclass 22, count 0 2006.229.18:55:47.81#ibcon#enter sib2, iclass 22, count 0 2006.229.18:55:47.81#ibcon#flushed, iclass 22, count 0 2006.229.18:55:47.81#ibcon#about to write, iclass 22, count 0 2006.229.18:55:47.81#ibcon#wrote, iclass 22, count 0 2006.229.18:55:47.81#ibcon#about to read 3, iclass 22, count 0 2006.229.18:55:47.84#ibcon#read 3, iclass 22, count 0 2006.229.18:55:47.84#ibcon#about to read 4, iclass 22, count 0 2006.229.18:55:47.84#ibcon#read 4, iclass 22, count 0 2006.229.18:55:47.84#ibcon#about to read 5, iclass 22, count 0 2006.229.18:55:47.84#ibcon#read 5, iclass 22, count 0 2006.229.18:55:47.84#ibcon#about to read 6, iclass 22, count 0 2006.229.18:55:47.84#ibcon#read 6, iclass 22, count 0 2006.229.18:55:47.84#ibcon#end of sib2, iclass 22, count 0 2006.229.18:55:47.84#ibcon#*after write, iclass 22, count 0 2006.229.18:55:47.84#ibcon#*before return 0, iclass 22, count 0 2006.229.18:55:47.84#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:47.84#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:47.84#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:55:47.84#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:55:47.84$vck44/valo=3,564.99 2006.229.18:55:47.84#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.18:55:47.84#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.18:55:47.84#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:47.84#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:47.84#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:47.84#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:47.84#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:55:47.84#ibcon#first serial, iclass 24, count 0 2006.229.18:55:47.84#ibcon#enter sib2, iclass 24, count 0 2006.229.18:55:47.84#ibcon#flushed, iclass 24, count 0 2006.229.18:55:47.84#ibcon#about to write, iclass 24, count 0 2006.229.18:55:47.84#ibcon#wrote, iclass 24, count 0 2006.229.18:55:47.84#ibcon#about to read 3, iclass 24, count 0 2006.229.18:55:47.86#ibcon#read 3, iclass 24, count 0 2006.229.18:55:47.86#ibcon#about to read 4, iclass 24, count 0 2006.229.18:55:47.86#ibcon#read 4, iclass 24, count 0 2006.229.18:55:47.86#ibcon#about to read 5, iclass 24, count 0 2006.229.18:55:47.86#ibcon#read 5, iclass 24, count 0 2006.229.18:55:47.86#ibcon#about to read 6, iclass 24, count 0 2006.229.18:55:47.86#ibcon#read 6, iclass 24, count 0 2006.229.18:55:47.86#ibcon#end of sib2, iclass 24, count 0 2006.229.18:55:47.86#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:55:47.86#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:55:47.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.18:55:47.86#ibcon#*before write, iclass 24, count 0 2006.229.18:55:47.86#ibcon#enter sib2, iclass 24, count 0 2006.229.18:55:47.86#ibcon#flushed, iclass 24, count 0 2006.229.18:55:47.86#ibcon#about to write, iclass 24, count 0 2006.229.18:55:47.86#ibcon#wrote, iclass 24, count 0 2006.229.18:55:47.86#ibcon#about to read 3, iclass 24, count 0 2006.229.18:55:47.90#ibcon#read 3, iclass 24, count 0 2006.229.18:55:47.90#ibcon#about to read 4, iclass 24, count 0 2006.229.18:55:47.90#ibcon#read 4, iclass 24, count 0 2006.229.18:55:47.90#ibcon#about to read 5, iclass 24, count 0 2006.229.18:55:47.90#ibcon#read 5, iclass 24, count 0 2006.229.18:55:47.90#ibcon#about to read 6, iclass 24, count 0 2006.229.18:55:47.90#ibcon#read 6, iclass 24, count 0 2006.229.18:55:47.90#ibcon#end of sib2, iclass 24, count 0 2006.229.18:55:47.90#ibcon#*after write, iclass 24, count 0 2006.229.18:55:47.90#ibcon#*before return 0, iclass 24, count 0 2006.229.18:55:47.90#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:47.90#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:47.90#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:55:47.90#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:55:47.90$vck44/va=3,6 2006.229.18:55:47.90#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.18:55:47.90#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.18:55:47.90#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:47.90#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:47.96#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:47.96#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:47.96#ibcon#enter wrdev, iclass 26, count 2 2006.229.18:55:47.96#ibcon#first serial, iclass 26, count 2 2006.229.18:55:47.96#ibcon#enter sib2, iclass 26, count 2 2006.229.18:55:47.96#ibcon#flushed, iclass 26, count 2 2006.229.18:55:47.96#ibcon#about to write, iclass 26, count 2 2006.229.18:55:47.96#ibcon#wrote, iclass 26, count 2 2006.229.18:55:47.96#ibcon#about to read 3, iclass 26, count 2 2006.229.18:55:47.98#ibcon#read 3, iclass 26, count 2 2006.229.18:55:47.98#ibcon#about to read 4, iclass 26, count 2 2006.229.18:55:47.98#ibcon#read 4, iclass 26, count 2 2006.229.18:55:47.98#ibcon#about to read 5, iclass 26, count 2 2006.229.18:55:47.98#ibcon#read 5, iclass 26, count 2 2006.229.18:55:47.98#ibcon#about to read 6, iclass 26, count 2 2006.229.18:55:47.98#ibcon#read 6, iclass 26, count 2 2006.229.18:55:47.98#ibcon#end of sib2, iclass 26, count 2 2006.229.18:55:47.98#ibcon#*mode == 0, iclass 26, count 2 2006.229.18:55:47.98#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.18:55:47.98#ibcon#[25=AT03-06\r\n] 2006.229.18:55:47.98#ibcon#*before write, iclass 26, count 2 2006.229.18:55:47.98#ibcon#enter sib2, iclass 26, count 2 2006.229.18:55:47.98#ibcon#flushed, iclass 26, count 2 2006.229.18:55:47.98#ibcon#about to write, iclass 26, count 2 2006.229.18:55:47.98#ibcon#wrote, iclass 26, count 2 2006.229.18:55:47.98#ibcon#about to read 3, iclass 26, count 2 2006.229.18:55:48.01#ibcon#read 3, iclass 26, count 2 2006.229.18:55:48.01#ibcon#about to read 4, iclass 26, count 2 2006.229.18:55:48.01#ibcon#read 4, iclass 26, count 2 2006.229.18:55:48.01#ibcon#about to read 5, iclass 26, count 2 2006.229.18:55:48.01#ibcon#read 5, iclass 26, count 2 2006.229.18:55:48.01#ibcon#about to read 6, iclass 26, count 2 2006.229.18:55:48.01#ibcon#read 6, iclass 26, count 2 2006.229.18:55:48.01#ibcon#end of sib2, iclass 26, count 2 2006.229.18:55:48.01#ibcon#*after write, iclass 26, count 2 2006.229.18:55:48.01#ibcon#*before return 0, iclass 26, count 2 2006.229.18:55:48.01#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:48.01#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:48.01#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.18:55:48.01#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:48.01#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:48.13#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:48.13#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:48.13#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:55:48.13#ibcon#first serial, iclass 26, count 0 2006.229.18:55:48.13#ibcon#enter sib2, iclass 26, count 0 2006.229.18:55:48.13#ibcon#flushed, iclass 26, count 0 2006.229.18:55:48.13#ibcon#about to write, iclass 26, count 0 2006.229.18:55:48.13#ibcon#wrote, iclass 26, count 0 2006.229.18:55:48.13#ibcon#about to read 3, iclass 26, count 0 2006.229.18:55:48.15#ibcon#read 3, iclass 26, count 0 2006.229.18:55:48.15#ibcon#about to read 4, iclass 26, count 0 2006.229.18:55:48.15#ibcon#read 4, iclass 26, count 0 2006.229.18:55:48.15#ibcon#about to read 5, iclass 26, count 0 2006.229.18:55:48.15#ibcon#read 5, iclass 26, count 0 2006.229.18:55:48.15#ibcon#about to read 6, iclass 26, count 0 2006.229.18:55:48.15#ibcon#read 6, iclass 26, count 0 2006.229.18:55:48.15#ibcon#end of sib2, iclass 26, count 0 2006.229.18:55:48.15#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:55:48.15#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:55:48.15#ibcon#[25=USB\r\n] 2006.229.18:55:48.15#ibcon#*before write, iclass 26, count 0 2006.229.18:55:48.15#ibcon#enter sib2, iclass 26, count 0 2006.229.18:55:48.15#ibcon#flushed, iclass 26, count 0 2006.229.18:55:48.15#ibcon#about to write, iclass 26, count 0 2006.229.18:55:48.15#ibcon#wrote, iclass 26, count 0 2006.229.18:55:48.15#ibcon#about to read 3, iclass 26, count 0 2006.229.18:55:48.18#ibcon#read 3, iclass 26, count 0 2006.229.18:55:48.18#ibcon#about to read 4, iclass 26, count 0 2006.229.18:55:48.18#ibcon#read 4, iclass 26, count 0 2006.229.18:55:48.18#ibcon#about to read 5, iclass 26, count 0 2006.229.18:55:48.18#ibcon#read 5, iclass 26, count 0 2006.229.18:55:48.18#ibcon#about to read 6, iclass 26, count 0 2006.229.18:55:48.18#ibcon#read 6, iclass 26, count 0 2006.229.18:55:48.18#ibcon#end of sib2, iclass 26, count 0 2006.229.18:55:48.18#ibcon#*after write, iclass 26, count 0 2006.229.18:55:48.18#ibcon#*before return 0, iclass 26, count 0 2006.229.18:55:48.18#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:48.18#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:48.18#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:55:48.18#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:55:48.18$vck44/valo=4,624.99 2006.229.18:55:48.18#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.18:55:48.18#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.18:55:48.18#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:48.18#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:48.18#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:48.18#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:48.18#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:55:48.18#ibcon#first serial, iclass 28, count 0 2006.229.18:55:48.18#ibcon#enter sib2, iclass 28, count 0 2006.229.18:55:48.18#ibcon#flushed, iclass 28, count 0 2006.229.18:55:48.18#ibcon#about to write, iclass 28, count 0 2006.229.18:55:48.18#ibcon#wrote, iclass 28, count 0 2006.229.18:55:48.18#ibcon#about to read 3, iclass 28, count 0 2006.229.18:55:48.20#ibcon#read 3, iclass 28, count 0 2006.229.18:55:48.20#ibcon#about to read 4, iclass 28, count 0 2006.229.18:55:48.20#ibcon#read 4, iclass 28, count 0 2006.229.18:55:48.20#ibcon#about to read 5, iclass 28, count 0 2006.229.18:55:48.20#ibcon#read 5, iclass 28, count 0 2006.229.18:55:48.20#ibcon#about to read 6, iclass 28, count 0 2006.229.18:55:48.20#ibcon#read 6, iclass 28, count 0 2006.229.18:55:48.20#ibcon#end of sib2, iclass 28, count 0 2006.229.18:55:48.20#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:55:48.20#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:55:48.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.18:55:48.20#ibcon#*before write, iclass 28, count 0 2006.229.18:55:48.20#ibcon#enter sib2, iclass 28, count 0 2006.229.18:55:48.20#ibcon#flushed, iclass 28, count 0 2006.229.18:55:48.20#ibcon#about to write, iclass 28, count 0 2006.229.18:55:48.20#ibcon#wrote, iclass 28, count 0 2006.229.18:55:48.20#ibcon#about to read 3, iclass 28, count 0 2006.229.18:55:48.24#ibcon#read 3, iclass 28, count 0 2006.229.18:55:48.24#ibcon#about to read 4, iclass 28, count 0 2006.229.18:55:48.24#ibcon#read 4, iclass 28, count 0 2006.229.18:55:48.24#ibcon#about to read 5, iclass 28, count 0 2006.229.18:55:48.24#ibcon#read 5, iclass 28, count 0 2006.229.18:55:48.24#ibcon#about to read 6, iclass 28, count 0 2006.229.18:55:48.24#ibcon#read 6, iclass 28, count 0 2006.229.18:55:48.24#ibcon#end of sib2, iclass 28, count 0 2006.229.18:55:48.24#ibcon#*after write, iclass 28, count 0 2006.229.18:55:48.24#ibcon#*before return 0, iclass 28, count 0 2006.229.18:55:48.24#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:48.24#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:48.24#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:55:48.24#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:55:48.24$vck44/va=4,7 2006.229.18:55:48.24#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.18:55:48.24#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.18:55:48.24#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:48.24#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:48.30#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:48.30#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:48.30#ibcon#enter wrdev, iclass 30, count 2 2006.229.18:55:48.30#ibcon#first serial, iclass 30, count 2 2006.229.18:55:48.30#ibcon#enter sib2, iclass 30, count 2 2006.229.18:55:48.30#ibcon#flushed, iclass 30, count 2 2006.229.18:55:48.30#ibcon#about to write, iclass 30, count 2 2006.229.18:55:48.30#ibcon#wrote, iclass 30, count 2 2006.229.18:55:48.30#ibcon#about to read 3, iclass 30, count 2 2006.229.18:55:48.32#ibcon#read 3, iclass 30, count 2 2006.229.18:55:48.32#ibcon#about to read 4, iclass 30, count 2 2006.229.18:55:48.32#ibcon#read 4, iclass 30, count 2 2006.229.18:55:48.32#ibcon#about to read 5, iclass 30, count 2 2006.229.18:55:48.32#ibcon#read 5, iclass 30, count 2 2006.229.18:55:48.32#ibcon#about to read 6, iclass 30, count 2 2006.229.18:55:48.32#ibcon#read 6, iclass 30, count 2 2006.229.18:55:48.32#ibcon#end of sib2, iclass 30, count 2 2006.229.18:55:48.32#ibcon#*mode == 0, iclass 30, count 2 2006.229.18:55:48.32#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.18:55:48.32#ibcon#[25=AT04-07\r\n] 2006.229.18:55:48.32#ibcon#*before write, iclass 30, count 2 2006.229.18:55:48.32#ibcon#enter sib2, iclass 30, count 2 2006.229.18:55:48.32#ibcon#flushed, iclass 30, count 2 2006.229.18:55:48.32#ibcon#about to write, iclass 30, count 2 2006.229.18:55:48.32#ibcon#wrote, iclass 30, count 2 2006.229.18:55:48.32#ibcon#about to read 3, iclass 30, count 2 2006.229.18:55:48.35#ibcon#read 3, iclass 30, count 2 2006.229.18:55:48.35#ibcon#about to read 4, iclass 30, count 2 2006.229.18:55:48.35#ibcon#read 4, iclass 30, count 2 2006.229.18:55:48.35#ibcon#about to read 5, iclass 30, count 2 2006.229.18:55:48.35#ibcon#read 5, iclass 30, count 2 2006.229.18:55:48.35#ibcon#about to read 6, iclass 30, count 2 2006.229.18:55:48.35#ibcon#read 6, iclass 30, count 2 2006.229.18:55:48.35#ibcon#end of sib2, iclass 30, count 2 2006.229.18:55:48.35#ibcon#*after write, iclass 30, count 2 2006.229.18:55:48.35#ibcon#*before return 0, iclass 30, count 2 2006.229.18:55:48.35#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:48.35#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:48.35#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.18:55:48.35#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:48.35#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:48.45#abcon#<5=/07 1.6 3.1 26.141001001.2\r\n> 2006.229.18:55:48.47#abcon#{5=INTERFACE CLEAR} 2006.229.18:55:48.47#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:48.47#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:48.47#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:55:48.47#ibcon#first serial, iclass 30, count 0 2006.229.18:55:48.47#ibcon#enter sib2, iclass 30, count 0 2006.229.18:55:48.47#ibcon#flushed, iclass 30, count 0 2006.229.18:55:48.47#ibcon#about to write, iclass 30, count 0 2006.229.18:55:48.47#ibcon#wrote, iclass 30, count 0 2006.229.18:55:48.47#ibcon#about to read 3, iclass 30, count 0 2006.229.18:55:48.49#ibcon#read 3, iclass 30, count 0 2006.229.18:55:48.49#ibcon#about to read 4, iclass 30, count 0 2006.229.18:55:48.49#ibcon#read 4, iclass 30, count 0 2006.229.18:55:48.49#ibcon#about to read 5, iclass 30, count 0 2006.229.18:55:48.49#ibcon#read 5, iclass 30, count 0 2006.229.18:55:48.49#ibcon#about to read 6, iclass 30, count 0 2006.229.18:55:48.49#ibcon#read 6, iclass 30, count 0 2006.229.18:55:48.49#ibcon#end of sib2, iclass 30, count 0 2006.229.18:55:48.49#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:55:48.49#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:55:48.49#ibcon#[25=USB\r\n] 2006.229.18:55:48.49#ibcon#*before write, iclass 30, count 0 2006.229.18:55:48.49#ibcon#enter sib2, iclass 30, count 0 2006.229.18:55:48.49#ibcon#flushed, iclass 30, count 0 2006.229.18:55:48.49#ibcon#about to write, iclass 30, count 0 2006.229.18:55:48.49#ibcon#wrote, iclass 30, count 0 2006.229.18:55:48.49#ibcon#about to read 3, iclass 30, count 0 2006.229.18:55:48.52#ibcon#read 3, iclass 30, count 0 2006.229.18:55:48.52#ibcon#about to read 4, iclass 30, count 0 2006.229.18:55:48.52#ibcon#read 4, iclass 30, count 0 2006.229.18:55:48.52#ibcon#about to read 5, iclass 30, count 0 2006.229.18:55:48.52#ibcon#read 5, iclass 30, count 0 2006.229.18:55:48.52#ibcon#about to read 6, iclass 30, count 0 2006.229.18:55:48.52#ibcon#read 6, iclass 30, count 0 2006.229.18:55:48.52#ibcon#end of sib2, iclass 30, count 0 2006.229.18:55:48.52#ibcon#*after write, iclass 30, count 0 2006.229.18:55:48.52#ibcon#*before return 0, iclass 30, count 0 2006.229.18:55:48.52#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:48.52#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:48.52#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:55:48.52#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:55:48.52$vck44/valo=5,734.99 2006.229.18:55:48.52#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.18:55:48.52#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.18:55:48.52#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:48.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:48.52#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:48.52#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:48.52#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:55:48.52#ibcon#first serial, iclass 36, count 0 2006.229.18:55:48.52#ibcon#enter sib2, iclass 36, count 0 2006.229.18:55:48.52#ibcon#flushed, iclass 36, count 0 2006.229.18:55:48.52#ibcon#about to write, iclass 36, count 0 2006.229.18:55:48.52#ibcon#wrote, iclass 36, count 0 2006.229.18:55:48.52#ibcon#about to read 3, iclass 36, count 0 2006.229.18:55:48.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:55:48.54#ibcon#read 3, iclass 36, count 0 2006.229.18:55:48.54#ibcon#about to read 4, iclass 36, count 0 2006.229.18:55:48.54#ibcon#read 4, iclass 36, count 0 2006.229.18:55:48.54#ibcon#about to read 5, iclass 36, count 0 2006.229.18:55:48.54#ibcon#read 5, iclass 36, count 0 2006.229.18:55:48.54#ibcon#about to read 6, iclass 36, count 0 2006.229.18:55:48.54#ibcon#read 6, iclass 36, count 0 2006.229.18:55:48.54#ibcon#end of sib2, iclass 36, count 0 2006.229.18:55:48.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:55:48.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:55:48.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.18:55:48.54#ibcon#*before write, iclass 36, count 0 2006.229.18:55:48.54#ibcon#enter sib2, iclass 36, count 0 2006.229.18:55:48.54#ibcon#flushed, iclass 36, count 0 2006.229.18:55:48.54#ibcon#about to write, iclass 36, count 0 2006.229.18:55:48.54#ibcon#wrote, iclass 36, count 0 2006.229.18:55:48.54#ibcon#about to read 3, iclass 36, count 0 2006.229.18:55:48.58#ibcon#read 3, iclass 36, count 0 2006.229.18:55:48.58#ibcon#about to read 4, iclass 36, count 0 2006.229.18:55:48.58#ibcon#read 4, iclass 36, count 0 2006.229.18:55:48.58#ibcon#about to read 5, iclass 36, count 0 2006.229.18:55:48.58#ibcon#read 5, iclass 36, count 0 2006.229.18:55:48.58#ibcon#about to read 6, iclass 36, count 0 2006.229.18:55:48.58#ibcon#read 6, iclass 36, count 0 2006.229.18:55:48.58#ibcon#end of sib2, iclass 36, count 0 2006.229.18:55:48.58#ibcon#*after write, iclass 36, count 0 2006.229.18:55:48.58#ibcon#*before return 0, iclass 36, count 0 2006.229.18:55:48.58#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:48.58#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:48.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:55:48.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:55:48.58$vck44/va=5,4 2006.229.18:55:48.58#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.18:55:48.58#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.18:55:48.58#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:48.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:48.64#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:48.64#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:48.64#ibcon#enter wrdev, iclass 38, count 2 2006.229.18:55:48.64#ibcon#first serial, iclass 38, count 2 2006.229.18:55:48.64#ibcon#enter sib2, iclass 38, count 2 2006.229.18:55:48.64#ibcon#flushed, iclass 38, count 2 2006.229.18:55:48.64#ibcon#about to write, iclass 38, count 2 2006.229.18:55:48.64#ibcon#wrote, iclass 38, count 2 2006.229.18:55:48.64#ibcon#about to read 3, iclass 38, count 2 2006.229.18:55:48.66#ibcon#read 3, iclass 38, count 2 2006.229.18:55:48.66#ibcon#about to read 4, iclass 38, count 2 2006.229.18:55:48.66#ibcon#read 4, iclass 38, count 2 2006.229.18:55:48.66#ibcon#about to read 5, iclass 38, count 2 2006.229.18:55:48.66#ibcon#read 5, iclass 38, count 2 2006.229.18:55:48.66#ibcon#about to read 6, iclass 38, count 2 2006.229.18:55:48.66#ibcon#read 6, iclass 38, count 2 2006.229.18:55:48.66#ibcon#end of sib2, iclass 38, count 2 2006.229.18:55:48.66#ibcon#*mode == 0, iclass 38, count 2 2006.229.18:55:48.66#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.18:55:48.66#ibcon#[25=AT05-04\r\n] 2006.229.18:55:48.66#ibcon#*before write, iclass 38, count 2 2006.229.18:55:48.66#ibcon#enter sib2, iclass 38, count 2 2006.229.18:55:48.66#ibcon#flushed, iclass 38, count 2 2006.229.18:55:48.66#ibcon#about to write, iclass 38, count 2 2006.229.18:55:48.66#ibcon#wrote, iclass 38, count 2 2006.229.18:55:48.66#ibcon#about to read 3, iclass 38, count 2 2006.229.18:55:48.69#ibcon#read 3, iclass 38, count 2 2006.229.18:55:48.69#ibcon#about to read 4, iclass 38, count 2 2006.229.18:55:48.69#ibcon#read 4, iclass 38, count 2 2006.229.18:55:48.69#ibcon#about to read 5, iclass 38, count 2 2006.229.18:55:48.69#ibcon#read 5, iclass 38, count 2 2006.229.18:55:48.69#ibcon#about to read 6, iclass 38, count 2 2006.229.18:55:48.69#ibcon#read 6, iclass 38, count 2 2006.229.18:55:48.69#ibcon#end of sib2, iclass 38, count 2 2006.229.18:55:48.69#ibcon#*after write, iclass 38, count 2 2006.229.18:55:48.69#ibcon#*before return 0, iclass 38, count 2 2006.229.18:55:48.69#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:48.69#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:48.69#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.18:55:48.69#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:48.69#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:48.81#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:48.81#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:48.81#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:55:48.81#ibcon#first serial, iclass 38, count 0 2006.229.18:55:48.81#ibcon#enter sib2, iclass 38, count 0 2006.229.18:55:48.81#ibcon#flushed, iclass 38, count 0 2006.229.18:55:48.81#ibcon#about to write, iclass 38, count 0 2006.229.18:55:48.81#ibcon#wrote, iclass 38, count 0 2006.229.18:55:48.81#ibcon#about to read 3, iclass 38, count 0 2006.229.18:55:48.83#ibcon#read 3, iclass 38, count 0 2006.229.18:55:48.83#ibcon#about to read 4, iclass 38, count 0 2006.229.18:55:48.83#ibcon#read 4, iclass 38, count 0 2006.229.18:55:48.83#ibcon#about to read 5, iclass 38, count 0 2006.229.18:55:48.83#ibcon#read 5, iclass 38, count 0 2006.229.18:55:48.83#ibcon#about to read 6, iclass 38, count 0 2006.229.18:55:48.83#ibcon#read 6, iclass 38, count 0 2006.229.18:55:48.83#ibcon#end of sib2, iclass 38, count 0 2006.229.18:55:48.83#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:55:48.83#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:55:48.83#ibcon#[25=USB\r\n] 2006.229.18:55:48.83#ibcon#*before write, iclass 38, count 0 2006.229.18:55:48.83#ibcon#enter sib2, iclass 38, count 0 2006.229.18:55:48.83#ibcon#flushed, iclass 38, count 0 2006.229.18:55:48.83#ibcon#about to write, iclass 38, count 0 2006.229.18:55:48.83#ibcon#wrote, iclass 38, count 0 2006.229.18:55:48.83#ibcon#about to read 3, iclass 38, count 0 2006.229.18:55:48.86#ibcon#read 3, iclass 38, count 0 2006.229.18:55:48.86#ibcon#about to read 4, iclass 38, count 0 2006.229.18:55:48.86#ibcon#read 4, iclass 38, count 0 2006.229.18:55:48.86#ibcon#about to read 5, iclass 38, count 0 2006.229.18:55:48.86#ibcon#read 5, iclass 38, count 0 2006.229.18:55:48.86#ibcon#about to read 6, iclass 38, count 0 2006.229.18:55:48.86#ibcon#read 6, iclass 38, count 0 2006.229.18:55:48.86#ibcon#end of sib2, iclass 38, count 0 2006.229.18:55:48.86#ibcon#*after write, iclass 38, count 0 2006.229.18:55:48.86#ibcon#*before return 0, iclass 38, count 0 2006.229.18:55:48.86#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:48.86#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:48.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:55:48.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:55:48.86$vck44/valo=6,814.99 2006.229.18:55:48.86#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.18:55:48.86#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.18:55:48.86#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:48.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:48.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:48.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:48.86#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:55:48.86#ibcon#first serial, iclass 40, count 0 2006.229.18:55:48.86#ibcon#enter sib2, iclass 40, count 0 2006.229.18:55:48.86#ibcon#flushed, iclass 40, count 0 2006.229.18:55:48.86#ibcon#about to write, iclass 40, count 0 2006.229.18:55:48.86#ibcon#wrote, iclass 40, count 0 2006.229.18:55:48.86#ibcon#about to read 3, iclass 40, count 0 2006.229.18:55:48.88#ibcon#read 3, iclass 40, count 0 2006.229.18:55:48.88#ibcon#about to read 4, iclass 40, count 0 2006.229.18:55:48.88#ibcon#read 4, iclass 40, count 0 2006.229.18:55:48.88#ibcon#about to read 5, iclass 40, count 0 2006.229.18:55:48.88#ibcon#read 5, iclass 40, count 0 2006.229.18:55:48.88#ibcon#about to read 6, iclass 40, count 0 2006.229.18:55:48.88#ibcon#read 6, iclass 40, count 0 2006.229.18:55:48.88#ibcon#end of sib2, iclass 40, count 0 2006.229.18:55:48.88#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:55:48.88#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:55:48.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.18:55:48.88#ibcon#*before write, iclass 40, count 0 2006.229.18:55:48.88#ibcon#enter sib2, iclass 40, count 0 2006.229.18:55:48.88#ibcon#flushed, iclass 40, count 0 2006.229.18:55:48.88#ibcon#about to write, iclass 40, count 0 2006.229.18:55:48.88#ibcon#wrote, iclass 40, count 0 2006.229.18:55:48.88#ibcon#about to read 3, iclass 40, count 0 2006.229.18:55:48.92#ibcon#read 3, iclass 40, count 0 2006.229.18:55:48.92#ibcon#about to read 4, iclass 40, count 0 2006.229.18:55:48.92#ibcon#read 4, iclass 40, count 0 2006.229.18:55:48.92#ibcon#about to read 5, iclass 40, count 0 2006.229.18:55:48.92#ibcon#read 5, iclass 40, count 0 2006.229.18:55:48.92#ibcon#about to read 6, iclass 40, count 0 2006.229.18:55:48.92#ibcon#read 6, iclass 40, count 0 2006.229.18:55:48.92#ibcon#end of sib2, iclass 40, count 0 2006.229.18:55:48.92#ibcon#*after write, iclass 40, count 0 2006.229.18:55:48.92#ibcon#*before return 0, iclass 40, count 0 2006.229.18:55:48.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:48.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:48.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:55:48.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:55:48.92$vck44/va=6,4 2006.229.18:55:48.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.18:55:48.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.18:55:48.92#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:48.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:48.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:48.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:48.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.18:55:48.98#ibcon#first serial, iclass 4, count 2 2006.229.18:55:48.98#ibcon#enter sib2, iclass 4, count 2 2006.229.18:55:48.98#ibcon#flushed, iclass 4, count 2 2006.229.18:55:48.98#ibcon#about to write, iclass 4, count 2 2006.229.18:55:48.98#ibcon#wrote, iclass 4, count 2 2006.229.18:55:48.98#ibcon#about to read 3, iclass 4, count 2 2006.229.18:55:49.00#ibcon#read 3, iclass 4, count 2 2006.229.18:55:49.00#ibcon#about to read 4, iclass 4, count 2 2006.229.18:55:49.00#ibcon#read 4, iclass 4, count 2 2006.229.18:55:49.00#ibcon#about to read 5, iclass 4, count 2 2006.229.18:55:49.00#ibcon#read 5, iclass 4, count 2 2006.229.18:55:49.00#ibcon#about to read 6, iclass 4, count 2 2006.229.18:55:49.00#ibcon#read 6, iclass 4, count 2 2006.229.18:55:49.00#ibcon#end of sib2, iclass 4, count 2 2006.229.18:55:49.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.18:55:49.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.18:55:49.00#ibcon#[25=AT06-04\r\n] 2006.229.18:55:49.00#ibcon#*before write, iclass 4, count 2 2006.229.18:55:49.00#ibcon#enter sib2, iclass 4, count 2 2006.229.18:55:49.00#ibcon#flushed, iclass 4, count 2 2006.229.18:55:49.00#ibcon#about to write, iclass 4, count 2 2006.229.18:55:49.00#ibcon#wrote, iclass 4, count 2 2006.229.18:55:49.00#ibcon#about to read 3, iclass 4, count 2 2006.229.18:55:49.03#ibcon#read 3, iclass 4, count 2 2006.229.18:55:49.03#ibcon#about to read 4, iclass 4, count 2 2006.229.18:55:49.03#ibcon#read 4, iclass 4, count 2 2006.229.18:55:49.03#ibcon#about to read 5, iclass 4, count 2 2006.229.18:55:49.03#ibcon#read 5, iclass 4, count 2 2006.229.18:55:49.03#ibcon#about to read 6, iclass 4, count 2 2006.229.18:55:49.03#ibcon#read 6, iclass 4, count 2 2006.229.18:55:49.03#ibcon#end of sib2, iclass 4, count 2 2006.229.18:55:49.03#ibcon#*after write, iclass 4, count 2 2006.229.18:55:49.03#ibcon#*before return 0, iclass 4, count 2 2006.229.18:55:49.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:49.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:49.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.18:55:49.03#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:49.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:49.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:49.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:49.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:55:49.15#ibcon#first serial, iclass 4, count 0 2006.229.18:55:49.15#ibcon#enter sib2, iclass 4, count 0 2006.229.18:55:49.15#ibcon#flushed, iclass 4, count 0 2006.229.18:55:49.15#ibcon#about to write, iclass 4, count 0 2006.229.18:55:49.15#ibcon#wrote, iclass 4, count 0 2006.229.18:55:49.15#ibcon#about to read 3, iclass 4, count 0 2006.229.18:55:49.17#ibcon#read 3, iclass 4, count 0 2006.229.18:55:49.17#ibcon#about to read 4, iclass 4, count 0 2006.229.18:55:49.17#ibcon#read 4, iclass 4, count 0 2006.229.18:55:49.17#ibcon#about to read 5, iclass 4, count 0 2006.229.18:55:49.17#ibcon#read 5, iclass 4, count 0 2006.229.18:55:49.17#ibcon#about to read 6, iclass 4, count 0 2006.229.18:55:49.17#ibcon#read 6, iclass 4, count 0 2006.229.18:55:49.17#ibcon#end of sib2, iclass 4, count 0 2006.229.18:55:49.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:55:49.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:55:49.17#ibcon#[25=USB\r\n] 2006.229.18:55:49.17#ibcon#*before write, iclass 4, count 0 2006.229.18:55:49.17#ibcon#enter sib2, iclass 4, count 0 2006.229.18:55:49.17#ibcon#flushed, iclass 4, count 0 2006.229.18:55:49.17#ibcon#about to write, iclass 4, count 0 2006.229.18:55:49.17#ibcon#wrote, iclass 4, count 0 2006.229.18:55:49.17#ibcon#about to read 3, iclass 4, count 0 2006.229.18:55:49.20#ibcon#read 3, iclass 4, count 0 2006.229.18:55:49.20#ibcon#about to read 4, iclass 4, count 0 2006.229.18:55:49.20#ibcon#read 4, iclass 4, count 0 2006.229.18:55:49.20#ibcon#about to read 5, iclass 4, count 0 2006.229.18:55:49.20#ibcon#read 5, iclass 4, count 0 2006.229.18:55:49.20#ibcon#about to read 6, iclass 4, count 0 2006.229.18:55:49.20#ibcon#read 6, iclass 4, count 0 2006.229.18:55:49.20#ibcon#end of sib2, iclass 4, count 0 2006.229.18:55:49.20#ibcon#*after write, iclass 4, count 0 2006.229.18:55:49.20#ibcon#*before return 0, iclass 4, count 0 2006.229.18:55:49.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:49.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:49.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:55:49.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:55:49.20$vck44/valo=7,864.99 2006.229.18:55:49.20#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.18:55:49.20#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.18:55:49.20#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:49.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:49.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:49.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:49.20#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:55:49.20#ibcon#first serial, iclass 6, count 0 2006.229.18:55:49.20#ibcon#enter sib2, iclass 6, count 0 2006.229.18:55:49.20#ibcon#flushed, iclass 6, count 0 2006.229.18:55:49.20#ibcon#about to write, iclass 6, count 0 2006.229.18:55:49.20#ibcon#wrote, iclass 6, count 0 2006.229.18:55:49.20#ibcon#about to read 3, iclass 6, count 0 2006.229.18:55:49.22#ibcon#read 3, iclass 6, count 0 2006.229.18:55:49.22#ibcon#about to read 4, iclass 6, count 0 2006.229.18:55:49.22#ibcon#read 4, iclass 6, count 0 2006.229.18:55:49.22#ibcon#about to read 5, iclass 6, count 0 2006.229.18:55:49.22#ibcon#read 5, iclass 6, count 0 2006.229.18:55:49.22#ibcon#about to read 6, iclass 6, count 0 2006.229.18:55:49.22#ibcon#read 6, iclass 6, count 0 2006.229.18:55:49.22#ibcon#end of sib2, iclass 6, count 0 2006.229.18:55:49.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:55:49.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:55:49.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.18:55:49.22#ibcon#*before write, iclass 6, count 0 2006.229.18:55:49.22#ibcon#enter sib2, iclass 6, count 0 2006.229.18:55:49.22#ibcon#flushed, iclass 6, count 0 2006.229.18:55:49.22#ibcon#about to write, iclass 6, count 0 2006.229.18:55:49.22#ibcon#wrote, iclass 6, count 0 2006.229.18:55:49.22#ibcon#about to read 3, iclass 6, count 0 2006.229.18:55:49.26#ibcon#read 3, iclass 6, count 0 2006.229.18:55:49.26#ibcon#about to read 4, iclass 6, count 0 2006.229.18:55:49.26#ibcon#read 4, iclass 6, count 0 2006.229.18:55:49.26#ibcon#about to read 5, iclass 6, count 0 2006.229.18:55:49.26#ibcon#read 5, iclass 6, count 0 2006.229.18:55:49.26#ibcon#about to read 6, iclass 6, count 0 2006.229.18:55:49.26#ibcon#read 6, iclass 6, count 0 2006.229.18:55:49.26#ibcon#end of sib2, iclass 6, count 0 2006.229.18:55:49.26#ibcon#*after write, iclass 6, count 0 2006.229.18:55:49.26#ibcon#*before return 0, iclass 6, count 0 2006.229.18:55:49.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:49.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:49.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:55:49.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:55:49.26$vck44/va=7,5 2006.229.18:55:49.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.18:55:49.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.18:55:49.26#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:49.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:49.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:49.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:49.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.18:55:49.32#ibcon#first serial, iclass 10, count 2 2006.229.18:55:49.32#ibcon#enter sib2, iclass 10, count 2 2006.229.18:55:49.32#ibcon#flushed, iclass 10, count 2 2006.229.18:55:49.32#ibcon#about to write, iclass 10, count 2 2006.229.18:55:49.32#ibcon#wrote, iclass 10, count 2 2006.229.18:55:49.32#ibcon#about to read 3, iclass 10, count 2 2006.229.18:55:49.34#ibcon#read 3, iclass 10, count 2 2006.229.18:55:49.34#ibcon#about to read 4, iclass 10, count 2 2006.229.18:55:49.34#ibcon#read 4, iclass 10, count 2 2006.229.18:55:49.34#ibcon#about to read 5, iclass 10, count 2 2006.229.18:55:49.34#ibcon#read 5, iclass 10, count 2 2006.229.18:55:49.34#ibcon#about to read 6, iclass 10, count 2 2006.229.18:55:49.34#ibcon#read 6, iclass 10, count 2 2006.229.18:55:49.34#ibcon#end of sib2, iclass 10, count 2 2006.229.18:55:49.34#ibcon#*mode == 0, iclass 10, count 2 2006.229.18:55:49.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.18:55:49.34#ibcon#[25=AT07-05\r\n] 2006.229.18:55:49.34#ibcon#*before write, iclass 10, count 2 2006.229.18:55:49.34#ibcon#enter sib2, iclass 10, count 2 2006.229.18:55:49.34#ibcon#flushed, iclass 10, count 2 2006.229.18:55:49.34#ibcon#about to write, iclass 10, count 2 2006.229.18:55:49.34#ibcon#wrote, iclass 10, count 2 2006.229.18:55:49.34#ibcon#about to read 3, iclass 10, count 2 2006.229.18:55:49.37#ibcon#read 3, iclass 10, count 2 2006.229.18:55:49.37#ibcon#about to read 4, iclass 10, count 2 2006.229.18:55:49.37#ibcon#read 4, iclass 10, count 2 2006.229.18:55:49.37#ibcon#about to read 5, iclass 10, count 2 2006.229.18:55:49.37#ibcon#read 5, iclass 10, count 2 2006.229.18:55:49.37#ibcon#about to read 6, iclass 10, count 2 2006.229.18:55:49.37#ibcon#read 6, iclass 10, count 2 2006.229.18:55:49.37#ibcon#end of sib2, iclass 10, count 2 2006.229.18:55:49.37#ibcon#*after write, iclass 10, count 2 2006.229.18:55:49.37#ibcon#*before return 0, iclass 10, count 2 2006.229.18:55:49.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:49.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:49.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.18:55:49.37#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:49.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:49.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:49.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:49.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:55:49.49#ibcon#first serial, iclass 10, count 0 2006.229.18:55:49.49#ibcon#enter sib2, iclass 10, count 0 2006.229.18:55:49.49#ibcon#flushed, iclass 10, count 0 2006.229.18:55:49.49#ibcon#about to write, iclass 10, count 0 2006.229.18:55:49.49#ibcon#wrote, iclass 10, count 0 2006.229.18:55:49.49#ibcon#about to read 3, iclass 10, count 0 2006.229.18:55:49.51#ibcon#read 3, iclass 10, count 0 2006.229.18:55:49.51#ibcon#about to read 4, iclass 10, count 0 2006.229.18:55:49.51#ibcon#read 4, iclass 10, count 0 2006.229.18:55:49.51#ibcon#about to read 5, iclass 10, count 0 2006.229.18:55:49.51#ibcon#read 5, iclass 10, count 0 2006.229.18:55:49.51#ibcon#about to read 6, iclass 10, count 0 2006.229.18:55:49.51#ibcon#read 6, iclass 10, count 0 2006.229.18:55:49.51#ibcon#end of sib2, iclass 10, count 0 2006.229.18:55:49.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:55:49.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:55:49.51#ibcon#[25=USB\r\n] 2006.229.18:55:49.51#ibcon#*before write, iclass 10, count 0 2006.229.18:55:49.51#ibcon#enter sib2, iclass 10, count 0 2006.229.18:55:49.51#ibcon#flushed, iclass 10, count 0 2006.229.18:55:49.51#ibcon#about to write, iclass 10, count 0 2006.229.18:55:49.51#ibcon#wrote, iclass 10, count 0 2006.229.18:55:49.51#ibcon#about to read 3, iclass 10, count 0 2006.229.18:55:49.54#ibcon#read 3, iclass 10, count 0 2006.229.18:55:49.54#ibcon#about to read 4, iclass 10, count 0 2006.229.18:55:49.54#ibcon#read 4, iclass 10, count 0 2006.229.18:55:49.54#ibcon#about to read 5, iclass 10, count 0 2006.229.18:55:49.54#ibcon#read 5, iclass 10, count 0 2006.229.18:55:49.54#ibcon#about to read 6, iclass 10, count 0 2006.229.18:55:49.54#ibcon#read 6, iclass 10, count 0 2006.229.18:55:49.54#ibcon#end of sib2, iclass 10, count 0 2006.229.18:55:49.54#ibcon#*after write, iclass 10, count 0 2006.229.18:55:49.54#ibcon#*before return 0, iclass 10, count 0 2006.229.18:55:49.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:49.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:49.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:55:49.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:55:49.54$vck44/valo=8,884.99 2006.229.18:55:49.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:55:49.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:55:49.54#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:49.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:49.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:49.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:49.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:55:49.54#ibcon#first serial, iclass 12, count 0 2006.229.18:55:49.54#ibcon#enter sib2, iclass 12, count 0 2006.229.18:55:49.54#ibcon#flushed, iclass 12, count 0 2006.229.18:55:49.54#ibcon#about to write, iclass 12, count 0 2006.229.18:55:49.54#ibcon#wrote, iclass 12, count 0 2006.229.18:55:49.54#ibcon#about to read 3, iclass 12, count 0 2006.229.18:55:49.56#ibcon#read 3, iclass 12, count 0 2006.229.18:55:49.56#ibcon#about to read 4, iclass 12, count 0 2006.229.18:55:49.56#ibcon#read 4, iclass 12, count 0 2006.229.18:55:49.56#ibcon#about to read 5, iclass 12, count 0 2006.229.18:55:49.56#ibcon#read 5, iclass 12, count 0 2006.229.18:55:49.56#ibcon#about to read 6, iclass 12, count 0 2006.229.18:55:49.56#ibcon#read 6, iclass 12, count 0 2006.229.18:55:49.56#ibcon#end of sib2, iclass 12, count 0 2006.229.18:55:49.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:55:49.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:55:49.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.18:55:49.56#ibcon#*before write, iclass 12, count 0 2006.229.18:55:49.56#ibcon#enter sib2, iclass 12, count 0 2006.229.18:55:49.56#ibcon#flushed, iclass 12, count 0 2006.229.18:55:49.56#ibcon#about to write, iclass 12, count 0 2006.229.18:55:49.56#ibcon#wrote, iclass 12, count 0 2006.229.18:55:49.56#ibcon#about to read 3, iclass 12, count 0 2006.229.18:55:49.60#ibcon#read 3, iclass 12, count 0 2006.229.18:55:49.60#ibcon#about to read 4, iclass 12, count 0 2006.229.18:55:49.60#ibcon#read 4, iclass 12, count 0 2006.229.18:55:49.60#ibcon#about to read 5, iclass 12, count 0 2006.229.18:55:49.60#ibcon#read 5, iclass 12, count 0 2006.229.18:55:49.60#ibcon#about to read 6, iclass 12, count 0 2006.229.18:55:49.60#ibcon#read 6, iclass 12, count 0 2006.229.18:55:49.60#ibcon#end of sib2, iclass 12, count 0 2006.229.18:55:49.60#ibcon#*after write, iclass 12, count 0 2006.229.18:55:49.60#ibcon#*before return 0, iclass 12, count 0 2006.229.18:55:49.60#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:49.60#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:49.60#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:55:49.60#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:55:49.60$vck44/va=8,6 2006.229.18:55:49.60#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.18:55:49.60#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.18:55:49.60#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:49.60#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:55:49.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:55:49.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:55:49.66#ibcon#enter wrdev, iclass 14, count 2 2006.229.18:55:49.66#ibcon#first serial, iclass 14, count 2 2006.229.18:55:49.66#ibcon#enter sib2, iclass 14, count 2 2006.229.18:55:49.66#ibcon#flushed, iclass 14, count 2 2006.229.18:55:49.66#ibcon#about to write, iclass 14, count 2 2006.229.18:55:49.66#ibcon#wrote, iclass 14, count 2 2006.229.18:55:49.66#ibcon#about to read 3, iclass 14, count 2 2006.229.18:55:49.68#ibcon#read 3, iclass 14, count 2 2006.229.18:55:49.68#ibcon#about to read 4, iclass 14, count 2 2006.229.18:55:49.68#ibcon#read 4, iclass 14, count 2 2006.229.18:55:49.68#ibcon#about to read 5, iclass 14, count 2 2006.229.18:55:49.68#ibcon#read 5, iclass 14, count 2 2006.229.18:55:49.68#ibcon#about to read 6, iclass 14, count 2 2006.229.18:55:49.68#ibcon#read 6, iclass 14, count 2 2006.229.18:55:49.68#ibcon#end of sib2, iclass 14, count 2 2006.229.18:55:49.68#ibcon#*mode == 0, iclass 14, count 2 2006.229.18:55:49.68#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.18:55:49.68#ibcon#[25=AT08-06\r\n] 2006.229.18:55:49.68#ibcon#*before write, iclass 14, count 2 2006.229.18:55:49.68#ibcon#enter sib2, iclass 14, count 2 2006.229.18:55:49.68#ibcon#flushed, iclass 14, count 2 2006.229.18:55:49.68#ibcon#about to write, iclass 14, count 2 2006.229.18:55:49.68#ibcon#wrote, iclass 14, count 2 2006.229.18:55:49.68#ibcon#about to read 3, iclass 14, count 2 2006.229.18:55:49.71#ibcon#read 3, iclass 14, count 2 2006.229.18:55:49.71#ibcon#about to read 4, iclass 14, count 2 2006.229.18:55:49.71#ibcon#read 4, iclass 14, count 2 2006.229.18:55:49.71#ibcon#about to read 5, iclass 14, count 2 2006.229.18:55:49.71#ibcon#read 5, iclass 14, count 2 2006.229.18:55:49.71#ibcon#about to read 6, iclass 14, count 2 2006.229.18:55:49.71#ibcon#read 6, iclass 14, count 2 2006.229.18:55:49.71#ibcon#end of sib2, iclass 14, count 2 2006.229.18:55:49.71#ibcon#*after write, iclass 14, count 2 2006.229.18:55:49.71#ibcon#*before return 0, iclass 14, count 2 2006.229.18:55:49.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:55:49.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.18:55:49.71#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.18:55:49.71#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:49.71#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:55:49.83#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:55:49.83#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:55:49.83#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:55:49.83#ibcon#first serial, iclass 14, count 0 2006.229.18:55:49.83#ibcon#enter sib2, iclass 14, count 0 2006.229.18:55:49.83#ibcon#flushed, iclass 14, count 0 2006.229.18:55:49.83#ibcon#about to write, iclass 14, count 0 2006.229.18:55:49.83#ibcon#wrote, iclass 14, count 0 2006.229.18:55:49.83#ibcon#about to read 3, iclass 14, count 0 2006.229.18:55:49.85#ibcon#read 3, iclass 14, count 0 2006.229.18:55:49.85#ibcon#about to read 4, iclass 14, count 0 2006.229.18:55:49.85#ibcon#read 4, iclass 14, count 0 2006.229.18:55:49.85#ibcon#about to read 5, iclass 14, count 0 2006.229.18:55:49.85#ibcon#read 5, iclass 14, count 0 2006.229.18:55:49.85#ibcon#about to read 6, iclass 14, count 0 2006.229.18:55:49.85#ibcon#read 6, iclass 14, count 0 2006.229.18:55:49.85#ibcon#end of sib2, iclass 14, count 0 2006.229.18:55:49.85#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:55:49.85#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:55:49.85#ibcon#[25=USB\r\n] 2006.229.18:55:49.85#ibcon#*before write, iclass 14, count 0 2006.229.18:55:49.85#ibcon#enter sib2, iclass 14, count 0 2006.229.18:55:49.85#ibcon#flushed, iclass 14, count 0 2006.229.18:55:49.85#ibcon#about to write, iclass 14, count 0 2006.229.18:55:49.85#ibcon#wrote, iclass 14, count 0 2006.229.18:55:49.85#ibcon#about to read 3, iclass 14, count 0 2006.229.18:55:49.88#ibcon#read 3, iclass 14, count 0 2006.229.18:55:49.88#ibcon#about to read 4, iclass 14, count 0 2006.229.18:55:49.88#ibcon#read 4, iclass 14, count 0 2006.229.18:55:49.88#ibcon#about to read 5, iclass 14, count 0 2006.229.18:55:49.88#ibcon#read 5, iclass 14, count 0 2006.229.18:55:49.88#ibcon#about to read 6, iclass 14, count 0 2006.229.18:55:49.88#ibcon#read 6, iclass 14, count 0 2006.229.18:55:49.88#ibcon#end of sib2, iclass 14, count 0 2006.229.18:55:49.88#ibcon#*after write, iclass 14, count 0 2006.229.18:55:49.88#ibcon#*before return 0, iclass 14, count 0 2006.229.18:55:49.88#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:55:49.88#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.18:55:49.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:55:49.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:55:49.88$vck44/vblo=1,629.99 2006.229.18:55:49.88#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.18:55:49.88#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.18:55:49.88#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:49.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:49.88#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:49.88#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:49.88#ibcon#enter wrdev, iclass 16, count 0 2006.229.18:55:49.88#ibcon#first serial, iclass 16, count 0 2006.229.18:55:49.88#ibcon#enter sib2, iclass 16, count 0 2006.229.18:55:49.88#ibcon#flushed, iclass 16, count 0 2006.229.18:55:49.88#ibcon#about to write, iclass 16, count 0 2006.229.18:55:49.88#ibcon#wrote, iclass 16, count 0 2006.229.18:55:49.88#ibcon#about to read 3, iclass 16, count 0 2006.229.18:55:49.90#ibcon#read 3, iclass 16, count 0 2006.229.18:55:49.90#ibcon#about to read 4, iclass 16, count 0 2006.229.18:55:49.90#ibcon#read 4, iclass 16, count 0 2006.229.18:55:49.90#ibcon#about to read 5, iclass 16, count 0 2006.229.18:55:49.90#ibcon#read 5, iclass 16, count 0 2006.229.18:55:49.90#ibcon#about to read 6, iclass 16, count 0 2006.229.18:55:49.90#ibcon#read 6, iclass 16, count 0 2006.229.18:55:49.90#ibcon#end of sib2, iclass 16, count 0 2006.229.18:55:49.90#ibcon#*mode == 0, iclass 16, count 0 2006.229.18:55:49.90#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.18:55:49.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.18:55:49.90#ibcon#*before write, iclass 16, count 0 2006.229.18:55:49.90#ibcon#enter sib2, iclass 16, count 0 2006.229.18:55:49.90#ibcon#flushed, iclass 16, count 0 2006.229.18:55:49.90#ibcon#about to write, iclass 16, count 0 2006.229.18:55:49.90#ibcon#wrote, iclass 16, count 0 2006.229.18:55:49.90#ibcon#about to read 3, iclass 16, count 0 2006.229.18:55:49.94#ibcon#read 3, iclass 16, count 0 2006.229.18:55:49.94#ibcon#about to read 4, iclass 16, count 0 2006.229.18:55:49.94#ibcon#read 4, iclass 16, count 0 2006.229.18:55:49.94#ibcon#about to read 5, iclass 16, count 0 2006.229.18:55:49.94#ibcon#read 5, iclass 16, count 0 2006.229.18:55:49.94#ibcon#about to read 6, iclass 16, count 0 2006.229.18:55:49.94#ibcon#read 6, iclass 16, count 0 2006.229.18:55:49.94#ibcon#end of sib2, iclass 16, count 0 2006.229.18:55:49.94#ibcon#*after write, iclass 16, count 0 2006.229.18:55:49.94#ibcon#*before return 0, iclass 16, count 0 2006.229.18:55:49.94#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:49.94#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.18:55:49.94#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.18:55:49.94#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.18:55:49.94$vck44/vb=1,4 2006.229.18:55:49.94#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.18:55:49.94#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.18:55:49.94#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:49.94#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:49.94#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:49.94#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:49.94#ibcon#enter wrdev, iclass 18, count 2 2006.229.18:55:49.94#ibcon#first serial, iclass 18, count 2 2006.229.18:55:49.94#ibcon#enter sib2, iclass 18, count 2 2006.229.18:55:49.94#ibcon#flushed, iclass 18, count 2 2006.229.18:55:49.94#ibcon#about to write, iclass 18, count 2 2006.229.18:55:49.94#ibcon#wrote, iclass 18, count 2 2006.229.18:55:49.94#ibcon#about to read 3, iclass 18, count 2 2006.229.18:55:49.96#ibcon#read 3, iclass 18, count 2 2006.229.18:55:49.96#ibcon#about to read 4, iclass 18, count 2 2006.229.18:55:49.96#ibcon#read 4, iclass 18, count 2 2006.229.18:55:49.96#ibcon#about to read 5, iclass 18, count 2 2006.229.18:55:49.96#ibcon#read 5, iclass 18, count 2 2006.229.18:55:49.96#ibcon#about to read 6, iclass 18, count 2 2006.229.18:55:49.96#ibcon#read 6, iclass 18, count 2 2006.229.18:55:49.96#ibcon#end of sib2, iclass 18, count 2 2006.229.18:55:49.96#ibcon#*mode == 0, iclass 18, count 2 2006.229.18:55:49.96#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.18:55:49.96#ibcon#[27=AT01-04\r\n] 2006.229.18:55:49.96#ibcon#*before write, iclass 18, count 2 2006.229.18:55:49.96#ibcon#enter sib2, iclass 18, count 2 2006.229.18:55:49.96#ibcon#flushed, iclass 18, count 2 2006.229.18:55:49.96#ibcon#about to write, iclass 18, count 2 2006.229.18:55:49.96#ibcon#wrote, iclass 18, count 2 2006.229.18:55:49.96#ibcon#about to read 3, iclass 18, count 2 2006.229.18:55:49.99#ibcon#read 3, iclass 18, count 2 2006.229.18:55:49.99#ibcon#about to read 4, iclass 18, count 2 2006.229.18:55:49.99#ibcon#read 4, iclass 18, count 2 2006.229.18:55:49.99#ibcon#about to read 5, iclass 18, count 2 2006.229.18:55:49.99#ibcon#read 5, iclass 18, count 2 2006.229.18:55:49.99#ibcon#about to read 6, iclass 18, count 2 2006.229.18:55:49.99#ibcon#read 6, iclass 18, count 2 2006.229.18:55:49.99#ibcon#end of sib2, iclass 18, count 2 2006.229.18:55:49.99#ibcon#*after write, iclass 18, count 2 2006.229.18:55:49.99#ibcon#*before return 0, iclass 18, count 2 2006.229.18:55:49.99#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:49.99#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.18:55:49.99#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.18:55:49.99#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:49.99#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:50.11#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:50.11#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:50.11#ibcon#enter wrdev, iclass 18, count 0 2006.229.18:55:50.11#ibcon#first serial, iclass 18, count 0 2006.229.18:55:50.11#ibcon#enter sib2, iclass 18, count 0 2006.229.18:55:50.11#ibcon#flushed, iclass 18, count 0 2006.229.18:55:50.11#ibcon#about to write, iclass 18, count 0 2006.229.18:55:50.11#ibcon#wrote, iclass 18, count 0 2006.229.18:55:50.11#ibcon#about to read 3, iclass 18, count 0 2006.229.18:55:50.13#ibcon#read 3, iclass 18, count 0 2006.229.18:55:50.13#ibcon#about to read 4, iclass 18, count 0 2006.229.18:55:50.13#ibcon#read 4, iclass 18, count 0 2006.229.18:55:50.13#ibcon#about to read 5, iclass 18, count 0 2006.229.18:55:50.13#ibcon#read 5, iclass 18, count 0 2006.229.18:55:50.13#ibcon#about to read 6, iclass 18, count 0 2006.229.18:55:50.13#ibcon#read 6, iclass 18, count 0 2006.229.18:55:50.13#ibcon#end of sib2, iclass 18, count 0 2006.229.18:55:50.13#ibcon#*mode == 0, iclass 18, count 0 2006.229.18:55:50.13#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.18:55:50.13#ibcon#[27=USB\r\n] 2006.229.18:55:50.13#ibcon#*before write, iclass 18, count 0 2006.229.18:55:50.13#ibcon#enter sib2, iclass 18, count 0 2006.229.18:55:50.13#ibcon#flushed, iclass 18, count 0 2006.229.18:55:50.13#ibcon#about to write, iclass 18, count 0 2006.229.18:55:50.13#ibcon#wrote, iclass 18, count 0 2006.229.18:55:50.13#ibcon#about to read 3, iclass 18, count 0 2006.229.18:55:50.16#ibcon#read 3, iclass 18, count 0 2006.229.18:55:50.16#ibcon#about to read 4, iclass 18, count 0 2006.229.18:55:50.16#ibcon#read 4, iclass 18, count 0 2006.229.18:55:50.16#ibcon#about to read 5, iclass 18, count 0 2006.229.18:55:50.16#ibcon#read 5, iclass 18, count 0 2006.229.18:55:50.16#ibcon#about to read 6, iclass 18, count 0 2006.229.18:55:50.16#ibcon#read 6, iclass 18, count 0 2006.229.18:55:50.16#ibcon#end of sib2, iclass 18, count 0 2006.229.18:55:50.16#ibcon#*after write, iclass 18, count 0 2006.229.18:55:50.16#ibcon#*before return 0, iclass 18, count 0 2006.229.18:55:50.16#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:50.16#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.18:55:50.16#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.18:55:50.16#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.18:55:50.16$vck44/vblo=2,634.99 2006.229.18:55:50.16#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.18:55:50.16#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.18:55:50.16#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:50.16#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:50.16#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:50.16#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:50.16#ibcon#enter wrdev, iclass 20, count 0 2006.229.18:55:50.16#ibcon#first serial, iclass 20, count 0 2006.229.18:55:50.16#ibcon#enter sib2, iclass 20, count 0 2006.229.18:55:50.16#ibcon#flushed, iclass 20, count 0 2006.229.18:55:50.16#ibcon#about to write, iclass 20, count 0 2006.229.18:55:50.16#ibcon#wrote, iclass 20, count 0 2006.229.18:55:50.16#ibcon#about to read 3, iclass 20, count 0 2006.229.18:55:50.18#ibcon#read 3, iclass 20, count 0 2006.229.18:55:50.18#ibcon#about to read 4, iclass 20, count 0 2006.229.18:55:50.18#ibcon#read 4, iclass 20, count 0 2006.229.18:55:50.18#ibcon#about to read 5, iclass 20, count 0 2006.229.18:55:50.18#ibcon#read 5, iclass 20, count 0 2006.229.18:55:50.18#ibcon#about to read 6, iclass 20, count 0 2006.229.18:55:50.18#ibcon#read 6, iclass 20, count 0 2006.229.18:55:50.18#ibcon#end of sib2, iclass 20, count 0 2006.229.18:55:50.18#ibcon#*mode == 0, iclass 20, count 0 2006.229.18:55:50.18#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.18:55:50.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.18:55:50.18#ibcon#*before write, iclass 20, count 0 2006.229.18:55:50.18#ibcon#enter sib2, iclass 20, count 0 2006.229.18:55:50.18#ibcon#flushed, iclass 20, count 0 2006.229.18:55:50.18#ibcon#about to write, iclass 20, count 0 2006.229.18:55:50.18#ibcon#wrote, iclass 20, count 0 2006.229.18:55:50.18#ibcon#about to read 3, iclass 20, count 0 2006.229.18:55:50.22#ibcon#read 3, iclass 20, count 0 2006.229.18:55:50.22#ibcon#about to read 4, iclass 20, count 0 2006.229.18:55:50.22#ibcon#read 4, iclass 20, count 0 2006.229.18:55:50.22#ibcon#about to read 5, iclass 20, count 0 2006.229.18:55:50.22#ibcon#read 5, iclass 20, count 0 2006.229.18:55:50.22#ibcon#about to read 6, iclass 20, count 0 2006.229.18:55:50.22#ibcon#read 6, iclass 20, count 0 2006.229.18:55:50.22#ibcon#end of sib2, iclass 20, count 0 2006.229.18:55:50.22#ibcon#*after write, iclass 20, count 0 2006.229.18:55:50.22#ibcon#*before return 0, iclass 20, count 0 2006.229.18:55:50.22#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:50.22#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.18:55:50.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.18:55:50.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.18:55:50.22$vck44/vb=2,4 2006.229.18:55:50.22#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.18:55:50.22#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.18:55:50.22#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:50.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:50.28#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:50.28#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:50.28#ibcon#enter wrdev, iclass 22, count 2 2006.229.18:55:50.28#ibcon#first serial, iclass 22, count 2 2006.229.18:55:50.28#ibcon#enter sib2, iclass 22, count 2 2006.229.18:55:50.28#ibcon#flushed, iclass 22, count 2 2006.229.18:55:50.28#ibcon#about to write, iclass 22, count 2 2006.229.18:55:50.28#ibcon#wrote, iclass 22, count 2 2006.229.18:55:50.28#ibcon#about to read 3, iclass 22, count 2 2006.229.18:55:50.30#ibcon#read 3, iclass 22, count 2 2006.229.18:55:50.30#ibcon#about to read 4, iclass 22, count 2 2006.229.18:55:50.30#ibcon#read 4, iclass 22, count 2 2006.229.18:55:50.30#ibcon#about to read 5, iclass 22, count 2 2006.229.18:55:50.30#ibcon#read 5, iclass 22, count 2 2006.229.18:55:50.30#ibcon#about to read 6, iclass 22, count 2 2006.229.18:55:50.30#ibcon#read 6, iclass 22, count 2 2006.229.18:55:50.30#ibcon#end of sib2, iclass 22, count 2 2006.229.18:55:50.30#ibcon#*mode == 0, iclass 22, count 2 2006.229.18:55:50.30#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.18:55:50.30#ibcon#[27=AT02-04\r\n] 2006.229.18:55:50.30#ibcon#*before write, iclass 22, count 2 2006.229.18:55:50.30#ibcon#enter sib2, iclass 22, count 2 2006.229.18:55:50.30#ibcon#flushed, iclass 22, count 2 2006.229.18:55:50.30#ibcon#about to write, iclass 22, count 2 2006.229.18:55:50.30#ibcon#wrote, iclass 22, count 2 2006.229.18:55:50.30#ibcon#about to read 3, iclass 22, count 2 2006.229.18:55:50.33#ibcon#read 3, iclass 22, count 2 2006.229.18:55:50.33#ibcon#about to read 4, iclass 22, count 2 2006.229.18:55:50.33#ibcon#read 4, iclass 22, count 2 2006.229.18:55:50.33#ibcon#about to read 5, iclass 22, count 2 2006.229.18:55:50.33#ibcon#read 5, iclass 22, count 2 2006.229.18:55:50.33#ibcon#about to read 6, iclass 22, count 2 2006.229.18:55:50.33#ibcon#read 6, iclass 22, count 2 2006.229.18:55:50.33#ibcon#end of sib2, iclass 22, count 2 2006.229.18:55:50.33#ibcon#*after write, iclass 22, count 2 2006.229.18:55:50.33#ibcon#*before return 0, iclass 22, count 2 2006.229.18:55:50.33#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:50.33#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.18:55:50.33#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.18:55:50.33#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:50.33#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:50.45#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:50.45#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:50.45#ibcon#enter wrdev, iclass 22, count 0 2006.229.18:55:50.45#ibcon#first serial, iclass 22, count 0 2006.229.18:55:50.45#ibcon#enter sib2, iclass 22, count 0 2006.229.18:55:50.45#ibcon#flushed, iclass 22, count 0 2006.229.18:55:50.45#ibcon#about to write, iclass 22, count 0 2006.229.18:55:50.45#ibcon#wrote, iclass 22, count 0 2006.229.18:55:50.45#ibcon#about to read 3, iclass 22, count 0 2006.229.18:55:50.47#ibcon#read 3, iclass 22, count 0 2006.229.18:55:50.47#ibcon#about to read 4, iclass 22, count 0 2006.229.18:55:50.47#ibcon#read 4, iclass 22, count 0 2006.229.18:55:50.47#ibcon#about to read 5, iclass 22, count 0 2006.229.18:55:50.47#ibcon#read 5, iclass 22, count 0 2006.229.18:55:50.47#ibcon#about to read 6, iclass 22, count 0 2006.229.18:55:50.47#ibcon#read 6, iclass 22, count 0 2006.229.18:55:50.47#ibcon#end of sib2, iclass 22, count 0 2006.229.18:55:50.47#ibcon#*mode == 0, iclass 22, count 0 2006.229.18:55:50.47#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.18:55:50.47#ibcon#[27=USB\r\n] 2006.229.18:55:50.47#ibcon#*before write, iclass 22, count 0 2006.229.18:55:50.47#ibcon#enter sib2, iclass 22, count 0 2006.229.18:55:50.47#ibcon#flushed, iclass 22, count 0 2006.229.18:55:50.47#ibcon#about to write, iclass 22, count 0 2006.229.18:55:50.47#ibcon#wrote, iclass 22, count 0 2006.229.18:55:50.47#ibcon#about to read 3, iclass 22, count 0 2006.229.18:55:50.50#ibcon#read 3, iclass 22, count 0 2006.229.18:55:50.50#ibcon#about to read 4, iclass 22, count 0 2006.229.18:55:50.50#ibcon#read 4, iclass 22, count 0 2006.229.18:55:50.50#ibcon#about to read 5, iclass 22, count 0 2006.229.18:55:50.50#ibcon#read 5, iclass 22, count 0 2006.229.18:55:50.50#ibcon#about to read 6, iclass 22, count 0 2006.229.18:55:50.50#ibcon#read 6, iclass 22, count 0 2006.229.18:55:50.50#ibcon#end of sib2, iclass 22, count 0 2006.229.18:55:50.50#ibcon#*after write, iclass 22, count 0 2006.229.18:55:50.50#ibcon#*before return 0, iclass 22, count 0 2006.229.18:55:50.50#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:50.50#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.18:55:50.50#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.18:55:50.50#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.18:55:50.50$vck44/vblo=3,649.99 2006.229.18:55:50.50#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.18:55:50.50#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.18:55:50.50#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:50.50#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:50.50#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:50.50#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:50.50#ibcon#enter wrdev, iclass 24, count 0 2006.229.18:55:50.50#ibcon#first serial, iclass 24, count 0 2006.229.18:55:50.50#ibcon#enter sib2, iclass 24, count 0 2006.229.18:55:50.50#ibcon#flushed, iclass 24, count 0 2006.229.18:55:50.50#ibcon#about to write, iclass 24, count 0 2006.229.18:55:50.50#ibcon#wrote, iclass 24, count 0 2006.229.18:55:50.50#ibcon#about to read 3, iclass 24, count 0 2006.229.18:55:50.52#ibcon#read 3, iclass 24, count 0 2006.229.18:55:50.52#ibcon#about to read 4, iclass 24, count 0 2006.229.18:55:50.52#ibcon#read 4, iclass 24, count 0 2006.229.18:55:50.52#ibcon#about to read 5, iclass 24, count 0 2006.229.18:55:50.52#ibcon#read 5, iclass 24, count 0 2006.229.18:55:50.52#ibcon#about to read 6, iclass 24, count 0 2006.229.18:55:50.52#ibcon#read 6, iclass 24, count 0 2006.229.18:55:50.52#ibcon#end of sib2, iclass 24, count 0 2006.229.18:55:50.52#ibcon#*mode == 0, iclass 24, count 0 2006.229.18:55:50.52#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.18:55:50.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.18:55:50.52#ibcon#*before write, iclass 24, count 0 2006.229.18:55:50.52#ibcon#enter sib2, iclass 24, count 0 2006.229.18:55:50.52#ibcon#flushed, iclass 24, count 0 2006.229.18:55:50.52#ibcon#about to write, iclass 24, count 0 2006.229.18:55:50.52#ibcon#wrote, iclass 24, count 0 2006.229.18:55:50.52#ibcon#about to read 3, iclass 24, count 0 2006.229.18:55:50.56#ibcon#read 3, iclass 24, count 0 2006.229.18:55:50.56#ibcon#about to read 4, iclass 24, count 0 2006.229.18:55:50.56#ibcon#read 4, iclass 24, count 0 2006.229.18:55:50.56#ibcon#about to read 5, iclass 24, count 0 2006.229.18:55:50.56#ibcon#read 5, iclass 24, count 0 2006.229.18:55:50.56#ibcon#about to read 6, iclass 24, count 0 2006.229.18:55:50.56#ibcon#read 6, iclass 24, count 0 2006.229.18:55:50.56#ibcon#end of sib2, iclass 24, count 0 2006.229.18:55:50.56#ibcon#*after write, iclass 24, count 0 2006.229.18:55:50.56#ibcon#*before return 0, iclass 24, count 0 2006.229.18:55:50.56#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:50.56#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.18:55:50.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.18:55:50.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.18:55:50.56$vck44/vb=3,4 2006.229.18:55:50.56#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.18:55:50.56#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.18:55:50.56#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:50.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:50.62#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:50.62#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:50.62#ibcon#enter wrdev, iclass 26, count 2 2006.229.18:55:50.62#ibcon#first serial, iclass 26, count 2 2006.229.18:55:50.62#ibcon#enter sib2, iclass 26, count 2 2006.229.18:55:50.62#ibcon#flushed, iclass 26, count 2 2006.229.18:55:50.62#ibcon#about to write, iclass 26, count 2 2006.229.18:55:50.62#ibcon#wrote, iclass 26, count 2 2006.229.18:55:50.62#ibcon#about to read 3, iclass 26, count 2 2006.229.18:55:50.64#ibcon#read 3, iclass 26, count 2 2006.229.18:55:50.64#ibcon#about to read 4, iclass 26, count 2 2006.229.18:55:50.64#ibcon#read 4, iclass 26, count 2 2006.229.18:55:50.64#ibcon#about to read 5, iclass 26, count 2 2006.229.18:55:50.64#ibcon#read 5, iclass 26, count 2 2006.229.18:55:50.64#ibcon#about to read 6, iclass 26, count 2 2006.229.18:55:50.64#ibcon#read 6, iclass 26, count 2 2006.229.18:55:50.64#ibcon#end of sib2, iclass 26, count 2 2006.229.18:55:50.64#ibcon#*mode == 0, iclass 26, count 2 2006.229.18:55:50.64#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.18:55:50.64#ibcon#[27=AT03-04\r\n] 2006.229.18:55:50.64#ibcon#*before write, iclass 26, count 2 2006.229.18:55:50.64#ibcon#enter sib2, iclass 26, count 2 2006.229.18:55:50.64#ibcon#flushed, iclass 26, count 2 2006.229.18:55:50.64#ibcon#about to write, iclass 26, count 2 2006.229.18:55:50.64#ibcon#wrote, iclass 26, count 2 2006.229.18:55:50.64#ibcon#about to read 3, iclass 26, count 2 2006.229.18:55:50.67#ibcon#read 3, iclass 26, count 2 2006.229.18:55:50.67#ibcon#about to read 4, iclass 26, count 2 2006.229.18:55:50.67#ibcon#read 4, iclass 26, count 2 2006.229.18:55:50.67#ibcon#about to read 5, iclass 26, count 2 2006.229.18:55:50.67#ibcon#read 5, iclass 26, count 2 2006.229.18:55:50.67#ibcon#about to read 6, iclass 26, count 2 2006.229.18:55:50.67#ibcon#read 6, iclass 26, count 2 2006.229.18:55:50.67#ibcon#end of sib2, iclass 26, count 2 2006.229.18:55:50.67#ibcon#*after write, iclass 26, count 2 2006.229.18:55:50.67#ibcon#*before return 0, iclass 26, count 2 2006.229.18:55:50.67#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:50.67#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.18:55:50.67#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.18:55:50.67#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:50.67#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:50.79#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:50.79#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:50.79#ibcon#enter wrdev, iclass 26, count 0 2006.229.18:55:50.79#ibcon#first serial, iclass 26, count 0 2006.229.18:55:50.79#ibcon#enter sib2, iclass 26, count 0 2006.229.18:55:50.79#ibcon#flushed, iclass 26, count 0 2006.229.18:55:50.79#ibcon#about to write, iclass 26, count 0 2006.229.18:55:50.79#ibcon#wrote, iclass 26, count 0 2006.229.18:55:50.79#ibcon#about to read 3, iclass 26, count 0 2006.229.18:55:50.81#ibcon#read 3, iclass 26, count 0 2006.229.18:55:50.81#ibcon#about to read 4, iclass 26, count 0 2006.229.18:55:50.81#ibcon#read 4, iclass 26, count 0 2006.229.18:55:50.81#ibcon#about to read 5, iclass 26, count 0 2006.229.18:55:50.81#ibcon#read 5, iclass 26, count 0 2006.229.18:55:50.81#ibcon#about to read 6, iclass 26, count 0 2006.229.18:55:50.81#ibcon#read 6, iclass 26, count 0 2006.229.18:55:50.81#ibcon#end of sib2, iclass 26, count 0 2006.229.18:55:50.81#ibcon#*mode == 0, iclass 26, count 0 2006.229.18:55:50.81#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.18:55:50.81#ibcon#[27=USB\r\n] 2006.229.18:55:50.81#ibcon#*before write, iclass 26, count 0 2006.229.18:55:50.81#ibcon#enter sib2, iclass 26, count 0 2006.229.18:55:50.81#ibcon#flushed, iclass 26, count 0 2006.229.18:55:50.81#ibcon#about to write, iclass 26, count 0 2006.229.18:55:50.81#ibcon#wrote, iclass 26, count 0 2006.229.18:55:50.81#ibcon#about to read 3, iclass 26, count 0 2006.229.18:55:50.84#ibcon#read 3, iclass 26, count 0 2006.229.18:55:50.84#ibcon#about to read 4, iclass 26, count 0 2006.229.18:55:50.84#ibcon#read 4, iclass 26, count 0 2006.229.18:55:50.84#ibcon#about to read 5, iclass 26, count 0 2006.229.18:55:50.84#ibcon#read 5, iclass 26, count 0 2006.229.18:55:50.84#ibcon#about to read 6, iclass 26, count 0 2006.229.18:55:50.84#ibcon#read 6, iclass 26, count 0 2006.229.18:55:50.84#ibcon#end of sib2, iclass 26, count 0 2006.229.18:55:50.84#ibcon#*after write, iclass 26, count 0 2006.229.18:55:50.84#ibcon#*before return 0, iclass 26, count 0 2006.229.18:55:50.84#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:50.84#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.18:55:50.84#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.18:55:50.84#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.18:55:50.84$vck44/vblo=4,679.99 2006.229.18:55:50.84#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.18:55:50.84#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.18:55:50.84#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:50.84#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:50.84#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:50.84#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:50.84#ibcon#enter wrdev, iclass 28, count 0 2006.229.18:55:50.84#ibcon#first serial, iclass 28, count 0 2006.229.18:55:50.84#ibcon#enter sib2, iclass 28, count 0 2006.229.18:55:50.84#ibcon#flushed, iclass 28, count 0 2006.229.18:55:50.84#ibcon#about to write, iclass 28, count 0 2006.229.18:55:50.84#ibcon#wrote, iclass 28, count 0 2006.229.18:55:50.84#ibcon#about to read 3, iclass 28, count 0 2006.229.18:55:50.86#ibcon#read 3, iclass 28, count 0 2006.229.18:55:50.86#ibcon#about to read 4, iclass 28, count 0 2006.229.18:55:50.86#ibcon#read 4, iclass 28, count 0 2006.229.18:55:50.86#ibcon#about to read 5, iclass 28, count 0 2006.229.18:55:50.86#ibcon#read 5, iclass 28, count 0 2006.229.18:55:50.86#ibcon#about to read 6, iclass 28, count 0 2006.229.18:55:50.86#ibcon#read 6, iclass 28, count 0 2006.229.18:55:50.86#ibcon#end of sib2, iclass 28, count 0 2006.229.18:55:50.86#ibcon#*mode == 0, iclass 28, count 0 2006.229.18:55:50.86#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.18:55:50.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.18:55:50.86#ibcon#*before write, iclass 28, count 0 2006.229.18:55:50.86#ibcon#enter sib2, iclass 28, count 0 2006.229.18:55:50.86#ibcon#flushed, iclass 28, count 0 2006.229.18:55:50.86#ibcon#about to write, iclass 28, count 0 2006.229.18:55:50.86#ibcon#wrote, iclass 28, count 0 2006.229.18:55:50.86#ibcon#about to read 3, iclass 28, count 0 2006.229.18:55:50.90#ibcon#read 3, iclass 28, count 0 2006.229.18:55:50.90#ibcon#about to read 4, iclass 28, count 0 2006.229.18:55:50.90#ibcon#read 4, iclass 28, count 0 2006.229.18:55:50.90#ibcon#about to read 5, iclass 28, count 0 2006.229.18:55:50.90#ibcon#read 5, iclass 28, count 0 2006.229.18:55:50.90#ibcon#about to read 6, iclass 28, count 0 2006.229.18:55:50.90#ibcon#read 6, iclass 28, count 0 2006.229.18:55:50.90#ibcon#end of sib2, iclass 28, count 0 2006.229.18:55:50.90#ibcon#*after write, iclass 28, count 0 2006.229.18:55:50.90#ibcon#*before return 0, iclass 28, count 0 2006.229.18:55:50.90#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:50.90#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.18:55:50.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.18:55:50.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.18:55:50.90$vck44/vb=4,4 2006.229.18:55:50.90#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.18:55:50.90#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.18:55:50.90#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:50.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:50.96#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:50.96#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:50.96#ibcon#enter wrdev, iclass 30, count 2 2006.229.18:55:50.96#ibcon#first serial, iclass 30, count 2 2006.229.18:55:50.96#ibcon#enter sib2, iclass 30, count 2 2006.229.18:55:50.96#ibcon#flushed, iclass 30, count 2 2006.229.18:55:50.96#ibcon#about to write, iclass 30, count 2 2006.229.18:55:50.96#ibcon#wrote, iclass 30, count 2 2006.229.18:55:50.96#ibcon#about to read 3, iclass 30, count 2 2006.229.18:55:50.98#ibcon#read 3, iclass 30, count 2 2006.229.18:55:50.98#ibcon#about to read 4, iclass 30, count 2 2006.229.18:55:50.98#ibcon#read 4, iclass 30, count 2 2006.229.18:55:50.98#ibcon#about to read 5, iclass 30, count 2 2006.229.18:55:50.98#ibcon#read 5, iclass 30, count 2 2006.229.18:55:50.98#ibcon#about to read 6, iclass 30, count 2 2006.229.18:55:50.98#ibcon#read 6, iclass 30, count 2 2006.229.18:55:50.98#ibcon#end of sib2, iclass 30, count 2 2006.229.18:55:50.98#ibcon#*mode == 0, iclass 30, count 2 2006.229.18:55:50.98#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.18:55:50.98#ibcon#[27=AT04-04\r\n] 2006.229.18:55:50.98#ibcon#*before write, iclass 30, count 2 2006.229.18:55:50.98#ibcon#enter sib2, iclass 30, count 2 2006.229.18:55:50.98#ibcon#flushed, iclass 30, count 2 2006.229.18:55:50.98#ibcon#about to write, iclass 30, count 2 2006.229.18:55:50.98#ibcon#wrote, iclass 30, count 2 2006.229.18:55:50.98#ibcon#about to read 3, iclass 30, count 2 2006.229.18:55:51.01#ibcon#read 3, iclass 30, count 2 2006.229.18:55:51.01#ibcon#about to read 4, iclass 30, count 2 2006.229.18:55:51.01#ibcon#read 4, iclass 30, count 2 2006.229.18:55:51.01#ibcon#about to read 5, iclass 30, count 2 2006.229.18:55:51.01#ibcon#read 5, iclass 30, count 2 2006.229.18:55:51.01#ibcon#about to read 6, iclass 30, count 2 2006.229.18:55:51.01#ibcon#read 6, iclass 30, count 2 2006.229.18:55:51.01#ibcon#end of sib2, iclass 30, count 2 2006.229.18:55:51.01#ibcon#*after write, iclass 30, count 2 2006.229.18:55:51.01#ibcon#*before return 0, iclass 30, count 2 2006.229.18:55:51.01#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:51.01#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.18:55:51.01#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.18:55:51.01#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:51.01#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:51.13#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:51.13#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:51.13#ibcon#enter wrdev, iclass 30, count 0 2006.229.18:55:51.13#ibcon#first serial, iclass 30, count 0 2006.229.18:55:51.13#ibcon#enter sib2, iclass 30, count 0 2006.229.18:55:51.13#ibcon#flushed, iclass 30, count 0 2006.229.18:55:51.13#ibcon#about to write, iclass 30, count 0 2006.229.18:55:51.13#ibcon#wrote, iclass 30, count 0 2006.229.18:55:51.13#ibcon#about to read 3, iclass 30, count 0 2006.229.18:55:51.15#ibcon#read 3, iclass 30, count 0 2006.229.18:55:51.15#ibcon#about to read 4, iclass 30, count 0 2006.229.18:55:51.15#ibcon#read 4, iclass 30, count 0 2006.229.18:55:51.15#ibcon#about to read 5, iclass 30, count 0 2006.229.18:55:51.15#ibcon#read 5, iclass 30, count 0 2006.229.18:55:51.15#ibcon#about to read 6, iclass 30, count 0 2006.229.18:55:51.15#ibcon#read 6, iclass 30, count 0 2006.229.18:55:51.15#ibcon#end of sib2, iclass 30, count 0 2006.229.18:55:51.15#ibcon#*mode == 0, iclass 30, count 0 2006.229.18:55:51.15#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.18:55:51.15#ibcon#[27=USB\r\n] 2006.229.18:55:51.15#ibcon#*before write, iclass 30, count 0 2006.229.18:55:51.15#ibcon#enter sib2, iclass 30, count 0 2006.229.18:55:51.15#ibcon#flushed, iclass 30, count 0 2006.229.18:55:51.15#ibcon#about to write, iclass 30, count 0 2006.229.18:55:51.15#ibcon#wrote, iclass 30, count 0 2006.229.18:55:51.15#ibcon#about to read 3, iclass 30, count 0 2006.229.18:55:51.18#ibcon#read 3, iclass 30, count 0 2006.229.18:55:51.18#ibcon#about to read 4, iclass 30, count 0 2006.229.18:55:51.18#ibcon#read 4, iclass 30, count 0 2006.229.18:55:51.18#ibcon#about to read 5, iclass 30, count 0 2006.229.18:55:51.18#ibcon#read 5, iclass 30, count 0 2006.229.18:55:51.18#ibcon#about to read 6, iclass 30, count 0 2006.229.18:55:51.18#ibcon#read 6, iclass 30, count 0 2006.229.18:55:51.18#ibcon#end of sib2, iclass 30, count 0 2006.229.18:55:51.18#ibcon#*after write, iclass 30, count 0 2006.229.18:55:51.18#ibcon#*before return 0, iclass 30, count 0 2006.229.18:55:51.18#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:51.18#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.18:55:51.18#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.18:55:51.18#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.18:55:51.18$vck44/vblo=5,709.99 2006.229.18:55:51.18#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.18:55:51.18#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.18:55:51.18#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:51.18#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:55:51.18#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:55:51.18#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:55:51.18#ibcon#enter wrdev, iclass 32, count 0 2006.229.18:55:51.18#ibcon#first serial, iclass 32, count 0 2006.229.18:55:51.18#ibcon#enter sib2, iclass 32, count 0 2006.229.18:55:51.18#ibcon#flushed, iclass 32, count 0 2006.229.18:55:51.18#ibcon#about to write, iclass 32, count 0 2006.229.18:55:51.18#ibcon#wrote, iclass 32, count 0 2006.229.18:55:51.18#ibcon#about to read 3, iclass 32, count 0 2006.229.18:55:51.20#ibcon#read 3, iclass 32, count 0 2006.229.18:55:51.20#ibcon#about to read 4, iclass 32, count 0 2006.229.18:55:51.20#ibcon#read 4, iclass 32, count 0 2006.229.18:55:51.20#ibcon#about to read 5, iclass 32, count 0 2006.229.18:55:51.20#ibcon#read 5, iclass 32, count 0 2006.229.18:55:51.20#ibcon#about to read 6, iclass 32, count 0 2006.229.18:55:51.20#ibcon#read 6, iclass 32, count 0 2006.229.18:55:51.20#ibcon#end of sib2, iclass 32, count 0 2006.229.18:55:51.20#ibcon#*mode == 0, iclass 32, count 0 2006.229.18:55:51.20#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.18:55:51.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.18:55:51.20#ibcon#*before write, iclass 32, count 0 2006.229.18:55:51.20#ibcon#enter sib2, iclass 32, count 0 2006.229.18:55:51.20#ibcon#flushed, iclass 32, count 0 2006.229.18:55:51.20#ibcon#about to write, iclass 32, count 0 2006.229.18:55:51.20#ibcon#wrote, iclass 32, count 0 2006.229.18:55:51.20#ibcon#about to read 3, iclass 32, count 0 2006.229.18:55:51.24#ibcon#read 3, iclass 32, count 0 2006.229.18:55:51.24#ibcon#about to read 4, iclass 32, count 0 2006.229.18:55:51.24#ibcon#read 4, iclass 32, count 0 2006.229.18:55:51.24#ibcon#about to read 5, iclass 32, count 0 2006.229.18:55:51.24#ibcon#read 5, iclass 32, count 0 2006.229.18:55:51.24#ibcon#about to read 6, iclass 32, count 0 2006.229.18:55:51.24#ibcon#read 6, iclass 32, count 0 2006.229.18:55:51.24#ibcon#end of sib2, iclass 32, count 0 2006.229.18:55:51.24#ibcon#*after write, iclass 32, count 0 2006.229.18:55:51.24#ibcon#*before return 0, iclass 32, count 0 2006.229.18:55:51.24#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:55:51.24#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.18:55:51.24#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.18:55:51.24#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.18:55:51.24$vck44/vb=5,4 2006.229.18:55:51.24#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.18:55:51.24#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.18:55:51.24#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:51.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:55:51.30#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:55:51.30#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:55:51.30#ibcon#enter wrdev, iclass 34, count 2 2006.229.18:55:51.30#ibcon#first serial, iclass 34, count 2 2006.229.18:55:51.30#ibcon#enter sib2, iclass 34, count 2 2006.229.18:55:51.30#ibcon#flushed, iclass 34, count 2 2006.229.18:55:51.30#ibcon#about to write, iclass 34, count 2 2006.229.18:55:51.30#ibcon#wrote, iclass 34, count 2 2006.229.18:55:51.30#ibcon#about to read 3, iclass 34, count 2 2006.229.18:55:51.32#ibcon#read 3, iclass 34, count 2 2006.229.18:55:51.32#ibcon#about to read 4, iclass 34, count 2 2006.229.18:55:51.32#ibcon#read 4, iclass 34, count 2 2006.229.18:55:51.32#ibcon#about to read 5, iclass 34, count 2 2006.229.18:55:51.32#ibcon#read 5, iclass 34, count 2 2006.229.18:55:51.32#ibcon#about to read 6, iclass 34, count 2 2006.229.18:55:51.32#ibcon#read 6, iclass 34, count 2 2006.229.18:55:51.32#ibcon#end of sib2, iclass 34, count 2 2006.229.18:55:51.32#ibcon#*mode == 0, iclass 34, count 2 2006.229.18:55:51.32#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.18:55:51.32#ibcon#[27=AT05-04\r\n] 2006.229.18:55:51.32#ibcon#*before write, iclass 34, count 2 2006.229.18:55:51.32#ibcon#enter sib2, iclass 34, count 2 2006.229.18:55:51.32#ibcon#flushed, iclass 34, count 2 2006.229.18:55:51.32#ibcon#about to write, iclass 34, count 2 2006.229.18:55:51.32#ibcon#wrote, iclass 34, count 2 2006.229.18:55:51.32#ibcon#about to read 3, iclass 34, count 2 2006.229.18:55:51.35#ibcon#read 3, iclass 34, count 2 2006.229.18:55:51.35#ibcon#about to read 4, iclass 34, count 2 2006.229.18:55:51.35#ibcon#read 4, iclass 34, count 2 2006.229.18:55:51.35#ibcon#about to read 5, iclass 34, count 2 2006.229.18:55:51.35#ibcon#read 5, iclass 34, count 2 2006.229.18:55:51.35#ibcon#about to read 6, iclass 34, count 2 2006.229.18:55:51.35#ibcon#read 6, iclass 34, count 2 2006.229.18:55:51.35#ibcon#end of sib2, iclass 34, count 2 2006.229.18:55:51.35#ibcon#*after write, iclass 34, count 2 2006.229.18:55:51.35#ibcon#*before return 0, iclass 34, count 2 2006.229.18:55:51.35#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:55:51.35#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.18:55:51.35#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.18:55:51.35#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:51.35#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:55:51.47#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:55:51.47#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:55:51.47#ibcon#enter wrdev, iclass 34, count 0 2006.229.18:55:51.47#ibcon#first serial, iclass 34, count 0 2006.229.18:55:51.47#ibcon#enter sib2, iclass 34, count 0 2006.229.18:55:51.47#ibcon#flushed, iclass 34, count 0 2006.229.18:55:51.47#ibcon#about to write, iclass 34, count 0 2006.229.18:55:51.47#ibcon#wrote, iclass 34, count 0 2006.229.18:55:51.47#ibcon#about to read 3, iclass 34, count 0 2006.229.18:55:51.49#ibcon#read 3, iclass 34, count 0 2006.229.18:55:51.49#ibcon#about to read 4, iclass 34, count 0 2006.229.18:55:51.49#ibcon#read 4, iclass 34, count 0 2006.229.18:55:51.49#ibcon#about to read 5, iclass 34, count 0 2006.229.18:55:51.49#ibcon#read 5, iclass 34, count 0 2006.229.18:55:51.49#ibcon#about to read 6, iclass 34, count 0 2006.229.18:55:51.49#ibcon#read 6, iclass 34, count 0 2006.229.18:55:51.49#ibcon#end of sib2, iclass 34, count 0 2006.229.18:55:51.49#ibcon#*mode == 0, iclass 34, count 0 2006.229.18:55:51.49#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.18:55:51.49#ibcon#[27=USB\r\n] 2006.229.18:55:51.49#ibcon#*before write, iclass 34, count 0 2006.229.18:55:51.49#ibcon#enter sib2, iclass 34, count 0 2006.229.18:55:51.49#ibcon#flushed, iclass 34, count 0 2006.229.18:55:51.49#ibcon#about to write, iclass 34, count 0 2006.229.18:55:51.49#ibcon#wrote, iclass 34, count 0 2006.229.18:55:51.49#ibcon#about to read 3, iclass 34, count 0 2006.229.18:55:51.52#ibcon#read 3, iclass 34, count 0 2006.229.18:55:51.52#ibcon#about to read 4, iclass 34, count 0 2006.229.18:55:51.52#ibcon#read 4, iclass 34, count 0 2006.229.18:55:51.52#ibcon#about to read 5, iclass 34, count 0 2006.229.18:55:51.52#ibcon#read 5, iclass 34, count 0 2006.229.18:55:51.52#ibcon#about to read 6, iclass 34, count 0 2006.229.18:55:51.52#ibcon#read 6, iclass 34, count 0 2006.229.18:55:51.52#ibcon#end of sib2, iclass 34, count 0 2006.229.18:55:51.52#ibcon#*after write, iclass 34, count 0 2006.229.18:55:51.52#ibcon#*before return 0, iclass 34, count 0 2006.229.18:55:51.52#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:55:51.52#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.18:55:51.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.18:55:51.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.18:55:51.52$vck44/vblo=6,719.99 2006.229.18:55:51.52#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.18:55:51.52#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.18:55:51.52#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:51.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:51.52#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:51.52#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:51.52#ibcon#enter wrdev, iclass 36, count 0 2006.229.18:55:51.52#ibcon#first serial, iclass 36, count 0 2006.229.18:55:51.52#ibcon#enter sib2, iclass 36, count 0 2006.229.18:55:51.52#ibcon#flushed, iclass 36, count 0 2006.229.18:55:51.52#ibcon#about to write, iclass 36, count 0 2006.229.18:55:51.52#ibcon#wrote, iclass 36, count 0 2006.229.18:55:51.52#ibcon#about to read 3, iclass 36, count 0 2006.229.18:55:51.54#ibcon#read 3, iclass 36, count 0 2006.229.18:55:51.54#ibcon#about to read 4, iclass 36, count 0 2006.229.18:55:51.54#ibcon#read 4, iclass 36, count 0 2006.229.18:55:51.54#ibcon#about to read 5, iclass 36, count 0 2006.229.18:55:51.54#ibcon#read 5, iclass 36, count 0 2006.229.18:55:51.54#ibcon#about to read 6, iclass 36, count 0 2006.229.18:55:51.54#ibcon#read 6, iclass 36, count 0 2006.229.18:55:51.54#ibcon#end of sib2, iclass 36, count 0 2006.229.18:55:51.54#ibcon#*mode == 0, iclass 36, count 0 2006.229.18:55:51.54#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.18:55:51.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.18:55:51.54#ibcon#*before write, iclass 36, count 0 2006.229.18:55:51.54#ibcon#enter sib2, iclass 36, count 0 2006.229.18:55:51.54#ibcon#flushed, iclass 36, count 0 2006.229.18:55:51.54#ibcon#about to write, iclass 36, count 0 2006.229.18:55:51.54#ibcon#wrote, iclass 36, count 0 2006.229.18:55:51.54#ibcon#about to read 3, iclass 36, count 0 2006.229.18:55:51.58#ibcon#read 3, iclass 36, count 0 2006.229.18:55:51.58#ibcon#about to read 4, iclass 36, count 0 2006.229.18:55:51.58#ibcon#read 4, iclass 36, count 0 2006.229.18:55:51.58#ibcon#about to read 5, iclass 36, count 0 2006.229.18:55:51.58#ibcon#read 5, iclass 36, count 0 2006.229.18:55:51.58#ibcon#about to read 6, iclass 36, count 0 2006.229.18:55:51.58#ibcon#read 6, iclass 36, count 0 2006.229.18:55:51.58#ibcon#end of sib2, iclass 36, count 0 2006.229.18:55:51.58#ibcon#*after write, iclass 36, count 0 2006.229.18:55:51.58#ibcon#*before return 0, iclass 36, count 0 2006.229.18:55:51.58#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:51.58#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.18:55:51.58#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.18:55:51.58#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.18:55:51.58$vck44/vb=6,4 2006.229.18:55:51.58#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.18:55:51.58#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.18:55:51.58#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:51.58#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:51.64#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:51.64#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:51.64#ibcon#enter wrdev, iclass 38, count 2 2006.229.18:55:51.64#ibcon#first serial, iclass 38, count 2 2006.229.18:55:51.64#ibcon#enter sib2, iclass 38, count 2 2006.229.18:55:51.64#ibcon#flushed, iclass 38, count 2 2006.229.18:55:51.64#ibcon#about to write, iclass 38, count 2 2006.229.18:55:51.64#ibcon#wrote, iclass 38, count 2 2006.229.18:55:51.64#ibcon#about to read 3, iclass 38, count 2 2006.229.18:55:51.66#ibcon#read 3, iclass 38, count 2 2006.229.18:55:51.66#ibcon#about to read 4, iclass 38, count 2 2006.229.18:55:51.66#ibcon#read 4, iclass 38, count 2 2006.229.18:55:51.66#ibcon#about to read 5, iclass 38, count 2 2006.229.18:55:51.66#ibcon#read 5, iclass 38, count 2 2006.229.18:55:51.66#ibcon#about to read 6, iclass 38, count 2 2006.229.18:55:51.66#ibcon#read 6, iclass 38, count 2 2006.229.18:55:51.66#ibcon#end of sib2, iclass 38, count 2 2006.229.18:55:51.66#ibcon#*mode == 0, iclass 38, count 2 2006.229.18:55:51.66#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.18:55:51.66#ibcon#[27=AT06-04\r\n] 2006.229.18:55:51.66#ibcon#*before write, iclass 38, count 2 2006.229.18:55:51.66#ibcon#enter sib2, iclass 38, count 2 2006.229.18:55:51.66#ibcon#flushed, iclass 38, count 2 2006.229.18:55:51.66#ibcon#about to write, iclass 38, count 2 2006.229.18:55:51.66#ibcon#wrote, iclass 38, count 2 2006.229.18:55:51.66#ibcon#about to read 3, iclass 38, count 2 2006.229.18:55:51.69#ibcon#read 3, iclass 38, count 2 2006.229.18:55:51.69#ibcon#about to read 4, iclass 38, count 2 2006.229.18:55:51.69#ibcon#read 4, iclass 38, count 2 2006.229.18:55:51.69#ibcon#about to read 5, iclass 38, count 2 2006.229.18:55:51.69#ibcon#read 5, iclass 38, count 2 2006.229.18:55:51.69#ibcon#about to read 6, iclass 38, count 2 2006.229.18:55:51.69#ibcon#read 6, iclass 38, count 2 2006.229.18:55:51.69#ibcon#end of sib2, iclass 38, count 2 2006.229.18:55:51.69#ibcon#*after write, iclass 38, count 2 2006.229.18:55:51.69#ibcon#*before return 0, iclass 38, count 2 2006.229.18:55:51.69#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:51.69#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.18:55:51.69#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.18:55:51.69#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:51.69#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:51.81#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:51.81#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:51.81#ibcon#enter wrdev, iclass 38, count 0 2006.229.18:55:51.81#ibcon#first serial, iclass 38, count 0 2006.229.18:55:51.81#ibcon#enter sib2, iclass 38, count 0 2006.229.18:55:51.81#ibcon#flushed, iclass 38, count 0 2006.229.18:55:51.81#ibcon#about to write, iclass 38, count 0 2006.229.18:55:51.81#ibcon#wrote, iclass 38, count 0 2006.229.18:55:51.81#ibcon#about to read 3, iclass 38, count 0 2006.229.18:55:51.83#ibcon#read 3, iclass 38, count 0 2006.229.18:55:51.83#ibcon#about to read 4, iclass 38, count 0 2006.229.18:55:51.83#ibcon#read 4, iclass 38, count 0 2006.229.18:55:51.83#ibcon#about to read 5, iclass 38, count 0 2006.229.18:55:51.83#ibcon#read 5, iclass 38, count 0 2006.229.18:55:51.83#ibcon#about to read 6, iclass 38, count 0 2006.229.18:55:51.83#ibcon#read 6, iclass 38, count 0 2006.229.18:55:51.83#ibcon#end of sib2, iclass 38, count 0 2006.229.18:55:51.83#ibcon#*mode == 0, iclass 38, count 0 2006.229.18:55:51.83#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.18:55:51.83#ibcon#[27=USB\r\n] 2006.229.18:55:51.83#ibcon#*before write, iclass 38, count 0 2006.229.18:55:51.83#ibcon#enter sib2, iclass 38, count 0 2006.229.18:55:51.83#ibcon#flushed, iclass 38, count 0 2006.229.18:55:51.83#ibcon#about to write, iclass 38, count 0 2006.229.18:55:51.83#ibcon#wrote, iclass 38, count 0 2006.229.18:55:51.83#ibcon#about to read 3, iclass 38, count 0 2006.229.18:55:51.86#ibcon#read 3, iclass 38, count 0 2006.229.18:55:51.86#ibcon#about to read 4, iclass 38, count 0 2006.229.18:55:51.86#ibcon#read 4, iclass 38, count 0 2006.229.18:55:51.86#ibcon#about to read 5, iclass 38, count 0 2006.229.18:55:51.86#ibcon#read 5, iclass 38, count 0 2006.229.18:55:51.86#ibcon#about to read 6, iclass 38, count 0 2006.229.18:55:51.86#ibcon#read 6, iclass 38, count 0 2006.229.18:55:51.86#ibcon#end of sib2, iclass 38, count 0 2006.229.18:55:51.86#ibcon#*after write, iclass 38, count 0 2006.229.18:55:51.86#ibcon#*before return 0, iclass 38, count 0 2006.229.18:55:51.86#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:51.86#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.18:55:51.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.18:55:51.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.18:55:51.86$vck44/vblo=7,734.99 2006.229.18:55:51.86#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.18:55:51.86#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.18:55:51.86#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:51.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:51.86#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:51.86#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:51.86#ibcon#enter wrdev, iclass 40, count 0 2006.229.18:55:51.86#ibcon#first serial, iclass 40, count 0 2006.229.18:55:51.86#ibcon#enter sib2, iclass 40, count 0 2006.229.18:55:51.86#ibcon#flushed, iclass 40, count 0 2006.229.18:55:51.86#ibcon#about to write, iclass 40, count 0 2006.229.18:55:51.86#ibcon#wrote, iclass 40, count 0 2006.229.18:55:51.86#ibcon#about to read 3, iclass 40, count 0 2006.229.18:55:51.88#ibcon#read 3, iclass 40, count 0 2006.229.18:55:51.88#ibcon#about to read 4, iclass 40, count 0 2006.229.18:55:51.88#ibcon#read 4, iclass 40, count 0 2006.229.18:55:51.88#ibcon#about to read 5, iclass 40, count 0 2006.229.18:55:51.88#ibcon#read 5, iclass 40, count 0 2006.229.18:55:51.88#ibcon#about to read 6, iclass 40, count 0 2006.229.18:55:51.88#ibcon#read 6, iclass 40, count 0 2006.229.18:55:51.88#ibcon#end of sib2, iclass 40, count 0 2006.229.18:55:51.88#ibcon#*mode == 0, iclass 40, count 0 2006.229.18:55:51.88#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.18:55:51.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.18:55:51.88#ibcon#*before write, iclass 40, count 0 2006.229.18:55:51.88#ibcon#enter sib2, iclass 40, count 0 2006.229.18:55:51.88#ibcon#flushed, iclass 40, count 0 2006.229.18:55:51.88#ibcon#about to write, iclass 40, count 0 2006.229.18:55:51.88#ibcon#wrote, iclass 40, count 0 2006.229.18:55:51.88#ibcon#about to read 3, iclass 40, count 0 2006.229.18:55:51.92#ibcon#read 3, iclass 40, count 0 2006.229.18:55:51.92#ibcon#about to read 4, iclass 40, count 0 2006.229.18:55:51.92#ibcon#read 4, iclass 40, count 0 2006.229.18:55:51.92#ibcon#about to read 5, iclass 40, count 0 2006.229.18:55:51.92#ibcon#read 5, iclass 40, count 0 2006.229.18:55:51.92#ibcon#about to read 6, iclass 40, count 0 2006.229.18:55:51.92#ibcon#read 6, iclass 40, count 0 2006.229.18:55:51.92#ibcon#end of sib2, iclass 40, count 0 2006.229.18:55:51.92#ibcon#*after write, iclass 40, count 0 2006.229.18:55:51.92#ibcon#*before return 0, iclass 40, count 0 2006.229.18:55:51.92#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:51.92#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.18:55:51.92#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.18:55:51.92#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.18:55:51.92$vck44/vb=7,4 2006.229.18:55:51.92#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.18:55:51.92#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.18:55:51.92#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:51.92#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:51.98#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:51.98#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:51.98#ibcon#enter wrdev, iclass 4, count 2 2006.229.18:55:51.98#ibcon#first serial, iclass 4, count 2 2006.229.18:55:51.98#ibcon#enter sib2, iclass 4, count 2 2006.229.18:55:51.98#ibcon#flushed, iclass 4, count 2 2006.229.18:55:51.98#ibcon#about to write, iclass 4, count 2 2006.229.18:55:51.98#ibcon#wrote, iclass 4, count 2 2006.229.18:55:51.98#ibcon#about to read 3, iclass 4, count 2 2006.229.18:55:52.00#ibcon#read 3, iclass 4, count 2 2006.229.18:55:52.00#ibcon#about to read 4, iclass 4, count 2 2006.229.18:55:52.00#ibcon#read 4, iclass 4, count 2 2006.229.18:55:52.00#ibcon#about to read 5, iclass 4, count 2 2006.229.18:55:52.00#ibcon#read 5, iclass 4, count 2 2006.229.18:55:52.00#ibcon#about to read 6, iclass 4, count 2 2006.229.18:55:52.00#ibcon#read 6, iclass 4, count 2 2006.229.18:55:52.00#ibcon#end of sib2, iclass 4, count 2 2006.229.18:55:52.00#ibcon#*mode == 0, iclass 4, count 2 2006.229.18:55:52.00#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.18:55:52.00#ibcon#[27=AT07-04\r\n] 2006.229.18:55:52.00#ibcon#*before write, iclass 4, count 2 2006.229.18:55:52.00#ibcon#enter sib2, iclass 4, count 2 2006.229.18:55:52.00#ibcon#flushed, iclass 4, count 2 2006.229.18:55:52.00#ibcon#about to write, iclass 4, count 2 2006.229.18:55:52.00#ibcon#wrote, iclass 4, count 2 2006.229.18:55:52.00#ibcon#about to read 3, iclass 4, count 2 2006.229.18:55:52.03#ibcon#read 3, iclass 4, count 2 2006.229.18:55:52.03#ibcon#about to read 4, iclass 4, count 2 2006.229.18:55:52.03#ibcon#read 4, iclass 4, count 2 2006.229.18:55:52.03#ibcon#about to read 5, iclass 4, count 2 2006.229.18:55:52.03#ibcon#read 5, iclass 4, count 2 2006.229.18:55:52.03#ibcon#about to read 6, iclass 4, count 2 2006.229.18:55:52.03#ibcon#read 6, iclass 4, count 2 2006.229.18:55:52.03#ibcon#end of sib2, iclass 4, count 2 2006.229.18:55:52.03#ibcon#*after write, iclass 4, count 2 2006.229.18:55:52.03#ibcon#*before return 0, iclass 4, count 2 2006.229.18:55:52.03#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:52.03#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.18:55:52.03#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.18:55:52.03#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:52.03#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:52.15#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:52.15#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:52.15#ibcon#enter wrdev, iclass 4, count 0 2006.229.18:55:52.15#ibcon#first serial, iclass 4, count 0 2006.229.18:55:52.15#ibcon#enter sib2, iclass 4, count 0 2006.229.18:55:52.15#ibcon#flushed, iclass 4, count 0 2006.229.18:55:52.15#ibcon#about to write, iclass 4, count 0 2006.229.18:55:52.15#ibcon#wrote, iclass 4, count 0 2006.229.18:55:52.15#ibcon#about to read 3, iclass 4, count 0 2006.229.18:55:52.17#ibcon#read 3, iclass 4, count 0 2006.229.18:55:52.17#ibcon#about to read 4, iclass 4, count 0 2006.229.18:55:52.17#ibcon#read 4, iclass 4, count 0 2006.229.18:55:52.17#ibcon#about to read 5, iclass 4, count 0 2006.229.18:55:52.17#ibcon#read 5, iclass 4, count 0 2006.229.18:55:52.17#ibcon#about to read 6, iclass 4, count 0 2006.229.18:55:52.17#ibcon#read 6, iclass 4, count 0 2006.229.18:55:52.17#ibcon#end of sib2, iclass 4, count 0 2006.229.18:55:52.17#ibcon#*mode == 0, iclass 4, count 0 2006.229.18:55:52.17#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.18:55:52.17#ibcon#[27=USB\r\n] 2006.229.18:55:52.17#ibcon#*before write, iclass 4, count 0 2006.229.18:55:52.17#ibcon#enter sib2, iclass 4, count 0 2006.229.18:55:52.17#ibcon#flushed, iclass 4, count 0 2006.229.18:55:52.17#ibcon#about to write, iclass 4, count 0 2006.229.18:55:52.17#ibcon#wrote, iclass 4, count 0 2006.229.18:55:52.17#ibcon#about to read 3, iclass 4, count 0 2006.229.18:55:52.20#ibcon#read 3, iclass 4, count 0 2006.229.18:55:52.20#ibcon#about to read 4, iclass 4, count 0 2006.229.18:55:52.20#ibcon#read 4, iclass 4, count 0 2006.229.18:55:52.20#ibcon#about to read 5, iclass 4, count 0 2006.229.18:55:52.20#ibcon#read 5, iclass 4, count 0 2006.229.18:55:52.20#ibcon#about to read 6, iclass 4, count 0 2006.229.18:55:52.20#ibcon#read 6, iclass 4, count 0 2006.229.18:55:52.20#ibcon#end of sib2, iclass 4, count 0 2006.229.18:55:52.20#ibcon#*after write, iclass 4, count 0 2006.229.18:55:52.20#ibcon#*before return 0, iclass 4, count 0 2006.229.18:55:52.20#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:52.20#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.18:55:52.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.18:55:52.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.18:55:52.20$vck44/vblo=8,744.99 2006.229.18:55:52.20#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.18:55:52.20#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.18:55:52.20#ibcon#ireg 17 cls_cnt 0 2006.229.18:55:52.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:52.20#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:52.20#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:52.20#ibcon#enter wrdev, iclass 6, count 0 2006.229.18:55:52.20#ibcon#first serial, iclass 6, count 0 2006.229.18:55:52.20#ibcon#enter sib2, iclass 6, count 0 2006.229.18:55:52.20#ibcon#flushed, iclass 6, count 0 2006.229.18:55:52.20#ibcon#about to write, iclass 6, count 0 2006.229.18:55:52.20#ibcon#wrote, iclass 6, count 0 2006.229.18:55:52.20#ibcon#about to read 3, iclass 6, count 0 2006.229.18:55:52.22#ibcon#read 3, iclass 6, count 0 2006.229.18:55:52.22#ibcon#about to read 4, iclass 6, count 0 2006.229.18:55:52.22#ibcon#read 4, iclass 6, count 0 2006.229.18:55:52.22#ibcon#about to read 5, iclass 6, count 0 2006.229.18:55:52.22#ibcon#read 5, iclass 6, count 0 2006.229.18:55:52.22#ibcon#about to read 6, iclass 6, count 0 2006.229.18:55:52.22#ibcon#read 6, iclass 6, count 0 2006.229.18:55:52.22#ibcon#end of sib2, iclass 6, count 0 2006.229.18:55:52.22#ibcon#*mode == 0, iclass 6, count 0 2006.229.18:55:52.22#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.18:55:52.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.18:55:52.22#ibcon#*before write, iclass 6, count 0 2006.229.18:55:52.22#ibcon#enter sib2, iclass 6, count 0 2006.229.18:55:52.22#ibcon#flushed, iclass 6, count 0 2006.229.18:55:52.22#ibcon#about to write, iclass 6, count 0 2006.229.18:55:52.22#ibcon#wrote, iclass 6, count 0 2006.229.18:55:52.22#ibcon#about to read 3, iclass 6, count 0 2006.229.18:55:52.26#ibcon#read 3, iclass 6, count 0 2006.229.18:55:52.26#ibcon#about to read 4, iclass 6, count 0 2006.229.18:55:52.26#ibcon#read 4, iclass 6, count 0 2006.229.18:55:52.26#ibcon#about to read 5, iclass 6, count 0 2006.229.18:55:52.26#ibcon#read 5, iclass 6, count 0 2006.229.18:55:52.26#ibcon#about to read 6, iclass 6, count 0 2006.229.18:55:52.26#ibcon#read 6, iclass 6, count 0 2006.229.18:55:52.26#ibcon#end of sib2, iclass 6, count 0 2006.229.18:55:52.26#ibcon#*after write, iclass 6, count 0 2006.229.18:55:52.26#ibcon#*before return 0, iclass 6, count 0 2006.229.18:55:52.26#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:52.26#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.18:55:52.26#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.18:55:52.26#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.18:55:52.26$vck44/vb=8,4 2006.229.18:55:52.26#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.18:55:52.26#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.18:55:52.26#ibcon#ireg 11 cls_cnt 2 2006.229.18:55:52.26#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:52.32#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:52.32#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:52.32#ibcon#enter wrdev, iclass 10, count 2 2006.229.18:55:52.32#ibcon#first serial, iclass 10, count 2 2006.229.18:55:52.32#ibcon#enter sib2, iclass 10, count 2 2006.229.18:55:52.32#ibcon#flushed, iclass 10, count 2 2006.229.18:55:52.32#ibcon#about to write, iclass 10, count 2 2006.229.18:55:52.32#ibcon#wrote, iclass 10, count 2 2006.229.18:55:52.32#ibcon#about to read 3, iclass 10, count 2 2006.229.18:55:52.34#ibcon#read 3, iclass 10, count 2 2006.229.18:55:52.34#ibcon#about to read 4, iclass 10, count 2 2006.229.18:55:52.34#ibcon#read 4, iclass 10, count 2 2006.229.18:55:52.34#ibcon#about to read 5, iclass 10, count 2 2006.229.18:55:52.34#ibcon#read 5, iclass 10, count 2 2006.229.18:55:52.34#ibcon#about to read 6, iclass 10, count 2 2006.229.18:55:52.34#ibcon#read 6, iclass 10, count 2 2006.229.18:55:52.34#ibcon#end of sib2, iclass 10, count 2 2006.229.18:55:52.34#ibcon#*mode == 0, iclass 10, count 2 2006.229.18:55:52.34#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.18:55:52.34#ibcon#[27=AT08-04\r\n] 2006.229.18:55:52.34#ibcon#*before write, iclass 10, count 2 2006.229.18:55:52.34#ibcon#enter sib2, iclass 10, count 2 2006.229.18:55:52.34#ibcon#flushed, iclass 10, count 2 2006.229.18:55:52.34#ibcon#about to write, iclass 10, count 2 2006.229.18:55:52.34#ibcon#wrote, iclass 10, count 2 2006.229.18:55:52.34#ibcon#about to read 3, iclass 10, count 2 2006.229.18:55:52.37#ibcon#read 3, iclass 10, count 2 2006.229.18:55:52.37#ibcon#about to read 4, iclass 10, count 2 2006.229.18:55:52.37#ibcon#read 4, iclass 10, count 2 2006.229.18:55:52.37#ibcon#about to read 5, iclass 10, count 2 2006.229.18:55:52.37#ibcon#read 5, iclass 10, count 2 2006.229.18:55:52.37#ibcon#about to read 6, iclass 10, count 2 2006.229.18:55:52.37#ibcon#read 6, iclass 10, count 2 2006.229.18:55:52.37#ibcon#end of sib2, iclass 10, count 2 2006.229.18:55:52.37#ibcon#*after write, iclass 10, count 2 2006.229.18:55:52.37#ibcon#*before return 0, iclass 10, count 2 2006.229.18:55:52.37#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:52.37#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.18:55:52.37#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.18:55:52.37#ibcon#ireg 7 cls_cnt 0 2006.229.18:55:52.37#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:52.49#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:52.49#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:52.49#ibcon#enter wrdev, iclass 10, count 0 2006.229.18:55:52.49#ibcon#first serial, iclass 10, count 0 2006.229.18:55:52.49#ibcon#enter sib2, iclass 10, count 0 2006.229.18:55:52.49#ibcon#flushed, iclass 10, count 0 2006.229.18:55:52.49#ibcon#about to write, iclass 10, count 0 2006.229.18:55:52.49#ibcon#wrote, iclass 10, count 0 2006.229.18:55:52.49#ibcon#about to read 3, iclass 10, count 0 2006.229.18:55:52.51#ibcon#read 3, iclass 10, count 0 2006.229.18:55:52.51#ibcon#about to read 4, iclass 10, count 0 2006.229.18:55:52.51#ibcon#read 4, iclass 10, count 0 2006.229.18:55:52.51#ibcon#about to read 5, iclass 10, count 0 2006.229.18:55:52.51#ibcon#read 5, iclass 10, count 0 2006.229.18:55:52.51#ibcon#about to read 6, iclass 10, count 0 2006.229.18:55:52.51#ibcon#read 6, iclass 10, count 0 2006.229.18:55:52.51#ibcon#end of sib2, iclass 10, count 0 2006.229.18:55:52.51#ibcon#*mode == 0, iclass 10, count 0 2006.229.18:55:52.51#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.18:55:52.51#ibcon#[27=USB\r\n] 2006.229.18:55:52.51#ibcon#*before write, iclass 10, count 0 2006.229.18:55:52.51#ibcon#enter sib2, iclass 10, count 0 2006.229.18:55:52.51#ibcon#flushed, iclass 10, count 0 2006.229.18:55:52.51#ibcon#about to write, iclass 10, count 0 2006.229.18:55:52.51#ibcon#wrote, iclass 10, count 0 2006.229.18:55:52.51#ibcon#about to read 3, iclass 10, count 0 2006.229.18:55:52.54#ibcon#read 3, iclass 10, count 0 2006.229.18:55:52.54#ibcon#about to read 4, iclass 10, count 0 2006.229.18:55:52.54#ibcon#read 4, iclass 10, count 0 2006.229.18:55:52.54#ibcon#about to read 5, iclass 10, count 0 2006.229.18:55:52.54#ibcon#read 5, iclass 10, count 0 2006.229.18:55:52.54#ibcon#about to read 6, iclass 10, count 0 2006.229.18:55:52.54#ibcon#read 6, iclass 10, count 0 2006.229.18:55:52.54#ibcon#end of sib2, iclass 10, count 0 2006.229.18:55:52.54#ibcon#*after write, iclass 10, count 0 2006.229.18:55:52.54#ibcon#*before return 0, iclass 10, count 0 2006.229.18:55:52.54#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:52.54#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.18:55:52.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.18:55:52.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.18:55:52.54$vck44/vabw=wide 2006.229.18:55:52.54#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.18:55:52.54#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.18:55:52.54#ibcon#ireg 8 cls_cnt 0 2006.229.18:55:52.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:52.54#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:52.54#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:52.54#ibcon#enter wrdev, iclass 12, count 0 2006.229.18:55:52.54#ibcon#first serial, iclass 12, count 0 2006.229.18:55:52.54#ibcon#enter sib2, iclass 12, count 0 2006.229.18:55:52.54#ibcon#flushed, iclass 12, count 0 2006.229.18:55:52.54#ibcon#about to write, iclass 12, count 0 2006.229.18:55:52.54#ibcon#wrote, iclass 12, count 0 2006.229.18:55:52.54#ibcon#about to read 3, iclass 12, count 0 2006.229.18:55:52.56#ibcon#read 3, iclass 12, count 0 2006.229.18:55:52.56#ibcon#about to read 4, iclass 12, count 0 2006.229.18:55:52.56#ibcon#read 4, iclass 12, count 0 2006.229.18:55:52.56#ibcon#about to read 5, iclass 12, count 0 2006.229.18:55:52.56#ibcon#read 5, iclass 12, count 0 2006.229.18:55:52.56#ibcon#about to read 6, iclass 12, count 0 2006.229.18:55:52.56#ibcon#read 6, iclass 12, count 0 2006.229.18:55:52.56#ibcon#end of sib2, iclass 12, count 0 2006.229.18:55:52.56#ibcon#*mode == 0, iclass 12, count 0 2006.229.18:55:52.56#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.18:55:52.56#ibcon#[25=BW32\r\n] 2006.229.18:55:52.56#ibcon#*before write, iclass 12, count 0 2006.229.18:55:52.56#ibcon#enter sib2, iclass 12, count 0 2006.229.18:55:52.56#ibcon#flushed, iclass 12, count 0 2006.229.18:55:52.56#ibcon#about to write, iclass 12, count 0 2006.229.18:55:52.56#ibcon#wrote, iclass 12, count 0 2006.229.18:55:52.56#ibcon#about to read 3, iclass 12, count 0 2006.229.18:55:52.59#ibcon#read 3, iclass 12, count 0 2006.229.18:55:52.59#ibcon#about to read 4, iclass 12, count 0 2006.229.18:55:52.59#ibcon#read 4, iclass 12, count 0 2006.229.18:55:52.59#ibcon#about to read 5, iclass 12, count 0 2006.229.18:55:52.59#ibcon#read 5, iclass 12, count 0 2006.229.18:55:52.59#ibcon#about to read 6, iclass 12, count 0 2006.229.18:55:52.59#ibcon#read 6, iclass 12, count 0 2006.229.18:55:52.59#ibcon#end of sib2, iclass 12, count 0 2006.229.18:55:52.59#ibcon#*after write, iclass 12, count 0 2006.229.18:55:52.59#ibcon#*before return 0, iclass 12, count 0 2006.229.18:55:52.59#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:52.59#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.18:55:52.59#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.18:55:52.59#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.18:55:52.59$vck44/vbbw=wide 2006.229.18:55:52.59#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.18:55:52.59#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.18:55:52.59#ibcon#ireg 8 cls_cnt 0 2006.229.18:55:52.59#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:55:52.66#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:55:52.66#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:55:52.66#ibcon#enter wrdev, iclass 14, count 0 2006.229.18:55:52.66#ibcon#first serial, iclass 14, count 0 2006.229.18:55:52.66#ibcon#enter sib2, iclass 14, count 0 2006.229.18:55:52.66#ibcon#flushed, iclass 14, count 0 2006.229.18:55:52.66#ibcon#about to write, iclass 14, count 0 2006.229.18:55:52.66#ibcon#wrote, iclass 14, count 0 2006.229.18:55:52.66#ibcon#about to read 3, iclass 14, count 0 2006.229.18:55:52.68#ibcon#read 3, iclass 14, count 0 2006.229.18:55:52.68#ibcon#about to read 4, iclass 14, count 0 2006.229.18:55:52.68#ibcon#read 4, iclass 14, count 0 2006.229.18:55:52.68#ibcon#about to read 5, iclass 14, count 0 2006.229.18:55:52.68#ibcon#read 5, iclass 14, count 0 2006.229.18:55:52.68#ibcon#about to read 6, iclass 14, count 0 2006.229.18:55:52.68#ibcon#read 6, iclass 14, count 0 2006.229.18:55:52.68#ibcon#end of sib2, iclass 14, count 0 2006.229.18:55:52.68#ibcon#*mode == 0, iclass 14, count 0 2006.229.18:55:52.68#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.18:55:52.68#ibcon#[27=BW32\r\n] 2006.229.18:55:52.68#ibcon#*before write, iclass 14, count 0 2006.229.18:55:52.68#ibcon#enter sib2, iclass 14, count 0 2006.229.18:55:52.68#ibcon#flushed, iclass 14, count 0 2006.229.18:55:52.68#ibcon#about to write, iclass 14, count 0 2006.229.18:55:52.68#ibcon#wrote, iclass 14, count 0 2006.229.18:55:52.68#ibcon#about to read 3, iclass 14, count 0 2006.229.18:55:52.71#ibcon#read 3, iclass 14, count 0 2006.229.18:55:52.71#ibcon#about to read 4, iclass 14, count 0 2006.229.18:55:52.71#ibcon#read 4, iclass 14, count 0 2006.229.18:55:52.71#ibcon#about to read 5, iclass 14, count 0 2006.229.18:55:52.71#ibcon#read 5, iclass 14, count 0 2006.229.18:55:52.71#ibcon#about to read 6, iclass 14, count 0 2006.229.18:55:52.71#ibcon#read 6, iclass 14, count 0 2006.229.18:55:52.71#ibcon#end of sib2, iclass 14, count 0 2006.229.18:55:52.71#ibcon#*after write, iclass 14, count 0 2006.229.18:55:52.71#ibcon#*before return 0, iclass 14, count 0 2006.229.18:55:52.71#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:55:52.71#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.18:55:52.71#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.18:55:52.71#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.18:55:52.71$setupk4/ifdk4 2006.229.18:55:52.71$ifdk4/lo= 2006.229.18:55:52.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.18:55:52.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.18:55:52.71$ifdk4/patch= 2006.229.18:55:52.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.18:55:52.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.18:55:52.71$setupk4/!*+20s 2006.229.18:55:56.14#trakl#Source acquired 2006.229.18:55:57.14#flagr#flagr/antenna,acquired 2006.229.18:55:58.62#abcon#<5=/06 1.6 3.1 26.141001001.2\r\n> 2006.229.18:55:58.64#abcon#{5=INTERFACE CLEAR} 2006.229.18:55:58.70#abcon#[5=S1D000X0/0*\r\n] 2006.229.18:56:07.21$setupk4/"tpicd 2006.229.18:56:07.21$setupk4/echo=off 2006.229.18:56:07.21$setupk4/xlog=off 2006.229.18:56:07.21:!2006.229.18:56:53 2006.229.18:56:53.00:preob 2006.229.18:56:53.13/onsource/TRACKING 2006.229.18:56:53.13:!2006.229.18:57:03 2006.229.18:57:03.00:"tape 2006.229.18:57:03.00:"st=record 2006.229.18:57:03.00:data_valid=on 2006.229.18:57:03.00:midob 2006.229.18:57:03.13/onsource/TRACKING 2006.229.18:57:03.13/wx/26.14,1001.2,100 2006.229.18:57:03.22/cable/+6.4170E-03 2006.229.18:57:04.31/va/01,08,usb,yes,32,34 2006.229.18:57:04.31/va/02,07,usb,yes,34,35 2006.229.18:57:04.31/va/03,06,usb,yes,42,45 2006.229.18:57:04.31/va/04,07,usb,yes,35,37 2006.229.18:57:04.31/va/05,04,usb,yes,32,32 2006.229.18:57:04.31/va/06,04,usb,yes,35,35 2006.229.18:57:04.31/va/07,05,usb,yes,31,32 2006.229.18:57:04.31/va/08,06,usb,yes,23,28 2006.229.18:57:04.54/valo/01,524.99,yes,locked 2006.229.18:57:04.54/valo/02,534.99,yes,locked 2006.229.18:57:04.54/valo/03,564.99,yes,locked 2006.229.18:57:04.54/valo/04,624.99,yes,locked 2006.229.18:57:04.54/valo/05,734.99,yes,locked 2006.229.18:57:04.54/valo/06,814.99,yes,locked 2006.229.18:57:04.54/valo/07,864.99,yes,locked 2006.229.18:57:04.54/valo/08,884.99,yes,locked 2006.229.18:57:05.63/vb/01,04,usb,yes,32,29 2006.229.18:57:05.63/vb/02,04,usb,yes,34,34 2006.229.18:57:05.63/vb/03,04,usb,yes,31,34 2006.229.18:57:05.63/vb/04,04,usb,yes,36,34 2006.229.18:57:05.63/vb/05,04,usb,yes,28,30 2006.229.18:57:05.63/vb/06,04,usb,yes,32,28 2006.229.18:57:05.63/vb/07,04,usb,yes,32,32 2006.229.18:57:05.63/vb/08,04,usb,yes,29,33 2006.229.18:57:05.86/vblo/01,629.99,yes,locked 2006.229.18:57:05.86/vblo/02,634.99,yes,locked 2006.229.18:57:05.86/vblo/03,649.99,yes,locked 2006.229.18:57:05.86/vblo/04,679.99,yes,locked 2006.229.18:57:05.86/vblo/05,709.99,yes,locked 2006.229.18:57:05.86/vblo/06,719.99,yes,locked 2006.229.18:57:05.86/vblo/07,734.99,yes,locked 2006.229.18:57:05.86/vblo/08,744.99,yes,locked 2006.229.18:57:06.01/vabw/8 2006.229.18:57:06.16/vbbw/8 2006.229.18:57:06.25/xfe/off,on,12.0 2006.229.18:57:06.64/ifatt/23,28,28,28 2006.229.18:57:07.08/fmout-gps/S +4.45E-07 2006.229.18:57:07.12:!2006.229.19:00:13 2006.229.19:00:13.00:data_valid=off 2006.229.19:00:13.00:"et 2006.229.19:00:13.00:!+3s 2006.229.19:00:16.01:"tape 2006.229.19:00:16.01:postob 2006.229.19:00:16.19/cable/+6.4187E-03 2006.229.19:00:16.19/wx/26.12,1001.3,100 2006.229.19:00:17.08/fmout-gps/S +4.45E-07 2006.229.19:00:17.08:scan_name=229-1903,jd0608,140 2006.229.19:00:17.08:source=0059+581,010245.76,582411.1,2000.0,ccw 2006.229.19:00:18.14#flagr#flagr/antenna,new-source 2006.229.19:00:18.14:checkk5 2006.229.19:00:18.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:00:18.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:00:19.27/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:00:19.66/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:00:20.05/chk_obsdata//k5ts1/T2291857??a.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.19:00:20.45/chk_obsdata//k5ts2/T2291857??b.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.19:00:20.83/chk_obsdata//k5ts3/T2291857??c.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.19:00:21.22/chk_obsdata//k5ts4/T2291857??d.dat file size is correct (nominal:760MB, actual:756MB). 2006.229.19:00:21.94/k5log//k5ts1_log_newline 2006.229.19:00:22.64/k5log//k5ts2_log_newline 2006.229.19:00:23.36/k5log//k5ts3_log_newline 2006.229.19:00:24.07/k5log//k5ts4_log_newline 2006.229.19:00:24.10/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:00:24.10:setupk4=1 2006.229.19:00:24.10$setupk4/echo=on 2006.229.19:00:24.10$setupk4/pcalon 2006.229.19:00:24.10$pcalon/"no phase cal control is implemented here 2006.229.19:00:24.10$setupk4/"tpicd=stop 2006.229.19:00:24.10$setupk4/"rec=synch_on 2006.229.19:00:24.10$setupk4/"rec_mode=128 2006.229.19:00:24.10$setupk4/!* 2006.229.19:00:24.10$setupk4/recpk4 2006.229.19:00:24.10$recpk4/recpatch= 2006.229.19:00:24.10$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:00:24.10$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:00:24.10$setupk4/vck44 2006.229.19:00:24.10$vck44/valo=1,524.99 2006.229.19:00:24.10#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:00:24.10#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:00:24.10#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:24.10#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:24.10#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:24.10#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:24.10#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:00:24.10#ibcon#first serial, iclass 19, count 0 2006.229.19:00:24.10#ibcon#enter sib2, iclass 19, count 0 2006.229.19:00:24.10#ibcon#flushed, iclass 19, count 0 2006.229.19:00:24.10#ibcon#about to write, iclass 19, count 0 2006.229.19:00:24.10#ibcon#wrote, iclass 19, count 0 2006.229.19:00:24.10#ibcon#about to read 3, iclass 19, count 0 2006.229.19:00:24.11#ibcon#read 3, iclass 19, count 0 2006.229.19:00:24.12#ibcon#about to read 4, iclass 19, count 0 2006.229.19:00:24.12#ibcon#read 4, iclass 19, count 0 2006.229.19:00:24.12#ibcon#about to read 5, iclass 19, count 0 2006.229.19:00:24.12#ibcon#read 5, iclass 19, count 0 2006.229.19:00:24.12#ibcon#about to read 6, iclass 19, count 0 2006.229.19:00:24.12#ibcon#read 6, iclass 19, count 0 2006.229.19:00:24.12#ibcon#end of sib2, iclass 19, count 0 2006.229.19:00:24.12#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:00:24.12#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:00:24.12#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:00:24.12#ibcon#*before write, iclass 19, count 0 2006.229.19:00:24.12#ibcon#enter sib2, iclass 19, count 0 2006.229.19:00:24.12#ibcon#flushed, iclass 19, count 0 2006.229.19:00:24.12#ibcon#about to write, iclass 19, count 0 2006.229.19:00:24.12#ibcon#wrote, iclass 19, count 0 2006.229.19:00:24.12#ibcon#about to read 3, iclass 19, count 0 2006.229.19:00:24.16#ibcon#read 3, iclass 19, count 0 2006.229.19:00:24.17#ibcon#about to read 4, iclass 19, count 0 2006.229.19:00:24.17#ibcon#read 4, iclass 19, count 0 2006.229.19:00:24.17#ibcon#about to read 5, iclass 19, count 0 2006.229.19:00:24.17#ibcon#read 5, iclass 19, count 0 2006.229.19:00:24.17#ibcon#about to read 6, iclass 19, count 0 2006.229.19:00:24.17#ibcon#read 6, iclass 19, count 0 2006.229.19:00:24.17#ibcon#end of sib2, iclass 19, count 0 2006.229.19:00:24.17#ibcon#*after write, iclass 19, count 0 2006.229.19:00:24.17#ibcon#*before return 0, iclass 19, count 0 2006.229.19:00:24.17#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:24.17#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:24.17#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:00:24.17#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:00:24.17$vck44/va=1,8 2006.229.19:00:24.17#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.19:00:24.17#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.19:00:24.17#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:24.17#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:24.17#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:24.17#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:24.17#ibcon#enter wrdev, iclass 21, count 2 2006.229.19:00:24.17#ibcon#first serial, iclass 21, count 2 2006.229.19:00:24.17#ibcon#enter sib2, iclass 21, count 2 2006.229.19:00:24.17#ibcon#flushed, iclass 21, count 2 2006.229.19:00:24.17#ibcon#about to write, iclass 21, count 2 2006.229.19:00:24.17#ibcon#wrote, iclass 21, count 2 2006.229.19:00:24.17#ibcon#about to read 3, iclass 21, count 2 2006.229.19:00:24.18#ibcon#read 3, iclass 21, count 2 2006.229.19:00:24.19#ibcon#about to read 4, iclass 21, count 2 2006.229.19:00:24.19#ibcon#read 4, iclass 21, count 2 2006.229.19:00:24.19#ibcon#about to read 5, iclass 21, count 2 2006.229.19:00:24.19#ibcon#read 5, iclass 21, count 2 2006.229.19:00:24.19#ibcon#about to read 6, iclass 21, count 2 2006.229.19:00:24.19#ibcon#read 6, iclass 21, count 2 2006.229.19:00:24.19#ibcon#end of sib2, iclass 21, count 2 2006.229.19:00:24.19#ibcon#*mode == 0, iclass 21, count 2 2006.229.19:00:24.19#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.19:00:24.19#ibcon#[25=AT01-08\r\n] 2006.229.19:00:24.19#ibcon#*before write, iclass 21, count 2 2006.229.19:00:24.19#ibcon#enter sib2, iclass 21, count 2 2006.229.19:00:24.19#ibcon#flushed, iclass 21, count 2 2006.229.19:00:24.19#ibcon#about to write, iclass 21, count 2 2006.229.19:00:24.19#ibcon#wrote, iclass 21, count 2 2006.229.19:00:24.19#ibcon#about to read 3, iclass 21, count 2 2006.229.19:00:24.21#ibcon#read 3, iclass 21, count 2 2006.229.19:00:24.22#ibcon#about to read 4, iclass 21, count 2 2006.229.19:00:24.22#ibcon#read 4, iclass 21, count 2 2006.229.19:00:24.22#ibcon#about to read 5, iclass 21, count 2 2006.229.19:00:24.22#ibcon#read 5, iclass 21, count 2 2006.229.19:00:24.22#ibcon#about to read 6, iclass 21, count 2 2006.229.19:00:24.22#ibcon#read 6, iclass 21, count 2 2006.229.19:00:24.22#ibcon#end of sib2, iclass 21, count 2 2006.229.19:00:24.22#ibcon#*after write, iclass 21, count 2 2006.229.19:00:24.22#ibcon#*before return 0, iclass 21, count 2 2006.229.19:00:24.22#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:24.22#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:24.22#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.19:00:24.22#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:24.22#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:24.33#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:24.34#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:24.34#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:00:24.34#ibcon#first serial, iclass 21, count 0 2006.229.19:00:24.34#ibcon#enter sib2, iclass 21, count 0 2006.229.19:00:24.34#ibcon#flushed, iclass 21, count 0 2006.229.19:00:24.34#ibcon#about to write, iclass 21, count 0 2006.229.19:00:24.34#ibcon#wrote, iclass 21, count 0 2006.229.19:00:24.34#ibcon#about to read 3, iclass 21, count 0 2006.229.19:00:24.35#ibcon#read 3, iclass 21, count 0 2006.229.19:00:24.36#ibcon#about to read 4, iclass 21, count 0 2006.229.19:00:24.36#ibcon#read 4, iclass 21, count 0 2006.229.19:00:24.36#ibcon#about to read 5, iclass 21, count 0 2006.229.19:00:24.36#ibcon#read 5, iclass 21, count 0 2006.229.19:00:24.36#ibcon#about to read 6, iclass 21, count 0 2006.229.19:00:24.36#ibcon#read 6, iclass 21, count 0 2006.229.19:00:24.36#ibcon#end of sib2, iclass 21, count 0 2006.229.19:00:24.36#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:00:24.36#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:00:24.36#ibcon#[25=USB\r\n] 2006.229.19:00:24.36#ibcon#*before write, iclass 21, count 0 2006.229.19:00:24.36#ibcon#enter sib2, iclass 21, count 0 2006.229.19:00:24.36#ibcon#flushed, iclass 21, count 0 2006.229.19:00:24.36#ibcon#about to write, iclass 21, count 0 2006.229.19:00:24.36#ibcon#wrote, iclass 21, count 0 2006.229.19:00:24.36#ibcon#about to read 3, iclass 21, count 0 2006.229.19:00:24.38#ibcon#read 3, iclass 21, count 0 2006.229.19:00:24.39#ibcon#about to read 4, iclass 21, count 0 2006.229.19:00:24.39#ibcon#read 4, iclass 21, count 0 2006.229.19:00:24.39#ibcon#about to read 5, iclass 21, count 0 2006.229.19:00:24.39#ibcon#read 5, iclass 21, count 0 2006.229.19:00:24.39#ibcon#about to read 6, iclass 21, count 0 2006.229.19:00:24.39#ibcon#read 6, iclass 21, count 0 2006.229.19:00:24.39#ibcon#end of sib2, iclass 21, count 0 2006.229.19:00:24.39#ibcon#*after write, iclass 21, count 0 2006.229.19:00:24.39#ibcon#*before return 0, iclass 21, count 0 2006.229.19:00:24.39#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:24.39#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:24.39#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:00:24.39#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:00:24.39$vck44/valo=2,534.99 2006.229.19:00:24.39#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.19:00:24.39#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.19:00:24.39#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:24.39#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:24.39#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:24.39#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:24.39#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:00:24.39#ibcon#first serial, iclass 23, count 0 2006.229.19:00:24.39#ibcon#enter sib2, iclass 23, count 0 2006.229.19:00:24.39#ibcon#flushed, iclass 23, count 0 2006.229.19:00:24.39#ibcon#about to write, iclass 23, count 0 2006.229.19:00:24.39#ibcon#wrote, iclass 23, count 0 2006.229.19:00:24.39#ibcon#about to read 3, iclass 23, count 0 2006.229.19:00:24.40#ibcon#read 3, iclass 23, count 0 2006.229.19:00:24.41#ibcon#about to read 4, iclass 23, count 0 2006.229.19:00:24.41#ibcon#read 4, iclass 23, count 0 2006.229.19:00:24.41#ibcon#about to read 5, iclass 23, count 0 2006.229.19:00:24.41#ibcon#read 5, iclass 23, count 0 2006.229.19:00:24.41#ibcon#about to read 6, iclass 23, count 0 2006.229.19:00:24.41#ibcon#read 6, iclass 23, count 0 2006.229.19:00:24.41#ibcon#end of sib2, iclass 23, count 0 2006.229.19:00:24.41#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:00:24.41#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:00:24.41#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:00:24.41#ibcon#*before write, iclass 23, count 0 2006.229.19:00:24.41#ibcon#enter sib2, iclass 23, count 0 2006.229.19:00:24.41#ibcon#flushed, iclass 23, count 0 2006.229.19:00:24.41#ibcon#about to write, iclass 23, count 0 2006.229.19:00:24.41#ibcon#wrote, iclass 23, count 0 2006.229.19:00:24.41#ibcon#about to read 3, iclass 23, count 0 2006.229.19:00:24.44#ibcon#read 3, iclass 23, count 0 2006.229.19:00:24.45#ibcon#about to read 4, iclass 23, count 0 2006.229.19:00:24.45#ibcon#read 4, iclass 23, count 0 2006.229.19:00:24.45#ibcon#about to read 5, iclass 23, count 0 2006.229.19:00:24.45#ibcon#read 5, iclass 23, count 0 2006.229.19:00:24.45#ibcon#about to read 6, iclass 23, count 0 2006.229.19:00:24.45#ibcon#read 6, iclass 23, count 0 2006.229.19:00:24.45#ibcon#end of sib2, iclass 23, count 0 2006.229.19:00:24.45#ibcon#*after write, iclass 23, count 0 2006.229.19:00:24.45#ibcon#*before return 0, iclass 23, count 0 2006.229.19:00:24.45#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:24.45#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:24.45#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:00:24.45#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:00:24.45$vck44/va=2,7 2006.229.19:00:24.45#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.19:00:24.45#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.19:00:24.45#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:24.45#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:24.50#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:24.50#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:24.51#ibcon#enter wrdev, iclass 25, count 2 2006.229.19:00:24.51#ibcon#first serial, iclass 25, count 2 2006.229.19:00:24.51#ibcon#enter sib2, iclass 25, count 2 2006.229.19:00:24.51#ibcon#flushed, iclass 25, count 2 2006.229.19:00:24.51#ibcon#about to write, iclass 25, count 2 2006.229.19:00:24.51#ibcon#wrote, iclass 25, count 2 2006.229.19:00:24.51#ibcon#about to read 3, iclass 25, count 2 2006.229.19:00:24.52#ibcon#read 3, iclass 25, count 2 2006.229.19:00:24.53#ibcon#about to read 4, iclass 25, count 2 2006.229.19:00:24.53#ibcon#read 4, iclass 25, count 2 2006.229.19:00:24.53#ibcon#about to read 5, iclass 25, count 2 2006.229.19:00:24.53#ibcon#read 5, iclass 25, count 2 2006.229.19:00:24.53#ibcon#about to read 6, iclass 25, count 2 2006.229.19:00:24.53#ibcon#read 6, iclass 25, count 2 2006.229.19:00:24.53#ibcon#end of sib2, iclass 25, count 2 2006.229.19:00:24.53#ibcon#*mode == 0, iclass 25, count 2 2006.229.19:00:24.53#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.19:00:24.53#ibcon#[25=AT02-07\r\n] 2006.229.19:00:24.53#ibcon#*before write, iclass 25, count 2 2006.229.19:00:24.53#ibcon#enter sib2, iclass 25, count 2 2006.229.19:00:24.53#ibcon#flushed, iclass 25, count 2 2006.229.19:00:24.53#ibcon#about to write, iclass 25, count 2 2006.229.19:00:24.53#ibcon#wrote, iclass 25, count 2 2006.229.19:00:24.53#ibcon#about to read 3, iclass 25, count 2 2006.229.19:00:24.55#ibcon#read 3, iclass 25, count 2 2006.229.19:00:24.56#ibcon#about to read 4, iclass 25, count 2 2006.229.19:00:24.56#ibcon#read 4, iclass 25, count 2 2006.229.19:00:24.56#ibcon#about to read 5, iclass 25, count 2 2006.229.19:00:24.56#ibcon#read 5, iclass 25, count 2 2006.229.19:00:24.56#ibcon#about to read 6, iclass 25, count 2 2006.229.19:00:24.56#ibcon#read 6, iclass 25, count 2 2006.229.19:00:24.56#ibcon#end of sib2, iclass 25, count 2 2006.229.19:00:24.56#ibcon#*after write, iclass 25, count 2 2006.229.19:00:24.56#ibcon#*before return 0, iclass 25, count 2 2006.229.19:00:24.56#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:24.56#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:24.56#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.19:00:24.56#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:24.56#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:24.67#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:24.68#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:24.68#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:00:24.68#ibcon#first serial, iclass 25, count 0 2006.229.19:00:24.68#ibcon#enter sib2, iclass 25, count 0 2006.229.19:00:24.68#ibcon#flushed, iclass 25, count 0 2006.229.19:00:24.68#ibcon#about to write, iclass 25, count 0 2006.229.19:00:24.68#ibcon#wrote, iclass 25, count 0 2006.229.19:00:24.68#ibcon#about to read 3, iclass 25, count 0 2006.229.19:00:24.69#ibcon#read 3, iclass 25, count 0 2006.229.19:00:24.70#ibcon#about to read 4, iclass 25, count 0 2006.229.19:00:24.70#ibcon#read 4, iclass 25, count 0 2006.229.19:00:24.70#ibcon#about to read 5, iclass 25, count 0 2006.229.19:00:24.70#ibcon#read 5, iclass 25, count 0 2006.229.19:00:24.70#ibcon#about to read 6, iclass 25, count 0 2006.229.19:00:24.70#ibcon#read 6, iclass 25, count 0 2006.229.19:00:24.70#ibcon#end of sib2, iclass 25, count 0 2006.229.19:00:24.70#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:00:24.70#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:00:24.70#ibcon#[25=USB\r\n] 2006.229.19:00:24.70#ibcon#*before write, iclass 25, count 0 2006.229.19:00:24.70#ibcon#enter sib2, iclass 25, count 0 2006.229.19:00:24.70#ibcon#flushed, iclass 25, count 0 2006.229.19:00:24.70#ibcon#about to write, iclass 25, count 0 2006.229.19:00:24.70#ibcon#wrote, iclass 25, count 0 2006.229.19:00:24.70#ibcon#about to read 3, iclass 25, count 0 2006.229.19:00:24.72#ibcon#read 3, iclass 25, count 0 2006.229.19:00:24.73#ibcon#about to read 4, iclass 25, count 0 2006.229.19:00:24.73#ibcon#read 4, iclass 25, count 0 2006.229.19:00:24.73#ibcon#about to read 5, iclass 25, count 0 2006.229.19:00:24.73#ibcon#read 5, iclass 25, count 0 2006.229.19:00:24.73#ibcon#about to read 6, iclass 25, count 0 2006.229.19:00:24.73#ibcon#read 6, iclass 25, count 0 2006.229.19:00:24.73#ibcon#end of sib2, iclass 25, count 0 2006.229.19:00:24.73#ibcon#*after write, iclass 25, count 0 2006.229.19:00:24.73#ibcon#*before return 0, iclass 25, count 0 2006.229.19:00:24.73#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:24.73#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:24.73#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:00:24.73#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:00:24.73$vck44/valo=3,564.99 2006.229.19:00:24.73#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.19:00:24.73#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.19:00:24.73#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:24.73#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:24.73#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:24.73#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:24.73#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:00:24.73#ibcon#first serial, iclass 27, count 0 2006.229.19:00:24.73#ibcon#enter sib2, iclass 27, count 0 2006.229.19:00:24.73#ibcon#flushed, iclass 27, count 0 2006.229.19:00:24.73#ibcon#about to write, iclass 27, count 0 2006.229.19:00:24.73#ibcon#wrote, iclass 27, count 0 2006.229.19:00:24.73#ibcon#about to read 3, iclass 27, count 0 2006.229.19:00:24.74#ibcon#read 3, iclass 27, count 0 2006.229.19:00:24.75#ibcon#about to read 4, iclass 27, count 0 2006.229.19:00:24.75#ibcon#read 4, iclass 27, count 0 2006.229.19:00:24.75#ibcon#about to read 5, iclass 27, count 0 2006.229.19:00:24.75#ibcon#read 5, iclass 27, count 0 2006.229.19:00:24.75#ibcon#about to read 6, iclass 27, count 0 2006.229.19:00:24.75#ibcon#read 6, iclass 27, count 0 2006.229.19:00:24.75#ibcon#end of sib2, iclass 27, count 0 2006.229.19:00:24.75#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:00:24.75#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:00:24.75#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:00:24.75#ibcon#*before write, iclass 27, count 0 2006.229.19:00:24.75#ibcon#enter sib2, iclass 27, count 0 2006.229.19:00:24.75#ibcon#flushed, iclass 27, count 0 2006.229.19:00:24.75#ibcon#about to write, iclass 27, count 0 2006.229.19:00:24.75#ibcon#wrote, iclass 27, count 0 2006.229.19:00:24.75#ibcon#about to read 3, iclass 27, count 0 2006.229.19:00:24.78#ibcon#read 3, iclass 27, count 0 2006.229.19:00:24.79#ibcon#about to read 4, iclass 27, count 0 2006.229.19:00:24.79#ibcon#read 4, iclass 27, count 0 2006.229.19:00:24.79#ibcon#about to read 5, iclass 27, count 0 2006.229.19:00:24.79#ibcon#read 5, iclass 27, count 0 2006.229.19:00:24.79#ibcon#about to read 6, iclass 27, count 0 2006.229.19:00:24.79#ibcon#read 6, iclass 27, count 0 2006.229.19:00:24.79#ibcon#end of sib2, iclass 27, count 0 2006.229.19:00:24.79#ibcon#*after write, iclass 27, count 0 2006.229.19:00:24.79#ibcon#*before return 0, iclass 27, count 0 2006.229.19:00:24.79#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:24.79#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:24.79#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:00:24.79#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:00:24.79$vck44/va=3,6 2006.229.19:00:24.79#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.19:00:24.79#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.19:00:24.79#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:24.79#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:24.84#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:24.85#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:24.85#ibcon#enter wrdev, iclass 29, count 2 2006.229.19:00:24.85#ibcon#first serial, iclass 29, count 2 2006.229.19:00:24.85#ibcon#enter sib2, iclass 29, count 2 2006.229.19:00:24.85#ibcon#flushed, iclass 29, count 2 2006.229.19:00:24.85#ibcon#about to write, iclass 29, count 2 2006.229.19:00:24.85#ibcon#wrote, iclass 29, count 2 2006.229.19:00:24.85#ibcon#about to read 3, iclass 29, count 2 2006.229.19:00:24.86#ibcon#read 3, iclass 29, count 2 2006.229.19:00:24.87#ibcon#about to read 4, iclass 29, count 2 2006.229.19:00:24.87#ibcon#read 4, iclass 29, count 2 2006.229.19:00:24.87#ibcon#about to read 5, iclass 29, count 2 2006.229.19:00:24.87#ibcon#read 5, iclass 29, count 2 2006.229.19:00:24.87#ibcon#about to read 6, iclass 29, count 2 2006.229.19:00:24.87#ibcon#read 6, iclass 29, count 2 2006.229.19:00:24.87#ibcon#end of sib2, iclass 29, count 2 2006.229.19:00:24.87#ibcon#*mode == 0, iclass 29, count 2 2006.229.19:00:24.87#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.19:00:24.87#ibcon#[25=AT03-06\r\n] 2006.229.19:00:24.87#ibcon#*before write, iclass 29, count 2 2006.229.19:00:24.87#ibcon#enter sib2, iclass 29, count 2 2006.229.19:00:24.87#ibcon#flushed, iclass 29, count 2 2006.229.19:00:24.87#ibcon#about to write, iclass 29, count 2 2006.229.19:00:24.87#ibcon#wrote, iclass 29, count 2 2006.229.19:00:24.87#ibcon#about to read 3, iclass 29, count 2 2006.229.19:00:24.89#ibcon#read 3, iclass 29, count 2 2006.229.19:00:24.90#ibcon#about to read 4, iclass 29, count 2 2006.229.19:00:24.90#ibcon#read 4, iclass 29, count 2 2006.229.19:00:24.90#ibcon#about to read 5, iclass 29, count 2 2006.229.19:00:24.90#ibcon#read 5, iclass 29, count 2 2006.229.19:00:24.90#ibcon#about to read 6, iclass 29, count 2 2006.229.19:00:24.90#ibcon#read 6, iclass 29, count 2 2006.229.19:00:24.90#ibcon#end of sib2, iclass 29, count 2 2006.229.19:00:24.90#ibcon#*after write, iclass 29, count 2 2006.229.19:00:24.90#ibcon#*before return 0, iclass 29, count 2 2006.229.19:00:24.90#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:24.90#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:24.90#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.19:00:24.90#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:24.90#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:25.01#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:25.02#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:25.02#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:00:25.02#ibcon#first serial, iclass 29, count 0 2006.229.19:00:25.02#ibcon#enter sib2, iclass 29, count 0 2006.229.19:00:25.02#ibcon#flushed, iclass 29, count 0 2006.229.19:00:25.02#ibcon#about to write, iclass 29, count 0 2006.229.19:00:25.02#ibcon#wrote, iclass 29, count 0 2006.229.19:00:25.02#ibcon#about to read 3, iclass 29, count 0 2006.229.19:00:25.03#ibcon#read 3, iclass 29, count 0 2006.229.19:00:25.04#ibcon#about to read 4, iclass 29, count 0 2006.229.19:00:25.04#ibcon#read 4, iclass 29, count 0 2006.229.19:00:25.04#ibcon#about to read 5, iclass 29, count 0 2006.229.19:00:25.04#ibcon#read 5, iclass 29, count 0 2006.229.19:00:25.04#ibcon#about to read 6, iclass 29, count 0 2006.229.19:00:25.04#ibcon#read 6, iclass 29, count 0 2006.229.19:00:25.04#ibcon#end of sib2, iclass 29, count 0 2006.229.19:00:25.04#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:00:25.04#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:00:25.04#ibcon#[25=USB\r\n] 2006.229.19:00:25.04#ibcon#*before write, iclass 29, count 0 2006.229.19:00:25.04#ibcon#enter sib2, iclass 29, count 0 2006.229.19:00:25.04#ibcon#flushed, iclass 29, count 0 2006.229.19:00:25.04#ibcon#about to write, iclass 29, count 0 2006.229.19:00:25.04#ibcon#wrote, iclass 29, count 0 2006.229.19:00:25.04#ibcon#about to read 3, iclass 29, count 0 2006.229.19:00:25.06#ibcon#read 3, iclass 29, count 0 2006.229.19:00:25.06#ibcon#about to read 4, iclass 29, count 0 2006.229.19:00:25.07#ibcon#read 4, iclass 29, count 0 2006.229.19:00:25.07#ibcon#about to read 5, iclass 29, count 0 2006.229.19:00:25.07#ibcon#read 5, iclass 29, count 0 2006.229.19:00:25.07#ibcon#about to read 6, iclass 29, count 0 2006.229.19:00:25.07#ibcon#read 6, iclass 29, count 0 2006.229.19:00:25.07#ibcon#end of sib2, iclass 29, count 0 2006.229.19:00:25.07#ibcon#*after write, iclass 29, count 0 2006.229.19:00:25.07#ibcon#*before return 0, iclass 29, count 0 2006.229.19:00:25.07#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:25.07#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:25.07#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:00:25.07#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:00:25.07$vck44/valo=4,624.99 2006.229.19:00:25.07#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.19:00:25.07#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.19:00:25.07#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:25.07#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:25.07#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:25.07#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:25.07#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:00:25.07#ibcon#first serial, iclass 31, count 0 2006.229.19:00:25.07#ibcon#enter sib2, iclass 31, count 0 2006.229.19:00:25.07#ibcon#flushed, iclass 31, count 0 2006.229.19:00:25.07#ibcon#about to write, iclass 31, count 0 2006.229.19:00:25.07#ibcon#wrote, iclass 31, count 0 2006.229.19:00:25.07#ibcon#about to read 3, iclass 31, count 0 2006.229.19:00:25.08#ibcon#read 3, iclass 31, count 0 2006.229.19:00:25.09#ibcon#about to read 4, iclass 31, count 0 2006.229.19:00:25.09#ibcon#read 4, iclass 31, count 0 2006.229.19:00:25.09#ibcon#about to read 5, iclass 31, count 0 2006.229.19:00:25.09#ibcon#read 5, iclass 31, count 0 2006.229.19:00:25.09#ibcon#about to read 6, iclass 31, count 0 2006.229.19:00:25.09#ibcon#read 6, iclass 31, count 0 2006.229.19:00:25.09#ibcon#end of sib2, iclass 31, count 0 2006.229.19:00:25.09#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:00:25.09#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:00:25.09#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:00:25.09#ibcon#*before write, iclass 31, count 0 2006.229.19:00:25.09#ibcon#enter sib2, iclass 31, count 0 2006.229.19:00:25.09#ibcon#flushed, iclass 31, count 0 2006.229.19:00:25.09#ibcon#about to write, iclass 31, count 0 2006.229.19:00:25.09#ibcon#wrote, iclass 31, count 0 2006.229.19:00:25.09#ibcon#about to read 3, iclass 31, count 0 2006.229.19:00:25.12#ibcon#read 3, iclass 31, count 0 2006.229.19:00:25.13#ibcon#about to read 4, iclass 31, count 0 2006.229.19:00:25.13#ibcon#read 4, iclass 31, count 0 2006.229.19:00:25.13#ibcon#about to read 5, iclass 31, count 0 2006.229.19:00:25.13#ibcon#read 5, iclass 31, count 0 2006.229.19:00:25.13#ibcon#about to read 6, iclass 31, count 0 2006.229.19:00:25.13#ibcon#read 6, iclass 31, count 0 2006.229.19:00:25.13#ibcon#end of sib2, iclass 31, count 0 2006.229.19:00:25.13#ibcon#*after write, iclass 31, count 0 2006.229.19:00:25.13#ibcon#*before return 0, iclass 31, count 0 2006.229.19:00:25.13#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:25.13#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:25.13#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:00:25.13#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:00:25.13$vck44/va=4,7 2006.229.19:00:25.13#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.19:00:25.13#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.19:00:25.13#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:25.13#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:25.18#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:25.19#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:25.19#ibcon#enter wrdev, iclass 33, count 2 2006.229.19:00:25.19#ibcon#first serial, iclass 33, count 2 2006.229.19:00:25.19#ibcon#enter sib2, iclass 33, count 2 2006.229.19:00:25.19#ibcon#flushed, iclass 33, count 2 2006.229.19:00:25.19#ibcon#about to write, iclass 33, count 2 2006.229.19:00:25.19#ibcon#wrote, iclass 33, count 2 2006.229.19:00:25.19#ibcon#about to read 3, iclass 33, count 2 2006.229.19:00:25.20#ibcon#read 3, iclass 33, count 2 2006.229.19:00:25.21#ibcon#about to read 4, iclass 33, count 2 2006.229.19:00:25.21#ibcon#read 4, iclass 33, count 2 2006.229.19:00:25.21#ibcon#about to read 5, iclass 33, count 2 2006.229.19:00:25.21#ibcon#read 5, iclass 33, count 2 2006.229.19:00:25.21#ibcon#about to read 6, iclass 33, count 2 2006.229.19:00:25.21#ibcon#read 6, iclass 33, count 2 2006.229.19:00:25.21#ibcon#end of sib2, iclass 33, count 2 2006.229.19:00:25.21#ibcon#*mode == 0, iclass 33, count 2 2006.229.19:00:25.21#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.19:00:25.21#ibcon#[25=AT04-07\r\n] 2006.229.19:00:25.21#ibcon#*before write, iclass 33, count 2 2006.229.19:00:25.21#ibcon#enter sib2, iclass 33, count 2 2006.229.19:00:25.21#ibcon#flushed, iclass 33, count 2 2006.229.19:00:25.21#ibcon#about to write, iclass 33, count 2 2006.229.19:00:25.21#ibcon#wrote, iclass 33, count 2 2006.229.19:00:25.21#ibcon#about to read 3, iclass 33, count 2 2006.229.19:00:25.23#ibcon#read 3, iclass 33, count 2 2006.229.19:00:25.24#ibcon#about to read 4, iclass 33, count 2 2006.229.19:00:25.24#ibcon#read 4, iclass 33, count 2 2006.229.19:00:25.24#ibcon#about to read 5, iclass 33, count 2 2006.229.19:00:25.24#ibcon#read 5, iclass 33, count 2 2006.229.19:00:25.24#ibcon#about to read 6, iclass 33, count 2 2006.229.19:00:25.24#ibcon#read 6, iclass 33, count 2 2006.229.19:00:25.24#ibcon#end of sib2, iclass 33, count 2 2006.229.19:00:25.24#ibcon#*after write, iclass 33, count 2 2006.229.19:00:25.24#ibcon#*before return 0, iclass 33, count 2 2006.229.19:00:25.24#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:25.24#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:25.24#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.19:00:25.24#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:25.24#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:25.35#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:25.36#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:25.36#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:00:25.36#ibcon#first serial, iclass 33, count 0 2006.229.19:00:25.36#ibcon#enter sib2, iclass 33, count 0 2006.229.19:00:25.36#ibcon#flushed, iclass 33, count 0 2006.229.19:00:25.36#ibcon#about to write, iclass 33, count 0 2006.229.19:00:25.36#ibcon#wrote, iclass 33, count 0 2006.229.19:00:25.36#ibcon#about to read 3, iclass 33, count 0 2006.229.19:00:25.37#ibcon#read 3, iclass 33, count 0 2006.229.19:00:25.38#ibcon#about to read 4, iclass 33, count 0 2006.229.19:00:25.38#ibcon#read 4, iclass 33, count 0 2006.229.19:00:25.38#ibcon#about to read 5, iclass 33, count 0 2006.229.19:00:25.38#ibcon#read 5, iclass 33, count 0 2006.229.19:00:25.38#ibcon#about to read 6, iclass 33, count 0 2006.229.19:00:25.38#ibcon#read 6, iclass 33, count 0 2006.229.19:00:25.38#ibcon#end of sib2, iclass 33, count 0 2006.229.19:00:25.38#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:00:25.38#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:00:25.38#ibcon#[25=USB\r\n] 2006.229.19:00:25.38#ibcon#*before write, iclass 33, count 0 2006.229.19:00:25.38#ibcon#enter sib2, iclass 33, count 0 2006.229.19:00:25.38#ibcon#flushed, iclass 33, count 0 2006.229.19:00:25.38#ibcon#about to write, iclass 33, count 0 2006.229.19:00:25.38#ibcon#wrote, iclass 33, count 0 2006.229.19:00:25.38#ibcon#about to read 3, iclass 33, count 0 2006.229.19:00:25.40#ibcon#read 3, iclass 33, count 0 2006.229.19:00:25.41#ibcon#about to read 4, iclass 33, count 0 2006.229.19:00:25.41#ibcon#read 4, iclass 33, count 0 2006.229.19:00:25.41#ibcon#about to read 5, iclass 33, count 0 2006.229.19:00:25.41#ibcon#read 5, iclass 33, count 0 2006.229.19:00:25.41#ibcon#about to read 6, iclass 33, count 0 2006.229.19:00:25.41#ibcon#read 6, iclass 33, count 0 2006.229.19:00:25.41#ibcon#end of sib2, iclass 33, count 0 2006.229.19:00:25.41#ibcon#*after write, iclass 33, count 0 2006.229.19:00:25.41#ibcon#*before return 0, iclass 33, count 0 2006.229.19:00:25.41#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:25.41#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:25.41#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:00:25.41#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:00:25.41$vck44/valo=5,734.99 2006.229.19:00:25.41#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.19:00:25.41#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.19:00:25.41#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:25.41#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:25.41#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:25.41#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:25.41#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:00:25.41#ibcon#first serial, iclass 35, count 0 2006.229.19:00:25.41#ibcon#enter sib2, iclass 35, count 0 2006.229.19:00:25.41#ibcon#flushed, iclass 35, count 0 2006.229.19:00:25.41#ibcon#about to write, iclass 35, count 0 2006.229.19:00:25.41#ibcon#wrote, iclass 35, count 0 2006.229.19:00:25.41#ibcon#about to read 3, iclass 35, count 0 2006.229.19:00:25.42#ibcon#read 3, iclass 35, count 0 2006.229.19:00:25.42#ibcon#about to read 4, iclass 35, count 0 2006.229.19:00:25.42#ibcon#read 4, iclass 35, count 0 2006.229.19:00:25.43#ibcon#about to read 5, iclass 35, count 0 2006.229.19:00:25.43#ibcon#read 5, iclass 35, count 0 2006.229.19:00:25.43#ibcon#about to read 6, iclass 35, count 0 2006.229.19:00:25.43#ibcon#read 6, iclass 35, count 0 2006.229.19:00:25.43#ibcon#end of sib2, iclass 35, count 0 2006.229.19:00:25.43#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:00:25.43#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:00:25.43#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:00:25.43#ibcon#*before write, iclass 35, count 0 2006.229.19:00:25.43#ibcon#enter sib2, iclass 35, count 0 2006.229.19:00:25.43#ibcon#flushed, iclass 35, count 0 2006.229.19:00:25.43#ibcon#about to write, iclass 35, count 0 2006.229.19:00:25.43#ibcon#wrote, iclass 35, count 0 2006.229.19:00:25.43#ibcon#about to read 3, iclass 35, count 0 2006.229.19:00:25.46#ibcon#read 3, iclass 35, count 0 2006.229.19:00:25.47#ibcon#about to read 4, iclass 35, count 0 2006.229.19:00:25.47#ibcon#read 4, iclass 35, count 0 2006.229.19:00:25.47#ibcon#about to read 5, iclass 35, count 0 2006.229.19:00:25.47#ibcon#read 5, iclass 35, count 0 2006.229.19:00:25.47#ibcon#about to read 6, iclass 35, count 0 2006.229.19:00:25.47#ibcon#read 6, iclass 35, count 0 2006.229.19:00:25.47#ibcon#end of sib2, iclass 35, count 0 2006.229.19:00:25.47#ibcon#*after write, iclass 35, count 0 2006.229.19:00:25.47#ibcon#*before return 0, iclass 35, count 0 2006.229.19:00:25.47#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:25.47#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:25.47#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:00:25.47#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:00:25.47$vck44/va=5,4 2006.229.19:00:25.47#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.19:00:25.47#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.19:00:25.47#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:25.47#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:25.52#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:25.53#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:25.53#ibcon#enter wrdev, iclass 37, count 2 2006.229.19:00:25.53#ibcon#first serial, iclass 37, count 2 2006.229.19:00:25.53#ibcon#enter sib2, iclass 37, count 2 2006.229.19:00:25.53#ibcon#flushed, iclass 37, count 2 2006.229.19:00:25.53#ibcon#about to write, iclass 37, count 2 2006.229.19:00:25.53#ibcon#wrote, iclass 37, count 2 2006.229.19:00:25.53#ibcon#about to read 3, iclass 37, count 2 2006.229.19:00:25.54#ibcon#read 3, iclass 37, count 2 2006.229.19:00:25.55#ibcon#about to read 4, iclass 37, count 2 2006.229.19:00:25.55#ibcon#read 4, iclass 37, count 2 2006.229.19:00:25.55#ibcon#about to read 5, iclass 37, count 2 2006.229.19:00:25.55#ibcon#read 5, iclass 37, count 2 2006.229.19:00:25.55#ibcon#about to read 6, iclass 37, count 2 2006.229.19:00:25.55#ibcon#read 6, iclass 37, count 2 2006.229.19:00:25.55#ibcon#end of sib2, iclass 37, count 2 2006.229.19:00:25.55#ibcon#*mode == 0, iclass 37, count 2 2006.229.19:00:25.55#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.19:00:25.55#ibcon#[25=AT05-04\r\n] 2006.229.19:00:25.55#ibcon#*before write, iclass 37, count 2 2006.229.19:00:25.55#ibcon#enter sib2, iclass 37, count 2 2006.229.19:00:25.55#ibcon#flushed, iclass 37, count 2 2006.229.19:00:25.55#ibcon#about to write, iclass 37, count 2 2006.229.19:00:25.55#ibcon#wrote, iclass 37, count 2 2006.229.19:00:25.55#ibcon#about to read 3, iclass 37, count 2 2006.229.19:00:25.57#ibcon#read 3, iclass 37, count 2 2006.229.19:00:25.58#ibcon#about to read 4, iclass 37, count 2 2006.229.19:00:25.58#ibcon#read 4, iclass 37, count 2 2006.229.19:00:25.58#ibcon#about to read 5, iclass 37, count 2 2006.229.19:00:25.58#ibcon#read 5, iclass 37, count 2 2006.229.19:00:25.58#ibcon#about to read 6, iclass 37, count 2 2006.229.19:00:25.58#ibcon#read 6, iclass 37, count 2 2006.229.19:00:25.58#ibcon#end of sib2, iclass 37, count 2 2006.229.19:00:25.58#ibcon#*after write, iclass 37, count 2 2006.229.19:00:25.58#ibcon#*before return 0, iclass 37, count 2 2006.229.19:00:25.58#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:25.58#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:25.58#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.19:00:25.58#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:25.58#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:25.69#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:25.70#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:25.70#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:00:25.70#ibcon#first serial, iclass 37, count 0 2006.229.19:00:25.70#ibcon#enter sib2, iclass 37, count 0 2006.229.19:00:25.70#ibcon#flushed, iclass 37, count 0 2006.229.19:00:25.70#ibcon#about to write, iclass 37, count 0 2006.229.19:00:25.70#ibcon#wrote, iclass 37, count 0 2006.229.19:00:25.70#ibcon#about to read 3, iclass 37, count 0 2006.229.19:00:25.71#ibcon#read 3, iclass 37, count 0 2006.229.19:00:25.72#ibcon#about to read 4, iclass 37, count 0 2006.229.19:00:25.72#ibcon#read 4, iclass 37, count 0 2006.229.19:00:25.72#ibcon#about to read 5, iclass 37, count 0 2006.229.19:00:25.72#ibcon#read 5, iclass 37, count 0 2006.229.19:00:25.72#ibcon#about to read 6, iclass 37, count 0 2006.229.19:00:25.72#ibcon#read 6, iclass 37, count 0 2006.229.19:00:25.72#ibcon#end of sib2, iclass 37, count 0 2006.229.19:00:25.72#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:00:25.72#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:00:25.72#ibcon#[25=USB\r\n] 2006.229.19:00:25.72#ibcon#*before write, iclass 37, count 0 2006.229.19:00:25.72#ibcon#enter sib2, iclass 37, count 0 2006.229.19:00:25.72#ibcon#flushed, iclass 37, count 0 2006.229.19:00:25.72#ibcon#about to write, iclass 37, count 0 2006.229.19:00:25.72#ibcon#wrote, iclass 37, count 0 2006.229.19:00:25.72#ibcon#about to read 3, iclass 37, count 0 2006.229.19:00:25.74#ibcon#read 3, iclass 37, count 0 2006.229.19:00:25.75#ibcon#about to read 4, iclass 37, count 0 2006.229.19:00:25.75#ibcon#read 4, iclass 37, count 0 2006.229.19:00:25.75#ibcon#about to read 5, iclass 37, count 0 2006.229.19:00:25.75#ibcon#read 5, iclass 37, count 0 2006.229.19:00:25.75#ibcon#about to read 6, iclass 37, count 0 2006.229.19:00:25.75#ibcon#read 6, iclass 37, count 0 2006.229.19:00:25.75#ibcon#end of sib2, iclass 37, count 0 2006.229.19:00:25.75#ibcon#*after write, iclass 37, count 0 2006.229.19:00:25.75#ibcon#*before return 0, iclass 37, count 0 2006.229.19:00:25.75#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:25.75#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:25.75#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:00:25.75#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:00:25.75$vck44/valo=6,814.99 2006.229.19:00:25.75#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.19:00:25.75#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.19:00:25.75#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:25.75#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:25.75#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:25.75#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:25.75#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:00:25.75#ibcon#first serial, iclass 39, count 0 2006.229.19:00:25.75#ibcon#enter sib2, iclass 39, count 0 2006.229.19:00:25.75#ibcon#flushed, iclass 39, count 0 2006.229.19:00:25.75#ibcon#about to write, iclass 39, count 0 2006.229.19:00:25.75#ibcon#wrote, iclass 39, count 0 2006.229.19:00:25.75#ibcon#about to read 3, iclass 39, count 0 2006.229.19:00:25.77#ibcon#read 3, iclass 39, count 0 2006.229.19:00:25.77#ibcon#about to read 4, iclass 39, count 0 2006.229.19:00:25.77#ibcon#read 4, iclass 39, count 0 2006.229.19:00:25.77#ibcon#about to read 5, iclass 39, count 0 2006.229.19:00:25.77#ibcon#read 5, iclass 39, count 0 2006.229.19:00:25.77#ibcon#about to read 6, iclass 39, count 0 2006.229.19:00:25.77#ibcon#read 6, iclass 39, count 0 2006.229.19:00:25.77#ibcon#end of sib2, iclass 39, count 0 2006.229.19:00:25.77#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:00:25.77#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:00:25.77#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:00:25.77#ibcon#*before write, iclass 39, count 0 2006.229.19:00:25.77#ibcon#enter sib2, iclass 39, count 0 2006.229.19:00:25.77#ibcon#flushed, iclass 39, count 0 2006.229.19:00:25.77#ibcon#about to write, iclass 39, count 0 2006.229.19:00:25.77#ibcon#wrote, iclass 39, count 0 2006.229.19:00:25.77#ibcon#about to read 3, iclass 39, count 0 2006.229.19:00:25.80#ibcon#read 3, iclass 39, count 0 2006.229.19:00:25.81#ibcon#about to read 4, iclass 39, count 0 2006.229.19:00:25.81#ibcon#read 4, iclass 39, count 0 2006.229.19:00:25.81#ibcon#about to read 5, iclass 39, count 0 2006.229.19:00:25.81#ibcon#read 5, iclass 39, count 0 2006.229.19:00:25.81#ibcon#about to read 6, iclass 39, count 0 2006.229.19:00:25.81#ibcon#read 6, iclass 39, count 0 2006.229.19:00:25.81#ibcon#end of sib2, iclass 39, count 0 2006.229.19:00:25.81#ibcon#*after write, iclass 39, count 0 2006.229.19:00:25.81#ibcon#*before return 0, iclass 39, count 0 2006.229.19:00:25.81#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:25.81#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:25.81#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:00:25.81#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:00:25.81$vck44/va=6,4 2006.229.19:00:25.81#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.19:00:25.81#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.19:00:25.81#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:25.81#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:25.86#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:25.86#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:25.87#ibcon#enter wrdev, iclass 3, count 2 2006.229.19:00:25.87#ibcon#first serial, iclass 3, count 2 2006.229.19:00:25.87#ibcon#enter sib2, iclass 3, count 2 2006.229.19:00:25.87#ibcon#flushed, iclass 3, count 2 2006.229.19:00:25.87#ibcon#about to write, iclass 3, count 2 2006.229.19:00:25.87#ibcon#wrote, iclass 3, count 2 2006.229.19:00:25.87#ibcon#about to read 3, iclass 3, count 2 2006.229.19:00:25.88#ibcon#read 3, iclass 3, count 2 2006.229.19:00:25.89#ibcon#about to read 4, iclass 3, count 2 2006.229.19:00:25.89#ibcon#read 4, iclass 3, count 2 2006.229.19:00:25.89#ibcon#about to read 5, iclass 3, count 2 2006.229.19:00:25.89#ibcon#read 5, iclass 3, count 2 2006.229.19:00:25.89#ibcon#about to read 6, iclass 3, count 2 2006.229.19:00:25.89#ibcon#read 6, iclass 3, count 2 2006.229.19:00:25.89#ibcon#end of sib2, iclass 3, count 2 2006.229.19:00:25.89#ibcon#*mode == 0, iclass 3, count 2 2006.229.19:00:25.89#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.19:00:25.89#ibcon#[25=AT06-04\r\n] 2006.229.19:00:25.89#ibcon#*before write, iclass 3, count 2 2006.229.19:00:25.89#ibcon#enter sib2, iclass 3, count 2 2006.229.19:00:25.89#ibcon#flushed, iclass 3, count 2 2006.229.19:00:25.89#ibcon#about to write, iclass 3, count 2 2006.229.19:00:25.89#ibcon#wrote, iclass 3, count 2 2006.229.19:00:25.89#ibcon#about to read 3, iclass 3, count 2 2006.229.19:00:25.91#ibcon#read 3, iclass 3, count 2 2006.229.19:00:25.92#ibcon#about to read 4, iclass 3, count 2 2006.229.19:00:25.92#ibcon#read 4, iclass 3, count 2 2006.229.19:00:25.92#ibcon#about to read 5, iclass 3, count 2 2006.229.19:00:25.92#ibcon#read 5, iclass 3, count 2 2006.229.19:00:25.92#ibcon#about to read 6, iclass 3, count 2 2006.229.19:00:25.92#ibcon#read 6, iclass 3, count 2 2006.229.19:00:25.92#ibcon#end of sib2, iclass 3, count 2 2006.229.19:00:25.92#ibcon#*after write, iclass 3, count 2 2006.229.19:00:25.92#ibcon#*before return 0, iclass 3, count 2 2006.229.19:00:25.92#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:25.92#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:25.92#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.19:00:25.92#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:25.92#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:26.03#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:26.04#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:26.04#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:00:26.04#ibcon#first serial, iclass 3, count 0 2006.229.19:00:26.04#ibcon#enter sib2, iclass 3, count 0 2006.229.19:00:26.04#ibcon#flushed, iclass 3, count 0 2006.229.19:00:26.04#ibcon#about to write, iclass 3, count 0 2006.229.19:00:26.04#ibcon#wrote, iclass 3, count 0 2006.229.19:00:26.04#ibcon#about to read 3, iclass 3, count 0 2006.229.19:00:26.05#ibcon#read 3, iclass 3, count 0 2006.229.19:00:26.06#ibcon#about to read 4, iclass 3, count 0 2006.229.19:00:26.06#ibcon#read 4, iclass 3, count 0 2006.229.19:00:26.06#ibcon#about to read 5, iclass 3, count 0 2006.229.19:00:26.06#ibcon#read 5, iclass 3, count 0 2006.229.19:00:26.06#ibcon#about to read 6, iclass 3, count 0 2006.229.19:00:26.06#ibcon#read 6, iclass 3, count 0 2006.229.19:00:26.06#ibcon#end of sib2, iclass 3, count 0 2006.229.19:00:26.06#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:00:26.06#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:00:26.06#ibcon#[25=USB\r\n] 2006.229.19:00:26.06#ibcon#*before write, iclass 3, count 0 2006.229.19:00:26.06#ibcon#enter sib2, iclass 3, count 0 2006.229.19:00:26.06#ibcon#flushed, iclass 3, count 0 2006.229.19:00:26.06#ibcon#about to write, iclass 3, count 0 2006.229.19:00:26.06#ibcon#wrote, iclass 3, count 0 2006.229.19:00:26.06#ibcon#about to read 3, iclass 3, count 0 2006.229.19:00:26.08#ibcon#read 3, iclass 3, count 0 2006.229.19:00:26.09#ibcon#about to read 4, iclass 3, count 0 2006.229.19:00:26.09#ibcon#read 4, iclass 3, count 0 2006.229.19:00:26.09#ibcon#about to read 5, iclass 3, count 0 2006.229.19:00:26.09#ibcon#read 5, iclass 3, count 0 2006.229.19:00:26.09#ibcon#about to read 6, iclass 3, count 0 2006.229.19:00:26.09#ibcon#read 6, iclass 3, count 0 2006.229.19:00:26.09#ibcon#end of sib2, iclass 3, count 0 2006.229.19:00:26.09#ibcon#*after write, iclass 3, count 0 2006.229.19:00:26.09#ibcon#*before return 0, iclass 3, count 0 2006.229.19:00:26.09#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:26.09#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:26.09#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:00:26.09#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:00:26.09$vck44/valo=7,864.99 2006.229.19:00:26.09#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:00:26.09#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:00:26.09#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:26.09#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:26.09#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:26.09#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:26.09#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:00:26.09#ibcon#first serial, iclass 5, count 0 2006.229.19:00:26.09#ibcon#enter sib2, iclass 5, count 0 2006.229.19:00:26.09#ibcon#flushed, iclass 5, count 0 2006.229.19:00:26.09#ibcon#about to write, iclass 5, count 0 2006.229.19:00:26.09#ibcon#wrote, iclass 5, count 0 2006.229.19:00:26.09#ibcon#about to read 3, iclass 5, count 0 2006.229.19:00:26.10#ibcon#read 3, iclass 5, count 0 2006.229.19:00:26.10#ibcon#about to read 4, iclass 5, count 0 2006.229.19:00:26.11#ibcon#read 4, iclass 5, count 0 2006.229.19:00:26.11#ibcon#about to read 5, iclass 5, count 0 2006.229.19:00:26.11#ibcon#read 5, iclass 5, count 0 2006.229.19:00:26.11#ibcon#about to read 6, iclass 5, count 0 2006.229.19:00:26.11#ibcon#read 6, iclass 5, count 0 2006.229.19:00:26.11#ibcon#end of sib2, iclass 5, count 0 2006.229.19:00:26.11#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:00:26.11#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:00:26.11#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:00:26.11#ibcon#*before write, iclass 5, count 0 2006.229.19:00:26.11#ibcon#enter sib2, iclass 5, count 0 2006.229.19:00:26.11#ibcon#flushed, iclass 5, count 0 2006.229.19:00:26.11#ibcon#about to write, iclass 5, count 0 2006.229.19:00:26.11#ibcon#wrote, iclass 5, count 0 2006.229.19:00:26.11#ibcon#about to read 3, iclass 5, count 0 2006.229.19:00:26.14#ibcon#read 3, iclass 5, count 0 2006.229.19:00:26.15#ibcon#about to read 4, iclass 5, count 0 2006.229.19:00:26.15#ibcon#read 4, iclass 5, count 0 2006.229.19:00:26.15#ibcon#about to read 5, iclass 5, count 0 2006.229.19:00:26.15#ibcon#read 5, iclass 5, count 0 2006.229.19:00:26.15#ibcon#about to read 6, iclass 5, count 0 2006.229.19:00:26.15#ibcon#read 6, iclass 5, count 0 2006.229.19:00:26.15#ibcon#end of sib2, iclass 5, count 0 2006.229.19:00:26.15#ibcon#*after write, iclass 5, count 0 2006.229.19:00:26.15#ibcon#*before return 0, iclass 5, count 0 2006.229.19:00:26.15#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:26.15#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:26.15#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:00:26.15#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:00:26.15$vck44/va=7,5 2006.229.19:00:26.15#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:00:26.15#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:00:26.15#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:26.15#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:26.20#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:26.20#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:26.21#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:00:26.21#ibcon#first serial, iclass 7, count 2 2006.229.19:00:26.21#ibcon#enter sib2, iclass 7, count 2 2006.229.19:00:26.21#ibcon#flushed, iclass 7, count 2 2006.229.19:00:26.21#ibcon#about to write, iclass 7, count 2 2006.229.19:00:26.21#ibcon#wrote, iclass 7, count 2 2006.229.19:00:26.21#ibcon#about to read 3, iclass 7, count 2 2006.229.19:00:26.22#ibcon#read 3, iclass 7, count 2 2006.229.19:00:26.22#ibcon#about to read 4, iclass 7, count 2 2006.229.19:00:26.22#ibcon#read 4, iclass 7, count 2 2006.229.19:00:26.23#ibcon#about to read 5, iclass 7, count 2 2006.229.19:00:26.23#ibcon#read 5, iclass 7, count 2 2006.229.19:00:26.23#ibcon#about to read 6, iclass 7, count 2 2006.229.19:00:26.23#ibcon#read 6, iclass 7, count 2 2006.229.19:00:26.23#ibcon#end of sib2, iclass 7, count 2 2006.229.19:00:26.23#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:00:26.23#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:00:26.23#ibcon#[25=AT07-05\r\n] 2006.229.19:00:26.23#ibcon#*before write, iclass 7, count 2 2006.229.19:00:26.23#ibcon#enter sib2, iclass 7, count 2 2006.229.19:00:26.23#ibcon#flushed, iclass 7, count 2 2006.229.19:00:26.23#ibcon#about to write, iclass 7, count 2 2006.229.19:00:26.23#ibcon#wrote, iclass 7, count 2 2006.229.19:00:26.23#ibcon#about to read 3, iclass 7, count 2 2006.229.19:00:26.25#ibcon#read 3, iclass 7, count 2 2006.229.19:00:26.25#ibcon#about to read 4, iclass 7, count 2 2006.229.19:00:26.26#ibcon#read 4, iclass 7, count 2 2006.229.19:00:26.26#ibcon#about to read 5, iclass 7, count 2 2006.229.19:00:26.26#ibcon#read 5, iclass 7, count 2 2006.229.19:00:26.26#ibcon#about to read 6, iclass 7, count 2 2006.229.19:00:26.26#ibcon#read 6, iclass 7, count 2 2006.229.19:00:26.26#ibcon#end of sib2, iclass 7, count 2 2006.229.19:00:26.26#ibcon#*after write, iclass 7, count 2 2006.229.19:00:26.26#ibcon#*before return 0, iclass 7, count 2 2006.229.19:00:26.26#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:26.26#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:26.26#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:00:26.26#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:26.26#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:26.37#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:26.37#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:26.38#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:00:26.38#ibcon#first serial, iclass 7, count 0 2006.229.19:00:26.38#ibcon#enter sib2, iclass 7, count 0 2006.229.19:00:26.38#ibcon#flushed, iclass 7, count 0 2006.229.19:00:26.38#ibcon#about to write, iclass 7, count 0 2006.229.19:00:26.38#ibcon#wrote, iclass 7, count 0 2006.229.19:00:26.38#ibcon#about to read 3, iclass 7, count 0 2006.229.19:00:26.39#ibcon#read 3, iclass 7, count 0 2006.229.19:00:26.39#ibcon#about to read 4, iclass 7, count 0 2006.229.19:00:26.40#ibcon#read 4, iclass 7, count 0 2006.229.19:00:26.40#ibcon#about to read 5, iclass 7, count 0 2006.229.19:00:26.40#ibcon#read 5, iclass 7, count 0 2006.229.19:00:26.40#ibcon#about to read 6, iclass 7, count 0 2006.229.19:00:26.40#ibcon#read 6, iclass 7, count 0 2006.229.19:00:26.40#ibcon#end of sib2, iclass 7, count 0 2006.229.19:00:26.40#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:00:26.40#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:00:26.40#ibcon#[25=USB\r\n] 2006.229.19:00:26.40#ibcon#*before write, iclass 7, count 0 2006.229.19:00:26.40#ibcon#enter sib2, iclass 7, count 0 2006.229.19:00:26.40#ibcon#flushed, iclass 7, count 0 2006.229.19:00:26.40#ibcon#about to write, iclass 7, count 0 2006.229.19:00:26.40#ibcon#wrote, iclass 7, count 0 2006.229.19:00:26.40#ibcon#about to read 3, iclass 7, count 0 2006.229.19:00:26.42#ibcon#read 3, iclass 7, count 0 2006.229.19:00:26.42#ibcon#about to read 4, iclass 7, count 0 2006.229.19:00:26.43#ibcon#read 4, iclass 7, count 0 2006.229.19:00:26.43#ibcon#about to read 5, iclass 7, count 0 2006.229.19:00:26.43#ibcon#read 5, iclass 7, count 0 2006.229.19:00:26.43#ibcon#about to read 6, iclass 7, count 0 2006.229.19:00:26.43#ibcon#read 6, iclass 7, count 0 2006.229.19:00:26.43#ibcon#end of sib2, iclass 7, count 0 2006.229.19:00:26.43#ibcon#*after write, iclass 7, count 0 2006.229.19:00:26.43#ibcon#*before return 0, iclass 7, count 0 2006.229.19:00:26.43#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:26.43#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:26.43#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:00:26.43#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:00:26.43$vck44/valo=8,884.99 2006.229.19:00:26.43#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:00:26.43#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:00:26.43#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:26.43#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:26.43#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:26.43#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:26.43#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:00:26.43#ibcon#first serial, iclass 11, count 0 2006.229.19:00:26.43#ibcon#enter sib2, iclass 11, count 0 2006.229.19:00:26.43#ibcon#flushed, iclass 11, count 0 2006.229.19:00:26.43#ibcon#about to write, iclass 11, count 0 2006.229.19:00:26.43#ibcon#wrote, iclass 11, count 0 2006.229.19:00:26.43#ibcon#about to read 3, iclass 11, count 0 2006.229.19:00:26.44#ibcon#read 3, iclass 11, count 0 2006.229.19:00:26.44#ibcon#about to read 4, iclass 11, count 0 2006.229.19:00:26.45#ibcon#read 4, iclass 11, count 0 2006.229.19:00:26.45#ibcon#about to read 5, iclass 11, count 0 2006.229.19:00:26.45#ibcon#read 5, iclass 11, count 0 2006.229.19:00:26.45#ibcon#about to read 6, iclass 11, count 0 2006.229.19:00:26.45#ibcon#read 6, iclass 11, count 0 2006.229.19:00:26.45#ibcon#end of sib2, iclass 11, count 0 2006.229.19:00:26.45#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:00:26.45#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:00:26.45#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:00:26.45#ibcon#*before write, iclass 11, count 0 2006.229.19:00:26.45#ibcon#enter sib2, iclass 11, count 0 2006.229.19:00:26.45#ibcon#flushed, iclass 11, count 0 2006.229.19:00:26.45#ibcon#about to write, iclass 11, count 0 2006.229.19:00:26.45#ibcon#wrote, iclass 11, count 0 2006.229.19:00:26.45#ibcon#about to read 3, iclass 11, count 0 2006.229.19:00:26.48#ibcon#read 3, iclass 11, count 0 2006.229.19:00:26.48#ibcon#about to read 4, iclass 11, count 0 2006.229.19:00:26.49#ibcon#read 4, iclass 11, count 0 2006.229.19:00:26.49#ibcon#about to read 5, iclass 11, count 0 2006.229.19:00:26.49#ibcon#read 5, iclass 11, count 0 2006.229.19:00:26.49#ibcon#about to read 6, iclass 11, count 0 2006.229.19:00:26.49#ibcon#read 6, iclass 11, count 0 2006.229.19:00:26.49#ibcon#end of sib2, iclass 11, count 0 2006.229.19:00:26.49#ibcon#*after write, iclass 11, count 0 2006.229.19:00:26.49#ibcon#*before return 0, iclass 11, count 0 2006.229.19:00:26.49#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:26.49#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:26.49#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:00:26.49#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:00:26.49$vck44/va=8,6 2006.229.19:00:26.49#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.19:00:26.49#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.19:00:26.49#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:26.49#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:00:26.54#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:00:26.54#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:00:26.55#ibcon#enter wrdev, iclass 13, count 2 2006.229.19:00:26.55#ibcon#first serial, iclass 13, count 2 2006.229.19:00:26.55#ibcon#enter sib2, iclass 13, count 2 2006.229.19:00:26.55#ibcon#flushed, iclass 13, count 2 2006.229.19:00:26.55#ibcon#about to write, iclass 13, count 2 2006.229.19:00:26.55#ibcon#wrote, iclass 13, count 2 2006.229.19:00:26.55#ibcon#about to read 3, iclass 13, count 2 2006.229.19:00:26.56#ibcon#read 3, iclass 13, count 2 2006.229.19:00:26.57#ibcon#about to read 4, iclass 13, count 2 2006.229.19:00:26.57#ibcon#read 4, iclass 13, count 2 2006.229.19:00:26.57#ibcon#about to read 5, iclass 13, count 2 2006.229.19:00:26.57#ibcon#read 5, iclass 13, count 2 2006.229.19:00:26.57#ibcon#about to read 6, iclass 13, count 2 2006.229.19:00:26.57#ibcon#read 6, iclass 13, count 2 2006.229.19:00:26.57#ibcon#end of sib2, iclass 13, count 2 2006.229.19:00:26.57#ibcon#*mode == 0, iclass 13, count 2 2006.229.19:00:26.57#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.19:00:26.57#ibcon#[25=AT08-06\r\n] 2006.229.19:00:26.57#ibcon#*before write, iclass 13, count 2 2006.229.19:00:26.57#ibcon#enter sib2, iclass 13, count 2 2006.229.19:00:26.57#ibcon#flushed, iclass 13, count 2 2006.229.19:00:26.57#ibcon#about to write, iclass 13, count 2 2006.229.19:00:26.57#ibcon#wrote, iclass 13, count 2 2006.229.19:00:26.57#ibcon#about to read 3, iclass 13, count 2 2006.229.19:00:26.59#ibcon#read 3, iclass 13, count 2 2006.229.19:00:26.60#ibcon#about to read 4, iclass 13, count 2 2006.229.19:00:26.60#ibcon#read 4, iclass 13, count 2 2006.229.19:00:26.60#ibcon#about to read 5, iclass 13, count 2 2006.229.19:00:26.60#ibcon#read 5, iclass 13, count 2 2006.229.19:00:26.60#ibcon#about to read 6, iclass 13, count 2 2006.229.19:00:26.60#ibcon#read 6, iclass 13, count 2 2006.229.19:00:26.60#ibcon#end of sib2, iclass 13, count 2 2006.229.19:00:26.60#ibcon#*after write, iclass 13, count 2 2006.229.19:00:26.60#ibcon#*before return 0, iclass 13, count 2 2006.229.19:00:26.60#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:00:26.60#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:00:26.60#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.19:00:26.60#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:26.60#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:00:26.71#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:00:26.72#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:00:26.72#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:00:26.72#ibcon#first serial, iclass 13, count 0 2006.229.19:00:26.72#ibcon#enter sib2, iclass 13, count 0 2006.229.19:00:26.72#ibcon#flushed, iclass 13, count 0 2006.229.19:00:26.72#ibcon#about to write, iclass 13, count 0 2006.229.19:00:26.72#ibcon#wrote, iclass 13, count 0 2006.229.19:00:26.72#ibcon#about to read 3, iclass 13, count 0 2006.229.19:00:26.73#ibcon#read 3, iclass 13, count 0 2006.229.19:00:26.74#ibcon#about to read 4, iclass 13, count 0 2006.229.19:00:26.74#ibcon#read 4, iclass 13, count 0 2006.229.19:00:26.74#ibcon#about to read 5, iclass 13, count 0 2006.229.19:00:26.74#ibcon#read 5, iclass 13, count 0 2006.229.19:00:26.74#ibcon#about to read 6, iclass 13, count 0 2006.229.19:00:26.74#ibcon#read 6, iclass 13, count 0 2006.229.19:00:26.74#ibcon#end of sib2, iclass 13, count 0 2006.229.19:00:26.74#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:00:26.74#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:00:26.74#ibcon#[25=USB\r\n] 2006.229.19:00:26.74#ibcon#*before write, iclass 13, count 0 2006.229.19:00:26.74#ibcon#enter sib2, iclass 13, count 0 2006.229.19:00:26.74#ibcon#flushed, iclass 13, count 0 2006.229.19:00:26.74#ibcon#about to write, iclass 13, count 0 2006.229.19:00:26.74#ibcon#wrote, iclass 13, count 0 2006.229.19:00:26.74#ibcon#about to read 3, iclass 13, count 0 2006.229.19:00:26.76#ibcon#read 3, iclass 13, count 0 2006.229.19:00:26.77#ibcon#about to read 4, iclass 13, count 0 2006.229.19:00:26.77#ibcon#read 4, iclass 13, count 0 2006.229.19:00:26.77#ibcon#about to read 5, iclass 13, count 0 2006.229.19:00:26.77#ibcon#read 5, iclass 13, count 0 2006.229.19:00:26.77#ibcon#about to read 6, iclass 13, count 0 2006.229.19:00:26.77#ibcon#read 6, iclass 13, count 0 2006.229.19:00:26.77#ibcon#end of sib2, iclass 13, count 0 2006.229.19:00:26.77#ibcon#*after write, iclass 13, count 0 2006.229.19:00:26.77#ibcon#*before return 0, iclass 13, count 0 2006.229.19:00:26.77#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:00:26.77#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:00:26.77#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:00:26.77#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:00:26.77$vck44/vblo=1,629.99 2006.229.19:00:26.77#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.19:00:26.77#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.19:00:26.77#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:26.77#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:00:26.77#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:00:26.77#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:00:26.77#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:00:26.77#ibcon#first serial, iclass 15, count 0 2006.229.19:00:26.77#ibcon#enter sib2, iclass 15, count 0 2006.229.19:00:26.77#ibcon#flushed, iclass 15, count 0 2006.229.19:00:26.77#ibcon#about to write, iclass 15, count 0 2006.229.19:00:26.77#ibcon#wrote, iclass 15, count 0 2006.229.19:00:26.77#ibcon#about to read 3, iclass 15, count 0 2006.229.19:00:26.78#ibcon#read 3, iclass 15, count 0 2006.229.19:00:26.79#ibcon#about to read 4, iclass 15, count 0 2006.229.19:00:26.79#ibcon#read 4, iclass 15, count 0 2006.229.19:00:26.79#ibcon#about to read 5, iclass 15, count 0 2006.229.19:00:26.79#ibcon#read 5, iclass 15, count 0 2006.229.19:00:26.79#ibcon#about to read 6, iclass 15, count 0 2006.229.19:00:26.79#ibcon#read 6, iclass 15, count 0 2006.229.19:00:26.79#ibcon#end of sib2, iclass 15, count 0 2006.229.19:00:26.79#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:00:26.79#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:00:26.79#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:00:26.79#ibcon#*before write, iclass 15, count 0 2006.229.19:00:26.79#ibcon#enter sib2, iclass 15, count 0 2006.229.19:00:26.79#ibcon#flushed, iclass 15, count 0 2006.229.19:00:26.79#ibcon#about to write, iclass 15, count 0 2006.229.19:00:26.79#ibcon#wrote, iclass 15, count 0 2006.229.19:00:26.79#ibcon#about to read 3, iclass 15, count 0 2006.229.19:00:26.82#ibcon#read 3, iclass 15, count 0 2006.229.19:00:26.83#ibcon#about to read 4, iclass 15, count 0 2006.229.19:00:26.83#ibcon#read 4, iclass 15, count 0 2006.229.19:00:26.83#ibcon#about to read 5, iclass 15, count 0 2006.229.19:00:26.83#ibcon#read 5, iclass 15, count 0 2006.229.19:00:26.83#ibcon#about to read 6, iclass 15, count 0 2006.229.19:00:26.83#ibcon#read 6, iclass 15, count 0 2006.229.19:00:26.83#ibcon#end of sib2, iclass 15, count 0 2006.229.19:00:26.83#ibcon#*after write, iclass 15, count 0 2006.229.19:00:26.83#ibcon#*before return 0, iclass 15, count 0 2006.229.19:00:26.83#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:00:26.83#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:00:26.83#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:00:26.83#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:00:26.83$vck44/vb=1,4 2006.229.19:00:26.83#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.19:00:26.83#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.19:00:26.83#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:26.83#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:00:26.83#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:00:26.83#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:00:26.83#ibcon#enter wrdev, iclass 17, count 2 2006.229.19:00:26.83#ibcon#first serial, iclass 17, count 2 2006.229.19:00:26.83#ibcon#enter sib2, iclass 17, count 2 2006.229.19:00:26.83#ibcon#flushed, iclass 17, count 2 2006.229.19:00:26.83#ibcon#about to write, iclass 17, count 2 2006.229.19:00:26.83#ibcon#wrote, iclass 17, count 2 2006.229.19:00:26.83#ibcon#about to read 3, iclass 17, count 2 2006.229.19:00:26.84#ibcon#read 3, iclass 17, count 2 2006.229.19:00:26.85#ibcon#about to read 4, iclass 17, count 2 2006.229.19:00:26.85#ibcon#read 4, iclass 17, count 2 2006.229.19:00:26.85#ibcon#about to read 5, iclass 17, count 2 2006.229.19:00:26.85#ibcon#read 5, iclass 17, count 2 2006.229.19:00:26.85#ibcon#about to read 6, iclass 17, count 2 2006.229.19:00:26.85#ibcon#read 6, iclass 17, count 2 2006.229.19:00:26.85#ibcon#end of sib2, iclass 17, count 2 2006.229.19:00:26.85#ibcon#*mode == 0, iclass 17, count 2 2006.229.19:00:26.85#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.19:00:26.85#ibcon#[27=AT01-04\r\n] 2006.229.19:00:26.85#ibcon#*before write, iclass 17, count 2 2006.229.19:00:26.85#ibcon#enter sib2, iclass 17, count 2 2006.229.19:00:26.85#ibcon#flushed, iclass 17, count 2 2006.229.19:00:26.85#ibcon#about to write, iclass 17, count 2 2006.229.19:00:26.85#ibcon#wrote, iclass 17, count 2 2006.229.19:00:26.85#ibcon#about to read 3, iclass 17, count 2 2006.229.19:00:26.87#ibcon#read 3, iclass 17, count 2 2006.229.19:00:26.88#ibcon#about to read 4, iclass 17, count 2 2006.229.19:00:26.88#ibcon#read 4, iclass 17, count 2 2006.229.19:00:26.88#ibcon#about to read 5, iclass 17, count 2 2006.229.19:00:26.88#ibcon#read 5, iclass 17, count 2 2006.229.19:00:26.88#ibcon#about to read 6, iclass 17, count 2 2006.229.19:00:26.88#ibcon#read 6, iclass 17, count 2 2006.229.19:00:26.88#ibcon#end of sib2, iclass 17, count 2 2006.229.19:00:26.88#ibcon#*after write, iclass 17, count 2 2006.229.19:00:26.88#ibcon#*before return 0, iclass 17, count 2 2006.229.19:00:26.88#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:00:26.88#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:00:26.88#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.19:00:26.88#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:26.88#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:00:26.99#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:00:26.99#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:00:27.00#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:00:27.00#ibcon#first serial, iclass 17, count 0 2006.229.19:00:27.00#ibcon#enter sib2, iclass 17, count 0 2006.229.19:00:27.00#ibcon#flushed, iclass 17, count 0 2006.229.19:00:27.00#ibcon#about to write, iclass 17, count 0 2006.229.19:00:27.00#ibcon#wrote, iclass 17, count 0 2006.229.19:00:27.00#ibcon#about to read 3, iclass 17, count 0 2006.229.19:00:27.01#ibcon#read 3, iclass 17, count 0 2006.229.19:00:27.02#ibcon#about to read 4, iclass 17, count 0 2006.229.19:00:27.02#ibcon#read 4, iclass 17, count 0 2006.229.19:00:27.02#ibcon#about to read 5, iclass 17, count 0 2006.229.19:00:27.02#ibcon#read 5, iclass 17, count 0 2006.229.19:00:27.02#ibcon#about to read 6, iclass 17, count 0 2006.229.19:00:27.02#ibcon#read 6, iclass 17, count 0 2006.229.19:00:27.02#ibcon#end of sib2, iclass 17, count 0 2006.229.19:00:27.02#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:00:27.02#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:00:27.02#ibcon#[27=USB\r\n] 2006.229.19:00:27.02#ibcon#*before write, iclass 17, count 0 2006.229.19:00:27.02#ibcon#enter sib2, iclass 17, count 0 2006.229.19:00:27.02#ibcon#flushed, iclass 17, count 0 2006.229.19:00:27.02#ibcon#about to write, iclass 17, count 0 2006.229.19:00:27.02#ibcon#wrote, iclass 17, count 0 2006.229.19:00:27.02#ibcon#about to read 3, iclass 17, count 0 2006.229.19:00:27.04#ibcon#read 3, iclass 17, count 0 2006.229.19:00:27.04#ibcon#about to read 4, iclass 17, count 0 2006.229.19:00:27.05#ibcon#read 4, iclass 17, count 0 2006.229.19:00:27.05#ibcon#about to read 5, iclass 17, count 0 2006.229.19:00:27.05#ibcon#read 5, iclass 17, count 0 2006.229.19:00:27.05#ibcon#about to read 6, iclass 17, count 0 2006.229.19:00:27.05#ibcon#read 6, iclass 17, count 0 2006.229.19:00:27.05#ibcon#end of sib2, iclass 17, count 0 2006.229.19:00:27.05#ibcon#*after write, iclass 17, count 0 2006.229.19:00:27.05#ibcon#*before return 0, iclass 17, count 0 2006.229.19:00:27.05#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:00:27.05#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:00:27.05#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:00:27.05#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:00:27.05$vck44/vblo=2,634.99 2006.229.19:00:27.05#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:00:27.05#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:00:27.05#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:27.05#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:27.05#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:27.05#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:27.05#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:00:27.05#ibcon#first serial, iclass 19, count 0 2006.229.19:00:27.05#ibcon#enter sib2, iclass 19, count 0 2006.229.19:00:27.05#ibcon#flushed, iclass 19, count 0 2006.229.19:00:27.05#ibcon#about to write, iclass 19, count 0 2006.229.19:00:27.05#ibcon#wrote, iclass 19, count 0 2006.229.19:00:27.05#ibcon#about to read 3, iclass 19, count 0 2006.229.19:00:27.06#ibcon#read 3, iclass 19, count 0 2006.229.19:00:27.07#ibcon#about to read 4, iclass 19, count 0 2006.229.19:00:27.07#ibcon#read 4, iclass 19, count 0 2006.229.19:00:27.07#ibcon#about to read 5, iclass 19, count 0 2006.229.19:00:27.07#ibcon#read 5, iclass 19, count 0 2006.229.19:00:27.07#ibcon#about to read 6, iclass 19, count 0 2006.229.19:00:27.07#ibcon#read 6, iclass 19, count 0 2006.229.19:00:27.07#ibcon#end of sib2, iclass 19, count 0 2006.229.19:00:27.07#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:00:27.07#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:00:27.07#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:00:27.07#ibcon#*before write, iclass 19, count 0 2006.229.19:00:27.07#ibcon#enter sib2, iclass 19, count 0 2006.229.19:00:27.07#ibcon#flushed, iclass 19, count 0 2006.229.19:00:27.07#ibcon#about to write, iclass 19, count 0 2006.229.19:00:27.07#ibcon#wrote, iclass 19, count 0 2006.229.19:00:27.07#ibcon#about to read 3, iclass 19, count 0 2006.229.19:00:27.11#ibcon#read 3, iclass 19, count 0 2006.229.19:00:27.11#ibcon#about to read 4, iclass 19, count 0 2006.229.19:00:27.11#ibcon#read 4, iclass 19, count 0 2006.229.19:00:27.11#ibcon#about to read 5, iclass 19, count 0 2006.229.19:00:27.11#ibcon#read 5, iclass 19, count 0 2006.229.19:00:27.11#ibcon#about to read 6, iclass 19, count 0 2006.229.19:00:27.11#ibcon#read 6, iclass 19, count 0 2006.229.19:00:27.11#ibcon#end of sib2, iclass 19, count 0 2006.229.19:00:27.11#ibcon#*after write, iclass 19, count 0 2006.229.19:00:27.11#ibcon#*before return 0, iclass 19, count 0 2006.229.19:00:27.11#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:27.11#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:00:27.11#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:00:27.11#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:00:27.11$vck44/vb=2,4 2006.229.19:00:27.11#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.19:00:27.11#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.19:00:27.11#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:27.11#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:27.16#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:27.16#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:27.17#ibcon#enter wrdev, iclass 21, count 2 2006.229.19:00:27.17#ibcon#first serial, iclass 21, count 2 2006.229.19:00:27.17#ibcon#enter sib2, iclass 21, count 2 2006.229.19:00:27.17#ibcon#flushed, iclass 21, count 2 2006.229.19:00:27.17#ibcon#about to write, iclass 21, count 2 2006.229.19:00:27.17#ibcon#wrote, iclass 21, count 2 2006.229.19:00:27.17#ibcon#about to read 3, iclass 21, count 2 2006.229.19:00:27.18#ibcon#read 3, iclass 21, count 2 2006.229.19:00:27.18#ibcon#about to read 4, iclass 21, count 2 2006.229.19:00:27.19#ibcon#read 4, iclass 21, count 2 2006.229.19:00:27.19#ibcon#about to read 5, iclass 21, count 2 2006.229.19:00:27.19#ibcon#read 5, iclass 21, count 2 2006.229.19:00:27.19#ibcon#about to read 6, iclass 21, count 2 2006.229.19:00:27.19#ibcon#read 6, iclass 21, count 2 2006.229.19:00:27.19#ibcon#end of sib2, iclass 21, count 2 2006.229.19:00:27.19#ibcon#*mode == 0, iclass 21, count 2 2006.229.19:00:27.19#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.19:00:27.19#ibcon#[27=AT02-04\r\n] 2006.229.19:00:27.19#ibcon#*before write, iclass 21, count 2 2006.229.19:00:27.19#ibcon#enter sib2, iclass 21, count 2 2006.229.19:00:27.19#ibcon#flushed, iclass 21, count 2 2006.229.19:00:27.19#ibcon#about to write, iclass 21, count 2 2006.229.19:00:27.19#ibcon#wrote, iclass 21, count 2 2006.229.19:00:27.19#ibcon#about to read 3, iclass 21, count 2 2006.229.19:00:27.21#ibcon#read 3, iclass 21, count 2 2006.229.19:00:27.22#ibcon#about to read 4, iclass 21, count 2 2006.229.19:00:27.22#ibcon#read 4, iclass 21, count 2 2006.229.19:00:27.22#ibcon#about to read 5, iclass 21, count 2 2006.229.19:00:27.22#ibcon#read 5, iclass 21, count 2 2006.229.19:00:27.22#ibcon#about to read 6, iclass 21, count 2 2006.229.19:00:27.22#ibcon#read 6, iclass 21, count 2 2006.229.19:00:27.22#ibcon#end of sib2, iclass 21, count 2 2006.229.19:00:27.22#ibcon#*after write, iclass 21, count 2 2006.229.19:00:27.22#ibcon#*before return 0, iclass 21, count 2 2006.229.19:00:27.22#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:27.22#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:00:27.22#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.19:00:27.22#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:27.22#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:27.33#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:27.33#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:27.34#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:00:27.34#ibcon#first serial, iclass 21, count 0 2006.229.19:00:27.34#ibcon#enter sib2, iclass 21, count 0 2006.229.19:00:27.34#ibcon#flushed, iclass 21, count 0 2006.229.19:00:27.34#ibcon#about to write, iclass 21, count 0 2006.229.19:00:27.34#ibcon#wrote, iclass 21, count 0 2006.229.19:00:27.34#ibcon#about to read 3, iclass 21, count 0 2006.229.19:00:27.35#ibcon#read 3, iclass 21, count 0 2006.229.19:00:27.36#ibcon#about to read 4, iclass 21, count 0 2006.229.19:00:27.36#ibcon#read 4, iclass 21, count 0 2006.229.19:00:27.36#ibcon#about to read 5, iclass 21, count 0 2006.229.19:00:27.36#ibcon#read 5, iclass 21, count 0 2006.229.19:00:27.36#ibcon#about to read 6, iclass 21, count 0 2006.229.19:00:27.36#ibcon#read 6, iclass 21, count 0 2006.229.19:00:27.36#ibcon#end of sib2, iclass 21, count 0 2006.229.19:00:27.36#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:00:27.36#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:00:27.36#ibcon#[27=USB\r\n] 2006.229.19:00:27.36#ibcon#*before write, iclass 21, count 0 2006.229.19:00:27.36#ibcon#enter sib2, iclass 21, count 0 2006.229.19:00:27.36#ibcon#flushed, iclass 21, count 0 2006.229.19:00:27.36#ibcon#about to write, iclass 21, count 0 2006.229.19:00:27.36#ibcon#wrote, iclass 21, count 0 2006.229.19:00:27.36#ibcon#about to read 3, iclass 21, count 0 2006.229.19:00:27.38#ibcon#read 3, iclass 21, count 0 2006.229.19:00:27.38#ibcon#about to read 4, iclass 21, count 0 2006.229.19:00:27.38#ibcon#read 4, iclass 21, count 0 2006.229.19:00:27.39#ibcon#about to read 5, iclass 21, count 0 2006.229.19:00:27.39#ibcon#read 5, iclass 21, count 0 2006.229.19:00:27.39#ibcon#about to read 6, iclass 21, count 0 2006.229.19:00:27.39#ibcon#read 6, iclass 21, count 0 2006.229.19:00:27.39#ibcon#end of sib2, iclass 21, count 0 2006.229.19:00:27.39#ibcon#*after write, iclass 21, count 0 2006.229.19:00:27.39#ibcon#*before return 0, iclass 21, count 0 2006.229.19:00:27.39#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:27.39#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:00:27.39#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:00:27.39#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:00:27.39$vck44/vblo=3,649.99 2006.229.19:00:27.39#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.19:00:27.39#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.19:00:27.39#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:27.39#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:27.39#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:27.39#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:27.39#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:00:27.39#ibcon#first serial, iclass 23, count 0 2006.229.19:00:27.39#ibcon#enter sib2, iclass 23, count 0 2006.229.19:00:27.39#ibcon#flushed, iclass 23, count 0 2006.229.19:00:27.39#ibcon#about to write, iclass 23, count 0 2006.229.19:00:27.39#ibcon#wrote, iclass 23, count 0 2006.229.19:00:27.39#ibcon#about to read 3, iclass 23, count 0 2006.229.19:00:27.40#ibcon#read 3, iclass 23, count 0 2006.229.19:00:27.40#ibcon#about to read 4, iclass 23, count 0 2006.229.19:00:27.41#ibcon#read 4, iclass 23, count 0 2006.229.19:00:27.41#ibcon#about to read 5, iclass 23, count 0 2006.229.19:00:27.41#ibcon#read 5, iclass 23, count 0 2006.229.19:00:27.41#ibcon#about to read 6, iclass 23, count 0 2006.229.19:00:27.41#ibcon#read 6, iclass 23, count 0 2006.229.19:00:27.41#ibcon#end of sib2, iclass 23, count 0 2006.229.19:00:27.41#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:00:27.41#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:00:27.41#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:00:27.41#ibcon#*before write, iclass 23, count 0 2006.229.19:00:27.41#ibcon#enter sib2, iclass 23, count 0 2006.229.19:00:27.41#ibcon#flushed, iclass 23, count 0 2006.229.19:00:27.41#ibcon#about to write, iclass 23, count 0 2006.229.19:00:27.41#ibcon#wrote, iclass 23, count 0 2006.229.19:00:27.41#ibcon#about to read 3, iclass 23, count 0 2006.229.19:00:27.44#ibcon#read 3, iclass 23, count 0 2006.229.19:00:27.45#ibcon#about to read 4, iclass 23, count 0 2006.229.19:00:27.45#ibcon#read 4, iclass 23, count 0 2006.229.19:00:27.45#ibcon#about to read 5, iclass 23, count 0 2006.229.19:00:27.45#ibcon#read 5, iclass 23, count 0 2006.229.19:00:27.45#ibcon#about to read 6, iclass 23, count 0 2006.229.19:00:27.45#ibcon#read 6, iclass 23, count 0 2006.229.19:00:27.45#ibcon#end of sib2, iclass 23, count 0 2006.229.19:00:27.45#ibcon#*after write, iclass 23, count 0 2006.229.19:00:27.45#ibcon#*before return 0, iclass 23, count 0 2006.229.19:00:27.45#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:27.45#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:00:27.45#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:00:27.45#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:00:27.45$vck44/vb=3,4 2006.229.19:00:27.45#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.19:00:27.45#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.19:00:27.45#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:27.45#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:27.50#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:27.50#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:27.51#ibcon#enter wrdev, iclass 25, count 2 2006.229.19:00:27.51#ibcon#first serial, iclass 25, count 2 2006.229.19:00:27.51#ibcon#enter sib2, iclass 25, count 2 2006.229.19:00:27.51#ibcon#flushed, iclass 25, count 2 2006.229.19:00:27.51#ibcon#about to write, iclass 25, count 2 2006.229.19:00:27.51#ibcon#wrote, iclass 25, count 2 2006.229.19:00:27.51#ibcon#about to read 3, iclass 25, count 2 2006.229.19:00:27.52#ibcon#read 3, iclass 25, count 2 2006.229.19:00:27.53#ibcon#about to read 4, iclass 25, count 2 2006.229.19:00:27.53#ibcon#read 4, iclass 25, count 2 2006.229.19:00:27.53#ibcon#about to read 5, iclass 25, count 2 2006.229.19:00:27.53#ibcon#read 5, iclass 25, count 2 2006.229.19:00:27.53#ibcon#about to read 6, iclass 25, count 2 2006.229.19:00:27.53#ibcon#read 6, iclass 25, count 2 2006.229.19:00:27.53#ibcon#end of sib2, iclass 25, count 2 2006.229.19:00:27.53#ibcon#*mode == 0, iclass 25, count 2 2006.229.19:00:27.53#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.19:00:27.53#ibcon#[27=AT03-04\r\n] 2006.229.19:00:27.53#ibcon#*before write, iclass 25, count 2 2006.229.19:00:27.53#ibcon#enter sib2, iclass 25, count 2 2006.229.19:00:27.53#ibcon#flushed, iclass 25, count 2 2006.229.19:00:27.53#ibcon#about to write, iclass 25, count 2 2006.229.19:00:27.53#ibcon#wrote, iclass 25, count 2 2006.229.19:00:27.53#ibcon#about to read 3, iclass 25, count 2 2006.229.19:00:27.55#ibcon#read 3, iclass 25, count 2 2006.229.19:00:27.55#ibcon#about to read 4, iclass 25, count 2 2006.229.19:00:27.56#ibcon#read 4, iclass 25, count 2 2006.229.19:00:27.56#ibcon#about to read 5, iclass 25, count 2 2006.229.19:00:27.56#ibcon#read 5, iclass 25, count 2 2006.229.19:00:27.56#ibcon#about to read 6, iclass 25, count 2 2006.229.19:00:27.56#ibcon#read 6, iclass 25, count 2 2006.229.19:00:27.56#ibcon#end of sib2, iclass 25, count 2 2006.229.19:00:27.56#ibcon#*after write, iclass 25, count 2 2006.229.19:00:27.56#ibcon#*before return 0, iclass 25, count 2 2006.229.19:00:27.56#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:27.56#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:00:27.56#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.19:00:27.56#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:27.56#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:27.67#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:27.68#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:27.68#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:00:27.68#ibcon#first serial, iclass 25, count 0 2006.229.19:00:27.68#ibcon#enter sib2, iclass 25, count 0 2006.229.19:00:27.68#ibcon#flushed, iclass 25, count 0 2006.229.19:00:27.68#ibcon#about to write, iclass 25, count 0 2006.229.19:00:27.68#ibcon#wrote, iclass 25, count 0 2006.229.19:00:27.68#ibcon#about to read 3, iclass 25, count 0 2006.229.19:00:27.69#ibcon#read 3, iclass 25, count 0 2006.229.19:00:27.70#ibcon#about to read 4, iclass 25, count 0 2006.229.19:00:27.70#ibcon#read 4, iclass 25, count 0 2006.229.19:00:27.70#ibcon#about to read 5, iclass 25, count 0 2006.229.19:00:27.70#ibcon#read 5, iclass 25, count 0 2006.229.19:00:27.70#ibcon#about to read 6, iclass 25, count 0 2006.229.19:00:27.70#ibcon#read 6, iclass 25, count 0 2006.229.19:00:27.70#ibcon#end of sib2, iclass 25, count 0 2006.229.19:00:27.70#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:00:27.70#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:00:27.70#ibcon#[27=USB\r\n] 2006.229.19:00:27.70#ibcon#*before write, iclass 25, count 0 2006.229.19:00:27.70#ibcon#enter sib2, iclass 25, count 0 2006.229.19:00:27.70#ibcon#flushed, iclass 25, count 0 2006.229.19:00:27.70#ibcon#about to write, iclass 25, count 0 2006.229.19:00:27.70#ibcon#wrote, iclass 25, count 0 2006.229.19:00:27.70#ibcon#about to read 3, iclass 25, count 0 2006.229.19:00:27.72#ibcon#read 3, iclass 25, count 0 2006.229.19:00:27.73#ibcon#about to read 4, iclass 25, count 0 2006.229.19:00:27.73#ibcon#read 4, iclass 25, count 0 2006.229.19:00:27.73#ibcon#about to read 5, iclass 25, count 0 2006.229.19:00:27.73#ibcon#read 5, iclass 25, count 0 2006.229.19:00:27.73#ibcon#about to read 6, iclass 25, count 0 2006.229.19:00:27.73#ibcon#read 6, iclass 25, count 0 2006.229.19:00:27.73#ibcon#end of sib2, iclass 25, count 0 2006.229.19:00:27.73#ibcon#*after write, iclass 25, count 0 2006.229.19:00:27.73#ibcon#*before return 0, iclass 25, count 0 2006.229.19:00:27.73#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:27.73#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:00:27.73#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:00:27.73#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:00:27.73$vck44/vblo=4,679.99 2006.229.19:00:27.73#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.19:00:27.73#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.19:00:27.73#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:27.73#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:27.73#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:27.73#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:27.73#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:00:27.73#ibcon#first serial, iclass 27, count 0 2006.229.19:00:27.73#ibcon#enter sib2, iclass 27, count 0 2006.229.19:00:27.73#ibcon#flushed, iclass 27, count 0 2006.229.19:00:27.73#ibcon#about to write, iclass 27, count 0 2006.229.19:00:27.73#ibcon#wrote, iclass 27, count 0 2006.229.19:00:27.73#ibcon#about to read 3, iclass 27, count 0 2006.229.19:00:27.75#ibcon#read 3, iclass 27, count 0 2006.229.19:00:27.75#ibcon#about to read 4, iclass 27, count 0 2006.229.19:00:27.75#ibcon#read 4, iclass 27, count 0 2006.229.19:00:27.75#ibcon#about to read 5, iclass 27, count 0 2006.229.19:00:27.75#ibcon#read 5, iclass 27, count 0 2006.229.19:00:27.75#ibcon#about to read 6, iclass 27, count 0 2006.229.19:00:27.75#ibcon#read 6, iclass 27, count 0 2006.229.19:00:27.75#ibcon#end of sib2, iclass 27, count 0 2006.229.19:00:27.75#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:00:27.75#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:00:27.75#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:00:27.75#ibcon#*before write, iclass 27, count 0 2006.229.19:00:27.75#ibcon#enter sib2, iclass 27, count 0 2006.229.19:00:27.75#ibcon#flushed, iclass 27, count 0 2006.229.19:00:27.75#ibcon#about to write, iclass 27, count 0 2006.229.19:00:27.75#ibcon#wrote, iclass 27, count 0 2006.229.19:00:27.75#ibcon#about to read 3, iclass 27, count 0 2006.229.19:00:27.78#ibcon#read 3, iclass 27, count 0 2006.229.19:00:27.79#ibcon#about to read 4, iclass 27, count 0 2006.229.19:00:27.79#ibcon#read 4, iclass 27, count 0 2006.229.19:00:27.79#ibcon#about to read 5, iclass 27, count 0 2006.229.19:00:27.79#ibcon#read 5, iclass 27, count 0 2006.229.19:00:27.79#ibcon#about to read 6, iclass 27, count 0 2006.229.19:00:27.79#ibcon#read 6, iclass 27, count 0 2006.229.19:00:27.79#ibcon#end of sib2, iclass 27, count 0 2006.229.19:00:27.79#ibcon#*after write, iclass 27, count 0 2006.229.19:00:27.79#ibcon#*before return 0, iclass 27, count 0 2006.229.19:00:27.79#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:27.79#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:00:27.79#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:00:27.79#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:00:27.79$vck44/vb=4,4 2006.229.19:00:27.79#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.19:00:27.79#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.19:00:27.79#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:27.79#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:27.84#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:27.85#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:27.85#ibcon#enter wrdev, iclass 29, count 2 2006.229.19:00:27.85#ibcon#first serial, iclass 29, count 2 2006.229.19:00:27.85#ibcon#enter sib2, iclass 29, count 2 2006.229.19:00:27.85#ibcon#flushed, iclass 29, count 2 2006.229.19:00:27.85#ibcon#about to write, iclass 29, count 2 2006.229.19:00:27.85#ibcon#wrote, iclass 29, count 2 2006.229.19:00:27.85#ibcon#about to read 3, iclass 29, count 2 2006.229.19:00:27.86#ibcon#read 3, iclass 29, count 2 2006.229.19:00:27.87#ibcon#about to read 4, iclass 29, count 2 2006.229.19:00:27.87#ibcon#read 4, iclass 29, count 2 2006.229.19:00:27.87#ibcon#about to read 5, iclass 29, count 2 2006.229.19:00:27.87#ibcon#read 5, iclass 29, count 2 2006.229.19:00:27.87#ibcon#about to read 6, iclass 29, count 2 2006.229.19:00:27.87#ibcon#read 6, iclass 29, count 2 2006.229.19:00:27.87#ibcon#end of sib2, iclass 29, count 2 2006.229.19:00:27.87#ibcon#*mode == 0, iclass 29, count 2 2006.229.19:00:27.87#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.19:00:27.87#ibcon#[27=AT04-04\r\n] 2006.229.19:00:27.87#ibcon#*before write, iclass 29, count 2 2006.229.19:00:27.87#ibcon#enter sib2, iclass 29, count 2 2006.229.19:00:27.87#ibcon#flushed, iclass 29, count 2 2006.229.19:00:27.87#ibcon#about to write, iclass 29, count 2 2006.229.19:00:27.87#ibcon#wrote, iclass 29, count 2 2006.229.19:00:27.87#ibcon#about to read 3, iclass 29, count 2 2006.229.19:00:27.89#ibcon#read 3, iclass 29, count 2 2006.229.19:00:27.90#ibcon#about to read 4, iclass 29, count 2 2006.229.19:00:27.90#ibcon#read 4, iclass 29, count 2 2006.229.19:00:27.90#ibcon#about to read 5, iclass 29, count 2 2006.229.19:00:27.90#ibcon#read 5, iclass 29, count 2 2006.229.19:00:27.90#ibcon#about to read 6, iclass 29, count 2 2006.229.19:00:27.90#ibcon#read 6, iclass 29, count 2 2006.229.19:00:27.90#ibcon#end of sib2, iclass 29, count 2 2006.229.19:00:27.90#ibcon#*after write, iclass 29, count 2 2006.229.19:00:27.90#ibcon#*before return 0, iclass 29, count 2 2006.229.19:00:27.90#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:27.90#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:00:27.90#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.19:00:27.90#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:27.90#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:28.01#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:28.02#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:28.02#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:00:28.02#ibcon#first serial, iclass 29, count 0 2006.229.19:00:28.02#ibcon#enter sib2, iclass 29, count 0 2006.229.19:00:28.02#ibcon#flushed, iclass 29, count 0 2006.229.19:00:28.02#ibcon#about to write, iclass 29, count 0 2006.229.19:00:28.02#ibcon#wrote, iclass 29, count 0 2006.229.19:00:28.02#ibcon#about to read 3, iclass 29, count 0 2006.229.19:00:28.03#ibcon#read 3, iclass 29, count 0 2006.229.19:00:28.04#ibcon#about to read 4, iclass 29, count 0 2006.229.19:00:28.04#ibcon#read 4, iclass 29, count 0 2006.229.19:00:28.04#ibcon#about to read 5, iclass 29, count 0 2006.229.19:00:28.04#ibcon#read 5, iclass 29, count 0 2006.229.19:00:28.04#ibcon#about to read 6, iclass 29, count 0 2006.229.19:00:28.04#ibcon#read 6, iclass 29, count 0 2006.229.19:00:28.04#ibcon#end of sib2, iclass 29, count 0 2006.229.19:00:28.04#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:00:28.04#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:00:28.04#ibcon#[27=USB\r\n] 2006.229.19:00:28.04#ibcon#*before write, iclass 29, count 0 2006.229.19:00:28.04#ibcon#enter sib2, iclass 29, count 0 2006.229.19:00:28.04#ibcon#flushed, iclass 29, count 0 2006.229.19:00:28.04#ibcon#about to write, iclass 29, count 0 2006.229.19:00:28.04#ibcon#wrote, iclass 29, count 0 2006.229.19:00:28.04#ibcon#about to read 3, iclass 29, count 0 2006.229.19:00:28.06#ibcon#read 3, iclass 29, count 0 2006.229.19:00:28.07#ibcon#about to read 4, iclass 29, count 0 2006.229.19:00:28.07#ibcon#read 4, iclass 29, count 0 2006.229.19:00:28.07#ibcon#about to read 5, iclass 29, count 0 2006.229.19:00:28.07#ibcon#read 5, iclass 29, count 0 2006.229.19:00:28.07#ibcon#about to read 6, iclass 29, count 0 2006.229.19:00:28.07#ibcon#read 6, iclass 29, count 0 2006.229.19:00:28.07#ibcon#end of sib2, iclass 29, count 0 2006.229.19:00:28.07#ibcon#*after write, iclass 29, count 0 2006.229.19:00:28.07#ibcon#*before return 0, iclass 29, count 0 2006.229.19:00:28.07#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:28.07#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:00:28.07#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:00:28.07#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:00:28.07$vck44/vblo=5,709.99 2006.229.19:00:28.07#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.19:00:28.07#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.19:00:28.07#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:28.07#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:28.07#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:28.07#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:28.07#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:00:28.07#ibcon#first serial, iclass 31, count 0 2006.229.19:00:28.07#ibcon#enter sib2, iclass 31, count 0 2006.229.19:00:28.07#ibcon#flushed, iclass 31, count 0 2006.229.19:00:28.07#ibcon#about to write, iclass 31, count 0 2006.229.19:00:28.07#ibcon#wrote, iclass 31, count 0 2006.229.19:00:28.07#ibcon#about to read 3, iclass 31, count 0 2006.229.19:00:28.08#ibcon#read 3, iclass 31, count 0 2006.229.19:00:28.09#ibcon#about to read 4, iclass 31, count 0 2006.229.19:00:28.09#ibcon#read 4, iclass 31, count 0 2006.229.19:00:28.09#ibcon#about to read 5, iclass 31, count 0 2006.229.19:00:28.09#ibcon#read 5, iclass 31, count 0 2006.229.19:00:28.09#ibcon#about to read 6, iclass 31, count 0 2006.229.19:00:28.09#ibcon#read 6, iclass 31, count 0 2006.229.19:00:28.09#ibcon#end of sib2, iclass 31, count 0 2006.229.19:00:28.09#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:00:28.09#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:00:28.09#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:00:28.09#ibcon#*before write, iclass 31, count 0 2006.229.19:00:28.09#ibcon#enter sib2, iclass 31, count 0 2006.229.19:00:28.09#ibcon#flushed, iclass 31, count 0 2006.229.19:00:28.09#ibcon#about to write, iclass 31, count 0 2006.229.19:00:28.09#ibcon#wrote, iclass 31, count 0 2006.229.19:00:28.09#ibcon#about to read 3, iclass 31, count 0 2006.229.19:00:28.12#ibcon#read 3, iclass 31, count 0 2006.229.19:00:28.13#ibcon#about to read 4, iclass 31, count 0 2006.229.19:00:28.13#ibcon#read 4, iclass 31, count 0 2006.229.19:00:28.13#ibcon#about to read 5, iclass 31, count 0 2006.229.19:00:28.13#ibcon#read 5, iclass 31, count 0 2006.229.19:00:28.13#ibcon#about to read 6, iclass 31, count 0 2006.229.19:00:28.13#ibcon#read 6, iclass 31, count 0 2006.229.19:00:28.13#ibcon#end of sib2, iclass 31, count 0 2006.229.19:00:28.13#ibcon#*after write, iclass 31, count 0 2006.229.19:00:28.13#ibcon#*before return 0, iclass 31, count 0 2006.229.19:00:28.13#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:28.13#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:00:28.13#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:00:28.13#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:00:28.13$vck44/vb=5,4 2006.229.19:00:28.13#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.19:00:28.13#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.19:00:28.13#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:28.13#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:28.18#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:28.19#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:28.19#ibcon#enter wrdev, iclass 33, count 2 2006.229.19:00:28.19#ibcon#first serial, iclass 33, count 2 2006.229.19:00:28.19#ibcon#enter sib2, iclass 33, count 2 2006.229.19:00:28.19#ibcon#flushed, iclass 33, count 2 2006.229.19:00:28.19#ibcon#about to write, iclass 33, count 2 2006.229.19:00:28.19#ibcon#wrote, iclass 33, count 2 2006.229.19:00:28.19#ibcon#about to read 3, iclass 33, count 2 2006.229.19:00:28.20#ibcon#read 3, iclass 33, count 2 2006.229.19:00:28.20#ibcon#about to read 4, iclass 33, count 2 2006.229.19:00:28.21#ibcon#read 4, iclass 33, count 2 2006.229.19:00:28.21#ibcon#about to read 5, iclass 33, count 2 2006.229.19:00:28.21#ibcon#read 5, iclass 33, count 2 2006.229.19:00:28.21#ibcon#about to read 6, iclass 33, count 2 2006.229.19:00:28.21#ibcon#read 6, iclass 33, count 2 2006.229.19:00:28.21#ibcon#end of sib2, iclass 33, count 2 2006.229.19:00:28.21#ibcon#*mode == 0, iclass 33, count 2 2006.229.19:00:28.21#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.19:00:28.21#ibcon#[27=AT05-04\r\n] 2006.229.19:00:28.21#ibcon#*before write, iclass 33, count 2 2006.229.19:00:28.21#ibcon#enter sib2, iclass 33, count 2 2006.229.19:00:28.21#ibcon#flushed, iclass 33, count 2 2006.229.19:00:28.21#ibcon#about to write, iclass 33, count 2 2006.229.19:00:28.21#ibcon#wrote, iclass 33, count 2 2006.229.19:00:28.21#ibcon#about to read 3, iclass 33, count 2 2006.229.19:00:28.23#ibcon#read 3, iclass 33, count 2 2006.229.19:00:28.23#ibcon#about to read 4, iclass 33, count 2 2006.229.19:00:28.24#ibcon#read 4, iclass 33, count 2 2006.229.19:00:28.24#ibcon#about to read 5, iclass 33, count 2 2006.229.19:00:28.24#ibcon#read 5, iclass 33, count 2 2006.229.19:00:28.24#ibcon#about to read 6, iclass 33, count 2 2006.229.19:00:28.24#ibcon#read 6, iclass 33, count 2 2006.229.19:00:28.24#ibcon#end of sib2, iclass 33, count 2 2006.229.19:00:28.24#ibcon#*after write, iclass 33, count 2 2006.229.19:00:28.24#ibcon#*before return 0, iclass 33, count 2 2006.229.19:00:28.24#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:28.24#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:00:28.24#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.19:00:28.24#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:28.24#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:28.35#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:28.36#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:28.36#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:00:28.36#ibcon#first serial, iclass 33, count 0 2006.229.19:00:28.36#ibcon#enter sib2, iclass 33, count 0 2006.229.19:00:28.36#ibcon#flushed, iclass 33, count 0 2006.229.19:00:28.36#ibcon#about to write, iclass 33, count 0 2006.229.19:00:28.36#ibcon#wrote, iclass 33, count 0 2006.229.19:00:28.36#ibcon#about to read 3, iclass 33, count 0 2006.229.19:00:28.37#ibcon#read 3, iclass 33, count 0 2006.229.19:00:28.38#ibcon#about to read 4, iclass 33, count 0 2006.229.19:00:28.38#ibcon#read 4, iclass 33, count 0 2006.229.19:00:28.38#ibcon#about to read 5, iclass 33, count 0 2006.229.19:00:28.38#ibcon#read 5, iclass 33, count 0 2006.229.19:00:28.38#ibcon#about to read 6, iclass 33, count 0 2006.229.19:00:28.38#ibcon#read 6, iclass 33, count 0 2006.229.19:00:28.38#ibcon#end of sib2, iclass 33, count 0 2006.229.19:00:28.38#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:00:28.38#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:00:28.38#ibcon#[27=USB\r\n] 2006.229.19:00:28.38#ibcon#*before write, iclass 33, count 0 2006.229.19:00:28.38#ibcon#enter sib2, iclass 33, count 0 2006.229.19:00:28.38#ibcon#flushed, iclass 33, count 0 2006.229.19:00:28.38#ibcon#about to write, iclass 33, count 0 2006.229.19:00:28.38#ibcon#wrote, iclass 33, count 0 2006.229.19:00:28.38#ibcon#about to read 3, iclass 33, count 0 2006.229.19:00:28.40#ibcon#read 3, iclass 33, count 0 2006.229.19:00:28.40#ibcon#about to read 4, iclass 33, count 0 2006.229.19:00:28.41#ibcon#read 4, iclass 33, count 0 2006.229.19:00:28.41#ibcon#about to read 5, iclass 33, count 0 2006.229.19:00:28.41#ibcon#read 5, iclass 33, count 0 2006.229.19:00:28.41#ibcon#about to read 6, iclass 33, count 0 2006.229.19:00:28.41#ibcon#read 6, iclass 33, count 0 2006.229.19:00:28.41#ibcon#end of sib2, iclass 33, count 0 2006.229.19:00:28.41#ibcon#*after write, iclass 33, count 0 2006.229.19:00:28.41#ibcon#*before return 0, iclass 33, count 0 2006.229.19:00:28.41#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:28.41#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:00:28.41#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:00:28.41#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:00:28.41$vck44/vblo=6,719.99 2006.229.19:00:28.41#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.19:00:28.41#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.19:00:28.41#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:28.41#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:28.41#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:28.41#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:28.41#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:00:28.41#ibcon#first serial, iclass 35, count 0 2006.229.19:00:28.41#ibcon#enter sib2, iclass 35, count 0 2006.229.19:00:28.41#ibcon#flushed, iclass 35, count 0 2006.229.19:00:28.41#ibcon#about to write, iclass 35, count 0 2006.229.19:00:28.41#ibcon#wrote, iclass 35, count 0 2006.229.19:00:28.41#ibcon#about to read 3, iclass 35, count 0 2006.229.19:00:28.42#ibcon#read 3, iclass 35, count 0 2006.229.19:00:28.43#ibcon#about to read 4, iclass 35, count 0 2006.229.19:00:28.43#ibcon#read 4, iclass 35, count 0 2006.229.19:00:28.43#ibcon#about to read 5, iclass 35, count 0 2006.229.19:00:28.43#ibcon#read 5, iclass 35, count 0 2006.229.19:00:28.43#ibcon#about to read 6, iclass 35, count 0 2006.229.19:00:28.43#ibcon#read 6, iclass 35, count 0 2006.229.19:00:28.43#ibcon#end of sib2, iclass 35, count 0 2006.229.19:00:28.43#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:00:28.43#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:00:28.43#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:00:28.43#ibcon#*before write, iclass 35, count 0 2006.229.19:00:28.43#ibcon#enter sib2, iclass 35, count 0 2006.229.19:00:28.43#ibcon#flushed, iclass 35, count 0 2006.229.19:00:28.43#ibcon#about to write, iclass 35, count 0 2006.229.19:00:28.43#ibcon#wrote, iclass 35, count 0 2006.229.19:00:28.43#ibcon#about to read 3, iclass 35, count 0 2006.229.19:00:28.46#ibcon#read 3, iclass 35, count 0 2006.229.19:00:28.47#ibcon#about to read 4, iclass 35, count 0 2006.229.19:00:28.47#ibcon#read 4, iclass 35, count 0 2006.229.19:00:28.47#ibcon#about to read 5, iclass 35, count 0 2006.229.19:00:28.47#ibcon#read 5, iclass 35, count 0 2006.229.19:00:28.47#ibcon#about to read 6, iclass 35, count 0 2006.229.19:00:28.47#ibcon#read 6, iclass 35, count 0 2006.229.19:00:28.47#ibcon#end of sib2, iclass 35, count 0 2006.229.19:00:28.47#ibcon#*after write, iclass 35, count 0 2006.229.19:00:28.47#ibcon#*before return 0, iclass 35, count 0 2006.229.19:00:28.47#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:28.47#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:00:28.47#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:00:28.47#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:00:28.47$vck44/vb=6,4 2006.229.19:00:28.47#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.19:00:28.47#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.19:00:28.47#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:28.47#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:28.52#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:28.52#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:28.53#ibcon#enter wrdev, iclass 37, count 2 2006.229.19:00:28.53#ibcon#first serial, iclass 37, count 2 2006.229.19:00:28.53#ibcon#enter sib2, iclass 37, count 2 2006.229.19:00:28.53#ibcon#flushed, iclass 37, count 2 2006.229.19:00:28.53#ibcon#about to write, iclass 37, count 2 2006.229.19:00:28.53#ibcon#wrote, iclass 37, count 2 2006.229.19:00:28.53#ibcon#about to read 3, iclass 37, count 2 2006.229.19:00:28.54#ibcon#read 3, iclass 37, count 2 2006.229.19:00:28.54#ibcon#about to read 4, iclass 37, count 2 2006.229.19:00:28.54#ibcon#read 4, iclass 37, count 2 2006.229.19:00:28.54#ibcon#about to read 5, iclass 37, count 2 2006.229.19:00:28.55#ibcon#read 5, iclass 37, count 2 2006.229.19:00:28.55#ibcon#about to read 6, iclass 37, count 2 2006.229.19:00:28.55#ibcon#read 6, iclass 37, count 2 2006.229.19:00:28.55#ibcon#end of sib2, iclass 37, count 2 2006.229.19:00:28.55#ibcon#*mode == 0, iclass 37, count 2 2006.229.19:00:28.55#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.19:00:28.55#ibcon#[27=AT06-04\r\n] 2006.229.19:00:28.55#ibcon#*before write, iclass 37, count 2 2006.229.19:00:28.55#ibcon#enter sib2, iclass 37, count 2 2006.229.19:00:28.55#ibcon#flushed, iclass 37, count 2 2006.229.19:00:28.55#ibcon#about to write, iclass 37, count 2 2006.229.19:00:28.55#ibcon#wrote, iclass 37, count 2 2006.229.19:00:28.55#ibcon#about to read 3, iclass 37, count 2 2006.229.19:00:28.57#ibcon#read 3, iclass 37, count 2 2006.229.19:00:28.58#ibcon#about to read 4, iclass 37, count 2 2006.229.19:00:28.58#ibcon#read 4, iclass 37, count 2 2006.229.19:00:28.58#ibcon#about to read 5, iclass 37, count 2 2006.229.19:00:28.58#ibcon#read 5, iclass 37, count 2 2006.229.19:00:28.58#ibcon#about to read 6, iclass 37, count 2 2006.229.19:00:28.58#ibcon#read 6, iclass 37, count 2 2006.229.19:00:28.58#ibcon#end of sib2, iclass 37, count 2 2006.229.19:00:28.58#ibcon#*after write, iclass 37, count 2 2006.229.19:00:28.58#ibcon#*before return 0, iclass 37, count 2 2006.229.19:00:28.58#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:28.58#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:00:28.58#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.19:00:28.58#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:28.58#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:28.69#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:28.69#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:28.70#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:00:28.70#ibcon#first serial, iclass 37, count 0 2006.229.19:00:28.70#ibcon#enter sib2, iclass 37, count 0 2006.229.19:00:28.70#ibcon#flushed, iclass 37, count 0 2006.229.19:00:28.70#ibcon#about to write, iclass 37, count 0 2006.229.19:00:28.70#ibcon#wrote, iclass 37, count 0 2006.229.19:00:28.70#ibcon#about to read 3, iclass 37, count 0 2006.229.19:00:28.71#ibcon#read 3, iclass 37, count 0 2006.229.19:00:28.72#ibcon#about to read 4, iclass 37, count 0 2006.229.19:00:28.72#ibcon#read 4, iclass 37, count 0 2006.229.19:00:28.72#ibcon#about to read 5, iclass 37, count 0 2006.229.19:00:28.72#ibcon#read 5, iclass 37, count 0 2006.229.19:00:28.72#ibcon#about to read 6, iclass 37, count 0 2006.229.19:00:28.72#ibcon#read 6, iclass 37, count 0 2006.229.19:00:28.72#ibcon#end of sib2, iclass 37, count 0 2006.229.19:00:28.72#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:00:28.72#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:00:28.72#ibcon#[27=USB\r\n] 2006.229.19:00:28.72#ibcon#*before write, iclass 37, count 0 2006.229.19:00:28.72#ibcon#enter sib2, iclass 37, count 0 2006.229.19:00:28.72#ibcon#flushed, iclass 37, count 0 2006.229.19:00:28.72#ibcon#about to write, iclass 37, count 0 2006.229.19:00:28.72#ibcon#wrote, iclass 37, count 0 2006.229.19:00:28.72#ibcon#about to read 3, iclass 37, count 0 2006.229.19:00:28.74#ibcon#read 3, iclass 37, count 0 2006.229.19:00:28.75#ibcon#about to read 4, iclass 37, count 0 2006.229.19:00:28.75#ibcon#read 4, iclass 37, count 0 2006.229.19:00:28.75#ibcon#about to read 5, iclass 37, count 0 2006.229.19:00:28.75#ibcon#read 5, iclass 37, count 0 2006.229.19:00:28.75#ibcon#about to read 6, iclass 37, count 0 2006.229.19:00:28.75#ibcon#read 6, iclass 37, count 0 2006.229.19:00:28.75#ibcon#end of sib2, iclass 37, count 0 2006.229.19:00:28.75#ibcon#*after write, iclass 37, count 0 2006.229.19:00:28.75#ibcon#*before return 0, iclass 37, count 0 2006.229.19:00:28.75#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:28.75#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:00:28.75#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:00:28.75#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:00:28.75$vck44/vblo=7,734.99 2006.229.19:00:28.75#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.19:00:28.75#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.19:00:28.75#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:28.75#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:28.75#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:28.75#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:28.75#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:00:28.75#ibcon#first serial, iclass 39, count 0 2006.229.19:00:28.75#ibcon#enter sib2, iclass 39, count 0 2006.229.19:00:28.75#ibcon#flushed, iclass 39, count 0 2006.229.19:00:28.75#ibcon#about to write, iclass 39, count 0 2006.229.19:00:28.75#ibcon#wrote, iclass 39, count 0 2006.229.19:00:28.75#ibcon#about to read 3, iclass 39, count 0 2006.229.19:00:28.76#ibcon#read 3, iclass 39, count 0 2006.229.19:00:28.77#ibcon#about to read 4, iclass 39, count 0 2006.229.19:00:28.77#ibcon#read 4, iclass 39, count 0 2006.229.19:00:28.77#ibcon#about to read 5, iclass 39, count 0 2006.229.19:00:28.77#ibcon#read 5, iclass 39, count 0 2006.229.19:00:28.77#ibcon#about to read 6, iclass 39, count 0 2006.229.19:00:28.77#ibcon#read 6, iclass 39, count 0 2006.229.19:00:28.77#ibcon#end of sib2, iclass 39, count 0 2006.229.19:00:28.77#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:00:28.77#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:00:28.77#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:00:28.77#ibcon#*before write, iclass 39, count 0 2006.229.19:00:28.77#ibcon#enter sib2, iclass 39, count 0 2006.229.19:00:28.77#ibcon#flushed, iclass 39, count 0 2006.229.19:00:28.77#ibcon#about to write, iclass 39, count 0 2006.229.19:00:28.77#ibcon#wrote, iclass 39, count 0 2006.229.19:00:28.77#ibcon#about to read 3, iclass 39, count 0 2006.229.19:00:28.80#ibcon#read 3, iclass 39, count 0 2006.229.19:00:28.81#ibcon#about to read 4, iclass 39, count 0 2006.229.19:00:28.81#ibcon#read 4, iclass 39, count 0 2006.229.19:00:28.81#ibcon#about to read 5, iclass 39, count 0 2006.229.19:00:28.81#ibcon#read 5, iclass 39, count 0 2006.229.19:00:28.81#ibcon#about to read 6, iclass 39, count 0 2006.229.19:00:28.81#ibcon#read 6, iclass 39, count 0 2006.229.19:00:28.81#ibcon#end of sib2, iclass 39, count 0 2006.229.19:00:28.81#ibcon#*after write, iclass 39, count 0 2006.229.19:00:28.81#ibcon#*before return 0, iclass 39, count 0 2006.229.19:00:28.81#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:28.81#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:00:28.81#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:00:28.81#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:00:28.81$vck44/vb=7,4 2006.229.19:00:28.81#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.19:00:28.81#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.19:00:28.81#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:28.81#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:28.86#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:28.86#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:28.87#ibcon#enter wrdev, iclass 3, count 2 2006.229.19:00:28.87#ibcon#first serial, iclass 3, count 2 2006.229.19:00:28.87#ibcon#enter sib2, iclass 3, count 2 2006.229.19:00:28.87#ibcon#flushed, iclass 3, count 2 2006.229.19:00:28.87#ibcon#about to write, iclass 3, count 2 2006.229.19:00:28.87#ibcon#wrote, iclass 3, count 2 2006.229.19:00:28.87#ibcon#about to read 3, iclass 3, count 2 2006.229.19:00:28.88#ibcon#read 3, iclass 3, count 2 2006.229.19:00:28.89#ibcon#about to read 4, iclass 3, count 2 2006.229.19:00:28.89#ibcon#read 4, iclass 3, count 2 2006.229.19:00:28.89#ibcon#about to read 5, iclass 3, count 2 2006.229.19:00:28.89#ibcon#read 5, iclass 3, count 2 2006.229.19:00:28.89#ibcon#about to read 6, iclass 3, count 2 2006.229.19:00:28.89#ibcon#read 6, iclass 3, count 2 2006.229.19:00:28.89#ibcon#end of sib2, iclass 3, count 2 2006.229.19:00:28.89#ibcon#*mode == 0, iclass 3, count 2 2006.229.19:00:28.89#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.19:00:28.89#ibcon#[27=AT07-04\r\n] 2006.229.19:00:28.89#ibcon#*before write, iclass 3, count 2 2006.229.19:00:28.89#ibcon#enter sib2, iclass 3, count 2 2006.229.19:00:28.89#ibcon#flushed, iclass 3, count 2 2006.229.19:00:28.89#ibcon#about to write, iclass 3, count 2 2006.229.19:00:28.89#ibcon#wrote, iclass 3, count 2 2006.229.19:00:28.89#ibcon#about to read 3, iclass 3, count 2 2006.229.19:00:28.91#ibcon#read 3, iclass 3, count 2 2006.229.19:00:28.92#ibcon#about to read 4, iclass 3, count 2 2006.229.19:00:28.92#ibcon#read 4, iclass 3, count 2 2006.229.19:00:28.92#ibcon#about to read 5, iclass 3, count 2 2006.229.19:00:28.92#ibcon#read 5, iclass 3, count 2 2006.229.19:00:28.92#ibcon#about to read 6, iclass 3, count 2 2006.229.19:00:28.92#ibcon#read 6, iclass 3, count 2 2006.229.19:00:28.92#ibcon#end of sib2, iclass 3, count 2 2006.229.19:00:28.92#ibcon#*after write, iclass 3, count 2 2006.229.19:00:28.92#ibcon#*before return 0, iclass 3, count 2 2006.229.19:00:28.92#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:28.92#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:00:28.92#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.19:00:28.92#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:28.92#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:29.03#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:29.03#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:29.04#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:00:29.04#ibcon#first serial, iclass 3, count 0 2006.229.19:00:29.04#ibcon#enter sib2, iclass 3, count 0 2006.229.19:00:29.04#ibcon#flushed, iclass 3, count 0 2006.229.19:00:29.04#ibcon#about to write, iclass 3, count 0 2006.229.19:00:29.04#ibcon#wrote, iclass 3, count 0 2006.229.19:00:29.04#ibcon#about to read 3, iclass 3, count 0 2006.229.19:00:29.05#ibcon#read 3, iclass 3, count 0 2006.229.19:00:29.06#ibcon#about to read 4, iclass 3, count 0 2006.229.19:00:29.06#ibcon#read 4, iclass 3, count 0 2006.229.19:00:29.06#ibcon#about to read 5, iclass 3, count 0 2006.229.19:00:29.06#ibcon#read 5, iclass 3, count 0 2006.229.19:00:29.06#ibcon#about to read 6, iclass 3, count 0 2006.229.19:00:29.06#ibcon#read 6, iclass 3, count 0 2006.229.19:00:29.06#ibcon#end of sib2, iclass 3, count 0 2006.229.19:00:29.06#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:00:29.06#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:00:29.06#ibcon#[27=USB\r\n] 2006.229.19:00:29.06#ibcon#*before write, iclass 3, count 0 2006.229.19:00:29.06#ibcon#enter sib2, iclass 3, count 0 2006.229.19:00:29.06#ibcon#flushed, iclass 3, count 0 2006.229.19:00:29.06#ibcon#about to write, iclass 3, count 0 2006.229.19:00:29.06#ibcon#wrote, iclass 3, count 0 2006.229.19:00:29.06#ibcon#about to read 3, iclass 3, count 0 2006.229.19:00:29.08#ibcon#read 3, iclass 3, count 0 2006.229.19:00:29.09#ibcon#about to read 4, iclass 3, count 0 2006.229.19:00:29.09#ibcon#read 4, iclass 3, count 0 2006.229.19:00:29.09#ibcon#about to read 5, iclass 3, count 0 2006.229.19:00:29.09#ibcon#read 5, iclass 3, count 0 2006.229.19:00:29.09#ibcon#about to read 6, iclass 3, count 0 2006.229.19:00:29.09#ibcon#read 6, iclass 3, count 0 2006.229.19:00:29.09#ibcon#end of sib2, iclass 3, count 0 2006.229.19:00:29.09#ibcon#*after write, iclass 3, count 0 2006.229.19:00:29.09#ibcon#*before return 0, iclass 3, count 0 2006.229.19:00:29.09#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:29.09#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:00:29.09#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:00:29.09#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:00:29.09$vck44/vblo=8,744.99 2006.229.19:00:29.09#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:00:29.09#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:00:29.09#ibcon#ireg 17 cls_cnt 0 2006.229.19:00:29.09#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:29.09#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:29.09#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:29.09#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:00:29.09#ibcon#first serial, iclass 5, count 0 2006.229.19:00:29.09#ibcon#enter sib2, iclass 5, count 0 2006.229.19:00:29.09#ibcon#flushed, iclass 5, count 0 2006.229.19:00:29.09#ibcon#about to write, iclass 5, count 0 2006.229.19:00:29.09#ibcon#wrote, iclass 5, count 0 2006.229.19:00:29.09#ibcon#about to read 3, iclass 5, count 0 2006.229.19:00:29.10#ibcon#read 3, iclass 5, count 0 2006.229.19:00:29.10#ibcon#about to read 4, iclass 5, count 0 2006.229.19:00:29.11#ibcon#read 4, iclass 5, count 0 2006.229.19:00:29.11#ibcon#about to read 5, iclass 5, count 0 2006.229.19:00:29.11#ibcon#read 5, iclass 5, count 0 2006.229.19:00:29.11#ibcon#about to read 6, iclass 5, count 0 2006.229.19:00:29.11#ibcon#read 6, iclass 5, count 0 2006.229.19:00:29.11#ibcon#end of sib2, iclass 5, count 0 2006.229.19:00:29.11#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:00:29.11#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:00:29.11#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:00:29.11#ibcon#*before write, iclass 5, count 0 2006.229.19:00:29.11#ibcon#enter sib2, iclass 5, count 0 2006.229.19:00:29.11#ibcon#flushed, iclass 5, count 0 2006.229.19:00:29.11#ibcon#about to write, iclass 5, count 0 2006.229.19:00:29.11#ibcon#wrote, iclass 5, count 0 2006.229.19:00:29.11#ibcon#about to read 3, iclass 5, count 0 2006.229.19:00:29.14#ibcon#read 3, iclass 5, count 0 2006.229.19:00:29.15#ibcon#about to read 4, iclass 5, count 0 2006.229.19:00:29.15#ibcon#read 4, iclass 5, count 0 2006.229.19:00:29.15#ibcon#about to read 5, iclass 5, count 0 2006.229.19:00:29.15#ibcon#read 5, iclass 5, count 0 2006.229.19:00:29.15#ibcon#about to read 6, iclass 5, count 0 2006.229.19:00:29.15#ibcon#read 6, iclass 5, count 0 2006.229.19:00:29.15#ibcon#end of sib2, iclass 5, count 0 2006.229.19:00:29.15#ibcon#*after write, iclass 5, count 0 2006.229.19:00:29.15#ibcon#*before return 0, iclass 5, count 0 2006.229.19:00:29.15#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:29.15#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:00:29.15#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:00:29.15#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:00:29.15$vck44/vb=8,4 2006.229.19:00:29.15#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:00:29.15#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:00:29.15#ibcon#ireg 11 cls_cnt 2 2006.229.19:00:29.15#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:29.20#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:29.20#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:29.21#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:00:29.21#ibcon#first serial, iclass 7, count 2 2006.229.19:00:29.21#ibcon#enter sib2, iclass 7, count 2 2006.229.19:00:29.21#ibcon#flushed, iclass 7, count 2 2006.229.19:00:29.21#ibcon#about to write, iclass 7, count 2 2006.229.19:00:29.21#ibcon#wrote, iclass 7, count 2 2006.229.19:00:29.21#ibcon#about to read 3, iclass 7, count 2 2006.229.19:00:29.22#ibcon#read 3, iclass 7, count 2 2006.229.19:00:29.22#ibcon#about to read 4, iclass 7, count 2 2006.229.19:00:29.23#ibcon#read 4, iclass 7, count 2 2006.229.19:00:29.23#ibcon#about to read 5, iclass 7, count 2 2006.229.19:00:29.23#ibcon#read 5, iclass 7, count 2 2006.229.19:00:29.23#ibcon#about to read 6, iclass 7, count 2 2006.229.19:00:29.23#ibcon#read 6, iclass 7, count 2 2006.229.19:00:29.23#ibcon#end of sib2, iclass 7, count 2 2006.229.19:00:29.23#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:00:29.23#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:00:29.23#ibcon#[27=AT08-04\r\n] 2006.229.19:00:29.23#ibcon#*before write, iclass 7, count 2 2006.229.19:00:29.23#ibcon#enter sib2, iclass 7, count 2 2006.229.19:00:29.23#ibcon#flushed, iclass 7, count 2 2006.229.19:00:29.23#ibcon#about to write, iclass 7, count 2 2006.229.19:00:29.23#ibcon#wrote, iclass 7, count 2 2006.229.19:00:29.23#ibcon#about to read 3, iclass 7, count 2 2006.229.19:00:29.25#ibcon#read 3, iclass 7, count 2 2006.229.19:00:29.25#ibcon#about to read 4, iclass 7, count 2 2006.229.19:00:29.25#ibcon#read 4, iclass 7, count 2 2006.229.19:00:29.26#ibcon#about to read 5, iclass 7, count 2 2006.229.19:00:29.26#ibcon#read 5, iclass 7, count 2 2006.229.19:00:29.26#ibcon#about to read 6, iclass 7, count 2 2006.229.19:00:29.26#ibcon#read 6, iclass 7, count 2 2006.229.19:00:29.26#ibcon#end of sib2, iclass 7, count 2 2006.229.19:00:29.26#ibcon#*after write, iclass 7, count 2 2006.229.19:00:29.26#ibcon#*before return 0, iclass 7, count 2 2006.229.19:00:29.26#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:29.26#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:00:29.26#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:00:29.26#ibcon#ireg 7 cls_cnt 0 2006.229.19:00:29.26#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:29.37#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:29.37#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:29.38#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:00:29.38#ibcon#first serial, iclass 7, count 0 2006.229.19:00:29.38#ibcon#enter sib2, iclass 7, count 0 2006.229.19:00:29.38#ibcon#flushed, iclass 7, count 0 2006.229.19:00:29.38#ibcon#about to write, iclass 7, count 0 2006.229.19:00:29.38#ibcon#wrote, iclass 7, count 0 2006.229.19:00:29.38#ibcon#about to read 3, iclass 7, count 0 2006.229.19:00:29.39#ibcon#read 3, iclass 7, count 0 2006.229.19:00:29.39#ibcon#about to read 4, iclass 7, count 0 2006.229.19:00:29.39#ibcon#read 4, iclass 7, count 0 2006.229.19:00:29.40#ibcon#about to read 5, iclass 7, count 0 2006.229.19:00:29.40#ibcon#read 5, iclass 7, count 0 2006.229.19:00:29.40#ibcon#about to read 6, iclass 7, count 0 2006.229.19:00:29.40#ibcon#read 6, iclass 7, count 0 2006.229.19:00:29.40#ibcon#end of sib2, iclass 7, count 0 2006.229.19:00:29.40#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:00:29.40#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:00:29.40#ibcon#[27=USB\r\n] 2006.229.19:00:29.40#ibcon#*before write, iclass 7, count 0 2006.229.19:00:29.40#ibcon#enter sib2, iclass 7, count 0 2006.229.19:00:29.40#ibcon#flushed, iclass 7, count 0 2006.229.19:00:29.40#ibcon#about to write, iclass 7, count 0 2006.229.19:00:29.40#ibcon#wrote, iclass 7, count 0 2006.229.19:00:29.40#ibcon#about to read 3, iclass 7, count 0 2006.229.19:00:29.42#ibcon#read 3, iclass 7, count 0 2006.229.19:00:29.42#ibcon#about to read 4, iclass 7, count 0 2006.229.19:00:29.42#ibcon#read 4, iclass 7, count 0 2006.229.19:00:29.42#ibcon#about to read 5, iclass 7, count 0 2006.229.19:00:29.43#ibcon#read 5, iclass 7, count 0 2006.229.19:00:29.43#ibcon#about to read 6, iclass 7, count 0 2006.229.19:00:29.43#ibcon#read 6, iclass 7, count 0 2006.229.19:00:29.43#ibcon#end of sib2, iclass 7, count 0 2006.229.19:00:29.43#ibcon#*after write, iclass 7, count 0 2006.229.19:00:29.43#ibcon#*before return 0, iclass 7, count 0 2006.229.19:00:29.43#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:29.43#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:00:29.43#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:00:29.43#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:00:29.43$vck44/vabw=wide 2006.229.19:00:29.43#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:00:29.43#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:00:29.43#ibcon#ireg 8 cls_cnt 0 2006.229.19:00:29.43#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:29.43#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:29.43#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:29.43#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:00:29.43#ibcon#first serial, iclass 11, count 0 2006.229.19:00:29.43#ibcon#enter sib2, iclass 11, count 0 2006.229.19:00:29.43#ibcon#flushed, iclass 11, count 0 2006.229.19:00:29.43#ibcon#about to write, iclass 11, count 0 2006.229.19:00:29.43#ibcon#wrote, iclass 11, count 0 2006.229.19:00:29.43#ibcon#about to read 3, iclass 11, count 0 2006.229.19:00:29.44#ibcon#read 3, iclass 11, count 0 2006.229.19:00:29.44#ibcon#about to read 4, iclass 11, count 0 2006.229.19:00:29.44#ibcon#read 4, iclass 11, count 0 2006.229.19:00:29.45#ibcon#about to read 5, iclass 11, count 0 2006.229.19:00:29.45#ibcon#read 5, iclass 11, count 0 2006.229.19:00:29.45#ibcon#about to read 6, iclass 11, count 0 2006.229.19:00:29.45#ibcon#read 6, iclass 11, count 0 2006.229.19:00:29.45#ibcon#end of sib2, iclass 11, count 0 2006.229.19:00:29.45#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:00:29.45#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:00:29.45#ibcon#[25=BW32\r\n] 2006.229.19:00:29.45#ibcon#*before write, iclass 11, count 0 2006.229.19:00:29.45#ibcon#enter sib2, iclass 11, count 0 2006.229.19:00:29.45#ibcon#flushed, iclass 11, count 0 2006.229.19:00:29.45#ibcon#about to write, iclass 11, count 0 2006.229.19:00:29.45#ibcon#wrote, iclass 11, count 0 2006.229.19:00:29.45#ibcon#about to read 3, iclass 11, count 0 2006.229.19:00:29.47#ibcon#read 3, iclass 11, count 0 2006.229.19:00:29.48#ibcon#about to read 4, iclass 11, count 0 2006.229.19:00:29.48#ibcon#read 4, iclass 11, count 0 2006.229.19:00:29.48#ibcon#about to read 5, iclass 11, count 0 2006.229.19:00:29.48#ibcon#read 5, iclass 11, count 0 2006.229.19:00:29.48#ibcon#about to read 6, iclass 11, count 0 2006.229.19:00:29.48#ibcon#read 6, iclass 11, count 0 2006.229.19:00:29.48#ibcon#end of sib2, iclass 11, count 0 2006.229.19:00:29.48#ibcon#*after write, iclass 11, count 0 2006.229.19:00:29.48#ibcon#*before return 0, iclass 11, count 0 2006.229.19:00:29.48#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:29.48#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:00:29.48#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:00:29.48#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:00:29.48$vck44/vbbw=wide 2006.229.19:00:29.48#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.19:00:29.48#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.19:00:29.48#ibcon#ireg 8 cls_cnt 0 2006.229.19:00:29.48#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:00:29.54#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:00:29.55#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:00:29.55#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:00:29.55#ibcon#first serial, iclass 13, count 0 2006.229.19:00:29.55#ibcon#enter sib2, iclass 13, count 0 2006.229.19:00:29.55#ibcon#flushed, iclass 13, count 0 2006.229.19:00:29.55#ibcon#about to write, iclass 13, count 0 2006.229.19:00:29.55#ibcon#wrote, iclass 13, count 0 2006.229.19:00:29.55#ibcon#about to read 3, iclass 13, count 0 2006.229.19:00:29.56#ibcon#read 3, iclass 13, count 0 2006.229.19:00:29.57#ibcon#about to read 4, iclass 13, count 0 2006.229.19:00:29.57#ibcon#read 4, iclass 13, count 0 2006.229.19:00:29.57#ibcon#about to read 5, iclass 13, count 0 2006.229.19:00:29.57#ibcon#read 5, iclass 13, count 0 2006.229.19:00:29.57#ibcon#about to read 6, iclass 13, count 0 2006.229.19:00:29.57#ibcon#read 6, iclass 13, count 0 2006.229.19:00:29.57#ibcon#end of sib2, iclass 13, count 0 2006.229.19:00:29.57#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:00:29.57#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:00:29.57#ibcon#[27=BW32\r\n] 2006.229.19:00:29.57#ibcon#*before write, iclass 13, count 0 2006.229.19:00:29.57#ibcon#enter sib2, iclass 13, count 0 2006.229.19:00:29.57#ibcon#flushed, iclass 13, count 0 2006.229.19:00:29.57#ibcon#about to write, iclass 13, count 0 2006.229.19:00:29.57#ibcon#wrote, iclass 13, count 0 2006.229.19:00:29.57#ibcon#about to read 3, iclass 13, count 0 2006.229.19:00:29.59#ibcon#read 3, iclass 13, count 0 2006.229.19:00:29.60#ibcon#about to read 4, iclass 13, count 0 2006.229.19:00:29.60#ibcon#read 4, iclass 13, count 0 2006.229.19:00:29.60#ibcon#about to read 5, iclass 13, count 0 2006.229.19:00:29.60#ibcon#read 5, iclass 13, count 0 2006.229.19:00:29.60#ibcon#about to read 6, iclass 13, count 0 2006.229.19:00:29.60#ibcon#read 6, iclass 13, count 0 2006.229.19:00:29.60#ibcon#end of sib2, iclass 13, count 0 2006.229.19:00:29.60#ibcon#*after write, iclass 13, count 0 2006.229.19:00:29.60#ibcon#*before return 0, iclass 13, count 0 2006.229.19:00:29.60#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:00:29.60#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:00:29.60#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:00:29.60#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:00:29.60$setupk4/ifdk4 2006.229.19:00:29.60$ifdk4/lo= 2006.229.19:00:29.60$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:00:29.60$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:00:29.60$ifdk4/patch= 2006.229.19:00:29.60$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:00:29.60$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:00:29.60$setupk4/!*+20s 2006.229.19:00:33.20#abcon#<5=/06 1.8 3.1 26.121001001.3\r\n> 2006.229.19:00:33.22#abcon#{5=INTERFACE CLEAR} 2006.229.19:00:33.28#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:00:43.37#abcon#<5=/06 1.8 3.1 26.121001001.3\r\n> 2006.229.19:00:43.39#abcon#{5=INTERFACE CLEAR} 2006.229.19:00:43.45#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:00:44.12$setupk4/"tpicd 2006.229.19:00:44.13$setupk4/echo=off 2006.229.19:00:44.13$setupk4/xlog=off 2006.229.19:00:44.13:!2006.229.19:02:58 2006.229.19:00:57.14#trakl#Source acquired 2006.229.19:00:58.15#flagr#flagr/antenna,acquired 2006.229.19:02:58.02:preob 2006.229.19:02:59.14/onsource/TRACKING 2006.229.19:02:59.15:!2006.229.19:03:08 2006.229.19:03:08.01:"tape 2006.229.19:03:08.02:"st=record 2006.229.19:03:08.02:data_valid=on 2006.229.19:03:08.02:midob 2006.229.19:03:09.14/onsource/TRACKING 2006.229.19:03:09.15/wx/26.12,1001.3,100 2006.229.19:03:09.33/cable/+6.4184E-03 2006.229.19:03:10.42/va/01,08,usb,yes,29,32 2006.229.19:03:10.42/va/02,07,usb,yes,32,33 2006.229.19:03:10.42/va/03,06,usb,yes,40,42 2006.229.19:03:10.42/va/04,07,usb,yes,33,34 2006.229.19:03:10.42/va/05,04,usb,yes,29,30 2006.229.19:03:10.42/va/06,04,usb,yes,33,33 2006.229.19:03:10.42/va/07,05,usb,yes,29,30 2006.229.19:03:10.42/va/08,06,usb,yes,21,26 2006.229.19:03:10.65/valo/01,524.99,yes,locked 2006.229.19:03:10.65/valo/02,534.99,yes,locked 2006.229.19:03:10.65/valo/03,564.99,yes,locked 2006.229.19:03:10.65/valo/04,624.99,yes,locked 2006.229.19:03:10.65/valo/05,734.99,yes,locked 2006.229.19:03:10.65/valo/06,814.99,yes,locked 2006.229.19:03:10.65/valo/07,864.99,yes,locked 2006.229.19:03:10.65/valo/08,884.99,yes,locked 2006.229.19:03:11.74/vb/01,04,usb,yes,30,28 2006.229.19:03:11.74/vb/02,04,usb,yes,33,33 2006.229.19:03:11.74/vb/03,04,usb,yes,30,33 2006.229.19:03:11.74/vb/04,04,usb,yes,34,33 2006.229.19:03:11.74/vb/05,04,usb,yes,27,29 2006.229.19:03:11.74/vb/06,04,usb,yes,31,27 2006.229.19:03:11.74/vb/07,04,usb,yes,31,31 2006.229.19:03:11.74/vb/08,04,usb,yes,28,32 2006.229.19:03:11.98/vblo/01,629.99,yes,locked 2006.229.19:03:11.98/vblo/02,634.99,yes,locked 2006.229.19:03:11.98/vblo/03,649.99,yes,locked 2006.229.19:03:11.98/vblo/04,679.99,yes,locked 2006.229.19:03:11.98/vblo/05,709.99,yes,locked 2006.229.19:03:11.98/vblo/06,719.99,yes,locked 2006.229.19:03:11.98/vblo/07,734.99,yes,locked 2006.229.19:03:11.98/vblo/08,744.99,yes,locked 2006.229.19:03:12.13/vabw/8 2006.229.19:03:12.28/vbbw/8 2006.229.19:03:12.37/xfe/off,on,12.2 2006.229.19:03:12.74/ifatt/23,28,28,28 2006.229.19:03:13.07/fmout-gps/S +4.44E-07 2006.229.19:03:13.12:!2006.229.19:05:28 2006.229.19:05:28.01:data_valid=off 2006.229.19:05:28.01:"et 2006.229.19:05:28.02:!+3s 2006.229.19:05:31.04:"tape 2006.229.19:05:31.04:postob 2006.229.19:05:31.14/cable/+6.4186E-03 2006.229.19:05:31.14/wx/26.12,1001.4,100 2006.229.19:05:31.20/fmout-gps/S +4.44E-07 2006.229.19:05:31.20:scan_name=229-1908,jd0608,90 2006.229.19:05:31.20:source=2121+053,212344.52,053522.1,2000.0,ccw 2006.229.19:05:33.13#flagr#flagr/antenna,new-source 2006.229.19:05:33.13:checkk5 2006.229.19:05:33.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:05:33.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:05:34.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:05:34.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:05:35.15/chk_obsdata//k5ts1/T2291903??a.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.19:05:35.55/chk_obsdata//k5ts2/T2291903??b.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.19:05:35.97/chk_obsdata//k5ts3/T2291903??c.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.19:05:36.35/chk_obsdata//k5ts4/T2291903??d.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.19:05:37.06/k5log//k5ts1_log_newline 2006.229.19:05:37.76/k5log//k5ts2_log_newline 2006.229.19:05:38.49/k5log//k5ts3_log_newline 2006.229.19:05:39.21/k5log//k5ts4_log_newline 2006.229.19:05:39.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:05:39.23:setupk4=1 2006.229.19:05:39.23$setupk4/echo=on 2006.229.19:05:39.23$setupk4/pcalon 2006.229.19:05:39.23$pcalon/"no phase cal control is implemented here 2006.229.19:05:39.23$setupk4/"tpicd=stop 2006.229.19:05:39.23$setupk4/"rec=synch_on 2006.229.19:05:39.23$setupk4/"rec_mode=128 2006.229.19:05:39.23$setupk4/!* 2006.229.19:05:39.23$setupk4/recpk4 2006.229.19:05:39.23$recpk4/recpatch= 2006.229.19:05:39.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:05:39.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:05:39.23$setupk4/vck44 2006.229.19:05:39.23$vck44/valo=1,524.99 2006.229.19:05:39.24#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.19:05:39.24#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.19:05:39.24#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:39.24#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:39.24#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:39.24#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:39.24#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:05:39.24#ibcon#first serial, iclass 34, count 0 2006.229.19:05:39.24#ibcon#enter sib2, iclass 34, count 0 2006.229.19:05:39.24#ibcon#flushed, iclass 34, count 0 2006.229.19:05:39.24#ibcon#about to write, iclass 34, count 0 2006.229.19:05:39.24#ibcon#wrote, iclass 34, count 0 2006.229.19:05:39.24#ibcon#about to read 3, iclass 34, count 0 2006.229.19:05:39.25#ibcon#read 3, iclass 34, count 0 2006.229.19:05:39.25#ibcon#about to read 4, iclass 34, count 0 2006.229.19:05:39.25#ibcon#read 4, iclass 34, count 0 2006.229.19:05:39.25#ibcon#about to read 5, iclass 34, count 0 2006.229.19:05:39.25#ibcon#read 5, iclass 34, count 0 2006.229.19:05:39.25#ibcon#about to read 6, iclass 34, count 0 2006.229.19:05:39.25#ibcon#read 6, iclass 34, count 0 2006.229.19:05:39.25#ibcon#end of sib2, iclass 34, count 0 2006.229.19:05:39.25#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:05:39.25#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:05:39.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:05:39.25#ibcon#*before write, iclass 34, count 0 2006.229.19:05:39.25#ibcon#enter sib2, iclass 34, count 0 2006.229.19:05:39.25#ibcon#flushed, iclass 34, count 0 2006.229.19:05:39.25#ibcon#about to write, iclass 34, count 0 2006.229.19:05:39.25#ibcon#wrote, iclass 34, count 0 2006.229.19:05:39.25#ibcon#about to read 3, iclass 34, count 0 2006.229.19:05:39.30#ibcon#read 3, iclass 34, count 0 2006.229.19:05:39.30#ibcon#about to read 4, iclass 34, count 0 2006.229.19:05:39.30#ibcon#read 4, iclass 34, count 0 2006.229.19:05:39.30#ibcon#about to read 5, iclass 34, count 0 2006.229.19:05:39.30#ibcon#read 5, iclass 34, count 0 2006.229.19:05:39.30#ibcon#about to read 6, iclass 34, count 0 2006.229.19:05:39.30#ibcon#read 6, iclass 34, count 0 2006.229.19:05:39.30#ibcon#end of sib2, iclass 34, count 0 2006.229.19:05:39.30#ibcon#*after write, iclass 34, count 0 2006.229.19:05:39.30#ibcon#*before return 0, iclass 34, count 0 2006.229.19:05:39.30#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:39.30#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:39.30#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:05:39.30#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:05:39.30$vck44/va=1,8 2006.229.19:05:39.30#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.19:05:39.30#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.19:05:39.30#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:39.30#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:39.30#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:39.30#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:39.30#ibcon#enter wrdev, iclass 36, count 2 2006.229.19:05:39.30#ibcon#first serial, iclass 36, count 2 2006.229.19:05:39.30#ibcon#enter sib2, iclass 36, count 2 2006.229.19:05:39.30#ibcon#flushed, iclass 36, count 2 2006.229.19:05:39.30#ibcon#about to write, iclass 36, count 2 2006.229.19:05:39.30#ibcon#wrote, iclass 36, count 2 2006.229.19:05:39.30#ibcon#about to read 3, iclass 36, count 2 2006.229.19:05:39.32#ibcon#read 3, iclass 36, count 2 2006.229.19:05:39.32#ibcon#about to read 4, iclass 36, count 2 2006.229.19:05:39.32#ibcon#read 4, iclass 36, count 2 2006.229.19:05:39.32#ibcon#about to read 5, iclass 36, count 2 2006.229.19:05:39.32#ibcon#read 5, iclass 36, count 2 2006.229.19:05:39.32#ibcon#about to read 6, iclass 36, count 2 2006.229.19:05:39.32#ibcon#read 6, iclass 36, count 2 2006.229.19:05:39.32#ibcon#end of sib2, iclass 36, count 2 2006.229.19:05:39.32#ibcon#*mode == 0, iclass 36, count 2 2006.229.19:05:39.32#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.19:05:39.32#ibcon#[25=AT01-08\r\n] 2006.229.19:05:39.32#ibcon#*before write, iclass 36, count 2 2006.229.19:05:39.32#ibcon#enter sib2, iclass 36, count 2 2006.229.19:05:39.32#ibcon#flushed, iclass 36, count 2 2006.229.19:05:39.32#ibcon#about to write, iclass 36, count 2 2006.229.19:05:39.32#ibcon#wrote, iclass 36, count 2 2006.229.19:05:39.32#ibcon#about to read 3, iclass 36, count 2 2006.229.19:05:39.35#ibcon#read 3, iclass 36, count 2 2006.229.19:05:39.35#ibcon#about to read 4, iclass 36, count 2 2006.229.19:05:39.35#ibcon#read 4, iclass 36, count 2 2006.229.19:05:39.35#ibcon#about to read 5, iclass 36, count 2 2006.229.19:05:39.35#ibcon#read 5, iclass 36, count 2 2006.229.19:05:39.35#ibcon#about to read 6, iclass 36, count 2 2006.229.19:05:39.35#ibcon#read 6, iclass 36, count 2 2006.229.19:05:39.35#ibcon#end of sib2, iclass 36, count 2 2006.229.19:05:39.35#ibcon#*after write, iclass 36, count 2 2006.229.19:05:39.35#ibcon#*before return 0, iclass 36, count 2 2006.229.19:05:39.35#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:39.35#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:39.35#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.19:05:39.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:39.35#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:39.47#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:39.47#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:39.47#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:05:39.47#ibcon#first serial, iclass 36, count 0 2006.229.19:05:39.47#ibcon#enter sib2, iclass 36, count 0 2006.229.19:05:39.47#ibcon#flushed, iclass 36, count 0 2006.229.19:05:39.47#ibcon#about to write, iclass 36, count 0 2006.229.19:05:39.47#ibcon#wrote, iclass 36, count 0 2006.229.19:05:39.47#ibcon#about to read 3, iclass 36, count 0 2006.229.19:05:39.49#ibcon#read 3, iclass 36, count 0 2006.229.19:05:39.49#ibcon#about to read 4, iclass 36, count 0 2006.229.19:05:39.49#ibcon#read 4, iclass 36, count 0 2006.229.19:05:39.49#ibcon#about to read 5, iclass 36, count 0 2006.229.19:05:39.49#ibcon#read 5, iclass 36, count 0 2006.229.19:05:39.49#ibcon#about to read 6, iclass 36, count 0 2006.229.19:05:39.49#ibcon#read 6, iclass 36, count 0 2006.229.19:05:39.49#ibcon#end of sib2, iclass 36, count 0 2006.229.19:05:39.49#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:05:39.49#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:05:39.49#ibcon#[25=USB\r\n] 2006.229.19:05:39.49#ibcon#*before write, iclass 36, count 0 2006.229.19:05:39.49#ibcon#enter sib2, iclass 36, count 0 2006.229.19:05:39.49#ibcon#flushed, iclass 36, count 0 2006.229.19:05:39.49#ibcon#about to write, iclass 36, count 0 2006.229.19:05:39.49#ibcon#wrote, iclass 36, count 0 2006.229.19:05:39.49#ibcon#about to read 3, iclass 36, count 0 2006.229.19:05:39.52#ibcon#read 3, iclass 36, count 0 2006.229.19:05:39.52#ibcon#about to read 4, iclass 36, count 0 2006.229.19:05:39.52#ibcon#read 4, iclass 36, count 0 2006.229.19:05:39.52#ibcon#about to read 5, iclass 36, count 0 2006.229.19:05:39.52#ibcon#read 5, iclass 36, count 0 2006.229.19:05:39.52#ibcon#about to read 6, iclass 36, count 0 2006.229.19:05:39.52#ibcon#read 6, iclass 36, count 0 2006.229.19:05:39.52#ibcon#end of sib2, iclass 36, count 0 2006.229.19:05:39.52#ibcon#*after write, iclass 36, count 0 2006.229.19:05:39.52#ibcon#*before return 0, iclass 36, count 0 2006.229.19:05:39.52#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:39.52#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:39.52#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:05:39.52#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:05:39.52$vck44/valo=2,534.99 2006.229.19:05:39.52#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:05:39.52#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:05:39.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:39.52#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:39.52#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:39.52#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:39.52#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:05:39.52#ibcon#first serial, iclass 38, count 0 2006.229.19:05:39.52#ibcon#enter sib2, iclass 38, count 0 2006.229.19:05:39.52#ibcon#flushed, iclass 38, count 0 2006.229.19:05:39.52#ibcon#about to write, iclass 38, count 0 2006.229.19:05:39.52#ibcon#wrote, iclass 38, count 0 2006.229.19:05:39.52#ibcon#about to read 3, iclass 38, count 0 2006.229.19:05:39.54#ibcon#read 3, iclass 38, count 0 2006.229.19:05:39.54#ibcon#about to read 4, iclass 38, count 0 2006.229.19:05:39.54#ibcon#read 4, iclass 38, count 0 2006.229.19:05:39.54#ibcon#about to read 5, iclass 38, count 0 2006.229.19:05:39.54#ibcon#read 5, iclass 38, count 0 2006.229.19:05:39.54#ibcon#about to read 6, iclass 38, count 0 2006.229.19:05:39.54#ibcon#read 6, iclass 38, count 0 2006.229.19:05:39.54#ibcon#end of sib2, iclass 38, count 0 2006.229.19:05:39.54#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:05:39.54#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:05:39.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:05:39.54#ibcon#*before write, iclass 38, count 0 2006.229.19:05:39.54#ibcon#enter sib2, iclass 38, count 0 2006.229.19:05:39.54#ibcon#flushed, iclass 38, count 0 2006.229.19:05:39.54#ibcon#about to write, iclass 38, count 0 2006.229.19:05:39.54#ibcon#wrote, iclass 38, count 0 2006.229.19:05:39.54#ibcon#about to read 3, iclass 38, count 0 2006.229.19:05:39.58#ibcon#read 3, iclass 38, count 0 2006.229.19:05:39.58#ibcon#about to read 4, iclass 38, count 0 2006.229.19:05:39.58#ibcon#read 4, iclass 38, count 0 2006.229.19:05:39.58#ibcon#about to read 5, iclass 38, count 0 2006.229.19:05:39.58#ibcon#read 5, iclass 38, count 0 2006.229.19:05:39.58#ibcon#about to read 6, iclass 38, count 0 2006.229.19:05:39.58#ibcon#read 6, iclass 38, count 0 2006.229.19:05:39.58#ibcon#end of sib2, iclass 38, count 0 2006.229.19:05:39.58#ibcon#*after write, iclass 38, count 0 2006.229.19:05:39.58#ibcon#*before return 0, iclass 38, count 0 2006.229.19:05:39.58#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:39.58#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:39.58#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:05:39.58#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:05:39.58$vck44/va=2,7 2006.229.19:05:39.58#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.19:05:39.58#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.19:05:39.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:39.58#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:39.64#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:39.64#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:39.64#ibcon#enter wrdev, iclass 40, count 2 2006.229.19:05:39.64#ibcon#first serial, iclass 40, count 2 2006.229.19:05:39.64#ibcon#enter sib2, iclass 40, count 2 2006.229.19:05:39.64#ibcon#flushed, iclass 40, count 2 2006.229.19:05:39.64#ibcon#about to write, iclass 40, count 2 2006.229.19:05:39.64#ibcon#wrote, iclass 40, count 2 2006.229.19:05:39.64#ibcon#about to read 3, iclass 40, count 2 2006.229.19:05:39.66#ibcon#read 3, iclass 40, count 2 2006.229.19:05:39.66#ibcon#about to read 4, iclass 40, count 2 2006.229.19:05:39.66#ibcon#read 4, iclass 40, count 2 2006.229.19:05:39.66#ibcon#about to read 5, iclass 40, count 2 2006.229.19:05:39.66#ibcon#read 5, iclass 40, count 2 2006.229.19:05:39.66#ibcon#about to read 6, iclass 40, count 2 2006.229.19:05:39.66#ibcon#read 6, iclass 40, count 2 2006.229.19:05:39.66#ibcon#end of sib2, iclass 40, count 2 2006.229.19:05:39.66#ibcon#*mode == 0, iclass 40, count 2 2006.229.19:05:39.66#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.19:05:39.66#ibcon#[25=AT02-07\r\n] 2006.229.19:05:39.66#ibcon#*before write, iclass 40, count 2 2006.229.19:05:39.66#ibcon#enter sib2, iclass 40, count 2 2006.229.19:05:39.66#ibcon#flushed, iclass 40, count 2 2006.229.19:05:39.66#ibcon#about to write, iclass 40, count 2 2006.229.19:05:39.66#ibcon#wrote, iclass 40, count 2 2006.229.19:05:39.66#ibcon#about to read 3, iclass 40, count 2 2006.229.19:05:39.69#ibcon#read 3, iclass 40, count 2 2006.229.19:05:39.69#ibcon#about to read 4, iclass 40, count 2 2006.229.19:05:39.69#ibcon#read 4, iclass 40, count 2 2006.229.19:05:39.69#ibcon#about to read 5, iclass 40, count 2 2006.229.19:05:39.69#ibcon#read 5, iclass 40, count 2 2006.229.19:05:39.69#ibcon#about to read 6, iclass 40, count 2 2006.229.19:05:39.69#ibcon#read 6, iclass 40, count 2 2006.229.19:05:39.69#ibcon#end of sib2, iclass 40, count 2 2006.229.19:05:39.69#ibcon#*after write, iclass 40, count 2 2006.229.19:05:39.69#ibcon#*before return 0, iclass 40, count 2 2006.229.19:05:39.69#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:39.69#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:39.69#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.19:05:39.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:39.69#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:39.81#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:39.81#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:39.81#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:05:39.81#ibcon#first serial, iclass 40, count 0 2006.229.19:05:39.81#ibcon#enter sib2, iclass 40, count 0 2006.229.19:05:39.81#ibcon#flushed, iclass 40, count 0 2006.229.19:05:39.81#ibcon#about to write, iclass 40, count 0 2006.229.19:05:39.81#ibcon#wrote, iclass 40, count 0 2006.229.19:05:39.81#ibcon#about to read 3, iclass 40, count 0 2006.229.19:05:39.83#ibcon#read 3, iclass 40, count 0 2006.229.19:05:39.83#ibcon#about to read 4, iclass 40, count 0 2006.229.19:05:39.83#ibcon#read 4, iclass 40, count 0 2006.229.19:05:39.83#ibcon#about to read 5, iclass 40, count 0 2006.229.19:05:39.83#ibcon#read 5, iclass 40, count 0 2006.229.19:05:39.83#ibcon#about to read 6, iclass 40, count 0 2006.229.19:05:39.83#ibcon#read 6, iclass 40, count 0 2006.229.19:05:39.83#ibcon#end of sib2, iclass 40, count 0 2006.229.19:05:39.83#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:05:39.83#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:05:39.83#ibcon#[25=USB\r\n] 2006.229.19:05:39.83#ibcon#*before write, iclass 40, count 0 2006.229.19:05:39.83#ibcon#enter sib2, iclass 40, count 0 2006.229.19:05:39.83#ibcon#flushed, iclass 40, count 0 2006.229.19:05:39.83#ibcon#about to write, iclass 40, count 0 2006.229.19:05:39.83#ibcon#wrote, iclass 40, count 0 2006.229.19:05:39.83#ibcon#about to read 3, iclass 40, count 0 2006.229.19:05:39.86#ibcon#read 3, iclass 40, count 0 2006.229.19:05:39.86#ibcon#about to read 4, iclass 40, count 0 2006.229.19:05:39.86#ibcon#read 4, iclass 40, count 0 2006.229.19:05:39.86#ibcon#about to read 5, iclass 40, count 0 2006.229.19:05:39.86#ibcon#read 5, iclass 40, count 0 2006.229.19:05:39.86#ibcon#about to read 6, iclass 40, count 0 2006.229.19:05:39.86#ibcon#read 6, iclass 40, count 0 2006.229.19:05:39.86#ibcon#end of sib2, iclass 40, count 0 2006.229.19:05:39.86#ibcon#*after write, iclass 40, count 0 2006.229.19:05:39.86#ibcon#*before return 0, iclass 40, count 0 2006.229.19:05:39.86#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:39.86#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:39.86#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:05:39.86#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:05:39.86$vck44/valo=3,564.99 2006.229.19:05:39.86#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.19:05:39.86#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.19:05:39.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:39.86#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:39.86#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:39.86#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:39.86#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:05:39.86#ibcon#first serial, iclass 4, count 0 2006.229.19:05:39.86#ibcon#enter sib2, iclass 4, count 0 2006.229.19:05:39.86#ibcon#flushed, iclass 4, count 0 2006.229.19:05:39.86#ibcon#about to write, iclass 4, count 0 2006.229.19:05:39.86#ibcon#wrote, iclass 4, count 0 2006.229.19:05:39.86#ibcon#about to read 3, iclass 4, count 0 2006.229.19:05:39.88#ibcon#read 3, iclass 4, count 0 2006.229.19:05:39.88#ibcon#about to read 4, iclass 4, count 0 2006.229.19:05:39.88#ibcon#read 4, iclass 4, count 0 2006.229.19:05:39.88#ibcon#about to read 5, iclass 4, count 0 2006.229.19:05:39.88#ibcon#read 5, iclass 4, count 0 2006.229.19:05:39.88#ibcon#about to read 6, iclass 4, count 0 2006.229.19:05:39.88#ibcon#read 6, iclass 4, count 0 2006.229.19:05:39.88#ibcon#end of sib2, iclass 4, count 0 2006.229.19:05:39.88#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:05:39.88#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:05:39.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:05:39.88#ibcon#*before write, iclass 4, count 0 2006.229.19:05:39.88#ibcon#enter sib2, iclass 4, count 0 2006.229.19:05:39.88#ibcon#flushed, iclass 4, count 0 2006.229.19:05:39.88#ibcon#about to write, iclass 4, count 0 2006.229.19:05:39.88#ibcon#wrote, iclass 4, count 0 2006.229.19:05:39.88#ibcon#about to read 3, iclass 4, count 0 2006.229.19:05:39.92#ibcon#read 3, iclass 4, count 0 2006.229.19:05:39.92#ibcon#about to read 4, iclass 4, count 0 2006.229.19:05:39.92#ibcon#read 4, iclass 4, count 0 2006.229.19:05:39.92#ibcon#about to read 5, iclass 4, count 0 2006.229.19:05:39.92#ibcon#read 5, iclass 4, count 0 2006.229.19:05:39.92#ibcon#about to read 6, iclass 4, count 0 2006.229.19:05:39.92#ibcon#read 6, iclass 4, count 0 2006.229.19:05:39.92#ibcon#end of sib2, iclass 4, count 0 2006.229.19:05:39.92#ibcon#*after write, iclass 4, count 0 2006.229.19:05:39.92#ibcon#*before return 0, iclass 4, count 0 2006.229.19:05:39.92#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:39.92#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:39.92#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:05:39.92#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:05:39.92$vck44/va=3,6 2006.229.19:05:39.92#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.19:05:39.92#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.19:05:39.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:39.92#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:39.98#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:39.98#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:39.98#ibcon#enter wrdev, iclass 6, count 2 2006.229.19:05:39.98#ibcon#first serial, iclass 6, count 2 2006.229.19:05:39.98#ibcon#enter sib2, iclass 6, count 2 2006.229.19:05:39.98#ibcon#flushed, iclass 6, count 2 2006.229.19:05:39.98#ibcon#about to write, iclass 6, count 2 2006.229.19:05:39.98#ibcon#wrote, iclass 6, count 2 2006.229.19:05:39.98#ibcon#about to read 3, iclass 6, count 2 2006.229.19:05:40.00#ibcon#read 3, iclass 6, count 2 2006.229.19:05:40.00#ibcon#about to read 4, iclass 6, count 2 2006.229.19:05:40.00#ibcon#read 4, iclass 6, count 2 2006.229.19:05:40.00#ibcon#about to read 5, iclass 6, count 2 2006.229.19:05:40.00#ibcon#read 5, iclass 6, count 2 2006.229.19:05:40.00#ibcon#about to read 6, iclass 6, count 2 2006.229.19:05:40.00#ibcon#read 6, iclass 6, count 2 2006.229.19:05:40.00#ibcon#end of sib2, iclass 6, count 2 2006.229.19:05:40.00#ibcon#*mode == 0, iclass 6, count 2 2006.229.19:05:40.00#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.19:05:40.00#ibcon#[25=AT03-06\r\n] 2006.229.19:05:40.00#ibcon#*before write, iclass 6, count 2 2006.229.19:05:40.00#ibcon#enter sib2, iclass 6, count 2 2006.229.19:05:40.00#ibcon#flushed, iclass 6, count 2 2006.229.19:05:40.00#ibcon#about to write, iclass 6, count 2 2006.229.19:05:40.00#ibcon#wrote, iclass 6, count 2 2006.229.19:05:40.00#ibcon#about to read 3, iclass 6, count 2 2006.229.19:05:40.03#ibcon#read 3, iclass 6, count 2 2006.229.19:05:40.03#ibcon#about to read 4, iclass 6, count 2 2006.229.19:05:40.03#ibcon#read 4, iclass 6, count 2 2006.229.19:05:40.03#ibcon#about to read 5, iclass 6, count 2 2006.229.19:05:40.03#ibcon#read 5, iclass 6, count 2 2006.229.19:05:40.03#ibcon#about to read 6, iclass 6, count 2 2006.229.19:05:40.03#ibcon#read 6, iclass 6, count 2 2006.229.19:05:40.03#ibcon#end of sib2, iclass 6, count 2 2006.229.19:05:40.03#ibcon#*after write, iclass 6, count 2 2006.229.19:05:40.03#ibcon#*before return 0, iclass 6, count 2 2006.229.19:05:40.03#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:40.03#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:40.03#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.19:05:40.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:40.03#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:40.15#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:40.15#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:40.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:05:40.15#ibcon#first serial, iclass 6, count 0 2006.229.19:05:40.15#ibcon#enter sib2, iclass 6, count 0 2006.229.19:05:40.15#ibcon#flushed, iclass 6, count 0 2006.229.19:05:40.15#ibcon#about to write, iclass 6, count 0 2006.229.19:05:40.15#ibcon#wrote, iclass 6, count 0 2006.229.19:05:40.15#ibcon#about to read 3, iclass 6, count 0 2006.229.19:05:40.17#ibcon#read 3, iclass 6, count 0 2006.229.19:05:40.17#ibcon#about to read 4, iclass 6, count 0 2006.229.19:05:40.17#ibcon#read 4, iclass 6, count 0 2006.229.19:05:40.17#ibcon#about to read 5, iclass 6, count 0 2006.229.19:05:40.17#ibcon#read 5, iclass 6, count 0 2006.229.19:05:40.17#ibcon#about to read 6, iclass 6, count 0 2006.229.19:05:40.17#ibcon#read 6, iclass 6, count 0 2006.229.19:05:40.17#ibcon#end of sib2, iclass 6, count 0 2006.229.19:05:40.17#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:05:40.17#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:05:40.17#ibcon#[25=USB\r\n] 2006.229.19:05:40.17#ibcon#*before write, iclass 6, count 0 2006.229.19:05:40.17#ibcon#enter sib2, iclass 6, count 0 2006.229.19:05:40.17#ibcon#flushed, iclass 6, count 0 2006.229.19:05:40.17#ibcon#about to write, iclass 6, count 0 2006.229.19:05:40.17#ibcon#wrote, iclass 6, count 0 2006.229.19:05:40.17#ibcon#about to read 3, iclass 6, count 0 2006.229.19:05:40.20#ibcon#read 3, iclass 6, count 0 2006.229.19:05:40.20#ibcon#about to read 4, iclass 6, count 0 2006.229.19:05:40.20#ibcon#read 4, iclass 6, count 0 2006.229.19:05:40.20#ibcon#about to read 5, iclass 6, count 0 2006.229.19:05:40.20#ibcon#read 5, iclass 6, count 0 2006.229.19:05:40.20#ibcon#about to read 6, iclass 6, count 0 2006.229.19:05:40.20#ibcon#read 6, iclass 6, count 0 2006.229.19:05:40.20#ibcon#end of sib2, iclass 6, count 0 2006.229.19:05:40.20#ibcon#*after write, iclass 6, count 0 2006.229.19:05:40.20#ibcon#*before return 0, iclass 6, count 0 2006.229.19:05:40.20#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:40.20#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:40.20#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:05:40.20#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:05:40.20$vck44/valo=4,624.99 2006.229.19:05:40.20#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.19:05:40.20#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.19:05:40.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:40.20#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:40.20#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:40.20#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:40.20#ibcon#enter wrdev, iclass 10, count 0 2006.229.19:05:40.20#ibcon#first serial, iclass 10, count 0 2006.229.19:05:40.20#ibcon#enter sib2, iclass 10, count 0 2006.229.19:05:40.20#ibcon#flushed, iclass 10, count 0 2006.229.19:05:40.20#ibcon#about to write, iclass 10, count 0 2006.229.19:05:40.20#ibcon#wrote, iclass 10, count 0 2006.229.19:05:40.20#ibcon#about to read 3, iclass 10, count 0 2006.229.19:05:40.22#ibcon#read 3, iclass 10, count 0 2006.229.19:05:40.22#ibcon#about to read 4, iclass 10, count 0 2006.229.19:05:40.22#ibcon#read 4, iclass 10, count 0 2006.229.19:05:40.22#ibcon#about to read 5, iclass 10, count 0 2006.229.19:05:40.22#ibcon#read 5, iclass 10, count 0 2006.229.19:05:40.22#ibcon#about to read 6, iclass 10, count 0 2006.229.19:05:40.22#ibcon#read 6, iclass 10, count 0 2006.229.19:05:40.22#ibcon#end of sib2, iclass 10, count 0 2006.229.19:05:40.22#ibcon#*mode == 0, iclass 10, count 0 2006.229.19:05:40.22#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.19:05:40.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:05:40.22#ibcon#*before write, iclass 10, count 0 2006.229.19:05:40.22#ibcon#enter sib2, iclass 10, count 0 2006.229.19:05:40.22#ibcon#flushed, iclass 10, count 0 2006.229.19:05:40.22#ibcon#about to write, iclass 10, count 0 2006.229.19:05:40.22#ibcon#wrote, iclass 10, count 0 2006.229.19:05:40.22#ibcon#about to read 3, iclass 10, count 0 2006.229.19:05:40.26#ibcon#read 3, iclass 10, count 0 2006.229.19:05:40.26#ibcon#about to read 4, iclass 10, count 0 2006.229.19:05:40.26#ibcon#read 4, iclass 10, count 0 2006.229.19:05:40.26#ibcon#about to read 5, iclass 10, count 0 2006.229.19:05:40.26#ibcon#read 5, iclass 10, count 0 2006.229.19:05:40.26#ibcon#about to read 6, iclass 10, count 0 2006.229.19:05:40.26#ibcon#read 6, iclass 10, count 0 2006.229.19:05:40.26#ibcon#end of sib2, iclass 10, count 0 2006.229.19:05:40.26#ibcon#*after write, iclass 10, count 0 2006.229.19:05:40.26#ibcon#*before return 0, iclass 10, count 0 2006.229.19:05:40.26#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:40.26#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:40.26#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.19:05:40.26#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.19:05:40.26$vck44/va=4,7 2006.229.19:05:40.26#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.19:05:40.26#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.19:05:40.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:40.26#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:40.32#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:40.32#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:40.32#ibcon#enter wrdev, iclass 12, count 2 2006.229.19:05:40.32#ibcon#first serial, iclass 12, count 2 2006.229.19:05:40.32#ibcon#enter sib2, iclass 12, count 2 2006.229.19:05:40.32#ibcon#flushed, iclass 12, count 2 2006.229.19:05:40.32#ibcon#about to write, iclass 12, count 2 2006.229.19:05:40.32#ibcon#wrote, iclass 12, count 2 2006.229.19:05:40.32#ibcon#about to read 3, iclass 12, count 2 2006.229.19:05:40.34#ibcon#read 3, iclass 12, count 2 2006.229.19:05:40.34#ibcon#about to read 4, iclass 12, count 2 2006.229.19:05:40.34#ibcon#read 4, iclass 12, count 2 2006.229.19:05:40.34#ibcon#about to read 5, iclass 12, count 2 2006.229.19:05:40.34#ibcon#read 5, iclass 12, count 2 2006.229.19:05:40.34#ibcon#about to read 6, iclass 12, count 2 2006.229.19:05:40.34#ibcon#read 6, iclass 12, count 2 2006.229.19:05:40.34#ibcon#end of sib2, iclass 12, count 2 2006.229.19:05:40.34#ibcon#*mode == 0, iclass 12, count 2 2006.229.19:05:40.34#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.19:05:40.34#ibcon#[25=AT04-07\r\n] 2006.229.19:05:40.34#ibcon#*before write, iclass 12, count 2 2006.229.19:05:40.34#ibcon#enter sib2, iclass 12, count 2 2006.229.19:05:40.34#ibcon#flushed, iclass 12, count 2 2006.229.19:05:40.34#ibcon#about to write, iclass 12, count 2 2006.229.19:05:40.34#ibcon#wrote, iclass 12, count 2 2006.229.19:05:40.34#ibcon#about to read 3, iclass 12, count 2 2006.229.19:05:40.37#ibcon#read 3, iclass 12, count 2 2006.229.19:05:40.37#ibcon#about to read 4, iclass 12, count 2 2006.229.19:05:40.37#ibcon#read 4, iclass 12, count 2 2006.229.19:05:40.37#ibcon#about to read 5, iclass 12, count 2 2006.229.19:05:40.37#ibcon#read 5, iclass 12, count 2 2006.229.19:05:40.37#ibcon#about to read 6, iclass 12, count 2 2006.229.19:05:40.37#ibcon#read 6, iclass 12, count 2 2006.229.19:05:40.37#ibcon#end of sib2, iclass 12, count 2 2006.229.19:05:40.37#ibcon#*after write, iclass 12, count 2 2006.229.19:05:40.37#ibcon#*before return 0, iclass 12, count 2 2006.229.19:05:40.37#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:40.37#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:40.37#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.19:05:40.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:40.37#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:40.49#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:40.49#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:40.49#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:05:40.49#ibcon#first serial, iclass 12, count 0 2006.229.19:05:40.49#ibcon#enter sib2, iclass 12, count 0 2006.229.19:05:40.49#ibcon#flushed, iclass 12, count 0 2006.229.19:05:40.49#ibcon#about to write, iclass 12, count 0 2006.229.19:05:40.49#ibcon#wrote, iclass 12, count 0 2006.229.19:05:40.49#ibcon#about to read 3, iclass 12, count 0 2006.229.19:05:40.51#ibcon#read 3, iclass 12, count 0 2006.229.19:05:40.51#ibcon#about to read 4, iclass 12, count 0 2006.229.19:05:40.51#ibcon#read 4, iclass 12, count 0 2006.229.19:05:40.51#ibcon#about to read 5, iclass 12, count 0 2006.229.19:05:40.51#ibcon#read 5, iclass 12, count 0 2006.229.19:05:40.51#ibcon#about to read 6, iclass 12, count 0 2006.229.19:05:40.51#ibcon#read 6, iclass 12, count 0 2006.229.19:05:40.51#ibcon#end of sib2, iclass 12, count 0 2006.229.19:05:40.51#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:05:40.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:05:40.51#ibcon#[25=USB\r\n] 2006.229.19:05:40.51#ibcon#*before write, iclass 12, count 0 2006.229.19:05:40.51#ibcon#enter sib2, iclass 12, count 0 2006.229.19:05:40.51#ibcon#flushed, iclass 12, count 0 2006.229.19:05:40.51#ibcon#about to write, iclass 12, count 0 2006.229.19:05:40.51#ibcon#wrote, iclass 12, count 0 2006.229.19:05:40.51#ibcon#about to read 3, iclass 12, count 0 2006.229.19:05:40.54#ibcon#read 3, iclass 12, count 0 2006.229.19:05:40.54#ibcon#about to read 4, iclass 12, count 0 2006.229.19:05:40.54#ibcon#read 4, iclass 12, count 0 2006.229.19:05:40.54#ibcon#about to read 5, iclass 12, count 0 2006.229.19:05:40.54#ibcon#read 5, iclass 12, count 0 2006.229.19:05:40.54#ibcon#about to read 6, iclass 12, count 0 2006.229.19:05:40.54#ibcon#read 6, iclass 12, count 0 2006.229.19:05:40.54#ibcon#end of sib2, iclass 12, count 0 2006.229.19:05:40.54#ibcon#*after write, iclass 12, count 0 2006.229.19:05:40.54#ibcon#*before return 0, iclass 12, count 0 2006.229.19:05:40.54#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:40.54#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:40.54#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:05:40.54#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:05:40.54$vck44/valo=5,734.99 2006.229.19:05:40.54#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.19:05:40.54#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.19:05:40.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:40.54#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:40.54#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:40.54#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:40.54#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:05:40.54#ibcon#first serial, iclass 14, count 0 2006.229.19:05:40.54#ibcon#enter sib2, iclass 14, count 0 2006.229.19:05:40.54#ibcon#flushed, iclass 14, count 0 2006.229.19:05:40.54#ibcon#about to write, iclass 14, count 0 2006.229.19:05:40.54#ibcon#wrote, iclass 14, count 0 2006.229.19:05:40.54#ibcon#about to read 3, iclass 14, count 0 2006.229.19:05:40.56#ibcon#read 3, iclass 14, count 0 2006.229.19:05:40.56#ibcon#about to read 4, iclass 14, count 0 2006.229.19:05:40.56#ibcon#read 4, iclass 14, count 0 2006.229.19:05:40.56#ibcon#about to read 5, iclass 14, count 0 2006.229.19:05:40.56#ibcon#read 5, iclass 14, count 0 2006.229.19:05:40.56#ibcon#about to read 6, iclass 14, count 0 2006.229.19:05:40.56#ibcon#read 6, iclass 14, count 0 2006.229.19:05:40.56#ibcon#end of sib2, iclass 14, count 0 2006.229.19:05:40.56#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:05:40.56#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:05:40.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:05:40.56#ibcon#*before write, iclass 14, count 0 2006.229.19:05:40.56#ibcon#enter sib2, iclass 14, count 0 2006.229.19:05:40.56#ibcon#flushed, iclass 14, count 0 2006.229.19:05:40.56#ibcon#about to write, iclass 14, count 0 2006.229.19:05:40.56#ibcon#wrote, iclass 14, count 0 2006.229.19:05:40.56#ibcon#about to read 3, iclass 14, count 0 2006.229.19:05:40.60#ibcon#read 3, iclass 14, count 0 2006.229.19:05:40.60#ibcon#about to read 4, iclass 14, count 0 2006.229.19:05:40.60#ibcon#read 4, iclass 14, count 0 2006.229.19:05:40.60#ibcon#about to read 5, iclass 14, count 0 2006.229.19:05:40.60#ibcon#read 5, iclass 14, count 0 2006.229.19:05:40.60#ibcon#about to read 6, iclass 14, count 0 2006.229.19:05:40.60#ibcon#read 6, iclass 14, count 0 2006.229.19:05:40.60#ibcon#end of sib2, iclass 14, count 0 2006.229.19:05:40.60#ibcon#*after write, iclass 14, count 0 2006.229.19:05:40.60#ibcon#*before return 0, iclass 14, count 0 2006.229.19:05:40.60#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:40.60#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:40.60#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:05:40.60#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:05:40.60$vck44/va=5,4 2006.229.19:05:40.60#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.19:05:40.60#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.19:05:40.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:40.60#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:40.66#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:40.66#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:40.66#ibcon#enter wrdev, iclass 16, count 2 2006.229.19:05:40.66#ibcon#first serial, iclass 16, count 2 2006.229.19:05:40.66#ibcon#enter sib2, iclass 16, count 2 2006.229.19:05:40.66#ibcon#flushed, iclass 16, count 2 2006.229.19:05:40.66#ibcon#about to write, iclass 16, count 2 2006.229.19:05:40.66#ibcon#wrote, iclass 16, count 2 2006.229.19:05:40.66#ibcon#about to read 3, iclass 16, count 2 2006.229.19:05:40.68#ibcon#read 3, iclass 16, count 2 2006.229.19:05:40.68#ibcon#about to read 4, iclass 16, count 2 2006.229.19:05:40.68#ibcon#read 4, iclass 16, count 2 2006.229.19:05:40.68#ibcon#about to read 5, iclass 16, count 2 2006.229.19:05:40.68#ibcon#read 5, iclass 16, count 2 2006.229.19:05:40.68#ibcon#about to read 6, iclass 16, count 2 2006.229.19:05:40.68#ibcon#read 6, iclass 16, count 2 2006.229.19:05:40.68#ibcon#end of sib2, iclass 16, count 2 2006.229.19:05:40.68#ibcon#*mode == 0, iclass 16, count 2 2006.229.19:05:40.68#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.19:05:40.68#ibcon#[25=AT05-04\r\n] 2006.229.19:05:40.68#ibcon#*before write, iclass 16, count 2 2006.229.19:05:40.68#ibcon#enter sib2, iclass 16, count 2 2006.229.19:05:40.68#ibcon#flushed, iclass 16, count 2 2006.229.19:05:40.68#ibcon#about to write, iclass 16, count 2 2006.229.19:05:40.68#ibcon#wrote, iclass 16, count 2 2006.229.19:05:40.68#ibcon#about to read 3, iclass 16, count 2 2006.229.19:05:40.71#ibcon#read 3, iclass 16, count 2 2006.229.19:05:40.71#ibcon#about to read 4, iclass 16, count 2 2006.229.19:05:40.71#ibcon#read 4, iclass 16, count 2 2006.229.19:05:40.71#ibcon#about to read 5, iclass 16, count 2 2006.229.19:05:40.71#ibcon#read 5, iclass 16, count 2 2006.229.19:05:40.71#ibcon#about to read 6, iclass 16, count 2 2006.229.19:05:40.71#ibcon#read 6, iclass 16, count 2 2006.229.19:05:40.71#ibcon#end of sib2, iclass 16, count 2 2006.229.19:05:40.71#ibcon#*after write, iclass 16, count 2 2006.229.19:05:40.71#ibcon#*before return 0, iclass 16, count 2 2006.229.19:05:40.71#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:40.71#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:40.71#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.19:05:40.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:40.71#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:40.83#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:40.83#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:40.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:05:40.83#ibcon#first serial, iclass 16, count 0 2006.229.19:05:40.83#ibcon#enter sib2, iclass 16, count 0 2006.229.19:05:40.83#ibcon#flushed, iclass 16, count 0 2006.229.19:05:40.83#ibcon#about to write, iclass 16, count 0 2006.229.19:05:40.83#ibcon#wrote, iclass 16, count 0 2006.229.19:05:40.83#ibcon#about to read 3, iclass 16, count 0 2006.229.19:05:40.85#ibcon#read 3, iclass 16, count 0 2006.229.19:05:40.85#ibcon#about to read 4, iclass 16, count 0 2006.229.19:05:40.85#ibcon#read 4, iclass 16, count 0 2006.229.19:05:40.85#ibcon#about to read 5, iclass 16, count 0 2006.229.19:05:40.85#ibcon#read 5, iclass 16, count 0 2006.229.19:05:40.85#ibcon#about to read 6, iclass 16, count 0 2006.229.19:05:40.85#ibcon#read 6, iclass 16, count 0 2006.229.19:05:40.85#ibcon#end of sib2, iclass 16, count 0 2006.229.19:05:40.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:05:40.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:05:40.85#ibcon#[25=USB\r\n] 2006.229.19:05:40.85#ibcon#*before write, iclass 16, count 0 2006.229.19:05:40.85#ibcon#enter sib2, iclass 16, count 0 2006.229.19:05:40.85#ibcon#flushed, iclass 16, count 0 2006.229.19:05:40.85#ibcon#about to write, iclass 16, count 0 2006.229.19:05:40.85#ibcon#wrote, iclass 16, count 0 2006.229.19:05:40.85#ibcon#about to read 3, iclass 16, count 0 2006.229.19:05:40.88#ibcon#read 3, iclass 16, count 0 2006.229.19:05:40.88#ibcon#about to read 4, iclass 16, count 0 2006.229.19:05:40.88#ibcon#read 4, iclass 16, count 0 2006.229.19:05:40.88#ibcon#about to read 5, iclass 16, count 0 2006.229.19:05:40.88#ibcon#read 5, iclass 16, count 0 2006.229.19:05:40.88#ibcon#about to read 6, iclass 16, count 0 2006.229.19:05:40.88#ibcon#read 6, iclass 16, count 0 2006.229.19:05:40.88#ibcon#end of sib2, iclass 16, count 0 2006.229.19:05:40.88#ibcon#*after write, iclass 16, count 0 2006.229.19:05:40.88#ibcon#*before return 0, iclass 16, count 0 2006.229.19:05:40.88#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:40.88#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:40.88#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:05:40.88#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:05:40.88$vck44/valo=6,814.99 2006.229.19:05:40.88#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.19:05:40.88#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.19:05:40.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:40.88#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:40.88#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:40.88#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:40.88#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:05:40.88#ibcon#first serial, iclass 18, count 0 2006.229.19:05:40.88#ibcon#enter sib2, iclass 18, count 0 2006.229.19:05:40.88#ibcon#flushed, iclass 18, count 0 2006.229.19:05:40.88#ibcon#about to write, iclass 18, count 0 2006.229.19:05:40.88#ibcon#wrote, iclass 18, count 0 2006.229.19:05:40.88#ibcon#about to read 3, iclass 18, count 0 2006.229.19:05:40.90#ibcon#read 3, iclass 18, count 0 2006.229.19:05:40.90#ibcon#about to read 4, iclass 18, count 0 2006.229.19:05:40.90#ibcon#read 4, iclass 18, count 0 2006.229.19:05:40.90#ibcon#about to read 5, iclass 18, count 0 2006.229.19:05:40.90#ibcon#read 5, iclass 18, count 0 2006.229.19:05:40.90#ibcon#about to read 6, iclass 18, count 0 2006.229.19:05:40.90#ibcon#read 6, iclass 18, count 0 2006.229.19:05:40.90#ibcon#end of sib2, iclass 18, count 0 2006.229.19:05:40.90#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:05:40.90#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:05:40.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:05:40.90#ibcon#*before write, iclass 18, count 0 2006.229.19:05:40.90#ibcon#enter sib2, iclass 18, count 0 2006.229.19:05:40.90#ibcon#flushed, iclass 18, count 0 2006.229.19:05:40.90#ibcon#about to write, iclass 18, count 0 2006.229.19:05:40.90#ibcon#wrote, iclass 18, count 0 2006.229.19:05:40.90#ibcon#about to read 3, iclass 18, count 0 2006.229.19:05:40.94#ibcon#read 3, iclass 18, count 0 2006.229.19:05:40.94#ibcon#about to read 4, iclass 18, count 0 2006.229.19:05:40.94#ibcon#read 4, iclass 18, count 0 2006.229.19:05:40.94#ibcon#about to read 5, iclass 18, count 0 2006.229.19:05:40.94#ibcon#read 5, iclass 18, count 0 2006.229.19:05:40.94#ibcon#about to read 6, iclass 18, count 0 2006.229.19:05:40.94#ibcon#read 6, iclass 18, count 0 2006.229.19:05:40.94#ibcon#end of sib2, iclass 18, count 0 2006.229.19:05:40.94#ibcon#*after write, iclass 18, count 0 2006.229.19:05:40.94#ibcon#*before return 0, iclass 18, count 0 2006.229.19:05:40.94#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:40.94#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:40.94#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:05:40.94#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:05:40.94$vck44/va=6,4 2006.229.19:05:40.94#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.19:05:40.94#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.19:05:40.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:40.94#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:41.00#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:41.00#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:41.00#ibcon#enter wrdev, iclass 20, count 2 2006.229.19:05:41.00#ibcon#first serial, iclass 20, count 2 2006.229.19:05:41.00#ibcon#enter sib2, iclass 20, count 2 2006.229.19:05:41.00#ibcon#flushed, iclass 20, count 2 2006.229.19:05:41.00#ibcon#about to write, iclass 20, count 2 2006.229.19:05:41.00#ibcon#wrote, iclass 20, count 2 2006.229.19:05:41.00#ibcon#about to read 3, iclass 20, count 2 2006.229.19:05:41.02#ibcon#read 3, iclass 20, count 2 2006.229.19:05:41.02#ibcon#about to read 4, iclass 20, count 2 2006.229.19:05:41.02#ibcon#read 4, iclass 20, count 2 2006.229.19:05:41.02#ibcon#about to read 5, iclass 20, count 2 2006.229.19:05:41.02#ibcon#read 5, iclass 20, count 2 2006.229.19:05:41.02#ibcon#about to read 6, iclass 20, count 2 2006.229.19:05:41.02#ibcon#read 6, iclass 20, count 2 2006.229.19:05:41.02#ibcon#end of sib2, iclass 20, count 2 2006.229.19:05:41.02#ibcon#*mode == 0, iclass 20, count 2 2006.229.19:05:41.02#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.19:05:41.02#ibcon#[25=AT06-04\r\n] 2006.229.19:05:41.02#ibcon#*before write, iclass 20, count 2 2006.229.19:05:41.02#ibcon#enter sib2, iclass 20, count 2 2006.229.19:05:41.02#ibcon#flushed, iclass 20, count 2 2006.229.19:05:41.02#ibcon#about to write, iclass 20, count 2 2006.229.19:05:41.02#ibcon#wrote, iclass 20, count 2 2006.229.19:05:41.02#ibcon#about to read 3, iclass 20, count 2 2006.229.19:05:41.05#ibcon#read 3, iclass 20, count 2 2006.229.19:05:41.05#ibcon#about to read 4, iclass 20, count 2 2006.229.19:05:41.05#ibcon#read 4, iclass 20, count 2 2006.229.19:05:41.05#ibcon#about to read 5, iclass 20, count 2 2006.229.19:05:41.05#ibcon#read 5, iclass 20, count 2 2006.229.19:05:41.05#ibcon#about to read 6, iclass 20, count 2 2006.229.19:05:41.05#ibcon#read 6, iclass 20, count 2 2006.229.19:05:41.05#ibcon#end of sib2, iclass 20, count 2 2006.229.19:05:41.05#ibcon#*after write, iclass 20, count 2 2006.229.19:05:41.05#ibcon#*before return 0, iclass 20, count 2 2006.229.19:05:41.05#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:41.05#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:41.05#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.19:05:41.05#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:41.05#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:41.17#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:41.17#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:41.17#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:05:41.17#ibcon#first serial, iclass 20, count 0 2006.229.19:05:41.17#ibcon#enter sib2, iclass 20, count 0 2006.229.19:05:41.17#ibcon#flushed, iclass 20, count 0 2006.229.19:05:41.17#ibcon#about to write, iclass 20, count 0 2006.229.19:05:41.17#ibcon#wrote, iclass 20, count 0 2006.229.19:05:41.17#ibcon#about to read 3, iclass 20, count 0 2006.229.19:05:41.19#ibcon#read 3, iclass 20, count 0 2006.229.19:05:41.19#ibcon#about to read 4, iclass 20, count 0 2006.229.19:05:41.19#ibcon#read 4, iclass 20, count 0 2006.229.19:05:41.19#ibcon#about to read 5, iclass 20, count 0 2006.229.19:05:41.19#ibcon#read 5, iclass 20, count 0 2006.229.19:05:41.19#ibcon#about to read 6, iclass 20, count 0 2006.229.19:05:41.19#ibcon#read 6, iclass 20, count 0 2006.229.19:05:41.19#ibcon#end of sib2, iclass 20, count 0 2006.229.19:05:41.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:05:41.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:05:41.19#ibcon#[25=USB\r\n] 2006.229.19:05:41.19#ibcon#*before write, iclass 20, count 0 2006.229.19:05:41.19#ibcon#enter sib2, iclass 20, count 0 2006.229.19:05:41.19#ibcon#flushed, iclass 20, count 0 2006.229.19:05:41.19#ibcon#about to write, iclass 20, count 0 2006.229.19:05:41.19#ibcon#wrote, iclass 20, count 0 2006.229.19:05:41.19#ibcon#about to read 3, iclass 20, count 0 2006.229.19:05:41.22#ibcon#read 3, iclass 20, count 0 2006.229.19:05:41.22#ibcon#about to read 4, iclass 20, count 0 2006.229.19:05:41.22#ibcon#read 4, iclass 20, count 0 2006.229.19:05:41.22#ibcon#about to read 5, iclass 20, count 0 2006.229.19:05:41.22#ibcon#read 5, iclass 20, count 0 2006.229.19:05:41.22#ibcon#about to read 6, iclass 20, count 0 2006.229.19:05:41.22#ibcon#read 6, iclass 20, count 0 2006.229.19:05:41.22#ibcon#end of sib2, iclass 20, count 0 2006.229.19:05:41.22#ibcon#*after write, iclass 20, count 0 2006.229.19:05:41.22#ibcon#*before return 0, iclass 20, count 0 2006.229.19:05:41.22#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:41.22#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:41.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:05:41.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:05:41.22$vck44/valo=7,864.99 2006.229.19:05:41.22#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:05:41.22#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:05:41.22#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:41.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:41.22#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:41.22#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:41.22#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:05:41.22#ibcon#first serial, iclass 22, count 0 2006.229.19:05:41.22#ibcon#enter sib2, iclass 22, count 0 2006.229.19:05:41.22#ibcon#flushed, iclass 22, count 0 2006.229.19:05:41.22#ibcon#about to write, iclass 22, count 0 2006.229.19:05:41.22#ibcon#wrote, iclass 22, count 0 2006.229.19:05:41.22#ibcon#about to read 3, iclass 22, count 0 2006.229.19:05:41.24#ibcon#read 3, iclass 22, count 0 2006.229.19:05:41.24#ibcon#about to read 4, iclass 22, count 0 2006.229.19:05:41.24#ibcon#read 4, iclass 22, count 0 2006.229.19:05:41.24#ibcon#about to read 5, iclass 22, count 0 2006.229.19:05:41.24#ibcon#read 5, iclass 22, count 0 2006.229.19:05:41.24#ibcon#about to read 6, iclass 22, count 0 2006.229.19:05:41.24#ibcon#read 6, iclass 22, count 0 2006.229.19:05:41.24#ibcon#end of sib2, iclass 22, count 0 2006.229.19:05:41.24#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:05:41.24#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:05:41.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:05:41.24#ibcon#*before write, iclass 22, count 0 2006.229.19:05:41.24#ibcon#enter sib2, iclass 22, count 0 2006.229.19:05:41.24#ibcon#flushed, iclass 22, count 0 2006.229.19:05:41.24#ibcon#about to write, iclass 22, count 0 2006.229.19:05:41.24#ibcon#wrote, iclass 22, count 0 2006.229.19:05:41.24#ibcon#about to read 3, iclass 22, count 0 2006.229.19:05:41.28#ibcon#read 3, iclass 22, count 0 2006.229.19:05:41.28#ibcon#about to read 4, iclass 22, count 0 2006.229.19:05:41.28#ibcon#read 4, iclass 22, count 0 2006.229.19:05:41.28#ibcon#about to read 5, iclass 22, count 0 2006.229.19:05:41.28#ibcon#read 5, iclass 22, count 0 2006.229.19:05:41.28#ibcon#about to read 6, iclass 22, count 0 2006.229.19:05:41.28#ibcon#read 6, iclass 22, count 0 2006.229.19:05:41.28#ibcon#end of sib2, iclass 22, count 0 2006.229.19:05:41.28#ibcon#*after write, iclass 22, count 0 2006.229.19:05:41.28#ibcon#*before return 0, iclass 22, count 0 2006.229.19:05:41.28#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:41.28#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:41.28#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:05:41.28#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:05:41.28$vck44/va=7,5 2006.229.19:05:41.28#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.19:05:41.28#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.19:05:41.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:41.28#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:41.34#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:41.34#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:41.34#ibcon#enter wrdev, iclass 24, count 2 2006.229.19:05:41.34#ibcon#first serial, iclass 24, count 2 2006.229.19:05:41.34#ibcon#enter sib2, iclass 24, count 2 2006.229.19:05:41.34#ibcon#flushed, iclass 24, count 2 2006.229.19:05:41.34#ibcon#about to write, iclass 24, count 2 2006.229.19:05:41.34#ibcon#wrote, iclass 24, count 2 2006.229.19:05:41.34#ibcon#about to read 3, iclass 24, count 2 2006.229.19:05:41.36#ibcon#read 3, iclass 24, count 2 2006.229.19:05:41.36#ibcon#about to read 4, iclass 24, count 2 2006.229.19:05:41.36#ibcon#read 4, iclass 24, count 2 2006.229.19:05:41.36#ibcon#about to read 5, iclass 24, count 2 2006.229.19:05:41.36#ibcon#read 5, iclass 24, count 2 2006.229.19:05:41.36#ibcon#about to read 6, iclass 24, count 2 2006.229.19:05:41.36#ibcon#read 6, iclass 24, count 2 2006.229.19:05:41.36#ibcon#end of sib2, iclass 24, count 2 2006.229.19:05:41.36#ibcon#*mode == 0, iclass 24, count 2 2006.229.19:05:41.36#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.19:05:41.36#ibcon#[25=AT07-05\r\n] 2006.229.19:05:41.36#ibcon#*before write, iclass 24, count 2 2006.229.19:05:41.36#ibcon#enter sib2, iclass 24, count 2 2006.229.19:05:41.36#ibcon#flushed, iclass 24, count 2 2006.229.19:05:41.36#ibcon#about to write, iclass 24, count 2 2006.229.19:05:41.36#ibcon#wrote, iclass 24, count 2 2006.229.19:05:41.36#ibcon#about to read 3, iclass 24, count 2 2006.229.19:05:41.39#ibcon#read 3, iclass 24, count 2 2006.229.19:05:41.39#ibcon#about to read 4, iclass 24, count 2 2006.229.19:05:41.39#ibcon#read 4, iclass 24, count 2 2006.229.19:05:41.39#ibcon#about to read 5, iclass 24, count 2 2006.229.19:05:41.39#ibcon#read 5, iclass 24, count 2 2006.229.19:05:41.39#ibcon#about to read 6, iclass 24, count 2 2006.229.19:05:41.39#ibcon#read 6, iclass 24, count 2 2006.229.19:05:41.39#ibcon#end of sib2, iclass 24, count 2 2006.229.19:05:41.39#ibcon#*after write, iclass 24, count 2 2006.229.19:05:41.39#ibcon#*before return 0, iclass 24, count 2 2006.229.19:05:41.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:41.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:41.39#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.19:05:41.39#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:41.39#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:41.51#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:41.51#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:41.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:05:41.51#ibcon#first serial, iclass 24, count 0 2006.229.19:05:41.51#ibcon#enter sib2, iclass 24, count 0 2006.229.19:05:41.51#ibcon#flushed, iclass 24, count 0 2006.229.19:05:41.51#ibcon#about to write, iclass 24, count 0 2006.229.19:05:41.51#ibcon#wrote, iclass 24, count 0 2006.229.19:05:41.51#ibcon#about to read 3, iclass 24, count 0 2006.229.19:05:41.53#ibcon#read 3, iclass 24, count 0 2006.229.19:05:41.53#ibcon#about to read 4, iclass 24, count 0 2006.229.19:05:41.53#ibcon#read 4, iclass 24, count 0 2006.229.19:05:41.53#ibcon#about to read 5, iclass 24, count 0 2006.229.19:05:41.53#ibcon#read 5, iclass 24, count 0 2006.229.19:05:41.53#ibcon#about to read 6, iclass 24, count 0 2006.229.19:05:41.53#ibcon#read 6, iclass 24, count 0 2006.229.19:05:41.53#ibcon#end of sib2, iclass 24, count 0 2006.229.19:05:41.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:05:41.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:05:41.53#ibcon#[25=USB\r\n] 2006.229.19:05:41.53#ibcon#*before write, iclass 24, count 0 2006.229.19:05:41.53#ibcon#enter sib2, iclass 24, count 0 2006.229.19:05:41.53#ibcon#flushed, iclass 24, count 0 2006.229.19:05:41.53#ibcon#about to write, iclass 24, count 0 2006.229.19:05:41.53#ibcon#wrote, iclass 24, count 0 2006.229.19:05:41.53#ibcon#about to read 3, iclass 24, count 0 2006.229.19:05:41.56#ibcon#read 3, iclass 24, count 0 2006.229.19:05:41.56#ibcon#about to read 4, iclass 24, count 0 2006.229.19:05:41.56#ibcon#read 4, iclass 24, count 0 2006.229.19:05:41.56#ibcon#about to read 5, iclass 24, count 0 2006.229.19:05:41.56#ibcon#read 5, iclass 24, count 0 2006.229.19:05:41.56#ibcon#about to read 6, iclass 24, count 0 2006.229.19:05:41.56#ibcon#read 6, iclass 24, count 0 2006.229.19:05:41.56#ibcon#end of sib2, iclass 24, count 0 2006.229.19:05:41.56#ibcon#*after write, iclass 24, count 0 2006.229.19:05:41.56#ibcon#*before return 0, iclass 24, count 0 2006.229.19:05:41.56#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:41.56#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:41.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:05:41.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:05:41.56$vck44/valo=8,884.99 2006.229.19:05:41.56#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.19:05:41.56#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.19:05:41.56#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:41.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:41.56#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:41.56#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:41.56#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:05:41.56#ibcon#first serial, iclass 26, count 0 2006.229.19:05:41.56#ibcon#enter sib2, iclass 26, count 0 2006.229.19:05:41.56#ibcon#flushed, iclass 26, count 0 2006.229.19:05:41.56#ibcon#about to write, iclass 26, count 0 2006.229.19:05:41.56#ibcon#wrote, iclass 26, count 0 2006.229.19:05:41.56#ibcon#about to read 3, iclass 26, count 0 2006.229.19:05:41.58#ibcon#read 3, iclass 26, count 0 2006.229.19:05:41.58#ibcon#about to read 4, iclass 26, count 0 2006.229.19:05:41.58#ibcon#read 4, iclass 26, count 0 2006.229.19:05:41.58#ibcon#about to read 5, iclass 26, count 0 2006.229.19:05:41.58#ibcon#read 5, iclass 26, count 0 2006.229.19:05:41.58#ibcon#about to read 6, iclass 26, count 0 2006.229.19:05:41.58#ibcon#read 6, iclass 26, count 0 2006.229.19:05:41.58#ibcon#end of sib2, iclass 26, count 0 2006.229.19:05:41.58#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:05:41.58#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:05:41.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:05:41.58#ibcon#*before write, iclass 26, count 0 2006.229.19:05:41.58#ibcon#enter sib2, iclass 26, count 0 2006.229.19:05:41.58#ibcon#flushed, iclass 26, count 0 2006.229.19:05:41.58#ibcon#about to write, iclass 26, count 0 2006.229.19:05:41.58#ibcon#wrote, iclass 26, count 0 2006.229.19:05:41.58#ibcon#about to read 3, iclass 26, count 0 2006.229.19:05:41.62#ibcon#read 3, iclass 26, count 0 2006.229.19:05:41.62#ibcon#about to read 4, iclass 26, count 0 2006.229.19:05:41.62#ibcon#read 4, iclass 26, count 0 2006.229.19:05:41.62#ibcon#about to read 5, iclass 26, count 0 2006.229.19:05:41.62#ibcon#read 5, iclass 26, count 0 2006.229.19:05:41.62#ibcon#about to read 6, iclass 26, count 0 2006.229.19:05:41.62#ibcon#read 6, iclass 26, count 0 2006.229.19:05:41.62#ibcon#end of sib2, iclass 26, count 0 2006.229.19:05:41.62#ibcon#*after write, iclass 26, count 0 2006.229.19:05:41.62#ibcon#*before return 0, iclass 26, count 0 2006.229.19:05:41.62#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:41.62#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:41.62#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:05:41.62#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:05:41.62$vck44/va=8,6 2006.229.19:05:41.62#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.19:05:41.62#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.19:05:41.62#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:41.62#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:05:41.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:05:41.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:05:41.68#ibcon#enter wrdev, iclass 28, count 2 2006.229.19:05:41.68#ibcon#first serial, iclass 28, count 2 2006.229.19:05:41.68#ibcon#enter sib2, iclass 28, count 2 2006.229.19:05:41.68#ibcon#flushed, iclass 28, count 2 2006.229.19:05:41.68#ibcon#about to write, iclass 28, count 2 2006.229.19:05:41.68#ibcon#wrote, iclass 28, count 2 2006.229.19:05:41.68#ibcon#about to read 3, iclass 28, count 2 2006.229.19:05:41.70#ibcon#read 3, iclass 28, count 2 2006.229.19:05:41.70#ibcon#about to read 4, iclass 28, count 2 2006.229.19:05:41.70#ibcon#read 4, iclass 28, count 2 2006.229.19:05:41.70#ibcon#about to read 5, iclass 28, count 2 2006.229.19:05:41.70#ibcon#read 5, iclass 28, count 2 2006.229.19:05:41.70#ibcon#about to read 6, iclass 28, count 2 2006.229.19:05:41.70#ibcon#read 6, iclass 28, count 2 2006.229.19:05:41.70#ibcon#end of sib2, iclass 28, count 2 2006.229.19:05:41.70#ibcon#*mode == 0, iclass 28, count 2 2006.229.19:05:41.70#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.19:05:41.70#ibcon#[25=AT08-06\r\n] 2006.229.19:05:41.70#ibcon#*before write, iclass 28, count 2 2006.229.19:05:41.70#ibcon#enter sib2, iclass 28, count 2 2006.229.19:05:41.70#ibcon#flushed, iclass 28, count 2 2006.229.19:05:41.70#ibcon#about to write, iclass 28, count 2 2006.229.19:05:41.70#ibcon#wrote, iclass 28, count 2 2006.229.19:05:41.70#ibcon#about to read 3, iclass 28, count 2 2006.229.19:05:41.73#ibcon#read 3, iclass 28, count 2 2006.229.19:05:41.73#ibcon#about to read 4, iclass 28, count 2 2006.229.19:05:41.73#ibcon#read 4, iclass 28, count 2 2006.229.19:05:41.73#ibcon#about to read 5, iclass 28, count 2 2006.229.19:05:41.73#ibcon#read 5, iclass 28, count 2 2006.229.19:05:41.73#ibcon#about to read 6, iclass 28, count 2 2006.229.19:05:41.73#ibcon#read 6, iclass 28, count 2 2006.229.19:05:41.73#ibcon#end of sib2, iclass 28, count 2 2006.229.19:05:41.73#ibcon#*after write, iclass 28, count 2 2006.229.19:05:41.73#ibcon#*before return 0, iclass 28, count 2 2006.229.19:05:41.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:05:41.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:05:41.73#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.19:05:41.73#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:41.73#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:05:41.85#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:05:41.85#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:05:41.85#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:05:41.85#ibcon#first serial, iclass 28, count 0 2006.229.19:05:41.85#ibcon#enter sib2, iclass 28, count 0 2006.229.19:05:41.85#ibcon#flushed, iclass 28, count 0 2006.229.19:05:41.85#ibcon#about to write, iclass 28, count 0 2006.229.19:05:41.85#ibcon#wrote, iclass 28, count 0 2006.229.19:05:41.85#ibcon#about to read 3, iclass 28, count 0 2006.229.19:05:41.87#ibcon#read 3, iclass 28, count 0 2006.229.19:05:41.87#ibcon#about to read 4, iclass 28, count 0 2006.229.19:05:41.87#ibcon#read 4, iclass 28, count 0 2006.229.19:05:41.87#ibcon#about to read 5, iclass 28, count 0 2006.229.19:05:41.87#ibcon#read 5, iclass 28, count 0 2006.229.19:05:41.87#ibcon#about to read 6, iclass 28, count 0 2006.229.19:05:41.87#ibcon#read 6, iclass 28, count 0 2006.229.19:05:41.87#ibcon#end of sib2, iclass 28, count 0 2006.229.19:05:41.87#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:05:41.87#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:05:41.87#ibcon#[25=USB\r\n] 2006.229.19:05:41.87#ibcon#*before write, iclass 28, count 0 2006.229.19:05:41.87#ibcon#enter sib2, iclass 28, count 0 2006.229.19:05:41.87#ibcon#flushed, iclass 28, count 0 2006.229.19:05:41.87#ibcon#about to write, iclass 28, count 0 2006.229.19:05:41.87#ibcon#wrote, iclass 28, count 0 2006.229.19:05:41.87#ibcon#about to read 3, iclass 28, count 0 2006.229.19:05:41.90#ibcon#read 3, iclass 28, count 0 2006.229.19:05:41.90#ibcon#about to read 4, iclass 28, count 0 2006.229.19:05:41.90#ibcon#read 4, iclass 28, count 0 2006.229.19:05:41.90#ibcon#about to read 5, iclass 28, count 0 2006.229.19:05:41.90#ibcon#read 5, iclass 28, count 0 2006.229.19:05:41.90#ibcon#about to read 6, iclass 28, count 0 2006.229.19:05:41.90#ibcon#read 6, iclass 28, count 0 2006.229.19:05:41.90#ibcon#end of sib2, iclass 28, count 0 2006.229.19:05:41.90#ibcon#*after write, iclass 28, count 0 2006.229.19:05:41.90#ibcon#*before return 0, iclass 28, count 0 2006.229.19:05:41.90#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:05:41.90#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:05:41.90#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:05:41.90#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:05:41.90$vck44/vblo=1,629.99 2006.229.19:05:41.90#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.19:05:41.90#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.19:05:41.90#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:41.90#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:05:41.90#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:05:41.90#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:05:41.90#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:05:41.90#ibcon#first serial, iclass 30, count 0 2006.229.19:05:41.90#ibcon#enter sib2, iclass 30, count 0 2006.229.19:05:41.90#ibcon#flushed, iclass 30, count 0 2006.229.19:05:41.90#ibcon#about to write, iclass 30, count 0 2006.229.19:05:41.90#ibcon#wrote, iclass 30, count 0 2006.229.19:05:41.90#ibcon#about to read 3, iclass 30, count 0 2006.229.19:05:41.92#ibcon#read 3, iclass 30, count 0 2006.229.19:05:41.92#ibcon#about to read 4, iclass 30, count 0 2006.229.19:05:41.92#ibcon#read 4, iclass 30, count 0 2006.229.19:05:41.92#ibcon#about to read 5, iclass 30, count 0 2006.229.19:05:41.92#ibcon#read 5, iclass 30, count 0 2006.229.19:05:41.92#ibcon#about to read 6, iclass 30, count 0 2006.229.19:05:41.92#ibcon#read 6, iclass 30, count 0 2006.229.19:05:41.92#ibcon#end of sib2, iclass 30, count 0 2006.229.19:05:41.92#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:05:41.92#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:05:41.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:05:41.92#ibcon#*before write, iclass 30, count 0 2006.229.19:05:41.92#ibcon#enter sib2, iclass 30, count 0 2006.229.19:05:41.92#ibcon#flushed, iclass 30, count 0 2006.229.19:05:41.92#ibcon#about to write, iclass 30, count 0 2006.229.19:05:41.92#ibcon#wrote, iclass 30, count 0 2006.229.19:05:41.92#ibcon#about to read 3, iclass 30, count 0 2006.229.19:05:41.96#ibcon#read 3, iclass 30, count 0 2006.229.19:05:41.96#ibcon#about to read 4, iclass 30, count 0 2006.229.19:05:41.96#ibcon#read 4, iclass 30, count 0 2006.229.19:05:41.96#ibcon#about to read 5, iclass 30, count 0 2006.229.19:05:41.96#ibcon#read 5, iclass 30, count 0 2006.229.19:05:41.96#ibcon#about to read 6, iclass 30, count 0 2006.229.19:05:41.96#ibcon#read 6, iclass 30, count 0 2006.229.19:05:41.96#ibcon#end of sib2, iclass 30, count 0 2006.229.19:05:41.96#ibcon#*after write, iclass 30, count 0 2006.229.19:05:41.96#ibcon#*before return 0, iclass 30, count 0 2006.229.19:05:41.96#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:05:41.96#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:05:41.96#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:05:41.96#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:05:41.96$vck44/vb=1,4 2006.229.19:05:41.96#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.19:05:41.96#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.19:05:41.96#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:41.96#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:05:41.96#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:05:41.96#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:05:41.96#ibcon#enter wrdev, iclass 32, count 2 2006.229.19:05:41.96#ibcon#first serial, iclass 32, count 2 2006.229.19:05:41.96#ibcon#enter sib2, iclass 32, count 2 2006.229.19:05:41.96#ibcon#flushed, iclass 32, count 2 2006.229.19:05:41.96#ibcon#about to write, iclass 32, count 2 2006.229.19:05:41.96#ibcon#wrote, iclass 32, count 2 2006.229.19:05:41.96#ibcon#about to read 3, iclass 32, count 2 2006.229.19:05:41.98#ibcon#read 3, iclass 32, count 2 2006.229.19:05:41.98#ibcon#about to read 4, iclass 32, count 2 2006.229.19:05:41.98#ibcon#read 4, iclass 32, count 2 2006.229.19:05:41.98#ibcon#about to read 5, iclass 32, count 2 2006.229.19:05:41.98#ibcon#read 5, iclass 32, count 2 2006.229.19:05:41.98#ibcon#about to read 6, iclass 32, count 2 2006.229.19:05:41.98#ibcon#read 6, iclass 32, count 2 2006.229.19:05:41.98#ibcon#end of sib2, iclass 32, count 2 2006.229.19:05:41.98#ibcon#*mode == 0, iclass 32, count 2 2006.229.19:05:41.98#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.19:05:41.98#ibcon#[27=AT01-04\r\n] 2006.229.19:05:41.98#ibcon#*before write, iclass 32, count 2 2006.229.19:05:41.98#ibcon#enter sib2, iclass 32, count 2 2006.229.19:05:41.98#ibcon#flushed, iclass 32, count 2 2006.229.19:05:41.98#ibcon#about to write, iclass 32, count 2 2006.229.19:05:41.98#ibcon#wrote, iclass 32, count 2 2006.229.19:05:41.98#ibcon#about to read 3, iclass 32, count 2 2006.229.19:05:42.01#ibcon#read 3, iclass 32, count 2 2006.229.19:05:42.01#ibcon#about to read 4, iclass 32, count 2 2006.229.19:05:42.01#ibcon#read 4, iclass 32, count 2 2006.229.19:05:42.01#ibcon#about to read 5, iclass 32, count 2 2006.229.19:05:42.01#ibcon#read 5, iclass 32, count 2 2006.229.19:05:42.01#ibcon#about to read 6, iclass 32, count 2 2006.229.19:05:42.01#ibcon#read 6, iclass 32, count 2 2006.229.19:05:42.01#ibcon#end of sib2, iclass 32, count 2 2006.229.19:05:42.01#ibcon#*after write, iclass 32, count 2 2006.229.19:05:42.01#ibcon#*before return 0, iclass 32, count 2 2006.229.19:05:42.01#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:05:42.01#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:05:42.01#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.19:05:42.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:42.01#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:05:42.13#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:05:42.13#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:05:42.13#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:05:42.13#ibcon#first serial, iclass 32, count 0 2006.229.19:05:42.13#ibcon#enter sib2, iclass 32, count 0 2006.229.19:05:42.13#ibcon#flushed, iclass 32, count 0 2006.229.19:05:42.13#ibcon#about to write, iclass 32, count 0 2006.229.19:05:42.13#ibcon#wrote, iclass 32, count 0 2006.229.19:05:42.13#ibcon#about to read 3, iclass 32, count 0 2006.229.19:05:42.15#ibcon#read 3, iclass 32, count 0 2006.229.19:05:42.15#ibcon#about to read 4, iclass 32, count 0 2006.229.19:05:42.15#ibcon#read 4, iclass 32, count 0 2006.229.19:05:42.15#ibcon#about to read 5, iclass 32, count 0 2006.229.19:05:42.15#ibcon#read 5, iclass 32, count 0 2006.229.19:05:42.15#ibcon#about to read 6, iclass 32, count 0 2006.229.19:05:42.15#ibcon#read 6, iclass 32, count 0 2006.229.19:05:42.15#ibcon#end of sib2, iclass 32, count 0 2006.229.19:05:42.15#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:05:42.15#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:05:42.15#ibcon#[27=USB\r\n] 2006.229.19:05:42.15#ibcon#*before write, iclass 32, count 0 2006.229.19:05:42.15#ibcon#enter sib2, iclass 32, count 0 2006.229.19:05:42.15#ibcon#flushed, iclass 32, count 0 2006.229.19:05:42.15#ibcon#about to write, iclass 32, count 0 2006.229.19:05:42.15#ibcon#wrote, iclass 32, count 0 2006.229.19:05:42.15#ibcon#about to read 3, iclass 32, count 0 2006.229.19:05:42.18#ibcon#read 3, iclass 32, count 0 2006.229.19:05:42.18#ibcon#about to read 4, iclass 32, count 0 2006.229.19:05:42.18#ibcon#read 4, iclass 32, count 0 2006.229.19:05:42.18#ibcon#about to read 5, iclass 32, count 0 2006.229.19:05:42.18#ibcon#read 5, iclass 32, count 0 2006.229.19:05:42.18#ibcon#about to read 6, iclass 32, count 0 2006.229.19:05:42.18#ibcon#read 6, iclass 32, count 0 2006.229.19:05:42.18#ibcon#end of sib2, iclass 32, count 0 2006.229.19:05:42.18#ibcon#*after write, iclass 32, count 0 2006.229.19:05:42.18#ibcon#*before return 0, iclass 32, count 0 2006.229.19:05:42.18#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:05:42.18#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:05:42.18#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:05:42.18#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:05:42.18$vck44/vblo=2,634.99 2006.229.19:05:42.18#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.19:05:42.18#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.19:05:42.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:42.18#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:42.18#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:42.18#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:42.18#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:05:42.18#ibcon#first serial, iclass 34, count 0 2006.229.19:05:42.18#ibcon#enter sib2, iclass 34, count 0 2006.229.19:05:42.18#ibcon#flushed, iclass 34, count 0 2006.229.19:05:42.18#ibcon#about to write, iclass 34, count 0 2006.229.19:05:42.18#ibcon#wrote, iclass 34, count 0 2006.229.19:05:42.18#ibcon#about to read 3, iclass 34, count 0 2006.229.19:05:42.20#ibcon#read 3, iclass 34, count 0 2006.229.19:05:42.20#ibcon#about to read 4, iclass 34, count 0 2006.229.19:05:42.20#ibcon#read 4, iclass 34, count 0 2006.229.19:05:42.20#ibcon#about to read 5, iclass 34, count 0 2006.229.19:05:42.20#ibcon#read 5, iclass 34, count 0 2006.229.19:05:42.20#ibcon#about to read 6, iclass 34, count 0 2006.229.19:05:42.20#ibcon#read 6, iclass 34, count 0 2006.229.19:05:42.20#ibcon#end of sib2, iclass 34, count 0 2006.229.19:05:42.20#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:05:42.20#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:05:42.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:05:42.20#ibcon#*before write, iclass 34, count 0 2006.229.19:05:42.20#ibcon#enter sib2, iclass 34, count 0 2006.229.19:05:42.20#ibcon#flushed, iclass 34, count 0 2006.229.19:05:42.20#ibcon#about to write, iclass 34, count 0 2006.229.19:05:42.20#ibcon#wrote, iclass 34, count 0 2006.229.19:05:42.20#ibcon#about to read 3, iclass 34, count 0 2006.229.19:05:42.24#ibcon#read 3, iclass 34, count 0 2006.229.19:05:42.24#ibcon#about to read 4, iclass 34, count 0 2006.229.19:05:42.24#ibcon#read 4, iclass 34, count 0 2006.229.19:05:42.24#ibcon#about to read 5, iclass 34, count 0 2006.229.19:05:42.24#ibcon#read 5, iclass 34, count 0 2006.229.19:05:42.24#ibcon#about to read 6, iclass 34, count 0 2006.229.19:05:42.24#ibcon#read 6, iclass 34, count 0 2006.229.19:05:42.24#ibcon#end of sib2, iclass 34, count 0 2006.229.19:05:42.24#ibcon#*after write, iclass 34, count 0 2006.229.19:05:42.24#ibcon#*before return 0, iclass 34, count 0 2006.229.19:05:42.24#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:42.24#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:05:42.24#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:05:42.24#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:05:42.24$vck44/vb=2,4 2006.229.19:05:42.24#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.19:05:42.24#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.19:05:42.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:42.24#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:42.30#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:42.30#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:42.30#ibcon#enter wrdev, iclass 36, count 2 2006.229.19:05:42.30#ibcon#first serial, iclass 36, count 2 2006.229.19:05:42.30#ibcon#enter sib2, iclass 36, count 2 2006.229.19:05:42.30#ibcon#flushed, iclass 36, count 2 2006.229.19:05:42.30#ibcon#about to write, iclass 36, count 2 2006.229.19:05:42.30#ibcon#wrote, iclass 36, count 2 2006.229.19:05:42.30#ibcon#about to read 3, iclass 36, count 2 2006.229.19:05:42.32#ibcon#read 3, iclass 36, count 2 2006.229.19:05:42.32#ibcon#about to read 4, iclass 36, count 2 2006.229.19:05:42.32#ibcon#read 4, iclass 36, count 2 2006.229.19:05:42.32#ibcon#about to read 5, iclass 36, count 2 2006.229.19:05:42.32#ibcon#read 5, iclass 36, count 2 2006.229.19:05:42.32#ibcon#about to read 6, iclass 36, count 2 2006.229.19:05:42.32#ibcon#read 6, iclass 36, count 2 2006.229.19:05:42.32#ibcon#end of sib2, iclass 36, count 2 2006.229.19:05:42.32#ibcon#*mode == 0, iclass 36, count 2 2006.229.19:05:42.32#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.19:05:42.32#ibcon#[27=AT02-04\r\n] 2006.229.19:05:42.32#ibcon#*before write, iclass 36, count 2 2006.229.19:05:42.32#ibcon#enter sib2, iclass 36, count 2 2006.229.19:05:42.32#ibcon#flushed, iclass 36, count 2 2006.229.19:05:42.32#ibcon#about to write, iclass 36, count 2 2006.229.19:05:42.32#ibcon#wrote, iclass 36, count 2 2006.229.19:05:42.32#ibcon#about to read 3, iclass 36, count 2 2006.229.19:05:42.35#ibcon#read 3, iclass 36, count 2 2006.229.19:05:42.35#ibcon#about to read 4, iclass 36, count 2 2006.229.19:05:42.35#ibcon#read 4, iclass 36, count 2 2006.229.19:05:42.35#ibcon#about to read 5, iclass 36, count 2 2006.229.19:05:42.35#ibcon#read 5, iclass 36, count 2 2006.229.19:05:42.35#ibcon#about to read 6, iclass 36, count 2 2006.229.19:05:42.35#ibcon#read 6, iclass 36, count 2 2006.229.19:05:42.35#ibcon#end of sib2, iclass 36, count 2 2006.229.19:05:42.35#ibcon#*after write, iclass 36, count 2 2006.229.19:05:42.35#ibcon#*before return 0, iclass 36, count 2 2006.229.19:05:42.35#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:42.35#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:05:42.35#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.19:05:42.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:42.35#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:42.47#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:42.47#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:42.47#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:05:42.47#ibcon#first serial, iclass 36, count 0 2006.229.19:05:42.47#ibcon#enter sib2, iclass 36, count 0 2006.229.19:05:42.47#ibcon#flushed, iclass 36, count 0 2006.229.19:05:42.47#ibcon#about to write, iclass 36, count 0 2006.229.19:05:42.47#ibcon#wrote, iclass 36, count 0 2006.229.19:05:42.47#ibcon#about to read 3, iclass 36, count 0 2006.229.19:05:42.49#ibcon#read 3, iclass 36, count 0 2006.229.19:05:42.49#ibcon#about to read 4, iclass 36, count 0 2006.229.19:05:42.49#ibcon#read 4, iclass 36, count 0 2006.229.19:05:42.49#ibcon#about to read 5, iclass 36, count 0 2006.229.19:05:42.49#ibcon#read 5, iclass 36, count 0 2006.229.19:05:42.49#ibcon#about to read 6, iclass 36, count 0 2006.229.19:05:42.49#ibcon#read 6, iclass 36, count 0 2006.229.19:05:42.49#ibcon#end of sib2, iclass 36, count 0 2006.229.19:05:42.49#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:05:42.49#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:05:42.49#ibcon#[27=USB\r\n] 2006.229.19:05:42.49#ibcon#*before write, iclass 36, count 0 2006.229.19:05:42.49#ibcon#enter sib2, iclass 36, count 0 2006.229.19:05:42.49#ibcon#flushed, iclass 36, count 0 2006.229.19:05:42.49#ibcon#about to write, iclass 36, count 0 2006.229.19:05:42.49#ibcon#wrote, iclass 36, count 0 2006.229.19:05:42.49#ibcon#about to read 3, iclass 36, count 0 2006.229.19:05:42.52#ibcon#read 3, iclass 36, count 0 2006.229.19:05:42.52#ibcon#about to read 4, iclass 36, count 0 2006.229.19:05:42.52#ibcon#read 4, iclass 36, count 0 2006.229.19:05:42.52#ibcon#about to read 5, iclass 36, count 0 2006.229.19:05:42.52#ibcon#read 5, iclass 36, count 0 2006.229.19:05:42.52#ibcon#about to read 6, iclass 36, count 0 2006.229.19:05:42.52#ibcon#read 6, iclass 36, count 0 2006.229.19:05:42.52#ibcon#end of sib2, iclass 36, count 0 2006.229.19:05:42.52#ibcon#*after write, iclass 36, count 0 2006.229.19:05:42.52#ibcon#*before return 0, iclass 36, count 0 2006.229.19:05:42.52#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:42.52#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:05:42.52#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:05:42.52#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:05:42.52$vck44/vblo=3,649.99 2006.229.19:05:42.52#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:05:42.52#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:05:42.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:42.52#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:42.52#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:42.52#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:42.52#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:05:42.52#ibcon#first serial, iclass 38, count 0 2006.229.19:05:42.52#ibcon#enter sib2, iclass 38, count 0 2006.229.19:05:42.52#ibcon#flushed, iclass 38, count 0 2006.229.19:05:42.52#ibcon#about to write, iclass 38, count 0 2006.229.19:05:42.52#ibcon#wrote, iclass 38, count 0 2006.229.19:05:42.52#ibcon#about to read 3, iclass 38, count 0 2006.229.19:05:42.54#ibcon#read 3, iclass 38, count 0 2006.229.19:05:42.54#ibcon#about to read 4, iclass 38, count 0 2006.229.19:05:42.54#ibcon#read 4, iclass 38, count 0 2006.229.19:05:42.54#ibcon#about to read 5, iclass 38, count 0 2006.229.19:05:42.54#ibcon#read 5, iclass 38, count 0 2006.229.19:05:42.54#ibcon#about to read 6, iclass 38, count 0 2006.229.19:05:42.54#ibcon#read 6, iclass 38, count 0 2006.229.19:05:42.54#ibcon#end of sib2, iclass 38, count 0 2006.229.19:05:42.54#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:05:42.54#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:05:42.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:05:42.54#ibcon#*before write, iclass 38, count 0 2006.229.19:05:42.54#ibcon#enter sib2, iclass 38, count 0 2006.229.19:05:42.54#ibcon#flushed, iclass 38, count 0 2006.229.19:05:42.54#ibcon#about to write, iclass 38, count 0 2006.229.19:05:42.54#ibcon#wrote, iclass 38, count 0 2006.229.19:05:42.54#ibcon#about to read 3, iclass 38, count 0 2006.229.19:05:42.58#ibcon#read 3, iclass 38, count 0 2006.229.19:05:42.58#ibcon#about to read 4, iclass 38, count 0 2006.229.19:05:42.58#ibcon#read 4, iclass 38, count 0 2006.229.19:05:42.58#ibcon#about to read 5, iclass 38, count 0 2006.229.19:05:42.58#ibcon#read 5, iclass 38, count 0 2006.229.19:05:42.58#ibcon#about to read 6, iclass 38, count 0 2006.229.19:05:42.58#ibcon#read 6, iclass 38, count 0 2006.229.19:05:42.58#ibcon#end of sib2, iclass 38, count 0 2006.229.19:05:42.58#ibcon#*after write, iclass 38, count 0 2006.229.19:05:42.58#ibcon#*before return 0, iclass 38, count 0 2006.229.19:05:42.58#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:42.58#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:05:42.58#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:05:42.58#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:05:42.58$vck44/vb=3,4 2006.229.19:05:42.58#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.19:05:42.58#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.19:05:42.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:42.58#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:42.64#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:42.64#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:42.64#ibcon#enter wrdev, iclass 40, count 2 2006.229.19:05:42.64#ibcon#first serial, iclass 40, count 2 2006.229.19:05:42.64#ibcon#enter sib2, iclass 40, count 2 2006.229.19:05:42.64#ibcon#flushed, iclass 40, count 2 2006.229.19:05:42.64#ibcon#about to write, iclass 40, count 2 2006.229.19:05:42.64#ibcon#wrote, iclass 40, count 2 2006.229.19:05:42.64#ibcon#about to read 3, iclass 40, count 2 2006.229.19:05:42.66#ibcon#read 3, iclass 40, count 2 2006.229.19:05:42.66#ibcon#about to read 4, iclass 40, count 2 2006.229.19:05:42.66#ibcon#read 4, iclass 40, count 2 2006.229.19:05:42.66#ibcon#about to read 5, iclass 40, count 2 2006.229.19:05:42.66#ibcon#read 5, iclass 40, count 2 2006.229.19:05:42.66#ibcon#about to read 6, iclass 40, count 2 2006.229.19:05:42.66#ibcon#read 6, iclass 40, count 2 2006.229.19:05:42.66#ibcon#end of sib2, iclass 40, count 2 2006.229.19:05:42.66#ibcon#*mode == 0, iclass 40, count 2 2006.229.19:05:42.66#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.19:05:42.66#ibcon#[27=AT03-04\r\n] 2006.229.19:05:42.66#ibcon#*before write, iclass 40, count 2 2006.229.19:05:42.66#ibcon#enter sib2, iclass 40, count 2 2006.229.19:05:42.66#ibcon#flushed, iclass 40, count 2 2006.229.19:05:42.66#ibcon#about to write, iclass 40, count 2 2006.229.19:05:42.66#ibcon#wrote, iclass 40, count 2 2006.229.19:05:42.66#ibcon#about to read 3, iclass 40, count 2 2006.229.19:05:42.69#ibcon#read 3, iclass 40, count 2 2006.229.19:05:42.69#ibcon#about to read 4, iclass 40, count 2 2006.229.19:05:42.69#ibcon#read 4, iclass 40, count 2 2006.229.19:05:42.69#ibcon#about to read 5, iclass 40, count 2 2006.229.19:05:42.69#ibcon#read 5, iclass 40, count 2 2006.229.19:05:42.69#ibcon#about to read 6, iclass 40, count 2 2006.229.19:05:42.69#ibcon#read 6, iclass 40, count 2 2006.229.19:05:42.69#ibcon#end of sib2, iclass 40, count 2 2006.229.19:05:42.69#ibcon#*after write, iclass 40, count 2 2006.229.19:05:42.69#ibcon#*before return 0, iclass 40, count 2 2006.229.19:05:42.69#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:42.69#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:05:42.69#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.19:05:42.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:42.69#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:42.81#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:42.81#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:42.81#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:05:42.81#ibcon#first serial, iclass 40, count 0 2006.229.19:05:42.81#ibcon#enter sib2, iclass 40, count 0 2006.229.19:05:42.81#ibcon#flushed, iclass 40, count 0 2006.229.19:05:42.81#ibcon#about to write, iclass 40, count 0 2006.229.19:05:42.81#ibcon#wrote, iclass 40, count 0 2006.229.19:05:42.81#ibcon#about to read 3, iclass 40, count 0 2006.229.19:05:42.83#ibcon#read 3, iclass 40, count 0 2006.229.19:05:42.83#ibcon#about to read 4, iclass 40, count 0 2006.229.19:05:42.83#ibcon#read 4, iclass 40, count 0 2006.229.19:05:42.83#ibcon#about to read 5, iclass 40, count 0 2006.229.19:05:42.83#ibcon#read 5, iclass 40, count 0 2006.229.19:05:42.83#ibcon#about to read 6, iclass 40, count 0 2006.229.19:05:42.83#ibcon#read 6, iclass 40, count 0 2006.229.19:05:42.83#ibcon#end of sib2, iclass 40, count 0 2006.229.19:05:42.83#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:05:42.83#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:05:42.83#ibcon#[27=USB\r\n] 2006.229.19:05:42.83#ibcon#*before write, iclass 40, count 0 2006.229.19:05:42.83#ibcon#enter sib2, iclass 40, count 0 2006.229.19:05:42.83#ibcon#flushed, iclass 40, count 0 2006.229.19:05:42.83#ibcon#about to write, iclass 40, count 0 2006.229.19:05:42.83#ibcon#wrote, iclass 40, count 0 2006.229.19:05:42.83#ibcon#about to read 3, iclass 40, count 0 2006.229.19:05:42.86#ibcon#read 3, iclass 40, count 0 2006.229.19:05:42.86#ibcon#about to read 4, iclass 40, count 0 2006.229.19:05:42.86#ibcon#read 4, iclass 40, count 0 2006.229.19:05:42.86#ibcon#about to read 5, iclass 40, count 0 2006.229.19:05:42.86#ibcon#read 5, iclass 40, count 0 2006.229.19:05:42.86#ibcon#about to read 6, iclass 40, count 0 2006.229.19:05:42.86#ibcon#read 6, iclass 40, count 0 2006.229.19:05:42.86#ibcon#end of sib2, iclass 40, count 0 2006.229.19:05:42.86#ibcon#*after write, iclass 40, count 0 2006.229.19:05:42.86#ibcon#*before return 0, iclass 40, count 0 2006.229.19:05:42.86#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:42.86#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:05:42.86#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:05:42.86#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:05:42.86$vck44/vblo=4,679.99 2006.229.19:05:42.86#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.19:05:42.86#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.19:05:42.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:42.86#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:42.86#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:42.86#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:42.86#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:05:42.86#ibcon#first serial, iclass 4, count 0 2006.229.19:05:42.86#ibcon#enter sib2, iclass 4, count 0 2006.229.19:05:42.86#ibcon#flushed, iclass 4, count 0 2006.229.19:05:42.86#ibcon#about to write, iclass 4, count 0 2006.229.19:05:42.86#ibcon#wrote, iclass 4, count 0 2006.229.19:05:42.86#ibcon#about to read 3, iclass 4, count 0 2006.229.19:05:42.88#ibcon#read 3, iclass 4, count 0 2006.229.19:05:42.88#ibcon#about to read 4, iclass 4, count 0 2006.229.19:05:42.88#ibcon#read 4, iclass 4, count 0 2006.229.19:05:42.88#ibcon#about to read 5, iclass 4, count 0 2006.229.19:05:42.88#ibcon#read 5, iclass 4, count 0 2006.229.19:05:42.88#ibcon#about to read 6, iclass 4, count 0 2006.229.19:05:42.88#ibcon#read 6, iclass 4, count 0 2006.229.19:05:42.88#ibcon#end of sib2, iclass 4, count 0 2006.229.19:05:42.88#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:05:42.88#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:05:42.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:05:42.88#ibcon#*before write, iclass 4, count 0 2006.229.19:05:42.88#ibcon#enter sib2, iclass 4, count 0 2006.229.19:05:42.88#ibcon#flushed, iclass 4, count 0 2006.229.19:05:42.88#ibcon#about to write, iclass 4, count 0 2006.229.19:05:42.88#ibcon#wrote, iclass 4, count 0 2006.229.19:05:42.88#ibcon#about to read 3, iclass 4, count 0 2006.229.19:05:42.92#ibcon#read 3, iclass 4, count 0 2006.229.19:05:42.92#ibcon#about to read 4, iclass 4, count 0 2006.229.19:05:42.92#ibcon#read 4, iclass 4, count 0 2006.229.19:05:42.92#ibcon#about to read 5, iclass 4, count 0 2006.229.19:05:42.92#ibcon#read 5, iclass 4, count 0 2006.229.19:05:42.92#ibcon#about to read 6, iclass 4, count 0 2006.229.19:05:42.92#ibcon#read 6, iclass 4, count 0 2006.229.19:05:42.92#ibcon#end of sib2, iclass 4, count 0 2006.229.19:05:42.92#ibcon#*after write, iclass 4, count 0 2006.229.19:05:42.92#ibcon#*before return 0, iclass 4, count 0 2006.229.19:05:42.92#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:42.92#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:05:42.92#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:05:42.92#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:05:42.92$vck44/vb=4,4 2006.229.19:05:42.92#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.19:05:42.92#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.19:05:42.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:42.92#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:42.98#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:42.98#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:42.98#ibcon#enter wrdev, iclass 6, count 2 2006.229.19:05:42.98#ibcon#first serial, iclass 6, count 2 2006.229.19:05:42.98#ibcon#enter sib2, iclass 6, count 2 2006.229.19:05:42.98#ibcon#flushed, iclass 6, count 2 2006.229.19:05:42.98#ibcon#about to write, iclass 6, count 2 2006.229.19:05:42.98#ibcon#wrote, iclass 6, count 2 2006.229.19:05:42.98#ibcon#about to read 3, iclass 6, count 2 2006.229.19:05:43.00#ibcon#read 3, iclass 6, count 2 2006.229.19:05:43.00#ibcon#about to read 4, iclass 6, count 2 2006.229.19:05:43.00#ibcon#read 4, iclass 6, count 2 2006.229.19:05:43.00#ibcon#about to read 5, iclass 6, count 2 2006.229.19:05:43.00#ibcon#read 5, iclass 6, count 2 2006.229.19:05:43.00#ibcon#about to read 6, iclass 6, count 2 2006.229.19:05:43.00#ibcon#read 6, iclass 6, count 2 2006.229.19:05:43.00#ibcon#end of sib2, iclass 6, count 2 2006.229.19:05:43.00#ibcon#*mode == 0, iclass 6, count 2 2006.229.19:05:43.00#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.19:05:43.00#ibcon#[27=AT04-04\r\n] 2006.229.19:05:43.00#ibcon#*before write, iclass 6, count 2 2006.229.19:05:43.00#ibcon#enter sib2, iclass 6, count 2 2006.229.19:05:43.00#ibcon#flushed, iclass 6, count 2 2006.229.19:05:43.00#ibcon#about to write, iclass 6, count 2 2006.229.19:05:43.00#ibcon#wrote, iclass 6, count 2 2006.229.19:05:43.00#ibcon#about to read 3, iclass 6, count 2 2006.229.19:05:43.03#ibcon#read 3, iclass 6, count 2 2006.229.19:05:43.03#ibcon#about to read 4, iclass 6, count 2 2006.229.19:05:43.03#ibcon#read 4, iclass 6, count 2 2006.229.19:05:43.03#ibcon#about to read 5, iclass 6, count 2 2006.229.19:05:43.03#ibcon#read 5, iclass 6, count 2 2006.229.19:05:43.03#ibcon#about to read 6, iclass 6, count 2 2006.229.19:05:43.03#ibcon#read 6, iclass 6, count 2 2006.229.19:05:43.03#ibcon#end of sib2, iclass 6, count 2 2006.229.19:05:43.03#ibcon#*after write, iclass 6, count 2 2006.229.19:05:43.03#ibcon#*before return 0, iclass 6, count 2 2006.229.19:05:43.03#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:43.03#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:05:43.03#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.19:05:43.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:43.03#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:43.15#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:43.15#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:43.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:05:43.15#ibcon#first serial, iclass 6, count 0 2006.229.19:05:43.15#ibcon#enter sib2, iclass 6, count 0 2006.229.19:05:43.15#ibcon#flushed, iclass 6, count 0 2006.229.19:05:43.15#ibcon#about to write, iclass 6, count 0 2006.229.19:05:43.15#ibcon#wrote, iclass 6, count 0 2006.229.19:05:43.15#ibcon#about to read 3, iclass 6, count 0 2006.229.19:05:43.17#ibcon#read 3, iclass 6, count 0 2006.229.19:05:43.17#ibcon#about to read 4, iclass 6, count 0 2006.229.19:05:43.17#ibcon#read 4, iclass 6, count 0 2006.229.19:05:43.17#ibcon#about to read 5, iclass 6, count 0 2006.229.19:05:43.17#ibcon#read 5, iclass 6, count 0 2006.229.19:05:43.17#ibcon#about to read 6, iclass 6, count 0 2006.229.19:05:43.17#ibcon#read 6, iclass 6, count 0 2006.229.19:05:43.17#ibcon#end of sib2, iclass 6, count 0 2006.229.19:05:43.17#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:05:43.17#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:05:43.17#ibcon#[27=USB\r\n] 2006.229.19:05:43.17#ibcon#*before write, iclass 6, count 0 2006.229.19:05:43.17#ibcon#enter sib2, iclass 6, count 0 2006.229.19:05:43.17#ibcon#flushed, iclass 6, count 0 2006.229.19:05:43.17#ibcon#about to write, iclass 6, count 0 2006.229.19:05:43.17#ibcon#wrote, iclass 6, count 0 2006.229.19:05:43.17#ibcon#about to read 3, iclass 6, count 0 2006.229.19:05:43.20#ibcon#read 3, iclass 6, count 0 2006.229.19:05:43.20#ibcon#about to read 4, iclass 6, count 0 2006.229.19:05:43.20#ibcon#read 4, iclass 6, count 0 2006.229.19:05:43.20#ibcon#about to read 5, iclass 6, count 0 2006.229.19:05:43.20#ibcon#read 5, iclass 6, count 0 2006.229.19:05:43.20#ibcon#about to read 6, iclass 6, count 0 2006.229.19:05:43.20#ibcon#read 6, iclass 6, count 0 2006.229.19:05:43.20#ibcon#end of sib2, iclass 6, count 0 2006.229.19:05:43.20#ibcon#*after write, iclass 6, count 0 2006.229.19:05:43.20#ibcon#*before return 0, iclass 6, count 0 2006.229.19:05:43.20#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:43.20#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:05:43.20#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:05:43.20#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:05:43.20$vck44/vblo=5,709.99 2006.229.19:05:43.20#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.19:05:43.20#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.19:05:43.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:43.20#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:43.20#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:43.20#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:43.20#ibcon#enter wrdev, iclass 10, count 0 2006.229.19:05:43.20#ibcon#first serial, iclass 10, count 0 2006.229.19:05:43.20#ibcon#enter sib2, iclass 10, count 0 2006.229.19:05:43.20#ibcon#flushed, iclass 10, count 0 2006.229.19:05:43.20#ibcon#about to write, iclass 10, count 0 2006.229.19:05:43.20#ibcon#wrote, iclass 10, count 0 2006.229.19:05:43.20#ibcon#about to read 3, iclass 10, count 0 2006.229.19:05:43.22#ibcon#read 3, iclass 10, count 0 2006.229.19:05:43.22#ibcon#about to read 4, iclass 10, count 0 2006.229.19:05:43.22#ibcon#read 4, iclass 10, count 0 2006.229.19:05:43.22#ibcon#about to read 5, iclass 10, count 0 2006.229.19:05:43.22#ibcon#read 5, iclass 10, count 0 2006.229.19:05:43.22#ibcon#about to read 6, iclass 10, count 0 2006.229.19:05:43.22#ibcon#read 6, iclass 10, count 0 2006.229.19:05:43.22#ibcon#end of sib2, iclass 10, count 0 2006.229.19:05:43.22#ibcon#*mode == 0, iclass 10, count 0 2006.229.19:05:43.22#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.19:05:43.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:05:43.22#ibcon#*before write, iclass 10, count 0 2006.229.19:05:43.22#ibcon#enter sib2, iclass 10, count 0 2006.229.19:05:43.22#ibcon#flushed, iclass 10, count 0 2006.229.19:05:43.22#ibcon#about to write, iclass 10, count 0 2006.229.19:05:43.22#ibcon#wrote, iclass 10, count 0 2006.229.19:05:43.22#ibcon#about to read 3, iclass 10, count 0 2006.229.19:05:43.26#ibcon#read 3, iclass 10, count 0 2006.229.19:05:43.26#ibcon#about to read 4, iclass 10, count 0 2006.229.19:05:43.26#ibcon#read 4, iclass 10, count 0 2006.229.19:05:43.26#ibcon#about to read 5, iclass 10, count 0 2006.229.19:05:43.26#ibcon#read 5, iclass 10, count 0 2006.229.19:05:43.26#ibcon#about to read 6, iclass 10, count 0 2006.229.19:05:43.26#ibcon#read 6, iclass 10, count 0 2006.229.19:05:43.26#ibcon#end of sib2, iclass 10, count 0 2006.229.19:05:43.26#ibcon#*after write, iclass 10, count 0 2006.229.19:05:43.26#ibcon#*before return 0, iclass 10, count 0 2006.229.19:05:43.26#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:43.26#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:05:43.26#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.19:05:43.26#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.19:05:43.26$vck44/vb=5,4 2006.229.19:05:43.26#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.19:05:43.26#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.19:05:43.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:43.26#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:43.32#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:43.32#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:43.32#ibcon#enter wrdev, iclass 12, count 2 2006.229.19:05:43.32#ibcon#first serial, iclass 12, count 2 2006.229.19:05:43.32#ibcon#enter sib2, iclass 12, count 2 2006.229.19:05:43.32#ibcon#flushed, iclass 12, count 2 2006.229.19:05:43.32#ibcon#about to write, iclass 12, count 2 2006.229.19:05:43.32#ibcon#wrote, iclass 12, count 2 2006.229.19:05:43.32#ibcon#about to read 3, iclass 12, count 2 2006.229.19:05:43.34#ibcon#read 3, iclass 12, count 2 2006.229.19:05:43.34#ibcon#about to read 4, iclass 12, count 2 2006.229.19:05:43.34#ibcon#read 4, iclass 12, count 2 2006.229.19:05:43.34#ibcon#about to read 5, iclass 12, count 2 2006.229.19:05:43.34#ibcon#read 5, iclass 12, count 2 2006.229.19:05:43.34#ibcon#about to read 6, iclass 12, count 2 2006.229.19:05:43.34#ibcon#read 6, iclass 12, count 2 2006.229.19:05:43.34#ibcon#end of sib2, iclass 12, count 2 2006.229.19:05:43.34#ibcon#*mode == 0, iclass 12, count 2 2006.229.19:05:43.34#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.19:05:43.34#ibcon#[27=AT05-04\r\n] 2006.229.19:05:43.34#ibcon#*before write, iclass 12, count 2 2006.229.19:05:43.34#ibcon#enter sib2, iclass 12, count 2 2006.229.19:05:43.34#ibcon#flushed, iclass 12, count 2 2006.229.19:05:43.34#ibcon#about to write, iclass 12, count 2 2006.229.19:05:43.34#ibcon#wrote, iclass 12, count 2 2006.229.19:05:43.34#ibcon#about to read 3, iclass 12, count 2 2006.229.19:05:43.37#ibcon#read 3, iclass 12, count 2 2006.229.19:05:43.37#ibcon#about to read 4, iclass 12, count 2 2006.229.19:05:43.37#ibcon#read 4, iclass 12, count 2 2006.229.19:05:43.37#ibcon#about to read 5, iclass 12, count 2 2006.229.19:05:43.37#ibcon#read 5, iclass 12, count 2 2006.229.19:05:43.37#ibcon#about to read 6, iclass 12, count 2 2006.229.19:05:43.37#ibcon#read 6, iclass 12, count 2 2006.229.19:05:43.37#ibcon#end of sib2, iclass 12, count 2 2006.229.19:05:43.37#ibcon#*after write, iclass 12, count 2 2006.229.19:05:43.37#ibcon#*before return 0, iclass 12, count 2 2006.229.19:05:43.37#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:43.37#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:05:43.37#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.19:05:43.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:43.37#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:43.49#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:43.49#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:43.49#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:05:43.49#ibcon#first serial, iclass 12, count 0 2006.229.19:05:43.49#ibcon#enter sib2, iclass 12, count 0 2006.229.19:05:43.49#ibcon#flushed, iclass 12, count 0 2006.229.19:05:43.49#ibcon#about to write, iclass 12, count 0 2006.229.19:05:43.49#ibcon#wrote, iclass 12, count 0 2006.229.19:05:43.49#ibcon#about to read 3, iclass 12, count 0 2006.229.19:05:43.51#ibcon#read 3, iclass 12, count 0 2006.229.19:05:43.51#ibcon#about to read 4, iclass 12, count 0 2006.229.19:05:43.51#ibcon#read 4, iclass 12, count 0 2006.229.19:05:43.51#ibcon#about to read 5, iclass 12, count 0 2006.229.19:05:43.51#ibcon#read 5, iclass 12, count 0 2006.229.19:05:43.51#ibcon#about to read 6, iclass 12, count 0 2006.229.19:05:43.51#ibcon#read 6, iclass 12, count 0 2006.229.19:05:43.51#ibcon#end of sib2, iclass 12, count 0 2006.229.19:05:43.51#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:05:43.51#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:05:43.51#ibcon#[27=USB\r\n] 2006.229.19:05:43.51#ibcon#*before write, iclass 12, count 0 2006.229.19:05:43.51#ibcon#enter sib2, iclass 12, count 0 2006.229.19:05:43.51#ibcon#flushed, iclass 12, count 0 2006.229.19:05:43.51#ibcon#about to write, iclass 12, count 0 2006.229.19:05:43.51#ibcon#wrote, iclass 12, count 0 2006.229.19:05:43.51#ibcon#about to read 3, iclass 12, count 0 2006.229.19:05:43.54#ibcon#read 3, iclass 12, count 0 2006.229.19:05:43.54#ibcon#about to read 4, iclass 12, count 0 2006.229.19:05:43.54#ibcon#read 4, iclass 12, count 0 2006.229.19:05:43.54#ibcon#about to read 5, iclass 12, count 0 2006.229.19:05:43.54#ibcon#read 5, iclass 12, count 0 2006.229.19:05:43.54#ibcon#about to read 6, iclass 12, count 0 2006.229.19:05:43.54#ibcon#read 6, iclass 12, count 0 2006.229.19:05:43.54#ibcon#end of sib2, iclass 12, count 0 2006.229.19:05:43.54#ibcon#*after write, iclass 12, count 0 2006.229.19:05:43.54#ibcon#*before return 0, iclass 12, count 0 2006.229.19:05:43.54#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:43.54#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:05:43.54#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:05:43.54#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:05:43.54$vck44/vblo=6,719.99 2006.229.19:05:43.54#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.19:05:43.54#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.19:05:43.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:43.54#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:43.54#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:43.54#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:43.54#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:05:43.54#ibcon#first serial, iclass 14, count 0 2006.229.19:05:43.54#ibcon#enter sib2, iclass 14, count 0 2006.229.19:05:43.54#ibcon#flushed, iclass 14, count 0 2006.229.19:05:43.54#ibcon#about to write, iclass 14, count 0 2006.229.19:05:43.54#ibcon#wrote, iclass 14, count 0 2006.229.19:05:43.54#ibcon#about to read 3, iclass 14, count 0 2006.229.19:05:43.56#ibcon#read 3, iclass 14, count 0 2006.229.19:05:43.56#ibcon#about to read 4, iclass 14, count 0 2006.229.19:05:43.56#ibcon#read 4, iclass 14, count 0 2006.229.19:05:43.56#ibcon#about to read 5, iclass 14, count 0 2006.229.19:05:43.56#ibcon#read 5, iclass 14, count 0 2006.229.19:05:43.56#ibcon#about to read 6, iclass 14, count 0 2006.229.19:05:43.56#ibcon#read 6, iclass 14, count 0 2006.229.19:05:43.56#ibcon#end of sib2, iclass 14, count 0 2006.229.19:05:43.56#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:05:43.56#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:05:43.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:05:43.56#ibcon#*before write, iclass 14, count 0 2006.229.19:05:43.56#ibcon#enter sib2, iclass 14, count 0 2006.229.19:05:43.56#ibcon#flushed, iclass 14, count 0 2006.229.19:05:43.56#ibcon#about to write, iclass 14, count 0 2006.229.19:05:43.56#ibcon#wrote, iclass 14, count 0 2006.229.19:05:43.56#ibcon#about to read 3, iclass 14, count 0 2006.229.19:05:43.60#ibcon#read 3, iclass 14, count 0 2006.229.19:05:43.60#ibcon#about to read 4, iclass 14, count 0 2006.229.19:05:43.60#ibcon#read 4, iclass 14, count 0 2006.229.19:05:43.60#ibcon#about to read 5, iclass 14, count 0 2006.229.19:05:43.60#ibcon#read 5, iclass 14, count 0 2006.229.19:05:43.60#ibcon#about to read 6, iclass 14, count 0 2006.229.19:05:43.60#ibcon#read 6, iclass 14, count 0 2006.229.19:05:43.60#ibcon#end of sib2, iclass 14, count 0 2006.229.19:05:43.60#ibcon#*after write, iclass 14, count 0 2006.229.19:05:43.60#ibcon#*before return 0, iclass 14, count 0 2006.229.19:05:43.60#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:43.60#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:05:43.60#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:05:43.60#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:05:43.60$vck44/vb=6,4 2006.229.19:05:43.60#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.19:05:43.60#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.19:05:43.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:43.60#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:43.66#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:43.66#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:43.66#ibcon#enter wrdev, iclass 16, count 2 2006.229.19:05:43.66#ibcon#first serial, iclass 16, count 2 2006.229.19:05:43.66#ibcon#enter sib2, iclass 16, count 2 2006.229.19:05:43.66#ibcon#flushed, iclass 16, count 2 2006.229.19:05:43.66#ibcon#about to write, iclass 16, count 2 2006.229.19:05:43.66#ibcon#wrote, iclass 16, count 2 2006.229.19:05:43.66#ibcon#about to read 3, iclass 16, count 2 2006.229.19:05:43.68#ibcon#read 3, iclass 16, count 2 2006.229.19:05:43.68#ibcon#about to read 4, iclass 16, count 2 2006.229.19:05:43.68#ibcon#read 4, iclass 16, count 2 2006.229.19:05:43.68#ibcon#about to read 5, iclass 16, count 2 2006.229.19:05:43.68#ibcon#read 5, iclass 16, count 2 2006.229.19:05:43.68#ibcon#about to read 6, iclass 16, count 2 2006.229.19:05:43.68#ibcon#read 6, iclass 16, count 2 2006.229.19:05:43.68#ibcon#end of sib2, iclass 16, count 2 2006.229.19:05:43.68#ibcon#*mode == 0, iclass 16, count 2 2006.229.19:05:43.68#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.19:05:43.68#ibcon#[27=AT06-04\r\n] 2006.229.19:05:43.68#ibcon#*before write, iclass 16, count 2 2006.229.19:05:43.68#ibcon#enter sib2, iclass 16, count 2 2006.229.19:05:43.68#ibcon#flushed, iclass 16, count 2 2006.229.19:05:43.68#ibcon#about to write, iclass 16, count 2 2006.229.19:05:43.68#ibcon#wrote, iclass 16, count 2 2006.229.19:05:43.68#ibcon#about to read 3, iclass 16, count 2 2006.229.19:05:43.71#ibcon#read 3, iclass 16, count 2 2006.229.19:05:43.71#ibcon#about to read 4, iclass 16, count 2 2006.229.19:05:43.71#ibcon#read 4, iclass 16, count 2 2006.229.19:05:43.71#ibcon#about to read 5, iclass 16, count 2 2006.229.19:05:43.71#ibcon#read 5, iclass 16, count 2 2006.229.19:05:43.71#ibcon#about to read 6, iclass 16, count 2 2006.229.19:05:43.71#ibcon#read 6, iclass 16, count 2 2006.229.19:05:43.71#ibcon#end of sib2, iclass 16, count 2 2006.229.19:05:43.71#ibcon#*after write, iclass 16, count 2 2006.229.19:05:43.71#ibcon#*before return 0, iclass 16, count 2 2006.229.19:05:43.71#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:43.71#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:05:43.71#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.19:05:43.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:43.71#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:43.83#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:43.83#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:43.83#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:05:43.83#ibcon#first serial, iclass 16, count 0 2006.229.19:05:43.83#ibcon#enter sib2, iclass 16, count 0 2006.229.19:05:43.83#ibcon#flushed, iclass 16, count 0 2006.229.19:05:43.83#ibcon#about to write, iclass 16, count 0 2006.229.19:05:43.83#ibcon#wrote, iclass 16, count 0 2006.229.19:05:43.83#ibcon#about to read 3, iclass 16, count 0 2006.229.19:05:43.85#ibcon#read 3, iclass 16, count 0 2006.229.19:05:43.85#ibcon#about to read 4, iclass 16, count 0 2006.229.19:05:43.85#ibcon#read 4, iclass 16, count 0 2006.229.19:05:43.85#ibcon#about to read 5, iclass 16, count 0 2006.229.19:05:43.85#ibcon#read 5, iclass 16, count 0 2006.229.19:05:43.85#ibcon#about to read 6, iclass 16, count 0 2006.229.19:05:43.85#ibcon#read 6, iclass 16, count 0 2006.229.19:05:43.85#ibcon#end of sib2, iclass 16, count 0 2006.229.19:05:43.85#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:05:43.85#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:05:43.85#ibcon#[27=USB\r\n] 2006.229.19:05:43.85#ibcon#*before write, iclass 16, count 0 2006.229.19:05:43.85#ibcon#enter sib2, iclass 16, count 0 2006.229.19:05:43.85#ibcon#flushed, iclass 16, count 0 2006.229.19:05:43.85#ibcon#about to write, iclass 16, count 0 2006.229.19:05:43.85#ibcon#wrote, iclass 16, count 0 2006.229.19:05:43.85#ibcon#about to read 3, iclass 16, count 0 2006.229.19:05:43.88#ibcon#read 3, iclass 16, count 0 2006.229.19:05:43.88#ibcon#about to read 4, iclass 16, count 0 2006.229.19:05:43.88#ibcon#read 4, iclass 16, count 0 2006.229.19:05:43.88#ibcon#about to read 5, iclass 16, count 0 2006.229.19:05:43.88#ibcon#read 5, iclass 16, count 0 2006.229.19:05:43.88#ibcon#about to read 6, iclass 16, count 0 2006.229.19:05:43.88#ibcon#read 6, iclass 16, count 0 2006.229.19:05:43.88#ibcon#end of sib2, iclass 16, count 0 2006.229.19:05:43.88#ibcon#*after write, iclass 16, count 0 2006.229.19:05:43.88#ibcon#*before return 0, iclass 16, count 0 2006.229.19:05:43.88#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:43.88#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:05:43.88#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:05:43.88#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:05:43.88$vck44/vblo=7,734.99 2006.229.19:05:43.88#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.19:05:43.88#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.19:05:43.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:43.88#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:43.88#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:43.88#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:43.88#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:05:43.88#ibcon#first serial, iclass 18, count 0 2006.229.19:05:43.88#ibcon#enter sib2, iclass 18, count 0 2006.229.19:05:43.88#ibcon#flushed, iclass 18, count 0 2006.229.19:05:43.88#ibcon#about to write, iclass 18, count 0 2006.229.19:05:43.88#ibcon#wrote, iclass 18, count 0 2006.229.19:05:43.88#ibcon#about to read 3, iclass 18, count 0 2006.229.19:05:43.90#ibcon#read 3, iclass 18, count 0 2006.229.19:05:43.90#ibcon#about to read 4, iclass 18, count 0 2006.229.19:05:43.90#ibcon#read 4, iclass 18, count 0 2006.229.19:05:43.90#ibcon#about to read 5, iclass 18, count 0 2006.229.19:05:43.90#ibcon#read 5, iclass 18, count 0 2006.229.19:05:43.90#ibcon#about to read 6, iclass 18, count 0 2006.229.19:05:43.90#ibcon#read 6, iclass 18, count 0 2006.229.19:05:43.90#ibcon#end of sib2, iclass 18, count 0 2006.229.19:05:43.90#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:05:43.90#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:05:43.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:05:43.90#ibcon#*before write, iclass 18, count 0 2006.229.19:05:43.90#ibcon#enter sib2, iclass 18, count 0 2006.229.19:05:43.90#ibcon#flushed, iclass 18, count 0 2006.229.19:05:43.90#ibcon#about to write, iclass 18, count 0 2006.229.19:05:43.90#ibcon#wrote, iclass 18, count 0 2006.229.19:05:43.90#ibcon#about to read 3, iclass 18, count 0 2006.229.19:05:43.94#ibcon#read 3, iclass 18, count 0 2006.229.19:05:43.94#ibcon#about to read 4, iclass 18, count 0 2006.229.19:05:43.94#ibcon#read 4, iclass 18, count 0 2006.229.19:05:43.94#ibcon#about to read 5, iclass 18, count 0 2006.229.19:05:43.94#ibcon#read 5, iclass 18, count 0 2006.229.19:05:43.94#ibcon#about to read 6, iclass 18, count 0 2006.229.19:05:43.94#ibcon#read 6, iclass 18, count 0 2006.229.19:05:43.94#ibcon#end of sib2, iclass 18, count 0 2006.229.19:05:43.94#ibcon#*after write, iclass 18, count 0 2006.229.19:05:43.94#ibcon#*before return 0, iclass 18, count 0 2006.229.19:05:43.94#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:43.94#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:05:43.94#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:05:43.94#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:05:43.94$vck44/vb=7,4 2006.229.19:05:43.94#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.19:05:43.94#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.19:05:43.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:43.94#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:44.00#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:44.00#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:44.00#ibcon#enter wrdev, iclass 20, count 2 2006.229.19:05:44.00#ibcon#first serial, iclass 20, count 2 2006.229.19:05:44.00#ibcon#enter sib2, iclass 20, count 2 2006.229.19:05:44.00#ibcon#flushed, iclass 20, count 2 2006.229.19:05:44.00#ibcon#about to write, iclass 20, count 2 2006.229.19:05:44.00#ibcon#wrote, iclass 20, count 2 2006.229.19:05:44.00#ibcon#about to read 3, iclass 20, count 2 2006.229.19:05:44.02#ibcon#read 3, iclass 20, count 2 2006.229.19:05:44.02#ibcon#about to read 4, iclass 20, count 2 2006.229.19:05:44.02#ibcon#read 4, iclass 20, count 2 2006.229.19:05:44.02#ibcon#about to read 5, iclass 20, count 2 2006.229.19:05:44.02#ibcon#read 5, iclass 20, count 2 2006.229.19:05:44.02#ibcon#about to read 6, iclass 20, count 2 2006.229.19:05:44.02#ibcon#read 6, iclass 20, count 2 2006.229.19:05:44.02#ibcon#end of sib2, iclass 20, count 2 2006.229.19:05:44.02#ibcon#*mode == 0, iclass 20, count 2 2006.229.19:05:44.02#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.19:05:44.02#ibcon#[27=AT07-04\r\n] 2006.229.19:05:44.02#ibcon#*before write, iclass 20, count 2 2006.229.19:05:44.02#ibcon#enter sib2, iclass 20, count 2 2006.229.19:05:44.02#ibcon#flushed, iclass 20, count 2 2006.229.19:05:44.02#ibcon#about to write, iclass 20, count 2 2006.229.19:05:44.02#ibcon#wrote, iclass 20, count 2 2006.229.19:05:44.02#ibcon#about to read 3, iclass 20, count 2 2006.229.19:05:44.05#ibcon#read 3, iclass 20, count 2 2006.229.19:05:44.05#ibcon#about to read 4, iclass 20, count 2 2006.229.19:05:44.05#ibcon#read 4, iclass 20, count 2 2006.229.19:05:44.05#ibcon#about to read 5, iclass 20, count 2 2006.229.19:05:44.05#ibcon#read 5, iclass 20, count 2 2006.229.19:05:44.05#ibcon#about to read 6, iclass 20, count 2 2006.229.19:05:44.05#ibcon#read 6, iclass 20, count 2 2006.229.19:05:44.05#ibcon#end of sib2, iclass 20, count 2 2006.229.19:05:44.05#ibcon#*after write, iclass 20, count 2 2006.229.19:05:44.05#ibcon#*before return 0, iclass 20, count 2 2006.229.19:05:44.05#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:44.05#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:05:44.05#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.19:05:44.05#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:44.05#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:44.17#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:44.17#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:44.17#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:05:44.17#ibcon#first serial, iclass 20, count 0 2006.229.19:05:44.17#ibcon#enter sib2, iclass 20, count 0 2006.229.19:05:44.17#ibcon#flushed, iclass 20, count 0 2006.229.19:05:44.17#ibcon#about to write, iclass 20, count 0 2006.229.19:05:44.17#ibcon#wrote, iclass 20, count 0 2006.229.19:05:44.17#ibcon#about to read 3, iclass 20, count 0 2006.229.19:05:44.19#ibcon#read 3, iclass 20, count 0 2006.229.19:05:44.19#ibcon#about to read 4, iclass 20, count 0 2006.229.19:05:44.19#ibcon#read 4, iclass 20, count 0 2006.229.19:05:44.19#ibcon#about to read 5, iclass 20, count 0 2006.229.19:05:44.19#ibcon#read 5, iclass 20, count 0 2006.229.19:05:44.19#ibcon#about to read 6, iclass 20, count 0 2006.229.19:05:44.19#ibcon#read 6, iclass 20, count 0 2006.229.19:05:44.19#ibcon#end of sib2, iclass 20, count 0 2006.229.19:05:44.19#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:05:44.19#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:05:44.19#ibcon#[27=USB\r\n] 2006.229.19:05:44.19#ibcon#*before write, iclass 20, count 0 2006.229.19:05:44.19#ibcon#enter sib2, iclass 20, count 0 2006.229.19:05:44.19#ibcon#flushed, iclass 20, count 0 2006.229.19:05:44.19#ibcon#about to write, iclass 20, count 0 2006.229.19:05:44.19#ibcon#wrote, iclass 20, count 0 2006.229.19:05:44.19#ibcon#about to read 3, iclass 20, count 0 2006.229.19:05:44.22#ibcon#read 3, iclass 20, count 0 2006.229.19:05:44.22#ibcon#about to read 4, iclass 20, count 0 2006.229.19:05:44.22#ibcon#read 4, iclass 20, count 0 2006.229.19:05:44.22#ibcon#about to read 5, iclass 20, count 0 2006.229.19:05:44.22#ibcon#read 5, iclass 20, count 0 2006.229.19:05:44.22#ibcon#about to read 6, iclass 20, count 0 2006.229.19:05:44.22#ibcon#read 6, iclass 20, count 0 2006.229.19:05:44.22#ibcon#end of sib2, iclass 20, count 0 2006.229.19:05:44.22#ibcon#*after write, iclass 20, count 0 2006.229.19:05:44.22#ibcon#*before return 0, iclass 20, count 0 2006.229.19:05:44.22#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:44.22#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:05:44.22#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:05:44.22#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:05:44.22$vck44/vblo=8,744.99 2006.229.19:05:44.22#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:05:44.22#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:05:44.22#ibcon#ireg 17 cls_cnt 0 2006.229.19:05:44.22#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:44.22#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:44.22#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:44.22#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:05:44.22#ibcon#first serial, iclass 22, count 0 2006.229.19:05:44.22#ibcon#enter sib2, iclass 22, count 0 2006.229.19:05:44.22#ibcon#flushed, iclass 22, count 0 2006.229.19:05:44.22#ibcon#about to write, iclass 22, count 0 2006.229.19:05:44.22#ibcon#wrote, iclass 22, count 0 2006.229.19:05:44.22#ibcon#about to read 3, iclass 22, count 0 2006.229.19:05:44.24#ibcon#read 3, iclass 22, count 0 2006.229.19:05:44.24#ibcon#about to read 4, iclass 22, count 0 2006.229.19:05:44.24#ibcon#read 4, iclass 22, count 0 2006.229.19:05:44.24#ibcon#about to read 5, iclass 22, count 0 2006.229.19:05:44.24#ibcon#read 5, iclass 22, count 0 2006.229.19:05:44.24#ibcon#about to read 6, iclass 22, count 0 2006.229.19:05:44.24#ibcon#read 6, iclass 22, count 0 2006.229.19:05:44.24#ibcon#end of sib2, iclass 22, count 0 2006.229.19:05:44.24#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:05:44.24#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:05:44.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:05:44.24#ibcon#*before write, iclass 22, count 0 2006.229.19:05:44.24#ibcon#enter sib2, iclass 22, count 0 2006.229.19:05:44.24#ibcon#flushed, iclass 22, count 0 2006.229.19:05:44.24#ibcon#about to write, iclass 22, count 0 2006.229.19:05:44.24#ibcon#wrote, iclass 22, count 0 2006.229.19:05:44.24#ibcon#about to read 3, iclass 22, count 0 2006.229.19:05:44.28#ibcon#read 3, iclass 22, count 0 2006.229.19:05:44.28#ibcon#about to read 4, iclass 22, count 0 2006.229.19:05:44.28#ibcon#read 4, iclass 22, count 0 2006.229.19:05:44.28#ibcon#about to read 5, iclass 22, count 0 2006.229.19:05:44.28#ibcon#read 5, iclass 22, count 0 2006.229.19:05:44.28#ibcon#about to read 6, iclass 22, count 0 2006.229.19:05:44.28#ibcon#read 6, iclass 22, count 0 2006.229.19:05:44.28#ibcon#end of sib2, iclass 22, count 0 2006.229.19:05:44.28#ibcon#*after write, iclass 22, count 0 2006.229.19:05:44.28#ibcon#*before return 0, iclass 22, count 0 2006.229.19:05:44.28#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:44.28#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:05:44.28#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:05:44.28#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:05:44.28$vck44/vb=8,4 2006.229.19:05:44.28#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.19:05:44.28#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.19:05:44.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:05:44.28#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:44.34#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:44.34#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:44.34#ibcon#enter wrdev, iclass 24, count 2 2006.229.19:05:44.34#ibcon#first serial, iclass 24, count 2 2006.229.19:05:44.34#ibcon#enter sib2, iclass 24, count 2 2006.229.19:05:44.34#ibcon#flushed, iclass 24, count 2 2006.229.19:05:44.34#ibcon#about to write, iclass 24, count 2 2006.229.19:05:44.34#ibcon#wrote, iclass 24, count 2 2006.229.19:05:44.34#ibcon#about to read 3, iclass 24, count 2 2006.229.19:05:44.36#ibcon#read 3, iclass 24, count 2 2006.229.19:05:44.36#ibcon#about to read 4, iclass 24, count 2 2006.229.19:05:44.36#ibcon#read 4, iclass 24, count 2 2006.229.19:05:44.36#ibcon#about to read 5, iclass 24, count 2 2006.229.19:05:44.36#ibcon#read 5, iclass 24, count 2 2006.229.19:05:44.36#ibcon#about to read 6, iclass 24, count 2 2006.229.19:05:44.36#ibcon#read 6, iclass 24, count 2 2006.229.19:05:44.36#ibcon#end of sib2, iclass 24, count 2 2006.229.19:05:44.36#ibcon#*mode == 0, iclass 24, count 2 2006.229.19:05:44.36#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.19:05:44.36#ibcon#[27=AT08-04\r\n] 2006.229.19:05:44.36#ibcon#*before write, iclass 24, count 2 2006.229.19:05:44.36#ibcon#enter sib2, iclass 24, count 2 2006.229.19:05:44.36#ibcon#flushed, iclass 24, count 2 2006.229.19:05:44.36#ibcon#about to write, iclass 24, count 2 2006.229.19:05:44.36#ibcon#wrote, iclass 24, count 2 2006.229.19:05:44.36#ibcon#about to read 3, iclass 24, count 2 2006.229.19:05:44.39#ibcon#read 3, iclass 24, count 2 2006.229.19:05:44.39#ibcon#about to read 4, iclass 24, count 2 2006.229.19:05:44.39#ibcon#read 4, iclass 24, count 2 2006.229.19:05:44.39#ibcon#about to read 5, iclass 24, count 2 2006.229.19:05:44.39#ibcon#read 5, iclass 24, count 2 2006.229.19:05:44.39#ibcon#about to read 6, iclass 24, count 2 2006.229.19:05:44.39#ibcon#read 6, iclass 24, count 2 2006.229.19:05:44.39#ibcon#end of sib2, iclass 24, count 2 2006.229.19:05:44.39#ibcon#*after write, iclass 24, count 2 2006.229.19:05:44.39#ibcon#*before return 0, iclass 24, count 2 2006.229.19:05:44.39#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:44.39#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:05:44.39#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.19:05:44.39#ibcon#ireg 7 cls_cnt 0 2006.229.19:05:44.39#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:44.51#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:44.51#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:44.51#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:05:44.51#ibcon#first serial, iclass 24, count 0 2006.229.19:05:44.51#ibcon#enter sib2, iclass 24, count 0 2006.229.19:05:44.51#ibcon#flushed, iclass 24, count 0 2006.229.19:05:44.51#ibcon#about to write, iclass 24, count 0 2006.229.19:05:44.51#ibcon#wrote, iclass 24, count 0 2006.229.19:05:44.51#ibcon#about to read 3, iclass 24, count 0 2006.229.19:05:44.53#ibcon#read 3, iclass 24, count 0 2006.229.19:05:44.53#ibcon#about to read 4, iclass 24, count 0 2006.229.19:05:44.53#ibcon#read 4, iclass 24, count 0 2006.229.19:05:44.53#ibcon#about to read 5, iclass 24, count 0 2006.229.19:05:44.53#ibcon#read 5, iclass 24, count 0 2006.229.19:05:44.53#ibcon#about to read 6, iclass 24, count 0 2006.229.19:05:44.53#ibcon#read 6, iclass 24, count 0 2006.229.19:05:44.53#ibcon#end of sib2, iclass 24, count 0 2006.229.19:05:44.53#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:05:44.53#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:05:44.53#ibcon#[27=USB\r\n] 2006.229.19:05:44.53#ibcon#*before write, iclass 24, count 0 2006.229.19:05:44.53#ibcon#enter sib2, iclass 24, count 0 2006.229.19:05:44.53#ibcon#flushed, iclass 24, count 0 2006.229.19:05:44.53#ibcon#about to write, iclass 24, count 0 2006.229.19:05:44.53#ibcon#wrote, iclass 24, count 0 2006.229.19:05:44.53#ibcon#about to read 3, iclass 24, count 0 2006.229.19:05:44.56#ibcon#read 3, iclass 24, count 0 2006.229.19:05:44.56#ibcon#about to read 4, iclass 24, count 0 2006.229.19:05:44.56#ibcon#read 4, iclass 24, count 0 2006.229.19:05:44.56#ibcon#about to read 5, iclass 24, count 0 2006.229.19:05:44.56#ibcon#read 5, iclass 24, count 0 2006.229.19:05:44.56#ibcon#about to read 6, iclass 24, count 0 2006.229.19:05:44.56#ibcon#read 6, iclass 24, count 0 2006.229.19:05:44.56#ibcon#end of sib2, iclass 24, count 0 2006.229.19:05:44.56#ibcon#*after write, iclass 24, count 0 2006.229.19:05:44.56#ibcon#*before return 0, iclass 24, count 0 2006.229.19:05:44.56#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:44.56#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:05:44.56#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:05:44.56#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:05:44.56$vck44/vabw=wide 2006.229.19:05:44.56#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.19:05:44.56#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.19:05:44.56#ibcon#ireg 8 cls_cnt 0 2006.229.19:05:44.56#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:44.56#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:44.56#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:44.56#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:05:44.56#ibcon#first serial, iclass 26, count 0 2006.229.19:05:44.56#ibcon#enter sib2, iclass 26, count 0 2006.229.19:05:44.56#ibcon#flushed, iclass 26, count 0 2006.229.19:05:44.56#ibcon#about to write, iclass 26, count 0 2006.229.19:05:44.56#ibcon#wrote, iclass 26, count 0 2006.229.19:05:44.56#ibcon#about to read 3, iclass 26, count 0 2006.229.19:05:44.58#ibcon#read 3, iclass 26, count 0 2006.229.19:05:44.58#ibcon#about to read 4, iclass 26, count 0 2006.229.19:05:44.58#ibcon#read 4, iclass 26, count 0 2006.229.19:05:44.58#ibcon#about to read 5, iclass 26, count 0 2006.229.19:05:44.58#ibcon#read 5, iclass 26, count 0 2006.229.19:05:44.58#ibcon#about to read 6, iclass 26, count 0 2006.229.19:05:44.58#ibcon#read 6, iclass 26, count 0 2006.229.19:05:44.58#ibcon#end of sib2, iclass 26, count 0 2006.229.19:05:44.58#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:05:44.58#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:05:44.58#ibcon#[25=BW32\r\n] 2006.229.19:05:44.58#ibcon#*before write, iclass 26, count 0 2006.229.19:05:44.58#ibcon#enter sib2, iclass 26, count 0 2006.229.19:05:44.58#ibcon#flushed, iclass 26, count 0 2006.229.19:05:44.58#ibcon#about to write, iclass 26, count 0 2006.229.19:05:44.58#ibcon#wrote, iclass 26, count 0 2006.229.19:05:44.58#ibcon#about to read 3, iclass 26, count 0 2006.229.19:05:44.61#ibcon#read 3, iclass 26, count 0 2006.229.19:05:44.61#ibcon#about to read 4, iclass 26, count 0 2006.229.19:05:44.61#ibcon#read 4, iclass 26, count 0 2006.229.19:05:44.61#ibcon#about to read 5, iclass 26, count 0 2006.229.19:05:44.61#ibcon#read 5, iclass 26, count 0 2006.229.19:05:44.61#ibcon#about to read 6, iclass 26, count 0 2006.229.19:05:44.61#ibcon#read 6, iclass 26, count 0 2006.229.19:05:44.61#ibcon#end of sib2, iclass 26, count 0 2006.229.19:05:44.61#ibcon#*after write, iclass 26, count 0 2006.229.19:05:44.61#ibcon#*before return 0, iclass 26, count 0 2006.229.19:05:44.61#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:44.61#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:05:44.61#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:05:44.61#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:05:44.61$vck44/vbbw=wide 2006.229.19:05:44.61#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.19:05:44.61#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.19:05:44.61#ibcon#ireg 8 cls_cnt 0 2006.229.19:05:44.61#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:05:44.68#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:05:44.68#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:05:44.68#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:05:44.68#ibcon#first serial, iclass 28, count 0 2006.229.19:05:44.68#ibcon#enter sib2, iclass 28, count 0 2006.229.19:05:44.68#ibcon#flushed, iclass 28, count 0 2006.229.19:05:44.68#ibcon#about to write, iclass 28, count 0 2006.229.19:05:44.68#ibcon#wrote, iclass 28, count 0 2006.229.19:05:44.68#ibcon#about to read 3, iclass 28, count 0 2006.229.19:05:44.70#ibcon#read 3, iclass 28, count 0 2006.229.19:05:44.70#ibcon#about to read 4, iclass 28, count 0 2006.229.19:05:44.70#ibcon#read 4, iclass 28, count 0 2006.229.19:05:44.70#ibcon#about to read 5, iclass 28, count 0 2006.229.19:05:44.70#ibcon#read 5, iclass 28, count 0 2006.229.19:05:44.70#ibcon#about to read 6, iclass 28, count 0 2006.229.19:05:44.70#ibcon#read 6, iclass 28, count 0 2006.229.19:05:44.70#ibcon#end of sib2, iclass 28, count 0 2006.229.19:05:44.70#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:05:44.70#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:05:44.70#ibcon#[27=BW32\r\n] 2006.229.19:05:44.70#ibcon#*before write, iclass 28, count 0 2006.229.19:05:44.70#ibcon#enter sib2, iclass 28, count 0 2006.229.19:05:44.70#ibcon#flushed, iclass 28, count 0 2006.229.19:05:44.70#ibcon#about to write, iclass 28, count 0 2006.229.19:05:44.70#ibcon#wrote, iclass 28, count 0 2006.229.19:05:44.70#ibcon#about to read 3, iclass 28, count 0 2006.229.19:05:44.73#ibcon#read 3, iclass 28, count 0 2006.229.19:05:44.73#ibcon#about to read 4, iclass 28, count 0 2006.229.19:05:44.73#ibcon#read 4, iclass 28, count 0 2006.229.19:05:44.73#ibcon#about to read 5, iclass 28, count 0 2006.229.19:05:44.73#ibcon#read 5, iclass 28, count 0 2006.229.19:05:44.73#ibcon#about to read 6, iclass 28, count 0 2006.229.19:05:44.73#ibcon#read 6, iclass 28, count 0 2006.229.19:05:44.73#ibcon#end of sib2, iclass 28, count 0 2006.229.19:05:44.73#ibcon#*after write, iclass 28, count 0 2006.229.19:05:44.73#ibcon#*before return 0, iclass 28, count 0 2006.229.19:05:44.73#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:05:44.73#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:05:44.73#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:05:44.73#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:05:44.73$setupk4/ifdk4 2006.229.19:05:44.73$ifdk4/lo= 2006.229.19:05:44.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:05:44.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:05:44.73$ifdk4/patch= 2006.229.19:05:44.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:05:44.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:05:44.74$setupk4/!*+20s 2006.229.19:05:48.52#abcon#<5=/06 1.8 3.1 26.111001001.4\r\n> 2006.229.19:05:48.54#abcon#{5=INTERFACE CLEAR} 2006.229.19:05:48.60#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:05:58.69#abcon#<5=/06 1.8 3.1 26.111001001.4\r\n> 2006.229.19:05:58.71#abcon#{5=INTERFACE CLEAR} 2006.229.19:05:58.77#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:05:59.25$setupk4/"tpicd 2006.229.19:05:59.25$setupk4/echo=off 2006.229.19:05:59.25$setupk4/xlog=off 2006.229.19:05:59.25:!2006.229.19:08:05 2006.229.19:06:06.13#trakl#Source acquired 2006.229.19:06:07.13#flagr#flagr/antenna,acquired 2006.229.19:08:05.00:preob 2006.229.19:08:05.14/onsource/TRACKING 2006.229.19:08:05.14:!2006.229.19:08:15 2006.229.19:08:15.00:"tape 2006.229.19:08:15.00:"st=record 2006.229.19:08:15.00:data_valid=on 2006.229.19:08:15.00:midob 2006.229.19:08:16.14/onsource/TRACKING 2006.229.19:08:16.14/wx/26.11,1001.4,100 2006.229.19:08:16.34/cable/+6.4181E-03 2006.229.19:08:17.43/va/01,08,usb,yes,32,35 2006.229.19:08:17.43/va/02,07,usb,yes,35,36 2006.229.19:08:17.43/va/03,06,usb,yes,43,46 2006.229.19:08:17.43/va/04,07,usb,yes,36,38 2006.229.19:08:17.43/va/05,04,usb,yes,32,33 2006.229.19:08:17.43/va/06,04,usb,yes,36,36 2006.229.19:08:17.43/va/07,05,usb,yes,32,33 2006.229.19:08:17.43/va/08,06,usb,yes,23,29 2006.229.19:08:17.66/valo/01,524.99,yes,locked 2006.229.19:08:17.66/valo/02,534.99,yes,locked 2006.229.19:08:17.66/valo/03,564.99,yes,locked 2006.229.19:08:17.66/valo/04,624.99,yes,locked 2006.229.19:08:17.66/valo/05,734.99,yes,locked 2006.229.19:08:17.66/valo/06,814.99,yes,locked 2006.229.19:08:17.66/valo/07,864.99,yes,locked 2006.229.19:08:17.66/valo/08,884.99,yes,locked 2006.229.19:08:18.75/vb/01,04,usb,yes,30,28 2006.229.19:08:18.75/vb/02,04,usb,yes,32,33 2006.229.19:08:18.75/vb/03,04,usb,yes,30,33 2006.229.19:08:18.75/vb/04,04,usb,yes,34,33 2006.229.19:08:18.75/vb/05,04,usb,yes,26,29 2006.229.19:08:18.75/vb/06,04,usb,yes,31,27 2006.229.19:08:18.75/vb/07,04,usb,yes,31,31 2006.229.19:08:18.75/vb/08,04,usb,yes,28,32 2006.229.19:08:18.99/vblo/01,629.99,yes,locked 2006.229.19:08:18.99/vblo/02,634.99,yes,locked 2006.229.19:08:18.99/vblo/03,649.99,yes,locked 2006.229.19:08:18.99/vblo/04,679.99,yes,locked 2006.229.19:08:18.99/vblo/05,709.99,yes,locked 2006.229.19:08:18.99/vblo/06,719.99,yes,locked 2006.229.19:08:18.99/vblo/07,734.99,yes,locked 2006.229.19:08:18.99/vblo/08,744.99,yes,locked 2006.229.19:08:19.14/vabw/8 2006.229.19:08:19.29/vbbw/8 2006.229.19:08:19.38/xfe/off,on,12.0 2006.229.19:08:19.76/ifatt/23,28,28,28 2006.229.19:08:20.08/fmout-gps/S +4.44E-07 2006.229.19:08:20.12:!2006.229.19:09:45 2006.229.19:09:45.00:data_valid=off 2006.229.19:09:45.00:"et 2006.229.19:09:45.00:!+3s 2006.229.19:09:48.01:"tape 2006.229.19:09:48.01:postob 2006.229.19:09:48.17/cable/+6.4179E-03 2006.229.19:09:48.17/wx/26.11,1001.4,100 2006.229.19:09:49.07/fmout-gps/S +4.44E-07 2006.229.19:09:49.07:scan_name=229-1911,jd0608,180 2006.229.19:09:49.07:source=2201+315,220314.98,314538.3,2000.0,ccw 2006.229.19:09:49.14#flagr#flagr/antenna,new-source 2006.229.19:09:50.14:checkk5 2006.229.19:09:50.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:09:50.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:09:51.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:09:51.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:09:52.09/chk_obsdata//k5ts1/T2291908??a.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.19:09:52.49/chk_obsdata//k5ts2/T2291908??b.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.19:09:52.90/chk_obsdata//k5ts3/T2291908??c.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.19:09:53.32/chk_obsdata//k5ts4/T2291908??d.dat file size is correct (nominal:360MB, actual:356MB). 2006.229.19:09:54.03/k5log//k5ts1_log_newline 2006.229.19:09:54.73/k5log//k5ts2_log_newline 2006.229.19:09:55.45/k5log//k5ts3_log_newline 2006.229.19:09:56.16/k5log//k5ts4_log_newline 2006.229.19:09:56.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:09:56.18:setupk4=1 2006.229.19:09:56.18$setupk4/echo=on 2006.229.19:09:56.18$setupk4/pcalon 2006.229.19:09:56.18$pcalon/"no phase cal control is implemented here 2006.229.19:09:56.18$setupk4/"tpicd=stop 2006.229.19:09:56.18$setupk4/"rec=synch_on 2006.229.19:09:56.18$setupk4/"rec_mode=128 2006.229.19:09:56.18$setupk4/!* 2006.229.19:09:56.19$setupk4/recpk4 2006.229.19:09:56.19$recpk4/recpatch= 2006.229.19:09:56.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:09:56.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:09:56.19$setupk4/vck44 2006.229.19:09:56.19$vck44/valo=1,524.99 2006.229.19:09:56.19#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.19:09:56.19#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.19:09:56.19#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:56.19#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:56.19#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:56.19#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:56.19#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:09:56.19#ibcon#first serial, iclass 25, count 0 2006.229.19:09:56.19#ibcon#enter sib2, iclass 25, count 0 2006.229.19:09:56.19#ibcon#flushed, iclass 25, count 0 2006.229.19:09:56.19#ibcon#about to write, iclass 25, count 0 2006.229.19:09:56.19#ibcon#wrote, iclass 25, count 0 2006.229.19:09:56.19#ibcon#about to read 3, iclass 25, count 0 2006.229.19:09:56.20#ibcon#read 3, iclass 25, count 0 2006.229.19:09:56.20#ibcon#about to read 4, iclass 25, count 0 2006.229.19:09:56.20#ibcon#read 4, iclass 25, count 0 2006.229.19:09:56.20#ibcon#about to read 5, iclass 25, count 0 2006.229.19:09:56.20#ibcon#read 5, iclass 25, count 0 2006.229.19:09:56.20#ibcon#about to read 6, iclass 25, count 0 2006.229.19:09:56.20#ibcon#read 6, iclass 25, count 0 2006.229.19:09:56.20#ibcon#end of sib2, iclass 25, count 0 2006.229.19:09:56.20#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:09:56.20#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:09:56.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:09:56.20#ibcon#*before write, iclass 25, count 0 2006.229.19:09:56.20#ibcon#enter sib2, iclass 25, count 0 2006.229.19:09:56.20#ibcon#flushed, iclass 25, count 0 2006.229.19:09:56.20#ibcon#about to write, iclass 25, count 0 2006.229.19:09:56.20#ibcon#wrote, iclass 25, count 0 2006.229.19:09:56.20#ibcon#about to read 3, iclass 25, count 0 2006.229.19:09:56.25#ibcon#read 3, iclass 25, count 0 2006.229.19:09:56.25#ibcon#about to read 4, iclass 25, count 0 2006.229.19:09:56.25#ibcon#read 4, iclass 25, count 0 2006.229.19:09:56.25#ibcon#about to read 5, iclass 25, count 0 2006.229.19:09:56.25#ibcon#read 5, iclass 25, count 0 2006.229.19:09:56.25#ibcon#about to read 6, iclass 25, count 0 2006.229.19:09:56.25#ibcon#read 6, iclass 25, count 0 2006.229.19:09:56.25#ibcon#end of sib2, iclass 25, count 0 2006.229.19:09:56.25#ibcon#*after write, iclass 25, count 0 2006.229.19:09:56.25#ibcon#*before return 0, iclass 25, count 0 2006.229.19:09:56.25#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:56.25#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:56.25#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:09:56.25#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:09:56.25$vck44/va=1,8 2006.229.19:09:56.25#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.19:09:56.25#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.19:09:56.25#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:56.25#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:56.25#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:56.25#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:56.25#ibcon#enter wrdev, iclass 27, count 2 2006.229.19:09:56.25#ibcon#first serial, iclass 27, count 2 2006.229.19:09:56.25#ibcon#enter sib2, iclass 27, count 2 2006.229.19:09:56.25#ibcon#flushed, iclass 27, count 2 2006.229.19:09:56.25#ibcon#about to write, iclass 27, count 2 2006.229.19:09:56.25#ibcon#wrote, iclass 27, count 2 2006.229.19:09:56.25#ibcon#about to read 3, iclass 27, count 2 2006.229.19:09:56.27#ibcon#read 3, iclass 27, count 2 2006.229.19:09:56.27#ibcon#about to read 4, iclass 27, count 2 2006.229.19:09:56.27#ibcon#read 4, iclass 27, count 2 2006.229.19:09:56.27#ibcon#about to read 5, iclass 27, count 2 2006.229.19:09:56.27#ibcon#read 5, iclass 27, count 2 2006.229.19:09:56.27#ibcon#about to read 6, iclass 27, count 2 2006.229.19:09:56.27#ibcon#read 6, iclass 27, count 2 2006.229.19:09:56.27#ibcon#end of sib2, iclass 27, count 2 2006.229.19:09:56.27#ibcon#*mode == 0, iclass 27, count 2 2006.229.19:09:56.27#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.19:09:56.27#ibcon#[25=AT01-08\r\n] 2006.229.19:09:56.27#ibcon#*before write, iclass 27, count 2 2006.229.19:09:56.27#ibcon#enter sib2, iclass 27, count 2 2006.229.19:09:56.27#ibcon#flushed, iclass 27, count 2 2006.229.19:09:56.27#ibcon#about to write, iclass 27, count 2 2006.229.19:09:56.27#ibcon#wrote, iclass 27, count 2 2006.229.19:09:56.27#ibcon#about to read 3, iclass 27, count 2 2006.229.19:09:56.30#ibcon#read 3, iclass 27, count 2 2006.229.19:09:56.30#ibcon#about to read 4, iclass 27, count 2 2006.229.19:09:56.30#ibcon#read 4, iclass 27, count 2 2006.229.19:09:56.30#ibcon#about to read 5, iclass 27, count 2 2006.229.19:09:56.30#ibcon#read 5, iclass 27, count 2 2006.229.19:09:56.30#ibcon#about to read 6, iclass 27, count 2 2006.229.19:09:56.30#ibcon#read 6, iclass 27, count 2 2006.229.19:09:56.30#ibcon#end of sib2, iclass 27, count 2 2006.229.19:09:56.30#ibcon#*after write, iclass 27, count 2 2006.229.19:09:56.30#ibcon#*before return 0, iclass 27, count 2 2006.229.19:09:56.30#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:56.30#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:56.30#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.19:09:56.30#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:56.30#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:56.42#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:56.42#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:56.42#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:09:56.42#ibcon#first serial, iclass 27, count 0 2006.229.19:09:56.42#ibcon#enter sib2, iclass 27, count 0 2006.229.19:09:56.42#ibcon#flushed, iclass 27, count 0 2006.229.19:09:56.42#ibcon#about to write, iclass 27, count 0 2006.229.19:09:56.42#ibcon#wrote, iclass 27, count 0 2006.229.19:09:56.42#ibcon#about to read 3, iclass 27, count 0 2006.229.19:09:56.44#ibcon#read 3, iclass 27, count 0 2006.229.19:09:56.44#ibcon#about to read 4, iclass 27, count 0 2006.229.19:09:56.44#ibcon#read 4, iclass 27, count 0 2006.229.19:09:56.44#ibcon#about to read 5, iclass 27, count 0 2006.229.19:09:56.44#ibcon#read 5, iclass 27, count 0 2006.229.19:09:56.44#ibcon#about to read 6, iclass 27, count 0 2006.229.19:09:56.44#ibcon#read 6, iclass 27, count 0 2006.229.19:09:56.44#ibcon#end of sib2, iclass 27, count 0 2006.229.19:09:56.44#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:09:56.44#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:09:56.44#ibcon#[25=USB\r\n] 2006.229.19:09:56.44#ibcon#*before write, iclass 27, count 0 2006.229.19:09:56.44#ibcon#enter sib2, iclass 27, count 0 2006.229.19:09:56.44#ibcon#flushed, iclass 27, count 0 2006.229.19:09:56.44#ibcon#about to write, iclass 27, count 0 2006.229.19:09:56.44#ibcon#wrote, iclass 27, count 0 2006.229.19:09:56.44#ibcon#about to read 3, iclass 27, count 0 2006.229.19:09:56.47#ibcon#read 3, iclass 27, count 0 2006.229.19:09:56.47#ibcon#about to read 4, iclass 27, count 0 2006.229.19:09:56.47#ibcon#read 4, iclass 27, count 0 2006.229.19:09:56.47#ibcon#about to read 5, iclass 27, count 0 2006.229.19:09:56.47#ibcon#read 5, iclass 27, count 0 2006.229.19:09:56.47#ibcon#about to read 6, iclass 27, count 0 2006.229.19:09:56.47#ibcon#read 6, iclass 27, count 0 2006.229.19:09:56.47#ibcon#end of sib2, iclass 27, count 0 2006.229.19:09:56.47#ibcon#*after write, iclass 27, count 0 2006.229.19:09:56.47#ibcon#*before return 0, iclass 27, count 0 2006.229.19:09:56.47#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:56.47#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:56.47#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:09:56.47#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:09:56.47$vck44/valo=2,534.99 2006.229.19:09:56.47#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.19:09:56.47#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.19:09:56.47#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:56.47#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:56.47#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:56.47#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:56.47#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:09:56.47#ibcon#first serial, iclass 29, count 0 2006.229.19:09:56.47#ibcon#enter sib2, iclass 29, count 0 2006.229.19:09:56.47#ibcon#flushed, iclass 29, count 0 2006.229.19:09:56.47#ibcon#about to write, iclass 29, count 0 2006.229.19:09:56.47#ibcon#wrote, iclass 29, count 0 2006.229.19:09:56.47#ibcon#about to read 3, iclass 29, count 0 2006.229.19:09:56.49#ibcon#read 3, iclass 29, count 0 2006.229.19:09:56.49#ibcon#about to read 4, iclass 29, count 0 2006.229.19:09:56.49#ibcon#read 4, iclass 29, count 0 2006.229.19:09:56.49#ibcon#about to read 5, iclass 29, count 0 2006.229.19:09:56.49#ibcon#read 5, iclass 29, count 0 2006.229.19:09:56.49#ibcon#about to read 6, iclass 29, count 0 2006.229.19:09:56.49#ibcon#read 6, iclass 29, count 0 2006.229.19:09:56.49#ibcon#end of sib2, iclass 29, count 0 2006.229.19:09:56.49#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:09:56.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:09:56.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:09:56.49#ibcon#*before write, iclass 29, count 0 2006.229.19:09:56.49#ibcon#enter sib2, iclass 29, count 0 2006.229.19:09:56.49#ibcon#flushed, iclass 29, count 0 2006.229.19:09:56.49#ibcon#about to write, iclass 29, count 0 2006.229.19:09:56.49#ibcon#wrote, iclass 29, count 0 2006.229.19:09:56.49#ibcon#about to read 3, iclass 29, count 0 2006.229.19:09:56.53#ibcon#read 3, iclass 29, count 0 2006.229.19:09:56.53#ibcon#about to read 4, iclass 29, count 0 2006.229.19:09:56.53#ibcon#read 4, iclass 29, count 0 2006.229.19:09:56.53#ibcon#about to read 5, iclass 29, count 0 2006.229.19:09:56.53#ibcon#read 5, iclass 29, count 0 2006.229.19:09:56.53#ibcon#about to read 6, iclass 29, count 0 2006.229.19:09:56.53#ibcon#read 6, iclass 29, count 0 2006.229.19:09:56.53#ibcon#end of sib2, iclass 29, count 0 2006.229.19:09:56.53#ibcon#*after write, iclass 29, count 0 2006.229.19:09:56.53#ibcon#*before return 0, iclass 29, count 0 2006.229.19:09:56.53#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:56.53#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:56.53#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:09:56.53#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:09:56.53$vck44/va=2,7 2006.229.19:09:56.53#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.19:09:56.53#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.19:09:56.53#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:56.53#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:56.59#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:56.59#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:56.59#ibcon#enter wrdev, iclass 31, count 2 2006.229.19:09:56.59#ibcon#first serial, iclass 31, count 2 2006.229.19:09:56.59#ibcon#enter sib2, iclass 31, count 2 2006.229.19:09:56.59#ibcon#flushed, iclass 31, count 2 2006.229.19:09:56.59#ibcon#about to write, iclass 31, count 2 2006.229.19:09:56.59#ibcon#wrote, iclass 31, count 2 2006.229.19:09:56.59#ibcon#about to read 3, iclass 31, count 2 2006.229.19:09:56.61#ibcon#read 3, iclass 31, count 2 2006.229.19:09:56.61#ibcon#about to read 4, iclass 31, count 2 2006.229.19:09:56.61#ibcon#read 4, iclass 31, count 2 2006.229.19:09:56.61#ibcon#about to read 5, iclass 31, count 2 2006.229.19:09:56.61#ibcon#read 5, iclass 31, count 2 2006.229.19:09:56.61#ibcon#about to read 6, iclass 31, count 2 2006.229.19:09:56.61#ibcon#read 6, iclass 31, count 2 2006.229.19:09:56.61#ibcon#end of sib2, iclass 31, count 2 2006.229.19:09:56.61#ibcon#*mode == 0, iclass 31, count 2 2006.229.19:09:56.61#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.19:09:56.61#ibcon#[25=AT02-07\r\n] 2006.229.19:09:56.61#ibcon#*before write, iclass 31, count 2 2006.229.19:09:56.61#ibcon#enter sib2, iclass 31, count 2 2006.229.19:09:56.61#ibcon#flushed, iclass 31, count 2 2006.229.19:09:56.61#ibcon#about to write, iclass 31, count 2 2006.229.19:09:56.61#ibcon#wrote, iclass 31, count 2 2006.229.19:09:56.61#ibcon#about to read 3, iclass 31, count 2 2006.229.19:09:56.64#ibcon#read 3, iclass 31, count 2 2006.229.19:09:56.64#ibcon#about to read 4, iclass 31, count 2 2006.229.19:09:56.64#ibcon#read 4, iclass 31, count 2 2006.229.19:09:56.64#ibcon#about to read 5, iclass 31, count 2 2006.229.19:09:56.64#ibcon#read 5, iclass 31, count 2 2006.229.19:09:56.64#ibcon#about to read 6, iclass 31, count 2 2006.229.19:09:56.64#ibcon#read 6, iclass 31, count 2 2006.229.19:09:56.64#ibcon#end of sib2, iclass 31, count 2 2006.229.19:09:56.64#ibcon#*after write, iclass 31, count 2 2006.229.19:09:56.64#ibcon#*before return 0, iclass 31, count 2 2006.229.19:09:56.64#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:56.64#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:56.64#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.19:09:56.64#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:56.64#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:56.76#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:56.76#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:56.76#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:09:56.76#ibcon#first serial, iclass 31, count 0 2006.229.19:09:56.76#ibcon#enter sib2, iclass 31, count 0 2006.229.19:09:56.76#ibcon#flushed, iclass 31, count 0 2006.229.19:09:56.76#ibcon#about to write, iclass 31, count 0 2006.229.19:09:56.76#ibcon#wrote, iclass 31, count 0 2006.229.19:09:56.76#ibcon#about to read 3, iclass 31, count 0 2006.229.19:09:56.78#ibcon#read 3, iclass 31, count 0 2006.229.19:09:56.78#ibcon#about to read 4, iclass 31, count 0 2006.229.19:09:56.78#ibcon#read 4, iclass 31, count 0 2006.229.19:09:56.78#ibcon#about to read 5, iclass 31, count 0 2006.229.19:09:56.78#ibcon#read 5, iclass 31, count 0 2006.229.19:09:56.78#ibcon#about to read 6, iclass 31, count 0 2006.229.19:09:56.78#ibcon#read 6, iclass 31, count 0 2006.229.19:09:56.78#ibcon#end of sib2, iclass 31, count 0 2006.229.19:09:56.78#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:09:56.78#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:09:56.78#ibcon#[25=USB\r\n] 2006.229.19:09:56.78#ibcon#*before write, iclass 31, count 0 2006.229.19:09:56.78#ibcon#enter sib2, iclass 31, count 0 2006.229.19:09:56.78#ibcon#flushed, iclass 31, count 0 2006.229.19:09:56.78#ibcon#about to write, iclass 31, count 0 2006.229.19:09:56.78#ibcon#wrote, iclass 31, count 0 2006.229.19:09:56.78#ibcon#about to read 3, iclass 31, count 0 2006.229.19:09:56.81#ibcon#read 3, iclass 31, count 0 2006.229.19:09:56.81#ibcon#about to read 4, iclass 31, count 0 2006.229.19:09:56.81#ibcon#read 4, iclass 31, count 0 2006.229.19:09:56.81#ibcon#about to read 5, iclass 31, count 0 2006.229.19:09:56.81#ibcon#read 5, iclass 31, count 0 2006.229.19:09:56.81#ibcon#about to read 6, iclass 31, count 0 2006.229.19:09:56.81#ibcon#read 6, iclass 31, count 0 2006.229.19:09:56.81#ibcon#end of sib2, iclass 31, count 0 2006.229.19:09:56.81#ibcon#*after write, iclass 31, count 0 2006.229.19:09:56.81#ibcon#*before return 0, iclass 31, count 0 2006.229.19:09:56.81#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:56.81#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:56.81#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:09:56.81#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:09:56.81$vck44/valo=3,564.99 2006.229.19:09:56.81#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.19:09:56.81#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.19:09:56.81#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:56.81#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:56.81#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:56.81#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:56.81#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:09:56.81#ibcon#first serial, iclass 33, count 0 2006.229.19:09:56.81#ibcon#enter sib2, iclass 33, count 0 2006.229.19:09:56.81#ibcon#flushed, iclass 33, count 0 2006.229.19:09:56.81#ibcon#about to write, iclass 33, count 0 2006.229.19:09:56.81#ibcon#wrote, iclass 33, count 0 2006.229.19:09:56.81#ibcon#about to read 3, iclass 33, count 0 2006.229.19:09:56.83#ibcon#read 3, iclass 33, count 0 2006.229.19:09:56.83#ibcon#about to read 4, iclass 33, count 0 2006.229.19:09:56.83#ibcon#read 4, iclass 33, count 0 2006.229.19:09:56.83#ibcon#about to read 5, iclass 33, count 0 2006.229.19:09:56.83#ibcon#read 5, iclass 33, count 0 2006.229.19:09:56.83#ibcon#about to read 6, iclass 33, count 0 2006.229.19:09:56.83#ibcon#read 6, iclass 33, count 0 2006.229.19:09:56.83#ibcon#end of sib2, iclass 33, count 0 2006.229.19:09:56.83#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:09:56.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:09:56.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:09:56.83#ibcon#*before write, iclass 33, count 0 2006.229.19:09:56.83#ibcon#enter sib2, iclass 33, count 0 2006.229.19:09:56.83#ibcon#flushed, iclass 33, count 0 2006.229.19:09:56.83#ibcon#about to write, iclass 33, count 0 2006.229.19:09:56.83#ibcon#wrote, iclass 33, count 0 2006.229.19:09:56.83#ibcon#about to read 3, iclass 33, count 0 2006.229.19:09:56.87#ibcon#read 3, iclass 33, count 0 2006.229.19:09:56.87#ibcon#about to read 4, iclass 33, count 0 2006.229.19:09:56.87#ibcon#read 4, iclass 33, count 0 2006.229.19:09:56.87#ibcon#about to read 5, iclass 33, count 0 2006.229.19:09:56.87#ibcon#read 5, iclass 33, count 0 2006.229.19:09:56.87#ibcon#about to read 6, iclass 33, count 0 2006.229.19:09:56.87#ibcon#read 6, iclass 33, count 0 2006.229.19:09:56.87#ibcon#end of sib2, iclass 33, count 0 2006.229.19:09:56.87#ibcon#*after write, iclass 33, count 0 2006.229.19:09:56.87#ibcon#*before return 0, iclass 33, count 0 2006.229.19:09:56.87#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:56.87#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:56.87#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:09:56.87#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:09:56.87$vck44/va=3,6 2006.229.19:09:56.87#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.19:09:56.87#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.19:09:56.87#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:56.87#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:56.93#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:56.93#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:56.93#ibcon#enter wrdev, iclass 35, count 2 2006.229.19:09:56.93#ibcon#first serial, iclass 35, count 2 2006.229.19:09:56.93#ibcon#enter sib2, iclass 35, count 2 2006.229.19:09:56.93#ibcon#flushed, iclass 35, count 2 2006.229.19:09:56.93#ibcon#about to write, iclass 35, count 2 2006.229.19:09:56.93#ibcon#wrote, iclass 35, count 2 2006.229.19:09:56.93#ibcon#about to read 3, iclass 35, count 2 2006.229.19:09:56.95#ibcon#read 3, iclass 35, count 2 2006.229.19:09:56.95#ibcon#about to read 4, iclass 35, count 2 2006.229.19:09:56.95#ibcon#read 4, iclass 35, count 2 2006.229.19:09:56.95#ibcon#about to read 5, iclass 35, count 2 2006.229.19:09:56.95#ibcon#read 5, iclass 35, count 2 2006.229.19:09:56.95#ibcon#about to read 6, iclass 35, count 2 2006.229.19:09:56.95#ibcon#read 6, iclass 35, count 2 2006.229.19:09:56.95#ibcon#end of sib2, iclass 35, count 2 2006.229.19:09:56.95#ibcon#*mode == 0, iclass 35, count 2 2006.229.19:09:56.95#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.19:09:56.95#ibcon#[25=AT03-06\r\n] 2006.229.19:09:56.95#ibcon#*before write, iclass 35, count 2 2006.229.19:09:56.95#ibcon#enter sib2, iclass 35, count 2 2006.229.19:09:56.95#ibcon#flushed, iclass 35, count 2 2006.229.19:09:56.95#ibcon#about to write, iclass 35, count 2 2006.229.19:09:56.95#ibcon#wrote, iclass 35, count 2 2006.229.19:09:56.95#ibcon#about to read 3, iclass 35, count 2 2006.229.19:09:56.98#ibcon#read 3, iclass 35, count 2 2006.229.19:09:56.98#ibcon#about to read 4, iclass 35, count 2 2006.229.19:09:56.98#ibcon#read 4, iclass 35, count 2 2006.229.19:09:56.98#ibcon#about to read 5, iclass 35, count 2 2006.229.19:09:56.98#ibcon#read 5, iclass 35, count 2 2006.229.19:09:56.98#ibcon#about to read 6, iclass 35, count 2 2006.229.19:09:56.98#ibcon#read 6, iclass 35, count 2 2006.229.19:09:56.98#ibcon#end of sib2, iclass 35, count 2 2006.229.19:09:56.98#ibcon#*after write, iclass 35, count 2 2006.229.19:09:56.98#ibcon#*before return 0, iclass 35, count 2 2006.229.19:09:56.98#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:56.98#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:56.98#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.19:09:56.98#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:56.98#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:09:57.10#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:09:57.10#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:09:57.10#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:09:57.10#ibcon#first serial, iclass 35, count 0 2006.229.19:09:57.10#ibcon#enter sib2, iclass 35, count 0 2006.229.19:09:57.10#ibcon#flushed, iclass 35, count 0 2006.229.19:09:57.10#ibcon#about to write, iclass 35, count 0 2006.229.19:09:57.10#ibcon#wrote, iclass 35, count 0 2006.229.19:09:57.10#ibcon#about to read 3, iclass 35, count 0 2006.229.19:09:57.12#ibcon#read 3, iclass 35, count 0 2006.229.19:09:57.12#ibcon#about to read 4, iclass 35, count 0 2006.229.19:09:57.12#ibcon#read 4, iclass 35, count 0 2006.229.19:09:57.12#ibcon#about to read 5, iclass 35, count 0 2006.229.19:09:57.12#ibcon#read 5, iclass 35, count 0 2006.229.19:09:57.12#ibcon#about to read 6, iclass 35, count 0 2006.229.19:09:57.12#ibcon#read 6, iclass 35, count 0 2006.229.19:09:57.12#ibcon#end of sib2, iclass 35, count 0 2006.229.19:09:57.12#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:09:57.12#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:09:57.12#ibcon#[25=USB\r\n] 2006.229.19:09:57.12#ibcon#*before write, iclass 35, count 0 2006.229.19:09:57.12#ibcon#enter sib2, iclass 35, count 0 2006.229.19:09:57.12#ibcon#flushed, iclass 35, count 0 2006.229.19:09:57.12#ibcon#about to write, iclass 35, count 0 2006.229.19:09:57.12#ibcon#wrote, iclass 35, count 0 2006.229.19:09:57.12#ibcon#about to read 3, iclass 35, count 0 2006.229.19:09:57.15#ibcon#read 3, iclass 35, count 0 2006.229.19:09:57.15#ibcon#about to read 4, iclass 35, count 0 2006.229.19:09:57.15#ibcon#read 4, iclass 35, count 0 2006.229.19:09:57.15#ibcon#about to read 5, iclass 35, count 0 2006.229.19:09:57.15#ibcon#read 5, iclass 35, count 0 2006.229.19:09:57.15#ibcon#about to read 6, iclass 35, count 0 2006.229.19:09:57.15#ibcon#read 6, iclass 35, count 0 2006.229.19:09:57.15#ibcon#end of sib2, iclass 35, count 0 2006.229.19:09:57.15#ibcon#*after write, iclass 35, count 0 2006.229.19:09:57.15#ibcon#*before return 0, iclass 35, count 0 2006.229.19:09:57.15#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:09:57.15#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:09:57.15#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:09:57.15#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:09:57.15$vck44/valo=4,624.99 2006.229.19:09:57.15#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.19:09:57.15#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.19:09:57.15#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:57.15#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:09:57.15#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:09:57.15#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:09:57.15#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:09:57.15#ibcon#first serial, iclass 37, count 0 2006.229.19:09:57.15#ibcon#enter sib2, iclass 37, count 0 2006.229.19:09:57.15#ibcon#flushed, iclass 37, count 0 2006.229.19:09:57.15#ibcon#about to write, iclass 37, count 0 2006.229.19:09:57.15#ibcon#wrote, iclass 37, count 0 2006.229.19:09:57.15#ibcon#about to read 3, iclass 37, count 0 2006.229.19:09:57.17#ibcon#read 3, iclass 37, count 0 2006.229.19:09:57.17#ibcon#about to read 4, iclass 37, count 0 2006.229.19:09:57.17#ibcon#read 4, iclass 37, count 0 2006.229.19:09:57.17#ibcon#about to read 5, iclass 37, count 0 2006.229.19:09:57.17#ibcon#read 5, iclass 37, count 0 2006.229.19:09:57.17#ibcon#about to read 6, iclass 37, count 0 2006.229.19:09:57.17#ibcon#read 6, iclass 37, count 0 2006.229.19:09:57.17#ibcon#end of sib2, iclass 37, count 0 2006.229.19:09:57.17#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:09:57.17#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:09:57.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:09:57.17#ibcon#*before write, iclass 37, count 0 2006.229.19:09:57.17#ibcon#enter sib2, iclass 37, count 0 2006.229.19:09:57.17#ibcon#flushed, iclass 37, count 0 2006.229.19:09:57.17#ibcon#about to write, iclass 37, count 0 2006.229.19:09:57.17#ibcon#wrote, iclass 37, count 0 2006.229.19:09:57.17#ibcon#about to read 3, iclass 37, count 0 2006.229.19:09:57.21#ibcon#read 3, iclass 37, count 0 2006.229.19:09:57.21#ibcon#about to read 4, iclass 37, count 0 2006.229.19:09:57.21#ibcon#read 4, iclass 37, count 0 2006.229.19:09:57.21#ibcon#about to read 5, iclass 37, count 0 2006.229.19:09:57.21#ibcon#read 5, iclass 37, count 0 2006.229.19:09:57.21#ibcon#about to read 6, iclass 37, count 0 2006.229.19:09:57.21#ibcon#read 6, iclass 37, count 0 2006.229.19:09:57.21#ibcon#end of sib2, iclass 37, count 0 2006.229.19:09:57.21#ibcon#*after write, iclass 37, count 0 2006.229.19:09:57.21#ibcon#*before return 0, iclass 37, count 0 2006.229.19:09:57.21#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:09:57.21#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:09:57.21#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:09:57.21#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:09:57.21$vck44/va=4,7 2006.229.19:09:57.21#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.19:09:57.21#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.19:09:57.21#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:57.21#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:09:57.27#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:09:57.27#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:09:57.27#ibcon#enter wrdev, iclass 39, count 2 2006.229.19:09:57.27#ibcon#first serial, iclass 39, count 2 2006.229.19:09:57.27#ibcon#enter sib2, iclass 39, count 2 2006.229.19:09:57.27#ibcon#flushed, iclass 39, count 2 2006.229.19:09:57.27#ibcon#about to write, iclass 39, count 2 2006.229.19:09:57.27#ibcon#wrote, iclass 39, count 2 2006.229.19:09:57.27#ibcon#about to read 3, iclass 39, count 2 2006.229.19:09:57.29#ibcon#read 3, iclass 39, count 2 2006.229.19:09:57.29#ibcon#about to read 4, iclass 39, count 2 2006.229.19:09:57.29#ibcon#read 4, iclass 39, count 2 2006.229.19:09:57.29#ibcon#about to read 5, iclass 39, count 2 2006.229.19:09:57.29#ibcon#read 5, iclass 39, count 2 2006.229.19:09:57.29#ibcon#about to read 6, iclass 39, count 2 2006.229.19:09:57.29#ibcon#read 6, iclass 39, count 2 2006.229.19:09:57.29#ibcon#end of sib2, iclass 39, count 2 2006.229.19:09:57.29#ibcon#*mode == 0, iclass 39, count 2 2006.229.19:09:57.29#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.19:09:57.29#ibcon#[25=AT04-07\r\n] 2006.229.19:09:57.29#ibcon#*before write, iclass 39, count 2 2006.229.19:09:57.29#ibcon#enter sib2, iclass 39, count 2 2006.229.19:09:57.29#ibcon#flushed, iclass 39, count 2 2006.229.19:09:57.29#ibcon#about to write, iclass 39, count 2 2006.229.19:09:57.29#ibcon#wrote, iclass 39, count 2 2006.229.19:09:57.29#ibcon#about to read 3, iclass 39, count 2 2006.229.19:09:57.32#ibcon#read 3, iclass 39, count 2 2006.229.19:09:57.32#ibcon#about to read 4, iclass 39, count 2 2006.229.19:09:57.32#ibcon#read 4, iclass 39, count 2 2006.229.19:09:57.32#ibcon#about to read 5, iclass 39, count 2 2006.229.19:09:57.32#ibcon#read 5, iclass 39, count 2 2006.229.19:09:57.32#ibcon#about to read 6, iclass 39, count 2 2006.229.19:09:57.32#ibcon#read 6, iclass 39, count 2 2006.229.19:09:57.32#ibcon#end of sib2, iclass 39, count 2 2006.229.19:09:57.32#ibcon#*after write, iclass 39, count 2 2006.229.19:09:57.32#ibcon#*before return 0, iclass 39, count 2 2006.229.19:09:57.32#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:09:57.32#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:09:57.32#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.19:09:57.32#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:57.32#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:09:57.44#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:09:57.44#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:09:57.44#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:09:57.44#ibcon#first serial, iclass 39, count 0 2006.229.19:09:57.44#ibcon#enter sib2, iclass 39, count 0 2006.229.19:09:57.44#ibcon#flushed, iclass 39, count 0 2006.229.19:09:57.44#ibcon#about to write, iclass 39, count 0 2006.229.19:09:57.44#ibcon#wrote, iclass 39, count 0 2006.229.19:09:57.44#ibcon#about to read 3, iclass 39, count 0 2006.229.19:09:57.46#ibcon#read 3, iclass 39, count 0 2006.229.19:09:57.46#ibcon#about to read 4, iclass 39, count 0 2006.229.19:09:57.46#ibcon#read 4, iclass 39, count 0 2006.229.19:09:57.46#ibcon#about to read 5, iclass 39, count 0 2006.229.19:09:57.46#ibcon#read 5, iclass 39, count 0 2006.229.19:09:57.46#ibcon#about to read 6, iclass 39, count 0 2006.229.19:09:57.46#ibcon#read 6, iclass 39, count 0 2006.229.19:09:57.46#ibcon#end of sib2, iclass 39, count 0 2006.229.19:09:57.46#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:09:57.46#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:09:57.46#ibcon#[25=USB\r\n] 2006.229.19:09:57.46#ibcon#*before write, iclass 39, count 0 2006.229.19:09:57.46#ibcon#enter sib2, iclass 39, count 0 2006.229.19:09:57.46#ibcon#flushed, iclass 39, count 0 2006.229.19:09:57.46#ibcon#about to write, iclass 39, count 0 2006.229.19:09:57.46#ibcon#wrote, iclass 39, count 0 2006.229.19:09:57.46#ibcon#about to read 3, iclass 39, count 0 2006.229.19:09:57.49#ibcon#read 3, iclass 39, count 0 2006.229.19:09:57.49#ibcon#about to read 4, iclass 39, count 0 2006.229.19:09:57.49#ibcon#read 4, iclass 39, count 0 2006.229.19:09:57.49#ibcon#about to read 5, iclass 39, count 0 2006.229.19:09:57.49#ibcon#read 5, iclass 39, count 0 2006.229.19:09:57.49#ibcon#about to read 6, iclass 39, count 0 2006.229.19:09:57.49#ibcon#read 6, iclass 39, count 0 2006.229.19:09:57.49#ibcon#end of sib2, iclass 39, count 0 2006.229.19:09:57.49#ibcon#*after write, iclass 39, count 0 2006.229.19:09:57.49#ibcon#*before return 0, iclass 39, count 0 2006.229.19:09:57.49#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:09:57.49#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:09:57.49#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:09:57.49#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:09:57.49$vck44/valo=5,734.99 2006.229.19:09:57.49#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.19:09:57.49#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.19:09:57.49#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:57.49#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:09:57.49#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:09:57.49#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:09:57.49#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:09:57.49#ibcon#first serial, iclass 3, count 0 2006.229.19:09:57.49#ibcon#enter sib2, iclass 3, count 0 2006.229.19:09:57.49#ibcon#flushed, iclass 3, count 0 2006.229.19:09:57.49#ibcon#about to write, iclass 3, count 0 2006.229.19:09:57.49#ibcon#wrote, iclass 3, count 0 2006.229.19:09:57.49#ibcon#about to read 3, iclass 3, count 0 2006.229.19:09:57.51#ibcon#read 3, iclass 3, count 0 2006.229.19:09:57.51#ibcon#about to read 4, iclass 3, count 0 2006.229.19:09:57.51#ibcon#read 4, iclass 3, count 0 2006.229.19:09:57.51#ibcon#about to read 5, iclass 3, count 0 2006.229.19:09:57.51#ibcon#read 5, iclass 3, count 0 2006.229.19:09:57.51#ibcon#about to read 6, iclass 3, count 0 2006.229.19:09:57.51#ibcon#read 6, iclass 3, count 0 2006.229.19:09:57.51#ibcon#end of sib2, iclass 3, count 0 2006.229.19:09:57.51#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:09:57.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:09:57.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:09:57.51#ibcon#*before write, iclass 3, count 0 2006.229.19:09:57.51#ibcon#enter sib2, iclass 3, count 0 2006.229.19:09:57.51#ibcon#flushed, iclass 3, count 0 2006.229.19:09:57.51#ibcon#about to write, iclass 3, count 0 2006.229.19:09:57.51#ibcon#wrote, iclass 3, count 0 2006.229.19:09:57.51#ibcon#about to read 3, iclass 3, count 0 2006.229.19:09:57.55#ibcon#read 3, iclass 3, count 0 2006.229.19:09:57.55#ibcon#about to read 4, iclass 3, count 0 2006.229.19:09:57.55#ibcon#read 4, iclass 3, count 0 2006.229.19:09:57.55#ibcon#about to read 5, iclass 3, count 0 2006.229.19:09:57.55#ibcon#read 5, iclass 3, count 0 2006.229.19:09:57.55#ibcon#about to read 6, iclass 3, count 0 2006.229.19:09:57.55#ibcon#read 6, iclass 3, count 0 2006.229.19:09:57.55#ibcon#end of sib2, iclass 3, count 0 2006.229.19:09:57.55#ibcon#*after write, iclass 3, count 0 2006.229.19:09:57.55#ibcon#*before return 0, iclass 3, count 0 2006.229.19:09:57.55#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:09:57.55#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:09:57.55#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:09:57.55#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:09:57.55$vck44/va=5,4 2006.229.19:09:57.55#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.19:09:57.55#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.19:09:57.55#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:57.55#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:09:57.61#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:09:57.61#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:09:57.61#ibcon#enter wrdev, iclass 5, count 2 2006.229.19:09:57.61#ibcon#first serial, iclass 5, count 2 2006.229.19:09:57.61#ibcon#enter sib2, iclass 5, count 2 2006.229.19:09:57.61#ibcon#flushed, iclass 5, count 2 2006.229.19:09:57.61#ibcon#about to write, iclass 5, count 2 2006.229.19:09:57.61#ibcon#wrote, iclass 5, count 2 2006.229.19:09:57.61#ibcon#about to read 3, iclass 5, count 2 2006.229.19:09:57.63#ibcon#read 3, iclass 5, count 2 2006.229.19:09:57.63#ibcon#about to read 4, iclass 5, count 2 2006.229.19:09:57.63#ibcon#read 4, iclass 5, count 2 2006.229.19:09:57.63#ibcon#about to read 5, iclass 5, count 2 2006.229.19:09:57.63#ibcon#read 5, iclass 5, count 2 2006.229.19:09:57.63#ibcon#about to read 6, iclass 5, count 2 2006.229.19:09:57.63#ibcon#read 6, iclass 5, count 2 2006.229.19:09:57.63#ibcon#end of sib2, iclass 5, count 2 2006.229.19:09:57.63#ibcon#*mode == 0, iclass 5, count 2 2006.229.19:09:57.63#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.19:09:57.63#ibcon#[25=AT05-04\r\n] 2006.229.19:09:57.63#ibcon#*before write, iclass 5, count 2 2006.229.19:09:57.63#ibcon#enter sib2, iclass 5, count 2 2006.229.19:09:57.63#ibcon#flushed, iclass 5, count 2 2006.229.19:09:57.63#ibcon#about to write, iclass 5, count 2 2006.229.19:09:57.63#ibcon#wrote, iclass 5, count 2 2006.229.19:09:57.63#ibcon#about to read 3, iclass 5, count 2 2006.229.19:09:57.66#ibcon#read 3, iclass 5, count 2 2006.229.19:09:57.66#ibcon#about to read 4, iclass 5, count 2 2006.229.19:09:57.66#ibcon#read 4, iclass 5, count 2 2006.229.19:09:57.66#ibcon#about to read 5, iclass 5, count 2 2006.229.19:09:57.66#ibcon#read 5, iclass 5, count 2 2006.229.19:09:57.66#ibcon#about to read 6, iclass 5, count 2 2006.229.19:09:57.66#ibcon#read 6, iclass 5, count 2 2006.229.19:09:57.66#ibcon#end of sib2, iclass 5, count 2 2006.229.19:09:57.66#ibcon#*after write, iclass 5, count 2 2006.229.19:09:57.66#ibcon#*before return 0, iclass 5, count 2 2006.229.19:09:57.66#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:09:57.66#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:09:57.66#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.19:09:57.66#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:57.66#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:09:57.78#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:09:57.78#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:09:57.78#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:09:57.78#ibcon#first serial, iclass 5, count 0 2006.229.19:09:57.78#ibcon#enter sib2, iclass 5, count 0 2006.229.19:09:57.78#ibcon#flushed, iclass 5, count 0 2006.229.19:09:57.78#ibcon#about to write, iclass 5, count 0 2006.229.19:09:57.78#ibcon#wrote, iclass 5, count 0 2006.229.19:09:57.78#ibcon#about to read 3, iclass 5, count 0 2006.229.19:09:57.80#ibcon#read 3, iclass 5, count 0 2006.229.19:09:57.80#ibcon#about to read 4, iclass 5, count 0 2006.229.19:09:57.80#ibcon#read 4, iclass 5, count 0 2006.229.19:09:57.80#ibcon#about to read 5, iclass 5, count 0 2006.229.19:09:57.80#ibcon#read 5, iclass 5, count 0 2006.229.19:09:57.80#ibcon#about to read 6, iclass 5, count 0 2006.229.19:09:57.80#ibcon#read 6, iclass 5, count 0 2006.229.19:09:57.80#ibcon#end of sib2, iclass 5, count 0 2006.229.19:09:57.80#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:09:57.80#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:09:57.80#ibcon#[25=USB\r\n] 2006.229.19:09:57.80#ibcon#*before write, iclass 5, count 0 2006.229.19:09:57.80#ibcon#enter sib2, iclass 5, count 0 2006.229.19:09:57.80#ibcon#flushed, iclass 5, count 0 2006.229.19:09:57.80#ibcon#about to write, iclass 5, count 0 2006.229.19:09:57.80#ibcon#wrote, iclass 5, count 0 2006.229.19:09:57.80#ibcon#about to read 3, iclass 5, count 0 2006.229.19:09:57.83#ibcon#read 3, iclass 5, count 0 2006.229.19:09:57.83#ibcon#about to read 4, iclass 5, count 0 2006.229.19:09:57.83#ibcon#read 4, iclass 5, count 0 2006.229.19:09:57.83#ibcon#about to read 5, iclass 5, count 0 2006.229.19:09:57.83#ibcon#read 5, iclass 5, count 0 2006.229.19:09:57.83#ibcon#about to read 6, iclass 5, count 0 2006.229.19:09:57.83#ibcon#read 6, iclass 5, count 0 2006.229.19:09:57.83#ibcon#end of sib2, iclass 5, count 0 2006.229.19:09:57.83#ibcon#*after write, iclass 5, count 0 2006.229.19:09:57.83#ibcon#*before return 0, iclass 5, count 0 2006.229.19:09:57.83#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:09:57.83#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:09:57.83#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:09:57.83#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:09:57.83$vck44/valo=6,814.99 2006.229.19:09:57.83#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.19:09:57.83#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.19:09:57.83#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:57.83#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:09:57.83#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:09:57.83#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:09:57.83#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:09:57.83#ibcon#first serial, iclass 7, count 0 2006.229.19:09:57.83#ibcon#enter sib2, iclass 7, count 0 2006.229.19:09:57.83#ibcon#flushed, iclass 7, count 0 2006.229.19:09:57.83#ibcon#about to write, iclass 7, count 0 2006.229.19:09:57.83#ibcon#wrote, iclass 7, count 0 2006.229.19:09:57.83#ibcon#about to read 3, iclass 7, count 0 2006.229.19:09:57.85#ibcon#read 3, iclass 7, count 0 2006.229.19:09:57.85#ibcon#about to read 4, iclass 7, count 0 2006.229.19:09:57.85#ibcon#read 4, iclass 7, count 0 2006.229.19:09:57.85#ibcon#about to read 5, iclass 7, count 0 2006.229.19:09:57.85#ibcon#read 5, iclass 7, count 0 2006.229.19:09:57.85#ibcon#about to read 6, iclass 7, count 0 2006.229.19:09:57.85#ibcon#read 6, iclass 7, count 0 2006.229.19:09:57.85#ibcon#end of sib2, iclass 7, count 0 2006.229.19:09:57.85#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:09:57.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:09:57.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:09:57.85#ibcon#*before write, iclass 7, count 0 2006.229.19:09:57.85#ibcon#enter sib2, iclass 7, count 0 2006.229.19:09:57.85#ibcon#flushed, iclass 7, count 0 2006.229.19:09:57.85#ibcon#about to write, iclass 7, count 0 2006.229.19:09:57.85#ibcon#wrote, iclass 7, count 0 2006.229.19:09:57.85#ibcon#about to read 3, iclass 7, count 0 2006.229.19:09:57.89#ibcon#read 3, iclass 7, count 0 2006.229.19:09:57.89#ibcon#about to read 4, iclass 7, count 0 2006.229.19:09:57.89#ibcon#read 4, iclass 7, count 0 2006.229.19:09:57.89#ibcon#about to read 5, iclass 7, count 0 2006.229.19:09:57.89#ibcon#read 5, iclass 7, count 0 2006.229.19:09:57.89#ibcon#about to read 6, iclass 7, count 0 2006.229.19:09:57.89#ibcon#read 6, iclass 7, count 0 2006.229.19:09:57.89#ibcon#end of sib2, iclass 7, count 0 2006.229.19:09:57.89#ibcon#*after write, iclass 7, count 0 2006.229.19:09:57.89#ibcon#*before return 0, iclass 7, count 0 2006.229.19:09:57.89#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:09:57.89#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:09:57.89#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:09:57.89#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:09:57.89$vck44/va=6,4 2006.229.19:09:57.89#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.19:09:57.89#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.19:09:57.89#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:57.89#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:09:57.95#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:09:57.95#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:09:57.95#ibcon#enter wrdev, iclass 11, count 2 2006.229.19:09:57.95#ibcon#first serial, iclass 11, count 2 2006.229.19:09:57.95#ibcon#enter sib2, iclass 11, count 2 2006.229.19:09:57.95#ibcon#flushed, iclass 11, count 2 2006.229.19:09:57.95#ibcon#about to write, iclass 11, count 2 2006.229.19:09:57.95#ibcon#wrote, iclass 11, count 2 2006.229.19:09:57.95#ibcon#about to read 3, iclass 11, count 2 2006.229.19:09:57.97#ibcon#read 3, iclass 11, count 2 2006.229.19:09:57.97#ibcon#about to read 4, iclass 11, count 2 2006.229.19:09:57.97#ibcon#read 4, iclass 11, count 2 2006.229.19:09:57.97#ibcon#about to read 5, iclass 11, count 2 2006.229.19:09:57.97#ibcon#read 5, iclass 11, count 2 2006.229.19:09:57.97#ibcon#about to read 6, iclass 11, count 2 2006.229.19:09:57.97#ibcon#read 6, iclass 11, count 2 2006.229.19:09:57.97#ibcon#end of sib2, iclass 11, count 2 2006.229.19:09:57.97#ibcon#*mode == 0, iclass 11, count 2 2006.229.19:09:57.97#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.19:09:57.97#ibcon#[25=AT06-04\r\n] 2006.229.19:09:57.97#ibcon#*before write, iclass 11, count 2 2006.229.19:09:57.97#ibcon#enter sib2, iclass 11, count 2 2006.229.19:09:57.97#ibcon#flushed, iclass 11, count 2 2006.229.19:09:57.97#ibcon#about to write, iclass 11, count 2 2006.229.19:09:57.97#ibcon#wrote, iclass 11, count 2 2006.229.19:09:57.97#ibcon#about to read 3, iclass 11, count 2 2006.229.19:09:58.00#ibcon#read 3, iclass 11, count 2 2006.229.19:09:58.00#ibcon#about to read 4, iclass 11, count 2 2006.229.19:09:58.00#ibcon#read 4, iclass 11, count 2 2006.229.19:09:58.00#ibcon#about to read 5, iclass 11, count 2 2006.229.19:09:58.00#ibcon#read 5, iclass 11, count 2 2006.229.19:09:58.00#ibcon#about to read 6, iclass 11, count 2 2006.229.19:09:58.00#ibcon#read 6, iclass 11, count 2 2006.229.19:09:58.00#ibcon#end of sib2, iclass 11, count 2 2006.229.19:09:58.00#ibcon#*after write, iclass 11, count 2 2006.229.19:09:58.00#ibcon#*before return 0, iclass 11, count 2 2006.229.19:09:58.00#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:09:58.00#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:09:58.00#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.19:09:58.00#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:58.00#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:09:58.12#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:09:58.12#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:09:58.12#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:09:58.12#ibcon#first serial, iclass 11, count 0 2006.229.19:09:58.12#ibcon#enter sib2, iclass 11, count 0 2006.229.19:09:58.12#ibcon#flushed, iclass 11, count 0 2006.229.19:09:58.12#ibcon#about to write, iclass 11, count 0 2006.229.19:09:58.12#ibcon#wrote, iclass 11, count 0 2006.229.19:09:58.12#ibcon#about to read 3, iclass 11, count 0 2006.229.19:09:58.14#ibcon#read 3, iclass 11, count 0 2006.229.19:09:58.14#ibcon#about to read 4, iclass 11, count 0 2006.229.19:09:58.14#ibcon#read 4, iclass 11, count 0 2006.229.19:09:58.14#ibcon#about to read 5, iclass 11, count 0 2006.229.19:09:58.14#ibcon#read 5, iclass 11, count 0 2006.229.19:09:58.14#ibcon#about to read 6, iclass 11, count 0 2006.229.19:09:58.14#ibcon#read 6, iclass 11, count 0 2006.229.19:09:58.14#ibcon#end of sib2, iclass 11, count 0 2006.229.19:09:58.14#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:09:58.14#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:09:58.14#ibcon#[25=USB\r\n] 2006.229.19:09:58.14#ibcon#*before write, iclass 11, count 0 2006.229.19:09:58.14#ibcon#enter sib2, iclass 11, count 0 2006.229.19:09:58.14#ibcon#flushed, iclass 11, count 0 2006.229.19:09:58.14#ibcon#about to write, iclass 11, count 0 2006.229.19:09:58.14#ibcon#wrote, iclass 11, count 0 2006.229.19:09:58.14#ibcon#about to read 3, iclass 11, count 0 2006.229.19:09:58.17#ibcon#read 3, iclass 11, count 0 2006.229.19:09:58.17#ibcon#about to read 4, iclass 11, count 0 2006.229.19:09:58.17#ibcon#read 4, iclass 11, count 0 2006.229.19:09:58.17#ibcon#about to read 5, iclass 11, count 0 2006.229.19:09:58.17#ibcon#read 5, iclass 11, count 0 2006.229.19:09:58.17#ibcon#about to read 6, iclass 11, count 0 2006.229.19:09:58.17#ibcon#read 6, iclass 11, count 0 2006.229.19:09:58.17#ibcon#end of sib2, iclass 11, count 0 2006.229.19:09:58.17#ibcon#*after write, iclass 11, count 0 2006.229.19:09:58.17#ibcon#*before return 0, iclass 11, count 0 2006.229.19:09:58.17#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:09:58.17#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:09:58.17#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:09:58.17#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:09:58.17$vck44/valo=7,864.99 2006.229.19:09:58.17#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.19:09:58.17#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.19:09:58.17#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:58.17#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:09:58.17#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:09:58.17#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:09:58.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:09:58.17#ibcon#first serial, iclass 13, count 0 2006.229.19:09:58.17#ibcon#enter sib2, iclass 13, count 0 2006.229.19:09:58.17#ibcon#flushed, iclass 13, count 0 2006.229.19:09:58.17#ibcon#about to write, iclass 13, count 0 2006.229.19:09:58.17#ibcon#wrote, iclass 13, count 0 2006.229.19:09:58.17#ibcon#about to read 3, iclass 13, count 0 2006.229.19:09:58.19#ibcon#read 3, iclass 13, count 0 2006.229.19:09:58.19#ibcon#about to read 4, iclass 13, count 0 2006.229.19:09:58.19#ibcon#read 4, iclass 13, count 0 2006.229.19:09:58.19#ibcon#about to read 5, iclass 13, count 0 2006.229.19:09:58.19#ibcon#read 5, iclass 13, count 0 2006.229.19:09:58.19#ibcon#about to read 6, iclass 13, count 0 2006.229.19:09:58.19#ibcon#read 6, iclass 13, count 0 2006.229.19:09:58.19#ibcon#end of sib2, iclass 13, count 0 2006.229.19:09:58.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:09:58.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:09:58.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:09:58.19#ibcon#*before write, iclass 13, count 0 2006.229.19:09:58.19#ibcon#enter sib2, iclass 13, count 0 2006.229.19:09:58.19#ibcon#flushed, iclass 13, count 0 2006.229.19:09:58.19#ibcon#about to write, iclass 13, count 0 2006.229.19:09:58.19#ibcon#wrote, iclass 13, count 0 2006.229.19:09:58.19#ibcon#about to read 3, iclass 13, count 0 2006.229.19:09:58.23#ibcon#read 3, iclass 13, count 0 2006.229.19:09:58.23#ibcon#about to read 4, iclass 13, count 0 2006.229.19:09:58.23#ibcon#read 4, iclass 13, count 0 2006.229.19:09:58.23#ibcon#about to read 5, iclass 13, count 0 2006.229.19:09:58.23#ibcon#read 5, iclass 13, count 0 2006.229.19:09:58.23#ibcon#about to read 6, iclass 13, count 0 2006.229.19:09:58.23#ibcon#read 6, iclass 13, count 0 2006.229.19:09:58.23#ibcon#end of sib2, iclass 13, count 0 2006.229.19:09:58.23#ibcon#*after write, iclass 13, count 0 2006.229.19:09:58.23#ibcon#*before return 0, iclass 13, count 0 2006.229.19:09:58.23#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:09:58.23#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:09:58.23#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:09:58.23#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:09:58.23$vck44/va=7,5 2006.229.19:09:58.23#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.19:09:58.23#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.19:09:58.23#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:58.23#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:09:58.29#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:09:58.29#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:09:58.29#ibcon#enter wrdev, iclass 15, count 2 2006.229.19:09:58.29#ibcon#first serial, iclass 15, count 2 2006.229.19:09:58.29#ibcon#enter sib2, iclass 15, count 2 2006.229.19:09:58.29#ibcon#flushed, iclass 15, count 2 2006.229.19:09:58.29#ibcon#about to write, iclass 15, count 2 2006.229.19:09:58.29#ibcon#wrote, iclass 15, count 2 2006.229.19:09:58.29#ibcon#about to read 3, iclass 15, count 2 2006.229.19:09:58.31#ibcon#read 3, iclass 15, count 2 2006.229.19:09:58.31#ibcon#about to read 4, iclass 15, count 2 2006.229.19:09:58.31#ibcon#read 4, iclass 15, count 2 2006.229.19:09:58.31#ibcon#about to read 5, iclass 15, count 2 2006.229.19:09:58.31#ibcon#read 5, iclass 15, count 2 2006.229.19:09:58.31#ibcon#about to read 6, iclass 15, count 2 2006.229.19:09:58.31#ibcon#read 6, iclass 15, count 2 2006.229.19:09:58.31#ibcon#end of sib2, iclass 15, count 2 2006.229.19:09:58.31#ibcon#*mode == 0, iclass 15, count 2 2006.229.19:09:58.31#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.19:09:58.31#ibcon#[25=AT07-05\r\n] 2006.229.19:09:58.31#ibcon#*before write, iclass 15, count 2 2006.229.19:09:58.31#ibcon#enter sib2, iclass 15, count 2 2006.229.19:09:58.31#ibcon#flushed, iclass 15, count 2 2006.229.19:09:58.31#ibcon#about to write, iclass 15, count 2 2006.229.19:09:58.31#ibcon#wrote, iclass 15, count 2 2006.229.19:09:58.31#ibcon#about to read 3, iclass 15, count 2 2006.229.19:09:58.34#ibcon#read 3, iclass 15, count 2 2006.229.19:09:58.34#ibcon#about to read 4, iclass 15, count 2 2006.229.19:09:58.34#ibcon#read 4, iclass 15, count 2 2006.229.19:09:58.34#ibcon#about to read 5, iclass 15, count 2 2006.229.19:09:58.34#ibcon#read 5, iclass 15, count 2 2006.229.19:09:58.34#ibcon#about to read 6, iclass 15, count 2 2006.229.19:09:58.34#ibcon#read 6, iclass 15, count 2 2006.229.19:09:58.34#ibcon#end of sib2, iclass 15, count 2 2006.229.19:09:58.34#ibcon#*after write, iclass 15, count 2 2006.229.19:09:58.34#ibcon#*before return 0, iclass 15, count 2 2006.229.19:09:58.34#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:09:58.34#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:09:58.34#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.19:09:58.34#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:58.34#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:09:58.46#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:09:58.46#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:09:58.46#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:09:58.46#ibcon#first serial, iclass 15, count 0 2006.229.19:09:58.46#ibcon#enter sib2, iclass 15, count 0 2006.229.19:09:58.46#ibcon#flushed, iclass 15, count 0 2006.229.19:09:58.46#ibcon#about to write, iclass 15, count 0 2006.229.19:09:58.46#ibcon#wrote, iclass 15, count 0 2006.229.19:09:58.46#ibcon#about to read 3, iclass 15, count 0 2006.229.19:09:58.48#ibcon#read 3, iclass 15, count 0 2006.229.19:09:58.48#ibcon#about to read 4, iclass 15, count 0 2006.229.19:09:58.48#ibcon#read 4, iclass 15, count 0 2006.229.19:09:58.48#ibcon#about to read 5, iclass 15, count 0 2006.229.19:09:58.48#ibcon#read 5, iclass 15, count 0 2006.229.19:09:58.48#ibcon#about to read 6, iclass 15, count 0 2006.229.19:09:58.48#ibcon#read 6, iclass 15, count 0 2006.229.19:09:58.48#ibcon#end of sib2, iclass 15, count 0 2006.229.19:09:58.48#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:09:58.48#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:09:58.48#ibcon#[25=USB\r\n] 2006.229.19:09:58.48#ibcon#*before write, iclass 15, count 0 2006.229.19:09:58.48#ibcon#enter sib2, iclass 15, count 0 2006.229.19:09:58.48#ibcon#flushed, iclass 15, count 0 2006.229.19:09:58.48#ibcon#about to write, iclass 15, count 0 2006.229.19:09:58.48#ibcon#wrote, iclass 15, count 0 2006.229.19:09:58.48#ibcon#about to read 3, iclass 15, count 0 2006.229.19:09:58.51#ibcon#read 3, iclass 15, count 0 2006.229.19:09:58.51#ibcon#about to read 4, iclass 15, count 0 2006.229.19:09:58.51#ibcon#read 4, iclass 15, count 0 2006.229.19:09:58.51#ibcon#about to read 5, iclass 15, count 0 2006.229.19:09:58.51#ibcon#read 5, iclass 15, count 0 2006.229.19:09:58.51#ibcon#about to read 6, iclass 15, count 0 2006.229.19:09:58.51#ibcon#read 6, iclass 15, count 0 2006.229.19:09:58.51#ibcon#end of sib2, iclass 15, count 0 2006.229.19:09:58.51#ibcon#*after write, iclass 15, count 0 2006.229.19:09:58.51#ibcon#*before return 0, iclass 15, count 0 2006.229.19:09:58.51#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:09:58.51#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:09:58.51#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:09:58.51#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:09:58.51$vck44/valo=8,884.99 2006.229.19:09:58.51#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.19:09:58.51#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.19:09:58.51#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:58.51#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:09:58.51#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:09:58.51#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:09:58.51#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:09:58.51#ibcon#first serial, iclass 17, count 0 2006.229.19:09:58.51#ibcon#enter sib2, iclass 17, count 0 2006.229.19:09:58.51#ibcon#flushed, iclass 17, count 0 2006.229.19:09:58.51#ibcon#about to write, iclass 17, count 0 2006.229.19:09:58.51#ibcon#wrote, iclass 17, count 0 2006.229.19:09:58.51#ibcon#about to read 3, iclass 17, count 0 2006.229.19:09:58.53#ibcon#read 3, iclass 17, count 0 2006.229.19:09:58.53#ibcon#about to read 4, iclass 17, count 0 2006.229.19:09:58.53#ibcon#read 4, iclass 17, count 0 2006.229.19:09:58.53#ibcon#about to read 5, iclass 17, count 0 2006.229.19:09:58.53#ibcon#read 5, iclass 17, count 0 2006.229.19:09:58.53#ibcon#about to read 6, iclass 17, count 0 2006.229.19:09:58.53#ibcon#read 6, iclass 17, count 0 2006.229.19:09:58.53#ibcon#end of sib2, iclass 17, count 0 2006.229.19:09:58.53#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:09:58.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:09:58.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:09:58.53#ibcon#*before write, iclass 17, count 0 2006.229.19:09:58.53#ibcon#enter sib2, iclass 17, count 0 2006.229.19:09:58.53#ibcon#flushed, iclass 17, count 0 2006.229.19:09:58.53#ibcon#about to write, iclass 17, count 0 2006.229.19:09:58.53#ibcon#wrote, iclass 17, count 0 2006.229.19:09:58.53#ibcon#about to read 3, iclass 17, count 0 2006.229.19:09:58.57#ibcon#read 3, iclass 17, count 0 2006.229.19:09:58.57#ibcon#about to read 4, iclass 17, count 0 2006.229.19:09:58.57#ibcon#read 4, iclass 17, count 0 2006.229.19:09:58.57#ibcon#about to read 5, iclass 17, count 0 2006.229.19:09:58.57#ibcon#read 5, iclass 17, count 0 2006.229.19:09:58.57#ibcon#about to read 6, iclass 17, count 0 2006.229.19:09:58.57#ibcon#read 6, iclass 17, count 0 2006.229.19:09:58.57#ibcon#end of sib2, iclass 17, count 0 2006.229.19:09:58.57#ibcon#*after write, iclass 17, count 0 2006.229.19:09:58.57#ibcon#*before return 0, iclass 17, count 0 2006.229.19:09:58.57#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:09:58.57#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:09:58.57#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:09:58.57#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:09:58.57$vck44/va=8,6 2006.229.19:09:58.57#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.19:09:58.57#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.19:09:58.57#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:58.57#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:09:58.63#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:09:58.63#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:09:58.63#ibcon#enter wrdev, iclass 19, count 2 2006.229.19:09:58.63#ibcon#first serial, iclass 19, count 2 2006.229.19:09:58.63#ibcon#enter sib2, iclass 19, count 2 2006.229.19:09:58.63#ibcon#flushed, iclass 19, count 2 2006.229.19:09:58.63#ibcon#about to write, iclass 19, count 2 2006.229.19:09:58.63#ibcon#wrote, iclass 19, count 2 2006.229.19:09:58.63#ibcon#about to read 3, iclass 19, count 2 2006.229.19:09:58.65#ibcon#read 3, iclass 19, count 2 2006.229.19:09:58.65#ibcon#about to read 4, iclass 19, count 2 2006.229.19:09:58.65#ibcon#read 4, iclass 19, count 2 2006.229.19:09:58.65#ibcon#about to read 5, iclass 19, count 2 2006.229.19:09:58.65#ibcon#read 5, iclass 19, count 2 2006.229.19:09:58.65#ibcon#about to read 6, iclass 19, count 2 2006.229.19:09:58.65#ibcon#read 6, iclass 19, count 2 2006.229.19:09:58.65#ibcon#end of sib2, iclass 19, count 2 2006.229.19:09:58.65#ibcon#*mode == 0, iclass 19, count 2 2006.229.19:09:58.65#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.19:09:58.65#ibcon#[25=AT08-06\r\n] 2006.229.19:09:58.65#ibcon#*before write, iclass 19, count 2 2006.229.19:09:58.65#ibcon#enter sib2, iclass 19, count 2 2006.229.19:09:58.65#ibcon#flushed, iclass 19, count 2 2006.229.19:09:58.65#ibcon#about to write, iclass 19, count 2 2006.229.19:09:58.65#ibcon#wrote, iclass 19, count 2 2006.229.19:09:58.65#ibcon#about to read 3, iclass 19, count 2 2006.229.19:09:58.68#ibcon#read 3, iclass 19, count 2 2006.229.19:09:58.68#ibcon#about to read 4, iclass 19, count 2 2006.229.19:09:58.68#ibcon#read 4, iclass 19, count 2 2006.229.19:09:58.68#ibcon#about to read 5, iclass 19, count 2 2006.229.19:09:58.68#ibcon#read 5, iclass 19, count 2 2006.229.19:09:58.68#ibcon#about to read 6, iclass 19, count 2 2006.229.19:09:58.68#ibcon#read 6, iclass 19, count 2 2006.229.19:09:58.68#ibcon#end of sib2, iclass 19, count 2 2006.229.19:09:58.68#ibcon#*after write, iclass 19, count 2 2006.229.19:09:58.68#ibcon#*before return 0, iclass 19, count 2 2006.229.19:09:58.68#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:09:58.68#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:09:58.68#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.19:09:58.68#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:58.68#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:09:58.80#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:09:58.80#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:09:58.80#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:09:58.80#ibcon#first serial, iclass 19, count 0 2006.229.19:09:58.80#ibcon#enter sib2, iclass 19, count 0 2006.229.19:09:58.80#ibcon#flushed, iclass 19, count 0 2006.229.19:09:58.80#ibcon#about to write, iclass 19, count 0 2006.229.19:09:58.80#ibcon#wrote, iclass 19, count 0 2006.229.19:09:58.80#ibcon#about to read 3, iclass 19, count 0 2006.229.19:09:58.82#ibcon#read 3, iclass 19, count 0 2006.229.19:09:58.82#ibcon#about to read 4, iclass 19, count 0 2006.229.19:09:58.82#ibcon#read 4, iclass 19, count 0 2006.229.19:09:58.82#ibcon#about to read 5, iclass 19, count 0 2006.229.19:09:58.82#ibcon#read 5, iclass 19, count 0 2006.229.19:09:58.82#ibcon#about to read 6, iclass 19, count 0 2006.229.19:09:58.82#ibcon#read 6, iclass 19, count 0 2006.229.19:09:58.82#ibcon#end of sib2, iclass 19, count 0 2006.229.19:09:58.82#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:09:58.82#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:09:58.82#ibcon#[25=USB\r\n] 2006.229.19:09:58.82#ibcon#*before write, iclass 19, count 0 2006.229.19:09:58.82#ibcon#enter sib2, iclass 19, count 0 2006.229.19:09:58.82#ibcon#flushed, iclass 19, count 0 2006.229.19:09:58.82#ibcon#about to write, iclass 19, count 0 2006.229.19:09:58.82#ibcon#wrote, iclass 19, count 0 2006.229.19:09:58.82#ibcon#about to read 3, iclass 19, count 0 2006.229.19:09:58.85#ibcon#read 3, iclass 19, count 0 2006.229.19:09:58.85#ibcon#about to read 4, iclass 19, count 0 2006.229.19:09:58.85#ibcon#read 4, iclass 19, count 0 2006.229.19:09:58.85#ibcon#about to read 5, iclass 19, count 0 2006.229.19:09:58.85#ibcon#read 5, iclass 19, count 0 2006.229.19:09:58.85#ibcon#about to read 6, iclass 19, count 0 2006.229.19:09:58.85#ibcon#read 6, iclass 19, count 0 2006.229.19:09:58.85#ibcon#end of sib2, iclass 19, count 0 2006.229.19:09:58.85#ibcon#*after write, iclass 19, count 0 2006.229.19:09:58.85#ibcon#*before return 0, iclass 19, count 0 2006.229.19:09:58.85#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:09:58.85#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:09:58.85#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:09:58.85#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:09:58.85$vck44/vblo=1,629.99 2006.229.19:09:58.85#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.19:09:58.85#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.19:09:58.85#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:58.85#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:09:58.85#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:09:58.85#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:09:58.85#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:09:58.85#ibcon#first serial, iclass 21, count 0 2006.229.19:09:58.85#ibcon#enter sib2, iclass 21, count 0 2006.229.19:09:58.85#ibcon#flushed, iclass 21, count 0 2006.229.19:09:58.85#ibcon#about to write, iclass 21, count 0 2006.229.19:09:58.85#ibcon#wrote, iclass 21, count 0 2006.229.19:09:58.85#ibcon#about to read 3, iclass 21, count 0 2006.229.19:09:58.87#ibcon#read 3, iclass 21, count 0 2006.229.19:09:58.87#ibcon#about to read 4, iclass 21, count 0 2006.229.19:09:58.87#ibcon#read 4, iclass 21, count 0 2006.229.19:09:58.87#ibcon#about to read 5, iclass 21, count 0 2006.229.19:09:58.87#ibcon#read 5, iclass 21, count 0 2006.229.19:09:58.87#ibcon#about to read 6, iclass 21, count 0 2006.229.19:09:58.87#ibcon#read 6, iclass 21, count 0 2006.229.19:09:58.87#ibcon#end of sib2, iclass 21, count 0 2006.229.19:09:58.87#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:09:58.87#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:09:58.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:09:58.87#ibcon#*before write, iclass 21, count 0 2006.229.19:09:58.87#ibcon#enter sib2, iclass 21, count 0 2006.229.19:09:58.87#ibcon#flushed, iclass 21, count 0 2006.229.19:09:58.87#ibcon#about to write, iclass 21, count 0 2006.229.19:09:58.87#ibcon#wrote, iclass 21, count 0 2006.229.19:09:58.87#ibcon#about to read 3, iclass 21, count 0 2006.229.19:09:58.91#ibcon#read 3, iclass 21, count 0 2006.229.19:09:58.91#ibcon#about to read 4, iclass 21, count 0 2006.229.19:09:58.91#ibcon#read 4, iclass 21, count 0 2006.229.19:09:58.91#ibcon#about to read 5, iclass 21, count 0 2006.229.19:09:58.91#ibcon#read 5, iclass 21, count 0 2006.229.19:09:58.91#ibcon#about to read 6, iclass 21, count 0 2006.229.19:09:58.91#ibcon#read 6, iclass 21, count 0 2006.229.19:09:58.91#ibcon#end of sib2, iclass 21, count 0 2006.229.19:09:58.91#ibcon#*after write, iclass 21, count 0 2006.229.19:09:58.91#ibcon#*before return 0, iclass 21, count 0 2006.229.19:09:58.91#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:09:58.91#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:09:58.91#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:09:58.91#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:09:58.91$vck44/vb=1,4 2006.229.19:09:58.91#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.19:09:58.91#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.19:09:58.91#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:58.91#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:09:58.91#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:09:58.91#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:09:58.91#ibcon#enter wrdev, iclass 23, count 2 2006.229.19:09:58.91#ibcon#first serial, iclass 23, count 2 2006.229.19:09:58.91#ibcon#enter sib2, iclass 23, count 2 2006.229.19:09:58.91#ibcon#flushed, iclass 23, count 2 2006.229.19:09:58.91#ibcon#about to write, iclass 23, count 2 2006.229.19:09:58.91#ibcon#wrote, iclass 23, count 2 2006.229.19:09:58.91#ibcon#about to read 3, iclass 23, count 2 2006.229.19:09:58.93#ibcon#read 3, iclass 23, count 2 2006.229.19:09:58.93#ibcon#about to read 4, iclass 23, count 2 2006.229.19:09:58.93#ibcon#read 4, iclass 23, count 2 2006.229.19:09:58.93#ibcon#about to read 5, iclass 23, count 2 2006.229.19:09:58.93#ibcon#read 5, iclass 23, count 2 2006.229.19:09:58.93#ibcon#about to read 6, iclass 23, count 2 2006.229.19:09:58.93#ibcon#read 6, iclass 23, count 2 2006.229.19:09:58.93#ibcon#end of sib2, iclass 23, count 2 2006.229.19:09:58.93#ibcon#*mode == 0, iclass 23, count 2 2006.229.19:09:58.93#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.19:09:58.93#ibcon#[27=AT01-04\r\n] 2006.229.19:09:58.93#ibcon#*before write, iclass 23, count 2 2006.229.19:09:58.93#ibcon#enter sib2, iclass 23, count 2 2006.229.19:09:58.93#ibcon#flushed, iclass 23, count 2 2006.229.19:09:58.93#ibcon#about to write, iclass 23, count 2 2006.229.19:09:58.93#ibcon#wrote, iclass 23, count 2 2006.229.19:09:58.93#ibcon#about to read 3, iclass 23, count 2 2006.229.19:09:58.96#ibcon#read 3, iclass 23, count 2 2006.229.19:09:58.96#ibcon#about to read 4, iclass 23, count 2 2006.229.19:09:58.96#ibcon#read 4, iclass 23, count 2 2006.229.19:09:58.96#ibcon#about to read 5, iclass 23, count 2 2006.229.19:09:58.96#ibcon#read 5, iclass 23, count 2 2006.229.19:09:58.96#ibcon#about to read 6, iclass 23, count 2 2006.229.19:09:58.96#ibcon#read 6, iclass 23, count 2 2006.229.19:09:58.96#ibcon#end of sib2, iclass 23, count 2 2006.229.19:09:58.96#ibcon#*after write, iclass 23, count 2 2006.229.19:09:58.96#ibcon#*before return 0, iclass 23, count 2 2006.229.19:09:58.96#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:09:58.96#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:09:58.96#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.19:09:58.96#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:58.96#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:09:59.08#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:09:59.08#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:09:59.08#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:09:59.08#ibcon#first serial, iclass 23, count 0 2006.229.19:09:59.08#ibcon#enter sib2, iclass 23, count 0 2006.229.19:09:59.08#ibcon#flushed, iclass 23, count 0 2006.229.19:09:59.08#ibcon#about to write, iclass 23, count 0 2006.229.19:09:59.08#ibcon#wrote, iclass 23, count 0 2006.229.19:09:59.08#ibcon#about to read 3, iclass 23, count 0 2006.229.19:09:59.10#ibcon#read 3, iclass 23, count 0 2006.229.19:09:59.10#ibcon#about to read 4, iclass 23, count 0 2006.229.19:09:59.10#ibcon#read 4, iclass 23, count 0 2006.229.19:09:59.10#ibcon#about to read 5, iclass 23, count 0 2006.229.19:09:59.10#ibcon#read 5, iclass 23, count 0 2006.229.19:09:59.10#ibcon#about to read 6, iclass 23, count 0 2006.229.19:09:59.10#ibcon#read 6, iclass 23, count 0 2006.229.19:09:59.10#ibcon#end of sib2, iclass 23, count 0 2006.229.19:09:59.10#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:09:59.10#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:09:59.10#ibcon#[27=USB\r\n] 2006.229.19:09:59.10#ibcon#*before write, iclass 23, count 0 2006.229.19:09:59.10#ibcon#enter sib2, iclass 23, count 0 2006.229.19:09:59.10#ibcon#flushed, iclass 23, count 0 2006.229.19:09:59.10#ibcon#about to write, iclass 23, count 0 2006.229.19:09:59.10#ibcon#wrote, iclass 23, count 0 2006.229.19:09:59.10#ibcon#about to read 3, iclass 23, count 0 2006.229.19:09:59.13#ibcon#read 3, iclass 23, count 0 2006.229.19:09:59.13#ibcon#about to read 4, iclass 23, count 0 2006.229.19:09:59.13#ibcon#read 4, iclass 23, count 0 2006.229.19:09:59.13#ibcon#about to read 5, iclass 23, count 0 2006.229.19:09:59.13#ibcon#read 5, iclass 23, count 0 2006.229.19:09:59.13#ibcon#about to read 6, iclass 23, count 0 2006.229.19:09:59.13#ibcon#read 6, iclass 23, count 0 2006.229.19:09:59.13#ibcon#end of sib2, iclass 23, count 0 2006.229.19:09:59.13#ibcon#*after write, iclass 23, count 0 2006.229.19:09:59.13#ibcon#*before return 0, iclass 23, count 0 2006.229.19:09:59.13#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:09:59.13#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:09:59.13#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:09:59.13#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:09:59.13$vck44/vblo=2,634.99 2006.229.19:09:59.13#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.19:09:59.13#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.19:09:59.13#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:59.13#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:59.13#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:59.13#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:59.13#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:09:59.13#ibcon#first serial, iclass 25, count 0 2006.229.19:09:59.13#ibcon#enter sib2, iclass 25, count 0 2006.229.19:09:59.13#ibcon#flushed, iclass 25, count 0 2006.229.19:09:59.13#ibcon#about to write, iclass 25, count 0 2006.229.19:09:59.13#ibcon#wrote, iclass 25, count 0 2006.229.19:09:59.13#ibcon#about to read 3, iclass 25, count 0 2006.229.19:09:59.15#ibcon#read 3, iclass 25, count 0 2006.229.19:09:59.15#ibcon#about to read 4, iclass 25, count 0 2006.229.19:09:59.15#ibcon#read 4, iclass 25, count 0 2006.229.19:09:59.15#ibcon#about to read 5, iclass 25, count 0 2006.229.19:09:59.15#ibcon#read 5, iclass 25, count 0 2006.229.19:09:59.15#ibcon#about to read 6, iclass 25, count 0 2006.229.19:09:59.15#ibcon#read 6, iclass 25, count 0 2006.229.19:09:59.15#ibcon#end of sib2, iclass 25, count 0 2006.229.19:09:59.15#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:09:59.15#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:09:59.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:09:59.15#ibcon#*before write, iclass 25, count 0 2006.229.19:09:59.15#ibcon#enter sib2, iclass 25, count 0 2006.229.19:09:59.15#ibcon#flushed, iclass 25, count 0 2006.229.19:09:59.15#ibcon#about to write, iclass 25, count 0 2006.229.19:09:59.15#ibcon#wrote, iclass 25, count 0 2006.229.19:09:59.15#ibcon#about to read 3, iclass 25, count 0 2006.229.19:09:59.19#ibcon#read 3, iclass 25, count 0 2006.229.19:09:59.19#ibcon#about to read 4, iclass 25, count 0 2006.229.19:09:59.19#ibcon#read 4, iclass 25, count 0 2006.229.19:09:59.19#ibcon#about to read 5, iclass 25, count 0 2006.229.19:09:59.19#ibcon#read 5, iclass 25, count 0 2006.229.19:09:59.19#ibcon#about to read 6, iclass 25, count 0 2006.229.19:09:59.19#ibcon#read 6, iclass 25, count 0 2006.229.19:09:59.19#ibcon#end of sib2, iclass 25, count 0 2006.229.19:09:59.19#ibcon#*after write, iclass 25, count 0 2006.229.19:09:59.19#ibcon#*before return 0, iclass 25, count 0 2006.229.19:09:59.19#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:59.19#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:09:59.19#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:09:59.19#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:09:59.19$vck44/vb=2,4 2006.229.19:09:59.19#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.19:09:59.19#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.19:09:59.19#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:59.19#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:59.25#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:59.25#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:59.25#ibcon#enter wrdev, iclass 27, count 2 2006.229.19:09:59.25#ibcon#first serial, iclass 27, count 2 2006.229.19:09:59.25#ibcon#enter sib2, iclass 27, count 2 2006.229.19:09:59.25#ibcon#flushed, iclass 27, count 2 2006.229.19:09:59.25#ibcon#about to write, iclass 27, count 2 2006.229.19:09:59.25#ibcon#wrote, iclass 27, count 2 2006.229.19:09:59.25#ibcon#about to read 3, iclass 27, count 2 2006.229.19:09:59.27#ibcon#read 3, iclass 27, count 2 2006.229.19:09:59.27#ibcon#about to read 4, iclass 27, count 2 2006.229.19:09:59.27#ibcon#read 4, iclass 27, count 2 2006.229.19:09:59.27#ibcon#about to read 5, iclass 27, count 2 2006.229.19:09:59.27#ibcon#read 5, iclass 27, count 2 2006.229.19:09:59.27#ibcon#about to read 6, iclass 27, count 2 2006.229.19:09:59.27#ibcon#read 6, iclass 27, count 2 2006.229.19:09:59.27#ibcon#end of sib2, iclass 27, count 2 2006.229.19:09:59.27#ibcon#*mode == 0, iclass 27, count 2 2006.229.19:09:59.27#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.19:09:59.27#ibcon#[27=AT02-04\r\n] 2006.229.19:09:59.27#ibcon#*before write, iclass 27, count 2 2006.229.19:09:59.27#ibcon#enter sib2, iclass 27, count 2 2006.229.19:09:59.27#ibcon#flushed, iclass 27, count 2 2006.229.19:09:59.27#ibcon#about to write, iclass 27, count 2 2006.229.19:09:59.27#ibcon#wrote, iclass 27, count 2 2006.229.19:09:59.27#ibcon#about to read 3, iclass 27, count 2 2006.229.19:09:59.30#ibcon#read 3, iclass 27, count 2 2006.229.19:09:59.30#ibcon#about to read 4, iclass 27, count 2 2006.229.19:09:59.30#ibcon#read 4, iclass 27, count 2 2006.229.19:09:59.30#ibcon#about to read 5, iclass 27, count 2 2006.229.19:09:59.30#ibcon#read 5, iclass 27, count 2 2006.229.19:09:59.30#ibcon#about to read 6, iclass 27, count 2 2006.229.19:09:59.30#ibcon#read 6, iclass 27, count 2 2006.229.19:09:59.30#ibcon#end of sib2, iclass 27, count 2 2006.229.19:09:59.30#ibcon#*after write, iclass 27, count 2 2006.229.19:09:59.30#ibcon#*before return 0, iclass 27, count 2 2006.229.19:09:59.30#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:59.30#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:09:59.30#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.19:09:59.30#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:59.30#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:59.42#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:59.42#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:59.42#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:09:59.42#ibcon#first serial, iclass 27, count 0 2006.229.19:09:59.42#ibcon#enter sib2, iclass 27, count 0 2006.229.19:09:59.42#ibcon#flushed, iclass 27, count 0 2006.229.19:09:59.42#ibcon#about to write, iclass 27, count 0 2006.229.19:09:59.42#ibcon#wrote, iclass 27, count 0 2006.229.19:09:59.42#ibcon#about to read 3, iclass 27, count 0 2006.229.19:09:59.44#ibcon#read 3, iclass 27, count 0 2006.229.19:09:59.44#ibcon#about to read 4, iclass 27, count 0 2006.229.19:09:59.44#ibcon#read 4, iclass 27, count 0 2006.229.19:09:59.44#ibcon#about to read 5, iclass 27, count 0 2006.229.19:09:59.44#ibcon#read 5, iclass 27, count 0 2006.229.19:09:59.44#ibcon#about to read 6, iclass 27, count 0 2006.229.19:09:59.44#ibcon#read 6, iclass 27, count 0 2006.229.19:09:59.44#ibcon#end of sib2, iclass 27, count 0 2006.229.19:09:59.44#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:09:59.44#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:09:59.44#ibcon#[27=USB\r\n] 2006.229.19:09:59.44#ibcon#*before write, iclass 27, count 0 2006.229.19:09:59.44#ibcon#enter sib2, iclass 27, count 0 2006.229.19:09:59.44#ibcon#flushed, iclass 27, count 0 2006.229.19:09:59.44#ibcon#about to write, iclass 27, count 0 2006.229.19:09:59.44#ibcon#wrote, iclass 27, count 0 2006.229.19:09:59.44#ibcon#about to read 3, iclass 27, count 0 2006.229.19:09:59.47#ibcon#read 3, iclass 27, count 0 2006.229.19:09:59.47#ibcon#about to read 4, iclass 27, count 0 2006.229.19:09:59.47#ibcon#read 4, iclass 27, count 0 2006.229.19:09:59.47#ibcon#about to read 5, iclass 27, count 0 2006.229.19:09:59.47#ibcon#read 5, iclass 27, count 0 2006.229.19:09:59.47#ibcon#about to read 6, iclass 27, count 0 2006.229.19:09:59.47#ibcon#read 6, iclass 27, count 0 2006.229.19:09:59.47#ibcon#end of sib2, iclass 27, count 0 2006.229.19:09:59.47#ibcon#*after write, iclass 27, count 0 2006.229.19:09:59.47#ibcon#*before return 0, iclass 27, count 0 2006.229.19:09:59.47#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:59.47#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:09:59.47#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:09:59.47#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:09:59.47$vck44/vblo=3,649.99 2006.229.19:09:59.47#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.19:09:59.47#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.19:09:59.47#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:59.47#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:59.47#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:59.47#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:59.47#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:09:59.47#ibcon#first serial, iclass 29, count 0 2006.229.19:09:59.47#ibcon#enter sib2, iclass 29, count 0 2006.229.19:09:59.47#ibcon#flushed, iclass 29, count 0 2006.229.19:09:59.47#ibcon#about to write, iclass 29, count 0 2006.229.19:09:59.47#ibcon#wrote, iclass 29, count 0 2006.229.19:09:59.47#ibcon#about to read 3, iclass 29, count 0 2006.229.19:09:59.49#ibcon#read 3, iclass 29, count 0 2006.229.19:09:59.49#ibcon#about to read 4, iclass 29, count 0 2006.229.19:09:59.49#ibcon#read 4, iclass 29, count 0 2006.229.19:09:59.49#ibcon#about to read 5, iclass 29, count 0 2006.229.19:09:59.49#ibcon#read 5, iclass 29, count 0 2006.229.19:09:59.49#ibcon#about to read 6, iclass 29, count 0 2006.229.19:09:59.49#ibcon#read 6, iclass 29, count 0 2006.229.19:09:59.49#ibcon#end of sib2, iclass 29, count 0 2006.229.19:09:59.49#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:09:59.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:09:59.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:09:59.49#ibcon#*before write, iclass 29, count 0 2006.229.19:09:59.49#ibcon#enter sib2, iclass 29, count 0 2006.229.19:09:59.49#ibcon#flushed, iclass 29, count 0 2006.229.19:09:59.49#ibcon#about to write, iclass 29, count 0 2006.229.19:09:59.49#ibcon#wrote, iclass 29, count 0 2006.229.19:09:59.49#ibcon#about to read 3, iclass 29, count 0 2006.229.19:09:59.53#ibcon#read 3, iclass 29, count 0 2006.229.19:09:59.53#ibcon#about to read 4, iclass 29, count 0 2006.229.19:09:59.53#ibcon#read 4, iclass 29, count 0 2006.229.19:09:59.53#ibcon#about to read 5, iclass 29, count 0 2006.229.19:09:59.53#ibcon#read 5, iclass 29, count 0 2006.229.19:09:59.53#ibcon#about to read 6, iclass 29, count 0 2006.229.19:09:59.53#ibcon#read 6, iclass 29, count 0 2006.229.19:09:59.53#ibcon#end of sib2, iclass 29, count 0 2006.229.19:09:59.53#ibcon#*after write, iclass 29, count 0 2006.229.19:09:59.53#ibcon#*before return 0, iclass 29, count 0 2006.229.19:09:59.53#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:59.53#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:09:59.53#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:09:59.53#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:09:59.53$vck44/vb=3,4 2006.229.19:09:59.53#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.19:09:59.53#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.19:09:59.53#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:59.53#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:59.59#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:59.59#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:59.59#ibcon#enter wrdev, iclass 31, count 2 2006.229.19:09:59.59#ibcon#first serial, iclass 31, count 2 2006.229.19:09:59.59#ibcon#enter sib2, iclass 31, count 2 2006.229.19:09:59.59#ibcon#flushed, iclass 31, count 2 2006.229.19:09:59.59#ibcon#about to write, iclass 31, count 2 2006.229.19:09:59.59#ibcon#wrote, iclass 31, count 2 2006.229.19:09:59.59#ibcon#about to read 3, iclass 31, count 2 2006.229.19:09:59.61#ibcon#read 3, iclass 31, count 2 2006.229.19:09:59.61#ibcon#about to read 4, iclass 31, count 2 2006.229.19:09:59.61#ibcon#read 4, iclass 31, count 2 2006.229.19:09:59.61#ibcon#about to read 5, iclass 31, count 2 2006.229.19:09:59.61#ibcon#read 5, iclass 31, count 2 2006.229.19:09:59.61#ibcon#about to read 6, iclass 31, count 2 2006.229.19:09:59.61#ibcon#read 6, iclass 31, count 2 2006.229.19:09:59.61#ibcon#end of sib2, iclass 31, count 2 2006.229.19:09:59.61#ibcon#*mode == 0, iclass 31, count 2 2006.229.19:09:59.61#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.19:09:59.61#ibcon#[27=AT03-04\r\n] 2006.229.19:09:59.61#ibcon#*before write, iclass 31, count 2 2006.229.19:09:59.61#ibcon#enter sib2, iclass 31, count 2 2006.229.19:09:59.61#ibcon#flushed, iclass 31, count 2 2006.229.19:09:59.61#ibcon#about to write, iclass 31, count 2 2006.229.19:09:59.61#ibcon#wrote, iclass 31, count 2 2006.229.19:09:59.61#ibcon#about to read 3, iclass 31, count 2 2006.229.19:09:59.64#ibcon#read 3, iclass 31, count 2 2006.229.19:09:59.64#ibcon#about to read 4, iclass 31, count 2 2006.229.19:09:59.64#ibcon#read 4, iclass 31, count 2 2006.229.19:09:59.64#ibcon#about to read 5, iclass 31, count 2 2006.229.19:09:59.64#ibcon#read 5, iclass 31, count 2 2006.229.19:09:59.64#ibcon#about to read 6, iclass 31, count 2 2006.229.19:09:59.64#ibcon#read 6, iclass 31, count 2 2006.229.19:09:59.64#ibcon#end of sib2, iclass 31, count 2 2006.229.19:09:59.64#ibcon#*after write, iclass 31, count 2 2006.229.19:09:59.64#ibcon#*before return 0, iclass 31, count 2 2006.229.19:09:59.64#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:59.64#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:09:59.64#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.19:09:59.64#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:59.64#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:59.76#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:59.76#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:59.76#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:09:59.76#ibcon#first serial, iclass 31, count 0 2006.229.19:09:59.76#ibcon#enter sib2, iclass 31, count 0 2006.229.19:09:59.76#ibcon#flushed, iclass 31, count 0 2006.229.19:09:59.76#ibcon#about to write, iclass 31, count 0 2006.229.19:09:59.76#ibcon#wrote, iclass 31, count 0 2006.229.19:09:59.76#ibcon#about to read 3, iclass 31, count 0 2006.229.19:09:59.78#ibcon#read 3, iclass 31, count 0 2006.229.19:09:59.78#ibcon#about to read 4, iclass 31, count 0 2006.229.19:09:59.78#ibcon#read 4, iclass 31, count 0 2006.229.19:09:59.78#ibcon#about to read 5, iclass 31, count 0 2006.229.19:09:59.78#ibcon#read 5, iclass 31, count 0 2006.229.19:09:59.78#ibcon#about to read 6, iclass 31, count 0 2006.229.19:09:59.78#ibcon#read 6, iclass 31, count 0 2006.229.19:09:59.78#ibcon#end of sib2, iclass 31, count 0 2006.229.19:09:59.78#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:09:59.78#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:09:59.78#ibcon#[27=USB\r\n] 2006.229.19:09:59.78#ibcon#*before write, iclass 31, count 0 2006.229.19:09:59.78#ibcon#enter sib2, iclass 31, count 0 2006.229.19:09:59.78#ibcon#flushed, iclass 31, count 0 2006.229.19:09:59.78#ibcon#about to write, iclass 31, count 0 2006.229.19:09:59.78#ibcon#wrote, iclass 31, count 0 2006.229.19:09:59.78#ibcon#about to read 3, iclass 31, count 0 2006.229.19:09:59.81#ibcon#read 3, iclass 31, count 0 2006.229.19:09:59.81#ibcon#about to read 4, iclass 31, count 0 2006.229.19:09:59.81#ibcon#read 4, iclass 31, count 0 2006.229.19:09:59.81#ibcon#about to read 5, iclass 31, count 0 2006.229.19:09:59.81#ibcon#read 5, iclass 31, count 0 2006.229.19:09:59.81#ibcon#about to read 6, iclass 31, count 0 2006.229.19:09:59.81#ibcon#read 6, iclass 31, count 0 2006.229.19:09:59.81#ibcon#end of sib2, iclass 31, count 0 2006.229.19:09:59.81#ibcon#*after write, iclass 31, count 0 2006.229.19:09:59.81#ibcon#*before return 0, iclass 31, count 0 2006.229.19:09:59.81#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:59.81#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:09:59.81#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:09:59.81#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:09:59.81$vck44/vblo=4,679.99 2006.229.19:09:59.81#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.19:09:59.81#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.19:09:59.81#ibcon#ireg 17 cls_cnt 0 2006.229.19:09:59.81#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:59.81#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:59.81#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:59.81#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:09:59.81#ibcon#first serial, iclass 33, count 0 2006.229.19:09:59.81#ibcon#enter sib2, iclass 33, count 0 2006.229.19:09:59.81#ibcon#flushed, iclass 33, count 0 2006.229.19:09:59.81#ibcon#about to write, iclass 33, count 0 2006.229.19:09:59.81#ibcon#wrote, iclass 33, count 0 2006.229.19:09:59.81#ibcon#about to read 3, iclass 33, count 0 2006.229.19:09:59.83#ibcon#read 3, iclass 33, count 0 2006.229.19:09:59.83#ibcon#about to read 4, iclass 33, count 0 2006.229.19:09:59.83#ibcon#read 4, iclass 33, count 0 2006.229.19:09:59.83#ibcon#about to read 5, iclass 33, count 0 2006.229.19:09:59.83#ibcon#read 5, iclass 33, count 0 2006.229.19:09:59.83#ibcon#about to read 6, iclass 33, count 0 2006.229.19:09:59.83#ibcon#read 6, iclass 33, count 0 2006.229.19:09:59.83#ibcon#end of sib2, iclass 33, count 0 2006.229.19:09:59.83#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:09:59.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:09:59.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:09:59.83#ibcon#*before write, iclass 33, count 0 2006.229.19:09:59.83#ibcon#enter sib2, iclass 33, count 0 2006.229.19:09:59.83#ibcon#flushed, iclass 33, count 0 2006.229.19:09:59.83#ibcon#about to write, iclass 33, count 0 2006.229.19:09:59.83#ibcon#wrote, iclass 33, count 0 2006.229.19:09:59.83#ibcon#about to read 3, iclass 33, count 0 2006.229.19:09:59.87#ibcon#read 3, iclass 33, count 0 2006.229.19:09:59.87#ibcon#about to read 4, iclass 33, count 0 2006.229.19:09:59.87#ibcon#read 4, iclass 33, count 0 2006.229.19:09:59.87#ibcon#about to read 5, iclass 33, count 0 2006.229.19:09:59.87#ibcon#read 5, iclass 33, count 0 2006.229.19:09:59.87#ibcon#about to read 6, iclass 33, count 0 2006.229.19:09:59.87#ibcon#read 6, iclass 33, count 0 2006.229.19:09:59.87#ibcon#end of sib2, iclass 33, count 0 2006.229.19:09:59.87#ibcon#*after write, iclass 33, count 0 2006.229.19:09:59.87#ibcon#*before return 0, iclass 33, count 0 2006.229.19:09:59.87#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:59.87#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:09:59.87#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:09:59.87#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:09:59.87$vck44/vb=4,4 2006.229.19:09:59.87#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.19:09:59.87#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.19:09:59.87#ibcon#ireg 11 cls_cnt 2 2006.229.19:09:59.87#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:59.93#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:59.93#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:59.93#ibcon#enter wrdev, iclass 35, count 2 2006.229.19:09:59.93#ibcon#first serial, iclass 35, count 2 2006.229.19:09:59.93#ibcon#enter sib2, iclass 35, count 2 2006.229.19:09:59.93#ibcon#flushed, iclass 35, count 2 2006.229.19:09:59.93#ibcon#about to write, iclass 35, count 2 2006.229.19:09:59.93#ibcon#wrote, iclass 35, count 2 2006.229.19:09:59.93#ibcon#about to read 3, iclass 35, count 2 2006.229.19:09:59.95#ibcon#read 3, iclass 35, count 2 2006.229.19:09:59.95#ibcon#about to read 4, iclass 35, count 2 2006.229.19:09:59.95#ibcon#read 4, iclass 35, count 2 2006.229.19:09:59.95#ibcon#about to read 5, iclass 35, count 2 2006.229.19:09:59.95#ibcon#read 5, iclass 35, count 2 2006.229.19:09:59.95#ibcon#about to read 6, iclass 35, count 2 2006.229.19:09:59.95#ibcon#read 6, iclass 35, count 2 2006.229.19:09:59.95#ibcon#end of sib2, iclass 35, count 2 2006.229.19:09:59.95#ibcon#*mode == 0, iclass 35, count 2 2006.229.19:09:59.95#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.19:09:59.95#ibcon#[27=AT04-04\r\n] 2006.229.19:09:59.95#ibcon#*before write, iclass 35, count 2 2006.229.19:09:59.95#ibcon#enter sib2, iclass 35, count 2 2006.229.19:09:59.95#ibcon#flushed, iclass 35, count 2 2006.229.19:09:59.95#ibcon#about to write, iclass 35, count 2 2006.229.19:09:59.95#ibcon#wrote, iclass 35, count 2 2006.229.19:09:59.95#ibcon#about to read 3, iclass 35, count 2 2006.229.19:09:59.98#ibcon#read 3, iclass 35, count 2 2006.229.19:09:59.98#ibcon#about to read 4, iclass 35, count 2 2006.229.19:09:59.98#ibcon#read 4, iclass 35, count 2 2006.229.19:09:59.98#ibcon#about to read 5, iclass 35, count 2 2006.229.19:09:59.98#ibcon#read 5, iclass 35, count 2 2006.229.19:09:59.98#ibcon#about to read 6, iclass 35, count 2 2006.229.19:09:59.98#ibcon#read 6, iclass 35, count 2 2006.229.19:09:59.98#ibcon#end of sib2, iclass 35, count 2 2006.229.19:09:59.98#ibcon#*after write, iclass 35, count 2 2006.229.19:09:59.98#ibcon#*before return 0, iclass 35, count 2 2006.229.19:09:59.98#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:59.98#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:09:59.98#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.19:09:59.98#ibcon#ireg 7 cls_cnt 0 2006.229.19:09:59.98#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:10:00.10#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:10:00.10#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:10:00.10#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:10:00.10#ibcon#first serial, iclass 35, count 0 2006.229.19:10:00.10#ibcon#enter sib2, iclass 35, count 0 2006.229.19:10:00.10#ibcon#flushed, iclass 35, count 0 2006.229.19:10:00.10#ibcon#about to write, iclass 35, count 0 2006.229.19:10:00.10#ibcon#wrote, iclass 35, count 0 2006.229.19:10:00.10#ibcon#about to read 3, iclass 35, count 0 2006.229.19:10:00.12#ibcon#read 3, iclass 35, count 0 2006.229.19:10:00.12#ibcon#about to read 4, iclass 35, count 0 2006.229.19:10:00.12#ibcon#read 4, iclass 35, count 0 2006.229.19:10:00.12#ibcon#about to read 5, iclass 35, count 0 2006.229.19:10:00.12#ibcon#read 5, iclass 35, count 0 2006.229.19:10:00.12#ibcon#about to read 6, iclass 35, count 0 2006.229.19:10:00.12#ibcon#read 6, iclass 35, count 0 2006.229.19:10:00.12#ibcon#end of sib2, iclass 35, count 0 2006.229.19:10:00.12#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:10:00.12#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:10:00.12#ibcon#[27=USB\r\n] 2006.229.19:10:00.12#ibcon#*before write, iclass 35, count 0 2006.229.19:10:00.12#ibcon#enter sib2, iclass 35, count 0 2006.229.19:10:00.12#ibcon#flushed, iclass 35, count 0 2006.229.19:10:00.12#ibcon#about to write, iclass 35, count 0 2006.229.19:10:00.12#ibcon#wrote, iclass 35, count 0 2006.229.19:10:00.12#ibcon#about to read 3, iclass 35, count 0 2006.229.19:10:00.15#ibcon#read 3, iclass 35, count 0 2006.229.19:10:00.15#ibcon#about to read 4, iclass 35, count 0 2006.229.19:10:00.15#ibcon#read 4, iclass 35, count 0 2006.229.19:10:00.15#ibcon#about to read 5, iclass 35, count 0 2006.229.19:10:00.15#ibcon#read 5, iclass 35, count 0 2006.229.19:10:00.15#ibcon#about to read 6, iclass 35, count 0 2006.229.19:10:00.15#ibcon#read 6, iclass 35, count 0 2006.229.19:10:00.15#ibcon#end of sib2, iclass 35, count 0 2006.229.19:10:00.15#ibcon#*after write, iclass 35, count 0 2006.229.19:10:00.15#ibcon#*before return 0, iclass 35, count 0 2006.229.19:10:00.15#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:10:00.15#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:10:00.15#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:10:00.15#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:10:00.15$vck44/vblo=5,709.99 2006.229.19:10:00.15#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.19:10:00.15#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.19:10:00.15#ibcon#ireg 17 cls_cnt 0 2006.229.19:10:00.15#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:10:00.15#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:10:00.15#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:10:00.15#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:10:00.15#ibcon#first serial, iclass 37, count 0 2006.229.19:10:00.15#ibcon#enter sib2, iclass 37, count 0 2006.229.19:10:00.15#ibcon#flushed, iclass 37, count 0 2006.229.19:10:00.15#ibcon#about to write, iclass 37, count 0 2006.229.19:10:00.15#ibcon#wrote, iclass 37, count 0 2006.229.19:10:00.15#ibcon#about to read 3, iclass 37, count 0 2006.229.19:10:00.17#ibcon#read 3, iclass 37, count 0 2006.229.19:10:00.17#ibcon#about to read 4, iclass 37, count 0 2006.229.19:10:00.17#ibcon#read 4, iclass 37, count 0 2006.229.19:10:00.17#ibcon#about to read 5, iclass 37, count 0 2006.229.19:10:00.17#ibcon#read 5, iclass 37, count 0 2006.229.19:10:00.17#ibcon#about to read 6, iclass 37, count 0 2006.229.19:10:00.17#ibcon#read 6, iclass 37, count 0 2006.229.19:10:00.17#ibcon#end of sib2, iclass 37, count 0 2006.229.19:10:00.17#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:10:00.17#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:10:00.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:10:00.17#ibcon#*before write, iclass 37, count 0 2006.229.19:10:00.17#ibcon#enter sib2, iclass 37, count 0 2006.229.19:10:00.17#ibcon#flushed, iclass 37, count 0 2006.229.19:10:00.17#ibcon#about to write, iclass 37, count 0 2006.229.19:10:00.17#ibcon#wrote, iclass 37, count 0 2006.229.19:10:00.17#ibcon#about to read 3, iclass 37, count 0 2006.229.19:10:00.21#ibcon#read 3, iclass 37, count 0 2006.229.19:10:00.21#ibcon#about to read 4, iclass 37, count 0 2006.229.19:10:00.21#ibcon#read 4, iclass 37, count 0 2006.229.19:10:00.21#ibcon#about to read 5, iclass 37, count 0 2006.229.19:10:00.21#ibcon#read 5, iclass 37, count 0 2006.229.19:10:00.21#ibcon#about to read 6, iclass 37, count 0 2006.229.19:10:00.21#ibcon#read 6, iclass 37, count 0 2006.229.19:10:00.21#ibcon#end of sib2, iclass 37, count 0 2006.229.19:10:00.21#ibcon#*after write, iclass 37, count 0 2006.229.19:10:00.21#ibcon#*before return 0, iclass 37, count 0 2006.229.19:10:00.21#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:10:00.21#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:10:00.21#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:10:00.21#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:10:00.21$vck44/vb=5,4 2006.229.19:10:00.21#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.19:10:00.21#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.19:10:00.21#ibcon#ireg 11 cls_cnt 2 2006.229.19:10:00.21#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:10:00.27#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:10:00.27#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:10:00.27#ibcon#enter wrdev, iclass 39, count 2 2006.229.19:10:00.27#ibcon#first serial, iclass 39, count 2 2006.229.19:10:00.27#ibcon#enter sib2, iclass 39, count 2 2006.229.19:10:00.27#ibcon#flushed, iclass 39, count 2 2006.229.19:10:00.27#ibcon#about to write, iclass 39, count 2 2006.229.19:10:00.27#ibcon#wrote, iclass 39, count 2 2006.229.19:10:00.27#ibcon#about to read 3, iclass 39, count 2 2006.229.19:10:00.29#ibcon#read 3, iclass 39, count 2 2006.229.19:10:00.29#ibcon#about to read 4, iclass 39, count 2 2006.229.19:10:00.29#ibcon#read 4, iclass 39, count 2 2006.229.19:10:00.29#ibcon#about to read 5, iclass 39, count 2 2006.229.19:10:00.29#ibcon#read 5, iclass 39, count 2 2006.229.19:10:00.29#ibcon#about to read 6, iclass 39, count 2 2006.229.19:10:00.29#ibcon#read 6, iclass 39, count 2 2006.229.19:10:00.29#ibcon#end of sib2, iclass 39, count 2 2006.229.19:10:00.29#ibcon#*mode == 0, iclass 39, count 2 2006.229.19:10:00.29#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.19:10:00.29#ibcon#[27=AT05-04\r\n] 2006.229.19:10:00.29#ibcon#*before write, iclass 39, count 2 2006.229.19:10:00.29#ibcon#enter sib2, iclass 39, count 2 2006.229.19:10:00.29#ibcon#flushed, iclass 39, count 2 2006.229.19:10:00.29#ibcon#about to write, iclass 39, count 2 2006.229.19:10:00.29#ibcon#wrote, iclass 39, count 2 2006.229.19:10:00.29#ibcon#about to read 3, iclass 39, count 2 2006.229.19:10:00.32#ibcon#read 3, iclass 39, count 2 2006.229.19:10:00.32#ibcon#about to read 4, iclass 39, count 2 2006.229.19:10:00.32#ibcon#read 4, iclass 39, count 2 2006.229.19:10:00.32#ibcon#about to read 5, iclass 39, count 2 2006.229.19:10:00.32#ibcon#read 5, iclass 39, count 2 2006.229.19:10:00.32#ibcon#about to read 6, iclass 39, count 2 2006.229.19:10:00.32#ibcon#read 6, iclass 39, count 2 2006.229.19:10:00.32#ibcon#end of sib2, iclass 39, count 2 2006.229.19:10:00.32#ibcon#*after write, iclass 39, count 2 2006.229.19:10:00.32#ibcon#*before return 0, iclass 39, count 2 2006.229.19:10:00.32#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:10:00.32#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:10:00.32#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.19:10:00.32#ibcon#ireg 7 cls_cnt 0 2006.229.19:10:00.32#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:10:00.44#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:10:00.44#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:10:00.44#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:10:00.44#ibcon#first serial, iclass 39, count 0 2006.229.19:10:00.44#ibcon#enter sib2, iclass 39, count 0 2006.229.19:10:00.44#ibcon#flushed, iclass 39, count 0 2006.229.19:10:00.44#ibcon#about to write, iclass 39, count 0 2006.229.19:10:00.44#ibcon#wrote, iclass 39, count 0 2006.229.19:10:00.44#ibcon#about to read 3, iclass 39, count 0 2006.229.19:10:00.46#ibcon#read 3, iclass 39, count 0 2006.229.19:10:00.46#ibcon#about to read 4, iclass 39, count 0 2006.229.19:10:00.46#ibcon#read 4, iclass 39, count 0 2006.229.19:10:00.46#ibcon#about to read 5, iclass 39, count 0 2006.229.19:10:00.46#ibcon#read 5, iclass 39, count 0 2006.229.19:10:00.46#ibcon#about to read 6, iclass 39, count 0 2006.229.19:10:00.46#ibcon#read 6, iclass 39, count 0 2006.229.19:10:00.46#ibcon#end of sib2, iclass 39, count 0 2006.229.19:10:00.46#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:10:00.46#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:10:00.46#ibcon#[27=USB\r\n] 2006.229.19:10:00.46#ibcon#*before write, iclass 39, count 0 2006.229.19:10:00.46#ibcon#enter sib2, iclass 39, count 0 2006.229.19:10:00.46#ibcon#flushed, iclass 39, count 0 2006.229.19:10:00.46#ibcon#about to write, iclass 39, count 0 2006.229.19:10:00.46#ibcon#wrote, iclass 39, count 0 2006.229.19:10:00.46#ibcon#about to read 3, iclass 39, count 0 2006.229.19:10:00.49#ibcon#read 3, iclass 39, count 0 2006.229.19:10:00.49#ibcon#about to read 4, iclass 39, count 0 2006.229.19:10:00.49#ibcon#read 4, iclass 39, count 0 2006.229.19:10:00.49#ibcon#about to read 5, iclass 39, count 0 2006.229.19:10:00.49#ibcon#read 5, iclass 39, count 0 2006.229.19:10:00.49#ibcon#about to read 6, iclass 39, count 0 2006.229.19:10:00.49#ibcon#read 6, iclass 39, count 0 2006.229.19:10:00.49#ibcon#end of sib2, iclass 39, count 0 2006.229.19:10:00.49#ibcon#*after write, iclass 39, count 0 2006.229.19:10:00.49#ibcon#*before return 0, iclass 39, count 0 2006.229.19:10:00.49#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:10:00.49#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:10:00.49#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:10:00.49#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:10:00.49$vck44/vblo=6,719.99 2006.229.19:10:00.49#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.19:10:00.49#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.19:10:00.49#ibcon#ireg 17 cls_cnt 0 2006.229.19:10:00.49#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:10:00.49#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:10:00.49#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:10:00.49#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:10:00.49#ibcon#first serial, iclass 3, count 0 2006.229.19:10:00.49#ibcon#enter sib2, iclass 3, count 0 2006.229.19:10:00.49#ibcon#flushed, iclass 3, count 0 2006.229.19:10:00.49#ibcon#about to write, iclass 3, count 0 2006.229.19:10:00.49#ibcon#wrote, iclass 3, count 0 2006.229.19:10:00.49#ibcon#about to read 3, iclass 3, count 0 2006.229.19:10:00.51#ibcon#read 3, iclass 3, count 0 2006.229.19:10:00.51#ibcon#about to read 4, iclass 3, count 0 2006.229.19:10:00.51#ibcon#read 4, iclass 3, count 0 2006.229.19:10:00.51#ibcon#about to read 5, iclass 3, count 0 2006.229.19:10:00.51#ibcon#read 5, iclass 3, count 0 2006.229.19:10:00.51#ibcon#about to read 6, iclass 3, count 0 2006.229.19:10:00.51#ibcon#read 6, iclass 3, count 0 2006.229.19:10:00.51#ibcon#end of sib2, iclass 3, count 0 2006.229.19:10:00.51#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:10:00.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:10:00.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:10:00.51#ibcon#*before write, iclass 3, count 0 2006.229.19:10:00.51#ibcon#enter sib2, iclass 3, count 0 2006.229.19:10:00.51#ibcon#flushed, iclass 3, count 0 2006.229.19:10:00.51#ibcon#about to write, iclass 3, count 0 2006.229.19:10:00.51#ibcon#wrote, iclass 3, count 0 2006.229.19:10:00.51#ibcon#about to read 3, iclass 3, count 0 2006.229.19:10:00.55#ibcon#read 3, iclass 3, count 0 2006.229.19:10:00.55#ibcon#about to read 4, iclass 3, count 0 2006.229.19:10:00.55#ibcon#read 4, iclass 3, count 0 2006.229.19:10:00.55#ibcon#about to read 5, iclass 3, count 0 2006.229.19:10:00.55#ibcon#read 5, iclass 3, count 0 2006.229.19:10:00.55#ibcon#about to read 6, iclass 3, count 0 2006.229.19:10:00.55#ibcon#read 6, iclass 3, count 0 2006.229.19:10:00.55#ibcon#end of sib2, iclass 3, count 0 2006.229.19:10:00.55#ibcon#*after write, iclass 3, count 0 2006.229.19:10:00.55#ibcon#*before return 0, iclass 3, count 0 2006.229.19:10:00.55#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:10:00.55#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:10:00.55#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:10:00.55#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:10:00.55$vck44/vb=6,4 2006.229.19:10:00.55#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.19:10:00.55#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.19:10:00.55#ibcon#ireg 11 cls_cnt 2 2006.229.19:10:00.55#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:10:00.61#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:10:00.61#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:10:00.61#ibcon#enter wrdev, iclass 5, count 2 2006.229.19:10:00.61#ibcon#first serial, iclass 5, count 2 2006.229.19:10:00.61#ibcon#enter sib2, iclass 5, count 2 2006.229.19:10:00.61#ibcon#flushed, iclass 5, count 2 2006.229.19:10:00.61#ibcon#about to write, iclass 5, count 2 2006.229.19:10:00.61#ibcon#wrote, iclass 5, count 2 2006.229.19:10:00.61#ibcon#about to read 3, iclass 5, count 2 2006.229.19:10:00.63#ibcon#read 3, iclass 5, count 2 2006.229.19:10:00.63#ibcon#about to read 4, iclass 5, count 2 2006.229.19:10:00.63#ibcon#read 4, iclass 5, count 2 2006.229.19:10:00.63#ibcon#about to read 5, iclass 5, count 2 2006.229.19:10:00.63#ibcon#read 5, iclass 5, count 2 2006.229.19:10:00.63#ibcon#about to read 6, iclass 5, count 2 2006.229.19:10:00.63#ibcon#read 6, iclass 5, count 2 2006.229.19:10:00.63#ibcon#end of sib2, iclass 5, count 2 2006.229.19:10:00.63#ibcon#*mode == 0, iclass 5, count 2 2006.229.19:10:00.63#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.19:10:00.63#ibcon#[27=AT06-04\r\n] 2006.229.19:10:00.63#ibcon#*before write, iclass 5, count 2 2006.229.19:10:00.63#ibcon#enter sib2, iclass 5, count 2 2006.229.19:10:00.63#ibcon#flushed, iclass 5, count 2 2006.229.19:10:00.63#ibcon#about to write, iclass 5, count 2 2006.229.19:10:00.63#ibcon#wrote, iclass 5, count 2 2006.229.19:10:00.63#ibcon#about to read 3, iclass 5, count 2 2006.229.19:10:00.66#ibcon#read 3, iclass 5, count 2 2006.229.19:10:00.66#ibcon#about to read 4, iclass 5, count 2 2006.229.19:10:00.66#ibcon#read 4, iclass 5, count 2 2006.229.19:10:00.66#ibcon#about to read 5, iclass 5, count 2 2006.229.19:10:00.66#ibcon#read 5, iclass 5, count 2 2006.229.19:10:00.66#ibcon#about to read 6, iclass 5, count 2 2006.229.19:10:00.66#ibcon#read 6, iclass 5, count 2 2006.229.19:10:00.66#ibcon#end of sib2, iclass 5, count 2 2006.229.19:10:00.66#ibcon#*after write, iclass 5, count 2 2006.229.19:10:00.66#ibcon#*before return 0, iclass 5, count 2 2006.229.19:10:00.66#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:10:00.66#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:10:00.66#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.19:10:00.66#ibcon#ireg 7 cls_cnt 0 2006.229.19:10:00.66#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:10:00.78#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:10:00.78#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:10:00.78#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:10:00.78#ibcon#first serial, iclass 5, count 0 2006.229.19:10:00.78#ibcon#enter sib2, iclass 5, count 0 2006.229.19:10:00.78#ibcon#flushed, iclass 5, count 0 2006.229.19:10:00.78#ibcon#about to write, iclass 5, count 0 2006.229.19:10:00.78#ibcon#wrote, iclass 5, count 0 2006.229.19:10:00.78#ibcon#about to read 3, iclass 5, count 0 2006.229.19:10:00.80#ibcon#read 3, iclass 5, count 0 2006.229.19:10:00.80#ibcon#about to read 4, iclass 5, count 0 2006.229.19:10:00.80#ibcon#read 4, iclass 5, count 0 2006.229.19:10:00.80#ibcon#about to read 5, iclass 5, count 0 2006.229.19:10:00.80#ibcon#read 5, iclass 5, count 0 2006.229.19:10:00.80#ibcon#about to read 6, iclass 5, count 0 2006.229.19:10:00.80#ibcon#read 6, iclass 5, count 0 2006.229.19:10:00.80#ibcon#end of sib2, iclass 5, count 0 2006.229.19:10:00.80#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:10:00.80#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:10:00.80#ibcon#[27=USB\r\n] 2006.229.19:10:00.80#ibcon#*before write, iclass 5, count 0 2006.229.19:10:00.80#ibcon#enter sib2, iclass 5, count 0 2006.229.19:10:00.80#ibcon#flushed, iclass 5, count 0 2006.229.19:10:00.80#ibcon#about to write, iclass 5, count 0 2006.229.19:10:00.80#ibcon#wrote, iclass 5, count 0 2006.229.19:10:00.80#ibcon#about to read 3, iclass 5, count 0 2006.229.19:10:00.83#ibcon#read 3, iclass 5, count 0 2006.229.19:10:00.83#ibcon#about to read 4, iclass 5, count 0 2006.229.19:10:00.83#ibcon#read 4, iclass 5, count 0 2006.229.19:10:00.83#ibcon#about to read 5, iclass 5, count 0 2006.229.19:10:00.83#ibcon#read 5, iclass 5, count 0 2006.229.19:10:00.83#ibcon#about to read 6, iclass 5, count 0 2006.229.19:10:00.83#ibcon#read 6, iclass 5, count 0 2006.229.19:10:00.83#ibcon#end of sib2, iclass 5, count 0 2006.229.19:10:00.83#ibcon#*after write, iclass 5, count 0 2006.229.19:10:00.83#ibcon#*before return 0, iclass 5, count 0 2006.229.19:10:00.83#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:10:00.83#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:10:00.83#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:10:00.83#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:10:00.83$vck44/vblo=7,734.99 2006.229.19:10:00.83#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.19:10:00.83#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.19:10:00.83#ibcon#ireg 17 cls_cnt 0 2006.229.19:10:00.83#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:10:00.83#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:10:00.83#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:10:00.83#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:10:00.83#ibcon#first serial, iclass 7, count 0 2006.229.19:10:00.83#ibcon#enter sib2, iclass 7, count 0 2006.229.19:10:00.83#ibcon#flushed, iclass 7, count 0 2006.229.19:10:00.83#ibcon#about to write, iclass 7, count 0 2006.229.19:10:00.83#ibcon#wrote, iclass 7, count 0 2006.229.19:10:00.83#ibcon#about to read 3, iclass 7, count 0 2006.229.19:10:00.85#ibcon#read 3, iclass 7, count 0 2006.229.19:10:00.85#ibcon#about to read 4, iclass 7, count 0 2006.229.19:10:00.85#ibcon#read 4, iclass 7, count 0 2006.229.19:10:00.85#ibcon#about to read 5, iclass 7, count 0 2006.229.19:10:00.85#ibcon#read 5, iclass 7, count 0 2006.229.19:10:00.85#ibcon#about to read 6, iclass 7, count 0 2006.229.19:10:00.85#ibcon#read 6, iclass 7, count 0 2006.229.19:10:00.85#ibcon#end of sib2, iclass 7, count 0 2006.229.19:10:00.85#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:10:00.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:10:00.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:10:00.85#ibcon#*before write, iclass 7, count 0 2006.229.19:10:00.85#ibcon#enter sib2, iclass 7, count 0 2006.229.19:10:00.85#ibcon#flushed, iclass 7, count 0 2006.229.19:10:00.85#ibcon#about to write, iclass 7, count 0 2006.229.19:10:00.85#ibcon#wrote, iclass 7, count 0 2006.229.19:10:00.85#ibcon#about to read 3, iclass 7, count 0 2006.229.19:10:00.89#ibcon#read 3, iclass 7, count 0 2006.229.19:10:00.89#ibcon#about to read 4, iclass 7, count 0 2006.229.19:10:00.89#ibcon#read 4, iclass 7, count 0 2006.229.19:10:00.89#ibcon#about to read 5, iclass 7, count 0 2006.229.19:10:00.89#ibcon#read 5, iclass 7, count 0 2006.229.19:10:00.89#ibcon#about to read 6, iclass 7, count 0 2006.229.19:10:00.89#ibcon#read 6, iclass 7, count 0 2006.229.19:10:00.89#ibcon#end of sib2, iclass 7, count 0 2006.229.19:10:00.89#ibcon#*after write, iclass 7, count 0 2006.229.19:10:00.89#ibcon#*before return 0, iclass 7, count 0 2006.229.19:10:00.89#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:10:00.89#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:10:00.89#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:10:00.89#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:10:00.89$vck44/vb=7,4 2006.229.19:10:00.89#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.19:10:00.89#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.19:10:00.89#ibcon#ireg 11 cls_cnt 2 2006.229.19:10:00.89#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:10:00.95#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:10:00.95#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:10:00.95#ibcon#enter wrdev, iclass 11, count 2 2006.229.19:10:00.95#ibcon#first serial, iclass 11, count 2 2006.229.19:10:00.95#ibcon#enter sib2, iclass 11, count 2 2006.229.19:10:00.95#ibcon#flushed, iclass 11, count 2 2006.229.19:10:00.95#ibcon#about to write, iclass 11, count 2 2006.229.19:10:00.95#ibcon#wrote, iclass 11, count 2 2006.229.19:10:00.95#ibcon#about to read 3, iclass 11, count 2 2006.229.19:10:00.97#ibcon#read 3, iclass 11, count 2 2006.229.19:10:00.97#ibcon#about to read 4, iclass 11, count 2 2006.229.19:10:00.97#ibcon#read 4, iclass 11, count 2 2006.229.19:10:00.97#ibcon#about to read 5, iclass 11, count 2 2006.229.19:10:00.97#ibcon#read 5, iclass 11, count 2 2006.229.19:10:00.97#ibcon#about to read 6, iclass 11, count 2 2006.229.19:10:00.97#ibcon#read 6, iclass 11, count 2 2006.229.19:10:00.97#ibcon#end of sib2, iclass 11, count 2 2006.229.19:10:00.97#ibcon#*mode == 0, iclass 11, count 2 2006.229.19:10:00.97#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.19:10:00.97#ibcon#[27=AT07-04\r\n] 2006.229.19:10:00.97#ibcon#*before write, iclass 11, count 2 2006.229.19:10:00.97#ibcon#enter sib2, iclass 11, count 2 2006.229.19:10:00.97#ibcon#flushed, iclass 11, count 2 2006.229.19:10:00.97#ibcon#about to write, iclass 11, count 2 2006.229.19:10:00.97#ibcon#wrote, iclass 11, count 2 2006.229.19:10:00.97#ibcon#about to read 3, iclass 11, count 2 2006.229.19:10:01.00#ibcon#read 3, iclass 11, count 2 2006.229.19:10:01.00#ibcon#about to read 4, iclass 11, count 2 2006.229.19:10:01.00#ibcon#read 4, iclass 11, count 2 2006.229.19:10:01.00#ibcon#about to read 5, iclass 11, count 2 2006.229.19:10:01.00#ibcon#read 5, iclass 11, count 2 2006.229.19:10:01.00#ibcon#about to read 6, iclass 11, count 2 2006.229.19:10:01.00#ibcon#read 6, iclass 11, count 2 2006.229.19:10:01.00#ibcon#end of sib2, iclass 11, count 2 2006.229.19:10:01.00#ibcon#*after write, iclass 11, count 2 2006.229.19:10:01.00#ibcon#*before return 0, iclass 11, count 2 2006.229.19:10:01.00#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:10:01.00#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:10:01.00#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.19:10:01.00#ibcon#ireg 7 cls_cnt 0 2006.229.19:10:01.00#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:10:01.12#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:10:01.12#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:10:01.12#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:10:01.12#ibcon#first serial, iclass 11, count 0 2006.229.19:10:01.12#ibcon#enter sib2, iclass 11, count 0 2006.229.19:10:01.12#ibcon#flushed, iclass 11, count 0 2006.229.19:10:01.12#ibcon#about to write, iclass 11, count 0 2006.229.19:10:01.12#ibcon#wrote, iclass 11, count 0 2006.229.19:10:01.12#ibcon#about to read 3, iclass 11, count 0 2006.229.19:10:01.14#ibcon#read 3, iclass 11, count 0 2006.229.19:10:01.14#ibcon#about to read 4, iclass 11, count 0 2006.229.19:10:01.14#ibcon#read 4, iclass 11, count 0 2006.229.19:10:01.14#ibcon#about to read 5, iclass 11, count 0 2006.229.19:10:01.14#ibcon#read 5, iclass 11, count 0 2006.229.19:10:01.14#ibcon#about to read 6, iclass 11, count 0 2006.229.19:10:01.14#ibcon#read 6, iclass 11, count 0 2006.229.19:10:01.14#ibcon#end of sib2, iclass 11, count 0 2006.229.19:10:01.14#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:10:01.14#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:10:01.14#ibcon#[27=USB\r\n] 2006.229.19:10:01.14#ibcon#*before write, iclass 11, count 0 2006.229.19:10:01.14#ibcon#enter sib2, iclass 11, count 0 2006.229.19:10:01.14#ibcon#flushed, iclass 11, count 0 2006.229.19:10:01.14#ibcon#about to write, iclass 11, count 0 2006.229.19:10:01.14#ibcon#wrote, iclass 11, count 0 2006.229.19:10:01.14#ibcon#about to read 3, iclass 11, count 0 2006.229.19:10:01.17#ibcon#read 3, iclass 11, count 0 2006.229.19:10:01.17#ibcon#about to read 4, iclass 11, count 0 2006.229.19:10:01.17#ibcon#read 4, iclass 11, count 0 2006.229.19:10:01.17#ibcon#about to read 5, iclass 11, count 0 2006.229.19:10:01.17#ibcon#read 5, iclass 11, count 0 2006.229.19:10:01.17#ibcon#about to read 6, iclass 11, count 0 2006.229.19:10:01.17#ibcon#read 6, iclass 11, count 0 2006.229.19:10:01.17#ibcon#end of sib2, iclass 11, count 0 2006.229.19:10:01.17#ibcon#*after write, iclass 11, count 0 2006.229.19:10:01.17#ibcon#*before return 0, iclass 11, count 0 2006.229.19:10:01.17#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:10:01.17#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:10:01.17#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:10:01.17#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:10:01.17$vck44/vblo=8,744.99 2006.229.19:10:01.17#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.19:10:01.17#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.19:10:01.17#ibcon#ireg 17 cls_cnt 0 2006.229.19:10:01.17#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:10:01.17#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:10:01.17#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:10:01.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:10:01.17#ibcon#first serial, iclass 13, count 0 2006.229.19:10:01.17#ibcon#enter sib2, iclass 13, count 0 2006.229.19:10:01.17#ibcon#flushed, iclass 13, count 0 2006.229.19:10:01.17#ibcon#about to write, iclass 13, count 0 2006.229.19:10:01.17#ibcon#wrote, iclass 13, count 0 2006.229.19:10:01.17#ibcon#about to read 3, iclass 13, count 0 2006.229.19:10:01.19#ibcon#read 3, iclass 13, count 0 2006.229.19:10:01.19#ibcon#about to read 4, iclass 13, count 0 2006.229.19:10:01.19#ibcon#read 4, iclass 13, count 0 2006.229.19:10:01.19#ibcon#about to read 5, iclass 13, count 0 2006.229.19:10:01.19#ibcon#read 5, iclass 13, count 0 2006.229.19:10:01.19#ibcon#about to read 6, iclass 13, count 0 2006.229.19:10:01.19#ibcon#read 6, iclass 13, count 0 2006.229.19:10:01.19#ibcon#end of sib2, iclass 13, count 0 2006.229.19:10:01.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:10:01.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:10:01.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:10:01.19#ibcon#*before write, iclass 13, count 0 2006.229.19:10:01.19#ibcon#enter sib2, iclass 13, count 0 2006.229.19:10:01.19#ibcon#flushed, iclass 13, count 0 2006.229.19:10:01.19#ibcon#about to write, iclass 13, count 0 2006.229.19:10:01.19#ibcon#wrote, iclass 13, count 0 2006.229.19:10:01.19#ibcon#about to read 3, iclass 13, count 0 2006.229.19:10:01.23#ibcon#read 3, iclass 13, count 0 2006.229.19:10:01.23#ibcon#about to read 4, iclass 13, count 0 2006.229.19:10:01.23#ibcon#read 4, iclass 13, count 0 2006.229.19:10:01.23#ibcon#about to read 5, iclass 13, count 0 2006.229.19:10:01.23#ibcon#read 5, iclass 13, count 0 2006.229.19:10:01.23#ibcon#about to read 6, iclass 13, count 0 2006.229.19:10:01.23#ibcon#read 6, iclass 13, count 0 2006.229.19:10:01.23#ibcon#end of sib2, iclass 13, count 0 2006.229.19:10:01.23#ibcon#*after write, iclass 13, count 0 2006.229.19:10:01.23#ibcon#*before return 0, iclass 13, count 0 2006.229.19:10:01.23#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:10:01.23#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:10:01.23#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:10:01.23#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:10:01.23$vck44/vb=8,4 2006.229.19:10:01.23#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.19:10:01.23#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.19:10:01.23#ibcon#ireg 11 cls_cnt 2 2006.229.19:10:01.23#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:10:01.29#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:10:01.29#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:10:01.29#ibcon#enter wrdev, iclass 15, count 2 2006.229.19:10:01.29#ibcon#first serial, iclass 15, count 2 2006.229.19:10:01.29#ibcon#enter sib2, iclass 15, count 2 2006.229.19:10:01.29#ibcon#flushed, iclass 15, count 2 2006.229.19:10:01.29#ibcon#about to write, iclass 15, count 2 2006.229.19:10:01.29#ibcon#wrote, iclass 15, count 2 2006.229.19:10:01.29#ibcon#about to read 3, iclass 15, count 2 2006.229.19:10:01.31#ibcon#read 3, iclass 15, count 2 2006.229.19:10:01.31#ibcon#about to read 4, iclass 15, count 2 2006.229.19:10:01.31#ibcon#read 4, iclass 15, count 2 2006.229.19:10:01.31#ibcon#about to read 5, iclass 15, count 2 2006.229.19:10:01.31#ibcon#read 5, iclass 15, count 2 2006.229.19:10:01.31#ibcon#about to read 6, iclass 15, count 2 2006.229.19:10:01.31#ibcon#read 6, iclass 15, count 2 2006.229.19:10:01.31#ibcon#end of sib2, iclass 15, count 2 2006.229.19:10:01.31#ibcon#*mode == 0, iclass 15, count 2 2006.229.19:10:01.31#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.19:10:01.31#ibcon#[27=AT08-04\r\n] 2006.229.19:10:01.31#ibcon#*before write, iclass 15, count 2 2006.229.19:10:01.31#ibcon#enter sib2, iclass 15, count 2 2006.229.19:10:01.31#ibcon#flushed, iclass 15, count 2 2006.229.19:10:01.31#ibcon#about to write, iclass 15, count 2 2006.229.19:10:01.31#ibcon#wrote, iclass 15, count 2 2006.229.19:10:01.31#ibcon#about to read 3, iclass 15, count 2 2006.229.19:10:01.34#ibcon#read 3, iclass 15, count 2 2006.229.19:10:01.34#ibcon#about to read 4, iclass 15, count 2 2006.229.19:10:01.34#ibcon#read 4, iclass 15, count 2 2006.229.19:10:01.34#ibcon#about to read 5, iclass 15, count 2 2006.229.19:10:01.34#ibcon#read 5, iclass 15, count 2 2006.229.19:10:01.34#ibcon#about to read 6, iclass 15, count 2 2006.229.19:10:01.34#ibcon#read 6, iclass 15, count 2 2006.229.19:10:01.34#ibcon#end of sib2, iclass 15, count 2 2006.229.19:10:01.34#ibcon#*after write, iclass 15, count 2 2006.229.19:10:01.34#ibcon#*before return 0, iclass 15, count 2 2006.229.19:10:01.34#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:10:01.34#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:10:01.34#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.19:10:01.34#ibcon#ireg 7 cls_cnt 0 2006.229.19:10:01.34#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:10:01.46#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:10:01.46#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:10:01.46#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:10:01.46#ibcon#first serial, iclass 15, count 0 2006.229.19:10:01.46#ibcon#enter sib2, iclass 15, count 0 2006.229.19:10:01.46#ibcon#flushed, iclass 15, count 0 2006.229.19:10:01.46#ibcon#about to write, iclass 15, count 0 2006.229.19:10:01.46#ibcon#wrote, iclass 15, count 0 2006.229.19:10:01.46#ibcon#about to read 3, iclass 15, count 0 2006.229.19:10:01.48#ibcon#read 3, iclass 15, count 0 2006.229.19:10:01.48#ibcon#about to read 4, iclass 15, count 0 2006.229.19:10:01.48#ibcon#read 4, iclass 15, count 0 2006.229.19:10:01.48#ibcon#about to read 5, iclass 15, count 0 2006.229.19:10:01.48#ibcon#read 5, iclass 15, count 0 2006.229.19:10:01.48#ibcon#about to read 6, iclass 15, count 0 2006.229.19:10:01.48#ibcon#read 6, iclass 15, count 0 2006.229.19:10:01.48#ibcon#end of sib2, iclass 15, count 0 2006.229.19:10:01.48#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:10:01.48#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:10:01.48#ibcon#[27=USB\r\n] 2006.229.19:10:01.48#ibcon#*before write, iclass 15, count 0 2006.229.19:10:01.48#ibcon#enter sib2, iclass 15, count 0 2006.229.19:10:01.48#ibcon#flushed, iclass 15, count 0 2006.229.19:10:01.48#ibcon#about to write, iclass 15, count 0 2006.229.19:10:01.48#ibcon#wrote, iclass 15, count 0 2006.229.19:10:01.48#ibcon#about to read 3, iclass 15, count 0 2006.229.19:10:01.51#ibcon#read 3, iclass 15, count 0 2006.229.19:10:01.51#ibcon#about to read 4, iclass 15, count 0 2006.229.19:10:01.51#ibcon#read 4, iclass 15, count 0 2006.229.19:10:01.51#ibcon#about to read 5, iclass 15, count 0 2006.229.19:10:01.51#ibcon#read 5, iclass 15, count 0 2006.229.19:10:01.51#ibcon#about to read 6, iclass 15, count 0 2006.229.19:10:01.51#ibcon#read 6, iclass 15, count 0 2006.229.19:10:01.51#ibcon#end of sib2, iclass 15, count 0 2006.229.19:10:01.51#ibcon#*after write, iclass 15, count 0 2006.229.19:10:01.51#ibcon#*before return 0, iclass 15, count 0 2006.229.19:10:01.51#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:10:01.51#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:10:01.51#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:10:01.51#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:10:01.51$vck44/vabw=wide 2006.229.19:10:01.51#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.19:10:01.51#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.19:10:01.51#ibcon#ireg 8 cls_cnt 0 2006.229.19:10:01.51#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:10:01.51#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:10:01.51#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:10:01.51#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:10:01.51#ibcon#first serial, iclass 17, count 0 2006.229.19:10:01.51#ibcon#enter sib2, iclass 17, count 0 2006.229.19:10:01.51#ibcon#flushed, iclass 17, count 0 2006.229.19:10:01.51#ibcon#about to write, iclass 17, count 0 2006.229.19:10:01.51#ibcon#wrote, iclass 17, count 0 2006.229.19:10:01.51#ibcon#about to read 3, iclass 17, count 0 2006.229.19:10:01.53#ibcon#read 3, iclass 17, count 0 2006.229.19:10:01.53#ibcon#about to read 4, iclass 17, count 0 2006.229.19:10:01.53#ibcon#read 4, iclass 17, count 0 2006.229.19:10:01.53#ibcon#about to read 5, iclass 17, count 0 2006.229.19:10:01.53#ibcon#read 5, iclass 17, count 0 2006.229.19:10:01.53#ibcon#about to read 6, iclass 17, count 0 2006.229.19:10:01.53#ibcon#read 6, iclass 17, count 0 2006.229.19:10:01.53#ibcon#end of sib2, iclass 17, count 0 2006.229.19:10:01.53#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:10:01.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:10:01.53#ibcon#[25=BW32\r\n] 2006.229.19:10:01.53#ibcon#*before write, iclass 17, count 0 2006.229.19:10:01.53#ibcon#enter sib2, iclass 17, count 0 2006.229.19:10:01.53#ibcon#flushed, iclass 17, count 0 2006.229.19:10:01.53#ibcon#about to write, iclass 17, count 0 2006.229.19:10:01.53#ibcon#wrote, iclass 17, count 0 2006.229.19:10:01.53#ibcon#about to read 3, iclass 17, count 0 2006.229.19:10:01.56#ibcon#read 3, iclass 17, count 0 2006.229.19:10:01.56#ibcon#about to read 4, iclass 17, count 0 2006.229.19:10:01.56#ibcon#read 4, iclass 17, count 0 2006.229.19:10:01.56#ibcon#about to read 5, iclass 17, count 0 2006.229.19:10:01.56#ibcon#read 5, iclass 17, count 0 2006.229.19:10:01.56#ibcon#about to read 6, iclass 17, count 0 2006.229.19:10:01.56#ibcon#read 6, iclass 17, count 0 2006.229.19:10:01.56#ibcon#end of sib2, iclass 17, count 0 2006.229.19:10:01.56#ibcon#*after write, iclass 17, count 0 2006.229.19:10:01.56#ibcon#*before return 0, iclass 17, count 0 2006.229.19:10:01.56#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:10:01.56#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:10:01.56#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:10:01.56#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:10:01.56$vck44/vbbw=wide 2006.229.19:10:01.56#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:10:01.56#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:10:01.56#ibcon#ireg 8 cls_cnt 0 2006.229.19:10:01.56#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:10:01.63#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:10:01.63#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:10:01.63#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:10:01.63#ibcon#first serial, iclass 19, count 0 2006.229.19:10:01.63#ibcon#enter sib2, iclass 19, count 0 2006.229.19:10:01.63#ibcon#flushed, iclass 19, count 0 2006.229.19:10:01.63#ibcon#about to write, iclass 19, count 0 2006.229.19:10:01.63#ibcon#wrote, iclass 19, count 0 2006.229.19:10:01.63#ibcon#about to read 3, iclass 19, count 0 2006.229.19:10:01.65#ibcon#read 3, iclass 19, count 0 2006.229.19:10:01.65#ibcon#about to read 4, iclass 19, count 0 2006.229.19:10:01.65#ibcon#read 4, iclass 19, count 0 2006.229.19:10:01.65#ibcon#about to read 5, iclass 19, count 0 2006.229.19:10:01.65#ibcon#read 5, iclass 19, count 0 2006.229.19:10:01.65#ibcon#about to read 6, iclass 19, count 0 2006.229.19:10:01.65#ibcon#read 6, iclass 19, count 0 2006.229.19:10:01.65#ibcon#end of sib2, iclass 19, count 0 2006.229.19:10:01.65#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:10:01.65#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:10:01.65#ibcon#[27=BW32\r\n] 2006.229.19:10:01.65#ibcon#*before write, iclass 19, count 0 2006.229.19:10:01.65#ibcon#enter sib2, iclass 19, count 0 2006.229.19:10:01.65#ibcon#flushed, iclass 19, count 0 2006.229.19:10:01.65#ibcon#about to write, iclass 19, count 0 2006.229.19:10:01.65#ibcon#wrote, iclass 19, count 0 2006.229.19:10:01.65#ibcon#about to read 3, iclass 19, count 0 2006.229.19:10:01.68#ibcon#read 3, iclass 19, count 0 2006.229.19:10:01.68#ibcon#about to read 4, iclass 19, count 0 2006.229.19:10:01.68#ibcon#read 4, iclass 19, count 0 2006.229.19:10:01.68#ibcon#about to read 5, iclass 19, count 0 2006.229.19:10:01.68#ibcon#read 5, iclass 19, count 0 2006.229.19:10:01.68#ibcon#about to read 6, iclass 19, count 0 2006.229.19:10:01.68#ibcon#read 6, iclass 19, count 0 2006.229.19:10:01.68#ibcon#end of sib2, iclass 19, count 0 2006.229.19:10:01.68#ibcon#*after write, iclass 19, count 0 2006.229.19:10:01.68#ibcon#*before return 0, iclass 19, count 0 2006.229.19:10:01.68#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:10:01.68#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:10:01.68#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:10:01.68#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:10:01.68$setupk4/ifdk4 2006.229.19:10:01.68$ifdk4/lo= 2006.229.19:10:01.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:10:01.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:10:01.68$ifdk4/patch= 2006.229.19:10:01.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:10:01.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:10:01.68$setupk4/!*+20s 2006.229.19:10:02.77#abcon#<5=/06 1.6 3.0 26.111001001.4\r\n> 2006.229.19:10:02.79#abcon#{5=INTERFACE CLEAR} 2006.229.19:10:02.85#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:10:07.14#trakl#Source acquired 2006.229.19:10:07.14#flagr#flagr/antenna,acquired 2006.229.19:10:12.94#abcon#<5=/06 1.6 3.0 26.111001001.4\r\n> 2006.229.19:10:12.96#abcon#{5=INTERFACE CLEAR} 2006.229.19:10:13.02#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:10:16.19$setupk4/"tpicd 2006.229.19:10:16.19$setupk4/echo=off 2006.229.19:10:16.19$setupk4/xlog=off 2006.229.19:10:16.19:!2006.229.19:11:12 2006.229.19:11:12.00:preob 2006.229.19:11:12.14/onsource/TRACKING 2006.229.19:11:12.14:!2006.229.19:11:22 2006.229.19:11:22.00:"tape 2006.229.19:11:22.00:"st=record 2006.229.19:11:22.00:data_valid=on 2006.229.19:11:22.00:midob 2006.229.19:11:22.14/onsource/TRACKING 2006.229.19:11:22.14/wx/26.11,1001.4,100 2006.229.19:11:22.25/cable/+6.4197E-03 2006.229.19:11:23.34/va/01,08,usb,yes,30,32 2006.229.19:11:23.34/va/02,07,usb,yes,32,33 2006.229.19:11:23.34/va/03,06,usb,yes,40,43 2006.229.19:11:23.34/va/04,07,usb,yes,33,35 2006.229.19:11:23.34/va/05,04,usb,yes,30,30 2006.229.19:11:23.34/va/06,04,usb,yes,34,33 2006.229.19:11:23.34/va/07,05,usb,yes,30,30 2006.229.19:11:23.34/va/08,06,usb,yes,21,27 2006.229.19:11:23.57/valo/01,524.99,yes,locked 2006.229.19:11:23.57/valo/02,534.99,yes,locked 2006.229.19:11:23.57/valo/03,564.99,yes,locked 2006.229.19:11:23.57/valo/04,624.99,yes,locked 2006.229.19:11:23.57/valo/05,734.99,yes,locked 2006.229.19:11:23.57/valo/06,814.99,yes,locked 2006.229.19:11:23.57/valo/07,864.99,yes,locked 2006.229.19:11:23.57/valo/08,884.99,yes,locked 2006.229.19:11:24.66/vb/01,04,usb,yes,31,29 2006.229.19:11:24.66/vb/02,04,usb,yes,33,33 2006.229.19:11:24.66/vb/03,04,usb,yes,30,33 2006.229.19:11:24.66/vb/04,04,usb,yes,35,34 2006.229.19:11:24.66/vb/05,04,usb,yes,27,29 2006.229.19:11:24.66/vb/06,04,usb,yes,31,28 2006.229.19:11:24.66/vb/07,04,usb,yes,31,31 2006.229.19:11:24.66/vb/08,04,usb,yes,29,32 2006.229.19:11:24.89/vblo/01,629.99,yes,locked 2006.229.19:11:24.89/vblo/02,634.99,yes,locked 2006.229.19:11:24.89/vblo/03,649.99,yes,locked 2006.229.19:11:24.89/vblo/04,679.99,yes,locked 2006.229.19:11:24.89/vblo/05,709.99,yes,locked 2006.229.19:11:24.89/vblo/06,719.99,yes,locked 2006.229.19:11:24.89/vblo/07,734.99,yes,locked 2006.229.19:11:24.89/vblo/08,744.99,yes,locked 2006.229.19:11:25.04/vabw/8 2006.229.19:11:25.19/vbbw/8 2006.229.19:11:25.28/xfe/off,on,12.2 2006.229.19:11:25.66/ifatt/23,28,28,28 2006.229.19:11:26.07/fmout-gps/S +4.45E-07 2006.229.19:11:26.11:!2006.229.19:14:22 2006.229.19:14:22.00:data_valid=off 2006.229.19:14:22.00:"et 2006.229.19:14:22.00:!+3s 2006.229.19:14:25.01:"tape 2006.229.19:14:25.01:postob 2006.229.19:14:25.14/cable/+6.4177E-03 2006.229.19:14:25.14/wx/26.11,1001.4,100 2006.229.19:14:26.08/fmout-gps/S +4.45E-07 2006.229.19:14:26.08:scan_name=229-1917,jd0608,40 2006.229.19:14:26.08:source=4c39.25,092703.01,390220.9,2000.0,cw 2006.229.19:14:26.13#flagr#flagr/antenna,new-source 2006.229.19:14:27.13:checkk5 2006.229.19:14:27.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:14:27.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:14:28.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:14:28.69/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:14:29.07/chk_obsdata//k5ts1/T2291911??a.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.19:14:29.48/chk_obsdata//k5ts2/T2291911??b.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.19:14:29.88/chk_obsdata//k5ts3/T2291911??c.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.19:14:30.28/chk_obsdata//k5ts4/T2291911??d.dat file size is correct (nominal:720MB, actual:716MB). 2006.229.19:14:31.00/k5log//k5ts1_log_newline 2006.229.19:14:31.72/k5log//k5ts2_log_newline 2006.229.19:14:32.43/k5log//k5ts3_log_newline 2006.229.19:14:33.15/k5log//k5ts4_log_newline 2006.229.19:14:33.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:14:33.18:setupk4=1 2006.229.19:14:33.18$setupk4/echo=on 2006.229.19:14:33.18$setupk4/pcalon 2006.229.19:14:33.18$pcalon/"no phase cal control is implemented here 2006.229.19:14:33.18$setupk4/"tpicd=stop 2006.229.19:14:33.18$setupk4/"rec=synch_on 2006.229.19:14:33.18$setupk4/"rec_mode=128 2006.229.19:14:33.18$setupk4/!* 2006.229.19:14:33.18$setupk4/recpk4 2006.229.19:14:33.18$recpk4/recpatch= 2006.229.19:14:33.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:14:33.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:14:33.18$setupk4/vck44 2006.229.19:14:33.18$vck44/valo=1,524.99 2006.229.19:14:33.18#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.19:14:33.18#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.19:14:33.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:33.18#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:33.18#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:33.18#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:33.18#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:14:33.18#ibcon#first serial, iclass 24, count 0 2006.229.19:14:33.18#ibcon#enter sib2, iclass 24, count 0 2006.229.19:14:33.18#ibcon#flushed, iclass 24, count 0 2006.229.19:14:33.18#ibcon#about to write, iclass 24, count 0 2006.229.19:14:33.18#ibcon#wrote, iclass 24, count 0 2006.229.19:14:33.18#ibcon#about to read 3, iclass 24, count 0 2006.229.19:14:33.19#ibcon#read 3, iclass 24, count 0 2006.229.19:14:33.19#ibcon#about to read 4, iclass 24, count 0 2006.229.19:14:33.19#ibcon#read 4, iclass 24, count 0 2006.229.19:14:33.19#ibcon#about to read 5, iclass 24, count 0 2006.229.19:14:33.19#ibcon#read 5, iclass 24, count 0 2006.229.19:14:33.19#ibcon#about to read 6, iclass 24, count 0 2006.229.19:14:33.19#ibcon#read 6, iclass 24, count 0 2006.229.19:14:33.19#ibcon#end of sib2, iclass 24, count 0 2006.229.19:14:33.19#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:14:33.19#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:14:33.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:14:33.19#ibcon#*before write, iclass 24, count 0 2006.229.19:14:33.19#ibcon#enter sib2, iclass 24, count 0 2006.229.19:14:33.19#ibcon#flushed, iclass 24, count 0 2006.229.19:14:33.19#ibcon#about to write, iclass 24, count 0 2006.229.19:14:33.19#ibcon#wrote, iclass 24, count 0 2006.229.19:14:33.19#ibcon#about to read 3, iclass 24, count 0 2006.229.19:14:33.24#ibcon#read 3, iclass 24, count 0 2006.229.19:14:33.24#ibcon#about to read 4, iclass 24, count 0 2006.229.19:14:33.24#ibcon#read 4, iclass 24, count 0 2006.229.19:14:33.24#ibcon#about to read 5, iclass 24, count 0 2006.229.19:14:33.24#ibcon#read 5, iclass 24, count 0 2006.229.19:14:33.24#ibcon#about to read 6, iclass 24, count 0 2006.229.19:14:33.24#ibcon#read 6, iclass 24, count 0 2006.229.19:14:33.24#ibcon#end of sib2, iclass 24, count 0 2006.229.19:14:33.24#ibcon#*after write, iclass 24, count 0 2006.229.19:14:33.24#ibcon#*before return 0, iclass 24, count 0 2006.229.19:14:33.24#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:33.24#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:33.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:14:33.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:14:33.24$vck44/va=1,8 2006.229.19:14:33.24#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.19:14:33.24#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.19:14:33.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:33.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:33.24#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:33.24#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:33.24#ibcon#enter wrdev, iclass 26, count 2 2006.229.19:14:33.24#ibcon#first serial, iclass 26, count 2 2006.229.19:14:33.24#ibcon#enter sib2, iclass 26, count 2 2006.229.19:14:33.24#ibcon#flushed, iclass 26, count 2 2006.229.19:14:33.24#ibcon#about to write, iclass 26, count 2 2006.229.19:14:33.24#ibcon#wrote, iclass 26, count 2 2006.229.19:14:33.24#ibcon#about to read 3, iclass 26, count 2 2006.229.19:14:33.26#ibcon#read 3, iclass 26, count 2 2006.229.19:14:33.26#ibcon#about to read 4, iclass 26, count 2 2006.229.19:14:33.26#ibcon#read 4, iclass 26, count 2 2006.229.19:14:33.26#ibcon#about to read 5, iclass 26, count 2 2006.229.19:14:33.26#ibcon#read 5, iclass 26, count 2 2006.229.19:14:33.26#ibcon#about to read 6, iclass 26, count 2 2006.229.19:14:33.26#ibcon#read 6, iclass 26, count 2 2006.229.19:14:33.26#ibcon#end of sib2, iclass 26, count 2 2006.229.19:14:33.26#ibcon#*mode == 0, iclass 26, count 2 2006.229.19:14:33.26#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.19:14:33.26#ibcon#[25=AT01-08\r\n] 2006.229.19:14:33.26#ibcon#*before write, iclass 26, count 2 2006.229.19:14:33.26#ibcon#enter sib2, iclass 26, count 2 2006.229.19:14:33.26#ibcon#flushed, iclass 26, count 2 2006.229.19:14:33.26#ibcon#about to write, iclass 26, count 2 2006.229.19:14:33.26#ibcon#wrote, iclass 26, count 2 2006.229.19:14:33.26#ibcon#about to read 3, iclass 26, count 2 2006.229.19:14:33.29#ibcon#read 3, iclass 26, count 2 2006.229.19:14:33.29#ibcon#about to read 4, iclass 26, count 2 2006.229.19:14:33.29#ibcon#read 4, iclass 26, count 2 2006.229.19:14:33.29#ibcon#about to read 5, iclass 26, count 2 2006.229.19:14:33.29#ibcon#read 5, iclass 26, count 2 2006.229.19:14:33.29#ibcon#about to read 6, iclass 26, count 2 2006.229.19:14:33.29#ibcon#read 6, iclass 26, count 2 2006.229.19:14:33.29#ibcon#end of sib2, iclass 26, count 2 2006.229.19:14:33.29#ibcon#*after write, iclass 26, count 2 2006.229.19:14:33.29#ibcon#*before return 0, iclass 26, count 2 2006.229.19:14:33.29#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:33.29#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:33.29#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.19:14:33.29#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:33.29#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:33.41#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:33.41#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:33.41#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:14:33.41#ibcon#first serial, iclass 26, count 0 2006.229.19:14:33.41#ibcon#enter sib2, iclass 26, count 0 2006.229.19:14:33.41#ibcon#flushed, iclass 26, count 0 2006.229.19:14:33.41#ibcon#about to write, iclass 26, count 0 2006.229.19:14:33.41#ibcon#wrote, iclass 26, count 0 2006.229.19:14:33.41#ibcon#about to read 3, iclass 26, count 0 2006.229.19:14:33.43#ibcon#read 3, iclass 26, count 0 2006.229.19:14:33.43#ibcon#about to read 4, iclass 26, count 0 2006.229.19:14:33.43#ibcon#read 4, iclass 26, count 0 2006.229.19:14:33.43#ibcon#about to read 5, iclass 26, count 0 2006.229.19:14:33.43#ibcon#read 5, iclass 26, count 0 2006.229.19:14:33.43#ibcon#about to read 6, iclass 26, count 0 2006.229.19:14:33.43#ibcon#read 6, iclass 26, count 0 2006.229.19:14:33.43#ibcon#end of sib2, iclass 26, count 0 2006.229.19:14:33.43#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:14:33.43#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:14:33.43#ibcon#[25=USB\r\n] 2006.229.19:14:33.43#ibcon#*before write, iclass 26, count 0 2006.229.19:14:33.43#ibcon#enter sib2, iclass 26, count 0 2006.229.19:14:33.43#ibcon#flushed, iclass 26, count 0 2006.229.19:14:33.43#ibcon#about to write, iclass 26, count 0 2006.229.19:14:33.43#ibcon#wrote, iclass 26, count 0 2006.229.19:14:33.43#ibcon#about to read 3, iclass 26, count 0 2006.229.19:14:33.46#ibcon#read 3, iclass 26, count 0 2006.229.19:14:33.46#ibcon#about to read 4, iclass 26, count 0 2006.229.19:14:33.46#ibcon#read 4, iclass 26, count 0 2006.229.19:14:33.46#ibcon#about to read 5, iclass 26, count 0 2006.229.19:14:33.46#ibcon#read 5, iclass 26, count 0 2006.229.19:14:33.46#ibcon#about to read 6, iclass 26, count 0 2006.229.19:14:33.46#ibcon#read 6, iclass 26, count 0 2006.229.19:14:33.46#ibcon#end of sib2, iclass 26, count 0 2006.229.19:14:33.46#ibcon#*after write, iclass 26, count 0 2006.229.19:14:33.46#ibcon#*before return 0, iclass 26, count 0 2006.229.19:14:33.46#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:33.46#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:33.46#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:14:33.46#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:14:33.46$vck44/valo=2,534.99 2006.229.19:14:33.46#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.19:14:33.46#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.19:14:33.46#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:33.46#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:33.46#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:33.46#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:33.46#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:14:33.46#ibcon#first serial, iclass 28, count 0 2006.229.19:14:33.46#ibcon#enter sib2, iclass 28, count 0 2006.229.19:14:33.46#ibcon#flushed, iclass 28, count 0 2006.229.19:14:33.46#ibcon#about to write, iclass 28, count 0 2006.229.19:14:33.46#ibcon#wrote, iclass 28, count 0 2006.229.19:14:33.46#ibcon#about to read 3, iclass 28, count 0 2006.229.19:14:33.48#ibcon#read 3, iclass 28, count 0 2006.229.19:14:33.48#ibcon#about to read 4, iclass 28, count 0 2006.229.19:14:33.48#ibcon#read 4, iclass 28, count 0 2006.229.19:14:33.48#ibcon#about to read 5, iclass 28, count 0 2006.229.19:14:33.48#ibcon#read 5, iclass 28, count 0 2006.229.19:14:33.48#ibcon#about to read 6, iclass 28, count 0 2006.229.19:14:33.48#ibcon#read 6, iclass 28, count 0 2006.229.19:14:33.48#ibcon#end of sib2, iclass 28, count 0 2006.229.19:14:33.48#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:14:33.48#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:14:33.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:14:33.48#ibcon#*before write, iclass 28, count 0 2006.229.19:14:33.48#ibcon#enter sib2, iclass 28, count 0 2006.229.19:14:33.48#ibcon#flushed, iclass 28, count 0 2006.229.19:14:33.48#ibcon#about to write, iclass 28, count 0 2006.229.19:14:33.48#ibcon#wrote, iclass 28, count 0 2006.229.19:14:33.48#ibcon#about to read 3, iclass 28, count 0 2006.229.19:14:33.52#ibcon#read 3, iclass 28, count 0 2006.229.19:14:33.52#ibcon#about to read 4, iclass 28, count 0 2006.229.19:14:33.52#ibcon#read 4, iclass 28, count 0 2006.229.19:14:33.52#ibcon#about to read 5, iclass 28, count 0 2006.229.19:14:33.52#ibcon#read 5, iclass 28, count 0 2006.229.19:14:33.52#ibcon#about to read 6, iclass 28, count 0 2006.229.19:14:33.52#ibcon#read 6, iclass 28, count 0 2006.229.19:14:33.52#ibcon#end of sib2, iclass 28, count 0 2006.229.19:14:33.52#ibcon#*after write, iclass 28, count 0 2006.229.19:14:33.52#ibcon#*before return 0, iclass 28, count 0 2006.229.19:14:33.52#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:33.52#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:33.52#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:14:33.52#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:14:33.52$vck44/va=2,7 2006.229.19:14:33.52#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.19:14:33.52#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.19:14:33.52#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:33.52#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:33.58#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:33.58#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:33.58#ibcon#enter wrdev, iclass 30, count 2 2006.229.19:14:33.58#ibcon#first serial, iclass 30, count 2 2006.229.19:14:33.58#ibcon#enter sib2, iclass 30, count 2 2006.229.19:14:33.58#ibcon#flushed, iclass 30, count 2 2006.229.19:14:33.58#ibcon#about to write, iclass 30, count 2 2006.229.19:14:33.58#ibcon#wrote, iclass 30, count 2 2006.229.19:14:33.58#ibcon#about to read 3, iclass 30, count 2 2006.229.19:14:33.60#ibcon#read 3, iclass 30, count 2 2006.229.19:14:33.60#ibcon#about to read 4, iclass 30, count 2 2006.229.19:14:33.60#ibcon#read 4, iclass 30, count 2 2006.229.19:14:33.60#ibcon#about to read 5, iclass 30, count 2 2006.229.19:14:33.60#ibcon#read 5, iclass 30, count 2 2006.229.19:14:33.60#ibcon#about to read 6, iclass 30, count 2 2006.229.19:14:33.60#ibcon#read 6, iclass 30, count 2 2006.229.19:14:33.60#ibcon#end of sib2, iclass 30, count 2 2006.229.19:14:33.60#ibcon#*mode == 0, iclass 30, count 2 2006.229.19:14:33.60#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.19:14:33.60#ibcon#[25=AT02-07\r\n] 2006.229.19:14:33.60#ibcon#*before write, iclass 30, count 2 2006.229.19:14:33.60#ibcon#enter sib2, iclass 30, count 2 2006.229.19:14:33.60#ibcon#flushed, iclass 30, count 2 2006.229.19:14:33.60#ibcon#about to write, iclass 30, count 2 2006.229.19:14:33.60#ibcon#wrote, iclass 30, count 2 2006.229.19:14:33.60#ibcon#about to read 3, iclass 30, count 2 2006.229.19:14:33.63#ibcon#read 3, iclass 30, count 2 2006.229.19:14:33.63#ibcon#about to read 4, iclass 30, count 2 2006.229.19:14:33.63#ibcon#read 4, iclass 30, count 2 2006.229.19:14:33.63#ibcon#about to read 5, iclass 30, count 2 2006.229.19:14:33.63#ibcon#read 5, iclass 30, count 2 2006.229.19:14:33.63#ibcon#about to read 6, iclass 30, count 2 2006.229.19:14:33.63#ibcon#read 6, iclass 30, count 2 2006.229.19:14:33.63#ibcon#end of sib2, iclass 30, count 2 2006.229.19:14:33.63#ibcon#*after write, iclass 30, count 2 2006.229.19:14:33.63#ibcon#*before return 0, iclass 30, count 2 2006.229.19:14:33.63#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:33.63#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:33.63#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.19:14:33.63#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:33.63#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:33.75#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:33.75#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:33.75#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:14:33.75#ibcon#first serial, iclass 30, count 0 2006.229.19:14:33.75#ibcon#enter sib2, iclass 30, count 0 2006.229.19:14:33.75#ibcon#flushed, iclass 30, count 0 2006.229.19:14:33.75#ibcon#about to write, iclass 30, count 0 2006.229.19:14:33.75#ibcon#wrote, iclass 30, count 0 2006.229.19:14:33.75#ibcon#about to read 3, iclass 30, count 0 2006.229.19:14:33.77#ibcon#read 3, iclass 30, count 0 2006.229.19:14:33.77#ibcon#about to read 4, iclass 30, count 0 2006.229.19:14:33.77#ibcon#read 4, iclass 30, count 0 2006.229.19:14:33.77#ibcon#about to read 5, iclass 30, count 0 2006.229.19:14:33.77#ibcon#read 5, iclass 30, count 0 2006.229.19:14:33.77#ibcon#about to read 6, iclass 30, count 0 2006.229.19:14:33.77#ibcon#read 6, iclass 30, count 0 2006.229.19:14:33.77#ibcon#end of sib2, iclass 30, count 0 2006.229.19:14:33.77#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:14:33.77#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:14:33.77#ibcon#[25=USB\r\n] 2006.229.19:14:33.77#ibcon#*before write, iclass 30, count 0 2006.229.19:14:33.77#ibcon#enter sib2, iclass 30, count 0 2006.229.19:14:33.77#ibcon#flushed, iclass 30, count 0 2006.229.19:14:33.77#ibcon#about to write, iclass 30, count 0 2006.229.19:14:33.77#ibcon#wrote, iclass 30, count 0 2006.229.19:14:33.77#ibcon#about to read 3, iclass 30, count 0 2006.229.19:14:33.80#ibcon#read 3, iclass 30, count 0 2006.229.19:14:33.80#ibcon#about to read 4, iclass 30, count 0 2006.229.19:14:33.80#ibcon#read 4, iclass 30, count 0 2006.229.19:14:33.80#ibcon#about to read 5, iclass 30, count 0 2006.229.19:14:33.80#ibcon#read 5, iclass 30, count 0 2006.229.19:14:33.80#ibcon#about to read 6, iclass 30, count 0 2006.229.19:14:33.80#ibcon#read 6, iclass 30, count 0 2006.229.19:14:33.80#ibcon#end of sib2, iclass 30, count 0 2006.229.19:14:33.80#ibcon#*after write, iclass 30, count 0 2006.229.19:14:33.80#ibcon#*before return 0, iclass 30, count 0 2006.229.19:14:33.80#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:33.80#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:33.80#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:14:33.80#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:14:33.80$vck44/valo=3,564.99 2006.229.19:14:33.80#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.19:14:33.80#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.19:14:33.80#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:33.80#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:33.80#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:33.80#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:33.80#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:14:33.80#ibcon#first serial, iclass 32, count 0 2006.229.19:14:33.80#ibcon#enter sib2, iclass 32, count 0 2006.229.19:14:33.80#ibcon#flushed, iclass 32, count 0 2006.229.19:14:33.80#ibcon#about to write, iclass 32, count 0 2006.229.19:14:33.80#ibcon#wrote, iclass 32, count 0 2006.229.19:14:33.80#ibcon#about to read 3, iclass 32, count 0 2006.229.19:14:33.82#ibcon#read 3, iclass 32, count 0 2006.229.19:14:33.82#ibcon#about to read 4, iclass 32, count 0 2006.229.19:14:33.82#ibcon#read 4, iclass 32, count 0 2006.229.19:14:33.82#ibcon#about to read 5, iclass 32, count 0 2006.229.19:14:33.82#ibcon#read 5, iclass 32, count 0 2006.229.19:14:33.82#ibcon#about to read 6, iclass 32, count 0 2006.229.19:14:33.82#ibcon#read 6, iclass 32, count 0 2006.229.19:14:33.82#ibcon#end of sib2, iclass 32, count 0 2006.229.19:14:33.82#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:14:33.82#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:14:33.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:14:33.82#ibcon#*before write, iclass 32, count 0 2006.229.19:14:33.82#ibcon#enter sib2, iclass 32, count 0 2006.229.19:14:33.82#ibcon#flushed, iclass 32, count 0 2006.229.19:14:33.82#ibcon#about to write, iclass 32, count 0 2006.229.19:14:33.82#ibcon#wrote, iclass 32, count 0 2006.229.19:14:33.82#ibcon#about to read 3, iclass 32, count 0 2006.229.19:14:33.86#ibcon#read 3, iclass 32, count 0 2006.229.19:14:33.86#ibcon#about to read 4, iclass 32, count 0 2006.229.19:14:33.86#ibcon#read 4, iclass 32, count 0 2006.229.19:14:33.86#ibcon#about to read 5, iclass 32, count 0 2006.229.19:14:33.86#ibcon#read 5, iclass 32, count 0 2006.229.19:14:33.86#ibcon#about to read 6, iclass 32, count 0 2006.229.19:14:33.86#ibcon#read 6, iclass 32, count 0 2006.229.19:14:33.86#ibcon#end of sib2, iclass 32, count 0 2006.229.19:14:33.86#ibcon#*after write, iclass 32, count 0 2006.229.19:14:33.86#ibcon#*before return 0, iclass 32, count 0 2006.229.19:14:33.86#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:33.86#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:33.86#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:14:33.86#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:14:33.86$vck44/va=3,6 2006.229.19:14:33.86#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.19:14:33.86#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.19:14:33.86#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:33.86#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:33.92#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:33.92#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:33.92#ibcon#enter wrdev, iclass 34, count 2 2006.229.19:14:33.92#ibcon#first serial, iclass 34, count 2 2006.229.19:14:33.92#ibcon#enter sib2, iclass 34, count 2 2006.229.19:14:33.92#ibcon#flushed, iclass 34, count 2 2006.229.19:14:33.92#ibcon#about to write, iclass 34, count 2 2006.229.19:14:33.92#ibcon#wrote, iclass 34, count 2 2006.229.19:14:33.92#ibcon#about to read 3, iclass 34, count 2 2006.229.19:14:33.94#ibcon#read 3, iclass 34, count 2 2006.229.19:14:33.94#ibcon#about to read 4, iclass 34, count 2 2006.229.19:14:33.94#ibcon#read 4, iclass 34, count 2 2006.229.19:14:33.94#ibcon#about to read 5, iclass 34, count 2 2006.229.19:14:33.94#ibcon#read 5, iclass 34, count 2 2006.229.19:14:33.94#ibcon#about to read 6, iclass 34, count 2 2006.229.19:14:33.94#ibcon#read 6, iclass 34, count 2 2006.229.19:14:33.94#ibcon#end of sib2, iclass 34, count 2 2006.229.19:14:33.94#ibcon#*mode == 0, iclass 34, count 2 2006.229.19:14:33.94#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.19:14:33.94#ibcon#[25=AT03-06\r\n] 2006.229.19:14:33.94#ibcon#*before write, iclass 34, count 2 2006.229.19:14:33.94#ibcon#enter sib2, iclass 34, count 2 2006.229.19:14:33.94#ibcon#flushed, iclass 34, count 2 2006.229.19:14:33.94#ibcon#about to write, iclass 34, count 2 2006.229.19:14:33.94#ibcon#wrote, iclass 34, count 2 2006.229.19:14:33.94#ibcon#about to read 3, iclass 34, count 2 2006.229.19:14:33.97#ibcon#read 3, iclass 34, count 2 2006.229.19:14:33.97#ibcon#about to read 4, iclass 34, count 2 2006.229.19:14:33.97#ibcon#read 4, iclass 34, count 2 2006.229.19:14:33.97#ibcon#about to read 5, iclass 34, count 2 2006.229.19:14:33.97#ibcon#read 5, iclass 34, count 2 2006.229.19:14:33.97#ibcon#about to read 6, iclass 34, count 2 2006.229.19:14:33.97#ibcon#read 6, iclass 34, count 2 2006.229.19:14:33.97#ibcon#end of sib2, iclass 34, count 2 2006.229.19:14:33.97#ibcon#*after write, iclass 34, count 2 2006.229.19:14:33.97#ibcon#*before return 0, iclass 34, count 2 2006.229.19:14:33.97#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:33.97#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:33.97#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.19:14:33.97#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:33.97#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:34.09#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:34.09#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:34.09#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:14:34.09#ibcon#first serial, iclass 34, count 0 2006.229.19:14:34.09#ibcon#enter sib2, iclass 34, count 0 2006.229.19:14:34.09#ibcon#flushed, iclass 34, count 0 2006.229.19:14:34.09#ibcon#about to write, iclass 34, count 0 2006.229.19:14:34.09#ibcon#wrote, iclass 34, count 0 2006.229.19:14:34.09#ibcon#about to read 3, iclass 34, count 0 2006.229.19:14:34.11#ibcon#read 3, iclass 34, count 0 2006.229.19:14:34.11#ibcon#about to read 4, iclass 34, count 0 2006.229.19:14:34.11#ibcon#read 4, iclass 34, count 0 2006.229.19:14:34.11#ibcon#about to read 5, iclass 34, count 0 2006.229.19:14:34.11#ibcon#read 5, iclass 34, count 0 2006.229.19:14:34.11#ibcon#about to read 6, iclass 34, count 0 2006.229.19:14:34.11#ibcon#read 6, iclass 34, count 0 2006.229.19:14:34.11#ibcon#end of sib2, iclass 34, count 0 2006.229.19:14:34.11#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:14:34.11#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:14:34.11#ibcon#[25=USB\r\n] 2006.229.19:14:34.11#ibcon#*before write, iclass 34, count 0 2006.229.19:14:34.11#ibcon#enter sib2, iclass 34, count 0 2006.229.19:14:34.11#ibcon#flushed, iclass 34, count 0 2006.229.19:14:34.11#ibcon#about to write, iclass 34, count 0 2006.229.19:14:34.11#ibcon#wrote, iclass 34, count 0 2006.229.19:14:34.11#ibcon#about to read 3, iclass 34, count 0 2006.229.19:14:34.14#ibcon#read 3, iclass 34, count 0 2006.229.19:14:34.14#ibcon#about to read 4, iclass 34, count 0 2006.229.19:14:34.14#ibcon#read 4, iclass 34, count 0 2006.229.19:14:34.14#ibcon#about to read 5, iclass 34, count 0 2006.229.19:14:34.14#ibcon#read 5, iclass 34, count 0 2006.229.19:14:34.14#ibcon#about to read 6, iclass 34, count 0 2006.229.19:14:34.14#ibcon#read 6, iclass 34, count 0 2006.229.19:14:34.14#ibcon#end of sib2, iclass 34, count 0 2006.229.19:14:34.14#ibcon#*after write, iclass 34, count 0 2006.229.19:14:34.14#ibcon#*before return 0, iclass 34, count 0 2006.229.19:14:34.14#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:34.14#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:34.14#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:14:34.14#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:14:34.14$vck44/valo=4,624.99 2006.229.19:14:34.14#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.19:14:34.14#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.19:14:34.14#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:34.14#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:34.14#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:34.14#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:34.14#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:14:34.14#ibcon#first serial, iclass 36, count 0 2006.229.19:14:34.14#ibcon#enter sib2, iclass 36, count 0 2006.229.19:14:34.14#ibcon#flushed, iclass 36, count 0 2006.229.19:14:34.14#ibcon#about to write, iclass 36, count 0 2006.229.19:14:34.14#ibcon#wrote, iclass 36, count 0 2006.229.19:14:34.14#ibcon#about to read 3, iclass 36, count 0 2006.229.19:14:34.16#ibcon#read 3, iclass 36, count 0 2006.229.19:14:34.16#ibcon#about to read 4, iclass 36, count 0 2006.229.19:14:34.16#ibcon#read 4, iclass 36, count 0 2006.229.19:14:34.16#ibcon#about to read 5, iclass 36, count 0 2006.229.19:14:34.16#ibcon#read 5, iclass 36, count 0 2006.229.19:14:34.16#ibcon#about to read 6, iclass 36, count 0 2006.229.19:14:34.16#ibcon#read 6, iclass 36, count 0 2006.229.19:14:34.16#ibcon#end of sib2, iclass 36, count 0 2006.229.19:14:34.16#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:14:34.16#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:14:34.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:14:34.16#ibcon#*before write, iclass 36, count 0 2006.229.19:14:34.16#ibcon#enter sib2, iclass 36, count 0 2006.229.19:14:34.16#ibcon#flushed, iclass 36, count 0 2006.229.19:14:34.16#ibcon#about to write, iclass 36, count 0 2006.229.19:14:34.16#ibcon#wrote, iclass 36, count 0 2006.229.19:14:34.16#ibcon#about to read 3, iclass 36, count 0 2006.229.19:14:34.20#ibcon#read 3, iclass 36, count 0 2006.229.19:14:34.20#ibcon#about to read 4, iclass 36, count 0 2006.229.19:14:34.20#ibcon#read 4, iclass 36, count 0 2006.229.19:14:34.20#ibcon#about to read 5, iclass 36, count 0 2006.229.19:14:34.20#ibcon#read 5, iclass 36, count 0 2006.229.19:14:34.20#ibcon#about to read 6, iclass 36, count 0 2006.229.19:14:34.20#ibcon#read 6, iclass 36, count 0 2006.229.19:14:34.20#ibcon#end of sib2, iclass 36, count 0 2006.229.19:14:34.20#ibcon#*after write, iclass 36, count 0 2006.229.19:14:34.20#ibcon#*before return 0, iclass 36, count 0 2006.229.19:14:34.20#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:34.20#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:34.20#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:14:34.20#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:14:34.20$vck44/va=4,7 2006.229.19:14:34.20#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.19:14:34.20#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.19:14:34.20#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:34.20#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:34.26#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:34.26#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:34.26#ibcon#enter wrdev, iclass 38, count 2 2006.229.19:14:34.26#ibcon#first serial, iclass 38, count 2 2006.229.19:14:34.26#ibcon#enter sib2, iclass 38, count 2 2006.229.19:14:34.26#ibcon#flushed, iclass 38, count 2 2006.229.19:14:34.26#ibcon#about to write, iclass 38, count 2 2006.229.19:14:34.26#ibcon#wrote, iclass 38, count 2 2006.229.19:14:34.26#ibcon#about to read 3, iclass 38, count 2 2006.229.19:14:34.28#ibcon#read 3, iclass 38, count 2 2006.229.19:14:34.28#ibcon#about to read 4, iclass 38, count 2 2006.229.19:14:34.28#ibcon#read 4, iclass 38, count 2 2006.229.19:14:34.28#ibcon#about to read 5, iclass 38, count 2 2006.229.19:14:34.28#ibcon#read 5, iclass 38, count 2 2006.229.19:14:34.28#ibcon#about to read 6, iclass 38, count 2 2006.229.19:14:34.28#ibcon#read 6, iclass 38, count 2 2006.229.19:14:34.28#ibcon#end of sib2, iclass 38, count 2 2006.229.19:14:34.28#ibcon#*mode == 0, iclass 38, count 2 2006.229.19:14:34.28#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.19:14:34.28#ibcon#[25=AT04-07\r\n] 2006.229.19:14:34.28#ibcon#*before write, iclass 38, count 2 2006.229.19:14:34.28#ibcon#enter sib2, iclass 38, count 2 2006.229.19:14:34.28#ibcon#flushed, iclass 38, count 2 2006.229.19:14:34.28#ibcon#about to write, iclass 38, count 2 2006.229.19:14:34.28#ibcon#wrote, iclass 38, count 2 2006.229.19:14:34.28#ibcon#about to read 3, iclass 38, count 2 2006.229.19:14:34.31#ibcon#read 3, iclass 38, count 2 2006.229.19:14:34.31#ibcon#about to read 4, iclass 38, count 2 2006.229.19:14:34.31#ibcon#read 4, iclass 38, count 2 2006.229.19:14:34.31#ibcon#about to read 5, iclass 38, count 2 2006.229.19:14:34.31#ibcon#read 5, iclass 38, count 2 2006.229.19:14:34.31#ibcon#about to read 6, iclass 38, count 2 2006.229.19:14:34.31#ibcon#read 6, iclass 38, count 2 2006.229.19:14:34.31#ibcon#end of sib2, iclass 38, count 2 2006.229.19:14:34.31#ibcon#*after write, iclass 38, count 2 2006.229.19:14:34.31#ibcon#*before return 0, iclass 38, count 2 2006.229.19:14:34.31#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:34.31#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:34.31#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.19:14:34.31#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:34.31#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:34.43#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:34.43#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:34.43#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:14:34.43#ibcon#first serial, iclass 38, count 0 2006.229.19:14:34.43#ibcon#enter sib2, iclass 38, count 0 2006.229.19:14:34.43#ibcon#flushed, iclass 38, count 0 2006.229.19:14:34.43#ibcon#about to write, iclass 38, count 0 2006.229.19:14:34.43#ibcon#wrote, iclass 38, count 0 2006.229.19:14:34.43#ibcon#about to read 3, iclass 38, count 0 2006.229.19:14:34.45#ibcon#read 3, iclass 38, count 0 2006.229.19:14:34.45#ibcon#about to read 4, iclass 38, count 0 2006.229.19:14:34.45#ibcon#read 4, iclass 38, count 0 2006.229.19:14:34.45#ibcon#about to read 5, iclass 38, count 0 2006.229.19:14:34.45#ibcon#read 5, iclass 38, count 0 2006.229.19:14:34.45#ibcon#about to read 6, iclass 38, count 0 2006.229.19:14:34.45#ibcon#read 6, iclass 38, count 0 2006.229.19:14:34.45#ibcon#end of sib2, iclass 38, count 0 2006.229.19:14:34.45#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:14:34.45#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:14:34.45#ibcon#[25=USB\r\n] 2006.229.19:14:34.45#ibcon#*before write, iclass 38, count 0 2006.229.19:14:34.45#ibcon#enter sib2, iclass 38, count 0 2006.229.19:14:34.45#ibcon#flushed, iclass 38, count 0 2006.229.19:14:34.45#ibcon#about to write, iclass 38, count 0 2006.229.19:14:34.45#ibcon#wrote, iclass 38, count 0 2006.229.19:14:34.45#ibcon#about to read 3, iclass 38, count 0 2006.229.19:14:34.48#ibcon#read 3, iclass 38, count 0 2006.229.19:14:34.48#ibcon#about to read 4, iclass 38, count 0 2006.229.19:14:34.48#ibcon#read 4, iclass 38, count 0 2006.229.19:14:34.48#ibcon#about to read 5, iclass 38, count 0 2006.229.19:14:34.48#ibcon#read 5, iclass 38, count 0 2006.229.19:14:34.48#ibcon#about to read 6, iclass 38, count 0 2006.229.19:14:34.48#ibcon#read 6, iclass 38, count 0 2006.229.19:14:34.48#ibcon#end of sib2, iclass 38, count 0 2006.229.19:14:34.48#ibcon#*after write, iclass 38, count 0 2006.229.19:14:34.48#ibcon#*before return 0, iclass 38, count 0 2006.229.19:14:34.48#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:34.48#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:34.48#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:14:34.48#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:14:34.48$vck44/valo=5,734.99 2006.229.19:14:34.48#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.19:14:34.48#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.19:14:34.48#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:34.48#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:14:34.48#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:14:34.48#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:14:34.48#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:14:34.48#ibcon#first serial, iclass 40, count 0 2006.229.19:14:34.48#ibcon#enter sib2, iclass 40, count 0 2006.229.19:14:34.48#ibcon#flushed, iclass 40, count 0 2006.229.19:14:34.48#ibcon#about to write, iclass 40, count 0 2006.229.19:14:34.48#ibcon#wrote, iclass 40, count 0 2006.229.19:14:34.48#ibcon#about to read 3, iclass 40, count 0 2006.229.19:14:34.50#ibcon#read 3, iclass 40, count 0 2006.229.19:14:34.50#ibcon#about to read 4, iclass 40, count 0 2006.229.19:14:34.50#ibcon#read 4, iclass 40, count 0 2006.229.19:14:34.50#ibcon#about to read 5, iclass 40, count 0 2006.229.19:14:34.50#ibcon#read 5, iclass 40, count 0 2006.229.19:14:34.50#ibcon#about to read 6, iclass 40, count 0 2006.229.19:14:34.50#ibcon#read 6, iclass 40, count 0 2006.229.19:14:34.50#ibcon#end of sib2, iclass 40, count 0 2006.229.19:14:34.50#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:14:34.50#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:14:34.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:14:34.50#ibcon#*before write, iclass 40, count 0 2006.229.19:14:34.50#ibcon#enter sib2, iclass 40, count 0 2006.229.19:14:34.50#ibcon#flushed, iclass 40, count 0 2006.229.19:14:34.50#ibcon#about to write, iclass 40, count 0 2006.229.19:14:34.50#ibcon#wrote, iclass 40, count 0 2006.229.19:14:34.50#ibcon#about to read 3, iclass 40, count 0 2006.229.19:14:34.54#ibcon#read 3, iclass 40, count 0 2006.229.19:14:34.54#ibcon#about to read 4, iclass 40, count 0 2006.229.19:14:34.54#ibcon#read 4, iclass 40, count 0 2006.229.19:14:34.54#ibcon#about to read 5, iclass 40, count 0 2006.229.19:14:34.54#ibcon#read 5, iclass 40, count 0 2006.229.19:14:34.54#ibcon#about to read 6, iclass 40, count 0 2006.229.19:14:34.54#ibcon#read 6, iclass 40, count 0 2006.229.19:14:34.54#ibcon#end of sib2, iclass 40, count 0 2006.229.19:14:34.54#ibcon#*after write, iclass 40, count 0 2006.229.19:14:34.54#ibcon#*before return 0, iclass 40, count 0 2006.229.19:14:34.54#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:14:34.54#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:14:34.54#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:14:34.54#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:14:34.54$vck44/va=5,4 2006.229.19:14:34.54#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.19:14:34.54#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.19:14:34.54#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:34.54#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:14:34.60#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:14:34.60#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:14:34.60#ibcon#enter wrdev, iclass 4, count 2 2006.229.19:14:34.60#ibcon#first serial, iclass 4, count 2 2006.229.19:14:34.60#ibcon#enter sib2, iclass 4, count 2 2006.229.19:14:34.60#ibcon#flushed, iclass 4, count 2 2006.229.19:14:34.60#ibcon#about to write, iclass 4, count 2 2006.229.19:14:34.60#ibcon#wrote, iclass 4, count 2 2006.229.19:14:34.60#ibcon#about to read 3, iclass 4, count 2 2006.229.19:14:34.62#ibcon#read 3, iclass 4, count 2 2006.229.19:14:34.62#ibcon#about to read 4, iclass 4, count 2 2006.229.19:14:34.62#ibcon#read 4, iclass 4, count 2 2006.229.19:14:34.62#ibcon#about to read 5, iclass 4, count 2 2006.229.19:14:34.62#ibcon#read 5, iclass 4, count 2 2006.229.19:14:34.62#ibcon#about to read 6, iclass 4, count 2 2006.229.19:14:34.62#ibcon#read 6, iclass 4, count 2 2006.229.19:14:34.62#ibcon#end of sib2, iclass 4, count 2 2006.229.19:14:34.62#ibcon#*mode == 0, iclass 4, count 2 2006.229.19:14:34.62#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.19:14:34.62#ibcon#[25=AT05-04\r\n] 2006.229.19:14:34.62#ibcon#*before write, iclass 4, count 2 2006.229.19:14:34.62#ibcon#enter sib2, iclass 4, count 2 2006.229.19:14:34.62#ibcon#flushed, iclass 4, count 2 2006.229.19:14:34.62#ibcon#about to write, iclass 4, count 2 2006.229.19:14:34.62#ibcon#wrote, iclass 4, count 2 2006.229.19:14:34.62#ibcon#about to read 3, iclass 4, count 2 2006.229.19:14:34.65#ibcon#read 3, iclass 4, count 2 2006.229.19:14:34.65#ibcon#about to read 4, iclass 4, count 2 2006.229.19:14:34.65#ibcon#read 4, iclass 4, count 2 2006.229.19:14:34.65#ibcon#about to read 5, iclass 4, count 2 2006.229.19:14:34.65#ibcon#read 5, iclass 4, count 2 2006.229.19:14:34.65#ibcon#about to read 6, iclass 4, count 2 2006.229.19:14:34.65#ibcon#read 6, iclass 4, count 2 2006.229.19:14:34.65#ibcon#end of sib2, iclass 4, count 2 2006.229.19:14:34.65#ibcon#*after write, iclass 4, count 2 2006.229.19:14:34.65#ibcon#*before return 0, iclass 4, count 2 2006.229.19:14:34.65#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:14:34.65#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:14:34.65#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.19:14:34.65#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:34.65#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:14:34.77#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:14:34.77#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:14:34.77#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:14:34.77#ibcon#first serial, iclass 4, count 0 2006.229.19:14:34.77#ibcon#enter sib2, iclass 4, count 0 2006.229.19:14:34.77#ibcon#flushed, iclass 4, count 0 2006.229.19:14:34.77#ibcon#about to write, iclass 4, count 0 2006.229.19:14:34.77#ibcon#wrote, iclass 4, count 0 2006.229.19:14:34.77#ibcon#about to read 3, iclass 4, count 0 2006.229.19:14:34.79#ibcon#read 3, iclass 4, count 0 2006.229.19:14:34.79#ibcon#about to read 4, iclass 4, count 0 2006.229.19:14:34.79#ibcon#read 4, iclass 4, count 0 2006.229.19:14:34.79#ibcon#about to read 5, iclass 4, count 0 2006.229.19:14:34.79#ibcon#read 5, iclass 4, count 0 2006.229.19:14:34.79#ibcon#about to read 6, iclass 4, count 0 2006.229.19:14:34.79#ibcon#read 6, iclass 4, count 0 2006.229.19:14:34.79#ibcon#end of sib2, iclass 4, count 0 2006.229.19:14:34.79#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:14:34.79#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:14:34.79#ibcon#[25=USB\r\n] 2006.229.19:14:34.79#ibcon#*before write, iclass 4, count 0 2006.229.19:14:34.79#ibcon#enter sib2, iclass 4, count 0 2006.229.19:14:34.79#ibcon#flushed, iclass 4, count 0 2006.229.19:14:34.79#ibcon#about to write, iclass 4, count 0 2006.229.19:14:34.79#ibcon#wrote, iclass 4, count 0 2006.229.19:14:34.79#ibcon#about to read 3, iclass 4, count 0 2006.229.19:14:34.82#ibcon#read 3, iclass 4, count 0 2006.229.19:14:34.82#ibcon#about to read 4, iclass 4, count 0 2006.229.19:14:34.82#ibcon#read 4, iclass 4, count 0 2006.229.19:14:34.82#ibcon#about to read 5, iclass 4, count 0 2006.229.19:14:34.82#ibcon#read 5, iclass 4, count 0 2006.229.19:14:34.82#ibcon#about to read 6, iclass 4, count 0 2006.229.19:14:34.82#ibcon#read 6, iclass 4, count 0 2006.229.19:14:34.82#ibcon#end of sib2, iclass 4, count 0 2006.229.19:14:34.82#ibcon#*after write, iclass 4, count 0 2006.229.19:14:34.82#ibcon#*before return 0, iclass 4, count 0 2006.229.19:14:34.82#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:14:34.82#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:14:34.82#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:14:34.82#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:14:34.82$vck44/valo=6,814.99 2006.229.19:14:34.82#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.19:14:34.82#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.19:14:34.82#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:34.82#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:14:34.82#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:14:34.82#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:14:34.82#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:14:34.82#ibcon#first serial, iclass 6, count 0 2006.229.19:14:34.82#ibcon#enter sib2, iclass 6, count 0 2006.229.19:14:34.82#ibcon#flushed, iclass 6, count 0 2006.229.19:14:34.82#ibcon#about to write, iclass 6, count 0 2006.229.19:14:34.82#ibcon#wrote, iclass 6, count 0 2006.229.19:14:34.82#ibcon#about to read 3, iclass 6, count 0 2006.229.19:14:34.84#ibcon#read 3, iclass 6, count 0 2006.229.19:14:34.84#ibcon#about to read 4, iclass 6, count 0 2006.229.19:14:34.84#ibcon#read 4, iclass 6, count 0 2006.229.19:14:34.84#ibcon#about to read 5, iclass 6, count 0 2006.229.19:14:34.84#ibcon#read 5, iclass 6, count 0 2006.229.19:14:34.84#ibcon#about to read 6, iclass 6, count 0 2006.229.19:14:34.84#ibcon#read 6, iclass 6, count 0 2006.229.19:14:34.84#ibcon#end of sib2, iclass 6, count 0 2006.229.19:14:34.84#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:14:34.84#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:14:34.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:14:34.84#ibcon#*before write, iclass 6, count 0 2006.229.19:14:34.84#ibcon#enter sib2, iclass 6, count 0 2006.229.19:14:34.84#ibcon#flushed, iclass 6, count 0 2006.229.19:14:34.84#ibcon#about to write, iclass 6, count 0 2006.229.19:14:34.84#ibcon#wrote, iclass 6, count 0 2006.229.19:14:34.84#ibcon#about to read 3, iclass 6, count 0 2006.229.19:14:34.88#ibcon#read 3, iclass 6, count 0 2006.229.19:14:34.88#ibcon#about to read 4, iclass 6, count 0 2006.229.19:14:34.88#ibcon#read 4, iclass 6, count 0 2006.229.19:14:34.88#ibcon#about to read 5, iclass 6, count 0 2006.229.19:14:34.88#ibcon#read 5, iclass 6, count 0 2006.229.19:14:34.88#ibcon#about to read 6, iclass 6, count 0 2006.229.19:14:34.88#ibcon#read 6, iclass 6, count 0 2006.229.19:14:34.88#ibcon#end of sib2, iclass 6, count 0 2006.229.19:14:34.88#ibcon#*after write, iclass 6, count 0 2006.229.19:14:34.88#ibcon#*before return 0, iclass 6, count 0 2006.229.19:14:34.88#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:14:34.88#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:14:34.88#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:14:34.88#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:14:34.88$vck44/va=6,4 2006.229.19:14:34.88#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.19:14:34.88#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.19:14:34.88#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:34.88#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:14:34.94#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:14:34.94#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:14:34.94#ibcon#enter wrdev, iclass 10, count 2 2006.229.19:14:34.94#ibcon#first serial, iclass 10, count 2 2006.229.19:14:34.94#ibcon#enter sib2, iclass 10, count 2 2006.229.19:14:34.94#ibcon#flushed, iclass 10, count 2 2006.229.19:14:34.94#ibcon#about to write, iclass 10, count 2 2006.229.19:14:34.94#ibcon#wrote, iclass 10, count 2 2006.229.19:14:34.94#ibcon#about to read 3, iclass 10, count 2 2006.229.19:14:34.96#ibcon#read 3, iclass 10, count 2 2006.229.19:14:34.96#ibcon#about to read 4, iclass 10, count 2 2006.229.19:14:34.96#ibcon#read 4, iclass 10, count 2 2006.229.19:14:34.96#ibcon#about to read 5, iclass 10, count 2 2006.229.19:14:34.96#ibcon#read 5, iclass 10, count 2 2006.229.19:14:34.96#ibcon#about to read 6, iclass 10, count 2 2006.229.19:14:34.96#ibcon#read 6, iclass 10, count 2 2006.229.19:14:34.96#ibcon#end of sib2, iclass 10, count 2 2006.229.19:14:34.96#ibcon#*mode == 0, iclass 10, count 2 2006.229.19:14:34.96#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.19:14:34.96#ibcon#[25=AT06-04\r\n] 2006.229.19:14:34.96#ibcon#*before write, iclass 10, count 2 2006.229.19:14:34.96#ibcon#enter sib2, iclass 10, count 2 2006.229.19:14:34.96#ibcon#flushed, iclass 10, count 2 2006.229.19:14:34.96#ibcon#about to write, iclass 10, count 2 2006.229.19:14:34.96#ibcon#wrote, iclass 10, count 2 2006.229.19:14:34.96#ibcon#about to read 3, iclass 10, count 2 2006.229.19:14:34.99#ibcon#read 3, iclass 10, count 2 2006.229.19:14:34.99#ibcon#about to read 4, iclass 10, count 2 2006.229.19:14:34.99#ibcon#read 4, iclass 10, count 2 2006.229.19:14:34.99#ibcon#about to read 5, iclass 10, count 2 2006.229.19:14:34.99#ibcon#read 5, iclass 10, count 2 2006.229.19:14:34.99#ibcon#about to read 6, iclass 10, count 2 2006.229.19:14:34.99#ibcon#read 6, iclass 10, count 2 2006.229.19:14:34.99#ibcon#end of sib2, iclass 10, count 2 2006.229.19:14:34.99#ibcon#*after write, iclass 10, count 2 2006.229.19:14:34.99#ibcon#*before return 0, iclass 10, count 2 2006.229.19:14:34.99#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:14:34.99#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:14:34.99#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.19:14:34.99#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:34.99#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:14:35.11#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:14:35.11#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:14:35.11#ibcon#enter wrdev, iclass 10, count 0 2006.229.19:14:35.11#ibcon#first serial, iclass 10, count 0 2006.229.19:14:35.11#ibcon#enter sib2, iclass 10, count 0 2006.229.19:14:35.11#ibcon#flushed, iclass 10, count 0 2006.229.19:14:35.11#ibcon#about to write, iclass 10, count 0 2006.229.19:14:35.11#ibcon#wrote, iclass 10, count 0 2006.229.19:14:35.11#ibcon#about to read 3, iclass 10, count 0 2006.229.19:14:35.13#ibcon#read 3, iclass 10, count 0 2006.229.19:14:35.13#ibcon#about to read 4, iclass 10, count 0 2006.229.19:14:35.13#ibcon#read 4, iclass 10, count 0 2006.229.19:14:35.13#ibcon#about to read 5, iclass 10, count 0 2006.229.19:14:35.13#ibcon#read 5, iclass 10, count 0 2006.229.19:14:35.13#ibcon#about to read 6, iclass 10, count 0 2006.229.19:14:35.13#ibcon#read 6, iclass 10, count 0 2006.229.19:14:35.13#ibcon#end of sib2, iclass 10, count 0 2006.229.19:14:35.13#ibcon#*mode == 0, iclass 10, count 0 2006.229.19:14:35.13#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.19:14:35.13#ibcon#[25=USB\r\n] 2006.229.19:14:35.13#ibcon#*before write, iclass 10, count 0 2006.229.19:14:35.13#ibcon#enter sib2, iclass 10, count 0 2006.229.19:14:35.13#ibcon#flushed, iclass 10, count 0 2006.229.19:14:35.13#ibcon#about to write, iclass 10, count 0 2006.229.19:14:35.13#ibcon#wrote, iclass 10, count 0 2006.229.19:14:35.13#ibcon#about to read 3, iclass 10, count 0 2006.229.19:14:35.16#ibcon#read 3, iclass 10, count 0 2006.229.19:14:35.16#ibcon#about to read 4, iclass 10, count 0 2006.229.19:14:35.16#ibcon#read 4, iclass 10, count 0 2006.229.19:14:35.16#ibcon#about to read 5, iclass 10, count 0 2006.229.19:14:35.16#ibcon#read 5, iclass 10, count 0 2006.229.19:14:35.16#ibcon#about to read 6, iclass 10, count 0 2006.229.19:14:35.16#ibcon#read 6, iclass 10, count 0 2006.229.19:14:35.16#ibcon#end of sib2, iclass 10, count 0 2006.229.19:14:35.16#ibcon#*after write, iclass 10, count 0 2006.229.19:14:35.16#ibcon#*before return 0, iclass 10, count 0 2006.229.19:14:35.16#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:14:35.16#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:14:35.16#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.19:14:35.16#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.19:14:35.16$vck44/valo=7,864.99 2006.229.19:14:35.16#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.19:14:35.16#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.19:14:35.16#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:35.16#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:35.16#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:35.16#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:35.16#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:14:35.16#ibcon#first serial, iclass 12, count 0 2006.229.19:14:35.16#ibcon#enter sib2, iclass 12, count 0 2006.229.19:14:35.16#ibcon#flushed, iclass 12, count 0 2006.229.19:14:35.16#ibcon#about to write, iclass 12, count 0 2006.229.19:14:35.16#ibcon#wrote, iclass 12, count 0 2006.229.19:14:35.16#ibcon#about to read 3, iclass 12, count 0 2006.229.19:14:35.18#ibcon#read 3, iclass 12, count 0 2006.229.19:14:35.18#ibcon#about to read 4, iclass 12, count 0 2006.229.19:14:35.18#ibcon#read 4, iclass 12, count 0 2006.229.19:14:35.18#ibcon#about to read 5, iclass 12, count 0 2006.229.19:14:35.18#ibcon#read 5, iclass 12, count 0 2006.229.19:14:35.18#ibcon#about to read 6, iclass 12, count 0 2006.229.19:14:35.18#ibcon#read 6, iclass 12, count 0 2006.229.19:14:35.18#ibcon#end of sib2, iclass 12, count 0 2006.229.19:14:35.18#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:14:35.18#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:14:35.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:14:35.18#ibcon#*before write, iclass 12, count 0 2006.229.19:14:35.18#ibcon#enter sib2, iclass 12, count 0 2006.229.19:14:35.18#ibcon#flushed, iclass 12, count 0 2006.229.19:14:35.18#ibcon#about to write, iclass 12, count 0 2006.229.19:14:35.18#ibcon#wrote, iclass 12, count 0 2006.229.19:14:35.18#ibcon#about to read 3, iclass 12, count 0 2006.229.19:14:35.22#ibcon#read 3, iclass 12, count 0 2006.229.19:14:35.22#ibcon#about to read 4, iclass 12, count 0 2006.229.19:14:35.22#ibcon#read 4, iclass 12, count 0 2006.229.19:14:35.22#ibcon#about to read 5, iclass 12, count 0 2006.229.19:14:35.22#ibcon#read 5, iclass 12, count 0 2006.229.19:14:35.22#ibcon#about to read 6, iclass 12, count 0 2006.229.19:14:35.22#ibcon#read 6, iclass 12, count 0 2006.229.19:14:35.22#ibcon#end of sib2, iclass 12, count 0 2006.229.19:14:35.22#ibcon#*after write, iclass 12, count 0 2006.229.19:14:35.22#ibcon#*before return 0, iclass 12, count 0 2006.229.19:14:35.22#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:35.22#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:35.22#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:14:35.22#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:14:35.22$vck44/va=7,5 2006.229.19:14:35.22#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.19:14:35.22#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.19:14:35.22#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:35.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:35.28#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:35.28#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:35.28#ibcon#enter wrdev, iclass 14, count 2 2006.229.19:14:35.28#ibcon#first serial, iclass 14, count 2 2006.229.19:14:35.28#ibcon#enter sib2, iclass 14, count 2 2006.229.19:14:35.28#ibcon#flushed, iclass 14, count 2 2006.229.19:14:35.28#ibcon#about to write, iclass 14, count 2 2006.229.19:14:35.28#ibcon#wrote, iclass 14, count 2 2006.229.19:14:35.28#ibcon#about to read 3, iclass 14, count 2 2006.229.19:14:35.30#ibcon#read 3, iclass 14, count 2 2006.229.19:14:35.30#ibcon#about to read 4, iclass 14, count 2 2006.229.19:14:35.30#ibcon#read 4, iclass 14, count 2 2006.229.19:14:35.30#ibcon#about to read 5, iclass 14, count 2 2006.229.19:14:35.30#ibcon#read 5, iclass 14, count 2 2006.229.19:14:35.30#ibcon#about to read 6, iclass 14, count 2 2006.229.19:14:35.30#ibcon#read 6, iclass 14, count 2 2006.229.19:14:35.30#ibcon#end of sib2, iclass 14, count 2 2006.229.19:14:35.30#ibcon#*mode == 0, iclass 14, count 2 2006.229.19:14:35.30#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.19:14:35.30#ibcon#[25=AT07-05\r\n] 2006.229.19:14:35.30#ibcon#*before write, iclass 14, count 2 2006.229.19:14:35.30#ibcon#enter sib2, iclass 14, count 2 2006.229.19:14:35.30#ibcon#flushed, iclass 14, count 2 2006.229.19:14:35.30#ibcon#about to write, iclass 14, count 2 2006.229.19:14:35.30#ibcon#wrote, iclass 14, count 2 2006.229.19:14:35.30#ibcon#about to read 3, iclass 14, count 2 2006.229.19:14:35.33#ibcon#read 3, iclass 14, count 2 2006.229.19:14:35.33#ibcon#about to read 4, iclass 14, count 2 2006.229.19:14:35.33#ibcon#read 4, iclass 14, count 2 2006.229.19:14:35.33#ibcon#about to read 5, iclass 14, count 2 2006.229.19:14:35.33#ibcon#read 5, iclass 14, count 2 2006.229.19:14:35.33#ibcon#about to read 6, iclass 14, count 2 2006.229.19:14:35.33#ibcon#read 6, iclass 14, count 2 2006.229.19:14:35.33#ibcon#end of sib2, iclass 14, count 2 2006.229.19:14:35.33#ibcon#*after write, iclass 14, count 2 2006.229.19:14:35.33#ibcon#*before return 0, iclass 14, count 2 2006.229.19:14:35.33#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:35.33#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:35.33#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.19:14:35.33#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:35.33#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:35.45#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:35.45#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:35.45#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:14:35.45#ibcon#first serial, iclass 14, count 0 2006.229.19:14:35.45#ibcon#enter sib2, iclass 14, count 0 2006.229.19:14:35.45#ibcon#flushed, iclass 14, count 0 2006.229.19:14:35.45#ibcon#about to write, iclass 14, count 0 2006.229.19:14:35.45#ibcon#wrote, iclass 14, count 0 2006.229.19:14:35.45#ibcon#about to read 3, iclass 14, count 0 2006.229.19:14:35.47#ibcon#read 3, iclass 14, count 0 2006.229.19:14:35.47#ibcon#about to read 4, iclass 14, count 0 2006.229.19:14:35.47#ibcon#read 4, iclass 14, count 0 2006.229.19:14:35.47#ibcon#about to read 5, iclass 14, count 0 2006.229.19:14:35.47#ibcon#read 5, iclass 14, count 0 2006.229.19:14:35.47#ibcon#about to read 6, iclass 14, count 0 2006.229.19:14:35.47#ibcon#read 6, iclass 14, count 0 2006.229.19:14:35.47#ibcon#end of sib2, iclass 14, count 0 2006.229.19:14:35.47#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:14:35.47#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:14:35.47#ibcon#[25=USB\r\n] 2006.229.19:14:35.47#ibcon#*before write, iclass 14, count 0 2006.229.19:14:35.47#ibcon#enter sib2, iclass 14, count 0 2006.229.19:14:35.47#ibcon#flushed, iclass 14, count 0 2006.229.19:14:35.47#ibcon#about to write, iclass 14, count 0 2006.229.19:14:35.47#ibcon#wrote, iclass 14, count 0 2006.229.19:14:35.47#ibcon#about to read 3, iclass 14, count 0 2006.229.19:14:35.50#ibcon#read 3, iclass 14, count 0 2006.229.19:14:35.50#ibcon#about to read 4, iclass 14, count 0 2006.229.19:14:35.50#ibcon#read 4, iclass 14, count 0 2006.229.19:14:35.50#ibcon#about to read 5, iclass 14, count 0 2006.229.19:14:35.50#ibcon#read 5, iclass 14, count 0 2006.229.19:14:35.50#ibcon#about to read 6, iclass 14, count 0 2006.229.19:14:35.50#ibcon#read 6, iclass 14, count 0 2006.229.19:14:35.50#ibcon#end of sib2, iclass 14, count 0 2006.229.19:14:35.50#ibcon#*after write, iclass 14, count 0 2006.229.19:14:35.50#ibcon#*before return 0, iclass 14, count 0 2006.229.19:14:35.50#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:35.50#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:35.50#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:14:35.50#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:14:35.50$vck44/valo=8,884.99 2006.229.19:14:35.50#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.19:14:35.50#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.19:14:35.50#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:35.50#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:35.50#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:35.50#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:35.50#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:14:35.50#ibcon#first serial, iclass 16, count 0 2006.229.19:14:35.50#ibcon#enter sib2, iclass 16, count 0 2006.229.19:14:35.50#ibcon#flushed, iclass 16, count 0 2006.229.19:14:35.50#ibcon#about to write, iclass 16, count 0 2006.229.19:14:35.50#ibcon#wrote, iclass 16, count 0 2006.229.19:14:35.50#ibcon#about to read 3, iclass 16, count 0 2006.229.19:14:35.52#ibcon#read 3, iclass 16, count 0 2006.229.19:14:35.52#ibcon#about to read 4, iclass 16, count 0 2006.229.19:14:35.52#ibcon#read 4, iclass 16, count 0 2006.229.19:14:35.52#ibcon#about to read 5, iclass 16, count 0 2006.229.19:14:35.52#ibcon#read 5, iclass 16, count 0 2006.229.19:14:35.52#ibcon#about to read 6, iclass 16, count 0 2006.229.19:14:35.52#ibcon#read 6, iclass 16, count 0 2006.229.19:14:35.52#ibcon#end of sib2, iclass 16, count 0 2006.229.19:14:35.52#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:14:35.52#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:14:35.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:14:35.52#ibcon#*before write, iclass 16, count 0 2006.229.19:14:35.52#ibcon#enter sib2, iclass 16, count 0 2006.229.19:14:35.52#ibcon#flushed, iclass 16, count 0 2006.229.19:14:35.52#ibcon#about to write, iclass 16, count 0 2006.229.19:14:35.52#ibcon#wrote, iclass 16, count 0 2006.229.19:14:35.52#ibcon#about to read 3, iclass 16, count 0 2006.229.19:14:35.56#ibcon#read 3, iclass 16, count 0 2006.229.19:14:35.56#ibcon#about to read 4, iclass 16, count 0 2006.229.19:14:35.56#ibcon#read 4, iclass 16, count 0 2006.229.19:14:35.56#ibcon#about to read 5, iclass 16, count 0 2006.229.19:14:35.56#ibcon#read 5, iclass 16, count 0 2006.229.19:14:35.56#ibcon#about to read 6, iclass 16, count 0 2006.229.19:14:35.56#ibcon#read 6, iclass 16, count 0 2006.229.19:14:35.56#ibcon#end of sib2, iclass 16, count 0 2006.229.19:14:35.56#ibcon#*after write, iclass 16, count 0 2006.229.19:14:35.56#ibcon#*before return 0, iclass 16, count 0 2006.229.19:14:35.56#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:35.56#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:35.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:14:35.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:14:35.56$vck44/va=8,6 2006.229.19:14:35.56#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.19:14:35.56#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.19:14:35.56#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:35.56#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:35.62#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:35.62#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:35.62#ibcon#enter wrdev, iclass 18, count 2 2006.229.19:14:35.62#ibcon#first serial, iclass 18, count 2 2006.229.19:14:35.62#ibcon#enter sib2, iclass 18, count 2 2006.229.19:14:35.62#ibcon#flushed, iclass 18, count 2 2006.229.19:14:35.62#ibcon#about to write, iclass 18, count 2 2006.229.19:14:35.62#ibcon#wrote, iclass 18, count 2 2006.229.19:14:35.62#ibcon#about to read 3, iclass 18, count 2 2006.229.19:14:35.64#ibcon#read 3, iclass 18, count 2 2006.229.19:14:35.64#ibcon#about to read 4, iclass 18, count 2 2006.229.19:14:35.64#ibcon#read 4, iclass 18, count 2 2006.229.19:14:35.64#ibcon#about to read 5, iclass 18, count 2 2006.229.19:14:35.64#ibcon#read 5, iclass 18, count 2 2006.229.19:14:35.64#ibcon#about to read 6, iclass 18, count 2 2006.229.19:14:35.64#ibcon#read 6, iclass 18, count 2 2006.229.19:14:35.64#ibcon#end of sib2, iclass 18, count 2 2006.229.19:14:35.64#ibcon#*mode == 0, iclass 18, count 2 2006.229.19:14:35.64#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.19:14:35.64#ibcon#[25=AT08-06\r\n] 2006.229.19:14:35.64#ibcon#*before write, iclass 18, count 2 2006.229.19:14:35.64#ibcon#enter sib2, iclass 18, count 2 2006.229.19:14:35.64#ibcon#flushed, iclass 18, count 2 2006.229.19:14:35.64#ibcon#about to write, iclass 18, count 2 2006.229.19:14:35.64#ibcon#wrote, iclass 18, count 2 2006.229.19:14:35.64#ibcon#about to read 3, iclass 18, count 2 2006.229.19:14:35.67#ibcon#read 3, iclass 18, count 2 2006.229.19:14:35.67#ibcon#about to read 4, iclass 18, count 2 2006.229.19:14:35.67#ibcon#read 4, iclass 18, count 2 2006.229.19:14:35.67#ibcon#about to read 5, iclass 18, count 2 2006.229.19:14:35.67#ibcon#read 5, iclass 18, count 2 2006.229.19:14:35.67#ibcon#about to read 6, iclass 18, count 2 2006.229.19:14:35.67#ibcon#read 6, iclass 18, count 2 2006.229.19:14:35.67#ibcon#end of sib2, iclass 18, count 2 2006.229.19:14:35.67#ibcon#*after write, iclass 18, count 2 2006.229.19:14:35.67#ibcon#*before return 0, iclass 18, count 2 2006.229.19:14:35.67#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:35.67#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:35.67#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.19:14:35.67#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:35.67#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:35.79#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:35.79#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:35.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:14:35.79#ibcon#first serial, iclass 18, count 0 2006.229.19:14:35.79#ibcon#enter sib2, iclass 18, count 0 2006.229.19:14:35.79#ibcon#flushed, iclass 18, count 0 2006.229.19:14:35.79#ibcon#about to write, iclass 18, count 0 2006.229.19:14:35.79#ibcon#wrote, iclass 18, count 0 2006.229.19:14:35.79#ibcon#about to read 3, iclass 18, count 0 2006.229.19:14:35.81#ibcon#read 3, iclass 18, count 0 2006.229.19:14:35.81#ibcon#about to read 4, iclass 18, count 0 2006.229.19:14:35.81#ibcon#read 4, iclass 18, count 0 2006.229.19:14:35.81#ibcon#about to read 5, iclass 18, count 0 2006.229.19:14:35.81#ibcon#read 5, iclass 18, count 0 2006.229.19:14:35.81#ibcon#about to read 6, iclass 18, count 0 2006.229.19:14:35.81#ibcon#read 6, iclass 18, count 0 2006.229.19:14:35.81#ibcon#end of sib2, iclass 18, count 0 2006.229.19:14:35.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:14:35.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:14:35.81#ibcon#[25=USB\r\n] 2006.229.19:14:35.81#ibcon#*before write, iclass 18, count 0 2006.229.19:14:35.81#ibcon#enter sib2, iclass 18, count 0 2006.229.19:14:35.81#ibcon#flushed, iclass 18, count 0 2006.229.19:14:35.81#ibcon#about to write, iclass 18, count 0 2006.229.19:14:35.81#ibcon#wrote, iclass 18, count 0 2006.229.19:14:35.81#ibcon#about to read 3, iclass 18, count 0 2006.229.19:14:35.84#ibcon#read 3, iclass 18, count 0 2006.229.19:14:35.84#ibcon#about to read 4, iclass 18, count 0 2006.229.19:14:35.84#ibcon#read 4, iclass 18, count 0 2006.229.19:14:35.84#ibcon#about to read 5, iclass 18, count 0 2006.229.19:14:35.84#ibcon#read 5, iclass 18, count 0 2006.229.19:14:35.84#ibcon#about to read 6, iclass 18, count 0 2006.229.19:14:35.84#ibcon#read 6, iclass 18, count 0 2006.229.19:14:35.84#ibcon#end of sib2, iclass 18, count 0 2006.229.19:14:35.84#ibcon#*after write, iclass 18, count 0 2006.229.19:14:35.84#ibcon#*before return 0, iclass 18, count 0 2006.229.19:14:35.84#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:35.84#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:35.84#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:14:35.84#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:14:35.84$vck44/vblo=1,629.99 2006.229.19:14:35.84#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.19:14:35.84#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.19:14:35.84#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:35.84#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:35.84#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:35.84#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:35.84#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:14:35.84#ibcon#first serial, iclass 20, count 0 2006.229.19:14:35.84#ibcon#enter sib2, iclass 20, count 0 2006.229.19:14:35.84#ibcon#flushed, iclass 20, count 0 2006.229.19:14:35.84#ibcon#about to write, iclass 20, count 0 2006.229.19:14:35.84#ibcon#wrote, iclass 20, count 0 2006.229.19:14:35.84#ibcon#about to read 3, iclass 20, count 0 2006.229.19:14:35.86#ibcon#read 3, iclass 20, count 0 2006.229.19:14:35.86#ibcon#about to read 4, iclass 20, count 0 2006.229.19:14:35.86#ibcon#read 4, iclass 20, count 0 2006.229.19:14:35.86#ibcon#about to read 5, iclass 20, count 0 2006.229.19:14:35.86#ibcon#read 5, iclass 20, count 0 2006.229.19:14:35.86#ibcon#about to read 6, iclass 20, count 0 2006.229.19:14:35.86#ibcon#read 6, iclass 20, count 0 2006.229.19:14:35.86#ibcon#end of sib2, iclass 20, count 0 2006.229.19:14:35.86#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:14:35.86#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:14:35.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:14:35.86#ibcon#*before write, iclass 20, count 0 2006.229.19:14:35.86#ibcon#enter sib2, iclass 20, count 0 2006.229.19:14:35.86#ibcon#flushed, iclass 20, count 0 2006.229.19:14:35.86#ibcon#about to write, iclass 20, count 0 2006.229.19:14:35.86#ibcon#wrote, iclass 20, count 0 2006.229.19:14:35.86#ibcon#about to read 3, iclass 20, count 0 2006.229.19:14:35.90#ibcon#read 3, iclass 20, count 0 2006.229.19:14:35.90#ibcon#about to read 4, iclass 20, count 0 2006.229.19:14:35.90#ibcon#read 4, iclass 20, count 0 2006.229.19:14:35.90#ibcon#about to read 5, iclass 20, count 0 2006.229.19:14:35.90#ibcon#read 5, iclass 20, count 0 2006.229.19:14:35.90#ibcon#about to read 6, iclass 20, count 0 2006.229.19:14:35.90#ibcon#read 6, iclass 20, count 0 2006.229.19:14:35.90#ibcon#end of sib2, iclass 20, count 0 2006.229.19:14:35.90#ibcon#*after write, iclass 20, count 0 2006.229.19:14:35.90#ibcon#*before return 0, iclass 20, count 0 2006.229.19:14:35.90#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:35.90#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:35.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:14:35.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:14:35.90$vck44/vb=1,4 2006.229.19:14:35.90#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.19:14:35.90#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.19:14:35.90#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:35.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:14:35.90#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:14:35.90#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:14:35.90#ibcon#enter wrdev, iclass 22, count 2 2006.229.19:14:35.90#ibcon#first serial, iclass 22, count 2 2006.229.19:14:35.90#ibcon#enter sib2, iclass 22, count 2 2006.229.19:14:35.90#ibcon#flushed, iclass 22, count 2 2006.229.19:14:35.90#ibcon#about to write, iclass 22, count 2 2006.229.19:14:35.90#ibcon#wrote, iclass 22, count 2 2006.229.19:14:35.90#ibcon#about to read 3, iclass 22, count 2 2006.229.19:14:35.92#ibcon#read 3, iclass 22, count 2 2006.229.19:14:35.92#ibcon#about to read 4, iclass 22, count 2 2006.229.19:14:35.92#ibcon#read 4, iclass 22, count 2 2006.229.19:14:35.92#ibcon#about to read 5, iclass 22, count 2 2006.229.19:14:35.92#ibcon#read 5, iclass 22, count 2 2006.229.19:14:35.92#ibcon#about to read 6, iclass 22, count 2 2006.229.19:14:35.92#ibcon#read 6, iclass 22, count 2 2006.229.19:14:35.92#ibcon#end of sib2, iclass 22, count 2 2006.229.19:14:35.92#ibcon#*mode == 0, iclass 22, count 2 2006.229.19:14:35.92#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.19:14:35.92#ibcon#[27=AT01-04\r\n] 2006.229.19:14:35.92#ibcon#*before write, iclass 22, count 2 2006.229.19:14:35.92#ibcon#enter sib2, iclass 22, count 2 2006.229.19:14:35.92#ibcon#flushed, iclass 22, count 2 2006.229.19:14:35.92#ibcon#about to write, iclass 22, count 2 2006.229.19:14:35.92#ibcon#wrote, iclass 22, count 2 2006.229.19:14:35.92#ibcon#about to read 3, iclass 22, count 2 2006.229.19:14:35.95#ibcon#read 3, iclass 22, count 2 2006.229.19:14:35.95#ibcon#about to read 4, iclass 22, count 2 2006.229.19:14:35.95#ibcon#read 4, iclass 22, count 2 2006.229.19:14:35.95#ibcon#about to read 5, iclass 22, count 2 2006.229.19:14:35.95#ibcon#read 5, iclass 22, count 2 2006.229.19:14:35.95#ibcon#about to read 6, iclass 22, count 2 2006.229.19:14:35.95#ibcon#read 6, iclass 22, count 2 2006.229.19:14:35.95#ibcon#end of sib2, iclass 22, count 2 2006.229.19:14:35.95#ibcon#*after write, iclass 22, count 2 2006.229.19:14:35.95#ibcon#*before return 0, iclass 22, count 2 2006.229.19:14:35.95#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:14:35.95#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:14:35.95#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.19:14:35.95#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:35.95#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:14:36.07#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:14:36.07#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:14:36.07#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:14:36.07#ibcon#first serial, iclass 22, count 0 2006.229.19:14:36.07#ibcon#enter sib2, iclass 22, count 0 2006.229.19:14:36.07#ibcon#flushed, iclass 22, count 0 2006.229.19:14:36.07#ibcon#about to write, iclass 22, count 0 2006.229.19:14:36.07#ibcon#wrote, iclass 22, count 0 2006.229.19:14:36.07#ibcon#about to read 3, iclass 22, count 0 2006.229.19:14:36.09#ibcon#read 3, iclass 22, count 0 2006.229.19:14:36.09#ibcon#about to read 4, iclass 22, count 0 2006.229.19:14:36.09#ibcon#read 4, iclass 22, count 0 2006.229.19:14:36.09#ibcon#about to read 5, iclass 22, count 0 2006.229.19:14:36.09#ibcon#read 5, iclass 22, count 0 2006.229.19:14:36.09#ibcon#about to read 6, iclass 22, count 0 2006.229.19:14:36.09#ibcon#read 6, iclass 22, count 0 2006.229.19:14:36.09#ibcon#end of sib2, iclass 22, count 0 2006.229.19:14:36.09#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:14:36.09#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:14:36.09#ibcon#[27=USB\r\n] 2006.229.19:14:36.09#ibcon#*before write, iclass 22, count 0 2006.229.19:14:36.09#ibcon#enter sib2, iclass 22, count 0 2006.229.19:14:36.09#ibcon#flushed, iclass 22, count 0 2006.229.19:14:36.09#ibcon#about to write, iclass 22, count 0 2006.229.19:14:36.09#ibcon#wrote, iclass 22, count 0 2006.229.19:14:36.09#ibcon#about to read 3, iclass 22, count 0 2006.229.19:14:36.12#ibcon#read 3, iclass 22, count 0 2006.229.19:14:36.12#ibcon#about to read 4, iclass 22, count 0 2006.229.19:14:36.12#ibcon#read 4, iclass 22, count 0 2006.229.19:14:36.12#ibcon#about to read 5, iclass 22, count 0 2006.229.19:14:36.12#ibcon#read 5, iclass 22, count 0 2006.229.19:14:36.12#ibcon#about to read 6, iclass 22, count 0 2006.229.19:14:36.12#ibcon#read 6, iclass 22, count 0 2006.229.19:14:36.12#ibcon#end of sib2, iclass 22, count 0 2006.229.19:14:36.12#ibcon#*after write, iclass 22, count 0 2006.229.19:14:36.12#ibcon#*before return 0, iclass 22, count 0 2006.229.19:14:36.12#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:14:36.12#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:14:36.12#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:14:36.12#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:14:36.12$vck44/vblo=2,634.99 2006.229.19:14:36.12#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.19:14:36.12#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.19:14:36.12#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:36.12#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:36.12#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:36.12#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:36.12#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:14:36.12#ibcon#first serial, iclass 24, count 0 2006.229.19:14:36.12#ibcon#enter sib2, iclass 24, count 0 2006.229.19:14:36.12#ibcon#flushed, iclass 24, count 0 2006.229.19:14:36.12#ibcon#about to write, iclass 24, count 0 2006.229.19:14:36.12#ibcon#wrote, iclass 24, count 0 2006.229.19:14:36.12#ibcon#about to read 3, iclass 24, count 0 2006.229.19:14:36.14#ibcon#read 3, iclass 24, count 0 2006.229.19:14:36.14#ibcon#about to read 4, iclass 24, count 0 2006.229.19:14:36.14#ibcon#read 4, iclass 24, count 0 2006.229.19:14:36.14#ibcon#about to read 5, iclass 24, count 0 2006.229.19:14:36.14#ibcon#read 5, iclass 24, count 0 2006.229.19:14:36.14#ibcon#about to read 6, iclass 24, count 0 2006.229.19:14:36.14#ibcon#read 6, iclass 24, count 0 2006.229.19:14:36.14#ibcon#end of sib2, iclass 24, count 0 2006.229.19:14:36.14#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:14:36.14#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:14:36.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:14:36.14#ibcon#*before write, iclass 24, count 0 2006.229.19:14:36.14#ibcon#enter sib2, iclass 24, count 0 2006.229.19:14:36.14#ibcon#flushed, iclass 24, count 0 2006.229.19:14:36.14#ibcon#about to write, iclass 24, count 0 2006.229.19:14:36.14#ibcon#wrote, iclass 24, count 0 2006.229.19:14:36.14#ibcon#about to read 3, iclass 24, count 0 2006.229.19:14:36.18#ibcon#read 3, iclass 24, count 0 2006.229.19:14:36.18#ibcon#about to read 4, iclass 24, count 0 2006.229.19:14:36.18#ibcon#read 4, iclass 24, count 0 2006.229.19:14:36.18#ibcon#about to read 5, iclass 24, count 0 2006.229.19:14:36.18#ibcon#read 5, iclass 24, count 0 2006.229.19:14:36.18#ibcon#about to read 6, iclass 24, count 0 2006.229.19:14:36.18#ibcon#read 6, iclass 24, count 0 2006.229.19:14:36.18#ibcon#end of sib2, iclass 24, count 0 2006.229.19:14:36.18#ibcon#*after write, iclass 24, count 0 2006.229.19:14:36.18#ibcon#*before return 0, iclass 24, count 0 2006.229.19:14:36.18#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:36.18#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:14:36.18#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:14:36.18#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:14:36.18$vck44/vb=2,4 2006.229.19:14:36.18#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.19:14:36.18#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.19:14:36.18#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:36.18#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:36.24#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:36.24#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:36.24#ibcon#enter wrdev, iclass 26, count 2 2006.229.19:14:36.24#ibcon#first serial, iclass 26, count 2 2006.229.19:14:36.24#ibcon#enter sib2, iclass 26, count 2 2006.229.19:14:36.24#ibcon#flushed, iclass 26, count 2 2006.229.19:14:36.24#ibcon#about to write, iclass 26, count 2 2006.229.19:14:36.24#ibcon#wrote, iclass 26, count 2 2006.229.19:14:36.24#ibcon#about to read 3, iclass 26, count 2 2006.229.19:14:36.26#ibcon#read 3, iclass 26, count 2 2006.229.19:14:36.26#ibcon#about to read 4, iclass 26, count 2 2006.229.19:14:36.26#ibcon#read 4, iclass 26, count 2 2006.229.19:14:36.26#ibcon#about to read 5, iclass 26, count 2 2006.229.19:14:36.26#ibcon#read 5, iclass 26, count 2 2006.229.19:14:36.26#ibcon#about to read 6, iclass 26, count 2 2006.229.19:14:36.26#ibcon#read 6, iclass 26, count 2 2006.229.19:14:36.26#ibcon#end of sib2, iclass 26, count 2 2006.229.19:14:36.26#ibcon#*mode == 0, iclass 26, count 2 2006.229.19:14:36.26#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.19:14:36.26#ibcon#[27=AT02-04\r\n] 2006.229.19:14:36.26#ibcon#*before write, iclass 26, count 2 2006.229.19:14:36.26#ibcon#enter sib2, iclass 26, count 2 2006.229.19:14:36.26#ibcon#flushed, iclass 26, count 2 2006.229.19:14:36.26#ibcon#about to write, iclass 26, count 2 2006.229.19:14:36.26#ibcon#wrote, iclass 26, count 2 2006.229.19:14:36.26#ibcon#about to read 3, iclass 26, count 2 2006.229.19:14:36.29#ibcon#read 3, iclass 26, count 2 2006.229.19:14:36.29#ibcon#about to read 4, iclass 26, count 2 2006.229.19:14:36.29#ibcon#read 4, iclass 26, count 2 2006.229.19:14:36.29#ibcon#about to read 5, iclass 26, count 2 2006.229.19:14:36.29#ibcon#read 5, iclass 26, count 2 2006.229.19:14:36.29#ibcon#about to read 6, iclass 26, count 2 2006.229.19:14:36.29#ibcon#read 6, iclass 26, count 2 2006.229.19:14:36.29#ibcon#end of sib2, iclass 26, count 2 2006.229.19:14:36.29#ibcon#*after write, iclass 26, count 2 2006.229.19:14:36.29#ibcon#*before return 0, iclass 26, count 2 2006.229.19:14:36.29#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:36.29#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:14:36.29#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.19:14:36.29#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:36.29#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:36.41#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:36.41#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:36.41#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:14:36.41#ibcon#first serial, iclass 26, count 0 2006.229.19:14:36.41#ibcon#enter sib2, iclass 26, count 0 2006.229.19:14:36.41#ibcon#flushed, iclass 26, count 0 2006.229.19:14:36.41#ibcon#about to write, iclass 26, count 0 2006.229.19:14:36.41#ibcon#wrote, iclass 26, count 0 2006.229.19:14:36.41#ibcon#about to read 3, iclass 26, count 0 2006.229.19:14:36.43#ibcon#read 3, iclass 26, count 0 2006.229.19:14:36.43#ibcon#about to read 4, iclass 26, count 0 2006.229.19:14:36.43#ibcon#read 4, iclass 26, count 0 2006.229.19:14:36.43#ibcon#about to read 5, iclass 26, count 0 2006.229.19:14:36.43#ibcon#read 5, iclass 26, count 0 2006.229.19:14:36.43#ibcon#about to read 6, iclass 26, count 0 2006.229.19:14:36.43#ibcon#read 6, iclass 26, count 0 2006.229.19:14:36.43#ibcon#end of sib2, iclass 26, count 0 2006.229.19:14:36.43#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:14:36.43#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:14:36.43#ibcon#[27=USB\r\n] 2006.229.19:14:36.43#ibcon#*before write, iclass 26, count 0 2006.229.19:14:36.43#ibcon#enter sib2, iclass 26, count 0 2006.229.19:14:36.43#ibcon#flushed, iclass 26, count 0 2006.229.19:14:36.43#ibcon#about to write, iclass 26, count 0 2006.229.19:14:36.43#ibcon#wrote, iclass 26, count 0 2006.229.19:14:36.43#ibcon#about to read 3, iclass 26, count 0 2006.229.19:14:36.46#ibcon#read 3, iclass 26, count 0 2006.229.19:14:36.46#ibcon#about to read 4, iclass 26, count 0 2006.229.19:14:36.46#ibcon#read 4, iclass 26, count 0 2006.229.19:14:36.46#ibcon#about to read 5, iclass 26, count 0 2006.229.19:14:36.46#ibcon#read 5, iclass 26, count 0 2006.229.19:14:36.46#ibcon#about to read 6, iclass 26, count 0 2006.229.19:14:36.46#ibcon#read 6, iclass 26, count 0 2006.229.19:14:36.46#ibcon#end of sib2, iclass 26, count 0 2006.229.19:14:36.46#ibcon#*after write, iclass 26, count 0 2006.229.19:14:36.46#ibcon#*before return 0, iclass 26, count 0 2006.229.19:14:36.46#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:36.46#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:14:36.46#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:14:36.46#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:14:36.46$vck44/vblo=3,649.99 2006.229.19:14:36.46#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.19:14:36.46#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.19:14:36.46#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:36.46#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:36.46#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:36.46#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:36.46#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:14:36.46#ibcon#first serial, iclass 28, count 0 2006.229.19:14:36.46#ibcon#enter sib2, iclass 28, count 0 2006.229.19:14:36.46#ibcon#flushed, iclass 28, count 0 2006.229.19:14:36.46#ibcon#about to write, iclass 28, count 0 2006.229.19:14:36.46#ibcon#wrote, iclass 28, count 0 2006.229.19:14:36.46#ibcon#about to read 3, iclass 28, count 0 2006.229.19:14:36.48#ibcon#read 3, iclass 28, count 0 2006.229.19:14:36.48#ibcon#about to read 4, iclass 28, count 0 2006.229.19:14:36.48#ibcon#read 4, iclass 28, count 0 2006.229.19:14:36.48#ibcon#about to read 5, iclass 28, count 0 2006.229.19:14:36.48#ibcon#read 5, iclass 28, count 0 2006.229.19:14:36.48#ibcon#about to read 6, iclass 28, count 0 2006.229.19:14:36.48#ibcon#read 6, iclass 28, count 0 2006.229.19:14:36.48#ibcon#end of sib2, iclass 28, count 0 2006.229.19:14:36.48#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:14:36.48#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:14:36.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:14:36.48#ibcon#*before write, iclass 28, count 0 2006.229.19:14:36.48#ibcon#enter sib2, iclass 28, count 0 2006.229.19:14:36.48#ibcon#flushed, iclass 28, count 0 2006.229.19:14:36.48#ibcon#about to write, iclass 28, count 0 2006.229.19:14:36.48#ibcon#wrote, iclass 28, count 0 2006.229.19:14:36.48#ibcon#about to read 3, iclass 28, count 0 2006.229.19:14:36.52#ibcon#read 3, iclass 28, count 0 2006.229.19:14:36.52#ibcon#about to read 4, iclass 28, count 0 2006.229.19:14:36.52#ibcon#read 4, iclass 28, count 0 2006.229.19:14:36.52#ibcon#about to read 5, iclass 28, count 0 2006.229.19:14:36.52#ibcon#read 5, iclass 28, count 0 2006.229.19:14:36.52#ibcon#about to read 6, iclass 28, count 0 2006.229.19:14:36.52#ibcon#read 6, iclass 28, count 0 2006.229.19:14:36.52#ibcon#end of sib2, iclass 28, count 0 2006.229.19:14:36.52#ibcon#*after write, iclass 28, count 0 2006.229.19:14:36.52#ibcon#*before return 0, iclass 28, count 0 2006.229.19:14:36.52#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:36.52#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:14:36.52#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:14:36.52#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:14:36.52$vck44/vb=3,4 2006.229.19:14:36.52#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.19:14:36.52#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.19:14:36.52#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:36.52#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:36.58#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:36.58#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:36.58#ibcon#enter wrdev, iclass 30, count 2 2006.229.19:14:36.58#ibcon#first serial, iclass 30, count 2 2006.229.19:14:36.58#ibcon#enter sib2, iclass 30, count 2 2006.229.19:14:36.58#ibcon#flushed, iclass 30, count 2 2006.229.19:14:36.58#ibcon#about to write, iclass 30, count 2 2006.229.19:14:36.58#ibcon#wrote, iclass 30, count 2 2006.229.19:14:36.58#ibcon#about to read 3, iclass 30, count 2 2006.229.19:14:36.60#ibcon#read 3, iclass 30, count 2 2006.229.19:14:36.60#ibcon#about to read 4, iclass 30, count 2 2006.229.19:14:36.60#ibcon#read 4, iclass 30, count 2 2006.229.19:14:36.60#ibcon#about to read 5, iclass 30, count 2 2006.229.19:14:36.60#ibcon#read 5, iclass 30, count 2 2006.229.19:14:36.60#ibcon#about to read 6, iclass 30, count 2 2006.229.19:14:36.60#ibcon#read 6, iclass 30, count 2 2006.229.19:14:36.60#ibcon#end of sib2, iclass 30, count 2 2006.229.19:14:36.60#ibcon#*mode == 0, iclass 30, count 2 2006.229.19:14:36.60#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.19:14:36.60#ibcon#[27=AT03-04\r\n] 2006.229.19:14:36.60#ibcon#*before write, iclass 30, count 2 2006.229.19:14:36.60#ibcon#enter sib2, iclass 30, count 2 2006.229.19:14:36.60#ibcon#flushed, iclass 30, count 2 2006.229.19:14:36.60#ibcon#about to write, iclass 30, count 2 2006.229.19:14:36.60#ibcon#wrote, iclass 30, count 2 2006.229.19:14:36.60#ibcon#about to read 3, iclass 30, count 2 2006.229.19:14:36.63#ibcon#read 3, iclass 30, count 2 2006.229.19:14:36.63#ibcon#about to read 4, iclass 30, count 2 2006.229.19:14:36.63#ibcon#read 4, iclass 30, count 2 2006.229.19:14:36.63#ibcon#about to read 5, iclass 30, count 2 2006.229.19:14:36.63#ibcon#read 5, iclass 30, count 2 2006.229.19:14:36.63#ibcon#about to read 6, iclass 30, count 2 2006.229.19:14:36.63#ibcon#read 6, iclass 30, count 2 2006.229.19:14:36.63#ibcon#end of sib2, iclass 30, count 2 2006.229.19:14:36.63#ibcon#*after write, iclass 30, count 2 2006.229.19:14:36.63#ibcon#*before return 0, iclass 30, count 2 2006.229.19:14:36.63#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:36.63#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:14:36.63#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.19:14:36.63#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:36.63#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:36.75#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:36.75#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:36.75#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:14:36.75#ibcon#first serial, iclass 30, count 0 2006.229.19:14:36.75#ibcon#enter sib2, iclass 30, count 0 2006.229.19:14:36.75#ibcon#flushed, iclass 30, count 0 2006.229.19:14:36.75#ibcon#about to write, iclass 30, count 0 2006.229.19:14:36.75#ibcon#wrote, iclass 30, count 0 2006.229.19:14:36.75#ibcon#about to read 3, iclass 30, count 0 2006.229.19:14:36.77#ibcon#read 3, iclass 30, count 0 2006.229.19:14:36.77#ibcon#about to read 4, iclass 30, count 0 2006.229.19:14:36.77#ibcon#read 4, iclass 30, count 0 2006.229.19:14:36.77#ibcon#about to read 5, iclass 30, count 0 2006.229.19:14:36.77#ibcon#read 5, iclass 30, count 0 2006.229.19:14:36.77#ibcon#about to read 6, iclass 30, count 0 2006.229.19:14:36.77#ibcon#read 6, iclass 30, count 0 2006.229.19:14:36.77#ibcon#end of sib2, iclass 30, count 0 2006.229.19:14:36.77#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:14:36.77#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:14:36.77#ibcon#[27=USB\r\n] 2006.229.19:14:36.77#ibcon#*before write, iclass 30, count 0 2006.229.19:14:36.77#ibcon#enter sib2, iclass 30, count 0 2006.229.19:14:36.77#ibcon#flushed, iclass 30, count 0 2006.229.19:14:36.77#ibcon#about to write, iclass 30, count 0 2006.229.19:14:36.77#ibcon#wrote, iclass 30, count 0 2006.229.19:14:36.77#ibcon#about to read 3, iclass 30, count 0 2006.229.19:14:36.80#ibcon#read 3, iclass 30, count 0 2006.229.19:14:36.80#ibcon#about to read 4, iclass 30, count 0 2006.229.19:14:36.80#ibcon#read 4, iclass 30, count 0 2006.229.19:14:36.80#ibcon#about to read 5, iclass 30, count 0 2006.229.19:14:36.80#ibcon#read 5, iclass 30, count 0 2006.229.19:14:36.80#ibcon#about to read 6, iclass 30, count 0 2006.229.19:14:36.80#ibcon#read 6, iclass 30, count 0 2006.229.19:14:36.80#ibcon#end of sib2, iclass 30, count 0 2006.229.19:14:36.80#ibcon#*after write, iclass 30, count 0 2006.229.19:14:36.80#ibcon#*before return 0, iclass 30, count 0 2006.229.19:14:36.80#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:36.80#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:14:36.80#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:14:36.80#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:14:36.80$vck44/vblo=4,679.99 2006.229.19:14:36.80#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.19:14:36.80#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.19:14:36.80#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:36.80#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:36.80#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:36.80#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:36.80#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:14:36.80#ibcon#first serial, iclass 32, count 0 2006.229.19:14:36.80#ibcon#enter sib2, iclass 32, count 0 2006.229.19:14:36.80#ibcon#flushed, iclass 32, count 0 2006.229.19:14:36.80#ibcon#about to write, iclass 32, count 0 2006.229.19:14:36.80#ibcon#wrote, iclass 32, count 0 2006.229.19:14:36.80#ibcon#about to read 3, iclass 32, count 0 2006.229.19:14:36.82#ibcon#read 3, iclass 32, count 0 2006.229.19:14:36.82#ibcon#about to read 4, iclass 32, count 0 2006.229.19:14:36.82#ibcon#read 4, iclass 32, count 0 2006.229.19:14:36.82#ibcon#about to read 5, iclass 32, count 0 2006.229.19:14:36.82#ibcon#read 5, iclass 32, count 0 2006.229.19:14:36.82#ibcon#about to read 6, iclass 32, count 0 2006.229.19:14:36.82#ibcon#read 6, iclass 32, count 0 2006.229.19:14:36.82#ibcon#end of sib2, iclass 32, count 0 2006.229.19:14:36.82#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:14:36.82#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:14:36.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:14:36.82#ibcon#*before write, iclass 32, count 0 2006.229.19:14:36.82#ibcon#enter sib2, iclass 32, count 0 2006.229.19:14:36.82#ibcon#flushed, iclass 32, count 0 2006.229.19:14:36.82#ibcon#about to write, iclass 32, count 0 2006.229.19:14:36.82#ibcon#wrote, iclass 32, count 0 2006.229.19:14:36.82#ibcon#about to read 3, iclass 32, count 0 2006.229.19:14:36.86#ibcon#read 3, iclass 32, count 0 2006.229.19:14:36.86#ibcon#about to read 4, iclass 32, count 0 2006.229.19:14:36.86#ibcon#read 4, iclass 32, count 0 2006.229.19:14:36.86#ibcon#about to read 5, iclass 32, count 0 2006.229.19:14:36.86#ibcon#read 5, iclass 32, count 0 2006.229.19:14:36.86#ibcon#about to read 6, iclass 32, count 0 2006.229.19:14:36.86#ibcon#read 6, iclass 32, count 0 2006.229.19:14:36.86#ibcon#end of sib2, iclass 32, count 0 2006.229.19:14:36.86#ibcon#*after write, iclass 32, count 0 2006.229.19:14:36.86#ibcon#*before return 0, iclass 32, count 0 2006.229.19:14:36.86#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:36.86#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:14:36.86#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:14:36.86#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:14:36.86$vck44/vb=4,4 2006.229.19:14:36.86#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.19:14:36.86#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.19:14:36.86#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:36.86#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:36.92#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:36.92#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:36.92#ibcon#enter wrdev, iclass 34, count 2 2006.229.19:14:36.92#ibcon#first serial, iclass 34, count 2 2006.229.19:14:36.92#ibcon#enter sib2, iclass 34, count 2 2006.229.19:14:36.92#ibcon#flushed, iclass 34, count 2 2006.229.19:14:36.92#ibcon#about to write, iclass 34, count 2 2006.229.19:14:36.92#ibcon#wrote, iclass 34, count 2 2006.229.19:14:36.92#ibcon#about to read 3, iclass 34, count 2 2006.229.19:14:36.94#ibcon#read 3, iclass 34, count 2 2006.229.19:14:36.94#ibcon#about to read 4, iclass 34, count 2 2006.229.19:14:36.94#ibcon#read 4, iclass 34, count 2 2006.229.19:14:36.94#ibcon#about to read 5, iclass 34, count 2 2006.229.19:14:36.94#ibcon#read 5, iclass 34, count 2 2006.229.19:14:36.94#ibcon#about to read 6, iclass 34, count 2 2006.229.19:14:36.94#ibcon#read 6, iclass 34, count 2 2006.229.19:14:36.94#ibcon#end of sib2, iclass 34, count 2 2006.229.19:14:36.94#ibcon#*mode == 0, iclass 34, count 2 2006.229.19:14:36.94#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.19:14:36.94#ibcon#[27=AT04-04\r\n] 2006.229.19:14:36.94#ibcon#*before write, iclass 34, count 2 2006.229.19:14:36.94#ibcon#enter sib2, iclass 34, count 2 2006.229.19:14:36.94#ibcon#flushed, iclass 34, count 2 2006.229.19:14:36.94#ibcon#about to write, iclass 34, count 2 2006.229.19:14:36.94#ibcon#wrote, iclass 34, count 2 2006.229.19:14:36.94#ibcon#about to read 3, iclass 34, count 2 2006.229.19:14:36.97#ibcon#read 3, iclass 34, count 2 2006.229.19:14:36.97#ibcon#about to read 4, iclass 34, count 2 2006.229.19:14:36.97#ibcon#read 4, iclass 34, count 2 2006.229.19:14:36.97#ibcon#about to read 5, iclass 34, count 2 2006.229.19:14:36.97#ibcon#read 5, iclass 34, count 2 2006.229.19:14:36.97#ibcon#about to read 6, iclass 34, count 2 2006.229.19:14:36.97#ibcon#read 6, iclass 34, count 2 2006.229.19:14:36.97#ibcon#end of sib2, iclass 34, count 2 2006.229.19:14:36.97#ibcon#*after write, iclass 34, count 2 2006.229.19:14:36.97#ibcon#*before return 0, iclass 34, count 2 2006.229.19:14:36.97#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:36.97#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:14:36.97#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.19:14:36.97#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:36.97#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:37.09#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:37.09#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:37.09#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:14:37.09#ibcon#first serial, iclass 34, count 0 2006.229.19:14:37.09#ibcon#enter sib2, iclass 34, count 0 2006.229.19:14:37.09#ibcon#flushed, iclass 34, count 0 2006.229.19:14:37.09#ibcon#about to write, iclass 34, count 0 2006.229.19:14:37.09#ibcon#wrote, iclass 34, count 0 2006.229.19:14:37.09#ibcon#about to read 3, iclass 34, count 0 2006.229.19:14:37.11#ibcon#read 3, iclass 34, count 0 2006.229.19:14:37.11#ibcon#about to read 4, iclass 34, count 0 2006.229.19:14:37.11#ibcon#read 4, iclass 34, count 0 2006.229.19:14:37.11#ibcon#about to read 5, iclass 34, count 0 2006.229.19:14:37.11#ibcon#read 5, iclass 34, count 0 2006.229.19:14:37.11#ibcon#about to read 6, iclass 34, count 0 2006.229.19:14:37.11#ibcon#read 6, iclass 34, count 0 2006.229.19:14:37.11#ibcon#end of sib2, iclass 34, count 0 2006.229.19:14:37.11#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:14:37.11#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:14:37.11#ibcon#[27=USB\r\n] 2006.229.19:14:37.11#ibcon#*before write, iclass 34, count 0 2006.229.19:14:37.11#ibcon#enter sib2, iclass 34, count 0 2006.229.19:14:37.11#ibcon#flushed, iclass 34, count 0 2006.229.19:14:37.11#ibcon#about to write, iclass 34, count 0 2006.229.19:14:37.11#ibcon#wrote, iclass 34, count 0 2006.229.19:14:37.11#ibcon#about to read 3, iclass 34, count 0 2006.229.19:14:37.14#ibcon#read 3, iclass 34, count 0 2006.229.19:14:37.14#ibcon#about to read 4, iclass 34, count 0 2006.229.19:14:37.14#ibcon#read 4, iclass 34, count 0 2006.229.19:14:37.14#ibcon#about to read 5, iclass 34, count 0 2006.229.19:14:37.14#ibcon#read 5, iclass 34, count 0 2006.229.19:14:37.14#ibcon#about to read 6, iclass 34, count 0 2006.229.19:14:37.14#ibcon#read 6, iclass 34, count 0 2006.229.19:14:37.14#ibcon#end of sib2, iclass 34, count 0 2006.229.19:14:37.14#ibcon#*after write, iclass 34, count 0 2006.229.19:14:37.14#ibcon#*before return 0, iclass 34, count 0 2006.229.19:14:37.14#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:37.14#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:14:37.14#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:14:37.14#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:14:37.14$vck44/vblo=5,709.99 2006.229.19:14:37.14#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.19:14:37.14#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.19:14:37.14#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:37.14#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:37.14#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:37.14#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:37.14#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:14:37.14#ibcon#first serial, iclass 36, count 0 2006.229.19:14:37.14#ibcon#enter sib2, iclass 36, count 0 2006.229.19:14:37.14#ibcon#flushed, iclass 36, count 0 2006.229.19:14:37.14#ibcon#about to write, iclass 36, count 0 2006.229.19:14:37.14#ibcon#wrote, iclass 36, count 0 2006.229.19:14:37.14#ibcon#about to read 3, iclass 36, count 0 2006.229.19:14:37.16#ibcon#read 3, iclass 36, count 0 2006.229.19:14:37.16#ibcon#about to read 4, iclass 36, count 0 2006.229.19:14:37.16#ibcon#read 4, iclass 36, count 0 2006.229.19:14:37.16#ibcon#about to read 5, iclass 36, count 0 2006.229.19:14:37.16#ibcon#read 5, iclass 36, count 0 2006.229.19:14:37.16#ibcon#about to read 6, iclass 36, count 0 2006.229.19:14:37.16#ibcon#read 6, iclass 36, count 0 2006.229.19:14:37.16#ibcon#end of sib2, iclass 36, count 0 2006.229.19:14:37.16#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:14:37.16#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:14:37.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:14:37.16#ibcon#*before write, iclass 36, count 0 2006.229.19:14:37.16#ibcon#enter sib2, iclass 36, count 0 2006.229.19:14:37.16#ibcon#flushed, iclass 36, count 0 2006.229.19:14:37.16#ibcon#about to write, iclass 36, count 0 2006.229.19:14:37.16#ibcon#wrote, iclass 36, count 0 2006.229.19:14:37.16#ibcon#about to read 3, iclass 36, count 0 2006.229.19:14:37.20#ibcon#read 3, iclass 36, count 0 2006.229.19:14:37.20#ibcon#about to read 4, iclass 36, count 0 2006.229.19:14:37.20#ibcon#read 4, iclass 36, count 0 2006.229.19:14:37.20#ibcon#about to read 5, iclass 36, count 0 2006.229.19:14:37.20#ibcon#read 5, iclass 36, count 0 2006.229.19:14:37.20#ibcon#about to read 6, iclass 36, count 0 2006.229.19:14:37.20#ibcon#read 6, iclass 36, count 0 2006.229.19:14:37.20#ibcon#end of sib2, iclass 36, count 0 2006.229.19:14:37.20#ibcon#*after write, iclass 36, count 0 2006.229.19:14:37.20#ibcon#*before return 0, iclass 36, count 0 2006.229.19:14:37.20#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:37.20#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:14:37.20#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:14:37.20#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:14:37.20$vck44/vb=5,4 2006.229.19:14:37.20#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.19:14:37.20#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.19:14:37.20#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:37.20#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:37.26#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:37.26#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:37.26#ibcon#enter wrdev, iclass 38, count 2 2006.229.19:14:37.26#ibcon#first serial, iclass 38, count 2 2006.229.19:14:37.26#ibcon#enter sib2, iclass 38, count 2 2006.229.19:14:37.26#ibcon#flushed, iclass 38, count 2 2006.229.19:14:37.26#ibcon#about to write, iclass 38, count 2 2006.229.19:14:37.26#ibcon#wrote, iclass 38, count 2 2006.229.19:14:37.26#ibcon#about to read 3, iclass 38, count 2 2006.229.19:14:37.28#ibcon#read 3, iclass 38, count 2 2006.229.19:14:37.28#ibcon#about to read 4, iclass 38, count 2 2006.229.19:14:37.28#ibcon#read 4, iclass 38, count 2 2006.229.19:14:37.28#ibcon#about to read 5, iclass 38, count 2 2006.229.19:14:37.28#ibcon#read 5, iclass 38, count 2 2006.229.19:14:37.28#ibcon#about to read 6, iclass 38, count 2 2006.229.19:14:37.28#ibcon#read 6, iclass 38, count 2 2006.229.19:14:37.28#ibcon#end of sib2, iclass 38, count 2 2006.229.19:14:37.28#ibcon#*mode == 0, iclass 38, count 2 2006.229.19:14:37.28#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.19:14:37.28#ibcon#[27=AT05-04\r\n] 2006.229.19:14:37.28#ibcon#*before write, iclass 38, count 2 2006.229.19:14:37.28#ibcon#enter sib2, iclass 38, count 2 2006.229.19:14:37.28#ibcon#flushed, iclass 38, count 2 2006.229.19:14:37.28#ibcon#about to write, iclass 38, count 2 2006.229.19:14:37.28#ibcon#wrote, iclass 38, count 2 2006.229.19:14:37.28#ibcon#about to read 3, iclass 38, count 2 2006.229.19:14:37.31#ibcon#read 3, iclass 38, count 2 2006.229.19:14:37.31#ibcon#about to read 4, iclass 38, count 2 2006.229.19:14:37.31#ibcon#read 4, iclass 38, count 2 2006.229.19:14:37.31#ibcon#about to read 5, iclass 38, count 2 2006.229.19:14:37.31#ibcon#read 5, iclass 38, count 2 2006.229.19:14:37.31#ibcon#about to read 6, iclass 38, count 2 2006.229.19:14:37.31#ibcon#read 6, iclass 38, count 2 2006.229.19:14:37.31#ibcon#end of sib2, iclass 38, count 2 2006.229.19:14:37.31#ibcon#*after write, iclass 38, count 2 2006.229.19:14:37.31#ibcon#*before return 0, iclass 38, count 2 2006.229.19:14:37.31#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:37.31#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:14:37.31#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.19:14:37.31#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:37.31#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:37.43#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:37.43#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:37.43#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:14:37.43#ibcon#first serial, iclass 38, count 0 2006.229.19:14:37.43#ibcon#enter sib2, iclass 38, count 0 2006.229.19:14:37.43#ibcon#flushed, iclass 38, count 0 2006.229.19:14:37.43#ibcon#about to write, iclass 38, count 0 2006.229.19:14:37.43#ibcon#wrote, iclass 38, count 0 2006.229.19:14:37.43#ibcon#about to read 3, iclass 38, count 0 2006.229.19:14:37.45#ibcon#read 3, iclass 38, count 0 2006.229.19:14:37.45#ibcon#about to read 4, iclass 38, count 0 2006.229.19:14:37.45#ibcon#read 4, iclass 38, count 0 2006.229.19:14:37.45#ibcon#about to read 5, iclass 38, count 0 2006.229.19:14:37.45#ibcon#read 5, iclass 38, count 0 2006.229.19:14:37.45#ibcon#about to read 6, iclass 38, count 0 2006.229.19:14:37.45#ibcon#read 6, iclass 38, count 0 2006.229.19:14:37.45#ibcon#end of sib2, iclass 38, count 0 2006.229.19:14:37.45#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:14:37.45#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:14:37.45#ibcon#[27=USB\r\n] 2006.229.19:14:37.45#ibcon#*before write, iclass 38, count 0 2006.229.19:14:37.45#ibcon#enter sib2, iclass 38, count 0 2006.229.19:14:37.45#ibcon#flushed, iclass 38, count 0 2006.229.19:14:37.45#ibcon#about to write, iclass 38, count 0 2006.229.19:14:37.45#ibcon#wrote, iclass 38, count 0 2006.229.19:14:37.45#ibcon#about to read 3, iclass 38, count 0 2006.229.19:14:37.48#ibcon#read 3, iclass 38, count 0 2006.229.19:14:37.48#ibcon#about to read 4, iclass 38, count 0 2006.229.19:14:37.48#ibcon#read 4, iclass 38, count 0 2006.229.19:14:37.48#ibcon#about to read 5, iclass 38, count 0 2006.229.19:14:37.48#ibcon#read 5, iclass 38, count 0 2006.229.19:14:37.48#ibcon#about to read 6, iclass 38, count 0 2006.229.19:14:37.48#ibcon#read 6, iclass 38, count 0 2006.229.19:14:37.48#ibcon#end of sib2, iclass 38, count 0 2006.229.19:14:37.48#ibcon#*after write, iclass 38, count 0 2006.229.19:14:37.48#ibcon#*before return 0, iclass 38, count 0 2006.229.19:14:37.48#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:37.48#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:14:37.48#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:14:37.48#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:14:37.48$vck44/vblo=6,719.99 2006.229.19:14:37.48#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.19:14:37.48#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.19:14:37.48#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:37.48#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:14:37.48#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:14:37.48#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:14:37.48#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:14:37.48#ibcon#first serial, iclass 3, count 0 2006.229.19:14:37.48#ibcon#enter sib2, iclass 3, count 0 2006.229.19:14:37.48#ibcon#flushed, iclass 3, count 0 2006.229.19:14:37.48#ibcon#about to write, iclass 3, count 0 2006.229.19:14:37.48#ibcon#wrote, iclass 3, count 0 2006.229.19:14:37.48#ibcon#about to read 3, iclass 3, count 0 2006.229.19:14:37.50#ibcon#read 3, iclass 3, count 0 2006.229.19:14:37.50#ibcon#about to read 4, iclass 3, count 0 2006.229.19:14:37.50#ibcon#read 4, iclass 3, count 0 2006.229.19:14:37.50#ibcon#about to read 5, iclass 3, count 0 2006.229.19:14:37.50#ibcon#read 5, iclass 3, count 0 2006.229.19:14:37.50#ibcon#about to read 6, iclass 3, count 0 2006.229.19:14:37.50#ibcon#read 6, iclass 3, count 0 2006.229.19:14:37.50#ibcon#end of sib2, iclass 3, count 0 2006.229.19:14:37.50#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:14:37.50#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:14:37.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:14:37.50#ibcon#*before write, iclass 3, count 0 2006.229.19:14:37.50#ibcon#enter sib2, iclass 3, count 0 2006.229.19:14:37.50#ibcon#flushed, iclass 3, count 0 2006.229.19:14:37.50#ibcon#about to write, iclass 3, count 0 2006.229.19:14:37.50#ibcon#wrote, iclass 3, count 0 2006.229.19:14:37.50#ibcon#about to read 3, iclass 3, count 0 2006.229.19:14:37.50#abcon#<5=/06 1.6 2.6 26.111001001.4\r\n> 2006.229.19:14:37.52#abcon#{5=INTERFACE CLEAR} 2006.229.19:14:37.54#ibcon#read 3, iclass 3, count 0 2006.229.19:14:37.54#ibcon#about to read 4, iclass 3, count 0 2006.229.19:14:37.54#ibcon#read 4, iclass 3, count 0 2006.229.19:14:37.54#ibcon#about to read 5, iclass 3, count 0 2006.229.19:14:37.54#ibcon#read 5, iclass 3, count 0 2006.229.19:14:37.54#ibcon#about to read 6, iclass 3, count 0 2006.229.19:14:37.54#ibcon#read 6, iclass 3, count 0 2006.229.19:14:37.54#ibcon#end of sib2, iclass 3, count 0 2006.229.19:14:37.54#ibcon#*after write, iclass 3, count 0 2006.229.19:14:37.54#ibcon#*before return 0, iclass 3, count 0 2006.229.19:14:37.54#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:14:37.54#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:14:37.54#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:14:37.54#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:14:37.54$vck44/vb=6,4 2006.229.19:14:37.54#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:14:37.54#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:14:37.54#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:37.54#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:14:37.58#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:14:37.60#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:14:37.60#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:14:37.60#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:14:37.60#ibcon#first serial, iclass 7, count 2 2006.229.19:14:37.60#ibcon#enter sib2, iclass 7, count 2 2006.229.19:14:37.60#ibcon#flushed, iclass 7, count 2 2006.229.19:14:37.60#ibcon#about to write, iclass 7, count 2 2006.229.19:14:37.60#ibcon#wrote, iclass 7, count 2 2006.229.19:14:37.60#ibcon#about to read 3, iclass 7, count 2 2006.229.19:14:37.62#ibcon#read 3, iclass 7, count 2 2006.229.19:14:37.62#ibcon#about to read 4, iclass 7, count 2 2006.229.19:14:37.62#ibcon#read 4, iclass 7, count 2 2006.229.19:14:37.62#ibcon#about to read 5, iclass 7, count 2 2006.229.19:14:37.62#ibcon#read 5, iclass 7, count 2 2006.229.19:14:37.62#ibcon#about to read 6, iclass 7, count 2 2006.229.19:14:37.62#ibcon#read 6, iclass 7, count 2 2006.229.19:14:37.62#ibcon#end of sib2, iclass 7, count 2 2006.229.19:14:37.62#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:14:37.62#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:14:37.62#ibcon#[27=AT06-04\r\n] 2006.229.19:14:37.62#ibcon#*before write, iclass 7, count 2 2006.229.19:14:37.62#ibcon#enter sib2, iclass 7, count 2 2006.229.19:14:37.62#ibcon#flushed, iclass 7, count 2 2006.229.19:14:37.62#ibcon#about to write, iclass 7, count 2 2006.229.19:14:37.62#ibcon#wrote, iclass 7, count 2 2006.229.19:14:37.62#ibcon#about to read 3, iclass 7, count 2 2006.229.19:14:37.65#ibcon#read 3, iclass 7, count 2 2006.229.19:14:37.65#ibcon#about to read 4, iclass 7, count 2 2006.229.19:14:37.65#ibcon#read 4, iclass 7, count 2 2006.229.19:14:37.65#ibcon#about to read 5, iclass 7, count 2 2006.229.19:14:37.65#ibcon#read 5, iclass 7, count 2 2006.229.19:14:37.65#ibcon#about to read 6, iclass 7, count 2 2006.229.19:14:37.65#ibcon#read 6, iclass 7, count 2 2006.229.19:14:37.65#ibcon#end of sib2, iclass 7, count 2 2006.229.19:14:37.65#ibcon#*after write, iclass 7, count 2 2006.229.19:14:37.65#ibcon#*before return 0, iclass 7, count 2 2006.229.19:14:37.65#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:14:37.65#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:14:37.65#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:14:37.65#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:37.65#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:14:37.77#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:14:37.77#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:14:37.77#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:14:37.77#ibcon#first serial, iclass 7, count 0 2006.229.19:14:37.77#ibcon#enter sib2, iclass 7, count 0 2006.229.19:14:37.77#ibcon#flushed, iclass 7, count 0 2006.229.19:14:37.77#ibcon#about to write, iclass 7, count 0 2006.229.19:14:37.77#ibcon#wrote, iclass 7, count 0 2006.229.19:14:37.77#ibcon#about to read 3, iclass 7, count 0 2006.229.19:14:37.79#ibcon#read 3, iclass 7, count 0 2006.229.19:14:37.79#ibcon#about to read 4, iclass 7, count 0 2006.229.19:14:37.79#ibcon#read 4, iclass 7, count 0 2006.229.19:14:37.79#ibcon#about to read 5, iclass 7, count 0 2006.229.19:14:37.79#ibcon#read 5, iclass 7, count 0 2006.229.19:14:37.79#ibcon#about to read 6, iclass 7, count 0 2006.229.19:14:37.79#ibcon#read 6, iclass 7, count 0 2006.229.19:14:37.79#ibcon#end of sib2, iclass 7, count 0 2006.229.19:14:37.79#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:14:37.79#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:14:37.79#ibcon#[27=USB\r\n] 2006.229.19:14:37.79#ibcon#*before write, iclass 7, count 0 2006.229.19:14:37.79#ibcon#enter sib2, iclass 7, count 0 2006.229.19:14:37.79#ibcon#flushed, iclass 7, count 0 2006.229.19:14:37.79#ibcon#about to write, iclass 7, count 0 2006.229.19:14:37.79#ibcon#wrote, iclass 7, count 0 2006.229.19:14:37.79#ibcon#about to read 3, iclass 7, count 0 2006.229.19:14:37.82#ibcon#read 3, iclass 7, count 0 2006.229.19:14:37.82#ibcon#about to read 4, iclass 7, count 0 2006.229.19:14:37.82#ibcon#read 4, iclass 7, count 0 2006.229.19:14:37.82#ibcon#about to read 5, iclass 7, count 0 2006.229.19:14:37.82#ibcon#read 5, iclass 7, count 0 2006.229.19:14:37.82#ibcon#about to read 6, iclass 7, count 0 2006.229.19:14:37.82#ibcon#read 6, iclass 7, count 0 2006.229.19:14:37.82#ibcon#end of sib2, iclass 7, count 0 2006.229.19:14:37.82#ibcon#*after write, iclass 7, count 0 2006.229.19:14:37.82#ibcon#*before return 0, iclass 7, count 0 2006.229.19:14:37.82#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:14:37.82#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:14:37.82#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:14:37.82#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:14:37.82$vck44/vblo=7,734.99 2006.229.19:14:37.82#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.19:14:37.82#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.19:14:37.82#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:37.82#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:37.82#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:37.82#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:37.82#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:14:37.82#ibcon#first serial, iclass 12, count 0 2006.229.19:14:37.82#ibcon#enter sib2, iclass 12, count 0 2006.229.19:14:37.82#ibcon#flushed, iclass 12, count 0 2006.229.19:14:37.82#ibcon#about to write, iclass 12, count 0 2006.229.19:14:37.82#ibcon#wrote, iclass 12, count 0 2006.229.19:14:37.82#ibcon#about to read 3, iclass 12, count 0 2006.229.19:14:37.84#ibcon#read 3, iclass 12, count 0 2006.229.19:14:37.84#ibcon#about to read 4, iclass 12, count 0 2006.229.19:14:37.84#ibcon#read 4, iclass 12, count 0 2006.229.19:14:37.84#ibcon#about to read 5, iclass 12, count 0 2006.229.19:14:37.84#ibcon#read 5, iclass 12, count 0 2006.229.19:14:37.84#ibcon#about to read 6, iclass 12, count 0 2006.229.19:14:37.84#ibcon#read 6, iclass 12, count 0 2006.229.19:14:37.84#ibcon#end of sib2, iclass 12, count 0 2006.229.19:14:37.84#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:14:37.84#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:14:37.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:14:37.84#ibcon#*before write, iclass 12, count 0 2006.229.19:14:37.84#ibcon#enter sib2, iclass 12, count 0 2006.229.19:14:37.84#ibcon#flushed, iclass 12, count 0 2006.229.19:14:37.84#ibcon#about to write, iclass 12, count 0 2006.229.19:14:37.84#ibcon#wrote, iclass 12, count 0 2006.229.19:14:37.84#ibcon#about to read 3, iclass 12, count 0 2006.229.19:14:37.88#ibcon#read 3, iclass 12, count 0 2006.229.19:14:37.88#ibcon#about to read 4, iclass 12, count 0 2006.229.19:14:37.88#ibcon#read 4, iclass 12, count 0 2006.229.19:14:37.88#ibcon#about to read 5, iclass 12, count 0 2006.229.19:14:37.88#ibcon#read 5, iclass 12, count 0 2006.229.19:14:37.88#ibcon#about to read 6, iclass 12, count 0 2006.229.19:14:37.88#ibcon#read 6, iclass 12, count 0 2006.229.19:14:37.88#ibcon#end of sib2, iclass 12, count 0 2006.229.19:14:37.88#ibcon#*after write, iclass 12, count 0 2006.229.19:14:37.88#ibcon#*before return 0, iclass 12, count 0 2006.229.19:14:37.88#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:37.88#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:14:37.88#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:14:37.88#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:14:37.88$vck44/vb=7,4 2006.229.19:14:37.88#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.19:14:37.88#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.19:14:37.88#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:37.88#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:37.94#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:37.94#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:37.94#ibcon#enter wrdev, iclass 14, count 2 2006.229.19:14:37.94#ibcon#first serial, iclass 14, count 2 2006.229.19:14:37.94#ibcon#enter sib2, iclass 14, count 2 2006.229.19:14:37.94#ibcon#flushed, iclass 14, count 2 2006.229.19:14:37.94#ibcon#about to write, iclass 14, count 2 2006.229.19:14:37.94#ibcon#wrote, iclass 14, count 2 2006.229.19:14:37.94#ibcon#about to read 3, iclass 14, count 2 2006.229.19:14:37.96#ibcon#read 3, iclass 14, count 2 2006.229.19:14:37.96#ibcon#about to read 4, iclass 14, count 2 2006.229.19:14:37.96#ibcon#read 4, iclass 14, count 2 2006.229.19:14:37.96#ibcon#about to read 5, iclass 14, count 2 2006.229.19:14:37.96#ibcon#read 5, iclass 14, count 2 2006.229.19:14:37.96#ibcon#about to read 6, iclass 14, count 2 2006.229.19:14:37.96#ibcon#read 6, iclass 14, count 2 2006.229.19:14:37.96#ibcon#end of sib2, iclass 14, count 2 2006.229.19:14:37.96#ibcon#*mode == 0, iclass 14, count 2 2006.229.19:14:37.96#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.19:14:37.96#ibcon#[27=AT07-04\r\n] 2006.229.19:14:37.96#ibcon#*before write, iclass 14, count 2 2006.229.19:14:37.96#ibcon#enter sib2, iclass 14, count 2 2006.229.19:14:37.96#ibcon#flushed, iclass 14, count 2 2006.229.19:14:37.96#ibcon#about to write, iclass 14, count 2 2006.229.19:14:37.96#ibcon#wrote, iclass 14, count 2 2006.229.19:14:37.96#ibcon#about to read 3, iclass 14, count 2 2006.229.19:14:37.99#ibcon#read 3, iclass 14, count 2 2006.229.19:14:37.99#ibcon#about to read 4, iclass 14, count 2 2006.229.19:14:37.99#ibcon#read 4, iclass 14, count 2 2006.229.19:14:37.99#ibcon#about to read 5, iclass 14, count 2 2006.229.19:14:37.99#ibcon#read 5, iclass 14, count 2 2006.229.19:14:37.99#ibcon#about to read 6, iclass 14, count 2 2006.229.19:14:37.99#ibcon#read 6, iclass 14, count 2 2006.229.19:14:37.99#ibcon#end of sib2, iclass 14, count 2 2006.229.19:14:37.99#ibcon#*after write, iclass 14, count 2 2006.229.19:14:37.99#ibcon#*before return 0, iclass 14, count 2 2006.229.19:14:37.99#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:37.99#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:14:37.99#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.19:14:37.99#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:37.99#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:38.11#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:38.11#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:38.11#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:14:38.11#ibcon#first serial, iclass 14, count 0 2006.229.19:14:38.11#ibcon#enter sib2, iclass 14, count 0 2006.229.19:14:38.11#ibcon#flushed, iclass 14, count 0 2006.229.19:14:38.11#ibcon#about to write, iclass 14, count 0 2006.229.19:14:38.11#ibcon#wrote, iclass 14, count 0 2006.229.19:14:38.11#ibcon#about to read 3, iclass 14, count 0 2006.229.19:14:38.13#ibcon#read 3, iclass 14, count 0 2006.229.19:14:38.13#ibcon#about to read 4, iclass 14, count 0 2006.229.19:14:38.13#ibcon#read 4, iclass 14, count 0 2006.229.19:14:38.13#ibcon#about to read 5, iclass 14, count 0 2006.229.19:14:38.13#ibcon#read 5, iclass 14, count 0 2006.229.19:14:38.13#ibcon#about to read 6, iclass 14, count 0 2006.229.19:14:38.13#ibcon#read 6, iclass 14, count 0 2006.229.19:14:38.13#ibcon#end of sib2, iclass 14, count 0 2006.229.19:14:38.13#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:14:38.13#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:14:38.13#ibcon#[27=USB\r\n] 2006.229.19:14:38.13#ibcon#*before write, iclass 14, count 0 2006.229.19:14:38.13#ibcon#enter sib2, iclass 14, count 0 2006.229.19:14:38.13#ibcon#flushed, iclass 14, count 0 2006.229.19:14:38.13#ibcon#about to write, iclass 14, count 0 2006.229.19:14:38.13#ibcon#wrote, iclass 14, count 0 2006.229.19:14:38.13#ibcon#about to read 3, iclass 14, count 0 2006.229.19:14:38.16#ibcon#read 3, iclass 14, count 0 2006.229.19:14:38.16#ibcon#about to read 4, iclass 14, count 0 2006.229.19:14:38.16#ibcon#read 4, iclass 14, count 0 2006.229.19:14:38.16#ibcon#about to read 5, iclass 14, count 0 2006.229.19:14:38.16#ibcon#read 5, iclass 14, count 0 2006.229.19:14:38.16#ibcon#about to read 6, iclass 14, count 0 2006.229.19:14:38.16#ibcon#read 6, iclass 14, count 0 2006.229.19:14:38.16#ibcon#end of sib2, iclass 14, count 0 2006.229.19:14:38.16#ibcon#*after write, iclass 14, count 0 2006.229.19:14:38.16#ibcon#*before return 0, iclass 14, count 0 2006.229.19:14:38.16#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:38.16#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:14:38.16#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:14:38.16#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:14:38.16$vck44/vblo=8,744.99 2006.229.19:14:38.16#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.19:14:38.16#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.19:14:38.16#ibcon#ireg 17 cls_cnt 0 2006.229.19:14:38.16#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:38.16#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:38.16#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:38.16#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:14:38.16#ibcon#first serial, iclass 16, count 0 2006.229.19:14:38.16#ibcon#enter sib2, iclass 16, count 0 2006.229.19:14:38.16#ibcon#flushed, iclass 16, count 0 2006.229.19:14:38.16#ibcon#about to write, iclass 16, count 0 2006.229.19:14:38.16#ibcon#wrote, iclass 16, count 0 2006.229.19:14:38.16#ibcon#about to read 3, iclass 16, count 0 2006.229.19:14:38.18#ibcon#read 3, iclass 16, count 0 2006.229.19:14:38.18#ibcon#about to read 4, iclass 16, count 0 2006.229.19:14:38.18#ibcon#read 4, iclass 16, count 0 2006.229.19:14:38.18#ibcon#about to read 5, iclass 16, count 0 2006.229.19:14:38.18#ibcon#read 5, iclass 16, count 0 2006.229.19:14:38.18#ibcon#about to read 6, iclass 16, count 0 2006.229.19:14:38.18#ibcon#read 6, iclass 16, count 0 2006.229.19:14:38.18#ibcon#end of sib2, iclass 16, count 0 2006.229.19:14:38.18#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:14:38.18#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:14:38.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:14:38.18#ibcon#*before write, iclass 16, count 0 2006.229.19:14:38.18#ibcon#enter sib2, iclass 16, count 0 2006.229.19:14:38.18#ibcon#flushed, iclass 16, count 0 2006.229.19:14:38.18#ibcon#about to write, iclass 16, count 0 2006.229.19:14:38.18#ibcon#wrote, iclass 16, count 0 2006.229.19:14:38.18#ibcon#about to read 3, iclass 16, count 0 2006.229.19:14:38.22#ibcon#read 3, iclass 16, count 0 2006.229.19:14:38.22#ibcon#about to read 4, iclass 16, count 0 2006.229.19:14:38.22#ibcon#read 4, iclass 16, count 0 2006.229.19:14:38.22#ibcon#about to read 5, iclass 16, count 0 2006.229.19:14:38.22#ibcon#read 5, iclass 16, count 0 2006.229.19:14:38.22#ibcon#about to read 6, iclass 16, count 0 2006.229.19:14:38.22#ibcon#read 6, iclass 16, count 0 2006.229.19:14:38.22#ibcon#end of sib2, iclass 16, count 0 2006.229.19:14:38.22#ibcon#*after write, iclass 16, count 0 2006.229.19:14:38.22#ibcon#*before return 0, iclass 16, count 0 2006.229.19:14:38.22#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:38.22#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:14:38.22#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:14:38.22#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:14:38.22$vck44/vb=8,4 2006.229.19:14:38.22#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.19:14:38.22#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.19:14:38.22#ibcon#ireg 11 cls_cnt 2 2006.229.19:14:38.22#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:38.28#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:38.28#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:38.28#ibcon#enter wrdev, iclass 18, count 2 2006.229.19:14:38.28#ibcon#first serial, iclass 18, count 2 2006.229.19:14:38.28#ibcon#enter sib2, iclass 18, count 2 2006.229.19:14:38.28#ibcon#flushed, iclass 18, count 2 2006.229.19:14:38.28#ibcon#about to write, iclass 18, count 2 2006.229.19:14:38.28#ibcon#wrote, iclass 18, count 2 2006.229.19:14:38.28#ibcon#about to read 3, iclass 18, count 2 2006.229.19:14:38.30#ibcon#read 3, iclass 18, count 2 2006.229.19:14:38.30#ibcon#about to read 4, iclass 18, count 2 2006.229.19:14:38.30#ibcon#read 4, iclass 18, count 2 2006.229.19:14:38.30#ibcon#about to read 5, iclass 18, count 2 2006.229.19:14:38.30#ibcon#read 5, iclass 18, count 2 2006.229.19:14:38.30#ibcon#about to read 6, iclass 18, count 2 2006.229.19:14:38.30#ibcon#read 6, iclass 18, count 2 2006.229.19:14:38.30#ibcon#end of sib2, iclass 18, count 2 2006.229.19:14:38.30#ibcon#*mode == 0, iclass 18, count 2 2006.229.19:14:38.30#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.19:14:38.30#ibcon#[27=AT08-04\r\n] 2006.229.19:14:38.30#ibcon#*before write, iclass 18, count 2 2006.229.19:14:38.30#ibcon#enter sib2, iclass 18, count 2 2006.229.19:14:38.30#ibcon#flushed, iclass 18, count 2 2006.229.19:14:38.30#ibcon#about to write, iclass 18, count 2 2006.229.19:14:38.30#ibcon#wrote, iclass 18, count 2 2006.229.19:14:38.30#ibcon#about to read 3, iclass 18, count 2 2006.229.19:14:38.33#ibcon#read 3, iclass 18, count 2 2006.229.19:14:38.33#ibcon#about to read 4, iclass 18, count 2 2006.229.19:14:38.33#ibcon#read 4, iclass 18, count 2 2006.229.19:14:38.33#ibcon#about to read 5, iclass 18, count 2 2006.229.19:14:38.33#ibcon#read 5, iclass 18, count 2 2006.229.19:14:38.33#ibcon#about to read 6, iclass 18, count 2 2006.229.19:14:38.33#ibcon#read 6, iclass 18, count 2 2006.229.19:14:38.33#ibcon#end of sib2, iclass 18, count 2 2006.229.19:14:38.33#ibcon#*after write, iclass 18, count 2 2006.229.19:14:38.33#ibcon#*before return 0, iclass 18, count 2 2006.229.19:14:38.33#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:38.33#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:14:38.33#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.19:14:38.33#ibcon#ireg 7 cls_cnt 0 2006.229.19:14:38.33#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:38.45#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:38.45#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:38.45#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:14:38.45#ibcon#first serial, iclass 18, count 0 2006.229.19:14:38.45#ibcon#enter sib2, iclass 18, count 0 2006.229.19:14:38.45#ibcon#flushed, iclass 18, count 0 2006.229.19:14:38.45#ibcon#about to write, iclass 18, count 0 2006.229.19:14:38.45#ibcon#wrote, iclass 18, count 0 2006.229.19:14:38.45#ibcon#about to read 3, iclass 18, count 0 2006.229.19:14:38.47#ibcon#read 3, iclass 18, count 0 2006.229.19:14:38.47#ibcon#about to read 4, iclass 18, count 0 2006.229.19:14:38.47#ibcon#read 4, iclass 18, count 0 2006.229.19:14:38.47#ibcon#about to read 5, iclass 18, count 0 2006.229.19:14:38.47#ibcon#read 5, iclass 18, count 0 2006.229.19:14:38.47#ibcon#about to read 6, iclass 18, count 0 2006.229.19:14:38.47#ibcon#read 6, iclass 18, count 0 2006.229.19:14:38.47#ibcon#end of sib2, iclass 18, count 0 2006.229.19:14:38.47#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:14:38.47#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:14:38.47#ibcon#[27=USB\r\n] 2006.229.19:14:38.47#ibcon#*before write, iclass 18, count 0 2006.229.19:14:38.47#ibcon#enter sib2, iclass 18, count 0 2006.229.19:14:38.47#ibcon#flushed, iclass 18, count 0 2006.229.19:14:38.47#ibcon#about to write, iclass 18, count 0 2006.229.19:14:38.47#ibcon#wrote, iclass 18, count 0 2006.229.19:14:38.47#ibcon#about to read 3, iclass 18, count 0 2006.229.19:14:38.50#ibcon#read 3, iclass 18, count 0 2006.229.19:14:38.50#ibcon#about to read 4, iclass 18, count 0 2006.229.19:14:38.50#ibcon#read 4, iclass 18, count 0 2006.229.19:14:38.50#ibcon#about to read 5, iclass 18, count 0 2006.229.19:14:38.50#ibcon#read 5, iclass 18, count 0 2006.229.19:14:38.50#ibcon#about to read 6, iclass 18, count 0 2006.229.19:14:38.50#ibcon#read 6, iclass 18, count 0 2006.229.19:14:38.50#ibcon#end of sib2, iclass 18, count 0 2006.229.19:14:38.50#ibcon#*after write, iclass 18, count 0 2006.229.19:14:38.50#ibcon#*before return 0, iclass 18, count 0 2006.229.19:14:38.50#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:38.50#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:14:38.50#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:14:38.50#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:14:38.50$vck44/vabw=wide 2006.229.19:14:38.50#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.19:14:38.50#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.19:14:38.50#ibcon#ireg 8 cls_cnt 0 2006.229.19:14:38.50#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:38.50#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:38.50#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:38.50#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:14:38.50#ibcon#first serial, iclass 20, count 0 2006.229.19:14:38.50#ibcon#enter sib2, iclass 20, count 0 2006.229.19:14:38.50#ibcon#flushed, iclass 20, count 0 2006.229.19:14:38.50#ibcon#about to write, iclass 20, count 0 2006.229.19:14:38.50#ibcon#wrote, iclass 20, count 0 2006.229.19:14:38.50#ibcon#about to read 3, iclass 20, count 0 2006.229.19:14:38.52#ibcon#read 3, iclass 20, count 0 2006.229.19:14:38.52#ibcon#about to read 4, iclass 20, count 0 2006.229.19:14:38.52#ibcon#read 4, iclass 20, count 0 2006.229.19:14:38.52#ibcon#about to read 5, iclass 20, count 0 2006.229.19:14:38.52#ibcon#read 5, iclass 20, count 0 2006.229.19:14:38.52#ibcon#about to read 6, iclass 20, count 0 2006.229.19:14:38.52#ibcon#read 6, iclass 20, count 0 2006.229.19:14:38.52#ibcon#end of sib2, iclass 20, count 0 2006.229.19:14:38.52#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:14:38.52#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:14:38.52#ibcon#[25=BW32\r\n] 2006.229.19:14:38.52#ibcon#*before write, iclass 20, count 0 2006.229.19:14:38.52#ibcon#enter sib2, iclass 20, count 0 2006.229.19:14:38.52#ibcon#flushed, iclass 20, count 0 2006.229.19:14:38.52#ibcon#about to write, iclass 20, count 0 2006.229.19:14:38.52#ibcon#wrote, iclass 20, count 0 2006.229.19:14:38.52#ibcon#about to read 3, iclass 20, count 0 2006.229.19:14:38.55#ibcon#read 3, iclass 20, count 0 2006.229.19:14:38.55#ibcon#about to read 4, iclass 20, count 0 2006.229.19:14:38.55#ibcon#read 4, iclass 20, count 0 2006.229.19:14:38.55#ibcon#about to read 5, iclass 20, count 0 2006.229.19:14:38.55#ibcon#read 5, iclass 20, count 0 2006.229.19:14:38.55#ibcon#about to read 6, iclass 20, count 0 2006.229.19:14:38.55#ibcon#read 6, iclass 20, count 0 2006.229.19:14:38.55#ibcon#end of sib2, iclass 20, count 0 2006.229.19:14:38.55#ibcon#*after write, iclass 20, count 0 2006.229.19:14:38.55#ibcon#*before return 0, iclass 20, count 0 2006.229.19:14:38.55#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:38.55#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:14:38.55#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:14:38.55#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:14:38.55$vck44/vbbw=wide 2006.229.19:14:38.55#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:14:38.55#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:14:38.55#ibcon#ireg 8 cls_cnt 0 2006.229.19:14:38.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:14:38.62#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:14:38.62#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:14:38.62#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:14:38.62#ibcon#first serial, iclass 22, count 0 2006.229.19:14:38.62#ibcon#enter sib2, iclass 22, count 0 2006.229.19:14:38.62#ibcon#flushed, iclass 22, count 0 2006.229.19:14:38.62#ibcon#about to write, iclass 22, count 0 2006.229.19:14:38.62#ibcon#wrote, iclass 22, count 0 2006.229.19:14:38.62#ibcon#about to read 3, iclass 22, count 0 2006.229.19:14:38.64#ibcon#read 3, iclass 22, count 0 2006.229.19:14:38.64#ibcon#about to read 4, iclass 22, count 0 2006.229.19:14:38.64#ibcon#read 4, iclass 22, count 0 2006.229.19:14:38.64#ibcon#about to read 5, iclass 22, count 0 2006.229.19:14:38.64#ibcon#read 5, iclass 22, count 0 2006.229.19:14:38.64#ibcon#about to read 6, iclass 22, count 0 2006.229.19:14:38.64#ibcon#read 6, iclass 22, count 0 2006.229.19:14:38.64#ibcon#end of sib2, iclass 22, count 0 2006.229.19:14:38.64#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:14:38.64#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:14:38.64#ibcon#[27=BW32\r\n] 2006.229.19:14:38.64#ibcon#*before write, iclass 22, count 0 2006.229.19:14:38.64#ibcon#enter sib2, iclass 22, count 0 2006.229.19:14:38.64#ibcon#flushed, iclass 22, count 0 2006.229.19:14:38.64#ibcon#about to write, iclass 22, count 0 2006.229.19:14:38.64#ibcon#wrote, iclass 22, count 0 2006.229.19:14:38.64#ibcon#about to read 3, iclass 22, count 0 2006.229.19:14:38.67#ibcon#read 3, iclass 22, count 0 2006.229.19:14:38.67#ibcon#about to read 4, iclass 22, count 0 2006.229.19:14:38.67#ibcon#read 4, iclass 22, count 0 2006.229.19:14:38.67#ibcon#about to read 5, iclass 22, count 0 2006.229.19:14:38.67#ibcon#read 5, iclass 22, count 0 2006.229.19:14:38.67#ibcon#about to read 6, iclass 22, count 0 2006.229.19:14:38.67#ibcon#read 6, iclass 22, count 0 2006.229.19:14:38.67#ibcon#end of sib2, iclass 22, count 0 2006.229.19:14:38.67#ibcon#*after write, iclass 22, count 0 2006.229.19:14:38.67#ibcon#*before return 0, iclass 22, count 0 2006.229.19:14:38.67#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:14:38.67#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:14:38.67#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:14:38.67#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:14:38.67$setupk4/ifdk4 2006.229.19:14:38.67$ifdk4/lo= 2006.229.19:14:38.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:14:38.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:14:38.67$ifdk4/patch= 2006.229.19:14:38.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:14:38.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:14:38.67$setupk4/!*+20s 2006.229.19:14:47.67#abcon#<5=/06 1.5 2.6 26.111001001.4\r\n> 2006.229.19:14:47.69#abcon#{5=INTERFACE CLEAR} 2006.229.19:14:47.75#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:14:53.19$setupk4/"tpicd 2006.229.19:14:53.19$setupk4/echo=off 2006.229.19:14:53.19$setupk4/xlog=off 2006.229.19:14:53.19:!2006.229.19:16:50 2006.229.19:15:15.13#trakl#Source acquired 2006.229.19:15:17.13#flagr#flagr/antenna,acquired 2006.229.19:16:50.00:preob 2006.229.19:16:51.14/onsource/TRACKING 2006.229.19:16:51.14:!2006.229.19:17:00 2006.229.19:17:00.00:"tape 2006.229.19:17:00.00:"st=record 2006.229.19:17:00.00:data_valid=on 2006.229.19:17:00.00:midob 2006.229.19:17:00.14/onsource/TRACKING 2006.229.19:17:00.14/wx/26.11,1001.5,100 2006.229.19:17:00.33/cable/+6.4195E-03 2006.229.19:17:01.42/va/01,08,usb,yes,35,38 2006.229.19:17:01.42/va/02,07,usb,yes,38,38 2006.229.19:17:01.42/va/03,06,usb,yes,47,50 2006.229.19:17:01.42/va/04,07,usb,yes,39,41 2006.229.19:17:01.42/va/05,04,usb,yes,35,35 2006.229.19:17:01.42/va/06,04,usb,yes,39,39 2006.229.19:17:01.42/va/07,05,usb,yes,35,35 2006.229.19:17:01.42/va/08,06,usb,yes,25,31 2006.229.19:17:01.65/valo/01,524.99,yes,locked 2006.229.19:17:01.65/valo/02,534.99,yes,locked 2006.229.19:17:01.65/valo/03,564.99,yes,locked 2006.229.19:17:01.65/valo/04,624.99,yes,locked 2006.229.19:17:01.65/valo/05,734.99,yes,locked 2006.229.19:17:01.65/valo/06,814.99,yes,locked 2006.229.19:17:01.65/valo/07,864.99,yes,locked 2006.229.19:17:01.65/valo/08,884.99,yes,locked 2006.229.19:17:02.74/vb/01,04,usb,yes,34,32 2006.229.19:17:02.74/vb/02,04,usb,yes,37,36 2006.229.19:17:02.74/vb/03,04,usb,yes,33,37 2006.229.19:17:02.74/vb/04,04,usb,yes,38,37 2006.229.19:17:02.74/vb/05,04,usb,yes,30,33 2006.229.19:17:02.74/vb/06,04,usb,yes,35,31 2006.229.19:17:02.74/vb/07,04,usb,yes,35,35 2006.229.19:17:02.74/vb/08,04,usb,yes,32,36 2006.229.19:17:02.97/vblo/01,629.99,yes,locked 2006.229.19:17:02.97/vblo/02,634.99,yes,locked 2006.229.19:17:02.97/vblo/03,649.99,yes,locked 2006.229.19:17:02.97/vblo/04,679.99,yes,locked 2006.229.19:17:02.97/vblo/05,709.99,yes,locked 2006.229.19:17:02.97/vblo/06,719.99,yes,locked 2006.229.19:17:02.97/vblo/07,734.99,yes,locked 2006.229.19:17:02.97/vblo/08,744.99,yes,locked 2006.229.19:17:03.12/vabw/8 2006.229.19:17:03.27/vbbw/8 2006.229.19:17:03.36/xfe/off,on,12.2 2006.229.19:17:03.73/ifatt/23,28,28,28 2006.229.19:17:04.07/fmout-gps/S +4.46E-07 2006.229.19:17:04.11:!2006.229.19:17:40 2006.229.19:17:40.00:data_valid=off 2006.229.19:17:40.00:"et 2006.229.19:17:40.00:!+3s 2006.229.19:17:43.01:"tape 2006.229.19:17:43.01:postob 2006.229.19:17:43.22/cable/+6.4181E-03 2006.229.19:17:43.22/wx/26.11,1001.5,100 2006.229.19:17:44.08/fmout-gps/S +4.45E-07 2006.229.19:17:44.08:scan_name=229-1922,jd0608,100 2006.229.19:17:44.08:source=2136+141,213901.31,142336.0,2000.0,ccw 2006.229.19:17:45.14#flagr#flagr/antenna,new-source 2006.229.19:17:45.14:checkk5 2006.229.19:17:45.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:17:45.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:17:46.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:17:46.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:17:47.09/chk_obsdata//k5ts1/T2291917??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.19:17:47.50/chk_obsdata//k5ts2/T2291917??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.19:17:47.92/chk_obsdata//k5ts3/T2291917??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.19:17:48.32/chk_obsdata//k5ts4/T2291917??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.19:17:49.04/k5log//k5ts1_log_newline 2006.229.19:17:49.75/k5log//k5ts2_log_newline 2006.229.19:17:50.45/k5log//k5ts3_log_newline 2006.229.19:17:51.17/k5log//k5ts4_log_newline 2006.229.19:17:51.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:17:51.19:setupk4=1 2006.229.19:17:51.19$setupk4/echo=on 2006.229.19:17:51.19$setupk4/pcalon 2006.229.19:17:51.19$pcalon/"no phase cal control is implemented here 2006.229.19:17:51.20$setupk4/"tpicd=stop 2006.229.19:17:51.20$setupk4/"rec=synch_on 2006.229.19:17:51.20$setupk4/"rec_mode=128 2006.229.19:17:51.20$setupk4/!* 2006.229.19:17:51.20$setupk4/recpk4 2006.229.19:17:51.20$recpk4/recpatch= 2006.229.19:17:51.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:17:51.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:17:51.20$setupk4/vck44 2006.229.19:17:51.20$vck44/valo=1,524.99 2006.229.19:17:51.20#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.19:17:51.20#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.19:17:51.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:51.20#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:51.20#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:51.20#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:51.20#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:17:51.20#ibcon#first serial, iclass 31, count 0 2006.229.19:17:51.20#ibcon#enter sib2, iclass 31, count 0 2006.229.19:17:51.20#ibcon#flushed, iclass 31, count 0 2006.229.19:17:51.20#ibcon#about to write, iclass 31, count 0 2006.229.19:17:51.20#ibcon#wrote, iclass 31, count 0 2006.229.19:17:51.20#ibcon#about to read 3, iclass 31, count 0 2006.229.19:17:51.21#ibcon#read 3, iclass 31, count 0 2006.229.19:17:51.21#ibcon#about to read 4, iclass 31, count 0 2006.229.19:17:51.21#ibcon#read 4, iclass 31, count 0 2006.229.19:17:51.21#ibcon#about to read 5, iclass 31, count 0 2006.229.19:17:51.21#ibcon#read 5, iclass 31, count 0 2006.229.19:17:51.21#ibcon#about to read 6, iclass 31, count 0 2006.229.19:17:51.21#ibcon#read 6, iclass 31, count 0 2006.229.19:17:51.21#ibcon#end of sib2, iclass 31, count 0 2006.229.19:17:51.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:17:51.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:17:51.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:17:51.21#ibcon#*before write, iclass 31, count 0 2006.229.19:17:51.21#ibcon#enter sib2, iclass 31, count 0 2006.229.19:17:51.21#ibcon#flushed, iclass 31, count 0 2006.229.19:17:51.21#ibcon#about to write, iclass 31, count 0 2006.229.19:17:51.21#ibcon#wrote, iclass 31, count 0 2006.229.19:17:51.21#ibcon#about to read 3, iclass 31, count 0 2006.229.19:17:51.26#ibcon#read 3, iclass 31, count 0 2006.229.19:17:51.26#ibcon#about to read 4, iclass 31, count 0 2006.229.19:17:51.26#ibcon#read 4, iclass 31, count 0 2006.229.19:17:51.26#ibcon#about to read 5, iclass 31, count 0 2006.229.19:17:51.26#ibcon#read 5, iclass 31, count 0 2006.229.19:17:51.26#ibcon#about to read 6, iclass 31, count 0 2006.229.19:17:51.26#ibcon#read 6, iclass 31, count 0 2006.229.19:17:51.26#ibcon#end of sib2, iclass 31, count 0 2006.229.19:17:51.26#ibcon#*after write, iclass 31, count 0 2006.229.19:17:51.26#ibcon#*before return 0, iclass 31, count 0 2006.229.19:17:51.26#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:51.26#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:51.26#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:17:51.26#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:17:51.26$vck44/va=1,8 2006.229.19:17:51.26#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.19:17:51.26#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.19:17:51.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:51.26#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:51.26#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:51.26#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:51.26#ibcon#enter wrdev, iclass 33, count 2 2006.229.19:17:51.26#ibcon#first serial, iclass 33, count 2 2006.229.19:17:51.26#ibcon#enter sib2, iclass 33, count 2 2006.229.19:17:51.26#ibcon#flushed, iclass 33, count 2 2006.229.19:17:51.26#ibcon#about to write, iclass 33, count 2 2006.229.19:17:51.26#ibcon#wrote, iclass 33, count 2 2006.229.19:17:51.26#ibcon#about to read 3, iclass 33, count 2 2006.229.19:17:51.28#ibcon#read 3, iclass 33, count 2 2006.229.19:17:51.28#ibcon#about to read 4, iclass 33, count 2 2006.229.19:17:51.28#ibcon#read 4, iclass 33, count 2 2006.229.19:17:51.28#ibcon#about to read 5, iclass 33, count 2 2006.229.19:17:51.28#ibcon#read 5, iclass 33, count 2 2006.229.19:17:51.28#ibcon#about to read 6, iclass 33, count 2 2006.229.19:17:51.28#ibcon#read 6, iclass 33, count 2 2006.229.19:17:51.28#ibcon#end of sib2, iclass 33, count 2 2006.229.19:17:51.28#ibcon#*mode == 0, iclass 33, count 2 2006.229.19:17:51.28#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.19:17:51.28#ibcon#[25=AT01-08\r\n] 2006.229.19:17:51.28#ibcon#*before write, iclass 33, count 2 2006.229.19:17:51.28#ibcon#enter sib2, iclass 33, count 2 2006.229.19:17:51.28#ibcon#flushed, iclass 33, count 2 2006.229.19:17:51.28#ibcon#about to write, iclass 33, count 2 2006.229.19:17:51.28#ibcon#wrote, iclass 33, count 2 2006.229.19:17:51.28#ibcon#about to read 3, iclass 33, count 2 2006.229.19:17:51.31#ibcon#read 3, iclass 33, count 2 2006.229.19:17:51.31#ibcon#about to read 4, iclass 33, count 2 2006.229.19:17:51.31#ibcon#read 4, iclass 33, count 2 2006.229.19:17:51.31#ibcon#about to read 5, iclass 33, count 2 2006.229.19:17:51.31#ibcon#read 5, iclass 33, count 2 2006.229.19:17:51.31#ibcon#about to read 6, iclass 33, count 2 2006.229.19:17:51.31#ibcon#read 6, iclass 33, count 2 2006.229.19:17:51.31#ibcon#end of sib2, iclass 33, count 2 2006.229.19:17:51.31#ibcon#*after write, iclass 33, count 2 2006.229.19:17:51.31#ibcon#*before return 0, iclass 33, count 2 2006.229.19:17:51.31#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:51.31#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:51.31#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.19:17:51.31#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:51.31#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:51.43#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:51.43#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:51.43#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:17:51.43#ibcon#first serial, iclass 33, count 0 2006.229.19:17:51.43#ibcon#enter sib2, iclass 33, count 0 2006.229.19:17:51.43#ibcon#flushed, iclass 33, count 0 2006.229.19:17:51.43#ibcon#about to write, iclass 33, count 0 2006.229.19:17:51.43#ibcon#wrote, iclass 33, count 0 2006.229.19:17:51.43#ibcon#about to read 3, iclass 33, count 0 2006.229.19:17:51.45#ibcon#read 3, iclass 33, count 0 2006.229.19:17:51.45#ibcon#about to read 4, iclass 33, count 0 2006.229.19:17:51.45#ibcon#read 4, iclass 33, count 0 2006.229.19:17:51.45#ibcon#about to read 5, iclass 33, count 0 2006.229.19:17:51.45#ibcon#read 5, iclass 33, count 0 2006.229.19:17:51.45#ibcon#about to read 6, iclass 33, count 0 2006.229.19:17:51.45#ibcon#read 6, iclass 33, count 0 2006.229.19:17:51.45#ibcon#end of sib2, iclass 33, count 0 2006.229.19:17:51.45#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:17:51.45#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:17:51.45#ibcon#[25=USB\r\n] 2006.229.19:17:51.45#ibcon#*before write, iclass 33, count 0 2006.229.19:17:51.45#ibcon#enter sib2, iclass 33, count 0 2006.229.19:17:51.45#ibcon#flushed, iclass 33, count 0 2006.229.19:17:51.45#ibcon#about to write, iclass 33, count 0 2006.229.19:17:51.45#ibcon#wrote, iclass 33, count 0 2006.229.19:17:51.45#ibcon#about to read 3, iclass 33, count 0 2006.229.19:17:51.48#ibcon#read 3, iclass 33, count 0 2006.229.19:17:51.48#ibcon#about to read 4, iclass 33, count 0 2006.229.19:17:51.48#ibcon#read 4, iclass 33, count 0 2006.229.19:17:51.48#ibcon#about to read 5, iclass 33, count 0 2006.229.19:17:51.48#ibcon#read 5, iclass 33, count 0 2006.229.19:17:51.48#ibcon#about to read 6, iclass 33, count 0 2006.229.19:17:51.48#ibcon#read 6, iclass 33, count 0 2006.229.19:17:51.48#ibcon#end of sib2, iclass 33, count 0 2006.229.19:17:51.48#ibcon#*after write, iclass 33, count 0 2006.229.19:17:51.48#ibcon#*before return 0, iclass 33, count 0 2006.229.19:17:51.48#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:51.48#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:51.48#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:17:51.48#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:17:51.48$vck44/valo=2,534.99 2006.229.19:17:51.48#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.19:17:51.48#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.19:17:51.48#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:51.48#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:51.48#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:51.48#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:51.48#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:17:51.48#ibcon#first serial, iclass 35, count 0 2006.229.19:17:51.48#ibcon#enter sib2, iclass 35, count 0 2006.229.19:17:51.48#ibcon#flushed, iclass 35, count 0 2006.229.19:17:51.48#ibcon#about to write, iclass 35, count 0 2006.229.19:17:51.48#ibcon#wrote, iclass 35, count 0 2006.229.19:17:51.48#ibcon#about to read 3, iclass 35, count 0 2006.229.19:17:51.50#ibcon#read 3, iclass 35, count 0 2006.229.19:17:51.50#ibcon#about to read 4, iclass 35, count 0 2006.229.19:17:51.50#ibcon#read 4, iclass 35, count 0 2006.229.19:17:51.50#ibcon#about to read 5, iclass 35, count 0 2006.229.19:17:51.50#ibcon#read 5, iclass 35, count 0 2006.229.19:17:51.50#ibcon#about to read 6, iclass 35, count 0 2006.229.19:17:51.50#ibcon#read 6, iclass 35, count 0 2006.229.19:17:51.50#ibcon#end of sib2, iclass 35, count 0 2006.229.19:17:51.50#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:17:51.50#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:17:51.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:17:51.50#ibcon#*before write, iclass 35, count 0 2006.229.19:17:51.50#ibcon#enter sib2, iclass 35, count 0 2006.229.19:17:51.50#ibcon#flushed, iclass 35, count 0 2006.229.19:17:51.50#ibcon#about to write, iclass 35, count 0 2006.229.19:17:51.50#ibcon#wrote, iclass 35, count 0 2006.229.19:17:51.50#ibcon#about to read 3, iclass 35, count 0 2006.229.19:17:51.54#ibcon#read 3, iclass 35, count 0 2006.229.19:17:51.54#ibcon#about to read 4, iclass 35, count 0 2006.229.19:17:51.54#ibcon#read 4, iclass 35, count 0 2006.229.19:17:51.54#ibcon#about to read 5, iclass 35, count 0 2006.229.19:17:51.54#ibcon#read 5, iclass 35, count 0 2006.229.19:17:51.54#ibcon#about to read 6, iclass 35, count 0 2006.229.19:17:51.54#ibcon#read 6, iclass 35, count 0 2006.229.19:17:51.54#ibcon#end of sib2, iclass 35, count 0 2006.229.19:17:51.54#ibcon#*after write, iclass 35, count 0 2006.229.19:17:51.54#ibcon#*before return 0, iclass 35, count 0 2006.229.19:17:51.54#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:51.54#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:51.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:17:51.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:17:51.54$vck44/va=2,7 2006.229.19:17:51.54#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.19:17:51.54#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.19:17:51.54#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:51.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:51.60#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:51.60#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:51.60#ibcon#enter wrdev, iclass 37, count 2 2006.229.19:17:51.60#ibcon#first serial, iclass 37, count 2 2006.229.19:17:51.60#ibcon#enter sib2, iclass 37, count 2 2006.229.19:17:51.60#ibcon#flushed, iclass 37, count 2 2006.229.19:17:51.60#ibcon#about to write, iclass 37, count 2 2006.229.19:17:51.60#ibcon#wrote, iclass 37, count 2 2006.229.19:17:51.60#ibcon#about to read 3, iclass 37, count 2 2006.229.19:17:51.62#ibcon#read 3, iclass 37, count 2 2006.229.19:17:51.62#ibcon#about to read 4, iclass 37, count 2 2006.229.19:17:51.62#ibcon#read 4, iclass 37, count 2 2006.229.19:17:51.62#ibcon#about to read 5, iclass 37, count 2 2006.229.19:17:51.62#ibcon#read 5, iclass 37, count 2 2006.229.19:17:51.62#ibcon#about to read 6, iclass 37, count 2 2006.229.19:17:51.62#ibcon#read 6, iclass 37, count 2 2006.229.19:17:51.62#ibcon#end of sib2, iclass 37, count 2 2006.229.19:17:51.62#ibcon#*mode == 0, iclass 37, count 2 2006.229.19:17:51.62#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.19:17:51.62#ibcon#[25=AT02-07\r\n] 2006.229.19:17:51.62#ibcon#*before write, iclass 37, count 2 2006.229.19:17:51.62#ibcon#enter sib2, iclass 37, count 2 2006.229.19:17:51.62#ibcon#flushed, iclass 37, count 2 2006.229.19:17:51.62#ibcon#about to write, iclass 37, count 2 2006.229.19:17:51.62#ibcon#wrote, iclass 37, count 2 2006.229.19:17:51.62#ibcon#about to read 3, iclass 37, count 2 2006.229.19:17:51.65#ibcon#read 3, iclass 37, count 2 2006.229.19:17:51.65#ibcon#about to read 4, iclass 37, count 2 2006.229.19:17:51.65#ibcon#read 4, iclass 37, count 2 2006.229.19:17:51.65#ibcon#about to read 5, iclass 37, count 2 2006.229.19:17:51.65#ibcon#read 5, iclass 37, count 2 2006.229.19:17:51.65#ibcon#about to read 6, iclass 37, count 2 2006.229.19:17:51.65#ibcon#read 6, iclass 37, count 2 2006.229.19:17:51.65#ibcon#end of sib2, iclass 37, count 2 2006.229.19:17:51.65#ibcon#*after write, iclass 37, count 2 2006.229.19:17:51.65#ibcon#*before return 0, iclass 37, count 2 2006.229.19:17:51.65#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:51.65#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:51.65#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.19:17:51.65#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:51.65#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:51.77#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:51.77#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:51.77#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:17:51.77#ibcon#first serial, iclass 37, count 0 2006.229.19:17:51.77#ibcon#enter sib2, iclass 37, count 0 2006.229.19:17:51.77#ibcon#flushed, iclass 37, count 0 2006.229.19:17:51.77#ibcon#about to write, iclass 37, count 0 2006.229.19:17:51.77#ibcon#wrote, iclass 37, count 0 2006.229.19:17:51.77#ibcon#about to read 3, iclass 37, count 0 2006.229.19:17:51.79#ibcon#read 3, iclass 37, count 0 2006.229.19:17:51.79#ibcon#about to read 4, iclass 37, count 0 2006.229.19:17:51.79#ibcon#read 4, iclass 37, count 0 2006.229.19:17:51.79#ibcon#about to read 5, iclass 37, count 0 2006.229.19:17:51.79#ibcon#read 5, iclass 37, count 0 2006.229.19:17:51.79#ibcon#about to read 6, iclass 37, count 0 2006.229.19:17:51.79#ibcon#read 6, iclass 37, count 0 2006.229.19:17:51.79#ibcon#end of sib2, iclass 37, count 0 2006.229.19:17:51.79#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:17:51.79#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:17:51.79#ibcon#[25=USB\r\n] 2006.229.19:17:51.79#ibcon#*before write, iclass 37, count 0 2006.229.19:17:51.79#ibcon#enter sib2, iclass 37, count 0 2006.229.19:17:51.79#ibcon#flushed, iclass 37, count 0 2006.229.19:17:51.79#ibcon#about to write, iclass 37, count 0 2006.229.19:17:51.79#ibcon#wrote, iclass 37, count 0 2006.229.19:17:51.79#ibcon#about to read 3, iclass 37, count 0 2006.229.19:17:51.82#ibcon#read 3, iclass 37, count 0 2006.229.19:17:51.82#ibcon#about to read 4, iclass 37, count 0 2006.229.19:17:51.82#ibcon#read 4, iclass 37, count 0 2006.229.19:17:51.82#ibcon#about to read 5, iclass 37, count 0 2006.229.19:17:51.82#ibcon#read 5, iclass 37, count 0 2006.229.19:17:51.82#ibcon#about to read 6, iclass 37, count 0 2006.229.19:17:51.82#ibcon#read 6, iclass 37, count 0 2006.229.19:17:51.82#ibcon#end of sib2, iclass 37, count 0 2006.229.19:17:51.82#ibcon#*after write, iclass 37, count 0 2006.229.19:17:51.82#ibcon#*before return 0, iclass 37, count 0 2006.229.19:17:51.82#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:51.82#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:51.82#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:17:51.82#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:17:51.82$vck44/valo=3,564.99 2006.229.19:17:51.82#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.19:17:51.82#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.19:17:51.82#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:51.82#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:51.82#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:51.82#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:51.82#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:17:51.82#ibcon#first serial, iclass 39, count 0 2006.229.19:17:51.82#ibcon#enter sib2, iclass 39, count 0 2006.229.19:17:51.82#ibcon#flushed, iclass 39, count 0 2006.229.19:17:51.82#ibcon#about to write, iclass 39, count 0 2006.229.19:17:51.82#ibcon#wrote, iclass 39, count 0 2006.229.19:17:51.82#ibcon#about to read 3, iclass 39, count 0 2006.229.19:17:51.84#ibcon#read 3, iclass 39, count 0 2006.229.19:17:51.84#ibcon#about to read 4, iclass 39, count 0 2006.229.19:17:51.84#ibcon#read 4, iclass 39, count 0 2006.229.19:17:51.84#ibcon#about to read 5, iclass 39, count 0 2006.229.19:17:51.84#ibcon#read 5, iclass 39, count 0 2006.229.19:17:51.84#ibcon#about to read 6, iclass 39, count 0 2006.229.19:17:51.84#ibcon#read 6, iclass 39, count 0 2006.229.19:17:51.84#ibcon#end of sib2, iclass 39, count 0 2006.229.19:17:51.84#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:17:51.84#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:17:51.84#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:17:51.84#ibcon#*before write, iclass 39, count 0 2006.229.19:17:51.84#ibcon#enter sib2, iclass 39, count 0 2006.229.19:17:51.84#ibcon#flushed, iclass 39, count 0 2006.229.19:17:51.84#ibcon#about to write, iclass 39, count 0 2006.229.19:17:51.84#ibcon#wrote, iclass 39, count 0 2006.229.19:17:51.84#ibcon#about to read 3, iclass 39, count 0 2006.229.19:17:51.88#ibcon#read 3, iclass 39, count 0 2006.229.19:17:51.88#ibcon#about to read 4, iclass 39, count 0 2006.229.19:17:51.88#ibcon#read 4, iclass 39, count 0 2006.229.19:17:51.88#ibcon#about to read 5, iclass 39, count 0 2006.229.19:17:51.88#ibcon#read 5, iclass 39, count 0 2006.229.19:17:51.88#ibcon#about to read 6, iclass 39, count 0 2006.229.19:17:51.88#ibcon#read 6, iclass 39, count 0 2006.229.19:17:51.88#ibcon#end of sib2, iclass 39, count 0 2006.229.19:17:51.88#ibcon#*after write, iclass 39, count 0 2006.229.19:17:51.88#ibcon#*before return 0, iclass 39, count 0 2006.229.19:17:51.88#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:51.88#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:51.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:17:51.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:17:51.88$vck44/va=3,6 2006.229.19:17:51.88#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.19:17:51.88#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.19:17:51.88#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:51.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:51.94#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:51.94#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:51.94#ibcon#enter wrdev, iclass 3, count 2 2006.229.19:17:51.94#ibcon#first serial, iclass 3, count 2 2006.229.19:17:51.94#ibcon#enter sib2, iclass 3, count 2 2006.229.19:17:51.94#ibcon#flushed, iclass 3, count 2 2006.229.19:17:51.94#ibcon#about to write, iclass 3, count 2 2006.229.19:17:51.94#ibcon#wrote, iclass 3, count 2 2006.229.19:17:51.94#ibcon#about to read 3, iclass 3, count 2 2006.229.19:17:51.96#ibcon#read 3, iclass 3, count 2 2006.229.19:17:51.96#ibcon#about to read 4, iclass 3, count 2 2006.229.19:17:51.96#ibcon#read 4, iclass 3, count 2 2006.229.19:17:51.96#ibcon#about to read 5, iclass 3, count 2 2006.229.19:17:51.96#ibcon#read 5, iclass 3, count 2 2006.229.19:17:51.96#ibcon#about to read 6, iclass 3, count 2 2006.229.19:17:51.96#ibcon#read 6, iclass 3, count 2 2006.229.19:17:51.96#ibcon#end of sib2, iclass 3, count 2 2006.229.19:17:51.96#ibcon#*mode == 0, iclass 3, count 2 2006.229.19:17:51.96#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.19:17:51.96#ibcon#[25=AT03-06\r\n] 2006.229.19:17:51.96#ibcon#*before write, iclass 3, count 2 2006.229.19:17:51.96#ibcon#enter sib2, iclass 3, count 2 2006.229.19:17:51.96#ibcon#flushed, iclass 3, count 2 2006.229.19:17:51.96#ibcon#about to write, iclass 3, count 2 2006.229.19:17:51.96#ibcon#wrote, iclass 3, count 2 2006.229.19:17:51.96#ibcon#about to read 3, iclass 3, count 2 2006.229.19:17:51.99#ibcon#read 3, iclass 3, count 2 2006.229.19:17:51.99#ibcon#about to read 4, iclass 3, count 2 2006.229.19:17:51.99#ibcon#read 4, iclass 3, count 2 2006.229.19:17:51.99#ibcon#about to read 5, iclass 3, count 2 2006.229.19:17:51.99#ibcon#read 5, iclass 3, count 2 2006.229.19:17:51.99#ibcon#about to read 6, iclass 3, count 2 2006.229.19:17:51.99#ibcon#read 6, iclass 3, count 2 2006.229.19:17:51.99#ibcon#end of sib2, iclass 3, count 2 2006.229.19:17:51.99#ibcon#*after write, iclass 3, count 2 2006.229.19:17:51.99#ibcon#*before return 0, iclass 3, count 2 2006.229.19:17:51.99#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:51.99#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:51.99#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.19:17:51.99#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:51.99#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:52.11#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:52.11#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:52.11#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:17:52.11#ibcon#first serial, iclass 3, count 0 2006.229.19:17:52.11#ibcon#enter sib2, iclass 3, count 0 2006.229.19:17:52.11#ibcon#flushed, iclass 3, count 0 2006.229.19:17:52.11#ibcon#about to write, iclass 3, count 0 2006.229.19:17:52.11#ibcon#wrote, iclass 3, count 0 2006.229.19:17:52.11#ibcon#about to read 3, iclass 3, count 0 2006.229.19:17:52.13#ibcon#read 3, iclass 3, count 0 2006.229.19:17:52.13#ibcon#about to read 4, iclass 3, count 0 2006.229.19:17:52.13#ibcon#read 4, iclass 3, count 0 2006.229.19:17:52.13#ibcon#about to read 5, iclass 3, count 0 2006.229.19:17:52.13#ibcon#read 5, iclass 3, count 0 2006.229.19:17:52.13#ibcon#about to read 6, iclass 3, count 0 2006.229.19:17:52.13#ibcon#read 6, iclass 3, count 0 2006.229.19:17:52.13#ibcon#end of sib2, iclass 3, count 0 2006.229.19:17:52.13#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:17:52.13#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:17:52.13#ibcon#[25=USB\r\n] 2006.229.19:17:52.13#ibcon#*before write, iclass 3, count 0 2006.229.19:17:52.13#ibcon#enter sib2, iclass 3, count 0 2006.229.19:17:52.13#ibcon#flushed, iclass 3, count 0 2006.229.19:17:52.13#ibcon#about to write, iclass 3, count 0 2006.229.19:17:52.13#ibcon#wrote, iclass 3, count 0 2006.229.19:17:52.13#ibcon#about to read 3, iclass 3, count 0 2006.229.19:17:52.16#ibcon#read 3, iclass 3, count 0 2006.229.19:17:52.16#ibcon#about to read 4, iclass 3, count 0 2006.229.19:17:52.16#ibcon#read 4, iclass 3, count 0 2006.229.19:17:52.16#ibcon#about to read 5, iclass 3, count 0 2006.229.19:17:52.16#ibcon#read 5, iclass 3, count 0 2006.229.19:17:52.16#ibcon#about to read 6, iclass 3, count 0 2006.229.19:17:52.16#ibcon#read 6, iclass 3, count 0 2006.229.19:17:52.16#ibcon#end of sib2, iclass 3, count 0 2006.229.19:17:52.16#ibcon#*after write, iclass 3, count 0 2006.229.19:17:52.16#ibcon#*before return 0, iclass 3, count 0 2006.229.19:17:52.16#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:52.16#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:52.16#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:17:52.16#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:17:52.16$vck44/valo=4,624.99 2006.229.19:17:52.16#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:17:52.16#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:17:52.16#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:52.16#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:52.16#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:52.16#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:52.16#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:17:52.16#ibcon#first serial, iclass 5, count 0 2006.229.19:17:52.16#ibcon#enter sib2, iclass 5, count 0 2006.229.19:17:52.16#ibcon#flushed, iclass 5, count 0 2006.229.19:17:52.16#ibcon#about to write, iclass 5, count 0 2006.229.19:17:52.16#ibcon#wrote, iclass 5, count 0 2006.229.19:17:52.16#ibcon#about to read 3, iclass 5, count 0 2006.229.19:17:52.18#ibcon#read 3, iclass 5, count 0 2006.229.19:17:52.18#ibcon#about to read 4, iclass 5, count 0 2006.229.19:17:52.18#ibcon#read 4, iclass 5, count 0 2006.229.19:17:52.18#ibcon#about to read 5, iclass 5, count 0 2006.229.19:17:52.18#ibcon#read 5, iclass 5, count 0 2006.229.19:17:52.18#ibcon#about to read 6, iclass 5, count 0 2006.229.19:17:52.18#ibcon#read 6, iclass 5, count 0 2006.229.19:17:52.18#ibcon#end of sib2, iclass 5, count 0 2006.229.19:17:52.18#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:17:52.18#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:17:52.18#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:17:52.18#ibcon#*before write, iclass 5, count 0 2006.229.19:17:52.18#ibcon#enter sib2, iclass 5, count 0 2006.229.19:17:52.18#ibcon#flushed, iclass 5, count 0 2006.229.19:17:52.18#ibcon#about to write, iclass 5, count 0 2006.229.19:17:52.18#ibcon#wrote, iclass 5, count 0 2006.229.19:17:52.18#ibcon#about to read 3, iclass 5, count 0 2006.229.19:17:52.22#ibcon#read 3, iclass 5, count 0 2006.229.19:17:52.22#ibcon#about to read 4, iclass 5, count 0 2006.229.19:17:52.22#ibcon#read 4, iclass 5, count 0 2006.229.19:17:52.22#ibcon#about to read 5, iclass 5, count 0 2006.229.19:17:52.22#ibcon#read 5, iclass 5, count 0 2006.229.19:17:52.22#ibcon#about to read 6, iclass 5, count 0 2006.229.19:17:52.22#ibcon#read 6, iclass 5, count 0 2006.229.19:17:52.22#ibcon#end of sib2, iclass 5, count 0 2006.229.19:17:52.22#ibcon#*after write, iclass 5, count 0 2006.229.19:17:52.22#ibcon#*before return 0, iclass 5, count 0 2006.229.19:17:52.22#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:52.22#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:52.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:17:52.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:17:52.22$vck44/va=4,7 2006.229.19:17:52.22#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:17:52.22#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:17:52.22#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:52.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:52.28#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:52.28#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:52.28#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:17:52.28#ibcon#first serial, iclass 7, count 2 2006.229.19:17:52.28#ibcon#enter sib2, iclass 7, count 2 2006.229.19:17:52.28#ibcon#flushed, iclass 7, count 2 2006.229.19:17:52.28#ibcon#about to write, iclass 7, count 2 2006.229.19:17:52.28#ibcon#wrote, iclass 7, count 2 2006.229.19:17:52.28#ibcon#about to read 3, iclass 7, count 2 2006.229.19:17:52.30#ibcon#read 3, iclass 7, count 2 2006.229.19:17:52.30#ibcon#about to read 4, iclass 7, count 2 2006.229.19:17:52.30#ibcon#read 4, iclass 7, count 2 2006.229.19:17:52.30#ibcon#about to read 5, iclass 7, count 2 2006.229.19:17:52.30#ibcon#read 5, iclass 7, count 2 2006.229.19:17:52.30#ibcon#about to read 6, iclass 7, count 2 2006.229.19:17:52.30#ibcon#read 6, iclass 7, count 2 2006.229.19:17:52.30#ibcon#end of sib2, iclass 7, count 2 2006.229.19:17:52.30#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:17:52.30#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:17:52.30#ibcon#[25=AT04-07\r\n] 2006.229.19:17:52.30#ibcon#*before write, iclass 7, count 2 2006.229.19:17:52.30#ibcon#enter sib2, iclass 7, count 2 2006.229.19:17:52.30#ibcon#flushed, iclass 7, count 2 2006.229.19:17:52.30#ibcon#about to write, iclass 7, count 2 2006.229.19:17:52.30#ibcon#wrote, iclass 7, count 2 2006.229.19:17:52.30#ibcon#about to read 3, iclass 7, count 2 2006.229.19:17:52.33#ibcon#read 3, iclass 7, count 2 2006.229.19:17:52.33#ibcon#about to read 4, iclass 7, count 2 2006.229.19:17:52.33#ibcon#read 4, iclass 7, count 2 2006.229.19:17:52.33#ibcon#about to read 5, iclass 7, count 2 2006.229.19:17:52.33#ibcon#read 5, iclass 7, count 2 2006.229.19:17:52.33#ibcon#about to read 6, iclass 7, count 2 2006.229.19:17:52.33#ibcon#read 6, iclass 7, count 2 2006.229.19:17:52.33#ibcon#end of sib2, iclass 7, count 2 2006.229.19:17:52.33#ibcon#*after write, iclass 7, count 2 2006.229.19:17:52.33#ibcon#*before return 0, iclass 7, count 2 2006.229.19:17:52.33#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:52.33#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:52.33#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:17:52.33#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:52.33#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:52.45#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:52.45#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:52.45#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:17:52.45#ibcon#first serial, iclass 7, count 0 2006.229.19:17:52.45#ibcon#enter sib2, iclass 7, count 0 2006.229.19:17:52.45#ibcon#flushed, iclass 7, count 0 2006.229.19:17:52.45#ibcon#about to write, iclass 7, count 0 2006.229.19:17:52.45#ibcon#wrote, iclass 7, count 0 2006.229.19:17:52.45#ibcon#about to read 3, iclass 7, count 0 2006.229.19:17:52.47#ibcon#read 3, iclass 7, count 0 2006.229.19:17:52.47#ibcon#about to read 4, iclass 7, count 0 2006.229.19:17:52.47#ibcon#read 4, iclass 7, count 0 2006.229.19:17:52.47#ibcon#about to read 5, iclass 7, count 0 2006.229.19:17:52.47#ibcon#read 5, iclass 7, count 0 2006.229.19:17:52.47#ibcon#about to read 6, iclass 7, count 0 2006.229.19:17:52.47#ibcon#read 6, iclass 7, count 0 2006.229.19:17:52.47#ibcon#end of sib2, iclass 7, count 0 2006.229.19:17:52.47#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:17:52.47#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:17:52.47#ibcon#[25=USB\r\n] 2006.229.19:17:52.47#ibcon#*before write, iclass 7, count 0 2006.229.19:17:52.47#ibcon#enter sib2, iclass 7, count 0 2006.229.19:17:52.47#ibcon#flushed, iclass 7, count 0 2006.229.19:17:52.47#ibcon#about to write, iclass 7, count 0 2006.229.19:17:52.47#ibcon#wrote, iclass 7, count 0 2006.229.19:17:52.47#ibcon#about to read 3, iclass 7, count 0 2006.229.19:17:52.50#ibcon#read 3, iclass 7, count 0 2006.229.19:17:52.50#ibcon#about to read 4, iclass 7, count 0 2006.229.19:17:52.50#ibcon#read 4, iclass 7, count 0 2006.229.19:17:52.50#ibcon#about to read 5, iclass 7, count 0 2006.229.19:17:52.50#ibcon#read 5, iclass 7, count 0 2006.229.19:17:52.50#ibcon#about to read 6, iclass 7, count 0 2006.229.19:17:52.50#ibcon#read 6, iclass 7, count 0 2006.229.19:17:52.50#ibcon#end of sib2, iclass 7, count 0 2006.229.19:17:52.50#ibcon#*after write, iclass 7, count 0 2006.229.19:17:52.50#ibcon#*before return 0, iclass 7, count 0 2006.229.19:17:52.50#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:52.50#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:52.50#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:17:52.50#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:17:52.50$vck44/valo=5,734.99 2006.229.19:17:52.50#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:17:52.50#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:17:52.50#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:52.50#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:52.50#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:52.50#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:52.50#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:17:52.50#ibcon#first serial, iclass 11, count 0 2006.229.19:17:52.50#ibcon#enter sib2, iclass 11, count 0 2006.229.19:17:52.50#ibcon#flushed, iclass 11, count 0 2006.229.19:17:52.50#ibcon#about to write, iclass 11, count 0 2006.229.19:17:52.50#ibcon#wrote, iclass 11, count 0 2006.229.19:17:52.50#ibcon#about to read 3, iclass 11, count 0 2006.229.19:17:52.52#ibcon#read 3, iclass 11, count 0 2006.229.19:17:52.52#ibcon#about to read 4, iclass 11, count 0 2006.229.19:17:52.52#ibcon#read 4, iclass 11, count 0 2006.229.19:17:52.52#ibcon#about to read 5, iclass 11, count 0 2006.229.19:17:52.52#ibcon#read 5, iclass 11, count 0 2006.229.19:17:52.52#ibcon#about to read 6, iclass 11, count 0 2006.229.19:17:52.52#ibcon#read 6, iclass 11, count 0 2006.229.19:17:52.52#ibcon#end of sib2, iclass 11, count 0 2006.229.19:17:52.52#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:17:52.52#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:17:52.52#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:17:52.52#ibcon#*before write, iclass 11, count 0 2006.229.19:17:52.52#ibcon#enter sib2, iclass 11, count 0 2006.229.19:17:52.52#ibcon#flushed, iclass 11, count 0 2006.229.19:17:52.52#ibcon#about to write, iclass 11, count 0 2006.229.19:17:52.52#ibcon#wrote, iclass 11, count 0 2006.229.19:17:52.52#ibcon#about to read 3, iclass 11, count 0 2006.229.19:17:52.56#ibcon#read 3, iclass 11, count 0 2006.229.19:17:52.56#ibcon#about to read 4, iclass 11, count 0 2006.229.19:17:52.56#ibcon#read 4, iclass 11, count 0 2006.229.19:17:52.56#ibcon#about to read 5, iclass 11, count 0 2006.229.19:17:52.56#ibcon#read 5, iclass 11, count 0 2006.229.19:17:52.56#ibcon#about to read 6, iclass 11, count 0 2006.229.19:17:52.56#ibcon#read 6, iclass 11, count 0 2006.229.19:17:52.56#ibcon#end of sib2, iclass 11, count 0 2006.229.19:17:52.56#ibcon#*after write, iclass 11, count 0 2006.229.19:17:52.56#ibcon#*before return 0, iclass 11, count 0 2006.229.19:17:52.56#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:52.56#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:52.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:17:52.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:17:52.56$vck44/va=5,4 2006.229.19:17:52.56#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.19:17:52.56#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.19:17:52.56#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:52.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:52.62#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:52.62#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:52.62#ibcon#enter wrdev, iclass 13, count 2 2006.229.19:17:52.62#ibcon#first serial, iclass 13, count 2 2006.229.19:17:52.62#ibcon#enter sib2, iclass 13, count 2 2006.229.19:17:52.62#ibcon#flushed, iclass 13, count 2 2006.229.19:17:52.62#ibcon#about to write, iclass 13, count 2 2006.229.19:17:52.62#ibcon#wrote, iclass 13, count 2 2006.229.19:17:52.62#ibcon#about to read 3, iclass 13, count 2 2006.229.19:17:52.64#ibcon#read 3, iclass 13, count 2 2006.229.19:17:52.64#ibcon#about to read 4, iclass 13, count 2 2006.229.19:17:52.64#ibcon#read 4, iclass 13, count 2 2006.229.19:17:52.64#ibcon#about to read 5, iclass 13, count 2 2006.229.19:17:52.64#ibcon#read 5, iclass 13, count 2 2006.229.19:17:52.64#ibcon#about to read 6, iclass 13, count 2 2006.229.19:17:52.64#ibcon#read 6, iclass 13, count 2 2006.229.19:17:52.64#ibcon#end of sib2, iclass 13, count 2 2006.229.19:17:52.64#ibcon#*mode == 0, iclass 13, count 2 2006.229.19:17:52.64#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.19:17:52.64#ibcon#[25=AT05-04\r\n] 2006.229.19:17:52.64#ibcon#*before write, iclass 13, count 2 2006.229.19:17:52.64#ibcon#enter sib2, iclass 13, count 2 2006.229.19:17:52.64#ibcon#flushed, iclass 13, count 2 2006.229.19:17:52.64#ibcon#about to write, iclass 13, count 2 2006.229.19:17:52.64#ibcon#wrote, iclass 13, count 2 2006.229.19:17:52.64#ibcon#about to read 3, iclass 13, count 2 2006.229.19:17:52.67#ibcon#read 3, iclass 13, count 2 2006.229.19:17:52.67#ibcon#about to read 4, iclass 13, count 2 2006.229.19:17:52.67#ibcon#read 4, iclass 13, count 2 2006.229.19:17:52.67#ibcon#about to read 5, iclass 13, count 2 2006.229.19:17:52.67#ibcon#read 5, iclass 13, count 2 2006.229.19:17:52.67#ibcon#about to read 6, iclass 13, count 2 2006.229.19:17:52.67#ibcon#read 6, iclass 13, count 2 2006.229.19:17:52.67#ibcon#end of sib2, iclass 13, count 2 2006.229.19:17:52.67#ibcon#*after write, iclass 13, count 2 2006.229.19:17:52.67#ibcon#*before return 0, iclass 13, count 2 2006.229.19:17:52.67#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:52.67#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:52.67#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.19:17:52.67#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:52.67#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:52.79#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:52.79#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:52.79#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:17:52.79#ibcon#first serial, iclass 13, count 0 2006.229.19:17:52.79#ibcon#enter sib2, iclass 13, count 0 2006.229.19:17:52.79#ibcon#flushed, iclass 13, count 0 2006.229.19:17:52.79#ibcon#about to write, iclass 13, count 0 2006.229.19:17:52.79#ibcon#wrote, iclass 13, count 0 2006.229.19:17:52.79#ibcon#about to read 3, iclass 13, count 0 2006.229.19:17:52.81#ibcon#read 3, iclass 13, count 0 2006.229.19:17:52.81#ibcon#about to read 4, iclass 13, count 0 2006.229.19:17:52.81#ibcon#read 4, iclass 13, count 0 2006.229.19:17:52.81#ibcon#about to read 5, iclass 13, count 0 2006.229.19:17:52.81#ibcon#read 5, iclass 13, count 0 2006.229.19:17:52.81#ibcon#about to read 6, iclass 13, count 0 2006.229.19:17:52.81#ibcon#read 6, iclass 13, count 0 2006.229.19:17:52.81#ibcon#end of sib2, iclass 13, count 0 2006.229.19:17:52.81#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:17:52.81#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:17:52.81#ibcon#[25=USB\r\n] 2006.229.19:17:52.81#ibcon#*before write, iclass 13, count 0 2006.229.19:17:52.81#ibcon#enter sib2, iclass 13, count 0 2006.229.19:17:52.81#ibcon#flushed, iclass 13, count 0 2006.229.19:17:52.81#ibcon#about to write, iclass 13, count 0 2006.229.19:17:52.81#ibcon#wrote, iclass 13, count 0 2006.229.19:17:52.81#ibcon#about to read 3, iclass 13, count 0 2006.229.19:17:52.84#ibcon#read 3, iclass 13, count 0 2006.229.19:17:52.84#ibcon#about to read 4, iclass 13, count 0 2006.229.19:17:52.84#ibcon#read 4, iclass 13, count 0 2006.229.19:17:52.84#ibcon#about to read 5, iclass 13, count 0 2006.229.19:17:52.84#ibcon#read 5, iclass 13, count 0 2006.229.19:17:52.84#ibcon#about to read 6, iclass 13, count 0 2006.229.19:17:52.84#ibcon#read 6, iclass 13, count 0 2006.229.19:17:52.84#ibcon#end of sib2, iclass 13, count 0 2006.229.19:17:52.84#ibcon#*after write, iclass 13, count 0 2006.229.19:17:52.84#ibcon#*before return 0, iclass 13, count 0 2006.229.19:17:52.84#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:52.84#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:52.84#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:17:52.84#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:17:52.84$vck44/valo=6,814.99 2006.229.19:17:52.84#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.19:17:52.84#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.19:17:52.84#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:52.84#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:52.84#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:52.84#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:52.84#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:17:52.84#ibcon#first serial, iclass 15, count 0 2006.229.19:17:52.84#ibcon#enter sib2, iclass 15, count 0 2006.229.19:17:52.84#ibcon#flushed, iclass 15, count 0 2006.229.19:17:52.84#ibcon#about to write, iclass 15, count 0 2006.229.19:17:52.84#ibcon#wrote, iclass 15, count 0 2006.229.19:17:52.84#ibcon#about to read 3, iclass 15, count 0 2006.229.19:17:52.86#ibcon#read 3, iclass 15, count 0 2006.229.19:17:52.86#ibcon#about to read 4, iclass 15, count 0 2006.229.19:17:52.86#ibcon#read 4, iclass 15, count 0 2006.229.19:17:52.86#ibcon#about to read 5, iclass 15, count 0 2006.229.19:17:52.86#ibcon#read 5, iclass 15, count 0 2006.229.19:17:52.86#ibcon#about to read 6, iclass 15, count 0 2006.229.19:17:52.86#ibcon#read 6, iclass 15, count 0 2006.229.19:17:52.86#ibcon#end of sib2, iclass 15, count 0 2006.229.19:17:52.86#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:17:52.86#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:17:52.86#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:17:52.86#ibcon#*before write, iclass 15, count 0 2006.229.19:17:52.86#ibcon#enter sib2, iclass 15, count 0 2006.229.19:17:52.86#ibcon#flushed, iclass 15, count 0 2006.229.19:17:52.86#ibcon#about to write, iclass 15, count 0 2006.229.19:17:52.86#ibcon#wrote, iclass 15, count 0 2006.229.19:17:52.86#ibcon#about to read 3, iclass 15, count 0 2006.229.19:17:52.90#ibcon#read 3, iclass 15, count 0 2006.229.19:17:52.90#ibcon#about to read 4, iclass 15, count 0 2006.229.19:17:52.90#ibcon#read 4, iclass 15, count 0 2006.229.19:17:52.90#ibcon#about to read 5, iclass 15, count 0 2006.229.19:17:52.90#ibcon#read 5, iclass 15, count 0 2006.229.19:17:52.90#ibcon#about to read 6, iclass 15, count 0 2006.229.19:17:52.90#ibcon#read 6, iclass 15, count 0 2006.229.19:17:52.90#ibcon#end of sib2, iclass 15, count 0 2006.229.19:17:52.90#ibcon#*after write, iclass 15, count 0 2006.229.19:17:52.90#ibcon#*before return 0, iclass 15, count 0 2006.229.19:17:52.90#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:52.90#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:52.90#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:17:52.90#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:17:52.90$vck44/va=6,4 2006.229.19:17:52.90#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.19:17:52.90#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.19:17:52.90#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:52.90#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:52.96#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:52.96#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:52.96#ibcon#enter wrdev, iclass 17, count 2 2006.229.19:17:52.96#ibcon#first serial, iclass 17, count 2 2006.229.19:17:52.96#ibcon#enter sib2, iclass 17, count 2 2006.229.19:17:52.96#ibcon#flushed, iclass 17, count 2 2006.229.19:17:52.96#ibcon#about to write, iclass 17, count 2 2006.229.19:17:52.96#ibcon#wrote, iclass 17, count 2 2006.229.19:17:52.96#ibcon#about to read 3, iclass 17, count 2 2006.229.19:17:52.98#ibcon#read 3, iclass 17, count 2 2006.229.19:17:52.98#ibcon#about to read 4, iclass 17, count 2 2006.229.19:17:52.98#ibcon#read 4, iclass 17, count 2 2006.229.19:17:52.98#ibcon#about to read 5, iclass 17, count 2 2006.229.19:17:52.98#ibcon#read 5, iclass 17, count 2 2006.229.19:17:52.98#ibcon#about to read 6, iclass 17, count 2 2006.229.19:17:52.98#ibcon#read 6, iclass 17, count 2 2006.229.19:17:52.98#ibcon#end of sib2, iclass 17, count 2 2006.229.19:17:52.98#ibcon#*mode == 0, iclass 17, count 2 2006.229.19:17:52.98#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.19:17:52.98#ibcon#[25=AT06-04\r\n] 2006.229.19:17:52.98#ibcon#*before write, iclass 17, count 2 2006.229.19:17:52.98#ibcon#enter sib2, iclass 17, count 2 2006.229.19:17:52.98#ibcon#flushed, iclass 17, count 2 2006.229.19:17:52.98#ibcon#about to write, iclass 17, count 2 2006.229.19:17:52.98#ibcon#wrote, iclass 17, count 2 2006.229.19:17:52.98#ibcon#about to read 3, iclass 17, count 2 2006.229.19:17:53.01#ibcon#read 3, iclass 17, count 2 2006.229.19:17:53.01#ibcon#about to read 4, iclass 17, count 2 2006.229.19:17:53.01#ibcon#read 4, iclass 17, count 2 2006.229.19:17:53.01#ibcon#about to read 5, iclass 17, count 2 2006.229.19:17:53.01#ibcon#read 5, iclass 17, count 2 2006.229.19:17:53.01#ibcon#about to read 6, iclass 17, count 2 2006.229.19:17:53.01#ibcon#read 6, iclass 17, count 2 2006.229.19:17:53.01#ibcon#end of sib2, iclass 17, count 2 2006.229.19:17:53.01#ibcon#*after write, iclass 17, count 2 2006.229.19:17:53.01#ibcon#*before return 0, iclass 17, count 2 2006.229.19:17:53.01#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:53.01#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:53.01#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.19:17:53.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:53.01#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:53.13#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:53.13#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:53.13#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:17:53.13#ibcon#first serial, iclass 17, count 0 2006.229.19:17:53.13#ibcon#enter sib2, iclass 17, count 0 2006.229.19:17:53.13#ibcon#flushed, iclass 17, count 0 2006.229.19:17:53.13#ibcon#about to write, iclass 17, count 0 2006.229.19:17:53.13#ibcon#wrote, iclass 17, count 0 2006.229.19:17:53.13#ibcon#about to read 3, iclass 17, count 0 2006.229.19:17:53.15#ibcon#read 3, iclass 17, count 0 2006.229.19:17:53.15#ibcon#about to read 4, iclass 17, count 0 2006.229.19:17:53.15#ibcon#read 4, iclass 17, count 0 2006.229.19:17:53.15#ibcon#about to read 5, iclass 17, count 0 2006.229.19:17:53.15#ibcon#read 5, iclass 17, count 0 2006.229.19:17:53.15#ibcon#about to read 6, iclass 17, count 0 2006.229.19:17:53.15#ibcon#read 6, iclass 17, count 0 2006.229.19:17:53.15#ibcon#end of sib2, iclass 17, count 0 2006.229.19:17:53.15#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:17:53.15#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:17:53.15#ibcon#[25=USB\r\n] 2006.229.19:17:53.15#ibcon#*before write, iclass 17, count 0 2006.229.19:17:53.15#ibcon#enter sib2, iclass 17, count 0 2006.229.19:17:53.15#ibcon#flushed, iclass 17, count 0 2006.229.19:17:53.15#ibcon#about to write, iclass 17, count 0 2006.229.19:17:53.15#ibcon#wrote, iclass 17, count 0 2006.229.19:17:53.15#ibcon#about to read 3, iclass 17, count 0 2006.229.19:17:53.18#ibcon#read 3, iclass 17, count 0 2006.229.19:17:53.18#ibcon#about to read 4, iclass 17, count 0 2006.229.19:17:53.18#ibcon#read 4, iclass 17, count 0 2006.229.19:17:53.18#ibcon#about to read 5, iclass 17, count 0 2006.229.19:17:53.18#ibcon#read 5, iclass 17, count 0 2006.229.19:17:53.18#ibcon#about to read 6, iclass 17, count 0 2006.229.19:17:53.18#ibcon#read 6, iclass 17, count 0 2006.229.19:17:53.18#ibcon#end of sib2, iclass 17, count 0 2006.229.19:17:53.18#ibcon#*after write, iclass 17, count 0 2006.229.19:17:53.18#ibcon#*before return 0, iclass 17, count 0 2006.229.19:17:53.18#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:53.18#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:53.18#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:17:53.18#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:17:53.18$vck44/valo=7,864.99 2006.229.19:17:53.18#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:17:53.18#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:17:53.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:53.18#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:53.18#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:53.18#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:53.18#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:17:53.18#ibcon#first serial, iclass 19, count 0 2006.229.19:17:53.18#ibcon#enter sib2, iclass 19, count 0 2006.229.19:17:53.18#ibcon#flushed, iclass 19, count 0 2006.229.19:17:53.18#ibcon#about to write, iclass 19, count 0 2006.229.19:17:53.18#ibcon#wrote, iclass 19, count 0 2006.229.19:17:53.18#ibcon#about to read 3, iclass 19, count 0 2006.229.19:17:53.20#ibcon#read 3, iclass 19, count 0 2006.229.19:17:53.20#ibcon#about to read 4, iclass 19, count 0 2006.229.19:17:53.20#ibcon#read 4, iclass 19, count 0 2006.229.19:17:53.20#ibcon#about to read 5, iclass 19, count 0 2006.229.19:17:53.20#ibcon#read 5, iclass 19, count 0 2006.229.19:17:53.20#ibcon#about to read 6, iclass 19, count 0 2006.229.19:17:53.20#ibcon#read 6, iclass 19, count 0 2006.229.19:17:53.20#ibcon#end of sib2, iclass 19, count 0 2006.229.19:17:53.20#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:17:53.20#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:17:53.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:17:53.20#ibcon#*before write, iclass 19, count 0 2006.229.19:17:53.20#ibcon#enter sib2, iclass 19, count 0 2006.229.19:17:53.20#ibcon#flushed, iclass 19, count 0 2006.229.19:17:53.20#ibcon#about to write, iclass 19, count 0 2006.229.19:17:53.20#ibcon#wrote, iclass 19, count 0 2006.229.19:17:53.20#ibcon#about to read 3, iclass 19, count 0 2006.229.19:17:53.24#ibcon#read 3, iclass 19, count 0 2006.229.19:17:53.24#ibcon#about to read 4, iclass 19, count 0 2006.229.19:17:53.24#ibcon#read 4, iclass 19, count 0 2006.229.19:17:53.24#ibcon#about to read 5, iclass 19, count 0 2006.229.19:17:53.24#ibcon#read 5, iclass 19, count 0 2006.229.19:17:53.24#ibcon#about to read 6, iclass 19, count 0 2006.229.19:17:53.24#ibcon#read 6, iclass 19, count 0 2006.229.19:17:53.24#ibcon#end of sib2, iclass 19, count 0 2006.229.19:17:53.24#ibcon#*after write, iclass 19, count 0 2006.229.19:17:53.24#ibcon#*before return 0, iclass 19, count 0 2006.229.19:17:53.24#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:53.24#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:53.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:17:53.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:17:53.24$vck44/va=7,5 2006.229.19:17:53.24#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.19:17:53.24#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.19:17:53.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:53.24#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:53.30#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:53.30#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:53.30#ibcon#enter wrdev, iclass 21, count 2 2006.229.19:17:53.30#ibcon#first serial, iclass 21, count 2 2006.229.19:17:53.30#ibcon#enter sib2, iclass 21, count 2 2006.229.19:17:53.30#ibcon#flushed, iclass 21, count 2 2006.229.19:17:53.30#ibcon#about to write, iclass 21, count 2 2006.229.19:17:53.30#ibcon#wrote, iclass 21, count 2 2006.229.19:17:53.30#ibcon#about to read 3, iclass 21, count 2 2006.229.19:17:53.32#ibcon#read 3, iclass 21, count 2 2006.229.19:17:53.32#ibcon#about to read 4, iclass 21, count 2 2006.229.19:17:53.32#ibcon#read 4, iclass 21, count 2 2006.229.19:17:53.32#ibcon#about to read 5, iclass 21, count 2 2006.229.19:17:53.32#ibcon#read 5, iclass 21, count 2 2006.229.19:17:53.32#ibcon#about to read 6, iclass 21, count 2 2006.229.19:17:53.32#ibcon#read 6, iclass 21, count 2 2006.229.19:17:53.32#ibcon#end of sib2, iclass 21, count 2 2006.229.19:17:53.32#ibcon#*mode == 0, iclass 21, count 2 2006.229.19:17:53.32#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.19:17:53.32#ibcon#[25=AT07-05\r\n] 2006.229.19:17:53.32#ibcon#*before write, iclass 21, count 2 2006.229.19:17:53.32#ibcon#enter sib2, iclass 21, count 2 2006.229.19:17:53.32#ibcon#flushed, iclass 21, count 2 2006.229.19:17:53.32#ibcon#about to write, iclass 21, count 2 2006.229.19:17:53.32#ibcon#wrote, iclass 21, count 2 2006.229.19:17:53.32#ibcon#about to read 3, iclass 21, count 2 2006.229.19:17:53.35#ibcon#read 3, iclass 21, count 2 2006.229.19:17:53.35#ibcon#about to read 4, iclass 21, count 2 2006.229.19:17:53.35#ibcon#read 4, iclass 21, count 2 2006.229.19:17:53.35#ibcon#about to read 5, iclass 21, count 2 2006.229.19:17:53.35#ibcon#read 5, iclass 21, count 2 2006.229.19:17:53.35#ibcon#about to read 6, iclass 21, count 2 2006.229.19:17:53.35#ibcon#read 6, iclass 21, count 2 2006.229.19:17:53.35#ibcon#end of sib2, iclass 21, count 2 2006.229.19:17:53.35#ibcon#*after write, iclass 21, count 2 2006.229.19:17:53.35#ibcon#*before return 0, iclass 21, count 2 2006.229.19:17:53.35#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:53.35#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:53.35#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.19:17:53.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:53.35#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:53.47#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:53.47#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:53.47#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:17:53.47#ibcon#first serial, iclass 21, count 0 2006.229.19:17:53.47#ibcon#enter sib2, iclass 21, count 0 2006.229.19:17:53.47#ibcon#flushed, iclass 21, count 0 2006.229.19:17:53.47#ibcon#about to write, iclass 21, count 0 2006.229.19:17:53.47#ibcon#wrote, iclass 21, count 0 2006.229.19:17:53.47#ibcon#about to read 3, iclass 21, count 0 2006.229.19:17:53.49#ibcon#read 3, iclass 21, count 0 2006.229.19:17:53.49#ibcon#about to read 4, iclass 21, count 0 2006.229.19:17:53.49#ibcon#read 4, iclass 21, count 0 2006.229.19:17:53.49#ibcon#about to read 5, iclass 21, count 0 2006.229.19:17:53.49#ibcon#read 5, iclass 21, count 0 2006.229.19:17:53.49#ibcon#about to read 6, iclass 21, count 0 2006.229.19:17:53.49#ibcon#read 6, iclass 21, count 0 2006.229.19:17:53.49#ibcon#end of sib2, iclass 21, count 0 2006.229.19:17:53.49#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:17:53.49#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:17:53.49#ibcon#[25=USB\r\n] 2006.229.19:17:53.49#ibcon#*before write, iclass 21, count 0 2006.229.19:17:53.49#ibcon#enter sib2, iclass 21, count 0 2006.229.19:17:53.49#ibcon#flushed, iclass 21, count 0 2006.229.19:17:53.49#ibcon#about to write, iclass 21, count 0 2006.229.19:17:53.49#ibcon#wrote, iclass 21, count 0 2006.229.19:17:53.49#ibcon#about to read 3, iclass 21, count 0 2006.229.19:17:53.52#ibcon#read 3, iclass 21, count 0 2006.229.19:17:53.52#ibcon#about to read 4, iclass 21, count 0 2006.229.19:17:53.52#ibcon#read 4, iclass 21, count 0 2006.229.19:17:53.52#ibcon#about to read 5, iclass 21, count 0 2006.229.19:17:53.52#ibcon#read 5, iclass 21, count 0 2006.229.19:17:53.52#ibcon#about to read 6, iclass 21, count 0 2006.229.19:17:53.52#ibcon#read 6, iclass 21, count 0 2006.229.19:17:53.52#ibcon#end of sib2, iclass 21, count 0 2006.229.19:17:53.52#ibcon#*after write, iclass 21, count 0 2006.229.19:17:53.52#ibcon#*before return 0, iclass 21, count 0 2006.229.19:17:53.52#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:53.52#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:53.52#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:17:53.52#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:17:53.52$vck44/valo=8,884.99 2006.229.19:17:53.52#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.19:17:53.52#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.19:17:53.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:53.52#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:53.52#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:53.52#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:53.52#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:17:53.52#ibcon#first serial, iclass 23, count 0 2006.229.19:17:53.52#ibcon#enter sib2, iclass 23, count 0 2006.229.19:17:53.52#ibcon#flushed, iclass 23, count 0 2006.229.19:17:53.52#ibcon#about to write, iclass 23, count 0 2006.229.19:17:53.52#ibcon#wrote, iclass 23, count 0 2006.229.19:17:53.52#ibcon#about to read 3, iclass 23, count 0 2006.229.19:17:53.54#ibcon#read 3, iclass 23, count 0 2006.229.19:17:53.54#ibcon#about to read 4, iclass 23, count 0 2006.229.19:17:53.54#ibcon#read 4, iclass 23, count 0 2006.229.19:17:53.54#ibcon#about to read 5, iclass 23, count 0 2006.229.19:17:53.54#ibcon#read 5, iclass 23, count 0 2006.229.19:17:53.54#ibcon#about to read 6, iclass 23, count 0 2006.229.19:17:53.54#ibcon#read 6, iclass 23, count 0 2006.229.19:17:53.54#ibcon#end of sib2, iclass 23, count 0 2006.229.19:17:53.54#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:17:53.54#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:17:53.54#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:17:53.54#ibcon#*before write, iclass 23, count 0 2006.229.19:17:53.54#ibcon#enter sib2, iclass 23, count 0 2006.229.19:17:53.54#ibcon#flushed, iclass 23, count 0 2006.229.19:17:53.54#ibcon#about to write, iclass 23, count 0 2006.229.19:17:53.54#ibcon#wrote, iclass 23, count 0 2006.229.19:17:53.54#ibcon#about to read 3, iclass 23, count 0 2006.229.19:17:53.58#ibcon#read 3, iclass 23, count 0 2006.229.19:17:53.58#ibcon#about to read 4, iclass 23, count 0 2006.229.19:17:53.58#ibcon#read 4, iclass 23, count 0 2006.229.19:17:53.58#ibcon#about to read 5, iclass 23, count 0 2006.229.19:17:53.58#ibcon#read 5, iclass 23, count 0 2006.229.19:17:53.58#ibcon#about to read 6, iclass 23, count 0 2006.229.19:17:53.58#ibcon#read 6, iclass 23, count 0 2006.229.19:17:53.58#ibcon#end of sib2, iclass 23, count 0 2006.229.19:17:53.58#ibcon#*after write, iclass 23, count 0 2006.229.19:17:53.58#ibcon#*before return 0, iclass 23, count 0 2006.229.19:17:53.58#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:53.58#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:53.58#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:17:53.58#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:17:53.58$vck44/va=8,6 2006.229.19:17:53.58#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.19:17:53.58#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.19:17:53.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:53.58#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:17:53.64#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:17:53.64#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:17:53.64#ibcon#enter wrdev, iclass 25, count 2 2006.229.19:17:53.64#ibcon#first serial, iclass 25, count 2 2006.229.19:17:53.64#ibcon#enter sib2, iclass 25, count 2 2006.229.19:17:53.64#ibcon#flushed, iclass 25, count 2 2006.229.19:17:53.64#ibcon#about to write, iclass 25, count 2 2006.229.19:17:53.64#ibcon#wrote, iclass 25, count 2 2006.229.19:17:53.64#ibcon#about to read 3, iclass 25, count 2 2006.229.19:17:53.66#ibcon#read 3, iclass 25, count 2 2006.229.19:17:53.66#ibcon#about to read 4, iclass 25, count 2 2006.229.19:17:53.66#ibcon#read 4, iclass 25, count 2 2006.229.19:17:53.66#ibcon#about to read 5, iclass 25, count 2 2006.229.19:17:53.66#ibcon#read 5, iclass 25, count 2 2006.229.19:17:53.66#ibcon#about to read 6, iclass 25, count 2 2006.229.19:17:53.66#ibcon#read 6, iclass 25, count 2 2006.229.19:17:53.66#ibcon#end of sib2, iclass 25, count 2 2006.229.19:17:53.66#ibcon#*mode == 0, iclass 25, count 2 2006.229.19:17:53.66#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.19:17:53.66#ibcon#[25=AT08-06\r\n] 2006.229.19:17:53.66#ibcon#*before write, iclass 25, count 2 2006.229.19:17:53.66#ibcon#enter sib2, iclass 25, count 2 2006.229.19:17:53.66#ibcon#flushed, iclass 25, count 2 2006.229.19:17:53.66#ibcon#about to write, iclass 25, count 2 2006.229.19:17:53.66#ibcon#wrote, iclass 25, count 2 2006.229.19:17:53.66#ibcon#about to read 3, iclass 25, count 2 2006.229.19:17:53.69#ibcon#read 3, iclass 25, count 2 2006.229.19:17:53.69#ibcon#about to read 4, iclass 25, count 2 2006.229.19:17:53.69#ibcon#read 4, iclass 25, count 2 2006.229.19:17:53.69#ibcon#about to read 5, iclass 25, count 2 2006.229.19:17:53.69#ibcon#read 5, iclass 25, count 2 2006.229.19:17:53.69#ibcon#about to read 6, iclass 25, count 2 2006.229.19:17:53.69#ibcon#read 6, iclass 25, count 2 2006.229.19:17:53.69#ibcon#end of sib2, iclass 25, count 2 2006.229.19:17:53.69#ibcon#*after write, iclass 25, count 2 2006.229.19:17:53.69#ibcon#*before return 0, iclass 25, count 2 2006.229.19:17:53.69#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:17:53.69#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:17:53.69#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.19:17:53.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:53.69#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:17:53.81#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:17:53.81#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:17:53.81#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:17:53.81#ibcon#first serial, iclass 25, count 0 2006.229.19:17:53.81#ibcon#enter sib2, iclass 25, count 0 2006.229.19:17:53.81#ibcon#flushed, iclass 25, count 0 2006.229.19:17:53.81#ibcon#about to write, iclass 25, count 0 2006.229.19:17:53.81#ibcon#wrote, iclass 25, count 0 2006.229.19:17:53.81#ibcon#about to read 3, iclass 25, count 0 2006.229.19:17:53.83#ibcon#read 3, iclass 25, count 0 2006.229.19:17:53.83#ibcon#about to read 4, iclass 25, count 0 2006.229.19:17:53.83#ibcon#read 4, iclass 25, count 0 2006.229.19:17:53.83#ibcon#about to read 5, iclass 25, count 0 2006.229.19:17:53.83#ibcon#read 5, iclass 25, count 0 2006.229.19:17:53.83#ibcon#about to read 6, iclass 25, count 0 2006.229.19:17:53.83#ibcon#read 6, iclass 25, count 0 2006.229.19:17:53.83#ibcon#end of sib2, iclass 25, count 0 2006.229.19:17:53.83#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:17:53.83#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:17:53.83#ibcon#[25=USB\r\n] 2006.229.19:17:53.83#ibcon#*before write, iclass 25, count 0 2006.229.19:17:53.83#ibcon#enter sib2, iclass 25, count 0 2006.229.19:17:53.83#ibcon#flushed, iclass 25, count 0 2006.229.19:17:53.83#ibcon#about to write, iclass 25, count 0 2006.229.19:17:53.83#ibcon#wrote, iclass 25, count 0 2006.229.19:17:53.83#ibcon#about to read 3, iclass 25, count 0 2006.229.19:17:53.86#ibcon#read 3, iclass 25, count 0 2006.229.19:17:53.86#ibcon#about to read 4, iclass 25, count 0 2006.229.19:17:53.86#ibcon#read 4, iclass 25, count 0 2006.229.19:17:53.86#ibcon#about to read 5, iclass 25, count 0 2006.229.19:17:53.86#ibcon#read 5, iclass 25, count 0 2006.229.19:17:53.86#ibcon#about to read 6, iclass 25, count 0 2006.229.19:17:53.86#ibcon#read 6, iclass 25, count 0 2006.229.19:17:53.86#ibcon#end of sib2, iclass 25, count 0 2006.229.19:17:53.86#ibcon#*after write, iclass 25, count 0 2006.229.19:17:53.86#ibcon#*before return 0, iclass 25, count 0 2006.229.19:17:53.86#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:17:53.86#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:17:53.86#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:17:53.86#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:17:53.86$vck44/vblo=1,629.99 2006.229.19:17:53.86#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.19:17:53.86#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.19:17:53.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:53.86#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:17:53.86#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:17:53.86#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:17:53.86#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:17:53.86#ibcon#first serial, iclass 27, count 0 2006.229.19:17:53.86#ibcon#enter sib2, iclass 27, count 0 2006.229.19:17:53.86#ibcon#flushed, iclass 27, count 0 2006.229.19:17:53.86#ibcon#about to write, iclass 27, count 0 2006.229.19:17:53.86#ibcon#wrote, iclass 27, count 0 2006.229.19:17:53.86#ibcon#about to read 3, iclass 27, count 0 2006.229.19:17:53.88#ibcon#read 3, iclass 27, count 0 2006.229.19:17:53.88#ibcon#about to read 4, iclass 27, count 0 2006.229.19:17:53.88#ibcon#read 4, iclass 27, count 0 2006.229.19:17:53.88#ibcon#about to read 5, iclass 27, count 0 2006.229.19:17:53.88#ibcon#read 5, iclass 27, count 0 2006.229.19:17:53.88#ibcon#about to read 6, iclass 27, count 0 2006.229.19:17:53.88#ibcon#read 6, iclass 27, count 0 2006.229.19:17:53.88#ibcon#end of sib2, iclass 27, count 0 2006.229.19:17:53.88#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:17:53.88#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:17:53.88#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:17:53.88#ibcon#*before write, iclass 27, count 0 2006.229.19:17:53.88#ibcon#enter sib2, iclass 27, count 0 2006.229.19:17:53.88#ibcon#flushed, iclass 27, count 0 2006.229.19:17:53.88#ibcon#about to write, iclass 27, count 0 2006.229.19:17:53.88#ibcon#wrote, iclass 27, count 0 2006.229.19:17:53.88#ibcon#about to read 3, iclass 27, count 0 2006.229.19:17:53.92#ibcon#read 3, iclass 27, count 0 2006.229.19:17:53.92#ibcon#about to read 4, iclass 27, count 0 2006.229.19:17:53.92#ibcon#read 4, iclass 27, count 0 2006.229.19:17:53.92#ibcon#about to read 5, iclass 27, count 0 2006.229.19:17:53.92#ibcon#read 5, iclass 27, count 0 2006.229.19:17:53.92#ibcon#about to read 6, iclass 27, count 0 2006.229.19:17:53.92#ibcon#read 6, iclass 27, count 0 2006.229.19:17:53.92#ibcon#end of sib2, iclass 27, count 0 2006.229.19:17:53.92#ibcon#*after write, iclass 27, count 0 2006.229.19:17:53.92#ibcon#*before return 0, iclass 27, count 0 2006.229.19:17:53.92#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:17:53.92#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:17:53.92#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:17:53.92#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:17:53.92$vck44/vb=1,4 2006.229.19:17:53.92#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.19:17:53.92#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.19:17:53.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:53.92#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:17:53.92#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:17:53.92#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:17:53.92#ibcon#enter wrdev, iclass 29, count 2 2006.229.19:17:53.92#ibcon#first serial, iclass 29, count 2 2006.229.19:17:53.92#ibcon#enter sib2, iclass 29, count 2 2006.229.19:17:53.92#ibcon#flushed, iclass 29, count 2 2006.229.19:17:53.92#ibcon#about to write, iclass 29, count 2 2006.229.19:17:53.92#ibcon#wrote, iclass 29, count 2 2006.229.19:17:53.92#ibcon#about to read 3, iclass 29, count 2 2006.229.19:17:53.94#ibcon#read 3, iclass 29, count 2 2006.229.19:17:53.94#ibcon#about to read 4, iclass 29, count 2 2006.229.19:17:53.94#ibcon#read 4, iclass 29, count 2 2006.229.19:17:53.94#ibcon#about to read 5, iclass 29, count 2 2006.229.19:17:53.94#ibcon#read 5, iclass 29, count 2 2006.229.19:17:53.94#ibcon#about to read 6, iclass 29, count 2 2006.229.19:17:53.94#ibcon#read 6, iclass 29, count 2 2006.229.19:17:53.94#ibcon#end of sib2, iclass 29, count 2 2006.229.19:17:53.94#ibcon#*mode == 0, iclass 29, count 2 2006.229.19:17:53.94#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.19:17:53.94#ibcon#[27=AT01-04\r\n] 2006.229.19:17:53.94#ibcon#*before write, iclass 29, count 2 2006.229.19:17:53.94#ibcon#enter sib2, iclass 29, count 2 2006.229.19:17:53.94#ibcon#flushed, iclass 29, count 2 2006.229.19:17:53.94#ibcon#about to write, iclass 29, count 2 2006.229.19:17:53.94#ibcon#wrote, iclass 29, count 2 2006.229.19:17:53.94#ibcon#about to read 3, iclass 29, count 2 2006.229.19:17:53.97#ibcon#read 3, iclass 29, count 2 2006.229.19:17:53.97#ibcon#about to read 4, iclass 29, count 2 2006.229.19:17:53.97#ibcon#read 4, iclass 29, count 2 2006.229.19:17:53.97#ibcon#about to read 5, iclass 29, count 2 2006.229.19:17:53.97#ibcon#read 5, iclass 29, count 2 2006.229.19:17:53.97#ibcon#about to read 6, iclass 29, count 2 2006.229.19:17:53.97#ibcon#read 6, iclass 29, count 2 2006.229.19:17:53.97#ibcon#end of sib2, iclass 29, count 2 2006.229.19:17:53.97#ibcon#*after write, iclass 29, count 2 2006.229.19:17:53.97#ibcon#*before return 0, iclass 29, count 2 2006.229.19:17:53.97#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:17:53.97#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:17:53.97#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.19:17:53.97#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:53.97#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:17:54.09#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:17:54.09#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:17:54.09#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:17:54.09#ibcon#first serial, iclass 29, count 0 2006.229.19:17:54.09#ibcon#enter sib2, iclass 29, count 0 2006.229.19:17:54.09#ibcon#flushed, iclass 29, count 0 2006.229.19:17:54.09#ibcon#about to write, iclass 29, count 0 2006.229.19:17:54.09#ibcon#wrote, iclass 29, count 0 2006.229.19:17:54.09#ibcon#about to read 3, iclass 29, count 0 2006.229.19:17:54.11#ibcon#read 3, iclass 29, count 0 2006.229.19:17:54.11#ibcon#about to read 4, iclass 29, count 0 2006.229.19:17:54.11#ibcon#read 4, iclass 29, count 0 2006.229.19:17:54.11#ibcon#about to read 5, iclass 29, count 0 2006.229.19:17:54.11#ibcon#read 5, iclass 29, count 0 2006.229.19:17:54.11#ibcon#about to read 6, iclass 29, count 0 2006.229.19:17:54.11#ibcon#read 6, iclass 29, count 0 2006.229.19:17:54.11#ibcon#end of sib2, iclass 29, count 0 2006.229.19:17:54.11#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:17:54.11#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:17:54.11#ibcon#[27=USB\r\n] 2006.229.19:17:54.11#ibcon#*before write, iclass 29, count 0 2006.229.19:17:54.11#ibcon#enter sib2, iclass 29, count 0 2006.229.19:17:54.11#ibcon#flushed, iclass 29, count 0 2006.229.19:17:54.11#ibcon#about to write, iclass 29, count 0 2006.229.19:17:54.11#ibcon#wrote, iclass 29, count 0 2006.229.19:17:54.11#ibcon#about to read 3, iclass 29, count 0 2006.229.19:17:54.14#ibcon#read 3, iclass 29, count 0 2006.229.19:17:54.14#ibcon#about to read 4, iclass 29, count 0 2006.229.19:17:54.14#ibcon#read 4, iclass 29, count 0 2006.229.19:17:54.14#ibcon#about to read 5, iclass 29, count 0 2006.229.19:17:54.14#ibcon#read 5, iclass 29, count 0 2006.229.19:17:54.14#ibcon#about to read 6, iclass 29, count 0 2006.229.19:17:54.14#ibcon#read 6, iclass 29, count 0 2006.229.19:17:54.14#ibcon#end of sib2, iclass 29, count 0 2006.229.19:17:54.14#ibcon#*after write, iclass 29, count 0 2006.229.19:17:54.14#ibcon#*before return 0, iclass 29, count 0 2006.229.19:17:54.14#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:17:54.14#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:17:54.14#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:17:54.14#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:17:54.14$vck44/vblo=2,634.99 2006.229.19:17:54.14#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.19:17:54.14#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.19:17:54.14#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:54.14#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:54.14#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:54.14#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:54.14#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:17:54.14#ibcon#first serial, iclass 31, count 0 2006.229.19:17:54.14#ibcon#enter sib2, iclass 31, count 0 2006.229.19:17:54.14#ibcon#flushed, iclass 31, count 0 2006.229.19:17:54.14#ibcon#about to write, iclass 31, count 0 2006.229.19:17:54.14#ibcon#wrote, iclass 31, count 0 2006.229.19:17:54.14#ibcon#about to read 3, iclass 31, count 0 2006.229.19:17:54.16#ibcon#read 3, iclass 31, count 0 2006.229.19:17:54.16#ibcon#about to read 4, iclass 31, count 0 2006.229.19:17:54.16#ibcon#read 4, iclass 31, count 0 2006.229.19:17:54.16#ibcon#about to read 5, iclass 31, count 0 2006.229.19:17:54.16#ibcon#read 5, iclass 31, count 0 2006.229.19:17:54.16#ibcon#about to read 6, iclass 31, count 0 2006.229.19:17:54.16#ibcon#read 6, iclass 31, count 0 2006.229.19:17:54.16#ibcon#end of sib2, iclass 31, count 0 2006.229.19:17:54.16#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:17:54.16#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:17:54.16#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:17:54.16#ibcon#*before write, iclass 31, count 0 2006.229.19:17:54.16#ibcon#enter sib2, iclass 31, count 0 2006.229.19:17:54.16#ibcon#flushed, iclass 31, count 0 2006.229.19:17:54.16#ibcon#about to write, iclass 31, count 0 2006.229.19:17:54.16#ibcon#wrote, iclass 31, count 0 2006.229.19:17:54.16#ibcon#about to read 3, iclass 31, count 0 2006.229.19:17:54.20#ibcon#read 3, iclass 31, count 0 2006.229.19:17:54.20#ibcon#about to read 4, iclass 31, count 0 2006.229.19:17:54.20#ibcon#read 4, iclass 31, count 0 2006.229.19:17:54.20#ibcon#about to read 5, iclass 31, count 0 2006.229.19:17:54.20#ibcon#read 5, iclass 31, count 0 2006.229.19:17:54.20#ibcon#about to read 6, iclass 31, count 0 2006.229.19:17:54.20#ibcon#read 6, iclass 31, count 0 2006.229.19:17:54.20#ibcon#end of sib2, iclass 31, count 0 2006.229.19:17:54.20#ibcon#*after write, iclass 31, count 0 2006.229.19:17:54.20#ibcon#*before return 0, iclass 31, count 0 2006.229.19:17:54.20#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:54.20#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:17:54.20#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:17:54.20#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:17:54.20$vck44/vb=2,4 2006.229.19:17:54.20#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.19:17:54.20#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.19:17:54.20#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:54.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:54.26#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:54.26#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:54.26#ibcon#enter wrdev, iclass 33, count 2 2006.229.19:17:54.26#ibcon#first serial, iclass 33, count 2 2006.229.19:17:54.26#ibcon#enter sib2, iclass 33, count 2 2006.229.19:17:54.26#ibcon#flushed, iclass 33, count 2 2006.229.19:17:54.26#ibcon#about to write, iclass 33, count 2 2006.229.19:17:54.26#ibcon#wrote, iclass 33, count 2 2006.229.19:17:54.26#ibcon#about to read 3, iclass 33, count 2 2006.229.19:17:54.28#ibcon#read 3, iclass 33, count 2 2006.229.19:17:54.28#ibcon#about to read 4, iclass 33, count 2 2006.229.19:17:54.28#ibcon#read 4, iclass 33, count 2 2006.229.19:17:54.28#ibcon#about to read 5, iclass 33, count 2 2006.229.19:17:54.28#ibcon#read 5, iclass 33, count 2 2006.229.19:17:54.28#ibcon#about to read 6, iclass 33, count 2 2006.229.19:17:54.28#ibcon#read 6, iclass 33, count 2 2006.229.19:17:54.28#ibcon#end of sib2, iclass 33, count 2 2006.229.19:17:54.28#ibcon#*mode == 0, iclass 33, count 2 2006.229.19:17:54.28#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.19:17:54.28#ibcon#[27=AT02-04\r\n] 2006.229.19:17:54.28#ibcon#*before write, iclass 33, count 2 2006.229.19:17:54.28#ibcon#enter sib2, iclass 33, count 2 2006.229.19:17:54.28#ibcon#flushed, iclass 33, count 2 2006.229.19:17:54.28#ibcon#about to write, iclass 33, count 2 2006.229.19:17:54.28#ibcon#wrote, iclass 33, count 2 2006.229.19:17:54.28#ibcon#about to read 3, iclass 33, count 2 2006.229.19:17:54.31#ibcon#read 3, iclass 33, count 2 2006.229.19:17:54.31#ibcon#about to read 4, iclass 33, count 2 2006.229.19:17:54.31#ibcon#read 4, iclass 33, count 2 2006.229.19:17:54.31#ibcon#about to read 5, iclass 33, count 2 2006.229.19:17:54.31#ibcon#read 5, iclass 33, count 2 2006.229.19:17:54.31#ibcon#about to read 6, iclass 33, count 2 2006.229.19:17:54.31#ibcon#read 6, iclass 33, count 2 2006.229.19:17:54.31#ibcon#end of sib2, iclass 33, count 2 2006.229.19:17:54.31#ibcon#*after write, iclass 33, count 2 2006.229.19:17:54.31#ibcon#*before return 0, iclass 33, count 2 2006.229.19:17:54.31#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:54.31#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:17:54.31#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.19:17:54.31#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:54.31#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:54.43#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:54.43#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:54.43#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:17:54.43#ibcon#first serial, iclass 33, count 0 2006.229.19:17:54.43#ibcon#enter sib2, iclass 33, count 0 2006.229.19:17:54.43#ibcon#flushed, iclass 33, count 0 2006.229.19:17:54.43#ibcon#about to write, iclass 33, count 0 2006.229.19:17:54.43#ibcon#wrote, iclass 33, count 0 2006.229.19:17:54.43#ibcon#about to read 3, iclass 33, count 0 2006.229.19:17:54.45#ibcon#read 3, iclass 33, count 0 2006.229.19:17:54.45#ibcon#about to read 4, iclass 33, count 0 2006.229.19:17:54.45#ibcon#read 4, iclass 33, count 0 2006.229.19:17:54.45#ibcon#about to read 5, iclass 33, count 0 2006.229.19:17:54.45#ibcon#read 5, iclass 33, count 0 2006.229.19:17:54.45#ibcon#about to read 6, iclass 33, count 0 2006.229.19:17:54.45#ibcon#read 6, iclass 33, count 0 2006.229.19:17:54.45#ibcon#end of sib2, iclass 33, count 0 2006.229.19:17:54.45#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:17:54.45#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:17:54.45#ibcon#[27=USB\r\n] 2006.229.19:17:54.45#ibcon#*before write, iclass 33, count 0 2006.229.19:17:54.45#ibcon#enter sib2, iclass 33, count 0 2006.229.19:17:54.45#ibcon#flushed, iclass 33, count 0 2006.229.19:17:54.45#ibcon#about to write, iclass 33, count 0 2006.229.19:17:54.45#ibcon#wrote, iclass 33, count 0 2006.229.19:17:54.45#ibcon#about to read 3, iclass 33, count 0 2006.229.19:17:54.48#ibcon#read 3, iclass 33, count 0 2006.229.19:17:54.48#ibcon#about to read 4, iclass 33, count 0 2006.229.19:17:54.48#ibcon#read 4, iclass 33, count 0 2006.229.19:17:54.48#ibcon#about to read 5, iclass 33, count 0 2006.229.19:17:54.48#ibcon#read 5, iclass 33, count 0 2006.229.19:17:54.48#ibcon#about to read 6, iclass 33, count 0 2006.229.19:17:54.48#ibcon#read 6, iclass 33, count 0 2006.229.19:17:54.48#ibcon#end of sib2, iclass 33, count 0 2006.229.19:17:54.48#ibcon#*after write, iclass 33, count 0 2006.229.19:17:54.48#ibcon#*before return 0, iclass 33, count 0 2006.229.19:17:54.48#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:54.48#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:17:54.48#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:17:54.48#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:17:54.48$vck44/vblo=3,649.99 2006.229.19:17:54.48#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.19:17:54.48#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.19:17:54.48#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:54.48#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:54.48#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:54.48#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:54.48#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:17:54.48#ibcon#first serial, iclass 35, count 0 2006.229.19:17:54.48#ibcon#enter sib2, iclass 35, count 0 2006.229.19:17:54.48#ibcon#flushed, iclass 35, count 0 2006.229.19:17:54.48#ibcon#about to write, iclass 35, count 0 2006.229.19:17:54.48#ibcon#wrote, iclass 35, count 0 2006.229.19:17:54.48#ibcon#about to read 3, iclass 35, count 0 2006.229.19:17:54.50#ibcon#read 3, iclass 35, count 0 2006.229.19:17:54.50#ibcon#about to read 4, iclass 35, count 0 2006.229.19:17:54.50#ibcon#read 4, iclass 35, count 0 2006.229.19:17:54.50#ibcon#about to read 5, iclass 35, count 0 2006.229.19:17:54.50#ibcon#read 5, iclass 35, count 0 2006.229.19:17:54.50#ibcon#about to read 6, iclass 35, count 0 2006.229.19:17:54.50#ibcon#read 6, iclass 35, count 0 2006.229.19:17:54.50#ibcon#end of sib2, iclass 35, count 0 2006.229.19:17:54.50#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:17:54.50#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:17:54.50#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:17:54.50#ibcon#*before write, iclass 35, count 0 2006.229.19:17:54.50#ibcon#enter sib2, iclass 35, count 0 2006.229.19:17:54.50#ibcon#flushed, iclass 35, count 0 2006.229.19:17:54.50#ibcon#about to write, iclass 35, count 0 2006.229.19:17:54.50#ibcon#wrote, iclass 35, count 0 2006.229.19:17:54.50#ibcon#about to read 3, iclass 35, count 0 2006.229.19:17:54.54#ibcon#read 3, iclass 35, count 0 2006.229.19:17:54.54#ibcon#about to read 4, iclass 35, count 0 2006.229.19:17:54.54#ibcon#read 4, iclass 35, count 0 2006.229.19:17:54.54#ibcon#about to read 5, iclass 35, count 0 2006.229.19:17:54.54#ibcon#read 5, iclass 35, count 0 2006.229.19:17:54.54#ibcon#about to read 6, iclass 35, count 0 2006.229.19:17:54.54#ibcon#read 6, iclass 35, count 0 2006.229.19:17:54.54#ibcon#end of sib2, iclass 35, count 0 2006.229.19:17:54.54#ibcon#*after write, iclass 35, count 0 2006.229.19:17:54.54#ibcon#*before return 0, iclass 35, count 0 2006.229.19:17:54.54#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:54.54#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:17:54.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:17:54.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:17:54.54$vck44/vb=3,4 2006.229.19:17:54.54#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.19:17:54.54#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.19:17:54.54#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:54.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:54.60#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:54.60#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:54.60#ibcon#enter wrdev, iclass 37, count 2 2006.229.19:17:54.60#ibcon#first serial, iclass 37, count 2 2006.229.19:17:54.60#ibcon#enter sib2, iclass 37, count 2 2006.229.19:17:54.60#ibcon#flushed, iclass 37, count 2 2006.229.19:17:54.60#ibcon#about to write, iclass 37, count 2 2006.229.19:17:54.60#ibcon#wrote, iclass 37, count 2 2006.229.19:17:54.60#ibcon#about to read 3, iclass 37, count 2 2006.229.19:17:54.62#ibcon#read 3, iclass 37, count 2 2006.229.19:17:54.62#ibcon#about to read 4, iclass 37, count 2 2006.229.19:17:54.62#ibcon#read 4, iclass 37, count 2 2006.229.19:17:54.62#ibcon#about to read 5, iclass 37, count 2 2006.229.19:17:54.62#ibcon#read 5, iclass 37, count 2 2006.229.19:17:54.62#ibcon#about to read 6, iclass 37, count 2 2006.229.19:17:54.62#ibcon#read 6, iclass 37, count 2 2006.229.19:17:54.62#ibcon#end of sib2, iclass 37, count 2 2006.229.19:17:54.62#ibcon#*mode == 0, iclass 37, count 2 2006.229.19:17:54.62#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.19:17:54.62#ibcon#[27=AT03-04\r\n] 2006.229.19:17:54.62#ibcon#*before write, iclass 37, count 2 2006.229.19:17:54.62#ibcon#enter sib2, iclass 37, count 2 2006.229.19:17:54.62#ibcon#flushed, iclass 37, count 2 2006.229.19:17:54.62#ibcon#about to write, iclass 37, count 2 2006.229.19:17:54.62#ibcon#wrote, iclass 37, count 2 2006.229.19:17:54.62#ibcon#about to read 3, iclass 37, count 2 2006.229.19:17:54.65#ibcon#read 3, iclass 37, count 2 2006.229.19:17:54.65#ibcon#about to read 4, iclass 37, count 2 2006.229.19:17:54.65#ibcon#read 4, iclass 37, count 2 2006.229.19:17:54.65#ibcon#about to read 5, iclass 37, count 2 2006.229.19:17:54.65#ibcon#read 5, iclass 37, count 2 2006.229.19:17:54.65#ibcon#about to read 6, iclass 37, count 2 2006.229.19:17:54.65#ibcon#read 6, iclass 37, count 2 2006.229.19:17:54.65#ibcon#end of sib2, iclass 37, count 2 2006.229.19:17:54.65#ibcon#*after write, iclass 37, count 2 2006.229.19:17:54.65#ibcon#*before return 0, iclass 37, count 2 2006.229.19:17:54.65#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:54.65#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:17:54.65#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.19:17:54.65#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:54.65#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:54.77#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:54.77#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:54.77#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:17:54.77#ibcon#first serial, iclass 37, count 0 2006.229.19:17:54.77#ibcon#enter sib2, iclass 37, count 0 2006.229.19:17:54.77#ibcon#flushed, iclass 37, count 0 2006.229.19:17:54.77#ibcon#about to write, iclass 37, count 0 2006.229.19:17:54.77#ibcon#wrote, iclass 37, count 0 2006.229.19:17:54.77#ibcon#about to read 3, iclass 37, count 0 2006.229.19:17:54.79#ibcon#read 3, iclass 37, count 0 2006.229.19:17:54.79#ibcon#about to read 4, iclass 37, count 0 2006.229.19:17:54.79#ibcon#read 4, iclass 37, count 0 2006.229.19:17:54.79#ibcon#about to read 5, iclass 37, count 0 2006.229.19:17:54.79#ibcon#read 5, iclass 37, count 0 2006.229.19:17:54.79#ibcon#about to read 6, iclass 37, count 0 2006.229.19:17:54.79#ibcon#read 6, iclass 37, count 0 2006.229.19:17:54.79#ibcon#end of sib2, iclass 37, count 0 2006.229.19:17:54.79#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:17:54.79#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:17:54.79#ibcon#[27=USB\r\n] 2006.229.19:17:54.79#ibcon#*before write, iclass 37, count 0 2006.229.19:17:54.79#ibcon#enter sib2, iclass 37, count 0 2006.229.19:17:54.79#ibcon#flushed, iclass 37, count 0 2006.229.19:17:54.79#ibcon#about to write, iclass 37, count 0 2006.229.19:17:54.79#ibcon#wrote, iclass 37, count 0 2006.229.19:17:54.79#ibcon#about to read 3, iclass 37, count 0 2006.229.19:17:54.82#ibcon#read 3, iclass 37, count 0 2006.229.19:17:54.82#ibcon#about to read 4, iclass 37, count 0 2006.229.19:17:54.82#ibcon#read 4, iclass 37, count 0 2006.229.19:17:54.82#ibcon#about to read 5, iclass 37, count 0 2006.229.19:17:54.82#ibcon#read 5, iclass 37, count 0 2006.229.19:17:54.82#ibcon#about to read 6, iclass 37, count 0 2006.229.19:17:54.82#ibcon#read 6, iclass 37, count 0 2006.229.19:17:54.82#ibcon#end of sib2, iclass 37, count 0 2006.229.19:17:54.82#ibcon#*after write, iclass 37, count 0 2006.229.19:17:54.82#ibcon#*before return 0, iclass 37, count 0 2006.229.19:17:54.82#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:54.82#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:17:54.82#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:17:54.82#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:17:54.82$vck44/vblo=4,679.99 2006.229.19:17:54.82#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.19:17:54.82#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.19:17:54.82#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:54.82#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:54.82#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:54.82#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:54.82#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:17:54.82#ibcon#first serial, iclass 39, count 0 2006.229.19:17:54.82#ibcon#enter sib2, iclass 39, count 0 2006.229.19:17:54.82#ibcon#flushed, iclass 39, count 0 2006.229.19:17:54.82#ibcon#about to write, iclass 39, count 0 2006.229.19:17:54.82#ibcon#wrote, iclass 39, count 0 2006.229.19:17:54.82#ibcon#about to read 3, iclass 39, count 0 2006.229.19:17:54.84#ibcon#read 3, iclass 39, count 0 2006.229.19:17:54.84#ibcon#about to read 4, iclass 39, count 0 2006.229.19:17:54.84#ibcon#read 4, iclass 39, count 0 2006.229.19:17:54.84#ibcon#about to read 5, iclass 39, count 0 2006.229.19:17:54.84#ibcon#read 5, iclass 39, count 0 2006.229.19:17:54.84#ibcon#about to read 6, iclass 39, count 0 2006.229.19:17:54.84#ibcon#read 6, iclass 39, count 0 2006.229.19:17:54.84#ibcon#end of sib2, iclass 39, count 0 2006.229.19:17:54.84#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:17:54.84#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:17:54.84#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:17:54.84#ibcon#*before write, iclass 39, count 0 2006.229.19:17:54.84#ibcon#enter sib2, iclass 39, count 0 2006.229.19:17:54.84#ibcon#flushed, iclass 39, count 0 2006.229.19:17:54.84#ibcon#about to write, iclass 39, count 0 2006.229.19:17:54.84#ibcon#wrote, iclass 39, count 0 2006.229.19:17:54.84#ibcon#about to read 3, iclass 39, count 0 2006.229.19:17:54.88#ibcon#read 3, iclass 39, count 0 2006.229.19:17:54.88#ibcon#about to read 4, iclass 39, count 0 2006.229.19:17:54.88#ibcon#read 4, iclass 39, count 0 2006.229.19:17:54.88#ibcon#about to read 5, iclass 39, count 0 2006.229.19:17:54.88#ibcon#read 5, iclass 39, count 0 2006.229.19:17:54.88#ibcon#about to read 6, iclass 39, count 0 2006.229.19:17:54.88#ibcon#read 6, iclass 39, count 0 2006.229.19:17:54.88#ibcon#end of sib2, iclass 39, count 0 2006.229.19:17:54.88#ibcon#*after write, iclass 39, count 0 2006.229.19:17:54.88#ibcon#*before return 0, iclass 39, count 0 2006.229.19:17:54.88#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:54.88#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:17:54.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:17:54.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:17:54.88$vck44/vb=4,4 2006.229.19:17:54.88#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.19:17:54.88#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.19:17:54.88#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:54.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:54.94#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:54.94#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:54.94#ibcon#enter wrdev, iclass 3, count 2 2006.229.19:17:54.94#ibcon#first serial, iclass 3, count 2 2006.229.19:17:54.94#ibcon#enter sib2, iclass 3, count 2 2006.229.19:17:54.94#ibcon#flushed, iclass 3, count 2 2006.229.19:17:54.94#ibcon#about to write, iclass 3, count 2 2006.229.19:17:54.94#ibcon#wrote, iclass 3, count 2 2006.229.19:17:54.94#ibcon#about to read 3, iclass 3, count 2 2006.229.19:17:54.96#ibcon#read 3, iclass 3, count 2 2006.229.19:17:54.96#ibcon#about to read 4, iclass 3, count 2 2006.229.19:17:54.96#ibcon#read 4, iclass 3, count 2 2006.229.19:17:54.96#ibcon#about to read 5, iclass 3, count 2 2006.229.19:17:54.96#ibcon#read 5, iclass 3, count 2 2006.229.19:17:54.96#ibcon#about to read 6, iclass 3, count 2 2006.229.19:17:54.96#ibcon#read 6, iclass 3, count 2 2006.229.19:17:54.96#ibcon#end of sib2, iclass 3, count 2 2006.229.19:17:54.96#ibcon#*mode == 0, iclass 3, count 2 2006.229.19:17:54.96#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.19:17:54.96#ibcon#[27=AT04-04\r\n] 2006.229.19:17:54.96#ibcon#*before write, iclass 3, count 2 2006.229.19:17:54.96#ibcon#enter sib2, iclass 3, count 2 2006.229.19:17:54.96#ibcon#flushed, iclass 3, count 2 2006.229.19:17:54.96#ibcon#about to write, iclass 3, count 2 2006.229.19:17:54.96#ibcon#wrote, iclass 3, count 2 2006.229.19:17:54.96#ibcon#about to read 3, iclass 3, count 2 2006.229.19:17:54.99#ibcon#read 3, iclass 3, count 2 2006.229.19:17:54.99#ibcon#about to read 4, iclass 3, count 2 2006.229.19:17:54.99#ibcon#read 4, iclass 3, count 2 2006.229.19:17:54.99#ibcon#about to read 5, iclass 3, count 2 2006.229.19:17:54.99#ibcon#read 5, iclass 3, count 2 2006.229.19:17:54.99#ibcon#about to read 6, iclass 3, count 2 2006.229.19:17:54.99#ibcon#read 6, iclass 3, count 2 2006.229.19:17:54.99#ibcon#end of sib2, iclass 3, count 2 2006.229.19:17:54.99#ibcon#*after write, iclass 3, count 2 2006.229.19:17:54.99#ibcon#*before return 0, iclass 3, count 2 2006.229.19:17:54.99#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:54.99#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:17:54.99#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.19:17:54.99#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:54.99#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:55.11#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:55.11#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:55.11#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:17:55.11#ibcon#first serial, iclass 3, count 0 2006.229.19:17:55.11#ibcon#enter sib2, iclass 3, count 0 2006.229.19:17:55.11#ibcon#flushed, iclass 3, count 0 2006.229.19:17:55.11#ibcon#about to write, iclass 3, count 0 2006.229.19:17:55.11#ibcon#wrote, iclass 3, count 0 2006.229.19:17:55.11#ibcon#about to read 3, iclass 3, count 0 2006.229.19:17:55.13#ibcon#read 3, iclass 3, count 0 2006.229.19:17:55.13#ibcon#about to read 4, iclass 3, count 0 2006.229.19:17:55.13#ibcon#read 4, iclass 3, count 0 2006.229.19:17:55.13#ibcon#about to read 5, iclass 3, count 0 2006.229.19:17:55.13#ibcon#read 5, iclass 3, count 0 2006.229.19:17:55.13#ibcon#about to read 6, iclass 3, count 0 2006.229.19:17:55.13#ibcon#read 6, iclass 3, count 0 2006.229.19:17:55.13#ibcon#end of sib2, iclass 3, count 0 2006.229.19:17:55.13#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:17:55.13#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:17:55.13#ibcon#[27=USB\r\n] 2006.229.19:17:55.13#ibcon#*before write, iclass 3, count 0 2006.229.19:17:55.13#ibcon#enter sib2, iclass 3, count 0 2006.229.19:17:55.13#ibcon#flushed, iclass 3, count 0 2006.229.19:17:55.13#ibcon#about to write, iclass 3, count 0 2006.229.19:17:55.13#ibcon#wrote, iclass 3, count 0 2006.229.19:17:55.13#ibcon#about to read 3, iclass 3, count 0 2006.229.19:17:55.16#ibcon#read 3, iclass 3, count 0 2006.229.19:17:55.16#ibcon#about to read 4, iclass 3, count 0 2006.229.19:17:55.16#ibcon#read 4, iclass 3, count 0 2006.229.19:17:55.16#ibcon#about to read 5, iclass 3, count 0 2006.229.19:17:55.16#ibcon#read 5, iclass 3, count 0 2006.229.19:17:55.16#ibcon#about to read 6, iclass 3, count 0 2006.229.19:17:55.16#ibcon#read 6, iclass 3, count 0 2006.229.19:17:55.16#ibcon#end of sib2, iclass 3, count 0 2006.229.19:17:55.16#ibcon#*after write, iclass 3, count 0 2006.229.19:17:55.16#ibcon#*before return 0, iclass 3, count 0 2006.229.19:17:55.16#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:55.16#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:17:55.16#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:17:55.16#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:17:55.16$vck44/vblo=5,709.99 2006.229.19:17:55.16#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:17:55.16#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:17:55.16#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:55.16#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:55.16#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:55.16#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:55.16#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:17:55.16#ibcon#first serial, iclass 5, count 0 2006.229.19:17:55.16#ibcon#enter sib2, iclass 5, count 0 2006.229.19:17:55.16#ibcon#flushed, iclass 5, count 0 2006.229.19:17:55.16#ibcon#about to write, iclass 5, count 0 2006.229.19:17:55.16#ibcon#wrote, iclass 5, count 0 2006.229.19:17:55.16#ibcon#about to read 3, iclass 5, count 0 2006.229.19:17:55.18#ibcon#read 3, iclass 5, count 0 2006.229.19:17:55.18#ibcon#about to read 4, iclass 5, count 0 2006.229.19:17:55.18#ibcon#read 4, iclass 5, count 0 2006.229.19:17:55.18#ibcon#about to read 5, iclass 5, count 0 2006.229.19:17:55.18#ibcon#read 5, iclass 5, count 0 2006.229.19:17:55.18#ibcon#about to read 6, iclass 5, count 0 2006.229.19:17:55.18#ibcon#read 6, iclass 5, count 0 2006.229.19:17:55.18#ibcon#end of sib2, iclass 5, count 0 2006.229.19:17:55.18#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:17:55.18#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:17:55.18#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:17:55.18#ibcon#*before write, iclass 5, count 0 2006.229.19:17:55.18#ibcon#enter sib2, iclass 5, count 0 2006.229.19:17:55.18#ibcon#flushed, iclass 5, count 0 2006.229.19:17:55.18#ibcon#about to write, iclass 5, count 0 2006.229.19:17:55.18#ibcon#wrote, iclass 5, count 0 2006.229.19:17:55.18#ibcon#about to read 3, iclass 5, count 0 2006.229.19:17:55.22#ibcon#read 3, iclass 5, count 0 2006.229.19:17:55.22#ibcon#about to read 4, iclass 5, count 0 2006.229.19:17:55.22#ibcon#read 4, iclass 5, count 0 2006.229.19:17:55.22#ibcon#about to read 5, iclass 5, count 0 2006.229.19:17:55.22#ibcon#read 5, iclass 5, count 0 2006.229.19:17:55.22#ibcon#about to read 6, iclass 5, count 0 2006.229.19:17:55.22#ibcon#read 6, iclass 5, count 0 2006.229.19:17:55.22#ibcon#end of sib2, iclass 5, count 0 2006.229.19:17:55.22#ibcon#*after write, iclass 5, count 0 2006.229.19:17:55.22#ibcon#*before return 0, iclass 5, count 0 2006.229.19:17:55.22#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:55.22#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:17:55.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:17:55.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:17:55.22$vck44/vb=5,4 2006.229.19:17:55.22#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:17:55.22#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:17:55.22#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:55.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:55.28#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:55.28#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:55.28#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:17:55.28#ibcon#first serial, iclass 7, count 2 2006.229.19:17:55.28#ibcon#enter sib2, iclass 7, count 2 2006.229.19:17:55.28#ibcon#flushed, iclass 7, count 2 2006.229.19:17:55.28#ibcon#about to write, iclass 7, count 2 2006.229.19:17:55.28#ibcon#wrote, iclass 7, count 2 2006.229.19:17:55.28#ibcon#about to read 3, iclass 7, count 2 2006.229.19:17:55.30#ibcon#read 3, iclass 7, count 2 2006.229.19:17:55.30#ibcon#about to read 4, iclass 7, count 2 2006.229.19:17:55.30#ibcon#read 4, iclass 7, count 2 2006.229.19:17:55.30#ibcon#about to read 5, iclass 7, count 2 2006.229.19:17:55.30#ibcon#read 5, iclass 7, count 2 2006.229.19:17:55.30#ibcon#about to read 6, iclass 7, count 2 2006.229.19:17:55.30#ibcon#read 6, iclass 7, count 2 2006.229.19:17:55.30#ibcon#end of sib2, iclass 7, count 2 2006.229.19:17:55.30#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:17:55.30#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:17:55.30#ibcon#[27=AT05-04\r\n] 2006.229.19:17:55.30#ibcon#*before write, iclass 7, count 2 2006.229.19:17:55.30#ibcon#enter sib2, iclass 7, count 2 2006.229.19:17:55.30#ibcon#flushed, iclass 7, count 2 2006.229.19:17:55.30#ibcon#about to write, iclass 7, count 2 2006.229.19:17:55.30#ibcon#wrote, iclass 7, count 2 2006.229.19:17:55.30#ibcon#about to read 3, iclass 7, count 2 2006.229.19:17:55.33#ibcon#read 3, iclass 7, count 2 2006.229.19:17:55.33#ibcon#about to read 4, iclass 7, count 2 2006.229.19:17:55.33#ibcon#read 4, iclass 7, count 2 2006.229.19:17:55.33#ibcon#about to read 5, iclass 7, count 2 2006.229.19:17:55.33#ibcon#read 5, iclass 7, count 2 2006.229.19:17:55.33#ibcon#about to read 6, iclass 7, count 2 2006.229.19:17:55.33#ibcon#read 6, iclass 7, count 2 2006.229.19:17:55.33#ibcon#end of sib2, iclass 7, count 2 2006.229.19:17:55.33#ibcon#*after write, iclass 7, count 2 2006.229.19:17:55.33#ibcon#*before return 0, iclass 7, count 2 2006.229.19:17:55.33#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:55.33#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:17:55.33#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:17:55.33#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:55.33#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:55.45#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:55.45#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:55.45#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:17:55.45#ibcon#first serial, iclass 7, count 0 2006.229.19:17:55.45#ibcon#enter sib2, iclass 7, count 0 2006.229.19:17:55.45#ibcon#flushed, iclass 7, count 0 2006.229.19:17:55.45#ibcon#about to write, iclass 7, count 0 2006.229.19:17:55.45#ibcon#wrote, iclass 7, count 0 2006.229.19:17:55.45#ibcon#about to read 3, iclass 7, count 0 2006.229.19:17:55.47#ibcon#read 3, iclass 7, count 0 2006.229.19:17:55.47#ibcon#about to read 4, iclass 7, count 0 2006.229.19:17:55.47#ibcon#read 4, iclass 7, count 0 2006.229.19:17:55.47#ibcon#about to read 5, iclass 7, count 0 2006.229.19:17:55.47#ibcon#read 5, iclass 7, count 0 2006.229.19:17:55.47#ibcon#about to read 6, iclass 7, count 0 2006.229.19:17:55.47#ibcon#read 6, iclass 7, count 0 2006.229.19:17:55.47#ibcon#end of sib2, iclass 7, count 0 2006.229.19:17:55.47#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:17:55.47#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:17:55.47#ibcon#[27=USB\r\n] 2006.229.19:17:55.47#ibcon#*before write, iclass 7, count 0 2006.229.19:17:55.47#ibcon#enter sib2, iclass 7, count 0 2006.229.19:17:55.47#ibcon#flushed, iclass 7, count 0 2006.229.19:17:55.47#ibcon#about to write, iclass 7, count 0 2006.229.19:17:55.47#ibcon#wrote, iclass 7, count 0 2006.229.19:17:55.47#ibcon#about to read 3, iclass 7, count 0 2006.229.19:17:55.50#ibcon#read 3, iclass 7, count 0 2006.229.19:17:55.50#ibcon#about to read 4, iclass 7, count 0 2006.229.19:17:55.50#ibcon#read 4, iclass 7, count 0 2006.229.19:17:55.50#ibcon#about to read 5, iclass 7, count 0 2006.229.19:17:55.50#ibcon#read 5, iclass 7, count 0 2006.229.19:17:55.50#ibcon#about to read 6, iclass 7, count 0 2006.229.19:17:55.50#ibcon#read 6, iclass 7, count 0 2006.229.19:17:55.50#ibcon#end of sib2, iclass 7, count 0 2006.229.19:17:55.50#ibcon#*after write, iclass 7, count 0 2006.229.19:17:55.50#ibcon#*before return 0, iclass 7, count 0 2006.229.19:17:55.50#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:55.50#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:17:55.50#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:17:55.50#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:17:55.50$vck44/vblo=6,719.99 2006.229.19:17:55.50#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:17:55.50#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:17:55.50#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:55.50#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:55.50#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:55.50#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:55.50#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:17:55.50#ibcon#first serial, iclass 11, count 0 2006.229.19:17:55.50#ibcon#enter sib2, iclass 11, count 0 2006.229.19:17:55.50#ibcon#flushed, iclass 11, count 0 2006.229.19:17:55.50#ibcon#about to write, iclass 11, count 0 2006.229.19:17:55.50#ibcon#wrote, iclass 11, count 0 2006.229.19:17:55.50#ibcon#about to read 3, iclass 11, count 0 2006.229.19:17:55.52#ibcon#read 3, iclass 11, count 0 2006.229.19:17:55.52#ibcon#about to read 4, iclass 11, count 0 2006.229.19:17:55.52#ibcon#read 4, iclass 11, count 0 2006.229.19:17:55.52#ibcon#about to read 5, iclass 11, count 0 2006.229.19:17:55.52#ibcon#read 5, iclass 11, count 0 2006.229.19:17:55.52#ibcon#about to read 6, iclass 11, count 0 2006.229.19:17:55.52#ibcon#read 6, iclass 11, count 0 2006.229.19:17:55.52#ibcon#end of sib2, iclass 11, count 0 2006.229.19:17:55.52#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:17:55.52#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:17:55.52#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:17:55.52#ibcon#*before write, iclass 11, count 0 2006.229.19:17:55.52#ibcon#enter sib2, iclass 11, count 0 2006.229.19:17:55.52#ibcon#flushed, iclass 11, count 0 2006.229.19:17:55.52#ibcon#about to write, iclass 11, count 0 2006.229.19:17:55.52#ibcon#wrote, iclass 11, count 0 2006.229.19:17:55.52#ibcon#about to read 3, iclass 11, count 0 2006.229.19:17:55.56#ibcon#read 3, iclass 11, count 0 2006.229.19:17:55.56#ibcon#about to read 4, iclass 11, count 0 2006.229.19:17:55.56#ibcon#read 4, iclass 11, count 0 2006.229.19:17:55.56#ibcon#about to read 5, iclass 11, count 0 2006.229.19:17:55.56#ibcon#read 5, iclass 11, count 0 2006.229.19:17:55.56#ibcon#about to read 6, iclass 11, count 0 2006.229.19:17:55.56#ibcon#read 6, iclass 11, count 0 2006.229.19:17:55.56#ibcon#end of sib2, iclass 11, count 0 2006.229.19:17:55.56#ibcon#*after write, iclass 11, count 0 2006.229.19:17:55.56#ibcon#*before return 0, iclass 11, count 0 2006.229.19:17:55.56#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:55.56#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:17:55.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:17:55.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:17:55.56$vck44/vb=6,4 2006.229.19:17:55.56#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.19:17:55.56#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.19:17:55.56#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:55.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:55.62#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:55.62#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:55.62#ibcon#enter wrdev, iclass 13, count 2 2006.229.19:17:55.62#ibcon#first serial, iclass 13, count 2 2006.229.19:17:55.62#ibcon#enter sib2, iclass 13, count 2 2006.229.19:17:55.62#ibcon#flushed, iclass 13, count 2 2006.229.19:17:55.62#ibcon#about to write, iclass 13, count 2 2006.229.19:17:55.62#ibcon#wrote, iclass 13, count 2 2006.229.19:17:55.62#ibcon#about to read 3, iclass 13, count 2 2006.229.19:17:55.64#ibcon#read 3, iclass 13, count 2 2006.229.19:17:55.64#ibcon#about to read 4, iclass 13, count 2 2006.229.19:17:55.64#ibcon#read 4, iclass 13, count 2 2006.229.19:17:55.64#ibcon#about to read 5, iclass 13, count 2 2006.229.19:17:55.64#ibcon#read 5, iclass 13, count 2 2006.229.19:17:55.64#ibcon#about to read 6, iclass 13, count 2 2006.229.19:17:55.64#ibcon#read 6, iclass 13, count 2 2006.229.19:17:55.64#ibcon#end of sib2, iclass 13, count 2 2006.229.19:17:55.64#ibcon#*mode == 0, iclass 13, count 2 2006.229.19:17:55.64#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.19:17:55.64#ibcon#[27=AT06-04\r\n] 2006.229.19:17:55.64#ibcon#*before write, iclass 13, count 2 2006.229.19:17:55.64#ibcon#enter sib2, iclass 13, count 2 2006.229.19:17:55.64#ibcon#flushed, iclass 13, count 2 2006.229.19:17:55.64#ibcon#about to write, iclass 13, count 2 2006.229.19:17:55.64#ibcon#wrote, iclass 13, count 2 2006.229.19:17:55.64#ibcon#about to read 3, iclass 13, count 2 2006.229.19:17:55.67#ibcon#read 3, iclass 13, count 2 2006.229.19:17:55.67#ibcon#about to read 4, iclass 13, count 2 2006.229.19:17:55.67#ibcon#read 4, iclass 13, count 2 2006.229.19:17:55.67#ibcon#about to read 5, iclass 13, count 2 2006.229.19:17:55.67#ibcon#read 5, iclass 13, count 2 2006.229.19:17:55.67#ibcon#about to read 6, iclass 13, count 2 2006.229.19:17:55.67#ibcon#read 6, iclass 13, count 2 2006.229.19:17:55.67#ibcon#end of sib2, iclass 13, count 2 2006.229.19:17:55.67#ibcon#*after write, iclass 13, count 2 2006.229.19:17:55.67#ibcon#*before return 0, iclass 13, count 2 2006.229.19:17:55.67#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:55.67#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:17:55.67#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.19:17:55.67#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:55.67#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:55.79#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:55.79#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:55.79#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:17:55.79#ibcon#first serial, iclass 13, count 0 2006.229.19:17:55.79#ibcon#enter sib2, iclass 13, count 0 2006.229.19:17:55.79#ibcon#flushed, iclass 13, count 0 2006.229.19:17:55.79#ibcon#about to write, iclass 13, count 0 2006.229.19:17:55.79#ibcon#wrote, iclass 13, count 0 2006.229.19:17:55.79#ibcon#about to read 3, iclass 13, count 0 2006.229.19:17:55.81#ibcon#read 3, iclass 13, count 0 2006.229.19:17:55.81#ibcon#about to read 4, iclass 13, count 0 2006.229.19:17:55.81#ibcon#read 4, iclass 13, count 0 2006.229.19:17:55.81#ibcon#about to read 5, iclass 13, count 0 2006.229.19:17:55.81#ibcon#read 5, iclass 13, count 0 2006.229.19:17:55.81#ibcon#about to read 6, iclass 13, count 0 2006.229.19:17:55.81#ibcon#read 6, iclass 13, count 0 2006.229.19:17:55.81#ibcon#end of sib2, iclass 13, count 0 2006.229.19:17:55.81#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:17:55.81#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:17:55.81#ibcon#[27=USB\r\n] 2006.229.19:17:55.81#ibcon#*before write, iclass 13, count 0 2006.229.19:17:55.81#ibcon#enter sib2, iclass 13, count 0 2006.229.19:17:55.81#ibcon#flushed, iclass 13, count 0 2006.229.19:17:55.81#ibcon#about to write, iclass 13, count 0 2006.229.19:17:55.81#ibcon#wrote, iclass 13, count 0 2006.229.19:17:55.81#ibcon#about to read 3, iclass 13, count 0 2006.229.19:17:55.84#ibcon#read 3, iclass 13, count 0 2006.229.19:17:55.84#ibcon#about to read 4, iclass 13, count 0 2006.229.19:17:55.84#ibcon#read 4, iclass 13, count 0 2006.229.19:17:55.84#ibcon#about to read 5, iclass 13, count 0 2006.229.19:17:55.84#ibcon#read 5, iclass 13, count 0 2006.229.19:17:55.84#ibcon#about to read 6, iclass 13, count 0 2006.229.19:17:55.84#ibcon#read 6, iclass 13, count 0 2006.229.19:17:55.84#ibcon#end of sib2, iclass 13, count 0 2006.229.19:17:55.84#ibcon#*after write, iclass 13, count 0 2006.229.19:17:55.84#ibcon#*before return 0, iclass 13, count 0 2006.229.19:17:55.84#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:55.84#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:17:55.84#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:17:55.84#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:17:55.84$vck44/vblo=7,734.99 2006.229.19:17:55.84#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.19:17:55.84#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.19:17:55.84#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:55.84#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:55.84#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:55.84#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:55.84#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:17:55.84#ibcon#first serial, iclass 15, count 0 2006.229.19:17:55.84#ibcon#enter sib2, iclass 15, count 0 2006.229.19:17:55.84#ibcon#flushed, iclass 15, count 0 2006.229.19:17:55.84#ibcon#about to write, iclass 15, count 0 2006.229.19:17:55.84#ibcon#wrote, iclass 15, count 0 2006.229.19:17:55.84#ibcon#about to read 3, iclass 15, count 0 2006.229.19:17:55.86#ibcon#read 3, iclass 15, count 0 2006.229.19:17:55.86#ibcon#about to read 4, iclass 15, count 0 2006.229.19:17:55.86#ibcon#read 4, iclass 15, count 0 2006.229.19:17:55.86#ibcon#about to read 5, iclass 15, count 0 2006.229.19:17:55.86#ibcon#read 5, iclass 15, count 0 2006.229.19:17:55.86#ibcon#about to read 6, iclass 15, count 0 2006.229.19:17:55.86#ibcon#read 6, iclass 15, count 0 2006.229.19:17:55.86#ibcon#end of sib2, iclass 15, count 0 2006.229.19:17:55.86#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:17:55.86#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:17:55.86#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:17:55.86#ibcon#*before write, iclass 15, count 0 2006.229.19:17:55.86#ibcon#enter sib2, iclass 15, count 0 2006.229.19:17:55.86#ibcon#flushed, iclass 15, count 0 2006.229.19:17:55.86#ibcon#about to write, iclass 15, count 0 2006.229.19:17:55.86#ibcon#wrote, iclass 15, count 0 2006.229.19:17:55.86#ibcon#about to read 3, iclass 15, count 0 2006.229.19:17:55.90#ibcon#read 3, iclass 15, count 0 2006.229.19:17:55.90#ibcon#about to read 4, iclass 15, count 0 2006.229.19:17:55.90#ibcon#read 4, iclass 15, count 0 2006.229.19:17:55.90#ibcon#about to read 5, iclass 15, count 0 2006.229.19:17:55.90#ibcon#read 5, iclass 15, count 0 2006.229.19:17:55.90#ibcon#about to read 6, iclass 15, count 0 2006.229.19:17:55.90#ibcon#read 6, iclass 15, count 0 2006.229.19:17:55.90#ibcon#end of sib2, iclass 15, count 0 2006.229.19:17:55.90#ibcon#*after write, iclass 15, count 0 2006.229.19:17:55.90#ibcon#*before return 0, iclass 15, count 0 2006.229.19:17:55.90#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:55.90#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:17:55.90#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:17:55.90#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:17:55.90$vck44/vb=7,4 2006.229.19:17:55.90#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.19:17:55.90#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.19:17:55.90#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:55.90#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:55.96#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:55.96#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:55.96#ibcon#enter wrdev, iclass 17, count 2 2006.229.19:17:55.96#ibcon#first serial, iclass 17, count 2 2006.229.19:17:55.96#ibcon#enter sib2, iclass 17, count 2 2006.229.19:17:55.96#ibcon#flushed, iclass 17, count 2 2006.229.19:17:55.96#ibcon#about to write, iclass 17, count 2 2006.229.19:17:55.96#ibcon#wrote, iclass 17, count 2 2006.229.19:17:55.96#ibcon#about to read 3, iclass 17, count 2 2006.229.19:17:55.98#ibcon#read 3, iclass 17, count 2 2006.229.19:17:55.98#ibcon#about to read 4, iclass 17, count 2 2006.229.19:17:55.98#ibcon#read 4, iclass 17, count 2 2006.229.19:17:55.98#ibcon#about to read 5, iclass 17, count 2 2006.229.19:17:55.98#ibcon#read 5, iclass 17, count 2 2006.229.19:17:55.98#ibcon#about to read 6, iclass 17, count 2 2006.229.19:17:55.98#ibcon#read 6, iclass 17, count 2 2006.229.19:17:55.98#ibcon#end of sib2, iclass 17, count 2 2006.229.19:17:55.98#ibcon#*mode == 0, iclass 17, count 2 2006.229.19:17:55.98#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.19:17:55.98#ibcon#[27=AT07-04\r\n] 2006.229.19:17:55.98#ibcon#*before write, iclass 17, count 2 2006.229.19:17:55.98#ibcon#enter sib2, iclass 17, count 2 2006.229.19:17:55.98#ibcon#flushed, iclass 17, count 2 2006.229.19:17:55.98#ibcon#about to write, iclass 17, count 2 2006.229.19:17:55.98#ibcon#wrote, iclass 17, count 2 2006.229.19:17:55.98#ibcon#about to read 3, iclass 17, count 2 2006.229.19:17:56.01#ibcon#read 3, iclass 17, count 2 2006.229.19:17:56.01#ibcon#about to read 4, iclass 17, count 2 2006.229.19:17:56.01#ibcon#read 4, iclass 17, count 2 2006.229.19:17:56.01#ibcon#about to read 5, iclass 17, count 2 2006.229.19:17:56.01#ibcon#read 5, iclass 17, count 2 2006.229.19:17:56.01#ibcon#about to read 6, iclass 17, count 2 2006.229.19:17:56.01#ibcon#read 6, iclass 17, count 2 2006.229.19:17:56.01#ibcon#end of sib2, iclass 17, count 2 2006.229.19:17:56.01#ibcon#*after write, iclass 17, count 2 2006.229.19:17:56.01#ibcon#*before return 0, iclass 17, count 2 2006.229.19:17:56.01#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:56.01#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:17:56.01#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.19:17:56.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:56.01#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:56.13#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:56.13#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:56.13#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:17:56.13#ibcon#first serial, iclass 17, count 0 2006.229.19:17:56.13#ibcon#enter sib2, iclass 17, count 0 2006.229.19:17:56.13#ibcon#flushed, iclass 17, count 0 2006.229.19:17:56.13#ibcon#about to write, iclass 17, count 0 2006.229.19:17:56.13#ibcon#wrote, iclass 17, count 0 2006.229.19:17:56.13#ibcon#about to read 3, iclass 17, count 0 2006.229.19:17:56.15#ibcon#read 3, iclass 17, count 0 2006.229.19:17:56.15#ibcon#about to read 4, iclass 17, count 0 2006.229.19:17:56.15#ibcon#read 4, iclass 17, count 0 2006.229.19:17:56.15#ibcon#about to read 5, iclass 17, count 0 2006.229.19:17:56.15#ibcon#read 5, iclass 17, count 0 2006.229.19:17:56.15#ibcon#about to read 6, iclass 17, count 0 2006.229.19:17:56.15#ibcon#read 6, iclass 17, count 0 2006.229.19:17:56.15#ibcon#end of sib2, iclass 17, count 0 2006.229.19:17:56.15#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:17:56.15#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:17:56.15#ibcon#[27=USB\r\n] 2006.229.19:17:56.15#ibcon#*before write, iclass 17, count 0 2006.229.19:17:56.15#ibcon#enter sib2, iclass 17, count 0 2006.229.19:17:56.15#ibcon#flushed, iclass 17, count 0 2006.229.19:17:56.15#ibcon#about to write, iclass 17, count 0 2006.229.19:17:56.15#ibcon#wrote, iclass 17, count 0 2006.229.19:17:56.15#ibcon#about to read 3, iclass 17, count 0 2006.229.19:17:56.18#ibcon#read 3, iclass 17, count 0 2006.229.19:17:56.18#ibcon#about to read 4, iclass 17, count 0 2006.229.19:17:56.18#ibcon#read 4, iclass 17, count 0 2006.229.19:17:56.18#ibcon#about to read 5, iclass 17, count 0 2006.229.19:17:56.18#ibcon#read 5, iclass 17, count 0 2006.229.19:17:56.18#ibcon#about to read 6, iclass 17, count 0 2006.229.19:17:56.18#ibcon#read 6, iclass 17, count 0 2006.229.19:17:56.18#ibcon#end of sib2, iclass 17, count 0 2006.229.19:17:56.18#ibcon#*after write, iclass 17, count 0 2006.229.19:17:56.18#ibcon#*before return 0, iclass 17, count 0 2006.229.19:17:56.18#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:56.18#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:17:56.18#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:17:56.18#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:17:56.18$vck44/vblo=8,744.99 2006.229.19:17:56.18#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:17:56.18#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:17:56.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:17:56.18#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:56.18#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:56.18#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:56.18#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:17:56.18#ibcon#first serial, iclass 19, count 0 2006.229.19:17:56.18#ibcon#enter sib2, iclass 19, count 0 2006.229.19:17:56.18#ibcon#flushed, iclass 19, count 0 2006.229.19:17:56.18#ibcon#about to write, iclass 19, count 0 2006.229.19:17:56.18#ibcon#wrote, iclass 19, count 0 2006.229.19:17:56.18#ibcon#about to read 3, iclass 19, count 0 2006.229.19:17:56.20#ibcon#read 3, iclass 19, count 0 2006.229.19:17:56.20#ibcon#about to read 4, iclass 19, count 0 2006.229.19:17:56.20#ibcon#read 4, iclass 19, count 0 2006.229.19:17:56.20#ibcon#about to read 5, iclass 19, count 0 2006.229.19:17:56.20#ibcon#read 5, iclass 19, count 0 2006.229.19:17:56.20#ibcon#about to read 6, iclass 19, count 0 2006.229.19:17:56.20#ibcon#read 6, iclass 19, count 0 2006.229.19:17:56.20#ibcon#end of sib2, iclass 19, count 0 2006.229.19:17:56.20#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:17:56.20#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:17:56.20#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:17:56.20#ibcon#*before write, iclass 19, count 0 2006.229.19:17:56.20#ibcon#enter sib2, iclass 19, count 0 2006.229.19:17:56.20#ibcon#flushed, iclass 19, count 0 2006.229.19:17:56.20#ibcon#about to write, iclass 19, count 0 2006.229.19:17:56.20#ibcon#wrote, iclass 19, count 0 2006.229.19:17:56.20#ibcon#about to read 3, iclass 19, count 0 2006.229.19:17:56.24#ibcon#read 3, iclass 19, count 0 2006.229.19:17:56.24#ibcon#about to read 4, iclass 19, count 0 2006.229.19:17:56.24#ibcon#read 4, iclass 19, count 0 2006.229.19:17:56.24#ibcon#about to read 5, iclass 19, count 0 2006.229.19:17:56.24#ibcon#read 5, iclass 19, count 0 2006.229.19:17:56.24#ibcon#about to read 6, iclass 19, count 0 2006.229.19:17:56.24#ibcon#read 6, iclass 19, count 0 2006.229.19:17:56.24#ibcon#end of sib2, iclass 19, count 0 2006.229.19:17:56.24#ibcon#*after write, iclass 19, count 0 2006.229.19:17:56.24#ibcon#*before return 0, iclass 19, count 0 2006.229.19:17:56.24#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:56.24#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:17:56.24#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:17:56.24#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:17:56.24$vck44/vb=8,4 2006.229.19:17:56.24#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.19:17:56.24#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.19:17:56.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:17:56.24#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:56.30#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:56.30#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:56.30#ibcon#enter wrdev, iclass 21, count 2 2006.229.19:17:56.30#ibcon#first serial, iclass 21, count 2 2006.229.19:17:56.30#ibcon#enter sib2, iclass 21, count 2 2006.229.19:17:56.30#ibcon#flushed, iclass 21, count 2 2006.229.19:17:56.30#ibcon#about to write, iclass 21, count 2 2006.229.19:17:56.30#ibcon#wrote, iclass 21, count 2 2006.229.19:17:56.30#ibcon#about to read 3, iclass 21, count 2 2006.229.19:17:56.32#ibcon#read 3, iclass 21, count 2 2006.229.19:17:56.32#ibcon#about to read 4, iclass 21, count 2 2006.229.19:17:56.32#ibcon#read 4, iclass 21, count 2 2006.229.19:17:56.32#ibcon#about to read 5, iclass 21, count 2 2006.229.19:17:56.32#ibcon#read 5, iclass 21, count 2 2006.229.19:17:56.32#ibcon#about to read 6, iclass 21, count 2 2006.229.19:17:56.32#ibcon#read 6, iclass 21, count 2 2006.229.19:17:56.32#ibcon#end of sib2, iclass 21, count 2 2006.229.19:17:56.32#ibcon#*mode == 0, iclass 21, count 2 2006.229.19:17:56.32#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.19:17:56.32#ibcon#[27=AT08-04\r\n] 2006.229.19:17:56.32#ibcon#*before write, iclass 21, count 2 2006.229.19:17:56.32#ibcon#enter sib2, iclass 21, count 2 2006.229.19:17:56.32#ibcon#flushed, iclass 21, count 2 2006.229.19:17:56.32#ibcon#about to write, iclass 21, count 2 2006.229.19:17:56.32#ibcon#wrote, iclass 21, count 2 2006.229.19:17:56.32#ibcon#about to read 3, iclass 21, count 2 2006.229.19:17:56.35#ibcon#read 3, iclass 21, count 2 2006.229.19:17:56.35#ibcon#about to read 4, iclass 21, count 2 2006.229.19:17:56.35#ibcon#read 4, iclass 21, count 2 2006.229.19:17:56.35#ibcon#about to read 5, iclass 21, count 2 2006.229.19:17:56.35#ibcon#read 5, iclass 21, count 2 2006.229.19:17:56.35#ibcon#about to read 6, iclass 21, count 2 2006.229.19:17:56.35#ibcon#read 6, iclass 21, count 2 2006.229.19:17:56.35#ibcon#end of sib2, iclass 21, count 2 2006.229.19:17:56.35#ibcon#*after write, iclass 21, count 2 2006.229.19:17:56.35#ibcon#*before return 0, iclass 21, count 2 2006.229.19:17:56.35#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:56.35#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:17:56.35#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.19:17:56.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:17:56.35#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:56.47#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:56.47#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:56.47#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:17:56.47#ibcon#first serial, iclass 21, count 0 2006.229.19:17:56.47#ibcon#enter sib2, iclass 21, count 0 2006.229.19:17:56.47#ibcon#flushed, iclass 21, count 0 2006.229.19:17:56.47#ibcon#about to write, iclass 21, count 0 2006.229.19:17:56.47#ibcon#wrote, iclass 21, count 0 2006.229.19:17:56.47#ibcon#about to read 3, iclass 21, count 0 2006.229.19:17:56.49#ibcon#read 3, iclass 21, count 0 2006.229.19:17:56.49#ibcon#about to read 4, iclass 21, count 0 2006.229.19:17:56.49#ibcon#read 4, iclass 21, count 0 2006.229.19:17:56.49#ibcon#about to read 5, iclass 21, count 0 2006.229.19:17:56.49#ibcon#read 5, iclass 21, count 0 2006.229.19:17:56.49#ibcon#about to read 6, iclass 21, count 0 2006.229.19:17:56.49#ibcon#read 6, iclass 21, count 0 2006.229.19:17:56.49#ibcon#end of sib2, iclass 21, count 0 2006.229.19:17:56.49#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:17:56.49#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:17:56.49#ibcon#[27=USB\r\n] 2006.229.19:17:56.49#ibcon#*before write, iclass 21, count 0 2006.229.19:17:56.49#ibcon#enter sib2, iclass 21, count 0 2006.229.19:17:56.49#ibcon#flushed, iclass 21, count 0 2006.229.19:17:56.49#ibcon#about to write, iclass 21, count 0 2006.229.19:17:56.49#ibcon#wrote, iclass 21, count 0 2006.229.19:17:56.49#ibcon#about to read 3, iclass 21, count 0 2006.229.19:17:56.52#ibcon#read 3, iclass 21, count 0 2006.229.19:17:56.52#ibcon#about to read 4, iclass 21, count 0 2006.229.19:17:56.52#ibcon#read 4, iclass 21, count 0 2006.229.19:17:56.52#ibcon#about to read 5, iclass 21, count 0 2006.229.19:17:56.52#ibcon#read 5, iclass 21, count 0 2006.229.19:17:56.52#ibcon#about to read 6, iclass 21, count 0 2006.229.19:17:56.52#ibcon#read 6, iclass 21, count 0 2006.229.19:17:56.52#ibcon#end of sib2, iclass 21, count 0 2006.229.19:17:56.52#ibcon#*after write, iclass 21, count 0 2006.229.19:17:56.52#ibcon#*before return 0, iclass 21, count 0 2006.229.19:17:56.52#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:56.52#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:17:56.52#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:17:56.52#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:17:56.52$vck44/vabw=wide 2006.229.19:17:56.52#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.19:17:56.52#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.19:17:56.52#ibcon#ireg 8 cls_cnt 0 2006.229.19:17:56.52#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:56.52#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:56.52#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:56.52#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:17:56.52#ibcon#first serial, iclass 23, count 0 2006.229.19:17:56.52#ibcon#enter sib2, iclass 23, count 0 2006.229.19:17:56.52#ibcon#flushed, iclass 23, count 0 2006.229.19:17:56.52#ibcon#about to write, iclass 23, count 0 2006.229.19:17:56.52#ibcon#wrote, iclass 23, count 0 2006.229.19:17:56.52#ibcon#about to read 3, iclass 23, count 0 2006.229.19:17:56.54#ibcon#read 3, iclass 23, count 0 2006.229.19:17:56.54#ibcon#about to read 4, iclass 23, count 0 2006.229.19:17:56.54#ibcon#read 4, iclass 23, count 0 2006.229.19:17:56.54#ibcon#about to read 5, iclass 23, count 0 2006.229.19:17:56.54#ibcon#read 5, iclass 23, count 0 2006.229.19:17:56.54#ibcon#about to read 6, iclass 23, count 0 2006.229.19:17:56.54#ibcon#read 6, iclass 23, count 0 2006.229.19:17:56.54#ibcon#end of sib2, iclass 23, count 0 2006.229.19:17:56.54#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:17:56.54#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:17:56.54#ibcon#[25=BW32\r\n] 2006.229.19:17:56.54#ibcon#*before write, iclass 23, count 0 2006.229.19:17:56.54#ibcon#enter sib2, iclass 23, count 0 2006.229.19:17:56.54#ibcon#flushed, iclass 23, count 0 2006.229.19:17:56.54#ibcon#about to write, iclass 23, count 0 2006.229.19:17:56.54#ibcon#wrote, iclass 23, count 0 2006.229.19:17:56.54#ibcon#about to read 3, iclass 23, count 0 2006.229.19:17:56.57#ibcon#read 3, iclass 23, count 0 2006.229.19:17:56.57#ibcon#about to read 4, iclass 23, count 0 2006.229.19:17:56.57#ibcon#read 4, iclass 23, count 0 2006.229.19:17:56.57#ibcon#about to read 5, iclass 23, count 0 2006.229.19:17:56.57#ibcon#read 5, iclass 23, count 0 2006.229.19:17:56.57#ibcon#about to read 6, iclass 23, count 0 2006.229.19:17:56.57#ibcon#read 6, iclass 23, count 0 2006.229.19:17:56.57#ibcon#end of sib2, iclass 23, count 0 2006.229.19:17:56.57#ibcon#*after write, iclass 23, count 0 2006.229.19:17:56.57#ibcon#*before return 0, iclass 23, count 0 2006.229.19:17:56.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:56.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:17:56.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:17:56.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:17:56.57$vck44/vbbw=wide 2006.229.19:17:56.57#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.19:17:56.57#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.19:17:56.57#ibcon#ireg 8 cls_cnt 0 2006.229.19:17:56.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:17:56.64#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:17:56.64#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:17:56.64#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:17:56.64#ibcon#first serial, iclass 25, count 0 2006.229.19:17:56.64#ibcon#enter sib2, iclass 25, count 0 2006.229.19:17:56.64#ibcon#flushed, iclass 25, count 0 2006.229.19:17:56.64#ibcon#about to write, iclass 25, count 0 2006.229.19:17:56.64#ibcon#wrote, iclass 25, count 0 2006.229.19:17:56.64#ibcon#about to read 3, iclass 25, count 0 2006.229.19:17:56.66#ibcon#read 3, iclass 25, count 0 2006.229.19:17:56.66#ibcon#about to read 4, iclass 25, count 0 2006.229.19:17:56.66#ibcon#read 4, iclass 25, count 0 2006.229.19:17:56.66#ibcon#about to read 5, iclass 25, count 0 2006.229.19:17:56.66#ibcon#read 5, iclass 25, count 0 2006.229.19:17:56.66#ibcon#about to read 6, iclass 25, count 0 2006.229.19:17:56.66#ibcon#read 6, iclass 25, count 0 2006.229.19:17:56.66#ibcon#end of sib2, iclass 25, count 0 2006.229.19:17:56.66#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:17:56.66#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:17:56.66#ibcon#[27=BW32\r\n] 2006.229.19:17:56.66#ibcon#*before write, iclass 25, count 0 2006.229.19:17:56.66#ibcon#enter sib2, iclass 25, count 0 2006.229.19:17:56.66#ibcon#flushed, iclass 25, count 0 2006.229.19:17:56.66#ibcon#about to write, iclass 25, count 0 2006.229.19:17:56.66#ibcon#wrote, iclass 25, count 0 2006.229.19:17:56.66#ibcon#about to read 3, iclass 25, count 0 2006.229.19:17:56.69#ibcon#read 3, iclass 25, count 0 2006.229.19:17:56.69#ibcon#about to read 4, iclass 25, count 0 2006.229.19:17:56.69#ibcon#read 4, iclass 25, count 0 2006.229.19:17:56.69#ibcon#about to read 5, iclass 25, count 0 2006.229.19:17:56.69#ibcon#read 5, iclass 25, count 0 2006.229.19:17:56.69#ibcon#about to read 6, iclass 25, count 0 2006.229.19:17:56.69#ibcon#read 6, iclass 25, count 0 2006.229.19:17:56.69#ibcon#end of sib2, iclass 25, count 0 2006.229.19:17:56.69#ibcon#*after write, iclass 25, count 0 2006.229.19:17:56.69#ibcon#*before return 0, iclass 25, count 0 2006.229.19:17:56.69#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:17:56.69#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:17:56.69#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:17:56.69#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:17:56.69$setupk4/ifdk4 2006.229.19:17:56.69$ifdk4/lo= 2006.229.19:17:56.69$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:17:56.69$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:17:56.69$ifdk4/patch= 2006.229.19:17:56.69$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:17:56.69$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:17:56.69$setupk4/!*+20s 2006.229.19:18:00.90#abcon#<5=/06 1.4 2.6 26.111001001.5\r\n> 2006.229.19:18:00.92#abcon#{5=INTERFACE CLEAR} 2006.229.19:18:00.98#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:18:11.07#abcon#<5=/06 1.4 2.6 26.111001001.5\r\n> 2006.229.19:18:11.09#abcon#{5=INTERFACE CLEAR} 2006.229.19:18:11.15#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:18:11.21$setupk4/"tpicd 2006.229.19:18:11.21$setupk4/echo=off 2006.229.19:18:11.21$setupk4/xlog=off 2006.229.19:18:11.21:!2006.229.19:22:49 2006.229.19:18:37.14#trakl#Source acquired 2006.229.19:18:37.14#flagr#flagr/antenna,acquired 2006.229.19:22:49.00:preob 2006.229.19:22:50.13/onsource/TRACKING 2006.229.19:22:50.13:!2006.229.19:22:59 2006.229.19:22:59.00:"tape 2006.229.19:22:59.00:"st=record 2006.229.19:22:59.00:data_valid=on 2006.229.19:22:59.00:midob 2006.229.19:22:59.13/onsource/TRACKING 2006.229.19:22:59.13/wx/26.10,1001.5,100 2006.229.19:22:59.26/cable/+6.4199E-03 2006.229.19:23:00.35/va/01,08,usb,yes,31,33 2006.229.19:23:00.35/va/02,07,usb,yes,33,34 2006.229.19:23:00.35/va/03,06,usb,yes,41,44 2006.229.19:23:00.35/va/04,07,usb,yes,34,36 2006.229.19:23:00.35/va/05,04,usb,yes,31,31 2006.229.19:23:00.35/va/06,04,usb,yes,35,34 2006.229.19:23:00.35/va/07,05,usb,yes,30,31 2006.229.19:23:00.35/va/08,06,usb,yes,22,27 2006.229.19:23:00.58/valo/01,524.99,yes,locked 2006.229.19:23:00.58/valo/02,534.99,yes,locked 2006.229.19:23:00.58/valo/03,564.99,yes,locked 2006.229.19:23:00.58/valo/04,624.99,yes,locked 2006.229.19:23:00.58/valo/05,734.99,yes,locked 2006.229.19:23:00.58/valo/06,814.99,yes,locked 2006.229.19:23:00.58/valo/07,864.99,yes,locked 2006.229.19:23:00.58/valo/08,884.99,yes,locked 2006.229.19:23:01.67/vb/01,04,usb,yes,31,29 2006.229.19:23:01.67/vb/02,04,usb,yes,34,34 2006.229.19:23:01.67/vb/03,04,usb,yes,31,34 2006.229.19:23:01.67/vb/04,04,usb,yes,35,34 2006.229.19:23:01.67/vb/05,04,usb,yes,27,30 2006.229.19:23:01.67/vb/06,04,usb,yes,32,28 2006.229.19:23:01.67/vb/07,04,usb,yes,32,32 2006.229.19:23:01.67/vb/08,04,usb,yes,29,33 2006.229.19:23:01.91/vblo/01,629.99,yes,locked 2006.229.19:23:01.91/vblo/02,634.99,yes,locked 2006.229.19:23:01.91/vblo/03,649.99,yes,locked 2006.229.19:23:01.91/vblo/04,679.99,yes,locked 2006.229.19:23:01.91/vblo/05,709.99,yes,locked 2006.229.19:23:01.91/vblo/06,719.99,yes,locked 2006.229.19:23:01.91/vblo/07,734.99,yes,locked 2006.229.19:23:01.91/vblo/08,744.99,yes,locked 2006.229.19:23:02.06/vabw/8 2006.229.19:23:02.21/vbbw/8 2006.229.19:23:02.30/xfe/off,on,12.2 2006.229.19:23:02.69/ifatt/23,28,28,28 2006.229.19:23:03.08/fmout-gps/S +4.46E-07 2006.229.19:23:03.12:!2006.229.19:24:39 2006.229.19:24:39.01:data_valid=off 2006.229.19:24:39.01:"et 2006.229.19:24:39.02:!+3s 2006.229.19:24:42.03:"tape 2006.229.19:24:42.03:postob 2006.229.19:24:42.10/cable/+6.4198E-03 2006.229.19:24:42.10/wx/26.09,1001.5,100 2006.229.19:24:42.16/fmout-gps/S +4.44E-07 2006.229.19:24:42.16:scan_name=229-1929,jd0608,50 2006.229.19:24:42.16:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.19:24:44.14#flagr#flagr/antenna,new-source 2006.229.19:24:44.14:checkk5 2006.229.19:24:44.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:24:44.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:24:45.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:24:45.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:24:46.13/chk_obsdata//k5ts1/T2291922??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.19:24:46.53/chk_obsdata//k5ts2/T2291922??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.19:24:46.94/chk_obsdata//k5ts3/T2291922??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.19:24:47.34/chk_obsdata//k5ts4/T2291922??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.19:24:48.09/k5log//k5ts1_log_newline 2006.229.19:24:48.80/k5log//k5ts2_log_newline 2006.229.19:24:49.51/k5log//k5ts3_log_newline 2006.229.19:24:50.21/k5log//k5ts4_log_newline 2006.229.19:24:50.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:24:50.23:setupk4=1 2006.229.19:24:50.23$setupk4/echo=on 2006.229.19:24:50.23$setupk4/pcalon 2006.229.19:24:50.23$pcalon/"no phase cal control is implemented here 2006.229.19:24:50.23$setupk4/"tpicd=stop 2006.229.19:24:50.23$setupk4/"rec=synch_on 2006.229.19:24:50.23$setupk4/"rec_mode=128 2006.229.19:24:50.23$setupk4/!* 2006.229.19:24:50.23$setupk4/recpk4 2006.229.19:24:50.23$recpk4/recpatch= 2006.229.19:24:50.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:24:50.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:24:50.24$setupk4/vck44 2006.229.19:24:50.24$vck44/valo=1,524.99 2006.229.19:24:50.24#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.19:24:50.24#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.19:24:50.24#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:50.24#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:50.24#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:50.24#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:50.24#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:24:50.24#ibcon#first serial, iclass 14, count 0 2006.229.19:24:50.24#ibcon#enter sib2, iclass 14, count 0 2006.229.19:24:50.24#ibcon#flushed, iclass 14, count 0 2006.229.19:24:50.24#ibcon#about to write, iclass 14, count 0 2006.229.19:24:50.24#ibcon#wrote, iclass 14, count 0 2006.229.19:24:50.24#ibcon#about to read 3, iclass 14, count 0 2006.229.19:24:50.26#ibcon#read 3, iclass 14, count 0 2006.229.19:24:50.26#ibcon#about to read 4, iclass 14, count 0 2006.229.19:24:50.26#ibcon#read 4, iclass 14, count 0 2006.229.19:24:50.26#ibcon#about to read 5, iclass 14, count 0 2006.229.19:24:50.26#ibcon#read 5, iclass 14, count 0 2006.229.19:24:50.26#ibcon#about to read 6, iclass 14, count 0 2006.229.19:24:50.26#ibcon#read 6, iclass 14, count 0 2006.229.19:24:50.26#ibcon#end of sib2, iclass 14, count 0 2006.229.19:24:50.26#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:24:50.26#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:24:50.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:24:50.26#ibcon#*before write, iclass 14, count 0 2006.229.19:24:50.26#ibcon#enter sib2, iclass 14, count 0 2006.229.19:24:50.26#ibcon#flushed, iclass 14, count 0 2006.229.19:24:50.26#ibcon#about to write, iclass 14, count 0 2006.229.19:24:50.26#ibcon#wrote, iclass 14, count 0 2006.229.19:24:50.26#ibcon#about to read 3, iclass 14, count 0 2006.229.19:24:50.31#ibcon#read 3, iclass 14, count 0 2006.229.19:24:50.31#ibcon#about to read 4, iclass 14, count 0 2006.229.19:24:50.31#ibcon#read 4, iclass 14, count 0 2006.229.19:24:50.31#ibcon#about to read 5, iclass 14, count 0 2006.229.19:24:50.31#ibcon#read 5, iclass 14, count 0 2006.229.19:24:50.31#ibcon#about to read 6, iclass 14, count 0 2006.229.19:24:50.31#ibcon#read 6, iclass 14, count 0 2006.229.19:24:50.31#ibcon#end of sib2, iclass 14, count 0 2006.229.19:24:50.31#ibcon#*after write, iclass 14, count 0 2006.229.19:24:50.31#ibcon#*before return 0, iclass 14, count 0 2006.229.19:24:50.31#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:50.31#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:50.31#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:24:50.31#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:24:50.31$vck44/va=1,8 2006.229.19:24:50.31#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.19:24:50.31#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.19:24:50.31#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:50.31#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:50.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:50.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:50.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.19:24:50.31#ibcon#first serial, iclass 16, count 2 2006.229.19:24:50.31#ibcon#enter sib2, iclass 16, count 2 2006.229.19:24:50.31#ibcon#flushed, iclass 16, count 2 2006.229.19:24:50.31#ibcon#about to write, iclass 16, count 2 2006.229.19:24:50.31#ibcon#wrote, iclass 16, count 2 2006.229.19:24:50.31#ibcon#about to read 3, iclass 16, count 2 2006.229.19:24:50.33#ibcon#read 3, iclass 16, count 2 2006.229.19:24:50.33#ibcon#about to read 4, iclass 16, count 2 2006.229.19:24:50.33#ibcon#read 4, iclass 16, count 2 2006.229.19:24:50.33#ibcon#about to read 5, iclass 16, count 2 2006.229.19:24:50.33#ibcon#read 5, iclass 16, count 2 2006.229.19:24:50.33#ibcon#about to read 6, iclass 16, count 2 2006.229.19:24:50.33#ibcon#read 6, iclass 16, count 2 2006.229.19:24:50.33#ibcon#end of sib2, iclass 16, count 2 2006.229.19:24:50.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.19:24:50.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.19:24:50.33#ibcon#[25=AT01-08\r\n] 2006.229.19:24:50.33#ibcon#*before write, iclass 16, count 2 2006.229.19:24:50.33#ibcon#enter sib2, iclass 16, count 2 2006.229.19:24:50.33#ibcon#flushed, iclass 16, count 2 2006.229.19:24:50.33#ibcon#about to write, iclass 16, count 2 2006.229.19:24:50.33#ibcon#wrote, iclass 16, count 2 2006.229.19:24:50.33#ibcon#about to read 3, iclass 16, count 2 2006.229.19:24:50.36#ibcon#read 3, iclass 16, count 2 2006.229.19:24:50.36#ibcon#about to read 4, iclass 16, count 2 2006.229.19:24:50.36#ibcon#read 4, iclass 16, count 2 2006.229.19:24:50.36#ibcon#about to read 5, iclass 16, count 2 2006.229.19:24:50.36#ibcon#read 5, iclass 16, count 2 2006.229.19:24:50.36#ibcon#about to read 6, iclass 16, count 2 2006.229.19:24:50.36#ibcon#read 6, iclass 16, count 2 2006.229.19:24:50.36#ibcon#end of sib2, iclass 16, count 2 2006.229.19:24:50.36#ibcon#*after write, iclass 16, count 2 2006.229.19:24:50.36#ibcon#*before return 0, iclass 16, count 2 2006.229.19:24:50.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:50.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:50.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.19:24:50.36#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:50.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:50.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:50.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:50.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:24:50.48#ibcon#first serial, iclass 16, count 0 2006.229.19:24:50.48#ibcon#enter sib2, iclass 16, count 0 2006.229.19:24:50.48#ibcon#flushed, iclass 16, count 0 2006.229.19:24:50.48#ibcon#about to write, iclass 16, count 0 2006.229.19:24:50.48#ibcon#wrote, iclass 16, count 0 2006.229.19:24:50.48#ibcon#about to read 3, iclass 16, count 0 2006.229.19:24:50.50#ibcon#read 3, iclass 16, count 0 2006.229.19:24:50.50#ibcon#about to read 4, iclass 16, count 0 2006.229.19:24:50.50#ibcon#read 4, iclass 16, count 0 2006.229.19:24:50.50#ibcon#about to read 5, iclass 16, count 0 2006.229.19:24:50.50#ibcon#read 5, iclass 16, count 0 2006.229.19:24:50.50#ibcon#about to read 6, iclass 16, count 0 2006.229.19:24:50.50#ibcon#read 6, iclass 16, count 0 2006.229.19:24:50.50#ibcon#end of sib2, iclass 16, count 0 2006.229.19:24:50.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:24:50.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:24:50.50#ibcon#[25=USB\r\n] 2006.229.19:24:50.50#ibcon#*before write, iclass 16, count 0 2006.229.19:24:50.50#ibcon#enter sib2, iclass 16, count 0 2006.229.19:24:50.50#ibcon#flushed, iclass 16, count 0 2006.229.19:24:50.50#ibcon#about to write, iclass 16, count 0 2006.229.19:24:50.50#ibcon#wrote, iclass 16, count 0 2006.229.19:24:50.50#ibcon#about to read 3, iclass 16, count 0 2006.229.19:24:50.53#ibcon#read 3, iclass 16, count 0 2006.229.19:24:50.53#ibcon#about to read 4, iclass 16, count 0 2006.229.19:24:50.53#ibcon#read 4, iclass 16, count 0 2006.229.19:24:50.53#ibcon#about to read 5, iclass 16, count 0 2006.229.19:24:50.53#ibcon#read 5, iclass 16, count 0 2006.229.19:24:50.53#ibcon#about to read 6, iclass 16, count 0 2006.229.19:24:50.53#ibcon#read 6, iclass 16, count 0 2006.229.19:24:50.53#ibcon#end of sib2, iclass 16, count 0 2006.229.19:24:50.53#ibcon#*after write, iclass 16, count 0 2006.229.19:24:50.53#ibcon#*before return 0, iclass 16, count 0 2006.229.19:24:50.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:50.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:50.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:24:50.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:24:50.53$vck44/valo=2,534.99 2006.229.19:24:50.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.19:24:50.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.19:24:50.53#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:50.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:50.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:50.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:50.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:24:50.53#ibcon#first serial, iclass 18, count 0 2006.229.19:24:50.53#ibcon#enter sib2, iclass 18, count 0 2006.229.19:24:50.53#ibcon#flushed, iclass 18, count 0 2006.229.19:24:50.53#ibcon#about to write, iclass 18, count 0 2006.229.19:24:50.53#ibcon#wrote, iclass 18, count 0 2006.229.19:24:50.53#ibcon#about to read 3, iclass 18, count 0 2006.229.19:24:50.55#ibcon#read 3, iclass 18, count 0 2006.229.19:24:50.55#ibcon#about to read 4, iclass 18, count 0 2006.229.19:24:50.55#ibcon#read 4, iclass 18, count 0 2006.229.19:24:50.55#ibcon#about to read 5, iclass 18, count 0 2006.229.19:24:50.55#ibcon#read 5, iclass 18, count 0 2006.229.19:24:50.55#ibcon#about to read 6, iclass 18, count 0 2006.229.19:24:50.55#ibcon#read 6, iclass 18, count 0 2006.229.19:24:50.55#ibcon#end of sib2, iclass 18, count 0 2006.229.19:24:50.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:24:50.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:24:50.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:24:50.55#ibcon#*before write, iclass 18, count 0 2006.229.19:24:50.55#ibcon#enter sib2, iclass 18, count 0 2006.229.19:24:50.55#ibcon#flushed, iclass 18, count 0 2006.229.19:24:50.55#ibcon#about to write, iclass 18, count 0 2006.229.19:24:50.55#ibcon#wrote, iclass 18, count 0 2006.229.19:24:50.55#ibcon#about to read 3, iclass 18, count 0 2006.229.19:24:50.59#ibcon#read 3, iclass 18, count 0 2006.229.19:24:50.59#ibcon#about to read 4, iclass 18, count 0 2006.229.19:24:50.59#ibcon#read 4, iclass 18, count 0 2006.229.19:24:50.59#ibcon#about to read 5, iclass 18, count 0 2006.229.19:24:50.59#ibcon#read 5, iclass 18, count 0 2006.229.19:24:50.59#ibcon#about to read 6, iclass 18, count 0 2006.229.19:24:50.59#ibcon#read 6, iclass 18, count 0 2006.229.19:24:50.59#ibcon#end of sib2, iclass 18, count 0 2006.229.19:24:50.59#ibcon#*after write, iclass 18, count 0 2006.229.19:24:50.59#ibcon#*before return 0, iclass 18, count 0 2006.229.19:24:50.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:50.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:50.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:24:50.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:24:50.59$vck44/va=2,7 2006.229.19:24:50.59#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.19:24:50.59#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.19:24:50.59#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:50.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:50.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:50.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:50.65#ibcon#enter wrdev, iclass 20, count 2 2006.229.19:24:50.65#ibcon#first serial, iclass 20, count 2 2006.229.19:24:50.65#ibcon#enter sib2, iclass 20, count 2 2006.229.19:24:50.65#ibcon#flushed, iclass 20, count 2 2006.229.19:24:50.65#ibcon#about to write, iclass 20, count 2 2006.229.19:24:50.65#ibcon#wrote, iclass 20, count 2 2006.229.19:24:50.65#ibcon#about to read 3, iclass 20, count 2 2006.229.19:24:50.67#ibcon#read 3, iclass 20, count 2 2006.229.19:24:50.67#ibcon#about to read 4, iclass 20, count 2 2006.229.19:24:50.67#ibcon#read 4, iclass 20, count 2 2006.229.19:24:50.67#ibcon#about to read 5, iclass 20, count 2 2006.229.19:24:50.67#ibcon#read 5, iclass 20, count 2 2006.229.19:24:50.67#ibcon#about to read 6, iclass 20, count 2 2006.229.19:24:50.67#ibcon#read 6, iclass 20, count 2 2006.229.19:24:50.67#ibcon#end of sib2, iclass 20, count 2 2006.229.19:24:50.67#ibcon#*mode == 0, iclass 20, count 2 2006.229.19:24:50.67#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.19:24:50.67#ibcon#[25=AT02-07\r\n] 2006.229.19:24:50.67#ibcon#*before write, iclass 20, count 2 2006.229.19:24:50.67#ibcon#enter sib2, iclass 20, count 2 2006.229.19:24:50.67#ibcon#flushed, iclass 20, count 2 2006.229.19:24:50.67#ibcon#about to write, iclass 20, count 2 2006.229.19:24:50.67#ibcon#wrote, iclass 20, count 2 2006.229.19:24:50.67#ibcon#about to read 3, iclass 20, count 2 2006.229.19:24:50.70#ibcon#read 3, iclass 20, count 2 2006.229.19:24:50.70#ibcon#about to read 4, iclass 20, count 2 2006.229.19:24:50.70#ibcon#read 4, iclass 20, count 2 2006.229.19:24:50.70#ibcon#about to read 5, iclass 20, count 2 2006.229.19:24:50.70#ibcon#read 5, iclass 20, count 2 2006.229.19:24:50.70#ibcon#about to read 6, iclass 20, count 2 2006.229.19:24:50.70#ibcon#read 6, iclass 20, count 2 2006.229.19:24:50.70#ibcon#end of sib2, iclass 20, count 2 2006.229.19:24:50.70#ibcon#*after write, iclass 20, count 2 2006.229.19:24:50.70#ibcon#*before return 0, iclass 20, count 2 2006.229.19:24:50.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:50.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:50.70#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.19:24:50.70#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:50.70#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:50.82#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:50.82#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:50.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:24:50.82#ibcon#first serial, iclass 20, count 0 2006.229.19:24:50.82#ibcon#enter sib2, iclass 20, count 0 2006.229.19:24:50.82#ibcon#flushed, iclass 20, count 0 2006.229.19:24:50.82#ibcon#about to write, iclass 20, count 0 2006.229.19:24:50.82#ibcon#wrote, iclass 20, count 0 2006.229.19:24:50.82#ibcon#about to read 3, iclass 20, count 0 2006.229.19:24:50.84#ibcon#read 3, iclass 20, count 0 2006.229.19:24:50.84#ibcon#about to read 4, iclass 20, count 0 2006.229.19:24:50.84#ibcon#read 4, iclass 20, count 0 2006.229.19:24:50.84#ibcon#about to read 5, iclass 20, count 0 2006.229.19:24:50.84#ibcon#read 5, iclass 20, count 0 2006.229.19:24:50.84#ibcon#about to read 6, iclass 20, count 0 2006.229.19:24:50.84#ibcon#read 6, iclass 20, count 0 2006.229.19:24:50.84#ibcon#end of sib2, iclass 20, count 0 2006.229.19:24:50.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:24:50.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:24:50.84#ibcon#[25=USB\r\n] 2006.229.19:24:50.84#ibcon#*before write, iclass 20, count 0 2006.229.19:24:50.84#ibcon#enter sib2, iclass 20, count 0 2006.229.19:24:50.84#ibcon#flushed, iclass 20, count 0 2006.229.19:24:50.84#ibcon#about to write, iclass 20, count 0 2006.229.19:24:50.84#ibcon#wrote, iclass 20, count 0 2006.229.19:24:50.84#ibcon#about to read 3, iclass 20, count 0 2006.229.19:24:50.87#ibcon#read 3, iclass 20, count 0 2006.229.19:24:50.87#ibcon#about to read 4, iclass 20, count 0 2006.229.19:24:50.87#ibcon#read 4, iclass 20, count 0 2006.229.19:24:50.87#ibcon#about to read 5, iclass 20, count 0 2006.229.19:24:50.87#ibcon#read 5, iclass 20, count 0 2006.229.19:24:50.87#ibcon#about to read 6, iclass 20, count 0 2006.229.19:24:50.87#ibcon#read 6, iclass 20, count 0 2006.229.19:24:50.87#ibcon#end of sib2, iclass 20, count 0 2006.229.19:24:50.87#ibcon#*after write, iclass 20, count 0 2006.229.19:24:50.87#ibcon#*before return 0, iclass 20, count 0 2006.229.19:24:50.87#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:50.87#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:50.87#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:24:50.87#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:24:50.87$vck44/valo=3,564.99 2006.229.19:24:50.87#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:24:50.87#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:24:50.87#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:50.87#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:50.87#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:50.87#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:50.87#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:24:50.87#ibcon#first serial, iclass 22, count 0 2006.229.19:24:50.87#ibcon#enter sib2, iclass 22, count 0 2006.229.19:24:50.87#ibcon#flushed, iclass 22, count 0 2006.229.19:24:50.87#ibcon#about to write, iclass 22, count 0 2006.229.19:24:50.87#ibcon#wrote, iclass 22, count 0 2006.229.19:24:50.87#ibcon#about to read 3, iclass 22, count 0 2006.229.19:24:50.89#ibcon#read 3, iclass 22, count 0 2006.229.19:24:50.89#ibcon#about to read 4, iclass 22, count 0 2006.229.19:24:50.89#ibcon#read 4, iclass 22, count 0 2006.229.19:24:50.89#ibcon#about to read 5, iclass 22, count 0 2006.229.19:24:50.89#ibcon#read 5, iclass 22, count 0 2006.229.19:24:50.89#ibcon#about to read 6, iclass 22, count 0 2006.229.19:24:50.89#ibcon#read 6, iclass 22, count 0 2006.229.19:24:50.89#ibcon#end of sib2, iclass 22, count 0 2006.229.19:24:50.89#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:24:50.89#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:24:50.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:24:50.89#ibcon#*before write, iclass 22, count 0 2006.229.19:24:50.89#ibcon#enter sib2, iclass 22, count 0 2006.229.19:24:50.89#ibcon#flushed, iclass 22, count 0 2006.229.19:24:50.89#ibcon#about to write, iclass 22, count 0 2006.229.19:24:50.89#ibcon#wrote, iclass 22, count 0 2006.229.19:24:50.89#ibcon#about to read 3, iclass 22, count 0 2006.229.19:24:50.93#ibcon#read 3, iclass 22, count 0 2006.229.19:24:50.93#ibcon#about to read 4, iclass 22, count 0 2006.229.19:24:50.93#ibcon#read 4, iclass 22, count 0 2006.229.19:24:50.93#ibcon#about to read 5, iclass 22, count 0 2006.229.19:24:50.93#ibcon#read 5, iclass 22, count 0 2006.229.19:24:50.93#ibcon#about to read 6, iclass 22, count 0 2006.229.19:24:50.93#ibcon#read 6, iclass 22, count 0 2006.229.19:24:50.93#ibcon#end of sib2, iclass 22, count 0 2006.229.19:24:50.93#ibcon#*after write, iclass 22, count 0 2006.229.19:24:50.93#ibcon#*before return 0, iclass 22, count 0 2006.229.19:24:50.93#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:50.93#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:50.93#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:24:50.93#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:24:50.93$vck44/va=3,6 2006.229.19:24:50.93#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.19:24:50.93#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.19:24:50.93#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:50.93#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:50.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:50.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:50.99#ibcon#enter wrdev, iclass 24, count 2 2006.229.19:24:50.99#ibcon#first serial, iclass 24, count 2 2006.229.19:24:50.99#ibcon#enter sib2, iclass 24, count 2 2006.229.19:24:50.99#ibcon#flushed, iclass 24, count 2 2006.229.19:24:50.99#ibcon#about to write, iclass 24, count 2 2006.229.19:24:50.99#ibcon#wrote, iclass 24, count 2 2006.229.19:24:50.99#ibcon#about to read 3, iclass 24, count 2 2006.229.19:24:51.01#ibcon#read 3, iclass 24, count 2 2006.229.19:24:51.01#ibcon#about to read 4, iclass 24, count 2 2006.229.19:24:51.01#ibcon#read 4, iclass 24, count 2 2006.229.19:24:51.01#ibcon#about to read 5, iclass 24, count 2 2006.229.19:24:51.01#ibcon#read 5, iclass 24, count 2 2006.229.19:24:51.01#ibcon#about to read 6, iclass 24, count 2 2006.229.19:24:51.01#ibcon#read 6, iclass 24, count 2 2006.229.19:24:51.01#ibcon#end of sib2, iclass 24, count 2 2006.229.19:24:51.01#ibcon#*mode == 0, iclass 24, count 2 2006.229.19:24:51.01#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.19:24:51.01#ibcon#[25=AT03-06\r\n] 2006.229.19:24:51.01#ibcon#*before write, iclass 24, count 2 2006.229.19:24:51.01#ibcon#enter sib2, iclass 24, count 2 2006.229.19:24:51.01#ibcon#flushed, iclass 24, count 2 2006.229.19:24:51.01#ibcon#about to write, iclass 24, count 2 2006.229.19:24:51.01#ibcon#wrote, iclass 24, count 2 2006.229.19:24:51.01#ibcon#about to read 3, iclass 24, count 2 2006.229.19:24:51.04#ibcon#read 3, iclass 24, count 2 2006.229.19:24:51.04#ibcon#about to read 4, iclass 24, count 2 2006.229.19:24:51.04#ibcon#read 4, iclass 24, count 2 2006.229.19:24:51.04#ibcon#about to read 5, iclass 24, count 2 2006.229.19:24:51.04#ibcon#read 5, iclass 24, count 2 2006.229.19:24:51.04#ibcon#about to read 6, iclass 24, count 2 2006.229.19:24:51.04#ibcon#read 6, iclass 24, count 2 2006.229.19:24:51.04#ibcon#end of sib2, iclass 24, count 2 2006.229.19:24:51.04#ibcon#*after write, iclass 24, count 2 2006.229.19:24:51.04#ibcon#*before return 0, iclass 24, count 2 2006.229.19:24:51.04#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:51.04#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:51.04#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.19:24:51.04#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:51.04#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:51.16#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:51.16#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:51.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:24:51.16#ibcon#first serial, iclass 24, count 0 2006.229.19:24:51.16#ibcon#enter sib2, iclass 24, count 0 2006.229.19:24:51.16#ibcon#flushed, iclass 24, count 0 2006.229.19:24:51.16#ibcon#about to write, iclass 24, count 0 2006.229.19:24:51.16#ibcon#wrote, iclass 24, count 0 2006.229.19:24:51.16#ibcon#about to read 3, iclass 24, count 0 2006.229.19:24:51.18#ibcon#read 3, iclass 24, count 0 2006.229.19:24:51.18#ibcon#about to read 4, iclass 24, count 0 2006.229.19:24:51.18#ibcon#read 4, iclass 24, count 0 2006.229.19:24:51.18#ibcon#about to read 5, iclass 24, count 0 2006.229.19:24:51.18#ibcon#read 5, iclass 24, count 0 2006.229.19:24:51.18#ibcon#about to read 6, iclass 24, count 0 2006.229.19:24:51.18#ibcon#read 6, iclass 24, count 0 2006.229.19:24:51.18#ibcon#end of sib2, iclass 24, count 0 2006.229.19:24:51.18#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:24:51.18#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:24:51.18#ibcon#[25=USB\r\n] 2006.229.19:24:51.18#ibcon#*before write, iclass 24, count 0 2006.229.19:24:51.18#ibcon#enter sib2, iclass 24, count 0 2006.229.19:24:51.18#ibcon#flushed, iclass 24, count 0 2006.229.19:24:51.18#ibcon#about to write, iclass 24, count 0 2006.229.19:24:51.18#ibcon#wrote, iclass 24, count 0 2006.229.19:24:51.18#ibcon#about to read 3, iclass 24, count 0 2006.229.19:24:51.21#ibcon#read 3, iclass 24, count 0 2006.229.19:24:51.21#ibcon#about to read 4, iclass 24, count 0 2006.229.19:24:51.21#ibcon#read 4, iclass 24, count 0 2006.229.19:24:51.21#ibcon#about to read 5, iclass 24, count 0 2006.229.19:24:51.21#ibcon#read 5, iclass 24, count 0 2006.229.19:24:51.21#ibcon#about to read 6, iclass 24, count 0 2006.229.19:24:51.21#ibcon#read 6, iclass 24, count 0 2006.229.19:24:51.21#ibcon#end of sib2, iclass 24, count 0 2006.229.19:24:51.21#ibcon#*after write, iclass 24, count 0 2006.229.19:24:51.21#ibcon#*before return 0, iclass 24, count 0 2006.229.19:24:51.21#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:51.21#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:51.21#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:24:51.21#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:24:51.21$vck44/valo=4,624.99 2006.229.19:24:51.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.19:24:51.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.19:24:51.21#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:51.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:51.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:51.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:51.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:24:51.21#ibcon#first serial, iclass 26, count 0 2006.229.19:24:51.21#ibcon#enter sib2, iclass 26, count 0 2006.229.19:24:51.21#ibcon#flushed, iclass 26, count 0 2006.229.19:24:51.21#ibcon#about to write, iclass 26, count 0 2006.229.19:24:51.21#ibcon#wrote, iclass 26, count 0 2006.229.19:24:51.21#ibcon#about to read 3, iclass 26, count 0 2006.229.19:24:51.23#ibcon#read 3, iclass 26, count 0 2006.229.19:24:51.23#ibcon#about to read 4, iclass 26, count 0 2006.229.19:24:51.23#ibcon#read 4, iclass 26, count 0 2006.229.19:24:51.23#ibcon#about to read 5, iclass 26, count 0 2006.229.19:24:51.23#ibcon#read 5, iclass 26, count 0 2006.229.19:24:51.23#ibcon#about to read 6, iclass 26, count 0 2006.229.19:24:51.23#ibcon#read 6, iclass 26, count 0 2006.229.19:24:51.23#ibcon#end of sib2, iclass 26, count 0 2006.229.19:24:51.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:24:51.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:24:51.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:24:51.23#ibcon#*before write, iclass 26, count 0 2006.229.19:24:51.23#ibcon#enter sib2, iclass 26, count 0 2006.229.19:24:51.23#ibcon#flushed, iclass 26, count 0 2006.229.19:24:51.23#ibcon#about to write, iclass 26, count 0 2006.229.19:24:51.23#ibcon#wrote, iclass 26, count 0 2006.229.19:24:51.23#ibcon#about to read 3, iclass 26, count 0 2006.229.19:24:51.27#ibcon#read 3, iclass 26, count 0 2006.229.19:24:51.27#ibcon#about to read 4, iclass 26, count 0 2006.229.19:24:51.27#ibcon#read 4, iclass 26, count 0 2006.229.19:24:51.27#ibcon#about to read 5, iclass 26, count 0 2006.229.19:24:51.27#ibcon#read 5, iclass 26, count 0 2006.229.19:24:51.27#ibcon#about to read 6, iclass 26, count 0 2006.229.19:24:51.27#ibcon#read 6, iclass 26, count 0 2006.229.19:24:51.27#ibcon#end of sib2, iclass 26, count 0 2006.229.19:24:51.27#ibcon#*after write, iclass 26, count 0 2006.229.19:24:51.27#ibcon#*before return 0, iclass 26, count 0 2006.229.19:24:51.27#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:51.27#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:51.27#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:24:51.27#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:24:51.27$vck44/va=4,7 2006.229.19:24:51.27#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.19:24:51.27#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.19:24:51.27#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:51.27#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:51.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:51.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:51.33#ibcon#enter wrdev, iclass 28, count 2 2006.229.19:24:51.33#ibcon#first serial, iclass 28, count 2 2006.229.19:24:51.33#ibcon#enter sib2, iclass 28, count 2 2006.229.19:24:51.33#ibcon#flushed, iclass 28, count 2 2006.229.19:24:51.33#ibcon#about to write, iclass 28, count 2 2006.229.19:24:51.33#ibcon#wrote, iclass 28, count 2 2006.229.19:24:51.33#ibcon#about to read 3, iclass 28, count 2 2006.229.19:24:51.35#ibcon#read 3, iclass 28, count 2 2006.229.19:24:51.35#ibcon#about to read 4, iclass 28, count 2 2006.229.19:24:51.35#ibcon#read 4, iclass 28, count 2 2006.229.19:24:51.35#ibcon#about to read 5, iclass 28, count 2 2006.229.19:24:51.35#ibcon#read 5, iclass 28, count 2 2006.229.19:24:51.35#ibcon#about to read 6, iclass 28, count 2 2006.229.19:24:51.35#ibcon#read 6, iclass 28, count 2 2006.229.19:24:51.35#ibcon#end of sib2, iclass 28, count 2 2006.229.19:24:51.35#ibcon#*mode == 0, iclass 28, count 2 2006.229.19:24:51.35#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.19:24:51.35#ibcon#[25=AT04-07\r\n] 2006.229.19:24:51.35#ibcon#*before write, iclass 28, count 2 2006.229.19:24:51.35#ibcon#enter sib2, iclass 28, count 2 2006.229.19:24:51.35#ibcon#flushed, iclass 28, count 2 2006.229.19:24:51.35#ibcon#about to write, iclass 28, count 2 2006.229.19:24:51.35#ibcon#wrote, iclass 28, count 2 2006.229.19:24:51.35#ibcon#about to read 3, iclass 28, count 2 2006.229.19:24:51.38#ibcon#read 3, iclass 28, count 2 2006.229.19:24:51.38#ibcon#about to read 4, iclass 28, count 2 2006.229.19:24:51.38#ibcon#read 4, iclass 28, count 2 2006.229.19:24:51.38#ibcon#about to read 5, iclass 28, count 2 2006.229.19:24:51.38#ibcon#read 5, iclass 28, count 2 2006.229.19:24:51.38#ibcon#about to read 6, iclass 28, count 2 2006.229.19:24:51.38#ibcon#read 6, iclass 28, count 2 2006.229.19:24:51.38#ibcon#end of sib2, iclass 28, count 2 2006.229.19:24:51.38#ibcon#*after write, iclass 28, count 2 2006.229.19:24:51.38#ibcon#*before return 0, iclass 28, count 2 2006.229.19:24:51.38#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:51.38#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:51.38#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.19:24:51.38#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:51.38#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:51.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:51.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:51.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:24:51.50#ibcon#first serial, iclass 28, count 0 2006.229.19:24:51.50#ibcon#enter sib2, iclass 28, count 0 2006.229.19:24:51.50#ibcon#flushed, iclass 28, count 0 2006.229.19:24:51.50#ibcon#about to write, iclass 28, count 0 2006.229.19:24:51.50#ibcon#wrote, iclass 28, count 0 2006.229.19:24:51.50#ibcon#about to read 3, iclass 28, count 0 2006.229.19:24:51.52#ibcon#read 3, iclass 28, count 0 2006.229.19:24:51.52#ibcon#about to read 4, iclass 28, count 0 2006.229.19:24:51.52#ibcon#read 4, iclass 28, count 0 2006.229.19:24:51.52#ibcon#about to read 5, iclass 28, count 0 2006.229.19:24:51.52#ibcon#read 5, iclass 28, count 0 2006.229.19:24:51.52#ibcon#about to read 6, iclass 28, count 0 2006.229.19:24:51.52#ibcon#read 6, iclass 28, count 0 2006.229.19:24:51.52#ibcon#end of sib2, iclass 28, count 0 2006.229.19:24:51.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:24:51.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:24:51.52#ibcon#[25=USB\r\n] 2006.229.19:24:51.52#ibcon#*before write, iclass 28, count 0 2006.229.19:24:51.52#ibcon#enter sib2, iclass 28, count 0 2006.229.19:24:51.52#ibcon#flushed, iclass 28, count 0 2006.229.19:24:51.52#ibcon#about to write, iclass 28, count 0 2006.229.19:24:51.52#ibcon#wrote, iclass 28, count 0 2006.229.19:24:51.52#ibcon#about to read 3, iclass 28, count 0 2006.229.19:24:51.55#ibcon#read 3, iclass 28, count 0 2006.229.19:24:51.55#ibcon#about to read 4, iclass 28, count 0 2006.229.19:24:51.55#ibcon#read 4, iclass 28, count 0 2006.229.19:24:51.55#ibcon#about to read 5, iclass 28, count 0 2006.229.19:24:51.55#ibcon#read 5, iclass 28, count 0 2006.229.19:24:51.55#ibcon#about to read 6, iclass 28, count 0 2006.229.19:24:51.55#ibcon#read 6, iclass 28, count 0 2006.229.19:24:51.55#ibcon#end of sib2, iclass 28, count 0 2006.229.19:24:51.55#ibcon#*after write, iclass 28, count 0 2006.229.19:24:51.55#ibcon#*before return 0, iclass 28, count 0 2006.229.19:24:51.55#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:51.55#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:51.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:24:51.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:24:51.55$vck44/valo=5,734.99 2006.229.19:24:51.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.19:24:51.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.19:24:51.55#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:51.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:51.55#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:51.55#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:51.55#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:24:51.55#ibcon#first serial, iclass 30, count 0 2006.229.19:24:51.55#ibcon#enter sib2, iclass 30, count 0 2006.229.19:24:51.55#ibcon#flushed, iclass 30, count 0 2006.229.19:24:51.55#ibcon#about to write, iclass 30, count 0 2006.229.19:24:51.55#ibcon#wrote, iclass 30, count 0 2006.229.19:24:51.55#ibcon#about to read 3, iclass 30, count 0 2006.229.19:24:51.57#ibcon#read 3, iclass 30, count 0 2006.229.19:24:51.57#ibcon#about to read 4, iclass 30, count 0 2006.229.19:24:51.57#ibcon#read 4, iclass 30, count 0 2006.229.19:24:51.57#ibcon#about to read 5, iclass 30, count 0 2006.229.19:24:51.57#ibcon#read 5, iclass 30, count 0 2006.229.19:24:51.57#ibcon#about to read 6, iclass 30, count 0 2006.229.19:24:51.57#ibcon#read 6, iclass 30, count 0 2006.229.19:24:51.57#ibcon#end of sib2, iclass 30, count 0 2006.229.19:24:51.57#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:24:51.57#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:24:51.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:24:51.57#ibcon#*before write, iclass 30, count 0 2006.229.19:24:51.57#ibcon#enter sib2, iclass 30, count 0 2006.229.19:24:51.57#ibcon#flushed, iclass 30, count 0 2006.229.19:24:51.57#ibcon#about to write, iclass 30, count 0 2006.229.19:24:51.57#ibcon#wrote, iclass 30, count 0 2006.229.19:24:51.57#ibcon#about to read 3, iclass 30, count 0 2006.229.19:24:51.61#ibcon#read 3, iclass 30, count 0 2006.229.19:24:51.61#ibcon#about to read 4, iclass 30, count 0 2006.229.19:24:51.61#ibcon#read 4, iclass 30, count 0 2006.229.19:24:51.61#ibcon#about to read 5, iclass 30, count 0 2006.229.19:24:51.61#ibcon#read 5, iclass 30, count 0 2006.229.19:24:51.61#ibcon#about to read 6, iclass 30, count 0 2006.229.19:24:51.61#ibcon#read 6, iclass 30, count 0 2006.229.19:24:51.61#ibcon#end of sib2, iclass 30, count 0 2006.229.19:24:51.61#ibcon#*after write, iclass 30, count 0 2006.229.19:24:51.61#ibcon#*before return 0, iclass 30, count 0 2006.229.19:24:51.61#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:51.61#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:51.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:24:51.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:24:51.61$vck44/va=5,4 2006.229.19:24:51.61#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.19:24:51.61#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.19:24:51.61#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:51.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:51.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:51.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:51.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.19:24:51.67#ibcon#first serial, iclass 32, count 2 2006.229.19:24:51.67#ibcon#enter sib2, iclass 32, count 2 2006.229.19:24:51.67#ibcon#flushed, iclass 32, count 2 2006.229.19:24:51.67#ibcon#about to write, iclass 32, count 2 2006.229.19:24:51.67#ibcon#wrote, iclass 32, count 2 2006.229.19:24:51.67#ibcon#about to read 3, iclass 32, count 2 2006.229.19:24:51.69#ibcon#read 3, iclass 32, count 2 2006.229.19:24:51.69#ibcon#about to read 4, iclass 32, count 2 2006.229.19:24:51.69#ibcon#read 4, iclass 32, count 2 2006.229.19:24:51.69#ibcon#about to read 5, iclass 32, count 2 2006.229.19:24:51.69#ibcon#read 5, iclass 32, count 2 2006.229.19:24:51.69#ibcon#about to read 6, iclass 32, count 2 2006.229.19:24:51.69#ibcon#read 6, iclass 32, count 2 2006.229.19:24:51.69#ibcon#end of sib2, iclass 32, count 2 2006.229.19:24:51.69#ibcon#*mode == 0, iclass 32, count 2 2006.229.19:24:51.69#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.19:24:51.69#ibcon#[25=AT05-04\r\n] 2006.229.19:24:51.69#ibcon#*before write, iclass 32, count 2 2006.229.19:24:51.69#ibcon#enter sib2, iclass 32, count 2 2006.229.19:24:51.69#ibcon#flushed, iclass 32, count 2 2006.229.19:24:51.69#ibcon#about to write, iclass 32, count 2 2006.229.19:24:51.69#ibcon#wrote, iclass 32, count 2 2006.229.19:24:51.69#ibcon#about to read 3, iclass 32, count 2 2006.229.19:24:51.72#ibcon#read 3, iclass 32, count 2 2006.229.19:24:51.72#ibcon#about to read 4, iclass 32, count 2 2006.229.19:24:51.72#ibcon#read 4, iclass 32, count 2 2006.229.19:24:51.72#ibcon#about to read 5, iclass 32, count 2 2006.229.19:24:51.72#ibcon#read 5, iclass 32, count 2 2006.229.19:24:51.72#ibcon#about to read 6, iclass 32, count 2 2006.229.19:24:51.72#ibcon#read 6, iclass 32, count 2 2006.229.19:24:51.72#ibcon#end of sib2, iclass 32, count 2 2006.229.19:24:51.72#ibcon#*after write, iclass 32, count 2 2006.229.19:24:51.72#ibcon#*before return 0, iclass 32, count 2 2006.229.19:24:51.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:51.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:51.72#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.19:24:51.72#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:51.72#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:51.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:51.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:51.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:24:51.84#ibcon#first serial, iclass 32, count 0 2006.229.19:24:51.84#ibcon#enter sib2, iclass 32, count 0 2006.229.19:24:51.84#ibcon#flushed, iclass 32, count 0 2006.229.19:24:51.84#ibcon#about to write, iclass 32, count 0 2006.229.19:24:51.84#ibcon#wrote, iclass 32, count 0 2006.229.19:24:51.84#ibcon#about to read 3, iclass 32, count 0 2006.229.19:24:51.86#ibcon#read 3, iclass 32, count 0 2006.229.19:24:51.86#ibcon#about to read 4, iclass 32, count 0 2006.229.19:24:51.86#ibcon#read 4, iclass 32, count 0 2006.229.19:24:51.86#ibcon#about to read 5, iclass 32, count 0 2006.229.19:24:51.86#ibcon#read 5, iclass 32, count 0 2006.229.19:24:51.86#ibcon#about to read 6, iclass 32, count 0 2006.229.19:24:51.86#ibcon#read 6, iclass 32, count 0 2006.229.19:24:51.86#ibcon#end of sib2, iclass 32, count 0 2006.229.19:24:51.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:24:51.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:24:51.86#ibcon#[25=USB\r\n] 2006.229.19:24:51.86#ibcon#*before write, iclass 32, count 0 2006.229.19:24:51.86#ibcon#enter sib2, iclass 32, count 0 2006.229.19:24:51.86#ibcon#flushed, iclass 32, count 0 2006.229.19:24:51.86#ibcon#about to write, iclass 32, count 0 2006.229.19:24:51.86#ibcon#wrote, iclass 32, count 0 2006.229.19:24:51.86#ibcon#about to read 3, iclass 32, count 0 2006.229.19:24:51.89#ibcon#read 3, iclass 32, count 0 2006.229.19:24:51.89#ibcon#about to read 4, iclass 32, count 0 2006.229.19:24:51.89#ibcon#read 4, iclass 32, count 0 2006.229.19:24:51.89#ibcon#about to read 5, iclass 32, count 0 2006.229.19:24:51.89#ibcon#read 5, iclass 32, count 0 2006.229.19:24:51.89#ibcon#about to read 6, iclass 32, count 0 2006.229.19:24:51.89#ibcon#read 6, iclass 32, count 0 2006.229.19:24:51.89#ibcon#end of sib2, iclass 32, count 0 2006.229.19:24:51.89#ibcon#*after write, iclass 32, count 0 2006.229.19:24:51.89#ibcon#*before return 0, iclass 32, count 0 2006.229.19:24:51.89#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:51.89#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:51.89#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:24:51.89#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:24:51.89$vck44/valo=6,814.99 2006.229.19:24:51.89#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.19:24:51.89#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.19:24:51.89#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:51.89#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:51.89#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:51.89#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:51.89#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:24:51.89#ibcon#first serial, iclass 34, count 0 2006.229.19:24:51.89#ibcon#enter sib2, iclass 34, count 0 2006.229.19:24:51.89#ibcon#flushed, iclass 34, count 0 2006.229.19:24:51.89#ibcon#about to write, iclass 34, count 0 2006.229.19:24:51.89#ibcon#wrote, iclass 34, count 0 2006.229.19:24:51.89#ibcon#about to read 3, iclass 34, count 0 2006.229.19:24:51.91#ibcon#read 3, iclass 34, count 0 2006.229.19:24:51.91#ibcon#about to read 4, iclass 34, count 0 2006.229.19:24:51.91#ibcon#read 4, iclass 34, count 0 2006.229.19:24:51.91#ibcon#about to read 5, iclass 34, count 0 2006.229.19:24:51.91#ibcon#read 5, iclass 34, count 0 2006.229.19:24:51.91#ibcon#about to read 6, iclass 34, count 0 2006.229.19:24:51.91#ibcon#read 6, iclass 34, count 0 2006.229.19:24:51.91#ibcon#end of sib2, iclass 34, count 0 2006.229.19:24:51.91#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:24:51.91#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:24:51.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:24:51.91#ibcon#*before write, iclass 34, count 0 2006.229.19:24:51.91#ibcon#enter sib2, iclass 34, count 0 2006.229.19:24:51.91#ibcon#flushed, iclass 34, count 0 2006.229.19:24:51.91#ibcon#about to write, iclass 34, count 0 2006.229.19:24:51.91#ibcon#wrote, iclass 34, count 0 2006.229.19:24:51.91#ibcon#about to read 3, iclass 34, count 0 2006.229.19:24:51.95#ibcon#read 3, iclass 34, count 0 2006.229.19:24:51.95#ibcon#about to read 4, iclass 34, count 0 2006.229.19:24:51.95#ibcon#read 4, iclass 34, count 0 2006.229.19:24:51.95#ibcon#about to read 5, iclass 34, count 0 2006.229.19:24:51.95#ibcon#read 5, iclass 34, count 0 2006.229.19:24:51.95#ibcon#about to read 6, iclass 34, count 0 2006.229.19:24:51.95#ibcon#read 6, iclass 34, count 0 2006.229.19:24:51.95#ibcon#end of sib2, iclass 34, count 0 2006.229.19:24:51.95#ibcon#*after write, iclass 34, count 0 2006.229.19:24:51.95#ibcon#*before return 0, iclass 34, count 0 2006.229.19:24:51.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:51.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:51.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:24:51.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:24:51.95$vck44/va=6,4 2006.229.19:24:51.95#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.19:24:51.95#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.19:24:51.95#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:51.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:52.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:52.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:52.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.19:24:52.01#ibcon#first serial, iclass 36, count 2 2006.229.19:24:52.01#ibcon#enter sib2, iclass 36, count 2 2006.229.19:24:52.01#ibcon#flushed, iclass 36, count 2 2006.229.19:24:52.01#ibcon#about to write, iclass 36, count 2 2006.229.19:24:52.01#ibcon#wrote, iclass 36, count 2 2006.229.19:24:52.01#ibcon#about to read 3, iclass 36, count 2 2006.229.19:24:52.03#ibcon#read 3, iclass 36, count 2 2006.229.19:24:52.03#ibcon#about to read 4, iclass 36, count 2 2006.229.19:24:52.03#ibcon#read 4, iclass 36, count 2 2006.229.19:24:52.03#ibcon#about to read 5, iclass 36, count 2 2006.229.19:24:52.03#ibcon#read 5, iclass 36, count 2 2006.229.19:24:52.03#ibcon#about to read 6, iclass 36, count 2 2006.229.19:24:52.03#ibcon#read 6, iclass 36, count 2 2006.229.19:24:52.03#ibcon#end of sib2, iclass 36, count 2 2006.229.19:24:52.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.19:24:52.03#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.19:24:52.03#ibcon#[25=AT06-04\r\n] 2006.229.19:24:52.03#ibcon#*before write, iclass 36, count 2 2006.229.19:24:52.03#ibcon#enter sib2, iclass 36, count 2 2006.229.19:24:52.03#ibcon#flushed, iclass 36, count 2 2006.229.19:24:52.03#ibcon#about to write, iclass 36, count 2 2006.229.19:24:52.03#ibcon#wrote, iclass 36, count 2 2006.229.19:24:52.03#ibcon#about to read 3, iclass 36, count 2 2006.229.19:24:52.06#ibcon#read 3, iclass 36, count 2 2006.229.19:24:52.06#ibcon#about to read 4, iclass 36, count 2 2006.229.19:24:52.06#ibcon#read 4, iclass 36, count 2 2006.229.19:24:52.06#ibcon#about to read 5, iclass 36, count 2 2006.229.19:24:52.06#ibcon#read 5, iclass 36, count 2 2006.229.19:24:52.06#ibcon#about to read 6, iclass 36, count 2 2006.229.19:24:52.06#ibcon#read 6, iclass 36, count 2 2006.229.19:24:52.06#ibcon#end of sib2, iclass 36, count 2 2006.229.19:24:52.06#ibcon#*after write, iclass 36, count 2 2006.229.19:24:52.06#ibcon#*before return 0, iclass 36, count 2 2006.229.19:24:52.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:52.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:52.06#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.19:24:52.06#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:52.06#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:52.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:52.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:52.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:24:52.18#ibcon#first serial, iclass 36, count 0 2006.229.19:24:52.18#ibcon#enter sib2, iclass 36, count 0 2006.229.19:24:52.18#ibcon#flushed, iclass 36, count 0 2006.229.19:24:52.18#ibcon#about to write, iclass 36, count 0 2006.229.19:24:52.18#ibcon#wrote, iclass 36, count 0 2006.229.19:24:52.18#ibcon#about to read 3, iclass 36, count 0 2006.229.19:24:52.20#ibcon#read 3, iclass 36, count 0 2006.229.19:24:52.20#ibcon#about to read 4, iclass 36, count 0 2006.229.19:24:52.20#ibcon#read 4, iclass 36, count 0 2006.229.19:24:52.20#ibcon#about to read 5, iclass 36, count 0 2006.229.19:24:52.20#ibcon#read 5, iclass 36, count 0 2006.229.19:24:52.20#ibcon#about to read 6, iclass 36, count 0 2006.229.19:24:52.20#ibcon#read 6, iclass 36, count 0 2006.229.19:24:52.20#ibcon#end of sib2, iclass 36, count 0 2006.229.19:24:52.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:24:52.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:24:52.20#ibcon#[25=USB\r\n] 2006.229.19:24:52.20#ibcon#*before write, iclass 36, count 0 2006.229.19:24:52.20#ibcon#enter sib2, iclass 36, count 0 2006.229.19:24:52.20#ibcon#flushed, iclass 36, count 0 2006.229.19:24:52.20#ibcon#about to write, iclass 36, count 0 2006.229.19:24:52.20#ibcon#wrote, iclass 36, count 0 2006.229.19:24:52.20#ibcon#about to read 3, iclass 36, count 0 2006.229.19:24:52.23#ibcon#read 3, iclass 36, count 0 2006.229.19:24:52.23#ibcon#about to read 4, iclass 36, count 0 2006.229.19:24:52.23#ibcon#read 4, iclass 36, count 0 2006.229.19:24:52.23#ibcon#about to read 5, iclass 36, count 0 2006.229.19:24:52.23#ibcon#read 5, iclass 36, count 0 2006.229.19:24:52.23#ibcon#about to read 6, iclass 36, count 0 2006.229.19:24:52.23#ibcon#read 6, iclass 36, count 0 2006.229.19:24:52.23#ibcon#end of sib2, iclass 36, count 0 2006.229.19:24:52.23#ibcon#*after write, iclass 36, count 0 2006.229.19:24:52.23#ibcon#*before return 0, iclass 36, count 0 2006.229.19:24:52.23#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:52.23#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:52.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:24:52.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:24:52.23$vck44/valo=7,864.99 2006.229.19:24:52.23#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:24:52.23#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:24:52.23#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:52.23#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:52.23#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:52.23#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:52.23#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:24:52.23#ibcon#first serial, iclass 38, count 0 2006.229.19:24:52.23#ibcon#enter sib2, iclass 38, count 0 2006.229.19:24:52.23#ibcon#flushed, iclass 38, count 0 2006.229.19:24:52.23#ibcon#about to write, iclass 38, count 0 2006.229.19:24:52.23#ibcon#wrote, iclass 38, count 0 2006.229.19:24:52.23#ibcon#about to read 3, iclass 38, count 0 2006.229.19:24:52.25#ibcon#read 3, iclass 38, count 0 2006.229.19:24:52.25#ibcon#about to read 4, iclass 38, count 0 2006.229.19:24:52.25#ibcon#read 4, iclass 38, count 0 2006.229.19:24:52.25#ibcon#about to read 5, iclass 38, count 0 2006.229.19:24:52.25#ibcon#read 5, iclass 38, count 0 2006.229.19:24:52.25#ibcon#about to read 6, iclass 38, count 0 2006.229.19:24:52.25#ibcon#read 6, iclass 38, count 0 2006.229.19:24:52.25#ibcon#end of sib2, iclass 38, count 0 2006.229.19:24:52.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:24:52.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:24:52.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:24:52.25#ibcon#*before write, iclass 38, count 0 2006.229.19:24:52.25#ibcon#enter sib2, iclass 38, count 0 2006.229.19:24:52.25#ibcon#flushed, iclass 38, count 0 2006.229.19:24:52.25#ibcon#about to write, iclass 38, count 0 2006.229.19:24:52.25#ibcon#wrote, iclass 38, count 0 2006.229.19:24:52.25#ibcon#about to read 3, iclass 38, count 0 2006.229.19:24:52.29#ibcon#read 3, iclass 38, count 0 2006.229.19:24:52.29#ibcon#about to read 4, iclass 38, count 0 2006.229.19:24:52.29#ibcon#read 4, iclass 38, count 0 2006.229.19:24:52.29#ibcon#about to read 5, iclass 38, count 0 2006.229.19:24:52.29#ibcon#read 5, iclass 38, count 0 2006.229.19:24:52.29#ibcon#about to read 6, iclass 38, count 0 2006.229.19:24:52.29#ibcon#read 6, iclass 38, count 0 2006.229.19:24:52.29#ibcon#end of sib2, iclass 38, count 0 2006.229.19:24:52.29#ibcon#*after write, iclass 38, count 0 2006.229.19:24:52.29#ibcon#*before return 0, iclass 38, count 0 2006.229.19:24:52.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:52.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:52.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:24:52.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:24:52.29$vck44/va=7,5 2006.229.19:24:52.29#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.19:24:52.29#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.19:24:52.29#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:52.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:52.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:52.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:52.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.19:24:52.35#ibcon#first serial, iclass 40, count 2 2006.229.19:24:52.35#ibcon#enter sib2, iclass 40, count 2 2006.229.19:24:52.35#ibcon#flushed, iclass 40, count 2 2006.229.19:24:52.35#ibcon#about to write, iclass 40, count 2 2006.229.19:24:52.35#ibcon#wrote, iclass 40, count 2 2006.229.19:24:52.35#ibcon#about to read 3, iclass 40, count 2 2006.229.19:24:52.37#ibcon#read 3, iclass 40, count 2 2006.229.19:24:52.37#ibcon#about to read 4, iclass 40, count 2 2006.229.19:24:52.37#ibcon#read 4, iclass 40, count 2 2006.229.19:24:52.37#ibcon#about to read 5, iclass 40, count 2 2006.229.19:24:52.37#ibcon#read 5, iclass 40, count 2 2006.229.19:24:52.37#ibcon#about to read 6, iclass 40, count 2 2006.229.19:24:52.37#ibcon#read 6, iclass 40, count 2 2006.229.19:24:52.37#ibcon#end of sib2, iclass 40, count 2 2006.229.19:24:52.37#ibcon#*mode == 0, iclass 40, count 2 2006.229.19:24:52.37#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.19:24:52.37#ibcon#[25=AT07-05\r\n] 2006.229.19:24:52.37#ibcon#*before write, iclass 40, count 2 2006.229.19:24:52.37#ibcon#enter sib2, iclass 40, count 2 2006.229.19:24:52.37#ibcon#flushed, iclass 40, count 2 2006.229.19:24:52.37#ibcon#about to write, iclass 40, count 2 2006.229.19:24:52.37#ibcon#wrote, iclass 40, count 2 2006.229.19:24:52.37#ibcon#about to read 3, iclass 40, count 2 2006.229.19:24:52.40#ibcon#read 3, iclass 40, count 2 2006.229.19:24:52.40#ibcon#about to read 4, iclass 40, count 2 2006.229.19:24:52.40#ibcon#read 4, iclass 40, count 2 2006.229.19:24:52.40#ibcon#about to read 5, iclass 40, count 2 2006.229.19:24:52.40#ibcon#read 5, iclass 40, count 2 2006.229.19:24:52.40#ibcon#about to read 6, iclass 40, count 2 2006.229.19:24:52.40#ibcon#read 6, iclass 40, count 2 2006.229.19:24:52.40#ibcon#end of sib2, iclass 40, count 2 2006.229.19:24:52.40#ibcon#*after write, iclass 40, count 2 2006.229.19:24:52.40#ibcon#*before return 0, iclass 40, count 2 2006.229.19:24:52.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:52.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:52.40#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.19:24:52.40#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:52.40#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:52.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:52.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:52.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:24:52.52#ibcon#first serial, iclass 40, count 0 2006.229.19:24:52.52#ibcon#enter sib2, iclass 40, count 0 2006.229.19:24:52.52#ibcon#flushed, iclass 40, count 0 2006.229.19:24:52.52#ibcon#about to write, iclass 40, count 0 2006.229.19:24:52.52#ibcon#wrote, iclass 40, count 0 2006.229.19:24:52.52#ibcon#about to read 3, iclass 40, count 0 2006.229.19:24:52.54#ibcon#read 3, iclass 40, count 0 2006.229.19:24:52.54#ibcon#about to read 4, iclass 40, count 0 2006.229.19:24:52.54#ibcon#read 4, iclass 40, count 0 2006.229.19:24:52.54#ibcon#about to read 5, iclass 40, count 0 2006.229.19:24:52.54#ibcon#read 5, iclass 40, count 0 2006.229.19:24:52.54#ibcon#about to read 6, iclass 40, count 0 2006.229.19:24:52.54#ibcon#read 6, iclass 40, count 0 2006.229.19:24:52.54#ibcon#end of sib2, iclass 40, count 0 2006.229.19:24:52.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:24:52.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:24:52.54#ibcon#[25=USB\r\n] 2006.229.19:24:52.54#ibcon#*before write, iclass 40, count 0 2006.229.19:24:52.54#ibcon#enter sib2, iclass 40, count 0 2006.229.19:24:52.54#ibcon#flushed, iclass 40, count 0 2006.229.19:24:52.54#ibcon#about to write, iclass 40, count 0 2006.229.19:24:52.54#ibcon#wrote, iclass 40, count 0 2006.229.19:24:52.54#ibcon#about to read 3, iclass 40, count 0 2006.229.19:24:52.57#ibcon#read 3, iclass 40, count 0 2006.229.19:24:52.57#ibcon#about to read 4, iclass 40, count 0 2006.229.19:24:52.57#ibcon#read 4, iclass 40, count 0 2006.229.19:24:52.57#ibcon#about to read 5, iclass 40, count 0 2006.229.19:24:52.57#ibcon#read 5, iclass 40, count 0 2006.229.19:24:52.57#ibcon#about to read 6, iclass 40, count 0 2006.229.19:24:52.57#ibcon#read 6, iclass 40, count 0 2006.229.19:24:52.57#ibcon#end of sib2, iclass 40, count 0 2006.229.19:24:52.57#ibcon#*after write, iclass 40, count 0 2006.229.19:24:52.57#ibcon#*before return 0, iclass 40, count 0 2006.229.19:24:52.57#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:52.57#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:52.57#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:24:52.57#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:24:52.57$vck44/valo=8,884.99 2006.229.19:24:52.57#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.19:24:52.57#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.19:24:52.57#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:52.57#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:52.57#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:52.57#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:52.57#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:24:52.57#ibcon#first serial, iclass 4, count 0 2006.229.19:24:52.57#ibcon#enter sib2, iclass 4, count 0 2006.229.19:24:52.57#ibcon#flushed, iclass 4, count 0 2006.229.19:24:52.57#ibcon#about to write, iclass 4, count 0 2006.229.19:24:52.57#ibcon#wrote, iclass 4, count 0 2006.229.19:24:52.57#ibcon#about to read 3, iclass 4, count 0 2006.229.19:24:52.59#ibcon#read 3, iclass 4, count 0 2006.229.19:24:52.59#ibcon#about to read 4, iclass 4, count 0 2006.229.19:24:52.59#ibcon#read 4, iclass 4, count 0 2006.229.19:24:52.59#ibcon#about to read 5, iclass 4, count 0 2006.229.19:24:52.59#ibcon#read 5, iclass 4, count 0 2006.229.19:24:52.59#ibcon#about to read 6, iclass 4, count 0 2006.229.19:24:52.59#ibcon#read 6, iclass 4, count 0 2006.229.19:24:52.59#ibcon#end of sib2, iclass 4, count 0 2006.229.19:24:52.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:24:52.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:24:52.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:24:52.59#ibcon#*before write, iclass 4, count 0 2006.229.19:24:52.59#ibcon#enter sib2, iclass 4, count 0 2006.229.19:24:52.59#ibcon#flushed, iclass 4, count 0 2006.229.19:24:52.59#ibcon#about to write, iclass 4, count 0 2006.229.19:24:52.59#ibcon#wrote, iclass 4, count 0 2006.229.19:24:52.59#ibcon#about to read 3, iclass 4, count 0 2006.229.19:24:52.63#ibcon#read 3, iclass 4, count 0 2006.229.19:24:52.63#ibcon#about to read 4, iclass 4, count 0 2006.229.19:24:52.63#ibcon#read 4, iclass 4, count 0 2006.229.19:24:52.63#ibcon#about to read 5, iclass 4, count 0 2006.229.19:24:52.63#ibcon#read 5, iclass 4, count 0 2006.229.19:24:52.63#ibcon#about to read 6, iclass 4, count 0 2006.229.19:24:52.63#ibcon#read 6, iclass 4, count 0 2006.229.19:24:52.63#ibcon#end of sib2, iclass 4, count 0 2006.229.19:24:52.63#ibcon#*after write, iclass 4, count 0 2006.229.19:24:52.63#ibcon#*before return 0, iclass 4, count 0 2006.229.19:24:52.63#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:52.63#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:52.63#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:24:52.63#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:24:52.63$vck44/va=8,6 2006.229.19:24:52.63#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.19:24:52.63#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.19:24:52.63#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:52.63#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:24:52.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:24:52.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:24:52.69#ibcon#enter wrdev, iclass 6, count 2 2006.229.19:24:52.69#ibcon#first serial, iclass 6, count 2 2006.229.19:24:52.69#ibcon#enter sib2, iclass 6, count 2 2006.229.19:24:52.69#ibcon#flushed, iclass 6, count 2 2006.229.19:24:52.69#ibcon#about to write, iclass 6, count 2 2006.229.19:24:52.69#ibcon#wrote, iclass 6, count 2 2006.229.19:24:52.69#ibcon#about to read 3, iclass 6, count 2 2006.229.19:24:52.71#ibcon#read 3, iclass 6, count 2 2006.229.19:24:52.71#ibcon#about to read 4, iclass 6, count 2 2006.229.19:24:52.71#ibcon#read 4, iclass 6, count 2 2006.229.19:24:52.71#ibcon#about to read 5, iclass 6, count 2 2006.229.19:24:52.71#ibcon#read 5, iclass 6, count 2 2006.229.19:24:52.71#ibcon#about to read 6, iclass 6, count 2 2006.229.19:24:52.71#ibcon#read 6, iclass 6, count 2 2006.229.19:24:52.71#ibcon#end of sib2, iclass 6, count 2 2006.229.19:24:52.71#ibcon#*mode == 0, iclass 6, count 2 2006.229.19:24:52.71#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.19:24:52.71#ibcon#[25=AT08-06\r\n] 2006.229.19:24:52.71#ibcon#*before write, iclass 6, count 2 2006.229.19:24:52.71#ibcon#enter sib2, iclass 6, count 2 2006.229.19:24:52.71#ibcon#flushed, iclass 6, count 2 2006.229.19:24:52.71#ibcon#about to write, iclass 6, count 2 2006.229.19:24:52.71#ibcon#wrote, iclass 6, count 2 2006.229.19:24:52.71#ibcon#about to read 3, iclass 6, count 2 2006.229.19:24:52.74#ibcon#read 3, iclass 6, count 2 2006.229.19:24:52.74#ibcon#about to read 4, iclass 6, count 2 2006.229.19:24:52.74#ibcon#read 4, iclass 6, count 2 2006.229.19:24:52.74#ibcon#about to read 5, iclass 6, count 2 2006.229.19:24:52.74#ibcon#read 5, iclass 6, count 2 2006.229.19:24:52.74#ibcon#about to read 6, iclass 6, count 2 2006.229.19:24:52.74#ibcon#read 6, iclass 6, count 2 2006.229.19:24:52.74#ibcon#end of sib2, iclass 6, count 2 2006.229.19:24:52.74#ibcon#*after write, iclass 6, count 2 2006.229.19:24:52.74#ibcon#*before return 0, iclass 6, count 2 2006.229.19:24:52.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:24:52.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:24:52.74#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.19:24:52.74#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:52.74#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:24:52.86#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:24:52.86#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:24:52.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:24:52.86#ibcon#first serial, iclass 6, count 0 2006.229.19:24:52.86#ibcon#enter sib2, iclass 6, count 0 2006.229.19:24:52.86#ibcon#flushed, iclass 6, count 0 2006.229.19:24:52.86#ibcon#about to write, iclass 6, count 0 2006.229.19:24:52.86#ibcon#wrote, iclass 6, count 0 2006.229.19:24:52.86#ibcon#about to read 3, iclass 6, count 0 2006.229.19:24:52.88#ibcon#read 3, iclass 6, count 0 2006.229.19:24:52.88#ibcon#about to read 4, iclass 6, count 0 2006.229.19:24:52.88#ibcon#read 4, iclass 6, count 0 2006.229.19:24:52.88#ibcon#about to read 5, iclass 6, count 0 2006.229.19:24:52.88#ibcon#read 5, iclass 6, count 0 2006.229.19:24:52.88#ibcon#about to read 6, iclass 6, count 0 2006.229.19:24:52.88#ibcon#read 6, iclass 6, count 0 2006.229.19:24:52.88#ibcon#end of sib2, iclass 6, count 0 2006.229.19:24:52.88#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:24:52.88#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:24:52.88#ibcon#[25=USB\r\n] 2006.229.19:24:52.88#ibcon#*before write, iclass 6, count 0 2006.229.19:24:52.88#ibcon#enter sib2, iclass 6, count 0 2006.229.19:24:52.88#ibcon#flushed, iclass 6, count 0 2006.229.19:24:52.88#ibcon#about to write, iclass 6, count 0 2006.229.19:24:52.88#ibcon#wrote, iclass 6, count 0 2006.229.19:24:52.88#ibcon#about to read 3, iclass 6, count 0 2006.229.19:24:52.91#ibcon#read 3, iclass 6, count 0 2006.229.19:24:52.91#ibcon#about to read 4, iclass 6, count 0 2006.229.19:24:52.91#ibcon#read 4, iclass 6, count 0 2006.229.19:24:52.91#ibcon#about to read 5, iclass 6, count 0 2006.229.19:24:52.91#ibcon#read 5, iclass 6, count 0 2006.229.19:24:52.91#ibcon#about to read 6, iclass 6, count 0 2006.229.19:24:52.91#ibcon#read 6, iclass 6, count 0 2006.229.19:24:52.91#ibcon#end of sib2, iclass 6, count 0 2006.229.19:24:52.91#ibcon#*after write, iclass 6, count 0 2006.229.19:24:52.91#ibcon#*before return 0, iclass 6, count 0 2006.229.19:24:52.91#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:24:52.91#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:24:52.91#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:24:52.91#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:24:52.91$vck44/vblo=1,629.99 2006.229.19:24:52.91#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.19:24:52.91#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.19:24:52.91#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:52.91#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:24:52.91#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:24:52.91#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:24:52.91#ibcon#enter wrdev, iclass 10, count 0 2006.229.19:24:52.91#ibcon#first serial, iclass 10, count 0 2006.229.19:24:52.91#ibcon#enter sib2, iclass 10, count 0 2006.229.19:24:52.91#ibcon#flushed, iclass 10, count 0 2006.229.19:24:52.91#ibcon#about to write, iclass 10, count 0 2006.229.19:24:52.91#ibcon#wrote, iclass 10, count 0 2006.229.19:24:52.91#ibcon#about to read 3, iclass 10, count 0 2006.229.19:24:52.93#ibcon#read 3, iclass 10, count 0 2006.229.19:24:52.93#ibcon#about to read 4, iclass 10, count 0 2006.229.19:24:52.93#ibcon#read 4, iclass 10, count 0 2006.229.19:24:52.93#ibcon#about to read 5, iclass 10, count 0 2006.229.19:24:52.93#ibcon#read 5, iclass 10, count 0 2006.229.19:24:52.93#ibcon#about to read 6, iclass 10, count 0 2006.229.19:24:52.93#ibcon#read 6, iclass 10, count 0 2006.229.19:24:52.93#ibcon#end of sib2, iclass 10, count 0 2006.229.19:24:52.93#ibcon#*mode == 0, iclass 10, count 0 2006.229.19:24:52.93#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.19:24:52.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:24:52.93#ibcon#*before write, iclass 10, count 0 2006.229.19:24:52.93#ibcon#enter sib2, iclass 10, count 0 2006.229.19:24:52.93#ibcon#flushed, iclass 10, count 0 2006.229.19:24:52.93#ibcon#about to write, iclass 10, count 0 2006.229.19:24:52.93#ibcon#wrote, iclass 10, count 0 2006.229.19:24:52.93#ibcon#about to read 3, iclass 10, count 0 2006.229.19:24:52.97#ibcon#read 3, iclass 10, count 0 2006.229.19:24:52.97#ibcon#about to read 4, iclass 10, count 0 2006.229.19:24:52.97#ibcon#read 4, iclass 10, count 0 2006.229.19:24:52.97#ibcon#about to read 5, iclass 10, count 0 2006.229.19:24:52.97#ibcon#read 5, iclass 10, count 0 2006.229.19:24:52.97#ibcon#about to read 6, iclass 10, count 0 2006.229.19:24:52.97#ibcon#read 6, iclass 10, count 0 2006.229.19:24:52.97#ibcon#end of sib2, iclass 10, count 0 2006.229.19:24:52.97#ibcon#*after write, iclass 10, count 0 2006.229.19:24:52.97#ibcon#*before return 0, iclass 10, count 0 2006.229.19:24:52.97#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:24:52.97#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:24:52.97#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.19:24:52.97#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.19:24:52.97$vck44/vb=1,4 2006.229.19:24:52.97#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.19:24:52.97#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.19:24:52.97#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:52.97#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:24:52.97#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:24:52.97#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:24:52.97#ibcon#enter wrdev, iclass 12, count 2 2006.229.19:24:52.97#ibcon#first serial, iclass 12, count 2 2006.229.19:24:52.97#ibcon#enter sib2, iclass 12, count 2 2006.229.19:24:52.97#ibcon#flushed, iclass 12, count 2 2006.229.19:24:52.97#ibcon#about to write, iclass 12, count 2 2006.229.19:24:52.97#ibcon#wrote, iclass 12, count 2 2006.229.19:24:52.97#ibcon#about to read 3, iclass 12, count 2 2006.229.19:24:52.99#ibcon#read 3, iclass 12, count 2 2006.229.19:24:52.99#ibcon#about to read 4, iclass 12, count 2 2006.229.19:24:52.99#ibcon#read 4, iclass 12, count 2 2006.229.19:24:52.99#ibcon#about to read 5, iclass 12, count 2 2006.229.19:24:52.99#ibcon#read 5, iclass 12, count 2 2006.229.19:24:52.99#ibcon#about to read 6, iclass 12, count 2 2006.229.19:24:52.99#ibcon#read 6, iclass 12, count 2 2006.229.19:24:52.99#ibcon#end of sib2, iclass 12, count 2 2006.229.19:24:52.99#ibcon#*mode == 0, iclass 12, count 2 2006.229.19:24:52.99#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.19:24:52.99#ibcon#[27=AT01-04\r\n] 2006.229.19:24:52.99#ibcon#*before write, iclass 12, count 2 2006.229.19:24:52.99#ibcon#enter sib2, iclass 12, count 2 2006.229.19:24:52.99#ibcon#flushed, iclass 12, count 2 2006.229.19:24:52.99#ibcon#about to write, iclass 12, count 2 2006.229.19:24:52.99#ibcon#wrote, iclass 12, count 2 2006.229.19:24:52.99#ibcon#about to read 3, iclass 12, count 2 2006.229.19:24:53.02#ibcon#read 3, iclass 12, count 2 2006.229.19:24:53.02#ibcon#about to read 4, iclass 12, count 2 2006.229.19:24:53.02#ibcon#read 4, iclass 12, count 2 2006.229.19:24:53.02#ibcon#about to read 5, iclass 12, count 2 2006.229.19:24:53.02#ibcon#read 5, iclass 12, count 2 2006.229.19:24:53.02#ibcon#about to read 6, iclass 12, count 2 2006.229.19:24:53.02#ibcon#read 6, iclass 12, count 2 2006.229.19:24:53.02#ibcon#end of sib2, iclass 12, count 2 2006.229.19:24:53.02#ibcon#*after write, iclass 12, count 2 2006.229.19:24:53.02#ibcon#*before return 0, iclass 12, count 2 2006.229.19:24:53.02#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:24:53.02#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:24:53.02#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.19:24:53.02#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:53.02#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:24:53.14#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:24:53.14#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:24:53.14#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:24:53.14#ibcon#first serial, iclass 12, count 0 2006.229.19:24:53.14#ibcon#enter sib2, iclass 12, count 0 2006.229.19:24:53.14#ibcon#flushed, iclass 12, count 0 2006.229.19:24:53.14#ibcon#about to write, iclass 12, count 0 2006.229.19:24:53.14#ibcon#wrote, iclass 12, count 0 2006.229.19:24:53.14#ibcon#about to read 3, iclass 12, count 0 2006.229.19:24:53.16#ibcon#read 3, iclass 12, count 0 2006.229.19:24:53.16#ibcon#about to read 4, iclass 12, count 0 2006.229.19:24:53.16#ibcon#read 4, iclass 12, count 0 2006.229.19:24:53.16#ibcon#about to read 5, iclass 12, count 0 2006.229.19:24:53.16#ibcon#read 5, iclass 12, count 0 2006.229.19:24:53.16#ibcon#about to read 6, iclass 12, count 0 2006.229.19:24:53.16#ibcon#read 6, iclass 12, count 0 2006.229.19:24:53.16#ibcon#end of sib2, iclass 12, count 0 2006.229.19:24:53.16#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:24:53.16#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:24:53.16#ibcon#[27=USB\r\n] 2006.229.19:24:53.16#ibcon#*before write, iclass 12, count 0 2006.229.19:24:53.16#ibcon#enter sib2, iclass 12, count 0 2006.229.19:24:53.16#ibcon#flushed, iclass 12, count 0 2006.229.19:24:53.16#ibcon#about to write, iclass 12, count 0 2006.229.19:24:53.16#ibcon#wrote, iclass 12, count 0 2006.229.19:24:53.16#ibcon#about to read 3, iclass 12, count 0 2006.229.19:24:53.19#ibcon#read 3, iclass 12, count 0 2006.229.19:24:53.19#ibcon#about to read 4, iclass 12, count 0 2006.229.19:24:53.19#ibcon#read 4, iclass 12, count 0 2006.229.19:24:53.19#ibcon#about to read 5, iclass 12, count 0 2006.229.19:24:53.19#ibcon#read 5, iclass 12, count 0 2006.229.19:24:53.19#ibcon#about to read 6, iclass 12, count 0 2006.229.19:24:53.19#ibcon#read 6, iclass 12, count 0 2006.229.19:24:53.19#ibcon#end of sib2, iclass 12, count 0 2006.229.19:24:53.19#ibcon#*after write, iclass 12, count 0 2006.229.19:24:53.19#ibcon#*before return 0, iclass 12, count 0 2006.229.19:24:53.19#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:24:53.19#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:24:53.19#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:24:53.19#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:24:53.19$vck44/vblo=2,634.99 2006.229.19:24:53.19#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.19:24:53.19#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.19:24:53.19#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:53.19#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:53.19#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:53.19#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:53.19#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:24:53.19#ibcon#first serial, iclass 14, count 0 2006.229.19:24:53.19#ibcon#enter sib2, iclass 14, count 0 2006.229.19:24:53.19#ibcon#flushed, iclass 14, count 0 2006.229.19:24:53.19#ibcon#about to write, iclass 14, count 0 2006.229.19:24:53.19#ibcon#wrote, iclass 14, count 0 2006.229.19:24:53.19#ibcon#about to read 3, iclass 14, count 0 2006.229.19:24:53.21#ibcon#read 3, iclass 14, count 0 2006.229.19:24:53.21#ibcon#about to read 4, iclass 14, count 0 2006.229.19:24:53.21#ibcon#read 4, iclass 14, count 0 2006.229.19:24:53.21#ibcon#about to read 5, iclass 14, count 0 2006.229.19:24:53.21#ibcon#read 5, iclass 14, count 0 2006.229.19:24:53.21#ibcon#about to read 6, iclass 14, count 0 2006.229.19:24:53.21#ibcon#read 6, iclass 14, count 0 2006.229.19:24:53.21#ibcon#end of sib2, iclass 14, count 0 2006.229.19:24:53.21#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:24:53.21#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:24:53.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:24:53.21#ibcon#*before write, iclass 14, count 0 2006.229.19:24:53.21#ibcon#enter sib2, iclass 14, count 0 2006.229.19:24:53.21#ibcon#flushed, iclass 14, count 0 2006.229.19:24:53.21#ibcon#about to write, iclass 14, count 0 2006.229.19:24:53.21#ibcon#wrote, iclass 14, count 0 2006.229.19:24:53.21#ibcon#about to read 3, iclass 14, count 0 2006.229.19:24:53.25#ibcon#read 3, iclass 14, count 0 2006.229.19:24:53.25#ibcon#about to read 4, iclass 14, count 0 2006.229.19:24:53.25#ibcon#read 4, iclass 14, count 0 2006.229.19:24:53.25#ibcon#about to read 5, iclass 14, count 0 2006.229.19:24:53.25#ibcon#read 5, iclass 14, count 0 2006.229.19:24:53.25#ibcon#about to read 6, iclass 14, count 0 2006.229.19:24:53.25#ibcon#read 6, iclass 14, count 0 2006.229.19:24:53.25#ibcon#end of sib2, iclass 14, count 0 2006.229.19:24:53.25#ibcon#*after write, iclass 14, count 0 2006.229.19:24:53.25#ibcon#*before return 0, iclass 14, count 0 2006.229.19:24:53.25#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:53.25#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:24:53.25#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:24:53.25#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:24:53.25$vck44/vb=2,4 2006.229.19:24:53.25#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.19:24:53.25#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.19:24:53.25#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:53.25#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:53.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:53.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:53.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.19:24:53.31#ibcon#first serial, iclass 16, count 2 2006.229.19:24:53.31#ibcon#enter sib2, iclass 16, count 2 2006.229.19:24:53.31#ibcon#flushed, iclass 16, count 2 2006.229.19:24:53.31#ibcon#about to write, iclass 16, count 2 2006.229.19:24:53.31#ibcon#wrote, iclass 16, count 2 2006.229.19:24:53.31#ibcon#about to read 3, iclass 16, count 2 2006.229.19:24:53.33#ibcon#read 3, iclass 16, count 2 2006.229.19:24:53.33#ibcon#about to read 4, iclass 16, count 2 2006.229.19:24:53.33#ibcon#read 4, iclass 16, count 2 2006.229.19:24:53.33#ibcon#about to read 5, iclass 16, count 2 2006.229.19:24:53.33#ibcon#read 5, iclass 16, count 2 2006.229.19:24:53.33#ibcon#about to read 6, iclass 16, count 2 2006.229.19:24:53.33#ibcon#read 6, iclass 16, count 2 2006.229.19:24:53.33#ibcon#end of sib2, iclass 16, count 2 2006.229.19:24:53.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.19:24:53.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.19:24:53.33#ibcon#[27=AT02-04\r\n] 2006.229.19:24:53.33#ibcon#*before write, iclass 16, count 2 2006.229.19:24:53.33#ibcon#enter sib2, iclass 16, count 2 2006.229.19:24:53.33#ibcon#flushed, iclass 16, count 2 2006.229.19:24:53.33#ibcon#about to write, iclass 16, count 2 2006.229.19:24:53.33#ibcon#wrote, iclass 16, count 2 2006.229.19:24:53.33#ibcon#about to read 3, iclass 16, count 2 2006.229.19:24:53.36#ibcon#read 3, iclass 16, count 2 2006.229.19:24:53.36#ibcon#about to read 4, iclass 16, count 2 2006.229.19:24:53.36#ibcon#read 4, iclass 16, count 2 2006.229.19:24:53.36#ibcon#about to read 5, iclass 16, count 2 2006.229.19:24:53.36#ibcon#read 5, iclass 16, count 2 2006.229.19:24:53.36#ibcon#about to read 6, iclass 16, count 2 2006.229.19:24:53.36#ibcon#read 6, iclass 16, count 2 2006.229.19:24:53.36#ibcon#end of sib2, iclass 16, count 2 2006.229.19:24:53.36#ibcon#*after write, iclass 16, count 2 2006.229.19:24:53.36#ibcon#*before return 0, iclass 16, count 2 2006.229.19:24:53.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:53.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:24:53.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.19:24:53.36#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:53.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:53.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:53.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:53.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:24:53.48#ibcon#first serial, iclass 16, count 0 2006.229.19:24:53.48#ibcon#enter sib2, iclass 16, count 0 2006.229.19:24:53.48#ibcon#flushed, iclass 16, count 0 2006.229.19:24:53.48#ibcon#about to write, iclass 16, count 0 2006.229.19:24:53.48#ibcon#wrote, iclass 16, count 0 2006.229.19:24:53.48#ibcon#about to read 3, iclass 16, count 0 2006.229.19:24:53.50#ibcon#read 3, iclass 16, count 0 2006.229.19:24:53.50#ibcon#about to read 4, iclass 16, count 0 2006.229.19:24:53.50#ibcon#read 4, iclass 16, count 0 2006.229.19:24:53.50#ibcon#about to read 5, iclass 16, count 0 2006.229.19:24:53.50#ibcon#read 5, iclass 16, count 0 2006.229.19:24:53.50#ibcon#about to read 6, iclass 16, count 0 2006.229.19:24:53.50#ibcon#read 6, iclass 16, count 0 2006.229.19:24:53.50#ibcon#end of sib2, iclass 16, count 0 2006.229.19:24:53.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:24:53.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:24:53.50#ibcon#[27=USB\r\n] 2006.229.19:24:53.50#ibcon#*before write, iclass 16, count 0 2006.229.19:24:53.50#ibcon#enter sib2, iclass 16, count 0 2006.229.19:24:53.50#ibcon#flushed, iclass 16, count 0 2006.229.19:24:53.50#ibcon#about to write, iclass 16, count 0 2006.229.19:24:53.50#ibcon#wrote, iclass 16, count 0 2006.229.19:24:53.50#ibcon#about to read 3, iclass 16, count 0 2006.229.19:24:53.53#ibcon#read 3, iclass 16, count 0 2006.229.19:24:53.53#ibcon#about to read 4, iclass 16, count 0 2006.229.19:24:53.53#ibcon#read 4, iclass 16, count 0 2006.229.19:24:53.53#ibcon#about to read 5, iclass 16, count 0 2006.229.19:24:53.53#ibcon#read 5, iclass 16, count 0 2006.229.19:24:53.53#ibcon#about to read 6, iclass 16, count 0 2006.229.19:24:53.53#ibcon#read 6, iclass 16, count 0 2006.229.19:24:53.53#ibcon#end of sib2, iclass 16, count 0 2006.229.19:24:53.53#ibcon#*after write, iclass 16, count 0 2006.229.19:24:53.53#ibcon#*before return 0, iclass 16, count 0 2006.229.19:24:53.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:53.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:24:53.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:24:53.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:24:53.53$vck44/vblo=3,649.99 2006.229.19:24:53.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.19:24:53.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.19:24:53.53#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:53.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:53.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:53.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:53.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:24:53.53#ibcon#first serial, iclass 18, count 0 2006.229.19:24:53.53#ibcon#enter sib2, iclass 18, count 0 2006.229.19:24:53.53#ibcon#flushed, iclass 18, count 0 2006.229.19:24:53.53#ibcon#about to write, iclass 18, count 0 2006.229.19:24:53.53#ibcon#wrote, iclass 18, count 0 2006.229.19:24:53.53#ibcon#about to read 3, iclass 18, count 0 2006.229.19:24:53.55#ibcon#read 3, iclass 18, count 0 2006.229.19:24:53.55#ibcon#about to read 4, iclass 18, count 0 2006.229.19:24:53.55#ibcon#read 4, iclass 18, count 0 2006.229.19:24:53.55#ibcon#about to read 5, iclass 18, count 0 2006.229.19:24:53.55#ibcon#read 5, iclass 18, count 0 2006.229.19:24:53.55#ibcon#about to read 6, iclass 18, count 0 2006.229.19:24:53.55#ibcon#read 6, iclass 18, count 0 2006.229.19:24:53.55#ibcon#end of sib2, iclass 18, count 0 2006.229.19:24:53.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:24:53.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:24:53.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:24:53.55#ibcon#*before write, iclass 18, count 0 2006.229.19:24:53.55#ibcon#enter sib2, iclass 18, count 0 2006.229.19:24:53.55#ibcon#flushed, iclass 18, count 0 2006.229.19:24:53.55#ibcon#about to write, iclass 18, count 0 2006.229.19:24:53.55#ibcon#wrote, iclass 18, count 0 2006.229.19:24:53.55#ibcon#about to read 3, iclass 18, count 0 2006.229.19:24:53.59#ibcon#read 3, iclass 18, count 0 2006.229.19:24:53.59#ibcon#about to read 4, iclass 18, count 0 2006.229.19:24:53.59#ibcon#read 4, iclass 18, count 0 2006.229.19:24:53.59#ibcon#about to read 5, iclass 18, count 0 2006.229.19:24:53.59#ibcon#read 5, iclass 18, count 0 2006.229.19:24:53.59#ibcon#about to read 6, iclass 18, count 0 2006.229.19:24:53.59#ibcon#read 6, iclass 18, count 0 2006.229.19:24:53.59#ibcon#end of sib2, iclass 18, count 0 2006.229.19:24:53.59#ibcon#*after write, iclass 18, count 0 2006.229.19:24:53.59#ibcon#*before return 0, iclass 18, count 0 2006.229.19:24:53.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:53.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:24:53.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:24:53.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:24:53.59$vck44/vb=3,4 2006.229.19:24:53.59#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.19:24:53.59#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.19:24:53.59#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:53.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:53.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:53.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:53.65#ibcon#enter wrdev, iclass 20, count 2 2006.229.19:24:53.65#ibcon#first serial, iclass 20, count 2 2006.229.19:24:53.65#ibcon#enter sib2, iclass 20, count 2 2006.229.19:24:53.65#ibcon#flushed, iclass 20, count 2 2006.229.19:24:53.65#ibcon#about to write, iclass 20, count 2 2006.229.19:24:53.65#ibcon#wrote, iclass 20, count 2 2006.229.19:24:53.65#ibcon#about to read 3, iclass 20, count 2 2006.229.19:24:53.67#ibcon#read 3, iclass 20, count 2 2006.229.19:24:53.67#ibcon#about to read 4, iclass 20, count 2 2006.229.19:24:53.67#ibcon#read 4, iclass 20, count 2 2006.229.19:24:53.67#ibcon#about to read 5, iclass 20, count 2 2006.229.19:24:53.67#ibcon#read 5, iclass 20, count 2 2006.229.19:24:53.67#ibcon#about to read 6, iclass 20, count 2 2006.229.19:24:53.67#ibcon#read 6, iclass 20, count 2 2006.229.19:24:53.67#ibcon#end of sib2, iclass 20, count 2 2006.229.19:24:53.67#ibcon#*mode == 0, iclass 20, count 2 2006.229.19:24:53.67#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.19:24:53.67#ibcon#[27=AT03-04\r\n] 2006.229.19:24:53.67#ibcon#*before write, iclass 20, count 2 2006.229.19:24:53.67#ibcon#enter sib2, iclass 20, count 2 2006.229.19:24:53.67#ibcon#flushed, iclass 20, count 2 2006.229.19:24:53.67#ibcon#about to write, iclass 20, count 2 2006.229.19:24:53.67#ibcon#wrote, iclass 20, count 2 2006.229.19:24:53.67#ibcon#about to read 3, iclass 20, count 2 2006.229.19:24:53.70#ibcon#read 3, iclass 20, count 2 2006.229.19:24:53.70#ibcon#about to read 4, iclass 20, count 2 2006.229.19:24:53.70#ibcon#read 4, iclass 20, count 2 2006.229.19:24:53.70#ibcon#about to read 5, iclass 20, count 2 2006.229.19:24:53.70#ibcon#read 5, iclass 20, count 2 2006.229.19:24:53.70#ibcon#about to read 6, iclass 20, count 2 2006.229.19:24:53.70#ibcon#read 6, iclass 20, count 2 2006.229.19:24:53.70#ibcon#end of sib2, iclass 20, count 2 2006.229.19:24:53.70#ibcon#*after write, iclass 20, count 2 2006.229.19:24:53.70#ibcon#*before return 0, iclass 20, count 2 2006.229.19:24:53.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:53.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:24:53.70#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.19:24:53.70#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:53.70#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:53.82#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:53.82#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:53.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:24:53.82#ibcon#first serial, iclass 20, count 0 2006.229.19:24:53.82#ibcon#enter sib2, iclass 20, count 0 2006.229.19:24:53.82#ibcon#flushed, iclass 20, count 0 2006.229.19:24:53.82#ibcon#about to write, iclass 20, count 0 2006.229.19:24:53.82#ibcon#wrote, iclass 20, count 0 2006.229.19:24:53.82#ibcon#about to read 3, iclass 20, count 0 2006.229.19:24:53.84#ibcon#read 3, iclass 20, count 0 2006.229.19:24:53.84#ibcon#about to read 4, iclass 20, count 0 2006.229.19:24:53.84#ibcon#read 4, iclass 20, count 0 2006.229.19:24:53.84#ibcon#about to read 5, iclass 20, count 0 2006.229.19:24:53.84#ibcon#read 5, iclass 20, count 0 2006.229.19:24:53.84#ibcon#about to read 6, iclass 20, count 0 2006.229.19:24:53.84#ibcon#read 6, iclass 20, count 0 2006.229.19:24:53.84#ibcon#end of sib2, iclass 20, count 0 2006.229.19:24:53.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:24:53.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:24:53.84#ibcon#[27=USB\r\n] 2006.229.19:24:53.84#ibcon#*before write, iclass 20, count 0 2006.229.19:24:53.84#ibcon#enter sib2, iclass 20, count 0 2006.229.19:24:53.84#ibcon#flushed, iclass 20, count 0 2006.229.19:24:53.84#ibcon#about to write, iclass 20, count 0 2006.229.19:24:53.84#ibcon#wrote, iclass 20, count 0 2006.229.19:24:53.84#ibcon#about to read 3, iclass 20, count 0 2006.229.19:24:53.87#ibcon#read 3, iclass 20, count 0 2006.229.19:24:53.87#ibcon#about to read 4, iclass 20, count 0 2006.229.19:24:53.87#ibcon#read 4, iclass 20, count 0 2006.229.19:24:53.87#ibcon#about to read 5, iclass 20, count 0 2006.229.19:24:53.87#ibcon#read 5, iclass 20, count 0 2006.229.19:24:53.87#ibcon#about to read 6, iclass 20, count 0 2006.229.19:24:53.87#ibcon#read 6, iclass 20, count 0 2006.229.19:24:53.87#ibcon#end of sib2, iclass 20, count 0 2006.229.19:24:53.87#ibcon#*after write, iclass 20, count 0 2006.229.19:24:53.87#ibcon#*before return 0, iclass 20, count 0 2006.229.19:24:53.87#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:53.87#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:24:53.87#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:24:53.87#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:24:53.87$vck44/vblo=4,679.99 2006.229.19:24:53.87#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:24:53.87#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:24:53.87#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:53.87#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:53.87#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:53.87#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:53.87#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:24:53.87#ibcon#first serial, iclass 22, count 0 2006.229.19:24:53.87#ibcon#enter sib2, iclass 22, count 0 2006.229.19:24:53.87#ibcon#flushed, iclass 22, count 0 2006.229.19:24:53.87#ibcon#about to write, iclass 22, count 0 2006.229.19:24:53.87#ibcon#wrote, iclass 22, count 0 2006.229.19:24:53.87#ibcon#about to read 3, iclass 22, count 0 2006.229.19:24:53.89#ibcon#read 3, iclass 22, count 0 2006.229.19:24:53.89#ibcon#about to read 4, iclass 22, count 0 2006.229.19:24:53.89#ibcon#read 4, iclass 22, count 0 2006.229.19:24:53.89#ibcon#about to read 5, iclass 22, count 0 2006.229.19:24:53.89#ibcon#read 5, iclass 22, count 0 2006.229.19:24:53.89#ibcon#about to read 6, iclass 22, count 0 2006.229.19:24:53.89#ibcon#read 6, iclass 22, count 0 2006.229.19:24:53.89#ibcon#end of sib2, iclass 22, count 0 2006.229.19:24:53.89#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:24:53.89#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:24:53.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:24:53.89#ibcon#*before write, iclass 22, count 0 2006.229.19:24:53.89#ibcon#enter sib2, iclass 22, count 0 2006.229.19:24:53.89#ibcon#flushed, iclass 22, count 0 2006.229.19:24:53.89#ibcon#about to write, iclass 22, count 0 2006.229.19:24:53.89#ibcon#wrote, iclass 22, count 0 2006.229.19:24:53.89#ibcon#about to read 3, iclass 22, count 0 2006.229.19:24:53.93#ibcon#read 3, iclass 22, count 0 2006.229.19:24:53.93#ibcon#about to read 4, iclass 22, count 0 2006.229.19:24:53.93#ibcon#read 4, iclass 22, count 0 2006.229.19:24:53.93#ibcon#about to read 5, iclass 22, count 0 2006.229.19:24:53.93#ibcon#read 5, iclass 22, count 0 2006.229.19:24:53.93#ibcon#about to read 6, iclass 22, count 0 2006.229.19:24:53.93#ibcon#read 6, iclass 22, count 0 2006.229.19:24:53.93#ibcon#end of sib2, iclass 22, count 0 2006.229.19:24:53.93#ibcon#*after write, iclass 22, count 0 2006.229.19:24:53.93#ibcon#*before return 0, iclass 22, count 0 2006.229.19:24:53.93#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:53.93#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:24:53.93#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:24:53.93#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:24:53.93$vck44/vb=4,4 2006.229.19:24:53.93#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.19:24:53.93#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.19:24:53.93#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:53.93#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:53.99#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:53.99#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:53.99#ibcon#enter wrdev, iclass 24, count 2 2006.229.19:24:53.99#ibcon#first serial, iclass 24, count 2 2006.229.19:24:53.99#ibcon#enter sib2, iclass 24, count 2 2006.229.19:24:53.99#ibcon#flushed, iclass 24, count 2 2006.229.19:24:53.99#ibcon#about to write, iclass 24, count 2 2006.229.19:24:53.99#ibcon#wrote, iclass 24, count 2 2006.229.19:24:53.99#ibcon#about to read 3, iclass 24, count 2 2006.229.19:24:54.01#ibcon#read 3, iclass 24, count 2 2006.229.19:24:54.01#ibcon#about to read 4, iclass 24, count 2 2006.229.19:24:54.01#ibcon#read 4, iclass 24, count 2 2006.229.19:24:54.01#ibcon#about to read 5, iclass 24, count 2 2006.229.19:24:54.01#ibcon#read 5, iclass 24, count 2 2006.229.19:24:54.01#ibcon#about to read 6, iclass 24, count 2 2006.229.19:24:54.01#ibcon#read 6, iclass 24, count 2 2006.229.19:24:54.01#ibcon#end of sib2, iclass 24, count 2 2006.229.19:24:54.01#ibcon#*mode == 0, iclass 24, count 2 2006.229.19:24:54.01#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.19:24:54.01#ibcon#[27=AT04-04\r\n] 2006.229.19:24:54.01#ibcon#*before write, iclass 24, count 2 2006.229.19:24:54.01#ibcon#enter sib2, iclass 24, count 2 2006.229.19:24:54.01#ibcon#flushed, iclass 24, count 2 2006.229.19:24:54.01#ibcon#about to write, iclass 24, count 2 2006.229.19:24:54.01#ibcon#wrote, iclass 24, count 2 2006.229.19:24:54.01#ibcon#about to read 3, iclass 24, count 2 2006.229.19:24:54.04#ibcon#read 3, iclass 24, count 2 2006.229.19:24:54.04#ibcon#about to read 4, iclass 24, count 2 2006.229.19:24:54.04#ibcon#read 4, iclass 24, count 2 2006.229.19:24:54.04#ibcon#about to read 5, iclass 24, count 2 2006.229.19:24:54.04#ibcon#read 5, iclass 24, count 2 2006.229.19:24:54.04#ibcon#about to read 6, iclass 24, count 2 2006.229.19:24:54.04#ibcon#read 6, iclass 24, count 2 2006.229.19:24:54.04#ibcon#end of sib2, iclass 24, count 2 2006.229.19:24:54.04#ibcon#*after write, iclass 24, count 2 2006.229.19:24:54.04#ibcon#*before return 0, iclass 24, count 2 2006.229.19:24:54.04#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:54.04#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:24:54.04#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.19:24:54.04#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:54.04#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:54.16#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:54.16#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:54.16#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:24:54.16#ibcon#first serial, iclass 24, count 0 2006.229.19:24:54.16#ibcon#enter sib2, iclass 24, count 0 2006.229.19:24:54.16#ibcon#flushed, iclass 24, count 0 2006.229.19:24:54.16#ibcon#about to write, iclass 24, count 0 2006.229.19:24:54.16#ibcon#wrote, iclass 24, count 0 2006.229.19:24:54.16#ibcon#about to read 3, iclass 24, count 0 2006.229.19:24:54.18#ibcon#read 3, iclass 24, count 0 2006.229.19:24:54.18#ibcon#about to read 4, iclass 24, count 0 2006.229.19:24:54.18#ibcon#read 4, iclass 24, count 0 2006.229.19:24:54.18#ibcon#about to read 5, iclass 24, count 0 2006.229.19:24:54.18#ibcon#read 5, iclass 24, count 0 2006.229.19:24:54.18#ibcon#about to read 6, iclass 24, count 0 2006.229.19:24:54.18#ibcon#read 6, iclass 24, count 0 2006.229.19:24:54.18#ibcon#end of sib2, iclass 24, count 0 2006.229.19:24:54.18#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:24:54.18#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:24:54.18#ibcon#[27=USB\r\n] 2006.229.19:24:54.18#ibcon#*before write, iclass 24, count 0 2006.229.19:24:54.18#ibcon#enter sib2, iclass 24, count 0 2006.229.19:24:54.18#ibcon#flushed, iclass 24, count 0 2006.229.19:24:54.18#ibcon#about to write, iclass 24, count 0 2006.229.19:24:54.18#ibcon#wrote, iclass 24, count 0 2006.229.19:24:54.18#ibcon#about to read 3, iclass 24, count 0 2006.229.19:24:54.21#ibcon#read 3, iclass 24, count 0 2006.229.19:24:54.21#ibcon#about to read 4, iclass 24, count 0 2006.229.19:24:54.21#ibcon#read 4, iclass 24, count 0 2006.229.19:24:54.21#ibcon#about to read 5, iclass 24, count 0 2006.229.19:24:54.21#ibcon#read 5, iclass 24, count 0 2006.229.19:24:54.21#ibcon#about to read 6, iclass 24, count 0 2006.229.19:24:54.21#ibcon#read 6, iclass 24, count 0 2006.229.19:24:54.21#ibcon#end of sib2, iclass 24, count 0 2006.229.19:24:54.21#ibcon#*after write, iclass 24, count 0 2006.229.19:24:54.21#ibcon#*before return 0, iclass 24, count 0 2006.229.19:24:54.21#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:54.21#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:24:54.21#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:24:54.21#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:24:54.21$vck44/vblo=5,709.99 2006.229.19:24:54.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.19:24:54.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.19:24:54.21#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:54.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:54.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:54.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:54.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:24:54.21#ibcon#first serial, iclass 26, count 0 2006.229.19:24:54.21#ibcon#enter sib2, iclass 26, count 0 2006.229.19:24:54.21#ibcon#flushed, iclass 26, count 0 2006.229.19:24:54.21#ibcon#about to write, iclass 26, count 0 2006.229.19:24:54.21#ibcon#wrote, iclass 26, count 0 2006.229.19:24:54.21#ibcon#about to read 3, iclass 26, count 0 2006.229.19:24:54.23#ibcon#read 3, iclass 26, count 0 2006.229.19:24:54.23#ibcon#about to read 4, iclass 26, count 0 2006.229.19:24:54.23#ibcon#read 4, iclass 26, count 0 2006.229.19:24:54.23#ibcon#about to read 5, iclass 26, count 0 2006.229.19:24:54.23#ibcon#read 5, iclass 26, count 0 2006.229.19:24:54.23#ibcon#about to read 6, iclass 26, count 0 2006.229.19:24:54.23#ibcon#read 6, iclass 26, count 0 2006.229.19:24:54.23#ibcon#end of sib2, iclass 26, count 0 2006.229.19:24:54.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:24:54.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:24:54.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:24:54.23#ibcon#*before write, iclass 26, count 0 2006.229.19:24:54.23#ibcon#enter sib2, iclass 26, count 0 2006.229.19:24:54.23#ibcon#flushed, iclass 26, count 0 2006.229.19:24:54.23#ibcon#about to write, iclass 26, count 0 2006.229.19:24:54.23#ibcon#wrote, iclass 26, count 0 2006.229.19:24:54.23#ibcon#about to read 3, iclass 26, count 0 2006.229.19:24:54.27#ibcon#read 3, iclass 26, count 0 2006.229.19:24:54.27#ibcon#about to read 4, iclass 26, count 0 2006.229.19:24:54.27#ibcon#read 4, iclass 26, count 0 2006.229.19:24:54.27#ibcon#about to read 5, iclass 26, count 0 2006.229.19:24:54.27#ibcon#read 5, iclass 26, count 0 2006.229.19:24:54.27#ibcon#about to read 6, iclass 26, count 0 2006.229.19:24:54.27#ibcon#read 6, iclass 26, count 0 2006.229.19:24:54.27#ibcon#end of sib2, iclass 26, count 0 2006.229.19:24:54.27#ibcon#*after write, iclass 26, count 0 2006.229.19:24:54.27#ibcon#*before return 0, iclass 26, count 0 2006.229.19:24:54.27#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:54.27#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:24:54.27#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:24:54.27#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:24:54.27$vck44/vb=5,4 2006.229.19:24:54.27#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.19:24:54.27#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.19:24:54.27#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:54.27#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:54.33#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:54.33#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:54.33#ibcon#enter wrdev, iclass 28, count 2 2006.229.19:24:54.33#ibcon#first serial, iclass 28, count 2 2006.229.19:24:54.33#ibcon#enter sib2, iclass 28, count 2 2006.229.19:24:54.33#ibcon#flushed, iclass 28, count 2 2006.229.19:24:54.33#ibcon#about to write, iclass 28, count 2 2006.229.19:24:54.33#ibcon#wrote, iclass 28, count 2 2006.229.19:24:54.33#ibcon#about to read 3, iclass 28, count 2 2006.229.19:24:54.35#ibcon#read 3, iclass 28, count 2 2006.229.19:24:54.35#ibcon#about to read 4, iclass 28, count 2 2006.229.19:24:54.35#ibcon#read 4, iclass 28, count 2 2006.229.19:24:54.35#ibcon#about to read 5, iclass 28, count 2 2006.229.19:24:54.35#ibcon#read 5, iclass 28, count 2 2006.229.19:24:54.35#ibcon#about to read 6, iclass 28, count 2 2006.229.19:24:54.35#ibcon#read 6, iclass 28, count 2 2006.229.19:24:54.35#ibcon#end of sib2, iclass 28, count 2 2006.229.19:24:54.35#ibcon#*mode == 0, iclass 28, count 2 2006.229.19:24:54.35#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.19:24:54.35#ibcon#[27=AT05-04\r\n] 2006.229.19:24:54.35#ibcon#*before write, iclass 28, count 2 2006.229.19:24:54.35#ibcon#enter sib2, iclass 28, count 2 2006.229.19:24:54.35#ibcon#flushed, iclass 28, count 2 2006.229.19:24:54.35#ibcon#about to write, iclass 28, count 2 2006.229.19:24:54.35#ibcon#wrote, iclass 28, count 2 2006.229.19:24:54.35#ibcon#about to read 3, iclass 28, count 2 2006.229.19:24:54.38#ibcon#read 3, iclass 28, count 2 2006.229.19:24:54.38#ibcon#about to read 4, iclass 28, count 2 2006.229.19:24:54.38#ibcon#read 4, iclass 28, count 2 2006.229.19:24:54.38#ibcon#about to read 5, iclass 28, count 2 2006.229.19:24:54.38#ibcon#read 5, iclass 28, count 2 2006.229.19:24:54.38#ibcon#about to read 6, iclass 28, count 2 2006.229.19:24:54.38#ibcon#read 6, iclass 28, count 2 2006.229.19:24:54.38#ibcon#end of sib2, iclass 28, count 2 2006.229.19:24:54.38#ibcon#*after write, iclass 28, count 2 2006.229.19:24:54.38#ibcon#*before return 0, iclass 28, count 2 2006.229.19:24:54.38#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:54.38#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:24:54.38#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.19:24:54.38#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:54.38#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:54.50#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:54.50#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:54.50#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:24:54.50#ibcon#first serial, iclass 28, count 0 2006.229.19:24:54.50#ibcon#enter sib2, iclass 28, count 0 2006.229.19:24:54.50#ibcon#flushed, iclass 28, count 0 2006.229.19:24:54.50#ibcon#about to write, iclass 28, count 0 2006.229.19:24:54.50#ibcon#wrote, iclass 28, count 0 2006.229.19:24:54.50#ibcon#about to read 3, iclass 28, count 0 2006.229.19:24:54.52#ibcon#read 3, iclass 28, count 0 2006.229.19:24:54.52#ibcon#about to read 4, iclass 28, count 0 2006.229.19:24:54.52#ibcon#read 4, iclass 28, count 0 2006.229.19:24:54.52#ibcon#about to read 5, iclass 28, count 0 2006.229.19:24:54.52#ibcon#read 5, iclass 28, count 0 2006.229.19:24:54.52#ibcon#about to read 6, iclass 28, count 0 2006.229.19:24:54.52#ibcon#read 6, iclass 28, count 0 2006.229.19:24:54.52#ibcon#end of sib2, iclass 28, count 0 2006.229.19:24:54.52#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:24:54.52#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:24:54.52#ibcon#[27=USB\r\n] 2006.229.19:24:54.52#ibcon#*before write, iclass 28, count 0 2006.229.19:24:54.52#ibcon#enter sib2, iclass 28, count 0 2006.229.19:24:54.52#ibcon#flushed, iclass 28, count 0 2006.229.19:24:54.52#ibcon#about to write, iclass 28, count 0 2006.229.19:24:54.52#ibcon#wrote, iclass 28, count 0 2006.229.19:24:54.52#ibcon#about to read 3, iclass 28, count 0 2006.229.19:24:54.55#ibcon#read 3, iclass 28, count 0 2006.229.19:24:54.55#ibcon#about to read 4, iclass 28, count 0 2006.229.19:24:54.55#ibcon#read 4, iclass 28, count 0 2006.229.19:24:54.55#ibcon#about to read 5, iclass 28, count 0 2006.229.19:24:54.55#ibcon#read 5, iclass 28, count 0 2006.229.19:24:54.55#ibcon#about to read 6, iclass 28, count 0 2006.229.19:24:54.55#ibcon#read 6, iclass 28, count 0 2006.229.19:24:54.55#ibcon#end of sib2, iclass 28, count 0 2006.229.19:24:54.55#ibcon#*after write, iclass 28, count 0 2006.229.19:24:54.55#ibcon#*before return 0, iclass 28, count 0 2006.229.19:24:54.55#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:54.55#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:24:54.55#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:24:54.55#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:24:54.55$vck44/vblo=6,719.99 2006.229.19:24:54.55#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.19:24:54.55#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.19:24:54.55#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:54.55#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:54.55#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:54.55#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:54.55#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:24:54.55#ibcon#first serial, iclass 30, count 0 2006.229.19:24:54.55#ibcon#enter sib2, iclass 30, count 0 2006.229.19:24:54.55#ibcon#flushed, iclass 30, count 0 2006.229.19:24:54.55#ibcon#about to write, iclass 30, count 0 2006.229.19:24:54.55#ibcon#wrote, iclass 30, count 0 2006.229.19:24:54.55#ibcon#about to read 3, iclass 30, count 0 2006.229.19:24:54.57#ibcon#read 3, iclass 30, count 0 2006.229.19:24:54.57#ibcon#about to read 4, iclass 30, count 0 2006.229.19:24:54.57#ibcon#read 4, iclass 30, count 0 2006.229.19:24:54.57#ibcon#about to read 5, iclass 30, count 0 2006.229.19:24:54.57#ibcon#read 5, iclass 30, count 0 2006.229.19:24:54.57#ibcon#about to read 6, iclass 30, count 0 2006.229.19:24:54.57#ibcon#read 6, iclass 30, count 0 2006.229.19:24:54.57#ibcon#end of sib2, iclass 30, count 0 2006.229.19:24:54.57#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:24:54.57#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:24:54.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:24:54.57#ibcon#*before write, iclass 30, count 0 2006.229.19:24:54.57#ibcon#enter sib2, iclass 30, count 0 2006.229.19:24:54.57#ibcon#flushed, iclass 30, count 0 2006.229.19:24:54.57#ibcon#about to write, iclass 30, count 0 2006.229.19:24:54.57#ibcon#wrote, iclass 30, count 0 2006.229.19:24:54.57#ibcon#about to read 3, iclass 30, count 0 2006.229.19:24:54.61#ibcon#read 3, iclass 30, count 0 2006.229.19:24:54.61#ibcon#about to read 4, iclass 30, count 0 2006.229.19:24:54.61#ibcon#read 4, iclass 30, count 0 2006.229.19:24:54.61#ibcon#about to read 5, iclass 30, count 0 2006.229.19:24:54.61#ibcon#read 5, iclass 30, count 0 2006.229.19:24:54.61#ibcon#about to read 6, iclass 30, count 0 2006.229.19:24:54.61#ibcon#read 6, iclass 30, count 0 2006.229.19:24:54.61#ibcon#end of sib2, iclass 30, count 0 2006.229.19:24:54.61#ibcon#*after write, iclass 30, count 0 2006.229.19:24:54.61#ibcon#*before return 0, iclass 30, count 0 2006.229.19:24:54.61#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:54.61#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:24:54.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:24:54.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:24:54.61$vck44/vb=6,4 2006.229.19:24:54.61#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.19:24:54.61#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.19:24:54.61#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:54.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:54.67#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:54.67#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:54.67#ibcon#enter wrdev, iclass 32, count 2 2006.229.19:24:54.67#ibcon#first serial, iclass 32, count 2 2006.229.19:24:54.67#ibcon#enter sib2, iclass 32, count 2 2006.229.19:24:54.67#ibcon#flushed, iclass 32, count 2 2006.229.19:24:54.67#ibcon#about to write, iclass 32, count 2 2006.229.19:24:54.67#ibcon#wrote, iclass 32, count 2 2006.229.19:24:54.67#ibcon#about to read 3, iclass 32, count 2 2006.229.19:24:54.69#ibcon#read 3, iclass 32, count 2 2006.229.19:24:54.69#ibcon#about to read 4, iclass 32, count 2 2006.229.19:24:54.69#ibcon#read 4, iclass 32, count 2 2006.229.19:24:54.69#ibcon#about to read 5, iclass 32, count 2 2006.229.19:24:54.69#ibcon#read 5, iclass 32, count 2 2006.229.19:24:54.69#ibcon#about to read 6, iclass 32, count 2 2006.229.19:24:54.69#ibcon#read 6, iclass 32, count 2 2006.229.19:24:54.69#ibcon#end of sib2, iclass 32, count 2 2006.229.19:24:54.69#ibcon#*mode == 0, iclass 32, count 2 2006.229.19:24:54.69#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.19:24:54.69#ibcon#[27=AT06-04\r\n] 2006.229.19:24:54.69#ibcon#*before write, iclass 32, count 2 2006.229.19:24:54.69#ibcon#enter sib2, iclass 32, count 2 2006.229.19:24:54.69#ibcon#flushed, iclass 32, count 2 2006.229.19:24:54.69#ibcon#about to write, iclass 32, count 2 2006.229.19:24:54.69#ibcon#wrote, iclass 32, count 2 2006.229.19:24:54.69#ibcon#about to read 3, iclass 32, count 2 2006.229.19:24:54.72#ibcon#read 3, iclass 32, count 2 2006.229.19:24:54.72#ibcon#about to read 4, iclass 32, count 2 2006.229.19:24:54.72#ibcon#read 4, iclass 32, count 2 2006.229.19:24:54.72#ibcon#about to read 5, iclass 32, count 2 2006.229.19:24:54.72#ibcon#read 5, iclass 32, count 2 2006.229.19:24:54.72#ibcon#about to read 6, iclass 32, count 2 2006.229.19:24:54.72#ibcon#read 6, iclass 32, count 2 2006.229.19:24:54.72#ibcon#end of sib2, iclass 32, count 2 2006.229.19:24:54.72#ibcon#*after write, iclass 32, count 2 2006.229.19:24:54.72#ibcon#*before return 0, iclass 32, count 2 2006.229.19:24:54.72#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:54.72#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:24:54.72#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.19:24:54.72#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:54.72#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:54.84#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:54.84#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:54.84#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:24:54.84#ibcon#first serial, iclass 32, count 0 2006.229.19:24:54.84#ibcon#enter sib2, iclass 32, count 0 2006.229.19:24:54.84#ibcon#flushed, iclass 32, count 0 2006.229.19:24:54.84#ibcon#about to write, iclass 32, count 0 2006.229.19:24:54.84#ibcon#wrote, iclass 32, count 0 2006.229.19:24:54.84#ibcon#about to read 3, iclass 32, count 0 2006.229.19:24:54.86#ibcon#read 3, iclass 32, count 0 2006.229.19:24:54.86#ibcon#about to read 4, iclass 32, count 0 2006.229.19:24:54.86#ibcon#read 4, iclass 32, count 0 2006.229.19:24:54.86#ibcon#about to read 5, iclass 32, count 0 2006.229.19:24:54.86#ibcon#read 5, iclass 32, count 0 2006.229.19:24:54.86#ibcon#about to read 6, iclass 32, count 0 2006.229.19:24:54.86#ibcon#read 6, iclass 32, count 0 2006.229.19:24:54.86#ibcon#end of sib2, iclass 32, count 0 2006.229.19:24:54.86#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:24:54.86#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:24:54.86#ibcon#[27=USB\r\n] 2006.229.19:24:54.86#ibcon#*before write, iclass 32, count 0 2006.229.19:24:54.86#ibcon#enter sib2, iclass 32, count 0 2006.229.19:24:54.86#ibcon#flushed, iclass 32, count 0 2006.229.19:24:54.86#ibcon#about to write, iclass 32, count 0 2006.229.19:24:54.86#ibcon#wrote, iclass 32, count 0 2006.229.19:24:54.86#ibcon#about to read 3, iclass 32, count 0 2006.229.19:24:54.89#ibcon#read 3, iclass 32, count 0 2006.229.19:24:54.89#ibcon#about to read 4, iclass 32, count 0 2006.229.19:24:54.89#ibcon#read 4, iclass 32, count 0 2006.229.19:24:54.89#ibcon#about to read 5, iclass 32, count 0 2006.229.19:24:54.89#ibcon#read 5, iclass 32, count 0 2006.229.19:24:54.89#ibcon#about to read 6, iclass 32, count 0 2006.229.19:24:54.89#ibcon#read 6, iclass 32, count 0 2006.229.19:24:54.89#ibcon#end of sib2, iclass 32, count 0 2006.229.19:24:54.89#ibcon#*after write, iclass 32, count 0 2006.229.19:24:54.89#ibcon#*before return 0, iclass 32, count 0 2006.229.19:24:54.89#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:54.89#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:24:54.89#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:24:54.89#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:24:54.89$vck44/vblo=7,734.99 2006.229.19:24:54.89#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.19:24:54.89#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.19:24:54.89#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:54.89#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:54.89#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:54.89#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:54.89#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:24:54.89#ibcon#first serial, iclass 34, count 0 2006.229.19:24:54.89#ibcon#enter sib2, iclass 34, count 0 2006.229.19:24:54.89#ibcon#flushed, iclass 34, count 0 2006.229.19:24:54.89#ibcon#about to write, iclass 34, count 0 2006.229.19:24:54.89#ibcon#wrote, iclass 34, count 0 2006.229.19:24:54.89#ibcon#about to read 3, iclass 34, count 0 2006.229.19:24:54.91#ibcon#read 3, iclass 34, count 0 2006.229.19:24:54.91#ibcon#about to read 4, iclass 34, count 0 2006.229.19:24:54.91#ibcon#read 4, iclass 34, count 0 2006.229.19:24:54.91#ibcon#about to read 5, iclass 34, count 0 2006.229.19:24:54.91#ibcon#read 5, iclass 34, count 0 2006.229.19:24:54.91#ibcon#about to read 6, iclass 34, count 0 2006.229.19:24:54.91#ibcon#read 6, iclass 34, count 0 2006.229.19:24:54.91#ibcon#end of sib2, iclass 34, count 0 2006.229.19:24:54.91#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:24:54.91#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:24:54.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:24:54.91#ibcon#*before write, iclass 34, count 0 2006.229.19:24:54.91#ibcon#enter sib2, iclass 34, count 0 2006.229.19:24:54.91#ibcon#flushed, iclass 34, count 0 2006.229.19:24:54.91#ibcon#about to write, iclass 34, count 0 2006.229.19:24:54.91#ibcon#wrote, iclass 34, count 0 2006.229.19:24:54.91#ibcon#about to read 3, iclass 34, count 0 2006.229.19:24:54.95#ibcon#read 3, iclass 34, count 0 2006.229.19:24:54.95#ibcon#about to read 4, iclass 34, count 0 2006.229.19:24:54.95#ibcon#read 4, iclass 34, count 0 2006.229.19:24:54.95#ibcon#about to read 5, iclass 34, count 0 2006.229.19:24:54.95#ibcon#read 5, iclass 34, count 0 2006.229.19:24:54.95#ibcon#about to read 6, iclass 34, count 0 2006.229.19:24:54.95#ibcon#read 6, iclass 34, count 0 2006.229.19:24:54.95#ibcon#end of sib2, iclass 34, count 0 2006.229.19:24:54.95#ibcon#*after write, iclass 34, count 0 2006.229.19:24:54.95#ibcon#*before return 0, iclass 34, count 0 2006.229.19:24:54.95#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:54.95#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:24:54.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:24:54.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:24:54.95$vck44/vb=7,4 2006.229.19:24:54.95#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.19:24:54.95#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.19:24:54.95#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:54.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:55.01#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:55.01#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:55.01#ibcon#enter wrdev, iclass 36, count 2 2006.229.19:24:55.01#ibcon#first serial, iclass 36, count 2 2006.229.19:24:55.01#ibcon#enter sib2, iclass 36, count 2 2006.229.19:24:55.01#ibcon#flushed, iclass 36, count 2 2006.229.19:24:55.01#ibcon#about to write, iclass 36, count 2 2006.229.19:24:55.01#ibcon#wrote, iclass 36, count 2 2006.229.19:24:55.01#ibcon#about to read 3, iclass 36, count 2 2006.229.19:24:55.03#ibcon#read 3, iclass 36, count 2 2006.229.19:24:55.03#ibcon#about to read 4, iclass 36, count 2 2006.229.19:24:55.03#ibcon#read 4, iclass 36, count 2 2006.229.19:24:55.03#ibcon#about to read 5, iclass 36, count 2 2006.229.19:24:55.03#ibcon#read 5, iclass 36, count 2 2006.229.19:24:55.03#ibcon#about to read 6, iclass 36, count 2 2006.229.19:24:55.03#ibcon#read 6, iclass 36, count 2 2006.229.19:24:55.03#ibcon#end of sib2, iclass 36, count 2 2006.229.19:24:55.03#ibcon#*mode == 0, iclass 36, count 2 2006.229.19:24:55.03#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.19:24:55.03#ibcon#[27=AT07-04\r\n] 2006.229.19:24:55.03#ibcon#*before write, iclass 36, count 2 2006.229.19:24:55.03#ibcon#enter sib2, iclass 36, count 2 2006.229.19:24:55.03#ibcon#flushed, iclass 36, count 2 2006.229.19:24:55.03#ibcon#about to write, iclass 36, count 2 2006.229.19:24:55.03#ibcon#wrote, iclass 36, count 2 2006.229.19:24:55.03#ibcon#about to read 3, iclass 36, count 2 2006.229.19:24:55.06#ibcon#read 3, iclass 36, count 2 2006.229.19:24:55.06#ibcon#about to read 4, iclass 36, count 2 2006.229.19:24:55.06#ibcon#read 4, iclass 36, count 2 2006.229.19:24:55.06#ibcon#about to read 5, iclass 36, count 2 2006.229.19:24:55.06#ibcon#read 5, iclass 36, count 2 2006.229.19:24:55.06#ibcon#about to read 6, iclass 36, count 2 2006.229.19:24:55.06#ibcon#read 6, iclass 36, count 2 2006.229.19:24:55.06#ibcon#end of sib2, iclass 36, count 2 2006.229.19:24:55.06#ibcon#*after write, iclass 36, count 2 2006.229.19:24:55.06#ibcon#*before return 0, iclass 36, count 2 2006.229.19:24:55.06#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:55.06#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:24:55.06#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.19:24:55.06#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:55.06#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:55.18#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:55.18#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:55.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:24:55.18#ibcon#first serial, iclass 36, count 0 2006.229.19:24:55.18#ibcon#enter sib2, iclass 36, count 0 2006.229.19:24:55.18#ibcon#flushed, iclass 36, count 0 2006.229.19:24:55.18#ibcon#about to write, iclass 36, count 0 2006.229.19:24:55.18#ibcon#wrote, iclass 36, count 0 2006.229.19:24:55.18#ibcon#about to read 3, iclass 36, count 0 2006.229.19:24:55.20#ibcon#read 3, iclass 36, count 0 2006.229.19:24:55.20#ibcon#about to read 4, iclass 36, count 0 2006.229.19:24:55.20#ibcon#read 4, iclass 36, count 0 2006.229.19:24:55.20#ibcon#about to read 5, iclass 36, count 0 2006.229.19:24:55.20#ibcon#read 5, iclass 36, count 0 2006.229.19:24:55.20#ibcon#about to read 6, iclass 36, count 0 2006.229.19:24:55.20#ibcon#read 6, iclass 36, count 0 2006.229.19:24:55.20#ibcon#end of sib2, iclass 36, count 0 2006.229.19:24:55.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:24:55.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:24:55.20#ibcon#[27=USB\r\n] 2006.229.19:24:55.20#ibcon#*before write, iclass 36, count 0 2006.229.19:24:55.20#ibcon#enter sib2, iclass 36, count 0 2006.229.19:24:55.20#ibcon#flushed, iclass 36, count 0 2006.229.19:24:55.20#ibcon#about to write, iclass 36, count 0 2006.229.19:24:55.20#ibcon#wrote, iclass 36, count 0 2006.229.19:24:55.20#ibcon#about to read 3, iclass 36, count 0 2006.229.19:24:55.23#ibcon#read 3, iclass 36, count 0 2006.229.19:24:55.23#ibcon#about to read 4, iclass 36, count 0 2006.229.19:24:55.23#ibcon#read 4, iclass 36, count 0 2006.229.19:24:55.23#ibcon#about to read 5, iclass 36, count 0 2006.229.19:24:55.23#ibcon#read 5, iclass 36, count 0 2006.229.19:24:55.23#ibcon#about to read 6, iclass 36, count 0 2006.229.19:24:55.23#ibcon#read 6, iclass 36, count 0 2006.229.19:24:55.23#ibcon#end of sib2, iclass 36, count 0 2006.229.19:24:55.23#ibcon#*after write, iclass 36, count 0 2006.229.19:24:55.23#ibcon#*before return 0, iclass 36, count 0 2006.229.19:24:55.23#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:55.23#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:24:55.23#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:24:55.23#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:24:55.23$vck44/vblo=8,744.99 2006.229.19:24:55.23#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:24:55.23#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:24:55.23#ibcon#ireg 17 cls_cnt 0 2006.229.19:24:55.23#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:55.23#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:55.23#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:55.23#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:24:55.23#ibcon#first serial, iclass 38, count 0 2006.229.19:24:55.23#ibcon#enter sib2, iclass 38, count 0 2006.229.19:24:55.23#ibcon#flushed, iclass 38, count 0 2006.229.19:24:55.23#ibcon#about to write, iclass 38, count 0 2006.229.19:24:55.23#ibcon#wrote, iclass 38, count 0 2006.229.19:24:55.23#ibcon#about to read 3, iclass 38, count 0 2006.229.19:24:55.25#ibcon#read 3, iclass 38, count 0 2006.229.19:24:55.25#ibcon#about to read 4, iclass 38, count 0 2006.229.19:24:55.25#ibcon#read 4, iclass 38, count 0 2006.229.19:24:55.25#ibcon#about to read 5, iclass 38, count 0 2006.229.19:24:55.25#ibcon#read 5, iclass 38, count 0 2006.229.19:24:55.25#ibcon#about to read 6, iclass 38, count 0 2006.229.19:24:55.25#ibcon#read 6, iclass 38, count 0 2006.229.19:24:55.25#ibcon#end of sib2, iclass 38, count 0 2006.229.19:24:55.25#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:24:55.25#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:24:55.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:24:55.25#ibcon#*before write, iclass 38, count 0 2006.229.19:24:55.25#ibcon#enter sib2, iclass 38, count 0 2006.229.19:24:55.25#ibcon#flushed, iclass 38, count 0 2006.229.19:24:55.25#ibcon#about to write, iclass 38, count 0 2006.229.19:24:55.25#ibcon#wrote, iclass 38, count 0 2006.229.19:24:55.25#ibcon#about to read 3, iclass 38, count 0 2006.229.19:24:55.29#ibcon#read 3, iclass 38, count 0 2006.229.19:24:55.29#ibcon#about to read 4, iclass 38, count 0 2006.229.19:24:55.29#ibcon#read 4, iclass 38, count 0 2006.229.19:24:55.29#ibcon#about to read 5, iclass 38, count 0 2006.229.19:24:55.29#ibcon#read 5, iclass 38, count 0 2006.229.19:24:55.29#ibcon#about to read 6, iclass 38, count 0 2006.229.19:24:55.29#ibcon#read 6, iclass 38, count 0 2006.229.19:24:55.29#ibcon#end of sib2, iclass 38, count 0 2006.229.19:24:55.29#ibcon#*after write, iclass 38, count 0 2006.229.19:24:55.29#ibcon#*before return 0, iclass 38, count 0 2006.229.19:24:55.29#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:55.29#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:24:55.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:24:55.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:24:55.29$vck44/vb=8,4 2006.229.19:24:55.29#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.19:24:55.29#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.19:24:55.29#ibcon#ireg 11 cls_cnt 2 2006.229.19:24:55.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:55.35#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:55.35#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:55.35#ibcon#enter wrdev, iclass 40, count 2 2006.229.19:24:55.35#ibcon#first serial, iclass 40, count 2 2006.229.19:24:55.35#ibcon#enter sib2, iclass 40, count 2 2006.229.19:24:55.35#ibcon#flushed, iclass 40, count 2 2006.229.19:24:55.35#ibcon#about to write, iclass 40, count 2 2006.229.19:24:55.35#ibcon#wrote, iclass 40, count 2 2006.229.19:24:55.35#ibcon#about to read 3, iclass 40, count 2 2006.229.19:24:55.37#ibcon#read 3, iclass 40, count 2 2006.229.19:24:55.37#ibcon#about to read 4, iclass 40, count 2 2006.229.19:24:55.37#ibcon#read 4, iclass 40, count 2 2006.229.19:24:55.37#ibcon#about to read 5, iclass 40, count 2 2006.229.19:24:55.37#ibcon#read 5, iclass 40, count 2 2006.229.19:24:55.37#ibcon#about to read 6, iclass 40, count 2 2006.229.19:24:55.37#ibcon#read 6, iclass 40, count 2 2006.229.19:24:55.37#ibcon#end of sib2, iclass 40, count 2 2006.229.19:24:55.37#ibcon#*mode == 0, iclass 40, count 2 2006.229.19:24:55.37#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.19:24:55.37#ibcon#[27=AT08-04\r\n] 2006.229.19:24:55.37#ibcon#*before write, iclass 40, count 2 2006.229.19:24:55.37#ibcon#enter sib2, iclass 40, count 2 2006.229.19:24:55.37#ibcon#flushed, iclass 40, count 2 2006.229.19:24:55.37#ibcon#about to write, iclass 40, count 2 2006.229.19:24:55.37#ibcon#wrote, iclass 40, count 2 2006.229.19:24:55.37#ibcon#about to read 3, iclass 40, count 2 2006.229.19:24:55.40#ibcon#read 3, iclass 40, count 2 2006.229.19:24:55.40#ibcon#about to read 4, iclass 40, count 2 2006.229.19:24:55.40#ibcon#read 4, iclass 40, count 2 2006.229.19:24:55.40#ibcon#about to read 5, iclass 40, count 2 2006.229.19:24:55.40#ibcon#read 5, iclass 40, count 2 2006.229.19:24:55.40#ibcon#about to read 6, iclass 40, count 2 2006.229.19:24:55.40#ibcon#read 6, iclass 40, count 2 2006.229.19:24:55.40#ibcon#end of sib2, iclass 40, count 2 2006.229.19:24:55.40#ibcon#*after write, iclass 40, count 2 2006.229.19:24:55.40#ibcon#*before return 0, iclass 40, count 2 2006.229.19:24:55.40#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:55.40#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:24:55.40#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.19:24:55.40#ibcon#ireg 7 cls_cnt 0 2006.229.19:24:55.40#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:55.52#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:55.52#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:55.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:24:55.52#ibcon#first serial, iclass 40, count 0 2006.229.19:24:55.52#ibcon#enter sib2, iclass 40, count 0 2006.229.19:24:55.52#ibcon#flushed, iclass 40, count 0 2006.229.19:24:55.52#ibcon#about to write, iclass 40, count 0 2006.229.19:24:55.52#ibcon#wrote, iclass 40, count 0 2006.229.19:24:55.52#ibcon#about to read 3, iclass 40, count 0 2006.229.19:24:55.54#ibcon#read 3, iclass 40, count 0 2006.229.19:24:55.54#ibcon#about to read 4, iclass 40, count 0 2006.229.19:24:55.54#ibcon#read 4, iclass 40, count 0 2006.229.19:24:55.54#ibcon#about to read 5, iclass 40, count 0 2006.229.19:24:55.54#ibcon#read 5, iclass 40, count 0 2006.229.19:24:55.54#ibcon#about to read 6, iclass 40, count 0 2006.229.19:24:55.54#ibcon#read 6, iclass 40, count 0 2006.229.19:24:55.54#ibcon#end of sib2, iclass 40, count 0 2006.229.19:24:55.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:24:55.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:24:55.54#ibcon#[27=USB\r\n] 2006.229.19:24:55.54#ibcon#*before write, iclass 40, count 0 2006.229.19:24:55.54#ibcon#enter sib2, iclass 40, count 0 2006.229.19:24:55.54#ibcon#flushed, iclass 40, count 0 2006.229.19:24:55.54#ibcon#about to write, iclass 40, count 0 2006.229.19:24:55.54#ibcon#wrote, iclass 40, count 0 2006.229.19:24:55.54#ibcon#about to read 3, iclass 40, count 0 2006.229.19:24:55.57#ibcon#read 3, iclass 40, count 0 2006.229.19:24:55.57#ibcon#about to read 4, iclass 40, count 0 2006.229.19:24:55.57#ibcon#read 4, iclass 40, count 0 2006.229.19:24:55.57#ibcon#about to read 5, iclass 40, count 0 2006.229.19:24:55.57#ibcon#read 5, iclass 40, count 0 2006.229.19:24:55.57#ibcon#about to read 6, iclass 40, count 0 2006.229.19:24:55.57#ibcon#read 6, iclass 40, count 0 2006.229.19:24:55.57#ibcon#end of sib2, iclass 40, count 0 2006.229.19:24:55.57#ibcon#*after write, iclass 40, count 0 2006.229.19:24:55.57#ibcon#*before return 0, iclass 40, count 0 2006.229.19:24:55.57#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:55.57#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:24:55.57#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:24:55.57#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:24:55.57$vck44/vabw=wide 2006.229.19:24:55.57#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.19:24:55.57#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.19:24:55.57#ibcon#ireg 8 cls_cnt 0 2006.229.19:24:55.57#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:55.57#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:55.57#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:55.57#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:24:55.57#ibcon#first serial, iclass 4, count 0 2006.229.19:24:55.57#ibcon#enter sib2, iclass 4, count 0 2006.229.19:24:55.57#ibcon#flushed, iclass 4, count 0 2006.229.19:24:55.57#ibcon#about to write, iclass 4, count 0 2006.229.19:24:55.57#ibcon#wrote, iclass 4, count 0 2006.229.19:24:55.57#ibcon#about to read 3, iclass 4, count 0 2006.229.19:24:55.59#ibcon#read 3, iclass 4, count 0 2006.229.19:24:55.59#ibcon#about to read 4, iclass 4, count 0 2006.229.19:24:55.59#ibcon#read 4, iclass 4, count 0 2006.229.19:24:55.59#ibcon#about to read 5, iclass 4, count 0 2006.229.19:24:55.59#ibcon#read 5, iclass 4, count 0 2006.229.19:24:55.59#ibcon#about to read 6, iclass 4, count 0 2006.229.19:24:55.59#ibcon#read 6, iclass 4, count 0 2006.229.19:24:55.59#ibcon#end of sib2, iclass 4, count 0 2006.229.19:24:55.59#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:24:55.59#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:24:55.59#ibcon#[25=BW32\r\n] 2006.229.19:24:55.59#ibcon#*before write, iclass 4, count 0 2006.229.19:24:55.59#ibcon#enter sib2, iclass 4, count 0 2006.229.19:24:55.59#ibcon#flushed, iclass 4, count 0 2006.229.19:24:55.59#ibcon#about to write, iclass 4, count 0 2006.229.19:24:55.59#ibcon#wrote, iclass 4, count 0 2006.229.19:24:55.59#ibcon#about to read 3, iclass 4, count 0 2006.229.19:24:55.62#ibcon#read 3, iclass 4, count 0 2006.229.19:24:55.62#ibcon#about to read 4, iclass 4, count 0 2006.229.19:24:55.62#ibcon#read 4, iclass 4, count 0 2006.229.19:24:55.62#ibcon#about to read 5, iclass 4, count 0 2006.229.19:24:55.62#ibcon#read 5, iclass 4, count 0 2006.229.19:24:55.62#ibcon#about to read 6, iclass 4, count 0 2006.229.19:24:55.62#ibcon#read 6, iclass 4, count 0 2006.229.19:24:55.62#ibcon#end of sib2, iclass 4, count 0 2006.229.19:24:55.62#ibcon#*after write, iclass 4, count 0 2006.229.19:24:55.62#ibcon#*before return 0, iclass 4, count 0 2006.229.19:24:55.62#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:55.62#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:24:55.62#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:24:55.62#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:24:55.62$vck44/vbbw=wide 2006.229.19:24:55.62#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.19:24:55.62#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.19:24:55.62#ibcon#ireg 8 cls_cnt 0 2006.229.19:24:55.62#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:24:55.69#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:24:55.69#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:24:55.69#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:24:55.69#ibcon#first serial, iclass 6, count 0 2006.229.19:24:55.69#ibcon#enter sib2, iclass 6, count 0 2006.229.19:24:55.69#ibcon#flushed, iclass 6, count 0 2006.229.19:24:55.69#ibcon#about to write, iclass 6, count 0 2006.229.19:24:55.69#ibcon#wrote, iclass 6, count 0 2006.229.19:24:55.69#ibcon#about to read 3, iclass 6, count 0 2006.229.19:24:55.71#ibcon#read 3, iclass 6, count 0 2006.229.19:24:55.71#ibcon#about to read 4, iclass 6, count 0 2006.229.19:24:55.71#ibcon#read 4, iclass 6, count 0 2006.229.19:24:55.71#ibcon#about to read 5, iclass 6, count 0 2006.229.19:24:55.71#ibcon#read 5, iclass 6, count 0 2006.229.19:24:55.71#ibcon#about to read 6, iclass 6, count 0 2006.229.19:24:55.71#ibcon#read 6, iclass 6, count 0 2006.229.19:24:55.71#ibcon#end of sib2, iclass 6, count 0 2006.229.19:24:55.71#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:24:55.71#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:24:55.71#ibcon#[27=BW32\r\n] 2006.229.19:24:55.71#ibcon#*before write, iclass 6, count 0 2006.229.19:24:55.71#ibcon#enter sib2, iclass 6, count 0 2006.229.19:24:55.71#ibcon#flushed, iclass 6, count 0 2006.229.19:24:55.71#ibcon#about to write, iclass 6, count 0 2006.229.19:24:55.71#ibcon#wrote, iclass 6, count 0 2006.229.19:24:55.71#ibcon#about to read 3, iclass 6, count 0 2006.229.19:24:55.74#ibcon#read 3, iclass 6, count 0 2006.229.19:24:55.74#ibcon#about to read 4, iclass 6, count 0 2006.229.19:24:55.74#ibcon#read 4, iclass 6, count 0 2006.229.19:24:55.74#ibcon#about to read 5, iclass 6, count 0 2006.229.19:24:55.74#ibcon#read 5, iclass 6, count 0 2006.229.19:24:55.74#ibcon#about to read 6, iclass 6, count 0 2006.229.19:24:55.74#ibcon#read 6, iclass 6, count 0 2006.229.19:24:55.74#ibcon#end of sib2, iclass 6, count 0 2006.229.19:24:55.74#ibcon#*after write, iclass 6, count 0 2006.229.19:24:55.74#ibcon#*before return 0, iclass 6, count 0 2006.229.19:24:55.74#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:24:55.74#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:24:55.74#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:24:55.74#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:24:55.74$setupk4/ifdk4 2006.229.19:24:55.74$ifdk4/lo= 2006.229.19:24:55.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:24:55.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:24:55.74$ifdk4/patch= 2006.229.19:24:55.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:24:55.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:24:55.74$setupk4/!*+20s 2006.229.19:24:58.02#abcon#<5=/07 1.3 2.6 26.091001001.5\r\n> 2006.229.19:24:58.04#abcon#{5=INTERFACE CLEAR} 2006.229.19:24:58.10#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:25:08.19#abcon#<5=/07 1.3 2.6 26.091001001.5\r\n> 2006.229.19:25:08.21#abcon#{5=INTERFACE CLEAR} 2006.229.19:25:08.27#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:25:10.24$setupk4/"tpicd 2006.229.19:25:10.24$setupk4/echo=off 2006.229.19:25:10.24$setupk4/xlog=off 2006.229.19:25:10.24:!2006.229.19:29:47 2006.229.19:25:42.14#trakl#Source acquired 2006.229.19:25:42.14#flagr#flagr/antenna,acquired 2006.229.19:29:47.00:preob 2006.229.19:29:47.14/onsource/TRACKING 2006.229.19:29:47.14:!2006.229.19:29:57 2006.229.19:29:57.00:"tape 2006.229.19:29:57.00:"st=record 2006.229.19:29:57.00:data_valid=on 2006.229.19:29:57.00:midob 2006.229.19:29:57.14/onsource/TRACKING 2006.229.19:29:57.14/wx/26.07,1001.5,100 2006.229.19:29:57.22/cable/+6.4196E-03 2006.229.19:29:58.31/va/01,08,usb,yes,29,31 2006.229.19:29:58.31/va/02,07,usb,yes,32,32 2006.229.19:29:58.31/va/03,06,usb,yes,39,42 2006.229.19:29:58.31/va/04,07,usb,yes,33,34 2006.229.19:29:58.31/va/05,04,usb,yes,29,29 2006.229.19:29:58.31/va/06,04,usb,yes,33,32 2006.229.19:29:58.31/va/07,05,usb,yes,29,29 2006.229.19:29:58.31/va/08,06,usb,yes,21,26 2006.229.19:29:58.54/valo/01,524.99,yes,locked 2006.229.19:29:58.54/valo/02,534.99,yes,locked 2006.229.19:29:58.54/valo/03,564.99,yes,locked 2006.229.19:29:58.54/valo/04,624.99,yes,locked 2006.229.19:29:58.54/valo/05,734.99,yes,locked 2006.229.19:29:58.54/valo/06,814.99,yes,locked 2006.229.19:29:58.54/valo/07,864.99,yes,locked 2006.229.19:29:58.54/valo/08,884.99,yes,locked 2006.229.19:29:59.63/vb/01,04,usb,yes,31,29 2006.229.19:29:59.63/vb/02,04,usb,yes,33,33 2006.229.19:29:59.63/vb/03,04,usb,yes,30,33 2006.229.19:29:59.63/vb/04,04,usb,yes,35,33 2006.229.19:29:59.63/vb/05,04,usb,yes,27,29 2006.229.19:29:59.63/vb/06,04,usb,yes,31,27 2006.229.19:29:59.63/vb/07,04,usb,yes,31,31 2006.229.19:29:59.63/vb/08,04,usb,yes,29,32 2006.229.19:29:59.87/vblo/01,629.99,yes,locked 2006.229.19:29:59.87/vblo/02,634.99,yes,locked 2006.229.19:29:59.87/vblo/03,649.99,yes,locked 2006.229.19:29:59.87/vblo/04,679.99,yes,locked 2006.229.19:29:59.87/vblo/05,709.99,yes,locked 2006.229.19:29:59.87/vblo/06,719.99,yes,locked 2006.229.19:29:59.87/vblo/07,734.99,yes,locked 2006.229.19:29:59.87/vblo/08,744.99,yes,locked 2006.229.19:30:00.02/vabw/8 2006.229.19:30:00.17/vbbw/8 2006.229.19:30:00.26/xfe/off,on,12.0 2006.229.19:30:00.65/ifatt/23,28,28,28 2006.229.19:30:01.08/fmout-gps/S +4.45E-07 2006.229.19:30:01.12:!2006.229.19:30:47 2006.229.19:30:47.00:data_valid=off 2006.229.19:30:47.00:"et 2006.229.19:30:47.00:!+3s 2006.229.19:30:50.01:"tape 2006.229.19:30:50.01:postob 2006.229.19:30:50.15/cable/+6.4194E-03 2006.229.19:30:50.15/wx/26.07,1001.5,100 2006.229.19:30:51.08/fmout-gps/S +4.45E-07 2006.229.19:30:51.08:scan_name=229-1933,jd0608,100 2006.229.19:30:51.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.19:30:52.13#flagr#flagr/antenna,new-source 2006.229.19:30:52.13:checkk5 2006.229.19:30:52.48/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:30:52.87/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:30:53.29/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:30:53.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:30:54.09/chk_obsdata//k5ts1/T2291929??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.19:30:54.49/chk_obsdata//k5ts2/T2291929??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.19:30:54.89/chk_obsdata//k5ts3/T2291929??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.19:30:55.31/chk_obsdata//k5ts4/T2291929??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.19:30:56.02/k5log//k5ts1_log_newline 2006.229.19:30:56.73/k5log//k5ts2_log_newline 2006.229.19:30:57.47/k5log//k5ts3_log_newline 2006.229.19:30:58.20/k5log//k5ts4_log_newline 2006.229.19:30:58.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:30:58.22:setupk4=1 2006.229.19:30:58.22$setupk4/echo=on 2006.229.19:30:58.22$setupk4/pcalon 2006.229.19:30:58.22$pcalon/"no phase cal control is implemented here 2006.229.19:30:58.22$setupk4/"tpicd=stop 2006.229.19:30:58.22$setupk4/"rec=synch_on 2006.229.19:30:58.22$setupk4/"rec_mode=128 2006.229.19:30:58.22$setupk4/!* 2006.229.19:30:58.22$setupk4/recpk4 2006.229.19:30:58.22$recpk4/recpatch= 2006.229.19:30:58.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:30:58.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:30:58.23$setupk4/vck44 2006.229.19:30:58.23$vck44/valo=1,524.99 2006.229.19:30:58.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.19:30:58.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.19:30:58.23#ibcon#ireg 17 cls_cnt 0 2006.229.19:30:58.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:30:58.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:30:58.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:30:58.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:30:58.23#ibcon#first serial, iclass 13, count 0 2006.229.19:30:58.23#ibcon#enter sib2, iclass 13, count 0 2006.229.19:30:58.23#ibcon#flushed, iclass 13, count 0 2006.229.19:30:58.23#ibcon#about to write, iclass 13, count 0 2006.229.19:30:58.23#ibcon#wrote, iclass 13, count 0 2006.229.19:30:58.23#ibcon#about to read 3, iclass 13, count 0 2006.229.19:30:58.25#ibcon#read 3, iclass 13, count 0 2006.229.19:30:58.25#ibcon#about to read 4, iclass 13, count 0 2006.229.19:30:58.25#ibcon#read 4, iclass 13, count 0 2006.229.19:30:58.25#ibcon#about to read 5, iclass 13, count 0 2006.229.19:30:58.25#ibcon#read 5, iclass 13, count 0 2006.229.19:30:58.25#ibcon#about to read 6, iclass 13, count 0 2006.229.19:30:58.25#ibcon#read 6, iclass 13, count 0 2006.229.19:30:58.25#ibcon#end of sib2, iclass 13, count 0 2006.229.19:30:58.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:30:58.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:30:58.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:30:58.25#ibcon#*before write, iclass 13, count 0 2006.229.19:30:58.25#ibcon#enter sib2, iclass 13, count 0 2006.229.19:30:58.25#ibcon#flushed, iclass 13, count 0 2006.229.19:30:58.25#ibcon#about to write, iclass 13, count 0 2006.229.19:30:58.25#ibcon#wrote, iclass 13, count 0 2006.229.19:30:58.25#ibcon#about to read 3, iclass 13, count 0 2006.229.19:30:58.30#ibcon#read 3, iclass 13, count 0 2006.229.19:30:58.30#ibcon#about to read 4, iclass 13, count 0 2006.229.19:30:58.30#ibcon#read 4, iclass 13, count 0 2006.229.19:30:58.30#ibcon#about to read 5, iclass 13, count 0 2006.229.19:30:58.30#ibcon#read 5, iclass 13, count 0 2006.229.19:30:58.30#ibcon#about to read 6, iclass 13, count 0 2006.229.19:30:58.30#ibcon#read 6, iclass 13, count 0 2006.229.19:30:58.30#ibcon#end of sib2, iclass 13, count 0 2006.229.19:30:58.30#ibcon#*after write, iclass 13, count 0 2006.229.19:30:58.30#ibcon#*before return 0, iclass 13, count 0 2006.229.19:30:58.30#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:30:58.30#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:30:58.30#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:30:58.30#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:30:58.30$vck44/va=1,8 2006.229.19:30:58.30#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.19:30:58.30#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.19:30:58.30#ibcon#ireg 11 cls_cnt 2 2006.229.19:30:58.30#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:30:58.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:30:58.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:30:58.30#ibcon#enter wrdev, iclass 15, count 2 2006.229.19:30:58.30#ibcon#first serial, iclass 15, count 2 2006.229.19:30:58.30#ibcon#enter sib2, iclass 15, count 2 2006.229.19:30:58.30#ibcon#flushed, iclass 15, count 2 2006.229.19:30:58.30#ibcon#about to write, iclass 15, count 2 2006.229.19:30:58.30#ibcon#wrote, iclass 15, count 2 2006.229.19:30:58.30#ibcon#about to read 3, iclass 15, count 2 2006.229.19:30:58.32#ibcon#read 3, iclass 15, count 2 2006.229.19:30:58.32#ibcon#about to read 4, iclass 15, count 2 2006.229.19:30:58.32#ibcon#read 4, iclass 15, count 2 2006.229.19:30:58.32#ibcon#about to read 5, iclass 15, count 2 2006.229.19:30:58.32#ibcon#read 5, iclass 15, count 2 2006.229.19:30:58.32#ibcon#about to read 6, iclass 15, count 2 2006.229.19:30:58.32#ibcon#read 6, iclass 15, count 2 2006.229.19:30:58.32#ibcon#end of sib2, iclass 15, count 2 2006.229.19:30:58.32#ibcon#*mode == 0, iclass 15, count 2 2006.229.19:30:58.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.19:30:58.32#ibcon#[25=AT01-08\r\n] 2006.229.19:30:58.32#ibcon#*before write, iclass 15, count 2 2006.229.19:30:58.32#ibcon#enter sib2, iclass 15, count 2 2006.229.19:30:58.32#ibcon#flushed, iclass 15, count 2 2006.229.19:30:58.32#ibcon#about to write, iclass 15, count 2 2006.229.19:30:58.32#ibcon#wrote, iclass 15, count 2 2006.229.19:30:58.32#ibcon#about to read 3, iclass 15, count 2 2006.229.19:30:58.35#ibcon#read 3, iclass 15, count 2 2006.229.19:30:58.35#ibcon#about to read 4, iclass 15, count 2 2006.229.19:30:58.35#ibcon#read 4, iclass 15, count 2 2006.229.19:30:58.35#ibcon#about to read 5, iclass 15, count 2 2006.229.19:30:58.35#ibcon#read 5, iclass 15, count 2 2006.229.19:30:58.35#ibcon#about to read 6, iclass 15, count 2 2006.229.19:30:58.35#ibcon#read 6, iclass 15, count 2 2006.229.19:30:58.35#ibcon#end of sib2, iclass 15, count 2 2006.229.19:30:58.35#ibcon#*after write, iclass 15, count 2 2006.229.19:30:58.35#ibcon#*before return 0, iclass 15, count 2 2006.229.19:30:58.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:30:58.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:30:58.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.19:30:58.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:30:58.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:30:58.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:30:58.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:30:58.47#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:30:58.47#ibcon#first serial, iclass 15, count 0 2006.229.19:30:58.47#ibcon#enter sib2, iclass 15, count 0 2006.229.19:30:58.47#ibcon#flushed, iclass 15, count 0 2006.229.19:30:58.47#ibcon#about to write, iclass 15, count 0 2006.229.19:30:58.47#ibcon#wrote, iclass 15, count 0 2006.229.19:30:58.47#ibcon#about to read 3, iclass 15, count 0 2006.229.19:30:58.49#ibcon#read 3, iclass 15, count 0 2006.229.19:30:58.49#ibcon#about to read 4, iclass 15, count 0 2006.229.19:30:58.49#ibcon#read 4, iclass 15, count 0 2006.229.19:30:58.49#ibcon#about to read 5, iclass 15, count 0 2006.229.19:30:58.49#ibcon#read 5, iclass 15, count 0 2006.229.19:30:58.49#ibcon#about to read 6, iclass 15, count 0 2006.229.19:30:58.49#ibcon#read 6, iclass 15, count 0 2006.229.19:30:58.49#ibcon#end of sib2, iclass 15, count 0 2006.229.19:30:58.49#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:30:58.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:30:58.49#ibcon#[25=USB\r\n] 2006.229.19:30:58.49#ibcon#*before write, iclass 15, count 0 2006.229.19:30:58.49#ibcon#enter sib2, iclass 15, count 0 2006.229.19:30:58.49#ibcon#flushed, iclass 15, count 0 2006.229.19:30:58.49#ibcon#about to write, iclass 15, count 0 2006.229.19:30:58.49#ibcon#wrote, iclass 15, count 0 2006.229.19:30:58.49#ibcon#about to read 3, iclass 15, count 0 2006.229.19:30:58.52#ibcon#read 3, iclass 15, count 0 2006.229.19:30:58.52#ibcon#about to read 4, iclass 15, count 0 2006.229.19:30:58.52#ibcon#read 4, iclass 15, count 0 2006.229.19:30:58.52#ibcon#about to read 5, iclass 15, count 0 2006.229.19:30:58.52#ibcon#read 5, iclass 15, count 0 2006.229.19:30:58.52#ibcon#about to read 6, iclass 15, count 0 2006.229.19:30:58.52#ibcon#read 6, iclass 15, count 0 2006.229.19:30:58.52#ibcon#end of sib2, iclass 15, count 0 2006.229.19:30:58.52#ibcon#*after write, iclass 15, count 0 2006.229.19:30:58.52#ibcon#*before return 0, iclass 15, count 0 2006.229.19:30:58.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:30:58.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:30:58.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:30:58.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:30:58.52$vck44/valo=2,534.99 2006.229.19:30:58.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.19:30:58.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.19:30:58.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:30:58.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:30:58.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:30:58.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:30:58.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:30:58.52#ibcon#first serial, iclass 17, count 0 2006.229.19:30:58.52#ibcon#enter sib2, iclass 17, count 0 2006.229.19:30:58.52#ibcon#flushed, iclass 17, count 0 2006.229.19:30:58.52#ibcon#about to write, iclass 17, count 0 2006.229.19:30:58.52#ibcon#wrote, iclass 17, count 0 2006.229.19:30:58.52#ibcon#about to read 3, iclass 17, count 0 2006.229.19:30:58.54#ibcon#read 3, iclass 17, count 0 2006.229.19:30:58.54#ibcon#about to read 4, iclass 17, count 0 2006.229.19:30:58.54#ibcon#read 4, iclass 17, count 0 2006.229.19:30:58.54#ibcon#about to read 5, iclass 17, count 0 2006.229.19:30:58.54#ibcon#read 5, iclass 17, count 0 2006.229.19:30:58.54#ibcon#about to read 6, iclass 17, count 0 2006.229.19:30:58.54#ibcon#read 6, iclass 17, count 0 2006.229.19:30:58.54#ibcon#end of sib2, iclass 17, count 0 2006.229.19:30:58.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:30:58.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:30:58.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:30:58.54#ibcon#*before write, iclass 17, count 0 2006.229.19:30:58.54#ibcon#enter sib2, iclass 17, count 0 2006.229.19:30:58.54#ibcon#flushed, iclass 17, count 0 2006.229.19:30:58.54#ibcon#about to write, iclass 17, count 0 2006.229.19:30:58.54#ibcon#wrote, iclass 17, count 0 2006.229.19:30:58.54#ibcon#about to read 3, iclass 17, count 0 2006.229.19:30:58.58#ibcon#read 3, iclass 17, count 0 2006.229.19:30:58.58#ibcon#about to read 4, iclass 17, count 0 2006.229.19:30:58.58#ibcon#read 4, iclass 17, count 0 2006.229.19:30:58.58#ibcon#about to read 5, iclass 17, count 0 2006.229.19:30:58.58#ibcon#read 5, iclass 17, count 0 2006.229.19:30:58.58#ibcon#about to read 6, iclass 17, count 0 2006.229.19:30:58.58#ibcon#read 6, iclass 17, count 0 2006.229.19:30:58.58#ibcon#end of sib2, iclass 17, count 0 2006.229.19:30:58.58#ibcon#*after write, iclass 17, count 0 2006.229.19:30:58.58#ibcon#*before return 0, iclass 17, count 0 2006.229.19:30:58.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:30:58.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:30:58.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:30:58.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:30:58.58$vck44/va=2,7 2006.229.19:30:58.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.19:30:58.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.19:30:58.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:30:58.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:30:58.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:30:58.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:30:58.64#ibcon#enter wrdev, iclass 19, count 2 2006.229.19:30:58.64#ibcon#first serial, iclass 19, count 2 2006.229.19:30:58.64#ibcon#enter sib2, iclass 19, count 2 2006.229.19:30:58.64#ibcon#flushed, iclass 19, count 2 2006.229.19:30:58.64#ibcon#about to write, iclass 19, count 2 2006.229.19:30:58.64#ibcon#wrote, iclass 19, count 2 2006.229.19:30:58.64#ibcon#about to read 3, iclass 19, count 2 2006.229.19:30:58.66#ibcon#read 3, iclass 19, count 2 2006.229.19:30:58.66#ibcon#about to read 4, iclass 19, count 2 2006.229.19:30:58.66#ibcon#read 4, iclass 19, count 2 2006.229.19:30:58.66#ibcon#about to read 5, iclass 19, count 2 2006.229.19:30:58.66#ibcon#read 5, iclass 19, count 2 2006.229.19:30:58.66#ibcon#about to read 6, iclass 19, count 2 2006.229.19:30:58.66#ibcon#read 6, iclass 19, count 2 2006.229.19:30:58.66#ibcon#end of sib2, iclass 19, count 2 2006.229.19:30:58.66#ibcon#*mode == 0, iclass 19, count 2 2006.229.19:30:58.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.19:30:58.66#ibcon#[25=AT02-07\r\n] 2006.229.19:30:58.66#ibcon#*before write, iclass 19, count 2 2006.229.19:30:58.66#ibcon#enter sib2, iclass 19, count 2 2006.229.19:30:58.66#ibcon#flushed, iclass 19, count 2 2006.229.19:30:58.66#ibcon#about to write, iclass 19, count 2 2006.229.19:30:58.66#ibcon#wrote, iclass 19, count 2 2006.229.19:30:58.66#ibcon#about to read 3, iclass 19, count 2 2006.229.19:30:58.69#ibcon#read 3, iclass 19, count 2 2006.229.19:30:58.69#ibcon#about to read 4, iclass 19, count 2 2006.229.19:30:58.69#ibcon#read 4, iclass 19, count 2 2006.229.19:30:58.69#ibcon#about to read 5, iclass 19, count 2 2006.229.19:30:58.69#ibcon#read 5, iclass 19, count 2 2006.229.19:30:58.69#ibcon#about to read 6, iclass 19, count 2 2006.229.19:30:58.69#ibcon#read 6, iclass 19, count 2 2006.229.19:30:58.69#ibcon#end of sib2, iclass 19, count 2 2006.229.19:30:58.69#ibcon#*after write, iclass 19, count 2 2006.229.19:30:58.69#ibcon#*before return 0, iclass 19, count 2 2006.229.19:30:58.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:30:58.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:30:58.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.19:30:58.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:30:58.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:30:58.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:30:58.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:30:58.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:30:58.81#ibcon#first serial, iclass 19, count 0 2006.229.19:30:58.81#ibcon#enter sib2, iclass 19, count 0 2006.229.19:30:58.81#ibcon#flushed, iclass 19, count 0 2006.229.19:30:58.81#ibcon#about to write, iclass 19, count 0 2006.229.19:30:58.81#ibcon#wrote, iclass 19, count 0 2006.229.19:30:58.81#ibcon#about to read 3, iclass 19, count 0 2006.229.19:30:58.83#ibcon#read 3, iclass 19, count 0 2006.229.19:30:58.83#ibcon#about to read 4, iclass 19, count 0 2006.229.19:30:58.83#ibcon#read 4, iclass 19, count 0 2006.229.19:30:58.83#ibcon#about to read 5, iclass 19, count 0 2006.229.19:30:58.83#ibcon#read 5, iclass 19, count 0 2006.229.19:30:58.83#ibcon#about to read 6, iclass 19, count 0 2006.229.19:30:58.83#ibcon#read 6, iclass 19, count 0 2006.229.19:30:58.83#ibcon#end of sib2, iclass 19, count 0 2006.229.19:30:58.83#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:30:58.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:30:58.83#ibcon#[25=USB\r\n] 2006.229.19:30:58.83#ibcon#*before write, iclass 19, count 0 2006.229.19:30:58.83#ibcon#enter sib2, iclass 19, count 0 2006.229.19:30:58.83#ibcon#flushed, iclass 19, count 0 2006.229.19:30:58.83#ibcon#about to write, iclass 19, count 0 2006.229.19:30:58.83#ibcon#wrote, iclass 19, count 0 2006.229.19:30:58.83#ibcon#about to read 3, iclass 19, count 0 2006.229.19:30:58.86#ibcon#read 3, iclass 19, count 0 2006.229.19:30:58.86#ibcon#about to read 4, iclass 19, count 0 2006.229.19:30:58.86#ibcon#read 4, iclass 19, count 0 2006.229.19:30:58.86#ibcon#about to read 5, iclass 19, count 0 2006.229.19:30:58.86#ibcon#read 5, iclass 19, count 0 2006.229.19:30:58.86#ibcon#about to read 6, iclass 19, count 0 2006.229.19:30:58.86#ibcon#read 6, iclass 19, count 0 2006.229.19:30:58.86#ibcon#end of sib2, iclass 19, count 0 2006.229.19:30:58.86#ibcon#*after write, iclass 19, count 0 2006.229.19:30:58.86#ibcon#*before return 0, iclass 19, count 0 2006.229.19:30:58.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:30:58.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:30:58.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:30:58.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:30:58.86$vck44/valo=3,564.99 2006.229.19:30:58.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.19:30:58.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.19:30:58.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:30:58.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:30:58.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:30:58.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:30:58.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:30:58.86#ibcon#first serial, iclass 21, count 0 2006.229.19:30:58.86#ibcon#enter sib2, iclass 21, count 0 2006.229.19:30:58.86#ibcon#flushed, iclass 21, count 0 2006.229.19:30:58.86#ibcon#about to write, iclass 21, count 0 2006.229.19:30:58.86#ibcon#wrote, iclass 21, count 0 2006.229.19:30:58.86#ibcon#about to read 3, iclass 21, count 0 2006.229.19:30:58.88#ibcon#read 3, iclass 21, count 0 2006.229.19:30:58.88#ibcon#about to read 4, iclass 21, count 0 2006.229.19:30:58.88#ibcon#read 4, iclass 21, count 0 2006.229.19:30:58.88#ibcon#about to read 5, iclass 21, count 0 2006.229.19:30:58.88#ibcon#read 5, iclass 21, count 0 2006.229.19:30:58.88#ibcon#about to read 6, iclass 21, count 0 2006.229.19:30:58.88#ibcon#read 6, iclass 21, count 0 2006.229.19:30:58.88#ibcon#end of sib2, iclass 21, count 0 2006.229.19:30:58.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:30:58.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:30:58.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:30:58.88#ibcon#*before write, iclass 21, count 0 2006.229.19:30:58.88#ibcon#enter sib2, iclass 21, count 0 2006.229.19:30:58.88#ibcon#flushed, iclass 21, count 0 2006.229.19:30:58.88#ibcon#about to write, iclass 21, count 0 2006.229.19:30:58.88#ibcon#wrote, iclass 21, count 0 2006.229.19:30:58.88#ibcon#about to read 3, iclass 21, count 0 2006.229.19:30:58.92#ibcon#read 3, iclass 21, count 0 2006.229.19:30:58.92#ibcon#about to read 4, iclass 21, count 0 2006.229.19:30:58.92#ibcon#read 4, iclass 21, count 0 2006.229.19:30:58.92#ibcon#about to read 5, iclass 21, count 0 2006.229.19:30:58.92#ibcon#read 5, iclass 21, count 0 2006.229.19:30:58.92#ibcon#about to read 6, iclass 21, count 0 2006.229.19:30:58.92#ibcon#read 6, iclass 21, count 0 2006.229.19:30:58.92#ibcon#end of sib2, iclass 21, count 0 2006.229.19:30:58.92#ibcon#*after write, iclass 21, count 0 2006.229.19:30:58.92#ibcon#*before return 0, iclass 21, count 0 2006.229.19:30:58.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:30:58.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:30:58.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:30:58.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:30:58.92$vck44/va=3,6 2006.229.19:30:58.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.19:30:58.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.19:30:58.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:30:58.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:30:58.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:30:58.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:30:58.98#ibcon#enter wrdev, iclass 23, count 2 2006.229.19:30:58.98#ibcon#first serial, iclass 23, count 2 2006.229.19:30:58.98#ibcon#enter sib2, iclass 23, count 2 2006.229.19:30:58.98#ibcon#flushed, iclass 23, count 2 2006.229.19:30:58.98#ibcon#about to write, iclass 23, count 2 2006.229.19:30:58.98#ibcon#wrote, iclass 23, count 2 2006.229.19:30:58.98#ibcon#about to read 3, iclass 23, count 2 2006.229.19:30:59.00#ibcon#read 3, iclass 23, count 2 2006.229.19:30:59.00#ibcon#about to read 4, iclass 23, count 2 2006.229.19:30:59.00#ibcon#read 4, iclass 23, count 2 2006.229.19:30:59.00#ibcon#about to read 5, iclass 23, count 2 2006.229.19:30:59.00#ibcon#read 5, iclass 23, count 2 2006.229.19:30:59.00#ibcon#about to read 6, iclass 23, count 2 2006.229.19:30:59.00#ibcon#read 6, iclass 23, count 2 2006.229.19:30:59.00#ibcon#end of sib2, iclass 23, count 2 2006.229.19:30:59.00#ibcon#*mode == 0, iclass 23, count 2 2006.229.19:30:59.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.19:30:59.00#ibcon#[25=AT03-06\r\n] 2006.229.19:30:59.00#ibcon#*before write, iclass 23, count 2 2006.229.19:30:59.00#ibcon#enter sib2, iclass 23, count 2 2006.229.19:30:59.00#ibcon#flushed, iclass 23, count 2 2006.229.19:30:59.00#ibcon#about to write, iclass 23, count 2 2006.229.19:30:59.00#ibcon#wrote, iclass 23, count 2 2006.229.19:30:59.00#ibcon#about to read 3, iclass 23, count 2 2006.229.19:30:59.03#ibcon#read 3, iclass 23, count 2 2006.229.19:30:59.03#ibcon#about to read 4, iclass 23, count 2 2006.229.19:30:59.03#ibcon#read 4, iclass 23, count 2 2006.229.19:30:59.03#ibcon#about to read 5, iclass 23, count 2 2006.229.19:30:59.03#ibcon#read 5, iclass 23, count 2 2006.229.19:30:59.03#ibcon#about to read 6, iclass 23, count 2 2006.229.19:30:59.03#ibcon#read 6, iclass 23, count 2 2006.229.19:30:59.03#ibcon#end of sib2, iclass 23, count 2 2006.229.19:30:59.03#ibcon#*after write, iclass 23, count 2 2006.229.19:30:59.03#ibcon#*before return 0, iclass 23, count 2 2006.229.19:30:59.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:30:59.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:30:59.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.19:30:59.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:30:59.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:30:59.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:30:59.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:30:59.15#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:30:59.15#ibcon#first serial, iclass 23, count 0 2006.229.19:30:59.15#ibcon#enter sib2, iclass 23, count 0 2006.229.19:30:59.15#ibcon#flushed, iclass 23, count 0 2006.229.19:30:59.15#ibcon#about to write, iclass 23, count 0 2006.229.19:30:59.15#ibcon#wrote, iclass 23, count 0 2006.229.19:30:59.15#ibcon#about to read 3, iclass 23, count 0 2006.229.19:30:59.17#ibcon#read 3, iclass 23, count 0 2006.229.19:30:59.17#ibcon#about to read 4, iclass 23, count 0 2006.229.19:30:59.17#ibcon#read 4, iclass 23, count 0 2006.229.19:30:59.17#ibcon#about to read 5, iclass 23, count 0 2006.229.19:30:59.17#ibcon#read 5, iclass 23, count 0 2006.229.19:30:59.17#ibcon#about to read 6, iclass 23, count 0 2006.229.19:30:59.17#ibcon#read 6, iclass 23, count 0 2006.229.19:30:59.17#ibcon#end of sib2, iclass 23, count 0 2006.229.19:30:59.17#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:30:59.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:30:59.17#ibcon#[25=USB\r\n] 2006.229.19:30:59.17#ibcon#*before write, iclass 23, count 0 2006.229.19:30:59.17#ibcon#enter sib2, iclass 23, count 0 2006.229.19:30:59.17#ibcon#flushed, iclass 23, count 0 2006.229.19:30:59.17#ibcon#about to write, iclass 23, count 0 2006.229.19:30:59.17#ibcon#wrote, iclass 23, count 0 2006.229.19:30:59.17#ibcon#about to read 3, iclass 23, count 0 2006.229.19:30:59.20#ibcon#read 3, iclass 23, count 0 2006.229.19:30:59.20#ibcon#about to read 4, iclass 23, count 0 2006.229.19:30:59.20#ibcon#read 4, iclass 23, count 0 2006.229.19:30:59.20#ibcon#about to read 5, iclass 23, count 0 2006.229.19:30:59.20#ibcon#read 5, iclass 23, count 0 2006.229.19:30:59.20#ibcon#about to read 6, iclass 23, count 0 2006.229.19:30:59.20#ibcon#read 6, iclass 23, count 0 2006.229.19:30:59.20#ibcon#end of sib2, iclass 23, count 0 2006.229.19:30:59.20#ibcon#*after write, iclass 23, count 0 2006.229.19:30:59.20#ibcon#*before return 0, iclass 23, count 0 2006.229.19:30:59.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:30:59.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:30:59.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:30:59.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:30:59.20$vck44/valo=4,624.99 2006.229.19:30:59.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.19:30:59.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.19:30:59.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:30:59.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:30:59.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:30:59.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:30:59.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:30:59.20#ibcon#first serial, iclass 25, count 0 2006.229.19:30:59.20#ibcon#enter sib2, iclass 25, count 0 2006.229.19:30:59.20#ibcon#flushed, iclass 25, count 0 2006.229.19:30:59.20#ibcon#about to write, iclass 25, count 0 2006.229.19:30:59.20#ibcon#wrote, iclass 25, count 0 2006.229.19:30:59.20#ibcon#about to read 3, iclass 25, count 0 2006.229.19:30:59.22#ibcon#read 3, iclass 25, count 0 2006.229.19:30:59.22#ibcon#about to read 4, iclass 25, count 0 2006.229.19:30:59.22#ibcon#read 4, iclass 25, count 0 2006.229.19:30:59.22#ibcon#about to read 5, iclass 25, count 0 2006.229.19:30:59.22#ibcon#read 5, iclass 25, count 0 2006.229.19:30:59.22#ibcon#about to read 6, iclass 25, count 0 2006.229.19:30:59.22#ibcon#read 6, iclass 25, count 0 2006.229.19:30:59.22#ibcon#end of sib2, iclass 25, count 0 2006.229.19:30:59.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:30:59.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:30:59.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:30:59.22#ibcon#*before write, iclass 25, count 0 2006.229.19:30:59.22#ibcon#enter sib2, iclass 25, count 0 2006.229.19:30:59.22#ibcon#flushed, iclass 25, count 0 2006.229.19:30:59.22#ibcon#about to write, iclass 25, count 0 2006.229.19:30:59.22#ibcon#wrote, iclass 25, count 0 2006.229.19:30:59.22#ibcon#about to read 3, iclass 25, count 0 2006.229.19:30:59.26#ibcon#read 3, iclass 25, count 0 2006.229.19:30:59.26#ibcon#about to read 4, iclass 25, count 0 2006.229.19:30:59.26#ibcon#read 4, iclass 25, count 0 2006.229.19:30:59.26#ibcon#about to read 5, iclass 25, count 0 2006.229.19:30:59.26#ibcon#read 5, iclass 25, count 0 2006.229.19:30:59.26#ibcon#about to read 6, iclass 25, count 0 2006.229.19:30:59.26#ibcon#read 6, iclass 25, count 0 2006.229.19:30:59.26#ibcon#end of sib2, iclass 25, count 0 2006.229.19:30:59.26#ibcon#*after write, iclass 25, count 0 2006.229.19:30:59.26#ibcon#*before return 0, iclass 25, count 0 2006.229.19:30:59.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:30:59.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:30:59.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:30:59.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:30:59.26$vck44/va=4,7 2006.229.19:30:59.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.19:30:59.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.19:30:59.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:30:59.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:30:59.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:30:59.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:30:59.32#ibcon#enter wrdev, iclass 27, count 2 2006.229.19:30:59.32#ibcon#first serial, iclass 27, count 2 2006.229.19:30:59.32#ibcon#enter sib2, iclass 27, count 2 2006.229.19:30:59.32#ibcon#flushed, iclass 27, count 2 2006.229.19:30:59.32#ibcon#about to write, iclass 27, count 2 2006.229.19:30:59.32#ibcon#wrote, iclass 27, count 2 2006.229.19:30:59.32#ibcon#about to read 3, iclass 27, count 2 2006.229.19:30:59.34#ibcon#read 3, iclass 27, count 2 2006.229.19:30:59.34#ibcon#about to read 4, iclass 27, count 2 2006.229.19:30:59.34#ibcon#read 4, iclass 27, count 2 2006.229.19:30:59.34#ibcon#about to read 5, iclass 27, count 2 2006.229.19:30:59.34#ibcon#read 5, iclass 27, count 2 2006.229.19:30:59.34#ibcon#about to read 6, iclass 27, count 2 2006.229.19:30:59.34#ibcon#read 6, iclass 27, count 2 2006.229.19:30:59.34#ibcon#end of sib2, iclass 27, count 2 2006.229.19:30:59.34#ibcon#*mode == 0, iclass 27, count 2 2006.229.19:30:59.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.19:30:59.34#ibcon#[25=AT04-07\r\n] 2006.229.19:30:59.34#ibcon#*before write, iclass 27, count 2 2006.229.19:30:59.34#ibcon#enter sib2, iclass 27, count 2 2006.229.19:30:59.34#ibcon#flushed, iclass 27, count 2 2006.229.19:30:59.34#ibcon#about to write, iclass 27, count 2 2006.229.19:30:59.34#ibcon#wrote, iclass 27, count 2 2006.229.19:30:59.34#ibcon#about to read 3, iclass 27, count 2 2006.229.19:30:59.37#ibcon#read 3, iclass 27, count 2 2006.229.19:30:59.37#ibcon#about to read 4, iclass 27, count 2 2006.229.19:30:59.37#ibcon#read 4, iclass 27, count 2 2006.229.19:30:59.37#ibcon#about to read 5, iclass 27, count 2 2006.229.19:30:59.37#ibcon#read 5, iclass 27, count 2 2006.229.19:30:59.37#ibcon#about to read 6, iclass 27, count 2 2006.229.19:30:59.37#ibcon#read 6, iclass 27, count 2 2006.229.19:30:59.37#ibcon#end of sib2, iclass 27, count 2 2006.229.19:30:59.37#ibcon#*after write, iclass 27, count 2 2006.229.19:30:59.37#ibcon#*before return 0, iclass 27, count 2 2006.229.19:30:59.37#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:30:59.37#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:30:59.37#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.19:30:59.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:30:59.37#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:30:59.49#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:30:59.49#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:30:59.49#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:30:59.49#ibcon#first serial, iclass 27, count 0 2006.229.19:30:59.49#ibcon#enter sib2, iclass 27, count 0 2006.229.19:30:59.49#ibcon#flushed, iclass 27, count 0 2006.229.19:30:59.49#ibcon#about to write, iclass 27, count 0 2006.229.19:30:59.49#ibcon#wrote, iclass 27, count 0 2006.229.19:30:59.49#ibcon#about to read 3, iclass 27, count 0 2006.229.19:30:59.51#ibcon#read 3, iclass 27, count 0 2006.229.19:30:59.51#ibcon#about to read 4, iclass 27, count 0 2006.229.19:30:59.51#ibcon#read 4, iclass 27, count 0 2006.229.19:30:59.51#ibcon#about to read 5, iclass 27, count 0 2006.229.19:30:59.51#ibcon#read 5, iclass 27, count 0 2006.229.19:30:59.51#ibcon#about to read 6, iclass 27, count 0 2006.229.19:30:59.51#ibcon#read 6, iclass 27, count 0 2006.229.19:30:59.51#ibcon#end of sib2, iclass 27, count 0 2006.229.19:30:59.51#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:30:59.51#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:30:59.51#ibcon#[25=USB\r\n] 2006.229.19:30:59.51#ibcon#*before write, iclass 27, count 0 2006.229.19:30:59.51#ibcon#enter sib2, iclass 27, count 0 2006.229.19:30:59.51#ibcon#flushed, iclass 27, count 0 2006.229.19:30:59.51#ibcon#about to write, iclass 27, count 0 2006.229.19:30:59.51#ibcon#wrote, iclass 27, count 0 2006.229.19:30:59.51#ibcon#about to read 3, iclass 27, count 0 2006.229.19:30:59.54#ibcon#read 3, iclass 27, count 0 2006.229.19:30:59.54#ibcon#about to read 4, iclass 27, count 0 2006.229.19:30:59.54#ibcon#read 4, iclass 27, count 0 2006.229.19:30:59.54#ibcon#about to read 5, iclass 27, count 0 2006.229.19:30:59.54#ibcon#read 5, iclass 27, count 0 2006.229.19:30:59.54#ibcon#about to read 6, iclass 27, count 0 2006.229.19:30:59.54#ibcon#read 6, iclass 27, count 0 2006.229.19:30:59.54#ibcon#end of sib2, iclass 27, count 0 2006.229.19:30:59.54#ibcon#*after write, iclass 27, count 0 2006.229.19:30:59.54#ibcon#*before return 0, iclass 27, count 0 2006.229.19:30:59.54#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:30:59.54#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:30:59.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:30:59.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:30:59.54$vck44/valo=5,734.99 2006.229.19:30:59.54#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.19:30:59.54#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.19:30:59.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:30:59.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:30:59.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:30:59.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:30:59.54#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:30:59.54#ibcon#first serial, iclass 29, count 0 2006.229.19:30:59.54#ibcon#enter sib2, iclass 29, count 0 2006.229.19:30:59.54#ibcon#flushed, iclass 29, count 0 2006.229.19:30:59.54#ibcon#about to write, iclass 29, count 0 2006.229.19:30:59.54#ibcon#wrote, iclass 29, count 0 2006.229.19:30:59.54#ibcon#about to read 3, iclass 29, count 0 2006.229.19:30:59.56#ibcon#read 3, iclass 29, count 0 2006.229.19:30:59.56#ibcon#about to read 4, iclass 29, count 0 2006.229.19:30:59.56#ibcon#read 4, iclass 29, count 0 2006.229.19:30:59.56#ibcon#about to read 5, iclass 29, count 0 2006.229.19:30:59.56#ibcon#read 5, iclass 29, count 0 2006.229.19:30:59.56#ibcon#about to read 6, iclass 29, count 0 2006.229.19:30:59.56#ibcon#read 6, iclass 29, count 0 2006.229.19:30:59.56#ibcon#end of sib2, iclass 29, count 0 2006.229.19:30:59.56#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:30:59.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:30:59.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:30:59.56#ibcon#*before write, iclass 29, count 0 2006.229.19:30:59.56#ibcon#enter sib2, iclass 29, count 0 2006.229.19:30:59.56#ibcon#flushed, iclass 29, count 0 2006.229.19:30:59.56#ibcon#about to write, iclass 29, count 0 2006.229.19:30:59.56#ibcon#wrote, iclass 29, count 0 2006.229.19:30:59.56#ibcon#about to read 3, iclass 29, count 0 2006.229.19:30:59.60#ibcon#read 3, iclass 29, count 0 2006.229.19:30:59.60#ibcon#about to read 4, iclass 29, count 0 2006.229.19:30:59.60#ibcon#read 4, iclass 29, count 0 2006.229.19:30:59.60#ibcon#about to read 5, iclass 29, count 0 2006.229.19:30:59.60#ibcon#read 5, iclass 29, count 0 2006.229.19:30:59.60#ibcon#about to read 6, iclass 29, count 0 2006.229.19:30:59.60#ibcon#read 6, iclass 29, count 0 2006.229.19:30:59.60#ibcon#end of sib2, iclass 29, count 0 2006.229.19:30:59.60#ibcon#*after write, iclass 29, count 0 2006.229.19:30:59.60#ibcon#*before return 0, iclass 29, count 0 2006.229.19:30:59.60#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:30:59.60#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:30:59.60#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:30:59.60#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:30:59.60$vck44/va=5,4 2006.229.19:30:59.60#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.19:30:59.60#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.19:30:59.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:30:59.60#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:30:59.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:30:59.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:30:59.66#ibcon#enter wrdev, iclass 31, count 2 2006.229.19:30:59.66#ibcon#first serial, iclass 31, count 2 2006.229.19:30:59.66#ibcon#enter sib2, iclass 31, count 2 2006.229.19:30:59.66#ibcon#flushed, iclass 31, count 2 2006.229.19:30:59.66#ibcon#about to write, iclass 31, count 2 2006.229.19:30:59.66#ibcon#wrote, iclass 31, count 2 2006.229.19:30:59.66#ibcon#about to read 3, iclass 31, count 2 2006.229.19:30:59.68#ibcon#read 3, iclass 31, count 2 2006.229.19:30:59.68#ibcon#about to read 4, iclass 31, count 2 2006.229.19:30:59.68#ibcon#read 4, iclass 31, count 2 2006.229.19:30:59.68#ibcon#about to read 5, iclass 31, count 2 2006.229.19:30:59.68#ibcon#read 5, iclass 31, count 2 2006.229.19:30:59.68#ibcon#about to read 6, iclass 31, count 2 2006.229.19:30:59.68#ibcon#read 6, iclass 31, count 2 2006.229.19:30:59.68#ibcon#end of sib2, iclass 31, count 2 2006.229.19:30:59.68#ibcon#*mode == 0, iclass 31, count 2 2006.229.19:30:59.68#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.19:30:59.68#ibcon#[25=AT05-04\r\n] 2006.229.19:30:59.68#ibcon#*before write, iclass 31, count 2 2006.229.19:30:59.68#ibcon#enter sib2, iclass 31, count 2 2006.229.19:30:59.68#ibcon#flushed, iclass 31, count 2 2006.229.19:30:59.68#ibcon#about to write, iclass 31, count 2 2006.229.19:30:59.68#ibcon#wrote, iclass 31, count 2 2006.229.19:30:59.68#ibcon#about to read 3, iclass 31, count 2 2006.229.19:30:59.71#ibcon#read 3, iclass 31, count 2 2006.229.19:30:59.71#ibcon#about to read 4, iclass 31, count 2 2006.229.19:30:59.71#ibcon#read 4, iclass 31, count 2 2006.229.19:30:59.71#ibcon#about to read 5, iclass 31, count 2 2006.229.19:30:59.71#ibcon#read 5, iclass 31, count 2 2006.229.19:30:59.71#ibcon#about to read 6, iclass 31, count 2 2006.229.19:30:59.71#ibcon#read 6, iclass 31, count 2 2006.229.19:30:59.71#ibcon#end of sib2, iclass 31, count 2 2006.229.19:30:59.71#ibcon#*after write, iclass 31, count 2 2006.229.19:30:59.71#ibcon#*before return 0, iclass 31, count 2 2006.229.19:30:59.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:30:59.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:30:59.71#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.19:30:59.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:30:59.71#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:30:59.83#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:30:59.83#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:30:59.83#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:30:59.83#ibcon#first serial, iclass 31, count 0 2006.229.19:30:59.83#ibcon#enter sib2, iclass 31, count 0 2006.229.19:30:59.83#ibcon#flushed, iclass 31, count 0 2006.229.19:30:59.83#ibcon#about to write, iclass 31, count 0 2006.229.19:30:59.83#ibcon#wrote, iclass 31, count 0 2006.229.19:30:59.83#ibcon#about to read 3, iclass 31, count 0 2006.229.19:30:59.85#ibcon#read 3, iclass 31, count 0 2006.229.19:30:59.85#ibcon#about to read 4, iclass 31, count 0 2006.229.19:30:59.85#ibcon#read 4, iclass 31, count 0 2006.229.19:30:59.85#ibcon#about to read 5, iclass 31, count 0 2006.229.19:30:59.85#ibcon#read 5, iclass 31, count 0 2006.229.19:30:59.85#ibcon#about to read 6, iclass 31, count 0 2006.229.19:30:59.85#ibcon#read 6, iclass 31, count 0 2006.229.19:30:59.85#ibcon#end of sib2, iclass 31, count 0 2006.229.19:30:59.85#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:30:59.85#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:30:59.85#ibcon#[25=USB\r\n] 2006.229.19:30:59.85#ibcon#*before write, iclass 31, count 0 2006.229.19:30:59.85#ibcon#enter sib2, iclass 31, count 0 2006.229.19:30:59.85#ibcon#flushed, iclass 31, count 0 2006.229.19:30:59.85#ibcon#about to write, iclass 31, count 0 2006.229.19:30:59.85#ibcon#wrote, iclass 31, count 0 2006.229.19:30:59.85#ibcon#about to read 3, iclass 31, count 0 2006.229.19:30:59.88#ibcon#read 3, iclass 31, count 0 2006.229.19:30:59.88#ibcon#about to read 4, iclass 31, count 0 2006.229.19:30:59.88#ibcon#read 4, iclass 31, count 0 2006.229.19:30:59.88#ibcon#about to read 5, iclass 31, count 0 2006.229.19:30:59.88#ibcon#read 5, iclass 31, count 0 2006.229.19:30:59.88#ibcon#about to read 6, iclass 31, count 0 2006.229.19:30:59.88#ibcon#read 6, iclass 31, count 0 2006.229.19:30:59.88#ibcon#end of sib2, iclass 31, count 0 2006.229.19:30:59.88#ibcon#*after write, iclass 31, count 0 2006.229.19:30:59.88#ibcon#*before return 0, iclass 31, count 0 2006.229.19:30:59.88#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:30:59.88#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:30:59.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:30:59.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:30:59.88$vck44/valo=6,814.99 2006.229.19:30:59.88#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.19:30:59.88#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.19:30:59.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:30:59.88#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:30:59.88#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:30:59.88#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:30:59.88#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:30:59.88#ibcon#first serial, iclass 33, count 0 2006.229.19:30:59.88#ibcon#enter sib2, iclass 33, count 0 2006.229.19:30:59.88#ibcon#flushed, iclass 33, count 0 2006.229.19:30:59.88#ibcon#about to write, iclass 33, count 0 2006.229.19:30:59.88#ibcon#wrote, iclass 33, count 0 2006.229.19:30:59.88#ibcon#about to read 3, iclass 33, count 0 2006.229.19:30:59.90#ibcon#read 3, iclass 33, count 0 2006.229.19:30:59.90#ibcon#about to read 4, iclass 33, count 0 2006.229.19:30:59.90#ibcon#read 4, iclass 33, count 0 2006.229.19:30:59.90#ibcon#about to read 5, iclass 33, count 0 2006.229.19:30:59.90#ibcon#read 5, iclass 33, count 0 2006.229.19:30:59.90#ibcon#about to read 6, iclass 33, count 0 2006.229.19:30:59.90#ibcon#read 6, iclass 33, count 0 2006.229.19:30:59.90#ibcon#end of sib2, iclass 33, count 0 2006.229.19:30:59.90#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:30:59.90#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:30:59.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:30:59.90#ibcon#*before write, iclass 33, count 0 2006.229.19:30:59.90#ibcon#enter sib2, iclass 33, count 0 2006.229.19:30:59.90#ibcon#flushed, iclass 33, count 0 2006.229.19:30:59.90#ibcon#about to write, iclass 33, count 0 2006.229.19:30:59.90#ibcon#wrote, iclass 33, count 0 2006.229.19:30:59.90#ibcon#about to read 3, iclass 33, count 0 2006.229.19:30:59.94#ibcon#read 3, iclass 33, count 0 2006.229.19:30:59.94#ibcon#about to read 4, iclass 33, count 0 2006.229.19:30:59.94#ibcon#read 4, iclass 33, count 0 2006.229.19:30:59.94#ibcon#about to read 5, iclass 33, count 0 2006.229.19:30:59.94#ibcon#read 5, iclass 33, count 0 2006.229.19:30:59.94#ibcon#about to read 6, iclass 33, count 0 2006.229.19:30:59.94#ibcon#read 6, iclass 33, count 0 2006.229.19:30:59.94#ibcon#end of sib2, iclass 33, count 0 2006.229.19:30:59.94#ibcon#*after write, iclass 33, count 0 2006.229.19:30:59.94#ibcon#*before return 0, iclass 33, count 0 2006.229.19:30:59.94#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:30:59.94#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:30:59.94#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:30:59.94#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:30:59.94$vck44/va=6,4 2006.229.19:30:59.94#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.19:30:59.94#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.19:30:59.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:30:59.94#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:00.00#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:00.00#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:00.00#ibcon#enter wrdev, iclass 35, count 2 2006.229.19:31:00.00#ibcon#first serial, iclass 35, count 2 2006.229.19:31:00.00#ibcon#enter sib2, iclass 35, count 2 2006.229.19:31:00.00#ibcon#flushed, iclass 35, count 2 2006.229.19:31:00.00#ibcon#about to write, iclass 35, count 2 2006.229.19:31:00.00#ibcon#wrote, iclass 35, count 2 2006.229.19:31:00.00#ibcon#about to read 3, iclass 35, count 2 2006.229.19:31:00.02#ibcon#read 3, iclass 35, count 2 2006.229.19:31:00.02#ibcon#about to read 4, iclass 35, count 2 2006.229.19:31:00.02#ibcon#read 4, iclass 35, count 2 2006.229.19:31:00.02#ibcon#about to read 5, iclass 35, count 2 2006.229.19:31:00.02#ibcon#read 5, iclass 35, count 2 2006.229.19:31:00.02#ibcon#about to read 6, iclass 35, count 2 2006.229.19:31:00.02#ibcon#read 6, iclass 35, count 2 2006.229.19:31:00.02#ibcon#end of sib2, iclass 35, count 2 2006.229.19:31:00.02#ibcon#*mode == 0, iclass 35, count 2 2006.229.19:31:00.02#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.19:31:00.02#ibcon#[25=AT06-04\r\n] 2006.229.19:31:00.02#ibcon#*before write, iclass 35, count 2 2006.229.19:31:00.02#ibcon#enter sib2, iclass 35, count 2 2006.229.19:31:00.02#ibcon#flushed, iclass 35, count 2 2006.229.19:31:00.02#ibcon#about to write, iclass 35, count 2 2006.229.19:31:00.02#ibcon#wrote, iclass 35, count 2 2006.229.19:31:00.02#ibcon#about to read 3, iclass 35, count 2 2006.229.19:31:00.05#ibcon#read 3, iclass 35, count 2 2006.229.19:31:00.05#ibcon#about to read 4, iclass 35, count 2 2006.229.19:31:00.05#ibcon#read 4, iclass 35, count 2 2006.229.19:31:00.05#ibcon#about to read 5, iclass 35, count 2 2006.229.19:31:00.05#ibcon#read 5, iclass 35, count 2 2006.229.19:31:00.05#ibcon#about to read 6, iclass 35, count 2 2006.229.19:31:00.05#ibcon#read 6, iclass 35, count 2 2006.229.19:31:00.05#ibcon#end of sib2, iclass 35, count 2 2006.229.19:31:00.05#ibcon#*after write, iclass 35, count 2 2006.229.19:31:00.05#ibcon#*before return 0, iclass 35, count 2 2006.229.19:31:00.05#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:00.05#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:00.05#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.19:31:00.05#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:00.05#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:00.17#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:00.17#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:00.17#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:31:00.17#ibcon#first serial, iclass 35, count 0 2006.229.19:31:00.17#ibcon#enter sib2, iclass 35, count 0 2006.229.19:31:00.17#ibcon#flushed, iclass 35, count 0 2006.229.19:31:00.17#ibcon#about to write, iclass 35, count 0 2006.229.19:31:00.17#ibcon#wrote, iclass 35, count 0 2006.229.19:31:00.17#ibcon#about to read 3, iclass 35, count 0 2006.229.19:31:00.19#ibcon#read 3, iclass 35, count 0 2006.229.19:31:00.19#ibcon#about to read 4, iclass 35, count 0 2006.229.19:31:00.19#ibcon#read 4, iclass 35, count 0 2006.229.19:31:00.19#ibcon#about to read 5, iclass 35, count 0 2006.229.19:31:00.19#ibcon#read 5, iclass 35, count 0 2006.229.19:31:00.19#ibcon#about to read 6, iclass 35, count 0 2006.229.19:31:00.19#ibcon#read 6, iclass 35, count 0 2006.229.19:31:00.19#ibcon#end of sib2, iclass 35, count 0 2006.229.19:31:00.19#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:31:00.19#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:31:00.19#ibcon#[25=USB\r\n] 2006.229.19:31:00.19#ibcon#*before write, iclass 35, count 0 2006.229.19:31:00.19#ibcon#enter sib2, iclass 35, count 0 2006.229.19:31:00.19#ibcon#flushed, iclass 35, count 0 2006.229.19:31:00.19#ibcon#about to write, iclass 35, count 0 2006.229.19:31:00.19#ibcon#wrote, iclass 35, count 0 2006.229.19:31:00.19#ibcon#about to read 3, iclass 35, count 0 2006.229.19:31:00.22#ibcon#read 3, iclass 35, count 0 2006.229.19:31:00.22#ibcon#about to read 4, iclass 35, count 0 2006.229.19:31:00.22#ibcon#read 4, iclass 35, count 0 2006.229.19:31:00.22#ibcon#about to read 5, iclass 35, count 0 2006.229.19:31:00.22#ibcon#read 5, iclass 35, count 0 2006.229.19:31:00.22#ibcon#about to read 6, iclass 35, count 0 2006.229.19:31:00.22#ibcon#read 6, iclass 35, count 0 2006.229.19:31:00.22#ibcon#end of sib2, iclass 35, count 0 2006.229.19:31:00.22#ibcon#*after write, iclass 35, count 0 2006.229.19:31:00.22#ibcon#*before return 0, iclass 35, count 0 2006.229.19:31:00.22#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:00.22#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:00.22#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:31:00.22#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:31:00.22$vck44/valo=7,864.99 2006.229.19:31:00.22#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.19:31:00.22#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.19:31:00.22#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:00.22#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:00.22#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:00.22#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:00.22#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:31:00.22#ibcon#first serial, iclass 37, count 0 2006.229.19:31:00.22#ibcon#enter sib2, iclass 37, count 0 2006.229.19:31:00.22#ibcon#flushed, iclass 37, count 0 2006.229.19:31:00.22#ibcon#about to write, iclass 37, count 0 2006.229.19:31:00.22#ibcon#wrote, iclass 37, count 0 2006.229.19:31:00.22#ibcon#about to read 3, iclass 37, count 0 2006.229.19:31:00.24#ibcon#read 3, iclass 37, count 0 2006.229.19:31:00.24#ibcon#about to read 4, iclass 37, count 0 2006.229.19:31:00.24#ibcon#read 4, iclass 37, count 0 2006.229.19:31:00.24#ibcon#about to read 5, iclass 37, count 0 2006.229.19:31:00.24#ibcon#read 5, iclass 37, count 0 2006.229.19:31:00.24#ibcon#about to read 6, iclass 37, count 0 2006.229.19:31:00.24#ibcon#read 6, iclass 37, count 0 2006.229.19:31:00.24#ibcon#end of sib2, iclass 37, count 0 2006.229.19:31:00.24#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:31:00.24#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:31:00.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:31:00.24#ibcon#*before write, iclass 37, count 0 2006.229.19:31:00.24#ibcon#enter sib2, iclass 37, count 0 2006.229.19:31:00.24#ibcon#flushed, iclass 37, count 0 2006.229.19:31:00.24#ibcon#about to write, iclass 37, count 0 2006.229.19:31:00.24#ibcon#wrote, iclass 37, count 0 2006.229.19:31:00.24#ibcon#about to read 3, iclass 37, count 0 2006.229.19:31:00.28#ibcon#read 3, iclass 37, count 0 2006.229.19:31:00.28#ibcon#about to read 4, iclass 37, count 0 2006.229.19:31:00.28#ibcon#read 4, iclass 37, count 0 2006.229.19:31:00.28#ibcon#about to read 5, iclass 37, count 0 2006.229.19:31:00.28#ibcon#read 5, iclass 37, count 0 2006.229.19:31:00.28#ibcon#about to read 6, iclass 37, count 0 2006.229.19:31:00.28#ibcon#read 6, iclass 37, count 0 2006.229.19:31:00.28#ibcon#end of sib2, iclass 37, count 0 2006.229.19:31:00.28#ibcon#*after write, iclass 37, count 0 2006.229.19:31:00.28#ibcon#*before return 0, iclass 37, count 0 2006.229.19:31:00.28#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:00.28#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:00.28#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:31:00.28#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:31:00.28$vck44/va=7,5 2006.229.19:31:00.28#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.19:31:00.28#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.19:31:00.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:00.28#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:00.34#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:00.34#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:00.34#ibcon#enter wrdev, iclass 39, count 2 2006.229.19:31:00.34#ibcon#first serial, iclass 39, count 2 2006.229.19:31:00.34#ibcon#enter sib2, iclass 39, count 2 2006.229.19:31:00.34#ibcon#flushed, iclass 39, count 2 2006.229.19:31:00.34#ibcon#about to write, iclass 39, count 2 2006.229.19:31:00.34#ibcon#wrote, iclass 39, count 2 2006.229.19:31:00.34#ibcon#about to read 3, iclass 39, count 2 2006.229.19:31:00.36#ibcon#read 3, iclass 39, count 2 2006.229.19:31:00.36#ibcon#about to read 4, iclass 39, count 2 2006.229.19:31:00.36#ibcon#read 4, iclass 39, count 2 2006.229.19:31:00.36#ibcon#about to read 5, iclass 39, count 2 2006.229.19:31:00.36#ibcon#read 5, iclass 39, count 2 2006.229.19:31:00.36#ibcon#about to read 6, iclass 39, count 2 2006.229.19:31:00.36#ibcon#read 6, iclass 39, count 2 2006.229.19:31:00.36#ibcon#end of sib2, iclass 39, count 2 2006.229.19:31:00.36#ibcon#*mode == 0, iclass 39, count 2 2006.229.19:31:00.36#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.19:31:00.36#ibcon#[25=AT07-05\r\n] 2006.229.19:31:00.36#ibcon#*before write, iclass 39, count 2 2006.229.19:31:00.36#ibcon#enter sib2, iclass 39, count 2 2006.229.19:31:00.36#ibcon#flushed, iclass 39, count 2 2006.229.19:31:00.36#ibcon#about to write, iclass 39, count 2 2006.229.19:31:00.36#ibcon#wrote, iclass 39, count 2 2006.229.19:31:00.36#ibcon#about to read 3, iclass 39, count 2 2006.229.19:31:00.39#ibcon#read 3, iclass 39, count 2 2006.229.19:31:00.39#ibcon#about to read 4, iclass 39, count 2 2006.229.19:31:00.39#ibcon#read 4, iclass 39, count 2 2006.229.19:31:00.39#ibcon#about to read 5, iclass 39, count 2 2006.229.19:31:00.39#ibcon#read 5, iclass 39, count 2 2006.229.19:31:00.39#ibcon#about to read 6, iclass 39, count 2 2006.229.19:31:00.39#ibcon#read 6, iclass 39, count 2 2006.229.19:31:00.39#ibcon#end of sib2, iclass 39, count 2 2006.229.19:31:00.39#ibcon#*after write, iclass 39, count 2 2006.229.19:31:00.39#ibcon#*before return 0, iclass 39, count 2 2006.229.19:31:00.39#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:00.39#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:00.39#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.19:31:00.39#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:00.39#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:00.51#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:00.51#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:00.51#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:31:00.51#ibcon#first serial, iclass 39, count 0 2006.229.19:31:00.51#ibcon#enter sib2, iclass 39, count 0 2006.229.19:31:00.51#ibcon#flushed, iclass 39, count 0 2006.229.19:31:00.51#ibcon#about to write, iclass 39, count 0 2006.229.19:31:00.51#ibcon#wrote, iclass 39, count 0 2006.229.19:31:00.51#ibcon#about to read 3, iclass 39, count 0 2006.229.19:31:00.53#ibcon#read 3, iclass 39, count 0 2006.229.19:31:00.53#ibcon#about to read 4, iclass 39, count 0 2006.229.19:31:00.53#ibcon#read 4, iclass 39, count 0 2006.229.19:31:00.53#ibcon#about to read 5, iclass 39, count 0 2006.229.19:31:00.53#ibcon#read 5, iclass 39, count 0 2006.229.19:31:00.53#ibcon#about to read 6, iclass 39, count 0 2006.229.19:31:00.53#ibcon#read 6, iclass 39, count 0 2006.229.19:31:00.53#ibcon#end of sib2, iclass 39, count 0 2006.229.19:31:00.53#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:31:00.53#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:31:00.53#ibcon#[25=USB\r\n] 2006.229.19:31:00.53#ibcon#*before write, iclass 39, count 0 2006.229.19:31:00.53#ibcon#enter sib2, iclass 39, count 0 2006.229.19:31:00.53#ibcon#flushed, iclass 39, count 0 2006.229.19:31:00.53#ibcon#about to write, iclass 39, count 0 2006.229.19:31:00.53#ibcon#wrote, iclass 39, count 0 2006.229.19:31:00.53#ibcon#about to read 3, iclass 39, count 0 2006.229.19:31:00.56#ibcon#read 3, iclass 39, count 0 2006.229.19:31:00.56#ibcon#about to read 4, iclass 39, count 0 2006.229.19:31:00.56#ibcon#read 4, iclass 39, count 0 2006.229.19:31:00.56#ibcon#about to read 5, iclass 39, count 0 2006.229.19:31:00.56#ibcon#read 5, iclass 39, count 0 2006.229.19:31:00.56#ibcon#about to read 6, iclass 39, count 0 2006.229.19:31:00.56#ibcon#read 6, iclass 39, count 0 2006.229.19:31:00.56#ibcon#end of sib2, iclass 39, count 0 2006.229.19:31:00.56#ibcon#*after write, iclass 39, count 0 2006.229.19:31:00.56#ibcon#*before return 0, iclass 39, count 0 2006.229.19:31:00.56#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:00.56#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:00.56#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:31:00.56#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:31:00.56$vck44/valo=8,884.99 2006.229.19:31:00.56#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.19:31:00.56#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.19:31:00.56#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:00.56#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:00.56#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:00.56#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:00.56#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:31:00.56#ibcon#first serial, iclass 3, count 0 2006.229.19:31:00.56#ibcon#enter sib2, iclass 3, count 0 2006.229.19:31:00.56#ibcon#flushed, iclass 3, count 0 2006.229.19:31:00.56#ibcon#about to write, iclass 3, count 0 2006.229.19:31:00.56#ibcon#wrote, iclass 3, count 0 2006.229.19:31:00.56#ibcon#about to read 3, iclass 3, count 0 2006.229.19:31:00.58#ibcon#read 3, iclass 3, count 0 2006.229.19:31:00.58#ibcon#about to read 4, iclass 3, count 0 2006.229.19:31:00.58#ibcon#read 4, iclass 3, count 0 2006.229.19:31:00.58#ibcon#about to read 5, iclass 3, count 0 2006.229.19:31:00.58#ibcon#read 5, iclass 3, count 0 2006.229.19:31:00.58#ibcon#about to read 6, iclass 3, count 0 2006.229.19:31:00.58#ibcon#read 6, iclass 3, count 0 2006.229.19:31:00.58#ibcon#end of sib2, iclass 3, count 0 2006.229.19:31:00.58#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:31:00.58#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:31:00.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:31:00.58#ibcon#*before write, iclass 3, count 0 2006.229.19:31:00.58#ibcon#enter sib2, iclass 3, count 0 2006.229.19:31:00.58#ibcon#flushed, iclass 3, count 0 2006.229.19:31:00.58#ibcon#about to write, iclass 3, count 0 2006.229.19:31:00.58#ibcon#wrote, iclass 3, count 0 2006.229.19:31:00.58#ibcon#about to read 3, iclass 3, count 0 2006.229.19:31:00.62#ibcon#read 3, iclass 3, count 0 2006.229.19:31:00.62#ibcon#about to read 4, iclass 3, count 0 2006.229.19:31:00.62#ibcon#read 4, iclass 3, count 0 2006.229.19:31:00.62#ibcon#about to read 5, iclass 3, count 0 2006.229.19:31:00.62#ibcon#read 5, iclass 3, count 0 2006.229.19:31:00.62#ibcon#about to read 6, iclass 3, count 0 2006.229.19:31:00.62#ibcon#read 6, iclass 3, count 0 2006.229.19:31:00.62#ibcon#end of sib2, iclass 3, count 0 2006.229.19:31:00.62#ibcon#*after write, iclass 3, count 0 2006.229.19:31:00.62#ibcon#*before return 0, iclass 3, count 0 2006.229.19:31:00.62#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:00.62#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:00.62#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:31:00.62#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:31:00.62$vck44/va=8,6 2006.229.19:31:00.62#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.19:31:00.62#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.19:31:00.62#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:00.62#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:31:00.68#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:31:00.68#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:31:00.68#ibcon#enter wrdev, iclass 5, count 2 2006.229.19:31:00.68#ibcon#first serial, iclass 5, count 2 2006.229.19:31:00.68#ibcon#enter sib2, iclass 5, count 2 2006.229.19:31:00.68#ibcon#flushed, iclass 5, count 2 2006.229.19:31:00.68#ibcon#about to write, iclass 5, count 2 2006.229.19:31:00.68#ibcon#wrote, iclass 5, count 2 2006.229.19:31:00.68#ibcon#about to read 3, iclass 5, count 2 2006.229.19:31:00.70#ibcon#read 3, iclass 5, count 2 2006.229.19:31:00.70#ibcon#about to read 4, iclass 5, count 2 2006.229.19:31:00.70#ibcon#read 4, iclass 5, count 2 2006.229.19:31:00.70#ibcon#about to read 5, iclass 5, count 2 2006.229.19:31:00.70#ibcon#read 5, iclass 5, count 2 2006.229.19:31:00.70#ibcon#about to read 6, iclass 5, count 2 2006.229.19:31:00.70#ibcon#read 6, iclass 5, count 2 2006.229.19:31:00.70#ibcon#end of sib2, iclass 5, count 2 2006.229.19:31:00.70#ibcon#*mode == 0, iclass 5, count 2 2006.229.19:31:00.70#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.19:31:00.70#ibcon#[25=AT08-06\r\n] 2006.229.19:31:00.70#ibcon#*before write, iclass 5, count 2 2006.229.19:31:00.70#ibcon#enter sib2, iclass 5, count 2 2006.229.19:31:00.70#ibcon#flushed, iclass 5, count 2 2006.229.19:31:00.70#ibcon#about to write, iclass 5, count 2 2006.229.19:31:00.70#ibcon#wrote, iclass 5, count 2 2006.229.19:31:00.70#ibcon#about to read 3, iclass 5, count 2 2006.229.19:31:00.73#ibcon#read 3, iclass 5, count 2 2006.229.19:31:00.73#ibcon#about to read 4, iclass 5, count 2 2006.229.19:31:00.73#ibcon#read 4, iclass 5, count 2 2006.229.19:31:00.73#ibcon#about to read 5, iclass 5, count 2 2006.229.19:31:00.73#ibcon#read 5, iclass 5, count 2 2006.229.19:31:00.73#ibcon#about to read 6, iclass 5, count 2 2006.229.19:31:00.73#ibcon#read 6, iclass 5, count 2 2006.229.19:31:00.73#ibcon#end of sib2, iclass 5, count 2 2006.229.19:31:00.73#ibcon#*after write, iclass 5, count 2 2006.229.19:31:00.73#ibcon#*before return 0, iclass 5, count 2 2006.229.19:31:00.73#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:31:00.73#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.19:31:00.73#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.19:31:00.73#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:00.73#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:31:00.85#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:31:00.85#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:31:00.85#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:31:00.85#ibcon#first serial, iclass 5, count 0 2006.229.19:31:00.85#ibcon#enter sib2, iclass 5, count 0 2006.229.19:31:00.85#ibcon#flushed, iclass 5, count 0 2006.229.19:31:00.85#ibcon#about to write, iclass 5, count 0 2006.229.19:31:00.85#ibcon#wrote, iclass 5, count 0 2006.229.19:31:00.85#ibcon#about to read 3, iclass 5, count 0 2006.229.19:31:00.87#ibcon#read 3, iclass 5, count 0 2006.229.19:31:00.87#ibcon#about to read 4, iclass 5, count 0 2006.229.19:31:00.87#ibcon#read 4, iclass 5, count 0 2006.229.19:31:00.87#ibcon#about to read 5, iclass 5, count 0 2006.229.19:31:00.87#ibcon#read 5, iclass 5, count 0 2006.229.19:31:00.87#ibcon#about to read 6, iclass 5, count 0 2006.229.19:31:00.87#ibcon#read 6, iclass 5, count 0 2006.229.19:31:00.87#ibcon#end of sib2, iclass 5, count 0 2006.229.19:31:00.87#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:31:00.87#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:31:00.87#ibcon#[25=USB\r\n] 2006.229.19:31:00.87#ibcon#*before write, iclass 5, count 0 2006.229.19:31:00.87#ibcon#enter sib2, iclass 5, count 0 2006.229.19:31:00.87#ibcon#flushed, iclass 5, count 0 2006.229.19:31:00.87#ibcon#about to write, iclass 5, count 0 2006.229.19:31:00.87#ibcon#wrote, iclass 5, count 0 2006.229.19:31:00.87#ibcon#about to read 3, iclass 5, count 0 2006.229.19:31:00.90#ibcon#read 3, iclass 5, count 0 2006.229.19:31:00.90#ibcon#about to read 4, iclass 5, count 0 2006.229.19:31:00.90#ibcon#read 4, iclass 5, count 0 2006.229.19:31:00.90#ibcon#about to read 5, iclass 5, count 0 2006.229.19:31:00.90#ibcon#read 5, iclass 5, count 0 2006.229.19:31:00.90#ibcon#about to read 6, iclass 5, count 0 2006.229.19:31:00.90#ibcon#read 6, iclass 5, count 0 2006.229.19:31:00.90#ibcon#end of sib2, iclass 5, count 0 2006.229.19:31:00.90#ibcon#*after write, iclass 5, count 0 2006.229.19:31:00.90#ibcon#*before return 0, iclass 5, count 0 2006.229.19:31:00.90#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:31:00.90#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.19:31:00.90#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:31:00.90#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:31:00.90$vck44/vblo=1,629.99 2006.229.19:31:00.90#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.19:31:00.90#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.19:31:00.90#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:00.90#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:31:00.90#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:31:00.90#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:31:00.90#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:31:00.90#ibcon#first serial, iclass 7, count 0 2006.229.19:31:00.90#ibcon#enter sib2, iclass 7, count 0 2006.229.19:31:00.90#ibcon#flushed, iclass 7, count 0 2006.229.19:31:00.90#ibcon#about to write, iclass 7, count 0 2006.229.19:31:00.90#ibcon#wrote, iclass 7, count 0 2006.229.19:31:00.90#ibcon#about to read 3, iclass 7, count 0 2006.229.19:31:00.92#ibcon#read 3, iclass 7, count 0 2006.229.19:31:00.92#ibcon#about to read 4, iclass 7, count 0 2006.229.19:31:00.92#ibcon#read 4, iclass 7, count 0 2006.229.19:31:00.92#ibcon#about to read 5, iclass 7, count 0 2006.229.19:31:00.92#ibcon#read 5, iclass 7, count 0 2006.229.19:31:00.92#ibcon#about to read 6, iclass 7, count 0 2006.229.19:31:00.92#ibcon#read 6, iclass 7, count 0 2006.229.19:31:00.92#ibcon#end of sib2, iclass 7, count 0 2006.229.19:31:00.92#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:31:00.92#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:31:00.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:31:00.92#ibcon#*before write, iclass 7, count 0 2006.229.19:31:00.92#ibcon#enter sib2, iclass 7, count 0 2006.229.19:31:00.92#ibcon#flushed, iclass 7, count 0 2006.229.19:31:00.92#ibcon#about to write, iclass 7, count 0 2006.229.19:31:00.92#ibcon#wrote, iclass 7, count 0 2006.229.19:31:00.92#ibcon#about to read 3, iclass 7, count 0 2006.229.19:31:00.96#ibcon#read 3, iclass 7, count 0 2006.229.19:31:00.96#ibcon#about to read 4, iclass 7, count 0 2006.229.19:31:00.96#ibcon#read 4, iclass 7, count 0 2006.229.19:31:00.96#ibcon#about to read 5, iclass 7, count 0 2006.229.19:31:00.96#ibcon#read 5, iclass 7, count 0 2006.229.19:31:00.96#ibcon#about to read 6, iclass 7, count 0 2006.229.19:31:00.96#ibcon#read 6, iclass 7, count 0 2006.229.19:31:00.96#ibcon#end of sib2, iclass 7, count 0 2006.229.19:31:00.96#ibcon#*after write, iclass 7, count 0 2006.229.19:31:00.96#ibcon#*before return 0, iclass 7, count 0 2006.229.19:31:00.96#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:31:00.96#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.19:31:00.96#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:31:00.96#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:31:00.96$vck44/vb=1,4 2006.229.19:31:00.96#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.19:31:00.96#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.19:31:00.96#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:00.96#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:31:00.96#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:31:00.96#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:31:00.96#ibcon#enter wrdev, iclass 11, count 2 2006.229.19:31:00.96#ibcon#first serial, iclass 11, count 2 2006.229.19:31:00.96#ibcon#enter sib2, iclass 11, count 2 2006.229.19:31:00.96#ibcon#flushed, iclass 11, count 2 2006.229.19:31:00.96#ibcon#about to write, iclass 11, count 2 2006.229.19:31:00.96#ibcon#wrote, iclass 11, count 2 2006.229.19:31:00.96#ibcon#about to read 3, iclass 11, count 2 2006.229.19:31:00.98#ibcon#read 3, iclass 11, count 2 2006.229.19:31:00.98#ibcon#about to read 4, iclass 11, count 2 2006.229.19:31:00.98#ibcon#read 4, iclass 11, count 2 2006.229.19:31:00.98#ibcon#about to read 5, iclass 11, count 2 2006.229.19:31:00.98#ibcon#read 5, iclass 11, count 2 2006.229.19:31:00.98#ibcon#about to read 6, iclass 11, count 2 2006.229.19:31:00.98#ibcon#read 6, iclass 11, count 2 2006.229.19:31:00.98#ibcon#end of sib2, iclass 11, count 2 2006.229.19:31:00.98#ibcon#*mode == 0, iclass 11, count 2 2006.229.19:31:00.98#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.19:31:00.98#ibcon#[27=AT01-04\r\n] 2006.229.19:31:00.98#ibcon#*before write, iclass 11, count 2 2006.229.19:31:00.98#ibcon#enter sib2, iclass 11, count 2 2006.229.19:31:00.98#ibcon#flushed, iclass 11, count 2 2006.229.19:31:00.98#ibcon#about to write, iclass 11, count 2 2006.229.19:31:00.98#ibcon#wrote, iclass 11, count 2 2006.229.19:31:00.98#ibcon#about to read 3, iclass 11, count 2 2006.229.19:31:01.01#ibcon#read 3, iclass 11, count 2 2006.229.19:31:01.01#ibcon#about to read 4, iclass 11, count 2 2006.229.19:31:01.01#ibcon#read 4, iclass 11, count 2 2006.229.19:31:01.01#ibcon#about to read 5, iclass 11, count 2 2006.229.19:31:01.01#ibcon#read 5, iclass 11, count 2 2006.229.19:31:01.01#ibcon#about to read 6, iclass 11, count 2 2006.229.19:31:01.01#ibcon#read 6, iclass 11, count 2 2006.229.19:31:01.01#ibcon#end of sib2, iclass 11, count 2 2006.229.19:31:01.01#ibcon#*after write, iclass 11, count 2 2006.229.19:31:01.01#ibcon#*before return 0, iclass 11, count 2 2006.229.19:31:01.01#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:31:01.01#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:31:01.01#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.19:31:01.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:01.01#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:31:01.13#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:31:01.13#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:31:01.13#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:31:01.13#ibcon#first serial, iclass 11, count 0 2006.229.19:31:01.13#ibcon#enter sib2, iclass 11, count 0 2006.229.19:31:01.13#ibcon#flushed, iclass 11, count 0 2006.229.19:31:01.13#ibcon#about to write, iclass 11, count 0 2006.229.19:31:01.13#ibcon#wrote, iclass 11, count 0 2006.229.19:31:01.13#ibcon#about to read 3, iclass 11, count 0 2006.229.19:31:01.15#ibcon#read 3, iclass 11, count 0 2006.229.19:31:01.15#ibcon#about to read 4, iclass 11, count 0 2006.229.19:31:01.15#ibcon#read 4, iclass 11, count 0 2006.229.19:31:01.15#ibcon#about to read 5, iclass 11, count 0 2006.229.19:31:01.15#ibcon#read 5, iclass 11, count 0 2006.229.19:31:01.15#ibcon#about to read 6, iclass 11, count 0 2006.229.19:31:01.15#ibcon#read 6, iclass 11, count 0 2006.229.19:31:01.15#ibcon#end of sib2, iclass 11, count 0 2006.229.19:31:01.15#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:31:01.15#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:31:01.15#ibcon#[27=USB\r\n] 2006.229.19:31:01.15#ibcon#*before write, iclass 11, count 0 2006.229.19:31:01.15#ibcon#enter sib2, iclass 11, count 0 2006.229.19:31:01.15#ibcon#flushed, iclass 11, count 0 2006.229.19:31:01.15#ibcon#about to write, iclass 11, count 0 2006.229.19:31:01.15#ibcon#wrote, iclass 11, count 0 2006.229.19:31:01.15#ibcon#about to read 3, iclass 11, count 0 2006.229.19:31:01.18#ibcon#read 3, iclass 11, count 0 2006.229.19:31:01.18#ibcon#about to read 4, iclass 11, count 0 2006.229.19:31:01.18#ibcon#read 4, iclass 11, count 0 2006.229.19:31:01.18#ibcon#about to read 5, iclass 11, count 0 2006.229.19:31:01.18#ibcon#read 5, iclass 11, count 0 2006.229.19:31:01.18#ibcon#about to read 6, iclass 11, count 0 2006.229.19:31:01.18#ibcon#read 6, iclass 11, count 0 2006.229.19:31:01.18#ibcon#end of sib2, iclass 11, count 0 2006.229.19:31:01.18#ibcon#*after write, iclass 11, count 0 2006.229.19:31:01.18#ibcon#*before return 0, iclass 11, count 0 2006.229.19:31:01.18#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:31:01.18#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:31:01.18#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:31:01.18#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:31:01.18$vck44/vblo=2,634.99 2006.229.19:31:01.18#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.19:31:01.18#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.19:31:01.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:01.18#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:31:01.18#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:31:01.18#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:31:01.18#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:31:01.18#ibcon#first serial, iclass 13, count 0 2006.229.19:31:01.18#ibcon#enter sib2, iclass 13, count 0 2006.229.19:31:01.18#ibcon#flushed, iclass 13, count 0 2006.229.19:31:01.18#ibcon#about to write, iclass 13, count 0 2006.229.19:31:01.18#ibcon#wrote, iclass 13, count 0 2006.229.19:31:01.18#ibcon#about to read 3, iclass 13, count 0 2006.229.19:31:01.20#ibcon#read 3, iclass 13, count 0 2006.229.19:31:01.20#ibcon#about to read 4, iclass 13, count 0 2006.229.19:31:01.20#ibcon#read 4, iclass 13, count 0 2006.229.19:31:01.20#ibcon#about to read 5, iclass 13, count 0 2006.229.19:31:01.20#ibcon#read 5, iclass 13, count 0 2006.229.19:31:01.20#ibcon#about to read 6, iclass 13, count 0 2006.229.19:31:01.20#ibcon#read 6, iclass 13, count 0 2006.229.19:31:01.20#ibcon#end of sib2, iclass 13, count 0 2006.229.19:31:01.20#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:31:01.20#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:31:01.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:31:01.20#ibcon#*before write, iclass 13, count 0 2006.229.19:31:01.20#ibcon#enter sib2, iclass 13, count 0 2006.229.19:31:01.20#ibcon#flushed, iclass 13, count 0 2006.229.19:31:01.20#ibcon#about to write, iclass 13, count 0 2006.229.19:31:01.20#ibcon#wrote, iclass 13, count 0 2006.229.19:31:01.20#ibcon#about to read 3, iclass 13, count 0 2006.229.19:31:01.24#ibcon#read 3, iclass 13, count 0 2006.229.19:31:01.24#ibcon#about to read 4, iclass 13, count 0 2006.229.19:31:01.24#ibcon#read 4, iclass 13, count 0 2006.229.19:31:01.24#ibcon#about to read 5, iclass 13, count 0 2006.229.19:31:01.24#ibcon#read 5, iclass 13, count 0 2006.229.19:31:01.24#ibcon#about to read 6, iclass 13, count 0 2006.229.19:31:01.24#ibcon#read 6, iclass 13, count 0 2006.229.19:31:01.24#ibcon#end of sib2, iclass 13, count 0 2006.229.19:31:01.24#ibcon#*after write, iclass 13, count 0 2006.229.19:31:01.24#ibcon#*before return 0, iclass 13, count 0 2006.229.19:31:01.24#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:31:01.24#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.19:31:01.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:31:01.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:31:01.24$vck44/vb=2,4 2006.229.19:31:01.24#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.19:31:01.24#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.19:31:01.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:01.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:31:01.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:31:01.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:31:01.30#ibcon#enter wrdev, iclass 15, count 2 2006.229.19:31:01.30#ibcon#first serial, iclass 15, count 2 2006.229.19:31:01.30#ibcon#enter sib2, iclass 15, count 2 2006.229.19:31:01.30#ibcon#flushed, iclass 15, count 2 2006.229.19:31:01.30#ibcon#about to write, iclass 15, count 2 2006.229.19:31:01.30#ibcon#wrote, iclass 15, count 2 2006.229.19:31:01.30#ibcon#about to read 3, iclass 15, count 2 2006.229.19:31:01.32#ibcon#read 3, iclass 15, count 2 2006.229.19:31:01.32#ibcon#about to read 4, iclass 15, count 2 2006.229.19:31:01.32#ibcon#read 4, iclass 15, count 2 2006.229.19:31:01.32#ibcon#about to read 5, iclass 15, count 2 2006.229.19:31:01.32#ibcon#read 5, iclass 15, count 2 2006.229.19:31:01.32#ibcon#about to read 6, iclass 15, count 2 2006.229.19:31:01.32#ibcon#read 6, iclass 15, count 2 2006.229.19:31:01.32#ibcon#end of sib2, iclass 15, count 2 2006.229.19:31:01.32#ibcon#*mode == 0, iclass 15, count 2 2006.229.19:31:01.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.19:31:01.32#ibcon#[27=AT02-04\r\n] 2006.229.19:31:01.32#ibcon#*before write, iclass 15, count 2 2006.229.19:31:01.32#ibcon#enter sib2, iclass 15, count 2 2006.229.19:31:01.32#ibcon#flushed, iclass 15, count 2 2006.229.19:31:01.32#ibcon#about to write, iclass 15, count 2 2006.229.19:31:01.32#ibcon#wrote, iclass 15, count 2 2006.229.19:31:01.32#ibcon#about to read 3, iclass 15, count 2 2006.229.19:31:01.35#ibcon#read 3, iclass 15, count 2 2006.229.19:31:01.35#ibcon#about to read 4, iclass 15, count 2 2006.229.19:31:01.35#ibcon#read 4, iclass 15, count 2 2006.229.19:31:01.35#ibcon#about to read 5, iclass 15, count 2 2006.229.19:31:01.35#ibcon#read 5, iclass 15, count 2 2006.229.19:31:01.35#ibcon#about to read 6, iclass 15, count 2 2006.229.19:31:01.35#ibcon#read 6, iclass 15, count 2 2006.229.19:31:01.35#ibcon#end of sib2, iclass 15, count 2 2006.229.19:31:01.35#ibcon#*after write, iclass 15, count 2 2006.229.19:31:01.35#ibcon#*before return 0, iclass 15, count 2 2006.229.19:31:01.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:31:01.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.19:31:01.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.19:31:01.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:01.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:31:01.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:31:01.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:31:01.47#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:31:01.47#ibcon#first serial, iclass 15, count 0 2006.229.19:31:01.47#ibcon#enter sib2, iclass 15, count 0 2006.229.19:31:01.47#ibcon#flushed, iclass 15, count 0 2006.229.19:31:01.47#ibcon#about to write, iclass 15, count 0 2006.229.19:31:01.47#ibcon#wrote, iclass 15, count 0 2006.229.19:31:01.47#ibcon#about to read 3, iclass 15, count 0 2006.229.19:31:01.49#ibcon#read 3, iclass 15, count 0 2006.229.19:31:01.49#ibcon#about to read 4, iclass 15, count 0 2006.229.19:31:01.49#ibcon#read 4, iclass 15, count 0 2006.229.19:31:01.49#ibcon#about to read 5, iclass 15, count 0 2006.229.19:31:01.49#ibcon#read 5, iclass 15, count 0 2006.229.19:31:01.49#ibcon#about to read 6, iclass 15, count 0 2006.229.19:31:01.49#ibcon#read 6, iclass 15, count 0 2006.229.19:31:01.49#ibcon#end of sib2, iclass 15, count 0 2006.229.19:31:01.49#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:31:01.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:31:01.49#ibcon#[27=USB\r\n] 2006.229.19:31:01.49#ibcon#*before write, iclass 15, count 0 2006.229.19:31:01.49#ibcon#enter sib2, iclass 15, count 0 2006.229.19:31:01.49#ibcon#flushed, iclass 15, count 0 2006.229.19:31:01.49#ibcon#about to write, iclass 15, count 0 2006.229.19:31:01.49#ibcon#wrote, iclass 15, count 0 2006.229.19:31:01.49#ibcon#about to read 3, iclass 15, count 0 2006.229.19:31:01.52#ibcon#read 3, iclass 15, count 0 2006.229.19:31:01.52#ibcon#about to read 4, iclass 15, count 0 2006.229.19:31:01.52#ibcon#read 4, iclass 15, count 0 2006.229.19:31:01.52#ibcon#about to read 5, iclass 15, count 0 2006.229.19:31:01.52#ibcon#read 5, iclass 15, count 0 2006.229.19:31:01.52#ibcon#about to read 6, iclass 15, count 0 2006.229.19:31:01.52#ibcon#read 6, iclass 15, count 0 2006.229.19:31:01.52#ibcon#end of sib2, iclass 15, count 0 2006.229.19:31:01.52#ibcon#*after write, iclass 15, count 0 2006.229.19:31:01.52#ibcon#*before return 0, iclass 15, count 0 2006.229.19:31:01.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:31:01.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.19:31:01.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:31:01.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:31:01.52$vck44/vblo=3,649.99 2006.229.19:31:01.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.19:31:01.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.19:31:01.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:01.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:31:01.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:31:01.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:31:01.52#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:31:01.52#ibcon#first serial, iclass 17, count 0 2006.229.19:31:01.52#ibcon#enter sib2, iclass 17, count 0 2006.229.19:31:01.52#ibcon#flushed, iclass 17, count 0 2006.229.19:31:01.52#ibcon#about to write, iclass 17, count 0 2006.229.19:31:01.52#ibcon#wrote, iclass 17, count 0 2006.229.19:31:01.52#ibcon#about to read 3, iclass 17, count 0 2006.229.19:31:01.54#ibcon#read 3, iclass 17, count 0 2006.229.19:31:01.54#ibcon#about to read 4, iclass 17, count 0 2006.229.19:31:01.54#ibcon#read 4, iclass 17, count 0 2006.229.19:31:01.54#ibcon#about to read 5, iclass 17, count 0 2006.229.19:31:01.54#ibcon#read 5, iclass 17, count 0 2006.229.19:31:01.54#ibcon#about to read 6, iclass 17, count 0 2006.229.19:31:01.54#ibcon#read 6, iclass 17, count 0 2006.229.19:31:01.54#ibcon#end of sib2, iclass 17, count 0 2006.229.19:31:01.54#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:31:01.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:31:01.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:31:01.54#ibcon#*before write, iclass 17, count 0 2006.229.19:31:01.54#ibcon#enter sib2, iclass 17, count 0 2006.229.19:31:01.54#ibcon#flushed, iclass 17, count 0 2006.229.19:31:01.54#ibcon#about to write, iclass 17, count 0 2006.229.19:31:01.54#ibcon#wrote, iclass 17, count 0 2006.229.19:31:01.54#ibcon#about to read 3, iclass 17, count 0 2006.229.19:31:01.58#ibcon#read 3, iclass 17, count 0 2006.229.19:31:01.58#ibcon#about to read 4, iclass 17, count 0 2006.229.19:31:01.58#ibcon#read 4, iclass 17, count 0 2006.229.19:31:01.58#ibcon#about to read 5, iclass 17, count 0 2006.229.19:31:01.58#ibcon#read 5, iclass 17, count 0 2006.229.19:31:01.58#ibcon#about to read 6, iclass 17, count 0 2006.229.19:31:01.58#ibcon#read 6, iclass 17, count 0 2006.229.19:31:01.58#ibcon#end of sib2, iclass 17, count 0 2006.229.19:31:01.58#ibcon#*after write, iclass 17, count 0 2006.229.19:31:01.58#ibcon#*before return 0, iclass 17, count 0 2006.229.19:31:01.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:31:01.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.19:31:01.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:31:01.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:31:01.58$vck44/vb=3,4 2006.229.19:31:01.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.19:31:01.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.19:31:01.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:01.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:31:01.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:31:01.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:31:01.64#ibcon#enter wrdev, iclass 19, count 2 2006.229.19:31:01.64#ibcon#first serial, iclass 19, count 2 2006.229.19:31:01.64#ibcon#enter sib2, iclass 19, count 2 2006.229.19:31:01.64#ibcon#flushed, iclass 19, count 2 2006.229.19:31:01.64#ibcon#about to write, iclass 19, count 2 2006.229.19:31:01.64#ibcon#wrote, iclass 19, count 2 2006.229.19:31:01.64#ibcon#about to read 3, iclass 19, count 2 2006.229.19:31:01.66#ibcon#read 3, iclass 19, count 2 2006.229.19:31:01.66#ibcon#about to read 4, iclass 19, count 2 2006.229.19:31:01.66#ibcon#read 4, iclass 19, count 2 2006.229.19:31:01.66#ibcon#about to read 5, iclass 19, count 2 2006.229.19:31:01.66#ibcon#read 5, iclass 19, count 2 2006.229.19:31:01.66#ibcon#about to read 6, iclass 19, count 2 2006.229.19:31:01.66#ibcon#read 6, iclass 19, count 2 2006.229.19:31:01.66#ibcon#end of sib2, iclass 19, count 2 2006.229.19:31:01.66#ibcon#*mode == 0, iclass 19, count 2 2006.229.19:31:01.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.19:31:01.66#ibcon#[27=AT03-04\r\n] 2006.229.19:31:01.66#ibcon#*before write, iclass 19, count 2 2006.229.19:31:01.66#ibcon#enter sib2, iclass 19, count 2 2006.229.19:31:01.66#ibcon#flushed, iclass 19, count 2 2006.229.19:31:01.66#ibcon#about to write, iclass 19, count 2 2006.229.19:31:01.66#ibcon#wrote, iclass 19, count 2 2006.229.19:31:01.66#ibcon#about to read 3, iclass 19, count 2 2006.229.19:31:01.69#ibcon#read 3, iclass 19, count 2 2006.229.19:31:01.69#ibcon#about to read 4, iclass 19, count 2 2006.229.19:31:01.69#ibcon#read 4, iclass 19, count 2 2006.229.19:31:01.69#ibcon#about to read 5, iclass 19, count 2 2006.229.19:31:01.69#ibcon#read 5, iclass 19, count 2 2006.229.19:31:01.69#ibcon#about to read 6, iclass 19, count 2 2006.229.19:31:01.69#ibcon#read 6, iclass 19, count 2 2006.229.19:31:01.69#ibcon#end of sib2, iclass 19, count 2 2006.229.19:31:01.69#ibcon#*after write, iclass 19, count 2 2006.229.19:31:01.69#ibcon#*before return 0, iclass 19, count 2 2006.229.19:31:01.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:31:01.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.19:31:01.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.19:31:01.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:01.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:31:01.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:31:01.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:31:01.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:31:01.81#ibcon#first serial, iclass 19, count 0 2006.229.19:31:01.81#ibcon#enter sib2, iclass 19, count 0 2006.229.19:31:01.81#ibcon#flushed, iclass 19, count 0 2006.229.19:31:01.81#ibcon#about to write, iclass 19, count 0 2006.229.19:31:01.81#ibcon#wrote, iclass 19, count 0 2006.229.19:31:01.81#ibcon#about to read 3, iclass 19, count 0 2006.229.19:31:01.83#ibcon#read 3, iclass 19, count 0 2006.229.19:31:01.83#ibcon#about to read 4, iclass 19, count 0 2006.229.19:31:01.83#ibcon#read 4, iclass 19, count 0 2006.229.19:31:01.83#ibcon#about to read 5, iclass 19, count 0 2006.229.19:31:01.83#ibcon#read 5, iclass 19, count 0 2006.229.19:31:01.83#ibcon#about to read 6, iclass 19, count 0 2006.229.19:31:01.83#ibcon#read 6, iclass 19, count 0 2006.229.19:31:01.83#ibcon#end of sib2, iclass 19, count 0 2006.229.19:31:01.83#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:31:01.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:31:01.83#ibcon#[27=USB\r\n] 2006.229.19:31:01.83#ibcon#*before write, iclass 19, count 0 2006.229.19:31:01.83#ibcon#enter sib2, iclass 19, count 0 2006.229.19:31:01.83#ibcon#flushed, iclass 19, count 0 2006.229.19:31:01.83#ibcon#about to write, iclass 19, count 0 2006.229.19:31:01.83#ibcon#wrote, iclass 19, count 0 2006.229.19:31:01.83#ibcon#about to read 3, iclass 19, count 0 2006.229.19:31:01.86#ibcon#read 3, iclass 19, count 0 2006.229.19:31:01.86#ibcon#about to read 4, iclass 19, count 0 2006.229.19:31:01.86#ibcon#read 4, iclass 19, count 0 2006.229.19:31:01.86#ibcon#about to read 5, iclass 19, count 0 2006.229.19:31:01.86#ibcon#read 5, iclass 19, count 0 2006.229.19:31:01.86#ibcon#about to read 6, iclass 19, count 0 2006.229.19:31:01.86#ibcon#read 6, iclass 19, count 0 2006.229.19:31:01.86#ibcon#end of sib2, iclass 19, count 0 2006.229.19:31:01.86#ibcon#*after write, iclass 19, count 0 2006.229.19:31:01.86#ibcon#*before return 0, iclass 19, count 0 2006.229.19:31:01.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:31:01.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.19:31:01.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:31:01.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:31:01.86$vck44/vblo=4,679.99 2006.229.19:31:01.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.19:31:01.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.19:31:01.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:01.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:31:01.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:31:01.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:31:01.86#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:31:01.86#ibcon#first serial, iclass 21, count 0 2006.229.19:31:01.86#ibcon#enter sib2, iclass 21, count 0 2006.229.19:31:01.86#ibcon#flushed, iclass 21, count 0 2006.229.19:31:01.86#ibcon#about to write, iclass 21, count 0 2006.229.19:31:01.86#ibcon#wrote, iclass 21, count 0 2006.229.19:31:01.86#ibcon#about to read 3, iclass 21, count 0 2006.229.19:31:01.88#ibcon#read 3, iclass 21, count 0 2006.229.19:31:01.88#ibcon#about to read 4, iclass 21, count 0 2006.229.19:31:01.88#ibcon#read 4, iclass 21, count 0 2006.229.19:31:01.88#ibcon#about to read 5, iclass 21, count 0 2006.229.19:31:01.88#ibcon#read 5, iclass 21, count 0 2006.229.19:31:01.88#ibcon#about to read 6, iclass 21, count 0 2006.229.19:31:01.88#ibcon#read 6, iclass 21, count 0 2006.229.19:31:01.88#ibcon#end of sib2, iclass 21, count 0 2006.229.19:31:01.88#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:31:01.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:31:01.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:31:01.88#ibcon#*before write, iclass 21, count 0 2006.229.19:31:01.88#ibcon#enter sib2, iclass 21, count 0 2006.229.19:31:01.88#ibcon#flushed, iclass 21, count 0 2006.229.19:31:01.88#ibcon#about to write, iclass 21, count 0 2006.229.19:31:01.88#ibcon#wrote, iclass 21, count 0 2006.229.19:31:01.88#ibcon#about to read 3, iclass 21, count 0 2006.229.19:31:01.92#ibcon#read 3, iclass 21, count 0 2006.229.19:31:01.92#ibcon#about to read 4, iclass 21, count 0 2006.229.19:31:01.92#ibcon#read 4, iclass 21, count 0 2006.229.19:31:01.92#ibcon#about to read 5, iclass 21, count 0 2006.229.19:31:01.92#ibcon#read 5, iclass 21, count 0 2006.229.19:31:01.92#ibcon#about to read 6, iclass 21, count 0 2006.229.19:31:01.92#ibcon#read 6, iclass 21, count 0 2006.229.19:31:01.92#ibcon#end of sib2, iclass 21, count 0 2006.229.19:31:01.92#ibcon#*after write, iclass 21, count 0 2006.229.19:31:01.92#ibcon#*before return 0, iclass 21, count 0 2006.229.19:31:01.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:31:01.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.19:31:01.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:31:01.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:31:01.92$vck44/vb=4,4 2006.229.19:31:01.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.19:31:01.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.19:31:01.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:01.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:31:01.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:31:01.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:31:01.98#ibcon#enter wrdev, iclass 23, count 2 2006.229.19:31:01.98#ibcon#first serial, iclass 23, count 2 2006.229.19:31:01.98#ibcon#enter sib2, iclass 23, count 2 2006.229.19:31:01.98#ibcon#flushed, iclass 23, count 2 2006.229.19:31:01.98#ibcon#about to write, iclass 23, count 2 2006.229.19:31:01.98#ibcon#wrote, iclass 23, count 2 2006.229.19:31:01.98#ibcon#about to read 3, iclass 23, count 2 2006.229.19:31:02.00#ibcon#read 3, iclass 23, count 2 2006.229.19:31:02.00#ibcon#about to read 4, iclass 23, count 2 2006.229.19:31:02.00#ibcon#read 4, iclass 23, count 2 2006.229.19:31:02.00#ibcon#about to read 5, iclass 23, count 2 2006.229.19:31:02.00#ibcon#read 5, iclass 23, count 2 2006.229.19:31:02.00#ibcon#about to read 6, iclass 23, count 2 2006.229.19:31:02.00#ibcon#read 6, iclass 23, count 2 2006.229.19:31:02.00#ibcon#end of sib2, iclass 23, count 2 2006.229.19:31:02.00#ibcon#*mode == 0, iclass 23, count 2 2006.229.19:31:02.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.19:31:02.00#ibcon#[27=AT04-04\r\n] 2006.229.19:31:02.00#ibcon#*before write, iclass 23, count 2 2006.229.19:31:02.00#ibcon#enter sib2, iclass 23, count 2 2006.229.19:31:02.00#ibcon#flushed, iclass 23, count 2 2006.229.19:31:02.00#ibcon#about to write, iclass 23, count 2 2006.229.19:31:02.00#ibcon#wrote, iclass 23, count 2 2006.229.19:31:02.00#ibcon#about to read 3, iclass 23, count 2 2006.229.19:31:02.03#ibcon#read 3, iclass 23, count 2 2006.229.19:31:02.03#ibcon#about to read 4, iclass 23, count 2 2006.229.19:31:02.03#ibcon#read 4, iclass 23, count 2 2006.229.19:31:02.03#ibcon#about to read 5, iclass 23, count 2 2006.229.19:31:02.03#ibcon#read 5, iclass 23, count 2 2006.229.19:31:02.03#ibcon#about to read 6, iclass 23, count 2 2006.229.19:31:02.03#ibcon#read 6, iclass 23, count 2 2006.229.19:31:02.03#ibcon#end of sib2, iclass 23, count 2 2006.229.19:31:02.03#ibcon#*after write, iclass 23, count 2 2006.229.19:31:02.03#ibcon#*before return 0, iclass 23, count 2 2006.229.19:31:02.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:31:02.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.19:31:02.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.19:31:02.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:02.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:31:02.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:31:02.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:31:02.15#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:31:02.15#ibcon#first serial, iclass 23, count 0 2006.229.19:31:02.15#ibcon#enter sib2, iclass 23, count 0 2006.229.19:31:02.15#ibcon#flushed, iclass 23, count 0 2006.229.19:31:02.15#ibcon#about to write, iclass 23, count 0 2006.229.19:31:02.15#ibcon#wrote, iclass 23, count 0 2006.229.19:31:02.15#ibcon#about to read 3, iclass 23, count 0 2006.229.19:31:02.17#ibcon#read 3, iclass 23, count 0 2006.229.19:31:02.17#ibcon#about to read 4, iclass 23, count 0 2006.229.19:31:02.17#ibcon#read 4, iclass 23, count 0 2006.229.19:31:02.17#ibcon#about to read 5, iclass 23, count 0 2006.229.19:31:02.17#ibcon#read 5, iclass 23, count 0 2006.229.19:31:02.17#ibcon#about to read 6, iclass 23, count 0 2006.229.19:31:02.17#ibcon#read 6, iclass 23, count 0 2006.229.19:31:02.17#ibcon#end of sib2, iclass 23, count 0 2006.229.19:31:02.17#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:31:02.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:31:02.17#ibcon#[27=USB\r\n] 2006.229.19:31:02.17#ibcon#*before write, iclass 23, count 0 2006.229.19:31:02.17#ibcon#enter sib2, iclass 23, count 0 2006.229.19:31:02.17#ibcon#flushed, iclass 23, count 0 2006.229.19:31:02.17#ibcon#about to write, iclass 23, count 0 2006.229.19:31:02.17#ibcon#wrote, iclass 23, count 0 2006.229.19:31:02.17#ibcon#about to read 3, iclass 23, count 0 2006.229.19:31:02.20#ibcon#read 3, iclass 23, count 0 2006.229.19:31:02.20#ibcon#about to read 4, iclass 23, count 0 2006.229.19:31:02.20#ibcon#read 4, iclass 23, count 0 2006.229.19:31:02.20#ibcon#about to read 5, iclass 23, count 0 2006.229.19:31:02.20#ibcon#read 5, iclass 23, count 0 2006.229.19:31:02.20#ibcon#about to read 6, iclass 23, count 0 2006.229.19:31:02.20#ibcon#read 6, iclass 23, count 0 2006.229.19:31:02.20#ibcon#end of sib2, iclass 23, count 0 2006.229.19:31:02.20#ibcon#*after write, iclass 23, count 0 2006.229.19:31:02.20#ibcon#*before return 0, iclass 23, count 0 2006.229.19:31:02.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:31:02.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.19:31:02.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:31:02.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:31:02.20$vck44/vblo=5,709.99 2006.229.19:31:02.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.19:31:02.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.19:31:02.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:02.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:31:02.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:31:02.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:31:02.20#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:31:02.20#ibcon#first serial, iclass 25, count 0 2006.229.19:31:02.20#ibcon#enter sib2, iclass 25, count 0 2006.229.19:31:02.20#ibcon#flushed, iclass 25, count 0 2006.229.19:31:02.20#ibcon#about to write, iclass 25, count 0 2006.229.19:31:02.20#ibcon#wrote, iclass 25, count 0 2006.229.19:31:02.20#ibcon#about to read 3, iclass 25, count 0 2006.229.19:31:02.22#ibcon#read 3, iclass 25, count 0 2006.229.19:31:02.22#ibcon#about to read 4, iclass 25, count 0 2006.229.19:31:02.22#ibcon#read 4, iclass 25, count 0 2006.229.19:31:02.22#ibcon#about to read 5, iclass 25, count 0 2006.229.19:31:02.22#ibcon#read 5, iclass 25, count 0 2006.229.19:31:02.22#ibcon#about to read 6, iclass 25, count 0 2006.229.19:31:02.22#ibcon#read 6, iclass 25, count 0 2006.229.19:31:02.22#ibcon#end of sib2, iclass 25, count 0 2006.229.19:31:02.22#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:31:02.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:31:02.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:31:02.22#ibcon#*before write, iclass 25, count 0 2006.229.19:31:02.22#ibcon#enter sib2, iclass 25, count 0 2006.229.19:31:02.22#ibcon#flushed, iclass 25, count 0 2006.229.19:31:02.22#ibcon#about to write, iclass 25, count 0 2006.229.19:31:02.22#ibcon#wrote, iclass 25, count 0 2006.229.19:31:02.22#ibcon#about to read 3, iclass 25, count 0 2006.229.19:31:02.26#ibcon#read 3, iclass 25, count 0 2006.229.19:31:02.26#ibcon#about to read 4, iclass 25, count 0 2006.229.19:31:02.26#ibcon#read 4, iclass 25, count 0 2006.229.19:31:02.26#ibcon#about to read 5, iclass 25, count 0 2006.229.19:31:02.26#ibcon#read 5, iclass 25, count 0 2006.229.19:31:02.26#ibcon#about to read 6, iclass 25, count 0 2006.229.19:31:02.26#ibcon#read 6, iclass 25, count 0 2006.229.19:31:02.26#ibcon#end of sib2, iclass 25, count 0 2006.229.19:31:02.26#ibcon#*after write, iclass 25, count 0 2006.229.19:31:02.26#ibcon#*before return 0, iclass 25, count 0 2006.229.19:31:02.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:31:02.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:31:02.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:31:02.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:31:02.26$vck44/vb=5,4 2006.229.19:31:02.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.19:31:02.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.19:31:02.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:02.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:31:02.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:31:02.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:31:02.32#ibcon#enter wrdev, iclass 27, count 2 2006.229.19:31:02.32#ibcon#first serial, iclass 27, count 2 2006.229.19:31:02.32#ibcon#enter sib2, iclass 27, count 2 2006.229.19:31:02.32#ibcon#flushed, iclass 27, count 2 2006.229.19:31:02.32#ibcon#about to write, iclass 27, count 2 2006.229.19:31:02.32#ibcon#wrote, iclass 27, count 2 2006.229.19:31:02.32#ibcon#about to read 3, iclass 27, count 2 2006.229.19:31:02.34#ibcon#read 3, iclass 27, count 2 2006.229.19:31:02.34#ibcon#about to read 4, iclass 27, count 2 2006.229.19:31:02.34#ibcon#read 4, iclass 27, count 2 2006.229.19:31:02.34#ibcon#about to read 5, iclass 27, count 2 2006.229.19:31:02.34#ibcon#read 5, iclass 27, count 2 2006.229.19:31:02.34#ibcon#about to read 6, iclass 27, count 2 2006.229.19:31:02.34#ibcon#read 6, iclass 27, count 2 2006.229.19:31:02.34#ibcon#end of sib2, iclass 27, count 2 2006.229.19:31:02.34#ibcon#*mode == 0, iclass 27, count 2 2006.229.19:31:02.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.19:31:02.34#ibcon#[27=AT05-04\r\n] 2006.229.19:31:02.34#ibcon#*before write, iclass 27, count 2 2006.229.19:31:02.34#ibcon#enter sib2, iclass 27, count 2 2006.229.19:31:02.34#ibcon#flushed, iclass 27, count 2 2006.229.19:31:02.34#ibcon#about to write, iclass 27, count 2 2006.229.19:31:02.34#ibcon#wrote, iclass 27, count 2 2006.229.19:31:02.34#ibcon#about to read 3, iclass 27, count 2 2006.229.19:31:02.37#ibcon#read 3, iclass 27, count 2 2006.229.19:31:02.37#ibcon#about to read 4, iclass 27, count 2 2006.229.19:31:02.37#ibcon#read 4, iclass 27, count 2 2006.229.19:31:02.37#ibcon#about to read 5, iclass 27, count 2 2006.229.19:31:02.37#ibcon#read 5, iclass 27, count 2 2006.229.19:31:02.37#ibcon#about to read 6, iclass 27, count 2 2006.229.19:31:02.37#ibcon#read 6, iclass 27, count 2 2006.229.19:31:02.37#ibcon#end of sib2, iclass 27, count 2 2006.229.19:31:02.37#ibcon#*after write, iclass 27, count 2 2006.229.19:31:02.37#ibcon#*before return 0, iclass 27, count 2 2006.229.19:31:02.37#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:31:02.37#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.19:31:02.37#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.19:31:02.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:02.37#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:31:02.49#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:31:02.49#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:31:02.49#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:31:02.49#ibcon#first serial, iclass 27, count 0 2006.229.19:31:02.49#ibcon#enter sib2, iclass 27, count 0 2006.229.19:31:02.49#ibcon#flushed, iclass 27, count 0 2006.229.19:31:02.49#ibcon#about to write, iclass 27, count 0 2006.229.19:31:02.49#ibcon#wrote, iclass 27, count 0 2006.229.19:31:02.49#ibcon#about to read 3, iclass 27, count 0 2006.229.19:31:02.51#ibcon#read 3, iclass 27, count 0 2006.229.19:31:02.51#ibcon#about to read 4, iclass 27, count 0 2006.229.19:31:02.51#ibcon#read 4, iclass 27, count 0 2006.229.19:31:02.51#ibcon#about to read 5, iclass 27, count 0 2006.229.19:31:02.51#ibcon#read 5, iclass 27, count 0 2006.229.19:31:02.51#ibcon#about to read 6, iclass 27, count 0 2006.229.19:31:02.51#ibcon#read 6, iclass 27, count 0 2006.229.19:31:02.51#ibcon#end of sib2, iclass 27, count 0 2006.229.19:31:02.51#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:31:02.51#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:31:02.51#ibcon#[27=USB\r\n] 2006.229.19:31:02.51#ibcon#*before write, iclass 27, count 0 2006.229.19:31:02.51#ibcon#enter sib2, iclass 27, count 0 2006.229.19:31:02.51#ibcon#flushed, iclass 27, count 0 2006.229.19:31:02.51#ibcon#about to write, iclass 27, count 0 2006.229.19:31:02.51#ibcon#wrote, iclass 27, count 0 2006.229.19:31:02.51#ibcon#about to read 3, iclass 27, count 0 2006.229.19:31:02.54#ibcon#read 3, iclass 27, count 0 2006.229.19:31:02.54#ibcon#about to read 4, iclass 27, count 0 2006.229.19:31:02.54#ibcon#read 4, iclass 27, count 0 2006.229.19:31:02.54#ibcon#about to read 5, iclass 27, count 0 2006.229.19:31:02.54#ibcon#read 5, iclass 27, count 0 2006.229.19:31:02.54#ibcon#about to read 6, iclass 27, count 0 2006.229.19:31:02.54#ibcon#read 6, iclass 27, count 0 2006.229.19:31:02.54#ibcon#end of sib2, iclass 27, count 0 2006.229.19:31:02.54#ibcon#*after write, iclass 27, count 0 2006.229.19:31:02.54#ibcon#*before return 0, iclass 27, count 0 2006.229.19:31:02.54#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:31:02.54#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.19:31:02.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:31:02.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:31:02.54$vck44/vblo=6,719.99 2006.229.19:31:02.54#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.19:31:02.54#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.19:31:02.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:02.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:31:02.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:31:02.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:31:02.54#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:31:02.54#ibcon#first serial, iclass 29, count 0 2006.229.19:31:02.54#ibcon#enter sib2, iclass 29, count 0 2006.229.19:31:02.54#ibcon#flushed, iclass 29, count 0 2006.229.19:31:02.54#ibcon#about to write, iclass 29, count 0 2006.229.19:31:02.54#ibcon#wrote, iclass 29, count 0 2006.229.19:31:02.54#ibcon#about to read 3, iclass 29, count 0 2006.229.19:31:02.56#ibcon#read 3, iclass 29, count 0 2006.229.19:31:02.56#ibcon#about to read 4, iclass 29, count 0 2006.229.19:31:02.56#ibcon#read 4, iclass 29, count 0 2006.229.19:31:02.56#ibcon#about to read 5, iclass 29, count 0 2006.229.19:31:02.56#ibcon#read 5, iclass 29, count 0 2006.229.19:31:02.56#ibcon#about to read 6, iclass 29, count 0 2006.229.19:31:02.56#ibcon#read 6, iclass 29, count 0 2006.229.19:31:02.56#ibcon#end of sib2, iclass 29, count 0 2006.229.19:31:02.56#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:31:02.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:31:02.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:31:02.56#ibcon#*before write, iclass 29, count 0 2006.229.19:31:02.56#ibcon#enter sib2, iclass 29, count 0 2006.229.19:31:02.56#ibcon#flushed, iclass 29, count 0 2006.229.19:31:02.56#ibcon#about to write, iclass 29, count 0 2006.229.19:31:02.56#ibcon#wrote, iclass 29, count 0 2006.229.19:31:02.56#ibcon#about to read 3, iclass 29, count 0 2006.229.19:31:02.60#ibcon#read 3, iclass 29, count 0 2006.229.19:31:02.60#ibcon#about to read 4, iclass 29, count 0 2006.229.19:31:02.60#ibcon#read 4, iclass 29, count 0 2006.229.19:31:02.60#ibcon#about to read 5, iclass 29, count 0 2006.229.19:31:02.60#ibcon#read 5, iclass 29, count 0 2006.229.19:31:02.60#ibcon#about to read 6, iclass 29, count 0 2006.229.19:31:02.60#ibcon#read 6, iclass 29, count 0 2006.229.19:31:02.60#ibcon#end of sib2, iclass 29, count 0 2006.229.19:31:02.60#ibcon#*after write, iclass 29, count 0 2006.229.19:31:02.60#ibcon#*before return 0, iclass 29, count 0 2006.229.19:31:02.60#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:31:02.60#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.19:31:02.60#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:31:02.60#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:31:02.60$vck44/vb=6,4 2006.229.19:31:02.60#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.19:31:02.60#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.19:31:02.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:02.60#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:31:02.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:31:02.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:31:02.66#ibcon#enter wrdev, iclass 31, count 2 2006.229.19:31:02.66#ibcon#first serial, iclass 31, count 2 2006.229.19:31:02.66#ibcon#enter sib2, iclass 31, count 2 2006.229.19:31:02.66#ibcon#flushed, iclass 31, count 2 2006.229.19:31:02.66#ibcon#about to write, iclass 31, count 2 2006.229.19:31:02.66#ibcon#wrote, iclass 31, count 2 2006.229.19:31:02.66#ibcon#about to read 3, iclass 31, count 2 2006.229.19:31:02.68#ibcon#read 3, iclass 31, count 2 2006.229.19:31:02.68#ibcon#about to read 4, iclass 31, count 2 2006.229.19:31:02.68#ibcon#read 4, iclass 31, count 2 2006.229.19:31:02.68#ibcon#about to read 5, iclass 31, count 2 2006.229.19:31:02.68#ibcon#read 5, iclass 31, count 2 2006.229.19:31:02.68#ibcon#about to read 6, iclass 31, count 2 2006.229.19:31:02.68#ibcon#read 6, iclass 31, count 2 2006.229.19:31:02.68#ibcon#end of sib2, iclass 31, count 2 2006.229.19:31:02.68#ibcon#*mode == 0, iclass 31, count 2 2006.229.19:31:02.68#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.19:31:02.68#ibcon#[27=AT06-04\r\n] 2006.229.19:31:02.68#ibcon#*before write, iclass 31, count 2 2006.229.19:31:02.68#ibcon#enter sib2, iclass 31, count 2 2006.229.19:31:02.68#ibcon#flushed, iclass 31, count 2 2006.229.19:31:02.68#ibcon#about to write, iclass 31, count 2 2006.229.19:31:02.68#ibcon#wrote, iclass 31, count 2 2006.229.19:31:02.68#ibcon#about to read 3, iclass 31, count 2 2006.229.19:31:02.71#ibcon#read 3, iclass 31, count 2 2006.229.19:31:02.71#ibcon#about to read 4, iclass 31, count 2 2006.229.19:31:02.71#ibcon#read 4, iclass 31, count 2 2006.229.19:31:02.71#ibcon#about to read 5, iclass 31, count 2 2006.229.19:31:02.71#ibcon#read 5, iclass 31, count 2 2006.229.19:31:02.71#ibcon#about to read 6, iclass 31, count 2 2006.229.19:31:02.71#ibcon#read 6, iclass 31, count 2 2006.229.19:31:02.71#ibcon#end of sib2, iclass 31, count 2 2006.229.19:31:02.71#ibcon#*after write, iclass 31, count 2 2006.229.19:31:02.71#ibcon#*before return 0, iclass 31, count 2 2006.229.19:31:02.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:31:02.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.19:31:02.71#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.19:31:02.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:02.71#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:31:02.83#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:31:02.83#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:31:02.83#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:31:02.83#ibcon#first serial, iclass 31, count 0 2006.229.19:31:02.83#ibcon#enter sib2, iclass 31, count 0 2006.229.19:31:02.83#ibcon#flushed, iclass 31, count 0 2006.229.19:31:02.83#ibcon#about to write, iclass 31, count 0 2006.229.19:31:02.83#ibcon#wrote, iclass 31, count 0 2006.229.19:31:02.83#ibcon#about to read 3, iclass 31, count 0 2006.229.19:31:02.85#ibcon#read 3, iclass 31, count 0 2006.229.19:31:02.85#ibcon#about to read 4, iclass 31, count 0 2006.229.19:31:02.85#ibcon#read 4, iclass 31, count 0 2006.229.19:31:02.85#ibcon#about to read 5, iclass 31, count 0 2006.229.19:31:02.85#ibcon#read 5, iclass 31, count 0 2006.229.19:31:02.85#ibcon#about to read 6, iclass 31, count 0 2006.229.19:31:02.85#ibcon#read 6, iclass 31, count 0 2006.229.19:31:02.85#ibcon#end of sib2, iclass 31, count 0 2006.229.19:31:02.85#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:31:02.85#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:31:02.85#ibcon#[27=USB\r\n] 2006.229.19:31:02.85#ibcon#*before write, iclass 31, count 0 2006.229.19:31:02.85#ibcon#enter sib2, iclass 31, count 0 2006.229.19:31:02.85#ibcon#flushed, iclass 31, count 0 2006.229.19:31:02.85#ibcon#about to write, iclass 31, count 0 2006.229.19:31:02.85#ibcon#wrote, iclass 31, count 0 2006.229.19:31:02.85#ibcon#about to read 3, iclass 31, count 0 2006.229.19:31:02.88#ibcon#read 3, iclass 31, count 0 2006.229.19:31:02.88#ibcon#about to read 4, iclass 31, count 0 2006.229.19:31:02.88#ibcon#read 4, iclass 31, count 0 2006.229.19:31:02.88#ibcon#about to read 5, iclass 31, count 0 2006.229.19:31:02.88#ibcon#read 5, iclass 31, count 0 2006.229.19:31:02.88#ibcon#about to read 6, iclass 31, count 0 2006.229.19:31:02.88#ibcon#read 6, iclass 31, count 0 2006.229.19:31:02.88#ibcon#end of sib2, iclass 31, count 0 2006.229.19:31:02.88#ibcon#*after write, iclass 31, count 0 2006.229.19:31:02.88#ibcon#*before return 0, iclass 31, count 0 2006.229.19:31:02.88#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:31:02.88#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.19:31:02.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:31:02.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:31:02.88$vck44/vblo=7,734.99 2006.229.19:31:02.88#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.19:31:02.88#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.19:31:02.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:02.88#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:31:02.88#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:31:02.88#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:31:02.88#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:31:02.88#ibcon#first serial, iclass 33, count 0 2006.229.19:31:02.88#ibcon#enter sib2, iclass 33, count 0 2006.229.19:31:02.88#ibcon#flushed, iclass 33, count 0 2006.229.19:31:02.88#ibcon#about to write, iclass 33, count 0 2006.229.19:31:02.88#ibcon#wrote, iclass 33, count 0 2006.229.19:31:02.88#ibcon#about to read 3, iclass 33, count 0 2006.229.19:31:02.90#ibcon#read 3, iclass 33, count 0 2006.229.19:31:02.90#ibcon#about to read 4, iclass 33, count 0 2006.229.19:31:02.90#ibcon#read 4, iclass 33, count 0 2006.229.19:31:02.90#ibcon#about to read 5, iclass 33, count 0 2006.229.19:31:02.90#ibcon#read 5, iclass 33, count 0 2006.229.19:31:02.90#ibcon#about to read 6, iclass 33, count 0 2006.229.19:31:02.90#ibcon#read 6, iclass 33, count 0 2006.229.19:31:02.90#ibcon#end of sib2, iclass 33, count 0 2006.229.19:31:02.90#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:31:02.90#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:31:02.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:31:02.90#ibcon#*before write, iclass 33, count 0 2006.229.19:31:02.90#ibcon#enter sib2, iclass 33, count 0 2006.229.19:31:02.90#ibcon#flushed, iclass 33, count 0 2006.229.19:31:02.90#ibcon#about to write, iclass 33, count 0 2006.229.19:31:02.90#ibcon#wrote, iclass 33, count 0 2006.229.19:31:02.90#ibcon#about to read 3, iclass 33, count 0 2006.229.19:31:02.94#ibcon#read 3, iclass 33, count 0 2006.229.19:31:02.94#ibcon#about to read 4, iclass 33, count 0 2006.229.19:31:02.94#ibcon#read 4, iclass 33, count 0 2006.229.19:31:02.94#ibcon#about to read 5, iclass 33, count 0 2006.229.19:31:02.94#ibcon#read 5, iclass 33, count 0 2006.229.19:31:02.94#ibcon#about to read 6, iclass 33, count 0 2006.229.19:31:02.94#ibcon#read 6, iclass 33, count 0 2006.229.19:31:02.94#ibcon#end of sib2, iclass 33, count 0 2006.229.19:31:02.94#ibcon#*after write, iclass 33, count 0 2006.229.19:31:02.94#ibcon#*before return 0, iclass 33, count 0 2006.229.19:31:02.94#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:31:02.94#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.19:31:02.94#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:31:02.94#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:31:02.94$vck44/vb=7,4 2006.229.19:31:02.94#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.19:31:02.94#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.19:31:02.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:02.94#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:03.00#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:03.00#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:03.00#ibcon#enter wrdev, iclass 35, count 2 2006.229.19:31:03.00#ibcon#first serial, iclass 35, count 2 2006.229.19:31:03.00#ibcon#enter sib2, iclass 35, count 2 2006.229.19:31:03.00#ibcon#flushed, iclass 35, count 2 2006.229.19:31:03.00#ibcon#about to write, iclass 35, count 2 2006.229.19:31:03.00#ibcon#wrote, iclass 35, count 2 2006.229.19:31:03.00#ibcon#about to read 3, iclass 35, count 2 2006.229.19:31:03.02#ibcon#read 3, iclass 35, count 2 2006.229.19:31:03.02#ibcon#about to read 4, iclass 35, count 2 2006.229.19:31:03.02#ibcon#read 4, iclass 35, count 2 2006.229.19:31:03.02#ibcon#about to read 5, iclass 35, count 2 2006.229.19:31:03.02#ibcon#read 5, iclass 35, count 2 2006.229.19:31:03.02#ibcon#about to read 6, iclass 35, count 2 2006.229.19:31:03.02#ibcon#read 6, iclass 35, count 2 2006.229.19:31:03.02#ibcon#end of sib2, iclass 35, count 2 2006.229.19:31:03.02#ibcon#*mode == 0, iclass 35, count 2 2006.229.19:31:03.02#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.19:31:03.02#ibcon#[27=AT07-04\r\n] 2006.229.19:31:03.02#ibcon#*before write, iclass 35, count 2 2006.229.19:31:03.02#ibcon#enter sib2, iclass 35, count 2 2006.229.19:31:03.02#ibcon#flushed, iclass 35, count 2 2006.229.19:31:03.02#ibcon#about to write, iclass 35, count 2 2006.229.19:31:03.02#ibcon#wrote, iclass 35, count 2 2006.229.19:31:03.02#ibcon#about to read 3, iclass 35, count 2 2006.229.19:31:03.05#ibcon#read 3, iclass 35, count 2 2006.229.19:31:03.05#ibcon#about to read 4, iclass 35, count 2 2006.229.19:31:03.05#ibcon#read 4, iclass 35, count 2 2006.229.19:31:03.05#ibcon#about to read 5, iclass 35, count 2 2006.229.19:31:03.05#ibcon#read 5, iclass 35, count 2 2006.229.19:31:03.05#ibcon#about to read 6, iclass 35, count 2 2006.229.19:31:03.05#ibcon#read 6, iclass 35, count 2 2006.229.19:31:03.05#ibcon#end of sib2, iclass 35, count 2 2006.229.19:31:03.05#ibcon#*after write, iclass 35, count 2 2006.229.19:31:03.05#ibcon#*before return 0, iclass 35, count 2 2006.229.19:31:03.05#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:03.05#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.19:31:03.05#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.19:31:03.05#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:03.05#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:03.17#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:03.17#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:03.17#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:31:03.17#ibcon#first serial, iclass 35, count 0 2006.229.19:31:03.17#ibcon#enter sib2, iclass 35, count 0 2006.229.19:31:03.17#ibcon#flushed, iclass 35, count 0 2006.229.19:31:03.17#ibcon#about to write, iclass 35, count 0 2006.229.19:31:03.17#ibcon#wrote, iclass 35, count 0 2006.229.19:31:03.17#ibcon#about to read 3, iclass 35, count 0 2006.229.19:31:03.19#ibcon#read 3, iclass 35, count 0 2006.229.19:31:03.19#ibcon#about to read 4, iclass 35, count 0 2006.229.19:31:03.19#ibcon#read 4, iclass 35, count 0 2006.229.19:31:03.19#ibcon#about to read 5, iclass 35, count 0 2006.229.19:31:03.19#ibcon#read 5, iclass 35, count 0 2006.229.19:31:03.19#ibcon#about to read 6, iclass 35, count 0 2006.229.19:31:03.19#ibcon#read 6, iclass 35, count 0 2006.229.19:31:03.19#ibcon#end of sib2, iclass 35, count 0 2006.229.19:31:03.19#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:31:03.19#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:31:03.19#ibcon#[27=USB\r\n] 2006.229.19:31:03.19#ibcon#*before write, iclass 35, count 0 2006.229.19:31:03.19#ibcon#enter sib2, iclass 35, count 0 2006.229.19:31:03.19#ibcon#flushed, iclass 35, count 0 2006.229.19:31:03.19#ibcon#about to write, iclass 35, count 0 2006.229.19:31:03.19#ibcon#wrote, iclass 35, count 0 2006.229.19:31:03.19#ibcon#about to read 3, iclass 35, count 0 2006.229.19:31:03.22#ibcon#read 3, iclass 35, count 0 2006.229.19:31:03.22#ibcon#about to read 4, iclass 35, count 0 2006.229.19:31:03.22#ibcon#read 4, iclass 35, count 0 2006.229.19:31:03.22#ibcon#about to read 5, iclass 35, count 0 2006.229.19:31:03.22#ibcon#read 5, iclass 35, count 0 2006.229.19:31:03.22#ibcon#about to read 6, iclass 35, count 0 2006.229.19:31:03.22#ibcon#read 6, iclass 35, count 0 2006.229.19:31:03.22#ibcon#end of sib2, iclass 35, count 0 2006.229.19:31:03.22#ibcon#*after write, iclass 35, count 0 2006.229.19:31:03.22#ibcon#*before return 0, iclass 35, count 0 2006.229.19:31:03.22#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:03.22#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.19:31:03.22#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:31:03.22#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:31:03.22$vck44/vblo=8,744.99 2006.229.19:31:03.22#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.19:31:03.22#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.19:31:03.22#ibcon#ireg 17 cls_cnt 0 2006.229.19:31:03.22#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:03.22#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:03.22#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:03.22#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:31:03.22#ibcon#first serial, iclass 37, count 0 2006.229.19:31:03.22#ibcon#enter sib2, iclass 37, count 0 2006.229.19:31:03.22#ibcon#flushed, iclass 37, count 0 2006.229.19:31:03.22#ibcon#about to write, iclass 37, count 0 2006.229.19:31:03.22#ibcon#wrote, iclass 37, count 0 2006.229.19:31:03.22#ibcon#about to read 3, iclass 37, count 0 2006.229.19:31:03.24#ibcon#read 3, iclass 37, count 0 2006.229.19:31:03.24#ibcon#about to read 4, iclass 37, count 0 2006.229.19:31:03.24#ibcon#read 4, iclass 37, count 0 2006.229.19:31:03.24#ibcon#about to read 5, iclass 37, count 0 2006.229.19:31:03.24#ibcon#read 5, iclass 37, count 0 2006.229.19:31:03.24#ibcon#about to read 6, iclass 37, count 0 2006.229.19:31:03.24#ibcon#read 6, iclass 37, count 0 2006.229.19:31:03.24#ibcon#end of sib2, iclass 37, count 0 2006.229.19:31:03.24#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:31:03.24#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:31:03.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:31:03.24#ibcon#*before write, iclass 37, count 0 2006.229.19:31:03.24#ibcon#enter sib2, iclass 37, count 0 2006.229.19:31:03.24#ibcon#flushed, iclass 37, count 0 2006.229.19:31:03.24#ibcon#about to write, iclass 37, count 0 2006.229.19:31:03.24#ibcon#wrote, iclass 37, count 0 2006.229.19:31:03.24#ibcon#about to read 3, iclass 37, count 0 2006.229.19:31:03.28#ibcon#read 3, iclass 37, count 0 2006.229.19:31:03.28#ibcon#about to read 4, iclass 37, count 0 2006.229.19:31:03.28#ibcon#read 4, iclass 37, count 0 2006.229.19:31:03.28#ibcon#about to read 5, iclass 37, count 0 2006.229.19:31:03.28#ibcon#read 5, iclass 37, count 0 2006.229.19:31:03.28#ibcon#about to read 6, iclass 37, count 0 2006.229.19:31:03.28#ibcon#read 6, iclass 37, count 0 2006.229.19:31:03.28#ibcon#end of sib2, iclass 37, count 0 2006.229.19:31:03.28#ibcon#*after write, iclass 37, count 0 2006.229.19:31:03.28#ibcon#*before return 0, iclass 37, count 0 2006.229.19:31:03.28#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:03.28#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.19:31:03.28#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:31:03.28#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:31:03.28$vck44/vb=8,4 2006.229.19:31:03.28#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.19:31:03.28#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.19:31:03.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:31:03.28#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:03.34#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:03.34#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:03.34#ibcon#enter wrdev, iclass 39, count 2 2006.229.19:31:03.34#ibcon#first serial, iclass 39, count 2 2006.229.19:31:03.34#ibcon#enter sib2, iclass 39, count 2 2006.229.19:31:03.34#ibcon#flushed, iclass 39, count 2 2006.229.19:31:03.34#ibcon#about to write, iclass 39, count 2 2006.229.19:31:03.34#ibcon#wrote, iclass 39, count 2 2006.229.19:31:03.34#ibcon#about to read 3, iclass 39, count 2 2006.229.19:31:03.36#ibcon#read 3, iclass 39, count 2 2006.229.19:31:03.36#ibcon#about to read 4, iclass 39, count 2 2006.229.19:31:03.36#ibcon#read 4, iclass 39, count 2 2006.229.19:31:03.36#ibcon#about to read 5, iclass 39, count 2 2006.229.19:31:03.36#ibcon#read 5, iclass 39, count 2 2006.229.19:31:03.36#ibcon#about to read 6, iclass 39, count 2 2006.229.19:31:03.36#ibcon#read 6, iclass 39, count 2 2006.229.19:31:03.36#ibcon#end of sib2, iclass 39, count 2 2006.229.19:31:03.36#ibcon#*mode == 0, iclass 39, count 2 2006.229.19:31:03.36#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.19:31:03.36#ibcon#[27=AT08-04\r\n] 2006.229.19:31:03.36#ibcon#*before write, iclass 39, count 2 2006.229.19:31:03.36#ibcon#enter sib2, iclass 39, count 2 2006.229.19:31:03.36#ibcon#flushed, iclass 39, count 2 2006.229.19:31:03.36#ibcon#about to write, iclass 39, count 2 2006.229.19:31:03.36#ibcon#wrote, iclass 39, count 2 2006.229.19:31:03.36#ibcon#about to read 3, iclass 39, count 2 2006.229.19:31:03.39#ibcon#read 3, iclass 39, count 2 2006.229.19:31:03.39#ibcon#about to read 4, iclass 39, count 2 2006.229.19:31:03.39#ibcon#read 4, iclass 39, count 2 2006.229.19:31:03.39#ibcon#about to read 5, iclass 39, count 2 2006.229.19:31:03.39#ibcon#read 5, iclass 39, count 2 2006.229.19:31:03.39#ibcon#about to read 6, iclass 39, count 2 2006.229.19:31:03.39#ibcon#read 6, iclass 39, count 2 2006.229.19:31:03.39#ibcon#end of sib2, iclass 39, count 2 2006.229.19:31:03.39#ibcon#*after write, iclass 39, count 2 2006.229.19:31:03.39#ibcon#*before return 0, iclass 39, count 2 2006.229.19:31:03.39#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:03.39#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.19:31:03.39#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.19:31:03.39#ibcon#ireg 7 cls_cnt 0 2006.229.19:31:03.39#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:03.51#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:03.51#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:03.51#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:31:03.51#ibcon#first serial, iclass 39, count 0 2006.229.19:31:03.51#ibcon#enter sib2, iclass 39, count 0 2006.229.19:31:03.51#ibcon#flushed, iclass 39, count 0 2006.229.19:31:03.51#ibcon#about to write, iclass 39, count 0 2006.229.19:31:03.51#ibcon#wrote, iclass 39, count 0 2006.229.19:31:03.51#ibcon#about to read 3, iclass 39, count 0 2006.229.19:31:03.53#ibcon#read 3, iclass 39, count 0 2006.229.19:31:03.53#ibcon#about to read 4, iclass 39, count 0 2006.229.19:31:03.53#ibcon#read 4, iclass 39, count 0 2006.229.19:31:03.53#ibcon#about to read 5, iclass 39, count 0 2006.229.19:31:03.53#ibcon#read 5, iclass 39, count 0 2006.229.19:31:03.53#ibcon#about to read 6, iclass 39, count 0 2006.229.19:31:03.53#ibcon#read 6, iclass 39, count 0 2006.229.19:31:03.53#ibcon#end of sib2, iclass 39, count 0 2006.229.19:31:03.53#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:31:03.53#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:31:03.53#ibcon#[27=USB\r\n] 2006.229.19:31:03.53#ibcon#*before write, iclass 39, count 0 2006.229.19:31:03.53#ibcon#enter sib2, iclass 39, count 0 2006.229.19:31:03.53#ibcon#flushed, iclass 39, count 0 2006.229.19:31:03.53#ibcon#about to write, iclass 39, count 0 2006.229.19:31:03.53#ibcon#wrote, iclass 39, count 0 2006.229.19:31:03.53#ibcon#about to read 3, iclass 39, count 0 2006.229.19:31:03.56#ibcon#read 3, iclass 39, count 0 2006.229.19:31:03.56#ibcon#about to read 4, iclass 39, count 0 2006.229.19:31:03.56#ibcon#read 4, iclass 39, count 0 2006.229.19:31:03.56#ibcon#about to read 5, iclass 39, count 0 2006.229.19:31:03.56#ibcon#read 5, iclass 39, count 0 2006.229.19:31:03.56#ibcon#about to read 6, iclass 39, count 0 2006.229.19:31:03.56#ibcon#read 6, iclass 39, count 0 2006.229.19:31:03.56#ibcon#end of sib2, iclass 39, count 0 2006.229.19:31:03.56#ibcon#*after write, iclass 39, count 0 2006.229.19:31:03.56#ibcon#*before return 0, iclass 39, count 0 2006.229.19:31:03.56#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:03.56#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.19:31:03.56#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:31:03.56#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:31:03.56$vck44/vabw=wide 2006.229.19:31:03.56#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.19:31:03.56#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.19:31:03.56#ibcon#ireg 8 cls_cnt 0 2006.229.19:31:03.56#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:03.56#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:03.56#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:03.56#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:31:03.56#ibcon#first serial, iclass 3, count 0 2006.229.19:31:03.56#ibcon#enter sib2, iclass 3, count 0 2006.229.19:31:03.56#ibcon#flushed, iclass 3, count 0 2006.229.19:31:03.56#ibcon#about to write, iclass 3, count 0 2006.229.19:31:03.56#ibcon#wrote, iclass 3, count 0 2006.229.19:31:03.56#ibcon#about to read 3, iclass 3, count 0 2006.229.19:31:03.58#ibcon#read 3, iclass 3, count 0 2006.229.19:31:03.58#ibcon#about to read 4, iclass 3, count 0 2006.229.19:31:03.58#ibcon#read 4, iclass 3, count 0 2006.229.19:31:03.58#ibcon#about to read 5, iclass 3, count 0 2006.229.19:31:03.58#ibcon#read 5, iclass 3, count 0 2006.229.19:31:03.58#ibcon#about to read 6, iclass 3, count 0 2006.229.19:31:03.58#ibcon#read 6, iclass 3, count 0 2006.229.19:31:03.58#ibcon#end of sib2, iclass 3, count 0 2006.229.19:31:03.58#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:31:03.58#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:31:03.58#ibcon#[25=BW32\r\n] 2006.229.19:31:03.58#ibcon#*before write, iclass 3, count 0 2006.229.19:31:03.58#ibcon#enter sib2, iclass 3, count 0 2006.229.19:31:03.58#ibcon#flushed, iclass 3, count 0 2006.229.19:31:03.58#ibcon#about to write, iclass 3, count 0 2006.229.19:31:03.58#ibcon#wrote, iclass 3, count 0 2006.229.19:31:03.58#ibcon#about to read 3, iclass 3, count 0 2006.229.19:31:03.61#ibcon#read 3, iclass 3, count 0 2006.229.19:31:03.61#ibcon#about to read 4, iclass 3, count 0 2006.229.19:31:03.61#ibcon#read 4, iclass 3, count 0 2006.229.19:31:03.61#ibcon#about to read 5, iclass 3, count 0 2006.229.19:31:03.61#ibcon#read 5, iclass 3, count 0 2006.229.19:31:03.61#ibcon#about to read 6, iclass 3, count 0 2006.229.19:31:03.61#ibcon#read 6, iclass 3, count 0 2006.229.19:31:03.61#ibcon#end of sib2, iclass 3, count 0 2006.229.19:31:03.61#ibcon#*after write, iclass 3, count 0 2006.229.19:31:03.61#ibcon#*before return 0, iclass 3, count 0 2006.229.19:31:03.61#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:03.61#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.19:31:03.61#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:31:03.61#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:31:03.61$vck44/vbbw=wide 2006.229.19:31:03.61#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:31:03.61#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:31:03.61#ibcon#ireg 8 cls_cnt 0 2006.229.19:31:03.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:31:03.68#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:31:03.68#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:31:03.68#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:31:03.68#ibcon#first serial, iclass 5, count 0 2006.229.19:31:03.68#ibcon#enter sib2, iclass 5, count 0 2006.229.19:31:03.68#ibcon#flushed, iclass 5, count 0 2006.229.19:31:03.68#ibcon#about to write, iclass 5, count 0 2006.229.19:31:03.68#ibcon#wrote, iclass 5, count 0 2006.229.19:31:03.68#ibcon#about to read 3, iclass 5, count 0 2006.229.19:31:03.70#ibcon#read 3, iclass 5, count 0 2006.229.19:31:03.70#ibcon#about to read 4, iclass 5, count 0 2006.229.19:31:03.70#ibcon#read 4, iclass 5, count 0 2006.229.19:31:03.70#ibcon#about to read 5, iclass 5, count 0 2006.229.19:31:03.70#ibcon#read 5, iclass 5, count 0 2006.229.19:31:03.70#ibcon#about to read 6, iclass 5, count 0 2006.229.19:31:03.70#ibcon#read 6, iclass 5, count 0 2006.229.19:31:03.70#ibcon#end of sib2, iclass 5, count 0 2006.229.19:31:03.70#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:31:03.70#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:31:03.70#ibcon#[27=BW32\r\n] 2006.229.19:31:03.70#ibcon#*before write, iclass 5, count 0 2006.229.19:31:03.70#ibcon#enter sib2, iclass 5, count 0 2006.229.19:31:03.70#ibcon#flushed, iclass 5, count 0 2006.229.19:31:03.70#ibcon#about to write, iclass 5, count 0 2006.229.19:31:03.70#ibcon#wrote, iclass 5, count 0 2006.229.19:31:03.70#ibcon#about to read 3, iclass 5, count 0 2006.229.19:31:03.73#ibcon#read 3, iclass 5, count 0 2006.229.19:31:03.73#ibcon#about to read 4, iclass 5, count 0 2006.229.19:31:03.73#ibcon#read 4, iclass 5, count 0 2006.229.19:31:03.73#ibcon#about to read 5, iclass 5, count 0 2006.229.19:31:03.73#ibcon#read 5, iclass 5, count 0 2006.229.19:31:03.73#ibcon#about to read 6, iclass 5, count 0 2006.229.19:31:03.73#ibcon#read 6, iclass 5, count 0 2006.229.19:31:03.73#ibcon#end of sib2, iclass 5, count 0 2006.229.19:31:03.73#ibcon#*after write, iclass 5, count 0 2006.229.19:31:03.73#ibcon#*before return 0, iclass 5, count 0 2006.229.19:31:03.73#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:31:03.73#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:31:03.73#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:31:03.73#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:31:03.73$setupk4/ifdk4 2006.229.19:31:03.73$ifdk4/lo= 2006.229.19:31:03.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:31:03.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:31:03.73$ifdk4/patch= 2006.229.19:31:03.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:31:03.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:31:03.73$setupk4/!*+20s 2006.229.19:31:04.28#abcon#<5=/07 1.4 2.6 26.071001001.5\r\n> 2006.229.19:31:04.30#abcon#{5=INTERFACE CLEAR} 2006.229.19:31:04.36#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:31:14.13#trakl#Source acquired 2006.229.19:31:14.45#abcon#<5=/07 1.5 2.6 26.071001001.5\r\n> 2006.229.19:31:14.47#abcon#{5=INTERFACE CLEAR} 2006.229.19:31:14.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:31:15.13#flagr#flagr/antenna,acquired 2006.229.19:31:18.23$setupk4/"tpicd 2006.229.19:31:18.23$setupk4/echo=off 2006.229.19:31:18.23$setupk4/xlog=off 2006.229.19:31:18.23:!2006.229.19:33:14 2006.229.19:33:14.00:preob 2006.229.19:33:14.14/onsource/TRACKING 2006.229.19:33:14.14:!2006.229.19:33:24 2006.229.19:33:24.00:"tape 2006.229.19:33:24.00:"st=record 2006.229.19:33:24.00:data_valid=on 2006.229.19:33:24.00:midob 2006.229.19:33:24.14/onsource/TRACKING 2006.229.19:33:24.14/wx/26.06,1001.5,100 2006.229.19:33:24.30/cable/+6.4191E-03 2006.229.19:33:25.39/va/01,08,usb,yes,29,32 2006.229.19:33:25.39/va/02,07,usb,yes,32,32 2006.229.19:33:25.39/va/03,06,usb,yes,39,42 2006.229.19:33:25.39/va/04,07,usb,yes,33,34 2006.229.19:33:25.39/va/05,04,usb,yes,29,30 2006.229.19:33:25.39/va/06,04,usb,yes,33,32 2006.229.19:33:25.39/va/07,05,usb,yes,29,29 2006.229.19:33:25.39/va/08,06,usb,yes,21,26 2006.229.19:33:25.62/valo/01,524.99,yes,locked 2006.229.19:33:25.62/valo/02,534.99,yes,locked 2006.229.19:33:25.62/valo/03,564.99,yes,locked 2006.229.19:33:25.62/valo/04,624.99,yes,locked 2006.229.19:33:25.62/valo/05,734.99,yes,locked 2006.229.19:33:25.62/valo/06,814.99,yes,locked 2006.229.19:33:25.62/valo/07,864.99,yes,locked 2006.229.19:33:25.62/valo/08,884.99,yes,locked 2006.229.19:33:26.71/vb/01,04,usb,yes,31,28 2006.229.19:33:26.71/vb/02,04,usb,yes,33,33 2006.229.19:33:26.71/vb/03,04,usb,yes,30,33 2006.229.19:33:26.71/vb/04,04,usb,yes,34,33 2006.229.19:33:26.71/vb/05,04,usb,yes,27,29 2006.229.19:33:26.71/vb/06,04,usb,yes,31,27 2006.229.19:33:26.71/vb/07,04,usb,yes,31,31 2006.229.19:33:26.71/vb/08,04,usb,yes,29,32 2006.229.19:33:26.94/vblo/01,629.99,yes,locked 2006.229.19:33:26.94/vblo/02,634.99,yes,locked 2006.229.19:33:26.94/vblo/03,649.99,yes,locked 2006.229.19:33:26.94/vblo/04,679.99,yes,locked 2006.229.19:33:26.94/vblo/05,709.99,yes,locked 2006.229.19:33:26.94/vblo/06,719.99,yes,locked 2006.229.19:33:26.94/vblo/07,734.99,yes,locked 2006.229.19:33:26.94/vblo/08,744.99,yes,locked 2006.229.19:33:27.09/vabw/8 2006.229.19:33:27.24/vbbw/8 2006.229.19:33:27.33/xfe/off,on,12.2 2006.229.19:33:27.71/ifatt/23,28,28,28 2006.229.19:33:28.08/fmout-gps/S +4.48E-07 2006.229.19:33:28.12:!2006.229.19:35:04 2006.229.19:35:04.00:data_valid=off 2006.229.19:35:04.00:"et 2006.229.19:35:04.00:!+3s 2006.229.19:35:07.01:"tape 2006.229.19:35:07.01:postob 2006.229.19:35:07.23/cable/+6.4185E-03 2006.229.19:35:07.23/wx/26.05,1001.5,100 2006.229.19:35:08.08/fmout-gps/S +4.48E-07 2006.229.19:35:08.08:scan_name=229-1937,jd0608,310 2006.229.19:35:08.08:source=nrao150,035929.75,505750.2,2000.0,cw 2006.229.19:35:09.14#flagr#flagr/antenna,new-source 2006.229.19:35:09.14:checkk5 2006.229.19:35:09.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:35:09.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:35:10.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:35:10.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:35:11.13/chk_obsdata//k5ts1/T2291933??a.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.19:35:11.53/chk_obsdata//k5ts2/T2291933??b.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.19:35:11.94/chk_obsdata//k5ts3/T2291933??c.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.19:35:12.34/chk_obsdata//k5ts4/T2291933??d.dat file size is correct (nominal:400MB, actual:400MB). 2006.229.19:35:13.06/k5log//k5ts1_log_newline 2006.229.19:35:13.78/k5log//k5ts2_log_newline 2006.229.19:35:14.49/k5log//k5ts3_log_newline 2006.229.19:35:15.21/k5log//k5ts4_log_newline 2006.229.19:35:15.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:35:15.23:setupk4=1 2006.229.19:35:15.23$setupk4/echo=on 2006.229.19:35:15.24$setupk4/pcalon 2006.229.19:35:15.24$pcalon/"no phase cal control is implemented here 2006.229.19:35:15.24$setupk4/"tpicd=stop 2006.229.19:35:15.24$setupk4/"rec=synch_on 2006.229.19:35:15.24$setupk4/"rec_mode=128 2006.229.19:35:15.24$setupk4/!* 2006.229.19:35:15.24$setupk4/recpk4 2006.229.19:35:15.24$recpk4/recpatch= 2006.229.19:35:15.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:35:15.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:35:15.24$setupk4/vck44 2006.229.19:35:15.24$vck44/valo=1,524.99 2006.229.19:35:15.24#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.19:35:15.24#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.19:35:15.24#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:15.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:15.24#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:15.24#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:15.24#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:35:15.24#ibcon#first serial, iclass 40, count 0 2006.229.19:35:15.24#ibcon#enter sib2, iclass 40, count 0 2006.229.19:35:15.24#ibcon#flushed, iclass 40, count 0 2006.229.19:35:15.24#ibcon#about to write, iclass 40, count 0 2006.229.19:35:15.24#ibcon#wrote, iclass 40, count 0 2006.229.19:35:15.24#ibcon#about to read 3, iclass 40, count 0 2006.229.19:35:15.26#ibcon#read 3, iclass 40, count 0 2006.229.19:35:15.26#ibcon#about to read 4, iclass 40, count 0 2006.229.19:35:15.26#ibcon#read 4, iclass 40, count 0 2006.229.19:35:15.26#ibcon#about to read 5, iclass 40, count 0 2006.229.19:35:15.26#ibcon#read 5, iclass 40, count 0 2006.229.19:35:15.26#ibcon#about to read 6, iclass 40, count 0 2006.229.19:35:15.26#ibcon#read 6, iclass 40, count 0 2006.229.19:35:15.26#ibcon#end of sib2, iclass 40, count 0 2006.229.19:35:15.26#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:35:15.26#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:35:15.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:35:15.26#ibcon#*before write, iclass 40, count 0 2006.229.19:35:15.26#ibcon#enter sib2, iclass 40, count 0 2006.229.19:35:15.26#ibcon#flushed, iclass 40, count 0 2006.229.19:35:15.26#ibcon#about to write, iclass 40, count 0 2006.229.19:35:15.26#ibcon#wrote, iclass 40, count 0 2006.229.19:35:15.26#ibcon#about to read 3, iclass 40, count 0 2006.229.19:35:15.31#ibcon#read 3, iclass 40, count 0 2006.229.19:35:15.31#ibcon#about to read 4, iclass 40, count 0 2006.229.19:35:15.31#ibcon#read 4, iclass 40, count 0 2006.229.19:35:15.31#ibcon#about to read 5, iclass 40, count 0 2006.229.19:35:15.31#ibcon#read 5, iclass 40, count 0 2006.229.19:35:15.31#ibcon#about to read 6, iclass 40, count 0 2006.229.19:35:15.31#ibcon#read 6, iclass 40, count 0 2006.229.19:35:15.31#ibcon#end of sib2, iclass 40, count 0 2006.229.19:35:15.31#ibcon#*after write, iclass 40, count 0 2006.229.19:35:15.31#ibcon#*before return 0, iclass 40, count 0 2006.229.19:35:15.31#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:15.31#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:15.31#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:35:15.31#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:35:15.31$vck44/va=1,8 2006.229.19:35:15.31#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.19:35:15.31#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.19:35:15.31#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:15.31#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:15.31#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:15.31#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:15.31#ibcon#enter wrdev, iclass 4, count 2 2006.229.19:35:15.31#ibcon#first serial, iclass 4, count 2 2006.229.19:35:15.31#ibcon#enter sib2, iclass 4, count 2 2006.229.19:35:15.31#ibcon#flushed, iclass 4, count 2 2006.229.19:35:15.31#ibcon#about to write, iclass 4, count 2 2006.229.19:35:15.31#ibcon#wrote, iclass 4, count 2 2006.229.19:35:15.31#ibcon#about to read 3, iclass 4, count 2 2006.229.19:35:15.33#ibcon#read 3, iclass 4, count 2 2006.229.19:35:15.33#ibcon#about to read 4, iclass 4, count 2 2006.229.19:35:15.33#ibcon#read 4, iclass 4, count 2 2006.229.19:35:15.33#ibcon#about to read 5, iclass 4, count 2 2006.229.19:35:15.33#ibcon#read 5, iclass 4, count 2 2006.229.19:35:15.33#ibcon#about to read 6, iclass 4, count 2 2006.229.19:35:15.33#ibcon#read 6, iclass 4, count 2 2006.229.19:35:15.33#ibcon#end of sib2, iclass 4, count 2 2006.229.19:35:15.33#ibcon#*mode == 0, iclass 4, count 2 2006.229.19:35:15.33#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.19:35:15.33#ibcon#[25=AT01-08\r\n] 2006.229.19:35:15.33#ibcon#*before write, iclass 4, count 2 2006.229.19:35:15.33#ibcon#enter sib2, iclass 4, count 2 2006.229.19:35:15.33#ibcon#flushed, iclass 4, count 2 2006.229.19:35:15.33#ibcon#about to write, iclass 4, count 2 2006.229.19:35:15.33#ibcon#wrote, iclass 4, count 2 2006.229.19:35:15.33#ibcon#about to read 3, iclass 4, count 2 2006.229.19:35:15.36#ibcon#read 3, iclass 4, count 2 2006.229.19:35:15.36#ibcon#about to read 4, iclass 4, count 2 2006.229.19:35:15.36#ibcon#read 4, iclass 4, count 2 2006.229.19:35:15.36#ibcon#about to read 5, iclass 4, count 2 2006.229.19:35:15.36#ibcon#read 5, iclass 4, count 2 2006.229.19:35:15.36#ibcon#about to read 6, iclass 4, count 2 2006.229.19:35:15.36#ibcon#read 6, iclass 4, count 2 2006.229.19:35:15.36#ibcon#end of sib2, iclass 4, count 2 2006.229.19:35:15.36#ibcon#*after write, iclass 4, count 2 2006.229.19:35:15.36#ibcon#*before return 0, iclass 4, count 2 2006.229.19:35:15.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:15.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:15.36#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.19:35:15.36#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:15.36#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:15.48#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:15.48#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:15.48#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:35:15.48#ibcon#first serial, iclass 4, count 0 2006.229.19:35:15.48#ibcon#enter sib2, iclass 4, count 0 2006.229.19:35:15.48#ibcon#flushed, iclass 4, count 0 2006.229.19:35:15.48#ibcon#about to write, iclass 4, count 0 2006.229.19:35:15.48#ibcon#wrote, iclass 4, count 0 2006.229.19:35:15.48#ibcon#about to read 3, iclass 4, count 0 2006.229.19:35:15.50#ibcon#read 3, iclass 4, count 0 2006.229.19:35:15.50#ibcon#about to read 4, iclass 4, count 0 2006.229.19:35:15.50#ibcon#read 4, iclass 4, count 0 2006.229.19:35:15.50#ibcon#about to read 5, iclass 4, count 0 2006.229.19:35:15.50#ibcon#read 5, iclass 4, count 0 2006.229.19:35:15.50#ibcon#about to read 6, iclass 4, count 0 2006.229.19:35:15.50#ibcon#read 6, iclass 4, count 0 2006.229.19:35:15.50#ibcon#end of sib2, iclass 4, count 0 2006.229.19:35:15.50#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:35:15.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:35:15.50#ibcon#[25=USB\r\n] 2006.229.19:35:15.50#ibcon#*before write, iclass 4, count 0 2006.229.19:35:15.50#ibcon#enter sib2, iclass 4, count 0 2006.229.19:35:15.50#ibcon#flushed, iclass 4, count 0 2006.229.19:35:15.50#ibcon#about to write, iclass 4, count 0 2006.229.19:35:15.50#ibcon#wrote, iclass 4, count 0 2006.229.19:35:15.50#ibcon#about to read 3, iclass 4, count 0 2006.229.19:35:15.53#ibcon#read 3, iclass 4, count 0 2006.229.19:35:15.53#ibcon#about to read 4, iclass 4, count 0 2006.229.19:35:15.53#ibcon#read 4, iclass 4, count 0 2006.229.19:35:15.53#ibcon#about to read 5, iclass 4, count 0 2006.229.19:35:15.53#ibcon#read 5, iclass 4, count 0 2006.229.19:35:15.53#ibcon#about to read 6, iclass 4, count 0 2006.229.19:35:15.53#ibcon#read 6, iclass 4, count 0 2006.229.19:35:15.53#ibcon#end of sib2, iclass 4, count 0 2006.229.19:35:15.53#ibcon#*after write, iclass 4, count 0 2006.229.19:35:15.53#ibcon#*before return 0, iclass 4, count 0 2006.229.19:35:15.53#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:15.53#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:15.53#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:35:15.53#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:35:15.53$vck44/valo=2,534.99 2006.229.19:35:15.53#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.19:35:15.53#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.19:35:15.53#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:15.53#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:35:15.53#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:35:15.53#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:35:15.53#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:35:15.53#ibcon#first serial, iclass 6, count 0 2006.229.19:35:15.53#ibcon#enter sib2, iclass 6, count 0 2006.229.19:35:15.53#ibcon#flushed, iclass 6, count 0 2006.229.19:35:15.53#ibcon#about to write, iclass 6, count 0 2006.229.19:35:15.53#ibcon#wrote, iclass 6, count 0 2006.229.19:35:15.53#ibcon#about to read 3, iclass 6, count 0 2006.229.19:35:15.55#ibcon#read 3, iclass 6, count 0 2006.229.19:35:15.55#ibcon#about to read 4, iclass 6, count 0 2006.229.19:35:15.55#ibcon#read 4, iclass 6, count 0 2006.229.19:35:15.55#ibcon#about to read 5, iclass 6, count 0 2006.229.19:35:15.55#ibcon#read 5, iclass 6, count 0 2006.229.19:35:15.55#ibcon#about to read 6, iclass 6, count 0 2006.229.19:35:15.55#ibcon#read 6, iclass 6, count 0 2006.229.19:35:15.55#ibcon#end of sib2, iclass 6, count 0 2006.229.19:35:15.55#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:35:15.55#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:35:15.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:35:15.55#ibcon#*before write, iclass 6, count 0 2006.229.19:35:15.55#ibcon#enter sib2, iclass 6, count 0 2006.229.19:35:15.55#ibcon#flushed, iclass 6, count 0 2006.229.19:35:15.55#ibcon#about to write, iclass 6, count 0 2006.229.19:35:15.55#ibcon#wrote, iclass 6, count 0 2006.229.19:35:15.55#ibcon#about to read 3, iclass 6, count 0 2006.229.19:35:15.59#ibcon#read 3, iclass 6, count 0 2006.229.19:35:15.59#ibcon#about to read 4, iclass 6, count 0 2006.229.19:35:15.59#ibcon#read 4, iclass 6, count 0 2006.229.19:35:15.59#ibcon#about to read 5, iclass 6, count 0 2006.229.19:35:15.59#ibcon#read 5, iclass 6, count 0 2006.229.19:35:15.59#ibcon#about to read 6, iclass 6, count 0 2006.229.19:35:15.59#ibcon#read 6, iclass 6, count 0 2006.229.19:35:15.59#ibcon#end of sib2, iclass 6, count 0 2006.229.19:35:15.59#ibcon#*after write, iclass 6, count 0 2006.229.19:35:15.59#ibcon#*before return 0, iclass 6, count 0 2006.229.19:35:15.59#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:35:15.59#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.19:35:15.59#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:35:15.59#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:35:15.59$vck44/va=2,7 2006.229.19:35:15.59#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.19:35:15.59#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.19:35:15.59#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:15.59#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:35:15.65#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:35:15.65#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:35:15.65#ibcon#enter wrdev, iclass 10, count 2 2006.229.19:35:15.65#ibcon#first serial, iclass 10, count 2 2006.229.19:35:15.65#ibcon#enter sib2, iclass 10, count 2 2006.229.19:35:15.65#ibcon#flushed, iclass 10, count 2 2006.229.19:35:15.65#ibcon#about to write, iclass 10, count 2 2006.229.19:35:15.65#ibcon#wrote, iclass 10, count 2 2006.229.19:35:15.65#ibcon#about to read 3, iclass 10, count 2 2006.229.19:35:15.67#ibcon#read 3, iclass 10, count 2 2006.229.19:35:15.67#ibcon#about to read 4, iclass 10, count 2 2006.229.19:35:15.67#ibcon#read 4, iclass 10, count 2 2006.229.19:35:15.67#ibcon#about to read 5, iclass 10, count 2 2006.229.19:35:15.67#ibcon#read 5, iclass 10, count 2 2006.229.19:35:15.67#ibcon#about to read 6, iclass 10, count 2 2006.229.19:35:15.67#ibcon#read 6, iclass 10, count 2 2006.229.19:35:15.67#ibcon#end of sib2, iclass 10, count 2 2006.229.19:35:15.67#ibcon#*mode == 0, iclass 10, count 2 2006.229.19:35:15.67#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.19:35:15.67#ibcon#[25=AT02-07\r\n] 2006.229.19:35:15.67#ibcon#*before write, iclass 10, count 2 2006.229.19:35:15.67#ibcon#enter sib2, iclass 10, count 2 2006.229.19:35:15.67#ibcon#flushed, iclass 10, count 2 2006.229.19:35:15.67#ibcon#about to write, iclass 10, count 2 2006.229.19:35:15.67#ibcon#wrote, iclass 10, count 2 2006.229.19:35:15.67#ibcon#about to read 3, iclass 10, count 2 2006.229.19:35:15.70#ibcon#read 3, iclass 10, count 2 2006.229.19:35:15.70#ibcon#about to read 4, iclass 10, count 2 2006.229.19:35:15.70#ibcon#read 4, iclass 10, count 2 2006.229.19:35:15.70#ibcon#about to read 5, iclass 10, count 2 2006.229.19:35:15.70#ibcon#read 5, iclass 10, count 2 2006.229.19:35:15.70#ibcon#about to read 6, iclass 10, count 2 2006.229.19:35:15.70#ibcon#read 6, iclass 10, count 2 2006.229.19:35:15.70#ibcon#end of sib2, iclass 10, count 2 2006.229.19:35:15.70#ibcon#*after write, iclass 10, count 2 2006.229.19:35:15.70#ibcon#*before return 0, iclass 10, count 2 2006.229.19:35:15.70#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:35:15.70#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.19:35:15.70#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.19:35:15.70#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:15.70#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:35:15.82#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:35:15.82#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:35:15.82#ibcon#enter wrdev, iclass 10, count 0 2006.229.19:35:15.82#ibcon#first serial, iclass 10, count 0 2006.229.19:35:15.82#ibcon#enter sib2, iclass 10, count 0 2006.229.19:35:15.82#ibcon#flushed, iclass 10, count 0 2006.229.19:35:15.82#ibcon#about to write, iclass 10, count 0 2006.229.19:35:15.82#ibcon#wrote, iclass 10, count 0 2006.229.19:35:15.82#ibcon#about to read 3, iclass 10, count 0 2006.229.19:35:15.84#ibcon#read 3, iclass 10, count 0 2006.229.19:35:15.84#ibcon#about to read 4, iclass 10, count 0 2006.229.19:35:15.84#ibcon#read 4, iclass 10, count 0 2006.229.19:35:15.84#ibcon#about to read 5, iclass 10, count 0 2006.229.19:35:15.84#ibcon#read 5, iclass 10, count 0 2006.229.19:35:15.84#ibcon#about to read 6, iclass 10, count 0 2006.229.19:35:15.84#ibcon#read 6, iclass 10, count 0 2006.229.19:35:15.84#ibcon#end of sib2, iclass 10, count 0 2006.229.19:35:15.84#ibcon#*mode == 0, iclass 10, count 0 2006.229.19:35:15.84#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.19:35:15.84#ibcon#[25=USB\r\n] 2006.229.19:35:15.84#ibcon#*before write, iclass 10, count 0 2006.229.19:35:15.84#ibcon#enter sib2, iclass 10, count 0 2006.229.19:35:15.84#ibcon#flushed, iclass 10, count 0 2006.229.19:35:15.84#ibcon#about to write, iclass 10, count 0 2006.229.19:35:15.84#ibcon#wrote, iclass 10, count 0 2006.229.19:35:15.84#ibcon#about to read 3, iclass 10, count 0 2006.229.19:35:15.87#ibcon#read 3, iclass 10, count 0 2006.229.19:35:15.87#ibcon#about to read 4, iclass 10, count 0 2006.229.19:35:15.87#ibcon#read 4, iclass 10, count 0 2006.229.19:35:15.87#ibcon#about to read 5, iclass 10, count 0 2006.229.19:35:15.87#ibcon#read 5, iclass 10, count 0 2006.229.19:35:15.87#ibcon#about to read 6, iclass 10, count 0 2006.229.19:35:15.87#ibcon#read 6, iclass 10, count 0 2006.229.19:35:15.87#ibcon#end of sib2, iclass 10, count 0 2006.229.19:35:15.87#ibcon#*after write, iclass 10, count 0 2006.229.19:35:15.87#ibcon#*before return 0, iclass 10, count 0 2006.229.19:35:15.87#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:35:15.87#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.19:35:15.87#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.19:35:15.87#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.19:35:15.87$vck44/valo=3,564.99 2006.229.19:35:15.87#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.19:35:15.87#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.19:35:15.87#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:15.87#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:35:15.87#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:35:15.87#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:35:15.87#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:35:15.87#ibcon#first serial, iclass 12, count 0 2006.229.19:35:15.87#ibcon#enter sib2, iclass 12, count 0 2006.229.19:35:15.87#ibcon#flushed, iclass 12, count 0 2006.229.19:35:15.87#ibcon#about to write, iclass 12, count 0 2006.229.19:35:15.87#ibcon#wrote, iclass 12, count 0 2006.229.19:35:15.87#ibcon#about to read 3, iclass 12, count 0 2006.229.19:35:15.89#ibcon#read 3, iclass 12, count 0 2006.229.19:35:15.89#ibcon#about to read 4, iclass 12, count 0 2006.229.19:35:15.89#ibcon#read 4, iclass 12, count 0 2006.229.19:35:15.89#ibcon#about to read 5, iclass 12, count 0 2006.229.19:35:15.89#ibcon#read 5, iclass 12, count 0 2006.229.19:35:15.89#ibcon#about to read 6, iclass 12, count 0 2006.229.19:35:15.89#ibcon#read 6, iclass 12, count 0 2006.229.19:35:15.89#ibcon#end of sib2, iclass 12, count 0 2006.229.19:35:15.89#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:35:15.89#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:35:15.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:35:15.89#ibcon#*before write, iclass 12, count 0 2006.229.19:35:15.89#ibcon#enter sib2, iclass 12, count 0 2006.229.19:35:15.89#ibcon#flushed, iclass 12, count 0 2006.229.19:35:15.89#ibcon#about to write, iclass 12, count 0 2006.229.19:35:15.89#ibcon#wrote, iclass 12, count 0 2006.229.19:35:15.89#ibcon#about to read 3, iclass 12, count 0 2006.229.19:35:15.93#ibcon#read 3, iclass 12, count 0 2006.229.19:35:15.93#ibcon#about to read 4, iclass 12, count 0 2006.229.19:35:15.93#ibcon#read 4, iclass 12, count 0 2006.229.19:35:15.93#ibcon#about to read 5, iclass 12, count 0 2006.229.19:35:15.93#ibcon#read 5, iclass 12, count 0 2006.229.19:35:15.93#ibcon#about to read 6, iclass 12, count 0 2006.229.19:35:15.93#ibcon#read 6, iclass 12, count 0 2006.229.19:35:15.93#ibcon#end of sib2, iclass 12, count 0 2006.229.19:35:15.93#ibcon#*after write, iclass 12, count 0 2006.229.19:35:15.93#ibcon#*before return 0, iclass 12, count 0 2006.229.19:35:15.93#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:35:15.93#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.19:35:15.93#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:35:15.93#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:35:15.93$vck44/va=3,6 2006.229.19:35:15.93#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.19:35:15.93#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.19:35:15.93#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:15.93#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:15.99#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:15.99#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:15.99#ibcon#enter wrdev, iclass 14, count 2 2006.229.19:35:15.99#ibcon#first serial, iclass 14, count 2 2006.229.19:35:15.99#ibcon#enter sib2, iclass 14, count 2 2006.229.19:35:15.99#ibcon#flushed, iclass 14, count 2 2006.229.19:35:15.99#ibcon#about to write, iclass 14, count 2 2006.229.19:35:15.99#ibcon#wrote, iclass 14, count 2 2006.229.19:35:15.99#ibcon#about to read 3, iclass 14, count 2 2006.229.19:35:16.01#ibcon#read 3, iclass 14, count 2 2006.229.19:35:16.01#ibcon#about to read 4, iclass 14, count 2 2006.229.19:35:16.01#ibcon#read 4, iclass 14, count 2 2006.229.19:35:16.01#ibcon#about to read 5, iclass 14, count 2 2006.229.19:35:16.01#ibcon#read 5, iclass 14, count 2 2006.229.19:35:16.01#ibcon#about to read 6, iclass 14, count 2 2006.229.19:35:16.01#ibcon#read 6, iclass 14, count 2 2006.229.19:35:16.01#ibcon#end of sib2, iclass 14, count 2 2006.229.19:35:16.01#ibcon#*mode == 0, iclass 14, count 2 2006.229.19:35:16.01#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.19:35:16.01#ibcon#[25=AT03-06\r\n] 2006.229.19:35:16.01#ibcon#*before write, iclass 14, count 2 2006.229.19:35:16.01#ibcon#enter sib2, iclass 14, count 2 2006.229.19:35:16.01#ibcon#flushed, iclass 14, count 2 2006.229.19:35:16.01#ibcon#about to write, iclass 14, count 2 2006.229.19:35:16.01#ibcon#wrote, iclass 14, count 2 2006.229.19:35:16.01#ibcon#about to read 3, iclass 14, count 2 2006.229.19:35:16.04#ibcon#read 3, iclass 14, count 2 2006.229.19:35:16.04#ibcon#about to read 4, iclass 14, count 2 2006.229.19:35:16.04#ibcon#read 4, iclass 14, count 2 2006.229.19:35:16.04#ibcon#about to read 5, iclass 14, count 2 2006.229.19:35:16.04#ibcon#read 5, iclass 14, count 2 2006.229.19:35:16.04#ibcon#about to read 6, iclass 14, count 2 2006.229.19:35:16.04#ibcon#read 6, iclass 14, count 2 2006.229.19:35:16.04#ibcon#end of sib2, iclass 14, count 2 2006.229.19:35:16.04#ibcon#*after write, iclass 14, count 2 2006.229.19:35:16.04#ibcon#*before return 0, iclass 14, count 2 2006.229.19:35:16.04#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:16.04#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:16.04#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.19:35:16.04#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:16.04#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:16.16#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:16.16#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:16.16#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:35:16.16#ibcon#first serial, iclass 14, count 0 2006.229.19:35:16.16#ibcon#enter sib2, iclass 14, count 0 2006.229.19:35:16.16#ibcon#flushed, iclass 14, count 0 2006.229.19:35:16.16#ibcon#about to write, iclass 14, count 0 2006.229.19:35:16.16#ibcon#wrote, iclass 14, count 0 2006.229.19:35:16.16#ibcon#about to read 3, iclass 14, count 0 2006.229.19:35:16.18#ibcon#read 3, iclass 14, count 0 2006.229.19:35:16.18#ibcon#about to read 4, iclass 14, count 0 2006.229.19:35:16.18#ibcon#read 4, iclass 14, count 0 2006.229.19:35:16.18#ibcon#about to read 5, iclass 14, count 0 2006.229.19:35:16.18#ibcon#read 5, iclass 14, count 0 2006.229.19:35:16.18#ibcon#about to read 6, iclass 14, count 0 2006.229.19:35:16.18#ibcon#read 6, iclass 14, count 0 2006.229.19:35:16.18#ibcon#end of sib2, iclass 14, count 0 2006.229.19:35:16.18#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:35:16.18#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:35:16.18#ibcon#[25=USB\r\n] 2006.229.19:35:16.18#ibcon#*before write, iclass 14, count 0 2006.229.19:35:16.18#ibcon#enter sib2, iclass 14, count 0 2006.229.19:35:16.18#ibcon#flushed, iclass 14, count 0 2006.229.19:35:16.18#ibcon#about to write, iclass 14, count 0 2006.229.19:35:16.18#ibcon#wrote, iclass 14, count 0 2006.229.19:35:16.18#ibcon#about to read 3, iclass 14, count 0 2006.229.19:35:16.21#ibcon#read 3, iclass 14, count 0 2006.229.19:35:16.21#ibcon#about to read 4, iclass 14, count 0 2006.229.19:35:16.21#ibcon#read 4, iclass 14, count 0 2006.229.19:35:16.21#ibcon#about to read 5, iclass 14, count 0 2006.229.19:35:16.21#ibcon#read 5, iclass 14, count 0 2006.229.19:35:16.21#ibcon#about to read 6, iclass 14, count 0 2006.229.19:35:16.21#ibcon#read 6, iclass 14, count 0 2006.229.19:35:16.21#ibcon#end of sib2, iclass 14, count 0 2006.229.19:35:16.21#ibcon#*after write, iclass 14, count 0 2006.229.19:35:16.21#ibcon#*before return 0, iclass 14, count 0 2006.229.19:35:16.21#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:16.21#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:16.21#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:35:16.21#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:35:16.21$vck44/valo=4,624.99 2006.229.19:35:16.21#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.19:35:16.21#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.19:35:16.21#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:16.21#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:16.21#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:16.21#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:16.21#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:35:16.21#ibcon#first serial, iclass 16, count 0 2006.229.19:35:16.21#ibcon#enter sib2, iclass 16, count 0 2006.229.19:35:16.21#ibcon#flushed, iclass 16, count 0 2006.229.19:35:16.21#ibcon#about to write, iclass 16, count 0 2006.229.19:35:16.21#ibcon#wrote, iclass 16, count 0 2006.229.19:35:16.21#ibcon#about to read 3, iclass 16, count 0 2006.229.19:35:16.23#ibcon#read 3, iclass 16, count 0 2006.229.19:35:16.23#ibcon#about to read 4, iclass 16, count 0 2006.229.19:35:16.23#ibcon#read 4, iclass 16, count 0 2006.229.19:35:16.23#ibcon#about to read 5, iclass 16, count 0 2006.229.19:35:16.23#ibcon#read 5, iclass 16, count 0 2006.229.19:35:16.23#ibcon#about to read 6, iclass 16, count 0 2006.229.19:35:16.23#ibcon#read 6, iclass 16, count 0 2006.229.19:35:16.23#ibcon#end of sib2, iclass 16, count 0 2006.229.19:35:16.23#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:35:16.23#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:35:16.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:35:16.23#ibcon#*before write, iclass 16, count 0 2006.229.19:35:16.23#ibcon#enter sib2, iclass 16, count 0 2006.229.19:35:16.23#ibcon#flushed, iclass 16, count 0 2006.229.19:35:16.23#ibcon#about to write, iclass 16, count 0 2006.229.19:35:16.23#ibcon#wrote, iclass 16, count 0 2006.229.19:35:16.23#ibcon#about to read 3, iclass 16, count 0 2006.229.19:35:16.27#ibcon#read 3, iclass 16, count 0 2006.229.19:35:16.27#ibcon#about to read 4, iclass 16, count 0 2006.229.19:35:16.27#ibcon#read 4, iclass 16, count 0 2006.229.19:35:16.27#ibcon#about to read 5, iclass 16, count 0 2006.229.19:35:16.27#ibcon#read 5, iclass 16, count 0 2006.229.19:35:16.27#ibcon#about to read 6, iclass 16, count 0 2006.229.19:35:16.27#ibcon#read 6, iclass 16, count 0 2006.229.19:35:16.27#ibcon#end of sib2, iclass 16, count 0 2006.229.19:35:16.27#ibcon#*after write, iclass 16, count 0 2006.229.19:35:16.27#ibcon#*before return 0, iclass 16, count 0 2006.229.19:35:16.27#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:16.27#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:16.27#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:35:16.27#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:35:16.27$vck44/va=4,7 2006.229.19:35:16.27#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.19:35:16.27#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.19:35:16.27#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:16.27#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:16.33#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:16.33#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:16.33#ibcon#enter wrdev, iclass 18, count 2 2006.229.19:35:16.33#ibcon#first serial, iclass 18, count 2 2006.229.19:35:16.33#ibcon#enter sib2, iclass 18, count 2 2006.229.19:35:16.33#ibcon#flushed, iclass 18, count 2 2006.229.19:35:16.33#ibcon#about to write, iclass 18, count 2 2006.229.19:35:16.33#ibcon#wrote, iclass 18, count 2 2006.229.19:35:16.33#ibcon#about to read 3, iclass 18, count 2 2006.229.19:35:16.35#ibcon#read 3, iclass 18, count 2 2006.229.19:35:16.35#ibcon#about to read 4, iclass 18, count 2 2006.229.19:35:16.35#ibcon#read 4, iclass 18, count 2 2006.229.19:35:16.35#ibcon#about to read 5, iclass 18, count 2 2006.229.19:35:16.35#ibcon#read 5, iclass 18, count 2 2006.229.19:35:16.35#ibcon#about to read 6, iclass 18, count 2 2006.229.19:35:16.35#ibcon#read 6, iclass 18, count 2 2006.229.19:35:16.35#ibcon#end of sib2, iclass 18, count 2 2006.229.19:35:16.35#ibcon#*mode == 0, iclass 18, count 2 2006.229.19:35:16.35#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.19:35:16.35#ibcon#[25=AT04-07\r\n] 2006.229.19:35:16.35#ibcon#*before write, iclass 18, count 2 2006.229.19:35:16.35#ibcon#enter sib2, iclass 18, count 2 2006.229.19:35:16.35#ibcon#flushed, iclass 18, count 2 2006.229.19:35:16.35#ibcon#about to write, iclass 18, count 2 2006.229.19:35:16.35#ibcon#wrote, iclass 18, count 2 2006.229.19:35:16.35#ibcon#about to read 3, iclass 18, count 2 2006.229.19:35:16.38#ibcon#read 3, iclass 18, count 2 2006.229.19:35:16.38#ibcon#about to read 4, iclass 18, count 2 2006.229.19:35:16.38#ibcon#read 4, iclass 18, count 2 2006.229.19:35:16.38#ibcon#about to read 5, iclass 18, count 2 2006.229.19:35:16.38#ibcon#read 5, iclass 18, count 2 2006.229.19:35:16.38#ibcon#about to read 6, iclass 18, count 2 2006.229.19:35:16.38#ibcon#read 6, iclass 18, count 2 2006.229.19:35:16.38#ibcon#end of sib2, iclass 18, count 2 2006.229.19:35:16.38#ibcon#*after write, iclass 18, count 2 2006.229.19:35:16.38#ibcon#*before return 0, iclass 18, count 2 2006.229.19:35:16.38#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:16.38#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:16.38#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.19:35:16.38#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:16.38#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:16.50#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:16.50#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:16.50#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:35:16.50#ibcon#first serial, iclass 18, count 0 2006.229.19:35:16.50#ibcon#enter sib2, iclass 18, count 0 2006.229.19:35:16.50#ibcon#flushed, iclass 18, count 0 2006.229.19:35:16.50#ibcon#about to write, iclass 18, count 0 2006.229.19:35:16.50#ibcon#wrote, iclass 18, count 0 2006.229.19:35:16.50#ibcon#about to read 3, iclass 18, count 0 2006.229.19:35:16.52#ibcon#read 3, iclass 18, count 0 2006.229.19:35:16.52#ibcon#about to read 4, iclass 18, count 0 2006.229.19:35:16.52#ibcon#read 4, iclass 18, count 0 2006.229.19:35:16.52#ibcon#about to read 5, iclass 18, count 0 2006.229.19:35:16.52#ibcon#read 5, iclass 18, count 0 2006.229.19:35:16.52#ibcon#about to read 6, iclass 18, count 0 2006.229.19:35:16.52#ibcon#read 6, iclass 18, count 0 2006.229.19:35:16.52#ibcon#end of sib2, iclass 18, count 0 2006.229.19:35:16.52#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:35:16.52#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:35:16.52#ibcon#[25=USB\r\n] 2006.229.19:35:16.52#ibcon#*before write, iclass 18, count 0 2006.229.19:35:16.52#ibcon#enter sib2, iclass 18, count 0 2006.229.19:35:16.52#ibcon#flushed, iclass 18, count 0 2006.229.19:35:16.52#ibcon#about to write, iclass 18, count 0 2006.229.19:35:16.52#ibcon#wrote, iclass 18, count 0 2006.229.19:35:16.52#ibcon#about to read 3, iclass 18, count 0 2006.229.19:35:16.55#ibcon#read 3, iclass 18, count 0 2006.229.19:35:16.55#ibcon#about to read 4, iclass 18, count 0 2006.229.19:35:16.55#ibcon#read 4, iclass 18, count 0 2006.229.19:35:16.55#ibcon#about to read 5, iclass 18, count 0 2006.229.19:35:16.55#ibcon#read 5, iclass 18, count 0 2006.229.19:35:16.55#ibcon#about to read 6, iclass 18, count 0 2006.229.19:35:16.55#ibcon#read 6, iclass 18, count 0 2006.229.19:35:16.55#ibcon#end of sib2, iclass 18, count 0 2006.229.19:35:16.55#ibcon#*after write, iclass 18, count 0 2006.229.19:35:16.55#ibcon#*before return 0, iclass 18, count 0 2006.229.19:35:16.55#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:16.55#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:16.55#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:35:16.55#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:35:16.55$vck44/valo=5,734.99 2006.229.19:35:16.55#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.19:35:16.55#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.19:35:16.55#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:16.55#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:16.55#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:16.55#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:16.55#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:35:16.55#ibcon#first serial, iclass 20, count 0 2006.229.19:35:16.55#ibcon#enter sib2, iclass 20, count 0 2006.229.19:35:16.55#ibcon#flushed, iclass 20, count 0 2006.229.19:35:16.55#ibcon#about to write, iclass 20, count 0 2006.229.19:35:16.55#ibcon#wrote, iclass 20, count 0 2006.229.19:35:16.55#ibcon#about to read 3, iclass 20, count 0 2006.229.19:35:16.57#ibcon#read 3, iclass 20, count 0 2006.229.19:35:16.57#ibcon#about to read 4, iclass 20, count 0 2006.229.19:35:16.57#ibcon#read 4, iclass 20, count 0 2006.229.19:35:16.57#ibcon#about to read 5, iclass 20, count 0 2006.229.19:35:16.57#ibcon#read 5, iclass 20, count 0 2006.229.19:35:16.57#ibcon#about to read 6, iclass 20, count 0 2006.229.19:35:16.57#ibcon#read 6, iclass 20, count 0 2006.229.19:35:16.57#ibcon#end of sib2, iclass 20, count 0 2006.229.19:35:16.57#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:35:16.57#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:35:16.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:35:16.57#ibcon#*before write, iclass 20, count 0 2006.229.19:35:16.57#ibcon#enter sib2, iclass 20, count 0 2006.229.19:35:16.57#ibcon#flushed, iclass 20, count 0 2006.229.19:35:16.57#ibcon#about to write, iclass 20, count 0 2006.229.19:35:16.57#ibcon#wrote, iclass 20, count 0 2006.229.19:35:16.57#ibcon#about to read 3, iclass 20, count 0 2006.229.19:35:16.61#ibcon#read 3, iclass 20, count 0 2006.229.19:35:16.61#ibcon#about to read 4, iclass 20, count 0 2006.229.19:35:16.61#ibcon#read 4, iclass 20, count 0 2006.229.19:35:16.61#ibcon#about to read 5, iclass 20, count 0 2006.229.19:35:16.61#ibcon#read 5, iclass 20, count 0 2006.229.19:35:16.61#ibcon#about to read 6, iclass 20, count 0 2006.229.19:35:16.61#ibcon#read 6, iclass 20, count 0 2006.229.19:35:16.61#ibcon#end of sib2, iclass 20, count 0 2006.229.19:35:16.61#ibcon#*after write, iclass 20, count 0 2006.229.19:35:16.61#ibcon#*before return 0, iclass 20, count 0 2006.229.19:35:16.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:16.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:16.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:35:16.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:35:16.61$vck44/va=5,4 2006.229.19:35:16.61#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.19:35:16.61#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.19:35:16.61#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:16.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:16.67#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:16.67#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:16.67#ibcon#enter wrdev, iclass 22, count 2 2006.229.19:35:16.67#ibcon#first serial, iclass 22, count 2 2006.229.19:35:16.67#ibcon#enter sib2, iclass 22, count 2 2006.229.19:35:16.67#ibcon#flushed, iclass 22, count 2 2006.229.19:35:16.67#ibcon#about to write, iclass 22, count 2 2006.229.19:35:16.67#ibcon#wrote, iclass 22, count 2 2006.229.19:35:16.67#ibcon#about to read 3, iclass 22, count 2 2006.229.19:35:16.69#ibcon#read 3, iclass 22, count 2 2006.229.19:35:16.69#ibcon#about to read 4, iclass 22, count 2 2006.229.19:35:16.69#ibcon#read 4, iclass 22, count 2 2006.229.19:35:16.69#ibcon#about to read 5, iclass 22, count 2 2006.229.19:35:16.69#ibcon#read 5, iclass 22, count 2 2006.229.19:35:16.69#ibcon#about to read 6, iclass 22, count 2 2006.229.19:35:16.69#ibcon#read 6, iclass 22, count 2 2006.229.19:35:16.69#ibcon#end of sib2, iclass 22, count 2 2006.229.19:35:16.69#ibcon#*mode == 0, iclass 22, count 2 2006.229.19:35:16.69#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.19:35:16.69#ibcon#[25=AT05-04\r\n] 2006.229.19:35:16.69#ibcon#*before write, iclass 22, count 2 2006.229.19:35:16.69#ibcon#enter sib2, iclass 22, count 2 2006.229.19:35:16.69#ibcon#flushed, iclass 22, count 2 2006.229.19:35:16.69#ibcon#about to write, iclass 22, count 2 2006.229.19:35:16.69#ibcon#wrote, iclass 22, count 2 2006.229.19:35:16.69#ibcon#about to read 3, iclass 22, count 2 2006.229.19:35:16.72#ibcon#read 3, iclass 22, count 2 2006.229.19:35:16.72#ibcon#about to read 4, iclass 22, count 2 2006.229.19:35:16.72#ibcon#read 4, iclass 22, count 2 2006.229.19:35:16.72#ibcon#about to read 5, iclass 22, count 2 2006.229.19:35:16.72#ibcon#read 5, iclass 22, count 2 2006.229.19:35:16.72#ibcon#about to read 6, iclass 22, count 2 2006.229.19:35:16.72#ibcon#read 6, iclass 22, count 2 2006.229.19:35:16.72#ibcon#end of sib2, iclass 22, count 2 2006.229.19:35:16.72#ibcon#*after write, iclass 22, count 2 2006.229.19:35:16.72#ibcon#*before return 0, iclass 22, count 2 2006.229.19:35:16.72#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:16.72#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:16.72#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.19:35:16.72#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:16.72#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:16.84#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:16.84#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:16.84#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:35:16.84#ibcon#first serial, iclass 22, count 0 2006.229.19:35:16.84#ibcon#enter sib2, iclass 22, count 0 2006.229.19:35:16.84#ibcon#flushed, iclass 22, count 0 2006.229.19:35:16.84#ibcon#about to write, iclass 22, count 0 2006.229.19:35:16.84#ibcon#wrote, iclass 22, count 0 2006.229.19:35:16.84#ibcon#about to read 3, iclass 22, count 0 2006.229.19:35:16.86#ibcon#read 3, iclass 22, count 0 2006.229.19:35:16.86#ibcon#about to read 4, iclass 22, count 0 2006.229.19:35:16.86#ibcon#read 4, iclass 22, count 0 2006.229.19:35:16.86#ibcon#about to read 5, iclass 22, count 0 2006.229.19:35:16.86#ibcon#read 5, iclass 22, count 0 2006.229.19:35:16.86#ibcon#about to read 6, iclass 22, count 0 2006.229.19:35:16.86#ibcon#read 6, iclass 22, count 0 2006.229.19:35:16.86#ibcon#end of sib2, iclass 22, count 0 2006.229.19:35:16.86#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:35:16.86#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:35:16.86#ibcon#[25=USB\r\n] 2006.229.19:35:16.86#ibcon#*before write, iclass 22, count 0 2006.229.19:35:16.86#ibcon#enter sib2, iclass 22, count 0 2006.229.19:35:16.86#ibcon#flushed, iclass 22, count 0 2006.229.19:35:16.86#ibcon#about to write, iclass 22, count 0 2006.229.19:35:16.86#ibcon#wrote, iclass 22, count 0 2006.229.19:35:16.86#ibcon#about to read 3, iclass 22, count 0 2006.229.19:35:16.89#ibcon#read 3, iclass 22, count 0 2006.229.19:35:16.89#ibcon#about to read 4, iclass 22, count 0 2006.229.19:35:16.89#ibcon#read 4, iclass 22, count 0 2006.229.19:35:16.89#ibcon#about to read 5, iclass 22, count 0 2006.229.19:35:16.89#ibcon#read 5, iclass 22, count 0 2006.229.19:35:16.89#ibcon#about to read 6, iclass 22, count 0 2006.229.19:35:16.89#ibcon#read 6, iclass 22, count 0 2006.229.19:35:16.89#ibcon#end of sib2, iclass 22, count 0 2006.229.19:35:16.89#ibcon#*after write, iclass 22, count 0 2006.229.19:35:16.89#ibcon#*before return 0, iclass 22, count 0 2006.229.19:35:16.89#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:16.89#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:16.89#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:35:16.89#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:35:16.89$vck44/valo=6,814.99 2006.229.19:35:16.89#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.19:35:16.89#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.19:35:16.89#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:16.89#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:16.89#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:16.89#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:16.89#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:35:16.89#ibcon#first serial, iclass 24, count 0 2006.229.19:35:16.89#ibcon#enter sib2, iclass 24, count 0 2006.229.19:35:16.89#ibcon#flushed, iclass 24, count 0 2006.229.19:35:16.89#ibcon#about to write, iclass 24, count 0 2006.229.19:35:16.89#ibcon#wrote, iclass 24, count 0 2006.229.19:35:16.89#ibcon#about to read 3, iclass 24, count 0 2006.229.19:35:16.91#ibcon#read 3, iclass 24, count 0 2006.229.19:35:16.91#ibcon#about to read 4, iclass 24, count 0 2006.229.19:35:16.91#ibcon#read 4, iclass 24, count 0 2006.229.19:35:16.91#ibcon#about to read 5, iclass 24, count 0 2006.229.19:35:16.91#ibcon#read 5, iclass 24, count 0 2006.229.19:35:16.91#ibcon#about to read 6, iclass 24, count 0 2006.229.19:35:16.91#ibcon#read 6, iclass 24, count 0 2006.229.19:35:16.91#ibcon#end of sib2, iclass 24, count 0 2006.229.19:35:16.91#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:35:16.91#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:35:16.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:35:16.91#ibcon#*before write, iclass 24, count 0 2006.229.19:35:16.91#ibcon#enter sib2, iclass 24, count 0 2006.229.19:35:16.91#ibcon#flushed, iclass 24, count 0 2006.229.19:35:16.91#ibcon#about to write, iclass 24, count 0 2006.229.19:35:16.91#ibcon#wrote, iclass 24, count 0 2006.229.19:35:16.91#ibcon#about to read 3, iclass 24, count 0 2006.229.19:35:16.95#ibcon#read 3, iclass 24, count 0 2006.229.19:35:16.95#ibcon#about to read 4, iclass 24, count 0 2006.229.19:35:16.95#ibcon#read 4, iclass 24, count 0 2006.229.19:35:16.95#ibcon#about to read 5, iclass 24, count 0 2006.229.19:35:16.95#ibcon#read 5, iclass 24, count 0 2006.229.19:35:16.95#ibcon#about to read 6, iclass 24, count 0 2006.229.19:35:16.95#ibcon#read 6, iclass 24, count 0 2006.229.19:35:16.95#ibcon#end of sib2, iclass 24, count 0 2006.229.19:35:16.95#ibcon#*after write, iclass 24, count 0 2006.229.19:35:16.95#ibcon#*before return 0, iclass 24, count 0 2006.229.19:35:16.95#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:16.95#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:16.95#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:35:16.95#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:35:16.95$vck44/va=6,4 2006.229.19:35:16.95#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.19:35:16.95#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.19:35:16.95#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:16.95#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:17.01#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:17.01#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:17.01#ibcon#enter wrdev, iclass 26, count 2 2006.229.19:35:17.01#ibcon#first serial, iclass 26, count 2 2006.229.19:35:17.01#ibcon#enter sib2, iclass 26, count 2 2006.229.19:35:17.01#ibcon#flushed, iclass 26, count 2 2006.229.19:35:17.01#ibcon#about to write, iclass 26, count 2 2006.229.19:35:17.01#ibcon#wrote, iclass 26, count 2 2006.229.19:35:17.01#ibcon#about to read 3, iclass 26, count 2 2006.229.19:35:17.03#ibcon#read 3, iclass 26, count 2 2006.229.19:35:17.03#ibcon#about to read 4, iclass 26, count 2 2006.229.19:35:17.03#ibcon#read 4, iclass 26, count 2 2006.229.19:35:17.03#ibcon#about to read 5, iclass 26, count 2 2006.229.19:35:17.03#ibcon#read 5, iclass 26, count 2 2006.229.19:35:17.03#ibcon#about to read 6, iclass 26, count 2 2006.229.19:35:17.03#ibcon#read 6, iclass 26, count 2 2006.229.19:35:17.03#ibcon#end of sib2, iclass 26, count 2 2006.229.19:35:17.03#ibcon#*mode == 0, iclass 26, count 2 2006.229.19:35:17.03#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.19:35:17.03#ibcon#[25=AT06-04\r\n] 2006.229.19:35:17.03#ibcon#*before write, iclass 26, count 2 2006.229.19:35:17.03#ibcon#enter sib2, iclass 26, count 2 2006.229.19:35:17.03#ibcon#flushed, iclass 26, count 2 2006.229.19:35:17.03#ibcon#about to write, iclass 26, count 2 2006.229.19:35:17.03#ibcon#wrote, iclass 26, count 2 2006.229.19:35:17.03#ibcon#about to read 3, iclass 26, count 2 2006.229.19:35:17.06#ibcon#read 3, iclass 26, count 2 2006.229.19:35:17.06#ibcon#about to read 4, iclass 26, count 2 2006.229.19:35:17.06#ibcon#read 4, iclass 26, count 2 2006.229.19:35:17.06#ibcon#about to read 5, iclass 26, count 2 2006.229.19:35:17.06#ibcon#read 5, iclass 26, count 2 2006.229.19:35:17.06#ibcon#about to read 6, iclass 26, count 2 2006.229.19:35:17.06#ibcon#read 6, iclass 26, count 2 2006.229.19:35:17.06#ibcon#end of sib2, iclass 26, count 2 2006.229.19:35:17.06#ibcon#*after write, iclass 26, count 2 2006.229.19:35:17.06#ibcon#*before return 0, iclass 26, count 2 2006.229.19:35:17.06#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:17.06#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:17.06#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.19:35:17.06#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:17.06#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:17.18#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:17.18#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:17.18#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:35:17.18#ibcon#first serial, iclass 26, count 0 2006.229.19:35:17.18#ibcon#enter sib2, iclass 26, count 0 2006.229.19:35:17.18#ibcon#flushed, iclass 26, count 0 2006.229.19:35:17.18#ibcon#about to write, iclass 26, count 0 2006.229.19:35:17.18#ibcon#wrote, iclass 26, count 0 2006.229.19:35:17.18#ibcon#about to read 3, iclass 26, count 0 2006.229.19:35:17.20#ibcon#read 3, iclass 26, count 0 2006.229.19:35:17.20#ibcon#about to read 4, iclass 26, count 0 2006.229.19:35:17.20#ibcon#read 4, iclass 26, count 0 2006.229.19:35:17.20#ibcon#about to read 5, iclass 26, count 0 2006.229.19:35:17.20#ibcon#read 5, iclass 26, count 0 2006.229.19:35:17.20#ibcon#about to read 6, iclass 26, count 0 2006.229.19:35:17.20#ibcon#read 6, iclass 26, count 0 2006.229.19:35:17.20#ibcon#end of sib2, iclass 26, count 0 2006.229.19:35:17.20#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:35:17.20#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:35:17.20#ibcon#[25=USB\r\n] 2006.229.19:35:17.20#ibcon#*before write, iclass 26, count 0 2006.229.19:35:17.20#ibcon#enter sib2, iclass 26, count 0 2006.229.19:35:17.20#ibcon#flushed, iclass 26, count 0 2006.229.19:35:17.20#ibcon#about to write, iclass 26, count 0 2006.229.19:35:17.20#ibcon#wrote, iclass 26, count 0 2006.229.19:35:17.20#ibcon#about to read 3, iclass 26, count 0 2006.229.19:35:17.23#ibcon#read 3, iclass 26, count 0 2006.229.19:35:17.23#ibcon#about to read 4, iclass 26, count 0 2006.229.19:35:17.23#ibcon#read 4, iclass 26, count 0 2006.229.19:35:17.23#ibcon#about to read 5, iclass 26, count 0 2006.229.19:35:17.23#ibcon#read 5, iclass 26, count 0 2006.229.19:35:17.23#ibcon#about to read 6, iclass 26, count 0 2006.229.19:35:17.23#ibcon#read 6, iclass 26, count 0 2006.229.19:35:17.23#ibcon#end of sib2, iclass 26, count 0 2006.229.19:35:17.23#ibcon#*after write, iclass 26, count 0 2006.229.19:35:17.23#ibcon#*before return 0, iclass 26, count 0 2006.229.19:35:17.23#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:17.23#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:17.23#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:35:17.23#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:35:17.23$vck44/valo=7,864.99 2006.229.19:35:17.23#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.19:35:17.23#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.19:35:17.23#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:17.23#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:17.23#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:17.23#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:17.23#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:35:17.23#ibcon#first serial, iclass 28, count 0 2006.229.19:35:17.23#ibcon#enter sib2, iclass 28, count 0 2006.229.19:35:17.23#ibcon#flushed, iclass 28, count 0 2006.229.19:35:17.23#ibcon#about to write, iclass 28, count 0 2006.229.19:35:17.23#ibcon#wrote, iclass 28, count 0 2006.229.19:35:17.23#ibcon#about to read 3, iclass 28, count 0 2006.229.19:35:17.25#ibcon#read 3, iclass 28, count 0 2006.229.19:35:17.25#ibcon#about to read 4, iclass 28, count 0 2006.229.19:35:17.25#ibcon#read 4, iclass 28, count 0 2006.229.19:35:17.25#ibcon#about to read 5, iclass 28, count 0 2006.229.19:35:17.25#ibcon#read 5, iclass 28, count 0 2006.229.19:35:17.25#ibcon#about to read 6, iclass 28, count 0 2006.229.19:35:17.25#ibcon#read 6, iclass 28, count 0 2006.229.19:35:17.25#ibcon#end of sib2, iclass 28, count 0 2006.229.19:35:17.25#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:35:17.25#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:35:17.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:35:17.25#ibcon#*before write, iclass 28, count 0 2006.229.19:35:17.25#ibcon#enter sib2, iclass 28, count 0 2006.229.19:35:17.25#ibcon#flushed, iclass 28, count 0 2006.229.19:35:17.25#ibcon#about to write, iclass 28, count 0 2006.229.19:35:17.25#ibcon#wrote, iclass 28, count 0 2006.229.19:35:17.25#ibcon#about to read 3, iclass 28, count 0 2006.229.19:35:17.29#ibcon#read 3, iclass 28, count 0 2006.229.19:35:17.29#ibcon#about to read 4, iclass 28, count 0 2006.229.19:35:17.29#ibcon#read 4, iclass 28, count 0 2006.229.19:35:17.29#ibcon#about to read 5, iclass 28, count 0 2006.229.19:35:17.29#ibcon#read 5, iclass 28, count 0 2006.229.19:35:17.29#ibcon#about to read 6, iclass 28, count 0 2006.229.19:35:17.29#ibcon#read 6, iclass 28, count 0 2006.229.19:35:17.29#ibcon#end of sib2, iclass 28, count 0 2006.229.19:35:17.29#ibcon#*after write, iclass 28, count 0 2006.229.19:35:17.29#ibcon#*before return 0, iclass 28, count 0 2006.229.19:35:17.29#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:17.29#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:17.29#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:35:17.29#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:35:17.29$vck44/va=7,5 2006.229.19:35:17.29#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.19:35:17.29#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.19:35:17.29#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:17.29#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:17.35#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:17.35#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:17.35#ibcon#enter wrdev, iclass 30, count 2 2006.229.19:35:17.35#ibcon#first serial, iclass 30, count 2 2006.229.19:35:17.35#ibcon#enter sib2, iclass 30, count 2 2006.229.19:35:17.35#ibcon#flushed, iclass 30, count 2 2006.229.19:35:17.35#ibcon#about to write, iclass 30, count 2 2006.229.19:35:17.35#ibcon#wrote, iclass 30, count 2 2006.229.19:35:17.35#ibcon#about to read 3, iclass 30, count 2 2006.229.19:35:17.37#ibcon#read 3, iclass 30, count 2 2006.229.19:35:17.37#ibcon#about to read 4, iclass 30, count 2 2006.229.19:35:17.37#ibcon#read 4, iclass 30, count 2 2006.229.19:35:17.37#ibcon#about to read 5, iclass 30, count 2 2006.229.19:35:17.37#ibcon#read 5, iclass 30, count 2 2006.229.19:35:17.37#ibcon#about to read 6, iclass 30, count 2 2006.229.19:35:17.37#ibcon#read 6, iclass 30, count 2 2006.229.19:35:17.37#ibcon#end of sib2, iclass 30, count 2 2006.229.19:35:17.37#ibcon#*mode == 0, iclass 30, count 2 2006.229.19:35:17.37#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.19:35:17.37#ibcon#[25=AT07-05\r\n] 2006.229.19:35:17.37#ibcon#*before write, iclass 30, count 2 2006.229.19:35:17.37#ibcon#enter sib2, iclass 30, count 2 2006.229.19:35:17.37#ibcon#flushed, iclass 30, count 2 2006.229.19:35:17.37#ibcon#about to write, iclass 30, count 2 2006.229.19:35:17.37#ibcon#wrote, iclass 30, count 2 2006.229.19:35:17.37#ibcon#about to read 3, iclass 30, count 2 2006.229.19:35:17.40#ibcon#read 3, iclass 30, count 2 2006.229.19:35:17.40#ibcon#about to read 4, iclass 30, count 2 2006.229.19:35:17.40#ibcon#read 4, iclass 30, count 2 2006.229.19:35:17.40#ibcon#about to read 5, iclass 30, count 2 2006.229.19:35:17.40#ibcon#read 5, iclass 30, count 2 2006.229.19:35:17.40#ibcon#about to read 6, iclass 30, count 2 2006.229.19:35:17.40#ibcon#read 6, iclass 30, count 2 2006.229.19:35:17.40#ibcon#end of sib2, iclass 30, count 2 2006.229.19:35:17.40#ibcon#*after write, iclass 30, count 2 2006.229.19:35:17.40#ibcon#*before return 0, iclass 30, count 2 2006.229.19:35:17.40#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:17.40#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:17.40#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.19:35:17.40#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:17.40#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:17.52#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:17.52#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:17.52#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:35:17.52#ibcon#first serial, iclass 30, count 0 2006.229.19:35:17.52#ibcon#enter sib2, iclass 30, count 0 2006.229.19:35:17.52#ibcon#flushed, iclass 30, count 0 2006.229.19:35:17.52#ibcon#about to write, iclass 30, count 0 2006.229.19:35:17.52#ibcon#wrote, iclass 30, count 0 2006.229.19:35:17.52#ibcon#about to read 3, iclass 30, count 0 2006.229.19:35:17.54#ibcon#read 3, iclass 30, count 0 2006.229.19:35:17.54#ibcon#about to read 4, iclass 30, count 0 2006.229.19:35:17.54#ibcon#read 4, iclass 30, count 0 2006.229.19:35:17.54#ibcon#about to read 5, iclass 30, count 0 2006.229.19:35:17.54#ibcon#read 5, iclass 30, count 0 2006.229.19:35:17.54#ibcon#about to read 6, iclass 30, count 0 2006.229.19:35:17.54#ibcon#read 6, iclass 30, count 0 2006.229.19:35:17.54#ibcon#end of sib2, iclass 30, count 0 2006.229.19:35:17.54#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:35:17.54#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:35:17.54#ibcon#[25=USB\r\n] 2006.229.19:35:17.54#ibcon#*before write, iclass 30, count 0 2006.229.19:35:17.54#ibcon#enter sib2, iclass 30, count 0 2006.229.19:35:17.54#ibcon#flushed, iclass 30, count 0 2006.229.19:35:17.54#ibcon#about to write, iclass 30, count 0 2006.229.19:35:17.54#ibcon#wrote, iclass 30, count 0 2006.229.19:35:17.54#ibcon#about to read 3, iclass 30, count 0 2006.229.19:35:17.57#ibcon#read 3, iclass 30, count 0 2006.229.19:35:17.57#ibcon#about to read 4, iclass 30, count 0 2006.229.19:35:17.57#ibcon#read 4, iclass 30, count 0 2006.229.19:35:17.57#ibcon#about to read 5, iclass 30, count 0 2006.229.19:35:17.57#ibcon#read 5, iclass 30, count 0 2006.229.19:35:17.57#ibcon#about to read 6, iclass 30, count 0 2006.229.19:35:17.57#ibcon#read 6, iclass 30, count 0 2006.229.19:35:17.57#ibcon#end of sib2, iclass 30, count 0 2006.229.19:35:17.57#ibcon#*after write, iclass 30, count 0 2006.229.19:35:17.57#ibcon#*before return 0, iclass 30, count 0 2006.229.19:35:17.57#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:17.57#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:17.57#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:35:17.57#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:35:17.57$vck44/valo=8,884.99 2006.229.19:35:17.57#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.19:35:17.57#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.19:35:17.57#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:17.57#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:17.57#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:17.57#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:17.57#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:35:17.57#ibcon#first serial, iclass 32, count 0 2006.229.19:35:17.57#ibcon#enter sib2, iclass 32, count 0 2006.229.19:35:17.57#ibcon#flushed, iclass 32, count 0 2006.229.19:35:17.57#ibcon#about to write, iclass 32, count 0 2006.229.19:35:17.57#ibcon#wrote, iclass 32, count 0 2006.229.19:35:17.57#ibcon#about to read 3, iclass 32, count 0 2006.229.19:35:17.59#ibcon#read 3, iclass 32, count 0 2006.229.19:35:17.59#ibcon#about to read 4, iclass 32, count 0 2006.229.19:35:17.59#ibcon#read 4, iclass 32, count 0 2006.229.19:35:17.59#ibcon#about to read 5, iclass 32, count 0 2006.229.19:35:17.59#ibcon#read 5, iclass 32, count 0 2006.229.19:35:17.59#ibcon#about to read 6, iclass 32, count 0 2006.229.19:35:17.59#ibcon#read 6, iclass 32, count 0 2006.229.19:35:17.59#ibcon#end of sib2, iclass 32, count 0 2006.229.19:35:17.59#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:35:17.59#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:35:17.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:35:17.59#ibcon#*before write, iclass 32, count 0 2006.229.19:35:17.59#ibcon#enter sib2, iclass 32, count 0 2006.229.19:35:17.59#ibcon#flushed, iclass 32, count 0 2006.229.19:35:17.59#ibcon#about to write, iclass 32, count 0 2006.229.19:35:17.59#ibcon#wrote, iclass 32, count 0 2006.229.19:35:17.59#ibcon#about to read 3, iclass 32, count 0 2006.229.19:35:17.63#ibcon#read 3, iclass 32, count 0 2006.229.19:35:17.63#ibcon#about to read 4, iclass 32, count 0 2006.229.19:35:17.63#ibcon#read 4, iclass 32, count 0 2006.229.19:35:17.63#ibcon#about to read 5, iclass 32, count 0 2006.229.19:35:17.63#ibcon#read 5, iclass 32, count 0 2006.229.19:35:17.63#ibcon#about to read 6, iclass 32, count 0 2006.229.19:35:17.63#ibcon#read 6, iclass 32, count 0 2006.229.19:35:17.63#ibcon#end of sib2, iclass 32, count 0 2006.229.19:35:17.63#ibcon#*after write, iclass 32, count 0 2006.229.19:35:17.63#ibcon#*before return 0, iclass 32, count 0 2006.229.19:35:17.63#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:17.63#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:17.63#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:35:17.63#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:35:17.63$vck44/va=8,6 2006.229.19:35:17.63#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.19:35:17.63#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.19:35:17.63#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:17.63#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:17.69#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:17.69#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:17.69#ibcon#enter wrdev, iclass 34, count 2 2006.229.19:35:17.69#ibcon#first serial, iclass 34, count 2 2006.229.19:35:17.69#ibcon#enter sib2, iclass 34, count 2 2006.229.19:35:17.69#ibcon#flushed, iclass 34, count 2 2006.229.19:35:17.69#ibcon#about to write, iclass 34, count 2 2006.229.19:35:17.69#ibcon#wrote, iclass 34, count 2 2006.229.19:35:17.69#ibcon#about to read 3, iclass 34, count 2 2006.229.19:35:17.71#ibcon#read 3, iclass 34, count 2 2006.229.19:35:17.71#ibcon#about to read 4, iclass 34, count 2 2006.229.19:35:17.71#ibcon#read 4, iclass 34, count 2 2006.229.19:35:17.71#ibcon#about to read 5, iclass 34, count 2 2006.229.19:35:17.71#ibcon#read 5, iclass 34, count 2 2006.229.19:35:17.71#ibcon#about to read 6, iclass 34, count 2 2006.229.19:35:17.71#ibcon#read 6, iclass 34, count 2 2006.229.19:35:17.71#ibcon#end of sib2, iclass 34, count 2 2006.229.19:35:17.71#ibcon#*mode == 0, iclass 34, count 2 2006.229.19:35:17.71#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.19:35:17.71#ibcon#[25=AT08-06\r\n] 2006.229.19:35:17.71#ibcon#*before write, iclass 34, count 2 2006.229.19:35:17.71#ibcon#enter sib2, iclass 34, count 2 2006.229.19:35:17.71#ibcon#flushed, iclass 34, count 2 2006.229.19:35:17.71#ibcon#about to write, iclass 34, count 2 2006.229.19:35:17.71#ibcon#wrote, iclass 34, count 2 2006.229.19:35:17.71#ibcon#about to read 3, iclass 34, count 2 2006.229.19:35:17.74#ibcon#read 3, iclass 34, count 2 2006.229.19:35:17.74#ibcon#about to read 4, iclass 34, count 2 2006.229.19:35:17.74#ibcon#read 4, iclass 34, count 2 2006.229.19:35:17.74#ibcon#about to read 5, iclass 34, count 2 2006.229.19:35:17.74#ibcon#read 5, iclass 34, count 2 2006.229.19:35:17.74#ibcon#about to read 6, iclass 34, count 2 2006.229.19:35:17.74#ibcon#read 6, iclass 34, count 2 2006.229.19:35:17.74#ibcon#end of sib2, iclass 34, count 2 2006.229.19:35:17.74#ibcon#*after write, iclass 34, count 2 2006.229.19:35:17.74#ibcon#*before return 0, iclass 34, count 2 2006.229.19:35:17.74#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:17.74#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:17.74#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.19:35:17.74#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:17.74#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:17.86#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:17.86#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:17.86#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:35:17.86#ibcon#first serial, iclass 34, count 0 2006.229.19:35:17.86#ibcon#enter sib2, iclass 34, count 0 2006.229.19:35:17.86#ibcon#flushed, iclass 34, count 0 2006.229.19:35:17.86#ibcon#about to write, iclass 34, count 0 2006.229.19:35:17.86#ibcon#wrote, iclass 34, count 0 2006.229.19:35:17.86#ibcon#about to read 3, iclass 34, count 0 2006.229.19:35:17.88#ibcon#read 3, iclass 34, count 0 2006.229.19:35:17.88#ibcon#about to read 4, iclass 34, count 0 2006.229.19:35:17.88#ibcon#read 4, iclass 34, count 0 2006.229.19:35:17.88#ibcon#about to read 5, iclass 34, count 0 2006.229.19:35:17.88#ibcon#read 5, iclass 34, count 0 2006.229.19:35:17.88#ibcon#about to read 6, iclass 34, count 0 2006.229.19:35:17.88#ibcon#read 6, iclass 34, count 0 2006.229.19:35:17.88#ibcon#end of sib2, iclass 34, count 0 2006.229.19:35:17.88#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:35:17.88#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:35:17.88#ibcon#[25=USB\r\n] 2006.229.19:35:17.88#ibcon#*before write, iclass 34, count 0 2006.229.19:35:17.88#ibcon#enter sib2, iclass 34, count 0 2006.229.19:35:17.88#ibcon#flushed, iclass 34, count 0 2006.229.19:35:17.88#ibcon#about to write, iclass 34, count 0 2006.229.19:35:17.88#ibcon#wrote, iclass 34, count 0 2006.229.19:35:17.88#ibcon#about to read 3, iclass 34, count 0 2006.229.19:35:17.91#ibcon#read 3, iclass 34, count 0 2006.229.19:35:17.91#ibcon#about to read 4, iclass 34, count 0 2006.229.19:35:17.91#ibcon#read 4, iclass 34, count 0 2006.229.19:35:17.91#ibcon#about to read 5, iclass 34, count 0 2006.229.19:35:17.91#ibcon#read 5, iclass 34, count 0 2006.229.19:35:17.91#ibcon#about to read 6, iclass 34, count 0 2006.229.19:35:17.91#ibcon#read 6, iclass 34, count 0 2006.229.19:35:17.91#ibcon#end of sib2, iclass 34, count 0 2006.229.19:35:17.91#ibcon#*after write, iclass 34, count 0 2006.229.19:35:17.91#ibcon#*before return 0, iclass 34, count 0 2006.229.19:35:17.91#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:17.91#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:17.91#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:35:17.91#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:35:17.91$vck44/vblo=1,629.99 2006.229.19:35:17.91#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.19:35:17.91#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.19:35:17.91#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:17.91#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:17.91#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:17.91#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:17.91#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:35:17.91#ibcon#first serial, iclass 36, count 0 2006.229.19:35:17.91#ibcon#enter sib2, iclass 36, count 0 2006.229.19:35:17.91#ibcon#flushed, iclass 36, count 0 2006.229.19:35:17.91#ibcon#about to write, iclass 36, count 0 2006.229.19:35:17.91#ibcon#wrote, iclass 36, count 0 2006.229.19:35:17.91#ibcon#about to read 3, iclass 36, count 0 2006.229.19:35:17.93#ibcon#read 3, iclass 36, count 0 2006.229.19:35:17.93#ibcon#about to read 4, iclass 36, count 0 2006.229.19:35:17.93#ibcon#read 4, iclass 36, count 0 2006.229.19:35:17.93#ibcon#about to read 5, iclass 36, count 0 2006.229.19:35:17.93#ibcon#read 5, iclass 36, count 0 2006.229.19:35:17.93#ibcon#about to read 6, iclass 36, count 0 2006.229.19:35:17.93#ibcon#read 6, iclass 36, count 0 2006.229.19:35:17.93#ibcon#end of sib2, iclass 36, count 0 2006.229.19:35:17.93#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:35:17.93#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:35:17.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:35:17.93#ibcon#*before write, iclass 36, count 0 2006.229.19:35:17.93#ibcon#enter sib2, iclass 36, count 0 2006.229.19:35:17.93#ibcon#flushed, iclass 36, count 0 2006.229.19:35:17.93#ibcon#about to write, iclass 36, count 0 2006.229.19:35:17.93#ibcon#wrote, iclass 36, count 0 2006.229.19:35:17.93#ibcon#about to read 3, iclass 36, count 0 2006.229.19:35:17.97#ibcon#read 3, iclass 36, count 0 2006.229.19:35:17.97#ibcon#about to read 4, iclass 36, count 0 2006.229.19:35:17.97#ibcon#read 4, iclass 36, count 0 2006.229.19:35:17.97#ibcon#about to read 5, iclass 36, count 0 2006.229.19:35:17.97#ibcon#read 5, iclass 36, count 0 2006.229.19:35:17.97#ibcon#about to read 6, iclass 36, count 0 2006.229.19:35:17.97#ibcon#read 6, iclass 36, count 0 2006.229.19:35:17.97#ibcon#end of sib2, iclass 36, count 0 2006.229.19:35:17.97#ibcon#*after write, iclass 36, count 0 2006.229.19:35:17.97#ibcon#*before return 0, iclass 36, count 0 2006.229.19:35:17.97#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:17.97#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:17.97#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:35:17.97#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:35:17.97$vck44/vb=1,4 2006.229.19:35:17.97#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.19:35:17.97#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.19:35:17.97#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:17.97#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:35:17.97#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:35:17.97#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:35:17.97#ibcon#enter wrdev, iclass 38, count 2 2006.229.19:35:17.97#ibcon#first serial, iclass 38, count 2 2006.229.19:35:17.97#ibcon#enter sib2, iclass 38, count 2 2006.229.19:35:17.97#ibcon#flushed, iclass 38, count 2 2006.229.19:35:17.97#ibcon#about to write, iclass 38, count 2 2006.229.19:35:17.97#ibcon#wrote, iclass 38, count 2 2006.229.19:35:17.97#ibcon#about to read 3, iclass 38, count 2 2006.229.19:35:17.99#ibcon#read 3, iclass 38, count 2 2006.229.19:35:17.99#ibcon#about to read 4, iclass 38, count 2 2006.229.19:35:17.99#ibcon#read 4, iclass 38, count 2 2006.229.19:35:17.99#ibcon#about to read 5, iclass 38, count 2 2006.229.19:35:17.99#ibcon#read 5, iclass 38, count 2 2006.229.19:35:17.99#ibcon#about to read 6, iclass 38, count 2 2006.229.19:35:17.99#ibcon#read 6, iclass 38, count 2 2006.229.19:35:17.99#ibcon#end of sib2, iclass 38, count 2 2006.229.19:35:17.99#ibcon#*mode == 0, iclass 38, count 2 2006.229.19:35:17.99#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.19:35:17.99#ibcon#[27=AT01-04\r\n] 2006.229.19:35:17.99#ibcon#*before write, iclass 38, count 2 2006.229.19:35:17.99#ibcon#enter sib2, iclass 38, count 2 2006.229.19:35:17.99#ibcon#flushed, iclass 38, count 2 2006.229.19:35:17.99#ibcon#about to write, iclass 38, count 2 2006.229.19:35:17.99#ibcon#wrote, iclass 38, count 2 2006.229.19:35:17.99#ibcon#about to read 3, iclass 38, count 2 2006.229.19:35:18.02#ibcon#read 3, iclass 38, count 2 2006.229.19:35:18.02#ibcon#about to read 4, iclass 38, count 2 2006.229.19:35:18.02#ibcon#read 4, iclass 38, count 2 2006.229.19:35:18.02#ibcon#about to read 5, iclass 38, count 2 2006.229.19:35:18.02#ibcon#read 5, iclass 38, count 2 2006.229.19:35:18.02#ibcon#about to read 6, iclass 38, count 2 2006.229.19:35:18.02#ibcon#read 6, iclass 38, count 2 2006.229.19:35:18.02#ibcon#end of sib2, iclass 38, count 2 2006.229.19:35:18.02#ibcon#*after write, iclass 38, count 2 2006.229.19:35:18.02#ibcon#*before return 0, iclass 38, count 2 2006.229.19:35:18.02#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:35:18.02#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.19:35:18.02#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.19:35:18.02#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:18.02#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:35:18.14#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:35:18.14#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:35:18.14#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:35:18.14#ibcon#first serial, iclass 38, count 0 2006.229.19:35:18.14#ibcon#enter sib2, iclass 38, count 0 2006.229.19:35:18.14#ibcon#flushed, iclass 38, count 0 2006.229.19:35:18.14#ibcon#about to write, iclass 38, count 0 2006.229.19:35:18.14#ibcon#wrote, iclass 38, count 0 2006.229.19:35:18.14#ibcon#about to read 3, iclass 38, count 0 2006.229.19:35:18.16#ibcon#read 3, iclass 38, count 0 2006.229.19:35:18.16#ibcon#about to read 4, iclass 38, count 0 2006.229.19:35:18.16#ibcon#read 4, iclass 38, count 0 2006.229.19:35:18.16#ibcon#about to read 5, iclass 38, count 0 2006.229.19:35:18.16#ibcon#read 5, iclass 38, count 0 2006.229.19:35:18.16#ibcon#about to read 6, iclass 38, count 0 2006.229.19:35:18.16#ibcon#read 6, iclass 38, count 0 2006.229.19:35:18.16#ibcon#end of sib2, iclass 38, count 0 2006.229.19:35:18.16#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:35:18.16#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:35:18.16#ibcon#[27=USB\r\n] 2006.229.19:35:18.16#ibcon#*before write, iclass 38, count 0 2006.229.19:35:18.16#ibcon#enter sib2, iclass 38, count 0 2006.229.19:35:18.16#ibcon#flushed, iclass 38, count 0 2006.229.19:35:18.16#ibcon#about to write, iclass 38, count 0 2006.229.19:35:18.16#ibcon#wrote, iclass 38, count 0 2006.229.19:35:18.16#ibcon#about to read 3, iclass 38, count 0 2006.229.19:35:18.19#ibcon#read 3, iclass 38, count 0 2006.229.19:35:18.19#ibcon#about to read 4, iclass 38, count 0 2006.229.19:35:18.19#ibcon#read 4, iclass 38, count 0 2006.229.19:35:18.19#ibcon#about to read 5, iclass 38, count 0 2006.229.19:35:18.19#ibcon#read 5, iclass 38, count 0 2006.229.19:35:18.19#ibcon#about to read 6, iclass 38, count 0 2006.229.19:35:18.19#ibcon#read 6, iclass 38, count 0 2006.229.19:35:18.19#ibcon#end of sib2, iclass 38, count 0 2006.229.19:35:18.19#ibcon#*after write, iclass 38, count 0 2006.229.19:35:18.19#ibcon#*before return 0, iclass 38, count 0 2006.229.19:35:18.19#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:35:18.19#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.19:35:18.19#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:35:18.19#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:35:18.19$vck44/vblo=2,634.99 2006.229.19:35:18.19#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.19:35:18.19#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.19:35:18.19#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:18.19#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:18.19#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:18.19#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:18.19#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:35:18.19#ibcon#first serial, iclass 40, count 0 2006.229.19:35:18.19#ibcon#enter sib2, iclass 40, count 0 2006.229.19:35:18.19#ibcon#flushed, iclass 40, count 0 2006.229.19:35:18.19#ibcon#about to write, iclass 40, count 0 2006.229.19:35:18.19#ibcon#wrote, iclass 40, count 0 2006.229.19:35:18.19#ibcon#about to read 3, iclass 40, count 0 2006.229.19:35:18.21#ibcon#read 3, iclass 40, count 0 2006.229.19:35:18.21#ibcon#about to read 4, iclass 40, count 0 2006.229.19:35:18.21#ibcon#read 4, iclass 40, count 0 2006.229.19:35:18.21#ibcon#about to read 5, iclass 40, count 0 2006.229.19:35:18.21#ibcon#read 5, iclass 40, count 0 2006.229.19:35:18.21#ibcon#about to read 6, iclass 40, count 0 2006.229.19:35:18.21#ibcon#read 6, iclass 40, count 0 2006.229.19:35:18.21#ibcon#end of sib2, iclass 40, count 0 2006.229.19:35:18.21#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:35:18.21#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:35:18.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:35:18.21#ibcon#*before write, iclass 40, count 0 2006.229.19:35:18.21#ibcon#enter sib2, iclass 40, count 0 2006.229.19:35:18.21#ibcon#flushed, iclass 40, count 0 2006.229.19:35:18.21#ibcon#about to write, iclass 40, count 0 2006.229.19:35:18.21#ibcon#wrote, iclass 40, count 0 2006.229.19:35:18.21#ibcon#about to read 3, iclass 40, count 0 2006.229.19:35:18.25#ibcon#read 3, iclass 40, count 0 2006.229.19:35:18.25#ibcon#about to read 4, iclass 40, count 0 2006.229.19:35:18.25#ibcon#read 4, iclass 40, count 0 2006.229.19:35:18.25#ibcon#about to read 5, iclass 40, count 0 2006.229.19:35:18.25#ibcon#read 5, iclass 40, count 0 2006.229.19:35:18.25#ibcon#about to read 6, iclass 40, count 0 2006.229.19:35:18.25#ibcon#read 6, iclass 40, count 0 2006.229.19:35:18.25#ibcon#end of sib2, iclass 40, count 0 2006.229.19:35:18.25#ibcon#*after write, iclass 40, count 0 2006.229.19:35:18.25#ibcon#*before return 0, iclass 40, count 0 2006.229.19:35:18.25#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:18.25#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.19:35:18.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:35:18.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:35:18.25$vck44/vb=2,4 2006.229.19:35:18.25#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.19:35:18.25#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.19:35:18.25#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:18.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:18.31#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:18.31#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:18.31#ibcon#enter wrdev, iclass 4, count 2 2006.229.19:35:18.31#ibcon#first serial, iclass 4, count 2 2006.229.19:35:18.31#ibcon#enter sib2, iclass 4, count 2 2006.229.19:35:18.31#ibcon#flushed, iclass 4, count 2 2006.229.19:35:18.31#ibcon#about to write, iclass 4, count 2 2006.229.19:35:18.31#ibcon#wrote, iclass 4, count 2 2006.229.19:35:18.31#ibcon#about to read 3, iclass 4, count 2 2006.229.19:35:18.33#ibcon#read 3, iclass 4, count 2 2006.229.19:35:18.33#ibcon#about to read 4, iclass 4, count 2 2006.229.19:35:18.33#ibcon#read 4, iclass 4, count 2 2006.229.19:35:18.33#ibcon#about to read 5, iclass 4, count 2 2006.229.19:35:18.33#ibcon#read 5, iclass 4, count 2 2006.229.19:35:18.33#ibcon#about to read 6, iclass 4, count 2 2006.229.19:35:18.33#ibcon#read 6, iclass 4, count 2 2006.229.19:35:18.33#ibcon#end of sib2, iclass 4, count 2 2006.229.19:35:18.33#ibcon#*mode == 0, iclass 4, count 2 2006.229.19:35:18.33#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.19:35:18.33#ibcon#[27=AT02-04\r\n] 2006.229.19:35:18.33#ibcon#*before write, iclass 4, count 2 2006.229.19:35:18.33#ibcon#enter sib2, iclass 4, count 2 2006.229.19:35:18.33#ibcon#flushed, iclass 4, count 2 2006.229.19:35:18.33#ibcon#about to write, iclass 4, count 2 2006.229.19:35:18.33#ibcon#wrote, iclass 4, count 2 2006.229.19:35:18.33#ibcon#about to read 3, iclass 4, count 2 2006.229.19:35:18.36#ibcon#read 3, iclass 4, count 2 2006.229.19:35:18.36#ibcon#about to read 4, iclass 4, count 2 2006.229.19:35:18.36#ibcon#read 4, iclass 4, count 2 2006.229.19:35:18.36#ibcon#about to read 5, iclass 4, count 2 2006.229.19:35:18.36#ibcon#read 5, iclass 4, count 2 2006.229.19:35:18.36#ibcon#about to read 6, iclass 4, count 2 2006.229.19:35:18.36#ibcon#read 6, iclass 4, count 2 2006.229.19:35:18.36#ibcon#end of sib2, iclass 4, count 2 2006.229.19:35:18.36#ibcon#*after write, iclass 4, count 2 2006.229.19:35:18.36#ibcon#*before return 0, iclass 4, count 2 2006.229.19:35:18.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:18.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.19:35:18.36#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.19:35:18.36#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:18.36#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:18.48#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:18.48#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:18.48#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:35:18.48#ibcon#first serial, iclass 4, count 0 2006.229.19:35:18.48#ibcon#enter sib2, iclass 4, count 0 2006.229.19:35:18.48#ibcon#flushed, iclass 4, count 0 2006.229.19:35:18.48#ibcon#about to write, iclass 4, count 0 2006.229.19:35:18.48#ibcon#wrote, iclass 4, count 0 2006.229.19:35:18.48#ibcon#about to read 3, iclass 4, count 0 2006.229.19:35:18.50#ibcon#read 3, iclass 4, count 0 2006.229.19:35:18.50#ibcon#about to read 4, iclass 4, count 0 2006.229.19:35:18.50#ibcon#read 4, iclass 4, count 0 2006.229.19:35:18.50#ibcon#about to read 5, iclass 4, count 0 2006.229.19:35:18.50#ibcon#read 5, iclass 4, count 0 2006.229.19:35:18.50#ibcon#about to read 6, iclass 4, count 0 2006.229.19:35:18.50#ibcon#read 6, iclass 4, count 0 2006.229.19:35:18.50#ibcon#end of sib2, iclass 4, count 0 2006.229.19:35:18.50#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:35:18.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:35:18.50#ibcon#[27=USB\r\n] 2006.229.19:35:18.50#ibcon#*before write, iclass 4, count 0 2006.229.19:35:18.50#ibcon#enter sib2, iclass 4, count 0 2006.229.19:35:18.50#ibcon#flushed, iclass 4, count 0 2006.229.19:35:18.50#ibcon#about to write, iclass 4, count 0 2006.229.19:35:18.50#ibcon#wrote, iclass 4, count 0 2006.229.19:35:18.50#ibcon#about to read 3, iclass 4, count 0 2006.229.19:35:18.53#abcon#<5=/06 1.8 3.9 26.051001001.5\r\n> 2006.229.19:35:18.53#ibcon#read 3, iclass 4, count 0 2006.229.19:35:18.53#ibcon#about to read 4, iclass 4, count 0 2006.229.19:35:18.53#ibcon#read 4, iclass 4, count 0 2006.229.19:35:18.53#ibcon#about to read 5, iclass 4, count 0 2006.229.19:35:18.53#ibcon#read 5, iclass 4, count 0 2006.229.19:35:18.53#ibcon#about to read 6, iclass 4, count 0 2006.229.19:35:18.53#ibcon#read 6, iclass 4, count 0 2006.229.19:35:18.53#ibcon#end of sib2, iclass 4, count 0 2006.229.19:35:18.53#ibcon#*after write, iclass 4, count 0 2006.229.19:35:18.53#ibcon#*before return 0, iclass 4, count 0 2006.229.19:35:18.53#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:18.53#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.19:35:18.53#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:35:18.53#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:35:18.53$vck44/vblo=3,649.99 2006.229.19:35:18.53#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:35:18.53#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:35:18.53#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:18.53#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:35:18.53#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:35:18.53#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:35:18.53#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:35:18.53#ibcon#first serial, iclass 11, count 0 2006.229.19:35:18.53#ibcon#enter sib2, iclass 11, count 0 2006.229.19:35:18.53#ibcon#flushed, iclass 11, count 0 2006.229.19:35:18.53#ibcon#about to write, iclass 11, count 0 2006.229.19:35:18.53#ibcon#wrote, iclass 11, count 0 2006.229.19:35:18.53#ibcon#about to read 3, iclass 11, count 0 2006.229.19:35:18.55#abcon#{5=INTERFACE CLEAR} 2006.229.19:35:18.55#ibcon#read 3, iclass 11, count 0 2006.229.19:35:18.55#ibcon#about to read 4, iclass 11, count 0 2006.229.19:35:18.55#ibcon#read 4, iclass 11, count 0 2006.229.19:35:18.55#ibcon#about to read 5, iclass 11, count 0 2006.229.19:35:18.55#ibcon#read 5, iclass 11, count 0 2006.229.19:35:18.55#ibcon#about to read 6, iclass 11, count 0 2006.229.19:35:18.55#ibcon#read 6, iclass 11, count 0 2006.229.19:35:18.55#ibcon#end of sib2, iclass 11, count 0 2006.229.19:35:18.55#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:35:18.55#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:35:18.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:35:18.55#ibcon#*before write, iclass 11, count 0 2006.229.19:35:18.55#ibcon#enter sib2, iclass 11, count 0 2006.229.19:35:18.55#ibcon#flushed, iclass 11, count 0 2006.229.19:35:18.55#ibcon#about to write, iclass 11, count 0 2006.229.19:35:18.55#ibcon#wrote, iclass 11, count 0 2006.229.19:35:18.55#ibcon#about to read 3, iclass 11, count 0 2006.229.19:35:18.59#ibcon#read 3, iclass 11, count 0 2006.229.19:35:18.59#ibcon#about to read 4, iclass 11, count 0 2006.229.19:35:18.59#ibcon#read 4, iclass 11, count 0 2006.229.19:35:18.59#ibcon#about to read 5, iclass 11, count 0 2006.229.19:35:18.59#ibcon#read 5, iclass 11, count 0 2006.229.19:35:18.59#ibcon#about to read 6, iclass 11, count 0 2006.229.19:35:18.59#ibcon#read 6, iclass 11, count 0 2006.229.19:35:18.59#ibcon#end of sib2, iclass 11, count 0 2006.229.19:35:18.59#ibcon#*after write, iclass 11, count 0 2006.229.19:35:18.59#ibcon#*before return 0, iclass 11, count 0 2006.229.19:35:18.59#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:35:18.59#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:35:18.59#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:35:18.59#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:35:18.59$vck44/vb=3,4 2006.229.19:35:18.59#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.19:35:18.59#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.19:35:18.59#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:18.59#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:18.61#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:35:18.65#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:18.65#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:18.65#ibcon#enter wrdev, iclass 14, count 2 2006.229.19:35:18.65#ibcon#first serial, iclass 14, count 2 2006.229.19:35:18.65#ibcon#enter sib2, iclass 14, count 2 2006.229.19:35:18.65#ibcon#flushed, iclass 14, count 2 2006.229.19:35:18.65#ibcon#about to write, iclass 14, count 2 2006.229.19:35:18.65#ibcon#wrote, iclass 14, count 2 2006.229.19:35:18.65#ibcon#about to read 3, iclass 14, count 2 2006.229.19:35:18.67#ibcon#read 3, iclass 14, count 2 2006.229.19:35:18.67#ibcon#about to read 4, iclass 14, count 2 2006.229.19:35:18.67#ibcon#read 4, iclass 14, count 2 2006.229.19:35:18.67#ibcon#about to read 5, iclass 14, count 2 2006.229.19:35:18.67#ibcon#read 5, iclass 14, count 2 2006.229.19:35:18.67#ibcon#about to read 6, iclass 14, count 2 2006.229.19:35:18.67#ibcon#read 6, iclass 14, count 2 2006.229.19:35:18.67#ibcon#end of sib2, iclass 14, count 2 2006.229.19:35:18.67#ibcon#*mode == 0, iclass 14, count 2 2006.229.19:35:18.67#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.19:35:18.67#ibcon#[27=AT03-04\r\n] 2006.229.19:35:18.67#ibcon#*before write, iclass 14, count 2 2006.229.19:35:18.67#ibcon#enter sib2, iclass 14, count 2 2006.229.19:35:18.67#ibcon#flushed, iclass 14, count 2 2006.229.19:35:18.67#ibcon#about to write, iclass 14, count 2 2006.229.19:35:18.67#ibcon#wrote, iclass 14, count 2 2006.229.19:35:18.67#ibcon#about to read 3, iclass 14, count 2 2006.229.19:35:18.70#ibcon#read 3, iclass 14, count 2 2006.229.19:35:18.70#ibcon#about to read 4, iclass 14, count 2 2006.229.19:35:18.70#ibcon#read 4, iclass 14, count 2 2006.229.19:35:18.70#ibcon#about to read 5, iclass 14, count 2 2006.229.19:35:18.70#ibcon#read 5, iclass 14, count 2 2006.229.19:35:18.70#ibcon#about to read 6, iclass 14, count 2 2006.229.19:35:18.70#ibcon#read 6, iclass 14, count 2 2006.229.19:35:18.70#ibcon#end of sib2, iclass 14, count 2 2006.229.19:35:18.70#ibcon#*after write, iclass 14, count 2 2006.229.19:35:18.70#ibcon#*before return 0, iclass 14, count 2 2006.229.19:35:18.70#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:18.70#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.19:35:18.70#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.19:35:18.70#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:18.70#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:18.82#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:18.82#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:18.82#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:35:18.82#ibcon#first serial, iclass 14, count 0 2006.229.19:35:18.82#ibcon#enter sib2, iclass 14, count 0 2006.229.19:35:18.82#ibcon#flushed, iclass 14, count 0 2006.229.19:35:18.82#ibcon#about to write, iclass 14, count 0 2006.229.19:35:18.82#ibcon#wrote, iclass 14, count 0 2006.229.19:35:18.82#ibcon#about to read 3, iclass 14, count 0 2006.229.19:35:18.84#ibcon#read 3, iclass 14, count 0 2006.229.19:35:18.84#ibcon#about to read 4, iclass 14, count 0 2006.229.19:35:18.84#ibcon#read 4, iclass 14, count 0 2006.229.19:35:18.84#ibcon#about to read 5, iclass 14, count 0 2006.229.19:35:18.84#ibcon#read 5, iclass 14, count 0 2006.229.19:35:18.84#ibcon#about to read 6, iclass 14, count 0 2006.229.19:35:18.84#ibcon#read 6, iclass 14, count 0 2006.229.19:35:18.84#ibcon#end of sib2, iclass 14, count 0 2006.229.19:35:18.84#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:35:18.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:35:18.84#ibcon#[27=USB\r\n] 2006.229.19:35:18.84#ibcon#*before write, iclass 14, count 0 2006.229.19:35:18.84#ibcon#enter sib2, iclass 14, count 0 2006.229.19:35:18.84#ibcon#flushed, iclass 14, count 0 2006.229.19:35:18.84#ibcon#about to write, iclass 14, count 0 2006.229.19:35:18.84#ibcon#wrote, iclass 14, count 0 2006.229.19:35:18.84#ibcon#about to read 3, iclass 14, count 0 2006.229.19:35:18.87#ibcon#read 3, iclass 14, count 0 2006.229.19:35:18.87#ibcon#about to read 4, iclass 14, count 0 2006.229.19:35:18.87#ibcon#read 4, iclass 14, count 0 2006.229.19:35:18.87#ibcon#about to read 5, iclass 14, count 0 2006.229.19:35:18.87#ibcon#read 5, iclass 14, count 0 2006.229.19:35:18.87#ibcon#about to read 6, iclass 14, count 0 2006.229.19:35:18.87#ibcon#read 6, iclass 14, count 0 2006.229.19:35:18.87#ibcon#end of sib2, iclass 14, count 0 2006.229.19:35:18.87#ibcon#*after write, iclass 14, count 0 2006.229.19:35:18.87#ibcon#*before return 0, iclass 14, count 0 2006.229.19:35:18.87#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:18.87#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.19:35:18.87#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:35:18.87#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:35:18.87$vck44/vblo=4,679.99 2006.229.19:35:18.87#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.19:35:18.87#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.19:35:18.87#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:18.87#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:18.87#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:18.87#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:18.87#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:35:18.87#ibcon#first serial, iclass 16, count 0 2006.229.19:35:18.87#ibcon#enter sib2, iclass 16, count 0 2006.229.19:35:18.87#ibcon#flushed, iclass 16, count 0 2006.229.19:35:18.87#ibcon#about to write, iclass 16, count 0 2006.229.19:35:18.87#ibcon#wrote, iclass 16, count 0 2006.229.19:35:18.87#ibcon#about to read 3, iclass 16, count 0 2006.229.19:35:18.89#ibcon#read 3, iclass 16, count 0 2006.229.19:35:18.89#ibcon#about to read 4, iclass 16, count 0 2006.229.19:35:18.89#ibcon#read 4, iclass 16, count 0 2006.229.19:35:18.89#ibcon#about to read 5, iclass 16, count 0 2006.229.19:35:18.89#ibcon#read 5, iclass 16, count 0 2006.229.19:35:18.89#ibcon#about to read 6, iclass 16, count 0 2006.229.19:35:18.89#ibcon#read 6, iclass 16, count 0 2006.229.19:35:18.89#ibcon#end of sib2, iclass 16, count 0 2006.229.19:35:18.89#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:35:18.89#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:35:18.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:35:18.89#ibcon#*before write, iclass 16, count 0 2006.229.19:35:18.89#ibcon#enter sib2, iclass 16, count 0 2006.229.19:35:18.89#ibcon#flushed, iclass 16, count 0 2006.229.19:35:18.89#ibcon#about to write, iclass 16, count 0 2006.229.19:35:18.89#ibcon#wrote, iclass 16, count 0 2006.229.19:35:18.89#ibcon#about to read 3, iclass 16, count 0 2006.229.19:35:18.93#ibcon#read 3, iclass 16, count 0 2006.229.19:35:18.93#ibcon#about to read 4, iclass 16, count 0 2006.229.19:35:18.93#ibcon#read 4, iclass 16, count 0 2006.229.19:35:18.93#ibcon#about to read 5, iclass 16, count 0 2006.229.19:35:18.93#ibcon#read 5, iclass 16, count 0 2006.229.19:35:18.93#ibcon#about to read 6, iclass 16, count 0 2006.229.19:35:18.93#ibcon#read 6, iclass 16, count 0 2006.229.19:35:18.93#ibcon#end of sib2, iclass 16, count 0 2006.229.19:35:18.93#ibcon#*after write, iclass 16, count 0 2006.229.19:35:18.93#ibcon#*before return 0, iclass 16, count 0 2006.229.19:35:18.93#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:18.93#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.19:35:18.93#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:35:18.93#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:35:18.93$vck44/vb=4,4 2006.229.19:35:18.93#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.19:35:18.93#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.19:35:18.93#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:18.93#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:18.99#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:18.99#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:18.99#ibcon#enter wrdev, iclass 18, count 2 2006.229.19:35:18.99#ibcon#first serial, iclass 18, count 2 2006.229.19:35:18.99#ibcon#enter sib2, iclass 18, count 2 2006.229.19:35:18.99#ibcon#flushed, iclass 18, count 2 2006.229.19:35:18.99#ibcon#about to write, iclass 18, count 2 2006.229.19:35:18.99#ibcon#wrote, iclass 18, count 2 2006.229.19:35:18.99#ibcon#about to read 3, iclass 18, count 2 2006.229.19:35:19.01#ibcon#read 3, iclass 18, count 2 2006.229.19:35:19.01#ibcon#about to read 4, iclass 18, count 2 2006.229.19:35:19.01#ibcon#read 4, iclass 18, count 2 2006.229.19:35:19.01#ibcon#about to read 5, iclass 18, count 2 2006.229.19:35:19.01#ibcon#read 5, iclass 18, count 2 2006.229.19:35:19.01#ibcon#about to read 6, iclass 18, count 2 2006.229.19:35:19.01#ibcon#read 6, iclass 18, count 2 2006.229.19:35:19.01#ibcon#end of sib2, iclass 18, count 2 2006.229.19:35:19.01#ibcon#*mode == 0, iclass 18, count 2 2006.229.19:35:19.01#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.19:35:19.01#ibcon#[27=AT04-04\r\n] 2006.229.19:35:19.01#ibcon#*before write, iclass 18, count 2 2006.229.19:35:19.01#ibcon#enter sib2, iclass 18, count 2 2006.229.19:35:19.01#ibcon#flushed, iclass 18, count 2 2006.229.19:35:19.01#ibcon#about to write, iclass 18, count 2 2006.229.19:35:19.01#ibcon#wrote, iclass 18, count 2 2006.229.19:35:19.01#ibcon#about to read 3, iclass 18, count 2 2006.229.19:35:19.04#ibcon#read 3, iclass 18, count 2 2006.229.19:35:19.04#ibcon#about to read 4, iclass 18, count 2 2006.229.19:35:19.04#ibcon#read 4, iclass 18, count 2 2006.229.19:35:19.04#ibcon#about to read 5, iclass 18, count 2 2006.229.19:35:19.04#ibcon#read 5, iclass 18, count 2 2006.229.19:35:19.04#ibcon#about to read 6, iclass 18, count 2 2006.229.19:35:19.04#ibcon#read 6, iclass 18, count 2 2006.229.19:35:19.04#ibcon#end of sib2, iclass 18, count 2 2006.229.19:35:19.04#ibcon#*after write, iclass 18, count 2 2006.229.19:35:19.04#ibcon#*before return 0, iclass 18, count 2 2006.229.19:35:19.04#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:19.04#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.19:35:19.04#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.19:35:19.04#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:19.04#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:19.16#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:19.16#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:19.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:35:19.16#ibcon#first serial, iclass 18, count 0 2006.229.19:35:19.16#ibcon#enter sib2, iclass 18, count 0 2006.229.19:35:19.16#ibcon#flushed, iclass 18, count 0 2006.229.19:35:19.16#ibcon#about to write, iclass 18, count 0 2006.229.19:35:19.16#ibcon#wrote, iclass 18, count 0 2006.229.19:35:19.16#ibcon#about to read 3, iclass 18, count 0 2006.229.19:35:19.18#ibcon#read 3, iclass 18, count 0 2006.229.19:35:19.18#ibcon#about to read 4, iclass 18, count 0 2006.229.19:35:19.18#ibcon#read 4, iclass 18, count 0 2006.229.19:35:19.18#ibcon#about to read 5, iclass 18, count 0 2006.229.19:35:19.18#ibcon#read 5, iclass 18, count 0 2006.229.19:35:19.18#ibcon#about to read 6, iclass 18, count 0 2006.229.19:35:19.18#ibcon#read 6, iclass 18, count 0 2006.229.19:35:19.18#ibcon#end of sib2, iclass 18, count 0 2006.229.19:35:19.18#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:35:19.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:35:19.18#ibcon#[27=USB\r\n] 2006.229.19:35:19.18#ibcon#*before write, iclass 18, count 0 2006.229.19:35:19.18#ibcon#enter sib2, iclass 18, count 0 2006.229.19:35:19.18#ibcon#flushed, iclass 18, count 0 2006.229.19:35:19.18#ibcon#about to write, iclass 18, count 0 2006.229.19:35:19.18#ibcon#wrote, iclass 18, count 0 2006.229.19:35:19.18#ibcon#about to read 3, iclass 18, count 0 2006.229.19:35:19.21#ibcon#read 3, iclass 18, count 0 2006.229.19:35:19.21#ibcon#about to read 4, iclass 18, count 0 2006.229.19:35:19.21#ibcon#read 4, iclass 18, count 0 2006.229.19:35:19.21#ibcon#about to read 5, iclass 18, count 0 2006.229.19:35:19.21#ibcon#read 5, iclass 18, count 0 2006.229.19:35:19.21#ibcon#about to read 6, iclass 18, count 0 2006.229.19:35:19.21#ibcon#read 6, iclass 18, count 0 2006.229.19:35:19.21#ibcon#end of sib2, iclass 18, count 0 2006.229.19:35:19.21#ibcon#*after write, iclass 18, count 0 2006.229.19:35:19.21#ibcon#*before return 0, iclass 18, count 0 2006.229.19:35:19.21#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:19.21#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.19:35:19.21#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:35:19.21#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:35:19.21$vck44/vblo=5,709.99 2006.229.19:35:19.21#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.19:35:19.21#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.19:35:19.21#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:19.21#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:19.21#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:19.21#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:19.21#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:35:19.21#ibcon#first serial, iclass 20, count 0 2006.229.19:35:19.21#ibcon#enter sib2, iclass 20, count 0 2006.229.19:35:19.21#ibcon#flushed, iclass 20, count 0 2006.229.19:35:19.21#ibcon#about to write, iclass 20, count 0 2006.229.19:35:19.21#ibcon#wrote, iclass 20, count 0 2006.229.19:35:19.21#ibcon#about to read 3, iclass 20, count 0 2006.229.19:35:19.23#ibcon#read 3, iclass 20, count 0 2006.229.19:35:19.23#ibcon#about to read 4, iclass 20, count 0 2006.229.19:35:19.23#ibcon#read 4, iclass 20, count 0 2006.229.19:35:19.23#ibcon#about to read 5, iclass 20, count 0 2006.229.19:35:19.23#ibcon#read 5, iclass 20, count 0 2006.229.19:35:19.23#ibcon#about to read 6, iclass 20, count 0 2006.229.19:35:19.23#ibcon#read 6, iclass 20, count 0 2006.229.19:35:19.23#ibcon#end of sib2, iclass 20, count 0 2006.229.19:35:19.23#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:35:19.23#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:35:19.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:35:19.23#ibcon#*before write, iclass 20, count 0 2006.229.19:35:19.23#ibcon#enter sib2, iclass 20, count 0 2006.229.19:35:19.23#ibcon#flushed, iclass 20, count 0 2006.229.19:35:19.23#ibcon#about to write, iclass 20, count 0 2006.229.19:35:19.23#ibcon#wrote, iclass 20, count 0 2006.229.19:35:19.23#ibcon#about to read 3, iclass 20, count 0 2006.229.19:35:19.27#ibcon#read 3, iclass 20, count 0 2006.229.19:35:19.27#ibcon#about to read 4, iclass 20, count 0 2006.229.19:35:19.27#ibcon#read 4, iclass 20, count 0 2006.229.19:35:19.27#ibcon#about to read 5, iclass 20, count 0 2006.229.19:35:19.27#ibcon#read 5, iclass 20, count 0 2006.229.19:35:19.27#ibcon#about to read 6, iclass 20, count 0 2006.229.19:35:19.27#ibcon#read 6, iclass 20, count 0 2006.229.19:35:19.27#ibcon#end of sib2, iclass 20, count 0 2006.229.19:35:19.27#ibcon#*after write, iclass 20, count 0 2006.229.19:35:19.27#ibcon#*before return 0, iclass 20, count 0 2006.229.19:35:19.27#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:19.27#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.19:35:19.27#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:35:19.27#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:35:19.27$vck44/vb=5,4 2006.229.19:35:19.27#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.19:35:19.27#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.19:35:19.27#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:19.27#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:19.33#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:19.33#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:19.33#ibcon#enter wrdev, iclass 22, count 2 2006.229.19:35:19.33#ibcon#first serial, iclass 22, count 2 2006.229.19:35:19.33#ibcon#enter sib2, iclass 22, count 2 2006.229.19:35:19.33#ibcon#flushed, iclass 22, count 2 2006.229.19:35:19.33#ibcon#about to write, iclass 22, count 2 2006.229.19:35:19.33#ibcon#wrote, iclass 22, count 2 2006.229.19:35:19.33#ibcon#about to read 3, iclass 22, count 2 2006.229.19:35:19.35#ibcon#read 3, iclass 22, count 2 2006.229.19:35:19.35#ibcon#about to read 4, iclass 22, count 2 2006.229.19:35:19.35#ibcon#read 4, iclass 22, count 2 2006.229.19:35:19.35#ibcon#about to read 5, iclass 22, count 2 2006.229.19:35:19.35#ibcon#read 5, iclass 22, count 2 2006.229.19:35:19.35#ibcon#about to read 6, iclass 22, count 2 2006.229.19:35:19.35#ibcon#read 6, iclass 22, count 2 2006.229.19:35:19.35#ibcon#end of sib2, iclass 22, count 2 2006.229.19:35:19.35#ibcon#*mode == 0, iclass 22, count 2 2006.229.19:35:19.35#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.19:35:19.35#ibcon#[27=AT05-04\r\n] 2006.229.19:35:19.35#ibcon#*before write, iclass 22, count 2 2006.229.19:35:19.35#ibcon#enter sib2, iclass 22, count 2 2006.229.19:35:19.35#ibcon#flushed, iclass 22, count 2 2006.229.19:35:19.35#ibcon#about to write, iclass 22, count 2 2006.229.19:35:19.35#ibcon#wrote, iclass 22, count 2 2006.229.19:35:19.35#ibcon#about to read 3, iclass 22, count 2 2006.229.19:35:19.38#ibcon#read 3, iclass 22, count 2 2006.229.19:35:19.38#ibcon#about to read 4, iclass 22, count 2 2006.229.19:35:19.38#ibcon#read 4, iclass 22, count 2 2006.229.19:35:19.38#ibcon#about to read 5, iclass 22, count 2 2006.229.19:35:19.38#ibcon#read 5, iclass 22, count 2 2006.229.19:35:19.38#ibcon#about to read 6, iclass 22, count 2 2006.229.19:35:19.38#ibcon#read 6, iclass 22, count 2 2006.229.19:35:19.38#ibcon#end of sib2, iclass 22, count 2 2006.229.19:35:19.38#ibcon#*after write, iclass 22, count 2 2006.229.19:35:19.38#ibcon#*before return 0, iclass 22, count 2 2006.229.19:35:19.38#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:19.38#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.19:35:19.38#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.19:35:19.38#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:19.38#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:19.50#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:19.50#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:19.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:35:19.50#ibcon#first serial, iclass 22, count 0 2006.229.19:35:19.50#ibcon#enter sib2, iclass 22, count 0 2006.229.19:35:19.50#ibcon#flushed, iclass 22, count 0 2006.229.19:35:19.50#ibcon#about to write, iclass 22, count 0 2006.229.19:35:19.50#ibcon#wrote, iclass 22, count 0 2006.229.19:35:19.50#ibcon#about to read 3, iclass 22, count 0 2006.229.19:35:19.52#ibcon#read 3, iclass 22, count 0 2006.229.19:35:19.52#ibcon#about to read 4, iclass 22, count 0 2006.229.19:35:19.52#ibcon#read 4, iclass 22, count 0 2006.229.19:35:19.52#ibcon#about to read 5, iclass 22, count 0 2006.229.19:35:19.52#ibcon#read 5, iclass 22, count 0 2006.229.19:35:19.52#ibcon#about to read 6, iclass 22, count 0 2006.229.19:35:19.52#ibcon#read 6, iclass 22, count 0 2006.229.19:35:19.52#ibcon#end of sib2, iclass 22, count 0 2006.229.19:35:19.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:35:19.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:35:19.52#ibcon#[27=USB\r\n] 2006.229.19:35:19.52#ibcon#*before write, iclass 22, count 0 2006.229.19:35:19.52#ibcon#enter sib2, iclass 22, count 0 2006.229.19:35:19.52#ibcon#flushed, iclass 22, count 0 2006.229.19:35:19.52#ibcon#about to write, iclass 22, count 0 2006.229.19:35:19.52#ibcon#wrote, iclass 22, count 0 2006.229.19:35:19.52#ibcon#about to read 3, iclass 22, count 0 2006.229.19:35:19.55#ibcon#read 3, iclass 22, count 0 2006.229.19:35:19.55#ibcon#about to read 4, iclass 22, count 0 2006.229.19:35:19.55#ibcon#read 4, iclass 22, count 0 2006.229.19:35:19.55#ibcon#about to read 5, iclass 22, count 0 2006.229.19:35:19.55#ibcon#read 5, iclass 22, count 0 2006.229.19:35:19.55#ibcon#about to read 6, iclass 22, count 0 2006.229.19:35:19.55#ibcon#read 6, iclass 22, count 0 2006.229.19:35:19.55#ibcon#end of sib2, iclass 22, count 0 2006.229.19:35:19.55#ibcon#*after write, iclass 22, count 0 2006.229.19:35:19.55#ibcon#*before return 0, iclass 22, count 0 2006.229.19:35:19.55#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:19.55#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.19:35:19.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:35:19.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:35:19.55$vck44/vblo=6,719.99 2006.229.19:35:19.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.19:35:19.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.19:35:19.55#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:19.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:19.55#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:19.55#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:19.55#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:35:19.55#ibcon#first serial, iclass 24, count 0 2006.229.19:35:19.55#ibcon#enter sib2, iclass 24, count 0 2006.229.19:35:19.55#ibcon#flushed, iclass 24, count 0 2006.229.19:35:19.55#ibcon#about to write, iclass 24, count 0 2006.229.19:35:19.55#ibcon#wrote, iclass 24, count 0 2006.229.19:35:19.55#ibcon#about to read 3, iclass 24, count 0 2006.229.19:35:19.57#ibcon#read 3, iclass 24, count 0 2006.229.19:35:19.57#ibcon#about to read 4, iclass 24, count 0 2006.229.19:35:19.57#ibcon#read 4, iclass 24, count 0 2006.229.19:35:19.57#ibcon#about to read 5, iclass 24, count 0 2006.229.19:35:19.57#ibcon#read 5, iclass 24, count 0 2006.229.19:35:19.57#ibcon#about to read 6, iclass 24, count 0 2006.229.19:35:19.57#ibcon#read 6, iclass 24, count 0 2006.229.19:35:19.57#ibcon#end of sib2, iclass 24, count 0 2006.229.19:35:19.57#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:35:19.57#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:35:19.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:35:19.57#ibcon#*before write, iclass 24, count 0 2006.229.19:35:19.57#ibcon#enter sib2, iclass 24, count 0 2006.229.19:35:19.57#ibcon#flushed, iclass 24, count 0 2006.229.19:35:19.57#ibcon#about to write, iclass 24, count 0 2006.229.19:35:19.57#ibcon#wrote, iclass 24, count 0 2006.229.19:35:19.57#ibcon#about to read 3, iclass 24, count 0 2006.229.19:35:19.61#ibcon#read 3, iclass 24, count 0 2006.229.19:35:19.61#ibcon#about to read 4, iclass 24, count 0 2006.229.19:35:19.61#ibcon#read 4, iclass 24, count 0 2006.229.19:35:19.61#ibcon#about to read 5, iclass 24, count 0 2006.229.19:35:19.61#ibcon#read 5, iclass 24, count 0 2006.229.19:35:19.61#ibcon#about to read 6, iclass 24, count 0 2006.229.19:35:19.61#ibcon#read 6, iclass 24, count 0 2006.229.19:35:19.61#ibcon#end of sib2, iclass 24, count 0 2006.229.19:35:19.61#ibcon#*after write, iclass 24, count 0 2006.229.19:35:19.61#ibcon#*before return 0, iclass 24, count 0 2006.229.19:35:19.61#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:19.61#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:35:19.61#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:35:19.61#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:35:19.61$vck44/vb=6,4 2006.229.19:35:19.61#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.19:35:19.61#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.19:35:19.61#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:19.61#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:19.67#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:19.67#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:19.67#ibcon#enter wrdev, iclass 26, count 2 2006.229.19:35:19.67#ibcon#first serial, iclass 26, count 2 2006.229.19:35:19.67#ibcon#enter sib2, iclass 26, count 2 2006.229.19:35:19.67#ibcon#flushed, iclass 26, count 2 2006.229.19:35:19.67#ibcon#about to write, iclass 26, count 2 2006.229.19:35:19.67#ibcon#wrote, iclass 26, count 2 2006.229.19:35:19.67#ibcon#about to read 3, iclass 26, count 2 2006.229.19:35:19.69#ibcon#read 3, iclass 26, count 2 2006.229.19:35:19.69#ibcon#about to read 4, iclass 26, count 2 2006.229.19:35:19.69#ibcon#read 4, iclass 26, count 2 2006.229.19:35:19.69#ibcon#about to read 5, iclass 26, count 2 2006.229.19:35:19.69#ibcon#read 5, iclass 26, count 2 2006.229.19:35:19.69#ibcon#about to read 6, iclass 26, count 2 2006.229.19:35:19.69#ibcon#read 6, iclass 26, count 2 2006.229.19:35:19.69#ibcon#end of sib2, iclass 26, count 2 2006.229.19:35:19.69#ibcon#*mode == 0, iclass 26, count 2 2006.229.19:35:19.69#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.19:35:19.69#ibcon#[27=AT06-04\r\n] 2006.229.19:35:19.69#ibcon#*before write, iclass 26, count 2 2006.229.19:35:19.69#ibcon#enter sib2, iclass 26, count 2 2006.229.19:35:19.69#ibcon#flushed, iclass 26, count 2 2006.229.19:35:19.69#ibcon#about to write, iclass 26, count 2 2006.229.19:35:19.69#ibcon#wrote, iclass 26, count 2 2006.229.19:35:19.69#ibcon#about to read 3, iclass 26, count 2 2006.229.19:35:19.72#ibcon#read 3, iclass 26, count 2 2006.229.19:35:19.72#ibcon#about to read 4, iclass 26, count 2 2006.229.19:35:19.72#ibcon#read 4, iclass 26, count 2 2006.229.19:35:19.72#ibcon#about to read 5, iclass 26, count 2 2006.229.19:35:19.72#ibcon#read 5, iclass 26, count 2 2006.229.19:35:19.72#ibcon#about to read 6, iclass 26, count 2 2006.229.19:35:19.72#ibcon#read 6, iclass 26, count 2 2006.229.19:35:19.72#ibcon#end of sib2, iclass 26, count 2 2006.229.19:35:19.72#ibcon#*after write, iclass 26, count 2 2006.229.19:35:19.72#ibcon#*before return 0, iclass 26, count 2 2006.229.19:35:19.72#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:19.72#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.19:35:19.72#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.19:35:19.72#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:19.72#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:19.84#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:19.84#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:19.84#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:35:19.84#ibcon#first serial, iclass 26, count 0 2006.229.19:35:19.84#ibcon#enter sib2, iclass 26, count 0 2006.229.19:35:19.84#ibcon#flushed, iclass 26, count 0 2006.229.19:35:19.84#ibcon#about to write, iclass 26, count 0 2006.229.19:35:19.84#ibcon#wrote, iclass 26, count 0 2006.229.19:35:19.84#ibcon#about to read 3, iclass 26, count 0 2006.229.19:35:19.86#ibcon#read 3, iclass 26, count 0 2006.229.19:35:19.86#ibcon#about to read 4, iclass 26, count 0 2006.229.19:35:19.86#ibcon#read 4, iclass 26, count 0 2006.229.19:35:19.86#ibcon#about to read 5, iclass 26, count 0 2006.229.19:35:19.86#ibcon#read 5, iclass 26, count 0 2006.229.19:35:19.86#ibcon#about to read 6, iclass 26, count 0 2006.229.19:35:19.86#ibcon#read 6, iclass 26, count 0 2006.229.19:35:19.86#ibcon#end of sib2, iclass 26, count 0 2006.229.19:35:19.86#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:35:19.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:35:19.86#ibcon#[27=USB\r\n] 2006.229.19:35:19.86#ibcon#*before write, iclass 26, count 0 2006.229.19:35:19.86#ibcon#enter sib2, iclass 26, count 0 2006.229.19:35:19.86#ibcon#flushed, iclass 26, count 0 2006.229.19:35:19.86#ibcon#about to write, iclass 26, count 0 2006.229.19:35:19.86#ibcon#wrote, iclass 26, count 0 2006.229.19:35:19.86#ibcon#about to read 3, iclass 26, count 0 2006.229.19:35:19.89#ibcon#read 3, iclass 26, count 0 2006.229.19:35:19.89#ibcon#about to read 4, iclass 26, count 0 2006.229.19:35:19.89#ibcon#read 4, iclass 26, count 0 2006.229.19:35:19.89#ibcon#about to read 5, iclass 26, count 0 2006.229.19:35:19.89#ibcon#read 5, iclass 26, count 0 2006.229.19:35:19.89#ibcon#about to read 6, iclass 26, count 0 2006.229.19:35:19.89#ibcon#read 6, iclass 26, count 0 2006.229.19:35:19.89#ibcon#end of sib2, iclass 26, count 0 2006.229.19:35:19.89#ibcon#*after write, iclass 26, count 0 2006.229.19:35:19.89#ibcon#*before return 0, iclass 26, count 0 2006.229.19:35:19.89#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:19.89#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.19:35:19.89#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:35:19.89#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:35:19.89$vck44/vblo=7,734.99 2006.229.19:35:19.89#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.19:35:19.89#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.19:35:19.89#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:19.89#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:19.89#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:19.89#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:19.89#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:35:19.89#ibcon#first serial, iclass 28, count 0 2006.229.19:35:19.89#ibcon#enter sib2, iclass 28, count 0 2006.229.19:35:19.89#ibcon#flushed, iclass 28, count 0 2006.229.19:35:19.89#ibcon#about to write, iclass 28, count 0 2006.229.19:35:19.89#ibcon#wrote, iclass 28, count 0 2006.229.19:35:19.89#ibcon#about to read 3, iclass 28, count 0 2006.229.19:35:19.91#ibcon#read 3, iclass 28, count 0 2006.229.19:35:19.91#ibcon#about to read 4, iclass 28, count 0 2006.229.19:35:19.91#ibcon#read 4, iclass 28, count 0 2006.229.19:35:19.91#ibcon#about to read 5, iclass 28, count 0 2006.229.19:35:19.91#ibcon#read 5, iclass 28, count 0 2006.229.19:35:19.91#ibcon#about to read 6, iclass 28, count 0 2006.229.19:35:19.91#ibcon#read 6, iclass 28, count 0 2006.229.19:35:19.91#ibcon#end of sib2, iclass 28, count 0 2006.229.19:35:19.91#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:35:19.91#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:35:19.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:35:19.91#ibcon#*before write, iclass 28, count 0 2006.229.19:35:19.91#ibcon#enter sib2, iclass 28, count 0 2006.229.19:35:19.91#ibcon#flushed, iclass 28, count 0 2006.229.19:35:19.91#ibcon#about to write, iclass 28, count 0 2006.229.19:35:19.91#ibcon#wrote, iclass 28, count 0 2006.229.19:35:19.91#ibcon#about to read 3, iclass 28, count 0 2006.229.19:35:19.95#ibcon#read 3, iclass 28, count 0 2006.229.19:35:19.95#ibcon#about to read 4, iclass 28, count 0 2006.229.19:35:19.95#ibcon#read 4, iclass 28, count 0 2006.229.19:35:19.95#ibcon#about to read 5, iclass 28, count 0 2006.229.19:35:19.95#ibcon#read 5, iclass 28, count 0 2006.229.19:35:19.95#ibcon#about to read 6, iclass 28, count 0 2006.229.19:35:19.95#ibcon#read 6, iclass 28, count 0 2006.229.19:35:19.95#ibcon#end of sib2, iclass 28, count 0 2006.229.19:35:19.95#ibcon#*after write, iclass 28, count 0 2006.229.19:35:19.95#ibcon#*before return 0, iclass 28, count 0 2006.229.19:35:19.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:19.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.19:35:19.95#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:35:19.95#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:35:19.95$vck44/vb=7,4 2006.229.19:35:19.95#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.19:35:19.95#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.19:35:19.95#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:19.95#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:20.01#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:20.01#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:20.01#ibcon#enter wrdev, iclass 30, count 2 2006.229.19:35:20.01#ibcon#first serial, iclass 30, count 2 2006.229.19:35:20.01#ibcon#enter sib2, iclass 30, count 2 2006.229.19:35:20.01#ibcon#flushed, iclass 30, count 2 2006.229.19:35:20.01#ibcon#about to write, iclass 30, count 2 2006.229.19:35:20.01#ibcon#wrote, iclass 30, count 2 2006.229.19:35:20.01#ibcon#about to read 3, iclass 30, count 2 2006.229.19:35:20.03#ibcon#read 3, iclass 30, count 2 2006.229.19:35:20.03#ibcon#about to read 4, iclass 30, count 2 2006.229.19:35:20.03#ibcon#read 4, iclass 30, count 2 2006.229.19:35:20.03#ibcon#about to read 5, iclass 30, count 2 2006.229.19:35:20.03#ibcon#read 5, iclass 30, count 2 2006.229.19:35:20.03#ibcon#about to read 6, iclass 30, count 2 2006.229.19:35:20.03#ibcon#read 6, iclass 30, count 2 2006.229.19:35:20.03#ibcon#end of sib2, iclass 30, count 2 2006.229.19:35:20.03#ibcon#*mode == 0, iclass 30, count 2 2006.229.19:35:20.03#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.19:35:20.03#ibcon#[27=AT07-04\r\n] 2006.229.19:35:20.03#ibcon#*before write, iclass 30, count 2 2006.229.19:35:20.03#ibcon#enter sib2, iclass 30, count 2 2006.229.19:35:20.03#ibcon#flushed, iclass 30, count 2 2006.229.19:35:20.03#ibcon#about to write, iclass 30, count 2 2006.229.19:35:20.03#ibcon#wrote, iclass 30, count 2 2006.229.19:35:20.03#ibcon#about to read 3, iclass 30, count 2 2006.229.19:35:20.06#ibcon#read 3, iclass 30, count 2 2006.229.19:35:20.06#ibcon#about to read 4, iclass 30, count 2 2006.229.19:35:20.06#ibcon#read 4, iclass 30, count 2 2006.229.19:35:20.06#ibcon#about to read 5, iclass 30, count 2 2006.229.19:35:20.06#ibcon#read 5, iclass 30, count 2 2006.229.19:35:20.06#ibcon#about to read 6, iclass 30, count 2 2006.229.19:35:20.06#ibcon#read 6, iclass 30, count 2 2006.229.19:35:20.06#ibcon#end of sib2, iclass 30, count 2 2006.229.19:35:20.06#ibcon#*after write, iclass 30, count 2 2006.229.19:35:20.06#ibcon#*before return 0, iclass 30, count 2 2006.229.19:35:20.06#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:20.06#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.19:35:20.06#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.19:35:20.06#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:20.06#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:20.18#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:20.18#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:20.18#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:35:20.18#ibcon#first serial, iclass 30, count 0 2006.229.19:35:20.18#ibcon#enter sib2, iclass 30, count 0 2006.229.19:35:20.18#ibcon#flushed, iclass 30, count 0 2006.229.19:35:20.18#ibcon#about to write, iclass 30, count 0 2006.229.19:35:20.18#ibcon#wrote, iclass 30, count 0 2006.229.19:35:20.18#ibcon#about to read 3, iclass 30, count 0 2006.229.19:35:20.20#ibcon#read 3, iclass 30, count 0 2006.229.19:35:20.20#ibcon#about to read 4, iclass 30, count 0 2006.229.19:35:20.20#ibcon#read 4, iclass 30, count 0 2006.229.19:35:20.20#ibcon#about to read 5, iclass 30, count 0 2006.229.19:35:20.20#ibcon#read 5, iclass 30, count 0 2006.229.19:35:20.20#ibcon#about to read 6, iclass 30, count 0 2006.229.19:35:20.20#ibcon#read 6, iclass 30, count 0 2006.229.19:35:20.20#ibcon#end of sib2, iclass 30, count 0 2006.229.19:35:20.20#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:35:20.20#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:35:20.20#ibcon#[27=USB\r\n] 2006.229.19:35:20.20#ibcon#*before write, iclass 30, count 0 2006.229.19:35:20.20#ibcon#enter sib2, iclass 30, count 0 2006.229.19:35:20.20#ibcon#flushed, iclass 30, count 0 2006.229.19:35:20.20#ibcon#about to write, iclass 30, count 0 2006.229.19:35:20.20#ibcon#wrote, iclass 30, count 0 2006.229.19:35:20.20#ibcon#about to read 3, iclass 30, count 0 2006.229.19:35:20.23#ibcon#read 3, iclass 30, count 0 2006.229.19:35:20.23#ibcon#about to read 4, iclass 30, count 0 2006.229.19:35:20.23#ibcon#read 4, iclass 30, count 0 2006.229.19:35:20.23#ibcon#about to read 5, iclass 30, count 0 2006.229.19:35:20.23#ibcon#read 5, iclass 30, count 0 2006.229.19:35:20.23#ibcon#about to read 6, iclass 30, count 0 2006.229.19:35:20.23#ibcon#read 6, iclass 30, count 0 2006.229.19:35:20.23#ibcon#end of sib2, iclass 30, count 0 2006.229.19:35:20.23#ibcon#*after write, iclass 30, count 0 2006.229.19:35:20.23#ibcon#*before return 0, iclass 30, count 0 2006.229.19:35:20.23#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:20.23#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.19:35:20.23#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:35:20.23#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:35:20.23$vck44/vblo=8,744.99 2006.229.19:35:20.23#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.19:35:20.23#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.19:35:20.23#ibcon#ireg 17 cls_cnt 0 2006.229.19:35:20.23#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:20.23#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:20.23#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:20.23#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:35:20.23#ibcon#first serial, iclass 32, count 0 2006.229.19:35:20.23#ibcon#enter sib2, iclass 32, count 0 2006.229.19:35:20.23#ibcon#flushed, iclass 32, count 0 2006.229.19:35:20.23#ibcon#about to write, iclass 32, count 0 2006.229.19:35:20.23#ibcon#wrote, iclass 32, count 0 2006.229.19:35:20.23#ibcon#about to read 3, iclass 32, count 0 2006.229.19:35:20.25#ibcon#read 3, iclass 32, count 0 2006.229.19:35:20.25#ibcon#about to read 4, iclass 32, count 0 2006.229.19:35:20.25#ibcon#read 4, iclass 32, count 0 2006.229.19:35:20.25#ibcon#about to read 5, iclass 32, count 0 2006.229.19:35:20.25#ibcon#read 5, iclass 32, count 0 2006.229.19:35:20.25#ibcon#about to read 6, iclass 32, count 0 2006.229.19:35:20.25#ibcon#read 6, iclass 32, count 0 2006.229.19:35:20.25#ibcon#end of sib2, iclass 32, count 0 2006.229.19:35:20.25#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:35:20.25#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:35:20.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:35:20.25#ibcon#*before write, iclass 32, count 0 2006.229.19:35:20.25#ibcon#enter sib2, iclass 32, count 0 2006.229.19:35:20.25#ibcon#flushed, iclass 32, count 0 2006.229.19:35:20.25#ibcon#about to write, iclass 32, count 0 2006.229.19:35:20.25#ibcon#wrote, iclass 32, count 0 2006.229.19:35:20.25#ibcon#about to read 3, iclass 32, count 0 2006.229.19:35:20.29#ibcon#read 3, iclass 32, count 0 2006.229.19:35:20.29#ibcon#about to read 4, iclass 32, count 0 2006.229.19:35:20.29#ibcon#read 4, iclass 32, count 0 2006.229.19:35:20.29#ibcon#about to read 5, iclass 32, count 0 2006.229.19:35:20.29#ibcon#read 5, iclass 32, count 0 2006.229.19:35:20.29#ibcon#about to read 6, iclass 32, count 0 2006.229.19:35:20.29#ibcon#read 6, iclass 32, count 0 2006.229.19:35:20.29#ibcon#end of sib2, iclass 32, count 0 2006.229.19:35:20.29#ibcon#*after write, iclass 32, count 0 2006.229.19:35:20.29#ibcon#*before return 0, iclass 32, count 0 2006.229.19:35:20.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:20.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.19:35:20.29#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:35:20.29#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:35:20.29$vck44/vb=8,4 2006.229.19:35:20.29#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.19:35:20.29#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.19:35:20.29#ibcon#ireg 11 cls_cnt 2 2006.229.19:35:20.29#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:20.35#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:20.35#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:20.35#ibcon#enter wrdev, iclass 34, count 2 2006.229.19:35:20.35#ibcon#first serial, iclass 34, count 2 2006.229.19:35:20.35#ibcon#enter sib2, iclass 34, count 2 2006.229.19:35:20.35#ibcon#flushed, iclass 34, count 2 2006.229.19:35:20.35#ibcon#about to write, iclass 34, count 2 2006.229.19:35:20.35#ibcon#wrote, iclass 34, count 2 2006.229.19:35:20.35#ibcon#about to read 3, iclass 34, count 2 2006.229.19:35:20.37#ibcon#read 3, iclass 34, count 2 2006.229.19:35:20.37#ibcon#about to read 4, iclass 34, count 2 2006.229.19:35:20.37#ibcon#read 4, iclass 34, count 2 2006.229.19:35:20.37#ibcon#about to read 5, iclass 34, count 2 2006.229.19:35:20.37#ibcon#read 5, iclass 34, count 2 2006.229.19:35:20.37#ibcon#about to read 6, iclass 34, count 2 2006.229.19:35:20.37#ibcon#read 6, iclass 34, count 2 2006.229.19:35:20.37#ibcon#end of sib2, iclass 34, count 2 2006.229.19:35:20.37#ibcon#*mode == 0, iclass 34, count 2 2006.229.19:35:20.37#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.19:35:20.37#ibcon#[27=AT08-04\r\n] 2006.229.19:35:20.37#ibcon#*before write, iclass 34, count 2 2006.229.19:35:20.37#ibcon#enter sib2, iclass 34, count 2 2006.229.19:35:20.37#ibcon#flushed, iclass 34, count 2 2006.229.19:35:20.37#ibcon#about to write, iclass 34, count 2 2006.229.19:35:20.37#ibcon#wrote, iclass 34, count 2 2006.229.19:35:20.37#ibcon#about to read 3, iclass 34, count 2 2006.229.19:35:20.40#ibcon#read 3, iclass 34, count 2 2006.229.19:35:20.40#ibcon#about to read 4, iclass 34, count 2 2006.229.19:35:20.40#ibcon#read 4, iclass 34, count 2 2006.229.19:35:20.40#ibcon#about to read 5, iclass 34, count 2 2006.229.19:35:20.40#ibcon#read 5, iclass 34, count 2 2006.229.19:35:20.40#ibcon#about to read 6, iclass 34, count 2 2006.229.19:35:20.40#ibcon#read 6, iclass 34, count 2 2006.229.19:35:20.40#ibcon#end of sib2, iclass 34, count 2 2006.229.19:35:20.40#ibcon#*after write, iclass 34, count 2 2006.229.19:35:20.40#ibcon#*before return 0, iclass 34, count 2 2006.229.19:35:20.40#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:20.40#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.19:35:20.40#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.19:35:20.40#ibcon#ireg 7 cls_cnt 0 2006.229.19:35:20.40#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:20.52#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:20.52#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:20.52#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:35:20.52#ibcon#first serial, iclass 34, count 0 2006.229.19:35:20.52#ibcon#enter sib2, iclass 34, count 0 2006.229.19:35:20.52#ibcon#flushed, iclass 34, count 0 2006.229.19:35:20.52#ibcon#about to write, iclass 34, count 0 2006.229.19:35:20.52#ibcon#wrote, iclass 34, count 0 2006.229.19:35:20.52#ibcon#about to read 3, iclass 34, count 0 2006.229.19:35:20.54#ibcon#read 3, iclass 34, count 0 2006.229.19:35:20.54#ibcon#about to read 4, iclass 34, count 0 2006.229.19:35:20.54#ibcon#read 4, iclass 34, count 0 2006.229.19:35:20.54#ibcon#about to read 5, iclass 34, count 0 2006.229.19:35:20.54#ibcon#read 5, iclass 34, count 0 2006.229.19:35:20.54#ibcon#about to read 6, iclass 34, count 0 2006.229.19:35:20.54#ibcon#read 6, iclass 34, count 0 2006.229.19:35:20.54#ibcon#end of sib2, iclass 34, count 0 2006.229.19:35:20.54#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:35:20.54#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:35:20.54#ibcon#[27=USB\r\n] 2006.229.19:35:20.54#ibcon#*before write, iclass 34, count 0 2006.229.19:35:20.54#ibcon#enter sib2, iclass 34, count 0 2006.229.19:35:20.54#ibcon#flushed, iclass 34, count 0 2006.229.19:35:20.54#ibcon#about to write, iclass 34, count 0 2006.229.19:35:20.54#ibcon#wrote, iclass 34, count 0 2006.229.19:35:20.54#ibcon#about to read 3, iclass 34, count 0 2006.229.19:35:20.57#ibcon#read 3, iclass 34, count 0 2006.229.19:35:20.57#ibcon#about to read 4, iclass 34, count 0 2006.229.19:35:20.57#ibcon#read 4, iclass 34, count 0 2006.229.19:35:20.57#ibcon#about to read 5, iclass 34, count 0 2006.229.19:35:20.57#ibcon#read 5, iclass 34, count 0 2006.229.19:35:20.57#ibcon#about to read 6, iclass 34, count 0 2006.229.19:35:20.57#ibcon#read 6, iclass 34, count 0 2006.229.19:35:20.57#ibcon#end of sib2, iclass 34, count 0 2006.229.19:35:20.57#ibcon#*after write, iclass 34, count 0 2006.229.19:35:20.57#ibcon#*before return 0, iclass 34, count 0 2006.229.19:35:20.57#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:20.57#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.19:35:20.57#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:35:20.57#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:35:20.57$vck44/vabw=wide 2006.229.19:35:20.57#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.19:35:20.57#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.19:35:20.57#ibcon#ireg 8 cls_cnt 0 2006.229.19:35:20.57#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:20.57#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:20.57#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:20.57#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:35:20.57#ibcon#first serial, iclass 36, count 0 2006.229.19:35:20.57#ibcon#enter sib2, iclass 36, count 0 2006.229.19:35:20.57#ibcon#flushed, iclass 36, count 0 2006.229.19:35:20.57#ibcon#about to write, iclass 36, count 0 2006.229.19:35:20.57#ibcon#wrote, iclass 36, count 0 2006.229.19:35:20.57#ibcon#about to read 3, iclass 36, count 0 2006.229.19:35:20.59#ibcon#read 3, iclass 36, count 0 2006.229.19:35:20.59#ibcon#about to read 4, iclass 36, count 0 2006.229.19:35:20.59#ibcon#read 4, iclass 36, count 0 2006.229.19:35:20.59#ibcon#about to read 5, iclass 36, count 0 2006.229.19:35:20.59#ibcon#read 5, iclass 36, count 0 2006.229.19:35:20.59#ibcon#about to read 6, iclass 36, count 0 2006.229.19:35:20.59#ibcon#read 6, iclass 36, count 0 2006.229.19:35:20.59#ibcon#end of sib2, iclass 36, count 0 2006.229.19:35:20.59#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:35:20.59#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:35:20.59#ibcon#[25=BW32\r\n] 2006.229.19:35:20.59#ibcon#*before write, iclass 36, count 0 2006.229.19:35:20.59#ibcon#enter sib2, iclass 36, count 0 2006.229.19:35:20.59#ibcon#flushed, iclass 36, count 0 2006.229.19:35:20.59#ibcon#about to write, iclass 36, count 0 2006.229.19:35:20.59#ibcon#wrote, iclass 36, count 0 2006.229.19:35:20.59#ibcon#about to read 3, iclass 36, count 0 2006.229.19:35:20.62#ibcon#read 3, iclass 36, count 0 2006.229.19:35:20.62#ibcon#about to read 4, iclass 36, count 0 2006.229.19:35:20.62#ibcon#read 4, iclass 36, count 0 2006.229.19:35:20.62#ibcon#about to read 5, iclass 36, count 0 2006.229.19:35:20.62#ibcon#read 5, iclass 36, count 0 2006.229.19:35:20.62#ibcon#about to read 6, iclass 36, count 0 2006.229.19:35:20.62#ibcon#read 6, iclass 36, count 0 2006.229.19:35:20.62#ibcon#end of sib2, iclass 36, count 0 2006.229.19:35:20.62#ibcon#*after write, iclass 36, count 0 2006.229.19:35:20.62#ibcon#*before return 0, iclass 36, count 0 2006.229.19:35:20.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:20.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.19:35:20.62#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:35:20.62#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:35:20.62$vck44/vbbw=wide 2006.229.19:35:20.62#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:35:20.62#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:35:20.62#ibcon#ireg 8 cls_cnt 0 2006.229.19:35:20.62#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:35:20.69#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:35:20.69#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:35:20.69#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:35:20.69#ibcon#first serial, iclass 38, count 0 2006.229.19:35:20.69#ibcon#enter sib2, iclass 38, count 0 2006.229.19:35:20.69#ibcon#flushed, iclass 38, count 0 2006.229.19:35:20.69#ibcon#about to write, iclass 38, count 0 2006.229.19:35:20.69#ibcon#wrote, iclass 38, count 0 2006.229.19:35:20.69#ibcon#about to read 3, iclass 38, count 0 2006.229.19:35:20.71#ibcon#read 3, iclass 38, count 0 2006.229.19:35:20.71#ibcon#about to read 4, iclass 38, count 0 2006.229.19:35:20.71#ibcon#read 4, iclass 38, count 0 2006.229.19:35:20.71#ibcon#about to read 5, iclass 38, count 0 2006.229.19:35:20.71#ibcon#read 5, iclass 38, count 0 2006.229.19:35:20.71#ibcon#about to read 6, iclass 38, count 0 2006.229.19:35:20.71#ibcon#read 6, iclass 38, count 0 2006.229.19:35:20.71#ibcon#end of sib2, iclass 38, count 0 2006.229.19:35:20.71#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:35:20.71#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:35:20.71#ibcon#[27=BW32\r\n] 2006.229.19:35:20.71#ibcon#*before write, iclass 38, count 0 2006.229.19:35:20.71#ibcon#enter sib2, iclass 38, count 0 2006.229.19:35:20.71#ibcon#flushed, iclass 38, count 0 2006.229.19:35:20.71#ibcon#about to write, iclass 38, count 0 2006.229.19:35:20.71#ibcon#wrote, iclass 38, count 0 2006.229.19:35:20.71#ibcon#about to read 3, iclass 38, count 0 2006.229.19:35:20.74#ibcon#read 3, iclass 38, count 0 2006.229.19:35:20.74#ibcon#about to read 4, iclass 38, count 0 2006.229.19:35:20.74#ibcon#read 4, iclass 38, count 0 2006.229.19:35:20.74#ibcon#about to read 5, iclass 38, count 0 2006.229.19:35:20.74#ibcon#read 5, iclass 38, count 0 2006.229.19:35:20.74#ibcon#about to read 6, iclass 38, count 0 2006.229.19:35:20.74#ibcon#read 6, iclass 38, count 0 2006.229.19:35:20.74#ibcon#end of sib2, iclass 38, count 0 2006.229.19:35:20.74#ibcon#*after write, iclass 38, count 0 2006.229.19:35:20.74#ibcon#*before return 0, iclass 38, count 0 2006.229.19:35:20.74#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:35:20.74#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:35:20.74#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:35:20.74#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:35:20.74$setupk4/ifdk4 2006.229.19:35:20.74$ifdk4/lo= 2006.229.19:35:20.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:35:20.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:35:20.74$ifdk4/patch= 2006.229.19:35:20.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:35:20.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:35:20.74$setupk4/!*+20s 2006.229.19:35:28.70#abcon#<5=/06 1.9 3.9 26.051001001.5\r\n> 2006.229.19:35:28.72#abcon#{5=INTERFACE CLEAR} 2006.229.19:35:28.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:35:35.25$setupk4/"tpicd 2006.229.19:35:35.25$setupk4/echo=off 2006.229.19:35:35.25$setupk4/xlog=off 2006.229.19:35:35.25:!2006.229.19:36:56 2006.229.19:35:41.14#trakl#Source acquired 2006.229.19:35:43.14#flagr#flagr/antenna,acquired 2006.229.19:36:56.02:preob 2006.229.19:36:57.14/onsource/TRACKING 2006.229.19:36:57.14:!2006.229.19:37:06 2006.229.19:37:06.02:"tape 2006.229.19:37:06.02:"st=record 2006.229.19:37:06.02:data_valid=on 2006.229.19:37:06.02:midob 2006.229.19:37:07.14/onsource/TRACKING 2006.229.19:37:07.14/wx/26.04,1001.5,100 2006.229.19:37:07.26/cable/+6.4199E-03 2006.229.19:37:08.35/va/01,08,usb,yes,29,31 2006.229.19:37:08.35/va/02,07,usb,yes,31,32 2006.229.19:37:08.35/va/03,06,usb,yes,39,41 2006.229.19:37:08.35/va/04,07,usb,yes,32,34 2006.229.19:37:08.35/va/05,04,usb,yes,29,29 2006.229.19:37:08.35/va/06,04,usb,yes,32,32 2006.229.19:37:08.35/va/07,05,usb,yes,29,29 2006.229.19:37:08.35/va/08,06,usb,yes,21,26 2006.229.19:37:08.58/valo/01,524.99,yes,locked 2006.229.19:37:08.58/valo/02,534.99,yes,locked 2006.229.19:37:08.58/valo/03,564.99,yes,locked 2006.229.19:37:08.58/valo/04,624.99,yes,locked 2006.229.19:37:08.58/valo/05,734.99,yes,locked 2006.229.19:37:08.58/valo/06,814.99,yes,locked 2006.229.19:37:08.58/valo/07,864.99,yes,locked 2006.229.19:37:08.58/valo/08,884.99,yes,locked 2006.229.19:37:09.67/vb/01,04,usb,yes,31,29 2006.229.19:37:09.67/vb/02,04,usb,yes,33,33 2006.229.19:37:09.67/vb/03,04,usb,yes,30,33 2006.229.19:37:09.67/vb/04,04,usb,yes,34,33 2006.229.19:37:09.67/vb/05,04,usb,yes,27,29 2006.229.19:37:09.67/vb/06,04,usb,yes,31,27 2006.229.19:37:09.67/vb/07,04,usb,yes,31,31 2006.229.19:37:09.67/vb/08,04,usb,yes,29,32 2006.229.19:37:09.91/vblo/01,629.99,yes,locked 2006.229.19:37:09.91/vblo/02,634.99,yes,locked 2006.229.19:37:09.91/vblo/03,649.99,yes,locked 2006.229.19:37:09.91/vblo/04,679.99,yes,locked 2006.229.19:37:09.91/vblo/05,709.99,yes,locked 2006.229.19:37:09.91/vblo/06,719.99,yes,locked 2006.229.19:37:09.91/vblo/07,734.99,yes,locked 2006.229.19:37:09.91/vblo/08,744.99,yes,locked 2006.229.19:37:10.06/vabw/8 2006.229.19:37:10.20/vbbw/8 2006.229.19:37:10.30/xfe/off,on,12.2 2006.229.19:37:10.68/ifatt/23,28,28,28 2006.229.19:37:11.08/fmout-gps/S +4.48E-07 2006.229.19:37:11.12:!2006.229.19:42:16 2006.229.19:42:16.00:data_valid=off 2006.229.19:42:16.00:"et 2006.229.19:42:16.00:!+3s 2006.229.19:42:19.01:"tape 2006.229.19:42:19.01:postob 2006.229.19:42:19.18/cable/+6.4194E-03 2006.229.19:42:19.18/wx/26.02,1001.5,100 2006.229.19:42:20.07/fmout-gps/S +4.48E-07 2006.229.19:42:20.07:scan_name=229-1946,jd0608,450 2006.229.19:42:20.07:source=0804+499,080839.67,495036.5,2000.0,cw 2006.229.19:42:21.14#flagr#flagr/antenna,new-source 2006.229.19:42:21.14:checkk5 2006.229.19:42:21.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:42:21.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:42:22.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:42:22.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:42:23.11/chk_obsdata//k5ts1/T2291937??a.dat file size is correct (nominal:1240MB, actual:1240MB). 2006.229.19:42:23.52/chk_obsdata//k5ts2/T2291937??b.dat file size is correct (nominal:1240MB, actual:1240MB). 2006.229.19:42:23.93/chk_obsdata//k5ts3/T2291937??c.dat file size is correct (nominal:1240MB, actual:1240MB). 2006.229.19:42:24.32/chk_obsdata//k5ts4/T2291937??d.dat file size is correct (nominal:1240MB, actual:1240MB). 2006.229.19:42:25.06/k5log//k5ts1_log_newline 2006.229.19:42:25.78/k5log//k5ts2_log_newline 2006.229.19:42:26.49/k5log//k5ts3_log_newline 2006.229.19:42:27.21/k5log//k5ts4_log_newline 2006.229.19:42:27.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:42:27.23:setupk4=1 2006.229.19:42:27.23$setupk4/echo=on 2006.229.19:42:27.23$setupk4/pcalon 2006.229.19:42:27.23$pcalon/"no phase cal control is implemented here 2006.229.19:42:27.23$setupk4/"tpicd=stop 2006.229.19:42:27.23$setupk4/"rec=synch_on 2006.229.19:42:27.23$setupk4/"rec_mode=128 2006.229.19:42:27.23$setupk4/!* 2006.229.19:42:27.23$setupk4/recpk4 2006.229.19:42:27.23$recpk4/recpatch= 2006.229.19:42:27.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:42:27.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:42:27.24$setupk4/vck44 2006.229.19:42:27.24$vck44/valo=1,524.99 2006.229.19:42:27.24#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.19:42:27.24#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.19:42:27.24#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:27.24#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:27.24#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:27.24#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:27.24#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:42:27.24#ibcon#first serial, iclass 31, count 0 2006.229.19:42:27.24#ibcon#enter sib2, iclass 31, count 0 2006.229.19:42:27.24#ibcon#flushed, iclass 31, count 0 2006.229.19:42:27.24#ibcon#about to write, iclass 31, count 0 2006.229.19:42:27.24#ibcon#wrote, iclass 31, count 0 2006.229.19:42:27.24#ibcon#about to read 3, iclass 31, count 0 2006.229.19:42:27.25#ibcon#read 3, iclass 31, count 0 2006.229.19:42:27.25#ibcon#about to read 4, iclass 31, count 0 2006.229.19:42:27.25#ibcon#read 4, iclass 31, count 0 2006.229.19:42:27.25#ibcon#about to read 5, iclass 31, count 0 2006.229.19:42:27.25#ibcon#read 5, iclass 31, count 0 2006.229.19:42:27.25#ibcon#about to read 6, iclass 31, count 0 2006.229.19:42:27.25#ibcon#read 6, iclass 31, count 0 2006.229.19:42:27.25#ibcon#end of sib2, iclass 31, count 0 2006.229.19:42:27.25#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:42:27.25#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:42:27.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:42:27.25#ibcon#*before write, iclass 31, count 0 2006.229.19:42:27.25#ibcon#enter sib2, iclass 31, count 0 2006.229.19:42:27.25#ibcon#flushed, iclass 31, count 0 2006.229.19:42:27.25#ibcon#about to write, iclass 31, count 0 2006.229.19:42:27.25#ibcon#wrote, iclass 31, count 0 2006.229.19:42:27.25#ibcon#about to read 3, iclass 31, count 0 2006.229.19:42:27.30#ibcon#read 3, iclass 31, count 0 2006.229.19:42:27.30#ibcon#about to read 4, iclass 31, count 0 2006.229.19:42:27.30#ibcon#read 4, iclass 31, count 0 2006.229.19:42:27.30#ibcon#about to read 5, iclass 31, count 0 2006.229.19:42:27.30#ibcon#read 5, iclass 31, count 0 2006.229.19:42:27.30#ibcon#about to read 6, iclass 31, count 0 2006.229.19:42:27.30#ibcon#read 6, iclass 31, count 0 2006.229.19:42:27.30#ibcon#end of sib2, iclass 31, count 0 2006.229.19:42:27.30#ibcon#*after write, iclass 31, count 0 2006.229.19:42:27.30#ibcon#*before return 0, iclass 31, count 0 2006.229.19:42:27.30#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:27.30#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:27.30#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:42:27.30#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:42:27.30$vck44/va=1,8 2006.229.19:42:27.30#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.19:42:27.30#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.19:42:27.30#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:27.30#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:27.30#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:27.30#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:27.30#ibcon#enter wrdev, iclass 33, count 2 2006.229.19:42:27.30#ibcon#first serial, iclass 33, count 2 2006.229.19:42:27.30#ibcon#enter sib2, iclass 33, count 2 2006.229.19:42:27.30#ibcon#flushed, iclass 33, count 2 2006.229.19:42:27.30#ibcon#about to write, iclass 33, count 2 2006.229.19:42:27.30#ibcon#wrote, iclass 33, count 2 2006.229.19:42:27.30#ibcon#about to read 3, iclass 33, count 2 2006.229.19:42:27.32#ibcon#read 3, iclass 33, count 2 2006.229.19:42:27.32#ibcon#about to read 4, iclass 33, count 2 2006.229.19:42:27.32#ibcon#read 4, iclass 33, count 2 2006.229.19:42:27.32#ibcon#about to read 5, iclass 33, count 2 2006.229.19:42:27.32#ibcon#read 5, iclass 33, count 2 2006.229.19:42:27.32#ibcon#about to read 6, iclass 33, count 2 2006.229.19:42:27.32#ibcon#read 6, iclass 33, count 2 2006.229.19:42:27.32#ibcon#end of sib2, iclass 33, count 2 2006.229.19:42:27.32#ibcon#*mode == 0, iclass 33, count 2 2006.229.19:42:27.32#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.19:42:27.32#ibcon#[25=AT01-08\r\n] 2006.229.19:42:27.32#ibcon#*before write, iclass 33, count 2 2006.229.19:42:27.32#ibcon#enter sib2, iclass 33, count 2 2006.229.19:42:27.32#ibcon#flushed, iclass 33, count 2 2006.229.19:42:27.32#ibcon#about to write, iclass 33, count 2 2006.229.19:42:27.32#ibcon#wrote, iclass 33, count 2 2006.229.19:42:27.32#ibcon#about to read 3, iclass 33, count 2 2006.229.19:42:27.35#ibcon#read 3, iclass 33, count 2 2006.229.19:42:27.35#ibcon#about to read 4, iclass 33, count 2 2006.229.19:42:27.35#ibcon#read 4, iclass 33, count 2 2006.229.19:42:27.35#ibcon#about to read 5, iclass 33, count 2 2006.229.19:42:27.35#ibcon#read 5, iclass 33, count 2 2006.229.19:42:27.35#ibcon#about to read 6, iclass 33, count 2 2006.229.19:42:27.35#ibcon#read 6, iclass 33, count 2 2006.229.19:42:27.35#ibcon#end of sib2, iclass 33, count 2 2006.229.19:42:27.35#ibcon#*after write, iclass 33, count 2 2006.229.19:42:27.35#ibcon#*before return 0, iclass 33, count 2 2006.229.19:42:27.35#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:27.35#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:27.35#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.19:42:27.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:27.35#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:27.47#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:27.47#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:27.47#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:42:27.47#ibcon#first serial, iclass 33, count 0 2006.229.19:42:27.47#ibcon#enter sib2, iclass 33, count 0 2006.229.19:42:27.47#ibcon#flushed, iclass 33, count 0 2006.229.19:42:27.47#ibcon#about to write, iclass 33, count 0 2006.229.19:42:27.47#ibcon#wrote, iclass 33, count 0 2006.229.19:42:27.47#ibcon#about to read 3, iclass 33, count 0 2006.229.19:42:27.49#ibcon#read 3, iclass 33, count 0 2006.229.19:42:27.49#ibcon#about to read 4, iclass 33, count 0 2006.229.19:42:27.49#ibcon#read 4, iclass 33, count 0 2006.229.19:42:27.49#ibcon#about to read 5, iclass 33, count 0 2006.229.19:42:27.49#ibcon#read 5, iclass 33, count 0 2006.229.19:42:27.49#ibcon#about to read 6, iclass 33, count 0 2006.229.19:42:27.49#ibcon#read 6, iclass 33, count 0 2006.229.19:42:27.49#ibcon#end of sib2, iclass 33, count 0 2006.229.19:42:27.49#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:42:27.49#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:42:27.49#ibcon#[25=USB\r\n] 2006.229.19:42:27.49#ibcon#*before write, iclass 33, count 0 2006.229.19:42:27.49#ibcon#enter sib2, iclass 33, count 0 2006.229.19:42:27.49#ibcon#flushed, iclass 33, count 0 2006.229.19:42:27.49#ibcon#about to write, iclass 33, count 0 2006.229.19:42:27.49#ibcon#wrote, iclass 33, count 0 2006.229.19:42:27.49#ibcon#about to read 3, iclass 33, count 0 2006.229.19:42:27.52#ibcon#read 3, iclass 33, count 0 2006.229.19:42:27.52#ibcon#about to read 4, iclass 33, count 0 2006.229.19:42:27.52#ibcon#read 4, iclass 33, count 0 2006.229.19:42:27.52#ibcon#about to read 5, iclass 33, count 0 2006.229.19:42:27.52#ibcon#read 5, iclass 33, count 0 2006.229.19:42:27.52#ibcon#about to read 6, iclass 33, count 0 2006.229.19:42:27.52#ibcon#read 6, iclass 33, count 0 2006.229.19:42:27.52#ibcon#end of sib2, iclass 33, count 0 2006.229.19:42:27.52#ibcon#*after write, iclass 33, count 0 2006.229.19:42:27.52#ibcon#*before return 0, iclass 33, count 0 2006.229.19:42:27.52#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:27.52#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:27.52#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:42:27.52#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:42:27.52$vck44/valo=2,534.99 2006.229.19:42:27.52#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.19:42:27.52#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.19:42:27.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:27.52#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:27.52#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:27.52#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:27.52#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:42:27.52#ibcon#first serial, iclass 35, count 0 2006.229.19:42:27.52#ibcon#enter sib2, iclass 35, count 0 2006.229.19:42:27.52#ibcon#flushed, iclass 35, count 0 2006.229.19:42:27.52#ibcon#about to write, iclass 35, count 0 2006.229.19:42:27.52#ibcon#wrote, iclass 35, count 0 2006.229.19:42:27.52#ibcon#about to read 3, iclass 35, count 0 2006.229.19:42:27.54#ibcon#read 3, iclass 35, count 0 2006.229.19:42:27.54#ibcon#about to read 4, iclass 35, count 0 2006.229.19:42:27.54#ibcon#read 4, iclass 35, count 0 2006.229.19:42:27.54#ibcon#about to read 5, iclass 35, count 0 2006.229.19:42:27.54#ibcon#read 5, iclass 35, count 0 2006.229.19:42:27.54#ibcon#about to read 6, iclass 35, count 0 2006.229.19:42:27.54#ibcon#read 6, iclass 35, count 0 2006.229.19:42:27.54#ibcon#end of sib2, iclass 35, count 0 2006.229.19:42:27.54#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:42:27.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:42:27.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:42:27.54#ibcon#*before write, iclass 35, count 0 2006.229.19:42:27.54#ibcon#enter sib2, iclass 35, count 0 2006.229.19:42:27.54#ibcon#flushed, iclass 35, count 0 2006.229.19:42:27.54#ibcon#about to write, iclass 35, count 0 2006.229.19:42:27.54#ibcon#wrote, iclass 35, count 0 2006.229.19:42:27.54#ibcon#about to read 3, iclass 35, count 0 2006.229.19:42:27.58#ibcon#read 3, iclass 35, count 0 2006.229.19:42:27.58#ibcon#about to read 4, iclass 35, count 0 2006.229.19:42:27.58#ibcon#read 4, iclass 35, count 0 2006.229.19:42:27.58#ibcon#about to read 5, iclass 35, count 0 2006.229.19:42:27.58#ibcon#read 5, iclass 35, count 0 2006.229.19:42:27.58#ibcon#about to read 6, iclass 35, count 0 2006.229.19:42:27.58#ibcon#read 6, iclass 35, count 0 2006.229.19:42:27.58#ibcon#end of sib2, iclass 35, count 0 2006.229.19:42:27.58#ibcon#*after write, iclass 35, count 0 2006.229.19:42:27.58#ibcon#*before return 0, iclass 35, count 0 2006.229.19:42:27.58#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:27.58#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:27.58#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:42:27.58#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:42:27.58$vck44/va=2,7 2006.229.19:42:27.58#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.19:42:27.58#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.19:42:27.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:27.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:27.64#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:27.64#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:27.64#ibcon#enter wrdev, iclass 37, count 2 2006.229.19:42:27.64#ibcon#first serial, iclass 37, count 2 2006.229.19:42:27.64#ibcon#enter sib2, iclass 37, count 2 2006.229.19:42:27.64#ibcon#flushed, iclass 37, count 2 2006.229.19:42:27.64#ibcon#about to write, iclass 37, count 2 2006.229.19:42:27.64#ibcon#wrote, iclass 37, count 2 2006.229.19:42:27.64#ibcon#about to read 3, iclass 37, count 2 2006.229.19:42:27.66#ibcon#read 3, iclass 37, count 2 2006.229.19:42:27.66#ibcon#about to read 4, iclass 37, count 2 2006.229.19:42:27.66#ibcon#read 4, iclass 37, count 2 2006.229.19:42:27.66#ibcon#about to read 5, iclass 37, count 2 2006.229.19:42:27.66#ibcon#read 5, iclass 37, count 2 2006.229.19:42:27.66#ibcon#about to read 6, iclass 37, count 2 2006.229.19:42:27.66#ibcon#read 6, iclass 37, count 2 2006.229.19:42:27.66#ibcon#end of sib2, iclass 37, count 2 2006.229.19:42:27.66#ibcon#*mode == 0, iclass 37, count 2 2006.229.19:42:27.66#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.19:42:27.66#ibcon#[25=AT02-07\r\n] 2006.229.19:42:27.66#ibcon#*before write, iclass 37, count 2 2006.229.19:42:27.66#ibcon#enter sib2, iclass 37, count 2 2006.229.19:42:27.66#ibcon#flushed, iclass 37, count 2 2006.229.19:42:27.66#ibcon#about to write, iclass 37, count 2 2006.229.19:42:27.66#ibcon#wrote, iclass 37, count 2 2006.229.19:42:27.66#ibcon#about to read 3, iclass 37, count 2 2006.229.19:42:27.69#ibcon#read 3, iclass 37, count 2 2006.229.19:42:27.69#ibcon#about to read 4, iclass 37, count 2 2006.229.19:42:27.69#ibcon#read 4, iclass 37, count 2 2006.229.19:42:27.69#ibcon#about to read 5, iclass 37, count 2 2006.229.19:42:27.69#ibcon#read 5, iclass 37, count 2 2006.229.19:42:27.69#ibcon#about to read 6, iclass 37, count 2 2006.229.19:42:27.69#ibcon#read 6, iclass 37, count 2 2006.229.19:42:27.69#ibcon#end of sib2, iclass 37, count 2 2006.229.19:42:27.69#ibcon#*after write, iclass 37, count 2 2006.229.19:42:27.69#ibcon#*before return 0, iclass 37, count 2 2006.229.19:42:27.69#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:27.69#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:27.69#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.19:42:27.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:27.69#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:27.81#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:27.81#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:27.81#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:42:27.81#ibcon#first serial, iclass 37, count 0 2006.229.19:42:27.81#ibcon#enter sib2, iclass 37, count 0 2006.229.19:42:27.81#ibcon#flushed, iclass 37, count 0 2006.229.19:42:27.81#ibcon#about to write, iclass 37, count 0 2006.229.19:42:27.81#ibcon#wrote, iclass 37, count 0 2006.229.19:42:27.81#ibcon#about to read 3, iclass 37, count 0 2006.229.19:42:27.83#ibcon#read 3, iclass 37, count 0 2006.229.19:42:27.83#ibcon#about to read 4, iclass 37, count 0 2006.229.19:42:27.83#ibcon#read 4, iclass 37, count 0 2006.229.19:42:27.83#ibcon#about to read 5, iclass 37, count 0 2006.229.19:42:27.83#ibcon#read 5, iclass 37, count 0 2006.229.19:42:27.83#ibcon#about to read 6, iclass 37, count 0 2006.229.19:42:27.83#ibcon#read 6, iclass 37, count 0 2006.229.19:42:27.83#ibcon#end of sib2, iclass 37, count 0 2006.229.19:42:27.83#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:42:27.83#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:42:27.83#ibcon#[25=USB\r\n] 2006.229.19:42:27.83#ibcon#*before write, iclass 37, count 0 2006.229.19:42:27.83#ibcon#enter sib2, iclass 37, count 0 2006.229.19:42:27.83#ibcon#flushed, iclass 37, count 0 2006.229.19:42:27.83#ibcon#about to write, iclass 37, count 0 2006.229.19:42:27.83#ibcon#wrote, iclass 37, count 0 2006.229.19:42:27.83#ibcon#about to read 3, iclass 37, count 0 2006.229.19:42:27.86#ibcon#read 3, iclass 37, count 0 2006.229.19:42:27.86#ibcon#about to read 4, iclass 37, count 0 2006.229.19:42:27.86#ibcon#read 4, iclass 37, count 0 2006.229.19:42:27.86#ibcon#about to read 5, iclass 37, count 0 2006.229.19:42:27.86#ibcon#read 5, iclass 37, count 0 2006.229.19:42:27.86#ibcon#about to read 6, iclass 37, count 0 2006.229.19:42:27.86#ibcon#read 6, iclass 37, count 0 2006.229.19:42:27.86#ibcon#end of sib2, iclass 37, count 0 2006.229.19:42:27.86#ibcon#*after write, iclass 37, count 0 2006.229.19:42:27.86#ibcon#*before return 0, iclass 37, count 0 2006.229.19:42:27.86#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:27.86#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:27.86#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:42:27.86#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:42:27.86$vck44/valo=3,564.99 2006.229.19:42:27.86#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.19:42:27.86#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.19:42:27.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:27.86#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:27.86#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:27.86#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:27.86#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:42:27.86#ibcon#first serial, iclass 39, count 0 2006.229.19:42:27.86#ibcon#enter sib2, iclass 39, count 0 2006.229.19:42:27.86#ibcon#flushed, iclass 39, count 0 2006.229.19:42:27.86#ibcon#about to write, iclass 39, count 0 2006.229.19:42:27.86#ibcon#wrote, iclass 39, count 0 2006.229.19:42:27.86#ibcon#about to read 3, iclass 39, count 0 2006.229.19:42:27.88#ibcon#read 3, iclass 39, count 0 2006.229.19:42:27.88#ibcon#about to read 4, iclass 39, count 0 2006.229.19:42:27.88#ibcon#read 4, iclass 39, count 0 2006.229.19:42:27.88#ibcon#about to read 5, iclass 39, count 0 2006.229.19:42:27.88#ibcon#read 5, iclass 39, count 0 2006.229.19:42:27.88#ibcon#about to read 6, iclass 39, count 0 2006.229.19:42:27.88#ibcon#read 6, iclass 39, count 0 2006.229.19:42:27.88#ibcon#end of sib2, iclass 39, count 0 2006.229.19:42:27.88#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:42:27.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:42:27.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:42:27.88#ibcon#*before write, iclass 39, count 0 2006.229.19:42:27.88#ibcon#enter sib2, iclass 39, count 0 2006.229.19:42:27.88#ibcon#flushed, iclass 39, count 0 2006.229.19:42:27.88#ibcon#about to write, iclass 39, count 0 2006.229.19:42:27.88#ibcon#wrote, iclass 39, count 0 2006.229.19:42:27.88#ibcon#about to read 3, iclass 39, count 0 2006.229.19:42:27.92#ibcon#read 3, iclass 39, count 0 2006.229.19:42:27.92#ibcon#about to read 4, iclass 39, count 0 2006.229.19:42:27.92#ibcon#read 4, iclass 39, count 0 2006.229.19:42:27.92#ibcon#about to read 5, iclass 39, count 0 2006.229.19:42:27.92#ibcon#read 5, iclass 39, count 0 2006.229.19:42:27.92#ibcon#about to read 6, iclass 39, count 0 2006.229.19:42:27.92#ibcon#read 6, iclass 39, count 0 2006.229.19:42:27.92#ibcon#end of sib2, iclass 39, count 0 2006.229.19:42:27.92#ibcon#*after write, iclass 39, count 0 2006.229.19:42:27.92#ibcon#*before return 0, iclass 39, count 0 2006.229.19:42:27.92#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:27.92#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:27.92#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:42:27.92#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:42:27.92$vck44/va=3,6 2006.229.19:42:27.92#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.19:42:27.92#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.19:42:27.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:27.92#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:27.98#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:27.98#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:27.98#ibcon#enter wrdev, iclass 3, count 2 2006.229.19:42:27.98#ibcon#first serial, iclass 3, count 2 2006.229.19:42:27.98#ibcon#enter sib2, iclass 3, count 2 2006.229.19:42:27.98#ibcon#flushed, iclass 3, count 2 2006.229.19:42:27.98#ibcon#about to write, iclass 3, count 2 2006.229.19:42:27.98#ibcon#wrote, iclass 3, count 2 2006.229.19:42:27.98#ibcon#about to read 3, iclass 3, count 2 2006.229.19:42:28.00#ibcon#read 3, iclass 3, count 2 2006.229.19:42:28.00#ibcon#about to read 4, iclass 3, count 2 2006.229.19:42:28.00#ibcon#read 4, iclass 3, count 2 2006.229.19:42:28.00#ibcon#about to read 5, iclass 3, count 2 2006.229.19:42:28.00#ibcon#read 5, iclass 3, count 2 2006.229.19:42:28.00#ibcon#about to read 6, iclass 3, count 2 2006.229.19:42:28.00#ibcon#read 6, iclass 3, count 2 2006.229.19:42:28.00#ibcon#end of sib2, iclass 3, count 2 2006.229.19:42:28.00#ibcon#*mode == 0, iclass 3, count 2 2006.229.19:42:28.00#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.19:42:28.00#ibcon#[25=AT03-06\r\n] 2006.229.19:42:28.00#ibcon#*before write, iclass 3, count 2 2006.229.19:42:28.00#ibcon#enter sib2, iclass 3, count 2 2006.229.19:42:28.00#ibcon#flushed, iclass 3, count 2 2006.229.19:42:28.00#ibcon#about to write, iclass 3, count 2 2006.229.19:42:28.00#ibcon#wrote, iclass 3, count 2 2006.229.19:42:28.00#ibcon#about to read 3, iclass 3, count 2 2006.229.19:42:28.03#ibcon#read 3, iclass 3, count 2 2006.229.19:42:28.03#ibcon#about to read 4, iclass 3, count 2 2006.229.19:42:28.03#ibcon#read 4, iclass 3, count 2 2006.229.19:42:28.03#ibcon#about to read 5, iclass 3, count 2 2006.229.19:42:28.03#ibcon#read 5, iclass 3, count 2 2006.229.19:42:28.03#ibcon#about to read 6, iclass 3, count 2 2006.229.19:42:28.03#ibcon#read 6, iclass 3, count 2 2006.229.19:42:28.03#ibcon#end of sib2, iclass 3, count 2 2006.229.19:42:28.03#ibcon#*after write, iclass 3, count 2 2006.229.19:42:28.03#ibcon#*before return 0, iclass 3, count 2 2006.229.19:42:28.03#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:28.03#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:28.03#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.19:42:28.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:28.03#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:28.15#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:28.15#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:28.15#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:42:28.15#ibcon#first serial, iclass 3, count 0 2006.229.19:42:28.15#ibcon#enter sib2, iclass 3, count 0 2006.229.19:42:28.15#ibcon#flushed, iclass 3, count 0 2006.229.19:42:28.15#ibcon#about to write, iclass 3, count 0 2006.229.19:42:28.15#ibcon#wrote, iclass 3, count 0 2006.229.19:42:28.15#ibcon#about to read 3, iclass 3, count 0 2006.229.19:42:28.17#ibcon#read 3, iclass 3, count 0 2006.229.19:42:28.17#ibcon#about to read 4, iclass 3, count 0 2006.229.19:42:28.17#ibcon#read 4, iclass 3, count 0 2006.229.19:42:28.17#ibcon#about to read 5, iclass 3, count 0 2006.229.19:42:28.17#ibcon#read 5, iclass 3, count 0 2006.229.19:42:28.17#ibcon#about to read 6, iclass 3, count 0 2006.229.19:42:28.17#ibcon#read 6, iclass 3, count 0 2006.229.19:42:28.17#ibcon#end of sib2, iclass 3, count 0 2006.229.19:42:28.17#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:42:28.17#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:42:28.17#ibcon#[25=USB\r\n] 2006.229.19:42:28.17#ibcon#*before write, iclass 3, count 0 2006.229.19:42:28.17#ibcon#enter sib2, iclass 3, count 0 2006.229.19:42:28.17#ibcon#flushed, iclass 3, count 0 2006.229.19:42:28.17#ibcon#about to write, iclass 3, count 0 2006.229.19:42:28.17#ibcon#wrote, iclass 3, count 0 2006.229.19:42:28.17#ibcon#about to read 3, iclass 3, count 0 2006.229.19:42:28.20#ibcon#read 3, iclass 3, count 0 2006.229.19:42:28.20#ibcon#about to read 4, iclass 3, count 0 2006.229.19:42:28.20#ibcon#read 4, iclass 3, count 0 2006.229.19:42:28.20#ibcon#about to read 5, iclass 3, count 0 2006.229.19:42:28.20#ibcon#read 5, iclass 3, count 0 2006.229.19:42:28.20#ibcon#about to read 6, iclass 3, count 0 2006.229.19:42:28.20#ibcon#read 6, iclass 3, count 0 2006.229.19:42:28.20#ibcon#end of sib2, iclass 3, count 0 2006.229.19:42:28.20#ibcon#*after write, iclass 3, count 0 2006.229.19:42:28.20#ibcon#*before return 0, iclass 3, count 0 2006.229.19:42:28.20#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:28.20#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:28.20#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:42:28.20#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:42:28.20$vck44/valo=4,624.99 2006.229.19:42:28.20#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:42:28.20#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:42:28.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:28.20#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:28.20#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:28.20#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:28.20#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:42:28.20#ibcon#first serial, iclass 5, count 0 2006.229.19:42:28.20#ibcon#enter sib2, iclass 5, count 0 2006.229.19:42:28.20#ibcon#flushed, iclass 5, count 0 2006.229.19:42:28.20#ibcon#about to write, iclass 5, count 0 2006.229.19:42:28.20#ibcon#wrote, iclass 5, count 0 2006.229.19:42:28.20#ibcon#about to read 3, iclass 5, count 0 2006.229.19:42:28.22#ibcon#read 3, iclass 5, count 0 2006.229.19:42:28.22#ibcon#about to read 4, iclass 5, count 0 2006.229.19:42:28.22#ibcon#read 4, iclass 5, count 0 2006.229.19:42:28.22#ibcon#about to read 5, iclass 5, count 0 2006.229.19:42:28.22#ibcon#read 5, iclass 5, count 0 2006.229.19:42:28.22#ibcon#about to read 6, iclass 5, count 0 2006.229.19:42:28.22#ibcon#read 6, iclass 5, count 0 2006.229.19:42:28.22#ibcon#end of sib2, iclass 5, count 0 2006.229.19:42:28.22#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:42:28.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:42:28.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:42:28.22#ibcon#*before write, iclass 5, count 0 2006.229.19:42:28.22#ibcon#enter sib2, iclass 5, count 0 2006.229.19:42:28.22#ibcon#flushed, iclass 5, count 0 2006.229.19:42:28.22#ibcon#about to write, iclass 5, count 0 2006.229.19:42:28.22#ibcon#wrote, iclass 5, count 0 2006.229.19:42:28.22#ibcon#about to read 3, iclass 5, count 0 2006.229.19:42:28.26#ibcon#read 3, iclass 5, count 0 2006.229.19:42:28.26#ibcon#about to read 4, iclass 5, count 0 2006.229.19:42:28.26#ibcon#read 4, iclass 5, count 0 2006.229.19:42:28.26#ibcon#about to read 5, iclass 5, count 0 2006.229.19:42:28.26#ibcon#read 5, iclass 5, count 0 2006.229.19:42:28.26#ibcon#about to read 6, iclass 5, count 0 2006.229.19:42:28.26#ibcon#read 6, iclass 5, count 0 2006.229.19:42:28.26#ibcon#end of sib2, iclass 5, count 0 2006.229.19:42:28.26#ibcon#*after write, iclass 5, count 0 2006.229.19:42:28.26#ibcon#*before return 0, iclass 5, count 0 2006.229.19:42:28.26#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:28.26#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:28.26#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:42:28.26#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:42:28.26$vck44/va=4,7 2006.229.19:42:28.26#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:42:28.26#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:42:28.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:28.26#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:28.32#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:28.32#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:28.32#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:42:28.32#ibcon#first serial, iclass 7, count 2 2006.229.19:42:28.32#ibcon#enter sib2, iclass 7, count 2 2006.229.19:42:28.32#ibcon#flushed, iclass 7, count 2 2006.229.19:42:28.32#ibcon#about to write, iclass 7, count 2 2006.229.19:42:28.32#ibcon#wrote, iclass 7, count 2 2006.229.19:42:28.32#ibcon#about to read 3, iclass 7, count 2 2006.229.19:42:28.34#ibcon#read 3, iclass 7, count 2 2006.229.19:42:28.34#ibcon#about to read 4, iclass 7, count 2 2006.229.19:42:28.34#ibcon#read 4, iclass 7, count 2 2006.229.19:42:28.34#ibcon#about to read 5, iclass 7, count 2 2006.229.19:42:28.34#ibcon#read 5, iclass 7, count 2 2006.229.19:42:28.34#ibcon#about to read 6, iclass 7, count 2 2006.229.19:42:28.34#ibcon#read 6, iclass 7, count 2 2006.229.19:42:28.34#ibcon#end of sib2, iclass 7, count 2 2006.229.19:42:28.34#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:42:28.34#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:42:28.34#ibcon#[25=AT04-07\r\n] 2006.229.19:42:28.34#ibcon#*before write, iclass 7, count 2 2006.229.19:42:28.34#ibcon#enter sib2, iclass 7, count 2 2006.229.19:42:28.34#ibcon#flushed, iclass 7, count 2 2006.229.19:42:28.34#ibcon#about to write, iclass 7, count 2 2006.229.19:42:28.34#ibcon#wrote, iclass 7, count 2 2006.229.19:42:28.34#ibcon#about to read 3, iclass 7, count 2 2006.229.19:42:28.37#ibcon#read 3, iclass 7, count 2 2006.229.19:42:28.37#ibcon#about to read 4, iclass 7, count 2 2006.229.19:42:28.37#ibcon#read 4, iclass 7, count 2 2006.229.19:42:28.37#ibcon#about to read 5, iclass 7, count 2 2006.229.19:42:28.37#ibcon#read 5, iclass 7, count 2 2006.229.19:42:28.37#ibcon#about to read 6, iclass 7, count 2 2006.229.19:42:28.37#ibcon#read 6, iclass 7, count 2 2006.229.19:42:28.37#ibcon#end of sib2, iclass 7, count 2 2006.229.19:42:28.37#ibcon#*after write, iclass 7, count 2 2006.229.19:42:28.37#ibcon#*before return 0, iclass 7, count 2 2006.229.19:42:28.37#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:28.37#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:28.37#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:42:28.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:28.37#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:28.49#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:28.49#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:28.49#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:42:28.49#ibcon#first serial, iclass 7, count 0 2006.229.19:42:28.49#ibcon#enter sib2, iclass 7, count 0 2006.229.19:42:28.49#ibcon#flushed, iclass 7, count 0 2006.229.19:42:28.49#ibcon#about to write, iclass 7, count 0 2006.229.19:42:28.49#ibcon#wrote, iclass 7, count 0 2006.229.19:42:28.49#ibcon#about to read 3, iclass 7, count 0 2006.229.19:42:28.51#ibcon#read 3, iclass 7, count 0 2006.229.19:42:28.51#ibcon#about to read 4, iclass 7, count 0 2006.229.19:42:28.51#ibcon#read 4, iclass 7, count 0 2006.229.19:42:28.51#ibcon#about to read 5, iclass 7, count 0 2006.229.19:42:28.51#ibcon#read 5, iclass 7, count 0 2006.229.19:42:28.51#ibcon#about to read 6, iclass 7, count 0 2006.229.19:42:28.51#ibcon#read 6, iclass 7, count 0 2006.229.19:42:28.51#ibcon#end of sib2, iclass 7, count 0 2006.229.19:42:28.51#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:42:28.51#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:42:28.51#ibcon#[25=USB\r\n] 2006.229.19:42:28.51#ibcon#*before write, iclass 7, count 0 2006.229.19:42:28.51#ibcon#enter sib2, iclass 7, count 0 2006.229.19:42:28.51#ibcon#flushed, iclass 7, count 0 2006.229.19:42:28.51#ibcon#about to write, iclass 7, count 0 2006.229.19:42:28.51#ibcon#wrote, iclass 7, count 0 2006.229.19:42:28.51#ibcon#about to read 3, iclass 7, count 0 2006.229.19:42:28.54#ibcon#read 3, iclass 7, count 0 2006.229.19:42:28.54#ibcon#about to read 4, iclass 7, count 0 2006.229.19:42:28.54#ibcon#read 4, iclass 7, count 0 2006.229.19:42:28.54#ibcon#about to read 5, iclass 7, count 0 2006.229.19:42:28.54#ibcon#read 5, iclass 7, count 0 2006.229.19:42:28.54#ibcon#about to read 6, iclass 7, count 0 2006.229.19:42:28.54#ibcon#read 6, iclass 7, count 0 2006.229.19:42:28.54#ibcon#end of sib2, iclass 7, count 0 2006.229.19:42:28.54#ibcon#*after write, iclass 7, count 0 2006.229.19:42:28.54#ibcon#*before return 0, iclass 7, count 0 2006.229.19:42:28.54#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:28.54#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:28.54#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:42:28.54#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:42:28.54$vck44/valo=5,734.99 2006.229.19:42:28.54#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:42:28.54#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:42:28.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:28.54#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:28.54#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:28.54#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:28.54#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:42:28.54#ibcon#first serial, iclass 11, count 0 2006.229.19:42:28.54#ibcon#enter sib2, iclass 11, count 0 2006.229.19:42:28.54#ibcon#flushed, iclass 11, count 0 2006.229.19:42:28.54#ibcon#about to write, iclass 11, count 0 2006.229.19:42:28.54#ibcon#wrote, iclass 11, count 0 2006.229.19:42:28.54#ibcon#about to read 3, iclass 11, count 0 2006.229.19:42:28.56#ibcon#read 3, iclass 11, count 0 2006.229.19:42:28.56#ibcon#about to read 4, iclass 11, count 0 2006.229.19:42:28.56#ibcon#read 4, iclass 11, count 0 2006.229.19:42:28.56#ibcon#about to read 5, iclass 11, count 0 2006.229.19:42:28.56#ibcon#read 5, iclass 11, count 0 2006.229.19:42:28.56#ibcon#about to read 6, iclass 11, count 0 2006.229.19:42:28.56#ibcon#read 6, iclass 11, count 0 2006.229.19:42:28.56#ibcon#end of sib2, iclass 11, count 0 2006.229.19:42:28.56#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:42:28.56#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:42:28.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:42:28.56#ibcon#*before write, iclass 11, count 0 2006.229.19:42:28.56#ibcon#enter sib2, iclass 11, count 0 2006.229.19:42:28.56#ibcon#flushed, iclass 11, count 0 2006.229.19:42:28.56#ibcon#about to write, iclass 11, count 0 2006.229.19:42:28.56#ibcon#wrote, iclass 11, count 0 2006.229.19:42:28.56#ibcon#about to read 3, iclass 11, count 0 2006.229.19:42:28.60#ibcon#read 3, iclass 11, count 0 2006.229.19:42:28.60#ibcon#about to read 4, iclass 11, count 0 2006.229.19:42:28.60#ibcon#read 4, iclass 11, count 0 2006.229.19:42:28.60#ibcon#about to read 5, iclass 11, count 0 2006.229.19:42:28.60#ibcon#read 5, iclass 11, count 0 2006.229.19:42:28.60#ibcon#about to read 6, iclass 11, count 0 2006.229.19:42:28.60#ibcon#read 6, iclass 11, count 0 2006.229.19:42:28.60#ibcon#end of sib2, iclass 11, count 0 2006.229.19:42:28.60#ibcon#*after write, iclass 11, count 0 2006.229.19:42:28.60#ibcon#*before return 0, iclass 11, count 0 2006.229.19:42:28.60#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:28.60#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:28.60#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:42:28.60#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:42:28.60$vck44/va=5,4 2006.229.19:42:28.60#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.19:42:28.60#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.19:42:28.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:28.60#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:28.66#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:28.66#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:28.66#ibcon#enter wrdev, iclass 13, count 2 2006.229.19:42:28.66#ibcon#first serial, iclass 13, count 2 2006.229.19:42:28.66#ibcon#enter sib2, iclass 13, count 2 2006.229.19:42:28.66#ibcon#flushed, iclass 13, count 2 2006.229.19:42:28.66#ibcon#about to write, iclass 13, count 2 2006.229.19:42:28.66#ibcon#wrote, iclass 13, count 2 2006.229.19:42:28.66#ibcon#about to read 3, iclass 13, count 2 2006.229.19:42:28.68#ibcon#read 3, iclass 13, count 2 2006.229.19:42:28.68#ibcon#about to read 4, iclass 13, count 2 2006.229.19:42:28.68#ibcon#read 4, iclass 13, count 2 2006.229.19:42:28.68#ibcon#about to read 5, iclass 13, count 2 2006.229.19:42:28.68#ibcon#read 5, iclass 13, count 2 2006.229.19:42:28.68#ibcon#about to read 6, iclass 13, count 2 2006.229.19:42:28.68#ibcon#read 6, iclass 13, count 2 2006.229.19:42:28.68#ibcon#end of sib2, iclass 13, count 2 2006.229.19:42:28.68#ibcon#*mode == 0, iclass 13, count 2 2006.229.19:42:28.68#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.19:42:28.68#ibcon#[25=AT05-04\r\n] 2006.229.19:42:28.68#ibcon#*before write, iclass 13, count 2 2006.229.19:42:28.68#ibcon#enter sib2, iclass 13, count 2 2006.229.19:42:28.68#ibcon#flushed, iclass 13, count 2 2006.229.19:42:28.68#ibcon#about to write, iclass 13, count 2 2006.229.19:42:28.68#ibcon#wrote, iclass 13, count 2 2006.229.19:42:28.68#ibcon#about to read 3, iclass 13, count 2 2006.229.19:42:28.71#ibcon#read 3, iclass 13, count 2 2006.229.19:42:28.71#ibcon#about to read 4, iclass 13, count 2 2006.229.19:42:28.71#ibcon#read 4, iclass 13, count 2 2006.229.19:42:28.71#ibcon#about to read 5, iclass 13, count 2 2006.229.19:42:28.71#ibcon#read 5, iclass 13, count 2 2006.229.19:42:28.71#ibcon#about to read 6, iclass 13, count 2 2006.229.19:42:28.71#ibcon#read 6, iclass 13, count 2 2006.229.19:42:28.71#ibcon#end of sib2, iclass 13, count 2 2006.229.19:42:28.71#ibcon#*after write, iclass 13, count 2 2006.229.19:42:28.71#ibcon#*before return 0, iclass 13, count 2 2006.229.19:42:28.71#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:28.71#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:28.71#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.19:42:28.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:28.71#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:28.83#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:28.83#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:28.83#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:42:28.83#ibcon#first serial, iclass 13, count 0 2006.229.19:42:28.83#ibcon#enter sib2, iclass 13, count 0 2006.229.19:42:28.83#ibcon#flushed, iclass 13, count 0 2006.229.19:42:28.83#ibcon#about to write, iclass 13, count 0 2006.229.19:42:28.83#ibcon#wrote, iclass 13, count 0 2006.229.19:42:28.83#ibcon#about to read 3, iclass 13, count 0 2006.229.19:42:28.85#ibcon#read 3, iclass 13, count 0 2006.229.19:42:28.85#ibcon#about to read 4, iclass 13, count 0 2006.229.19:42:28.85#ibcon#read 4, iclass 13, count 0 2006.229.19:42:28.85#ibcon#about to read 5, iclass 13, count 0 2006.229.19:42:28.85#ibcon#read 5, iclass 13, count 0 2006.229.19:42:28.85#ibcon#about to read 6, iclass 13, count 0 2006.229.19:42:28.85#ibcon#read 6, iclass 13, count 0 2006.229.19:42:28.85#ibcon#end of sib2, iclass 13, count 0 2006.229.19:42:28.85#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:42:28.85#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:42:28.85#ibcon#[25=USB\r\n] 2006.229.19:42:28.85#ibcon#*before write, iclass 13, count 0 2006.229.19:42:28.85#ibcon#enter sib2, iclass 13, count 0 2006.229.19:42:28.85#ibcon#flushed, iclass 13, count 0 2006.229.19:42:28.85#ibcon#about to write, iclass 13, count 0 2006.229.19:42:28.85#ibcon#wrote, iclass 13, count 0 2006.229.19:42:28.85#ibcon#about to read 3, iclass 13, count 0 2006.229.19:42:28.88#ibcon#read 3, iclass 13, count 0 2006.229.19:42:28.88#ibcon#about to read 4, iclass 13, count 0 2006.229.19:42:28.88#ibcon#read 4, iclass 13, count 0 2006.229.19:42:28.88#ibcon#about to read 5, iclass 13, count 0 2006.229.19:42:28.88#ibcon#read 5, iclass 13, count 0 2006.229.19:42:28.88#ibcon#about to read 6, iclass 13, count 0 2006.229.19:42:28.88#ibcon#read 6, iclass 13, count 0 2006.229.19:42:28.88#ibcon#end of sib2, iclass 13, count 0 2006.229.19:42:28.88#ibcon#*after write, iclass 13, count 0 2006.229.19:42:28.88#ibcon#*before return 0, iclass 13, count 0 2006.229.19:42:28.88#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:28.88#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:28.88#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:42:28.88#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:42:28.88$vck44/valo=6,814.99 2006.229.19:42:28.88#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.19:42:28.88#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.19:42:28.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:28.88#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:28.88#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:28.88#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:28.88#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:42:28.88#ibcon#first serial, iclass 15, count 0 2006.229.19:42:28.88#ibcon#enter sib2, iclass 15, count 0 2006.229.19:42:28.88#ibcon#flushed, iclass 15, count 0 2006.229.19:42:28.88#ibcon#about to write, iclass 15, count 0 2006.229.19:42:28.88#ibcon#wrote, iclass 15, count 0 2006.229.19:42:28.88#ibcon#about to read 3, iclass 15, count 0 2006.229.19:42:28.90#ibcon#read 3, iclass 15, count 0 2006.229.19:42:28.90#ibcon#about to read 4, iclass 15, count 0 2006.229.19:42:28.90#ibcon#read 4, iclass 15, count 0 2006.229.19:42:28.90#ibcon#about to read 5, iclass 15, count 0 2006.229.19:42:28.90#ibcon#read 5, iclass 15, count 0 2006.229.19:42:28.90#ibcon#about to read 6, iclass 15, count 0 2006.229.19:42:28.90#ibcon#read 6, iclass 15, count 0 2006.229.19:42:28.90#ibcon#end of sib2, iclass 15, count 0 2006.229.19:42:28.90#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:42:28.90#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:42:28.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:42:28.90#ibcon#*before write, iclass 15, count 0 2006.229.19:42:28.90#ibcon#enter sib2, iclass 15, count 0 2006.229.19:42:28.90#ibcon#flushed, iclass 15, count 0 2006.229.19:42:28.90#ibcon#about to write, iclass 15, count 0 2006.229.19:42:28.90#ibcon#wrote, iclass 15, count 0 2006.229.19:42:28.90#ibcon#about to read 3, iclass 15, count 0 2006.229.19:42:28.94#ibcon#read 3, iclass 15, count 0 2006.229.19:42:28.94#ibcon#about to read 4, iclass 15, count 0 2006.229.19:42:28.94#ibcon#read 4, iclass 15, count 0 2006.229.19:42:28.94#ibcon#about to read 5, iclass 15, count 0 2006.229.19:42:28.94#ibcon#read 5, iclass 15, count 0 2006.229.19:42:28.94#ibcon#about to read 6, iclass 15, count 0 2006.229.19:42:28.94#ibcon#read 6, iclass 15, count 0 2006.229.19:42:28.94#ibcon#end of sib2, iclass 15, count 0 2006.229.19:42:28.94#ibcon#*after write, iclass 15, count 0 2006.229.19:42:28.94#ibcon#*before return 0, iclass 15, count 0 2006.229.19:42:28.94#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:28.94#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:28.94#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:42:28.94#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:42:28.94$vck44/va=6,4 2006.229.19:42:28.94#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.19:42:28.94#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.19:42:28.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:28.94#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:29.00#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:29.00#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:29.00#ibcon#enter wrdev, iclass 17, count 2 2006.229.19:42:29.00#ibcon#first serial, iclass 17, count 2 2006.229.19:42:29.00#ibcon#enter sib2, iclass 17, count 2 2006.229.19:42:29.00#ibcon#flushed, iclass 17, count 2 2006.229.19:42:29.00#ibcon#about to write, iclass 17, count 2 2006.229.19:42:29.00#ibcon#wrote, iclass 17, count 2 2006.229.19:42:29.00#ibcon#about to read 3, iclass 17, count 2 2006.229.19:42:29.02#ibcon#read 3, iclass 17, count 2 2006.229.19:42:29.02#ibcon#about to read 4, iclass 17, count 2 2006.229.19:42:29.02#ibcon#read 4, iclass 17, count 2 2006.229.19:42:29.02#ibcon#about to read 5, iclass 17, count 2 2006.229.19:42:29.02#ibcon#read 5, iclass 17, count 2 2006.229.19:42:29.02#ibcon#about to read 6, iclass 17, count 2 2006.229.19:42:29.02#ibcon#read 6, iclass 17, count 2 2006.229.19:42:29.02#ibcon#end of sib2, iclass 17, count 2 2006.229.19:42:29.02#ibcon#*mode == 0, iclass 17, count 2 2006.229.19:42:29.02#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.19:42:29.02#ibcon#[25=AT06-04\r\n] 2006.229.19:42:29.02#ibcon#*before write, iclass 17, count 2 2006.229.19:42:29.02#ibcon#enter sib2, iclass 17, count 2 2006.229.19:42:29.02#ibcon#flushed, iclass 17, count 2 2006.229.19:42:29.02#ibcon#about to write, iclass 17, count 2 2006.229.19:42:29.02#ibcon#wrote, iclass 17, count 2 2006.229.19:42:29.02#ibcon#about to read 3, iclass 17, count 2 2006.229.19:42:29.05#ibcon#read 3, iclass 17, count 2 2006.229.19:42:29.05#ibcon#about to read 4, iclass 17, count 2 2006.229.19:42:29.05#ibcon#read 4, iclass 17, count 2 2006.229.19:42:29.05#ibcon#about to read 5, iclass 17, count 2 2006.229.19:42:29.05#ibcon#read 5, iclass 17, count 2 2006.229.19:42:29.05#ibcon#about to read 6, iclass 17, count 2 2006.229.19:42:29.05#ibcon#read 6, iclass 17, count 2 2006.229.19:42:29.05#ibcon#end of sib2, iclass 17, count 2 2006.229.19:42:29.05#ibcon#*after write, iclass 17, count 2 2006.229.19:42:29.05#ibcon#*before return 0, iclass 17, count 2 2006.229.19:42:29.05#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:29.05#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:29.05#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.19:42:29.05#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:29.05#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:29.17#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:29.17#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:29.17#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:42:29.17#ibcon#first serial, iclass 17, count 0 2006.229.19:42:29.17#ibcon#enter sib2, iclass 17, count 0 2006.229.19:42:29.17#ibcon#flushed, iclass 17, count 0 2006.229.19:42:29.17#ibcon#about to write, iclass 17, count 0 2006.229.19:42:29.17#ibcon#wrote, iclass 17, count 0 2006.229.19:42:29.17#ibcon#about to read 3, iclass 17, count 0 2006.229.19:42:29.19#ibcon#read 3, iclass 17, count 0 2006.229.19:42:29.19#ibcon#about to read 4, iclass 17, count 0 2006.229.19:42:29.19#ibcon#read 4, iclass 17, count 0 2006.229.19:42:29.19#ibcon#about to read 5, iclass 17, count 0 2006.229.19:42:29.19#ibcon#read 5, iclass 17, count 0 2006.229.19:42:29.19#ibcon#about to read 6, iclass 17, count 0 2006.229.19:42:29.19#ibcon#read 6, iclass 17, count 0 2006.229.19:42:29.19#ibcon#end of sib2, iclass 17, count 0 2006.229.19:42:29.19#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:42:29.19#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:42:29.19#ibcon#[25=USB\r\n] 2006.229.19:42:29.19#ibcon#*before write, iclass 17, count 0 2006.229.19:42:29.19#ibcon#enter sib2, iclass 17, count 0 2006.229.19:42:29.19#ibcon#flushed, iclass 17, count 0 2006.229.19:42:29.19#ibcon#about to write, iclass 17, count 0 2006.229.19:42:29.19#ibcon#wrote, iclass 17, count 0 2006.229.19:42:29.19#ibcon#about to read 3, iclass 17, count 0 2006.229.19:42:29.22#ibcon#read 3, iclass 17, count 0 2006.229.19:42:29.22#ibcon#about to read 4, iclass 17, count 0 2006.229.19:42:29.22#ibcon#read 4, iclass 17, count 0 2006.229.19:42:29.22#ibcon#about to read 5, iclass 17, count 0 2006.229.19:42:29.22#ibcon#read 5, iclass 17, count 0 2006.229.19:42:29.22#ibcon#about to read 6, iclass 17, count 0 2006.229.19:42:29.22#ibcon#read 6, iclass 17, count 0 2006.229.19:42:29.22#ibcon#end of sib2, iclass 17, count 0 2006.229.19:42:29.22#ibcon#*after write, iclass 17, count 0 2006.229.19:42:29.22#ibcon#*before return 0, iclass 17, count 0 2006.229.19:42:29.22#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:29.22#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:29.22#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:42:29.22#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:42:29.22$vck44/valo=7,864.99 2006.229.19:42:29.22#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:42:29.22#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:42:29.22#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:29.22#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:29.22#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:29.22#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:29.22#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:42:29.22#ibcon#first serial, iclass 19, count 0 2006.229.19:42:29.22#ibcon#enter sib2, iclass 19, count 0 2006.229.19:42:29.22#ibcon#flushed, iclass 19, count 0 2006.229.19:42:29.22#ibcon#about to write, iclass 19, count 0 2006.229.19:42:29.22#ibcon#wrote, iclass 19, count 0 2006.229.19:42:29.22#ibcon#about to read 3, iclass 19, count 0 2006.229.19:42:29.24#ibcon#read 3, iclass 19, count 0 2006.229.19:42:29.24#ibcon#about to read 4, iclass 19, count 0 2006.229.19:42:29.24#ibcon#read 4, iclass 19, count 0 2006.229.19:42:29.24#ibcon#about to read 5, iclass 19, count 0 2006.229.19:42:29.24#ibcon#read 5, iclass 19, count 0 2006.229.19:42:29.24#ibcon#about to read 6, iclass 19, count 0 2006.229.19:42:29.24#ibcon#read 6, iclass 19, count 0 2006.229.19:42:29.24#ibcon#end of sib2, iclass 19, count 0 2006.229.19:42:29.24#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:42:29.24#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:42:29.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:42:29.24#ibcon#*before write, iclass 19, count 0 2006.229.19:42:29.24#ibcon#enter sib2, iclass 19, count 0 2006.229.19:42:29.24#ibcon#flushed, iclass 19, count 0 2006.229.19:42:29.24#ibcon#about to write, iclass 19, count 0 2006.229.19:42:29.24#ibcon#wrote, iclass 19, count 0 2006.229.19:42:29.24#ibcon#about to read 3, iclass 19, count 0 2006.229.19:42:29.28#ibcon#read 3, iclass 19, count 0 2006.229.19:42:29.28#ibcon#about to read 4, iclass 19, count 0 2006.229.19:42:29.28#ibcon#read 4, iclass 19, count 0 2006.229.19:42:29.28#ibcon#about to read 5, iclass 19, count 0 2006.229.19:42:29.28#ibcon#read 5, iclass 19, count 0 2006.229.19:42:29.28#ibcon#about to read 6, iclass 19, count 0 2006.229.19:42:29.28#ibcon#read 6, iclass 19, count 0 2006.229.19:42:29.28#ibcon#end of sib2, iclass 19, count 0 2006.229.19:42:29.28#ibcon#*after write, iclass 19, count 0 2006.229.19:42:29.28#ibcon#*before return 0, iclass 19, count 0 2006.229.19:42:29.28#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:29.28#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:29.28#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:42:29.28#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:42:29.28$vck44/va=7,5 2006.229.19:42:29.28#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.19:42:29.28#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.19:42:29.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:29.28#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:29.34#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:29.34#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:29.34#ibcon#enter wrdev, iclass 21, count 2 2006.229.19:42:29.34#ibcon#first serial, iclass 21, count 2 2006.229.19:42:29.34#ibcon#enter sib2, iclass 21, count 2 2006.229.19:42:29.34#ibcon#flushed, iclass 21, count 2 2006.229.19:42:29.34#ibcon#about to write, iclass 21, count 2 2006.229.19:42:29.34#ibcon#wrote, iclass 21, count 2 2006.229.19:42:29.34#ibcon#about to read 3, iclass 21, count 2 2006.229.19:42:29.36#ibcon#read 3, iclass 21, count 2 2006.229.19:42:29.36#ibcon#about to read 4, iclass 21, count 2 2006.229.19:42:29.36#ibcon#read 4, iclass 21, count 2 2006.229.19:42:29.36#ibcon#about to read 5, iclass 21, count 2 2006.229.19:42:29.36#ibcon#read 5, iclass 21, count 2 2006.229.19:42:29.36#ibcon#about to read 6, iclass 21, count 2 2006.229.19:42:29.36#ibcon#read 6, iclass 21, count 2 2006.229.19:42:29.36#ibcon#end of sib2, iclass 21, count 2 2006.229.19:42:29.36#ibcon#*mode == 0, iclass 21, count 2 2006.229.19:42:29.36#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.19:42:29.36#ibcon#[25=AT07-05\r\n] 2006.229.19:42:29.36#ibcon#*before write, iclass 21, count 2 2006.229.19:42:29.36#ibcon#enter sib2, iclass 21, count 2 2006.229.19:42:29.36#ibcon#flushed, iclass 21, count 2 2006.229.19:42:29.36#ibcon#about to write, iclass 21, count 2 2006.229.19:42:29.36#ibcon#wrote, iclass 21, count 2 2006.229.19:42:29.36#ibcon#about to read 3, iclass 21, count 2 2006.229.19:42:29.39#ibcon#read 3, iclass 21, count 2 2006.229.19:42:29.39#ibcon#about to read 4, iclass 21, count 2 2006.229.19:42:29.39#ibcon#read 4, iclass 21, count 2 2006.229.19:42:29.39#ibcon#about to read 5, iclass 21, count 2 2006.229.19:42:29.39#ibcon#read 5, iclass 21, count 2 2006.229.19:42:29.39#ibcon#about to read 6, iclass 21, count 2 2006.229.19:42:29.39#ibcon#read 6, iclass 21, count 2 2006.229.19:42:29.39#ibcon#end of sib2, iclass 21, count 2 2006.229.19:42:29.39#ibcon#*after write, iclass 21, count 2 2006.229.19:42:29.39#ibcon#*before return 0, iclass 21, count 2 2006.229.19:42:29.39#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:29.39#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:29.39#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.19:42:29.39#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:29.39#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:29.51#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:29.51#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:29.51#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:42:29.51#ibcon#first serial, iclass 21, count 0 2006.229.19:42:29.51#ibcon#enter sib2, iclass 21, count 0 2006.229.19:42:29.51#ibcon#flushed, iclass 21, count 0 2006.229.19:42:29.51#ibcon#about to write, iclass 21, count 0 2006.229.19:42:29.51#ibcon#wrote, iclass 21, count 0 2006.229.19:42:29.51#ibcon#about to read 3, iclass 21, count 0 2006.229.19:42:29.53#ibcon#read 3, iclass 21, count 0 2006.229.19:42:29.53#ibcon#about to read 4, iclass 21, count 0 2006.229.19:42:29.53#ibcon#read 4, iclass 21, count 0 2006.229.19:42:29.53#ibcon#about to read 5, iclass 21, count 0 2006.229.19:42:29.53#ibcon#read 5, iclass 21, count 0 2006.229.19:42:29.53#ibcon#about to read 6, iclass 21, count 0 2006.229.19:42:29.53#ibcon#read 6, iclass 21, count 0 2006.229.19:42:29.53#ibcon#end of sib2, iclass 21, count 0 2006.229.19:42:29.53#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:42:29.53#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:42:29.53#ibcon#[25=USB\r\n] 2006.229.19:42:29.53#ibcon#*before write, iclass 21, count 0 2006.229.19:42:29.53#ibcon#enter sib2, iclass 21, count 0 2006.229.19:42:29.53#ibcon#flushed, iclass 21, count 0 2006.229.19:42:29.53#ibcon#about to write, iclass 21, count 0 2006.229.19:42:29.53#ibcon#wrote, iclass 21, count 0 2006.229.19:42:29.53#ibcon#about to read 3, iclass 21, count 0 2006.229.19:42:29.56#ibcon#read 3, iclass 21, count 0 2006.229.19:42:29.56#ibcon#about to read 4, iclass 21, count 0 2006.229.19:42:29.56#ibcon#read 4, iclass 21, count 0 2006.229.19:42:29.56#ibcon#about to read 5, iclass 21, count 0 2006.229.19:42:29.56#ibcon#read 5, iclass 21, count 0 2006.229.19:42:29.56#ibcon#about to read 6, iclass 21, count 0 2006.229.19:42:29.56#ibcon#read 6, iclass 21, count 0 2006.229.19:42:29.56#ibcon#end of sib2, iclass 21, count 0 2006.229.19:42:29.56#ibcon#*after write, iclass 21, count 0 2006.229.19:42:29.56#ibcon#*before return 0, iclass 21, count 0 2006.229.19:42:29.56#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:29.56#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:29.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:42:29.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:42:29.56$vck44/valo=8,884.99 2006.229.19:42:29.56#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.19:42:29.56#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.19:42:29.56#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:29.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:29.56#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:29.56#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:29.56#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:42:29.56#ibcon#first serial, iclass 23, count 0 2006.229.19:42:29.56#ibcon#enter sib2, iclass 23, count 0 2006.229.19:42:29.56#ibcon#flushed, iclass 23, count 0 2006.229.19:42:29.56#ibcon#about to write, iclass 23, count 0 2006.229.19:42:29.56#ibcon#wrote, iclass 23, count 0 2006.229.19:42:29.56#ibcon#about to read 3, iclass 23, count 0 2006.229.19:42:29.58#ibcon#read 3, iclass 23, count 0 2006.229.19:42:29.58#ibcon#about to read 4, iclass 23, count 0 2006.229.19:42:29.58#ibcon#read 4, iclass 23, count 0 2006.229.19:42:29.58#ibcon#about to read 5, iclass 23, count 0 2006.229.19:42:29.58#ibcon#read 5, iclass 23, count 0 2006.229.19:42:29.58#ibcon#about to read 6, iclass 23, count 0 2006.229.19:42:29.58#ibcon#read 6, iclass 23, count 0 2006.229.19:42:29.58#ibcon#end of sib2, iclass 23, count 0 2006.229.19:42:29.58#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:42:29.58#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:42:29.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:42:29.58#ibcon#*before write, iclass 23, count 0 2006.229.19:42:29.58#ibcon#enter sib2, iclass 23, count 0 2006.229.19:42:29.58#ibcon#flushed, iclass 23, count 0 2006.229.19:42:29.58#ibcon#about to write, iclass 23, count 0 2006.229.19:42:29.58#ibcon#wrote, iclass 23, count 0 2006.229.19:42:29.58#ibcon#about to read 3, iclass 23, count 0 2006.229.19:42:29.62#ibcon#read 3, iclass 23, count 0 2006.229.19:42:29.62#ibcon#about to read 4, iclass 23, count 0 2006.229.19:42:29.62#ibcon#read 4, iclass 23, count 0 2006.229.19:42:29.62#ibcon#about to read 5, iclass 23, count 0 2006.229.19:42:29.62#ibcon#read 5, iclass 23, count 0 2006.229.19:42:29.62#ibcon#about to read 6, iclass 23, count 0 2006.229.19:42:29.62#ibcon#read 6, iclass 23, count 0 2006.229.19:42:29.62#ibcon#end of sib2, iclass 23, count 0 2006.229.19:42:29.62#ibcon#*after write, iclass 23, count 0 2006.229.19:42:29.62#ibcon#*before return 0, iclass 23, count 0 2006.229.19:42:29.62#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:29.62#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:29.62#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:42:29.62#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:42:29.62$vck44/va=8,6 2006.229.19:42:29.62#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.19:42:29.62#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.19:42:29.62#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:29.62#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:42:29.68#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:42:29.68#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:42:29.68#ibcon#enter wrdev, iclass 25, count 2 2006.229.19:42:29.68#ibcon#first serial, iclass 25, count 2 2006.229.19:42:29.68#ibcon#enter sib2, iclass 25, count 2 2006.229.19:42:29.68#ibcon#flushed, iclass 25, count 2 2006.229.19:42:29.68#ibcon#about to write, iclass 25, count 2 2006.229.19:42:29.68#ibcon#wrote, iclass 25, count 2 2006.229.19:42:29.68#ibcon#about to read 3, iclass 25, count 2 2006.229.19:42:29.70#ibcon#read 3, iclass 25, count 2 2006.229.19:42:29.70#ibcon#about to read 4, iclass 25, count 2 2006.229.19:42:29.70#ibcon#read 4, iclass 25, count 2 2006.229.19:42:29.70#ibcon#about to read 5, iclass 25, count 2 2006.229.19:42:29.70#ibcon#read 5, iclass 25, count 2 2006.229.19:42:29.70#ibcon#about to read 6, iclass 25, count 2 2006.229.19:42:29.70#ibcon#read 6, iclass 25, count 2 2006.229.19:42:29.70#ibcon#end of sib2, iclass 25, count 2 2006.229.19:42:29.70#ibcon#*mode == 0, iclass 25, count 2 2006.229.19:42:29.70#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.19:42:29.70#ibcon#[25=AT08-06\r\n] 2006.229.19:42:29.70#ibcon#*before write, iclass 25, count 2 2006.229.19:42:29.70#ibcon#enter sib2, iclass 25, count 2 2006.229.19:42:29.70#ibcon#flushed, iclass 25, count 2 2006.229.19:42:29.70#ibcon#about to write, iclass 25, count 2 2006.229.19:42:29.70#ibcon#wrote, iclass 25, count 2 2006.229.19:42:29.70#ibcon#about to read 3, iclass 25, count 2 2006.229.19:42:29.73#ibcon#read 3, iclass 25, count 2 2006.229.19:42:29.73#ibcon#about to read 4, iclass 25, count 2 2006.229.19:42:29.73#ibcon#read 4, iclass 25, count 2 2006.229.19:42:29.73#ibcon#about to read 5, iclass 25, count 2 2006.229.19:42:29.73#ibcon#read 5, iclass 25, count 2 2006.229.19:42:29.73#ibcon#about to read 6, iclass 25, count 2 2006.229.19:42:29.73#ibcon#read 6, iclass 25, count 2 2006.229.19:42:29.73#ibcon#end of sib2, iclass 25, count 2 2006.229.19:42:29.73#ibcon#*after write, iclass 25, count 2 2006.229.19:42:29.73#ibcon#*before return 0, iclass 25, count 2 2006.229.19:42:29.73#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:42:29.73#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.19:42:29.73#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.19:42:29.73#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:29.73#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:42:29.85#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:42:29.85#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:42:29.85#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:42:29.85#ibcon#first serial, iclass 25, count 0 2006.229.19:42:29.85#ibcon#enter sib2, iclass 25, count 0 2006.229.19:42:29.85#ibcon#flushed, iclass 25, count 0 2006.229.19:42:29.85#ibcon#about to write, iclass 25, count 0 2006.229.19:42:29.85#ibcon#wrote, iclass 25, count 0 2006.229.19:42:29.85#ibcon#about to read 3, iclass 25, count 0 2006.229.19:42:29.87#ibcon#read 3, iclass 25, count 0 2006.229.19:42:29.87#ibcon#about to read 4, iclass 25, count 0 2006.229.19:42:29.87#ibcon#read 4, iclass 25, count 0 2006.229.19:42:29.87#ibcon#about to read 5, iclass 25, count 0 2006.229.19:42:29.87#ibcon#read 5, iclass 25, count 0 2006.229.19:42:29.87#ibcon#about to read 6, iclass 25, count 0 2006.229.19:42:29.87#ibcon#read 6, iclass 25, count 0 2006.229.19:42:29.87#ibcon#end of sib2, iclass 25, count 0 2006.229.19:42:29.87#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:42:29.87#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:42:29.87#ibcon#[25=USB\r\n] 2006.229.19:42:29.87#ibcon#*before write, iclass 25, count 0 2006.229.19:42:29.87#ibcon#enter sib2, iclass 25, count 0 2006.229.19:42:29.87#ibcon#flushed, iclass 25, count 0 2006.229.19:42:29.87#ibcon#about to write, iclass 25, count 0 2006.229.19:42:29.87#ibcon#wrote, iclass 25, count 0 2006.229.19:42:29.87#ibcon#about to read 3, iclass 25, count 0 2006.229.19:42:29.90#ibcon#read 3, iclass 25, count 0 2006.229.19:42:29.90#ibcon#about to read 4, iclass 25, count 0 2006.229.19:42:29.90#ibcon#read 4, iclass 25, count 0 2006.229.19:42:29.90#ibcon#about to read 5, iclass 25, count 0 2006.229.19:42:29.90#ibcon#read 5, iclass 25, count 0 2006.229.19:42:29.90#ibcon#about to read 6, iclass 25, count 0 2006.229.19:42:29.90#ibcon#read 6, iclass 25, count 0 2006.229.19:42:29.90#ibcon#end of sib2, iclass 25, count 0 2006.229.19:42:29.90#ibcon#*after write, iclass 25, count 0 2006.229.19:42:29.90#ibcon#*before return 0, iclass 25, count 0 2006.229.19:42:29.90#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:42:29.90#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.19:42:29.90#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:42:29.90#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:42:29.90$vck44/vblo=1,629.99 2006.229.19:42:29.90#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.19:42:29.90#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.19:42:29.90#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:29.90#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:42:29.90#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:42:29.90#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:42:29.90#ibcon#enter wrdev, iclass 27, count 0 2006.229.19:42:29.90#ibcon#first serial, iclass 27, count 0 2006.229.19:42:29.90#ibcon#enter sib2, iclass 27, count 0 2006.229.19:42:29.90#ibcon#flushed, iclass 27, count 0 2006.229.19:42:29.90#ibcon#about to write, iclass 27, count 0 2006.229.19:42:29.90#ibcon#wrote, iclass 27, count 0 2006.229.19:42:29.90#ibcon#about to read 3, iclass 27, count 0 2006.229.19:42:29.92#ibcon#read 3, iclass 27, count 0 2006.229.19:42:29.92#ibcon#about to read 4, iclass 27, count 0 2006.229.19:42:29.92#ibcon#read 4, iclass 27, count 0 2006.229.19:42:29.92#ibcon#about to read 5, iclass 27, count 0 2006.229.19:42:29.92#ibcon#read 5, iclass 27, count 0 2006.229.19:42:29.92#ibcon#about to read 6, iclass 27, count 0 2006.229.19:42:29.92#ibcon#read 6, iclass 27, count 0 2006.229.19:42:29.92#ibcon#end of sib2, iclass 27, count 0 2006.229.19:42:29.92#ibcon#*mode == 0, iclass 27, count 0 2006.229.19:42:29.92#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.19:42:29.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:42:29.92#ibcon#*before write, iclass 27, count 0 2006.229.19:42:29.92#ibcon#enter sib2, iclass 27, count 0 2006.229.19:42:29.92#ibcon#flushed, iclass 27, count 0 2006.229.19:42:29.92#ibcon#about to write, iclass 27, count 0 2006.229.19:42:29.92#ibcon#wrote, iclass 27, count 0 2006.229.19:42:29.92#ibcon#about to read 3, iclass 27, count 0 2006.229.19:42:29.96#ibcon#read 3, iclass 27, count 0 2006.229.19:42:29.96#ibcon#about to read 4, iclass 27, count 0 2006.229.19:42:29.96#ibcon#read 4, iclass 27, count 0 2006.229.19:42:29.96#ibcon#about to read 5, iclass 27, count 0 2006.229.19:42:29.96#ibcon#read 5, iclass 27, count 0 2006.229.19:42:29.96#ibcon#about to read 6, iclass 27, count 0 2006.229.19:42:29.96#ibcon#read 6, iclass 27, count 0 2006.229.19:42:29.96#ibcon#end of sib2, iclass 27, count 0 2006.229.19:42:29.96#ibcon#*after write, iclass 27, count 0 2006.229.19:42:29.96#ibcon#*before return 0, iclass 27, count 0 2006.229.19:42:29.96#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:42:29.96#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.19:42:29.96#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.19:42:29.96#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.19:42:29.96$vck44/vb=1,4 2006.229.19:42:29.96#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.19:42:29.96#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.19:42:29.96#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:29.96#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:42:29.96#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:42:29.96#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:42:29.96#ibcon#enter wrdev, iclass 29, count 2 2006.229.19:42:29.96#ibcon#first serial, iclass 29, count 2 2006.229.19:42:29.96#ibcon#enter sib2, iclass 29, count 2 2006.229.19:42:29.96#ibcon#flushed, iclass 29, count 2 2006.229.19:42:29.96#ibcon#about to write, iclass 29, count 2 2006.229.19:42:29.96#ibcon#wrote, iclass 29, count 2 2006.229.19:42:29.96#ibcon#about to read 3, iclass 29, count 2 2006.229.19:42:29.98#ibcon#read 3, iclass 29, count 2 2006.229.19:42:29.98#ibcon#about to read 4, iclass 29, count 2 2006.229.19:42:29.98#ibcon#read 4, iclass 29, count 2 2006.229.19:42:29.98#ibcon#about to read 5, iclass 29, count 2 2006.229.19:42:29.98#ibcon#read 5, iclass 29, count 2 2006.229.19:42:29.98#ibcon#about to read 6, iclass 29, count 2 2006.229.19:42:29.98#ibcon#read 6, iclass 29, count 2 2006.229.19:42:29.98#ibcon#end of sib2, iclass 29, count 2 2006.229.19:42:29.98#ibcon#*mode == 0, iclass 29, count 2 2006.229.19:42:29.98#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.19:42:29.98#ibcon#[27=AT01-04\r\n] 2006.229.19:42:29.98#ibcon#*before write, iclass 29, count 2 2006.229.19:42:29.98#ibcon#enter sib2, iclass 29, count 2 2006.229.19:42:29.98#ibcon#flushed, iclass 29, count 2 2006.229.19:42:29.98#ibcon#about to write, iclass 29, count 2 2006.229.19:42:29.98#ibcon#wrote, iclass 29, count 2 2006.229.19:42:29.98#ibcon#about to read 3, iclass 29, count 2 2006.229.19:42:30.01#ibcon#read 3, iclass 29, count 2 2006.229.19:42:30.01#ibcon#about to read 4, iclass 29, count 2 2006.229.19:42:30.01#ibcon#read 4, iclass 29, count 2 2006.229.19:42:30.01#ibcon#about to read 5, iclass 29, count 2 2006.229.19:42:30.01#ibcon#read 5, iclass 29, count 2 2006.229.19:42:30.01#ibcon#about to read 6, iclass 29, count 2 2006.229.19:42:30.01#ibcon#read 6, iclass 29, count 2 2006.229.19:42:30.01#ibcon#end of sib2, iclass 29, count 2 2006.229.19:42:30.01#ibcon#*after write, iclass 29, count 2 2006.229.19:42:30.01#ibcon#*before return 0, iclass 29, count 2 2006.229.19:42:30.01#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:42:30.01#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.19:42:30.01#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.19:42:30.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:30.01#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:42:30.13#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:42:30.13#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:42:30.13#ibcon#enter wrdev, iclass 29, count 0 2006.229.19:42:30.13#ibcon#first serial, iclass 29, count 0 2006.229.19:42:30.13#ibcon#enter sib2, iclass 29, count 0 2006.229.19:42:30.13#ibcon#flushed, iclass 29, count 0 2006.229.19:42:30.13#ibcon#about to write, iclass 29, count 0 2006.229.19:42:30.13#ibcon#wrote, iclass 29, count 0 2006.229.19:42:30.13#ibcon#about to read 3, iclass 29, count 0 2006.229.19:42:30.15#ibcon#read 3, iclass 29, count 0 2006.229.19:42:30.15#ibcon#about to read 4, iclass 29, count 0 2006.229.19:42:30.15#ibcon#read 4, iclass 29, count 0 2006.229.19:42:30.15#ibcon#about to read 5, iclass 29, count 0 2006.229.19:42:30.15#ibcon#read 5, iclass 29, count 0 2006.229.19:42:30.15#ibcon#about to read 6, iclass 29, count 0 2006.229.19:42:30.15#ibcon#read 6, iclass 29, count 0 2006.229.19:42:30.15#ibcon#end of sib2, iclass 29, count 0 2006.229.19:42:30.15#ibcon#*mode == 0, iclass 29, count 0 2006.229.19:42:30.15#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.19:42:30.15#ibcon#[27=USB\r\n] 2006.229.19:42:30.15#ibcon#*before write, iclass 29, count 0 2006.229.19:42:30.15#ibcon#enter sib2, iclass 29, count 0 2006.229.19:42:30.15#ibcon#flushed, iclass 29, count 0 2006.229.19:42:30.15#ibcon#about to write, iclass 29, count 0 2006.229.19:42:30.15#ibcon#wrote, iclass 29, count 0 2006.229.19:42:30.15#ibcon#about to read 3, iclass 29, count 0 2006.229.19:42:30.18#ibcon#read 3, iclass 29, count 0 2006.229.19:42:30.18#ibcon#about to read 4, iclass 29, count 0 2006.229.19:42:30.18#ibcon#read 4, iclass 29, count 0 2006.229.19:42:30.18#ibcon#about to read 5, iclass 29, count 0 2006.229.19:42:30.18#ibcon#read 5, iclass 29, count 0 2006.229.19:42:30.18#ibcon#about to read 6, iclass 29, count 0 2006.229.19:42:30.18#ibcon#read 6, iclass 29, count 0 2006.229.19:42:30.18#ibcon#end of sib2, iclass 29, count 0 2006.229.19:42:30.18#ibcon#*after write, iclass 29, count 0 2006.229.19:42:30.18#ibcon#*before return 0, iclass 29, count 0 2006.229.19:42:30.18#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:42:30.18#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.19:42:30.18#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.19:42:30.18#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.19:42:30.18$vck44/vblo=2,634.99 2006.229.19:42:30.18#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.19:42:30.18#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.19:42:30.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:30.18#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:30.18#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:30.18#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:30.18#ibcon#enter wrdev, iclass 31, count 0 2006.229.19:42:30.18#ibcon#first serial, iclass 31, count 0 2006.229.19:42:30.18#ibcon#enter sib2, iclass 31, count 0 2006.229.19:42:30.18#ibcon#flushed, iclass 31, count 0 2006.229.19:42:30.18#ibcon#about to write, iclass 31, count 0 2006.229.19:42:30.18#ibcon#wrote, iclass 31, count 0 2006.229.19:42:30.18#ibcon#about to read 3, iclass 31, count 0 2006.229.19:42:30.20#ibcon#read 3, iclass 31, count 0 2006.229.19:42:30.20#ibcon#about to read 4, iclass 31, count 0 2006.229.19:42:30.20#ibcon#read 4, iclass 31, count 0 2006.229.19:42:30.20#ibcon#about to read 5, iclass 31, count 0 2006.229.19:42:30.20#ibcon#read 5, iclass 31, count 0 2006.229.19:42:30.20#ibcon#about to read 6, iclass 31, count 0 2006.229.19:42:30.20#ibcon#read 6, iclass 31, count 0 2006.229.19:42:30.20#ibcon#end of sib2, iclass 31, count 0 2006.229.19:42:30.20#ibcon#*mode == 0, iclass 31, count 0 2006.229.19:42:30.20#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.19:42:30.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:42:30.20#ibcon#*before write, iclass 31, count 0 2006.229.19:42:30.20#ibcon#enter sib2, iclass 31, count 0 2006.229.19:42:30.20#ibcon#flushed, iclass 31, count 0 2006.229.19:42:30.20#ibcon#about to write, iclass 31, count 0 2006.229.19:42:30.20#ibcon#wrote, iclass 31, count 0 2006.229.19:42:30.20#ibcon#about to read 3, iclass 31, count 0 2006.229.19:42:30.24#ibcon#read 3, iclass 31, count 0 2006.229.19:42:30.24#ibcon#about to read 4, iclass 31, count 0 2006.229.19:42:30.24#ibcon#read 4, iclass 31, count 0 2006.229.19:42:30.24#ibcon#about to read 5, iclass 31, count 0 2006.229.19:42:30.24#ibcon#read 5, iclass 31, count 0 2006.229.19:42:30.24#ibcon#about to read 6, iclass 31, count 0 2006.229.19:42:30.24#ibcon#read 6, iclass 31, count 0 2006.229.19:42:30.24#ibcon#end of sib2, iclass 31, count 0 2006.229.19:42:30.24#ibcon#*after write, iclass 31, count 0 2006.229.19:42:30.24#ibcon#*before return 0, iclass 31, count 0 2006.229.19:42:30.24#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:30.24#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.19:42:30.24#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.19:42:30.24#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.19:42:30.24$vck44/vb=2,4 2006.229.19:42:30.24#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.19:42:30.24#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.19:42:30.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:30.24#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:30.30#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:30.30#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:30.30#ibcon#enter wrdev, iclass 33, count 2 2006.229.19:42:30.30#ibcon#first serial, iclass 33, count 2 2006.229.19:42:30.30#ibcon#enter sib2, iclass 33, count 2 2006.229.19:42:30.30#ibcon#flushed, iclass 33, count 2 2006.229.19:42:30.30#ibcon#about to write, iclass 33, count 2 2006.229.19:42:30.30#ibcon#wrote, iclass 33, count 2 2006.229.19:42:30.30#ibcon#about to read 3, iclass 33, count 2 2006.229.19:42:30.32#ibcon#read 3, iclass 33, count 2 2006.229.19:42:30.32#ibcon#about to read 4, iclass 33, count 2 2006.229.19:42:30.32#ibcon#read 4, iclass 33, count 2 2006.229.19:42:30.32#ibcon#about to read 5, iclass 33, count 2 2006.229.19:42:30.32#ibcon#read 5, iclass 33, count 2 2006.229.19:42:30.32#ibcon#about to read 6, iclass 33, count 2 2006.229.19:42:30.32#ibcon#read 6, iclass 33, count 2 2006.229.19:42:30.32#ibcon#end of sib2, iclass 33, count 2 2006.229.19:42:30.32#ibcon#*mode == 0, iclass 33, count 2 2006.229.19:42:30.32#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.19:42:30.32#ibcon#[27=AT02-04\r\n] 2006.229.19:42:30.32#ibcon#*before write, iclass 33, count 2 2006.229.19:42:30.32#ibcon#enter sib2, iclass 33, count 2 2006.229.19:42:30.32#ibcon#flushed, iclass 33, count 2 2006.229.19:42:30.32#ibcon#about to write, iclass 33, count 2 2006.229.19:42:30.32#ibcon#wrote, iclass 33, count 2 2006.229.19:42:30.32#ibcon#about to read 3, iclass 33, count 2 2006.229.19:42:30.35#ibcon#read 3, iclass 33, count 2 2006.229.19:42:30.35#ibcon#about to read 4, iclass 33, count 2 2006.229.19:42:30.35#ibcon#read 4, iclass 33, count 2 2006.229.19:42:30.35#ibcon#about to read 5, iclass 33, count 2 2006.229.19:42:30.35#ibcon#read 5, iclass 33, count 2 2006.229.19:42:30.35#ibcon#about to read 6, iclass 33, count 2 2006.229.19:42:30.35#ibcon#read 6, iclass 33, count 2 2006.229.19:42:30.35#ibcon#end of sib2, iclass 33, count 2 2006.229.19:42:30.35#ibcon#*after write, iclass 33, count 2 2006.229.19:42:30.35#ibcon#*before return 0, iclass 33, count 2 2006.229.19:42:30.35#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:30.35#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.19:42:30.35#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.19:42:30.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:30.35#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:30.47#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:30.47#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:30.47#ibcon#enter wrdev, iclass 33, count 0 2006.229.19:42:30.47#ibcon#first serial, iclass 33, count 0 2006.229.19:42:30.47#ibcon#enter sib2, iclass 33, count 0 2006.229.19:42:30.47#ibcon#flushed, iclass 33, count 0 2006.229.19:42:30.47#ibcon#about to write, iclass 33, count 0 2006.229.19:42:30.47#ibcon#wrote, iclass 33, count 0 2006.229.19:42:30.47#ibcon#about to read 3, iclass 33, count 0 2006.229.19:42:30.49#ibcon#read 3, iclass 33, count 0 2006.229.19:42:30.49#ibcon#about to read 4, iclass 33, count 0 2006.229.19:42:30.49#ibcon#read 4, iclass 33, count 0 2006.229.19:42:30.49#ibcon#about to read 5, iclass 33, count 0 2006.229.19:42:30.49#ibcon#read 5, iclass 33, count 0 2006.229.19:42:30.49#ibcon#about to read 6, iclass 33, count 0 2006.229.19:42:30.49#ibcon#read 6, iclass 33, count 0 2006.229.19:42:30.49#ibcon#end of sib2, iclass 33, count 0 2006.229.19:42:30.49#ibcon#*mode == 0, iclass 33, count 0 2006.229.19:42:30.49#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.19:42:30.49#ibcon#[27=USB\r\n] 2006.229.19:42:30.49#ibcon#*before write, iclass 33, count 0 2006.229.19:42:30.49#ibcon#enter sib2, iclass 33, count 0 2006.229.19:42:30.49#ibcon#flushed, iclass 33, count 0 2006.229.19:42:30.49#ibcon#about to write, iclass 33, count 0 2006.229.19:42:30.49#ibcon#wrote, iclass 33, count 0 2006.229.19:42:30.49#ibcon#about to read 3, iclass 33, count 0 2006.229.19:42:30.52#ibcon#read 3, iclass 33, count 0 2006.229.19:42:30.52#ibcon#about to read 4, iclass 33, count 0 2006.229.19:42:30.52#ibcon#read 4, iclass 33, count 0 2006.229.19:42:30.52#ibcon#about to read 5, iclass 33, count 0 2006.229.19:42:30.52#ibcon#read 5, iclass 33, count 0 2006.229.19:42:30.52#ibcon#about to read 6, iclass 33, count 0 2006.229.19:42:30.52#ibcon#read 6, iclass 33, count 0 2006.229.19:42:30.52#ibcon#end of sib2, iclass 33, count 0 2006.229.19:42:30.52#ibcon#*after write, iclass 33, count 0 2006.229.19:42:30.52#ibcon#*before return 0, iclass 33, count 0 2006.229.19:42:30.52#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:30.52#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.19:42:30.52#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.19:42:30.52#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.19:42:30.52$vck44/vblo=3,649.99 2006.229.19:42:30.52#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.19:42:30.52#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.19:42:30.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:30.52#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:30.52#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:30.52#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:30.52#ibcon#enter wrdev, iclass 35, count 0 2006.229.19:42:30.52#ibcon#first serial, iclass 35, count 0 2006.229.19:42:30.52#ibcon#enter sib2, iclass 35, count 0 2006.229.19:42:30.52#ibcon#flushed, iclass 35, count 0 2006.229.19:42:30.52#ibcon#about to write, iclass 35, count 0 2006.229.19:42:30.52#ibcon#wrote, iclass 35, count 0 2006.229.19:42:30.52#ibcon#about to read 3, iclass 35, count 0 2006.229.19:42:30.54#ibcon#read 3, iclass 35, count 0 2006.229.19:42:30.54#ibcon#about to read 4, iclass 35, count 0 2006.229.19:42:30.54#ibcon#read 4, iclass 35, count 0 2006.229.19:42:30.54#ibcon#about to read 5, iclass 35, count 0 2006.229.19:42:30.54#ibcon#read 5, iclass 35, count 0 2006.229.19:42:30.54#ibcon#about to read 6, iclass 35, count 0 2006.229.19:42:30.54#ibcon#read 6, iclass 35, count 0 2006.229.19:42:30.54#ibcon#end of sib2, iclass 35, count 0 2006.229.19:42:30.54#ibcon#*mode == 0, iclass 35, count 0 2006.229.19:42:30.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.19:42:30.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:42:30.54#ibcon#*before write, iclass 35, count 0 2006.229.19:42:30.54#ibcon#enter sib2, iclass 35, count 0 2006.229.19:42:30.54#ibcon#flushed, iclass 35, count 0 2006.229.19:42:30.54#ibcon#about to write, iclass 35, count 0 2006.229.19:42:30.54#ibcon#wrote, iclass 35, count 0 2006.229.19:42:30.54#ibcon#about to read 3, iclass 35, count 0 2006.229.19:42:30.58#ibcon#read 3, iclass 35, count 0 2006.229.19:42:30.58#ibcon#about to read 4, iclass 35, count 0 2006.229.19:42:30.58#ibcon#read 4, iclass 35, count 0 2006.229.19:42:30.58#ibcon#about to read 5, iclass 35, count 0 2006.229.19:42:30.58#ibcon#read 5, iclass 35, count 0 2006.229.19:42:30.58#ibcon#about to read 6, iclass 35, count 0 2006.229.19:42:30.58#ibcon#read 6, iclass 35, count 0 2006.229.19:42:30.58#ibcon#end of sib2, iclass 35, count 0 2006.229.19:42:30.58#ibcon#*after write, iclass 35, count 0 2006.229.19:42:30.58#ibcon#*before return 0, iclass 35, count 0 2006.229.19:42:30.58#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:30.58#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.19:42:30.58#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.19:42:30.58#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.19:42:30.58$vck44/vb=3,4 2006.229.19:42:30.58#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.19:42:30.58#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.19:42:30.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:30.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:30.64#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:30.64#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:30.64#ibcon#enter wrdev, iclass 37, count 2 2006.229.19:42:30.64#ibcon#first serial, iclass 37, count 2 2006.229.19:42:30.64#ibcon#enter sib2, iclass 37, count 2 2006.229.19:42:30.64#ibcon#flushed, iclass 37, count 2 2006.229.19:42:30.64#ibcon#about to write, iclass 37, count 2 2006.229.19:42:30.64#ibcon#wrote, iclass 37, count 2 2006.229.19:42:30.64#ibcon#about to read 3, iclass 37, count 2 2006.229.19:42:30.66#ibcon#read 3, iclass 37, count 2 2006.229.19:42:30.66#ibcon#about to read 4, iclass 37, count 2 2006.229.19:42:30.66#ibcon#read 4, iclass 37, count 2 2006.229.19:42:30.66#ibcon#about to read 5, iclass 37, count 2 2006.229.19:42:30.66#ibcon#read 5, iclass 37, count 2 2006.229.19:42:30.66#ibcon#about to read 6, iclass 37, count 2 2006.229.19:42:30.66#ibcon#read 6, iclass 37, count 2 2006.229.19:42:30.66#ibcon#end of sib2, iclass 37, count 2 2006.229.19:42:30.66#ibcon#*mode == 0, iclass 37, count 2 2006.229.19:42:30.66#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.19:42:30.66#ibcon#[27=AT03-04\r\n] 2006.229.19:42:30.66#ibcon#*before write, iclass 37, count 2 2006.229.19:42:30.66#ibcon#enter sib2, iclass 37, count 2 2006.229.19:42:30.66#ibcon#flushed, iclass 37, count 2 2006.229.19:42:30.66#ibcon#about to write, iclass 37, count 2 2006.229.19:42:30.66#ibcon#wrote, iclass 37, count 2 2006.229.19:42:30.66#ibcon#about to read 3, iclass 37, count 2 2006.229.19:42:30.69#ibcon#read 3, iclass 37, count 2 2006.229.19:42:30.69#ibcon#about to read 4, iclass 37, count 2 2006.229.19:42:30.69#ibcon#read 4, iclass 37, count 2 2006.229.19:42:30.69#ibcon#about to read 5, iclass 37, count 2 2006.229.19:42:30.69#ibcon#read 5, iclass 37, count 2 2006.229.19:42:30.69#ibcon#about to read 6, iclass 37, count 2 2006.229.19:42:30.69#ibcon#read 6, iclass 37, count 2 2006.229.19:42:30.69#ibcon#end of sib2, iclass 37, count 2 2006.229.19:42:30.69#ibcon#*after write, iclass 37, count 2 2006.229.19:42:30.69#ibcon#*before return 0, iclass 37, count 2 2006.229.19:42:30.69#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:30.69#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.19:42:30.69#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.19:42:30.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:30.69#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:30.81#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:30.81#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:30.81#ibcon#enter wrdev, iclass 37, count 0 2006.229.19:42:30.81#ibcon#first serial, iclass 37, count 0 2006.229.19:42:30.81#ibcon#enter sib2, iclass 37, count 0 2006.229.19:42:30.81#ibcon#flushed, iclass 37, count 0 2006.229.19:42:30.81#ibcon#about to write, iclass 37, count 0 2006.229.19:42:30.81#ibcon#wrote, iclass 37, count 0 2006.229.19:42:30.81#ibcon#about to read 3, iclass 37, count 0 2006.229.19:42:30.83#ibcon#read 3, iclass 37, count 0 2006.229.19:42:30.83#ibcon#about to read 4, iclass 37, count 0 2006.229.19:42:30.83#ibcon#read 4, iclass 37, count 0 2006.229.19:42:30.83#ibcon#about to read 5, iclass 37, count 0 2006.229.19:42:30.83#ibcon#read 5, iclass 37, count 0 2006.229.19:42:30.83#ibcon#about to read 6, iclass 37, count 0 2006.229.19:42:30.83#ibcon#read 6, iclass 37, count 0 2006.229.19:42:30.83#ibcon#end of sib2, iclass 37, count 0 2006.229.19:42:30.83#ibcon#*mode == 0, iclass 37, count 0 2006.229.19:42:30.83#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.19:42:30.83#ibcon#[27=USB\r\n] 2006.229.19:42:30.83#ibcon#*before write, iclass 37, count 0 2006.229.19:42:30.83#ibcon#enter sib2, iclass 37, count 0 2006.229.19:42:30.83#ibcon#flushed, iclass 37, count 0 2006.229.19:42:30.83#ibcon#about to write, iclass 37, count 0 2006.229.19:42:30.83#ibcon#wrote, iclass 37, count 0 2006.229.19:42:30.83#ibcon#about to read 3, iclass 37, count 0 2006.229.19:42:30.86#ibcon#read 3, iclass 37, count 0 2006.229.19:42:30.86#ibcon#about to read 4, iclass 37, count 0 2006.229.19:42:30.86#ibcon#read 4, iclass 37, count 0 2006.229.19:42:30.86#ibcon#about to read 5, iclass 37, count 0 2006.229.19:42:30.86#ibcon#read 5, iclass 37, count 0 2006.229.19:42:30.86#ibcon#about to read 6, iclass 37, count 0 2006.229.19:42:30.86#ibcon#read 6, iclass 37, count 0 2006.229.19:42:30.86#ibcon#end of sib2, iclass 37, count 0 2006.229.19:42:30.86#ibcon#*after write, iclass 37, count 0 2006.229.19:42:30.86#ibcon#*before return 0, iclass 37, count 0 2006.229.19:42:30.86#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:30.86#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.19:42:30.86#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.19:42:30.86#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.19:42:30.86$vck44/vblo=4,679.99 2006.229.19:42:30.86#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.19:42:30.86#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.19:42:30.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:30.86#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:30.86#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:30.86#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:30.86#ibcon#enter wrdev, iclass 39, count 0 2006.229.19:42:30.86#ibcon#first serial, iclass 39, count 0 2006.229.19:42:30.86#ibcon#enter sib2, iclass 39, count 0 2006.229.19:42:30.86#ibcon#flushed, iclass 39, count 0 2006.229.19:42:30.86#ibcon#about to write, iclass 39, count 0 2006.229.19:42:30.86#ibcon#wrote, iclass 39, count 0 2006.229.19:42:30.86#ibcon#about to read 3, iclass 39, count 0 2006.229.19:42:30.88#ibcon#read 3, iclass 39, count 0 2006.229.19:42:30.88#ibcon#about to read 4, iclass 39, count 0 2006.229.19:42:30.88#ibcon#read 4, iclass 39, count 0 2006.229.19:42:30.88#ibcon#about to read 5, iclass 39, count 0 2006.229.19:42:30.88#ibcon#read 5, iclass 39, count 0 2006.229.19:42:30.88#ibcon#about to read 6, iclass 39, count 0 2006.229.19:42:30.88#ibcon#read 6, iclass 39, count 0 2006.229.19:42:30.88#ibcon#end of sib2, iclass 39, count 0 2006.229.19:42:30.88#ibcon#*mode == 0, iclass 39, count 0 2006.229.19:42:30.88#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.19:42:30.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:42:30.88#ibcon#*before write, iclass 39, count 0 2006.229.19:42:30.88#ibcon#enter sib2, iclass 39, count 0 2006.229.19:42:30.88#ibcon#flushed, iclass 39, count 0 2006.229.19:42:30.88#ibcon#about to write, iclass 39, count 0 2006.229.19:42:30.88#ibcon#wrote, iclass 39, count 0 2006.229.19:42:30.88#ibcon#about to read 3, iclass 39, count 0 2006.229.19:42:30.92#ibcon#read 3, iclass 39, count 0 2006.229.19:42:30.92#ibcon#about to read 4, iclass 39, count 0 2006.229.19:42:30.92#ibcon#read 4, iclass 39, count 0 2006.229.19:42:30.92#ibcon#about to read 5, iclass 39, count 0 2006.229.19:42:30.92#ibcon#read 5, iclass 39, count 0 2006.229.19:42:30.92#ibcon#about to read 6, iclass 39, count 0 2006.229.19:42:30.92#ibcon#read 6, iclass 39, count 0 2006.229.19:42:30.92#ibcon#end of sib2, iclass 39, count 0 2006.229.19:42:30.92#ibcon#*after write, iclass 39, count 0 2006.229.19:42:30.92#ibcon#*before return 0, iclass 39, count 0 2006.229.19:42:30.92#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:30.92#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.19:42:30.92#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.19:42:30.92#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.19:42:30.92$vck44/vb=4,4 2006.229.19:42:30.92#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.19:42:30.92#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.19:42:30.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:30.92#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:30.98#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:30.98#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:30.98#ibcon#enter wrdev, iclass 3, count 2 2006.229.19:42:30.98#ibcon#first serial, iclass 3, count 2 2006.229.19:42:30.98#ibcon#enter sib2, iclass 3, count 2 2006.229.19:42:30.98#ibcon#flushed, iclass 3, count 2 2006.229.19:42:30.98#ibcon#about to write, iclass 3, count 2 2006.229.19:42:30.98#ibcon#wrote, iclass 3, count 2 2006.229.19:42:30.98#ibcon#about to read 3, iclass 3, count 2 2006.229.19:42:31.00#ibcon#read 3, iclass 3, count 2 2006.229.19:42:31.00#ibcon#about to read 4, iclass 3, count 2 2006.229.19:42:31.00#ibcon#read 4, iclass 3, count 2 2006.229.19:42:31.00#ibcon#about to read 5, iclass 3, count 2 2006.229.19:42:31.00#ibcon#read 5, iclass 3, count 2 2006.229.19:42:31.00#ibcon#about to read 6, iclass 3, count 2 2006.229.19:42:31.00#ibcon#read 6, iclass 3, count 2 2006.229.19:42:31.00#ibcon#end of sib2, iclass 3, count 2 2006.229.19:42:31.00#ibcon#*mode == 0, iclass 3, count 2 2006.229.19:42:31.00#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.19:42:31.00#ibcon#[27=AT04-04\r\n] 2006.229.19:42:31.00#ibcon#*before write, iclass 3, count 2 2006.229.19:42:31.00#ibcon#enter sib2, iclass 3, count 2 2006.229.19:42:31.00#ibcon#flushed, iclass 3, count 2 2006.229.19:42:31.00#ibcon#about to write, iclass 3, count 2 2006.229.19:42:31.00#ibcon#wrote, iclass 3, count 2 2006.229.19:42:31.00#ibcon#about to read 3, iclass 3, count 2 2006.229.19:42:31.03#ibcon#read 3, iclass 3, count 2 2006.229.19:42:31.03#ibcon#about to read 4, iclass 3, count 2 2006.229.19:42:31.03#ibcon#read 4, iclass 3, count 2 2006.229.19:42:31.03#ibcon#about to read 5, iclass 3, count 2 2006.229.19:42:31.03#ibcon#read 5, iclass 3, count 2 2006.229.19:42:31.03#ibcon#about to read 6, iclass 3, count 2 2006.229.19:42:31.03#ibcon#read 6, iclass 3, count 2 2006.229.19:42:31.03#ibcon#end of sib2, iclass 3, count 2 2006.229.19:42:31.03#ibcon#*after write, iclass 3, count 2 2006.229.19:42:31.03#ibcon#*before return 0, iclass 3, count 2 2006.229.19:42:31.03#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:31.03#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.19:42:31.03#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.19:42:31.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:31.03#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:31.15#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:31.15#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:31.15#ibcon#enter wrdev, iclass 3, count 0 2006.229.19:42:31.15#ibcon#first serial, iclass 3, count 0 2006.229.19:42:31.15#ibcon#enter sib2, iclass 3, count 0 2006.229.19:42:31.15#ibcon#flushed, iclass 3, count 0 2006.229.19:42:31.15#ibcon#about to write, iclass 3, count 0 2006.229.19:42:31.15#ibcon#wrote, iclass 3, count 0 2006.229.19:42:31.15#ibcon#about to read 3, iclass 3, count 0 2006.229.19:42:31.17#ibcon#read 3, iclass 3, count 0 2006.229.19:42:31.17#ibcon#about to read 4, iclass 3, count 0 2006.229.19:42:31.17#ibcon#read 4, iclass 3, count 0 2006.229.19:42:31.17#ibcon#about to read 5, iclass 3, count 0 2006.229.19:42:31.17#ibcon#read 5, iclass 3, count 0 2006.229.19:42:31.17#ibcon#about to read 6, iclass 3, count 0 2006.229.19:42:31.17#ibcon#read 6, iclass 3, count 0 2006.229.19:42:31.17#ibcon#end of sib2, iclass 3, count 0 2006.229.19:42:31.17#ibcon#*mode == 0, iclass 3, count 0 2006.229.19:42:31.17#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.19:42:31.17#ibcon#[27=USB\r\n] 2006.229.19:42:31.17#ibcon#*before write, iclass 3, count 0 2006.229.19:42:31.17#ibcon#enter sib2, iclass 3, count 0 2006.229.19:42:31.17#ibcon#flushed, iclass 3, count 0 2006.229.19:42:31.17#ibcon#about to write, iclass 3, count 0 2006.229.19:42:31.17#ibcon#wrote, iclass 3, count 0 2006.229.19:42:31.17#ibcon#about to read 3, iclass 3, count 0 2006.229.19:42:31.20#ibcon#read 3, iclass 3, count 0 2006.229.19:42:31.20#ibcon#about to read 4, iclass 3, count 0 2006.229.19:42:31.20#ibcon#read 4, iclass 3, count 0 2006.229.19:42:31.20#ibcon#about to read 5, iclass 3, count 0 2006.229.19:42:31.20#ibcon#read 5, iclass 3, count 0 2006.229.19:42:31.20#ibcon#about to read 6, iclass 3, count 0 2006.229.19:42:31.20#ibcon#read 6, iclass 3, count 0 2006.229.19:42:31.20#ibcon#end of sib2, iclass 3, count 0 2006.229.19:42:31.20#ibcon#*after write, iclass 3, count 0 2006.229.19:42:31.20#ibcon#*before return 0, iclass 3, count 0 2006.229.19:42:31.20#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:31.20#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.19:42:31.20#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.19:42:31.20#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.19:42:31.20$vck44/vblo=5,709.99 2006.229.19:42:31.20#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:42:31.20#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:42:31.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:31.20#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:31.20#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:31.20#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:31.20#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:42:31.20#ibcon#first serial, iclass 5, count 0 2006.229.19:42:31.20#ibcon#enter sib2, iclass 5, count 0 2006.229.19:42:31.20#ibcon#flushed, iclass 5, count 0 2006.229.19:42:31.20#ibcon#about to write, iclass 5, count 0 2006.229.19:42:31.20#ibcon#wrote, iclass 5, count 0 2006.229.19:42:31.20#ibcon#about to read 3, iclass 5, count 0 2006.229.19:42:31.22#ibcon#read 3, iclass 5, count 0 2006.229.19:42:31.22#ibcon#about to read 4, iclass 5, count 0 2006.229.19:42:31.22#ibcon#read 4, iclass 5, count 0 2006.229.19:42:31.22#ibcon#about to read 5, iclass 5, count 0 2006.229.19:42:31.22#ibcon#read 5, iclass 5, count 0 2006.229.19:42:31.22#ibcon#about to read 6, iclass 5, count 0 2006.229.19:42:31.22#ibcon#read 6, iclass 5, count 0 2006.229.19:42:31.22#ibcon#end of sib2, iclass 5, count 0 2006.229.19:42:31.22#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:42:31.22#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:42:31.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:42:31.22#ibcon#*before write, iclass 5, count 0 2006.229.19:42:31.22#ibcon#enter sib2, iclass 5, count 0 2006.229.19:42:31.22#ibcon#flushed, iclass 5, count 0 2006.229.19:42:31.22#ibcon#about to write, iclass 5, count 0 2006.229.19:42:31.22#ibcon#wrote, iclass 5, count 0 2006.229.19:42:31.22#ibcon#about to read 3, iclass 5, count 0 2006.229.19:42:31.26#ibcon#read 3, iclass 5, count 0 2006.229.19:42:31.26#ibcon#about to read 4, iclass 5, count 0 2006.229.19:42:31.26#ibcon#read 4, iclass 5, count 0 2006.229.19:42:31.26#ibcon#about to read 5, iclass 5, count 0 2006.229.19:42:31.26#ibcon#read 5, iclass 5, count 0 2006.229.19:42:31.26#ibcon#about to read 6, iclass 5, count 0 2006.229.19:42:31.26#ibcon#read 6, iclass 5, count 0 2006.229.19:42:31.26#ibcon#end of sib2, iclass 5, count 0 2006.229.19:42:31.26#ibcon#*after write, iclass 5, count 0 2006.229.19:42:31.26#ibcon#*before return 0, iclass 5, count 0 2006.229.19:42:31.26#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:31.26#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:42:31.26#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:42:31.26#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:42:31.26$vck44/vb=5,4 2006.229.19:42:31.26#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.19:42:31.26#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.19:42:31.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:31.26#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:31.32#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:31.32#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:31.32#ibcon#enter wrdev, iclass 7, count 2 2006.229.19:42:31.32#ibcon#first serial, iclass 7, count 2 2006.229.19:42:31.32#ibcon#enter sib2, iclass 7, count 2 2006.229.19:42:31.32#ibcon#flushed, iclass 7, count 2 2006.229.19:42:31.32#ibcon#about to write, iclass 7, count 2 2006.229.19:42:31.32#ibcon#wrote, iclass 7, count 2 2006.229.19:42:31.32#ibcon#about to read 3, iclass 7, count 2 2006.229.19:42:31.34#ibcon#read 3, iclass 7, count 2 2006.229.19:42:31.34#ibcon#about to read 4, iclass 7, count 2 2006.229.19:42:31.34#ibcon#read 4, iclass 7, count 2 2006.229.19:42:31.34#ibcon#about to read 5, iclass 7, count 2 2006.229.19:42:31.34#ibcon#read 5, iclass 7, count 2 2006.229.19:42:31.34#ibcon#about to read 6, iclass 7, count 2 2006.229.19:42:31.34#ibcon#read 6, iclass 7, count 2 2006.229.19:42:31.34#ibcon#end of sib2, iclass 7, count 2 2006.229.19:42:31.34#ibcon#*mode == 0, iclass 7, count 2 2006.229.19:42:31.34#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.19:42:31.34#ibcon#[27=AT05-04\r\n] 2006.229.19:42:31.34#ibcon#*before write, iclass 7, count 2 2006.229.19:42:31.34#ibcon#enter sib2, iclass 7, count 2 2006.229.19:42:31.34#ibcon#flushed, iclass 7, count 2 2006.229.19:42:31.34#ibcon#about to write, iclass 7, count 2 2006.229.19:42:31.34#ibcon#wrote, iclass 7, count 2 2006.229.19:42:31.34#ibcon#about to read 3, iclass 7, count 2 2006.229.19:42:31.37#ibcon#read 3, iclass 7, count 2 2006.229.19:42:31.37#ibcon#about to read 4, iclass 7, count 2 2006.229.19:42:31.37#ibcon#read 4, iclass 7, count 2 2006.229.19:42:31.37#ibcon#about to read 5, iclass 7, count 2 2006.229.19:42:31.37#ibcon#read 5, iclass 7, count 2 2006.229.19:42:31.37#ibcon#about to read 6, iclass 7, count 2 2006.229.19:42:31.37#ibcon#read 6, iclass 7, count 2 2006.229.19:42:31.37#ibcon#end of sib2, iclass 7, count 2 2006.229.19:42:31.37#ibcon#*after write, iclass 7, count 2 2006.229.19:42:31.37#ibcon#*before return 0, iclass 7, count 2 2006.229.19:42:31.37#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:31.37#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.19:42:31.37#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.19:42:31.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:31.37#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:31.49#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:31.49#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:31.49#ibcon#enter wrdev, iclass 7, count 0 2006.229.19:42:31.49#ibcon#first serial, iclass 7, count 0 2006.229.19:42:31.49#ibcon#enter sib2, iclass 7, count 0 2006.229.19:42:31.49#ibcon#flushed, iclass 7, count 0 2006.229.19:42:31.49#ibcon#about to write, iclass 7, count 0 2006.229.19:42:31.49#ibcon#wrote, iclass 7, count 0 2006.229.19:42:31.49#ibcon#about to read 3, iclass 7, count 0 2006.229.19:42:31.51#ibcon#read 3, iclass 7, count 0 2006.229.19:42:31.51#ibcon#about to read 4, iclass 7, count 0 2006.229.19:42:31.51#ibcon#read 4, iclass 7, count 0 2006.229.19:42:31.51#ibcon#about to read 5, iclass 7, count 0 2006.229.19:42:31.51#ibcon#read 5, iclass 7, count 0 2006.229.19:42:31.51#ibcon#about to read 6, iclass 7, count 0 2006.229.19:42:31.51#ibcon#read 6, iclass 7, count 0 2006.229.19:42:31.51#ibcon#end of sib2, iclass 7, count 0 2006.229.19:42:31.51#ibcon#*mode == 0, iclass 7, count 0 2006.229.19:42:31.51#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.19:42:31.51#ibcon#[27=USB\r\n] 2006.229.19:42:31.51#ibcon#*before write, iclass 7, count 0 2006.229.19:42:31.51#ibcon#enter sib2, iclass 7, count 0 2006.229.19:42:31.51#ibcon#flushed, iclass 7, count 0 2006.229.19:42:31.51#ibcon#about to write, iclass 7, count 0 2006.229.19:42:31.51#ibcon#wrote, iclass 7, count 0 2006.229.19:42:31.51#ibcon#about to read 3, iclass 7, count 0 2006.229.19:42:31.54#ibcon#read 3, iclass 7, count 0 2006.229.19:42:31.54#ibcon#about to read 4, iclass 7, count 0 2006.229.19:42:31.54#ibcon#read 4, iclass 7, count 0 2006.229.19:42:31.54#ibcon#about to read 5, iclass 7, count 0 2006.229.19:42:31.54#ibcon#read 5, iclass 7, count 0 2006.229.19:42:31.54#ibcon#about to read 6, iclass 7, count 0 2006.229.19:42:31.54#ibcon#read 6, iclass 7, count 0 2006.229.19:42:31.54#ibcon#end of sib2, iclass 7, count 0 2006.229.19:42:31.54#ibcon#*after write, iclass 7, count 0 2006.229.19:42:31.54#ibcon#*before return 0, iclass 7, count 0 2006.229.19:42:31.54#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:31.54#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.19:42:31.54#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.19:42:31.54#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.19:42:31.54$vck44/vblo=6,719.99 2006.229.19:42:31.54#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.19:42:31.54#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.19:42:31.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:31.54#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:31.54#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:31.54#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:31.54#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:42:31.54#ibcon#first serial, iclass 11, count 0 2006.229.19:42:31.54#ibcon#enter sib2, iclass 11, count 0 2006.229.19:42:31.54#ibcon#flushed, iclass 11, count 0 2006.229.19:42:31.54#ibcon#about to write, iclass 11, count 0 2006.229.19:42:31.54#ibcon#wrote, iclass 11, count 0 2006.229.19:42:31.54#ibcon#about to read 3, iclass 11, count 0 2006.229.19:42:31.56#ibcon#read 3, iclass 11, count 0 2006.229.19:42:31.56#ibcon#about to read 4, iclass 11, count 0 2006.229.19:42:31.56#ibcon#read 4, iclass 11, count 0 2006.229.19:42:31.56#ibcon#about to read 5, iclass 11, count 0 2006.229.19:42:31.56#ibcon#read 5, iclass 11, count 0 2006.229.19:42:31.56#ibcon#about to read 6, iclass 11, count 0 2006.229.19:42:31.56#ibcon#read 6, iclass 11, count 0 2006.229.19:42:31.56#ibcon#end of sib2, iclass 11, count 0 2006.229.19:42:31.56#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:42:31.56#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:42:31.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:42:31.56#ibcon#*before write, iclass 11, count 0 2006.229.19:42:31.56#ibcon#enter sib2, iclass 11, count 0 2006.229.19:42:31.56#ibcon#flushed, iclass 11, count 0 2006.229.19:42:31.56#ibcon#about to write, iclass 11, count 0 2006.229.19:42:31.56#ibcon#wrote, iclass 11, count 0 2006.229.19:42:31.56#ibcon#about to read 3, iclass 11, count 0 2006.229.19:42:31.60#ibcon#read 3, iclass 11, count 0 2006.229.19:42:31.60#ibcon#about to read 4, iclass 11, count 0 2006.229.19:42:31.60#ibcon#read 4, iclass 11, count 0 2006.229.19:42:31.60#ibcon#about to read 5, iclass 11, count 0 2006.229.19:42:31.60#ibcon#read 5, iclass 11, count 0 2006.229.19:42:31.60#ibcon#about to read 6, iclass 11, count 0 2006.229.19:42:31.60#ibcon#read 6, iclass 11, count 0 2006.229.19:42:31.60#ibcon#end of sib2, iclass 11, count 0 2006.229.19:42:31.60#ibcon#*after write, iclass 11, count 0 2006.229.19:42:31.60#ibcon#*before return 0, iclass 11, count 0 2006.229.19:42:31.60#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:31.60#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.19:42:31.60#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:42:31.60#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:42:31.60$vck44/vb=6,4 2006.229.19:42:31.60#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.19:42:31.60#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.19:42:31.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:31.60#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:31.66#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:31.66#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:31.66#ibcon#enter wrdev, iclass 13, count 2 2006.229.19:42:31.66#ibcon#first serial, iclass 13, count 2 2006.229.19:42:31.66#ibcon#enter sib2, iclass 13, count 2 2006.229.19:42:31.66#ibcon#flushed, iclass 13, count 2 2006.229.19:42:31.66#ibcon#about to write, iclass 13, count 2 2006.229.19:42:31.66#ibcon#wrote, iclass 13, count 2 2006.229.19:42:31.66#ibcon#about to read 3, iclass 13, count 2 2006.229.19:42:31.68#ibcon#read 3, iclass 13, count 2 2006.229.19:42:31.68#ibcon#about to read 4, iclass 13, count 2 2006.229.19:42:31.68#ibcon#read 4, iclass 13, count 2 2006.229.19:42:31.68#ibcon#about to read 5, iclass 13, count 2 2006.229.19:42:31.68#ibcon#read 5, iclass 13, count 2 2006.229.19:42:31.68#ibcon#about to read 6, iclass 13, count 2 2006.229.19:42:31.68#ibcon#read 6, iclass 13, count 2 2006.229.19:42:31.68#ibcon#end of sib2, iclass 13, count 2 2006.229.19:42:31.68#ibcon#*mode == 0, iclass 13, count 2 2006.229.19:42:31.68#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.19:42:31.68#ibcon#[27=AT06-04\r\n] 2006.229.19:42:31.68#ibcon#*before write, iclass 13, count 2 2006.229.19:42:31.68#ibcon#enter sib2, iclass 13, count 2 2006.229.19:42:31.68#ibcon#flushed, iclass 13, count 2 2006.229.19:42:31.68#ibcon#about to write, iclass 13, count 2 2006.229.19:42:31.68#ibcon#wrote, iclass 13, count 2 2006.229.19:42:31.68#ibcon#about to read 3, iclass 13, count 2 2006.229.19:42:31.71#ibcon#read 3, iclass 13, count 2 2006.229.19:42:31.71#ibcon#about to read 4, iclass 13, count 2 2006.229.19:42:31.71#ibcon#read 4, iclass 13, count 2 2006.229.19:42:31.71#ibcon#about to read 5, iclass 13, count 2 2006.229.19:42:31.71#ibcon#read 5, iclass 13, count 2 2006.229.19:42:31.71#ibcon#about to read 6, iclass 13, count 2 2006.229.19:42:31.71#ibcon#read 6, iclass 13, count 2 2006.229.19:42:31.71#ibcon#end of sib2, iclass 13, count 2 2006.229.19:42:31.71#ibcon#*after write, iclass 13, count 2 2006.229.19:42:31.71#ibcon#*before return 0, iclass 13, count 2 2006.229.19:42:31.71#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:31.71#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.19:42:31.71#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.19:42:31.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:31.71#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:31.83#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:31.83#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:31.83#ibcon#enter wrdev, iclass 13, count 0 2006.229.19:42:31.83#ibcon#first serial, iclass 13, count 0 2006.229.19:42:31.83#ibcon#enter sib2, iclass 13, count 0 2006.229.19:42:31.83#ibcon#flushed, iclass 13, count 0 2006.229.19:42:31.83#ibcon#about to write, iclass 13, count 0 2006.229.19:42:31.83#ibcon#wrote, iclass 13, count 0 2006.229.19:42:31.83#ibcon#about to read 3, iclass 13, count 0 2006.229.19:42:31.85#ibcon#read 3, iclass 13, count 0 2006.229.19:42:31.85#ibcon#about to read 4, iclass 13, count 0 2006.229.19:42:31.85#ibcon#read 4, iclass 13, count 0 2006.229.19:42:31.85#ibcon#about to read 5, iclass 13, count 0 2006.229.19:42:31.85#ibcon#read 5, iclass 13, count 0 2006.229.19:42:31.85#ibcon#about to read 6, iclass 13, count 0 2006.229.19:42:31.85#ibcon#read 6, iclass 13, count 0 2006.229.19:42:31.85#ibcon#end of sib2, iclass 13, count 0 2006.229.19:42:31.85#ibcon#*mode == 0, iclass 13, count 0 2006.229.19:42:31.85#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.19:42:31.85#ibcon#[27=USB\r\n] 2006.229.19:42:31.85#ibcon#*before write, iclass 13, count 0 2006.229.19:42:31.85#ibcon#enter sib2, iclass 13, count 0 2006.229.19:42:31.85#ibcon#flushed, iclass 13, count 0 2006.229.19:42:31.85#ibcon#about to write, iclass 13, count 0 2006.229.19:42:31.85#ibcon#wrote, iclass 13, count 0 2006.229.19:42:31.85#ibcon#about to read 3, iclass 13, count 0 2006.229.19:42:31.88#ibcon#read 3, iclass 13, count 0 2006.229.19:42:31.88#ibcon#about to read 4, iclass 13, count 0 2006.229.19:42:31.88#ibcon#read 4, iclass 13, count 0 2006.229.19:42:31.88#ibcon#about to read 5, iclass 13, count 0 2006.229.19:42:31.88#ibcon#read 5, iclass 13, count 0 2006.229.19:42:31.88#ibcon#about to read 6, iclass 13, count 0 2006.229.19:42:31.88#ibcon#read 6, iclass 13, count 0 2006.229.19:42:31.88#ibcon#end of sib2, iclass 13, count 0 2006.229.19:42:31.88#ibcon#*after write, iclass 13, count 0 2006.229.19:42:31.88#ibcon#*before return 0, iclass 13, count 0 2006.229.19:42:31.88#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:31.88#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.19:42:31.88#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.19:42:31.88#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.19:42:31.88$vck44/vblo=7,734.99 2006.229.19:42:31.88#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.19:42:31.88#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.19:42:31.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:31.88#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:31.88#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:31.88#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:31.88#ibcon#enter wrdev, iclass 15, count 0 2006.229.19:42:31.88#ibcon#first serial, iclass 15, count 0 2006.229.19:42:31.88#ibcon#enter sib2, iclass 15, count 0 2006.229.19:42:31.88#ibcon#flushed, iclass 15, count 0 2006.229.19:42:31.88#ibcon#about to write, iclass 15, count 0 2006.229.19:42:31.88#ibcon#wrote, iclass 15, count 0 2006.229.19:42:31.88#ibcon#about to read 3, iclass 15, count 0 2006.229.19:42:31.90#ibcon#read 3, iclass 15, count 0 2006.229.19:42:31.90#ibcon#about to read 4, iclass 15, count 0 2006.229.19:42:31.90#ibcon#read 4, iclass 15, count 0 2006.229.19:42:31.90#ibcon#about to read 5, iclass 15, count 0 2006.229.19:42:31.90#ibcon#read 5, iclass 15, count 0 2006.229.19:42:31.90#ibcon#about to read 6, iclass 15, count 0 2006.229.19:42:31.90#ibcon#read 6, iclass 15, count 0 2006.229.19:42:31.90#ibcon#end of sib2, iclass 15, count 0 2006.229.19:42:31.90#ibcon#*mode == 0, iclass 15, count 0 2006.229.19:42:31.90#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.19:42:31.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:42:31.90#ibcon#*before write, iclass 15, count 0 2006.229.19:42:31.90#ibcon#enter sib2, iclass 15, count 0 2006.229.19:42:31.90#ibcon#flushed, iclass 15, count 0 2006.229.19:42:31.90#ibcon#about to write, iclass 15, count 0 2006.229.19:42:31.90#ibcon#wrote, iclass 15, count 0 2006.229.19:42:31.90#ibcon#about to read 3, iclass 15, count 0 2006.229.19:42:31.94#ibcon#read 3, iclass 15, count 0 2006.229.19:42:31.94#ibcon#about to read 4, iclass 15, count 0 2006.229.19:42:31.94#ibcon#read 4, iclass 15, count 0 2006.229.19:42:31.94#ibcon#about to read 5, iclass 15, count 0 2006.229.19:42:31.94#ibcon#read 5, iclass 15, count 0 2006.229.19:42:31.94#ibcon#about to read 6, iclass 15, count 0 2006.229.19:42:31.94#ibcon#read 6, iclass 15, count 0 2006.229.19:42:31.94#ibcon#end of sib2, iclass 15, count 0 2006.229.19:42:31.94#ibcon#*after write, iclass 15, count 0 2006.229.19:42:31.94#ibcon#*before return 0, iclass 15, count 0 2006.229.19:42:31.94#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:31.94#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.19:42:31.94#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.19:42:31.94#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.19:42:31.94$vck44/vb=7,4 2006.229.19:42:31.94#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.19:42:31.94#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.19:42:31.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:31.94#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:32.00#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:32.00#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:32.00#ibcon#enter wrdev, iclass 17, count 2 2006.229.19:42:32.00#ibcon#first serial, iclass 17, count 2 2006.229.19:42:32.00#ibcon#enter sib2, iclass 17, count 2 2006.229.19:42:32.00#ibcon#flushed, iclass 17, count 2 2006.229.19:42:32.00#ibcon#about to write, iclass 17, count 2 2006.229.19:42:32.00#ibcon#wrote, iclass 17, count 2 2006.229.19:42:32.00#ibcon#about to read 3, iclass 17, count 2 2006.229.19:42:32.02#ibcon#read 3, iclass 17, count 2 2006.229.19:42:32.02#ibcon#about to read 4, iclass 17, count 2 2006.229.19:42:32.02#ibcon#read 4, iclass 17, count 2 2006.229.19:42:32.02#ibcon#about to read 5, iclass 17, count 2 2006.229.19:42:32.02#ibcon#read 5, iclass 17, count 2 2006.229.19:42:32.02#ibcon#about to read 6, iclass 17, count 2 2006.229.19:42:32.02#ibcon#read 6, iclass 17, count 2 2006.229.19:42:32.02#ibcon#end of sib2, iclass 17, count 2 2006.229.19:42:32.02#ibcon#*mode == 0, iclass 17, count 2 2006.229.19:42:32.02#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.19:42:32.02#ibcon#[27=AT07-04\r\n] 2006.229.19:42:32.02#ibcon#*before write, iclass 17, count 2 2006.229.19:42:32.02#ibcon#enter sib2, iclass 17, count 2 2006.229.19:42:32.02#ibcon#flushed, iclass 17, count 2 2006.229.19:42:32.02#ibcon#about to write, iclass 17, count 2 2006.229.19:42:32.02#ibcon#wrote, iclass 17, count 2 2006.229.19:42:32.02#ibcon#about to read 3, iclass 17, count 2 2006.229.19:42:32.05#ibcon#read 3, iclass 17, count 2 2006.229.19:42:32.05#ibcon#about to read 4, iclass 17, count 2 2006.229.19:42:32.05#ibcon#read 4, iclass 17, count 2 2006.229.19:42:32.05#ibcon#about to read 5, iclass 17, count 2 2006.229.19:42:32.05#ibcon#read 5, iclass 17, count 2 2006.229.19:42:32.05#ibcon#about to read 6, iclass 17, count 2 2006.229.19:42:32.05#ibcon#read 6, iclass 17, count 2 2006.229.19:42:32.05#ibcon#end of sib2, iclass 17, count 2 2006.229.19:42:32.05#ibcon#*after write, iclass 17, count 2 2006.229.19:42:32.05#ibcon#*before return 0, iclass 17, count 2 2006.229.19:42:32.05#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:32.05#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.19:42:32.05#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.19:42:32.05#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:32.05#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:32.17#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:32.17#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:32.17#ibcon#enter wrdev, iclass 17, count 0 2006.229.19:42:32.17#ibcon#first serial, iclass 17, count 0 2006.229.19:42:32.17#ibcon#enter sib2, iclass 17, count 0 2006.229.19:42:32.17#ibcon#flushed, iclass 17, count 0 2006.229.19:42:32.17#ibcon#about to write, iclass 17, count 0 2006.229.19:42:32.17#ibcon#wrote, iclass 17, count 0 2006.229.19:42:32.17#ibcon#about to read 3, iclass 17, count 0 2006.229.19:42:32.19#ibcon#read 3, iclass 17, count 0 2006.229.19:42:32.19#ibcon#about to read 4, iclass 17, count 0 2006.229.19:42:32.19#ibcon#read 4, iclass 17, count 0 2006.229.19:42:32.19#ibcon#about to read 5, iclass 17, count 0 2006.229.19:42:32.19#ibcon#read 5, iclass 17, count 0 2006.229.19:42:32.19#ibcon#about to read 6, iclass 17, count 0 2006.229.19:42:32.19#ibcon#read 6, iclass 17, count 0 2006.229.19:42:32.19#ibcon#end of sib2, iclass 17, count 0 2006.229.19:42:32.19#ibcon#*mode == 0, iclass 17, count 0 2006.229.19:42:32.19#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.19:42:32.19#ibcon#[27=USB\r\n] 2006.229.19:42:32.19#ibcon#*before write, iclass 17, count 0 2006.229.19:42:32.19#ibcon#enter sib2, iclass 17, count 0 2006.229.19:42:32.19#ibcon#flushed, iclass 17, count 0 2006.229.19:42:32.19#ibcon#about to write, iclass 17, count 0 2006.229.19:42:32.19#ibcon#wrote, iclass 17, count 0 2006.229.19:42:32.19#ibcon#about to read 3, iclass 17, count 0 2006.229.19:42:32.22#ibcon#read 3, iclass 17, count 0 2006.229.19:42:32.22#ibcon#about to read 4, iclass 17, count 0 2006.229.19:42:32.22#ibcon#read 4, iclass 17, count 0 2006.229.19:42:32.22#ibcon#about to read 5, iclass 17, count 0 2006.229.19:42:32.22#ibcon#read 5, iclass 17, count 0 2006.229.19:42:32.22#ibcon#about to read 6, iclass 17, count 0 2006.229.19:42:32.22#ibcon#read 6, iclass 17, count 0 2006.229.19:42:32.22#ibcon#end of sib2, iclass 17, count 0 2006.229.19:42:32.22#ibcon#*after write, iclass 17, count 0 2006.229.19:42:32.22#ibcon#*before return 0, iclass 17, count 0 2006.229.19:42:32.22#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:32.22#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.19:42:32.22#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.19:42:32.22#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.19:42:32.22$vck44/vblo=8,744.99 2006.229.19:42:32.22#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.19:42:32.22#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.19:42:32.22#ibcon#ireg 17 cls_cnt 0 2006.229.19:42:32.22#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:32.22#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:32.22#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:32.22#ibcon#enter wrdev, iclass 19, count 0 2006.229.19:42:32.22#ibcon#first serial, iclass 19, count 0 2006.229.19:42:32.22#ibcon#enter sib2, iclass 19, count 0 2006.229.19:42:32.22#ibcon#flushed, iclass 19, count 0 2006.229.19:42:32.22#ibcon#about to write, iclass 19, count 0 2006.229.19:42:32.22#ibcon#wrote, iclass 19, count 0 2006.229.19:42:32.22#ibcon#about to read 3, iclass 19, count 0 2006.229.19:42:32.24#ibcon#read 3, iclass 19, count 0 2006.229.19:42:32.24#ibcon#about to read 4, iclass 19, count 0 2006.229.19:42:32.24#ibcon#read 4, iclass 19, count 0 2006.229.19:42:32.24#ibcon#about to read 5, iclass 19, count 0 2006.229.19:42:32.24#ibcon#read 5, iclass 19, count 0 2006.229.19:42:32.24#ibcon#about to read 6, iclass 19, count 0 2006.229.19:42:32.24#ibcon#read 6, iclass 19, count 0 2006.229.19:42:32.24#ibcon#end of sib2, iclass 19, count 0 2006.229.19:42:32.24#ibcon#*mode == 0, iclass 19, count 0 2006.229.19:42:32.24#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.19:42:32.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:42:32.24#ibcon#*before write, iclass 19, count 0 2006.229.19:42:32.24#ibcon#enter sib2, iclass 19, count 0 2006.229.19:42:32.24#ibcon#flushed, iclass 19, count 0 2006.229.19:42:32.24#ibcon#about to write, iclass 19, count 0 2006.229.19:42:32.24#ibcon#wrote, iclass 19, count 0 2006.229.19:42:32.24#ibcon#about to read 3, iclass 19, count 0 2006.229.19:42:32.28#ibcon#read 3, iclass 19, count 0 2006.229.19:42:32.28#ibcon#about to read 4, iclass 19, count 0 2006.229.19:42:32.28#ibcon#read 4, iclass 19, count 0 2006.229.19:42:32.28#ibcon#about to read 5, iclass 19, count 0 2006.229.19:42:32.28#ibcon#read 5, iclass 19, count 0 2006.229.19:42:32.28#ibcon#about to read 6, iclass 19, count 0 2006.229.19:42:32.28#ibcon#read 6, iclass 19, count 0 2006.229.19:42:32.28#ibcon#end of sib2, iclass 19, count 0 2006.229.19:42:32.28#ibcon#*after write, iclass 19, count 0 2006.229.19:42:32.28#ibcon#*before return 0, iclass 19, count 0 2006.229.19:42:32.28#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:32.28#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.19:42:32.28#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.19:42:32.28#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.19:42:32.28$vck44/vb=8,4 2006.229.19:42:32.28#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.19:42:32.28#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.19:42:32.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:42:32.28#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:32.34#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:32.34#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:32.34#ibcon#enter wrdev, iclass 21, count 2 2006.229.19:42:32.34#ibcon#first serial, iclass 21, count 2 2006.229.19:42:32.34#ibcon#enter sib2, iclass 21, count 2 2006.229.19:42:32.34#ibcon#flushed, iclass 21, count 2 2006.229.19:42:32.34#ibcon#about to write, iclass 21, count 2 2006.229.19:42:32.34#ibcon#wrote, iclass 21, count 2 2006.229.19:42:32.34#ibcon#about to read 3, iclass 21, count 2 2006.229.19:42:32.36#ibcon#read 3, iclass 21, count 2 2006.229.19:42:32.36#ibcon#about to read 4, iclass 21, count 2 2006.229.19:42:32.36#ibcon#read 4, iclass 21, count 2 2006.229.19:42:32.36#ibcon#about to read 5, iclass 21, count 2 2006.229.19:42:32.36#ibcon#read 5, iclass 21, count 2 2006.229.19:42:32.36#ibcon#about to read 6, iclass 21, count 2 2006.229.19:42:32.36#ibcon#read 6, iclass 21, count 2 2006.229.19:42:32.36#ibcon#end of sib2, iclass 21, count 2 2006.229.19:42:32.36#ibcon#*mode == 0, iclass 21, count 2 2006.229.19:42:32.36#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.19:42:32.36#ibcon#[27=AT08-04\r\n] 2006.229.19:42:32.36#ibcon#*before write, iclass 21, count 2 2006.229.19:42:32.36#ibcon#enter sib2, iclass 21, count 2 2006.229.19:42:32.36#ibcon#flushed, iclass 21, count 2 2006.229.19:42:32.36#ibcon#about to write, iclass 21, count 2 2006.229.19:42:32.36#ibcon#wrote, iclass 21, count 2 2006.229.19:42:32.36#ibcon#about to read 3, iclass 21, count 2 2006.229.19:42:32.39#ibcon#read 3, iclass 21, count 2 2006.229.19:42:32.39#ibcon#about to read 4, iclass 21, count 2 2006.229.19:42:32.39#ibcon#read 4, iclass 21, count 2 2006.229.19:42:32.39#ibcon#about to read 5, iclass 21, count 2 2006.229.19:42:32.39#ibcon#read 5, iclass 21, count 2 2006.229.19:42:32.39#ibcon#about to read 6, iclass 21, count 2 2006.229.19:42:32.39#ibcon#read 6, iclass 21, count 2 2006.229.19:42:32.39#ibcon#end of sib2, iclass 21, count 2 2006.229.19:42:32.39#ibcon#*after write, iclass 21, count 2 2006.229.19:42:32.39#ibcon#*before return 0, iclass 21, count 2 2006.229.19:42:32.39#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:32.39#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.19:42:32.39#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.19:42:32.39#ibcon#ireg 7 cls_cnt 0 2006.229.19:42:32.39#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:32.51#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:32.51#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:32.51#ibcon#enter wrdev, iclass 21, count 0 2006.229.19:42:32.51#ibcon#first serial, iclass 21, count 0 2006.229.19:42:32.51#ibcon#enter sib2, iclass 21, count 0 2006.229.19:42:32.51#ibcon#flushed, iclass 21, count 0 2006.229.19:42:32.51#ibcon#about to write, iclass 21, count 0 2006.229.19:42:32.51#ibcon#wrote, iclass 21, count 0 2006.229.19:42:32.51#ibcon#about to read 3, iclass 21, count 0 2006.229.19:42:32.53#ibcon#read 3, iclass 21, count 0 2006.229.19:42:32.53#ibcon#about to read 4, iclass 21, count 0 2006.229.19:42:32.53#ibcon#read 4, iclass 21, count 0 2006.229.19:42:32.53#ibcon#about to read 5, iclass 21, count 0 2006.229.19:42:32.53#ibcon#read 5, iclass 21, count 0 2006.229.19:42:32.53#ibcon#about to read 6, iclass 21, count 0 2006.229.19:42:32.53#ibcon#read 6, iclass 21, count 0 2006.229.19:42:32.53#ibcon#end of sib2, iclass 21, count 0 2006.229.19:42:32.53#ibcon#*mode == 0, iclass 21, count 0 2006.229.19:42:32.53#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.19:42:32.53#ibcon#[27=USB\r\n] 2006.229.19:42:32.53#ibcon#*before write, iclass 21, count 0 2006.229.19:42:32.53#ibcon#enter sib2, iclass 21, count 0 2006.229.19:42:32.53#ibcon#flushed, iclass 21, count 0 2006.229.19:42:32.53#ibcon#about to write, iclass 21, count 0 2006.229.19:42:32.53#ibcon#wrote, iclass 21, count 0 2006.229.19:42:32.53#ibcon#about to read 3, iclass 21, count 0 2006.229.19:42:32.56#ibcon#read 3, iclass 21, count 0 2006.229.19:42:32.56#ibcon#about to read 4, iclass 21, count 0 2006.229.19:42:32.56#ibcon#read 4, iclass 21, count 0 2006.229.19:42:32.56#ibcon#about to read 5, iclass 21, count 0 2006.229.19:42:32.56#ibcon#read 5, iclass 21, count 0 2006.229.19:42:32.56#ibcon#about to read 6, iclass 21, count 0 2006.229.19:42:32.56#ibcon#read 6, iclass 21, count 0 2006.229.19:42:32.56#ibcon#end of sib2, iclass 21, count 0 2006.229.19:42:32.56#ibcon#*after write, iclass 21, count 0 2006.229.19:42:32.56#ibcon#*before return 0, iclass 21, count 0 2006.229.19:42:32.56#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:32.56#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.19:42:32.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.19:42:32.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.19:42:32.56$vck44/vabw=wide 2006.229.19:42:32.56#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.19:42:32.56#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.19:42:32.56#ibcon#ireg 8 cls_cnt 0 2006.229.19:42:32.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:32.56#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:32.56#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:32.56#ibcon#enter wrdev, iclass 23, count 0 2006.229.19:42:32.56#ibcon#first serial, iclass 23, count 0 2006.229.19:42:32.56#ibcon#enter sib2, iclass 23, count 0 2006.229.19:42:32.56#ibcon#flushed, iclass 23, count 0 2006.229.19:42:32.56#ibcon#about to write, iclass 23, count 0 2006.229.19:42:32.56#ibcon#wrote, iclass 23, count 0 2006.229.19:42:32.56#ibcon#about to read 3, iclass 23, count 0 2006.229.19:42:32.58#ibcon#read 3, iclass 23, count 0 2006.229.19:42:32.58#ibcon#about to read 4, iclass 23, count 0 2006.229.19:42:32.58#ibcon#read 4, iclass 23, count 0 2006.229.19:42:32.58#ibcon#about to read 5, iclass 23, count 0 2006.229.19:42:32.58#ibcon#read 5, iclass 23, count 0 2006.229.19:42:32.58#ibcon#about to read 6, iclass 23, count 0 2006.229.19:42:32.58#ibcon#read 6, iclass 23, count 0 2006.229.19:42:32.58#ibcon#end of sib2, iclass 23, count 0 2006.229.19:42:32.58#ibcon#*mode == 0, iclass 23, count 0 2006.229.19:42:32.58#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.19:42:32.58#ibcon#[25=BW32\r\n] 2006.229.19:42:32.58#ibcon#*before write, iclass 23, count 0 2006.229.19:42:32.58#ibcon#enter sib2, iclass 23, count 0 2006.229.19:42:32.58#ibcon#flushed, iclass 23, count 0 2006.229.19:42:32.58#ibcon#about to write, iclass 23, count 0 2006.229.19:42:32.58#ibcon#wrote, iclass 23, count 0 2006.229.19:42:32.58#ibcon#about to read 3, iclass 23, count 0 2006.229.19:42:32.61#ibcon#read 3, iclass 23, count 0 2006.229.19:42:32.61#ibcon#about to read 4, iclass 23, count 0 2006.229.19:42:32.61#ibcon#read 4, iclass 23, count 0 2006.229.19:42:32.61#ibcon#about to read 5, iclass 23, count 0 2006.229.19:42:32.61#ibcon#read 5, iclass 23, count 0 2006.229.19:42:32.61#ibcon#about to read 6, iclass 23, count 0 2006.229.19:42:32.61#ibcon#read 6, iclass 23, count 0 2006.229.19:42:32.61#ibcon#end of sib2, iclass 23, count 0 2006.229.19:42:32.61#ibcon#*after write, iclass 23, count 0 2006.229.19:42:32.61#ibcon#*before return 0, iclass 23, count 0 2006.229.19:42:32.61#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:32.61#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.19:42:32.61#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.19:42:32.61#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.19:42:32.61$vck44/vbbw=wide 2006.229.19:42:32.61#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.19:42:32.61#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.19:42:32.61#ibcon#ireg 8 cls_cnt 0 2006.229.19:42:32.61#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:42:32.68#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:42:32.68#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:42:32.68#ibcon#enter wrdev, iclass 25, count 0 2006.229.19:42:32.68#ibcon#first serial, iclass 25, count 0 2006.229.19:42:32.68#ibcon#enter sib2, iclass 25, count 0 2006.229.19:42:32.68#ibcon#flushed, iclass 25, count 0 2006.229.19:42:32.68#ibcon#about to write, iclass 25, count 0 2006.229.19:42:32.68#ibcon#wrote, iclass 25, count 0 2006.229.19:42:32.68#ibcon#about to read 3, iclass 25, count 0 2006.229.19:42:32.70#ibcon#read 3, iclass 25, count 0 2006.229.19:42:32.70#ibcon#about to read 4, iclass 25, count 0 2006.229.19:42:32.70#ibcon#read 4, iclass 25, count 0 2006.229.19:42:32.70#ibcon#about to read 5, iclass 25, count 0 2006.229.19:42:32.70#ibcon#read 5, iclass 25, count 0 2006.229.19:42:32.70#ibcon#about to read 6, iclass 25, count 0 2006.229.19:42:32.70#ibcon#read 6, iclass 25, count 0 2006.229.19:42:32.70#ibcon#end of sib2, iclass 25, count 0 2006.229.19:42:32.70#ibcon#*mode == 0, iclass 25, count 0 2006.229.19:42:32.70#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.19:42:32.70#ibcon#[27=BW32\r\n] 2006.229.19:42:32.70#ibcon#*before write, iclass 25, count 0 2006.229.19:42:32.70#ibcon#enter sib2, iclass 25, count 0 2006.229.19:42:32.70#ibcon#flushed, iclass 25, count 0 2006.229.19:42:32.70#ibcon#about to write, iclass 25, count 0 2006.229.19:42:32.70#ibcon#wrote, iclass 25, count 0 2006.229.19:42:32.70#ibcon#about to read 3, iclass 25, count 0 2006.229.19:42:32.73#ibcon#read 3, iclass 25, count 0 2006.229.19:42:32.73#ibcon#about to read 4, iclass 25, count 0 2006.229.19:42:32.73#ibcon#read 4, iclass 25, count 0 2006.229.19:42:32.73#ibcon#about to read 5, iclass 25, count 0 2006.229.19:42:32.73#ibcon#read 5, iclass 25, count 0 2006.229.19:42:32.73#ibcon#about to read 6, iclass 25, count 0 2006.229.19:42:32.73#ibcon#read 6, iclass 25, count 0 2006.229.19:42:32.73#ibcon#end of sib2, iclass 25, count 0 2006.229.19:42:32.73#ibcon#*after write, iclass 25, count 0 2006.229.19:42:32.73#ibcon#*before return 0, iclass 25, count 0 2006.229.19:42:32.73#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:42:32.73#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.19:42:32.73#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.19:42:32.73#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.19:42:32.73$setupk4/ifdk4 2006.229.19:42:32.73$ifdk4/lo= 2006.229.19:42:32.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:42:32.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:42:32.73$ifdk4/patch= 2006.229.19:42:32.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:42:32.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:42:32.74$setupk4/!*+20s 2006.229.19:42:36.31#abcon#<5=/06 2.2 3.9 26.021001001.5\r\n> 2006.229.19:42:36.33#abcon#{5=INTERFACE CLEAR} 2006.229.19:42:36.39#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:42:45.14#trakl#Source acquired 2006.229.19:42:46.14#flagr#flagr/antenna,acquired 2006.229.19:42:46.48#abcon#<5=/06 2.2 3.8 26.021001001.6\r\n> 2006.229.19:42:46.50#abcon#{5=INTERFACE CLEAR} 2006.229.19:42:46.56#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:42:47.25$setupk4/"tpicd 2006.229.19:42:47.25$setupk4/echo=off 2006.229.19:42:47.25$setupk4/xlog=off 2006.229.19:42:47.25:!2006.229.19:46:43 2006.229.19:46:43.00:preob 2006.229.19:46:44.14/onsource/TRACKING 2006.229.19:46:44.14:!2006.229.19:46:53 2006.229.19:46:53.00:"tape 2006.229.19:46:53.00:"st=record 2006.229.19:46:53.00:data_valid=on 2006.229.19:46:53.00:midob 2006.229.19:46:53.14/onsource/TRACKING 2006.229.19:46:53.14/wx/26.02,1001.6,100 2006.229.19:46:53.22/cable/+6.4193E-03 2006.229.19:46:54.31/va/01,08,usb,yes,30,32 2006.229.19:46:54.31/va/02,07,usb,yes,32,33 2006.229.19:46:54.31/va/03,06,usb,yes,40,42 2006.229.19:46:54.31/va/04,07,usb,yes,33,35 2006.229.19:46:54.31/va/05,04,usb,yes,30,30 2006.229.19:46:54.31/va/06,04,usb,yes,33,33 2006.229.19:46:54.31/va/07,05,usb,yes,29,30 2006.229.19:46:54.31/va/08,06,usb,yes,21,26 2006.229.19:46:54.54/valo/01,524.99,yes,locked 2006.229.19:46:54.54/valo/02,534.99,yes,locked 2006.229.19:46:54.54/valo/03,564.99,yes,locked 2006.229.19:46:54.54/valo/04,624.99,yes,locked 2006.229.19:46:54.54/valo/05,734.99,yes,locked 2006.229.19:46:54.54/valo/06,814.99,yes,locked 2006.229.19:46:54.54/valo/07,864.99,yes,locked 2006.229.19:46:54.54/valo/08,884.99,yes,locked 2006.229.19:46:55.63/vb/01,04,usb,yes,31,29 2006.229.19:46:55.63/vb/02,04,usb,yes,34,34 2006.229.19:46:55.63/vb/03,04,usb,yes,31,34 2006.229.19:46:55.63/vb/04,04,usb,yes,35,34 2006.229.19:46:55.63/vb/05,04,usb,yes,27,30 2006.229.19:46:55.63/vb/06,04,usb,yes,32,28 2006.229.19:46:55.63/vb/07,04,usb,yes,32,31 2006.229.19:46:55.63/vb/08,04,usb,yes,29,33 2006.229.19:46:55.86/vblo/01,629.99,yes,locked 2006.229.19:46:55.86/vblo/02,634.99,yes,locked 2006.229.19:46:55.86/vblo/03,649.99,yes,locked 2006.229.19:46:55.86/vblo/04,679.99,yes,locked 2006.229.19:46:55.86/vblo/05,709.99,yes,locked 2006.229.19:46:55.86/vblo/06,719.99,yes,locked 2006.229.19:46:55.86/vblo/07,734.99,yes,locked 2006.229.19:46:55.86/vblo/08,744.99,yes,locked 2006.229.19:46:56.01/vabw/8 2006.229.19:46:56.16/vbbw/8 2006.229.19:46:56.25/xfe/off,on,12.0 2006.229.19:46:56.64/ifatt/23,28,28,28 2006.229.19:46:57.07/fmout-gps/S +4.48E-07 2006.229.19:46:57.11:!2006.229.19:54:23 2006.229.19:54:23.00:data_valid=off 2006.229.19:54:23.00:"et 2006.229.19:54:23.00:!+3s 2006.229.19:54:26.01:"tape 2006.229.19:54:26.01:postob 2006.229.19:54:26.25/cable/+6.4175E-03 2006.229.19:54:26.25/wx/26.02,1001.7,100 2006.229.19:54:27.08/fmout-gps/S +4.48E-07 2006.229.19:54:27.08:scan_name=229-2000,jd0608,40 2006.229.19:54:27.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.229.19:54:27.14#flagr#flagr/antenna,new-source 2006.229.19:54:28.14:checkk5 2006.229.19:54:28.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.19:54:28.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.19:54:29.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.19:54:29.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.19:54:30.11/chk_obsdata//k5ts1/T2291946??a.dat file size is correct (nominal:1800MB, actual:1800MB). 2006.229.19:54:30.51/chk_obsdata//k5ts2/T2291946??b.dat file size is correct (nominal:1800MB, actual:1800MB). 2006.229.19:54:30.91/chk_obsdata//k5ts3/T2291946??c.dat file size is correct (nominal:1800MB, actual:1800MB). 2006.229.19:54:31.32/chk_obsdata//k5ts4/T2291946??d.dat file size is correct (nominal:1800MB, actual:1800MB). 2006.229.19:54:32.04/k5log//k5ts1_log_newline 2006.229.19:54:32.75/k5log//k5ts2_log_newline 2006.229.19:54:33.46/k5log//k5ts3_log_newline 2006.229.19:54:34.17/k5log//k5ts4_log_newline 2006.229.19:54:34.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.19:54:34.20:setupk4=1 2006.229.19:54:34.20$setupk4/echo=on 2006.229.19:54:34.20$setupk4/pcalon 2006.229.19:54:34.20$pcalon/"no phase cal control is implemented here 2006.229.19:54:34.20$setupk4/"tpicd=stop 2006.229.19:54:34.20$setupk4/"rec=synch_on 2006.229.19:54:34.20$setupk4/"rec_mode=128 2006.229.19:54:34.20$setupk4/!* 2006.229.19:54:34.20$setupk4/recpk4 2006.229.19:54:34.20$recpk4/recpatch= 2006.229.19:54:34.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.19:54:34.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.19:54:34.21$setupk4/vck44 2006.229.19:54:34.21$vck44/valo=1,524.99 2006.229.19:54:34.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.19:54:34.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.19:54:34.21#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:34.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:34.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:34.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:34.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:54:34.21#ibcon#first serial, iclass 26, count 0 2006.229.19:54:34.21#ibcon#enter sib2, iclass 26, count 0 2006.229.19:54:34.21#ibcon#flushed, iclass 26, count 0 2006.229.19:54:34.21#ibcon#about to write, iclass 26, count 0 2006.229.19:54:34.21#ibcon#wrote, iclass 26, count 0 2006.229.19:54:34.21#ibcon#about to read 3, iclass 26, count 0 2006.229.19:54:34.23#ibcon#read 3, iclass 26, count 0 2006.229.19:54:34.23#ibcon#about to read 4, iclass 26, count 0 2006.229.19:54:34.23#ibcon#read 4, iclass 26, count 0 2006.229.19:54:34.23#ibcon#about to read 5, iclass 26, count 0 2006.229.19:54:34.23#ibcon#read 5, iclass 26, count 0 2006.229.19:54:34.23#ibcon#about to read 6, iclass 26, count 0 2006.229.19:54:34.23#ibcon#read 6, iclass 26, count 0 2006.229.19:54:34.23#ibcon#end of sib2, iclass 26, count 0 2006.229.19:54:34.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:54:34.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:54:34.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.19:54:34.23#ibcon#*before write, iclass 26, count 0 2006.229.19:54:34.23#ibcon#enter sib2, iclass 26, count 0 2006.229.19:54:34.23#ibcon#flushed, iclass 26, count 0 2006.229.19:54:34.23#ibcon#about to write, iclass 26, count 0 2006.229.19:54:34.23#ibcon#wrote, iclass 26, count 0 2006.229.19:54:34.23#ibcon#about to read 3, iclass 26, count 0 2006.229.19:54:34.28#ibcon#read 3, iclass 26, count 0 2006.229.19:54:34.28#ibcon#about to read 4, iclass 26, count 0 2006.229.19:54:34.28#ibcon#read 4, iclass 26, count 0 2006.229.19:54:34.28#ibcon#about to read 5, iclass 26, count 0 2006.229.19:54:34.28#ibcon#read 5, iclass 26, count 0 2006.229.19:54:34.28#ibcon#about to read 6, iclass 26, count 0 2006.229.19:54:34.28#ibcon#read 6, iclass 26, count 0 2006.229.19:54:34.28#ibcon#end of sib2, iclass 26, count 0 2006.229.19:54:34.28#ibcon#*after write, iclass 26, count 0 2006.229.19:54:34.28#ibcon#*before return 0, iclass 26, count 0 2006.229.19:54:34.28#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:34.28#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:34.28#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:54:34.28#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:54:34.28$vck44/va=1,8 2006.229.19:54:34.28#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.19:54:34.28#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.19:54:34.28#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:34.28#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:34.28#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:34.28#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:34.28#ibcon#enter wrdev, iclass 28, count 2 2006.229.19:54:34.28#ibcon#first serial, iclass 28, count 2 2006.229.19:54:34.28#ibcon#enter sib2, iclass 28, count 2 2006.229.19:54:34.28#ibcon#flushed, iclass 28, count 2 2006.229.19:54:34.28#ibcon#about to write, iclass 28, count 2 2006.229.19:54:34.28#ibcon#wrote, iclass 28, count 2 2006.229.19:54:34.28#ibcon#about to read 3, iclass 28, count 2 2006.229.19:54:34.30#ibcon#read 3, iclass 28, count 2 2006.229.19:54:34.30#ibcon#about to read 4, iclass 28, count 2 2006.229.19:54:34.30#ibcon#read 4, iclass 28, count 2 2006.229.19:54:34.30#ibcon#about to read 5, iclass 28, count 2 2006.229.19:54:34.30#ibcon#read 5, iclass 28, count 2 2006.229.19:54:34.30#ibcon#about to read 6, iclass 28, count 2 2006.229.19:54:34.30#ibcon#read 6, iclass 28, count 2 2006.229.19:54:34.30#ibcon#end of sib2, iclass 28, count 2 2006.229.19:54:34.30#ibcon#*mode == 0, iclass 28, count 2 2006.229.19:54:34.30#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.19:54:34.30#ibcon#[25=AT01-08\r\n] 2006.229.19:54:34.30#ibcon#*before write, iclass 28, count 2 2006.229.19:54:34.30#ibcon#enter sib2, iclass 28, count 2 2006.229.19:54:34.30#ibcon#flushed, iclass 28, count 2 2006.229.19:54:34.30#ibcon#about to write, iclass 28, count 2 2006.229.19:54:34.30#ibcon#wrote, iclass 28, count 2 2006.229.19:54:34.30#ibcon#about to read 3, iclass 28, count 2 2006.229.19:54:34.33#ibcon#read 3, iclass 28, count 2 2006.229.19:54:34.33#ibcon#about to read 4, iclass 28, count 2 2006.229.19:54:34.33#ibcon#read 4, iclass 28, count 2 2006.229.19:54:34.33#ibcon#about to read 5, iclass 28, count 2 2006.229.19:54:34.33#ibcon#read 5, iclass 28, count 2 2006.229.19:54:34.33#ibcon#about to read 6, iclass 28, count 2 2006.229.19:54:34.33#ibcon#read 6, iclass 28, count 2 2006.229.19:54:34.33#ibcon#end of sib2, iclass 28, count 2 2006.229.19:54:34.33#ibcon#*after write, iclass 28, count 2 2006.229.19:54:34.33#ibcon#*before return 0, iclass 28, count 2 2006.229.19:54:34.33#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:34.33#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:34.33#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.19:54:34.33#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:34.33#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:34.45#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:34.45#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:34.45#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:54:34.45#ibcon#first serial, iclass 28, count 0 2006.229.19:54:34.45#ibcon#enter sib2, iclass 28, count 0 2006.229.19:54:34.45#ibcon#flushed, iclass 28, count 0 2006.229.19:54:34.45#ibcon#about to write, iclass 28, count 0 2006.229.19:54:34.45#ibcon#wrote, iclass 28, count 0 2006.229.19:54:34.45#ibcon#about to read 3, iclass 28, count 0 2006.229.19:54:34.47#ibcon#read 3, iclass 28, count 0 2006.229.19:54:34.47#ibcon#about to read 4, iclass 28, count 0 2006.229.19:54:34.47#ibcon#read 4, iclass 28, count 0 2006.229.19:54:34.47#ibcon#about to read 5, iclass 28, count 0 2006.229.19:54:34.47#ibcon#read 5, iclass 28, count 0 2006.229.19:54:34.47#ibcon#about to read 6, iclass 28, count 0 2006.229.19:54:34.47#ibcon#read 6, iclass 28, count 0 2006.229.19:54:34.47#ibcon#end of sib2, iclass 28, count 0 2006.229.19:54:34.47#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:54:34.47#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:54:34.47#ibcon#[25=USB\r\n] 2006.229.19:54:34.47#ibcon#*before write, iclass 28, count 0 2006.229.19:54:34.47#ibcon#enter sib2, iclass 28, count 0 2006.229.19:54:34.47#ibcon#flushed, iclass 28, count 0 2006.229.19:54:34.47#ibcon#about to write, iclass 28, count 0 2006.229.19:54:34.47#ibcon#wrote, iclass 28, count 0 2006.229.19:54:34.47#ibcon#about to read 3, iclass 28, count 0 2006.229.19:54:34.50#ibcon#read 3, iclass 28, count 0 2006.229.19:54:34.50#ibcon#about to read 4, iclass 28, count 0 2006.229.19:54:34.50#ibcon#read 4, iclass 28, count 0 2006.229.19:54:34.50#ibcon#about to read 5, iclass 28, count 0 2006.229.19:54:34.50#ibcon#read 5, iclass 28, count 0 2006.229.19:54:34.50#ibcon#about to read 6, iclass 28, count 0 2006.229.19:54:34.50#ibcon#read 6, iclass 28, count 0 2006.229.19:54:34.50#ibcon#end of sib2, iclass 28, count 0 2006.229.19:54:34.50#ibcon#*after write, iclass 28, count 0 2006.229.19:54:34.50#ibcon#*before return 0, iclass 28, count 0 2006.229.19:54:34.50#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:34.50#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:34.50#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:54:34.50#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:54:34.50$vck44/valo=2,534.99 2006.229.19:54:34.50#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.19:54:34.50#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.19:54:34.50#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:34.50#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:34.50#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:34.50#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:34.50#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:54:34.50#ibcon#first serial, iclass 30, count 0 2006.229.19:54:34.50#ibcon#enter sib2, iclass 30, count 0 2006.229.19:54:34.50#ibcon#flushed, iclass 30, count 0 2006.229.19:54:34.50#ibcon#about to write, iclass 30, count 0 2006.229.19:54:34.50#ibcon#wrote, iclass 30, count 0 2006.229.19:54:34.50#ibcon#about to read 3, iclass 30, count 0 2006.229.19:54:34.52#ibcon#read 3, iclass 30, count 0 2006.229.19:54:34.52#ibcon#about to read 4, iclass 30, count 0 2006.229.19:54:34.52#ibcon#read 4, iclass 30, count 0 2006.229.19:54:34.52#ibcon#about to read 5, iclass 30, count 0 2006.229.19:54:34.52#ibcon#read 5, iclass 30, count 0 2006.229.19:54:34.52#ibcon#about to read 6, iclass 30, count 0 2006.229.19:54:34.52#ibcon#read 6, iclass 30, count 0 2006.229.19:54:34.52#ibcon#end of sib2, iclass 30, count 0 2006.229.19:54:34.52#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:54:34.52#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:54:34.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.19:54:34.52#ibcon#*before write, iclass 30, count 0 2006.229.19:54:34.52#ibcon#enter sib2, iclass 30, count 0 2006.229.19:54:34.52#ibcon#flushed, iclass 30, count 0 2006.229.19:54:34.52#ibcon#about to write, iclass 30, count 0 2006.229.19:54:34.52#ibcon#wrote, iclass 30, count 0 2006.229.19:54:34.52#ibcon#about to read 3, iclass 30, count 0 2006.229.19:54:34.56#ibcon#read 3, iclass 30, count 0 2006.229.19:54:34.56#ibcon#about to read 4, iclass 30, count 0 2006.229.19:54:34.56#ibcon#read 4, iclass 30, count 0 2006.229.19:54:34.56#ibcon#about to read 5, iclass 30, count 0 2006.229.19:54:34.56#ibcon#read 5, iclass 30, count 0 2006.229.19:54:34.56#ibcon#about to read 6, iclass 30, count 0 2006.229.19:54:34.56#ibcon#read 6, iclass 30, count 0 2006.229.19:54:34.56#ibcon#end of sib2, iclass 30, count 0 2006.229.19:54:34.56#ibcon#*after write, iclass 30, count 0 2006.229.19:54:34.56#ibcon#*before return 0, iclass 30, count 0 2006.229.19:54:34.56#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:34.56#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:34.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:54:34.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:54:34.56$vck44/va=2,7 2006.229.19:54:34.56#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.19:54:34.56#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.19:54:34.56#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:34.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:34.62#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:34.62#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:34.62#ibcon#enter wrdev, iclass 32, count 2 2006.229.19:54:34.62#ibcon#first serial, iclass 32, count 2 2006.229.19:54:34.62#ibcon#enter sib2, iclass 32, count 2 2006.229.19:54:34.62#ibcon#flushed, iclass 32, count 2 2006.229.19:54:34.62#ibcon#about to write, iclass 32, count 2 2006.229.19:54:34.62#ibcon#wrote, iclass 32, count 2 2006.229.19:54:34.62#ibcon#about to read 3, iclass 32, count 2 2006.229.19:54:34.64#ibcon#read 3, iclass 32, count 2 2006.229.19:54:34.64#ibcon#about to read 4, iclass 32, count 2 2006.229.19:54:34.64#ibcon#read 4, iclass 32, count 2 2006.229.19:54:34.64#ibcon#about to read 5, iclass 32, count 2 2006.229.19:54:34.64#ibcon#read 5, iclass 32, count 2 2006.229.19:54:34.64#ibcon#about to read 6, iclass 32, count 2 2006.229.19:54:34.64#ibcon#read 6, iclass 32, count 2 2006.229.19:54:34.64#ibcon#end of sib2, iclass 32, count 2 2006.229.19:54:34.64#ibcon#*mode == 0, iclass 32, count 2 2006.229.19:54:34.64#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.19:54:34.64#ibcon#[25=AT02-07\r\n] 2006.229.19:54:34.64#ibcon#*before write, iclass 32, count 2 2006.229.19:54:34.64#ibcon#enter sib2, iclass 32, count 2 2006.229.19:54:34.64#ibcon#flushed, iclass 32, count 2 2006.229.19:54:34.64#ibcon#about to write, iclass 32, count 2 2006.229.19:54:34.64#ibcon#wrote, iclass 32, count 2 2006.229.19:54:34.64#ibcon#about to read 3, iclass 32, count 2 2006.229.19:54:34.67#ibcon#read 3, iclass 32, count 2 2006.229.19:54:34.67#ibcon#about to read 4, iclass 32, count 2 2006.229.19:54:34.67#ibcon#read 4, iclass 32, count 2 2006.229.19:54:34.67#ibcon#about to read 5, iclass 32, count 2 2006.229.19:54:34.67#ibcon#read 5, iclass 32, count 2 2006.229.19:54:34.67#ibcon#about to read 6, iclass 32, count 2 2006.229.19:54:34.67#ibcon#read 6, iclass 32, count 2 2006.229.19:54:34.67#ibcon#end of sib2, iclass 32, count 2 2006.229.19:54:34.67#ibcon#*after write, iclass 32, count 2 2006.229.19:54:34.67#ibcon#*before return 0, iclass 32, count 2 2006.229.19:54:34.67#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:34.67#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:34.67#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.19:54:34.67#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:34.67#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:34.79#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:34.79#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:34.79#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:54:34.79#ibcon#first serial, iclass 32, count 0 2006.229.19:54:34.79#ibcon#enter sib2, iclass 32, count 0 2006.229.19:54:34.79#ibcon#flushed, iclass 32, count 0 2006.229.19:54:34.79#ibcon#about to write, iclass 32, count 0 2006.229.19:54:34.79#ibcon#wrote, iclass 32, count 0 2006.229.19:54:34.79#ibcon#about to read 3, iclass 32, count 0 2006.229.19:54:34.81#ibcon#read 3, iclass 32, count 0 2006.229.19:54:34.81#ibcon#about to read 4, iclass 32, count 0 2006.229.19:54:34.81#ibcon#read 4, iclass 32, count 0 2006.229.19:54:34.81#ibcon#about to read 5, iclass 32, count 0 2006.229.19:54:34.81#ibcon#read 5, iclass 32, count 0 2006.229.19:54:34.81#ibcon#about to read 6, iclass 32, count 0 2006.229.19:54:34.81#ibcon#read 6, iclass 32, count 0 2006.229.19:54:34.81#ibcon#end of sib2, iclass 32, count 0 2006.229.19:54:34.81#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:54:34.81#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:54:34.81#ibcon#[25=USB\r\n] 2006.229.19:54:34.81#ibcon#*before write, iclass 32, count 0 2006.229.19:54:34.81#ibcon#enter sib2, iclass 32, count 0 2006.229.19:54:34.81#ibcon#flushed, iclass 32, count 0 2006.229.19:54:34.81#ibcon#about to write, iclass 32, count 0 2006.229.19:54:34.81#ibcon#wrote, iclass 32, count 0 2006.229.19:54:34.81#ibcon#about to read 3, iclass 32, count 0 2006.229.19:54:34.84#ibcon#read 3, iclass 32, count 0 2006.229.19:54:34.84#ibcon#about to read 4, iclass 32, count 0 2006.229.19:54:34.84#ibcon#read 4, iclass 32, count 0 2006.229.19:54:34.84#ibcon#about to read 5, iclass 32, count 0 2006.229.19:54:34.84#ibcon#read 5, iclass 32, count 0 2006.229.19:54:34.84#ibcon#about to read 6, iclass 32, count 0 2006.229.19:54:34.84#ibcon#read 6, iclass 32, count 0 2006.229.19:54:34.84#ibcon#end of sib2, iclass 32, count 0 2006.229.19:54:34.84#ibcon#*after write, iclass 32, count 0 2006.229.19:54:34.84#ibcon#*before return 0, iclass 32, count 0 2006.229.19:54:34.84#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:34.84#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:34.84#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:54:34.84#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:54:34.84$vck44/valo=3,564.99 2006.229.19:54:34.84#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.19:54:34.84#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.19:54:34.84#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:34.84#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:34.84#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:34.84#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:34.84#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:54:34.84#ibcon#first serial, iclass 34, count 0 2006.229.19:54:34.84#ibcon#enter sib2, iclass 34, count 0 2006.229.19:54:34.84#ibcon#flushed, iclass 34, count 0 2006.229.19:54:34.84#ibcon#about to write, iclass 34, count 0 2006.229.19:54:34.84#ibcon#wrote, iclass 34, count 0 2006.229.19:54:34.84#ibcon#about to read 3, iclass 34, count 0 2006.229.19:54:34.86#ibcon#read 3, iclass 34, count 0 2006.229.19:54:34.86#ibcon#about to read 4, iclass 34, count 0 2006.229.19:54:34.86#ibcon#read 4, iclass 34, count 0 2006.229.19:54:34.86#ibcon#about to read 5, iclass 34, count 0 2006.229.19:54:34.86#ibcon#read 5, iclass 34, count 0 2006.229.19:54:34.86#ibcon#about to read 6, iclass 34, count 0 2006.229.19:54:34.86#ibcon#read 6, iclass 34, count 0 2006.229.19:54:34.86#ibcon#end of sib2, iclass 34, count 0 2006.229.19:54:34.86#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:54:34.86#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:54:34.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.19:54:34.86#ibcon#*before write, iclass 34, count 0 2006.229.19:54:34.86#ibcon#enter sib2, iclass 34, count 0 2006.229.19:54:34.86#ibcon#flushed, iclass 34, count 0 2006.229.19:54:34.86#ibcon#about to write, iclass 34, count 0 2006.229.19:54:34.86#ibcon#wrote, iclass 34, count 0 2006.229.19:54:34.86#ibcon#about to read 3, iclass 34, count 0 2006.229.19:54:34.90#ibcon#read 3, iclass 34, count 0 2006.229.19:54:34.90#ibcon#about to read 4, iclass 34, count 0 2006.229.19:54:34.90#ibcon#read 4, iclass 34, count 0 2006.229.19:54:34.90#ibcon#about to read 5, iclass 34, count 0 2006.229.19:54:34.90#ibcon#read 5, iclass 34, count 0 2006.229.19:54:34.90#ibcon#about to read 6, iclass 34, count 0 2006.229.19:54:34.90#ibcon#read 6, iclass 34, count 0 2006.229.19:54:34.90#ibcon#end of sib2, iclass 34, count 0 2006.229.19:54:34.90#ibcon#*after write, iclass 34, count 0 2006.229.19:54:34.90#ibcon#*before return 0, iclass 34, count 0 2006.229.19:54:34.90#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:34.90#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:34.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:54:34.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:54:34.90$vck44/va=3,6 2006.229.19:54:34.90#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.19:54:34.90#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.19:54:34.90#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:34.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:34.96#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:34.96#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:34.96#ibcon#enter wrdev, iclass 36, count 2 2006.229.19:54:34.96#ibcon#first serial, iclass 36, count 2 2006.229.19:54:34.96#ibcon#enter sib2, iclass 36, count 2 2006.229.19:54:34.96#ibcon#flushed, iclass 36, count 2 2006.229.19:54:34.96#ibcon#about to write, iclass 36, count 2 2006.229.19:54:34.96#ibcon#wrote, iclass 36, count 2 2006.229.19:54:34.96#ibcon#about to read 3, iclass 36, count 2 2006.229.19:54:34.98#ibcon#read 3, iclass 36, count 2 2006.229.19:54:34.98#ibcon#about to read 4, iclass 36, count 2 2006.229.19:54:34.98#ibcon#read 4, iclass 36, count 2 2006.229.19:54:34.98#ibcon#about to read 5, iclass 36, count 2 2006.229.19:54:34.98#ibcon#read 5, iclass 36, count 2 2006.229.19:54:34.98#ibcon#about to read 6, iclass 36, count 2 2006.229.19:54:34.98#ibcon#read 6, iclass 36, count 2 2006.229.19:54:34.98#ibcon#end of sib2, iclass 36, count 2 2006.229.19:54:34.98#ibcon#*mode == 0, iclass 36, count 2 2006.229.19:54:34.98#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.19:54:34.98#ibcon#[25=AT03-06\r\n] 2006.229.19:54:34.98#ibcon#*before write, iclass 36, count 2 2006.229.19:54:34.98#ibcon#enter sib2, iclass 36, count 2 2006.229.19:54:34.98#ibcon#flushed, iclass 36, count 2 2006.229.19:54:34.98#ibcon#about to write, iclass 36, count 2 2006.229.19:54:34.98#ibcon#wrote, iclass 36, count 2 2006.229.19:54:34.98#ibcon#about to read 3, iclass 36, count 2 2006.229.19:54:35.01#ibcon#read 3, iclass 36, count 2 2006.229.19:54:35.01#ibcon#about to read 4, iclass 36, count 2 2006.229.19:54:35.01#ibcon#read 4, iclass 36, count 2 2006.229.19:54:35.01#ibcon#about to read 5, iclass 36, count 2 2006.229.19:54:35.01#ibcon#read 5, iclass 36, count 2 2006.229.19:54:35.01#ibcon#about to read 6, iclass 36, count 2 2006.229.19:54:35.01#ibcon#read 6, iclass 36, count 2 2006.229.19:54:35.01#ibcon#end of sib2, iclass 36, count 2 2006.229.19:54:35.01#ibcon#*after write, iclass 36, count 2 2006.229.19:54:35.01#ibcon#*before return 0, iclass 36, count 2 2006.229.19:54:35.01#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:35.01#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:35.01#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.19:54:35.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:35.01#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:35.13#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:35.13#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:35.13#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:54:35.13#ibcon#first serial, iclass 36, count 0 2006.229.19:54:35.13#ibcon#enter sib2, iclass 36, count 0 2006.229.19:54:35.13#ibcon#flushed, iclass 36, count 0 2006.229.19:54:35.13#ibcon#about to write, iclass 36, count 0 2006.229.19:54:35.13#ibcon#wrote, iclass 36, count 0 2006.229.19:54:35.13#ibcon#about to read 3, iclass 36, count 0 2006.229.19:54:35.15#ibcon#read 3, iclass 36, count 0 2006.229.19:54:35.15#ibcon#about to read 4, iclass 36, count 0 2006.229.19:54:35.15#ibcon#read 4, iclass 36, count 0 2006.229.19:54:35.15#ibcon#about to read 5, iclass 36, count 0 2006.229.19:54:35.15#ibcon#read 5, iclass 36, count 0 2006.229.19:54:35.15#ibcon#about to read 6, iclass 36, count 0 2006.229.19:54:35.15#ibcon#read 6, iclass 36, count 0 2006.229.19:54:35.15#ibcon#end of sib2, iclass 36, count 0 2006.229.19:54:35.15#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:54:35.15#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:54:35.15#ibcon#[25=USB\r\n] 2006.229.19:54:35.15#ibcon#*before write, iclass 36, count 0 2006.229.19:54:35.15#ibcon#enter sib2, iclass 36, count 0 2006.229.19:54:35.15#ibcon#flushed, iclass 36, count 0 2006.229.19:54:35.15#ibcon#about to write, iclass 36, count 0 2006.229.19:54:35.15#ibcon#wrote, iclass 36, count 0 2006.229.19:54:35.15#ibcon#about to read 3, iclass 36, count 0 2006.229.19:54:35.18#ibcon#read 3, iclass 36, count 0 2006.229.19:54:35.18#ibcon#about to read 4, iclass 36, count 0 2006.229.19:54:35.18#ibcon#read 4, iclass 36, count 0 2006.229.19:54:35.18#ibcon#about to read 5, iclass 36, count 0 2006.229.19:54:35.18#ibcon#read 5, iclass 36, count 0 2006.229.19:54:35.18#ibcon#about to read 6, iclass 36, count 0 2006.229.19:54:35.18#ibcon#read 6, iclass 36, count 0 2006.229.19:54:35.18#ibcon#end of sib2, iclass 36, count 0 2006.229.19:54:35.18#ibcon#*after write, iclass 36, count 0 2006.229.19:54:35.18#ibcon#*before return 0, iclass 36, count 0 2006.229.19:54:35.18#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:35.18#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:35.18#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:54:35.18#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:54:35.18$vck44/valo=4,624.99 2006.229.19:54:35.18#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:54:35.18#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:54:35.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:35.18#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:35.18#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:35.18#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:35.18#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:54:35.18#ibcon#first serial, iclass 38, count 0 2006.229.19:54:35.18#ibcon#enter sib2, iclass 38, count 0 2006.229.19:54:35.18#ibcon#flushed, iclass 38, count 0 2006.229.19:54:35.18#ibcon#about to write, iclass 38, count 0 2006.229.19:54:35.18#ibcon#wrote, iclass 38, count 0 2006.229.19:54:35.18#ibcon#about to read 3, iclass 38, count 0 2006.229.19:54:35.20#ibcon#read 3, iclass 38, count 0 2006.229.19:54:35.20#ibcon#about to read 4, iclass 38, count 0 2006.229.19:54:35.20#ibcon#read 4, iclass 38, count 0 2006.229.19:54:35.20#ibcon#about to read 5, iclass 38, count 0 2006.229.19:54:35.20#ibcon#read 5, iclass 38, count 0 2006.229.19:54:35.20#ibcon#about to read 6, iclass 38, count 0 2006.229.19:54:35.20#ibcon#read 6, iclass 38, count 0 2006.229.19:54:35.20#ibcon#end of sib2, iclass 38, count 0 2006.229.19:54:35.20#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:54:35.20#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:54:35.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.19:54:35.20#ibcon#*before write, iclass 38, count 0 2006.229.19:54:35.20#ibcon#enter sib2, iclass 38, count 0 2006.229.19:54:35.20#ibcon#flushed, iclass 38, count 0 2006.229.19:54:35.20#ibcon#about to write, iclass 38, count 0 2006.229.19:54:35.20#ibcon#wrote, iclass 38, count 0 2006.229.19:54:35.20#ibcon#about to read 3, iclass 38, count 0 2006.229.19:54:35.24#ibcon#read 3, iclass 38, count 0 2006.229.19:54:35.24#ibcon#about to read 4, iclass 38, count 0 2006.229.19:54:35.24#ibcon#read 4, iclass 38, count 0 2006.229.19:54:35.24#ibcon#about to read 5, iclass 38, count 0 2006.229.19:54:35.24#ibcon#read 5, iclass 38, count 0 2006.229.19:54:35.24#ibcon#about to read 6, iclass 38, count 0 2006.229.19:54:35.24#ibcon#read 6, iclass 38, count 0 2006.229.19:54:35.24#ibcon#end of sib2, iclass 38, count 0 2006.229.19:54:35.24#ibcon#*after write, iclass 38, count 0 2006.229.19:54:35.24#ibcon#*before return 0, iclass 38, count 0 2006.229.19:54:35.24#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:35.24#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:35.24#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:54:35.24#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:54:35.24$vck44/va=4,7 2006.229.19:54:35.24#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.19:54:35.24#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.19:54:35.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:35.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:35.30#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:35.30#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:35.30#ibcon#enter wrdev, iclass 40, count 2 2006.229.19:54:35.30#ibcon#first serial, iclass 40, count 2 2006.229.19:54:35.30#ibcon#enter sib2, iclass 40, count 2 2006.229.19:54:35.30#ibcon#flushed, iclass 40, count 2 2006.229.19:54:35.30#ibcon#about to write, iclass 40, count 2 2006.229.19:54:35.30#ibcon#wrote, iclass 40, count 2 2006.229.19:54:35.30#ibcon#about to read 3, iclass 40, count 2 2006.229.19:54:35.32#ibcon#read 3, iclass 40, count 2 2006.229.19:54:35.32#ibcon#about to read 4, iclass 40, count 2 2006.229.19:54:35.32#ibcon#read 4, iclass 40, count 2 2006.229.19:54:35.32#ibcon#about to read 5, iclass 40, count 2 2006.229.19:54:35.32#ibcon#read 5, iclass 40, count 2 2006.229.19:54:35.32#ibcon#about to read 6, iclass 40, count 2 2006.229.19:54:35.32#ibcon#read 6, iclass 40, count 2 2006.229.19:54:35.32#ibcon#end of sib2, iclass 40, count 2 2006.229.19:54:35.32#ibcon#*mode == 0, iclass 40, count 2 2006.229.19:54:35.32#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.19:54:35.32#ibcon#[25=AT04-07\r\n] 2006.229.19:54:35.32#ibcon#*before write, iclass 40, count 2 2006.229.19:54:35.32#ibcon#enter sib2, iclass 40, count 2 2006.229.19:54:35.32#ibcon#flushed, iclass 40, count 2 2006.229.19:54:35.32#ibcon#about to write, iclass 40, count 2 2006.229.19:54:35.32#ibcon#wrote, iclass 40, count 2 2006.229.19:54:35.32#ibcon#about to read 3, iclass 40, count 2 2006.229.19:54:35.35#ibcon#read 3, iclass 40, count 2 2006.229.19:54:35.35#ibcon#about to read 4, iclass 40, count 2 2006.229.19:54:35.35#ibcon#read 4, iclass 40, count 2 2006.229.19:54:35.35#ibcon#about to read 5, iclass 40, count 2 2006.229.19:54:35.35#ibcon#read 5, iclass 40, count 2 2006.229.19:54:35.35#ibcon#about to read 6, iclass 40, count 2 2006.229.19:54:35.35#ibcon#read 6, iclass 40, count 2 2006.229.19:54:35.35#ibcon#end of sib2, iclass 40, count 2 2006.229.19:54:35.35#ibcon#*after write, iclass 40, count 2 2006.229.19:54:35.35#ibcon#*before return 0, iclass 40, count 2 2006.229.19:54:35.35#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:35.35#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:35.35#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.19:54:35.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:35.35#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:35.47#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:35.47#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:35.47#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:54:35.47#ibcon#first serial, iclass 40, count 0 2006.229.19:54:35.47#ibcon#enter sib2, iclass 40, count 0 2006.229.19:54:35.47#ibcon#flushed, iclass 40, count 0 2006.229.19:54:35.47#ibcon#about to write, iclass 40, count 0 2006.229.19:54:35.47#ibcon#wrote, iclass 40, count 0 2006.229.19:54:35.47#ibcon#about to read 3, iclass 40, count 0 2006.229.19:54:35.49#ibcon#read 3, iclass 40, count 0 2006.229.19:54:35.49#ibcon#about to read 4, iclass 40, count 0 2006.229.19:54:35.49#ibcon#read 4, iclass 40, count 0 2006.229.19:54:35.49#ibcon#about to read 5, iclass 40, count 0 2006.229.19:54:35.49#ibcon#read 5, iclass 40, count 0 2006.229.19:54:35.49#ibcon#about to read 6, iclass 40, count 0 2006.229.19:54:35.49#ibcon#read 6, iclass 40, count 0 2006.229.19:54:35.49#ibcon#end of sib2, iclass 40, count 0 2006.229.19:54:35.49#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:54:35.49#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:54:35.49#ibcon#[25=USB\r\n] 2006.229.19:54:35.49#ibcon#*before write, iclass 40, count 0 2006.229.19:54:35.49#ibcon#enter sib2, iclass 40, count 0 2006.229.19:54:35.49#ibcon#flushed, iclass 40, count 0 2006.229.19:54:35.49#ibcon#about to write, iclass 40, count 0 2006.229.19:54:35.49#ibcon#wrote, iclass 40, count 0 2006.229.19:54:35.49#ibcon#about to read 3, iclass 40, count 0 2006.229.19:54:35.52#ibcon#read 3, iclass 40, count 0 2006.229.19:54:35.52#ibcon#about to read 4, iclass 40, count 0 2006.229.19:54:35.52#ibcon#read 4, iclass 40, count 0 2006.229.19:54:35.52#ibcon#about to read 5, iclass 40, count 0 2006.229.19:54:35.52#ibcon#read 5, iclass 40, count 0 2006.229.19:54:35.52#ibcon#about to read 6, iclass 40, count 0 2006.229.19:54:35.52#ibcon#read 6, iclass 40, count 0 2006.229.19:54:35.52#ibcon#end of sib2, iclass 40, count 0 2006.229.19:54:35.52#ibcon#*after write, iclass 40, count 0 2006.229.19:54:35.52#ibcon#*before return 0, iclass 40, count 0 2006.229.19:54:35.52#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:35.52#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:35.52#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:54:35.52#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:54:35.52$vck44/valo=5,734.99 2006.229.19:54:35.52#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.19:54:35.52#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.19:54:35.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:35.52#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:54:35.52#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:54:35.52#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:54:35.52#ibcon#enter wrdev, iclass 4, count 0 2006.229.19:54:35.52#ibcon#first serial, iclass 4, count 0 2006.229.19:54:35.52#ibcon#enter sib2, iclass 4, count 0 2006.229.19:54:35.52#ibcon#flushed, iclass 4, count 0 2006.229.19:54:35.52#ibcon#about to write, iclass 4, count 0 2006.229.19:54:35.52#ibcon#wrote, iclass 4, count 0 2006.229.19:54:35.52#ibcon#about to read 3, iclass 4, count 0 2006.229.19:54:35.54#ibcon#read 3, iclass 4, count 0 2006.229.19:54:35.54#ibcon#about to read 4, iclass 4, count 0 2006.229.19:54:35.54#ibcon#read 4, iclass 4, count 0 2006.229.19:54:35.54#ibcon#about to read 5, iclass 4, count 0 2006.229.19:54:35.54#ibcon#read 5, iclass 4, count 0 2006.229.19:54:35.54#ibcon#about to read 6, iclass 4, count 0 2006.229.19:54:35.54#ibcon#read 6, iclass 4, count 0 2006.229.19:54:35.54#ibcon#end of sib2, iclass 4, count 0 2006.229.19:54:35.54#ibcon#*mode == 0, iclass 4, count 0 2006.229.19:54:35.54#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.19:54:35.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.19:54:35.54#ibcon#*before write, iclass 4, count 0 2006.229.19:54:35.54#ibcon#enter sib2, iclass 4, count 0 2006.229.19:54:35.54#ibcon#flushed, iclass 4, count 0 2006.229.19:54:35.54#ibcon#about to write, iclass 4, count 0 2006.229.19:54:35.54#ibcon#wrote, iclass 4, count 0 2006.229.19:54:35.54#ibcon#about to read 3, iclass 4, count 0 2006.229.19:54:35.58#ibcon#read 3, iclass 4, count 0 2006.229.19:54:35.58#ibcon#about to read 4, iclass 4, count 0 2006.229.19:54:35.58#ibcon#read 4, iclass 4, count 0 2006.229.19:54:35.58#ibcon#about to read 5, iclass 4, count 0 2006.229.19:54:35.58#ibcon#read 5, iclass 4, count 0 2006.229.19:54:35.58#ibcon#about to read 6, iclass 4, count 0 2006.229.19:54:35.58#ibcon#read 6, iclass 4, count 0 2006.229.19:54:35.58#ibcon#end of sib2, iclass 4, count 0 2006.229.19:54:35.58#ibcon#*after write, iclass 4, count 0 2006.229.19:54:35.58#ibcon#*before return 0, iclass 4, count 0 2006.229.19:54:35.58#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:54:35.58#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.19:54:35.58#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.19:54:35.58#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.19:54:35.58$vck44/va=5,4 2006.229.19:54:35.58#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.19:54:35.58#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.19:54:35.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:35.58#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:54:35.64#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:54:35.64#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:54:35.64#ibcon#enter wrdev, iclass 6, count 2 2006.229.19:54:35.64#ibcon#first serial, iclass 6, count 2 2006.229.19:54:35.64#ibcon#enter sib2, iclass 6, count 2 2006.229.19:54:35.64#ibcon#flushed, iclass 6, count 2 2006.229.19:54:35.64#ibcon#about to write, iclass 6, count 2 2006.229.19:54:35.64#ibcon#wrote, iclass 6, count 2 2006.229.19:54:35.64#ibcon#about to read 3, iclass 6, count 2 2006.229.19:54:35.66#ibcon#read 3, iclass 6, count 2 2006.229.19:54:35.66#ibcon#about to read 4, iclass 6, count 2 2006.229.19:54:35.66#ibcon#read 4, iclass 6, count 2 2006.229.19:54:35.66#ibcon#about to read 5, iclass 6, count 2 2006.229.19:54:35.66#ibcon#read 5, iclass 6, count 2 2006.229.19:54:35.66#ibcon#about to read 6, iclass 6, count 2 2006.229.19:54:35.66#ibcon#read 6, iclass 6, count 2 2006.229.19:54:35.66#ibcon#end of sib2, iclass 6, count 2 2006.229.19:54:35.66#ibcon#*mode == 0, iclass 6, count 2 2006.229.19:54:35.66#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.19:54:35.66#ibcon#[25=AT05-04\r\n] 2006.229.19:54:35.66#ibcon#*before write, iclass 6, count 2 2006.229.19:54:35.66#ibcon#enter sib2, iclass 6, count 2 2006.229.19:54:35.66#ibcon#flushed, iclass 6, count 2 2006.229.19:54:35.66#ibcon#about to write, iclass 6, count 2 2006.229.19:54:35.66#ibcon#wrote, iclass 6, count 2 2006.229.19:54:35.66#ibcon#about to read 3, iclass 6, count 2 2006.229.19:54:35.69#ibcon#read 3, iclass 6, count 2 2006.229.19:54:35.69#ibcon#about to read 4, iclass 6, count 2 2006.229.19:54:35.69#ibcon#read 4, iclass 6, count 2 2006.229.19:54:35.69#ibcon#about to read 5, iclass 6, count 2 2006.229.19:54:35.69#ibcon#read 5, iclass 6, count 2 2006.229.19:54:35.69#ibcon#about to read 6, iclass 6, count 2 2006.229.19:54:35.69#ibcon#read 6, iclass 6, count 2 2006.229.19:54:35.69#ibcon#end of sib2, iclass 6, count 2 2006.229.19:54:35.69#ibcon#*after write, iclass 6, count 2 2006.229.19:54:35.69#ibcon#*before return 0, iclass 6, count 2 2006.229.19:54:35.69#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:54:35.69#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.19:54:35.69#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.19:54:35.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:35.69#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:54:35.81#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:54:35.81#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:54:35.81#ibcon#enter wrdev, iclass 6, count 0 2006.229.19:54:35.81#ibcon#first serial, iclass 6, count 0 2006.229.19:54:35.81#ibcon#enter sib2, iclass 6, count 0 2006.229.19:54:35.81#ibcon#flushed, iclass 6, count 0 2006.229.19:54:35.81#ibcon#about to write, iclass 6, count 0 2006.229.19:54:35.81#ibcon#wrote, iclass 6, count 0 2006.229.19:54:35.81#ibcon#about to read 3, iclass 6, count 0 2006.229.19:54:35.83#ibcon#read 3, iclass 6, count 0 2006.229.19:54:35.83#ibcon#about to read 4, iclass 6, count 0 2006.229.19:54:35.83#ibcon#read 4, iclass 6, count 0 2006.229.19:54:35.83#ibcon#about to read 5, iclass 6, count 0 2006.229.19:54:35.83#ibcon#read 5, iclass 6, count 0 2006.229.19:54:35.83#ibcon#about to read 6, iclass 6, count 0 2006.229.19:54:35.83#ibcon#read 6, iclass 6, count 0 2006.229.19:54:35.83#ibcon#end of sib2, iclass 6, count 0 2006.229.19:54:35.83#ibcon#*mode == 0, iclass 6, count 0 2006.229.19:54:35.83#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.19:54:35.83#ibcon#[25=USB\r\n] 2006.229.19:54:35.83#ibcon#*before write, iclass 6, count 0 2006.229.19:54:35.83#ibcon#enter sib2, iclass 6, count 0 2006.229.19:54:35.83#ibcon#flushed, iclass 6, count 0 2006.229.19:54:35.83#ibcon#about to write, iclass 6, count 0 2006.229.19:54:35.83#ibcon#wrote, iclass 6, count 0 2006.229.19:54:35.83#ibcon#about to read 3, iclass 6, count 0 2006.229.19:54:35.86#ibcon#read 3, iclass 6, count 0 2006.229.19:54:35.86#ibcon#about to read 4, iclass 6, count 0 2006.229.19:54:35.86#ibcon#read 4, iclass 6, count 0 2006.229.19:54:35.86#ibcon#about to read 5, iclass 6, count 0 2006.229.19:54:35.86#ibcon#read 5, iclass 6, count 0 2006.229.19:54:35.86#ibcon#about to read 6, iclass 6, count 0 2006.229.19:54:35.86#ibcon#read 6, iclass 6, count 0 2006.229.19:54:35.86#ibcon#end of sib2, iclass 6, count 0 2006.229.19:54:35.86#ibcon#*after write, iclass 6, count 0 2006.229.19:54:35.86#ibcon#*before return 0, iclass 6, count 0 2006.229.19:54:35.86#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:54:35.86#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.19:54:35.86#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.19:54:35.86#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.19:54:35.86$vck44/valo=6,814.99 2006.229.19:54:35.86#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.19:54:35.86#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.19:54:35.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:35.86#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:54:35.86#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:54:35.86#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:54:35.86#ibcon#enter wrdev, iclass 10, count 0 2006.229.19:54:35.86#ibcon#first serial, iclass 10, count 0 2006.229.19:54:35.86#ibcon#enter sib2, iclass 10, count 0 2006.229.19:54:35.86#ibcon#flushed, iclass 10, count 0 2006.229.19:54:35.86#ibcon#about to write, iclass 10, count 0 2006.229.19:54:35.86#ibcon#wrote, iclass 10, count 0 2006.229.19:54:35.86#ibcon#about to read 3, iclass 10, count 0 2006.229.19:54:35.88#ibcon#read 3, iclass 10, count 0 2006.229.19:54:35.88#ibcon#about to read 4, iclass 10, count 0 2006.229.19:54:35.88#ibcon#read 4, iclass 10, count 0 2006.229.19:54:35.88#ibcon#about to read 5, iclass 10, count 0 2006.229.19:54:35.88#ibcon#read 5, iclass 10, count 0 2006.229.19:54:35.88#ibcon#about to read 6, iclass 10, count 0 2006.229.19:54:35.88#ibcon#read 6, iclass 10, count 0 2006.229.19:54:35.88#ibcon#end of sib2, iclass 10, count 0 2006.229.19:54:35.88#ibcon#*mode == 0, iclass 10, count 0 2006.229.19:54:35.88#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.19:54:35.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.19:54:35.88#ibcon#*before write, iclass 10, count 0 2006.229.19:54:35.88#ibcon#enter sib2, iclass 10, count 0 2006.229.19:54:35.88#ibcon#flushed, iclass 10, count 0 2006.229.19:54:35.88#ibcon#about to write, iclass 10, count 0 2006.229.19:54:35.88#ibcon#wrote, iclass 10, count 0 2006.229.19:54:35.88#ibcon#about to read 3, iclass 10, count 0 2006.229.19:54:35.92#ibcon#read 3, iclass 10, count 0 2006.229.19:54:35.92#ibcon#about to read 4, iclass 10, count 0 2006.229.19:54:35.92#ibcon#read 4, iclass 10, count 0 2006.229.19:54:35.92#ibcon#about to read 5, iclass 10, count 0 2006.229.19:54:35.92#ibcon#read 5, iclass 10, count 0 2006.229.19:54:35.92#ibcon#about to read 6, iclass 10, count 0 2006.229.19:54:35.92#ibcon#read 6, iclass 10, count 0 2006.229.19:54:35.92#ibcon#end of sib2, iclass 10, count 0 2006.229.19:54:35.92#ibcon#*after write, iclass 10, count 0 2006.229.19:54:35.92#ibcon#*before return 0, iclass 10, count 0 2006.229.19:54:35.92#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:54:35.92#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.19:54:35.92#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.19:54:35.92#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.19:54:35.92$vck44/va=6,4 2006.229.19:54:35.92#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.19:54:35.92#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.19:54:35.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:35.92#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:54:35.98#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:54:35.98#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:54:35.98#ibcon#enter wrdev, iclass 12, count 2 2006.229.19:54:35.98#ibcon#first serial, iclass 12, count 2 2006.229.19:54:35.98#ibcon#enter sib2, iclass 12, count 2 2006.229.19:54:35.98#ibcon#flushed, iclass 12, count 2 2006.229.19:54:35.98#ibcon#about to write, iclass 12, count 2 2006.229.19:54:35.98#ibcon#wrote, iclass 12, count 2 2006.229.19:54:35.98#ibcon#about to read 3, iclass 12, count 2 2006.229.19:54:36.00#ibcon#read 3, iclass 12, count 2 2006.229.19:54:36.00#ibcon#about to read 4, iclass 12, count 2 2006.229.19:54:36.00#ibcon#read 4, iclass 12, count 2 2006.229.19:54:36.00#ibcon#about to read 5, iclass 12, count 2 2006.229.19:54:36.00#ibcon#read 5, iclass 12, count 2 2006.229.19:54:36.00#ibcon#about to read 6, iclass 12, count 2 2006.229.19:54:36.00#ibcon#read 6, iclass 12, count 2 2006.229.19:54:36.00#ibcon#end of sib2, iclass 12, count 2 2006.229.19:54:36.00#ibcon#*mode == 0, iclass 12, count 2 2006.229.19:54:36.00#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.19:54:36.00#ibcon#[25=AT06-04\r\n] 2006.229.19:54:36.00#ibcon#*before write, iclass 12, count 2 2006.229.19:54:36.00#ibcon#enter sib2, iclass 12, count 2 2006.229.19:54:36.00#ibcon#flushed, iclass 12, count 2 2006.229.19:54:36.00#ibcon#about to write, iclass 12, count 2 2006.229.19:54:36.00#ibcon#wrote, iclass 12, count 2 2006.229.19:54:36.00#ibcon#about to read 3, iclass 12, count 2 2006.229.19:54:36.03#ibcon#read 3, iclass 12, count 2 2006.229.19:54:36.03#ibcon#about to read 4, iclass 12, count 2 2006.229.19:54:36.03#ibcon#read 4, iclass 12, count 2 2006.229.19:54:36.03#ibcon#about to read 5, iclass 12, count 2 2006.229.19:54:36.03#ibcon#read 5, iclass 12, count 2 2006.229.19:54:36.03#ibcon#about to read 6, iclass 12, count 2 2006.229.19:54:36.03#ibcon#read 6, iclass 12, count 2 2006.229.19:54:36.03#ibcon#end of sib2, iclass 12, count 2 2006.229.19:54:36.03#ibcon#*after write, iclass 12, count 2 2006.229.19:54:36.03#ibcon#*before return 0, iclass 12, count 2 2006.229.19:54:36.03#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:54:36.03#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.19:54:36.03#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.19:54:36.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:36.03#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:54:36.15#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:54:36.15#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:54:36.15#ibcon#enter wrdev, iclass 12, count 0 2006.229.19:54:36.15#ibcon#first serial, iclass 12, count 0 2006.229.19:54:36.15#ibcon#enter sib2, iclass 12, count 0 2006.229.19:54:36.15#ibcon#flushed, iclass 12, count 0 2006.229.19:54:36.15#ibcon#about to write, iclass 12, count 0 2006.229.19:54:36.15#ibcon#wrote, iclass 12, count 0 2006.229.19:54:36.15#ibcon#about to read 3, iclass 12, count 0 2006.229.19:54:36.17#ibcon#read 3, iclass 12, count 0 2006.229.19:54:36.17#ibcon#about to read 4, iclass 12, count 0 2006.229.19:54:36.17#ibcon#read 4, iclass 12, count 0 2006.229.19:54:36.17#ibcon#about to read 5, iclass 12, count 0 2006.229.19:54:36.17#ibcon#read 5, iclass 12, count 0 2006.229.19:54:36.17#ibcon#about to read 6, iclass 12, count 0 2006.229.19:54:36.17#ibcon#read 6, iclass 12, count 0 2006.229.19:54:36.17#ibcon#end of sib2, iclass 12, count 0 2006.229.19:54:36.17#ibcon#*mode == 0, iclass 12, count 0 2006.229.19:54:36.17#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.19:54:36.17#ibcon#[25=USB\r\n] 2006.229.19:54:36.17#ibcon#*before write, iclass 12, count 0 2006.229.19:54:36.17#ibcon#enter sib2, iclass 12, count 0 2006.229.19:54:36.17#ibcon#flushed, iclass 12, count 0 2006.229.19:54:36.17#ibcon#about to write, iclass 12, count 0 2006.229.19:54:36.17#ibcon#wrote, iclass 12, count 0 2006.229.19:54:36.17#ibcon#about to read 3, iclass 12, count 0 2006.229.19:54:36.20#ibcon#read 3, iclass 12, count 0 2006.229.19:54:36.20#ibcon#about to read 4, iclass 12, count 0 2006.229.19:54:36.20#ibcon#read 4, iclass 12, count 0 2006.229.19:54:36.20#ibcon#about to read 5, iclass 12, count 0 2006.229.19:54:36.20#ibcon#read 5, iclass 12, count 0 2006.229.19:54:36.20#ibcon#about to read 6, iclass 12, count 0 2006.229.19:54:36.20#ibcon#read 6, iclass 12, count 0 2006.229.19:54:36.20#ibcon#end of sib2, iclass 12, count 0 2006.229.19:54:36.20#ibcon#*after write, iclass 12, count 0 2006.229.19:54:36.20#ibcon#*before return 0, iclass 12, count 0 2006.229.19:54:36.20#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:54:36.20#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.19:54:36.20#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.19:54:36.20#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.19:54:36.20$vck44/valo=7,864.99 2006.229.19:54:36.20#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.19:54:36.20#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.19:54:36.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:36.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:36.20#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:36.20#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:36.20#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:54:36.20#ibcon#first serial, iclass 14, count 0 2006.229.19:54:36.20#ibcon#enter sib2, iclass 14, count 0 2006.229.19:54:36.20#ibcon#flushed, iclass 14, count 0 2006.229.19:54:36.20#ibcon#about to write, iclass 14, count 0 2006.229.19:54:36.20#ibcon#wrote, iclass 14, count 0 2006.229.19:54:36.20#ibcon#about to read 3, iclass 14, count 0 2006.229.19:54:36.22#ibcon#read 3, iclass 14, count 0 2006.229.19:54:36.22#ibcon#about to read 4, iclass 14, count 0 2006.229.19:54:36.22#ibcon#read 4, iclass 14, count 0 2006.229.19:54:36.22#ibcon#about to read 5, iclass 14, count 0 2006.229.19:54:36.22#ibcon#read 5, iclass 14, count 0 2006.229.19:54:36.22#ibcon#about to read 6, iclass 14, count 0 2006.229.19:54:36.22#ibcon#read 6, iclass 14, count 0 2006.229.19:54:36.22#ibcon#end of sib2, iclass 14, count 0 2006.229.19:54:36.22#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:54:36.22#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:54:36.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.19:54:36.22#ibcon#*before write, iclass 14, count 0 2006.229.19:54:36.22#ibcon#enter sib2, iclass 14, count 0 2006.229.19:54:36.22#ibcon#flushed, iclass 14, count 0 2006.229.19:54:36.22#ibcon#about to write, iclass 14, count 0 2006.229.19:54:36.22#ibcon#wrote, iclass 14, count 0 2006.229.19:54:36.22#ibcon#about to read 3, iclass 14, count 0 2006.229.19:54:36.26#ibcon#read 3, iclass 14, count 0 2006.229.19:54:36.26#ibcon#about to read 4, iclass 14, count 0 2006.229.19:54:36.26#ibcon#read 4, iclass 14, count 0 2006.229.19:54:36.26#ibcon#about to read 5, iclass 14, count 0 2006.229.19:54:36.26#ibcon#read 5, iclass 14, count 0 2006.229.19:54:36.26#ibcon#about to read 6, iclass 14, count 0 2006.229.19:54:36.26#ibcon#read 6, iclass 14, count 0 2006.229.19:54:36.26#ibcon#end of sib2, iclass 14, count 0 2006.229.19:54:36.26#ibcon#*after write, iclass 14, count 0 2006.229.19:54:36.26#ibcon#*before return 0, iclass 14, count 0 2006.229.19:54:36.26#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:36.26#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:36.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:54:36.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:54:36.26$vck44/va=7,5 2006.229.19:54:36.26#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.19:54:36.26#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.19:54:36.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:36.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:36.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:36.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:36.32#ibcon#enter wrdev, iclass 16, count 2 2006.229.19:54:36.32#ibcon#first serial, iclass 16, count 2 2006.229.19:54:36.32#ibcon#enter sib2, iclass 16, count 2 2006.229.19:54:36.32#ibcon#flushed, iclass 16, count 2 2006.229.19:54:36.32#ibcon#about to write, iclass 16, count 2 2006.229.19:54:36.32#ibcon#wrote, iclass 16, count 2 2006.229.19:54:36.32#ibcon#about to read 3, iclass 16, count 2 2006.229.19:54:36.34#ibcon#read 3, iclass 16, count 2 2006.229.19:54:36.34#ibcon#about to read 4, iclass 16, count 2 2006.229.19:54:36.34#ibcon#read 4, iclass 16, count 2 2006.229.19:54:36.34#ibcon#about to read 5, iclass 16, count 2 2006.229.19:54:36.34#ibcon#read 5, iclass 16, count 2 2006.229.19:54:36.34#ibcon#about to read 6, iclass 16, count 2 2006.229.19:54:36.34#ibcon#read 6, iclass 16, count 2 2006.229.19:54:36.34#ibcon#end of sib2, iclass 16, count 2 2006.229.19:54:36.34#ibcon#*mode == 0, iclass 16, count 2 2006.229.19:54:36.34#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.19:54:36.34#ibcon#[25=AT07-05\r\n] 2006.229.19:54:36.34#ibcon#*before write, iclass 16, count 2 2006.229.19:54:36.34#ibcon#enter sib2, iclass 16, count 2 2006.229.19:54:36.34#ibcon#flushed, iclass 16, count 2 2006.229.19:54:36.34#ibcon#about to write, iclass 16, count 2 2006.229.19:54:36.34#ibcon#wrote, iclass 16, count 2 2006.229.19:54:36.34#ibcon#about to read 3, iclass 16, count 2 2006.229.19:54:36.37#ibcon#read 3, iclass 16, count 2 2006.229.19:54:36.37#ibcon#about to read 4, iclass 16, count 2 2006.229.19:54:36.37#ibcon#read 4, iclass 16, count 2 2006.229.19:54:36.37#ibcon#about to read 5, iclass 16, count 2 2006.229.19:54:36.37#ibcon#read 5, iclass 16, count 2 2006.229.19:54:36.37#ibcon#about to read 6, iclass 16, count 2 2006.229.19:54:36.37#ibcon#read 6, iclass 16, count 2 2006.229.19:54:36.37#ibcon#end of sib2, iclass 16, count 2 2006.229.19:54:36.37#ibcon#*after write, iclass 16, count 2 2006.229.19:54:36.37#ibcon#*before return 0, iclass 16, count 2 2006.229.19:54:36.37#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:36.37#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:36.37#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.19:54:36.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:36.37#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:36.49#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:36.49#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:36.49#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:54:36.49#ibcon#first serial, iclass 16, count 0 2006.229.19:54:36.49#ibcon#enter sib2, iclass 16, count 0 2006.229.19:54:36.49#ibcon#flushed, iclass 16, count 0 2006.229.19:54:36.49#ibcon#about to write, iclass 16, count 0 2006.229.19:54:36.49#ibcon#wrote, iclass 16, count 0 2006.229.19:54:36.49#ibcon#about to read 3, iclass 16, count 0 2006.229.19:54:36.51#ibcon#read 3, iclass 16, count 0 2006.229.19:54:36.51#ibcon#about to read 4, iclass 16, count 0 2006.229.19:54:36.51#ibcon#read 4, iclass 16, count 0 2006.229.19:54:36.51#ibcon#about to read 5, iclass 16, count 0 2006.229.19:54:36.51#ibcon#read 5, iclass 16, count 0 2006.229.19:54:36.51#ibcon#about to read 6, iclass 16, count 0 2006.229.19:54:36.51#ibcon#read 6, iclass 16, count 0 2006.229.19:54:36.51#ibcon#end of sib2, iclass 16, count 0 2006.229.19:54:36.51#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:54:36.51#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:54:36.51#ibcon#[25=USB\r\n] 2006.229.19:54:36.51#ibcon#*before write, iclass 16, count 0 2006.229.19:54:36.51#ibcon#enter sib2, iclass 16, count 0 2006.229.19:54:36.51#ibcon#flushed, iclass 16, count 0 2006.229.19:54:36.51#ibcon#about to write, iclass 16, count 0 2006.229.19:54:36.51#ibcon#wrote, iclass 16, count 0 2006.229.19:54:36.51#ibcon#about to read 3, iclass 16, count 0 2006.229.19:54:36.54#ibcon#read 3, iclass 16, count 0 2006.229.19:54:36.54#ibcon#about to read 4, iclass 16, count 0 2006.229.19:54:36.54#ibcon#read 4, iclass 16, count 0 2006.229.19:54:36.54#ibcon#about to read 5, iclass 16, count 0 2006.229.19:54:36.54#ibcon#read 5, iclass 16, count 0 2006.229.19:54:36.54#ibcon#about to read 6, iclass 16, count 0 2006.229.19:54:36.54#ibcon#read 6, iclass 16, count 0 2006.229.19:54:36.54#ibcon#end of sib2, iclass 16, count 0 2006.229.19:54:36.54#ibcon#*after write, iclass 16, count 0 2006.229.19:54:36.54#ibcon#*before return 0, iclass 16, count 0 2006.229.19:54:36.54#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:36.54#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:36.54#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:54:36.54#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:54:36.54$vck44/valo=8,884.99 2006.229.19:54:36.54#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.19:54:36.54#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.19:54:36.54#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:36.54#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:36.54#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:36.54#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:36.54#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:54:36.54#ibcon#first serial, iclass 18, count 0 2006.229.19:54:36.54#ibcon#enter sib2, iclass 18, count 0 2006.229.19:54:36.54#ibcon#flushed, iclass 18, count 0 2006.229.19:54:36.54#ibcon#about to write, iclass 18, count 0 2006.229.19:54:36.54#ibcon#wrote, iclass 18, count 0 2006.229.19:54:36.54#ibcon#about to read 3, iclass 18, count 0 2006.229.19:54:36.56#ibcon#read 3, iclass 18, count 0 2006.229.19:54:36.56#ibcon#about to read 4, iclass 18, count 0 2006.229.19:54:36.56#ibcon#read 4, iclass 18, count 0 2006.229.19:54:36.56#ibcon#about to read 5, iclass 18, count 0 2006.229.19:54:36.56#ibcon#read 5, iclass 18, count 0 2006.229.19:54:36.56#ibcon#about to read 6, iclass 18, count 0 2006.229.19:54:36.56#ibcon#read 6, iclass 18, count 0 2006.229.19:54:36.56#ibcon#end of sib2, iclass 18, count 0 2006.229.19:54:36.56#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:54:36.56#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:54:36.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.19:54:36.56#ibcon#*before write, iclass 18, count 0 2006.229.19:54:36.56#ibcon#enter sib2, iclass 18, count 0 2006.229.19:54:36.56#ibcon#flushed, iclass 18, count 0 2006.229.19:54:36.56#ibcon#about to write, iclass 18, count 0 2006.229.19:54:36.56#ibcon#wrote, iclass 18, count 0 2006.229.19:54:36.56#ibcon#about to read 3, iclass 18, count 0 2006.229.19:54:36.60#ibcon#read 3, iclass 18, count 0 2006.229.19:54:36.60#ibcon#about to read 4, iclass 18, count 0 2006.229.19:54:36.60#ibcon#read 4, iclass 18, count 0 2006.229.19:54:36.60#ibcon#about to read 5, iclass 18, count 0 2006.229.19:54:36.60#ibcon#read 5, iclass 18, count 0 2006.229.19:54:36.60#ibcon#about to read 6, iclass 18, count 0 2006.229.19:54:36.60#ibcon#read 6, iclass 18, count 0 2006.229.19:54:36.60#ibcon#end of sib2, iclass 18, count 0 2006.229.19:54:36.60#ibcon#*after write, iclass 18, count 0 2006.229.19:54:36.60#ibcon#*before return 0, iclass 18, count 0 2006.229.19:54:36.60#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:36.60#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:36.60#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:54:36.60#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:54:36.60$vck44/va=8,6 2006.229.19:54:36.60#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.19:54:36.60#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.19:54:36.60#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:36.60#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:36.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:36.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:36.66#ibcon#enter wrdev, iclass 20, count 2 2006.229.19:54:36.66#ibcon#first serial, iclass 20, count 2 2006.229.19:54:36.66#ibcon#enter sib2, iclass 20, count 2 2006.229.19:54:36.66#ibcon#flushed, iclass 20, count 2 2006.229.19:54:36.66#ibcon#about to write, iclass 20, count 2 2006.229.19:54:36.66#ibcon#wrote, iclass 20, count 2 2006.229.19:54:36.66#ibcon#about to read 3, iclass 20, count 2 2006.229.19:54:36.68#ibcon#read 3, iclass 20, count 2 2006.229.19:54:36.68#ibcon#about to read 4, iclass 20, count 2 2006.229.19:54:36.68#ibcon#read 4, iclass 20, count 2 2006.229.19:54:36.68#ibcon#about to read 5, iclass 20, count 2 2006.229.19:54:36.68#ibcon#read 5, iclass 20, count 2 2006.229.19:54:36.68#ibcon#about to read 6, iclass 20, count 2 2006.229.19:54:36.68#ibcon#read 6, iclass 20, count 2 2006.229.19:54:36.68#ibcon#end of sib2, iclass 20, count 2 2006.229.19:54:36.68#ibcon#*mode == 0, iclass 20, count 2 2006.229.19:54:36.68#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.19:54:36.68#ibcon#[25=AT08-06\r\n] 2006.229.19:54:36.68#ibcon#*before write, iclass 20, count 2 2006.229.19:54:36.68#ibcon#enter sib2, iclass 20, count 2 2006.229.19:54:36.68#ibcon#flushed, iclass 20, count 2 2006.229.19:54:36.68#ibcon#about to write, iclass 20, count 2 2006.229.19:54:36.68#ibcon#wrote, iclass 20, count 2 2006.229.19:54:36.68#ibcon#about to read 3, iclass 20, count 2 2006.229.19:54:36.71#ibcon#read 3, iclass 20, count 2 2006.229.19:54:36.71#ibcon#about to read 4, iclass 20, count 2 2006.229.19:54:36.71#ibcon#read 4, iclass 20, count 2 2006.229.19:54:36.71#ibcon#about to read 5, iclass 20, count 2 2006.229.19:54:36.71#ibcon#read 5, iclass 20, count 2 2006.229.19:54:36.71#ibcon#about to read 6, iclass 20, count 2 2006.229.19:54:36.71#ibcon#read 6, iclass 20, count 2 2006.229.19:54:36.71#ibcon#end of sib2, iclass 20, count 2 2006.229.19:54:36.71#ibcon#*after write, iclass 20, count 2 2006.229.19:54:36.71#ibcon#*before return 0, iclass 20, count 2 2006.229.19:54:36.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:36.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:36.71#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.19:54:36.71#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:36.71#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:36.83#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:36.83#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:36.83#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:54:36.83#ibcon#first serial, iclass 20, count 0 2006.229.19:54:36.83#ibcon#enter sib2, iclass 20, count 0 2006.229.19:54:36.83#ibcon#flushed, iclass 20, count 0 2006.229.19:54:36.83#ibcon#about to write, iclass 20, count 0 2006.229.19:54:36.83#ibcon#wrote, iclass 20, count 0 2006.229.19:54:36.83#ibcon#about to read 3, iclass 20, count 0 2006.229.19:54:36.85#ibcon#read 3, iclass 20, count 0 2006.229.19:54:36.85#ibcon#about to read 4, iclass 20, count 0 2006.229.19:54:36.85#ibcon#read 4, iclass 20, count 0 2006.229.19:54:36.85#ibcon#about to read 5, iclass 20, count 0 2006.229.19:54:36.85#ibcon#read 5, iclass 20, count 0 2006.229.19:54:36.85#ibcon#about to read 6, iclass 20, count 0 2006.229.19:54:36.85#ibcon#read 6, iclass 20, count 0 2006.229.19:54:36.85#ibcon#end of sib2, iclass 20, count 0 2006.229.19:54:36.85#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:54:36.85#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:54:36.85#ibcon#[25=USB\r\n] 2006.229.19:54:36.85#ibcon#*before write, iclass 20, count 0 2006.229.19:54:36.85#ibcon#enter sib2, iclass 20, count 0 2006.229.19:54:36.85#ibcon#flushed, iclass 20, count 0 2006.229.19:54:36.85#ibcon#about to write, iclass 20, count 0 2006.229.19:54:36.85#ibcon#wrote, iclass 20, count 0 2006.229.19:54:36.85#ibcon#about to read 3, iclass 20, count 0 2006.229.19:54:36.88#ibcon#read 3, iclass 20, count 0 2006.229.19:54:36.88#ibcon#about to read 4, iclass 20, count 0 2006.229.19:54:36.88#ibcon#read 4, iclass 20, count 0 2006.229.19:54:36.88#ibcon#about to read 5, iclass 20, count 0 2006.229.19:54:36.88#ibcon#read 5, iclass 20, count 0 2006.229.19:54:36.88#ibcon#about to read 6, iclass 20, count 0 2006.229.19:54:36.88#ibcon#read 6, iclass 20, count 0 2006.229.19:54:36.88#ibcon#end of sib2, iclass 20, count 0 2006.229.19:54:36.88#ibcon#*after write, iclass 20, count 0 2006.229.19:54:36.88#ibcon#*before return 0, iclass 20, count 0 2006.229.19:54:36.88#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:36.88#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:36.88#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:54:36.88#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:54:36.88$vck44/vblo=1,629.99 2006.229.19:54:36.88#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:54:36.88#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:54:36.88#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:36.88#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:36.88#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:36.88#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:36.88#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:54:36.88#ibcon#first serial, iclass 22, count 0 2006.229.19:54:36.88#ibcon#enter sib2, iclass 22, count 0 2006.229.19:54:36.88#ibcon#flushed, iclass 22, count 0 2006.229.19:54:36.88#ibcon#about to write, iclass 22, count 0 2006.229.19:54:36.88#ibcon#wrote, iclass 22, count 0 2006.229.19:54:36.88#ibcon#about to read 3, iclass 22, count 0 2006.229.19:54:36.90#ibcon#read 3, iclass 22, count 0 2006.229.19:54:36.90#ibcon#about to read 4, iclass 22, count 0 2006.229.19:54:36.90#ibcon#read 4, iclass 22, count 0 2006.229.19:54:36.90#ibcon#about to read 5, iclass 22, count 0 2006.229.19:54:36.90#ibcon#read 5, iclass 22, count 0 2006.229.19:54:36.90#ibcon#about to read 6, iclass 22, count 0 2006.229.19:54:36.90#ibcon#read 6, iclass 22, count 0 2006.229.19:54:36.90#ibcon#end of sib2, iclass 22, count 0 2006.229.19:54:36.90#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:54:36.90#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:54:36.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.19:54:36.90#ibcon#*before write, iclass 22, count 0 2006.229.19:54:36.90#ibcon#enter sib2, iclass 22, count 0 2006.229.19:54:36.90#ibcon#flushed, iclass 22, count 0 2006.229.19:54:36.90#ibcon#about to write, iclass 22, count 0 2006.229.19:54:36.90#ibcon#wrote, iclass 22, count 0 2006.229.19:54:36.90#ibcon#about to read 3, iclass 22, count 0 2006.229.19:54:36.94#ibcon#read 3, iclass 22, count 0 2006.229.19:54:36.94#ibcon#about to read 4, iclass 22, count 0 2006.229.19:54:36.94#ibcon#read 4, iclass 22, count 0 2006.229.19:54:36.94#ibcon#about to read 5, iclass 22, count 0 2006.229.19:54:36.94#ibcon#read 5, iclass 22, count 0 2006.229.19:54:36.94#ibcon#about to read 6, iclass 22, count 0 2006.229.19:54:36.94#ibcon#read 6, iclass 22, count 0 2006.229.19:54:36.94#ibcon#end of sib2, iclass 22, count 0 2006.229.19:54:36.94#ibcon#*after write, iclass 22, count 0 2006.229.19:54:36.94#ibcon#*before return 0, iclass 22, count 0 2006.229.19:54:36.94#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:36.94#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:36.94#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:54:36.94#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:54:36.94$vck44/vb=1,4 2006.229.19:54:36.94#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.19:54:36.94#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.19:54:36.94#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:36.94#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:54:36.94#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:54:36.94#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:54:36.94#ibcon#enter wrdev, iclass 24, count 2 2006.229.19:54:36.94#ibcon#first serial, iclass 24, count 2 2006.229.19:54:36.94#ibcon#enter sib2, iclass 24, count 2 2006.229.19:54:36.94#ibcon#flushed, iclass 24, count 2 2006.229.19:54:36.94#ibcon#about to write, iclass 24, count 2 2006.229.19:54:36.94#ibcon#wrote, iclass 24, count 2 2006.229.19:54:36.94#ibcon#about to read 3, iclass 24, count 2 2006.229.19:54:36.96#ibcon#read 3, iclass 24, count 2 2006.229.19:54:36.96#ibcon#about to read 4, iclass 24, count 2 2006.229.19:54:36.96#ibcon#read 4, iclass 24, count 2 2006.229.19:54:36.96#ibcon#about to read 5, iclass 24, count 2 2006.229.19:54:36.96#ibcon#read 5, iclass 24, count 2 2006.229.19:54:36.96#ibcon#about to read 6, iclass 24, count 2 2006.229.19:54:36.96#ibcon#read 6, iclass 24, count 2 2006.229.19:54:36.96#ibcon#end of sib2, iclass 24, count 2 2006.229.19:54:36.96#ibcon#*mode == 0, iclass 24, count 2 2006.229.19:54:36.96#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.19:54:36.96#ibcon#[27=AT01-04\r\n] 2006.229.19:54:36.96#ibcon#*before write, iclass 24, count 2 2006.229.19:54:36.96#ibcon#enter sib2, iclass 24, count 2 2006.229.19:54:36.96#ibcon#flushed, iclass 24, count 2 2006.229.19:54:36.96#ibcon#about to write, iclass 24, count 2 2006.229.19:54:36.96#ibcon#wrote, iclass 24, count 2 2006.229.19:54:36.96#ibcon#about to read 3, iclass 24, count 2 2006.229.19:54:36.99#ibcon#read 3, iclass 24, count 2 2006.229.19:54:36.99#ibcon#about to read 4, iclass 24, count 2 2006.229.19:54:36.99#ibcon#read 4, iclass 24, count 2 2006.229.19:54:36.99#ibcon#about to read 5, iclass 24, count 2 2006.229.19:54:36.99#ibcon#read 5, iclass 24, count 2 2006.229.19:54:36.99#ibcon#about to read 6, iclass 24, count 2 2006.229.19:54:36.99#ibcon#read 6, iclass 24, count 2 2006.229.19:54:36.99#ibcon#end of sib2, iclass 24, count 2 2006.229.19:54:36.99#ibcon#*after write, iclass 24, count 2 2006.229.19:54:36.99#ibcon#*before return 0, iclass 24, count 2 2006.229.19:54:36.99#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:54:36.99#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.19:54:36.99#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.19:54:36.99#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:36.99#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:54:37.11#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:54:37.11#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:54:37.11#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:54:37.11#ibcon#first serial, iclass 24, count 0 2006.229.19:54:37.11#ibcon#enter sib2, iclass 24, count 0 2006.229.19:54:37.11#ibcon#flushed, iclass 24, count 0 2006.229.19:54:37.11#ibcon#about to write, iclass 24, count 0 2006.229.19:54:37.11#ibcon#wrote, iclass 24, count 0 2006.229.19:54:37.11#ibcon#about to read 3, iclass 24, count 0 2006.229.19:54:37.13#ibcon#read 3, iclass 24, count 0 2006.229.19:54:37.13#ibcon#about to read 4, iclass 24, count 0 2006.229.19:54:37.13#ibcon#read 4, iclass 24, count 0 2006.229.19:54:37.13#ibcon#about to read 5, iclass 24, count 0 2006.229.19:54:37.13#ibcon#read 5, iclass 24, count 0 2006.229.19:54:37.13#ibcon#about to read 6, iclass 24, count 0 2006.229.19:54:37.13#ibcon#read 6, iclass 24, count 0 2006.229.19:54:37.13#ibcon#end of sib2, iclass 24, count 0 2006.229.19:54:37.13#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:54:37.13#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:54:37.13#ibcon#[27=USB\r\n] 2006.229.19:54:37.13#ibcon#*before write, iclass 24, count 0 2006.229.19:54:37.13#ibcon#enter sib2, iclass 24, count 0 2006.229.19:54:37.13#ibcon#flushed, iclass 24, count 0 2006.229.19:54:37.13#ibcon#about to write, iclass 24, count 0 2006.229.19:54:37.13#ibcon#wrote, iclass 24, count 0 2006.229.19:54:37.13#ibcon#about to read 3, iclass 24, count 0 2006.229.19:54:37.16#ibcon#read 3, iclass 24, count 0 2006.229.19:54:37.16#ibcon#about to read 4, iclass 24, count 0 2006.229.19:54:37.16#ibcon#read 4, iclass 24, count 0 2006.229.19:54:37.16#ibcon#about to read 5, iclass 24, count 0 2006.229.19:54:37.16#ibcon#read 5, iclass 24, count 0 2006.229.19:54:37.16#ibcon#about to read 6, iclass 24, count 0 2006.229.19:54:37.16#ibcon#read 6, iclass 24, count 0 2006.229.19:54:37.16#ibcon#end of sib2, iclass 24, count 0 2006.229.19:54:37.16#ibcon#*after write, iclass 24, count 0 2006.229.19:54:37.16#ibcon#*before return 0, iclass 24, count 0 2006.229.19:54:37.16#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:54:37.16#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.19:54:37.16#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:54:37.16#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:54:37.16$vck44/vblo=2,634.99 2006.229.19:54:37.16#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.19:54:37.16#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.19:54:37.16#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:37.16#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:37.16#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:37.16#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:37.16#ibcon#enter wrdev, iclass 26, count 0 2006.229.19:54:37.16#ibcon#first serial, iclass 26, count 0 2006.229.19:54:37.16#ibcon#enter sib2, iclass 26, count 0 2006.229.19:54:37.16#ibcon#flushed, iclass 26, count 0 2006.229.19:54:37.16#ibcon#about to write, iclass 26, count 0 2006.229.19:54:37.16#ibcon#wrote, iclass 26, count 0 2006.229.19:54:37.16#ibcon#about to read 3, iclass 26, count 0 2006.229.19:54:37.18#ibcon#read 3, iclass 26, count 0 2006.229.19:54:37.18#ibcon#about to read 4, iclass 26, count 0 2006.229.19:54:37.18#ibcon#read 4, iclass 26, count 0 2006.229.19:54:37.18#ibcon#about to read 5, iclass 26, count 0 2006.229.19:54:37.18#ibcon#read 5, iclass 26, count 0 2006.229.19:54:37.18#ibcon#about to read 6, iclass 26, count 0 2006.229.19:54:37.18#ibcon#read 6, iclass 26, count 0 2006.229.19:54:37.18#ibcon#end of sib2, iclass 26, count 0 2006.229.19:54:37.18#ibcon#*mode == 0, iclass 26, count 0 2006.229.19:54:37.18#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.19:54:37.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.19:54:37.18#ibcon#*before write, iclass 26, count 0 2006.229.19:54:37.18#ibcon#enter sib2, iclass 26, count 0 2006.229.19:54:37.18#ibcon#flushed, iclass 26, count 0 2006.229.19:54:37.18#ibcon#about to write, iclass 26, count 0 2006.229.19:54:37.18#ibcon#wrote, iclass 26, count 0 2006.229.19:54:37.18#ibcon#about to read 3, iclass 26, count 0 2006.229.19:54:37.22#ibcon#read 3, iclass 26, count 0 2006.229.19:54:37.22#ibcon#about to read 4, iclass 26, count 0 2006.229.19:54:37.22#ibcon#read 4, iclass 26, count 0 2006.229.19:54:37.22#ibcon#about to read 5, iclass 26, count 0 2006.229.19:54:37.22#ibcon#read 5, iclass 26, count 0 2006.229.19:54:37.22#ibcon#about to read 6, iclass 26, count 0 2006.229.19:54:37.22#ibcon#read 6, iclass 26, count 0 2006.229.19:54:37.22#ibcon#end of sib2, iclass 26, count 0 2006.229.19:54:37.22#ibcon#*after write, iclass 26, count 0 2006.229.19:54:37.22#ibcon#*before return 0, iclass 26, count 0 2006.229.19:54:37.22#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:37.22#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.19:54:37.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.19:54:37.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.19:54:37.22$vck44/vb=2,4 2006.229.19:54:37.22#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.19:54:37.22#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.19:54:37.22#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:37.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:37.28#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:37.28#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:37.28#ibcon#enter wrdev, iclass 28, count 2 2006.229.19:54:37.28#ibcon#first serial, iclass 28, count 2 2006.229.19:54:37.28#ibcon#enter sib2, iclass 28, count 2 2006.229.19:54:37.28#ibcon#flushed, iclass 28, count 2 2006.229.19:54:37.28#ibcon#about to write, iclass 28, count 2 2006.229.19:54:37.28#ibcon#wrote, iclass 28, count 2 2006.229.19:54:37.28#ibcon#about to read 3, iclass 28, count 2 2006.229.19:54:37.30#ibcon#read 3, iclass 28, count 2 2006.229.19:54:37.30#ibcon#about to read 4, iclass 28, count 2 2006.229.19:54:37.30#ibcon#read 4, iclass 28, count 2 2006.229.19:54:37.30#ibcon#about to read 5, iclass 28, count 2 2006.229.19:54:37.30#ibcon#read 5, iclass 28, count 2 2006.229.19:54:37.30#ibcon#about to read 6, iclass 28, count 2 2006.229.19:54:37.30#ibcon#read 6, iclass 28, count 2 2006.229.19:54:37.30#ibcon#end of sib2, iclass 28, count 2 2006.229.19:54:37.30#ibcon#*mode == 0, iclass 28, count 2 2006.229.19:54:37.30#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.19:54:37.30#ibcon#[27=AT02-04\r\n] 2006.229.19:54:37.30#ibcon#*before write, iclass 28, count 2 2006.229.19:54:37.30#ibcon#enter sib2, iclass 28, count 2 2006.229.19:54:37.30#ibcon#flushed, iclass 28, count 2 2006.229.19:54:37.30#ibcon#about to write, iclass 28, count 2 2006.229.19:54:37.30#ibcon#wrote, iclass 28, count 2 2006.229.19:54:37.30#ibcon#about to read 3, iclass 28, count 2 2006.229.19:54:37.33#ibcon#read 3, iclass 28, count 2 2006.229.19:54:37.33#ibcon#about to read 4, iclass 28, count 2 2006.229.19:54:37.33#ibcon#read 4, iclass 28, count 2 2006.229.19:54:37.33#ibcon#about to read 5, iclass 28, count 2 2006.229.19:54:37.33#ibcon#read 5, iclass 28, count 2 2006.229.19:54:37.33#ibcon#about to read 6, iclass 28, count 2 2006.229.19:54:37.33#ibcon#read 6, iclass 28, count 2 2006.229.19:54:37.33#ibcon#end of sib2, iclass 28, count 2 2006.229.19:54:37.33#ibcon#*after write, iclass 28, count 2 2006.229.19:54:37.33#ibcon#*before return 0, iclass 28, count 2 2006.229.19:54:37.33#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:37.33#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.19:54:37.33#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.19:54:37.33#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:37.33#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:37.45#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:37.45#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:37.45#ibcon#enter wrdev, iclass 28, count 0 2006.229.19:54:37.45#ibcon#first serial, iclass 28, count 0 2006.229.19:54:37.45#ibcon#enter sib2, iclass 28, count 0 2006.229.19:54:37.45#ibcon#flushed, iclass 28, count 0 2006.229.19:54:37.45#ibcon#about to write, iclass 28, count 0 2006.229.19:54:37.45#ibcon#wrote, iclass 28, count 0 2006.229.19:54:37.45#ibcon#about to read 3, iclass 28, count 0 2006.229.19:54:37.47#ibcon#read 3, iclass 28, count 0 2006.229.19:54:37.47#ibcon#about to read 4, iclass 28, count 0 2006.229.19:54:37.47#ibcon#read 4, iclass 28, count 0 2006.229.19:54:37.47#ibcon#about to read 5, iclass 28, count 0 2006.229.19:54:37.47#ibcon#read 5, iclass 28, count 0 2006.229.19:54:37.47#ibcon#about to read 6, iclass 28, count 0 2006.229.19:54:37.47#ibcon#read 6, iclass 28, count 0 2006.229.19:54:37.47#ibcon#end of sib2, iclass 28, count 0 2006.229.19:54:37.47#ibcon#*mode == 0, iclass 28, count 0 2006.229.19:54:37.47#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.19:54:37.47#ibcon#[27=USB\r\n] 2006.229.19:54:37.47#ibcon#*before write, iclass 28, count 0 2006.229.19:54:37.47#ibcon#enter sib2, iclass 28, count 0 2006.229.19:54:37.47#ibcon#flushed, iclass 28, count 0 2006.229.19:54:37.47#ibcon#about to write, iclass 28, count 0 2006.229.19:54:37.47#ibcon#wrote, iclass 28, count 0 2006.229.19:54:37.47#ibcon#about to read 3, iclass 28, count 0 2006.229.19:54:37.50#ibcon#read 3, iclass 28, count 0 2006.229.19:54:37.50#ibcon#about to read 4, iclass 28, count 0 2006.229.19:54:37.50#ibcon#read 4, iclass 28, count 0 2006.229.19:54:37.50#ibcon#about to read 5, iclass 28, count 0 2006.229.19:54:37.50#ibcon#read 5, iclass 28, count 0 2006.229.19:54:37.50#ibcon#about to read 6, iclass 28, count 0 2006.229.19:54:37.50#ibcon#read 6, iclass 28, count 0 2006.229.19:54:37.50#ibcon#end of sib2, iclass 28, count 0 2006.229.19:54:37.50#ibcon#*after write, iclass 28, count 0 2006.229.19:54:37.50#ibcon#*before return 0, iclass 28, count 0 2006.229.19:54:37.50#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:37.50#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.19:54:37.50#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.19:54:37.50#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.19:54:37.50$vck44/vblo=3,649.99 2006.229.19:54:37.50#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.19:54:37.50#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.19:54:37.50#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:37.50#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:37.50#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:37.50#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:37.50#ibcon#enter wrdev, iclass 30, count 0 2006.229.19:54:37.50#ibcon#first serial, iclass 30, count 0 2006.229.19:54:37.50#ibcon#enter sib2, iclass 30, count 0 2006.229.19:54:37.50#ibcon#flushed, iclass 30, count 0 2006.229.19:54:37.50#ibcon#about to write, iclass 30, count 0 2006.229.19:54:37.50#ibcon#wrote, iclass 30, count 0 2006.229.19:54:37.50#ibcon#about to read 3, iclass 30, count 0 2006.229.19:54:37.52#ibcon#read 3, iclass 30, count 0 2006.229.19:54:37.52#ibcon#about to read 4, iclass 30, count 0 2006.229.19:54:37.52#ibcon#read 4, iclass 30, count 0 2006.229.19:54:37.52#ibcon#about to read 5, iclass 30, count 0 2006.229.19:54:37.52#ibcon#read 5, iclass 30, count 0 2006.229.19:54:37.52#ibcon#about to read 6, iclass 30, count 0 2006.229.19:54:37.52#ibcon#read 6, iclass 30, count 0 2006.229.19:54:37.52#ibcon#end of sib2, iclass 30, count 0 2006.229.19:54:37.52#ibcon#*mode == 0, iclass 30, count 0 2006.229.19:54:37.52#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.19:54:37.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.19:54:37.52#ibcon#*before write, iclass 30, count 0 2006.229.19:54:37.52#ibcon#enter sib2, iclass 30, count 0 2006.229.19:54:37.52#ibcon#flushed, iclass 30, count 0 2006.229.19:54:37.52#ibcon#about to write, iclass 30, count 0 2006.229.19:54:37.52#ibcon#wrote, iclass 30, count 0 2006.229.19:54:37.52#ibcon#about to read 3, iclass 30, count 0 2006.229.19:54:37.56#ibcon#read 3, iclass 30, count 0 2006.229.19:54:37.56#ibcon#about to read 4, iclass 30, count 0 2006.229.19:54:37.56#ibcon#read 4, iclass 30, count 0 2006.229.19:54:37.56#ibcon#about to read 5, iclass 30, count 0 2006.229.19:54:37.56#ibcon#read 5, iclass 30, count 0 2006.229.19:54:37.56#ibcon#about to read 6, iclass 30, count 0 2006.229.19:54:37.56#ibcon#read 6, iclass 30, count 0 2006.229.19:54:37.56#ibcon#end of sib2, iclass 30, count 0 2006.229.19:54:37.56#ibcon#*after write, iclass 30, count 0 2006.229.19:54:37.56#ibcon#*before return 0, iclass 30, count 0 2006.229.19:54:37.56#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:37.56#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.19:54:37.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.19:54:37.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.19:54:37.56$vck44/vb=3,4 2006.229.19:54:37.56#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.19:54:37.56#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.19:54:37.56#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:37.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:37.62#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:37.62#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:37.62#ibcon#enter wrdev, iclass 32, count 2 2006.229.19:54:37.62#ibcon#first serial, iclass 32, count 2 2006.229.19:54:37.62#ibcon#enter sib2, iclass 32, count 2 2006.229.19:54:37.62#ibcon#flushed, iclass 32, count 2 2006.229.19:54:37.62#ibcon#about to write, iclass 32, count 2 2006.229.19:54:37.62#ibcon#wrote, iclass 32, count 2 2006.229.19:54:37.62#ibcon#about to read 3, iclass 32, count 2 2006.229.19:54:37.64#ibcon#read 3, iclass 32, count 2 2006.229.19:54:37.64#ibcon#about to read 4, iclass 32, count 2 2006.229.19:54:37.64#ibcon#read 4, iclass 32, count 2 2006.229.19:54:37.64#ibcon#about to read 5, iclass 32, count 2 2006.229.19:54:37.64#ibcon#read 5, iclass 32, count 2 2006.229.19:54:37.64#ibcon#about to read 6, iclass 32, count 2 2006.229.19:54:37.64#ibcon#read 6, iclass 32, count 2 2006.229.19:54:37.64#ibcon#end of sib2, iclass 32, count 2 2006.229.19:54:37.64#ibcon#*mode == 0, iclass 32, count 2 2006.229.19:54:37.64#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.19:54:37.64#ibcon#[27=AT03-04\r\n] 2006.229.19:54:37.64#ibcon#*before write, iclass 32, count 2 2006.229.19:54:37.64#ibcon#enter sib2, iclass 32, count 2 2006.229.19:54:37.64#ibcon#flushed, iclass 32, count 2 2006.229.19:54:37.64#ibcon#about to write, iclass 32, count 2 2006.229.19:54:37.64#ibcon#wrote, iclass 32, count 2 2006.229.19:54:37.64#ibcon#about to read 3, iclass 32, count 2 2006.229.19:54:37.67#ibcon#read 3, iclass 32, count 2 2006.229.19:54:37.67#ibcon#about to read 4, iclass 32, count 2 2006.229.19:54:37.67#ibcon#read 4, iclass 32, count 2 2006.229.19:54:37.67#ibcon#about to read 5, iclass 32, count 2 2006.229.19:54:37.67#ibcon#read 5, iclass 32, count 2 2006.229.19:54:37.67#ibcon#about to read 6, iclass 32, count 2 2006.229.19:54:37.67#ibcon#read 6, iclass 32, count 2 2006.229.19:54:37.67#ibcon#end of sib2, iclass 32, count 2 2006.229.19:54:37.67#ibcon#*after write, iclass 32, count 2 2006.229.19:54:37.67#ibcon#*before return 0, iclass 32, count 2 2006.229.19:54:37.67#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:37.67#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.19:54:37.67#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.19:54:37.67#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:37.67#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:37.79#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:37.79#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:37.79#ibcon#enter wrdev, iclass 32, count 0 2006.229.19:54:37.79#ibcon#first serial, iclass 32, count 0 2006.229.19:54:37.79#ibcon#enter sib2, iclass 32, count 0 2006.229.19:54:37.79#ibcon#flushed, iclass 32, count 0 2006.229.19:54:37.79#ibcon#about to write, iclass 32, count 0 2006.229.19:54:37.79#ibcon#wrote, iclass 32, count 0 2006.229.19:54:37.79#ibcon#about to read 3, iclass 32, count 0 2006.229.19:54:37.81#ibcon#read 3, iclass 32, count 0 2006.229.19:54:37.81#ibcon#about to read 4, iclass 32, count 0 2006.229.19:54:37.81#ibcon#read 4, iclass 32, count 0 2006.229.19:54:37.81#ibcon#about to read 5, iclass 32, count 0 2006.229.19:54:37.81#ibcon#read 5, iclass 32, count 0 2006.229.19:54:37.81#ibcon#about to read 6, iclass 32, count 0 2006.229.19:54:37.81#ibcon#read 6, iclass 32, count 0 2006.229.19:54:37.81#ibcon#end of sib2, iclass 32, count 0 2006.229.19:54:37.81#ibcon#*mode == 0, iclass 32, count 0 2006.229.19:54:37.81#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.19:54:37.81#ibcon#[27=USB\r\n] 2006.229.19:54:37.81#ibcon#*before write, iclass 32, count 0 2006.229.19:54:37.81#ibcon#enter sib2, iclass 32, count 0 2006.229.19:54:37.81#ibcon#flushed, iclass 32, count 0 2006.229.19:54:37.81#ibcon#about to write, iclass 32, count 0 2006.229.19:54:37.81#ibcon#wrote, iclass 32, count 0 2006.229.19:54:37.81#ibcon#about to read 3, iclass 32, count 0 2006.229.19:54:37.84#ibcon#read 3, iclass 32, count 0 2006.229.19:54:37.84#ibcon#about to read 4, iclass 32, count 0 2006.229.19:54:37.84#ibcon#read 4, iclass 32, count 0 2006.229.19:54:37.84#ibcon#about to read 5, iclass 32, count 0 2006.229.19:54:37.84#ibcon#read 5, iclass 32, count 0 2006.229.19:54:37.84#ibcon#about to read 6, iclass 32, count 0 2006.229.19:54:37.84#ibcon#read 6, iclass 32, count 0 2006.229.19:54:37.84#ibcon#end of sib2, iclass 32, count 0 2006.229.19:54:37.84#ibcon#*after write, iclass 32, count 0 2006.229.19:54:37.84#ibcon#*before return 0, iclass 32, count 0 2006.229.19:54:37.84#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:37.84#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.19:54:37.84#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.19:54:37.84#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.19:54:37.84$vck44/vblo=4,679.99 2006.229.19:54:37.84#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.19:54:37.84#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.19:54:37.84#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:37.84#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:37.84#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:37.84#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:37.84#ibcon#enter wrdev, iclass 34, count 0 2006.229.19:54:37.84#ibcon#first serial, iclass 34, count 0 2006.229.19:54:37.84#ibcon#enter sib2, iclass 34, count 0 2006.229.19:54:37.84#ibcon#flushed, iclass 34, count 0 2006.229.19:54:37.84#ibcon#about to write, iclass 34, count 0 2006.229.19:54:37.84#ibcon#wrote, iclass 34, count 0 2006.229.19:54:37.84#ibcon#about to read 3, iclass 34, count 0 2006.229.19:54:37.86#ibcon#read 3, iclass 34, count 0 2006.229.19:54:37.86#ibcon#about to read 4, iclass 34, count 0 2006.229.19:54:37.86#ibcon#read 4, iclass 34, count 0 2006.229.19:54:37.86#ibcon#about to read 5, iclass 34, count 0 2006.229.19:54:37.86#ibcon#read 5, iclass 34, count 0 2006.229.19:54:37.86#ibcon#about to read 6, iclass 34, count 0 2006.229.19:54:37.86#ibcon#read 6, iclass 34, count 0 2006.229.19:54:37.86#ibcon#end of sib2, iclass 34, count 0 2006.229.19:54:37.86#ibcon#*mode == 0, iclass 34, count 0 2006.229.19:54:37.86#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.19:54:37.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.19:54:37.86#ibcon#*before write, iclass 34, count 0 2006.229.19:54:37.86#ibcon#enter sib2, iclass 34, count 0 2006.229.19:54:37.86#ibcon#flushed, iclass 34, count 0 2006.229.19:54:37.86#ibcon#about to write, iclass 34, count 0 2006.229.19:54:37.86#ibcon#wrote, iclass 34, count 0 2006.229.19:54:37.86#ibcon#about to read 3, iclass 34, count 0 2006.229.19:54:37.90#ibcon#read 3, iclass 34, count 0 2006.229.19:54:37.90#ibcon#about to read 4, iclass 34, count 0 2006.229.19:54:37.90#ibcon#read 4, iclass 34, count 0 2006.229.19:54:37.90#ibcon#about to read 5, iclass 34, count 0 2006.229.19:54:37.90#ibcon#read 5, iclass 34, count 0 2006.229.19:54:37.90#ibcon#about to read 6, iclass 34, count 0 2006.229.19:54:37.90#ibcon#read 6, iclass 34, count 0 2006.229.19:54:37.90#ibcon#end of sib2, iclass 34, count 0 2006.229.19:54:37.90#ibcon#*after write, iclass 34, count 0 2006.229.19:54:37.90#ibcon#*before return 0, iclass 34, count 0 2006.229.19:54:37.90#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:37.90#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.19:54:37.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.19:54:37.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.19:54:37.90$vck44/vb=4,4 2006.229.19:54:37.90#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.19:54:37.90#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.19:54:37.90#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:37.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:37.96#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:37.96#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:37.96#ibcon#enter wrdev, iclass 36, count 2 2006.229.19:54:37.96#ibcon#first serial, iclass 36, count 2 2006.229.19:54:37.96#ibcon#enter sib2, iclass 36, count 2 2006.229.19:54:37.96#ibcon#flushed, iclass 36, count 2 2006.229.19:54:37.96#ibcon#about to write, iclass 36, count 2 2006.229.19:54:37.96#ibcon#wrote, iclass 36, count 2 2006.229.19:54:37.96#ibcon#about to read 3, iclass 36, count 2 2006.229.19:54:37.98#ibcon#read 3, iclass 36, count 2 2006.229.19:54:37.98#ibcon#about to read 4, iclass 36, count 2 2006.229.19:54:37.98#ibcon#read 4, iclass 36, count 2 2006.229.19:54:37.98#ibcon#about to read 5, iclass 36, count 2 2006.229.19:54:37.98#ibcon#read 5, iclass 36, count 2 2006.229.19:54:37.98#ibcon#about to read 6, iclass 36, count 2 2006.229.19:54:37.98#ibcon#read 6, iclass 36, count 2 2006.229.19:54:37.98#ibcon#end of sib2, iclass 36, count 2 2006.229.19:54:37.98#ibcon#*mode == 0, iclass 36, count 2 2006.229.19:54:37.98#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.19:54:37.98#ibcon#[27=AT04-04\r\n] 2006.229.19:54:37.98#ibcon#*before write, iclass 36, count 2 2006.229.19:54:37.98#ibcon#enter sib2, iclass 36, count 2 2006.229.19:54:37.98#ibcon#flushed, iclass 36, count 2 2006.229.19:54:37.98#ibcon#about to write, iclass 36, count 2 2006.229.19:54:37.98#ibcon#wrote, iclass 36, count 2 2006.229.19:54:37.98#ibcon#about to read 3, iclass 36, count 2 2006.229.19:54:38.01#ibcon#read 3, iclass 36, count 2 2006.229.19:54:38.01#ibcon#about to read 4, iclass 36, count 2 2006.229.19:54:38.01#ibcon#read 4, iclass 36, count 2 2006.229.19:54:38.01#ibcon#about to read 5, iclass 36, count 2 2006.229.19:54:38.01#ibcon#read 5, iclass 36, count 2 2006.229.19:54:38.01#ibcon#about to read 6, iclass 36, count 2 2006.229.19:54:38.01#ibcon#read 6, iclass 36, count 2 2006.229.19:54:38.01#ibcon#end of sib2, iclass 36, count 2 2006.229.19:54:38.01#ibcon#*after write, iclass 36, count 2 2006.229.19:54:38.01#ibcon#*before return 0, iclass 36, count 2 2006.229.19:54:38.01#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:38.01#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.19:54:38.01#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.19:54:38.01#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:38.01#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:38.13#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:38.13#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:38.13#ibcon#enter wrdev, iclass 36, count 0 2006.229.19:54:38.13#ibcon#first serial, iclass 36, count 0 2006.229.19:54:38.13#ibcon#enter sib2, iclass 36, count 0 2006.229.19:54:38.13#ibcon#flushed, iclass 36, count 0 2006.229.19:54:38.13#ibcon#about to write, iclass 36, count 0 2006.229.19:54:38.13#ibcon#wrote, iclass 36, count 0 2006.229.19:54:38.13#ibcon#about to read 3, iclass 36, count 0 2006.229.19:54:38.15#ibcon#read 3, iclass 36, count 0 2006.229.19:54:38.15#ibcon#about to read 4, iclass 36, count 0 2006.229.19:54:38.15#ibcon#read 4, iclass 36, count 0 2006.229.19:54:38.15#ibcon#about to read 5, iclass 36, count 0 2006.229.19:54:38.15#ibcon#read 5, iclass 36, count 0 2006.229.19:54:38.15#ibcon#about to read 6, iclass 36, count 0 2006.229.19:54:38.15#ibcon#read 6, iclass 36, count 0 2006.229.19:54:38.15#ibcon#end of sib2, iclass 36, count 0 2006.229.19:54:38.15#ibcon#*mode == 0, iclass 36, count 0 2006.229.19:54:38.15#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.19:54:38.15#ibcon#[27=USB\r\n] 2006.229.19:54:38.15#ibcon#*before write, iclass 36, count 0 2006.229.19:54:38.15#ibcon#enter sib2, iclass 36, count 0 2006.229.19:54:38.15#ibcon#flushed, iclass 36, count 0 2006.229.19:54:38.15#ibcon#about to write, iclass 36, count 0 2006.229.19:54:38.15#ibcon#wrote, iclass 36, count 0 2006.229.19:54:38.15#ibcon#about to read 3, iclass 36, count 0 2006.229.19:54:38.18#ibcon#read 3, iclass 36, count 0 2006.229.19:54:38.18#ibcon#about to read 4, iclass 36, count 0 2006.229.19:54:38.18#ibcon#read 4, iclass 36, count 0 2006.229.19:54:38.18#ibcon#about to read 5, iclass 36, count 0 2006.229.19:54:38.18#ibcon#read 5, iclass 36, count 0 2006.229.19:54:38.18#ibcon#about to read 6, iclass 36, count 0 2006.229.19:54:38.18#ibcon#read 6, iclass 36, count 0 2006.229.19:54:38.18#ibcon#end of sib2, iclass 36, count 0 2006.229.19:54:38.18#ibcon#*after write, iclass 36, count 0 2006.229.19:54:38.18#ibcon#*before return 0, iclass 36, count 0 2006.229.19:54:38.18#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:38.18#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.19:54:38.18#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.19:54:38.18#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.19:54:38.18$vck44/vblo=5,709.99 2006.229.19:54:38.18#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.19:54:38.18#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.19:54:38.18#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:38.18#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:38.18#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:38.18#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:38.18#ibcon#enter wrdev, iclass 38, count 0 2006.229.19:54:38.18#ibcon#first serial, iclass 38, count 0 2006.229.19:54:38.18#ibcon#enter sib2, iclass 38, count 0 2006.229.19:54:38.18#ibcon#flushed, iclass 38, count 0 2006.229.19:54:38.18#ibcon#about to write, iclass 38, count 0 2006.229.19:54:38.18#ibcon#wrote, iclass 38, count 0 2006.229.19:54:38.18#ibcon#about to read 3, iclass 38, count 0 2006.229.19:54:38.20#ibcon#read 3, iclass 38, count 0 2006.229.19:54:38.20#ibcon#about to read 4, iclass 38, count 0 2006.229.19:54:38.20#ibcon#read 4, iclass 38, count 0 2006.229.19:54:38.20#ibcon#about to read 5, iclass 38, count 0 2006.229.19:54:38.20#ibcon#read 5, iclass 38, count 0 2006.229.19:54:38.20#ibcon#about to read 6, iclass 38, count 0 2006.229.19:54:38.20#ibcon#read 6, iclass 38, count 0 2006.229.19:54:38.20#ibcon#end of sib2, iclass 38, count 0 2006.229.19:54:38.20#ibcon#*mode == 0, iclass 38, count 0 2006.229.19:54:38.20#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.19:54:38.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.19:54:38.20#ibcon#*before write, iclass 38, count 0 2006.229.19:54:38.20#ibcon#enter sib2, iclass 38, count 0 2006.229.19:54:38.20#ibcon#flushed, iclass 38, count 0 2006.229.19:54:38.20#ibcon#about to write, iclass 38, count 0 2006.229.19:54:38.20#ibcon#wrote, iclass 38, count 0 2006.229.19:54:38.20#ibcon#about to read 3, iclass 38, count 0 2006.229.19:54:38.24#ibcon#read 3, iclass 38, count 0 2006.229.19:54:38.24#ibcon#about to read 4, iclass 38, count 0 2006.229.19:54:38.24#ibcon#read 4, iclass 38, count 0 2006.229.19:54:38.24#ibcon#about to read 5, iclass 38, count 0 2006.229.19:54:38.24#ibcon#read 5, iclass 38, count 0 2006.229.19:54:38.24#ibcon#about to read 6, iclass 38, count 0 2006.229.19:54:38.24#ibcon#read 6, iclass 38, count 0 2006.229.19:54:38.24#ibcon#end of sib2, iclass 38, count 0 2006.229.19:54:38.24#ibcon#*after write, iclass 38, count 0 2006.229.19:54:38.24#ibcon#*before return 0, iclass 38, count 0 2006.229.19:54:38.24#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:38.24#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.19:54:38.24#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.19:54:38.24#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.19:54:38.24$vck44/vb=5,4 2006.229.19:54:38.24#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.19:54:38.24#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.19:54:38.24#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:38.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:38.30#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:38.30#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:38.30#ibcon#enter wrdev, iclass 40, count 2 2006.229.19:54:38.30#ibcon#first serial, iclass 40, count 2 2006.229.19:54:38.30#ibcon#enter sib2, iclass 40, count 2 2006.229.19:54:38.30#ibcon#flushed, iclass 40, count 2 2006.229.19:54:38.30#ibcon#about to write, iclass 40, count 2 2006.229.19:54:38.30#ibcon#wrote, iclass 40, count 2 2006.229.19:54:38.30#ibcon#about to read 3, iclass 40, count 2 2006.229.19:54:38.32#ibcon#read 3, iclass 40, count 2 2006.229.19:54:38.32#ibcon#about to read 4, iclass 40, count 2 2006.229.19:54:38.32#ibcon#read 4, iclass 40, count 2 2006.229.19:54:38.32#ibcon#about to read 5, iclass 40, count 2 2006.229.19:54:38.32#ibcon#read 5, iclass 40, count 2 2006.229.19:54:38.32#ibcon#about to read 6, iclass 40, count 2 2006.229.19:54:38.32#ibcon#read 6, iclass 40, count 2 2006.229.19:54:38.32#ibcon#end of sib2, iclass 40, count 2 2006.229.19:54:38.32#ibcon#*mode == 0, iclass 40, count 2 2006.229.19:54:38.32#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.19:54:38.32#ibcon#[27=AT05-04\r\n] 2006.229.19:54:38.32#ibcon#*before write, iclass 40, count 2 2006.229.19:54:38.32#ibcon#enter sib2, iclass 40, count 2 2006.229.19:54:38.32#ibcon#flushed, iclass 40, count 2 2006.229.19:54:38.32#ibcon#about to write, iclass 40, count 2 2006.229.19:54:38.32#ibcon#wrote, iclass 40, count 2 2006.229.19:54:38.32#ibcon#about to read 3, iclass 40, count 2 2006.229.19:54:38.35#ibcon#read 3, iclass 40, count 2 2006.229.19:54:38.35#ibcon#about to read 4, iclass 40, count 2 2006.229.19:54:38.35#ibcon#read 4, iclass 40, count 2 2006.229.19:54:38.35#ibcon#about to read 5, iclass 40, count 2 2006.229.19:54:38.35#ibcon#read 5, iclass 40, count 2 2006.229.19:54:38.35#ibcon#about to read 6, iclass 40, count 2 2006.229.19:54:38.35#ibcon#read 6, iclass 40, count 2 2006.229.19:54:38.35#ibcon#end of sib2, iclass 40, count 2 2006.229.19:54:38.35#ibcon#*after write, iclass 40, count 2 2006.229.19:54:38.35#ibcon#*before return 0, iclass 40, count 2 2006.229.19:54:38.35#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:38.35#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.19:54:38.35#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.19:54:38.35#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:38.35#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:38.47#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:38.47#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:38.47#ibcon#enter wrdev, iclass 40, count 0 2006.229.19:54:38.47#ibcon#first serial, iclass 40, count 0 2006.229.19:54:38.47#ibcon#enter sib2, iclass 40, count 0 2006.229.19:54:38.47#ibcon#flushed, iclass 40, count 0 2006.229.19:54:38.47#ibcon#about to write, iclass 40, count 0 2006.229.19:54:38.47#ibcon#wrote, iclass 40, count 0 2006.229.19:54:38.47#ibcon#about to read 3, iclass 40, count 0 2006.229.19:54:38.49#ibcon#read 3, iclass 40, count 0 2006.229.19:54:38.49#ibcon#about to read 4, iclass 40, count 0 2006.229.19:54:38.49#ibcon#read 4, iclass 40, count 0 2006.229.19:54:38.49#ibcon#about to read 5, iclass 40, count 0 2006.229.19:54:38.49#ibcon#read 5, iclass 40, count 0 2006.229.19:54:38.49#ibcon#about to read 6, iclass 40, count 0 2006.229.19:54:38.49#ibcon#read 6, iclass 40, count 0 2006.229.19:54:38.49#ibcon#end of sib2, iclass 40, count 0 2006.229.19:54:38.49#ibcon#*mode == 0, iclass 40, count 0 2006.229.19:54:38.49#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.19:54:38.49#ibcon#[27=USB\r\n] 2006.229.19:54:38.49#ibcon#*before write, iclass 40, count 0 2006.229.19:54:38.49#ibcon#enter sib2, iclass 40, count 0 2006.229.19:54:38.49#ibcon#flushed, iclass 40, count 0 2006.229.19:54:38.49#ibcon#about to write, iclass 40, count 0 2006.229.19:54:38.49#ibcon#wrote, iclass 40, count 0 2006.229.19:54:38.49#ibcon#about to read 3, iclass 40, count 0 2006.229.19:54:38.52#ibcon#read 3, iclass 40, count 0 2006.229.19:54:38.52#ibcon#about to read 4, iclass 40, count 0 2006.229.19:54:38.52#ibcon#read 4, iclass 40, count 0 2006.229.19:54:38.52#ibcon#about to read 5, iclass 40, count 0 2006.229.19:54:38.52#ibcon#read 5, iclass 40, count 0 2006.229.19:54:38.52#ibcon#about to read 6, iclass 40, count 0 2006.229.19:54:38.52#ibcon#read 6, iclass 40, count 0 2006.229.19:54:38.52#ibcon#end of sib2, iclass 40, count 0 2006.229.19:54:38.52#ibcon#*after write, iclass 40, count 0 2006.229.19:54:38.52#ibcon#*before return 0, iclass 40, count 0 2006.229.19:54:38.52#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:38.52#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.19:54:38.52#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.19:54:38.52#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.19:54:38.52$vck44/vblo=6,719.99 2006.229.19:54:38.52#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.19:54:38.52#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.19:54:38.52#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:38.52#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:54:38.52#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:54:38.52#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:54:38.52#ibcon#enter wrdev, iclass 5, count 0 2006.229.19:54:38.52#ibcon#first serial, iclass 5, count 0 2006.229.19:54:38.52#ibcon#enter sib2, iclass 5, count 0 2006.229.19:54:38.52#ibcon#flushed, iclass 5, count 0 2006.229.19:54:38.52#ibcon#about to write, iclass 5, count 0 2006.229.19:54:38.52#ibcon#wrote, iclass 5, count 0 2006.229.19:54:38.52#ibcon#about to read 3, iclass 5, count 0 2006.229.19:54:38.53#abcon#<5=/06 1.6 3.3 26.021001001.7\r\n> 2006.229.19:54:38.54#ibcon#read 3, iclass 5, count 0 2006.229.19:54:38.54#ibcon#about to read 4, iclass 5, count 0 2006.229.19:54:38.54#ibcon#read 4, iclass 5, count 0 2006.229.19:54:38.54#ibcon#about to read 5, iclass 5, count 0 2006.229.19:54:38.54#ibcon#read 5, iclass 5, count 0 2006.229.19:54:38.54#ibcon#about to read 6, iclass 5, count 0 2006.229.19:54:38.54#ibcon#read 6, iclass 5, count 0 2006.229.19:54:38.54#ibcon#end of sib2, iclass 5, count 0 2006.229.19:54:38.54#ibcon#*mode == 0, iclass 5, count 0 2006.229.19:54:38.54#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.19:54:38.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.19:54:38.54#ibcon#*before write, iclass 5, count 0 2006.229.19:54:38.54#ibcon#enter sib2, iclass 5, count 0 2006.229.19:54:38.54#ibcon#flushed, iclass 5, count 0 2006.229.19:54:38.54#ibcon#about to write, iclass 5, count 0 2006.229.19:54:38.54#ibcon#wrote, iclass 5, count 0 2006.229.19:54:38.54#ibcon#about to read 3, iclass 5, count 0 2006.229.19:54:38.55#abcon#{5=INTERFACE CLEAR} 2006.229.19:54:38.58#ibcon#read 3, iclass 5, count 0 2006.229.19:54:38.58#ibcon#about to read 4, iclass 5, count 0 2006.229.19:54:38.58#ibcon#read 4, iclass 5, count 0 2006.229.19:54:38.58#ibcon#about to read 5, iclass 5, count 0 2006.229.19:54:38.58#ibcon#read 5, iclass 5, count 0 2006.229.19:54:38.58#ibcon#about to read 6, iclass 5, count 0 2006.229.19:54:38.58#ibcon#read 6, iclass 5, count 0 2006.229.19:54:38.58#ibcon#end of sib2, iclass 5, count 0 2006.229.19:54:38.58#ibcon#*after write, iclass 5, count 0 2006.229.19:54:38.58#ibcon#*before return 0, iclass 5, count 0 2006.229.19:54:38.58#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:54:38.58#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.19:54:38.58#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.19:54:38.58#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.19:54:38.58$vck44/vb=6,4 2006.229.19:54:38.58#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.19:54:38.58#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.19:54:38.58#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:38.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:54:38.61#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:54:38.64#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:54:38.64#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:54:38.64#ibcon#enter wrdev, iclass 11, count 2 2006.229.19:54:38.64#ibcon#first serial, iclass 11, count 2 2006.229.19:54:38.64#ibcon#enter sib2, iclass 11, count 2 2006.229.19:54:38.64#ibcon#flushed, iclass 11, count 2 2006.229.19:54:38.64#ibcon#about to write, iclass 11, count 2 2006.229.19:54:38.64#ibcon#wrote, iclass 11, count 2 2006.229.19:54:38.64#ibcon#about to read 3, iclass 11, count 2 2006.229.19:54:38.66#ibcon#read 3, iclass 11, count 2 2006.229.19:54:38.66#ibcon#about to read 4, iclass 11, count 2 2006.229.19:54:38.66#ibcon#read 4, iclass 11, count 2 2006.229.19:54:38.66#ibcon#about to read 5, iclass 11, count 2 2006.229.19:54:38.66#ibcon#read 5, iclass 11, count 2 2006.229.19:54:38.66#ibcon#about to read 6, iclass 11, count 2 2006.229.19:54:38.66#ibcon#read 6, iclass 11, count 2 2006.229.19:54:38.66#ibcon#end of sib2, iclass 11, count 2 2006.229.19:54:38.66#ibcon#*mode == 0, iclass 11, count 2 2006.229.19:54:38.66#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.19:54:38.66#ibcon#[27=AT06-04\r\n] 2006.229.19:54:38.66#ibcon#*before write, iclass 11, count 2 2006.229.19:54:38.66#ibcon#enter sib2, iclass 11, count 2 2006.229.19:54:38.66#ibcon#flushed, iclass 11, count 2 2006.229.19:54:38.66#ibcon#about to write, iclass 11, count 2 2006.229.19:54:38.66#ibcon#wrote, iclass 11, count 2 2006.229.19:54:38.66#ibcon#about to read 3, iclass 11, count 2 2006.229.19:54:38.69#ibcon#read 3, iclass 11, count 2 2006.229.19:54:38.69#ibcon#about to read 4, iclass 11, count 2 2006.229.19:54:38.69#ibcon#read 4, iclass 11, count 2 2006.229.19:54:38.69#ibcon#about to read 5, iclass 11, count 2 2006.229.19:54:38.69#ibcon#read 5, iclass 11, count 2 2006.229.19:54:38.69#ibcon#about to read 6, iclass 11, count 2 2006.229.19:54:38.69#ibcon#read 6, iclass 11, count 2 2006.229.19:54:38.69#ibcon#end of sib2, iclass 11, count 2 2006.229.19:54:38.69#ibcon#*after write, iclass 11, count 2 2006.229.19:54:38.69#ibcon#*before return 0, iclass 11, count 2 2006.229.19:54:38.69#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:54:38.69#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.19:54:38.69#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.19:54:38.69#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:38.69#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:54:38.81#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:54:38.81#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:54:38.81#ibcon#enter wrdev, iclass 11, count 0 2006.229.19:54:38.81#ibcon#first serial, iclass 11, count 0 2006.229.19:54:38.81#ibcon#enter sib2, iclass 11, count 0 2006.229.19:54:38.81#ibcon#flushed, iclass 11, count 0 2006.229.19:54:38.81#ibcon#about to write, iclass 11, count 0 2006.229.19:54:38.81#ibcon#wrote, iclass 11, count 0 2006.229.19:54:38.81#ibcon#about to read 3, iclass 11, count 0 2006.229.19:54:38.83#ibcon#read 3, iclass 11, count 0 2006.229.19:54:38.83#ibcon#about to read 4, iclass 11, count 0 2006.229.19:54:38.83#ibcon#read 4, iclass 11, count 0 2006.229.19:54:38.83#ibcon#about to read 5, iclass 11, count 0 2006.229.19:54:38.83#ibcon#read 5, iclass 11, count 0 2006.229.19:54:38.83#ibcon#about to read 6, iclass 11, count 0 2006.229.19:54:38.83#ibcon#read 6, iclass 11, count 0 2006.229.19:54:38.83#ibcon#end of sib2, iclass 11, count 0 2006.229.19:54:38.83#ibcon#*mode == 0, iclass 11, count 0 2006.229.19:54:38.83#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.19:54:38.83#ibcon#[27=USB\r\n] 2006.229.19:54:38.83#ibcon#*before write, iclass 11, count 0 2006.229.19:54:38.83#ibcon#enter sib2, iclass 11, count 0 2006.229.19:54:38.83#ibcon#flushed, iclass 11, count 0 2006.229.19:54:38.83#ibcon#about to write, iclass 11, count 0 2006.229.19:54:38.83#ibcon#wrote, iclass 11, count 0 2006.229.19:54:38.83#ibcon#about to read 3, iclass 11, count 0 2006.229.19:54:38.86#ibcon#read 3, iclass 11, count 0 2006.229.19:54:38.86#ibcon#about to read 4, iclass 11, count 0 2006.229.19:54:38.86#ibcon#read 4, iclass 11, count 0 2006.229.19:54:38.86#ibcon#about to read 5, iclass 11, count 0 2006.229.19:54:38.86#ibcon#read 5, iclass 11, count 0 2006.229.19:54:38.86#ibcon#about to read 6, iclass 11, count 0 2006.229.19:54:38.86#ibcon#read 6, iclass 11, count 0 2006.229.19:54:38.86#ibcon#end of sib2, iclass 11, count 0 2006.229.19:54:38.86#ibcon#*after write, iclass 11, count 0 2006.229.19:54:38.86#ibcon#*before return 0, iclass 11, count 0 2006.229.19:54:38.86#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:54:38.86#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.19:54:38.86#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.19:54:38.86#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.19:54:38.86$vck44/vblo=7,734.99 2006.229.19:54:38.86#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.19:54:38.86#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.19:54:38.86#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:38.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:38.86#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:38.86#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:38.86#ibcon#enter wrdev, iclass 14, count 0 2006.229.19:54:38.86#ibcon#first serial, iclass 14, count 0 2006.229.19:54:38.86#ibcon#enter sib2, iclass 14, count 0 2006.229.19:54:38.86#ibcon#flushed, iclass 14, count 0 2006.229.19:54:38.86#ibcon#about to write, iclass 14, count 0 2006.229.19:54:38.86#ibcon#wrote, iclass 14, count 0 2006.229.19:54:38.86#ibcon#about to read 3, iclass 14, count 0 2006.229.19:54:38.88#ibcon#read 3, iclass 14, count 0 2006.229.19:54:38.88#ibcon#about to read 4, iclass 14, count 0 2006.229.19:54:38.88#ibcon#read 4, iclass 14, count 0 2006.229.19:54:38.88#ibcon#about to read 5, iclass 14, count 0 2006.229.19:54:38.88#ibcon#read 5, iclass 14, count 0 2006.229.19:54:38.88#ibcon#about to read 6, iclass 14, count 0 2006.229.19:54:38.88#ibcon#read 6, iclass 14, count 0 2006.229.19:54:38.88#ibcon#end of sib2, iclass 14, count 0 2006.229.19:54:38.88#ibcon#*mode == 0, iclass 14, count 0 2006.229.19:54:38.88#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.19:54:38.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.19:54:38.88#ibcon#*before write, iclass 14, count 0 2006.229.19:54:38.88#ibcon#enter sib2, iclass 14, count 0 2006.229.19:54:38.88#ibcon#flushed, iclass 14, count 0 2006.229.19:54:38.88#ibcon#about to write, iclass 14, count 0 2006.229.19:54:38.88#ibcon#wrote, iclass 14, count 0 2006.229.19:54:38.88#ibcon#about to read 3, iclass 14, count 0 2006.229.19:54:38.92#ibcon#read 3, iclass 14, count 0 2006.229.19:54:38.92#ibcon#about to read 4, iclass 14, count 0 2006.229.19:54:38.92#ibcon#read 4, iclass 14, count 0 2006.229.19:54:38.92#ibcon#about to read 5, iclass 14, count 0 2006.229.19:54:38.92#ibcon#read 5, iclass 14, count 0 2006.229.19:54:38.92#ibcon#about to read 6, iclass 14, count 0 2006.229.19:54:38.92#ibcon#read 6, iclass 14, count 0 2006.229.19:54:38.92#ibcon#end of sib2, iclass 14, count 0 2006.229.19:54:38.92#ibcon#*after write, iclass 14, count 0 2006.229.19:54:38.92#ibcon#*before return 0, iclass 14, count 0 2006.229.19:54:38.92#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:38.92#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.19:54:38.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.19:54:38.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.19:54:38.92$vck44/vb=7,4 2006.229.19:54:38.92#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.19:54:38.92#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.19:54:38.92#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:38.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:38.98#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:38.98#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:38.98#ibcon#enter wrdev, iclass 16, count 2 2006.229.19:54:38.98#ibcon#first serial, iclass 16, count 2 2006.229.19:54:38.98#ibcon#enter sib2, iclass 16, count 2 2006.229.19:54:38.98#ibcon#flushed, iclass 16, count 2 2006.229.19:54:38.98#ibcon#about to write, iclass 16, count 2 2006.229.19:54:38.98#ibcon#wrote, iclass 16, count 2 2006.229.19:54:38.98#ibcon#about to read 3, iclass 16, count 2 2006.229.19:54:39.00#ibcon#read 3, iclass 16, count 2 2006.229.19:54:39.00#ibcon#about to read 4, iclass 16, count 2 2006.229.19:54:39.00#ibcon#read 4, iclass 16, count 2 2006.229.19:54:39.00#ibcon#about to read 5, iclass 16, count 2 2006.229.19:54:39.00#ibcon#read 5, iclass 16, count 2 2006.229.19:54:39.00#ibcon#about to read 6, iclass 16, count 2 2006.229.19:54:39.00#ibcon#read 6, iclass 16, count 2 2006.229.19:54:39.00#ibcon#end of sib2, iclass 16, count 2 2006.229.19:54:39.00#ibcon#*mode == 0, iclass 16, count 2 2006.229.19:54:39.00#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.19:54:39.00#ibcon#[27=AT07-04\r\n] 2006.229.19:54:39.00#ibcon#*before write, iclass 16, count 2 2006.229.19:54:39.00#ibcon#enter sib2, iclass 16, count 2 2006.229.19:54:39.00#ibcon#flushed, iclass 16, count 2 2006.229.19:54:39.00#ibcon#about to write, iclass 16, count 2 2006.229.19:54:39.00#ibcon#wrote, iclass 16, count 2 2006.229.19:54:39.00#ibcon#about to read 3, iclass 16, count 2 2006.229.19:54:39.03#ibcon#read 3, iclass 16, count 2 2006.229.19:54:39.03#ibcon#about to read 4, iclass 16, count 2 2006.229.19:54:39.03#ibcon#read 4, iclass 16, count 2 2006.229.19:54:39.03#ibcon#about to read 5, iclass 16, count 2 2006.229.19:54:39.03#ibcon#read 5, iclass 16, count 2 2006.229.19:54:39.03#ibcon#about to read 6, iclass 16, count 2 2006.229.19:54:39.03#ibcon#read 6, iclass 16, count 2 2006.229.19:54:39.03#ibcon#end of sib2, iclass 16, count 2 2006.229.19:54:39.03#ibcon#*after write, iclass 16, count 2 2006.229.19:54:39.03#ibcon#*before return 0, iclass 16, count 2 2006.229.19:54:39.03#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:39.03#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.19:54:39.03#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.19:54:39.03#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:39.03#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:39.15#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:39.15#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:39.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.19:54:39.15#ibcon#first serial, iclass 16, count 0 2006.229.19:54:39.15#ibcon#enter sib2, iclass 16, count 0 2006.229.19:54:39.15#ibcon#flushed, iclass 16, count 0 2006.229.19:54:39.15#ibcon#about to write, iclass 16, count 0 2006.229.19:54:39.15#ibcon#wrote, iclass 16, count 0 2006.229.19:54:39.15#ibcon#about to read 3, iclass 16, count 0 2006.229.19:54:39.17#ibcon#read 3, iclass 16, count 0 2006.229.19:54:39.17#ibcon#about to read 4, iclass 16, count 0 2006.229.19:54:39.17#ibcon#read 4, iclass 16, count 0 2006.229.19:54:39.17#ibcon#about to read 5, iclass 16, count 0 2006.229.19:54:39.17#ibcon#read 5, iclass 16, count 0 2006.229.19:54:39.17#ibcon#about to read 6, iclass 16, count 0 2006.229.19:54:39.17#ibcon#read 6, iclass 16, count 0 2006.229.19:54:39.17#ibcon#end of sib2, iclass 16, count 0 2006.229.19:54:39.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.19:54:39.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.19:54:39.17#ibcon#[27=USB\r\n] 2006.229.19:54:39.17#ibcon#*before write, iclass 16, count 0 2006.229.19:54:39.17#ibcon#enter sib2, iclass 16, count 0 2006.229.19:54:39.17#ibcon#flushed, iclass 16, count 0 2006.229.19:54:39.17#ibcon#about to write, iclass 16, count 0 2006.229.19:54:39.17#ibcon#wrote, iclass 16, count 0 2006.229.19:54:39.17#ibcon#about to read 3, iclass 16, count 0 2006.229.19:54:39.20#ibcon#read 3, iclass 16, count 0 2006.229.19:54:39.20#ibcon#about to read 4, iclass 16, count 0 2006.229.19:54:39.20#ibcon#read 4, iclass 16, count 0 2006.229.19:54:39.20#ibcon#about to read 5, iclass 16, count 0 2006.229.19:54:39.20#ibcon#read 5, iclass 16, count 0 2006.229.19:54:39.20#ibcon#about to read 6, iclass 16, count 0 2006.229.19:54:39.20#ibcon#read 6, iclass 16, count 0 2006.229.19:54:39.20#ibcon#end of sib2, iclass 16, count 0 2006.229.19:54:39.20#ibcon#*after write, iclass 16, count 0 2006.229.19:54:39.20#ibcon#*before return 0, iclass 16, count 0 2006.229.19:54:39.20#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:39.20#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.19:54:39.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.19:54:39.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.19:54:39.20$vck44/vblo=8,744.99 2006.229.19:54:39.20#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.19:54:39.20#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.19:54:39.20#ibcon#ireg 17 cls_cnt 0 2006.229.19:54:39.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:39.20#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:39.20#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:39.20#ibcon#enter wrdev, iclass 18, count 0 2006.229.19:54:39.20#ibcon#first serial, iclass 18, count 0 2006.229.19:54:39.20#ibcon#enter sib2, iclass 18, count 0 2006.229.19:54:39.20#ibcon#flushed, iclass 18, count 0 2006.229.19:54:39.20#ibcon#about to write, iclass 18, count 0 2006.229.19:54:39.20#ibcon#wrote, iclass 18, count 0 2006.229.19:54:39.20#ibcon#about to read 3, iclass 18, count 0 2006.229.19:54:39.22#ibcon#read 3, iclass 18, count 0 2006.229.19:54:39.22#ibcon#about to read 4, iclass 18, count 0 2006.229.19:54:39.22#ibcon#read 4, iclass 18, count 0 2006.229.19:54:39.22#ibcon#about to read 5, iclass 18, count 0 2006.229.19:54:39.22#ibcon#read 5, iclass 18, count 0 2006.229.19:54:39.22#ibcon#about to read 6, iclass 18, count 0 2006.229.19:54:39.22#ibcon#read 6, iclass 18, count 0 2006.229.19:54:39.22#ibcon#end of sib2, iclass 18, count 0 2006.229.19:54:39.22#ibcon#*mode == 0, iclass 18, count 0 2006.229.19:54:39.22#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.19:54:39.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.19:54:39.22#ibcon#*before write, iclass 18, count 0 2006.229.19:54:39.22#ibcon#enter sib2, iclass 18, count 0 2006.229.19:54:39.22#ibcon#flushed, iclass 18, count 0 2006.229.19:54:39.22#ibcon#about to write, iclass 18, count 0 2006.229.19:54:39.22#ibcon#wrote, iclass 18, count 0 2006.229.19:54:39.22#ibcon#about to read 3, iclass 18, count 0 2006.229.19:54:39.26#ibcon#read 3, iclass 18, count 0 2006.229.19:54:39.26#ibcon#about to read 4, iclass 18, count 0 2006.229.19:54:39.26#ibcon#read 4, iclass 18, count 0 2006.229.19:54:39.26#ibcon#about to read 5, iclass 18, count 0 2006.229.19:54:39.26#ibcon#read 5, iclass 18, count 0 2006.229.19:54:39.26#ibcon#about to read 6, iclass 18, count 0 2006.229.19:54:39.26#ibcon#read 6, iclass 18, count 0 2006.229.19:54:39.26#ibcon#end of sib2, iclass 18, count 0 2006.229.19:54:39.26#ibcon#*after write, iclass 18, count 0 2006.229.19:54:39.26#ibcon#*before return 0, iclass 18, count 0 2006.229.19:54:39.26#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:39.26#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.19:54:39.26#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.19:54:39.26#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.19:54:39.26$vck44/vb=8,4 2006.229.19:54:39.26#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.19:54:39.26#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.19:54:39.26#ibcon#ireg 11 cls_cnt 2 2006.229.19:54:39.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:39.32#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:39.32#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:39.32#ibcon#enter wrdev, iclass 20, count 2 2006.229.19:54:39.32#ibcon#first serial, iclass 20, count 2 2006.229.19:54:39.32#ibcon#enter sib2, iclass 20, count 2 2006.229.19:54:39.32#ibcon#flushed, iclass 20, count 2 2006.229.19:54:39.32#ibcon#about to write, iclass 20, count 2 2006.229.19:54:39.32#ibcon#wrote, iclass 20, count 2 2006.229.19:54:39.32#ibcon#about to read 3, iclass 20, count 2 2006.229.19:54:39.34#ibcon#read 3, iclass 20, count 2 2006.229.19:54:39.34#ibcon#about to read 4, iclass 20, count 2 2006.229.19:54:39.34#ibcon#read 4, iclass 20, count 2 2006.229.19:54:39.34#ibcon#about to read 5, iclass 20, count 2 2006.229.19:54:39.34#ibcon#read 5, iclass 20, count 2 2006.229.19:54:39.34#ibcon#about to read 6, iclass 20, count 2 2006.229.19:54:39.34#ibcon#read 6, iclass 20, count 2 2006.229.19:54:39.34#ibcon#end of sib2, iclass 20, count 2 2006.229.19:54:39.34#ibcon#*mode == 0, iclass 20, count 2 2006.229.19:54:39.34#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.19:54:39.34#ibcon#[27=AT08-04\r\n] 2006.229.19:54:39.34#ibcon#*before write, iclass 20, count 2 2006.229.19:54:39.34#ibcon#enter sib2, iclass 20, count 2 2006.229.19:54:39.34#ibcon#flushed, iclass 20, count 2 2006.229.19:54:39.34#ibcon#about to write, iclass 20, count 2 2006.229.19:54:39.34#ibcon#wrote, iclass 20, count 2 2006.229.19:54:39.34#ibcon#about to read 3, iclass 20, count 2 2006.229.19:54:39.37#ibcon#read 3, iclass 20, count 2 2006.229.19:54:39.37#ibcon#about to read 4, iclass 20, count 2 2006.229.19:54:39.37#ibcon#read 4, iclass 20, count 2 2006.229.19:54:39.37#ibcon#about to read 5, iclass 20, count 2 2006.229.19:54:39.37#ibcon#read 5, iclass 20, count 2 2006.229.19:54:39.37#ibcon#about to read 6, iclass 20, count 2 2006.229.19:54:39.37#ibcon#read 6, iclass 20, count 2 2006.229.19:54:39.37#ibcon#end of sib2, iclass 20, count 2 2006.229.19:54:39.37#ibcon#*after write, iclass 20, count 2 2006.229.19:54:39.37#ibcon#*before return 0, iclass 20, count 2 2006.229.19:54:39.37#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:39.37#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.19:54:39.37#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.19:54:39.37#ibcon#ireg 7 cls_cnt 0 2006.229.19:54:39.37#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:39.49#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:39.49#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:39.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.19:54:39.49#ibcon#first serial, iclass 20, count 0 2006.229.19:54:39.49#ibcon#enter sib2, iclass 20, count 0 2006.229.19:54:39.49#ibcon#flushed, iclass 20, count 0 2006.229.19:54:39.49#ibcon#about to write, iclass 20, count 0 2006.229.19:54:39.49#ibcon#wrote, iclass 20, count 0 2006.229.19:54:39.49#ibcon#about to read 3, iclass 20, count 0 2006.229.19:54:39.51#ibcon#read 3, iclass 20, count 0 2006.229.19:54:39.51#ibcon#about to read 4, iclass 20, count 0 2006.229.19:54:39.51#ibcon#read 4, iclass 20, count 0 2006.229.19:54:39.51#ibcon#about to read 5, iclass 20, count 0 2006.229.19:54:39.51#ibcon#read 5, iclass 20, count 0 2006.229.19:54:39.51#ibcon#about to read 6, iclass 20, count 0 2006.229.19:54:39.51#ibcon#read 6, iclass 20, count 0 2006.229.19:54:39.51#ibcon#end of sib2, iclass 20, count 0 2006.229.19:54:39.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.19:54:39.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.19:54:39.51#ibcon#[27=USB\r\n] 2006.229.19:54:39.51#ibcon#*before write, iclass 20, count 0 2006.229.19:54:39.51#ibcon#enter sib2, iclass 20, count 0 2006.229.19:54:39.51#ibcon#flushed, iclass 20, count 0 2006.229.19:54:39.51#ibcon#about to write, iclass 20, count 0 2006.229.19:54:39.51#ibcon#wrote, iclass 20, count 0 2006.229.19:54:39.51#ibcon#about to read 3, iclass 20, count 0 2006.229.19:54:39.54#ibcon#read 3, iclass 20, count 0 2006.229.19:54:39.54#ibcon#about to read 4, iclass 20, count 0 2006.229.19:54:39.54#ibcon#read 4, iclass 20, count 0 2006.229.19:54:39.54#ibcon#about to read 5, iclass 20, count 0 2006.229.19:54:39.54#ibcon#read 5, iclass 20, count 0 2006.229.19:54:39.54#ibcon#about to read 6, iclass 20, count 0 2006.229.19:54:39.54#ibcon#read 6, iclass 20, count 0 2006.229.19:54:39.54#ibcon#end of sib2, iclass 20, count 0 2006.229.19:54:39.54#ibcon#*after write, iclass 20, count 0 2006.229.19:54:39.54#ibcon#*before return 0, iclass 20, count 0 2006.229.19:54:39.54#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:39.54#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.19:54:39.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.19:54:39.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.19:54:39.54$vck44/vabw=wide 2006.229.19:54:39.54#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.19:54:39.54#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.19:54:39.54#ibcon#ireg 8 cls_cnt 0 2006.229.19:54:39.54#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:39.54#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:39.54#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:39.54#ibcon#enter wrdev, iclass 22, count 0 2006.229.19:54:39.54#ibcon#first serial, iclass 22, count 0 2006.229.19:54:39.54#ibcon#enter sib2, iclass 22, count 0 2006.229.19:54:39.54#ibcon#flushed, iclass 22, count 0 2006.229.19:54:39.54#ibcon#about to write, iclass 22, count 0 2006.229.19:54:39.54#ibcon#wrote, iclass 22, count 0 2006.229.19:54:39.54#ibcon#about to read 3, iclass 22, count 0 2006.229.19:54:39.56#ibcon#read 3, iclass 22, count 0 2006.229.19:54:39.56#ibcon#about to read 4, iclass 22, count 0 2006.229.19:54:39.56#ibcon#read 4, iclass 22, count 0 2006.229.19:54:39.56#ibcon#about to read 5, iclass 22, count 0 2006.229.19:54:39.56#ibcon#read 5, iclass 22, count 0 2006.229.19:54:39.56#ibcon#about to read 6, iclass 22, count 0 2006.229.19:54:39.56#ibcon#read 6, iclass 22, count 0 2006.229.19:54:39.56#ibcon#end of sib2, iclass 22, count 0 2006.229.19:54:39.56#ibcon#*mode == 0, iclass 22, count 0 2006.229.19:54:39.56#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.19:54:39.56#ibcon#[25=BW32\r\n] 2006.229.19:54:39.56#ibcon#*before write, iclass 22, count 0 2006.229.19:54:39.56#ibcon#enter sib2, iclass 22, count 0 2006.229.19:54:39.56#ibcon#flushed, iclass 22, count 0 2006.229.19:54:39.56#ibcon#about to write, iclass 22, count 0 2006.229.19:54:39.56#ibcon#wrote, iclass 22, count 0 2006.229.19:54:39.56#ibcon#about to read 3, iclass 22, count 0 2006.229.19:54:39.59#ibcon#read 3, iclass 22, count 0 2006.229.19:54:39.59#ibcon#about to read 4, iclass 22, count 0 2006.229.19:54:39.59#ibcon#read 4, iclass 22, count 0 2006.229.19:54:39.59#ibcon#about to read 5, iclass 22, count 0 2006.229.19:54:39.59#ibcon#read 5, iclass 22, count 0 2006.229.19:54:39.59#ibcon#about to read 6, iclass 22, count 0 2006.229.19:54:39.59#ibcon#read 6, iclass 22, count 0 2006.229.19:54:39.59#ibcon#end of sib2, iclass 22, count 0 2006.229.19:54:39.59#ibcon#*after write, iclass 22, count 0 2006.229.19:54:39.59#ibcon#*before return 0, iclass 22, count 0 2006.229.19:54:39.59#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:39.59#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.19:54:39.59#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.19:54:39.59#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.19:54:39.59$vck44/vbbw=wide 2006.229.19:54:39.59#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.19:54:39.59#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.19:54:39.59#ibcon#ireg 8 cls_cnt 0 2006.229.19:54:39.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:54:39.66#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:54:39.66#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:54:39.66#ibcon#enter wrdev, iclass 24, count 0 2006.229.19:54:39.66#ibcon#first serial, iclass 24, count 0 2006.229.19:54:39.66#ibcon#enter sib2, iclass 24, count 0 2006.229.19:54:39.66#ibcon#flushed, iclass 24, count 0 2006.229.19:54:39.66#ibcon#about to write, iclass 24, count 0 2006.229.19:54:39.66#ibcon#wrote, iclass 24, count 0 2006.229.19:54:39.66#ibcon#about to read 3, iclass 24, count 0 2006.229.19:54:39.68#ibcon#read 3, iclass 24, count 0 2006.229.19:54:39.68#ibcon#about to read 4, iclass 24, count 0 2006.229.19:54:39.68#ibcon#read 4, iclass 24, count 0 2006.229.19:54:39.68#ibcon#about to read 5, iclass 24, count 0 2006.229.19:54:39.68#ibcon#read 5, iclass 24, count 0 2006.229.19:54:39.68#ibcon#about to read 6, iclass 24, count 0 2006.229.19:54:39.68#ibcon#read 6, iclass 24, count 0 2006.229.19:54:39.68#ibcon#end of sib2, iclass 24, count 0 2006.229.19:54:39.68#ibcon#*mode == 0, iclass 24, count 0 2006.229.19:54:39.68#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.19:54:39.68#ibcon#[27=BW32\r\n] 2006.229.19:54:39.68#ibcon#*before write, iclass 24, count 0 2006.229.19:54:39.68#ibcon#enter sib2, iclass 24, count 0 2006.229.19:54:39.68#ibcon#flushed, iclass 24, count 0 2006.229.19:54:39.68#ibcon#about to write, iclass 24, count 0 2006.229.19:54:39.68#ibcon#wrote, iclass 24, count 0 2006.229.19:54:39.68#ibcon#about to read 3, iclass 24, count 0 2006.229.19:54:39.71#ibcon#read 3, iclass 24, count 0 2006.229.19:54:39.71#ibcon#about to read 4, iclass 24, count 0 2006.229.19:54:39.71#ibcon#read 4, iclass 24, count 0 2006.229.19:54:39.71#ibcon#about to read 5, iclass 24, count 0 2006.229.19:54:39.71#ibcon#read 5, iclass 24, count 0 2006.229.19:54:39.71#ibcon#about to read 6, iclass 24, count 0 2006.229.19:54:39.71#ibcon#read 6, iclass 24, count 0 2006.229.19:54:39.71#ibcon#end of sib2, iclass 24, count 0 2006.229.19:54:39.71#ibcon#*after write, iclass 24, count 0 2006.229.19:54:39.71#ibcon#*before return 0, iclass 24, count 0 2006.229.19:54:39.71#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:54:39.71#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.19:54:39.71#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.19:54:39.71#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.19:54:39.71$setupk4/ifdk4 2006.229.19:54:39.71$ifdk4/lo= 2006.229.19:54:39.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.19:54:39.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.19:54:39.71$ifdk4/patch= 2006.229.19:54:39.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.19:54:39.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.19:54:39.71$setupk4/!*+20s 2006.229.19:54:48.70#abcon#<5=/06 1.6 3.3 26.021001001.7\r\n> 2006.229.19:54:48.72#abcon#{5=INTERFACE CLEAR} 2006.229.19:54:48.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.19:54:54.21$setupk4/"tpicd 2006.229.19:54:54.21$setupk4/echo=off 2006.229.19:54:54.21$setupk4/xlog=off 2006.229.19:54:54.21:!2006.229.20:00:36 2006.229.19:54:57.14#trakl#Source acquired 2006.229.19:54:57.14#flagr#flagr/antenna,acquired 2006.229.20:00:36.00:preob 2006.229.20:00:37.14/onsource/TRACKING 2006.229.20:00:37.14:!2006.229.20:00:46 2006.229.20:00:46.00:"tape 2006.229.20:00:46.00:"st=record 2006.229.20:00:46.00:data_valid=on 2006.229.20:00:46.00:midob 2006.229.20:00:46.14/onsource/TRACKING 2006.229.20:00:46.14/wx/26.06,1001.7,100 2006.229.20:00:46.26/cable/+6.4174E-03 2006.229.20:00:47.35/va/01,08,usb,yes,34,37 2006.229.20:00:47.35/va/02,07,usb,yes,37,38 2006.229.20:00:47.35/va/03,06,usb,yes,46,49 2006.229.20:00:47.35/va/04,07,usb,yes,38,40 2006.229.20:00:47.35/va/05,04,usb,yes,34,35 2006.229.20:00:47.35/va/06,04,usb,yes,38,38 2006.229.20:00:47.35/va/07,05,usb,yes,34,35 2006.229.20:00:47.35/va/08,06,usb,yes,25,31 2006.229.20:00:47.58/valo/01,524.99,yes,locked 2006.229.20:00:47.58/valo/02,534.99,yes,locked 2006.229.20:00:47.58/valo/03,564.99,yes,locked 2006.229.20:00:47.58/valo/04,624.99,yes,locked 2006.229.20:00:47.58/valo/05,734.99,yes,locked 2006.229.20:00:47.58/valo/06,814.99,yes,locked 2006.229.20:00:47.58/valo/07,864.99,yes,locked 2006.229.20:00:47.58/valo/08,884.99,yes,locked 2006.229.20:00:48.67/vb/01,04,usb,yes,34,31 2006.229.20:00:48.67/vb/02,04,usb,yes,36,36 2006.229.20:00:48.67/vb/03,04,usb,yes,33,36 2006.229.20:00:48.67/vb/04,04,usb,yes,37,36 2006.229.20:00:48.67/vb/05,04,usb,yes,29,32 2006.229.20:00:48.67/vb/06,04,usb,yes,34,30 2006.229.20:00:48.67/vb/07,04,usb,yes,34,34 2006.229.20:00:48.67/vb/08,04,usb,yes,31,35 2006.229.20:00:48.91/vblo/01,629.99,yes,locked 2006.229.20:00:48.91/vblo/02,634.99,yes,locked 2006.229.20:00:48.91/vblo/03,649.99,yes,locked 2006.229.20:00:48.91/vblo/04,679.99,yes,locked 2006.229.20:00:48.91/vblo/05,709.99,yes,locked 2006.229.20:00:48.91/vblo/06,719.99,yes,locked 2006.229.20:00:48.91/vblo/07,734.99,yes,locked 2006.229.20:00:48.91/vblo/08,744.99,yes,locked 2006.229.20:00:49.06/vabw/8 2006.229.20:00:49.21/vbbw/8 2006.229.20:00:49.30/xfe/off,on,12.2 2006.229.20:00:49.68/ifatt/23,28,28,28 2006.229.20:00:50.08/fmout-gps/S +4.50E-07 2006.229.20:00:50.12:!2006.229.20:01:26 2006.229.20:01:26.00:data_valid=off 2006.229.20:01:26.00:"et 2006.229.20:01:26.00:!+3s 2006.229.20:01:29.01:"tape 2006.229.20:01:29.01:postob 2006.229.20:01:29.15/cable/+6.4200E-03 2006.229.20:01:29.15/wx/26.06,1001.7,100 2006.229.20:01:30.08/fmout-gps/S +4.50E-07 2006.229.20:01:30.08:scan_name=229-2008,jd0608,40 2006.229.20:01:30.08:source=3c446,222547.26,-045701.4,2000.0,cw 2006.229.20:01:31.14#flagr#flagr/antenna,new-source 2006.229.20:01:31.14:checkk5 2006.229.20:01:31.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:01:31.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:01:32.31/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:01:32.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:01:33.11/chk_obsdata//k5ts1/T2292000??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.20:01:33.53/chk_obsdata//k5ts2/T2292000??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.20:01:33.92/chk_obsdata//k5ts3/T2292000??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.20:01:34.32/chk_obsdata//k5ts4/T2292000??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.20:01:35.03/k5log//k5ts1_log_newline 2006.229.20:01:35.72/k5log//k5ts2_log_newline 2006.229.20:01:36.43/k5log//k5ts3_log_newline 2006.229.20:01:37.13/k5log//k5ts4_log_newline 2006.229.20:01:37.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:01:37.16:setupk4=1 2006.229.20:01:37.16$setupk4/echo=on 2006.229.20:01:37.16$setupk4/pcalon 2006.229.20:01:37.16$pcalon/"no phase cal control is implemented here 2006.229.20:01:37.16$setupk4/"tpicd=stop 2006.229.20:01:37.16$setupk4/"rec=synch_on 2006.229.20:01:37.16$setupk4/"rec_mode=128 2006.229.20:01:37.16$setupk4/!* 2006.229.20:01:37.16$setupk4/recpk4 2006.229.20:01:37.16$recpk4/recpatch= 2006.229.20:01:37.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:01:37.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:01:37.17$setupk4/vck44 2006.229.20:01:37.17$vck44/valo=1,524.99 2006.229.20:01:37.17#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.20:01:37.17#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.20:01:37.17#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:37.17#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:37.17#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:37.17#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:37.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:01:37.17#ibcon#first serial, iclass 13, count 0 2006.229.20:01:37.17#ibcon#enter sib2, iclass 13, count 0 2006.229.20:01:37.17#ibcon#flushed, iclass 13, count 0 2006.229.20:01:37.17#ibcon#about to write, iclass 13, count 0 2006.229.20:01:37.17#ibcon#wrote, iclass 13, count 0 2006.229.20:01:37.17#ibcon#about to read 3, iclass 13, count 0 2006.229.20:01:37.19#ibcon#read 3, iclass 13, count 0 2006.229.20:01:37.19#ibcon#about to read 4, iclass 13, count 0 2006.229.20:01:37.19#ibcon#read 4, iclass 13, count 0 2006.229.20:01:37.19#ibcon#about to read 5, iclass 13, count 0 2006.229.20:01:37.19#ibcon#read 5, iclass 13, count 0 2006.229.20:01:37.19#ibcon#about to read 6, iclass 13, count 0 2006.229.20:01:37.19#ibcon#read 6, iclass 13, count 0 2006.229.20:01:37.19#ibcon#end of sib2, iclass 13, count 0 2006.229.20:01:37.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:01:37.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:01:37.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:01:37.19#ibcon#*before write, iclass 13, count 0 2006.229.20:01:37.19#ibcon#enter sib2, iclass 13, count 0 2006.229.20:01:37.19#ibcon#flushed, iclass 13, count 0 2006.229.20:01:37.19#ibcon#about to write, iclass 13, count 0 2006.229.20:01:37.19#ibcon#wrote, iclass 13, count 0 2006.229.20:01:37.19#ibcon#about to read 3, iclass 13, count 0 2006.229.20:01:37.24#ibcon#read 3, iclass 13, count 0 2006.229.20:01:37.24#ibcon#about to read 4, iclass 13, count 0 2006.229.20:01:37.24#ibcon#read 4, iclass 13, count 0 2006.229.20:01:37.24#ibcon#about to read 5, iclass 13, count 0 2006.229.20:01:37.24#ibcon#read 5, iclass 13, count 0 2006.229.20:01:37.24#ibcon#about to read 6, iclass 13, count 0 2006.229.20:01:37.24#ibcon#read 6, iclass 13, count 0 2006.229.20:01:37.24#ibcon#end of sib2, iclass 13, count 0 2006.229.20:01:37.24#ibcon#*after write, iclass 13, count 0 2006.229.20:01:37.24#ibcon#*before return 0, iclass 13, count 0 2006.229.20:01:37.24#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:37.24#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:37.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:01:37.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:01:37.24$vck44/va=1,8 2006.229.20:01:37.24#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.20:01:37.24#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.20:01:37.24#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:37.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:37.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:37.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:37.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.20:01:37.24#ibcon#first serial, iclass 15, count 2 2006.229.20:01:37.24#ibcon#enter sib2, iclass 15, count 2 2006.229.20:01:37.24#ibcon#flushed, iclass 15, count 2 2006.229.20:01:37.24#ibcon#about to write, iclass 15, count 2 2006.229.20:01:37.24#ibcon#wrote, iclass 15, count 2 2006.229.20:01:37.24#ibcon#about to read 3, iclass 15, count 2 2006.229.20:01:37.26#ibcon#read 3, iclass 15, count 2 2006.229.20:01:37.26#ibcon#about to read 4, iclass 15, count 2 2006.229.20:01:37.26#ibcon#read 4, iclass 15, count 2 2006.229.20:01:37.26#ibcon#about to read 5, iclass 15, count 2 2006.229.20:01:37.26#ibcon#read 5, iclass 15, count 2 2006.229.20:01:37.26#ibcon#about to read 6, iclass 15, count 2 2006.229.20:01:37.26#ibcon#read 6, iclass 15, count 2 2006.229.20:01:37.26#ibcon#end of sib2, iclass 15, count 2 2006.229.20:01:37.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.20:01:37.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.20:01:37.26#ibcon#[25=AT01-08\r\n] 2006.229.20:01:37.26#ibcon#*before write, iclass 15, count 2 2006.229.20:01:37.26#ibcon#enter sib2, iclass 15, count 2 2006.229.20:01:37.26#ibcon#flushed, iclass 15, count 2 2006.229.20:01:37.26#ibcon#about to write, iclass 15, count 2 2006.229.20:01:37.26#ibcon#wrote, iclass 15, count 2 2006.229.20:01:37.26#ibcon#about to read 3, iclass 15, count 2 2006.229.20:01:37.29#ibcon#read 3, iclass 15, count 2 2006.229.20:01:37.29#ibcon#about to read 4, iclass 15, count 2 2006.229.20:01:37.29#ibcon#read 4, iclass 15, count 2 2006.229.20:01:37.29#ibcon#about to read 5, iclass 15, count 2 2006.229.20:01:37.29#ibcon#read 5, iclass 15, count 2 2006.229.20:01:37.29#ibcon#about to read 6, iclass 15, count 2 2006.229.20:01:37.29#ibcon#read 6, iclass 15, count 2 2006.229.20:01:37.29#ibcon#end of sib2, iclass 15, count 2 2006.229.20:01:37.29#ibcon#*after write, iclass 15, count 2 2006.229.20:01:37.29#ibcon#*before return 0, iclass 15, count 2 2006.229.20:01:37.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:37.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:37.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.20:01:37.29#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:37.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:37.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:37.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:37.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:01:37.41#ibcon#first serial, iclass 15, count 0 2006.229.20:01:37.41#ibcon#enter sib2, iclass 15, count 0 2006.229.20:01:37.41#ibcon#flushed, iclass 15, count 0 2006.229.20:01:37.41#ibcon#about to write, iclass 15, count 0 2006.229.20:01:37.41#ibcon#wrote, iclass 15, count 0 2006.229.20:01:37.41#ibcon#about to read 3, iclass 15, count 0 2006.229.20:01:37.43#ibcon#read 3, iclass 15, count 0 2006.229.20:01:37.43#ibcon#about to read 4, iclass 15, count 0 2006.229.20:01:37.43#ibcon#read 4, iclass 15, count 0 2006.229.20:01:37.43#ibcon#about to read 5, iclass 15, count 0 2006.229.20:01:37.43#ibcon#read 5, iclass 15, count 0 2006.229.20:01:37.43#ibcon#about to read 6, iclass 15, count 0 2006.229.20:01:37.43#ibcon#read 6, iclass 15, count 0 2006.229.20:01:37.43#ibcon#end of sib2, iclass 15, count 0 2006.229.20:01:37.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:01:37.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:01:37.43#ibcon#[25=USB\r\n] 2006.229.20:01:37.43#ibcon#*before write, iclass 15, count 0 2006.229.20:01:37.43#ibcon#enter sib2, iclass 15, count 0 2006.229.20:01:37.43#ibcon#flushed, iclass 15, count 0 2006.229.20:01:37.43#ibcon#about to write, iclass 15, count 0 2006.229.20:01:37.43#ibcon#wrote, iclass 15, count 0 2006.229.20:01:37.43#ibcon#about to read 3, iclass 15, count 0 2006.229.20:01:37.46#ibcon#read 3, iclass 15, count 0 2006.229.20:01:37.46#ibcon#about to read 4, iclass 15, count 0 2006.229.20:01:37.46#ibcon#read 4, iclass 15, count 0 2006.229.20:01:37.46#ibcon#about to read 5, iclass 15, count 0 2006.229.20:01:37.46#ibcon#read 5, iclass 15, count 0 2006.229.20:01:37.46#ibcon#about to read 6, iclass 15, count 0 2006.229.20:01:37.46#ibcon#read 6, iclass 15, count 0 2006.229.20:01:37.46#ibcon#end of sib2, iclass 15, count 0 2006.229.20:01:37.46#ibcon#*after write, iclass 15, count 0 2006.229.20:01:37.46#ibcon#*before return 0, iclass 15, count 0 2006.229.20:01:37.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:37.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:37.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:01:37.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:01:37.46$vck44/valo=2,534.99 2006.229.20:01:37.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:01:37.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:01:37.46#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:37.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:37.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:37.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:37.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:01:37.46#ibcon#first serial, iclass 17, count 0 2006.229.20:01:37.46#ibcon#enter sib2, iclass 17, count 0 2006.229.20:01:37.46#ibcon#flushed, iclass 17, count 0 2006.229.20:01:37.46#ibcon#about to write, iclass 17, count 0 2006.229.20:01:37.46#ibcon#wrote, iclass 17, count 0 2006.229.20:01:37.46#ibcon#about to read 3, iclass 17, count 0 2006.229.20:01:37.48#ibcon#read 3, iclass 17, count 0 2006.229.20:01:37.48#ibcon#about to read 4, iclass 17, count 0 2006.229.20:01:37.48#ibcon#read 4, iclass 17, count 0 2006.229.20:01:37.48#ibcon#about to read 5, iclass 17, count 0 2006.229.20:01:37.48#ibcon#read 5, iclass 17, count 0 2006.229.20:01:37.48#ibcon#about to read 6, iclass 17, count 0 2006.229.20:01:37.48#ibcon#read 6, iclass 17, count 0 2006.229.20:01:37.48#ibcon#end of sib2, iclass 17, count 0 2006.229.20:01:37.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:01:37.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:01:37.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:01:37.48#ibcon#*before write, iclass 17, count 0 2006.229.20:01:37.48#ibcon#enter sib2, iclass 17, count 0 2006.229.20:01:37.48#ibcon#flushed, iclass 17, count 0 2006.229.20:01:37.48#ibcon#about to write, iclass 17, count 0 2006.229.20:01:37.48#ibcon#wrote, iclass 17, count 0 2006.229.20:01:37.48#ibcon#about to read 3, iclass 17, count 0 2006.229.20:01:37.52#ibcon#read 3, iclass 17, count 0 2006.229.20:01:37.52#ibcon#about to read 4, iclass 17, count 0 2006.229.20:01:37.52#ibcon#read 4, iclass 17, count 0 2006.229.20:01:37.52#ibcon#about to read 5, iclass 17, count 0 2006.229.20:01:37.52#ibcon#read 5, iclass 17, count 0 2006.229.20:01:37.52#ibcon#about to read 6, iclass 17, count 0 2006.229.20:01:37.52#ibcon#read 6, iclass 17, count 0 2006.229.20:01:37.52#ibcon#end of sib2, iclass 17, count 0 2006.229.20:01:37.52#ibcon#*after write, iclass 17, count 0 2006.229.20:01:37.52#ibcon#*before return 0, iclass 17, count 0 2006.229.20:01:37.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:37.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:37.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:01:37.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:01:37.52$vck44/va=2,7 2006.229.20:01:37.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.20:01:37.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.20:01:37.52#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:37.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:37.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:37.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:37.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.20:01:37.58#ibcon#first serial, iclass 19, count 2 2006.229.20:01:37.58#ibcon#enter sib2, iclass 19, count 2 2006.229.20:01:37.58#ibcon#flushed, iclass 19, count 2 2006.229.20:01:37.58#ibcon#about to write, iclass 19, count 2 2006.229.20:01:37.58#ibcon#wrote, iclass 19, count 2 2006.229.20:01:37.58#ibcon#about to read 3, iclass 19, count 2 2006.229.20:01:37.60#ibcon#read 3, iclass 19, count 2 2006.229.20:01:37.60#ibcon#about to read 4, iclass 19, count 2 2006.229.20:01:37.60#ibcon#read 4, iclass 19, count 2 2006.229.20:01:37.60#ibcon#about to read 5, iclass 19, count 2 2006.229.20:01:37.60#ibcon#read 5, iclass 19, count 2 2006.229.20:01:37.60#ibcon#about to read 6, iclass 19, count 2 2006.229.20:01:37.60#ibcon#read 6, iclass 19, count 2 2006.229.20:01:37.60#ibcon#end of sib2, iclass 19, count 2 2006.229.20:01:37.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.20:01:37.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.20:01:37.60#ibcon#[25=AT02-07\r\n] 2006.229.20:01:37.60#ibcon#*before write, iclass 19, count 2 2006.229.20:01:37.60#ibcon#enter sib2, iclass 19, count 2 2006.229.20:01:37.60#ibcon#flushed, iclass 19, count 2 2006.229.20:01:37.60#ibcon#about to write, iclass 19, count 2 2006.229.20:01:37.60#ibcon#wrote, iclass 19, count 2 2006.229.20:01:37.60#ibcon#about to read 3, iclass 19, count 2 2006.229.20:01:37.63#ibcon#read 3, iclass 19, count 2 2006.229.20:01:37.63#ibcon#about to read 4, iclass 19, count 2 2006.229.20:01:37.63#ibcon#read 4, iclass 19, count 2 2006.229.20:01:37.63#ibcon#about to read 5, iclass 19, count 2 2006.229.20:01:37.63#ibcon#read 5, iclass 19, count 2 2006.229.20:01:37.63#ibcon#about to read 6, iclass 19, count 2 2006.229.20:01:37.63#ibcon#read 6, iclass 19, count 2 2006.229.20:01:37.63#ibcon#end of sib2, iclass 19, count 2 2006.229.20:01:37.63#ibcon#*after write, iclass 19, count 2 2006.229.20:01:37.63#ibcon#*before return 0, iclass 19, count 2 2006.229.20:01:37.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:37.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:37.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.20:01:37.63#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:37.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:37.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:37.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:37.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:01:37.75#ibcon#first serial, iclass 19, count 0 2006.229.20:01:37.75#ibcon#enter sib2, iclass 19, count 0 2006.229.20:01:37.75#ibcon#flushed, iclass 19, count 0 2006.229.20:01:37.75#ibcon#about to write, iclass 19, count 0 2006.229.20:01:37.75#ibcon#wrote, iclass 19, count 0 2006.229.20:01:37.75#ibcon#about to read 3, iclass 19, count 0 2006.229.20:01:37.77#ibcon#read 3, iclass 19, count 0 2006.229.20:01:37.77#ibcon#about to read 4, iclass 19, count 0 2006.229.20:01:37.77#ibcon#read 4, iclass 19, count 0 2006.229.20:01:37.77#ibcon#about to read 5, iclass 19, count 0 2006.229.20:01:37.77#ibcon#read 5, iclass 19, count 0 2006.229.20:01:37.77#ibcon#about to read 6, iclass 19, count 0 2006.229.20:01:37.77#ibcon#read 6, iclass 19, count 0 2006.229.20:01:37.77#ibcon#end of sib2, iclass 19, count 0 2006.229.20:01:37.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:01:37.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:01:37.77#ibcon#[25=USB\r\n] 2006.229.20:01:37.77#ibcon#*before write, iclass 19, count 0 2006.229.20:01:37.77#ibcon#enter sib2, iclass 19, count 0 2006.229.20:01:37.77#ibcon#flushed, iclass 19, count 0 2006.229.20:01:37.77#ibcon#about to write, iclass 19, count 0 2006.229.20:01:37.77#ibcon#wrote, iclass 19, count 0 2006.229.20:01:37.77#ibcon#about to read 3, iclass 19, count 0 2006.229.20:01:37.80#ibcon#read 3, iclass 19, count 0 2006.229.20:01:37.80#ibcon#about to read 4, iclass 19, count 0 2006.229.20:01:37.80#ibcon#read 4, iclass 19, count 0 2006.229.20:01:37.80#ibcon#about to read 5, iclass 19, count 0 2006.229.20:01:37.80#ibcon#read 5, iclass 19, count 0 2006.229.20:01:37.80#ibcon#about to read 6, iclass 19, count 0 2006.229.20:01:37.80#ibcon#read 6, iclass 19, count 0 2006.229.20:01:37.80#ibcon#end of sib2, iclass 19, count 0 2006.229.20:01:37.80#ibcon#*after write, iclass 19, count 0 2006.229.20:01:37.80#ibcon#*before return 0, iclass 19, count 0 2006.229.20:01:37.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:37.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:37.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:01:37.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:01:37.80$vck44/valo=3,564.99 2006.229.20:01:37.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:01:37.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:01:37.80#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:37.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:37.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:37.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:37.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:01:37.80#ibcon#first serial, iclass 21, count 0 2006.229.20:01:37.80#ibcon#enter sib2, iclass 21, count 0 2006.229.20:01:37.80#ibcon#flushed, iclass 21, count 0 2006.229.20:01:37.80#ibcon#about to write, iclass 21, count 0 2006.229.20:01:37.80#ibcon#wrote, iclass 21, count 0 2006.229.20:01:37.80#ibcon#about to read 3, iclass 21, count 0 2006.229.20:01:37.82#ibcon#read 3, iclass 21, count 0 2006.229.20:01:37.82#ibcon#about to read 4, iclass 21, count 0 2006.229.20:01:37.82#ibcon#read 4, iclass 21, count 0 2006.229.20:01:37.82#ibcon#about to read 5, iclass 21, count 0 2006.229.20:01:37.82#ibcon#read 5, iclass 21, count 0 2006.229.20:01:37.82#ibcon#about to read 6, iclass 21, count 0 2006.229.20:01:37.82#ibcon#read 6, iclass 21, count 0 2006.229.20:01:37.82#ibcon#end of sib2, iclass 21, count 0 2006.229.20:01:37.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:01:37.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:01:37.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:01:37.82#ibcon#*before write, iclass 21, count 0 2006.229.20:01:37.82#ibcon#enter sib2, iclass 21, count 0 2006.229.20:01:37.82#ibcon#flushed, iclass 21, count 0 2006.229.20:01:37.82#ibcon#about to write, iclass 21, count 0 2006.229.20:01:37.82#ibcon#wrote, iclass 21, count 0 2006.229.20:01:37.82#ibcon#about to read 3, iclass 21, count 0 2006.229.20:01:37.86#ibcon#read 3, iclass 21, count 0 2006.229.20:01:37.86#ibcon#about to read 4, iclass 21, count 0 2006.229.20:01:37.86#ibcon#read 4, iclass 21, count 0 2006.229.20:01:37.86#ibcon#about to read 5, iclass 21, count 0 2006.229.20:01:37.86#ibcon#read 5, iclass 21, count 0 2006.229.20:01:37.86#ibcon#about to read 6, iclass 21, count 0 2006.229.20:01:37.86#ibcon#read 6, iclass 21, count 0 2006.229.20:01:37.86#ibcon#end of sib2, iclass 21, count 0 2006.229.20:01:37.86#ibcon#*after write, iclass 21, count 0 2006.229.20:01:37.86#ibcon#*before return 0, iclass 21, count 0 2006.229.20:01:37.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:37.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:37.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:01:37.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:01:37.86$vck44/va=3,6 2006.229.20:01:37.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:01:37.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:01:37.86#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:37.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:37.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:37.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:37.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:01:37.92#ibcon#first serial, iclass 23, count 2 2006.229.20:01:37.92#ibcon#enter sib2, iclass 23, count 2 2006.229.20:01:37.92#ibcon#flushed, iclass 23, count 2 2006.229.20:01:37.92#ibcon#about to write, iclass 23, count 2 2006.229.20:01:37.92#ibcon#wrote, iclass 23, count 2 2006.229.20:01:37.92#ibcon#about to read 3, iclass 23, count 2 2006.229.20:01:37.94#ibcon#read 3, iclass 23, count 2 2006.229.20:01:37.94#ibcon#about to read 4, iclass 23, count 2 2006.229.20:01:37.94#ibcon#read 4, iclass 23, count 2 2006.229.20:01:37.94#ibcon#about to read 5, iclass 23, count 2 2006.229.20:01:37.94#ibcon#read 5, iclass 23, count 2 2006.229.20:01:37.94#ibcon#about to read 6, iclass 23, count 2 2006.229.20:01:37.94#ibcon#read 6, iclass 23, count 2 2006.229.20:01:37.94#ibcon#end of sib2, iclass 23, count 2 2006.229.20:01:37.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:01:37.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:01:37.94#ibcon#[25=AT03-06\r\n] 2006.229.20:01:37.94#ibcon#*before write, iclass 23, count 2 2006.229.20:01:37.94#ibcon#enter sib2, iclass 23, count 2 2006.229.20:01:37.94#ibcon#flushed, iclass 23, count 2 2006.229.20:01:37.94#ibcon#about to write, iclass 23, count 2 2006.229.20:01:37.94#ibcon#wrote, iclass 23, count 2 2006.229.20:01:37.94#ibcon#about to read 3, iclass 23, count 2 2006.229.20:01:37.97#ibcon#read 3, iclass 23, count 2 2006.229.20:01:37.97#ibcon#about to read 4, iclass 23, count 2 2006.229.20:01:37.97#ibcon#read 4, iclass 23, count 2 2006.229.20:01:37.97#ibcon#about to read 5, iclass 23, count 2 2006.229.20:01:37.97#ibcon#read 5, iclass 23, count 2 2006.229.20:01:37.97#ibcon#about to read 6, iclass 23, count 2 2006.229.20:01:37.97#ibcon#read 6, iclass 23, count 2 2006.229.20:01:37.97#ibcon#end of sib2, iclass 23, count 2 2006.229.20:01:37.97#ibcon#*after write, iclass 23, count 2 2006.229.20:01:37.97#ibcon#*before return 0, iclass 23, count 2 2006.229.20:01:37.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:37.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:37.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:01:37.97#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:37.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:38.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:38.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:38.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:01:38.09#ibcon#first serial, iclass 23, count 0 2006.229.20:01:38.09#ibcon#enter sib2, iclass 23, count 0 2006.229.20:01:38.09#ibcon#flushed, iclass 23, count 0 2006.229.20:01:38.09#ibcon#about to write, iclass 23, count 0 2006.229.20:01:38.09#ibcon#wrote, iclass 23, count 0 2006.229.20:01:38.09#ibcon#about to read 3, iclass 23, count 0 2006.229.20:01:38.11#ibcon#read 3, iclass 23, count 0 2006.229.20:01:38.11#ibcon#about to read 4, iclass 23, count 0 2006.229.20:01:38.11#ibcon#read 4, iclass 23, count 0 2006.229.20:01:38.11#ibcon#about to read 5, iclass 23, count 0 2006.229.20:01:38.11#ibcon#read 5, iclass 23, count 0 2006.229.20:01:38.11#ibcon#about to read 6, iclass 23, count 0 2006.229.20:01:38.11#ibcon#read 6, iclass 23, count 0 2006.229.20:01:38.11#ibcon#end of sib2, iclass 23, count 0 2006.229.20:01:38.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:01:38.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:01:38.11#ibcon#[25=USB\r\n] 2006.229.20:01:38.11#ibcon#*before write, iclass 23, count 0 2006.229.20:01:38.11#ibcon#enter sib2, iclass 23, count 0 2006.229.20:01:38.11#ibcon#flushed, iclass 23, count 0 2006.229.20:01:38.11#ibcon#about to write, iclass 23, count 0 2006.229.20:01:38.11#ibcon#wrote, iclass 23, count 0 2006.229.20:01:38.11#ibcon#about to read 3, iclass 23, count 0 2006.229.20:01:38.14#ibcon#read 3, iclass 23, count 0 2006.229.20:01:38.14#ibcon#about to read 4, iclass 23, count 0 2006.229.20:01:38.14#ibcon#read 4, iclass 23, count 0 2006.229.20:01:38.14#ibcon#about to read 5, iclass 23, count 0 2006.229.20:01:38.14#ibcon#read 5, iclass 23, count 0 2006.229.20:01:38.14#ibcon#about to read 6, iclass 23, count 0 2006.229.20:01:38.14#ibcon#read 6, iclass 23, count 0 2006.229.20:01:38.14#ibcon#end of sib2, iclass 23, count 0 2006.229.20:01:38.14#ibcon#*after write, iclass 23, count 0 2006.229.20:01:38.14#ibcon#*before return 0, iclass 23, count 0 2006.229.20:01:38.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:38.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:38.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:01:38.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:01:38.14$vck44/valo=4,624.99 2006.229.20:01:38.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.20:01:38.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.20:01:38.14#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:38.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:38.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:38.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:38.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:01:38.14#ibcon#first serial, iclass 25, count 0 2006.229.20:01:38.14#ibcon#enter sib2, iclass 25, count 0 2006.229.20:01:38.14#ibcon#flushed, iclass 25, count 0 2006.229.20:01:38.14#ibcon#about to write, iclass 25, count 0 2006.229.20:01:38.14#ibcon#wrote, iclass 25, count 0 2006.229.20:01:38.14#ibcon#about to read 3, iclass 25, count 0 2006.229.20:01:38.16#ibcon#read 3, iclass 25, count 0 2006.229.20:01:38.16#ibcon#about to read 4, iclass 25, count 0 2006.229.20:01:38.16#ibcon#read 4, iclass 25, count 0 2006.229.20:01:38.16#ibcon#about to read 5, iclass 25, count 0 2006.229.20:01:38.16#ibcon#read 5, iclass 25, count 0 2006.229.20:01:38.16#ibcon#about to read 6, iclass 25, count 0 2006.229.20:01:38.16#ibcon#read 6, iclass 25, count 0 2006.229.20:01:38.16#ibcon#end of sib2, iclass 25, count 0 2006.229.20:01:38.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:01:38.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:01:38.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:01:38.16#ibcon#*before write, iclass 25, count 0 2006.229.20:01:38.16#ibcon#enter sib2, iclass 25, count 0 2006.229.20:01:38.16#ibcon#flushed, iclass 25, count 0 2006.229.20:01:38.16#ibcon#about to write, iclass 25, count 0 2006.229.20:01:38.16#ibcon#wrote, iclass 25, count 0 2006.229.20:01:38.16#ibcon#about to read 3, iclass 25, count 0 2006.229.20:01:38.20#ibcon#read 3, iclass 25, count 0 2006.229.20:01:38.20#ibcon#about to read 4, iclass 25, count 0 2006.229.20:01:38.20#ibcon#read 4, iclass 25, count 0 2006.229.20:01:38.20#ibcon#about to read 5, iclass 25, count 0 2006.229.20:01:38.20#ibcon#read 5, iclass 25, count 0 2006.229.20:01:38.20#ibcon#about to read 6, iclass 25, count 0 2006.229.20:01:38.20#ibcon#read 6, iclass 25, count 0 2006.229.20:01:38.20#ibcon#end of sib2, iclass 25, count 0 2006.229.20:01:38.20#ibcon#*after write, iclass 25, count 0 2006.229.20:01:38.20#ibcon#*before return 0, iclass 25, count 0 2006.229.20:01:38.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:38.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:38.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:01:38.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:01:38.20$vck44/va=4,7 2006.229.20:01:38.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.20:01:38.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.20:01:38.20#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:38.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:38.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:38.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:38.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.20:01:38.26#ibcon#first serial, iclass 27, count 2 2006.229.20:01:38.26#ibcon#enter sib2, iclass 27, count 2 2006.229.20:01:38.26#ibcon#flushed, iclass 27, count 2 2006.229.20:01:38.26#ibcon#about to write, iclass 27, count 2 2006.229.20:01:38.26#ibcon#wrote, iclass 27, count 2 2006.229.20:01:38.26#ibcon#about to read 3, iclass 27, count 2 2006.229.20:01:38.28#ibcon#read 3, iclass 27, count 2 2006.229.20:01:38.28#ibcon#about to read 4, iclass 27, count 2 2006.229.20:01:38.28#ibcon#read 4, iclass 27, count 2 2006.229.20:01:38.28#ibcon#about to read 5, iclass 27, count 2 2006.229.20:01:38.28#ibcon#read 5, iclass 27, count 2 2006.229.20:01:38.28#ibcon#about to read 6, iclass 27, count 2 2006.229.20:01:38.28#ibcon#read 6, iclass 27, count 2 2006.229.20:01:38.28#ibcon#end of sib2, iclass 27, count 2 2006.229.20:01:38.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.20:01:38.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.20:01:38.28#ibcon#[25=AT04-07\r\n] 2006.229.20:01:38.28#ibcon#*before write, iclass 27, count 2 2006.229.20:01:38.28#ibcon#enter sib2, iclass 27, count 2 2006.229.20:01:38.28#ibcon#flushed, iclass 27, count 2 2006.229.20:01:38.28#ibcon#about to write, iclass 27, count 2 2006.229.20:01:38.28#ibcon#wrote, iclass 27, count 2 2006.229.20:01:38.28#ibcon#about to read 3, iclass 27, count 2 2006.229.20:01:38.31#ibcon#read 3, iclass 27, count 2 2006.229.20:01:38.31#ibcon#about to read 4, iclass 27, count 2 2006.229.20:01:38.31#ibcon#read 4, iclass 27, count 2 2006.229.20:01:38.31#ibcon#about to read 5, iclass 27, count 2 2006.229.20:01:38.31#ibcon#read 5, iclass 27, count 2 2006.229.20:01:38.31#ibcon#about to read 6, iclass 27, count 2 2006.229.20:01:38.31#ibcon#read 6, iclass 27, count 2 2006.229.20:01:38.31#ibcon#end of sib2, iclass 27, count 2 2006.229.20:01:38.31#ibcon#*after write, iclass 27, count 2 2006.229.20:01:38.31#ibcon#*before return 0, iclass 27, count 2 2006.229.20:01:38.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:38.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:38.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.20:01:38.31#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:38.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:38.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:38.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:38.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:01:38.43#ibcon#first serial, iclass 27, count 0 2006.229.20:01:38.43#ibcon#enter sib2, iclass 27, count 0 2006.229.20:01:38.43#ibcon#flushed, iclass 27, count 0 2006.229.20:01:38.43#ibcon#about to write, iclass 27, count 0 2006.229.20:01:38.43#ibcon#wrote, iclass 27, count 0 2006.229.20:01:38.43#ibcon#about to read 3, iclass 27, count 0 2006.229.20:01:38.45#ibcon#read 3, iclass 27, count 0 2006.229.20:01:38.45#ibcon#about to read 4, iclass 27, count 0 2006.229.20:01:38.45#ibcon#read 4, iclass 27, count 0 2006.229.20:01:38.45#ibcon#about to read 5, iclass 27, count 0 2006.229.20:01:38.45#ibcon#read 5, iclass 27, count 0 2006.229.20:01:38.45#ibcon#about to read 6, iclass 27, count 0 2006.229.20:01:38.45#ibcon#read 6, iclass 27, count 0 2006.229.20:01:38.45#ibcon#end of sib2, iclass 27, count 0 2006.229.20:01:38.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:01:38.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:01:38.45#ibcon#[25=USB\r\n] 2006.229.20:01:38.45#ibcon#*before write, iclass 27, count 0 2006.229.20:01:38.45#ibcon#enter sib2, iclass 27, count 0 2006.229.20:01:38.45#ibcon#flushed, iclass 27, count 0 2006.229.20:01:38.45#ibcon#about to write, iclass 27, count 0 2006.229.20:01:38.45#ibcon#wrote, iclass 27, count 0 2006.229.20:01:38.45#ibcon#about to read 3, iclass 27, count 0 2006.229.20:01:38.48#ibcon#read 3, iclass 27, count 0 2006.229.20:01:38.48#ibcon#about to read 4, iclass 27, count 0 2006.229.20:01:38.48#ibcon#read 4, iclass 27, count 0 2006.229.20:01:38.48#ibcon#about to read 5, iclass 27, count 0 2006.229.20:01:38.48#ibcon#read 5, iclass 27, count 0 2006.229.20:01:38.48#ibcon#about to read 6, iclass 27, count 0 2006.229.20:01:38.48#ibcon#read 6, iclass 27, count 0 2006.229.20:01:38.48#ibcon#end of sib2, iclass 27, count 0 2006.229.20:01:38.48#ibcon#*after write, iclass 27, count 0 2006.229.20:01:38.48#ibcon#*before return 0, iclass 27, count 0 2006.229.20:01:38.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:38.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:38.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:01:38.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:01:38.48$vck44/valo=5,734.99 2006.229.20:01:38.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:01:38.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:01:38.48#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:38.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:38.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:38.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:38.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:01:38.48#ibcon#first serial, iclass 29, count 0 2006.229.20:01:38.48#ibcon#enter sib2, iclass 29, count 0 2006.229.20:01:38.48#ibcon#flushed, iclass 29, count 0 2006.229.20:01:38.48#ibcon#about to write, iclass 29, count 0 2006.229.20:01:38.48#ibcon#wrote, iclass 29, count 0 2006.229.20:01:38.48#ibcon#about to read 3, iclass 29, count 0 2006.229.20:01:38.50#ibcon#read 3, iclass 29, count 0 2006.229.20:01:38.50#ibcon#about to read 4, iclass 29, count 0 2006.229.20:01:38.50#ibcon#read 4, iclass 29, count 0 2006.229.20:01:38.50#ibcon#about to read 5, iclass 29, count 0 2006.229.20:01:38.50#ibcon#read 5, iclass 29, count 0 2006.229.20:01:38.50#ibcon#about to read 6, iclass 29, count 0 2006.229.20:01:38.50#ibcon#read 6, iclass 29, count 0 2006.229.20:01:38.50#ibcon#end of sib2, iclass 29, count 0 2006.229.20:01:38.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:01:38.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:01:38.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:01:38.50#ibcon#*before write, iclass 29, count 0 2006.229.20:01:38.50#ibcon#enter sib2, iclass 29, count 0 2006.229.20:01:38.50#ibcon#flushed, iclass 29, count 0 2006.229.20:01:38.50#ibcon#about to write, iclass 29, count 0 2006.229.20:01:38.50#ibcon#wrote, iclass 29, count 0 2006.229.20:01:38.50#ibcon#about to read 3, iclass 29, count 0 2006.229.20:01:38.54#ibcon#read 3, iclass 29, count 0 2006.229.20:01:38.54#ibcon#about to read 4, iclass 29, count 0 2006.229.20:01:38.54#ibcon#read 4, iclass 29, count 0 2006.229.20:01:38.54#ibcon#about to read 5, iclass 29, count 0 2006.229.20:01:38.54#ibcon#read 5, iclass 29, count 0 2006.229.20:01:38.54#ibcon#about to read 6, iclass 29, count 0 2006.229.20:01:38.54#ibcon#read 6, iclass 29, count 0 2006.229.20:01:38.54#ibcon#end of sib2, iclass 29, count 0 2006.229.20:01:38.54#ibcon#*after write, iclass 29, count 0 2006.229.20:01:38.54#ibcon#*before return 0, iclass 29, count 0 2006.229.20:01:38.54#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:38.54#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:38.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:01:38.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:01:38.54$vck44/va=5,4 2006.229.20:01:38.54#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.20:01:38.54#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.20:01:38.54#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:38.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:38.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:38.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:38.60#ibcon#enter wrdev, iclass 31, count 2 2006.229.20:01:38.60#ibcon#first serial, iclass 31, count 2 2006.229.20:01:38.60#ibcon#enter sib2, iclass 31, count 2 2006.229.20:01:38.60#ibcon#flushed, iclass 31, count 2 2006.229.20:01:38.60#ibcon#about to write, iclass 31, count 2 2006.229.20:01:38.60#ibcon#wrote, iclass 31, count 2 2006.229.20:01:38.60#ibcon#about to read 3, iclass 31, count 2 2006.229.20:01:38.62#ibcon#read 3, iclass 31, count 2 2006.229.20:01:38.62#ibcon#about to read 4, iclass 31, count 2 2006.229.20:01:38.62#ibcon#read 4, iclass 31, count 2 2006.229.20:01:38.62#ibcon#about to read 5, iclass 31, count 2 2006.229.20:01:38.62#ibcon#read 5, iclass 31, count 2 2006.229.20:01:38.62#ibcon#about to read 6, iclass 31, count 2 2006.229.20:01:38.62#ibcon#read 6, iclass 31, count 2 2006.229.20:01:38.62#ibcon#end of sib2, iclass 31, count 2 2006.229.20:01:38.62#ibcon#*mode == 0, iclass 31, count 2 2006.229.20:01:38.62#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.20:01:38.62#ibcon#[25=AT05-04\r\n] 2006.229.20:01:38.62#ibcon#*before write, iclass 31, count 2 2006.229.20:01:38.62#ibcon#enter sib2, iclass 31, count 2 2006.229.20:01:38.62#ibcon#flushed, iclass 31, count 2 2006.229.20:01:38.62#ibcon#about to write, iclass 31, count 2 2006.229.20:01:38.62#ibcon#wrote, iclass 31, count 2 2006.229.20:01:38.62#ibcon#about to read 3, iclass 31, count 2 2006.229.20:01:38.65#ibcon#read 3, iclass 31, count 2 2006.229.20:01:38.65#ibcon#about to read 4, iclass 31, count 2 2006.229.20:01:38.65#ibcon#read 4, iclass 31, count 2 2006.229.20:01:38.65#ibcon#about to read 5, iclass 31, count 2 2006.229.20:01:38.65#ibcon#read 5, iclass 31, count 2 2006.229.20:01:38.65#ibcon#about to read 6, iclass 31, count 2 2006.229.20:01:38.65#ibcon#read 6, iclass 31, count 2 2006.229.20:01:38.65#ibcon#end of sib2, iclass 31, count 2 2006.229.20:01:38.65#ibcon#*after write, iclass 31, count 2 2006.229.20:01:38.65#ibcon#*before return 0, iclass 31, count 2 2006.229.20:01:38.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:38.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:38.65#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.20:01:38.65#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:38.65#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:38.77#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:38.77#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:38.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:01:38.77#ibcon#first serial, iclass 31, count 0 2006.229.20:01:38.77#ibcon#enter sib2, iclass 31, count 0 2006.229.20:01:38.77#ibcon#flushed, iclass 31, count 0 2006.229.20:01:38.77#ibcon#about to write, iclass 31, count 0 2006.229.20:01:38.77#ibcon#wrote, iclass 31, count 0 2006.229.20:01:38.77#ibcon#about to read 3, iclass 31, count 0 2006.229.20:01:38.79#ibcon#read 3, iclass 31, count 0 2006.229.20:01:38.79#ibcon#about to read 4, iclass 31, count 0 2006.229.20:01:38.79#ibcon#read 4, iclass 31, count 0 2006.229.20:01:38.79#ibcon#about to read 5, iclass 31, count 0 2006.229.20:01:38.79#ibcon#read 5, iclass 31, count 0 2006.229.20:01:38.79#ibcon#about to read 6, iclass 31, count 0 2006.229.20:01:38.79#ibcon#read 6, iclass 31, count 0 2006.229.20:01:38.79#ibcon#end of sib2, iclass 31, count 0 2006.229.20:01:38.79#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:01:38.79#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:01:38.79#ibcon#[25=USB\r\n] 2006.229.20:01:38.79#ibcon#*before write, iclass 31, count 0 2006.229.20:01:38.79#ibcon#enter sib2, iclass 31, count 0 2006.229.20:01:38.79#ibcon#flushed, iclass 31, count 0 2006.229.20:01:38.79#ibcon#about to write, iclass 31, count 0 2006.229.20:01:38.79#ibcon#wrote, iclass 31, count 0 2006.229.20:01:38.79#ibcon#about to read 3, iclass 31, count 0 2006.229.20:01:38.82#ibcon#read 3, iclass 31, count 0 2006.229.20:01:38.82#ibcon#about to read 4, iclass 31, count 0 2006.229.20:01:38.82#ibcon#read 4, iclass 31, count 0 2006.229.20:01:38.82#ibcon#about to read 5, iclass 31, count 0 2006.229.20:01:38.82#ibcon#read 5, iclass 31, count 0 2006.229.20:01:38.82#ibcon#about to read 6, iclass 31, count 0 2006.229.20:01:38.82#ibcon#read 6, iclass 31, count 0 2006.229.20:01:38.82#ibcon#end of sib2, iclass 31, count 0 2006.229.20:01:38.82#ibcon#*after write, iclass 31, count 0 2006.229.20:01:38.82#ibcon#*before return 0, iclass 31, count 0 2006.229.20:01:38.82#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:38.82#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:38.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:01:38.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:01:38.82$vck44/valo=6,814.99 2006.229.20:01:38.82#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.20:01:38.82#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.20:01:38.82#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:38.82#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:38.82#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:38.82#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:38.82#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:01:38.82#ibcon#first serial, iclass 33, count 0 2006.229.20:01:38.82#ibcon#enter sib2, iclass 33, count 0 2006.229.20:01:38.82#ibcon#flushed, iclass 33, count 0 2006.229.20:01:38.82#ibcon#about to write, iclass 33, count 0 2006.229.20:01:38.82#ibcon#wrote, iclass 33, count 0 2006.229.20:01:38.82#ibcon#about to read 3, iclass 33, count 0 2006.229.20:01:38.84#ibcon#read 3, iclass 33, count 0 2006.229.20:01:38.84#ibcon#about to read 4, iclass 33, count 0 2006.229.20:01:38.84#ibcon#read 4, iclass 33, count 0 2006.229.20:01:38.84#ibcon#about to read 5, iclass 33, count 0 2006.229.20:01:38.84#ibcon#read 5, iclass 33, count 0 2006.229.20:01:38.84#ibcon#about to read 6, iclass 33, count 0 2006.229.20:01:38.84#ibcon#read 6, iclass 33, count 0 2006.229.20:01:38.84#ibcon#end of sib2, iclass 33, count 0 2006.229.20:01:38.84#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:01:38.84#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:01:38.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:01:38.84#ibcon#*before write, iclass 33, count 0 2006.229.20:01:38.84#ibcon#enter sib2, iclass 33, count 0 2006.229.20:01:38.84#ibcon#flushed, iclass 33, count 0 2006.229.20:01:38.84#ibcon#about to write, iclass 33, count 0 2006.229.20:01:38.84#ibcon#wrote, iclass 33, count 0 2006.229.20:01:38.84#ibcon#about to read 3, iclass 33, count 0 2006.229.20:01:38.88#ibcon#read 3, iclass 33, count 0 2006.229.20:01:38.88#ibcon#about to read 4, iclass 33, count 0 2006.229.20:01:38.88#ibcon#read 4, iclass 33, count 0 2006.229.20:01:38.88#ibcon#about to read 5, iclass 33, count 0 2006.229.20:01:38.88#ibcon#read 5, iclass 33, count 0 2006.229.20:01:38.88#ibcon#about to read 6, iclass 33, count 0 2006.229.20:01:38.88#ibcon#read 6, iclass 33, count 0 2006.229.20:01:38.88#ibcon#end of sib2, iclass 33, count 0 2006.229.20:01:38.88#ibcon#*after write, iclass 33, count 0 2006.229.20:01:38.88#ibcon#*before return 0, iclass 33, count 0 2006.229.20:01:38.88#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:38.88#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:38.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:01:38.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:01:38.88$vck44/va=6,4 2006.229.20:01:38.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.20:01:38.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.20:01:38.88#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:38.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:38.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:38.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:38.94#ibcon#enter wrdev, iclass 35, count 2 2006.229.20:01:38.94#ibcon#first serial, iclass 35, count 2 2006.229.20:01:38.94#ibcon#enter sib2, iclass 35, count 2 2006.229.20:01:38.94#ibcon#flushed, iclass 35, count 2 2006.229.20:01:38.94#ibcon#about to write, iclass 35, count 2 2006.229.20:01:38.94#ibcon#wrote, iclass 35, count 2 2006.229.20:01:38.94#ibcon#about to read 3, iclass 35, count 2 2006.229.20:01:38.96#ibcon#read 3, iclass 35, count 2 2006.229.20:01:38.96#ibcon#about to read 4, iclass 35, count 2 2006.229.20:01:38.96#ibcon#read 4, iclass 35, count 2 2006.229.20:01:38.96#ibcon#about to read 5, iclass 35, count 2 2006.229.20:01:38.96#ibcon#read 5, iclass 35, count 2 2006.229.20:01:38.96#ibcon#about to read 6, iclass 35, count 2 2006.229.20:01:38.96#ibcon#read 6, iclass 35, count 2 2006.229.20:01:38.96#ibcon#end of sib2, iclass 35, count 2 2006.229.20:01:38.96#ibcon#*mode == 0, iclass 35, count 2 2006.229.20:01:38.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.20:01:38.96#ibcon#[25=AT06-04\r\n] 2006.229.20:01:38.96#ibcon#*before write, iclass 35, count 2 2006.229.20:01:38.96#ibcon#enter sib2, iclass 35, count 2 2006.229.20:01:38.96#ibcon#flushed, iclass 35, count 2 2006.229.20:01:38.96#ibcon#about to write, iclass 35, count 2 2006.229.20:01:38.96#ibcon#wrote, iclass 35, count 2 2006.229.20:01:38.96#ibcon#about to read 3, iclass 35, count 2 2006.229.20:01:38.99#ibcon#read 3, iclass 35, count 2 2006.229.20:01:38.99#ibcon#about to read 4, iclass 35, count 2 2006.229.20:01:38.99#ibcon#read 4, iclass 35, count 2 2006.229.20:01:38.99#ibcon#about to read 5, iclass 35, count 2 2006.229.20:01:38.99#ibcon#read 5, iclass 35, count 2 2006.229.20:01:38.99#ibcon#about to read 6, iclass 35, count 2 2006.229.20:01:38.99#ibcon#read 6, iclass 35, count 2 2006.229.20:01:38.99#ibcon#end of sib2, iclass 35, count 2 2006.229.20:01:38.99#ibcon#*after write, iclass 35, count 2 2006.229.20:01:38.99#ibcon#*before return 0, iclass 35, count 2 2006.229.20:01:38.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:38.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:38.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.20:01:38.99#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:38.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:39.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:39.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:39.11#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:01:39.11#ibcon#first serial, iclass 35, count 0 2006.229.20:01:39.11#ibcon#enter sib2, iclass 35, count 0 2006.229.20:01:39.11#ibcon#flushed, iclass 35, count 0 2006.229.20:01:39.11#ibcon#about to write, iclass 35, count 0 2006.229.20:01:39.11#ibcon#wrote, iclass 35, count 0 2006.229.20:01:39.11#ibcon#about to read 3, iclass 35, count 0 2006.229.20:01:39.13#ibcon#read 3, iclass 35, count 0 2006.229.20:01:39.13#ibcon#about to read 4, iclass 35, count 0 2006.229.20:01:39.13#ibcon#read 4, iclass 35, count 0 2006.229.20:01:39.13#ibcon#about to read 5, iclass 35, count 0 2006.229.20:01:39.13#ibcon#read 5, iclass 35, count 0 2006.229.20:01:39.13#ibcon#about to read 6, iclass 35, count 0 2006.229.20:01:39.13#ibcon#read 6, iclass 35, count 0 2006.229.20:01:39.13#ibcon#end of sib2, iclass 35, count 0 2006.229.20:01:39.13#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:01:39.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:01:39.13#ibcon#[25=USB\r\n] 2006.229.20:01:39.13#ibcon#*before write, iclass 35, count 0 2006.229.20:01:39.13#ibcon#enter sib2, iclass 35, count 0 2006.229.20:01:39.13#ibcon#flushed, iclass 35, count 0 2006.229.20:01:39.13#ibcon#about to write, iclass 35, count 0 2006.229.20:01:39.13#ibcon#wrote, iclass 35, count 0 2006.229.20:01:39.13#ibcon#about to read 3, iclass 35, count 0 2006.229.20:01:39.16#ibcon#read 3, iclass 35, count 0 2006.229.20:01:39.16#ibcon#about to read 4, iclass 35, count 0 2006.229.20:01:39.16#ibcon#read 4, iclass 35, count 0 2006.229.20:01:39.16#ibcon#about to read 5, iclass 35, count 0 2006.229.20:01:39.16#ibcon#read 5, iclass 35, count 0 2006.229.20:01:39.16#ibcon#about to read 6, iclass 35, count 0 2006.229.20:01:39.16#ibcon#read 6, iclass 35, count 0 2006.229.20:01:39.16#ibcon#end of sib2, iclass 35, count 0 2006.229.20:01:39.16#ibcon#*after write, iclass 35, count 0 2006.229.20:01:39.16#ibcon#*before return 0, iclass 35, count 0 2006.229.20:01:39.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:39.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:39.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:01:39.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:01:39.16$vck44/valo=7,864.99 2006.229.20:01:39.16#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.20:01:39.16#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.20:01:39.16#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:39.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:39.16#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:39.16#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:39.16#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:01:39.16#ibcon#first serial, iclass 37, count 0 2006.229.20:01:39.16#ibcon#enter sib2, iclass 37, count 0 2006.229.20:01:39.16#ibcon#flushed, iclass 37, count 0 2006.229.20:01:39.16#ibcon#about to write, iclass 37, count 0 2006.229.20:01:39.16#ibcon#wrote, iclass 37, count 0 2006.229.20:01:39.16#ibcon#about to read 3, iclass 37, count 0 2006.229.20:01:39.18#ibcon#read 3, iclass 37, count 0 2006.229.20:01:39.18#ibcon#about to read 4, iclass 37, count 0 2006.229.20:01:39.18#ibcon#read 4, iclass 37, count 0 2006.229.20:01:39.18#ibcon#about to read 5, iclass 37, count 0 2006.229.20:01:39.18#ibcon#read 5, iclass 37, count 0 2006.229.20:01:39.18#ibcon#about to read 6, iclass 37, count 0 2006.229.20:01:39.18#ibcon#read 6, iclass 37, count 0 2006.229.20:01:39.18#ibcon#end of sib2, iclass 37, count 0 2006.229.20:01:39.18#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:01:39.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:01:39.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:01:39.18#ibcon#*before write, iclass 37, count 0 2006.229.20:01:39.18#ibcon#enter sib2, iclass 37, count 0 2006.229.20:01:39.18#ibcon#flushed, iclass 37, count 0 2006.229.20:01:39.18#ibcon#about to write, iclass 37, count 0 2006.229.20:01:39.18#ibcon#wrote, iclass 37, count 0 2006.229.20:01:39.18#ibcon#about to read 3, iclass 37, count 0 2006.229.20:01:39.22#ibcon#read 3, iclass 37, count 0 2006.229.20:01:39.22#ibcon#about to read 4, iclass 37, count 0 2006.229.20:01:39.22#ibcon#read 4, iclass 37, count 0 2006.229.20:01:39.22#ibcon#about to read 5, iclass 37, count 0 2006.229.20:01:39.22#ibcon#read 5, iclass 37, count 0 2006.229.20:01:39.22#ibcon#about to read 6, iclass 37, count 0 2006.229.20:01:39.22#ibcon#read 6, iclass 37, count 0 2006.229.20:01:39.22#ibcon#end of sib2, iclass 37, count 0 2006.229.20:01:39.22#ibcon#*after write, iclass 37, count 0 2006.229.20:01:39.22#ibcon#*before return 0, iclass 37, count 0 2006.229.20:01:39.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:39.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:39.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:01:39.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:01:39.22$vck44/va=7,5 2006.229.20:01:39.22#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.20:01:39.22#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.20:01:39.22#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:39.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:39.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:39.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:39.28#ibcon#enter wrdev, iclass 39, count 2 2006.229.20:01:39.28#ibcon#first serial, iclass 39, count 2 2006.229.20:01:39.28#ibcon#enter sib2, iclass 39, count 2 2006.229.20:01:39.28#ibcon#flushed, iclass 39, count 2 2006.229.20:01:39.28#ibcon#about to write, iclass 39, count 2 2006.229.20:01:39.28#ibcon#wrote, iclass 39, count 2 2006.229.20:01:39.28#ibcon#about to read 3, iclass 39, count 2 2006.229.20:01:39.30#ibcon#read 3, iclass 39, count 2 2006.229.20:01:39.30#ibcon#about to read 4, iclass 39, count 2 2006.229.20:01:39.30#ibcon#read 4, iclass 39, count 2 2006.229.20:01:39.30#ibcon#about to read 5, iclass 39, count 2 2006.229.20:01:39.30#ibcon#read 5, iclass 39, count 2 2006.229.20:01:39.30#ibcon#about to read 6, iclass 39, count 2 2006.229.20:01:39.30#ibcon#read 6, iclass 39, count 2 2006.229.20:01:39.30#ibcon#end of sib2, iclass 39, count 2 2006.229.20:01:39.30#ibcon#*mode == 0, iclass 39, count 2 2006.229.20:01:39.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.20:01:39.30#ibcon#[25=AT07-05\r\n] 2006.229.20:01:39.30#ibcon#*before write, iclass 39, count 2 2006.229.20:01:39.30#ibcon#enter sib2, iclass 39, count 2 2006.229.20:01:39.30#ibcon#flushed, iclass 39, count 2 2006.229.20:01:39.30#ibcon#about to write, iclass 39, count 2 2006.229.20:01:39.30#ibcon#wrote, iclass 39, count 2 2006.229.20:01:39.30#ibcon#about to read 3, iclass 39, count 2 2006.229.20:01:39.33#ibcon#read 3, iclass 39, count 2 2006.229.20:01:39.33#ibcon#about to read 4, iclass 39, count 2 2006.229.20:01:39.33#ibcon#read 4, iclass 39, count 2 2006.229.20:01:39.33#ibcon#about to read 5, iclass 39, count 2 2006.229.20:01:39.33#ibcon#read 5, iclass 39, count 2 2006.229.20:01:39.33#ibcon#about to read 6, iclass 39, count 2 2006.229.20:01:39.33#ibcon#read 6, iclass 39, count 2 2006.229.20:01:39.33#ibcon#end of sib2, iclass 39, count 2 2006.229.20:01:39.33#ibcon#*after write, iclass 39, count 2 2006.229.20:01:39.33#ibcon#*before return 0, iclass 39, count 2 2006.229.20:01:39.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:39.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:39.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.20:01:39.33#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:39.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:39.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:39.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:39.45#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:01:39.45#ibcon#first serial, iclass 39, count 0 2006.229.20:01:39.45#ibcon#enter sib2, iclass 39, count 0 2006.229.20:01:39.45#ibcon#flushed, iclass 39, count 0 2006.229.20:01:39.45#ibcon#about to write, iclass 39, count 0 2006.229.20:01:39.45#ibcon#wrote, iclass 39, count 0 2006.229.20:01:39.45#ibcon#about to read 3, iclass 39, count 0 2006.229.20:01:39.47#ibcon#read 3, iclass 39, count 0 2006.229.20:01:39.47#ibcon#about to read 4, iclass 39, count 0 2006.229.20:01:39.47#ibcon#read 4, iclass 39, count 0 2006.229.20:01:39.47#ibcon#about to read 5, iclass 39, count 0 2006.229.20:01:39.47#ibcon#read 5, iclass 39, count 0 2006.229.20:01:39.47#ibcon#about to read 6, iclass 39, count 0 2006.229.20:01:39.47#ibcon#read 6, iclass 39, count 0 2006.229.20:01:39.47#ibcon#end of sib2, iclass 39, count 0 2006.229.20:01:39.47#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:01:39.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:01:39.47#ibcon#[25=USB\r\n] 2006.229.20:01:39.47#ibcon#*before write, iclass 39, count 0 2006.229.20:01:39.47#ibcon#enter sib2, iclass 39, count 0 2006.229.20:01:39.47#ibcon#flushed, iclass 39, count 0 2006.229.20:01:39.47#ibcon#about to write, iclass 39, count 0 2006.229.20:01:39.47#ibcon#wrote, iclass 39, count 0 2006.229.20:01:39.47#ibcon#about to read 3, iclass 39, count 0 2006.229.20:01:39.50#ibcon#read 3, iclass 39, count 0 2006.229.20:01:39.50#ibcon#about to read 4, iclass 39, count 0 2006.229.20:01:39.50#ibcon#read 4, iclass 39, count 0 2006.229.20:01:39.50#ibcon#about to read 5, iclass 39, count 0 2006.229.20:01:39.50#ibcon#read 5, iclass 39, count 0 2006.229.20:01:39.50#ibcon#about to read 6, iclass 39, count 0 2006.229.20:01:39.50#ibcon#read 6, iclass 39, count 0 2006.229.20:01:39.50#ibcon#end of sib2, iclass 39, count 0 2006.229.20:01:39.50#ibcon#*after write, iclass 39, count 0 2006.229.20:01:39.50#ibcon#*before return 0, iclass 39, count 0 2006.229.20:01:39.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:39.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:39.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:01:39.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:01:39.50$vck44/valo=8,884.99 2006.229.20:01:39.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.20:01:39.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.20:01:39.50#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:39.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:39.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:39.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:39.50#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:01:39.50#ibcon#first serial, iclass 3, count 0 2006.229.20:01:39.50#ibcon#enter sib2, iclass 3, count 0 2006.229.20:01:39.50#ibcon#flushed, iclass 3, count 0 2006.229.20:01:39.50#ibcon#about to write, iclass 3, count 0 2006.229.20:01:39.50#ibcon#wrote, iclass 3, count 0 2006.229.20:01:39.50#ibcon#about to read 3, iclass 3, count 0 2006.229.20:01:39.52#ibcon#read 3, iclass 3, count 0 2006.229.20:01:39.52#ibcon#about to read 4, iclass 3, count 0 2006.229.20:01:39.52#ibcon#read 4, iclass 3, count 0 2006.229.20:01:39.52#ibcon#about to read 5, iclass 3, count 0 2006.229.20:01:39.52#ibcon#read 5, iclass 3, count 0 2006.229.20:01:39.52#ibcon#about to read 6, iclass 3, count 0 2006.229.20:01:39.52#ibcon#read 6, iclass 3, count 0 2006.229.20:01:39.52#ibcon#end of sib2, iclass 3, count 0 2006.229.20:01:39.52#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:01:39.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:01:39.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:01:39.52#ibcon#*before write, iclass 3, count 0 2006.229.20:01:39.52#ibcon#enter sib2, iclass 3, count 0 2006.229.20:01:39.52#ibcon#flushed, iclass 3, count 0 2006.229.20:01:39.52#ibcon#about to write, iclass 3, count 0 2006.229.20:01:39.52#ibcon#wrote, iclass 3, count 0 2006.229.20:01:39.52#ibcon#about to read 3, iclass 3, count 0 2006.229.20:01:39.56#ibcon#read 3, iclass 3, count 0 2006.229.20:01:39.56#ibcon#about to read 4, iclass 3, count 0 2006.229.20:01:39.56#ibcon#read 4, iclass 3, count 0 2006.229.20:01:39.56#ibcon#about to read 5, iclass 3, count 0 2006.229.20:01:39.56#ibcon#read 5, iclass 3, count 0 2006.229.20:01:39.56#ibcon#about to read 6, iclass 3, count 0 2006.229.20:01:39.56#ibcon#read 6, iclass 3, count 0 2006.229.20:01:39.56#ibcon#end of sib2, iclass 3, count 0 2006.229.20:01:39.56#ibcon#*after write, iclass 3, count 0 2006.229.20:01:39.56#ibcon#*before return 0, iclass 3, count 0 2006.229.20:01:39.56#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:39.56#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:39.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:01:39.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:01:39.56$vck44/va=8,6 2006.229.20:01:39.56#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.20:01:39.56#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.20:01:39.56#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:39.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:01:39.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:01:39.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:01:39.62#ibcon#enter wrdev, iclass 5, count 2 2006.229.20:01:39.62#ibcon#first serial, iclass 5, count 2 2006.229.20:01:39.62#ibcon#enter sib2, iclass 5, count 2 2006.229.20:01:39.62#ibcon#flushed, iclass 5, count 2 2006.229.20:01:39.62#ibcon#about to write, iclass 5, count 2 2006.229.20:01:39.62#ibcon#wrote, iclass 5, count 2 2006.229.20:01:39.62#ibcon#about to read 3, iclass 5, count 2 2006.229.20:01:39.64#ibcon#read 3, iclass 5, count 2 2006.229.20:01:39.64#ibcon#about to read 4, iclass 5, count 2 2006.229.20:01:39.64#ibcon#read 4, iclass 5, count 2 2006.229.20:01:39.64#ibcon#about to read 5, iclass 5, count 2 2006.229.20:01:39.64#ibcon#read 5, iclass 5, count 2 2006.229.20:01:39.64#ibcon#about to read 6, iclass 5, count 2 2006.229.20:01:39.64#ibcon#read 6, iclass 5, count 2 2006.229.20:01:39.64#ibcon#end of sib2, iclass 5, count 2 2006.229.20:01:39.64#ibcon#*mode == 0, iclass 5, count 2 2006.229.20:01:39.64#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.20:01:39.64#ibcon#[25=AT08-06\r\n] 2006.229.20:01:39.64#ibcon#*before write, iclass 5, count 2 2006.229.20:01:39.64#ibcon#enter sib2, iclass 5, count 2 2006.229.20:01:39.64#ibcon#flushed, iclass 5, count 2 2006.229.20:01:39.64#ibcon#about to write, iclass 5, count 2 2006.229.20:01:39.64#ibcon#wrote, iclass 5, count 2 2006.229.20:01:39.64#ibcon#about to read 3, iclass 5, count 2 2006.229.20:01:39.67#ibcon#read 3, iclass 5, count 2 2006.229.20:01:39.67#ibcon#about to read 4, iclass 5, count 2 2006.229.20:01:39.67#ibcon#read 4, iclass 5, count 2 2006.229.20:01:39.67#ibcon#about to read 5, iclass 5, count 2 2006.229.20:01:39.67#ibcon#read 5, iclass 5, count 2 2006.229.20:01:39.67#ibcon#about to read 6, iclass 5, count 2 2006.229.20:01:39.67#ibcon#read 6, iclass 5, count 2 2006.229.20:01:39.67#ibcon#end of sib2, iclass 5, count 2 2006.229.20:01:39.67#ibcon#*after write, iclass 5, count 2 2006.229.20:01:39.67#ibcon#*before return 0, iclass 5, count 2 2006.229.20:01:39.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:01:39.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:01:39.67#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.20:01:39.67#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:39.67#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:01:39.79#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:01:39.79#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:01:39.79#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:01:39.79#ibcon#first serial, iclass 5, count 0 2006.229.20:01:39.79#ibcon#enter sib2, iclass 5, count 0 2006.229.20:01:39.79#ibcon#flushed, iclass 5, count 0 2006.229.20:01:39.79#ibcon#about to write, iclass 5, count 0 2006.229.20:01:39.79#ibcon#wrote, iclass 5, count 0 2006.229.20:01:39.79#ibcon#about to read 3, iclass 5, count 0 2006.229.20:01:39.81#ibcon#read 3, iclass 5, count 0 2006.229.20:01:39.81#ibcon#about to read 4, iclass 5, count 0 2006.229.20:01:39.81#ibcon#read 4, iclass 5, count 0 2006.229.20:01:39.81#ibcon#about to read 5, iclass 5, count 0 2006.229.20:01:39.81#ibcon#read 5, iclass 5, count 0 2006.229.20:01:39.81#ibcon#about to read 6, iclass 5, count 0 2006.229.20:01:39.81#ibcon#read 6, iclass 5, count 0 2006.229.20:01:39.81#ibcon#end of sib2, iclass 5, count 0 2006.229.20:01:39.81#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:01:39.81#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:01:39.81#ibcon#[25=USB\r\n] 2006.229.20:01:39.81#ibcon#*before write, iclass 5, count 0 2006.229.20:01:39.81#ibcon#enter sib2, iclass 5, count 0 2006.229.20:01:39.81#ibcon#flushed, iclass 5, count 0 2006.229.20:01:39.81#ibcon#about to write, iclass 5, count 0 2006.229.20:01:39.81#ibcon#wrote, iclass 5, count 0 2006.229.20:01:39.81#ibcon#about to read 3, iclass 5, count 0 2006.229.20:01:39.84#ibcon#read 3, iclass 5, count 0 2006.229.20:01:39.84#ibcon#about to read 4, iclass 5, count 0 2006.229.20:01:39.84#ibcon#read 4, iclass 5, count 0 2006.229.20:01:39.84#ibcon#about to read 5, iclass 5, count 0 2006.229.20:01:39.84#ibcon#read 5, iclass 5, count 0 2006.229.20:01:39.84#ibcon#about to read 6, iclass 5, count 0 2006.229.20:01:39.84#ibcon#read 6, iclass 5, count 0 2006.229.20:01:39.84#ibcon#end of sib2, iclass 5, count 0 2006.229.20:01:39.84#ibcon#*after write, iclass 5, count 0 2006.229.20:01:39.84#ibcon#*before return 0, iclass 5, count 0 2006.229.20:01:39.84#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:01:39.84#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:01:39.84#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:01:39.84#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:01:39.84$vck44/vblo=1,629.99 2006.229.20:01:39.84#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.20:01:39.84#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.20:01:39.84#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:39.84#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:01:39.84#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:01:39.84#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:01:39.84#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:01:39.84#ibcon#first serial, iclass 7, count 0 2006.229.20:01:39.84#ibcon#enter sib2, iclass 7, count 0 2006.229.20:01:39.84#ibcon#flushed, iclass 7, count 0 2006.229.20:01:39.84#ibcon#about to write, iclass 7, count 0 2006.229.20:01:39.84#ibcon#wrote, iclass 7, count 0 2006.229.20:01:39.84#ibcon#about to read 3, iclass 7, count 0 2006.229.20:01:39.86#ibcon#read 3, iclass 7, count 0 2006.229.20:01:39.86#ibcon#about to read 4, iclass 7, count 0 2006.229.20:01:39.86#ibcon#read 4, iclass 7, count 0 2006.229.20:01:39.86#ibcon#about to read 5, iclass 7, count 0 2006.229.20:01:39.86#ibcon#read 5, iclass 7, count 0 2006.229.20:01:39.86#ibcon#about to read 6, iclass 7, count 0 2006.229.20:01:39.86#ibcon#read 6, iclass 7, count 0 2006.229.20:01:39.86#ibcon#end of sib2, iclass 7, count 0 2006.229.20:01:39.86#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:01:39.86#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:01:39.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:01:39.86#ibcon#*before write, iclass 7, count 0 2006.229.20:01:39.86#ibcon#enter sib2, iclass 7, count 0 2006.229.20:01:39.86#ibcon#flushed, iclass 7, count 0 2006.229.20:01:39.86#ibcon#about to write, iclass 7, count 0 2006.229.20:01:39.86#ibcon#wrote, iclass 7, count 0 2006.229.20:01:39.86#ibcon#about to read 3, iclass 7, count 0 2006.229.20:01:39.90#ibcon#read 3, iclass 7, count 0 2006.229.20:01:39.90#ibcon#about to read 4, iclass 7, count 0 2006.229.20:01:39.90#ibcon#read 4, iclass 7, count 0 2006.229.20:01:39.90#ibcon#about to read 5, iclass 7, count 0 2006.229.20:01:39.90#ibcon#read 5, iclass 7, count 0 2006.229.20:01:39.90#ibcon#about to read 6, iclass 7, count 0 2006.229.20:01:39.90#ibcon#read 6, iclass 7, count 0 2006.229.20:01:39.90#ibcon#end of sib2, iclass 7, count 0 2006.229.20:01:39.90#ibcon#*after write, iclass 7, count 0 2006.229.20:01:39.90#ibcon#*before return 0, iclass 7, count 0 2006.229.20:01:39.90#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:01:39.90#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:01:39.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:01:39.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:01:39.90$vck44/vb=1,4 2006.229.20:01:39.90#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.20:01:39.90#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.20:01:39.90#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:39.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:01:39.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:01:39.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:01:39.90#ibcon#enter wrdev, iclass 11, count 2 2006.229.20:01:39.90#ibcon#first serial, iclass 11, count 2 2006.229.20:01:39.90#ibcon#enter sib2, iclass 11, count 2 2006.229.20:01:39.90#ibcon#flushed, iclass 11, count 2 2006.229.20:01:39.90#ibcon#about to write, iclass 11, count 2 2006.229.20:01:39.90#ibcon#wrote, iclass 11, count 2 2006.229.20:01:39.90#ibcon#about to read 3, iclass 11, count 2 2006.229.20:01:39.92#ibcon#read 3, iclass 11, count 2 2006.229.20:01:39.92#ibcon#about to read 4, iclass 11, count 2 2006.229.20:01:39.92#ibcon#read 4, iclass 11, count 2 2006.229.20:01:39.92#ibcon#about to read 5, iclass 11, count 2 2006.229.20:01:39.92#ibcon#read 5, iclass 11, count 2 2006.229.20:01:39.92#ibcon#about to read 6, iclass 11, count 2 2006.229.20:01:39.92#ibcon#read 6, iclass 11, count 2 2006.229.20:01:39.92#ibcon#end of sib2, iclass 11, count 2 2006.229.20:01:39.92#ibcon#*mode == 0, iclass 11, count 2 2006.229.20:01:39.92#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.20:01:39.92#ibcon#[27=AT01-04\r\n] 2006.229.20:01:39.92#ibcon#*before write, iclass 11, count 2 2006.229.20:01:39.92#ibcon#enter sib2, iclass 11, count 2 2006.229.20:01:39.92#ibcon#flushed, iclass 11, count 2 2006.229.20:01:39.92#ibcon#about to write, iclass 11, count 2 2006.229.20:01:39.92#ibcon#wrote, iclass 11, count 2 2006.229.20:01:39.92#ibcon#about to read 3, iclass 11, count 2 2006.229.20:01:39.95#ibcon#read 3, iclass 11, count 2 2006.229.20:01:39.95#ibcon#about to read 4, iclass 11, count 2 2006.229.20:01:39.95#ibcon#read 4, iclass 11, count 2 2006.229.20:01:39.95#ibcon#about to read 5, iclass 11, count 2 2006.229.20:01:39.95#ibcon#read 5, iclass 11, count 2 2006.229.20:01:39.95#ibcon#about to read 6, iclass 11, count 2 2006.229.20:01:39.95#ibcon#read 6, iclass 11, count 2 2006.229.20:01:39.95#ibcon#end of sib2, iclass 11, count 2 2006.229.20:01:39.95#ibcon#*after write, iclass 11, count 2 2006.229.20:01:39.95#ibcon#*before return 0, iclass 11, count 2 2006.229.20:01:39.95#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:01:39.95#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:01:39.95#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.20:01:39.95#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:39.95#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:01:40.07#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:01:40.07#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:01:40.07#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:01:40.07#ibcon#first serial, iclass 11, count 0 2006.229.20:01:40.07#ibcon#enter sib2, iclass 11, count 0 2006.229.20:01:40.07#ibcon#flushed, iclass 11, count 0 2006.229.20:01:40.07#ibcon#about to write, iclass 11, count 0 2006.229.20:01:40.07#ibcon#wrote, iclass 11, count 0 2006.229.20:01:40.07#ibcon#about to read 3, iclass 11, count 0 2006.229.20:01:40.09#ibcon#read 3, iclass 11, count 0 2006.229.20:01:40.09#ibcon#about to read 4, iclass 11, count 0 2006.229.20:01:40.09#ibcon#read 4, iclass 11, count 0 2006.229.20:01:40.09#ibcon#about to read 5, iclass 11, count 0 2006.229.20:01:40.09#ibcon#read 5, iclass 11, count 0 2006.229.20:01:40.09#ibcon#about to read 6, iclass 11, count 0 2006.229.20:01:40.09#ibcon#read 6, iclass 11, count 0 2006.229.20:01:40.09#ibcon#end of sib2, iclass 11, count 0 2006.229.20:01:40.09#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:01:40.09#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:01:40.09#ibcon#[27=USB\r\n] 2006.229.20:01:40.09#ibcon#*before write, iclass 11, count 0 2006.229.20:01:40.09#ibcon#enter sib2, iclass 11, count 0 2006.229.20:01:40.09#ibcon#flushed, iclass 11, count 0 2006.229.20:01:40.09#ibcon#about to write, iclass 11, count 0 2006.229.20:01:40.09#ibcon#wrote, iclass 11, count 0 2006.229.20:01:40.09#ibcon#about to read 3, iclass 11, count 0 2006.229.20:01:40.12#ibcon#read 3, iclass 11, count 0 2006.229.20:01:40.12#ibcon#about to read 4, iclass 11, count 0 2006.229.20:01:40.12#ibcon#read 4, iclass 11, count 0 2006.229.20:01:40.12#ibcon#about to read 5, iclass 11, count 0 2006.229.20:01:40.12#ibcon#read 5, iclass 11, count 0 2006.229.20:01:40.12#ibcon#about to read 6, iclass 11, count 0 2006.229.20:01:40.12#ibcon#read 6, iclass 11, count 0 2006.229.20:01:40.12#ibcon#end of sib2, iclass 11, count 0 2006.229.20:01:40.12#ibcon#*after write, iclass 11, count 0 2006.229.20:01:40.12#ibcon#*before return 0, iclass 11, count 0 2006.229.20:01:40.12#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:01:40.12#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:01:40.12#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:01:40.12#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:01:40.12$vck44/vblo=2,634.99 2006.229.20:01:40.12#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.20:01:40.12#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.20:01:40.12#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:40.12#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:40.12#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:40.12#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:40.12#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:01:40.12#ibcon#first serial, iclass 13, count 0 2006.229.20:01:40.12#ibcon#enter sib2, iclass 13, count 0 2006.229.20:01:40.12#ibcon#flushed, iclass 13, count 0 2006.229.20:01:40.12#ibcon#about to write, iclass 13, count 0 2006.229.20:01:40.12#ibcon#wrote, iclass 13, count 0 2006.229.20:01:40.12#ibcon#about to read 3, iclass 13, count 0 2006.229.20:01:40.14#ibcon#read 3, iclass 13, count 0 2006.229.20:01:40.14#ibcon#about to read 4, iclass 13, count 0 2006.229.20:01:40.14#ibcon#read 4, iclass 13, count 0 2006.229.20:01:40.14#ibcon#about to read 5, iclass 13, count 0 2006.229.20:01:40.14#ibcon#read 5, iclass 13, count 0 2006.229.20:01:40.14#ibcon#about to read 6, iclass 13, count 0 2006.229.20:01:40.14#ibcon#read 6, iclass 13, count 0 2006.229.20:01:40.14#ibcon#end of sib2, iclass 13, count 0 2006.229.20:01:40.14#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:01:40.14#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:01:40.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:01:40.14#ibcon#*before write, iclass 13, count 0 2006.229.20:01:40.14#ibcon#enter sib2, iclass 13, count 0 2006.229.20:01:40.14#ibcon#flushed, iclass 13, count 0 2006.229.20:01:40.14#ibcon#about to write, iclass 13, count 0 2006.229.20:01:40.14#ibcon#wrote, iclass 13, count 0 2006.229.20:01:40.14#ibcon#about to read 3, iclass 13, count 0 2006.229.20:01:40.18#ibcon#read 3, iclass 13, count 0 2006.229.20:01:40.18#ibcon#about to read 4, iclass 13, count 0 2006.229.20:01:40.18#ibcon#read 4, iclass 13, count 0 2006.229.20:01:40.18#ibcon#about to read 5, iclass 13, count 0 2006.229.20:01:40.18#ibcon#read 5, iclass 13, count 0 2006.229.20:01:40.18#ibcon#about to read 6, iclass 13, count 0 2006.229.20:01:40.18#ibcon#read 6, iclass 13, count 0 2006.229.20:01:40.18#ibcon#end of sib2, iclass 13, count 0 2006.229.20:01:40.18#ibcon#*after write, iclass 13, count 0 2006.229.20:01:40.18#ibcon#*before return 0, iclass 13, count 0 2006.229.20:01:40.18#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:40.18#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:01:40.18#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:01:40.18#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:01:40.18$vck44/vb=2,4 2006.229.20:01:40.18#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.20:01:40.18#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.20:01:40.18#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:40.18#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:40.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:40.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:40.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.20:01:40.24#ibcon#first serial, iclass 15, count 2 2006.229.20:01:40.24#ibcon#enter sib2, iclass 15, count 2 2006.229.20:01:40.24#ibcon#flushed, iclass 15, count 2 2006.229.20:01:40.24#ibcon#about to write, iclass 15, count 2 2006.229.20:01:40.24#ibcon#wrote, iclass 15, count 2 2006.229.20:01:40.24#ibcon#about to read 3, iclass 15, count 2 2006.229.20:01:40.26#ibcon#read 3, iclass 15, count 2 2006.229.20:01:40.26#ibcon#about to read 4, iclass 15, count 2 2006.229.20:01:40.26#ibcon#read 4, iclass 15, count 2 2006.229.20:01:40.26#ibcon#about to read 5, iclass 15, count 2 2006.229.20:01:40.26#ibcon#read 5, iclass 15, count 2 2006.229.20:01:40.26#ibcon#about to read 6, iclass 15, count 2 2006.229.20:01:40.26#ibcon#read 6, iclass 15, count 2 2006.229.20:01:40.26#ibcon#end of sib2, iclass 15, count 2 2006.229.20:01:40.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.20:01:40.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.20:01:40.26#ibcon#[27=AT02-04\r\n] 2006.229.20:01:40.26#ibcon#*before write, iclass 15, count 2 2006.229.20:01:40.26#ibcon#enter sib2, iclass 15, count 2 2006.229.20:01:40.26#ibcon#flushed, iclass 15, count 2 2006.229.20:01:40.26#ibcon#about to write, iclass 15, count 2 2006.229.20:01:40.26#ibcon#wrote, iclass 15, count 2 2006.229.20:01:40.26#ibcon#about to read 3, iclass 15, count 2 2006.229.20:01:40.29#ibcon#read 3, iclass 15, count 2 2006.229.20:01:40.29#ibcon#about to read 4, iclass 15, count 2 2006.229.20:01:40.29#ibcon#read 4, iclass 15, count 2 2006.229.20:01:40.29#ibcon#about to read 5, iclass 15, count 2 2006.229.20:01:40.29#ibcon#read 5, iclass 15, count 2 2006.229.20:01:40.29#ibcon#about to read 6, iclass 15, count 2 2006.229.20:01:40.29#ibcon#read 6, iclass 15, count 2 2006.229.20:01:40.29#ibcon#end of sib2, iclass 15, count 2 2006.229.20:01:40.29#ibcon#*after write, iclass 15, count 2 2006.229.20:01:40.29#ibcon#*before return 0, iclass 15, count 2 2006.229.20:01:40.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:40.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:01:40.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.20:01:40.29#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:40.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:40.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:40.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:40.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:01:40.41#ibcon#first serial, iclass 15, count 0 2006.229.20:01:40.41#ibcon#enter sib2, iclass 15, count 0 2006.229.20:01:40.41#ibcon#flushed, iclass 15, count 0 2006.229.20:01:40.41#ibcon#about to write, iclass 15, count 0 2006.229.20:01:40.41#ibcon#wrote, iclass 15, count 0 2006.229.20:01:40.41#ibcon#about to read 3, iclass 15, count 0 2006.229.20:01:40.43#ibcon#read 3, iclass 15, count 0 2006.229.20:01:40.43#ibcon#about to read 4, iclass 15, count 0 2006.229.20:01:40.43#ibcon#read 4, iclass 15, count 0 2006.229.20:01:40.43#ibcon#about to read 5, iclass 15, count 0 2006.229.20:01:40.43#ibcon#read 5, iclass 15, count 0 2006.229.20:01:40.43#ibcon#about to read 6, iclass 15, count 0 2006.229.20:01:40.43#ibcon#read 6, iclass 15, count 0 2006.229.20:01:40.43#ibcon#end of sib2, iclass 15, count 0 2006.229.20:01:40.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:01:40.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:01:40.43#ibcon#[27=USB\r\n] 2006.229.20:01:40.43#ibcon#*before write, iclass 15, count 0 2006.229.20:01:40.43#ibcon#enter sib2, iclass 15, count 0 2006.229.20:01:40.43#ibcon#flushed, iclass 15, count 0 2006.229.20:01:40.43#ibcon#about to write, iclass 15, count 0 2006.229.20:01:40.43#ibcon#wrote, iclass 15, count 0 2006.229.20:01:40.43#ibcon#about to read 3, iclass 15, count 0 2006.229.20:01:40.46#ibcon#read 3, iclass 15, count 0 2006.229.20:01:40.46#ibcon#about to read 4, iclass 15, count 0 2006.229.20:01:40.46#ibcon#read 4, iclass 15, count 0 2006.229.20:01:40.46#ibcon#about to read 5, iclass 15, count 0 2006.229.20:01:40.46#ibcon#read 5, iclass 15, count 0 2006.229.20:01:40.46#ibcon#about to read 6, iclass 15, count 0 2006.229.20:01:40.46#ibcon#read 6, iclass 15, count 0 2006.229.20:01:40.46#ibcon#end of sib2, iclass 15, count 0 2006.229.20:01:40.46#ibcon#*after write, iclass 15, count 0 2006.229.20:01:40.46#ibcon#*before return 0, iclass 15, count 0 2006.229.20:01:40.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:40.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:01:40.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:01:40.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:01:40.46$vck44/vblo=3,649.99 2006.229.20:01:40.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:01:40.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:01:40.46#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:40.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:40.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:40.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:40.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:01:40.46#ibcon#first serial, iclass 17, count 0 2006.229.20:01:40.46#ibcon#enter sib2, iclass 17, count 0 2006.229.20:01:40.46#ibcon#flushed, iclass 17, count 0 2006.229.20:01:40.46#ibcon#about to write, iclass 17, count 0 2006.229.20:01:40.46#ibcon#wrote, iclass 17, count 0 2006.229.20:01:40.46#ibcon#about to read 3, iclass 17, count 0 2006.229.20:01:40.48#ibcon#read 3, iclass 17, count 0 2006.229.20:01:40.48#ibcon#about to read 4, iclass 17, count 0 2006.229.20:01:40.48#ibcon#read 4, iclass 17, count 0 2006.229.20:01:40.48#ibcon#about to read 5, iclass 17, count 0 2006.229.20:01:40.48#ibcon#read 5, iclass 17, count 0 2006.229.20:01:40.48#ibcon#about to read 6, iclass 17, count 0 2006.229.20:01:40.48#ibcon#read 6, iclass 17, count 0 2006.229.20:01:40.48#ibcon#end of sib2, iclass 17, count 0 2006.229.20:01:40.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:01:40.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:01:40.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:01:40.48#ibcon#*before write, iclass 17, count 0 2006.229.20:01:40.48#ibcon#enter sib2, iclass 17, count 0 2006.229.20:01:40.48#ibcon#flushed, iclass 17, count 0 2006.229.20:01:40.48#ibcon#about to write, iclass 17, count 0 2006.229.20:01:40.48#ibcon#wrote, iclass 17, count 0 2006.229.20:01:40.48#ibcon#about to read 3, iclass 17, count 0 2006.229.20:01:40.52#ibcon#read 3, iclass 17, count 0 2006.229.20:01:40.52#ibcon#about to read 4, iclass 17, count 0 2006.229.20:01:40.52#ibcon#read 4, iclass 17, count 0 2006.229.20:01:40.52#ibcon#about to read 5, iclass 17, count 0 2006.229.20:01:40.52#ibcon#read 5, iclass 17, count 0 2006.229.20:01:40.52#ibcon#about to read 6, iclass 17, count 0 2006.229.20:01:40.52#ibcon#read 6, iclass 17, count 0 2006.229.20:01:40.52#ibcon#end of sib2, iclass 17, count 0 2006.229.20:01:40.52#ibcon#*after write, iclass 17, count 0 2006.229.20:01:40.52#ibcon#*before return 0, iclass 17, count 0 2006.229.20:01:40.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:40.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:01:40.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:01:40.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:01:40.52$vck44/vb=3,4 2006.229.20:01:40.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.20:01:40.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.20:01:40.52#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:40.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:40.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:40.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:40.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.20:01:40.58#ibcon#first serial, iclass 19, count 2 2006.229.20:01:40.58#ibcon#enter sib2, iclass 19, count 2 2006.229.20:01:40.58#ibcon#flushed, iclass 19, count 2 2006.229.20:01:40.58#ibcon#about to write, iclass 19, count 2 2006.229.20:01:40.58#ibcon#wrote, iclass 19, count 2 2006.229.20:01:40.58#ibcon#about to read 3, iclass 19, count 2 2006.229.20:01:40.60#ibcon#read 3, iclass 19, count 2 2006.229.20:01:40.60#ibcon#about to read 4, iclass 19, count 2 2006.229.20:01:40.60#ibcon#read 4, iclass 19, count 2 2006.229.20:01:40.60#ibcon#about to read 5, iclass 19, count 2 2006.229.20:01:40.60#ibcon#read 5, iclass 19, count 2 2006.229.20:01:40.60#ibcon#about to read 6, iclass 19, count 2 2006.229.20:01:40.60#ibcon#read 6, iclass 19, count 2 2006.229.20:01:40.60#ibcon#end of sib2, iclass 19, count 2 2006.229.20:01:40.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.20:01:40.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.20:01:40.60#ibcon#[27=AT03-04\r\n] 2006.229.20:01:40.60#ibcon#*before write, iclass 19, count 2 2006.229.20:01:40.60#ibcon#enter sib2, iclass 19, count 2 2006.229.20:01:40.60#ibcon#flushed, iclass 19, count 2 2006.229.20:01:40.60#ibcon#about to write, iclass 19, count 2 2006.229.20:01:40.60#ibcon#wrote, iclass 19, count 2 2006.229.20:01:40.60#ibcon#about to read 3, iclass 19, count 2 2006.229.20:01:40.63#ibcon#read 3, iclass 19, count 2 2006.229.20:01:40.63#ibcon#about to read 4, iclass 19, count 2 2006.229.20:01:40.63#ibcon#read 4, iclass 19, count 2 2006.229.20:01:40.63#ibcon#about to read 5, iclass 19, count 2 2006.229.20:01:40.63#ibcon#read 5, iclass 19, count 2 2006.229.20:01:40.63#ibcon#about to read 6, iclass 19, count 2 2006.229.20:01:40.63#ibcon#read 6, iclass 19, count 2 2006.229.20:01:40.63#ibcon#end of sib2, iclass 19, count 2 2006.229.20:01:40.63#ibcon#*after write, iclass 19, count 2 2006.229.20:01:40.63#ibcon#*before return 0, iclass 19, count 2 2006.229.20:01:40.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:40.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:01:40.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.20:01:40.63#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:40.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:40.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:40.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:40.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:01:40.75#ibcon#first serial, iclass 19, count 0 2006.229.20:01:40.75#ibcon#enter sib2, iclass 19, count 0 2006.229.20:01:40.75#ibcon#flushed, iclass 19, count 0 2006.229.20:01:40.75#ibcon#about to write, iclass 19, count 0 2006.229.20:01:40.75#ibcon#wrote, iclass 19, count 0 2006.229.20:01:40.75#ibcon#about to read 3, iclass 19, count 0 2006.229.20:01:40.77#ibcon#read 3, iclass 19, count 0 2006.229.20:01:40.77#ibcon#about to read 4, iclass 19, count 0 2006.229.20:01:40.77#ibcon#read 4, iclass 19, count 0 2006.229.20:01:40.77#ibcon#about to read 5, iclass 19, count 0 2006.229.20:01:40.77#ibcon#read 5, iclass 19, count 0 2006.229.20:01:40.77#ibcon#about to read 6, iclass 19, count 0 2006.229.20:01:40.77#ibcon#read 6, iclass 19, count 0 2006.229.20:01:40.77#ibcon#end of sib2, iclass 19, count 0 2006.229.20:01:40.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:01:40.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:01:40.77#ibcon#[27=USB\r\n] 2006.229.20:01:40.77#ibcon#*before write, iclass 19, count 0 2006.229.20:01:40.77#ibcon#enter sib2, iclass 19, count 0 2006.229.20:01:40.77#ibcon#flushed, iclass 19, count 0 2006.229.20:01:40.77#ibcon#about to write, iclass 19, count 0 2006.229.20:01:40.77#ibcon#wrote, iclass 19, count 0 2006.229.20:01:40.77#ibcon#about to read 3, iclass 19, count 0 2006.229.20:01:40.80#ibcon#read 3, iclass 19, count 0 2006.229.20:01:40.80#ibcon#about to read 4, iclass 19, count 0 2006.229.20:01:40.80#ibcon#read 4, iclass 19, count 0 2006.229.20:01:40.80#ibcon#about to read 5, iclass 19, count 0 2006.229.20:01:40.80#ibcon#read 5, iclass 19, count 0 2006.229.20:01:40.80#ibcon#about to read 6, iclass 19, count 0 2006.229.20:01:40.80#ibcon#read 6, iclass 19, count 0 2006.229.20:01:40.80#ibcon#end of sib2, iclass 19, count 0 2006.229.20:01:40.80#ibcon#*after write, iclass 19, count 0 2006.229.20:01:40.80#ibcon#*before return 0, iclass 19, count 0 2006.229.20:01:40.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:40.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:01:40.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:01:40.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:01:40.80$vck44/vblo=4,679.99 2006.229.20:01:40.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:01:40.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:01:40.80#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:40.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:40.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:40.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:40.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:01:40.80#ibcon#first serial, iclass 21, count 0 2006.229.20:01:40.80#ibcon#enter sib2, iclass 21, count 0 2006.229.20:01:40.80#ibcon#flushed, iclass 21, count 0 2006.229.20:01:40.80#ibcon#about to write, iclass 21, count 0 2006.229.20:01:40.80#ibcon#wrote, iclass 21, count 0 2006.229.20:01:40.80#ibcon#about to read 3, iclass 21, count 0 2006.229.20:01:40.82#ibcon#read 3, iclass 21, count 0 2006.229.20:01:40.82#ibcon#about to read 4, iclass 21, count 0 2006.229.20:01:40.82#ibcon#read 4, iclass 21, count 0 2006.229.20:01:40.82#ibcon#about to read 5, iclass 21, count 0 2006.229.20:01:40.82#ibcon#read 5, iclass 21, count 0 2006.229.20:01:40.82#ibcon#about to read 6, iclass 21, count 0 2006.229.20:01:40.82#ibcon#read 6, iclass 21, count 0 2006.229.20:01:40.82#ibcon#end of sib2, iclass 21, count 0 2006.229.20:01:40.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:01:40.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:01:40.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:01:40.82#ibcon#*before write, iclass 21, count 0 2006.229.20:01:40.82#ibcon#enter sib2, iclass 21, count 0 2006.229.20:01:40.82#ibcon#flushed, iclass 21, count 0 2006.229.20:01:40.82#ibcon#about to write, iclass 21, count 0 2006.229.20:01:40.82#ibcon#wrote, iclass 21, count 0 2006.229.20:01:40.82#ibcon#about to read 3, iclass 21, count 0 2006.229.20:01:40.86#ibcon#read 3, iclass 21, count 0 2006.229.20:01:40.86#ibcon#about to read 4, iclass 21, count 0 2006.229.20:01:40.86#ibcon#read 4, iclass 21, count 0 2006.229.20:01:40.86#ibcon#about to read 5, iclass 21, count 0 2006.229.20:01:40.86#ibcon#read 5, iclass 21, count 0 2006.229.20:01:40.86#ibcon#about to read 6, iclass 21, count 0 2006.229.20:01:40.86#ibcon#read 6, iclass 21, count 0 2006.229.20:01:40.86#ibcon#end of sib2, iclass 21, count 0 2006.229.20:01:40.86#ibcon#*after write, iclass 21, count 0 2006.229.20:01:40.86#ibcon#*before return 0, iclass 21, count 0 2006.229.20:01:40.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:40.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:01:40.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:01:40.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:01:40.86$vck44/vb=4,4 2006.229.20:01:40.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:01:40.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:01:40.86#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:40.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:40.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:40.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:40.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:01:40.92#ibcon#first serial, iclass 23, count 2 2006.229.20:01:40.92#ibcon#enter sib2, iclass 23, count 2 2006.229.20:01:40.92#ibcon#flushed, iclass 23, count 2 2006.229.20:01:40.92#ibcon#about to write, iclass 23, count 2 2006.229.20:01:40.92#ibcon#wrote, iclass 23, count 2 2006.229.20:01:40.92#ibcon#about to read 3, iclass 23, count 2 2006.229.20:01:40.94#ibcon#read 3, iclass 23, count 2 2006.229.20:01:40.94#ibcon#about to read 4, iclass 23, count 2 2006.229.20:01:40.94#ibcon#read 4, iclass 23, count 2 2006.229.20:01:40.94#ibcon#about to read 5, iclass 23, count 2 2006.229.20:01:40.94#ibcon#read 5, iclass 23, count 2 2006.229.20:01:40.94#ibcon#about to read 6, iclass 23, count 2 2006.229.20:01:40.94#ibcon#read 6, iclass 23, count 2 2006.229.20:01:40.94#ibcon#end of sib2, iclass 23, count 2 2006.229.20:01:40.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:01:40.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:01:40.94#ibcon#[27=AT04-04\r\n] 2006.229.20:01:40.94#ibcon#*before write, iclass 23, count 2 2006.229.20:01:40.94#ibcon#enter sib2, iclass 23, count 2 2006.229.20:01:40.94#ibcon#flushed, iclass 23, count 2 2006.229.20:01:40.94#ibcon#about to write, iclass 23, count 2 2006.229.20:01:40.94#ibcon#wrote, iclass 23, count 2 2006.229.20:01:40.94#ibcon#about to read 3, iclass 23, count 2 2006.229.20:01:40.97#ibcon#read 3, iclass 23, count 2 2006.229.20:01:40.97#ibcon#about to read 4, iclass 23, count 2 2006.229.20:01:40.97#ibcon#read 4, iclass 23, count 2 2006.229.20:01:40.97#ibcon#about to read 5, iclass 23, count 2 2006.229.20:01:40.97#ibcon#read 5, iclass 23, count 2 2006.229.20:01:40.97#ibcon#about to read 6, iclass 23, count 2 2006.229.20:01:40.97#ibcon#read 6, iclass 23, count 2 2006.229.20:01:40.97#ibcon#end of sib2, iclass 23, count 2 2006.229.20:01:40.97#ibcon#*after write, iclass 23, count 2 2006.229.20:01:40.97#ibcon#*before return 0, iclass 23, count 2 2006.229.20:01:40.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:40.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:01:40.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:01:40.97#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:40.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:41.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:41.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:41.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:01:41.09#ibcon#first serial, iclass 23, count 0 2006.229.20:01:41.09#ibcon#enter sib2, iclass 23, count 0 2006.229.20:01:41.09#ibcon#flushed, iclass 23, count 0 2006.229.20:01:41.09#ibcon#about to write, iclass 23, count 0 2006.229.20:01:41.09#ibcon#wrote, iclass 23, count 0 2006.229.20:01:41.09#ibcon#about to read 3, iclass 23, count 0 2006.229.20:01:41.11#ibcon#read 3, iclass 23, count 0 2006.229.20:01:41.11#ibcon#about to read 4, iclass 23, count 0 2006.229.20:01:41.11#ibcon#read 4, iclass 23, count 0 2006.229.20:01:41.11#ibcon#about to read 5, iclass 23, count 0 2006.229.20:01:41.11#ibcon#read 5, iclass 23, count 0 2006.229.20:01:41.11#ibcon#about to read 6, iclass 23, count 0 2006.229.20:01:41.11#ibcon#read 6, iclass 23, count 0 2006.229.20:01:41.11#ibcon#end of sib2, iclass 23, count 0 2006.229.20:01:41.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:01:41.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:01:41.11#ibcon#[27=USB\r\n] 2006.229.20:01:41.11#ibcon#*before write, iclass 23, count 0 2006.229.20:01:41.11#ibcon#enter sib2, iclass 23, count 0 2006.229.20:01:41.11#ibcon#flushed, iclass 23, count 0 2006.229.20:01:41.11#ibcon#about to write, iclass 23, count 0 2006.229.20:01:41.11#ibcon#wrote, iclass 23, count 0 2006.229.20:01:41.11#ibcon#about to read 3, iclass 23, count 0 2006.229.20:01:41.14#ibcon#read 3, iclass 23, count 0 2006.229.20:01:41.14#ibcon#about to read 4, iclass 23, count 0 2006.229.20:01:41.14#ibcon#read 4, iclass 23, count 0 2006.229.20:01:41.14#ibcon#about to read 5, iclass 23, count 0 2006.229.20:01:41.14#ibcon#read 5, iclass 23, count 0 2006.229.20:01:41.14#ibcon#about to read 6, iclass 23, count 0 2006.229.20:01:41.14#ibcon#read 6, iclass 23, count 0 2006.229.20:01:41.14#ibcon#end of sib2, iclass 23, count 0 2006.229.20:01:41.14#ibcon#*after write, iclass 23, count 0 2006.229.20:01:41.14#ibcon#*before return 0, iclass 23, count 0 2006.229.20:01:41.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:41.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:01:41.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:01:41.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:01:41.14$vck44/vblo=5,709.99 2006.229.20:01:41.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.20:01:41.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.20:01:41.14#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:41.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:41.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:41.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:41.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:01:41.14#ibcon#first serial, iclass 25, count 0 2006.229.20:01:41.14#ibcon#enter sib2, iclass 25, count 0 2006.229.20:01:41.14#ibcon#flushed, iclass 25, count 0 2006.229.20:01:41.14#ibcon#about to write, iclass 25, count 0 2006.229.20:01:41.14#ibcon#wrote, iclass 25, count 0 2006.229.20:01:41.14#ibcon#about to read 3, iclass 25, count 0 2006.229.20:01:41.16#ibcon#read 3, iclass 25, count 0 2006.229.20:01:41.16#ibcon#about to read 4, iclass 25, count 0 2006.229.20:01:41.16#ibcon#read 4, iclass 25, count 0 2006.229.20:01:41.16#ibcon#about to read 5, iclass 25, count 0 2006.229.20:01:41.16#ibcon#read 5, iclass 25, count 0 2006.229.20:01:41.16#ibcon#about to read 6, iclass 25, count 0 2006.229.20:01:41.16#ibcon#read 6, iclass 25, count 0 2006.229.20:01:41.16#ibcon#end of sib2, iclass 25, count 0 2006.229.20:01:41.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:01:41.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:01:41.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:01:41.16#ibcon#*before write, iclass 25, count 0 2006.229.20:01:41.16#ibcon#enter sib2, iclass 25, count 0 2006.229.20:01:41.16#ibcon#flushed, iclass 25, count 0 2006.229.20:01:41.16#ibcon#about to write, iclass 25, count 0 2006.229.20:01:41.16#ibcon#wrote, iclass 25, count 0 2006.229.20:01:41.16#ibcon#about to read 3, iclass 25, count 0 2006.229.20:01:41.20#ibcon#read 3, iclass 25, count 0 2006.229.20:01:41.20#ibcon#about to read 4, iclass 25, count 0 2006.229.20:01:41.20#ibcon#read 4, iclass 25, count 0 2006.229.20:01:41.20#ibcon#about to read 5, iclass 25, count 0 2006.229.20:01:41.20#ibcon#read 5, iclass 25, count 0 2006.229.20:01:41.20#ibcon#about to read 6, iclass 25, count 0 2006.229.20:01:41.20#ibcon#read 6, iclass 25, count 0 2006.229.20:01:41.20#ibcon#end of sib2, iclass 25, count 0 2006.229.20:01:41.20#ibcon#*after write, iclass 25, count 0 2006.229.20:01:41.20#ibcon#*before return 0, iclass 25, count 0 2006.229.20:01:41.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:41.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:01:41.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:01:41.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:01:41.20$vck44/vb=5,4 2006.229.20:01:41.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.20:01:41.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.20:01:41.20#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:41.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:41.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:41.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:41.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.20:01:41.26#ibcon#first serial, iclass 27, count 2 2006.229.20:01:41.26#ibcon#enter sib2, iclass 27, count 2 2006.229.20:01:41.26#ibcon#flushed, iclass 27, count 2 2006.229.20:01:41.26#ibcon#about to write, iclass 27, count 2 2006.229.20:01:41.26#ibcon#wrote, iclass 27, count 2 2006.229.20:01:41.26#ibcon#about to read 3, iclass 27, count 2 2006.229.20:01:41.28#ibcon#read 3, iclass 27, count 2 2006.229.20:01:41.28#ibcon#about to read 4, iclass 27, count 2 2006.229.20:01:41.28#ibcon#read 4, iclass 27, count 2 2006.229.20:01:41.28#ibcon#about to read 5, iclass 27, count 2 2006.229.20:01:41.28#ibcon#read 5, iclass 27, count 2 2006.229.20:01:41.28#ibcon#about to read 6, iclass 27, count 2 2006.229.20:01:41.28#ibcon#read 6, iclass 27, count 2 2006.229.20:01:41.28#ibcon#end of sib2, iclass 27, count 2 2006.229.20:01:41.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.20:01:41.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.20:01:41.28#ibcon#[27=AT05-04\r\n] 2006.229.20:01:41.28#ibcon#*before write, iclass 27, count 2 2006.229.20:01:41.28#ibcon#enter sib2, iclass 27, count 2 2006.229.20:01:41.28#ibcon#flushed, iclass 27, count 2 2006.229.20:01:41.28#ibcon#about to write, iclass 27, count 2 2006.229.20:01:41.28#ibcon#wrote, iclass 27, count 2 2006.229.20:01:41.28#ibcon#about to read 3, iclass 27, count 2 2006.229.20:01:41.31#ibcon#read 3, iclass 27, count 2 2006.229.20:01:41.31#ibcon#about to read 4, iclass 27, count 2 2006.229.20:01:41.31#ibcon#read 4, iclass 27, count 2 2006.229.20:01:41.31#ibcon#about to read 5, iclass 27, count 2 2006.229.20:01:41.31#ibcon#read 5, iclass 27, count 2 2006.229.20:01:41.31#ibcon#about to read 6, iclass 27, count 2 2006.229.20:01:41.31#ibcon#read 6, iclass 27, count 2 2006.229.20:01:41.31#ibcon#end of sib2, iclass 27, count 2 2006.229.20:01:41.31#ibcon#*after write, iclass 27, count 2 2006.229.20:01:41.31#ibcon#*before return 0, iclass 27, count 2 2006.229.20:01:41.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:41.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:01:41.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.20:01:41.31#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:41.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:41.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:41.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:41.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:01:41.43#ibcon#first serial, iclass 27, count 0 2006.229.20:01:41.43#ibcon#enter sib2, iclass 27, count 0 2006.229.20:01:41.43#ibcon#flushed, iclass 27, count 0 2006.229.20:01:41.43#ibcon#about to write, iclass 27, count 0 2006.229.20:01:41.43#ibcon#wrote, iclass 27, count 0 2006.229.20:01:41.43#ibcon#about to read 3, iclass 27, count 0 2006.229.20:01:41.45#ibcon#read 3, iclass 27, count 0 2006.229.20:01:41.45#ibcon#about to read 4, iclass 27, count 0 2006.229.20:01:41.45#ibcon#read 4, iclass 27, count 0 2006.229.20:01:41.45#ibcon#about to read 5, iclass 27, count 0 2006.229.20:01:41.45#ibcon#read 5, iclass 27, count 0 2006.229.20:01:41.45#ibcon#about to read 6, iclass 27, count 0 2006.229.20:01:41.45#ibcon#read 6, iclass 27, count 0 2006.229.20:01:41.45#ibcon#end of sib2, iclass 27, count 0 2006.229.20:01:41.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:01:41.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:01:41.45#ibcon#[27=USB\r\n] 2006.229.20:01:41.45#ibcon#*before write, iclass 27, count 0 2006.229.20:01:41.45#ibcon#enter sib2, iclass 27, count 0 2006.229.20:01:41.45#ibcon#flushed, iclass 27, count 0 2006.229.20:01:41.45#ibcon#about to write, iclass 27, count 0 2006.229.20:01:41.45#ibcon#wrote, iclass 27, count 0 2006.229.20:01:41.45#ibcon#about to read 3, iclass 27, count 0 2006.229.20:01:41.48#ibcon#read 3, iclass 27, count 0 2006.229.20:01:41.48#ibcon#about to read 4, iclass 27, count 0 2006.229.20:01:41.48#ibcon#read 4, iclass 27, count 0 2006.229.20:01:41.48#ibcon#about to read 5, iclass 27, count 0 2006.229.20:01:41.48#ibcon#read 5, iclass 27, count 0 2006.229.20:01:41.48#ibcon#about to read 6, iclass 27, count 0 2006.229.20:01:41.48#ibcon#read 6, iclass 27, count 0 2006.229.20:01:41.48#ibcon#end of sib2, iclass 27, count 0 2006.229.20:01:41.48#ibcon#*after write, iclass 27, count 0 2006.229.20:01:41.48#ibcon#*before return 0, iclass 27, count 0 2006.229.20:01:41.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:41.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:01:41.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:01:41.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:01:41.48$vck44/vblo=6,719.99 2006.229.20:01:41.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:01:41.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:01:41.48#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:41.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:41.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:41.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:41.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:01:41.48#ibcon#first serial, iclass 29, count 0 2006.229.20:01:41.48#ibcon#enter sib2, iclass 29, count 0 2006.229.20:01:41.48#ibcon#flushed, iclass 29, count 0 2006.229.20:01:41.48#ibcon#about to write, iclass 29, count 0 2006.229.20:01:41.48#ibcon#wrote, iclass 29, count 0 2006.229.20:01:41.48#ibcon#about to read 3, iclass 29, count 0 2006.229.20:01:41.50#ibcon#read 3, iclass 29, count 0 2006.229.20:01:41.50#ibcon#about to read 4, iclass 29, count 0 2006.229.20:01:41.50#ibcon#read 4, iclass 29, count 0 2006.229.20:01:41.50#ibcon#about to read 5, iclass 29, count 0 2006.229.20:01:41.50#ibcon#read 5, iclass 29, count 0 2006.229.20:01:41.50#ibcon#about to read 6, iclass 29, count 0 2006.229.20:01:41.50#ibcon#read 6, iclass 29, count 0 2006.229.20:01:41.50#ibcon#end of sib2, iclass 29, count 0 2006.229.20:01:41.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:01:41.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:01:41.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:01:41.50#ibcon#*before write, iclass 29, count 0 2006.229.20:01:41.50#ibcon#enter sib2, iclass 29, count 0 2006.229.20:01:41.50#ibcon#flushed, iclass 29, count 0 2006.229.20:01:41.50#ibcon#about to write, iclass 29, count 0 2006.229.20:01:41.50#ibcon#wrote, iclass 29, count 0 2006.229.20:01:41.50#ibcon#about to read 3, iclass 29, count 0 2006.229.20:01:41.54#ibcon#read 3, iclass 29, count 0 2006.229.20:01:41.54#ibcon#about to read 4, iclass 29, count 0 2006.229.20:01:41.54#ibcon#read 4, iclass 29, count 0 2006.229.20:01:41.54#ibcon#about to read 5, iclass 29, count 0 2006.229.20:01:41.54#ibcon#read 5, iclass 29, count 0 2006.229.20:01:41.54#ibcon#about to read 6, iclass 29, count 0 2006.229.20:01:41.54#ibcon#read 6, iclass 29, count 0 2006.229.20:01:41.54#ibcon#end of sib2, iclass 29, count 0 2006.229.20:01:41.54#ibcon#*after write, iclass 29, count 0 2006.229.20:01:41.54#ibcon#*before return 0, iclass 29, count 0 2006.229.20:01:41.54#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:41.54#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:01:41.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:01:41.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:01:41.54$vck44/vb=6,4 2006.229.20:01:41.54#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.20:01:41.54#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.20:01:41.54#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:41.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:41.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:41.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:41.60#ibcon#enter wrdev, iclass 31, count 2 2006.229.20:01:41.60#ibcon#first serial, iclass 31, count 2 2006.229.20:01:41.60#ibcon#enter sib2, iclass 31, count 2 2006.229.20:01:41.60#ibcon#flushed, iclass 31, count 2 2006.229.20:01:41.60#ibcon#about to write, iclass 31, count 2 2006.229.20:01:41.60#ibcon#wrote, iclass 31, count 2 2006.229.20:01:41.60#ibcon#about to read 3, iclass 31, count 2 2006.229.20:01:41.62#ibcon#read 3, iclass 31, count 2 2006.229.20:01:41.62#ibcon#about to read 4, iclass 31, count 2 2006.229.20:01:41.62#ibcon#read 4, iclass 31, count 2 2006.229.20:01:41.62#ibcon#about to read 5, iclass 31, count 2 2006.229.20:01:41.62#ibcon#read 5, iclass 31, count 2 2006.229.20:01:41.62#ibcon#about to read 6, iclass 31, count 2 2006.229.20:01:41.62#ibcon#read 6, iclass 31, count 2 2006.229.20:01:41.62#ibcon#end of sib2, iclass 31, count 2 2006.229.20:01:41.62#ibcon#*mode == 0, iclass 31, count 2 2006.229.20:01:41.62#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.20:01:41.62#ibcon#[27=AT06-04\r\n] 2006.229.20:01:41.62#ibcon#*before write, iclass 31, count 2 2006.229.20:01:41.62#ibcon#enter sib2, iclass 31, count 2 2006.229.20:01:41.62#ibcon#flushed, iclass 31, count 2 2006.229.20:01:41.62#ibcon#about to write, iclass 31, count 2 2006.229.20:01:41.62#ibcon#wrote, iclass 31, count 2 2006.229.20:01:41.62#ibcon#about to read 3, iclass 31, count 2 2006.229.20:01:41.65#ibcon#read 3, iclass 31, count 2 2006.229.20:01:41.65#ibcon#about to read 4, iclass 31, count 2 2006.229.20:01:41.65#ibcon#read 4, iclass 31, count 2 2006.229.20:01:41.65#ibcon#about to read 5, iclass 31, count 2 2006.229.20:01:41.65#ibcon#read 5, iclass 31, count 2 2006.229.20:01:41.65#ibcon#about to read 6, iclass 31, count 2 2006.229.20:01:41.65#ibcon#read 6, iclass 31, count 2 2006.229.20:01:41.65#ibcon#end of sib2, iclass 31, count 2 2006.229.20:01:41.65#ibcon#*after write, iclass 31, count 2 2006.229.20:01:41.65#ibcon#*before return 0, iclass 31, count 2 2006.229.20:01:41.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:41.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:01:41.65#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.20:01:41.65#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:41.65#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:41.77#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:41.77#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:41.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:01:41.77#ibcon#first serial, iclass 31, count 0 2006.229.20:01:41.77#ibcon#enter sib2, iclass 31, count 0 2006.229.20:01:41.77#ibcon#flushed, iclass 31, count 0 2006.229.20:01:41.77#ibcon#about to write, iclass 31, count 0 2006.229.20:01:41.77#ibcon#wrote, iclass 31, count 0 2006.229.20:01:41.77#ibcon#about to read 3, iclass 31, count 0 2006.229.20:01:41.79#ibcon#read 3, iclass 31, count 0 2006.229.20:01:41.79#ibcon#about to read 4, iclass 31, count 0 2006.229.20:01:41.79#ibcon#read 4, iclass 31, count 0 2006.229.20:01:41.79#ibcon#about to read 5, iclass 31, count 0 2006.229.20:01:41.79#ibcon#read 5, iclass 31, count 0 2006.229.20:01:41.79#ibcon#about to read 6, iclass 31, count 0 2006.229.20:01:41.79#ibcon#read 6, iclass 31, count 0 2006.229.20:01:41.79#ibcon#end of sib2, iclass 31, count 0 2006.229.20:01:41.79#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:01:41.79#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:01:41.79#ibcon#[27=USB\r\n] 2006.229.20:01:41.79#ibcon#*before write, iclass 31, count 0 2006.229.20:01:41.79#ibcon#enter sib2, iclass 31, count 0 2006.229.20:01:41.79#ibcon#flushed, iclass 31, count 0 2006.229.20:01:41.79#ibcon#about to write, iclass 31, count 0 2006.229.20:01:41.79#ibcon#wrote, iclass 31, count 0 2006.229.20:01:41.79#ibcon#about to read 3, iclass 31, count 0 2006.229.20:01:41.82#ibcon#read 3, iclass 31, count 0 2006.229.20:01:41.82#ibcon#about to read 4, iclass 31, count 0 2006.229.20:01:41.82#ibcon#read 4, iclass 31, count 0 2006.229.20:01:41.82#ibcon#about to read 5, iclass 31, count 0 2006.229.20:01:41.82#ibcon#read 5, iclass 31, count 0 2006.229.20:01:41.82#ibcon#about to read 6, iclass 31, count 0 2006.229.20:01:41.82#ibcon#read 6, iclass 31, count 0 2006.229.20:01:41.82#ibcon#end of sib2, iclass 31, count 0 2006.229.20:01:41.82#ibcon#*after write, iclass 31, count 0 2006.229.20:01:41.82#ibcon#*before return 0, iclass 31, count 0 2006.229.20:01:41.82#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:41.82#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:01:41.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:01:41.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:01:41.82$vck44/vblo=7,734.99 2006.229.20:01:41.82#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.20:01:41.82#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.20:01:41.82#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:41.82#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:41.82#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:41.82#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:41.82#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:01:41.82#ibcon#first serial, iclass 33, count 0 2006.229.20:01:41.82#ibcon#enter sib2, iclass 33, count 0 2006.229.20:01:41.82#ibcon#flushed, iclass 33, count 0 2006.229.20:01:41.82#ibcon#about to write, iclass 33, count 0 2006.229.20:01:41.82#ibcon#wrote, iclass 33, count 0 2006.229.20:01:41.82#ibcon#about to read 3, iclass 33, count 0 2006.229.20:01:41.84#ibcon#read 3, iclass 33, count 0 2006.229.20:01:41.84#ibcon#about to read 4, iclass 33, count 0 2006.229.20:01:41.84#ibcon#read 4, iclass 33, count 0 2006.229.20:01:41.84#ibcon#about to read 5, iclass 33, count 0 2006.229.20:01:41.84#ibcon#read 5, iclass 33, count 0 2006.229.20:01:41.84#ibcon#about to read 6, iclass 33, count 0 2006.229.20:01:41.84#ibcon#read 6, iclass 33, count 0 2006.229.20:01:41.84#ibcon#end of sib2, iclass 33, count 0 2006.229.20:01:41.84#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:01:41.84#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:01:41.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:01:41.84#ibcon#*before write, iclass 33, count 0 2006.229.20:01:41.84#ibcon#enter sib2, iclass 33, count 0 2006.229.20:01:41.84#ibcon#flushed, iclass 33, count 0 2006.229.20:01:41.84#ibcon#about to write, iclass 33, count 0 2006.229.20:01:41.84#ibcon#wrote, iclass 33, count 0 2006.229.20:01:41.84#ibcon#about to read 3, iclass 33, count 0 2006.229.20:01:41.88#ibcon#read 3, iclass 33, count 0 2006.229.20:01:41.88#ibcon#about to read 4, iclass 33, count 0 2006.229.20:01:41.88#ibcon#read 4, iclass 33, count 0 2006.229.20:01:41.88#ibcon#about to read 5, iclass 33, count 0 2006.229.20:01:41.88#ibcon#read 5, iclass 33, count 0 2006.229.20:01:41.88#ibcon#about to read 6, iclass 33, count 0 2006.229.20:01:41.88#ibcon#read 6, iclass 33, count 0 2006.229.20:01:41.88#ibcon#end of sib2, iclass 33, count 0 2006.229.20:01:41.88#ibcon#*after write, iclass 33, count 0 2006.229.20:01:41.88#ibcon#*before return 0, iclass 33, count 0 2006.229.20:01:41.88#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:41.88#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:01:41.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:01:41.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:01:41.88$vck44/vb=7,4 2006.229.20:01:41.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.20:01:41.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.20:01:41.88#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:41.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:41.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:41.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:41.94#ibcon#enter wrdev, iclass 35, count 2 2006.229.20:01:41.94#ibcon#first serial, iclass 35, count 2 2006.229.20:01:41.94#ibcon#enter sib2, iclass 35, count 2 2006.229.20:01:41.94#ibcon#flushed, iclass 35, count 2 2006.229.20:01:41.94#ibcon#about to write, iclass 35, count 2 2006.229.20:01:41.94#ibcon#wrote, iclass 35, count 2 2006.229.20:01:41.94#ibcon#about to read 3, iclass 35, count 2 2006.229.20:01:41.96#ibcon#read 3, iclass 35, count 2 2006.229.20:01:41.96#ibcon#about to read 4, iclass 35, count 2 2006.229.20:01:41.96#ibcon#read 4, iclass 35, count 2 2006.229.20:01:41.96#ibcon#about to read 5, iclass 35, count 2 2006.229.20:01:41.96#ibcon#read 5, iclass 35, count 2 2006.229.20:01:41.96#ibcon#about to read 6, iclass 35, count 2 2006.229.20:01:41.96#ibcon#read 6, iclass 35, count 2 2006.229.20:01:41.96#ibcon#end of sib2, iclass 35, count 2 2006.229.20:01:41.96#ibcon#*mode == 0, iclass 35, count 2 2006.229.20:01:41.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.20:01:41.96#ibcon#[27=AT07-04\r\n] 2006.229.20:01:41.96#ibcon#*before write, iclass 35, count 2 2006.229.20:01:41.96#ibcon#enter sib2, iclass 35, count 2 2006.229.20:01:41.96#ibcon#flushed, iclass 35, count 2 2006.229.20:01:41.96#ibcon#about to write, iclass 35, count 2 2006.229.20:01:41.96#ibcon#wrote, iclass 35, count 2 2006.229.20:01:41.96#ibcon#about to read 3, iclass 35, count 2 2006.229.20:01:41.99#ibcon#read 3, iclass 35, count 2 2006.229.20:01:41.99#ibcon#about to read 4, iclass 35, count 2 2006.229.20:01:41.99#ibcon#read 4, iclass 35, count 2 2006.229.20:01:41.99#ibcon#about to read 5, iclass 35, count 2 2006.229.20:01:41.99#ibcon#read 5, iclass 35, count 2 2006.229.20:01:41.99#ibcon#about to read 6, iclass 35, count 2 2006.229.20:01:41.99#ibcon#read 6, iclass 35, count 2 2006.229.20:01:41.99#ibcon#end of sib2, iclass 35, count 2 2006.229.20:01:41.99#ibcon#*after write, iclass 35, count 2 2006.229.20:01:41.99#ibcon#*before return 0, iclass 35, count 2 2006.229.20:01:41.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:41.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:01:41.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.20:01:41.99#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:41.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:42.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:42.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:42.11#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:01:42.11#ibcon#first serial, iclass 35, count 0 2006.229.20:01:42.11#ibcon#enter sib2, iclass 35, count 0 2006.229.20:01:42.11#ibcon#flushed, iclass 35, count 0 2006.229.20:01:42.11#ibcon#about to write, iclass 35, count 0 2006.229.20:01:42.11#ibcon#wrote, iclass 35, count 0 2006.229.20:01:42.11#ibcon#about to read 3, iclass 35, count 0 2006.229.20:01:42.13#ibcon#read 3, iclass 35, count 0 2006.229.20:01:42.13#ibcon#about to read 4, iclass 35, count 0 2006.229.20:01:42.13#ibcon#read 4, iclass 35, count 0 2006.229.20:01:42.13#ibcon#about to read 5, iclass 35, count 0 2006.229.20:01:42.13#ibcon#read 5, iclass 35, count 0 2006.229.20:01:42.13#ibcon#about to read 6, iclass 35, count 0 2006.229.20:01:42.13#ibcon#read 6, iclass 35, count 0 2006.229.20:01:42.13#ibcon#end of sib2, iclass 35, count 0 2006.229.20:01:42.13#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:01:42.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:01:42.13#ibcon#[27=USB\r\n] 2006.229.20:01:42.13#ibcon#*before write, iclass 35, count 0 2006.229.20:01:42.13#ibcon#enter sib2, iclass 35, count 0 2006.229.20:01:42.13#ibcon#flushed, iclass 35, count 0 2006.229.20:01:42.13#ibcon#about to write, iclass 35, count 0 2006.229.20:01:42.13#ibcon#wrote, iclass 35, count 0 2006.229.20:01:42.13#ibcon#about to read 3, iclass 35, count 0 2006.229.20:01:42.16#ibcon#read 3, iclass 35, count 0 2006.229.20:01:42.16#ibcon#about to read 4, iclass 35, count 0 2006.229.20:01:42.16#ibcon#read 4, iclass 35, count 0 2006.229.20:01:42.16#ibcon#about to read 5, iclass 35, count 0 2006.229.20:01:42.16#ibcon#read 5, iclass 35, count 0 2006.229.20:01:42.16#ibcon#about to read 6, iclass 35, count 0 2006.229.20:01:42.16#ibcon#read 6, iclass 35, count 0 2006.229.20:01:42.16#ibcon#end of sib2, iclass 35, count 0 2006.229.20:01:42.16#ibcon#*after write, iclass 35, count 0 2006.229.20:01:42.16#ibcon#*before return 0, iclass 35, count 0 2006.229.20:01:42.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:42.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:01:42.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:01:42.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:01:42.16$vck44/vblo=8,744.99 2006.229.20:01:42.16#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.20:01:42.16#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.20:01:42.16#ibcon#ireg 17 cls_cnt 0 2006.229.20:01:42.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:42.16#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:42.16#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:42.16#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:01:42.16#ibcon#first serial, iclass 37, count 0 2006.229.20:01:42.16#ibcon#enter sib2, iclass 37, count 0 2006.229.20:01:42.16#ibcon#flushed, iclass 37, count 0 2006.229.20:01:42.16#ibcon#about to write, iclass 37, count 0 2006.229.20:01:42.16#ibcon#wrote, iclass 37, count 0 2006.229.20:01:42.16#ibcon#about to read 3, iclass 37, count 0 2006.229.20:01:42.18#ibcon#read 3, iclass 37, count 0 2006.229.20:01:42.18#ibcon#about to read 4, iclass 37, count 0 2006.229.20:01:42.18#ibcon#read 4, iclass 37, count 0 2006.229.20:01:42.18#ibcon#about to read 5, iclass 37, count 0 2006.229.20:01:42.18#ibcon#read 5, iclass 37, count 0 2006.229.20:01:42.18#ibcon#about to read 6, iclass 37, count 0 2006.229.20:01:42.18#ibcon#read 6, iclass 37, count 0 2006.229.20:01:42.18#ibcon#end of sib2, iclass 37, count 0 2006.229.20:01:42.18#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:01:42.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:01:42.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:01:42.18#ibcon#*before write, iclass 37, count 0 2006.229.20:01:42.18#ibcon#enter sib2, iclass 37, count 0 2006.229.20:01:42.18#ibcon#flushed, iclass 37, count 0 2006.229.20:01:42.18#ibcon#about to write, iclass 37, count 0 2006.229.20:01:42.18#ibcon#wrote, iclass 37, count 0 2006.229.20:01:42.18#ibcon#about to read 3, iclass 37, count 0 2006.229.20:01:42.22#ibcon#read 3, iclass 37, count 0 2006.229.20:01:42.22#ibcon#about to read 4, iclass 37, count 0 2006.229.20:01:42.22#ibcon#read 4, iclass 37, count 0 2006.229.20:01:42.22#ibcon#about to read 5, iclass 37, count 0 2006.229.20:01:42.22#ibcon#read 5, iclass 37, count 0 2006.229.20:01:42.22#ibcon#about to read 6, iclass 37, count 0 2006.229.20:01:42.22#ibcon#read 6, iclass 37, count 0 2006.229.20:01:42.22#ibcon#end of sib2, iclass 37, count 0 2006.229.20:01:42.22#ibcon#*after write, iclass 37, count 0 2006.229.20:01:42.22#ibcon#*before return 0, iclass 37, count 0 2006.229.20:01:42.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:42.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:01:42.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:01:42.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:01:42.22$vck44/vb=8,4 2006.229.20:01:42.22#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.20:01:42.22#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.20:01:42.22#ibcon#ireg 11 cls_cnt 2 2006.229.20:01:42.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:42.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:42.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:42.28#ibcon#enter wrdev, iclass 39, count 2 2006.229.20:01:42.28#ibcon#first serial, iclass 39, count 2 2006.229.20:01:42.28#ibcon#enter sib2, iclass 39, count 2 2006.229.20:01:42.28#ibcon#flushed, iclass 39, count 2 2006.229.20:01:42.28#ibcon#about to write, iclass 39, count 2 2006.229.20:01:42.28#ibcon#wrote, iclass 39, count 2 2006.229.20:01:42.28#ibcon#about to read 3, iclass 39, count 2 2006.229.20:01:42.30#ibcon#read 3, iclass 39, count 2 2006.229.20:01:42.30#ibcon#about to read 4, iclass 39, count 2 2006.229.20:01:42.30#ibcon#read 4, iclass 39, count 2 2006.229.20:01:42.30#ibcon#about to read 5, iclass 39, count 2 2006.229.20:01:42.30#ibcon#read 5, iclass 39, count 2 2006.229.20:01:42.30#ibcon#about to read 6, iclass 39, count 2 2006.229.20:01:42.30#ibcon#read 6, iclass 39, count 2 2006.229.20:01:42.30#ibcon#end of sib2, iclass 39, count 2 2006.229.20:01:42.30#ibcon#*mode == 0, iclass 39, count 2 2006.229.20:01:42.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.20:01:42.30#ibcon#[27=AT08-04\r\n] 2006.229.20:01:42.30#ibcon#*before write, iclass 39, count 2 2006.229.20:01:42.30#ibcon#enter sib2, iclass 39, count 2 2006.229.20:01:42.30#ibcon#flushed, iclass 39, count 2 2006.229.20:01:42.30#ibcon#about to write, iclass 39, count 2 2006.229.20:01:42.30#ibcon#wrote, iclass 39, count 2 2006.229.20:01:42.30#ibcon#about to read 3, iclass 39, count 2 2006.229.20:01:42.33#ibcon#read 3, iclass 39, count 2 2006.229.20:01:42.33#ibcon#about to read 4, iclass 39, count 2 2006.229.20:01:42.33#ibcon#read 4, iclass 39, count 2 2006.229.20:01:42.33#ibcon#about to read 5, iclass 39, count 2 2006.229.20:01:42.33#ibcon#read 5, iclass 39, count 2 2006.229.20:01:42.33#ibcon#about to read 6, iclass 39, count 2 2006.229.20:01:42.33#ibcon#read 6, iclass 39, count 2 2006.229.20:01:42.33#ibcon#end of sib2, iclass 39, count 2 2006.229.20:01:42.33#ibcon#*after write, iclass 39, count 2 2006.229.20:01:42.33#ibcon#*before return 0, iclass 39, count 2 2006.229.20:01:42.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:42.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:01:42.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.20:01:42.33#ibcon#ireg 7 cls_cnt 0 2006.229.20:01:42.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:42.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:42.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:42.45#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:01:42.45#ibcon#first serial, iclass 39, count 0 2006.229.20:01:42.45#ibcon#enter sib2, iclass 39, count 0 2006.229.20:01:42.45#ibcon#flushed, iclass 39, count 0 2006.229.20:01:42.45#ibcon#about to write, iclass 39, count 0 2006.229.20:01:42.45#ibcon#wrote, iclass 39, count 0 2006.229.20:01:42.45#ibcon#about to read 3, iclass 39, count 0 2006.229.20:01:42.47#ibcon#read 3, iclass 39, count 0 2006.229.20:01:42.47#ibcon#about to read 4, iclass 39, count 0 2006.229.20:01:42.47#ibcon#read 4, iclass 39, count 0 2006.229.20:01:42.47#ibcon#about to read 5, iclass 39, count 0 2006.229.20:01:42.47#ibcon#read 5, iclass 39, count 0 2006.229.20:01:42.47#ibcon#about to read 6, iclass 39, count 0 2006.229.20:01:42.47#ibcon#read 6, iclass 39, count 0 2006.229.20:01:42.47#ibcon#end of sib2, iclass 39, count 0 2006.229.20:01:42.47#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:01:42.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:01:42.47#ibcon#[27=USB\r\n] 2006.229.20:01:42.47#ibcon#*before write, iclass 39, count 0 2006.229.20:01:42.47#ibcon#enter sib2, iclass 39, count 0 2006.229.20:01:42.47#ibcon#flushed, iclass 39, count 0 2006.229.20:01:42.47#ibcon#about to write, iclass 39, count 0 2006.229.20:01:42.47#ibcon#wrote, iclass 39, count 0 2006.229.20:01:42.47#ibcon#about to read 3, iclass 39, count 0 2006.229.20:01:42.50#ibcon#read 3, iclass 39, count 0 2006.229.20:01:42.50#ibcon#about to read 4, iclass 39, count 0 2006.229.20:01:42.50#ibcon#read 4, iclass 39, count 0 2006.229.20:01:42.50#ibcon#about to read 5, iclass 39, count 0 2006.229.20:01:42.50#ibcon#read 5, iclass 39, count 0 2006.229.20:01:42.50#ibcon#about to read 6, iclass 39, count 0 2006.229.20:01:42.50#ibcon#read 6, iclass 39, count 0 2006.229.20:01:42.50#ibcon#end of sib2, iclass 39, count 0 2006.229.20:01:42.50#ibcon#*after write, iclass 39, count 0 2006.229.20:01:42.50#ibcon#*before return 0, iclass 39, count 0 2006.229.20:01:42.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:42.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:01:42.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:01:42.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:01:42.50$vck44/vabw=wide 2006.229.20:01:42.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.20:01:42.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.20:01:42.50#ibcon#ireg 8 cls_cnt 0 2006.229.20:01:42.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:42.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:42.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:42.50#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:01:42.50#ibcon#first serial, iclass 3, count 0 2006.229.20:01:42.50#ibcon#enter sib2, iclass 3, count 0 2006.229.20:01:42.50#ibcon#flushed, iclass 3, count 0 2006.229.20:01:42.50#ibcon#about to write, iclass 3, count 0 2006.229.20:01:42.50#ibcon#wrote, iclass 3, count 0 2006.229.20:01:42.50#ibcon#about to read 3, iclass 3, count 0 2006.229.20:01:42.52#ibcon#read 3, iclass 3, count 0 2006.229.20:01:42.52#ibcon#about to read 4, iclass 3, count 0 2006.229.20:01:42.52#ibcon#read 4, iclass 3, count 0 2006.229.20:01:42.52#ibcon#about to read 5, iclass 3, count 0 2006.229.20:01:42.52#ibcon#read 5, iclass 3, count 0 2006.229.20:01:42.52#ibcon#about to read 6, iclass 3, count 0 2006.229.20:01:42.52#ibcon#read 6, iclass 3, count 0 2006.229.20:01:42.52#ibcon#end of sib2, iclass 3, count 0 2006.229.20:01:42.52#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:01:42.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:01:42.52#ibcon#[25=BW32\r\n] 2006.229.20:01:42.52#ibcon#*before write, iclass 3, count 0 2006.229.20:01:42.52#ibcon#enter sib2, iclass 3, count 0 2006.229.20:01:42.52#ibcon#flushed, iclass 3, count 0 2006.229.20:01:42.52#ibcon#about to write, iclass 3, count 0 2006.229.20:01:42.52#ibcon#wrote, iclass 3, count 0 2006.229.20:01:42.52#ibcon#about to read 3, iclass 3, count 0 2006.229.20:01:42.55#ibcon#read 3, iclass 3, count 0 2006.229.20:01:42.55#ibcon#about to read 4, iclass 3, count 0 2006.229.20:01:42.55#ibcon#read 4, iclass 3, count 0 2006.229.20:01:42.55#ibcon#about to read 5, iclass 3, count 0 2006.229.20:01:42.55#ibcon#read 5, iclass 3, count 0 2006.229.20:01:42.55#ibcon#about to read 6, iclass 3, count 0 2006.229.20:01:42.55#ibcon#read 6, iclass 3, count 0 2006.229.20:01:42.55#ibcon#end of sib2, iclass 3, count 0 2006.229.20:01:42.55#ibcon#*after write, iclass 3, count 0 2006.229.20:01:42.55#ibcon#*before return 0, iclass 3, count 0 2006.229.20:01:42.55#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:42.55#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:01:42.55#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:01:42.55#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:01:42.55$vck44/vbbw=wide 2006.229.20:01:42.55#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.20:01:42.55#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.20:01:42.55#ibcon#ireg 8 cls_cnt 0 2006.229.20:01:42.55#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:01:42.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:01:42.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:01:42.62#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:01:42.62#ibcon#first serial, iclass 5, count 0 2006.229.20:01:42.62#ibcon#enter sib2, iclass 5, count 0 2006.229.20:01:42.62#ibcon#flushed, iclass 5, count 0 2006.229.20:01:42.62#ibcon#about to write, iclass 5, count 0 2006.229.20:01:42.62#ibcon#wrote, iclass 5, count 0 2006.229.20:01:42.62#ibcon#about to read 3, iclass 5, count 0 2006.229.20:01:42.64#ibcon#read 3, iclass 5, count 0 2006.229.20:01:42.64#ibcon#about to read 4, iclass 5, count 0 2006.229.20:01:42.64#ibcon#read 4, iclass 5, count 0 2006.229.20:01:42.64#ibcon#about to read 5, iclass 5, count 0 2006.229.20:01:42.64#ibcon#read 5, iclass 5, count 0 2006.229.20:01:42.64#ibcon#about to read 6, iclass 5, count 0 2006.229.20:01:42.64#ibcon#read 6, iclass 5, count 0 2006.229.20:01:42.64#ibcon#end of sib2, iclass 5, count 0 2006.229.20:01:42.64#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:01:42.64#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:01:42.64#ibcon#[27=BW32\r\n] 2006.229.20:01:42.64#ibcon#*before write, iclass 5, count 0 2006.229.20:01:42.64#ibcon#enter sib2, iclass 5, count 0 2006.229.20:01:42.64#ibcon#flushed, iclass 5, count 0 2006.229.20:01:42.64#ibcon#about to write, iclass 5, count 0 2006.229.20:01:42.64#ibcon#wrote, iclass 5, count 0 2006.229.20:01:42.64#ibcon#about to read 3, iclass 5, count 0 2006.229.20:01:42.67#ibcon#read 3, iclass 5, count 0 2006.229.20:01:42.67#ibcon#about to read 4, iclass 5, count 0 2006.229.20:01:42.67#ibcon#read 4, iclass 5, count 0 2006.229.20:01:42.67#ibcon#about to read 5, iclass 5, count 0 2006.229.20:01:42.67#ibcon#read 5, iclass 5, count 0 2006.229.20:01:42.67#ibcon#about to read 6, iclass 5, count 0 2006.229.20:01:42.67#ibcon#read 6, iclass 5, count 0 2006.229.20:01:42.67#ibcon#end of sib2, iclass 5, count 0 2006.229.20:01:42.67#ibcon#*after write, iclass 5, count 0 2006.229.20:01:42.67#ibcon#*before return 0, iclass 5, count 0 2006.229.20:01:42.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:01:42.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:01:42.67#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:01:42.67#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:01:42.67$setupk4/ifdk4 2006.229.20:01:42.67$ifdk4/lo= 2006.229.20:01:42.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:01:42.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:01:42.67$ifdk4/patch= 2006.229.20:01:42.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:01:42.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:01:42.67$setupk4/!*+20s 2006.229.20:01:45.81#abcon#<5=/07 1.2 3.0 26.061001001.7\r\n> 2006.229.20:01:45.83#abcon#{5=INTERFACE CLEAR} 2006.229.20:01:45.89#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:01:55.98#abcon#<5=/07 1.2 3.0 26.071001001.7\r\n> 2006.229.20:01:56.00#abcon#{5=INTERFACE CLEAR} 2006.229.20:01:56.06#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:01:57.17$setupk4/"tpicd 2006.229.20:01:57.17$setupk4/echo=off 2006.229.20:01:57.17$setupk4/xlog=off 2006.229.20:01:57.17:!2006.229.20:08:11 2006.229.20:02:24.14#trakl#Source acquired 2006.229.20:02:26.14#flagr#flagr/antenna,acquired 2006.229.20:08:11.00:preob 2006.229.20:08:12.14/onsource/TRACKING 2006.229.20:08:12.14:!2006.229.20:08:21 2006.229.20:08:21.00:"tape 2006.229.20:08:21.00:"st=record 2006.229.20:08:21.00:data_valid=on 2006.229.20:08:21.00:midob 2006.229.20:08:21.14/onsource/TRACKING 2006.229.20:08:21.14/wx/26.04,1001.7,100 2006.229.20:08:21.27/cable/+6.4209E-03 2006.229.20:08:22.36/va/01,08,usb,yes,34,36 2006.229.20:08:22.36/va/02,07,usb,yes,37,37 2006.229.20:08:22.36/va/03,06,usb,yes,45,48 2006.229.20:08:22.36/va/04,07,usb,yes,38,40 2006.229.20:08:22.36/va/05,04,usb,yes,34,34 2006.229.20:08:22.36/va/06,04,usb,yes,38,38 2006.229.20:08:22.36/va/07,05,usb,yes,34,34 2006.229.20:08:22.36/va/08,06,usb,yes,25,30 2006.229.20:08:22.59/valo/01,524.99,yes,locked 2006.229.20:08:22.59/valo/02,534.99,yes,locked 2006.229.20:08:22.59/valo/03,564.99,yes,locked 2006.229.20:08:22.59/valo/04,624.99,yes,locked 2006.229.20:08:22.59/valo/05,734.99,yes,locked 2006.229.20:08:22.59/valo/06,814.99,yes,locked 2006.229.20:08:22.59/valo/07,864.99,yes,locked 2006.229.20:08:22.59/valo/08,884.99,yes,locked 2006.229.20:08:23.68/vb/01,04,usb,yes,33,30 2006.229.20:08:23.68/vb/02,04,usb,yes,35,35 2006.229.20:08:23.68/vb/03,04,usb,yes,32,35 2006.229.20:08:23.68/vb/04,04,usb,yes,37,36 2006.229.20:08:23.68/vb/05,04,usb,yes,29,31 2006.229.20:08:23.68/vb/06,04,usb,yes,34,29 2006.229.20:08:23.68/vb/07,04,usb,yes,33,33 2006.229.20:08:23.68/vb/08,04,usb,yes,31,34 2006.229.20:08:23.91/vblo/01,629.99,yes,locked 2006.229.20:08:23.91/vblo/02,634.99,yes,locked 2006.229.20:08:23.91/vblo/03,649.99,yes,locked 2006.229.20:08:23.91/vblo/04,679.99,yes,locked 2006.229.20:08:23.91/vblo/05,709.99,yes,locked 2006.229.20:08:23.91/vblo/06,719.99,yes,locked 2006.229.20:08:23.91/vblo/07,734.99,yes,locked 2006.229.20:08:23.91/vblo/08,744.99,yes,locked 2006.229.20:08:24.06/vabw/8 2006.229.20:08:24.21/vbbw/8 2006.229.20:08:24.33/xfe/off,on,12.5 2006.229.20:08:24.70/ifatt/23,28,28,28 2006.229.20:08:25.08/fmout-gps/S +4.50E-07 2006.229.20:08:25.12:!2006.229.20:09:01 2006.229.20:09:01.00:data_valid=off 2006.229.20:09:01.00:"et 2006.229.20:09:01.00:!+3s 2006.229.20:09:04.01:"tape 2006.229.20:09:04.01:postob 2006.229.20:09:04.10/cable/+6.4212E-03 2006.229.20:09:04.10/wx/26.03,1001.8,100 2006.229.20:09:05.08/fmout-gps/S +4.50E-07 2006.229.20:09:05.08:scan_name=229-2015,jd0608,40 2006.229.20:09:05.08:source=2145+067,214805.46,065738.6,2000.0,cw 2006.229.20:09:06.14#flagr#flagr/antenna,new-source 2006.229.20:09:06.14:checkk5 2006.229.20:09:06.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:09:06.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:09:07.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:09:07.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:09:08.12/chk_obsdata//k5ts1/T2292008??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:09:08.52/chk_obsdata//k5ts2/T2292008??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:09:08.93/chk_obsdata//k5ts3/T2292008??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:09:09.33/chk_obsdata//k5ts4/T2292008??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:09:10.07/k5log//k5ts1_log_newline 2006.229.20:09:10.79/k5log//k5ts2_log_newline 2006.229.20:09:11.49/k5log//k5ts3_log_newline 2006.229.20:09:12.20/k5log//k5ts4_log_newline 2006.229.20:09:12.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:09:12.22:setupk4=1 2006.229.20:09:12.22$setupk4/echo=on 2006.229.20:09:12.22$setupk4/pcalon 2006.229.20:09:12.22$pcalon/"no phase cal control is implemented here 2006.229.20:09:12.22$setupk4/"tpicd=stop 2006.229.20:09:12.22$setupk4/"rec=synch_on 2006.229.20:09:12.22$setupk4/"rec_mode=128 2006.229.20:09:12.22$setupk4/!* 2006.229.20:09:12.22$setupk4/recpk4 2006.229.20:09:12.22$recpk4/recpatch= 2006.229.20:09:12.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:09:12.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:09:12.22$setupk4/vck44 2006.229.20:09:12.22$vck44/valo=1,524.99 2006.229.20:09:12.22#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.20:09:12.22#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.20:09:12.22#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:12.22#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:12.22#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:12.22#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:12.22#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:09:12.22#ibcon#first serial, iclass 6, count 0 2006.229.20:09:12.22#ibcon#enter sib2, iclass 6, count 0 2006.229.20:09:12.22#ibcon#flushed, iclass 6, count 0 2006.229.20:09:12.22#ibcon#about to write, iclass 6, count 0 2006.229.20:09:12.22#ibcon#wrote, iclass 6, count 0 2006.229.20:09:12.22#ibcon#about to read 3, iclass 6, count 0 2006.229.20:09:12.24#ibcon#read 3, iclass 6, count 0 2006.229.20:09:12.24#ibcon#about to read 4, iclass 6, count 0 2006.229.20:09:12.24#ibcon#read 4, iclass 6, count 0 2006.229.20:09:12.24#ibcon#about to read 5, iclass 6, count 0 2006.229.20:09:12.24#ibcon#read 5, iclass 6, count 0 2006.229.20:09:12.24#ibcon#about to read 6, iclass 6, count 0 2006.229.20:09:12.24#ibcon#read 6, iclass 6, count 0 2006.229.20:09:12.24#ibcon#end of sib2, iclass 6, count 0 2006.229.20:09:12.24#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:09:12.24#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:09:12.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:09:12.24#ibcon#*before write, iclass 6, count 0 2006.229.20:09:12.24#ibcon#enter sib2, iclass 6, count 0 2006.229.20:09:12.24#ibcon#flushed, iclass 6, count 0 2006.229.20:09:12.24#ibcon#about to write, iclass 6, count 0 2006.229.20:09:12.24#ibcon#wrote, iclass 6, count 0 2006.229.20:09:12.24#ibcon#about to read 3, iclass 6, count 0 2006.229.20:09:12.29#ibcon#read 3, iclass 6, count 0 2006.229.20:09:12.29#ibcon#about to read 4, iclass 6, count 0 2006.229.20:09:12.29#ibcon#read 4, iclass 6, count 0 2006.229.20:09:12.29#ibcon#about to read 5, iclass 6, count 0 2006.229.20:09:12.29#ibcon#read 5, iclass 6, count 0 2006.229.20:09:12.29#ibcon#about to read 6, iclass 6, count 0 2006.229.20:09:12.29#ibcon#read 6, iclass 6, count 0 2006.229.20:09:12.29#ibcon#end of sib2, iclass 6, count 0 2006.229.20:09:12.29#ibcon#*after write, iclass 6, count 0 2006.229.20:09:12.29#ibcon#*before return 0, iclass 6, count 0 2006.229.20:09:12.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:12.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:12.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:09:12.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:09:12.29$vck44/va=1,8 2006.229.20:09:12.29#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.20:09:12.29#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.20:09:12.29#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:12.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:12.29#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:12.29#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:12.29#ibcon#enter wrdev, iclass 10, count 2 2006.229.20:09:12.29#ibcon#first serial, iclass 10, count 2 2006.229.20:09:12.29#ibcon#enter sib2, iclass 10, count 2 2006.229.20:09:12.29#ibcon#flushed, iclass 10, count 2 2006.229.20:09:12.29#ibcon#about to write, iclass 10, count 2 2006.229.20:09:12.29#ibcon#wrote, iclass 10, count 2 2006.229.20:09:12.29#ibcon#about to read 3, iclass 10, count 2 2006.229.20:09:12.31#ibcon#read 3, iclass 10, count 2 2006.229.20:09:12.31#ibcon#about to read 4, iclass 10, count 2 2006.229.20:09:12.31#ibcon#read 4, iclass 10, count 2 2006.229.20:09:12.31#ibcon#about to read 5, iclass 10, count 2 2006.229.20:09:12.31#ibcon#read 5, iclass 10, count 2 2006.229.20:09:12.31#ibcon#about to read 6, iclass 10, count 2 2006.229.20:09:12.31#ibcon#read 6, iclass 10, count 2 2006.229.20:09:12.31#ibcon#end of sib2, iclass 10, count 2 2006.229.20:09:12.31#ibcon#*mode == 0, iclass 10, count 2 2006.229.20:09:12.31#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.20:09:12.31#ibcon#[25=AT01-08\r\n] 2006.229.20:09:12.31#ibcon#*before write, iclass 10, count 2 2006.229.20:09:12.31#ibcon#enter sib2, iclass 10, count 2 2006.229.20:09:12.31#ibcon#flushed, iclass 10, count 2 2006.229.20:09:12.31#ibcon#about to write, iclass 10, count 2 2006.229.20:09:12.31#ibcon#wrote, iclass 10, count 2 2006.229.20:09:12.31#ibcon#about to read 3, iclass 10, count 2 2006.229.20:09:12.34#ibcon#read 3, iclass 10, count 2 2006.229.20:09:12.34#ibcon#about to read 4, iclass 10, count 2 2006.229.20:09:12.34#ibcon#read 4, iclass 10, count 2 2006.229.20:09:12.34#ibcon#about to read 5, iclass 10, count 2 2006.229.20:09:12.34#ibcon#read 5, iclass 10, count 2 2006.229.20:09:12.34#ibcon#about to read 6, iclass 10, count 2 2006.229.20:09:12.34#ibcon#read 6, iclass 10, count 2 2006.229.20:09:12.34#ibcon#end of sib2, iclass 10, count 2 2006.229.20:09:12.34#ibcon#*after write, iclass 10, count 2 2006.229.20:09:12.34#ibcon#*before return 0, iclass 10, count 2 2006.229.20:09:12.34#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:12.34#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:12.34#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.20:09:12.34#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:12.34#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:12.46#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:12.46#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:12.46#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:09:12.46#ibcon#first serial, iclass 10, count 0 2006.229.20:09:12.46#ibcon#enter sib2, iclass 10, count 0 2006.229.20:09:12.46#ibcon#flushed, iclass 10, count 0 2006.229.20:09:12.46#ibcon#about to write, iclass 10, count 0 2006.229.20:09:12.46#ibcon#wrote, iclass 10, count 0 2006.229.20:09:12.46#ibcon#about to read 3, iclass 10, count 0 2006.229.20:09:12.48#ibcon#read 3, iclass 10, count 0 2006.229.20:09:12.48#ibcon#about to read 4, iclass 10, count 0 2006.229.20:09:12.48#ibcon#read 4, iclass 10, count 0 2006.229.20:09:12.48#ibcon#about to read 5, iclass 10, count 0 2006.229.20:09:12.48#ibcon#read 5, iclass 10, count 0 2006.229.20:09:12.48#ibcon#about to read 6, iclass 10, count 0 2006.229.20:09:12.48#ibcon#read 6, iclass 10, count 0 2006.229.20:09:12.48#ibcon#end of sib2, iclass 10, count 0 2006.229.20:09:12.48#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:09:12.48#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:09:12.48#ibcon#[25=USB\r\n] 2006.229.20:09:12.48#ibcon#*before write, iclass 10, count 0 2006.229.20:09:12.48#ibcon#enter sib2, iclass 10, count 0 2006.229.20:09:12.48#ibcon#flushed, iclass 10, count 0 2006.229.20:09:12.48#ibcon#about to write, iclass 10, count 0 2006.229.20:09:12.48#ibcon#wrote, iclass 10, count 0 2006.229.20:09:12.48#ibcon#about to read 3, iclass 10, count 0 2006.229.20:09:12.51#ibcon#read 3, iclass 10, count 0 2006.229.20:09:12.51#ibcon#about to read 4, iclass 10, count 0 2006.229.20:09:12.51#ibcon#read 4, iclass 10, count 0 2006.229.20:09:12.51#ibcon#about to read 5, iclass 10, count 0 2006.229.20:09:12.51#ibcon#read 5, iclass 10, count 0 2006.229.20:09:12.51#ibcon#about to read 6, iclass 10, count 0 2006.229.20:09:12.51#ibcon#read 6, iclass 10, count 0 2006.229.20:09:12.51#ibcon#end of sib2, iclass 10, count 0 2006.229.20:09:12.51#ibcon#*after write, iclass 10, count 0 2006.229.20:09:12.51#ibcon#*before return 0, iclass 10, count 0 2006.229.20:09:12.51#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:12.51#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:12.51#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:09:12.51#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:09:12.51$vck44/valo=2,534.99 2006.229.20:09:12.51#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.20:09:12.51#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.20:09:12.51#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:12.51#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:12.51#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:12.51#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:12.51#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:09:12.51#ibcon#first serial, iclass 12, count 0 2006.229.20:09:12.51#ibcon#enter sib2, iclass 12, count 0 2006.229.20:09:12.51#ibcon#flushed, iclass 12, count 0 2006.229.20:09:12.51#ibcon#about to write, iclass 12, count 0 2006.229.20:09:12.51#ibcon#wrote, iclass 12, count 0 2006.229.20:09:12.51#ibcon#about to read 3, iclass 12, count 0 2006.229.20:09:12.53#ibcon#read 3, iclass 12, count 0 2006.229.20:09:12.53#ibcon#about to read 4, iclass 12, count 0 2006.229.20:09:12.53#ibcon#read 4, iclass 12, count 0 2006.229.20:09:12.53#ibcon#about to read 5, iclass 12, count 0 2006.229.20:09:12.53#ibcon#read 5, iclass 12, count 0 2006.229.20:09:12.53#ibcon#about to read 6, iclass 12, count 0 2006.229.20:09:12.53#ibcon#read 6, iclass 12, count 0 2006.229.20:09:12.53#ibcon#end of sib2, iclass 12, count 0 2006.229.20:09:12.53#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:09:12.53#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:09:12.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:09:12.53#ibcon#*before write, iclass 12, count 0 2006.229.20:09:12.53#ibcon#enter sib2, iclass 12, count 0 2006.229.20:09:12.53#ibcon#flushed, iclass 12, count 0 2006.229.20:09:12.53#ibcon#about to write, iclass 12, count 0 2006.229.20:09:12.53#ibcon#wrote, iclass 12, count 0 2006.229.20:09:12.53#ibcon#about to read 3, iclass 12, count 0 2006.229.20:09:12.57#ibcon#read 3, iclass 12, count 0 2006.229.20:09:12.57#ibcon#about to read 4, iclass 12, count 0 2006.229.20:09:12.57#ibcon#read 4, iclass 12, count 0 2006.229.20:09:12.57#ibcon#about to read 5, iclass 12, count 0 2006.229.20:09:12.57#ibcon#read 5, iclass 12, count 0 2006.229.20:09:12.57#ibcon#about to read 6, iclass 12, count 0 2006.229.20:09:12.57#ibcon#read 6, iclass 12, count 0 2006.229.20:09:12.57#ibcon#end of sib2, iclass 12, count 0 2006.229.20:09:12.57#ibcon#*after write, iclass 12, count 0 2006.229.20:09:12.57#ibcon#*before return 0, iclass 12, count 0 2006.229.20:09:12.57#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:12.57#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:12.57#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:09:12.57#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:09:12.57$vck44/va=2,7 2006.229.20:09:12.57#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.20:09:12.57#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.20:09:12.57#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:12.57#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:12.63#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:12.63#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:12.63#ibcon#enter wrdev, iclass 14, count 2 2006.229.20:09:12.63#ibcon#first serial, iclass 14, count 2 2006.229.20:09:12.63#ibcon#enter sib2, iclass 14, count 2 2006.229.20:09:12.63#ibcon#flushed, iclass 14, count 2 2006.229.20:09:12.63#ibcon#about to write, iclass 14, count 2 2006.229.20:09:12.63#ibcon#wrote, iclass 14, count 2 2006.229.20:09:12.63#ibcon#about to read 3, iclass 14, count 2 2006.229.20:09:12.65#ibcon#read 3, iclass 14, count 2 2006.229.20:09:12.65#ibcon#about to read 4, iclass 14, count 2 2006.229.20:09:12.65#ibcon#read 4, iclass 14, count 2 2006.229.20:09:12.65#ibcon#about to read 5, iclass 14, count 2 2006.229.20:09:12.65#ibcon#read 5, iclass 14, count 2 2006.229.20:09:12.65#ibcon#about to read 6, iclass 14, count 2 2006.229.20:09:12.65#ibcon#read 6, iclass 14, count 2 2006.229.20:09:12.65#ibcon#end of sib2, iclass 14, count 2 2006.229.20:09:12.65#ibcon#*mode == 0, iclass 14, count 2 2006.229.20:09:12.65#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.20:09:12.65#ibcon#[25=AT02-07\r\n] 2006.229.20:09:12.65#ibcon#*before write, iclass 14, count 2 2006.229.20:09:12.65#ibcon#enter sib2, iclass 14, count 2 2006.229.20:09:12.65#ibcon#flushed, iclass 14, count 2 2006.229.20:09:12.65#ibcon#about to write, iclass 14, count 2 2006.229.20:09:12.65#ibcon#wrote, iclass 14, count 2 2006.229.20:09:12.65#ibcon#about to read 3, iclass 14, count 2 2006.229.20:09:12.68#ibcon#read 3, iclass 14, count 2 2006.229.20:09:12.68#ibcon#about to read 4, iclass 14, count 2 2006.229.20:09:12.68#ibcon#read 4, iclass 14, count 2 2006.229.20:09:12.68#ibcon#about to read 5, iclass 14, count 2 2006.229.20:09:12.68#ibcon#read 5, iclass 14, count 2 2006.229.20:09:12.68#ibcon#about to read 6, iclass 14, count 2 2006.229.20:09:12.68#ibcon#read 6, iclass 14, count 2 2006.229.20:09:12.68#ibcon#end of sib2, iclass 14, count 2 2006.229.20:09:12.68#ibcon#*after write, iclass 14, count 2 2006.229.20:09:12.68#ibcon#*before return 0, iclass 14, count 2 2006.229.20:09:12.68#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:12.68#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:12.68#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.20:09:12.68#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:12.68#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:12.80#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:12.80#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:12.80#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:09:12.80#ibcon#first serial, iclass 14, count 0 2006.229.20:09:12.80#ibcon#enter sib2, iclass 14, count 0 2006.229.20:09:12.80#ibcon#flushed, iclass 14, count 0 2006.229.20:09:12.80#ibcon#about to write, iclass 14, count 0 2006.229.20:09:12.80#ibcon#wrote, iclass 14, count 0 2006.229.20:09:12.80#ibcon#about to read 3, iclass 14, count 0 2006.229.20:09:12.82#ibcon#read 3, iclass 14, count 0 2006.229.20:09:12.82#ibcon#about to read 4, iclass 14, count 0 2006.229.20:09:12.82#ibcon#read 4, iclass 14, count 0 2006.229.20:09:12.82#ibcon#about to read 5, iclass 14, count 0 2006.229.20:09:12.82#ibcon#read 5, iclass 14, count 0 2006.229.20:09:12.82#ibcon#about to read 6, iclass 14, count 0 2006.229.20:09:12.82#ibcon#read 6, iclass 14, count 0 2006.229.20:09:12.82#ibcon#end of sib2, iclass 14, count 0 2006.229.20:09:12.82#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:09:12.82#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:09:12.82#ibcon#[25=USB\r\n] 2006.229.20:09:12.82#ibcon#*before write, iclass 14, count 0 2006.229.20:09:12.82#ibcon#enter sib2, iclass 14, count 0 2006.229.20:09:12.82#ibcon#flushed, iclass 14, count 0 2006.229.20:09:12.82#ibcon#about to write, iclass 14, count 0 2006.229.20:09:12.82#ibcon#wrote, iclass 14, count 0 2006.229.20:09:12.82#ibcon#about to read 3, iclass 14, count 0 2006.229.20:09:12.85#ibcon#read 3, iclass 14, count 0 2006.229.20:09:12.85#ibcon#about to read 4, iclass 14, count 0 2006.229.20:09:12.85#ibcon#read 4, iclass 14, count 0 2006.229.20:09:12.85#ibcon#about to read 5, iclass 14, count 0 2006.229.20:09:12.85#ibcon#read 5, iclass 14, count 0 2006.229.20:09:12.85#ibcon#about to read 6, iclass 14, count 0 2006.229.20:09:12.85#ibcon#read 6, iclass 14, count 0 2006.229.20:09:12.85#ibcon#end of sib2, iclass 14, count 0 2006.229.20:09:12.85#ibcon#*after write, iclass 14, count 0 2006.229.20:09:12.85#ibcon#*before return 0, iclass 14, count 0 2006.229.20:09:12.85#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:12.85#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:12.85#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:09:12.85#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:09:12.85$vck44/valo=3,564.99 2006.229.20:09:12.85#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.20:09:12.85#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.20:09:12.85#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:12.85#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:12.85#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:12.85#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:12.85#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:09:12.85#ibcon#first serial, iclass 16, count 0 2006.229.20:09:12.85#ibcon#enter sib2, iclass 16, count 0 2006.229.20:09:12.85#ibcon#flushed, iclass 16, count 0 2006.229.20:09:12.85#ibcon#about to write, iclass 16, count 0 2006.229.20:09:12.85#ibcon#wrote, iclass 16, count 0 2006.229.20:09:12.85#ibcon#about to read 3, iclass 16, count 0 2006.229.20:09:12.87#ibcon#read 3, iclass 16, count 0 2006.229.20:09:12.87#ibcon#about to read 4, iclass 16, count 0 2006.229.20:09:12.87#ibcon#read 4, iclass 16, count 0 2006.229.20:09:12.87#ibcon#about to read 5, iclass 16, count 0 2006.229.20:09:12.87#ibcon#read 5, iclass 16, count 0 2006.229.20:09:12.87#ibcon#about to read 6, iclass 16, count 0 2006.229.20:09:12.87#ibcon#read 6, iclass 16, count 0 2006.229.20:09:12.87#ibcon#end of sib2, iclass 16, count 0 2006.229.20:09:12.87#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:09:12.87#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:09:12.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:09:12.87#ibcon#*before write, iclass 16, count 0 2006.229.20:09:12.87#ibcon#enter sib2, iclass 16, count 0 2006.229.20:09:12.87#ibcon#flushed, iclass 16, count 0 2006.229.20:09:12.87#ibcon#about to write, iclass 16, count 0 2006.229.20:09:12.87#ibcon#wrote, iclass 16, count 0 2006.229.20:09:12.87#ibcon#about to read 3, iclass 16, count 0 2006.229.20:09:12.91#ibcon#read 3, iclass 16, count 0 2006.229.20:09:12.91#ibcon#about to read 4, iclass 16, count 0 2006.229.20:09:12.91#ibcon#read 4, iclass 16, count 0 2006.229.20:09:12.91#ibcon#about to read 5, iclass 16, count 0 2006.229.20:09:12.91#ibcon#read 5, iclass 16, count 0 2006.229.20:09:12.91#ibcon#about to read 6, iclass 16, count 0 2006.229.20:09:12.91#ibcon#read 6, iclass 16, count 0 2006.229.20:09:12.91#ibcon#end of sib2, iclass 16, count 0 2006.229.20:09:12.91#ibcon#*after write, iclass 16, count 0 2006.229.20:09:12.91#ibcon#*before return 0, iclass 16, count 0 2006.229.20:09:12.91#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:12.91#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:12.91#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:09:12.91#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:09:12.91$vck44/va=3,6 2006.229.20:09:12.91#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.20:09:12.91#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.20:09:12.91#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:12.91#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:12.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:12.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:12.97#ibcon#enter wrdev, iclass 18, count 2 2006.229.20:09:12.97#ibcon#first serial, iclass 18, count 2 2006.229.20:09:12.97#ibcon#enter sib2, iclass 18, count 2 2006.229.20:09:12.97#ibcon#flushed, iclass 18, count 2 2006.229.20:09:12.97#ibcon#about to write, iclass 18, count 2 2006.229.20:09:12.97#ibcon#wrote, iclass 18, count 2 2006.229.20:09:12.97#ibcon#about to read 3, iclass 18, count 2 2006.229.20:09:12.99#ibcon#read 3, iclass 18, count 2 2006.229.20:09:12.99#ibcon#about to read 4, iclass 18, count 2 2006.229.20:09:12.99#ibcon#read 4, iclass 18, count 2 2006.229.20:09:12.99#ibcon#about to read 5, iclass 18, count 2 2006.229.20:09:12.99#ibcon#read 5, iclass 18, count 2 2006.229.20:09:12.99#ibcon#about to read 6, iclass 18, count 2 2006.229.20:09:12.99#ibcon#read 6, iclass 18, count 2 2006.229.20:09:12.99#ibcon#end of sib2, iclass 18, count 2 2006.229.20:09:12.99#ibcon#*mode == 0, iclass 18, count 2 2006.229.20:09:12.99#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.20:09:12.99#ibcon#[25=AT03-06\r\n] 2006.229.20:09:12.99#ibcon#*before write, iclass 18, count 2 2006.229.20:09:12.99#ibcon#enter sib2, iclass 18, count 2 2006.229.20:09:12.99#ibcon#flushed, iclass 18, count 2 2006.229.20:09:12.99#ibcon#about to write, iclass 18, count 2 2006.229.20:09:12.99#ibcon#wrote, iclass 18, count 2 2006.229.20:09:12.99#ibcon#about to read 3, iclass 18, count 2 2006.229.20:09:13.02#ibcon#read 3, iclass 18, count 2 2006.229.20:09:13.02#ibcon#about to read 4, iclass 18, count 2 2006.229.20:09:13.02#ibcon#read 4, iclass 18, count 2 2006.229.20:09:13.02#ibcon#about to read 5, iclass 18, count 2 2006.229.20:09:13.02#ibcon#read 5, iclass 18, count 2 2006.229.20:09:13.02#ibcon#about to read 6, iclass 18, count 2 2006.229.20:09:13.02#ibcon#read 6, iclass 18, count 2 2006.229.20:09:13.02#ibcon#end of sib2, iclass 18, count 2 2006.229.20:09:13.02#ibcon#*after write, iclass 18, count 2 2006.229.20:09:13.02#ibcon#*before return 0, iclass 18, count 2 2006.229.20:09:13.02#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:13.02#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:13.02#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.20:09:13.02#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:13.02#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:13.14#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:13.14#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:13.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:09:13.14#ibcon#first serial, iclass 18, count 0 2006.229.20:09:13.14#ibcon#enter sib2, iclass 18, count 0 2006.229.20:09:13.14#ibcon#flushed, iclass 18, count 0 2006.229.20:09:13.14#ibcon#about to write, iclass 18, count 0 2006.229.20:09:13.14#ibcon#wrote, iclass 18, count 0 2006.229.20:09:13.14#ibcon#about to read 3, iclass 18, count 0 2006.229.20:09:13.16#ibcon#read 3, iclass 18, count 0 2006.229.20:09:13.16#ibcon#about to read 4, iclass 18, count 0 2006.229.20:09:13.16#ibcon#read 4, iclass 18, count 0 2006.229.20:09:13.16#ibcon#about to read 5, iclass 18, count 0 2006.229.20:09:13.16#ibcon#read 5, iclass 18, count 0 2006.229.20:09:13.16#ibcon#about to read 6, iclass 18, count 0 2006.229.20:09:13.16#ibcon#read 6, iclass 18, count 0 2006.229.20:09:13.16#ibcon#end of sib2, iclass 18, count 0 2006.229.20:09:13.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:09:13.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:09:13.16#ibcon#[25=USB\r\n] 2006.229.20:09:13.16#ibcon#*before write, iclass 18, count 0 2006.229.20:09:13.16#ibcon#enter sib2, iclass 18, count 0 2006.229.20:09:13.16#ibcon#flushed, iclass 18, count 0 2006.229.20:09:13.16#ibcon#about to write, iclass 18, count 0 2006.229.20:09:13.16#ibcon#wrote, iclass 18, count 0 2006.229.20:09:13.16#ibcon#about to read 3, iclass 18, count 0 2006.229.20:09:13.19#ibcon#read 3, iclass 18, count 0 2006.229.20:09:13.19#ibcon#about to read 4, iclass 18, count 0 2006.229.20:09:13.19#ibcon#read 4, iclass 18, count 0 2006.229.20:09:13.19#ibcon#about to read 5, iclass 18, count 0 2006.229.20:09:13.19#ibcon#read 5, iclass 18, count 0 2006.229.20:09:13.19#ibcon#about to read 6, iclass 18, count 0 2006.229.20:09:13.19#ibcon#read 6, iclass 18, count 0 2006.229.20:09:13.19#ibcon#end of sib2, iclass 18, count 0 2006.229.20:09:13.19#ibcon#*after write, iclass 18, count 0 2006.229.20:09:13.19#ibcon#*before return 0, iclass 18, count 0 2006.229.20:09:13.19#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:13.19#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:13.19#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:09:13.19#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:09:13.19$vck44/valo=4,624.99 2006.229.20:09:13.19#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.20:09:13.19#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.20:09:13.19#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:13.19#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:13.19#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:13.19#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:13.19#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:09:13.19#ibcon#first serial, iclass 20, count 0 2006.229.20:09:13.19#ibcon#enter sib2, iclass 20, count 0 2006.229.20:09:13.19#ibcon#flushed, iclass 20, count 0 2006.229.20:09:13.19#ibcon#about to write, iclass 20, count 0 2006.229.20:09:13.19#ibcon#wrote, iclass 20, count 0 2006.229.20:09:13.19#ibcon#about to read 3, iclass 20, count 0 2006.229.20:09:13.21#ibcon#read 3, iclass 20, count 0 2006.229.20:09:13.21#ibcon#about to read 4, iclass 20, count 0 2006.229.20:09:13.21#ibcon#read 4, iclass 20, count 0 2006.229.20:09:13.21#ibcon#about to read 5, iclass 20, count 0 2006.229.20:09:13.21#ibcon#read 5, iclass 20, count 0 2006.229.20:09:13.21#ibcon#about to read 6, iclass 20, count 0 2006.229.20:09:13.21#ibcon#read 6, iclass 20, count 0 2006.229.20:09:13.21#ibcon#end of sib2, iclass 20, count 0 2006.229.20:09:13.21#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:09:13.21#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:09:13.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:09:13.21#ibcon#*before write, iclass 20, count 0 2006.229.20:09:13.21#ibcon#enter sib2, iclass 20, count 0 2006.229.20:09:13.21#ibcon#flushed, iclass 20, count 0 2006.229.20:09:13.21#ibcon#about to write, iclass 20, count 0 2006.229.20:09:13.21#ibcon#wrote, iclass 20, count 0 2006.229.20:09:13.21#ibcon#about to read 3, iclass 20, count 0 2006.229.20:09:13.25#ibcon#read 3, iclass 20, count 0 2006.229.20:09:13.25#ibcon#about to read 4, iclass 20, count 0 2006.229.20:09:13.25#ibcon#read 4, iclass 20, count 0 2006.229.20:09:13.25#ibcon#about to read 5, iclass 20, count 0 2006.229.20:09:13.25#ibcon#read 5, iclass 20, count 0 2006.229.20:09:13.25#ibcon#about to read 6, iclass 20, count 0 2006.229.20:09:13.25#ibcon#read 6, iclass 20, count 0 2006.229.20:09:13.25#ibcon#end of sib2, iclass 20, count 0 2006.229.20:09:13.25#ibcon#*after write, iclass 20, count 0 2006.229.20:09:13.25#ibcon#*before return 0, iclass 20, count 0 2006.229.20:09:13.25#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:13.25#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:13.25#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:09:13.25#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:09:13.25$vck44/va=4,7 2006.229.20:09:13.25#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:09:13.25#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:09:13.25#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:13.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:09:13.29#abcon#<5=/07 1.3 3.3 26.031001001.7\r\n> 2006.229.20:09:13.31#abcon#{5=INTERFACE CLEAR} 2006.229.20:09:13.31#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:09:13.31#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:09:13.31#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:09:13.31#ibcon#first serial, iclass 23, count 2 2006.229.20:09:13.31#ibcon#enter sib2, iclass 23, count 2 2006.229.20:09:13.31#ibcon#flushed, iclass 23, count 2 2006.229.20:09:13.31#ibcon#about to write, iclass 23, count 2 2006.229.20:09:13.31#ibcon#wrote, iclass 23, count 2 2006.229.20:09:13.31#ibcon#about to read 3, iclass 23, count 2 2006.229.20:09:13.33#ibcon#read 3, iclass 23, count 2 2006.229.20:09:13.33#ibcon#about to read 4, iclass 23, count 2 2006.229.20:09:13.33#ibcon#read 4, iclass 23, count 2 2006.229.20:09:13.33#ibcon#about to read 5, iclass 23, count 2 2006.229.20:09:13.33#ibcon#read 5, iclass 23, count 2 2006.229.20:09:13.33#ibcon#about to read 6, iclass 23, count 2 2006.229.20:09:13.33#ibcon#read 6, iclass 23, count 2 2006.229.20:09:13.33#ibcon#end of sib2, iclass 23, count 2 2006.229.20:09:13.33#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:09:13.33#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:09:13.33#ibcon#[25=AT04-07\r\n] 2006.229.20:09:13.33#ibcon#*before write, iclass 23, count 2 2006.229.20:09:13.33#ibcon#enter sib2, iclass 23, count 2 2006.229.20:09:13.33#ibcon#flushed, iclass 23, count 2 2006.229.20:09:13.33#ibcon#about to write, iclass 23, count 2 2006.229.20:09:13.33#ibcon#wrote, iclass 23, count 2 2006.229.20:09:13.33#ibcon#about to read 3, iclass 23, count 2 2006.229.20:09:13.36#ibcon#read 3, iclass 23, count 2 2006.229.20:09:13.36#ibcon#about to read 4, iclass 23, count 2 2006.229.20:09:13.36#ibcon#read 4, iclass 23, count 2 2006.229.20:09:13.36#ibcon#about to read 5, iclass 23, count 2 2006.229.20:09:13.36#ibcon#read 5, iclass 23, count 2 2006.229.20:09:13.36#ibcon#about to read 6, iclass 23, count 2 2006.229.20:09:13.36#ibcon#read 6, iclass 23, count 2 2006.229.20:09:13.36#ibcon#end of sib2, iclass 23, count 2 2006.229.20:09:13.36#ibcon#*after write, iclass 23, count 2 2006.229.20:09:13.36#ibcon#*before return 0, iclass 23, count 2 2006.229.20:09:13.36#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:09:13.36#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:09:13.36#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:09:13.36#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:13.36#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:09:13.37#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:09:13.48#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:09:13.48#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:09:13.48#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:09:13.48#ibcon#first serial, iclass 23, count 0 2006.229.20:09:13.48#ibcon#enter sib2, iclass 23, count 0 2006.229.20:09:13.48#ibcon#flushed, iclass 23, count 0 2006.229.20:09:13.48#ibcon#about to write, iclass 23, count 0 2006.229.20:09:13.48#ibcon#wrote, iclass 23, count 0 2006.229.20:09:13.48#ibcon#about to read 3, iclass 23, count 0 2006.229.20:09:13.50#ibcon#read 3, iclass 23, count 0 2006.229.20:09:13.50#ibcon#about to read 4, iclass 23, count 0 2006.229.20:09:13.50#ibcon#read 4, iclass 23, count 0 2006.229.20:09:13.50#ibcon#about to read 5, iclass 23, count 0 2006.229.20:09:13.50#ibcon#read 5, iclass 23, count 0 2006.229.20:09:13.50#ibcon#about to read 6, iclass 23, count 0 2006.229.20:09:13.50#ibcon#read 6, iclass 23, count 0 2006.229.20:09:13.50#ibcon#end of sib2, iclass 23, count 0 2006.229.20:09:13.50#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:09:13.50#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:09:13.50#ibcon#[25=USB\r\n] 2006.229.20:09:13.50#ibcon#*before write, iclass 23, count 0 2006.229.20:09:13.50#ibcon#enter sib2, iclass 23, count 0 2006.229.20:09:13.50#ibcon#flushed, iclass 23, count 0 2006.229.20:09:13.50#ibcon#about to write, iclass 23, count 0 2006.229.20:09:13.50#ibcon#wrote, iclass 23, count 0 2006.229.20:09:13.50#ibcon#about to read 3, iclass 23, count 0 2006.229.20:09:13.53#ibcon#read 3, iclass 23, count 0 2006.229.20:09:13.53#ibcon#about to read 4, iclass 23, count 0 2006.229.20:09:13.53#ibcon#read 4, iclass 23, count 0 2006.229.20:09:13.53#ibcon#about to read 5, iclass 23, count 0 2006.229.20:09:13.53#ibcon#read 5, iclass 23, count 0 2006.229.20:09:13.53#ibcon#about to read 6, iclass 23, count 0 2006.229.20:09:13.53#ibcon#read 6, iclass 23, count 0 2006.229.20:09:13.53#ibcon#end of sib2, iclass 23, count 0 2006.229.20:09:13.53#ibcon#*after write, iclass 23, count 0 2006.229.20:09:13.53#ibcon#*before return 0, iclass 23, count 0 2006.229.20:09:13.53#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:09:13.53#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:09:13.53#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:09:13.53#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:09:13.53$vck44/valo=5,734.99 2006.229.20:09:13.53#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.20:09:13.53#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.20:09:13.53#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:13.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:13.53#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:13.53#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:13.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.20:09:13.53#ibcon#first serial, iclass 28, count 0 2006.229.20:09:13.53#ibcon#enter sib2, iclass 28, count 0 2006.229.20:09:13.53#ibcon#flushed, iclass 28, count 0 2006.229.20:09:13.53#ibcon#about to write, iclass 28, count 0 2006.229.20:09:13.53#ibcon#wrote, iclass 28, count 0 2006.229.20:09:13.53#ibcon#about to read 3, iclass 28, count 0 2006.229.20:09:13.55#ibcon#read 3, iclass 28, count 0 2006.229.20:09:13.55#ibcon#about to read 4, iclass 28, count 0 2006.229.20:09:13.55#ibcon#read 4, iclass 28, count 0 2006.229.20:09:13.55#ibcon#about to read 5, iclass 28, count 0 2006.229.20:09:13.55#ibcon#read 5, iclass 28, count 0 2006.229.20:09:13.55#ibcon#about to read 6, iclass 28, count 0 2006.229.20:09:13.55#ibcon#read 6, iclass 28, count 0 2006.229.20:09:13.55#ibcon#end of sib2, iclass 28, count 0 2006.229.20:09:13.55#ibcon#*mode == 0, iclass 28, count 0 2006.229.20:09:13.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.20:09:13.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:09:13.55#ibcon#*before write, iclass 28, count 0 2006.229.20:09:13.55#ibcon#enter sib2, iclass 28, count 0 2006.229.20:09:13.55#ibcon#flushed, iclass 28, count 0 2006.229.20:09:13.55#ibcon#about to write, iclass 28, count 0 2006.229.20:09:13.55#ibcon#wrote, iclass 28, count 0 2006.229.20:09:13.55#ibcon#about to read 3, iclass 28, count 0 2006.229.20:09:13.59#ibcon#read 3, iclass 28, count 0 2006.229.20:09:13.59#ibcon#about to read 4, iclass 28, count 0 2006.229.20:09:13.59#ibcon#read 4, iclass 28, count 0 2006.229.20:09:13.59#ibcon#about to read 5, iclass 28, count 0 2006.229.20:09:13.59#ibcon#read 5, iclass 28, count 0 2006.229.20:09:13.59#ibcon#about to read 6, iclass 28, count 0 2006.229.20:09:13.59#ibcon#read 6, iclass 28, count 0 2006.229.20:09:13.59#ibcon#end of sib2, iclass 28, count 0 2006.229.20:09:13.59#ibcon#*after write, iclass 28, count 0 2006.229.20:09:13.59#ibcon#*before return 0, iclass 28, count 0 2006.229.20:09:13.59#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:13.59#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:13.59#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.20:09:13.59#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.20:09:13.59$vck44/va=5,4 2006.229.20:09:13.59#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.20:09:13.59#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.20:09:13.59#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:13.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:13.65#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:13.65#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:13.65#ibcon#enter wrdev, iclass 30, count 2 2006.229.20:09:13.65#ibcon#first serial, iclass 30, count 2 2006.229.20:09:13.65#ibcon#enter sib2, iclass 30, count 2 2006.229.20:09:13.65#ibcon#flushed, iclass 30, count 2 2006.229.20:09:13.65#ibcon#about to write, iclass 30, count 2 2006.229.20:09:13.65#ibcon#wrote, iclass 30, count 2 2006.229.20:09:13.65#ibcon#about to read 3, iclass 30, count 2 2006.229.20:09:13.67#ibcon#read 3, iclass 30, count 2 2006.229.20:09:13.67#ibcon#about to read 4, iclass 30, count 2 2006.229.20:09:13.67#ibcon#read 4, iclass 30, count 2 2006.229.20:09:13.67#ibcon#about to read 5, iclass 30, count 2 2006.229.20:09:13.67#ibcon#read 5, iclass 30, count 2 2006.229.20:09:13.67#ibcon#about to read 6, iclass 30, count 2 2006.229.20:09:13.67#ibcon#read 6, iclass 30, count 2 2006.229.20:09:13.67#ibcon#end of sib2, iclass 30, count 2 2006.229.20:09:13.67#ibcon#*mode == 0, iclass 30, count 2 2006.229.20:09:13.67#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.20:09:13.67#ibcon#[25=AT05-04\r\n] 2006.229.20:09:13.67#ibcon#*before write, iclass 30, count 2 2006.229.20:09:13.67#ibcon#enter sib2, iclass 30, count 2 2006.229.20:09:13.67#ibcon#flushed, iclass 30, count 2 2006.229.20:09:13.67#ibcon#about to write, iclass 30, count 2 2006.229.20:09:13.67#ibcon#wrote, iclass 30, count 2 2006.229.20:09:13.67#ibcon#about to read 3, iclass 30, count 2 2006.229.20:09:13.70#ibcon#read 3, iclass 30, count 2 2006.229.20:09:13.70#ibcon#about to read 4, iclass 30, count 2 2006.229.20:09:13.70#ibcon#read 4, iclass 30, count 2 2006.229.20:09:13.70#ibcon#about to read 5, iclass 30, count 2 2006.229.20:09:13.70#ibcon#read 5, iclass 30, count 2 2006.229.20:09:13.70#ibcon#about to read 6, iclass 30, count 2 2006.229.20:09:13.70#ibcon#read 6, iclass 30, count 2 2006.229.20:09:13.70#ibcon#end of sib2, iclass 30, count 2 2006.229.20:09:13.70#ibcon#*after write, iclass 30, count 2 2006.229.20:09:13.70#ibcon#*before return 0, iclass 30, count 2 2006.229.20:09:13.70#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:13.70#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:13.70#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.20:09:13.70#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:13.70#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:13.82#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:13.82#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:13.82#ibcon#enter wrdev, iclass 30, count 0 2006.229.20:09:13.82#ibcon#first serial, iclass 30, count 0 2006.229.20:09:13.82#ibcon#enter sib2, iclass 30, count 0 2006.229.20:09:13.82#ibcon#flushed, iclass 30, count 0 2006.229.20:09:13.82#ibcon#about to write, iclass 30, count 0 2006.229.20:09:13.82#ibcon#wrote, iclass 30, count 0 2006.229.20:09:13.82#ibcon#about to read 3, iclass 30, count 0 2006.229.20:09:13.84#ibcon#read 3, iclass 30, count 0 2006.229.20:09:13.84#ibcon#about to read 4, iclass 30, count 0 2006.229.20:09:13.84#ibcon#read 4, iclass 30, count 0 2006.229.20:09:13.84#ibcon#about to read 5, iclass 30, count 0 2006.229.20:09:13.84#ibcon#read 5, iclass 30, count 0 2006.229.20:09:13.84#ibcon#about to read 6, iclass 30, count 0 2006.229.20:09:13.84#ibcon#read 6, iclass 30, count 0 2006.229.20:09:13.84#ibcon#end of sib2, iclass 30, count 0 2006.229.20:09:13.84#ibcon#*mode == 0, iclass 30, count 0 2006.229.20:09:13.84#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.20:09:13.84#ibcon#[25=USB\r\n] 2006.229.20:09:13.84#ibcon#*before write, iclass 30, count 0 2006.229.20:09:13.84#ibcon#enter sib2, iclass 30, count 0 2006.229.20:09:13.84#ibcon#flushed, iclass 30, count 0 2006.229.20:09:13.84#ibcon#about to write, iclass 30, count 0 2006.229.20:09:13.84#ibcon#wrote, iclass 30, count 0 2006.229.20:09:13.84#ibcon#about to read 3, iclass 30, count 0 2006.229.20:09:13.87#ibcon#read 3, iclass 30, count 0 2006.229.20:09:13.87#ibcon#about to read 4, iclass 30, count 0 2006.229.20:09:13.87#ibcon#read 4, iclass 30, count 0 2006.229.20:09:13.87#ibcon#about to read 5, iclass 30, count 0 2006.229.20:09:13.87#ibcon#read 5, iclass 30, count 0 2006.229.20:09:13.87#ibcon#about to read 6, iclass 30, count 0 2006.229.20:09:13.87#ibcon#read 6, iclass 30, count 0 2006.229.20:09:13.87#ibcon#end of sib2, iclass 30, count 0 2006.229.20:09:13.87#ibcon#*after write, iclass 30, count 0 2006.229.20:09:13.87#ibcon#*before return 0, iclass 30, count 0 2006.229.20:09:13.87#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:13.87#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:13.87#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.20:09:13.87#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.20:09:13.87$vck44/valo=6,814.99 2006.229.20:09:13.87#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.20:09:13.87#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.20:09:13.87#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:13.87#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:13.87#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:13.87#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:13.87#ibcon#enter wrdev, iclass 32, count 0 2006.229.20:09:13.87#ibcon#first serial, iclass 32, count 0 2006.229.20:09:13.87#ibcon#enter sib2, iclass 32, count 0 2006.229.20:09:13.87#ibcon#flushed, iclass 32, count 0 2006.229.20:09:13.87#ibcon#about to write, iclass 32, count 0 2006.229.20:09:13.87#ibcon#wrote, iclass 32, count 0 2006.229.20:09:13.87#ibcon#about to read 3, iclass 32, count 0 2006.229.20:09:13.89#ibcon#read 3, iclass 32, count 0 2006.229.20:09:13.89#ibcon#about to read 4, iclass 32, count 0 2006.229.20:09:13.89#ibcon#read 4, iclass 32, count 0 2006.229.20:09:13.89#ibcon#about to read 5, iclass 32, count 0 2006.229.20:09:13.89#ibcon#read 5, iclass 32, count 0 2006.229.20:09:13.89#ibcon#about to read 6, iclass 32, count 0 2006.229.20:09:13.89#ibcon#read 6, iclass 32, count 0 2006.229.20:09:13.89#ibcon#end of sib2, iclass 32, count 0 2006.229.20:09:13.89#ibcon#*mode == 0, iclass 32, count 0 2006.229.20:09:13.89#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.20:09:13.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:09:13.89#ibcon#*before write, iclass 32, count 0 2006.229.20:09:13.89#ibcon#enter sib2, iclass 32, count 0 2006.229.20:09:13.89#ibcon#flushed, iclass 32, count 0 2006.229.20:09:13.89#ibcon#about to write, iclass 32, count 0 2006.229.20:09:13.89#ibcon#wrote, iclass 32, count 0 2006.229.20:09:13.89#ibcon#about to read 3, iclass 32, count 0 2006.229.20:09:13.93#ibcon#read 3, iclass 32, count 0 2006.229.20:09:13.93#ibcon#about to read 4, iclass 32, count 0 2006.229.20:09:13.93#ibcon#read 4, iclass 32, count 0 2006.229.20:09:13.93#ibcon#about to read 5, iclass 32, count 0 2006.229.20:09:13.93#ibcon#read 5, iclass 32, count 0 2006.229.20:09:13.93#ibcon#about to read 6, iclass 32, count 0 2006.229.20:09:13.93#ibcon#read 6, iclass 32, count 0 2006.229.20:09:13.93#ibcon#end of sib2, iclass 32, count 0 2006.229.20:09:13.93#ibcon#*after write, iclass 32, count 0 2006.229.20:09:13.93#ibcon#*before return 0, iclass 32, count 0 2006.229.20:09:13.93#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:13.93#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:13.93#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.20:09:13.93#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.20:09:13.93$vck44/va=6,4 2006.229.20:09:13.93#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.20:09:13.93#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.20:09:13.93#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:13.93#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:13.99#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:13.99#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:13.99#ibcon#enter wrdev, iclass 34, count 2 2006.229.20:09:13.99#ibcon#first serial, iclass 34, count 2 2006.229.20:09:13.99#ibcon#enter sib2, iclass 34, count 2 2006.229.20:09:13.99#ibcon#flushed, iclass 34, count 2 2006.229.20:09:13.99#ibcon#about to write, iclass 34, count 2 2006.229.20:09:13.99#ibcon#wrote, iclass 34, count 2 2006.229.20:09:13.99#ibcon#about to read 3, iclass 34, count 2 2006.229.20:09:14.01#ibcon#read 3, iclass 34, count 2 2006.229.20:09:14.01#ibcon#about to read 4, iclass 34, count 2 2006.229.20:09:14.01#ibcon#read 4, iclass 34, count 2 2006.229.20:09:14.01#ibcon#about to read 5, iclass 34, count 2 2006.229.20:09:14.01#ibcon#read 5, iclass 34, count 2 2006.229.20:09:14.01#ibcon#about to read 6, iclass 34, count 2 2006.229.20:09:14.01#ibcon#read 6, iclass 34, count 2 2006.229.20:09:14.01#ibcon#end of sib2, iclass 34, count 2 2006.229.20:09:14.01#ibcon#*mode == 0, iclass 34, count 2 2006.229.20:09:14.01#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.20:09:14.01#ibcon#[25=AT06-04\r\n] 2006.229.20:09:14.01#ibcon#*before write, iclass 34, count 2 2006.229.20:09:14.01#ibcon#enter sib2, iclass 34, count 2 2006.229.20:09:14.01#ibcon#flushed, iclass 34, count 2 2006.229.20:09:14.01#ibcon#about to write, iclass 34, count 2 2006.229.20:09:14.01#ibcon#wrote, iclass 34, count 2 2006.229.20:09:14.01#ibcon#about to read 3, iclass 34, count 2 2006.229.20:09:14.04#ibcon#read 3, iclass 34, count 2 2006.229.20:09:14.04#ibcon#about to read 4, iclass 34, count 2 2006.229.20:09:14.04#ibcon#read 4, iclass 34, count 2 2006.229.20:09:14.04#ibcon#about to read 5, iclass 34, count 2 2006.229.20:09:14.04#ibcon#read 5, iclass 34, count 2 2006.229.20:09:14.04#ibcon#about to read 6, iclass 34, count 2 2006.229.20:09:14.04#ibcon#read 6, iclass 34, count 2 2006.229.20:09:14.04#ibcon#end of sib2, iclass 34, count 2 2006.229.20:09:14.04#ibcon#*after write, iclass 34, count 2 2006.229.20:09:14.04#ibcon#*before return 0, iclass 34, count 2 2006.229.20:09:14.04#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:14.04#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:14.04#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.20:09:14.04#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:14.04#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:14.16#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:14.16#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:14.16#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:09:14.16#ibcon#first serial, iclass 34, count 0 2006.229.20:09:14.16#ibcon#enter sib2, iclass 34, count 0 2006.229.20:09:14.16#ibcon#flushed, iclass 34, count 0 2006.229.20:09:14.16#ibcon#about to write, iclass 34, count 0 2006.229.20:09:14.16#ibcon#wrote, iclass 34, count 0 2006.229.20:09:14.16#ibcon#about to read 3, iclass 34, count 0 2006.229.20:09:14.18#ibcon#read 3, iclass 34, count 0 2006.229.20:09:14.18#ibcon#about to read 4, iclass 34, count 0 2006.229.20:09:14.18#ibcon#read 4, iclass 34, count 0 2006.229.20:09:14.18#ibcon#about to read 5, iclass 34, count 0 2006.229.20:09:14.18#ibcon#read 5, iclass 34, count 0 2006.229.20:09:14.18#ibcon#about to read 6, iclass 34, count 0 2006.229.20:09:14.18#ibcon#read 6, iclass 34, count 0 2006.229.20:09:14.18#ibcon#end of sib2, iclass 34, count 0 2006.229.20:09:14.18#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:09:14.18#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:09:14.18#ibcon#[25=USB\r\n] 2006.229.20:09:14.18#ibcon#*before write, iclass 34, count 0 2006.229.20:09:14.18#ibcon#enter sib2, iclass 34, count 0 2006.229.20:09:14.18#ibcon#flushed, iclass 34, count 0 2006.229.20:09:14.18#ibcon#about to write, iclass 34, count 0 2006.229.20:09:14.18#ibcon#wrote, iclass 34, count 0 2006.229.20:09:14.18#ibcon#about to read 3, iclass 34, count 0 2006.229.20:09:14.21#ibcon#read 3, iclass 34, count 0 2006.229.20:09:14.21#ibcon#about to read 4, iclass 34, count 0 2006.229.20:09:14.21#ibcon#read 4, iclass 34, count 0 2006.229.20:09:14.21#ibcon#about to read 5, iclass 34, count 0 2006.229.20:09:14.21#ibcon#read 5, iclass 34, count 0 2006.229.20:09:14.21#ibcon#about to read 6, iclass 34, count 0 2006.229.20:09:14.21#ibcon#read 6, iclass 34, count 0 2006.229.20:09:14.21#ibcon#end of sib2, iclass 34, count 0 2006.229.20:09:14.21#ibcon#*after write, iclass 34, count 0 2006.229.20:09:14.21#ibcon#*before return 0, iclass 34, count 0 2006.229.20:09:14.21#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:14.21#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:14.21#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:09:14.21#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:09:14.21$vck44/valo=7,864.99 2006.229.20:09:14.21#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.20:09:14.21#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.20:09:14.21#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:14.21#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:14.21#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:14.21#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:14.21#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:09:14.21#ibcon#first serial, iclass 36, count 0 2006.229.20:09:14.21#ibcon#enter sib2, iclass 36, count 0 2006.229.20:09:14.21#ibcon#flushed, iclass 36, count 0 2006.229.20:09:14.21#ibcon#about to write, iclass 36, count 0 2006.229.20:09:14.21#ibcon#wrote, iclass 36, count 0 2006.229.20:09:14.21#ibcon#about to read 3, iclass 36, count 0 2006.229.20:09:14.23#ibcon#read 3, iclass 36, count 0 2006.229.20:09:14.23#ibcon#about to read 4, iclass 36, count 0 2006.229.20:09:14.23#ibcon#read 4, iclass 36, count 0 2006.229.20:09:14.23#ibcon#about to read 5, iclass 36, count 0 2006.229.20:09:14.23#ibcon#read 5, iclass 36, count 0 2006.229.20:09:14.23#ibcon#about to read 6, iclass 36, count 0 2006.229.20:09:14.23#ibcon#read 6, iclass 36, count 0 2006.229.20:09:14.23#ibcon#end of sib2, iclass 36, count 0 2006.229.20:09:14.23#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:09:14.23#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:09:14.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:09:14.23#ibcon#*before write, iclass 36, count 0 2006.229.20:09:14.23#ibcon#enter sib2, iclass 36, count 0 2006.229.20:09:14.23#ibcon#flushed, iclass 36, count 0 2006.229.20:09:14.23#ibcon#about to write, iclass 36, count 0 2006.229.20:09:14.23#ibcon#wrote, iclass 36, count 0 2006.229.20:09:14.23#ibcon#about to read 3, iclass 36, count 0 2006.229.20:09:14.27#ibcon#read 3, iclass 36, count 0 2006.229.20:09:14.27#ibcon#about to read 4, iclass 36, count 0 2006.229.20:09:14.27#ibcon#read 4, iclass 36, count 0 2006.229.20:09:14.27#ibcon#about to read 5, iclass 36, count 0 2006.229.20:09:14.27#ibcon#read 5, iclass 36, count 0 2006.229.20:09:14.27#ibcon#about to read 6, iclass 36, count 0 2006.229.20:09:14.27#ibcon#read 6, iclass 36, count 0 2006.229.20:09:14.27#ibcon#end of sib2, iclass 36, count 0 2006.229.20:09:14.27#ibcon#*after write, iclass 36, count 0 2006.229.20:09:14.27#ibcon#*before return 0, iclass 36, count 0 2006.229.20:09:14.27#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:14.27#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:14.27#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:09:14.27#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:09:14.27$vck44/va=7,5 2006.229.20:09:14.27#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.20:09:14.27#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.20:09:14.27#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:14.27#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:14.33#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:14.33#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:14.33#ibcon#enter wrdev, iclass 38, count 2 2006.229.20:09:14.33#ibcon#first serial, iclass 38, count 2 2006.229.20:09:14.33#ibcon#enter sib2, iclass 38, count 2 2006.229.20:09:14.33#ibcon#flushed, iclass 38, count 2 2006.229.20:09:14.33#ibcon#about to write, iclass 38, count 2 2006.229.20:09:14.33#ibcon#wrote, iclass 38, count 2 2006.229.20:09:14.33#ibcon#about to read 3, iclass 38, count 2 2006.229.20:09:14.35#ibcon#read 3, iclass 38, count 2 2006.229.20:09:14.35#ibcon#about to read 4, iclass 38, count 2 2006.229.20:09:14.35#ibcon#read 4, iclass 38, count 2 2006.229.20:09:14.35#ibcon#about to read 5, iclass 38, count 2 2006.229.20:09:14.35#ibcon#read 5, iclass 38, count 2 2006.229.20:09:14.35#ibcon#about to read 6, iclass 38, count 2 2006.229.20:09:14.35#ibcon#read 6, iclass 38, count 2 2006.229.20:09:14.35#ibcon#end of sib2, iclass 38, count 2 2006.229.20:09:14.35#ibcon#*mode == 0, iclass 38, count 2 2006.229.20:09:14.35#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.20:09:14.35#ibcon#[25=AT07-05\r\n] 2006.229.20:09:14.35#ibcon#*before write, iclass 38, count 2 2006.229.20:09:14.35#ibcon#enter sib2, iclass 38, count 2 2006.229.20:09:14.35#ibcon#flushed, iclass 38, count 2 2006.229.20:09:14.35#ibcon#about to write, iclass 38, count 2 2006.229.20:09:14.35#ibcon#wrote, iclass 38, count 2 2006.229.20:09:14.35#ibcon#about to read 3, iclass 38, count 2 2006.229.20:09:14.38#ibcon#read 3, iclass 38, count 2 2006.229.20:09:14.38#ibcon#about to read 4, iclass 38, count 2 2006.229.20:09:14.38#ibcon#read 4, iclass 38, count 2 2006.229.20:09:14.38#ibcon#about to read 5, iclass 38, count 2 2006.229.20:09:14.38#ibcon#read 5, iclass 38, count 2 2006.229.20:09:14.38#ibcon#about to read 6, iclass 38, count 2 2006.229.20:09:14.38#ibcon#read 6, iclass 38, count 2 2006.229.20:09:14.38#ibcon#end of sib2, iclass 38, count 2 2006.229.20:09:14.38#ibcon#*after write, iclass 38, count 2 2006.229.20:09:14.38#ibcon#*before return 0, iclass 38, count 2 2006.229.20:09:14.38#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:14.38#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:14.38#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.20:09:14.38#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:14.38#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:14.50#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:14.50#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:14.50#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:09:14.50#ibcon#first serial, iclass 38, count 0 2006.229.20:09:14.50#ibcon#enter sib2, iclass 38, count 0 2006.229.20:09:14.50#ibcon#flushed, iclass 38, count 0 2006.229.20:09:14.50#ibcon#about to write, iclass 38, count 0 2006.229.20:09:14.50#ibcon#wrote, iclass 38, count 0 2006.229.20:09:14.50#ibcon#about to read 3, iclass 38, count 0 2006.229.20:09:14.52#ibcon#read 3, iclass 38, count 0 2006.229.20:09:14.52#ibcon#about to read 4, iclass 38, count 0 2006.229.20:09:14.52#ibcon#read 4, iclass 38, count 0 2006.229.20:09:14.52#ibcon#about to read 5, iclass 38, count 0 2006.229.20:09:14.52#ibcon#read 5, iclass 38, count 0 2006.229.20:09:14.52#ibcon#about to read 6, iclass 38, count 0 2006.229.20:09:14.52#ibcon#read 6, iclass 38, count 0 2006.229.20:09:14.52#ibcon#end of sib2, iclass 38, count 0 2006.229.20:09:14.52#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:09:14.52#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:09:14.52#ibcon#[25=USB\r\n] 2006.229.20:09:14.52#ibcon#*before write, iclass 38, count 0 2006.229.20:09:14.52#ibcon#enter sib2, iclass 38, count 0 2006.229.20:09:14.52#ibcon#flushed, iclass 38, count 0 2006.229.20:09:14.52#ibcon#about to write, iclass 38, count 0 2006.229.20:09:14.52#ibcon#wrote, iclass 38, count 0 2006.229.20:09:14.52#ibcon#about to read 3, iclass 38, count 0 2006.229.20:09:14.55#ibcon#read 3, iclass 38, count 0 2006.229.20:09:14.55#ibcon#about to read 4, iclass 38, count 0 2006.229.20:09:14.55#ibcon#read 4, iclass 38, count 0 2006.229.20:09:14.55#ibcon#about to read 5, iclass 38, count 0 2006.229.20:09:14.55#ibcon#read 5, iclass 38, count 0 2006.229.20:09:14.55#ibcon#about to read 6, iclass 38, count 0 2006.229.20:09:14.55#ibcon#read 6, iclass 38, count 0 2006.229.20:09:14.55#ibcon#end of sib2, iclass 38, count 0 2006.229.20:09:14.55#ibcon#*after write, iclass 38, count 0 2006.229.20:09:14.55#ibcon#*before return 0, iclass 38, count 0 2006.229.20:09:14.55#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:14.55#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:14.55#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:09:14.55#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:09:14.55$vck44/valo=8,884.99 2006.229.20:09:14.55#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.20:09:14.55#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.20:09:14.55#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:14.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:14.55#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:14.55#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:14.55#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:09:14.55#ibcon#first serial, iclass 40, count 0 2006.229.20:09:14.55#ibcon#enter sib2, iclass 40, count 0 2006.229.20:09:14.55#ibcon#flushed, iclass 40, count 0 2006.229.20:09:14.55#ibcon#about to write, iclass 40, count 0 2006.229.20:09:14.55#ibcon#wrote, iclass 40, count 0 2006.229.20:09:14.55#ibcon#about to read 3, iclass 40, count 0 2006.229.20:09:14.57#ibcon#read 3, iclass 40, count 0 2006.229.20:09:14.57#ibcon#about to read 4, iclass 40, count 0 2006.229.20:09:14.57#ibcon#read 4, iclass 40, count 0 2006.229.20:09:14.57#ibcon#about to read 5, iclass 40, count 0 2006.229.20:09:14.57#ibcon#read 5, iclass 40, count 0 2006.229.20:09:14.57#ibcon#about to read 6, iclass 40, count 0 2006.229.20:09:14.57#ibcon#read 6, iclass 40, count 0 2006.229.20:09:14.57#ibcon#end of sib2, iclass 40, count 0 2006.229.20:09:14.57#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:09:14.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:09:14.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:09:14.57#ibcon#*before write, iclass 40, count 0 2006.229.20:09:14.57#ibcon#enter sib2, iclass 40, count 0 2006.229.20:09:14.57#ibcon#flushed, iclass 40, count 0 2006.229.20:09:14.57#ibcon#about to write, iclass 40, count 0 2006.229.20:09:14.57#ibcon#wrote, iclass 40, count 0 2006.229.20:09:14.57#ibcon#about to read 3, iclass 40, count 0 2006.229.20:09:14.61#ibcon#read 3, iclass 40, count 0 2006.229.20:09:14.61#ibcon#about to read 4, iclass 40, count 0 2006.229.20:09:14.61#ibcon#read 4, iclass 40, count 0 2006.229.20:09:14.61#ibcon#about to read 5, iclass 40, count 0 2006.229.20:09:14.61#ibcon#read 5, iclass 40, count 0 2006.229.20:09:14.61#ibcon#about to read 6, iclass 40, count 0 2006.229.20:09:14.61#ibcon#read 6, iclass 40, count 0 2006.229.20:09:14.61#ibcon#end of sib2, iclass 40, count 0 2006.229.20:09:14.61#ibcon#*after write, iclass 40, count 0 2006.229.20:09:14.61#ibcon#*before return 0, iclass 40, count 0 2006.229.20:09:14.61#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:14.61#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:14.61#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:09:14.61#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:09:14.61$vck44/va=8,6 2006.229.20:09:14.61#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.20:09:14.61#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.20:09:14.61#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:14.61#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:09:14.67#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:09:14.67#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:09:14.67#ibcon#enter wrdev, iclass 4, count 2 2006.229.20:09:14.67#ibcon#first serial, iclass 4, count 2 2006.229.20:09:14.67#ibcon#enter sib2, iclass 4, count 2 2006.229.20:09:14.67#ibcon#flushed, iclass 4, count 2 2006.229.20:09:14.67#ibcon#about to write, iclass 4, count 2 2006.229.20:09:14.67#ibcon#wrote, iclass 4, count 2 2006.229.20:09:14.67#ibcon#about to read 3, iclass 4, count 2 2006.229.20:09:14.69#ibcon#read 3, iclass 4, count 2 2006.229.20:09:14.69#ibcon#about to read 4, iclass 4, count 2 2006.229.20:09:14.69#ibcon#read 4, iclass 4, count 2 2006.229.20:09:14.69#ibcon#about to read 5, iclass 4, count 2 2006.229.20:09:14.69#ibcon#read 5, iclass 4, count 2 2006.229.20:09:14.69#ibcon#about to read 6, iclass 4, count 2 2006.229.20:09:14.69#ibcon#read 6, iclass 4, count 2 2006.229.20:09:14.69#ibcon#end of sib2, iclass 4, count 2 2006.229.20:09:14.69#ibcon#*mode == 0, iclass 4, count 2 2006.229.20:09:14.69#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.20:09:14.69#ibcon#[25=AT08-06\r\n] 2006.229.20:09:14.69#ibcon#*before write, iclass 4, count 2 2006.229.20:09:14.69#ibcon#enter sib2, iclass 4, count 2 2006.229.20:09:14.69#ibcon#flushed, iclass 4, count 2 2006.229.20:09:14.69#ibcon#about to write, iclass 4, count 2 2006.229.20:09:14.69#ibcon#wrote, iclass 4, count 2 2006.229.20:09:14.69#ibcon#about to read 3, iclass 4, count 2 2006.229.20:09:14.72#ibcon#read 3, iclass 4, count 2 2006.229.20:09:14.72#ibcon#about to read 4, iclass 4, count 2 2006.229.20:09:14.72#ibcon#read 4, iclass 4, count 2 2006.229.20:09:14.72#ibcon#about to read 5, iclass 4, count 2 2006.229.20:09:14.72#ibcon#read 5, iclass 4, count 2 2006.229.20:09:14.72#ibcon#about to read 6, iclass 4, count 2 2006.229.20:09:14.72#ibcon#read 6, iclass 4, count 2 2006.229.20:09:14.72#ibcon#end of sib2, iclass 4, count 2 2006.229.20:09:14.72#ibcon#*after write, iclass 4, count 2 2006.229.20:09:14.72#ibcon#*before return 0, iclass 4, count 2 2006.229.20:09:14.72#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:09:14.72#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:09:14.72#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.20:09:14.72#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:14.72#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:09:14.84#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:09:14.84#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:09:14.84#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:09:14.84#ibcon#first serial, iclass 4, count 0 2006.229.20:09:14.84#ibcon#enter sib2, iclass 4, count 0 2006.229.20:09:14.84#ibcon#flushed, iclass 4, count 0 2006.229.20:09:14.84#ibcon#about to write, iclass 4, count 0 2006.229.20:09:14.84#ibcon#wrote, iclass 4, count 0 2006.229.20:09:14.84#ibcon#about to read 3, iclass 4, count 0 2006.229.20:09:14.86#ibcon#read 3, iclass 4, count 0 2006.229.20:09:14.86#ibcon#about to read 4, iclass 4, count 0 2006.229.20:09:14.86#ibcon#read 4, iclass 4, count 0 2006.229.20:09:14.86#ibcon#about to read 5, iclass 4, count 0 2006.229.20:09:14.86#ibcon#read 5, iclass 4, count 0 2006.229.20:09:14.86#ibcon#about to read 6, iclass 4, count 0 2006.229.20:09:14.86#ibcon#read 6, iclass 4, count 0 2006.229.20:09:14.86#ibcon#end of sib2, iclass 4, count 0 2006.229.20:09:14.86#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:09:14.86#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:09:14.86#ibcon#[25=USB\r\n] 2006.229.20:09:14.86#ibcon#*before write, iclass 4, count 0 2006.229.20:09:14.86#ibcon#enter sib2, iclass 4, count 0 2006.229.20:09:14.86#ibcon#flushed, iclass 4, count 0 2006.229.20:09:14.86#ibcon#about to write, iclass 4, count 0 2006.229.20:09:14.86#ibcon#wrote, iclass 4, count 0 2006.229.20:09:14.86#ibcon#about to read 3, iclass 4, count 0 2006.229.20:09:14.89#ibcon#read 3, iclass 4, count 0 2006.229.20:09:14.89#ibcon#about to read 4, iclass 4, count 0 2006.229.20:09:14.89#ibcon#read 4, iclass 4, count 0 2006.229.20:09:14.89#ibcon#about to read 5, iclass 4, count 0 2006.229.20:09:14.89#ibcon#read 5, iclass 4, count 0 2006.229.20:09:14.89#ibcon#about to read 6, iclass 4, count 0 2006.229.20:09:14.89#ibcon#read 6, iclass 4, count 0 2006.229.20:09:14.89#ibcon#end of sib2, iclass 4, count 0 2006.229.20:09:14.89#ibcon#*after write, iclass 4, count 0 2006.229.20:09:14.89#ibcon#*before return 0, iclass 4, count 0 2006.229.20:09:14.89#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:09:14.89#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:09:14.89#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:09:14.89#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:09:14.89$vck44/vblo=1,629.99 2006.229.20:09:14.89#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.20:09:14.89#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.20:09:14.89#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:14.89#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:14.89#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:14.89#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:14.89#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:09:14.89#ibcon#first serial, iclass 6, count 0 2006.229.20:09:14.89#ibcon#enter sib2, iclass 6, count 0 2006.229.20:09:14.89#ibcon#flushed, iclass 6, count 0 2006.229.20:09:14.89#ibcon#about to write, iclass 6, count 0 2006.229.20:09:14.89#ibcon#wrote, iclass 6, count 0 2006.229.20:09:14.89#ibcon#about to read 3, iclass 6, count 0 2006.229.20:09:14.91#ibcon#read 3, iclass 6, count 0 2006.229.20:09:14.91#ibcon#about to read 4, iclass 6, count 0 2006.229.20:09:14.91#ibcon#read 4, iclass 6, count 0 2006.229.20:09:14.91#ibcon#about to read 5, iclass 6, count 0 2006.229.20:09:14.91#ibcon#read 5, iclass 6, count 0 2006.229.20:09:14.91#ibcon#about to read 6, iclass 6, count 0 2006.229.20:09:14.91#ibcon#read 6, iclass 6, count 0 2006.229.20:09:14.91#ibcon#end of sib2, iclass 6, count 0 2006.229.20:09:14.91#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:09:14.91#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:09:14.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:09:14.91#ibcon#*before write, iclass 6, count 0 2006.229.20:09:14.91#ibcon#enter sib2, iclass 6, count 0 2006.229.20:09:14.91#ibcon#flushed, iclass 6, count 0 2006.229.20:09:14.91#ibcon#about to write, iclass 6, count 0 2006.229.20:09:14.91#ibcon#wrote, iclass 6, count 0 2006.229.20:09:14.91#ibcon#about to read 3, iclass 6, count 0 2006.229.20:09:14.95#ibcon#read 3, iclass 6, count 0 2006.229.20:09:14.95#ibcon#about to read 4, iclass 6, count 0 2006.229.20:09:14.95#ibcon#read 4, iclass 6, count 0 2006.229.20:09:14.95#ibcon#about to read 5, iclass 6, count 0 2006.229.20:09:14.95#ibcon#read 5, iclass 6, count 0 2006.229.20:09:14.95#ibcon#about to read 6, iclass 6, count 0 2006.229.20:09:14.95#ibcon#read 6, iclass 6, count 0 2006.229.20:09:14.95#ibcon#end of sib2, iclass 6, count 0 2006.229.20:09:14.95#ibcon#*after write, iclass 6, count 0 2006.229.20:09:14.95#ibcon#*before return 0, iclass 6, count 0 2006.229.20:09:14.95#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:14.95#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:09:14.95#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:09:14.95#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:09:14.95$vck44/vb=1,4 2006.229.20:09:14.95#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.20:09:14.95#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.20:09:14.95#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:14.95#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:14.95#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:14.95#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:14.95#ibcon#enter wrdev, iclass 10, count 2 2006.229.20:09:14.95#ibcon#first serial, iclass 10, count 2 2006.229.20:09:14.95#ibcon#enter sib2, iclass 10, count 2 2006.229.20:09:14.95#ibcon#flushed, iclass 10, count 2 2006.229.20:09:14.95#ibcon#about to write, iclass 10, count 2 2006.229.20:09:14.95#ibcon#wrote, iclass 10, count 2 2006.229.20:09:14.95#ibcon#about to read 3, iclass 10, count 2 2006.229.20:09:14.97#ibcon#read 3, iclass 10, count 2 2006.229.20:09:14.97#ibcon#about to read 4, iclass 10, count 2 2006.229.20:09:14.97#ibcon#read 4, iclass 10, count 2 2006.229.20:09:14.97#ibcon#about to read 5, iclass 10, count 2 2006.229.20:09:14.97#ibcon#read 5, iclass 10, count 2 2006.229.20:09:14.97#ibcon#about to read 6, iclass 10, count 2 2006.229.20:09:14.97#ibcon#read 6, iclass 10, count 2 2006.229.20:09:14.97#ibcon#end of sib2, iclass 10, count 2 2006.229.20:09:14.97#ibcon#*mode == 0, iclass 10, count 2 2006.229.20:09:14.97#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.20:09:14.97#ibcon#[27=AT01-04\r\n] 2006.229.20:09:14.97#ibcon#*before write, iclass 10, count 2 2006.229.20:09:14.97#ibcon#enter sib2, iclass 10, count 2 2006.229.20:09:14.97#ibcon#flushed, iclass 10, count 2 2006.229.20:09:14.97#ibcon#about to write, iclass 10, count 2 2006.229.20:09:14.97#ibcon#wrote, iclass 10, count 2 2006.229.20:09:14.97#ibcon#about to read 3, iclass 10, count 2 2006.229.20:09:15.00#ibcon#read 3, iclass 10, count 2 2006.229.20:09:15.00#ibcon#about to read 4, iclass 10, count 2 2006.229.20:09:15.00#ibcon#read 4, iclass 10, count 2 2006.229.20:09:15.00#ibcon#about to read 5, iclass 10, count 2 2006.229.20:09:15.00#ibcon#read 5, iclass 10, count 2 2006.229.20:09:15.00#ibcon#about to read 6, iclass 10, count 2 2006.229.20:09:15.00#ibcon#read 6, iclass 10, count 2 2006.229.20:09:15.00#ibcon#end of sib2, iclass 10, count 2 2006.229.20:09:15.00#ibcon#*after write, iclass 10, count 2 2006.229.20:09:15.00#ibcon#*before return 0, iclass 10, count 2 2006.229.20:09:15.00#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:15.00#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:09:15.00#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.20:09:15.00#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:15.00#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:15.12#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:15.12#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:15.12#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:09:15.12#ibcon#first serial, iclass 10, count 0 2006.229.20:09:15.12#ibcon#enter sib2, iclass 10, count 0 2006.229.20:09:15.12#ibcon#flushed, iclass 10, count 0 2006.229.20:09:15.12#ibcon#about to write, iclass 10, count 0 2006.229.20:09:15.12#ibcon#wrote, iclass 10, count 0 2006.229.20:09:15.12#ibcon#about to read 3, iclass 10, count 0 2006.229.20:09:15.14#ibcon#read 3, iclass 10, count 0 2006.229.20:09:15.14#ibcon#about to read 4, iclass 10, count 0 2006.229.20:09:15.14#ibcon#read 4, iclass 10, count 0 2006.229.20:09:15.14#ibcon#about to read 5, iclass 10, count 0 2006.229.20:09:15.14#ibcon#read 5, iclass 10, count 0 2006.229.20:09:15.14#ibcon#about to read 6, iclass 10, count 0 2006.229.20:09:15.14#ibcon#read 6, iclass 10, count 0 2006.229.20:09:15.14#ibcon#end of sib2, iclass 10, count 0 2006.229.20:09:15.14#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:09:15.14#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:09:15.14#ibcon#[27=USB\r\n] 2006.229.20:09:15.14#ibcon#*before write, iclass 10, count 0 2006.229.20:09:15.14#ibcon#enter sib2, iclass 10, count 0 2006.229.20:09:15.14#ibcon#flushed, iclass 10, count 0 2006.229.20:09:15.14#ibcon#about to write, iclass 10, count 0 2006.229.20:09:15.14#ibcon#wrote, iclass 10, count 0 2006.229.20:09:15.14#ibcon#about to read 3, iclass 10, count 0 2006.229.20:09:15.17#ibcon#read 3, iclass 10, count 0 2006.229.20:09:15.17#ibcon#about to read 4, iclass 10, count 0 2006.229.20:09:15.17#ibcon#read 4, iclass 10, count 0 2006.229.20:09:15.17#ibcon#about to read 5, iclass 10, count 0 2006.229.20:09:15.17#ibcon#read 5, iclass 10, count 0 2006.229.20:09:15.17#ibcon#about to read 6, iclass 10, count 0 2006.229.20:09:15.17#ibcon#read 6, iclass 10, count 0 2006.229.20:09:15.17#ibcon#end of sib2, iclass 10, count 0 2006.229.20:09:15.17#ibcon#*after write, iclass 10, count 0 2006.229.20:09:15.17#ibcon#*before return 0, iclass 10, count 0 2006.229.20:09:15.17#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:15.17#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:09:15.17#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:09:15.17#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:09:15.17$vck44/vblo=2,634.99 2006.229.20:09:15.17#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.20:09:15.17#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.20:09:15.17#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:15.17#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:15.17#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:15.17#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:15.17#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:09:15.17#ibcon#first serial, iclass 12, count 0 2006.229.20:09:15.17#ibcon#enter sib2, iclass 12, count 0 2006.229.20:09:15.17#ibcon#flushed, iclass 12, count 0 2006.229.20:09:15.17#ibcon#about to write, iclass 12, count 0 2006.229.20:09:15.17#ibcon#wrote, iclass 12, count 0 2006.229.20:09:15.17#ibcon#about to read 3, iclass 12, count 0 2006.229.20:09:15.19#ibcon#read 3, iclass 12, count 0 2006.229.20:09:15.19#ibcon#about to read 4, iclass 12, count 0 2006.229.20:09:15.19#ibcon#read 4, iclass 12, count 0 2006.229.20:09:15.19#ibcon#about to read 5, iclass 12, count 0 2006.229.20:09:15.19#ibcon#read 5, iclass 12, count 0 2006.229.20:09:15.19#ibcon#about to read 6, iclass 12, count 0 2006.229.20:09:15.19#ibcon#read 6, iclass 12, count 0 2006.229.20:09:15.19#ibcon#end of sib2, iclass 12, count 0 2006.229.20:09:15.19#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:09:15.19#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:09:15.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:09:15.19#ibcon#*before write, iclass 12, count 0 2006.229.20:09:15.19#ibcon#enter sib2, iclass 12, count 0 2006.229.20:09:15.19#ibcon#flushed, iclass 12, count 0 2006.229.20:09:15.19#ibcon#about to write, iclass 12, count 0 2006.229.20:09:15.19#ibcon#wrote, iclass 12, count 0 2006.229.20:09:15.19#ibcon#about to read 3, iclass 12, count 0 2006.229.20:09:15.23#ibcon#read 3, iclass 12, count 0 2006.229.20:09:15.23#ibcon#about to read 4, iclass 12, count 0 2006.229.20:09:15.23#ibcon#read 4, iclass 12, count 0 2006.229.20:09:15.23#ibcon#about to read 5, iclass 12, count 0 2006.229.20:09:15.23#ibcon#read 5, iclass 12, count 0 2006.229.20:09:15.23#ibcon#about to read 6, iclass 12, count 0 2006.229.20:09:15.23#ibcon#read 6, iclass 12, count 0 2006.229.20:09:15.23#ibcon#end of sib2, iclass 12, count 0 2006.229.20:09:15.23#ibcon#*after write, iclass 12, count 0 2006.229.20:09:15.23#ibcon#*before return 0, iclass 12, count 0 2006.229.20:09:15.23#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:15.23#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:09:15.23#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:09:15.23#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:09:15.23$vck44/vb=2,4 2006.229.20:09:15.23#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.20:09:15.23#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.20:09:15.23#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:15.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:15.29#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:15.29#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:15.29#ibcon#enter wrdev, iclass 14, count 2 2006.229.20:09:15.29#ibcon#first serial, iclass 14, count 2 2006.229.20:09:15.29#ibcon#enter sib2, iclass 14, count 2 2006.229.20:09:15.29#ibcon#flushed, iclass 14, count 2 2006.229.20:09:15.29#ibcon#about to write, iclass 14, count 2 2006.229.20:09:15.29#ibcon#wrote, iclass 14, count 2 2006.229.20:09:15.29#ibcon#about to read 3, iclass 14, count 2 2006.229.20:09:15.31#ibcon#read 3, iclass 14, count 2 2006.229.20:09:15.31#ibcon#about to read 4, iclass 14, count 2 2006.229.20:09:15.31#ibcon#read 4, iclass 14, count 2 2006.229.20:09:15.31#ibcon#about to read 5, iclass 14, count 2 2006.229.20:09:15.31#ibcon#read 5, iclass 14, count 2 2006.229.20:09:15.31#ibcon#about to read 6, iclass 14, count 2 2006.229.20:09:15.31#ibcon#read 6, iclass 14, count 2 2006.229.20:09:15.31#ibcon#end of sib2, iclass 14, count 2 2006.229.20:09:15.31#ibcon#*mode == 0, iclass 14, count 2 2006.229.20:09:15.31#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.20:09:15.31#ibcon#[27=AT02-04\r\n] 2006.229.20:09:15.31#ibcon#*before write, iclass 14, count 2 2006.229.20:09:15.31#ibcon#enter sib2, iclass 14, count 2 2006.229.20:09:15.31#ibcon#flushed, iclass 14, count 2 2006.229.20:09:15.31#ibcon#about to write, iclass 14, count 2 2006.229.20:09:15.31#ibcon#wrote, iclass 14, count 2 2006.229.20:09:15.31#ibcon#about to read 3, iclass 14, count 2 2006.229.20:09:15.34#ibcon#read 3, iclass 14, count 2 2006.229.20:09:15.34#ibcon#about to read 4, iclass 14, count 2 2006.229.20:09:15.34#ibcon#read 4, iclass 14, count 2 2006.229.20:09:15.34#ibcon#about to read 5, iclass 14, count 2 2006.229.20:09:15.34#ibcon#read 5, iclass 14, count 2 2006.229.20:09:15.34#ibcon#about to read 6, iclass 14, count 2 2006.229.20:09:15.34#ibcon#read 6, iclass 14, count 2 2006.229.20:09:15.34#ibcon#end of sib2, iclass 14, count 2 2006.229.20:09:15.34#ibcon#*after write, iclass 14, count 2 2006.229.20:09:15.34#ibcon#*before return 0, iclass 14, count 2 2006.229.20:09:15.34#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:15.34#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:09:15.34#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.20:09:15.34#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:15.34#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:15.46#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:15.46#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:15.46#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:09:15.46#ibcon#first serial, iclass 14, count 0 2006.229.20:09:15.46#ibcon#enter sib2, iclass 14, count 0 2006.229.20:09:15.46#ibcon#flushed, iclass 14, count 0 2006.229.20:09:15.46#ibcon#about to write, iclass 14, count 0 2006.229.20:09:15.46#ibcon#wrote, iclass 14, count 0 2006.229.20:09:15.46#ibcon#about to read 3, iclass 14, count 0 2006.229.20:09:15.48#ibcon#read 3, iclass 14, count 0 2006.229.20:09:15.48#ibcon#about to read 4, iclass 14, count 0 2006.229.20:09:15.48#ibcon#read 4, iclass 14, count 0 2006.229.20:09:15.48#ibcon#about to read 5, iclass 14, count 0 2006.229.20:09:15.48#ibcon#read 5, iclass 14, count 0 2006.229.20:09:15.48#ibcon#about to read 6, iclass 14, count 0 2006.229.20:09:15.48#ibcon#read 6, iclass 14, count 0 2006.229.20:09:15.48#ibcon#end of sib2, iclass 14, count 0 2006.229.20:09:15.48#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:09:15.48#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:09:15.48#ibcon#[27=USB\r\n] 2006.229.20:09:15.48#ibcon#*before write, iclass 14, count 0 2006.229.20:09:15.48#ibcon#enter sib2, iclass 14, count 0 2006.229.20:09:15.48#ibcon#flushed, iclass 14, count 0 2006.229.20:09:15.48#ibcon#about to write, iclass 14, count 0 2006.229.20:09:15.48#ibcon#wrote, iclass 14, count 0 2006.229.20:09:15.48#ibcon#about to read 3, iclass 14, count 0 2006.229.20:09:15.51#ibcon#read 3, iclass 14, count 0 2006.229.20:09:15.51#ibcon#about to read 4, iclass 14, count 0 2006.229.20:09:15.51#ibcon#read 4, iclass 14, count 0 2006.229.20:09:15.51#ibcon#about to read 5, iclass 14, count 0 2006.229.20:09:15.51#ibcon#read 5, iclass 14, count 0 2006.229.20:09:15.51#ibcon#about to read 6, iclass 14, count 0 2006.229.20:09:15.51#ibcon#read 6, iclass 14, count 0 2006.229.20:09:15.51#ibcon#end of sib2, iclass 14, count 0 2006.229.20:09:15.51#ibcon#*after write, iclass 14, count 0 2006.229.20:09:15.51#ibcon#*before return 0, iclass 14, count 0 2006.229.20:09:15.51#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:15.51#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:09:15.51#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:09:15.51#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:09:15.51$vck44/vblo=3,649.99 2006.229.20:09:15.51#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.20:09:15.51#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.20:09:15.51#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:15.51#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:15.51#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:15.51#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:15.51#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:09:15.51#ibcon#first serial, iclass 16, count 0 2006.229.20:09:15.51#ibcon#enter sib2, iclass 16, count 0 2006.229.20:09:15.51#ibcon#flushed, iclass 16, count 0 2006.229.20:09:15.51#ibcon#about to write, iclass 16, count 0 2006.229.20:09:15.51#ibcon#wrote, iclass 16, count 0 2006.229.20:09:15.51#ibcon#about to read 3, iclass 16, count 0 2006.229.20:09:15.53#ibcon#read 3, iclass 16, count 0 2006.229.20:09:15.53#ibcon#about to read 4, iclass 16, count 0 2006.229.20:09:15.53#ibcon#read 4, iclass 16, count 0 2006.229.20:09:15.53#ibcon#about to read 5, iclass 16, count 0 2006.229.20:09:15.53#ibcon#read 5, iclass 16, count 0 2006.229.20:09:15.53#ibcon#about to read 6, iclass 16, count 0 2006.229.20:09:15.53#ibcon#read 6, iclass 16, count 0 2006.229.20:09:15.53#ibcon#end of sib2, iclass 16, count 0 2006.229.20:09:15.53#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:09:15.53#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:09:15.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:09:15.53#ibcon#*before write, iclass 16, count 0 2006.229.20:09:15.53#ibcon#enter sib2, iclass 16, count 0 2006.229.20:09:15.53#ibcon#flushed, iclass 16, count 0 2006.229.20:09:15.53#ibcon#about to write, iclass 16, count 0 2006.229.20:09:15.53#ibcon#wrote, iclass 16, count 0 2006.229.20:09:15.53#ibcon#about to read 3, iclass 16, count 0 2006.229.20:09:15.57#ibcon#read 3, iclass 16, count 0 2006.229.20:09:15.57#ibcon#about to read 4, iclass 16, count 0 2006.229.20:09:15.57#ibcon#read 4, iclass 16, count 0 2006.229.20:09:15.57#ibcon#about to read 5, iclass 16, count 0 2006.229.20:09:15.57#ibcon#read 5, iclass 16, count 0 2006.229.20:09:15.57#ibcon#about to read 6, iclass 16, count 0 2006.229.20:09:15.57#ibcon#read 6, iclass 16, count 0 2006.229.20:09:15.57#ibcon#end of sib2, iclass 16, count 0 2006.229.20:09:15.57#ibcon#*after write, iclass 16, count 0 2006.229.20:09:15.57#ibcon#*before return 0, iclass 16, count 0 2006.229.20:09:15.57#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:15.57#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:09:15.57#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:09:15.57#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:09:15.57$vck44/vb=3,4 2006.229.20:09:15.57#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.20:09:15.57#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.20:09:15.57#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:15.57#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:15.63#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:15.63#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:15.63#ibcon#enter wrdev, iclass 18, count 2 2006.229.20:09:15.63#ibcon#first serial, iclass 18, count 2 2006.229.20:09:15.63#ibcon#enter sib2, iclass 18, count 2 2006.229.20:09:15.63#ibcon#flushed, iclass 18, count 2 2006.229.20:09:15.63#ibcon#about to write, iclass 18, count 2 2006.229.20:09:15.63#ibcon#wrote, iclass 18, count 2 2006.229.20:09:15.63#ibcon#about to read 3, iclass 18, count 2 2006.229.20:09:15.65#ibcon#read 3, iclass 18, count 2 2006.229.20:09:15.65#ibcon#about to read 4, iclass 18, count 2 2006.229.20:09:15.65#ibcon#read 4, iclass 18, count 2 2006.229.20:09:15.65#ibcon#about to read 5, iclass 18, count 2 2006.229.20:09:15.65#ibcon#read 5, iclass 18, count 2 2006.229.20:09:15.65#ibcon#about to read 6, iclass 18, count 2 2006.229.20:09:15.65#ibcon#read 6, iclass 18, count 2 2006.229.20:09:15.65#ibcon#end of sib2, iclass 18, count 2 2006.229.20:09:15.65#ibcon#*mode == 0, iclass 18, count 2 2006.229.20:09:15.65#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.20:09:15.65#ibcon#[27=AT03-04\r\n] 2006.229.20:09:15.65#ibcon#*before write, iclass 18, count 2 2006.229.20:09:15.65#ibcon#enter sib2, iclass 18, count 2 2006.229.20:09:15.65#ibcon#flushed, iclass 18, count 2 2006.229.20:09:15.65#ibcon#about to write, iclass 18, count 2 2006.229.20:09:15.65#ibcon#wrote, iclass 18, count 2 2006.229.20:09:15.65#ibcon#about to read 3, iclass 18, count 2 2006.229.20:09:15.68#ibcon#read 3, iclass 18, count 2 2006.229.20:09:15.68#ibcon#about to read 4, iclass 18, count 2 2006.229.20:09:15.68#ibcon#read 4, iclass 18, count 2 2006.229.20:09:15.68#ibcon#about to read 5, iclass 18, count 2 2006.229.20:09:15.68#ibcon#read 5, iclass 18, count 2 2006.229.20:09:15.68#ibcon#about to read 6, iclass 18, count 2 2006.229.20:09:15.68#ibcon#read 6, iclass 18, count 2 2006.229.20:09:15.68#ibcon#end of sib2, iclass 18, count 2 2006.229.20:09:15.68#ibcon#*after write, iclass 18, count 2 2006.229.20:09:15.68#ibcon#*before return 0, iclass 18, count 2 2006.229.20:09:15.68#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:15.68#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:09:15.68#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.20:09:15.68#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:15.68#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:15.80#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:15.80#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:15.80#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:09:15.80#ibcon#first serial, iclass 18, count 0 2006.229.20:09:15.80#ibcon#enter sib2, iclass 18, count 0 2006.229.20:09:15.80#ibcon#flushed, iclass 18, count 0 2006.229.20:09:15.80#ibcon#about to write, iclass 18, count 0 2006.229.20:09:15.80#ibcon#wrote, iclass 18, count 0 2006.229.20:09:15.80#ibcon#about to read 3, iclass 18, count 0 2006.229.20:09:15.82#ibcon#read 3, iclass 18, count 0 2006.229.20:09:15.82#ibcon#about to read 4, iclass 18, count 0 2006.229.20:09:15.82#ibcon#read 4, iclass 18, count 0 2006.229.20:09:15.82#ibcon#about to read 5, iclass 18, count 0 2006.229.20:09:15.82#ibcon#read 5, iclass 18, count 0 2006.229.20:09:15.82#ibcon#about to read 6, iclass 18, count 0 2006.229.20:09:15.82#ibcon#read 6, iclass 18, count 0 2006.229.20:09:15.82#ibcon#end of sib2, iclass 18, count 0 2006.229.20:09:15.82#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:09:15.82#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:09:15.82#ibcon#[27=USB\r\n] 2006.229.20:09:15.82#ibcon#*before write, iclass 18, count 0 2006.229.20:09:15.82#ibcon#enter sib2, iclass 18, count 0 2006.229.20:09:15.82#ibcon#flushed, iclass 18, count 0 2006.229.20:09:15.82#ibcon#about to write, iclass 18, count 0 2006.229.20:09:15.82#ibcon#wrote, iclass 18, count 0 2006.229.20:09:15.82#ibcon#about to read 3, iclass 18, count 0 2006.229.20:09:15.85#ibcon#read 3, iclass 18, count 0 2006.229.20:09:15.85#ibcon#about to read 4, iclass 18, count 0 2006.229.20:09:15.85#ibcon#read 4, iclass 18, count 0 2006.229.20:09:15.85#ibcon#about to read 5, iclass 18, count 0 2006.229.20:09:15.85#ibcon#read 5, iclass 18, count 0 2006.229.20:09:15.85#ibcon#about to read 6, iclass 18, count 0 2006.229.20:09:15.85#ibcon#read 6, iclass 18, count 0 2006.229.20:09:15.85#ibcon#end of sib2, iclass 18, count 0 2006.229.20:09:15.85#ibcon#*after write, iclass 18, count 0 2006.229.20:09:15.85#ibcon#*before return 0, iclass 18, count 0 2006.229.20:09:15.85#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:15.85#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:09:15.85#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:09:15.85#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:09:15.85$vck44/vblo=4,679.99 2006.229.20:09:15.85#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.20:09:15.85#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.20:09:15.85#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:15.85#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:15.85#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:15.85#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:15.85#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:09:15.85#ibcon#first serial, iclass 20, count 0 2006.229.20:09:15.85#ibcon#enter sib2, iclass 20, count 0 2006.229.20:09:15.85#ibcon#flushed, iclass 20, count 0 2006.229.20:09:15.85#ibcon#about to write, iclass 20, count 0 2006.229.20:09:15.85#ibcon#wrote, iclass 20, count 0 2006.229.20:09:15.85#ibcon#about to read 3, iclass 20, count 0 2006.229.20:09:15.87#ibcon#read 3, iclass 20, count 0 2006.229.20:09:15.87#ibcon#about to read 4, iclass 20, count 0 2006.229.20:09:15.87#ibcon#read 4, iclass 20, count 0 2006.229.20:09:15.87#ibcon#about to read 5, iclass 20, count 0 2006.229.20:09:15.87#ibcon#read 5, iclass 20, count 0 2006.229.20:09:15.87#ibcon#about to read 6, iclass 20, count 0 2006.229.20:09:15.87#ibcon#read 6, iclass 20, count 0 2006.229.20:09:15.87#ibcon#end of sib2, iclass 20, count 0 2006.229.20:09:15.87#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:09:15.87#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:09:15.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:09:15.87#ibcon#*before write, iclass 20, count 0 2006.229.20:09:15.87#ibcon#enter sib2, iclass 20, count 0 2006.229.20:09:15.87#ibcon#flushed, iclass 20, count 0 2006.229.20:09:15.87#ibcon#about to write, iclass 20, count 0 2006.229.20:09:15.87#ibcon#wrote, iclass 20, count 0 2006.229.20:09:15.87#ibcon#about to read 3, iclass 20, count 0 2006.229.20:09:15.91#ibcon#read 3, iclass 20, count 0 2006.229.20:09:15.91#ibcon#about to read 4, iclass 20, count 0 2006.229.20:09:15.91#ibcon#read 4, iclass 20, count 0 2006.229.20:09:15.91#ibcon#about to read 5, iclass 20, count 0 2006.229.20:09:15.91#ibcon#read 5, iclass 20, count 0 2006.229.20:09:15.91#ibcon#about to read 6, iclass 20, count 0 2006.229.20:09:15.91#ibcon#read 6, iclass 20, count 0 2006.229.20:09:15.91#ibcon#end of sib2, iclass 20, count 0 2006.229.20:09:15.91#ibcon#*after write, iclass 20, count 0 2006.229.20:09:15.91#ibcon#*before return 0, iclass 20, count 0 2006.229.20:09:15.91#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:15.91#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:09:15.91#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:09:15.91#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:09:15.91$vck44/vb=4,4 2006.229.20:09:15.91#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.20:09:15.91#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.20:09:15.91#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:15.91#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:09:15.97#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:09:15.97#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:09:15.97#ibcon#enter wrdev, iclass 22, count 2 2006.229.20:09:15.97#ibcon#first serial, iclass 22, count 2 2006.229.20:09:15.97#ibcon#enter sib2, iclass 22, count 2 2006.229.20:09:15.97#ibcon#flushed, iclass 22, count 2 2006.229.20:09:15.97#ibcon#about to write, iclass 22, count 2 2006.229.20:09:15.97#ibcon#wrote, iclass 22, count 2 2006.229.20:09:15.97#ibcon#about to read 3, iclass 22, count 2 2006.229.20:09:15.99#ibcon#read 3, iclass 22, count 2 2006.229.20:09:15.99#ibcon#about to read 4, iclass 22, count 2 2006.229.20:09:15.99#ibcon#read 4, iclass 22, count 2 2006.229.20:09:15.99#ibcon#about to read 5, iclass 22, count 2 2006.229.20:09:15.99#ibcon#read 5, iclass 22, count 2 2006.229.20:09:15.99#ibcon#about to read 6, iclass 22, count 2 2006.229.20:09:15.99#ibcon#read 6, iclass 22, count 2 2006.229.20:09:15.99#ibcon#end of sib2, iclass 22, count 2 2006.229.20:09:15.99#ibcon#*mode == 0, iclass 22, count 2 2006.229.20:09:15.99#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.20:09:15.99#ibcon#[27=AT04-04\r\n] 2006.229.20:09:15.99#ibcon#*before write, iclass 22, count 2 2006.229.20:09:15.99#ibcon#enter sib2, iclass 22, count 2 2006.229.20:09:15.99#ibcon#flushed, iclass 22, count 2 2006.229.20:09:15.99#ibcon#about to write, iclass 22, count 2 2006.229.20:09:15.99#ibcon#wrote, iclass 22, count 2 2006.229.20:09:15.99#ibcon#about to read 3, iclass 22, count 2 2006.229.20:09:16.02#ibcon#read 3, iclass 22, count 2 2006.229.20:09:16.02#ibcon#about to read 4, iclass 22, count 2 2006.229.20:09:16.02#ibcon#read 4, iclass 22, count 2 2006.229.20:09:16.02#ibcon#about to read 5, iclass 22, count 2 2006.229.20:09:16.02#ibcon#read 5, iclass 22, count 2 2006.229.20:09:16.02#ibcon#about to read 6, iclass 22, count 2 2006.229.20:09:16.02#ibcon#read 6, iclass 22, count 2 2006.229.20:09:16.02#ibcon#end of sib2, iclass 22, count 2 2006.229.20:09:16.02#ibcon#*after write, iclass 22, count 2 2006.229.20:09:16.02#ibcon#*before return 0, iclass 22, count 2 2006.229.20:09:16.02#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:09:16.02#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:09:16.02#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.20:09:16.02#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:16.02#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:09:16.14#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:09:16.14#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:09:16.14#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:09:16.14#ibcon#first serial, iclass 22, count 0 2006.229.20:09:16.14#ibcon#enter sib2, iclass 22, count 0 2006.229.20:09:16.14#ibcon#flushed, iclass 22, count 0 2006.229.20:09:16.14#ibcon#about to write, iclass 22, count 0 2006.229.20:09:16.14#ibcon#wrote, iclass 22, count 0 2006.229.20:09:16.14#ibcon#about to read 3, iclass 22, count 0 2006.229.20:09:16.16#ibcon#read 3, iclass 22, count 0 2006.229.20:09:16.16#ibcon#about to read 4, iclass 22, count 0 2006.229.20:09:16.16#ibcon#read 4, iclass 22, count 0 2006.229.20:09:16.16#ibcon#about to read 5, iclass 22, count 0 2006.229.20:09:16.16#ibcon#read 5, iclass 22, count 0 2006.229.20:09:16.16#ibcon#about to read 6, iclass 22, count 0 2006.229.20:09:16.16#ibcon#read 6, iclass 22, count 0 2006.229.20:09:16.16#ibcon#end of sib2, iclass 22, count 0 2006.229.20:09:16.16#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:09:16.16#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:09:16.16#ibcon#[27=USB\r\n] 2006.229.20:09:16.16#ibcon#*before write, iclass 22, count 0 2006.229.20:09:16.16#ibcon#enter sib2, iclass 22, count 0 2006.229.20:09:16.16#ibcon#flushed, iclass 22, count 0 2006.229.20:09:16.16#ibcon#about to write, iclass 22, count 0 2006.229.20:09:16.16#ibcon#wrote, iclass 22, count 0 2006.229.20:09:16.16#ibcon#about to read 3, iclass 22, count 0 2006.229.20:09:16.19#ibcon#read 3, iclass 22, count 0 2006.229.20:09:16.19#ibcon#about to read 4, iclass 22, count 0 2006.229.20:09:16.19#ibcon#read 4, iclass 22, count 0 2006.229.20:09:16.19#ibcon#about to read 5, iclass 22, count 0 2006.229.20:09:16.19#ibcon#read 5, iclass 22, count 0 2006.229.20:09:16.19#ibcon#about to read 6, iclass 22, count 0 2006.229.20:09:16.19#ibcon#read 6, iclass 22, count 0 2006.229.20:09:16.19#ibcon#end of sib2, iclass 22, count 0 2006.229.20:09:16.19#ibcon#*after write, iclass 22, count 0 2006.229.20:09:16.19#ibcon#*before return 0, iclass 22, count 0 2006.229.20:09:16.19#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:09:16.19#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:09:16.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:09:16.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:09:16.19$vck44/vblo=5,709.99 2006.229.20:09:16.19#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.20:09:16.19#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.20:09:16.19#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:16.19#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:09:16.19#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:09:16.19#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:09:16.19#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:09:16.19#ibcon#first serial, iclass 24, count 0 2006.229.20:09:16.19#ibcon#enter sib2, iclass 24, count 0 2006.229.20:09:16.19#ibcon#flushed, iclass 24, count 0 2006.229.20:09:16.19#ibcon#about to write, iclass 24, count 0 2006.229.20:09:16.19#ibcon#wrote, iclass 24, count 0 2006.229.20:09:16.19#ibcon#about to read 3, iclass 24, count 0 2006.229.20:09:16.21#ibcon#read 3, iclass 24, count 0 2006.229.20:09:16.21#ibcon#about to read 4, iclass 24, count 0 2006.229.20:09:16.21#ibcon#read 4, iclass 24, count 0 2006.229.20:09:16.21#ibcon#about to read 5, iclass 24, count 0 2006.229.20:09:16.21#ibcon#read 5, iclass 24, count 0 2006.229.20:09:16.21#ibcon#about to read 6, iclass 24, count 0 2006.229.20:09:16.21#ibcon#read 6, iclass 24, count 0 2006.229.20:09:16.21#ibcon#end of sib2, iclass 24, count 0 2006.229.20:09:16.21#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:09:16.21#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:09:16.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:09:16.21#ibcon#*before write, iclass 24, count 0 2006.229.20:09:16.21#ibcon#enter sib2, iclass 24, count 0 2006.229.20:09:16.21#ibcon#flushed, iclass 24, count 0 2006.229.20:09:16.21#ibcon#about to write, iclass 24, count 0 2006.229.20:09:16.21#ibcon#wrote, iclass 24, count 0 2006.229.20:09:16.21#ibcon#about to read 3, iclass 24, count 0 2006.229.20:09:16.25#ibcon#read 3, iclass 24, count 0 2006.229.20:09:16.25#ibcon#about to read 4, iclass 24, count 0 2006.229.20:09:16.25#ibcon#read 4, iclass 24, count 0 2006.229.20:09:16.25#ibcon#about to read 5, iclass 24, count 0 2006.229.20:09:16.25#ibcon#read 5, iclass 24, count 0 2006.229.20:09:16.25#ibcon#about to read 6, iclass 24, count 0 2006.229.20:09:16.25#ibcon#read 6, iclass 24, count 0 2006.229.20:09:16.25#ibcon#end of sib2, iclass 24, count 0 2006.229.20:09:16.25#ibcon#*after write, iclass 24, count 0 2006.229.20:09:16.25#ibcon#*before return 0, iclass 24, count 0 2006.229.20:09:16.25#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:09:16.25#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:09:16.25#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:09:16.25#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:09:16.25$vck44/vb=5,4 2006.229.20:09:16.25#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.20:09:16.25#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.20:09:16.25#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:16.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:09:16.31#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:09:16.31#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:09:16.31#ibcon#enter wrdev, iclass 26, count 2 2006.229.20:09:16.31#ibcon#first serial, iclass 26, count 2 2006.229.20:09:16.31#ibcon#enter sib2, iclass 26, count 2 2006.229.20:09:16.31#ibcon#flushed, iclass 26, count 2 2006.229.20:09:16.31#ibcon#about to write, iclass 26, count 2 2006.229.20:09:16.31#ibcon#wrote, iclass 26, count 2 2006.229.20:09:16.31#ibcon#about to read 3, iclass 26, count 2 2006.229.20:09:16.33#ibcon#read 3, iclass 26, count 2 2006.229.20:09:16.33#ibcon#about to read 4, iclass 26, count 2 2006.229.20:09:16.33#ibcon#read 4, iclass 26, count 2 2006.229.20:09:16.33#ibcon#about to read 5, iclass 26, count 2 2006.229.20:09:16.33#ibcon#read 5, iclass 26, count 2 2006.229.20:09:16.33#ibcon#about to read 6, iclass 26, count 2 2006.229.20:09:16.33#ibcon#read 6, iclass 26, count 2 2006.229.20:09:16.33#ibcon#end of sib2, iclass 26, count 2 2006.229.20:09:16.33#ibcon#*mode == 0, iclass 26, count 2 2006.229.20:09:16.33#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.20:09:16.33#ibcon#[27=AT05-04\r\n] 2006.229.20:09:16.33#ibcon#*before write, iclass 26, count 2 2006.229.20:09:16.33#ibcon#enter sib2, iclass 26, count 2 2006.229.20:09:16.33#ibcon#flushed, iclass 26, count 2 2006.229.20:09:16.33#ibcon#about to write, iclass 26, count 2 2006.229.20:09:16.33#ibcon#wrote, iclass 26, count 2 2006.229.20:09:16.33#ibcon#about to read 3, iclass 26, count 2 2006.229.20:09:16.36#ibcon#read 3, iclass 26, count 2 2006.229.20:09:16.36#ibcon#about to read 4, iclass 26, count 2 2006.229.20:09:16.36#ibcon#read 4, iclass 26, count 2 2006.229.20:09:16.36#ibcon#about to read 5, iclass 26, count 2 2006.229.20:09:16.36#ibcon#read 5, iclass 26, count 2 2006.229.20:09:16.36#ibcon#about to read 6, iclass 26, count 2 2006.229.20:09:16.36#ibcon#read 6, iclass 26, count 2 2006.229.20:09:16.36#ibcon#end of sib2, iclass 26, count 2 2006.229.20:09:16.36#ibcon#*after write, iclass 26, count 2 2006.229.20:09:16.36#ibcon#*before return 0, iclass 26, count 2 2006.229.20:09:16.36#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:09:16.36#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:09:16.36#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.20:09:16.36#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:16.36#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:09:16.48#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:09:16.48#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:09:16.48#ibcon#enter wrdev, iclass 26, count 0 2006.229.20:09:16.48#ibcon#first serial, iclass 26, count 0 2006.229.20:09:16.48#ibcon#enter sib2, iclass 26, count 0 2006.229.20:09:16.48#ibcon#flushed, iclass 26, count 0 2006.229.20:09:16.48#ibcon#about to write, iclass 26, count 0 2006.229.20:09:16.48#ibcon#wrote, iclass 26, count 0 2006.229.20:09:16.48#ibcon#about to read 3, iclass 26, count 0 2006.229.20:09:16.50#ibcon#read 3, iclass 26, count 0 2006.229.20:09:16.50#ibcon#about to read 4, iclass 26, count 0 2006.229.20:09:16.50#ibcon#read 4, iclass 26, count 0 2006.229.20:09:16.50#ibcon#about to read 5, iclass 26, count 0 2006.229.20:09:16.50#ibcon#read 5, iclass 26, count 0 2006.229.20:09:16.50#ibcon#about to read 6, iclass 26, count 0 2006.229.20:09:16.50#ibcon#read 6, iclass 26, count 0 2006.229.20:09:16.50#ibcon#end of sib2, iclass 26, count 0 2006.229.20:09:16.50#ibcon#*mode == 0, iclass 26, count 0 2006.229.20:09:16.50#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.20:09:16.50#ibcon#[27=USB\r\n] 2006.229.20:09:16.50#ibcon#*before write, iclass 26, count 0 2006.229.20:09:16.50#ibcon#enter sib2, iclass 26, count 0 2006.229.20:09:16.50#ibcon#flushed, iclass 26, count 0 2006.229.20:09:16.50#ibcon#about to write, iclass 26, count 0 2006.229.20:09:16.50#ibcon#wrote, iclass 26, count 0 2006.229.20:09:16.50#ibcon#about to read 3, iclass 26, count 0 2006.229.20:09:16.53#ibcon#read 3, iclass 26, count 0 2006.229.20:09:16.53#ibcon#about to read 4, iclass 26, count 0 2006.229.20:09:16.53#ibcon#read 4, iclass 26, count 0 2006.229.20:09:16.53#ibcon#about to read 5, iclass 26, count 0 2006.229.20:09:16.53#ibcon#read 5, iclass 26, count 0 2006.229.20:09:16.53#ibcon#about to read 6, iclass 26, count 0 2006.229.20:09:16.53#ibcon#read 6, iclass 26, count 0 2006.229.20:09:16.53#ibcon#end of sib2, iclass 26, count 0 2006.229.20:09:16.53#ibcon#*after write, iclass 26, count 0 2006.229.20:09:16.53#ibcon#*before return 0, iclass 26, count 0 2006.229.20:09:16.53#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:09:16.53#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:09:16.53#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.20:09:16.53#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.20:09:16.53$vck44/vblo=6,719.99 2006.229.20:09:16.53#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.20:09:16.53#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.20:09:16.53#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:16.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:16.53#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:16.53#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:16.53#ibcon#enter wrdev, iclass 28, count 0 2006.229.20:09:16.53#ibcon#first serial, iclass 28, count 0 2006.229.20:09:16.53#ibcon#enter sib2, iclass 28, count 0 2006.229.20:09:16.53#ibcon#flushed, iclass 28, count 0 2006.229.20:09:16.53#ibcon#about to write, iclass 28, count 0 2006.229.20:09:16.53#ibcon#wrote, iclass 28, count 0 2006.229.20:09:16.53#ibcon#about to read 3, iclass 28, count 0 2006.229.20:09:16.55#ibcon#read 3, iclass 28, count 0 2006.229.20:09:16.55#ibcon#about to read 4, iclass 28, count 0 2006.229.20:09:16.55#ibcon#read 4, iclass 28, count 0 2006.229.20:09:16.55#ibcon#about to read 5, iclass 28, count 0 2006.229.20:09:16.55#ibcon#read 5, iclass 28, count 0 2006.229.20:09:16.55#ibcon#about to read 6, iclass 28, count 0 2006.229.20:09:16.55#ibcon#read 6, iclass 28, count 0 2006.229.20:09:16.55#ibcon#end of sib2, iclass 28, count 0 2006.229.20:09:16.55#ibcon#*mode == 0, iclass 28, count 0 2006.229.20:09:16.55#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.20:09:16.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:09:16.55#ibcon#*before write, iclass 28, count 0 2006.229.20:09:16.55#ibcon#enter sib2, iclass 28, count 0 2006.229.20:09:16.55#ibcon#flushed, iclass 28, count 0 2006.229.20:09:16.55#ibcon#about to write, iclass 28, count 0 2006.229.20:09:16.55#ibcon#wrote, iclass 28, count 0 2006.229.20:09:16.55#ibcon#about to read 3, iclass 28, count 0 2006.229.20:09:16.59#ibcon#read 3, iclass 28, count 0 2006.229.20:09:16.59#ibcon#about to read 4, iclass 28, count 0 2006.229.20:09:16.59#ibcon#read 4, iclass 28, count 0 2006.229.20:09:16.59#ibcon#about to read 5, iclass 28, count 0 2006.229.20:09:16.59#ibcon#read 5, iclass 28, count 0 2006.229.20:09:16.59#ibcon#about to read 6, iclass 28, count 0 2006.229.20:09:16.59#ibcon#read 6, iclass 28, count 0 2006.229.20:09:16.59#ibcon#end of sib2, iclass 28, count 0 2006.229.20:09:16.59#ibcon#*after write, iclass 28, count 0 2006.229.20:09:16.59#ibcon#*before return 0, iclass 28, count 0 2006.229.20:09:16.59#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:16.59#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:09:16.59#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.20:09:16.59#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.20:09:16.59$vck44/vb=6,4 2006.229.20:09:16.59#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.20:09:16.59#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.20:09:16.59#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:16.59#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:16.65#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:16.65#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:16.65#ibcon#enter wrdev, iclass 30, count 2 2006.229.20:09:16.65#ibcon#first serial, iclass 30, count 2 2006.229.20:09:16.65#ibcon#enter sib2, iclass 30, count 2 2006.229.20:09:16.65#ibcon#flushed, iclass 30, count 2 2006.229.20:09:16.65#ibcon#about to write, iclass 30, count 2 2006.229.20:09:16.65#ibcon#wrote, iclass 30, count 2 2006.229.20:09:16.65#ibcon#about to read 3, iclass 30, count 2 2006.229.20:09:16.67#ibcon#read 3, iclass 30, count 2 2006.229.20:09:16.67#ibcon#about to read 4, iclass 30, count 2 2006.229.20:09:16.67#ibcon#read 4, iclass 30, count 2 2006.229.20:09:16.67#ibcon#about to read 5, iclass 30, count 2 2006.229.20:09:16.67#ibcon#read 5, iclass 30, count 2 2006.229.20:09:16.67#ibcon#about to read 6, iclass 30, count 2 2006.229.20:09:16.67#ibcon#read 6, iclass 30, count 2 2006.229.20:09:16.67#ibcon#end of sib2, iclass 30, count 2 2006.229.20:09:16.67#ibcon#*mode == 0, iclass 30, count 2 2006.229.20:09:16.67#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.20:09:16.67#ibcon#[27=AT06-04\r\n] 2006.229.20:09:16.67#ibcon#*before write, iclass 30, count 2 2006.229.20:09:16.67#ibcon#enter sib2, iclass 30, count 2 2006.229.20:09:16.67#ibcon#flushed, iclass 30, count 2 2006.229.20:09:16.67#ibcon#about to write, iclass 30, count 2 2006.229.20:09:16.67#ibcon#wrote, iclass 30, count 2 2006.229.20:09:16.67#ibcon#about to read 3, iclass 30, count 2 2006.229.20:09:16.70#ibcon#read 3, iclass 30, count 2 2006.229.20:09:16.70#ibcon#about to read 4, iclass 30, count 2 2006.229.20:09:16.70#ibcon#read 4, iclass 30, count 2 2006.229.20:09:16.70#ibcon#about to read 5, iclass 30, count 2 2006.229.20:09:16.70#ibcon#read 5, iclass 30, count 2 2006.229.20:09:16.70#ibcon#about to read 6, iclass 30, count 2 2006.229.20:09:16.70#ibcon#read 6, iclass 30, count 2 2006.229.20:09:16.70#ibcon#end of sib2, iclass 30, count 2 2006.229.20:09:16.70#ibcon#*after write, iclass 30, count 2 2006.229.20:09:16.70#ibcon#*before return 0, iclass 30, count 2 2006.229.20:09:16.70#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:16.70#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.20:09:16.70#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.20:09:16.70#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:16.70#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:16.82#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:16.82#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:16.82#ibcon#enter wrdev, iclass 30, count 0 2006.229.20:09:16.82#ibcon#first serial, iclass 30, count 0 2006.229.20:09:16.82#ibcon#enter sib2, iclass 30, count 0 2006.229.20:09:16.82#ibcon#flushed, iclass 30, count 0 2006.229.20:09:16.82#ibcon#about to write, iclass 30, count 0 2006.229.20:09:16.82#ibcon#wrote, iclass 30, count 0 2006.229.20:09:16.82#ibcon#about to read 3, iclass 30, count 0 2006.229.20:09:16.84#ibcon#read 3, iclass 30, count 0 2006.229.20:09:16.84#ibcon#about to read 4, iclass 30, count 0 2006.229.20:09:16.84#ibcon#read 4, iclass 30, count 0 2006.229.20:09:16.84#ibcon#about to read 5, iclass 30, count 0 2006.229.20:09:16.84#ibcon#read 5, iclass 30, count 0 2006.229.20:09:16.84#ibcon#about to read 6, iclass 30, count 0 2006.229.20:09:16.84#ibcon#read 6, iclass 30, count 0 2006.229.20:09:16.84#ibcon#end of sib2, iclass 30, count 0 2006.229.20:09:16.84#ibcon#*mode == 0, iclass 30, count 0 2006.229.20:09:16.84#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.20:09:16.84#ibcon#[27=USB\r\n] 2006.229.20:09:16.84#ibcon#*before write, iclass 30, count 0 2006.229.20:09:16.84#ibcon#enter sib2, iclass 30, count 0 2006.229.20:09:16.84#ibcon#flushed, iclass 30, count 0 2006.229.20:09:16.84#ibcon#about to write, iclass 30, count 0 2006.229.20:09:16.84#ibcon#wrote, iclass 30, count 0 2006.229.20:09:16.84#ibcon#about to read 3, iclass 30, count 0 2006.229.20:09:16.87#ibcon#read 3, iclass 30, count 0 2006.229.20:09:16.87#ibcon#about to read 4, iclass 30, count 0 2006.229.20:09:16.87#ibcon#read 4, iclass 30, count 0 2006.229.20:09:16.87#ibcon#about to read 5, iclass 30, count 0 2006.229.20:09:16.87#ibcon#read 5, iclass 30, count 0 2006.229.20:09:16.87#ibcon#about to read 6, iclass 30, count 0 2006.229.20:09:16.87#ibcon#read 6, iclass 30, count 0 2006.229.20:09:16.87#ibcon#end of sib2, iclass 30, count 0 2006.229.20:09:16.87#ibcon#*after write, iclass 30, count 0 2006.229.20:09:16.87#ibcon#*before return 0, iclass 30, count 0 2006.229.20:09:16.87#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:16.87#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.20:09:16.87#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.20:09:16.87#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.20:09:16.87$vck44/vblo=7,734.99 2006.229.20:09:16.87#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.20:09:16.87#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.20:09:16.87#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:16.87#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:16.87#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:16.87#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:16.87#ibcon#enter wrdev, iclass 32, count 0 2006.229.20:09:16.87#ibcon#first serial, iclass 32, count 0 2006.229.20:09:16.87#ibcon#enter sib2, iclass 32, count 0 2006.229.20:09:16.87#ibcon#flushed, iclass 32, count 0 2006.229.20:09:16.87#ibcon#about to write, iclass 32, count 0 2006.229.20:09:16.87#ibcon#wrote, iclass 32, count 0 2006.229.20:09:16.87#ibcon#about to read 3, iclass 32, count 0 2006.229.20:09:16.89#ibcon#read 3, iclass 32, count 0 2006.229.20:09:16.89#ibcon#about to read 4, iclass 32, count 0 2006.229.20:09:16.89#ibcon#read 4, iclass 32, count 0 2006.229.20:09:16.89#ibcon#about to read 5, iclass 32, count 0 2006.229.20:09:16.89#ibcon#read 5, iclass 32, count 0 2006.229.20:09:16.89#ibcon#about to read 6, iclass 32, count 0 2006.229.20:09:16.89#ibcon#read 6, iclass 32, count 0 2006.229.20:09:16.89#ibcon#end of sib2, iclass 32, count 0 2006.229.20:09:16.89#ibcon#*mode == 0, iclass 32, count 0 2006.229.20:09:16.89#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.20:09:16.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:09:16.89#ibcon#*before write, iclass 32, count 0 2006.229.20:09:16.89#ibcon#enter sib2, iclass 32, count 0 2006.229.20:09:16.89#ibcon#flushed, iclass 32, count 0 2006.229.20:09:16.89#ibcon#about to write, iclass 32, count 0 2006.229.20:09:16.89#ibcon#wrote, iclass 32, count 0 2006.229.20:09:16.89#ibcon#about to read 3, iclass 32, count 0 2006.229.20:09:16.93#ibcon#read 3, iclass 32, count 0 2006.229.20:09:16.93#ibcon#about to read 4, iclass 32, count 0 2006.229.20:09:16.93#ibcon#read 4, iclass 32, count 0 2006.229.20:09:16.93#ibcon#about to read 5, iclass 32, count 0 2006.229.20:09:16.93#ibcon#read 5, iclass 32, count 0 2006.229.20:09:16.93#ibcon#about to read 6, iclass 32, count 0 2006.229.20:09:16.93#ibcon#read 6, iclass 32, count 0 2006.229.20:09:16.93#ibcon#end of sib2, iclass 32, count 0 2006.229.20:09:16.93#ibcon#*after write, iclass 32, count 0 2006.229.20:09:16.93#ibcon#*before return 0, iclass 32, count 0 2006.229.20:09:16.93#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:16.93#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:09:16.93#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.20:09:16.93#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.20:09:16.93$vck44/vb=7,4 2006.229.20:09:16.93#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.20:09:16.93#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.20:09:16.93#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:16.93#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:16.99#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:16.99#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:16.99#ibcon#enter wrdev, iclass 34, count 2 2006.229.20:09:16.99#ibcon#first serial, iclass 34, count 2 2006.229.20:09:16.99#ibcon#enter sib2, iclass 34, count 2 2006.229.20:09:16.99#ibcon#flushed, iclass 34, count 2 2006.229.20:09:16.99#ibcon#about to write, iclass 34, count 2 2006.229.20:09:16.99#ibcon#wrote, iclass 34, count 2 2006.229.20:09:16.99#ibcon#about to read 3, iclass 34, count 2 2006.229.20:09:17.01#ibcon#read 3, iclass 34, count 2 2006.229.20:09:17.01#ibcon#about to read 4, iclass 34, count 2 2006.229.20:09:17.01#ibcon#read 4, iclass 34, count 2 2006.229.20:09:17.01#ibcon#about to read 5, iclass 34, count 2 2006.229.20:09:17.01#ibcon#read 5, iclass 34, count 2 2006.229.20:09:17.01#ibcon#about to read 6, iclass 34, count 2 2006.229.20:09:17.01#ibcon#read 6, iclass 34, count 2 2006.229.20:09:17.01#ibcon#end of sib2, iclass 34, count 2 2006.229.20:09:17.01#ibcon#*mode == 0, iclass 34, count 2 2006.229.20:09:17.01#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.20:09:17.01#ibcon#[27=AT07-04\r\n] 2006.229.20:09:17.01#ibcon#*before write, iclass 34, count 2 2006.229.20:09:17.01#ibcon#enter sib2, iclass 34, count 2 2006.229.20:09:17.01#ibcon#flushed, iclass 34, count 2 2006.229.20:09:17.01#ibcon#about to write, iclass 34, count 2 2006.229.20:09:17.01#ibcon#wrote, iclass 34, count 2 2006.229.20:09:17.01#ibcon#about to read 3, iclass 34, count 2 2006.229.20:09:17.04#ibcon#read 3, iclass 34, count 2 2006.229.20:09:17.04#ibcon#about to read 4, iclass 34, count 2 2006.229.20:09:17.04#ibcon#read 4, iclass 34, count 2 2006.229.20:09:17.04#ibcon#about to read 5, iclass 34, count 2 2006.229.20:09:17.04#ibcon#read 5, iclass 34, count 2 2006.229.20:09:17.04#ibcon#about to read 6, iclass 34, count 2 2006.229.20:09:17.04#ibcon#read 6, iclass 34, count 2 2006.229.20:09:17.04#ibcon#end of sib2, iclass 34, count 2 2006.229.20:09:17.04#ibcon#*after write, iclass 34, count 2 2006.229.20:09:17.04#ibcon#*before return 0, iclass 34, count 2 2006.229.20:09:17.04#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:17.04#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:09:17.04#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.20:09:17.04#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:17.04#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:17.16#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:17.16#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:17.16#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:09:17.16#ibcon#first serial, iclass 34, count 0 2006.229.20:09:17.16#ibcon#enter sib2, iclass 34, count 0 2006.229.20:09:17.16#ibcon#flushed, iclass 34, count 0 2006.229.20:09:17.16#ibcon#about to write, iclass 34, count 0 2006.229.20:09:17.16#ibcon#wrote, iclass 34, count 0 2006.229.20:09:17.16#ibcon#about to read 3, iclass 34, count 0 2006.229.20:09:17.18#ibcon#read 3, iclass 34, count 0 2006.229.20:09:17.18#ibcon#about to read 4, iclass 34, count 0 2006.229.20:09:17.18#ibcon#read 4, iclass 34, count 0 2006.229.20:09:17.18#ibcon#about to read 5, iclass 34, count 0 2006.229.20:09:17.18#ibcon#read 5, iclass 34, count 0 2006.229.20:09:17.18#ibcon#about to read 6, iclass 34, count 0 2006.229.20:09:17.18#ibcon#read 6, iclass 34, count 0 2006.229.20:09:17.18#ibcon#end of sib2, iclass 34, count 0 2006.229.20:09:17.18#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:09:17.18#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:09:17.18#ibcon#[27=USB\r\n] 2006.229.20:09:17.18#ibcon#*before write, iclass 34, count 0 2006.229.20:09:17.18#ibcon#enter sib2, iclass 34, count 0 2006.229.20:09:17.18#ibcon#flushed, iclass 34, count 0 2006.229.20:09:17.18#ibcon#about to write, iclass 34, count 0 2006.229.20:09:17.18#ibcon#wrote, iclass 34, count 0 2006.229.20:09:17.18#ibcon#about to read 3, iclass 34, count 0 2006.229.20:09:17.21#ibcon#read 3, iclass 34, count 0 2006.229.20:09:17.21#ibcon#about to read 4, iclass 34, count 0 2006.229.20:09:17.21#ibcon#read 4, iclass 34, count 0 2006.229.20:09:17.21#ibcon#about to read 5, iclass 34, count 0 2006.229.20:09:17.21#ibcon#read 5, iclass 34, count 0 2006.229.20:09:17.21#ibcon#about to read 6, iclass 34, count 0 2006.229.20:09:17.21#ibcon#read 6, iclass 34, count 0 2006.229.20:09:17.21#ibcon#end of sib2, iclass 34, count 0 2006.229.20:09:17.21#ibcon#*after write, iclass 34, count 0 2006.229.20:09:17.21#ibcon#*before return 0, iclass 34, count 0 2006.229.20:09:17.21#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:17.21#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:09:17.21#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:09:17.21#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:09:17.21$vck44/vblo=8,744.99 2006.229.20:09:17.21#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.20:09:17.21#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.20:09:17.21#ibcon#ireg 17 cls_cnt 0 2006.229.20:09:17.21#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:17.21#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:17.21#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:17.21#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:09:17.21#ibcon#first serial, iclass 36, count 0 2006.229.20:09:17.21#ibcon#enter sib2, iclass 36, count 0 2006.229.20:09:17.21#ibcon#flushed, iclass 36, count 0 2006.229.20:09:17.21#ibcon#about to write, iclass 36, count 0 2006.229.20:09:17.21#ibcon#wrote, iclass 36, count 0 2006.229.20:09:17.21#ibcon#about to read 3, iclass 36, count 0 2006.229.20:09:17.23#ibcon#read 3, iclass 36, count 0 2006.229.20:09:17.23#ibcon#about to read 4, iclass 36, count 0 2006.229.20:09:17.23#ibcon#read 4, iclass 36, count 0 2006.229.20:09:17.23#ibcon#about to read 5, iclass 36, count 0 2006.229.20:09:17.23#ibcon#read 5, iclass 36, count 0 2006.229.20:09:17.23#ibcon#about to read 6, iclass 36, count 0 2006.229.20:09:17.23#ibcon#read 6, iclass 36, count 0 2006.229.20:09:17.23#ibcon#end of sib2, iclass 36, count 0 2006.229.20:09:17.23#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:09:17.23#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:09:17.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:09:17.23#ibcon#*before write, iclass 36, count 0 2006.229.20:09:17.23#ibcon#enter sib2, iclass 36, count 0 2006.229.20:09:17.23#ibcon#flushed, iclass 36, count 0 2006.229.20:09:17.23#ibcon#about to write, iclass 36, count 0 2006.229.20:09:17.23#ibcon#wrote, iclass 36, count 0 2006.229.20:09:17.23#ibcon#about to read 3, iclass 36, count 0 2006.229.20:09:17.27#ibcon#read 3, iclass 36, count 0 2006.229.20:09:17.27#ibcon#about to read 4, iclass 36, count 0 2006.229.20:09:17.27#ibcon#read 4, iclass 36, count 0 2006.229.20:09:17.27#ibcon#about to read 5, iclass 36, count 0 2006.229.20:09:17.27#ibcon#read 5, iclass 36, count 0 2006.229.20:09:17.27#ibcon#about to read 6, iclass 36, count 0 2006.229.20:09:17.27#ibcon#read 6, iclass 36, count 0 2006.229.20:09:17.27#ibcon#end of sib2, iclass 36, count 0 2006.229.20:09:17.27#ibcon#*after write, iclass 36, count 0 2006.229.20:09:17.27#ibcon#*before return 0, iclass 36, count 0 2006.229.20:09:17.27#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:17.27#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:09:17.27#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:09:17.27#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:09:17.27$vck44/vb=8,4 2006.229.20:09:17.27#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.20:09:17.27#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.20:09:17.27#ibcon#ireg 11 cls_cnt 2 2006.229.20:09:17.27#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:17.33#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:17.33#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:17.33#ibcon#enter wrdev, iclass 38, count 2 2006.229.20:09:17.33#ibcon#first serial, iclass 38, count 2 2006.229.20:09:17.33#ibcon#enter sib2, iclass 38, count 2 2006.229.20:09:17.33#ibcon#flushed, iclass 38, count 2 2006.229.20:09:17.33#ibcon#about to write, iclass 38, count 2 2006.229.20:09:17.33#ibcon#wrote, iclass 38, count 2 2006.229.20:09:17.33#ibcon#about to read 3, iclass 38, count 2 2006.229.20:09:17.35#ibcon#read 3, iclass 38, count 2 2006.229.20:09:17.35#ibcon#about to read 4, iclass 38, count 2 2006.229.20:09:17.35#ibcon#read 4, iclass 38, count 2 2006.229.20:09:17.35#ibcon#about to read 5, iclass 38, count 2 2006.229.20:09:17.35#ibcon#read 5, iclass 38, count 2 2006.229.20:09:17.35#ibcon#about to read 6, iclass 38, count 2 2006.229.20:09:17.35#ibcon#read 6, iclass 38, count 2 2006.229.20:09:17.35#ibcon#end of sib2, iclass 38, count 2 2006.229.20:09:17.35#ibcon#*mode == 0, iclass 38, count 2 2006.229.20:09:17.35#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.20:09:17.35#ibcon#[27=AT08-04\r\n] 2006.229.20:09:17.35#ibcon#*before write, iclass 38, count 2 2006.229.20:09:17.35#ibcon#enter sib2, iclass 38, count 2 2006.229.20:09:17.35#ibcon#flushed, iclass 38, count 2 2006.229.20:09:17.35#ibcon#about to write, iclass 38, count 2 2006.229.20:09:17.35#ibcon#wrote, iclass 38, count 2 2006.229.20:09:17.35#ibcon#about to read 3, iclass 38, count 2 2006.229.20:09:17.38#ibcon#read 3, iclass 38, count 2 2006.229.20:09:17.38#ibcon#about to read 4, iclass 38, count 2 2006.229.20:09:17.38#ibcon#read 4, iclass 38, count 2 2006.229.20:09:17.38#ibcon#about to read 5, iclass 38, count 2 2006.229.20:09:17.38#ibcon#read 5, iclass 38, count 2 2006.229.20:09:17.38#ibcon#about to read 6, iclass 38, count 2 2006.229.20:09:17.38#ibcon#read 6, iclass 38, count 2 2006.229.20:09:17.38#ibcon#end of sib2, iclass 38, count 2 2006.229.20:09:17.38#ibcon#*after write, iclass 38, count 2 2006.229.20:09:17.38#ibcon#*before return 0, iclass 38, count 2 2006.229.20:09:17.38#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:17.38#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:09:17.38#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.20:09:17.38#ibcon#ireg 7 cls_cnt 0 2006.229.20:09:17.38#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:17.50#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:17.50#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:17.50#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:09:17.50#ibcon#first serial, iclass 38, count 0 2006.229.20:09:17.50#ibcon#enter sib2, iclass 38, count 0 2006.229.20:09:17.50#ibcon#flushed, iclass 38, count 0 2006.229.20:09:17.50#ibcon#about to write, iclass 38, count 0 2006.229.20:09:17.50#ibcon#wrote, iclass 38, count 0 2006.229.20:09:17.50#ibcon#about to read 3, iclass 38, count 0 2006.229.20:09:17.52#ibcon#read 3, iclass 38, count 0 2006.229.20:09:17.52#ibcon#about to read 4, iclass 38, count 0 2006.229.20:09:17.52#ibcon#read 4, iclass 38, count 0 2006.229.20:09:17.52#ibcon#about to read 5, iclass 38, count 0 2006.229.20:09:17.52#ibcon#read 5, iclass 38, count 0 2006.229.20:09:17.52#ibcon#about to read 6, iclass 38, count 0 2006.229.20:09:17.52#ibcon#read 6, iclass 38, count 0 2006.229.20:09:17.52#ibcon#end of sib2, iclass 38, count 0 2006.229.20:09:17.52#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:09:17.52#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:09:17.52#ibcon#[27=USB\r\n] 2006.229.20:09:17.52#ibcon#*before write, iclass 38, count 0 2006.229.20:09:17.52#ibcon#enter sib2, iclass 38, count 0 2006.229.20:09:17.52#ibcon#flushed, iclass 38, count 0 2006.229.20:09:17.52#ibcon#about to write, iclass 38, count 0 2006.229.20:09:17.52#ibcon#wrote, iclass 38, count 0 2006.229.20:09:17.52#ibcon#about to read 3, iclass 38, count 0 2006.229.20:09:17.55#ibcon#read 3, iclass 38, count 0 2006.229.20:09:17.55#ibcon#about to read 4, iclass 38, count 0 2006.229.20:09:17.55#ibcon#read 4, iclass 38, count 0 2006.229.20:09:17.55#ibcon#about to read 5, iclass 38, count 0 2006.229.20:09:17.55#ibcon#read 5, iclass 38, count 0 2006.229.20:09:17.55#ibcon#about to read 6, iclass 38, count 0 2006.229.20:09:17.55#ibcon#read 6, iclass 38, count 0 2006.229.20:09:17.55#ibcon#end of sib2, iclass 38, count 0 2006.229.20:09:17.55#ibcon#*after write, iclass 38, count 0 2006.229.20:09:17.55#ibcon#*before return 0, iclass 38, count 0 2006.229.20:09:17.55#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:17.55#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:09:17.55#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:09:17.55#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:09:17.55$vck44/vabw=wide 2006.229.20:09:17.55#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.20:09:17.55#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.20:09:17.55#ibcon#ireg 8 cls_cnt 0 2006.229.20:09:17.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:17.55#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:17.55#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:17.55#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:09:17.55#ibcon#first serial, iclass 40, count 0 2006.229.20:09:17.55#ibcon#enter sib2, iclass 40, count 0 2006.229.20:09:17.55#ibcon#flushed, iclass 40, count 0 2006.229.20:09:17.55#ibcon#about to write, iclass 40, count 0 2006.229.20:09:17.55#ibcon#wrote, iclass 40, count 0 2006.229.20:09:17.55#ibcon#about to read 3, iclass 40, count 0 2006.229.20:09:17.57#ibcon#read 3, iclass 40, count 0 2006.229.20:09:17.57#ibcon#about to read 4, iclass 40, count 0 2006.229.20:09:17.57#ibcon#read 4, iclass 40, count 0 2006.229.20:09:17.57#ibcon#about to read 5, iclass 40, count 0 2006.229.20:09:17.57#ibcon#read 5, iclass 40, count 0 2006.229.20:09:17.57#ibcon#about to read 6, iclass 40, count 0 2006.229.20:09:17.57#ibcon#read 6, iclass 40, count 0 2006.229.20:09:17.57#ibcon#end of sib2, iclass 40, count 0 2006.229.20:09:17.57#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:09:17.57#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:09:17.57#ibcon#[25=BW32\r\n] 2006.229.20:09:17.57#ibcon#*before write, iclass 40, count 0 2006.229.20:09:17.57#ibcon#enter sib2, iclass 40, count 0 2006.229.20:09:17.57#ibcon#flushed, iclass 40, count 0 2006.229.20:09:17.57#ibcon#about to write, iclass 40, count 0 2006.229.20:09:17.57#ibcon#wrote, iclass 40, count 0 2006.229.20:09:17.57#ibcon#about to read 3, iclass 40, count 0 2006.229.20:09:17.60#ibcon#read 3, iclass 40, count 0 2006.229.20:09:17.60#ibcon#about to read 4, iclass 40, count 0 2006.229.20:09:17.60#ibcon#read 4, iclass 40, count 0 2006.229.20:09:17.60#ibcon#about to read 5, iclass 40, count 0 2006.229.20:09:17.60#ibcon#read 5, iclass 40, count 0 2006.229.20:09:17.60#ibcon#about to read 6, iclass 40, count 0 2006.229.20:09:17.60#ibcon#read 6, iclass 40, count 0 2006.229.20:09:17.60#ibcon#end of sib2, iclass 40, count 0 2006.229.20:09:17.60#ibcon#*after write, iclass 40, count 0 2006.229.20:09:17.60#ibcon#*before return 0, iclass 40, count 0 2006.229.20:09:17.60#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:17.60#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:09:17.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:09:17.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:09:17.60$vck44/vbbw=wide 2006.229.20:09:17.60#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.20:09:17.60#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.20:09:17.60#ibcon#ireg 8 cls_cnt 0 2006.229.20:09:17.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:09:17.67#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:09:17.67#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:09:17.67#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:09:17.67#ibcon#first serial, iclass 4, count 0 2006.229.20:09:17.67#ibcon#enter sib2, iclass 4, count 0 2006.229.20:09:17.67#ibcon#flushed, iclass 4, count 0 2006.229.20:09:17.67#ibcon#about to write, iclass 4, count 0 2006.229.20:09:17.67#ibcon#wrote, iclass 4, count 0 2006.229.20:09:17.67#ibcon#about to read 3, iclass 4, count 0 2006.229.20:09:17.69#ibcon#read 3, iclass 4, count 0 2006.229.20:09:17.69#ibcon#about to read 4, iclass 4, count 0 2006.229.20:09:17.69#ibcon#read 4, iclass 4, count 0 2006.229.20:09:17.69#ibcon#about to read 5, iclass 4, count 0 2006.229.20:09:17.69#ibcon#read 5, iclass 4, count 0 2006.229.20:09:17.69#ibcon#about to read 6, iclass 4, count 0 2006.229.20:09:17.69#ibcon#read 6, iclass 4, count 0 2006.229.20:09:17.69#ibcon#end of sib2, iclass 4, count 0 2006.229.20:09:17.69#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:09:17.69#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:09:17.69#ibcon#[27=BW32\r\n] 2006.229.20:09:17.69#ibcon#*before write, iclass 4, count 0 2006.229.20:09:17.69#ibcon#enter sib2, iclass 4, count 0 2006.229.20:09:17.69#ibcon#flushed, iclass 4, count 0 2006.229.20:09:17.69#ibcon#about to write, iclass 4, count 0 2006.229.20:09:17.69#ibcon#wrote, iclass 4, count 0 2006.229.20:09:17.69#ibcon#about to read 3, iclass 4, count 0 2006.229.20:09:17.72#ibcon#read 3, iclass 4, count 0 2006.229.20:09:17.72#ibcon#about to read 4, iclass 4, count 0 2006.229.20:09:17.72#ibcon#read 4, iclass 4, count 0 2006.229.20:09:17.72#ibcon#about to read 5, iclass 4, count 0 2006.229.20:09:17.72#ibcon#read 5, iclass 4, count 0 2006.229.20:09:17.72#ibcon#about to read 6, iclass 4, count 0 2006.229.20:09:17.72#ibcon#read 6, iclass 4, count 0 2006.229.20:09:17.72#ibcon#end of sib2, iclass 4, count 0 2006.229.20:09:17.72#ibcon#*after write, iclass 4, count 0 2006.229.20:09:17.72#ibcon#*before return 0, iclass 4, count 0 2006.229.20:09:17.72#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:09:17.72#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:09:17.72#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:09:17.72#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:09:17.72$setupk4/ifdk4 2006.229.20:09:17.72$ifdk4/lo= 2006.229.20:09:17.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:09:17.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:09:17.72$ifdk4/patch= 2006.229.20:09:17.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:09:17.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:09:17.72$setupk4/!*+20s 2006.229.20:09:20.14#trakl#Source acquired 2006.229.20:09:22.14#flagr#flagr/antenna,acquired 2006.229.20:09:23.46#abcon#<5=/07 1.3 3.3 26.031001001.7\r\n> 2006.229.20:09:23.48#abcon#{5=INTERFACE CLEAR} 2006.229.20:09:23.54#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:09:32.23$setupk4/"tpicd 2006.229.20:09:32.23$setupk4/echo=off 2006.229.20:09:32.23$setupk4/xlog=off 2006.229.20:09:32.23:!2006.229.20:14:58 2006.229.20:14:58.00:preob 2006.229.20:14:59.15/onsource/TRACKING 2006.229.20:14:59.15:!2006.229.20:15:08 2006.229.20:15:08.02:"tape 2006.229.20:15:08.02:"st=record 2006.229.20:15:08.02:data_valid=on 2006.229.20:15:08.02:midob 2006.229.20:15:09.15/onsource/TRACKING 2006.229.20:15:09.15/wx/26.01,1001.8,100 2006.229.20:15:09.37/cable/+6.4237E-03 2006.229.20:15:10.46/va/01,08,usb,yes,35,38 2006.229.20:15:10.46/va/02,07,usb,yes,38,39 2006.229.20:15:10.46/va/03,06,usb,yes,47,50 2006.229.20:15:10.46/va/04,07,usb,yes,39,41 2006.229.20:15:10.46/va/05,04,usb,yes,35,36 2006.229.20:15:10.46/va/06,04,usb,yes,39,39 2006.229.20:15:10.46/va/07,05,usb,yes,35,35 2006.229.20:15:10.46/va/08,06,usb,yes,25,31 2006.229.20:15:10.69/valo/01,524.99,yes,locked 2006.229.20:15:10.69/valo/02,534.99,yes,locked 2006.229.20:15:10.69/valo/03,564.99,yes,locked 2006.229.20:15:10.69/valo/04,624.99,yes,locked 2006.229.20:15:10.69/valo/05,734.99,yes,locked 2006.229.20:15:10.69/valo/06,814.99,yes,locked 2006.229.20:15:10.69/valo/07,864.99,yes,locked 2006.229.20:15:10.69/valo/08,884.99,yes,locked 2006.229.20:15:11.78/vb/01,04,usb,yes,33,31 2006.229.20:15:11.78/vb/02,04,usb,yes,36,35 2006.229.20:15:11.78/vb/03,04,usb,yes,33,36 2006.229.20:15:11.78/vb/04,04,usb,yes,37,36 2006.229.20:15:11.78/vb/05,04,usb,yes,29,32 2006.229.20:15:11.78/vb/06,04,usb,yes,34,30 2006.229.20:15:11.78/vb/07,04,usb,yes,34,34 2006.229.20:15:11.78/vb/08,04,usb,yes,31,35 2006.229.20:15:12.01/vblo/01,629.99,yes,locked 2006.229.20:15:12.01/vblo/02,634.99,yes,locked 2006.229.20:15:12.01/vblo/03,649.99,yes,locked 2006.229.20:15:12.01/vblo/04,679.99,yes,locked 2006.229.20:15:12.01/vblo/05,709.99,yes,locked 2006.229.20:15:12.01/vblo/06,719.99,yes,locked 2006.229.20:15:12.01/vblo/07,734.99,yes,locked 2006.229.20:15:12.01/vblo/08,744.99,yes,locked 2006.229.20:15:12.16/vabw/8 2006.229.20:15:12.31/vbbw/8 2006.229.20:15:12.40/xfe/off,on,12.0 2006.229.20:15:12.79/ifatt/23,28,28,28 2006.229.20:15:13.07/fmout-gps/S +4.51E-07 2006.229.20:15:13.12:!2006.229.20:15:48 2006.229.20:15:48.01:data_valid=off 2006.229.20:15:48.02:"et 2006.229.20:15:48.02:!+3s 2006.229.20:15:51.04:"tape 2006.229.20:15:51.04:postob 2006.229.20:15:51.21/cable/+6.4222E-03 2006.229.20:15:51.22/wx/26.01,1001.8,100 2006.229.20:15:51.27/fmout-gps/S +4.52E-07 2006.229.20:15:51.28:scan_name=229-2018,jd0608,140 2006.229.20:15:51.28:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.20:15:52.15#flagr#flagr/antenna,new-source 2006.229.20:15:52.15:checkk5 2006.229.20:15:52.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:15:52.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:15:53.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:15:53.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:15:54.13/chk_obsdata//k5ts1/T2292015??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:15:54.53/chk_obsdata//k5ts2/T2292015??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:15:54.93/chk_obsdata//k5ts3/T2292015??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:15:55.33/chk_obsdata//k5ts4/T2292015??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.20:15:56.05/k5log//k5ts1_log_newline 2006.229.20:15:56.75/k5log//k5ts2_log_newline 2006.229.20:15:57.48/k5log//k5ts3_log_newline 2006.229.20:15:58.21/k5log//k5ts4_log_newline 2006.229.20:15:58.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:15:58.23:setupk4=1 2006.229.20:15:58.23$setupk4/echo=on 2006.229.20:15:58.23$setupk4/pcalon 2006.229.20:15:58.23$pcalon/"no phase cal control is implemented here 2006.229.20:15:58.23$setupk4/"tpicd=stop 2006.229.20:15:58.23$setupk4/"rec=synch_on 2006.229.20:15:58.23$setupk4/"rec_mode=128 2006.229.20:15:58.23$setupk4/!* 2006.229.20:15:58.23$setupk4/recpk4 2006.229.20:15:58.23$recpk4/recpatch= 2006.229.20:15:58.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:15:58.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:15:58.24$setupk4/vck44 2006.229.20:15:58.24$vck44/valo=1,524.99 2006.229.20:15:58.24#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.20:15:58.24#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.20:15:58.24#ibcon#ireg 17 cls_cnt 0 2006.229.20:15:58.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:15:58.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:15:58.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:15:58.24#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:15:58.24#ibcon#first serial, iclass 23, count 0 2006.229.20:15:58.24#ibcon#enter sib2, iclass 23, count 0 2006.229.20:15:58.24#ibcon#flushed, iclass 23, count 0 2006.229.20:15:58.24#ibcon#about to write, iclass 23, count 0 2006.229.20:15:58.24#ibcon#wrote, iclass 23, count 0 2006.229.20:15:58.24#ibcon#about to read 3, iclass 23, count 0 2006.229.20:15:58.25#ibcon#read 3, iclass 23, count 0 2006.229.20:15:58.25#ibcon#about to read 4, iclass 23, count 0 2006.229.20:15:58.25#ibcon#read 4, iclass 23, count 0 2006.229.20:15:58.25#ibcon#about to read 5, iclass 23, count 0 2006.229.20:15:58.25#ibcon#read 5, iclass 23, count 0 2006.229.20:15:58.25#ibcon#about to read 6, iclass 23, count 0 2006.229.20:15:58.25#ibcon#read 6, iclass 23, count 0 2006.229.20:15:58.25#ibcon#end of sib2, iclass 23, count 0 2006.229.20:15:58.25#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:15:58.25#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:15:58.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:15:58.25#ibcon#*before write, iclass 23, count 0 2006.229.20:15:58.25#ibcon#enter sib2, iclass 23, count 0 2006.229.20:15:58.25#ibcon#flushed, iclass 23, count 0 2006.229.20:15:58.25#ibcon#about to write, iclass 23, count 0 2006.229.20:15:58.25#ibcon#wrote, iclass 23, count 0 2006.229.20:15:58.25#ibcon#about to read 3, iclass 23, count 0 2006.229.20:15:58.30#ibcon#read 3, iclass 23, count 0 2006.229.20:15:58.30#ibcon#about to read 4, iclass 23, count 0 2006.229.20:15:58.30#ibcon#read 4, iclass 23, count 0 2006.229.20:15:58.30#ibcon#about to read 5, iclass 23, count 0 2006.229.20:15:58.30#ibcon#read 5, iclass 23, count 0 2006.229.20:15:58.30#ibcon#about to read 6, iclass 23, count 0 2006.229.20:15:58.30#ibcon#read 6, iclass 23, count 0 2006.229.20:15:58.30#ibcon#end of sib2, iclass 23, count 0 2006.229.20:15:58.30#ibcon#*after write, iclass 23, count 0 2006.229.20:15:58.30#ibcon#*before return 0, iclass 23, count 0 2006.229.20:15:58.30#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:15:58.30#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:15:58.30#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:15:58.30#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:15:58.30$vck44/va=1,8 2006.229.20:15:58.30#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.20:15:58.30#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.20:15:58.30#ibcon#ireg 11 cls_cnt 2 2006.229.20:15:58.30#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:15:58.30#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:15:58.30#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:15:58.30#ibcon#enter wrdev, iclass 25, count 2 2006.229.20:15:58.30#ibcon#first serial, iclass 25, count 2 2006.229.20:15:58.30#ibcon#enter sib2, iclass 25, count 2 2006.229.20:15:58.31#ibcon#flushed, iclass 25, count 2 2006.229.20:15:58.31#ibcon#about to write, iclass 25, count 2 2006.229.20:15:58.31#ibcon#wrote, iclass 25, count 2 2006.229.20:15:58.31#ibcon#about to read 3, iclass 25, count 2 2006.229.20:15:58.32#ibcon#read 3, iclass 25, count 2 2006.229.20:15:58.32#ibcon#about to read 4, iclass 25, count 2 2006.229.20:15:58.32#ibcon#read 4, iclass 25, count 2 2006.229.20:15:58.32#ibcon#about to read 5, iclass 25, count 2 2006.229.20:15:58.32#ibcon#read 5, iclass 25, count 2 2006.229.20:15:58.32#ibcon#about to read 6, iclass 25, count 2 2006.229.20:15:58.32#ibcon#read 6, iclass 25, count 2 2006.229.20:15:58.32#ibcon#end of sib2, iclass 25, count 2 2006.229.20:15:58.32#ibcon#*mode == 0, iclass 25, count 2 2006.229.20:15:58.32#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.20:15:58.32#ibcon#[25=AT01-08\r\n] 2006.229.20:15:58.32#ibcon#*before write, iclass 25, count 2 2006.229.20:15:58.32#ibcon#enter sib2, iclass 25, count 2 2006.229.20:15:58.32#ibcon#flushed, iclass 25, count 2 2006.229.20:15:58.32#ibcon#about to write, iclass 25, count 2 2006.229.20:15:58.32#ibcon#wrote, iclass 25, count 2 2006.229.20:15:58.32#ibcon#about to read 3, iclass 25, count 2 2006.229.20:15:58.35#ibcon#read 3, iclass 25, count 2 2006.229.20:15:58.35#ibcon#about to read 4, iclass 25, count 2 2006.229.20:15:58.35#ibcon#read 4, iclass 25, count 2 2006.229.20:15:58.35#ibcon#about to read 5, iclass 25, count 2 2006.229.20:15:58.35#ibcon#read 5, iclass 25, count 2 2006.229.20:15:58.35#ibcon#about to read 6, iclass 25, count 2 2006.229.20:15:58.35#ibcon#read 6, iclass 25, count 2 2006.229.20:15:58.35#ibcon#end of sib2, iclass 25, count 2 2006.229.20:15:58.35#ibcon#*after write, iclass 25, count 2 2006.229.20:15:58.35#ibcon#*before return 0, iclass 25, count 2 2006.229.20:15:58.35#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:15:58.35#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:15:58.35#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.20:15:58.35#ibcon#ireg 7 cls_cnt 0 2006.229.20:15:58.35#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:15:58.47#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:15:58.47#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:15:58.47#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:15:58.47#ibcon#first serial, iclass 25, count 0 2006.229.20:15:58.47#ibcon#enter sib2, iclass 25, count 0 2006.229.20:15:58.47#ibcon#flushed, iclass 25, count 0 2006.229.20:15:58.47#ibcon#about to write, iclass 25, count 0 2006.229.20:15:58.47#ibcon#wrote, iclass 25, count 0 2006.229.20:15:58.47#ibcon#about to read 3, iclass 25, count 0 2006.229.20:15:58.49#ibcon#read 3, iclass 25, count 0 2006.229.20:15:58.49#ibcon#about to read 4, iclass 25, count 0 2006.229.20:15:58.49#ibcon#read 4, iclass 25, count 0 2006.229.20:15:58.49#ibcon#about to read 5, iclass 25, count 0 2006.229.20:15:58.49#ibcon#read 5, iclass 25, count 0 2006.229.20:15:58.49#ibcon#about to read 6, iclass 25, count 0 2006.229.20:15:58.49#ibcon#read 6, iclass 25, count 0 2006.229.20:15:58.49#ibcon#end of sib2, iclass 25, count 0 2006.229.20:15:58.49#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:15:58.49#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:15:58.49#ibcon#[25=USB\r\n] 2006.229.20:15:58.49#ibcon#*before write, iclass 25, count 0 2006.229.20:15:58.49#ibcon#enter sib2, iclass 25, count 0 2006.229.20:15:58.49#ibcon#flushed, iclass 25, count 0 2006.229.20:15:58.49#ibcon#about to write, iclass 25, count 0 2006.229.20:15:58.49#ibcon#wrote, iclass 25, count 0 2006.229.20:15:58.49#ibcon#about to read 3, iclass 25, count 0 2006.229.20:15:58.52#ibcon#read 3, iclass 25, count 0 2006.229.20:15:58.52#ibcon#about to read 4, iclass 25, count 0 2006.229.20:15:58.52#ibcon#read 4, iclass 25, count 0 2006.229.20:15:58.52#ibcon#about to read 5, iclass 25, count 0 2006.229.20:15:58.52#ibcon#read 5, iclass 25, count 0 2006.229.20:15:58.52#ibcon#about to read 6, iclass 25, count 0 2006.229.20:15:58.52#ibcon#read 6, iclass 25, count 0 2006.229.20:15:58.52#ibcon#end of sib2, iclass 25, count 0 2006.229.20:15:58.52#ibcon#*after write, iclass 25, count 0 2006.229.20:15:58.52#ibcon#*before return 0, iclass 25, count 0 2006.229.20:15:58.52#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:15:58.52#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:15:58.52#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:15:58.52#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:15:58.52$vck44/valo=2,534.99 2006.229.20:15:58.52#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.20:15:58.52#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.20:15:58.52#ibcon#ireg 17 cls_cnt 0 2006.229.20:15:58.52#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:15:58.52#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:15:58.52#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:15:58.52#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:15:58.53#ibcon#first serial, iclass 27, count 0 2006.229.20:15:58.53#ibcon#enter sib2, iclass 27, count 0 2006.229.20:15:58.53#ibcon#flushed, iclass 27, count 0 2006.229.20:15:58.53#ibcon#about to write, iclass 27, count 0 2006.229.20:15:58.53#ibcon#wrote, iclass 27, count 0 2006.229.20:15:58.53#ibcon#about to read 3, iclass 27, count 0 2006.229.20:15:58.54#ibcon#read 3, iclass 27, count 0 2006.229.20:15:58.54#ibcon#about to read 4, iclass 27, count 0 2006.229.20:15:58.54#ibcon#read 4, iclass 27, count 0 2006.229.20:15:58.54#ibcon#about to read 5, iclass 27, count 0 2006.229.20:15:58.54#ibcon#read 5, iclass 27, count 0 2006.229.20:15:58.54#ibcon#about to read 6, iclass 27, count 0 2006.229.20:15:58.54#ibcon#read 6, iclass 27, count 0 2006.229.20:15:58.54#ibcon#end of sib2, iclass 27, count 0 2006.229.20:15:58.54#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:15:58.54#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:15:58.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:15:58.54#ibcon#*before write, iclass 27, count 0 2006.229.20:15:58.54#ibcon#enter sib2, iclass 27, count 0 2006.229.20:15:58.54#ibcon#flushed, iclass 27, count 0 2006.229.20:15:58.54#ibcon#about to write, iclass 27, count 0 2006.229.20:15:58.54#ibcon#wrote, iclass 27, count 0 2006.229.20:15:58.54#ibcon#about to read 3, iclass 27, count 0 2006.229.20:15:58.58#ibcon#read 3, iclass 27, count 0 2006.229.20:15:58.58#ibcon#about to read 4, iclass 27, count 0 2006.229.20:15:58.58#ibcon#read 4, iclass 27, count 0 2006.229.20:15:58.58#ibcon#about to read 5, iclass 27, count 0 2006.229.20:15:58.58#ibcon#read 5, iclass 27, count 0 2006.229.20:15:58.58#ibcon#about to read 6, iclass 27, count 0 2006.229.20:15:58.58#ibcon#read 6, iclass 27, count 0 2006.229.20:15:58.58#ibcon#end of sib2, iclass 27, count 0 2006.229.20:15:58.58#ibcon#*after write, iclass 27, count 0 2006.229.20:15:58.58#ibcon#*before return 0, iclass 27, count 0 2006.229.20:15:58.58#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:15:58.58#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:15:58.58#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:15:58.58#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:15:58.58$vck44/va=2,7 2006.229.20:15:58.58#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.20:15:58.58#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.20:15:58.58#ibcon#ireg 11 cls_cnt 2 2006.229.20:15:58.58#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:15:58.64#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:15:58.64#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:15:58.64#ibcon#enter wrdev, iclass 29, count 2 2006.229.20:15:58.64#ibcon#first serial, iclass 29, count 2 2006.229.20:15:58.64#ibcon#enter sib2, iclass 29, count 2 2006.229.20:15:58.64#ibcon#flushed, iclass 29, count 2 2006.229.20:15:58.64#ibcon#about to write, iclass 29, count 2 2006.229.20:15:58.64#ibcon#wrote, iclass 29, count 2 2006.229.20:15:58.64#ibcon#about to read 3, iclass 29, count 2 2006.229.20:15:58.66#ibcon#read 3, iclass 29, count 2 2006.229.20:15:58.66#ibcon#about to read 4, iclass 29, count 2 2006.229.20:15:58.66#ibcon#read 4, iclass 29, count 2 2006.229.20:15:58.66#ibcon#about to read 5, iclass 29, count 2 2006.229.20:15:58.66#ibcon#read 5, iclass 29, count 2 2006.229.20:15:58.66#ibcon#about to read 6, iclass 29, count 2 2006.229.20:15:58.66#ibcon#read 6, iclass 29, count 2 2006.229.20:15:58.66#ibcon#end of sib2, iclass 29, count 2 2006.229.20:15:58.66#ibcon#*mode == 0, iclass 29, count 2 2006.229.20:15:58.66#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.20:15:58.66#ibcon#[25=AT02-07\r\n] 2006.229.20:15:58.66#ibcon#*before write, iclass 29, count 2 2006.229.20:15:58.66#ibcon#enter sib2, iclass 29, count 2 2006.229.20:15:58.66#ibcon#flushed, iclass 29, count 2 2006.229.20:15:58.66#ibcon#about to write, iclass 29, count 2 2006.229.20:15:58.66#ibcon#wrote, iclass 29, count 2 2006.229.20:15:58.66#ibcon#about to read 3, iclass 29, count 2 2006.229.20:15:58.69#ibcon#read 3, iclass 29, count 2 2006.229.20:15:58.69#ibcon#about to read 4, iclass 29, count 2 2006.229.20:15:58.69#ibcon#read 4, iclass 29, count 2 2006.229.20:15:58.69#ibcon#about to read 5, iclass 29, count 2 2006.229.20:15:58.69#ibcon#read 5, iclass 29, count 2 2006.229.20:15:58.69#ibcon#about to read 6, iclass 29, count 2 2006.229.20:15:58.69#ibcon#read 6, iclass 29, count 2 2006.229.20:15:58.69#ibcon#end of sib2, iclass 29, count 2 2006.229.20:15:58.69#ibcon#*after write, iclass 29, count 2 2006.229.20:15:58.69#ibcon#*before return 0, iclass 29, count 2 2006.229.20:15:58.69#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:15:58.69#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:15:58.69#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.20:15:58.69#ibcon#ireg 7 cls_cnt 0 2006.229.20:15:58.69#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:15:58.81#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:15:58.81#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:15:58.81#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:15:58.81#ibcon#first serial, iclass 29, count 0 2006.229.20:15:58.81#ibcon#enter sib2, iclass 29, count 0 2006.229.20:15:58.81#ibcon#flushed, iclass 29, count 0 2006.229.20:15:58.81#ibcon#about to write, iclass 29, count 0 2006.229.20:15:58.81#ibcon#wrote, iclass 29, count 0 2006.229.20:15:58.81#ibcon#about to read 3, iclass 29, count 0 2006.229.20:15:58.83#ibcon#read 3, iclass 29, count 0 2006.229.20:15:58.83#ibcon#about to read 4, iclass 29, count 0 2006.229.20:15:58.83#ibcon#read 4, iclass 29, count 0 2006.229.20:15:58.83#ibcon#about to read 5, iclass 29, count 0 2006.229.20:15:58.83#ibcon#read 5, iclass 29, count 0 2006.229.20:15:58.83#ibcon#about to read 6, iclass 29, count 0 2006.229.20:15:58.83#ibcon#read 6, iclass 29, count 0 2006.229.20:15:58.83#ibcon#end of sib2, iclass 29, count 0 2006.229.20:15:58.83#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:15:58.83#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:15:58.83#ibcon#[25=USB\r\n] 2006.229.20:15:58.83#ibcon#*before write, iclass 29, count 0 2006.229.20:15:58.83#ibcon#enter sib2, iclass 29, count 0 2006.229.20:15:58.83#ibcon#flushed, iclass 29, count 0 2006.229.20:15:58.83#ibcon#about to write, iclass 29, count 0 2006.229.20:15:58.83#ibcon#wrote, iclass 29, count 0 2006.229.20:15:58.83#ibcon#about to read 3, iclass 29, count 0 2006.229.20:15:58.86#ibcon#read 3, iclass 29, count 0 2006.229.20:15:58.86#ibcon#about to read 4, iclass 29, count 0 2006.229.20:15:58.86#ibcon#read 4, iclass 29, count 0 2006.229.20:15:58.86#ibcon#about to read 5, iclass 29, count 0 2006.229.20:15:58.86#ibcon#read 5, iclass 29, count 0 2006.229.20:15:58.86#ibcon#about to read 6, iclass 29, count 0 2006.229.20:15:58.86#ibcon#read 6, iclass 29, count 0 2006.229.20:15:58.86#ibcon#end of sib2, iclass 29, count 0 2006.229.20:15:58.86#ibcon#*after write, iclass 29, count 0 2006.229.20:15:58.86#ibcon#*before return 0, iclass 29, count 0 2006.229.20:15:58.86#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:15:58.86#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:15:58.86#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:15:58.86#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:15:58.86$vck44/valo=3,564.99 2006.229.20:15:58.86#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.20:15:58.86#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.20:15:58.86#ibcon#ireg 17 cls_cnt 0 2006.229.20:15:58.86#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:15:58.86#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:15:58.86#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:15:58.86#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:15:58.86#ibcon#first serial, iclass 31, count 0 2006.229.20:15:58.86#ibcon#enter sib2, iclass 31, count 0 2006.229.20:15:58.86#ibcon#flushed, iclass 31, count 0 2006.229.20:15:58.86#ibcon#about to write, iclass 31, count 0 2006.229.20:15:58.87#ibcon#wrote, iclass 31, count 0 2006.229.20:15:58.87#ibcon#about to read 3, iclass 31, count 0 2006.229.20:15:58.88#ibcon#read 3, iclass 31, count 0 2006.229.20:15:58.88#ibcon#about to read 4, iclass 31, count 0 2006.229.20:15:58.88#ibcon#read 4, iclass 31, count 0 2006.229.20:15:58.88#ibcon#about to read 5, iclass 31, count 0 2006.229.20:15:58.88#ibcon#read 5, iclass 31, count 0 2006.229.20:15:58.88#ibcon#about to read 6, iclass 31, count 0 2006.229.20:15:58.88#ibcon#read 6, iclass 31, count 0 2006.229.20:15:58.88#ibcon#end of sib2, iclass 31, count 0 2006.229.20:15:58.88#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:15:58.88#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:15:58.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:15:58.88#ibcon#*before write, iclass 31, count 0 2006.229.20:15:58.88#ibcon#enter sib2, iclass 31, count 0 2006.229.20:15:58.88#ibcon#flushed, iclass 31, count 0 2006.229.20:15:58.88#ibcon#about to write, iclass 31, count 0 2006.229.20:15:58.88#ibcon#wrote, iclass 31, count 0 2006.229.20:15:58.88#ibcon#about to read 3, iclass 31, count 0 2006.229.20:15:58.92#ibcon#read 3, iclass 31, count 0 2006.229.20:15:58.92#ibcon#about to read 4, iclass 31, count 0 2006.229.20:15:58.92#ibcon#read 4, iclass 31, count 0 2006.229.20:15:58.92#ibcon#about to read 5, iclass 31, count 0 2006.229.20:15:58.92#ibcon#read 5, iclass 31, count 0 2006.229.20:15:58.92#ibcon#about to read 6, iclass 31, count 0 2006.229.20:15:58.92#ibcon#read 6, iclass 31, count 0 2006.229.20:15:58.92#ibcon#end of sib2, iclass 31, count 0 2006.229.20:15:58.92#ibcon#*after write, iclass 31, count 0 2006.229.20:15:58.92#ibcon#*before return 0, iclass 31, count 0 2006.229.20:15:58.92#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:15:58.92#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:15:58.92#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:15:58.92#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:15:58.92$vck44/va=3,6 2006.229.20:15:58.92#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.20:15:58.92#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.20:15:58.92#ibcon#ireg 11 cls_cnt 2 2006.229.20:15:58.92#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:15:58.98#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:15:58.98#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:15:58.98#ibcon#enter wrdev, iclass 33, count 2 2006.229.20:15:58.98#ibcon#first serial, iclass 33, count 2 2006.229.20:15:58.98#ibcon#enter sib2, iclass 33, count 2 2006.229.20:15:58.98#ibcon#flushed, iclass 33, count 2 2006.229.20:15:58.98#ibcon#about to write, iclass 33, count 2 2006.229.20:15:58.98#ibcon#wrote, iclass 33, count 2 2006.229.20:15:58.98#ibcon#about to read 3, iclass 33, count 2 2006.229.20:15:59.00#ibcon#read 3, iclass 33, count 2 2006.229.20:15:59.00#ibcon#about to read 4, iclass 33, count 2 2006.229.20:15:59.00#ibcon#read 4, iclass 33, count 2 2006.229.20:15:59.00#ibcon#about to read 5, iclass 33, count 2 2006.229.20:15:59.00#ibcon#read 5, iclass 33, count 2 2006.229.20:15:59.00#ibcon#about to read 6, iclass 33, count 2 2006.229.20:15:59.00#ibcon#read 6, iclass 33, count 2 2006.229.20:15:59.00#ibcon#end of sib2, iclass 33, count 2 2006.229.20:15:59.00#ibcon#*mode == 0, iclass 33, count 2 2006.229.20:15:59.00#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.20:15:59.00#ibcon#[25=AT03-06\r\n] 2006.229.20:15:59.00#ibcon#*before write, iclass 33, count 2 2006.229.20:15:59.00#ibcon#enter sib2, iclass 33, count 2 2006.229.20:15:59.00#ibcon#flushed, iclass 33, count 2 2006.229.20:15:59.00#ibcon#about to write, iclass 33, count 2 2006.229.20:15:59.00#ibcon#wrote, iclass 33, count 2 2006.229.20:15:59.00#ibcon#about to read 3, iclass 33, count 2 2006.229.20:15:59.03#ibcon#read 3, iclass 33, count 2 2006.229.20:15:59.03#ibcon#about to read 4, iclass 33, count 2 2006.229.20:15:59.03#ibcon#read 4, iclass 33, count 2 2006.229.20:15:59.03#ibcon#about to read 5, iclass 33, count 2 2006.229.20:15:59.03#ibcon#read 5, iclass 33, count 2 2006.229.20:15:59.03#ibcon#about to read 6, iclass 33, count 2 2006.229.20:15:59.03#ibcon#read 6, iclass 33, count 2 2006.229.20:15:59.03#ibcon#end of sib2, iclass 33, count 2 2006.229.20:15:59.03#ibcon#*after write, iclass 33, count 2 2006.229.20:15:59.03#ibcon#*before return 0, iclass 33, count 2 2006.229.20:15:59.03#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:15:59.03#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:15:59.03#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.20:15:59.03#ibcon#ireg 7 cls_cnt 0 2006.229.20:15:59.03#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:15:59.15#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:15:59.15#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:15:59.15#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:15:59.15#ibcon#first serial, iclass 33, count 0 2006.229.20:15:59.15#ibcon#enter sib2, iclass 33, count 0 2006.229.20:15:59.15#ibcon#flushed, iclass 33, count 0 2006.229.20:15:59.15#ibcon#about to write, iclass 33, count 0 2006.229.20:15:59.15#ibcon#wrote, iclass 33, count 0 2006.229.20:15:59.15#ibcon#about to read 3, iclass 33, count 0 2006.229.20:15:59.17#ibcon#read 3, iclass 33, count 0 2006.229.20:15:59.17#ibcon#about to read 4, iclass 33, count 0 2006.229.20:15:59.17#ibcon#read 4, iclass 33, count 0 2006.229.20:15:59.17#ibcon#about to read 5, iclass 33, count 0 2006.229.20:15:59.17#ibcon#read 5, iclass 33, count 0 2006.229.20:15:59.17#ibcon#about to read 6, iclass 33, count 0 2006.229.20:15:59.17#ibcon#read 6, iclass 33, count 0 2006.229.20:15:59.17#ibcon#end of sib2, iclass 33, count 0 2006.229.20:15:59.17#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:15:59.17#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:15:59.17#ibcon#[25=USB\r\n] 2006.229.20:15:59.17#ibcon#*before write, iclass 33, count 0 2006.229.20:15:59.17#ibcon#enter sib2, iclass 33, count 0 2006.229.20:15:59.17#ibcon#flushed, iclass 33, count 0 2006.229.20:15:59.17#ibcon#about to write, iclass 33, count 0 2006.229.20:15:59.17#ibcon#wrote, iclass 33, count 0 2006.229.20:15:59.17#ibcon#about to read 3, iclass 33, count 0 2006.229.20:15:59.20#ibcon#read 3, iclass 33, count 0 2006.229.20:15:59.20#ibcon#about to read 4, iclass 33, count 0 2006.229.20:15:59.20#ibcon#read 4, iclass 33, count 0 2006.229.20:15:59.20#ibcon#about to read 5, iclass 33, count 0 2006.229.20:15:59.20#ibcon#read 5, iclass 33, count 0 2006.229.20:15:59.20#ibcon#about to read 6, iclass 33, count 0 2006.229.20:15:59.20#ibcon#read 6, iclass 33, count 0 2006.229.20:15:59.20#ibcon#end of sib2, iclass 33, count 0 2006.229.20:15:59.20#ibcon#*after write, iclass 33, count 0 2006.229.20:15:59.20#ibcon#*before return 0, iclass 33, count 0 2006.229.20:15:59.20#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:15:59.20#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:15:59.20#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:15:59.20#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:15:59.20$vck44/valo=4,624.99 2006.229.20:15:59.20#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.20:15:59.20#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.20:15:59.20#ibcon#ireg 17 cls_cnt 0 2006.229.20:15:59.20#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:15:59.20#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:15:59.20#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:15:59.20#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:15:59.20#ibcon#first serial, iclass 35, count 0 2006.229.20:15:59.21#ibcon#enter sib2, iclass 35, count 0 2006.229.20:15:59.21#ibcon#flushed, iclass 35, count 0 2006.229.20:15:59.21#ibcon#about to write, iclass 35, count 0 2006.229.20:15:59.21#ibcon#wrote, iclass 35, count 0 2006.229.20:15:59.21#ibcon#about to read 3, iclass 35, count 0 2006.229.20:15:59.22#ibcon#read 3, iclass 35, count 0 2006.229.20:15:59.22#ibcon#about to read 4, iclass 35, count 0 2006.229.20:15:59.22#ibcon#read 4, iclass 35, count 0 2006.229.20:15:59.22#ibcon#about to read 5, iclass 35, count 0 2006.229.20:15:59.22#ibcon#read 5, iclass 35, count 0 2006.229.20:15:59.22#ibcon#about to read 6, iclass 35, count 0 2006.229.20:15:59.22#ibcon#read 6, iclass 35, count 0 2006.229.20:15:59.22#ibcon#end of sib2, iclass 35, count 0 2006.229.20:15:59.22#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:15:59.22#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:15:59.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:15:59.22#ibcon#*before write, iclass 35, count 0 2006.229.20:15:59.22#ibcon#enter sib2, iclass 35, count 0 2006.229.20:15:59.22#ibcon#flushed, iclass 35, count 0 2006.229.20:15:59.22#ibcon#about to write, iclass 35, count 0 2006.229.20:15:59.22#ibcon#wrote, iclass 35, count 0 2006.229.20:15:59.22#ibcon#about to read 3, iclass 35, count 0 2006.229.20:15:59.26#ibcon#read 3, iclass 35, count 0 2006.229.20:15:59.26#ibcon#about to read 4, iclass 35, count 0 2006.229.20:15:59.26#ibcon#read 4, iclass 35, count 0 2006.229.20:15:59.26#ibcon#about to read 5, iclass 35, count 0 2006.229.20:15:59.26#ibcon#read 5, iclass 35, count 0 2006.229.20:15:59.26#ibcon#about to read 6, iclass 35, count 0 2006.229.20:15:59.26#ibcon#read 6, iclass 35, count 0 2006.229.20:15:59.26#ibcon#end of sib2, iclass 35, count 0 2006.229.20:15:59.26#ibcon#*after write, iclass 35, count 0 2006.229.20:15:59.26#ibcon#*before return 0, iclass 35, count 0 2006.229.20:15:59.26#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:15:59.26#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:15:59.26#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:15:59.26#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:15:59.26$vck44/va=4,7 2006.229.20:15:59.26#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.20:15:59.26#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.20:15:59.26#ibcon#ireg 11 cls_cnt 2 2006.229.20:15:59.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:15:59.32#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:15:59.32#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:15:59.32#ibcon#enter wrdev, iclass 37, count 2 2006.229.20:15:59.32#ibcon#first serial, iclass 37, count 2 2006.229.20:15:59.32#ibcon#enter sib2, iclass 37, count 2 2006.229.20:15:59.32#ibcon#flushed, iclass 37, count 2 2006.229.20:15:59.32#ibcon#about to write, iclass 37, count 2 2006.229.20:15:59.32#ibcon#wrote, iclass 37, count 2 2006.229.20:15:59.32#ibcon#about to read 3, iclass 37, count 2 2006.229.20:15:59.34#ibcon#read 3, iclass 37, count 2 2006.229.20:15:59.34#ibcon#about to read 4, iclass 37, count 2 2006.229.20:15:59.34#ibcon#read 4, iclass 37, count 2 2006.229.20:15:59.34#ibcon#about to read 5, iclass 37, count 2 2006.229.20:15:59.34#ibcon#read 5, iclass 37, count 2 2006.229.20:15:59.34#ibcon#about to read 6, iclass 37, count 2 2006.229.20:15:59.34#ibcon#read 6, iclass 37, count 2 2006.229.20:15:59.34#ibcon#end of sib2, iclass 37, count 2 2006.229.20:15:59.34#ibcon#*mode == 0, iclass 37, count 2 2006.229.20:15:59.34#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.20:15:59.34#ibcon#[25=AT04-07\r\n] 2006.229.20:15:59.34#ibcon#*before write, iclass 37, count 2 2006.229.20:15:59.34#ibcon#enter sib2, iclass 37, count 2 2006.229.20:15:59.34#ibcon#flushed, iclass 37, count 2 2006.229.20:15:59.34#ibcon#about to write, iclass 37, count 2 2006.229.20:15:59.34#ibcon#wrote, iclass 37, count 2 2006.229.20:15:59.34#ibcon#about to read 3, iclass 37, count 2 2006.229.20:15:59.37#ibcon#read 3, iclass 37, count 2 2006.229.20:15:59.37#ibcon#about to read 4, iclass 37, count 2 2006.229.20:15:59.37#ibcon#read 4, iclass 37, count 2 2006.229.20:15:59.37#ibcon#about to read 5, iclass 37, count 2 2006.229.20:15:59.37#ibcon#read 5, iclass 37, count 2 2006.229.20:15:59.37#ibcon#about to read 6, iclass 37, count 2 2006.229.20:15:59.37#ibcon#read 6, iclass 37, count 2 2006.229.20:15:59.37#ibcon#end of sib2, iclass 37, count 2 2006.229.20:15:59.37#ibcon#*after write, iclass 37, count 2 2006.229.20:15:59.37#ibcon#*before return 0, iclass 37, count 2 2006.229.20:15:59.37#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:15:59.37#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:15:59.37#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.20:15:59.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:15:59.37#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:15:59.49#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:15:59.49#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:15:59.49#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:15:59.49#ibcon#first serial, iclass 37, count 0 2006.229.20:15:59.49#ibcon#enter sib2, iclass 37, count 0 2006.229.20:15:59.49#ibcon#flushed, iclass 37, count 0 2006.229.20:15:59.49#ibcon#about to write, iclass 37, count 0 2006.229.20:15:59.49#ibcon#wrote, iclass 37, count 0 2006.229.20:15:59.49#ibcon#about to read 3, iclass 37, count 0 2006.229.20:15:59.51#ibcon#read 3, iclass 37, count 0 2006.229.20:15:59.51#ibcon#about to read 4, iclass 37, count 0 2006.229.20:15:59.51#ibcon#read 4, iclass 37, count 0 2006.229.20:15:59.51#ibcon#about to read 5, iclass 37, count 0 2006.229.20:15:59.51#ibcon#read 5, iclass 37, count 0 2006.229.20:15:59.51#ibcon#about to read 6, iclass 37, count 0 2006.229.20:15:59.51#ibcon#read 6, iclass 37, count 0 2006.229.20:15:59.51#ibcon#end of sib2, iclass 37, count 0 2006.229.20:15:59.51#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:15:59.51#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:15:59.51#ibcon#[25=USB\r\n] 2006.229.20:15:59.51#ibcon#*before write, iclass 37, count 0 2006.229.20:15:59.51#ibcon#enter sib2, iclass 37, count 0 2006.229.20:15:59.51#ibcon#flushed, iclass 37, count 0 2006.229.20:15:59.51#ibcon#about to write, iclass 37, count 0 2006.229.20:15:59.51#ibcon#wrote, iclass 37, count 0 2006.229.20:15:59.51#ibcon#about to read 3, iclass 37, count 0 2006.229.20:15:59.54#ibcon#read 3, iclass 37, count 0 2006.229.20:15:59.54#ibcon#about to read 4, iclass 37, count 0 2006.229.20:15:59.54#ibcon#read 4, iclass 37, count 0 2006.229.20:15:59.54#ibcon#about to read 5, iclass 37, count 0 2006.229.20:15:59.54#ibcon#read 5, iclass 37, count 0 2006.229.20:15:59.54#ibcon#about to read 6, iclass 37, count 0 2006.229.20:15:59.54#ibcon#read 6, iclass 37, count 0 2006.229.20:15:59.54#ibcon#end of sib2, iclass 37, count 0 2006.229.20:15:59.54#ibcon#*after write, iclass 37, count 0 2006.229.20:15:59.54#ibcon#*before return 0, iclass 37, count 0 2006.229.20:15:59.54#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:15:59.54#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:15:59.54#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:15:59.54#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:15:59.54$vck44/valo=5,734.99 2006.229.20:15:59.54#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.20:15:59.54#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.20:15:59.54#ibcon#ireg 17 cls_cnt 0 2006.229.20:15:59.54#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:15:59.54#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:15:59.54#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:15:59.54#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:15:59.54#ibcon#first serial, iclass 39, count 0 2006.229.20:15:59.54#ibcon#enter sib2, iclass 39, count 0 2006.229.20:15:59.54#ibcon#flushed, iclass 39, count 0 2006.229.20:15:59.55#ibcon#about to write, iclass 39, count 0 2006.229.20:15:59.55#ibcon#wrote, iclass 39, count 0 2006.229.20:15:59.55#ibcon#about to read 3, iclass 39, count 0 2006.229.20:15:59.56#ibcon#read 3, iclass 39, count 0 2006.229.20:15:59.56#ibcon#about to read 4, iclass 39, count 0 2006.229.20:15:59.56#ibcon#read 4, iclass 39, count 0 2006.229.20:15:59.56#ibcon#about to read 5, iclass 39, count 0 2006.229.20:15:59.56#ibcon#read 5, iclass 39, count 0 2006.229.20:15:59.56#ibcon#about to read 6, iclass 39, count 0 2006.229.20:15:59.56#ibcon#read 6, iclass 39, count 0 2006.229.20:15:59.56#ibcon#end of sib2, iclass 39, count 0 2006.229.20:15:59.56#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:15:59.56#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:15:59.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:15:59.56#ibcon#*before write, iclass 39, count 0 2006.229.20:15:59.56#ibcon#enter sib2, iclass 39, count 0 2006.229.20:15:59.56#ibcon#flushed, iclass 39, count 0 2006.229.20:15:59.56#ibcon#about to write, iclass 39, count 0 2006.229.20:15:59.56#ibcon#wrote, iclass 39, count 0 2006.229.20:15:59.56#ibcon#about to read 3, iclass 39, count 0 2006.229.20:15:59.60#ibcon#read 3, iclass 39, count 0 2006.229.20:15:59.60#ibcon#about to read 4, iclass 39, count 0 2006.229.20:15:59.60#ibcon#read 4, iclass 39, count 0 2006.229.20:15:59.60#ibcon#about to read 5, iclass 39, count 0 2006.229.20:15:59.60#ibcon#read 5, iclass 39, count 0 2006.229.20:15:59.60#ibcon#about to read 6, iclass 39, count 0 2006.229.20:15:59.60#ibcon#read 6, iclass 39, count 0 2006.229.20:15:59.60#ibcon#end of sib2, iclass 39, count 0 2006.229.20:15:59.60#ibcon#*after write, iclass 39, count 0 2006.229.20:15:59.60#ibcon#*before return 0, iclass 39, count 0 2006.229.20:15:59.60#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:15:59.60#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:15:59.60#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:15:59.60#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:15:59.60$vck44/va=5,4 2006.229.20:15:59.60#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.20:15:59.60#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.20:15:59.60#ibcon#ireg 11 cls_cnt 2 2006.229.20:15:59.60#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:15:59.66#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:15:59.66#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:15:59.66#ibcon#enter wrdev, iclass 3, count 2 2006.229.20:15:59.66#ibcon#first serial, iclass 3, count 2 2006.229.20:15:59.66#ibcon#enter sib2, iclass 3, count 2 2006.229.20:15:59.66#ibcon#flushed, iclass 3, count 2 2006.229.20:15:59.66#ibcon#about to write, iclass 3, count 2 2006.229.20:15:59.66#ibcon#wrote, iclass 3, count 2 2006.229.20:15:59.66#ibcon#about to read 3, iclass 3, count 2 2006.229.20:15:59.68#ibcon#read 3, iclass 3, count 2 2006.229.20:15:59.68#ibcon#about to read 4, iclass 3, count 2 2006.229.20:15:59.68#ibcon#read 4, iclass 3, count 2 2006.229.20:15:59.68#ibcon#about to read 5, iclass 3, count 2 2006.229.20:15:59.68#ibcon#read 5, iclass 3, count 2 2006.229.20:15:59.68#ibcon#about to read 6, iclass 3, count 2 2006.229.20:15:59.68#ibcon#read 6, iclass 3, count 2 2006.229.20:15:59.68#ibcon#end of sib2, iclass 3, count 2 2006.229.20:15:59.68#ibcon#*mode == 0, iclass 3, count 2 2006.229.20:15:59.68#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.20:15:59.68#ibcon#[25=AT05-04\r\n] 2006.229.20:15:59.68#ibcon#*before write, iclass 3, count 2 2006.229.20:15:59.68#ibcon#enter sib2, iclass 3, count 2 2006.229.20:15:59.68#ibcon#flushed, iclass 3, count 2 2006.229.20:15:59.68#ibcon#about to write, iclass 3, count 2 2006.229.20:15:59.68#ibcon#wrote, iclass 3, count 2 2006.229.20:15:59.68#ibcon#about to read 3, iclass 3, count 2 2006.229.20:15:59.71#ibcon#read 3, iclass 3, count 2 2006.229.20:15:59.71#ibcon#about to read 4, iclass 3, count 2 2006.229.20:15:59.71#ibcon#read 4, iclass 3, count 2 2006.229.20:15:59.71#ibcon#about to read 5, iclass 3, count 2 2006.229.20:15:59.71#ibcon#read 5, iclass 3, count 2 2006.229.20:15:59.71#ibcon#about to read 6, iclass 3, count 2 2006.229.20:15:59.71#ibcon#read 6, iclass 3, count 2 2006.229.20:15:59.71#ibcon#end of sib2, iclass 3, count 2 2006.229.20:15:59.71#ibcon#*after write, iclass 3, count 2 2006.229.20:15:59.71#ibcon#*before return 0, iclass 3, count 2 2006.229.20:15:59.71#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:15:59.71#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:15:59.71#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.20:15:59.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:15:59.71#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:15:59.83#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:15:59.83#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:15:59.83#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:15:59.83#ibcon#first serial, iclass 3, count 0 2006.229.20:15:59.83#ibcon#enter sib2, iclass 3, count 0 2006.229.20:15:59.83#ibcon#flushed, iclass 3, count 0 2006.229.20:15:59.83#ibcon#about to write, iclass 3, count 0 2006.229.20:15:59.83#ibcon#wrote, iclass 3, count 0 2006.229.20:15:59.83#ibcon#about to read 3, iclass 3, count 0 2006.229.20:15:59.85#ibcon#read 3, iclass 3, count 0 2006.229.20:15:59.85#ibcon#about to read 4, iclass 3, count 0 2006.229.20:15:59.85#ibcon#read 4, iclass 3, count 0 2006.229.20:15:59.85#ibcon#about to read 5, iclass 3, count 0 2006.229.20:15:59.85#ibcon#read 5, iclass 3, count 0 2006.229.20:15:59.85#ibcon#about to read 6, iclass 3, count 0 2006.229.20:15:59.85#ibcon#read 6, iclass 3, count 0 2006.229.20:15:59.85#ibcon#end of sib2, iclass 3, count 0 2006.229.20:15:59.85#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:15:59.85#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:15:59.85#ibcon#[25=USB\r\n] 2006.229.20:15:59.85#ibcon#*before write, iclass 3, count 0 2006.229.20:15:59.85#ibcon#enter sib2, iclass 3, count 0 2006.229.20:15:59.85#ibcon#flushed, iclass 3, count 0 2006.229.20:15:59.85#ibcon#about to write, iclass 3, count 0 2006.229.20:15:59.85#ibcon#wrote, iclass 3, count 0 2006.229.20:15:59.85#ibcon#about to read 3, iclass 3, count 0 2006.229.20:15:59.88#ibcon#read 3, iclass 3, count 0 2006.229.20:15:59.88#ibcon#about to read 4, iclass 3, count 0 2006.229.20:15:59.88#ibcon#read 4, iclass 3, count 0 2006.229.20:15:59.88#ibcon#about to read 5, iclass 3, count 0 2006.229.20:15:59.88#ibcon#read 5, iclass 3, count 0 2006.229.20:15:59.88#ibcon#about to read 6, iclass 3, count 0 2006.229.20:15:59.88#ibcon#read 6, iclass 3, count 0 2006.229.20:15:59.88#ibcon#end of sib2, iclass 3, count 0 2006.229.20:15:59.88#ibcon#*after write, iclass 3, count 0 2006.229.20:15:59.88#ibcon#*before return 0, iclass 3, count 0 2006.229.20:15:59.88#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:15:59.88#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:15:59.88#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:15:59.88#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:15:59.88$vck44/valo=6,814.99 2006.229.20:15:59.88#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.20:15:59.88#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.20:15:59.88#ibcon#ireg 17 cls_cnt 0 2006.229.20:15:59.88#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:15:59.88#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:15:59.88#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:15:59.88#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:15:59.88#ibcon#first serial, iclass 5, count 0 2006.229.20:15:59.88#ibcon#enter sib2, iclass 5, count 0 2006.229.20:15:59.88#ibcon#flushed, iclass 5, count 0 2006.229.20:15:59.88#ibcon#about to write, iclass 5, count 0 2006.229.20:15:59.88#ibcon#wrote, iclass 5, count 0 2006.229.20:15:59.89#ibcon#about to read 3, iclass 5, count 0 2006.229.20:15:59.90#ibcon#read 3, iclass 5, count 0 2006.229.20:15:59.90#ibcon#about to read 4, iclass 5, count 0 2006.229.20:15:59.90#ibcon#read 4, iclass 5, count 0 2006.229.20:15:59.90#ibcon#about to read 5, iclass 5, count 0 2006.229.20:15:59.90#ibcon#read 5, iclass 5, count 0 2006.229.20:15:59.90#ibcon#about to read 6, iclass 5, count 0 2006.229.20:15:59.90#ibcon#read 6, iclass 5, count 0 2006.229.20:15:59.90#ibcon#end of sib2, iclass 5, count 0 2006.229.20:15:59.90#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:15:59.90#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:15:59.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:15:59.90#ibcon#*before write, iclass 5, count 0 2006.229.20:15:59.90#ibcon#enter sib2, iclass 5, count 0 2006.229.20:15:59.90#ibcon#flushed, iclass 5, count 0 2006.229.20:15:59.90#ibcon#about to write, iclass 5, count 0 2006.229.20:15:59.90#ibcon#wrote, iclass 5, count 0 2006.229.20:15:59.90#ibcon#about to read 3, iclass 5, count 0 2006.229.20:15:59.94#ibcon#read 3, iclass 5, count 0 2006.229.20:15:59.94#ibcon#about to read 4, iclass 5, count 0 2006.229.20:15:59.94#ibcon#read 4, iclass 5, count 0 2006.229.20:15:59.94#ibcon#about to read 5, iclass 5, count 0 2006.229.20:15:59.94#ibcon#read 5, iclass 5, count 0 2006.229.20:15:59.94#ibcon#about to read 6, iclass 5, count 0 2006.229.20:15:59.94#ibcon#read 6, iclass 5, count 0 2006.229.20:15:59.94#ibcon#end of sib2, iclass 5, count 0 2006.229.20:15:59.94#ibcon#*after write, iclass 5, count 0 2006.229.20:15:59.94#ibcon#*before return 0, iclass 5, count 0 2006.229.20:15:59.94#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:15:59.94#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:15:59.94#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:15:59.94#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:15:59.94$vck44/va=6,4 2006.229.20:15:59.94#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.20:15:59.94#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.20:15:59.94#ibcon#ireg 11 cls_cnt 2 2006.229.20:15:59.94#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:00.00#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:00.00#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:00.00#ibcon#enter wrdev, iclass 7, count 2 2006.229.20:16:00.00#ibcon#first serial, iclass 7, count 2 2006.229.20:16:00.00#ibcon#enter sib2, iclass 7, count 2 2006.229.20:16:00.00#ibcon#flushed, iclass 7, count 2 2006.229.20:16:00.00#ibcon#about to write, iclass 7, count 2 2006.229.20:16:00.00#ibcon#wrote, iclass 7, count 2 2006.229.20:16:00.00#ibcon#about to read 3, iclass 7, count 2 2006.229.20:16:00.02#ibcon#read 3, iclass 7, count 2 2006.229.20:16:00.02#ibcon#about to read 4, iclass 7, count 2 2006.229.20:16:00.02#ibcon#read 4, iclass 7, count 2 2006.229.20:16:00.02#ibcon#about to read 5, iclass 7, count 2 2006.229.20:16:00.02#ibcon#read 5, iclass 7, count 2 2006.229.20:16:00.02#ibcon#about to read 6, iclass 7, count 2 2006.229.20:16:00.02#ibcon#read 6, iclass 7, count 2 2006.229.20:16:00.02#ibcon#end of sib2, iclass 7, count 2 2006.229.20:16:00.02#ibcon#*mode == 0, iclass 7, count 2 2006.229.20:16:00.02#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.20:16:00.02#ibcon#[25=AT06-04\r\n] 2006.229.20:16:00.02#ibcon#*before write, iclass 7, count 2 2006.229.20:16:00.02#ibcon#enter sib2, iclass 7, count 2 2006.229.20:16:00.02#ibcon#flushed, iclass 7, count 2 2006.229.20:16:00.02#ibcon#about to write, iclass 7, count 2 2006.229.20:16:00.02#ibcon#wrote, iclass 7, count 2 2006.229.20:16:00.02#ibcon#about to read 3, iclass 7, count 2 2006.229.20:16:00.05#ibcon#read 3, iclass 7, count 2 2006.229.20:16:00.05#ibcon#about to read 4, iclass 7, count 2 2006.229.20:16:00.05#ibcon#read 4, iclass 7, count 2 2006.229.20:16:00.05#ibcon#about to read 5, iclass 7, count 2 2006.229.20:16:00.05#ibcon#read 5, iclass 7, count 2 2006.229.20:16:00.05#ibcon#about to read 6, iclass 7, count 2 2006.229.20:16:00.05#ibcon#read 6, iclass 7, count 2 2006.229.20:16:00.05#ibcon#end of sib2, iclass 7, count 2 2006.229.20:16:00.05#ibcon#*after write, iclass 7, count 2 2006.229.20:16:00.05#ibcon#*before return 0, iclass 7, count 2 2006.229.20:16:00.05#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:00.05#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:00.05#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.20:16:00.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:00.05#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:00.17#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:00.17#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:00.17#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:16:00.17#ibcon#first serial, iclass 7, count 0 2006.229.20:16:00.17#ibcon#enter sib2, iclass 7, count 0 2006.229.20:16:00.17#ibcon#flushed, iclass 7, count 0 2006.229.20:16:00.17#ibcon#about to write, iclass 7, count 0 2006.229.20:16:00.17#ibcon#wrote, iclass 7, count 0 2006.229.20:16:00.17#ibcon#about to read 3, iclass 7, count 0 2006.229.20:16:00.19#ibcon#read 3, iclass 7, count 0 2006.229.20:16:00.19#ibcon#about to read 4, iclass 7, count 0 2006.229.20:16:00.19#ibcon#read 4, iclass 7, count 0 2006.229.20:16:00.19#ibcon#about to read 5, iclass 7, count 0 2006.229.20:16:00.19#ibcon#read 5, iclass 7, count 0 2006.229.20:16:00.19#ibcon#about to read 6, iclass 7, count 0 2006.229.20:16:00.19#ibcon#read 6, iclass 7, count 0 2006.229.20:16:00.19#ibcon#end of sib2, iclass 7, count 0 2006.229.20:16:00.19#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:16:00.19#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:16:00.19#ibcon#[25=USB\r\n] 2006.229.20:16:00.19#ibcon#*before write, iclass 7, count 0 2006.229.20:16:00.19#ibcon#enter sib2, iclass 7, count 0 2006.229.20:16:00.19#ibcon#flushed, iclass 7, count 0 2006.229.20:16:00.19#ibcon#about to write, iclass 7, count 0 2006.229.20:16:00.19#ibcon#wrote, iclass 7, count 0 2006.229.20:16:00.19#ibcon#about to read 3, iclass 7, count 0 2006.229.20:16:00.22#abcon#<5=/07 1.3 3.1 26.011001001.8\r\n> 2006.229.20:16:00.22#ibcon#read 3, iclass 7, count 0 2006.229.20:16:00.22#ibcon#about to read 4, iclass 7, count 0 2006.229.20:16:00.22#ibcon#read 4, iclass 7, count 0 2006.229.20:16:00.22#ibcon#about to read 5, iclass 7, count 0 2006.229.20:16:00.22#ibcon#read 5, iclass 7, count 0 2006.229.20:16:00.22#ibcon#about to read 6, iclass 7, count 0 2006.229.20:16:00.22#ibcon#read 6, iclass 7, count 0 2006.229.20:16:00.22#ibcon#end of sib2, iclass 7, count 0 2006.229.20:16:00.22#ibcon#*after write, iclass 7, count 0 2006.229.20:16:00.22#ibcon#*before return 0, iclass 7, count 0 2006.229.20:16:00.22#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:00.22#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:00.22#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:16:00.22#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:16:00.23$vck44/valo=7,864.99 2006.229.20:16:00.23#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.20:16:00.23#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.20:16:00.23#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:00.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:16:00.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:16:00.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:16:00.23#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:16:00.23#ibcon#first serial, iclass 14, count 0 2006.229.20:16:00.23#ibcon#enter sib2, iclass 14, count 0 2006.229.20:16:00.23#ibcon#flushed, iclass 14, count 0 2006.229.20:16:00.23#ibcon#about to write, iclass 14, count 0 2006.229.20:16:00.23#ibcon#wrote, iclass 14, count 0 2006.229.20:16:00.23#ibcon#about to read 3, iclass 14, count 0 2006.229.20:16:00.24#abcon#{5=INTERFACE CLEAR} 2006.229.20:16:00.24#ibcon#read 3, iclass 14, count 0 2006.229.20:16:00.24#ibcon#about to read 4, iclass 14, count 0 2006.229.20:16:00.24#ibcon#read 4, iclass 14, count 0 2006.229.20:16:00.24#ibcon#about to read 5, iclass 14, count 0 2006.229.20:16:00.24#ibcon#read 5, iclass 14, count 0 2006.229.20:16:00.24#ibcon#about to read 6, iclass 14, count 0 2006.229.20:16:00.24#ibcon#read 6, iclass 14, count 0 2006.229.20:16:00.24#ibcon#end of sib2, iclass 14, count 0 2006.229.20:16:00.24#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:16:00.24#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:16:00.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:16:00.24#ibcon#*before write, iclass 14, count 0 2006.229.20:16:00.24#ibcon#enter sib2, iclass 14, count 0 2006.229.20:16:00.24#ibcon#flushed, iclass 14, count 0 2006.229.20:16:00.24#ibcon#about to write, iclass 14, count 0 2006.229.20:16:00.24#ibcon#wrote, iclass 14, count 0 2006.229.20:16:00.24#ibcon#about to read 3, iclass 14, count 0 2006.229.20:16:00.28#ibcon#read 3, iclass 14, count 0 2006.229.20:16:00.28#ibcon#about to read 4, iclass 14, count 0 2006.229.20:16:00.28#ibcon#read 4, iclass 14, count 0 2006.229.20:16:00.28#ibcon#about to read 5, iclass 14, count 0 2006.229.20:16:00.28#ibcon#read 5, iclass 14, count 0 2006.229.20:16:00.28#ibcon#about to read 6, iclass 14, count 0 2006.229.20:16:00.28#ibcon#read 6, iclass 14, count 0 2006.229.20:16:00.28#ibcon#end of sib2, iclass 14, count 0 2006.229.20:16:00.28#ibcon#*after write, iclass 14, count 0 2006.229.20:16:00.28#ibcon#*before return 0, iclass 14, count 0 2006.229.20:16:00.28#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:16:00.28#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:16:00.28#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:16:00.28#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:16:00.28$vck44/va=7,5 2006.229.20:16:00.28#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.20:16:00.28#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.20:16:00.28#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:00.28#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:16:00.30#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:16:00.34#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:16:00.34#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:16:00.34#ibcon#enter wrdev, iclass 16, count 2 2006.229.20:16:00.34#ibcon#first serial, iclass 16, count 2 2006.229.20:16:00.34#ibcon#enter sib2, iclass 16, count 2 2006.229.20:16:00.34#ibcon#flushed, iclass 16, count 2 2006.229.20:16:00.34#ibcon#about to write, iclass 16, count 2 2006.229.20:16:00.34#ibcon#wrote, iclass 16, count 2 2006.229.20:16:00.34#ibcon#about to read 3, iclass 16, count 2 2006.229.20:16:00.36#ibcon#read 3, iclass 16, count 2 2006.229.20:16:00.36#ibcon#about to read 4, iclass 16, count 2 2006.229.20:16:00.36#ibcon#read 4, iclass 16, count 2 2006.229.20:16:00.36#ibcon#about to read 5, iclass 16, count 2 2006.229.20:16:00.36#ibcon#read 5, iclass 16, count 2 2006.229.20:16:00.36#ibcon#about to read 6, iclass 16, count 2 2006.229.20:16:00.36#ibcon#read 6, iclass 16, count 2 2006.229.20:16:00.36#ibcon#end of sib2, iclass 16, count 2 2006.229.20:16:00.36#ibcon#*mode == 0, iclass 16, count 2 2006.229.20:16:00.36#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.20:16:00.36#ibcon#[25=AT07-05\r\n] 2006.229.20:16:00.36#ibcon#*before write, iclass 16, count 2 2006.229.20:16:00.36#ibcon#enter sib2, iclass 16, count 2 2006.229.20:16:00.36#ibcon#flushed, iclass 16, count 2 2006.229.20:16:00.36#ibcon#about to write, iclass 16, count 2 2006.229.20:16:00.36#ibcon#wrote, iclass 16, count 2 2006.229.20:16:00.36#ibcon#about to read 3, iclass 16, count 2 2006.229.20:16:00.39#ibcon#read 3, iclass 16, count 2 2006.229.20:16:00.39#ibcon#about to read 4, iclass 16, count 2 2006.229.20:16:00.39#ibcon#read 4, iclass 16, count 2 2006.229.20:16:00.39#ibcon#about to read 5, iclass 16, count 2 2006.229.20:16:00.39#ibcon#read 5, iclass 16, count 2 2006.229.20:16:00.39#ibcon#about to read 6, iclass 16, count 2 2006.229.20:16:00.39#ibcon#read 6, iclass 16, count 2 2006.229.20:16:00.39#ibcon#end of sib2, iclass 16, count 2 2006.229.20:16:00.39#ibcon#*after write, iclass 16, count 2 2006.229.20:16:00.39#ibcon#*before return 0, iclass 16, count 2 2006.229.20:16:00.39#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:16:00.39#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:16:00.39#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.20:16:00.39#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:00.39#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:16:00.51#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:16:00.51#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:16:00.51#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:16:00.51#ibcon#first serial, iclass 16, count 0 2006.229.20:16:00.51#ibcon#enter sib2, iclass 16, count 0 2006.229.20:16:00.51#ibcon#flushed, iclass 16, count 0 2006.229.20:16:00.51#ibcon#about to write, iclass 16, count 0 2006.229.20:16:00.51#ibcon#wrote, iclass 16, count 0 2006.229.20:16:00.51#ibcon#about to read 3, iclass 16, count 0 2006.229.20:16:00.53#ibcon#read 3, iclass 16, count 0 2006.229.20:16:00.53#ibcon#about to read 4, iclass 16, count 0 2006.229.20:16:00.53#ibcon#read 4, iclass 16, count 0 2006.229.20:16:00.53#ibcon#about to read 5, iclass 16, count 0 2006.229.20:16:00.53#ibcon#read 5, iclass 16, count 0 2006.229.20:16:00.53#ibcon#about to read 6, iclass 16, count 0 2006.229.20:16:00.53#ibcon#read 6, iclass 16, count 0 2006.229.20:16:00.53#ibcon#end of sib2, iclass 16, count 0 2006.229.20:16:00.53#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:16:00.53#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:16:00.53#ibcon#[25=USB\r\n] 2006.229.20:16:00.53#ibcon#*before write, iclass 16, count 0 2006.229.20:16:00.53#ibcon#enter sib2, iclass 16, count 0 2006.229.20:16:00.53#ibcon#flushed, iclass 16, count 0 2006.229.20:16:00.53#ibcon#about to write, iclass 16, count 0 2006.229.20:16:00.53#ibcon#wrote, iclass 16, count 0 2006.229.20:16:00.53#ibcon#about to read 3, iclass 16, count 0 2006.229.20:16:00.56#ibcon#read 3, iclass 16, count 0 2006.229.20:16:00.56#ibcon#about to read 4, iclass 16, count 0 2006.229.20:16:00.56#ibcon#read 4, iclass 16, count 0 2006.229.20:16:00.56#ibcon#about to read 5, iclass 16, count 0 2006.229.20:16:00.56#ibcon#read 5, iclass 16, count 0 2006.229.20:16:00.56#ibcon#about to read 6, iclass 16, count 0 2006.229.20:16:00.56#ibcon#read 6, iclass 16, count 0 2006.229.20:16:00.56#ibcon#end of sib2, iclass 16, count 0 2006.229.20:16:00.56#ibcon#*after write, iclass 16, count 0 2006.229.20:16:00.56#ibcon#*before return 0, iclass 16, count 0 2006.229.20:16:00.56#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:16:00.56#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:16:00.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:16:00.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:16:00.56$vck44/valo=8,884.99 2006.229.20:16:00.56#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.20:16:00.56#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.20:16:00.56#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:00.56#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:00.56#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:00.56#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:00.56#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:16:00.57#ibcon#first serial, iclass 19, count 0 2006.229.20:16:00.57#ibcon#enter sib2, iclass 19, count 0 2006.229.20:16:00.57#ibcon#flushed, iclass 19, count 0 2006.229.20:16:00.57#ibcon#about to write, iclass 19, count 0 2006.229.20:16:00.57#ibcon#wrote, iclass 19, count 0 2006.229.20:16:00.57#ibcon#about to read 3, iclass 19, count 0 2006.229.20:16:00.58#ibcon#read 3, iclass 19, count 0 2006.229.20:16:00.58#ibcon#about to read 4, iclass 19, count 0 2006.229.20:16:00.58#ibcon#read 4, iclass 19, count 0 2006.229.20:16:00.58#ibcon#about to read 5, iclass 19, count 0 2006.229.20:16:00.58#ibcon#read 5, iclass 19, count 0 2006.229.20:16:00.58#ibcon#about to read 6, iclass 19, count 0 2006.229.20:16:00.58#ibcon#read 6, iclass 19, count 0 2006.229.20:16:00.58#ibcon#end of sib2, iclass 19, count 0 2006.229.20:16:00.58#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:16:00.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:16:00.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:16:00.58#ibcon#*before write, iclass 19, count 0 2006.229.20:16:00.58#ibcon#enter sib2, iclass 19, count 0 2006.229.20:16:00.58#ibcon#flushed, iclass 19, count 0 2006.229.20:16:00.58#ibcon#about to write, iclass 19, count 0 2006.229.20:16:00.58#ibcon#wrote, iclass 19, count 0 2006.229.20:16:00.58#ibcon#about to read 3, iclass 19, count 0 2006.229.20:16:00.62#ibcon#read 3, iclass 19, count 0 2006.229.20:16:00.62#ibcon#about to read 4, iclass 19, count 0 2006.229.20:16:00.62#ibcon#read 4, iclass 19, count 0 2006.229.20:16:00.62#ibcon#about to read 5, iclass 19, count 0 2006.229.20:16:00.62#ibcon#read 5, iclass 19, count 0 2006.229.20:16:00.62#ibcon#about to read 6, iclass 19, count 0 2006.229.20:16:00.62#ibcon#read 6, iclass 19, count 0 2006.229.20:16:00.62#ibcon#end of sib2, iclass 19, count 0 2006.229.20:16:00.62#ibcon#*after write, iclass 19, count 0 2006.229.20:16:00.62#ibcon#*before return 0, iclass 19, count 0 2006.229.20:16:00.62#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:00.62#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:00.62#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:16:00.62#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:16:00.62$vck44/va=8,6 2006.229.20:16:00.62#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.20:16:00.62#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.20:16:00.62#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:00.62#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:16:00.68#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:16:00.68#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:16:00.68#ibcon#enter wrdev, iclass 21, count 2 2006.229.20:16:00.68#ibcon#first serial, iclass 21, count 2 2006.229.20:16:00.68#ibcon#enter sib2, iclass 21, count 2 2006.229.20:16:00.68#ibcon#flushed, iclass 21, count 2 2006.229.20:16:00.68#ibcon#about to write, iclass 21, count 2 2006.229.20:16:00.68#ibcon#wrote, iclass 21, count 2 2006.229.20:16:00.68#ibcon#about to read 3, iclass 21, count 2 2006.229.20:16:00.70#ibcon#read 3, iclass 21, count 2 2006.229.20:16:00.70#ibcon#about to read 4, iclass 21, count 2 2006.229.20:16:00.70#ibcon#read 4, iclass 21, count 2 2006.229.20:16:00.70#ibcon#about to read 5, iclass 21, count 2 2006.229.20:16:00.70#ibcon#read 5, iclass 21, count 2 2006.229.20:16:00.70#ibcon#about to read 6, iclass 21, count 2 2006.229.20:16:00.70#ibcon#read 6, iclass 21, count 2 2006.229.20:16:00.70#ibcon#end of sib2, iclass 21, count 2 2006.229.20:16:00.70#ibcon#*mode == 0, iclass 21, count 2 2006.229.20:16:00.70#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.20:16:00.70#ibcon#[25=AT08-06\r\n] 2006.229.20:16:00.70#ibcon#*before write, iclass 21, count 2 2006.229.20:16:00.70#ibcon#enter sib2, iclass 21, count 2 2006.229.20:16:00.70#ibcon#flushed, iclass 21, count 2 2006.229.20:16:00.70#ibcon#about to write, iclass 21, count 2 2006.229.20:16:00.70#ibcon#wrote, iclass 21, count 2 2006.229.20:16:00.70#ibcon#about to read 3, iclass 21, count 2 2006.229.20:16:00.73#ibcon#read 3, iclass 21, count 2 2006.229.20:16:00.73#ibcon#about to read 4, iclass 21, count 2 2006.229.20:16:00.73#ibcon#read 4, iclass 21, count 2 2006.229.20:16:00.73#ibcon#about to read 5, iclass 21, count 2 2006.229.20:16:00.73#ibcon#read 5, iclass 21, count 2 2006.229.20:16:00.73#ibcon#about to read 6, iclass 21, count 2 2006.229.20:16:00.73#ibcon#read 6, iclass 21, count 2 2006.229.20:16:00.73#ibcon#end of sib2, iclass 21, count 2 2006.229.20:16:00.73#ibcon#*after write, iclass 21, count 2 2006.229.20:16:00.73#ibcon#*before return 0, iclass 21, count 2 2006.229.20:16:00.73#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:16:00.73#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:16:00.73#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.20:16:00.73#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:00.73#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:16:00.85#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:16:00.85#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:16:00.85#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:16:00.85#ibcon#first serial, iclass 21, count 0 2006.229.20:16:00.85#ibcon#enter sib2, iclass 21, count 0 2006.229.20:16:00.85#ibcon#flushed, iclass 21, count 0 2006.229.20:16:00.85#ibcon#about to write, iclass 21, count 0 2006.229.20:16:00.85#ibcon#wrote, iclass 21, count 0 2006.229.20:16:00.85#ibcon#about to read 3, iclass 21, count 0 2006.229.20:16:00.87#ibcon#read 3, iclass 21, count 0 2006.229.20:16:00.87#ibcon#about to read 4, iclass 21, count 0 2006.229.20:16:00.87#ibcon#read 4, iclass 21, count 0 2006.229.20:16:00.87#ibcon#about to read 5, iclass 21, count 0 2006.229.20:16:00.87#ibcon#read 5, iclass 21, count 0 2006.229.20:16:00.87#ibcon#about to read 6, iclass 21, count 0 2006.229.20:16:00.87#ibcon#read 6, iclass 21, count 0 2006.229.20:16:00.87#ibcon#end of sib2, iclass 21, count 0 2006.229.20:16:00.87#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:16:00.87#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:16:00.87#ibcon#[25=USB\r\n] 2006.229.20:16:00.87#ibcon#*before write, iclass 21, count 0 2006.229.20:16:00.87#ibcon#enter sib2, iclass 21, count 0 2006.229.20:16:00.87#ibcon#flushed, iclass 21, count 0 2006.229.20:16:00.87#ibcon#about to write, iclass 21, count 0 2006.229.20:16:00.87#ibcon#wrote, iclass 21, count 0 2006.229.20:16:00.87#ibcon#about to read 3, iclass 21, count 0 2006.229.20:16:00.90#ibcon#read 3, iclass 21, count 0 2006.229.20:16:00.90#ibcon#about to read 4, iclass 21, count 0 2006.229.20:16:00.90#ibcon#read 4, iclass 21, count 0 2006.229.20:16:00.90#ibcon#about to read 5, iclass 21, count 0 2006.229.20:16:00.90#ibcon#read 5, iclass 21, count 0 2006.229.20:16:00.90#ibcon#about to read 6, iclass 21, count 0 2006.229.20:16:00.90#ibcon#read 6, iclass 21, count 0 2006.229.20:16:00.90#ibcon#end of sib2, iclass 21, count 0 2006.229.20:16:00.90#ibcon#*after write, iclass 21, count 0 2006.229.20:16:00.90#ibcon#*before return 0, iclass 21, count 0 2006.229.20:16:00.90#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:16:00.90#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:16:00.90#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:16:00.90#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:16:00.90$vck44/vblo=1,629.99 2006.229.20:16:00.90#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.20:16:00.90#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.20:16:00.90#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:00.90#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:16:00.90#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:16:00.90#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:16:00.90#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:16:00.90#ibcon#first serial, iclass 23, count 0 2006.229.20:16:00.90#ibcon#enter sib2, iclass 23, count 0 2006.229.20:16:00.90#ibcon#flushed, iclass 23, count 0 2006.229.20:16:00.90#ibcon#about to write, iclass 23, count 0 2006.229.20:16:00.91#ibcon#wrote, iclass 23, count 0 2006.229.20:16:00.91#ibcon#about to read 3, iclass 23, count 0 2006.229.20:16:00.92#ibcon#read 3, iclass 23, count 0 2006.229.20:16:00.92#ibcon#about to read 4, iclass 23, count 0 2006.229.20:16:00.92#ibcon#read 4, iclass 23, count 0 2006.229.20:16:00.92#ibcon#about to read 5, iclass 23, count 0 2006.229.20:16:00.92#ibcon#read 5, iclass 23, count 0 2006.229.20:16:00.92#ibcon#about to read 6, iclass 23, count 0 2006.229.20:16:00.92#ibcon#read 6, iclass 23, count 0 2006.229.20:16:00.92#ibcon#end of sib2, iclass 23, count 0 2006.229.20:16:00.92#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:16:00.92#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:16:00.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:16:00.92#ibcon#*before write, iclass 23, count 0 2006.229.20:16:00.92#ibcon#enter sib2, iclass 23, count 0 2006.229.20:16:00.92#ibcon#flushed, iclass 23, count 0 2006.229.20:16:00.92#ibcon#about to write, iclass 23, count 0 2006.229.20:16:00.92#ibcon#wrote, iclass 23, count 0 2006.229.20:16:00.92#ibcon#about to read 3, iclass 23, count 0 2006.229.20:16:00.96#ibcon#read 3, iclass 23, count 0 2006.229.20:16:00.96#ibcon#about to read 4, iclass 23, count 0 2006.229.20:16:00.96#ibcon#read 4, iclass 23, count 0 2006.229.20:16:00.96#ibcon#about to read 5, iclass 23, count 0 2006.229.20:16:00.96#ibcon#read 5, iclass 23, count 0 2006.229.20:16:00.96#ibcon#about to read 6, iclass 23, count 0 2006.229.20:16:00.96#ibcon#read 6, iclass 23, count 0 2006.229.20:16:00.96#ibcon#end of sib2, iclass 23, count 0 2006.229.20:16:00.96#ibcon#*after write, iclass 23, count 0 2006.229.20:16:00.96#ibcon#*before return 0, iclass 23, count 0 2006.229.20:16:00.96#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:16:00.96#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:16:00.96#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:16:00.96#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:16:00.96$vck44/vb=1,4 2006.229.20:16:00.96#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.20:16:00.96#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.20:16:00.96#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:00.96#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:16:00.96#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:16:00.96#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:16:00.96#ibcon#enter wrdev, iclass 25, count 2 2006.229.20:16:00.96#ibcon#first serial, iclass 25, count 2 2006.229.20:16:00.96#ibcon#enter sib2, iclass 25, count 2 2006.229.20:16:00.96#ibcon#flushed, iclass 25, count 2 2006.229.20:16:00.96#ibcon#about to write, iclass 25, count 2 2006.229.20:16:00.96#ibcon#wrote, iclass 25, count 2 2006.229.20:16:00.96#ibcon#about to read 3, iclass 25, count 2 2006.229.20:16:00.98#ibcon#read 3, iclass 25, count 2 2006.229.20:16:00.98#ibcon#about to read 4, iclass 25, count 2 2006.229.20:16:00.98#ibcon#read 4, iclass 25, count 2 2006.229.20:16:00.98#ibcon#about to read 5, iclass 25, count 2 2006.229.20:16:00.98#ibcon#read 5, iclass 25, count 2 2006.229.20:16:00.98#ibcon#about to read 6, iclass 25, count 2 2006.229.20:16:00.98#ibcon#read 6, iclass 25, count 2 2006.229.20:16:00.98#ibcon#end of sib2, iclass 25, count 2 2006.229.20:16:00.98#ibcon#*mode == 0, iclass 25, count 2 2006.229.20:16:00.98#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.20:16:00.98#ibcon#[27=AT01-04\r\n] 2006.229.20:16:00.98#ibcon#*before write, iclass 25, count 2 2006.229.20:16:00.98#ibcon#enter sib2, iclass 25, count 2 2006.229.20:16:00.98#ibcon#flushed, iclass 25, count 2 2006.229.20:16:00.98#ibcon#about to write, iclass 25, count 2 2006.229.20:16:00.98#ibcon#wrote, iclass 25, count 2 2006.229.20:16:00.98#ibcon#about to read 3, iclass 25, count 2 2006.229.20:16:01.01#ibcon#read 3, iclass 25, count 2 2006.229.20:16:01.01#ibcon#about to read 4, iclass 25, count 2 2006.229.20:16:01.01#ibcon#read 4, iclass 25, count 2 2006.229.20:16:01.01#ibcon#about to read 5, iclass 25, count 2 2006.229.20:16:01.01#ibcon#read 5, iclass 25, count 2 2006.229.20:16:01.01#ibcon#about to read 6, iclass 25, count 2 2006.229.20:16:01.01#ibcon#read 6, iclass 25, count 2 2006.229.20:16:01.01#ibcon#end of sib2, iclass 25, count 2 2006.229.20:16:01.01#ibcon#*after write, iclass 25, count 2 2006.229.20:16:01.01#ibcon#*before return 0, iclass 25, count 2 2006.229.20:16:01.01#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:16:01.01#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:16:01.01#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.20:16:01.01#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:01.01#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:16:01.13#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:16:01.13#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:16:01.13#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:16:01.13#ibcon#first serial, iclass 25, count 0 2006.229.20:16:01.13#ibcon#enter sib2, iclass 25, count 0 2006.229.20:16:01.13#ibcon#flushed, iclass 25, count 0 2006.229.20:16:01.13#ibcon#about to write, iclass 25, count 0 2006.229.20:16:01.13#ibcon#wrote, iclass 25, count 0 2006.229.20:16:01.13#ibcon#about to read 3, iclass 25, count 0 2006.229.20:16:01.15#ibcon#read 3, iclass 25, count 0 2006.229.20:16:01.15#ibcon#about to read 4, iclass 25, count 0 2006.229.20:16:01.15#ibcon#read 4, iclass 25, count 0 2006.229.20:16:01.15#ibcon#about to read 5, iclass 25, count 0 2006.229.20:16:01.15#ibcon#read 5, iclass 25, count 0 2006.229.20:16:01.15#ibcon#about to read 6, iclass 25, count 0 2006.229.20:16:01.15#ibcon#read 6, iclass 25, count 0 2006.229.20:16:01.15#ibcon#end of sib2, iclass 25, count 0 2006.229.20:16:01.15#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:16:01.15#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:16:01.15#ibcon#[27=USB\r\n] 2006.229.20:16:01.15#ibcon#*before write, iclass 25, count 0 2006.229.20:16:01.15#ibcon#enter sib2, iclass 25, count 0 2006.229.20:16:01.15#ibcon#flushed, iclass 25, count 0 2006.229.20:16:01.15#ibcon#about to write, iclass 25, count 0 2006.229.20:16:01.15#ibcon#wrote, iclass 25, count 0 2006.229.20:16:01.15#ibcon#about to read 3, iclass 25, count 0 2006.229.20:16:01.18#ibcon#read 3, iclass 25, count 0 2006.229.20:16:01.18#ibcon#about to read 4, iclass 25, count 0 2006.229.20:16:01.18#ibcon#read 4, iclass 25, count 0 2006.229.20:16:01.18#ibcon#about to read 5, iclass 25, count 0 2006.229.20:16:01.18#ibcon#read 5, iclass 25, count 0 2006.229.20:16:01.18#ibcon#about to read 6, iclass 25, count 0 2006.229.20:16:01.18#ibcon#read 6, iclass 25, count 0 2006.229.20:16:01.18#ibcon#end of sib2, iclass 25, count 0 2006.229.20:16:01.18#ibcon#*after write, iclass 25, count 0 2006.229.20:16:01.18#ibcon#*before return 0, iclass 25, count 0 2006.229.20:16:01.18#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:16:01.18#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:16:01.18#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:16:01.18#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:16:01.18$vck44/vblo=2,634.99 2006.229.20:16:01.18#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.20:16:01.18#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.20:16:01.18#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:01.18#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:16:01.18#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:16:01.18#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:16:01.18#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:16:01.18#ibcon#first serial, iclass 27, count 0 2006.229.20:16:01.18#ibcon#enter sib2, iclass 27, count 0 2006.229.20:16:01.18#ibcon#flushed, iclass 27, count 0 2006.229.20:16:01.18#ibcon#about to write, iclass 27, count 0 2006.229.20:16:01.18#ibcon#wrote, iclass 27, count 0 2006.229.20:16:01.19#ibcon#about to read 3, iclass 27, count 0 2006.229.20:16:01.20#ibcon#read 3, iclass 27, count 0 2006.229.20:16:01.20#ibcon#about to read 4, iclass 27, count 0 2006.229.20:16:01.20#ibcon#read 4, iclass 27, count 0 2006.229.20:16:01.20#ibcon#about to read 5, iclass 27, count 0 2006.229.20:16:01.20#ibcon#read 5, iclass 27, count 0 2006.229.20:16:01.20#ibcon#about to read 6, iclass 27, count 0 2006.229.20:16:01.20#ibcon#read 6, iclass 27, count 0 2006.229.20:16:01.20#ibcon#end of sib2, iclass 27, count 0 2006.229.20:16:01.20#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:16:01.20#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:16:01.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:16:01.20#ibcon#*before write, iclass 27, count 0 2006.229.20:16:01.20#ibcon#enter sib2, iclass 27, count 0 2006.229.20:16:01.20#ibcon#flushed, iclass 27, count 0 2006.229.20:16:01.20#ibcon#about to write, iclass 27, count 0 2006.229.20:16:01.20#ibcon#wrote, iclass 27, count 0 2006.229.20:16:01.20#ibcon#about to read 3, iclass 27, count 0 2006.229.20:16:01.24#ibcon#read 3, iclass 27, count 0 2006.229.20:16:01.24#ibcon#about to read 4, iclass 27, count 0 2006.229.20:16:01.24#ibcon#read 4, iclass 27, count 0 2006.229.20:16:01.24#ibcon#about to read 5, iclass 27, count 0 2006.229.20:16:01.24#ibcon#read 5, iclass 27, count 0 2006.229.20:16:01.24#ibcon#about to read 6, iclass 27, count 0 2006.229.20:16:01.24#ibcon#read 6, iclass 27, count 0 2006.229.20:16:01.24#ibcon#end of sib2, iclass 27, count 0 2006.229.20:16:01.24#ibcon#*after write, iclass 27, count 0 2006.229.20:16:01.24#ibcon#*before return 0, iclass 27, count 0 2006.229.20:16:01.24#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:16:01.24#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:16:01.24#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:16:01.24#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:16:01.24$vck44/vb=2,4 2006.229.20:16:01.24#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.20:16:01.24#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.20:16:01.24#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:01.24#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:16:01.30#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:16:01.30#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:16:01.30#ibcon#enter wrdev, iclass 29, count 2 2006.229.20:16:01.30#ibcon#first serial, iclass 29, count 2 2006.229.20:16:01.30#ibcon#enter sib2, iclass 29, count 2 2006.229.20:16:01.30#ibcon#flushed, iclass 29, count 2 2006.229.20:16:01.30#ibcon#about to write, iclass 29, count 2 2006.229.20:16:01.30#ibcon#wrote, iclass 29, count 2 2006.229.20:16:01.30#ibcon#about to read 3, iclass 29, count 2 2006.229.20:16:01.32#ibcon#read 3, iclass 29, count 2 2006.229.20:16:01.32#ibcon#about to read 4, iclass 29, count 2 2006.229.20:16:01.32#ibcon#read 4, iclass 29, count 2 2006.229.20:16:01.32#ibcon#about to read 5, iclass 29, count 2 2006.229.20:16:01.32#ibcon#read 5, iclass 29, count 2 2006.229.20:16:01.32#ibcon#about to read 6, iclass 29, count 2 2006.229.20:16:01.32#ibcon#read 6, iclass 29, count 2 2006.229.20:16:01.32#ibcon#end of sib2, iclass 29, count 2 2006.229.20:16:01.32#ibcon#*mode == 0, iclass 29, count 2 2006.229.20:16:01.32#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.20:16:01.32#ibcon#[27=AT02-04\r\n] 2006.229.20:16:01.32#ibcon#*before write, iclass 29, count 2 2006.229.20:16:01.32#ibcon#enter sib2, iclass 29, count 2 2006.229.20:16:01.32#ibcon#flushed, iclass 29, count 2 2006.229.20:16:01.32#ibcon#about to write, iclass 29, count 2 2006.229.20:16:01.32#ibcon#wrote, iclass 29, count 2 2006.229.20:16:01.32#ibcon#about to read 3, iclass 29, count 2 2006.229.20:16:01.35#ibcon#read 3, iclass 29, count 2 2006.229.20:16:01.35#ibcon#about to read 4, iclass 29, count 2 2006.229.20:16:01.35#ibcon#read 4, iclass 29, count 2 2006.229.20:16:01.35#ibcon#about to read 5, iclass 29, count 2 2006.229.20:16:01.35#ibcon#read 5, iclass 29, count 2 2006.229.20:16:01.35#ibcon#about to read 6, iclass 29, count 2 2006.229.20:16:01.35#ibcon#read 6, iclass 29, count 2 2006.229.20:16:01.35#ibcon#end of sib2, iclass 29, count 2 2006.229.20:16:01.35#ibcon#*after write, iclass 29, count 2 2006.229.20:16:01.35#ibcon#*before return 0, iclass 29, count 2 2006.229.20:16:01.35#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:16:01.35#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:16:01.35#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.20:16:01.35#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:01.35#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:16:01.47#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:16:01.47#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:16:01.47#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:16:01.47#ibcon#first serial, iclass 29, count 0 2006.229.20:16:01.47#ibcon#enter sib2, iclass 29, count 0 2006.229.20:16:01.47#ibcon#flushed, iclass 29, count 0 2006.229.20:16:01.47#ibcon#about to write, iclass 29, count 0 2006.229.20:16:01.47#ibcon#wrote, iclass 29, count 0 2006.229.20:16:01.47#ibcon#about to read 3, iclass 29, count 0 2006.229.20:16:01.49#ibcon#read 3, iclass 29, count 0 2006.229.20:16:01.49#ibcon#about to read 4, iclass 29, count 0 2006.229.20:16:01.49#ibcon#read 4, iclass 29, count 0 2006.229.20:16:01.49#ibcon#about to read 5, iclass 29, count 0 2006.229.20:16:01.49#ibcon#read 5, iclass 29, count 0 2006.229.20:16:01.49#ibcon#about to read 6, iclass 29, count 0 2006.229.20:16:01.49#ibcon#read 6, iclass 29, count 0 2006.229.20:16:01.49#ibcon#end of sib2, iclass 29, count 0 2006.229.20:16:01.49#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:16:01.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:16:01.49#ibcon#[27=USB\r\n] 2006.229.20:16:01.49#ibcon#*before write, iclass 29, count 0 2006.229.20:16:01.49#ibcon#enter sib2, iclass 29, count 0 2006.229.20:16:01.49#ibcon#flushed, iclass 29, count 0 2006.229.20:16:01.49#ibcon#about to write, iclass 29, count 0 2006.229.20:16:01.49#ibcon#wrote, iclass 29, count 0 2006.229.20:16:01.49#ibcon#about to read 3, iclass 29, count 0 2006.229.20:16:01.52#ibcon#read 3, iclass 29, count 0 2006.229.20:16:01.52#ibcon#about to read 4, iclass 29, count 0 2006.229.20:16:01.52#ibcon#read 4, iclass 29, count 0 2006.229.20:16:01.52#ibcon#about to read 5, iclass 29, count 0 2006.229.20:16:01.52#ibcon#read 5, iclass 29, count 0 2006.229.20:16:01.52#ibcon#about to read 6, iclass 29, count 0 2006.229.20:16:01.52#ibcon#read 6, iclass 29, count 0 2006.229.20:16:01.52#ibcon#end of sib2, iclass 29, count 0 2006.229.20:16:01.52#ibcon#*after write, iclass 29, count 0 2006.229.20:16:01.52#ibcon#*before return 0, iclass 29, count 0 2006.229.20:16:01.52#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:16:01.52#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:16:01.52#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:16:01.52#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:16:01.52$vck44/vblo=3,649.99 2006.229.20:16:01.52#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.20:16:01.53#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.20:16:01.53#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:01.53#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:16:01.53#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:16:01.53#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:16:01.53#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:16:01.53#ibcon#first serial, iclass 31, count 0 2006.229.20:16:01.53#ibcon#enter sib2, iclass 31, count 0 2006.229.20:16:01.53#ibcon#flushed, iclass 31, count 0 2006.229.20:16:01.53#ibcon#about to write, iclass 31, count 0 2006.229.20:16:01.53#ibcon#wrote, iclass 31, count 0 2006.229.20:16:01.53#ibcon#about to read 3, iclass 31, count 0 2006.229.20:16:01.54#ibcon#read 3, iclass 31, count 0 2006.229.20:16:01.54#ibcon#about to read 4, iclass 31, count 0 2006.229.20:16:01.54#ibcon#read 4, iclass 31, count 0 2006.229.20:16:01.54#ibcon#about to read 5, iclass 31, count 0 2006.229.20:16:01.54#ibcon#read 5, iclass 31, count 0 2006.229.20:16:01.54#ibcon#about to read 6, iclass 31, count 0 2006.229.20:16:01.54#ibcon#read 6, iclass 31, count 0 2006.229.20:16:01.54#ibcon#end of sib2, iclass 31, count 0 2006.229.20:16:01.54#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:16:01.54#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:16:01.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:16:01.54#ibcon#*before write, iclass 31, count 0 2006.229.20:16:01.54#ibcon#enter sib2, iclass 31, count 0 2006.229.20:16:01.54#ibcon#flushed, iclass 31, count 0 2006.229.20:16:01.54#ibcon#about to write, iclass 31, count 0 2006.229.20:16:01.54#ibcon#wrote, iclass 31, count 0 2006.229.20:16:01.54#ibcon#about to read 3, iclass 31, count 0 2006.229.20:16:01.58#ibcon#read 3, iclass 31, count 0 2006.229.20:16:01.58#ibcon#about to read 4, iclass 31, count 0 2006.229.20:16:01.58#ibcon#read 4, iclass 31, count 0 2006.229.20:16:01.58#ibcon#about to read 5, iclass 31, count 0 2006.229.20:16:01.58#ibcon#read 5, iclass 31, count 0 2006.229.20:16:01.58#ibcon#about to read 6, iclass 31, count 0 2006.229.20:16:01.58#ibcon#read 6, iclass 31, count 0 2006.229.20:16:01.58#ibcon#end of sib2, iclass 31, count 0 2006.229.20:16:01.58#ibcon#*after write, iclass 31, count 0 2006.229.20:16:01.58#ibcon#*before return 0, iclass 31, count 0 2006.229.20:16:01.58#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:16:01.58#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:16:01.58#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:16:01.58#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:16:01.58$vck44/vb=3,4 2006.229.20:16:01.58#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.20:16:01.58#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.20:16:01.58#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:01.58#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:16:01.64#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:16:01.64#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:16:01.64#ibcon#enter wrdev, iclass 33, count 2 2006.229.20:16:01.64#ibcon#first serial, iclass 33, count 2 2006.229.20:16:01.64#ibcon#enter sib2, iclass 33, count 2 2006.229.20:16:01.64#ibcon#flushed, iclass 33, count 2 2006.229.20:16:01.64#ibcon#about to write, iclass 33, count 2 2006.229.20:16:01.64#ibcon#wrote, iclass 33, count 2 2006.229.20:16:01.64#ibcon#about to read 3, iclass 33, count 2 2006.229.20:16:01.66#ibcon#read 3, iclass 33, count 2 2006.229.20:16:01.66#ibcon#about to read 4, iclass 33, count 2 2006.229.20:16:01.66#ibcon#read 4, iclass 33, count 2 2006.229.20:16:01.66#ibcon#about to read 5, iclass 33, count 2 2006.229.20:16:01.66#ibcon#read 5, iclass 33, count 2 2006.229.20:16:01.66#ibcon#about to read 6, iclass 33, count 2 2006.229.20:16:01.66#ibcon#read 6, iclass 33, count 2 2006.229.20:16:01.66#ibcon#end of sib2, iclass 33, count 2 2006.229.20:16:01.66#ibcon#*mode == 0, iclass 33, count 2 2006.229.20:16:01.66#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.20:16:01.66#ibcon#[27=AT03-04\r\n] 2006.229.20:16:01.66#ibcon#*before write, iclass 33, count 2 2006.229.20:16:01.66#ibcon#enter sib2, iclass 33, count 2 2006.229.20:16:01.66#ibcon#flushed, iclass 33, count 2 2006.229.20:16:01.66#ibcon#about to write, iclass 33, count 2 2006.229.20:16:01.66#ibcon#wrote, iclass 33, count 2 2006.229.20:16:01.66#ibcon#about to read 3, iclass 33, count 2 2006.229.20:16:01.69#ibcon#read 3, iclass 33, count 2 2006.229.20:16:01.69#ibcon#about to read 4, iclass 33, count 2 2006.229.20:16:01.69#ibcon#read 4, iclass 33, count 2 2006.229.20:16:01.69#ibcon#about to read 5, iclass 33, count 2 2006.229.20:16:01.69#ibcon#read 5, iclass 33, count 2 2006.229.20:16:01.69#ibcon#about to read 6, iclass 33, count 2 2006.229.20:16:01.69#ibcon#read 6, iclass 33, count 2 2006.229.20:16:01.69#ibcon#end of sib2, iclass 33, count 2 2006.229.20:16:01.69#ibcon#*after write, iclass 33, count 2 2006.229.20:16:01.69#ibcon#*before return 0, iclass 33, count 2 2006.229.20:16:01.69#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:16:01.69#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:16:01.69#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.20:16:01.69#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:01.69#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:16:01.81#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:16:01.81#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:16:01.81#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:16:01.81#ibcon#first serial, iclass 33, count 0 2006.229.20:16:01.81#ibcon#enter sib2, iclass 33, count 0 2006.229.20:16:01.81#ibcon#flushed, iclass 33, count 0 2006.229.20:16:01.81#ibcon#about to write, iclass 33, count 0 2006.229.20:16:01.81#ibcon#wrote, iclass 33, count 0 2006.229.20:16:01.81#ibcon#about to read 3, iclass 33, count 0 2006.229.20:16:01.83#ibcon#read 3, iclass 33, count 0 2006.229.20:16:01.83#ibcon#about to read 4, iclass 33, count 0 2006.229.20:16:01.83#ibcon#read 4, iclass 33, count 0 2006.229.20:16:01.83#ibcon#about to read 5, iclass 33, count 0 2006.229.20:16:01.83#ibcon#read 5, iclass 33, count 0 2006.229.20:16:01.83#ibcon#about to read 6, iclass 33, count 0 2006.229.20:16:01.83#ibcon#read 6, iclass 33, count 0 2006.229.20:16:01.83#ibcon#end of sib2, iclass 33, count 0 2006.229.20:16:01.83#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:16:01.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:16:01.83#ibcon#[27=USB\r\n] 2006.229.20:16:01.83#ibcon#*before write, iclass 33, count 0 2006.229.20:16:01.83#ibcon#enter sib2, iclass 33, count 0 2006.229.20:16:01.83#ibcon#flushed, iclass 33, count 0 2006.229.20:16:01.83#ibcon#about to write, iclass 33, count 0 2006.229.20:16:01.83#ibcon#wrote, iclass 33, count 0 2006.229.20:16:01.83#ibcon#about to read 3, iclass 33, count 0 2006.229.20:16:01.86#ibcon#read 3, iclass 33, count 0 2006.229.20:16:01.86#ibcon#about to read 4, iclass 33, count 0 2006.229.20:16:01.86#ibcon#read 4, iclass 33, count 0 2006.229.20:16:01.86#ibcon#about to read 5, iclass 33, count 0 2006.229.20:16:01.86#ibcon#read 5, iclass 33, count 0 2006.229.20:16:01.86#ibcon#about to read 6, iclass 33, count 0 2006.229.20:16:01.86#ibcon#read 6, iclass 33, count 0 2006.229.20:16:01.86#ibcon#end of sib2, iclass 33, count 0 2006.229.20:16:01.86#ibcon#*after write, iclass 33, count 0 2006.229.20:16:01.86#ibcon#*before return 0, iclass 33, count 0 2006.229.20:16:01.86#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:16:01.86#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:16:01.86#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:16:01.86#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:16:01.86$vck44/vblo=4,679.99 2006.229.20:16:01.86#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.20:16:01.86#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.20:16:01.86#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:01.86#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:16:01.86#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:16:01.86#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:16:01.86#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:16:01.86#ibcon#first serial, iclass 35, count 0 2006.229.20:16:01.86#ibcon#enter sib2, iclass 35, count 0 2006.229.20:16:01.86#ibcon#flushed, iclass 35, count 0 2006.229.20:16:01.86#ibcon#about to write, iclass 35, count 0 2006.229.20:16:01.86#ibcon#wrote, iclass 35, count 0 2006.229.20:16:01.87#ibcon#about to read 3, iclass 35, count 0 2006.229.20:16:01.88#ibcon#read 3, iclass 35, count 0 2006.229.20:16:01.88#ibcon#about to read 4, iclass 35, count 0 2006.229.20:16:01.88#ibcon#read 4, iclass 35, count 0 2006.229.20:16:01.88#ibcon#about to read 5, iclass 35, count 0 2006.229.20:16:01.88#ibcon#read 5, iclass 35, count 0 2006.229.20:16:01.88#ibcon#about to read 6, iclass 35, count 0 2006.229.20:16:01.88#ibcon#read 6, iclass 35, count 0 2006.229.20:16:01.88#ibcon#end of sib2, iclass 35, count 0 2006.229.20:16:01.88#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:16:01.88#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:16:01.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:16:01.88#ibcon#*before write, iclass 35, count 0 2006.229.20:16:01.88#ibcon#enter sib2, iclass 35, count 0 2006.229.20:16:01.88#ibcon#flushed, iclass 35, count 0 2006.229.20:16:01.88#ibcon#about to write, iclass 35, count 0 2006.229.20:16:01.88#ibcon#wrote, iclass 35, count 0 2006.229.20:16:01.88#ibcon#about to read 3, iclass 35, count 0 2006.229.20:16:01.92#ibcon#read 3, iclass 35, count 0 2006.229.20:16:01.92#ibcon#about to read 4, iclass 35, count 0 2006.229.20:16:01.92#ibcon#read 4, iclass 35, count 0 2006.229.20:16:01.92#ibcon#about to read 5, iclass 35, count 0 2006.229.20:16:01.92#ibcon#read 5, iclass 35, count 0 2006.229.20:16:01.92#ibcon#about to read 6, iclass 35, count 0 2006.229.20:16:01.92#ibcon#read 6, iclass 35, count 0 2006.229.20:16:01.92#ibcon#end of sib2, iclass 35, count 0 2006.229.20:16:01.92#ibcon#*after write, iclass 35, count 0 2006.229.20:16:01.92#ibcon#*before return 0, iclass 35, count 0 2006.229.20:16:01.92#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:16:01.92#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:16:01.92#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:16:01.92#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:16:01.92$vck44/vb=4,4 2006.229.20:16:01.92#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.20:16:01.92#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.20:16:01.92#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:01.92#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:16:01.98#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:16:01.98#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:16:01.98#ibcon#enter wrdev, iclass 37, count 2 2006.229.20:16:01.98#ibcon#first serial, iclass 37, count 2 2006.229.20:16:01.98#ibcon#enter sib2, iclass 37, count 2 2006.229.20:16:01.98#ibcon#flushed, iclass 37, count 2 2006.229.20:16:01.98#ibcon#about to write, iclass 37, count 2 2006.229.20:16:01.98#ibcon#wrote, iclass 37, count 2 2006.229.20:16:01.98#ibcon#about to read 3, iclass 37, count 2 2006.229.20:16:02.00#ibcon#read 3, iclass 37, count 2 2006.229.20:16:02.00#ibcon#about to read 4, iclass 37, count 2 2006.229.20:16:02.00#ibcon#read 4, iclass 37, count 2 2006.229.20:16:02.00#ibcon#about to read 5, iclass 37, count 2 2006.229.20:16:02.00#ibcon#read 5, iclass 37, count 2 2006.229.20:16:02.00#ibcon#about to read 6, iclass 37, count 2 2006.229.20:16:02.00#ibcon#read 6, iclass 37, count 2 2006.229.20:16:02.00#ibcon#end of sib2, iclass 37, count 2 2006.229.20:16:02.00#ibcon#*mode == 0, iclass 37, count 2 2006.229.20:16:02.00#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.20:16:02.00#ibcon#[27=AT04-04\r\n] 2006.229.20:16:02.00#ibcon#*before write, iclass 37, count 2 2006.229.20:16:02.00#ibcon#enter sib2, iclass 37, count 2 2006.229.20:16:02.00#ibcon#flushed, iclass 37, count 2 2006.229.20:16:02.00#ibcon#about to write, iclass 37, count 2 2006.229.20:16:02.00#ibcon#wrote, iclass 37, count 2 2006.229.20:16:02.00#ibcon#about to read 3, iclass 37, count 2 2006.229.20:16:02.03#ibcon#read 3, iclass 37, count 2 2006.229.20:16:02.03#ibcon#about to read 4, iclass 37, count 2 2006.229.20:16:02.03#ibcon#read 4, iclass 37, count 2 2006.229.20:16:02.03#ibcon#about to read 5, iclass 37, count 2 2006.229.20:16:02.03#ibcon#read 5, iclass 37, count 2 2006.229.20:16:02.03#ibcon#about to read 6, iclass 37, count 2 2006.229.20:16:02.03#ibcon#read 6, iclass 37, count 2 2006.229.20:16:02.03#ibcon#end of sib2, iclass 37, count 2 2006.229.20:16:02.03#ibcon#*after write, iclass 37, count 2 2006.229.20:16:02.03#ibcon#*before return 0, iclass 37, count 2 2006.229.20:16:02.03#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:16:02.03#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:16:02.03#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.20:16:02.03#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:02.03#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:16:02.15#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:16:02.15#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:16:02.15#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:16:02.15#ibcon#first serial, iclass 37, count 0 2006.229.20:16:02.15#ibcon#enter sib2, iclass 37, count 0 2006.229.20:16:02.15#ibcon#flushed, iclass 37, count 0 2006.229.20:16:02.15#ibcon#about to write, iclass 37, count 0 2006.229.20:16:02.15#ibcon#wrote, iclass 37, count 0 2006.229.20:16:02.15#ibcon#about to read 3, iclass 37, count 0 2006.229.20:16:02.17#ibcon#read 3, iclass 37, count 0 2006.229.20:16:02.17#ibcon#about to read 4, iclass 37, count 0 2006.229.20:16:02.17#ibcon#read 4, iclass 37, count 0 2006.229.20:16:02.17#ibcon#about to read 5, iclass 37, count 0 2006.229.20:16:02.17#ibcon#read 5, iclass 37, count 0 2006.229.20:16:02.17#ibcon#about to read 6, iclass 37, count 0 2006.229.20:16:02.17#ibcon#read 6, iclass 37, count 0 2006.229.20:16:02.17#ibcon#end of sib2, iclass 37, count 0 2006.229.20:16:02.17#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:16:02.17#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:16:02.17#ibcon#[27=USB\r\n] 2006.229.20:16:02.17#ibcon#*before write, iclass 37, count 0 2006.229.20:16:02.17#ibcon#enter sib2, iclass 37, count 0 2006.229.20:16:02.17#ibcon#flushed, iclass 37, count 0 2006.229.20:16:02.17#ibcon#about to write, iclass 37, count 0 2006.229.20:16:02.17#ibcon#wrote, iclass 37, count 0 2006.229.20:16:02.17#ibcon#about to read 3, iclass 37, count 0 2006.229.20:16:02.20#ibcon#read 3, iclass 37, count 0 2006.229.20:16:02.20#ibcon#about to read 4, iclass 37, count 0 2006.229.20:16:02.20#ibcon#read 4, iclass 37, count 0 2006.229.20:16:02.20#ibcon#about to read 5, iclass 37, count 0 2006.229.20:16:02.20#ibcon#read 5, iclass 37, count 0 2006.229.20:16:02.20#ibcon#about to read 6, iclass 37, count 0 2006.229.20:16:02.20#ibcon#read 6, iclass 37, count 0 2006.229.20:16:02.20#ibcon#end of sib2, iclass 37, count 0 2006.229.20:16:02.20#ibcon#*after write, iclass 37, count 0 2006.229.20:16:02.20#ibcon#*before return 0, iclass 37, count 0 2006.229.20:16:02.20#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:16:02.20#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:16:02.20#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:16:02.20#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:16:02.20$vck44/vblo=5,709.99 2006.229.20:16:02.20#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.20:16:02.20#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.20:16:02.20#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:02.20#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:16:02.20#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:16:02.20#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:16:02.20#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:16:02.20#ibcon#first serial, iclass 39, count 0 2006.229.20:16:02.21#ibcon#enter sib2, iclass 39, count 0 2006.229.20:16:02.21#ibcon#flushed, iclass 39, count 0 2006.229.20:16:02.21#ibcon#about to write, iclass 39, count 0 2006.229.20:16:02.21#ibcon#wrote, iclass 39, count 0 2006.229.20:16:02.21#ibcon#about to read 3, iclass 39, count 0 2006.229.20:16:02.22#ibcon#read 3, iclass 39, count 0 2006.229.20:16:02.22#ibcon#about to read 4, iclass 39, count 0 2006.229.20:16:02.22#ibcon#read 4, iclass 39, count 0 2006.229.20:16:02.22#ibcon#about to read 5, iclass 39, count 0 2006.229.20:16:02.22#ibcon#read 5, iclass 39, count 0 2006.229.20:16:02.22#ibcon#about to read 6, iclass 39, count 0 2006.229.20:16:02.22#ibcon#read 6, iclass 39, count 0 2006.229.20:16:02.22#ibcon#end of sib2, iclass 39, count 0 2006.229.20:16:02.22#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:16:02.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:16:02.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:16:02.22#ibcon#*before write, iclass 39, count 0 2006.229.20:16:02.22#ibcon#enter sib2, iclass 39, count 0 2006.229.20:16:02.22#ibcon#flushed, iclass 39, count 0 2006.229.20:16:02.22#ibcon#about to write, iclass 39, count 0 2006.229.20:16:02.22#ibcon#wrote, iclass 39, count 0 2006.229.20:16:02.22#ibcon#about to read 3, iclass 39, count 0 2006.229.20:16:02.26#ibcon#read 3, iclass 39, count 0 2006.229.20:16:02.26#ibcon#about to read 4, iclass 39, count 0 2006.229.20:16:02.26#ibcon#read 4, iclass 39, count 0 2006.229.20:16:02.26#ibcon#about to read 5, iclass 39, count 0 2006.229.20:16:02.26#ibcon#read 5, iclass 39, count 0 2006.229.20:16:02.26#ibcon#about to read 6, iclass 39, count 0 2006.229.20:16:02.26#ibcon#read 6, iclass 39, count 0 2006.229.20:16:02.26#ibcon#end of sib2, iclass 39, count 0 2006.229.20:16:02.26#ibcon#*after write, iclass 39, count 0 2006.229.20:16:02.26#ibcon#*before return 0, iclass 39, count 0 2006.229.20:16:02.26#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:16:02.26#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:16:02.26#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:16:02.26#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:16:02.26$vck44/vb=5,4 2006.229.20:16:02.26#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.20:16:02.26#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.20:16:02.26#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:02.26#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:16:02.32#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:16:02.32#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:16:02.32#ibcon#enter wrdev, iclass 3, count 2 2006.229.20:16:02.32#ibcon#first serial, iclass 3, count 2 2006.229.20:16:02.32#ibcon#enter sib2, iclass 3, count 2 2006.229.20:16:02.32#ibcon#flushed, iclass 3, count 2 2006.229.20:16:02.32#ibcon#about to write, iclass 3, count 2 2006.229.20:16:02.32#ibcon#wrote, iclass 3, count 2 2006.229.20:16:02.32#ibcon#about to read 3, iclass 3, count 2 2006.229.20:16:02.34#ibcon#read 3, iclass 3, count 2 2006.229.20:16:02.34#ibcon#about to read 4, iclass 3, count 2 2006.229.20:16:02.34#ibcon#read 4, iclass 3, count 2 2006.229.20:16:02.34#ibcon#about to read 5, iclass 3, count 2 2006.229.20:16:02.34#ibcon#read 5, iclass 3, count 2 2006.229.20:16:02.34#ibcon#about to read 6, iclass 3, count 2 2006.229.20:16:02.34#ibcon#read 6, iclass 3, count 2 2006.229.20:16:02.34#ibcon#end of sib2, iclass 3, count 2 2006.229.20:16:02.34#ibcon#*mode == 0, iclass 3, count 2 2006.229.20:16:02.34#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.20:16:02.34#ibcon#[27=AT05-04\r\n] 2006.229.20:16:02.34#ibcon#*before write, iclass 3, count 2 2006.229.20:16:02.34#ibcon#enter sib2, iclass 3, count 2 2006.229.20:16:02.34#ibcon#flushed, iclass 3, count 2 2006.229.20:16:02.34#ibcon#about to write, iclass 3, count 2 2006.229.20:16:02.34#ibcon#wrote, iclass 3, count 2 2006.229.20:16:02.34#ibcon#about to read 3, iclass 3, count 2 2006.229.20:16:02.37#ibcon#read 3, iclass 3, count 2 2006.229.20:16:02.37#ibcon#about to read 4, iclass 3, count 2 2006.229.20:16:02.37#ibcon#read 4, iclass 3, count 2 2006.229.20:16:02.37#ibcon#about to read 5, iclass 3, count 2 2006.229.20:16:02.37#ibcon#read 5, iclass 3, count 2 2006.229.20:16:02.37#ibcon#about to read 6, iclass 3, count 2 2006.229.20:16:02.37#ibcon#read 6, iclass 3, count 2 2006.229.20:16:02.37#ibcon#end of sib2, iclass 3, count 2 2006.229.20:16:02.37#ibcon#*after write, iclass 3, count 2 2006.229.20:16:02.37#ibcon#*before return 0, iclass 3, count 2 2006.229.20:16:02.37#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:16:02.37#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:16:02.37#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.20:16:02.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:02.37#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:16:02.49#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:16:02.49#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:16:02.49#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:16:02.49#ibcon#first serial, iclass 3, count 0 2006.229.20:16:02.49#ibcon#enter sib2, iclass 3, count 0 2006.229.20:16:02.49#ibcon#flushed, iclass 3, count 0 2006.229.20:16:02.49#ibcon#about to write, iclass 3, count 0 2006.229.20:16:02.49#ibcon#wrote, iclass 3, count 0 2006.229.20:16:02.49#ibcon#about to read 3, iclass 3, count 0 2006.229.20:16:02.51#ibcon#read 3, iclass 3, count 0 2006.229.20:16:02.51#ibcon#about to read 4, iclass 3, count 0 2006.229.20:16:02.51#ibcon#read 4, iclass 3, count 0 2006.229.20:16:02.51#ibcon#about to read 5, iclass 3, count 0 2006.229.20:16:02.51#ibcon#read 5, iclass 3, count 0 2006.229.20:16:02.51#ibcon#about to read 6, iclass 3, count 0 2006.229.20:16:02.51#ibcon#read 6, iclass 3, count 0 2006.229.20:16:02.51#ibcon#end of sib2, iclass 3, count 0 2006.229.20:16:02.51#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:16:02.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:16:02.51#ibcon#[27=USB\r\n] 2006.229.20:16:02.51#ibcon#*before write, iclass 3, count 0 2006.229.20:16:02.51#ibcon#enter sib2, iclass 3, count 0 2006.229.20:16:02.51#ibcon#flushed, iclass 3, count 0 2006.229.20:16:02.51#ibcon#about to write, iclass 3, count 0 2006.229.20:16:02.51#ibcon#wrote, iclass 3, count 0 2006.229.20:16:02.51#ibcon#about to read 3, iclass 3, count 0 2006.229.20:16:02.54#ibcon#read 3, iclass 3, count 0 2006.229.20:16:02.54#ibcon#about to read 4, iclass 3, count 0 2006.229.20:16:02.54#ibcon#read 4, iclass 3, count 0 2006.229.20:16:02.54#ibcon#about to read 5, iclass 3, count 0 2006.229.20:16:02.54#ibcon#read 5, iclass 3, count 0 2006.229.20:16:02.54#ibcon#about to read 6, iclass 3, count 0 2006.229.20:16:02.54#ibcon#read 6, iclass 3, count 0 2006.229.20:16:02.54#ibcon#end of sib2, iclass 3, count 0 2006.229.20:16:02.54#ibcon#*after write, iclass 3, count 0 2006.229.20:16:02.54#ibcon#*before return 0, iclass 3, count 0 2006.229.20:16:02.54#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:16:02.54#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:16:02.54#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:16:02.54#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:16:02.54$vck44/vblo=6,719.99 2006.229.20:16:02.54#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.20:16:02.54#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.20:16:02.54#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:02.54#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:16:02.54#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:16:02.54#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:16:02.54#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:16:02.55#ibcon#first serial, iclass 5, count 0 2006.229.20:16:02.55#ibcon#enter sib2, iclass 5, count 0 2006.229.20:16:02.55#ibcon#flushed, iclass 5, count 0 2006.229.20:16:02.55#ibcon#about to write, iclass 5, count 0 2006.229.20:16:02.55#ibcon#wrote, iclass 5, count 0 2006.229.20:16:02.55#ibcon#about to read 3, iclass 5, count 0 2006.229.20:16:02.56#ibcon#read 3, iclass 5, count 0 2006.229.20:16:02.56#ibcon#about to read 4, iclass 5, count 0 2006.229.20:16:02.56#ibcon#read 4, iclass 5, count 0 2006.229.20:16:02.56#ibcon#about to read 5, iclass 5, count 0 2006.229.20:16:02.56#ibcon#read 5, iclass 5, count 0 2006.229.20:16:02.56#ibcon#about to read 6, iclass 5, count 0 2006.229.20:16:02.56#ibcon#read 6, iclass 5, count 0 2006.229.20:16:02.56#ibcon#end of sib2, iclass 5, count 0 2006.229.20:16:02.56#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:16:02.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:16:02.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:16:02.56#ibcon#*before write, iclass 5, count 0 2006.229.20:16:02.56#ibcon#enter sib2, iclass 5, count 0 2006.229.20:16:02.56#ibcon#flushed, iclass 5, count 0 2006.229.20:16:02.56#ibcon#about to write, iclass 5, count 0 2006.229.20:16:02.56#ibcon#wrote, iclass 5, count 0 2006.229.20:16:02.56#ibcon#about to read 3, iclass 5, count 0 2006.229.20:16:02.60#ibcon#read 3, iclass 5, count 0 2006.229.20:16:02.60#ibcon#about to read 4, iclass 5, count 0 2006.229.20:16:02.60#ibcon#read 4, iclass 5, count 0 2006.229.20:16:02.60#ibcon#about to read 5, iclass 5, count 0 2006.229.20:16:02.60#ibcon#read 5, iclass 5, count 0 2006.229.20:16:02.60#ibcon#about to read 6, iclass 5, count 0 2006.229.20:16:02.60#ibcon#read 6, iclass 5, count 0 2006.229.20:16:02.60#ibcon#end of sib2, iclass 5, count 0 2006.229.20:16:02.60#ibcon#*after write, iclass 5, count 0 2006.229.20:16:02.60#ibcon#*before return 0, iclass 5, count 0 2006.229.20:16:02.60#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:16:02.60#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:16:02.60#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:16:02.60#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:16:02.60$vck44/vb=6,4 2006.229.20:16:02.60#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.20:16:02.60#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.20:16:02.60#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:02.60#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:02.66#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:02.66#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:02.66#ibcon#enter wrdev, iclass 7, count 2 2006.229.20:16:02.66#ibcon#first serial, iclass 7, count 2 2006.229.20:16:02.66#ibcon#enter sib2, iclass 7, count 2 2006.229.20:16:02.66#ibcon#flushed, iclass 7, count 2 2006.229.20:16:02.66#ibcon#about to write, iclass 7, count 2 2006.229.20:16:02.66#ibcon#wrote, iclass 7, count 2 2006.229.20:16:02.66#ibcon#about to read 3, iclass 7, count 2 2006.229.20:16:02.68#ibcon#read 3, iclass 7, count 2 2006.229.20:16:02.68#ibcon#about to read 4, iclass 7, count 2 2006.229.20:16:02.68#ibcon#read 4, iclass 7, count 2 2006.229.20:16:02.68#ibcon#about to read 5, iclass 7, count 2 2006.229.20:16:02.68#ibcon#read 5, iclass 7, count 2 2006.229.20:16:02.68#ibcon#about to read 6, iclass 7, count 2 2006.229.20:16:02.68#ibcon#read 6, iclass 7, count 2 2006.229.20:16:02.68#ibcon#end of sib2, iclass 7, count 2 2006.229.20:16:02.68#ibcon#*mode == 0, iclass 7, count 2 2006.229.20:16:02.68#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.20:16:02.68#ibcon#[27=AT06-04\r\n] 2006.229.20:16:02.68#ibcon#*before write, iclass 7, count 2 2006.229.20:16:02.68#ibcon#enter sib2, iclass 7, count 2 2006.229.20:16:02.68#ibcon#flushed, iclass 7, count 2 2006.229.20:16:02.68#ibcon#about to write, iclass 7, count 2 2006.229.20:16:02.68#ibcon#wrote, iclass 7, count 2 2006.229.20:16:02.68#ibcon#about to read 3, iclass 7, count 2 2006.229.20:16:02.71#ibcon#read 3, iclass 7, count 2 2006.229.20:16:02.71#ibcon#about to read 4, iclass 7, count 2 2006.229.20:16:02.71#ibcon#read 4, iclass 7, count 2 2006.229.20:16:02.71#ibcon#about to read 5, iclass 7, count 2 2006.229.20:16:02.71#ibcon#read 5, iclass 7, count 2 2006.229.20:16:02.71#ibcon#about to read 6, iclass 7, count 2 2006.229.20:16:02.71#ibcon#read 6, iclass 7, count 2 2006.229.20:16:02.71#ibcon#end of sib2, iclass 7, count 2 2006.229.20:16:02.71#ibcon#*after write, iclass 7, count 2 2006.229.20:16:02.71#ibcon#*before return 0, iclass 7, count 2 2006.229.20:16:02.71#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:02.71#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:16:02.71#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.20:16:02.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:02.71#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:02.83#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:02.83#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:02.83#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:16:02.83#ibcon#first serial, iclass 7, count 0 2006.229.20:16:02.83#ibcon#enter sib2, iclass 7, count 0 2006.229.20:16:02.83#ibcon#flushed, iclass 7, count 0 2006.229.20:16:02.83#ibcon#about to write, iclass 7, count 0 2006.229.20:16:02.83#ibcon#wrote, iclass 7, count 0 2006.229.20:16:02.83#ibcon#about to read 3, iclass 7, count 0 2006.229.20:16:02.85#ibcon#read 3, iclass 7, count 0 2006.229.20:16:02.85#ibcon#about to read 4, iclass 7, count 0 2006.229.20:16:02.85#ibcon#read 4, iclass 7, count 0 2006.229.20:16:02.85#ibcon#about to read 5, iclass 7, count 0 2006.229.20:16:02.85#ibcon#read 5, iclass 7, count 0 2006.229.20:16:02.85#ibcon#about to read 6, iclass 7, count 0 2006.229.20:16:02.85#ibcon#read 6, iclass 7, count 0 2006.229.20:16:02.85#ibcon#end of sib2, iclass 7, count 0 2006.229.20:16:02.85#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:16:02.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:16:02.85#ibcon#[27=USB\r\n] 2006.229.20:16:02.85#ibcon#*before write, iclass 7, count 0 2006.229.20:16:02.85#ibcon#enter sib2, iclass 7, count 0 2006.229.20:16:02.85#ibcon#flushed, iclass 7, count 0 2006.229.20:16:02.85#ibcon#about to write, iclass 7, count 0 2006.229.20:16:02.85#ibcon#wrote, iclass 7, count 0 2006.229.20:16:02.85#ibcon#about to read 3, iclass 7, count 0 2006.229.20:16:02.88#ibcon#read 3, iclass 7, count 0 2006.229.20:16:02.88#ibcon#about to read 4, iclass 7, count 0 2006.229.20:16:02.88#ibcon#read 4, iclass 7, count 0 2006.229.20:16:02.88#ibcon#about to read 5, iclass 7, count 0 2006.229.20:16:02.88#ibcon#read 5, iclass 7, count 0 2006.229.20:16:02.88#ibcon#about to read 6, iclass 7, count 0 2006.229.20:16:02.88#ibcon#read 6, iclass 7, count 0 2006.229.20:16:02.88#ibcon#end of sib2, iclass 7, count 0 2006.229.20:16:02.88#ibcon#*after write, iclass 7, count 0 2006.229.20:16:02.88#ibcon#*before return 0, iclass 7, count 0 2006.229.20:16:02.88#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:02.88#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:16:02.88#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:16:02.88#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:16:02.88$vck44/vblo=7,734.99 2006.229.20:16:02.88#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.20:16:02.88#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.20:16:02.88#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:02.88#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:16:02.88#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:16:02.88#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:16:02.88#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:16:02.88#ibcon#first serial, iclass 11, count 0 2006.229.20:16:02.88#ibcon#enter sib2, iclass 11, count 0 2006.229.20:16:02.88#ibcon#flushed, iclass 11, count 0 2006.229.20:16:02.88#ibcon#about to write, iclass 11, count 0 2006.229.20:16:02.88#ibcon#wrote, iclass 11, count 0 2006.229.20:16:02.89#ibcon#about to read 3, iclass 11, count 0 2006.229.20:16:02.90#ibcon#read 3, iclass 11, count 0 2006.229.20:16:02.90#ibcon#about to read 4, iclass 11, count 0 2006.229.20:16:02.90#ibcon#read 4, iclass 11, count 0 2006.229.20:16:02.90#ibcon#about to read 5, iclass 11, count 0 2006.229.20:16:02.90#ibcon#read 5, iclass 11, count 0 2006.229.20:16:02.90#ibcon#about to read 6, iclass 11, count 0 2006.229.20:16:02.90#ibcon#read 6, iclass 11, count 0 2006.229.20:16:02.90#ibcon#end of sib2, iclass 11, count 0 2006.229.20:16:02.90#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:16:02.90#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:16:02.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:16:02.90#ibcon#*before write, iclass 11, count 0 2006.229.20:16:02.90#ibcon#enter sib2, iclass 11, count 0 2006.229.20:16:02.90#ibcon#flushed, iclass 11, count 0 2006.229.20:16:02.90#ibcon#about to write, iclass 11, count 0 2006.229.20:16:02.90#ibcon#wrote, iclass 11, count 0 2006.229.20:16:02.90#ibcon#about to read 3, iclass 11, count 0 2006.229.20:16:02.94#ibcon#read 3, iclass 11, count 0 2006.229.20:16:02.94#ibcon#about to read 4, iclass 11, count 0 2006.229.20:16:02.94#ibcon#read 4, iclass 11, count 0 2006.229.20:16:02.94#ibcon#about to read 5, iclass 11, count 0 2006.229.20:16:02.94#ibcon#read 5, iclass 11, count 0 2006.229.20:16:02.94#ibcon#about to read 6, iclass 11, count 0 2006.229.20:16:02.94#ibcon#read 6, iclass 11, count 0 2006.229.20:16:02.94#ibcon#end of sib2, iclass 11, count 0 2006.229.20:16:02.94#ibcon#*after write, iclass 11, count 0 2006.229.20:16:02.94#ibcon#*before return 0, iclass 11, count 0 2006.229.20:16:02.94#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:16:02.94#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:16:02.94#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:16:02.94#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:16:02.94$vck44/vb=7,4 2006.229.20:16:02.94#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.20:16:02.94#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.20:16:02.94#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:02.94#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:16:03.00#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:16:03.00#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:16:03.00#ibcon#enter wrdev, iclass 13, count 2 2006.229.20:16:03.00#ibcon#first serial, iclass 13, count 2 2006.229.20:16:03.00#ibcon#enter sib2, iclass 13, count 2 2006.229.20:16:03.00#ibcon#flushed, iclass 13, count 2 2006.229.20:16:03.00#ibcon#about to write, iclass 13, count 2 2006.229.20:16:03.00#ibcon#wrote, iclass 13, count 2 2006.229.20:16:03.00#ibcon#about to read 3, iclass 13, count 2 2006.229.20:16:03.02#ibcon#read 3, iclass 13, count 2 2006.229.20:16:03.02#ibcon#about to read 4, iclass 13, count 2 2006.229.20:16:03.02#ibcon#read 4, iclass 13, count 2 2006.229.20:16:03.02#ibcon#about to read 5, iclass 13, count 2 2006.229.20:16:03.02#ibcon#read 5, iclass 13, count 2 2006.229.20:16:03.02#ibcon#about to read 6, iclass 13, count 2 2006.229.20:16:03.02#ibcon#read 6, iclass 13, count 2 2006.229.20:16:03.02#ibcon#end of sib2, iclass 13, count 2 2006.229.20:16:03.02#ibcon#*mode == 0, iclass 13, count 2 2006.229.20:16:03.02#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.20:16:03.02#ibcon#[27=AT07-04\r\n] 2006.229.20:16:03.02#ibcon#*before write, iclass 13, count 2 2006.229.20:16:03.02#ibcon#enter sib2, iclass 13, count 2 2006.229.20:16:03.02#ibcon#flushed, iclass 13, count 2 2006.229.20:16:03.02#ibcon#about to write, iclass 13, count 2 2006.229.20:16:03.02#ibcon#wrote, iclass 13, count 2 2006.229.20:16:03.02#ibcon#about to read 3, iclass 13, count 2 2006.229.20:16:03.05#ibcon#read 3, iclass 13, count 2 2006.229.20:16:03.05#ibcon#about to read 4, iclass 13, count 2 2006.229.20:16:03.05#ibcon#read 4, iclass 13, count 2 2006.229.20:16:03.05#ibcon#about to read 5, iclass 13, count 2 2006.229.20:16:03.05#ibcon#read 5, iclass 13, count 2 2006.229.20:16:03.05#ibcon#about to read 6, iclass 13, count 2 2006.229.20:16:03.05#ibcon#read 6, iclass 13, count 2 2006.229.20:16:03.05#ibcon#end of sib2, iclass 13, count 2 2006.229.20:16:03.05#ibcon#*after write, iclass 13, count 2 2006.229.20:16:03.05#ibcon#*before return 0, iclass 13, count 2 2006.229.20:16:03.05#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:16:03.05#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:16:03.05#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.20:16:03.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:03.05#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:16:03.17#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:16:03.17#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:16:03.17#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:16:03.17#ibcon#first serial, iclass 13, count 0 2006.229.20:16:03.17#ibcon#enter sib2, iclass 13, count 0 2006.229.20:16:03.17#ibcon#flushed, iclass 13, count 0 2006.229.20:16:03.17#ibcon#about to write, iclass 13, count 0 2006.229.20:16:03.17#ibcon#wrote, iclass 13, count 0 2006.229.20:16:03.17#ibcon#about to read 3, iclass 13, count 0 2006.229.20:16:03.19#ibcon#read 3, iclass 13, count 0 2006.229.20:16:03.19#ibcon#about to read 4, iclass 13, count 0 2006.229.20:16:03.19#ibcon#read 4, iclass 13, count 0 2006.229.20:16:03.19#ibcon#about to read 5, iclass 13, count 0 2006.229.20:16:03.19#ibcon#read 5, iclass 13, count 0 2006.229.20:16:03.19#ibcon#about to read 6, iclass 13, count 0 2006.229.20:16:03.19#ibcon#read 6, iclass 13, count 0 2006.229.20:16:03.19#ibcon#end of sib2, iclass 13, count 0 2006.229.20:16:03.19#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:16:03.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:16:03.19#ibcon#[27=USB\r\n] 2006.229.20:16:03.19#ibcon#*before write, iclass 13, count 0 2006.229.20:16:03.19#ibcon#enter sib2, iclass 13, count 0 2006.229.20:16:03.19#ibcon#flushed, iclass 13, count 0 2006.229.20:16:03.19#ibcon#about to write, iclass 13, count 0 2006.229.20:16:03.19#ibcon#wrote, iclass 13, count 0 2006.229.20:16:03.19#ibcon#about to read 3, iclass 13, count 0 2006.229.20:16:03.22#ibcon#read 3, iclass 13, count 0 2006.229.20:16:03.22#ibcon#about to read 4, iclass 13, count 0 2006.229.20:16:03.22#ibcon#read 4, iclass 13, count 0 2006.229.20:16:03.22#ibcon#about to read 5, iclass 13, count 0 2006.229.20:16:03.22#ibcon#read 5, iclass 13, count 0 2006.229.20:16:03.22#ibcon#about to read 6, iclass 13, count 0 2006.229.20:16:03.22#ibcon#read 6, iclass 13, count 0 2006.229.20:16:03.22#ibcon#end of sib2, iclass 13, count 0 2006.229.20:16:03.22#ibcon#*after write, iclass 13, count 0 2006.229.20:16:03.22#ibcon#*before return 0, iclass 13, count 0 2006.229.20:16:03.22#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:16:03.22#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:16:03.22#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:16:03.22#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:16:03.22$vck44/vblo=8,744.99 2006.229.20:16:03.22#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.20:16:03.22#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.20:16:03.22#ibcon#ireg 17 cls_cnt 0 2006.229.20:16:03.22#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:16:03.22#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:16:03.22#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:16:03.22#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:16:03.22#ibcon#first serial, iclass 15, count 0 2006.229.20:16:03.22#ibcon#enter sib2, iclass 15, count 0 2006.229.20:16:03.22#ibcon#flushed, iclass 15, count 0 2006.229.20:16:03.22#ibcon#about to write, iclass 15, count 0 2006.229.20:16:03.22#ibcon#wrote, iclass 15, count 0 2006.229.20:16:03.23#ibcon#about to read 3, iclass 15, count 0 2006.229.20:16:03.24#ibcon#read 3, iclass 15, count 0 2006.229.20:16:03.24#ibcon#about to read 4, iclass 15, count 0 2006.229.20:16:03.24#ibcon#read 4, iclass 15, count 0 2006.229.20:16:03.24#ibcon#about to read 5, iclass 15, count 0 2006.229.20:16:03.24#ibcon#read 5, iclass 15, count 0 2006.229.20:16:03.24#ibcon#about to read 6, iclass 15, count 0 2006.229.20:16:03.24#ibcon#read 6, iclass 15, count 0 2006.229.20:16:03.24#ibcon#end of sib2, iclass 15, count 0 2006.229.20:16:03.24#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:16:03.24#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:16:03.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:16:03.24#ibcon#*before write, iclass 15, count 0 2006.229.20:16:03.24#ibcon#enter sib2, iclass 15, count 0 2006.229.20:16:03.24#ibcon#flushed, iclass 15, count 0 2006.229.20:16:03.24#ibcon#about to write, iclass 15, count 0 2006.229.20:16:03.24#ibcon#wrote, iclass 15, count 0 2006.229.20:16:03.24#ibcon#about to read 3, iclass 15, count 0 2006.229.20:16:03.28#ibcon#read 3, iclass 15, count 0 2006.229.20:16:03.28#ibcon#about to read 4, iclass 15, count 0 2006.229.20:16:03.28#ibcon#read 4, iclass 15, count 0 2006.229.20:16:03.28#ibcon#about to read 5, iclass 15, count 0 2006.229.20:16:03.28#ibcon#read 5, iclass 15, count 0 2006.229.20:16:03.28#ibcon#about to read 6, iclass 15, count 0 2006.229.20:16:03.28#ibcon#read 6, iclass 15, count 0 2006.229.20:16:03.28#ibcon#end of sib2, iclass 15, count 0 2006.229.20:16:03.28#ibcon#*after write, iclass 15, count 0 2006.229.20:16:03.28#ibcon#*before return 0, iclass 15, count 0 2006.229.20:16:03.28#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:16:03.28#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:16:03.28#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:16:03.28#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:16:03.28$vck44/vb=8,4 2006.229.20:16:03.28#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.20:16:03.28#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.20:16:03.28#ibcon#ireg 11 cls_cnt 2 2006.229.20:16:03.28#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:16:03.34#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:16:03.34#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:16:03.34#ibcon#enter wrdev, iclass 17, count 2 2006.229.20:16:03.34#ibcon#first serial, iclass 17, count 2 2006.229.20:16:03.34#ibcon#enter sib2, iclass 17, count 2 2006.229.20:16:03.34#ibcon#flushed, iclass 17, count 2 2006.229.20:16:03.34#ibcon#about to write, iclass 17, count 2 2006.229.20:16:03.34#ibcon#wrote, iclass 17, count 2 2006.229.20:16:03.34#ibcon#about to read 3, iclass 17, count 2 2006.229.20:16:03.36#ibcon#read 3, iclass 17, count 2 2006.229.20:16:03.36#ibcon#about to read 4, iclass 17, count 2 2006.229.20:16:03.36#ibcon#read 4, iclass 17, count 2 2006.229.20:16:03.36#ibcon#about to read 5, iclass 17, count 2 2006.229.20:16:03.36#ibcon#read 5, iclass 17, count 2 2006.229.20:16:03.36#ibcon#about to read 6, iclass 17, count 2 2006.229.20:16:03.36#ibcon#read 6, iclass 17, count 2 2006.229.20:16:03.36#ibcon#end of sib2, iclass 17, count 2 2006.229.20:16:03.36#ibcon#*mode == 0, iclass 17, count 2 2006.229.20:16:03.36#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.20:16:03.36#ibcon#[27=AT08-04\r\n] 2006.229.20:16:03.36#ibcon#*before write, iclass 17, count 2 2006.229.20:16:03.36#ibcon#enter sib2, iclass 17, count 2 2006.229.20:16:03.36#ibcon#flushed, iclass 17, count 2 2006.229.20:16:03.36#ibcon#about to write, iclass 17, count 2 2006.229.20:16:03.36#ibcon#wrote, iclass 17, count 2 2006.229.20:16:03.36#ibcon#about to read 3, iclass 17, count 2 2006.229.20:16:03.39#ibcon#read 3, iclass 17, count 2 2006.229.20:16:03.39#ibcon#about to read 4, iclass 17, count 2 2006.229.20:16:03.39#ibcon#read 4, iclass 17, count 2 2006.229.20:16:03.39#ibcon#about to read 5, iclass 17, count 2 2006.229.20:16:03.39#ibcon#read 5, iclass 17, count 2 2006.229.20:16:03.39#ibcon#about to read 6, iclass 17, count 2 2006.229.20:16:03.39#ibcon#read 6, iclass 17, count 2 2006.229.20:16:03.39#ibcon#end of sib2, iclass 17, count 2 2006.229.20:16:03.39#ibcon#*after write, iclass 17, count 2 2006.229.20:16:03.39#ibcon#*before return 0, iclass 17, count 2 2006.229.20:16:03.39#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:16:03.39#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:16:03.39#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.20:16:03.39#ibcon#ireg 7 cls_cnt 0 2006.229.20:16:03.39#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:16:03.51#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:16:03.51#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:16:03.51#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:16:03.51#ibcon#first serial, iclass 17, count 0 2006.229.20:16:03.51#ibcon#enter sib2, iclass 17, count 0 2006.229.20:16:03.51#ibcon#flushed, iclass 17, count 0 2006.229.20:16:03.51#ibcon#about to write, iclass 17, count 0 2006.229.20:16:03.51#ibcon#wrote, iclass 17, count 0 2006.229.20:16:03.51#ibcon#about to read 3, iclass 17, count 0 2006.229.20:16:03.53#ibcon#read 3, iclass 17, count 0 2006.229.20:16:03.53#ibcon#about to read 4, iclass 17, count 0 2006.229.20:16:03.53#ibcon#read 4, iclass 17, count 0 2006.229.20:16:03.53#ibcon#about to read 5, iclass 17, count 0 2006.229.20:16:03.53#ibcon#read 5, iclass 17, count 0 2006.229.20:16:03.53#ibcon#about to read 6, iclass 17, count 0 2006.229.20:16:03.53#ibcon#read 6, iclass 17, count 0 2006.229.20:16:03.53#ibcon#end of sib2, iclass 17, count 0 2006.229.20:16:03.53#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:16:03.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:16:03.53#ibcon#[27=USB\r\n] 2006.229.20:16:03.53#ibcon#*before write, iclass 17, count 0 2006.229.20:16:03.53#ibcon#enter sib2, iclass 17, count 0 2006.229.20:16:03.53#ibcon#flushed, iclass 17, count 0 2006.229.20:16:03.53#ibcon#about to write, iclass 17, count 0 2006.229.20:16:03.53#ibcon#wrote, iclass 17, count 0 2006.229.20:16:03.53#ibcon#about to read 3, iclass 17, count 0 2006.229.20:16:03.56#ibcon#read 3, iclass 17, count 0 2006.229.20:16:03.56#ibcon#about to read 4, iclass 17, count 0 2006.229.20:16:03.56#ibcon#read 4, iclass 17, count 0 2006.229.20:16:03.56#ibcon#about to read 5, iclass 17, count 0 2006.229.20:16:03.56#ibcon#read 5, iclass 17, count 0 2006.229.20:16:03.56#ibcon#about to read 6, iclass 17, count 0 2006.229.20:16:03.56#ibcon#read 6, iclass 17, count 0 2006.229.20:16:03.56#ibcon#end of sib2, iclass 17, count 0 2006.229.20:16:03.56#ibcon#*after write, iclass 17, count 0 2006.229.20:16:03.56#ibcon#*before return 0, iclass 17, count 0 2006.229.20:16:03.56#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:16:03.56#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:16:03.56#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:16:03.56#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:16:03.56$vck44/vabw=wide 2006.229.20:16:03.56#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.20:16:03.56#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.20:16:03.56#ibcon#ireg 8 cls_cnt 0 2006.229.20:16:03.56#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:03.56#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:03.56#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:03.56#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:16:03.56#ibcon#first serial, iclass 19, count 0 2006.229.20:16:03.57#ibcon#enter sib2, iclass 19, count 0 2006.229.20:16:03.57#ibcon#flushed, iclass 19, count 0 2006.229.20:16:03.57#ibcon#about to write, iclass 19, count 0 2006.229.20:16:03.57#ibcon#wrote, iclass 19, count 0 2006.229.20:16:03.57#ibcon#about to read 3, iclass 19, count 0 2006.229.20:16:03.58#ibcon#read 3, iclass 19, count 0 2006.229.20:16:03.58#ibcon#about to read 4, iclass 19, count 0 2006.229.20:16:03.58#ibcon#read 4, iclass 19, count 0 2006.229.20:16:03.58#ibcon#about to read 5, iclass 19, count 0 2006.229.20:16:03.58#ibcon#read 5, iclass 19, count 0 2006.229.20:16:03.58#ibcon#about to read 6, iclass 19, count 0 2006.229.20:16:03.58#ibcon#read 6, iclass 19, count 0 2006.229.20:16:03.58#ibcon#end of sib2, iclass 19, count 0 2006.229.20:16:03.58#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:16:03.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:16:03.58#ibcon#[25=BW32\r\n] 2006.229.20:16:03.58#ibcon#*before write, iclass 19, count 0 2006.229.20:16:03.58#ibcon#enter sib2, iclass 19, count 0 2006.229.20:16:03.58#ibcon#flushed, iclass 19, count 0 2006.229.20:16:03.58#ibcon#about to write, iclass 19, count 0 2006.229.20:16:03.58#ibcon#wrote, iclass 19, count 0 2006.229.20:16:03.58#ibcon#about to read 3, iclass 19, count 0 2006.229.20:16:03.61#ibcon#read 3, iclass 19, count 0 2006.229.20:16:03.61#ibcon#about to read 4, iclass 19, count 0 2006.229.20:16:03.61#ibcon#read 4, iclass 19, count 0 2006.229.20:16:03.61#ibcon#about to read 5, iclass 19, count 0 2006.229.20:16:03.61#ibcon#read 5, iclass 19, count 0 2006.229.20:16:03.61#ibcon#about to read 6, iclass 19, count 0 2006.229.20:16:03.61#ibcon#read 6, iclass 19, count 0 2006.229.20:16:03.61#ibcon#end of sib2, iclass 19, count 0 2006.229.20:16:03.61#ibcon#*after write, iclass 19, count 0 2006.229.20:16:03.61#ibcon#*before return 0, iclass 19, count 0 2006.229.20:16:03.61#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:03.61#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:16:03.61#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:16:03.61#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:16:03.61$vck44/vbbw=wide 2006.229.20:16:03.61#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:16:03.61#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:16:03.61#ibcon#ireg 8 cls_cnt 0 2006.229.20:16:03.61#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:16:03.68#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:16:03.68#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:16:03.68#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:16:03.68#ibcon#first serial, iclass 21, count 0 2006.229.20:16:03.68#ibcon#enter sib2, iclass 21, count 0 2006.229.20:16:03.68#ibcon#flushed, iclass 21, count 0 2006.229.20:16:03.68#ibcon#about to write, iclass 21, count 0 2006.229.20:16:03.68#ibcon#wrote, iclass 21, count 0 2006.229.20:16:03.68#ibcon#about to read 3, iclass 21, count 0 2006.229.20:16:03.70#ibcon#read 3, iclass 21, count 0 2006.229.20:16:03.70#ibcon#about to read 4, iclass 21, count 0 2006.229.20:16:03.70#ibcon#read 4, iclass 21, count 0 2006.229.20:16:03.70#ibcon#about to read 5, iclass 21, count 0 2006.229.20:16:03.70#ibcon#read 5, iclass 21, count 0 2006.229.20:16:03.70#ibcon#about to read 6, iclass 21, count 0 2006.229.20:16:03.70#ibcon#read 6, iclass 21, count 0 2006.229.20:16:03.70#ibcon#end of sib2, iclass 21, count 0 2006.229.20:16:03.70#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:16:03.70#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:16:03.70#ibcon#[27=BW32\r\n] 2006.229.20:16:03.70#ibcon#*before write, iclass 21, count 0 2006.229.20:16:03.70#ibcon#enter sib2, iclass 21, count 0 2006.229.20:16:03.70#ibcon#flushed, iclass 21, count 0 2006.229.20:16:03.70#ibcon#about to write, iclass 21, count 0 2006.229.20:16:03.70#ibcon#wrote, iclass 21, count 0 2006.229.20:16:03.70#ibcon#about to read 3, iclass 21, count 0 2006.229.20:16:03.73#ibcon#read 3, iclass 21, count 0 2006.229.20:16:03.73#ibcon#about to read 4, iclass 21, count 0 2006.229.20:16:03.73#ibcon#read 4, iclass 21, count 0 2006.229.20:16:03.73#ibcon#about to read 5, iclass 21, count 0 2006.229.20:16:03.73#ibcon#read 5, iclass 21, count 0 2006.229.20:16:03.73#ibcon#about to read 6, iclass 21, count 0 2006.229.20:16:03.73#ibcon#read 6, iclass 21, count 0 2006.229.20:16:03.73#ibcon#end of sib2, iclass 21, count 0 2006.229.20:16:03.73#ibcon#*after write, iclass 21, count 0 2006.229.20:16:03.73#ibcon#*before return 0, iclass 21, count 0 2006.229.20:16:03.73#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:16:03.73#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:16:03.73#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:16:03.73#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:16:03.73$setupk4/ifdk4 2006.229.20:16:03.73$ifdk4/lo= 2006.229.20:16:03.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:16:03.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:16:03.74$ifdk4/patch= 2006.229.20:16:03.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:16:03.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:16:03.74$setupk4/!*+20s 2006.229.20:16:10.39#abcon#<5=/07 1.3 3.1 26.011001001.8\r\n> 2006.229.20:16:10.41#abcon#{5=INTERFACE CLEAR} 2006.229.20:16:10.47#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:16:18.14#trakl#Source acquired 2006.229.20:16:18.14#flagr#flagr/antenna,acquired 2006.229.20:16:18.25$setupk4/"tpicd 2006.229.20:16:18.25$setupk4/echo=off 2006.229.20:16:18.25$setupk4/xlog=off 2006.229.20:16:18.25:!2006.229.20:18:17 2006.229.20:18:17.00:preob 2006.229.20:18:17.14/onsource/TRACKING 2006.229.20:18:17.14:!2006.229.20:18:27 2006.229.20:18:27.00:"tape 2006.229.20:18:27.00:"st=record 2006.229.20:18:27.00:data_valid=on 2006.229.20:18:27.00:midob 2006.229.20:18:27.14/onsource/TRACKING 2006.229.20:18:27.15/wx/25.99,1001.8,100 2006.229.20:18:27.29/cable/+6.4218E-03 2006.229.20:18:28.38/va/01,08,usb,yes,29,31 2006.229.20:18:28.38/va/02,07,usb,yes,31,32 2006.229.20:18:28.38/va/03,06,usb,yes,39,41 2006.229.20:18:28.38/va/04,07,usb,yes,32,34 2006.229.20:18:28.38/va/05,04,usb,yes,29,29 2006.229.20:18:28.38/va/06,04,usb,yes,32,32 2006.229.20:18:28.38/va/07,05,usb,yes,29,29 2006.229.20:18:28.38/va/08,06,usb,yes,21,26 2006.229.20:18:28.61/valo/01,524.99,yes,locked 2006.229.20:18:28.61/valo/02,534.99,yes,locked 2006.229.20:18:28.61/valo/03,564.99,yes,locked 2006.229.20:18:28.61/valo/04,624.99,yes,locked 2006.229.20:18:28.61/valo/05,734.99,yes,locked 2006.229.20:18:28.61/valo/06,814.99,yes,locked 2006.229.20:18:28.61/valo/07,864.99,yes,locked 2006.229.20:18:28.61/valo/08,884.99,yes,locked 2006.229.20:18:29.70/vb/01,04,usb,yes,30,28 2006.229.20:18:29.70/vb/02,04,usb,yes,33,33 2006.229.20:18:29.70/vb/03,04,usb,yes,30,33 2006.229.20:18:29.70/vb/04,04,usb,yes,34,33 2006.229.20:18:29.70/vb/05,04,usb,yes,27,29 2006.229.20:18:29.70/vb/06,04,usb,yes,31,27 2006.229.20:18:29.70/vb/07,04,usb,yes,31,31 2006.229.20:18:29.70/vb/08,04,usb,yes,28,32 2006.229.20:18:29.93/vblo/01,629.99,yes,locked 2006.229.20:18:29.93/vblo/02,634.99,yes,locked 2006.229.20:18:29.93/vblo/03,649.99,yes,locked 2006.229.20:18:29.93/vblo/04,679.99,yes,locked 2006.229.20:18:29.93/vblo/05,709.99,yes,locked 2006.229.20:18:29.93/vblo/06,719.99,yes,locked 2006.229.20:18:29.93/vblo/07,734.99,yes,locked 2006.229.20:18:29.93/vblo/08,744.99,yes,locked 2006.229.20:18:30.08/vabw/8 2006.229.20:18:30.23/vbbw/8 2006.229.20:18:30.32/xfe/off,on,12.2 2006.229.20:18:30.70/ifatt/23,28,28,28 2006.229.20:18:31.08/fmout-gps/S +4.54E-07 2006.229.20:18:31.12:!2006.229.20:20:47 2006.229.20:20:47.01:data_valid=off 2006.229.20:20:47.01:"et 2006.229.20:20:47.01:!+3s 2006.229.20:20:50.02:"tape 2006.229.20:20:50.02:postob 2006.229.20:20:50.18/cable/+6.4190E-03 2006.229.20:20:50.18/wx/25.98,1001.9,100 2006.229.20:20:51.07/fmout-gps/S +4.58E-07 2006.229.20:20:51.07:scan_name=229-2023,jd0608,150 2006.229.20:20:51.07:source=2136+141,213901.31,142336.0,2000.0,cw 2006.229.20:20:52.14#flagr#flagr/antenna,new-source 2006.229.20:20:52.14:checkk5 2006.229.20:20:52.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:20:52.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:20:53.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:20:53.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:20:54.14/chk_obsdata//k5ts1/T2292018??a.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.20:20:54.55/chk_obsdata//k5ts2/T2292018??b.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.20:20:54.95/chk_obsdata//k5ts3/T2292018??c.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.20:20:55.35/chk_obsdata//k5ts4/T2292018??d.dat file size is correct (nominal:560MB, actual:556MB). 2006.229.20:20:56.09/k5log//k5ts1_log_newline 2006.229.20:20:56.80/k5log//k5ts2_log_newline 2006.229.20:20:57.51/k5log//k5ts3_log_newline 2006.229.20:20:58.29/k5log//k5ts4_log_newline 2006.229.20:20:58.32/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:20:58.32:setupk4=1 2006.229.20:20:58.32$setupk4/echo=on 2006.229.20:20:58.32$setupk4/pcalon 2006.229.20:20:58.32$pcalon/"no phase cal control is implemented here 2006.229.20:20:58.32$setupk4/"tpicd=stop 2006.229.20:20:58.32$setupk4/"rec=synch_on 2006.229.20:20:58.32$setupk4/"rec_mode=128 2006.229.20:20:58.32$setupk4/!* 2006.229.20:20:58.32$setupk4/recpk4 2006.229.20:20:58.32$recpk4/recpatch= 2006.229.20:20:58.32$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:20:58.32$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:20:58.32$setupk4/vck44 2006.229.20:20:58.32$vck44/valo=1,524.99 2006.229.20:20:58.32#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.20:20:58.32#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.20:20:58.32#ibcon#ireg 17 cls_cnt 0 2006.229.20:20:58.32#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:20:58.32#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:20:58.32#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:20:58.32#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:20:58.32#ibcon#first serial, iclass 34, count 0 2006.229.20:20:58.32#ibcon#enter sib2, iclass 34, count 0 2006.229.20:20:58.32#ibcon#flushed, iclass 34, count 0 2006.229.20:20:58.32#ibcon#about to write, iclass 34, count 0 2006.229.20:20:58.32#ibcon#wrote, iclass 34, count 0 2006.229.20:20:58.32#ibcon#about to read 3, iclass 34, count 0 2006.229.20:20:58.34#ibcon#read 3, iclass 34, count 0 2006.229.20:20:58.34#ibcon#about to read 4, iclass 34, count 0 2006.229.20:20:58.34#ibcon#read 4, iclass 34, count 0 2006.229.20:20:58.34#ibcon#about to read 5, iclass 34, count 0 2006.229.20:20:58.34#ibcon#read 5, iclass 34, count 0 2006.229.20:20:58.34#ibcon#about to read 6, iclass 34, count 0 2006.229.20:20:58.34#ibcon#read 6, iclass 34, count 0 2006.229.20:20:58.34#ibcon#end of sib2, iclass 34, count 0 2006.229.20:20:58.34#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:20:58.34#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:20:58.34#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:20:58.34#ibcon#*before write, iclass 34, count 0 2006.229.20:20:58.34#ibcon#enter sib2, iclass 34, count 0 2006.229.20:20:58.34#ibcon#flushed, iclass 34, count 0 2006.229.20:20:58.34#ibcon#about to write, iclass 34, count 0 2006.229.20:20:58.34#ibcon#wrote, iclass 34, count 0 2006.229.20:20:58.34#ibcon#about to read 3, iclass 34, count 0 2006.229.20:20:58.39#ibcon#read 3, iclass 34, count 0 2006.229.20:20:58.39#ibcon#about to read 4, iclass 34, count 0 2006.229.20:20:58.39#ibcon#read 4, iclass 34, count 0 2006.229.20:20:58.39#ibcon#about to read 5, iclass 34, count 0 2006.229.20:20:58.39#ibcon#read 5, iclass 34, count 0 2006.229.20:20:58.39#ibcon#about to read 6, iclass 34, count 0 2006.229.20:20:58.39#ibcon#read 6, iclass 34, count 0 2006.229.20:20:58.39#ibcon#end of sib2, iclass 34, count 0 2006.229.20:20:58.39#ibcon#*after write, iclass 34, count 0 2006.229.20:20:58.39#ibcon#*before return 0, iclass 34, count 0 2006.229.20:20:58.39#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:20:58.39#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:20:58.39#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:20:58.39#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:20:58.39$vck44/va=1,8 2006.229.20:20:58.39#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.20:20:58.39#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.20:20:58.39#ibcon#ireg 11 cls_cnt 2 2006.229.20:20:58.39#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:20:58.39#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:20:58.39#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:20:58.39#ibcon#enter wrdev, iclass 36, count 2 2006.229.20:20:58.39#ibcon#first serial, iclass 36, count 2 2006.229.20:20:58.39#ibcon#enter sib2, iclass 36, count 2 2006.229.20:20:58.39#ibcon#flushed, iclass 36, count 2 2006.229.20:20:58.39#ibcon#about to write, iclass 36, count 2 2006.229.20:20:58.39#ibcon#wrote, iclass 36, count 2 2006.229.20:20:58.39#ibcon#about to read 3, iclass 36, count 2 2006.229.20:20:58.41#ibcon#read 3, iclass 36, count 2 2006.229.20:20:58.41#ibcon#about to read 4, iclass 36, count 2 2006.229.20:20:58.41#ibcon#read 4, iclass 36, count 2 2006.229.20:20:58.41#ibcon#about to read 5, iclass 36, count 2 2006.229.20:20:58.41#ibcon#read 5, iclass 36, count 2 2006.229.20:20:58.41#ibcon#about to read 6, iclass 36, count 2 2006.229.20:20:58.41#ibcon#read 6, iclass 36, count 2 2006.229.20:20:58.41#ibcon#end of sib2, iclass 36, count 2 2006.229.20:20:58.41#ibcon#*mode == 0, iclass 36, count 2 2006.229.20:20:58.41#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.20:20:58.41#ibcon#[25=AT01-08\r\n] 2006.229.20:20:58.41#ibcon#*before write, iclass 36, count 2 2006.229.20:20:58.41#ibcon#enter sib2, iclass 36, count 2 2006.229.20:20:58.41#ibcon#flushed, iclass 36, count 2 2006.229.20:20:58.41#ibcon#about to write, iclass 36, count 2 2006.229.20:20:58.41#ibcon#wrote, iclass 36, count 2 2006.229.20:20:58.41#ibcon#about to read 3, iclass 36, count 2 2006.229.20:20:58.44#ibcon#read 3, iclass 36, count 2 2006.229.20:20:58.44#ibcon#about to read 4, iclass 36, count 2 2006.229.20:20:58.44#ibcon#read 4, iclass 36, count 2 2006.229.20:20:58.44#ibcon#about to read 5, iclass 36, count 2 2006.229.20:20:58.44#ibcon#read 5, iclass 36, count 2 2006.229.20:20:58.44#ibcon#about to read 6, iclass 36, count 2 2006.229.20:20:58.44#ibcon#read 6, iclass 36, count 2 2006.229.20:20:58.44#ibcon#end of sib2, iclass 36, count 2 2006.229.20:20:58.44#ibcon#*after write, iclass 36, count 2 2006.229.20:20:58.44#ibcon#*before return 0, iclass 36, count 2 2006.229.20:20:58.44#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:20:58.44#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:20:58.44#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.20:20:58.44#ibcon#ireg 7 cls_cnt 0 2006.229.20:20:58.44#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:20:58.56#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:20:58.56#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:20:58.56#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:20:58.56#ibcon#first serial, iclass 36, count 0 2006.229.20:20:58.56#ibcon#enter sib2, iclass 36, count 0 2006.229.20:20:58.56#ibcon#flushed, iclass 36, count 0 2006.229.20:20:58.56#ibcon#about to write, iclass 36, count 0 2006.229.20:20:58.56#ibcon#wrote, iclass 36, count 0 2006.229.20:20:58.56#ibcon#about to read 3, iclass 36, count 0 2006.229.20:20:58.58#ibcon#read 3, iclass 36, count 0 2006.229.20:20:58.58#ibcon#about to read 4, iclass 36, count 0 2006.229.20:20:58.58#ibcon#read 4, iclass 36, count 0 2006.229.20:20:58.58#ibcon#about to read 5, iclass 36, count 0 2006.229.20:20:58.58#ibcon#read 5, iclass 36, count 0 2006.229.20:20:58.58#ibcon#about to read 6, iclass 36, count 0 2006.229.20:20:58.58#ibcon#read 6, iclass 36, count 0 2006.229.20:20:58.58#ibcon#end of sib2, iclass 36, count 0 2006.229.20:20:58.58#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:20:58.58#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:20:58.58#ibcon#[25=USB\r\n] 2006.229.20:20:58.58#ibcon#*before write, iclass 36, count 0 2006.229.20:20:58.58#ibcon#enter sib2, iclass 36, count 0 2006.229.20:20:58.58#ibcon#flushed, iclass 36, count 0 2006.229.20:20:58.58#ibcon#about to write, iclass 36, count 0 2006.229.20:20:58.58#ibcon#wrote, iclass 36, count 0 2006.229.20:20:58.58#ibcon#about to read 3, iclass 36, count 0 2006.229.20:20:58.61#ibcon#read 3, iclass 36, count 0 2006.229.20:20:58.61#ibcon#about to read 4, iclass 36, count 0 2006.229.20:20:58.61#ibcon#read 4, iclass 36, count 0 2006.229.20:20:58.61#ibcon#about to read 5, iclass 36, count 0 2006.229.20:20:58.61#ibcon#read 5, iclass 36, count 0 2006.229.20:20:58.61#ibcon#about to read 6, iclass 36, count 0 2006.229.20:20:58.61#ibcon#read 6, iclass 36, count 0 2006.229.20:20:58.61#ibcon#end of sib2, iclass 36, count 0 2006.229.20:20:58.61#ibcon#*after write, iclass 36, count 0 2006.229.20:20:58.61#ibcon#*before return 0, iclass 36, count 0 2006.229.20:20:58.61#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:20:58.61#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:20:58.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:20:58.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:20:58.61$vck44/valo=2,534.99 2006.229.20:20:58.61#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.20:20:58.61#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.20:20:58.61#ibcon#ireg 17 cls_cnt 0 2006.229.20:20:58.61#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:20:58.61#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:20:58.61#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:20:58.61#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:20:58.61#ibcon#first serial, iclass 38, count 0 2006.229.20:20:58.61#ibcon#enter sib2, iclass 38, count 0 2006.229.20:20:58.61#ibcon#flushed, iclass 38, count 0 2006.229.20:20:58.61#ibcon#about to write, iclass 38, count 0 2006.229.20:20:58.61#ibcon#wrote, iclass 38, count 0 2006.229.20:20:58.61#ibcon#about to read 3, iclass 38, count 0 2006.229.20:20:58.63#ibcon#read 3, iclass 38, count 0 2006.229.20:20:58.63#ibcon#about to read 4, iclass 38, count 0 2006.229.20:20:58.63#ibcon#read 4, iclass 38, count 0 2006.229.20:20:58.63#ibcon#about to read 5, iclass 38, count 0 2006.229.20:20:58.63#ibcon#read 5, iclass 38, count 0 2006.229.20:20:58.63#ibcon#about to read 6, iclass 38, count 0 2006.229.20:20:58.63#ibcon#read 6, iclass 38, count 0 2006.229.20:20:58.63#ibcon#end of sib2, iclass 38, count 0 2006.229.20:20:58.63#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:20:58.63#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:20:58.63#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:20:58.63#ibcon#*before write, iclass 38, count 0 2006.229.20:20:58.63#ibcon#enter sib2, iclass 38, count 0 2006.229.20:20:58.63#ibcon#flushed, iclass 38, count 0 2006.229.20:20:58.63#ibcon#about to write, iclass 38, count 0 2006.229.20:20:58.63#ibcon#wrote, iclass 38, count 0 2006.229.20:20:58.63#ibcon#about to read 3, iclass 38, count 0 2006.229.20:20:58.67#ibcon#read 3, iclass 38, count 0 2006.229.20:20:58.67#ibcon#about to read 4, iclass 38, count 0 2006.229.20:20:58.67#ibcon#read 4, iclass 38, count 0 2006.229.20:20:58.67#ibcon#about to read 5, iclass 38, count 0 2006.229.20:20:58.67#ibcon#read 5, iclass 38, count 0 2006.229.20:20:58.67#ibcon#about to read 6, iclass 38, count 0 2006.229.20:20:58.67#ibcon#read 6, iclass 38, count 0 2006.229.20:20:58.67#ibcon#end of sib2, iclass 38, count 0 2006.229.20:20:58.67#ibcon#*after write, iclass 38, count 0 2006.229.20:20:58.67#ibcon#*before return 0, iclass 38, count 0 2006.229.20:20:58.67#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:20:58.67#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:20:58.67#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:20:58.67#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:20:58.67$vck44/va=2,7 2006.229.20:20:58.67#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.20:20:58.67#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.20:20:58.67#ibcon#ireg 11 cls_cnt 2 2006.229.20:20:58.67#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:20:58.73#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:20:58.73#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:20:58.73#ibcon#enter wrdev, iclass 40, count 2 2006.229.20:20:58.73#ibcon#first serial, iclass 40, count 2 2006.229.20:20:58.73#ibcon#enter sib2, iclass 40, count 2 2006.229.20:20:58.73#ibcon#flushed, iclass 40, count 2 2006.229.20:20:58.73#ibcon#about to write, iclass 40, count 2 2006.229.20:20:58.73#ibcon#wrote, iclass 40, count 2 2006.229.20:20:58.73#ibcon#about to read 3, iclass 40, count 2 2006.229.20:20:58.75#ibcon#read 3, iclass 40, count 2 2006.229.20:20:58.75#ibcon#about to read 4, iclass 40, count 2 2006.229.20:20:58.75#ibcon#read 4, iclass 40, count 2 2006.229.20:20:58.75#ibcon#about to read 5, iclass 40, count 2 2006.229.20:20:58.75#ibcon#read 5, iclass 40, count 2 2006.229.20:20:58.75#ibcon#about to read 6, iclass 40, count 2 2006.229.20:20:58.75#ibcon#read 6, iclass 40, count 2 2006.229.20:20:58.75#ibcon#end of sib2, iclass 40, count 2 2006.229.20:20:58.75#ibcon#*mode == 0, iclass 40, count 2 2006.229.20:20:58.75#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.20:20:58.75#ibcon#[25=AT02-07\r\n] 2006.229.20:20:58.75#ibcon#*before write, iclass 40, count 2 2006.229.20:20:58.75#ibcon#enter sib2, iclass 40, count 2 2006.229.20:20:58.75#ibcon#flushed, iclass 40, count 2 2006.229.20:20:58.75#ibcon#about to write, iclass 40, count 2 2006.229.20:20:58.75#ibcon#wrote, iclass 40, count 2 2006.229.20:20:58.75#ibcon#about to read 3, iclass 40, count 2 2006.229.20:20:58.78#ibcon#read 3, iclass 40, count 2 2006.229.20:20:58.78#ibcon#about to read 4, iclass 40, count 2 2006.229.20:20:58.78#ibcon#read 4, iclass 40, count 2 2006.229.20:20:58.78#ibcon#about to read 5, iclass 40, count 2 2006.229.20:20:58.78#ibcon#read 5, iclass 40, count 2 2006.229.20:20:58.78#ibcon#about to read 6, iclass 40, count 2 2006.229.20:20:58.78#ibcon#read 6, iclass 40, count 2 2006.229.20:20:58.78#ibcon#end of sib2, iclass 40, count 2 2006.229.20:20:58.78#ibcon#*after write, iclass 40, count 2 2006.229.20:20:58.78#ibcon#*before return 0, iclass 40, count 2 2006.229.20:20:58.78#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:20:58.78#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:20:58.78#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.20:20:58.78#ibcon#ireg 7 cls_cnt 0 2006.229.20:20:58.78#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:20:58.90#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:20:58.90#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:20:58.90#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:20:58.90#ibcon#first serial, iclass 40, count 0 2006.229.20:20:58.90#ibcon#enter sib2, iclass 40, count 0 2006.229.20:20:58.90#ibcon#flushed, iclass 40, count 0 2006.229.20:20:58.90#ibcon#about to write, iclass 40, count 0 2006.229.20:20:58.90#ibcon#wrote, iclass 40, count 0 2006.229.20:20:58.90#ibcon#about to read 3, iclass 40, count 0 2006.229.20:20:58.92#ibcon#read 3, iclass 40, count 0 2006.229.20:20:58.92#ibcon#about to read 4, iclass 40, count 0 2006.229.20:20:58.92#ibcon#read 4, iclass 40, count 0 2006.229.20:20:58.92#ibcon#about to read 5, iclass 40, count 0 2006.229.20:20:58.92#ibcon#read 5, iclass 40, count 0 2006.229.20:20:58.92#ibcon#about to read 6, iclass 40, count 0 2006.229.20:20:58.92#ibcon#read 6, iclass 40, count 0 2006.229.20:20:58.92#ibcon#end of sib2, iclass 40, count 0 2006.229.20:20:58.92#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:20:58.92#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:20:58.92#ibcon#[25=USB\r\n] 2006.229.20:20:58.92#ibcon#*before write, iclass 40, count 0 2006.229.20:20:58.92#ibcon#enter sib2, iclass 40, count 0 2006.229.20:20:58.92#ibcon#flushed, iclass 40, count 0 2006.229.20:20:58.92#ibcon#about to write, iclass 40, count 0 2006.229.20:20:58.92#ibcon#wrote, iclass 40, count 0 2006.229.20:20:58.92#ibcon#about to read 3, iclass 40, count 0 2006.229.20:20:58.95#ibcon#read 3, iclass 40, count 0 2006.229.20:20:58.95#ibcon#about to read 4, iclass 40, count 0 2006.229.20:20:58.95#ibcon#read 4, iclass 40, count 0 2006.229.20:20:58.95#ibcon#about to read 5, iclass 40, count 0 2006.229.20:20:58.95#ibcon#read 5, iclass 40, count 0 2006.229.20:20:58.95#ibcon#about to read 6, iclass 40, count 0 2006.229.20:20:58.95#ibcon#read 6, iclass 40, count 0 2006.229.20:20:58.95#ibcon#end of sib2, iclass 40, count 0 2006.229.20:20:58.95#ibcon#*after write, iclass 40, count 0 2006.229.20:20:58.95#ibcon#*before return 0, iclass 40, count 0 2006.229.20:20:58.95#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:20:58.95#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:20:58.95#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:20:58.95#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:20:58.95$vck44/valo=3,564.99 2006.229.20:20:58.95#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.20:20:58.95#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.20:20:58.95#ibcon#ireg 17 cls_cnt 0 2006.229.20:20:58.95#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:20:58.95#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:20:58.95#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:20:58.95#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:20:58.95#ibcon#first serial, iclass 4, count 0 2006.229.20:20:58.95#ibcon#enter sib2, iclass 4, count 0 2006.229.20:20:58.95#ibcon#flushed, iclass 4, count 0 2006.229.20:20:58.95#ibcon#about to write, iclass 4, count 0 2006.229.20:20:58.95#ibcon#wrote, iclass 4, count 0 2006.229.20:20:58.95#ibcon#about to read 3, iclass 4, count 0 2006.229.20:20:58.97#ibcon#read 3, iclass 4, count 0 2006.229.20:20:58.97#ibcon#about to read 4, iclass 4, count 0 2006.229.20:20:58.97#ibcon#read 4, iclass 4, count 0 2006.229.20:20:58.97#ibcon#about to read 5, iclass 4, count 0 2006.229.20:20:58.97#ibcon#read 5, iclass 4, count 0 2006.229.20:20:58.97#ibcon#about to read 6, iclass 4, count 0 2006.229.20:20:58.97#ibcon#read 6, iclass 4, count 0 2006.229.20:20:58.97#ibcon#end of sib2, iclass 4, count 0 2006.229.20:20:58.97#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:20:58.97#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:20:58.97#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:20:58.97#ibcon#*before write, iclass 4, count 0 2006.229.20:20:58.97#ibcon#enter sib2, iclass 4, count 0 2006.229.20:20:58.97#ibcon#flushed, iclass 4, count 0 2006.229.20:20:58.97#ibcon#about to write, iclass 4, count 0 2006.229.20:20:58.97#ibcon#wrote, iclass 4, count 0 2006.229.20:20:58.97#ibcon#about to read 3, iclass 4, count 0 2006.229.20:20:59.01#ibcon#read 3, iclass 4, count 0 2006.229.20:20:59.01#ibcon#about to read 4, iclass 4, count 0 2006.229.20:20:59.01#ibcon#read 4, iclass 4, count 0 2006.229.20:20:59.01#ibcon#about to read 5, iclass 4, count 0 2006.229.20:20:59.01#ibcon#read 5, iclass 4, count 0 2006.229.20:20:59.01#ibcon#about to read 6, iclass 4, count 0 2006.229.20:20:59.01#ibcon#read 6, iclass 4, count 0 2006.229.20:20:59.01#ibcon#end of sib2, iclass 4, count 0 2006.229.20:20:59.01#ibcon#*after write, iclass 4, count 0 2006.229.20:20:59.01#ibcon#*before return 0, iclass 4, count 0 2006.229.20:20:59.01#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:20:59.01#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:20:59.01#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:20:59.01#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:20:59.01$vck44/va=3,6 2006.229.20:20:59.01#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.20:20:59.01#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.20:20:59.01#ibcon#ireg 11 cls_cnt 2 2006.229.20:20:59.01#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:20:59.07#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:20:59.07#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:20:59.07#ibcon#enter wrdev, iclass 6, count 2 2006.229.20:20:59.07#ibcon#first serial, iclass 6, count 2 2006.229.20:20:59.07#ibcon#enter sib2, iclass 6, count 2 2006.229.20:20:59.07#ibcon#flushed, iclass 6, count 2 2006.229.20:20:59.07#ibcon#about to write, iclass 6, count 2 2006.229.20:20:59.07#ibcon#wrote, iclass 6, count 2 2006.229.20:20:59.07#ibcon#about to read 3, iclass 6, count 2 2006.229.20:20:59.09#ibcon#read 3, iclass 6, count 2 2006.229.20:20:59.09#ibcon#about to read 4, iclass 6, count 2 2006.229.20:20:59.09#ibcon#read 4, iclass 6, count 2 2006.229.20:20:59.09#ibcon#about to read 5, iclass 6, count 2 2006.229.20:20:59.09#ibcon#read 5, iclass 6, count 2 2006.229.20:20:59.09#ibcon#about to read 6, iclass 6, count 2 2006.229.20:20:59.09#ibcon#read 6, iclass 6, count 2 2006.229.20:20:59.09#ibcon#end of sib2, iclass 6, count 2 2006.229.20:20:59.09#ibcon#*mode == 0, iclass 6, count 2 2006.229.20:20:59.09#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.20:20:59.09#ibcon#[25=AT03-06\r\n] 2006.229.20:20:59.09#ibcon#*before write, iclass 6, count 2 2006.229.20:20:59.09#ibcon#enter sib2, iclass 6, count 2 2006.229.20:20:59.09#ibcon#flushed, iclass 6, count 2 2006.229.20:20:59.09#ibcon#about to write, iclass 6, count 2 2006.229.20:20:59.09#ibcon#wrote, iclass 6, count 2 2006.229.20:20:59.09#ibcon#about to read 3, iclass 6, count 2 2006.229.20:20:59.12#ibcon#read 3, iclass 6, count 2 2006.229.20:20:59.12#ibcon#about to read 4, iclass 6, count 2 2006.229.20:20:59.12#ibcon#read 4, iclass 6, count 2 2006.229.20:20:59.12#ibcon#about to read 5, iclass 6, count 2 2006.229.20:20:59.12#ibcon#read 5, iclass 6, count 2 2006.229.20:20:59.12#ibcon#about to read 6, iclass 6, count 2 2006.229.20:20:59.12#ibcon#read 6, iclass 6, count 2 2006.229.20:20:59.12#ibcon#end of sib2, iclass 6, count 2 2006.229.20:20:59.12#ibcon#*after write, iclass 6, count 2 2006.229.20:20:59.12#ibcon#*before return 0, iclass 6, count 2 2006.229.20:20:59.12#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:20:59.12#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:20:59.12#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.20:20:59.12#ibcon#ireg 7 cls_cnt 0 2006.229.20:20:59.12#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:20:59.24#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:20:59.24#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:20:59.24#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:20:59.24#ibcon#first serial, iclass 6, count 0 2006.229.20:20:59.24#ibcon#enter sib2, iclass 6, count 0 2006.229.20:20:59.24#ibcon#flushed, iclass 6, count 0 2006.229.20:20:59.24#ibcon#about to write, iclass 6, count 0 2006.229.20:20:59.24#ibcon#wrote, iclass 6, count 0 2006.229.20:20:59.24#ibcon#about to read 3, iclass 6, count 0 2006.229.20:20:59.26#ibcon#read 3, iclass 6, count 0 2006.229.20:20:59.26#ibcon#about to read 4, iclass 6, count 0 2006.229.20:20:59.26#ibcon#read 4, iclass 6, count 0 2006.229.20:20:59.26#ibcon#about to read 5, iclass 6, count 0 2006.229.20:20:59.26#ibcon#read 5, iclass 6, count 0 2006.229.20:20:59.26#ibcon#about to read 6, iclass 6, count 0 2006.229.20:20:59.26#ibcon#read 6, iclass 6, count 0 2006.229.20:20:59.26#ibcon#end of sib2, iclass 6, count 0 2006.229.20:20:59.26#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:20:59.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:20:59.26#ibcon#[25=USB\r\n] 2006.229.20:20:59.26#ibcon#*before write, iclass 6, count 0 2006.229.20:20:59.26#ibcon#enter sib2, iclass 6, count 0 2006.229.20:20:59.26#ibcon#flushed, iclass 6, count 0 2006.229.20:20:59.26#ibcon#about to write, iclass 6, count 0 2006.229.20:20:59.26#ibcon#wrote, iclass 6, count 0 2006.229.20:20:59.26#ibcon#about to read 3, iclass 6, count 0 2006.229.20:20:59.29#ibcon#read 3, iclass 6, count 0 2006.229.20:20:59.29#ibcon#about to read 4, iclass 6, count 0 2006.229.20:20:59.29#ibcon#read 4, iclass 6, count 0 2006.229.20:20:59.29#ibcon#about to read 5, iclass 6, count 0 2006.229.20:20:59.29#ibcon#read 5, iclass 6, count 0 2006.229.20:20:59.29#ibcon#about to read 6, iclass 6, count 0 2006.229.20:20:59.29#ibcon#read 6, iclass 6, count 0 2006.229.20:20:59.29#ibcon#end of sib2, iclass 6, count 0 2006.229.20:20:59.29#ibcon#*after write, iclass 6, count 0 2006.229.20:20:59.29#ibcon#*before return 0, iclass 6, count 0 2006.229.20:20:59.29#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:20:59.29#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:20:59.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:20:59.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:20:59.29$vck44/valo=4,624.99 2006.229.20:20:59.29#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.20:20:59.29#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.20:20:59.29#ibcon#ireg 17 cls_cnt 0 2006.229.20:20:59.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:20:59.29#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:20:59.29#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:20:59.29#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:20:59.29#ibcon#first serial, iclass 10, count 0 2006.229.20:20:59.29#ibcon#enter sib2, iclass 10, count 0 2006.229.20:20:59.29#ibcon#flushed, iclass 10, count 0 2006.229.20:20:59.29#ibcon#about to write, iclass 10, count 0 2006.229.20:20:59.29#ibcon#wrote, iclass 10, count 0 2006.229.20:20:59.29#ibcon#about to read 3, iclass 10, count 0 2006.229.20:20:59.31#ibcon#read 3, iclass 10, count 0 2006.229.20:20:59.31#ibcon#about to read 4, iclass 10, count 0 2006.229.20:20:59.31#ibcon#read 4, iclass 10, count 0 2006.229.20:20:59.31#ibcon#about to read 5, iclass 10, count 0 2006.229.20:20:59.31#ibcon#read 5, iclass 10, count 0 2006.229.20:20:59.31#ibcon#about to read 6, iclass 10, count 0 2006.229.20:20:59.31#ibcon#read 6, iclass 10, count 0 2006.229.20:20:59.31#ibcon#end of sib2, iclass 10, count 0 2006.229.20:20:59.31#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:20:59.31#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:20:59.31#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:20:59.31#ibcon#*before write, iclass 10, count 0 2006.229.20:20:59.31#ibcon#enter sib2, iclass 10, count 0 2006.229.20:20:59.31#ibcon#flushed, iclass 10, count 0 2006.229.20:20:59.31#ibcon#about to write, iclass 10, count 0 2006.229.20:20:59.31#ibcon#wrote, iclass 10, count 0 2006.229.20:20:59.31#ibcon#about to read 3, iclass 10, count 0 2006.229.20:20:59.35#ibcon#read 3, iclass 10, count 0 2006.229.20:20:59.35#ibcon#about to read 4, iclass 10, count 0 2006.229.20:20:59.35#ibcon#read 4, iclass 10, count 0 2006.229.20:20:59.35#ibcon#about to read 5, iclass 10, count 0 2006.229.20:20:59.35#ibcon#read 5, iclass 10, count 0 2006.229.20:20:59.35#ibcon#about to read 6, iclass 10, count 0 2006.229.20:20:59.35#ibcon#read 6, iclass 10, count 0 2006.229.20:20:59.35#ibcon#end of sib2, iclass 10, count 0 2006.229.20:20:59.35#ibcon#*after write, iclass 10, count 0 2006.229.20:20:59.35#ibcon#*before return 0, iclass 10, count 0 2006.229.20:20:59.35#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:20:59.35#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:20:59.35#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:20:59.35#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:20:59.35$vck44/va=4,7 2006.229.20:20:59.35#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.20:20:59.35#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.20:20:59.35#ibcon#ireg 11 cls_cnt 2 2006.229.20:20:59.35#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:20:59.41#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:20:59.41#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:20:59.41#ibcon#enter wrdev, iclass 12, count 2 2006.229.20:20:59.41#ibcon#first serial, iclass 12, count 2 2006.229.20:20:59.41#ibcon#enter sib2, iclass 12, count 2 2006.229.20:20:59.41#ibcon#flushed, iclass 12, count 2 2006.229.20:20:59.41#ibcon#about to write, iclass 12, count 2 2006.229.20:20:59.41#ibcon#wrote, iclass 12, count 2 2006.229.20:20:59.41#ibcon#about to read 3, iclass 12, count 2 2006.229.20:20:59.43#ibcon#read 3, iclass 12, count 2 2006.229.20:20:59.43#ibcon#about to read 4, iclass 12, count 2 2006.229.20:20:59.43#ibcon#read 4, iclass 12, count 2 2006.229.20:20:59.43#ibcon#about to read 5, iclass 12, count 2 2006.229.20:20:59.43#ibcon#read 5, iclass 12, count 2 2006.229.20:20:59.43#ibcon#about to read 6, iclass 12, count 2 2006.229.20:20:59.43#ibcon#read 6, iclass 12, count 2 2006.229.20:20:59.43#ibcon#end of sib2, iclass 12, count 2 2006.229.20:20:59.43#ibcon#*mode == 0, iclass 12, count 2 2006.229.20:20:59.43#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.20:20:59.43#ibcon#[25=AT04-07\r\n] 2006.229.20:20:59.43#ibcon#*before write, iclass 12, count 2 2006.229.20:20:59.43#ibcon#enter sib2, iclass 12, count 2 2006.229.20:20:59.43#ibcon#flushed, iclass 12, count 2 2006.229.20:20:59.43#ibcon#about to write, iclass 12, count 2 2006.229.20:20:59.43#ibcon#wrote, iclass 12, count 2 2006.229.20:20:59.43#ibcon#about to read 3, iclass 12, count 2 2006.229.20:20:59.46#ibcon#read 3, iclass 12, count 2 2006.229.20:20:59.46#ibcon#about to read 4, iclass 12, count 2 2006.229.20:20:59.46#ibcon#read 4, iclass 12, count 2 2006.229.20:20:59.46#ibcon#about to read 5, iclass 12, count 2 2006.229.20:20:59.46#ibcon#read 5, iclass 12, count 2 2006.229.20:20:59.46#ibcon#about to read 6, iclass 12, count 2 2006.229.20:20:59.46#ibcon#read 6, iclass 12, count 2 2006.229.20:20:59.46#ibcon#end of sib2, iclass 12, count 2 2006.229.20:20:59.46#ibcon#*after write, iclass 12, count 2 2006.229.20:20:59.46#ibcon#*before return 0, iclass 12, count 2 2006.229.20:20:59.46#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:20:59.46#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:20:59.46#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.20:20:59.46#ibcon#ireg 7 cls_cnt 0 2006.229.20:20:59.46#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:20:59.58#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:20:59.58#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:20:59.58#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:20:59.58#ibcon#first serial, iclass 12, count 0 2006.229.20:20:59.58#ibcon#enter sib2, iclass 12, count 0 2006.229.20:20:59.58#ibcon#flushed, iclass 12, count 0 2006.229.20:20:59.58#ibcon#about to write, iclass 12, count 0 2006.229.20:20:59.58#ibcon#wrote, iclass 12, count 0 2006.229.20:20:59.58#ibcon#about to read 3, iclass 12, count 0 2006.229.20:20:59.60#ibcon#read 3, iclass 12, count 0 2006.229.20:20:59.60#ibcon#about to read 4, iclass 12, count 0 2006.229.20:20:59.60#ibcon#read 4, iclass 12, count 0 2006.229.20:20:59.60#ibcon#about to read 5, iclass 12, count 0 2006.229.20:20:59.60#ibcon#read 5, iclass 12, count 0 2006.229.20:20:59.60#ibcon#about to read 6, iclass 12, count 0 2006.229.20:20:59.60#ibcon#read 6, iclass 12, count 0 2006.229.20:20:59.60#ibcon#end of sib2, iclass 12, count 0 2006.229.20:20:59.60#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:20:59.60#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:20:59.60#ibcon#[25=USB\r\n] 2006.229.20:20:59.60#ibcon#*before write, iclass 12, count 0 2006.229.20:20:59.60#ibcon#enter sib2, iclass 12, count 0 2006.229.20:20:59.60#ibcon#flushed, iclass 12, count 0 2006.229.20:20:59.60#ibcon#about to write, iclass 12, count 0 2006.229.20:20:59.60#ibcon#wrote, iclass 12, count 0 2006.229.20:20:59.60#ibcon#about to read 3, iclass 12, count 0 2006.229.20:20:59.63#ibcon#read 3, iclass 12, count 0 2006.229.20:20:59.63#ibcon#about to read 4, iclass 12, count 0 2006.229.20:20:59.63#ibcon#read 4, iclass 12, count 0 2006.229.20:20:59.63#ibcon#about to read 5, iclass 12, count 0 2006.229.20:20:59.63#ibcon#read 5, iclass 12, count 0 2006.229.20:20:59.63#ibcon#about to read 6, iclass 12, count 0 2006.229.20:20:59.63#ibcon#read 6, iclass 12, count 0 2006.229.20:20:59.63#ibcon#end of sib2, iclass 12, count 0 2006.229.20:20:59.63#ibcon#*after write, iclass 12, count 0 2006.229.20:20:59.63#ibcon#*before return 0, iclass 12, count 0 2006.229.20:20:59.63#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:20:59.63#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:20:59.63#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:20:59.63#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:20:59.63$vck44/valo=5,734.99 2006.229.20:20:59.63#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.20:20:59.63#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.20:20:59.63#ibcon#ireg 17 cls_cnt 0 2006.229.20:20:59.63#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:20:59.63#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:20:59.63#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:20:59.63#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:20:59.63#ibcon#first serial, iclass 14, count 0 2006.229.20:20:59.63#ibcon#enter sib2, iclass 14, count 0 2006.229.20:20:59.63#ibcon#flushed, iclass 14, count 0 2006.229.20:20:59.63#ibcon#about to write, iclass 14, count 0 2006.229.20:20:59.63#ibcon#wrote, iclass 14, count 0 2006.229.20:20:59.63#ibcon#about to read 3, iclass 14, count 0 2006.229.20:20:59.65#ibcon#read 3, iclass 14, count 0 2006.229.20:20:59.65#ibcon#about to read 4, iclass 14, count 0 2006.229.20:20:59.65#ibcon#read 4, iclass 14, count 0 2006.229.20:20:59.65#ibcon#about to read 5, iclass 14, count 0 2006.229.20:20:59.65#ibcon#read 5, iclass 14, count 0 2006.229.20:20:59.65#ibcon#about to read 6, iclass 14, count 0 2006.229.20:20:59.65#ibcon#read 6, iclass 14, count 0 2006.229.20:20:59.65#ibcon#end of sib2, iclass 14, count 0 2006.229.20:20:59.65#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:20:59.65#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:20:59.65#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:20:59.65#ibcon#*before write, iclass 14, count 0 2006.229.20:20:59.65#ibcon#enter sib2, iclass 14, count 0 2006.229.20:20:59.65#ibcon#flushed, iclass 14, count 0 2006.229.20:20:59.65#ibcon#about to write, iclass 14, count 0 2006.229.20:20:59.65#ibcon#wrote, iclass 14, count 0 2006.229.20:20:59.65#ibcon#about to read 3, iclass 14, count 0 2006.229.20:20:59.69#ibcon#read 3, iclass 14, count 0 2006.229.20:20:59.69#ibcon#about to read 4, iclass 14, count 0 2006.229.20:20:59.69#ibcon#read 4, iclass 14, count 0 2006.229.20:20:59.69#ibcon#about to read 5, iclass 14, count 0 2006.229.20:20:59.69#ibcon#read 5, iclass 14, count 0 2006.229.20:20:59.69#ibcon#about to read 6, iclass 14, count 0 2006.229.20:20:59.69#ibcon#read 6, iclass 14, count 0 2006.229.20:20:59.69#ibcon#end of sib2, iclass 14, count 0 2006.229.20:20:59.69#ibcon#*after write, iclass 14, count 0 2006.229.20:20:59.69#ibcon#*before return 0, iclass 14, count 0 2006.229.20:20:59.69#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:20:59.69#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:20:59.69#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:20:59.69#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:20:59.69$vck44/va=5,4 2006.229.20:20:59.69#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.20:20:59.69#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.20:20:59.69#ibcon#ireg 11 cls_cnt 2 2006.229.20:20:59.69#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:20:59.75#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:20:59.75#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:20:59.75#ibcon#enter wrdev, iclass 16, count 2 2006.229.20:20:59.75#ibcon#first serial, iclass 16, count 2 2006.229.20:20:59.75#ibcon#enter sib2, iclass 16, count 2 2006.229.20:20:59.75#ibcon#flushed, iclass 16, count 2 2006.229.20:20:59.75#ibcon#about to write, iclass 16, count 2 2006.229.20:20:59.75#ibcon#wrote, iclass 16, count 2 2006.229.20:20:59.75#ibcon#about to read 3, iclass 16, count 2 2006.229.20:20:59.77#ibcon#read 3, iclass 16, count 2 2006.229.20:20:59.77#ibcon#about to read 4, iclass 16, count 2 2006.229.20:20:59.77#ibcon#read 4, iclass 16, count 2 2006.229.20:20:59.77#ibcon#about to read 5, iclass 16, count 2 2006.229.20:20:59.77#ibcon#read 5, iclass 16, count 2 2006.229.20:20:59.77#ibcon#about to read 6, iclass 16, count 2 2006.229.20:20:59.77#ibcon#read 6, iclass 16, count 2 2006.229.20:20:59.77#ibcon#end of sib2, iclass 16, count 2 2006.229.20:20:59.77#ibcon#*mode == 0, iclass 16, count 2 2006.229.20:20:59.77#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.20:20:59.77#ibcon#[25=AT05-04\r\n] 2006.229.20:20:59.77#ibcon#*before write, iclass 16, count 2 2006.229.20:20:59.77#ibcon#enter sib2, iclass 16, count 2 2006.229.20:20:59.77#ibcon#flushed, iclass 16, count 2 2006.229.20:20:59.77#ibcon#about to write, iclass 16, count 2 2006.229.20:20:59.77#ibcon#wrote, iclass 16, count 2 2006.229.20:20:59.77#ibcon#about to read 3, iclass 16, count 2 2006.229.20:20:59.80#ibcon#read 3, iclass 16, count 2 2006.229.20:20:59.80#ibcon#about to read 4, iclass 16, count 2 2006.229.20:20:59.80#ibcon#read 4, iclass 16, count 2 2006.229.20:20:59.80#ibcon#about to read 5, iclass 16, count 2 2006.229.20:20:59.80#ibcon#read 5, iclass 16, count 2 2006.229.20:20:59.80#ibcon#about to read 6, iclass 16, count 2 2006.229.20:20:59.80#ibcon#read 6, iclass 16, count 2 2006.229.20:20:59.80#ibcon#end of sib2, iclass 16, count 2 2006.229.20:20:59.80#ibcon#*after write, iclass 16, count 2 2006.229.20:20:59.80#ibcon#*before return 0, iclass 16, count 2 2006.229.20:20:59.80#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:20:59.80#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:20:59.80#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.20:20:59.80#ibcon#ireg 7 cls_cnt 0 2006.229.20:20:59.80#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:20:59.92#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:20:59.92#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:20:59.92#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:20:59.92#ibcon#first serial, iclass 16, count 0 2006.229.20:20:59.92#ibcon#enter sib2, iclass 16, count 0 2006.229.20:20:59.92#ibcon#flushed, iclass 16, count 0 2006.229.20:20:59.92#ibcon#about to write, iclass 16, count 0 2006.229.20:20:59.92#ibcon#wrote, iclass 16, count 0 2006.229.20:20:59.92#ibcon#about to read 3, iclass 16, count 0 2006.229.20:20:59.94#ibcon#read 3, iclass 16, count 0 2006.229.20:20:59.94#ibcon#about to read 4, iclass 16, count 0 2006.229.20:20:59.94#ibcon#read 4, iclass 16, count 0 2006.229.20:20:59.94#ibcon#about to read 5, iclass 16, count 0 2006.229.20:20:59.94#ibcon#read 5, iclass 16, count 0 2006.229.20:20:59.94#ibcon#about to read 6, iclass 16, count 0 2006.229.20:20:59.94#ibcon#read 6, iclass 16, count 0 2006.229.20:20:59.94#ibcon#end of sib2, iclass 16, count 0 2006.229.20:20:59.94#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:20:59.94#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:20:59.94#ibcon#[25=USB\r\n] 2006.229.20:20:59.94#ibcon#*before write, iclass 16, count 0 2006.229.20:20:59.94#ibcon#enter sib2, iclass 16, count 0 2006.229.20:20:59.94#ibcon#flushed, iclass 16, count 0 2006.229.20:20:59.94#ibcon#about to write, iclass 16, count 0 2006.229.20:20:59.94#ibcon#wrote, iclass 16, count 0 2006.229.20:20:59.94#ibcon#about to read 3, iclass 16, count 0 2006.229.20:20:59.97#ibcon#read 3, iclass 16, count 0 2006.229.20:20:59.97#ibcon#about to read 4, iclass 16, count 0 2006.229.20:20:59.97#ibcon#read 4, iclass 16, count 0 2006.229.20:20:59.97#ibcon#about to read 5, iclass 16, count 0 2006.229.20:20:59.97#ibcon#read 5, iclass 16, count 0 2006.229.20:20:59.97#ibcon#about to read 6, iclass 16, count 0 2006.229.20:20:59.97#ibcon#read 6, iclass 16, count 0 2006.229.20:20:59.97#ibcon#end of sib2, iclass 16, count 0 2006.229.20:20:59.97#ibcon#*after write, iclass 16, count 0 2006.229.20:20:59.97#ibcon#*before return 0, iclass 16, count 0 2006.229.20:20:59.97#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:20:59.97#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:20:59.97#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:20:59.97#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:20:59.97$vck44/valo=6,814.99 2006.229.20:20:59.97#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.20:20:59.97#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.20:20:59.97#ibcon#ireg 17 cls_cnt 0 2006.229.20:20:59.97#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:20:59.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:20:59.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:20:59.97#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:20:59.97#ibcon#first serial, iclass 18, count 0 2006.229.20:20:59.97#ibcon#enter sib2, iclass 18, count 0 2006.229.20:20:59.97#ibcon#flushed, iclass 18, count 0 2006.229.20:20:59.97#ibcon#about to write, iclass 18, count 0 2006.229.20:20:59.97#ibcon#wrote, iclass 18, count 0 2006.229.20:20:59.97#ibcon#about to read 3, iclass 18, count 0 2006.229.20:20:59.99#ibcon#read 3, iclass 18, count 0 2006.229.20:20:59.99#ibcon#about to read 4, iclass 18, count 0 2006.229.20:20:59.99#ibcon#read 4, iclass 18, count 0 2006.229.20:20:59.99#ibcon#about to read 5, iclass 18, count 0 2006.229.20:20:59.99#ibcon#read 5, iclass 18, count 0 2006.229.20:20:59.99#ibcon#about to read 6, iclass 18, count 0 2006.229.20:20:59.99#ibcon#read 6, iclass 18, count 0 2006.229.20:20:59.99#ibcon#end of sib2, iclass 18, count 0 2006.229.20:20:59.99#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:20:59.99#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:20:59.99#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:20:59.99#ibcon#*before write, iclass 18, count 0 2006.229.20:20:59.99#ibcon#enter sib2, iclass 18, count 0 2006.229.20:20:59.99#ibcon#flushed, iclass 18, count 0 2006.229.20:20:59.99#ibcon#about to write, iclass 18, count 0 2006.229.20:20:59.99#ibcon#wrote, iclass 18, count 0 2006.229.20:20:59.99#ibcon#about to read 3, iclass 18, count 0 2006.229.20:21:00.03#ibcon#read 3, iclass 18, count 0 2006.229.20:21:00.03#ibcon#about to read 4, iclass 18, count 0 2006.229.20:21:00.03#ibcon#read 4, iclass 18, count 0 2006.229.20:21:00.03#ibcon#about to read 5, iclass 18, count 0 2006.229.20:21:00.03#ibcon#read 5, iclass 18, count 0 2006.229.20:21:00.03#ibcon#about to read 6, iclass 18, count 0 2006.229.20:21:00.03#ibcon#read 6, iclass 18, count 0 2006.229.20:21:00.03#ibcon#end of sib2, iclass 18, count 0 2006.229.20:21:00.03#ibcon#*after write, iclass 18, count 0 2006.229.20:21:00.03#ibcon#*before return 0, iclass 18, count 0 2006.229.20:21:00.03#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:00.03#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:00.03#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:21:00.03#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:21:00.03$vck44/va=6,4 2006.229.20:21:00.03#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.20:21:00.03#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.20:21:00.03#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:00.03#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:00.09#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:00.09#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:00.09#ibcon#enter wrdev, iclass 20, count 2 2006.229.20:21:00.09#ibcon#first serial, iclass 20, count 2 2006.229.20:21:00.09#ibcon#enter sib2, iclass 20, count 2 2006.229.20:21:00.09#ibcon#flushed, iclass 20, count 2 2006.229.20:21:00.09#ibcon#about to write, iclass 20, count 2 2006.229.20:21:00.09#ibcon#wrote, iclass 20, count 2 2006.229.20:21:00.09#ibcon#about to read 3, iclass 20, count 2 2006.229.20:21:00.11#ibcon#read 3, iclass 20, count 2 2006.229.20:21:00.11#ibcon#about to read 4, iclass 20, count 2 2006.229.20:21:00.11#ibcon#read 4, iclass 20, count 2 2006.229.20:21:00.11#ibcon#about to read 5, iclass 20, count 2 2006.229.20:21:00.11#ibcon#read 5, iclass 20, count 2 2006.229.20:21:00.11#ibcon#about to read 6, iclass 20, count 2 2006.229.20:21:00.11#ibcon#read 6, iclass 20, count 2 2006.229.20:21:00.11#ibcon#end of sib2, iclass 20, count 2 2006.229.20:21:00.11#ibcon#*mode == 0, iclass 20, count 2 2006.229.20:21:00.11#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.20:21:00.11#ibcon#[25=AT06-04\r\n] 2006.229.20:21:00.11#ibcon#*before write, iclass 20, count 2 2006.229.20:21:00.11#ibcon#enter sib2, iclass 20, count 2 2006.229.20:21:00.11#ibcon#flushed, iclass 20, count 2 2006.229.20:21:00.11#ibcon#about to write, iclass 20, count 2 2006.229.20:21:00.11#ibcon#wrote, iclass 20, count 2 2006.229.20:21:00.11#ibcon#about to read 3, iclass 20, count 2 2006.229.20:21:00.14#ibcon#read 3, iclass 20, count 2 2006.229.20:21:00.14#ibcon#about to read 4, iclass 20, count 2 2006.229.20:21:00.14#ibcon#read 4, iclass 20, count 2 2006.229.20:21:00.14#ibcon#about to read 5, iclass 20, count 2 2006.229.20:21:00.14#ibcon#read 5, iclass 20, count 2 2006.229.20:21:00.14#ibcon#about to read 6, iclass 20, count 2 2006.229.20:21:00.14#ibcon#read 6, iclass 20, count 2 2006.229.20:21:00.14#ibcon#end of sib2, iclass 20, count 2 2006.229.20:21:00.14#ibcon#*after write, iclass 20, count 2 2006.229.20:21:00.14#ibcon#*before return 0, iclass 20, count 2 2006.229.20:21:00.14#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:00.14#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:00.14#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.20:21:00.14#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:00.14#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:00.26#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:00.26#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:00.26#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:21:00.26#ibcon#first serial, iclass 20, count 0 2006.229.20:21:00.26#ibcon#enter sib2, iclass 20, count 0 2006.229.20:21:00.26#ibcon#flushed, iclass 20, count 0 2006.229.20:21:00.26#ibcon#about to write, iclass 20, count 0 2006.229.20:21:00.26#ibcon#wrote, iclass 20, count 0 2006.229.20:21:00.26#ibcon#about to read 3, iclass 20, count 0 2006.229.20:21:00.28#ibcon#read 3, iclass 20, count 0 2006.229.20:21:00.28#ibcon#about to read 4, iclass 20, count 0 2006.229.20:21:00.28#ibcon#read 4, iclass 20, count 0 2006.229.20:21:00.28#ibcon#about to read 5, iclass 20, count 0 2006.229.20:21:00.28#ibcon#read 5, iclass 20, count 0 2006.229.20:21:00.28#ibcon#about to read 6, iclass 20, count 0 2006.229.20:21:00.28#ibcon#read 6, iclass 20, count 0 2006.229.20:21:00.28#ibcon#end of sib2, iclass 20, count 0 2006.229.20:21:00.28#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:21:00.28#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:21:00.28#ibcon#[25=USB\r\n] 2006.229.20:21:00.28#ibcon#*before write, iclass 20, count 0 2006.229.20:21:00.28#ibcon#enter sib2, iclass 20, count 0 2006.229.20:21:00.28#ibcon#flushed, iclass 20, count 0 2006.229.20:21:00.28#ibcon#about to write, iclass 20, count 0 2006.229.20:21:00.28#ibcon#wrote, iclass 20, count 0 2006.229.20:21:00.28#ibcon#about to read 3, iclass 20, count 0 2006.229.20:21:00.31#ibcon#read 3, iclass 20, count 0 2006.229.20:21:00.31#ibcon#about to read 4, iclass 20, count 0 2006.229.20:21:00.31#ibcon#read 4, iclass 20, count 0 2006.229.20:21:00.31#ibcon#about to read 5, iclass 20, count 0 2006.229.20:21:00.31#ibcon#read 5, iclass 20, count 0 2006.229.20:21:00.31#ibcon#about to read 6, iclass 20, count 0 2006.229.20:21:00.31#ibcon#read 6, iclass 20, count 0 2006.229.20:21:00.31#ibcon#end of sib2, iclass 20, count 0 2006.229.20:21:00.31#ibcon#*after write, iclass 20, count 0 2006.229.20:21:00.31#ibcon#*before return 0, iclass 20, count 0 2006.229.20:21:00.31#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:00.31#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:00.31#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:21:00.31#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:21:00.31$vck44/valo=7,864.99 2006.229.20:21:00.31#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.20:21:00.31#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.20:21:00.31#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:00.31#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:00.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:00.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:00.31#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:21:00.31#ibcon#first serial, iclass 22, count 0 2006.229.20:21:00.31#ibcon#enter sib2, iclass 22, count 0 2006.229.20:21:00.31#ibcon#flushed, iclass 22, count 0 2006.229.20:21:00.31#ibcon#about to write, iclass 22, count 0 2006.229.20:21:00.31#ibcon#wrote, iclass 22, count 0 2006.229.20:21:00.31#ibcon#about to read 3, iclass 22, count 0 2006.229.20:21:00.33#ibcon#read 3, iclass 22, count 0 2006.229.20:21:00.33#ibcon#about to read 4, iclass 22, count 0 2006.229.20:21:00.33#ibcon#read 4, iclass 22, count 0 2006.229.20:21:00.33#ibcon#about to read 5, iclass 22, count 0 2006.229.20:21:00.33#ibcon#read 5, iclass 22, count 0 2006.229.20:21:00.33#ibcon#about to read 6, iclass 22, count 0 2006.229.20:21:00.33#ibcon#read 6, iclass 22, count 0 2006.229.20:21:00.33#ibcon#end of sib2, iclass 22, count 0 2006.229.20:21:00.33#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:21:00.33#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:21:00.33#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:21:00.33#ibcon#*before write, iclass 22, count 0 2006.229.20:21:00.33#ibcon#enter sib2, iclass 22, count 0 2006.229.20:21:00.33#ibcon#flushed, iclass 22, count 0 2006.229.20:21:00.33#ibcon#about to write, iclass 22, count 0 2006.229.20:21:00.33#ibcon#wrote, iclass 22, count 0 2006.229.20:21:00.33#ibcon#about to read 3, iclass 22, count 0 2006.229.20:21:00.37#ibcon#read 3, iclass 22, count 0 2006.229.20:21:00.37#ibcon#about to read 4, iclass 22, count 0 2006.229.20:21:00.37#ibcon#read 4, iclass 22, count 0 2006.229.20:21:00.37#ibcon#about to read 5, iclass 22, count 0 2006.229.20:21:00.37#ibcon#read 5, iclass 22, count 0 2006.229.20:21:00.37#ibcon#about to read 6, iclass 22, count 0 2006.229.20:21:00.37#ibcon#read 6, iclass 22, count 0 2006.229.20:21:00.37#ibcon#end of sib2, iclass 22, count 0 2006.229.20:21:00.37#ibcon#*after write, iclass 22, count 0 2006.229.20:21:00.37#ibcon#*before return 0, iclass 22, count 0 2006.229.20:21:00.37#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:00.37#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:00.37#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:21:00.37#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:21:00.37$vck44/va=7,5 2006.229.20:21:00.37#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.20:21:00.37#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.20:21:00.37#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:00.37#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:00.43#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:00.43#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:00.43#ibcon#enter wrdev, iclass 24, count 2 2006.229.20:21:00.43#ibcon#first serial, iclass 24, count 2 2006.229.20:21:00.43#ibcon#enter sib2, iclass 24, count 2 2006.229.20:21:00.43#ibcon#flushed, iclass 24, count 2 2006.229.20:21:00.43#ibcon#about to write, iclass 24, count 2 2006.229.20:21:00.43#ibcon#wrote, iclass 24, count 2 2006.229.20:21:00.43#ibcon#about to read 3, iclass 24, count 2 2006.229.20:21:00.45#ibcon#read 3, iclass 24, count 2 2006.229.20:21:00.45#ibcon#about to read 4, iclass 24, count 2 2006.229.20:21:00.45#ibcon#read 4, iclass 24, count 2 2006.229.20:21:00.45#ibcon#about to read 5, iclass 24, count 2 2006.229.20:21:00.45#ibcon#read 5, iclass 24, count 2 2006.229.20:21:00.45#ibcon#about to read 6, iclass 24, count 2 2006.229.20:21:00.45#ibcon#read 6, iclass 24, count 2 2006.229.20:21:00.45#ibcon#end of sib2, iclass 24, count 2 2006.229.20:21:00.45#ibcon#*mode == 0, iclass 24, count 2 2006.229.20:21:00.45#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.20:21:00.45#ibcon#[25=AT07-05\r\n] 2006.229.20:21:00.45#ibcon#*before write, iclass 24, count 2 2006.229.20:21:00.45#ibcon#enter sib2, iclass 24, count 2 2006.229.20:21:00.45#ibcon#flushed, iclass 24, count 2 2006.229.20:21:00.45#ibcon#about to write, iclass 24, count 2 2006.229.20:21:00.45#ibcon#wrote, iclass 24, count 2 2006.229.20:21:00.45#ibcon#about to read 3, iclass 24, count 2 2006.229.20:21:00.48#ibcon#read 3, iclass 24, count 2 2006.229.20:21:00.48#ibcon#about to read 4, iclass 24, count 2 2006.229.20:21:00.48#ibcon#read 4, iclass 24, count 2 2006.229.20:21:00.48#ibcon#about to read 5, iclass 24, count 2 2006.229.20:21:00.48#ibcon#read 5, iclass 24, count 2 2006.229.20:21:00.48#ibcon#about to read 6, iclass 24, count 2 2006.229.20:21:00.48#ibcon#read 6, iclass 24, count 2 2006.229.20:21:00.48#ibcon#end of sib2, iclass 24, count 2 2006.229.20:21:00.48#ibcon#*after write, iclass 24, count 2 2006.229.20:21:00.48#ibcon#*before return 0, iclass 24, count 2 2006.229.20:21:00.48#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:00.48#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:00.48#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.20:21:00.48#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:00.48#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:00.60#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:00.60#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:00.60#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:21:00.60#ibcon#first serial, iclass 24, count 0 2006.229.20:21:00.60#ibcon#enter sib2, iclass 24, count 0 2006.229.20:21:00.60#ibcon#flushed, iclass 24, count 0 2006.229.20:21:00.60#ibcon#about to write, iclass 24, count 0 2006.229.20:21:00.60#ibcon#wrote, iclass 24, count 0 2006.229.20:21:00.60#ibcon#about to read 3, iclass 24, count 0 2006.229.20:21:00.62#ibcon#read 3, iclass 24, count 0 2006.229.20:21:00.62#ibcon#about to read 4, iclass 24, count 0 2006.229.20:21:00.62#ibcon#read 4, iclass 24, count 0 2006.229.20:21:00.62#ibcon#about to read 5, iclass 24, count 0 2006.229.20:21:00.62#ibcon#read 5, iclass 24, count 0 2006.229.20:21:00.62#ibcon#about to read 6, iclass 24, count 0 2006.229.20:21:00.62#ibcon#read 6, iclass 24, count 0 2006.229.20:21:00.62#ibcon#end of sib2, iclass 24, count 0 2006.229.20:21:00.62#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:21:00.62#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:21:00.62#ibcon#[25=USB\r\n] 2006.229.20:21:00.62#ibcon#*before write, iclass 24, count 0 2006.229.20:21:00.62#ibcon#enter sib2, iclass 24, count 0 2006.229.20:21:00.62#ibcon#flushed, iclass 24, count 0 2006.229.20:21:00.62#ibcon#about to write, iclass 24, count 0 2006.229.20:21:00.62#ibcon#wrote, iclass 24, count 0 2006.229.20:21:00.62#ibcon#about to read 3, iclass 24, count 0 2006.229.20:21:00.65#ibcon#read 3, iclass 24, count 0 2006.229.20:21:00.65#ibcon#about to read 4, iclass 24, count 0 2006.229.20:21:00.65#ibcon#read 4, iclass 24, count 0 2006.229.20:21:00.65#ibcon#about to read 5, iclass 24, count 0 2006.229.20:21:00.65#ibcon#read 5, iclass 24, count 0 2006.229.20:21:00.65#ibcon#about to read 6, iclass 24, count 0 2006.229.20:21:00.65#ibcon#read 6, iclass 24, count 0 2006.229.20:21:00.65#ibcon#end of sib2, iclass 24, count 0 2006.229.20:21:00.65#ibcon#*after write, iclass 24, count 0 2006.229.20:21:00.65#ibcon#*before return 0, iclass 24, count 0 2006.229.20:21:00.65#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:00.65#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:00.65#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:21:00.65#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:21:00.65$vck44/valo=8,884.99 2006.229.20:21:00.65#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.20:21:00.65#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.20:21:00.65#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:00.65#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:00.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:00.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:00.65#ibcon#enter wrdev, iclass 26, count 0 2006.229.20:21:00.65#ibcon#first serial, iclass 26, count 0 2006.229.20:21:00.65#ibcon#enter sib2, iclass 26, count 0 2006.229.20:21:00.65#ibcon#flushed, iclass 26, count 0 2006.229.20:21:00.65#ibcon#about to write, iclass 26, count 0 2006.229.20:21:00.65#ibcon#wrote, iclass 26, count 0 2006.229.20:21:00.65#ibcon#about to read 3, iclass 26, count 0 2006.229.20:21:00.67#ibcon#read 3, iclass 26, count 0 2006.229.20:21:00.67#ibcon#about to read 4, iclass 26, count 0 2006.229.20:21:00.67#ibcon#read 4, iclass 26, count 0 2006.229.20:21:00.67#ibcon#about to read 5, iclass 26, count 0 2006.229.20:21:00.67#ibcon#read 5, iclass 26, count 0 2006.229.20:21:00.67#ibcon#about to read 6, iclass 26, count 0 2006.229.20:21:00.67#ibcon#read 6, iclass 26, count 0 2006.229.20:21:00.67#ibcon#end of sib2, iclass 26, count 0 2006.229.20:21:00.67#ibcon#*mode == 0, iclass 26, count 0 2006.229.20:21:00.67#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.20:21:00.67#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:21:00.67#ibcon#*before write, iclass 26, count 0 2006.229.20:21:00.67#ibcon#enter sib2, iclass 26, count 0 2006.229.20:21:00.67#ibcon#flushed, iclass 26, count 0 2006.229.20:21:00.67#ibcon#about to write, iclass 26, count 0 2006.229.20:21:00.67#ibcon#wrote, iclass 26, count 0 2006.229.20:21:00.67#ibcon#about to read 3, iclass 26, count 0 2006.229.20:21:00.71#ibcon#read 3, iclass 26, count 0 2006.229.20:21:00.71#ibcon#about to read 4, iclass 26, count 0 2006.229.20:21:00.71#ibcon#read 4, iclass 26, count 0 2006.229.20:21:00.71#ibcon#about to read 5, iclass 26, count 0 2006.229.20:21:00.71#ibcon#read 5, iclass 26, count 0 2006.229.20:21:00.71#ibcon#about to read 6, iclass 26, count 0 2006.229.20:21:00.71#ibcon#read 6, iclass 26, count 0 2006.229.20:21:00.71#ibcon#end of sib2, iclass 26, count 0 2006.229.20:21:00.71#ibcon#*after write, iclass 26, count 0 2006.229.20:21:00.71#ibcon#*before return 0, iclass 26, count 0 2006.229.20:21:00.71#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:00.71#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:00.71#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.20:21:00.71#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.20:21:00.71$vck44/va=8,6 2006.229.20:21:00.71#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.20:21:00.71#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.20:21:00.71#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:00.71#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:21:00.77#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:21:00.77#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:21:00.77#ibcon#enter wrdev, iclass 28, count 2 2006.229.20:21:00.77#ibcon#first serial, iclass 28, count 2 2006.229.20:21:00.77#ibcon#enter sib2, iclass 28, count 2 2006.229.20:21:00.77#ibcon#flushed, iclass 28, count 2 2006.229.20:21:00.77#ibcon#about to write, iclass 28, count 2 2006.229.20:21:00.77#ibcon#wrote, iclass 28, count 2 2006.229.20:21:00.77#ibcon#about to read 3, iclass 28, count 2 2006.229.20:21:00.79#ibcon#read 3, iclass 28, count 2 2006.229.20:21:00.79#ibcon#about to read 4, iclass 28, count 2 2006.229.20:21:00.79#ibcon#read 4, iclass 28, count 2 2006.229.20:21:00.79#ibcon#about to read 5, iclass 28, count 2 2006.229.20:21:00.79#ibcon#read 5, iclass 28, count 2 2006.229.20:21:00.79#ibcon#about to read 6, iclass 28, count 2 2006.229.20:21:00.79#ibcon#read 6, iclass 28, count 2 2006.229.20:21:00.79#ibcon#end of sib2, iclass 28, count 2 2006.229.20:21:00.79#ibcon#*mode == 0, iclass 28, count 2 2006.229.20:21:00.79#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.20:21:00.79#ibcon#[25=AT08-06\r\n] 2006.229.20:21:00.79#ibcon#*before write, iclass 28, count 2 2006.229.20:21:00.79#ibcon#enter sib2, iclass 28, count 2 2006.229.20:21:00.79#ibcon#flushed, iclass 28, count 2 2006.229.20:21:00.79#ibcon#about to write, iclass 28, count 2 2006.229.20:21:00.79#ibcon#wrote, iclass 28, count 2 2006.229.20:21:00.79#ibcon#about to read 3, iclass 28, count 2 2006.229.20:21:00.82#ibcon#read 3, iclass 28, count 2 2006.229.20:21:00.82#ibcon#about to read 4, iclass 28, count 2 2006.229.20:21:00.82#ibcon#read 4, iclass 28, count 2 2006.229.20:21:00.82#ibcon#about to read 5, iclass 28, count 2 2006.229.20:21:00.82#ibcon#read 5, iclass 28, count 2 2006.229.20:21:00.82#ibcon#about to read 6, iclass 28, count 2 2006.229.20:21:00.82#ibcon#read 6, iclass 28, count 2 2006.229.20:21:00.82#ibcon#end of sib2, iclass 28, count 2 2006.229.20:21:00.82#ibcon#*after write, iclass 28, count 2 2006.229.20:21:00.82#ibcon#*before return 0, iclass 28, count 2 2006.229.20:21:00.82#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:21:00.82#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:21:00.82#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.20:21:00.82#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:00.82#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:21:00.94#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:21:00.94#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:21:00.94#ibcon#enter wrdev, iclass 28, count 0 2006.229.20:21:00.94#ibcon#first serial, iclass 28, count 0 2006.229.20:21:00.94#ibcon#enter sib2, iclass 28, count 0 2006.229.20:21:00.94#ibcon#flushed, iclass 28, count 0 2006.229.20:21:00.94#ibcon#about to write, iclass 28, count 0 2006.229.20:21:00.94#ibcon#wrote, iclass 28, count 0 2006.229.20:21:00.94#ibcon#about to read 3, iclass 28, count 0 2006.229.20:21:00.96#ibcon#read 3, iclass 28, count 0 2006.229.20:21:00.96#ibcon#about to read 4, iclass 28, count 0 2006.229.20:21:00.96#ibcon#read 4, iclass 28, count 0 2006.229.20:21:00.96#ibcon#about to read 5, iclass 28, count 0 2006.229.20:21:00.96#ibcon#read 5, iclass 28, count 0 2006.229.20:21:00.96#ibcon#about to read 6, iclass 28, count 0 2006.229.20:21:00.96#ibcon#read 6, iclass 28, count 0 2006.229.20:21:00.96#ibcon#end of sib2, iclass 28, count 0 2006.229.20:21:00.96#ibcon#*mode == 0, iclass 28, count 0 2006.229.20:21:00.96#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.20:21:00.96#ibcon#[25=USB\r\n] 2006.229.20:21:00.96#ibcon#*before write, iclass 28, count 0 2006.229.20:21:00.96#ibcon#enter sib2, iclass 28, count 0 2006.229.20:21:00.96#ibcon#flushed, iclass 28, count 0 2006.229.20:21:00.96#ibcon#about to write, iclass 28, count 0 2006.229.20:21:00.96#ibcon#wrote, iclass 28, count 0 2006.229.20:21:00.96#ibcon#about to read 3, iclass 28, count 0 2006.229.20:21:00.99#ibcon#read 3, iclass 28, count 0 2006.229.20:21:00.99#ibcon#about to read 4, iclass 28, count 0 2006.229.20:21:00.99#ibcon#read 4, iclass 28, count 0 2006.229.20:21:00.99#ibcon#about to read 5, iclass 28, count 0 2006.229.20:21:00.99#ibcon#read 5, iclass 28, count 0 2006.229.20:21:00.99#ibcon#about to read 6, iclass 28, count 0 2006.229.20:21:00.99#ibcon#read 6, iclass 28, count 0 2006.229.20:21:00.99#ibcon#end of sib2, iclass 28, count 0 2006.229.20:21:00.99#ibcon#*after write, iclass 28, count 0 2006.229.20:21:00.99#ibcon#*before return 0, iclass 28, count 0 2006.229.20:21:00.99#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:21:00.99#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:21:00.99#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.20:21:00.99#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.20:21:00.99$vck44/vblo=1,629.99 2006.229.20:21:00.99#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.20:21:00.99#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.20:21:00.99#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:00.99#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:21:00.99#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:21:00.99#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:21:00.99#ibcon#enter wrdev, iclass 30, count 0 2006.229.20:21:00.99#ibcon#first serial, iclass 30, count 0 2006.229.20:21:00.99#ibcon#enter sib2, iclass 30, count 0 2006.229.20:21:00.99#ibcon#flushed, iclass 30, count 0 2006.229.20:21:00.99#ibcon#about to write, iclass 30, count 0 2006.229.20:21:00.99#ibcon#wrote, iclass 30, count 0 2006.229.20:21:00.99#ibcon#about to read 3, iclass 30, count 0 2006.229.20:21:01.01#ibcon#read 3, iclass 30, count 0 2006.229.20:21:01.01#ibcon#about to read 4, iclass 30, count 0 2006.229.20:21:01.01#ibcon#read 4, iclass 30, count 0 2006.229.20:21:01.01#ibcon#about to read 5, iclass 30, count 0 2006.229.20:21:01.01#ibcon#read 5, iclass 30, count 0 2006.229.20:21:01.01#ibcon#about to read 6, iclass 30, count 0 2006.229.20:21:01.01#ibcon#read 6, iclass 30, count 0 2006.229.20:21:01.01#ibcon#end of sib2, iclass 30, count 0 2006.229.20:21:01.01#ibcon#*mode == 0, iclass 30, count 0 2006.229.20:21:01.01#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.20:21:01.01#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:21:01.01#ibcon#*before write, iclass 30, count 0 2006.229.20:21:01.01#ibcon#enter sib2, iclass 30, count 0 2006.229.20:21:01.01#ibcon#flushed, iclass 30, count 0 2006.229.20:21:01.01#ibcon#about to write, iclass 30, count 0 2006.229.20:21:01.01#ibcon#wrote, iclass 30, count 0 2006.229.20:21:01.01#ibcon#about to read 3, iclass 30, count 0 2006.229.20:21:01.05#ibcon#read 3, iclass 30, count 0 2006.229.20:21:01.05#ibcon#about to read 4, iclass 30, count 0 2006.229.20:21:01.05#ibcon#read 4, iclass 30, count 0 2006.229.20:21:01.05#ibcon#about to read 5, iclass 30, count 0 2006.229.20:21:01.05#ibcon#read 5, iclass 30, count 0 2006.229.20:21:01.05#ibcon#about to read 6, iclass 30, count 0 2006.229.20:21:01.05#ibcon#read 6, iclass 30, count 0 2006.229.20:21:01.05#ibcon#end of sib2, iclass 30, count 0 2006.229.20:21:01.05#ibcon#*after write, iclass 30, count 0 2006.229.20:21:01.05#ibcon#*before return 0, iclass 30, count 0 2006.229.20:21:01.05#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:21:01.05#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:21:01.05#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.20:21:01.05#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.20:21:01.05$vck44/vb=1,4 2006.229.20:21:01.05#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.20:21:01.05#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.20:21:01.05#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:01.05#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:21:01.05#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:21:01.05#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:21:01.05#ibcon#enter wrdev, iclass 32, count 2 2006.229.20:21:01.05#ibcon#first serial, iclass 32, count 2 2006.229.20:21:01.05#ibcon#enter sib2, iclass 32, count 2 2006.229.20:21:01.05#ibcon#flushed, iclass 32, count 2 2006.229.20:21:01.05#ibcon#about to write, iclass 32, count 2 2006.229.20:21:01.05#ibcon#wrote, iclass 32, count 2 2006.229.20:21:01.05#ibcon#about to read 3, iclass 32, count 2 2006.229.20:21:01.07#ibcon#read 3, iclass 32, count 2 2006.229.20:21:01.07#ibcon#about to read 4, iclass 32, count 2 2006.229.20:21:01.07#ibcon#read 4, iclass 32, count 2 2006.229.20:21:01.07#ibcon#about to read 5, iclass 32, count 2 2006.229.20:21:01.07#ibcon#read 5, iclass 32, count 2 2006.229.20:21:01.07#ibcon#about to read 6, iclass 32, count 2 2006.229.20:21:01.07#ibcon#read 6, iclass 32, count 2 2006.229.20:21:01.07#ibcon#end of sib2, iclass 32, count 2 2006.229.20:21:01.07#ibcon#*mode == 0, iclass 32, count 2 2006.229.20:21:01.07#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.20:21:01.07#ibcon#[27=AT01-04\r\n] 2006.229.20:21:01.07#ibcon#*before write, iclass 32, count 2 2006.229.20:21:01.07#ibcon#enter sib2, iclass 32, count 2 2006.229.20:21:01.07#ibcon#flushed, iclass 32, count 2 2006.229.20:21:01.07#ibcon#about to write, iclass 32, count 2 2006.229.20:21:01.07#ibcon#wrote, iclass 32, count 2 2006.229.20:21:01.07#ibcon#about to read 3, iclass 32, count 2 2006.229.20:21:01.10#ibcon#read 3, iclass 32, count 2 2006.229.20:21:01.10#ibcon#about to read 4, iclass 32, count 2 2006.229.20:21:01.10#ibcon#read 4, iclass 32, count 2 2006.229.20:21:01.10#ibcon#about to read 5, iclass 32, count 2 2006.229.20:21:01.10#ibcon#read 5, iclass 32, count 2 2006.229.20:21:01.10#ibcon#about to read 6, iclass 32, count 2 2006.229.20:21:01.10#ibcon#read 6, iclass 32, count 2 2006.229.20:21:01.10#ibcon#end of sib2, iclass 32, count 2 2006.229.20:21:01.10#ibcon#*after write, iclass 32, count 2 2006.229.20:21:01.10#ibcon#*before return 0, iclass 32, count 2 2006.229.20:21:01.10#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:21:01.10#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:21:01.10#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.20:21:01.10#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:01.10#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:21:01.22#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:21:01.22#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:21:01.22#ibcon#enter wrdev, iclass 32, count 0 2006.229.20:21:01.22#ibcon#first serial, iclass 32, count 0 2006.229.20:21:01.22#ibcon#enter sib2, iclass 32, count 0 2006.229.20:21:01.22#ibcon#flushed, iclass 32, count 0 2006.229.20:21:01.22#ibcon#about to write, iclass 32, count 0 2006.229.20:21:01.22#ibcon#wrote, iclass 32, count 0 2006.229.20:21:01.22#ibcon#about to read 3, iclass 32, count 0 2006.229.20:21:01.24#ibcon#read 3, iclass 32, count 0 2006.229.20:21:01.24#ibcon#about to read 4, iclass 32, count 0 2006.229.20:21:01.24#ibcon#read 4, iclass 32, count 0 2006.229.20:21:01.24#ibcon#about to read 5, iclass 32, count 0 2006.229.20:21:01.24#ibcon#read 5, iclass 32, count 0 2006.229.20:21:01.24#ibcon#about to read 6, iclass 32, count 0 2006.229.20:21:01.24#ibcon#read 6, iclass 32, count 0 2006.229.20:21:01.24#ibcon#end of sib2, iclass 32, count 0 2006.229.20:21:01.24#ibcon#*mode == 0, iclass 32, count 0 2006.229.20:21:01.24#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.20:21:01.24#ibcon#[27=USB\r\n] 2006.229.20:21:01.24#ibcon#*before write, iclass 32, count 0 2006.229.20:21:01.24#ibcon#enter sib2, iclass 32, count 0 2006.229.20:21:01.24#ibcon#flushed, iclass 32, count 0 2006.229.20:21:01.24#ibcon#about to write, iclass 32, count 0 2006.229.20:21:01.24#ibcon#wrote, iclass 32, count 0 2006.229.20:21:01.24#ibcon#about to read 3, iclass 32, count 0 2006.229.20:21:01.27#ibcon#read 3, iclass 32, count 0 2006.229.20:21:01.27#ibcon#about to read 4, iclass 32, count 0 2006.229.20:21:01.27#ibcon#read 4, iclass 32, count 0 2006.229.20:21:01.27#ibcon#about to read 5, iclass 32, count 0 2006.229.20:21:01.27#ibcon#read 5, iclass 32, count 0 2006.229.20:21:01.27#ibcon#about to read 6, iclass 32, count 0 2006.229.20:21:01.27#ibcon#read 6, iclass 32, count 0 2006.229.20:21:01.27#ibcon#end of sib2, iclass 32, count 0 2006.229.20:21:01.27#ibcon#*after write, iclass 32, count 0 2006.229.20:21:01.27#ibcon#*before return 0, iclass 32, count 0 2006.229.20:21:01.27#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:21:01.27#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:21:01.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.20:21:01.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.20:21:01.27$vck44/vblo=2,634.99 2006.229.20:21:01.27#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.20:21:01.27#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.20:21:01.27#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:01.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:21:01.27#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:21:01.27#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:21:01.27#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:21:01.27#ibcon#first serial, iclass 34, count 0 2006.229.20:21:01.27#ibcon#enter sib2, iclass 34, count 0 2006.229.20:21:01.27#ibcon#flushed, iclass 34, count 0 2006.229.20:21:01.27#ibcon#about to write, iclass 34, count 0 2006.229.20:21:01.27#ibcon#wrote, iclass 34, count 0 2006.229.20:21:01.27#ibcon#about to read 3, iclass 34, count 0 2006.229.20:21:01.29#ibcon#read 3, iclass 34, count 0 2006.229.20:21:01.29#ibcon#about to read 4, iclass 34, count 0 2006.229.20:21:01.29#ibcon#read 4, iclass 34, count 0 2006.229.20:21:01.29#ibcon#about to read 5, iclass 34, count 0 2006.229.20:21:01.29#ibcon#read 5, iclass 34, count 0 2006.229.20:21:01.29#ibcon#about to read 6, iclass 34, count 0 2006.229.20:21:01.29#ibcon#read 6, iclass 34, count 0 2006.229.20:21:01.29#ibcon#end of sib2, iclass 34, count 0 2006.229.20:21:01.29#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:21:01.29#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:21:01.29#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:21:01.29#ibcon#*before write, iclass 34, count 0 2006.229.20:21:01.29#ibcon#enter sib2, iclass 34, count 0 2006.229.20:21:01.29#ibcon#flushed, iclass 34, count 0 2006.229.20:21:01.29#ibcon#about to write, iclass 34, count 0 2006.229.20:21:01.29#ibcon#wrote, iclass 34, count 0 2006.229.20:21:01.29#ibcon#about to read 3, iclass 34, count 0 2006.229.20:21:01.33#ibcon#read 3, iclass 34, count 0 2006.229.20:21:01.33#ibcon#about to read 4, iclass 34, count 0 2006.229.20:21:01.33#ibcon#read 4, iclass 34, count 0 2006.229.20:21:01.33#ibcon#about to read 5, iclass 34, count 0 2006.229.20:21:01.33#ibcon#read 5, iclass 34, count 0 2006.229.20:21:01.33#ibcon#about to read 6, iclass 34, count 0 2006.229.20:21:01.33#ibcon#read 6, iclass 34, count 0 2006.229.20:21:01.33#ibcon#end of sib2, iclass 34, count 0 2006.229.20:21:01.33#ibcon#*after write, iclass 34, count 0 2006.229.20:21:01.33#ibcon#*before return 0, iclass 34, count 0 2006.229.20:21:01.33#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:21:01.33#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:21:01.33#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:21:01.33#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:21:01.33$vck44/vb=2,4 2006.229.20:21:01.33#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.20:21:01.33#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.20:21:01.33#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:01.33#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:21:01.39#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:21:01.39#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:21:01.39#ibcon#enter wrdev, iclass 36, count 2 2006.229.20:21:01.39#ibcon#first serial, iclass 36, count 2 2006.229.20:21:01.39#ibcon#enter sib2, iclass 36, count 2 2006.229.20:21:01.39#ibcon#flushed, iclass 36, count 2 2006.229.20:21:01.39#ibcon#about to write, iclass 36, count 2 2006.229.20:21:01.39#ibcon#wrote, iclass 36, count 2 2006.229.20:21:01.39#ibcon#about to read 3, iclass 36, count 2 2006.229.20:21:01.41#ibcon#read 3, iclass 36, count 2 2006.229.20:21:01.41#ibcon#about to read 4, iclass 36, count 2 2006.229.20:21:01.41#ibcon#read 4, iclass 36, count 2 2006.229.20:21:01.41#ibcon#about to read 5, iclass 36, count 2 2006.229.20:21:01.41#ibcon#read 5, iclass 36, count 2 2006.229.20:21:01.41#ibcon#about to read 6, iclass 36, count 2 2006.229.20:21:01.41#ibcon#read 6, iclass 36, count 2 2006.229.20:21:01.41#ibcon#end of sib2, iclass 36, count 2 2006.229.20:21:01.41#ibcon#*mode == 0, iclass 36, count 2 2006.229.20:21:01.41#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.20:21:01.41#ibcon#[27=AT02-04\r\n] 2006.229.20:21:01.41#ibcon#*before write, iclass 36, count 2 2006.229.20:21:01.41#ibcon#enter sib2, iclass 36, count 2 2006.229.20:21:01.41#ibcon#flushed, iclass 36, count 2 2006.229.20:21:01.41#ibcon#about to write, iclass 36, count 2 2006.229.20:21:01.41#ibcon#wrote, iclass 36, count 2 2006.229.20:21:01.41#ibcon#about to read 3, iclass 36, count 2 2006.229.20:21:01.44#ibcon#read 3, iclass 36, count 2 2006.229.20:21:01.44#ibcon#about to read 4, iclass 36, count 2 2006.229.20:21:01.44#ibcon#read 4, iclass 36, count 2 2006.229.20:21:01.44#ibcon#about to read 5, iclass 36, count 2 2006.229.20:21:01.44#ibcon#read 5, iclass 36, count 2 2006.229.20:21:01.44#ibcon#about to read 6, iclass 36, count 2 2006.229.20:21:01.44#ibcon#read 6, iclass 36, count 2 2006.229.20:21:01.44#ibcon#end of sib2, iclass 36, count 2 2006.229.20:21:01.44#ibcon#*after write, iclass 36, count 2 2006.229.20:21:01.44#ibcon#*before return 0, iclass 36, count 2 2006.229.20:21:01.44#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:21:01.44#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:21:01.44#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.20:21:01.44#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:01.44#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:21:01.56#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:21:01.56#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:21:01.56#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:21:01.56#ibcon#first serial, iclass 36, count 0 2006.229.20:21:01.56#ibcon#enter sib2, iclass 36, count 0 2006.229.20:21:01.56#ibcon#flushed, iclass 36, count 0 2006.229.20:21:01.56#ibcon#about to write, iclass 36, count 0 2006.229.20:21:01.56#ibcon#wrote, iclass 36, count 0 2006.229.20:21:01.56#ibcon#about to read 3, iclass 36, count 0 2006.229.20:21:01.58#ibcon#read 3, iclass 36, count 0 2006.229.20:21:01.58#ibcon#about to read 4, iclass 36, count 0 2006.229.20:21:01.58#ibcon#read 4, iclass 36, count 0 2006.229.20:21:01.58#ibcon#about to read 5, iclass 36, count 0 2006.229.20:21:01.58#ibcon#read 5, iclass 36, count 0 2006.229.20:21:01.58#ibcon#about to read 6, iclass 36, count 0 2006.229.20:21:01.58#ibcon#read 6, iclass 36, count 0 2006.229.20:21:01.58#ibcon#end of sib2, iclass 36, count 0 2006.229.20:21:01.58#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:21:01.58#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:21:01.58#ibcon#[27=USB\r\n] 2006.229.20:21:01.58#ibcon#*before write, iclass 36, count 0 2006.229.20:21:01.58#ibcon#enter sib2, iclass 36, count 0 2006.229.20:21:01.58#ibcon#flushed, iclass 36, count 0 2006.229.20:21:01.58#ibcon#about to write, iclass 36, count 0 2006.229.20:21:01.58#ibcon#wrote, iclass 36, count 0 2006.229.20:21:01.58#ibcon#about to read 3, iclass 36, count 0 2006.229.20:21:01.61#ibcon#read 3, iclass 36, count 0 2006.229.20:21:01.61#ibcon#about to read 4, iclass 36, count 0 2006.229.20:21:01.61#ibcon#read 4, iclass 36, count 0 2006.229.20:21:01.61#ibcon#about to read 5, iclass 36, count 0 2006.229.20:21:01.61#ibcon#read 5, iclass 36, count 0 2006.229.20:21:01.61#ibcon#about to read 6, iclass 36, count 0 2006.229.20:21:01.61#ibcon#read 6, iclass 36, count 0 2006.229.20:21:01.61#ibcon#end of sib2, iclass 36, count 0 2006.229.20:21:01.61#ibcon#*after write, iclass 36, count 0 2006.229.20:21:01.61#ibcon#*before return 0, iclass 36, count 0 2006.229.20:21:01.61#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:21:01.61#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:21:01.61#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:21:01.61#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:21:01.61$vck44/vblo=3,649.99 2006.229.20:21:01.61#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.20:21:01.61#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.20:21:01.61#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:01.61#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:21:01.61#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:21:01.61#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:21:01.61#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:21:01.61#ibcon#first serial, iclass 38, count 0 2006.229.20:21:01.61#ibcon#enter sib2, iclass 38, count 0 2006.229.20:21:01.61#ibcon#flushed, iclass 38, count 0 2006.229.20:21:01.61#ibcon#about to write, iclass 38, count 0 2006.229.20:21:01.61#ibcon#wrote, iclass 38, count 0 2006.229.20:21:01.61#ibcon#about to read 3, iclass 38, count 0 2006.229.20:21:01.63#ibcon#read 3, iclass 38, count 0 2006.229.20:21:01.63#ibcon#about to read 4, iclass 38, count 0 2006.229.20:21:01.63#ibcon#read 4, iclass 38, count 0 2006.229.20:21:01.63#ibcon#about to read 5, iclass 38, count 0 2006.229.20:21:01.63#ibcon#read 5, iclass 38, count 0 2006.229.20:21:01.63#ibcon#about to read 6, iclass 38, count 0 2006.229.20:21:01.63#ibcon#read 6, iclass 38, count 0 2006.229.20:21:01.63#ibcon#end of sib2, iclass 38, count 0 2006.229.20:21:01.63#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:21:01.63#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:21:01.63#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:21:01.63#ibcon#*before write, iclass 38, count 0 2006.229.20:21:01.63#ibcon#enter sib2, iclass 38, count 0 2006.229.20:21:01.63#ibcon#flushed, iclass 38, count 0 2006.229.20:21:01.63#ibcon#about to write, iclass 38, count 0 2006.229.20:21:01.63#ibcon#wrote, iclass 38, count 0 2006.229.20:21:01.63#ibcon#about to read 3, iclass 38, count 0 2006.229.20:21:01.67#ibcon#read 3, iclass 38, count 0 2006.229.20:21:01.67#ibcon#about to read 4, iclass 38, count 0 2006.229.20:21:01.67#ibcon#read 4, iclass 38, count 0 2006.229.20:21:01.67#ibcon#about to read 5, iclass 38, count 0 2006.229.20:21:01.67#ibcon#read 5, iclass 38, count 0 2006.229.20:21:01.67#ibcon#about to read 6, iclass 38, count 0 2006.229.20:21:01.67#ibcon#read 6, iclass 38, count 0 2006.229.20:21:01.67#ibcon#end of sib2, iclass 38, count 0 2006.229.20:21:01.67#ibcon#*after write, iclass 38, count 0 2006.229.20:21:01.67#ibcon#*before return 0, iclass 38, count 0 2006.229.20:21:01.67#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:21:01.67#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:21:01.67#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:21:01.67#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:21:01.67$vck44/vb=3,4 2006.229.20:21:01.67#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.20:21:01.67#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.20:21:01.67#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:01.67#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:21:01.73#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:21:01.73#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:21:01.73#ibcon#enter wrdev, iclass 40, count 2 2006.229.20:21:01.73#ibcon#first serial, iclass 40, count 2 2006.229.20:21:01.73#ibcon#enter sib2, iclass 40, count 2 2006.229.20:21:01.73#ibcon#flushed, iclass 40, count 2 2006.229.20:21:01.73#ibcon#about to write, iclass 40, count 2 2006.229.20:21:01.73#ibcon#wrote, iclass 40, count 2 2006.229.20:21:01.73#ibcon#about to read 3, iclass 40, count 2 2006.229.20:21:01.75#ibcon#read 3, iclass 40, count 2 2006.229.20:21:01.75#ibcon#about to read 4, iclass 40, count 2 2006.229.20:21:01.75#ibcon#read 4, iclass 40, count 2 2006.229.20:21:01.75#ibcon#about to read 5, iclass 40, count 2 2006.229.20:21:01.75#ibcon#read 5, iclass 40, count 2 2006.229.20:21:01.75#ibcon#about to read 6, iclass 40, count 2 2006.229.20:21:01.75#ibcon#read 6, iclass 40, count 2 2006.229.20:21:01.75#ibcon#end of sib2, iclass 40, count 2 2006.229.20:21:01.75#ibcon#*mode == 0, iclass 40, count 2 2006.229.20:21:01.75#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.20:21:01.75#ibcon#[27=AT03-04\r\n] 2006.229.20:21:01.75#ibcon#*before write, iclass 40, count 2 2006.229.20:21:01.75#ibcon#enter sib2, iclass 40, count 2 2006.229.20:21:01.75#ibcon#flushed, iclass 40, count 2 2006.229.20:21:01.75#ibcon#about to write, iclass 40, count 2 2006.229.20:21:01.75#ibcon#wrote, iclass 40, count 2 2006.229.20:21:01.75#ibcon#about to read 3, iclass 40, count 2 2006.229.20:21:01.78#ibcon#read 3, iclass 40, count 2 2006.229.20:21:01.78#ibcon#about to read 4, iclass 40, count 2 2006.229.20:21:01.78#ibcon#read 4, iclass 40, count 2 2006.229.20:21:01.78#ibcon#about to read 5, iclass 40, count 2 2006.229.20:21:01.78#ibcon#read 5, iclass 40, count 2 2006.229.20:21:01.78#ibcon#about to read 6, iclass 40, count 2 2006.229.20:21:01.78#ibcon#read 6, iclass 40, count 2 2006.229.20:21:01.78#ibcon#end of sib2, iclass 40, count 2 2006.229.20:21:01.78#ibcon#*after write, iclass 40, count 2 2006.229.20:21:01.78#ibcon#*before return 0, iclass 40, count 2 2006.229.20:21:01.78#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:21:01.78#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:21:01.78#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.20:21:01.78#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:01.78#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:21:01.90#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:21:01.90#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:21:01.90#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:21:01.90#ibcon#first serial, iclass 40, count 0 2006.229.20:21:01.90#ibcon#enter sib2, iclass 40, count 0 2006.229.20:21:01.90#ibcon#flushed, iclass 40, count 0 2006.229.20:21:01.90#ibcon#about to write, iclass 40, count 0 2006.229.20:21:01.90#ibcon#wrote, iclass 40, count 0 2006.229.20:21:01.90#ibcon#about to read 3, iclass 40, count 0 2006.229.20:21:01.92#ibcon#read 3, iclass 40, count 0 2006.229.20:21:01.92#ibcon#about to read 4, iclass 40, count 0 2006.229.20:21:01.92#ibcon#read 4, iclass 40, count 0 2006.229.20:21:01.92#ibcon#about to read 5, iclass 40, count 0 2006.229.20:21:01.92#ibcon#read 5, iclass 40, count 0 2006.229.20:21:01.92#ibcon#about to read 6, iclass 40, count 0 2006.229.20:21:01.92#ibcon#read 6, iclass 40, count 0 2006.229.20:21:01.92#ibcon#end of sib2, iclass 40, count 0 2006.229.20:21:01.92#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:21:01.92#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:21:01.92#ibcon#[27=USB\r\n] 2006.229.20:21:01.92#ibcon#*before write, iclass 40, count 0 2006.229.20:21:01.92#ibcon#enter sib2, iclass 40, count 0 2006.229.20:21:01.92#ibcon#flushed, iclass 40, count 0 2006.229.20:21:01.92#ibcon#about to write, iclass 40, count 0 2006.229.20:21:01.92#ibcon#wrote, iclass 40, count 0 2006.229.20:21:01.92#ibcon#about to read 3, iclass 40, count 0 2006.229.20:21:01.95#ibcon#read 3, iclass 40, count 0 2006.229.20:21:01.95#ibcon#about to read 4, iclass 40, count 0 2006.229.20:21:01.95#ibcon#read 4, iclass 40, count 0 2006.229.20:21:01.95#ibcon#about to read 5, iclass 40, count 0 2006.229.20:21:01.95#ibcon#read 5, iclass 40, count 0 2006.229.20:21:01.95#ibcon#about to read 6, iclass 40, count 0 2006.229.20:21:01.95#ibcon#read 6, iclass 40, count 0 2006.229.20:21:01.95#ibcon#end of sib2, iclass 40, count 0 2006.229.20:21:01.95#ibcon#*after write, iclass 40, count 0 2006.229.20:21:01.95#ibcon#*before return 0, iclass 40, count 0 2006.229.20:21:01.95#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:21:01.95#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:21:01.95#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:21:01.95#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:21:01.95$vck44/vblo=4,679.99 2006.229.20:21:01.95#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.20:21:01.95#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.20:21:01.95#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:01.95#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:21:01.95#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:21:01.95#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:21:01.95#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:21:01.95#ibcon#first serial, iclass 4, count 0 2006.229.20:21:01.95#ibcon#enter sib2, iclass 4, count 0 2006.229.20:21:01.95#ibcon#flushed, iclass 4, count 0 2006.229.20:21:01.95#ibcon#about to write, iclass 4, count 0 2006.229.20:21:01.95#ibcon#wrote, iclass 4, count 0 2006.229.20:21:01.95#ibcon#about to read 3, iclass 4, count 0 2006.229.20:21:01.97#ibcon#read 3, iclass 4, count 0 2006.229.20:21:01.97#ibcon#about to read 4, iclass 4, count 0 2006.229.20:21:01.97#ibcon#read 4, iclass 4, count 0 2006.229.20:21:01.97#ibcon#about to read 5, iclass 4, count 0 2006.229.20:21:01.97#ibcon#read 5, iclass 4, count 0 2006.229.20:21:01.97#ibcon#about to read 6, iclass 4, count 0 2006.229.20:21:01.97#ibcon#read 6, iclass 4, count 0 2006.229.20:21:01.97#ibcon#end of sib2, iclass 4, count 0 2006.229.20:21:01.97#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:21:01.97#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:21:01.97#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:21:01.97#ibcon#*before write, iclass 4, count 0 2006.229.20:21:01.97#ibcon#enter sib2, iclass 4, count 0 2006.229.20:21:01.97#ibcon#flushed, iclass 4, count 0 2006.229.20:21:01.97#ibcon#about to write, iclass 4, count 0 2006.229.20:21:01.97#ibcon#wrote, iclass 4, count 0 2006.229.20:21:01.97#ibcon#about to read 3, iclass 4, count 0 2006.229.20:21:02.01#ibcon#read 3, iclass 4, count 0 2006.229.20:21:02.01#ibcon#about to read 4, iclass 4, count 0 2006.229.20:21:02.01#ibcon#read 4, iclass 4, count 0 2006.229.20:21:02.01#ibcon#about to read 5, iclass 4, count 0 2006.229.20:21:02.01#ibcon#read 5, iclass 4, count 0 2006.229.20:21:02.01#ibcon#about to read 6, iclass 4, count 0 2006.229.20:21:02.01#ibcon#read 6, iclass 4, count 0 2006.229.20:21:02.01#ibcon#end of sib2, iclass 4, count 0 2006.229.20:21:02.01#ibcon#*after write, iclass 4, count 0 2006.229.20:21:02.01#ibcon#*before return 0, iclass 4, count 0 2006.229.20:21:02.01#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:21:02.01#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:21:02.01#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:21:02.01#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:21:02.01$vck44/vb=4,4 2006.229.20:21:02.01#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.20:21:02.01#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.20:21:02.01#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:02.01#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:21:02.07#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:21:02.07#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:21:02.07#ibcon#enter wrdev, iclass 6, count 2 2006.229.20:21:02.07#ibcon#first serial, iclass 6, count 2 2006.229.20:21:02.07#ibcon#enter sib2, iclass 6, count 2 2006.229.20:21:02.07#ibcon#flushed, iclass 6, count 2 2006.229.20:21:02.07#ibcon#about to write, iclass 6, count 2 2006.229.20:21:02.07#ibcon#wrote, iclass 6, count 2 2006.229.20:21:02.07#ibcon#about to read 3, iclass 6, count 2 2006.229.20:21:02.09#ibcon#read 3, iclass 6, count 2 2006.229.20:21:02.09#ibcon#about to read 4, iclass 6, count 2 2006.229.20:21:02.09#ibcon#read 4, iclass 6, count 2 2006.229.20:21:02.09#ibcon#about to read 5, iclass 6, count 2 2006.229.20:21:02.09#ibcon#read 5, iclass 6, count 2 2006.229.20:21:02.09#ibcon#about to read 6, iclass 6, count 2 2006.229.20:21:02.09#ibcon#read 6, iclass 6, count 2 2006.229.20:21:02.09#ibcon#end of sib2, iclass 6, count 2 2006.229.20:21:02.09#ibcon#*mode == 0, iclass 6, count 2 2006.229.20:21:02.09#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.20:21:02.09#ibcon#[27=AT04-04\r\n] 2006.229.20:21:02.09#ibcon#*before write, iclass 6, count 2 2006.229.20:21:02.09#ibcon#enter sib2, iclass 6, count 2 2006.229.20:21:02.09#ibcon#flushed, iclass 6, count 2 2006.229.20:21:02.09#ibcon#about to write, iclass 6, count 2 2006.229.20:21:02.09#ibcon#wrote, iclass 6, count 2 2006.229.20:21:02.09#ibcon#about to read 3, iclass 6, count 2 2006.229.20:21:02.12#ibcon#read 3, iclass 6, count 2 2006.229.20:21:02.12#ibcon#about to read 4, iclass 6, count 2 2006.229.20:21:02.12#ibcon#read 4, iclass 6, count 2 2006.229.20:21:02.12#ibcon#about to read 5, iclass 6, count 2 2006.229.20:21:02.12#ibcon#read 5, iclass 6, count 2 2006.229.20:21:02.12#ibcon#about to read 6, iclass 6, count 2 2006.229.20:21:02.12#ibcon#read 6, iclass 6, count 2 2006.229.20:21:02.12#ibcon#end of sib2, iclass 6, count 2 2006.229.20:21:02.12#ibcon#*after write, iclass 6, count 2 2006.229.20:21:02.12#ibcon#*before return 0, iclass 6, count 2 2006.229.20:21:02.12#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:21:02.12#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:21:02.12#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.20:21:02.12#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:02.12#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:21:02.24#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:21:02.24#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:21:02.24#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:21:02.24#ibcon#first serial, iclass 6, count 0 2006.229.20:21:02.24#ibcon#enter sib2, iclass 6, count 0 2006.229.20:21:02.24#ibcon#flushed, iclass 6, count 0 2006.229.20:21:02.24#ibcon#about to write, iclass 6, count 0 2006.229.20:21:02.24#ibcon#wrote, iclass 6, count 0 2006.229.20:21:02.24#ibcon#about to read 3, iclass 6, count 0 2006.229.20:21:02.26#ibcon#read 3, iclass 6, count 0 2006.229.20:21:02.26#ibcon#about to read 4, iclass 6, count 0 2006.229.20:21:02.26#ibcon#read 4, iclass 6, count 0 2006.229.20:21:02.26#ibcon#about to read 5, iclass 6, count 0 2006.229.20:21:02.26#ibcon#read 5, iclass 6, count 0 2006.229.20:21:02.26#ibcon#about to read 6, iclass 6, count 0 2006.229.20:21:02.26#ibcon#read 6, iclass 6, count 0 2006.229.20:21:02.26#ibcon#end of sib2, iclass 6, count 0 2006.229.20:21:02.26#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:21:02.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:21:02.26#ibcon#[27=USB\r\n] 2006.229.20:21:02.26#ibcon#*before write, iclass 6, count 0 2006.229.20:21:02.26#ibcon#enter sib2, iclass 6, count 0 2006.229.20:21:02.26#ibcon#flushed, iclass 6, count 0 2006.229.20:21:02.26#ibcon#about to write, iclass 6, count 0 2006.229.20:21:02.26#ibcon#wrote, iclass 6, count 0 2006.229.20:21:02.26#ibcon#about to read 3, iclass 6, count 0 2006.229.20:21:02.29#ibcon#read 3, iclass 6, count 0 2006.229.20:21:02.29#ibcon#about to read 4, iclass 6, count 0 2006.229.20:21:02.29#ibcon#read 4, iclass 6, count 0 2006.229.20:21:02.29#ibcon#about to read 5, iclass 6, count 0 2006.229.20:21:02.29#ibcon#read 5, iclass 6, count 0 2006.229.20:21:02.29#ibcon#about to read 6, iclass 6, count 0 2006.229.20:21:02.29#ibcon#read 6, iclass 6, count 0 2006.229.20:21:02.29#ibcon#end of sib2, iclass 6, count 0 2006.229.20:21:02.29#ibcon#*after write, iclass 6, count 0 2006.229.20:21:02.29#ibcon#*before return 0, iclass 6, count 0 2006.229.20:21:02.29#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:21:02.29#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:21:02.29#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:21:02.29#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:21:02.29$vck44/vblo=5,709.99 2006.229.20:21:02.29#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.20:21:02.29#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.20:21:02.29#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:02.29#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:21:02.29#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:21:02.29#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:21:02.29#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:21:02.29#ibcon#first serial, iclass 10, count 0 2006.229.20:21:02.29#ibcon#enter sib2, iclass 10, count 0 2006.229.20:21:02.29#ibcon#flushed, iclass 10, count 0 2006.229.20:21:02.29#ibcon#about to write, iclass 10, count 0 2006.229.20:21:02.29#ibcon#wrote, iclass 10, count 0 2006.229.20:21:02.29#ibcon#about to read 3, iclass 10, count 0 2006.229.20:21:02.31#ibcon#read 3, iclass 10, count 0 2006.229.20:21:02.31#ibcon#about to read 4, iclass 10, count 0 2006.229.20:21:02.31#ibcon#read 4, iclass 10, count 0 2006.229.20:21:02.31#ibcon#about to read 5, iclass 10, count 0 2006.229.20:21:02.31#ibcon#read 5, iclass 10, count 0 2006.229.20:21:02.31#ibcon#about to read 6, iclass 10, count 0 2006.229.20:21:02.31#ibcon#read 6, iclass 10, count 0 2006.229.20:21:02.31#ibcon#end of sib2, iclass 10, count 0 2006.229.20:21:02.31#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:21:02.31#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:21:02.31#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:21:02.31#ibcon#*before write, iclass 10, count 0 2006.229.20:21:02.31#ibcon#enter sib2, iclass 10, count 0 2006.229.20:21:02.31#ibcon#flushed, iclass 10, count 0 2006.229.20:21:02.31#ibcon#about to write, iclass 10, count 0 2006.229.20:21:02.31#ibcon#wrote, iclass 10, count 0 2006.229.20:21:02.31#ibcon#about to read 3, iclass 10, count 0 2006.229.20:21:02.35#ibcon#read 3, iclass 10, count 0 2006.229.20:21:02.35#ibcon#about to read 4, iclass 10, count 0 2006.229.20:21:02.35#ibcon#read 4, iclass 10, count 0 2006.229.20:21:02.35#ibcon#about to read 5, iclass 10, count 0 2006.229.20:21:02.35#ibcon#read 5, iclass 10, count 0 2006.229.20:21:02.35#ibcon#about to read 6, iclass 10, count 0 2006.229.20:21:02.35#ibcon#read 6, iclass 10, count 0 2006.229.20:21:02.35#ibcon#end of sib2, iclass 10, count 0 2006.229.20:21:02.35#ibcon#*after write, iclass 10, count 0 2006.229.20:21:02.35#ibcon#*before return 0, iclass 10, count 0 2006.229.20:21:02.35#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:21:02.35#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:21:02.35#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:21:02.35#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:21:02.35$vck44/vb=5,4 2006.229.20:21:02.35#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.20:21:02.35#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.20:21:02.35#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:02.35#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:21:02.41#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:21:02.41#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:21:02.41#ibcon#enter wrdev, iclass 12, count 2 2006.229.20:21:02.41#ibcon#first serial, iclass 12, count 2 2006.229.20:21:02.41#ibcon#enter sib2, iclass 12, count 2 2006.229.20:21:02.41#ibcon#flushed, iclass 12, count 2 2006.229.20:21:02.41#ibcon#about to write, iclass 12, count 2 2006.229.20:21:02.41#ibcon#wrote, iclass 12, count 2 2006.229.20:21:02.41#ibcon#about to read 3, iclass 12, count 2 2006.229.20:21:02.43#ibcon#read 3, iclass 12, count 2 2006.229.20:21:02.43#ibcon#about to read 4, iclass 12, count 2 2006.229.20:21:02.43#ibcon#read 4, iclass 12, count 2 2006.229.20:21:02.43#ibcon#about to read 5, iclass 12, count 2 2006.229.20:21:02.43#ibcon#read 5, iclass 12, count 2 2006.229.20:21:02.43#ibcon#about to read 6, iclass 12, count 2 2006.229.20:21:02.43#ibcon#read 6, iclass 12, count 2 2006.229.20:21:02.43#ibcon#end of sib2, iclass 12, count 2 2006.229.20:21:02.43#ibcon#*mode == 0, iclass 12, count 2 2006.229.20:21:02.43#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.20:21:02.43#ibcon#[27=AT05-04\r\n] 2006.229.20:21:02.43#ibcon#*before write, iclass 12, count 2 2006.229.20:21:02.43#ibcon#enter sib2, iclass 12, count 2 2006.229.20:21:02.43#ibcon#flushed, iclass 12, count 2 2006.229.20:21:02.43#ibcon#about to write, iclass 12, count 2 2006.229.20:21:02.43#ibcon#wrote, iclass 12, count 2 2006.229.20:21:02.43#ibcon#about to read 3, iclass 12, count 2 2006.229.20:21:02.46#ibcon#read 3, iclass 12, count 2 2006.229.20:21:02.46#ibcon#about to read 4, iclass 12, count 2 2006.229.20:21:02.46#ibcon#read 4, iclass 12, count 2 2006.229.20:21:02.46#ibcon#about to read 5, iclass 12, count 2 2006.229.20:21:02.46#ibcon#read 5, iclass 12, count 2 2006.229.20:21:02.46#ibcon#about to read 6, iclass 12, count 2 2006.229.20:21:02.46#ibcon#read 6, iclass 12, count 2 2006.229.20:21:02.46#ibcon#end of sib2, iclass 12, count 2 2006.229.20:21:02.46#ibcon#*after write, iclass 12, count 2 2006.229.20:21:02.46#ibcon#*before return 0, iclass 12, count 2 2006.229.20:21:02.46#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:21:02.46#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:21:02.46#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.20:21:02.46#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:02.46#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:21:02.58#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:21:02.58#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:21:02.58#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:21:02.58#ibcon#first serial, iclass 12, count 0 2006.229.20:21:02.58#ibcon#enter sib2, iclass 12, count 0 2006.229.20:21:02.58#ibcon#flushed, iclass 12, count 0 2006.229.20:21:02.58#ibcon#about to write, iclass 12, count 0 2006.229.20:21:02.58#ibcon#wrote, iclass 12, count 0 2006.229.20:21:02.58#ibcon#about to read 3, iclass 12, count 0 2006.229.20:21:02.60#ibcon#read 3, iclass 12, count 0 2006.229.20:21:02.60#ibcon#about to read 4, iclass 12, count 0 2006.229.20:21:02.60#ibcon#read 4, iclass 12, count 0 2006.229.20:21:02.60#ibcon#about to read 5, iclass 12, count 0 2006.229.20:21:02.60#ibcon#read 5, iclass 12, count 0 2006.229.20:21:02.60#ibcon#about to read 6, iclass 12, count 0 2006.229.20:21:02.60#ibcon#read 6, iclass 12, count 0 2006.229.20:21:02.60#ibcon#end of sib2, iclass 12, count 0 2006.229.20:21:02.60#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:21:02.60#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:21:02.60#ibcon#[27=USB\r\n] 2006.229.20:21:02.60#ibcon#*before write, iclass 12, count 0 2006.229.20:21:02.60#ibcon#enter sib2, iclass 12, count 0 2006.229.20:21:02.60#ibcon#flushed, iclass 12, count 0 2006.229.20:21:02.60#ibcon#about to write, iclass 12, count 0 2006.229.20:21:02.60#ibcon#wrote, iclass 12, count 0 2006.229.20:21:02.60#ibcon#about to read 3, iclass 12, count 0 2006.229.20:21:02.63#ibcon#read 3, iclass 12, count 0 2006.229.20:21:02.63#ibcon#about to read 4, iclass 12, count 0 2006.229.20:21:02.63#ibcon#read 4, iclass 12, count 0 2006.229.20:21:02.63#ibcon#about to read 5, iclass 12, count 0 2006.229.20:21:02.63#ibcon#read 5, iclass 12, count 0 2006.229.20:21:02.63#ibcon#about to read 6, iclass 12, count 0 2006.229.20:21:02.63#ibcon#read 6, iclass 12, count 0 2006.229.20:21:02.63#ibcon#end of sib2, iclass 12, count 0 2006.229.20:21:02.63#ibcon#*after write, iclass 12, count 0 2006.229.20:21:02.63#ibcon#*before return 0, iclass 12, count 0 2006.229.20:21:02.63#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:21:02.63#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:21:02.63#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:21:02.63#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:21:02.63$vck44/vblo=6,719.99 2006.229.20:21:02.63#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.20:21:02.63#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.20:21:02.63#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:02.63#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:21:02.63#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:21:02.63#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:21:02.63#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:21:02.63#ibcon#first serial, iclass 14, count 0 2006.229.20:21:02.63#ibcon#enter sib2, iclass 14, count 0 2006.229.20:21:02.63#ibcon#flushed, iclass 14, count 0 2006.229.20:21:02.63#ibcon#about to write, iclass 14, count 0 2006.229.20:21:02.63#ibcon#wrote, iclass 14, count 0 2006.229.20:21:02.63#ibcon#about to read 3, iclass 14, count 0 2006.229.20:21:02.65#ibcon#read 3, iclass 14, count 0 2006.229.20:21:02.65#ibcon#about to read 4, iclass 14, count 0 2006.229.20:21:02.65#ibcon#read 4, iclass 14, count 0 2006.229.20:21:02.65#ibcon#about to read 5, iclass 14, count 0 2006.229.20:21:02.65#ibcon#read 5, iclass 14, count 0 2006.229.20:21:02.65#ibcon#about to read 6, iclass 14, count 0 2006.229.20:21:02.65#ibcon#read 6, iclass 14, count 0 2006.229.20:21:02.65#ibcon#end of sib2, iclass 14, count 0 2006.229.20:21:02.65#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:21:02.65#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:21:02.65#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:21:02.65#ibcon#*before write, iclass 14, count 0 2006.229.20:21:02.65#ibcon#enter sib2, iclass 14, count 0 2006.229.20:21:02.65#ibcon#flushed, iclass 14, count 0 2006.229.20:21:02.65#ibcon#about to write, iclass 14, count 0 2006.229.20:21:02.65#ibcon#wrote, iclass 14, count 0 2006.229.20:21:02.65#ibcon#about to read 3, iclass 14, count 0 2006.229.20:21:02.69#ibcon#read 3, iclass 14, count 0 2006.229.20:21:02.69#ibcon#about to read 4, iclass 14, count 0 2006.229.20:21:02.69#ibcon#read 4, iclass 14, count 0 2006.229.20:21:02.69#ibcon#about to read 5, iclass 14, count 0 2006.229.20:21:02.69#ibcon#read 5, iclass 14, count 0 2006.229.20:21:02.69#ibcon#about to read 6, iclass 14, count 0 2006.229.20:21:02.69#ibcon#read 6, iclass 14, count 0 2006.229.20:21:02.69#ibcon#end of sib2, iclass 14, count 0 2006.229.20:21:02.69#ibcon#*after write, iclass 14, count 0 2006.229.20:21:02.69#ibcon#*before return 0, iclass 14, count 0 2006.229.20:21:02.69#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:21:02.69#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:21:02.69#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:21:02.69#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:21:02.69$vck44/vb=6,4 2006.229.20:21:02.69#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.20:21:02.69#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.20:21:02.69#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:02.69#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:21:02.75#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:21:02.75#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:21:02.75#ibcon#enter wrdev, iclass 16, count 2 2006.229.20:21:02.75#ibcon#first serial, iclass 16, count 2 2006.229.20:21:02.75#ibcon#enter sib2, iclass 16, count 2 2006.229.20:21:02.75#ibcon#flushed, iclass 16, count 2 2006.229.20:21:02.75#ibcon#about to write, iclass 16, count 2 2006.229.20:21:02.75#ibcon#wrote, iclass 16, count 2 2006.229.20:21:02.75#ibcon#about to read 3, iclass 16, count 2 2006.229.20:21:02.77#ibcon#read 3, iclass 16, count 2 2006.229.20:21:02.77#ibcon#about to read 4, iclass 16, count 2 2006.229.20:21:02.77#ibcon#read 4, iclass 16, count 2 2006.229.20:21:02.77#ibcon#about to read 5, iclass 16, count 2 2006.229.20:21:02.77#ibcon#read 5, iclass 16, count 2 2006.229.20:21:02.77#ibcon#about to read 6, iclass 16, count 2 2006.229.20:21:02.77#ibcon#read 6, iclass 16, count 2 2006.229.20:21:02.77#ibcon#end of sib2, iclass 16, count 2 2006.229.20:21:02.77#ibcon#*mode == 0, iclass 16, count 2 2006.229.20:21:02.77#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.20:21:02.77#ibcon#[27=AT06-04\r\n] 2006.229.20:21:02.77#ibcon#*before write, iclass 16, count 2 2006.229.20:21:02.77#ibcon#enter sib2, iclass 16, count 2 2006.229.20:21:02.77#ibcon#flushed, iclass 16, count 2 2006.229.20:21:02.77#ibcon#about to write, iclass 16, count 2 2006.229.20:21:02.77#ibcon#wrote, iclass 16, count 2 2006.229.20:21:02.77#ibcon#about to read 3, iclass 16, count 2 2006.229.20:21:02.80#ibcon#read 3, iclass 16, count 2 2006.229.20:21:02.80#ibcon#about to read 4, iclass 16, count 2 2006.229.20:21:02.80#ibcon#read 4, iclass 16, count 2 2006.229.20:21:02.80#ibcon#about to read 5, iclass 16, count 2 2006.229.20:21:02.80#ibcon#read 5, iclass 16, count 2 2006.229.20:21:02.80#ibcon#about to read 6, iclass 16, count 2 2006.229.20:21:02.80#ibcon#read 6, iclass 16, count 2 2006.229.20:21:02.80#ibcon#end of sib2, iclass 16, count 2 2006.229.20:21:02.80#ibcon#*after write, iclass 16, count 2 2006.229.20:21:02.80#ibcon#*before return 0, iclass 16, count 2 2006.229.20:21:02.80#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:21:02.80#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:21:02.80#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.20:21:02.80#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:02.80#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:21:02.92#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:21:02.92#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:21:02.92#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:21:02.92#ibcon#first serial, iclass 16, count 0 2006.229.20:21:02.92#ibcon#enter sib2, iclass 16, count 0 2006.229.20:21:02.92#ibcon#flushed, iclass 16, count 0 2006.229.20:21:02.92#ibcon#about to write, iclass 16, count 0 2006.229.20:21:02.92#ibcon#wrote, iclass 16, count 0 2006.229.20:21:02.92#ibcon#about to read 3, iclass 16, count 0 2006.229.20:21:02.94#ibcon#read 3, iclass 16, count 0 2006.229.20:21:02.94#ibcon#about to read 4, iclass 16, count 0 2006.229.20:21:02.94#ibcon#read 4, iclass 16, count 0 2006.229.20:21:02.94#ibcon#about to read 5, iclass 16, count 0 2006.229.20:21:02.94#ibcon#read 5, iclass 16, count 0 2006.229.20:21:02.94#ibcon#about to read 6, iclass 16, count 0 2006.229.20:21:02.94#ibcon#read 6, iclass 16, count 0 2006.229.20:21:02.94#ibcon#end of sib2, iclass 16, count 0 2006.229.20:21:02.94#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:21:02.94#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:21:02.94#ibcon#[27=USB\r\n] 2006.229.20:21:02.94#ibcon#*before write, iclass 16, count 0 2006.229.20:21:02.94#ibcon#enter sib2, iclass 16, count 0 2006.229.20:21:02.94#ibcon#flushed, iclass 16, count 0 2006.229.20:21:02.94#ibcon#about to write, iclass 16, count 0 2006.229.20:21:02.94#ibcon#wrote, iclass 16, count 0 2006.229.20:21:02.94#ibcon#about to read 3, iclass 16, count 0 2006.229.20:21:02.97#ibcon#read 3, iclass 16, count 0 2006.229.20:21:02.97#ibcon#about to read 4, iclass 16, count 0 2006.229.20:21:02.97#ibcon#read 4, iclass 16, count 0 2006.229.20:21:02.97#ibcon#about to read 5, iclass 16, count 0 2006.229.20:21:02.97#ibcon#read 5, iclass 16, count 0 2006.229.20:21:02.97#ibcon#about to read 6, iclass 16, count 0 2006.229.20:21:02.97#ibcon#read 6, iclass 16, count 0 2006.229.20:21:02.97#ibcon#end of sib2, iclass 16, count 0 2006.229.20:21:02.97#ibcon#*after write, iclass 16, count 0 2006.229.20:21:02.97#ibcon#*before return 0, iclass 16, count 0 2006.229.20:21:02.97#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:21:02.97#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:21:02.97#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:21:02.97#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:21:02.97$vck44/vblo=7,734.99 2006.229.20:21:02.97#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.20:21:02.97#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.20:21:02.97#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:02.97#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:02.97#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:02.97#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:02.97#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:21:02.97#ibcon#first serial, iclass 18, count 0 2006.229.20:21:02.97#ibcon#enter sib2, iclass 18, count 0 2006.229.20:21:02.97#ibcon#flushed, iclass 18, count 0 2006.229.20:21:02.97#ibcon#about to write, iclass 18, count 0 2006.229.20:21:02.97#ibcon#wrote, iclass 18, count 0 2006.229.20:21:02.97#ibcon#about to read 3, iclass 18, count 0 2006.229.20:21:02.99#ibcon#read 3, iclass 18, count 0 2006.229.20:21:02.99#ibcon#about to read 4, iclass 18, count 0 2006.229.20:21:02.99#ibcon#read 4, iclass 18, count 0 2006.229.20:21:02.99#ibcon#about to read 5, iclass 18, count 0 2006.229.20:21:02.99#ibcon#read 5, iclass 18, count 0 2006.229.20:21:02.99#ibcon#about to read 6, iclass 18, count 0 2006.229.20:21:02.99#ibcon#read 6, iclass 18, count 0 2006.229.20:21:02.99#ibcon#end of sib2, iclass 18, count 0 2006.229.20:21:02.99#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:21:02.99#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:21:02.99#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:21:02.99#ibcon#*before write, iclass 18, count 0 2006.229.20:21:02.99#ibcon#enter sib2, iclass 18, count 0 2006.229.20:21:02.99#ibcon#flushed, iclass 18, count 0 2006.229.20:21:02.99#ibcon#about to write, iclass 18, count 0 2006.229.20:21:02.99#ibcon#wrote, iclass 18, count 0 2006.229.20:21:02.99#ibcon#about to read 3, iclass 18, count 0 2006.229.20:21:03.03#ibcon#read 3, iclass 18, count 0 2006.229.20:21:03.03#ibcon#about to read 4, iclass 18, count 0 2006.229.20:21:03.03#ibcon#read 4, iclass 18, count 0 2006.229.20:21:03.03#ibcon#about to read 5, iclass 18, count 0 2006.229.20:21:03.03#ibcon#read 5, iclass 18, count 0 2006.229.20:21:03.03#ibcon#about to read 6, iclass 18, count 0 2006.229.20:21:03.03#ibcon#read 6, iclass 18, count 0 2006.229.20:21:03.03#ibcon#end of sib2, iclass 18, count 0 2006.229.20:21:03.03#ibcon#*after write, iclass 18, count 0 2006.229.20:21:03.03#ibcon#*before return 0, iclass 18, count 0 2006.229.20:21:03.03#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:03.03#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:21:03.03#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:21:03.03#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:21:03.03$vck44/vb=7,4 2006.229.20:21:03.03#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.20:21:03.03#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.20:21:03.03#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:03.03#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:03.09#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:03.09#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:03.09#ibcon#enter wrdev, iclass 20, count 2 2006.229.20:21:03.09#ibcon#first serial, iclass 20, count 2 2006.229.20:21:03.09#ibcon#enter sib2, iclass 20, count 2 2006.229.20:21:03.09#ibcon#flushed, iclass 20, count 2 2006.229.20:21:03.09#ibcon#about to write, iclass 20, count 2 2006.229.20:21:03.09#ibcon#wrote, iclass 20, count 2 2006.229.20:21:03.09#ibcon#about to read 3, iclass 20, count 2 2006.229.20:21:03.11#ibcon#read 3, iclass 20, count 2 2006.229.20:21:03.11#ibcon#about to read 4, iclass 20, count 2 2006.229.20:21:03.11#ibcon#read 4, iclass 20, count 2 2006.229.20:21:03.11#ibcon#about to read 5, iclass 20, count 2 2006.229.20:21:03.11#ibcon#read 5, iclass 20, count 2 2006.229.20:21:03.11#ibcon#about to read 6, iclass 20, count 2 2006.229.20:21:03.11#ibcon#read 6, iclass 20, count 2 2006.229.20:21:03.11#ibcon#end of sib2, iclass 20, count 2 2006.229.20:21:03.11#ibcon#*mode == 0, iclass 20, count 2 2006.229.20:21:03.11#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.20:21:03.11#ibcon#[27=AT07-04\r\n] 2006.229.20:21:03.11#ibcon#*before write, iclass 20, count 2 2006.229.20:21:03.11#ibcon#enter sib2, iclass 20, count 2 2006.229.20:21:03.11#ibcon#flushed, iclass 20, count 2 2006.229.20:21:03.11#ibcon#about to write, iclass 20, count 2 2006.229.20:21:03.11#ibcon#wrote, iclass 20, count 2 2006.229.20:21:03.11#ibcon#about to read 3, iclass 20, count 2 2006.229.20:21:03.14#ibcon#read 3, iclass 20, count 2 2006.229.20:21:03.14#ibcon#about to read 4, iclass 20, count 2 2006.229.20:21:03.14#ibcon#read 4, iclass 20, count 2 2006.229.20:21:03.14#ibcon#about to read 5, iclass 20, count 2 2006.229.20:21:03.14#ibcon#read 5, iclass 20, count 2 2006.229.20:21:03.14#ibcon#about to read 6, iclass 20, count 2 2006.229.20:21:03.14#ibcon#read 6, iclass 20, count 2 2006.229.20:21:03.14#ibcon#end of sib2, iclass 20, count 2 2006.229.20:21:03.14#ibcon#*after write, iclass 20, count 2 2006.229.20:21:03.14#ibcon#*before return 0, iclass 20, count 2 2006.229.20:21:03.14#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:03.14#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:21:03.14#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.20:21:03.14#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:03.14#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:03.26#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:03.26#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:03.26#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:21:03.26#ibcon#first serial, iclass 20, count 0 2006.229.20:21:03.26#ibcon#enter sib2, iclass 20, count 0 2006.229.20:21:03.26#ibcon#flushed, iclass 20, count 0 2006.229.20:21:03.26#ibcon#about to write, iclass 20, count 0 2006.229.20:21:03.26#ibcon#wrote, iclass 20, count 0 2006.229.20:21:03.26#ibcon#about to read 3, iclass 20, count 0 2006.229.20:21:03.28#ibcon#read 3, iclass 20, count 0 2006.229.20:21:03.28#ibcon#about to read 4, iclass 20, count 0 2006.229.20:21:03.28#ibcon#read 4, iclass 20, count 0 2006.229.20:21:03.28#ibcon#about to read 5, iclass 20, count 0 2006.229.20:21:03.28#ibcon#read 5, iclass 20, count 0 2006.229.20:21:03.28#ibcon#about to read 6, iclass 20, count 0 2006.229.20:21:03.28#ibcon#read 6, iclass 20, count 0 2006.229.20:21:03.28#ibcon#end of sib2, iclass 20, count 0 2006.229.20:21:03.28#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:21:03.28#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:21:03.28#ibcon#[27=USB\r\n] 2006.229.20:21:03.28#ibcon#*before write, iclass 20, count 0 2006.229.20:21:03.28#ibcon#enter sib2, iclass 20, count 0 2006.229.20:21:03.28#ibcon#flushed, iclass 20, count 0 2006.229.20:21:03.28#ibcon#about to write, iclass 20, count 0 2006.229.20:21:03.28#ibcon#wrote, iclass 20, count 0 2006.229.20:21:03.28#ibcon#about to read 3, iclass 20, count 0 2006.229.20:21:03.31#ibcon#read 3, iclass 20, count 0 2006.229.20:21:03.31#ibcon#about to read 4, iclass 20, count 0 2006.229.20:21:03.31#ibcon#read 4, iclass 20, count 0 2006.229.20:21:03.31#ibcon#about to read 5, iclass 20, count 0 2006.229.20:21:03.31#ibcon#read 5, iclass 20, count 0 2006.229.20:21:03.31#ibcon#about to read 6, iclass 20, count 0 2006.229.20:21:03.31#ibcon#read 6, iclass 20, count 0 2006.229.20:21:03.31#ibcon#end of sib2, iclass 20, count 0 2006.229.20:21:03.31#ibcon#*after write, iclass 20, count 0 2006.229.20:21:03.31#ibcon#*before return 0, iclass 20, count 0 2006.229.20:21:03.31#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:03.31#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:21:03.31#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:21:03.31#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:21:03.31$vck44/vblo=8,744.99 2006.229.20:21:03.31#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.20:21:03.31#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.20:21:03.31#ibcon#ireg 17 cls_cnt 0 2006.229.20:21:03.31#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:03.31#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:03.31#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:03.31#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:21:03.31#ibcon#first serial, iclass 22, count 0 2006.229.20:21:03.31#ibcon#enter sib2, iclass 22, count 0 2006.229.20:21:03.31#ibcon#flushed, iclass 22, count 0 2006.229.20:21:03.31#ibcon#about to write, iclass 22, count 0 2006.229.20:21:03.31#ibcon#wrote, iclass 22, count 0 2006.229.20:21:03.31#ibcon#about to read 3, iclass 22, count 0 2006.229.20:21:03.33#ibcon#read 3, iclass 22, count 0 2006.229.20:21:03.33#ibcon#about to read 4, iclass 22, count 0 2006.229.20:21:03.33#ibcon#read 4, iclass 22, count 0 2006.229.20:21:03.33#ibcon#about to read 5, iclass 22, count 0 2006.229.20:21:03.33#ibcon#read 5, iclass 22, count 0 2006.229.20:21:03.33#ibcon#about to read 6, iclass 22, count 0 2006.229.20:21:03.33#ibcon#read 6, iclass 22, count 0 2006.229.20:21:03.33#ibcon#end of sib2, iclass 22, count 0 2006.229.20:21:03.33#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:21:03.33#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:21:03.33#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:21:03.33#ibcon#*before write, iclass 22, count 0 2006.229.20:21:03.33#ibcon#enter sib2, iclass 22, count 0 2006.229.20:21:03.33#ibcon#flushed, iclass 22, count 0 2006.229.20:21:03.33#ibcon#about to write, iclass 22, count 0 2006.229.20:21:03.33#ibcon#wrote, iclass 22, count 0 2006.229.20:21:03.33#ibcon#about to read 3, iclass 22, count 0 2006.229.20:21:03.37#ibcon#read 3, iclass 22, count 0 2006.229.20:21:03.37#ibcon#about to read 4, iclass 22, count 0 2006.229.20:21:03.37#ibcon#read 4, iclass 22, count 0 2006.229.20:21:03.37#ibcon#about to read 5, iclass 22, count 0 2006.229.20:21:03.37#ibcon#read 5, iclass 22, count 0 2006.229.20:21:03.37#ibcon#about to read 6, iclass 22, count 0 2006.229.20:21:03.37#ibcon#read 6, iclass 22, count 0 2006.229.20:21:03.37#ibcon#end of sib2, iclass 22, count 0 2006.229.20:21:03.37#ibcon#*after write, iclass 22, count 0 2006.229.20:21:03.37#ibcon#*before return 0, iclass 22, count 0 2006.229.20:21:03.37#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:03.37#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:21:03.37#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:21:03.37#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:21:03.37$vck44/vb=8,4 2006.229.20:21:03.37#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.20:21:03.37#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.20:21:03.37#ibcon#ireg 11 cls_cnt 2 2006.229.20:21:03.37#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:03.43#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:03.43#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:03.43#ibcon#enter wrdev, iclass 24, count 2 2006.229.20:21:03.43#ibcon#first serial, iclass 24, count 2 2006.229.20:21:03.43#ibcon#enter sib2, iclass 24, count 2 2006.229.20:21:03.43#ibcon#flushed, iclass 24, count 2 2006.229.20:21:03.43#ibcon#about to write, iclass 24, count 2 2006.229.20:21:03.43#ibcon#wrote, iclass 24, count 2 2006.229.20:21:03.43#ibcon#about to read 3, iclass 24, count 2 2006.229.20:21:03.45#ibcon#read 3, iclass 24, count 2 2006.229.20:21:03.45#ibcon#about to read 4, iclass 24, count 2 2006.229.20:21:03.45#ibcon#read 4, iclass 24, count 2 2006.229.20:21:03.45#ibcon#about to read 5, iclass 24, count 2 2006.229.20:21:03.45#ibcon#read 5, iclass 24, count 2 2006.229.20:21:03.45#ibcon#about to read 6, iclass 24, count 2 2006.229.20:21:03.45#ibcon#read 6, iclass 24, count 2 2006.229.20:21:03.45#ibcon#end of sib2, iclass 24, count 2 2006.229.20:21:03.45#ibcon#*mode == 0, iclass 24, count 2 2006.229.20:21:03.45#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.20:21:03.45#ibcon#[27=AT08-04\r\n] 2006.229.20:21:03.45#ibcon#*before write, iclass 24, count 2 2006.229.20:21:03.45#ibcon#enter sib2, iclass 24, count 2 2006.229.20:21:03.45#ibcon#flushed, iclass 24, count 2 2006.229.20:21:03.45#ibcon#about to write, iclass 24, count 2 2006.229.20:21:03.45#ibcon#wrote, iclass 24, count 2 2006.229.20:21:03.45#ibcon#about to read 3, iclass 24, count 2 2006.229.20:21:03.48#ibcon#read 3, iclass 24, count 2 2006.229.20:21:03.48#ibcon#about to read 4, iclass 24, count 2 2006.229.20:21:03.48#ibcon#read 4, iclass 24, count 2 2006.229.20:21:03.48#ibcon#about to read 5, iclass 24, count 2 2006.229.20:21:03.48#ibcon#read 5, iclass 24, count 2 2006.229.20:21:03.48#ibcon#about to read 6, iclass 24, count 2 2006.229.20:21:03.48#ibcon#read 6, iclass 24, count 2 2006.229.20:21:03.48#ibcon#end of sib2, iclass 24, count 2 2006.229.20:21:03.48#ibcon#*after write, iclass 24, count 2 2006.229.20:21:03.48#ibcon#*before return 0, iclass 24, count 2 2006.229.20:21:03.48#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:03.48#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:21:03.48#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.20:21:03.48#ibcon#ireg 7 cls_cnt 0 2006.229.20:21:03.48#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:03.60#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:03.60#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:03.60#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:21:03.60#ibcon#first serial, iclass 24, count 0 2006.229.20:21:03.60#ibcon#enter sib2, iclass 24, count 0 2006.229.20:21:03.60#ibcon#flushed, iclass 24, count 0 2006.229.20:21:03.60#ibcon#about to write, iclass 24, count 0 2006.229.20:21:03.60#ibcon#wrote, iclass 24, count 0 2006.229.20:21:03.60#ibcon#about to read 3, iclass 24, count 0 2006.229.20:21:03.62#ibcon#read 3, iclass 24, count 0 2006.229.20:21:03.62#ibcon#about to read 4, iclass 24, count 0 2006.229.20:21:03.62#ibcon#read 4, iclass 24, count 0 2006.229.20:21:03.62#ibcon#about to read 5, iclass 24, count 0 2006.229.20:21:03.62#ibcon#read 5, iclass 24, count 0 2006.229.20:21:03.62#ibcon#about to read 6, iclass 24, count 0 2006.229.20:21:03.62#ibcon#read 6, iclass 24, count 0 2006.229.20:21:03.62#ibcon#end of sib2, iclass 24, count 0 2006.229.20:21:03.62#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:21:03.62#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:21:03.62#ibcon#[27=USB\r\n] 2006.229.20:21:03.62#ibcon#*before write, iclass 24, count 0 2006.229.20:21:03.62#ibcon#enter sib2, iclass 24, count 0 2006.229.20:21:03.62#ibcon#flushed, iclass 24, count 0 2006.229.20:21:03.62#ibcon#about to write, iclass 24, count 0 2006.229.20:21:03.62#ibcon#wrote, iclass 24, count 0 2006.229.20:21:03.62#ibcon#about to read 3, iclass 24, count 0 2006.229.20:21:03.65#ibcon#read 3, iclass 24, count 0 2006.229.20:21:03.65#ibcon#about to read 4, iclass 24, count 0 2006.229.20:21:03.65#ibcon#read 4, iclass 24, count 0 2006.229.20:21:03.65#ibcon#about to read 5, iclass 24, count 0 2006.229.20:21:03.65#ibcon#read 5, iclass 24, count 0 2006.229.20:21:03.65#ibcon#about to read 6, iclass 24, count 0 2006.229.20:21:03.65#ibcon#read 6, iclass 24, count 0 2006.229.20:21:03.65#ibcon#end of sib2, iclass 24, count 0 2006.229.20:21:03.65#ibcon#*after write, iclass 24, count 0 2006.229.20:21:03.65#ibcon#*before return 0, iclass 24, count 0 2006.229.20:21:03.65#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:03.65#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:21:03.65#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:21:03.65#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:21:03.65$vck44/vabw=wide 2006.229.20:21:03.65#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.20:21:03.65#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.20:21:03.65#ibcon#ireg 8 cls_cnt 0 2006.229.20:21:03.65#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:03.65#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:03.65#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:03.65#ibcon#enter wrdev, iclass 26, count 0 2006.229.20:21:03.65#ibcon#first serial, iclass 26, count 0 2006.229.20:21:03.65#ibcon#enter sib2, iclass 26, count 0 2006.229.20:21:03.65#ibcon#flushed, iclass 26, count 0 2006.229.20:21:03.65#ibcon#about to write, iclass 26, count 0 2006.229.20:21:03.65#ibcon#wrote, iclass 26, count 0 2006.229.20:21:03.65#ibcon#about to read 3, iclass 26, count 0 2006.229.20:21:03.67#ibcon#read 3, iclass 26, count 0 2006.229.20:21:03.67#ibcon#about to read 4, iclass 26, count 0 2006.229.20:21:03.67#ibcon#read 4, iclass 26, count 0 2006.229.20:21:03.67#ibcon#about to read 5, iclass 26, count 0 2006.229.20:21:03.67#ibcon#read 5, iclass 26, count 0 2006.229.20:21:03.67#ibcon#about to read 6, iclass 26, count 0 2006.229.20:21:03.67#ibcon#read 6, iclass 26, count 0 2006.229.20:21:03.67#ibcon#end of sib2, iclass 26, count 0 2006.229.20:21:03.67#ibcon#*mode == 0, iclass 26, count 0 2006.229.20:21:03.67#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.20:21:03.67#ibcon#[25=BW32\r\n] 2006.229.20:21:03.67#ibcon#*before write, iclass 26, count 0 2006.229.20:21:03.67#ibcon#enter sib2, iclass 26, count 0 2006.229.20:21:03.67#ibcon#flushed, iclass 26, count 0 2006.229.20:21:03.67#ibcon#about to write, iclass 26, count 0 2006.229.20:21:03.67#ibcon#wrote, iclass 26, count 0 2006.229.20:21:03.67#ibcon#about to read 3, iclass 26, count 0 2006.229.20:21:03.70#ibcon#read 3, iclass 26, count 0 2006.229.20:21:03.70#ibcon#about to read 4, iclass 26, count 0 2006.229.20:21:03.70#ibcon#read 4, iclass 26, count 0 2006.229.20:21:03.70#ibcon#about to read 5, iclass 26, count 0 2006.229.20:21:03.70#ibcon#read 5, iclass 26, count 0 2006.229.20:21:03.70#ibcon#about to read 6, iclass 26, count 0 2006.229.20:21:03.70#ibcon#read 6, iclass 26, count 0 2006.229.20:21:03.70#ibcon#end of sib2, iclass 26, count 0 2006.229.20:21:03.70#ibcon#*after write, iclass 26, count 0 2006.229.20:21:03.70#ibcon#*before return 0, iclass 26, count 0 2006.229.20:21:03.70#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:03.70#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:21:03.70#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.20:21:03.70#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.20:21:03.70$vck44/vbbw=wide 2006.229.20:21:03.70#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.20:21:03.70#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.20:21:03.70#ibcon#ireg 8 cls_cnt 0 2006.229.20:21:03.70#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:21:03.77#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:21:03.77#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:21:03.77#ibcon#enter wrdev, iclass 28, count 0 2006.229.20:21:03.77#ibcon#first serial, iclass 28, count 0 2006.229.20:21:03.77#ibcon#enter sib2, iclass 28, count 0 2006.229.20:21:03.77#ibcon#flushed, iclass 28, count 0 2006.229.20:21:03.77#ibcon#about to write, iclass 28, count 0 2006.229.20:21:03.77#ibcon#wrote, iclass 28, count 0 2006.229.20:21:03.77#ibcon#about to read 3, iclass 28, count 0 2006.229.20:21:03.79#ibcon#read 3, iclass 28, count 0 2006.229.20:21:03.79#ibcon#about to read 4, iclass 28, count 0 2006.229.20:21:03.79#ibcon#read 4, iclass 28, count 0 2006.229.20:21:03.79#ibcon#about to read 5, iclass 28, count 0 2006.229.20:21:03.79#ibcon#read 5, iclass 28, count 0 2006.229.20:21:03.79#ibcon#about to read 6, iclass 28, count 0 2006.229.20:21:03.79#ibcon#read 6, iclass 28, count 0 2006.229.20:21:03.79#ibcon#end of sib2, iclass 28, count 0 2006.229.20:21:03.79#ibcon#*mode == 0, iclass 28, count 0 2006.229.20:21:03.79#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.20:21:03.79#ibcon#[27=BW32\r\n] 2006.229.20:21:03.79#ibcon#*before write, iclass 28, count 0 2006.229.20:21:03.79#ibcon#enter sib2, iclass 28, count 0 2006.229.20:21:03.79#ibcon#flushed, iclass 28, count 0 2006.229.20:21:03.79#ibcon#about to write, iclass 28, count 0 2006.229.20:21:03.79#ibcon#wrote, iclass 28, count 0 2006.229.20:21:03.79#ibcon#about to read 3, iclass 28, count 0 2006.229.20:21:03.82#ibcon#read 3, iclass 28, count 0 2006.229.20:21:03.82#ibcon#about to read 4, iclass 28, count 0 2006.229.20:21:03.82#ibcon#read 4, iclass 28, count 0 2006.229.20:21:03.82#ibcon#about to read 5, iclass 28, count 0 2006.229.20:21:03.82#ibcon#read 5, iclass 28, count 0 2006.229.20:21:03.82#ibcon#about to read 6, iclass 28, count 0 2006.229.20:21:03.82#ibcon#read 6, iclass 28, count 0 2006.229.20:21:03.82#ibcon#end of sib2, iclass 28, count 0 2006.229.20:21:03.82#ibcon#*after write, iclass 28, count 0 2006.229.20:21:03.82#ibcon#*before return 0, iclass 28, count 0 2006.229.20:21:03.82#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:21:03.82#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:21:03.82#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.20:21:03.82#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.20:21:03.82$setupk4/ifdk4 2006.229.20:21:03.82$ifdk4/lo= 2006.229.20:21:03.82$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:21:03.82$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:21:03.82$ifdk4/patch= 2006.229.20:21:03.82$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:21:03.82$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:21:03.82$setupk4/!*+20s 2006.229.20:21:05.46#abcon#<5=/07 1.3 3.1 25.981001001.8\r\n> 2006.229.20:21:05.48#abcon#{5=INTERFACE CLEAR} 2006.229.20:21:05.54#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:21:15.63#abcon#<5=/07 1.4 3.1 25.981001001.8\r\n> 2006.229.20:21:15.65#abcon#{5=INTERFACE CLEAR} 2006.229.20:21:15.71#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:21:18.33$setupk4/"tpicd 2006.229.20:21:18.33$setupk4/echo=off 2006.229.20:21:18.33$setupk4/xlog=off 2006.229.20:21:18.33:!2006.229.20:23:14 2006.229.20:21:19.13#trakl#Source acquired 2006.229.20:21:21.13#flagr#flagr/antenna,acquired 2006.229.20:23:14.00:preob 2006.229.20:23:14.14/onsource/TRACKING 2006.229.20:23:14.14:!2006.229.20:23:24 2006.229.20:23:24.00:"tape 2006.229.20:23:24.00:"st=record 2006.229.20:23:24.00:data_valid=on 2006.229.20:23:24.00:midob 2006.229.20:23:24.14/onsource/TRACKING 2006.229.20:23:24.14/wx/25.98,1001.9,100 2006.229.20:23:24.26/cable/+6.4211E-03 2006.229.20:23:25.35/va/01,08,usb,yes,34,37 2006.229.20:23:25.35/va/02,07,usb,yes,37,38 2006.229.20:23:25.35/va/03,06,usb,yes,46,49 2006.229.20:23:25.35/va/04,07,usb,yes,38,40 2006.229.20:23:25.35/va/05,04,usb,yes,34,35 2006.229.20:23:25.35/va/06,04,usb,yes,39,38 2006.229.20:23:25.35/va/07,05,usb,yes,34,35 2006.229.20:23:25.35/va/08,06,usb,yes,25,31 2006.229.20:23:25.58/valo/01,524.99,yes,locked 2006.229.20:23:25.58/valo/02,534.99,yes,locked 2006.229.20:23:25.58/valo/03,564.99,yes,locked 2006.229.20:23:25.58/valo/04,624.99,yes,locked 2006.229.20:23:25.58/valo/05,734.99,yes,locked 2006.229.20:23:25.58/valo/06,814.99,yes,locked 2006.229.20:23:25.58/valo/07,864.99,yes,locked 2006.229.20:23:25.58/valo/08,884.99,yes,locked 2006.229.20:23:26.67/vb/01,04,usb,yes,33,31 2006.229.20:23:26.67/vb/02,04,usb,yes,36,35 2006.229.20:23:26.67/vb/03,04,usb,yes,32,36 2006.229.20:23:26.67/vb/04,04,usb,yes,37,36 2006.229.20:23:26.67/vb/05,04,usb,yes,29,32 2006.229.20:23:26.67/vb/06,04,usb,yes,34,30 2006.229.20:23:26.67/vb/07,04,usb,yes,34,34 2006.229.20:23:26.67/vb/08,04,usb,yes,31,35 2006.229.20:23:26.91/vblo/01,629.99,yes,locked 2006.229.20:23:26.91/vblo/02,634.99,yes,locked 2006.229.20:23:26.91/vblo/03,649.99,yes,locked 2006.229.20:23:26.91/vblo/04,679.99,yes,locked 2006.229.20:23:26.91/vblo/05,709.99,yes,locked 2006.229.20:23:26.91/vblo/06,719.99,yes,locked 2006.229.20:23:26.91/vblo/07,734.99,yes,locked 2006.229.20:23:26.91/vblo/08,744.99,yes,locked 2006.229.20:23:27.06/vabw/8 2006.229.20:23:27.21/vbbw/8 2006.229.20:23:27.30/xfe/off,on,12.2 2006.229.20:23:27.67/ifatt/23,28,28,28 2006.229.20:23:28.07/fmout-gps/S +4.59E-07 2006.229.20:23:28.11:!2006.229.20:25:54 2006.229.20:25:54.01:data_valid=off 2006.229.20:25:54.02:"et 2006.229.20:25:54.02:!+3s 2006.229.20:25:57.03:"tape 2006.229.20:25:57.04:postob 2006.229.20:25:57.22/cable/+6.4221E-03 2006.229.20:25:57.23/wx/25.97,1001.8,100 2006.229.20:25:57.28/fmout-gps/S +4.62E-07 2006.229.20:25:57.29:scan_name=229-2034,jd0608,100 2006.229.20:25:57.29:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.20:25:58.14#flagr#flagr/antenna,new-source 2006.229.20:25:58.15:checkk5 2006.229.20:25:58.57/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:25:58.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:25:59.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:25:59.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:26:00.13/chk_obsdata//k5ts1/T2292023??a.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.20:26:00.53/chk_obsdata//k5ts2/T2292023??b.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.20:26:00.93/chk_obsdata//k5ts3/T2292023??c.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.20:26:01.33/chk_obsdata//k5ts4/T2292023??d.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.20:26:02.10/k5log//k5ts1_log_newline 2006.229.20:26:02.82/k5log//k5ts2_log_newline 2006.229.20:26:03.56/k5log//k5ts3_log_newline 2006.229.20:26:04.29/k5log//k5ts4_log_newline 2006.229.20:26:04.32/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:26:04.32:setupk4=1 2006.229.20:26:04.32$setupk4/echo=on 2006.229.20:26:04.32$setupk4/pcalon 2006.229.20:26:04.32$pcalon/"no phase cal control is implemented here 2006.229.20:26:04.32$setupk4/"tpicd=stop 2006.229.20:26:04.32$setupk4/"rec=synch_on 2006.229.20:26:04.32$setupk4/"rec_mode=128 2006.229.20:26:04.32$setupk4/!* 2006.229.20:26:04.32$setupk4/recpk4 2006.229.20:26:04.32$recpk4/recpatch= 2006.229.20:26:04.32$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:26:04.32$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:26:04.32$setupk4/vck44 2006.229.20:26:04.32$vck44/valo=1,524.99 2006.229.20:26:04.32#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.20:26:04.32#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.20:26:04.32#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:04.32#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:04.32#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:04.32#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:04.32#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:26:04.32#ibcon#first serial, iclass 7, count 0 2006.229.20:26:04.32#ibcon#enter sib2, iclass 7, count 0 2006.229.20:26:04.32#ibcon#flushed, iclass 7, count 0 2006.229.20:26:04.32#ibcon#about to write, iclass 7, count 0 2006.229.20:26:04.32#ibcon#wrote, iclass 7, count 0 2006.229.20:26:04.32#ibcon#about to read 3, iclass 7, count 0 2006.229.20:26:04.34#ibcon#read 3, iclass 7, count 0 2006.229.20:26:04.34#ibcon#about to read 4, iclass 7, count 0 2006.229.20:26:04.34#ibcon#read 4, iclass 7, count 0 2006.229.20:26:04.34#ibcon#about to read 5, iclass 7, count 0 2006.229.20:26:04.34#ibcon#read 5, iclass 7, count 0 2006.229.20:26:04.34#ibcon#about to read 6, iclass 7, count 0 2006.229.20:26:04.34#ibcon#read 6, iclass 7, count 0 2006.229.20:26:04.34#ibcon#end of sib2, iclass 7, count 0 2006.229.20:26:04.34#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:26:04.34#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:26:04.34#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:26:04.34#ibcon#*before write, iclass 7, count 0 2006.229.20:26:04.34#ibcon#enter sib2, iclass 7, count 0 2006.229.20:26:04.34#ibcon#flushed, iclass 7, count 0 2006.229.20:26:04.34#ibcon#about to write, iclass 7, count 0 2006.229.20:26:04.34#ibcon#wrote, iclass 7, count 0 2006.229.20:26:04.34#ibcon#about to read 3, iclass 7, count 0 2006.229.20:26:04.39#ibcon#read 3, iclass 7, count 0 2006.229.20:26:04.39#ibcon#about to read 4, iclass 7, count 0 2006.229.20:26:04.39#ibcon#read 4, iclass 7, count 0 2006.229.20:26:04.39#ibcon#about to read 5, iclass 7, count 0 2006.229.20:26:04.39#ibcon#read 5, iclass 7, count 0 2006.229.20:26:04.39#ibcon#about to read 6, iclass 7, count 0 2006.229.20:26:04.39#ibcon#read 6, iclass 7, count 0 2006.229.20:26:04.39#ibcon#end of sib2, iclass 7, count 0 2006.229.20:26:04.39#ibcon#*after write, iclass 7, count 0 2006.229.20:26:04.39#ibcon#*before return 0, iclass 7, count 0 2006.229.20:26:04.39#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:04.39#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:04.39#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:26:04.39#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:26:04.39$vck44/va=1,8 2006.229.20:26:04.39#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.20:26:04.39#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.20:26:04.39#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:04.39#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:04.39#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:04.39#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:04.39#ibcon#enter wrdev, iclass 11, count 2 2006.229.20:26:04.39#ibcon#first serial, iclass 11, count 2 2006.229.20:26:04.39#ibcon#enter sib2, iclass 11, count 2 2006.229.20:26:04.39#ibcon#flushed, iclass 11, count 2 2006.229.20:26:04.39#ibcon#about to write, iclass 11, count 2 2006.229.20:26:04.39#ibcon#wrote, iclass 11, count 2 2006.229.20:26:04.39#ibcon#about to read 3, iclass 11, count 2 2006.229.20:26:04.41#ibcon#read 3, iclass 11, count 2 2006.229.20:26:04.41#ibcon#about to read 4, iclass 11, count 2 2006.229.20:26:04.41#ibcon#read 4, iclass 11, count 2 2006.229.20:26:04.41#ibcon#about to read 5, iclass 11, count 2 2006.229.20:26:04.41#ibcon#read 5, iclass 11, count 2 2006.229.20:26:04.41#ibcon#about to read 6, iclass 11, count 2 2006.229.20:26:04.41#ibcon#read 6, iclass 11, count 2 2006.229.20:26:04.41#ibcon#end of sib2, iclass 11, count 2 2006.229.20:26:04.41#ibcon#*mode == 0, iclass 11, count 2 2006.229.20:26:04.41#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.20:26:04.41#ibcon#[25=AT01-08\r\n] 2006.229.20:26:04.41#ibcon#*before write, iclass 11, count 2 2006.229.20:26:04.41#ibcon#enter sib2, iclass 11, count 2 2006.229.20:26:04.41#ibcon#flushed, iclass 11, count 2 2006.229.20:26:04.41#ibcon#about to write, iclass 11, count 2 2006.229.20:26:04.41#ibcon#wrote, iclass 11, count 2 2006.229.20:26:04.41#ibcon#about to read 3, iclass 11, count 2 2006.229.20:26:04.44#ibcon#read 3, iclass 11, count 2 2006.229.20:26:04.44#ibcon#about to read 4, iclass 11, count 2 2006.229.20:26:04.44#ibcon#read 4, iclass 11, count 2 2006.229.20:26:04.44#ibcon#about to read 5, iclass 11, count 2 2006.229.20:26:04.44#ibcon#read 5, iclass 11, count 2 2006.229.20:26:04.44#ibcon#about to read 6, iclass 11, count 2 2006.229.20:26:04.44#ibcon#read 6, iclass 11, count 2 2006.229.20:26:04.44#ibcon#end of sib2, iclass 11, count 2 2006.229.20:26:04.44#ibcon#*after write, iclass 11, count 2 2006.229.20:26:04.44#ibcon#*before return 0, iclass 11, count 2 2006.229.20:26:04.44#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:04.44#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:04.44#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.20:26:04.44#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:04.44#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:04.56#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:04.56#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:04.56#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:26:04.56#ibcon#first serial, iclass 11, count 0 2006.229.20:26:04.56#ibcon#enter sib2, iclass 11, count 0 2006.229.20:26:04.56#ibcon#flushed, iclass 11, count 0 2006.229.20:26:04.56#ibcon#about to write, iclass 11, count 0 2006.229.20:26:04.56#ibcon#wrote, iclass 11, count 0 2006.229.20:26:04.56#ibcon#about to read 3, iclass 11, count 0 2006.229.20:26:04.58#ibcon#read 3, iclass 11, count 0 2006.229.20:26:04.58#ibcon#about to read 4, iclass 11, count 0 2006.229.20:26:04.58#ibcon#read 4, iclass 11, count 0 2006.229.20:26:04.58#ibcon#about to read 5, iclass 11, count 0 2006.229.20:26:04.58#ibcon#read 5, iclass 11, count 0 2006.229.20:26:04.58#ibcon#about to read 6, iclass 11, count 0 2006.229.20:26:04.58#ibcon#read 6, iclass 11, count 0 2006.229.20:26:04.58#ibcon#end of sib2, iclass 11, count 0 2006.229.20:26:04.58#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:26:04.58#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:26:04.58#ibcon#[25=USB\r\n] 2006.229.20:26:04.58#ibcon#*before write, iclass 11, count 0 2006.229.20:26:04.58#ibcon#enter sib2, iclass 11, count 0 2006.229.20:26:04.58#ibcon#flushed, iclass 11, count 0 2006.229.20:26:04.58#ibcon#about to write, iclass 11, count 0 2006.229.20:26:04.58#ibcon#wrote, iclass 11, count 0 2006.229.20:26:04.58#ibcon#about to read 3, iclass 11, count 0 2006.229.20:26:04.61#ibcon#read 3, iclass 11, count 0 2006.229.20:26:04.61#ibcon#about to read 4, iclass 11, count 0 2006.229.20:26:04.61#ibcon#read 4, iclass 11, count 0 2006.229.20:26:04.61#ibcon#about to read 5, iclass 11, count 0 2006.229.20:26:04.61#ibcon#read 5, iclass 11, count 0 2006.229.20:26:04.61#ibcon#about to read 6, iclass 11, count 0 2006.229.20:26:04.61#ibcon#read 6, iclass 11, count 0 2006.229.20:26:04.61#ibcon#end of sib2, iclass 11, count 0 2006.229.20:26:04.61#ibcon#*after write, iclass 11, count 0 2006.229.20:26:04.61#ibcon#*before return 0, iclass 11, count 0 2006.229.20:26:04.61#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:04.61#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:04.61#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:26:04.61#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:26:04.61$vck44/valo=2,534.99 2006.229.20:26:04.61#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.20:26:04.61#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.20:26:04.61#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:04.61#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:04.61#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:04.61#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:04.61#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:26:04.61#ibcon#first serial, iclass 13, count 0 2006.229.20:26:04.61#ibcon#enter sib2, iclass 13, count 0 2006.229.20:26:04.61#ibcon#flushed, iclass 13, count 0 2006.229.20:26:04.61#ibcon#about to write, iclass 13, count 0 2006.229.20:26:04.61#ibcon#wrote, iclass 13, count 0 2006.229.20:26:04.61#ibcon#about to read 3, iclass 13, count 0 2006.229.20:26:04.63#ibcon#read 3, iclass 13, count 0 2006.229.20:26:04.63#ibcon#about to read 4, iclass 13, count 0 2006.229.20:26:04.63#ibcon#read 4, iclass 13, count 0 2006.229.20:26:04.63#ibcon#about to read 5, iclass 13, count 0 2006.229.20:26:04.63#ibcon#read 5, iclass 13, count 0 2006.229.20:26:04.63#ibcon#about to read 6, iclass 13, count 0 2006.229.20:26:04.63#ibcon#read 6, iclass 13, count 0 2006.229.20:26:04.63#ibcon#end of sib2, iclass 13, count 0 2006.229.20:26:04.63#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:26:04.63#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:26:04.63#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:26:04.63#ibcon#*before write, iclass 13, count 0 2006.229.20:26:04.63#ibcon#enter sib2, iclass 13, count 0 2006.229.20:26:04.63#ibcon#flushed, iclass 13, count 0 2006.229.20:26:04.63#ibcon#about to write, iclass 13, count 0 2006.229.20:26:04.63#ibcon#wrote, iclass 13, count 0 2006.229.20:26:04.63#ibcon#about to read 3, iclass 13, count 0 2006.229.20:26:04.67#ibcon#read 3, iclass 13, count 0 2006.229.20:26:04.67#ibcon#about to read 4, iclass 13, count 0 2006.229.20:26:04.67#ibcon#read 4, iclass 13, count 0 2006.229.20:26:04.67#ibcon#about to read 5, iclass 13, count 0 2006.229.20:26:04.67#ibcon#read 5, iclass 13, count 0 2006.229.20:26:04.67#ibcon#about to read 6, iclass 13, count 0 2006.229.20:26:04.67#ibcon#read 6, iclass 13, count 0 2006.229.20:26:04.67#ibcon#end of sib2, iclass 13, count 0 2006.229.20:26:04.67#ibcon#*after write, iclass 13, count 0 2006.229.20:26:04.67#ibcon#*before return 0, iclass 13, count 0 2006.229.20:26:04.67#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:04.67#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:04.67#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:26:04.67#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:26:04.67$vck44/va=2,7 2006.229.20:26:04.67#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.20:26:04.67#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.20:26:04.67#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:04.67#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:04.73#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:04.73#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:04.73#ibcon#enter wrdev, iclass 15, count 2 2006.229.20:26:04.73#ibcon#first serial, iclass 15, count 2 2006.229.20:26:04.73#ibcon#enter sib2, iclass 15, count 2 2006.229.20:26:04.73#ibcon#flushed, iclass 15, count 2 2006.229.20:26:04.73#ibcon#about to write, iclass 15, count 2 2006.229.20:26:04.73#ibcon#wrote, iclass 15, count 2 2006.229.20:26:04.73#ibcon#about to read 3, iclass 15, count 2 2006.229.20:26:04.75#ibcon#read 3, iclass 15, count 2 2006.229.20:26:04.75#ibcon#about to read 4, iclass 15, count 2 2006.229.20:26:04.75#ibcon#read 4, iclass 15, count 2 2006.229.20:26:04.75#ibcon#about to read 5, iclass 15, count 2 2006.229.20:26:04.75#ibcon#read 5, iclass 15, count 2 2006.229.20:26:04.75#ibcon#about to read 6, iclass 15, count 2 2006.229.20:26:04.75#ibcon#read 6, iclass 15, count 2 2006.229.20:26:04.75#ibcon#end of sib2, iclass 15, count 2 2006.229.20:26:04.75#ibcon#*mode == 0, iclass 15, count 2 2006.229.20:26:04.75#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.20:26:04.75#ibcon#[25=AT02-07\r\n] 2006.229.20:26:04.75#ibcon#*before write, iclass 15, count 2 2006.229.20:26:04.75#ibcon#enter sib2, iclass 15, count 2 2006.229.20:26:04.75#ibcon#flushed, iclass 15, count 2 2006.229.20:26:04.75#ibcon#about to write, iclass 15, count 2 2006.229.20:26:04.75#ibcon#wrote, iclass 15, count 2 2006.229.20:26:04.75#ibcon#about to read 3, iclass 15, count 2 2006.229.20:26:04.78#ibcon#read 3, iclass 15, count 2 2006.229.20:26:04.78#ibcon#about to read 4, iclass 15, count 2 2006.229.20:26:04.78#ibcon#read 4, iclass 15, count 2 2006.229.20:26:04.78#ibcon#about to read 5, iclass 15, count 2 2006.229.20:26:04.78#ibcon#read 5, iclass 15, count 2 2006.229.20:26:04.78#ibcon#about to read 6, iclass 15, count 2 2006.229.20:26:04.78#ibcon#read 6, iclass 15, count 2 2006.229.20:26:04.78#ibcon#end of sib2, iclass 15, count 2 2006.229.20:26:04.78#ibcon#*after write, iclass 15, count 2 2006.229.20:26:04.78#ibcon#*before return 0, iclass 15, count 2 2006.229.20:26:04.78#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:04.78#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:04.78#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.20:26:04.78#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:04.78#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:04.90#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:04.90#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:04.90#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:26:04.90#ibcon#first serial, iclass 15, count 0 2006.229.20:26:04.90#ibcon#enter sib2, iclass 15, count 0 2006.229.20:26:04.90#ibcon#flushed, iclass 15, count 0 2006.229.20:26:04.90#ibcon#about to write, iclass 15, count 0 2006.229.20:26:04.90#ibcon#wrote, iclass 15, count 0 2006.229.20:26:04.90#ibcon#about to read 3, iclass 15, count 0 2006.229.20:26:04.92#ibcon#read 3, iclass 15, count 0 2006.229.20:26:04.92#ibcon#about to read 4, iclass 15, count 0 2006.229.20:26:04.92#ibcon#read 4, iclass 15, count 0 2006.229.20:26:04.92#ibcon#about to read 5, iclass 15, count 0 2006.229.20:26:04.92#ibcon#read 5, iclass 15, count 0 2006.229.20:26:04.92#ibcon#about to read 6, iclass 15, count 0 2006.229.20:26:04.92#ibcon#read 6, iclass 15, count 0 2006.229.20:26:04.92#ibcon#end of sib2, iclass 15, count 0 2006.229.20:26:04.92#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:26:04.92#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:26:04.92#ibcon#[25=USB\r\n] 2006.229.20:26:04.92#ibcon#*before write, iclass 15, count 0 2006.229.20:26:04.92#ibcon#enter sib2, iclass 15, count 0 2006.229.20:26:04.92#ibcon#flushed, iclass 15, count 0 2006.229.20:26:04.92#ibcon#about to write, iclass 15, count 0 2006.229.20:26:04.92#ibcon#wrote, iclass 15, count 0 2006.229.20:26:04.92#ibcon#about to read 3, iclass 15, count 0 2006.229.20:26:04.95#ibcon#read 3, iclass 15, count 0 2006.229.20:26:04.95#ibcon#about to read 4, iclass 15, count 0 2006.229.20:26:04.95#ibcon#read 4, iclass 15, count 0 2006.229.20:26:04.95#ibcon#about to read 5, iclass 15, count 0 2006.229.20:26:04.95#ibcon#read 5, iclass 15, count 0 2006.229.20:26:04.95#ibcon#about to read 6, iclass 15, count 0 2006.229.20:26:04.95#ibcon#read 6, iclass 15, count 0 2006.229.20:26:04.95#ibcon#end of sib2, iclass 15, count 0 2006.229.20:26:04.95#ibcon#*after write, iclass 15, count 0 2006.229.20:26:04.95#ibcon#*before return 0, iclass 15, count 0 2006.229.20:26:04.95#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:04.95#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:04.95#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:26:04.95#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:26:04.95$vck44/valo=3,564.99 2006.229.20:26:04.95#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:26:04.95#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:26:04.95#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:04.95#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:04.95#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:04.95#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:04.95#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:26:04.95#ibcon#first serial, iclass 17, count 0 2006.229.20:26:04.95#ibcon#enter sib2, iclass 17, count 0 2006.229.20:26:04.95#ibcon#flushed, iclass 17, count 0 2006.229.20:26:04.95#ibcon#about to write, iclass 17, count 0 2006.229.20:26:04.95#ibcon#wrote, iclass 17, count 0 2006.229.20:26:04.95#ibcon#about to read 3, iclass 17, count 0 2006.229.20:26:04.97#ibcon#read 3, iclass 17, count 0 2006.229.20:26:04.97#ibcon#about to read 4, iclass 17, count 0 2006.229.20:26:04.97#ibcon#read 4, iclass 17, count 0 2006.229.20:26:04.97#ibcon#about to read 5, iclass 17, count 0 2006.229.20:26:04.97#ibcon#read 5, iclass 17, count 0 2006.229.20:26:04.97#ibcon#about to read 6, iclass 17, count 0 2006.229.20:26:04.97#ibcon#read 6, iclass 17, count 0 2006.229.20:26:04.97#ibcon#end of sib2, iclass 17, count 0 2006.229.20:26:04.97#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:26:04.97#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:26:04.97#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:26:04.97#ibcon#*before write, iclass 17, count 0 2006.229.20:26:04.97#ibcon#enter sib2, iclass 17, count 0 2006.229.20:26:04.97#ibcon#flushed, iclass 17, count 0 2006.229.20:26:04.97#ibcon#about to write, iclass 17, count 0 2006.229.20:26:04.97#ibcon#wrote, iclass 17, count 0 2006.229.20:26:04.97#ibcon#about to read 3, iclass 17, count 0 2006.229.20:26:05.01#ibcon#read 3, iclass 17, count 0 2006.229.20:26:05.01#ibcon#about to read 4, iclass 17, count 0 2006.229.20:26:05.01#ibcon#read 4, iclass 17, count 0 2006.229.20:26:05.01#ibcon#about to read 5, iclass 17, count 0 2006.229.20:26:05.01#ibcon#read 5, iclass 17, count 0 2006.229.20:26:05.01#ibcon#about to read 6, iclass 17, count 0 2006.229.20:26:05.01#ibcon#read 6, iclass 17, count 0 2006.229.20:26:05.01#ibcon#end of sib2, iclass 17, count 0 2006.229.20:26:05.01#ibcon#*after write, iclass 17, count 0 2006.229.20:26:05.01#ibcon#*before return 0, iclass 17, count 0 2006.229.20:26:05.01#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:05.01#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:05.01#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:26:05.01#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:26:05.01$vck44/va=3,6 2006.229.20:26:05.01#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.20:26:05.01#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.20:26:05.01#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:05.01#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:05.07#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:05.07#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:05.07#ibcon#enter wrdev, iclass 19, count 2 2006.229.20:26:05.07#ibcon#first serial, iclass 19, count 2 2006.229.20:26:05.07#ibcon#enter sib2, iclass 19, count 2 2006.229.20:26:05.07#ibcon#flushed, iclass 19, count 2 2006.229.20:26:05.07#ibcon#about to write, iclass 19, count 2 2006.229.20:26:05.07#ibcon#wrote, iclass 19, count 2 2006.229.20:26:05.07#ibcon#about to read 3, iclass 19, count 2 2006.229.20:26:05.09#ibcon#read 3, iclass 19, count 2 2006.229.20:26:05.09#ibcon#about to read 4, iclass 19, count 2 2006.229.20:26:05.09#ibcon#read 4, iclass 19, count 2 2006.229.20:26:05.09#ibcon#about to read 5, iclass 19, count 2 2006.229.20:26:05.09#ibcon#read 5, iclass 19, count 2 2006.229.20:26:05.09#ibcon#about to read 6, iclass 19, count 2 2006.229.20:26:05.09#ibcon#read 6, iclass 19, count 2 2006.229.20:26:05.09#ibcon#end of sib2, iclass 19, count 2 2006.229.20:26:05.09#ibcon#*mode == 0, iclass 19, count 2 2006.229.20:26:05.09#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.20:26:05.09#ibcon#[25=AT03-06\r\n] 2006.229.20:26:05.09#ibcon#*before write, iclass 19, count 2 2006.229.20:26:05.09#ibcon#enter sib2, iclass 19, count 2 2006.229.20:26:05.09#ibcon#flushed, iclass 19, count 2 2006.229.20:26:05.09#ibcon#about to write, iclass 19, count 2 2006.229.20:26:05.09#ibcon#wrote, iclass 19, count 2 2006.229.20:26:05.09#ibcon#about to read 3, iclass 19, count 2 2006.229.20:26:05.12#ibcon#read 3, iclass 19, count 2 2006.229.20:26:05.12#ibcon#about to read 4, iclass 19, count 2 2006.229.20:26:05.12#ibcon#read 4, iclass 19, count 2 2006.229.20:26:05.12#ibcon#about to read 5, iclass 19, count 2 2006.229.20:26:05.12#ibcon#read 5, iclass 19, count 2 2006.229.20:26:05.12#ibcon#about to read 6, iclass 19, count 2 2006.229.20:26:05.12#ibcon#read 6, iclass 19, count 2 2006.229.20:26:05.12#ibcon#end of sib2, iclass 19, count 2 2006.229.20:26:05.12#ibcon#*after write, iclass 19, count 2 2006.229.20:26:05.12#ibcon#*before return 0, iclass 19, count 2 2006.229.20:26:05.12#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:05.12#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:05.12#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.20:26:05.12#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:05.12#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:05.24#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:05.24#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:05.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:26:05.24#ibcon#first serial, iclass 19, count 0 2006.229.20:26:05.24#ibcon#enter sib2, iclass 19, count 0 2006.229.20:26:05.24#ibcon#flushed, iclass 19, count 0 2006.229.20:26:05.24#ibcon#about to write, iclass 19, count 0 2006.229.20:26:05.24#ibcon#wrote, iclass 19, count 0 2006.229.20:26:05.24#ibcon#about to read 3, iclass 19, count 0 2006.229.20:26:05.26#ibcon#read 3, iclass 19, count 0 2006.229.20:26:05.26#ibcon#about to read 4, iclass 19, count 0 2006.229.20:26:05.26#ibcon#read 4, iclass 19, count 0 2006.229.20:26:05.26#ibcon#about to read 5, iclass 19, count 0 2006.229.20:26:05.26#ibcon#read 5, iclass 19, count 0 2006.229.20:26:05.26#ibcon#about to read 6, iclass 19, count 0 2006.229.20:26:05.26#ibcon#read 6, iclass 19, count 0 2006.229.20:26:05.26#ibcon#end of sib2, iclass 19, count 0 2006.229.20:26:05.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:26:05.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:26:05.26#ibcon#[25=USB\r\n] 2006.229.20:26:05.26#ibcon#*before write, iclass 19, count 0 2006.229.20:26:05.26#ibcon#enter sib2, iclass 19, count 0 2006.229.20:26:05.26#ibcon#flushed, iclass 19, count 0 2006.229.20:26:05.26#ibcon#about to write, iclass 19, count 0 2006.229.20:26:05.26#ibcon#wrote, iclass 19, count 0 2006.229.20:26:05.26#ibcon#about to read 3, iclass 19, count 0 2006.229.20:26:05.29#ibcon#read 3, iclass 19, count 0 2006.229.20:26:05.29#ibcon#about to read 4, iclass 19, count 0 2006.229.20:26:05.29#ibcon#read 4, iclass 19, count 0 2006.229.20:26:05.29#ibcon#about to read 5, iclass 19, count 0 2006.229.20:26:05.29#ibcon#read 5, iclass 19, count 0 2006.229.20:26:05.29#ibcon#about to read 6, iclass 19, count 0 2006.229.20:26:05.29#ibcon#read 6, iclass 19, count 0 2006.229.20:26:05.29#ibcon#end of sib2, iclass 19, count 0 2006.229.20:26:05.29#ibcon#*after write, iclass 19, count 0 2006.229.20:26:05.29#ibcon#*before return 0, iclass 19, count 0 2006.229.20:26:05.29#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:05.29#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:05.29#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:26:05.29#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:26:05.29$vck44/valo=4,624.99 2006.229.20:26:05.29#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:26:05.29#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:26:05.29#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:05.29#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:05.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:05.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:05.29#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:26:05.29#ibcon#first serial, iclass 21, count 0 2006.229.20:26:05.29#ibcon#enter sib2, iclass 21, count 0 2006.229.20:26:05.29#ibcon#flushed, iclass 21, count 0 2006.229.20:26:05.29#ibcon#about to write, iclass 21, count 0 2006.229.20:26:05.29#ibcon#wrote, iclass 21, count 0 2006.229.20:26:05.29#ibcon#about to read 3, iclass 21, count 0 2006.229.20:26:05.31#ibcon#read 3, iclass 21, count 0 2006.229.20:26:05.31#ibcon#about to read 4, iclass 21, count 0 2006.229.20:26:05.31#ibcon#read 4, iclass 21, count 0 2006.229.20:26:05.31#ibcon#about to read 5, iclass 21, count 0 2006.229.20:26:05.31#ibcon#read 5, iclass 21, count 0 2006.229.20:26:05.31#ibcon#about to read 6, iclass 21, count 0 2006.229.20:26:05.31#ibcon#read 6, iclass 21, count 0 2006.229.20:26:05.31#ibcon#end of sib2, iclass 21, count 0 2006.229.20:26:05.31#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:26:05.31#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:26:05.31#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:26:05.31#ibcon#*before write, iclass 21, count 0 2006.229.20:26:05.31#ibcon#enter sib2, iclass 21, count 0 2006.229.20:26:05.31#ibcon#flushed, iclass 21, count 0 2006.229.20:26:05.31#ibcon#about to write, iclass 21, count 0 2006.229.20:26:05.31#ibcon#wrote, iclass 21, count 0 2006.229.20:26:05.31#ibcon#about to read 3, iclass 21, count 0 2006.229.20:26:05.35#ibcon#read 3, iclass 21, count 0 2006.229.20:26:05.35#ibcon#about to read 4, iclass 21, count 0 2006.229.20:26:05.35#ibcon#read 4, iclass 21, count 0 2006.229.20:26:05.35#ibcon#about to read 5, iclass 21, count 0 2006.229.20:26:05.35#ibcon#read 5, iclass 21, count 0 2006.229.20:26:05.35#ibcon#about to read 6, iclass 21, count 0 2006.229.20:26:05.35#ibcon#read 6, iclass 21, count 0 2006.229.20:26:05.35#ibcon#end of sib2, iclass 21, count 0 2006.229.20:26:05.35#ibcon#*after write, iclass 21, count 0 2006.229.20:26:05.35#ibcon#*before return 0, iclass 21, count 0 2006.229.20:26:05.35#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:05.35#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:05.35#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:26:05.35#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:26:05.35$vck44/va=4,7 2006.229.20:26:05.35#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:26:05.35#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:26:05.35#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:05.35#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:05.41#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:05.41#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:05.41#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:26:05.41#ibcon#first serial, iclass 23, count 2 2006.229.20:26:05.41#ibcon#enter sib2, iclass 23, count 2 2006.229.20:26:05.41#ibcon#flushed, iclass 23, count 2 2006.229.20:26:05.41#ibcon#about to write, iclass 23, count 2 2006.229.20:26:05.41#ibcon#wrote, iclass 23, count 2 2006.229.20:26:05.41#ibcon#about to read 3, iclass 23, count 2 2006.229.20:26:05.43#ibcon#read 3, iclass 23, count 2 2006.229.20:26:05.43#ibcon#about to read 4, iclass 23, count 2 2006.229.20:26:05.43#ibcon#read 4, iclass 23, count 2 2006.229.20:26:05.43#ibcon#about to read 5, iclass 23, count 2 2006.229.20:26:05.43#ibcon#read 5, iclass 23, count 2 2006.229.20:26:05.43#ibcon#about to read 6, iclass 23, count 2 2006.229.20:26:05.43#ibcon#read 6, iclass 23, count 2 2006.229.20:26:05.43#ibcon#end of sib2, iclass 23, count 2 2006.229.20:26:05.43#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:26:05.43#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:26:05.43#ibcon#[25=AT04-07\r\n] 2006.229.20:26:05.43#ibcon#*before write, iclass 23, count 2 2006.229.20:26:05.43#ibcon#enter sib2, iclass 23, count 2 2006.229.20:26:05.43#ibcon#flushed, iclass 23, count 2 2006.229.20:26:05.43#ibcon#about to write, iclass 23, count 2 2006.229.20:26:05.43#ibcon#wrote, iclass 23, count 2 2006.229.20:26:05.43#ibcon#about to read 3, iclass 23, count 2 2006.229.20:26:05.46#ibcon#read 3, iclass 23, count 2 2006.229.20:26:05.46#ibcon#about to read 4, iclass 23, count 2 2006.229.20:26:05.46#ibcon#read 4, iclass 23, count 2 2006.229.20:26:05.46#ibcon#about to read 5, iclass 23, count 2 2006.229.20:26:05.46#ibcon#read 5, iclass 23, count 2 2006.229.20:26:05.46#ibcon#about to read 6, iclass 23, count 2 2006.229.20:26:05.46#ibcon#read 6, iclass 23, count 2 2006.229.20:26:05.46#ibcon#end of sib2, iclass 23, count 2 2006.229.20:26:05.46#ibcon#*after write, iclass 23, count 2 2006.229.20:26:05.46#ibcon#*before return 0, iclass 23, count 2 2006.229.20:26:05.46#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:05.47#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:05.47#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:26:05.47#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:05.47#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:05.58#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:05.58#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:05.58#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:26:05.58#ibcon#first serial, iclass 23, count 0 2006.229.20:26:05.58#ibcon#enter sib2, iclass 23, count 0 2006.229.20:26:05.58#ibcon#flushed, iclass 23, count 0 2006.229.20:26:05.58#ibcon#about to write, iclass 23, count 0 2006.229.20:26:05.58#ibcon#wrote, iclass 23, count 0 2006.229.20:26:05.58#ibcon#about to read 3, iclass 23, count 0 2006.229.20:26:05.60#ibcon#read 3, iclass 23, count 0 2006.229.20:26:05.60#ibcon#about to read 4, iclass 23, count 0 2006.229.20:26:05.60#ibcon#read 4, iclass 23, count 0 2006.229.20:26:05.60#ibcon#about to read 5, iclass 23, count 0 2006.229.20:26:05.60#ibcon#read 5, iclass 23, count 0 2006.229.20:26:05.60#ibcon#about to read 6, iclass 23, count 0 2006.229.20:26:05.60#ibcon#read 6, iclass 23, count 0 2006.229.20:26:05.60#ibcon#end of sib2, iclass 23, count 0 2006.229.20:26:05.60#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:26:05.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:26:05.60#ibcon#[25=USB\r\n] 2006.229.20:26:05.60#ibcon#*before write, iclass 23, count 0 2006.229.20:26:05.60#ibcon#enter sib2, iclass 23, count 0 2006.229.20:26:05.60#ibcon#flushed, iclass 23, count 0 2006.229.20:26:05.60#ibcon#about to write, iclass 23, count 0 2006.229.20:26:05.60#ibcon#wrote, iclass 23, count 0 2006.229.20:26:05.60#ibcon#about to read 3, iclass 23, count 0 2006.229.20:26:05.63#ibcon#read 3, iclass 23, count 0 2006.229.20:26:05.63#ibcon#about to read 4, iclass 23, count 0 2006.229.20:26:05.63#ibcon#read 4, iclass 23, count 0 2006.229.20:26:05.63#ibcon#about to read 5, iclass 23, count 0 2006.229.20:26:05.63#ibcon#read 5, iclass 23, count 0 2006.229.20:26:05.63#ibcon#about to read 6, iclass 23, count 0 2006.229.20:26:05.63#ibcon#read 6, iclass 23, count 0 2006.229.20:26:05.63#ibcon#end of sib2, iclass 23, count 0 2006.229.20:26:05.63#ibcon#*after write, iclass 23, count 0 2006.229.20:26:05.63#ibcon#*before return 0, iclass 23, count 0 2006.229.20:26:05.63#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:05.63#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:05.63#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:26:05.63#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:26:05.63$vck44/valo=5,734.99 2006.229.20:26:05.63#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.20:26:05.63#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.20:26:05.63#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:05.63#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:05.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:05.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:05.63#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:26:05.63#ibcon#first serial, iclass 25, count 0 2006.229.20:26:05.63#ibcon#enter sib2, iclass 25, count 0 2006.229.20:26:05.63#ibcon#flushed, iclass 25, count 0 2006.229.20:26:05.63#ibcon#about to write, iclass 25, count 0 2006.229.20:26:05.63#ibcon#wrote, iclass 25, count 0 2006.229.20:26:05.63#ibcon#about to read 3, iclass 25, count 0 2006.229.20:26:05.65#ibcon#read 3, iclass 25, count 0 2006.229.20:26:05.65#ibcon#about to read 4, iclass 25, count 0 2006.229.20:26:05.65#ibcon#read 4, iclass 25, count 0 2006.229.20:26:05.65#ibcon#about to read 5, iclass 25, count 0 2006.229.20:26:05.65#ibcon#read 5, iclass 25, count 0 2006.229.20:26:05.65#ibcon#about to read 6, iclass 25, count 0 2006.229.20:26:05.65#ibcon#read 6, iclass 25, count 0 2006.229.20:26:05.65#ibcon#end of sib2, iclass 25, count 0 2006.229.20:26:05.65#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:26:05.65#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:26:05.65#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:26:05.65#ibcon#*before write, iclass 25, count 0 2006.229.20:26:05.65#ibcon#enter sib2, iclass 25, count 0 2006.229.20:26:05.65#ibcon#flushed, iclass 25, count 0 2006.229.20:26:05.65#ibcon#about to write, iclass 25, count 0 2006.229.20:26:05.65#ibcon#wrote, iclass 25, count 0 2006.229.20:26:05.65#ibcon#about to read 3, iclass 25, count 0 2006.229.20:26:05.69#ibcon#read 3, iclass 25, count 0 2006.229.20:26:05.69#ibcon#about to read 4, iclass 25, count 0 2006.229.20:26:05.69#ibcon#read 4, iclass 25, count 0 2006.229.20:26:05.69#ibcon#about to read 5, iclass 25, count 0 2006.229.20:26:05.69#ibcon#read 5, iclass 25, count 0 2006.229.20:26:05.69#ibcon#about to read 6, iclass 25, count 0 2006.229.20:26:05.69#ibcon#read 6, iclass 25, count 0 2006.229.20:26:05.69#ibcon#end of sib2, iclass 25, count 0 2006.229.20:26:05.69#ibcon#*after write, iclass 25, count 0 2006.229.20:26:05.69#ibcon#*before return 0, iclass 25, count 0 2006.229.20:26:05.69#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:05.69#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:05.69#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:26:05.69#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:26:05.69$vck44/va=5,4 2006.229.20:26:05.69#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.20:26:05.69#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.20:26:05.69#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:05.69#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:05.75#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:05.75#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:05.75#ibcon#enter wrdev, iclass 27, count 2 2006.229.20:26:05.75#ibcon#first serial, iclass 27, count 2 2006.229.20:26:05.75#ibcon#enter sib2, iclass 27, count 2 2006.229.20:26:05.75#ibcon#flushed, iclass 27, count 2 2006.229.20:26:05.75#ibcon#about to write, iclass 27, count 2 2006.229.20:26:05.75#ibcon#wrote, iclass 27, count 2 2006.229.20:26:05.75#ibcon#about to read 3, iclass 27, count 2 2006.229.20:26:05.77#ibcon#read 3, iclass 27, count 2 2006.229.20:26:05.77#ibcon#about to read 4, iclass 27, count 2 2006.229.20:26:05.77#ibcon#read 4, iclass 27, count 2 2006.229.20:26:05.77#ibcon#about to read 5, iclass 27, count 2 2006.229.20:26:05.77#ibcon#read 5, iclass 27, count 2 2006.229.20:26:05.77#ibcon#about to read 6, iclass 27, count 2 2006.229.20:26:05.77#ibcon#read 6, iclass 27, count 2 2006.229.20:26:05.77#ibcon#end of sib2, iclass 27, count 2 2006.229.20:26:05.77#ibcon#*mode == 0, iclass 27, count 2 2006.229.20:26:05.77#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.20:26:05.77#ibcon#[25=AT05-04\r\n] 2006.229.20:26:05.77#ibcon#*before write, iclass 27, count 2 2006.229.20:26:05.77#ibcon#enter sib2, iclass 27, count 2 2006.229.20:26:05.77#ibcon#flushed, iclass 27, count 2 2006.229.20:26:05.77#ibcon#about to write, iclass 27, count 2 2006.229.20:26:05.77#ibcon#wrote, iclass 27, count 2 2006.229.20:26:05.77#ibcon#about to read 3, iclass 27, count 2 2006.229.20:26:05.80#ibcon#read 3, iclass 27, count 2 2006.229.20:26:05.80#ibcon#about to read 4, iclass 27, count 2 2006.229.20:26:05.80#ibcon#read 4, iclass 27, count 2 2006.229.20:26:05.80#ibcon#about to read 5, iclass 27, count 2 2006.229.20:26:05.80#ibcon#read 5, iclass 27, count 2 2006.229.20:26:05.80#ibcon#about to read 6, iclass 27, count 2 2006.229.20:26:05.80#ibcon#read 6, iclass 27, count 2 2006.229.20:26:05.80#ibcon#end of sib2, iclass 27, count 2 2006.229.20:26:05.80#ibcon#*after write, iclass 27, count 2 2006.229.20:26:05.80#ibcon#*before return 0, iclass 27, count 2 2006.229.20:26:05.80#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:05.80#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:05.80#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.20:26:05.80#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:05.80#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:05.92#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:05.92#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:05.92#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:26:05.92#ibcon#first serial, iclass 27, count 0 2006.229.20:26:05.92#ibcon#enter sib2, iclass 27, count 0 2006.229.20:26:05.92#ibcon#flushed, iclass 27, count 0 2006.229.20:26:05.92#ibcon#about to write, iclass 27, count 0 2006.229.20:26:05.92#ibcon#wrote, iclass 27, count 0 2006.229.20:26:05.92#ibcon#about to read 3, iclass 27, count 0 2006.229.20:26:05.94#ibcon#read 3, iclass 27, count 0 2006.229.20:26:05.94#ibcon#about to read 4, iclass 27, count 0 2006.229.20:26:05.94#ibcon#read 4, iclass 27, count 0 2006.229.20:26:05.94#ibcon#about to read 5, iclass 27, count 0 2006.229.20:26:05.94#ibcon#read 5, iclass 27, count 0 2006.229.20:26:05.94#ibcon#about to read 6, iclass 27, count 0 2006.229.20:26:05.94#ibcon#read 6, iclass 27, count 0 2006.229.20:26:05.94#ibcon#end of sib2, iclass 27, count 0 2006.229.20:26:05.94#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:26:05.94#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:26:05.94#ibcon#[25=USB\r\n] 2006.229.20:26:05.94#ibcon#*before write, iclass 27, count 0 2006.229.20:26:05.94#ibcon#enter sib2, iclass 27, count 0 2006.229.20:26:05.94#ibcon#flushed, iclass 27, count 0 2006.229.20:26:05.94#ibcon#about to write, iclass 27, count 0 2006.229.20:26:05.94#ibcon#wrote, iclass 27, count 0 2006.229.20:26:05.94#ibcon#about to read 3, iclass 27, count 0 2006.229.20:26:05.97#ibcon#read 3, iclass 27, count 0 2006.229.20:26:05.97#ibcon#about to read 4, iclass 27, count 0 2006.229.20:26:05.97#ibcon#read 4, iclass 27, count 0 2006.229.20:26:05.97#ibcon#about to read 5, iclass 27, count 0 2006.229.20:26:05.97#ibcon#read 5, iclass 27, count 0 2006.229.20:26:05.97#ibcon#about to read 6, iclass 27, count 0 2006.229.20:26:05.97#ibcon#read 6, iclass 27, count 0 2006.229.20:26:05.97#ibcon#end of sib2, iclass 27, count 0 2006.229.20:26:05.97#ibcon#*after write, iclass 27, count 0 2006.229.20:26:05.97#ibcon#*before return 0, iclass 27, count 0 2006.229.20:26:05.97#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:05.97#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:05.97#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:26:05.97#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:26:05.97$vck44/valo=6,814.99 2006.229.20:26:05.97#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:26:05.97#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:26:05.97#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:05.97#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:05.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:05.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:05.97#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:26:05.97#ibcon#first serial, iclass 29, count 0 2006.229.20:26:05.97#ibcon#enter sib2, iclass 29, count 0 2006.229.20:26:05.97#ibcon#flushed, iclass 29, count 0 2006.229.20:26:05.97#ibcon#about to write, iclass 29, count 0 2006.229.20:26:05.97#ibcon#wrote, iclass 29, count 0 2006.229.20:26:05.97#ibcon#about to read 3, iclass 29, count 0 2006.229.20:26:05.99#ibcon#read 3, iclass 29, count 0 2006.229.20:26:05.99#ibcon#about to read 4, iclass 29, count 0 2006.229.20:26:05.99#ibcon#read 4, iclass 29, count 0 2006.229.20:26:05.99#ibcon#about to read 5, iclass 29, count 0 2006.229.20:26:05.99#ibcon#read 5, iclass 29, count 0 2006.229.20:26:05.99#ibcon#about to read 6, iclass 29, count 0 2006.229.20:26:05.99#ibcon#read 6, iclass 29, count 0 2006.229.20:26:05.99#ibcon#end of sib2, iclass 29, count 0 2006.229.20:26:05.99#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:26:05.99#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:26:05.99#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:26:05.99#ibcon#*before write, iclass 29, count 0 2006.229.20:26:05.99#ibcon#enter sib2, iclass 29, count 0 2006.229.20:26:05.99#ibcon#flushed, iclass 29, count 0 2006.229.20:26:05.99#ibcon#about to write, iclass 29, count 0 2006.229.20:26:05.99#ibcon#wrote, iclass 29, count 0 2006.229.20:26:05.99#ibcon#about to read 3, iclass 29, count 0 2006.229.20:26:06.03#ibcon#read 3, iclass 29, count 0 2006.229.20:26:06.03#ibcon#about to read 4, iclass 29, count 0 2006.229.20:26:06.03#ibcon#read 4, iclass 29, count 0 2006.229.20:26:06.03#ibcon#about to read 5, iclass 29, count 0 2006.229.20:26:06.03#ibcon#read 5, iclass 29, count 0 2006.229.20:26:06.03#ibcon#about to read 6, iclass 29, count 0 2006.229.20:26:06.03#ibcon#read 6, iclass 29, count 0 2006.229.20:26:06.03#ibcon#end of sib2, iclass 29, count 0 2006.229.20:26:06.03#ibcon#*after write, iclass 29, count 0 2006.229.20:26:06.03#ibcon#*before return 0, iclass 29, count 0 2006.229.20:26:06.03#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:06.03#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:06.03#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:26:06.03#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:26:06.03$vck44/va=6,4 2006.229.20:26:06.03#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.20:26:06.03#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.20:26:06.03#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:06.03#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:06.09#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:06.09#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:06.09#ibcon#enter wrdev, iclass 31, count 2 2006.229.20:26:06.09#ibcon#first serial, iclass 31, count 2 2006.229.20:26:06.09#ibcon#enter sib2, iclass 31, count 2 2006.229.20:26:06.09#ibcon#flushed, iclass 31, count 2 2006.229.20:26:06.09#ibcon#about to write, iclass 31, count 2 2006.229.20:26:06.09#ibcon#wrote, iclass 31, count 2 2006.229.20:26:06.09#ibcon#about to read 3, iclass 31, count 2 2006.229.20:26:06.11#ibcon#read 3, iclass 31, count 2 2006.229.20:26:06.11#ibcon#about to read 4, iclass 31, count 2 2006.229.20:26:06.11#ibcon#read 4, iclass 31, count 2 2006.229.20:26:06.11#ibcon#about to read 5, iclass 31, count 2 2006.229.20:26:06.11#ibcon#read 5, iclass 31, count 2 2006.229.20:26:06.11#ibcon#about to read 6, iclass 31, count 2 2006.229.20:26:06.11#ibcon#read 6, iclass 31, count 2 2006.229.20:26:06.11#ibcon#end of sib2, iclass 31, count 2 2006.229.20:26:06.11#ibcon#*mode == 0, iclass 31, count 2 2006.229.20:26:06.11#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.20:26:06.11#ibcon#[25=AT06-04\r\n] 2006.229.20:26:06.11#ibcon#*before write, iclass 31, count 2 2006.229.20:26:06.11#ibcon#enter sib2, iclass 31, count 2 2006.229.20:26:06.11#ibcon#flushed, iclass 31, count 2 2006.229.20:26:06.11#ibcon#about to write, iclass 31, count 2 2006.229.20:26:06.11#ibcon#wrote, iclass 31, count 2 2006.229.20:26:06.11#ibcon#about to read 3, iclass 31, count 2 2006.229.20:26:06.14#ibcon#read 3, iclass 31, count 2 2006.229.20:26:06.14#ibcon#about to read 4, iclass 31, count 2 2006.229.20:26:06.14#ibcon#read 4, iclass 31, count 2 2006.229.20:26:06.14#ibcon#about to read 5, iclass 31, count 2 2006.229.20:26:06.14#ibcon#read 5, iclass 31, count 2 2006.229.20:26:06.14#ibcon#about to read 6, iclass 31, count 2 2006.229.20:26:06.14#ibcon#read 6, iclass 31, count 2 2006.229.20:26:06.14#ibcon#end of sib2, iclass 31, count 2 2006.229.20:26:06.14#ibcon#*after write, iclass 31, count 2 2006.229.20:26:06.14#ibcon#*before return 0, iclass 31, count 2 2006.229.20:26:06.14#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:06.14#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:06.14#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.20:26:06.14#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:06.14#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:06.26#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:06.26#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:06.26#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:26:06.26#ibcon#first serial, iclass 31, count 0 2006.229.20:26:06.26#ibcon#enter sib2, iclass 31, count 0 2006.229.20:26:06.26#ibcon#flushed, iclass 31, count 0 2006.229.20:26:06.26#ibcon#about to write, iclass 31, count 0 2006.229.20:26:06.26#ibcon#wrote, iclass 31, count 0 2006.229.20:26:06.26#ibcon#about to read 3, iclass 31, count 0 2006.229.20:26:06.28#ibcon#read 3, iclass 31, count 0 2006.229.20:26:06.28#ibcon#about to read 4, iclass 31, count 0 2006.229.20:26:06.28#ibcon#read 4, iclass 31, count 0 2006.229.20:26:06.28#ibcon#about to read 5, iclass 31, count 0 2006.229.20:26:06.28#ibcon#read 5, iclass 31, count 0 2006.229.20:26:06.28#ibcon#about to read 6, iclass 31, count 0 2006.229.20:26:06.28#ibcon#read 6, iclass 31, count 0 2006.229.20:26:06.28#ibcon#end of sib2, iclass 31, count 0 2006.229.20:26:06.28#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:26:06.28#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:26:06.28#ibcon#[25=USB\r\n] 2006.229.20:26:06.28#ibcon#*before write, iclass 31, count 0 2006.229.20:26:06.28#ibcon#enter sib2, iclass 31, count 0 2006.229.20:26:06.28#ibcon#flushed, iclass 31, count 0 2006.229.20:26:06.28#ibcon#about to write, iclass 31, count 0 2006.229.20:26:06.28#ibcon#wrote, iclass 31, count 0 2006.229.20:26:06.28#ibcon#about to read 3, iclass 31, count 0 2006.229.20:26:06.31#ibcon#read 3, iclass 31, count 0 2006.229.20:26:06.31#ibcon#about to read 4, iclass 31, count 0 2006.229.20:26:06.31#ibcon#read 4, iclass 31, count 0 2006.229.20:26:06.31#ibcon#about to read 5, iclass 31, count 0 2006.229.20:26:06.31#ibcon#read 5, iclass 31, count 0 2006.229.20:26:06.31#ibcon#about to read 6, iclass 31, count 0 2006.229.20:26:06.31#ibcon#read 6, iclass 31, count 0 2006.229.20:26:06.31#ibcon#end of sib2, iclass 31, count 0 2006.229.20:26:06.31#ibcon#*after write, iclass 31, count 0 2006.229.20:26:06.31#ibcon#*before return 0, iclass 31, count 0 2006.229.20:26:06.31#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:06.31#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:06.31#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:26:06.31#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:26:06.31$vck44/valo=7,864.99 2006.229.20:26:06.31#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.20:26:06.31#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.20:26:06.31#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:06.31#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:06.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:06.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:06.31#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:26:06.31#ibcon#first serial, iclass 33, count 0 2006.229.20:26:06.31#ibcon#enter sib2, iclass 33, count 0 2006.229.20:26:06.31#ibcon#flushed, iclass 33, count 0 2006.229.20:26:06.31#ibcon#about to write, iclass 33, count 0 2006.229.20:26:06.31#ibcon#wrote, iclass 33, count 0 2006.229.20:26:06.31#ibcon#about to read 3, iclass 33, count 0 2006.229.20:26:06.33#ibcon#read 3, iclass 33, count 0 2006.229.20:26:06.33#ibcon#about to read 4, iclass 33, count 0 2006.229.20:26:06.33#ibcon#read 4, iclass 33, count 0 2006.229.20:26:06.33#ibcon#about to read 5, iclass 33, count 0 2006.229.20:26:06.33#ibcon#read 5, iclass 33, count 0 2006.229.20:26:06.33#ibcon#about to read 6, iclass 33, count 0 2006.229.20:26:06.33#ibcon#read 6, iclass 33, count 0 2006.229.20:26:06.33#ibcon#end of sib2, iclass 33, count 0 2006.229.20:26:06.33#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:26:06.33#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:26:06.33#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:26:06.33#ibcon#*before write, iclass 33, count 0 2006.229.20:26:06.33#ibcon#enter sib2, iclass 33, count 0 2006.229.20:26:06.33#ibcon#flushed, iclass 33, count 0 2006.229.20:26:06.33#ibcon#about to write, iclass 33, count 0 2006.229.20:26:06.33#ibcon#wrote, iclass 33, count 0 2006.229.20:26:06.33#ibcon#about to read 3, iclass 33, count 0 2006.229.20:26:06.37#ibcon#read 3, iclass 33, count 0 2006.229.20:26:06.37#ibcon#about to read 4, iclass 33, count 0 2006.229.20:26:06.37#ibcon#read 4, iclass 33, count 0 2006.229.20:26:06.37#ibcon#about to read 5, iclass 33, count 0 2006.229.20:26:06.37#ibcon#read 5, iclass 33, count 0 2006.229.20:26:06.37#ibcon#about to read 6, iclass 33, count 0 2006.229.20:26:06.37#ibcon#read 6, iclass 33, count 0 2006.229.20:26:06.37#ibcon#end of sib2, iclass 33, count 0 2006.229.20:26:06.37#ibcon#*after write, iclass 33, count 0 2006.229.20:26:06.37#ibcon#*before return 0, iclass 33, count 0 2006.229.20:26:06.37#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:06.37#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:06.37#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:26:06.37#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:26:06.37$vck44/va=7,5 2006.229.20:26:06.37#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.20:26:06.37#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.20:26:06.37#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:06.37#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:06.43#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:06.43#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:06.43#ibcon#enter wrdev, iclass 35, count 2 2006.229.20:26:06.43#ibcon#first serial, iclass 35, count 2 2006.229.20:26:06.43#ibcon#enter sib2, iclass 35, count 2 2006.229.20:26:06.43#ibcon#flushed, iclass 35, count 2 2006.229.20:26:06.43#ibcon#about to write, iclass 35, count 2 2006.229.20:26:06.43#ibcon#wrote, iclass 35, count 2 2006.229.20:26:06.43#ibcon#about to read 3, iclass 35, count 2 2006.229.20:26:06.45#ibcon#read 3, iclass 35, count 2 2006.229.20:26:06.45#ibcon#about to read 4, iclass 35, count 2 2006.229.20:26:06.45#ibcon#read 4, iclass 35, count 2 2006.229.20:26:06.45#ibcon#about to read 5, iclass 35, count 2 2006.229.20:26:06.45#ibcon#read 5, iclass 35, count 2 2006.229.20:26:06.45#ibcon#about to read 6, iclass 35, count 2 2006.229.20:26:06.45#ibcon#read 6, iclass 35, count 2 2006.229.20:26:06.45#ibcon#end of sib2, iclass 35, count 2 2006.229.20:26:06.45#ibcon#*mode == 0, iclass 35, count 2 2006.229.20:26:06.45#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.20:26:06.45#ibcon#[25=AT07-05\r\n] 2006.229.20:26:06.45#ibcon#*before write, iclass 35, count 2 2006.229.20:26:06.45#ibcon#enter sib2, iclass 35, count 2 2006.229.20:26:06.45#ibcon#flushed, iclass 35, count 2 2006.229.20:26:06.45#ibcon#about to write, iclass 35, count 2 2006.229.20:26:06.45#ibcon#wrote, iclass 35, count 2 2006.229.20:26:06.45#ibcon#about to read 3, iclass 35, count 2 2006.229.20:26:06.48#ibcon#read 3, iclass 35, count 2 2006.229.20:26:06.48#ibcon#about to read 4, iclass 35, count 2 2006.229.20:26:06.48#ibcon#read 4, iclass 35, count 2 2006.229.20:26:06.48#ibcon#about to read 5, iclass 35, count 2 2006.229.20:26:06.48#ibcon#read 5, iclass 35, count 2 2006.229.20:26:06.48#ibcon#about to read 6, iclass 35, count 2 2006.229.20:26:06.48#ibcon#read 6, iclass 35, count 2 2006.229.20:26:06.48#ibcon#end of sib2, iclass 35, count 2 2006.229.20:26:06.48#ibcon#*after write, iclass 35, count 2 2006.229.20:26:06.48#ibcon#*before return 0, iclass 35, count 2 2006.229.20:26:06.48#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:06.48#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:06.48#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.20:26:06.48#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:06.48#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:06.60#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:06.60#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:06.60#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:26:06.60#ibcon#first serial, iclass 35, count 0 2006.229.20:26:06.60#ibcon#enter sib2, iclass 35, count 0 2006.229.20:26:06.60#ibcon#flushed, iclass 35, count 0 2006.229.20:26:06.60#ibcon#about to write, iclass 35, count 0 2006.229.20:26:06.60#ibcon#wrote, iclass 35, count 0 2006.229.20:26:06.60#ibcon#about to read 3, iclass 35, count 0 2006.229.20:26:06.62#ibcon#read 3, iclass 35, count 0 2006.229.20:26:06.62#ibcon#about to read 4, iclass 35, count 0 2006.229.20:26:06.62#ibcon#read 4, iclass 35, count 0 2006.229.20:26:06.62#ibcon#about to read 5, iclass 35, count 0 2006.229.20:26:06.62#ibcon#read 5, iclass 35, count 0 2006.229.20:26:06.62#ibcon#about to read 6, iclass 35, count 0 2006.229.20:26:06.62#ibcon#read 6, iclass 35, count 0 2006.229.20:26:06.62#ibcon#end of sib2, iclass 35, count 0 2006.229.20:26:06.62#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:26:06.62#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:26:06.62#ibcon#[25=USB\r\n] 2006.229.20:26:06.62#ibcon#*before write, iclass 35, count 0 2006.229.20:26:06.62#ibcon#enter sib2, iclass 35, count 0 2006.229.20:26:06.62#ibcon#flushed, iclass 35, count 0 2006.229.20:26:06.62#ibcon#about to write, iclass 35, count 0 2006.229.20:26:06.62#ibcon#wrote, iclass 35, count 0 2006.229.20:26:06.62#ibcon#about to read 3, iclass 35, count 0 2006.229.20:26:06.65#ibcon#read 3, iclass 35, count 0 2006.229.20:26:06.65#ibcon#about to read 4, iclass 35, count 0 2006.229.20:26:06.65#ibcon#read 4, iclass 35, count 0 2006.229.20:26:06.65#ibcon#about to read 5, iclass 35, count 0 2006.229.20:26:06.65#ibcon#read 5, iclass 35, count 0 2006.229.20:26:06.65#ibcon#about to read 6, iclass 35, count 0 2006.229.20:26:06.65#ibcon#read 6, iclass 35, count 0 2006.229.20:26:06.65#ibcon#end of sib2, iclass 35, count 0 2006.229.20:26:06.65#ibcon#*after write, iclass 35, count 0 2006.229.20:26:06.65#ibcon#*before return 0, iclass 35, count 0 2006.229.20:26:06.65#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:06.65#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:06.65#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:26:06.65#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:26:06.65$vck44/valo=8,884.99 2006.229.20:26:06.65#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.20:26:06.65#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.20:26:06.65#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:06.65#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:06.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:06.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:06.65#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:26:06.65#ibcon#first serial, iclass 37, count 0 2006.229.20:26:06.65#ibcon#enter sib2, iclass 37, count 0 2006.229.20:26:06.65#ibcon#flushed, iclass 37, count 0 2006.229.20:26:06.65#ibcon#about to write, iclass 37, count 0 2006.229.20:26:06.65#ibcon#wrote, iclass 37, count 0 2006.229.20:26:06.65#ibcon#about to read 3, iclass 37, count 0 2006.229.20:26:06.67#ibcon#read 3, iclass 37, count 0 2006.229.20:26:06.67#ibcon#about to read 4, iclass 37, count 0 2006.229.20:26:06.67#ibcon#read 4, iclass 37, count 0 2006.229.20:26:06.67#ibcon#about to read 5, iclass 37, count 0 2006.229.20:26:06.67#ibcon#read 5, iclass 37, count 0 2006.229.20:26:06.67#ibcon#about to read 6, iclass 37, count 0 2006.229.20:26:06.67#ibcon#read 6, iclass 37, count 0 2006.229.20:26:06.67#ibcon#end of sib2, iclass 37, count 0 2006.229.20:26:06.67#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:26:06.67#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:26:06.67#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:26:06.67#ibcon#*before write, iclass 37, count 0 2006.229.20:26:06.67#ibcon#enter sib2, iclass 37, count 0 2006.229.20:26:06.67#ibcon#flushed, iclass 37, count 0 2006.229.20:26:06.67#ibcon#about to write, iclass 37, count 0 2006.229.20:26:06.67#ibcon#wrote, iclass 37, count 0 2006.229.20:26:06.67#ibcon#about to read 3, iclass 37, count 0 2006.229.20:26:06.71#ibcon#read 3, iclass 37, count 0 2006.229.20:26:06.71#ibcon#about to read 4, iclass 37, count 0 2006.229.20:26:06.71#ibcon#read 4, iclass 37, count 0 2006.229.20:26:06.71#ibcon#about to read 5, iclass 37, count 0 2006.229.20:26:06.71#ibcon#read 5, iclass 37, count 0 2006.229.20:26:06.71#ibcon#about to read 6, iclass 37, count 0 2006.229.20:26:06.71#ibcon#read 6, iclass 37, count 0 2006.229.20:26:06.71#ibcon#end of sib2, iclass 37, count 0 2006.229.20:26:06.71#ibcon#*after write, iclass 37, count 0 2006.229.20:26:06.71#ibcon#*before return 0, iclass 37, count 0 2006.229.20:26:06.71#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:06.71#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:06.71#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:26:06.71#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:26:06.71$vck44/va=8,6 2006.229.20:26:06.71#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.20:26:06.71#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.20:26:06.71#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:06.71#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:26:06.77#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:26:06.77#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:26:06.77#ibcon#enter wrdev, iclass 39, count 2 2006.229.20:26:06.77#ibcon#first serial, iclass 39, count 2 2006.229.20:26:06.77#ibcon#enter sib2, iclass 39, count 2 2006.229.20:26:06.77#ibcon#flushed, iclass 39, count 2 2006.229.20:26:06.77#ibcon#about to write, iclass 39, count 2 2006.229.20:26:06.77#ibcon#wrote, iclass 39, count 2 2006.229.20:26:06.77#ibcon#about to read 3, iclass 39, count 2 2006.229.20:26:06.79#ibcon#read 3, iclass 39, count 2 2006.229.20:26:06.79#ibcon#about to read 4, iclass 39, count 2 2006.229.20:26:06.79#ibcon#read 4, iclass 39, count 2 2006.229.20:26:06.79#ibcon#about to read 5, iclass 39, count 2 2006.229.20:26:06.79#ibcon#read 5, iclass 39, count 2 2006.229.20:26:06.79#ibcon#about to read 6, iclass 39, count 2 2006.229.20:26:06.79#ibcon#read 6, iclass 39, count 2 2006.229.20:26:06.79#ibcon#end of sib2, iclass 39, count 2 2006.229.20:26:06.79#ibcon#*mode == 0, iclass 39, count 2 2006.229.20:26:06.79#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.20:26:06.79#ibcon#[25=AT08-06\r\n] 2006.229.20:26:06.79#ibcon#*before write, iclass 39, count 2 2006.229.20:26:06.79#ibcon#enter sib2, iclass 39, count 2 2006.229.20:26:06.79#ibcon#flushed, iclass 39, count 2 2006.229.20:26:06.79#ibcon#about to write, iclass 39, count 2 2006.229.20:26:06.79#ibcon#wrote, iclass 39, count 2 2006.229.20:26:06.79#ibcon#about to read 3, iclass 39, count 2 2006.229.20:26:06.82#ibcon#read 3, iclass 39, count 2 2006.229.20:26:06.82#ibcon#about to read 4, iclass 39, count 2 2006.229.20:26:06.82#ibcon#read 4, iclass 39, count 2 2006.229.20:26:06.82#ibcon#about to read 5, iclass 39, count 2 2006.229.20:26:06.82#ibcon#read 5, iclass 39, count 2 2006.229.20:26:06.82#ibcon#about to read 6, iclass 39, count 2 2006.229.20:26:06.82#ibcon#read 6, iclass 39, count 2 2006.229.20:26:06.82#ibcon#end of sib2, iclass 39, count 2 2006.229.20:26:06.82#ibcon#*after write, iclass 39, count 2 2006.229.20:26:06.82#ibcon#*before return 0, iclass 39, count 2 2006.229.20:26:06.82#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:26:06.82#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:26:06.82#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.20:26:06.82#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:06.82#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:26:06.94#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:26:06.94#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:26:06.94#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:26:06.94#ibcon#first serial, iclass 39, count 0 2006.229.20:26:06.94#ibcon#enter sib2, iclass 39, count 0 2006.229.20:26:06.94#ibcon#flushed, iclass 39, count 0 2006.229.20:26:06.94#ibcon#about to write, iclass 39, count 0 2006.229.20:26:06.94#ibcon#wrote, iclass 39, count 0 2006.229.20:26:06.94#ibcon#about to read 3, iclass 39, count 0 2006.229.20:26:06.96#ibcon#read 3, iclass 39, count 0 2006.229.20:26:06.96#ibcon#about to read 4, iclass 39, count 0 2006.229.20:26:06.96#ibcon#read 4, iclass 39, count 0 2006.229.20:26:06.96#ibcon#about to read 5, iclass 39, count 0 2006.229.20:26:06.96#ibcon#read 5, iclass 39, count 0 2006.229.20:26:06.96#ibcon#about to read 6, iclass 39, count 0 2006.229.20:26:06.96#ibcon#read 6, iclass 39, count 0 2006.229.20:26:06.96#ibcon#end of sib2, iclass 39, count 0 2006.229.20:26:06.96#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:26:06.96#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:26:06.96#ibcon#[25=USB\r\n] 2006.229.20:26:06.96#ibcon#*before write, iclass 39, count 0 2006.229.20:26:06.96#ibcon#enter sib2, iclass 39, count 0 2006.229.20:26:06.96#ibcon#flushed, iclass 39, count 0 2006.229.20:26:06.96#ibcon#about to write, iclass 39, count 0 2006.229.20:26:06.96#ibcon#wrote, iclass 39, count 0 2006.229.20:26:06.96#ibcon#about to read 3, iclass 39, count 0 2006.229.20:26:06.99#ibcon#read 3, iclass 39, count 0 2006.229.20:26:06.99#ibcon#about to read 4, iclass 39, count 0 2006.229.20:26:06.99#ibcon#read 4, iclass 39, count 0 2006.229.20:26:06.99#ibcon#about to read 5, iclass 39, count 0 2006.229.20:26:06.99#ibcon#read 5, iclass 39, count 0 2006.229.20:26:06.99#ibcon#about to read 6, iclass 39, count 0 2006.229.20:26:06.99#ibcon#read 6, iclass 39, count 0 2006.229.20:26:06.99#ibcon#end of sib2, iclass 39, count 0 2006.229.20:26:06.99#ibcon#*after write, iclass 39, count 0 2006.229.20:26:06.99#ibcon#*before return 0, iclass 39, count 0 2006.229.20:26:06.99#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:26:06.99#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:26:06.99#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:26:06.99#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:26:06.99$vck44/vblo=1,629.99 2006.229.20:26:06.99#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.20:26:06.99#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.20:26:06.99#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:06.99#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:26:06.99#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:26:06.99#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:26:06.99#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:26:06.99#ibcon#first serial, iclass 3, count 0 2006.229.20:26:06.99#ibcon#enter sib2, iclass 3, count 0 2006.229.20:26:06.99#ibcon#flushed, iclass 3, count 0 2006.229.20:26:06.99#ibcon#about to write, iclass 3, count 0 2006.229.20:26:06.99#ibcon#wrote, iclass 3, count 0 2006.229.20:26:06.99#ibcon#about to read 3, iclass 3, count 0 2006.229.20:26:07.01#ibcon#read 3, iclass 3, count 0 2006.229.20:26:07.01#ibcon#about to read 4, iclass 3, count 0 2006.229.20:26:07.01#ibcon#read 4, iclass 3, count 0 2006.229.20:26:07.01#ibcon#about to read 5, iclass 3, count 0 2006.229.20:26:07.01#ibcon#read 5, iclass 3, count 0 2006.229.20:26:07.01#ibcon#about to read 6, iclass 3, count 0 2006.229.20:26:07.01#ibcon#read 6, iclass 3, count 0 2006.229.20:26:07.01#ibcon#end of sib2, iclass 3, count 0 2006.229.20:26:07.01#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:26:07.01#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:26:07.01#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:26:07.01#ibcon#*before write, iclass 3, count 0 2006.229.20:26:07.01#ibcon#enter sib2, iclass 3, count 0 2006.229.20:26:07.01#ibcon#flushed, iclass 3, count 0 2006.229.20:26:07.01#ibcon#about to write, iclass 3, count 0 2006.229.20:26:07.01#ibcon#wrote, iclass 3, count 0 2006.229.20:26:07.01#ibcon#about to read 3, iclass 3, count 0 2006.229.20:26:07.05#ibcon#read 3, iclass 3, count 0 2006.229.20:26:07.05#ibcon#about to read 4, iclass 3, count 0 2006.229.20:26:07.05#ibcon#read 4, iclass 3, count 0 2006.229.20:26:07.05#ibcon#about to read 5, iclass 3, count 0 2006.229.20:26:07.05#ibcon#read 5, iclass 3, count 0 2006.229.20:26:07.05#ibcon#about to read 6, iclass 3, count 0 2006.229.20:26:07.05#ibcon#read 6, iclass 3, count 0 2006.229.20:26:07.05#ibcon#end of sib2, iclass 3, count 0 2006.229.20:26:07.05#ibcon#*after write, iclass 3, count 0 2006.229.20:26:07.05#ibcon#*before return 0, iclass 3, count 0 2006.229.20:26:07.05#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:26:07.05#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:26:07.05#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:26:07.05#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:26:07.05$vck44/vb=1,4 2006.229.20:26:07.05#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.20:26:07.05#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.20:26:07.05#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:07.05#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:26:07.05#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:26:07.05#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:26:07.05#ibcon#enter wrdev, iclass 5, count 2 2006.229.20:26:07.05#ibcon#first serial, iclass 5, count 2 2006.229.20:26:07.05#ibcon#enter sib2, iclass 5, count 2 2006.229.20:26:07.05#ibcon#flushed, iclass 5, count 2 2006.229.20:26:07.05#ibcon#about to write, iclass 5, count 2 2006.229.20:26:07.05#ibcon#wrote, iclass 5, count 2 2006.229.20:26:07.05#ibcon#about to read 3, iclass 5, count 2 2006.229.20:26:07.07#ibcon#read 3, iclass 5, count 2 2006.229.20:26:07.07#ibcon#about to read 4, iclass 5, count 2 2006.229.20:26:07.07#ibcon#read 4, iclass 5, count 2 2006.229.20:26:07.07#ibcon#about to read 5, iclass 5, count 2 2006.229.20:26:07.07#ibcon#read 5, iclass 5, count 2 2006.229.20:26:07.07#ibcon#about to read 6, iclass 5, count 2 2006.229.20:26:07.07#ibcon#read 6, iclass 5, count 2 2006.229.20:26:07.07#ibcon#end of sib2, iclass 5, count 2 2006.229.20:26:07.07#ibcon#*mode == 0, iclass 5, count 2 2006.229.20:26:07.07#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.20:26:07.07#ibcon#[27=AT01-04\r\n] 2006.229.20:26:07.07#ibcon#*before write, iclass 5, count 2 2006.229.20:26:07.07#ibcon#enter sib2, iclass 5, count 2 2006.229.20:26:07.07#ibcon#flushed, iclass 5, count 2 2006.229.20:26:07.07#ibcon#about to write, iclass 5, count 2 2006.229.20:26:07.07#ibcon#wrote, iclass 5, count 2 2006.229.20:26:07.07#ibcon#about to read 3, iclass 5, count 2 2006.229.20:26:07.10#ibcon#read 3, iclass 5, count 2 2006.229.20:26:07.10#ibcon#about to read 4, iclass 5, count 2 2006.229.20:26:07.10#ibcon#read 4, iclass 5, count 2 2006.229.20:26:07.10#ibcon#about to read 5, iclass 5, count 2 2006.229.20:26:07.10#ibcon#read 5, iclass 5, count 2 2006.229.20:26:07.10#ibcon#about to read 6, iclass 5, count 2 2006.229.20:26:07.10#ibcon#read 6, iclass 5, count 2 2006.229.20:26:07.10#ibcon#end of sib2, iclass 5, count 2 2006.229.20:26:07.10#ibcon#*after write, iclass 5, count 2 2006.229.20:26:07.10#ibcon#*before return 0, iclass 5, count 2 2006.229.20:26:07.10#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:26:07.10#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:26:07.10#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.20:26:07.10#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:07.10#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:26:07.22#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:26:07.22#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:26:07.22#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:26:07.22#ibcon#first serial, iclass 5, count 0 2006.229.20:26:07.22#ibcon#enter sib2, iclass 5, count 0 2006.229.20:26:07.22#ibcon#flushed, iclass 5, count 0 2006.229.20:26:07.22#ibcon#about to write, iclass 5, count 0 2006.229.20:26:07.22#ibcon#wrote, iclass 5, count 0 2006.229.20:26:07.22#ibcon#about to read 3, iclass 5, count 0 2006.229.20:26:07.24#ibcon#read 3, iclass 5, count 0 2006.229.20:26:07.24#ibcon#about to read 4, iclass 5, count 0 2006.229.20:26:07.24#ibcon#read 4, iclass 5, count 0 2006.229.20:26:07.24#ibcon#about to read 5, iclass 5, count 0 2006.229.20:26:07.24#ibcon#read 5, iclass 5, count 0 2006.229.20:26:07.24#ibcon#about to read 6, iclass 5, count 0 2006.229.20:26:07.24#ibcon#read 6, iclass 5, count 0 2006.229.20:26:07.24#ibcon#end of sib2, iclass 5, count 0 2006.229.20:26:07.24#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:26:07.24#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:26:07.24#ibcon#[27=USB\r\n] 2006.229.20:26:07.24#ibcon#*before write, iclass 5, count 0 2006.229.20:26:07.24#ibcon#enter sib2, iclass 5, count 0 2006.229.20:26:07.24#ibcon#flushed, iclass 5, count 0 2006.229.20:26:07.24#ibcon#about to write, iclass 5, count 0 2006.229.20:26:07.24#ibcon#wrote, iclass 5, count 0 2006.229.20:26:07.24#ibcon#about to read 3, iclass 5, count 0 2006.229.20:26:07.27#ibcon#read 3, iclass 5, count 0 2006.229.20:26:07.27#ibcon#about to read 4, iclass 5, count 0 2006.229.20:26:07.27#ibcon#read 4, iclass 5, count 0 2006.229.20:26:07.27#ibcon#about to read 5, iclass 5, count 0 2006.229.20:26:07.27#ibcon#read 5, iclass 5, count 0 2006.229.20:26:07.27#ibcon#about to read 6, iclass 5, count 0 2006.229.20:26:07.27#ibcon#read 6, iclass 5, count 0 2006.229.20:26:07.27#ibcon#end of sib2, iclass 5, count 0 2006.229.20:26:07.27#ibcon#*after write, iclass 5, count 0 2006.229.20:26:07.27#ibcon#*before return 0, iclass 5, count 0 2006.229.20:26:07.27#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:26:07.27#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:26:07.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:26:07.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:26:07.27$vck44/vblo=2,634.99 2006.229.20:26:07.27#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.20:26:07.27#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.20:26:07.27#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:07.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:07.27#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:07.27#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:07.27#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:26:07.27#ibcon#first serial, iclass 7, count 0 2006.229.20:26:07.27#ibcon#enter sib2, iclass 7, count 0 2006.229.20:26:07.27#ibcon#flushed, iclass 7, count 0 2006.229.20:26:07.27#ibcon#about to write, iclass 7, count 0 2006.229.20:26:07.27#ibcon#wrote, iclass 7, count 0 2006.229.20:26:07.27#ibcon#about to read 3, iclass 7, count 0 2006.229.20:26:07.29#ibcon#read 3, iclass 7, count 0 2006.229.20:26:07.29#ibcon#about to read 4, iclass 7, count 0 2006.229.20:26:07.29#ibcon#read 4, iclass 7, count 0 2006.229.20:26:07.29#ibcon#about to read 5, iclass 7, count 0 2006.229.20:26:07.29#ibcon#read 5, iclass 7, count 0 2006.229.20:26:07.29#ibcon#about to read 6, iclass 7, count 0 2006.229.20:26:07.29#ibcon#read 6, iclass 7, count 0 2006.229.20:26:07.29#ibcon#end of sib2, iclass 7, count 0 2006.229.20:26:07.29#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:26:07.29#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:26:07.29#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:26:07.29#ibcon#*before write, iclass 7, count 0 2006.229.20:26:07.29#ibcon#enter sib2, iclass 7, count 0 2006.229.20:26:07.29#ibcon#flushed, iclass 7, count 0 2006.229.20:26:07.29#ibcon#about to write, iclass 7, count 0 2006.229.20:26:07.29#ibcon#wrote, iclass 7, count 0 2006.229.20:26:07.29#ibcon#about to read 3, iclass 7, count 0 2006.229.20:26:07.33#ibcon#read 3, iclass 7, count 0 2006.229.20:26:07.33#ibcon#about to read 4, iclass 7, count 0 2006.229.20:26:07.33#ibcon#read 4, iclass 7, count 0 2006.229.20:26:07.33#ibcon#about to read 5, iclass 7, count 0 2006.229.20:26:07.33#ibcon#read 5, iclass 7, count 0 2006.229.20:26:07.33#ibcon#about to read 6, iclass 7, count 0 2006.229.20:26:07.33#ibcon#read 6, iclass 7, count 0 2006.229.20:26:07.33#ibcon#end of sib2, iclass 7, count 0 2006.229.20:26:07.33#ibcon#*after write, iclass 7, count 0 2006.229.20:26:07.33#ibcon#*before return 0, iclass 7, count 0 2006.229.20:26:07.33#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:07.33#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:26:07.33#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:26:07.33#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:26:07.33$vck44/vb=2,4 2006.229.20:26:07.33#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.20:26:07.33#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.20:26:07.33#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:07.33#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:07.39#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:07.39#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:07.39#ibcon#enter wrdev, iclass 11, count 2 2006.229.20:26:07.39#ibcon#first serial, iclass 11, count 2 2006.229.20:26:07.39#ibcon#enter sib2, iclass 11, count 2 2006.229.20:26:07.39#ibcon#flushed, iclass 11, count 2 2006.229.20:26:07.39#ibcon#about to write, iclass 11, count 2 2006.229.20:26:07.39#ibcon#wrote, iclass 11, count 2 2006.229.20:26:07.39#ibcon#about to read 3, iclass 11, count 2 2006.229.20:26:07.41#ibcon#read 3, iclass 11, count 2 2006.229.20:26:07.41#ibcon#about to read 4, iclass 11, count 2 2006.229.20:26:07.41#ibcon#read 4, iclass 11, count 2 2006.229.20:26:07.41#ibcon#about to read 5, iclass 11, count 2 2006.229.20:26:07.41#ibcon#read 5, iclass 11, count 2 2006.229.20:26:07.41#ibcon#about to read 6, iclass 11, count 2 2006.229.20:26:07.41#ibcon#read 6, iclass 11, count 2 2006.229.20:26:07.41#ibcon#end of sib2, iclass 11, count 2 2006.229.20:26:07.41#ibcon#*mode == 0, iclass 11, count 2 2006.229.20:26:07.41#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.20:26:07.41#ibcon#[27=AT02-04\r\n] 2006.229.20:26:07.41#ibcon#*before write, iclass 11, count 2 2006.229.20:26:07.41#ibcon#enter sib2, iclass 11, count 2 2006.229.20:26:07.41#ibcon#flushed, iclass 11, count 2 2006.229.20:26:07.41#ibcon#about to write, iclass 11, count 2 2006.229.20:26:07.41#ibcon#wrote, iclass 11, count 2 2006.229.20:26:07.41#ibcon#about to read 3, iclass 11, count 2 2006.229.20:26:07.44#ibcon#read 3, iclass 11, count 2 2006.229.20:26:07.44#ibcon#about to read 4, iclass 11, count 2 2006.229.20:26:07.44#ibcon#read 4, iclass 11, count 2 2006.229.20:26:07.44#ibcon#about to read 5, iclass 11, count 2 2006.229.20:26:07.44#ibcon#read 5, iclass 11, count 2 2006.229.20:26:07.44#ibcon#about to read 6, iclass 11, count 2 2006.229.20:26:07.44#ibcon#read 6, iclass 11, count 2 2006.229.20:26:07.44#ibcon#end of sib2, iclass 11, count 2 2006.229.20:26:07.44#ibcon#*after write, iclass 11, count 2 2006.229.20:26:07.44#ibcon#*before return 0, iclass 11, count 2 2006.229.20:26:07.44#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:07.44#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:26:07.44#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.20:26:07.44#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:07.44#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:07.56#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:07.56#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:07.56#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:26:07.56#ibcon#first serial, iclass 11, count 0 2006.229.20:26:07.56#ibcon#enter sib2, iclass 11, count 0 2006.229.20:26:07.56#ibcon#flushed, iclass 11, count 0 2006.229.20:26:07.56#ibcon#about to write, iclass 11, count 0 2006.229.20:26:07.56#ibcon#wrote, iclass 11, count 0 2006.229.20:26:07.56#ibcon#about to read 3, iclass 11, count 0 2006.229.20:26:07.58#ibcon#read 3, iclass 11, count 0 2006.229.20:26:07.58#ibcon#about to read 4, iclass 11, count 0 2006.229.20:26:07.58#ibcon#read 4, iclass 11, count 0 2006.229.20:26:07.58#ibcon#about to read 5, iclass 11, count 0 2006.229.20:26:07.58#ibcon#read 5, iclass 11, count 0 2006.229.20:26:07.58#ibcon#about to read 6, iclass 11, count 0 2006.229.20:26:07.58#ibcon#read 6, iclass 11, count 0 2006.229.20:26:07.58#ibcon#end of sib2, iclass 11, count 0 2006.229.20:26:07.58#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:26:07.58#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:26:07.58#ibcon#[27=USB\r\n] 2006.229.20:26:07.58#ibcon#*before write, iclass 11, count 0 2006.229.20:26:07.58#ibcon#enter sib2, iclass 11, count 0 2006.229.20:26:07.58#ibcon#flushed, iclass 11, count 0 2006.229.20:26:07.58#ibcon#about to write, iclass 11, count 0 2006.229.20:26:07.58#ibcon#wrote, iclass 11, count 0 2006.229.20:26:07.58#ibcon#about to read 3, iclass 11, count 0 2006.229.20:26:07.61#ibcon#read 3, iclass 11, count 0 2006.229.20:26:07.61#ibcon#about to read 4, iclass 11, count 0 2006.229.20:26:07.61#ibcon#read 4, iclass 11, count 0 2006.229.20:26:07.61#ibcon#about to read 5, iclass 11, count 0 2006.229.20:26:07.61#ibcon#read 5, iclass 11, count 0 2006.229.20:26:07.61#ibcon#about to read 6, iclass 11, count 0 2006.229.20:26:07.61#ibcon#read 6, iclass 11, count 0 2006.229.20:26:07.61#ibcon#end of sib2, iclass 11, count 0 2006.229.20:26:07.61#ibcon#*after write, iclass 11, count 0 2006.229.20:26:07.61#ibcon#*before return 0, iclass 11, count 0 2006.229.20:26:07.61#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:07.61#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:26:07.61#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:26:07.61#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:26:07.61$vck44/vblo=3,649.99 2006.229.20:26:07.61#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.20:26:07.61#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.20:26:07.61#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:07.61#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:07.61#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:07.61#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:07.61#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:26:07.61#ibcon#first serial, iclass 13, count 0 2006.229.20:26:07.61#ibcon#enter sib2, iclass 13, count 0 2006.229.20:26:07.61#ibcon#flushed, iclass 13, count 0 2006.229.20:26:07.61#ibcon#about to write, iclass 13, count 0 2006.229.20:26:07.61#ibcon#wrote, iclass 13, count 0 2006.229.20:26:07.61#ibcon#about to read 3, iclass 13, count 0 2006.229.20:26:07.63#ibcon#read 3, iclass 13, count 0 2006.229.20:26:07.63#ibcon#about to read 4, iclass 13, count 0 2006.229.20:26:07.63#ibcon#read 4, iclass 13, count 0 2006.229.20:26:07.63#ibcon#about to read 5, iclass 13, count 0 2006.229.20:26:07.63#ibcon#read 5, iclass 13, count 0 2006.229.20:26:07.63#ibcon#about to read 6, iclass 13, count 0 2006.229.20:26:07.63#ibcon#read 6, iclass 13, count 0 2006.229.20:26:07.63#ibcon#end of sib2, iclass 13, count 0 2006.229.20:26:07.63#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:26:07.63#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:26:07.63#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:26:07.63#ibcon#*before write, iclass 13, count 0 2006.229.20:26:07.63#ibcon#enter sib2, iclass 13, count 0 2006.229.20:26:07.63#ibcon#flushed, iclass 13, count 0 2006.229.20:26:07.63#ibcon#about to write, iclass 13, count 0 2006.229.20:26:07.63#ibcon#wrote, iclass 13, count 0 2006.229.20:26:07.63#ibcon#about to read 3, iclass 13, count 0 2006.229.20:26:07.67#ibcon#read 3, iclass 13, count 0 2006.229.20:26:07.67#ibcon#about to read 4, iclass 13, count 0 2006.229.20:26:07.67#ibcon#read 4, iclass 13, count 0 2006.229.20:26:07.67#ibcon#about to read 5, iclass 13, count 0 2006.229.20:26:07.67#ibcon#read 5, iclass 13, count 0 2006.229.20:26:07.67#ibcon#about to read 6, iclass 13, count 0 2006.229.20:26:07.67#ibcon#read 6, iclass 13, count 0 2006.229.20:26:07.67#ibcon#end of sib2, iclass 13, count 0 2006.229.20:26:07.67#ibcon#*after write, iclass 13, count 0 2006.229.20:26:07.67#ibcon#*before return 0, iclass 13, count 0 2006.229.20:26:07.67#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:07.67#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:26:07.67#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:26:07.67#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:26:07.67$vck44/vb=3,4 2006.229.20:26:07.67#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.20:26:07.67#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.20:26:07.67#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:07.67#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:07.73#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:07.73#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:07.73#ibcon#enter wrdev, iclass 15, count 2 2006.229.20:26:07.73#ibcon#first serial, iclass 15, count 2 2006.229.20:26:07.73#ibcon#enter sib2, iclass 15, count 2 2006.229.20:26:07.73#ibcon#flushed, iclass 15, count 2 2006.229.20:26:07.73#ibcon#about to write, iclass 15, count 2 2006.229.20:26:07.73#ibcon#wrote, iclass 15, count 2 2006.229.20:26:07.73#ibcon#about to read 3, iclass 15, count 2 2006.229.20:26:07.75#ibcon#read 3, iclass 15, count 2 2006.229.20:26:07.75#ibcon#about to read 4, iclass 15, count 2 2006.229.20:26:07.75#ibcon#read 4, iclass 15, count 2 2006.229.20:26:07.75#ibcon#about to read 5, iclass 15, count 2 2006.229.20:26:07.75#ibcon#read 5, iclass 15, count 2 2006.229.20:26:07.75#ibcon#about to read 6, iclass 15, count 2 2006.229.20:26:07.75#ibcon#read 6, iclass 15, count 2 2006.229.20:26:07.75#ibcon#end of sib2, iclass 15, count 2 2006.229.20:26:07.75#ibcon#*mode == 0, iclass 15, count 2 2006.229.20:26:07.75#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.20:26:07.75#ibcon#[27=AT03-04\r\n] 2006.229.20:26:07.75#ibcon#*before write, iclass 15, count 2 2006.229.20:26:07.75#ibcon#enter sib2, iclass 15, count 2 2006.229.20:26:07.75#ibcon#flushed, iclass 15, count 2 2006.229.20:26:07.75#ibcon#about to write, iclass 15, count 2 2006.229.20:26:07.75#ibcon#wrote, iclass 15, count 2 2006.229.20:26:07.75#ibcon#about to read 3, iclass 15, count 2 2006.229.20:26:07.78#ibcon#read 3, iclass 15, count 2 2006.229.20:26:07.78#ibcon#about to read 4, iclass 15, count 2 2006.229.20:26:07.78#ibcon#read 4, iclass 15, count 2 2006.229.20:26:07.78#ibcon#about to read 5, iclass 15, count 2 2006.229.20:26:07.78#ibcon#read 5, iclass 15, count 2 2006.229.20:26:07.78#ibcon#about to read 6, iclass 15, count 2 2006.229.20:26:07.78#ibcon#read 6, iclass 15, count 2 2006.229.20:26:07.78#ibcon#end of sib2, iclass 15, count 2 2006.229.20:26:07.78#ibcon#*after write, iclass 15, count 2 2006.229.20:26:07.78#ibcon#*before return 0, iclass 15, count 2 2006.229.20:26:07.78#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:07.78#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:26:07.78#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.20:26:07.78#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:07.78#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:07.90#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:07.90#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:07.90#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:26:07.90#ibcon#first serial, iclass 15, count 0 2006.229.20:26:07.90#ibcon#enter sib2, iclass 15, count 0 2006.229.20:26:07.90#ibcon#flushed, iclass 15, count 0 2006.229.20:26:07.90#ibcon#about to write, iclass 15, count 0 2006.229.20:26:07.90#ibcon#wrote, iclass 15, count 0 2006.229.20:26:07.90#ibcon#about to read 3, iclass 15, count 0 2006.229.20:26:07.92#ibcon#read 3, iclass 15, count 0 2006.229.20:26:07.92#ibcon#about to read 4, iclass 15, count 0 2006.229.20:26:07.92#ibcon#read 4, iclass 15, count 0 2006.229.20:26:07.92#ibcon#about to read 5, iclass 15, count 0 2006.229.20:26:07.92#ibcon#read 5, iclass 15, count 0 2006.229.20:26:07.92#ibcon#about to read 6, iclass 15, count 0 2006.229.20:26:07.92#ibcon#read 6, iclass 15, count 0 2006.229.20:26:07.92#ibcon#end of sib2, iclass 15, count 0 2006.229.20:26:07.92#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:26:07.92#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:26:07.92#ibcon#[27=USB\r\n] 2006.229.20:26:07.92#ibcon#*before write, iclass 15, count 0 2006.229.20:26:07.92#ibcon#enter sib2, iclass 15, count 0 2006.229.20:26:07.92#ibcon#flushed, iclass 15, count 0 2006.229.20:26:07.92#ibcon#about to write, iclass 15, count 0 2006.229.20:26:07.92#ibcon#wrote, iclass 15, count 0 2006.229.20:26:07.92#ibcon#about to read 3, iclass 15, count 0 2006.229.20:26:07.95#ibcon#read 3, iclass 15, count 0 2006.229.20:26:07.95#ibcon#about to read 4, iclass 15, count 0 2006.229.20:26:07.95#ibcon#read 4, iclass 15, count 0 2006.229.20:26:07.95#ibcon#about to read 5, iclass 15, count 0 2006.229.20:26:07.95#ibcon#read 5, iclass 15, count 0 2006.229.20:26:07.95#ibcon#about to read 6, iclass 15, count 0 2006.229.20:26:07.95#ibcon#read 6, iclass 15, count 0 2006.229.20:26:07.95#ibcon#end of sib2, iclass 15, count 0 2006.229.20:26:07.95#ibcon#*after write, iclass 15, count 0 2006.229.20:26:07.95#ibcon#*before return 0, iclass 15, count 0 2006.229.20:26:07.95#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:07.95#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:26:07.95#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:26:07.95#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:26:07.95$vck44/vblo=4,679.99 2006.229.20:26:07.95#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:26:07.95#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:26:07.95#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:07.95#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:07.95#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:07.95#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:07.95#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:26:07.95#ibcon#first serial, iclass 17, count 0 2006.229.20:26:07.95#ibcon#enter sib2, iclass 17, count 0 2006.229.20:26:07.95#ibcon#flushed, iclass 17, count 0 2006.229.20:26:07.95#ibcon#about to write, iclass 17, count 0 2006.229.20:26:07.95#ibcon#wrote, iclass 17, count 0 2006.229.20:26:07.95#ibcon#about to read 3, iclass 17, count 0 2006.229.20:26:07.97#ibcon#read 3, iclass 17, count 0 2006.229.20:26:07.97#ibcon#about to read 4, iclass 17, count 0 2006.229.20:26:07.97#ibcon#read 4, iclass 17, count 0 2006.229.20:26:07.97#ibcon#about to read 5, iclass 17, count 0 2006.229.20:26:07.97#ibcon#read 5, iclass 17, count 0 2006.229.20:26:07.97#ibcon#about to read 6, iclass 17, count 0 2006.229.20:26:07.97#ibcon#read 6, iclass 17, count 0 2006.229.20:26:07.97#ibcon#end of sib2, iclass 17, count 0 2006.229.20:26:07.97#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:26:07.97#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:26:07.97#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:26:07.97#ibcon#*before write, iclass 17, count 0 2006.229.20:26:07.97#ibcon#enter sib2, iclass 17, count 0 2006.229.20:26:07.97#ibcon#flushed, iclass 17, count 0 2006.229.20:26:07.97#ibcon#about to write, iclass 17, count 0 2006.229.20:26:07.97#ibcon#wrote, iclass 17, count 0 2006.229.20:26:07.97#ibcon#about to read 3, iclass 17, count 0 2006.229.20:26:08.01#ibcon#read 3, iclass 17, count 0 2006.229.20:26:08.01#ibcon#about to read 4, iclass 17, count 0 2006.229.20:26:08.01#ibcon#read 4, iclass 17, count 0 2006.229.20:26:08.01#ibcon#about to read 5, iclass 17, count 0 2006.229.20:26:08.01#ibcon#read 5, iclass 17, count 0 2006.229.20:26:08.01#ibcon#about to read 6, iclass 17, count 0 2006.229.20:26:08.01#ibcon#read 6, iclass 17, count 0 2006.229.20:26:08.01#ibcon#end of sib2, iclass 17, count 0 2006.229.20:26:08.01#ibcon#*after write, iclass 17, count 0 2006.229.20:26:08.01#ibcon#*before return 0, iclass 17, count 0 2006.229.20:26:08.01#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:08.01#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:26:08.01#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:26:08.01#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:26:08.01$vck44/vb=4,4 2006.229.20:26:08.01#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.20:26:08.01#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.20:26:08.01#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:08.01#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:08.07#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:08.07#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:08.07#ibcon#enter wrdev, iclass 19, count 2 2006.229.20:26:08.07#ibcon#first serial, iclass 19, count 2 2006.229.20:26:08.07#ibcon#enter sib2, iclass 19, count 2 2006.229.20:26:08.07#ibcon#flushed, iclass 19, count 2 2006.229.20:26:08.07#ibcon#about to write, iclass 19, count 2 2006.229.20:26:08.07#ibcon#wrote, iclass 19, count 2 2006.229.20:26:08.07#ibcon#about to read 3, iclass 19, count 2 2006.229.20:26:08.09#ibcon#read 3, iclass 19, count 2 2006.229.20:26:08.09#ibcon#about to read 4, iclass 19, count 2 2006.229.20:26:08.09#ibcon#read 4, iclass 19, count 2 2006.229.20:26:08.09#ibcon#about to read 5, iclass 19, count 2 2006.229.20:26:08.09#ibcon#read 5, iclass 19, count 2 2006.229.20:26:08.09#ibcon#about to read 6, iclass 19, count 2 2006.229.20:26:08.09#ibcon#read 6, iclass 19, count 2 2006.229.20:26:08.09#ibcon#end of sib2, iclass 19, count 2 2006.229.20:26:08.09#ibcon#*mode == 0, iclass 19, count 2 2006.229.20:26:08.09#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.20:26:08.09#ibcon#[27=AT04-04\r\n] 2006.229.20:26:08.09#ibcon#*before write, iclass 19, count 2 2006.229.20:26:08.09#ibcon#enter sib2, iclass 19, count 2 2006.229.20:26:08.09#ibcon#flushed, iclass 19, count 2 2006.229.20:26:08.09#ibcon#about to write, iclass 19, count 2 2006.229.20:26:08.09#ibcon#wrote, iclass 19, count 2 2006.229.20:26:08.09#ibcon#about to read 3, iclass 19, count 2 2006.229.20:26:08.12#ibcon#read 3, iclass 19, count 2 2006.229.20:26:08.12#ibcon#about to read 4, iclass 19, count 2 2006.229.20:26:08.12#ibcon#read 4, iclass 19, count 2 2006.229.20:26:08.12#ibcon#about to read 5, iclass 19, count 2 2006.229.20:26:08.12#ibcon#read 5, iclass 19, count 2 2006.229.20:26:08.12#ibcon#about to read 6, iclass 19, count 2 2006.229.20:26:08.12#ibcon#read 6, iclass 19, count 2 2006.229.20:26:08.12#ibcon#end of sib2, iclass 19, count 2 2006.229.20:26:08.12#ibcon#*after write, iclass 19, count 2 2006.229.20:26:08.12#ibcon#*before return 0, iclass 19, count 2 2006.229.20:26:08.12#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:08.12#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:26:08.12#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.20:26:08.12#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:08.12#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:08.24#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:08.24#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:08.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:26:08.24#ibcon#first serial, iclass 19, count 0 2006.229.20:26:08.24#ibcon#enter sib2, iclass 19, count 0 2006.229.20:26:08.24#ibcon#flushed, iclass 19, count 0 2006.229.20:26:08.24#ibcon#about to write, iclass 19, count 0 2006.229.20:26:08.24#ibcon#wrote, iclass 19, count 0 2006.229.20:26:08.24#ibcon#about to read 3, iclass 19, count 0 2006.229.20:26:08.26#ibcon#read 3, iclass 19, count 0 2006.229.20:26:08.26#ibcon#about to read 4, iclass 19, count 0 2006.229.20:26:08.26#ibcon#read 4, iclass 19, count 0 2006.229.20:26:08.26#ibcon#about to read 5, iclass 19, count 0 2006.229.20:26:08.26#ibcon#read 5, iclass 19, count 0 2006.229.20:26:08.26#ibcon#about to read 6, iclass 19, count 0 2006.229.20:26:08.26#ibcon#read 6, iclass 19, count 0 2006.229.20:26:08.26#ibcon#end of sib2, iclass 19, count 0 2006.229.20:26:08.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:26:08.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:26:08.26#ibcon#[27=USB\r\n] 2006.229.20:26:08.26#ibcon#*before write, iclass 19, count 0 2006.229.20:26:08.26#ibcon#enter sib2, iclass 19, count 0 2006.229.20:26:08.26#ibcon#flushed, iclass 19, count 0 2006.229.20:26:08.26#ibcon#about to write, iclass 19, count 0 2006.229.20:26:08.26#ibcon#wrote, iclass 19, count 0 2006.229.20:26:08.26#ibcon#about to read 3, iclass 19, count 0 2006.229.20:26:08.29#ibcon#read 3, iclass 19, count 0 2006.229.20:26:08.29#ibcon#about to read 4, iclass 19, count 0 2006.229.20:26:08.29#ibcon#read 4, iclass 19, count 0 2006.229.20:26:08.29#ibcon#about to read 5, iclass 19, count 0 2006.229.20:26:08.29#ibcon#read 5, iclass 19, count 0 2006.229.20:26:08.29#ibcon#about to read 6, iclass 19, count 0 2006.229.20:26:08.29#ibcon#read 6, iclass 19, count 0 2006.229.20:26:08.29#ibcon#end of sib2, iclass 19, count 0 2006.229.20:26:08.29#ibcon#*after write, iclass 19, count 0 2006.229.20:26:08.29#ibcon#*before return 0, iclass 19, count 0 2006.229.20:26:08.29#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:08.29#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:26:08.29#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:26:08.29#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:26:08.29$vck44/vblo=5,709.99 2006.229.20:26:08.29#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:26:08.29#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:26:08.29#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:08.29#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:08.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:08.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:08.29#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:26:08.29#ibcon#first serial, iclass 21, count 0 2006.229.20:26:08.29#ibcon#enter sib2, iclass 21, count 0 2006.229.20:26:08.29#ibcon#flushed, iclass 21, count 0 2006.229.20:26:08.29#ibcon#about to write, iclass 21, count 0 2006.229.20:26:08.29#ibcon#wrote, iclass 21, count 0 2006.229.20:26:08.29#ibcon#about to read 3, iclass 21, count 0 2006.229.20:26:08.31#ibcon#read 3, iclass 21, count 0 2006.229.20:26:08.31#ibcon#about to read 4, iclass 21, count 0 2006.229.20:26:08.31#ibcon#read 4, iclass 21, count 0 2006.229.20:26:08.31#ibcon#about to read 5, iclass 21, count 0 2006.229.20:26:08.31#ibcon#read 5, iclass 21, count 0 2006.229.20:26:08.31#ibcon#about to read 6, iclass 21, count 0 2006.229.20:26:08.31#ibcon#read 6, iclass 21, count 0 2006.229.20:26:08.31#ibcon#end of sib2, iclass 21, count 0 2006.229.20:26:08.31#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:26:08.31#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:26:08.31#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:26:08.31#ibcon#*before write, iclass 21, count 0 2006.229.20:26:08.31#ibcon#enter sib2, iclass 21, count 0 2006.229.20:26:08.31#ibcon#flushed, iclass 21, count 0 2006.229.20:26:08.31#ibcon#about to write, iclass 21, count 0 2006.229.20:26:08.31#ibcon#wrote, iclass 21, count 0 2006.229.20:26:08.31#ibcon#about to read 3, iclass 21, count 0 2006.229.20:26:08.35#ibcon#read 3, iclass 21, count 0 2006.229.20:26:08.35#ibcon#about to read 4, iclass 21, count 0 2006.229.20:26:08.35#ibcon#read 4, iclass 21, count 0 2006.229.20:26:08.35#ibcon#about to read 5, iclass 21, count 0 2006.229.20:26:08.35#ibcon#read 5, iclass 21, count 0 2006.229.20:26:08.35#ibcon#about to read 6, iclass 21, count 0 2006.229.20:26:08.35#ibcon#read 6, iclass 21, count 0 2006.229.20:26:08.35#ibcon#end of sib2, iclass 21, count 0 2006.229.20:26:08.35#ibcon#*after write, iclass 21, count 0 2006.229.20:26:08.35#ibcon#*before return 0, iclass 21, count 0 2006.229.20:26:08.35#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:08.35#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:26:08.35#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:26:08.35#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:26:08.35$vck44/vb=5,4 2006.229.20:26:08.35#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:26:08.35#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:26:08.35#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:08.35#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:08.41#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:08.41#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:08.41#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:26:08.41#ibcon#first serial, iclass 23, count 2 2006.229.20:26:08.41#ibcon#enter sib2, iclass 23, count 2 2006.229.20:26:08.41#ibcon#flushed, iclass 23, count 2 2006.229.20:26:08.41#ibcon#about to write, iclass 23, count 2 2006.229.20:26:08.41#ibcon#wrote, iclass 23, count 2 2006.229.20:26:08.41#ibcon#about to read 3, iclass 23, count 2 2006.229.20:26:08.43#ibcon#read 3, iclass 23, count 2 2006.229.20:26:08.43#ibcon#about to read 4, iclass 23, count 2 2006.229.20:26:08.43#ibcon#read 4, iclass 23, count 2 2006.229.20:26:08.43#ibcon#about to read 5, iclass 23, count 2 2006.229.20:26:08.43#ibcon#read 5, iclass 23, count 2 2006.229.20:26:08.43#ibcon#about to read 6, iclass 23, count 2 2006.229.20:26:08.43#ibcon#read 6, iclass 23, count 2 2006.229.20:26:08.43#ibcon#end of sib2, iclass 23, count 2 2006.229.20:26:08.43#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:26:08.43#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:26:08.43#ibcon#[27=AT05-04\r\n] 2006.229.20:26:08.43#ibcon#*before write, iclass 23, count 2 2006.229.20:26:08.43#ibcon#enter sib2, iclass 23, count 2 2006.229.20:26:08.43#ibcon#flushed, iclass 23, count 2 2006.229.20:26:08.43#ibcon#about to write, iclass 23, count 2 2006.229.20:26:08.43#ibcon#wrote, iclass 23, count 2 2006.229.20:26:08.43#ibcon#about to read 3, iclass 23, count 2 2006.229.20:26:08.46#ibcon#read 3, iclass 23, count 2 2006.229.20:26:08.46#ibcon#about to read 4, iclass 23, count 2 2006.229.20:26:08.46#ibcon#read 4, iclass 23, count 2 2006.229.20:26:08.46#ibcon#about to read 5, iclass 23, count 2 2006.229.20:26:08.46#ibcon#read 5, iclass 23, count 2 2006.229.20:26:08.46#ibcon#about to read 6, iclass 23, count 2 2006.229.20:26:08.46#ibcon#read 6, iclass 23, count 2 2006.229.20:26:08.46#ibcon#end of sib2, iclass 23, count 2 2006.229.20:26:08.46#ibcon#*after write, iclass 23, count 2 2006.229.20:26:08.46#ibcon#*before return 0, iclass 23, count 2 2006.229.20:26:08.46#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:08.46#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:26:08.46#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:26:08.46#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:08.46#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:08.58#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:08.58#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:08.58#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:26:08.58#ibcon#first serial, iclass 23, count 0 2006.229.20:26:08.58#ibcon#enter sib2, iclass 23, count 0 2006.229.20:26:08.58#ibcon#flushed, iclass 23, count 0 2006.229.20:26:08.58#ibcon#about to write, iclass 23, count 0 2006.229.20:26:08.58#ibcon#wrote, iclass 23, count 0 2006.229.20:26:08.58#ibcon#about to read 3, iclass 23, count 0 2006.229.20:26:08.60#ibcon#read 3, iclass 23, count 0 2006.229.20:26:08.60#ibcon#about to read 4, iclass 23, count 0 2006.229.20:26:08.60#ibcon#read 4, iclass 23, count 0 2006.229.20:26:08.60#ibcon#about to read 5, iclass 23, count 0 2006.229.20:26:08.60#ibcon#read 5, iclass 23, count 0 2006.229.20:26:08.60#ibcon#about to read 6, iclass 23, count 0 2006.229.20:26:08.60#ibcon#read 6, iclass 23, count 0 2006.229.20:26:08.60#ibcon#end of sib2, iclass 23, count 0 2006.229.20:26:08.60#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:26:08.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:26:08.60#ibcon#[27=USB\r\n] 2006.229.20:26:08.60#ibcon#*before write, iclass 23, count 0 2006.229.20:26:08.60#ibcon#enter sib2, iclass 23, count 0 2006.229.20:26:08.60#ibcon#flushed, iclass 23, count 0 2006.229.20:26:08.60#ibcon#about to write, iclass 23, count 0 2006.229.20:26:08.60#ibcon#wrote, iclass 23, count 0 2006.229.20:26:08.60#ibcon#about to read 3, iclass 23, count 0 2006.229.20:26:08.63#ibcon#read 3, iclass 23, count 0 2006.229.20:26:08.63#ibcon#about to read 4, iclass 23, count 0 2006.229.20:26:08.63#ibcon#read 4, iclass 23, count 0 2006.229.20:26:08.63#ibcon#about to read 5, iclass 23, count 0 2006.229.20:26:08.63#ibcon#read 5, iclass 23, count 0 2006.229.20:26:08.63#ibcon#about to read 6, iclass 23, count 0 2006.229.20:26:08.63#ibcon#read 6, iclass 23, count 0 2006.229.20:26:08.63#ibcon#end of sib2, iclass 23, count 0 2006.229.20:26:08.63#ibcon#*after write, iclass 23, count 0 2006.229.20:26:08.63#ibcon#*before return 0, iclass 23, count 0 2006.229.20:26:08.63#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:08.63#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:26:08.63#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:26:08.63#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:26:08.63$vck44/vblo=6,719.99 2006.229.20:26:08.63#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.20:26:08.63#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.20:26:08.63#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:08.63#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:08.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:08.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:08.63#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:26:08.63#ibcon#first serial, iclass 25, count 0 2006.229.20:26:08.63#ibcon#enter sib2, iclass 25, count 0 2006.229.20:26:08.63#ibcon#flushed, iclass 25, count 0 2006.229.20:26:08.63#ibcon#about to write, iclass 25, count 0 2006.229.20:26:08.63#ibcon#wrote, iclass 25, count 0 2006.229.20:26:08.63#ibcon#about to read 3, iclass 25, count 0 2006.229.20:26:08.65#ibcon#read 3, iclass 25, count 0 2006.229.20:26:08.65#ibcon#about to read 4, iclass 25, count 0 2006.229.20:26:08.65#ibcon#read 4, iclass 25, count 0 2006.229.20:26:08.65#ibcon#about to read 5, iclass 25, count 0 2006.229.20:26:08.65#ibcon#read 5, iclass 25, count 0 2006.229.20:26:08.65#ibcon#about to read 6, iclass 25, count 0 2006.229.20:26:08.65#ibcon#read 6, iclass 25, count 0 2006.229.20:26:08.65#ibcon#end of sib2, iclass 25, count 0 2006.229.20:26:08.65#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:26:08.65#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:26:08.65#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:26:08.65#ibcon#*before write, iclass 25, count 0 2006.229.20:26:08.65#ibcon#enter sib2, iclass 25, count 0 2006.229.20:26:08.65#ibcon#flushed, iclass 25, count 0 2006.229.20:26:08.65#ibcon#about to write, iclass 25, count 0 2006.229.20:26:08.65#ibcon#wrote, iclass 25, count 0 2006.229.20:26:08.65#ibcon#about to read 3, iclass 25, count 0 2006.229.20:26:08.69#ibcon#read 3, iclass 25, count 0 2006.229.20:26:08.69#ibcon#about to read 4, iclass 25, count 0 2006.229.20:26:08.69#ibcon#read 4, iclass 25, count 0 2006.229.20:26:08.69#ibcon#about to read 5, iclass 25, count 0 2006.229.20:26:08.69#ibcon#read 5, iclass 25, count 0 2006.229.20:26:08.69#ibcon#about to read 6, iclass 25, count 0 2006.229.20:26:08.69#ibcon#read 6, iclass 25, count 0 2006.229.20:26:08.69#ibcon#end of sib2, iclass 25, count 0 2006.229.20:26:08.69#ibcon#*after write, iclass 25, count 0 2006.229.20:26:08.69#ibcon#*before return 0, iclass 25, count 0 2006.229.20:26:08.69#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:08.69#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:26:08.69#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:26:08.69#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:26:08.69$vck44/vb=6,4 2006.229.20:26:08.69#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.20:26:08.69#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.20:26:08.69#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:08.69#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:08.75#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:08.75#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:08.75#ibcon#enter wrdev, iclass 27, count 2 2006.229.20:26:08.75#ibcon#first serial, iclass 27, count 2 2006.229.20:26:08.75#ibcon#enter sib2, iclass 27, count 2 2006.229.20:26:08.75#ibcon#flushed, iclass 27, count 2 2006.229.20:26:08.75#ibcon#about to write, iclass 27, count 2 2006.229.20:26:08.75#ibcon#wrote, iclass 27, count 2 2006.229.20:26:08.75#ibcon#about to read 3, iclass 27, count 2 2006.229.20:26:08.77#ibcon#read 3, iclass 27, count 2 2006.229.20:26:08.77#ibcon#about to read 4, iclass 27, count 2 2006.229.20:26:08.77#ibcon#read 4, iclass 27, count 2 2006.229.20:26:08.77#ibcon#about to read 5, iclass 27, count 2 2006.229.20:26:08.77#ibcon#read 5, iclass 27, count 2 2006.229.20:26:08.77#ibcon#about to read 6, iclass 27, count 2 2006.229.20:26:08.77#ibcon#read 6, iclass 27, count 2 2006.229.20:26:08.77#ibcon#end of sib2, iclass 27, count 2 2006.229.20:26:08.77#ibcon#*mode == 0, iclass 27, count 2 2006.229.20:26:08.77#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.20:26:08.77#ibcon#[27=AT06-04\r\n] 2006.229.20:26:08.77#ibcon#*before write, iclass 27, count 2 2006.229.20:26:08.77#ibcon#enter sib2, iclass 27, count 2 2006.229.20:26:08.77#ibcon#flushed, iclass 27, count 2 2006.229.20:26:08.77#ibcon#about to write, iclass 27, count 2 2006.229.20:26:08.77#ibcon#wrote, iclass 27, count 2 2006.229.20:26:08.77#ibcon#about to read 3, iclass 27, count 2 2006.229.20:26:08.80#ibcon#read 3, iclass 27, count 2 2006.229.20:26:08.80#ibcon#about to read 4, iclass 27, count 2 2006.229.20:26:08.80#ibcon#read 4, iclass 27, count 2 2006.229.20:26:08.80#ibcon#about to read 5, iclass 27, count 2 2006.229.20:26:08.80#ibcon#read 5, iclass 27, count 2 2006.229.20:26:08.80#ibcon#about to read 6, iclass 27, count 2 2006.229.20:26:08.80#ibcon#read 6, iclass 27, count 2 2006.229.20:26:08.80#ibcon#end of sib2, iclass 27, count 2 2006.229.20:26:08.80#ibcon#*after write, iclass 27, count 2 2006.229.20:26:08.80#ibcon#*before return 0, iclass 27, count 2 2006.229.20:26:08.80#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:08.80#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:26:08.80#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.20:26:08.80#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:08.80#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:08.92#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:08.92#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:08.92#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:26:08.92#ibcon#first serial, iclass 27, count 0 2006.229.20:26:08.92#ibcon#enter sib2, iclass 27, count 0 2006.229.20:26:08.92#ibcon#flushed, iclass 27, count 0 2006.229.20:26:08.92#ibcon#about to write, iclass 27, count 0 2006.229.20:26:08.92#ibcon#wrote, iclass 27, count 0 2006.229.20:26:08.92#ibcon#about to read 3, iclass 27, count 0 2006.229.20:26:08.94#ibcon#read 3, iclass 27, count 0 2006.229.20:26:08.94#ibcon#about to read 4, iclass 27, count 0 2006.229.20:26:08.94#ibcon#read 4, iclass 27, count 0 2006.229.20:26:08.94#ibcon#about to read 5, iclass 27, count 0 2006.229.20:26:08.94#ibcon#read 5, iclass 27, count 0 2006.229.20:26:08.94#ibcon#about to read 6, iclass 27, count 0 2006.229.20:26:08.94#ibcon#read 6, iclass 27, count 0 2006.229.20:26:08.94#ibcon#end of sib2, iclass 27, count 0 2006.229.20:26:08.94#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:26:08.94#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:26:08.94#ibcon#[27=USB\r\n] 2006.229.20:26:08.94#ibcon#*before write, iclass 27, count 0 2006.229.20:26:08.94#ibcon#enter sib2, iclass 27, count 0 2006.229.20:26:08.94#ibcon#flushed, iclass 27, count 0 2006.229.20:26:08.94#ibcon#about to write, iclass 27, count 0 2006.229.20:26:08.94#ibcon#wrote, iclass 27, count 0 2006.229.20:26:08.94#ibcon#about to read 3, iclass 27, count 0 2006.229.20:26:08.97#ibcon#read 3, iclass 27, count 0 2006.229.20:26:08.97#ibcon#about to read 4, iclass 27, count 0 2006.229.20:26:08.97#ibcon#read 4, iclass 27, count 0 2006.229.20:26:08.97#ibcon#about to read 5, iclass 27, count 0 2006.229.20:26:08.97#ibcon#read 5, iclass 27, count 0 2006.229.20:26:08.97#ibcon#about to read 6, iclass 27, count 0 2006.229.20:26:08.97#ibcon#read 6, iclass 27, count 0 2006.229.20:26:08.97#ibcon#end of sib2, iclass 27, count 0 2006.229.20:26:08.97#ibcon#*after write, iclass 27, count 0 2006.229.20:26:08.97#ibcon#*before return 0, iclass 27, count 0 2006.229.20:26:08.97#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:08.97#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:26:08.97#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:26:08.97#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:26:08.97$vck44/vblo=7,734.99 2006.229.20:26:08.97#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:26:08.97#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:26:08.97#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:08.97#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:08.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:08.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:08.97#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:26:08.97#ibcon#first serial, iclass 29, count 0 2006.229.20:26:08.97#ibcon#enter sib2, iclass 29, count 0 2006.229.20:26:08.97#ibcon#flushed, iclass 29, count 0 2006.229.20:26:08.97#ibcon#about to write, iclass 29, count 0 2006.229.20:26:08.97#ibcon#wrote, iclass 29, count 0 2006.229.20:26:08.97#ibcon#about to read 3, iclass 29, count 0 2006.229.20:26:08.99#ibcon#read 3, iclass 29, count 0 2006.229.20:26:08.99#ibcon#about to read 4, iclass 29, count 0 2006.229.20:26:08.99#ibcon#read 4, iclass 29, count 0 2006.229.20:26:08.99#ibcon#about to read 5, iclass 29, count 0 2006.229.20:26:08.99#ibcon#read 5, iclass 29, count 0 2006.229.20:26:08.99#ibcon#about to read 6, iclass 29, count 0 2006.229.20:26:08.99#ibcon#read 6, iclass 29, count 0 2006.229.20:26:08.99#ibcon#end of sib2, iclass 29, count 0 2006.229.20:26:08.99#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:26:08.99#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:26:08.99#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:26:08.99#ibcon#*before write, iclass 29, count 0 2006.229.20:26:08.99#ibcon#enter sib2, iclass 29, count 0 2006.229.20:26:08.99#ibcon#flushed, iclass 29, count 0 2006.229.20:26:08.99#ibcon#about to write, iclass 29, count 0 2006.229.20:26:08.99#ibcon#wrote, iclass 29, count 0 2006.229.20:26:08.99#ibcon#about to read 3, iclass 29, count 0 2006.229.20:26:09.03#ibcon#read 3, iclass 29, count 0 2006.229.20:26:09.03#ibcon#about to read 4, iclass 29, count 0 2006.229.20:26:09.03#ibcon#read 4, iclass 29, count 0 2006.229.20:26:09.03#ibcon#about to read 5, iclass 29, count 0 2006.229.20:26:09.03#ibcon#read 5, iclass 29, count 0 2006.229.20:26:09.03#ibcon#about to read 6, iclass 29, count 0 2006.229.20:26:09.03#ibcon#read 6, iclass 29, count 0 2006.229.20:26:09.03#ibcon#end of sib2, iclass 29, count 0 2006.229.20:26:09.03#ibcon#*after write, iclass 29, count 0 2006.229.20:26:09.03#ibcon#*before return 0, iclass 29, count 0 2006.229.20:26:09.03#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:09.03#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:26:09.03#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:26:09.03#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:26:09.03$vck44/vb=7,4 2006.229.20:26:09.03#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.20:26:09.03#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.20:26:09.03#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:09.03#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:09.09#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:09.09#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:09.09#ibcon#enter wrdev, iclass 31, count 2 2006.229.20:26:09.09#ibcon#first serial, iclass 31, count 2 2006.229.20:26:09.09#ibcon#enter sib2, iclass 31, count 2 2006.229.20:26:09.09#ibcon#flushed, iclass 31, count 2 2006.229.20:26:09.09#ibcon#about to write, iclass 31, count 2 2006.229.20:26:09.09#ibcon#wrote, iclass 31, count 2 2006.229.20:26:09.09#ibcon#about to read 3, iclass 31, count 2 2006.229.20:26:09.11#ibcon#read 3, iclass 31, count 2 2006.229.20:26:09.11#ibcon#about to read 4, iclass 31, count 2 2006.229.20:26:09.11#ibcon#read 4, iclass 31, count 2 2006.229.20:26:09.11#ibcon#about to read 5, iclass 31, count 2 2006.229.20:26:09.11#ibcon#read 5, iclass 31, count 2 2006.229.20:26:09.11#ibcon#about to read 6, iclass 31, count 2 2006.229.20:26:09.11#ibcon#read 6, iclass 31, count 2 2006.229.20:26:09.11#ibcon#end of sib2, iclass 31, count 2 2006.229.20:26:09.11#ibcon#*mode == 0, iclass 31, count 2 2006.229.20:26:09.11#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.20:26:09.11#ibcon#[27=AT07-04\r\n] 2006.229.20:26:09.11#ibcon#*before write, iclass 31, count 2 2006.229.20:26:09.11#ibcon#enter sib2, iclass 31, count 2 2006.229.20:26:09.11#ibcon#flushed, iclass 31, count 2 2006.229.20:26:09.11#ibcon#about to write, iclass 31, count 2 2006.229.20:26:09.11#ibcon#wrote, iclass 31, count 2 2006.229.20:26:09.11#ibcon#about to read 3, iclass 31, count 2 2006.229.20:26:09.14#ibcon#read 3, iclass 31, count 2 2006.229.20:26:09.14#ibcon#about to read 4, iclass 31, count 2 2006.229.20:26:09.14#ibcon#read 4, iclass 31, count 2 2006.229.20:26:09.14#ibcon#about to read 5, iclass 31, count 2 2006.229.20:26:09.14#ibcon#read 5, iclass 31, count 2 2006.229.20:26:09.14#ibcon#about to read 6, iclass 31, count 2 2006.229.20:26:09.14#ibcon#read 6, iclass 31, count 2 2006.229.20:26:09.14#ibcon#end of sib2, iclass 31, count 2 2006.229.20:26:09.14#ibcon#*after write, iclass 31, count 2 2006.229.20:26:09.14#ibcon#*before return 0, iclass 31, count 2 2006.229.20:26:09.14#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:09.14#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:26:09.14#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.20:26:09.14#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:09.14#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:09.26#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:09.26#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:09.26#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:26:09.26#ibcon#first serial, iclass 31, count 0 2006.229.20:26:09.26#ibcon#enter sib2, iclass 31, count 0 2006.229.20:26:09.26#ibcon#flushed, iclass 31, count 0 2006.229.20:26:09.26#ibcon#about to write, iclass 31, count 0 2006.229.20:26:09.26#ibcon#wrote, iclass 31, count 0 2006.229.20:26:09.26#ibcon#about to read 3, iclass 31, count 0 2006.229.20:26:09.28#ibcon#read 3, iclass 31, count 0 2006.229.20:26:09.28#ibcon#about to read 4, iclass 31, count 0 2006.229.20:26:09.28#ibcon#read 4, iclass 31, count 0 2006.229.20:26:09.28#ibcon#about to read 5, iclass 31, count 0 2006.229.20:26:09.28#ibcon#read 5, iclass 31, count 0 2006.229.20:26:09.28#ibcon#about to read 6, iclass 31, count 0 2006.229.20:26:09.28#ibcon#read 6, iclass 31, count 0 2006.229.20:26:09.28#ibcon#end of sib2, iclass 31, count 0 2006.229.20:26:09.28#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:26:09.28#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:26:09.28#ibcon#[27=USB\r\n] 2006.229.20:26:09.28#ibcon#*before write, iclass 31, count 0 2006.229.20:26:09.28#ibcon#enter sib2, iclass 31, count 0 2006.229.20:26:09.28#ibcon#flushed, iclass 31, count 0 2006.229.20:26:09.28#ibcon#about to write, iclass 31, count 0 2006.229.20:26:09.28#ibcon#wrote, iclass 31, count 0 2006.229.20:26:09.28#ibcon#about to read 3, iclass 31, count 0 2006.229.20:26:09.31#ibcon#read 3, iclass 31, count 0 2006.229.20:26:09.31#ibcon#about to read 4, iclass 31, count 0 2006.229.20:26:09.31#ibcon#read 4, iclass 31, count 0 2006.229.20:26:09.31#ibcon#about to read 5, iclass 31, count 0 2006.229.20:26:09.31#ibcon#read 5, iclass 31, count 0 2006.229.20:26:09.31#ibcon#about to read 6, iclass 31, count 0 2006.229.20:26:09.31#ibcon#read 6, iclass 31, count 0 2006.229.20:26:09.31#ibcon#end of sib2, iclass 31, count 0 2006.229.20:26:09.31#ibcon#*after write, iclass 31, count 0 2006.229.20:26:09.31#ibcon#*before return 0, iclass 31, count 0 2006.229.20:26:09.31#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:09.31#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:26:09.31#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:26:09.31#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:26:09.31$vck44/vblo=8,744.99 2006.229.20:26:09.31#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.20:26:09.31#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.20:26:09.31#ibcon#ireg 17 cls_cnt 0 2006.229.20:26:09.31#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:09.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:09.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:09.31#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:26:09.31#ibcon#first serial, iclass 33, count 0 2006.229.20:26:09.31#ibcon#enter sib2, iclass 33, count 0 2006.229.20:26:09.31#ibcon#flushed, iclass 33, count 0 2006.229.20:26:09.31#ibcon#about to write, iclass 33, count 0 2006.229.20:26:09.31#ibcon#wrote, iclass 33, count 0 2006.229.20:26:09.31#ibcon#about to read 3, iclass 33, count 0 2006.229.20:26:09.33#ibcon#read 3, iclass 33, count 0 2006.229.20:26:09.33#ibcon#about to read 4, iclass 33, count 0 2006.229.20:26:09.33#ibcon#read 4, iclass 33, count 0 2006.229.20:26:09.33#ibcon#about to read 5, iclass 33, count 0 2006.229.20:26:09.33#ibcon#read 5, iclass 33, count 0 2006.229.20:26:09.33#ibcon#about to read 6, iclass 33, count 0 2006.229.20:26:09.33#ibcon#read 6, iclass 33, count 0 2006.229.20:26:09.33#ibcon#end of sib2, iclass 33, count 0 2006.229.20:26:09.33#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:26:09.33#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:26:09.33#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:26:09.33#ibcon#*before write, iclass 33, count 0 2006.229.20:26:09.33#ibcon#enter sib2, iclass 33, count 0 2006.229.20:26:09.33#ibcon#flushed, iclass 33, count 0 2006.229.20:26:09.33#ibcon#about to write, iclass 33, count 0 2006.229.20:26:09.33#ibcon#wrote, iclass 33, count 0 2006.229.20:26:09.33#ibcon#about to read 3, iclass 33, count 0 2006.229.20:26:09.37#ibcon#read 3, iclass 33, count 0 2006.229.20:26:09.37#ibcon#about to read 4, iclass 33, count 0 2006.229.20:26:09.37#ibcon#read 4, iclass 33, count 0 2006.229.20:26:09.37#ibcon#about to read 5, iclass 33, count 0 2006.229.20:26:09.37#ibcon#read 5, iclass 33, count 0 2006.229.20:26:09.37#ibcon#about to read 6, iclass 33, count 0 2006.229.20:26:09.37#ibcon#read 6, iclass 33, count 0 2006.229.20:26:09.37#ibcon#end of sib2, iclass 33, count 0 2006.229.20:26:09.37#ibcon#*after write, iclass 33, count 0 2006.229.20:26:09.37#ibcon#*before return 0, iclass 33, count 0 2006.229.20:26:09.37#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:09.37#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:26:09.37#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:26:09.37#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:26:09.37$vck44/vb=8,4 2006.229.20:26:09.37#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.20:26:09.37#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.20:26:09.37#ibcon#ireg 11 cls_cnt 2 2006.229.20:26:09.37#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:09.43#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:09.43#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:09.43#ibcon#enter wrdev, iclass 35, count 2 2006.229.20:26:09.43#ibcon#first serial, iclass 35, count 2 2006.229.20:26:09.43#ibcon#enter sib2, iclass 35, count 2 2006.229.20:26:09.43#ibcon#flushed, iclass 35, count 2 2006.229.20:26:09.43#ibcon#about to write, iclass 35, count 2 2006.229.20:26:09.43#ibcon#wrote, iclass 35, count 2 2006.229.20:26:09.43#ibcon#about to read 3, iclass 35, count 2 2006.229.20:26:09.45#ibcon#read 3, iclass 35, count 2 2006.229.20:26:09.45#ibcon#about to read 4, iclass 35, count 2 2006.229.20:26:09.45#ibcon#read 4, iclass 35, count 2 2006.229.20:26:09.45#ibcon#about to read 5, iclass 35, count 2 2006.229.20:26:09.45#ibcon#read 5, iclass 35, count 2 2006.229.20:26:09.45#ibcon#about to read 6, iclass 35, count 2 2006.229.20:26:09.45#ibcon#read 6, iclass 35, count 2 2006.229.20:26:09.45#ibcon#end of sib2, iclass 35, count 2 2006.229.20:26:09.45#ibcon#*mode == 0, iclass 35, count 2 2006.229.20:26:09.45#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.20:26:09.45#ibcon#[27=AT08-04\r\n] 2006.229.20:26:09.45#ibcon#*before write, iclass 35, count 2 2006.229.20:26:09.45#ibcon#enter sib2, iclass 35, count 2 2006.229.20:26:09.45#ibcon#flushed, iclass 35, count 2 2006.229.20:26:09.45#ibcon#about to write, iclass 35, count 2 2006.229.20:26:09.45#ibcon#wrote, iclass 35, count 2 2006.229.20:26:09.45#ibcon#about to read 3, iclass 35, count 2 2006.229.20:26:09.48#ibcon#read 3, iclass 35, count 2 2006.229.20:26:09.48#ibcon#about to read 4, iclass 35, count 2 2006.229.20:26:09.48#ibcon#read 4, iclass 35, count 2 2006.229.20:26:09.48#ibcon#about to read 5, iclass 35, count 2 2006.229.20:26:09.48#ibcon#read 5, iclass 35, count 2 2006.229.20:26:09.48#ibcon#about to read 6, iclass 35, count 2 2006.229.20:26:09.48#ibcon#read 6, iclass 35, count 2 2006.229.20:26:09.48#ibcon#end of sib2, iclass 35, count 2 2006.229.20:26:09.48#ibcon#*after write, iclass 35, count 2 2006.229.20:26:09.48#ibcon#*before return 0, iclass 35, count 2 2006.229.20:26:09.48#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:09.48#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:26:09.48#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.20:26:09.48#ibcon#ireg 7 cls_cnt 0 2006.229.20:26:09.48#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:09.60#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:09.60#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:09.60#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:26:09.60#ibcon#first serial, iclass 35, count 0 2006.229.20:26:09.60#ibcon#enter sib2, iclass 35, count 0 2006.229.20:26:09.60#ibcon#flushed, iclass 35, count 0 2006.229.20:26:09.60#ibcon#about to write, iclass 35, count 0 2006.229.20:26:09.60#ibcon#wrote, iclass 35, count 0 2006.229.20:26:09.60#ibcon#about to read 3, iclass 35, count 0 2006.229.20:26:09.62#ibcon#read 3, iclass 35, count 0 2006.229.20:26:09.62#ibcon#about to read 4, iclass 35, count 0 2006.229.20:26:09.62#ibcon#read 4, iclass 35, count 0 2006.229.20:26:09.62#ibcon#about to read 5, iclass 35, count 0 2006.229.20:26:09.62#ibcon#read 5, iclass 35, count 0 2006.229.20:26:09.62#ibcon#about to read 6, iclass 35, count 0 2006.229.20:26:09.62#ibcon#read 6, iclass 35, count 0 2006.229.20:26:09.62#ibcon#end of sib2, iclass 35, count 0 2006.229.20:26:09.62#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:26:09.62#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:26:09.62#ibcon#[27=USB\r\n] 2006.229.20:26:09.62#ibcon#*before write, iclass 35, count 0 2006.229.20:26:09.62#ibcon#enter sib2, iclass 35, count 0 2006.229.20:26:09.62#ibcon#flushed, iclass 35, count 0 2006.229.20:26:09.62#ibcon#about to write, iclass 35, count 0 2006.229.20:26:09.62#ibcon#wrote, iclass 35, count 0 2006.229.20:26:09.62#ibcon#about to read 3, iclass 35, count 0 2006.229.20:26:09.65#ibcon#read 3, iclass 35, count 0 2006.229.20:26:09.65#ibcon#about to read 4, iclass 35, count 0 2006.229.20:26:09.65#ibcon#read 4, iclass 35, count 0 2006.229.20:26:09.65#ibcon#about to read 5, iclass 35, count 0 2006.229.20:26:09.65#ibcon#read 5, iclass 35, count 0 2006.229.20:26:09.65#ibcon#about to read 6, iclass 35, count 0 2006.229.20:26:09.65#ibcon#read 6, iclass 35, count 0 2006.229.20:26:09.65#ibcon#end of sib2, iclass 35, count 0 2006.229.20:26:09.65#ibcon#*after write, iclass 35, count 0 2006.229.20:26:09.65#ibcon#*before return 0, iclass 35, count 0 2006.229.20:26:09.65#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:09.65#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:26:09.65#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:26:09.65#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:26:09.65$vck44/vabw=wide 2006.229.20:26:09.65#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.20:26:09.65#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.20:26:09.65#ibcon#ireg 8 cls_cnt 0 2006.229.20:26:09.65#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:09.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:09.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:09.65#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:26:09.65#ibcon#first serial, iclass 37, count 0 2006.229.20:26:09.65#ibcon#enter sib2, iclass 37, count 0 2006.229.20:26:09.65#ibcon#flushed, iclass 37, count 0 2006.229.20:26:09.65#ibcon#about to write, iclass 37, count 0 2006.229.20:26:09.65#ibcon#wrote, iclass 37, count 0 2006.229.20:26:09.65#ibcon#about to read 3, iclass 37, count 0 2006.229.20:26:09.67#ibcon#read 3, iclass 37, count 0 2006.229.20:26:09.67#ibcon#about to read 4, iclass 37, count 0 2006.229.20:26:09.67#ibcon#read 4, iclass 37, count 0 2006.229.20:26:09.67#ibcon#about to read 5, iclass 37, count 0 2006.229.20:26:09.67#ibcon#read 5, iclass 37, count 0 2006.229.20:26:09.67#ibcon#about to read 6, iclass 37, count 0 2006.229.20:26:09.67#ibcon#read 6, iclass 37, count 0 2006.229.20:26:09.67#ibcon#end of sib2, iclass 37, count 0 2006.229.20:26:09.67#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:26:09.67#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:26:09.67#ibcon#[25=BW32\r\n] 2006.229.20:26:09.67#ibcon#*before write, iclass 37, count 0 2006.229.20:26:09.67#ibcon#enter sib2, iclass 37, count 0 2006.229.20:26:09.67#ibcon#flushed, iclass 37, count 0 2006.229.20:26:09.67#ibcon#about to write, iclass 37, count 0 2006.229.20:26:09.67#ibcon#wrote, iclass 37, count 0 2006.229.20:26:09.67#ibcon#about to read 3, iclass 37, count 0 2006.229.20:26:09.70#ibcon#read 3, iclass 37, count 0 2006.229.20:26:09.70#ibcon#about to read 4, iclass 37, count 0 2006.229.20:26:09.70#ibcon#read 4, iclass 37, count 0 2006.229.20:26:09.70#ibcon#about to read 5, iclass 37, count 0 2006.229.20:26:09.70#ibcon#read 5, iclass 37, count 0 2006.229.20:26:09.70#ibcon#about to read 6, iclass 37, count 0 2006.229.20:26:09.70#ibcon#read 6, iclass 37, count 0 2006.229.20:26:09.70#ibcon#end of sib2, iclass 37, count 0 2006.229.20:26:09.70#ibcon#*after write, iclass 37, count 0 2006.229.20:26:09.70#ibcon#*before return 0, iclass 37, count 0 2006.229.20:26:09.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:09.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:26:09.70#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:26:09.70#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:26:09.70$vck44/vbbw=wide 2006.229.20:26:09.70#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.20:26:09.70#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.20:26:09.70#ibcon#ireg 8 cls_cnt 0 2006.229.20:26:09.70#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:26:09.77#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:26:09.77#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:26:09.77#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:26:09.77#ibcon#first serial, iclass 39, count 0 2006.229.20:26:09.77#ibcon#enter sib2, iclass 39, count 0 2006.229.20:26:09.77#ibcon#flushed, iclass 39, count 0 2006.229.20:26:09.77#ibcon#about to write, iclass 39, count 0 2006.229.20:26:09.77#ibcon#wrote, iclass 39, count 0 2006.229.20:26:09.77#ibcon#about to read 3, iclass 39, count 0 2006.229.20:26:09.79#ibcon#read 3, iclass 39, count 0 2006.229.20:26:09.79#ibcon#about to read 4, iclass 39, count 0 2006.229.20:26:09.79#ibcon#read 4, iclass 39, count 0 2006.229.20:26:09.79#ibcon#about to read 5, iclass 39, count 0 2006.229.20:26:09.79#ibcon#read 5, iclass 39, count 0 2006.229.20:26:09.79#ibcon#about to read 6, iclass 39, count 0 2006.229.20:26:09.79#ibcon#read 6, iclass 39, count 0 2006.229.20:26:09.79#ibcon#end of sib2, iclass 39, count 0 2006.229.20:26:09.79#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:26:09.79#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:26:09.79#ibcon#[27=BW32\r\n] 2006.229.20:26:09.79#ibcon#*before write, iclass 39, count 0 2006.229.20:26:09.79#ibcon#enter sib2, iclass 39, count 0 2006.229.20:26:09.79#ibcon#flushed, iclass 39, count 0 2006.229.20:26:09.79#ibcon#about to write, iclass 39, count 0 2006.229.20:26:09.79#ibcon#wrote, iclass 39, count 0 2006.229.20:26:09.79#ibcon#about to read 3, iclass 39, count 0 2006.229.20:26:09.82#ibcon#read 3, iclass 39, count 0 2006.229.20:26:09.82#ibcon#about to read 4, iclass 39, count 0 2006.229.20:26:09.82#ibcon#read 4, iclass 39, count 0 2006.229.20:26:09.82#ibcon#about to read 5, iclass 39, count 0 2006.229.20:26:09.82#ibcon#read 5, iclass 39, count 0 2006.229.20:26:09.82#ibcon#about to read 6, iclass 39, count 0 2006.229.20:26:09.82#ibcon#read 6, iclass 39, count 0 2006.229.20:26:09.82#ibcon#end of sib2, iclass 39, count 0 2006.229.20:26:09.82#ibcon#*after write, iclass 39, count 0 2006.229.20:26:09.82#ibcon#*before return 0, iclass 39, count 0 2006.229.20:26:09.82#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:26:09.82#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:26:09.82#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:26:09.82#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:26:09.82$setupk4/ifdk4 2006.229.20:26:09.82$ifdk4/lo= 2006.229.20:26:09.82$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:26:09.82$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:26:09.82$ifdk4/patch= 2006.229.20:26:09.82$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:26:09.82$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:26:09.82$setupk4/!*+20s 2006.229.20:26:10.56#abcon#<5=/07 1.4 3.6 25.971001001.8\r\n> 2006.229.20:26:10.58#abcon#{5=INTERFACE CLEAR} 2006.229.20:26:10.64#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:26:20.73#abcon#<5=/07 1.4 3.6 25.971001001.8\r\n> 2006.229.20:26:20.75#abcon#{5=INTERFACE CLEAR} 2006.229.20:26:20.81#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:26:24.33$setupk4/"tpicd 2006.229.20:26:24.33$setupk4/echo=off 2006.229.20:26:24.33$setupk4/xlog=off 2006.229.20:26:24.33:!2006.229.20:34:17 2006.229.20:26:56.14#trakl#Source acquired 2006.229.20:26:57.14#flagr#flagr/antenna,acquired 2006.229.20:34:17.00:preob 2006.229.20:34:17.14/onsource/TRACKING 2006.229.20:34:17.14:!2006.229.20:34:27 2006.229.20:34:27.00:"tape 2006.229.20:34:27.00:"st=record 2006.229.20:34:27.00:data_valid=on 2006.229.20:34:27.00:midob 2006.229.20:34:27.14/onsource/TRACKING 2006.229.20:34:27.14/wx/25.95,1001.8,100 2006.229.20:34:27.22/cable/+6.4196E-03 2006.229.20:34:28.31/va/01,08,usb,yes,29,31 2006.229.20:34:28.31/va/02,07,usb,yes,31,32 2006.229.20:34:28.31/va/03,06,usb,yes,39,41 2006.229.20:34:28.31/va/04,07,usb,yes,32,34 2006.229.20:34:28.31/va/05,04,usb,yes,29,29 2006.229.20:34:28.31/va/06,04,usb,yes,32,32 2006.229.20:34:28.31/va/07,05,usb,yes,29,29 2006.229.20:34:28.31/va/08,06,usb,yes,21,26 2006.229.20:34:28.54/valo/01,524.99,yes,locked 2006.229.20:34:28.54/valo/02,534.99,yes,locked 2006.229.20:34:28.54/valo/03,564.99,yes,locked 2006.229.20:34:28.54/valo/04,624.99,yes,locked 2006.229.20:34:28.54/valo/05,734.99,yes,locked 2006.229.20:34:28.54/valo/06,814.99,yes,locked 2006.229.20:34:28.54/valo/07,864.99,yes,locked 2006.229.20:34:28.54/valo/08,884.99,yes,locked 2006.229.20:34:29.63/vb/01,04,usb,yes,30,28 2006.229.20:34:29.63/vb/02,04,usb,yes,33,33 2006.229.20:34:29.63/vb/03,04,usb,yes,30,33 2006.229.20:34:29.63/vb/04,04,usb,yes,34,33 2006.229.20:34:29.63/vb/05,04,usb,yes,27,29 2006.229.20:34:29.63/vb/06,04,usb,yes,31,27 2006.229.20:34:29.63/vb/07,04,usb,yes,31,31 2006.229.20:34:29.63/vb/08,04,usb,yes,28,32 2006.229.20:34:29.87/vblo/01,629.99,yes,locked 2006.229.20:34:29.87/vblo/02,634.99,yes,locked 2006.229.20:34:29.87/vblo/03,649.99,yes,locked 2006.229.20:34:29.87/vblo/04,679.99,yes,locked 2006.229.20:34:29.87/vblo/05,709.99,yes,locked 2006.229.20:34:29.87/vblo/06,719.99,yes,locked 2006.229.20:34:29.87/vblo/07,734.99,yes,locked 2006.229.20:34:29.87/vblo/08,744.99,yes,locked 2006.229.20:34:30.02/vabw/8 2006.229.20:34:30.17/vbbw/8 2006.229.20:34:30.32/xfe/off,on,12.5 2006.229.20:34:30.69/ifatt/23,28,28,28 2006.229.20:34:31.08/fmout-gps/S +4.66E-07 2006.229.20:34:31.12:!2006.229.20:36:07 2006.229.20:36:07.01:data_valid=off 2006.229.20:36:07.01:"et 2006.229.20:36:07.02:!+3s 2006.229.20:36:10.03:"tape 2006.229.20:36:10.03:postob 2006.229.20:36:10.15/cable/+6.4219E-03 2006.229.20:36:10.15/wx/25.95,1001.8,100 2006.229.20:36:10.21/fmout-gps/S +4.66E-07 2006.229.20:36:10.21:scan_name=229-2037,jd0608,50 2006.229.20:36:10.21:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.20:36:12.14#flagr#flagr/antenna,new-source 2006.229.20:36:12.14:checkk5 2006.229.20:36:12.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:36:12.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:36:13.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:36:13.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:36:14.13/chk_obsdata//k5ts1/T2292034??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.20:36:14.52/chk_obsdata//k5ts2/T2292034??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.20:36:14.90/chk_obsdata//k5ts3/T2292034??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.20:36:15.31/chk_obsdata//k5ts4/T2292034??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.20:36:16.04/k5log//k5ts1_log_newline 2006.229.20:36:16.77/k5log//k5ts2_log_newline 2006.229.20:36:17.51/k5log//k5ts3_log_newline 2006.229.20:36:18.22/k5log//k5ts4_log_newline 2006.229.20:36:18.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:36:18.25:setupk4=1 2006.229.20:36:18.25$setupk4/echo=on 2006.229.20:36:18.25$setupk4/pcalon 2006.229.20:36:18.25$pcalon/"no phase cal control is implemented here 2006.229.20:36:18.25$setupk4/"tpicd=stop 2006.229.20:36:18.25$setupk4/"rec=synch_on 2006.229.20:36:18.25$setupk4/"rec_mode=128 2006.229.20:36:18.25$setupk4/!* 2006.229.20:36:18.25$setupk4/recpk4 2006.229.20:36:18.25$recpk4/recpatch= 2006.229.20:36:18.26$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:36:18.26$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:36:18.26$setupk4/vck44 2006.229.20:36:18.26$vck44/valo=1,524.99 2006.229.20:36:18.26#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.20:36:18.26#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.20:36:18.26#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:18.26#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:36:18.26#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:36:18.26#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:36:18.26#ibcon#enter wrdev, iclass 32, count 0 2006.229.20:36:18.26#ibcon#first serial, iclass 32, count 0 2006.229.20:36:18.26#ibcon#enter sib2, iclass 32, count 0 2006.229.20:36:18.26#ibcon#flushed, iclass 32, count 0 2006.229.20:36:18.26#ibcon#about to write, iclass 32, count 0 2006.229.20:36:18.26#ibcon#wrote, iclass 32, count 0 2006.229.20:36:18.26#ibcon#about to read 3, iclass 32, count 0 2006.229.20:36:18.27#ibcon#read 3, iclass 32, count 0 2006.229.20:36:18.27#ibcon#about to read 4, iclass 32, count 0 2006.229.20:36:18.27#ibcon#read 4, iclass 32, count 0 2006.229.20:36:18.27#ibcon#about to read 5, iclass 32, count 0 2006.229.20:36:18.27#ibcon#read 5, iclass 32, count 0 2006.229.20:36:18.27#ibcon#about to read 6, iclass 32, count 0 2006.229.20:36:18.27#ibcon#read 6, iclass 32, count 0 2006.229.20:36:18.27#ibcon#end of sib2, iclass 32, count 0 2006.229.20:36:18.27#ibcon#*mode == 0, iclass 32, count 0 2006.229.20:36:18.27#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.20:36:18.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:36:18.27#ibcon#*before write, iclass 32, count 0 2006.229.20:36:18.27#ibcon#enter sib2, iclass 32, count 0 2006.229.20:36:18.27#ibcon#flushed, iclass 32, count 0 2006.229.20:36:18.27#ibcon#about to write, iclass 32, count 0 2006.229.20:36:18.27#ibcon#wrote, iclass 32, count 0 2006.229.20:36:18.27#ibcon#about to read 3, iclass 32, count 0 2006.229.20:36:18.32#ibcon#read 3, iclass 32, count 0 2006.229.20:36:18.32#ibcon#about to read 4, iclass 32, count 0 2006.229.20:36:18.32#ibcon#read 4, iclass 32, count 0 2006.229.20:36:18.32#ibcon#about to read 5, iclass 32, count 0 2006.229.20:36:18.32#ibcon#read 5, iclass 32, count 0 2006.229.20:36:18.32#ibcon#about to read 6, iclass 32, count 0 2006.229.20:36:18.32#ibcon#read 6, iclass 32, count 0 2006.229.20:36:18.32#ibcon#end of sib2, iclass 32, count 0 2006.229.20:36:18.32#ibcon#*after write, iclass 32, count 0 2006.229.20:36:18.32#ibcon#*before return 0, iclass 32, count 0 2006.229.20:36:18.32#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:36:18.32#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.20:36:18.32#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.20:36:18.32#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.20:36:18.32$vck44/va=1,8 2006.229.20:36:18.32#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.20:36:18.32#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.20:36:18.32#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:18.32#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:18.32#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:18.32#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:18.32#ibcon#enter wrdev, iclass 34, count 2 2006.229.20:36:18.32#ibcon#first serial, iclass 34, count 2 2006.229.20:36:18.32#ibcon#enter sib2, iclass 34, count 2 2006.229.20:36:18.32#ibcon#flushed, iclass 34, count 2 2006.229.20:36:18.32#ibcon#about to write, iclass 34, count 2 2006.229.20:36:18.32#ibcon#wrote, iclass 34, count 2 2006.229.20:36:18.32#ibcon#about to read 3, iclass 34, count 2 2006.229.20:36:18.34#ibcon#read 3, iclass 34, count 2 2006.229.20:36:18.34#ibcon#about to read 4, iclass 34, count 2 2006.229.20:36:18.34#ibcon#read 4, iclass 34, count 2 2006.229.20:36:18.34#ibcon#about to read 5, iclass 34, count 2 2006.229.20:36:18.34#ibcon#read 5, iclass 34, count 2 2006.229.20:36:18.34#ibcon#about to read 6, iclass 34, count 2 2006.229.20:36:18.34#ibcon#read 6, iclass 34, count 2 2006.229.20:36:18.34#ibcon#end of sib2, iclass 34, count 2 2006.229.20:36:18.34#ibcon#*mode == 0, iclass 34, count 2 2006.229.20:36:18.34#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.20:36:18.34#ibcon#[25=AT01-08\r\n] 2006.229.20:36:18.34#ibcon#*before write, iclass 34, count 2 2006.229.20:36:18.34#ibcon#enter sib2, iclass 34, count 2 2006.229.20:36:18.34#ibcon#flushed, iclass 34, count 2 2006.229.20:36:18.34#ibcon#about to write, iclass 34, count 2 2006.229.20:36:18.34#ibcon#wrote, iclass 34, count 2 2006.229.20:36:18.34#ibcon#about to read 3, iclass 34, count 2 2006.229.20:36:18.37#ibcon#read 3, iclass 34, count 2 2006.229.20:36:18.37#ibcon#about to read 4, iclass 34, count 2 2006.229.20:36:18.37#ibcon#read 4, iclass 34, count 2 2006.229.20:36:18.37#ibcon#about to read 5, iclass 34, count 2 2006.229.20:36:18.37#ibcon#read 5, iclass 34, count 2 2006.229.20:36:18.37#ibcon#about to read 6, iclass 34, count 2 2006.229.20:36:18.37#ibcon#read 6, iclass 34, count 2 2006.229.20:36:18.37#ibcon#end of sib2, iclass 34, count 2 2006.229.20:36:18.37#ibcon#*after write, iclass 34, count 2 2006.229.20:36:18.37#ibcon#*before return 0, iclass 34, count 2 2006.229.20:36:18.37#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:18.37#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:18.37#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.20:36:18.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:18.37#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:18.49#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:18.49#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:18.49#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:36:18.49#ibcon#first serial, iclass 34, count 0 2006.229.20:36:18.49#ibcon#enter sib2, iclass 34, count 0 2006.229.20:36:18.49#ibcon#flushed, iclass 34, count 0 2006.229.20:36:18.49#ibcon#about to write, iclass 34, count 0 2006.229.20:36:18.49#ibcon#wrote, iclass 34, count 0 2006.229.20:36:18.49#ibcon#about to read 3, iclass 34, count 0 2006.229.20:36:18.51#ibcon#read 3, iclass 34, count 0 2006.229.20:36:18.51#ibcon#about to read 4, iclass 34, count 0 2006.229.20:36:18.51#ibcon#read 4, iclass 34, count 0 2006.229.20:36:18.51#ibcon#about to read 5, iclass 34, count 0 2006.229.20:36:18.51#ibcon#read 5, iclass 34, count 0 2006.229.20:36:18.51#ibcon#about to read 6, iclass 34, count 0 2006.229.20:36:18.51#ibcon#read 6, iclass 34, count 0 2006.229.20:36:18.51#ibcon#end of sib2, iclass 34, count 0 2006.229.20:36:18.51#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:36:18.51#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:36:18.51#ibcon#[25=USB\r\n] 2006.229.20:36:18.51#ibcon#*before write, iclass 34, count 0 2006.229.20:36:18.51#ibcon#enter sib2, iclass 34, count 0 2006.229.20:36:18.51#ibcon#flushed, iclass 34, count 0 2006.229.20:36:18.51#ibcon#about to write, iclass 34, count 0 2006.229.20:36:18.51#ibcon#wrote, iclass 34, count 0 2006.229.20:36:18.51#ibcon#about to read 3, iclass 34, count 0 2006.229.20:36:18.54#ibcon#read 3, iclass 34, count 0 2006.229.20:36:18.54#ibcon#about to read 4, iclass 34, count 0 2006.229.20:36:18.54#ibcon#read 4, iclass 34, count 0 2006.229.20:36:18.54#ibcon#about to read 5, iclass 34, count 0 2006.229.20:36:18.54#ibcon#read 5, iclass 34, count 0 2006.229.20:36:18.54#ibcon#about to read 6, iclass 34, count 0 2006.229.20:36:18.54#ibcon#read 6, iclass 34, count 0 2006.229.20:36:18.54#ibcon#end of sib2, iclass 34, count 0 2006.229.20:36:18.54#ibcon#*after write, iclass 34, count 0 2006.229.20:36:18.54#ibcon#*before return 0, iclass 34, count 0 2006.229.20:36:18.54#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:18.54#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:18.54#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:36:18.54#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:36:18.54$vck44/valo=2,534.99 2006.229.20:36:18.54#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.20:36:18.54#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.20:36:18.54#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:18.54#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:18.54#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:18.54#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:18.54#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:36:18.54#ibcon#first serial, iclass 36, count 0 2006.229.20:36:18.54#ibcon#enter sib2, iclass 36, count 0 2006.229.20:36:18.54#ibcon#flushed, iclass 36, count 0 2006.229.20:36:18.54#ibcon#about to write, iclass 36, count 0 2006.229.20:36:18.54#ibcon#wrote, iclass 36, count 0 2006.229.20:36:18.54#ibcon#about to read 3, iclass 36, count 0 2006.229.20:36:18.56#ibcon#read 3, iclass 36, count 0 2006.229.20:36:18.56#ibcon#about to read 4, iclass 36, count 0 2006.229.20:36:18.56#ibcon#read 4, iclass 36, count 0 2006.229.20:36:18.56#ibcon#about to read 5, iclass 36, count 0 2006.229.20:36:18.56#ibcon#read 5, iclass 36, count 0 2006.229.20:36:18.56#ibcon#about to read 6, iclass 36, count 0 2006.229.20:36:18.56#ibcon#read 6, iclass 36, count 0 2006.229.20:36:18.56#ibcon#end of sib2, iclass 36, count 0 2006.229.20:36:18.56#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:36:18.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:36:18.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:36:18.56#ibcon#*before write, iclass 36, count 0 2006.229.20:36:18.56#ibcon#enter sib2, iclass 36, count 0 2006.229.20:36:18.56#ibcon#flushed, iclass 36, count 0 2006.229.20:36:18.56#ibcon#about to write, iclass 36, count 0 2006.229.20:36:18.56#ibcon#wrote, iclass 36, count 0 2006.229.20:36:18.56#ibcon#about to read 3, iclass 36, count 0 2006.229.20:36:18.60#ibcon#read 3, iclass 36, count 0 2006.229.20:36:18.60#ibcon#about to read 4, iclass 36, count 0 2006.229.20:36:18.60#ibcon#read 4, iclass 36, count 0 2006.229.20:36:18.60#ibcon#about to read 5, iclass 36, count 0 2006.229.20:36:18.60#ibcon#read 5, iclass 36, count 0 2006.229.20:36:18.60#ibcon#about to read 6, iclass 36, count 0 2006.229.20:36:18.60#ibcon#read 6, iclass 36, count 0 2006.229.20:36:18.60#ibcon#end of sib2, iclass 36, count 0 2006.229.20:36:18.60#ibcon#*after write, iclass 36, count 0 2006.229.20:36:18.60#ibcon#*before return 0, iclass 36, count 0 2006.229.20:36:18.60#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:18.60#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:18.60#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:36:18.60#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:36:18.60$vck44/va=2,7 2006.229.20:36:18.60#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.20:36:18.60#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.20:36:18.60#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:18.60#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:18.66#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:18.66#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:18.66#ibcon#enter wrdev, iclass 38, count 2 2006.229.20:36:18.66#ibcon#first serial, iclass 38, count 2 2006.229.20:36:18.66#ibcon#enter sib2, iclass 38, count 2 2006.229.20:36:18.66#ibcon#flushed, iclass 38, count 2 2006.229.20:36:18.66#ibcon#about to write, iclass 38, count 2 2006.229.20:36:18.66#ibcon#wrote, iclass 38, count 2 2006.229.20:36:18.66#ibcon#about to read 3, iclass 38, count 2 2006.229.20:36:18.68#ibcon#read 3, iclass 38, count 2 2006.229.20:36:18.68#ibcon#about to read 4, iclass 38, count 2 2006.229.20:36:18.68#ibcon#read 4, iclass 38, count 2 2006.229.20:36:18.68#ibcon#about to read 5, iclass 38, count 2 2006.229.20:36:18.68#ibcon#read 5, iclass 38, count 2 2006.229.20:36:18.68#ibcon#about to read 6, iclass 38, count 2 2006.229.20:36:18.68#ibcon#read 6, iclass 38, count 2 2006.229.20:36:18.68#ibcon#end of sib2, iclass 38, count 2 2006.229.20:36:18.68#ibcon#*mode == 0, iclass 38, count 2 2006.229.20:36:18.68#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.20:36:18.68#ibcon#[25=AT02-07\r\n] 2006.229.20:36:18.68#ibcon#*before write, iclass 38, count 2 2006.229.20:36:18.68#ibcon#enter sib2, iclass 38, count 2 2006.229.20:36:18.68#ibcon#flushed, iclass 38, count 2 2006.229.20:36:18.68#ibcon#about to write, iclass 38, count 2 2006.229.20:36:18.68#ibcon#wrote, iclass 38, count 2 2006.229.20:36:18.68#ibcon#about to read 3, iclass 38, count 2 2006.229.20:36:18.71#ibcon#read 3, iclass 38, count 2 2006.229.20:36:18.71#ibcon#about to read 4, iclass 38, count 2 2006.229.20:36:18.71#ibcon#read 4, iclass 38, count 2 2006.229.20:36:18.71#ibcon#about to read 5, iclass 38, count 2 2006.229.20:36:18.71#ibcon#read 5, iclass 38, count 2 2006.229.20:36:18.71#ibcon#about to read 6, iclass 38, count 2 2006.229.20:36:18.71#ibcon#read 6, iclass 38, count 2 2006.229.20:36:18.71#ibcon#end of sib2, iclass 38, count 2 2006.229.20:36:18.71#ibcon#*after write, iclass 38, count 2 2006.229.20:36:18.71#ibcon#*before return 0, iclass 38, count 2 2006.229.20:36:18.71#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:18.71#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:18.71#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.20:36:18.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:18.71#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:18.83#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:18.83#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:18.83#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:36:18.83#ibcon#first serial, iclass 38, count 0 2006.229.20:36:18.83#ibcon#enter sib2, iclass 38, count 0 2006.229.20:36:18.83#ibcon#flushed, iclass 38, count 0 2006.229.20:36:18.83#ibcon#about to write, iclass 38, count 0 2006.229.20:36:18.83#ibcon#wrote, iclass 38, count 0 2006.229.20:36:18.83#ibcon#about to read 3, iclass 38, count 0 2006.229.20:36:18.85#ibcon#read 3, iclass 38, count 0 2006.229.20:36:18.85#ibcon#about to read 4, iclass 38, count 0 2006.229.20:36:18.85#ibcon#read 4, iclass 38, count 0 2006.229.20:36:18.85#ibcon#about to read 5, iclass 38, count 0 2006.229.20:36:18.85#ibcon#read 5, iclass 38, count 0 2006.229.20:36:18.85#ibcon#about to read 6, iclass 38, count 0 2006.229.20:36:18.85#ibcon#read 6, iclass 38, count 0 2006.229.20:36:18.85#ibcon#end of sib2, iclass 38, count 0 2006.229.20:36:18.85#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:36:18.85#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:36:18.85#ibcon#[25=USB\r\n] 2006.229.20:36:18.85#ibcon#*before write, iclass 38, count 0 2006.229.20:36:18.85#ibcon#enter sib2, iclass 38, count 0 2006.229.20:36:18.85#ibcon#flushed, iclass 38, count 0 2006.229.20:36:18.85#ibcon#about to write, iclass 38, count 0 2006.229.20:36:18.85#ibcon#wrote, iclass 38, count 0 2006.229.20:36:18.85#ibcon#about to read 3, iclass 38, count 0 2006.229.20:36:18.88#ibcon#read 3, iclass 38, count 0 2006.229.20:36:18.88#ibcon#about to read 4, iclass 38, count 0 2006.229.20:36:18.88#ibcon#read 4, iclass 38, count 0 2006.229.20:36:18.88#ibcon#about to read 5, iclass 38, count 0 2006.229.20:36:18.88#ibcon#read 5, iclass 38, count 0 2006.229.20:36:18.88#ibcon#about to read 6, iclass 38, count 0 2006.229.20:36:18.88#ibcon#read 6, iclass 38, count 0 2006.229.20:36:18.88#ibcon#end of sib2, iclass 38, count 0 2006.229.20:36:18.88#ibcon#*after write, iclass 38, count 0 2006.229.20:36:18.88#ibcon#*before return 0, iclass 38, count 0 2006.229.20:36:18.88#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:18.88#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:18.88#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:36:18.88#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:36:18.88$vck44/valo=3,564.99 2006.229.20:36:18.88#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.20:36:18.88#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.20:36:18.88#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:18.88#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:18.88#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:18.88#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:18.88#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:36:18.88#ibcon#first serial, iclass 40, count 0 2006.229.20:36:18.88#ibcon#enter sib2, iclass 40, count 0 2006.229.20:36:18.88#ibcon#flushed, iclass 40, count 0 2006.229.20:36:18.88#ibcon#about to write, iclass 40, count 0 2006.229.20:36:18.88#ibcon#wrote, iclass 40, count 0 2006.229.20:36:18.88#ibcon#about to read 3, iclass 40, count 0 2006.229.20:36:18.90#ibcon#read 3, iclass 40, count 0 2006.229.20:36:18.90#ibcon#about to read 4, iclass 40, count 0 2006.229.20:36:18.90#ibcon#read 4, iclass 40, count 0 2006.229.20:36:18.90#ibcon#about to read 5, iclass 40, count 0 2006.229.20:36:18.90#ibcon#read 5, iclass 40, count 0 2006.229.20:36:18.90#ibcon#about to read 6, iclass 40, count 0 2006.229.20:36:18.90#ibcon#read 6, iclass 40, count 0 2006.229.20:36:18.90#ibcon#end of sib2, iclass 40, count 0 2006.229.20:36:18.90#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:36:18.90#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:36:18.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:36:18.90#ibcon#*before write, iclass 40, count 0 2006.229.20:36:18.90#ibcon#enter sib2, iclass 40, count 0 2006.229.20:36:18.90#ibcon#flushed, iclass 40, count 0 2006.229.20:36:18.90#ibcon#about to write, iclass 40, count 0 2006.229.20:36:18.90#ibcon#wrote, iclass 40, count 0 2006.229.20:36:18.90#ibcon#about to read 3, iclass 40, count 0 2006.229.20:36:18.94#ibcon#read 3, iclass 40, count 0 2006.229.20:36:18.94#ibcon#about to read 4, iclass 40, count 0 2006.229.20:36:18.94#ibcon#read 4, iclass 40, count 0 2006.229.20:36:18.94#ibcon#about to read 5, iclass 40, count 0 2006.229.20:36:18.94#ibcon#read 5, iclass 40, count 0 2006.229.20:36:18.94#ibcon#about to read 6, iclass 40, count 0 2006.229.20:36:18.94#ibcon#read 6, iclass 40, count 0 2006.229.20:36:18.94#ibcon#end of sib2, iclass 40, count 0 2006.229.20:36:18.94#ibcon#*after write, iclass 40, count 0 2006.229.20:36:18.94#ibcon#*before return 0, iclass 40, count 0 2006.229.20:36:18.94#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:18.94#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:18.94#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:36:18.94#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:36:18.94$vck44/va=3,6 2006.229.20:36:18.94#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.20:36:18.94#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.20:36:18.94#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:18.94#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:19.00#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:19.00#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:19.00#ibcon#enter wrdev, iclass 4, count 2 2006.229.20:36:19.00#ibcon#first serial, iclass 4, count 2 2006.229.20:36:19.00#ibcon#enter sib2, iclass 4, count 2 2006.229.20:36:19.00#ibcon#flushed, iclass 4, count 2 2006.229.20:36:19.00#ibcon#about to write, iclass 4, count 2 2006.229.20:36:19.00#ibcon#wrote, iclass 4, count 2 2006.229.20:36:19.00#ibcon#about to read 3, iclass 4, count 2 2006.229.20:36:19.02#ibcon#read 3, iclass 4, count 2 2006.229.20:36:19.02#ibcon#about to read 4, iclass 4, count 2 2006.229.20:36:19.02#ibcon#read 4, iclass 4, count 2 2006.229.20:36:19.02#ibcon#about to read 5, iclass 4, count 2 2006.229.20:36:19.02#ibcon#read 5, iclass 4, count 2 2006.229.20:36:19.02#ibcon#about to read 6, iclass 4, count 2 2006.229.20:36:19.02#ibcon#read 6, iclass 4, count 2 2006.229.20:36:19.02#ibcon#end of sib2, iclass 4, count 2 2006.229.20:36:19.02#ibcon#*mode == 0, iclass 4, count 2 2006.229.20:36:19.02#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.20:36:19.02#ibcon#[25=AT03-06\r\n] 2006.229.20:36:19.02#ibcon#*before write, iclass 4, count 2 2006.229.20:36:19.02#ibcon#enter sib2, iclass 4, count 2 2006.229.20:36:19.02#ibcon#flushed, iclass 4, count 2 2006.229.20:36:19.02#ibcon#about to write, iclass 4, count 2 2006.229.20:36:19.02#ibcon#wrote, iclass 4, count 2 2006.229.20:36:19.02#ibcon#about to read 3, iclass 4, count 2 2006.229.20:36:19.05#ibcon#read 3, iclass 4, count 2 2006.229.20:36:19.05#ibcon#about to read 4, iclass 4, count 2 2006.229.20:36:19.05#ibcon#read 4, iclass 4, count 2 2006.229.20:36:19.05#ibcon#about to read 5, iclass 4, count 2 2006.229.20:36:19.05#ibcon#read 5, iclass 4, count 2 2006.229.20:36:19.05#ibcon#about to read 6, iclass 4, count 2 2006.229.20:36:19.05#ibcon#read 6, iclass 4, count 2 2006.229.20:36:19.05#ibcon#end of sib2, iclass 4, count 2 2006.229.20:36:19.05#ibcon#*after write, iclass 4, count 2 2006.229.20:36:19.05#ibcon#*before return 0, iclass 4, count 2 2006.229.20:36:19.05#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:19.05#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:19.05#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.20:36:19.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:19.05#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:19.17#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:19.17#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:19.17#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:36:19.17#ibcon#first serial, iclass 4, count 0 2006.229.20:36:19.17#ibcon#enter sib2, iclass 4, count 0 2006.229.20:36:19.17#ibcon#flushed, iclass 4, count 0 2006.229.20:36:19.17#ibcon#about to write, iclass 4, count 0 2006.229.20:36:19.17#ibcon#wrote, iclass 4, count 0 2006.229.20:36:19.17#ibcon#about to read 3, iclass 4, count 0 2006.229.20:36:19.19#ibcon#read 3, iclass 4, count 0 2006.229.20:36:19.19#ibcon#about to read 4, iclass 4, count 0 2006.229.20:36:19.19#ibcon#read 4, iclass 4, count 0 2006.229.20:36:19.19#ibcon#about to read 5, iclass 4, count 0 2006.229.20:36:19.19#ibcon#read 5, iclass 4, count 0 2006.229.20:36:19.19#ibcon#about to read 6, iclass 4, count 0 2006.229.20:36:19.19#ibcon#read 6, iclass 4, count 0 2006.229.20:36:19.19#ibcon#end of sib2, iclass 4, count 0 2006.229.20:36:19.19#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:36:19.19#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:36:19.19#ibcon#[25=USB\r\n] 2006.229.20:36:19.19#ibcon#*before write, iclass 4, count 0 2006.229.20:36:19.19#ibcon#enter sib2, iclass 4, count 0 2006.229.20:36:19.19#ibcon#flushed, iclass 4, count 0 2006.229.20:36:19.19#ibcon#about to write, iclass 4, count 0 2006.229.20:36:19.19#ibcon#wrote, iclass 4, count 0 2006.229.20:36:19.19#ibcon#about to read 3, iclass 4, count 0 2006.229.20:36:19.22#ibcon#read 3, iclass 4, count 0 2006.229.20:36:19.22#ibcon#about to read 4, iclass 4, count 0 2006.229.20:36:19.22#ibcon#read 4, iclass 4, count 0 2006.229.20:36:19.22#ibcon#about to read 5, iclass 4, count 0 2006.229.20:36:19.22#ibcon#read 5, iclass 4, count 0 2006.229.20:36:19.22#ibcon#about to read 6, iclass 4, count 0 2006.229.20:36:19.22#ibcon#read 6, iclass 4, count 0 2006.229.20:36:19.22#ibcon#end of sib2, iclass 4, count 0 2006.229.20:36:19.22#ibcon#*after write, iclass 4, count 0 2006.229.20:36:19.22#ibcon#*before return 0, iclass 4, count 0 2006.229.20:36:19.22#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:19.22#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:19.22#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:36:19.22#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:36:19.22$vck44/valo=4,624.99 2006.229.20:36:19.22#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.20:36:19.22#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.20:36:19.22#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:19.22#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:19.22#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:19.22#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:19.22#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:36:19.22#ibcon#first serial, iclass 6, count 0 2006.229.20:36:19.22#ibcon#enter sib2, iclass 6, count 0 2006.229.20:36:19.22#ibcon#flushed, iclass 6, count 0 2006.229.20:36:19.22#ibcon#about to write, iclass 6, count 0 2006.229.20:36:19.22#ibcon#wrote, iclass 6, count 0 2006.229.20:36:19.22#ibcon#about to read 3, iclass 6, count 0 2006.229.20:36:19.24#ibcon#read 3, iclass 6, count 0 2006.229.20:36:19.24#ibcon#about to read 4, iclass 6, count 0 2006.229.20:36:19.24#ibcon#read 4, iclass 6, count 0 2006.229.20:36:19.24#ibcon#about to read 5, iclass 6, count 0 2006.229.20:36:19.24#ibcon#read 5, iclass 6, count 0 2006.229.20:36:19.24#ibcon#about to read 6, iclass 6, count 0 2006.229.20:36:19.24#ibcon#read 6, iclass 6, count 0 2006.229.20:36:19.24#ibcon#end of sib2, iclass 6, count 0 2006.229.20:36:19.24#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:36:19.24#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:36:19.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:36:19.24#ibcon#*before write, iclass 6, count 0 2006.229.20:36:19.24#ibcon#enter sib2, iclass 6, count 0 2006.229.20:36:19.24#ibcon#flushed, iclass 6, count 0 2006.229.20:36:19.24#ibcon#about to write, iclass 6, count 0 2006.229.20:36:19.24#ibcon#wrote, iclass 6, count 0 2006.229.20:36:19.24#ibcon#about to read 3, iclass 6, count 0 2006.229.20:36:19.28#ibcon#read 3, iclass 6, count 0 2006.229.20:36:19.28#ibcon#about to read 4, iclass 6, count 0 2006.229.20:36:19.28#ibcon#read 4, iclass 6, count 0 2006.229.20:36:19.28#ibcon#about to read 5, iclass 6, count 0 2006.229.20:36:19.28#ibcon#read 5, iclass 6, count 0 2006.229.20:36:19.28#ibcon#about to read 6, iclass 6, count 0 2006.229.20:36:19.28#ibcon#read 6, iclass 6, count 0 2006.229.20:36:19.28#ibcon#end of sib2, iclass 6, count 0 2006.229.20:36:19.28#ibcon#*after write, iclass 6, count 0 2006.229.20:36:19.28#ibcon#*before return 0, iclass 6, count 0 2006.229.20:36:19.28#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:19.28#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:19.28#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:36:19.28#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:36:19.28$vck44/va=4,7 2006.229.20:36:19.28#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.20:36:19.28#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.20:36:19.28#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:19.28#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:19.34#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:19.34#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:19.34#ibcon#enter wrdev, iclass 10, count 2 2006.229.20:36:19.34#ibcon#first serial, iclass 10, count 2 2006.229.20:36:19.34#ibcon#enter sib2, iclass 10, count 2 2006.229.20:36:19.34#ibcon#flushed, iclass 10, count 2 2006.229.20:36:19.34#ibcon#about to write, iclass 10, count 2 2006.229.20:36:19.34#ibcon#wrote, iclass 10, count 2 2006.229.20:36:19.34#ibcon#about to read 3, iclass 10, count 2 2006.229.20:36:19.36#ibcon#read 3, iclass 10, count 2 2006.229.20:36:19.36#ibcon#about to read 4, iclass 10, count 2 2006.229.20:36:19.36#ibcon#read 4, iclass 10, count 2 2006.229.20:36:19.36#ibcon#about to read 5, iclass 10, count 2 2006.229.20:36:19.36#ibcon#read 5, iclass 10, count 2 2006.229.20:36:19.36#ibcon#about to read 6, iclass 10, count 2 2006.229.20:36:19.36#ibcon#read 6, iclass 10, count 2 2006.229.20:36:19.36#ibcon#end of sib2, iclass 10, count 2 2006.229.20:36:19.36#ibcon#*mode == 0, iclass 10, count 2 2006.229.20:36:19.36#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.20:36:19.36#ibcon#[25=AT04-07\r\n] 2006.229.20:36:19.36#ibcon#*before write, iclass 10, count 2 2006.229.20:36:19.36#ibcon#enter sib2, iclass 10, count 2 2006.229.20:36:19.36#ibcon#flushed, iclass 10, count 2 2006.229.20:36:19.36#ibcon#about to write, iclass 10, count 2 2006.229.20:36:19.36#ibcon#wrote, iclass 10, count 2 2006.229.20:36:19.36#ibcon#about to read 3, iclass 10, count 2 2006.229.20:36:19.39#ibcon#read 3, iclass 10, count 2 2006.229.20:36:19.39#ibcon#about to read 4, iclass 10, count 2 2006.229.20:36:19.39#ibcon#read 4, iclass 10, count 2 2006.229.20:36:19.39#ibcon#about to read 5, iclass 10, count 2 2006.229.20:36:19.39#ibcon#read 5, iclass 10, count 2 2006.229.20:36:19.39#ibcon#about to read 6, iclass 10, count 2 2006.229.20:36:19.39#ibcon#read 6, iclass 10, count 2 2006.229.20:36:19.39#ibcon#end of sib2, iclass 10, count 2 2006.229.20:36:19.39#ibcon#*after write, iclass 10, count 2 2006.229.20:36:19.39#ibcon#*before return 0, iclass 10, count 2 2006.229.20:36:19.39#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:19.39#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:19.39#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.20:36:19.39#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:19.39#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:19.51#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:19.51#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:19.51#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:36:19.51#ibcon#first serial, iclass 10, count 0 2006.229.20:36:19.51#ibcon#enter sib2, iclass 10, count 0 2006.229.20:36:19.51#ibcon#flushed, iclass 10, count 0 2006.229.20:36:19.51#ibcon#about to write, iclass 10, count 0 2006.229.20:36:19.51#ibcon#wrote, iclass 10, count 0 2006.229.20:36:19.51#ibcon#about to read 3, iclass 10, count 0 2006.229.20:36:19.53#ibcon#read 3, iclass 10, count 0 2006.229.20:36:19.53#ibcon#about to read 4, iclass 10, count 0 2006.229.20:36:19.53#ibcon#read 4, iclass 10, count 0 2006.229.20:36:19.53#ibcon#about to read 5, iclass 10, count 0 2006.229.20:36:19.53#ibcon#read 5, iclass 10, count 0 2006.229.20:36:19.53#ibcon#about to read 6, iclass 10, count 0 2006.229.20:36:19.53#ibcon#read 6, iclass 10, count 0 2006.229.20:36:19.53#ibcon#end of sib2, iclass 10, count 0 2006.229.20:36:19.53#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:36:19.53#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:36:19.53#ibcon#[25=USB\r\n] 2006.229.20:36:19.53#ibcon#*before write, iclass 10, count 0 2006.229.20:36:19.53#ibcon#enter sib2, iclass 10, count 0 2006.229.20:36:19.53#ibcon#flushed, iclass 10, count 0 2006.229.20:36:19.53#ibcon#about to write, iclass 10, count 0 2006.229.20:36:19.53#ibcon#wrote, iclass 10, count 0 2006.229.20:36:19.53#ibcon#about to read 3, iclass 10, count 0 2006.229.20:36:19.56#ibcon#read 3, iclass 10, count 0 2006.229.20:36:19.56#ibcon#about to read 4, iclass 10, count 0 2006.229.20:36:19.56#ibcon#read 4, iclass 10, count 0 2006.229.20:36:19.56#ibcon#about to read 5, iclass 10, count 0 2006.229.20:36:19.56#ibcon#read 5, iclass 10, count 0 2006.229.20:36:19.56#ibcon#about to read 6, iclass 10, count 0 2006.229.20:36:19.56#ibcon#read 6, iclass 10, count 0 2006.229.20:36:19.56#ibcon#end of sib2, iclass 10, count 0 2006.229.20:36:19.56#ibcon#*after write, iclass 10, count 0 2006.229.20:36:19.56#ibcon#*before return 0, iclass 10, count 0 2006.229.20:36:19.56#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:19.56#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:19.56#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:36:19.56#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:36:19.56$vck44/valo=5,734.99 2006.229.20:36:19.56#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.20:36:19.56#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.20:36:19.56#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:19.56#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:19.56#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:19.56#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:19.56#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:36:19.56#ibcon#first serial, iclass 12, count 0 2006.229.20:36:19.56#ibcon#enter sib2, iclass 12, count 0 2006.229.20:36:19.56#ibcon#flushed, iclass 12, count 0 2006.229.20:36:19.56#ibcon#about to write, iclass 12, count 0 2006.229.20:36:19.56#ibcon#wrote, iclass 12, count 0 2006.229.20:36:19.56#ibcon#about to read 3, iclass 12, count 0 2006.229.20:36:19.58#ibcon#read 3, iclass 12, count 0 2006.229.20:36:19.58#ibcon#about to read 4, iclass 12, count 0 2006.229.20:36:19.58#ibcon#read 4, iclass 12, count 0 2006.229.20:36:19.58#ibcon#about to read 5, iclass 12, count 0 2006.229.20:36:19.58#ibcon#read 5, iclass 12, count 0 2006.229.20:36:19.58#ibcon#about to read 6, iclass 12, count 0 2006.229.20:36:19.58#ibcon#read 6, iclass 12, count 0 2006.229.20:36:19.58#ibcon#end of sib2, iclass 12, count 0 2006.229.20:36:19.58#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:36:19.58#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:36:19.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:36:19.58#ibcon#*before write, iclass 12, count 0 2006.229.20:36:19.58#ibcon#enter sib2, iclass 12, count 0 2006.229.20:36:19.58#ibcon#flushed, iclass 12, count 0 2006.229.20:36:19.58#ibcon#about to write, iclass 12, count 0 2006.229.20:36:19.58#ibcon#wrote, iclass 12, count 0 2006.229.20:36:19.58#ibcon#about to read 3, iclass 12, count 0 2006.229.20:36:19.62#ibcon#read 3, iclass 12, count 0 2006.229.20:36:19.62#ibcon#about to read 4, iclass 12, count 0 2006.229.20:36:19.62#ibcon#read 4, iclass 12, count 0 2006.229.20:36:19.62#ibcon#about to read 5, iclass 12, count 0 2006.229.20:36:19.62#ibcon#read 5, iclass 12, count 0 2006.229.20:36:19.62#ibcon#about to read 6, iclass 12, count 0 2006.229.20:36:19.62#ibcon#read 6, iclass 12, count 0 2006.229.20:36:19.62#ibcon#end of sib2, iclass 12, count 0 2006.229.20:36:19.62#ibcon#*after write, iclass 12, count 0 2006.229.20:36:19.62#ibcon#*before return 0, iclass 12, count 0 2006.229.20:36:19.62#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:19.62#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:19.62#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:36:19.62#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:36:19.62$vck44/va=5,4 2006.229.20:36:19.62#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.20:36:19.62#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.20:36:19.62#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:19.62#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:19.68#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:19.68#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:19.68#ibcon#enter wrdev, iclass 14, count 2 2006.229.20:36:19.68#ibcon#first serial, iclass 14, count 2 2006.229.20:36:19.68#ibcon#enter sib2, iclass 14, count 2 2006.229.20:36:19.68#ibcon#flushed, iclass 14, count 2 2006.229.20:36:19.68#ibcon#about to write, iclass 14, count 2 2006.229.20:36:19.68#ibcon#wrote, iclass 14, count 2 2006.229.20:36:19.68#ibcon#about to read 3, iclass 14, count 2 2006.229.20:36:19.70#ibcon#read 3, iclass 14, count 2 2006.229.20:36:19.70#ibcon#about to read 4, iclass 14, count 2 2006.229.20:36:19.70#ibcon#read 4, iclass 14, count 2 2006.229.20:36:19.70#ibcon#about to read 5, iclass 14, count 2 2006.229.20:36:19.70#ibcon#read 5, iclass 14, count 2 2006.229.20:36:19.70#ibcon#about to read 6, iclass 14, count 2 2006.229.20:36:19.70#ibcon#read 6, iclass 14, count 2 2006.229.20:36:19.70#ibcon#end of sib2, iclass 14, count 2 2006.229.20:36:19.70#ibcon#*mode == 0, iclass 14, count 2 2006.229.20:36:19.70#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.20:36:19.70#ibcon#[25=AT05-04\r\n] 2006.229.20:36:19.70#ibcon#*before write, iclass 14, count 2 2006.229.20:36:19.70#ibcon#enter sib2, iclass 14, count 2 2006.229.20:36:19.70#ibcon#flushed, iclass 14, count 2 2006.229.20:36:19.70#ibcon#about to write, iclass 14, count 2 2006.229.20:36:19.70#ibcon#wrote, iclass 14, count 2 2006.229.20:36:19.70#ibcon#about to read 3, iclass 14, count 2 2006.229.20:36:19.73#ibcon#read 3, iclass 14, count 2 2006.229.20:36:19.73#ibcon#about to read 4, iclass 14, count 2 2006.229.20:36:19.73#ibcon#read 4, iclass 14, count 2 2006.229.20:36:19.73#ibcon#about to read 5, iclass 14, count 2 2006.229.20:36:19.73#ibcon#read 5, iclass 14, count 2 2006.229.20:36:19.73#ibcon#about to read 6, iclass 14, count 2 2006.229.20:36:19.73#ibcon#read 6, iclass 14, count 2 2006.229.20:36:19.73#ibcon#end of sib2, iclass 14, count 2 2006.229.20:36:19.73#ibcon#*after write, iclass 14, count 2 2006.229.20:36:19.73#ibcon#*before return 0, iclass 14, count 2 2006.229.20:36:19.73#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:19.73#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:19.73#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.20:36:19.73#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:19.73#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:19.85#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:19.85#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:19.85#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:36:19.85#ibcon#first serial, iclass 14, count 0 2006.229.20:36:19.85#ibcon#enter sib2, iclass 14, count 0 2006.229.20:36:19.85#ibcon#flushed, iclass 14, count 0 2006.229.20:36:19.85#ibcon#about to write, iclass 14, count 0 2006.229.20:36:19.85#ibcon#wrote, iclass 14, count 0 2006.229.20:36:19.85#ibcon#about to read 3, iclass 14, count 0 2006.229.20:36:19.87#ibcon#read 3, iclass 14, count 0 2006.229.20:36:19.87#ibcon#about to read 4, iclass 14, count 0 2006.229.20:36:19.87#ibcon#read 4, iclass 14, count 0 2006.229.20:36:19.87#ibcon#about to read 5, iclass 14, count 0 2006.229.20:36:19.87#ibcon#read 5, iclass 14, count 0 2006.229.20:36:19.87#ibcon#about to read 6, iclass 14, count 0 2006.229.20:36:19.87#ibcon#read 6, iclass 14, count 0 2006.229.20:36:19.87#ibcon#end of sib2, iclass 14, count 0 2006.229.20:36:19.87#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:36:19.87#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:36:19.87#ibcon#[25=USB\r\n] 2006.229.20:36:19.87#ibcon#*before write, iclass 14, count 0 2006.229.20:36:19.87#ibcon#enter sib2, iclass 14, count 0 2006.229.20:36:19.87#ibcon#flushed, iclass 14, count 0 2006.229.20:36:19.87#ibcon#about to write, iclass 14, count 0 2006.229.20:36:19.87#ibcon#wrote, iclass 14, count 0 2006.229.20:36:19.87#ibcon#about to read 3, iclass 14, count 0 2006.229.20:36:19.90#ibcon#read 3, iclass 14, count 0 2006.229.20:36:19.90#ibcon#about to read 4, iclass 14, count 0 2006.229.20:36:19.90#ibcon#read 4, iclass 14, count 0 2006.229.20:36:19.90#ibcon#about to read 5, iclass 14, count 0 2006.229.20:36:19.90#ibcon#read 5, iclass 14, count 0 2006.229.20:36:19.90#ibcon#about to read 6, iclass 14, count 0 2006.229.20:36:19.90#ibcon#read 6, iclass 14, count 0 2006.229.20:36:19.90#ibcon#end of sib2, iclass 14, count 0 2006.229.20:36:19.90#ibcon#*after write, iclass 14, count 0 2006.229.20:36:19.90#ibcon#*before return 0, iclass 14, count 0 2006.229.20:36:19.90#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:19.90#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:19.90#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:36:19.90#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:36:19.90$vck44/valo=6,814.99 2006.229.20:36:19.90#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.20:36:19.90#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.20:36:19.90#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:19.90#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:19.90#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:19.90#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:19.90#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:36:19.90#ibcon#first serial, iclass 16, count 0 2006.229.20:36:19.90#ibcon#enter sib2, iclass 16, count 0 2006.229.20:36:19.90#ibcon#flushed, iclass 16, count 0 2006.229.20:36:19.90#ibcon#about to write, iclass 16, count 0 2006.229.20:36:19.90#ibcon#wrote, iclass 16, count 0 2006.229.20:36:19.90#ibcon#about to read 3, iclass 16, count 0 2006.229.20:36:19.92#ibcon#read 3, iclass 16, count 0 2006.229.20:36:19.92#ibcon#about to read 4, iclass 16, count 0 2006.229.20:36:19.92#ibcon#read 4, iclass 16, count 0 2006.229.20:36:19.92#ibcon#about to read 5, iclass 16, count 0 2006.229.20:36:19.92#ibcon#read 5, iclass 16, count 0 2006.229.20:36:19.92#ibcon#about to read 6, iclass 16, count 0 2006.229.20:36:19.92#ibcon#read 6, iclass 16, count 0 2006.229.20:36:19.92#ibcon#end of sib2, iclass 16, count 0 2006.229.20:36:19.92#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:36:19.92#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:36:19.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:36:19.92#ibcon#*before write, iclass 16, count 0 2006.229.20:36:19.92#ibcon#enter sib2, iclass 16, count 0 2006.229.20:36:19.92#ibcon#flushed, iclass 16, count 0 2006.229.20:36:19.92#ibcon#about to write, iclass 16, count 0 2006.229.20:36:19.92#ibcon#wrote, iclass 16, count 0 2006.229.20:36:19.92#ibcon#about to read 3, iclass 16, count 0 2006.229.20:36:19.96#ibcon#read 3, iclass 16, count 0 2006.229.20:36:19.96#ibcon#about to read 4, iclass 16, count 0 2006.229.20:36:19.96#ibcon#read 4, iclass 16, count 0 2006.229.20:36:19.96#ibcon#about to read 5, iclass 16, count 0 2006.229.20:36:19.96#ibcon#read 5, iclass 16, count 0 2006.229.20:36:19.96#ibcon#about to read 6, iclass 16, count 0 2006.229.20:36:19.96#ibcon#read 6, iclass 16, count 0 2006.229.20:36:19.96#ibcon#end of sib2, iclass 16, count 0 2006.229.20:36:19.96#ibcon#*after write, iclass 16, count 0 2006.229.20:36:19.96#ibcon#*before return 0, iclass 16, count 0 2006.229.20:36:19.96#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:19.96#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:19.96#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:36:19.96#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:36:19.96$vck44/va=6,4 2006.229.20:36:19.96#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.20:36:19.96#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.20:36:19.96#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:19.96#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:20.02#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:20.02#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:20.02#ibcon#enter wrdev, iclass 18, count 2 2006.229.20:36:20.02#ibcon#first serial, iclass 18, count 2 2006.229.20:36:20.02#ibcon#enter sib2, iclass 18, count 2 2006.229.20:36:20.02#ibcon#flushed, iclass 18, count 2 2006.229.20:36:20.02#ibcon#about to write, iclass 18, count 2 2006.229.20:36:20.02#ibcon#wrote, iclass 18, count 2 2006.229.20:36:20.02#ibcon#about to read 3, iclass 18, count 2 2006.229.20:36:20.04#ibcon#read 3, iclass 18, count 2 2006.229.20:36:20.04#ibcon#about to read 4, iclass 18, count 2 2006.229.20:36:20.04#ibcon#read 4, iclass 18, count 2 2006.229.20:36:20.04#ibcon#about to read 5, iclass 18, count 2 2006.229.20:36:20.04#ibcon#read 5, iclass 18, count 2 2006.229.20:36:20.04#ibcon#about to read 6, iclass 18, count 2 2006.229.20:36:20.04#ibcon#read 6, iclass 18, count 2 2006.229.20:36:20.04#ibcon#end of sib2, iclass 18, count 2 2006.229.20:36:20.04#ibcon#*mode == 0, iclass 18, count 2 2006.229.20:36:20.04#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.20:36:20.04#ibcon#[25=AT06-04\r\n] 2006.229.20:36:20.04#ibcon#*before write, iclass 18, count 2 2006.229.20:36:20.04#ibcon#enter sib2, iclass 18, count 2 2006.229.20:36:20.04#ibcon#flushed, iclass 18, count 2 2006.229.20:36:20.04#ibcon#about to write, iclass 18, count 2 2006.229.20:36:20.04#ibcon#wrote, iclass 18, count 2 2006.229.20:36:20.04#ibcon#about to read 3, iclass 18, count 2 2006.229.20:36:20.07#ibcon#read 3, iclass 18, count 2 2006.229.20:36:20.07#ibcon#about to read 4, iclass 18, count 2 2006.229.20:36:20.07#ibcon#read 4, iclass 18, count 2 2006.229.20:36:20.07#ibcon#about to read 5, iclass 18, count 2 2006.229.20:36:20.07#ibcon#read 5, iclass 18, count 2 2006.229.20:36:20.07#ibcon#about to read 6, iclass 18, count 2 2006.229.20:36:20.07#ibcon#read 6, iclass 18, count 2 2006.229.20:36:20.07#ibcon#end of sib2, iclass 18, count 2 2006.229.20:36:20.07#ibcon#*after write, iclass 18, count 2 2006.229.20:36:20.07#ibcon#*before return 0, iclass 18, count 2 2006.229.20:36:20.07#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:20.07#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:20.07#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.20:36:20.07#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:20.07#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:20.19#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:20.19#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:20.19#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:36:20.19#ibcon#first serial, iclass 18, count 0 2006.229.20:36:20.19#ibcon#enter sib2, iclass 18, count 0 2006.229.20:36:20.19#ibcon#flushed, iclass 18, count 0 2006.229.20:36:20.19#ibcon#about to write, iclass 18, count 0 2006.229.20:36:20.19#ibcon#wrote, iclass 18, count 0 2006.229.20:36:20.19#ibcon#about to read 3, iclass 18, count 0 2006.229.20:36:20.21#ibcon#read 3, iclass 18, count 0 2006.229.20:36:20.21#ibcon#about to read 4, iclass 18, count 0 2006.229.20:36:20.21#ibcon#read 4, iclass 18, count 0 2006.229.20:36:20.21#ibcon#about to read 5, iclass 18, count 0 2006.229.20:36:20.21#ibcon#read 5, iclass 18, count 0 2006.229.20:36:20.21#ibcon#about to read 6, iclass 18, count 0 2006.229.20:36:20.21#ibcon#read 6, iclass 18, count 0 2006.229.20:36:20.21#ibcon#end of sib2, iclass 18, count 0 2006.229.20:36:20.21#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:36:20.21#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:36:20.21#ibcon#[25=USB\r\n] 2006.229.20:36:20.21#ibcon#*before write, iclass 18, count 0 2006.229.20:36:20.21#ibcon#enter sib2, iclass 18, count 0 2006.229.20:36:20.21#ibcon#flushed, iclass 18, count 0 2006.229.20:36:20.21#ibcon#about to write, iclass 18, count 0 2006.229.20:36:20.21#ibcon#wrote, iclass 18, count 0 2006.229.20:36:20.21#ibcon#about to read 3, iclass 18, count 0 2006.229.20:36:20.24#ibcon#read 3, iclass 18, count 0 2006.229.20:36:20.24#ibcon#about to read 4, iclass 18, count 0 2006.229.20:36:20.24#ibcon#read 4, iclass 18, count 0 2006.229.20:36:20.24#ibcon#about to read 5, iclass 18, count 0 2006.229.20:36:20.24#ibcon#read 5, iclass 18, count 0 2006.229.20:36:20.24#ibcon#about to read 6, iclass 18, count 0 2006.229.20:36:20.24#ibcon#read 6, iclass 18, count 0 2006.229.20:36:20.24#ibcon#end of sib2, iclass 18, count 0 2006.229.20:36:20.24#ibcon#*after write, iclass 18, count 0 2006.229.20:36:20.24#ibcon#*before return 0, iclass 18, count 0 2006.229.20:36:20.24#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:20.24#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:20.24#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:36:20.24#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:36:20.24$vck44/valo=7,864.99 2006.229.20:36:20.24#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.20:36:20.24#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.20:36:20.24#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:20.24#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:20.24#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:20.24#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:20.24#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:36:20.24#ibcon#first serial, iclass 20, count 0 2006.229.20:36:20.24#ibcon#enter sib2, iclass 20, count 0 2006.229.20:36:20.24#ibcon#flushed, iclass 20, count 0 2006.229.20:36:20.24#ibcon#about to write, iclass 20, count 0 2006.229.20:36:20.24#ibcon#wrote, iclass 20, count 0 2006.229.20:36:20.24#ibcon#about to read 3, iclass 20, count 0 2006.229.20:36:20.26#ibcon#read 3, iclass 20, count 0 2006.229.20:36:20.26#ibcon#about to read 4, iclass 20, count 0 2006.229.20:36:20.26#ibcon#read 4, iclass 20, count 0 2006.229.20:36:20.26#ibcon#about to read 5, iclass 20, count 0 2006.229.20:36:20.26#ibcon#read 5, iclass 20, count 0 2006.229.20:36:20.26#ibcon#about to read 6, iclass 20, count 0 2006.229.20:36:20.26#ibcon#read 6, iclass 20, count 0 2006.229.20:36:20.26#ibcon#end of sib2, iclass 20, count 0 2006.229.20:36:20.26#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:36:20.26#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:36:20.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:36:20.26#ibcon#*before write, iclass 20, count 0 2006.229.20:36:20.26#ibcon#enter sib2, iclass 20, count 0 2006.229.20:36:20.26#ibcon#flushed, iclass 20, count 0 2006.229.20:36:20.26#ibcon#about to write, iclass 20, count 0 2006.229.20:36:20.26#ibcon#wrote, iclass 20, count 0 2006.229.20:36:20.26#ibcon#about to read 3, iclass 20, count 0 2006.229.20:36:20.30#ibcon#read 3, iclass 20, count 0 2006.229.20:36:20.30#ibcon#about to read 4, iclass 20, count 0 2006.229.20:36:20.30#ibcon#read 4, iclass 20, count 0 2006.229.20:36:20.30#ibcon#about to read 5, iclass 20, count 0 2006.229.20:36:20.30#ibcon#read 5, iclass 20, count 0 2006.229.20:36:20.30#ibcon#about to read 6, iclass 20, count 0 2006.229.20:36:20.30#ibcon#read 6, iclass 20, count 0 2006.229.20:36:20.30#ibcon#end of sib2, iclass 20, count 0 2006.229.20:36:20.30#ibcon#*after write, iclass 20, count 0 2006.229.20:36:20.30#ibcon#*before return 0, iclass 20, count 0 2006.229.20:36:20.30#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:20.30#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:20.30#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:36:20.30#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:36:20.30$vck44/va=7,5 2006.229.20:36:20.30#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.20:36:20.30#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.20:36:20.30#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:20.30#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:20.36#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:20.36#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:20.36#ibcon#enter wrdev, iclass 22, count 2 2006.229.20:36:20.36#ibcon#first serial, iclass 22, count 2 2006.229.20:36:20.36#ibcon#enter sib2, iclass 22, count 2 2006.229.20:36:20.36#ibcon#flushed, iclass 22, count 2 2006.229.20:36:20.36#ibcon#about to write, iclass 22, count 2 2006.229.20:36:20.36#ibcon#wrote, iclass 22, count 2 2006.229.20:36:20.36#ibcon#about to read 3, iclass 22, count 2 2006.229.20:36:20.38#ibcon#read 3, iclass 22, count 2 2006.229.20:36:20.38#ibcon#about to read 4, iclass 22, count 2 2006.229.20:36:20.38#ibcon#read 4, iclass 22, count 2 2006.229.20:36:20.38#ibcon#about to read 5, iclass 22, count 2 2006.229.20:36:20.38#ibcon#read 5, iclass 22, count 2 2006.229.20:36:20.38#ibcon#about to read 6, iclass 22, count 2 2006.229.20:36:20.38#ibcon#read 6, iclass 22, count 2 2006.229.20:36:20.38#ibcon#end of sib2, iclass 22, count 2 2006.229.20:36:20.38#ibcon#*mode == 0, iclass 22, count 2 2006.229.20:36:20.38#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.20:36:20.38#ibcon#[25=AT07-05\r\n] 2006.229.20:36:20.38#ibcon#*before write, iclass 22, count 2 2006.229.20:36:20.38#ibcon#enter sib2, iclass 22, count 2 2006.229.20:36:20.38#ibcon#flushed, iclass 22, count 2 2006.229.20:36:20.38#ibcon#about to write, iclass 22, count 2 2006.229.20:36:20.38#ibcon#wrote, iclass 22, count 2 2006.229.20:36:20.38#ibcon#about to read 3, iclass 22, count 2 2006.229.20:36:20.41#ibcon#read 3, iclass 22, count 2 2006.229.20:36:20.41#ibcon#about to read 4, iclass 22, count 2 2006.229.20:36:20.41#ibcon#read 4, iclass 22, count 2 2006.229.20:36:20.41#ibcon#about to read 5, iclass 22, count 2 2006.229.20:36:20.41#ibcon#read 5, iclass 22, count 2 2006.229.20:36:20.41#ibcon#about to read 6, iclass 22, count 2 2006.229.20:36:20.41#ibcon#read 6, iclass 22, count 2 2006.229.20:36:20.41#ibcon#end of sib2, iclass 22, count 2 2006.229.20:36:20.41#ibcon#*after write, iclass 22, count 2 2006.229.20:36:20.41#ibcon#*before return 0, iclass 22, count 2 2006.229.20:36:20.41#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:20.41#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:20.41#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.20:36:20.41#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:20.41#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:20.53#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:20.53#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:20.53#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:36:20.53#ibcon#first serial, iclass 22, count 0 2006.229.20:36:20.53#ibcon#enter sib2, iclass 22, count 0 2006.229.20:36:20.53#ibcon#flushed, iclass 22, count 0 2006.229.20:36:20.53#ibcon#about to write, iclass 22, count 0 2006.229.20:36:20.53#ibcon#wrote, iclass 22, count 0 2006.229.20:36:20.53#ibcon#about to read 3, iclass 22, count 0 2006.229.20:36:20.55#ibcon#read 3, iclass 22, count 0 2006.229.20:36:20.55#ibcon#about to read 4, iclass 22, count 0 2006.229.20:36:20.55#ibcon#read 4, iclass 22, count 0 2006.229.20:36:20.55#ibcon#about to read 5, iclass 22, count 0 2006.229.20:36:20.55#ibcon#read 5, iclass 22, count 0 2006.229.20:36:20.55#ibcon#about to read 6, iclass 22, count 0 2006.229.20:36:20.55#ibcon#read 6, iclass 22, count 0 2006.229.20:36:20.55#ibcon#end of sib2, iclass 22, count 0 2006.229.20:36:20.55#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:36:20.55#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:36:20.55#ibcon#[25=USB\r\n] 2006.229.20:36:20.55#ibcon#*before write, iclass 22, count 0 2006.229.20:36:20.55#ibcon#enter sib2, iclass 22, count 0 2006.229.20:36:20.55#ibcon#flushed, iclass 22, count 0 2006.229.20:36:20.55#ibcon#about to write, iclass 22, count 0 2006.229.20:36:20.55#ibcon#wrote, iclass 22, count 0 2006.229.20:36:20.55#ibcon#about to read 3, iclass 22, count 0 2006.229.20:36:20.58#ibcon#read 3, iclass 22, count 0 2006.229.20:36:20.58#ibcon#about to read 4, iclass 22, count 0 2006.229.20:36:20.58#ibcon#read 4, iclass 22, count 0 2006.229.20:36:20.58#ibcon#about to read 5, iclass 22, count 0 2006.229.20:36:20.58#ibcon#read 5, iclass 22, count 0 2006.229.20:36:20.58#ibcon#about to read 6, iclass 22, count 0 2006.229.20:36:20.58#ibcon#read 6, iclass 22, count 0 2006.229.20:36:20.58#ibcon#end of sib2, iclass 22, count 0 2006.229.20:36:20.58#ibcon#*after write, iclass 22, count 0 2006.229.20:36:20.58#ibcon#*before return 0, iclass 22, count 0 2006.229.20:36:20.58#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:20.58#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:20.58#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:36:20.58#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:36:20.58$vck44/valo=8,884.99 2006.229.20:36:20.58#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.20:36:20.58#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.20:36:20.58#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:20.58#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:20.58#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:20.58#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:20.58#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:36:20.58#ibcon#first serial, iclass 24, count 0 2006.229.20:36:20.58#ibcon#enter sib2, iclass 24, count 0 2006.229.20:36:20.58#ibcon#flushed, iclass 24, count 0 2006.229.20:36:20.58#ibcon#about to write, iclass 24, count 0 2006.229.20:36:20.58#ibcon#wrote, iclass 24, count 0 2006.229.20:36:20.58#ibcon#about to read 3, iclass 24, count 0 2006.229.20:36:20.60#ibcon#read 3, iclass 24, count 0 2006.229.20:36:20.60#ibcon#about to read 4, iclass 24, count 0 2006.229.20:36:20.60#ibcon#read 4, iclass 24, count 0 2006.229.20:36:20.60#ibcon#about to read 5, iclass 24, count 0 2006.229.20:36:20.60#ibcon#read 5, iclass 24, count 0 2006.229.20:36:20.60#ibcon#about to read 6, iclass 24, count 0 2006.229.20:36:20.60#ibcon#read 6, iclass 24, count 0 2006.229.20:36:20.60#ibcon#end of sib2, iclass 24, count 0 2006.229.20:36:20.60#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:36:20.60#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:36:20.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:36:20.60#ibcon#*before write, iclass 24, count 0 2006.229.20:36:20.60#ibcon#enter sib2, iclass 24, count 0 2006.229.20:36:20.60#ibcon#flushed, iclass 24, count 0 2006.229.20:36:20.60#ibcon#about to write, iclass 24, count 0 2006.229.20:36:20.60#ibcon#wrote, iclass 24, count 0 2006.229.20:36:20.60#ibcon#about to read 3, iclass 24, count 0 2006.229.20:36:20.64#ibcon#read 3, iclass 24, count 0 2006.229.20:36:20.64#ibcon#about to read 4, iclass 24, count 0 2006.229.20:36:20.64#ibcon#read 4, iclass 24, count 0 2006.229.20:36:20.64#ibcon#about to read 5, iclass 24, count 0 2006.229.20:36:20.64#ibcon#read 5, iclass 24, count 0 2006.229.20:36:20.64#ibcon#about to read 6, iclass 24, count 0 2006.229.20:36:20.64#ibcon#read 6, iclass 24, count 0 2006.229.20:36:20.64#ibcon#end of sib2, iclass 24, count 0 2006.229.20:36:20.64#ibcon#*after write, iclass 24, count 0 2006.229.20:36:20.64#ibcon#*before return 0, iclass 24, count 0 2006.229.20:36:20.64#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:20.64#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:20.64#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:36:20.64#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:36:20.64$vck44/va=8,6 2006.229.20:36:20.64#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.20:36:20.64#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.20:36:20.64#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:20.64#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:20.70#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:20.70#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:20.70#ibcon#enter wrdev, iclass 26, count 2 2006.229.20:36:20.70#ibcon#first serial, iclass 26, count 2 2006.229.20:36:20.70#ibcon#enter sib2, iclass 26, count 2 2006.229.20:36:20.70#ibcon#flushed, iclass 26, count 2 2006.229.20:36:20.70#ibcon#about to write, iclass 26, count 2 2006.229.20:36:20.70#ibcon#wrote, iclass 26, count 2 2006.229.20:36:20.70#ibcon#about to read 3, iclass 26, count 2 2006.229.20:36:20.72#ibcon#read 3, iclass 26, count 2 2006.229.20:36:20.72#ibcon#about to read 4, iclass 26, count 2 2006.229.20:36:20.72#ibcon#read 4, iclass 26, count 2 2006.229.20:36:20.72#ibcon#about to read 5, iclass 26, count 2 2006.229.20:36:20.72#ibcon#read 5, iclass 26, count 2 2006.229.20:36:20.72#ibcon#about to read 6, iclass 26, count 2 2006.229.20:36:20.72#ibcon#read 6, iclass 26, count 2 2006.229.20:36:20.72#ibcon#end of sib2, iclass 26, count 2 2006.229.20:36:20.72#ibcon#*mode == 0, iclass 26, count 2 2006.229.20:36:20.72#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.20:36:20.72#ibcon#[25=AT08-06\r\n] 2006.229.20:36:20.72#ibcon#*before write, iclass 26, count 2 2006.229.20:36:20.72#ibcon#enter sib2, iclass 26, count 2 2006.229.20:36:20.72#ibcon#flushed, iclass 26, count 2 2006.229.20:36:20.72#ibcon#about to write, iclass 26, count 2 2006.229.20:36:20.72#ibcon#wrote, iclass 26, count 2 2006.229.20:36:20.72#ibcon#about to read 3, iclass 26, count 2 2006.229.20:36:20.75#ibcon#read 3, iclass 26, count 2 2006.229.20:36:20.75#ibcon#about to read 4, iclass 26, count 2 2006.229.20:36:20.75#ibcon#read 4, iclass 26, count 2 2006.229.20:36:20.75#ibcon#about to read 5, iclass 26, count 2 2006.229.20:36:20.75#ibcon#read 5, iclass 26, count 2 2006.229.20:36:20.75#ibcon#about to read 6, iclass 26, count 2 2006.229.20:36:20.75#ibcon#read 6, iclass 26, count 2 2006.229.20:36:20.75#ibcon#end of sib2, iclass 26, count 2 2006.229.20:36:20.75#ibcon#*after write, iclass 26, count 2 2006.229.20:36:20.75#ibcon#*before return 0, iclass 26, count 2 2006.229.20:36:20.75#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:20.75#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:20.75#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.20:36:20.75#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:20.75#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:20.87#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:20.87#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:20.87#ibcon#enter wrdev, iclass 26, count 0 2006.229.20:36:20.87#ibcon#first serial, iclass 26, count 0 2006.229.20:36:20.87#ibcon#enter sib2, iclass 26, count 0 2006.229.20:36:20.87#ibcon#flushed, iclass 26, count 0 2006.229.20:36:20.87#ibcon#about to write, iclass 26, count 0 2006.229.20:36:20.87#ibcon#wrote, iclass 26, count 0 2006.229.20:36:20.87#ibcon#about to read 3, iclass 26, count 0 2006.229.20:36:20.89#ibcon#read 3, iclass 26, count 0 2006.229.20:36:20.89#ibcon#about to read 4, iclass 26, count 0 2006.229.20:36:20.89#ibcon#read 4, iclass 26, count 0 2006.229.20:36:20.89#ibcon#about to read 5, iclass 26, count 0 2006.229.20:36:20.89#ibcon#read 5, iclass 26, count 0 2006.229.20:36:20.89#ibcon#about to read 6, iclass 26, count 0 2006.229.20:36:20.89#ibcon#read 6, iclass 26, count 0 2006.229.20:36:20.89#ibcon#end of sib2, iclass 26, count 0 2006.229.20:36:20.89#ibcon#*mode == 0, iclass 26, count 0 2006.229.20:36:20.89#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.20:36:20.89#ibcon#[25=USB\r\n] 2006.229.20:36:20.89#ibcon#*before write, iclass 26, count 0 2006.229.20:36:20.89#ibcon#enter sib2, iclass 26, count 0 2006.229.20:36:20.89#ibcon#flushed, iclass 26, count 0 2006.229.20:36:20.89#ibcon#about to write, iclass 26, count 0 2006.229.20:36:20.89#ibcon#wrote, iclass 26, count 0 2006.229.20:36:20.89#ibcon#about to read 3, iclass 26, count 0 2006.229.20:36:20.90#abcon#<5=/07 1.7 3.3 25.951001001.8\r\n> 2006.229.20:36:20.92#abcon#{5=INTERFACE CLEAR} 2006.229.20:36:20.92#ibcon#read 3, iclass 26, count 0 2006.229.20:36:20.92#ibcon#about to read 4, iclass 26, count 0 2006.229.20:36:20.92#ibcon#read 4, iclass 26, count 0 2006.229.20:36:20.92#ibcon#about to read 5, iclass 26, count 0 2006.229.20:36:20.92#ibcon#read 5, iclass 26, count 0 2006.229.20:36:20.92#ibcon#about to read 6, iclass 26, count 0 2006.229.20:36:20.92#ibcon#read 6, iclass 26, count 0 2006.229.20:36:20.92#ibcon#end of sib2, iclass 26, count 0 2006.229.20:36:20.92#ibcon#*after write, iclass 26, count 0 2006.229.20:36:20.92#ibcon#*before return 0, iclass 26, count 0 2006.229.20:36:20.92#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:20.92#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:20.92#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.20:36:20.92#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.20:36:20.92$vck44/vblo=1,629.99 2006.229.20:36:20.92#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.20:36:20.92#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.20:36:20.92#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:20.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:36:20.92#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:36:20.92#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:36:20.92#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:36:20.92#ibcon#first serial, iclass 31, count 0 2006.229.20:36:20.92#ibcon#enter sib2, iclass 31, count 0 2006.229.20:36:20.92#ibcon#flushed, iclass 31, count 0 2006.229.20:36:20.92#ibcon#about to write, iclass 31, count 0 2006.229.20:36:20.92#ibcon#wrote, iclass 31, count 0 2006.229.20:36:20.92#ibcon#about to read 3, iclass 31, count 0 2006.229.20:36:20.94#ibcon#read 3, iclass 31, count 0 2006.229.20:36:20.94#ibcon#about to read 4, iclass 31, count 0 2006.229.20:36:20.94#ibcon#read 4, iclass 31, count 0 2006.229.20:36:20.94#ibcon#about to read 5, iclass 31, count 0 2006.229.20:36:20.94#ibcon#read 5, iclass 31, count 0 2006.229.20:36:20.94#ibcon#about to read 6, iclass 31, count 0 2006.229.20:36:20.94#ibcon#read 6, iclass 31, count 0 2006.229.20:36:20.94#ibcon#end of sib2, iclass 31, count 0 2006.229.20:36:20.94#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:36:20.94#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:36:20.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:36:20.94#ibcon#*before write, iclass 31, count 0 2006.229.20:36:20.94#ibcon#enter sib2, iclass 31, count 0 2006.229.20:36:20.94#ibcon#flushed, iclass 31, count 0 2006.229.20:36:20.94#ibcon#about to write, iclass 31, count 0 2006.229.20:36:20.94#ibcon#wrote, iclass 31, count 0 2006.229.20:36:20.94#ibcon#about to read 3, iclass 31, count 0 2006.229.20:36:20.98#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:36:20.98#ibcon#read 3, iclass 31, count 0 2006.229.20:36:20.98#ibcon#about to read 4, iclass 31, count 0 2006.229.20:36:20.98#ibcon#read 4, iclass 31, count 0 2006.229.20:36:20.98#ibcon#about to read 5, iclass 31, count 0 2006.229.20:36:20.98#ibcon#read 5, iclass 31, count 0 2006.229.20:36:20.98#ibcon#about to read 6, iclass 31, count 0 2006.229.20:36:20.98#ibcon#read 6, iclass 31, count 0 2006.229.20:36:20.98#ibcon#end of sib2, iclass 31, count 0 2006.229.20:36:20.98#ibcon#*after write, iclass 31, count 0 2006.229.20:36:20.98#ibcon#*before return 0, iclass 31, count 0 2006.229.20:36:20.98#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:36:20.98#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:36:20.98#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:36:20.98#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:36:20.98$vck44/vb=1,4 2006.229.20:36:20.98#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.20:36:20.98#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.20:36:20.98#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:20.98#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:20.98#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:20.98#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:20.98#ibcon#enter wrdev, iclass 34, count 2 2006.229.20:36:20.98#ibcon#first serial, iclass 34, count 2 2006.229.20:36:20.98#ibcon#enter sib2, iclass 34, count 2 2006.229.20:36:20.98#ibcon#flushed, iclass 34, count 2 2006.229.20:36:20.98#ibcon#about to write, iclass 34, count 2 2006.229.20:36:20.98#ibcon#wrote, iclass 34, count 2 2006.229.20:36:20.98#ibcon#about to read 3, iclass 34, count 2 2006.229.20:36:21.00#ibcon#read 3, iclass 34, count 2 2006.229.20:36:21.00#ibcon#about to read 4, iclass 34, count 2 2006.229.20:36:21.00#ibcon#read 4, iclass 34, count 2 2006.229.20:36:21.00#ibcon#about to read 5, iclass 34, count 2 2006.229.20:36:21.00#ibcon#read 5, iclass 34, count 2 2006.229.20:36:21.00#ibcon#about to read 6, iclass 34, count 2 2006.229.20:36:21.00#ibcon#read 6, iclass 34, count 2 2006.229.20:36:21.00#ibcon#end of sib2, iclass 34, count 2 2006.229.20:36:21.00#ibcon#*mode == 0, iclass 34, count 2 2006.229.20:36:21.00#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.20:36:21.00#ibcon#[27=AT01-04\r\n] 2006.229.20:36:21.00#ibcon#*before write, iclass 34, count 2 2006.229.20:36:21.00#ibcon#enter sib2, iclass 34, count 2 2006.229.20:36:21.00#ibcon#flushed, iclass 34, count 2 2006.229.20:36:21.00#ibcon#about to write, iclass 34, count 2 2006.229.20:36:21.00#ibcon#wrote, iclass 34, count 2 2006.229.20:36:21.00#ibcon#about to read 3, iclass 34, count 2 2006.229.20:36:21.03#ibcon#read 3, iclass 34, count 2 2006.229.20:36:21.03#ibcon#about to read 4, iclass 34, count 2 2006.229.20:36:21.03#ibcon#read 4, iclass 34, count 2 2006.229.20:36:21.03#ibcon#about to read 5, iclass 34, count 2 2006.229.20:36:21.03#ibcon#read 5, iclass 34, count 2 2006.229.20:36:21.03#ibcon#about to read 6, iclass 34, count 2 2006.229.20:36:21.03#ibcon#read 6, iclass 34, count 2 2006.229.20:36:21.03#ibcon#end of sib2, iclass 34, count 2 2006.229.20:36:21.03#ibcon#*after write, iclass 34, count 2 2006.229.20:36:21.03#ibcon#*before return 0, iclass 34, count 2 2006.229.20:36:21.03#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:21.03#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.20:36:21.03#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.20:36:21.03#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:21.03#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:21.15#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:21.15#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:21.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:36:21.15#ibcon#first serial, iclass 34, count 0 2006.229.20:36:21.15#ibcon#enter sib2, iclass 34, count 0 2006.229.20:36:21.15#ibcon#flushed, iclass 34, count 0 2006.229.20:36:21.15#ibcon#about to write, iclass 34, count 0 2006.229.20:36:21.15#ibcon#wrote, iclass 34, count 0 2006.229.20:36:21.15#ibcon#about to read 3, iclass 34, count 0 2006.229.20:36:21.17#ibcon#read 3, iclass 34, count 0 2006.229.20:36:21.17#ibcon#about to read 4, iclass 34, count 0 2006.229.20:36:21.17#ibcon#read 4, iclass 34, count 0 2006.229.20:36:21.17#ibcon#about to read 5, iclass 34, count 0 2006.229.20:36:21.17#ibcon#read 5, iclass 34, count 0 2006.229.20:36:21.17#ibcon#about to read 6, iclass 34, count 0 2006.229.20:36:21.17#ibcon#read 6, iclass 34, count 0 2006.229.20:36:21.17#ibcon#end of sib2, iclass 34, count 0 2006.229.20:36:21.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:36:21.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:36:21.17#ibcon#[27=USB\r\n] 2006.229.20:36:21.17#ibcon#*before write, iclass 34, count 0 2006.229.20:36:21.17#ibcon#enter sib2, iclass 34, count 0 2006.229.20:36:21.17#ibcon#flushed, iclass 34, count 0 2006.229.20:36:21.17#ibcon#about to write, iclass 34, count 0 2006.229.20:36:21.17#ibcon#wrote, iclass 34, count 0 2006.229.20:36:21.17#ibcon#about to read 3, iclass 34, count 0 2006.229.20:36:21.20#ibcon#read 3, iclass 34, count 0 2006.229.20:36:21.20#ibcon#about to read 4, iclass 34, count 0 2006.229.20:36:21.20#ibcon#read 4, iclass 34, count 0 2006.229.20:36:21.20#ibcon#about to read 5, iclass 34, count 0 2006.229.20:36:21.20#ibcon#read 5, iclass 34, count 0 2006.229.20:36:21.20#ibcon#about to read 6, iclass 34, count 0 2006.229.20:36:21.20#ibcon#read 6, iclass 34, count 0 2006.229.20:36:21.20#ibcon#end of sib2, iclass 34, count 0 2006.229.20:36:21.20#ibcon#*after write, iclass 34, count 0 2006.229.20:36:21.20#ibcon#*before return 0, iclass 34, count 0 2006.229.20:36:21.20#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:21.20#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.20:36:21.20#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:36:21.20#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:36:21.20$vck44/vblo=2,634.99 2006.229.20:36:21.20#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.20:36:21.20#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.20:36:21.20#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:21.20#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:21.20#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:21.20#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:21.20#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:36:21.20#ibcon#first serial, iclass 36, count 0 2006.229.20:36:21.20#ibcon#enter sib2, iclass 36, count 0 2006.229.20:36:21.20#ibcon#flushed, iclass 36, count 0 2006.229.20:36:21.20#ibcon#about to write, iclass 36, count 0 2006.229.20:36:21.20#ibcon#wrote, iclass 36, count 0 2006.229.20:36:21.20#ibcon#about to read 3, iclass 36, count 0 2006.229.20:36:21.22#ibcon#read 3, iclass 36, count 0 2006.229.20:36:21.22#ibcon#about to read 4, iclass 36, count 0 2006.229.20:36:21.22#ibcon#read 4, iclass 36, count 0 2006.229.20:36:21.22#ibcon#about to read 5, iclass 36, count 0 2006.229.20:36:21.22#ibcon#read 5, iclass 36, count 0 2006.229.20:36:21.22#ibcon#about to read 6, iclass 36, count 0 2006.229.20:36:21.22#ibcon#read 6, iclass 36, count 0 2006.229.20:36:21.22#ibcon#end of sib2, iclass 36, count 0 2006.229.20:36:21.22#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:36:21.22#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:36:21.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:36:21.22#ibcon#*before write, iclass 36, count 0 2006.229.20:36:21.22#ibcon#enter sib2, iclass 36, count 0 2006.229.20:36:21.22#ibcon#flushed, iclass 36, count 0 2006.229.20:36:21.22#ibcon#about to write, iclass 36, count 0 2006.229.20:36:21.22#ibcon#wrote, iclass 36, count 0 2006.229.20:36:21.22#ibcon#about to read 3, iclass 36, count 0 2006.229.20:36:21.26#ibcon#read 3, iclass 36, count 0 2006.229.20:36:21.26#ibcon#about to read 4, iclass 36, count 0 2006.229.20:36:21.26#ibcon#read 4, iclass 36, count 0 2006.229.20:36:21.26#ibcon#about to read 5, iclass 36, count 0 2006.229.20:36:21.26#ibcon#read 5, iclass 36, count 0 2006.229.20:36:21.26#ibcon#about to read 6, iclass 36, count 0 2006.229.20:36:21.26#ibcon#read 6, iclass 36, count 0 2006.229.20:36:21.26#ibcon#end of sib2, iclass 36, count 0 2006.229.20:36:21.26#ibcon#*after write, iclass 36, count 0 2006.229.20:36:21.26#ibcon#*before return 0, iclass 36, count 0 2006.229.20:36:21.26#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:21.26#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.20:36:21.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:36:21.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:36:21.26$vck44/vb=2,4 2006.229.20:36:21.26#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.20:36:21.26#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.20:36:21.26#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:21.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:21.32#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:21.32#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:21.32#ibcon#enter wrdev, iclass 38, count 2 2006.229.20:36:21.32#ibcon#first serial, iclass 38, count 2 2006.229.20:36:21.32#ibcon#enter sib2, iclass 38, count 2 2006.229.20:36:21.32#ibcon#flushed, iclass 38, count 2 2006.229.20:36:21.32#ibcon#about to write, iclass 38, count 2 2006.229.20:36:21.32#ibcon#wrote, iclass 38, count 2 2006.229.20:36:21.32#ibcon#about to read 3, iclass 38, count 2 2006.229.20:36:21.34#ibcon#read 3, iclass 38, count 2 2006.229.20:36:21.34#ibcon#about to read 4, iclass 38, count 2 2006.229.20:36:21.34#ibcon#read 4, iclass 38, count 2 2006.229.20:36:21.34#ibcon#about to read 5, iclass 38, count 2 2006.229.20:36:21.34#ibcon#read 5, iclass 38, count 2 2006.229.20:36:21.34#ibcon#about to read 6, iclass 38, count 2 2006.229.20:36:21.34#ibcon#read 6, iclass 38, count 2 2006.229.20:36:21.34#ibcon#end of sib2, iclass 38, count 2 2006.229.20:36:21.34#ibcon#*mode == 0, iclass 38, count 2 2006.229.20:36:21.34#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.20:36:21.34#ibcon#[27=AT02-04\r\n] 2006.229.20:36:21.34#ibcon#*before write, iclass 38, count 2 2006.229.20:36:21.34#ibcon#enter sib2, iclass 38, count 2 2006.229.20:36:21.34#ibcon#flushed, iclass 38, count 2 2006.229.20:36:21.34#ibcon#about to write, iclass 38, count 2 2006.229.20:36:21.34#ibcon#wrote, iclass 38, count 2 2006.229.20:36:21.34#ibcon#about to read 3, iclass 38, count 2 2006.229.20:36:21.37#ibcon#read 3, iclass 38, count 2 2006.229.20:36:21.37#ibcon#about to read 4, iclass 38, count 2 2006.229.20:36:21.37#ibcon#read 4, iclass 38, count 2 2006.229.20:36:21.37#ibcon#about to read 5, iclass 38, count 2 2006.229.20:36:21.37#ibcon#read 5, iclass 38, count 2 2006.229.20:36:21.37#ibcon#about to read 6, iclass 38, count 2 2006.229.20:36:21.37#ibcon#read 6, iclass 38, count 2 2006.229.20:36:21.37#ibcon#end of sib2, iclass 38, count 2 2006.229.20:36:21.37#ibcon#*after write, iclass 38, count 2 2006.229.20:36:21.37#ibcon#*before return 0, iclass 38, count 2 2006.229.20:36:21.37#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:21.37#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:36:21.37#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.20:36:21.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:21.37#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:21.49#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:21.49#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:21.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:36:21.49#ibcon#first serial, iclass 38, count 0 2006.229.20:36:21.49#ibcon#enter sib2, iclass 38, count 0 2006.229.20:36:21.49#ibcon#flushed, iclass 38, count 0 2006.229.20:36:21.49#ibcon#about to write, iclass 38, count 0 2006.229.20:36:21.49#ibcon#wrote, iclass 38, count 0 2006.229.20:36:21.49#ibcon#about to read 3, iclass 38, count 0 2006.229.20:36:21.51#ibcon#read 3, iclass 38, count 0 2006.229.20:36:21.51#ibcon#about to read 4, iclass 38, count 0 2006.229.20:36:21.51#ibcon#read 4, iclass 38, count 0 2006.229.20:36:21.51#ibcon#about to read 5, iclass 38, count 0 2006.229.20:36:21.51#ibcon#read 5, iclass 38, count 0 2006.229.20:36:21.51#ibcon#about to read 6, iclass 38, count 0 2006.229.20:36:21.51#ibcon#read 6, iclass 38, count 0 2006.229.20:36:21.51#ibcon#end of sib2, iclass 38, count 0 2006.229.20:36:21.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:36:21.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:36:21.51#ibcon#[27=USB\r\n] 2006.229.20:36:21.51#ibcon#*before write, iclass 38, count 0 2006.229.20:36:21.51#ibcon#enter sib2, iclass 38, count 0 2006.229.20:36:21.51#ibcon#flushed, iclass 38, count 0 2006.229.20:36:21.51#ibcon#about to write, iclass 38, count 0 2006.229.20:36:21.51#ibcon#wrote, iclass 38, count 0 2006.229.20:36:21.51#ibcon#about to read 3, iclass 38, count 0 2006.229.20:36:21.54#ibcon#read 3, iclass 38, count 0 2006.229.20:36:21.54#ibcon#about to read 4, iclass 38, count 0 2006.229.20:36:21.54#ibcon#read 4, iclass 38, count 0 2006.229.20:36:21.54#ibcon#about to read 5, iclass 38, count 0 2006.229.20:36:21.54#ibcon#read 5, iclass 38, count 0 2006.229.20:36:21.54#ibcon#about to read 6, iclass 38, count 0 2006.229.20:36:21.54#ibcon#read 6, iclass 38, count 0 2006.229.20:36:21.54#ibcon#end of sib2, iclass 38, count 0 2006.229.20:36:21.54#ibcon#*after write, iclass 38, count 0 2006.229.20:36:21.54#ibcon#*before return 0, iclass 38, count 0 2006.229.20:36:21.54#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:21.54#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:36:21.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:36:21.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:36:21.54$vck44/vblo=3,649.99 2006.229.20:36:21.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.20:36:21.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.20:36:21.54#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:21.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:21.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:21.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:21.54#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:36:21.54#ibcon#first serial, iclass 40, count 0 2006.229.20:36:21.54#ibcon#enter sib2, iclass 40, count 0 2006.229.20:36:21.54#ibcon#flushed, iclass 40, count 0 2006.229.20:36:21.54#ibcon#about to write, iclass 40, count 0 2006.229.20:36:21.54#ibcon#wrote, iclass 40, count 0 2006.229.20:36:21.54#ibcon#about to read 3, iclass 40, count 0 2006.229.20:36:21.56#ibcon#read 3, iclass 40, count 0 2006.229.20:36:21.56#ibcon#about to read 4, iclass 40, count 0 2006.229.20:36:21.56#ibcon#read 4, iclass 40, count 0 2006.229.20:36:21.56#ibcon#about to read 5, iclass 40, count 0 2006.229.20:36:21.56#ibcon#read 5, iclass 40, count 0 2006.229.20:36:21.56#ibcon#about to read 6, iclass 40, count 0 2006.229.20:36:21.56#ibcon#read 6, iclass 40, count 0 2006.229.20:36:21.56#ibcon#end of sib2, iclass 40, count 0 2006.229.20:36:21.56#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:36:21.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:36:21.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:36:21.56#ibcon#*before write, iclass 40, count 0 2006.229.20:36:21.56#ibcon#enter sib2, iclass 40, count 0 2006.229.20:36:21.56#ibcon#flushed, iclass 40, count 0 2006.229.20:36:21.56#ibcon#about to write, iclass 40, count 0 2006.229.20:36:21.56#ibcon#wrote, iclass 40, count 0 2006.229.20:36:21.56#ibcon#about to read 3, iclass 40, count 0 2006.229.20:36:21.60#ibcon#read 3, iclass 40, count 0 2006.229.20:36:21.60#ibcon#about to read 4, iclass 40, count 0 2006.229.20:36:21.60#ibcon#read 4, iclass 40, count 0 2006.229.20:36:21.60#ibcon#about to read 5, iclass 40, count 0 2006.229.20:36:21.60#ibcon#read 5, iclass 40, count 0 2006.229.20:36:21.60#ibcon#about to read 6, iclass 40, count 0 2006.229.20:36:21.60#ibcon#read 6, iclass 40, count 0 2006.229.20:36:21.60#ibcon#end of sib2, iclass 40, count 0 2006.229.20:36:21.60#ibcon#*after write, iclass 40, count 0 2006.229.20:36:21.60#ibcon#*before return 0, iclass 40, count 0 2006.229.20:36:21.60#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:21.60#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:36:21.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:36:21.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:36:21.60$vck44/vb=3,4 2006.229.20:36:21.60#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.20:36:21.60#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.20:36:21.60#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:21.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:21.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:21.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:21.66#ibcon#enter wrdev, iclass 4, count 2 2006.229.20:36:21.66#ibcon#first serial, iclass 4, count 2 2006.229.20:36:21.66#ibcon#enter sib2, iclass 4, count 2 2006.229.20:36:21.66#ibcon#flushed, iclass 4, count 2 2006.229.20:36:21.66#ibcon#about to write, iclass 4, count 2 2006.229.20:36:21.66#ibcon#wrote, iclass 4, count 2 2006.229.20:36:21.66#ibcon#about to read 3, iclass 4, count 2 2006.229.20:36:21.68#ibcon#read 3, iclass 4, count 2 2006.229.20:36:21.68#ibcon#about to read 4, iclass 4, count 2 2006.229.20:36:21.68#ibcon#read 4, iclass 4, count 2 2006.229.20:36:21.68#ibcon#about to read 5, iclass 4, count 2 2006.229.20:36:21.68#ibcon#read 5, iclass 4, count 2 2006.229.20:36:21.68#ibcon#about to read 6, iclass 4, count 2 2006.229.20:36:21.68#ibcon#read 6, iclass 4, count 2 2006.229.20:36:21.68#ibcon#end of sib2, iclass 4, count 2 2006.229.20:36:21.68#ibcon#*mode == 0, iclass 4, count 2 2006.229.20:36:21.68#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.20:36:21.68#ibcon#[27=AT03-04\r\n] 2006.229.20:36:21.68#ibcon#*before write, iclass 4, count 2 2006.229.20:36:21.68#ibcon#enter sib2, iclass 4, count 2 2006.229.20:36:21.68#ibcon#flushed, iclass 4, count 2 2006.229.20:36:21.68#ibcon#about to write, iclass 4, count 2 2006.229.20:36:21.68#ibcon#wrote, iclass 4, count 2 2006.229.20:36:21.68#ibcon#about to read 3, iclass 4, count 2 2006.229.20:36:21.71#ibcon#read 3, iclass 4, count 2 2006.229.20:36:21.71#ibcon#about to read 4, iclass 4, count 2 2006.229.20:36:21.71#ibcon#read 4, iclass 4, count 2 2006.229.20:36:21.71#ibcon#about to read 5, iclass 4, count 2 2006.229.20:36:21.71#ibcon#read 5, iclass 4, count 2 2006.229.20:36:21.71#ibcon#about to read 6, iclass 4, count 2 2006.229.20:36:21.71#ibcon#read 6, iclass 4, count 2 2006.229.20:36:21.71#ibcon#end of sib2, iclass 4, count 2 2006.229.20:36:21.71#ibcon#*after write, iclass 4, count 2 2006.229.20:36:21.71#ibcon#*before return 0, iclass 4, count 2 2006.229.20:36:21.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:21.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.20:36:21.71#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.20:36:21.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:21.71#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:21.83#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:21.83#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:21.83#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:36:21.83#ibcon#first serial, iclass 4, count 0 2006.229.20:36:21.83#ibcon#enter sib2, iclass 4, count 0 2006.229.20:36:21.83#ibcon#flushed, iclass 4, count 0 2006.229.20:36:21.83#ibcon#about to write, iclass 4, count 0 2006.229.20:36:21.83#ibcon#wrote, iclass 4, count 0 2006.229.20:36:21.83#ibcon#about to read 3, iclass 4, count 0 2006.229.20:36:21.85#ibcon#read 3, iclass 4, count 0 2006.229.20:36:21.85#ibcon#about to read 4, iclass 4, count 0 2006.229.20:36:21.85#ibcon#read 4, iclass 4, count 0 2006.229.20:36:21.85#ibcon#about to read 5, iclass 4, count 0 2006.229.20:36:21.85#ibcon#read 5, iclass 4, count 0 2006.229.20:36:21.85#ibcon#about to read 6, iclass 4, count 0 2006.229.20:36:21.85#ibcon#read 6, iclass 4, count 0 2006.229.20:36:21.85#ibcon#end of sib2, iclass 4, count 0 2006.229.20:36:21.85#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:36:21.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:36:21.85#ibcon#[27=USB\r\n] 2006.229.20:36:21.85#ibcon#*before write, iclass 4, count 0 2006.229.20:36:21.85#ibcon#enter sib2, iclass 4, count 0 2006.229.20:36:21.85#ibcon#flushed, iclass 4, count 0 2006.229.20:36:21.85#ibcon#about to write, iclass 4, count 0 2006.229.20:36:21.85#ibcon#wrote, iclass 4, count 0 2006.229.20:36:21.85#ibcon#about to read 3, iclass 4, count 0 2006.229.20:36:21.88#ibcon#read 3, iclass 4, count 0 2006.229.20:36:21.88#ibcon#about to read 4, iclass 4, count 0 2006.229.20:36:21.88#ibcon#read 4, iclass 4, count 0 2006.229.20:36:21.88#ibcon#about to read 5, iclass 4, count 0 2006.229.20:36:21.88#ibcon#read 5, iclass 4, count 0 2006.229.20:36:21.88#ibcon#about to read 6, iclass 4, count 0 2006.229.20:36:21.88#ibcon#read 6, iclass 4, count 0 2006.229.20:36:21.88#ibcon#end of sib2, iclass 4, count 0 2006.229.20:36:21.88#ibcon#*after write, iclass 4, count 0 2006.229.20:36:21.88#ibcon#*before return 0, iclass 4, count 0 2006.229.20:36:21.88#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:21.88#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.20:36:21.88#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:36:21.88#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:36:21.88$vck44/vblo=4,679.99 2006.229.20:36:21.88#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.20:36:21.88#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.20:36:21.88#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:21.88#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:21.88#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:21.88#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:21.88#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:36:21.88#ibcon#first serial, iclass 6, count 0 2006.229.20:36:21.88#ibcon#enter sib2, iclass 6, count 0 2006.229.20:36:21.88#ibcon#flushed, iclass 6, count 0 2006.229.20:36:21.88#ibcon#about to write, iclass 6, count 0 2006.229.20:36:21.88#ibcon#wrote, iclass 6, count 0 2006.229.20:36:21.88#ibcon#about to read 3, iclass 6, count 0 2006.229.20:36:21.90#ibcon#read 3, iclass 6, count 0 2006.229.20:36:21.90#ibcon#about to read 4, iclass 6, count 0 2006.229.20:36:21.90#ibcon#read 4, iclass 6, count 0 2006.229.20:36:21.90#ibcon#about to read 5, iclass 6, count 0 2006.229.20:36:21.90#ibcon#read 5, iclass 6, count 0 2006.229.20:36:21.90#ibcon#about to read 6, iclass 6, count 0 2006.229.20:36:21.90#ibcon#read 6, iclass 6, count 0 2006.229.20:36:21.90#ibcon#end of sib2, iclass 6, count 0 2006.229.20:36:21.90#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:36:21.90#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:36:21.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:36:21.90#ibcon#*before write, iclass 6, count 0 2006.229.20:36:21.90#ibcon#enter sib2, iclass 6, count 0 2006.229.20:36:21.90#ibcon#flushed, iclass 6, count 0 2006.229.20:36:21.90#ibcon#about to write, iclass 6, count 0 2006.229.20:36:21.90#ibcon#wrote, iclass 6, count 0 2006.229.20:36:21.90#ibcon#about to read 3, iclass 6, count 0 2006.229.20:36:21.94#ibcon#read 3, iclass 6, count 0 2006.229.20:36:21.94#ibcon#about to read 4, iclass 6, count 0 2006.229.20:36:21.94#ibcon#read 4, iclass 6, count 0 2006.229.20:36:21.94#ibcon#about to read 5, iclass 6, count 0 2006.229.20:36:21.94#ibcon#read 5, iclass 6, count 0 2006.229.20:36:21.94#ibcon#about to read 6, iclass 6, count 0 2006.229.20:36:21.94#ibcon#read 6, iclass 6, count 0 2006.229.20:36:21.94#ibcon#end of sib2, iclass 6, count 0 2006.229.20:36:21.94#ibcon#*after write, iclass 6, count 0 2006.229.20:36:21.94#ibcon#*before return 0, iclass 6, count 0 2006.229.20:36:21.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:21.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.20:36:21.94#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:36:21.94#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:36:21.94$vck44/vb=4,4 2006.229.20:36:21.94#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.20:36:21.94#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.20:36:21.94#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:21.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:22.00#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:22.00#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:22.00#ibcon#enter wrdev, iclass 10, count 2 2006.229.20:36:22.00#ibcon#first serial, iclass 10, count 2 2006.229.20:36:22.00#ibcon#enter sib2, iclass 10, count 2 2006.229.20:36:22.00#ibcon#flushed, iclass 10, count 2 2006.229.20:36:22.00#ibcon#about to write, iclass 10, count 2 2006.229.20:36:22.00#ibcon#wrote, iclass 10, count 2 2006.229.20:36:22.00#ibcon#about to read 3, iclass 10, count 2 2006.229.20:36:22.02#ibcon#read 3, iclass 10, count 2 2006.229.20:36:22.02#ibcon#about to read 4, iclass 10, count 2 2006.229.20:36:22.02#ibcon#read 4, iclass 10, count 2 2006.229.20:36:22.02#ibcon#about to read 5, iclass 10, count 2 2006.229.20:36:22.02#ibcon#read 5, iclass 10, count 2 2006.229.20:36:22.02#ibcon#about to read 6, iclass 10, count 2 2006.229.20:36:22.02#ibcon#read 6, iclass 10, count 2 2006.229.20:36:22.02#ibcon#end of sib2, iclass 10, count 2 2006.229.20:36:22.02#ibcon#*mode == 0, iclass 10, count 2 2006.229.20:36:22.02#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.20:36:22.02#ibcon#[27=AT04-04\r\n] 2006.229.20:36:22.02#ibcon#*before write, iclass 10, count 2 2006.229.20:36:22.02#ibcon#enter sib2, iclass 10, count 2 2006.229.20:36:22.02#ibcon#flushed, iclass 10, count 2 2006.229.20:36:22.02#ibcon#about to write, iclass 10, count 2 2006.229.20:36:22.02#ibcon#wrote, iclass 10, count 2 2006.229.20:36:22.02#ibcon#about to read 3, iclass 10, count 2 2006.229.20:36:22.05#ibcon#read 3, iclass 10, count 2 2006.229.20:36:22.05#ibcon#about to read 4, iclass 10, count 2 2006.229.20:36:22.05#ibcon#read 4, iclass 10, count 2 2006.229.20:36:22.05#ibcon#about to read 5, iclass 10, count 2 2006.229.20:36:22.05#ibcon#read 5, iclass 10, count 2 2006.229.20:36:22.05#ibcon#about to read 6, iclass 10, count 2 2006.229.20:36:22.05#ibcon#read 6, iclass 10, count 2 2006.229.20:36:22.05#ibcon#end of sib2, iclass 10, count 2 2006.229.20:36:22.05#ibcon#*after write, iclass 10, count 2 2006.229.20:36:22.05#ibcon#*before return 0, iclass 10, count 2 2006.229.20:36:22.05#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:22.05#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.20:36:22.05#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.20:36:22.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:22.05#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:22.17#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:22.17#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:22.17#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:36:22.17#ibcon#first serial, iclass 10, count 0 2006.229.20:36:22.17#ibcon#enter sib2, iclass 10, count 0 2006.229.20:36:22.17#ibcon#flushed, iclass 10, count 0 2006.229.20:36:22.17#ibcon#about to write, iclass 10, count 0 2006.229.20:36:22.17#ibcon#wrote, iclass 10, count 0 2006.229.20:36:22.17#ibcon#about to read 3, iclass 10, count 0 2006.229.20:36:22.19#ibcon#read 3, iclass 10, count 0 2006.229.20:36:22.19#ibcon#about to read 4, iclass 10, count 0 2006.229.20:36:22.19#ibcon#read 4, iclass 10, count 0 2006.229.20:36:22.19#ibcon#about to read 5, iclass 10, count 0 2006.229.20:36:22.19#ibcon#read 5, iclass 10, count 0 2006.229.20:36:22.19#ibcon#about to read 6, iclass 10, count 0 2006.229.20:36:22.19#ibcon#read 6, iclass 10, count 0 2006.229.20:36:22.19#ibcon#end of sib2, iclass 10, count 0 2006.229.20:36:22.19#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:36:22.19#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:36:22.19#ibcon#[27=USB\r\n] 2006.229.20:36:22.19#ibcon#*before write, iclass 10, count 0 2006.229.20:36:22.19#ibcon#enter sib2, iclass 10, count 0 2006.229.20:36:22.19#ibcon#flushed, iclass 10, count 0 2006.229.20:36:22.19#ibcon#about to write, iclass 10, count 0 2006.229.20:36:22.19#ibcon#wrote, iclass 10, count 0 2006.229.20:36:22.19#ibcon#about to read 3, iclass 10, count 0 2006.229.20:36:22.22#ibcon#read 3, iclass 10, count 0 2006.229.20:36:22.22#ibcon#about to read 4, iclass 10, count 0 2006.229.20:36:22.22#ibcon#read 4, iclass 10, count 0 2006.229.20:36:22.22#ibcon#about to read 5, iclass 10, count 0 2006.229.20:36:22.22#ibcon#read 5, iclass 10, count 0 2006.229.20:36:22.22#ibcon#about to read 6, iclass 10, count 0 2006.229.20:36:22.22#ibcon#read 6, iclass 10, count 0 2006.229.20:36:22.22#ibcon#end of sib2, iclass 10, count 0 2006.229.20:36:22.22#ibcon#*after write, iclass 10, count 0 2006.229.20:36:22.22#ibcon#*before return 0, iclass 10, count 0 2006.229.20:36:22.22#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:22.22#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.20:36:22.22#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:36:22.22#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:36:22.22$vck44/vblo=5,709.99 2006.229.20:36:22.22#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.20:36:22.22#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.20:36:22.22#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:22.22#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:22.22#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:22.22#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:22.22#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:36:22.22#ibcon#first serial, iclass 12, count 0 2006.229.20:36:22.22#ibcon#enter sib2, iclass 12, count 0 2006.229.20:36:22.22#ibcon#flushed, iclass 12, count 0 2006.229.20:36:22.22#ibcon#about to write, iclass 12, count 0 2006.229.20:36:22.22#ibcon#wrote, iclass 12, count 0 2006.229.20:36:22.22#ibcon#about to read 3, iclass 12, count 0 2006.229.20:36:22.24#ibcon#read 3, iclass 12, count 0 2006.229.20:36:22.24#ibcon#about to read 4, iclass 12, count 0 2006.229.20:36:22.24#ibcon#read 4, iclass 12, count 0 2006.229.20:36:22.24#ibcon#about to read 5, iclass 12, count 0 2006.229.20:36:22.24#ibcon#read 5, iclass 12, count 0 2006.229.20:36:22.24#ibcon#about to read 6, iclass 12, count 0 2006.229.20:36:22.24#ibcon#read 6, iclass 12, count 0 2006.229.20:36:22.24#ibcon#end of sib2, iclass 12, count 0 2006.229.20:36:22.24#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:36:22.24#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:36:22.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:36:22.24#ibcon#*before write, iclass 12, count 0 2006.229.20:36:22.24#ibcon#enter sib2, iclass 12, count 0 2006.229.20:36:22.24#ibcon#flushed, iclass 12, count 0 2006.229.20:36:22.24#ibcon#about to write, iclass 12, count 0 2006.229.20:36:22.24#ibcon#wrote, iclass 12, count 0 2006.229.20:36:22.24#ibcon#about to read 3, iclass 12, count 0 2006.229.20:36:22.28#ibcon#read 3, iclass 12, count 0 2006.229.20:36:22.28#ibcon#about to read 4, iclass 12, count 0 2006.229.20:36:22.28#ibcon#read 4, iclass 12, count 0 2006.229.20:36:22.28#ibcon#about to read 5, iclass 12, count 0 2006.229.20:36:22.28#ibcon#read 5, iclass 12, count 0 2006.229.20:36:22.28#ibcon#about to read 6, iclass 12, count 0 2006.229.20:36:22.28#ibcon#read 6, iclass 12, count 0 2006.229.20:36:22.28#ibcon#end of sib2, iclass 12, count 0 2006.229.20:36:22.28#ibcon#*after write, iclass 12, count 0 2006.229.20:36:22.28#ibcon#*before return 0, iclass 12, count 0 2006.229.20:36:22.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:22.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.20:36:22.28#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:36:22.28#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:36:22.28$vck44/vb=5,4 2006.229.20:36:22.28#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.20:36:22.28#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.20:36:22.28#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:22.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:22.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:22.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:22.34#ibcon#enter wrdev, iclass 14, count 2 2006.229.20:36:22.34#ibcon#first serial, iclass 14, count 2 2006.229.20:36:22.34#ibcon#enter sib2, iclass 14, count 2 2006.229.20:36:22.34#ibcon#flushed, iclass 14, count 2 2006.229.20:36:22.34#ibcon#about to write, iclass 14, count 2 2006.229.20:36:22.34#ibcon#wrote, iclass 14, count 2 2006.229.20:36:22.34#ibcon#about to read 3, iclass 14, count 2 2006.229.20:36:22.36#ibcon#read 3, iclass 14, count 2 2006.229.20:36:22.36#ibcon#about to read 4, iclass 14, count 2 2006.229.20:36:22.36#ibcon#read 4, iclass 14, count 2 2006.229.20:36:22.36#ibcon#about to read 5, iclass 14, count 2 2006.229.20:36:22.36#ibcon#read 5, iclass 14, count 2 2006.229.20:36:22.36#ibcon#about to read 6, iclass 14, count 2 2006.229.20:36:22.36#ibcon#read 6, iclass 14, count 2 2006.229.20:36:22.36#ibcon#end of sib2, iclass 14, count 2 2006.229.20:36:22.36#ibcon#*mode == 0, iclass 14, count 2 2006.229.20:36:22.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.20:36:22.36#ibcon#[27=AT05-04\r\n] 2006.229.20:36:22.36#ibcon#*before write, iclass 14, count 2 2006.229.20:36:22.36#ibcon#enter sib2, iclass 14, count 2 2006.229.20:36:22.36#ibcon#flushed, iclass 14, count 2 2006.229.20:36:22.36#ibcon#about to write, iclass 14, count 2 2006.229.20:36:22.36#ibcon#wrote, iclass 14, count 2 2006.229.20:36:22.36#ibcon#about to read 3, iclass 14, count 2 2006.229.20:36:22.39#ibcon#read 3, iclass 14, count 2 2006.229.20:36:22.39#ibcon#about to read 4, iclass 14, count 2 2006.229.20:36:22.39#ibcon#read 4, iclass 14, count 2 2006.229.20:36:22.39#ibcon#about to read 5, iclass 14, count 2 2006.229.20:36:22.39#ibcon#read 5, iclass 14, count 2 2006.229.20:36:22.39#ibcon#about to read 6, iclass 14, count 2 2006.229.20:36:22.39#ibcon#read 6, iclass 14, count 2 2006.229.20:36:22.39#ibcon#end of sib2, iclass 14, count 2 2006.229.20:36:22.39#ibcon#*after write, iclass 14, count 2 2006.229.20:36:22.39#ibcon#*before return 0, iclass 14, count 2 2006.229.20:36:22.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:22.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.20:36:22.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.20:36:22.39#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:22.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:22.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:22.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:22.51#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:36:22.51#ibcon#first serial, iclass 14, count 0 2006.229.20:36:22.51#ibcon#enter sib2, iclass 14, count 0 2006.229.20:36:22.51#ibcon#flushed, iclass 14, count 0 2006.229.20:36:22.51#ibcon#about to write, iclass 14, count 0 2006.229.20:36:22.51#ibcon#wrote, iclass 14, count 0 2006.229.20:36:22.51#ibcon#about to read 3, iclass 14, count 0 2006.229.20:36:22.53#ibcon#read 3, iclass 14, count 0 2006.229.20:36:22.53#ibcon#about to read 4, iclass 14, count 0 2006.229.20:36:22.53#ibcon#read 4, iclass 14, count 0 2006.229.20:36:22.53#ibcon#about to read 5, iclass 14, count 0 2006.229.20:36:22.53#ibcon#read 5, iclass 14, count 0 2006.229.20:36:22.53#ibcon#about to read 6, iclass 14, count 0 2006.229.20:36:22.53#ibcon#read 6, iclass 14, count 0 2006.229.20:36:22.53#ibcon#end of sib2, iclass 14, count 0 2006.229.20:36:22.53#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:36:22.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:36:22.53#ibcon#[27=USB\r\n] 2006.229.20:36:22.53#ibcon#*before write, iclass 14, count 0 2006.229.20:36:22.53#ibcon#enter sib2, iclass 14, count 0 2006.229.20:36:22.53#ibcon#flushed, iclass 14, count 0 2006.229.20:36:22.53#ibcon#about to write, iclass 14, count 0 2006.229.20:36:22.53#ibcon#wrote, iclass 14, count 0 2006.229.20:36:22.53#ibcon#about to read 3, iclass 14, count 0 2006.229.20:36:22.56#ibcon#read 3, iclass 14, count 0 2006.229.20:36:22.56#ibcon#about to read 4, iclass 14, count 0 2006.229.20:36:22.56#ibcon#read 4, iclass 14, count 0 2006.229.20:36:22.56#ibcon#about to read 5, iclass 14, count 0 2006.229.20:36:22.56#ibcon#read 5, iclass 14, count 0 2006.229.20:36:22.56#ibcon#about to read 6, iclass 14, count 0 2006.229.20:36:22.56#ibcon#read 6, iclass 14, count 0 2006.229.20:36:22.56#ibcon#end of sib2, iclass 14, count 0 2006.229.20:36:22.56#ibcon#*after write, iclass 14, count 0 2006.229.20:36:22.56#ibcon#*before return 0, iclass 14, count 0 2006.229.20:36:22.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:22.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.20:36:22.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:36:22.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:36:22.56$vck44/vblo=6,719.99 2006.229.20:36:22.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.20:36:22.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.20:36:22.56#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:22.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:22.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:22.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:22.56#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:36:22.56#ibcon#first serial, iclass 16, count 0 2006.229.20:36:22.56#ibcon#enter sib2, iclass 16, count 0 2006.229.20:36:22.56#ibcon#flushed, iclass 16, count 0 2006.229.20:36:22.56#ibcon#about to write, iclass 16, count 0 2006.229.20:36:22.56#ibcon#wrote, iclass 16, count 0 2006.229.20:36:22.56#ibcon#about to read 3, iclass 16, count 0 2006.229.20:36:22.58#ibcon#read 3, iclass 16, count 0 2006.229.20:36:22.58#ibcon#about to read 4, iclass 16, count 0 2006.229.20:36:22.58#ibcon#read 4, iclass 16, count 0 2006.229.20:36:22.58#ibcon#about to read 5, iclass 16, count 0 2006.229.20:36:22.58#ibcon#read 5, iclass 16, count 0 2006.229.20:36:22.58#ibcon#about to read 6, iclass 16, count 0 2006.229.20:36:22.58#ibcon#read 6, iclass 16, count 0 2006.229.20:36:22.58#ibcon#end of sib2, iclass 16, count 0 2006.229.20:36:22.58#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:36:22.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:36:22.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:36:22.58#ibcon#*before write, iclass 16, count 0 2006.229.20:36:22.58#ibcon#enter sib2, iclass 16, count 0 2006.229.20:36:22.58#ibcon#flushed, iclass 16, count 0 2006.229.20:36:22.58#ibcon#about to write, iclass 16, count 0 2006.229.20:36:22.58#ibcon#wrote, iclass 16, count 0 2006.229.20:36:22.58#ibcon#about to read 3, iclass 16, count 0 2006.229.20:36:22.62#ibcon#read 3, iclass 16, count 0 2006.229.20:36:22.62#ibcon#about to read 4, iclass 16, count 0 2006.229.20:36:22.62#ibcon#read 4, iclass 16, count 0 2006.229.20:36:22.62#ibcon#about to read 5, iclass 16, count 0 2006.229.20:36:22.62#ibcon#read 5, iclass 16, count 0 2006.229.20:36:22.62#ibcon#about to read 6, iclass 16, count 0 2006.229.20:36:22.62#ibcon#read 6, iclass 16, count 0 2006.229.20:36:22.62#ibcon#end of sib2, iclass 16, count 0 2006.229.20:36:22.62#ibcon#*after write, iclass 16, count 0 2006.229.20:36:22.62#ibcon#*before return 0, iclass 16, count 0 2006.229.20:36:22.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:22.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.20:36:22.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:36:22.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:36:22.62$vck44/vb=6,4 2006.229.20:36:22.62#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.20:36:22.62#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.20:36:22.62#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:22.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:22.68#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:22.68#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:22.68#ibcon#enter wrdev, iclass 18, count 2 2006.229.20:36:22.68#ibcon#first serial, iclass 18, count 2 2006.229.20:36:22.68#ibcon#enter sib2, iclass 18, count 2 2006.229.20:36:22.68#ibcon#flushed, iclass 18, count 2 2006.229.20:36:22.68#ibcon#about to write, iclass 18, count 2 2006.229.20:36:22.68#ibcon#wrote, iclass 18, count 2 2006.229.20:36:22.68#ibcon#about to read 3, iclass 18, count 2 2006.229.20:36:22.70#ibcon#read 3, iclass 18, count 2 2006.229.20:36:22.70#ibcon#about to read 4, iclass 18, count 2 2006.229.20:36:22.70#ibcon#read 4, iclass 18, count 2 2006.229.20:36:22.70#ibcon#about to read 5, iclass 18, count 2 2006.229.20:36:22.70#ibcon#read 5, iclass 18, count 2 2006.229.20:36:22.70#ibcon#about to read 6, iclass 18, count 2 2006.229.20:36:22.70#ibcon#read 6, iclass 18, count 2 2006.229.20:36:22.70#ibcon#end of sib2, iclass 18, count 2 2006.229.20:36:22.70#ibcon#*mode == 0, iclass 18, count 2 2006.229.20:36:22.70#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.20:36:22.70#ibcon#[27=AT06-04\r\n] 2006.229.20:36:22.70#ibcon#*before write, iclass 18, count 2 2006.229.20:36:22.70#ibcon#enter sib2, iclass 18, count 2 2006.229.20:36:22.70#ibcon#flushed, iclass 18, count 2 2006.229.20:36:22.70#ibcon#about to write, iclass 18, count 2 2006.229.20:36:22.70#ibcon#wrote, iclass 18, count 2 2006.229.20:36:22.70#ibcon#about to read 3, iclass 18, count 2 2006.229.20:36:22.73#ibcon#read 3, iclass 18, count 2 2006.229.20:36:22.73#ibcon#about to read 4, iclass 18, count 2 2006.229.20:36:22.73#ibcon#read 4, iclass 18, count 2 2006.229.20:36:22.73#ibcon#about to read 5, iclass 18, count 2 2006.229.20:36:22.73#ibcon#read 5, iclass 18, count 2 2006.229.20:36:22.73#ibcon#about to read 6, iclass 18, count 2 2006.229.20:36:22.73#ibcon#read 6, iclass 18, count 2 2006.229.20:36:22.73#ibcon#end of sib2, iclass 18, count 2 2006.229.20:36:22.73#ibcon#*after write, iclass 18, count 2 2006.229.20:36:22.73#ibcon#*before return 0, iclass 18, count 2 2006.229.20:36:22.73#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:22.73#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.20:36:22.73#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.20:36:22.73#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:22.73#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:22.85#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:22.85#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:22.85#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:36:22.85#ibcon#first serial, iclass 18, count 0 2006.229.20:36:22.85#ibcon#enter sib2, iclass 18, count 0 2006.229.20:36:22.85#ibcon#flushed, iclass 18, count 0 2006.229.20:36:22.85#ibcon#about to write, iclass 18, count 0 2006.229.20:36:22.85#ibcon#wrote, iclass 18, count 0 2006.229.20:36:22.85#ibcon#about to read 3, iclass 18, count 0 2006.229.20:36:22.87#ibcon#read 3, iclass 18, count 0 2006.229.20:36:22.87#ibcon#about to read 4, iclass 18, count 0 2006.229.20:36:22.87#ibcon#read 4, iclass 18, count 0 2006.229.20:36:22.87#ibcon#about to read 5, iclass 18, count 0 2006.229.20:36:22.87#ibcon#read 5, iclass 18, count 0 2006.229.20:36:22.87#ibcon#about to read 6, iclass 18, count 0 2006.229.20:36:22.87#ibcon#read 6, iclass 18, count 0 2006.229.20:36:22.87#ibcon#end of sib2, iclass 18, count 0 2006.229.20:36:22.87#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:36:22.87#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:36:22.87#ibcon#[27=USB\r\n] 2006.229.20:36:22.87#ibcon#*before write, iclass 18, count 0 2006.229.20:36:22.87#ibcon#enter sib2, iclass 18, count 0 2006.229.20:36:22.87#ibcon#flushed, iclass 18, count 0 2006.229.20:36:22.87#ibcon#about to write, iclass 18, count 0 2006.229.20:36:22.87#ibcon#wrote, iclass 18, count 0 2006.229.20:36:22.87#ibcon#about to read 3, iclass 18, count 0 2006.229.20:36:22.90#ibcon#read 3, iclass 18, count 0 2006.229.20:36:22.90#ibcon#about to read 4, iclass 18, count 0 2006.229.20:36:22.90#ibcon#read 4, iclass 18, count 0 2006.229.20:36:22.90#ibcon#about to read 5, iclass 18, count 0 2006.229.20:36:22.90#ibcon#read 5, iclass 18, count 0 2006.229.20:36:22.90#ibcon#about to read 6, iclass 18, count 0 2006.229.20:36:22.90#ibcon#read 6, iclass 18, count 0 2006.229.20:36:22.90#ibcon#end of sib2, iclass 18, count 0 2006.229.20:36:22.90#ibcon#*after write, iclass 18, count 0 2006.229.20:36:22.90#ibcon#*before return 0, iclass 18, count 0 2006.229.20:36:22.90#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:22.90#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.20:36:22.90#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:36:22.90#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:36:22.90$vck44/vblo=7,734.99 2006.229.20:36:22.90#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.20:36:22.90#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.20:36:22.90#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:22.90#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:22.90#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:22.90#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:22.90#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:36:22.90#ibcon#first serial, iclass 20, count 0 2006.229.20:36:22.90#ibcon#enter sib2, iclass 20, count 0 2006.229.20:36:22.90#ibcon#flushed, iclass 20, count 0 2006.229.20:36:22.90#ibcon#about to write, iclass 20, count 0 2006.229.20:36:22.90#ibcon#wrote, iclass 20, count 0 2006.229.20:36:22.90#ibcon#about to read 3, iclass 20, count 0 2006.229.20:36:22.92#ibcon#read 3, iclass 20, count 0 2006.229.20:36:22.92#ibcon#about to read 4, iclass 20, count 0 2006.229.20:36:22.92#ibcon#read 4, iclass 20, count 0 2006.229.20:36:22.92#ibcon#about to read 5, iclass 20, count 0 2006.229.20:36:22.92#ibcon#read 5, iclass 20, count 0 2006.229.20:36:22.92#ibcon#about to read 6, iclass 20, count 0 2006.229.20:36:22.92#ibcon#read 6, iclass 20, count 0 2006.229.20:36:22.92#ibcon#end of sib2, iclass 20, count 0 2006.229.20:36:22.92#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:36:22.92#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:36:22.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:36:22.92#ibcon#*before write, iclass 20, count 0 2006.229.20:36:22.92#ibcon#enter sib2, iclass 20, count 0 2006.229.20:36:22.92#ibcon#flushed, iclass 20, count 0 2006.229.20:36:22.92#ibcon#about to write, iclass 20, count 0 2006.229.20:36:22.92#ibcon#wrote, iclass 20, count 0 2006.229.20:36:22.92#ibcon#about to read 3, iclass 20, count 0 2006.229.20:36:22.96#ibcon#read 3, iclass 20, count 0 2006.229.20:36:22.96#ibcon#about to read 4, iclass 20, count 0 2006.229.20:36:22.96#ibcon#read 4, iclass 20, count 0 2006.229.20:36:22.96#ibcon#about to read 5, iclass 20, count 0 2006.229.20:36:22.96#ibcon#read 5, iclass 20, count 0 2006.229.20:36:22.96#ibcon#about to read 6, iclass 20, count 0 2006.229.20:36:22.96#ibcon#read 6, iclass 20, count 0 2006.229.20:36:22.96#ibcon#end of sib2, iclass 20, count 0 2006.229.20:36:22.96#ibcon#*after write, iclass 20, count 0 2006.229.20:36:22.96#ibcon#*before return 0, iclass 20, count 0 2006.229.20:36:22.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:22.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.20:36:22.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:36:22.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:36:22.96$vck44/vb=7,4 2006.229.20:36:22.96#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.20:36:22.96#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.20:36:22.96#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:22.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:23.02#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:23.02#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:23.02#ibcon#enter wrdev, iclass 22, count 2 2006.229.20:36:23.02#ibcon#first serial, iclass 22, count 2 2006.229.20:36:23.02#ibcon#enter sib2, iclass 22, count 2 2006.229.20:36:23.02#ibcon#flushed, iclass 22, count 2 2006.229.20:36:23.02#ibcon#about to write, iclass 22, count 2 2006.229.20:36:23.02#ibcon#wrote, iclass 22, count 2 2006.229.20:36:23.02#ibcon#about to read 3, iclass 22, count 2 2006.229.20:36:23.04#ibcon#read 3, iclass 22, count 2 2006.229.20:36:23.04#ibcon#about to read 4, iclass 22, count 2 2006.229.20:36:23.04#ibcon#read 4, iclass 22, count 2 2006.229.20:36:23.04#ibcon#about to read 5, iclass 22, count 2 2006.229.20:36:23.04#ibcon#read 5, iclass 22, count 2 2006.229.20:36:23.04#ibcon#about to read 6, iclass 22, count 2 2006.229.20:36:23.04#ibcon#read 6, iclass 22, count 2 2006.229.20:36:23.04#ibcon#end of sib2, iclass 22, count 2 2006.229.20:36:23.04#ibcon#*mode == 0, iclass 22, count 2 2006.229.20:36:23.04#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.20:36:23.04#ibcon#[27=AT07-04\r\n] 2006.229.20:36:23.04#ibcon#*before write, iclass 22, count 2 2006.229.20:36:23.04#ibcon#enter sib2, iclass 22, count 2 2006.229.20:36:23.04#ibcon#flushed, iclass 22, count 2 2006.229.20:36:23.04#ibcon#about to write, iclass 22, count 2 2006.229.20:36:23.04#ibcon#wrote, iclass 22, count 2 2006.229.20:36:23.04#ibcon#about to read 3, iclass 22, count 2 2006.229.20:36:23.07#ibcon#read 3, iclass 22, count 2 2006.229.20:36:23.07#ibcon#about to read 4, iclass 22, count 2 2006.229.20:36:23.07#ibcon#read 4, iclass 22, count 2 2006.229.20:36:23.07#ibcon#about to read 5, iclass 22, count 2 2006.229.20:36:23.07#ibcon#read 5, iclass 22, count 2 2006.229.20:36:23.07#ibcon#about to read 6, iclass 22, count 2 2006.229.20:36:23.07#ibcon#read 6, iclass 22, count 2 2006.229.20:36:23.07#ibcon#end of sib2, iclass 22, count 2 2006.229.20:36:23.07#ibcon#*after write, iclass 22, count 2 2006.229.20:36:23.07#ibcon#*before return 0, iclass 22, count 2 2006.229.20:36:23.07#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:23.07#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.20:36:23.07#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.20:36:23.07#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:23.07#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:23.19#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:23.19#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:23.19#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:36:23.19#ibcon#first serial, iclass 22, count 0 2006.229.20:36:23.19#ibcon#enter sib2, iclass 22, count 0 2006.229.20:36:23.19#ibcon#flushed, iclass 22, count 0 2006.229.20:36:23.19#ibcon#about to write, iclass 22, count 0 2006.229.20:36:23.19#ibcon#wrote, iclass 22, count 0 2006.229.20:36:23.19#ibcon#about to read 3, iclass 22, count 0 2006.229.20:36:23.21#ibcon#read 3, iclass 22, count 0 2006.229.20:36:23.21#ibcon#about to read 4, iclass 22, count 0 2006.229.20:36:23.21#ibcon#read 4, iclass 22, count 0 2006.229.20:36:23.21#ibcon#about to read 5, iclass 22, count 0 2006.229.20:36:23.21#ibcon#read 5, iclass 22, count 0 2006.229.20:36:23.21#ibcon#about to read 6, iclass 22, count 0 2006.229.20:36:23.21#ibcon#read 6, iclass 22, count 0 2006.229.20:36:23.21#ibcon#end of sib2, iclass 22, count 0 2006.229.20:36:23.21#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:36:23.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:36:23.21#ibcon#[27=USB\r\n] 2006.229.20:36:23.21#ibcon#*before write, iclass 22, count 0 2006.229.20:36:23.21#ibcon#enter sib2, iclass 22, count 0 2006.229.20:36:23.21#ibcon#flushed, iclass 22, count 0 2006.229.20:36:23.21#ibcon#about to write, iclass 22, count 0 2006.229.20:36:23.21#ibcon#wrote, iclass 22, count 0 2006.229.20:36:23.21#ibcon#about to read 3, iclass 22, count 0 2006.229.20:36:23.24#ibcon#read 3, iclass 22, count 0 2006.229.20:36:23.24#ibcon#about to read 4, iclass 22, count 0 2006.229.20:36:23.24#ibcon#read 4, iclass 22, count 0 2006.229.20:36:23.24#ibcon#about to read 5, iclass 22, count 0 2006.229.20:36:23.24#ibcon#read 5, iclass 22, count 0 2006.229.20:36:23.24#ibcon#about to read 6, iclass 22, count 0 2006.229.20:36:23.24#ibcon#read 6, iclass 22, count 0 2006.229.20:36:23.24#ibcon#end of sib2, iclass 22, count 0 2006.229.20:36:23.24#ibcon#*after write, iclass 22, count 0 2006.229.20:36:23.24#ibcon#*before return 0, iclass 22, count 0 2006.229.20:36:23.24#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:23.24#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.20:36:23.24#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:36:23.24#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:36:23.24$vck44/vblo=8,744.99 2006.229.20:36:23.24#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.20:36:23.24#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.20:36:23.24#ibcon#ireg 17 cls_cnt 0 2006.229.20:36:23.24#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:23.24#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:23.24#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:23.24#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:36:23.24#ibcon#first serial, iclass 24, count 0 2006.229.20:36:23.24#ibcon#enter sib2, iclass 24, count 0 2006.229.20:36:23.24#ibcon#flushed, iclass 24, count 0 2006.229.20:36:23.24#ibcon#about to write, iclass 24, count 0 2006.229.20:36:23.24#ibcon#wrote, iclass 24, count 0 2006.229.20:36:23.24#ibcon#about to read 3, iclass 24, count 0 2006.229.20:36:23.26#ibcon#read 3, iclass 24, count 0 2006.229.20:36:23.26#ibcon#about to read 4, iclass 24, count 0 2006.229.20:36:23.26#ibcon#read 4, iclass 24, count 0 2006.229.20:36:23.26#ibcon#about to read 5, iclass 24, count 0 2006.229.20:36:23.26#ibcon#read 5, iclass 24, count 0 2006.229.20:36:23.26#ibcon#about to read 6, iclass 24, count 0 2006.229.20:36:23.26#ibcon#read 6, iclass 24, count 0 2006.229.20:36:23.26#ibcon#end of sib2, iclass 24, count 0 2006.229.20:36:23.26#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:36:23.26#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:36:23.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:36:23.26#ibcon#*before write, iclass 24, count 0 2006.229.20:36:23.26#ibcon#enter sib2, iclass 24, count 0 2006.229.20:36:23.26#ibcon#flushed, iclass 24, count 0 2006.229.20:36:23.26#ibcon#about to write, iclass 24, count 0 2006.229.20:36:23.26#ibcon#wrote, iclass 24, count 0 2006.229.20:36:23.26#ibcon#about to read 3, iclass 24, count 0 2006.229.20:36:23.30#ibcon#read 3, iclass 24, count 0 2006.229.20:36:23.30#ibcon#about to read 4, iclass 24, count 0 2006.229.20:36:23.30#ibcon#read 4, iclass 24, count 0 2006.229.20:36:23.30#ibcon#about to read 5, iclass 24, count 0 2006.229.20:36:23.30#ibcon#read 5, iclass 24, count 0 2006.229.20:36:23.30#ibcon#about to read 6, iclass 24, count 0 2006.229.20:36:23.30#ibcon#read 6, iclass 24, count 0 2006.229.20:36:23.30#ibcon#end of sib2, iclass 24, count 0 2006.229.20:36:23.30#ibcon#*after write, iclass 24, count 0 2006.229.20:36:23.30#ibcon#*before return 0, iclass 24, count 0 2006.229.20:36:23.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:23.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.20:36:23.30#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:36:23.30#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:36:23.30$vck44/vb=8,4 2006.229.20:36:23.30#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.20:36:23.30#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.20:36:23.30#ibcon#ireg 11 cls_cnt 2 2006.229.20:36:23.30#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:23.36#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:23.36#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:23.36#ibcon#enter wrdev, iclass 26, count 2 2006.229.20:36:23.36#ibcon#first serial, iclass 26, count 2 2006.229.20:36:23.36#ibcon#enter sib2, iclass 26, count 2 2006.229.20:36:23.36#ibcon#flushed, iclass 26, count 2 2006.229.20:36:23.36#ibcon#about to write, iclass 26, count 2 2006.229.20:36:23.36#ibcon#wrote, iclass 26, count 2 2006.229.20:36:23.36#ibcon#about to read 3, iclass 26, count 2 2006.229.20:36:23.38#ibcon#read 3, iclass 26, count 2 2006.229.20:36:23.38#ibcon#about to read 4, iclass 26, count 2 2006.229.20:36:23.38#ibcon#read 4, iclass 26, count 2 2006.229.20:36:23.38#ibcon#about to read 5, iclass 26, count 2 2006.229.20:36:23.38#ibcon#read 5, iclass 26, count 2 2006.229.20:36:23.38#ibcon#about to read 6, iclass 26, count 2 2006.229.20:36:23.38#ibcon#read 6, iclass 26, count 2 2006.229.20:36:23.38#ibcon#end of sib2, iclass 26, count 2 2006.229.20:36:23.38#ibcon#*mode == 0, iclass 26, count 2 2006.229.20:36:23.38#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.20:36:23.38#ibcon#[27=AT08-04\r\n] 2006.229.20:36:23.38#ibcon#*before write, iclass 26, count 2 2006.229.20:36:23.38#ibcon#enter sib2, iclass 26, count 2 2006.229.20:36:23.38#ibcon#flushed, iclass 26, count 2 2006.229.20:36:23.38#ibcon#about to write, iclass 26, count 2 2006.229.20:36:23.38#ibcon#wrote, iclass 26, count 2 2006.229.20:36:23.38#ibcon#about to read 3, iclass 26, count 2 2006.229.20:36:23.41#ibcon#read 3, iclass 26, count 2 2006.229.20:36:23.41#ibcon#about to read 4, iclass 26, count 2 2006.229.20:36:23.41#ibcon#read 4, iclass 26, count 2 2006.229.20:36:23.41#ibcon#about to read 5, iclass 26, count 2 2006.229.20:36:23.41#ibcon#read 5, iclass 26, count 2 2006.229.20:36:23.41#ibcon#about to read 6, iclass 26, count 2 2006.229.20:36:23.41#ibcon#read 6, iclass 26, count 2 2006.229.20:36:23.41#ibcon#end of sib2, iclass 26, count 2 2006.229.20:36:23.41#ibcon#*after write, iclass 26, count 2 2006.229.20:36:23.41#ibcon#*before return 0, iclass 26, count 2 2006.229.20:36:23.41#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:23.41#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.20:36:23.41#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.20:36:23.41#ibcon#ireg 7 cls_cnt 0 2006.229.20:36:23.41#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:23.53#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:23.53#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:23.53#ibcon#enter wrdev, iclass 26, count 0 2006.229.20:36:23.53#ibcon#first serial, iclass 26, count 0 2006.229.20:36:23.53#ibcon#enter sib2, iclass 26, count 0 2006.229.20:36:23.53#ibcon#flushed, iclass 26, count 0 2006.229.20:36:23.53#ibcon#about to write, iclass 26, count 0 2006.229.20:36:23.53#ibcon#wrote, iclass 26, count 0 2006.229.20:36:23.53#ibcon#about to read 3, iclass 26, count 0 2006.229.20:36:23.55#ibcon#read 3, iclass 26, count 0 2006.229.20:36:23.55#ibcon#about to read 4, iclass 26, count 0 2006.229.20:36:23.55#ibcon#read 4, iclass 26, count 0 2006.229.20:36:23.55#ibcon#about to read 5, iclass 26, count 0 2006.229.20:36:23.55#ibcon#read 5, iclass 26, count 0 2006.229.20:36:23.55#ibcon#about to read 6, iclass 26, count 0 2006.229.20:36:23.55#ibcon#read 6, iclass 26, count 0 2006.229.20:36:23.55#ibcon#end of sib2, iclass 26, count 0 2006.229.20:36:23.55#ibcon#*mode == 0, iclass 26, count 0 2006.229.20:36:23.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.20:36:23.55#ibcon#[27=USB\r\n] 2006.229.20:36:23.55#ibcon#*before write, iclass 26, count 0 2006.229.20:36:23.55#ibcon#enter sib2, iclass 26, count 0 2006.229.20:36:23.55#ibcon#flushed, iclass 26, count 0 2006.229.20:36:23.55#ibcon#about to write, iclass 26, count 0 2006.229.20:36:23.55#ibcon#wrote, iclass 26, count 0 2006.229.20:36:23.55#ibcon#about to read 3, iclass 26, count 0 2006.229.20:36:23.58#ibcon#read 3, iclass 26, count 0 2006.229.20:36:23.58#ibcon#about to read 4, iclass 26, count 0 2006.229.20:36:23.58#ibcon#read 4, iclass 26, count 0 2006.229.20:36:23.58#ibcon#about to read 5, iclass 26, count 0 2006.229.20:36:23.58#ibcon#read 5, iclass 26, count 0 2006.229.20:36:23.58#ibcon#about to read 6, iclass 26, count 0 2006.229.20:36:23.58#ibcon#read 6, iclass 26, count 0 2006.229.20:36:23.58#ibcon#end of sib2, iclass 26, count 0 2006.229.20:36:23.58#ibcon#*after write, iclass 26, count 0 2006.229.20:36:23.58#ibcon#*before return 0, iclass 26, count 0 2006.229.20:36:23.58#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:23.58#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.20:36:23.58#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.20:36:23.58#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.20:36:23.58$vck44/vabw=wide 2006.229.20:36:23.58#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.20:36:23.58#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.20:36:23.58#ibcon#ireg 8 cls_cnt 0 2006.229.20:36:23.58#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:36:23.58#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:36:23.58#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:36:23.58#ibcon#enter wrdev, iclass 28, count 0 2006.229.20:36:23.58#ibcon#first serial, iclass 28, count 0 2006.229.20:36:23.58#ibcon#enter sib2, iclass 28, count 0 2006.229.20:36:23.58#ibcon#flushed, iclass 28, count 0 2006.229.20:36:23.58#ibcon#about to write, iclass 28, count 0 2006.229.20:36:23.58#ibcon#wrote, iclass 28, count 0 2006.229.20:36:23.58#ibcon#about to read 3, iclass 28, count 0 2006.229.20:36:23.60#ibcon#read 3, iclass 28, count 0 2006.229.20:36:23.60#ibcon#about to read 4, iclass 28, count 0 2006.229.20:36:23.60#ibcon#read 4, iclass 28, count 0 2006.229.20:36:23.60#ibcon#about to read 5, iclass 28, count 0 2006.229.20:36:23.60#ibcon#read 5, iclass 28, count 0 2006.229.20:36:23.60#ibcon#about to read 6, iclass 28, count 0 2006.229.20:36:23.60#ibcon#read 6, iclass 28, count 0 2006.229.20:36:23.60#ibcon#end of sib2, iclass 28, count 0 2006.229.20:36:23.60#ibcon#*mode == 0, iclass 28, count 0 2006.229.20:36:23.60#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.20:36:23.60#ibcon#[25=BW32\r\n] 2006.229.20:36:23.60#ibcon#*before write, iclass 28, count 0 2006.229.20:36:23.60#ibcon#enter sib2, iclass 28, count 0 2006.229.20:36:23.60#ibcon#flushed, iclass 28, count 0 2006.229.20:36:23.60#ibcon#about to write, iclass 28, count 0 2006.229.20:36:23.60#ibcon#wrote, iclass 28, count 0 2006.229.20:36:23.60#ibcon#about to read 3, iclass 28, count 0 2006.229.20:36:23.63#ibcon#read 3, iclass 28, count 0 2006.229.20:36:23.63#ibcon#about to read 4, iclass 28, count 0 2006.229.20:36:23.63#ibcon#read 4, iclass 28, count 0 2006.229.20:36:23.63#ibcon#about to read 5, iclass 28, count 0 2006.229.20:36:23.63#ibcon#read 5, iclass 28, count 0 2006.229.20:36:23.63#ibcon#about to read 6, iclass 28, count 0 2006.229.20:36:23.63#ibcon#read 6, iclass 28, count 0 2006.229.20:36:23.63#ibcon#end of sib2, iclass 28, count 0 2006.229.20:36:23.63#ibcon#*after write, iclass 28, count 0 2006.229.20:36:23.63#ibcon#*before return 0, iclass 28, count 0 2006.229.20:36:23.63#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:36:23.63#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.20:36:23.63#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.20:36:23.63#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.20:36:23.63$vck44/vbbw=wide 2006.229.20:36:23.63#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.20:36:23.63#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.20:36:23.63#ibcon#ireg 8 cls_cnt 0 2006.229.20:36:23.63#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:36:23.70#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:36:23.70#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:36:23.70#ibcon#enter wrdev, iclass 30, count 0 2006.229.20:36:23.70#ibcon#first serial, iclass 30, count 0 2006.229.20:36:23.70#ibcon#enter sib2, iclass 30, count 0 2006.229.20:36:23.70#ibcon#flushed, iclass 30, count 0 2006.229.20:36:23.70#ibcon#about to write, iclass 30, count 0 2006.229.20:36:23.70#ibcon#wrote, iclass 30, count 0 2006.229.20:36:23.70#ibcon#about to read 3, iclass 30, count 0 2006.229.20:36:23.72#ibcon#read 3, iclass 30, count 0 2006.229.20:36:23.72#ibcon#about to read 4, iclass 30, count 0 2006.229.20:36:23.72#ibcon#read 4, iclass 30, count 0 2006.229.20:36:23.72#ibcon#about to read 5, iclass 30, count 0 2006.229.20:36:23.72#ibcon#read 5, iclass 30, count 0 2006.229.20:36:23.72#ibcon#about to read 6, iclass 30, count 0 2006.229.20:36:23.72#ibcon#read 6, iclass 30, count 0 2006.229.20:36:23.72#ibcon#end of sib2, iclass 30, count 0 2006.229.20:36:23.72#ibcon#*mode == 0, iclass 30, count 0 2006.229.20:36:23.72#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.20:36:23.72#ibcon#[27=BW32\r\n] 2006.229.20:36:23.72#ibcon#*before write, iclass 30, count 0 2006.229.20:36:23.72#ibcon#enter sib2, iclass 30, count 0 2006.229.20:36:23.72#ibcon#flushed, iclass 30, count 0 2006.229.20:36:23.72#ibcon#about to write, iclass 30, count 0 2006.229.20:36:23.72#ibcon#wrote, iclass 30, count 0 2006.229.20:36:23.72#ibcon#about to read 3, iclass 30, count 0 2006.229.20:36:23.75#ibcon#read 3, iclass 30, count 0 2006.229.20:36:23.75#ibcon#about to read 4, iclass 30, count 0 2006.229.20:36:23.75#ibcon#read 4, iclass 30, count 0 2006.229.20:36:23.75#ibcon#about to read 5, iclass 30, count 0 2006.229.20:36:23.75#ibcon#read 5, iclass 30, count 0 2006.229.20:36:23.75#ibcon#about to read 6, iclass 30, count 0 2006.229.20:36:23.75#ibcon#read 6, iclass 30, count 0 2006.229.20:36:23.75#ibcon#end of sib2, iclass 30, count 0 2006.229.20:36:23.75#ibcon#*after write, iclass 30, count 0 2006.229.20:36:23.75#ibcon#*before return 0, iclass 30, count 0 2006.229.20:36:23.75#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:36:23.75#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:36:23.75#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.20:36:23.75#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.20:36:23.75$setupk4/ifdk4 2006.229.20:36:23.75$ifdk4/lo= 2006.229.20:36:23.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:36:23.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:36:23.75$ifdk4/patch= 2006.229.20:36:23.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:36:23.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:36:23.75$setupk4/!*+20s 2006.229.20:36:31.07#abcon#<5=/07 1.7 3.3 25.951001001.8\r\n> 2006.229.20:36:31.09#abcon#{5=INTERFACE CLEAR} 2006.229.20:36:31.15#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:36:38.14#trakl#Source acquired 2006.229.20:36:38.26$setupk4/"tpicd 2006.229.20:36:38.26$setupk4/echo=off 2006.229.20:36:38.26$setupk4/xlog=off 2006.229.20:36:38.26:!2006.229.20:37:44 2006.229.20:36:40.14#flagr#flagr/antenna,acquired 2006.229.20:37:44.00:preob 2006.229.20:37:44.14/onsource/TRACKING 2006.229.20:37:44.14:!2006.229.20:37:54 2006.229.20:37:54.00:"tape 2006.229.20:37:54.00:"st=record 2006.229.20:37:54.00:data_valid=on 2006.229.20:37:54.00:midob 2006.229.20:37:55.14/onsource/TRACKING 2006.229.20:37:55.14/wx/25.95,1001.8,100 2006.229.20:37:55.33/cable/+6.4227E-03 2006.229.20:37:56.42/va/01,08,usb,yes,29,31 2006.229.20:37:56.42/va/02,07,usb,yes,31,32 2006.229.20:37:56.42/va/03,06,usb,yes,39,41 2006.229.20:37:56.42/va/04,07,usb,yes,32,34 2006.229.20:37:56.42/va/05,04,usb,yes,29,29 2006.229.20:37:56.42/va/06,04,usb,yes,32,32 2006.229.20:37:56.42/va/07,05,usb,yes,29,29 2006.229.20:37:56.42/va/08,06,usb,yes,21,26 2006.229.20:37:56.65/valo/01,524.99,yes,locked 2006.229.20:37:56.65/valo/02,534.99,yes,locked 2006.229.20:37:56.65/valo/03,564.99,yes,locked 2006.229.20:37:56.65/valo/04,624.99,yes,locked 2006.229.20:37:56.65/valo/05,734.99,yes,locked 2006.229.20:37:56.65/valo/06,814.99,yes,locked 2006.229.20:37:56.65/valo/07,864.99,yes,locked 2006.229.20:37:56.65/valo/08,884.99,yes,locked 2006.229.20:37:57.74/vb/01,04,usb,yes,31,28 2006.229.20:37:57.74/vb/02,04,usb,yes,33,33 2006.229.20:37:57.74/vb/03,04,usb,yes,30,33 2006.229.20:37:57.74/vb/04,04,usb,yes,34,33 2006.229.20:37:57.74/vb/05,04,usb,yes,27,29 2006.229.20:37:57.74/vb/06,04,usb,yes,31,27 2006.229.20:37:57.74/vb/07,04,usb,yes,31,31 2006.229.20:37:57.74/vb/08,04,usb,yes,28,32 2006.229.20:37:57.97/vblo/01,629.99,yes,locked 2006.229.20:37:57.97/vblo/02,634.99,yes,locked 2006.229.20:37:57.97/vblo/03,649.99,yes,locked 2006.229.20:37:57.97/vblo/04,679.99,yes,locked 2006.229.20:37:57.97/vblo/05,709.99,yes,locked 2006.229.20:37:57.97/vblo/06,719.99,yes,locked 2006.229.20:37:57.97/vblo/07,734.99,yes,locked 2006.229.20:37:57.97/vblo/08,744.99,yes,locked 2006.229.20:37:58.12/vabw/8 2006.229.20:37:58.27/vbbw/8 2006.229.20:37:58.45/xfe/off,on,12.5 2006.229.20:37:58.82/ifatt/23,28,28,28 2006.229.20:37:59.08/fmout-gps/S +4.64E-07 2006.229.20:37:59.12:!2006.229.20:38:44 2006.229.20:38:44.00:data_valid=off 2006.229.20:38:44.00:"et 2006.229.20:38:44.00:!+3s 2006.229.20:38:47.01:"tape 2006.229.20:38:47.01:postob 2006.229.20:38:47.18/cable/+6.4209E-03 2006.229.20:38:47.18/wx/25.95,1001.8,100 2006.229.20:38:48.08/fmout-gps/S +4.63E-07 2006.229.20:38:48.08:scan_name=229-2041,jd0608,80 2006.229.20:38:48.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.229.20:38:49.13#flagr#flagr/antenna,new-source 2006.229.20:38:49.13:checkk5 2006.229.20:38:49.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:38:49.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:38:50.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:38:50.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:38:51.15/chk_obsdata//k5ts1/T2292037??a.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.20:38:51.53/chk_obsdata//k5ts2/T2292037??b.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.20:38:51.94/chk_obsdata//k5ts3/T2292037??c.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.20:38:52.35/chk_obsdata//k5ts4/T2292037??d.dat file size is correct (nominal:200MB, actual:200MB). 2006.229.20:38:53.09/k5log//k5ts1_log_newline 2006.229.20:38:53.80/k5log//k5ts2_log_newline 2006.229.20:38:54.51/k5log//k5ts3_log_newline 2006.229.20:38:55.22/k5log//k5ts4_log_newline 2006.229.20:38:55.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:38:55.24:setupk4=1 2006.229.20:38:55.24$setupk4/echo=on 2006.229.20:38:55.24$setupk4/pcalon 2006.229.20:38:55.24$pcalon/"no phase cal control is implemented here 2006.229.20:38:55.24$setupk4/"tpicd=stop 2006.229.20:38:55.24$setupk4/"rec=synch_on 2006.229.20:38:55.24$setupk4/"rec_mode=128 2006.229.20:38:55.24$setupk4/!* 2006.229.20:38:55.24$setupk4/recpk4 2006.229.20:38:55.24$recpk4/recpatch= 2006.229.20:38:55.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:38:55.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:38:55.25$setupk4/vck44 2006.229.20:38:55.25$vck44/valo=1,524.99 2006.229.20:38:55.25#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.20:38:55.25#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.20:38:55.25#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:55.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:55.25#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:55.25#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:55.25#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:38:55.25#ibcon#first serial, iclass 23, count 0 2006.229.20:38:55.25#ibcon#enter sib2, iclass 23, count 0 2006.229.20:38:55.25#ibcon#flushed, iclass 23, count 0 2006.229.20:38:55.25#ibcon#about to write, iclass 23, count 0 2006.229.20:38:55.25#ibcon#wrote, iclass 23, count 0 2006.229.20:38:55.25#ibcon#about to read 3, iclass 23, count 0 2006.229.20:38:55.27#ibcon#read 3, iclass 23, count 0 2006.229.20:38:55.27#ibcon#about to read 4, iclass 23, count 0 2006.229.20:38:55.27#ibcon#read 4, iclass 23, count 0 2006.229.20:38:55.27#ibcon#about to read 5, iclass 23, count 0 2006.229.20:38:55.27#ibcon#read 5, iclass 23, count 0 2006.229.20:38:55.27#ibcon#about to read 6, iclass 23, count 0 2006.229.20:38:55.27#ibcon#read 6, iclass 23, count 0 2006.229.20:38:55.27#ibcon#end of sib2, iclass 23, count 0 2006.229.20:38:55.27#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:38:55.27#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:38:55.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:38:55.27#ibcon#*before write, iclass 23, count 0 2006.229.20:38:55.27#ibcon#enter sib2, iclass 23, count 0 2006.229.20:38:55.27#ibcon#flushed, iclass 23, count 0 2006.229.20:38:55.27#ibcon#about to write, iclass 23, count 0 2006.229.20:38:55.27#ibcon#wrote, iclass 23, count 0 2006.229.20:38:55.27#ibcon#about to read 3, iclass 23, count 0 2006.229.20:38:55.32#ibcon#read 3, iclass 23, count 0 2006.229.20:38:55.32#ibcon#about to read 4, iclass 23, count 0 2006.229.20:38:55.32#ibcon#read 4, iclass 23, count 0 2006.229.20:38:55.32#ibcon#about to read 5, iclass 23, count 0 2006.229.20:38:55.32#ibcon#read 5, iclass 23, count 0 2006.229.20:38:55.32#ibcon#about to read 6, iclass 23, count 0 2006.229.20:38:55.32#ibcon#read 6, iclass 23, count 0 2006.229.20:38:55.32#ibcon#end of sib2, iclass 23, count 0 2006.229.20:38:55.32#ibcon#*after write, iclass 23, count 0 2006.229.20:38:55.32#ibcon#*before return 0, iclass 23, count 0 2006.229.20:38:55.32#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:55.32#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:55.32#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:38:55.32#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:38:55.32$vck44/va=1,8 2006.229.20:38:55.32#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.20:38:55.32#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.20:38:55.32#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:55.32#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:55.32#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:55.32#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:55.32#ibcon#enter wrdev, iclass 25, count 2 2006.229.20:38:55.32#ibcon#first serial, iclass 25, count 2 2006.229.20:38:55.32#ibcon#enter sib2, iclass 25, count 2 2006.229.20:38:55.32#ibcon#flushed, iclass 25, count 2 2006.229.20:38:55.32#ibcon#about to write, iclass 25, count 2 2006.229.20:38:55.32#ibcon#wrote, iclass 25, count 2 2006.229.20:38:55.32#ibcon#about to read 3, iclass 25, count 2 2006.229.20:38:55.34#ibcon#read 3, iclass 25, count 2 2006.229.20:38:55.34#ibcon#about to read 4, iclass 25, count 2 2006.229.20:38:55.34#ibcon#read 4, iclass 25, count 2 2006.229.20:38:55.34#ibcon#about to read 5, iclass 25, count 2 2006.229.20:38:55.34#ibcon#read 5, iclass 25, count 2 2006.229.20:38:55.34#ibcon#about to read 6, iclass 25, count 2 2006.229.20:38:55.34#ibcon#read 6, iclass 25, count 2 2006.229.20:38:55.34#ibcon#end of sib2, iclass 25, count 2 2006.229.20:38:55.34#ibcon#*mode == 0, iclass 25, count 2 2006.229.20:38:55.34#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.20:38:55.34#ibcon#[25=AT01-08\r\n] 2006.229.20:38:55.34#ibcon#*before write, iclass 25, count 2 2006.229.20:38:55.34#ibcon#enter sib2, iclass 25, count 2 2006.229.20:38:55.34#ibcon#flushed, iclass 25, count 2 2006.229.20:38:55.34#ibcon#about to write, iclass 25, count 2 2006.229.20:38:55.34#ibcon#wrote, iclass 25, count 2 2006.229.20:38:55.34#ibcon#about to read 3, iclass 25, count 2 2006.229.20:38:55.37#ibcon#read 3, iclass 25, count 2 2006.229.20:38:55.37#ibcon#about to read 4, iclass 25, count 2 2006.229.20:38:55.37#ibcon#read 4, iclass 25, count 2 2006.229.20:38:55.37#ibcon#about to read 5, iclass 25, count 2 2006.229.20:38:55.37#ibcon#read 5, iclass 25, count 2 2006.229.20:38:55.37#ibcon#about to read 6, iclass 25, count 2 2006.229.20:38:55.37#ibcon#read 6, iclass 25, count 2 2006.229.20:38:55.37#ibcon#end of sib2, iclass 25, count 2 2006.229.20:38:55.37#ibcon#*after write, iclass 25, count 2 2006.229.20:38:55.37#ibcon#*before return 0, iclass 25, count 2 2006.229.20:38:55.37#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:55.37#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:55.37#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.20:38:55.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:55.37#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:55.49#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:55.49#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:55.49#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:38:55.49#ibcon#first serial, iclass 25, count 0 2006.229.20:38:55.49#ibcon#enter sib2, iclass 25, count 0 2006.229.20:38:55.49#ibcon#flushed, iclass 25, count 0 2006.229.20:38:55.49#ibcon#about to write, iclass 25, count 0 2006.229.20:38:55.49#ibcon#wrote, iclass 25, count 0 2006.229.20:38:55.49#ibcon#about to read 3, iclass 25, count 0 2006.229.20:38:55.51#ibcon#read 3, iclass 25, count 0 2006.229.20:38:55.51#ibcon#about to read 4, iclass 25, count 0 2006.229.20:38:55.51#ibcon#read 4, iclass 25, count 0 2006.229.20:38:55.51#ibcon#about to read 5, iclass 25, count 0 2006.229.20:38:55.51#ibcon#read 5, iclass 25, count 0 2006.229.20:38:55.51#ibcon#about to read 6, iclass 25, count 0 2006.229.20:38:55.51#ibcon#read 6, iclass 25, count 0 2006.229.20:38:55.51#ibcon#end of sib2, iclass 25, count 0 2006.229.20:38:55.51#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:38:55.51#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:38:55.51#ibcon#[25=USB\r\n] 2006.229.20:38:55.51#ibcon#*before write, iclass 25, count 0 2006.229.20:38:55.51#ibcon#enter sib2, iclass 25, count 0 2006.229.20:38:55.51#ibcon#flushed, iclass 25, count 0 2006.229.20:38:55.51#ibcon#about to write, iclass 25, count 0 2006.229.20:38:55.51#ibcon#wrote, iclass 25, count 0 2006.229.20:38:55.51#ibcon#about to read 3, iclass 25, count 0 2006.229.20:38:55.54#ibcon#read 3, iclass 25, count 0 2006.229.20:38:55.54#ibcon#about to read 4, iclass 25, count 0 2006.229.20:38:55.54#ibcon#read 4, iclass 25, count 0 2006.229.20:38:55.54#ibcon#about to read 5, iclass 25, count 0 2006.229.20:38:55.54#ibcon#read 5, iclass 25, count 0 2006.229.20:38:55.54#ibcon#about to read 6, iclass 25, count 0 2006.229.20:38:55.54#ibcon#read 6, iclass 25, count 0 2006.229.20:38:55.54#ibcon#end of sib2, iclass 25, count 0 2006.229.20:38:55.54#ibcon#*after write, iclass 25, count 0 2006.229.20:38:55.54#ibcon#*before return 0, iclass 25, count 0 2006.229.20:38:55.54#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:55.54#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:55.54#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:38:55.54#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:38:55.54$vck44/valo=2,534.99 2006.229.20:38:55.54#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.20:38:55.54#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.20:38:55.54#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:55.54#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:55.54#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:55.54#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:55.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:38:55.54#ibcon#first serial, iclass 27, count 0 2006.229.20:38:55.54#ibcon#enter sib2, iclass 27, count 0 2006.229.20:38:55.54#ibcon#flushed, iclass 27, count 0 2006.229.20:38:55.54#ibcon#about to write, iclass 27, count 0 2006.229.20:38:55.54#ibcon#wrote, iclass 27, count 0 2006.229.20:38:55.54#ibcon#about to read 3, iclass 27, count 0 2006.229.20:38:55.56#ibcon#read 3, iclass 27, count 0 2006.229.20:38:55.56#ibcon#about to read 4, iclass 27, count 0 2006.229.20:38:55.56#ibcon#read 4, iclass 27, count 0 2006.229.20:38:55.56#ibcon#about to read 5, iclass 27, count 0 2006.229.20:38:55.56#ibcon#read 5, iclass 27, count 0 2006.229.20:38:55.56#ibcon#about to read 6, iclass 27, count 0 2006.229.20:38:55.56#ibcon#read 6, iclass 27, count 0 2006.229.20:38:55.56#ibcon#end of sib2, iclass 27, count 0 2006.229.20:38:55.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:38:55.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:38:55.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:38:55.56#ibcon#*before write, iclass 27, count 0 2006.229.20:38:55.56#ibcon#enter sib2, iclass 27, count 0 2006.229.20:38:55.56#ibcon#flushed, iclass 27, count 0 2006.229.20:38:55.56#ibcon#about to write, iclass 27, count 0 2006.229.20:38:55.56#ibcon#wrote, iclass 27, count 0 2006.229.20:38:55.56#ibcon#about to read 3, iclass 27, count 0 2006.229.20:38:55.60#ibcon#read 3, iclass 27, count 0 2006.229.20:38:55.60#ibcon#about to read 4, iclass 27, count 0 2006.229.20:38:55.60#ibcon#read 4, iclass 27, count 0 2006.229.20:38:55.60#ibcon#about to read 5, iclass 27, count 0 2006.229.20:38:55.60#ibcon#read 5, iclass 27, count 0 2006.229.20:38:55.60#ibcon#about to read 6, iclass 27, count 0 2006.229.20:38:55.60#ibcon#read 6, iclass 27, count 0 2006.229.20:38:55.60#ibcon#end of sib2, iclass 27, count 0 2006.229.20:38:55.60#ibcon#*after write, iclass 27, count 0 2006.229.20:38:55.60#ibcon#*before return 0, iclass 27, count 0 2006.229.20:38:55.60#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:55.60#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:55.60#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:38:55.60#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:38:55.60$vck44/va=2,7 2006.229.20:38:55.60#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.20:38:55.60#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.20:38:55.60#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:55.60#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:55.66#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:55.66#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:55.66#ibcon#enter wrdev, iclass 29, count 2 2006.229.20:38:55.66#ibcon#first serial, iclass 29, count 2 2006.229.20:38:55.66#ibcon#enter sib2, iclass 29, count 2 2006.229.20:38:55.66#ibcon#flushed, iclass 29, count 2 2006.229.20:38:55.66#ibcon#about to write, iclass 29, count 2 2006.229.20:38:55.66#ibcon#wrote, iclass 29, count 2 2006.229.20:38:55.66#ibcon#about to read 3, iclass 29, count 2 2006.229.20:38:55.68#ibcon#read 3, iclass 29, count 2 2006.229.20:38:55.68#ibcon#about to read 4, iclass 29, count 2 2006.229.20:38:55.68#ibcon#read 4, iclass 29, count 2 2006.229.20:38:55.68#ibcon#about to read 5, iclass 29, count 2 2006.229.20:38:55.68#ibcon#read 5, iclass 29, count 2 2006.229.20:38:55.68#ibcon#about to read 6, iclass 29, count 2 2006.229.20:38:55.68#ibcon#read 6, iclass 29, count 2 2006.229.20:38:55.68#ibcon#end of sib2, iclass 29, count 2 2006.229.20:38:55.68#ibcon#*mode == 0, iclass 29, count 2 2006.229.20:38:55.68#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.20:38:55.68#ibcon#[25=AT02-07\r\n] 2006.229.20:38:55.68#ibcon#*before write, iclass 29, count 2 2006.229.20:38:55.68#ibcon#enter sib2, iclass 29, count 2 2006.229.20:38:55.68#ibcon#flushed, iclass 29, count 2 2006.229.20:38:55.68#ibcon#about to write, iclass 29, count 2 2006.229.20:38:55.68#ibcon#wrote, iclass 29, count 2 2006.229.20:38:55.68#ibcon#about to read 3, iclass 29, count 2 2006.229.20:38:55.71#ibcon#read 3, iclass 29, count 2 2006.229.20:38:55.71#ibcon#about to read 4, iclass 29, count 2 2006.229.20:38:55.71#ibcon#read 4, iclass 29, count 2 2006.229.20:38:55.71#ibcon#about to read 5, iclass 29, count 2 2006.229.20:38:55.71#ibcon#read 5, iclass 29, count 2 2006.229.20:38:55.71#ibcon#about to read 6, iclass 29, count 2 2006.229.20:38:55.71#ibcon#read 6, iclass 29, count 2 2006.229.20:38:55.71#ibcon#end of sib2, iclass 29, count 2 2006.229.20:38:55.71#ibcon#*after write, iclass 29, count 2 2006.229.20:38:55.71#ibcon#*before return 0, iclass 29, count 2 2006.229.20:38:55.71#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:55.71#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:55.71#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.20:38:55.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:55.71#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:55.83#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:55.83#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:55.83#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:38:55.83#ibcon#first serial, iclass 29, count 0 2006.229.20:38:55.83#ibcon#enter sib2, iclass 29, count 0 2006.229.20:38:55.83#ibcon#flushed, iclass 29, count 0 2006.229.20:38:55.83#ibcon#about to write, iclass 29, count 0 2006.229.20:38:55.83#ibcon#wrote, iclass 29, count 0 2006.229.20:38:55.83#ibcon#about to read 3, iclass 29, count 0 2006.229.20:38:55.85#ibcon#read 3, iclass 29, count 0 2006.229.20:38:55.85#ibcon#about to read 4, iclass 29, count 0 2006.229.20:38:55.85#ibcon#read 4, iclass 29, count 0 2006.229.20:38:55.85#ibcon#about to read 5, iclass 29, count 0 2006.229.20:38:55.85#ibcon#read 5, iclass 29, count 0 2006.229.20:38:55.85#ibcon#about to read 6, iclass 29, count 0 2006.229.20:38:55.85#ibcon#read 6, iclass 29, count 0 2006.229.20:38:55.85#ibcon#end of sib2, iclass 29, count 0 2006.229.20:38:55.85#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:38:55.85#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:38:55.85#ibcon#[25=USB\r\n] 2006.229.20:38:55.85#ibcon#*before write, iclass 29, count 0 2006.229.20:38:55.85#ibcon#enter sib2, iclass 29, count 0 2006.229.20:38:55.85#ibcon#flushed, iclass 29, count 0 2006.229.20:38:55.85#ibcon#about to write, iclass 29, count 0 2006.229.20:38:55.85#ibcon#wrote, iclass 29, count 0 2006.229.20:38:55.85#ibcon#about to read 3, iclass 29, count 0 2006.229.20:38:55.88#ibcon#read 3, iclass 29, count 0 2006.229.20:38:55.88#ibcon#about to read 4, iclass 29, count 0 2006.229.20:38:55.88#ibcon#read 4, iclass 29, count 0 2006.229.20:38:55.88#ibcon#about to read 5, iclass 29, count 0 2006.229.20:38:55.88#ibcon#read 5, iclass 29, count 0 2006.229.20:38:55.88#ibcon#about to read 6, iclass 29, count 0 2006.229.20:38:55.88#ibcon#read 6, iclass 29, count 0 2006.229.20:38:55.88#ibcon#end of sib2, iclass 29, count 0 2006.229.20:38:55.88#ibcon#*after write, iclass 29, count 0 2006.229.20:38:55.88#ibcon#*before return 0, iclass 29, count 0 2006.229.20:38:55.88#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:55.88#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:55.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:38:55.88#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:38:55.88$vck44/valo=3,564.99 2006.229.20:38:55.88#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.20:38:55.88#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.20:38:55.88#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:55.88#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:55.88#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:55.88#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:55.88#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:38:55.88#ibcon#first serial, iclass 31, count 0 2006.229.20:38:55.88#ibcon#enter sib2, iclass 31, count 0 2006.229.20:38:55.88#ibcon#flushed, iclass 31, count 0 2006.229.20:38:55.88#ibcon#about to write, iclass 31, count 0 2006.229.20:38:55.88#ibcon#wrote, iclass 31, count 0 2006.229.20:38:55.88#ibcon#about to read 3, iclass 31, count 0 2006.229.20:38:55.90#ibcon#read 3, iclass 31, count 0 2006.229.20:38:55.90#ibcon#about to read 4, iclass 31, count 0 2006.229.20:38:55.90#ibcon#read 4, iclass 31, count 0 2006.229.20:38:55.90#ibcon#about to read 5, iclass 31, count 0 2006.229.20:38:55.90#ibcon#read 5, iclass 31, count 0 2006.229.20:38:55.90#ibcon#about to read 6, iclass 31, count 0 2006.229.20:38:55.90#ibcon#read 6, iclass 31, count 0 2006.229.20:38:55.90#ibcon#end of sib2, iclass 31, count 0 2006.229.20:38:55.90#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:38:55.90#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:38:55.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:38:55.90#ibcon#*before write, iclass 31, count 0 2006.229.20:38:55.90#ibcon#enter sib2, iclass 31, count 0 2006.229.20:38:55.90#ibcon#flushed, iclass 31, count 0 2006.229.20:38:55.90#ibcon#about to write, iclass 31, count 0 2006.229.20:38:55.90#ibcon#wrote, iclass 31, count 0 2006.229.20:38:55.90#ibcon#about to read 3, iclass 31, count 0 2006.229.20:38:55.94#ibcon#read 3, iclass 31, count 0 2006.229.20:38:55.94#ibcon#about to read 4, iclass 31, count 0 2006.229.20:38:55.94#ibcon#read 4, iclass 31, count 0 2006.229.20:38:55.94#ibcon#about to read 5, iclass 31, count 0 2006.229.20:38:55.94#ibcon#read 5, iclass 31, count 0 2006.229.20:38:55.94#ibcon#about to read 6, iclass 31, count 0 2006.229.20:38:55.94#ibcon#read 6, iclass 31, count 0 2006.229.20:38:55.94#ibcon#end of sib2, iclass 31, count 0 2006.229.20:38:55.94#ibcon#*after write, iclass 31, count 0 2006.229.20:38:55.94#ibcon#*before return 0, iclass 31, count 0 2006.229.20:38:55.94#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:55.94#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:55.94#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:38:55.94#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:38:55.94$vck44/va=3,6 2006.229.20:38:55.94#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.20:38:55.94#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.20:38:55.94#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:55.94#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:56.00#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:56.00#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:56.00#ibcon#enter wrdev, iclass 33, count 2 2006.229.20:38:56.00#ibcon#first serial, iclass 33, count 2 2006.229.20:38:56.00#ibcon#enter sib2, iclass 33, count 2 2006.229.20:38:56.00#ibcon#flushed, iclass 33, count 2 2006.229.20:38:56.00#ibcon#about to write, iclass 33, count 2 2006.229.20:38:56.00#ibcon#wrote, iclass 33, count 2 2006.229.20:38:56.00#ibcon#about to read 3, iclass 33, count 2 2006.229.20:38:56.02#ibcon#read 3, iclass 33, count 2 2006.229.20:38:56.02#ibcon#about to read 4, iclass 33, count 2 2006.229.20:38:56.02#ibcon#read 4, iclass 33, count 2 2006.229.20:38:56.02#ibcon#about to read 5, iclass 33, count 2 2006.229.20:38:56.02#ibcon#read 5, iclass 33, count 2 2006.229.20:38:56.02#ibcon#about to read 6, iclass 33, count 2 2006.229.20:38:56.02#ibcon#read 6, iclass 33, count 2 2006.229.20:38:56.02#ibcon#end of sib2, iclass 33, count 2 2006.229.20:38:56.02#ibcon#*mode == 0, iclass 33, count 2 2006.229.20:38:56.02#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.20:38:56.02#ibcon#[25=AT03-06\r\n] 2006.229.20:38:56.02#ibcon#*before write, iclass 33, count 2 2006.229.20:38:56.02#ibcon#enter sib2, iclass 33, count 2 2006.229.20:38:56.02#ibcon#flushed, iclass 33, count 2 2006.229.20:38:56.02#ibcon#about to write, iclass 33, count 2 2006.229.20:38:56.02#ibcon#wrote, iclass 33, count 2 2006.229.20:38:56.02#ibcon#about to read 3, iclass 33, count 2 2006.229.20:38:56.05#ibcon#read 3, iclass 33, count 2 2006.229.20:38:56.05#ibcon#about to read 4, iclass 33, count 2 2006.229.20:38:56.05#ibcon#read 4, iclass 33, count 2 2006.229.20:38:56.05#ibcon#about to read 5, iclass 33, count 2 2006.229.20:38:56.05#ibcon#read 5, iclass 33, count 2 2006.229.20:38:56.05#ibcon#about to read 6, iclass 33, count 2 2006.229.20:38:56.05#ibcon#read 6, iclass 33, count 2 2006.229.20:38:56.05#ibcon#end of sib2, iclass 33, count 2 2006.229.20:38:56.05#ibcon#*after write, iclass 33, count 2 2006.229.20:38:56.05#ibcon#*before return 0, iclass 33, count 2 2006.229.20:38:56.05#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:56.05#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:56.05#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.20:38:56.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:56.05#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:56.17#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:56.17#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:56.17#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:38:56.17#ibcon#first serial, iclass 33, count 0 2006.229.20:38:56.17#ibcon#enter sib2, iclass 33, count 0 2006.229.20:38:56.17#ibcon#flushed, iclass 33, count 0 2006.229.20:38:56.17#ibcon#about to write, iclass 33, count 0 2006.229.20:38:56.17#ibcon#wrote, iclass 33, count 0 2006.229.20:38:56.17#ibcon#about to read 3, iclass 33, count 0 2006.229.20:38:56.19#ibcon#read 3, iclass 33, count 0 2006.229.20:38:56.19#ibcon#about to read 4, iclass 33, count 0 2006.229.20:38:56.19#ibcon#read 4, iclass 33, count 0 2006.229.20:38:56.19#ibcon#about to read 5, iclass 33, count 0 2006.229.20:38:56.19#ibcon#read 5, iclass 33, count 0 2006.229.20:38:56.19#ibcon#about to read 6, iclass 33, count 0 2006.229.20:38:56.19#ibcon#read 6, iclass 33, count 0 2006.229.20:38:56.19#ibcon#end of sib2, iclass 33, count 0 2006.229.20:38:56.19#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:38:56.19#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:38:56.19#ibcon#[25=USB\r\n] 2006.229.20:38:56.19#ibcon#*before write, iclass 33, count 0 2006.229.20:38:56.19#ibcon#enter sib2, iclass 33, count 0 2006.229.20:38:56.19#ibcon#flushed, iclass 33, count 0 2006.229.20:38:56.19#ibcon#about to write, iclass 33, count 0 2006.229.20:38:56.19#ibcon#wrote, iclass 33, count 0 2006.229.20:38:56.19#ibcon#about to read 3, iclass 33, count 0 2006.229.20:38:56.22#ibcon#read 3, iclass 33, count 0 2006.229.20:38:56.22#ibcon#about to read 4, iclass 33, count 0 2006.229.20:38:56.22#ibcon#read 4, iclass 33, count 0 2006.229.20:38:56.22#ibcon#about to read 5, iclass 33, count 0 2006.229.20:38:56.22#ibcon#read 5, iclass 33, count 0 2006.229.20:38:56.22#ibcon#about to read 6, iclass 33, count 0 2006.229.20:38:56.22#ibcon#read 6, iclass 33, count 0 2006.229.20:38:56.22#ibcon#end of sib2, iclass 33, count 0 2006.229.20:38:56.22#ibcon#*after write, iclass 33, count 0 2006.229.20:38:56.22#ibcon#*before return 0, iclass 33, count 0 2006.229.20:38:56.22#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:56.22#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:56.22#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:38:56.22#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:38:56.22$vck44/valo=4,624.99 2006.229.20:38:56.22#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.20:38:56.22#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.20:38:56.22#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:56.22#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:56.22#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:56.22#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:56.22#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:38:56.22#ibcon#first serial, iclass 35, count 0 2006.229.20:38:56.22#ibcon#enter sib2, iclass 35, count 0 2006.229.20:38:56.22#ibcon#flushed, iclass 35, count 0 2006.229.20:38:56.22#ibcon#about to write, iclass 35, count 0 2006.229.20:38:56.22#ibcon#wrote, iclass 35, count 0 2006.229.20:38:56.22#ibcon#about to read 3, iclass 35, count 0 2006.229.20:38:56.24#ibcon#read 3, iclass 35, count 0 2006.229.20:38:56.24#ibcon#about to read 4, iclass 35, count 0 2006.229.20:38:56.24#ibcon#read 4, iclass 35, count 0 2006.229.20:38:56.24#ibcon#about to read 5, iclass 35, count 0 2006.229.20:38:56.24#ibcon#read 5, iclass 35, count 0 2006.229.20:38:56.24#ibcon#about to read 6, iclass 35, count 0 2006.229.20:38:56.24#ibcon#read 6, iclass 35, count 0 2006.229.20:38:56.24#ibcon#end of sib2, iclass 35, count 0 2006.229.20:38:56.24#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:38:56.24#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:38:56.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:38:56.24#ibcon#*before write, iclass 35, count 0 2006.229.20:38:56.24#ibcon#enter sib2, iclass 35, count 0 2006.229.20:38:56.24#ibcon#flushed, iclass 35, count 0 2006.229.20:38:56.24#ibcon#about to write, iclass 35, count 0 2006.229.20:38:56.24#ibcon#wrote, iclass 35, count 0 2006.229.20:38:56.24#ibcon#about to read 3, iclass 35, count 0 2006.229.20:38:56.28#ibcon#read 3, iclass 35, count 0 2006.229.20:38:56.28#ibcon#about to read 4, iclass 35, count 0 2006.229.20:38:56.28#ibcon#read 4, iclass 35, count 0 2006.229.20:38:56.28#ibcon#about to read 5, iclass 35, count 0 2006.229.20:38:56.28#ibcon#read 5, iclass 35, count 0 2006.229.20:38:56.28#ibcon#about to read 6, iclass 35, count 0 2006.229.20:38:56.28#ibcon#read 6, iclass 35, count 0 2006.229.20:38:56.28#ibcon#end of sib2, iclass 35, count 0 2006.229.20:38:56.28#ibcon#*after write, iclass 35, count 0 2006.229.20:38:56.28#ibcon#*before return 0, iclass 35, count 0 2006.229.20:38:56.28#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:56.28#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:56.28#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:38:56.28#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:38:56.28$vck44/va=4,7 2006.229.20:38:56.28#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.20:38:56.28#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.20:38:56.28#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:56.28#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:56.34#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:56.34#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:56.34#ibcon#enter wrdev, iclass 37, count 2 2006.229.20:38:56.34#ibcon#first serial, iclass 37, count 2 2006.229.20:38:56.34#ibcon#enter sib2, iclass 37, count 2 2006.229.20:38:56.34#ibcon#flushed, iclass 37, count 2 2006.229.20:38:56.34#ibcon#about to write, iclass 37, count 2 2006.229.20:38:56.34#ibcon#wrote, iclass 37, count 2 2006.229.20:38:56.34#ibcon#about to read 3, iclass 37, count 2 2006.229.20:38:56.36#ibcon#read 3, iclass 37, count 2 2006.229.20:38:56.36#ibcon#about to read 4, iclass 37, count 2 2006.229.20:38:56.36#ibcon#read 4, iclass 37, count 2 2006.229.20:38:56.36#ibcon#about to read 5, iclass 37, count 2 2006.229.20:38:56.36#ibcon#read 5, iclass 37, count 2 2006.229.20:38:56.36#ibcon#about to read 6, iclass 37, count 2 2006.229.20:38:56.36#ibcon#read 6, iclass 37, count 2 2006.229.20:38:56.36#ibcon#end of sib2, iclass 37, count 2 2006.229.20:38:56.36#ibcon#*mode == 0, iclass 37, count 2 2006.229.20:38:56.36#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.20:38:56.36#ibcon#[25=AT04-07\r\n] 2006.229.20:38:56.36#ibcon#*before write, iclass 37, count 2 2006.229.20:38:56.36#ibcon#enter sib2, iclass 37, count 2 2006.229.20:38:56.36#ibcon#flushed, iclass 37, count 2 2006.229.20:38:56.36#ibcon#about to write, iclass 37, count 2 2006.229.20:38:56.36#ibcon#wrote, iclass 37, count 2 2006.229.20:38:56.36#ibcon#about to read 3, iclass 37, count 2 2006.229.20:38:56.39#ibcon#read 3, iclass 37, count 2 2006.229.20:38:56.39#ibcon#about to read 4, iclass 37, count 2 2006.229.20:38:56.39#ibcon#read 4, iclass 37, count 2 2006.229.20:38:56.39#ibcon#about to read 5, iclass 37, count 2 2006.229.20:38:56.39#ibcon#read 5, iclass 37, count 2 2006.229.20:38:56.39#ibcon#about to read 6, iclass 37, count 2 2006.229.20:38:56.39#ibcon#read 6, iclass 37, count 2 2006.229.20:38:56.39#ibcon#end of sib2, iclass 37, count 2 2006.229.20:38:56.39#ibcon#*after write, iclass 37, count 2 2006.229.20:38:56.39#ibcon#*before return 0, iclass 37, count 2 2006.229.20:38:56.39#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:56.39#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:56.39#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.20:38:56.39#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:56.39#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:56.51#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:56.51#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:56.51#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:38:56.51#ibcon#first serial, iclass 37, count 0 2006.229.20:38:56.51#ibcon#enter sib2, iclass 37, count 0 2006.229.20:38:56.51#ibcon#flushed, iclass 37, count 0 2006.229.20:38:56.51#ibcon#about to write, iclass 37, count 0 2006.229.20:38:56.51#ibcon#wrote, iclass 37, count 0 2006.229.20:38:56.51#ibcon#about to read 3, iclass 37, count 0 2006.229.20:38:56.53#ibcon#read 3, iclass 37, count 0 2006.229.20:38:56.53#ibcon#about to read 4, iclass 37, count 0 2006.229.20:38:56.53#ibcon#read 4, iclass 37, count 0 2006.229.20:38:56.53#ibcon#about to read 5, iclass 37, count 0 2006.229.20:38:56.53#ibcon#read 5, iclass 37, count 0 2006.229.20:38:56.53#ibcon#about to read 6, iclass 37, count 0 2006.229.20:38:56.53#ibcon#read 6, iclass 37, count 0 2006.229.20:38:56.53#ibcon#end of sib2, iclass 37, count 0 2006.229.20:38:56.53#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:38:56.53#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:38:56.53#ibcon#[25=USB\r\n] 2006.229.20:38:56.53#ibcon#*before write, iclass 37, count 0 2006.229.20:38:56.53#ibcon#enter sib2, iclass 37, count 0 2006.229.20:38:56.53#ibcon#flushed, iclass 37, count 0 2006.229.20:38:56.53#ibcon#about to write, iclass 37, count 0 2006.229.20:38:56.53#ibcon#wrote, iclass 37, count 0 2006.229.20:38:56.53#ibcon#about to read 3, iclass 37, count 0 2006.229.20:38:56.56#ibcon#read 3, iclass 37, count 0 2006.229.20:38:56.56#ibcon#about to read 4, iclass 37, count 0 2006.229.20:38:56.56#ibcon#read 4, iclass 37, count 0 2006.229.20:38:56.56#ibcon#about to read 5, iclass 37, count 0 2006.229.20:38:56.56#ibcon#read 5, iclass 37, count 0 2006.229.20:38:56.56#ibcon#about to read 6, iclass 37, count 0 2006.229.20:38:56.56#ibcon#read 6, iclass 37, count 0 2006.229.20:38:56.56#ibcon#end of sib2, iclass 37, count 0 2006.229.20:38:56.56#ibcon#*after write, iclass 37, count 0 2006.229.20:38:56.56#ibcon#*before return 0, iclass 37, count 0 2006.229.20:38:56.56#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:56.56#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:56.56#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:38:56.56#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:38:56.56$vck44/valo=5,734.99 2006.229.20:38:56.56#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.20:38:56.56#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.20:38:56.56#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:56.56#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:56.56#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:56.56#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:56.56#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:38:56.56#ibcon#first serial, iclass 39, count 0 2006.229.20:38:56.56#ibcon#enter sib2, iclass 39, count 0 2006.229.20:38:56.56#ibcon#flushed, iclass 39, count 0 2006.229.20:38:56.56#ibcon#about to write, iclass 39, count 0 2006.229.20:38:56.56#ibcon#wrote, iclass 39, count 0 2006.229.20:38:56.56#ibcon#about to read 3, iclass 39, count 0 2006.229.20:38:56.58#ibcon#read 3, iclass 39, count 0 2006.229.20:38:56.58#ibcon#about to read 4, iclass 39, count 0 2006.229.20:38:56.58#ibcon#read 4, iclass 39, count 0 2006.229.20:38:56.58#ibcon#about to read 5, iclass 39, count 0 2006.229.20:38:56.58#ibcon#read 5, iclass 39, count 0 2006.229.20:38:56.58#ibcon#about to read 6, iclass 39, count 0 2006.229.20:38:56.58#ibcon#read 6, iclass 39, count 0 2006.229.20:38:56.58#ibcon#end of sib2, iclass 39, count 0 2006.229.20:38:56.58#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:38:56.58#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:38:56.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:38:56.58#ibcon#*before write, iclass 39, count 0 2006.229.20:38:56.58#ibcon#enter sib2, iclass 39, count 0 2006.229.20:38:56.58#ibcon#flushed, iclass 39, count 0 2006.229.20:38:56.58#ibcon#about to write, iclass 39, count 0 2006.229.20:38:56.58#ibcon#wrote, iclass 39, count 0 2006.229.20:38:56.58#ibcon#about to read 3, iclass 39, count 0 2006.229.20:38:56.62#ibcon#read 3, iclass 39, count 0 2006.229.20:38:56.62#ibcon#about to read 4, iclass 39, count 0 2006.229.20:38:56.62#ibcon#read 4, iclass 39, count 0 2006.229.20:38:56.62#ibcon#about to read 5, iclass 39, count 0 2006.229.20:38:56.62#ibcon#read 5, iclass 39, count 0 2006.229.20:38:56.62#ibcon#about to read 6, iclass 39, count 0 2006.229.20:38:56.62#ibcon#read 6, iclass 39, count 0 2006.229.20:38:56.62#ibcon#end of sib2, iclass 39, count 0 2006.229.20:38:56.62#ibcon#*after write, iclass 39, count 0 2006.229.20:38:56.62#ibcon#*before return 0, iclass 39, count 0 2006.229.20:38:56.62#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:56.62#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:56.62#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:38:56.62#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:38:56.62$vck44/va=5,4 2006.229.20:38:56.62#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.20:38:56.62#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.20:38:56.62#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:56.62#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:56.68#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:56.68#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:56.68#ibcon#enter wrdev, iclass 3, count 2 2006.229.20:38:56.68#ibcon#first serial, iclass 3, count 2 2006.229.20:38:56.68#ibcon#enter sib2, iclass 3, count 2 2006.229.20:38:56.68#ibcon#flushed, iclass 3, count 2 2006.229.20:38:56.68#ibcon#about to write, iclass 3, count 2 2006.229.20:38:56.68#ibcon#wrote, iclass 3, count 2 2006.229.20:38:56.68#ibcon#about to read 3, iclass 3, count 2 2006.229.20:38:56.70#ibcon#read 3, iclass 3, count 2 2006.229.20:38:56.70#ibcon#about to read 4, iclass 3, count 2 2006.229.20:38:56.70#ibcon#read 4, iclass 3, count 2 2006.229.20:38:56.70#ibcon#about to read 5, iclass 3, count 2 2006.229.20:38:56.70#ibcon#read 5, iclass 3, count 2 2006.229.20:38:56.70#ibcon#about to read 6, iclass 3, count 2 2006.229.20:38:56.70#ibcon#read 6, iclass 3, count 2 2006.229.20:38:56.70#ibcon#end of sib2, iclass 3, count 2 2006.229.20:38:56.70#ibcon#*mode == 0, iclass 3, count 2 2006.229.20:38:56.70#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.20:38:56.70#ibcon#[25=AT05-04\r\n] 2006.229.20:38:56.70#ibcon#*before write, iclass 3, count 2 2006.229.20:38:56.70#ibcon#enter sib2, iclass 3, count 2 2006.229.20:38:56.70#ibcon#flushed, iclass 3, count 2 2006.229.20:38:56.70#ibcon#about to write, iclass 3, count 2 2006.229.20:38:56.70#ibcon#wrote, iclass 3, count 2 2006.229.20:38:56.70#ibcon#about to read 3, iclass 3, count 2 2006.229.20:38:56.73#ibcon#read 3, iclass 3, count 2 2006.229.20:38:56.73#ibcon#about to read 4, iclass 3, count 2 2006.229.20:38:56.73#ibcon#read 4, iclass 3, count 2 2006.229.20:38:56.73#ibcon#about to read 5, iclass 3, count 2 2006.229.20:38:56.73#ibcon#read 5, iclass 3, count 2 2006.229.20:38:56.73#ibcon#about to read 6, iclass 3, count 2 2006.229.20:38:56.73#ibcon#read 6, iclass 3, count 2 2006.229.20:38:56.73#ibcon#end of sib2, iclass 3, count 2 2006.229.20:38:56.73#ibcon#*after write, iclass 3, count 2 2006.229.20:38:56.73#ibcon#*before return 0, iclass 3, count 2 2006.229.20:38:56.73#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:56.73#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:56.73#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.20:38:56.73#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:56.73#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:56.85#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:56.85#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:56.85#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:38:56.85#ibcon#first serial, iclass 3, count 0 2006.229.20:38:56.85#ibcon#enter sib2, iclass 3, count 0 2006.229.20:38:56.85#ibcon#flushed, iclass 3, count 0 2006.229.20:38:56.85#ibcon#about to write, iclass 3, count 0 2006.229.20:38:56.85#ibcon#wrote, iclass 3, count 0 2006.229.20:38:56.85#ibcon#about to read 3, iclass 3, count 0 2006.229.20:38:56.87#ibcon#read 3, iclass 3, count 0 2006.229.20:38:56.87#ibcon#about to read 4, iclass 3, count 0 2006.229.20:38:56.87#ibcon#read 4, iclass 3, count 0 2006.229.20:38:56.87#ibcon#about to read 5, iclass 3, count 0 2006.229.20:38:56.87#ibcon#read 5, iclass 3, count 0 2006.229.20:38:56.87#ibcon#about to read 6, iclass 3, count 0 2006.229.20:38:56.87#ibcon#read 6, iclass 3, count 0 2006.229.20:38:56.87#ibcon#end of sib2, iclass 3, count 0 2006.229.20:38:56.87#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:38:56.87#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:38:56.87#ibcon#[25=USB\r\n] 2006.229.20:38:56.87#ibcon#*before write, iclass 3, count 0 2006.229.20:38:56.87#ibcon#enter sib2, iclass 3, count 0 2006.229.20:38:56.87#ibcon#flushed, iclass 3, count 0 2006.229.20:38:56.87#ibcon#about to write, iclass 3, count 0 2006.229.20:38:56.87#ibcon#wrote, iclass 3, count 0 2006.229.20:38:56.87#ibcon#about to read 3, iclass 3, count 0 2006.229.20:38:56.90#ibcon#read 3, iclass 3, count 0 2006.229.20:38:56.90#ibcon#about to read 4, iclass 3, count 0 2006.229.20:38:56.90#ibcon#read 4, iclass 3, count 0 2006.229.20:38:56.90#ibcon#about to read 5, iclass 3, count 0 2006.229.20:38:56.90#ibcon#read 5, iclass 3, count 0 2006.229.20:38:56.90#ibcon#about to read 6, iclass 3, count 0 2006.229.20:38:56.90#ibcon#read 6, iclass 3, count 0 2006.229.20:38:56.90#ibcon#end of sib2, iclass 3, count 0 2006.229.20:38:56.90#ibcon#*after write, iclass 3, count 0 2006.229.20:38:56.90#ibcon#*before return 0, iclass 3, count 0 2006.229.20:38:56.90#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:56.90#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:56.90#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:38:56.90#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:38:56.90$vck44/valo=6,814.99 2006.229.20:38:56.90#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.20:38:56.90#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.20:38:56.90#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:56.90#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:56.90#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:56.90#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:56.90#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:38:56.90#ibcon#first serial, iclass 5, count 0 2006.229.20:38:56.90#ibcon#enter sib2, iclass 5, count 0 2006.229.20:38:56.90#ibcon#flushed, iclass 5, count 0 2006.229.20:38:56.90#ibcon#about to write, iclass 5, count 0 2006.229.20:38:56.90#ibcon#wrote, iclass 5, count 0 2006.229.20:38:56.90#ibcon#about to read 3, iclass 5, count 0 2006.229.20:38:56.92#ibcon#read 3, iclass 5, count 0 2006.229.20:38:56.92#ibcon#about to read 4, iclass 5, count 0 2006.229.20:38:56.92#ibcon#read 4, iclass 5, count 0 2006.229.20:38:56.92#ibcon#about to read 5, iclass 5, count 0 2006.229.20:38:56.92#ibcon#read 5, iclass 5, count 0 2006.229.20:38:56.92#ibcon#about to read 6, iclass 5, count 0 2006.229.20:38:56.92#ibcon#read 6, iclass 5, count 0 2006.229.20:38:56.92#ibcon#end of sib2, iclass 5, count 0 2006.229.20:38:56.92#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:38:56.92#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:38:56.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:38:56.92#ibcon#*before write, iclass 5, count 0 2006.229.20:38:56.92#ibcon#enter sib2, iclass 5, count 0 2006.229.20:38:56.92#ibcon#flushed, iclass 5, count 0 2006.229.20:38:56.92#ibcon#about to write, iclass 5, count 0 2006.229.20:38:56.92#ibcon#wrote, iclass 5, count 0 2006.229.20:38:56.92#ibcon#about to read 3, iclass 5, count 0 2006.229.20:38:56.96#ibcon#read 3, iclass 5, count 0 2006.229.20:38:56.96#ibcon#about to read 4, iclass 5, count 0 2006.229.20:38:56.96#ibcon#read 4, iclass 5, count 0 2006.229.20:38:56.96#ibcon#about to read 5, iclass 5, count 0 2006.229.20:38:56.96#ibcon#read 5, iclass 5, count 0 2006.229.20:38:56.96#ibcon#about to read 6, iclass 5, count 0 2006.229.20:38:56.96#ibcon#read 6, iclass 5, count 0 2006.229.20:38:56.96#ibcon#end of sib2, iclass 5, count 0 2006.229.20:38:56.96#ibcon#*after write, iclass 5, count 0 2006.229.20:38:56.96#ibcon#*before return 0, iclass 5, count 0 2006.229.20:38:56.96#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:56.96#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:56.96#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:38:56.96#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:38:56.96$vck44/va=6,4 2006.229.20:38:56.96#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.20:38:56.96#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.20:38:56.96#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:56.96#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:38:57.02#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:38:57.02#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:38:57.02#ibcon#enter wrdev, iclass 7, count 2 2006.229.20:38:57.02#ibcon#first serial, iclass 7, count 2 2006.229.20:38:57.02#ibcon#enter sib2, iclass 7, count 2 2006.229.20:38:57.02#ibcon#flushed, iclass 7, count 2 2006.229.20:38:57.02#ibcon#about to write, iclass 7, count 2 2006.229.20:38:57.02#ibcon#wrote, iclass 7, count 2 2006.229.20:38:57.02#ibcon#about to read 3, iclass 7, count 2 2006.229.20:38:57.04#ibcon#read 3, iclass 7, count 2 2006.229.20:38:57.04#ibcon#about to read 4, iclass 7, count 2 2006.229.20:38:57.04#ibcon#read 4, iclass 7, count 2 2006.229.20:38:57.04#ibcon#about to read 5, iclass 7, count 2 2006.229.20:38:57.04#ibcon#read 5, iclass 7, count 2 2006.229.20:38:57.04#ibcon#about to read 6, iclass 7, count 2 2006.229.20:38:57.04#ibcon#read 6, iclass 7, count 2 2006.229.20:38:57.04#ibcon#end of sib2, iclass 7, count 2 2006.229.20:38:57.04#ibcon#*mode == 0, iclass 7, count 2 2006.229.20:38:57.04#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.20:38:57.04#ibcon#[25=AT06-04\r\n] 2006.229.20:38:57.04#ibcon#*before write, iclass 7, count 2 2006.229.20:38:57.04#ibcon#enter sib2, iclass 7, count 2 2006.229.20:38:57.04#ibcon#flushed, iclass 7, count 2 2006.229.20:38:57.04#ibcon#about to write, iclass 7, count 2 2006.229.20:38:57.04#ibcon#wrote, iclass 7, count 2 2006.229.20:38:57.04#ibcon#about to read 3, iclass 7, count 2 2006.229.20:38:57.07#ibcon#read 3, iclass 7, count 2 2006.229.20:38:57.07#ibcon#about to read 4, iclass 7, count 2 2006.229.20:38:57.07#ibcon#read 4, iclass 7, count 2 2006.229.20:38:57.07#ibcon#about to read 5, iclass 7, count 2 2006.229.20:38:57.07#ibcon#read 5, iclass 7, count 2 2006.229.20:38:57.07#ibcon#about to read 6, iclass 7, count 2 2006.229.20:38:57.07#ibcon#read 6, iclass 7, count 2 2006.229.20:38:57.07#ibcon#end of sib2, iclass 7, count 2 2006.229.20:38:57.07#ibcon#*after write, iclass 7, count 2 2006.229.20:38:57.07#ibcon#*before return 0, iclass 7, count 2 2006.229.20:38:57.07#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:38:57.07#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:38:57.07#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.20:38:57.07#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:57.07#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:38:57.19#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:38:57.19#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:38:57.19#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:38:57.19#ibcon#first serial, iclass 7, count 0 2006.229.20:38:57.19#ibcon#enter sib2, iclass 7, count 0 2006.229.20:38:57.19#ibcon#flushed, iclass 7, count 0 2006.229.20:38:57.19#ibcon#about to write, iclass 7, count 0 2006.229.20:38:57.19#ibcon#wrote, iclass 7, count 0 2006.229.20:38:57.19#ibcon#about to read 3, iclass 7, count 0 2006.229.20:38:57.21#ibcon#read 3, iclass 7, count 0 2006.229.20:38:57.21#ibcon#about to read 4, iclass 7, count 0 2006.229.20:38:57.21#ibcon#read 4, iclass 7, count 0 2006.229.20:38:57.21#ibcon#about to read 5, iclass 7, count 0 2006.229.20:38:57.21#ibcon#read 5, iclass 7, count 0 2006.229.20:38:57.21#ibcon#about to read 6, iclass 7, count 0 2006.229.20:38:57.21#ibcon#read 6, iclass 7, count 0 2006.229.20:38:57.21#ibcon#end of sib2, iclass 7, count 0 2006.229.20:38:57.21#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:38:57.21#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:38:57.21#ibcon#[25=USB\r\n] 2006.229.20:38:57.21#ibcon#*before write, iclass 7, count 0 2006.229.20:38:57.21#ibcon#enter sib2, iclass 7, count 0 2006.229.20:38:57.21#ibcon#flushed, iclass 7, count 0 2006.229.20:38:57.21#ibcon#about to write, iclass 7, count 0 2006.229.20:38:57.21#ibcon#wrote, iclass 7, count 0 2006.229.20:38:57.21#ibcon#about to read 3, iclass 7, count 0 2006.229.20:38:57.24#ibcon#read 3, iclass 7, count 0 2006.229.20:38:57.24#ibcon#about to read 4, iclass 7, count 0 2006.229.20:38:57.24#ibcon#read 4, iclass 7, count 0 2006.229.20:38:57.24#ibcon#about to read 5, iclass 7, count 0 2006.229.20:38:57.24#ibcon#read 5, iclass 7, count 0 2006.229.20:38:57.24#ibcon#about to read 6, iclass 7, count 0 2006.229.20:38:57.24#ibcon#read 6, iclass 7, count 0 2006.229.20:38:57.24#ibcon#end of sib2, iclass 7, count 0 2006.229.20:38:57.24#ibcon#*after write, iclass 7, count 0 2006.229.20:38:57.24#ibcon#*before return 0, iclass 7, count 0 2006.229.20:38:57.24#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:38:57.24#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:38:57.24#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:38:57.24#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:38:57.24$vck44/valo=7,864.99 2006.229.20:38:57.24#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.20:38:57.24#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.20:38:57.24#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:57.24#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:38:57.24#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:38:57.24#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:38:57.24#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:38:57.24#ibcon#first serial, iclass 11, count 0 2006.229.20:38:57.24#ibcon#enter sib2, iclass 11, count 0 2006.229.20:38:57.24#ibcon#flushed, iclass 11, count 0 2006.229.20:38:57.24#ibcon#about to write, iclass 11, count 0 2006.229.20:38:57.24#ibcon#wrote, iclass 11, count 0 2006.229.20:38:57.24#ibcon#about to read 3, iclass 11, count 0 2006.229.20:38:57.26#ibcon#read 3, iclass 11, count 0 2006.229.20:38:57.26#ibcon#about to read 4, iclass 11, count 0 2006.229.20:38:57.26#ibcon#read 4, iclass 11, count 0 2006.229.20:38:57.26#ibcon#about to read 5, iclass 11, count 0 2006.229.20:38:57.26#ibcon#read 5, iclass 11, count 0 2006.229.20:38:57.26#ibcon#about to read 6, iclass 11, count 0 2006.229.20:38:57.26#ibcon#read 6, iclass 11, count 0 2006.229.20:38:57.26#ibcon#end of sib2, iclass 11, count 0 2006.229.20:38:57.26#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:38:57.26#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:38:57.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:38:57.26#ibcon#*before write, iclass 11, count 0 2006.229.20:38:57.26#ibcon#enter sib2, iclass 11, count 0 2006.229.20:38:57.26#ibcon#flushed, iclass 11, count 0 2006.229.20:38:57.26#ibcon#about to write, iclass 11, count 0 2006.229.20:38:57.26#ibcon#wrote, iclass 11, count 0 2006.229.20:38:57.26#ibcon#about to read 3, iclass 11, count 0 2006.229.20:38:57.30#ibcon#read 3, iclass 11, count 0 2006.229.20:38:57.30#ibcon#about to read 4, iclass 11, count 0 2006.229.20:38:57.30#ibcon#read 4, iclass 11, count 0 2006.229.20:38:57.30#ibcon#about to read 5, iclass 11, count 0 2006.229.20:38:57.30#ibcon#read 5, iclass 11, count 0 2006.229.20:38:57.30#ibcon#about to read 6, iclass 11, count 0 2006.229.20:38:57.30#ibcon#read 6, iclass 11, count 0 2006.229.20:38:57.30#ibcon#end of sib2, iclass 11, count 0 2006.229.20:38:57.30#ibcon#*after write, iclass 11, count 0 2006.229.20:38:57.30#ibcon#*before return 0, iclass 11, count 0 2006.229.20:38:57.30#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:38:57.30#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:38:57.30#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:38:57.30#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:38:57.30$vck44/va=7,5 2006.229.20:38:57.30#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.20:38:57.30#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.20:38:57.30#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:57.30#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:38:57.36#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:38:57.36#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:38:57.36#ibcon#enter wrdev, iclass 13, count 2 2006.229.20:38:57.36#ibcon#first serial, iclass 13, count 2 2006.229.20:38:57.36#ibcon#enter sib2, iclass 13, count 2 2006.229.20:38:57.36#ibcon#flushed, iclass 13, count 2 2006.229.20:38:57.36#ibcon#about to write, iclass 13, count 2 2006.229.20:38:57.36#ibcon#wrote, iclass 13, count 2 2006.229.20:38:57.36#ibcon#about to read 3, iclass 13, count 2 2006.229.20:38:57.38#ibcon#read 3, iclass 13, count 2 2006.229.20:38:57.38#ibcon#about to read 4, iclass 13, count 2 2006.229.20:38:57.38#ibcon#read 4, iclass 13, count 2 2006.229.20:38:57.38#ibcon#about to read 5, iclass 13, count 2 2006.229.20:38:57.38#ibcon#read 5, iclass 13, count 2 2006.229.20:38:57.38#ibcon#about to read 6, iclass 13, count 2 2006.229.20:38:57.38#ibcon#read 6, iclass 13, count 2 2006.229.20:38:57.38#ibcon#end of sib2, iclass 13, count 2 2006.229.20:38:57.38#ibcon#*mode == 0, iclass 13, count 2 2006.229.20:38:57.38#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.20:38:57.38#ibcon#[25=AT07-05\r\n] 2006.229.20:38:57.38#ibcon#*before write, iclass 13, count 2 2006.229.20:38:57.38#ibcon#enter sib2, iclass 13, count 2 2006.229.20:38:57.38#ibcon#flushed, iclass 13, count 2 2006.229.20:38:57.38#ibcon#about to write, iclass 13, count 2 2006.229.20:38:57.38#ibcon#wrote, iclass 13, count 2 2006.229.20:38:57.38#ibcon#about to read 3, iclass 13, count 2 2006.229.20:38:57.41#ibcon#read 3, iclass 13, count 2 2006.229.20:38:57.41#ibcon#about to read 4, iclass 13, count 2 2006.229.20:38:57.41#ibcon#read 4, iclass 13, count 2 2006.229.20:38:57.41#ibcon#about to read 5, iclass 13, count 2 2006.229.20:38:57.41#ibcon#read 5, iclass 13, count 2 2006.229.20:38:57.41#ibcon#about to read 6, iclass 13, count 2 2006.229.20:38:57.41#ibcon#read 6, iclass 13, count 2 2006.229.20:38:57.41#ibcon#end of sib2, iclass 13, count 2 2006.229.20:38:57.41#ibcon#*after write, iclass 13, count 2 2006.229.20:38:57.41#ibcon#*before return 0, iclass 13, count 2 2006.229.20:38:57.41#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:38:57.41#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:38:57.41#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.20:38:57.41#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:57.41#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:38:57.53#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:38:57.53#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:38:57.53#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:38:57.53#ibcon#first serial, iclass 13, count 0 2006.229.20:38:57.53#ibcon#enter sib2, iclass 13, count 0 2006.229.20:38:57.53#ibcon#flushed, iclass 13, count 0 2006.229.20:38:57.53#ibcon#about to write, iclass 13, count 0 2006.229.20:38:57.53#ibcon#wrote, iclass 13, count 0 2006.229.20:38:57.53#ibcon#about to read 3, iclass 13, count 0 2006.229.20:38:57.55#ibcon#read 3, iclass 13, count 0 2006.229.20:38:57.55#ibcon#about to read 4, iclass 13, count 0 2006.229.20:38:57.55#ibcon#read 4, iclass 13, count 0 2006.229.20:38:57.55#ibcon#about to read 5, iclass 13, count 0 2006.229.20:38:57.55#ibcon#read 5, iclass 13, count 0 2006.229.20:38:57.55#ibcon#about to read 6, iclass 13, count 0 2006.229.20:38:57.55#ibcon#read 6, iclass 13, count 0 2006.229.20:38:57.55#ibcon#end of sib2, iclass 13, count 0 2006.229.20:38:57.55#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:38:57.55#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:38:57.55#ibcon#[25=USB\r\n] 2006.229.20:38:57.55#ibcon#*before write, iclass 13, count 0 2006.229.20:38:57.55#ibcon#enter sib2, iclass 13, count 0 2006.229.20:38:57.55#ibcon#flushed, iclass 13, count 0 2006.229.20:38:57.55#ibcon#about to write, iclass 13, count 0 2006.229.20:38:57.55#ibcon#wrote, iclass 13, count 0 2006.229.20:38:57.55#ibcon#about to read 3, iclass 13, count 0 2006.229.20:38:57.58#ibcon#read 3, iclass 13, count 0 2006.229.20:38:57.58#ibcon#about to read 4, iclass 13, count 0 2006.229.20:38:57.58#ibcon#read 4, iclass 13, count 0 2006.229.20:38:57.58#ibcon#about to read 5, iclass 13, count 0 2006.229.20:38:57.58#ibcon#read 5, iclass 13, count 0 2006.229.20:38:57.58#ibcon#about to read 6, iclass 13, count 0 2006.229.20:38:57.58#ibcon#read 6, iclass 13, count 0 2006.229.20:38:57.58#ibcon#end of sib2, iclass 13, count 0 2006.229.20:38:57.58#ibcon#*after write, iclass 13, count 0 2006.229.20:38:57.58#ibcon#*before return 0, iclass 13, count 0 2006.229.20:38:57.58#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:38:57.58#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:38:57.58#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:38:57.58#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:38:57.58$vck44/valo=8,884.99 2006.229.20:38:57.58#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.20:38:57.58#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.20:38:57.58#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:57.58#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:38:57.58#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:38:57.58#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:38:57.58#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:38:57.58#ibcon#first serial, iclass 15, count 0 2006.229.20:38:57.58#ibcon#enter sib2, iclass 15, count 0 2006.229.20:38:57.58#ibcon#flushed, iclass 15, count 0 2006.229.20:38:57.58#ibcon#about to write, iclass 15, count 0 2006.229.20:38:57.58#ibcon#wrote, iclass 15, count 0 2006.229.20:38:57.58#ibcon#about to read 3, iclass 15, count 0 2006.229.20:38:57.60#ibcon#read 3, iclass 15, count 0 2006.229.20:38:57.60#ibcon#about to read 4, iclass 15, count 0 2006.229.20:38:57.60#ibcon#read 4, iclass 15, count 0 2006.229.20:38:57.60#ibcon#about to read 5, iclass 15, count 0 2006.229.20:38:57.60#ibcon#read 5, iclass 15, count 0 2006.229.20:38:57.60#ibcon#about to read 6, iclass 15, count 0 2006.229.20:38:57.60#ibcon#read 6, iclass 15, count 0 2006.229.20:38:57.60#ibcon#end of sib2, iclass 15, count 0 2006.229.20:38:57.60#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:38:57.60#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:38:57.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:38:57.60#ibcon#*before write, iclass 15, count 0 2006.229.20:38:57.60#ibcon#enter sib2, iclass 15, count 0 2006.229.20:38:57.60#ibcon#flushed, iclass 15, count 0 2006.229.20:38:57.60#ibcon#about to write, iclass 15, count 0 2006.229.20:38:57.60#ibcon#wrote, iclass 15, count 0 2006.229.20:38:57.60#ibcon#about to read 3, iclass 15, count 0 2006.229.20:38:57.64#ibcon#read 3, iclass 15, count 0 2006.229.20:38:57.64#ibcon#about to read 4, iclass 15, count 0 2006.229.20:38:57.64#ibcon#read 4, iclass 15, count 0 2006.229.20:38:57.64#ibcon#about to read 5, iclass 15, count 0 2006.229.20:38:57.64#ibcon#read 5, iclass 15, count 0 2006.229.20:38:57.64#ibcon#about to read 6, iclass 15, count 0 2006.229.20:38:57.64#ibcon#read 6, iclass 15, count 0 2006.229.20:38:57.64#ibcon#end of sib2, iclass 15, count 0 2006.229.20:38:57.64#ibcon#*after write, iclass 15, count 0 2006.229.20:38:57.64#ibcon#*before return 0, iclass 15, count 0 2006.229.20:38:57.64#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:38:57.64#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:38:57.64#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:38:57.64#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:38:57.64$vck44/va=8,6 2006.229.20:38:57.64#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.20:38:57.64#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.20:38:57.64#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:57.64#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:38:57.70#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:38:57.70#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:38:57.70#ibcon#enter wrdev, iclass 17, count 2 2006.229.20:38:57.70#ibcon#first serial, iclass 17, count 2 2006.229.20:38:57.70#ibcon#enter sib2, iclass 17, count 2 2006.229.20:38:57.70#ibcon#flushed, iclass 17, count 2 2006.229.20:38:57.70#ibcon#about to write, iclass 17, count 2 2006.229.20:38:57.70#ibcon#wrote, iclass 17, count 2 2006.229.20:38:57.70#ibcon#about to read 3, iclass 17, count 2 2006.229.20:38:57.72#ibcon#read 3, iclass 17, count 2 2006.229.20:38:57.72#ibcon#about to read 4, iclass 17, count 2 2006.229.20:38:57.72#ibcon#read 4, iclass 17, count 2 2006.229.20:38:57.72#ibcon#about to read 5, iclass 17, count 2 2006.229.20:38:57.72#ibcon#read 5, iclass 17, count 2 2006.229.20:38:57.72#ibcon#about to read 6, iclass 17, count 2 2006.229.20:38:57.72#ibcon#read 6, iclass 17, count 2 2006.229.20:38:57.72#ibcon#end of sib2, iclass 17, count 2 2006.229.20:38:57.72#ibcon#*mode == 0, iclass 17, count 2 2006.229.20:38:57.72#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.20:38:57.72#ibcon#[25=AT08-06\r\n] 2006.229.20:38:57.72#ibcon#*before write, iclass 17, count 2 2006.229.20:38:57.72#ibcon#enter sib2, iclass 17, count 2 2006.229.20:38:57.72#ibcon#flushed, iclass 17, count 2 2006.229.20:38:57.72#ibcon#about to write, iclass 17, count 2 2006.229.20:38:57.72#ibcon#wrote, iclass 17, count 2 2006.229.20:38:57.72#ibcon#about to read 3, iclass 17, count 2 2006.229.20:38:57.75#ibcon#read 3, iclass 17, count 2 2006.229.20:38:57.75#ibcon#about to read 4, iclass 17, count 2 2006.229.20:38:57.75#ibcon#read 4, iclass 17, count 2 2006.229.20:38:57.75#ibcon#about to read 5, iclass 17, count 2 2006.229.20:38:57.75#ibcon#read 5, iclass 17, count 2 2006.229.20:38:57.75#ibcon#about to read 6, iclass 17, count 2 2006.229.20:38:57.75#ibcon#read 6, iclass 17, count 2 2006.229.20:38:57.75#ibcon#end of sib2, iclass 17, count 2 2006.229.20:38:57.75#ibcon#*after write, iclass 17, count 2 2006.229.20:38:57.75#ibcon#*before return 0, iclass 17, count 2 2006.229.20:38:57.75#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:38:57.75#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.20:38:57.75#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.20:38:57.75#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:57.75#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:38:57.87#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:38:57.87#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:38:57.87#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:38:57.87#ibcon#first serial, iclass 17, count 0 2006.229.20:38:57.87#ibcon#enter sib2, iclass 17, count 0 2006.229.20:38:57.87#ibcon#flushed, iclass 17, count 0 2006.229.20:38:57.87#ibcon#about to write, iclass 17, count 0 2006.229.20:38:57.87#ibcon#wrote, iclass 17, count 0 2006.229.20:38:57.87#ibcon#about to read 3, iclass 17, count 0 2006.229.20:38:57.89#ibcon#read 3, iclass 17, count 0 2006.229.20:38:57.89#ibcon#about to read 4, iclass 17, count 0 2006.229.20:38:57.89#ibcon#read 4, iclass 17, count 0 2006.229.20:38:57.89#ibcon#about to read 5, iclass 17, count 0 2006.229.20:38:57.89#ibcon#read 5, iclass 17, count 0 2006.229.20:38:57.89#ibcon#about to read 6, iclass 17, count 0 2006.229.20:38:57.89#ibcon#read 6, iclass 17, count 0 2006.229.20:38:57.89#ibcon#end of sib2, iclass 17, count 0 2006.229.20:38:57.89#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:38:57.89#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:38:57.89#ibcon#[25=USB\r\n] 2006.229.20:38:57.89#ibcon#*before write, iclass 17, count 0 2006.229.20:38:57.89#ibcon#enter sib2, iclass 17, count 0 2006.229.20:38:57.89#ibcon#flushed, iclass 17, count 0 2006.229.20:38:57.89#ibcon#about to write, iclass 17, count 0 2006.229.20:38:57.89#ibcon#wrote, iclass 17, count 0 2006.229.20:38:57.89#ibcon#about to read 3, iclass 17, count 0 2006.229.20:38:57.92#ibcon#read 3, iclass 17, count 0 2006.229.20:38:57.92#ibcon#about to read 4, iclass 17, count 0 2006.229.20:38:57.92#ibcon#read 4, iclass 17, count 0 2006.229.20:38:57.92#ibcon#about to read 5, iclass 17, count 0 2006.229.20:38:57.92#ibcon#read 5, iclass 17, count 0 2006.229.20:38:57.92#ibcon#about to read 6, iclass 17, count 0 2006.229.20:38:57.92#ibcon#read 6, iclass 17, count 0 2006.229.20:38:57.92#ibcon#end of sib2, iclass 17, count 0 2006.229.20:38:57.92#ibcon#*after write, iclass 17, count 0 2006.229.20:38:57.92#ibcon#*before return 0, iclass 17, count 0 2006.229.20:38:57.92#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:38:57.92#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.20:38:57.92#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:38:57.92#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:38:57.92$vck44/vblo=1,629.99 2006.229.20:38:57.92#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.20:38:57.92#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.20:38:57.92#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:57.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:38:57.92#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:38:57.92#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:38:57.92#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:38:57.92#ibcon#first serial, iclass 19, count 0 2006.229.20:38:57.92#ibcon#enter sib2, iclass 19, count 0 2006.229.20:38:57.92#ibcon#flushed, iclass 19, count 0 2006.229.20:38:57.92#ibcon#about to write, iclass 19, count 0 2006.229.20:38:57.92#ibcon#wrote, iclass 19, count 0 2006.229.20:38:57.92#ibcon#about to read 3, iclass 19, count 0 2006.229.20:38:57.94#ibcon#read 3, iclass 19, count 0 2006.229.20:38:57.94#ibcon#about to read 4, iclass 19, count 0 2006.229.20:38:57.94#ibcon#read 4, iclass 19, count 0 2006.229.20:38:57.94#ibcon#about to read 5, iclass 19, count 0 2006.229.20:38:57.94#ibcon#read 5, iclass 19, count 0 2006.229.20:38:57.94#ibcon#about to read 6, iclass 19, count 0 2006.229.20:38:57.94#ibcon#read 6, iclass 19, count 0 2006.229.20:38:57.94#ibcon#end of sib2, iclass 19, count 0 2006.229.20:38:57.94#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:38:57.94#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:38:57.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:38:57.94#ibcon#*before write, iclass 19, count 0 2006.229.20:38:57.94#ibcon#enter sib2, iclass 19, count 0 2006.229.20:38:57.94#ibcon#flushed, iclass 19, count 0 2006.229.20:38:57.94#ibcon#about to write, iclass 19, count 0 2006.229.20:38:57.94#ibcon#wrote, iclass 19, count 0 2006.229.20:38:57.94#ibcon#about to read 3, iclass 19, count 0 2006.229.20:38:57.98#ibcon#read 3, iclass 19, count 0 2006.229.20:38:57.98#ibcon#about to read 4, iclass 19, count 0 2006.229.20:38:57.98#ibcon#read 4, iclass 19, count 0 2006.229.20:38:57.98#ibcon#about to read 5, iclass 19, count 0 2006.229.20:38:57.98#ibcon#read 5, iclass 19, count 0 2006.229.20:38:57.98#ibcon#about to read 6, iclass 19, count 0 2006.229.20:38:57.98#ibcon#read 6, iclass 19, count 0 2006.229.20:38:57.98#ibcon#end of sib2, iclass 19, count 0 2006.229.20:38:57.98#ibcon#*after write, iclass 19, count 0 2006.229.20:38:57.98#ibcon#*before return 0, iclass 19, count 0 2006.229.20:38:57.98#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:38:57.98#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.20:38:57.98#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:38:57.98#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:38:57.98$vck44/vb=1,4 2006.229.20:38:57.98#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.20:38:57.98#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.20:38:57.98#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:57.98#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:38:57.98#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:38:57.98#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:38:57.98#ibcon#enter wrdev, iclass 21, count 2 2006.229.20:38:57.98#ibcon#first serial, iclass 21, count 2 2006.229.20:38:57.98#ibcon#enter sib2, iclass 21, count 2 2006.229.20:38:57.98#ibcon#flushed, iclass 21, count 2 2006.229.20:38:57.98#ibcon#about to write, iclass 21, count 2 2006.229.20:38:57.98#ibcon#wrote, iclass 21, count 2 2006.229.20:38:57.98#ibcon#about to read 3, iclass 21, count 2 2006.229.20:38:58.00#ibcon#read 3, iclass 21, count 2 2006.229.20:38:58.00#ibcon#about to read 4, iclass 21, count 2 2006.229.20:38:58.00#ibcon#read 4, iclass 21, count 2 2006.229.20:38:58.00#ibcon#about to read 5, iclass 21, count 2 2006.229.20:38:58.00#ibcon#read 5, iclass 21, count 2 2006.229.20:38:58.00#ibcon#about to read 6, iclass 21, count 2 2006.229.20:38:58.00#ibcon#read 6, iclass 21, count 2 2006.229.20:38:58.00#ibcon#end of sib2, iclass 21, count 2 2006.229.20:38:58.00#ibcon#*mode == 0, iclass 21, count 2 2006.229.20:38:58.00#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.20:38:58.00#ibcon#[27=AT01-04\r\n] 2006.229.20:38:58.00#ibcon#*before write, iclass 21, count 2 2006.229.20:38:58.00#ibcon#enter sib2, iclass 21, count 2 2006.229.20:38:58.00#ibcon#flushed, iclass 21, count 2 2006.229.20:38:58.00#ibcon#about to write, iclass 21, count 2 2006.229.20:38:58.00#ibcon#wrote, iclass 21, count 2 2006.229.20:38:58.00#ibcon#about to read 3, iclass 21, count 2 2006.229.20:38:58.03#ibcon#read 3, iclass 21, count 2 2006.229.20:38:58.03#ibcon#about to read 4, iclass 21, count 2 2006.229.20:38:58.03#ibcon#read 4, iclass 21, count 2 2006.229.20:38:58.03#ibcon#about to read 5, iclass 21, count 2 2006.229.20:38:58.03#ibcon#read 5, iclass 21, count 2 2006.229.20:38:58.03#ibcon#about to read 6, iclass 21, count 2 2006.229.20:38:58.03#ibcon#read 6, iclass 21, count 2 2006.229.20:38:58.03#ibcon#end of sib2, iclass 21, count 2 2006.229.20:38:58.03#ibcon#*after write, iclass 21, count 2 2006.229.20:38:58.03#ibcon#*before return 0, iclass 21, count 2 2006.229.20:38:58.03#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:38:58.03#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.20:38:58.03#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.20:38:58.03#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:58.03#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:38:58.15#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:38:58.15#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:38:58.15#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:38:58.15#ibcon#first serial, iclass 21, count 0 2006.229.20:38:58.15#ibcon#enter sib2, iclass 21, count 0 2006.229.20:38:58.15#ibcon#flushed, iclass 21, count 0 2006.229.20:38:58.15#ibcon#about to write, iclass 21, count 0 2006.229.20:38:58.15#ibcon#wrote, iclass 21, count 0 2006.229.20:38:58.15#ibcon#about to read 3, iclass 21, count 0 2006.229.20:38:58.17#ibcon#read 3, iclass 21, count 0 2006.229.20:38:58.17#ibcon#about to read 4, iclass 21, count 0 2006.229.20:38:58.17#ibcon#read 4, iclass 21, count 0 2006.229.20:38:58.17#ibcon#about to read 5, iclass 21, count 0 2006.229.20:38:58.17#ibcon#read 5, iclass 21, count 0 2006.229.20:38:58.17#ibcon#about to read 6, iclass 21, count 0 2006.229.20:38:58.17#ibcon#read 6, iclass 21, count 0 2006.229.20:38:58.17#ibcon#end of sib2, iclass 21, count 0 2006.229.20:38:58.17#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:38:58.17#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:38:58.17#ibcon#[27=USB\r\n] 2006.229.20:38:58.17#ibcon#*before write, iclass 21, count 0 2006.229.20:38:58.17#ibcon#enter sib2, iclass 21, count 0 2006.229.20:38:58.17#ibcon#flushed, iclass 21, count 0 2006.229.20:38:58.17#ibcon#about to write, iclass 21, count 0 2006.229.20:38:58.17#ibcon#wrote, iclass 21, count 0 2006.229.20:38:58.17#ibcon#about to read 3, iclass 21, count 0 2006.229.20:38:58.20#ibcon#read 3, iclass 21, count 0 2006.229.20:38:58.20#ibcon#about to read 4, iclass 21, count 0 2006.229.20:38:58.20#ibcon#read 4, iclass 21, count 0 2006.229.20:38:58.20#ibcon#about to read 5, iclass 21, count 0 2006.229.20:38:58.20#ibcon#read 5, iclass 21, count 0 2006.229.20:38:58.20#ibcon#about to read 6, iclass 21, count 0 2006.229.20:38:58.20#ibcon#read 6, iclass 21, count 0 2006.229.20:38:58.20#ibcon#end of sib2, iclass 21, count 0 2006.229.20:38:58.20#ibcon#*after write, iclass 21, count 0 2006.229.20:38:58.20#ibcon#*before return 0, iclass 21, count 0 2006.229.20:38:58.20#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:38:58.20#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.20:38:58.20#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:38:58.20#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:38:58.20$vck44/vblo=2,634.99 2006.229.20:38:58.20#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.20:38:58.20#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.20:38:58.20#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:58.20#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:58.20#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:58.20#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:58.20#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:38:58.20#ibcon#first serial, iclass 23, count 0 2006.229.20:38:58.20#ibcon#enter sib2, iclass 23, count 0 2006.229.20:38:58.20#ibcon#flushed, iclass 23, count 0 2006.229.20:38:58.20#ibcon#about to write, iclass 23, count 0 2006.229.20:38:58.20#ibcon#wrote, iclass 23, count 0 2006.229.20:38:58.20#ibcon#about to read 3, iclass 23, count 0 2006.229.20:38:58.22#ibcon#read 3, iclass 23, count 0 2006.229.20:38:58.22#ibcon#about to read 4, iclass 23, count 0 2006.229.20:38:58.22#ibcon#read 4, iclass 23, count 0 2006.229.20:38:58.22#ibcon#about to read 5, iclass 23, count 0 2006.229.20:38:58.22#ibcon#read 5, iclass 23, count 0 2006.229.20:38:58.22#ibcon#about to read 6, iclass 23, count 0 2006.229.20:38:58.22#ibcon#read 6, iclass 23, count 0 2006.229.20:38:58.22#ibcon#end of sib2, iclass 23, count 0 2006.229.20:38:58.22#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:38:58.22#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:38:58.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:38:58.22#ibcon#*before write, iclass 23, count 0 2006.229.20:38:58.22#ibcon#enter sib2, iclass 23, count 0 2006.229.20:38:58.22#ibcon#flushed, iclass 23, count 0 2006.229.20:38:58.22#ibcon#about to write, iclass 23, count 0 2006.229.20:38:58.22#ibcon#wrote, iclass 23, count 0 2006.229.20:38:58.22#ibcon#about to read 3, iclass 23, count 0 2006.229.20:38:58.26#ibcon#read 3, iclass 23, count 0 2006.229.20:38:58.26#ibcon#about to read 4, iclass 23, count 0 2006.229.20:38:58.26#ibcon#read 4, iclass 23, count 0 2006.229.20:38:58.26#ibcon#about to read 5, iclass 23, count 0 2006.229.20:38:58.26#ibcon#read 5, iclass 23, count 0 2006.229.20:38:58.26#ibcon#about to read 6, iclass 23, count 0 2006.229.20:38:58.26#ibcon#read 6, iclass 23, count 0 2006.229.20:38:58.26#ibcon#end of sib2, iclass 23, count 0 2006.229.20:38:58.26#ibcon#*after write, iclass 23, count 0 2006.229.20:38:58.26#ibcon#*before return 0, iclass 23, count 0 2006.229.20:38:58.26#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:58.26#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.20:38:58.26#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:38:58.26#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:38:58.26$vck44/vb=2,4 2006.229.20:38:58.26#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.20:38:58.26#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.20:38:58.26#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:58.26#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:58.32#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:58.32#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:58.32#ibcon#enter wrdev, iclass 25, count 2 2006.229.20:38:58.32#ibcon#first serial, iclass 25, count 2 2006.229.20:38:58.32#ibcon#enter sib2, iclass 25, count 2 2006.229.20:38:58.32#ibcon#flushed, iclass 25, count 2 2006.229.20:38:58.32#ibcon#about to write, iclass 25, count 2 2006.229.20:38:58.32#ibcon#wrote, iclass 25, count 2 2006.229.20:38:58.32#ibcon#about to read 3, iclass 25, count 2 2006.229.20:38:58.34#ibcon#read 3, iclass 25, count 2 2006.229.20:38:58.34#ibcon#about to read 4, iclass 25, count 2 2006.229.20:38:58.34#ibcon#read 4, iclass 25, count 2 2006.229.20:38:58.34#ibcon#about to read 5, iclass 25, count 2 2006.229.20:38:58.34#ibcon#read 5, iclass 25, count 2 2006.229.20:38:58.34#ibcon#about to read 6, iclass 25, count 2 2006.229.20:38:58.34#ibcon#read 6, iclass 25, count 2 2006.229.20:38:58.34#ibcon#end of sib2, iclass 25, count 2 2006.229.20:38:58.34#ibcon#*mode == 0, iclass 25, count 2 2006.229.20:38:58.34#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.20:38:58.34#ibcon#[27=AT02-04\r\n] 2006.229.20:38:58.34#ibcon#*before write, iclass 25, count 2 2006.229.20:38:58.34#ibcon#enter sib2, iclass 25, count 2 2006.229.20:38:58.34#ibcon#flushed, iclass 25, count 2 2006.229.20:38:58.34#ibcon#about to write, iclass 25, count 2 2006.229.20:38:58.34#ibcon#wrote, iclass 25, count 2 2006.229.20:38:58.34#ibcon#about to read 3, iclass 25, count 2 2006.229.20:38:58.37#ibcon#read 3, iclass 25, count 2 2006.229.20:38:58.37#ibcon#about to read 4, iclass 25, count 2 2006.229.20:38:58.37#ibcon#read 4, iclass 25, count 2 2006.229.20:38:58.37#ibcon#about to read 5, iclass 25, count 2 2006.229.20:38:58.37#ibcon#read 5, iclass 25, count 2 2006.229.20:38:58.37#ibcon#about to read 6, iclass 25, count 2 2006.229.20:38:58.37#ibcon#read 6, iclass 25, count 2 2006.229.20:38:58.37#ibcon#end of sib2, iclass 25, count 2 2006.229.20:38:58.37#ibcon#*after write, iclass 25, count 2 2006.229.20:38:58.37#ibcon#*before return 0, iclass 25, count 2 2006.229.20:38:58.37#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:58.37#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.20:38:58.37#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.20:38:58.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:58.37#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:58.49#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:58.49#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:58.49#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:38:58.49#ibcon#first serial, iclass 25, count 0 2006.229.20:38:58.49#ibcon#enter sib2, iclass 25, count 0 2006.229.20:38:58.49#ibcon#flushed, iclass 25, count 0 2006.229.20:38:58.49#ibcon#about to write, iclass 25, count 0 2006.229.20:38:58.49#ibcon#wrote, iclass 25, count 0 2006.229.20:38:58.49#ibcon#about to read 3, iclass 25, count 0 2006.229.20:38:58.51#ibcon#read 3, iclass 25, count 0 2006.229.20:38:58.51#ibcon#about to read 4, iclass 25, count 0 2006.229.20:38:58.51#ibcon#read 4, iclass 25, count 0 2006.229.20:38:58.51#ibcon#about to read 5, iclass 25, count 0 2006.229.20:38:58.51#ibcon#read 5, iclass 25, count 0 2006.229.20:38:58.51#ibcon#about to read 6, iclass 25, count 0 2006.229.20:38:58.51#ibcon#read 6, iclass 25, count 0 2006.229.20:38:58.51#ibcon#end of sib2, iclass 25, count 0 2006.229.20:38:58.51#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:38:58.51#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:38:58.51#ibcon#[27=USB\r\n] 2006.229.20:38:58.51#ibcon#*before write, iclass 25, count 0 2006.229.20:38:58.51#ibcon#enter sib2, iclass 25, count 0 2006.229.20:38:58.51#ibcon#flushed, iclass 25, count 0 2006.229.20:38:58.51#ibcon#about to write, iclass 25, count 0 2006.229.20:38:58.51#ibcon#wrote, iclass 25, count 0 2006.229.20:38:58.51#ibcon#about to read 3, iclass 25, count 0 2006.229.20:38:58.54#ibcon#read 3, iclass 25, count 0 2006.229.20:38:58.54#ibcon#about to read 4, iclass 25, count 0 2006.229.20:38:58.54#ibcon#read 4, iclass 25, count 0 2006.229.20:38:58.54#ibcon#about to read 5, iclass 25, count 0 2006.229.20:38:58.54#ibcon#read 5, iclass 25, count 0 2006.229.20:38:58.54#ibcon#about to read 6, iclass 25, count 0 2006.229.20:38:58.54#ibcon#read 6, iclass 25, count 0 2006.229.20:38:58.54#ibcon#end of sib2, iclass 25, count 0 2006.229.20:38:58.54#ibcon#*after write, iclass 25, count 0 2006.229.20:38:58.54#ibcon#*before return 0, iclass 25, count 0 2006.229.20:38:58.54#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:58.54#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.20:38:58.54#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:38:58.54#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:38:58.54$vck44/vblo=3,649.99 2006.229.20:38:58.54#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.20:38:58.54#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.20:38:58.54#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:58.54#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:58.54#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:58.54#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:58.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:38:58.54#ibcon#first serial, iclass 27, count 0 2006.229.20:38:58.54#ibcon#enter sib2, iclass 27, count 0 2006.229.20:38:58.54#ibcon#flushed, iclass 27, count 0 2006.229.20:38:58.54#ibcon#about to write, iclass 27, count 0 2006.229.20:38:58.54#ibcon#wrote, iclass 27, count 0 2006.229.20:38:58.54#ibcon#about to read 3, iclass 27, count 0 2006.229.20:38:58.56#ibcon#read 3, iclass 27, count 0 2006.229.20:38:58.56#ibcon#about to read 4, iclass 27, count 0 2006.229.20:38:58.56#ibcon#read 4, iclass 27, count 0 2006.229.20:38:58.56#ibcon#about to read 5, iclass 27, count 0 2006.229.20:38:58.56#ibcon#read 5, iclass 27, count 0 2006.229.20:38:58.56#ibcon#about to read 6, iclass 27, count 0 2006.229.20:38:58.56#ibcon#read 6, iclass 27, count 0 2006.229.20:38:58.56#ibcon#end of sib2, iclass 27, count 0 2006.229.20:38:58.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:38:58.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:38:58.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:38:58.56#ibcon#*before write, iclass 27, count 0 2006.229.20:38:58.56#ibcon#enter sib2, iclass 27, count 0 2006.229.20:38:58.56#ibcon#flushed, iclass 27, count 0 2006.229.20:38:58.56#ibcon#about to write, iclass 27, count 0 2006.229.20:38:58.56#ibcon#wrote, iclass 27, count 0 2006.229.20:38:58.56#ibcon#about to read 3, iclass 27, count 0 2006.229.20:38:58.60#ibcon#read 3, iclass 27, count 0 2006.229.20:38:58.60#ibcon#about to read 4, iclass 27, count 0 2006.229.20:38:58.60#ibcon#read 4, iclass 27, count 0 2006.229.20:38:58.60#ibcon#about to read 5, iclass 27, count 0 2006.229.20:38:58.60#ibcon#read 5, iclass 27, count 0 2006.229.20:38:58.60#ibcon#about to read 6, iclass 27, count 0 2006.229.20:38:58.60#ibcon#read 6, iclass 27, count 0 2006.229.20:38:58.60#ibcon#end of sib2, iclass 27, count 0 2006.229.20:38:58.60#ibcon#*after write, iclass 27, count 0 2006.229.20:38:58.60#ibcon#*before return 0, iclass 27, count 0 2006.229.20:38:58.60#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:58.60#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.20:38:58.60#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:38:58.60#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:38:58.60$vck44/vb=3,4 2006.229.20:38:58.60#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.20:38:58.60#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.20:38:58.60#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:58.60#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:58.66#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:58.66#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:58.66#ibcon#enter wrdev, iclass 29, count 2 2006.229.20:38:58.66#ibcon#first serial, iclass 29, count 2 2006.229.20:38:58.66#ibcon#enter sib2, iclass 29, count 2 2006.229.20:38:58.66#ibcon#flushed, iclass 29, count 2 2006.229.20:38:58.66#ibcon#about to write, iclass 29, count 2 2006.229.20:38:58.66#ibcon#wrote, iclass 29, count 2 2006.229.20:38:58.66#ibcon#about to read 3, iclass 29, count 2 2006.229.20:38:58.68#ibcon#read 3, iclass 29, count 2 2006.229.20:38:58.68#ibcon#about to read 4, iclass 29, count 2 2006.229.20:38:58.68#ibcon#read 4, iclass 29, count 2 2006.229.20:38:58.68#ibcon#about to read 5, iclass 29, count 2 2006.229.20:38:58.68#ibcon#read 5, iclass 29, count 2 2006.229.20:38:58.68#ibcon#about to read 6, iclass 29, count 2 2006.229.20:38:58.68#ibcon#read 6, iclass 29, count 2 2006.229.20:38:58.68#ibcon#end of sib2, iclass 29, count 2 2006.229.20:38:58.68#ibcon#*mode == 0, iclass 29, count 2 2006.229.20:38:58.68#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.20:38:58.68#ibcon#[27=AT03-04\r\n] 2006.229.20:38:58.68#ibcon#*before write, iclass 29, count 2 2006.229.20:38:58.68#ibcon#enter sib2, iclass 29, count 2 2006.229.20:38:58.68#ibcon#flushed, iclass 29, count 2 2006.229.20:38:58.68#ibcon#about to write, iclass 29, count 2 2006.229.20:38:58.68#ibcon#wrote, iclass 29, count 2 2006.229.20:38:58.68#ibcon#about to read 3, iclass 29, count 2 2006.229.20:38:58.71#ibcon#read 3, iclass 29, count 2 2006.229.20:38:58.71#ibcon#about to read 4, iclass 29, count 2 2006.229.20:38:58.71#ibcon#read 4, iclass 29, count 2 2006.229.20:38:58.71#ibcon#about to read 5, iclass 29, count 2 2006.229.20:38:58.71#ibcon#read 5, iclass 29, count 2 2006.229.20:38:58.71#ibcon#about to read 6, iclass 29, count 2 2006.229.20:38:58.71#ibcon#read 6, iclass 29, count 2 2006.229.20:38:58.71#ibcon#end of sib2, iclass 29, count 2 2006.229.20:38:58.71#ibcon#*after write, iclass 29, count 2 2006.229.20:38:58.71#ibcon#*before return 0, iclass 29, count 2 2006.229.20:38:58.71#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:58.71#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.20:38:58.71#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.20:38:58.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:58.71#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:58.83#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:58.83#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:58.83#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:38:58.83#ibcon#first serial, iclass 29, count 0 2006.229.20:38:58.83#ibcon#enter sib2, iclass 29, count 0 2006.229.20:38:58.83#ibcon#flushed, iclass 29, count 0 2006.229.20:38:58.83#ibcon#about to write, iclass 29, count 0 2006.229.20:38:58.83#ibcon#wrote, iclass 29, count 0 2006.229.20:38:58.83#ibcon#about to read 3, iclass 29, count 0 2006.229.20:38:58.85#ibcon#read 3, iclass 29, count 0 2006.229.20:38:58.85#ibcon#about to read 4, iclass 29, count 0 2006.229.20:38:58.85#ibcon#read 4, iclass 29, count 0 2006.229.20:38:58.85#ibcon#about to read 5, iclass 29, count 0 2006.229.20:38:58.85#ibcon#read 5, iclass 29, count 0 2006.229.20:38:58.85#ibcon#about to read 6, iclass 29, count 0 2006.229.20:38:58.85#ibcon#read 6, iclass 29, count 0 2006.229.20:38:58.85#ibcon#end of sib2, iclass 29, count 0 2006.229.20:38:58.85#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:38:58.85#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:38:58.85#ibcon#[27=USB\r\n] 2006.229.20:38:58.85#ibcon#*before write, iclass 29, count 0 2006.229.20:38:58.85#ibcon#enter sib2, iclass 29, count 0 2006.229.20:38:58.85#ibcon#flushed, iclass 29, count 0 2006.229.20:38:58.85#ibcon#about to write, iclass 29, count 0 2006.229.20:38:58.85#ibcon#wrote, iclass 29, count 0 2006.229.20:38:58.85#ibcon#about to read 3, iclass 29, count 0 2006.229.20:38:58.88#ibcon#read 3, iclass 29, count 0 2006.229.20:38:58.88#ibcon#about to read 4, iclass 29, count 0 2006.229.20:38:58.88#ibcon#read 4, iclass 29, count 0 2006.229.20:38:58.88#ibcon#about to read 5, iclass 29, count 0 2006.229.20:38:58.88#ibcon#read 5, iclass 29, count 0 2006.229.20:38:58.88#ibcon#about to read 6, iclass 29, count 0 2006.229.20:38:58.88#ibcon#read 6, iclass 29, count 0 2006.229.20:38:58.88#ibcon#end of sib2, iclass 29, count 0 2006.229.20:38:58.88#ibcon#*after write, iclass 29, count 0 2006.229.20:38:58.88#ibcon#*before return 0, iclass 29, count 0 2006.229.20:38:58.88#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:58.88#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.20:38:58.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:38:58.88#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:38:58.88$vck44/vblo=4,679.99 2006.229.20:38:58.88#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.20:38:58.88#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.20:38:58.88#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:58.88#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:58.88#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:58.88#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:58.88#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:38:58.88#ibcon#first serial, iclass 31, count 0 2006.229.20:38:58.88#ibcon#enter sib2, iclass 31, count 0 2006.229.20:38:58.88#ibcon#flushed, iclass 31, count 0 2006.229.20:38:58.88#ibcon#about to write, iclass 31, count 0 2006.229.20:38:58.88#ibcon#wrote, iclass 31, count 0 2006.229.20:38:58.88#ibcon#about to read 3, iclass 31, count 0 2006.229.20:38:58.90#ibcon#read 3, iclass 31, count 0 2006.229.20:38:58.90#ibcon#about to read 4, iclass 31, count 0 2006.229.20:38:58.90#ibcon#read 4, iclass 31, count 0 2006.229.20:38:58.90#ibcon#about to read 5, iclass 31, count 0 2006.229.20:38:58.90#ibcon#read 5, iclass 31, count 0 2006.229.20:38:58.90#ibcon#about to read 6, iclass 31, count 0 2006.229.20:38:58.90#ibcon#read 6, iclass 31, count 0 2006.229.20:38:58.90#ibcon#end of sib2, iclass 31, count 0 2006.229.20:38:58.90#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:38:58.90#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:38:58.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:38:58.90#ibcon#*before write, iclass 31, count 0 2006.229.20:38:58.90#ibcon#enter sib2, iclass 31, count 0 2006.229.20:38:58.90#ibcon#flushed, iclass 31, count 0 2006.229.20:38:58.90#ibcon#about to write, iclass 31, count 0 2006.229.20:38:58.90#ibcon#wrote, iclass 31, count 0 2006.229.20:38:58.90#ibcon#about to read 3, iclass 31, count 0 2006.229.20:38:58.94#ibcon#read 3, iclass 31, count 0 2006.229.20:38:58.94#ibcon#about to read 4, iclass 31, count 0 2006.229.20:38:58.94#ibcon#read 4, iclass 31, count 0 2006.229.20:38:58.94#ibcon#about to read 5, iclass 31, count 0 2006.229.20:38:58.94#ibcon#read 5, iclass 31, count 0 2006.229.20:38:58.94#ibcon#about to read 6, iclass 31, count 0 2006.229.20:38:58.94#ibcon#read 6, iclass 31, count 0 2006.229.20:38:58.94#ibcon#end of sib2, iclass 31, count 0 2006.229.20:38:58.94#ibcon#*after write, iclass 31, count 0 2006.229.20:38:58.94#ibcon#*before return 0, iclass 31, count 0 2006.229.20:38:58.94#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:58.94#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:38:58.94#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:38:58.94#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:38:58.94$vck44/vb=4,4 2006.229.20:38:58.94#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.20:38:58.94#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.20:38:58.94#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:58.94#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:59.00#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:59.00#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:59.00#ibcon#enter wrdev, iclass 33, count 2 2006.229.20:38:59.00#ibcon#first serial, iclass 33, count 2 2006.229.20:38:59.00#ibcon#enter sib2, iclass 33, count 2 2006.229.20:38:59.00#ibcon#flushed, iclass 33, count 2 2006.229.20:38:59.00#ibcon#about to write, iclass 33, count 2 2006.229.20:38:59.00#ibcon#wrote, iclass 33, count 2 2006.229.20:38:59.00#ibcon#about to read 3, iclass 33, count 2 2006.229.20:38:59.02#ibcon#read 3, iclass 33, count 2 2006.229.20:38:59.02#ibcon#about to read 4, iclass 33, count 2 2006.229.20:38:59.02#ibcon#read 4, iclass 33, count 2 2006.229.20:38:59.02#ibcon#about to read 5, iclass 33, count 2 2006.229.20:38:59.02#ibcon#read 5, iclass 33, count 2 2006.229.20:38:59.02#ibcon#about to read 6, iclass 33, count 2 2006.229.20:38:59.02#ibcon#read 6, iclass 33, count 2 2006.229.20:38:59.02#ibcon#end of sib2, iclass 33, count 2 2006.229.20:38:59.02#ibcon#*mode == 0, iclass 33, count 2 2006.229.20:38:59.02#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.20:38:59.02#ibcon#[27=AT04-04\r\n] 2006.229.20:38:59.02#ibcon#*before write, iclass 33, count 2 2006.229.20:38:59.02#ibcon#enter sib2, iclass 33, count 2 2006.229.20:38:59.02#ibcon#flushed, iclass 33, count 2 2006.229.20:38:59.02#ibcon#about to write, iclass 33, count 2 2006.229.20:38:59.02#ibcon#wrote, iclass 33, count 2 2006.229.20:38:59.02#ibcon#about to read 3, iclass 33, count 2 2006.229.20:38:59.05#ibcon#read 3, iclass 33, count 2 2006.229.20:38:59.05#ibcon#about to read 4, iclass 33, count 2 2006.229.20:38:59.05#ibcon#read 4, iclass 33, count 2 2006.229.20:38:59.05#ibcon#about to read 5, iclass 33, count 2 2006.229.20:38:59.05#ibcon#read 5, iclass 33, count 2 2006.229.20:38:59.05#ibcon#about to read 6, iclass 33, count 2 2006.229.20:38:59.05#ibcon#read 6, iclass 33, count 2 2006.229.20:38:59.05#ibcon#end of sib2, iclass 33, count 2 2006.229.20:38:59.05#ibcon#*after write, iclass 33, count 2 2006.229.20:38:59.05#ibcon#*before return 0, iclass 33, count 2 2006.229.20:38:59.05#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:59.05#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.20:38:59.05#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.20:38:59.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:59.05#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:59.17#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:59.17#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:59.17#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:38:59.17#ibcon#first serial, iclass 33, count 0 2006.229.20:38:59.17#ibcon#enter sib2, iclass 33, count 0 2006.229.20:38:59.17#ibcon#flushed, iclass 33, count 0 2006.229.20:38:59.17#ibcon#about to write, iclass 33, count 0 2006.229.20:38:59.17#ibcon#wrote, iclass 33, count 0 2006.229.20:38:59.17#ibcon#about to read 3, iclass 33, count 0 2006.229.20:38:59.19#ibcon#read 3, iclass 33, count 0 2006.229.20:38:59.19#ibcon#about to read 4, iclass 33, count 0 2006.229.20:38:59.19#ibcon#read 4, iclass 33, count 0 2006.229.20:38:59.19#ibcon#about to read 5, iclass 33, count 0 2006.229.20:38:59.19#ibcon#read 5, iclass 33, count 0 2006.229.20:38:59.19#ibcon#about to read 6, iclass 33, count 0 2006.229.20:38:59.19#ibcon#read 6, iclass 33, count 0 2006.229.20:38:59.19#ibcon#end of sib2, iclass 33, count 0 2006.229.20:38:59.19#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:38:59.19#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:38:59.19#ibcon#[27=USB\r\n] 2006.229.20:38:59.19#ibcon#*before write, iclass 33, count 0 2006.229.20:38:59.19#ibcon#enter sib2, iclass 33, count 0 2006.229.20:38:59.19#ibcon#flushed, iclass 33, count 0 2006.229.20:38:59.19#ibcon#about to write, iclass 33, count 0 2006.229.20:38:59.19#ibcon#wrote, iclass 33, count 0 2006.229.20:38:59.19#ibcon#about to read 3, iclass 33, count 0 2006.229.20:38:59.22#ibcon#read 3, iclass 33, count 0 2006.229.20:38:59.22#ibcon#about to read 4, iclass 33, count 0 2006.229.20:38:59.22#ibcon#read 4, iclass 33, count 0 2006.229.20:38:59.22#ibcon#about to read 5, iclass 33, count 0 2006.229.20:38:59.22#ibcon#read 5, iclass 33, count 0 2006.229.20:38:59.22#ibcon#about to read 6, iclass 33, count 0 2006.229.20:38:59.22#ibcon#read 6, iclass 33, count 0 2006.229.20:38:59.22#ibcon#end of sib2, iclass 33, count 0 2006.229.20:38:59.22#ibcon#*after write, iclass 33, count 0 2006.229.20:38:59.22#ibcon#*before return 0, iclass 33, count 0 2006.229.20:38:59.22#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:59.22#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.20:38:59.22#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:38:59.22#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:38:59.22$vck44/vblo=5,709.99 2006.229.20:38:59.22#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.20:38:59.22#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.20:38:59.22#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:59.22#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:59.22#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:59.22#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:59.22#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:38:59.22#ibcon#first serial, iclass 35, count 0 2006.229.20:38:59.22#ibcon#enter sib2, iclass 35, count 0 2006.229.20:38:59.22#ibcon#flushed, iclass 35, count 0 2006.229.20:38:59.22#ibcon#about to write, iclass 35, count 0 2006.229.20:38:59.22#ibcon#wrote, iclass 35, count 0 2006.229.20:38:59.22#ibcon#about to read 3, iclass 35, count 0 2006.229.20:38:59.24#ibcon#read 3, iclass 35, count 0 2006.229.20:38:59.24#ibcon#about to read 4, iclass 35, count 0 2006.229.20:38:59.24#ibcon#read 4, iclass 35, count 0 2006.229.20:38:59.24#ibcon#about to read 5, iclass 35, count 0 2006.229.20:38:59.24#ibcon#read 5, iclass 35, count 0 2006.229.20:38:59.24#ibcon#about to read 6, iclass 35, count 0 2006.229.20:38:59.24#ibcon#read 6, iclass 35, count 0 2006.229.20:38:59.24#ibcon#end of sib2, iclass 35, count 0 2006.229.20:38:59.24#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:38:59.24#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:38:59.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:38:59.24#ibcon#*before write, iclass 35, count 0 2006.229.20:38:59.24#ibcon#enter sib2, iclass 35, count 0 2006.229.20:38:59.24#ibcon#flushed, iclass 35, count 0 2006.229.20:38:59.24#ibcon#about to write, iclass 35, count 0 2006.229.20:38:59.24#ibcon#wrote, iclass 35, count 0 2006.229.20:38:59.24#ibcon#about to read 3, iclass 35, count 0 2006.229.20:38:59.28#ibcon#read 3, iclass 35, count 0 2006.229.20:38:59.28#ibcon#about to read 4, iclass 35, count 0 2006.229.20:38:59.28#ibcon#read 4, iclass 35, count 0 2006.229.20:38:59.28#ibcon#about to read 5, iclass 35, count 0 2006.229.20:38:59.28#ibcon#read 5, iclass 35, count 0 2006.229.20:38:59.28#ibcon#about to read 6, iclass 35, count 0 2006.229.20:38:59.28#ibcon#read 6, iclass 35, count 0 2006.229.20:38:59.28#ibcon#end of sib2, iclass 35, count 0 2006.229.20:38:59.28#ibcon#*after write, iclass 35, count 0 2006.229.20:38:59.28#ibcon#*before return 0, iclass 35, count 0 2006.229.20:38:59.28#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:59.28#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.20:38:59.28#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:38:59.28#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:38:59.28$vck44/vb=5,4 2006.229.20:38:59.28#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.20:38:59.28#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.20:38:59.28#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:59.28#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:59.34#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:59.34#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:59.34#ibcon#enter wrdev, iclass 37, count 2 2006.229.20:38:59.34#ibcon#first serial, iclass 37, count 2 2006.229.20:38:59.34#ibcon#enter sib2, iclass 37, count 2 2006.229.20:38:59.34#ibcon#flushed, iclass 37, count 2 2006.229.20:38:59.34#ibcon#about to write, iclass 37, count 2 2006.229.20:38:59.34#ibcon#wrote, iclass 37, count 2 2006.229.20:38:59.34#ibcon#about to read 3, iclass 37, count 2 2006.229.20:38:59.36#ibcon#read 3, iclass 37, count 2 2006.229.20:38:59.36#ibcon#about to read 4, iclass 37, count 2 2006.229.20:38:59.36#ibcon#read 4, iclass 37, count 2 2006.229.20:38:59.36#ibcon#about to read 5, iclass 37, count 2 2006.229.20:38:59.36#ibcon#read 5, iclass 37, count 2 2006.229.20:38:59.36#ibcon#about to read 6, iclass 37, count 2 2006.229.20:38:59.36#ibcon#read 6, iclass 37, count 2 2006.229.20:38:59.36#ibcon#end of sib2, iclass 37, count 2 2006.229.20:38:59.36#ibcon#*mode == 0, iclass 37, count 2 2006.229.20:38:59.36#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.20:38:59.36#ibcon#[27=AT05-04\r\n] 2006.229.20:38:59.36#ibcon#*before write, iclass 37, count 2 2006.229.20:38:59.36#ibcon#enter sib2, iclass 37, count 2 2006.229.20:38:59.36#ibcon#flushed, iclass 37, count 2 2006.229.20:38:59.36#ibcon#about to write, iclass 37, count 2 2006.229.20:38:59.36#ibcon#wrote, iclass 37, count 2 2006.229.20:38:59.36#ibcon#about to read 3, iclass 37, count 2 2006.229.20:38:59.39#ibcon#read 3, iclass 37, count 2 2006.229.20:38:59.39#ibcon#about to read 4, iclass 37, count 2 2006.229.20:38:59.39#ibcon#read 4, iclass 37, count 2 2006.229.20:38:59.39#ibcon#about to read 5, iclass 37, count 2 2006.229.20:38:59.39#ibcon#read 5, iclass 37, count 2 2006.229.20:38:59.39#ibcon#about to read 6, iclass 37, count 2 2006.229.20:38:59.39#ibcon#read 6, iclass 37, count 2 2006.229.20:38:59.39#ibcon#end of sib2, iclass 37, count 2 2006.229.20:38:59.39#ibcon#*after write, iclass 37, count 2 2006.229.20:38:59.39#ibcon#*before return 0, iclass 37, count 2 2006.229.20:38:59.39#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:59.39#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.20:38:59.39#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.20:38:59.39#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:59.39#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:59.51#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:59.51#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:59.51#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:38:59.51#ibcon#first serial, iclass 37, count 0 2006.229.20:38:59.51#ibcon#enter sib2, iclass 37, count 0 2006.229.20:38:59.51#ibcon#flushed, iclass 37, count 0 2006.229.20:38:59.51#ibcon#about to write, iclass 37, count 0 2006.229.20:38:59.51#ibcon#wrote, iclass 37, count 0 2006.229.20:38:59.51#ibcon#about to read 3, iclass 37, count 0 2006.229.20:38:59.53#ibcon#read 3, iclass 37, count 0 2006.229.20:38:59.53#ibcon#about to read 4, iclass 37, count 0 2006.229.20:38:59.53#ibcon#read 4, iclass 37, count 0 2006.229.20:38:59.53#ibcon#about to read 5, iclass 37, count 0 2006.229.20:38:59.53#ibcon#read 5, iclass 37, count 0 2006.229.20:38:59.53#ibcon#about to read 6, iclass 37, count 0 2006.229.20:38:59.53#ibcon#read 6, iclass 37, count 0 2006.229.20:38:59.53#ibcon#end of sib2, iclass 37, count 0 2006.229.20:38:59.53#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:38:59.53#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:38:59.53#ibcon#[27=USB\r\n] 2006.229.20:38:59.53#ibcon#*before write, iclass 37, count 0 2006.229.20:38:59.53#ibcon#enter sib2, iclass 37, count 0 2006.229.20:38:59.53#ibcon#flushed, iclass 37, count 0 2006.229.20:38:59.53#ibcon#about to write, iclass 37, count 0 2006.229.20:38:59.53#ibcon#wrote, iclass 37, count 0 2006.229.20:38:59.53#ibcon#about to read 3, iclass 37, count 0 2006.229.20:38:59.56#ibcon#read 3, iclass 37, count 0 2006.229.20:38:59.56#ibcon#about to read 4, iclass 37, count 0 2006.229.20:38:59.56#ibcon#read 4, iclass 37, count 0 2006.229.20:38:59.56#ibcon#about to read 5, iclass 37, count 0 2006.229.20:38:59.56#ibcon#read 5, iclass 37, count 0 2006.229.20:38:59.56#ibcon#about to read 6, iclass 37, count 0 2006.229.20:38:59.56#ibcon#read 6, iclass 37, count 0 2006.229.20:38:59.56#ibcon#end of sib2, iclass 37, count 0 2006.229.20:38:59.56#ibcon#*after write, iclass 37, count 0 2006.229.20:38:59.56#ibcon#*before return 0, iclass 37, count 0 2006.229.20:38:59.56#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:59.56#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.20:38:59.56#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:38:59.56#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:38:59.56$vck44/vblo=6,719.99 2006.229.20:38:59.56#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.20:38:59.56#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.20:38:59.56#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:59.56#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:59.56#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:59.56#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:59.56#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:38:59.56#ibcon#first serial, iclass 39, count 0 2006.229.20:38:59.56#ibcon#enter sib2, iclass 39, count 0 2006.229.20:38:59.56#ibcon#flushed, iclass 39, count 0 2006.229.20:38:59.56#ibcon#about to write, iclass 39, count 0 2006.229.20:38:59.56#ibcon#wrote, iclass 39, count 0 2006.229.20:38:59.56#ibcon#about to read 3, iclass 39, count 0 2006.229.20:38:59.58#ibcon#read 3, iclass 39, count 0 2006.229.20:38:59.58#ibcon#about to read 4, iclass 39, count 0 2006.229.20:38:59.58#ibcon#read 4, iclass 39, count 0 2006.229.20:38:59.58#ibcon#about to read 5, iclass 39, count 0 2006.229.20:38:59.58#ibcon#read 5, iclass 39, count 0 2006.229.20:38:59.58#ibcon#about to read 6, iclass 39, count 0 2006.229.20:38:59.58#ibcon#read 6, iclass 39, count 0 2006.229.20:38:59.58#ibcon#end of sib2, iclass 39, count 0 2006.229.20:38:59.58#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:38:59.58#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:38:59.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:38:59.58#ibcon#*before write, iclass 39, count 0 2006.229.20:38:59.58#ibcon#enter sib2, iclass 39, count 0 2006.229.20:38:59.58#ibcon#flushed, iclass 39, count 0 2006.229.20:38:59.58#ibcon#about to write, iclass 39, count 0 2006.229.20:38:59.58#ibcon#wrote, iclass 39, count 0 2006.229.20:38:59.58#ibcon#about to read 3, iclass 39, count 0 2006.229.20:38:59.62#ibcon#read 3, iclass 39, count 0 2006.229.20:38:59.62#ibcon#about to read 4, iclass 39, count 0 2006.229.20:38:59.62#ibcon#read 4, iclass 39, count 0 2006.229.20:38:59.62#ibcon#about to read 5, iclass 39, count 0 2006.229.20:38:59.62#ibcon#read 5, iclass 39, count 0 2006.229.20:38:59.62#ibcon#about to read 6, iclass 39, count 0 2006.229.20:38:59.62#ibcon#read 6, iclass 39, count 0 2006.229.20:38:59.62#ibcon#end of sib2, iclass 39, count 0 2006.229.20:38:59.62#ibcon#*after write, iclass 39, count 0 2006.229.20:38:59.62#ibcon#*before return 0, iclass 39, count 0 2006.229.20:38:59.62#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:59.62#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.20:38:59.62#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:38:59.62#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:38:59.62$vck44/vb=6,4 2006.229.20:38:59.62#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.20:38:59.62#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.20:38:59.62#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:59.62#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:59.68#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:59.68#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:59.68#ibcon#enter wrdev, iclass 3, count 2 2006.229.20:38:59.68#ibcon#first serial, iclass 3, count 2 2006.229.20:38:59.68#ibcon#enter sib2, iclass 3, count 2 2006.229.20:38:59.68#ibcon#flushed, iclass 3, count 2 2006.229.20:38:59.68#ibcon#about to write, iclass 3, count 2 2006.229.20:38:59.68#ibcon#wrote, iclass 3, count 2 2006.229.20:38:59.68#ibcon#about to read 3, iclass 3, count 2 2006.229.20:38:59.70#ibcon#read 3, iclass 3, count 2 2006.229.20:38:59.70#ibcon#about to read 4, iclass 3, count 2 2006.229.20:38:59.70#ibcon#read 4, iclass 3, count 2 2006.229.20:38:59.70#ibcon#about to read 5, iclass 3, count 2 2006.229.20:38:59.70#ibcon#read 5, iclass 3, count 2 2006.229.20:38:59.70#ibcon#about to read 6, iclass 3, count 2 2006.229.20:38:59.70#ibcon#read 6, iclass 3, count 2 2006.229.20:38:59.70#ibcon#end of sib2, iclass 3, count 2 2006.229.20:38:59.70#ibcon#*mode == 0, iclass 3, count 2 2006.229.20:38:59.70#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.20:38:59.70#ibcon#[27=AT06-04\r\n] 2006.229.20:38:59.70#ibcon#*before write, iclass 3, count 2 2006.229.20:38:59.70#ibcon#enter sib2, iclass 3, count 2 2006.229.20:38:59.70#ibcon#flushed, iclass 3, count 2 2006.229.20:38:59.70#ibcon#about to write, iclass 3, count 2 2006.229.20:38:59.70#ibcon#wrote, iclass 3, count 2 2006.229.20:38:59.70#ibcon#about to read 3, iclass 3, count 2 2006.229.20:38:59.73#ibcon#read 3, iclass 3, count 2 2006.229.20:38:59.73#ibcon#about to read 4, iclass 3, count 2 2006.229.20:38:59.73#ibcon#read 4, iclass 3, count 2 2006.229.20:38:59.73#ibcon#about to read 5, iclass 3, count 2 2006.229.20:38:59.73#ibcon#read 5, iclass 3, count 2 2006.229.20:38:59.73#ibcon#about to read 6, iclass 3, count 2 2006.229.20:38:59.73#ibcon#read 6, iclass 3, count 2 2006.229.20:38:59.73#ibcon#end of sib2, iclass 3, count 2 2006.229.20:38:59.73#ibcon#*after write, iclass 3, count 2 2006.229.20:38:59.73#ibcon#*before return 0, iclass 3, count 2 2006.229.20:38:59.73#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:59.73#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.20:38:59.73#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.20:38:59.73#ibcon#ireg 7 cls_cnt 0 2006.229.20:38:59.73#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:59.85#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:59.85#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:59.85#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:38:59.85#ibcon#first serial, iclass 3, count 0 2006.229.20:38:59.85#ibcon#enter sib2, iclass 3, count 0 2006.229.20:38:59.85#ibcon#flushed, iclass 3, count 0 2006.229.20:38:59.85#ibcon#about to write, iclass 3, count 0 2006.229.20:38:59.85#ibcon#wrote, iclass 3, count 0 2006.229.20:38:59.85#ibcon#about to read 3, iclass 3, count 0 2006.229.20:38:59.87#ibcon#read 3, iclass 3, count 0 2006.229.20:38:59.87#ibcon#about to read 4, iclass 3, count 0 2006.229.20:38:59.87#ibcon#read 4, iclass 3, count 0 2006.229.20:38:59.87#ibcon#about to read 5, iclass 3, count 0 2006.229.20:38:59.87#ibcon#read 5, iclass 3, count 0 2006.229.20:38:59.87#ibcon#about to read 6, iclass 3, count 0 2006.229.20:38:59.87#ibcon#read 6, iclass 3, count 0 2006.229.20:38:59.87#ibcon#end of sib2, iclass 3, count 0 2006.229.20:38:59.87#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:38:59.87#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:38:59.87#ibcon#[27=USB\r\n] 2006.229.20:38:59.87#ibcon#*before write, iclass 3, count 0 2006.229.20:38:59.87#ibcon#enter sib2, iclass 3, count 0 2006.229.20:38:59.87#ibcon#flushed, iclass 3, count 0 2006.229.20:38:59.87#ibcon#about to write, iclass 3, count 0 2006.229.20:38:59.87#ibcon#wrote, iclass 3, count 0 2006.229.20:38:59.87#ibcon#about to read 3, iclass 3, count 0 2006.229.20:38:59.90#ibcon#read 3, iclass 3, count 0 2006.229.20:38:59.90#ibcon#about to read 4, iclass 3, count 0 2006.229.20:38:59.90#ibcon#read 4, iclass 3, count 0 2006.229.20:38:59.90#ibcon#about to read 5, iclass 3, count 0 2006.229.20:38:59.90#ibcon#read 5, iclass 3, count 0 2006.229.20:38:59.90#ibcon#about to read 6, iclass 3, count 0 2006.229.20:38:59.90#ibcon#read 6, iclass 3, count 0 2006.229.20:38:59.90#ibcon#end of sib2, iclass 3, count 0 2006.229.20:38:59.90#ibcon#*after write, iclass 3, count 0 2006.229.20:38:59.90#ibcon#*before return 0, iclass 3, count 0 2006.229.20:38:59.90#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:59.90#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.20:38:59.90#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:38:59.90#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:38:59.90$vck44/vblo=7,734.99 2006.229.20:38:59.90#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.20:38:59.90#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.20:38:59.90#ibcon#ireg 17 cls_cnt 0 2006.229.20:38:59.90#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:59.90#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:59.90#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:59.90#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:38:59.90#ibcon#first serial, iclass 5, count 0 2006.229.20:38:59.90#ibcon#enter sib2, iclass 5, count 0 2006.229.20:38:59.90#ibcon#flushed, iclass 5, count 0 2006.229.20:38:59.90#ibcon#about to write, iclass 5, count 0 2006.229.20:38:59.90#ibcon#wrote, iclass 5, count 0 2006.229.20:38:59.90#ibcon#about to read 3, iclass 5, count 0 2006.229.20:38:59.92#ibcon#read 3, iclass 5, count 0 2006.229.20:38:59.92#ibcon#about to read 4, iclass 5, count 0 2006.229.20:38:59.92#ibcon#read 4, iclass 5, count 0 2006.229.20:38:59.92#ibcon#about to read 5, iclass 5, count 0 2006.229.20:38:59.92#ibcon#read 5, iclass 5, count 0 2006.229.20:38:59.92#ibcon#about to read 6, iclass 5, count 0 2006.229.20:38:59.92#ibcon#read 6, iclass 5, count 0 2006.229.20:38:59.92#ibcon#end of sib2, iclass 5, count 0 2006.229.20:38:59.92#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:38:59.92#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:38:59.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:38:59.92#ibcon#*before write, iclass 5, count 0 2006.229.20:38:59.92#ibcon#enter sib2, iclass 5, count 0 2006.229.20:38:59.92#ibcon#flushed, iclass 5, count 0 2006.229.20:38:59.92#ibcon#about to write, iclass 5, count 0 2006.229.20:38:59.92#ibcon#wrote, iclass 5, count 0 2006.229.20:38:59.92#ibcon#about to read 3, iclass 5, count 0 2006.229.20:38:59.96#ibcon#read 3, iclass 5, count 0 2006.229.20:38:59.96#ibcon#about to read 4, iclass 5, count 0 2006.229.20:38:59.96#ibcon#read 4, iclass 5, count 0 2006.229.20:38:59.96#ibcon#about to read 5, iclass 5, count 0 2006.229.20:38:59.96#ibcon#read 5, iclass 5, count 0 2006.229.20:38:59.96#ibcon#about to read 6, iclass 5, count 0 2006.229.20:38:59.96#ibcon#read 6, iclass 5, count 0 2006.229.20:38:59.96#ibcon#end of sib2, iclass 5, count 0 2006.229.20:38:59.96#ibcon#*after write, iclass 5, count 0 2006.229.20:38:59.96#ibcon#*before return 0, iclass 5, count 0 2006.229.20:38:59.96#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:59.96#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.20:38:59.96#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:38:59.96#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:38:59.96$vck44/vb=7,4 2006.229.20:38:59.96#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.20:38:59.96#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.20:38:59.96#ibcon#ireg 11 cls_cnt 2 2006.229.20:38:59.96#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:39:00.02#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:39:00.02#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:39:00.02#ibcon#enter wrdev, iclass 7, count 2 2006.229.20:39:00.02#ibcon#first serial, iclass 7, count 2 2006.229.20:39:00.02#ibcon#enter sib2, iclass 7, count 2 2006.229.20:39:00.02#ibcon#flushed, iclass 7, count 2 2006.229.20:39:00.02#ibcon#about to write, iclass 7, count 2 2006.229.20:39:00.02#ibcon#wrote, iclass 7, count 2 2006.229.20:39:00.02#ibcon#about to read 3, iclass 7, count 2 2006.229.20:39:00.04#ibcon#read 3, iclass 7, count 2 2006.229.20:39:00.04#ibcon#about to read 4, iclass 7, count 2 2006.229.20:39:00.04#ibcon#read 4, iclass 7, count 2 2006.229.20:39:00.04#ibcon#about to read 5, iclass 7, count 2 2006.229.20:39:00.04#ibcon#read 5, iclass 7, count 2 2006.229.20:39:00.04#ibcon#about to read 6, iclass 7, count 2 2006.229.20:39:00.04#ibcon#read 6, iclass 7, count 2 2006.229.20:39:00.04#ibcon#end of sib2, iclass 7, count 2 2006.229.20:39:00.04#ibcon#*mode == 0, iclass 7, count 2 2006.229.20:39:00.04#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.20:39:00.04#ibcon#[27=AT07-04\r\n] 2006.229.20:39:00.04#ibcon#*before write, iclass 7, count 2 2006.229.20:39:00.04#ibcon#enter sib2, iclass 7, count 2 2006.229.20:39:00.04#ibcon#flushed, iclass 7, count 2 2006.229.20:39:00.04#ibcon#about to write, iclass 7, count 2 2006.229.20:39:00.04#ibcon#wrote, iclass 7, count 2 2006.229.20:39:00.04#ibcon#about to read 3, iclass 7, count 2 2006.229.20:39:00.07#ibcon#read 3, iclass 7, count 2 2006.229.20:39:00.07#ibcon#about to read 4, iclass 7, count 2 2006.229.20:39:00.07#ibcon#read 4, iclass 7, count 2 2006.229.20:39:00.07#ibcon#about to read 5, iclass 7, count 2 2006.229.20:39:00.07#ibcon#read 5, iclass 7, count 2 2006.229.20:39:00.07#ibcon#about to read 6, iclass 7, count 2 2006.229.20:39:00.07#ibcon#read 6, iclass 7, count 2 2006.229.20:39:00.07#ibcon#end of sib2, iclass 7, count 2 2006.229.20:39:00.07#ibcon#*after write, iclass 7, count 2 2006.229.20:39:00.07#ibcon#*before return 0, iclass 7, count 2 2006.229.20:39:00.07#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:39:00.07#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.20:39:00.07#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.20:39:00.07#ibcon#ireg 7 cls_cnt 0 2006.229.20:39:00.07#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:39:00.19#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:39:00.19#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:39:00.19#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:39:00.19#ibcon#first serial, iclass 7, count 0 2006.229.20:39:00.19#ibcon#enter sib2, iclass 7, count 0 2006.229.20:39:00.19#ibcon#flushed, iclass 7, count 0 2006.229.20:39:00.19#ibcon#about to write, iclass 7, count 0 2006.229.20:39:00.19#ibcon#wrote, iclass 7, count 0 2006.229.20:39:00.19#ibcon#about to read 3, iclass 7, count 0 2006.229.20:39:00.21#ibcon#read 3, iclass 7, count 0 2006.229.20:39:00.21#ibcon#about to read 4, iclass 7, count 0 2006.229.20:39:00.21#ibcon#read 4, iclass 7, count 0 2006.229.20:39:00.21#ibcon#about to read 5, iclass 7, count 0 2006.229.20:39:00.21#ibcon#read 5, iclass 7, count 0 2006.229.20:39:00.21#ibcon#about to read 6, iclass 7, count 0 2006.229.20:39:00.21#ibcon#read 6, iclass 7, count 0 2006.229.20:39:00.21#ibcon#end of sib2, iclass 7, count 0 2006.229.20:39:00.21#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:39:00.21#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:39:00.21#ibcon#[27=USB\r\n] 2006.229.20:39:00.21#ibcon#*before write, iclass 7, count 0 2006.229.20:39:00.21#ibcon#enter sib2, iclass 7, count 0 2006.229.20:39:00.21#ibcon#flushed, iclass 7, count 0 2006.229.20:39:00.21#ibcon#about to write, iclass 7, count 0 2006.229.20:39:00.21#ibcon#wrote, iclass 7, count 0 2006.229.20:39:00.21#ibcon#about to read 3, iclass 7, count 0 2006.229.20:39:00.24#ibcon#read 3, iclass 7, count 0 2006.229.20:39:00.24#ibcon#about to read 4, iclass 7, count 0 2006.229.20:39:00.24#ibcon#read 4, iclass 7, count 0 2006.229.20:39:00.24#ibcon#about to read 5, iclass 7, count 0 2006.229.20:39:00.24#ibcon#read 5, iclass 7, count 0 2006.229.20:39:00.24#ibcon#about to read 6, iclass 7, count 0 2006.229.20:39:00.24#ibcon#read 6, iclass 7, count 0 2006.229.20:39:00.24#ibcon#end of sib2, iclass 7, count 0 2006.229.20:39:00.24#ibcon#*after write, iclass 7, count 0 2006.229.20:39:00.24#ibcon#*before return 0, iclass 7, count 0 2006.229.20:39:00.24#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:39:00.24#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.20:39:00.24#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:39:00.24#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:39:00.24$vck44/vblo=8,744.99 2006.229.20:39:00.24#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.20:39:00.24#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.20:39:00.24#ibcon#ireg 17 cls_cnt 0 2006.229.20:39:00.24#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:39:00.24#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:39:00.24#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:39:00.24#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:39:00.24#ibcon#first serial, iclass 11, count 0 2006.229.20:39:00.24#ibcon#enter sib2, iclass 11, count 0 2006.229.20:39:00.24#ibcon#flushed, iclass 11, count 0 2006.229.20:39:00.24#ibcon#about to write, iclass 11, count 0 2006.229.20:39:00.24#ibcon#wrote, iclass 11, count 0 2006.229.20:39:00.24#ibcon#about to read 3, iclass 11, count 0 2006.229.20:39:00.26#ibcon#read 3, iclass 11, count 0 2006.229.20:39:00.26#ibcon#about to read 4, iclass 11, count 0 2006.229.20:39:00.26#ibcon#read 4, iclass 11, count 0 2006.229.20:39:00.26#ibcon#about to read 5, iclass 11, count 0 2006.229.20:39:00.26#ibcon#read 5, iclass 11, count 0 2006.229.20:39:00.26#ibcon#about to read 6, iclass 11, count 0 2006.229.20:39:00.26#ibcon#read 6, iclass 11, count 0 2006.229.20:39:00.26#ibcon#end of sib2, iclass 11, count 0 2006.229.20:39:00.26#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:39:00.26#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:39:00.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:39:00.26#ibcon#*before write, iclass 11, count 0 2006.229.20:39:00.26#ibcon#enter sib2, iclass 11, count 0 2006.229.20:39:00.26#ibcon#flushed, iclass 11, count 0 2006.229.20:39:00.26#ibcon#about to write, iclass 11, count 0 2006.229.20:39:00.26#ibcon#wrote, iclass 11, count 0 2006.229.20:39:00.26#ibcon#about to read 3, iclass 11, count 0 2006.229.20:39:00.30#ibcon#read 3, iclass 11, count 0 2006.229.20:39:00.30#ibcon#about to read 4, iclass 11, count 0 2006.229.20:39:00.30#ibcon#read 4, iclass 11, count 0 2006.229.20:39:00.30#ibcon#about to read 5, iclass 11, count 0 2006.229.20:39:00.30#ibcon#read 5, iclass 11, count 0 2006.229.20:39:00.30#ibcon#about to read 6, iclass 11, count 0 2006.229.20:39:00.30#ibcon#read 6, iclass 11, count 0 2006.229.20:39:00.30#ibcon#end of sib2, iclass 11, count 0 2006.229.20:39:00.30#ibcon#*after write, iclass 11, count 0 2006.229.20:39:00.30#ibcon#*before return 0, iclass 11, count 0 2006.229.20:39:00.30#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:39:00.30#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.20:39:00.30#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:39:00.30#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:39:00.30$vck44/vb=8,4 2006.229.20:39:00.30#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.20:39:00.30#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.20:39:00.30#ibcon#ireg 11 cls_cnt 2 2006.229.20:39:00.30#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:39:00.36#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:39:00.36#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:39:00.36#ibcon#enter wrdev, iclass 13, count 2 2006.229.20:39:00.36#ibcon#first serial, iclass 13, count 2 2006.229.20:39:00.36#ibcon#enter sib2, iclass 13, count 2 2006.229.20:39:00.36#ibcon#flushed, iclass 13, count 2 2006.229.20:39:00.36#ibcon#about to write, iclass 13, count 2 2006.229.20:39:00.36#ibcon#wrote, iclass 13, count 2 2006.229.20:39:00.36#ibcon#about to read 3, iclass 13, count 2 2006.229.20:39:00.38#ibcon#read 3, iclass 13, count 2 2006.229.20:39:00.38#ibcon#about to read 4, iclass 13, count 2 2006.229.20:39:00.38#ibcon#read 4, iclass 13, count 2 2006.229.20:39:00.38#ibcon#about to read 5, iclass 13, count 2 2006.229.20:39:00.38#ibcon#read 5, iclass 13, count 2 2006.229.20:39:00.38#ibcon#about to read 6, iclass 13, count 2 2006.229.20:39:00.38#ibcon#read 6, iclass 13, count 2 2006.229.20:39:00.38#ibcon#end of sib2, iclass 13, count 2 2006.229.20:39:00.38#ibcon#*mode == 0, iclass 13, count 2 2006.229.20:39:00.38#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.20:39:00.38#ibcon#[27=AT08-04\r\n] 2006.229.20:39:00.38#ibcon#*before write, iclass 13, count 2 2006.229.20:39:00.38#ibcon#enter sib2, iclass 13, count 2 2006.229.20:39:00.38#ibcon#flushed, iclass 13, count 2 2006.229.20:39:00.38#ibcon#about to write, iclass 13, count 2 2006.229.20:39:00.38#ibcon#wrote, iclass 13, count 2 2006.229.20:39:00.38#ibcon#about to read 3, iclass 13, count 2 2006.229.20:39:00.41#ibcon#read 3, iclass 13, count 2 2006.229.20:39:00.41#ibcon#about to read 4, iclass 13, count 2 2006.229.20:39:00.41#ibcon#read 4, iclass 13, count 2 2006.229.20:39:00.41#ibcon#about to read 5, iclass 13, count 2 2006.229.20:39:00.41#ibcon#read 5, iclass 13, count 2 2006.229.20:39:00.41#ibcon#about to read 6, iclass 13, count 2 2006.229.20:39:00.41#ibcon#read 6, iclass 13, count 2 2006.229.20:39:00.41#ibcon#end of sib2, iclass 13, count 2 2006.229.20:39:00.41#ibcon#*after write, iclass 13, count 2 2006.229.20:39:00.41#ibcon#*before return 0, iclass 13, count 2 2006.229.20:39:00.41#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:39:00.41#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.20:39:00.41#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.20:39:00.41#ibcon#ireg 7 cls_cnt 0 2006.229.20:39:00.41#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:39:00.53#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:39:00.53#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:39:00.53#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:39:00.53#ibcon#first serial, iclass 13, count 0 2006.229.20:39:00.53#ibcon#enter sib2, iclass 13, count 0 2006.229.20:39:00.53#ibcon#flushed, iclass 13, count 0 2006.229.20:39:00.53#ibcon#about to write, iclass 13, count 0 2006.229.20:39:00.53#ibcon#wrote, iclass 13, count 0 2006.229.20:39:00.53#ibcon#about to read 3, iclass 13, count 0 2006.229.20:39:00.55#ibcon#read 3, iclass 13, count 0 2006.229.20:39:00.55#ibcon#about to read 4, iclass 13, count 0 2006.229.20:39:00.55#ibcon#read 4, iclass 13, count 0 2006.229.20:39:00.55#ibcon#about to read 5, iclass 13, count 0 2006.229.20:39:00.55#ibcon#read 5, iclass 13, count 0 2006.229.20:39:00.55#ibcon#about to read 6, iclass 13, count 0 2006.229.20:39:00.55#ibcon#read 6, iclass 13, count 0 2006.229.20:39:00.55#ibcon#end of sib2, iclass 13, count 0 2006.229.20:39:00.55#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:39:00.55#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:39:00.55#ibcon#[27=USB\r\n] 2006.229.20:39:00.55#ibcon#*before write, iclass 13, count 0 2006.229.20:39:00.55#ibcon#enter sib2, iclass 13, count 0 2006.229.20:39:00.55#ibcon#flushed, iclass 13, count 0 2006.229.20:39:00.55#ibcon#about to write, iclass 13, count 0 2006.229.20:39:00.55#ibcon#wrote, iclass 13, count 0 2006.229.20:39:00.55#ibcon#about to read 3, iclass 13, count 0 2006.229.20:39:00.58#ibcon#read 3, iclass 13, count 0 2006.229.20:39:00.58#ibcon#about to read 4, iclass 13, count 0 2006.229.20:39:00.58#ibcon#read 4, iclass 13, count 0 2006.229.20:39:00.58#ibcon#about to read 5, iclass 13, count 0 2006.229.20:39:00.58#ibcon#read 5, iclass 13, count 0 2006.229.20:39:00.58#ibcon#about to read 6, iclass 13, count 0 2006.229.20:39:00.58#ibcon#read 6, iclass 13, count 0 2006.229.20:39:00.58#ibcon#end of sib2, iclass 13, count 0 2006.229.20:39:00.58#ibcon#*after write, iclass 13, count 0 2006.229.20:39:00.58#ibcon#*before return 0, iclass 13, count 0 2006.229.20:39:00.58#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:39:00.58#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.20:39:00.58#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:39:00.58#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:39:00.58$vck44/vabw=wide 2006.229.20:39:00.58#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.20:39:00.58#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.20:39:00.58#ibcon#ireg 8 cls_cnt 0 2006.229.20:39:00.58#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:39:00.58#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:39:00.58#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:39:00.58#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:39:00.58#ibcon#first serial, iclass 15, count 0 2006.229.20:39:00.58#ibcon#enter sib2, iclass 15, count 0 2006.229.20:39:00.58#ibcon#flushed, iclass 15, count 0 2006.229.20:39:00.58#ibcon#about to write, iclass 15, count 0 2006.229.20:39:00.58#ibcon#wrote, iclass 15, count 0 2006.229.20:39:00.58#ibcon#about to read 3, iclass 15, count 0 2006.229.20:39:00.60#ibcon#read 3, iclass 15, count 0 2006.229.20:39:00.60#ibcon#about to read 4, iclass 15, count 0 2006.229.20:39:00.60#ibcon#read 4, iclass 15, count 0 2006.229.20:39:00.60#ibcon#about to read 5, iclass 15, count 0 2006.229.20:39:00.60#ibcon#read 5, iclass 15, count 0 2006.229.20:39:00.60#ibcon#about to read 6, iclass 15, count 0 2006.229.20:39:00.60#ibcon#read 6, iclass 15, count 0 2006.229.20:39:00.60#ibcon#end of sib2, iclass 15, count 0 2006.229.20:39:00.60#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:39:00.60#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:39:00.60#ibcon#[25=BW32\r\n] 2006.229.20:39:00.60#ibcon#*before write, iclass 15, count 0 2006.229.20:39:00.60#ibcon#enter sib2, iclass 15, count 0 2006.229.20:39:00.60#ibcon#flushed, iclass 15, count 0 2006.229.20:39:00.60#ibcon#about to write, iclass 15, count 0 2006.229.20:39:00.60#ibcon#wrote, iclass 15, count 0 2006.229.20:39:00.60#ibcon#about to read 3, iclass 15, count 0 2006.229.20:39:00.63#ibcon#read 3, iclass 15, count 0 2006.229.20:39:00.63#ibcon#about to read 4, iclass 15, count 0 2006.229.20:39:00.63#ibcon#read 4, iclass 15, count 0 2006.229.20:39:00.63#ibcon#about to read 5, iclass 15, count 0 2006.229.20:39:00.63#ibcon#read 5, iclass 15, count 0 2006.229.20:39:00.63#ibcon#about to read 6, iclass 15, count 0 2006.229.20:39:00.63#ibcon#read 6, iclass 15, count 0 2006.229.20:39:00.63#ibcon#end of sib2, iclass 15, count 0 2006.229.20:39:00.63#ibcon#*after write, iclass 15, count 0 2006.229.20:39:00.63#ibcon#*before return 0, iclass 15, count 0 2006.229.20:39:00.63#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:39:00.63#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.20:39:00.63#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:39:00.63#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:39:00.63$vck44/vbbw=wide 2006.229.20:39:00.63#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:39:00.63#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:39:00.63#ibcon#ireg 8 cls_cnt 0 2006.229.20:39:00.63#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:39:00.70#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:39:00.70#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:39:00.70#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:39:00.70#ibcon#first serial, iclass 17, count 0 2006.229.20:39:00.70#ibcon#enter sib2, iclass 17, count 0 2006.229.20:39:00.70#ibcon#flushed, iclass 17, count 0 2006.229.20:39:00.70#ibcon#about to write, iclass 17, count 0 2006.229.20:39:00.70#ibcon#wrote, iclass 17, count 0 2006.229.20:39:00.70#ibcon#about to read 3, iclass 17, count 0 2006.229.20:39:00.72#ibcon#read 3, iclass 17, count 0 2006.229.20:39:00.72#ibcon#about to read 4, iclass 17, count 0 2006.229.20:39:00.72#ibcon#read 4, iclass 17, count 0 2006.229.20:39:00.72#ibcon#about to read 5, iclass 17, count 0 2006.229.20:39:00.72#ibcon#read 5, iclass 17, count 0 2006.229.20:39:00.72#ibcon#about to read 6, iclass 17, count 0 2006.229.20:39:00.72#ibcon#read 6, iclass 17, count 0 2006.229.20:39:00.72#ibcon#end of sib2, iclass 17, count 0 2006.229.20:39:00.72#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:39:00.72#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:39:00.72#ibcon#[27=BW32\r\n] 2006.229.20:39:00.72#ibcon#*before write, iclass 17, count 0 2006.229.20:39:00.72#ibcon#enter sib2, iclass 17, count 0 2006.229.20:39:00.72#ibcon#flushed, iclass 17, count 0 2006.229.20:39:00.72#ibcon#about to write, iclass 17, count 0 2006.229.20:39:00.72#ibcon#wrote, iclass 17, count 0 2006.229.20:39:00.72#ibcon#about to read 3, iclass 17, count 0 2006.229.20:39:00.75#ibcon#read 3, iclass 17, count 0 2006.229.20:39:00.75#ibcon#about to read 4, iclass 17, count 0 2006.229.20:39:00.75#ibcon#read 4, iclass 17, count 0 2006.229.20:39:00.75#ibcon#about to read 5, iclass 17, count 0 2006.229.20:39:00.75#ibcon#read 5, iclass 17, count 0 2006.229.20:39:00.75#ibcon#about to read 6, iclass 17, count 0 2006.229.20:39:00.75#ibcon#read 6, iclass 17, count 0 2006.229.20:39:00.75#ibcon#end of sib2, iclass 17, count 0 2006.229.20:39:00.75#ibcon#*after write, iclass 17, count 0 2006.229.20:39:00.75#ibcon#*before return 0, iclass 17, count 0 2006.229.20:39:00.75#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:39:00.75#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:39:00.75#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:39:00.75#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:39:00.75$setupk4/ifdk4 2006.229.20:39:00.75$ifdk4/lo= 2006.229.20:39:00.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:39:00.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:39:00.75$ifdk4/patch= 2006.229.20:39:00.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:39:00.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:39:00.75$setupk4/!*+20s 2006.229.20:39:03.76#abcon#<5=/07 1.8 3.3 25.951001001.8\r\n> 2006.229.20:39:03.78#abcon#{5=INTERFACE CLEAR} 2006.229.20:39:03.84#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:39:13.93#abcon#<5=/07 1.8 3.3 25.951001001.8\r\n> 2006.229.20:39:13.95#abcon#{5=INTERFACE CLEAR} 2006.229.20:39:14.01#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:39:15.13#trakl#Source acquired 2006.229.20:39:15.13#flagr#flagr/antenna,acquired 2006.229.20:39:15.25$setupk4/"tpicd 2006.229.20:39:15.25$setupk4/echo=off 2006.229.20:39:15.25$setupk4/xlog=off 2006.229.20:39:15.25:!2006.229.20:41:12 2006.229.20:41:12.00:preob 2006.229.20:41:13.14/onsource/TRACKING 2006.229.20:41:13.14:!2006.229.20:41:22 2006.229.20:41:22.00:"tape 2006.229.20:41:22.00:"st=record 2006.229.20:41:22.00:data_valid=on 2006.229.20:41:22.00:midob 2006.229.20:41:22.14/onsource/TRACKING 2006.229.20:41:22.14/wx/25.96,1001.8,100 2006.229.20:41:22.27/cable/+6.4201E-03 2006.229.20:41:23.36/va/01,08,usb,yes,31,34 2006.229.20:41:23.36/va/02,07,usb,yes,34,35 2006.229.20:41:23.36/va/03,06,usb,yes,42,45 2006.229.20:41:23.36/va/04,07,usb,yes,35,37 2006.229.20:41:23.36/va/05,04,usb,yes,32,32 2006.229.20:41:23.36/va/06,04,usb,yes,35,35 2006.229.20:41:23.36/va/07,05,usb,yes,31,32 2006.229.20:41:23.36/va/08,06,usb,yes,23,28 2006.229.20:41:23.59/valo/01,524.99,yes,locked 2006.229.20:41:23.59/valo/02,534.99,yes,locked 2006.229.20:41:23.59/valo/03,564.99,yes,locked 2006.229.20:41:23.59/valo/04,624.99,yes,locked 2006.229.20:41:23.59/valo/05,734.99,yes,locked 2006.229.20:41:23.59/valo/06,814.99,yes,locked 2006.229.20:41:23.59/valo/07,864.99,yes,locked 2006.229.20:41:23.59/valo/08,884.99,yes,locked 2006.229.20:41:24.68/vb/01,04,usb,yes,32,30 2006.229.20:41:24.68/vb/02,04,usb,yes,35,35 2006.229.20:41:24.68/vb/03,04,usb,yes,31,35 2006.229.20:41:24.68/vb/04,04,usb,yes,36,35 2006.229.20:41:24.68/vb/05,04,usb,yes,28,31 2006.229.20:41:24.68/vb/06,04,usb,yes,33,29 2006.229.20:41:24.68/vb/07,04,usb,yes,33,32 2006.229.20:41:24.68/vb/08,04,usb,yes,30,34 2006.229.20:41:24.91/vblo/01,629.99,yes,locked 2006.229.20:41:24.91/vblo/02,634.99,yes,locked 2006.229.20:41:24.91/vblo/03,649.99,yes,locked 2006.229.20:41:24.91/vblo/04,679.99,yes,locked 2006.229.20:41:24.91/vblo/05,709.99,yes,locked 2006.229.20:41:24.91/vblo/06,719.99,yes,locked 2006.229.20:41:24.91/vblo/07,734.99,yes,locked 2006.229.20:41:24.91/vblo/08,744.99,yes,locked 2006.229.20:41:25.06/vabw/8 2006.229.20:41:25.21/vbbw/8 2006.229.20:41:25.30/xfe/off,on,12.2 2006.229.20:41:25.67/ifatt/23,28,28,28 2006.229.20:41:26.08/fmout-gps/S +4.62E-07 2006.229.20:41:26.12:!2006.229.20:42:42 2006.229.20:42:42.00:data_valid=off 2006.229.20:42:42.00:"et 2006.229.20:42:42.00:!+3s 2006.229.20:42:45.01:"tape 2006.229.20:42:45.01:postob 2006.229.20:42:45.13/cable/+6.4220E-03 2006.229.20:42:45.13/wx/25.98,1001.8,100 2006.229.20:42:46.08/fmout-gps/S +4.63E-07 2006.229.20:42:46.08:scan_name=229-2046,jd0608,240 2006.229.20:42:46.08:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.20:42:47.14#flagr#flagr/antenna,new-source 2006.229.20:42:47.14:checkk5 2006.229.20:42:47.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:42:47.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:42:48.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:42:48.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:42:49.13/chk_obsdata//k5ts1/T2292041??a.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.20:42:49.54/chk_obsdata//k5ts2/T2292041??b.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.20:42:49.93/chk_obsdata//k5ts3/T2292041??c.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.20:42:50.32/chk_obsdata//k5ts4/T2292041??d.dat file size is correct (nominal:320MB, actual:316MB). 2006.229.20:42:51.04/k5log//k5ts1_log_newline 2006.229.20:42:51.74/k5log//k5ts2_log_newline 2006.229.20:42:52.44/k5log//k5ts3_log_newline 2006.229.20:42:53.14/k5log//k5ts4_log_newline 2006.229.20:42:53.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:42:53.16:setupk4=1 2006.229.20:42:53.16$setupk4/echo=on 2006.229.20:42:53.16$setupk4/pcalon 2006.229.20:42:53.17$pcalon/"no phase cal control is implemented here 2006.229.20:42:53.17$setupk4/"tpicd=stop 2006.229.20:42:53.17$setupk4/"rec=synch_on 2006.229.20:42:53.17$setupk4/"rec_mode=128 2006.229.20:42:53.17$setupk4/!* 2006.229.20:42:53.17$setupk4/recpk4 2006.229.20:42:53.17$recpk4/recpatch= 2006.229.20:42:53.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:42:53.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:42:53.17$setupk4/vck44 2006.229.20:42:53.17$vck44/valo=1,524.99 2006.229.20:42:53.17#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.20:42:53.17#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.20:42:53.17#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:53.17#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:53.17#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:53.17#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:53.17#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:42:53.17#ibcon#first serial, iclass 4, count 0 2006.229.20:42:53.17#ibcon#enter sib2, iclass 4, count 0 2006.229.20:42:53.17#ibcon#flushed, iclass 4, count 0 2006.229.20:42:53.17#ibcon#about to write, iclass 4, count 0 2006.229.20:42:53.17#ibcon#wrote, iclass 4, count 0 2006.229.20:42:53.17#ibcon#about to read 3, iclass 4, count 0 2006.229.20:42:53.19#ibcon#read 3, iclass 4, count 0 2006.229.20:42:53.19#ibcon#about to read 4, iclass 4, count 0 2006.229.20:42:53.19#ibcon#read 4, iclass 4, count 0 2006.229.20:42:53.19#ibcon#about to read 5, iclass 4, count 0 2006.229.20:42:53.19#ibcon#read 5, iclass 4, count 0 2006.229.20:42:53.19#ibcon#about to read 6, iclass 4, count 0 2006.229.20:42:53.19#ibcon#read 6, iclass 4, count 0 2006.229.20:42:53.19#ibcon#end of sib2, iclass 4, count 0 2006.229.20:42:53.19#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:42:53.19#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:42:53.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:42:53.19#ibcon#*before write, iclass 4, count 0 2006.229.20:42:53.19#ibcon#enter sib2, iclass 4, count 0 2006.229.20:42:53.19#ibcon#flushed, iclass 4, count 0 2006.229.20:42:53.19#ibcon#about to write, iclass 4, count 0 2006.229.20:42:53.19#ibcon#wrote, iclass 4, count 0 2006.229.20:42:53.19#ibcon#about to read 3, iclass 4, count 0 2006.229.20:42:53.24#ibcon#read 3, iclass 4, count 0 2006.229.20:42:53.24#ibcon#about to read 4, iclass 4, count 0 2006.229.20:42:53.24#ibcon#read 4, iclass 4, count 0 2006.229.20:42:53.24#ibcon#about to read 5, iclass 4, count 0 2006.229.20:42:53.24#ibcon#read 5, iclass 4, count 0 2006.229.20:42:53.24#ibcon#about to read 6, iclass 4, count 0 2006.229.20:42:53.24#ibcon#read 6, iclass 4, count 0 2006.229.20:42:53.24#ibcon#end of sib2, iclass 4, count 0 2006.229.20:42:53.24#ibcon#*after write, iclass 4, count 0 2006.229.20:42:53.24#ibcon#*before return 0, iclass 4, count 0 2006.229.20:42:53.24#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:53.24#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:53.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:42:53.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:42:53.24$vck44/va=1,8 2006.229.20:42:53.24#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.20:42:53.24#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.20:42:53.24#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:53.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:53.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:53.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:53.24#ibcon#enter wrdev, iclass 6, count 2 2006.229.20:42:53.24#ibcon#first serial, iclass 6, count 2 2006.229.20:42:53.24#ibcon#enter sib2, iclass 6, count 2 2006.229.20:42:53.24#ibcon#flushed, iclass 6, count 2 2006.229.20:42:53.24#ibcon#about to write, iclass 6, count 2 2006.229.20:42:53.24#ibcon#wrote, iclass 6, count 2 2006.229.20:42:53.24#ibcon#about to read 3, iclass 6, count 2 2006.229.20:42:53.26#ibcon#read 3, iclass 6, count 2 2006.229.20:42:53.26#ibcon#about to read 4, iclass 6, count 2 2006.229.20:42:53.26#ibcon#read 4, iclass 6, count 2 2006.229.20:42:53.26#ibcon#about to read 5, iclass 6, count 2 2006.229.20:42:53.26#ibcon#read 5, iclass 6, count 2 2006.229.20:42:53.26#ibcon#about to read 6, iclass 6, count 2 2006.229.20:42:53.26#ibcon#read 6, iclass 6, count 2 2006.229.20:42:53.26#ibcon#end of sib2, iclass 6, count 2 2006.229.20:42:53.26#ibcon#*mode == 0, iclass 6, count 2 2006.229.20:42:53.26#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.20:42:53.26#ibcon#[25=AT01-08\r\n] 2006.229.20:42:53.26#ibcon#*before write, iclass 6, count 2 2006.229.20:42:53.26#ibcon#enter sib2, iclass 6, count 2 2006.229.20:42:53.26#ibcon#flushed, iclass 6, count 2 2006.229.20:42:53.26#ibcon#about to write, iclass 6, count 2 2006.229.20:42:53.26#ibcon#wrote, iclass 6, count 2 2006.229.20:42:53.26#ibcon#about to read 3, iclass 6, count 2 2006.229.20:42:53.29#ibcon#read 3, iclass 6, count 2 2006.229.20:42:53.29#ibcon#about to read 4, iclass 6, count 2 2006.229.20:42:53.29#ibcon#read 4, iclass 6, count 2 2006.229.20:42:53.29#ibcon#about to read 5, iclass 6, count 2 2006.229.20:42:53.29#ibcon#read 5, iclass 6, count 2 2006.229.20:42:53.29#ibcon#about to read 6, iclass 6, count 2 2006.229.20:42:53.29#ibcon#read 6, iclass 6, count 2 2006.229.20:42:53.29#ibcon#end of sib2, iclass 6, count 2 2006.229.20:42:53.29#ibcon#*after write, iclass 6, count 2 2006.229.20:42:53.29#ibcon#*before return 0, iclass 6, count 2 2006.229.20:42:53.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:53.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:53.29#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.20:42:53.29#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:53.29#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:53.41#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:53.41#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:53.41#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:42:53.41#ibcon#first serial, iclass 6, count 0 2006.229.20:42:53.41#ibcon#enter sib2, iclass 6, count 0 2006.229.20:42:53.41#ibcon#flushed, iclass 6, count 0 2006.229.20:42:53.41#ibcon#about to write, iclass 6, count 0 2006.229.20:42:53.41#ibcon#wrote, iclass 6, count 0 2006.229.20:42:53.41#ibcon#about to read 3, iclass 6, count 0 2006.229.20:42:53.43#ibcon#read 3, iclass 6, count 0 2006.229.20:42:53.43#ibcon#about to read 4, iclass 6, count 0 2006.229.20:42:53.43#ibcon#read 4, iclass 6, count 0 2006.229.20:42:53.43#ibcon#about to read 5, iclass 6, count 0 2006.229.20:42:53.43#ibcon#read 5, iclass 6, count 0 2006.229.20:42:53.43#ibcon#about to read 6, iclass 6, count 0 2006.229.20:42:53.43#ibcon#read 6, iclass 6, count 0 2006.229.20:42:53.43#ibcon#end of sib2, iclass 6, count 0 2006.229.20:42:53.43#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:42:53.43#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:42:53.43#ibcon#[25=USB\r\n] 2006.229.20:42:53.43#ibcon#*before write, iclass 6, count 0 2006.229.20:42:53.43#ibcon#enter sib2, iclass 6, count 0 2006.229.20:42:53.43#ibcon#flushed, iclass 6, count 0 2006.229.20:42:53.43#ibcon#about to write, iclass 6, count 0 2006.229.20:42:53.43#ibcon#wrote, iclass 6, count 0 2006.229.20:42:53.43#ibcon#about to read 3, iclass 6, count 0 2006.229.20:42:53.46#ibcon#read 3, iclass 6, count 0 2006.229.20:42:53.46#ibcon#about to read 4, iclass 6, count 0 2006.229.20:42:53.46#ibcon#read 4, iclass 6, count 0 2006.229.20:42:53.46#ibcon#about to read 5, iclass 6, count 0 2006.229.20:42:53.46#ibcon#read 5, iclass 6, count 0 2006.229.20:42:53.46#ibcon#about to read 6, iclass 6, count 0 2006.229.20:42:53.46#ibcon#read 6, iclass 6, count 0 2006.229.20:42:53.46#ibcon#end of sib2, iclass 6, count 0 2006.229.20:42:53.46#ibcon#*after write, iclass 6, count 0 2006.229.20:42:53.46#ibcon#*before return 0, iclass 6, count 0 2006.229.20:42:53.46#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:53.46#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:53.46#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:42:53.46#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:42:53.46$vck44/valo=2,534.99 2006.229.20:42:53.46#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.20:42:53.46#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.20:42:53.46#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:53.46#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:53.46#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:53.46#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:53.46#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:42:53.46#ibcon#first serial, iclass 10, count 0 2006.229.20:42:53.46#ibcon#enter sib2, iclass 10, count 0 2006.229.20:42:53.46#ibcon#flushed, iclass 10, count 0 2006.229.20:42:53.46#ibcon#about to write, iclass 10, count 0 2006.229.20:42:53.46#ibcon#wrote, iclass 10, count 0 2006.229.20:42:53.46#ibcon#about to read 3, iclass 10, count 0 2006.229.20:42:53.48#ibcon#read 3, iclass 10, count 0 2006.229.20:42:53.48#ibcon#about to read 4, iclass 10, count 0 2006.229.20:42:53.48#ibcon#read 4, iclass 10, count 0 2006.229.20:42:53.48#ibcon#about to read 5, iclass 10, count 0 2006.229.20:42:53.48#ibcon#read 5, iclass 10, count 0 2006.229.20:42:53.48#ibcon#about to read 6, iclass 10, count 0 2006.229.20:42:53.48#ibcon#read 6, iclass 10, count 0 2006.229.20:42:53.48#ibcon#end of sib2, iclass 10, count 0 2006.229.20:42:53.48#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:42:53.48#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:42:53.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:42:53.48#ibcon#*before write, iclass 10, count 0 2006.229.20:42:53.48#ibcon#enter sib2, iclass 10, count 0 2006.229.20:42:53.48#ibcon#flushed, iclass 10, count 0 2006.229.20:42:53.48#ibcon#about to write, iclass 10, count 0 2006.229.20:42:53.48#ibcon#wrote, iclass 10, count 0 2006.229.20:42:53.48#ibcon#about to read 3, iclass 10, count 0 2006.229.20:42:53.52#ibcon#read 3, iclass 10, count 0 2006.229.20:42:53.52#ibcon#about to read 4, iclass 10, count 0 2006.229.20:42:53.52#ibcon#read 4, iclass 10, count 0 2006.229.20:42:53.52#ibcon#about to read 5, iclass 10, count 0 2006.229.20:42:53.52#ibcon#read 5, iclass 10, count 0 2006.229.20:42:53.52#ibcon#about to read 6, iclass 10, count 0 2006.229.20:42:53.52#ibcon#read 6, iclass 10, count 0 2006.229.20:42:53.52#ibcon#end of sib2, iclass 10, count 0 2006.229.20:42:53.52#ibcon#*after write, iclass 10, count 0 2006.229.20:42:53.52#ibcon#*before return 0, iclass 10, count 0 2006.229.20:42:53.52#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:53.52#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:53.52#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:42:53.52#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:42:53.52$vck44/va=2,7 2006.229.20:42:53.52#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.20:42:53.52#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.20:42:53.52#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:53.52#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:53.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:53.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:53.58#ibcon#enter wrdev, iclass 12, count 2 2006.229.20:42:53.58#ibcon#first serial, iclass 12, count 2 2006.229.20:42:53.58#ibcon#enter sib2, iclass 12, count 2 2006.229.20:42:53.58#ibcon#flushed, iclass 12, count 2 2006.229.20:42:53.58#ibcon#about to write, iclass 12, count 2 2006.229.20:42:53.58#ibcon#wrote, iclass 12, count 2 2006.229.20:42:53.58#ibcon#about to read 3, iclass 12, count 2 2006.229.20:42:53.60#ibcon#read 3, iclass 12, count 2 2006.229.20:42:53.60#ibcon#about to read 4, iclass 12, count 2 2006.229.20:42:53.60#ibcon#read 4, iclass 12, count 2 2006.229.20:42:53.60#ibcon#about to read 5, iclass 12, count 2 2006.229.20:42:53.60#ibcon#read 5, iclass 12, count 2 2006.229.20:42:53.60#ibcon#about to read 6, iclass 12, count 2 2006.229.20:42:53.60#ibcon#read 6, iclass 12, count 2 2006.229.20:42:53.60#ibcon#end of sib2, iclass 12, count 2 2006.229.20:42:53.60#ibcon#*mode == 0, iclass 12, count 2 2006.229.20:42:53.60#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.20:42:53.60#ibcon#[25=AT02-07\r\n] 2006.229.20:42:53.60#ibcon#*before write, iclass 12, count 2 2006.229.20:42:53.60#ibcon#enter sib2, iclass 12, count 2 2006.229.20:42:53.60#ibcon#flushed, iclass 12, count 2 2006.229.20:42:53.60#ibcon#about to write, iclass 12, count 2 2006.229.20:42:53.60#ibcon#wrote, iclass 12, count 2 2006.229.20:42:53.60#ibcon#about to read 3, iclass 12, count 2 2006.229.20:42:53.63#ibcon#read 3, iclass 12, count 2 2006.229.20:42:53.63#ibcon#about to read 4, iclass 12, count 2 2006.229.20:42:53.63#ibcon#read 4, iclass 12, count 2 2006.229.20:42:53.63#ibcon#about to read 5, iclass 12, count 2 2006.229.20:42:53.63#ibcon#read 5, iclass 12, count 2 2006.229.20:42:53.63#ibcon#about to read 6, iclass 12, count 2 2006.229.20:42:53.63#ibcon#read 6, iclass 12, count 2 2006.229.20:42:53.63#ibcon#end of sib2, iclass 12, count 2 2006.229.20:42:53.63#ibcon#*after write, iclass 12, count 2 2006.229.20:42:53.63#ibcon#*before return 0, iclass 12, count 2 2006.229.20:42:53.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:53.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:53.63#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.20:42:53.63#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:53.63#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:53.75#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:53.75#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:53.75#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:42:53.75#ibcon#first serial, iclass 12, count 0 2006.229.20:42:53.75#ibcon#enter sib2, iclass 12, count 0 2006.229.20:42:53.75#ibcon#flushed, iclass 12, count 0 2006.229.20:42:53.75#ibcon#about to write, iclass 12, count 0 2006.229.20:42:53.75#ibcon#wrote, iclass 12, count 0 2006.229.20:42:53.75#ibcon#about to read 3, iclass 12, count 0 2006.229.20:42:53.77#ibcon#read 3, iclass 12, count 0 2006.229.20:42:53.77#ibcon#about to read 4, iclass 12, count 0 2006.229.20:42:53.77#ibcon#read 4, iclass 12, count 0 2006.229.20:42:53.77#ibcon#about to read 5, iclass 12, count 0 2006.229.20:42:53.77#ibcon#read 5, iclass 12, count 0 2006.229.20:42:53.77#ibcon#about to read 6, iclass 12, count 0 2006.229.20:42:53.77#ibcon#read 6, iclass 12, count 0 2006.229.20:42:53.77#ibcon#end of sib2, iclass 12, count 0 2006.229.20:42:53.77#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:42:53.77#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:42:53.77#ibcon#[25=USB\r\n] 2006.229.20:42:53.77#ibcon#*before write, iclass 12, count 0 2006.229.20:42:53.77#ibcon#enter sib2, iclass 12, count 0 2006.229.20:42:53.77#ibcon#flushed, iclass 12, count 0 2006.229.20:42:53.77#ibcon#about to write, iclass 12, count 0 2006.229.20:42:53.77#ibcon#wrote, iclass 12, count 0 2006.229.20:42:53.77#ibcon#about to read 3, iclass 12, count 0 2006.229.20:42:53.80#ibcon#read 3, iclass 12, count 0 2006.229.20:42:53.80#ibcon#about to read 4, iclass 12, count 0 2006.229.20:42:53.80#ibcon#read 4, iclass 12, count 0 2006.229.20:42:53.80#ibcon#about to read 5, iclass 12, count 0 2006.229.20:42:53.80#ibcon#read 5, iclass 12, count 0 2006.229.20:42:53.80#ibcon#about to read 6, iclass 12, count 0 2006.229.20:42:53.80#ibcon#read 6, iclass 12, count 0 2006.229.20:42:53.80#ibcon#end of sib2, iclass 12, count 0 2006.229.20:42:53.80#ibcon#*after write, iclass 12, count 0 2006.229.20:42:53.80#ibcon#*before return 0, iclass 12, count 0 2006.229.20:42:53.80#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:53.80#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:53.80#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:42:53.80#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:42:53.80$vck44/valo=3,564.99 2006.229.20:42:53.80#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.20:42:53.80#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.20:42:53.80#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:53.80#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:53.80#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:53.80#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:53.80#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:42:53.80#ibcon#first serial, iclass 14, count 0 2006.229.20:42:53.80#ibcon#enter sib2, iclass 14, count 0 2006.229.20:42:53.80#ibcon#flushed, iclass 14, count 0 2006.229.20:42:53.80#ibcon#about to write, iclass 14, count 0 2006.229.20:42:53.80#ibcon#wrote, iclass 14, count 0 2006.229.20:42:53.80#ibcon#about to read 3, iclass 14, count 0 2006.229.20:42:53.82#ibcon#read 3, iclass 14, count 0 2006.229.20:42:53.82#ibcon#about to read 4, iclass 14, count 0 2006.229.20:42:53.82#ibcon#read 4, iclass 14, count 0 2006.229.20:42:53.82#ibcon#about to read 5, iclass 14, count 0 2006.229.20:42:53.82#ibcon#read 5, iclass 14, count 0 2006.229.20:42:53.82#ibcon#about to read 6, iclass 14, count 0 2006.229.20:42:53.82#ibcon#read 6, iclass 14, count 0 2006.229.20:42:53.82#ibcon#end of sib2, iclass 14, count 0 2006.229.20:42:53.82#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:42:53.82#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:42:53.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:42:53.82#ibcon#*before write, iclass 14, count 0 2006.229.20:42:53.82#ibcon#enter sib2, iclass 14, count 0 2006.229.20:42:53.82#ibcon#flushed, iclass 14, count 0 2006.229.20:42:53.82#ibcon#about to write, iclass 14, count 0 2006.229.20:42:53.82#ibcon#wrote, iclass 14, count 0 2006.229.20:42:53.82#ibcon#about to read 3, iclass 14, count 0 2006.229.20:42:53.86#ibcon#read 3, iclass 14, count 0 2006.229.20:42:53.86#ibcon#about to read 4, iclass 14, count 0 2006.229.20:42:53.86#ibcon#read 4, iclass 14, count 0 2006.229.20:42:53.86#ibcon#about to read 5, iclass 14, count 0 2006.229.20:42:53.86#ibcon#read 5, iclass 14, count 0 2006.229.20:42:53.86#ibcon#about to read 6, iclass 14, count 0 2006.229.20:42:53.86#ibcon#read 6, iclass 14, count 0 2006.229.20:42:53.86#ibcon#end of sib2, iclass 14, count 0 2006.229.20:42:53.86#ibcon#*after write, iclass 14, count 0 2006.229.20:42:53.86#ibcon#*before return 0, iclass 14, count 0 2006.229.20:42:53.86#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:53.86#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:53.86#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:42:53.86#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:42:53.86$vck44/va=3,6 2006.229.20:42:53.86#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.20:42:53.86#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.20:42:53.86#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:53.86#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:53.92#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:53.92#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:53.92#ibcon#enter wrdev, iclass 16, count 2 2006.229.20:42:53.92#ibcon#first serial, iclass 16, count 2 2006.229.20:42:53.92#ibcon#enter sib2, iclass 16, count 2 2006.229.20:42:53.92#ibcon#flushed, iclass 16, count 2 2006.229.20:42:53.92#ibcon#about to write, iclass 16, count 2 2006.229.20:42:53.92#ibcon#wrote, iclass 16, count 2 2006.229.20:42:53.92#ibcon#about to read 3, iclass 16, count 2 2006.229.20:42:53.94#ibcon#read 3, iclass 16, count 2 2006.229.20:42:53.94#ibcon#about to read 4, iclass 16, count 2 2006.229.20:42:53.94#ibcon#read 4, iclass 16, count 2 2006.229.20:42:53.94#ibcon#about to read 5, iclass 16, count 2 2006.229.20:42:53.94#ibcon#read 5, iclass 16, count 2 2006.229.20:42:53.94#ibcon#about to read 6, iclass 16, count 2 2006.229.20:42:53.94#ibcon#read 6, iclass 16, count 2 2006.229.20:42:53.94#ibcon#end of sib2, iclass 16, count 2 2006.229.20:42:53.94#ibcon#*mode == 0, iclass 16, count 2 2006.229.20:42:53.94#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.20:42:53.94#ibcon#[25=AT03-06\r\n] 2006.229.20:42:53.94#ibcon#*before write, iclass 16, count 2 2006.229.20:42:53.94#ibcon#enter sib2, iclass 16, count 2 2006.229.20:42:53.94#ibcon#flushed, iclass 16, count 2 2006.229.20:42:53.94#ibcon#about to write, iclass 16, count 2 2006.229.20:42:53.94#ibcon#wrote, iclass 16, count 2 2006.229.20:42:53.94#ibcon#about to read 3, iclass 16, count 2 2006.229.20:42:53.97#ibcon#read 3, iclass 16, count 2 2006.229.20:42:53.97#ibcon#about to read 4, iclass 16, count 2 2006.229.20:42:53.97#ibcon#read 4, iclass 16, count 2 2006.229.20:42:53.97#ibcon#about to read 5, iclass 16, count 2 2006.229.20:42:53.97#ibcon#read 5, iclass 16, count 2 2006.229.20:42:53.97#ibcon#about to read 6, iclass 16, count 2 2006.229.20:42:53.97#ibcon#read 6, iclass 16, count 2 2006.229.20:42:53.97#ibcon#end of sib2, iclass 16, count 2 2006.229.20:42:53.97#ibcon#*after write, iclass 16, count 2 2006.229.20:42:53.97#ibcon#*before return 0, iclass 16, count 2 2006.229.20:42:53.97#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:53.97#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:53.97#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.20:42:53.97#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:53.97#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:54.09#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:54.09#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:54.09#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:42:54.09#ibcon#first serial, iclass 16, count 0 2006.229.20:42:54.09#ibcon#enter sib2, iclass 16, count 0 2006.229.20:42:54.09#ibcon#flushed, iclass 16, count 0 2006.229.20:42:54.09#ibcon#about to write, iclass 16, count 0 2006.229.20:42:54.09#ibcon#wrote, iclass 16, count 0 2006.229.20:42:54.09#ibcon#about to read 3, iclass 16, count 0 2006.229.20:42:54.11#ibcon#read 3, iclass 16, count 0 2006.229.20:42:54.11#ibcon#about to read 4, iclass 16, count 0 2006.229.20:42:54.11#ibcon#read 4, iclass 16, count 0 2006.229.20:42:54.11#ibcon#about to read 5, iclass 16, count 0 2006.229.20:42:54.11#ibcon#read 5, iclass 16, count 0 2006.229.20:42:54.11#ibcon#about to read 6, iclass 16, count 0 2006.229.20:42:54.11#ibcon#read 6, iclass 16, count 0 2006.229.20:42:54.11#ibcon#end of sib2, iclass 16, count 0 2006.229.20:42:54.11#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:42:54.11#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:42:54.11#ibcon#[25=USB\r\n] 2006.229.20:42:54.11#ibcon#*before write, iclass 16, count 0 2006.229.20:42:54.11#ibcon#enter sib2, iclass 16, count 0 2006.229.20:42:54.11#ibcon#flushed, iclass 16, count 0 2006.229.20:42:54.11#ibcon#about to write, iclass 16, count 0 2006.229.20:42:54.11#ibcon#wrote, iclass 16, count 0 2006.229.20:42:54.11#ibcon#about to read 3, iclass 16, count 0 2006.229.20:42:54.14#ibcon#read 3, iclass 16, count 0 2006.229.20:42:54.14#ibcon#about to read 4, iclass 16, count 0 2006.229.20:42:54.14#ibcon#read 4, iclass 16, count 0 2006.229.20:42:54.14#ibcon#about to read 5, iclass 16, count 0 2006.229.20:42:54.14#ibcon#read 5, iclass 16, count 0 2006.229.20:42:54.14#ibcon#about to read 6, iclass 16, count 0 2006.229.20:42:54.14#ibcon#read 6, iclass 16, count 0 2006.229.20:42:54.14#ibcon#end of sib2, iclass 16, count 0 2006.229.20:42:54.14#ibcon#*after write, iclass 16, count 0 2006.229.20:42:54.14#ibcon#*before return 0, iclass 16, count 0 2006.229.20:42:54.14#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:54.14#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:54.14#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:42:54.14#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:42:54.14$vck44/valo=4,624.99 2006.229.20:42:54.14#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.20:42:54.14#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.20:42:54.14#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:54.14#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:54.14#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:54.14#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:54.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:42:54.14#ibcon#first serial, iclass 18, count 0 2006.229.20:42:54.14#ibcon#enter sib2, iclass 18, count 0 2006.229.20:42:54.14#ibcon#flushed, iclass 18, count 0 2006.229.20:42:54.14#ibcon#about to write, iclass 18, count 0 2006.229.20:42:54.14#ibcon#wrote, iclass 18, count 0 2006.229.20:42:54.14#ibcon#about to read 3, iclass 18, count 0 2006.229.20:42:54.16#ibcon#read 3, iclass 18, count 0 2006.229.20:42:54.16#ibcon#about to read 4, iclass 18, count 0 2006.229.20:42:54.16#ibcon#read 4, iclass 18, count 0 2006.229.20:42:54.16#ibcon#about to read 5, iclass 18, count 0 2006.229.20:42:54.16#ibcon#read 5, iclass 18, count 0 2006.229.20:42:54.16#ibcon#about to read 6, iclass 18, count 0 2006.229.20:42:54.16#ibcon#read 6, iclass 18, count 0 2006.229.20:42:54.16#ibcon#end of sib2, iclass 18, count 0 2006.229.20:42:54.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:42:54.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:42:54.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:42:54.16#ibcon#*before write, iclass 18, count 0 2006.229.20:42:54.16#ibcon#enter sib2, iclass 18, count 0 2006.229.20:42:54.16#ibcon#flushed, iclass 18, count 0 2006.229.20:42:54.16#ibcon#about to write, iclass 18, count 0 2006.229.20:42:54.16#ibcon#wrote, iclass 18, count 0 2006.229.20:42:54.16#ibcon#about to read 3, iclass 18, count 0 2006.229.20:42:54.20#ibcon#read 3, iclass 18, count 0 2006.229.20:42:54.20#ibcon#about to read 4, iclass 18, count 0 2006.229.20:42:54.20#ibcon#read 4, iclass 18, count 0 2006.229.20:42:54.20#ibcon#about to read 5, iclass 18, count 0 2006.229.20:42:54.20#ibcon#read 5, iclass 18, count 0 2006.229.20:42:54.20#ibcon#about to read 6, iclass 18, count 0 2006.229.20:42:54.20#ibcon#read 6, iclass 18, count 0 2006.229.20:42:54.20#ibcon#end of sib2, iclass 18, count 0 2006.229.20:42:54.20#ibcon#*after write, iclass 18, count 0 2006.229.20:42:54.20#ibcon#*before return 0, iclass 18, count 0 2006.229.20:42:54.20#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:54.20#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:54.20#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:42:54.20#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:42:54.20$vck44/va=4,7 2006.229.20:42:54.20#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.20:42:54.20#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.20:42:54.20#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:54.20#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:54.26#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:54.26#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:54.26#ibcon#enter wrdev, iclass 20, count 2 2006.229.20:42:54.26#ibcon#first serial, iclass 20, count 2 2006.229.20:42:54.26#ibcon#enter sib2, iclass 20, count 2 2006.229.20:42:54.26#ibcon#flushed, iclass 20, count 2 2006.229.20:42:54.26#ibcon#about to write, iclass 20, count 2 2006.229.20:42:54.26#ibcon#wrote, iclass 20, count 2 2006.229.20:42:54.26#ibcon#about to read 3, iclass 20, count 2 2006.229.20:42:54.28#ibcon#read 3, iclass 20, count 2 2006.229.20:42:54.28#ibcon#about to read 4, iclass 20, count 2 2006.229.20:42:54.28#ibcon#read 4, iclass 20, count 2 2006.229.20:42:54.28#ibcon#about to read 5, iclass 20, count 2 2006.229.20:42:54.28#ibcon#read 5, iclass 20, count 2 2006.229.20:42:54.28#ibcon#about to read 6, iclass 20, count 2 2006.229.20:42:54.28#ibcon#read 6, iclass 20, count 2 2006.229.20:42:54.28#ibcon#end of sib2, iclass 20, count 2 2006.229.20:42:54.28#ibcon#*mode == 0, iclass 20, count 2 2006.229.20:42:54.28#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.20:42:54.28#ibcon#[25=AT04-07\r\n] 2006.229.20:42:54.28#ibcon#*before write, iclass 20, count 2 2006.229.20:42:54.28#ibcon#enter sib2, iclass 20, count 2 2006.229.20:42:54.28#ibcon#flushed, iclass 20, count 2 2006.229.20:42:54.28#ibcon#about to write, iclass 20, count 2 2006.229.20:42:54.28#ibcon#wrote, iclass 20, count 2 2006.229.20:42:54.28#ibcon#about to read 3, iclass 20, count 2 2006.229.20:42:54.31#ibcon#read 3, iclass 20, count 2 2006.229.20:42:54.31#ibcon#about to read 4, iclass 20, count 2 2006.229.20:42:54.31#ibcon#read 4, iclass 20, count 2 2006.229.20:42:54.31#ibcon#about to read 5, iclass 20, count 2 2006.229.20:42:54.31#ibcon#read 5, iclass 20, count 2 2006.229.20:42:54.31#ibcon#about to read 6, iclass 20, count 2 2006.229.20:42:54.31#ibcon#read 6, iclass 20, count 2 2006.229.20:42:54.31#ibcon#end of sib2, iclass 20, count 2 2006.229.20:42:54.31#ibcon#*after write, iclass 20, count 2 2006.229.20:42:54.31#ibcon#*before return 0, iclass 20, count 2 2006.229.20:42:54.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:54.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:54.31#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.20:42:54.31#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:54.31#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:54.43#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:54.43#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:54.43#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:42:54.43#ibcon#first serial, iclass 20, count 0 2006.229.20:42:54.43#ibcon#enter sib2, iclass 20, count 0 2006.229.20:42:54.43#ibcon#flushed, iclass 20, count 0 2006.229.20:42:54.43#ibcon#about to write, iclass 20, count 0 2006.229.20:42:54.43#ibcon#wrote, iclass 20, count 0 2006.229.20:42:54.43#ibcon#about to read 3, iclass 20, count 0 2006.229.20:42:54.45#ibcon#read 3, iclass 20, count 0 2006.229.20:42:54.45#ibcon#about to read 4, iclass 20, count 0 2006.229.20:42:54.45#ibcon#read 4, iclass 20, count 0 2006.229.20:42:54.45#ibcon#about to read 5, iclass 20, count 0 2006.229.20:42:54.45#ibcon#read 5, iclass 20, count 0 2006.229.20:42:54.45#ibcon#about to read 6, iclass 20, count 0 2006.229.20:42:54.45#ibcon#read 6, iclass 20, count 0 2006.229.20:42:54.45#ibcon#end of sib2, iclass 20, count 0 2006.229.20:42:54.45#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:42:54.45#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:42:54.45#ibcon#[25=USB\r\n] 2006.229.20:42:54.45#ibcon#*before write, iclass 20, count 0 2006.229.20:42:54.45#ibcon#enter sib2, iclass 20, count 0 2006.229.20:42:54.45#ibcon#flushed, iclass 20, count 0 2006.229.20:42:54.45#ibcon#about to write, iclass 20, count 0 2006.229.20:42:54.45#ibcon#wrote, iclass 20, count 0 2006.229.20:42:54.45#ibcon#about to read 3, iclass 20, count 0 2006.229.20:42:54.48#ibcon#read 3, iclass 20, count 0 2006.229.20:42:54.48#ibcon#about to read 4, iclass 20, count 0 2006.229.20:42:54.48#ibcon#read 4, iclass 20, count 0 2006.229.20:42:54.48#ibcon#about to read 5, iclass 20, count 0 2006.229.20:42:54.48#ibcon#read 5, iclass 20, count 0 2006.229.20:42:54.48#ibcon#about to read 6, iclass 20, count 0 2006.229.20:42:54.48#ibcon#read 6, iclass 20, count 0 2006.229.20:42:54.48#ibcon#end of sib2, iclass 20, count 0 2006.229.20:42:54.48#ibcon#*after write, iclass 20, count 0 2006.229.20:42:54.48#ibcon#*before return 0, iclass 20, count 0 2006.229.20:42:54.48#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:54.48#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:54.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:42:54.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:42:54.48$vck44/valo=5,734.99 2006.229.20:42:54.48#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.20:42:54.48#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.20:42:54.48#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:54.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:54.48#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:54.48#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:54.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:42:54.48#ibcon#first serial, iclass 22, count 0 2006.229.20:42:54.48#ibcon#enter sib2, iclass 22, count 0 2006.229.20:42:54.48#ibcon#flushed, iclass 22, count 0 2006.229.20:42:54.48#ibcon#about to write, iclass 22, count 0 2006.229.20:42:54.48#ibcon#wrote, iclass 22, count 0 2006.229.20:42:54.48#ibcon#about to read 3, iclass 22, count 0 2006.229.20:42:54.50#ibcon#read 3, iclass 22, count 0 2006.229.20:42:54.50#ibcon#about to read 4, iclass 22, count 0 2006.229.20:42:54.50#ibcon#read 4, iclass 22, count 0 2006.229.20:42:54.50#ibcon#about to read 5, iclass 22, count 0 2006.229.20:42:54.50#ibcon#read 5, iclass 22, count 0 2006.229.20:42:54.50#ibcon#about to read 6, iclass 22, count 0 2006.229.20:42:54.50#ibcon#read 6, iclass 22, count 0 2006.229.20:42:54.50#ibcon#end of sib2, iclass 22, count 0 2006.229.20:42:54.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:42:54.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:42:54.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:42:54.50#ibcon#*before write, iclass 22, count 0 2006.229.20:42:54.50#ibcon#enter sib2, iclass 22, count 0 2006.229.20:42:54.50#ibcon#flushed, iclass 22, count 0 2006.229.20:42:54.50#ibcon#about to write, iclass 22, count 0 2006.229.20:42:54.50#ibcon#wrote, iclass 22, count 0 2006.229.20:42:54.50#ibcon#about to read 3, iclass 22, count 0 2006.229.20:42:54.54#ibcon#read 3, iclass 22, count 0 2006.229.20:42:54.54#ibcon#about to read 4, iclass 22, count 0 2006.229.20:42:54.54#ibcon#read 4, iclass 22, count 0 2006.229.20:42:54.54#ibcon#about to read 5, iclass 22, count 0 2006.229.20:42:54.54#ibcon#read 5, iclass 22, count 0 2006.229.20:42:54.54#ibcon#about to read 6, iclass 22, count 0 2006.229.20:42:54.54#ibcon#read 6, iclass 22, count 0 2006.229.20:42:54.54#ibcon#end of sib2, iclass 22, count 0 2006.229.20:42:54.54#ibcon#*after write, iclass 22, count 0 2006.229.20:42:54.54#ibcon#*before return 0, iclass 22, count 0 2006.229.20:42:54.54#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:54.54#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:54.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:42:54.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:42:54.54$vck44/va=5,4 2006.229.20:42:54.54#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.20:42:54.54#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.20:42:54.54#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:54.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:54.60#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:54.60#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:54.60#ibcon#enter wrdev, iclass 24, count 2 2006.229.20:42:54.60#ibcon#first serial, iclass 24, count 2 2006.229.20:42:54.60#ibcon#enter sib2, iclass 24, count 2 2006.229.20:42:54.60#ibcon#flushed, iclass 24, count 2 2006.229.20:42:54.60#ibcon#about to write, iclass 24, count 2 2006.229.20:42:54.60#ibcon#wrote, iclass 24, count 2 2006.229.20:42:54.60#ibcon#about to read 3, iclass 24, count 2 2006.229.20:42:54.62#ibcon#read 3, iclass 24, count 2 2006.229.20:42:54.62#ibcon#about to read 4, iclass 24, count 2 2006.229.20:42:54.62#ibcon#read 4, iclass 24, count 2 2006.229.20:42:54.62#ibcon#about to read 5, iclass 24, count 2 2006.229.20:42:54.62#ibcon#read 5, iclass 24, count 2 2006.229.20:42:54.62#ibcon#about to read 6, iclass 24, count 2 2006.229.20:42:54.62#ibcon#read 6, iclass 24, count 2 2006.229.20:42:54.62#ibcon#end of sib2, iclass 24, count 2 2006.229.20:42:54.62#ibcon#*mode == 0, iclass 24, count 2 2006.229.20:42:54.62#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.20:42:54.62#ibcon#[25=AT05-04\r\n] 2006.229.20:42:54.62#ibcon#*before write, iclass 24, count 2 2006.229.20:42:54.62#ibcon#enter sib2, iclass 24, count 2 2006.229.20:42:54.62#ibcon#flushed, iclass 24, count 2 2006.229.20:42:54.62#ibcon#about to write, iclass 24, count 2 2006.229.20:42:54.62#ibcon#wrote, iclass 24, count 2 2006.229.20:42:54.62#ibcon#about to read 3, iclass 24, count 2 2006.229.20:42:54.65#ibcon#read 3, iclass 24, count 2 2006.229.20:42:54.65#ibcon#about to read 4, iclass 24, count 2 2006.229.20:42:54.65#ibcon#read 4, iclass 24, count 2 2006.229.20:42:54.65#ibcon#about to read 5, iclass 24, count 2 2006.229.20:42:54.65#ibcon#read 5, iclass 24, count 2 2006.229.20:42:54.65#ibcon#about to read 6, iclass 24, count 2 2006.229.20:42:54.65#ibcon#read 6, iclass 24, count 2 2006.229.20:42:54.65#ibcon#end of sib2, iclass 24, count 2 2006.229.20:42:54.65#ibcon#*after write, iclass 24, count 2 2006.229.20:42:54.65#ibcon#*before return 0, iclass 24, count 2 2006.229.20:42:54.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:54.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:54.65#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.20:42:54.65#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:54.65#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:54.77#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:54.77#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:54.77#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:42:54.77#ibcon#first serial, iclass 24, count 0 2006.229.20:42:54.77#ibcon#enter sib2, iclass 24, count 0 2006.229.20:42:54.77#ibcon#flushed, iclass 24, count 0 2006.229.20:42:54.77#ibcon#about to write, iclass 24, count 0 2006.229.20:42:54.77#ibcon#wrote, iclass 24, count 0 2006.229.20:42:54.77#ibcon#about to read 3, iclass 24, count 0 2006.229.20:42:54.79#ibcon#read 3, iclass 24, count 0 2006.229.20:42:54.79#ibcon#about to read 4, iclass 24, count 0 2006.229.20:42:54.79#ibcon#read 4, iclass 24, count 0 2006.229.20:42:54.79#ibcon#about to read 5, iclass 24, count 0 2006.229.20:42:54.79#ibcon#read 5, iclass 24, count 0 2006.229.20:42:54.79#ibcon#about to read 6, iclass 24, count 0 2006.229.20:42:54.79#ibcon#read 6, iclass 24, count 0 2006.229.20:42:54.79#ibcon#end of sib2, iclass 24, count 0 2006.229.20:42:54.79#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:42:54.79#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:42:54.79#ibcon#[25=USB\r\n] 2006.229.20:42:54.79#ibcon#*before write, iclass 24, count 0 2006.229.20:42:54.79#ibcon#enter sib2, iclass 24, count 0 2006.229.20:42:54.79#ibcon#flushed, iclass 24, count 0 2006.229.20:42:54.79#ibcon#about to write, iclass 24, count 0 2006.229.20:42:54.79#ibcon#wrote, iclass 24, count 0 2006.229.20:42:54.79#ibcon#about to read 3, iclass 24, count 0 2006.229.20:42:54.82#ibcon#read 3, iclass 24, count 0 2006.229.20:42:54.82#ibcon#about to read 4, iclass 24, count 0 2006.229.20:42:54.82#ibcon#read 4, iclass 24, count 0 2006.229.20:42:54.82#ibcon#about to read 5, iclass 24, count 0 2006.229.20:42:54.82#ibcon#read 5, iclass 24, count 0 2006.229.20:42:54.82#ibcon#about to read 6, iclass 24, count 0 2006.229.20:42:54.82#ibcon#read 6, iclass 24, count 0 2006.229.20:42:54.82#ibcon#end of sib2, iclass 24, count 0 2006.229.20:42:54.82#ibcon#*after write, iclass 24, count 0 2006.229.20:42:54.82#ibcon#*before return 0, iclass 24, count 0 2006.229.20:42:54.82#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:54.82#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:54.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:42:54.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:42:54.82$vck44/valo=6,814.99 2006.229.20:42:54.82#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.20:42:54.82#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.20:42:54.82#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:54.82#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:42:54.82#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:42:54.82#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:42:54.82#ibcon#enter wrdev, iclass 26, count 0 2006.229.20:42:54.82#ibcon#first serial, iclass 26, count 0 2006.229.20:42:54.82#ibcon#enter sib2, iclass 26, count 0 2006.229.20:42:54.82#ibcon#flushed, iclass 26, count 0 2006.229.20:42:54.82#ibcon#about to write, iclass 26, count 0 2006.229.20:42:54.82#ibcon#wrote, iclass 26, count 0 2006.229.20:42:54.82#ibcon#about to read 3, iclass 26, count 0 2006.229.20:42:54.84#ibcon#read 3, iclass 26, count 0 2006.229.20:42:54.84#ibcon#about to read 4, iclass 26, count 0 2006.229.20:42:54.84#ibcon#read 4, iclass 26, count 0 2006.229.20:42:54.84#ibcon#about to read 5, iclass 26, count 0 2006.229.20:42:54.84#ibcon#read 5, iclass 26, count 0 2006.229.20:42:54.84#ibcon#about to read 6, iclass 26, count 0 2006.229.20:42:54.84#ibcon#read 6, iclass 26, count 0 2006.229.20:42:54.84#ibcon#end of sib2, iclass 26, count 0 2006.229.20:42:54.84#ibcon#*mode == 0, iclass 26, count 0 2006.229.20:42:54.84#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.20:42:54.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:42:54.84#ibcon#*before write, iclass 26, count 0 2006.229.20:42:54.84#ibcon#enter sib2, iclass 26, count 0 2006.229.20:42:54.84#ibcon#flushed, iclass 26, count 0 2006.229.20:42:54.84#ibcon#about to write, iclass 26, count 0 2006.229.20:42:54.84#ibcon#wrote, iclass 26, count 0 2006.229.20:42:54.84#ibcon#about to read 3, iclass 26, count 0 2006.229.20:42:54.88#ibcon#read 3, iclass 26, count 0 2006.229.20:42:54.88#ibcon#about to read 4, iclass 26, count 0 2006.229.20:42:54.88#ibcon#read 4, iclass 26, count 0 2006.229.20:42:54.88#ibcon#about to read 5, iclass 26, count 0 2006.229.20:42:54.88#ibcon#read 5, iclass 26, count 0 2006.229.20:42:54.88#ibcon#about to read 6, iclass 26, count 0 2006.229.20:42:54.88#ibcon#read 6, iclass 26, count 0 2006.229.20:42:54.88#ibcon#end of sib2, iclass 26, count 0 2006.229.20:42:54.88#ibcon#*after write, iclass 26, count 0 2006.229.20:42:54.88#ibcon#*before return 0, iclass 26, count 0 2006.229.20:42:54.88#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:42:54.88#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.20:42:54.88#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.20:42:54.88#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.20:42:54.88$vck44/va=6,4 2006.229.20:42:54.88#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.20:42:54.88#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.20:42:54.88#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:54.88#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:42:54.94#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:42:54.94#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:42:54.94#ibcon#enter wrdev, iclass 28, count 2 2006.229.20:42:54.94#ibcon#first serial, iclass 28, count 2 2006.229.20:42:54.94#ibcon#enter sib2, iclass 28, count 2 2006.229.20:42:54.94#ibcon#flushed, iclass 28, count 2 2006.229.20:42:54.94#ibcon#about to write, iclass 28, count 2 2006.229.20:42:54.94#ibcon#wrote, iclass 28, count 2 2006.229.20:42:54.94#ibcon#about to read 3, iclass 28, count 2 2006.229.20:42:54.96#ibcon#read 3, iclass 28, count 2 2006.229.20:42:54.96#ibcon#about to read 4, iclass 28, count 2 2006.229.20:42:54.96#ibcon#read 4, iclass 28, count 2 2006.229.20:42:54.96#ibcon#about to read 5, iclass 28, count 2 2006.229.20:42:54.96#ibcon#read 5, iclass 28, count 2 2006.229.20:42:54.96#ibcon#about to read 6, iclass 28, count 2 2006.229.20:42:54.96#ibcon#read 6, iclass 28, count 2 2006.229.20:42:54.96#ibcon#end of sib2, iclass 28, count 2 2006.229.20:42:54.96#ibcon#*mode == 0, iclass 28, count 2 2006.229.20:42:54.96#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.20:42:54.96#ibcon#[25=AT06-04\r\n] 2006.229.20:42:54.96#ibcon#*before write, iclass 28, count 2 2006.229.20:42:54.96#ibcon#enter sib2, iclass 28, count 2 2006.229.20:42:54.96#ibcon#flushed, iclass 28, count 2 2006.229.20:42:54.96#ibcon#about to write, iclass 28, count 2 2006.229.20:42:54.96#ibcon#wrote, iclass 28, count 2 2006.229.20:42:54.96#ibcon#about to read 3, iclass 28, count 2 2006.229.20:42:54.99#ibcon#read 3, iclass 28, count 2 2006.229.20:42:54.99#ibcon#about to read 4, iclass 28, count 2 2006.229.20:42:54.99#ibcon#read 4, iclass 28, count 2 2006.229.20:42:54.99#ibcon#about to read 5, iclass 28, count 2 2006.229.20:42:54.99#ibcon#read 5, iclass 28, count 2 2006.229.20:42:54.99#ibcon#about to read 6, iclass 28, count 2 2006.229.20:42:54.99#ibcon#read 6, iclass 28, count 2 2006.229.20:42:54.99#ibcon#end of sib2, iclass 28, count 2 2006.229.20:42:54.99#ibcon#*after write, iclass 28, count 2 2006.229.20:42:54.99#ibcon#*before return 0, iclass 28, count 2 2006.229.20:42:54.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:42:54.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.20:42:54.99#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.20:42:54.99#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:54.99#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:42:55.11#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:42:55.11#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:42:55.11#ibcon#enter wrdev, iclass 28, count 0 2006.229.20:42:55.11#ibcon#first serial, iclass 28, count 0 2006.229.20:42:55.11#ibcon#enter sib2, iclass 28, count 0 2006.229.20:42:55.11#ibcon#flushed, iclass 28, count 0 2006.229.20:42:55.11#ibcon#about to write, iclass 28, count 0 2006.229.20:42:55.11#ibcon#wrote, iclass 28, count 0 2006.229.20:42:55.11#ibcon#about to read 3, iclass 28, count 0 2006.229.20:42:55.13#ibcon#read 3, iclass 28, count 0 2006.229.20:42:55.13#ibcon#about to read 4, iclass 28, count 0 2006.229.20:42:55.13#ibcon#read 4, iclass 28, count 0 2006.229.20:42:55.13#ibcon#about to read 5, iclass 28, count 0 2006.229.20:42:55.13#ibcon#read 5, iclass 28, count 0 2006.229.20:42:55.13#ibcon#about to read 6, iclass 28, count 0 2006.229.20:42:55.13#ibcon#read 6, iclass 28, count 0 2006.229.20:42:55.13#ibcon#end of sib2, iclass 28, count 0 2006.229.20:42:55.13#ibcon#*mode == 0, iclass 28, count 0 2006.229.20:42:55.13#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.20:42:55.13#ibcon#[25=USB\r\n] 2006.229.20:42:55.13#ibcon#*before write, iclass 28, count 0 2006.229.20:42:55.13#ibcon#enter sib2, iclass 28, count 0 2006.229.20:42:55.13#ibcon#flushed, iclass 28, count 0 2006.229.20:42:55.13#ibcon#about to write, iclass 28, count 0 2006.229.20:42:55.13#ibcon#wrote, iclass 28, count 0 2006.229.20:42:55.13#ibcon#about to read 3, iclass 28, count 0 2006.229.20:42:55.16#ibcon#read 3, iclass 28, count 0 2006.229.20:42:55.16#ibcon#about to read 4, iclass 28, count 0 2006.229.20:42:55.16#ibcon#read 4, iclass 28, count 0 2006.229.20:42:55.16#ibcon#about to read 5, iclass 28, count 0 2006.229.20:42:55.16#ibcon#read 5, iclass 28, count 0 2006.229.20:42:55.16#ibcon#about to read 6, iclass 28, count 0 2006.229.20:42:55.16#ibcon#read 6, iclass 28, count 0 2006.229.20:42:55.16#ibcon#end of sib2, iclass 28, count 0 2006.229.20:42:55.16#ibcon#*after write, iclass 28, count 0 2006.229.20:42:55.16#ibcon#*before return 0, iclass 28, count 0 2006.229.20:42:55.16#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:42:55.16#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.20:42:55.16#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.20:42:55.16#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.20:42:55.16$vck44/valo=7,864.99 2006.229.20:42:55.16#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.20:42:55.16#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.20:42:55.16#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:55.16#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:42:55.16#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:42:55.16#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:42:55.16#ibcon#enter wrdev, iclass 30, count 0 2006.229.20:42:55.16#ibcon#first serial, iclass 30, count 0 2006.229.20:42:55.16#ibcon#enter sib2, iclass 30, count 0 2006.229.20:42:55.16#ibcon#flushed, iclass 30, count 0 2006.229.20:42:55.16#ibcon#about to write, iclass 30, count 0 2006.229.20:42:55.16#ibcon#wrote, iclass 30, count 0 2006.229.20:42:55.16#ibcon#about to read 3, iclass 30, count 0 2006.229.20:42:55.18#ibcon#read 3, iclass 30, count 0 2006.229.20:42:55.18#ibcon#about to read 4, iclass 30, count 0 2006.229.20:42:55.18#ibcon#read 4, iclass 30, count 0 2006.229.20:42:55.18#ibcon#about to read 5, iclass 30, count 0 2006.229.20:42:55.18#ibcon#read 5, iclass 30, count 0 2006.229.20:42:55.18#ibcon#about to read 6, iclass 30, count 0 2006.229.20:42:55.18#ibcon#read 6, iclass 30, count 0 2006.229.20:42:55.18#ibcon#end of sib2, iclass 30, count 0 2006.229.20:42:55.18#ibcon#*mode == 0, iclass 30, count 0 2006.229.20:42:55.18#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.20:42:55.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:42:55.18#ibcon#*before write, iclass 30, count 0 2006.229.20:42:55.18#ibcon#enter sib2, iclass 30, count 0 2006.229.20:42:55.18#ibcon#flushed, iclass 30, count 0 2006.229.20:42:55.18#ibcon#about to write, iclass 30, count 0 2006.229.20:42:55.18#ibcon#wrote, iclass 30, count 0 2006.229.20:42:55.18#ibcon#about to read 3, iclass 30, count 0 2006.229.20:42:55.22#ibcon#read 3, iclass 30, count 0 2006.229.20:42:55.22#ibcon#about to read 4, iclass 30, count 0 2006.229.20:42:55.22#ibcon#read 4, iclass 30, count 0 2006.229.20:42:55.22#ibcon#about to read 5, iclass 30, count 0 2006.229.20:42:55.22#ibcon#read 5, iclass 30, count 0 2006.229.20:42:55.22#ibcon#about to read 6, iclass 30, count 0 2006.229.20:42:55.22#ibcon#read 6, iclass 30, count 0 2006.229.20:42:55.22#ibcon#end of sib2, iclass 30, count 0 2006.229.20:42:55.22#ibcon#*after write, iclass 30, count 0 2006.229.20:42:55.22#ibcon#*before return 0, iclass 30, count 0 2006.229.20:42:55.22#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:42:55.22#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.20:42:55.22#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.20:42:55.22#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.20:42:55.22$vck44/va=7,5 2006.229.20:42:55.22#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.20:42:55.22#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.20:42:55.22#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:55.22#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:55.28#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:55.28#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:55.28#ibcon#enter wrdev, iclass 32, count 2 2006.229.20:42:55.28#ibcon#first serial, iclass 32, count 2 2006.229.20:42:55.28#ibcon#enter sib2, iclass 32, count 2 2006.229.20:42:55.28#ibcon#flushed, iclass 32, count 2 2006.229.20:42:55.28#ibcon#about to write, iclass 32, count 2 2006.229.20:42:55.28#ibcon#wrote, iclass 32, count 2 2006.229.20:42:55.28#ibcon#about to read 3, iclass 32, count 2 2006.229.20:42:55.30#ibcon#read 3, iclass 32, count 2 2006.229.20:42:55.30#ibcon#about to read 4, iclass 32, count 2 2006.229.20:42:55.30#ibcon#read 4, iclass 32, count 2 2006.229.20:42:55.30#ibcon#about to read 5, iclass 32, count 2 2006.229.20:42:55.30#ibcon#read 5, iclass 32, count 2 2006.229.20:42:55.30#ibcon#about to read 6, iclass 32, count 2 2006.229.20:42:55.30#ibcon#read 6, iclass 32, count 2 2006.229.20:42:55.30#ibcon#end of sib2, iclass 32, count 2 2006.229.20:42:55.30#ibcon#*mode == 0, iclass 32, count 2 2006.229.20:42:55.30#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.20:42:55.30#ibcon#[25=AT07-05\r\n] 2006.229.20:42:55.30#ibcon#*before write, iclass 32, count 2 2006.229.20:42:55.30#ibcon#enter sib2, iclass 32, count 2 2006.229.20:42:55.30#ibcon#flushed, iclass 32, count 2 2006.229.20:42:55.30#ibcon#about to write, iclass 32, count 2 2006.229.20:42:55.30#ibcon#wrote, iclass 32, count 2 2006.229.20:42:55.30#ibcon#about to read 3, iclass 32, count 2 2006.229.20:42:55.33#ibcon#read 3, iclass 32, count 2 2006.229.20:42:55.33#ibcon#about to read 4, iclass 32, count 2 2006.229.20:42:55.33#ibcon#read 4, iclass 32, count 2 2006.229.20:42:55.33#ibcon#about to read 5, iclass 32, count 2 2006.229.20:42:55.33#ibcon#read 5, iclass 32, count 2 2006.229.20:42:55.33#ibcon#about to read 6, iclass 32, count 2 2006.229.20:42:55.33#ibcon#read 6, iclass 32, count 2 2006.229.20:42:55.33#ibcon#end of sib2, iclass 32, count 2 2006.229.20:42:55.33#ibcon#*after write, iclass 32, count 2 2006.229.20:42:55.33#ibcon#*before return 0, iclass 32, count 2 2006.229.20:42:55.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:55.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:55.33#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.20:42:55.33#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:55.33#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:55.45#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:55.45#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:55.45#ibcon#enter wrdev, iclass 32, count 0 2006.229.20:42:55.45#ibcon#first serial, iclass 32, count 0 2006.229.20:42:55.45#ibcon#enter sib2, iclass 32, count 0 2006.229.20:42:55.45#ibcon#flushed, iclass 32, count 0 2006.229.20:42:55.45#ibcon#about to write, iclass 32, count 0 2006.229.20:42:55.45#ibcon#wrote, iclass 32, count 0 2006.229.20:42:55.45#ibcon#about to read 3, iclass 32, count 0 2006.229.20:42:55.47#ibcon#read 3, iclass 32, count 0 2006.229.20:42:55.47#ibcon#about to read 4, iclass 32, count 0 2006.229.20:42:55.47#ibcon#read 4, iclass 32, count 0 2006.229.20:42:55.47#ibcon#about to read 5, iclass 32, count 0 2006.229.20:42:55.47#ibcon#read 5, iclass 32, count 0 2006.229.20:42:55.47#ibcon#about to read 6, iclass 32, count 0 2006.229.20:42:55.47#ibcon#read 6, iclass 32, count 0 2006.229.20:42:55.47#ibcon#end of sib2, iclass 32, count 0 2006.229.20:42:55.47#ibcon#*mode == 0, iclass 32, count 0 2006.229.20:42:55.47#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.20:42:55.47#ibcon#[25=USB\r\n] 2006.229.20:42:55.47#ibcon#*before write, iclass 32, count 0 2006.229.20:42:55.47#ibcon#enter sib2, iclass 32, count 0 2006.229.20:42:55.47#ibcon#flushed, iclass 32, count 0 2006.229.20:42:55.47#ibcon#about to write, iclass 32, count 0 2006.229.20:42:55.47#ibcon#wrote, iclass 32, count 0 2006.229.20:42:55.47#ibcon#about to read 3, iclass 32, count 0 2006.229.20:42:55.50#ibcon#read 3, iclass 32, count 0 2006.229.20:42:55.50#ibcon#about to read 4, iclass 32, count 0 2006.229.20:42:55.50#ibcon#read 4, iclass 32, count 0 2006.229.20:42:55.50#ibcon#about to read 5, iclass 32, count 0 2006.229.20:42:55.50#ibcon#read 5, iclass 32, count 0 2006.229.20:42:55.50#ibcon#about to read 6, iclass 32, count 0 2006.229.20:42:55.50#ibcon#read 6, iclass 32, count 0 2006.229.20:42:55.50#ibcon#end of sib2, iclass 32, count 0 2006.229.20:42:55.50#ibcon#*after write, iclass 32, count 0 2006.229.20:42:55.50#ibcon#*before return 0, iclass 32, count 0 2006.229.20:42:55.50#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:55.50#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:55.50#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.20:42:55.50#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.20:42:55.50$vck44/valo=8,884.99 2006.229.20:42:55.50#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.20:42:55.50#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.20:42:55.50#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:55.50#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:55.50#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:55.50#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:55.50#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:42:55.50#ibcon#first serial, iclass 34, count 0 2006.229.20:42:55.50#ibcon#enter sib2, iclass 34, count 0 2006.229.20:42:55.50#ibcon#flushed, iclass 34, count 0 2006.229.20:42:55.50#ibcon#about to write, iclass 34, count 0 2006.229.20:42:55.50#ibcon#wrote, iclass 34, count 0 2006.229.20:42:55.50#ibcon#about to read 3, iclass 34, count 0 2006.229.20:42:55.52#ibcon#read 3, iclass 34, count 0 2006.229.20:42:55.52#ibcon#about to read 4, iclass 34, count 0 2006.229.20:42:55.52#ibcon#read 4, iclass 34, count 0 2006.229.20:42:55.52#ibcon#about to read 5, iclass 34, count 0 2006.229.20:42:55.52#ibcon#read 5, iclass 34, count 0 2006.229.20:42:55.52#ibcon#about to read 6, iclass 34, count 0 2006.229.20:42:55.52#ibcon#read 6, iclass 34, count 0 2006.229.20:42:55.52#ibcon#end of sib2, iclass 34, count 0 2006.229.20:42:55.52#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:42:55.52#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:42:55.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:42:55.52#ibcon#*before write, iclass 34, count 0 2006.229.20:42:55.52#ibcon#enter sib2, iclass 34, count 0 2006.229.20:42:55.52#ibcon#flushed, iclass 34, count 0 2006.229.20:42:55.52#ibcon#about to write, iclass 34, count 0 2006.229.20:42:55.52#ibcon#wrote, iclass 34, count 0 2006.229.20:42:55.52#ibcon#about to read 3, iclass 34, count 0 2006.229.20:42:55.56#ibcon#read 3, iclass 34, count 0 2006.229.20:42:55.56#ibcon#about to read 4, iclass 34, count 0 2006.229.20:42:55.56#ibcon#read 4, iclass 34, count 0 2006.229.20:42:55.56#ibcon#about to read 5, iclass 34, count 0 2006.229.20:42:55.56#ibcon#read 5, iclass 34, count 0 2006.229.20:42:55.56#ibcon#about to read 6, iclass 34, count 0 2006.229.20:42:55.56#ibcon#read 6, iclass 34, count 0 2006.229.20:42:55.56#ibcon#end of sib2, iclass 34, count 0 2006.229.20:42:55.56#ibcon#*after write, iclass 34, count 0 2006.229.20:42:55.56#ibcon#*before return 0, iclass 34, count 0 2006.229.20:42:55.56#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:55.56#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:55.56#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:42:55.56#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:42:55.56$vck44/va=8,6 2006.229.20:42:55.56#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.20:42:55.56#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.20:42:55.56#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:55.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:55.62#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:55.62#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:55.62#ibcon#enter wrdev, iclass 36, count 2 2006.229.20:42:55.62#ibcon#first serial, iclass 36, count 2 2006.229.20:42:55.62#ibcon#enter sib2, iclass 36, count 2 2006.229.20:42:55.62#ibcon#flushed, iclass 36, count 2 2006.229.20:42:55.62#ibcon#about to write, iclass 36, count 2 2006.229.20:42:55.62#ibcon#wrote, iclass 36, count 2 2006.229.20:42:55.62#ibcon#about to read 3, iclass 36, count 2 2006.229.20:42:55.64#ibcon#read 3, iclass 36, count 2 2006.229.20:42:55.64#ibcon#about to read 4, iclass 36, count 2 2006.229.20:42:55.64#ibcon#read 4, iclass 36, count 2 2006.229.20:42:55.64#ibcon#about to read 5, iclass 36, count 2 2006.229.20:42:55.64#ibcon#read 5, iclass 36, count 2 2006.229.20:42:55.64#ibcon#about to read 6, iclass 36, count 2 2006.229.20:42:55.64#ibcon#read 6, iclass 36, count 2 2006.229.20:42:55.64#ibcon#end of sib2, iclass 36, count 2 2006.229.20:42:55.64#ibcon#*mode == 0, iclass 36, count 2 2006.229.20:42:55.64#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.20:42:55.64#ibcon#[25=AT08-06\r\n] 2006.229.20:42:55.64#ibcon#*before write, iclass 36, count 2 2006.229.20:42:55.64#ibcon#enter sib2, iclass 36, count 2 2006.229.20:42:55.64#ibcon#flushed, iclass 36, count 2 2006.229.20:42:55.64#ibcon#about to write, iclass 36, count 2 2006.229.20:42:55.64#ibcon#wrote, iclass 36, count 2 2006.229.20:42:55.64#ibcon#about to read 3, iclass 36, count 2 2006.229.20:42:55.67#ibcon#read 3, iclass 36, count 2 2006.229.20:42:55.67#ibcon#about to read 4, iclass 36, count 2 2006.229.20:42:55.67#ibcon#read 4, iclass 36, count 2 2006.229.20:42:55.67#ibcon#about to read 5, iclass 36, count 2 2006.229.20:42:55.67#ibcon#read 5, iclass 36, count 2 2006.229.20:42:55.67#ibcon#about to read 6, iclass 36, count 2 2006.229.20:42:55.67#ibcon#read 6, iclass 36, count 2 2006.229.20:42:55.67#ibcon#end of sib2, iclass 36, count 2 2006.229.20:42:55.67#ibcon#*after write, iclass 36, count 2 2006.229.20:42:55.67#ibcon#*before return 0, iclass 36, count 2 2006.229.20:42:55.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:55.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:55.67#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.20:42:55.67#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:55.67#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:55.79#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:55.79#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:55.79#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:42:55.79#ibcon#first serial, iclass 36, count 0 2006.229.20:42:55.79#ibcon#enter sib2, iclass 36, count 0 2006.229.20:42:55.79#ibcon#flushed, iclass 36, count 0 2006.229.20:42:55.79#ibcon#about to write, iclass 36, count 0 2006.229.20:42:55.79#ibcon#wrote, iclass 36, count 0 2006.229.20:42:55.79#ibcon#about to read 3, iclass 36, count 0 2006.229.20:42:55.81#ibcon#read 3, iclass 36, count 0 2006.229.20:42:55.81#ibcon#about to read 4, iclass 36, count 0 2006.229.20:42:55.81#ibcon#read 4, iclass 36, count 0 2006.229.20:42:55.81#ibcon#about to read 5, iclass 36, count 0 2006.229.20:42:55.81#ibcon#read 5, iclass 36, count 0 2006.229.20:42:55.81#ibcon#about to read 6, iclass 36, count 0 2006.229.20:42:55.81#ibcon#read 6, iclass 36, count 0 2006.229.20:42:55.81#ibcon#end of sib2, iclass 36, count 0 2006.229.20:42:55.81#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:42:55.81#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:42:55.81#ibcon#[25=USB\r\n] 2006.229.20:42:55.81#ibcon#*before write, iclass 36, count 0 2006.229.20:42:55.81#ibcon#enter sib2, iclass 36, count 0 2006.229.20:42:55.81#ibcon#flushed, iclass 36, count 0 2006.229.20:42:55.81#ibcon#about to write, iclass 36, count 0 2006.229.20:42:55.81#ibcon#wrote, iclass 36, count 0 2006.229.20:42:55.81#ibcon#about to read 3, iclass 36, count 0 2006.229.20:42:55.84#ibcon#read 3, iclass 36, count 0 2006.229.20:42:55.84#ibcon#about to read 4, iclass 36, count 0 2006.229.20:42:55.84#ibcon#read 4, iclass 36, count 0 2006.229.20:42:55.84#ibcon#about to read 5, iclass 36, count 0 2006.229.20:42:55.84#ibcon#read 5, iclass 36, count 0 2006.229.20:42:55.84#ibcon#about to read 6, iclass 36, count 0 2006.229.20:42:55.84#ibcon#read 6, iclass 36, count 0 2006.229.20:42:55.84#ibcon#end of sib2, iclass 36, count 0 2006.229.20:42:55.84#ibcon#*after write, iclass 36, count 0 2006.229.20:42:55.84#ibcon#*before return 0, iclass 36, count 0 2006.229.20:42:55.84#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:55.84#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:55.84#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:42:55.84#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:42:55.84$vck44/vblo=1,629.99 2006.229.20:42:55.84#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.20:42:55.84#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.20:42:55.84#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:55.84#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:55.84#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:55.84#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:55.84#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:42:55.84#ibcon#first serial, iclass 38, count 0 2006.229.20:42:55.84#ibcon#enter sib2, iclass 38, count 0 2006.229.20:42:55.84#ibcon#flushed, iclass 38, count 0 2006.229.20:42:55.84#ibcon#about to write, iclass 38, count 0 2006.229.20:42:55.84#ibcon#wrote, iclass 38, count 0 2006.229.20:42:55.84#ibcon#about to read 3, iclass 38, count 0 2006.229.20:42:55.86#ibcon#read 3, iclass 38, count 0 2006.229.20:42:55.86#ibcon#about to read 4, iclass 38, count 0 2006.229.20:42:55.86#ibcon#read 4, iclass 38, count 0 2006.229.20:42:55.86#ibcon#about to read 5, iclass 38, count 0 2006.229.20:42:55.86#ibcon#read 5, iclass 38, count 0 2006.229.20:42:55.86#ibcon#about to read 6, iclass 38, count 0 2006.229.20:42:55.86#ibcon#read 6, iclass 38, count 0 2006.229.20:42:55.86#ibcon#end of sib2, iclass 38, count 0 2006.229.20:42:55.86#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:42:55.86#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:42:55.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:42:55.86#ibcon#*before write, iclass 38, count 0 2006.229.20:42:55.86#ibcon#enter sib2, iclass 38, count 0 2006.229.20:42:55.86#ibcon#flushed, iclass 38, count 0 2006.229.20:42:55.86#ibcon#about to write, iclass 38, count 0 2006.229.20:42:55.86#ibcon#wrote, iclass 38, count 0 2006.229.20:42:55.86#ibcon#about to read 3, iclass 38, count 0 2006.229.20:42:55.90#ibcon#read 3, iclass 38, count 0 2006.229.20:42:55.90#ibcon#about to read 4, iclass 38, count 0 2006.229.20:42:55.90#ibcon#read 4, iclass 38, count 0 2006.229.20:42:55.90#ibcon#about to read 5, iclass 38, count 0 2006.229.20:42:55.90#ibcon#read 5, iclass 38, count 0 2006.229.20:42:55.90#ibcon#about to read 6, iclass 38, count 0 2006.229.20:42:55.90#ibcon#read 6, iclass 38, count 0 2006.229.20:42:55.90#ibcon#end of sib2, iclass 38, count 0 2006.229.20:42:55.90#ibcon#*after write, iclass 38, count 0 2006.229.20:42:55.90#ibcon#*before return 0, iclass 38, count 0 2006.229.20:42:55.90#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:55.90#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:55.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:42:55.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:42:55.90$vck44/vb=1,4 2006.229.20:42:55.90#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.20:42:55.90#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.20:42:55.90#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:55.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:42:55.90#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:42:55.90#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:42:55.90#ibcon#enter wrdev, iclass 40, count 2 2006.229.20:42:55.90#ibcon#first serial, iclass 40, count 2 2006.229.20:42:55.90#ibcon#enter sib2, iclass 40, count 2 2006.229.20:42:55.90#ibcon#flushed, iclass 40, count 2 2006.229.20:42:55.90#ibcon#about to write, iclass 40, count 2 2006.229.20:42:55.90#ibcon#wrote, iclass 40, count 2 2006.229.20:42:55.90#ibcon#about to read 3, iclass 40, count 2 2006.229.20:42:55.92#ibcon#read 3, iclass 40, count 2 2006.229.20:42:55.92#ibcon#about to read 4, iclass 40, count 2 2006.229.20:42:55.92#ibcon#read 4, iclass 40, count 2 2006.229.20:42:55.92#ibcon#about to read 5, iclass 40, count 2 2006.229.20:42:55.92#ibcon#read 5, iclass 40, count 2 2006.229.20:42:55.92#ibcon#about to read 6, iclass 40, count 2 2006.229.20:42:55.92#ibcon#read 6, iclass 40, count 2 2006.229.20:42:55.92#ibcon#end of sib2, iclass 40, count 2 2006.229.20:42:55.92#ibcon#*mode == 0, iclass 40, count 2 2006.229.20:42:55.92#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.20:42:55.92#ibcon#[27=AT01-04\r\n] 2006.229.20:42:55.92#ibcon#*before write, iclass 40, count 2 2006.229.20:42:55.92#ibcon#enter sib2, iclass 40, count 2 2006.229.20:42:55.92#ibcon#flushed, iclass 40, count 2 2006.229.20:42:55.92#ibcon#about to write, iclass 40, count 2 2006.229.20:42:55.92#ibcon#wrote, iclass 40, count 2 2006.229.20:42:55.92#ibcon#about to read 3, iclass 40, count 2 2006.229.20:42:55.95#ibcon#read 3, iclass 40, count 2 2006.229.20:42:55.95#ibcon#about to read 4, iclass 40, count 2 2006.229.20:42:55.95#ibcon#read 4, iclass 40, count 2 2006.229.20:42:55.95#ibcon#about to read 5, iclass 40, count 2 2006.229.20:42:55.95#ibcon#read 5, iclass 40, count 2 2006.229.20:42:55.95#ibcon#about to read 6, iclass 40, count 2 2006.229.20:42:55.95#ibcon#read 6, iclass 40, count 2 2006.229.20:42:55.95#ibcon#end of sib2, iclass 40, count 2 2006.229.20:42:55.95#ibcon#*after write, iclass 40, count 2 2006.229.20:42:55.95#ibcon#*before return 0, iclass 40, count 2 2006.229.20:42:55.95#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:42:55.95#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.20:42:55.95#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.20:42:55.95#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:55.95#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:42:56.07#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:42:56.07#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:42:56.07#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:42:56.07#ibcon#first serial, iclass 40, count 0 2006.229.20:42:56.07#ibcon#enter sib2, iclass 40, count 0 2006.229.20:42:56.07#ibcon#flushed, iclass 40, count 0 2006.229.20:42:56.07#ibcon#about to write, iclass 40, count 0 2006.229.20:42:56.07#ibcon#wrote, iclass 40, count 0 2006.229.20:42:56.07#ibcon#about to read 3, iclass 40, count 0 2006.229.20:42:56.09#ibcon#read 3, iclass 40, count 0 2006.229.20:42:56.09#ibcon#about to read 4, iclass 40, count 0 2006.229.20:42:56.09#ibcon#read 4, iclass 40, count 0 2006.229.20:42:56.09#ibcon#about to read 5, iclass 40, count 0 2006.229.20:42:56.09#ibcon#read 5, iclass 40, count 0 2006.229.20:42:56.09#ibcon#about to read 6, iclass 40, count 0 2006.229.20:42:56.09#ibcon#read 6, iclass 40, count 0 2006.229.20:42:56.09#ibcon#end of sib2, iclass 40, count 0 2006.229.20:42:56.09#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:42:56.09#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:42:56.09#ibcon#[27=USB\r\n] 2006.229.20:42:56.09#ibcon#*before write, iclass 40, count 0 2006.229.20:42:56.09#ibcon#enter sib2, iclass 40, count 0 2006.229.20:42:56.09#ibcon#flushed, iclass 40, count 0 2006.229.20:42:56.09#ibcon#about to write, iclass 40, count 0 2006.229.20:42:56.09#ibcon#wrote, iclass 40, count 0 2006.229.20:42:56.09#ibcon#about to read 3, iclass 40, count 0 2006.229.20:42:56.12#ibcon#read 3, iclass 40, count 0 2006.229.20:42:56.12#ibcon#about to read 4, iclass 40, count 0 2006.229.20:42:56.12#ibcon#read 4, iclass 40, count 0 2006.229.20:42:56.12#ibcon#about to read 5, iclass 40, count 0 2006.229.20:42:56.12#ibcon#read 5, iclass 40, count 0 2006.229.20:42:56.12#ibcon#about to read 6, iclass 40, count 0 2006.229.20:42:56.12#ibcon#read 6, iclass 40, count 0 2006.229.20:42:56.12#ibcon#end of sib2, iclass 40, count 0 2006.229.20:42:56.12#ibcon#*after write, iclass 40, count 0 2006.229.20:42:56.12#ibcon#*before return 0, iclass 40, count 0 2006.229.20:42:56.12#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:42:56.12#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.20:42:56.12#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:42:56.12#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:42:56.12$vck44/vblo=2,634.99 2006.229.20:42:56.12#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.20:42:56.12#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.20:42:56.12#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:56.12#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:56.12#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:56.12#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:56.12#ibcon#enter wrdev, iclass 4, count 0 2006.229.20:42:56.12#ibcon#first serial, iclass 4, count 0 2006.229.20:42:56.12#ibcon#enter sib2, iclass 4, count 0 2006.229.20:42:56.12#ibcon#flushed, iclass 4, count 0 2006.229.20:42:56.12#ibcon#about to write, iclass 4, count 0 2006.229.20:42:56.12#ibcon#wrote, iclass 4, count 0 2006.229.20:42:56.12#ibcon#about to read 3, iclass 4, count 0 2006.229.20:42:56.14#ibcon#read 3, iclass 4, count 0 2006.229.20:42:56.14#ibcon#about to read 4, iclass 4, count 0 2006.229.20:42:56.14#ibcon#read 4, iclass 4, count 0 2006.229.20:42:56.14#ibcon#about to read 5, iclass 4, count 0 2006.229.20:42:56.14#ibcon#read 5, iclass 4, count 0 2006.229.20:42:56.14#ibcon#about to read 6, iclass 4, count 0 2006.229.20:42:56.14#ibcon#read 6, iclass 4, count 0 2006.229.20:42:56.14#ibcon#end of sib2, iclass 4, count 0 2006.229.20:42:56.14#ibcon#*mode == 0, iclass 4, count 0 2006.229.20:42:56.14#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.20:42:56.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:42:56.14#ibcon#*before write, iclass 4, count 0 2006.229.20:42:56.14#ibcon#enter sib2, iclass 4, count 0 2006.229.20:42:56.14#ibcon#flushed, iclass 4, count 0 2006.229.20:42:56.14#ibcon#about to write, iclass 4, count 0 2006.229.20:42:56.14#ibcon#wrote, iclass 4, count 0 2006.229.20:42:56.14#ibcon#about to read 3, iclass 4, count 0 2006.229.20:42:56.18#ibcon#read 3, iclass 4, count 0 2006.229.20:42:56.18#ibcon#about to read 4, iclass 4, count 0 2006.229.20:42:56.18#ibcon#read 4, iclass 4, count 0 2006.229.20:42:56.18#ibcon#about to read 5, iclass 4, count 0 2006.229.20:42:56.18#ibcon#read 5, iclass 4, count 0 2006.229.20:42:56.18#ibcon#about to read 6, iclass 4, count 0 2006.229.20:42:56.18#ibcon#read 6, iclass 4, count 0 2006.229.20:42:56.18#ibcon#end of sib2, iclass 4, count 0 2006.229.20:42:56.18#ibcon#*after write, iclass 4, count 0 2006.229.20:42:56.18#ibcon#*before return 0, iclass 4, count 0 2006.229.20:42:56.18#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:56.18#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.20:42:56.18#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.20:42:56.18#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.20:42:56.18$vck44/vb=2,4 2006.229.20:42:56.18#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.20:42:56.18#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.20:42:56.18#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:56.18#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:56.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:56.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:56.24#ibcon#enter wrdev, iclass 6, count 2 2006.229.20:42:56.24#ibcon#first serial, iclass 6, count 2 2006.229.20:42:56.24#ibcon#enter sib2, iclass 6, count 2 2006.229.20:42:56.24#ibcon#flushed, iclass 6, count 2 2006.229.20:42:56.24#ibcon#about to write, iclass 6, count 2 2006.229.20:42:56.24#ibcon#wrote, iclass 6, count 2 2006.229.20:42:56.24#ibcon#about to read 3, iclass 6, count 2 2006.229.20:42:56.26#ibcon#read 3, iclass 6, count 2 2006.229.20:42:56.26#ibcon#about to read 4, iclass 6, count 2 2006.229.20:42:56.26#ibcon#read 4, iclass 6, count 2 2006.229.20:42:56.26#ibcon#about to read 5, iclass 6, count 2 2006.229.20:42:56.26#ibcon#read 5, iclass 6, count 2 2006.229.20:42:56.26#ibcon#about to read 6, iclass 6, count 2 2006.229.20:42:56.26#ibcon#read 6, iclass 6, count 2 2006.229.20:42:56.26#ibcon#end of sib2, iclass 6, count 2 2006.229.20:42:56.26#ibcon#*mode == 0, iclass 6, count 2 2006.229.20:42:56.26#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.20:42:56.26#ibcon#[27=AT02-04\r\n] 2006.229.20:42:56.26#ibcon#*before write, iclass 6, count 2 2006.229.20:42:56.26#ibcon#enter sib2, iclass 6, count 2 2006.229.20:42:56.26#ibcon#flushed, iclass 6, count 2 2006.229.20:42:56.26#ibcon#about to write, iclass 6, count 2 2006.229.20:42:56.26#ibcon#wrote, iclass 6, count 2 2006.229.20:42:56.26#ibcon#about to read 3, iclass 6, count 2 2006.229.20:42:56.29#ibcon#read 3, iclass 6, count 2 2006.229.20:42:56.29#ibcon#about to read 4, iclass 6, count 2 2006.229.20:42:56.29#ibcon#read 4, iclass 6, count 2 2006.229.20:42:56.29#ibcon#about to read 5, iclass 6, count 2 2006.229.20:42:56.29#ibcon#read 5, iclass 6, count 2 2006.229.20:42:56.29#ibcon#about to read 6, iclass 6, count 2 2006.229.20:42:56.29#ibcon#read 6, iclass 6, count 2 2006.229.20:42:56.29#ibcon#end of sib2, iclass 6, count 2 2006.229.20:42:56.29#ibcon#*after write, iclass 6, count 2 2006.229.20:42:56.29#ibcon#*before return 0, iclass 6, count 2 2006.229.20:42:56.29#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:56.29#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.20:42:56.29#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.20:42:56.29#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:56.29#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:56.41#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:56.41#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:56.41#ibcon#enter wrdev, iclass 6, count 0 2006.229.20:42:56.41#ibcon#first serial, iclass 6, count 0 2006.229.20:42:56.41#ibcon#enter sib2, iclass 6, count 0 2006.229.20:42:56.41#ibcon#flushed, iclass 6, count 0 2006.229.20:42:56.41#ibcon#about to write, iclass 6, count 0 2006.229.20:42:56.41#ibcon#wrote, iclass 6, count 0 2006.229.20:42:56.41#ibcon#about to read 3, iclass 6, count 0 2006.229.20:42:56.43#ibcon#read 3, iclass 6, count 0 2006.229.20:42:56.43#ibcon#about to read 4, iclass 6, count 0 2006.229.20:42:56.43#ibcon#read 4, iclass 6, count 0 2006.229.20:42:56.43#ibcon#about to read 5, iclass 6, count 0 2006.229.20:42:56.43#ibcon#read 5, iclass 6, count 0 2006.229.20:42:56.43#ibcon#about to read 6, iclass 6, count 0 2006.229.20:42:56.43#ibcon#read 6, iclass 6, count 0 2006.229.20:42:56.43#ibcon#end of sib2, iclass 6, count 0 2006.229.20:42:56.43#ibcon#*mode == 0, iclass 6, count 0 2006.229.20:42:56.43#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.20:42:56.43#ibcon#[27=USB\r\n] 2006.229.20:42:56.43#ibcon#*before write, iclass 6, count 0 2006.229.20:42:56.43#ibcon#enter sib2, iclass 6, count 0 2006.229.20:42:56.43#ibcon#flushed, iclass 6, count 0 2006.229.20:42:56.43#ibcon#about to write, iclass 6, count 0 2006.229.20:42:56.43#ibcon#wrote, iclass 6, count 0 2006.229.20:42:56.43#ibcon#about to read 3, iclass 6, count 0 2006.229.20:42:56.46#ibcon#read 3, iclass 6, count 0 2006.229.20:42:56.46#ibcon#about to read 4, iclass 6, count 0 2006.229.20:42:56.46#ibcon#read 4, iclass 6, count 0 2006.229.20:42:56.46#ibcon#about to read 5, iclass 6, count 0 2006.229.20:42:56.46#ibcon#read 5, iclass 6, count 0 2006.229.20:42:56.46#ibcon#about to read 6, iclass 6, count 0 2006.229.20:42:56.46#ibcon#read 6, iclass 6, count 0 2006.229.20:42:56.46#ibcon#end of sib2, iclass 6, count 0 2006.229.20:42:56.46#ibcon#*after write, iclass 6, count 0 2006.229.20:42:56.46#ibcon#*before return 0, iclass 6, count 0 2006.229.20:42:56.46#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:56.46#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.20:42:56.46#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.20:42:56.46#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.20:42:56.46$vck44/vblo=3,649.99 2006.229.20:42:56.46#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.20:42:56.46#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.20:42:56.46#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:56.46#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:56.46#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:56.46#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:56.46#ibcon#enter wrdev, iclass 10, count 0 2006.229.20:42:56.46#ibcon#first serial, iclass 10, count 0 2006.229.20:42:56.46#ibcon#enter sib2, iclass 10, count 0 2006.229.20:42:56.46#ibcon#flushed, iclass 10, count 0 2006.229.20:42:56.46#ibcon#about to write, iclass 10, count 0 2006.229.20:42:56.46#ibcon#wrote, iclass 10, count 0 2006.229.20:42:56.46#ibcon#about to read 3, iclass 10, count 0 2006.229.20:42:56.48#ibcon#read 3, iclass 10, count 0 2006.229.20:42:56.48#ibcon#about to read 4, iclass 10, count 0 2006.229.20:42:56.48#ibcon#read 4, iclass 10, count 0 2006.229.20:42:56.48#ibcon#about to read 5, iclass 10, count 0 2006.229.20:42:56.48#ibcon#read 5, iclass 10, count 0 2006.229.20:42:56.48#ibcon#about to read 6, iclass 10, count 0 2006.229.20:42:56.48#ibcon#read 6, iclass 10, count 0 2006.229.20:42:56.48#ibcon#end of sib2, iclass 10, count 0 2006.229.20:42:56.48#ibcon#*mode == 0, iclass 10, count 0 2006.229.20:42:56.48#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.20:42:56.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:42:56.48#ibcon#*before write, iclass 10, count 0 2006.229.20:42:56.48#ibcon#enter sib2, iclass 10, count 0 2006.229.20:42:56.48#ibcon#flushed, iclass 10, count 0 2006.229.20:42:56.48#ibcon#about to write, iclass 10, count 0 2006.229.20:42:56.48#ibcon#wrote, iclass 10, count 0 2006.229.20:42:56.48#ibcon#about to read 3, iclass 10, count 0 2006.229.20:42:56.52#ibcon#read 3, iclass 10, count 0 2006.229.20:42:56.52#ibcon#about to read 4, iclass 10, count 0 2006.229.20:42:56.52#ibcon#read 4, iclass 10, count 0 2006.229.20:42:56.52#ibcon#about to read 5, iclass 10, count 0 2006.229.20:42:56.52#ibcon#read 5, iclass 10, count 0 2006.229.20:42:56.52#ibcon#about to read 6, iclass 10, count 0 2006.229.20:42:56.52#ibcon#read 6, iclass 10, count 0 2006.229.20:42:56.52#ibcon#end of sib2, iclass 10, count 0 2006.229.20:42:56.52#ibcon#*after write, iclass 10, count 0 2006.229.20:42:56.52#ibcon#*before return 0, iclass 10, count 0 2006.229.20:42:56.52#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:56.52#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.20:42:56.52#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.20:42:56.52#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.20:42:56.52$vck44/vb=3,4 2006.229.20:42:56.52#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.20:42:56.52#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.20:42:56.52#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:56.52#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:56.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:56.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:56.58#ibcon#enter wrdev, iclass 12, count 2 2006.229.20:42:56.58#ibcon#first serial, iclass 12, count 2 2006.229.20:42:56.58#ibcon#enter sib2, iclass 12, count 2 2006.229.20:42:56.58#ibcon#flushed, iclass 12, count 2 2006.229.20:42:56.58#ibcon#about to write, iclass 12, count 2 2006.229.20:42:56.58#ibcon#wrote, iclass 12, count 2 2006.229.20:42:56.58#ibcon#about to read 3, iclass 12, count 2 2006.229.20:42:56.60#ibcon#read 3, iclass 12, count 2 2006.229.20:42:56.60#ibcon#about to read 4, iclass 12, count 2 2006.229.20:42:56.60#ibcon#read 4, iclass 12, count 2 2006.229.20:42:56.60#ibcon#about to read 5, iclass 12, count 2 2006.229.20:42:56.60#ibcon#read 5, iclass 12, count 2 2006.229.20:42:56.60#ibcon#about to read 6, iclass 12, count 2 2006.229.20:42:56.60#ibcon#read 6, iclass 12, count 2 2006.229.20:42:56.60#ibcon#end of sib2, iclass 12, count 2 2006.229.20:42:56.60#ibcon#*mode == 0, iclass 12, count 2 2006.229.20:42:56.60#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.20:42:56.60#ibcon#[27=AT03-04\r\n] 2006.229.20:42:56.60#ibcon#*before write, iclass 12, count 2 2006.229.20:42:56.60#ibcon#enter sib2, iclass 12, count 2 2006.229.20:42:56.60#ibcon#flushed, iclass 12, count 2 2006.229.20:42:56.60#ibcon#about to write, iclass 12, count 2 2006.229.20:42:56.60#ibcon#wrote, iclass 12, count 2 2006.229.20:42:56.60#ibcon#about to read 3, iclass 12, count 2 2006.229.20:42:56.63#ibcon#read 3, iclass 12, count 2 2006.229.20:42:56.63#ibcon#about to read 4, iclass 12, count 2 2006.229.20:42:56.63#ibcon#read 4, iclass 12, count 2 2006.229.20:42:56.63#ibcon#about to read 5, iclass 12, count 2 2006.229.20:42:56.63#ibcon#read 5, iclass 12, count 2 2006.229.20:42:56.63#ibcon#about to read 6, iclass 12, count 2 2006.229.20:42:56.63#ibcon#read 6, iclass 12, count 2 2006.229.20:42:56.63#ibcon#end of sib2, iclass 12, count 2 2006.229.20:42:56.63#ibcon#*after write, iclass 12, count 2 2006.229.20:42:56.63#ibcon#*before return 0, iclass 12, count 2 2006.229.20:42:56.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:56.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.20:42:56.63#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.20:42:56.63#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:56.63#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:56.75#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:56.75#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:56.75#ibcon#enter wrdev, iclass 12, count 0 2006.229.20:42:56.75#ibcon#first serial, iclass 12, count 0 2006.229.20:42:56.75#ibcon#enter sib2, iclass 12, count 0 2006.229.20:42:56.75#ibcon#flushed, iclass 12, count 0 2006.229.20:42:56.75#ibcon#about to write, iclass 12, count 0 2006.229.20:42:56.75#ibcon#wrote, iclass 12, count 0 2006.229.20:42:56.75#ibcon#about to read 3, iclass 12, count 0 2006.229.20:42:56.77#ibcon#read 3, iclass 12, count 0 2006.229.20:42:56.77#ibcon#about to read 4, iclass 12, count 0 2006.229.20:42:56.77#ibcon#read 4, iclass 12, count 0 2006.229.20:42:56.77#ibcon#about to read 5, iclass 12, count 0 2006.229.20:42:56.77#ibcon#read 5, iclass 12, count 0 2006.229.20:42:56.77#ibcon#about to read 6, iclass 12, count 0 2006.229.20:42:56.77#ibcon#read 6, iclass 12, count 0 2006.229.20:42:56.77#ibcon#end of sib2, iclass 12, count 0 2006.229.20:42:56.77#ibcon#*mode == 0, iclass 12, count 0 2006.229.20:42:56.77#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.20:42:56.77#ibcon#[27=USB\r\n] 2006.229.20:42:56.77#ibcon#*before write, iclass 12, count 0 2006.229.20:42:56.77#ibcon#enter sib2, iclass 12, count 0 2006.229.20:42:56.77#ibcon#flushed, iclass 12, count 0 2006.229.20:42:56.77#ibcon#about to write, iclass 12, count 0 2006.229.20:42:56.77#ibcon#wrote, iclass 12, count 0 2006.229.20:42:56.77#ibcon#about to read 3, iclass 12, count 0 2006.229.20:42:56.80#ibcon#read 3, iclass 12, count 0 2006.229.20:42:56.80#ibcon#about to read 4, iclass 12, count 0 2006.229.20:42:56.80#ibcon#read 4, iclass 12, count 0 2006.229.20:42:56.80#ibcon#about to read 5, iclass 12, count 0 2006.229.20:42:56.80#ibcon#read 5, iclass 12, count 0 2006.229.20:42:56.80#ibcon#about to read 6, iclass 12, count 0 2006.229.20:42:56.80#ibcon#read 6, iclass 12, count 0 2006.229.20:42:56.80#ibcon#end of sib2, iclass 12, count 0 2006.229.20:42:56.80#ibcon#*after write, iclass 12, count 0 2006.229.20:42:56.80#ibcon#*before return 0, iclass 12, count 0 2006.229.20:42:56.80#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:56.80#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.20:42:56.80#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.20:42:56.80#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.20:42:56.80$vck44/vblo=4,679.99 2006.229.20:42:56.80#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.20:42:56.80#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.20:42:56.80#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:56.80#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:56.80#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:56.80#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:56.80#ibcon#enter wrdev, iclass 14, count 0 2006.229.20:42:56.80#ibcon#first serial, iclass 14, count 0 2006.229.20:42:56.80#ibcon#enter sib2, iclass 14, count 0 2006.229.20:42:56.80#ibcon#flushed, iclass 14, count 0 2006.229.20:42:56.80#ibcon#about to write, iclass 14, count 0 2006.229.20:42:56.80#ibcon#wrote, iclass 14, count 0 2006.229.20:42:56.80#ibcon#about to read 3, iclass 14, count 0 2006.229.20:42:56.82#ibcon#read 3, iclass 14, count 0 2006.229.20:42:56.82#ibcon#about to read 4, iclass 14, count 0 2006.229.20:42:56.82#ibcon#read 4, iclass 14, count 0 2006.229.20:42:56.82#ibcon#about to read 5, iclass 14, count 0 2006.229.20:42:56.82#ibcon#read 5, iclass 14, count 0 2006.229.20:42:56.82#ibcon#about to read 6, iclass 14, count 0 2006.229.20:42:56.82#ibcon#read 6, iclass 14, count 0 2006.229.20:42:56.82#ibcon#end of sib2, iclass 14, count 0 2006.229.20:42:56.82#ibcon#*mode == 0, iclass 14, count 0 2006.229.20:42:56.82#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.20:42:56.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:42:56.82#ibcon#*before write, iclass 14, count 0 2006.229.20:42:56.82#ibcon#enter sib2, iclass 14, count 0 2006.229.20:42:56.82#ibcon#flushed, iclass 14, count 0 2006.229.20:42:56.82#ibcon#about to write, iclass 14, count 0 2006.229.20:42:56.82#ibcon#wrote, iclass 14, count 0 2006.229.20:42:56.82#ibcon#about to read 3, iclass 14, count 0 2006.229.20:42:56.86#ibcon#read 3, iclass 14, count 0 2006.229.20:42:56.86#ibcon#about to read 4, iclass 14, count 0 2006.229.20:42:56.86#ibcon#read 4, iclass 14, count 0 2006.229.20:42:56.86#ibcon#about to read 5, iclass 14, count 0 2006.229.20:42:56.86#ibcon#read 5, iclass 14, count 0 2006.229.20:42:56.86#ibcon#about to read 6, iclass 14, count 0 2006.229.20:42:56.86#ibcon#read 6, iclass 14, count 0 2006.229.20:42:56.86#ibcon#end of sib2, iclass 14, count 0 2006.229.20:42:56.86#ibcon#*after write, iclass 14, count 0 2006.229.20:42:56.86#ibcon#*before return 0, iclass 14, count 0 2006.229.20:42:56.86#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:56.86#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.20:42:56.86#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.20:42:56.86#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.20:42:56.86$vck44/vb=4,4 2006.229.20:42:56.86#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.20:42:56.86#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.20:42:56.86#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:56.86#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:56.92#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:56.92#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:56.92#ibcon#enter wrdev, iclass 16, count 2 2006.229.20:42:56.92#ibcon#first serial, iclass 16, count 2 2006.229.20:42:56.92#ibcon#enter sib2, iclass 16, count 2 2006.229.20:42:56.92#ibcon#flushed, iclass 16, count 2 2006.229.20:42:56.92#ibcon#about to write, iclass 16, count 2 2006.229.20:42:56.92#ibcon#wrote, iclass 16, count 2 2006.229.20:42:56.92#ibcon#about to read 3, iclass 16, count 2 2006.229.20:42:56.94#ibcon#read 3, iclass 16, count 2 2006.229.20:42:56.94#ibcon#about to read 4, iclass 16, count 2 2006.229.20:42:56.94#ibcon#read 4, iclass 16, count 2 2006.229.20:42:56.94#ibcon#about to read 5, iclass 16, count 2 2006.229.20:42:56.94#ibcon#read 5, iclass 16, count 2 2006.229.20:42:56.94#ibcon#about to read 6, iclass 16, count 2 2006.229.20:42:56.94#ibcon#read 6, iclass 16, count 2 2006.229.20:42:56.94#ibcon#end of sib2, iclass 16, count 2 2006.229.20:42:56.94#ibcon#*mode == 0, iclass 16, count 2 2006.229.20:42:56.94#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.20:42:56.94#ibcon#[27=AT04-04\r\n] 2006.229.20:42:56.94#ibcon#*before write, iclass 16, count 2 2006.229.20:42:56.94#ibcon#enter sib2, iclass 16, count 2 2006.229.20:42:56.94#ibcon#flushed, iclass 16, count 2 2006.229.20:42:56.94#ibcon#about to write, iclass 16, count 2 2006.229.20:42:56.94#ibcon#wrote, iclass 16, count 2 2006.229.20:42:56.94#ibcon#about to read 3, iclass 16, count 2 2006.229.20:42:56.97#ibcon#read 3, iclass 16, count 2 2006.229.20:42:56.97#ibcon#about to read 4, iclass 16, count 2 2006.229.20:42:56.97#ibcon#read 4, iclass 16, count 2 2006.229.20:42:56.97#ibcon#about to read 5, iclass 16, count 2 2006.229.20:42:56.97#ibcon#read 5, iclass 16, count 2 2006.229.20:42:56.97#ibcon#about to read 6, iclass 16, count 2 2006.229.20:42:56.97#ibcon#read 6, iclass 16, count 2 2006.229.20:42:56.97#ibcon#end of sib2, iclass 16, count 2 2006.229.20:42:56.97#ibcon#*after write, iclass 16, count 2 2006.229.20:42:56.97#ibcon#*before return 0, iclass 16, count 2 2006.229.20:42:56.97#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:56.97#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.20:42:56.97#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.20:42:56.97#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:56.97#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:57.09#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:57.09#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:57.09#ibcon#enter wrdev, iclass 16, count 0 2006.229.20:42:57.09#ibcon#first serial, iclass 16, count 0 2006.229.20:42:57.09#ibcon#enter sib2, iclass 16, count 0 2006.229.20:42:57.09#ibcon#flushed, iclass 16, count 0 2006.229.20:42:57.09#ibcon#about to write, iclass 16, count 0 2006.229.20:42:57.09#ibcon#wrote, iclass 16, count 0 2006.229.20:42:57.09#ibcon#about to read 3, iclass 16, count 0 2006.229.20:42:57.11#ibcon#read 3, iclass 16, count 0 2006.229.20:42:57.11#ibcon#about to read 4, iclass 16, count 0 2006.229.20:42:57.11#ibcon#read 4, iclass 16, count 0 2006.229.20:42:57.11#ibcon#about to read 5, iclass 16, count 0 2006.229.20:42:57.11#ibcon#read 5, iclass 16, count 0 2006.229.20:42:57.11#ibcon#about to read 6, iclass 16, count 0 2006.229.20:42:57.11#ibcon#read 6, iclass 16, count 0 2006.229.20:42:57.11#ibcon#end of sib2, iclass 16, count 0 2006.229.20:42:57.11#ibcon#*mode == 0, iclass 16, count 0 2006.229.20:42:57.11#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.20:42:57.11#ibcon#[27=USB\r\n] 2006.229.20:42:57.11#ibcon#*before write, iclass 16, count 0 2006.229.20:42:57.11#ibcon#enter sib2, iclass 16, count 0 2006.229.20:42:57.11#ibcon#flushed, iclass 16, count 0 2006.229.20:42:57.11#ibcon#about to write, iclass 16, count 0 2006.229.20:42:57.11#ibcon#wrote, iclass 16, count 0 2006.229.20:42:57.11#ibcon#about to read 3, iclass 16, count 0 2006.229.20:42:57.14#ibcon#read 3, iclass 16, count 0 2006.229.20:42:57.14#ibcon#about to read 4, iclass 16, count 0 2006.229.20:42:57.14#ibcon#read 4, iclass 16, count 0 2006.229.20:42:57.14#ibcon#about to read 5, iclass 16, count 0 2006.229.20:42:57.14#ibcon#read 5, iclass 16, count 0 2006.229.20:42:57.14#ibcon#about to read 6, iclass 16, count 0 2006.229.20:42:57.14#ibcon#read 6, iclass 16, count 0 2006.229.20:42:57.14#ibcon#end of sib2, iclass 16, count 0 2006.229.20:42:57.14#ibcon#*after write, iclass 16, count 0 2006.229.20:42:57.14#ibcon#*before return 0, iclass 16, count 0 2006.229.20:42:57.14#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:57.14#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.20:42:57.14#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.20:42:57.14#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.20:42:57.14$vck44/vblo=5,709.99 2006.229.20:42:57.14#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.20:42:57.14#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.20:42:57.14#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:57.14#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:57.14#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:57.14#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:57.14#ibcon#enter wrdev, iclass 18, count 0 2006.229.20:42:57.14#ibcon#first serial, iclass 18, count 0 2006.229.20:42:57.14#ibcon#enter sib2, iclass 18, count 0 2006.229.20:42:57.14#ibcon#flushed, iclass 18, count 0 2006.229.20:42:57.14#ibcon#about to write, iclass 18, count 0 2006.229.20:42:57.14#ibcon#wrote, iclass 18, count 0 2006.229.20:42:57.14#ibcon#about to read 3, iclass 18, count 0 2006.229.20:42:57.16#ibcon#read 3, iclass 18, count 0 2006.229.20:42:57.16#ibcon#about to read 4, iclass 18, count 0 2006.229.20:42:57.16#ibcon#read 4, iclass 18, count 0 2006.229.20:42:57.16#ibcon#about to read 5, iclass 18, count 0 2006.229.20:42:57.16#ibcon#read 5, iclass 18, count 0 2006.229.20:42:57.16#ibcon#about to read 6, iclass 18, count 0 2006.229.20:42:57.16#ibcon#read 6, iclass 18, count 0 2006.229.20:42:57.16#ibcon#end of sib2, iclass 18, count 0 2006.229.20:42:57.16#ibcon#*mode == 0, iclass 18, count 0 2006.229.20:42:57.16#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.20:42:57.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:42:57.16#ibcon#*before write, iclass 18, count 0 2006.229.20:42:57.16#ibcon#enter sib2, iclass 18, count 0 2006.229.20:42:57.16#ibcon#flushed, iclass 18, count 0 2006.229.20:42:57.16#ibcon#about to write, iclass 18, count 0 2006.229.20:42:57.16#ibcon#wrote, iclass 18, count 0 2006.229.20:42:57.16#ibcon#about to read 3, iclass 18, count 0 2006.229.20:42:57.20#ibcon#read 3, iclass 18, count 0 2006.229.20:42:57.20#ibcon#about to read 4, iclass 18, count 0 2006.229.20:42:57.20#ibcon#read 4, iclass 18, count 0 2006.229.20:42:57.20#ibcon#about to read 5, iclass 18, count 0 2006.229.20:42:57.20#ibcon#read 5, iclass 18, count 0 2006.229.20:42:57.20#ibcon#about to read 6, iclass 18, count 0 2006.229.20:42:57.20#ibcon#read 6, iclass 18, count 0 2006.229.20:42:57.20#ibcon#end of sib2, iclass 18, count 0 2006.229.20:42:57.20#ibcon#*after write, iclass 18, count 0 2006.229.20:42:57.20#ibcon#*before return 0, iclass 18, count 0 2006.229.20:42:57.20#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:57.20#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.20:42:57.20#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.20:42:57.20#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.20:42:57.20$vck44/vb=5,4 2006.229.20:42:57.20#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.20:42:57.20#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.20:42:57.20#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:57.20#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:57.26#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:57.26#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:57.26#ibcon#enter wrdev, iclass 20, count 2 2006.229.20:42:57.26#ibcon#first serial, iclass 20, count 2 2006.229.20:42:57.26#ibcon#enter sib2, iclass 20, count 2 2006.229.20:42:57.26#ibcon#flushed, iclass 20, count 2 2006.229.20:42:57.26#ibcon#about to write, iclass 20, count 2 2006.229.20:42:57.26#ibcon#wrote, iclass 20, count 2 2006.229.20:42:57.26#ibcon#about to read 3, iclass 20, count 2 2006.229.20:42:57.28#ibcon#read 3, iclass 20, count 2 2006.229.20:42:57.28#ibcon#about to read 4, iclass 20, count 2 2006.229.20:42:57.28#ibcon#read 4, iclass 20, count 2 2006.229.20:42:57.28#ibcon#about to read 5, iclass 20, count 2 2006.229.20:42:57.28#ibcon#read 5, iclass 20, count 2 2006.229.20:42:57.28#ibcon#about to read 6, iclass 20, count 2 2006.229.20:42:57.28#ibcon#read 6, iclass 20, count 2 2006.229.20:42:57.28#ibcon#end of sib2, iclass 20, count 2 2006.229.20:42:57.28#ibcon#*mode == 0, iclass 20, count 2 2006.229.20:42:57.28#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.20:42:57.28#ibcon#[27=AT05-04\r\n] 2006.229.20:42:57.28#ibcon#*before write, iclass 20, count 2 2006.229.20:42:57.28#ibcon#enter sib2, iclass 20, count 2 2006.229.20:42:57.28#ibcon#flushed, iclass 20, count 2 2006.229.20:42:57.28#ibcon#about to write, iclass 20, count 2 2006.229.20:42:57.28#ibcon#wrote, iclass 20, count 2 2006.229.20:42:57.28#ibcon#about to read 3, iclass 20, count 2 2006.229.20:42:57.31#ibcon#read 3, iclass 20, count 2 2006.229.20:42:57.31#ibcon#about to read 4, iclass 20, count 2 2006.229.20:42:57.31#ibcon#read 4, iclass 20, count 2 2006.229.20:42:57.31#ibcon#about to read 5, iclass 20, count 2 2006.229.20:42:57.31#ibcon#read 5, iclass 20, count 2 2006.229.20:42:57.31#ibcon#about to read 6, iclass 20, count 2 2006.229.20:42:57.31#ibcon#read 6, iclass 20, count 2 2006.229.20:42:57.31#ibcon#end of sib2, iclass 20, count 2 2006.229.20:42:57.31#ibcon#*after write, iclass 20, count 2 2006.229.20:42:57.31#ibcon#*before return 0, iclass 20, count 2 2006.229.20:42:57.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:57.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.20:42:57.31#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.20:42:57.31#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:57.31#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:57.43#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:57.43#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:57.43#ibcon#enter wrdev, iclass 20, count 0 2006.229.20:42:57.43#ibcon#first serial, iclass 20, count 0 2006.229.20:42:57.43#ibcon#enter sib2, iclass 20, count 0 2006.229.20:42:57.43#ibcon#flushed, iclass 20, count 0 2006.229.20:42:57.43#ibcon#about to write, iclass 20, count 0 2006.229.20:42:57.43#ibcon#wrote, iclass 20, count 0 2006.229.20:42:57.43#ibcon#about to read 3, iclass 20, count 0 2006.229.20:42:57.45#ibcon#read 3, iclass 20, count 0 2006.229.20:42:57.45#ibcon#about to read 4, iclass 20, count 0 2006.229.20:42:57.45#ibcon#read 4, iclass 20, count 0 2006.229.20:42:57.45#ibcon#about to read 5, iclass 20, count 0 2006.229.20:42:57.45#ibcon#read 5, iclass 20, count 0 2006.229.20:42:57.45#ibcon#about to read 6, iclass 20, count 0 2006.229.20:42:57.45#ibcon#read 6, iclass 20, count 0 2006.229.20:42:57.45#ibcon#end of sib2, iclass 20, count 0 2006.229.20:42:57.45#ibcon#*mode == 0, iclass 20, count 0 2006.229.20:42:57.45#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.20:42:57.45#ibcon#[27=USB\r\n] 2006.229.20:42:57.45#ibcon#*before write, iclass 20, count 0 2006.229.20:42:57.45#ibcon#enter sib2, iclass 20, count 0 2006.229.20:42:57.45#ibcon#flushed, iclass 20, count 0 2006.229.20:42:57.45#ibcon#about to write, iclass 20, count 0 2006.229.20:42:57.45#ibcon#wrote, iclass 20, count 0 2006.229.20:42:57.45#ibcon#about to read 3, iclass 20, count 0 2006.229.20:42:57.48#ibcon#read 3, iclass 20, count 0 2006.229.20:42:57.48#ibcon#about to read 4, iclass 20, count 0 2006.229.20:42:57.48#ibcon#read 4, iclass 20, count 0 2006.229.20:42:57.48#ibcon#about to read 5, iclass 20, count 0 2006.229.20:42:57.48#ibcon#read 5, iclass 20, count 0 2006.229.20:42:57.48#ibcon#about to read 6, iclass 20, count 0 2006.229.20:42:57.48#ibcon#read 6, iclass 20, count 0 2006.229.20:42:57.48#ibcon#end of sib2, iclass 20, count 0 2006.229.20:42:57.48#ibcon#*after write, iclass 20, count 0 2006.229.20:42:57.48#ibcon#*before return 0, iclass 20, count 0 2006.229.20:42:57.48#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:57.48#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.20:42:57.48#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.20:42:57.48#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.20:42:57.48$vck44/vblo=6,719.99 2006.229.20:42:57.48#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.20:42:57.48#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.20:42:57.48#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:57.48#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:57.48#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:57.48#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:57.48#ibcon#enter wrdev, iclass 22, count 0 2006.229.20:42:57.48#ibcon#first serial, iclass 22, count 0 2006.229.20:42:57.48#ibcon#enter sib2, iclass 22, count 0 2006.229.20:42:57.48#ibcon#flushed, iclass 22, count 0 2006.229.20:42:57.48#ibcon#about to write, iclass 22, count 0 2006.229.20:42:57.48#ibcon#wrote, iclass 22, count 0 2006.229.20:42:57.48#ibcon#about to read 3, iclass 22, count 0 2006.229.20:42:57.50#ibcon#read 3, iclass 22, count 0 2006.229.20:42:57.50#ibcon#about to read 4, iclass 22, count 0 2006.229.20:42:57.50#ibcon#read 4, iclass 22, count 0 2006.229.20:42:57.50#ibcon#about to read 5, iclass 22, count 0 2006.229.20:42:57.50#ibcon#read 5, iclass 22, count 0 2006.229.20:42:57.50#ibcon#about to read 6, iclass 22, count 0 2006.229.20:42:57.50#ibcon#read 6, iclass 22, count 0 2006.229.20:42:57.50#ibcon#end of sib2, iclass 22, count 0 2006.229.20:42:57.50#ibcon#*mode == 0, iclass 22, count 0 2006.229.20:42:57.50#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.20:42:57.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:42:57.50#ibcon#*before write, iclass 22, count 0 2006.229.20:42:57.50#ibcon#enter sib2, iclass 22, count 0 2006.229.20:42:57.50#ibcon#flushed, iclass 22, count 0 2006.229.20:42:57.50#ibcon#about to write, iclass 22, count 0 2006.229.20:42:57.50#ibcon#wrote, iclass 22, count 0 2006.229.20:42:57.50#ibcon#about to read 3, iclass 22, count 0 2006.229.20:42:57.54#ibcon#read 3, iclass 22, count 0 2006.229.20:42:57.54#ibcon#about to read 4, iclass 22, count 0 2006.229.20:42:57.54#ibcon#read 4, iclass 22, count 0 2006.229.20:42:57.54#ibcon#about to read 5, iclass 22, count 0 2006.229.20:42:57.54#ibcon#read 5, iclass 22, count 0 2006.229.20:42:57.54#ibcon#about to read 6, iclass 22, count 0 2006.229.20:42:57.54#ibcon#read 6, iclass 22, count 0 2006.229.20:42:57.54#ibcon#end of sib2, iclass 22, count 0 2006.229.20:42:57.54#ibcon#*after write, iclass 22, count 0 2006.229.20:42:57.54#ibcon#*before return 0, iclass 22, count 0 2006.229.20:42:57.54#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:57.54#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.20:42:57.54#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.20:42:57.54#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.20:42:57.54$vck44/vb=6,4 2006.229.20:42:57.54#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.20:42:57.54#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.20:42:57.54#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:57.54#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:57.60#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:57.60#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:57.60#ibcon#enter wrdev, iclass 24, count 2 2006.229.20:42:57.60#ibcon#first serial, iclass 24, count 2 2006.229.20:42:57.60#ibcon#enter sib2, iclass 24, count 2 2006.229.20:42:57.60#ibcon#flushed, iclass 24, count 2 2006.229.20:42:57.60#ibcon#about to write, iclass 24, count 2 2006.229.20:42:57.60#ibcon#wrote, iclass 24, count 2 2006.229.20:42:57.60#ibcon#about to read 3, iclass 24, count 2 2006.229.20:42:57.62#ibcon#read 3, iclass 24, count 2 2006.229.20:42:57.62#ibcon#about to read 4, iclass 24, count 2 2006.229.20:42:57.62#ibcon#read 4, iclass 24, count 2 2006.229.20:42:57.62#ibcon#about to read 5, iclass 24, count 2 2006.229.20:42:57.62#ibcon#read 5, iclass 24, count 2 2006.229.20:42:57.62#ibcon#about to read 6, iclass 24, count 2 2006.229.20:42:57.62#ibcon#read 6, iclass 24, count 2 2006.229.20:42:57.62#ibcon#end of sib2, iclass 24, count 2 2006.229.20:42:57.62#ibcon#*mode == 0, iclass 24, count 2 2006.229.20:42:57.62#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.20:42:57.62#ibcon#[27=AT06-04\r\n] 2006.229.20:42:57.62#ibcon#*before write, iclass 24, count 2 2006.229.20:42:57.62#ibcon#enter sib2, iclass 24, count 2 2006.229.20:42:57.62#ibcon#flushed, iclass 24, count 2 2006.229.20:42:57.62#ibcon#about to write, iclass 24, count 2 2006.229.20:42:57.62#ibcon#wrote, iclass 24, count 2 2006.229.20:42:57.62#ibcon#about to read 3, iclass 24, count 2 2006.229.20:42:57.65#ibcon#read 3, iclass 24, count 2 2006.229.20:42:57.65#ibcon#about to read 4, iclass 24, count 2 2006.229.20:42:57.65#ibcon#read 4, iclass 24, count 2 2006.229.20:42:57.65#ibcon#about to read 5, iclass 24, count 2 2006.229.20:42:57.65#ibcon#read 5, iclass 24, count 2 2006.229.20:42:57.65#ibcon#about to read 6, iclass 24, count 2 2006.229.20:42:57.65#ibcon#read 6, iclass 24, count 2 2006.229.20:42:57.65#ibcon#end of sib2, iclass 24, count 2 2006.229.20:42:57.65#ibcon#*after write, iclass 24, count 2 2006.229.20:42:57.65#ibcon#*before return 0, iclass 24, count 2 2006.229.20:42:57.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:57.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.20:42:57.65#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.20:42:57.65#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:57.65#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:57.77#abcon#<5=/07 1.5 3.4 25.991001001.8\r\n> 2006.229.20:42:57.77#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:57.77#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:57.77#ibcon#enter wrdev, iclass 24, count 0 2006.229.20:42:57.77#ibcon#first serial, iclass 24, count 0 2006.229.20:42:57.77#ibcon#enter sib2, iclass 24, count 0 2006.229.20:42:57.77#ibcon#flushed, iclass 24, count 0 2006.229.20:42:57.77#ibcon#about to write, iclass 24, count 0 2006.229.20:42:57.77#ibcon#wrote, iclass 24, count 0 2006.229.20:42:57.77#ibcon#about to read 3, iclass 24, count 0 2006.229.20:42:57.79#ibcon#read 3, iclass 24, count 0 2006.229.20:42:57.79#ibcon#about to read 4, iclass 24, count 0 2006.229.20:42:57.79#ibcon#read 4, iclass 24, count 0 2006.229.20:42:57.79#ibcon#about to read 5, iclass 24, count 0 2006.229.20:42:57.79#ibcon#read 5, iclass 24, count 0 2006.229.20:42:57.79#ibcon#about to read 6, iclass 24, count 0 2006.229.20:42:57.79#ibcon#read 6, iclass 24, count 0 2006.229.20:42:57.79#ibcon#end of sib2, iclass 24, count 0 2006.229.20:42:57.79#ibcon#*mode == 0, iclass 24, count 0 2006.229.20:42:57.79#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.20:42:57.79#ibcon#[27=USB\r\n] 2006.229.20:42:57.79#ibcon#*before write, iclass 24, count 0 2006.229.20:42:57.79#ibcon#enter sib2, iclass 24, count 0 2006.229.20:42:57.79#ibcon#flushed, iclass 24, count 0 2006.229.20:42:57.79#ibcon#about to write, iclass 24, count 0 2006.229.20:42:57.79#ibcon#wrote, iclass 24, count 0 2006.229.20:42:57.79#ibcon#about to read 3, iclass 24, count 0 2006.229.20:42:57.79#abcon#{5=INTERFACE CLEAR} 2006.229.20:42:57.82#ibcon#read 3, iclass 24, count 0 2006.229.20:42:57.82#ibcon#about to read 4, iclass 24, count 0 2006.229.20:42:57.82#ibcon#read 4, iclass 24, count 0 2006.229.20:42:57.82#ibcon#about to read 5, iclass 24, count 0 2006.229.20:42:57.82#ibcon#read 5, iclass 24, count 0 2006.229.20:42:57.82#ibcon#about to read 6, iclass 24, count 0 2006.229.20:42:57.82#ibcon#read 6, iclass 24, count 0 2006.229.20:42:57.82#ibcon#end of sib2, iclass 24, count 0 2006.229.20:42:57.82#ibcon#*after write, iclass 24, count 0 2006.229.20:42:57.82#ibcon#*before return 0, iclass 24, count 0 2006.229.20:42:57.82#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:57.82#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.20:42:57.82#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.20:42:57.82#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.20:42:57.82$vck44/vblo=7,734.99 2006.229.20:42:57.82#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:42:57.82#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:42:57.82#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:57.82#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:42:57.82#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:42:57.82#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:42:57.82#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:42:57.82#ibcon#first serial, iclass 29, count 0 2006.229.20:42:57.82#ibcon#enter sib2, iclass 29, count 0 2006.229.20:42:57.82#ibcon#flushed, iclass 29, count 0 2006.229.20:42:57.82#ibcon#about to write, iclass 29, count 0 2006.229.20:42:57.82#ibcon#wrote, iclass 29, count 0 2006.229.20:42:57.82#ibcon#about to read 3, iclass 29, count 0 2006.229.20:42:57.84#ibcon#read 3, iclass 29, count 0 2006.229.20:42:57.84#ibcon#about to read 4, iclass 29, count 0 2006.229.20:42:57.84#ibcon#read 4, iclass 29, count 0 2006.229.20:42:57.84#ibcon#about to read 5, iclass 29, count 0 2006.229.20:42:57.84#ibcon#read 5, iclass 29, count 0 2006.229.20:42:57.84#ibcon#about to read 6, iclass 29, count 0 2006.229.20:42:57.84#ibcon#read 6, iclass 29, count 0 2006.229.20:42:57.84#ibcon#end of sib2, iclass 29, count 0 2006.229.20:42:57.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:42:57.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:42:57.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:42:57.84#ibcon#*before write, iclass 29, count 0 2006.229.20:42:57.84#ibcon#enter sib2, iclass 29, count 0 2006.229.20:42:57.84#ibcon#flushed, iclass 29, count 0 2006.229.20:42:57.84#ibcon#about to write, iclass 29, count 0 2006.229.20:42:57.84#ibcon#wrote, iclass 29, count 0 2006.229.20:42:57.84#ibcon#about to read 3, iclass 29, count 0 2006.229.20:42:57.85#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:42:57.88#ibcon#read 3, iclass 29, count 0 2006.229.20:42:57.88#ibcon#about to read 4, iclass 29, count 0 2006.229.20:42:57.88#ibcon#read 4, iclass 29, count 0 2006.229.20:42:57.88#ibcon#about to read 5, iclass 29, count 0 2006.229.20:42:57.88#ibcon#read 5, iclass 29, count 0 2006.229.20:42:57.88#ibcon#about to read 6, iclass 29, count 0 2006.229.20:42:57.88#ibcon#read 6, iclass 29, count 0 2006.229.20:42:57.88#ibcon#end of sib2, iclass 29, count 0 2006.229.20:42:57.88#ibcon#*after write, iclass 29, count 0 2006.229.20:42:57.88#ibcon#*before return 0, iclass 29, count 0 2006.229.20:42:57.88#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:42:57.88#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:42:57.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:42:57.88#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:42:57.88$vck44/vb=7,4 2006.229.20:42:57.88#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.20:42:57.88#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.20:42:57.88#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:57.88#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:57.94#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:57.94#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:57.94#ibcon#enter wrdev, iclass 32, count 2 2006.229.20:42:57.94#ibcon#first serial, iclass 32, count 2 2006.229.20:42:57.94#ibcon#enter sib2, iclass 32, count 2 2006.229.20:42:57.94#ibcon#flushed, iclass 32, count 2 2006.229.20:42:57.94#ibcon#about to write, iclass 32, count 2 2006.229.20:42:57.94#ibcon#wrote, iclass 32, count 2 2006.229.20:42:57.94#ibcon#about to read 3, iclass 32, count 2 2006.229.20:42:57.96#ibcon#read 3, iclass 32, count 2 2006.229.20:42:57.96#ibcon#about to read 4, iclass 32, count 2 2006.229.20:42:57.96#ibcon#read 4, iclass 32, count 2 2006.229.20:42:57.96#ibcon#about to read 5, iclass 32, count 2 2006.229.20:42:57.96#ibcon#read 5, iclass 32, count 2 2006.229.20:42:57.96#ibcon#about to read 6, iclass 32, count 2 2006.229.20:42:57.96#ibcon#read 6, iclass 32, count 2 2006.229.20:42:57.96#ibcon#end of sib2, iclass 32, count 2 2006.229.20:42:57.96#ibcon#*mode == 0, iclass 32, count 2 2006.229.20:42:57.96#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.20:42:57.96#ibcon#[27=AT07-04\r\n] 2006.229.20:42:57.96#ibcon#*before write, iclass 32, count 2 2006.229.20:42:57.96#ibcon#enter sib2, iclass 32, count 2 2006.229.20:42:57.96#ibcon#flushed, iclass 32, count 2 2006.229.20:42:57.96#ibcon#about to write, iclass 32, count 2 2006.229.20:42:57.96#ibcon#wrote, iclass 32, count 2 2006.229.20:42:57.96#ibcon#about to read 3, iclass 32, count 2 2006.229.20:42:57.99#ibcon#read 3, iclass 32, count 2 2006.229.20:42:57.99#ibcon#about to read 4, iclass 32, count 2 2006.229.20:42:57.99#ibcon#read 4, iclass 32, count 2 2006.229.20:42:57.99#ibcon#about to read 5, iclass 32, count 2 2006.229.20:42:57.99#ibcon#read 5, iclass 32, count 2 2006.229.20:42:57.99#ibcon#about to read 6, iclass 32, count 2 2006.229.20:42:57.99#ibcon#read 6, iclass 32, count 2 2006.229.20:42:57.99#ibcon#end of sib2, iclass 32, count 2 2006.229.20:42:57.99#ibcon#*after write, iclass 32, count 2 2006.229.20:42:57.99#ibcon#*before return 0, iclass 32, count 2 2006.229.20:42:57.99#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:57.99#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.20:42:57.99#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.20:42:57.99#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:57.99#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:58.11#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:58.11#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:58.11#ibcon#enter wrdev, iclass 32, count 0 2006.229.20:42:58.11#ibcon#first serial, iclass 32, count 0 2006.229.20:42:58.11#ibcon#enter sib2, iclass 32, count 0 2006.229.20:42:58.11#ibcon#flushed, iclass 32, count 0 2006.229.20:42:58.11#ibcon#about to write, iclass 32, count 0 2006.229.20:42:58.11#ibcon#wrote, iclass 32, count 0 2006.229.20:42:58.11#ibcon#about to read 3, iclass 32, count 0 2006.229.20:42:58.13#ibcon#read 3, iclass 32, count 0 2006.229.20:42:58.13#ibcon#about to read 4, iclass 32, count 0 2006.229.20:42:58.13#ibcon#read 4, iclass 32, count 0 2006.229.20:42:58.13#ibcon#about to read 5, iclass 32, count 0 2006.229.20:42:58.13#ibcon#read 5, iclass 32, count 0 2006.229.20:42:58.13#ibcon#about to read 6, iclass 32, count 0 2006.229.20:42:58.13#ibcon#read 6, iclass 32, count 0 2006.229.20:42:58.13#ibcon#end of sib2, iclass 32, count 0 2006.229.20:42:58.13#ibcon#*mode == 0, iclass 32, count 0 2006.229.20:42:58.13#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.20:42:58.13#ibcon#[27=USB\r\n] 2006.229.20:42:58.13#ibcon#*before write, iclass 32, count 0 2006.229.20:42:58.13#ibcon#enter sib2, iclass 32, count 0 2006.229.20:42:58.13#ibcon#flushed, iclass 32, count 0 2006.229.20:42:58.13#ibcon#about to write, iclass 32, count 0 2006.229.20:42:58.13#ibcon#wrote, iclass 32, count 0 2006.229.20:42:58.13#ibcon#about to read 3, iclass 32, count 0 2006.229.20:42:58.16#ibcon#read 3, iclass 32, count 0 2006.229.20:42:58.16#ibcon#about to read 4, iclass 32, count 0 2006.229.20:42:58.16#ibcon#read 4, iclass 32, count 0 2006.229.20:42:58.16#ibcon#about to read 5, iclass 32, count 0 2006.229.20:42:58.16#ibcon#read 5, iclass 32, count 0 2006.229.20:42:58.16#ibcon#about to read 6, iclass 32, count 0 2006.229.20:42:58.16#ibcon#read 6, iclass 32, count 0 2006.229.20:42:58.16#ibcon#end of sib2, iclass 32, count 0 2006.229.20:42:58.16#ibcon#*after write, iclass 32, count 0 2006.229.20:42:58.16#ibcon#*before return 0, iclass 32, count 0 2006.229.20:42:58.16#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:58.16#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.20:42:58.16#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.20:42:58.16#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.20:42:58.16$vck44/vblo=8,744.99 2006.229.20:42:58.16#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.20:42:58.16#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.20:42:58.16#ibcon#ireg 17 cls_cnt 0 2006.229.20:42:58.16#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:58.16#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:58.16#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:58.16#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:42:58.16#ibcon#first serial, iclass 34, count 0 2006.229.20:42:58.16#ibcon#enter sib2, iclass 34, count 0 2006.229.20:42:58.16#ibcon#flushed, iclass 34, count 0 2006.229.20:42:58.16#ibcon#about to write, iclass 34, count 0 2006.229.20:42:58.16#ibcon#wrote, iclass 34, count 0 2006.229.20:42:58.16#ibcon#about to read 3, iclass 34, count 0 2006.229.20:42:58.18#ibcon#read 3, iclass 34, count 0 2006.229.20:42:58.18#ibcon#about to read 4, iclass 34, count 0 2006.229.20:42:58.18#ibcon#read 4, iclass 34, count 0 2006.229.20:42:58.18#ibcon#about to read 5, iclass 34, count 0 2006.229.20:42:58.18#ibcon#read 5, iclass 34, count 0 2006.229.20:42:58.18#ibcon#about to read 6, iclass 34, count 0 2006.229.20:42:58.18#ibcon#read 6, iclass 34, count 0 2006.229.20:42:58.18#ibcon#end of sib2, iclass 34, count 0 2006.229.20:42:58.18#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:42:58.18#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:42:58.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:42:58.18#ibcon#*before write, iclass 34, count 0 2006.229.20:42:58.18#ibcon#enter sib2, iclass 34, count 0 2006.229.20:42:58.18#ibcon#flushed, iclass 34, count 0 2006.229.20:42:58.18#ibcon#about to write, iclass 34, count 0 2006.229.20:42:58.18#ibcon#wrote, iclass 34, count 0 2006.229.20:42:58.18#ibcon#about to read 3, iclass 34, count 0 2006.229.20:42:58.22#ibcon#read 3, iclass 34, count 0 2006.229.20:42:58.22#ibcon#about to read 4, iclass 34, count 0 2006.229.20:42:58.22#ibcon#read 4, iclass 34, count 0 2006.229.20:42:58.22#ibcon#about to read 5, iclass 34, count 0 2006.229.20:42:58.22#ibcon#read 5, iclass 34, count 0 2006.229.20:42:58.22#ibcon#about to read 6, iclass 34, count 0 2006.229.20:42:58.22#ibcon#read 6, iclass 34, count 0 2006.229.20:42:58.22#ibcon#end of sib2, iclass 34, count 0 2006.229.20:42:58.22#ibcon#*after write, iclass 34, count 0 2006.229.20:42:58.22#ibcon#*before return 0, iclass 34, count 0 2006.229.20:42:58.22#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:58.22#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:42:58.22#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:42:58.22#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:42:58.22$vck44/vb=8,4 2006.229.20:42:58.22#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.20:42:58.22#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.20:42:58.22#ibcon#ireg 11 cls_cnt 2 2006.229.20:42:58.22#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:58.28#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:58.28#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:58.28#ibcon#enter wrdev, iclass 36, count 2 2006.229.20:42:58.28#ibcon#first serial, iclass 36, count 2 2006.229.20:42:58.28#ibcon#enter sib2, iclass 36, count 2 2006.229.20:42:58.28#ibcon#flushed, iclass 36, count 2 2006.229.20:42:58.28#ibcon#about to write, iclass 36, count 2 2006.229.20:42:58.28#ibcon#wrote, iclass 36, count 2 2006.229.20:42:58.28#ibcon#about to read 3, iclass 36, count 2 2006.229.20:42:58.30#ibcon#read 3, iclass 36, count 2 2006.229.20:42:58.30#ibcon#about to read 4, iclass 36, count 2 2006.229.20:42:58.30#ibcon#read 4, iclass 36, count 2 2006.229.20:42:58.30#ibcon#about to read 5, iclass 36, count 2 2006.229.20:42:58.30#ibcon#read 5, iclass 36, count 2 2006.229.20:42:58.30#ibcon#about to read 6, iclass 36, count 2 2006.229.20:42:58.30#ibcon#read 6, iclass 36, count 2 2006.229.20:42:58.30#ibcon#end of sib2, iclass 36, count 2 2006.229.20:42:58.30#ibcon#*mode == 0, iclass 36, count 2 2006.229.20:42:58.30#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.20:42:58.30#ibcon#[27=AT08-04\r\n] 2006.229.20:42:58.30#ibcon#*before write, iclass 36, count 2 2006.229.20:42:58.30#ibcon#enter sib2, iclass 36, count 2 2006.229.20:42:58.30#ibcon#flushed, iclass 36, count 2 2006.229.20:42:58.30#ibcon#about to write, iclass 36, count 2 2006.229.20:42:58.30#ibcon#wrote, iclass 36, count 2 2006.229.20:42:58.30#ibcon#about to read 3, iclass 36, count 2 2006.229.20:42:58.33#ibcon#read 3, iclass 36, count 2 2006.229.20:42:58.33#ibcon#about to read 4, iclass 36, count 2 2006.229.20:42:58.33#ibcon#read 4, iclass 36, count 2 2006.229.20:42:58.33#ibcon#about to read 5, iclass 36, count 2 2006.229.20:42:58.33#ibcon#read 5, iclass 36, count 2 2006.229.20:42:58.33#ibcon#about to read 6, iclass 36, count 2 2006.229.20:42:58.33#ibcon#read 6, iclass 36, count 2 2006.229.20:42:58.33#ibcon#end of sib2, iclass 36, count 2 2006.229.20:42:58.33#ibcon#*after write, iclass 36, count 2 2006.229.20:42:58.33#ibcon#*before return 0, iclass 36, count 2 2006.229.20:42:58.33#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:58.33#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.20:42:58.33#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.20:42:58.33#ibcon#ireg 7 cls_cnt 0 2006.229.20:42:58.33#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:58.45#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:58.45#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:58.45#ibcon#enter wrdev, iclass 36, count 0 2006.229.20:42:58.45#ibcon#first serial, iclass 36, count 0 2006.229.20:42:58.45#ibcon#enter sib2, iclass 36, count 0 2006.229.20:42:58.45#ibcon#flushed, iclass 36, count 0 2006.229.20:42:58.45#ibcon#about to write, iclass 36, count 0 2006.229.20:42:58.45#ibcon#wrote, iclass 36, count 0 2006.229.20:42:58.45#ibcon#about to read 3, iclass 36, count 0 2006.229.20:42:58.47#ibcon#read 3, iclass 36, count 0 2006.229.20:42:58.47#ibcon#about to read 4, iclass 36, count 0 2006.229.20:42:58.47#ibcon#read 4, iclass 36, count 0 2006.229.20:42:58.47#ibcon#about to read 5, iclass 36, count 0 2006.229.20:42:58.47#ibcon#read 5, iclass 36, count 0 2006.229.20:42:58.47#ibcon#about to read 6, iclass 36, count 0 2006.229.20:42:58.47#ibcon#read 6, iclass 36, count 0 2006.229.20:42:58.47#ibcon#end of sib2, iclass 36, count 0 2006.229.20:42:58.47#ibcon#*mode == 0, iclass 36, count 0 2006.229.20:42:58.47#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.20:42:58.47#ibcon#[27=USB\r\n] 2006.229.20:42:58.47#ibcon#*before write, iclass 36, count 0 2006.229.20:42:58.47#ibcon#enter sib2, iclass 36, count 0 2006.229.20:42:58.47#ibcon#flushed, iclass 36, count 0 2006.229.20:42:58.47#ibcon#about to write, iclass 36, count 0 2006.229.20:42:58.47#ibcon#wrote, iclass 36, count 0 2006.229.20:42:58.47#ibcon#about to read 3, iclass 36, count 0 2006.229.20:42:58.50#ibcon#read 3, iclass 36, count 0 2006.229.20:42:58.50#ibcon#about to read 4, iclass 36, count 0 2006.229.20:42:58.50#ibcon#read 4, iclass 36, count 0 2006.229.20:42:58.50#ibcon#about to read 5, iclass 36, count 0 2006.229.20:42:58.50#ibcon#read 5, iclass 36, count 0 2006.229.20:42:58.50#ibcon#about to read 6, iclass 36, count 0 2006.229.20:42:58.50#ibcon#read 6, iclass 36, count 0 2006.229.20:42:58.50#ibcon#end of sib2, iclass 36, count 0 2006.229.20:42:58.50#ibcon#*after write, iclass 36, count 0 2006.229.20:42:58.50#ibcon#*before return 0, iclass 36, count 0 2006.229.20:42:58.50#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:58.50#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.20:42:58.50#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.20:42:58.50#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.20:42:58.50$vck44/vabw=wide 2006.229.20:42:58.50#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.20:42:58.50#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.20:42:58.50#ibcon#ireg 8 cls_cnt 0 2006.229.20:42:58.50#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:58.50#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:58.50#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:58.50#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:42:58.50#ibcon#first serial, iclass 38, count 0 2006.229.20:42:58.50#ibcon#enter sib2, iclass 38, count 0 2006.229.20:42:58.50#ibcon#flushed, iclass 38, count 0 2006.229.20:42:58.50#ibcon#about to write, iclass 38, count 0 2006.229.20:42:58.50#ibcon#wrote, iclass 38, count 0 2006.229.20:42:58.50#ibcon#about to read 3, iclass 38, count 0 2006.229.20:42:58.52#ibcon#read 3, iclass 38, count 0 2006.229.20:42:58.52#ibcon#about to read 4, iclass 38, count 0 2006.229.20:42:58.52#ibcon#read 4, iclass 38, count 0 2006.229.20:42:58.52#ibcon#about to read 5, iclass 38, count 0 2006.229.20:42:58.52#ibcon#read 5, iclass 38, count 0 2006.229.20:42:58.52#ibcon#about to read 6, iclass 38, count 0 2006.229.20:42:58.52#ibcon#read 6, iclass 38, count 0 2006.229.20:42:58.52#ibcon#end of sib2, iclass 38, count 0 2006.229.20:42:58.52#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:42:58.52#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:42:58.52#ibcon#[25=BW32\r\n] 2006.229.20:42:58.52#ibcon#*before write, iclass 38, count 0 2006.229.20:42:58.52#ibcon#enter sib2, iclass 38, count 0 2006.229.20:42:58.52#ibcon#flushed, iclass 38, count 0 2006.229.20:42:58.52#ibcon#about to write, iclass 38, count 0 2006.229.20:42:58.52#ibcon#wrote, iclass 38, count 0 2006.229.20:42:58.52#ibcon#about to read 3, iclass 38, count 0 2006.229.20:42:58.55#ibcon#read 3, iclass 38, count 0 2006.229.20:42:58.55#ibcon#about to read 4, iclass 38, count 0 2006.229.20:42:58.55#ibcon#read 4, iclass 38, count 0 2006.229.20:42:58.55#ibcon#about to read 5, iclass 38, count 0 2006.229.20:42:58.55#ibcon#read 5, iclass 38, count 0 2006.229.20:42:58.55#ibcon#about to read 6, iclass 38, count 0 2006.229.20:42:58.55#ibcon#read 6, iclass 38, count 0 2006.229.20:42:58.55#ibcon#end of sib2, iclass 38, count 0 2006.229.20:42:58.55#ibcon#*after write, iclass 38, count 0 2006.229.20:42:58.55#ibcon#*before return 0, iclass 38, count 0 2006.229.20:42:58.55#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:58.55#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.20:42:58.55#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:42:58.55#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:42:58.55$vck44/vbbw=wide 2006.229.20:42:58.55#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.20:42:58.55#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.20:42:58.55#ibcon#ireg 8 cls_cnt 0 2006.229.20:42:58.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:42:58.62#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:42:58.62#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:42:58.62#ibcon#enter wrdev, iclass 40, count 0 2006.229.20:42:58.62#ibcon#first serial, iclass 40, count 0 2006.229.20:42:58.62#ibcon#enter sib2, iclass 40, count 0 2006.229.20:42:58.62#ibcon#flushed, iclass 40, count 0 2006.229.20:42:58.62#ibcon#about to write, iclass 40, count 0 2006.229.20:42:58.62#ibcon#wrote, iclass 40, count 0 2006.229.20:42:58.62#ibcon#about to read 3, iclass 40, count 0 2006.229.20:42:58.64#ibcon#read 3, iclass 40, count 0 2006.229.20:42:58.64#ibcon#about to read 4, iclass 40, count 0 2006.229.20:42:58.64#ibcon#read 4, iclass 40, count 0 2006.229.20:42:58.64#ibcon#about to read 5, iclass 40, count 0 2006.229.20:42:58.64#ibcon#read 5, iclass 40, count 0 2006.229.20:42:58.64#ibcon#about to read 6, iclass 40, count 0 2006.229.20:42:58.64#ibcon#read 6, iclass 40, count 0 2006.229.20:42:58.64#ibcon#end of sib2, iclass 40, count 0 2006.229.20:42:58.64#ibcon#*mode == 0, iclass 40, count 0 2006.229.20:42:58.64#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.20:42:58.64#ibcon#[27=BW32\r\n] 2006.229.20:42:58.64#ibcon#*before write, iclass 40, count 0 2006.229.20:42:58.64#ibcon#enter sib2, iclass 40, count 0 2006.229.20:42:58.64#ibcon#flushed, iclass 40, count 0 2006.229.20:42:58.64#ibcon#about to write, iclass 40, count 0 2006.229.20:42:58.64#ibcon#wrote, iclass 40, count 0 2006.229.20:42:58.64#ibcon#about to read 3, iclass 40, count 0 2006.229.20:42:58.67#ibcon#read 3, iclass 40, count 0 2006.229.20:42:58.67#ibcon#about to read 4, iclass 40, count 0 2006.229.20:42:58.67#ibcon#read 4, iclass 40, count 0 2006.229.20:42:58.67#ibcon#about to read 5, iclass 40, count 0 2006.229.20:42:58.67#ibcon#read 5, iclass 40, count 0 2006.229.20:42:58.67#ibcon#about to read 6, iclass 40, count 0 2006.229.20:42:58.67#ibcon#read 6, iclass 40, count 0 2006.229.20:42:58.67#ibcon#end of sib2, iclass 40, count 0 2006.229.20:42:58.67#ibcon#*after write, iclass 40, count 0 2006.229.20:42:58.67#ibcon#*before return 0, iclass 40, count 0 2006.229.20:42:58.67#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:42:58.67#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.20:42:58.67#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.20:42:58.67#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.20:42:58.67$setupk4/ifdk4 2006.229.20:42:58.67$ifdk4/lo= 2006.229.20:42:58.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:42:58.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:42:58.67$ifdk4/patch= 2006.229.20:42:58.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:42:58.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:42:58.67$setupk4/!*+20s 2006.229.20:43:07.94#abcon#<5=/07 1.5 3.4 25.991001001.8\r\n> 2006.229.20:43:07.96#abcon#{5=INTERFACE CLEAR} 2006.229.20:43:08.02#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:43:13.18$setupk4/"tpicd 2006.229.20:43:13.18$setupk4/echo=off 2006.229.20:43:13.18$setupk4/xlog=off 2006.229.20:43:13.18:!2006.229.20:45:52 2006.229.20:43:28.14#trakl#Source acquired 2006.229.20:43:28.14#flagr#flagr/antenna,acquired 2006.229.20:45:52.00:preob 2006.229.20:45:53.14/onsource/TRACKING 2006.229.20:45:53.14:!2006.229.20:46:02 2006.229.20:46:02.00:"tape 2006.229.20:46:02.00:"st=record 2006.229.20:46:02.00:data_valid=on 2006.229.20:46:02.00:midob 2006.229.20:46:02.14/onsource/TRACKING 2006.229.20:46:02.14/wx/26.02,1001.9,100 2006.229.20:46:02.33/cable/+6.4214E-03 2006.229.20:46:03.42/va/01,08,usb,yes,30,32 2006.229.20:46:03.42/va/02,07,usb,yes,32,33 2006.229.20:46:03.42/va/03,06,usb,yes,40,43 2006.229.20:46:03.42/va/04,07,usb,yes,33,35 2006.229.20:46:03.42/va/05,04,usb,yes,30,30 2006.229.20:46:03.42/va/06,04,usb,yes,34,33 2006.229.20:46:03.42/va/07,05,usb,yes,30,30 2006.229.20:46:03.42/va/08,06,usb,yes,21,27 2006.229.20:46:03.65/valo/01,524.99,yes,locked 2006.229.20:46:03.65/valo/02,534.99,yes,locked 2006.229.20:46:03.65/valo/03,564.99,yes,locked 2006.229.20:46:03.65/valo/04,624.99,yes,locked 2006.229.20:46:03.65/valo/05,734.99,yes,locked 2006.229.20:46:03.65/valo/06,814.99,yes,locked 2006.229.20:46:03.65/valo/07,864.99,yes,locked 2006.229.20:46:03.65/valo/08,884.99,yes,locked 2006.229.20:46:04.74/vb/01,04,usb,yes,31,29 2006.229.20:46:04.74/vb/02,04,usb,yes,34,33 2006.229.20:46:04.74/vb/03,04,usb,yes,31,34 2006.229.20:46:04.74/vb/04,04,usb,yes,35,34 2006.229.20:46:04.74/vb/05,04,usb,yes,27,30 2006.229.20:46:04.74/vb/06,04,usb,yes,32,28 2006.229.20:46:04.74/vb/07,04,usb,yes,32,32 2006.229.20:46:04.74/vb/08,04,usb,yes,29,33 2006.229.20:46:04.98/vblo/01,629.99,yes,locked 2006.229.20:46:04.98/vblo/02,634.99,yes,locked 2006.229.20:46:04.98/vblo/03,649.99,yes,locked 2006.229.20:46:04.98/vblo/04,679.99,yes,locked 2006.229.20:46:04.98/vblo/05,709.99,yes,locked 2006.229.20:46:04.98/vblo/06,719.99,yes,locked 2006.229.20:46:04.98/vblo/07,734.99,yes,locked 2006.229.20:46:04.98/vblo/08,744.99,yes,locked 2006.229.20:46:05.13/vabw/8 2006.229.20:46:05.28/vbbw/8 2006.229.20:46:05.37/xfe/off,on,12.5 2006.229.20:46:05.75/ifatt/23,28,28,28 2006.229.20:46:06.08/fmout-gps/S +4.61E-07 2006.229.20:46:06.12:!2006.229.20:50:02 2006.229.20:50:02.02:data_valid=off 2006.229.20:50:02.02:"et 2006.229.20:50:02.02:!+3s 2006.229.20:50:05.04:"tape 2006.229.20:50:05.05:postob 2006.229.20:50:05.23/cable/+6.4202E-03 2006.229.20:50:05.23/wx/26.08,1001.9,100 2006.229.20:50:05.29/fmout-gps/S +4.61E-07 2006.229.20:50:05.29:scan_name=229-2053,jd0608,430 2006.229.20:50:05.29:source=0804+499,080839.67,495036.5,2000.0,cw 2006.229.20:50:06.15#flagr#flagr/antenna,new-source 2006.229.20:50:06.15:checkk5 2006.229.20:50:06.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.20:50:06.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.20:50:07.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.20:50:07.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.20:50:08.13/chk_obsdata//k5ts1/T2292046??a.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.20:50:08.53/chk_obsdata//k5ts2/T2292046??b.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.20:50:08.92/chk_obsdata//k5ts3/T2292046??c.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.20:50:09.33/chk_obsdata//k5ts4/T2292046??d.dat file size is correct (nominal:960MB, actual:956MB). 2006.229.20:50:10.05/k5log//k5ts1_log_newline 2006.229.20:50:10.76/k5log//k5ts2_log_newline 2006.229.20:50:11.51/k5log//k5ts3_log_newline 2006.229.20:50:12.22/k5log//k5ts4_log_newline 2006.229.20:50:12.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.20:50:12.24:setupk4=1 2006.229.20:50:12.25$setupk4/echo=on 2006.229.20:50:12.25$setupk4/pcalon 2006.229.20:50:12.25$pcalon/"no phase cal control is implemented here 2006.229.20:50:12.25$setupk4/"tpicd=stop 2006.229.20:50:12.25$setupk4/"rec=synch_on 2006.229.20:50:12.25$setupk4/"rec_mode=128 2006.229.20:50:12.25$setupk4/!* 2006.229.20:50:12.25$setupk4/recpk4 2006.229.20:50:12.25$recpk4/recpatch= 2006.229.20:50:12.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.20:50:12.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.20:50:12.25$setupk4/vck44 2006.229.20:50:12.25$vck44/valo=1,524.99 2006.229.20:50:12.25#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.20:50:12.25#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.20:50:12.25#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:12.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:50:12.25#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:50:12.25#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:50:12.25#ibcon#enter wrdev, iclass 33, count 0 2006.229.20:50:12.25#ibcon#first serial, iclass 33, count 0 2006.229.20:50:12.25#ibcon#enter sib2, iclass 33, count 0 2006.229.20:50:12.25#ibcon#flushed, iclass 33, count 0 2006.229.20:50:12.25#ibcon#about to write, iclass 33, count 0 2006.229.20:50:12.25#ibcon#wrote, iclass 33, count 0 2006.229.20:50:12.25#ibcon#about to read 3, iclass 33, count 0 2006.229.20:50:12.27#ibcon#read 3, iclass 33, count 0 2006.229.20:50:12.27#ibcon#about to read 4, iclass 33, count 0 2006.229.20:50:12.27#ibcon#read 4, iclass 33, count 0 2006.229.20:50:12.27#ibcon#about to read 5, iclass 33, count 0 2006.229.20:50:12.27#ibcon#read 5, iclass 33, count 0 2006.229.20:50:12.27#ibcon#about to read 6, iclass 33, count 0 2006.229.20:50:12.27#ibcon#read 6, iclass 33, count 0 2006.229.20:50:12.27#ibcon#end of sib2, iclass 33, count 0 2006.229.20:50:12.27#ibcon#*mode == 0, iclass 33, count 0 2006.229.20:50:12.27#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.20:50:12.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.20:50:12.27#ibcon#*before write, iclass 33, count 0 2006.229.20:50:12.27#ibcon#enter sib2, iclass 33, count 0 2006.229.20:50:12.28#ibcon#flushed, iclass 33, count 0 2006.229.20:50:12.28#ibcon#about to write, iclass 33, count 0 2006.229.20:50:12.28#ibcon#wrote, iclass 33, count 0 2006.229.20:50:12.28#ibcon#about to read 3, iclass 33, count 0 2006.229.20:50:12.32#ibcon#read 3, iclass 33, count 0 2006.229.20:50:12.32#ibcon#about to read 4, iclass 33, count 0 2006.229.20:50:12.32#ibcon#read 4, iclass 33, count 0 2006.229.20:50:12.32#ibcon#about to read 5, iclass 33, count 0 2006.229.20:50:12.32#ibcon#read 5, iclass 33, count 0 2006.229.20:50:12.32#ibcon#about to read 6, iclass 33, count 0 2006.229.20:50:12.32#ibcon#read 6, iclass 33, count 0 2006.229.20:50:12.32#ibcon#end of sib2, iclass 33, count 0 2006.229.20:50:12.32#ibcon#*after write, iclass 33, count 0 2006.229.20:50:12.33#ibcon#*before return 0, iclass 33, count 0 2006.229.20:50:12.33#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:50:12.33#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.20:50:12.33#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.20:50:12.33#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.20:50:12.33$vck44/va=1,8 2006.229.20:50:12.33#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.20:50:12.33#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.20:50:12.33#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:12.33#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:50:12.33#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:50:12.33#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:50:12.33#ibcon#enter wrdev, iclass 35, count 2 2006.229.20:50:12.33#ibcon#first serial, iclass 35, count 2 2006.229.20:50:12.33#ibcon#enter sib2, iclass 35, count 2 2006.229.20:50:12.33#ibcon#flushed, iclass 35, count 2 2006.229.20:50:12.33#ibcon#about to write, iclass 35, count 2 2006.229.20:50:12.33#ibcon#wrote, iclass 35, count 2 2006.229.20:50:12.33#ibcon#about to read 3, iclass 35, count 2 2006.229.20:50:12.34#ibcon#read 3, iclass 35, count 2 2006.229.20:50:12.34#ibcon#about to read 4, iclass 35, count 2 2006.229.20:50:12.34#ibcon#read 4, iclass 35, count 2 2006.229.20:50:12.34#ibcon#about to read 5, iclass 35, count 2 2006.229.20:50:12.34#ibcon#read 5, iclass 35, count 2 2006.229.20:50:12.34#ibcon#about to read 6, iclass 35, count 2 2006.229.20:50:12.34#ibcon#read 6, iclass 35, count 2 2006.229.20:50:12.34#ibcon#end of sib2, iclass 35, count 2 2006.229.20:50:12.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.20:50:12.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.20:50:12.34#ibcon#[25=AT01-08\r\n] 2006.229.20:50:12.34#ibcon#*before write, iclass 35, count 2 2006.229.20:50:12.34#ibcon#enter sib2, iclass 35, count 2 2006.229.20:50:12.34#ibcon#flushed, iclass 35, count 2 2006.229.20:50:12.34#ibcon#about to write, iclass 35, count 2 2006.229.20:50:12.35#ibcon#wrote, iclass 35, count 2 2006.229.20:50:12.35#ibcon#about to read 3, iclass 35, count 2 2006.229.20:50:12.37#ibcon#read 3, iclass 35, count 2 2006.229.20:50:12.37#ibcon#about to read 4, iclass 35, count 2 2006.229.20:50:12.37#ibcon#read 4, iclass 35, count 2 2006.229.20:50:12.37#ibcon#about to read 5, iclass 35, count 2 2006.229.20:50:12.37#ibcon#read 5, iclass 35, count 2 2006.229.20:50:12.37#ibcon#about to read 6, iclass 35, count 2 2006.229.20:50:12.37#ibcon#read 6, iclass 35, count 2 2006.229.20:50:12.37#ibcon#end of sib2, iclass 35, count 2 2006.229.20:50:12.37#ibcon#*after write, iclass 35, count 2 2006.229.20:50:12.37#ibcon#*before return 0, iclass 35, count 2 2006.229.20:50:12.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:50:12.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.20:50:12.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.20:50:12.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:12.38#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:50:12.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:50:12.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:50:12.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.20:50:12.49#ibcon#first serial, iclass 35, count 0 2006.229.20:50:12.49#ibcon#enter sib2, iclass 35, count 0 2006.229.20:50:12.49#ibcon#flushed, iclass 35, count 0 2006.229.20:50:12.49#ibcon#about to write, iclass 35, count 0 2006.229.20:50:12.49#ibcon#wrote, iclass 35, count 0 2006.229.20:50:12.49#ibcon#about to read 3, iclass 35, count 0 2006.229.20:50:12.51#ibcon#read 3, iclass 35, count 0 2006.229.20:50:12.51#ibcon#about to read 4, iclass 35, count 0 2006.229.20:50:12.51#ibcon#read 4, iclass 35, count 0 2006.229.20:50:12.51#ibcon#about to read 5, iclass 35, count 0 2006.229.20:50:12.51#ibcon#read 5, iclass 35, count 0 2006.229.20:50:12.51#ibcon#about to read 6, iclass 35, count 0 2006.229.20:50:12.51#ibcon#read 6, iclass 35, count 0 2006.229.20:50:12.51#ibcon#end of sib2, iclass 35, count 0 2006.229.20:50:12.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.20:50:12.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.20:50:12.51#ibcon#[25=USB\r\n] 2006.229.20:50:12.51#ibcon#*before write, iclass 35, count 0 2006.229.20:50:12.52#ibcon#enter sib2, iclass 35, count 0 2006.229.20:50:12.52#ibcon#flushed, iclass 35, count 0 2006.229.20:50:12.52#ibcon#about to write, iclass 35, count 0 2006.229.20:50:12.52#ibcon#wrote, iclass 35, count 0 2006.229.20:50:12.52#ibcon#about to read 3, iclass 35, count 0 2006.229.20:50:12.54#ibcon#read 3, iclass 35, count 0 2006.229.20:50:12.54#ibcon#about to read 4, iclass 35, count 0 2006.229.20:50:12.54#ibcon#read 4, iclass 35, count 0 2006.229.20:50:12.54#ibcon#about to read 5, iclass 35, count 0 2006.229.20:50:12.54#ibcon#read 5, iclass 35, count 0 2006.229.20:50:12.54#ibcon#about to read 6, iclass 35, count 0 2006.229.20:50:12.54#ibcon#read 6, iclass 35, count 0 2006.229.20:50:12.54#ibcon#end of sib2, iclass 35, count 0 2006.229.20:50:12.54#ibcon#*after write, iclass 35, count 0 2006.229.20:50:12.54#ibcon#*before return 0, iclass 35, count 0 2006.229.20:50:12.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:50:12.55#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.20:50:12.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.20:50:12.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.20:50:12.55$vck44/valo=2,534.99 2006.229.20:50:12.55#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.20:50:12.55#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.20:50:12.55#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:12.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:50:12.55#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:50:12.55#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:50:12.55#ibcon#enter wrdev, iclass 37, count 0 2006.229.20:50:12.55#ibcon#first serial, iclass 37, count 0 2006.229.20:50:12.55#ibcon#enter sib2, iclass 37, count 0 2006.229.20:50:12.55#ibcon#flushed, iclass 37, count 0 2006.229.20:50:12.55#ibcon#about to write, iclass 37, count 0 2006.229.20:50:12.55#ibcon#wrote, iclass 37, count 0 2006.229.20:50:12.55#ibcon#about to read 3, iclass 37, count 0 2006.229.20:50:12.56#ibcon#read 3, iclass 37, count 0 2006.229.20:50:12.56#ibcon#about to read 4, iclass 37, count 0 2006.229.20:50:12.56#ibcon#read 4, iclass 37, count 0 2006.229.20:50:12.56#ibcon#about to read 5, iclass 37, count 0 2006.229.20:50:12.56#ibcon#read 5, iclass 37, count 0 2006.229.20:50:12.56#ibcon#about to read 6, iclass 37, count 0 2006.229.20:50:12.56#ibcon#read 6, iclass 37, count 0 2006.229.20:50:12.56#ibcon#end of sib2, iclass 37, count 0 2006.229.20:50:12.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.20:50:12.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.20:50:12.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.20:50:12.56#ibcon#*before write, iclass 37, count 0 2006.229.20:50:12.56#ibcon#enter sib2, iclass 37, count 0 2006.229.20:50:12.56#ibcon#flushed, iclass 37, count 0 2006.229.20:50:12.56#ibcon#about to write, iclass 37, count 0 2006.229.20:50:12.57#ibcon#wrote, iclass 37, count 0 2006.229.20:50:12.57#ibcon#about to read 3, iclass 37, count 0 2006.229.20:50:12.60#ibcon#read 3, iclass 37, count 0 2006.229.20:50:12.60#ibcon#about to read 4, iclass 37, count 0 2006.229.20:50:12.60#ibcon#read 4, iclass 37, count 0 2006.229.20:50:12.60#ibcon#about to read 5, iclass 37, count 0 2006.229.20:50:12.60#ibcon#read 5, iclass 37, count 0 2006.229.20:50:12.60#ibcon#about to read 6, iclass 37, count 0 2006.229.20:50:12.60#ibcon#read 6, iclass 37, count 0 2006.229.20:50:12.60#ibcon#end of sib2, iclass 37, count 0 2006.229.20:50:12.60#ibcon#*after write, iclass 37, count 0 2006.229.20:50:12.60#ibcon#*before return 0, iclass 37, count 0 2006.229.20:50:12.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:50:12.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.20:50:12.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.20:50:12.61#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.20:50:12.61$vck44/va=2,7 2006.229.20:50:12.61#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.20:50:12.61#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.20:50:12.61#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:12.61#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:50:12.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:50:12.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:50:12.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.20:50:12.66#ibcon#first serial, iclass 39, count 2 2006.229.20:50:12.66#ibcon#enter sib2, iclass 39, count 2 2006.229.20:50:12.66#ibcon#flushed, iclass 39, count 2 2006.229.20:50:12.66#ibcon#about to write, iclass 39, count 2 2006.229.20:50:12.66#ibcon#wrote, iclass 39, count 2 2006.229.20:50:12.66#ibcon#about to read 3, iclass 39, count 2 2006.229.20:50:12.68#ibcon#read 3, iclass 39, count 2 2006.229.20:50:12.68#ibcon#about to read 4, iclass 39, count 2 2006.229.20:50:12.68#ibcon#read 4, iclass 39, count 2 2006.229.20:50:12.68#ibcon#about to read 5, iclass 39, count 2 2006.229.20:50:12.68#ibcon#read 5, iclass 39, count 2 2006.229.20:50:12.68#ibcon#about to read 6, iclass 39, count 2 2006.229.20:50:12.68#ibcon#read 6, iclass 39, count 2 2006.229.20:50:12.68#ibcon#end of sib2, iclass 39, count 2 2006.229.20:50:12.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.20:50:12.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.20:50:12.68#ibcon#[25=AT02-07\r\n] 2006.229.20:50:12.68#ibcon#*before write, iclass 39, count 2 2006.229.20:50:12.68#ibcon#enter sib2, iclass 39, count 2 2006.229.20:50:12.68#ibcon#flushed, iclass 39, count 2 2006.229.20:50:12.68#ibcon#about to write, iclass 39, count 2 2006.229.20:50:12.69#ibcon#wrote, iclass 39, count 2 2006.229.20:50:12.69#ibcon#about to read 3, iclass 39, count 2 2006.229.20:50:12.71#ibcon#read 3, iclass 39, count 2 2006.229.20:50:12.71#ibcon#about to read 4, iclass 39, count 2 2006.229.20:50:12.71#ibcon#read 4, iclass 39, count 2 2006.229.20:50:12.71#ibcon#about to read 5, iclass 39, count 2 2006.229.20:50:12.71#ibcon#read 5, iclass 39, count 2 2006.229.20:50:12.71#ibcon#about to read 6, iclass 39, count 2 2006.229.20:50:12.71#ibcon#read 6, iclass 39, count 2 2006.229.20:50:12.71#ibcon#end of sib2, iclass 39, count 2 2006.229.20:50:12.71#ibcon#*after write, iclass 39, count 2 2006.229.20:50:12.71#ibcon#*before return 0, iclass 39, count 2 2006.229.20:50:12.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:50:12.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.20:50:12.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.20:50:12.71#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:12.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:50:12.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:50:12.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:50:12.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.20:50:12.83#ibcon#first serial, iclass 39, count 0 2006.229.20:50:12.83#ibcon#enter sib2, iclass 39, count 0 2006.229.20:50:12.83#ibcon#flushed, iclass 39, count 0 2006.229.20:50:12.83#ibcon#about to write, iclass 39, count 0 2006.229.20:50:12.83#ibcon#wrote, iclass 39, count 0 2006.229.20:50:12.83#ibcon#about to read 3, iclass 39, count 0 2006.229.20:50:12.85#ibcon#read 3, iclass 39, count 0 2006.229.20:50:12.85#ibcon#about to read 4, iclass 39, count 0 2006.229.20:50:12.85#ibcon#read 4, iclass 39, count 0 2006.229.20:50:12.85#ibcon#about to read 5, iclass 39, count 0 2006.229.20:50:12.85#ibcon#read 5, iclass 39, count 0 2006.229.20:50:12.85#ibcon#about to read 6, iclass 39, count 0 2006.229.20:50:12.85#ibcon#read 6, iclass 39, count 0 2006.229.20:50:12.85#ibcon#end of sib2, iclass 39, count 0 2006.229.20:50:12.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.20:50:12.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.20:50:12.85#ibcon#[25=USB\r\n] 2006.229.20:50:12.85#ibcon#*before write, iclass 39, count 0 2006.229.20:50:12.85#ibcon#enter sib2, iclass 39, count 0 2006.229.20:50:12.85#ibcon#flushed, iclass 39, count 0 2006.229.20:50:12.85#ibcon#about to write, iclass 39, count 0 2006.229.20:50:12.86#ibcon#wrote, iclass 39, count 0 2006.229.20:50:12.86#ibcon#about to read 3, iclass 39, count 0 2006.229.20:50:12.88#ibcon#read 3, iclass 39, count 0 2006.229.20:50:12.88#ibcon#about to read 4, iclass 39, count 0 2006.229.20:50:12.88#ibcon#read 4, iclass 39, count 0 2006.229.20:50:12.88#ibcon#about to read 5, iclass 39, count 0 2006.229.20:50:12.88#ibcon#read 5, iclass 39, count 0 2006.229.20:50:12.88#ibcon#about to read 6, iclass 39, count 0 2006.229.20:50:12.88#ibcon#read 6, iclass 39, count 0 2006.229.20:50:12.88#ibcon#end of sib2, iclass 39, count 0 2006.229.20:50:12.88#ibcon#*after write, iclass 39, count 0 2006.229.20:50:12.88#ibcon#*before return 0, iclass 39, count 0 2006.229.20:50:12.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:50:12.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.20:50:12.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.20:50:12.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.20:50:12.89$vck44/valo=3,564.99 2006.229.20:50:12.89#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.20:50:12.89#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.20:50:12.89#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:12.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:12.89#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:12.89#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:12.89#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:50:12.89#ibcon#first serial, iclass 3, count 0 2006.229.20:50:12.89#ibcon#enter sib2, iclass 3, count 0 2006.229.20:50:12.89#ibcon#flushed, iclass 3, count 0 2006.229.20:50:12.89#ibcon#about to write, iclass 3, count 0 2006.229.20:50:12.89#ibcon#wrote, iclass 3, count 0 2006.229.20:50:12.89#ibcon#about to read 3, iclass 3, count 0 2006.229.20:50:12.90#ibcon#read 3, iclass 3, count 0 2006.229.20:50:12.90#ibcon#about to read 4, iclass 3, count 0 2006.229.20:50:12.90#ibcon#read 4, iclass 3, count 0 2006.229.20:50:12.90#ibcon#about to read 5, iclass 3, count 0 2006.229.20:50:12.90#ibcon#read 5, iclass 3, count 0 2006.229.20:50:12.90#ibcon#about to read 6, iclass 3, count 0 2006.229.20:50:12.90#ibcon#read 6, iclass 3, count 0 2006.229.20:50:12.90#ibcon#end of sib2, iclass 3, count 0 2006.229.20:50:12.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:50:12.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:50:12.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.20:50:12.90#ibcon#*before write, iclass 3, count 0 2006.229.20:50:12.90#ibcon#enter sib2, iclass 3, count 0 2006.229.20:50:12.90#ibcon#flushed, iclass 3, count 0 2006.229.20:50:12.90#ibcon#about to write, iclass 3, count 0 2006.229.20:50:12.91#ibcon#wrote, iclass 3, count 0 2006.229.20:50:12.91#ibcon#about to read 3, iclass 3, count 0 2006.229.20:50:12.94#ibcon#read 3, iclass 3, count 0 2006.229.20:50:12.94#ibcon#about to read 4, iclass 3, count 0 2006.229.20:50:12.94#ibcon#read 4, iclass 3, count 0 2006.229.20:50:12.94#ibcon#about to read 5, iclass 3, count 0 2006.229.20:50:12.94#ibcon#read 5, iclass 3, count 0 2006.229.20:50:12.94#ibcon#about to read 6, iclass 3, count 0 2006.229.20:50:12.94#ibcon#read 6, iclass 3, count 0 2006.229.20:50:12.94#ibcon#end of sib2, iclass 3, count 0 2006.229.20:50:12.94#ibcon#*after write, iclass 3, count 0 2006.229.20:50:12.94#ibcon#*before return 0, iclass 3, count 0 2006.229.20:50:12.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:12.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:12.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:50:12.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:50:12.95$vck44/va=3,6 2006.229.20:50:12.95#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.20:50:12.95#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.20:50:12.95#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:12.95#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:12.99#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:12.99#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:12.99#ibcon#enter wrdev, iclass 5, count 2 2006.229.20:50:12.99#ibcon#first serial, iclass 5, count 2 2006.229.20:50:12.99#ibcon#enter sib2, iclass 5, count 2 2006.229.20:50:12.99#ibcon#flushed, iclass 5, count 2 2006.229.20:50:12.99#ibcon#about to write, iclass 5, count 2 2006.229.20:50:12.99#ibcon#wrote, iclass 5, count 2 2006.229.20:50:12.99#ibcon#about to read 3, iclass 5, count 2 2006.229.20:50:13.01#ibcon#read 3, iclass 5, count 2 2006.229.20:50:13.01#ibcon#about to read 4, iclass 5, count 2 2006.229.20:50:13.01#ibcon#read 4, iclass 5, count 2 2006.229.20:50:13.01#ibcon#about to read 5, iclass 5, count 2 2006.229.20:50:13.01#ibcon#read 5, iclass 5, count 2 2006.229.20:50:13.01#ibcon#about to read 6, iclass 5, count 2 2006.229.20:50:13.01#ibcon#read 6, iclass 5, count 2 2006.229.20:50:13.01#ibcon#end of sib2, iclass 5, count 2 2006.229.20:50:13.01#ibcon#*mode == 0, iclass 5, count 2 2006.229.20:50:13.01#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.20:50:13.01#ibcon#[25=AT03-06\r\n] 2006.229.20:50:13.01#ibcon#*before write, iclass 5, count 2 2006.229.20:50:13.01#ibcon#enter sib2, iclass 5, count 2 2006.229.20:50:13.01#ibcon#flushed, iclass 5, count 2 2006.229.20:50:13.01#ibcon#about to write, iclass 5, count 2 2006.229.20:50:13.02#ibcon#wrote, iclass 5, count 2 2006.229.20:50:13.02#ibcon#about to read 3, iclass 5, count 2 2006.229.20:50:13.04#ibcon#read 3, iclass 5, count 2 2006.229.20:50:13.04#ibcon#about to read 4, iclass 5, count 2 2006.229.20:50:13.04#ibcon#read 4, iclass 5, count 2 2006.229.20:50:13.04#ibcon#about to read 5, iclass 5, count 2 2006.229.20:50:13.04#ibcon#read 5, iclass 5, count 2 2006.229.20:50:13.04#ibcon#about to read 6, iclass 5, count 2 2006.229.20:50:13.04#ibcon#read 6, iclass 5, count 2 2006.229.20:50:13.04#ibcon#end of sib2, iclass 5, count 2 2006.229.20:50:13.04#ibcon#*after write, iclass 5, count 2 2006.229.20:50:13.04#ibcon#*before return 0, iclass 5, count 2 2006.229.20:50:13.04#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:13.04#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:13.04#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.20:50:13.05#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:13.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:13.15#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:13.15#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:13.15#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:50:13.15#ibcon#first serial, iclass 5, count 0 2006.229.20:50:13.15#ibcon#enter sib2, iclass 5, count 0 2006.229.20:50:13.15#ibcon#flushed, iclass 5, count 0 2006.229.20:50:13.15#ibcon#about to write, iclass 5, count 0 2006.229.20:50:13.15#ibcon#wrote, iclass 5, count 0 2006.229.20:50:13.15#ibcon#about to read 3, iclass 5, count 0 2006.229.20:50:13.17#ibcon#read 3, iclass 5, count 0 2006.229.20:50:13.17#ibcon#about to read 4, iclass 5, count 0 2006.229.20:50:13.17#ibcon#read 4, iclass 5, count 0 2006.229.20:50:13.17#ibcon#about to read 5, iclass 5, count 0 2006.229.20:50:13.17#ibcon#read 5, iclass 5, count 0 2006.229.20:50:13.17#ibcon#about to read 6, iclass 5, count 0 2006.229.20:50:13.17#ibcon#read 6, iclass 5, count 0 2006.229.20:50:13.17#ibcon#end of sib2, iclass 5, count 0 2006.229.20:50:13.17#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:50:13.17#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:50:13.17#ibcon#[25=USB\r\n] 2006.229.20:50:13.17#ibcon#*before write, iclass 5, count 0 2006.229.20:50:13.17#ibcon#enter sib2, iclass 5, count 0 2006.229.20:50:13.17#ibcon#flushed, iclass 5, count 0 2006.229.20:50:13.18#ibcon#about to write, iclass 5, count 0 2006.229.20:50:13.18#ibcon#wrote, iclass 5, count 0 2006.229.20:50:13.18#ibcon#about to read 3, iclass 5, count 0 2006.229.20:50:13.20#ibcon#read 3, iclass 5, count 0 2006.229.20:50:13.20#ibcon#about to read 4, iclass 5, count 0 2006.229.20:50:13.20#ibcon#read 4, iclass 5, count 0 2006.229.20:50:13.20#ibcon#about to read 5, iclass 5, count 0 2006.229.20:50:13.20#ibcon#read 5, iclass 5, count 0 2006.229.20:50:13.20#ibcon#about to read 6, iclass 5, count 0 2006.229.20:50:13.20#ibcon#read 6, iclass 5, count 0 2006.229.20:50:13.20#ibcon#end of sib2, iclass 5, count 0 2006.229.20:50:13.20#ibcon#*after write, iclass 5, count 0 2006.229.20:50:13.20#ibcon#*before return 0, iclass 5, count 0 2006.229.20:50:13.20#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:13.20#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:13.20#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:50:13.20#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:50:13.21$vck44/valo=4,624.99 2006.229.20:50:13.21#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.20:50:13.21#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.20:50:13.21#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:13.21#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:13.21#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:13.21#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:13.21#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:50:13.21#ibcon#first serial, iclass 7, count 0 2006.229.20:50:13.21#ibcon#enter sib2, iclass 7, count 0 2006.229.20:50:13.21#ibcon#flushed, iclass 7, count 0 2006.229.20:50:13.21#ibcon#about to write, iclass 7, count 0 2006.229.20:50:13.21#ibcon#wrote, iclass 7, count 0 2006.229.20:50:13.21#ibcon#about to read 3, iclass 7, count 0 2006.229.20:50:13.22#ibcon#read 3, iclass 7, count 0 2006.229.20:50:13.22#ibcon#about to read 4, iclass 7, count 0 2006.229.20:50:13.22#ibcon#read 4, iclass 7, count 0 2006.229.20:50:13.22#ibcon#about to read 5, iclass 7, count 0 2006.229.20:50:13.22#ibcon#read 5, iclass 7, count 0 2006.229.20:50:13.22#ibcon#about to read 6, iclass 7, count 0 2006.229.20:50:13.22#ibcon#read 6, iclass 7, count 0 2006.229.20:50:13.22#ibcon#end of sib2, iclass 7, count 0 2006.229.20:50:13.22#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:50:13.22#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:50:13.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.20:50:13.22#ibcon#*before write, iclass 7, count 0 2006.229.20:50:13.22#ibcon#enter sib2, iclass 7, count 0 2006.229.20:50:13.23#ibcon#flushed, iclass 7, count 0 2006.229.20:50:13.23#ibcon#about to write, iclass 7, count 0 2006.229.20:50:13.23#ibcon#wrote, iclass 7, count 0 2006.229.20:50:13.23#ibcon#about to read 3, iclass 7, count 0 2006.229.20:50:13.26#ibcon#read 3, iclass 7, count 0 2006.229.20:50:13.26#ibcon#about to read 4, iclass 7, count 0 2006.229.20:50:13.26#ibcon#read 4, iclass 7, count 0 2006.229.20:50:13.26#ibcon#about to read 5, iclass 7, count 0 2006.229.20:50:13.26#ibcon#read 5, iclass 7, count 0 2006.229.20:50:13.26#ibcon#about to read 6, iclass 7, count 0 2006.229.20:50:13.26#ibcon#read 6, iclass 7, count 0 2006.229.20:50:13.26#ibcon#end of sib2, iclass 7, count 0 2006.229.20:50:13.26#ibcon#*after write, iclass 7, count 0 2006.229.20:50:13.26#ibcon#*before return 0, iclass 7, count 0 2006.229.20:50:13.26#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:13.26#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:13.26#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:50:13.27#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:50:13.27$vck44/va=4,7 2006.229.20:50:13.27#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.20:50:13.27#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.20:50:13.27#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:13.27#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:13.31#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:13.31#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:13.31#ibcon#enter wrdev, iclass 11, count 2 2006.229.20:50:13.31#ibcon#first serial, iclass 11, count 2 2006.229.20:50:13.31#ibcon#enter sib2, iclass 11, count 2 2006.229.20:50:13.31#ibcon#flushed, iclass 11, count 2 2006.229.20:50:13.31#ibcon#about to write, iclass 11, count 2 2006.229.20:50:13.31#ibcon#wrote, iclass 11, count 2 2006.229.20:50:13.31#ibcon#about to read 3, iclass 11, count 2 2006.229.20:50:13.33#ibcon#read 3, iclass 11, count 2 2006.229.20:50:13.33#ibcon#about to read 4, iclass 11, count 2 2006.229.20:50:13.33#ibcon#read 4, iclass 11, count 2 2006.229.20:50:13.33#ibcon#about to read 5, iclass 11, count 2 2006.229.20:50:13.33#ibcon#read 5, iclass 11, count 2 2006.229.20:50:13.33#ibcon#about to read 6, iclass 11, count 2 2006.229.20:50:13.33#ibcon#read 6, iclass 11, count 2 2006.229.20:50:13.33#ibcon#end of sib2, iclass 11, count 2 2006.229.20:50:13.33#ibcon#*mode == 0, iclass 11, count 2 2006.229.20:50:13.33#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.20:50:13.33#ibcon#[25=AT04-07\r\n] 2006.229.20:50:13.33#ibcon#*before write, iclass 11, count 2 2006.229.20:50:13.33#ibcon#enter sib2, iclass 11, count 2 2006.229.20:50:13.33#ibcon#flushed, iclass 11, count 2 2006.229.20:50:13.33#ibcon#about to write, iclass 11, count 2 2006.229.20:50:13.33#ibcon#wrote, iclass 11, count 2 2006.229.20:50:13.33#ibcon#about to read 3, iclass 11, count 2 2006.229.20:50:13.36#ibcon#read 3, iclass 11, count 2 2006.229.20:50:13.36#ibcon#about to read 4, iclass 11, count 2 2006.229.20:50:13.36#ibcon#read 4, iclass 11, count 2 2006.229.20:50:13.36#ibcon#about to read 5, iclass 11, count 2 2006.229.20:50:13.36#ibcon#read 5, iclass 11, count 2 2006.229.20:50:13.36#ibcon#about to read 6, iclass 11, count 2 2006.229.20:50:13.36#ibcon#read 6, iclass 11, count 2 2006.229.20:50:13.36#ibcon#end of sib2, iclass 11, count 2 2006.229.20:50:13.36#ibcon#*after write, iclass 11, count 2 2006.229.20:50:13.36#ibcon#*before return 0, iclass 11, count 2 2006.229.20:50:13.36#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:13.36#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:13.36#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.20:50:13.37#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:13.37#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:13.47#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:13.47#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:13.47#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:50:13.47#ibcon#first serial, iclass 11, count 0 2006.229.20:50:13.47#ibcon#enter sib2, iclass 11, count 0 2006.229.20:50:13.47#ibcon#flushed, iclass 11, count 0 2006.229.20:50:13.47#ibcon#about to write, iclass 11, count 0 2006.229.20:50:13.47#ibcon#wrote, iclass 11, count 0 2006.229.20:50:13.47#ibcon#about to read 3, iclass 11, count 0 2006.229.20:50:13.49#ibcon#read 3, iclass 11, count 0 2006.229.20:50:13.49#ibcon#about to read 4, iclass 11, count 0 2006.229.20:50:13.49#ibcon#read 4, iclass 11, count 0 2006.229.20:50:13.49#ibcon#about to read 5, iclass 11, count 0 2006.229.20:50:13.49#ibcon#read 5, iclass 11, count 0 2006.229.20:50:13.49#ibcon#about to read 6, iclass 11, count 0 2006.229.20:50:13.49#ibcon#read 6, iclass 11, count 0 2006.229.20:50:13.49#ibcon#end of sib2, iclass 11, count 0 2006.229.20:50:13.49#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:50:13.49#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:50:13.49#ibcon#[25=USB\r\n] 2006.229.20:50:13.50#ibcon#*before write, iclass 11, count 0 2006.229.20:50:13.50#ibcon#enter sib2, iclass 11, count 0 2006.229.20:50:13.50#ibcon#flushed, iclass 11, count 0 2006.229.20:50:13.50#ibcon#about to write, iclass 11, count 0 2006.229.20:50:13.50#ibcon#wrote, iclass 11, count 0 2006.229.20:50:13.50#ibcon#about to read 3, iclass 11, count 0 2006.229.20:50:13.52#ibcon#read 3, iclass 11, count 0 2006.229.20:50:13.52#ibcon#about to read 4, iclass 11, count 0 2006.229.20:50:13.52#ibcon#read 4, iclass 11, count 0 2006.229.20:50:13.52#ibcon#about to read 5, iclass 11, count 0 2006.229.20:50:13.52#ibcon#read 5, iclass 11, count 0 2006.229.20:50:13.52#ibcon#about to read 6, iclass 11, count 0 2006.229.20:50:13.52#ibcon#read 6, iclass 11, count 0 2006.229.20:50:13.52#ibcon#end of sib2, iclass 11, count 0 2006.229.20:50:13.52#ibcon#*after write, iclass 11, count 0 2006.229.20:50:13.52#ibcon#*before return 0, iclass 11, count 0 2006.229.20:50:13.52#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:13.53#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:13.53#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:50:13.53#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:50:13.53$vck44/valo=5,734.99 2006.229.20:50:13.53#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.20:50:13.53#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.20:50:13.53#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:13.53#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:13.53#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:13.53#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:13.53#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:50:13.53#ibcon#first serial, iclass 13, count 0 2006.229.20:50:13.53#ibcon#enter sib2, iclass 13, count 0 2006.229.20:50:13.53#ibcon#flushed, iclass 13, count 0 2006.229.20:50:13.53#ibcon#about to write, iclass 13, count 0 2006.229.20:50:13.53#ibcon#wrote, iclass 13, count 0 2006.229.20:50:13.53#ibcon#about to read 3, iclass 13, count 0 2006.229.20:50:13.54#ibcon#read 3, iclass 13, count 0 2006.229.20:50:13.54#ibcon#about to read 4, iclass 13, count 0 2006.229.20:50:13.54#ibcon#read 4, iclass 13, count 0 2006.229.20:50:13.54#ibcon#about to read 5, iclass 13, count 0 2006.229.20:50:13.54#ibcon#read 5, iclass 13, count 0 2006.229.20:50:13.54#ibcon#about to read 6, iclass 13, count 0 2006.229.20:50:13.54#ibcon#read 6, iclass 13, count 0 2006.229.20:50:13.54#ibcon#end of sib2, iclass 13, count 0 2006.229.20:50:13.54#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:50:13.54#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:50:13.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.20:50:13.54#ibcon#*before write, iclass 13, count 0 2006.229.20:50:13.55#ibcon#enter sib2, iclass 13, count 0 2006.229.20:50:13.55#ibcon#flushed, iclass 13, count 0 2006.229.20:50:13.55#ibcon#about to write, iclass 13, count 0 2006.229.20:50:13.55#ibcon#wrote, iclass 13, count 0 2006.229.20:50:13.55#ibcon#about to read 3, iclass 13, count 0 2006.229.20:50:13.58#ibcon#read 3, iclass 13, count 0 2006.229.20:50:13.58#ibcon#about to read 4, iclass 13, count 0 2006.229.20:50:13.58#ibcon#read 4, iclass 13, count 0 2006.229.20:50:13.58#ibcon#about to read 5, iclass 13, count 0 2006.229.20:50:13.58#ibcon#read 5, iclass 13, count 0 2006.229.20:50:13.58#ibcon#about to read 6, iclass 13, count 0 2006.229.20:50:13.58#ibcon#read 6, iclass 13, count 0 2006.229.20:50:13.58#ibcon#end of sib2, iclass 13, count 0 2006.229.20:50:13.58#ibcon#*after write, iclass 13, count 0 2006.229.20:50:13.58#ibcon#*before return 0, iclass 13, count 0 2006.229.20:50:13.58#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:13.58#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:13.59#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:50:13.59#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:50:13.59$vck44/va=5,4 2006.229.20:50:13.59#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.20:50:13.59#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.20:50:13.59#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:13.59#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:13.64#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:13.64#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:13.64#ibcon#enter wrdev, iclass 15, count 2 2006.229.20:50:13.64#ibcon#first serial, iclass 15, count 2 2006.229.20:50:13.64#ibcon#enter sib2, iclass 15, count 2 2006.229.20:50:13.64#ibcon#flushed, iclass 15, count 2 2006.229.20:50:13.64#ibcon#about to write, iclass 15, count 2 2006.229.20:50:13.64#ibcon#wrote, iclass 15, count 2 2006.229.20:50:13.64#ibcon#about to read 3, iclass 15, count 2 2006.229.20:50:13.66#ibcon#read 3, iclass 15, count 2 2006.229.20:50:13.66#ibcon#about to read 4, iclass 15, count 2 2006.229.20:50:13.66#ibcon#read 4, iclass 15, count 2 2006.229.20:50:13.66#ibcon#about to read 5, iclass 15, count 2 2006.229.20:50:13.66#ibcon#read 5, iclass 15, count 2 2006.229.20:50:13.66#ibcon#about to read 6, iclass 15, count 2 2006.229.20:50:13.66#ibcon#read 6, iclass 15, count 2 2006.229.20:50:13.66#ibcon#end of sib2, iclass 15, count 2 2006.229.20:50:13.66#ibcon#*mode == 0, iclass 15, count 2 2006.229.20:50:13.66#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.20:50:13.66#ibcon#[25=AT05-04\r\n] 2006.229.20:50:13.66#ibcon#*before write, iclass 15, count 2 2006.229.20:50:13.66#ibcon#enter sib2, iclass 15, count 2 2006.229.20:50:13.67#ibcon#flushed, iclass 15, count 2 2006.229.20:50:13.67#ibcon#about to write, iclass 15, count 2 2006.229.20:50:13.67#ibcon#wrote, iclass 15, count 2 2006.229.20:50:13.67#ibcon#about to read 3, iclass 15, count 2 2006.229.20:50:13.69#ibcon#read 3, iclass 15, count 2 2006.229.20:50:13.69#ibcon#about to read 4, iclass 15, count 2 2006.229.20:50:13.69#ibcon#read 4, iclass 15, count 2 2006.229.20:50:13.69#ibcon#about to read 5, iclass 15, count 2 2006.229.20:50:13.69#ibcon#read 5, iclass 15, count 2 2006.229.20:50:13.69#ibcon#about to read 6, iclass 15, count 2 2006.229.20:50:13.69#ibcon#read 6, iclass 15, count 2 2006.229.20:50:13.69#ibcon#end of sib2, iclass 15, count 2 2006.229.20:50:13.69#ibcon#*after write, iclass 15, count 2 2006.229.20:50:13.69#ibcon#*before return 0, iclass 15, count 2 2006.229.20:50:13.69#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:13.69#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:13.70#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.20:50:13.70#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:13.70#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:13.80#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:13.80#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:13.80#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:50:13.80#ibcon#first serial, iclass 15, count 0 2006.229.20:50:13.80#ibcon#enter sib2, iclass 15, count 0 2006.229.20:50:13.80#ibcon#flushed, iclass 15, count 0 2006.229.20:50:13.80#ibcon#about to write, iclass 15, count 0 2006.229.20:50:13.80#ibcon#wrote, iclass 15, count 0 2006.229.20:50:13.80#ibcon#about to read 3, iclass 15, count 0 2006.229.20:50:13.82#ibcon#read 3, iclass 15, count 0 2006.229.20:50:13.82#ibcon#about to read 4, iclass 15, count 0 2006.229.20:50:13.82#ibcon#read 4, iclass 15, count 0 2006.229.20:50:13.82#ibcon#about to read 5, iclass 15, count 0 2006.229.20:50:13.82#ibcon#read 5, iclass 15, count 0 2006.229.20:50:13.82#ibcon#about to read 6, iclass 15, count 0 2006.229.20:50:13.82#ibcon#read 6, iclass 15, count 0 2006.229.20:50:13.82#ibcon#end of sib2, iclass 15, count 0 2006.229.20:50:13.82#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:50:13.82#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:50:13.82#ibcon#[25=USB\r\n] 2006.229.20:50:13.82#ibcon#*before write, iclass 15, count 0 2006.229.20:50:13.82#ibcon#enter sib2, iclass 15, count 0 2006.229.20:50:13.82#ibcon#flushed, iclass 15, count 0 2006.229.20:50:13.82#ibcon#about to write, iclass 15, count 0 2006.229.20:50:13.83#ibcon#wrote, iclass 15, count 0 2006.229.20:50:13.83#ibcon#about to read 3, iclass 15, count 0 2006.229.20:50:13.85#ibcon#read 3, iclass 15, count 0 2006.229.20:50:13.85#ibcon#about to read 4, iclass 15, count 0 2006.229.20:50:13.85#ibcon#read 4, iclass 15, count 0 2006.229.20:50:13.85#ibcon#about to read 5, iclass 15, count 0 2006.229.20:50:13.85#ibcon#read 5, iclass 15, count 0 2006.229.20:50:13.85#ibcon#about to read 6, iclass 15, count 0 2006.229.20:50:13.85#ibcon#read 6, iclass 15, count 0 2006.229.20:50:13.85#ibcon#end of sib2, iclass 15, count 0 2006.229.20:50:13.85#ibcon#*after write, iclass 15, count 0 2006.229.20:50:13.85#ibcon#*before return 0, iclass 15, count 0 2006.229.20:50:13.85#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:13.86#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:13.86#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:50:13.86#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:50:13.86$vck44/valo=6,814.99 2006.229.20:50:13.86#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:50:13.86#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:50:13.86#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:13.86#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:13.86#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:13.86#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:13.86#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:50:13.86#ibcon#first serial, iclass 17, count 0 2006.229.20:50:13.86#ibcon#enter sib2, iclass 17, count 0 2006.229.20:50:13.86#ibcon#flushed, iclass 17, count 0 2006.229.20:50:13.86#ibcon#about to write, iclass 17, count 0 2006.229.20:50:13.86#ibcon#wrote, iclass 17, count 0 2006.229.20:50:13.86#ibcon#about to read 3, iclass 17, count 0 2006.229.20:50:13.87#ibcon#read 3, iclass 17, count 0 2006.229.20:50:13.87#ibcon#about to read 4, iclass 17, count 0 2006.229.20:50:13.87#ibcon#read 4, iclass 17, count 0 2006.229.20:50:13.87#ibcon#about to read 5, iclass 17, count 0 2006.229.20:50:13.87#ibcon#read 5, iclass 17, count 0 2006.229.20:50:13.87#ibcon#about to read 6, iclass 17, count 0 2006.229.20:50:13.87#ibcon#read 6, iclass 17, count 0 2006.229.20:50:13.87#ibcon#end of sib2, iclass 17, count 0 2006.229.20:50:13.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:50:13.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:50:13.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.20:50:13.87#ibcon#*before write, iclass 17, count 0 2006.229.20:50:13.87#ibcon#enter sib2, iclass 17, count 0 2006.229.20:50:13.87#ibcon#flushed, iclass 17, count 0 2006.229.20:50:13.87#ibcon#about to write, iclass 17, count 0 2006.229.20:50:13.87#ibcon#wrote, iclass 17, count 0 2006.229.20:50:13.87#ibcon#about to read 3, iclass 17, count 0 2006.229.20:50:13.91#ibcon#read 3, iclass 17, count 0 2006.229.20:50:13.91#ibcon#about to read 4, iclass 17, count 0 2006.229.20:50:13.91#ibcon#read 4, iclass 17, count 0 2006.229.20:50:13.91#ibcon#about to read 5, iclass 17, count 0 2006.229.20:50:13.91#ibcon#read 5, iclass 17, count 0 2006.229.20:50:13.91#ibcon#about to read 6, iclass 17, count 0 2006.229.20:50:13.91#ibcon#read 6, iclass 17, count 0 2006.229.20:50:13.91#ibcon#end of sib2, iclass 17, count 0 2006.229.20:50:13.91#ibcon#*after write, iclass 17, count 0 2006.229.20:50:13.91#ibcon#*before return 0, iclass 17, count 0 2006.229.20:50:13.91#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:13.91#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:13.92#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:50:13.92#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:50:13.92$vck44/va=6,4 2006.229.20:50:13.92#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.20:50:13.92#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.20:50:13.92#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:13.92#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:13.97#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:13.97#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:13.97#ibcon#enter wrdev, iclass 19, count 2 2006.229.20:50:13.97#ibcon#first serial, iclass 19, count 2 2006.229.20:50:13.97#ibcon#enter sib2, iclass 19, count 2 2006.229.20:50:13.97#ibcon#flushed, iclass 19, count 2 2006.229.20:50:13.97#ibcon#about to write, iclass 19, count 2 2006.229.20:50:13.97#ibcon#wrote, iclass 19, count 2 2006.229.20:50:13.97#ibcon#about to read 3, iclass 19, count 2 2006.229.20:50:13.99#ibcon#read 3, iclass 19, count 2 2006.229.20:50:13.99#ibcon#about to read 4, iclass 19, count 2 2006.229.20:50:13.99#ibcon#read 4, iclass 19, count 2 2006.229.20:50:13.99#ibcon#about to read 5, iclass 19, count 2 2006.229.20:50:13.99#ibcon#read 5, iclass 19, count 2 2006.229.20:50:13.99#ibcon#about to read 6, iclass 19, count 2 2006.229.20:50:13.99#ibcon#read 6, iclass 19, count 2 2006.229.20:50:13.99#ibcon#end of sib2, iclass 19, count 2 2006.229.20:50:13.99#ibcon#*mode == 0, iclass 19, count 2 2006.229.20:50:13.99#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.20:50:13.99#ibcon#[25=AT06-04\r\n] 2006.229.20:50:13.99#ibcon#*before write, iclass 19, count 2 2006.229.20:50:13.99#ibcon#enter sib2, iclass 19, count 2 2006.229.20:50:13.99#ibcon#flushed, iclass 19, count 2 2006.229.20:50:13.99#ibcon#about to write, iclass 19, count 2 2006.229.20:50:14.00#ibcon#wrote, iclass 19, count 2 2006.229.20:50:14.00#ibcon#about to read 3, iclass 19, count 2 2006.229.20:50:14.02#ibcon#read 3, iclass 19, count 2 2006.229.20:50:14.02#ibcon#about to read 4, iclass 19, count 2 2006.229.20:50:14.02#ibcon#read 4, iclass 19, count 2 2006.229.20:50:14.02#ibcon#about to read 5, iclass 19, count 2 2006.229.20:50:14.02#ibcon#read 5, iclass 19, count 2 2006.229.20:50:14.02#ibcon#about to read 6, iclass 19, count 2 2006.229.20:50:14.02#ibcon#read 6, iclass 19, count 2 2006.229.20:50:14.02#ibcon#end of sib2, iclass 19, count 2 2006.229.20:50:14.02#ibcon#*after write, iclass 19, count 2 2006.229.20:50:14.02#ibcon#*before return 0, iclass 19, count 2 2006.229.20:50:14.02#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:14.02#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:14.02#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.20:50:14.02#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:14.03#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:14.13#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:14.13#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:14.13#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:50:14.13#ibcon#first serial, iclass 19, count 0 2006.229.20:50:14.13#ibcon#enter sib2, iclass 19, count 0 2006.229.20:50:14.13#ibcon#flushed, iclass 19, count 0 2006.229.20:50:14.13#ibcon#about to write, iclass 19, count 0 2006.229.20:50:14.13#ibcon#wrote, iclass 19, count 0 2006.229.20:50:14.13#ibcon#about to read 3, iclass 19, count 0 2006.229.20:50:14.15#ibcon#read 3, iclass 19, count 0 2006.229.20:50:14.15#ibcon#about to read 4, iclass 19, count 0 2006.229.20:50:14.15#ibcon#read 4, iclass 19, count 0 2006.229.20:50:14.15#ibcon#about to read 5, iclass 19, count 0 2006.229.20:50:14.15#ibcon#read 5, iclass 19, count 0 2006.229.20:50:14.15#ibcon#about to read 6, iclass 19, count 0 2006.229.20:50:14.15#ibcon#read 6, iclass 19, count 0 2006.229.20:50:14.15#ibcon#end of sib2, iclass 19, count 0 2006.229.20:50:14.15#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:50:14.15#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:50:14.15#ibcon#[25=USB\r\n] 2006.229.20:50:14.15#ibcon#*before write, iclass 19, count 0 2006.229.20:50:14.15#ibcon#enter sib2, iclass 19, count 0 2006.229.20:50:14.15#ibcon#flushed, iclass 19, count 0 2006.229.20:50:14.15#ibcon#about to write, iclass 19, count 0 2006.229.20:50:14.16#ibcon#wrote, iclass 19, count 0 2006.229.20:50:14.16#ibcon#about to read 3, iclass 19, count 0 2006.229.20:50:14.18#ibcon#read 3, iclass 19, count 0 2006.229.20:50:14.18#ibcon#about to read 4, iclass 19, count 0 2006.229.20:50:14.18#ibcon#read 4, iclass 19, count 0 2006.229.20:50:14.18#ibcon#about to read 5, iclass 19, count 0 2006.229.20:50:14.18#ibcon#read 5, iclass 19, count 0 2006.229.20:50:14.18#ibcon#about to read 6, iclass 19, count 0 2006.229.20:50:14.18#ibcon#read 6, iclass 19, count 0 2006.229.20:50:14.18#ibcon#end of sib2, iclass 19, count 0 2006.229.20:50:14.18#ibcon#*after write, iclass 19, count 0 2006.229.20:50:14.18#ibcon#*before return 0, iclass 19, count 0 2006.229.20:50:14.18#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:14.18#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:14.18#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:50:14.18#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:50:14.19$vck44/valo=7,864.99 2006.229.20:50:14.19#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:50:14.19#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:50:14.19#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:14.19#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:14.19#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:14.19#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:14.19#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:50:14.19#ibcon#first serial, iclass 21, count 0 2006.229.20:50:14.19#ibcon#enter sib2, iclass 21, count 0 2006.229.20:50:14.19#ibcon#flushed, iclass 21, count 0 2006.229.20:50:14.19#ibcon#about to write, iclass 21, count 0 2006.229.20:50:14.19#ibcon#wrote, iclass 21, count 0 2006.229.20:50:14.19#ibcon#about to read 3, iclass 21, count 0 2006.229.20:50:14.20#ibcon#read 3, iclass 21, count 0 2006.229.20:50:14.20#ibcon#about to read 4, iclass 21, count 0 2006.229.20:50:14.20#ibcon#read 4, iclass 21, count 0 2006.229.20:50:14.20#ibcon#about to read 5, iclass 21, count 0 2006.229.20:50:14.20#ibcon#read 5, iclass 21, count 0 2006.229.20:50:14.20#ibcon#about to read 6, iclass 21, count 0 2006.229.20:50:14.20#ibcon#read 6, iclass 21, count 0 2006.229.20:50:14.20#ibcon#end of sib2, iclass 21, count 0 2006.229.20:50:14.20#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:50:14.20#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:50:14.20#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.20:50:14.20#ibcon#*before write, iclass 21, count 0 2006.229.20:50:14.20#ibcon#enter sib2, iclass 21, count 0 2006.229.20:50:14.21#ibcon#flushed, iclass 21, count 0 2006.229.20:50:14.21#ibcon#about to write, iclass 21, count 0 2006.229.20:50:14.21#ibcon#wrote, iclass 21, count 0 2006.229.20:50:14.21#ibcon#about to read 3, iclass 21, count 0 2006.229.20:50:14.24#ibcon#read 3, iclass 21, count 0 2006.229.20:50:14.24#ibcon#about to read 4, iclass 21, count 0 2006.229.20:50:14.24#ibcon#read 4, iclass 21, count 0 2006.229.20:50:14.24#ibcon#about to read 5, iclass 21, count 0 2006.229.20:50:14.24#ibcon#read 5, iclass 21, count 0 2006.229.20:50:14.24#ibcon#about to read 6, iclass 21, count 0 2006.229.20:50:14.24#ibcon#read 6, iclass 21, count 0 2006.229.20:50:14.24#ibcon#end of sib2, iclass 21, count 0 2006.229.20:50:14.24#ibcon#*after write, iclass 21, count 0 2006.229.20:50:14.24#ibcon#*before return 0, iclass 21, count 0 2006.229.20:50:14.24#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:14.24#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:14.25#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:50:14.25#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:50:14.25$vck44/va=7,5 2006.229.20:50:14.25#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:50:14.25#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:50:14.25#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:14.25#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:14.29#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:14.29#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:14.29#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:50:14.29#ibcon#first serial, iclass 23, count 2 2006.229.20:50:14.29#ibcon#enter sib2, iclass 23, count 2 2006.229.20:50:14.29#ibcon#flushed, iclass 23, count 2 2006.229.20:50:14.29#ibcon#about to write, iclass 23, count 2 2006.229.20:50:14.29#ibcon#wrote, iclass 23, count 2 2006.229.20:50:14.29#ibcon#about to read 3, iclass 23, count 2 2006.229.20:50:14.31#ibcon#read 3, iclass 23, count 2 2006.229.20:50:14.31#ibcon#about to read 4, iclass 23, count 2 2006.229.20:50:14.31#ibcon#read 4, iclass 23, count 2 2006.229.20:50:14.31#ibcon#about to read 5, iclass 23, count 2 2006.229.20:50:14.31#ibcon#read 5, iclass 23, count 2 2006.229.20:50:14.31#ibcon#about to read 6, iclass 23, count 2 2006.229.20:50:14.31#ibcon#read 6, iclass 23, count 2 2006.229.20:50:14.31#ibcon#end of sib2, iclass 23, count 2 2006.229.20:50:14.31#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:50:14.31#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:50:14.31#ibcon#[25=AT07-05\r\n] 2006.229.20:50:14.31#ibcon#*before write, iclass 23, count 2 2006.229.20:50:14.31#ibcon#enter sib2, iclass 23, count 2 2006.229.20:50:14.32#ibcon#flushed, iclass 23, count 2 2006.229.20:50:14.32#ibcon#about to write, iclass 23, count 2 2006.229.20:50:14.32#ibcon#wrote, iclass 23, count 2 2006.229.20:50:14.32#ibcon#about to read 3, iclass 23, count 2 2006.229.20:50:14.34#ibcon#read 3, iclass 23, count 2 2006.229.20:50:14.34#ibcon#about to read 4, iclass 23, count 2 2006.229.20:50:14.34#ibcon#read 4, iclass 23, count 2 2006.229.20:50:14.34#ibcon#about to read 5, iclass 23, count 2 2006.229.20:50:14.34#ibcon#read 5, iclass 23, count 2 2006.229.20:50:14.34#ibcon#about to read 6, iclass 23, count 2 2006.229.20:50:14.34#ibcon#read 6, iclass 23, count 2 2006.229.20:50:14.34#ibcon#end of sib2, iclass 23, count 2 2006.229.20:50:14.34#ibcon#*after write, iclass 23, count 2 2006.229.20:50:14.34#ibcon#*before return 0, iclass 23, count 2 2006.229.20:50:14.34#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:14.34#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:14.34#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:50:14.35#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:14.35#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:14.45#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:14.45#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:14.45#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:50:14.45#ibcon#first serial, iclass 23, count 0 2006.229.20:50:14.45#ibcon#enter sib2, iclass 23, count 0 2006.229.20:50:14.45#ibcon#flushed, iclass 23, count 0 2006.229.20:50:14.45#ibcon#about to write, iclass 23, count 0 2006.229.20:50:14.45#ibcon#wrote, iclass 23, count 0 2006.229.20:50:14.45#ibcon#about to read 3, iclass 23, count 0 2006.229.20:50:14.47#ibcon#read 3, iclass 23, count 0 2006.229.20:50:14.47#ibcon#about to read 4, iclass 23, count 0 2006.229.20:50:14.47#ibcon#read 4, iclass 23, count 0 2006.229.20:50:14.47#ibcon#about to read 5, iclass 23, count 0 2006.229.20:50:14.47#ibcon#read 5, iclass 23, count 0 2006.229.20:50:14.47#ibcon#about to read 6, iclass 23, count 0 2006.229.20:50:14.47#ibcon#read 6, iclass 23, count 0 2006.229.20:50:14.47#ibcon#end of sib2, iclass 23, count 0 2006.229.20:50:14.47#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:50:14.47#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:50:14.47#ibcon#[25=USB\r\n] 2006.229.20:50:14.47#ibcon#*before write, iclass 23, count 0 2006.229.20:50:14.47#ibcon#enter sib2, iclass 23, count 0 2006.229.20:50:14.47#ibcon#flushed, iclass 23, count 0 2006.229.20:50:14.47#ibcon#about to write, iclass 23, count 0 2006.229.20:50:14.47#ibcon#wrote, iclass 23, count 0 2006.229.20:50:14.48#ibcon#about to read 3, iclass 23, count 0 2006.229.20:50:14.50#ibcon#read 3, iclass 23, count 0 2006.229.20:50:14.50#ibcon#about to read 4, iclass 23, count 0 2006.229.20:50:14.50#ibcon#read 4, iclass 23, count 0 2006.229.20:50:14.50#ibcon#about to read 5, iclass 23, count 0 2006.229.20:50:14.50#ibcon#read 5, iclass 23, count 0 2006.229.20:50:14.50#ibcon#about to read 6, iclass 23, count 0 2006.229.20:50:14.50#ibcon#read 6, iclass 23, count 0 2006.229.20:50:14.50#ibcon#end of sib2, iclass 23, count 0 2006.229.20:50:14.50#ibcon#*after write, iclass 23, count 0 2006.229.20:50:14.50#ibcon#*before return 0, iclass 23, count 0 2006.229.20:50:14.50#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:14.50#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:14.50#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:50:14.51#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:50:14.51$vck44/valo=8,884.99 2006.229.20:50:14.51#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.20:50:14.51#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.20:50:14.51#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:14.51#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:14.51#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:14.51#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:14.51#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:50:14.51#ibcon#first serial, iclass 25, count 0 2006.229.20:50:14.51#ibcon#enter sib2, iclass 25, count 0 2006.229.20:50:14.51#ibcon#flushed, iclass 25, count 0 2006.229.20:50:14.51#ibcon#about to write, iclass 25, count 0 2006.229.20:50:14.51#ibcon#wrote, iclass 25, count 0 2006.229.20:50:14.51#ibcon#about to read 3, iclass 25, count 0 2006.229.20:50:14.52#ibcon#read 3, iclass 25, count 0 2006.229.20:50:14.52#ibcon#about to read 4, iclass 25, count 0 2006.229.20:50:14.52#ibcon#read 4, iclass 25, count 0 2006.229.20:50:14.52#ibcon#about to read 5, iclass 25, count 0 2006.229.20:50:14.52#ibcon#read 5, iclass 25, count 0 2006.229.20:50:14.52#ibcon#about to read 6, iclass 25, count 0 2006.229.20:50:14.52#ibcon#read 6, iclass 25, count 0 2006.229.20:50:14.52#ibcon#end of sib2, iclass 25, count 0 2006.229.20:50:14.52#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:50:14.52#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:50:14.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.20:50:14.52#ibcon#*before write, iclass 25, count 0 2006.229.20:50:14.52#ibcon#enter sib2, iclass 25, count 0 2006.229.20:50:14.52#ibcon#flushed, iclass 25, count 0 2006.229.20:50:14.52#ibcon#about to write, iclass 25, count 0 2006.229.20:50:14.53#ibcon#wrote, iclass 25, count 0 2006.229.20:50:14.53#ibcon#about to read 3, iclass 25, count 0 2006.229.20:50:14.56#ibcon#read 3, iclass 25, count 0 2006.229.20:50:14.56#ibcon#about to read 4, iclass 25, count 0 2006.229.20:50:14.56#ibcon#read 4, iclass 25, count 0 2006.229.20:50:14.56#ibcon#about to read 5, iclass 25, count 0 2006.229.20:50:14.56#ibcon#read 5, iclass 25, count 0 2006.229.20:50:14.56#ibcon#about to read 6, iclass 25, count 0 2006.229.20:50:14.56#ibcon#read 6, iclass 25, count 0 2006.229.20:50:14.56#ibcon#end of sib2, iclass 25, count 0 2006.229.20:50:14.56#ibcon#*after write, iclass 25, count 0 2006.229.20:50:14.56#ibcon#*before return 0, iclass 25, count 0 2006.229.20:50:14.56#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:14.57#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:14.57#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:50:14.57#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:50:14.57$vck44/va=8,6 2006.229.20:50:14.57#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.20:50:14.57#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.20:50:14.57#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:14.57#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:14.61#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:14.61#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:14.61#ibcon#enter wrdev, iclass 27, count 2 2006.229.20:50:14.61#ibcon#first serial, iclass 27, count 2 2006.229.20:50:14.61#ibcon#enter sib2, iclass 27, count 2 2006.229.20:50:14.61#ibcon#flushed, iclass 27, count 2 2006.229.20:50:14.61#ibcon#about to write, iclass 27, count 2 2006.229.20:50:14.61#ibcon#wrote, iclass 27, count 2 2006.229.20:50:14.61#ibcon#about to read 3, iclass 27, count 2 2006.229.20:50:14.63#ibcon#read 3, iclass 27, count 2 2006.229.20:50:14.63#ibcon#about to read 4, iclass 27, count 2 2006.229.20:50:14.63#ibcon#read 4, iclass 27, count 2 2006.229.20:50:14.63#ibcon#about to read 5, iclass 27, count 2 2006.229.20:50:14.63#ibcon#read 5, iclass 27, count 2 2006.229.20:50:14.63#ibcon#about to read 6, iclass 27, count 2 2006.229.20:50:14.63#ibcon#read 6, iclass 27, count 2 2006.229.20:50:14.63#ibcon#end of sib2, iclass 27, count 2 2006.229.20:50:14.63#ibcon#*mode == 0, iclass 27, count 2 2006.229.20:50:14.63#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.20:50:14.63#ibcon#[25=AT08-06\r\n] 2006.229.20:50:14.63#ibcon#*before write, iclass 27, count 2 2006.229.20:50:14.63#ibcon#enter sib2, iclass 27, count 2 2006.229.20:50:14.64#ibcon#flushed, iclass 27, count 2 2006.229.20:50:14.64#ibcon#about to write, iclass 27, count 2 2006.229.20:50:14.64#ibcon#wrote, iclass 27, count 2 2006.229.20:50:14.64#ibcon#about to read 3, iclass 27, count 2 2006.229.20:50:14.66#ibcon#read 3, iclass 27, count 2 2006.229.20:50:14.66#ibcon#about to read 4, iclass 27, count 2 2006.229.20:50:14.66#ibcon#read 4, iclass 27, count 2 2006.229.20:50:14.66#ibcon#about to read 5, iclass 27, count 2 2006.229.20:50:14.66#ibcon#read 5, iclass 27, count 2 2006.229.20:50:14.66#ibcon#about to read 6, iclass 27, count 2 2006.229.20:50:14.66#ibcon#read 6, iclass 27, count 2 2006.229.20:50:14.66#ibcon#end of sib2, iclass 27, count 2 2006.229.20:50:14.66#ibcon#*after write, iclass 27, count 2 2006.229.20:50:14.66#ibcon#*before return 0, iclass 27, count 2 2006.229.20:50:14.66#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:14.66#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:14.66#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.20:50:14.67#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:14.67#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:14.77#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:14.77#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:14.77#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:50:14.77#ibcon#first serial, iclass 27, count 0 2006.229.20:50:14.77#ibcon#enter sib2, iclass 27, count 0 2006.229.20:50:14.77#ibcon#flushed, iclass 27, count 0 2006.229.20:50:14.77#ibcon#about to write, iclass 27, count 0 2006.229.20:50:14.77#ibcon#wrote, iclass 27, count 0 2006.229.20:50:14.77#ibcon#about to read 3, iclass 27, count 0 2006.229.20:50:14.79#ibcon#read 3, iclass 27, count 0 2006.229.20:50:14.79#ibcon#about to read 4, iclass 27, count 0 2006.229.20:50:14.79#ibcon#read 4, iclass 27, count 0 2006.229.20:50:14.79#ibcon#about to read 5, iclass 27, count 0 2006.229.20:50:14.79#ibcon#read 5, iclass 27, count 0 2006.229.20:50:14.79#ibcon#about to read 6, iclass 27, count 0 2006.229.20:50:14.79#ibcon#read 6, iclass 27, count 0 2006.229.20:50:14.79#ibcon#end of sib2, iclass 27, count 0 2006.229.20:50:14.79#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:50:14.79#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:50:14.79#ibcon#[25=USB\r\n] 2006.229.20:50:14.79#ibcon#*before write, iclass 27, count 0 2006.229.20:50:14.79#ibcon#enter sib2, iclass 27, count 0 2006.229.20:50:14.80#ibcon#flushed, iclass 27, count 0 2006.229.20:50:14.80#ibcon#about to write, iclass 27, count 0 2006.229.20:50:14.80#ibcon#wrote, iclass 27, count 0 2006.229.20:50:14.80#ibcon#about to read 3, iclass 27, count 0 2006.229.20:50:14.82#ibcon#read 3, iclass 27, count 0 2006.229.20:50:14.82#ibcon#about to read 4, iclass 27, count 0 2006.229.20:50:14.82#ibcon#read 4, iclass 27, count 0 2006.229.20:50:14.82#ibcon#about to read 5, iclass 27, count 0 2006.229.20:50:14.82#ibcon#read 5, iclass 27, count 0 2006.229.20:50:14.82#ibcon#about to read 6, iclass 27, count 0 2006.229.20:50:14.82#ibcon#read 6, iclass 27, count 0 2006.229.20:50:14.82#ibcon#end of sib2, iclass 27, count 0 2006.229.20:50:14.82#ibcon#*after write, iclass 27, count 0 2006.229.20:50:14.82#ibcon#*before return 0, iclass 27, count 0 2006.229.20:50:14.82#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:14.82#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:14.82#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:50:14.83#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:50:14.83$vck44/vblo=1,629.99 2006.229.20:50:14.83#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:50:14.83#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:50:14.83#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:14.83#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:14.83#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:14.83#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:14.83#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:50:14.83#ibcon#first serial, iclass 29, count 0 2006.229.20:50:14.83#ibcon#enter sib2, iclass 29, count 0 2006.229.20:50:14.83#ibcon#flushed, iclass 29, count 0 2006.229.20:50:14.83#ibcon#about to write, iclass 29, count 0 2006.229.20:50:14.83#ibcon#wrote, iclass 29, count 0 2006.229.20:50:14.83#ibcon#about to read 3, iclass 29, count 0 2006.229.20:50:14.84#ibcon#read 3, iclass 29, count 0 2006.229.20:50:14.84#ibcon#about to read 4, iclass 29, count 0 2006.229.20:50:14.84#ibcon#read 4, iclass 29, count 0 2006.229.20:50:14.84#ibcon#about to read 5, iclass 29, count 0 2006.229.20:50:14.84#ibcon#read 5, iclass 29, count 0 2006.229.20:50:14.84#ibcon#about to read 6, iclass 29, count 0 2006.229.20:50:14.84#ibcon#read 6, iclass 29, count 0 2006.229.20:50:14.84#ibcon#end of sib2, iclass 29, count 0 2006.229.20:50:14.84#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:50:14.84#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:50:14.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.20:50:14.84#ibcon#*before write, iclass 29, count 0 2006.229.20:50:14.84#ibcon#enter sib2, iclass 29, count 0 2006.229.20:50:14.85#ibcon#flushed, iclass 29, count 0 2006.229.20:50:14.85#ibcon#about to write, iclass 29, count 0 2006.229.20:50:14.85#ibcon#wrote, iclass 29, count 0 2006.229.20:50:14.85#ibcon#about to read 3, iclass 29, count 0 2006.229.20:50:14.88#ibcon#read 3, iclass 29, count 0 2006.229.20:50:14.88#ibcon#about to read 4, iclass 29, count 0 2006.229.20:50:14.88#ibcon#read 4, iclass 29, count 0 2006.229.20:50:14.88#ibcon#about to read 5, iclass 29, count 0 2006.229.20:50:14.88#ibcon#read 5, iclass 29, count 0 2006.229.20:50:14.88#ibcon#about to read 6, iclass 29, count 0 2006.229.20:50:14.88#ibcon#read 6, iclass 29, count 0 2006.229.20:50:14.88#ibcon#end of sib2, iclass 29, count 0 2006.229.20:50:14.88#ibcon#*after write, iclass 29, count 0 2006.229.20:50:14.88#ibcon#*before return 0, iclass 29, count 0 2006.229.20:50:14.88#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:14.88#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:14.88#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:50:14.89#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:50:14.89$vck44/vb=1,4 2006.229.20:50:14.89#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.20:50:14.89#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.20:50:14.89#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:14.89#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:50:14.89#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:50:14.89#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:50:14.89#ibcon#enter wrdev, iclass 31, count 2 2006.229.20:50:14.89#ibcon#first serial, iclass 31, count 2 2006.229.20:50:14.89#ibcon#enter sib2, iclass 31, count 2 2006.229.20:50:14.89#ibcon#flushed, iclass 31, count 2 2006.229.20:50:14.89#ibcon#about to write, iclass 31, count 2 2006.229.20:50:14.89#ibcon#wrote, iclass 31, count 2 2006.229.20:50:14.89#ibcon#about to read 3, iclass 31, count 2 2006.229.20:50:14.90#ibcon#read 3, iclass 31, count 2 2006.229.20:50:14.90#ibcon#about to read 4, iclass 31, count 2 2006.229.20:50:14.90#ibcon#read 4, iclass 31, count 2 2006.229.20:50:14.90#ibcon#about to read 5, iclass 31, count 2 2006.229.20:50:14.90#ibcon#read 5, iclass 31, count 2 2006.229.20:50:14.90#ibcon#about to read 6, iclass 31, count 2 2006.229.20:50:14.90#ibcon#read 6, iclass 31, count 2 2006.229.20:50:14.90#ibcon#end of sib2, iclass 31, count 2 2006.229.20:50:14.90#ibcon#*mode == 0, iclass 31, count 2 2006.229.20:50:14.90#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.20:50:14.90#ibcon#[27=AT01-04\r\n] 2006.229.20:50:14.90#ibcon#*before write, iclass 31, count 2 2006.229.20:50:14.90#ibcon#enter sib2, iclass 31, count 2 2006.229.20:50:14.90#ibcon#flushed, iclass 31, count 2 2006.229.20:50:14.90#ibcon#about to write, iclass 31, count 2 2006.229.20:50:14.91#ibcon#wrote, iclass 31, count 2 2006.229.20:50:14.91#ibcon#about to read 3, iclass 31, count 2 2006.229.20:50:14.93#ibcon#read 3, iclass 31, count 2 2006.229.20:50:14.93#ibcon#about to read 4, iclass 31, count 2 2006.229.20:50:14.93#ibcon#read 4, iclass 31, count 2 2006.229.20:50:14.93#ibcon#about to read 5, iclass 31, count 2 2006.229.20:50:14.93#ibcon#read 5, iclass 31, count 2 2006.229.20:50:14.93#ibcon#about to read 6, iclass 31, count 2 2006.229.20:50:14.93#ibcon#read 6, iclass 31, count 2 2006.229.20:50:14.93#ibcon#end of sib2, iclass 31, count 2 2006.229.20:50:14.93#ibcon#*after write, iclass 31, count 2 2006.229.20:50:14.93#ibcon#*before return 0, iclass 31, count 2 2006.229.20:50:14.93#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:50:14.93#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.20:50:14.93#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.20:50:14.94#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:14.94#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:50:15.04#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:50:15.04#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:50:15.04#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:50:15.04#ibcon#first serial, iclass 31, count 0 2006.229.20:50:15.04#ibcon#enter sib2, iclass 31, count 0 2006.229.20:50:15.04#ibcon#flushed, iclass 31, count 0 2006.229.20:50:15.04#ibcon#about to write, iclass 31, count 0 2006.229.20:50:15.04#ibcon#wrote, iclass 31, count 0 2006.229.20:50:15.04#ibcon#about to read 3, iclass 31, count 0 2006.229.20:50:15.06#ibcon#read 3, iclass 31, count 0 2006.229.20:50:15.06#ibcon#about to read 4, iclass 31, count 0 2006.229.20:50:15.06#ibcon#read 4, iclass 31, count 0 2006.229.20:50:15.06#ibcon#about to read 5, iclass 31, count 0 2006.229.20:50:15.06#ibcon#read 5, iclass 31, count 0 2006.229.20:50:15.06#ibcon#about to read 6, iclass 31, count 0 2006.229.20:50:15.06#ibcon#read 6, iclass 31, count 0 2006.229.20:50:15.06#ibcon#end of sib2, iclass 31, count 0 2006.229.20:50:15.06#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:50:15.06#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:50:15.06#ibcon#[27=USB\r\n] 2006.229.20:50:15.06#ibcon#*before write, iclass 31, count 0 2006.229.20:50:15.06#ibcon#enter sib2, iclass 31, count 0 2006.229.20:50:15.06#ibcon#flushed, iclass 31, count 0 2006.229.20:50:15.06#ibcon#about to write, iclass 31, count 0 2006.229.20:50:15.07#ibcon#wrote, iclass 31, count 0 2006.229.20:50:15.07#ibcon#about to read 3, iclass 31, count 0 2006.229.20:50:15.09#ibcon#read 3, iclass 31, count 0 2006.229.20:50:15.09#ibcon#about to read 4, iclass 31, count 0 2006.229.20:50:15.09#ibcon#read 4, iclass 31, count 0 2006.229.20:50:15.09#ibcon#about to read 5, iclass 31, count 0 2006.229.20:50:15.09#ibcon#read 5, iclass 31, count 0 2006.229.20:50:15.09#ibcon#about to read 6, iclass 31, count 0 2006.229.20:50:15.09#ibcon#read 6, iclass 31, count 0 2006.229.20:50:15.09#ibcon#end of sib2, iclass 31, count 0 2006.229.20:50:15.09#ibcon#*after write, iclass 31, count 0 2006.229.20:50:15.10#ibcon#*before return 0, iclass 31, count 0 2006.229.20:50:15.10#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:50:15.10#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.20:50:15.10#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:50:15.10#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:50:15.10$vck44/vblo=2,634.99 2006.229.20:50:15.10#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.20:50:15.10#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.20:50:15.10#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:15.10#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:50:15.10#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:50:15.10#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:50:15.10#ibcon#enter wrdev, iclass 34, count 0 2006.229.20:50:15.10#ibcon#first serial, iclass 34, count 0 2006.229.20:50:15.10#ibcon#enter sib2, iclass 34, count 0 2006.229.20:50:15.10#ibcon#flushed, iclass 34, count 0 2006.229.20:50:15.10#ibcon#about to write, iclass 34, count 0 2006.229.20:50:15.10#ibcon#wrote, iclass 34, count 0 2006.229.20:50:15.10#ibcon#about to read 3, iclass 34, count 0 2006.229.20:50:15.11#ibcon#read 3, iclass 34, count 0 2006.229.20:50:15.11#ibcon#about to read 4, iclass 34, count 0 2006.229.20:50:15.11#ibcon#read 4, iclass 34, count 0 2006.229.20:50:15.11#ibcon#about to read 5, iclass 34, count 0 2006.229.20:50:15.11#ibcon#read 5, iclass 34, count 0 2006.229.20:50:15.11#ibcon#about to read 6, iclass 34, count 0 2006.229.20:50:15.11#ibcon#read 6, iclass 34, count 0 2006.229.20:50:15.11#ibcon#end of sib2, iclass 34, count 0 2006.229.20:50:15.11#ibcon#*mode == 0, iclass 34, count 0 2006.229.20:50:15.11#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.20:50:15.11#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.20:50:15.11#ibcon#*before write, iclass 34, count 0 2006.229.20:50:15.11#ibcon#enter sib2, iclass 34, count 0 2006.229.20:50:15.11#ibcon#flushed, iclass 34, count 0 2006.229.20:50:15.11#ibcon#about to write, iclass 34, count 0 2006.229.20:50:15.12#ibcon#wrote, iclass 34, count 0 2006.229.20:50:15.12#ibcon#about to read 3, iclass 34, count 0 2006.229.20:50:15.12#abcon#<5=/07 1.2 3.7 26.081001001.9\r\n> 2006.229.20:50:15.14#abcon#{5=INTERFACE CLEAR} 2006.229.20:50:15.15#ibcon#read 3, iclass 34, count 0 2006.229.20:50:15.15#ibcon#about to read 4, iclass 34, count 0 2006.229.20:50:15.15#ibcon#read 4, iclass 34, count 0 2006.229.20:50:15.15#ibcon#about to read 5, iclass 34, count 0 2006.229.20:50:15.15#ibcon#read 5, iclass 34, count 0 2006.229.20:50:15.15#ibcon#about to read 6, iclass 34, count 0 2006.229.20:50:15.15#ibcon#read 6, iclass 34, count 0 2006.229.20:50:15.15#ibcon#end of sib2, iclass 34, count 0 2006.229.20:50:15.15#ibcon#*after write, iclass 34, count 0 2006.229.20:50:15.15#ibcon#*before return 0, iclass 34, count 0 2006.229.20:50:15.15#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:50:15.15#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.20:50:15.15#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.20:50:15.15#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.20:50:15.16$vck44/vb=2,4 2006.229.20:50:15.16#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.20:50:15.16#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.20:50:15.16#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:15.16#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:50:15.20#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:50:15.21#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:50:15.21#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:50:15.21#ibcon#enter wrdev, iclass 38, count 2 2006.229.20:50:15.21#ibcon#first serial, iclass 38, count 2 2006.229.20:50:15.21#ibcon#enter sib2, iclass 38, count 2 2006.229.20:50:15.21#ibcon#flushed, iclass 38, count 2 2006.229.20:50:15.21#ibcon#about to write, iclass 38, count 2 2006.229.20:50:15.21#ibcon#wrote, iclass 38, count 2 2006.229.20:50:15.21#ibcon#about to read 3, iclass 38, count 2 2006.229.20:50:15.23#ibcon#read 3, iclass 38, count 2 2006.229.20:50:15.23#ibcon#about to read 4, iclass 38, count 2 2006.229.20:50:15.23#ibcon#read 4, iclass 38, count 2 2006.229.20:50:15.23#ibcon#about to read 5, iclass 38, count 2 2006.229.20:50:15.23#ibcon#read 5, iclass 38, count 2 2006.229.20:50:15.23#ibcon#about to read 6, iclass 38, count 2 2006.229.20:50:15.23#ibcon#read 6, iclass 38, count 2 2006.229.20:50:15.23#ibcon#end of sib2, iclass 38, count 2 2006.229.20:50:15.23#ibcon#*mode == 0, iclass 38, count 2 2006.229.20:50:15.23#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.20:50:15.23#ibcon#[27=AT02-04\r\n] 2006.229.20:50:15.23#ibcon#*before write, iclass 38, count 2 2006.229.20:50:15.23#ibcon#enter sib2, iclass 38, count 2 2006.229.20:50:15.23#ibcon#flushed, iclass 38, count 2 2006.229.20:50:15.23#ibcon#about to write, iclass 38, count 2 2006.229.20:50:15.23#ibcon#wrote, iclass 38, count 2 2006.229.20:50:15.24#ibcon#about to read 3, iclass 38, count 2 2006.229.20:50:15.26#ibcon#read 3, iclass 38, count 2 2006.229.20:50:15.26#ibcon#about to read 4, iclass 38, count 2 2006.229.20:50:15.26#ibcon#read 4, iclass 38, count 2 2006.229.20:50:15.26#ibcon#about to read 5, iclass 38, count 2 2006.229.20:50:15.26#ibcon#read 5, iclass 38, count 2 2006.229.20:50:15.26#ibcon#about to read 6, iclass 38, count 2 2006.229.20:50:15.26#ibcon#read 6, iclass 38, count 2 2006.229.20:50:15.26#ibcon#end of sib2, iclass 38, count 2 2006.229.20:50:15.26#ibcon#*after write, iclass 38, count 2 2006.229.20:50:15.26#ibcon#*before return 0, iclass 38, count 2 2006.229.20:50:15.26#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:50:15.26#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.20:50:15.26#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.20:50:15.26#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:15.26#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:50:15.38#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:50:15.38#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:50:15.38#ibcon#enter wrdev, iclass 38, count 0 2006.229.20:50:15.38#ibcon#first serial, iclass 38, count 0 2006.229.20:50:15.38#ibcon#enter sib2, iclass 38, count 0 2006.229.20:50:15.38#ibcon#flushed, iclass 38, count 0 2006.229.20:50:15.38#ibcon#about to write, iclass 38, count 0 2006.229.20:50:15.38#ibcon#wrote, iclass 38, count 0 2006.229.20:50:15.38#ibcon#about to read 3, iclass 38, count 0 2006.229.20:50:15.40#ibcon#read 3, iclass 38, count 0 2006.229.20:50:15.40#ibcon#about to read 4, iclass 38, count 0 2006.229.20:50:15.40#ibcon#read 4, iclass 38, count 0 2006.229.20:50:15.40#ibcon#about to read 5, iclass 38, count 0 2006.229.20:50:15.40#ibcon#read 5, iclass 38, count 0 2006.229.20:50:15.40#ibcon#about to read 6, iclass 38, count 0 2006.229.20:50:15.40#ibcon#read 6, iclass 38, count 0 2006.229.20:50:15.40#ibcon#end of sib2, iclass 38, count 0 2006.229.20:50:15.40#ibcon#*mode == 0, iclass 38, count 0 2006.229.20:50:15.40#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.20:50:15.40#ibcon#[27=USB\r\n] 2006.229.20:50:15.40#ibcon#*before write, iclass 38, count 0 2006.229.20:50:15.40#ibcon#enter sib2, iclass 38, count 0 2006.229.20:50:15.40#ibcon#flushed, iclass 38, count 0 2006.229.20:50:15.40#ibcon#about to write, iclass 38, count 0 2006.229.20:50:15.40#ibcon#wrote, iclass 38, count 0 2006.229.20:50:15.41#ibcon#about to read 3, iclass 38, count 0 2006.229.20:50:15.43#ibcon#read 3, iclass 38, count 0 2006.229.20:50:15.43#ibcon#about to read 4, iclass 38, count 0 2006.229.20:50:15.43#ibcon#read 4, iclass 38, count 0 2006.229.20:50:15.43#ibcon#about to read 5, iclass 38, count 0 2006.229.20:50:15.43#ibcon#read 5, iclass 38, count 0 2006.229.20:50:15.43#ibcon#about to read 6, iclass 38, count 0 2006.229.20:50:15.43#ibcon#read 6, iclass 38, count 0 2006.229.20:50:15.43#ibcon#end of sib2, iclass 38, count 0 2006.229.20:50:15.43#ibcon#*after write, iclass 38, count 0 2006.229.20:50:15.43#ibcon#*before return 0, iclass 38, count 0 2006.229.20:50:15.43#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:50:15.43#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.20:50:15.43#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.20:50:15.43#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.20:50:15.44$vck44/vblo=3,649.99 2006.229.20:50:15.44#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.20:50:15.44#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.20:50:15.44#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:15.44#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:15.44#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:15.44#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:15.44#ibcon#enter wrdev, iclass 3, count 0 2006.229.20:50:15.44#ibcon#first serial, iclass 3, count 0 2006.229.20:50:15.44#ibcon#enter sib2, iclass 3, count 0 2006.229.20:50:15.44#ibcon#flushed, iclass 3, count 0 2006.229.20:50:15.44#ibcon#about to write, iclass 3, count 0 2006.229.20:50:15.44#ibcon#wrote, iclass 3, count 0 2006.229.20:50:15.44#ibcon#about to read 3, iclass 3, count 0 2006.229.20:50:15.45#ibcon#read 3, iclass 3, count 0 2006.229.20:50:15.45#ibcon#about to read 4, iclass 3, count 0 2006.229.20:50:15.45#ibcon#read 4, iclass 3, count 0 2006.229.20:50:15.45#ibcon#about to read 5, iclass 3, count 0 2006.229.20:50:15.45#ibcon#read 5, iclass 3, count 0 2006.229.20:50:15.45#ibcon#about to read 6, iclass 3, count 0 2006.229.20:50:15.45#ibcon#read 6, iclass 3, count 0 2006.229.20:50:15.45#ibcon#end of sib2, iclass 3, count 0 2006.229.20:50:15.45#ibcon#*mode == 0, iclass 3, count 0 2006.229.20:50:15.45#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.20:50:15.45#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.20:50:15.45#ibcon#*before write, iclass 3, count 0 2006.229.20:50:15.45#ibcon#enter sib2, iclass 3, count 0 2006.229.20:50:15.46#ibcon#flushed, iclass 3, count 0 2006.229.20:50:15.46#ibcon#about to write, iclass 3, count 0 2006.229.20:50:15.46#ibcon#wrote, iclass 3, count 0 2006.229.20:50:15.46#ibcon#about to read 3, iclass 3, count 0 2006.229.20:50:15.49#ibcon#read 3, iclass 3, count 0 2006.229.20:50:15.49#ibcon#about to read 4, iclass 3, count 0 2006.229.20:50:15.49#ibcon#read 4, iclass 3, count 0 2006.229.20:50:15.49#ibcon#about to read 5, iclass 3, count 0 2006.229.20:50:15.49#ibcon#read 5, iclass 3, count 0 2006.229.20:50:15.49#ibcon#about to read 6, iclass 3, count 0 2006.229.20:50:15.49#ibcon#read 6, iclass 3, count 0 2006.229.20:50:15.49#ibcon#end of sib2, iclass 3, count 0 2006.229.20:50:15.49#ibcon#*after write, iclass 3, count 0 2006.229.20:50:15.49#ibcon#*before return 0, iclass 3, count 0 2006.229.20:50:15.50#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:15.50#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.20:50:15.50#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.20:50:15.50#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.20:50:15.50$vck44/vb=3,4 2006.229.20:50:15.50#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.20:50:15.50#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.20:50:15.50#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:15.50#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:15.54#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:15.54#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:15.54#ibcon#enter wrdev, iclass 5, count 2 2006.229.20:50:15.54#ibcon#first serial, iclass 5, count 2 2006.229.20:50:15.54#ibcon#enter sib2, iclass 5, count 2 2006.229.20:50:15.54#ibcon#flushed, iclass 5, count 2 2006.229.20:50:15.54#ibcon#about to write, iclass 5, count 2 2006.229.20:50:15.54#ibcon#wrote, iclass 5, count 2 2006.229.20:50:15.54#ibcon#about to read 3, iclass 5, count 2 2006.229.20:50:15.56#ibcon#read 3, iclass 5, count 2 2006.229.20:50:15.56#ibcon#about to read 4, iclass 5, count 2 2006.229.20:50:15.56#ibcon#read 4, iclass 5, count 2 2006.229.20:50:15.56#ibcon#about to read 5, iclass 5, count 2 2006.229.20:50:15.56#ibcon#read 5, iclass 5, count 2 2006.229.20:50:15.56#ibcon#about to read 6, iclass 5, count 2 2006.229.20:50:15.56#ibcon#read 6, iclass 5, count 2 2006.229.20:50:15.56#ibcon#end of sib2, iclass 5, count 2 2006.229.20:50:15.56#ibcon#*mode == 0, iclass 5, count 2 2006.229.20:50:15.56#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.20:50:15.56#ibcon#[27=AT03-04\r\n] 2006.229.20:50:15.56#ibcon#*before write, iclass 5, count 2 2006.229.20:50:15.56#ibcon#enter sib2, iclass 5, count 2 2006.229.20:50:15.56#ibcon#flushed, iclass 5, count 2 2006.229.20:50:15.57#ibcon#about to write, iclass 5, count 2 2006.229.20:50:15.57#ibcon#wrote, iclass 5, count 2 2006.229.20:50:15.57#ibcon#about to read 3, iclass 5, count 2 2006.229.20:50:15.59#ibcon#read 3, iclass 5, count 2 2006.229.20:50:15.59#ibcon#about to read 4, iclass 5, count 2 2006.229.20:50:15.59#ibcon#read 4, iclass 5, count 2 2006.229.20:50:15.59#ibcon#about to read 5, iclass 5, count 2 2006.229.20:50:15.59#ibcon#read 5, iclass 5, count 2 2006.229.20:50:15.59#ibcon#about to read 6, iclass 5, count 2 2006.229.20:50:15.59#ibcon#read 6, iclass 5, count 2 2006.229.20:50:15.59#ibcon#end of sib2, iclass 5, count 2 2006.229.20:50:15.59#ibcon#*after write, iclass 5, count 2 2006.229.20:50:15.59#ibcon#*before return 0, iclass 5, count 2 2006.229.20:50:15.59#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:15.59#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.20:50:15.59#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.20:50:15.60#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:15.60#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:15.70#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:15.70#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:15.70#ibcon#enter wrdev, iclass 5, count 0 2006.229.20:50:15.70#ibcon#first serial, iclass 5, count 0 2006.229.20:50:15.70#ibcon#enter sib2, iclass 5, count 0 2006.229.20:50:15.70#ibcon#flushed, iclass 5, count 0 2006.229.20:50:15.70#ibcon#about to write, iclass 5, count 0 2006.229.20:50:15.70#ibcon#wrote, iclass 5, count 0 2006.229.20:50:15.70#ibcon#about to read 3, iclass 5, count 0 2006.229.20:50:15.72#ibcon#read 3, iclass 5, count 0 2006.229.20:50:15.72#ibcon#about to read 4, iclass 5, count 0 2006.229.20:50:15.72#ibcon#read 4, iclass 5, count 0 2006.229.20:50:15.72#ibcon#about to read 5, iclass 5, count 0 2006.229.20:50:15.72#ibcon#read 5, iclass 5, count 0 2006.229.20:50:15.72#ibcon#about to read 6, iclass 5, count 0 2006.229.20:50:15.72#ibcon#read 6, iclass 5, count 0 2006.229.20:50:15.72#ibcon#end of sib2, iclass 5, count 0 2006.229.20:50:15.72#ibcon#*mode == 0, iclass 5, count 0 2006.229.20:50:15.72#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.20:50:15.72#ibcon#[27=USB\r\n] 2006.229.20:50:15.72#ibcon#*before write, iclass 5, count 0 2006.229.20:50:15.72#ibcon#enter sib2, iclass 5, count 0 2006.229.20:50:15.73#ibcon#flushed, iclass 5, count 0 2006.229.20:50:15.73#ibcon#about to write, iclass 5, count 0 2006.229.20:50:15.73#ibcon#wrote, iclass 5, count 0 2006.229.20:50:15.73#ibcon#about to read 3, iclass 5, count 0 2006.229.20:50:15.75#ibcon#read 3, iclass 5, count 0 2006.229.20:50:15.75#ibcon#about to read 4, iclass 5, count 0 2006.229.20:50:15.75#ibcon#read 4, iclass 5, count 0 2006.229.20:50:15.75#ibcon#about to read 5, iclass 5, count 0 2006.229.20:50:15.75#ibcon#read 5, iclass 5, count 0 2006.229.20:50:15.75#ibcon#about to read 6, iclass 5, count 0 2006.229.20:50:15.75#ibcon#read 6, iclass 5, count 0 2006.229.20:50:15.75#ibcon#end of sib2, iclass 5, count 0 2006.229.20:50:15.75#ibcon#*after write, iclass 5, count 0 2006.229.20:50:15.75#ibcon#*before return 0, iclass 5, count 0 2006.229.20:50:15.76#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:15.76#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.20:50:15.76#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.20:50:15.76#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.20:50:15.76$vck44/vblo=4,679.99 2006.229.20:50:15.76#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.20:50:15.76#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.20:50:15.76#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:15.76#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:15.76#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:15.76#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:15.76#ibcon#enter wrdev, iclass 7, count 0 2006.229.20:50:15.76#ibcon#first serial, iclass 7, count 0 2006.229.20:50:15.76#ibcon#enter sib2, iclass 7, count 0 2006.229.20:50:15.76#ibcon#flushed, iclass 7, count 0 2006.229.20:50:15.76#ibcon#about to write, iclass 7, count 0 2006.229.20:50:15.76#ibcon#wrote, iclass 7, count 0 2006.229.20:50:15.76#ibcon#about to read 3, iclass 7, count 0 2006.229.20:50:15.77#ibcon#read 3, iclass 7, count 0 2006.229.20:50:15.77#ibcon#about to read 4, iclass 7, count 0 2006.229.20:50:15.77#ibcon#read 4, iclass 7, count 0 2006.229.20:50:15.77#ibcon#about to read 5, iclass 7, count 0 2006.229.20:50:15.77#ibcon#read 5, iclass 7, count 0 2006.229.20:50:15.77#ibcon#about to read 6, iclass 7, count 0 2006.229.20:50:15.77#ibcon#read 6, iclass 7, count 0 2006.229.20:50:15.77#ibcon#end of sib2, iclass 7, count 0 2006.229.20:50:15.77#ibcon#*mode == 0, iclass 7, count 0 2006.229.20:50:15.77#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.20:50:15.77#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.20:50:15.77#ibcon#*before write, iclass 7, count 0 2006.229.20:50:15.77#ibcon#enter sib2, iclass 7, count 0 2006.229.20:50:15.78#ibcon#flushed, iclass 7, count 0 2006.229.20:50:15.78#ibcon#about to write, iclass 7, count 0 2006.229.20:50:15.78#ibcon#wrote, iclass 7, count 0 2006.229.20:50:15.78#ibcon#about to read 3, iclass 7, count 0 2006.229.20:50:15.81#ibcon#read 3, iclass 7, count 0 2006.229.20:50:15.81#ibcon#about to read 4, iclass 7, count 0 2006.229.20:50:15.81#ibcon#read 4, iclass 7, count 0 2006.229.20:50:15.81#ibcon#about to read 5, iclass 7, count 0 2006.229.20:50:15.81#ibcon#read 5, iclass 7, count 0 2006.229.20:50:15.81#ibcon#about to read 6, iclass 7, count 0 2006.229.20:50:15.81#ibcon#read 6, iclass 7, count 0 2006.229.20:50:15.81#ibcon#end of sib2, iclass 7, count 0 2006.229.20:50:15.81#ibcon#*after write, iclass 7, count 0 2006.229.20:50:15.81#ibcon#*before return 0, iclass 7, count 0 2006.229.20:50:15.81#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:15.82#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.20:50:15.82#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.20:50:15.82#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.20:50:15.82$vck44/vb=4,4 2006.229.20:50:15.82#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.20:50:15.82#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.20:50:15.82#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:15.82#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:15.87#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:15.87#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:15.87#ibcon#enter wrdev, iclass 11, count 2 2006.229.20:50:15.87#ibcon#first serial, iclass 11, count 2 2006.229.20:50:15.87#ibcon#enter sib2, iclass 11, count 2 2006.229.20:50:15.87#ibcon#flushed, iclass 11, count 2 2006.229.20:50:15.87#ibcon#about to write, iclass 11, count 2 2006.229.20:50:15.87#ibcon#wrote, iclass 11, count 2 2006.229.20:50:15.87#ibcon#about to read 3, iclass 11, count 2 2006.229.20:50:15.89#ibcon#read 3, iclass 11, count 2 2006.229.20:50:15.89#ibcon#about to read 4, iclass 11, count 2 2006.229.20:50:15.89#ibcon#read 4, iclass 11, count 2 2006.229.20:50:15.89#ibcon#about to read 5, iclass 11, count 2 2006.229.20:50:15.89#ibcon#read 5, iclass 11, count 2 2006.229.20:50:15.89#ibcon#about to read 6, iclass 11, count 2 2006.229.20:50:15.89#ibcon#read 6, iclass 11, count 2 2006.229.20:50:15.89#ibcon#end of sib2, iclass 11, count 2 2006.229.20:50:15.89#ibcon#*mode == 0, iclass 11, count 2 2006.229.20:50:15.89#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.20:50:15.89#ibcon#[27=AT04-04\r\n] 2006.229.20:50:15.89#ibcon#*before write, iclass 11, count 2 2006.229.20:50:15.89#ibcon#enter sib2, iclass 11, count 2 2006.229.20:50:15.89#ibcon#flushed, iclass 11, count 2 2006.229.20:50:15.90#ibcon#about to write, iclass 11, count 2 2006.229.20:50:15.90#ibcon#wrote, iclass 11, count 2 2006.229.20:50:15.90#ibcon#about to read 3, iclass 11, count 2 2006.229.20:50:15.92#ibcon#read 3, iclass 11, count 2 2006.229.20:50:15.92#ibcon#about to read 4, iclass 11, count 2 2006.229.20:50:15.92#ibcon#read 4, iclass 11, count 2 2006.229.20:50:15.92#ibcon#about to read 5, iclass 11, count 2 2006.229.20:50:15.92#ibcon#read 5, iclass 11, count 2 2006.229.20:50:15.92#ibcon#about to read 6, iclass 11, count 2 2006.229.20:50:15.92#ibcon#read 6, iclass 11, count 2 2006.229.20:50:15.92#ibcon#end of sib2, iclass 11, count 2 2006.229.20:50:15.92#ibcon#*after write, iclass 11, count 2 2006.229.20:50:15.92#ibcon#*before return 0, iclass 11, count 2 2006.229.20:50:15.92#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:15.92#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.20:50:15.92#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.20:50:15.93#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:15.93#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:16.03#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:16.03#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:16.03#ibcon#enter wrdev, iclass 11, count 0 2006.229.20:50:16.03#ibcon#first serial, iclass 11, count 0 2006.229.20:50:16.03#ibcon#enter sib2, iclass 11, count 0 2006.229.20:50:16.03#ibcon#flushed, iclass 11, count 0 2006.229.20:50:16.03#ibcon#about to write, iclass 11, count 0 2006.229.20:50:16.03#ibcon#wrote, iclass 11, count 0 2006.229.20:50:16.03#ibcon#about to read 3, iclass 11, count 0 2006.229.20:50:16.05#ibcon#read 3, iclass 11, count 0 2006.229.20:50:16.05#ibcon#about to read 4, iclass 11, count 0 2006.229.20:50:16.05#ibcon#read 4, iclass 11, count 0 2006.229.20:50:16.05#ibcon#about to read 5, iclass 11, count 0 2006.229.20:50:16.05#ibcon#read 5, iclass 11, count 0 2006.229.20:50:16.05#ibcon#about to read 6, iclass 11, count 0 2006.229.20:50:16.05#ibcon#read 6, iclass 11, count 0 2006.229.20:50:16.05#ibcon#end of sib2, iclass 11, count 0 2006.229.20:50:16.05#ibcon#*mode == 0, iclass 11, count 0 2006.229.20:50:16.05#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.20:50:16.05#ibcon#[27=USB\r\n] 2006.229.20:50:16.05#ibcon#*before write, iclass 11, count 0 2006.229.20:50:16.05#ibcon#enter sib2, iclass 11, count 0 2006.229.20:50:16.05#ibcon#flushed, iclass 11, count 0 2006.229.20:50:16.05#ibcon#about to write, iclass 11, count 0 2006.229.20:50:16.06#ibcon#wrote, iclass 11, count 0 2006.229.20:50:16.06#ibcon#about to read 3, iclass 11, count 0 2006.229.20:50:16.08#ibcon#read 3, iclass 11, count 0 2006.229.20:50:16.08#ibcon#about to read 4, iclass 11, count 0 2006.229.20:50:16.08#ibcon#read 4, iclass 11, count 0 2006.229.20:50:16.08#ibcon#about to read 5, iclass 11, count 0 2006.229.20:50:16.08#ibcon#read 5, iclass 11, count 0 2006.229.20:50:16.08#ibcon#about to read 6, iclass 11, count 0 2006.229.20:50:16.08#ibcon#read 6, iclass 11, count 0 2006.229.20:50:16.08#ibcon#end of sib2, iclass 11, count 0 2006.229.20:50:16.08#ibcon#*after write, iclass 11, count 0 2006.229.20:50:16.08#ibcon#*before return 0, iclass 11, count 0 2006.229.20:50:16.08#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:16.08#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.20:50:16.08#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.20:50:16.08#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.20:50:16.09$vck44/vblo=5,709.99 2006.229.20:50:16.09#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.20:50:16.09#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.20:50:16.09#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:16.09#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:16.09#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:16.09#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:16.09#ibcon#enter wrdev, iclass 13, count 0 2006.229.20:50:16.09#ibcon#first serial, iclass 13, count 0 2006.229.20:50:16.09#ibcon#enter sib2, iclass 13, count 0 2006.229.20:50:16.09#ibcon#flushed, iclass 13, count 0 2006.229.20:50:16.09#ibcon#about to write, iclass 13, count 0 2006.229.20:50:16.09#ibcon#wrote, iclass 13, count 0 2006.229.20:50:16.09#ibcon#about to read 3, iclass 13, count 0 2006.229.20:50:16.10#ibcon#read 3, iclass 13, count 0 2006.229.20:50:16.10#ibcon#about to read 4, iclass 13, count 0 2006.229.20:50:16.10#ibcon#read 4, iclass 13, count 0 2006.229.20:50:16.10#ibcon#about to read 5, iclass 13, count 0 2006.229.20:50:16.10#ibcon#read 5, iclass 13, count 0 2006.229.20:50:16.10#ibcon#about to read 6, iclass 13, count 0 2006.229.20:50:16.10#ibcon#read 6, iclass 13, count 0 2006.229.20:50:16.10#ibcon#end of sib2, iclass 13, count 0 2006.229.20:50:16.10#ibcon#*mode == 0, iclass 13, count 0 2006.229.20:50:16.10#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.20:50:16.10#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.20:50:16.10#ibcon#*before write, iclass 13, count 0 2006.229.20:50:16.10#ibcon#enter sib2, iclass 13, count 0 2006.229.20:50:16.10#ibcon#flushed, iclass 13, count 0 2006.229.20:50:16.11#ibcon#about to write, iclass 13, count 0 2006.229.20:50:16.11#ibcon#wrote, iclass 13, count 0 2006.229.20:50:16.11#ibcon#about to read 3, iclass 13, count 0 2006.229.20:50:16.14#ibcon#read 3, iclass 13, count 0 2006.229.20:50:16.14#ibcon#about to read 4, iclass 13, count 0 2006.229.20:50:16.14#ibcon#read 4, iclass 13, count 0 2006.229.20:50:16.14#ibcon#about to read 5, iclass 13, count 0 2006.229.20:50:16.14#ibcon#read 5, iclass 13, count 0 2006.229.20:50:16.14#ibcon#about to read 6, iclass 13, count 0 2006.229.20:50:16.14#ibcon#read 6, iclass 13, count 0 2006.229.20:50:16.14#ibcon#end of sib2, iclass 13, count 0 2006.229.20:50:16.14#ibcon#*after write, iclass 13, count 0 2006.229.20:50:16.14#ibcon#*before return 0, iclass 13, count 0 2006.229.20:50:16.14#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:16.14#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.20:50:16.14#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.20:50:16.14#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.20:50:16.15$vck44/vb=5,4 2006.229.20:50:16.15#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.20:50:16.15#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.20:50:16.15#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:16.15#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:16.19#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:16.19#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:16.19#ibcon#enter wrdev, iclass 15, count 2 2006.229.20:50:16.19#ibcon#first serial, iclass 15, count 2 2006.229.20:50:16.19#ibcon#enter sib2, iclass 15, count 2 2006.229.20:50:16.19#ibcon#flushed, iclass 15, count 2 2006.229.20:50:16.19#ibcon#about to write, iclass 15, count 2 2006.229.20:50:16.19#ibcon#wrote, iclass 15, count 2 2006.229.20:50:16.19#ibcon#about to read 3, iclass 15, count 2 2006.229.20:50:16.21#ibcon#read 3, iclass 15, count 2 2006.229.20:50:16.21#ibcon#about to read 4, iclass 15, count 2 2006.229.20:50:16.21#ibcon#read 4, iclass 15, count 2 2006.229.20:50:16.21#ibcon#about to read 5, iclass 15, count 2 2006.229.20:50:16.21#ibcon#read 5, iclass 15, count 2 2006.229.20:50:16.21#ibcon#about to read 6, iclass 15, count 2 2006.229.20:50:16.21#ibcon#read 6, iclass 15, count 2 2006.229.20:50:16.21#ibcon#end of sib2, iclass 15, count 2 2006.229.20:50:16.21#ibcon#*mode == 0, iclass 15, count 2 2006.229.20:50:16.21#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.20:50:16.21#ibcon#[27=AT05-04\r\n] 2006.229.20:50:16.21#ibcon#*before write, iclass 15, count 2 2006.229.20:50:16.21#ibcon#enter sib2, iclass 15, count 2 2006.229.20:50:16.21#ibcon#flushed, iclass 15, count 2 2006.229.20:50:16.21#ibcon#about to write, iclass 15, count 2 2006.229.20:50:16.22#ibcon#wrote, iclass 15, count 2 2006.229.20:50:16.22#ibcon#about to read 3, iclass 15, count 2 2006.229.20:50:16.24#ibcon#read 3, iclass 15, count 2 2006.229.20:50:16.24#ibcon#about to read 4, iclass 15, count 2 2006.229.20:50:16.24#ibcon#read 4, iclass 15, count 2 2006.229.20:50:16.24#ibcon#about to read 5, iclass 15, count 2 2006.229.20:50:16.24#ibcon#read 5, iclass 15, count 2 2006.229.20:50:16.24#ibcon#about to read 6, iclass 15, count 2 2006.229.20:50:16.24#ibcon#read 6, iclass 15, count 2 2006.229.20:50:16.24#ibcon#end of sib2, iclass 15, count 2 2006.229.20:50:16.24#ibcon#*after write, iclass 15, count 2 2006.229.20:50:16.24#ibcon#*before return 0, iclass 15, count 2 2006.229.20:50:16.24#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:16.24#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.20:50:16.24#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.20:50:16.24#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:16.25#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:16.35#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:16.35#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:16.35#ibcon#enter wrdev, iclass 15, count 0 2006.229.20:50:16.35#ibcon#first serial, iclass 15, count 0 2006.229.20:50:16.35#ibcon#enter sib2, iclass 15, count 0 2006.229.20:50:16.35#ibcon#flushed, iclass 15, count 0 2006.229.20:50:16.35#ibcon#about to write, iclass 15, count 0 2006.229.20:50:16.35#ibcon#wrote, iclass 15, count 0 2006.229.20:50:16.35#ibcon#about to read 3, iclass 15, count 0 2006.229.20:50:16.37#ibcon#read 3, iclass 15, count 0 2006.229.20:50:16.37#ibcon#about to read 4, iclass 15, count 0 2006.229.20:50:16.37#ibcon#read 4, iclass 15, count 0 2006.229.20:50:16.37#ibcon#about to read 5, iclass 15, count 0 2006.229.20:50:16.37#ibcon#read 5, iclass 15, count 0 2006.229.20:50:16.37#ibcon#about to read 6, iclass 15, count 0 2006.229.20:50:16.37#ibcon#read 6, iclass 15, count 0 2006.229.20:50:16.37#ibcon#end of sib2, iclass 15, count 0 2006.229.20:50:16.37#ibcon#*mode == 0, iclass 15, count 0 2006.229.20:50:16.37#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.20:50:16.37#ibcon#[27=USB\r\n] 2006.229.20:50:16.37#ibcon#*before write, iclass 15, count 0 2006.229.20:50:16.37#ibcon#enter sib2, iclass 15, count 0 2006.229.20:50:16.37#ibcon#flushed, iclass 15, count 0 2006.229.20:50:16.37#ibcon#about to write, iclass 15, count 0 2006.229.20:50:16.37#ibcon#wrote, iclass 15, count 0 2006.229.20:50:16.38#ibcon#about to read 3, iclass 15, count 0 2006.229.20:50:16.40#ibcon#read 3, iclass 15, count 0 2006.229.20:50:16.40#ibcon#about to read 4, iclass 15, count 0 2006.229.20:50:16.40#ibcon#read 4, iclass 15, count 0 2006.229.20:50:16.40#ibcon#about to read 5, iclass 15, count 0 2006.229.20:50:16.40#ibcon#read 5, iclass 15, count 0 2006.229.20:50:16.40#ibcon#about to read 6, iclass 15, count 0 2006.229.20:50:16.40#ibcon#read 6, iclass 15, count 0 2006.229.20:50:16.40#ibcon#end of sib2, iclass 15, count 0 2006.229.20:50:16.40#ibcon#*after write, iclass 15, count 0 2006.229.20:50:16.40#ibcon#*before return 0, iclass 15, count 0 2006.229.20:50:16.40#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:16.40#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.20:50:16.40#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.20:50:16.41#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.20:50:16.41$vck44/vblo=6,719.99 2006.229.20:50:16.41#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.20:50:16.41#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.20:50:16.41#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:16.41#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:16.41#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:16.41#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:16.41#ibcon#enter wrdev, iclass 17, count 0 2006.229.20:50:16.41#ibcon#first serial, iclass 17, count 0 2006.229.20:50:16.41#ibcon#enter sib2, iclass 17, count 0 2006.229.20:50:16.41#ibcon#flushed, iclass 17, count 0 2006.229.20:50:16.41#ibcon#about to write, iclass 17, count 0 2006.229.20:50:16.41#ibcon#wrote, iclass 17, count 0 2006.229.20:50:16.41#ibcon#about to read 3, iclass 17, count 0 2006.229.20:50:16.42#ibcon#read 3, iclass 17, count 0 2006.229.20:50:16.42#ibcon#about to read 4, iclass 17, count 0 2006.229.20:50:16.42#ibcon#read 4, iclass 17, count 0 2006.229.20:50:16.42#ibcon#about to read 5, iclass 17, count 0 2006.229.20:50:16.42#ibcon#read 5, iclass 17, count 0 2006.229.20:50:16.42#ibcon#about to read 6, iclass 17, count 0 2006.229.20:50:16.42#ibcon#read 6, iclass 17, count 0 2006.229.20:50:16.42#ibcon#end of sib2, iclass 17, count 0 2006.229.20:50:16.42#ibcon#*mode == 0, iclass 17, count 0 2006.229.20:50:16.42#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.20:50:16.42#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.20:50:16.42#ibcon#*before write, iclass 17, count 0 2006.229.20:50:16.42#ibcon#enter sib2, iclass 17, count 0 2006.229.20:50:16.42#ibcon#flushed, iclass 17, count 0 2006.229.20:50:16.43#ibcon#about to write, iclass 17, count 0 2006.229.20:50:16.43#ibcon#wrote, iclass 17, count 0 2006.229.20:50:16.43#ibcon#about to read 3, iclass 17, count 0 2006.229.20:50:16.46#ibcon#read 3, iclass 17, count 0 2006.229.20:50:16.46#ibcon#about to read 4, iclass 17, count 0 2006.229.20:50:16.46#ibcon#read 4, iclass 17, count 0 2006.229.20:50:16.46#ibcon#about to read 5, iclass 17, count 0 2006.229.20:50:16.46#ibcon#read 5, iclass 17, count 0 2006.229.20:50:16.46#ibcon#about to read 6, iclass 17, count 0 2006.229.20:50:16.46#ibcon#read 6, iclass 17, count 0 2006.229.20:50:16.46#ibcon#end of sib2, iclass 17, count 0 2006.229.20:50:16.46#ibcon#*after write, iclass 17, count 0 2006.229.20:50:16.46#ibcon#*before return 0, iclass 17, count 0 2006.229.20:50:16.46#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:16.46#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.20:50:16.46#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.20:50:16.46#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.20:50:16.47$vck44/vb=6,4 2006.229.20:50:16.47#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.20:50:16.47#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.20:50:16.47#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:16.47#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:16.51#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:16.51#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:16.51#ibcon#enter wrdev, iclass 19, count 2 2006.229.20:50:16.51#ibcon#first serial, iclass 19, count 2 2006.229.20:50:16.51#ibcon#enter sib2, iclass 19, count 2 2006.229.20:50:16.51#ibcon#flushed, iclass 19, count 2 2006.229.20:50:16.51#ibcon#about to write, iclass 19, count 2 2006.229.20:50:16.51#ibcon#wrote, iclass 19, count 2 2006.229.20:50:16.51#ibcon#about to read 3, iclass 19, count 2 2006.229.20:50:16.53#ibcon#read 3, iclass 19, count 2 2006.229.20:50:16.53#ibcon#about to read 4, iclass 19, count 2 2006.229.20:50:16.53#ibcon#read 4, iclass 19, count 2 2006.229.20:50:16.53#ibcon#about to read 5, iclass 19, count 2 2006.229.20:50:16.53#ibcon#read 5, iclass 19, count 2 2006.229.20:50:16.53#ibcon#about to read 6, iclass 19, count 2 2006.229.20:50:16.53#ibcon#read 6, iclass 19, count 2 2006.229.20:50:16.53#ibcon#end of sib2, iclass 19, count 2 2006.229.20:50:16.53#ibcon#*mode == 0, iclass 19, count 2 2006.229.20:50:16.53#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.20:50:16.53#ibcon#[27=AT06-04\r\n] 2006.229.20:50:16.53#ibcon#*before write, iclass 19, count 2 2006.229.20:50:16.53#ibcon#enter sib2, iclass 19, count 2 2006.229.20:50:16.53#ibcon#flushed, iclass 19, count 2 2006.229.20:50:16.53#ibcon#about to write, iclass 19, count 2 2006.229.20:50:16.53#ibcon#wrote, iclass 19, count 2 2006.229.20:50:16.54#ibcon#about to read 3, iclass 19, count 2 2006.229.20:50:16.56#ibcon#read 3, iclass 19, count 2 2006.229.20:50:16.56#ibcon#about to read 4, iclass 19, count 2 2006.229.20:50:16.56#ibcon#read 4, iclass 19, count 2 2006.229.20:50:16.56#ibcon#about to read 5, iclass 19, count 2 2006.229.20:50:16.56#ibcon#read 5, iclass 19, count 2 2006.229.20:50:16.56#ibcon#about to read 6, iclass 19, count 2 2006.229.20:50:16.56#ibcon#read 6, iclass 19, count 2 2006.229.20:50:16.56#ibcon#end of sib2, iclass 19, count 2 2006.229.20:50:16.56#ibcon#*after write, iclass 19, count 2 2006.229.20:50:16.56#ibcon#*before return 0, iclass 19, count 2 2006.229.20:50:16.56#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:16.56#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.20:50:16.56#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.20:50:16.56#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:16.56#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:16.68#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:16.68#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:16.68#ibcon#enter wrdev, iclass 19, count 0 2006.229.20:50:16.68#ibcon#first serial, iclass 19, count 0 2006.229.20:50:16.68#ibcon#enter sib2, iclass 19, count 0 2006.229.20:50:16.68#ibcon#flushed, iclass 19, count 0 2006.229.20:50:16.68#ibcon#about to write, iclass 19, count 0 2006.229.20:50:16.68#ibcon#wrote, iclass 19, count 0 2006.229.20:50:16.68#ibcon#about to read 3, iclass 19, count 0 2006.229.20:50:16.70#ibcon#read 3, iclass 19, count 0 2006.229.20:50:16.70#ibcon#about to read 4, iclass 19, count 0 2006.229.20:50:16.70#ibcon#read 4, iclass 19, count 0 2006.229.20:50:16.70#ibcon#about to read 5, iclass 19, count 0 2006.229.20:50:16.70#ibcon#read 5, iclass 19, count 0 2006.229.20:50:16.70#ibcon#about to read 6, iclass 19, count 0 2006.229.20:50:16.70#ibcon#read 6, iclass 19, count 0 2006.229.20:50:16.70#ibcon#end of sib2, iclass 19, count 0 2006.229.20:50:16.70#ibcon#*mode == 0, iclass 19, count 0 2006.229.20:50:16.70#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.20:50:16.70#ibcon#[27=USB\r\n] 2006.229.20:50:16.70#ibcon#*before write, iclass 19, count 0 2006.229.20:50:16.70#ibcon#enter sib2, iclass 19, count 0 2006.229.20:50:16.71#ibcon#flushed, iclass 19, count 0 2006.229.20:50:16.71#ibcon#about to write, iclass 19, count 0 2006.229.20:50:16.71#ibcon#wrote, iclass 19, count 0 2006.229.20:50:16.71#ibcon#about to read 3, iclass 19, count 0 2006.229.20:50:16.73#ibcon#read 3, iclass 19, count 0 2006.229.20:50:16.73#ibcon#about to read 4, iclass 19, count 0 2006.229.20:50:16.73#ibcon#read 4, iclass 19, count 0 2006.229.20:50:16.73#ibcon#about to read 5, iclass 19, count 0 2006.229.20:50:16.73#ibcon#read 5, iclass 19, count 0 2006.229.20:50:16.73#ibcon#about to read 6, iclass 19, count 0 2006.229.20:50:16.73#ibcon#read 6, iclass 19, count 0 2006.229.20:50:16.73#ibcon#end of sib2, iclass 19, count 0 2006.229.20:50:16.74#ibcon#*after write, iclass 19, count 0 2006.229.20:50:16.74#ibcon#*before return 0, iclass 19, count 0 2006.229.20:50:16.74#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:16.74#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.20:50:16.74#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.20:50:16.74#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.20:50:16.74$vck44/vblo=7,734.99 2006.229.20:50:16.74#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.20:50:16.74#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.20:50:16.74#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:16.74#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:16.74#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:16.74#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:16.74#ibcon#enter wrdev, iclass 21, count 0 2006.229.20:50:16.74#ibcon#first serial, iclass 21, count 0 2006.229.20:50:16.74#ibcon#enter sib2, iclass 21, count 0 2006.229.20:50:16.74#ibcon#flushed, iclass 21, count 0 2006.229.20:50:16.74#ibcon#about to write, iclass 21, count 0 2006.229.20:50:16.74#ibcon#wrote, iclass 21, count 0 2006.229.20:50:16.74#ibcon#about to read 3, iclass 21, count 0 2006.229.20:50:16.75#ibcon#read 3, iclass 21, count 0 2006.229.20:50:16.75#ibcon#about to read 4, iclass 21, count 0 2006.229.20:50:16.75#ibcon#read 4, iclass 21, count 0 2006.229.20:50:16.75#ibcon#about to read 5, iclass 21, count 0 2006.229.20:50:16.75#ibcon#read 5, iclass 21, count 0 2006.229.20:50:16.75#ibcon#about to read 6, iclass 21, count 0 2006.229.20:50:16.75#ibcon#read 6, iclass 21, count 0 2006.229.20:50:16.75#ibcon#end of sib2, iclass 21, count 0 2006.229.20:50:16.75#ibcon#*mode == 0, iclass 21, count 0 2006.229.20:50:16.75#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.20:50:16.75#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.20:50:16.76#ibcon#*before write, iclass 21, count 0 2006.229.20:50:16.76#ibcon#enter sib2, iclass 21, count 0 2006.229.20:50:16.76#ibcon#flushed, iclass 21, count 0 2006.229.20:50:16.76#ibcon#about to write, iclass 21, count 0 2006.229.20:50:16.76#ibcon#wrote, iclass 21, count 0 2006.229.20:50:16.76#ibcon#about to read 3, iclass 21, count 0 2006.229.20:50:16.79#ibcon#read 3, iclass 21, count 0 2006.229.20:50:16.79#ibcon#about to read 4, iclass 21, count 0 2006.229.20:50:16.79#ibcon#read 4, iclass 21, count 0 2006.229.20:50:16.79#ibcon#about to read 5, iclass 21, count 0 2006.229.20:50:16.79#ibcon#read 5, iclass 21, count 0 2006.229.20:50:16.79#ibcon#about to read 6, iclass 21, count 0 2006.229.20:50:16.79#ibcon#read 6, iclass 21, count 0 2006.229.20:50:16.79#ibcon#end of sib2, iclass 21, count 0 2006.229.20:50:16.79#ibcon#*after write, iclass 21, count 0 2006.229.20:50:16.79#ibcon#*before return 0, iclass 21, count 0 2006.229.20:50:16.79#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:16.80#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.20:50:16.80#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.20:50:16.80#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.20:50:16.80$vck44/vb=7,4 2006.229.20:50:16.80#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.20:50:16.80#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.20:50:16.80#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:16.80#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:16.85#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:16.85#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:16.85#ibcon#enter wrdev, iclass 23, count 2 2006.229.20:50:16.85#ibcon#first serial, iclass 23, count 2 2006.229.20:50:16.85#ibcon#enter sib2, iclass 23, count 2 2006.229.20:50:16.85#ibcon#flushed, iclass 23, count 2 2006.229.20:50:16.85#ibcon#about to write, iclass 23, count 2 2006.229.20:50:16.85#ibcon#wrote, iclass 23, count 2 2006.229.20:50:16.85#ibcon#about to read 3, iclass 23, count 2 2006.229.20:50:16.87#ibcon#read 3, iclass 23, count 2 2006.229.20:50:16.87#ibcon#about to read 4, iclass 23, count 2 2006.229.20:50:16.87#ibcon#read 4, iclass 23, count 2 2006.229.20:50:16.87#ibcon#about to read 5, iclass 23, count 2 2006.229.20:50:16.87#ibcon#read 5, iclass 23, count 2 2006.229.20:50:16.87#ibcon#about to read 6, iclass 23, count 2 2006.229.20:50:16.87#ibcon#read 6, iclass 23, count 2 2006.229.20:50:16.87#ibcon#end of sib2, iclass 23, count 2 2006.229.20:50:16.88#ibcon#*mode == 0, iclass 23, count 2 2006.229.20:50:16.88#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.20:50:16.88#ibcon#[27=AT07-04\r\n] 2006.229.20:50:16.88#ibcon#*before write, iclass 23, count 2 2006.229.20:50:16.88#ibcon#enter sib2, iclass 23, count 2 2006.229.20:50:16.88#ibcon#flushed, iclass 23, count 2 2006.229.20:50:16.88#ibcon#about to write, iclass 23, count 2 2006.229.20:50:16.88#ibcon#wrote, iclass 23, count 2 2006.229.20:50:16.88#ibcon#about to read 3, iclass 23, count 2 2006.229.20:50:16.90#ibcon#read 3, iclass 23, count 2 2006.229.20:50:16.90#ibcon#about to read 4, iclass 23, count 2 2006.229.20:50:16.90#ibcon#read 4, iclass 23, count 2 2006.229.20:50:16.90#ibcon#about to read 5, iclass 23, count 2 2006.229.20:50:16.90#ibcon#read 5, iclass 23, count 2 2006.229.20:50:16.90#ibcon#about to read 6, iclass 23, count 2 2006.229.20:50:16.90#ibcon#read 6, iclass 23, count 2 2006.229.20:50:16.90#ibcon#end of sib2, iclass 23, count 2 2006.229.20:50:16.90#ibcon#*after write, iclass 23, count 2 2006.229.20:50:16.90#ibcon#*before return 0, iclass 23, count 2 2006.229.20:50:16.90#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:16.90#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.20:50:16.90#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.20:50:16.91#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:16.91#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:17.01#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:17.01#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:17.01#ibcon#enter wrdev, iclass 23, count 0 2006.229.20:50:17.02#ibcon#first serial, iclass 23, count 0 2006.229.20:50:17.02#ibcon#enter sib2, iclass 23, count 0 2006.229.20:50:17.02#ibcon#flushed, iclass 23, count 0 2006.229.20:50:17.02#ibcon#about to write, iclass 23, count 0 2006.229.20:50:17.02#ibcon#wrote, iclass 23, count 0 2006.229.20:50:17.02#ibcon#about to read 3, iclass 23, count 0 2006.229.20:50:17.03#ibcon#read 3, iclass 23, count 0 2006.229.20:50:17.03#ibcon#about to read 4, iclass 23, count 0 2006.229.20:50:17.03#ibcon#read 4, iclass 23, count 0 2006.229.20:50:17.03#ibcon#about to read 5, iclass 23, count 0 2006.229.20:50:17.03#ibcon#read 5, iclass 23, count 0 2006.229.20:50:17.03#ibcon#about to read 6, iclass 23, count 0 2006.229.20:50:17.03#ibcon#read 6, iclass 23, count 0 2006.229.20:50:17.03#ibcon#end of sib2, iclass 23, count 0 2006.229.20:50:17.03#ibcon#*mode == 0, iclass 23, count 0 2006.229.20:50:17.03#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.20:50:17.03#ibcon#[27=USB\r\n] 2006.229.20:50:17.03#ibcon#*before write, iclass 23, count 0 2006.229.20:50:17.03#ibcon#enter sib2, iclass 23, count 0 2006.229.20:50:17.04#ibcon#flushed, iclass 23, count 0 2006.229.20:50:17.04#ibcon#about to write, iclass 23, count 0 2006.229.20:50:17.04#ibcon#wrote, iclass 23, count 0 2006.229.20:50:17.04#ibcon#about to read 3, iclass 23, count 0 2006.229.20:50:17.06#ibcon#read 3, iclass 23, count 0 2006.229.20:50:17.06#ibcon#about to read 4, iclass 23, count 0 2006.229.20:50:17.06#ibcon#read 4, iclass 23, count 0 2006.229.20:50:17.06#ibcon#about to read 5, iclass 23, count 0 2006.229.20:50:17.06#ibcon#read 5, iclass 23, count 0 2006.229.20:50:17.06#ibcon#about to read 6, iclass 23, count 0 2006.229.20:50:17.06#ibcon#read 6, iclass 23, count 0 2006.229.20:50:17.06#ibcon#end of sib2, iclass 23, count 0 2006.229.20:50:17.06#ibcon#*after write, iclass 23, count 0 2006.229.20:50:17.06#ibcon#*before return 0, iclass 23, count 0 2006.229.20:50:17.06#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:17.06#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.20:50:17.07#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.20:50:17.07#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.20:50:17.07$vck44/vblo=8,744.99 2006.229.20:50:17.07#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.20:50:17.07#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.20:50:17.07#ibcon#ireg 17 cls_cnt 0 2006.229.20:50:17.07#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:17.07#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:17.07#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:17.07#ibcon#enter wrdev, iclass 25, count 0 2006.229.20:50:17.07#ibcon#first serial, iclass 25, count 0 2006.229.20:50:17.07#ibcon#enter sib2, iclass 25, count 0 2006.229.20:50:17.07#ibcon#flushed, iclass 25, count 0 2006.229.20:50:17.07#ibcon#about to write, iclass 25, count 0 2006.229.20:50:17.07#ibcon#wrote, iclass 25, count 0 2006.229.20:50:17.07#ibcon#about to read 3, iclass 25, count 0 2006.229.20:50:17.08#ibcon#read 3, iclass 25, count 0 2006.229.20:50:17.08#ibcon#about to read 4, iclass 25, count 0 2006.229.20:50:17.08#ibcon#read 4, iclass 25, count 0 2006.229.20:50:17.08#ibcon#about to read 5, iclass 25, count 0 2006.229.20:50:17.08#ibcon#read 5, iclass 25, count 0 2006.229.20:50:17.08#ibcon#about to read 6, iclass 25, count 0 2006.229.20:50:17.08#ibcon#read 6, iclass 25, count 0 2006.229.20:50:17.08#ibcon#end of sib2, iclass 25, count 0 2006.229.20:50:17.08#ibcon#*mode == 0, iclass 25, count 0 2006.229.20:50:17.08#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.20:50:17.08#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.20:50:17.08#ibcon#*before write, iclass 25, count 0 2006.229.20:50:17.08#ibcon#enter sib2, iclass 25, count 0 2006.229.20:50:17.08#ibcon#flushed, iclass 25, count 0 2006.229.20:50:17.08#ibcon#about to write, iclass 25, count 0 2006.229.20:50:17.09#ibcon#wrote, iclass 25, count 0 2006.229.20:50:17.09#ibcon#about to read 3, iclass 25, count 0 2006.229.20:50:17.12#ibcon#read 3, iclass 25, count 0 2006.229.20:50:17.12#ibcon#about to read 4, iclass 25, count 0 2006.229.20:50:17.12#ibcon#read 4, iclass 25, count 0 2006.229.20:50:17.12#ibcon#about to read 5, iclass 25, count 0 2006.229.20:50:17.12#ibcon#read 5, iclass 25, count 0 2006.229.20:50:17.12#ibcon#about to read 6, iclass 25, count 0 2006.229.20:50:17.12#ibcon#read 6, iclass 25, count 0 2006.229.20:50:17.12#ibcon#end of sib2, iclass 25, count 0 2006.229.20:50:17.12#ibcon#*after write, iclass 25, count 0 2006.229.20:50:17.12#ibcon#*before return 0, iclass 25, count 0 2006.229.20:50:17.12#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:17.12#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.20:50:17.12#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.20:50:17.12#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.20:50:17.13$vck44/vb=8,4 2006.229.20:50:17.13#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.20:50:17.13#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.20:50:17.13#ibcon#ireg 11 cls_cnt 2 2006.229.20:50:17.13#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:17.17#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:17.17#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:17.17#ibcon#enter wrdev, iclass 27, count 2 2006.229.20:50:17.18#ibcon#first serial, iclass 27, count 2 2006.229.20:50:17.18#ibcon#enter sib2, iclass 27, count 2 2006.229.20:50:17.18#ibcon#flushed, iclass 27, count 2 2006.229.20:50:17.18#ibcon#about to write, iclass 27, count 2 2006.229.20:50:17.18#ibcon#wrote, iclass 27, count 2 2006.229.20:50:17.18#ibcon#about to read 3, iclass 27, count 2 2006.229.20:50:17.19#ibcon#read 3, iclass 27, count 2 2006.229.20:50:17.19#ibcon#about to read 4, iclass 27, count 2 2006.229.20:50:17.19#ibcon#read 4, iclass 27, count 2 2006.229.20:50:17.19#ibcon#about to read 5, iclass 27, count 2 2006.229.20:50:17.19#ibcon#read 5, iclass 27, count 2 2006.229.20:50:17.19#ibcon#about to read 6, iclass 27, count 2 2006.229.20:50:17.19#ibcon#read 6, iclass 27, count 2 2006.229.20:50:17.19#ibcon#end of sib2, iclass 27, count 2 2006.229.20:50:17.19#ibcon#*mode == 0, iclass 27, count 2 2006.229.20:50:17.19#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.20:50:17.19#ibcon#[27=AT08-04\r\n] 2006.229.20:50:17.19#ibcon#*before write, iclass 27, count 2 2006.229.20:50:17.19#ibcon#enter sib2, iclass 27, count 2 2006.229.20:50:17.19#ibcon#flushed, iclass 27, count 2 2006.229.20:50:17.19#ibcon#about to write, iclass 27, count 2 2006.229.20:50:17.19#ibcon#wrote, iclass 27, count 2 2006.229.20:50:17.19#ibcon#about to read 3, iclass 27, count 2 2006.229.20:50:17.22#ibcon#read 3, iclass 27, count 2 2006.229.20:50:17.22#ibcon#about to read 4, iclass 27, count 2 2006.229.20:50:17.22#ibcon#read 4, iclass 27, count 2 2006.229.20:50:17.22#ibcon#about to read 5, iclass 27, count 2 2006.229.20:50:17.22#ibcon#read 5, iclass 27, count 2 2006.229.20:50:17.22#ibcon#about to read 6, iclass 27, count 2 2006.229.20:50:17.22#ibcon#read 6, iclass 27, count 2 2006.229.20:50:17.22#ibcon#end of sib2, iclass 27, count 2 2006.229.20:50:17.22#ibcon#*after write, iclass 27, count 2 2006.229.20:50:17.22#ibcon#*before return 0, iclass 27, count 2 2006.229.20:50:17.22#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:17.22#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.20:50:17.22#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.20:50:17.22#ibcon#ireg 7 cls_cnt 0 2006.229.20:50:17.23#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:17.33#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:17.33#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:17.33#ibcon#enter wrdev, iclass 27, count 0 2006.229.20:50:17.33#ibcon#first serial, iclass 27, count 0 2006.229.20:50:17.33#ibcon#enter sib2, iclass 27, count 0 2006.229.20:50:17.33#ibcon#flushed, iclass 27, count 0 2006.229.20:50:17.33#ibcon#about to write, iclass 27, count 0 2006.229.20:50:17.33#ibcon#wrote, iclass 27, count 0 2006.229.20:50:17.33#ibcon#about to read 3, iclass 27, count 0 2006.229.20:50:17.35#ibcon#read 3, iclass 27, count 0 2006.229.20:50:17.35#ibcon#about to read 4, iclass 27, count 0 2006.229.20:50:17.35#ibcon#read 4, iclass 27, count 0 2006.229.20:50:17.35#ibcon#about to read 5, iclass 27, count 0 2006.229.20:50:17.35#ibcon#read 5, iclass 27, count 0 2006.229.20:50:17.35#ibcon#about to read 6, iclass 27, count 0 2006.229.20:50:17.35#ibcon#read 6, iclass 27, count 0 2006.229.20:50:17.35#ibcon#end of sib2, iclass 27, count 0 2006.229.20:50:17.35#ibcon#*mode == 0, iclass 27, count 0 2006.229.20:50:17.35#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.20:50:17.35#ibcon#[27=USB\r\n] 2006.229.20:50:17.35#ibcon#*before write, iclass 27, count 0 2006.229.20:50:17.35#ibcon#enter sib2, iclass 27, count 0 2006.229.20:50:17.35#ibcon#flushed, iclass 27, count 0 2006.229.20:50:17.35#ibcon#about to write, iclass 27, count 0 2006.229.20:50:17.35#ibcon#wrote, iclass 27, count 0 2006.229.20:50:17.35#ibcon#about to read 3, iclass 27, count 0 2006.229.20:50:17.39#ibcon#read 3, iclass 27, count 0 2006.229.20:50:17.39#ibcon#about to read 4, iclass 27, count 0 2006.229.20:50:17.39#ibcon#read 4, iclass 27, count 0 2006.229.20:50:17.39#ibcon#about to read 5, iclass 27, count 0 2006.229.20:50:17.39#ibcon#read 5, iclass 27, count 0 2006.229.20:50:17.39#ibcon#about to read 6, iclass 27, count 0 2006.229.20:50:17.39#ibcon#read 6, iclass 27, count 0 2006.229.20:50:17.39#ibcon#end of sib2, iclass 27, count 0 2006.229.20:50:17.39#ibcon#*after write, iclass 27, count 0 2006.229.20:50:17.39#ibcon#*before return 0, iclass 27, count 0 2006.229.20:50:17.39#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:17.39#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.20:50:17.39#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.20:50:17.39#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.20:50:17.39$vck44/vabw=wide 2006.229.20:50:17.39#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.20:50:17.39#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.20:50:17.39#ibcon#ireg 8 cls_cnt 0 2006.229.20:50:17.39#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:17.39#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:17.39#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:17.39#ibcon#enter wrdev, iclass 29, count 0 2006.229.20:50:17.39#ibcon#first serial, iclass 29, count 0 2006.229.20:50:17.39#ibcon#enter sib2, iclass 29, count 0 2006.229.20:50:17.39#ibcon#flushed, iclass 29, count 0 2006.229.20:50:17.39#ibcon#about to write, iclass 29, count 0 2006.229.20:50:17.39#ibcon#wrote, iclass 29, count 0 2006.229.20:50:17.39#ibcon#about to read 3, iclass 29, count 0 2006.229.20:50:17.40#ibcon#read 3, iclass 29, count 0 2006.229.20:50:17.40#ibcon#about to read 4, iclass 29, count 0 2006.229.20:50:17.40#ibcon#read 4, iclass 29, count 0 2006.229.20:50:17.40#ibcon#about to read 5, iclass 29, count 0 2006.229.20:50:17.40#ibcon#read 5, iclass 29, count 0 2006.229.20:50:17.40#ibcon#about to read 6, iclass 29, count 0 2006.229.20:50:17.40#ibcon#read 6, iclass 29, count 0 2006.229.20:50:17.40#ibcon#end of sib2, iclass 29, count 0 2006.229.20:50:17.40#ibcon#*mode == 0, iclass 29, count 0 2006.229.20:50:17.40#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.20:50:17.40#ibcon#[25=BW32\r\n] 2006.229.20:50:17.40#ibcon#*before write, iclass 29, count 0 2006.229.20:50:17.40#ibcon#enter sib2, iclass 29, count 0 2006.229.20:50:17.40#ibcon#flushed, iclass 29, count 0 2006.229.20:50:17.40#ibcon#about to write, iclass 29, count 0 2006.229.20:50:17.41#ibcon#wrote, iclass 29, count 0 2006.229.20:50:17.41#ibcon#about to read 3, iclass 29, count 0 2006.229.20:50:17.43#ibcon#read 3, iclass 29, count 0 2006.229.20:50:17.43#ibcon#about to read 4, iclass 29, count 0 2006.229.20:50:17.43#ibcon#read 4, iclass 29, count 0 2006.229.20:50:17.43#ibcon#about to read 5, iclass 29, count 0 2006.229.20:50:17.43#ibcon#read 5, iclass 29, count 0 2006.229.20:50:17.43#ibcon#about to read 6, iclass 29, count 0 2006.229.20:50:17.43#ibcon#read 6, iclass 29, count 0 2006.229.20:50:17.43#ibcon#end of sib2, iclass 29, count 0 2006.229.20:50:17.43#ibcon#*after write, iclass 29, count 0 2006.229.20:50:17.43#ibcon#*before return 0, iclass 29, count 0 2006.229.20:50:17.43#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:17.43#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.20:50:17.43#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.20:50:17.43#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.20:50:17.44$vck44/vbbw=wide 2006.229.20:50:17.44#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.20:50:17.44#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.20:50:17.44#ibcon#ireg 8 cls_cnt 0 2006.229.20:50:17.44#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:50:17.50#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:50:17.50#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:50:17.50#ibcon#enter wrdev, iclass 31, count 0 2006.229.20:50:17.50#ibcon#first serial, iclass 31, count 0 2006.229.20:50:17.50#ibcon#enter sib2, iclass 31, count 0 2006.229.20:50:17.50#ibcon#flushed, iclass 31, count 0 2006.229.20:50:17.50#ibcon#about to write, iclass 31, count 0 2006.229.20:50:17.50#ibcon#wrote, iclass 31, count 0 2006.229.20:50:17.50#ibcon#about to read 3, iclass 31, count 0 2006.229.20:50:17.52#ibcon#read 3, iclass 31, count 0 2006.229.20:50:17.52#ibcon#about to read 4, iclass 31, count 0 2006.229.20:50:17.52#ibcon#read 4, iclass 31, count 0 2006.229.20:50:17.52#ibcon#about to read 5, iclass 31, count 0 2006.229.20:50:17.52#ibcon#read 5, iclass 31, count 0 2006.229.20:50:17.52#ibcon#about to read 6, iclass 31, count 0 2006.229.20:50:17.52#ibcon#read 6, iclass 31, count 0 2006.229.20:50:17.52#ibcon#end of sib2, iclass 31, count 0 2006.229.20:50:17.52#ibcon#*mode == 0, iclass 31, count 0 2006.229.20:50:17.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.20:50:17.52#ibcon#[27=BW32\r\n] 2006.229.20:50:17.52#ibcon#*before write, iclass 31, count 0 2006.229.20:50:17.52#ibcon#enter sib2, iclass 31, count 0 2006.229.20:50:17.52#ibcon#flushed, iclass 31, count 0 2006.229.20:50:17.52#ibcon#about to write, iclass 31, count 0 2006.229.20:50:17.52#ibcon#wrote, iclass 31, count 0 2006.229.20:50:17.53#ibcon#about to read 3, iclass 31, count 0 2006.229.20:50:17.55#ibcon#read 3, iclass 31, count 0 2006.229.20:50:17.55#ibcon#about to read 4, iclass 31, count 0 2006.229.20:50:17.55#ibcon#read 4, iclass 31, count 0 2006.229.20:50:17.55#ibcon#about to read 5, iclass 31, count 0 2006.229.20:50:17.55#ibcon#read 5, iclass 31, count 0 2006.229.20:50:17.55#ibcon#about to read 6, iclass 31, count 0 2006.229.20:50:17.55#ibcon#read 6, iclass 31, count 0 2006.229.20:50:17.55#ibcon#end of sib2, iclass 31, count 0 2006.229.20:50:17.55#ibcon#*after write, iclass 31, count 0 2006.229.20:50:17.55#ibcon#*before return 0, iclass 31, count 0 2006.229.20:50:17.55#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:50:17.55#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.20:50:17.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.20:50:17.56#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.20:50:17.56$setupk4/ifdk4 2006.229.20:50:17.56$ifdk4/lo= 2006.229.20:50:17.56$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.20:50:17.56$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.20:50:17.56$ifdk4/patch= 2006.229.20:50:17.56$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.20:50:17.56$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.20:50:17.56$setupk4/!*+20s 2006.229.20:50:25.14#trakl#Source acquired 2006.229.20:50:25.29#abcon#<5=/07 1.2 3.7 26.081001001.9\r\n> 2006.229.20:50:25.31#abcon#{5=INTERFACE CLEAR} 2006.229.20:50:25.37#abcon#[5=S1D000X0/0*\r\n] 2006.229.20:50:26.15#flagr#flagr/antenna,acquired 2006.229.20:50:32.27$setupk4/"tpicd 2006.229.20:50:32.27$setupk4/echo=off 2006.229.20:50:32.28$setupk4/xlog=off 2006.229.20:50:32.28:!2006.229.20:53:49 2006.229.20:53:49.01:preob 2006.229.20:53:50.14/onsource/TRACKING 2006.229.20:53:50.14:!2006.229.20:53:59 2006.229.20:53:59.00:"tape 2006.229.20:53:59.00:"st=record 2006.229.20:53:59.00:data_valid=on 2006.229.20:53:59.00:midob 2006.229.20:53:59.14/onsource/TRACKING 2006.229.20:53:59.15/wx/26.14,1001.9,100 2006.229.20:53:59.30/cable/+6.4212E-03 2006.229.20:54:00.39/va/01,08,usb,yes,29,31 2006.229.20:54:00.39/va/02,07,usb,yes,32,32 2006.229.20:54:00.39/va/03,06,usb,yes,39,42 2006.229.20:54:00.39/va/04,07,usb,yes,32,34 2006.229.20:54:00.39/va/05,04,usb,yes,29,29 2006.229.20:54:00.39/va/06,04,usb,yes,33,32 2006.229.20:54:00.39/va/07,05,usb,yes,29,29 2006.229.20:54:00.39/va/08,06,usb,yes,21,26 2006.229.20:54:00.62/valo/01,524.99,yes,locked 2006.229.20:54:00.62/valo/02,534.99,yes,locked 2006.229.20:54:00.62/valo/03,564.99,yes,locked 2006.229.20:54:00.62/valo/04,624.99,yes,locked 2006.229.20:54:00.62/valo/05,734.99,yes,locked 2006.229.20:54:00.62/valo/06,814.99,yes,locked 2006.229.20:54:00.62/valo/07,864.99,yes,locked 2006.229.20:54:00.62/valo/08,884.99,yes,locked 2006.229.20:54:01.71/vb/01,04,usb,yes,31,29 2006.229.20:54:01.71/vb/02,04,usb,yes,33,33 2006.229.20:54:01.71/vb/03,04,usb,yes,30,33 2006.229.20:54:01.71/vb/04,04,usb,yes,35,33 2006.229.20:54:01.71/vb/05,04,usb,yes,27,29 2006.229.20:54:01.71/vb/06,04,usb,yes,31,27 2006.229.20:54:01.71/vb/07,04,usb,yes,31,31 2006.229.20:54:01.71/vb/08,04,usb,yes,29,32 2006.229.20:54:01.94/vblo/01,629.99,yes,locked 2006.229.20:54:01.94/vblo/02,634.99,yes,locked 2006.229.20:54:01.94/vblo/03,649.99,yes,locked 2006.229.20:54:01.94/vblo/04,679.99,yes,locked 2006.229.20:54:01.94/vblo/05,709.99,yes,locked 2006.229.20:54:01.94/vblo/06,719.99,yes,locked 2006.229.20:54:01.94/vblo/07,734.99,yes,locked 2006.229.20:54:01.94/vblo/08,744.99,yes,locked 2006.229.20:54:02.09/vabw/8 2006.229.20:54:02.24/vbbw/8 2006.229.20:54:02.33/xfe/off,on,12.5 2006.229.20:54:02.71/ifatt/23,28,28,28 2006.229.20:54:03.07/fmout-gps/S +4.61E-07 2006.229.20:54:03.12:!2006.229.21:01:09 2006.229.21:01:09.00:data_valid=off 2006.229.21:01:09.00:"et 2006.229.21:01:09.00:!+3s 2006.229.21:01:12.01:"tape 2006.229.21:01:12.01:postob 2006.229.21:01:12.22/cable/+6.4203E-03 2006.229.21:01:12.22/wx/26.20,1002.0,100 2006.229.21:01:13.07/fmout-gps/S +4.56E-07 2006.229.21:01:13.07:scan_name=229-2107,jd0608,310 2006.229.21:01:13.07:source=nrao150,035929.75,505750.2,2000.0,neutral 2006.229.21:01:14.14#flagr#flagr/antenna,new-source 2006.229.21:01:14.14:checkk5 2006.229.21:01:14.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:01:14.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:01:15.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:01:15.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:01:16.12/chk_obsdata//k5ts1/T2292053??a.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.21:01:16.52/chk_obsdata//k5ts2/T2292053??b.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.21:01:16.92/chk_obsdata//k5ts3/T2292053??c.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.21:01:17.32/chk_obsdata//k5ts4/T2292053??d.dat file size is correct (nominal:1720MB, actual:1716MB). 2006.229.21:01:18.05/k5log//k5ts1_log_newline 2006.229.21:01:18.75/k5log//k5ts2_log_newline 2006.229.21:01:19.45/k5log//k5ts3_log_newline 2006.229.21:01:20.16/k5log//k5ts4_log_newline 2006.229.21:01:20.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:01:20.18:setupk4=1 2006.229.21:01:20.18$setupk4/echo=on 2006.229.21:01:20.18$setupk4/pcalon 2006.229.21:01:20.18$pcalon/"no phase cal control is implemented here 2006.229.21:01:20.18$setupk4/"tpicd=stop 2006.229.21:01:20.18$setupk4/"rec=synch_on 2006.229.21:01:20.18$setupk4/"rec_mode=128 2006.229.21:01:20.18$setupk4/!* 2006.229.21:01:20.18$setupk4/recpk4 2006.229.21:01:20.18$recpk4/recpatch= 2006.229.21:01:20.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:01:20.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:01:20.19$setupk4/vck44 2006.229.21:01:20.19$vck44/valo=1,524.99 2006.229.21:01:20.19#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.21:01:20.19#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.21:01:20.19#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:20.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:20.19#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:20.19#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:20.19#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:01:20.19#ibcon#first serial, iclass 6, count 0 2006.229.21:01:20.19#ibcon#enter sib2, iclass 6, count 0 2006.229.21:01:20.19#ibcon#flushed, iclass 6, count 0 2006.229.21:01:20.19#ibcon#about to write, iclass 6, count 0 2006.229.21:01:20.19#ibcon#wrote, iclass 6, count 0 2006.229.21:01:20.19#ibcon#about to read 3, iclass 6, count 0 2006.229.21:01:20.20#ibcon#read 3, iclass 6, count 0 2006.229.21:01:20.20#ibcon#about to read 4, iclass 6, count 0 2006.229.21:01:20.20#ibcon#read 4, iclass 6, count 0 2006.229.21:01:20.20#ibcon#about to read 5, iclass 6, count 0 2006.229.21:01:20.20#ibcon#read 5, iclass 6, count 0 2006.229.21:01:20.20#ibcon#about to read 6, iclass 6, count 0 2006.229.21:01:20.20#ibcon#read 6, iclass 6, count 0 2006.229.21:01:20.20#ibcon#end of sib2, iclass 6, count 0 2006.229.21:01:20.20#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:01:20.20#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:01:20.20#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:01:20.20#ibcon#*before write, iclass 6, count 0 2006.229.21:01:20.20#ibcon#enter sib2, iclass 6, count 0 2006.229.21:01:20.20#ibcon#flushed, iclass 6, count 0 2006.229.21:01:20.20#ibcon#about to write, iclass 6, count 0 2006.229.21:01:20.20#ibcon#wrote, iclass 6, count 0 2006.229.21:01:20.20#ibcon#about to read 3, iclass 6, count 0 2006.229.21:01:20.25#ibcon#read 3, iclass 6, count 0 2006.229.21:01:20.25#ibcon#about to read 4, iclass 6, count 0 2006.229.21:01:20.25#ibcon#read 4, iclass 6, count 0 2006.229.21:01:20.25#ibcon#about to read 5, iclass 6, count 0 2006.229.21:01:20.25#ibcon#read 5, iclass 6, count 0 2006.229.21:01:20.25#ibcon#about to read 6, iclass 6, count 0 2006.229.21:01:20.25#ibcon#read 6, iclass 6, count 0 2006.229.21:01:20.25#ibcon#end of sib2, iclass 6, count 0 2006.229.21:01:20.25#ibcon#*after write, iclass 6, count 0 2006.229.21:01:20.25#ibcon#*before return 0, iclass 6, count 0 2006.229.21:01:20.25#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:20.25#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:20.25#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:01:20.25#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:01:20.25$vck44/va=1,8 2006.229.21:01:20.25#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.21:01:20.25#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.21:01:20.25#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:20.25#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:20.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:20.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:20.25#ibcon#enter wrdev, iclass 10, count 2 2006.229.21:01:20.25#ibcon#first serial, iclass 10, count 2 2006.229.21:01:20.25#ibcon#enter sib2, iclass 10, count 2 2006.229.21:01:20.25#ibcon#flushed, iclass 10, count 2 2006.229.21:01:20.25#ibcon#about to write, iclass 10, count 2 2006.229.21:01:20.25#ibcon#wrote, iclass 10, count 2 2006.229.21:01:20.25#ibcon#about to read 3, iclass 10, count 2 2006.229.21:01:20.27#ibcon#read 3, iclass 10, count 2 2006.229.21:01:20.27#ibcon#about to read 4, iclass 10, count 2 2006.229.21:01:20.27#ibcon#read 4, iclass 10, count 2 2006.229.21:01:20.27#ibcon#about to read 5, iclass 10, count 2 2006.229.21:01:20.27#ibcon#read 5, iclass 10, count 2 2006.229.21:01:20.27#ibcon#about to read 6, iclass 10, count 2 2006.229.21:01:20.27#ibcon#read 6, iclass 10, count 2 2006.229.21:01:20.27#ibcon#end of sib2, iclass 10, count 2 2006.229.21:01:20.27#ibcon#*mode == 0, iclass 10, count 2 2006.229.21:01:20.27#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.21:01:20.27#ibcon#[25=AT01-08\r\n] 2006.229.21:01:20.27#ibcon#*before write, iclass 10, count 2 2006.229.21:01:20.27#ibcon#enter sib2, iclass 10, count 2 2006.229.21:01:20.27#ibcon#flushed, iclass 10, count 2 2006.229.21:01:20.27#ibcon#about to write, iclass 10, count 2 2006.229.21:01:20.27#ibcon#wrote, iclass 10, count 2 2006.229.21:01:20.27#ibcon#about to read 3, iclass 10, count 2 2006.229.21:01:20.30#ibcon#read 3, iclass 10, count 2 2006.229.21:01:20.30#ibcon#about to read 4, iclass 10, count 2 2006.229.21:01:20.30#ibcon#read 4, iclass 10, count 2 2006.229.21:01:20.30#ibcon#about to read 5, iclass 10, count 2 2006.229.21:01:20.30#ibcon#read 5, iclass 10, count 2 2006.229.21:01:20.30#ibcon#about to read 6, iclass 10, count 2 2006.229.21:01:20.30#ibcon#read 6, iclass 10, count 2 2006.229.21:01:20.30#ibcon#end of sib2, iclass 10, count 2 2006.229.21:01:20.30#ibcon#*after write, iclass 10, count 2 2006.229.21:01:20.30#ibcon#*before return 0, iclass 10, count 2 2006.229.21:01:20.30#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:20.30#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:20.30#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.21:01:20.30#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:20.30#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:20.42#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:20.42#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:20.42#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:01:20.42#ibcon#first serial, iclass 10, count 0 2006.229.21:01:20.42#ibcon#enter sib2, iclass 10, count 0 2006.229.21:01:20.42#ibcon#flushed, iclass 10, count 0 2006.229.21:01:20.42#ibcon#about to write, iclass 10, count 0 2006.229.21:01:20.42#ibcon#wrote, iclass 10, count 0 2006.229.21:01:20.42#ibcon#about to read 3, iclass 10, count 0 2006.229.21:01:20.44#ibcon#read 3, iclass 10, count 0 2006.229.21:01:20.44#ibcon#about to read 4, iclass 10, count 0 2006.229.21:01:20.44#ibcon#read 4, iclass 10, count 0 2006.229.21:01:20.44#ibcon#about to read 5, iclass 10, count 0 2006.229.21:01:20.44#ibcon#read 5, iclass 10, count 0 2006.229.21:01:20.44#ibcon#about to read 6, iclass 10, count 0 2006.229.21:01:20.44#ibcon#read 6, iclass 10, count 0 2006.229.21:01:20.44#ibcon#end of sib2, iclass 10, count 0 2006.229.21:01:20.44#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:01:20.44#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:01:20.44#ibcon#[25=USB\r\n] 2006.229.21:01:20.44#ibcon#*before write, iclass 10, count 0 2006.229.21:01:20.44#ibcon#enter sib2, iclass 10, count 0 2006.229.21:01:20.44#ibcon#flushed, iclass 10, count 0 2006.229.21:01:20.44#ibcon#about to write, iclass 10, count 0 2006.229.21:01:20.44#ibcon#wrote, iclass 10, count 0 2006.229.21:01:20.44#ibcon#about to read 3, iclass 10, count 0 2006.229.21:01:20.47#ibcon#read 3, iclass 10, count 0 2006.229.21:01:20.47#ibcon#about to read 4, iclass 10, count 0 2006.229.21:01:20.47#ibcon#read 4, iclass 10, count 0 2006.229.21:01:20.47#ibcon#about to read 5, iclass 10, count 0 2006.229.21:01:20.47#ibcon#read 5, iclass 10, count 0 2006.229.21:01:20.47#ibcon#about to read 6, iclass 10, count 0 2006.229.21:01:20.47#ibcon#read 6, iclass 10, count 0 2006.229.21:01:20.47#ibcon#end of sib2, iclass 10, count 0 2006.229.21:01:20.47#ibcon#*after write, iclass 10, count 0 2006.229.21:01:20.47#ibcon#*before return 0, iclass 10, count 0 2006.229.21:01:20.47#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:20.47#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:20.47#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:01:20.47#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:01:20.47$vck44/valo=2,534.99 2006.229.21:01:20.47#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.21:01:20.47#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.21:01:20.47#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:20.47#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:20.47#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:20.47#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:20.47#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:01:20.47#ibcon#first serial, iclass 12, count 0 2006.229.21:01:20.47#ibcon#enter sib2, iclass 12, count 0 2006.229.21:01:20.47#ibcon#flushed, iclass 12, count 0 2006.229.21:01:20.47#ibcon#about to write, iclass 12, count 0 2006.229.21:01:20.47#ibcon#wrote, iclass 12, count 0 2006.229.21:01:20.47#ibcon#about to read 3, iclass 12, count 0 2006.229.21:01:20.49#ibcon#read 3, iclass 12, count 0 2006.229.21:01:20.49#ibcon#about to read 4, iclass 12, count 0 2006.229.21:01:20.49#ibcon#read 4, iclass 12, count 0 2006.229.21:01:20.49#ibcon#about to read 5, iclass 12, count 0 2006.229.21:01:20.49#ibcon#read 5, iclass 12, count 0 2006.229.21:01:20.49#ibcon#about to read 6, iclass 12, count 0 2006.229.21:01:20.49#ibcon#read 6, iclass 12, count 0 2006.229.21:01:20.49#ibcon#end of sib2, iclass 12, count 0 2006.229.21:01:20.49#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:01:20.49#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:01:20.49#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:01:20.49#ibcon#*before write, iclass 12, count 0 2006.229.21:01:20.49#ibcon#enter sib2, iclass 12, count 0 2006.229.21:01:20.49#ibcon#flushed, iclass 12, count 0 2006.229.21:01:20.49#ibcon#about to write, iclass 12, count 0 2006.229.21:01:20.49#ibcon#wrote, iclass 12, count 0 2006.229.21:01:20.49#ibcon#about to read 3, iclass 12, count 0 2006.229.21:01:20.53#ibcon#read 3, iclass 12, count 0 2006.229.21:01:20.53#ibcon#about to read 4, iclass 12, count 0 2006.229.21:01:20.53#ibcon#read 4, iclass 12, count 0 2006.229.21:01:20.53#ibcon#about to read 5, iclass 12, count 0 2006.229.21:01:20.53#ibcon#read 5, iclass 12, count 0 2006.229.21:01:20.53#ibcon#about to read 6, iclass 12, count 0 2006.229.21:01:20.53#ibcon#read 6, iclass 12, count 0 2006.229.21:01:20.53#ibcon#end of sib2, iclass 12, count 0 2006.229.21:01:20.53#ibcon#*after write, iclass 12, count 0 2006.229.21:01:20.53#ibcon#*before return 0, iclass 12, count 0 2006.229.21:01:20.53#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:20.53#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:20.53#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:01:20.53#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:01:20.53$vck44/va=2,7 2006.229.21:01:20.53#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.21:01:20.53#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.21:01:20.53#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:20.53#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:20.59#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:20.59#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:20.59#ibcon#enter wrdev, iclass 14, count 2 2006.229.21:01:20.59#ibcon#first serial, iclass 14, count 2 2006.229.21:01:20.59#ibcon#enter sib2, iclass 14, count 2 2006.229.21:01:20.59#ibcon#flushed, iclass 14, count 2 2006.229.21:01:20.59#ibcon#about to write, iclass 14, count 2 2006.229.21:01:20.59#ibcon#wrote, iclass 14, count 2 2006.229.21:01:20.59#ibcon#about to read 3, iclass 14, count 2 2006.229.21:01:20.61#ibcon#read 3, iclass 14, count 2 2006.229.21:01:20.61#ibcon#about to read 4, iclass 14, count 2 2006.229.21:01:20.61#ibcon#read 4, iclass 14, count 2 2006.229.21:01:20.61#ibcon#about to read 5, iclass 14, count 2 2006.229.21:01:20.61#ibcon#read 5, iclass 14, count 2 2006.229.21:01:20.61#ibcon#about to read 6, iclass 14, count 2 2006.229.21:01:20.61#ibcon#read 6, iclass 14, count 2 2006.229.21:01:20.61#ibcon#end of sib2, iclass 14, count 2 2006.229.21:01:20.61#ibcon#*mode == 0, iclass 14, count 2 2006.229.21:01:20.61#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.21:01:20.61#ibcon#[25=AT02-07\r\n] 2006.229.21:01:20.61#ibcon#*before write, iclass 14, count 2 2006.229.21:01:20.61#ibcon#enter sib2, iclass 14, count 2 2006.229.21:01:20.61#ibcon#flushed, iclass 14, count 2 2006.229.21:01:20.61#ibcon#about to write, iclass 14, count 2 2006.229.21:01:20.61#ibcon#wrote, iclass 14, count 2 2006.229.21:01:20.61#ibcon#about to read 3, iclass 14, count 2 2006.229.21:01:20.64#ibcon#read 3, iclass 14, count 2 2006.229.21:01:20.64#ibcon#about to read 4, iclass 14, count 2 2006.229.21:01:20.64#ibcon#read 4, iclass 14, count 2 2006.229.21:01:20.64#ibcon#about to read 5, iclass 14, count 2 2006.229.21:01:20.64#ibcon#read 5, iclass 14, count 2 2006.229.21:01:20.64#ibcon#about to read 6, iclass 14, count 2 2006.229.21:01:20.64#ibcon#read 6, iclass 14, count 2 2006.229.21:01:20.64#ibcon#end of sib2, iclass 14, count 2 2006.229.21:01:20.64#ibcon#*after write, iclass 14, count 2 2006.229.21:01:20.64#ibcon#*before return 0, iclass 14, count 2 2006.229.21:01:20.64#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:20.64#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:20.64#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.21:01:20.64#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:20.64#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:20.76#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:20.76#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:20.76#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:01:20.76#ibcon#first serial, iclass 14, count 0 2006.229.21:01:20.76#ibcon#enter sib2, iclass 14, count 0 2006.229.21:01:20.76#ibcon#flushed, iclass 14, count 0 2006.229.21:01:20.76#ibcon#about to write, iclass 14, count 0 2006.229.21:01:20.76#ibcon#wrote, iclass 14, count 0 2006.229.21:01:20.76#ibcon#about to read 3, iclass 14, count 0 2006.229.21:01:20.78#ibcon#read 3, iclass 14, count 0 2006.229.21:01:20.78#ibcon#about to read 4, iclass 14, count 0 2006.229.21:01:20.78#ibcon#read 4, iclass 14, count 0 2006.229.21:01:20.78#ibcon#about to read 5, iclass 14, count 0 2006.229.21:01:20.78#ibcon#read 5, iclass 14, count 0 2006.229.21:01:20.78#ibcon#about to read 6, iclass 14, count 0 2006.229.21:01:20.78#ibcon#read 6, iclass 14, count 0 2006.229.21:01:20.78#ibcon#end of sib2, iclass 14, count 0 2006.229.21:01:20.78#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:01:20.78#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:01:20.78#ibcon#[25=USB\r\n] 2006.229.21:01:20.78#ibcon#*before write, iclass 14, count 0 2006.229.21:01:20.78#ibcon#enter sib2, iclass 14, count 0 2006.229.21:01:20.78#ibcon#flushed, iclass 14, count 0 2006.229.21:01:20.78#ibcon#about to write, iclass 14, count 0 2006.229.21:01:20.78#ibcon#wrote, iclass 14, count 0 2006.229.21:01:20.78#ibcon#about to read 3, iclass 14, count 0 2006.229.21:01:20.81#ibcon#read 3, iclass 14, count 0 2006.229.21:01:20.81#ibcon#about to read 4, iclass 14, count 0 2006.229.21:01:20.81#ibcon#read 4, iclass 14, count 0 2006.229.21:01:20.81#ibcon#about to read 5, iclass 14, count 0 2006.229.21:01:20.81#ibcon#read 5, iclass 14, count 0 2006.229.21:01:20.81#ibcon#about to read 6, iclass 14, count 0 2006.229.21:01:20.81#ibcon#read 6, iclass 14, count 0 2006.229.21:01:20.81#ibcon#end of sib2, iclass 14, count 0 2006.229.21:01:20.81#ibcon#*after write, iclass 14, count 0 2006.229.21:01:20.81#ibcon#*before return 0, iclass 14, count 0 2006.229.21:01:20.81#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:20.81#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:20.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:01:20.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:01:20.81$vck44/valo=3,564.99 2006.229.21:01:20.81#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.21:01:20.81#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.21:01:20.81#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:20.81#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:20.81#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:20.81#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:20.81#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:01:20.81#ibcon#first serial, iclass 16, count 0 2006.229.21:01:20.81#ibcon#enter sib2, iclass 16, count 0 2006.229.21:01:20.81#ibcon#flushed, iclass 16, count 0 2006.229.21:01:20.81#ibcon#about to write, iclass 16, count 0 2006.229.21:01:20.81#ibcon#wrote, iclass 16, count 0 2006.229.21:01:20.81#ibcon#about to read 3, iclass 16, count 0 2006.229.21:01:20.83#ibcon#read 3, iclass 16, count 0 2006.229.21:01:20.83#ibcon#about to read 4, iclass 16, count 0 2006.229.21:01:20.83#ibcon#read 4, iclass 16, count 0 2006.229.21:01:20.83#ibcon#about to read 5, iclass 16, count 0 2006.229.21:01:20.83#ibcon#read 5, iclass 16, count 0 2006.229.21:01:20.83#ibcon#about to read 6, iclass 16, count 0 2006.229.21:01:20.83#ibcon#read 6, iclass 16, count 0 2006.229.21:01:20.83#ibcon#end of sib2, iclass 16, count 0 2006.229.21:01:20.83#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:01:20.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:01:20.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:01:20.83#ibcon#*before write, iclass 16, count 0 2006.229.21:01:20.83#ibcon#enter sib2, iclass 16, count 0 2006.229.21:01:20.83#ibcon#flushed, iclass 16, count 0 2006.229.21:01:20.83#ibcon#about to write, iclass 16, count 0 2006.229.21:01:20.83#ibcon#wrote, iclass 16, count 0 2006.229.21:01:20.83#ibcon#about to read 3, iclass 16, count 0 2006.229.21:01:20.87#ibcon#read 3, iclass 16, count 0 2006.229.21:01:20.87#ibcon#about to read 4, iclass 16, count 0 2006.229.21:01:20.87#ibcon#read 4, iclass 16, count 0 2006.229.21:01:20.87#ibcon#about to read 5, iclass 16, count 0 2006.229.21:01:20.87#ibcon#read 5, iclass 16, count 0 2006.229.21:01:20.87#ibcon#about to read 6, iclass 16, count 0 2006.229.21:01:20.87#ibcon#read 6, iclass 16, count 0 2006.229.21:01:20.87#ibcon#end of sib2, iclass 16, count 0 2006.229.21:01:20.87#ibcon#*after write, iclass 16, count 0 2006.229.21:01:20.87#ibcon#*before return 0, iclass 16, count 0 2006.229.21:01:20.87#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:20.87#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:20.87#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:01:20.87#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:01:20.87$vck44/va=3,6 2006.229.21:01:20.87#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.21:01:20.87#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.21:01:20.87#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:20.87#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:20.93#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:20.93#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:20.93#ibcon#enter wrdev, iclass 18, count 2 2006.229.21:01:20.93#ibcon#first serial, iclass 18, count 2 2006.229.21:01:20.93#ibcon#enter sib2, iclass 18, count 2 2006.229.21:01:20.93#ibcon#flushed, iclass 18, count 2 2006.229.21:01:20.93#ibcon#about to write, iclass 18, count 2 2006.229.21:01:20.93#ibcon#wrote, iclass 18, count 2 2006.229.21:01:20.93#ibcon#about to read 3, iclass 18, count 2 2006.229.21:01:20.95#ibcon#read 3, iclass 18, count 2 2006.229.21:01:20.95#ibcon#about to read 4, iclass 18, count 2 2006.229.21:01:20.95#ibcon#read 4, iclass 18, count 2 2006.229.21:01:20.95#ibcon#about to read 5, iclass 18, count 2 2006.229.21:01:20.95#ibcon#read 5, iclass 18, count 2 2006.229.21:01:20.95#ibcon#about to read 6, iclass 18, count 2 2006.229.21:01:20.95#ibcon#read 6, iclass 18, count 2 2006.229.21:01:20.95#ibcon#end of sib2, iclass 18, count 2 2006.229.21:01:20.95#ibcon#*mode == 0, iclass 18, count 2 2006.229.21:01:20.95#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.21:01:20.95#ibcon#[25=AT03-06\r\n] 2006.229.21:01:20.95#ibcon#*before write, iclass 18, count 2 2006.229.21:01:20.95#ibcon#enter sib2, iclass 18, count 2 2006.229.21:01:20.95#ibcon#flushed, iclass 18, count 2 2006.229.21:01:20.95#ibcon#about to write, iclass 18, count 2 2006.229.21:01:20.95#ibcon#wrote, iclass 18, count 2 2006.229.21:01:20.95#ibcon#about to read 3, iclass 18, count 2 2006.229.21:01:20.98#ibcon#read 3, iclass 18, count 2 2006.229.21:01:20.98#ibcon#about to read 4, iclass 18, count 2 2006.229.21:01:20.98#ibcon#read 4, iclass 18, count 2 2006.229.21:01:20.98#ibcon#about to read 5, iclass 18, count 2 2006.229.21:01:20.98#ibcon#read 5, iclass 18, count 2 2006.229.21:01:20.98#ibcon#about to read 6, iclass 18, count 2 2006.229.21:01:20.98#ibcon#read 6, iclass 18, count 2 2006.229.21:01:20.98#ibcon#end of sib2, iclass 18, count 2 2006.229.21:01:20.98#ibcon#*after write, iclass 18, count 2 2006.229.21:01:20.98#ibcon#*before return 0, iclass 18, count 2 2006.229.21:01:20.98#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:20.98#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:20.98#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.21:01:20.98#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:20.98#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:21.10#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:21.10#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:21.10#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:01:21.10#ibcon#first serial, iclass 18, count 0 2006.229.21:01:21.10#ibcon#enter sib2, iclass 18, count 0 2006.229.21:01:21.10#ibcon#flushed, iclass 18, count 0 2006.229.21:01:21.10#ibcon#about to write, iclass 18, count 0 2006.229.21:01:21.10#ibcon#wrote, iclass 18, count 0 2006.229.21:01:21.10#ibcon#about to read 3, iclass 18, count 0 2006.229.21:01:21.12#ibcon#read 3, iclass 18, count 0 2006.229.21:01:21.12#ibcon#about to read 4, iclass 18, count 0 2006.229.21:01:21.12#ibcon#read 4, iclass 18, count 0 2006.229.21:01:21.12#ibcon#about to read 5, iclass 18, count 0 2006.229.21:01:21.12#ibcon#read 5, iclass 18, count 0 2006.229.21:01:21.12#ibcon#about to read 6, iclass 18, count 0 2006.229.21:01:21.12#ibcon#read 6, iclass 18, count 0 2006.229.21:01:21.12#ibcon#end of sib2, iclass 18, count 0 2006.229.21:01:21.12#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:01:21.12#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:01:21.12#ibcon#[25=USB\r\n] 2006.229.21:01:21.12#ibcon#*before write, iclass 18, count 0 2006.229.21:01:21.12#ibcon#enter sib2, iclass 18, count 0 2006.229.21:01:21.12#ibcon#flushed, iclass 18, count 0 2006.229.21:01:21.12#ibcon#about to write, iclass 18, count 0 2006.229.21:01:21.12#ibcon#wrote, iclass 18, count 0 2006.229.21:01:21.12#ibcon#about to read 3, iclass 18, count 0 2006.229.21:01:21.15#ibcon#read 3, iclass 18, count 0 2006.229.21:01:21.15#ibcon#about to read 4, iclass 18, count 0 2006.229.21:01:21.15#ibcon#read 4, iclass 18, count 0 2006.229.21:01:21.15#ibcon#about to read 5, iclass 18, count 0 2006.229.21:01:21.15#ibcon#read 5, iclass 18, count 0 2006.229.21:01:21.15#ibcon#about to read 6, iclass 18, count 0 2006.229.21:01:21.15#ibcon#read 6, iclass 18, count 0 2006.229.21:01:21.15#ibcon#end of sib2, iclass 18, count 0 2006.229.21:01:21.15#ibcon#*after write, iclass 18, count 0 2006.229.21:01:21.15#ibcon#*before return 0, iclass 18, count 0 2006.229.21:01:21.15#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:21.15#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:21.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:01:21.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:01:21.15$vck44/valo=4,624.99 2006.229.21:01:21.15#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:01:21.15#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:01:21.15#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:21.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:21.15#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:21.15#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:21.15#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:01:21.15#ibcon#first serial, iclass 20, count 0 2006.229.21:01:21.15#ibcon#enter sib2, iclass 20, count 0 2006.229.21:01:21.15#ibcon#flushed, iclass 20, count 0 2006.229.21:01:21.15#ibcon#about to write, iclass 20, count 0 2006.229.21:01:21.15#ibcon#wrote, iclass 20, count 0 2006.229.21:01:21.15#ibcon#about to read 3, iclass 20, count 0 2006.229.21:01:21.17#ibcon#read 3, iclass 20, count 0 2006.229.21:01:21.17#ibcon#about to read 4, iclass 20, count 0 2006.229.21:01:21.17#ibcon#read 4, iclass 20, count 0 2006.229.21:01:21.17#ibcon#about to read 5, iclass 20, count 0 2006.229.21:01:21.17#ibcon#read 5, iclass 20, count 0 2006.229.21:01:21.17#ibcon#about to read 6, iclass 20, count 0 2006.229.21:01:21.17#ibcon#read 6, iclass 20, count 0 2006.229.21:01:21.17#ibcon#end of sib2, iclass 20, count 0 2006.229.21:01:21.17#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:01:21.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:01:21.17#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:01:21.17#ibcon#*before write, iclass 20, count 0 2006.229.21:01:21.17#ibcon#enter sib2, iclass 20, count 0 2006.229.21:01:21.17#ibcon#flushed, iclass 20, count 0 2006.229.21:01:21.17#ibcon#about to write, iclass 20, count 0 2006.229.21:01:21.17#ibcon#wrote, iclass 20, count 0 2006.229.21:01:21.17#ibcon#about to read 3, iclass 20, count 0 2006.229.21:01:21.21#ibcon#read 3, iclass 20, count 0 2006.229.21:01:21.21#ibcon#about to read 4, iclass 20, count 0 2006.229.21:01:21.21#ibcon#read 4, iclass 20, count 0 2006.229.21:01:21.21#ibcon#about to read 5, iclass 20, count 0 2006.229.21:01:21.21#ibcon#read 5, iclass 20, count 0 2006.229.21:01:21.21#ibcon#about to read 6, iclass 20, count 0 2006.229.21:01:21.21#ibcon#read 6, iclass 20, count 0 2006.229.21:01:21.21#ibcon#end of sib2, iclass 20, count 0 2006.229.21:01:21.21#ibcon#*after write, iclass 20, count 0 2006.229.21:01:21.21#ibcon#*before return 0, iclass 20, count 0 2006.229.21:01:21.21#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:21.21#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:21.21#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:01:21.21#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:01:21.21$vck44/va=4,7 2006.229.21:01:21.21#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.21:01:21.21#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.21:01:21.21#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:21.21#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:21.27#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:21.27#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:21.27#ibcon#enter wrdev, iclass 22, count 2 2006.229.21:01:21.27#ibcon#first serial, iclass 22, count 2 2006.229.21:01:21.27#ibcon#enter sib2, iclass 22, count 2 2006.229.21:01:21.27#ibcon#flushed, iclass 22, count 2 2006.229.21:01:21.27#ibcon#about to write, iclass 22, count 2 2006.229.21:01:21.27#ibcon#wrote, iclass 22, count 2 2006.229.21:01:21.27#ibcon#about to read 3, iclass 22, count 2 2006.229.21:01:21.29#ibcon#read 3, iclass 22, count 2 2006.229.21:01:21.29#ibcon#about to read 4, iclass 22, count 2 2006.229.21:01:21.29#ibcon#read 4, iclass 22, count 2 2006.229.21:01:21.29#ibcon#about to read 5, iclass 22, count 2 2006.229.21:01:21.29#ibcon#read 5, iclass 22, count 2 2006.229.21:01:21.29#ibcon#about to read 6, iclass 22, count 2 2006.229.21:01:21.29#ibcon#read 6, iclass 22, count 2 2006.229.21:01:21.29#ibcon#end of sib2, iclass 22, count 2 2006.229.21:01:21.29#ibcon#*mode == 0, iclass 22, count 2 2006.229.21:01:21.29#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.21:01:21.29#ibcon#[25=AT04-07\r\n] 2006.229.21:01:21.29#ibcon#*before write, iclass 22, count 2 2006.229.21:01:21.29#ibcon#enter sib2, iclass 22, count 2 2006.229.21:01:21.29#ibcon#flushed, iclass 22, count 2 2006.229.21:01:21.29#ibcon#about to write, iclass 22, count 2 2006.229.21:01:21.29#ibcon#wrote, iclass 22, count 2 2006.229.21:01:21.29#ibcon#about to read 3, iclass 22, count 2 2006.229.21:01:21.32#ibcon#read 3, iclass 22, count 2 2006.229.21:01:21.32#ibcon#about to read 4, iclass 22, count 2 2006.229.21:01:21.32#ibcon#read 4, iclass 22, count 2 2006.229.21:01:21.32#ibcon#about to read 5, iclass 22, count 2 2006.229.21:01:21.32#ibcon#read 5, iclass 22, count 2 2006.229.21:01:21.32#ibcon#about to read 6, iclass 22, count 2 2006.229.21:01:21.32#ibcon#read 6, iclass 22, count 2 2006.229.21:01:21.32#ibcon#end of sib2, iclass 22, count 2 2006.229.21:01:21.32#ibcon#*after write, iclass 22, count 2 2006.229.21:01:21.32#ibcon#*before return 0, iclass 22, count 2 2006.229.21:01:21.32#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:21.32#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:21.32#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.21:01:21.32#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:21.32#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:21.44#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:21.44#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:21.44#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:01:21.44#ibcon#first serial, iclass 22, count 0 2006.229.21:01:21.44#ibcon#enter sib2, iclass 22, count 0 2006.229.21:01:21.44#ibcon#flushed, iclass 22, count 0 2006.229.21:01:21.44#ibcon#about to write, iclass 22, count 0 2006.229.21:01:21.44#ibcon#wrote, iclass 22, count 0 2006.229.21:01:21.44#ibcon#about to read 3, iclass 22, count 0 2006.229.21:01:21.46#ibcon#read 3, iclass 22, count 0 2006.229.21:01:21.46#ibcon#about to read 4, iclass 22, count 0 2006.229.21:01:21.46#ibcon#read 4, iclass 22, count 0 2006.229.21:01:21.46#ibcon#about to read 5, iclass 22, count 0 2006.229.21:01:21.46#ibcon#read 5, iclass 22, count 0 2006.229.21:01:21.46#ibcon#about to read 6, iclass 22, count 0 2006.229.21:01:21.46#ibcon#read 6, iclass 22, count 0 2006.229.21:01:21.46#ibcon#end of sib2, iclass 22, count 0 2006.229.21:01:21.46#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:01:21.46#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:01:21.46#ibcon#[25=USB\r\n] 2006.229.21:01:21.46#ibcon#*before write, iclass 22, count 0 2006.229.21:01:21.46#ibcon#enter sib2, iclass 22, count 0 2006.229.21:01:21.46#ibcon#flushed, iclass 22, count 0 2006.229.21:01:21.46#ibcon#about to write, iclass 22, count 0 2006.229.21:01:21.46#ibcon#wrote, iclass 22, count 0 2006.229.21:01:21.46#ibcon#about to read 3, iclass 22, count 0 2006.229.21:01:21.49#ibcon#read 3, iclass 22, count 0 2006.229.21:01:21.49#ibcon#about to read 4, iclass 22, count 0 2006.229.21:01:21.49#ibcon#read 4, iclass 22, count 0 2006.229.21:01:21.49#ibcon#about to read 5, iclass 22, count 0 2006.229.21:01:21.49#ibcon#read 5, iclass 22, count 0 2006.229.21:01:21.49#ibcon#about to read 6, iclass 22, count 0 2006.229.21:01:21.49#ibcon#read 6, iclass 22, count 0 2006.229.21:01:21.49#ibcon#end of sib2, iclass 22, count 0 2006.229.21:01:21.49#ibcon#*after write, iclass 22, count 0 2006.229.21:01:21.49#ibcon#*before return 0, iclass 22, count 0 2006.229.21:01:21.49#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:21.49#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:21.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:01:21.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:01:21.49$vck44/valo=5,734.99 2006.229.21:01:21.49#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.21:01:21.49#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.21:01:21.49#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:21.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:21.49#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:21.49#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:21.49#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:01:21.49#ibcon#first serial, iclass 24, count 0 2006.229.21:01:21.49#ibcon#enter sib2, iclass 24, count 0 2006.229.21:01:21.49#ibcon#flushed, iclass 24, count 0 2006.229.21:01:21.49#ibcon#about to write, iclass 24, count 0 2006.229.21:01:21.49#ibcon#wrote, iclass 24, count 0 2006.229.21:01:21.49#ibcon#about to read 3, iclass 24, count 0 2006.229.21:01:21.51#ibcon#read 3, iclass 24, count 0 2006.229.21:01:21.51#ibcon#about to read 4, iclass 24, count 0 2006.229.21:01:21.51#ibcon#read 4, iclass 24, count 0 2006.229.21:01:21.51#ibcon#about to read 5, iclass 24, count 0 2006.229.21:01:21.51#ibcon#read 5, iclass 24, count 0 2006.229.21:01:21.51#ibcon#about to read 6, iclass 24, count 0 2006.229.21:01:21.51#ibcon#read 6, iclass 24, count 0 2006.229.21:01:21.51#ibcon#end of sib2, iclass 24, count 0 2006.229.21:01:21.51#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:01:21.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:01:21.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:01:21.51#ibcon#*before write, iclass 24, count 0 2006.229.21:01:21.51#ibcon#enter sib2, iclass 24, count 0 2006.229.21:01:21.51#ibcon#flushed, iclass 24, count 0 2006.229.21:01:21.51#ibcon#about to write, iclass 24, count 0 2006.229.21:01:21.51#ibcon#wrote, iclass 24, count 0 2006.229.21:01:21.51#ibcon#about to read 3, iclass 24, count 0 2006.229.21:01:21.55#ibcon#read 3, iclass 24, count 0 2006.229.21:01:21.55#ibcon#about to read 4, iclass 24, count 0 2006.229.21:01:21.55#ibcon#read 4, iclass 24, count 0 2006.229.21:01:21.55#ibcon#about to read 5, iclass 24, count 0 2006.229.21:01:21.55#ibcon#read 5, iclass 24, count 0 2006.229.21:01:21.55#ibcon#about to read 6, iclass 24, count 0 2006.229.21:01:21.55#ibcon#read 6, iclass 24, count 0 2006.229.21:01:21.55#ibcon#end of sib2, iclass 24, count 0 2006.229.21:01:21.55#ibcon#*after write, iclass 24, count 0 2006.229.21:01:21.55#ibcon#*before return 0, iclass 24, count 0 2006.229.21:01:21.55#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:21.55#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:21.55#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:01:21.55#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:01:21.55$vck44/va=5,4 2006.229.21:01:21.55#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.21:01:21.55#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.21:01:21.55#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:21.55#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:21.61#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:21.61#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:21.61#ibcon#enter wrdev, iclass 26, count 2 2006.229.21:01:21.61#ibcon#first serial, iclass 26, count 2 2006.229.21:01:21.61#ibcon#enter sib2, iclass 26, count 2 2006.229.21:01:21.61#ibcon#flushed, iclass 26, count 2 2006.229.21:01:21.61#ibcon#about to write, iclass 26, count 2 2006.229.21:01:21.61#ibcon#wrote, iclass 26, count 2 2006.229.21:01:21.61#ibcon#about to read 3, iclass 26, count 2 2006.229.21:01:21.63#ibcon#read 3, iclass 26, count 2 2006.229.21:01:21.63#ibcon#about to read 4, iclass 26, count 2 2006.229.21:01:21.63#ibcon#read 4, iclass 26, count 2 2006.229.21:01:21.63#ibcon#about to read 5, iclass 26, count 2 2006.229.21:01:21.63#ibcon#read 5, iclass 26, count 2 2006.229.21:01:21.63#ibcon#about to read 6, iclass 26, count 2 2006.229.21:01:21.63#ibcon#read 6, iclass 26, count 2 2006.229.21:01:21.63#ibcon#end of sib2, iclass 26, count 2 2006.229.21:01:21.63#ibcon#*mode == 0, iclass 26, count 2 2006.229.21:01:21.63#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.21:01:21.63#ibcon#[25=AT05-04\r\n] 2006.229.21:01:21.63#ibcon#*before write, iclass 26, count 2 2006.229.21:01:21.63#ibcon#enter sib2, iclass 26, count 2 2006.229.21:01:21.63#ibcon#flushed, iclass 26, count 2 2006.229.21:01:21.63#ibcon#about to write, iclass 26, count 2 2006.229.21:01:21.63#ibcon#wrote, iclass 26, count 2 2006.229.21:01:21.63#ibcon#about to read 3, iclass 26, count 2 2006.229.21:01:21.66#ibcon#read 3, iclass 26, count 2 2006.229.21:01:21.66#ibcon#about to read 4, iclass 26, count 2 2006.229.21:01:21.66#ibcon#read 4, iclass 26, count 2 2006.229.21:01:21.66#ibcon#about to read 5, iclass 26, count 2 2006.229.21:01:21.66#ibcon#read 5, iclass 26, count 2 2006.229.21:01:21.66#ibcon#about to read 6, iclass 26, count 2 2006.229.21:01:21.66#ibcon#read 6, iclass 26, count 2 2006.229.21:01:21.66#ibcon#end of sib2, iclass 26, count 2 2006.229.21:01:21.66#ibcon#*after write, iclass 26, count 2 2006.229.21:01:21.66#ibcon#*before return 0, iclass 26, count 2 2006.229.21:01:21.66#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:21.66#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:21.66#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.21:01:21.66#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:21.66#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:21.78#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:21.78#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:21.78#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:01:21.78#ibcon#first serial, iclass 26, count 0 2006.229.21:01:21.78#ibcon#enter sib2, iclass 26, count 0 2006.229.21:01:21.78#ibcon#flushed, iclass 26, count 0 2006.229.21:01:21.78#ibcon#about to write, iclass 26, count 0 2006.229.21:01:21.78#ibcon#wrote, iclass 26, count 0 2006.229.21:01:21.78#ibcon#about to read 3, iclass 26, count 0 2006.229.21:01:21.80#ibcon#read 3, iclass 26, count 0 2006.229.21:01:21.80#ibcon#about to read 4, iclass 26, count 0 2006.229.21:01:21.80#ibcon#read 4, iclass 26, count 0 2006.229.21:01:21.80#ibcon#about to read 5, iclass 26, count 0 2006.229.21:01:21.80#ibcon#read 5, iclass 26, count 0 2006.229.21:01:21.80#ibcon#about to read 6, iclass 26, count 0 2006.229.21:01:21.80#ibcon#read 6, iclass 26, count 0 2006.229.21:01:21.80#ibcon#end of sib2, iclass 26, count 0 2006.229.21:01:21.80#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:01:21.80#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:01:21.80#ibcon#[25=USB\r\n] 2006.229.21:01:21.80#ibcon#*before write, iclass 26, count 0 2006.229.21:01:21.80#ibcon#enter sib2, iclass 26, count 0 2006.229.21:01:21.80#ibcon#flushed, iclass 26, count 0 2006.229.21:01:21.80#ibcon#about to write, iclass 26, count 0 2006.229.21:01:21.80#ibcon#wrote, iclass 26, count 0 2006.229.21:01:21.80#ibcon#about to read 3, iclass 26, count 0 2006.229.21:01:21.83#ibcon#read 3, iclass 26, count 0 2006.229.21:01:21.83#ibcon#about to read 4, iclass 26, count 0 2006.229.21:01:21.83#ibcon#read 4, iclass 26, count 0 2006.229.21:01:21.83#ibcon#about to read 5, iclass 26, count 0 2006.229.21:01:21.83#ibcon#read 5, iclass 26, count 0 2006.229.21:01:21.83#ibcon#about to read 6, iclass 26, count 0 2006.229.21:01:21.83#ibcon#read 6, iclass 26, count 0 2006.229.21:01:21.83#ibcon#end of sib2, iclass 26, count 0 2006.229.21:01:21.83#ibcon#*after write, iclass 26, count 0 2006.229.21:01:21.83#ibcon#*before return 0, iclass 26, count 0 2006.229.21:01:21.83#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:21.83#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:21.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:01:21.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:01:21.83$vck44/valo=6,814.99 2006.229.21:01:21.83#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.21:01:21.83#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.21:01:21.83#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:21.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:21.83#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:21.83#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:21.83#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:01:21.83#ibcon#first serial, iclass 28, count 0 2006.229.21:01:21.83#ibcon#enter sib2, iclass 28, count 0 2006.229.21:01:21.83#ibcon#flushed, iclass 28, count 0 2006.229.21:01:21.83#ibcon#about to write, iclass 28, count 0 2006.229.21:01:21.83#ibcon#wrote, iclass 28, count 0 2006.229.21:01:21.83#ibcon#about to read 3, iclass 28, count 0 2006.229.21:01:21.85#ibcon#read 3, iclass 28, count 0 2006.229.21:01:21.85#ibcon#about to read 4, iclass 28, count 0 2006.229.21:01:21.85#ibcon#read 4, iclass 28, count 0 2006.229.21:01:21.85#ibcon#about to read 5, iclass 28, count 0 2006.229.21:01:21.85#ibcon#read 5, iclass 28, count 0 2006.229.21:01:21.85#ibcon#about to read 6, iclass 28, count 0 2006.229.21:01:21.85#ibcon#read 6, iclass 28, count 0 2006.229.21:01:21.85#ibcon#end of sib2, iclass 28, count 0 2006.229.21:01:21.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:01:21.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:01:21.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:01:21.85#ibcon#*before write, iclass 28, count 0 2006.229.21:01:21.85#ibcon#enter sib2, iclass 28, count 0 2006.229.21:01:21.85#ibcon#flushed, iclass 28, count 0 2006.229.21:01:21.85#ibcon#about to write, iclass 28, count 0 2006.229.21:01:21.85#ibcon#wrote, iclass 28, count 0 2006.229.21:01:21.85#ibcon#about to read 3, iclass 28, count 0 2006.229.21:01:21.89#ibcon#read 3, iclass 28, count 0 2006.229.21:01:21.89#ibcon#about to read 4, iclass 28, count 0 2006.229.21:01:21.89#ibcon#read 4, iclass 28, count 0 2006.229.21:01:21.89#ibcon#about to read 5, iclass 28, count 0 2006.229.21:01:21.89#ibcon#read 5, iclass 28, count 0 2006.229.21:01:21.89#ibcon#about to read 6, iclass 28, count 0 2006.229.21:01:21.89#ibcon#read 6, iclass 28, count 0 2006.229.21:01:21.89#ibcon#end of sib2, iclass 28, count 0 2006.229.21:01:21.89#ibcon#*after write, iclass 28, count 0 2006.229.21:01:21.89#ibcon#*before return 0, iclass 28, count 0 2006.229.21:01:21.89#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:21.89#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:21.89#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:01:21.89#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:01:21.89$vck44/va=6,4 2006.229.21:01:21.89#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.21:01:21.89#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.21:01:21.89#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:21.89#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:21.95#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:21.95#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:21.95#ibcon#enter wrdev, iclass 30, count 2 2006.229.21:01:21.95#ibcon#first serial, iclass 30, count 2 2006.229.21:01:21.95#ibcon#enter sib2, iclass 30, count 2 2006.229.21:01:21.95#ibcon#flushed, iclass 30, count 2 2006.229.21:01:21.95#ibcon#about to write, iclass 30, count 2 2006.229.21:01:21.95#ibcon#wrote, iclass 30, count 2 2006.229.21:01:21.95#ibcon#about to read 3, iclass 30, count 2 2006.229.21:01:21.97#ibcon#read 3, iclass 30, count 2 2006.229.21:01:21.97#ibcon#about to read 4, iclass 30, count 2 2006.229.21:01:21.97#ibcon#read 4, iclass 30, count 2 2006.229.21:01:21.97#ibcon#about to read 5, iclass 30, count 2 2006.229.21:01:21.97#ibcon#read 5, iclass 30, count 2 2006.229.21:01:21.97#ibcon#about to read 6, iclass 30, count 2 2006.229.21:01:21.97#ibcon#read 6, iclass 30, count 2 2006.229.21:01:21.97#ibcon#end of sib2, iclass 30, count 2 2006.229.21:01:21.97#ibcon#*mode == 0, iclass 30, count 2 2006.229.21:01:21.97#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.21:01:21.97#ibcon#[25=AT06-04\r\n] 2006.229.21:01:21.97#ibcon#*before write, iclass 30, count 2 2006.229.21:01:21.97#ibcon#enter sib2, iclass 30, count 2 2006.229.21:01:21.97#ibcon#flushed, iclass 30, count 2 2006.229.21:01:21.97#ibcon#about to write, iclass 30, count 2 2006.229.21:01:21.97#ibcon#wrote, iclass 30, count 2 2006.229.21:01:21.97#ibcon#about to read 3, iclass 30, count 2 2006.229.21:01:22.00#ibcon#read 3, iclass 30, count 2 2006.229.21:01:22.00#ibcon#about to read 4, iclass 30, count 2 2006.229.21:01:22.00#ibcon#read 4, iclass 30, count 2 2006.229.21:01:22.00#ibcon#about to read 5, iclass 30, count 2 2006.229.21:01:22.00#ibcon#read 5, iclass 30, count 2 2006.229.21:01:22.00#ibcon#about to read 6, iclass 30, count 2 2006.229.21:01:22.00#ibcon#read 6, iclass 30, count 2 2006.229.21:01:22.00#ibcon#end of sib2, iclass 30, count 2 2006.229.21:01:22.00#ibcon#*after write, iclass 30, count 2 2006.229.21:01:22.00#ibcon#*before return 0, iclass 30, count 2 2006.229.21:01:22.00#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:22.00#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:22.00#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.21:01:22.00#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:22.00#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:22.12#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:22.12#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:22.12#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:01:22.12#ibcon#first serial, iclass 30, count 0 2006.229.21:01:22.12#ibcon#enter sib2, iclass 30, count 0 2006.229.21:01:22.12#ibcon#flushed, iclass 30, count 0 2006.229.21:01:22.12#ibcon#about to write, iclass 30, count 0 2006.229.21:01:22.12#ibcon#wrote, iclass 30, count 0 2006.229.21:01:22.12#ibcon#about to read 3, iclass 30, count 0 2006.229.21:01:22.14#ibcon#read 3, iclass 30, count 0 2006.229.21:01:22.14#ibcon#about to read 4, iclass 30, count 0 2006.229.21:01:22.14#ibcon#read 4, iclass 30, count 0 2006.229.21:01:22.14#ibcon#about to read 5, iclass 30, count 0 2006.229.21:01:22.14#ibcon#read 5, iclass 30, count 0 2006.229.21:01:22.14#ibcon#about to read 6, iclass 30, count 0 2006.229.21:01:22.14#ibcon#read 6, iclass 30, count 0 2006.229.21:01:22.14#ibcon#end of sib2, iclass 30, count 0 2006.229.21:01:22.14#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:01:22.14#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:01:22.14#ibcon#[25=USB\r\n] 2006.229.21:01:22.14#ibcon#*before write, iclass 30, count 0 2006.229.21:01:22.14#ibcon#enter sib2, iclass 30, count 0 2006.229.21:01:22.14#ibcon#flushed, iclass 30, count 0 2006.229.21:01:22.14#ibcon#about to write, iclass 30, count 0 2006.229.21:01:22.14#ibcon#wrote, iclass 30, count 0 2006.229.21:01:22.14#ibcon#about to read 3, iclass 30, count 0 2006.229.21:01:22.17#ibcon#read 3, iclass 30, count 0 2006.229.21:01:22.17#ibcon#about to read 4, iclass 30, count 0 2006.229.21:01:22.17#ibcon#read 4, iclass 30, count 0 2006.229.21:01:22.17#ibcon#about to read 5, iclass 30, count 0 2006.229.21:01:22.17#ibcon#read 5, iclass 30, count 0 2006.229.21:01:22.17#ibcon#about to read 6, iclass 30, count 0 2006.229.21:01:22.17#ibcon#read 6, iclass 30, count 0 2006.229.21:01:22.17#ibcon#end of sib2, iclass 30, count 0 2006.229.21:01:22.17#ibcon#*after write, iclass 30, count 0 2006.229.21:01:22.17#ibcon#*before return 0, iclass 30, count 0 2006.229.21:01:22.17#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:22.17#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:22.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:01:22.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:01:22.17$vck44/valo=7,864.99 2006.229.21:01:22.17#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.21:01:22.17#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.21:01:22.17#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:22.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:22.17#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:22.17#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:22.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:01:22.17#ibcon#first serial, iclass 32, count 0 2006.229.21:01:22.17#ibcon#enter sib2, iclass 32, count 0 2006.229.21:01:22.17#ibcon#flushed, iclass 32, count 0 2006.229.21:01:22.17#ibcon#about to write, iclass 32, count 0 2006.229.21:01:22.17#ibcon#wrote, iclass 32, count 0 2006.229.21:01:22.17#ibcon#about to read 3, iclass 32, count 0 2006.229.21:01:22.19#ibcon#read 3, iclass 32, count 0 2006.229.21:01:22.19#ibcon#about to read 4, iclass 32, count 0 2006.229.21:01:22.19#ibcon#read 4, iclass 32, count 0 2006.229.21:01:22.19#ibcon#about to read 5, iclass 32, count 0 2006.229.21:01:22.19#ibcon#read 5, iclass 32, count 0 2006.229.21:01:22.19#ibcon#about to read 6, iclass 32, count 0 2006.229.21:01:22.19#ibcon#read 6, iclass 32, count 0 2006.229.21:01:22.19#ibcon#end of sib2, iclass 32, count 0 2006.229.21:01:22.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:01:22.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:01:22.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:01:22.19#ibcon#*before write, iclass 32, count 0 2006.229.21:01:22.19#ibcon#enter sib2, iclass 32, count 0 2006.229.21:01:22.19#ibcon#flushed, iclass 32, count 0 2006.229.21:01:22.19#ibcon#about to write, iclass 32, count 0 2006.229.21:01:22.19#ibcon#wrote, iclass 32, count 0 2006.229.21:01:22.19#ibcon#about to read 3, iclass 32, count 0 2006.229.21:01:22.23#ibcon#read 3, iclass 32, count 0 2006.229.21:01:22.23#ibcon#about to read 4, iclass 32, count 0 2006.229.21:01:22.23#ibcon#read 4, iclass 32, count 0 2006.229.21:01:22.23#ibcon#about to read 5, iclass 32, count 0 2006.229.21:01:22.23#ibcon#read 5, iclass 32, count 0 2006.229.21:01:22.23#ibcon#about to read 6, iclass 32, count 0 2006.229.21:01:22.23#ibcon#read 6, iclass 32, count 0 2006.229.21:01:22.23#ibcon#end of sib2, iclass 32, count 0 2006.229.21:01:22.23#ibcon#*after write, iclass 32, count 0 2006.229.21:01:22.23#ibcon#*before return 0, iclass 32, count 0 2006.229.21:01:22.23#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:22.23#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:22.23#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:01:22.23#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:01:22.23$vck44/va=7,5 2006.229.21:01:22.23#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.21:01:22.23#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.21:01:22.23#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:22.23#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:22.29#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:22.29#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:22.29#ibcon#enter wrdev, iclass 34, count 2 2006.229.21:01:22.29#ibcon#first serial, iclass 34, count 2 2006.229.21:01:22.29#ibcon#enter sib2, iclass 34, count 2 2006.229.21:01:22.29#ibcon#flushed, iclass 34, count 2 2006.229.21:01:22.29#ibcon#about to write, iclass 34, count 2 2006.229.21:01:22.29#ibcon#wrote, iclass 34, count 2 2006.229.21:01:22.29#ibcon#about to read 3, iclass 34, count 2 2006.229.21:01:22.31#ibcon#read 3, iclass 34, count 2 2006.229.21:01:22.31#ibcon#about to read 4, iclass 34, count 2 2006.229.21:01:22.31#ibcon#read 4, iclass 34, count 2 2006.229.21:01:22.31#ibcon#about to read 5, iclass 34, count 2 2006.229.21:01:22.31#ibcon#read 5, iclass 34, count 2 2006.229.21:01:22.31#ibcon#about to read 6, iclass 34, count 2 2006.229.21:01:22.31#ibcon#read 6, iclass 34, count 2 2006.229.21:01:22.31#ibcon#end of sib2, iclass 34, count 2 2006.229.21:01:22.31#ibcon#*mode == 0, iclass 34, count 2 2006.229.21:01:22.31#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.21:01:22.31#ibcon#[25=AT07-05\r\n] 2006.229.21:01:22.31#ibcon#*before write, iclass 34, count 2 2006.229.21:01:22.31#ibcon#enter sib2, iclass 34, count 2 2006.229.21:01:22.31#ibcon#flushed, iclass 34, count 2 2006.229.21:01:22.31#ibcon#about to write, iclass 34, count 2 2006.229.21:01:22.31#ibcon#wrote, iclass 34, count 2 2006.229.21:01:22.31#ibcon#about to read 3, iclass 34, count 2 2006.229.21:01:22.34#ibcon#read 3, iclass 34, count 2 2006.229.21:01:22.34#ibcon#about to read 4, iclass 34, count 2 2006.229.21:01:22.34#ibcon#read 4, iclass 34, count 2 2006.229.21:01:22.34#ibcon#about to read 5, iclass 34, count 2 2006.229.21:01:22.34#ibcon#read 5, iclass 34, count 2 2006.229.21:01:22.34#ibcon#about to read 6, iclass 34, count 2 2006.229.21:01:22.34#ibcon#read 6, iclass 34, count 2 2006.229.21:01:22.34#ibcon#end of sib2, iclass 34, count 2 2006.229.21:01:22.34#ibcon#*after write, iclass 34, count 2 2006.229.21:01:22.34#ibcon#*before return 0, iclass 34, count 2 2006.229.21:01:22.34#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:22.34#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:22.34#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.21:01:22.34#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:22.34#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:22.46#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:22.46#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:22.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.21:01:22.46#ibcon#first serial, iclass 34, count 0 2006.229.21:01:22.46#ibcon#enter sib2, iclass 34, count 0 2006.229.21:01:22.46#ibcon#flushed, iclass 34, count 0 2006.229.21:01:22.46#ibcon#about to write, iclass 34, count 0 2006.229.21:01:22.46#ibcon#wrote, iclass 34, count 0 2006.229.21:01:22.46#ibcon#about to read 3, iclass 34, count 0 2006.229.21:01:22.48#ibcon#read 3, iclass 34, count 0 2006.229.21:01:22.48#ibcon#about to read 4, iclass 34, count 0 2006.229.21:01:22.48#ibcon#read 4, iclass 34, count 0 2006.229.21:01:22.48#ibcon#about to read 5, iclass 34, count 0 2006.229.21:01:22.48#ibcon#read 5, iclass 34, count 0 2006.229.21:01:22.48#ibcon#about to read 6, iclass 34, count 0 2006.229.21:01:22.48#ibcon#read 6, iclass 34, count 0 2006.229.21:01:22.48#ibcon#end of sib2, iclass 34, count 0 2006.229.21:01:22.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.21:01:22.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.21:01:22.48#ibcon#[25=USB\r\n] 2006.229.21:01:22.48#ibcon#*before write, iclass 34, count 0 2006.229.21:01:22.48#ibcon#enter sib2, iclass 34, count 0 2006.229.21:01:22.48#ibcon#flushed, iclass 34, count 0 2006.229.21:01:22.48#ibcon#about to write, iclass 34, count 0 2006.229.21:01:22.48#ibcon#wrote, iclass 34, count 0 2006.229.21:01:22.48#ibcon#about to read 3, iclass 34, count 0 2006.229.21:01:22.51#ibcon#read 3, iclass 34, count 0 2006.229.21:01:22.51#ibcon#about to read 4, iclass 34, count 0 2006.229.21:01:22.51#ibcon#read 4, iclass 34, count 0 2006.229.21:01:22.51#ibcon#about to read 5, iclass 34, count 0 2006.229.21:01:22.51#ibcon#read 5, iclass 34, count 0 2006.229.21:01:22.51#ibcon#about to read 6, iclass 34, count 0 2006.229.21:01:22.51#ibcon#read 6, iclass 34, count 0 2006.229.21:01:22.51#ibcon#end of sib2, iclass 34, count 0 2006.229.21:01:22.51#ibcon#*after write, iclass 34, count 0 2006.229.21:01:22.51#ibcon#*before return 0, iclass 34, count 0 2006.229.21:01:22.51#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:22.51#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:22.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.21:01:22.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.21:01:22.51$vck44/valo=8,884.99 2006.229.21:01:22.51#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.21:01:22.51#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.21:01:22.51#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:22.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:22.51#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:22.51#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:22.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:01:22.51#ibcon#first serial, iclass 36, count 0 2006.229.21:01:22.51#ibcon#enter sib2, iclass 36, count 0 2006.229.21:01:22.51#ibcon#flushed, iclass 36, count 0 2006.229.21:01:22.51#ibcon#about to write, iclass 36, count 0 2006.229.21:01:22.51#ibcon#wrote, iclass 36, count 0 2006.229.21:01:22.51#ibcon#about to read 3, iclass 36, count 0 2006.229.21:01:22.53#ibcon#read 3, iclass 36, count 0 2006.229.21:01:22.53#ibcon#about to read 4, iclass 36, count 0 2006.229.21:01:22.53#ibcon#read 4, iclass 36, count 0 2006.229.21:01:22.53#ibcon#about to read 5, iclass 36, count 0 2006.229.21:01:22.53#ibcon#read 5, iclass 36, count 0 2006.229.21:01:22.53#ibcon#about to read 6, iclass 36, count 0 2006.229.21:01:22.53#ibcon#read 6, iclass 36, count 0 2006.229.21:01:22.53#ibcon#end of sib2, iclass 36, count 0 2006.229.21:01:22.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:01:22.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:01:22.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:01:22.53#ibcon#*before write, iclass 36, count 0 2006.229.21:01:22.53#ibcon#enter sib2, iclass 36, count 0 2006.229.21:01:22.53#ibcon#flushed, iclass 36, count 0 2006.229.21:01:22.53#ibcon#about to write, iclass 36, count 0 2006.229.21:01:22.53#ibcon#wrote, iclass 36, count 0 2006.229.21:01:22.53#ibcon#about to read 3, iclass 36, count 0 2006.229.21:01:22.57#ibcon#read 3, iclass 36, count 0 2006.229.21:01:22.57#ibcon#about to read 4, iclass 36, count 0 2006.229.21:01:22.57#ibcon#read 4, iclass 36, count 0 2006.229.21:01:22.57#ibcon#about to read 5, iclass 36, count 0 2006.229.21:01:22.57#ibcon#read 5, iclass 36, count 0 2006.229.21:01:22.57#ibcon#about to read 6, iclass 36, count 0 2006.229.21:01:22.57#ibcon#read 6, iclass 36, count 0 2006.229.21:01:22.57#ibcon#end of sib2, iclass 36, count 0 2006.229.21:01:22.57#ibcon#*after write, iclass 36, count 0 2006.229.21:01:22.57#ibcon#*before return 0, iclass 36, count 0 2006.229.21:01:22.57#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:22.57#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:22.57#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:01:22.57#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:01:22.57$vck44/va=8,6 2006.229.21:01:22.57#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.21:01:22.57#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.21:01:22.57#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:22.57#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:01:22.63#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:01:22.63#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:01:22.63#ibcon#enter wrdev, iclass 38, count 2 2006.229.21:01:22.63#ibcon#first serial, iclass 38, count 2 2006.229.21:01:22.63#ibcon#enter sib2, iclass 38, count 2 2006.229.21:01:22.63#ibcon#flushed, iclass 38, count 2 2006.229.21:01:22.63#ibcon#about to write, iclass 38, count 2 2006.229.21:01:22.63#ibcon#wrote, iclass 38, count 2 2006.229.21:01:22.63#ibcon#about to read 3, iclass 38, count 2 2006.229.21:01:22.65#ibcon#read 3, iclass 38, count 2 2006.229.21:01:22.65#ibcon#about to read 4, iclass 38, count 2 2006.229.21:01:22.65#ibcon#read 4, iclass 38, count 2 2006.229.21:01:22.65#ibcon#about to read 5, iclass 38, count 2 2006.229.21:01:22.65#ibcon#read 5, iclass 38, count 2 2006.229.21:01:22.65#ibcon#about to read 6, iclass 38, count 2 2006.229.21:01:22.65#ibcon#read 6, iclass 38, count 2 2006.229.21:01:22.65#ibcon#end of sib2, iclass 38, count 2 2006.229.21:01:22.65#ibcon#*mode == 0, iclass 38, count 2 2006.229.21:01:22.65#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.21:01:22.65#ibcon#[25=AT08-06\r\n] 2006.229.21:01:22.65#ibcon#*before write, iclass 38, count 2 2006.229.21:01:22.65#ibcon#enter sib2, iclass 38, count 2 2006.229.21:01:22.65#ibcon#flushed, iclass 38, count 2 2006.229.21:01:22.65#ibcon#about to write, iclass 38, count 2 2006.229.21:01:22.65#ibcon#wrote, iclass 38, count 2 2006.229.21:01:22.65#ibcon#about to read 3, iclass 38, count 2 2006.229.21:01:22.68#ibcon#read 3, iclass 38, count 2 2006.229.21:01:22.68#ibcon#about to read 4, iclass 38, count 2 2006.229.21:01:22.68#ibcon#read 4, iclass 38, count 2 2006.229.21:01:22.68#ibcon#about to read 5, iclass 38, count 2 2006.229.21:01:22.68#ibcon#read 5, iclass 38, count 2 2006.229.21:01:22.68#ibcon#about to read 6, iclass 38, count 2 2006.229.21:01:22.68#ibcon#read 6, iclass 38, count 2 2006.229.21:01:22.68#ibcon#end of sib2, iclass 38, count 2 2006.229.21:01:22.68#ibcon#*after write, iclass 38, count 2 2006.229.21:01:22.68#ibcon#*before return 0, iclass 38, count 2 2006.229.21:01:22.68#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:01:22.68#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:01:22.68#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.21:01:22.68#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:22.68#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:01:22.80#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:01:22.80#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:01:22.80#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:01:22.80#ibcon#first serial, iclass 38, count 0 2006.229.21:01:22.80#ibcon#enter sib2, iclass 38, count 0 2006.229.21:01:22.80#ibcon#flushed, iclass 38, count 0 2006.229.21:01:22.80#ibcon#about to write, iclass 38, count 0 2006.229.21:01:22.80#ibcon#wrote, iclass 38, count 0 2006.229.21:01:22.80#ibcon#about to read 3, iclass 38, count 0 2006.229.21:01:22.82#ibcon#read 3, iclass 38, count 0 2006.229.21:01:22.82#ibcon#about to read 4, iclass 38, count 0 2006.229.21:01:22.82#ibcon#read 4, iclass 38, count 0 2006.229.21:01:22.82#ibcon#about to read 5, iclass 38, count 0 2006.229.21:01:22.82#ibcon#read 5, iclass 38, count 0 2006.229.21:01:22.82#ibcon#about to read 6, iclass 38, count 0 2006.229.21:01:22.82#ibcon#read 6, iclass 38, count 0 2006.229.21:01:22.82#ibcon#end of sib2, iclass 38, count 0 2006.229.21:01:22.82#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:01:22.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:01:22.82#ibcon#[25=USB\r\n] 2006.229.21:01:22.82#ibcon#*before write, iclass 38, count 0 2006.229.21:01:22.82#ibcon#enter sib2, iclass 38, count 0 2006.229.21:01:22.82#ibcon#flushed, iclass 38, count 0 2006.229.21:01:22.82#ibcon#about to write, iclass 38, count 0 2006.229.21:01:22.82#ibcon#wrote, iclass 38, count 0 2006.229.21:01:22.82#ibcon#about to read 3, iclass 38, count 0 2006.229.21:01:22.85#ibcon#read 3, iclass 38, count 0 2006.229.21:01:22.85#ibcon#about to read 4, iclass 38, count 0 2006.229.21:01:22.85#ibcon#read 4, iclass 38, count 0 2006.229.21:01:22.85#ibcon#about to read 5, iclass 38, count 0 2006.229.21:01:22.85#ibcon#read 5, iclass 38, count 0 2006.229.21:01:22.85#ibcon#about to read 6, iclass 38, count 0 2006.229.21:01:22.85#ibcon#read 6, iclass 38, count 0 2006.229.21:01:22.85#ibcon#end of sib2, iclass 38, count 0 2006.229.21:01:22.85#ibcon#*after write, iclass 38, count 0 2006.229.21:01:22.85#ibcon#*before return 0, iclass 38, count 0 2006.229.21:01:22.85#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:01:22.85#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:01:22.85#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:01:22.85#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:01:22.85$vck44/vblo=1,629.99 2006.229.21:01:22.85#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.21:01:22.85#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.21:01:22.85#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:22.85#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:01:22.85#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:01:22.85#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:01:22.85#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:01:22.85#ibcon#first serial, iclass 40, count 0 2006.229.21:01:22.85#ibcon#enter sib2, iclass 40, count 0 2006.229.21:01:22.85#ibcon#flushed, iclass 40, count 0 2006.229.21:01:22.85#ibcon#about to write, iclass 40, count 0 2006.229.21:01:22.85#ibcon#wrote, iclass 40, count 0 2006.229.21:01:22.85#ibcon#about to read 3, iclass 40, count 0 2006.229.21:01:22.87#ibcon#read 3, iclass 40, count 0 2006.229.21:01:22.87#ibcon#about to read 4, iclass 40, count 0 2006.229.21:01:22.87#ibcon#read 4, iclass 40, count 0 2006.229.21:01:22.87#ibcon#about to read 5, iclass 40, count 0 2006.229.21:01:22.87#ibcon#read 5, iclass 40, count 0 2006.229.21:01:22.87#ibcon#about to read 6, iclass 40, count 0 2006.229.21:01:22.87#ibcon#read 6, iclass 40, count 0 2006.229.21:01:22.87#ibcon#end of sib2, iclass 40, count 0 2006.229.21:01:22.87#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:01:22.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:01:22.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:01:22.87#ibcon#*before write, iclass 40, count 0 2006.229.21:01:22.87#ibcon#enter sib2, iclass 40, count 0 2006.229.21:01:22.87#ibcon#flushed, iclass 40, count 0 2006.229.21:01:22.87#ibcon#about to write, iclass 40, count 0 2006.229.21:01:22.87#ibcon#wrote, iclass 40, count 0 2006.229.21:01:22.87#ibcon#about to read 3, iclass 40, count 0 2006.229.21:01:22.91#ibcon#read 3, iclass 40, count 0 2006.229.21:01:22.91#ibcon#about to read 4, iclass 40, count 0 2006.229.21:01:22.91#ibcon#read 4, iclass 40, count 0 2006.229.21:01:22.91#ibcon#about to read 5, iclass 40, count 0 2006.229.21:01:22.91#ibcon#read 5, iclass 40, count 0 2006.229.21:01:22.91#ibcon#about to read 6, iclass 40, count 0 2006.229.21:01:22.91#ibcon#read 6, iclass 40, count 0 2006.229.21:01:22.91#ibcon#end of sib2, iclass 40, count 0 2006.229.21:01:22.91#ibcon#*after write, iclass 40, count 0 2006.229.21:01:22.91#ibcon#*before return 0, iclass 40, count 0 2006.229.21:01:22.91#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:01:22.91#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:01:22.91#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:01:22.91#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:01:22.91$vck44/vb=1,4 2006.229.21:01:22.91#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.21:01:22.91#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.21:01:22.91#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:22.91#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:01:22.91#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:01:22.91#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:01:22.91#ibcon#enter wrdev, iclass 4, count 2 2006.229.21:01:22.91#ibcon#first serial, iclass 4, count 2 2006.229.21:01:22.91#ibcon#enter sib2, iclass 4, count 2 2006.229.21:01:22.91#ibcon#flushed, iclass 4, count 2 2006.229.21:01:22.91#ibcon#about to write, iclass 4, count 2 2006.229.21:01:22.91#ibcon#wrote, iclass 4, count 2 2006.229.21:01:22.91#ibcon#about to read 3, iclass 4, count 2 2006.229.21:01:22.93#ibcon#read 3, iclass 4, count 2 2006.229.21:01:22.93#ibcon#about to read 4, iclass 4, count 2 2006.229.21:01:22.93#ibcon#read 4, iclass 4, count 2 2006.229.21:01:22.93#ibcon#about to read 5, iclass 4, count 2 2006.229.21:01:22.93#ibcon#read 5, iclass 4, count 2 2006.229.21:01:22.93#ibcon#about to read 6, iclass 4, count 2 2006.229.21:01:22.93#ibcon#read 6, iclass 4, count 2 2006.229.21:01:22.93#ibcon#end of sib2, iclass 4, count 2 2006.229.21:01:22.93#ibcon#*mode == 0, iclass 4, count 2 2006.229.21:01:22.93#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.21:01:22.93#ibcon#[27=AT01-04\r\n] 2006.229.21:01:22.93#ibcon#*before write, iclass 4, count 2 2006.229.21:01:22.93#ibcon#enter sib2, iclass 4, count 2 2006.229.21:01:22.93#ibcon#flushed, iclass 4, count 2 2006.229.21:01:22.93#ibcon#about to write, iclass 4, count 2 2006.229.21:01:22.93#ibcon#wrote, iclass 4, count 2 2006.229.21:01:22.93#ibcon#about to read 3, iclass 4, count 2 2006.229.21:01:22.96#ibcon#read 3, iclass 4, count 2 2006.229.21:01:22.96#ibcon#about to read 4, iclass 4, count 2 2006.229.21:01:22.96#ibcon#read 4, iclass 4, count 2 2006.229.21:01:22.96#ibcon#about to read 5, iclass 4, count 2 2006.229.21:01:22.96#ibcon#read 5, iclass 4, count 2 2006.229.21:01:22.96#ibcon#about to read 6, iclass 4, count 2 2006.229.21:01:22.96#ibcon#read 6, iclass 4, count 2 2006.229.21:01:22.96#ibcon#end of sib2, iclass 4, count 2 2006.229.21:01:22.96#ibcon#*after write, iclass 4, count 2 2006.229.21:01:22.96#ibcon#*before return 0, iclass 4, count 2 2006.229.21:01:22.96#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:01:22.96#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:01:22.96#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.21:01:22.96#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:22.96#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:01:23.08#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:01:23.08#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:01:23.08#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:01:23.08#ibcon#first serial, iclass 4, count 0 2006.229.21:01:23.08#ibcon#enter sib2, iclass 4, count 0 2006.229.21:01:23.08#ibcon#flushed, iclass 4, count 0 2006.229.21:01:23.08#ibcon#about to write, iclass 4, count 0 2006.229.21:01:23.08#ibcon#wrote, iclass 4, count 0 2006.229.21:01:23.08#ibcon#about to read 3, iclass 4, count 0 2006.229.21:01:23.10#ibcon#read 3, iclass 4, count 0 2006.229.21:01:23.10#ibcon#about to read 4, iclass 4, count 0 2006.229.21:01:23.10#ibcon#read 4, iclass 4, count 0 2006.229.21:01:23.10#ibcon#about to read 5, iclass 4, count 0 2006.229.21:01:23.10#ibcon#read 5, iclass 4, count 0 2006.229.21:01:23.10#ibcon#about to read 6, iclass 4, count 0 2006.229.21:01:23.10#ibcon#read 6, iclass 4, count 0 2006.229.21:01:23.10#ibcon#end of sib2, iclass 4, count 0 2006.229.21:01:23.10#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:01:23.10#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:01:23.10#ibcon#[27=USB\r\n] 2006.229.21:01:23.10#ibcon#*before write, iclass 4, count 0 2006.229.21:01:23.10#ibcon#enter sib2, iclass 4, count 0 2006.229.21:01:23.10#ibcon#flushed, iclass 4, count 0 2006.229.21:01:23.10#ibcon#about to write, iclass 4, count 0 2006.229.21:01:23.10#ibcon#wrote, iclass 4, count 0 2006.229.21:01:23.10#ibcon#about to read 3, iclass 4, count 0 2006.229.21:01:23.13#ibcon#read 3, iclass 4, count 0 2006.229.21:01:23.13#ibcon#about to read 4, iclass 4, count 0 2006.229.21:01:23.13#ibcon#read 4, iclass 4, count 0 2006.229.21:01:23.13#ibcon#about to read 5, iclass 4, count 0 2006.229.21:01:23.13#ibcon#read 5, iclass 4, count 0 2006.229.21:01:23.13#ibcon#about to read 6, iclass 4, count 0 2006.229.21:01:23.13#ibcon#read 6, iclass 4, count 0 2006.229.21:01:23.13#ibcon#end of sib2, iclass 4, count 0 2006.229.21:01:23.13#ibcon#*after write, iclass 4, count 0 2006.229.21:01:23.13#ibcon#*before return 0, iclass 4, count 0 2006.229.21:01:23.13#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:01:23.13#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:01:23.13#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:01:23.13#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:01:23.13$vck44/vblo=2,634.99 2006.229.21:01:23.13#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.21:01:23.13#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.21:01:23.13#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:23.13#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:23.13#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:23.13#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:23.13#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:01:23.13#ibcon#first serial, iclass 6, count 0 2006.229.21:01:23.13#ibcon#enter sib2, iclass 6, count 0 2006.229.21:01:23.13#ibcon#flushed, iclass 6, count 0 2006.229.21:01:23.13#ibcon#about to write, iclass 6, count 0 2006.229.21:01:23.13#ibcon#wrote, iclass 6, count 0 2006.229.21:01:23.13#ibcon#about to read 3, iclass 6, count 0 2006.229.21:01:23.15#ibcon#read 3, iclass 6, count 0 2006.229.21:01:23.15#ibcon#about to read 4, iclass 6, count 0 2006.229.21:01:23.15#ibcon#read 4, iclass 6, count 0 2006.229.21:01:23.15#ibcon#about to read 5, iclass 6, count 0 2006.229.21:01:23.15#ibcon#read 5, iclass 6, count 0 2006.229.21:01:23.15#ibcon#about to read 6, iclass 6, count 0 2006.229.21:01:23.15#ibcon#read 6, iclass 6, count 0 2006.229.21:01:23.15#ibcon#end of sib2, iclass 6, count 0 2006.229.21:01:23.15#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:01:23.15#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:01:23.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:01:23.15#ibcon#*before write, iclass 6, count 0 2006.229.21:01:23.15#ibcon#enter sib2, iclass 6, count 0 2006.229.21:01:23.15#ibcon#flushed, iclass 6, count 0 2006.229.21:01:23.15#ibcon#about to write, iclass 6, count 0 2006.229.21:01:23.15#ibcon#wrote, iclass 6, count 0 2006.229.21:01:23.15#ibcon#about to read 3, iclass 6, count 0 2006.229.21:01:23.19#ibcon#read 3, iclass 6, count 0 2006.229.21:01:23.19#ibcon#about to read 4, iclass 6, count 0 2006.229.21:01:23.19#ibcon#read 4, iclass 6, count 0 2006.229.21:01:23.19#ibcon#about to read 5, iclass 6, count 0 2006.229.21:01:23.19#ibcon#read 5, iclass 6, count 0 2006.229.21:01:23.19#ibcon#about to read 6, iclass 6, count 0 2006.229.21:01:23.19#ibcon#read 6, iclass 6, count 0 2006.229.21:01:23.19#ibcon#end of sib2, iclass 6, count 0 2006.229.21:01:23.19#ibcon#*after write, iclass 6, count 0 2006.229.21:01:23.19#ibcon#*before return 0, iclass 6, count 0 2006.229.21:01:23.19#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:23.19#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:01:23.19#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:01:23.19#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:01:23.19$vck44/vb=2,4 2006.229.21:01:23.19#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.21:01:23.19#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.21:01:23.19#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:23.19#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:23.25#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:23.25#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:23.25#ibcon#enter wrdev, iclass 10, count 2 2006.229.21:01:23.25#ibcon#first serial, iclass 10, count 2 2006.229.21:01:23.25#ibcon#enter sib2, iclass 10, count 2 2006.229.21:01:23.25#ibcon#flushed, iclass 10, count 2 2006.229.21:01:23.25#ibcon#about to write, iclass 10, count 2 2006.229.21:01:23.25#ibcon#wrote, iclass 10, count 2 2006.229.21:01:23.25#ibcon#about to read 3, iclass 10, count 2 2006.229.21:01:23.27#ibcon#read 3, iclass 10, count 2 2006.229.21:01:23.27#ibcon#about to read 4, iclass 10, count 2 2006.229.21:01:23.27#ibcon#read 4, iclass 10, count 2 2006.229.21:01:23.27#ibcon#about to read 5, iclass 10, count 2 2006.229.21:01:23.27#ibcon#read 5, iclass 10, count 2 2006.229.21:01:23.27#ibcon#about to read 6, iclass 10, count 2 2006.229.21:01:23.27#ibcon#read 6, iclass 10, count 2 2006.229.21:01:23.27#ibcon#end of sib2, iclass 10, count 2 2006.229.21:01:23.27#ibcon#*mode == 0, iclass 10, count 2 2006.229.21:01:23.27#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.21:01:23.27#ibcon#[27=AT02-04\r\n] 2006.229.21:01:23.27#ibcon#*before write, iclass 10, count 2 2006.229.21:01:23.27#ibcon#enter sib2, iclass 10, count 2 2006.229.21:01:23.27#ibcon#flushed, iclass 10, count 2 2006.229.21:01:23.27#ibcon#about to write, iclass 10, count 2 2006.229.21:01:23.27#ibcon#wrote, iclass 10, count 2 2006.229.21:01:23.27#ibcon#about to read 3, iclass 10, count 2 2006.229.21:01:23.30#ibcon#read 3, iclass 10, count 2 2006.229.21:01:23.30#ibcon#about to read 4, iclass 10, count 2 2006.229.21:01:23.30#ibcon#read 4, iclass 10, count 2 2006.229.21:01:23.30#ibcon#about to read 5, iclass 10, count 2 2006.229.21:01:23.30#ibcon#read 5, iclass 10, count 2 2006.229.21:01:23.30#ibcon#about to read 6, iclass 10, count 2 2006.229.21:01:23.30#ibcon#read 6, iclass 10, count 2 2006.229.21:01:23.30#ibcon#end of sib2, iclass 10, count 2 2006.229.21:01:23.30#ibcon#*after write, iclass 10, count 2 2006.229.21:01:23.30#ibcon#*before return 0, iclass 10, count 2 2006.229.21:01:23.30#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:23.30#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:01:23.30#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.21:01:23.30#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:23.30#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:23.42#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:23.42#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:23.42#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:01:23.42#ibcon#first serial, iclass 10, count 0 2006.229.21:01:23.42#ibcon#enter sib2, iclass 10, count 0 2006.229.21:01:23.42#ibcon#flushed, iclass 10, count 0 2006.229.21:01:23.42#ibcon#about to write, iclass 10, count 0 2006.229.21:01:23.42#ibcon#wrote, iclass 10, count 0 2006.229.21:01:23.42#ibcon#about to read 3, iclass 10, count 0 2006.229.21:01:23.44#ibcon#read 3, iclass 10, count 0 2006.229.21:01:23.44#ibcon#about to read 4, iclass 10, count 0 2006.229.21:01:23.44#ibcon#read 4, iclass 10, count 0 2006.229.21:01:23.44#ibcon#about to read 5, iclass 10, count 0 2006.229.21:01:23.44#ibcon#read 5, iclass 10, count 0 2006.229.21:01:23.44#ibcon#about to read 6, iclass 10, count 0 2006.229.21:01:23.44#ibcon#read 6, iclass 10, count 0 2006.229.21:01:23.44#ibcon#end of sib2, iclass 10, count 0 2006.229.21:01:23.44#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:01:23.44#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:01:23.44#ibcon#[27=USB\r\n] 2006.229.21:01:23.44#ibcon#*before write, iclass 10, count 0 2006.229.21:01:23.44#ibcon#enter sib2, iclass 10, count 0 2006.229.21:01:23.44#ibcon#flushed, iclass 10, count 0 2006.229.21:01:23.44#ibcon#about to write, iclass 10, count 0 2006.229.21:01:23.44#ibcon#wrote, iclass 10, count 0 2006.229.21:01:23.44#ibcon#about to read 3, iclass 10, count 0 2006.229.21:01:23.47#ibcon#read 3, iclass 10, count 0 2006.229.21:01:23.47#ibcon#about to read 4, iclass 10, count 0 2006.229.21:01:23.47#ibcon#read 4, iclass 10, count 0 2006.229.21:01:23.47#ibcon#about to read 5, iclass 10, count 0 2006.229.21:01:23.47#ibcon#read 5, iclass 10, count 0 2006.229.21:01:23.47#ibcon#about to read 6, iclass 10, count 0 2006.229.21:01:23.47#ibcon#read 6, iclass 10, count 0 2006.229.21:01:23.47#ibcon#end of sib2, iclass 10, count 0 2006.229.21:01:23.47#ibcon#*after write, iclass 10, count 0 2006.229.21:01:23.47#ibcon#*before return 0, iclass 10, count 0 2006.229.21:01:23.47#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:23.47#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:01:23.47#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:01:23.47#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:01:23.47$vck44/vblo=3,649.99 2006.229.21:01:23.47#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.21:01:23.47#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.21:01:23.47#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:23.47#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:23.47#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:23.47#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:23.47#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:01:23.47#ibcon#first serial, iclass 12, count 0 2006.229.21:01:23.47#ibcon#enter sib2, iclass 12, count 0 2006.229.21:01:23.47#ibcon#flushed, iclass 12, count 0 2006.229.21:01:23.47#ibcon#about to write, iclass 12, count 0 2006.229.21:01:23.47#ibcon#wrote, iclass 12, count 0 2006.229.21:01:23.47#ibcon#about to read 3, iclass 12, count 0 2006.229.21:01:23.49#ibcon#read 3, iclass 12, count 0 2006.229.21:01:23.49#ibcon#about to read 4, iclass 12, count 0 2006.229.21:01:23.49#ibcon#read 4, iclass 12, count 0 2006.229.21:01:23.49#ibcon#about to read 5, iclass 12, count 0 2006.229.21:01:23.49#ibcon#read 5, iclass 12, count 0 2006.229.21:01:23.49#ibcon#about to read 6, iclass 12, count 0 2006.229.21:01:23.49#ibcon#read 6, iclass 12, count 0 2006.229.21:01:23.49#ibcon#end of sib2, iclass 12, count 0 2006.229.21:01:23.49#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:01:23.49#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:01:23.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:01:23.49#ibcon#*before write, iclass 12, count 0 2006.229.21:01:23.49#ibcon#enter sib2, iclass 12, count 0 2006.229.21:01:23.49#ibcon#flushed, iclass 12, count 0 2006.229.21:01:23.49#ibcon#about to write, iclass 12, count 0 2006.229.21:01:23.49#ibcon#wrote, iclass 12, count 0 2006.229.21:01:23.49#ibcon#about to read 3, iclass 12, count 0 2006.229.21:01:23.53#ibcon#read 3, iclass 12, count 0 2006.229.21:01:23.53#ibcon#about to read 4, iclass 12, count 0 2006.229.21:01:23.53#ibcon#read 4, iclass 12, count 0 2006.229.21:01:23.53#ibcon#about to read 5, iclass 12, count 0 2006.229.21:01:23.53#ibcon#read 5, iclass 12, count 0 2006.229.21:01:23.53#ibcon#about to read 6, iclass 12, count 0 2006.229.21:01:23.53#ibcon#read 6, iclass 12, count 0 2006.229.21:01:23.53#ibcon#end of sib2, iclass 12, count 0 2006.229.21:01:23.53#ibcon#*after write, iclass 12, count 0 2006.229.21:01:23.53#ibcon#*before return 0, iclass 12, count 0 2006.229.21:01:23.53#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:23.53#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:01:23.53#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:01:23.53#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:01:23.53$vck44/vb=3,4 2006.229.21:01:23.53#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.21:01:23.53#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.21:01:23.53#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:23.53#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:23.59#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:23.59#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:23.59#ibcon#enter wrdev, iclass 14, count 2 2006.229.21:01:23.59#ibcon#first serial, iclass 14, count 2 2006.229.21:01:23.59#ibcon#enter sib2, iclass 14, count 2 2006.229.21:01:23.59#ibcon#flushed, iclass 14, count 2 2006.229.21:01:23.59#ibcon#about to write, iclass 14, count 2 2006.229.21:01:23.59#ibcon#wrote, iclass 14, count 2 2006.229.21:01:23.59#ibcon#about to read 3, iclass 14, count 2 2006.229.21:01:23.61#ibcon#read 3, iclass 14, count 2 2006.229.21:01:23.61#ibcon#about to read 4, iclass 14, count 2 2006.229.21:01:23.61#ibcon#read 4, iclass 14, count 2 2006.229.21:01:23.61#ibcon#about to read 5, iclass 14, count 2 2006.229.21:01:23.61#ibcon#read 5, iclass 14, count 2 2006.229.21:01:23.61#ibcon#about to read 6, iclass 14, count 2 2006.229.21:01:23.61#ibcon#read 6, iclass 14, count 2 2006.229.21:01:23.61#ibcon#end of sib2, iclass 14, count 2 2006.229.21:01:23.61#ibcon#*mode == 0, iclass 14, count 2 2006.229.21:01:23.61#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.21:01:23.61#ibcon#[27=AT03-04\r\n] 2006.229.21:01:23.61#ibcon#*before write, iclass 14, count 2 2006.229.21:01:23.61#ibcon#enter sib2, iclass 14, count 2 2006.229.21:01:23.61#ibcon#flushed, iclass 14, count 2 2006.229.21:01:23.61#ibcon#about to write, iclass 14, count 2 2006.229.21:01:23.61#ibcon#wrote, iclass 14, count 2 2006.229.21:01:23.61#ibcon#about to read 3, iclass 14, count 2 2006.229.21:01:23.64#ibcon#read 3, iclass 14, count 2 2006.229.21:01:23.64#ibcon#about to read 4, iclass 14, count 2 2006.229.21:01:23.64#ibcon#read 4, iclass 14, count 2 2006.229.21:01:23.64#ibcon#about to read 5, iclass 14, count 2 2006.229.21:01:23.64#ibcon#read 5, iclass 14, count 2 2006.229.21:01:23.64#ibcon#about to read 6, iclass 14, count 2 2006.229.21:01:23.64#ibcon#read 6, iclass 14, count 2 2006.229.21:01:23.64#ibcon#end of sib2, iclass 14, count 2 2006.229.21:01:23.64#ibcon#*after write, iclass 14, count 2 2006.229.21:01:23.64#ibcon#*before return 0, iclass 14, count 2 2006.229.21:01:23.64#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:23.64#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:01:23.64#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.21:01:23.64#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:23.64#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:23.76#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:23.76#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:23.76#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:01:23.76#ibcon#first serial, iclass 14, count 0 2006.229.21:01:23.76#ibcon#enter sib2, iclass 14, count 0 2006.229.21:01:23.76#ibcon#flushed, iclass 14, count 0 2006.229.21:01:23.76#ibcon#about to write, iclass 14, count 0 2006.229.21:01:23.76#ibcon#wrote, iclass 14, count 0 2006.229.21:01:23.76#ibcon#about to read 3, iclass 14, count 0 2006.229.21:01:23.78#ibcon#read 3, iclass 14, count 0 2006.229.21:01:23.78#ibcon#about to read 4, iclass 14, count 0 2006.229.21:01:23.78#ibcon#read 4, iclass 14, count 0 2006.229.21:01:23.78#ibcon#about to read 5, iclass 14, count 0 2006.229.21:01:23.78#ibcon#read 5, iclass 14, count 0 2006.229.21:01:23.78#ibcon#about to read 6, iclass 14, count 0 2006.229.21:01:23.78#ibcon#read 6, iclass 14, count 0 2006.229.21:01:23.78#ibcon#end of sib2, iclass 14, count 0 2006.229.21:01:23.78#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:01:23.78#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:01:23.78#ibcon#[27=USB\r\n] 2006.229.21:01:23.78#ibcon#*before write, iclass 14, count 0 2006.229.21:01:23.78#ibcon#enter sib2, iclass 14, count 0 2006.229.21:01:23.78#ibcon#flushed, iclass 14, count 0 2006.229.21:01:23.78#ibcon#about to write, iclass 14, count 0 2006.229.21:01:23.78#ibcon#wrote, iclass 14, count 0 2006.229.21:01:23.78#ibcon#about to read 3, iclass 14, count 0 2006.229.21:01:23.81#ibcon#read 3, iclass 14, count 0 2006.229.21:01:23.81#ibcon#about to read 4, iclass 14, count 0 2006.229.21:01:23.81#ibcon#read 4, iclass 14, count 0 2006.229.21:01:23.81#ibcon#about to read 5, iclass 14, count 0 2006.229.21:01:23.81#ibcon#read 5, iclass 14, count 0 2006.229.21:01:23.81#ibcon#about to read 6, iclass 14, count 0 2006.229.21:01:23.81#ibcon#read 6, iclass 14, count 0 2006.229.21:01:23.81#ibcon#end of sib2, iclass 14, count 0 2006.229.21:01:23.81#ibcon#*after write, iclass 14, count 0 2006.229.21:01:23.81#ibcon#*before return 0, iclass 14, count 0 2006.229.21:01:23.81#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:23.81#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:01:23.81#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:01:23.81#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:01:23.81$vck44/vblo=4,679.99 2006.229.21:01:23.81#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.21:01:23.81#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.21:01:23.81#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:23.81#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:23.81#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:23.81#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:23.81#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:01:23.81#ibcon#first serial, iclass 16, count 0 2006.229.21:01:23.81#ibcon#enter sib2, iclass 16, count 0 2006.229.21:01:23.81#ibcon#flushed, iclass 16, count 0 2006.229.21:01:23.81#ibcon#about to write, iclass 16, count 0 2006.229.21:01:23.81#ibcon#wrote, iclass 16, count 0 2006.229.21:01:23.81#ibcon#about to read 3, iclass 16, count 0 2006.229.21:01:23.83#ibcon#read 3, iclass 16, count 0 2006.229.21:01:23.83#ibcon#about to read 4, iclass 16, count 0 2006.229.21:01:23.83#ibcon#read 4, iclass 16, count 0 2006.229.21:01:23.83#ibcon#about to read 5, iclass 16, count 0 2006.229.21:01:23.83#ibcon#read 5, iclass 16, count 0 2006.229.21:01:23.83#ibcon#about to read 6, iclass 16, count 0 2006.229.21:01:23.83#ibcon#read 6, iclass 16, count 0 2006.229.21:01:23.83#ibcon#end of sib2, iclass 16, count 0 2006.229.21:01:23.83#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:01:23.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:01:23.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:01:23.83#ibcon#*before write, iclass 16, count 0 2006.229.21:01:23.83#ibcon#enter sib2, iclass 16, count 0 2006.229.21:01:23.83#ibcon#flushed, iclass 16, count 0 2006.229.21:01:23.83#ibcon#about to write, iclass 16, count 0 2006.229.21:01:23.83#ibcon#wrote, iclass 16, count 0 2006.229.21:01:23.83#ibcon#about to read 3, iclass 16, count 0 2006.229.21:01:23.87#ibcon#read 3, iclass 16, count 0 2006.229.21:01:23.87#ibcon#about to read 4, iclass 16, count 0 2006.229.21:01:23.87#ibcon#read 4, iclass 16, count 0 2006.229.21:01:23.87#ibcon#about to read 5, iclass 16, count 0 2006.229.21:01:23.87#ibcon#read 5, iclass 16, count 0 2006.229.21:01:23.87#ibcon#about to read 6, iclass 16, count 0 2006.229.21:01:23.87#ibcon#read 6, iclass 16, count 0 2006.229.21:01:23.87#ibcon#end of sib2, iclass 16, count 0 2006.229.21:01:23.87#ibcon#*after write, iclass 16, count 0 2006.229.21:01:23.87#ibcon#*before return 0, iclass 16, count 0 2006.229.21:01:23.87#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:23.87#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:01:23.87#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:01:23.87#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:01:23.87$vck44/vb=4,4 2006.229.21:01:23.87#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.21:01:23.87#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.21:01:23.87#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:23.87#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:23.93#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:23.93#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:23.93#ibcon#enter wrdev, iclass 18, count 2 2006.229.21:01:23.93#ibcon#first serial, iclass 18, count 2 2006.229.21:01:23.93#ibcon#enter sib2, iclass 18, count 2 2006.229.21:01:23.93#ibcon#flushed, iclass 18, count 2 2006.229.21:01:23.93#ibcon#about to write, iclass 18, count 2 2006.229.21:01:23.93#ibcon#wrote, iclass 18, count 2 2006.229.21:01:23.93#ibcon#about to read 3, iclass 18, count 2 2006.229.21:01:23.95#ibcon#read 3, iclass 18, count 2 2006.229.21:01:23.95#ibcon#about to read 4, iclass 18, count 2 2006.229.21:01:23.95#ibcon#read 4, iclass 18, count 2 2006.229.21:01:23.95#ibcon#about to read 5, iclass 18, count 2 2006.229.21:01:23.95#ibcon#read 5, iclass 18, count 2 2006.229.21:01:23.95#ibcon#about to read 6, iclass 18, count 2 2006.229.21:01:23.95#ibcon#read 6, iclass 18, count 2 2006.229.21:01:23.95#ibcon#end of sib2, iclass 18, count 2 2006.229.21:01:23.95#ibcon#*mode == 0, iclass 18, count 2 2006.229.21:01:23.95#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.21:01:23.95#ibcon#[27=AT04-04\r\n] 2006.229.21:01:23.95#ibcon#*before write, iclass 18, count 2 2006.229.21:01:23.95#ibcon#enter sib2, iclass 18, count 2 2006.229.21:01:23.95#ibcon#flushed, iclass 18, count 2 2006.229.21:01:23.95#ibcon#about to write, iclass 18, count 2 2006.229.21:01:23.95#ibcon#wrote, iclass 18, count 2 2006.229.21:01:23.95#ibcon#about to read 3, iclass 18, count 2 2006.229.21:01:23.98#ibcon#read 3, iclass 18, count 2 2006.229.21:01:23.98#ibcon#about to read 4, iclass 18, count 2 2006.229.21:01:23.98#ibcon#read 4, iclass 18, count 2 2006.229.21:01:23.98#ibcon#about to read 5, iclass 18, count 2 2006.229.21:01:23.98#ibcon#read 5, iclass 18, count 2 2006.229.21:01:23.98#ibcon#about to read 6, iclass 18, count 2 2006.229.21:01:23.98#ibcon#read 6, iclass 18, count 2 2006.229.21:01:23.98#ibcon#end of sib2, iclass 18, count 2 2006.229.21:01:23.98#ibcon#*after write, iclass 18, count 2 2006.229.21:01:23.98#ibcon#*before return 0, iclass 18, count 2 2006.229.21:01:23.98#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:23.98#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:01:23.98#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.21:01:23.98#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:23.98#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:24.10#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:24.10#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:24.10#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:01:24.10#ibcon#first serial, iclass 18, count 0 2006.229.21:01:24.10#ibcon#enter sib2, iclass 18, count 0 2006.229.21:01:24.10#ibcon#flushed, iclass 18, count 0 2006.229.21:01:24.10#ibcon#about to write, iclass 18, count 0 2006.229.21:01:24.10#ibcon#wrote, iclass 18, count 0 2006.229.21:01:24.10#ibcon#about to read 3, iclass 18, count 0 2006.229.21:01:24.12#ibcon#read 3, iclass 18, count 0 2006.229.21:01:24.12#ibcon#about to read 4, iclass 18, count 0 2006.229.21:01:24.12#ibcon#read 4, iclass 18, count 0 2006.229.21:01:24.12#ibcon#about to read 5, iclass 18, count 0 2006.229.21:01:24.12#ibcon#read 5, iclass 18, count 0 2006.229.21:01:24.12#ibcon#about to read 6, iclass 18, count 0 2006.229.21:01:24.12#ibcon#read 6, iclass 18, count 0 2006.229.21:01:24.12#ibcon#end of sib2, iclass 18, count 0 2006.229.21:01:24.12#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:01:24.12#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:01:24.12#ibcon#[27=USB\r\n] 2006.229.21:01:24.12#ibcon#*before write, iclass 18, count 0 2006.229.21:01:24.12#ibcon#enter sib2, iclass 18, count 0 2006.229.21:01:24.12#ibcon#flushed, iclass 18, count 0 2006.229.21:01:24.12#ibcon#about to write, iclass 18, count 0 2006.229.21:01:24.12#ibcon#wrote, iclass 18, count 0 2006.229.21:01:24.12#ibcon#about to read 3, iclass 18, count 0 2006.229.21:01:24.15#ibcon#read 3, iclass 18, count 0 2006.229.21:01:24.15#ibcon#about to read 4, iclass 18, count 0 2006.229.21:01:24.15#ibcon#read 4, iclass 18, count 0 2006.229.21:01:24.15#ibcon#about to read 5, iclass 18, count 0 2006.229.21:01:24.15#ibcon#read 5, iclass 18, count 0 2006.229.21:01:24.15#ibcon#about to read 6, iclass 18, count 0 2006.229.21:01:24.15#ibcon#read 6, iclass 18, count 0 2006.229.21:01:24.15#ibcon#end of sib2, iclass 18, count 0 2006.229.21:01:24.15#ibcon#*after write, iclass 18, count 0 2006.229.21:01:24.15#ibcon#*before return 0, iclass 18, count 0 2006.229.21:01:24.15#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:24.15#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:01:24.15#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:01:24.15#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:01:24.15$vck44/vblo=5,709.99 2006.229.21:01:24.15#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:01:24.15#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:01:24.15#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:24.15#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:24.15#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:24.15#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:24.15#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:01:24.15#ibcon#first serial, iclass 20, count 0 2006.229.21:01:24.15#ibcon#enter sib2, iclass 20, count 0 2006.229.21:01:24.15#ibcon#flushed, iclass 20, count 0 2006.229.21:01:24.15#ibcon#about to write, iclass 20, count 0 2006.229.21:01:24.15#ibcon#wrote, iclass 20, count 0 2006.229.21:01:24.15#ibcon#about to read 3, iclass 20, count 0 2006.229.21:01:24.17#ibcon#read 3, iclass 20, count 0 2006.229.21:01:24.17#ibcon#about to read 4, iclass 20, count 0 2006.229.21:01:24.17#ibcon#read 4, iclass 20, count 0 2006.229.21:01:24.17#ibcon#about to read 5, iclass 20, count 0 2006.229.21:01:24.17#ibcon#read 5, iclass 20, count 0 2006.229.21:01:24.17#ibcon#about to read 6, iclass 20, count 0 2006.229.21:01:24.17#ibcon#read 6, iclass 20, count 0 2006.229.21:01:24.17#ibcon#end of sib2, iclass 20, count 0 2006.229.21:01:24.17#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:01:24.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:01:24.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:01:24.17#ibcon#*before write, iclass 20, count 0 2006.229.21:01:24.17#ibcon#enter sib2, iclass 20, count 0 2006.229.21:01:24.17#ibcon#flushed, iclass 20, count 0 2006.229.21:01:24.17#ibcon#about to write, iclass 20, count 0 2006.229.21:01:24.17#ibcon#wrote, iclass 20, count 0 2006.229.21:01:24.17#ibcon#about to read 3, iclass 20, count 0 2006.229.21:01:24.21#ibcon#read 3, iclass 20, count 0 2006.229.21:01:24.21#ibcon#about to read 4, iclass 20, count 0 2006.229.21:01:24.21#ibcon#read 4, iclass 20, count 0 2006.229.21:01:24.21#ibcon#about to read 5, iclass 20, count 0 2006.229.21:01:24.21#ibcon#read 5, iclass 20, count 0 2006.229.21:01:24.21#ibcon#about to read 6, iclass 20, count 0 2006.229.21:01:24.21#ibcon#read 6, iclass 20, count 0 2006.229.21:01:24.21#ibcon#end of sib2, iclass 20, count 0 2006.229.21:01:24.21#ibcon#*after write, iclass 20, count 0 2006.229.21:01:24.21#ibcon#*before return 0, iclass 20, count 0 2006.229.21:01:24.21#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:24.21#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:01:24.21#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:01:24.21#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:01:24.21$vck44/vb=5,4 2006.229.21:01:24.21#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.21:01:24.21#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.21:01:24.21#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:24.21#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:24.27#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:24.27#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:24.27#ibcon#enter wrdev, iclass 22, count 2 2006.229.21:01:24.27#ibcon#first serial, iclass 22, count 2 2006.229.21:01:24.27#ibcon#enter sib2, iclass 22, count 2 2006.229.21:01:24.27#ibcon#flushed, iclass 22, count 2 2006.229.21:01:24.27#ibcon#about to write, iclass 22, count 2 2006.229.21:01:24.27#ibcon#wrote, iclass 22, count 2 2006.229.21:01:24.27#ibcon#about to read 3, iclass 22, count 2 2006.229.21:01:24.29#ibcon#read 3, iclass 22, count 2 2006.229.21:01:24.29#ibcon#about to read 4, iclass 22, count 2 2006.229.21:01:24.29#ibcon#read 4, iclass 22, count 2 2006.229.21:01:24.29#ibcon#about to read 5, iclass 22, count 2 2006.229.21:01:24.29#ibcon#read 5, iclass 22, count 2 2006.229.21:01:24.29#ibcon#about to read 6, iclass 22, count 2 2006.229.21:01:24.29#ibcon#read 6, iclass 22, count 2 2006.229.21:01:24.29#ibcon#end of sib2, iclass 22, count 2 2006.229.21:01:24.29#ibcon#*mode == 0, iclass 22, count 2 2006.229.21:01:24.29#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.21:01:24.29#ibcon#[27=AT05-04\r\n] 2006.229.21:01:24.29#ibcon#*before write, iclass 22, count 2 2006.229.21:01:24.29#ibcon#enter sib2, iclass 22, count 2 2006.229.21:01:24.29#ibcon#flushed, iclass 22, count 2 2006.229.21:01:24.29#ibcon#about to write, iclass 22, count 2 2006.229.21:01:24.29#ibcon#wrote, iclass 22, count 2 2006.229.21:01:24.29#ibcon#about to read 3, iclass 22, count 2 2006.229.21:01:24.32#ibcon#read 3, iclass 22, count 2 2006.229.21:01:24.32#ibcon#about to read 4, iclass 22, count 2 2006.229.21:01:24.32#ibcon#read 4, iclass 22, count 2 2006.229.21:01:24.32#ibcon#about to read 5, iclass 22, count 2 2006.229.21:01:24.32#ibcon#read 5, iclass 22, count 2 2006.229.21:01:24.32#ibcon#about to read 6, iclass 22, count 2 2006.229.21:01:24.32#ibcon#read 6, iclass 22, count 2 2006.229.21:01:24.32#ibcon#end of sib2, iclass 22, count 2 2006.229.21:01:24.32#ibcon#*after write, iclass 22, count 2 2006.229.21:01:24.32#ibcon#*before return 0, iclass 22, count 2 2006.229.21:01:24.32#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:24.32#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:01:24.32#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.21:01:24.32#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:24.32#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:24.44#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:24.44#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:24.44#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:01:24.44#ibcon#first serial, iclass 22, count 0 2006.229.21:01:24.44#ibcon#enter sib2, iclass 22, count 0 2006.229.21:01:24.44#ibcon#flushed, iclass 22, count 0 2006.229.21:01:24.44#ibcon#about to write, iclass 22, count 0 2006.229.21:01:24.44#ibcon#wrote, iclass 22, count 0 2006.229.21:01:24.44#ibcon#about to read 3, iclass 22, count 0 2006.229.21:01:24.46#ibcon#read 3, iclass 22, count 0 2006.229.21:01:24.46#ibcon#about to read 4, iclass 22, count 0 2006.229.21:01:24.46#ibcon#read 4, iclass 22, count 0 2006.229.21:01:24.46#ibcon#about to read 5, iclass 22, count 0 2006.229.21:01:24.46#ibcon#read 5, iclass 22, count 0 2006.229.21:01:24.46#ibcon#about to read 6, iclass 22, count 0 2006.229.21:01:24.46#ibcon#read 6, iclass 22, count 0 2006.229.21:01:24.46#ibcon#end of sib2, iclass 22, count 0 2006.229.21:01:24.46#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:01:24.46#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:01:24.46#ibcon#[27=USB\r\n] 2006.229.21:01:24.46#ibcon#*before write, iclass 22, count 0 2006.229.21:01:24.46#ibcon#enter sib2, iclass 22, count 0 2006.229.21:01:24.46#ibcon#flushed, iclass 22, count 0 2006.229.21:01:24.46#ibcon#about to write, iclass 22, count 0 2006.229.21:01:24.46#ibcon#wrote, iclass 22, count 0 2006.229.21:01:24.46#ibcon#about to read 3, iclass 22, count 0 2006.229.21:01:24.49#ibcon#read 3, iclass 22, count 0 2006.229.21:01:24.49#ibcon#about to read 4, iclass 22, count 0 2006.229.21:01:24.49#ibcon#read 4, iclass 22, count 0 2006.229.21:01:24.49#ibcon#about to read 5, iclass 22, count 0 2006.229.21:01:24.49#ibcon#read 5, iclass 22, count 0 2006.229.21:01:24.49#ibcon#about to read 6, iclass 22, count 0 2006.229.21:01:24.49#ibcon#read 6, iclass 22, count 0 2006.229.21:01:24.49#ibcon#end of sib2, iclass 22, count 0 2006.229.21:01:24.49#ibcon#*after write, iclass 22, count 0 2006.229.21:01:24.49#ibcon#*before return 0, iclass 22, count 0 2006.229.21:01:24.49#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:24.49#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:01:24.49#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:01:24.49#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:01:24.49$vck44/vblo=6,719.99 2006.229.21:01:24.49#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.21:01:24.49#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.21:01:24.49#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:24.49#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:24.49#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:24.49#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:24.49#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:01:24.49#ibcon#first serial, iclass 24, count 0 2006.229.21:01:24.49#ibcon#enter sib2, iclass 24, count 0 2006.229.21:01:24.49#ibcon#flushed, iclass 24, count 0 2006.229.21:01:24.49#ibcon#about to write, iclass 24, count 0 2006.229.21:01:24.49#ibcon#wrote, iclass 24, count 0 2006.229.21:01:24.49#ibcon#about to read 3, iclass 24, count 0 2006.229.21:01:24.51#ibcon#read 3, iclass 24, count 0 2006.229.21:01:24.51#ibcon#about to read 4, iclass 24, count 0 2006.229.21:01:24.51#ibcon#read 4, iclass 24, count 0 2006.229.21:01:24.51#ibcon#about to read 5, iclass 24, count 0 2006.229.21:01:24.51#ibcon#read 5, iclass 24, count 0 2006.229.21:01:24.51#ibcon#about to read 6, iclass 24, count 0 2006.229.21:01:24.51#ibcon#read 6, iclass 24, count 0 2006.229.21:01:24.51#ibcon#end of sib2, iclass 24, count 0 2006.229.21:01:24.51#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:01:24.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:01:24.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:01:24.51#ibcon#*before write, iclass 24, count 0 2006.229.21:01:24.51#ibcon#enter sib2, iclass 24, count 0 2006.229.21:01:24.51#ibcon#flushed, iclass 24, count 0 2006.229.21:01:24.51#ibcon#about to write, iclass 24, count 0 2006.229.21:01:24.51#ibcon#wrote, iclass 24, count 0 2006.229.21:01:24.51#ibcon#about to read 3, iclass 24, count 0 2006.229.21:01:24.55#ibcon#read 3, iclass 24, count 0 2006.229.21:01:24.55#ibcon#about to read 4, iclass 24, count 0 2006.229.21:01:24.55#ibcon#read 4, iclass 24, count 0 2006.229.21:01:24.55#ibcon#about to read 5, iclass 24, count 0 2006.229.21:01:24.55#ibcon#read 5, iclass 24, count 0 2006.229.21:01:24.55#ibcon#about to read 6, iclass 24, count 0 2006.229.21:01:24.55#ibcon#read 6, iclass 24, count 0 2006.229.21:01:24.55#ibcon#end of sib2, iclass 24, count 0 2006.229.21:01:24.55#ibcon#*after write, iclass 24, count 0 2006.229.21:01:24.55#ibcon#*before return 0, iclass 24, count 0 2006.229.21:01:24.55#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:24.55#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:01:24.55#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:01:24.55#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:01:24.55$vck44/vb=6,4 2006.229.21:01:24.55#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.21:01:24.55#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.21:01:24.55#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:24.55#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:24.61#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:24.61#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:24.61#ibcon#enter wrdev, iclass 26, count 2 2006.229.21:01:24.61#ibcon#first serial, iclass 26, count 2 2006.229.21:01:24.61#ibcon#enter sib2, iclass 26, count 2 2006.229.21:01:24.61#ibcon#flushed, iclass 26, count 2 2006.229.21:01:24.61#ibcon#about to write, iclass 26, count 2 2006.229.21:01:24.61#ibcon#wrote, iclass 26, count 2 2006.229.21:01:24.61#ibcon#about to read 3, iclass 26, count 2 2006.229.21:01:24.63#ibcon#read 3, iclass 26, count 2 2006.229.21:01:24.63#ibcon#about to read 4, iclass 26, count 2 2006.229.21:01:24.63#ibcon#read 4, iclass 26, count 2 2006.229.21:01:24.63#ibcon#about to read 5, iclass 26, count 2 2006.229.21:01:24.63#ibcon#read 5, iclass 26, count 2 2006.229.21:01:24.63#ibcon#about to read 6, iclass 26, count 2 2006.229.21:01:24.63#ibcon#read 6, iclass 26, count 2 2006.229.21:01:24.63#ibcon#end of sib2, iclass 26, count 2 2006.229.21:01:24.63#ibcon#*mode == 0, iclass 26, count 2 2006.229.21:01:24.63#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.21:01:24.63#ibcon#[27=AT06-04\r\n] 2006.229.21:01:24.63#ibcon#*before write, iclass 26, count 2 2006.229.21:01:24.63#ibcon#enter sib2, iclass 26, count 2 2006.229.21:01:24.63#ibcon#flushed, iclass 26, count 2 2006.229.21:01:24.63#ibcon#about to write, iclass 26, count 2 2006.229.21:01:24.63#ibcon#wrote, iclass 26, count 2 2006.229.21:01:24.63#ibcon#about to read 3, iclass 26, count 2 2006.229.21:01:24.66#ibcon#read 3, iclass 26, count 2 2006.229.21:01:24.66#ibcon#about to read 4, iclass 26, count 2 2006.229.21:01:24.66#ibcon#read 4, iclass 26, count 2 2006.229.21:01:24.66#ibcon#about to read 5, iclass 26, count 2 2006.229.21:01:24.66#ibcon#read 5, iclass 26, count 2 2006.229.21:01:24.66#ibcon#about to read 6, iclass 26, count 2 2006.229.21:01:24.66#ibcon#read 6, iclass 26, count 2 2006.229.21:01:24.66#ibcon#end of sib2, iclass 26, count 2 2006.229.21:01:24.66#ibcon#*after write, iclass 26, count 2 2006.229.21:01:24.66#ibcon#*before return 0, iclass 26, count 2 2006.229.21:01:24.66#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:24.66#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:01:24.66#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.21:01:24.66#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:24.66#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:24.78#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:24.78#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:24.78#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:01:24.78#ibcon#first serial, iclass 26, count 0 2006.229.21:01:24.78#ibcon#enter sib2, iclass 26, count 0 2006.229.21:01:24.78#ibcon#flushed, iclass 26, count 0 2006.229.21:01:24.78#ibcon#about to write, iclass 26, count 0 2006.229.21:01:24.78#ibcon#wrote, iclass 26, count 0 2006.229.21:01:24.78#ibcon#about to read 3, iclass 26, count 0 2006.229.21:01:24.80#ibcon#read 3, iclass 26, count 0 2006.229.21:01:24.80#ibcon#about to read 4, iclass 26, count 0 2006.229.21:01:24.80#ibcon#read 4, iclass 26, count 0 2006.229.21:01:24.80#ibcon#about to read 5, iclass 26, count 0 2006.229.21:01:24.80#ibcon#read 5, iclass 26, count 0 2006.229.21:01:24.80#ibcon#about to read 6, iclass 26, count 0 2006.229.21:01:24.80#ibcon#read 6, iclass 26, count 0 2006.229.21:01:24.80#ibcon#end of sib2, iclass 26, count 0 2006.229.21:01:24.80#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:01:24.80#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:01:24.80#ibcon#[27=USB\r\n] 2006.229.21:01:24.80#ibcon#*before write, iclass 26, count 0 2006.229.21:01:24.80#ibcon#enter sib2, iclass 26, count 0 2006.229.21:01:24.80#ibcon#flushed, iclass 26, count 0 2006.229.21:01:24.80#ibcon#about to write, iclass 26, count 0 2006.229.21:01:24.80#ibcon#wrote, iclass 26, count 0 2006.229.21:01:24.80#ibcon#about to read 3, iclass 26, count 0 2006.229.21:01:24.83#ibcon#read 3, iclass 26, count 0 2006.229.21:01:24.83#ibcon#about to read 4, iclass 26, count 0 2006.229.21:01:24.83#ibcon#read 4, iclass 26, count 0 2006.229.21:01:24.83#ibcon#about to read 5, iclass 26, count 0 2006.229.21:01:24.83#ibcon#read 5, iclass 26, count 0 2006.229.21:01:24.83#ibcon#about to read 6, iclass 26, count 0 2006.229.21:01:24.83#ibcon#read 6, iclass 26, count 0 2006.229.21:01:24.83#ibcon#end of sib2, iclass 26, count 0 2006.229.21:01:24.83#ibcon#*after write, iclass 26, count 0 2006.229.21:01:24.83#ibcon#*before return 0, iclass 26, count 0 2006.229.21:01:24.83#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:24.83#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:01:24.83#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:01:24.83#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:01:24.83$vck44/vblo=7,734.99 2006.229.21:01:24.83#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.21:01:24.83#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.21:01:24.83#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:24.83#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:24.83#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:24.83#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:24.83#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:01:24.83#ibcon#first serial, iclass 28, count 0 2006.229.21:01:24.83#ibcon#enter sib2, iclass 28, count 0 2006.229.21:01:24.83#ibcon#flushed, iclass 28, count 0 2006.229.21:01:24.83#ibcon#about to write, iclass 28, count 0 2006.229.21:01:24.83#ibcon#wrote, iclass 28, count 0 2006.229.21:01:24.83#ibcon#about to read 3, iclass 28, count 0 2006.229.21:01:24.85#ibcon#read 3, iclass 28, count 0 2006.229.21:01:24.85#ibcon#about to read 4, iclass 28, count 0 2006.229.21:01:24.85#ibcon#read 4, iclass 28, count 0 2006.229.21:01:24.85#ibcon#about to read 5, iclass 28, count 0 2006.229.21:01:24.85#ibcon#read 5, iclass 28, count 0 2006.229.21:01:24.85#ibcon#about to read 6, iclass 28, count 0 2006.229.21:01:24.85#ibcon#read 6, iclass 28, count 0 2006.229.21:01:24.85#ibcon#end of sib2, iclass 28, count 0 2006.229.21:01:24.85#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:01:24.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:01:24.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:01:24.85#ibcon#*before write, iclass 28, count 0 2006.229.21:01:24.85#ibcon#enter sib2, iclass 28, count 0 2006.229.21:01:24.85#ibcon#flushed, iclass 28, count 0 2006.229.21:01:24.85#ibcon#about to write, iclass 28, count 0 2006.229.21:01:24.85#ibcon#wrote, iclass 28, count 0 2006.229.21:01:24.85#ibcon#about to read 3, iclass 28, count 0 2006.229.21:01:24.89#ibcon#read 3, iclass 28, count 0 2006.229.21:01:24.89#ibcon#about to read 4, iclass 28, count 0 2006.229.21:01:24.89#ibcon#read 4, iclass 28, count 0 2006.229.21:01:24.89#ibcon#about to read 5, iclass 28, count 0 2006.229.21:01:24.89#ibcon#read 5, iclass 28, count 0 2006.229.21:01:24.89#ibcon#about to read 6, iclass 28, count 0 2006.229.21:01:24.89#ibcon#read 6, iclass 28, count 0 2006.229.21:01:24.89#ibcon#end of sib2, iclass 28, count 0 2006.229.21:01:24.89#ibcon#*after write, iclass 28, count 0 2006.229.21:01:24.89#ibcon#*before return 0, iclass 28, count 0 2006.229.21:01:24.89#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:24.89#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:01:24.89#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:01:24.89#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:01:24.89$vck44/vb=7,4 2006.229.21:01:24.89#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.21:01:24.89#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.21:01:24.89#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:24.89#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:24.95#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:24.95#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:24.95#ibcon#enter wrdev, iclass 30, count 2 2006.229.21:01:24.95#ibcon#first serial, iclass 30, count 2 2006.229.21:01:24.95#ibcon#enter sib2, iclass 30, count 2 2006.229.21:01:24.95#ibcon#flushed, iclass 30, count 2 2006.229.21:01:24.95#ibcon#about to write, iclass 30, count 2 2006.229.21:01:24.95#ibcon#wrote, iclass 30, count 2 2006.229.21:01:24.95#ibcon#about to read 3, iclass 30, count 2 2006.229.21:01:24.97#ibcon#read 3, iclass 30, count 2 2006.229.21:01:24.97#ibcon#about to read 4, iclass 30, count 2 2006.229.21:01:24.97#ibcon#read 4, iclass 30, count 2 2006.229.21:01:24.97#ibcon#about to read 5, iclass 30, count 2 2006.229.21:01:24.97#ibcon#read 5, iclass 30, count 2 2006.229.21:01:24.97#ibcon#about to read 6, iclass 30, count 2 2006.229.21:01:24.97#ibcon#read 6, iclass 30, count 2 2006.229.21:01:24.97#ibcon#end of sib2, iclass 30, count 2 2006.229.21:01:24.97#ibcon#*mode == 0, iclass 30, count 2 2006.229.21:01:24.97#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.21:01:24.97#ibcon#[27=AT07-04\r\n] 2006.229.21:01:24.97#ibcon#*before write, iclass 30, count 2 2006.229.21:01:24.97#ibcon#enter sib2, iclass 30, count 2 2006.229.21:01:24.97#ibcon#flushed, iclass 30, count 2 2006.229.21:01:24.97#ibcon#about to write, iclass 30, count 2 2006.229.21:01:24.97#ibcon#wrote, iclass 30, count 2 2006.229.21:01:24.97#ibcon#about to read 3, iclass 30, count 2 2006.229.21:01:25.00#ibcon#read 3, iclass 30, count 2 2006.229.21:01:25.00#ibcon#about to read 4, iclass 30, count 2 2006.229.21:01:25.00#ibcon#read 4, iclass 30, count 2 2006.229.21:01:25.00#ibcon#about to read 5, iclass 30, count 2 2006.229.21:01:25.00#ibcon#read 5, iclass 30, count 2 2006.229.21:01:25.00#ibcon#about to read 6, iclass 30, count 2 2006.229.21:01:25.00#ibcon#read 6, iclass 30, count 2 2006.229.21:01:25.00#ibcon#end of sib2, iclass 30, count 2 2006.229.21:01:25.00#ibcon#*after write, iclass 30, count 2 2006.229.21:01:25.00#ibcon#*before return 0, iclass 30, count 2 2006.229.21:01:25.00#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:25.00#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:01:25.00#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.21:01:25.00#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:25.00#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:25.12#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:25.12#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:25.12#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:01:25.12#ibcon#first serial, iclass 30, count 0 2006.229.21:01:25.12#ibcon#enter sib2, iclass 30, count 0 2006.229.21:01:25.12#ibcon#flushed, iclass 30, count 0 2006.229.21:01:25.12#ibcon#about to write, iclass 30, count 0 2006.229.21:01:25.12#ibcon#wrote, iclass 30, count 0 2006.229.21:01:25.12#ibcon#about to read 3, iclass 30, count 0 2006.229.21:01:25.14#ibcon#read 3, iclass 30, count 0 2006.229.21:01:25.14#ibcon#about to read 4, iclass 30, count 0 2006.229.21:01:25.14#ibcon#read 4, iclass 30, count 0 2006.229.21:01:25.14#ibcon#about to read 5, iclass 30, count 0 2006.229.21:01:25.14#ibcon#read 5, iclass 30, count 0 2006.229.21:01:25.14#ibcon#about to read 6, iclass 30, count 0 2006.229.21:01:25.14#ibcon#read 6, iclass 30, count 0 2006.229.21:01:25.14#ibcon#end of sib2, iclass 30, count 0 2006.229.21:01:25.14#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:01:25.14#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:01:25.14#ibcon#[27=USB\r\n] 2006.229.21:01:25.14#ibcon#*before write, iclass 30, count 0 2006.229.21:01:25.14#ibcon#enter sib2, iclass 30, count 0 2006.229.21:01:25.14#ibcon#flushed, iclass 30, count 0 2006.229.21:01:25.14#ibcon#about to write, iclass 30, count 0 2006.229.21:01:25.14#ibcon#wrote, iclass 30, count 0 2006.229.21:01:25.14#ibcon#about to read 3, iclass 30, count 0 2006.229.21:01:25.17#ibcon#read 3, iclass 30, count 0 2006.229.21:01:25.17#ibcon#about to read 4, iclass 30, count 0 2006.229.21:01:25.17#ibcon#read 4, iclass 30, count 0 2006.229.21:01:25.17#ibcon#about to read 5, iclass 30, count 0 2006.229.21:01:25.17#ibcon#read 5, iclass 30, count 0 2006.229.21:01:25.17#ibcon#about to read 6, iclass 30, count 0 2006.229.21:01:25.17#ibcon#read 6, iclass 30, count 0 2006.229.21:01:25.17#ibcon#end of sib2, iclass 30, count 0 2006.229.21:01:25.17#ibcon#*after write, iclass 30, count 0 2006.229.21:01:25.17#ibcon#*before return 0, iclass 30, count 0 2006.229.21:01:25.17#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:25.17#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:01:25.17#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:01:25.17#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:01:25.17$vck44/vblo=8,744.99 2006.229.21:01:25.17#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.21:01:25.17#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.21:01:25.17#ibcon#ireg 17 cls_cnt 0 2006.229.21:01:25.17#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:25.17#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:25.17#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:25.17#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:01:25.17#ibcon#first serial, iclass 32, count 0 2006.229.21:01:25.17#ibcon#enter sib2, iclass 32, count 0 2006.229.21:01:25.17#ibcon#flushed, iclass 32, count 0 2006.229.21:01:25.17#ibcon#about to write, iclass 32, count 0 2006.229.21:01:25.17#ibcon#wrote, iclass 32, count 0 2006.229.21:01:25.17#ibcon#about to read 3, iclass 32, count 0 2006.229.21:01:25.19#ibcon#read 3, iclass 32, count 0 2006.229.21:01:25.19#ibcon#about to read 4, iclass 32, count 0 2006.229.21:01:25.19#ibcon#read 4, iclass 32, count 0 2006.229.21:01:25.19#ibcon#about to read 5, iclass 32, count 0 2006.229.21:01:25.19#ibcon#read 5, iclass 32, count 0 2006.229.21:01:25.19#ibcon#about to read 6, iclass 32, count 0 2006.229.21:01:25.19#ibcon#read 6, iclass 32, count 0 2006.229.21:01:25.19#ibcon#end of sib2, iclass 32, count 0 2006.229.21:01:25.19#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:01:25.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:01:25.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:01:25.19#ibcon#*before write, iclass 32, count 0 2006.229.21:01:25.19#ibcon#enter sib2, iclass 32, count 0 2006.229.21:01:25.19#ibcon#flushed, iclass 32, count 0 2006.229.21:01:25.19#ibcon#about to write, iclass 32, count 0 2006.229.21:01:25.19#ibcon#wrote, iclass 32, count 0 2006.229.21:01:25.19#ibcon#about to read 3, iclass 32, count 0 2006.229.21:01:25.23#ibcon#read 3, iclass 32, count 0 2006.229.21:01:25.23#ibcon#about to read 4, iclass 32, count 0 2006.229.21:01:25.23#ibcon#read 4, iclass 32, count 0 2006.229.21:01:25.23#ibcon#about to read 5, iclass 32, count 0 2006.229.21:01:25.23#ibcon#read 5, iclass 32, count 0 2006.229.21:01:25.23#ibcon#about to read 6, iclass 32, count 0 2006.229.21:01:25.23#ibcon#read 6, iclass 32, count 0 2006.229.21:01:25.23#ibcon#end of sib2, iclass 32, count 0 2006.229.21:01:25.23#ibcon#*after write, iclass 32, count 0 2006.229.21:01:25.23#ibcon#*before return 0, iclass 32, count 0 2006.229.21:01:25.23#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:25.23#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:01:25.23#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:01:25.23#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:01:25.23$vck44/vb=8,4 2006.229.21:01:25.23#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.21:01:25.23#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.21:01:25.23#ibcon#ireg 11 cls_cnt 2 2006.229.21:01:25.23#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:25.29#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:25.29#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:25.29#ibcon#enter wrdev, iclass 34, count 2 2006.229.21:01:25.29#ibcon#first serial, iclass 34, count 2 2006.229.21:01:25.29#ibcon#enter sib2, iclass 34, count 2 2006.229.21:01:25.29#ibcon#flushed, iclass 34, count 2 2006.229.21:01:25.29#ibcon#about to write, iclass 34, count 2 2006.229.21:01:25.29#ibcon#wrote, iclass 34, count 2 2006.229.21:01:25.29#ibcon#about to read 3, iclass 34, count 2 2006.229.21:01:25.31#ibcon#read 3, iclass 34, count 2 2006.229.21:01:25.31#ibcon#about to read 4, iclass 34, count 2 2006.229.21:01:25.31#ibcon#read 4, iclass 34, count 2 2006.229.21:01:25.31#ibcon#about to read 5, iclass 34, count 2 2006.229.21:01:25.31#ibcon#read 5, iclass 34, count 2 2006.229.21:01:25.31#ibcon#about to read 6, iclass 34, count 2 2006.229.21:01:25.31#ibcon#read 6, iclass 34, count 2 2006.229.21:01:25.31#ibcon#end of sib2, iclass 34, count 2 2006.229.21:01:25.31#ibcon#*mode == 0, iclass 34, count 2 2006.229.21:01:25.31#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.21:01:25.31#ibcon#[27=AT08-04\r\n] 2006.229.21:01:25.31#ibcon#*before write, iclass 34, count 2 2006.229.21:01:25.31#ibcon#enter sib2, iclass 34, count 2 2006.229.21:01:25.31#ibcon#flushed, iclass 34, count 2 2006.229.21:01:25.31#ibcon#about to write, iclass 34, count 2 2006.229.21:01:25.31#ibcon#wrote, iclass 34, count 2 2006.229.21:01:25.31#ibcon#about to read 3, iclass 34, count 2 2006.229.21:01:25.34#ibcon#read 3, iclass 34, count 2 2006.229.21:01:25.34#ibcon#about to read 4, iclass 34, count 2 2006.229.21:01:25.34#ibcon#read 4, iclass 34, count 2 2006.229.21:01:25.34#ibcon#about to read 5, iclass 34, count 2 2006.229.21:01:25.34#ibcon#read 5, iclass 34, count 2 2006.229.21:01:25.34#ibcon#about to read 6, iclass 34, count 2 2006.229.21:01:25.34#ibcon#read 6, iclass 34, count 2 2006.229.21:01:25.34#ibcon#end of sib2, iclass 34, count 2 2006.229.21:01:25.34#ibcon#*after write, iclass 34, count 2 2006.229.21:01:25.34#ibcon#*before return 0, iclass 34, count 2 2006.229.21:01:25.34#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:25.34#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:01:25.34#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.21:01:25.34#ibcon#ireg 7 cls_cnt 0 2006.229.21:01:25.34#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:25.46#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:25.46#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:25.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.21:01:25.46#ibcon#first serial, iclass 34, count 0 2006.229.21:01:25.46#ibcon#enter sib2, iclass 34, count 0 2006.229.21:01:25.46#ibcon#flushed, iclass 34, count 0 2006.229.21:01:25.46#ibcon#about to write, iclass 34, count 0 2006.229.21:01:25.46#ibcon#wrote, iclass 34, count 0 2006.229.21:01:25.46#ibcon#about to read 3, iclass 34, count 0 2006.229.21:01:25.48#ibcon#read 3, iclass 34, count 0 2006.229.21:01:25.48#ibcon#about to read 4, iclass 34, count 0 2006.229.21:01:25.48#ibcon#read 4, iclass 34, count 0 2006.229.21:01:25.48#ibcon#about to read 5, iclass 34, count 0 2006.229.21:01:25.48#ibcon#read 5, iclass 34, count 0 2006.229.21:01:25.48#ibcon#about to read 6, iclass 34, count 0 2006.229.21:01:25.48#ibcon#read 6, iclass 34, count 0 2006.229.21:01:25.48#ibcon#end of sib2, iclass 34, count 0 2006.229.21:01:25.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.21:01:25.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.21:01:25.48#ibcon#[27=USB\r\n] 2006.229.21:01:25.48#ibcon#*before write, iclass 34, count 0 2006.229.21:01:25.48#ibcon#enter sib2, iclass 34, count 0 2006.229.21:01:25.48#ibcon#flushed, iclass 34, count 0 2006.229.21:01:25.48#ibcon#about to write, iclass 34, count 0 2006.229.21:01:25.48#ibcon#wrote, iclass 34, count 0 2006.229.21:01:25.48#ibcon#about to read 3, iclass 34, count 0 2006.229.21:01:25.51#ibcon#read 3, iclass 34, count 0 2006.229.21:01:25.51#ibcon#about to read 4, iclass 34, count 0 2006.229.21:01:25.51#ibcon#read 4, iclass 34, count 0 2006.229.21:01:25.51#ibcon#about to read 5, iclass 34, count 0 2006.229.21:01:25.51#ibcon#read 5, iclass 34, count 0 2006.229.21:01:25.51#ibcon#about to read 6, iclass 34, count 0 2006.229.21:01:25.51#ibcon#read 6, iclass 34, count 0 2006.229.21:01:25.51#ibcon#end of sib2, iclass 34, count 0 2006.229.21:01:25.51#ibcon#*after write, iclass 34, count 0 2006.229.21:01:25.51#ibcon#*before return 0, iclass 34, count 0 2006.229.21:01:25.51#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:25.51#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:01:25.51#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.21:01:25.51#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.21:01:25.51$vck44/vabw=wide 2006.229.21:01:25.51#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.21:01:25.51#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.21:01:25.51#ibcon#ireg 8 cls_cnt 0 2006.229.21:01:25.51#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:25.51#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:25.51#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:25.51#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:01:25.51#ibcon#first serial, iclass 36, count 0 2006.229.21:01:25.51#ibcon#enter sib2, iclass 36, count 0 2006.229.21:01:25.51#ibcon#flushed, iclass 36, count 0 2006.229.21:01:25.51#ibcon#about to write, iclass 36, count 0 2006.229.21:01:25.51#ibcon#wrote, iclass 36, count 0 2006.229.21:01:25.51#ibcon#about to read 3, iclass 36, count 0 2006.229.21:01:25.53#ibcon#read 3, iclass 36, count 0 2006.229.21:01:25.53#ibcon#about to read 4, iclass 36, count 0 2006.229.21:01:25.53#ibcon#read 4, iclass 36, count 0 2006.229.21:01:25.53#ibcon#about to read 5, iclass 36, count 0 2006.229.21:01:25.53#ibcon#read 5, iclass 36, count 0 2006.229.21:01:25.53#ibcon#about to read 6, iclass 36, count 0 2006.229.21:01:25.53#ibcon#read 6, iclass 36, count 0 2006.229.21:01:25.53#ibcon#end of sib2, iclass 36, count 0 2006.229.21:01:25.53#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:01:25.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:01:25.53#ibcon#[25=BW32\r\n] 2006.229.21:01:25.53#ibcon#*before write, iclass 36, count 0 2006.229.21:01:25.53#ibcon#enter sib2, iclass 36, count 0 2006.229.21:01:25.53#ibcon#flushed, iclass 36, count 0 2006.229.21:01:25.53#ibcon#about to write, iclass 36, count 0 2006.229.21:01:25.53#ibcon#wrote, iclass 36, count 0 2006.229.21:01:25.53#ibcon#about to read 3, iclass 36, count 0 2006.229.21:01:25.56#ibcon#read 3, iclass 36, count 0 2006.229.21:01:25.56#ibcon#about to read 4, iclass 36, count 0 2006.229.21:01:25.56#ibcon#read 4, iclass 36, count 0 2006.229.21:01:25.56#ibcon#about to read 5, iclass 36, count 0 2006.229.21:01:25.56#ibcon#read 5, iclass 36, count 0 2006.229.21:01:25.56#ibcon#about to read 6, iclass 36, count 0 2006.229.21:01:25.56#ibcon#read 6, iclass 36, count 0 2006.229.21:01:25.56#ibcon#end of sib2, iclass 36, count 0 2006.229.21:01:25.56#ibcon#*after write, iclass 36, count 0 2006.229.21:01:25.56#ibcon#*before return 0, iclass 36, count 0 2006.229.21:01:25.56#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:25.56#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:01:25.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:01:25.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:01:25.56$vck44/vbbw=wide 2006.229.21:01:25.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.21:01:25.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.21:01:25.56#ibcon#ireg 8 cls_cnt 0 2006.229.21:01:25.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:01:25.63#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:01:25.63#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:01:25.63#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:01:25.63#ibcon#first serial, iclass 38, count 0 2006.229.21:01:25.63#ibcon#enter sib2, iclass 38, count 0 2006.229.21:01:25.63#ibcon#flushed, iclass 38, count 0 2006.229.21:01:25.63#ibcon#about to write, iclass 38, count 0 2006.229.21:01:25.63#ibcon#wrote, iclass 38, count 0 2006.229.21:01:25.63#ibcon#about to read 3, iclass 38, count 0 2006.229.21:01:25.65#ibcon#read 3, iclass 38, count 0 2006.229.21:01:25.65#ibcon#about to read 4, iclass 38, count 0 2006.229.21:01:25.65#ibcon#read 4, iclass 38, count 0 2006.229.21:01:25.65#ibcon#about to read 5, iclass 38, count 0 2006.229.21:01:25.65#ibcon#read 5, iclass 38, count 0 2006.229.21:01:25.65#ibcon#about to read 6, iclass 38, count 0 2006.229.21:01:25.65#ibcon#read 6, iclass 38, count 0 2006.229.21:01:25.65#ibcon#end of sib2, iclass 38, count 0 2006.229.21:01:25.65#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:01:25.65#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:01:25.65#ibcon#[27=BW32\r\n] 2006.229.21:01:25.65#ibcon#*before write, iclass 38, count 0 2006.229.21:01:25.65#ibcon#enter sib2, iclass 38, count 0 2006.229.21:01:25.65#ibcon#flushed, iclass 38, count 0 2006.229.21:01:25.65#ibcon#about to write, iclass 38, count 0 2006.229.21:01:25.65#ibcon#wrote, iclass 38, count 0 2006.229.21:01:25.65#ibcon#about to read 3, iclass 38, count 0 2006.229.21:01:25.68#ibcon#read 3, iclass 38, count 0 2006.229.21:01:25.68#ibcon#about to read 4, iclass 38, count 0 2006.229.21:01:25.68#ibcon#read 4, iclass 38, count 0 2006.229.21:01:25.68#ibcon#about to read 5, iclass 38, count 0 2006.229.21:01:25.68#ibcon#read 5, iclass 38, count 0 2006.229.21:01:25.68#ibcon#about to read 6, iclass 38, count 0 2006.229.21:01:25.68#ibcon#read 6, iclass 38, count 0 2006.229.21:01:25.68#ibcon#end of sib2, iclass 38, count 0 2006.229.21:01:25.68#ibcon#*after write, iclass 38, count 0 2006.229.21:01:25.68#ibcon#*before return 0, iclass 38, count 0 2006.229.21:01:25.68#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:01:25.68#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:01:25.68#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:01:25.68#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:01:25.68$setupk4/ifdk4 2006.229.21:01:25.68$ifdk4/lo= 2006.229.21:01:25.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:01:25.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:01:25.68$ifdk4/patch= 2006.229.21:01:25.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:01:25.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:01:25.68$setupk4/!*+20s 2006.229.21:01:26.47#abcon#<5=/07 1.4 4.1 26.211001002.0\r\n> 2006.229.21:01:26.49#abcon#{5=INTERFACE CLEAR} 2006.229.21:01:26.55#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:01:36.64#abcon#<5=/07 1.4 4.1 26.211001002.0\r\n> 2006.229.21:01:36.66#abcon#{5=INTERFACE CLEAR} 2006.229.21:01:36.72#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:01:40.19$setupk4/"tpicd 2006.229.21:01:40.19$setupk4/echo=off 2006.229.21:01:40.19$setupk4/xlog=off 2006.229.21:01:40.19:!2006.229.21:07:40 2006.229.21:01:41.14#trakl#Source acquired 2006.229.21:01:43.14#flagr#flagr/antenna,acquired 2006.229.21:07:40.00:preob 2006.229.21:07:41.14/onsource/TRACKING 2006.229.21:07:41.14:!2006.229.21:07:50 2006.229.21:07:50.00:"tape 2006.229.21:07:50.00:"st=record 2006.229.21:07:50.00:data_valid=on 2006.229.21:07:50.00:midob 2006.229.21:07:50.14/onsource/TRACKING 2006.229.21:07:50.14/wx/26.32,1002.0,100 2006.229.21:07:50.35/cable/+6.4224E-03 2006.229.21:07:51.44/va/01,08,usb,yes,29,31 2006.229.21:07:51.44/va/02,07,usb,yes,31,32 2006.229.21:07:51.44/va/03,06,usb,yes,39,42 2006.229.21:07:51.44/va/04,07,usb,yes,32,34 2006.229.21:07:51.44/va/05,04,usb,yes,29,29 2006.229.21:07:51.44/va/06,04,usb,yes,33,32 2006.229.21:07:51.44/va/07,05,usb,yes,29,29 2006.229.21:07:51.44/va/08,06,usb,yes,21,26 2006.229.21:07:51.67/valo/01,524.99,yes,locked 2006.229.21:07:51.67/valo/02,534.99,yes,locked 2006.229.21:07:51.67/valo/03,564.99,yes,locked 2006.229.21:07:51.67/valo/04,624.99,yes,locked 2006.229.21:07:51.67/valo/05,734.99,yes,locked 2006.229.21:07:51.67/valo/06,814.99,yes,locked 2006.229.21:07:51.67/valo/07,864.99,yes,locked 2006.229.21:07:51.67/valo/08,884.99,yes,locked 2006.229.21:07:52.76/vb/01,04,usb,yes,31,28 2006.229.21:07:52.76/vb/02,04,usb,yes,33,33 2006.229.21:07:52.76/vb/03,04,usb,yes,30,33 2006.229.21:07:52.76/vb/04,04,usb,yes,34,33 2006.229.21:07:52.76/vb/05,04,usb,yes,27,29 2006.229.21:07:52.76/vb/06,04,usb,yes,31,27 2006.229.21:07:52.76/vb/07,04,usb,yes,31,31 2006.229.21:07:52.76/vb/08,04,usb,yes,28,32 2006.229.21:07:52.99/vblo/01,629.99,yes,locked 2006.229.21:07:52.99/vblo/02,634.99,yes,locked 2006.229.21:07:52.99/vblo/03,649.99,yes,locked 2006.229.21:07:52.99/vblo/04,679.99,yes,locked 2006.229.21:07:52.99/vblo/05,709.99,yes,locked 2006.229.21:07:52.99/vblo/06,719.99,yes,locked 2006.229.21:07:52.99/vblo/07,734.99,yes,locked 2006.229.21:07:52.99/vblo/08,744.99,yes,locked 2006.229.21:07:53.14/vabw/8 2006.229.21:07:53.29/vbbw/8 2006.229.21:07:53.38/xfe/off,on,12.5 2006.229.21:07:53.75/ifatt/23,28,28,28 2006.229.21:07:54.08/fmout-gps/S +4.56E-07 2006.229.21:07:54.12:!2006.229.21:13:00 2006.229.21:13:00.00:data_valid=off 2006.229.21:13:00.00:"et 2006.229.21:13:00.01:!+3s 2006.229.21:13:03.02:"tape 2006.229.21:13:03.02:postob 2006.229.21:13:03.10/cable/+6.4224E-03 2006.229.21:13:03.10/wx/26.51,1002.0,100 2006.229.21:13:04.08/fmout-gps/S +4.56E-07 2006.229.21:13:04.08:scan_name=229-2117,jd0608,100 2006.229.21:13:04.09:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.21:13:05.13#flagr#flagr/antenna,new-source 2006.229.21:13:05.13:checkk5 2006.229.21:13:05.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:13:05.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:13:06.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:13:06.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:13:07.14/chk_obsdata//k5ts1/T2292107??a.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.21:13:07.52/chk_obsdata//k5ts2/T2292107??b.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.21:13:07.92/chk_obsdata//k5ts3/T2292107??c.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.21:13:08.32/chk_obsdata//k5ts4/T2292107??d.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.21:13:09.03/k5log//k5ts1_log_newline 2006.229.21:13:09.73/k5log//k5ts2_log_newline 2006.229.21:13:10.44/k5log//k5ts3_log_newline 2006.229.21:13:11.15/k5log//k5ts4_log_newline 2006.229.21:13:11.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:13:11.17:setupk4=1 2006.229.21:13:11.17$setupk4/echo=on 2006.229.21:13:11.17$setupk4/pcalon 2006.229.21:13:11.17$pcalon/"no phase cal control is implemented here 2006.229.21:13:11.17$setupk4/"tpicd=stop 2006.229.21:13:11.17$setupk4/"rec=synch_on 2006.229.21:13:11.17$setupk4/"rec_mode=128 2006.229.21:13:11.17$setupk4/!* 2006.229.21:13:11.17$setupk4/recpk4 2006.229.21:13:11.17$recpk4/recpatch= 2006.229.21:13:11.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:13:11.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:13:11.17$setupk4/vck44 2006.229.21:13:11.17$vck44/valo=1,524.99 2006.229.21:13:11.17#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.21:13:11.17#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.21:13:11.17#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:11.17#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:11.17#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:11.17#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:11.17#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:13:11.17#ibcon#first serial, iclass 35, count 0 2006.229.21:13:11.17#ibcon#enter sib2, iclass 35, count 0 2006.229.21:13:11.17#ibcon#flushed, iclass 35, count 0 2006.229.21:13:11.17#ibcon#about to write, iclass 35, count 0 2006.229.21:13:11.17#ibcon#wrote, iclass 35, count 0 2006.229.21:13:11.17#ibcon#about to read 3, iclass 35, count 0 2006.229.21:13:11.19#ibcon#read 3, iclass 35, count 0 2006.229.21:13:11.19#ibcon#about to read 4, iclass 35, count 0 2006.229.21:13:11.19#ibcon#read 4, iclass 35, count 0 2006.229.21:13:11.19#ibcon#about to read 5, iclass 35, count 0 2006.229.21:13:11.19#ibcon#read 5, iclass 35, count 0 2006.229.21:13:11.19#ibcon#about to read 6, iclass 35, count 0 2006.229.21:13:11.19#ibcon#read 6, iclass 35, count 0 2006.229.21:13:11.19#ibcon#end of sib2, iclass 35, count 0 2006.229.21:13:11.19#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:13:11.19#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:13:11.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:13:11.19#ibcon#*before write, iclass 35, count 0 2006.229.21:13:11.19#ibcon#enter sib2, iclass 35, count 0 2006.229.21:13:11.19#ibcon#flushed, iclass 35, count 0 2006.229.21:13:11.19#ibcon#about to write, iclass 35, count 0 2006.229.21:13:11.19#ibcon#wrote, iclass 35, count 0 2006.229.21:13:11.19#ibcon#about to read 3, iclass 35, count 0 2006.229.21:13:11.24#ibcon#read 3, iclass 35, count 0 2006.229.21:13:11.24#ibcon#about to read 4, iclass 35, count 0 2006.229.21:13:11.24#ibcon#read 4, iclass 35, count 0 2006.229.21:13:11.24#ibcon#about to read 5, iclass 35, count 0 2006.229.21:13:11.24#ibcon#read 5, iclass 35, count 0 2006.229.21:13:11.24#ibcon#about to read 6, iclass 35, count 0 2006.229.21:13:11.24#ibcon#read 6, iclass 35, count 0 2006.229.21:13:11.24#ibcon#end of sib2, iclass 35, count 0 2006.229.21:13:11.24#ibcon#*after write, iclass 35, count 0 2006.229.21:13:11.24#ibcon#*before return 0, iclass 35, count 0 2006.229.21:13:11.24#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:11.24#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:11.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:13:11.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:13:11.24$vck44/va=1,8 2006.229.21:13:11.24#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.21:13:11.24#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.21:13:11.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:11.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:11.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:11.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:11.24#ibcon#enter wrdev, iclass 37, count 2 2006.229.21:13:11.24#ibcon#first serial, iclass 37, count 2 2006.229.21:13:11.24#ibcon#enter sib2, iclass 37, count 2 2006.229.21:13:11.24#ibcon#flushed, iclass 37, count 2 2006.229.21:13:11.24#ibcon#about to write, iclass 37, count 2 2006.229.21:13:11.24#ibcon#wrote, iclass 37, count 2 2006.229.21:13:11.24#ibcon#about to read 3, iclass 37, count 2 2006.229.21:13:11.26#ibcon#read 3, iclass 37, count 2 2006.229.21:13:11.26#ibcon#about to read 4, iclass 37, count 2 2006.229.21:13:11.26#ibcon#read 4, iclass 37, count 2 2006.229.21:13:11.26#ibcon#about to read 5, iclass 37, count 2 2006.229.21:13:11.26#ibcon#read 5, iclass 37, count 2 2006.229.21:13:11.26#ibcon#about to read 6, iclass 37, count 2 2006.229.21:13:11.26#ibcon#read 6, iclass 37, count 2 2006.229.21:13:11.26#ibcon#end of sib2, iclass 37, count 2 2006.229.21:13:11.26#ibcon#*mode == 0, iclass 37, count 2 2006.229.21:13:11.26#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.21:13:11.26#ibcon#[25=AT01-08\r\n] 2006.229.21:13:11.26#ibcon#*before write, iclass 37, count 2 2006.229.21:13:11.26#ibcon#enter sib2, iclass 37, count 2 2006.229.21:13:11.26#ibcon#flushed, iclass 37, count 2 2006.229.21:13:11.26#ibcon#about to write, iclass 37, count 2 2006.229.21:13:11.26#ibcon#wrote, iclass 37, count 2 2006.229.21:13:11.26#ibcon#about to read 3, iclass 37, count 2 2006.229.21:13:11.29#ibcon#read 3, iclass 37, count 2 2006.229.21:13:11.29#ibcon#about to read 4, iclass 37, count 2 2006.229.21:13:11.29#ibcon#read 4, iclass 37, count 2 2006.229.21:13:11.29#ibcon#about to read 5, iclass 37, count 2 2006.229.21:13:11.29#ibcon#read 5, iclass 37, count 2 2006.229.21:13:11.29#ibcon#about to read 6, iclass 37, count 2 2006.229.21:13:11.29#ibcon#read 6, iclass 37, count 2 2006.229.21:13:11.29#ibcon#end of sib2, iclass 37, count 2 2006.229.21:13:11.29#ibcon#*after write, iclass 37, count 2 2006.229.21:13:11.29#ibcon#*before return 0, iclass 37, count 2 2006.229.21:13:11.29#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:11.29#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:11.29#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.21:13:11.29#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:11.29#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:11.41#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:11.41#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:11.41#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:13:11.41#ibcon#first serial, iclass 37, count 0 2006.229.21:13:11.41#ibcon#enter sib2, iclass 37, count 0 2006.229.21:13:11.41#ibcon#flushed, iclass 37, count 0 2006.229.21:13:11.41#ibcon#about to write, iclass 37, count 0 2006.229.21:13:11.41#ibcon#wrote, iclass 37, count 0 2006.229.21:13:11.41#ibcon#about to read 3, iclass 37, count 0 2006.229.21:13:11.43#ibcon#read 3, iclass 37, count 0 2006.229.21:13:11.43#ibcon#about to read 4, iclass 37, count 0 2006.229.21:13:11.43#ibcon#read 4, iclass 37, count 0 2006.229.21:13:11.43#ibcon#about to read 5, iclass 37, count 0 2006.229.21:13:11.43#ibcon#read 5, iclass 37, count 0 2006.229.21:13:11.43#ibcon#about to read 6, iclass 37, count 0 2006.229.21:13:11.43#ibcon#read 6, iclass 37, count 0 2006.229.21:13:11.43#ibcon#end of sib2, iclass 37, count 0 2006.229.21:13:11.43#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:13:11.43#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:13:11.43#ibcon#[25=USB\r\n] 2006.229.21:13:11.43#ibcon#*before write, iclass 37, count 0 2006.229.21:13:11.43#ibcon#enter sib2, iclass 37, count 0 2006.229.21:13:11.43#ibcon#flushed, iclass 37, count 0 2006.229.21:13:11.43#ibcon#about to write, iclass 37, count 0 2006.229.21:13:11.43#ibcon#wrote, iclass 37, count 0 2006.229.21:13:11.43#ibcon#about to read 3, iclass 37, count 0 2006.229.21:13:11.46#ibcon#read 3, iclass 37, count 0 2006.229.21:13:11.46#ibcon#about to read 4, iclass 37, count 0 2006.229.21:13:11.46#ibcon#read 4, iclass 37, count 0 2006.229.21:13:11.46#ibcon#about to read 5, iclass 37, count 0 2006.229.21:13:11.46#ibcon#read 5, iclass 37, count 0 2006.229.21:13:11.46#ibcon#about to read 6, iclass 37, count 0 2006.229.21:13:11.46#ibcon#read 6, iclass 37, count 0 2006.229.21:13:11.46#ibcon#end of sib2, iclass 37, count 0 2006.229.21:13:11.46#ibcon#*after write, iclass 37, count 0 2006.229.21:13:11.46#ibcon#*before return 0, iclass 37, count 0 2006.229.21:13:11.46#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:11.46#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:11.46#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:13:11.46#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:13:11.46$vck44/valo=2,534.99 2006.229.21:13:11.46#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.21:13:11.46#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.21:13:11.46#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:11.46#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:11.46#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:11.46#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:11.46#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:13:11.46#ibcon#first serial, iclass 39, count 0 2006.229.21:13:11.46#ibcon#enter sib2, iclass 39, count 0 2006.229.21:13:11.46#ibcon#flushed, iclass 39, count 0 2006.229.21:13:11.46#ibcon#about to write, iclass 39, count 0 2006.229.21:13:11.46#ibcon#wrote, iclass 39, count 0 2006.229.21:13:11.46#ibcon#about to read 3, iclass 39, count 0 2006.229.21:13:11.48#ibcon#read 3, iclass 39, count 0 2006.229.21:13:11.48#ibcon#about to read 4, iclass 39, count 0 2006.229.21:13:11.48#ibcon#read 4, iclass 39, count 0 2006.229.21:13:11.48#ibcon#about to read 5, iclass 39, count 0 2006.229.21:13:11.48#ibcon#read 5, iclass 39, count 0 2006.229.21:13:11.48#ibcon#about to read 6, iclass 39, count 0 2006.229.21:13:11.48#ibcon#read 6, iclass 39, count 0 2006.229.21:13:11.48#ibcon#end of sib2, iclass 39, count 0 2006.229.21:13:11.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:13:11.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:13:11.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:13:11.48#ibcon#*before write, iclass 39, count 0 2006.229.21:13:11.48#ibcon#enter sib2, iclass 39, count 0 2006.229.21:13:11.48#ibcon#flushed, iclass 39, count 0 2006.229.21:13:11.48#ibcon#about to write, iclass 39, count 0 2006.229.21:13:11.48#ibcon#wrote, iclass 39, count 0 2006.229.21:13:11.48#ibcon#about to read 3, iclass 39, count 0 2006.229.21:13:11.52#ibcon#read 3, iclass 39, count 0 2006.229.21:13:11.52#ibcon#about to read 4, iclass 39, count 0 2006.229.21:13:11.52#ibcon#read 4, iclass 39, count 0 2006.229.21:13:11.52#ibcon#about to read 5, iclass 39, count 0 2006.229.21:13:11.52#ibcon#read 5, iclass 39, count 0 2006.229.21:13:11.52#ibcon#about to read 6, iclass 39, count 0 2006.229.21:13:11.52#ibcon#read 6, iclass 39, count 0 2006.229.21:13:11.52#ibcon#end of sib2, iclass 39, count 0 2006.229.21:13:11.52#ibcon#*after write, iclass 39, count 0 2006.229.21:13:11.52#ibcon#*before return 0, iclass 39, count 0 2006.229.21:13:11.52#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:11.52#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:11.52#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:13:11.52#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:13:11.52$vck44/va=2,7 2006.229.21:13:11.52#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.21:13:11.52#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.21:13:11.52#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:11.52#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:11.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:11.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:11.58#ibcon#enter wrdev, iclass 3, count 2 2006.229.21:13:11.58#ibcon#first serial, iclass 3, count 2 2006.229.21:13:11.58#ibcon#enter sib2, iclass 3, count 2 2006.229.21:13:11.58#ibcon#flushed, iclass 3, count 2 2006.229.21:13:11.58#ibcon#about to write, iclass 3, count 2 2006.229.21:13:11.58#ibcon#wrote, iclass 3, count 2 2006.229.21:13:11.58#ibcon#about to read 3, iclass 3, count 2 2006.229.21:13:11.60#ibcon#read 3, iclass 3, count 2 2006.229.21:13:11.60#ibcon#about to read 4, iclass 3, count 2 2006.229.21:13:11.60#ibcon#read 4, iclass 3, count 2 2006.229.21:13:11.60#ibcon#about to read 5, iclass 3, count 2 2006.229.21:13:11.60#ibcon#read 5, iclass 3, count 2 2006.229.21:13:11.60#ibcon#about to read 6, iclass 3, count 2 2006.229.21:13:11.60#ibcon#read 6, iclass 3, count 2 2006.229.21:13:11.60#ibcon#end of sib2, iclass 3, count 2 2006.229.21:13:11.60#ibcon#*mode == 0, iclass 3, count 2 2006.229.21:13:11.60#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.21:13:11.60#ibcon#[25=AT02-07\r\n] 2006.229.21:13:11.60#ibcon#*before write, iclass 3, count 2 2006.229.21:13:11.60#ibcon#enter sib2, iclass 3, count 2 2006.229.21:13:11.60#ibcon#flushed, iclass 3, count 2 2006.229.21:13:11.60#ibcon#about to write, iclass 3, count 2 2006.229.21:13:11.60#ibcon#wrote, iclass 3, count 2 2006.229.21:13:11.60#ibcon#about to read 3, iclass 3, count 2 2006.229.21:13:11.63#ibcon#read 3, iclass 3, count 2 2006.229.21:13:11.63#ibcon#about to read 4, iclass 3, count 2 2006.229.21:13:11.63#ibcon#read 4, iclass 3, count 2 2006.229.21:13:11.63#ibcon#about to read 5, iclass 3, count 2 2006.229.21:13:11.63#ibcon#read 5, iclass 3, count 2 2006.229.21:13:11.63#ibcon#about to read 6, iclass 3, count 2 2006.229.21:13:11.63#ibcon#read 6, iclass 3, count 2 2006.229.21:13:11.63#ibcon#end of sib2, iclass 3, count 2 2006.229.21:13:11.63#ibcon#*after write, iclass 3, count 2 2006.229.21:13:11.63#ibcon#*before return 0, iclass 3, count 2 2006.229.21:13:11.63#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:11.63#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:11.63#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.21:13:11.63#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:11.63#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:11.75#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:11.75#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:11.75#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:13:11.75#ibcon#first serial, iclass 3, count 0 2006.229.21:13:11.75#ibcon#enter sib2, iclass 3, count 0 2006.229.21:13:11.75#ibcon#flushed, iclass 3, count 0 2006.229.21:13:11.75#ibcon#about to write, iclass 3, count 0 2006.229.21:13:11.75#ibcon#wrote, iclass 3, count 0 2006.229.21:13:11.75#ibcon#about to read 3, iclass 3, count 0 2006.229.21:13:11.77#ibcon#read 3, iclass 3, count 0 2006.229.21:13:11.77#ibcon#about to read 4, iclass 3, count 0 2006.229.21:13:11.77#ibcon#read 4, iclass 3, count 0 2006.229.21:13:11.77#ibcon#about to read 5, iclass 3, count 0 2006.229.21:13:11.77#ibcon#read 5, iclass 3, count 0 2006.229.21:13:11.77#ibcon#about to read 6, iclass 3, count 0 2006.229.21:13:11.77#ibcon#read 6, iclass 3, count 0 2006.229.21:13:11.77#ibcon#end of sib2, iclass 3, count 0 2006.229.21:13:11.77#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:13:11.77#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:13:11.77#ibcon#[25=USB\r\n] 2006.229.21:13:11.77#ibcon#*before write, iclass 3, count 0 2006.229.21:13:11.77#ibcon#enter sib2, iclass 3, count 0 2006.229.21:13:11.77#ibcon#flushed, iclass 3, count 0 2006.229.21:13:11.77#ibcon#about to write, iclass 3, count 0 2006.229.21:13:11.77#ibcon#wrote, iclass 3, count 0 2006.229.21:13:11.77#ibcon#about to read 3, iclass 3, count 0 2006.229.21:13:11.80#ibcon#read 3, iclass 3, count 0 2006.229.21:13:11.80#ibcon#about to read 4, iclass 3, count 0 2006.229.21:13:11.80#ibcon#read 4, iclass 3, count 0 2006.229.21:13:11.80#ibcon#about to read 5, iclass 3, count 0 2006.229.21:13:11.80#ibcon#read 5, iclass 3, count 0 2006.229.21:13:11.80#ibcon#about to read 6, iclass 3, count 0 2006.229.21:13:11.80#ibcon#read 6, iclass 3, count 0 2006.229.21:13:11.80#ibcon#end of sib2, iclass 3, count 0 2006.229.21:13:11.80#ibcon#*after write, iclass 3, count 0 2006.229.21:13:11.80#ibcon#*before return 0, iclass 3, count 0 2006.229.21:13:11.80#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:11.80#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:11.80#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:13:11.80#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:13:11.80$vck44/valo=3,564.99 2006.229.21:13:11.80#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.21:13:11.80#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.21:13:11.80#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:11.80#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:11.80#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:11.80#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:11.80#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:13:11.80#ibcon#first serial, iclass 5, count 0 2006.229.21:13:11.80#ibcon#enter sib2, iclass 5, count 0 2006.229.21:13:11.80#ibcon#flushed, iclass 5, count 0 2006.229.21:13:11.80#ibcon#about to write, iclass 5, count 0 2006.229.21:13:11.80#ibcon#wrote, iclass 5, count 0 2006.229.21:13:11.80#ibcon#about to read 3, iclass 5, count 0 2006.229.21:13:11.82#ibcon#read 3, iclass 5, count 0 2006.229.21:13:11.82#ibcon#about to read 4, iclass 5, count 0 2006.229.21:13:11.82#ibcon#read 4, iclass 5, count 0 2006.229.21:13:11.82#ibcon#about to read 5, iclass 5, count 0 2006.229.21:13:11.82#ibcon#read 5, iclass 5, count 0 2006.229.21:13:11.82#ibcon#about to read 6, iclass 5, count 0 2006.229.21:13:11.82#ibcon#read 6, iclass 5, count 0 2006.229.21:13:11.82#ibcon#end of sib2, iclass 5, count 0 2006.229.21:13:11.82#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:13:11.82#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:13:11.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:13:11.82#ibcon#*before write, iclass 5, count 0 2006.229.21:13:11.82#ibcon#enter sib2, iclass 5, count 0 2006.229.21:13:11.82#ibcon#flushed, iclass 5, count 0 2006.229.21:13:11.82#ibcon#about to write, iclass 5, count 0 2006.229.21:13:11.82#ibcon#wrote, iclass 5, count 0 2006.229.21:13:11.82#ibcon#about to read 3, iclass 5, count 0 2006.229.21:13:11.86#ibcon#read 3, iclass 5, count 0 2006.229.21:13:11.86#ibcon#about to read 4, iclass 5, count 0 2006.229.21:13:11.86#ibcon#read 4, iclass 5, count 0 2006.229.21:13:11.86#ibcon#about to read 5, iclass 5, count 0 2006.229.21:13:11.86#ibcon#read 5, iclass 5, count 0 2006.229.21:13:11.86#ibcon#about to read 6, iclass 5, count 0 2006.229.21:13:11.86#ibcon#read 6, iclass 5, count 0 2006.229.21:13:11.86#ibcon#end of sib2, iclass 5, count 0 2006.229.21:13:11.86#ibcon#*after write, iclass 5, count 0 2006.229.21:13:11.86#ibcon#*before return 0, iclass 5, count 0 2006.229.21:13:11.86#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:11.86#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:11.86#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:13:11.86#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:13:11.86$vck44/va=3,6 2006.229.21:13:11.86#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.21:13:11.86#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.21:13:11.86#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:11.86#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:11.92#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:11.92#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:11.92#ibcon#enter wrdev, iclass 7, count 2 2006.229.21:13:11.92#ibcon#first serial, iclass 7, count 2 2006.229.21:13:11.92#ibcon#enter sib2, iclass 7, count 2 2006.229.21:13:11.92#ibcon#flushed, iclass 7, count 2 2006.229.21:13:11.92#ibcon#about to write, iclass 7, count 2 2006.229.21:13:11.92#ibcon#wrote, iclass 7, count 2 2006.229.21:13:11.92#ibcon#about to read 3, iclass 7, count 2 2006.229.21:13:11.94#ibcon#read 3, iclass 7, count 2 2006.229.21:13:11.94#ibcon#about to read 4, iclass 7, count 2 2006.229.21:13:11.94#ibcon#read 4, iclass 7, count 2 2006.229.21:13:11.94#ibcon#about to read 5, iclass 7, count 2 2006.229.21:13:11.94#ibcon#read 5, iclass 7, count 2 2006.229.21:13:11.94#ibcon#about to read 6, iclass 7, count 2 2006.229.21:13:11.94#ibcon#read 6, iclass 7, count 2 2006.229.21:13:11.94#ibcon#end of sib2, iclass 7, count 2 2006.229.21:13:11.94#ibcon#*mode == 0, iclass 7, count 2 2006.229.21:13:11.94#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.21:13:11.94#ibcon#[25=AT03-06\r\n] 2006.229.21:13:11.94#ibcon#*before write, iclass 7, count 2 2006.229.21:13:11.94#ibcon#enter sib2, iclass 7, count 2 2006.229.21:13:11.94#ibcon#flushed, iclass 7, count 2 2006.229.21:13:11.94#ibcon#about to write, iclass 7, count 2 2006.229.21:13:11.94#ibcon#wrote, iclass 7, count 2 2006.229.21:13:11.94#ibcon#about to read 3, iclass 7, count 2 2006.229.21:13:11.97#ibcon#read 3, iclass 7, count 2 2006.229.21:13:11.97#ibcon#about to read 4, iclass 7, count 2 2006.229.21:13:11.97#ibcon#read 4, iclass 7, count 2 2006.229.21:13:11.97#ibcon#about to read 5, iclass 7, count 2 2006.229.21:13:11.97#ibcon#read 5, iclass 7, count 2 2006.229.21:13:11.97#ibcon#about to read 6, iclass 7, count 2 2006.229.21:13:11.97#ibcon#read 6, iclass 7, count 2 2006.229.21:13:11.97#ibcon#end of sib2, iclass 7, count 2 2006.229.21:13:11.97#ibcon#*after write, iclass 7, count 2 2006.229.21:13:11.97#ibcon#*before return 0, iclass 7, count 2 2006.229.21:13:11.97#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:11.97#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:11.97#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.21:13:11.97#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:11.97#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:12.09#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:12.09#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:12.09#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:13:12.09#ibcon#first serial, iclass 7, count 0 2006.229.21:13:12.09#ibcon#enter sib2, iclass 7, count 0 2006.229.21:13:12.09#ibcon#flushed, iclass 7, count 0 2006.229.21:13:12.09#ibcon#about to write, iclass 7, count 0 2006.229.21:13:12.09#ibcon#wrote, iclass 7, count 0 2006.229.21:13:12.09#ibcon#about to read 3, iclass 7, count 0 2006.229.21:13:12.11#ibcon#read 3, iclass 7, count 0 2006.229.21:13:12.11#ibcon#about to read 4, iclass 7, count 0 2006.229.21:13:12.11#ibcon#read 4, iclass 7, count 0 2006.229.21:13:12.11#ibcon#about to read 5, iclass 7, count 0 2006.229.21:13:12.11#ibcon#read 5, iclass 7, count 0 2006.229.21:13:12.11#ibcon#about to read 6, iclass 7, count 0 2006.229.21:13:12.11#ibcon#read 6, iclass 7, count 0 2006.229.21:13:12.11#ibcon#end of sib2, iclass 7, count 0 2006.229.21:13:12.11#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:13:12.11#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:13:12.11#ibcon#[25=USB\r\n] 2006.229.21:13:12.11#ibcon#*before write, iclass 7, count 0 2006.229.21:13:12.11#ibcon#enter sib2, iclass 7, count 0 2006.229.21:13:12.11#ibcon#flushed, iclass 7, count 0 2006.229.21:13:12.11#ibcon#about to write, iclass 7, count 0 2006.229.21:13:12.11#ibcon#wrote, iclass 7, count 0 2006.229.21:13:12.11#ibcon#about to read 3, iclass 7, count 0 2006.229.21:13:12.14#ibcon#read 3, iclass 7, count 0 2006.229.21:13:12.14#ibcon#about to read 4, iclass 7, count 0 2006.229.21:13:12.14#ibcon#read 4, iclass 7, count 0 2006.229.21:13:12.14#ibcon#about to read 5, iclass 7, count 0 2006.229.21:13:12.14#ibcon#read 5, iclass 7, count 0 2006.229.21:13:12.14#ibcon#about to read 6, iclass 7, count 0 2006.229.21:13:12.14#ibcon#read 6, iclass 7, count 0 2006.229.21:13:12.14#ibcon#end of sib2, iclass 7, count 0 2006.229.21:13:12.14#ibcon#*after write, iclass 7, count 0 2006.229.21:13:12.14#ibcon#*before return 0, iclass 7, count 0 2006.229.21:13:12.14#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:12.14#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:12.14#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:13:12.14#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:13:12.14$vck44/valo=4,624.99 2006.229.21:13:12.14#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.21:13:12.14#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.21:13:12.14#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:12.14#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:12.14#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:12.14#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:12.14#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:13:12.14#ibcon#first serial, iclass 11, count 0 2006.229.21:13:12.14#ibcon#enter sib2, iclass 11, count 0 2006.229.21:13:12.14#ibcon#flushed, iclass 11, count 0 2006.229.21:13:12.14#ibcon#about to write, iclass 11, count 0 2006.229.21:13:12.14#ibcon#wrote, iclass 11, count 0 2006.229.21:13:12.14#ibcon#about to read 3, iclass 11, count 0 2006.229.21:13:12.16#ibcon#read 3, iclass 11, count 0 2006.229.21:13:12.16#ibcon#about to read 4, iclass 11, count 0 2006.229.21:13:12.16#ibcon#read 4, iclass 11, count 0 2006.229.21:13:12.16#ibcon#about to read 5, iclass 11, count 0 2006.229.21:13:12.16#ibcon#read 5, iclass 11, count 0 2006.229.21:13:12.16#ibcon#about to read 6, iclass 11, count 0 2006.229.21:13:12.16#ibcon#read 6, iclass 11, count 0 2006.229.21:13:12.16#ibcon#end of sib2, iclass 11, count 0 2006.229.21:13:12.16#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:13:12.16#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:13:12.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:13:12.16#ibcon#*before write, iclass 11, count 0 2006.229.21:13:12.16#ibcon#enter sib2, iclass 11, count 0 2006.229.21:13:12.16#ibcon#flushed, iclass 11, count 0 2006.229.21:13:12.16#ibcon#about to write, iclass 11, count 0 2006.229.21:13:12.16#ibcon#wrote, iclass 11, count 0 2006.229.21:13:12.16#ibcon#about to read 3, iclass 11, count 0 2006.229.21:13:12.20#ibcon#read 3, iclass 11, count 0 2006.229.21:13:12.20#ibcon#about to read 4, iclass 11, count 0 2006.229.21:13:12.20#ibcon#read 4, iclass 11, count 0 2006.229.21:13:12.20#ibcon#about to read 5, iclass 11, count 0 2006.229.21:13:12.20#ibcon#read 5, iclass 11, count 0 2006.229.21:13:12.20#ibcon#about to read 6, iclass 11, count 0 2006.229.21:13:12.20#ibcon#read 6, iclass 11, count 0 2006.229.21:13:12.20#ibcon#end of sib2, iclass 11, count 0 2006.229.21:13:12.20#ibcon#*after write, iclass 11, count 0 2006.229.21:13:12.20#ibcon#*before return 0, iclass 11, count 0 2006.229.21:13:12.20#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:12.20#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:12.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:13:12.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:13:12.20$vck44/va=4,7 2006.229.21:13:12.20#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.21:13:12.20#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.21:13:12.20#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:12.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:12.26#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:12.26#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:12.26#ibcon#enter wrdev, iclass 13, count 2 2006.229.21:13:12.26#ibcon#first serial, iclass 13, count 2 2006.229.21:13:12.26#ibcon#enter sib2, iclass 13, count 2 2006.229.21:13:12.26#ibcon#flushed, iclass 13, count 2 2006.229.21:13:12.26#ibcon#about to write, iclass 13, count 2 2006.229.21:13:12.26#ibcon#wrote, iclass 13, count 2 2006.229.21:13:12.26#ibcon#about to read 3, iclass 13, count 2 2006.229.21:13:12.28#ibcon#read 3, iclass 13, count 2 2006.229.21:13:12.28#ibcon#about to read 4, iclass 13, count 2 2006.229.21:13:12.28#ibcon#read 4, iclass 13, count 2 2006.229.21:13:12.28#ibcon#about to read 5, iclass 13, count 2 2006.229.21:13:12.28#ibcon#read 5, iclass 13, count 2 2006.229.21:13:12.28#ibcon#about to read 6, iclass 13, count 2 2006.229.21:13:12.28#ibcon#read 6, iclass 13, count 2 2006.229.21:13:12.28#ibcon#end of sib2, iclass 13, count 2 2006.229.21:13:12.28#ibcon#*mode == 0, iclass 13, count 2 2006.229.21:13:12.28#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.21:13:12.28#ibcon#[25=AT04-07\r\n] 2006.229.21:13:12.28#ibcon#*before write, iclass 13, count 2 2006.229.21:13:12.28#ibcon#enter sib2, iclass 13, count 2 2006.229.21:13:12.28#ibcon#flushed, iclass 13, count 2 2006.229.21:13:12.28#ibcon#about to write, iclass 13, count 2 2006.229.21:13:12.28#ibcon#wrote, iclass 13, count 2 2006.229.21:13:12.28#ibcon#about to read 3, iclass 13, count 2 2006.229.21:13:12.31#ibcon#read 3, iclass 13, count 2 2006.229.21:13:12.31#ibcon#about to read 4, iclass 13, count 2 2006.229.21:13:12.31#ibcon#read 4, iclass 13, count 2 2006.229.21:13:12.31#ibcon#about to read 5, iclass 13, count 2 2006.229.21:13:12.31#ibcon#read 5, iclass 13, count 2 2006.229.21:13:12.31#ibcon#about to read 6, iclass 13, count 2 2006.229.21:13:12.31#ibcon#read 6, iclass 13, count 2 2006.229.21:13:12.31#ibcon#end of sib2, iclass 13, count 2 2006.229.21:13:12.31#ibcon#*after write, iclass 13, count 2 2006.229.21:13:12.31#ibcon#*before return 0, iclass 13, count 2 2006.229.21:13:12.31#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:12.31#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:12.31#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.21:13:12.31#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:12.31#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:12.43#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:12.43#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:12.43#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:13:12.43#ibcon#first serial, iclass 13, count 0 2006.229.21:13:12.43#ibcon#enter sib2, iclass 13, count 0 2006.229.21:13:12.43#ibcon#flushed, iclass 13, count 0 2006.229.21:13:12.43#ibcon#about to write, iclass 13, count 0 2006.229.21:13:12.43#ibcon#wrote, iclass 13, count 0 2006.229.21:13:12.43#ibcon#about to read 3, iclass 13, count 0 2006.229.21:13:12.45#ibcon#read 3, iclass 13, count 0 2006.229.21:13:12.45#ibcon#about to read 4, iclass 13, count 0 2006.229.21:13:12.45#ibcon#read 4, iclass 13, count 0 2006.229.21:13:12.45#ibcon#about to read 5, iclass 13, count 0 2006.229.21:13:12.45#ibcon#read 5, iclass 13, count 0 2006.229.21:13:12.45#ibcon#about to read 6, iclass 13, count 0 2006.229.21:13:12.45#ibcon#read 6, iclass 13, count 0 2006.229.21:13:12.45#ibcon#end of sib2, iclass 13, count 0 2006.229.21:13:12.45#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:13:12.45#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:13:12.45#ibcon#[25=USB\r\n] 2006.229.21:13:12.45#ibcon#*before write, iclass 13, count 0 2006.229.21:13:12.45#ibcon#enter sib2, iclass 13, count 0 2006.229.21:13:12.45#ibcon#flushed, iclass 13, count 0 2006.229.21:13:12.45#ibcon#about to write, iclass 13, count 0 2006.229.21:13:12.45#ibcon#wrote, iclass 13, count 0 2006.229.21:13:12.45#ibcon#about to read 3, iclass 13, count 0 2006.229.21:13:12.48#ibcon#read 3, iclass 13, count 0 2006.229.21:13:12.48#ibcon#about to read 4, iclass 13, count 0 2006.229.21:13:12.48#ibcon#read 4, iclass 13, count 0 2006.229.21:13:12.48#ibcon#about to read 5, iclass 13, count 0 2006.229.21:13:12.48#ibcon#read 5, iclass 13, count 0 2006.229.21:13:12.48#ibcon#about to read 6, iclass 13, count 0 2006.229.21:13:12.48#ibcon#read 6, iclass 13, count 0 2006.229.21:13:12.48#ibcon#end of sib2, iclass 13, count 0 2006.229.21:13:12.48#ibcon#*after write, iclass 13, count 0 2006.229.21:13:12.48#ibcon#*before return 0, iclass 13, count 0 2006.229.21:13:12.48#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:12.48#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:12.48#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:13:12.48#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:13:12.48$vck44/valo=5,734.99 2006.229.21:13:12.48#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.21:13:12.48#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.21:13:12.48#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:12.48#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:12.48#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:12.48#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:12.48#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:13:12.48#ibcon#first serial, iclass 15, count 0 2006.229.21:13:12.48#ibcon#enter sib2, iclass 15, count 0 2006.229.21:13:12.48#ibcon#flushed, iclass 15, count 0 2006.229.21:13:12.48#ibcon#about to write, iclass 15, count 0 2006.229.21:13:12.48#ibcon#wrote, iclass 15, count 0 2006.229.21:13:12.48#ibcon#about to read 3, iclass 15, count 0 2006.229.21:13:12.50#ibcon#read 3, iclass 15, count 0 2006.229.21:13:12.50#ibcon#about to read 4, iclass 15, count 0 2006.229.21:13:12.50#ibcon#read 4, iclass 15, count 0 2006.229.21:13:12.50#ibcon#about to read 5, iclass 15, count 0 2006.229.21:13:12.50#ibcon#read 5, iclass 15, count 0 2006.229.21:13:12.50#ibcon#about to read 6, iclass 15, count 0 2006.229.21:13:12.50#ibcon#read 6, iclass 15, count 0 2006.229.21:13:12.50#ibcon#end of sib2, iclass 15, count 0 2006.229.21:13:12.50#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:13:12.50#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:13:12.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:13:12.50#ibcon#*before write, iclass 15, count 0 2006.229.21:13:12.50#ibcon#enter sib2, iclass 15, count 0 2006.229.21:13:12.50#ibcon#flushed, iclass 15, count 0 2006.229.21:13:12.50#ibcon#about to write, iclass 15, count 0 2006.229.21:13:12.50#ibcon#wrote, iclass 15, count 0 2006.229.21:13:12.50#ibcon#about to read 3, iclass 15, count 0 2006.229.21:13:12.54#ibcon#read 3, iclass 15, count 0 2006.229.21:13:12.54#ibcon#about to read 4, iclass 15, count 0 2006.229.21:13:12.54#ibcon#read 4, iclass 15, count 0 2006.229.21:13:12.54#ibcon#about to read 5, iclass 15, count 0 2006.229.21:13:12.54#ibcon#read 5, iclass 15, count 0 2006.229.21:13:12.54#ibcon#about to read 6, iclass 15, count 0 2006.229.21:13:12.54#ibcon#read 6, iclass 15, count 0 2006.229.21:13:12.54#ibcon#end of sib2, iclass 15, count 0 2006.229.21:13:12.54#ibcon#*after write, iclass 15, count 0 2006.229.21:13:12.54#ibcon#*before return 0, iclass 15, count 0 2006.229.21:13:12.54#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:12.54#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:12.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:13:12.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:13:12.54$vck44/va=5,4 2006.229.21:13:12.54#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.21:13:12.54#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.21:13:12.54#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:12.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:12.60#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:12.60#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:12.60#ibcon#enter wrdev, iclass 17, count 2 2006.229.21:13:12.60#ibcon#first serial, iclass 17, count 2 2006.229.21:13:12.60#ibcon#enter sib2, iclass 17, count 2 2006.229.21:13:12.60#ibcon#flushed, iclass 17, count 2 2006.229.21:13:12.60#ibcon#about to write, iclass 17, count 2 2006.229.21:13:12.60#ibcon#wrote, iclass 17, count 2 2006.229.21:13:12.60#ibcon#about to read 3, iclass 17, count 2 2006.229.21:13:12.62#ibcon#read 3, iclass 17, count 2 2006.229.21:13:12.62#ibcon#about to read 4, iclass 17, count 2 2006.229.21:13:12.62#ibcon#read 4, iclass 17, count 2 2006.229.21:13:12.62#ibcon#about to read 5, iclass 17, count 2 2006.229.21:13:12.62#ibcon#read 5, iclass 17, count 2 2006.229.21:13:12.62#ibcon#about to read 6, iclass 17, count 2 2006.229.21:13:12.62#ibcon#read 6, iclass 17, count 2 2006.229.21:13:12.62#ibcon#end of sib2, iclass 17, count 2 2006.229.21:13:12.62#ibcon#*mode == 0, iclass 17, count 2 2006.229.21:13:12.62#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.21:13:12.62#ibcon#[25=AT05-04\r\n] 2006.229.21:13:12.62#ibcon#*before write, iclass 17, count 2 2006.229.21:13:12.62#ibcon#enter sib2, iclass 17, count 2 2006.229.21:13:12.62#ibcon#flushed, iclass 17, count 2 2006.229.21:13:12.62#ibcon#about to write, iclass 17, count 2 2006.229.21:13:12.62#ibcon#wrote, iclass 17, count 2 2006.229.21:13:12.62#ibcon#about to read 3, iclass 17, count 2 2006.229.21:13:12.65#ibcon#read 3, iclass 17, count 2 2006.229.21:13:12.65#ibcon#about to read 4, iclass 17, count 2 2006.229.21:13:12.65#ibcon#read 4, iclass 17, count 2 2006.229.21:13:12.65#ibcon#about to read 5, iclass 17, count 2 2006.229.21:13:12.65#ibcon#read 5, iclass 17, count 2 2006.229.21:13:12.65#ibcon#about to read 6, iclass 17, count 2 2006.229.21:13:12.65#ibcon#read 6, iclass 17, count 2 2006.229.21:13:12.65#ibcon#end of sib2, iclass 17, count 2 2006.229.21:13:12.65#ibcon#*after write, iclass 17, count 2 2006.229.21:13:12.65#ibcon#*before return 0, iclass 17, count 2 2006.229.21:13:12.65#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:12.65#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:12.65#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.21:13:12.65#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:12.65#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:12.77#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:12.77#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:12.77#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:13:12.77#ibcon#first serial, iclass 17, count 0 2006.229.21:13:12.77#ibcon#enter sib2, iclass 17, count 0 2006.229.21:13:12.77#ibcon#flushed, iclass 17, count 0 2006.229.21:13:12.77#ibcon#about to write, iclass 17, count 0 2006.229.21:13:12.77#ibcon#wrote, iclass 17, count 0 2006.229.21:13:12.77#ibcon#about to read 3, iclass 17, count 0 2006.229.21:13:12.79#ibcon#read 3, iclass 17, count 0 2006.229.21:13:12.79#ibcon#about to read 4, iclass 17, count 0 2006.229.21:13:12.79#ibcon#read 4, iclass 17, count 0 2006.229.21:13:12.79#ibcon#about to read 5, iclass 17, count 0 2006.229.21:13:12.79#ibcon#read 5, iclass 17, count 0 2006.229.21:13:12.79#ibcon#about to read 6, iclass 17, count 0 2006.229.21:13:12.79#ibcon#read 6, iclass 17, count 0 2006.229.21:13:12.79#ibcon#end of sib2, iclass 17, count 0 2006.229.21:13:12.79#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:13:12.79#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:13:12.79#ibcon#[25=USB\r\n] 2006.229.21:13:12.79#ibcon#*before write, iclass 17, count 0 2006.229.21:13:12.79#ibcon#enter sib2, iclass 17, count 0 2006.229.21:13:12.79#ibcon#flushed, iclass 17, count 0 2006.229.21:13:12.79#ibcon#about to write, iclass 17, count 0 2006.229.21:13:12.79#ibcon#wrote, iclass 17, count 0 2006.229.21:13:12.79#ibcon#about to read 3, iclass 17, count 0 2006.229.21:13:12.82#ibcon#read 3, iclass 17, count 0 2006.229.21:13:12.82#ibcon#about to read 4, iclass 17, count 0 2006.229.21:13:12.82#ibcon#read 4, iclass 17, count 0 2006.229.21:13:12.82#ibcon#about to read 5, iclass 17, count 0 2006.229.21:13:12.82#ibcon#read 5, iclass 17, count 0 2006.229.21:13:12.82#ibcon#about to read 6, iclass 17, count 0 2006.229.21:13:12.82#ibcon#read 6, iclass 17, count 0 2006.229.21:13:12.82#ibcon#end of sib2, iclass 17, count 0 2006.229.21:13:12.82#ibcon#*after write, iclass 17, count 0 2006.229.21:13:12.82#ibcon#*before return 0, iclass 17, count 0 2006.229.21:13:12.82#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:12.82#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:12.82#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:13:12.82#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:13:12.82$vck44/valo=6,814.99 2006.229.21:13:12.82#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.21:13:12.82#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.21:13:12.82#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:12.82#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:12.82#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:12.82#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:12.82#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:13:12.82#ibcon#first serial, iclass 19, count 0 2006.229.21:13:12.82#ibcon#enter sib2, iclass 19, count 0 2006.229.21:13:12.82#ibcon#flushed, iclass 19, count 0 2006.229.21:13:12.82#ibcon#about to write, iclass 19, count 0 2006.229.21:13:12.82#ibcon#wrote, iclass 19, count 0 2006.229.21:13:12.82#ibcon#about to read 3, iclass 19, count 0 2006.229.21:13:12.84#ibcon#read 3, iclass 19, count 0 2006.229.21:13:12.84#ibcon#about to read 4, iclass 19, count 0 2006.229.21:13:12.84#ibcon#read 4, iclass 19, count 0 2006.229.21:13:12.84#ibcon#about to read 5, iclass 19, count 0 2006.229.21:13:12.84#ibcon#read 5, iclass 19, count 0 2006.229.21:13:12.84#ibcon#about to read 6, iclass 19, count 0 2006.229.21:13:12.84#ibcon#read 6, iclass 19, count 0 2006.229.21:13:12.84#ibcon#end of sib2, iclass 19, count 0 2006.229.21:13:12.84#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:13:12.84#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:13:12.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:13:12.84#ibcon#*before write, iclass 19, count 0 2006.229.21:13:12.84#ibcon#enter sib2, iclass 19, count 0 2006.229.21:13:12.84#ibcon#flushed, iclass 19, count 0 2006.229.21:13:12.84#ibcon#about to write, iclass 19, count 0 2006.229.21:13:12.84#ibcon#wrote, iclass 19, count 0 2006.229.21:13:12.84#ibcon#about to read 3, iclass 19, count 0 2006.229.21:13:12.88#ibcon#read 3, iclass 19, count 0 2006.229.21:13:12.88#ibcon#about to read 4, iclass 19, count 0 2006.229.21:13:12.88#ibcon#read 4, iclass 19, count 0 2006.229.21:13:12.88#ibcon#about to read 5, iclass 19, count 0 2006.229.21:13:12.88#ibcon#read 5, iclass 19, count 0 2006.229.21:13:12.88#ibcon#about to read 6, iclass 19, count 0 2006.229.21:13:12.88#ibcon#read 6, iclass 19, count 0 2006.229.21:13:12.88#ibcon#end of sib2, iclass 19, count 0 2006.229.21:13:12.88#ibcon#*after write, iclass 19, count 0 2006.229.21:13:12.88#ibcon#*before return 0, iclass 19, count 0 2006.229.21:13:12.88#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:12.88#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:12.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:13:12.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:13:12.88$vck44/va=6,4 2006.229.21:13:12.88#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.21:13:12.88#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.21:13:12.88#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:12.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:12.94#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:12.94#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:12.94#ibcon#enter wrdev, iclass 21, count 2 2006.229.21:13:12.94#ibcon#first serial, iclass 21, count 2 2006.229.21:13:12.94#ibcon#enter sib2, iclass 21, count 2 2006.229.21:13:12.94#ibcon#flushed, iclass 21, count 2 2006.229.21:13:12.94#ibcon#about to write, iclass 21, count 2 2006.229.21:13:12.94#ibcon#wrote, iclass 21, count 2 2006.229.21:13:12.94#ibcon#about to read 3, iclass 21, count 2 2006.229.21:13:12.96#ibcon#read 3, iclass 21, count 2 2006.229.21:13:12.96#ibcon#about to read 4, iclass 21, count 2 2006.229.21:13:12.96#ibcon#read 4, iclass 21, count 2 2006.229.21:13:12.96#ibcon#about to read 5, iclass 21, count 2 2006.229.21:13:12.96#ibcon#read 5, iclass 21, count 2 2006.229.21:13:12.96#ibcon#about to read 6, iclass 21, count 2 2006.229.21:13:12.96#ibcon#read 6, iclass 21, count 2 2006.229.21:13:12.96#ibcon#end of sib2, iclass 21, count 2 2006.229.21:13:12.96#ibcon#*mode == 0, iclass 21, count 2 2006.229.21:13:12.96#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.21:13:12.96#ibcon#[25=AT06-04\r\n] 2006.229.21:13:12.96#ibcon#*before write, iclass 21, count 2 2006.229.21:13:12.96#ibcon#enter sib2, iclass 21, count 2 2006.229.21:13:12.96#ibcon#flushed, iclass 21, count 2 2006.229.21:13:12.96#ibcon#about to write, iclass 21, count 2 2006.229.21:13:12.96#ibcon#wrote, iclass 21, count 2 2006.229.21:13:12.96#ibcon#about to read 3, iclass 21, count 2 2006.229.21:13:12.99#ibcon#read 3, iclass 21, count 2 2006.229.21:13:12.99#ibcon#about to read 4, iclass 21, count 2 2006.229.21:13:12.99#ibcon#read 4, iclass 21, count 2 2006.229.21:13:12.99#ibcon#about to read 5, iclass 21, count 2 2006.229.21:13:12.99#ibcon#read 5, iclass 21, count 2 2006.229.21:13:12.99#ibcon#about to read 6, iclass 21, count 2 2006.229.21:13:12.99#ibcon#read 6, iclass 21, count 2 2006.229.21:13:12.99#ibcon#end of sib2, iclass 21, count 2 2006.229.21:13:12.99#ibcon#*after write, iclass 21, count 2 2006.229.21:13:12.99#ibcon#*before return 0, iclass 21, count 2 2006.229.21:13:12.99#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:12.99#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:12.99#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.21:13:12.99#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:12.99#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:13.11#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:13.11#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:13.11#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:13:13.11#ibcon#first serial, iclass 21, count 0 2006.229.21:13:13.11#ibcon#enter sib2, iclass 21, count 0 2006.229.21:13:13.11#ibcon#flushed, iclass 21, count 0 2006.229.21:13:13.11#ibcon#about to write, iclass 21, count 0 2006.229.21:13:13.11#ibcon#wrote, iclass 21, count 0 2006.229.21:13:13.11#ibcon#about to read 3, iclass 21, count 0 2006.229.21:13:13.13#ibcon#read 3, iclass 21, count 0 2006.229.21:13:13.13#ibcon#about to read 4, iclass 21, count 0 2006.229.21:13:13.13#ibcon#read 4, iclass 21, count 0 2006.229.21:13:13.13#ibcon#about to read 5, iclass 21, count 0 2006.229.21:13:13.13#ibcon#read 5, iclass 21, count 0 2006.229.21:13:13.13#ibcon#about to read 6, iclass 21, count 0 2006.229.21:13:13.13#ibcon#read 6, iclass 21, count 0 2006.229.21:13:13.13#ibcon#end of sib2, iclass 21, count 0 2006.229.21:13:13.13#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:13:13.13#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:13:13.13#ibcon#[25=USB\r\n] 2006.229.21:13:13.13#ibcon#*before write, iclass 21, count 0 2006.229.21:13:13.13#ibcon#enter sib2, iclass 21, count 0 2006.229.21:13:13.13#ibcon#flushed, iclass 21, count 0 2006.229.21:13:13.13#ibcon#about to write, iclass 21, count 0 2006.229.21:13:13.13#ibcon#wrote, iclass 21, count 0 2006.229.21:13:13.13#ibcon#about to read 3, iclass 21, count 0 2006.229.21:13:13.16#ibcon#read 3, iclass 21, count 0 2006.229.21:13:13.16#ibcon#about to read 4, iclass 21, count 0 2006.229.21:13:13.16#ibcon#read 4, iclass 21, count 0 2006.229.21:13:13.16#ibcon#about to read 5, iclass 21, count 0 2006.229.21:13:13.16#ibcon#read 5, iclass 21, count 0 2006.229.21:13:13.16#ibcon#about to read 6, iclass 21, count 0 2006.229.21:13:13.16#ibcon#read 6, iclass 21, count 0 2006.229.21:13:13.16#ibcon#end of sib2, iclass 21, count 0 2006.229.21:13:13.16#ibcon#*after write, iclass 21, count 0 2006.229.21:13:13.16#ibcon#*before return 0, iclass 21, count 0 2006.229.21:13:13.16#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:13.16#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:13.16#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:13:13.16#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:13:13.16$vck44/valo=7,864.99 2006.229.21:13:13.16#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.21:13:13.16#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.21:13:13.16#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:13.16#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:13.16#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:13.16#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:13.16#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:13:13.16#ibcon#first serial, iclass 23, count 0 2006.229.21:13:13.16#ibcon#enter sib2, iclass 23, count 0 2006.229.21:13:13.16#ibcon#flushed, iclass 23, count 0 2006.229.21:13:13.16#ibcon#about to write, iclass 23, count 0 2006.229.21:13:13.16#ibcon#wrote, iclass 23, count 0 2006.229.21:13:13.16#ibcon#about to read 3, iclass 23, count 0 2006.229.21:13:13.18#ibcon#read 3, iclass 23, count 0 2006.229.21:13:13.18#ibcon#about to read 4, iclass 23, count 0 2006.229.21:13:13.18#ibcon#read 4, iclass 23, count 0 2006.229.21:13:13.18#ibcon#about to read 5, iclass 23, count 0 2006.229.21:13:13.18#ibcon#read 5, iclass 23, count 0 2006.229.21:13:13.18#ibcon#about to read 6, iclass 23, count 0 2006.229.21:13:13.18#ibcon#read 6, iclass 23, count 0 2006.229.21:13:13.18#ibcon#end of sib2, iclass 23, count 0 2006.229.21:13:13.18#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:13:13.18#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:13:13.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:13:13.18#ibcon#*before write, iclass 23, count 0 2006.229.21:13:13.18#ibcon#enter sib2, iclass 23, count 0 2006.229.21:13:13.18#ibcon#flushed, iclass 23, count 0 2006.229.21:13:13.18#ibcon#about to write, iclass 23, count 0 2006.229.21:13:13.18#ibcon#wrote, iclass 23, count 0 2006.229.21:13:13.18#ibcon#about to read 3, iclass 23, count 0 2006.229.21:13:13.22#ibcon#read 3, iclass 23, count 0 2006.229.21:13:13.22#ibcon#about to read 4, iclass 23, count 0 2006.229.21:13:13.22#ibcon#read 4, iclass 23, count 0 2006.229.21:13:13.22#ibcon#about to read 5, iclass 23, count 0 2006.229.21:13:13.22#ibcon#read 5, iclass 23, count 0 2006.229.21:13:13.22#ibcon#about to read 6, iclass 23, count 0 2006.229.21:13:13.22#ibcon#read 6, iclass 23, count 0 2006.229.21:13:13.22#ibcon#end of sib2, iclass 23, count 0 2006.229.21:13:13.22#ibcon#*after write, iclass 23, count 0 2006.229.21:13:13.22#ibcon#*before return 0, iclass 23, count 0 2006.229.21:13:13.22#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:13.22#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:13.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:13:13.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:13:13.22$vck44/va=7,5 2006.229.21:13:13.22#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.21:13:13.22#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.21:13:13.22#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:13.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:13.28#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:13.28#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:13.28#ibcon#enter wrdev, iclass 25, count 2 2006.229.21:13:13.28#ibcon#first serial, iclass 25, count 2 2006.229.21:13:13.28#ibcon#enter sib2, iclass 25, count 2 2006.229.21:13:13.28#ibcon#flushed, iclass 25, count 2 2006.229.21:13:13.28#ibcon#about to write, iclass 25, count 2 2006.229.21:13:13.28#ibcon#wrote, iclass 25, count 2 2006.229.21:13:13.28#ibcon#about to read 3, iclass 25, count 2 2006.229.21:13:13.30#ibcon#read 3, iclass 25, count 2 2006.229.21:13:13.30#ibcon#about to read 4, iclass 25, count 2 2006.229.21:13:13.30#ibcon#read 4, iclass 25, count 2 2006.229.21:13:13.30#ibcon#about to read 5, iclass 25, count 2 2006.229.21:13:13.30#ibcon#read 5, iclass 25, count 2 2006.229.21:13:13.30#ibcon#about to read 6, iclass 25, count 2 2006.229.21:13:13.30#ibcon#read 6, iclass 25, count 2 2006.229.21:13:13.30#ibcon#end of sib2, iclass 25, count 2 2006.229.21:13:13.30#ibcon#*mode == 0, iclass 25, count 2 2006.229.21:13:13.30#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.21:13:13.30#ibcon#[25=AT07-05\r\n] 2006.229.21:13:13.30#ibcon#*before write, iclass 25, count 2 2006.229.21:13:13.30#ibcon#enter sib2, iclass 25, count 2 2006.229.21:13:13.30#ibcon#flushed, iclass 25, count 2 2006.229.21:13:13.30#ibcon#about to write, iclass 25, count 2 2006.229.21:13:13.30#ibcon#wrote, iclass 25, count 2 2006.229.21:13:13.30#ibcon#about to read 3, iclass 25, count 2 2006.229.21:13:13.33#ibcon#read 3, iclass 25, count 2 2006.229.21:13:13.33#ibcon#about to read 4, iclass 25, count 2 2006.229.21:13:13.33#ibcon#read 4, iclass 25, count 2 2006.229.21:13:13.33#ibcon#about to read 5, iclass 25, count 2 2006.229.21:13:13.33#ibcon#read 5, iclass 25, count 2 2006.229.21:13:13.33#ibcon#about to read 6, iclass 25, count 2 2006.229.21:13:13.33#ibcon#read 6, iclass 25, count 2 2006.229.21:13:13.33#ibcon#end of sib2, iclass 25, count 2 2006.229.21:13:13.33#ibcon#*after write, iclass 25, count 2 2006.229.21:13:13.33#ibcon#*before return 0, iclass 25, count 2 2006.229.21:13:13.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:13.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:13.33#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.21:13:13.33#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:13.33#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:13.45#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:13.45#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:13.45#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:13:13.45#ibcon#first serial, iclass 25, count 0 2006.229.21:13:13.45#ibcon#enter sib2, iclass 25, count 0 2006.229.21:13:13.45#ibcon#flushed, iclass 25, count 0 2006.229.21:13:13.45#ibcon#about to write, iclass 25, count 0 2006.229.21:13:13.45#ibcon#wrote, iclass 25, count 0 2006.229.21:13:13.45#ibcon#about to read 3, iclass 25, count 0 2006.229.21:13:13.47#ibcon#read 3, iclass 25, count 0 2006.229.21:13:13.47#ibcon#about to read 4, iclass 25, count 0 2006.229.21:13:13.47#ibcon#read 4, iclass 25, count 0 2006.229.21:13:13.47#ibcon#about to read 5, iclass 25, count 0 2006.229.21:13:13.47#ibcon#read 5, iclass 25, count 0 2006.229.21:13:13.47#ibcon#about to read 6, iclass 25, count 0 2006.229.21:13:13.47#ibcon#read 6, iclass 25, count 0 2006.229.21:13:13.47#ibcon#end of sib2, iclass 25, count 0 2006.229.21:13:13.47#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:13:13.47#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:13:13.47#ibcon#[25=USB\r\n] 2006.229.21:13:13.47#ibcon#*before write, iclass 25, count 0 2006.229.21:13:13.47#ibcon#enter sib2, iclass 25, count 0 2006.229.21:13:13.47#ibcon#flushed, iclass 25, count 0 2006.229.21:13:13.47#ibcon#about to write, iclass 25, count 0 2006.229.21:13:13.47#ibcon#wrote, iclass 25, count 0 2006.229.21:13:13.47#ibcon#about to read 3, iclass 25, count 0 2006.229.21:13:13.50#ibcon#read 3, iclass 25, count 0 2006.229.21:13:13.50#ibcon#about to read 4, iclass 25, count 0 2006.229.21:13:13.50#ibcon#read 4, iclass 25, count 0 2006.229.21:13:13.50#ibcon#about to read 5, iclass 25, count 0 2006.229.21:13:13.50#ibcon#read 5, iclass 25, count 0 2006.229.21:13:13.50#ibcon#about to read 6, iclass 25, count 0 2006.229.21:13:13.50#ibcon#read 6, iclass 25, count 0 2006.229.21:13:13.50#ibcon#end of sib2, iclass 25, count 0 2006.229.21:13:13.50#ibcon#*after write, iclass 25, count 0 2006.229.21:13:13.50#ibcon#*before return 0, iclass 25, count 0 2006.229.21:13:13.50#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:13.50#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:13.50#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:13:13.50#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:13:13.50$vck44/valo=8,884.99 2006.229.21:13:13.50#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.21:13:13.50#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.21:13:13.50#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:13.50#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:13.50#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:13.50#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:13.50#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:13:13.50#ibcon#first serial, iclass 27, count 0 2006.229.21:13:13.50#ibcon#enter sib2, iclass 27, count 0 2006.229.21:13:13.50#ibcon#flushed, iclass 27, count 0 2006.229.21:13:13.50#ibcon#about to write, iclass 27, count 0 2006.229.21:13:13.50#ibcon#wrote, iclass 27, count 0 2006.229.21:13:13.50#ibcon#about to read 3, iclass 27, count 0 2006.229.21:13:13.52#ibcon#read 3, iclass 27, count 0 2006.229.21:13:13.52#ibcon#about to read 4, iclass 27, count 0 2006.229.21:13:13.52#ibcon#read 4, iclass 27, count 0 2006.229.21:13:13.52#ibcon#about to read 5, iclass 27, count 0 2006.229.21:13:13.52#ibcon#read 5, iclass 27, count 0 2006.229.21:13:13.52#ibcon#about to read 6, iclass 27, count 0 2006.229.21:13:13.52#ibcon#read 6, iclass 27, count 0 2006.229.21:13:13.52#ibcon#end of sib2, iclass 27, count 0 2006.229.21:13:13.52#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:13:13.52#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:13:13.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:13:13.52#ibcon#*before write, iclass 27, count 0 2006.229.21:13:13.52#ibcon#enter sib2, iclass 27, count 0 2006.229.21:13:13.52#ibcon#flushed, iclass 27, count 0 2006.229.21:13:13.52#ibcon#about to write, iclass 27, count 0 2006.229.21:13:13.52#ibcon#wrote, iclass 27, count 0 2006.229.21:13:13.52#ibcon#about to read 3, iclass 27, count 0 2006.229.21:13:13.56#ibcon#read 3, iclass 27, count 0 2006.229.21:13:13.56#ibcon#about to read 4, iclass 27, count 0 2006.229.21:13:13.56#ibcon#read 4, iclass 27, count 0 2006.229.21:13:13.56#ibcon#about to read 5, iclass 27, count 0 2006.229.21:13:13.56#ibcon#read 5, iclass 27, count 0 2006.229.21:13:13.56#ibcon#about to read 6, iclass 27, count 0 2006.229.21:13:13.56#ibcon#read 6, iclass 27, count 0 2006.229.21:13:13.56#ibcon#end of sib2, iclass 27, count 0 2006.229.21:13:13.56#ibcon#*after write, iclass 27, count 0 2006.229.21:13:13.56#ibcon#*before return 0, iclass 27, count 0 2006.229.21:13:13.56#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:13.56#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:13.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:13:13.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:13:13.56$vck44/va=8,6 2006.229.21:13:13.56#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.21:13:13.56#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.21:13:13.56#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:13.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:13:13.62#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:13:13.62#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:13:13.62#ibcon#enter wrdev, iclass 29, count 2 2006.229.21:13:13.62#ibcon#first serial, iclass 29, count 2 2006.229.21:13:13.62#ibcon#enter sib2, iclass 29, count 2 2006.229.21:13:13.62#ibcon#flushed, iclass 29, count 2 2006.229.21:13:13.62#ibcon#about to write, iclass 29, count 2 2006.229.21:13:13.62#ibcon#wrote, iclass 29, count 2 2006.229.21:13:13.62#ibcon#about to read 3, iclass 29, count 2 2006.229.21:13:13.64#ibcon#read 3, iclass 29, count 2 2006.229.21:13:13.64#ibcon#about to read 4, iclass 29, count 2 2006.229.21:13:13.64#ibcon#read 4, iclass 29, count 2 2006.229.21:13:13.64#ibcon#about to read 5, iclass 29, count 2 2006.229.21:13:13.64#ibcon#read 5, iclass 29, count 2 2006.229.21:13:13.64#ibcon#about to read 6, iclass 29, count 2 2006.229.21:13:13.64#ibcon#read 6, iclass 29, count 2 2006.229.21:13:13.64#ibcon#end of sib2, iclass 29, count 2 2006.229.21:13:13.64#ibcon#*mode == 0, iclass 29, count 2 2006.229.21:13:13.64#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.21:13:13.64#ibcon#[25=AT08-06\r\n] 2006.229.21:13:13.64#ibcon#*before write, iclass 29, count 2 2006.229.21:13:13.64#ibcon#enter sib2, iclass 29, count 2 2006.229.21:13:13.64#ibcon#flushed, iclass 29, count 2 2006.229.21:13:13.64#ibcon#about to write, iclass 29, count 2 2006.229.21:13:13.64#ibcon#wrote, iclass 29, count 2 2006.229.21:13:13.64#ibcon#about to read 3, iclass 29, count 2 2006.229.21:13:13.67#ibcon#read 3, iclass 29, count 2 2006.229.21:13:13.67#ibcon#about to read 4, iclass 29, count 2 2006.229.21:13:13.67#ibcon#read 4, iclass 29, count 2 2006.229.21:13:13.67#ibcon#about to read 5, iclass 29, count 2 2006.229.21:13:13.67#ibcon#read 5, iclass 29, count 2 2006.229.21:13:13.67#ibcon#about to read 6, iclass 29, count 2 2006.229.21:13:13.67#ibcon#read 6, iclass 29, count 2 2006.229.21:13:13.67#ibcon#end of sib2, iclass 29, count 2 2006.229.21:13:13.67#ibcon#*after write, iclass 29, count 2 2006.229.21:13:13.67#ibcon#*before return 0, iclass 29, count 2 2006.229.21:13:13.67#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:13:13.67#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:13:13.67#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.21:13:13.67#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:13.67#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:13:13.79#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:13:13.79#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:13:13.79#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:13:13.79#ibcon#first serial, iclass 29, count 0 2006.229.21:13:13.79#ibcon#enter sib2, iclass 29, count 0 2006.229.21:13:13.79#ibcon#flushed, iclass 29, count 0 2006.229.21:13:13.79#ibcon#about to write, iclass 29, count 0 2006.229.21:13:13.79#ibcon#wrote, iclass 29, count 0 2006.229.21:13:13.79#ibcon#about to read 3, iclass 29, count 0 2006.229.21:13:13.81#ibcon#read 3, iclass 29, count 0 2006.229.21:13:13.81#ibcon#about to read 4, iclass 29, count 0 2006.229.21:13:13.81#ibcon#read 4, iclass 29, count 0 2006.229.21:13:13.81#ibcon#about to read 5, iclass 29, count 0 2006.229.21:13:13.81#ibcon#read 5, iclass 29, count 0 2006.229.21:13:13.81#ibcon#about to read 6, iclass 29, count 0 2006.229.21:13:13.81#ibcon#read 6, iclass 29, count 0 2006.229.21:13:13.81#ibcon#end of sib2, iclass 29, count 0 2006.229.21:13:13.81#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:13:13.81#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:13:13.81#ibcon#[25=USB\r\n] 2006.229.21:13:13.81#ibcon#*before write, iclass 29, count 0 2006.229.21:13:13.81#ibcon#enter sib2, iclass 29, count 0 2006.229.21:13:13.81#ibcon#flushed, iclass 29, count 0 2006.229.21:13:13.81#ibcon#about to write, iclass 29, count 0 2006.229.21:13:13.81#ibcon#wrote, iclass 29, count 0 2006.229.21:13:13.81#ibcon#about to read 3, iclass 29, count 0 2006.229.21:13:13.84#ibcon#read 3, iclass 29, count 0 2006.229.21:13:13.84#ibcon#about to read 4, iclass 29, count 0 2006.229.21:13:13.84#ibcon#read 4, iclass 29, count 0 2006.229.21:13:13.84#ibcon#about to read 5, iclass 29, count 0 2006.229.21:13:13.84#ibcon#read 5, iclass 29, count 0 2006.229.21:13:13.84#ibcon#about to read 6, iclass 29, count 0 2006.229.21:13:13.84#ibcon#read 6, iclass 29, count 0 2006.229.21:13:13.84#ibcon#end of sib2, iclass 29, count 0 2006.229.21:13:13.84#ibcon#*after write, iclass 29, count 0 2006.229.21:13:13.84#ibcon#*before return 0, iclass 29, count 0 2006.229.21:13:13.84#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:13:13.84#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:13:13.84#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:13:13.84#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:13:13.84$vck44/vblo=1,629.99 2006.229.21:13:13.84#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.21:13:13.84#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.21:13:13.84#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:13.84#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:13:13.84#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:13:13.84#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:13:13.84#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:13:13.84#ibcon#first serial, iclass 31, count 0 2006.229.21:13:13.84#ibcon#enter sib2, iclass 31, count 0 2006.229.21:13:13.84#ibcon#flushed, iclass 31, count 0 2006.229.21:13:13.84#ibcon#about to write, iclass 31, count 0 2006.229.21:13:13.84#ibcon#wrote, iclass 31, count 0 2006.229.21:13:13.84#ibcon#about to read 3, iclass 31, count 0 2006.229.21:13:13.86#ibcon#read 3, iclass 31, count 0 2006.229.21:13:13.86#ibcon#about to read 4, iclass 31, count 0 2006.229.21:13:13.86#ibcon#read 4, iclass 31, count 0 2006.229.21:13:13.86#ibcon#about to read 5, iclass 31, count 0 2006.229.21:13:13.86#ibcon#read 5, iclass 31, count 0 2006.229.21:13:13.86#ibcon#about to read 6, iclass 31, count 0 2006.229.21:13:13.86#ibcon#read 6, iclass 31, count 0 2006.229.21:13:13.86#ibcon#end of sib2, iclass 31, count 0 2006.229.21:13:13.86#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:13:13.86#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:13:13.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:13:13.86#ibcon#*before write, iclass 31, count 0 2006.229.21:13:13.86#ibcon#enter sib2, iclass 31, count 0 2006.229.21:13:13.86#ibcon#flushed, iclass 31, count 0 2006.229.21:13:13.86#ibcon#about to write, iclass 31, count 0 2006.229.21:13:13.86#ibcon#wrote, iclass 31, count 0 2006.229.21:13:13.86#ibcon#about to read 3, iclass 31, count 0 2006.229.21:13:13.90#ibcon#read 3, iclass 31, count 0 2006.229.21:13:13.90#ibcon#about to read 4, iclass 31, count 0 2006.229.21:13:13.90#ibcon#read 4, iclass 31, count 0 2006.229.21:13:13.90#ibcon#about to read 5, iclass 31, count 0 2006.229.21:13:13.90#ibcon#read 5, iclass 31, count 0 2006.229.21:13:13.90#ibcon#about to read 6, iclass 31, count 0 2006.229.21:13:13.90#ibcon#read 6, iclass 31, count 0 2006.229.21:13:13.90#ibcon#end of sib2, iclass 31, count 0 2006.229.21:13:13.90#ibcon#*after write, iclass 31, count 0 2006.229.21:13:13.90#ibcon#*before return 0, iclass 31, count 0 2006.229.21:13:13.90#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:13:13.90#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:13:13.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:13:13.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:13:13.90$vck44/vb=1,4 2006.229.21:13:13.90#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.21:13:13.90#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.21:13:13.90#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:13.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:13:13.90#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:13:13.90#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:13:13.90#ibcon#enter wrdev, iclass 33, count 2 2006.229.21:13:13.90#ibcon#first serial, iclass 33, count 2 2006.229.21:13:13.90#ibcon#enter sib2, iclass 33, count 2 2006.229.21:13:13.90#ibcon#flushed, iclass 33, count 2 2006.229.21:13:13.90#ibcon#about to write, iclass 33, count 2 2006.229.21:13:13.90#ibcon#wrote, iclass 33, count 2 2006.229.21:13:13.90#ibcon#about to read 3, iclass 33, count 2 2006.229.21:13:13.92#ibcon#read 3, iclass 33, count 2 2006.229.21:13:13.92#ibcon#about to read 4, iclass 33, count 2 2006.229.21:13:13.92#ibcon#read 4, iclass 33, count 2 2006.229.21:13:13.92#ibcon#about to read 5, iclass 33, count 2 2006.229.21:13:13.92#ibcon#read 5, iclass 33, count 2 2006.229.21:13:13.92#ibcon#about to read 6, iclass 33, count 2 2006.229.21:13:13.92#ibcon#read 6, iclass 33, count 2 2006.229.21:13:13.92#ibcon#end of sib2, iclass 33, count 2 2006.229.21:13:13.92#ibcon#*mode == 0, iclass 33, count 2 2006.229.21:13:13.92#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.21:13:13.92#ibcon#[27=AT01-04\r\n] 2006.229.21:13:13.92#ibcon#*before write, iclass 33, count 2 2006.229.21:13:13.92#ibcon#enter sib2, iclass 33, count 2 2006.229.21:13:13.92#ibcon#flushed, iclass 33, count 2 2006.229.21:13:13.92#ibcon#about to write, iclass 33, count 2 2006.229.21:13:13.92#ibcon#wrote, iclass 33, count 2 2006.229.21:13:13.92#ibcon#about to read 3, iclass 33, count 2 2006.229.21:13:13.95#ibcon#read 3, iclass 33, count 2 2006.229.21:13:13.95#ibcon#about to read 4, iclass 33, count 2 2006.229.21:13:13.95#ibcon#read 4, iclass 33, count 2 2006.229.21:13:13.95#ibcon#about to read 5, iclass 33, count 2 2006.229.21:13:13.95#ibcon#read 5, iclass 33, count 2 2006.229.21:13:13.95#ibcon#about to read 6, iclass 33, count 2 2006.229.21:13:13.95#ibcon#read 6, iclass 33, count 2 2006.229.21:13:13.95#ibcon#end of sib2, iclass 33, count 2 2006.229.21:13:13.95#ibcon#*after write, iclass 33, count 2 2006.229.21:13:13.95#ibcon#*before return 0, iclass 33, count 2 2006.229.21:13:13.95#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:13:13.95#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:13:13.95#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.21:13:13.95#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:13.95#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:13:14.07#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:13:14.07#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:13:14.07#ibcon#enter wrdev, iclass 33, count 0 2006.229.21:13:14.07#ibcon#first serial, iclass 33, count 0 2006.229.21:13:14.07#ibcon#enter sib2, iclass 33, count 0 2006.229.21:13:14.07#ibcon#flushed, iclass 33, count 0 2006.229.21:13:14.07#ibcon#about to write, iclass 33, count 0 2006.229.21:13:14.07#ibcon#wrote, iclass 33, count 0 2006.229.21:13:14.07#ibcon#about to read 3, iclass 33, count 0 2006.229.21:13:14.09#ibcon#read 3, iclass 33, count 0 2006.229.21:13:14.09#ibcon#about to read 4, iclass 33, count 0 2006.229.21:13:14.09#ibcon#read 4, iclass 33, count 0 2006.229.21:13:14.09#ibcon#about to read 5, iclass 33, count 0 2006.229.21:13:14.09#ibcon#read 5, iclass 33, count 0 2006.229.21:13:14.09#ibcon#about to read 6, iclass 33, count 0 2006.229.21:13:14.09#ibcon#read 6, iclass 33, count 0 2006.229.21:13:14.09#ibcon#end of sib2, iclass 33, count 0 2006.229.21:13:14.09#ibcon#*mode == 0, iclass 33, count 0 2006.229.21:13:14.09#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.21:13:14.09#ibcon#[27=USB\r\n] 2006.229.21:13:14.09#ibcon#*before write, iclass 33, count 0 2006.229.21:13:14.09#ibcon#enter sib2, iclass 33, count 0 2006.229.21:13:14.09#ibcon#flushed, iclass 33, count 0 2006.229.21:13:14.09#ibcon#about to write, iclass 33, count 0 2006.229.21:13:14.09#ibcon#wrote, iclass 33, count 0 2006.229.21:13:14.09#ibcon#about to read 3, iclass 33, count 0 2006.229.21:13:14.12#ibcon#read 3, iclass 33, count 0 2006.229.21:13:14.12#ibcon#about to read 4, iclass 33, count 0 2006.229.21:13:14.12#ibcon#read 4, iclass 33, count 0 2006.229.21:13:14.12#ibcon#about to read 5, iclass 33, count 0 2006.229.21:13:14.12#ibcon#read 5, iclass 33, count 0 2006.229.21:13:14.12#ibcon#about to read 6, iclass 33, count 0 2006.229.21:13:14.12#ibcon#read 6, iclass 33, count 0 2006.229.21:13:14.12#ibcon#end of sib2, iclass 33, count 0 2006.229.21:13:14.12#ibcon#*after write, iclass 33, count 0 2006.229.21:13:14.12#ibcon#*before return 0, iclass 33, count 0 2006.229.21:13:14.12#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:13:14.12#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:13:14.12#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.21:13:14.12#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.21:13:14.12$vck44/vblo=2,634.99 2006.229.21:13:14.12#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.21:13:14.12#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.21:13:14.12#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:14.12#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:14.12#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:14.12#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:14.12#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:13:14.12#ibcon#first serial, iclass 35, count 0 2006.229.21:13:14.12#ibcon#enter sib2, iclass 35, count 0 2006.229.21:13:14.12#ibcon#flushed, iclass 35, count 0 2006.229.21:13:14.12#ibcon#about to write, iclass 35, count 0 2006.229.21:13:14.12#ibcon#wrote, iclass 35, count 0 2006.229.21:13:14.12#ibcon#about to read 3, iclass 35, count 0 2006.229.21:13:14.14#ibcon#read 3, iclass 35, count 0 2006.229.21:13:14.14#ibcon#about to read 4, iclass 35, count 0 2006.229.21:13:14.14#ibcon#read 4, iclass 35, count 0 2006.229.21:13:14.14#ibcon#about to read 5, iclass 35, count 0 2006.229.21:13:14.14#ibcon#read 5, iclass 35, count 0 2006.229.21:13:14.14#ibcon#about to read 6, iclass 35, count 0 2006.229.21:13:14.14#ibcon#read 6, iclass 35, count 0 2006.229.21:13:14.14#ibcon#end of sib2, iclass 35, count 0 2006.229.21:13:14.14#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:13:14.14#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:13:14.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:13:14.14#ibcon#*before write, iclass 35, count 0 2006.229.21:13:14.14#ibcon#enter sib2, iclass 35, count 0 2006.229.21:13:14.14#ibcon#flushed, iclass 35, count 0 2006.229.21:13:14.14#ibcon#about to write, iclass 35, count 0 2006.229.21:13:14.14#ibcon#wrote, iclass 35, count 0 2006.229.21:13:14.14#ibcon#about to read 3, iclass 35, count 0 2006.229.21:13:14.18#ibcon#read 3, iclass 35, count 0 2006.229.21:13:14.18#ibcon#about to read 4, iclass 35, count 0 2006.229.21:13:14.18#ibcon#read 4, iclass 35, count 0 2006.229.21:13:14.18#ibcon#about to read 5, iclass 35, count 0 2006.229.21:13:14.18#ibcon#read 5, iclass 35, count 0 2006.229.21:13:14.18#ibcon#about to read 6, iclass 35, count 0 2006.229.21:13:14.18#ibcon#read 6, iclass 35, count 0 2006.229.21:13:14.18#ibcon#end of sib2, iclass 35, count 0 2006.229.21:13:14.18#ibcon#*after write, iclass 35, count 0 2006.229.21:13:14.18#ibcon#*before return 0, iclass 35, count 0 2006.229.21:13:14.18#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:14.18#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:13:14.18#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:13:14.18#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:13:14.18$vck44/vb=2,4 2006.229.21:13:14.18#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.21:13:14.18#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.21:13:14.18#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:14.18#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:14.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:14.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:14.24#ibcon#enter wrdev, iclass 37, count 2 2006.229.21:13:14.24#ibcon#first serial, iclass 37, count 2 2006.229.21:13:14.24#ibcon#enter sib2, iclass 37, count 2 2006.229.21:13:14.24#ibcon#flushed, iclass 37, count 2 2006.229.21:13:14.24#ibcon#about to write, iclass 37, count 2 2006.229.21:13:14.24#ibcon#wrote, iclass 37, count 2 2006.229.21:13:14.24#ibcon#about to read 3, iclass 37, count 2 2006.229.21:13:14.26#ibcon#read 3, iclass 37, count 2 2006.229.21:13:14.26#ibcon#about to read 4, iclass 37, count 2 2006.229.21:13:14.26#ibcon#read 4, iclass 37, count 2 2006.229.21:13:14.26#ibcon#about to read 5, iclass 37, count 2 2006.229.21:13:14.26#ibcon#read 5, iclass 37, count 2 2006.229.21:13:14.26#ibcon#about to read 6, iclass 37, count 2 2006.229.21:13:14.26#ibcon#read 6, iclass 37, count 2 2006.229.21:13:14.26#ibcon#end of sib2, iclass 37, count 2 2006.229.21:13:14.26#ibcon#*mode == 0, iclass 37, count 2 2006.229.21:13:14.26#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.21:13:14.26#ibcon#[27=AT02-04\r\n] 2006.229.21:13:14.26#ibcon#*before write, iclass 37, count 2 2006.229.21:13:14.26#ibcon#enter sib2, iclass 37, count 2 2006.229.21:13:14.26#ibcon#flushed, iclass 37, count 2 2006.229.21:13:14.26#ibcon#about to write, iclass 37, count 2 2006.229.21:13:14.26#ibcon#wrote, iclass 37, count 2 2006.229.21:13:14.26#ibcon#about to read 3, iclass 37, count 2 2006.229.21:13:14.29#ibcon#read 3, iclass 37, count 2 2006.229.21:13:14.34#ibcon#about to read 4, iclass 37, count 2 2006.229.21:13:14.34#ibcon#read 4, iclass 37, count 2 2006.229.21:13:14.34#ibcon#about to read 5, iclass 37, count 2 2006.229.21:13:14.34#ibcon#read 5, iclass 37, count 2 2006.229.21:13:14.34#ibcon#about to read 6, iclass 37, count 2 2006.229.21:13:14.34#ibcon#read 6, iclass 37, count 2 2006.229.21:13:14.34#ibcon#end of sib2, iclass 37, count 2 2006.229.21:13:14.34#ibcon#*after write, iclass 37, count 2 2006.229.21:13:14.35#ibcon#*before return 0, iclass 37, count 2 2006.229.21:13:14.35#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:14.35#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:13:14.35#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.21:13:14.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:14.35#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:14.46#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:14.46#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:14.46#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:13:14.46#ibcon#first serial, iclass 37, count 0 2006.229.21:13:14.46#ibcon#enter sib2, iclass 37, count 0 2006.229.21:13:14.46#ibcon#flushed, iclass 37, count 0 2006.229.21:13:14.46#ibcon#about to write, iclass 37, count 0 2006.229.21:13:14.46#ibcon#wrote, iclass 37, count 0 2006.229.21:13:14.46#ibcon#about to read 3, iclass 37, count 0 2006.229.21:13:14.48#ibcon#read 3, iclass 37, count 0 2006.229.21:13:14.48#ibcon#about to read 4, iclass 37, count 0 2006.229.21:13:14.48#ibcon#read 4, iclass 37, count 0 2006.229.21:13:14.48#ibcon#about to read 5, iclass 37, count 0 2006.229.21:13:14.48#ibcon#read 5, iclass 37, count 0 2006.229.21:13:14.48#ibcon#about to read 6, iclass 37, count 0 2006.229.21:13:14.48#ibcon#read 6, iclass 37, count 0 2006.229.21:13:14.48#ibcon#end of sib2, iclass 37, count 0 2006.229.21:13:14.48#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:13:14.48#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:13:14.48#ibcon#[27=USB\r\n] 2006.229.21:13:14.48#ibcon#*before write, iclass 37, count 0 2006.229.21:13:14.48#ibcon#enter sib2, iclass 37, count 0 2006.229.21:13:14.48#ibcon#flushed, iclass 37, count 0 2006.229.21:13:14.48#ibcon#about to write, iclass 37, count 0 2006.229.21:13:14.48#ibcon#wrote, iclass 37, count 0 2006.229.21:13:14.48#ibcon#about to read 3, iclass 37, count 0 2006.229.21:13:14.51#ibcon#read 3, iclass 37, count 0 2006.229.21:13:14.51#ibcon#about to read 4, iclass 37, count 0 2006.229.21:13:14.51#ibcon#read 4, iclass 37, count 0 2006.229.21:13:14.51#ibcon#about to read 5, iclass 37, count 0 2006.229.21:13:14.51#ibcon#read 5, iclass 37, count 0 2006.229.21:13:14.51#ibcon#about to read 6, iclass 37, count 0 2006.229.21:13:14.51#ibcon#read 6, iclass 37, count 0 2006.229.21:13:14.51#ibcon#end of sib2, iclass 37, count 0 2006.229.21:13:14.51#ibcon#*after write, iclass 37, count 0 2006.229.21:13:14.51#ibcon#*before return 0, iclass 37, count 0 2006.229.21:13:14.51#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:14.51#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:13:14.51#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:13:14.51#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:13:14.51$vck44/vblo=3,649.99 2006.229.21:13:14.51#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.21:13:14.51#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.21:13:14.51#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:14.51#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:14.51#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:14.51#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:14.51#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:13:14.51#ibcon#first serial, iclass 39, count 0 2006.229.21:13:14.51#ibcon#enter sib2, iclass 39, count 0 2006.229.21:13:14.51#ibcon#flushed, iclass 39, count 0 2006.229.21:13:14.51#ibcon#about to write, iclass 39, count 0 2006.229.21:13:14.51#ibcon#wrote, iclass 39, count 0 2006.229.21:13:14.51#ibcon#about to read 3, iclass 39, count 0 2006.229.21:13:14.53#ibcon#read 3, iclass 39, count 0 2006.229.21:13:14.53#ibcon#about to read 4, iclass 39, count 0 2006.229.21:13:14.53#ibcon#read 4, iclass 39, count 0 2006.229.21:13:14.53#ibcon#about to read 5, iclass 39, count 0 2006.229.21:13:14.53#ibcon#read 5, iclass 39, count 0 2006.229.21:13:14.53#ibcon#about to read 6, iclass 39, count 0 2006.229.21:13:14.53#ibcon#read 6, iclass 39, count 0 2006.229.21:13:14.53#ibcon#end of sib2, iclass 39, count 0 2006.229.21:13:14.53#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:13:14.53#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:13:14.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:13:14.53#ibcon#*before write, iclass 39, count 0 2006.229.21:13:14.53#ibcon#enter sib2, iclass 39, count 0 2006.229.21:13:14.53#ibcon#flushed, iclass 39, count 0 2006.229.21:13:14.53#ibcon#about to write, iclass 39, count 0 2006.229.21:13:14.53#ibcon#wrote, iclass 39, count 0 2006.229.21:13:14.53#ibcon#about to read 3, iclass 39, count 0 2006.229.21:13:14.57#ibcon#read 3, iclass 39, count 0 2006.229.21:13:14.57#ibcon#about to read 4, iclass 39, count 0 2006.229.21:13:14.57#ibcon#read 4, iclass 39, count 0 2006.229.21:13:14.57#ibcon#about to read 5, iclass 39, count 0 2006.229.21:13:14.57#ibcon#read 5, iclass 39, count 0 2006.229.21:13:14.57#ibcon#about to read 6, iclass 39, count 0 2006.229.21:13:14.57#ibcon#read 6, iclass 39, count 0 2006.229.21:13:14.57#ibcon#end of sib2, iclass 39, count 0 2006.229.21:13:14.57#ibcon#*after write, iclass 39, count 0 2006.229.21:13:14.57#ibcon#*before return 0, iclass 39, count 0 2006.229.21:13:14.57#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:14.57#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:13:14.57#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:13:14.57#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:13:14.57$vck44/vb=3,4 2006.229.21:13:14.57#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.21:13:14.57#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.21:13:14.57#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:14.57#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:14.63#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:14.63#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:14.63#ibcon#enter wrdev, iclass 3, count 2 2006.229.21:13:14.63#ibcon#first serial, iclass 3, count 2 2006.229.21:13:14.63#ibcon#enter sib2, iclass 3, count 2 2006.229.21:13:14.63#ibcon#flushed, iclass 3, count 2 2006.229.21:13:14.63#ibcon#about to write, iclass 3, count 2 2006.229.21:13:14.63#ibcon#wrote, iclass 3, count 2 2006.229.21:13:14.63#ibcon#about to read 3, iclass 3, count 2 2006.229.21:13:14.65#ibcon#read 3, iclass 3, count 2 2006.229.21:13:14.65#ibcon#about to read 4, iclass 3, count 2 2006.229.21:13:14.65#ibcon#read 4, iclass 3, count 2 2006.229.21:13:14.65#ibcon#about to read 5, iclass 3, count 2 2006.229.21:13:14.65#ibcon#read 5, iclass 3, count 2 2006.229.21:13:14.65#ibcon#about to read 6, iclass 3, count 2 2006.229.21:13:14.65#ibcon#read 6, iclass 3, count 2 2006.229.21:13:14.65#ibcon#end of sib2, iclass 3, count 2 2006.229.21:13:14.65#ibcon#*mode == 0, iclass 3, count 2 2006.229.21:13:14.65#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.21:13:14.65#ibcon#[27=AT03-04\r\n] 2006.229.21:13:14.65#ibcon#*before write, iclass 3, count 2 2006.229.21:13:14.65#ibcon#enter sib2, iclass 3, count 2 2006.229.21:13:14.65#ibcon#flushed, iclass 3, count 2 2006.229.21:13:14.65#ibcon#about to write, iclass 3, count 2 2006.229.21:13:14.65#ibcon#wrote, iclass 3, count 2 2006.229.21:13:14.65#ibcon#about to read 3, iclass 3, count 2 2006.229.21:13:14.68#ibcon#read 3, iclass 3, count 2 2006.229.21:13:14.68#ibcon#about to read 4, iclass 3, count 2 2006.229.21:13:14.68#ibcon#read 4, iclass 3, count 2 2006.229.21:13:14.68#ibcon#about to read 5, iclass 3, count 2 2006.229.21:13:14.68#ibcon#read 5, iclass 3, count 2 2006.229.21:13:14.68#ibcon#about to read 6, iclass 3, count 2 2006.229.21:13:14.68#ibcon#read 6, iclass 3, count 2 2006.229.21:13:14.68#ibcon#end of sib2, iclass 3, count 2 2006.229.21:13:14.68#ibcon#*after write, iclass 3, count 2 2006.229.21:13:14.68#ibcon#*before return 0, iclass 3, count 2 2006.229.21:13:14.68#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:14.68#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:13:14.68#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.21:13:14.68#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:14.68#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:14.80#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:14.80#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:14.80#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:13:14.80#ibcon#first serial, iclass 3, count 0 2006.229.21:13:14.80#ibcon#enter sib2, iclass 3, count 0 2006.229.21:13:14.80#ibcon#flushed, iclass 3, count 0 2006.229.21:13:14.80#ibcon#about to write, iclass 3, count 0 2006.229.21:13:14.80#ibcon#wrote, iclass 3, count 0 2006.229.21:13:14.80#ibcon#about to read 3, iclass 3, count 0 2006.229.21:13:14.82#ibcon#read 3, iclass 3, count 0 2006.229.21:13:14.82#ibcon#about to read 4, iclass 3, count 0 2006.229.21:13:14.82#ibcon#read 4, iclass 3, count 0 2006.229.21:13:14.82#ibcon#about to read 5, iclass 3, count 0 2006.229.21:13:14.82#ibcon#read 5, iclass 3, count 0 2006.229.21:13:14.82#ibcon#about to read 6, iclass 3, count 0 2006.229.21:13:14.82#ibcon#read 6, iclass 3, count 0 2006.229.21:13:14.82#ibcon#end of sib2, iclass 3, count 0 2006.229.21:13:14.82#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:13:14.82#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:13:14.82#ibcon#[27=USB\r\n] 2006.229.21:13:14.82#ibcon#*before write, iclass 3, count 0 2006.229.21:13:14.82#ibcon#enter sib2, iclass 3, count 0 2006.229.21:13:14.82#ibcon#flushed, iclass 3, count 0 2006.229.21:13:14.82#ibcon#about to write, iclass 3, count 0 2006.229.21:13:14.82#ibcon#wrote, iclass 3, count 0 2006.229.21:13:14.82#ibcon#about to read 3, iclass 3, count 0 2006.229.21:13:14.85#ibcon#read 3, iclass 3, count 0 2006.229.21:13:14.85#ibcon#about to read 4, iclass 3, count 0 2006.229.21:13:14.85#ibcon#read 4, iclass 3, count 0 2006.229.21:13:14.85#ibcon#about to read 5, iclass 3, count 0 2006.229.21:13:14.85#ibcon#read 5, iclass 3, count 0 2006.229.21:13:14.85#ibcon#about to read 6, iclass 3, count 0 2006.229.21:13:14.85#ibcon#read 6, iclass 3, count 0 2006.229.21:13:14.85#ibcon#end of sib2, iclass 3, count 0 2006.229.21:13:14.85#ibcon#*after write, iclass 3, count 0 2006.229.21:13:14.85#ibcon#*before return 0, iclass 3, count 0 2006.229.21:13:14.85#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:14.85#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:13:14.85#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:13:14.85#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:13:14.85$vck44/vblo=4,679.99 2006.229.21:13:14.85#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.21:13:14.85#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.21:13:14.85#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:14.85#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:14.85#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:14.85#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:14.85#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:13:14.85#ibcon#first serial, iclass 5, count 0 2006.229.21:13:14.85#ibcon#enter sib2, iclass 5, count 0 2006.229.21:13:14.85#ibcon#flushed, iclass 5, count 0 2006.229.21:13:14.85#ibcon#about to write, iclass 5, count 0 2006.229.21:13:14.85#ibcon#wrote, iclass 5, count 0 2006.229.21:13:14.85#ibcon#about to read 3, iclass 5, count 0 2006.229.21:13:14.87#ibcon#read 3, iclass 5, count 0 2006.229.21:13:14.87#ibcon#about to read 4, iclass 5, count 0 2006.229.21:13:14.87#ibcon#read 4, iclass 5, count 0 2006.229.21:13:14.87#ibcon#about to read 5, iclass 5, count 0 2006.229.21:13:14.87#ibcon#read 5, iclass 5, count 0 2006.229.21:13:14.87#ibcon#about to read 6, iclass 5, count 0 2006.229.21:13:14.87#ibcon#read 6, iclass 5, count 0 2006.229.21:13:14.87#ibcon#end of sib2, iclass 5, count 0 2006.229.21:13:14.87#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:13:14.87#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:13:14.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:13:14.87#ibcon#*before write, iclass 5, count 0 2006.229.21:13:14.87#ibcon#enter sib2, iclass 5, count 0 2006.229.21:13:14.87#ibcon#flushed, iclass 5, count 0 2006.229.21:13:14.87#ibcon#about to write, iclass 5, count 0 2006.229.21:13:14.87#ibcon#wrote, iclass 5, count 0 2006.229.21:13:14.87#ibcon#about to read 3, iclass 5, count 0 2006.229.21:13:14.91#ibcon#read 3, iclass 5, count 0 2006.229.21:13:14.91#ibcon#about to read 4, iclass 5, count 0 2006.229.21:13:14.91#ibcon#read 4, iclass 5, count 0 2006.229.21:13:14.91#ibcon#about to read 5, iclass 5, count 0 2006.229.21:13:14.91#ibcon#read 5, iclass 5, count 0 2006.229.21:13:14.91#ibcon#about to read 6, iclass 5, count 0 2006.229.21:13:14.91#ibcon#read 6, iclass 5, count 0 2006.229.21:13:14.91#ibcon#end of sib2, iclass 5, count 0 2006.229.21:13:14.91#ibcon#*after write, iclass 5, count 0 2006.229.21:13:14.91#ibcon#*before return 0, iclass 5, count 0 2006.229.21:13:14.91#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:14.91#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:13:14.91#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:13:14.91#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:13:14.91$vck44/vb=4,4 2006.229.21:13:14.91#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.21:13:14.91#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.21:13:14.91#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:14.91#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:14.97#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:14.97#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:14.97#ibcon#enter wrdev, iclass 7, count 2 2006.229.21:13:14.97#ibcon#first serial, iclass 7, count 2 2006.229.21:13:14.97#ibcon#enter sib2, iclass 7, count 2 2006.229.21:13:14.97#ibcon#flushed, iclass 7, count 2 2006.229.21:13:14.97#ibcon#about to write, iclass 7, count 2 2006.229.21:13:14.97#ibcon#wrote, iclass 7, count 2 2006.229.21:13:14.97#ibcon#about to read 3, iclass 7, count 2 2006.229.21:13:14.99#ibcon#read 3, iclass 7, count 2 2006.229.21:13:14.99#ibcon#about to read 4, iclass 7, count 2 2006.229.21:13:14.99#ibcon#read 4, iclass 7, count 2 2006.229.21:13:14.99#ibcon#about to read 5, iclass 7, count 2 2006.229.21:13:14.99#ibcon#read 5, iclass 7, count 2 2006.229.21:13:14.99#ibcon#about to read 6, iclass 7, count 2 2006.229.21:13:14.99#ibcon#read 6, iclass 7, count 2 2006.229.21:13:14.99#ibcon#end of sib2, iclass 7, count 2 2006.229.21:13:14.99#ibcon#*mode == 0, iclass 7, count 2 2006.229.21:13:14.99#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.21:13:14.99#ibcon#[27=AT04-04\r\n] 2006.229.21:13:14.99#ibcon#*before write, iclass 7, count 2 2006.229.21:13:14.99#ibcon#enter sib2, iclass 7, count 2 2006.229.21:13:14.99#ibcon#flushed, iclass 7, count 2 2006.229.21:13:14.99#ibcon#about to write, iclass 7, count 2 2006.229.21:13:14.99#ibcon#wrote, iclass 7, count 2 2006.229.21:13:14.99#ibcon#about to read 3, iclass 7, count 2 2006.229.21:13:15.02#ibcon#read 3, iclass 7, count 2 2006.229.21:13:15.02#ibcon#about to read 4, iclass 7, count 2 2006.229.21:13:15.02#ibcon#read 4, iclass 7, count 2 2006.229.21:13:15.02#ibcon#about to read 5, iclass 7, count 2 2006.229.21:13:15.02#ibcon#read 5, iclass 7, count 2 2006.229.21:13:15.02#ibcon#about to read 6, iclass 7, count 2 2006.229.21:13:15.02#ibcon#read 6, iclass 7, count 2 2006.229.21:13:15.02#ibcon#end of sib2, iclass 7, count 2 2006.229.21:13:15.02#ibcon#*after write, iclass 7, count 2 2006.229.21:13:15.02#ibcon#*before return 0, iclass 7, count 2 2006.229.21:13:15.02#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:15.02#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:13:15.02#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.21:13:15.02#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:15.02#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:15.14#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:15.14#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:15.14#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:13:15.14#ibcon#first serial, iclass 7, count 0 2006.229.21:13:15.14#ibcon#enter sib2, iclass 7, count 0 2006.229.21:13:15.14#ibcon#flushed, iclass 7, count 0 2006.229.21:13:15.14#ibcon#about to write, iclass 7, count 0 2006.229.21:13:15.14#ibcon#wrote, iclass 7, count 0 2006.229.21:13:15.14#ibcon#about to read 3, iclass 7, count 0 2006.229.21:13:15.16#ibcon#read 3, iclass 7, count 0 2006.229.21:13:15.16#ibcon#about to read 4, iclass 7, count 0 2006.229.21:13:15.16#ibcon#read 4, iclass 7, count 0 2006.229.21:13:15.16#ibcon#about to read 5, iclass 7, count 0 2006.229.21:13:15.16#ibcon#read 5, iclass 7, count 0 2006.229.21:13:15.16#ibcon#about to read 6, iclass 7, count 0 2006.229.21:13:15.16#ibcon#read 6, iclass 7, count 0 2006.229.21:13:15.16#ibcon#end of sib2, iclass 7, count 0 2006.229.21:13:15.16#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:13:15.16#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:13:15.16#ibcon#[27=USB\r\n] 2006.229.21:13:15.16#ibcon#*before write, iclass 7, count 0 2006.229.21:13:15.16#ibcon#enter sib2, iclass 7, count 0 2006.229.21:13:15.16#ibcon#flushed, iclass 7, count 0 2006.229.21:13:15.16#ibcon#about to write, iclass 7, count 0 2006.229.21:13:15.16#ibcon#wrote, iclass 7, count 0 2006.229.21:13:15.16#ibcon#about to read 3, iclass 7, count 0 2006.229.21:13:15.19#ibcon#read 3, iclass 7, count 0 2006.229.21:13:15.19#ibcon#about to read 4, iclass 7, count 0 2006.229.21:13:15.19#ibcon#read 4, iclass 7, count 0 2006.229.21:13:15.19#ibcon#about to read 5, iclass 7, count 0 2006.229.21:13:15.19#ibcon#read 5, iclass 7, count 0 2006.229.21:13:15.19#ibcon#about to read 6, iclass 7, count 0 2006.229.21:13:15.19#ibcon#read 6, iclass 7, count 0 2006.229.21:13:15.19#ibcon#end of sib2, iclass 7, count 0 2006.229.21:13:15.19#ibcon#*after write, iclass 7, count 0 2006.229.21:13:15.19#ibcon#*before return 0, iclass 7, count 0 2006.229.21:13:15.19#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:15.19#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:13:15.19#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:13:15.19#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:13:15.19$vck44/vblo=5,709.99 2006.229.21:13:15.19#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.21:13:15.19#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.21:13:15.19#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:15.19#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:15.19#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:15.19#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:15.19#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:13:15.19#ibcon#first serial, iclass 11, count 0 2006.229.21:13:15.19#ibcon#enter sib2, iclass 11, count 0 2006.229.21:13:15.19#ibcon#flushed, iclass 11, count 0 2006.229.21:13:15.19#ibcon#about to write, iclass 11, count 0 2006.229.21:13:15.19#ibcon#wrote, iclass 11, count 0 2006.229.21:13:15.19#ibcon#about to read 3, iclass 11, count 0 2006.229.21:13:15.21#ibcon#read 3, iclass 11, count 0 2006.229.21:13:15.21#ibcon#about to read 4, iclass 11, count 0 2006.229.21:13:15.21#ibcon#read 4, iclass 11, count 0 2006.229.21:13:15.21#ibcon#about to read 5, iclass 11, count 0 2006.229.21:13:15.21#ibcon#read 5, iclass 11, count 0 2006.229.21:13:15.21#ibcon#about to read 6, iclass 11, count 0 2006.229.21:13:15.21#ibcon#read 6, iclass 11, count 0 2006.229.21:13:15.21#ibcon#end of sib2, iclass 11, count 0 2006.229.21:13:15.21#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:13:15.21#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:13:15.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:13:15.21#ibcon#*before write, iclass 11, count 0 2006.229.21:13:15.21#ibcon#enter sib2, iclass 11, count 0 2006.229.21:13:15.21#ibcon#flushed, iclass 11, count 0 2006.229.21:13:15.21#ibcon#about to write, iclass 11, count 0 2006.229.21:13:15.21#ibcon#wrote, iclass 11, count 0 2006.229.21:13:15.21#ibcon#about to read 3, iclass 11, count 0 2006.229.21:13:15.25#ibcon#read 3, iclass 11, count 0 2006.229.21:13:15.25#ibcon#about to read 4, iclass 11, count 0 2006.229.21:13:15.25#ibcon#read 4, iclass 11, count 0 2006.229.21:13:15.25#ibcon#about to read 5, iclass 11, count 0 2006.229.21:13:15.25#ibcon#read 5, iclass 11, count 0 2006.229.21:13:15.25#ibcon#about to read 6, iclass 11, count 0 2006.229.21:13:15.25#ibcon#read 6, iclass 11, count 0 2006.229.21:13:15.25#ibcon#end of sib2, iclass 11, count 0 2006.229.21:13:15.25#ibcon#*after write, iclass 11, count 0 2006.229.21:13:15.25#ibcon#*before return 0, iclass 11, count 0 2006.229.21:13:15.25#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:15.25#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:13:15.25#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:13:15.25#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:13:15.25$vck44/vb=5,4 2006.229.21:13:15.25#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.21:13:15.25#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.21:13:15.25#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:15.25#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:15.31#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:15.31#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:15.31#ibcon#enter wrdev, iclass 13, count 2 2006.229.21:13:15.31#ibcon#first serial, iclass 13, count 2 2006.229.21:13:15.31#ibcon#enter sib2, iclass 13, count 2 2006.229.21:13:15.31#ibcon#flushed, iclass 13, count 2 2006.229.21:13:15.31#ibcon#about to write, iclass 13, count 2 2006.229.21:13:15.31#ibcon#wrote, iclass 13, count 2 2006.229.21:13:15.31#ibcon#about to read 3, iclass 13, count 2 2006.229.21:13:15.33#ibcon#read 3, iclass 13, count 2 2006.229.21:13:15.33#ibcon#about to read 4, iclass 13, count 2 2006.229.21:13:15.33#ibcon#read 4, iclass 13, count 2 2006.229.21:13:15.33#ibcon#about to read 5, iclass 13, count 2 2006.229.21:13:15.33#ibcon#read 5, iclass 13, count 2 2006.229.21:13:15.33#ibcon#about to read 6, iclass 13, count 2 2006.229.21:13:15.33#ibcon#read 6, iclass 13, count 2 2006.229.21:13:15.33#ibcon#end of sib2, iclass 13, count 2 2006.229.21:13:15.33#ibcon#*mode == 0, iclass 13, count 2 2006.229.21:13:15.33#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.21:13:15.33#ibcon#[27=AT05-04\r\n] 2006.229.21:13:15.33#ibcon#*before write, iclass 13, count 2 2006.229.21:13:15.33#ibcon#enter sib2, iclass 13, count 2 2006.229.21:13:15.33#ibcon#flushed, iclass 13, count 2 2006.229.21:13:15.33#ibcon#about to write, iclass 13, count 2 2006.229.21:13:15.33#ibcon#wrote, iclass 13, count 2 2006.229.21:13:15.33#ibcon#about to read 3, iclass 13, count 2 2006.229.21:13:15.36#ibcon#read 3, iclass 13, count 2 2006.229.21:13:15.36#ibcon#about to read 4, iclass 13, count 2 2006.229.21:13:15.36#ibcon#read 4, iclass 13, count 2 2006.229.21:13:15.36#ibcon#about to read 5, iclass 13, count 2 2006.229.21:13:15.36#ibcon#read 5, iclass 13, count 2 2006.229.21:13:15.36#ibcon#about to read 6, iclass 13, count 2 2006.229.21:13:15.36#ibcon#read 6, iclass 13, count 2 2006.229.21:13:15.36#ibcon#end of sib2, iclass 13, count 2 2006.229.21:13:15.36#ibcon#*after write, iclass 13, count 2 2006.229.21:13:15.36#ibcon#*before return 0, iclass 13, count 2 2006.229.21:13:15.36#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:15.36#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:13:15.36#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.21:13:15.36#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:15.36#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:15.48#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:15.48#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:15.48#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:13:15.48#ibcon#first serial, iclass 13, count 0 2006.229.21:13:15.48#ibcon#enter sib2, iclass 13, count 0 2006.229.21:13:15.48#ibcon#flushed, iclass 13, count 0 2006.229.21:13:15.48#ibcon#about to write, iclass 13, count 0 2006.229.21:13:15.48#ibcon#wrote, iclass 13, count 0 2006.229.21:13:15.48#ibcon#about to read 3, iclass 13, count 0 2006.229.21:13:15.50#ibcon#read 3, iclass 13, count 0 2006.229.21:13:15.50#ibcon#about to read 4, iclass 13, count 0 2006.229.21:13:15.50#ibcon#read 4, iclass 13, count 0 2006.229.21:13:15.50#ibcon#about to read 5, iclass 13, count 0 2006.229.21:13:15.50#ibcon#read 5, iclass 13, count 0 2006.229.21:13:15.50#ibcon#about to read 6, iclass 13, count 0 2006.229.21:13:15.50#ibcon#read 6, iclass 13, count 0 2006.229.21:13:15.50#ibcon#end of sib2, iclass 13, count 0 2006.229.21:13:15.50#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:13:15.50#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:13:15.50#ibcon#[27=USB\r\n] 2006.229.21:13:15.50#ibcon#*before write, iclass 13, count 0 2006.229.21:13:15.50#ibcon#enter sib2, iclass 13, count 0 2006.229.21:13:15.50#ibcon#flushed, iclass 13, count 0 2006.229.21:13:15.50#ibcon#about to write, iclass 13, count 0 2006.229.21:13:15.50#ibcon#wrote, iclass 13, count 0 2006.229.21:13:15.50#ibcon#about to read 3, iclass 13, count 0 2006.229.21:13:15.53#ibcon#read 3, iclass 13, count 0 2006.229.21:13:15.53#ibcon#about to read 4, iclass 13, count 0 2006.229.21:13:15.53#ibcon#read 4, iclass 13, count 0 2006.229.21:13:15.53#ibcon#about to read 5, iclass 13, count 0 2006.229.21:13:15.53#ibcon#read 5, iclass 13, count 0 2006.229.21:13:15.53#ibcon#about to read 6, iclass 13, count 0 2006.229.21:13:15.53#ibcon#read 6, iclass 13, count 0 2006.229.21:13:15.53#ibcon#end of sib2, iclass 13, count 0 2006.229.21:13:15.53#ibcon#*after write, iclass 13, count 0 2006.229.21:13:15.53#ibcon#*before return 0, iclass 13, count 0 2006.229.21:13:15.53#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:15.53#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:13:15.53#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:13:15.53#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:13:15.53$vck44/vblo=6,719.99 2006.229.21:13:15.53#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.21:13:15.53#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.21:13:15.53#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:15.53#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:15.53#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:15.53#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:15.53#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:13:15.53#ibcon#first serial, iclass 15, count 0 2006.229.21:13:15.53#ibcon#enter sib2, iclass 15, count 0 2006.229.21:13:15.53#ibcon#flushed, iclass 15, count 0 2006.229.21:13:15.53#ibcon#about to write, iclass 15, count 0 2006.229.21:13:15.53#ibcon#wrote, iclass 15, count 0 2006.229.21:13:15.53#ibcon#about to read 3, iclass 15, count 0 2006.229.21:13:15.55#ibcon#read 3, iclass 15, count 0 2006.229.21:13:15.55#ibcon#about to read 4, iclass 15, count 0 2006.229.21:13:15.55#ibcon#read 4, iclass 15, count 0 2006.229.21:13:15.55#ibcon#about to read 5, iclass 15, count 0 2006.229.21:13:15.55#ibcon#read 5, iclass 15, count 0 2006.229.21:13:15.55#ibcon#about to read 6, iclass 15, count 0 2006.229.21:13:15.55#ibcon#read 6, iclass 15, count 0 2006.229.21:13:15.55#ibcon#end of sib2, iclass 15, count 0 2006.229.21:13:15.55#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:13:15.55#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:13:15.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:13:15.55#ibcon#*before write, iclass 15, count 0 2006.229.21:13:15.55#ibcon#enter sib2, iclass 15, count 0 2006.229.21:13:15.55#ibcon#flushed, iclass 15, count 0 2006.229.21:13:15.55#ibcon#about to write, iclass 15, count 0 2006.229.21:13:15.55#ibcon#wrote, iclass 15, count 0 2006.229.21:13:15.55#ibcon#about to read 3, iclass 15, count 0 2006.229.21:13:15.59#ibcon#read 3, iclass 15, count 0 2006.229.21:13:15.59#ibcon#about to read 4, iclass 15, count 0 2006.229.21:13:15.59#ibcon#read 4, iclass 15, count 0 2006.229.21:13:15.59#ibcon#about to read 5, iclass 15, count 0 2006.229.21:13:15.59#ibcon#read 5, iclass 15, count 0 2006.229.21:13:15.59#ibcon#about to read 6, iclass 15, count 0 2006.229.21:13:15.59#ibcon#read 6, iclass 15, count 0 2006.229.21:13:15.59#ibcon#end of sib2, iclass 15, count 0 2006.229.21:13:15.59#ibcon#*after write, iclass 15, count 0 2006.229.21:13:15.59#ibcon#*before return 0, iclass 15, count 0 2006.229.21:13:15.59#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:15.59#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:13:15.59#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:13:15.59#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:13:15.59$vck44/vb=6,4 2006.229.21:13:15.59#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.21:13:15.59#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.21:13:15.59#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:15.59#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:15.65#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:15.65#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:15.65#ibcon#enter wrdev, iclass 17, count 2 2006.229.21:13:15.65#ibcon#first serial, iclass 17, count 2 2006.229.21:13:15.65#ibcon#enter sib2, iclass 17, count 2 2006.229.21:13:15.65#ibcon#flushed, iclass 17, count 2 2006.229.21:13:15.65#ibcon#about to write, iclass 17, count 2 2006.229.21:13:15.65#ibcon#wrote, iclass 17, count 2 2006.229.21:13:15.65#ibcon#about to read 3, iclass 17, count 2 2006.229.21:13:15.67#ibcon#read 3, iclass 17, count 2 2006.229.21:13:15.67#ibcon#about to read 4, iclass 17, count 2 2006.229.21:13:15.67#ibcon#read 4, iclass 17, count 2 2006.229.21:13:15.67#ibcon#about to read 5, iclass 17, count 2 2006.229.21:13:15.67#ibcon#read 5, iclass 17, count 2 2006.229.21:13:15.67#ibcon#about to read 6, iclass 17, count 2 2006.229.21:13:15.67#ibcon#read 6, iclass 17, count 2 2006.229.21:13:15.67#ibcon#end of sib2, iclass 17, count 2 2006.229.21:13:15.67#ibcon#*mode == 0, iclass 17, count 2 2006.229.21:13:15.67#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.21:13:15.67#ibcon#[27=AT06-04\r\n] 2006.229.21:13:15.67#ibcon#*before write, iclass 17, count 2 2006.229.21:13:15.67#ibcon#enter sib2, iclass 17, count 2 2006.229.21:13:15.67#ibcon#flushed, iclass 17, count 2 2006.229.21:13:15.67#ibcon#about to write, iclass 17, count 2 2006.229.21:13:15.67#ibcon#wrote, iclass 17, count 2 2006.229.21:13:15.67#ibcon#about to read 3, iclass 17, count 2 2006.229.21:13:15.70#ibcon#read 3, iclass 17, count 2 2006.229.21:13:15.70#ibcon#about to read 4, iclass 17, count 2 2006.229.21:13:15.70#ibcon#read 4, iclass 17, count 2 2006.229.21:13:15.70#ibcon#about to read 5, iclass 17, count 2 2006.229.21:13:15.70#ibcon#read 5, iclass 17, count 2 2006.229.21:13:15.70#ibcon#about to read 6, iclass 17, count 2 2006.229.21:13:15.70#ibcon#read 6, iclass 17, count 2 2006.229.21:13:15.70#ibcon#end of sib2, iclass 17, count 2 2006.229.21:13:15.70#ibcon#*after write, iclass 17, count 2 2006.229.21:13:15.70#ibcon#*before return 0, iclass 17, count 2 2006.229.21:13:15.70#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:15.70#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:13:15.70#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.21:13:15.70#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:15.70#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:15.82#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:15.82#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:15.82#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:13:15.82#ibcon#first serial, iclass 17, count 0 2006.229.21:13:15.82#ibcon#enter sib2, iclass 17, count 0 2006.229.21:13:15.82#ibcon#flushed, iclass 17, count 0 2006.229.21:13:15.82#ibcon#about to write, iclass 17, count 0 2006.229.21:13:15.82#ibcon#wrote, iclass 17, count 0 2006.229.21:13:15.82#ibcon#about to read 3, iclass 17, count 0 2006.229.21:13:15.84#ibcon#read 3, iclass 17, count 0 2006.229.21:13:15.84#ibcon#about to read 4, iclass 17, count 0 2006.229.21:13:15.84#ibcon#read 4, iclass 17, count 0 2006.229.21:13:15.84#ibcon#about to read 5, iclass 17, count 0 2006.229.21:13:15.84#ibcon#read 5, iclass 17, count 0 2006.229.21:13:15.84#ibcon#about to read 6, iclass 17, count 0 2006.229.21:13:15.84#ibcon#read 6, iclass 17, count 0 2006.229.21:13:15.84#ibcon#end of sib2, iclass 17, count 0 2006.229.21:13:15.84#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:13:15.84#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:13:15.84#ibcon#[27=USB\r\n] 2006.229.21:13:15.84#ibcon#*before write, iclass 17, count 0 2006.229.21:13:15.84#ibcon#enter sib2, iclass 17, count 0 2006.229.21:13:15.84#ibcon#flushed, iclass 17, count 0 2006.229.21:13:15.84#ibcon#about to write, iclass 17, count 0 2006.229.21:13:15.84#ibcon#wrote, iclass 17, count 0 2006.229.21:13:15.84#ibcon#about to read 3, iclass 17, count 0 2006.229.21:13:15.87#ibcon#read 3, iclass 17, count 0 2006.229.21:13:15.87#ibcon#about to read 4, iclass 17, count 0 2006.229.21:13:15.87#ibcon#read 4, iclass 17, count 0 2006.229.21:13:15.87#ibcon#about to read 5, iclass 17, count 0 2006.229.21:13:15.87#ibcon#read 5, iclass 17, count 0 2006.229.21:13:15.87#ibcon#about to read 6, iclass 17, count 0 2006.229.21:13:15.87#ibcon#read 6, iclass 17, count 0 2006.229.21:13:15.87#ibcon#end of sib2, iclass 17, count 0 2006.229.21:13:15.87#ibcon#*after write, iclass 17, count 0 2006.229.21:13:15.87#ibcon#*before return 0, iclass 17, count 0 2006.229.21:13:15.87#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:15.87#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:13:15.87#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:13:15.87#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:13:15.87$vck44/vblo=7,734.99 2006.229.21:13:15.87#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.21:13:15.87#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.21:13:15.87#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:15.87#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:15.87#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:15.87#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:15.87#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:13:15.87#ibcon#first serial, iclass 19, count 0 2006.229.21:13:15.87#ibcon#enter sib2, iclass 19, count 0 2006.229.21:13:15.87#ibcon#flushed, iclass 19, count 0 2006.229.21:13:15.87#ibcon#about to write, iclass 19, count 0 2006.229.21:13:15.87#ibcon#wrote, iclass 19, count 0 2006.229.21:13:15.87#ibcon#about to read 3, iclass 19, count 0 2006.229.21:13:15.89#ibcon#read 3, iclass 19, count 0 2006.229.21:13:15.89#ibcon#about to read 4, iclass 19, count 0 2006.229.21:13:15.89#ibcon#read 4, iclass 19, count 0 2006.229.21:13:15.89#ibcon#about to read 5, iclass 19, count 0 2006.229.21:13:15.89#ibcon#read 5, iclass 19, count 0 2006.229.21:13:15.89#ibcon#about to read 6, iclass 19, count 0 2006.229.21:13:15.89#ibcon#read 6, iclass 19, count 0 2006.229.21:13:15.89#ibcon#end of sib2, iclass 19, count 0 2006.229.21:13:15.89#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:13:15.89#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:13:15.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:13:15.89#ibcon#*before write, iclass 19, count 0 2006.229.21:13:15.89#ibcon#enter sib2, iclass 19, count 0 2006.229.21:13:15.89#ibcon#flushed, iclass 19, count 0 2006.229.21:13:15.89#ibcon#about to write, iclass 19, count 0 2006.229.21:13:15.89#ibcon#wrote, iclass 19, count 0 2006.229.21:13:15.89#ibcon#about to read 3, iclass 19, count 0 2006.229.21:13:15.93#ibcon#read 3, iclass 19, count 0 2006.229.21:13:15.93#ibcon#about to read 4, iclass 19, count 0 2006.229.21:13:15.93#ibcon#read 4, iclass 19, count 0 2006.229.21:13:15.93#ibcon#about to read 5, iclass 19, count 0 2006.229.21:13:15.93#ibcon#read 5, iclass 19, count 0 2006.229.21:13:15.93#ibcon#about to read 6, iclass 19, count 0 2006.229.21:13:15.93#ibcon#read 6, iclass 19, count 0 2006.229.21:13:15.93#ibcon#end of sib2, iclass 19, count 0 2006.229.21:13:15.93#ibcon#*after write, iclass 19, count 0 2006.229.21:13:15.93#ibcon#*before return 0, iclass 19, count 0 2006.229.21:13:15.93#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:15.93#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:13:15.93#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:13:15.93#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:13:15.93$vck44/vb=7,4 2006.229.21:13:15.93#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.21:13:15.93#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.21:13:15.93#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:15.93#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:15.99#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:15.99#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:15.99#ibcon#enter wrdev, iclass 21, count 2 2006.229.21:13:15.99#ibcon#first serial, iclass 21, count 2 2006.229.21:13:15.99#ibcon#enter sib2, iclass 21, count 2 2006.229.21:13:15.99#ibcon#flushed, iclass 21, count 2 2006.229.21:13:15.99#ibcon#about to write, iclass 21, count 2 2006.229.21:13:15.99#ibcon#wrote, iclass 21, count 2 2006.229.21:13:15.99#ibcon#about to read 3, iclass 21, count 2 2006.229.21:13:16.01#ibcon#read 3, iclass 21, count 2 2006.229.21:13:16.01#ibcon#about to read 4, iclass 21, count 2 2006.229.21:13:16.01#ibcon#read 4, iclass 21, count 2 2006.229.21:13:16.01#ibcon#about to read 5, iclass 21, count 2 2006.229.21:13:16.01#ibcon#read 5, iclass 21, count 2 2006.229.21:13:16.01#ibcon#about to read 6, iclass 21, count 2 2006.229.21:13:16.01#ibcon#read 6, iclass 21, count 2 2006.229.21:13:16.01#ibcon#end of sib2, iclass 21, count 2 2006.229.21:13:16.01#ibcon#*mode == 0, iclass 21, count 2 2006.229.21:13:16.01#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.21:13:16.01#ibcon#[27=AT07-04\r\n] 2006.229.21:13:16.01#ibcon#*before write, iclass 21, count 2 2006.229.21:13:16.01#ibcon#enter sib2, iclass 21, count 2 2006.229.21:13:16.01#ibcon#flushed, iclass 21, count 2 2006.229.21:13:16.01#ibcon#about to write, iclass 21, count 2 2006.229.21:13:16.01#ibcon#wrote, iclass 21, count 2 2006.229.21:13:16.01#ibcon#about to read 3, iclass 21, count 2 2006.229.21:13:16.04#ibcon#read 3, iclass 21, count 2 2006.229.21:13:16.04#ibcon#about to read 4, iclass 21, count 2 2006.229.21:13:16.04#ibcon#read 4, iclass 21, count 2 2006.229.21:13:16.04#ibcon#about to read 5, iclass 21, count 2 2006.229.21:13:16.04#ibcon#read 5, iclass 21, count 2 2006.229.21:13:16.04#ibcon#about to read 6, iclass 21, count 2 2006.229.21:13:16.04#ibcon#read 6, iclass 21, count 2 2006.229.21:13:16.04#ibcon#end of sib2, iclass 21, count 2 2006.229.21:13:16.04#ibcon#*after write, iclass 21, count 2 2006.229.21:13:16.04#ibcon#*before return 0, iclass 21, count 2 2006.229.21:13:16.04#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:16.04#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:13:16.04#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.21:13:16.04#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:16.04#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:16.16#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:16.16#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:16.16#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:13:16.16#ibcon#first serial, iclass 21, count 0 2006.229.21:13:16.16#ibcon#enter sib2, iclass 21, count 0 2006.229.21:13:16.16#ibcon#flushed, iclass 21, count 0 2006.229.21:13:16.16#ibcon#about to write, iclass 21, count 0 2006.229.21:13:16.16#ibcon#wrote, iclass 21, count 0 2006.229.21:13:16.16#ibcon#about to read 3, iclass 21, count 0 2006.229.21:13:16.18#ibcon#read 3, iclass 21, count 0 2006.229.21:13:16.18#ibcon#about to read 4, iclass 21, count 0 2006.229.21:13:16.18#ibcon#read 4, iclass 21, count 0 2006.229.21:13:16.18#ibcon#about to read 5, iclass 21, count 0 2006.229.21:13:16.18#ibcon#read 5, iclass 21, count 0 2006.229.21:13:16.18#ibcon#about to read 6, iclass 21, count 0 2006.229.21:13:16.18#ibcon#read 6, iclass 21, count 0 2006.229.21:13:16.18#ibcon#end of sib2, iclass 21, count 0 2006.229.21:13:16.18#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:13:16.18#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:13:16.18#ibcon#[27=USB\r\n] 2006.229.21:13:16.18#ibcon#*before write, iclass 21, count 0 2006.229.21:13:16.18#ibcon#enter sib2, iclass 21, count 0 2006.229.21:13:16.18#ibcon#flushed, iclass 21, count 0 2006.229.21:13:16.18#ibcon#about to write, iclass 21, count 0 2006.229.21:13:16.18#ibcon#wrote, iclass 21, count 0 2006.229.21:13:16.18#ibcon#about to read 3, iclass 21, count 0 2006.229.21:13:16.21#ibcon#read 3, iclass 21, count 0 2006.229.21:13:16.21#ibcon#about to read 4, iclass 21, count 0 2006.229.21:13:16.21#ibcon#read 4, iclass 21, count 0 2006.229.21:13:16.21#ibcon#about to read 5, iclass 21, count 0 2006.229.21:13:16.21#ibcon#read 5, iclass 21, count 0 2006.229.21:13:16.21#ibcon#about to read 6, iclass 21, count 0 2006.229.21:13:16.21#ibcon#read 6, iclass 21, count 0 2006.229.21:13:16.21#ibcon#end of sib2, iclass 21, count 0 2006.229.21:13:16.21#ibcon#*after write, iclass 21, count 0 2006.229.21:13:16.21#ibcon#*before return 0, iclass 21, count 0 2006.229.21:13:16.21#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:16.21#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:13:16.21#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:13:16.21#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:13:16.21$vck44/vblo=8,744.99 2006.229.21:13:16.21#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.21:13:16.21#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.21:13:16.21#ibcon#ireg 17 cls_cnt 0 2006.229.21:13:16.21#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:16.21#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:16.21#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:16.21#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:13:16.21#ibcon#first serial, iclass 23, count 0 2006.229.21:13:16.21#ibcon#enter sib2, iclass 23, count 0 2006.229.21:13:16.21#ibcon#flushed, iclass 23, count 0 2006.229.21:13:16.21#ibcon#about to write, iclass 23, count 0 2006.229.21:13:16.21#ibcon#wrote, iclass 23, count 0 2006.229.21:13:16.21#ibcon#about to read 3, iclass 23, count 0 2006.229.21:13:16.23#ibcon#read 3, iclass 23, count 0 2006.229.21:13:16.23#ibcon#about to read 4, iclass 23, count 0 2006.229.21:13:16.23#ibcon#read 4, iclass 23, count 0 2006.229.21:13:16.23#ibcon#about to read 5, iclass 23, count 0 2006.229.21:13:16.23#ibcon#read 5, iclass 23, count 0 2006.229.21:13:16.23#ibcon#about to read 6, iclass 23, count 0 2006.229.21:13:16.23#ibcon#read 6, iclass 23, count 0 2006.229.21:13:16.23#ibcon#end of sib2, iclass 23, count 0 2006.229.21:13:16.23#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:13:16.23#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:13:16.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:13:16.23#ibcon#*before write, iclass 23, count 0 2006.229.21:13:16.23#ibcon#enter sib2, iclass 23, count 0 2006.229.21:13:16.23#ibcon#flushed, iclass 23, count 0 2006.229.21:13:16.23#ibcon#about to write, iclass 23, count 0 2006.229.21:13:16.23#ibcon#wrote, iclass 23, count 0 2006.229.21:13:16.23#ibcon#about to read 3, iclass 23, count 0 2006.229.21:13:16.27#ibcon#read 3, iclass 23, count 0 2006.229.21:13:16.27#ibcon#about to read 4, iclass 23, count 0 2006.229.21:13:16.27#ibcon#read 4, iclass 23, count 0 2006.229.21:13:16.27#ibcon#about to read 5, iclass 23, count 0 2006.229.21:13:16.27#ibcon#read 5, iclass 23, count 0 2006.229.21:13:16.27#ibcon#about to read 6, iclass 23, count 0 2006.229.21:13:16.27#ibcon#read 6, iclass 23, count 0 2006.229.21:13:16.27#ibcon#end of sib2, iclass 23, count 0 2006.229.21:13:16.27#ibcon#*after write, iclass 23, count 0 2006.229.21:13:16.27#ibcon#*before return 0, iclass 23, count 0 2006.229.21:13:16.27#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:16.27#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:13:16.27#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:13:16.27#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:13:16.27$vck44/vb=8,4 2006.229.21:13:16.27#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.21:13:16.27#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.21:13:16.27#ibcon#ireg 11 cls_cnt 2 2006.229.21:13:16.27#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:16.33#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:16.33#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:16.33#ibcon#enter wrdev, iclass 25, count 2 2006.229.21:13:16.33#ibcon#first serial, iclass 25, count 2 2006.229.21:13:16.33#ibcon#enter sib2, iclass 25, count 2 2006.229.21:13:16.33#ibcon#flushed, iclass 25, count 2 2006.229.21:13:16.33#ibcon#about to write, iclass 25, count 2 2006.229.21:13:16.33#ibcon#wrote, iclass 25, count 2 2006.229.21:13:16.33#ibcon#about to read 3, iclass 25, count 2 2006.229.21:13:16.35#ibcon#read 3, iclass 25, count 2 2006.229.21:13:16.35#ibcon#about to read 4, iclass 25, count 2 2006.229.21:13:16.35#ibcon#read 4, iclass 25, count 2 2006.229.21:13:16.35#ibcon#about to read 5, iclass 25, count 2 2006.229.21:13:16.35#ibcon#read 5, iclass 25, count 2 2006.229.21:13:16.35#ibcon#about to read 6, iclass 25, count 2 2006.229.21:13:16.35#ibcon#read 6, iclass 25, count 2 2006.229.21:13:16.35#ibcon#end of sib2, iclass 25, count 2 2006.229.21:13:16.35#ibcon#*mode == 0, iclass 25, count 2 2006.229.21:13:16.35#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.21:13:16.35#ibcon#[27=AT08-04\r\n] 2006.229.21:13:16.35#ibcon#*before write, iclass 25, count 2 2006.229.21:13:16.35#ibcon#enter sib2, iclass 25, count 2 2006.229.21:13:16.35#ibcon#flushed, iclass 25, count 2 2006.229.21:13:16.35#ibcon#about to write, iclass 25, count 2 2006.229.21:13:16.35#ibcon#wrote, iclass 25, count 2 2006.229.21:13:16.35#ibcon#about to read 3, iclass 25, count 2 2006.229.21:13:16.38#ibcon#read 3, iclass 25, count 2 2006.229.21:13:16.38#ibcon#about to read 4, iclass 25, count 2 2006.229.21:13:16.38#ibcon#read 4, iclass 25, count 2 2006.229.21:13:16.38#ibcon#about to read 5, iclass 25, count 2 2006.229.21:13:16.38#ibcon#read 5, iclass 25, count 2 2006.229.21:13:16.38#ibcon#about to read 6, iclass 25, count 2 2006.229.21:13:16.38#ibcon#read 6, iclass 25, count 2 2006.229.21:13:16.38#ibcon#end of sib2, iclass 25, count 2 2006.229.21:13:16.38#ibcon#*after write, iclass 25, count 2 2006.229.21:13:16.38#ibcon#*before return 0, iclass 25, count 2 2006.229.21:13:16.38#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:16.38#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:13:16.38#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.21:13:16.38#ibcon#ireg 7 cls_cnt 0 2006.229.21:13:16.38#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:16.50#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:16.50#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:16.50#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:13:16.50#ibcon#first serial, iclass 25, count 0 2006.229.21:13:16.50#ibcon#enter sib2, iclass 25, count 0 2006.229.21:13:16.50#ibcon#flushed, iclass 25, count 0 2006.229.21:13:16.50#ibcon#about to write, iclass 25, count 0 2006.229.21:13:16.50#ibcon#wrote, iclass 25, count 0 2006.229.21:13:16.50#ibcon#about to read 3, iclass 25, count 0 2006.229.21:13:16.52#ibcon#read 3, iclass 25, count 0 2006.229.21:13:16.52#ibcon#about to read 4, iclass 25, count 0 2006.229.21:13:16.52#ibcon#read 4, iclass 25, count 0 2006.229.21:13:16.52#ibcon#about to read 5, iclass 25, count 0 2006.229.21:13:16.52#ibcon#read 5, iclass 25, count 0 2006.229.21:13:16.52#ibcon#about to read 6, iclass 25, count 0 2006.229.21:13:16.52#ibcon#read 6, iclass 25, count 0 2006.229.21:13:16.52#ibcon#end of sib2, iclass 25, count 0 2006.229.21:13:16.52#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:13:16.52#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:13:16.52#ibcon#[27=USB\r\n] 2006.229.21:13:16.52#ibcon#*before write, iclass 25, count 0 2006.229.21:13:16.52#ibcon#enter sib2, iclass 25, count 0 2006.229.21:13:16.52#ibcon#flushed, iclass 25, count 0 2006.229.21:13:16.52#ibcon#about to write, iclass 25, count 0 2006.229.21:13:16.52#ibcon#wrote, iclass 25, count 0 2006.229.21:13:16.52#ibcon#about to read 3, iclass 25, count 0 2006.229.21:13:16.55#ibcon#read 3, iclass 25, count 0 2006.229.21:13:16.55#ibcon#about to read 4, iclass 25, count 0 2006.229.21:13:16.55#ibcon#read 4, iclass 25, count 0 2006.229.21:13:16.55#ibcon#about to read 5, iclass 25, count 0 2006.229.21:13:16.55#ibcon#read 5, iclass 25, count 0 2006.229.21:13:16.55#ibcon#about to read 6, iclass 25, count 0 2006.229.21:13:16.55#ibcon#read 6, iclass 25, count 0 2006.229.21:13:16.55#ibcon#end of sib2, iclass 25, count 0 2006.229.21:13:16.55#ibcon#*after write, iclass 25, count 0 2006.229.21:13:16.55#ibcon#*before return 0, iclass 25, count 0 2006.229.21:13:16.55#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:16.55#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:13:16.55#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:13:16.55#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:13:16.55$vck44/vabw=wide 2006.229.21:13:16.55#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.21:13:16.55#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.21:13:16.55#ibcon#ireg 8 cls_cnt 0 2006.229.21:13:16.55#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:16.55#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:16.55#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:16.55#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:13:16.55#ibcon#first serial, iclass 27, count 0 2006.229.21:13:16.55#ibcon#enter sib2, iclass 27, count 0 2006.229.21:13:16.55#ibcon#flushed, iclass 27, count 0 2006.229.21:13:16.55#ibcon#about to write, iclass 27, count 0 2006.229.21:13:16.55#ibcon#wrote, iclass 27, count 0 2006.229.21:13:16.55#ibcon#about to read 3, iclass 27, count 0 2006.229.21:13:16.57#ibcon#read 3, iclass 27, count 0 2006.229.21:13:16.57#ibcon#about to read 4, iclass 27, count 0 2006.229.21:13:16.57#ibcon#read 4, iclass 27, count 0 2006.229.21:13:16.57#ibcon#about to read 5, iclass 27, count 0 2006.229.21:13:16.57#ibcon#read 5, iclass 27, count 0 2006.229.21:13:16.57#ibcon#about to read 6, iclass 27, count 0 2006.229.21:13:16.57#ibcon#read 6, iclass 27, count 0 2006.229.21:13:16.57#ibcon#end of sib2, iclass 27, count 0 2006.229.21:13:16.57#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:13:16.57#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:13:16.57#ibcon#[25=BW32\r\n] 2006.229.21:13:16.57#ibcon#*before write, iclass 27, count 0 2006.229.21:13:16.57#ibcon#enter sib2, iclass 27, count 0 2006.229.21:13:16.57#ibcon#flushed, iclass 27, count 0 2006.229.21:13:16.57#ibcon#about to write, iclass 27, count 0 2006.229.21:13:16.57#ibcon#wrote, iclass 27, count 0 2006.229.21:13:16.57#ibcon#about to read 3, iclass 27, count 0 2006.229.21:13:16.60#ibcon#read 3, iclass 27, count 0 2006.229.21:13:16.60#ibcon#about to read 4, iclass 27, count 0 2006.229.21:13:16.60#ibcon#read 4, iclass 27, count 0 2006.229.21:13:16.60#ibcon#about to read 5, iclass 27, count 0 2006.229.21:13:16.60#ibcon#read 5, iclass 27, count 0 2006.229.21:13:16.60#ibcon#about to read 6, iclass 27, count 0 2006.229.21:13:16.60#ibcon#read 6, iclass 27, count 0 2006.229.21:13:16.60#ibcon#end of sib2, iclass 27, count 0 2006.229.21:13:16.60#ibcon#*after write, iclass 27, count 0 2006.229.21:13:16.60#ibcon#*before return 0, iclass 27, count 0 2006.229.21:13:16.60#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:16.60#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:13:16.60#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:13:16.60#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:13:16.60$vck44/vbbw=wide 2006.229.21:13:16.60#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.21:13:16.60#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.21:13:16.60#ibcon#ireg 8 cls_cnt 0 2006.229.21:13:16.60#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:13:16.67#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:13:16.67#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:13:16.67#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:13:16.67#ibcon#first serial, iclass 29, count 0 2006.229.21:13:16.67#ibcon#enter sib2, iclass 29, count 0 2006.229.21:13:16.67#ibcon#flushed, iclass 29, count 0 2006.229.21:13:16.67#ibcon#about to write, iclass 29, count 0 2006.229.21:13:16.67#ibcon#wrote, iclass 29, count 0 2006.229.21:13:16.67#ibcon#about to read 3, iclass 29, count 0 2006.229.21:13:16.69#ibcon#read 3, iclass 29, count 0 2006.229.21:13:16.69#ibcon#about to read 4, iclass 29, count 0 2006.229.21:13:16.69#ibcon#read 4, iclass 29, count 0 2006.229.21:13:16.69#ibcon#about to read 5, iclass 29, count 0 2006.229.21:13:16.69#ibcon#read 5, iclass 29, count 0 2006.229.21:13:16.69#ibcon#about to read 6, iclass 29, count 0 2006.229.21:13:16.69#ibcon#read 6, iclass 29, count 0 2006.229.21:13:16.69#ibcon#end of sib2, iclass 29, count 0 2006.229.21:13:16.69#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:13:16.69#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:13:16.69#ibcon#[27=BW32\r\n] 2006.229.21:13:16.69#ibcon#*before write, iclass 29, count 0 2006.229.21:13:16.69#ibcon#enter sib2, iclass 29, count 0 2006.229.21:13:16.69#ibcon#flushed, iclass 29, count 0 2006.229.21:13:16.69#ibcon#about to write, iclass 29, count 0 2006.229.21:13:16.69#ibcon#wrote, iclass 29, count 0 2006.229.21:13:16.69#ibcon#about to read 3, iclass 29, count 0 2006.229.21:13:16.72#ibcon#read 3, iclass 29, count 0 2006.229.21:13:16.72#ibcon#about to read 4, iclass 29, count 0 2006.229.21:13:16.72#ibcon#read 4, iclass 29, count 0 2006.229.21:13:16.72#ibcon#about to read 5, iclass 29, count 0 2006.229.21:13:16.72#ibcon#read 5, iclass 29, count 0 2006.229.21:13:16.72#ibcon#about to read 6, iclass 29, count 0 2006.229.21:13:16.72#ibcon#read 6, iclass 29, count 0 2006.229.21:13:16.72#ibcon#end of sib2, iclass 29, count 0 2006.229.21:13:16.72#ibcon#*after write, iclass 29, count 0 2006.229.21:13:16.72#ibcon#*before return 0, iclass 29, count 0 2006.229.21:13:16.72#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:13:16.72#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:13:16.72#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:13:16.72#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:13:16.72$setupk4/ifdk4 2006.229.21:13:16.72$ifdk4/lo= 2006.229.21:13:16.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:13:16.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:13:16.72$ifdk4/patch= 2006.229.21:13:16.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:13:16.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:13:16.72$setupk4/!*+20s 2006.229.21:13:18.53#abcon#<5=/08 1.1 3.9 26.521001002.0\r\n> 2006.229.21:13:18.55#abcon#{5=INTERFACE CLEAR} 2006.229.21:13:18.61#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:13:28.70#abcon#<5=/08 1.2 3.9 26.531001002.0\r\n> 2006.229.21:13:28.72#abcon#{5=INTERFACE CLEAR} 2006.229.21:13:28.78#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:13:31.18$setupk4/"tpicd 2006.229.21:13:31.18$setupk4/echo=off 2006.229.21:13:31.18$setupk4/xlog=off 2006.229.21:13:31.18:!2006.229.21:17:44 2006.229.21:14:01.14#trakl#Source acquired 2006.229.21:14:03.14#flagr#flagr/antenna,acquired 2006.229.21:17:44.00:preob 2006.229.21:17:44.14/onsource/TRACKING 2006.229.21:17:44.14:!2006.229.21:17:54 2006.229.21:17:54.00:"tape 2006.229.21:17:54.00:"st=record 2006.229.21:17:54.00:data_valid=on 2006.229.21:17:54.00:midob 2006.229.21:17:54.14/onsource/TRACKING 2006.229.21:17:54.14/wx/26.69,1002.1,100 2006.229.21:17:54.31/cable/+6.4204E-03 2006.229.21:17:55.40/va/01,08,usb,yes,29,31 2006.229.21:17:55.40/va/02,07,usb,yes,31,32 2006.229.21:17:55.40/va/03,06,usb,yes,39,41 2006.229.21:17:55.40/va/04,07,usb,yes,32,34 2006.229.21:17:55.40/va/05,04,usb,yes,29,29 2006.229.21:17:55.40/va/06,04,usb,yes,32,32 2006.229.21:17:55.40/va/07,05,usb,yes,28,29 2006.229.21:17:55.40/va/08,06,usb,yes,21,25 2006.229.21:17:55.63/valo/01,524.99,yes,locked 2006.229.21:17:55.63/valo/02,534.99,yes,locked 2006.229.21:17:55.63/valo/03,564.99,yes,locked 2006.229.21:17:55.63/valo/04,624.99,yes,locked 2006.229.21:17:55.63/valo/05,734.99,yes,locked 2006.229.21:17:55.63/valo/06,814.99,yes,locked 2006.229.21:17:55.63/valo/07,864.99,yes,locked 2006.229.21:17:55.63/valo/08,884.99,yes,locked 2006.229.21:17:56.72/vb/01,04,usb,yes,31,28 2006.229.21:17:56.72/vb/02,04,usb,yes,33,33 2006.229.21:17:56.72/vb/03,04,usb,yes,30,33 2006.229.21:17:56.72/vb/04,04,usb,yes,34,33 2006.229.21:17:56.72/vb/05,04,usb,yes,27,29 2006.229.21:17:56.72/vb/06,04,usb,yes,31,27 2006.229.21:17:56.72/vb/07,04,usb,yes,31,31 2006.229.21:17:56.72/vb/08,04,usb,yes,28,32 2006.229.21:17:56.95/vblo/01,629.99,yes,locked 2006.229.21:17:56.95/vblo/02,634.99,yes,locked 2006.229.21:17:56.95/vblo/03,649.99,yes,locked 2006.229.21:17:56.95/vblo/04,679.99,yes,locked 2006.229.21:17:56.95/vblo/05,709.99,yes,locked 2006.229.21:17:56.95/vblo/06,719.99,yes,locked 2006.229.21:17:56.95/vblo/07,734.99,yes,locked 2006.229.21:17:56.95/vblo/08,744.99,yes,locked 2006.229.21:17:57.10/vabw/8 2006.229.21:17:57.25/vbbw/8 2006.229.21:17:57.34/xfe/off,on,12.5 2006.229.21:17:57.73/ifatt/23,28,28,28 2006.229.21:17:58.08/fmout-gps/S +4.52E-07 2006.229.21:17:58.12:!2006.229.21:19:34 2006.229.21:19:34.00:data_valid=off 2006.229.21:19:34.00:"et 2006.229.21:19:34.00:!+3s 2006.229.21:19:37.01:"tape 2006.229.21:19:37.01:postob 2006.229.21:19:37.13/cable/+6.4202E-03 2006.229.21:19:37.13/wx/26.76,1002.1,100 2006.229.21:19:38.08/fmout-gps/S +4.53E-07 2006.229.21:19:38.08:scan_name=229-2121,jd0608,70 2006.229.21:19:38.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.229.21:19:39.14#flagr#flagr/antenna,new-source 2006.229.21:19:39.14:checkk5 2006.229.21:19:39.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:19:39.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:19:40.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:19:40.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:19:41.11/chk_obsdata//k5ts1/T2292117??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.21:19:41.51/chk_obsdata//k5ts2/T2292117??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.21:19:41.92/chk_obsdata//k5ts3/T2292117??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.21:19:42.33/chk_obsdata//k5ts4/T2292117??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.21:19:43.05/k5log//k5ts1_log_newline 2006.229.21:19:43.75/k5log//k5ts2_log_newline 2006.229.21:19:44.49/k5log//k5ts3_log_newline 2006.229.21:19:45.20/k5log//k5ts4_log_newline 2006.229.21:19:45.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:19:45.23:setupk4=1 2006.229.21:19:45.23$setupk4/echo=on 2006.229.21:19:45.23$setupk4/pcalon 2006.229.21:19:45.23$pcalon/"no phase cal control is implemented here 2006.229.21:19:45.23$setupk4/"tpicd=stop 2006.229.21:19:45.23$setupk4/"rec=synch_on 2006.229.21:19:45.23$setupk4/"rec_mode=128 2006.229.21:19:45.23$setupk4/!* 2006.229.21:19:45.23$setupk4/recpk4 2006.229.21:19:45.23$recpk4/recpatch= 2006.229.21:19:45.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:19:45.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:19:45.23$setupk4/vck44 2006.229.21:19:45.23$vck44/valo=1,524.99 2006.229.21:19:45.23#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.21:19:45.23#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.21:19:45.23#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:45.23#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:45.23#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:45.23#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:45.23#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:19:45.23#ibcon#first serial, iclass 37, count 0 2006.229.21:19:45.23#ibcon#enter sib2, iclass 37, count 0 2006.229.21:19:45.23#ibcon#flushed, iclass 37, count 0 2006.229.21:19:45.23#ibcon#about to write, iclass 37, count 0 2006.229.21:19:45.23#ibcon#wrote, iclass 37, count 0 2006.229.21:19:45.23#ibcon#about to read 3, iclass 37, count 0 2006.229.21:19:45.25#ibcon#read 3, iclass 37, count 0 2006.229.21:19:45.25#ibcon#about to read 4, iclass 37, count 0 2006.229.21:19:45.25#ibcon#read 4, iclass 37, count 0 2006.229.21:19:45.25#ibcon#about to read 5, iclass 37, count 0 2006.229.21:19:45.25#ibcon#read 5, iclass 37, count 0 2006.229.21:19:45.25#ibcon#about to read 6, iclass 37, count 0 2006.229.21:19:45.25#ibcon#read 6, iclass 37, count 0 2006.229.21:19:45.25#ibcon#end of sib2, iclass 37, count 0 2006.229.21:19:45.25#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:19:45.25#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:19:45.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:19:45.25#ibcon#*before write, iclass 37, count 0 2006.229.21:19:45.25#ibcon#enter sib2, iclass 37, count 0 2006.229.21:19:45.25#ibcon#flushed, iclass 37, count 0 2006.229.21:19:45.25#ibcon#about to write, iclass 37, count 0 2006.229.21:19:45.25#ibcon#wrote, iclass 37, count 0 2006.229.21:19:45.25#ibcon#about to read 3, iclass 37, count 0 2006.229.21:19:45.30#ibcon#read 3, iclass 37, count 0 2006.229.21:19:45.30#ibcon#about to read 4, iclass 37, count 0 2006.229.21:19:45.30#ibcon#read 4, iclass 37, count 0 2006.229.21:19:45.30#ibcon#about to read 5, iclass 37, count 0 2006.229.21:19:45.30#ibcon#read 5, iclass 37, count 0 2006.229.21:19:45.30#ibcon#about to read 6, iclass 37, count 0 2006.229.21:19:45.30#ibcon#read 6, iclass 37, count 0 2006.229.21:19:45.30#ibcon#end of sib2, iclass 37, count 0 2006.229.21:19:45.30#ibcon#*after write, iclass 37, count 0 2006.229.21:19:45.30#ibcon#*before return 0, iclass 37, count 0 2006.229.21:19:45.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:45.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:45.30#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:19:45.30#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:19:45.30$vck44/va=1,8 2006.229.21:19:45.30#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.21:19:45.30#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.21:19:45.30#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:45.30#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:45.30#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:45.30#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:45.30#ibcon#enter wrdev, iclass 39, count 2 2006.229.21:19:45.30#ibcon#first serial, iclass 39, count 2 2006.229.21:19:45.30#ibcon#enter sib2, iclass 39, count 2 2006.229.21:19:45.30#ibcon#flushed, iclass 39, count 2 2006.229.21:19:45.30#ibcon#about to write, iclass 39, count 2 2006.229.21:19:45.30#ibcon#wrote, iclass 39, count 2 2006.229.21:19:45.30#ibcon#about to read 3, iclass 39, count 2 2006.229.21:19:45.32#ibcon#read 3, iclass 39, count 2 2006.229.21:19:45.32#ibcon#about to read 4, iclass 39, count 2 2006.229.21:19:45.32#ibcon#read 4, iclass 39, count 2 2006.229.21:19:45.32#ibcon#about to read 5, iclass 39, count 2 2006.229.21:19:45.32#ibcon#read 5, iclass 39, count 2 2006.229.21:19:45.32#ibcon#about to read 6, iclass 39, count 2 2006.229.21:19:45.32#ibcon#read 6, iclass 39, count 2 2006.229.21:19:45.32#ibcon#end of sib2, iclass 39, count 2 2006.229.21:19:45.32#ibcon#*mode == 0, iclass 39, count 2 2006.229.21:19:45.32#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.21:19:45.32#ibcon#[25=AT01-08\r\n] 2006.229.21:19:45.32#ibcon#*before write, iclass 39, count 2 2006.229.21:19:45.32#ibcon#enter sib2, iclass 39, count 2 2006.229.21:19:45.32#ibcon#flushed, iclass 39, count 2 2006.229.21:19:45.32#ibcon#about to write, iclass 39, count 2 2006.229.21:19:45.32#ibcon#wrote, iclass 39, count 2 2006.229.21:19:45.32#ibcon#about to read 3, iclass 39, count 2 2006.229.21:19:45.35#ibcon#read 3, iclass 39, count 2 2006.229.21:19:45.35#ibcon#about to read 4, iclass 39, count 2 2006.229.21:19:45.35#ibcon#read 4, iclass 39, count 2 2006.229.21:19:45.35#ibcon#about to read 5, iclass 39, count 2 2006.229.21:19:45.35#ibcon#read 5, iclass 39, count 2 2006.229.21:19:45.35#ibcon#about to read 6, iclass 39, count 2 2006.229.21:19:45.35#ibcon#read 6, iclass 39, count 2 2006.229.21:19:45.35#ibcon#end of sib2, iclass 39, count 2 2006.229.21:19:45.35#ibcon#*after write, iclass 39, count 2 2006.229.21:19:45.35#ibcon#*before return 0, iclass 39, count 2 2006.229.21:19:45.35#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:45.35#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:45.35#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.21:19:45.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:45.35#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:45.47#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:45.47#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:45.47#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:19:45.47#ibcon#first serial, iclass 39, count 0 2006.229.21:19:45.47#ibcon#enter sib2, iclass 39, count 0 2006.229.21:19:45.47#ibcon#flushed, iclass 39, count 0 2006.229.21:19:45.47#ibcon#about to write, iclass 39, count 0 2006.229.21:19:45.47#ibcon#wrote, iclass 39, count 0 2006.229.21:19:45.47#ibcon#about to read 3, iclass 39, count 0 2006.229.21:19:45.49#ibcon#read 3, iclass 39, count 0 2006.229.21:19:45.49#ibcon#about to read 4, iclass 39, count 0 2006.229.21:19:45.49#ibcon#read 4, iclass 39, count 0 2006.229.21:19:45.49#ibcon#about to read 5, iclass 39, count 0 2006.229.21:19:45.49#ibcon#read 5, iclass 39, count 0 2006.229.21:19:45.49#ibcon#about to read 6, iclass 39, count 0 2006.229.21:19:45.49#ibcon#read 6, iclass 39, count 0 2006.229.21:19:45.49#ibcon#end of sib2, iclass 39, count 0 2006.229.21:19:45.49#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:19:45.49#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:19:45.49#ibcon#[25=USB\r\n] 2006.229.21:19:45.49#ibcon#*before write, iclass 39, count 0 2006.229.21:19:45.49#ibcon#enter sib2, iclass 39, count 0 2006.229.21:19:45.49#ibcon#flushed, iclass 39, count 0 2006.229.21:19:45.49#ibcon#about to write, iclass 39, count 0 2006.229.21:19:45.49#ibcon#wrote, iclass 39, count 0 2006.229.21:19:45.49#ibcon#about to read 3, iclass 39, count 0 2006.229.21:19:45.52#ibcon#read 3, iclass 39, count 0 2006.229.21:19:45.52#ibcon#about to read 4, iclass 39, count 0 2006.229.21:19:45.52#ibcon#read 4, iclass 39, count 0 2006.229.21:19:45.52#ibcon#about to read 5, iclass 39, count 0 2006.229.21:19:45.52#ibcon#read 5, iclass 39, count 0 2006.229.21:19:45.52#ibcon#about to read 6, iclass 39, count 0 2006.229.21:19:45.52#ibcon#read 6, iclass 39, count 0 2006.229.21:19:45.52#ibcon#end of sib2, iclass 39, count 0 2006.229.21:19:45.52#ibcon#*after write, iclass 39, count 0 2006.229.21:19:45.52#ibcon#*before return 0, iclass 39, count 0 2006.229.21:19:45.52#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:45.52#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:45.52#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:19:45.52#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:19:45.52$vck44/valo=2,534.99 2006.229.21:19:45.52#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.21:19:45.52#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.21:19:45.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:45.52#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:45.52#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:45.52#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:45.52#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:19:45.52#ibcon#first serial, iclass 3, count 0 2006.229.21:19:45.52#ibcon#enter sib2, iclass 3, count 0 2006.229.21:19:45.52#ibcon#flushed, iclass 3, count 0 2006.229.21:19:45.52#ibcon#about to write, iclass 3, count 0 2006.229.21:19:45.52#ibcon#wrote, iclass 3, count 0 2006.229.21:19:45.52#ibcon#about to read 3, iclass 3, count 0 2006.229.21:19:45.54#ibcon#read 3, iclass 3, count 0 2006.229.21:19:45.54#ibcon#about to read 4, iclass 3, count 0 2006.229.21:19:45.54#ibcon#read 4, iclass 3, count 0 2006.229.21:19:45.54#ibcon#about to read 5, iclass 3, count 0 2006.229.21:19:45.54#ibcon#read 5, iclass 3, count 0 2006.229.21:19:45.54#ibcon#about to read 6, iclass 3, count 0 2006.229.21:19:45.54#ibcon#read 6, iclass 3, count 0 2006.229.21:19:45.54#ibcon#end of sib2, iclass 3, count 0 2006.229.21:19:45.54#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:19:45.54#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:19:45.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:19:45.54#ibcon#*before write, iclass 3, count 0 2006.229.21:19:45.54#ibcon#enter sib2, iclass 3, count 0 2006.229.21:19:45.54#ibcon#flushed, iclass 3, count 0 2006.229.21:19:45.54#ibcon#about to write, iclass 3, count 0 2006.229.21:19:45.54#ibcon#wrote, iclass 3, count 0 2006.229.21:19:45.54#ibcon#about to read 3, iclass 3, count 0 2006.229.21:19:45.58#ibcon#read 3, iclass 3, count 0 2006.229.21:19:45.58#ibcon#about to read 4, iclass 3, count 0 2006.229.21:19:45.58#ibcon#read 4, iclass 3, count 0 2006.229.21:19:45.58#ibcon#about to read 5, iclass 3, count 0 2006.229.21:19:45.58#ibcon#read 5, iclass 3, count 0 2006.229.21:19:45.58#ibcon#about to read 6, iclass 3, count 0 2006.229.21:19:45.58#ibcon#read 6, iclass 3, count 0 2006.229.21:19:45.58#ibcon#end of sib2, iclass 3, count 0 2006.229.21:19:45.58#ibcon#*after write, iclass 3, count 0 2006.229.21:19:45.58#ibcon#*before return 0, iclass 3, count 0 2006.229.21:19:45.58#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:45.58#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:45.58#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:19:45.58#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:19:45.58$vck44/va=2,7 2006.229.21:19:45.58#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.21:19:45.58#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.21:19:45.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:45.58#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:45.64#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:45.64#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:45.64#ibcon#enter wrdev, iclass 5, count 2 2006.229.21:19:45.64#ibcon#first serial, iclass 5, count 2 2006.229.21:19:45.64#ibcon#enter sib2, iclass 5, count 2 2006.229.21:19:45.64#ibcon#flushed, iclass 5, count 2 2006.229.21:19:45.64#ibcon#about to write, iclass 5, count 2 2006.229.21:19:45.64#ibcon#wrote, iclass 5, count 2 2006.229.21:19:45.64#ibcon#about to read 3, iclass 5, count 2 2006.229.21:19:45.66#ibcon#read 3, iclass 5, count 2 2006.229.21:19:45.66#ibcon#about to read 4, iclass 5, count 2 2006.229.21:19:45.66#ibcon#read 4, iclass 5, count 2 2006.229.21:19:45.66#ibcon#about to read 5, iclass 5, count 2 2006.229.21:19:45.66#ibcon#read 5, iclass 5, count 2 2006.229.21:19:45.66#ibcon#about to read 6, iclass 5, count 2 2006.229.21:19:45.66#ibcon#read 6, iclass 5, count 2 2006.229.21:19:45.66#ibcon#end of sib2, iclass 5, count 2 2006.229.21:19:45.66#ibcon#*mode == 0, iclass 5, count 2 2006.229.21:19:45.66#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.21:19:45.66#ibcon#[25=AT02-07\r\n] 2006.229.21:19:45.66#ibcon#*before write, iclass 5, count 2 2006.229.21:19:45.66#ibcon#enter sib2, iclass 5, count 2 2006.229.21:19:45.66#ibcon#flushed, iclass 5, count 2 2006.229.21:19:45.66#ibcon#about to write, iclass 5, count 2 2006.229.21:19:45.66#ibcon#wrote, iclass 5, count 2 2006.229.21:19:45.66#ibcon#about to read 3, iclass 5, count 2 2006.229.21:19:45.69#ibcon#read 3, iclass 5, count 2 2006.229.21:19:45.69#ibcon#about to read 4, iclass 5, count 2 2006.229.21:19:45.69#ibcon#read 4, iclass 5, count 2 2006.229.21:19:45.69#ibcon#about to read 5, iclass 5, count 2 2006.229.21:19:45.69#ibcon#read 5, iclass 5, count 2 2006.229.21:19:45.69#ibcon#about to read 6, iclass 5, count 2 2006.229.21:19:45.69#ibcon#read 6, iclass 5, count 2 2006.229.21:19:45.69#ibcon#end of sib2, iclass 5, count 2 2006.229.21:19:45.69#ibcon#*after write, iclass 5, count 2 2006.229.21:19:45.69#ibcon#*before return 0, iclass 5, count 2 2006.229.21:19:45.69#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:45.69#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:45.69#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.21:19:45.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:45.69#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:45.81#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:45.81#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:45.81#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:19:45.81#ibcon#first serial, iclass 5, count 0 2006.229.21:19:45.81#ibcon#enter sib2, iclass 5, count 0 2006.229.21:19:45.81#ibcon#flushed, iclass 5, count 0 2006.229.21:19:45.81#ibcon#about to write, iclass 5, count 0 2006.229.21:19:45.81#ibcon#wrote, iclass 5, count 0 2006.229.21:19:45.81#ibcon#about to read 3, iclass 5, count 0 2006.229.21:19:45.83#ibcon#read 3, iclass 5, count 0 2006.229.21:19:45.83#ibcon#about to read 4, iclass 5, count 0 2006.229.21:19:45.83#ibcon#read 4, iclass 5, count 0 2006.229.21:19:45.83#ibcon#about to read 5, iclass 5, count 0 2006.229.21:19:45.83#ibcon#read 5, iclass 5, count 0 2006.229.21:19:45.83#ibcon#about to read 6, iclass 5, count 0 2006.229.21:19:45.83#ibcon#read 6, iclass 5, count 0 2006.229.21:19:45.83#ibcon#end of sib2, iclass 5, count 0 2006.229.21:19:45.83#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:19:45.83#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:19:45.83#ibcon#[25=USB\r\n] 2006.229.21:19:45.83#ibcon#*before write, iclass 5, count 0 2006.229.21:19:45.83#ibcon#enter sib2, iclass 5, count 0 2006.229.21:19:45.83#ibcon#flushed, iclass 5, count 0 2006.229.21:19:45.83#ibcon#about to write, iclass 5, count 0 2006.229.21:19:45.83#ibcon#wrote, iclass 5, count 0 2006.229.21:19:45.83#ibcon#about to read 3, iclass 5, count 0 2006.229.21:19:45.86#ibcon#read 3, iclass 5, count 0 2006.229.21:19:45.86#ibcon#about to read 4, iclass 5, count 0 2006.229.21:19:45.86#ibcon#read 4, iclass 5, count 0 2006.229.21:19:45.86#ibcon#about to read 5, iclass 5, count 0 2006.229.21:19:45.86#ibcon#read 5, iclass 5, count 0 2006.229.21:19:45.86#ibcon#about to read 6, iclass 5, count 0 2006.229.21:19:45.86#ibcon#read 6, iclass 5, count 0 2006.229.21:19:45.86#ibcon#end of sib2, iclass 5, count 0 2006.229.21:19:45.86#ibcon#*after write, iclass 5, count 0 2006.229.21:19:45.86#ibcon#*before return 0, iclass 5, count 0 2006.229.21:19:45.86#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:45.86#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:45.86#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:19:45.86#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:19:45.86$vck44/valo=3,564.99 2006.229.21:19:45.86#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.21:19:45.86#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.21:19:45.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:45.86#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:45.86#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:45.86#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:45.86#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:19:45.86#ibcon#first serial, iclass 7, count 0 2006.229.21:19:45.86#ibcon#enter sib2, iclass 7, count 0 2006.229.21:19:45.86#ibcon#flushed, iclass 7, count 0 2006.229.21:19:45.86#ibcon#about to write, iclass 7, count 0 2006.229.21:19:45.86#ibcon#wrote, iclass 7, count 0 2006.229.21:19:45.86#ibcon#about to read 3, iclass 7, count 0 2006.229.21:19:45.88#ibcon#read 3, iclass 7, count 0 2006.229.21:19:45.88#ibcon#about to read 4, iclass 7, count 0 2006.229.21:19:45.88#ibcon#read 4, iclass 7, count 0 2006.229.21:19:45.88#ibcon#about to read 5, iclass 7, count 0 2006.229.21:19:45.88#ibcon#read 5, iclass 7, count 0 2006.229.21:19:45.88#ibcon#about to read 6, iclass 7, count 0 2006.229.21:19:45.88#ibcon#read 6, iclass 7, count 0 2006.229.21:19:45.88#ibcon#end of sib2, iclass 7, count 0 2006.229.21:19:45.88#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:19:45.88#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:19:45.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:19:45.88#ibcon#*before write, iclass 7, count 0 2006.229.21:19:45.88#ibcon#enter sib2, iclass 7, count 0 2006.229.21:19:45.88#ibcon#flushed, iclass 7, count 0 2006.229.21:19:45.88#ibcon#about to write, iclass 7, count 0 2006.229.21:19:45.88#ibcon#wrote, iclass 7, count 0 2006.229.21:19:45.88#ibcon#about to read 3, iclass 7, count 0 2006.229.21:19:45.92#ibcon#read 3, iclass 7, count 0 2006.229.21:19:45.92#ibcon#about to read 4, iclass 7, count 0 2006.229.21:19:45.92#ibcon#read 4, iclass 7, count 0 2006.229.21:19:45.92#ibcon#about to read 5, iclass 7, count 0 2006.229.21:19:45.92#ibcon#read 5, iclass 7, count 0 2006.229.21:19:45.92#ibcon#about to read 6, iclass 7, count 0 2006.229.21:19:45.92#ibcon#read 6, iclass 7, count 0 2006.229.21:19:45.92#ibcon#end of sib2, iclass 7, count 0 2006.229.21:19:45.92#ibcon#*after write, iclass 7, count 0 2006.229.21:19:45.92#ibcon#*before return 0, iclass 7, count 0 2006.229.21:19:45.92#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:45.92#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:45.92#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:19:45.92#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:19:45.92$vck44/va=3,6 2006.229.21:19:45.92#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.21:19:45.92#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.21:19:45.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:45.92#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:45.98#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:45.98#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:45.98#ibcon#enter wrdev, iclass 11, count 2 2006.229.21:19:45.98#ibcon#first serial, iclass 11, count 2 2006.229.21:19:45.98#ibcon#enter sib2, iclass 11, count 2 2006.229.21:19:45.98#ibcon#flushed, iclass 11, count 2 2006.229.21:19:45.98#ibcon#about to write, iclass 11, count 2 2006.229.21:19:45.98#ibcon#wrote, iclass 11, count 2 2006.229.21:19:45.98#ibcon#about to read 3, iclass 11, count 2 2006.229.21:19:46.00#ibcon#read 3, iclass 11, count 2 2006.229.21:19:46.00#ibcon#about to read 4, iclass 11, count 2 2006.229.21:19:46.00#ibcon#read 4, iclass 11, count 2 2006.229.21:19:46.00#ibcon#about to read 5, iclass 11, count 2 2006.229.21:19:46.00#ibcon#read 5, iclass 11, count 2 2006.229.21:19:46.00#ibcon#about to read 6, iclass 11, count 2 2006.229.21:19:46.00#ibcon#read 6, iclass 11, count 2 2006.229.21:19:46.00#ibcon#end of sib2, iclass 11, count 2 2006.229.21:19:46.00#ibcon#*mode == 0, iclass 11, count 2 2006.229.21:19:46.00#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.21:19:46.00#ibcon#[25=AT03-06\r\n] 2006.229.21:19:46.00#ibcon#*before write, iclass 11, count 2 2006.229.21:19:46.00#ibcon#enter sib2, iclass 11, count 2 2006.229.21:19:46.00#ibcon#flushed, iclass 11, count 2 2006.229.21:19:46.00#ibcon#about to write, iclass 11, count 2 2006.229.21:19:46.00#ibcon#wrote, iclass 11, count 2 2006.229.21:19:46.00#ibcon#about to read 3, iclass 11, count 2 2006.229.21:19:46.03#ibcon#read 3, iclass 11, count 2 2006.229.21:19:46.03#ibcon#about to read 4, iclass 11, count 2 2006.229.21:19:46.03#ibcon#read 4, iclass 11, count 2 2006.229.21:19:46.03#ibcon#about to read 5, iclass 11, count 2 2006.229.21:19:46.03#ibcon#read 5, iclass 11, count 2 2006.229.21:19:46.03#ibcon#about to read 6, iclass 11, count 2 2006.229.21:19:46.03#ibcon#read 6, iclass 11, count 2 2006.229.21:19:46.03#ibcon#end of sib2, iclass 11, count 2 2006.229.21:19:46.03#ibcon#*after write, iclass 11, count 2 2006.229.21:19:46.03#ibcon#*before return 0, iclass 11, count 2 2006.229.21:19:46.03#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:46.03#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:46.03#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.21:19:46.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:46.03#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:46.15#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:46.15#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:46.15#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:19:46.15#ibcon#first serial, iclass 11, count 0 2006.229.21:19:46.15#ibcon#enter sib2, iclass 11, count 0 2006.229.21:19:46.15#ibcon#flushed, iclass 11, count 0 2006.229.21:19:46.15#ibcon#about to write, iclass 11, count 0 2006.229.21:19:46.15#ibcon#wrote, iclass 11, count 0 2006.229.21:19:46.15#ibcon#about to read 3, iclass 11, count 0 2006.229.21:19:46.17#ibcon#read 3, iclass 11, count 0 2006.229.21:19:46.17#ibcon#about to read 4, iclass 11, count 0 2006.229.21:19:46.17#ibcon#read 4, iclass 11, count 0 2006.229.21:19:46.17#ibcon#about to read 5, iclass 11, count 0 2006.229.21:19:46.17#ibcon#read 5, iclass 11, count 0 2006.229.21:19:46.17#ibcon#about to read 6, iclass 11, count 0 2006.229.21:19:46.17#ibcon#read 6, iclass 11, count 0 2006.229.21:19:46.17#ibcon#end of sib2, iclass 11, count 0 2006.229.21:19:46.17#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:19:46.17#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:19:46.17#ibcon#[25=USB\r\n] 2006.229.21:19:46.17#ibcon#*before write, iclass 11, count 0 2006.229.21:19:46.17#ibcon#enter sib2, iclass 11, count 0 2006.229.21:19:46.17#ibcon#flushed, iclass 11, count 0 2006.229.21:19:46.17#ibcon#about to write, iclass 11, count 0 2006.229.21:19:46.17#ibcon#wrote, iclass 11, count 0 2006.229.21:19:46.17#ibcon#about to read 3, iclass 11, count 0 2006.229.21:19:46.20#ibcon#read 3, iclass 11, count 0 2006.229.21:19:46.20#ibcon#about to read 4, iclass 11, count 0 2006.229.21:19:46.20#ibcon#read 4, iclass 11, count 0 2006.229.21:19:46.20#ibcon#about to read 5, iclass 11, count 0 2006.229.21:19:46.20#ibcon#read 5, iclass 11, count 0 2006.229.21:19:46.20#ibcon#about to read 6, iclass 11, count 0 2006.229.21:19:46.20#ibcon#read 6, iclass 11, count 0 2006.229.21:19:46.20#ibcon#end of sib2, iclass 11, count 0 2006.229.21:19:46.20#ibcon#*after write, iclass 11, count 0 2006.229.21:19:46.20#ibcon#*before return 0, iclass 11, count 0 2006.229.21:19:46.20#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:46.20#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:46.20#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:19:46.20#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:19:46.20$vck44/valo=4,624.99 2006.229.21:19:46.20#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.21:19:46.20#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.21:19:46.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:46.20#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:46.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:46.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:46.20#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:19:46.20#ibcon#first serial, iclass 13, count 0 2006.229.21:19:46.20#ibcon#enter sib2, iclass 13, count 0 2006.229.21:19:46.20#ibcon#flushed, iclass 13, count 0 2006.229.21:19:46.20#ibcon#about to write, iclass 13, count 0 2006.229.21:19:46.20#ibcon#wrote, iclass 13, count 0 2006.229.21:19:46.20#ibcon#about to read 3, iclass 13, count 0 2006.229.21:19:46.22#ibcon#read 3, iclass 13, count 0 2006.229.21:19:46.22#ibcon#about to read 4, iclass 13, count 0 2006.229.21:19:46.22#ibcon#read 4, iclass 13, count 0 2006.229.21:19:46.22#ibcon#about to read 5, iclass 13, count 0 2006.229.21:19:46.22#ibcon#read 5, iclass 13, count 0 2006.229.21:19:46.22#ibcon#about to read 6, iclass 13, count 0 2006.229.21:19:46.22#ibcon#read 6, iclass 13, count 0 2006.229.21:19:46.22#ibcon#end of sib2, iclass 13, count 0 2006.229.21:19:46.22#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:19:46.22#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:19:46.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:19:46.22#ibcon#*before write, iclass 13, count 0 2006.229.21:19:46.22#ibcon#enter sib2, iclass 13, count 0 2006.229.21:19:46.22#ibcon#flushed, iclass 13, count 0 2006.229.21:19:46.22#ibcon#about to write, iclass 13, count 0 2006.229.21:19:46.22#ibcon#wrote, iclass 13, count 0 2006.229.21:19:46.22#ibcon#about to read 3, iclass 13, count 0 2006.229.21:19:46.26#ibcon#read 3, iclass 13, count 0 2006.229.21:19:46.26#ibcon#about to read 4, iclass 13, count 0 2006.229.21:19:46.26#ibcon#read 4, iclass 13, count 0 2006.229.21:19:46.26#ibcon#about to read 5, iclass 13, count 0 2006.229.21:19:46.26#ibcon#read 5, iclass 13, count 0 2006.229.21:19:46.26#ibcon#about to read 6, iclass 13, count 0 2006.229.21:19:46.26#ibcon#read 6, iclass 13, count 0 2006.229.21:19:46.26#ibcon#end of sib2, iclass 13, count 0 2006.229.21:19:46.26#ibcon#*after write, iclass 13, count 0 2006.229.21:19:46.26#ibcon#*before return 0, iclass 13, count 0 2006.229.21:19:46.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:46.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:46.26#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:19:46.26#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:19:46.26$vck44/va=4,7 2006.229.21:19:46.26#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.21:19:46.26#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.21:19:46.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:46.26#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:46.32#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:46.32#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:46.32#ibcon#enter wrdev, iclass 15, count 2 2006.229.21:19:46.32#ibcon#first serial, iclass 15, count 2 2006.229.21:19:46.32#ibcon#enter sib2, iclass 15, count 2 2006.229.21:19:46.32#ibcon#flushed, iclass 15, count 2 2006.229.21:19:46.32#ibcon#about to write, iclass 15, count 2 2006.229.21:19:46.32#ibcon#wrote, iclass 15, count 2 2006.229.21:19:46.32#ibcon#about to read 3, iclass 15, count 2 2006.229.21:19:46.34#ibcon#read 3, iclass 15, count 2 2006.229.21:19:46.34#ibcon#about to read 4, iclass 15, count 2 2006.229.21:19:46.34#ibcon#read 4, iclass 15, count 2 2006.229.21:19:46.34#ibcon#about to read 5, iclass 15, count 2 2006.229.21:19:46.34#ibcon#read 5, iclass 15, count 2 2006.229.21:19:46.34#ibcon#about to read 6, iclass 15, count 2 2006.229.21:19:46.34#ibcon#read 6, iclass 15, count 2 2006.229.21:19:46.34#ibcon#end of sib2, iclass 15, count 2 2006.229.21:19:46.34#ibcon#*mode == 0, iclass 15, count 2 2006.229.21:19:46.34#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.21:19:46.34#ibcon#[25=AT04-07\r\n] 2006.229.21:19:46.34#ibcon#*before write, iclass 15, count 2 2006.229.21:19:46.34#ibcon#enter sib2, iclass 15, count 2 2006.229.21:19:46.34#ibcon#flushed, iclass 15, count 2 2006.229.21:19:46.34#ibcon#about to write, iclass 15, count 2 2006.229.21:19:46.34#ibcon#wrote, iclass 15, count 2 2006.229.21:19:46.34#ibcon#about to read 3, iclass 15, count 2 2006.229.21:19:46.37#ibcon#read 3, iclass 15, count 2 2006.229.21:19:46.37#ibcon#about to read 4, iclass 15, count 2 2006.229.21:19:46.37#ibcon#read 4, iclass 15, count 2 2006.229.21:19:46.37#ibcon#about to read 5, iclass 15, count 2 2006.229.21:19:46.37#ibcon#read 5, iclass 15, count 2 2006.229.21:19:46.37#ibcon#about to read 6, iclass 15, count 2 2006.229.21:19:46.37#ibcon#read 6, iclass 15, count 2 2006.229.21:19:46.37#ibcon#end of sib2, iclass 15, count 2 2006.229.21:19:46.37#ibcon#*after write, iclass 15, count 2 2006.229.21:19:46.37#ibcon#*before return 0, iclass 15, count 2 2006.229.21:19:46.37#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:46.37#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:46.37#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.21:19:46.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:46.37#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:46.49#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:46.49#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:46.49#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:19:46.49#ibcon#first serial, iclass 15, count 0 2006.229.21:19:46.49#ibcon#enter sib2, iclass 15, count 0 2006.229.21:19:46.49#ibcon#flushed, iclass 15, count 0 2006.229.21:19:46.49#ibcon#about to write, iclass 15, count 0 2006.229.21:19:46.49#ibcon#wrote, iclass 15, count 0 2006.229.21:19:46.49#ibcon#about to read 3, iclass 15, count 0 2006.229.21:19:46.51#ibcon#read 3, iclass 15, count 0 2006.229.21:19:46.51#ibcon#about to read 4, iclass 15, count 0 2006.229.21:19:46.51#ibcon#read 4, iclass 15, count 0 2006.229.21:19:46.51#ibcon#about to read 5, iclass 15, count 0 2006.229.21:19:46.51#ibcon#read 5, iclass 15, count 0 2006.229.21:19:46.51#ibcon#about to read 6, iclass 15, count 0 2006.229.21:19:46.51#ibcon#read 6, iclass 15, count 0 2006.229.21:19:46.51#ibcon#end of sib2, iclass 15, count 0 2006.229.21:19:46.51#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:19:46.51#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:19:46.51#ibcon#[25=USB\r\n] 2006.229.21:19:46.51#ibcon#*before write, iclass 15, count 0 2006.229.21:19:46.51#ibcon#enter sib2, iclass 15, count 0 2006.229.21:19:46.51#ibcon#flushed, iclass 15, count 0 2006.229.21:19:46.51#ibcon#about to write, iclass 15, count 0 2006.229.21:19:46.51#ibcon#wrote, iclass 15, count 0 2006.229.21:19:46.51#ibcon#about to read 3, iclass 15, count 0 2006.229.21:19:46.54#ibcon#read 3, iclass 15, count 0 2006.229.21:19:46.54#ibcon#about to read 4, iclass 15, count 0 2006.229.21:19:46.54#ibcon#read 4, iclass 15, count 0 2006.229.21:19:46.54#ibcon#about to read 5, iclass 15, count 0 2006.229.21:19:46.54#ibcon#read 5, iclass 15, count 0 2006.229.21:19:46.54#ibcon#about to read 6, iclass 15, count 0 2006.229.21:19:46.54#ibcon#read 6, iclass 15, count 0 2006.229.21:19:46.54#ibcon#end of sib2, iclass 15, count 0 2006.229.21:19:46.54#ibcon#*after write, iclass 15, count 0 2006.229.21:19:46.54#ibcon#*before return 0, iclass 15, count 0 2006.229.21:19:46.54#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:46.54#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:46.54#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:19:46.54#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:19:46.54$vck44/valo=5,734.99 2006.229.21:19:46.54#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.21:19:46.54#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.21:19:46.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:46.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:46.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:46.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:46.54#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:19:46.54#ibcon#first serial, iclass 17, count 0 2006.229.21:19:46.54#ibcon#enter sib2, iclass 17, count 0 2006.229.21:19:46.54#ibcon#flushed, iclass 17, count 0 2006.229.21:19:46.54#ibcon#about to write, iclass 17, count 0 2006.229.21:19:46.54#ibcon#wrote, iclass 17, count 0 2006.229.21:19:46.54#ibcon#about to read 3, iclass 17, count 0 2006.229.21:19:46.56#ibcon#read 3, iclass 17, count 0 2006.229.21:19:46.56#ibcon#about to read 4, iclass 17, count 0 2006.229.21:19:46.56#ibcon#read 4, iclass 17, count 0 2006.229.21:19:46.56#ibcon#about to read 5, iclass 17, count 0 2006.229.21:19:46.56#ibcon#read 5, iclass 17, count 0 2006.229.21:19:46.56#ibcon#about to read 6, iclass 17, count 0 2006.229.21:19:46.56#ibcon#read 6, iclass 17, count 0 2006.229.21:19:46.56#ibcon#end of sib2, iclass 17, count 0 2006.229.21:19:46.56#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:19:46.56#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:19:46.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:19:46.56#ibcon#*before write, iclass 17, count 0 2006.229.21:19:46.56#ibcon#enter sib2, iclass 17, count 0 2006.229.21:19:46.56#ibcon#flushed, iclass 17, count 0 2006.229.21:19:46.56#ibcon#about to write, iclass 17, count 0 2006.229.21:19:46.56#ibcon#wrote, iclass 17, count 0 2006.229.21:19:46.56#ibcon#about to read 3, iclass 17, count 0 2006.229.21:19:46.60#ibcon#read 3, iclass 17, count 0 2006.229.21:19:46.60#ibcon#about to read 4, iclass 17, count 0 2006.229.21:19:46.60#ibcon#read 4, iclass 17, count 0 2006.229.21:19:46.60#ibcon#about to read 5, iclass 17, count 0 2006.229.21:19:46.60#ibcon#read 5, iclass 17, count 0 2006.229.21:19:46.60#ibcon#about to read 6, iclass 17, count 0 2006.229.21:19:46.60#ibcon#read 6, iclass 17, count 0 2006.229.21:19:46.60#ibcon#end of sib2, iclass 17, count 0 2006.229.21:19:46.60#ibcon#*after write, iclass 17, count 0 2006.229.21:19:46.60#ibcon#*before return 0, iclass 17, count 0 2006.229.21:19:46.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:46.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:46.60#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:19:46.60#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:19:46.60$vck44/va=5,4 2006.229.21:19:46.60#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.21:19:46.60#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.21:19:46.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:46.60#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:46.66#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:46.66#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:46.66#ibcon#enter wrdev, iclass 19, count 2 2006.229.21:19:46.66#ibcon#first serial, iclass 19, count 2 2006.229.21:19:46.66#ibcon#enter sib2, iclass 19, count 2 2006.229.21:19:46.66#ibcon#flushed, iclass 19, count 2 2006.229.21:19:46.66#ibcon#about to write, iclass 19, count 2 2006.229.21:19:46.66#ibcon#wrote, iclass 19, count 2 2006.229.21:19:46.66#ibcon#about to read 3, iclass 19, count 2 2006.229.21:19:46.68#ibcon#read 3, iclass 19, count 2 2006.229.21:19:46.68#ibcon#about to read 4, iclass 19, count 2 2006.229.21:19:46.68#ibcon#read 4, iclass 19, count 2 2006.229.21:19:46.68#ibcon#about to read 5, iclass 19, count 2 2006.229.21:19:46.68#ibcon#read 5, iclass 19, count 2 2006.229.21:19:46.68#ibcon#about to read 6, iclass 19, count 2 2006.229.21:19:46.68#ibcon#read 6, iclass 19, count 2 2006.229.21:19:46.68#ibcon#end of sib2, iclass 19, count 2 2006.229.21:19:46.68#ibcon#*mode == 0, iclass 19, count 2 2006.229.21:19:46.68#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.21:19:46.68#ibcon#[25=AT05-04\r\n] 2006.229.21:19:46.68#ibcon#*before write, iclass 19, count 2 2006.229.21:19:46.68#ibcon#enter sib2, iclass 19, count 2 2006.229.21:19:46.68#ibcon#flushed, iclass 19, count 2 2006.229.21:19:46.68#ibcon#about to write, iclass 19, count 2 2006.229.21:19:46.68#ibcon#wrote, iclass 19, count 2 2006.229.21:19:46.68#ibcon#about to read 3, iclass 19, count 2 2006.229.21:19:46.71#ibcon#read 3, iclass 19, count 2 2006.229.21:19:46.71#ibcon#about to read 4, iclass 19, count 2 2006.229.21:19:46.71#ibcon#read 4, iclass 19, count 2 2006.229.21:19:46.71#ibcon#about to read 5, iclass 19, count 2 2006.229.21:19:46.71#ibcon#read 5, iclass 19, count 2 2006.229.21:19:46.71#ibcon#about to read 6, iclass 19, count 2 2006.229.21:19:46.71#ibcon#read 6, iclass 19, count 2 2006.229.21:19:46.71#ibcon#end of sib2, iclass 19, count 2 2006.229.21:19:46.71#ibcon#*after write, iclass 19, count 2 2006.229.21:19:46.71#ibcon#*before return 0, iclass 19, count 2 2006.229.21:19:46.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:46.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:46.71#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.21:19:46.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:46.71#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:46.83#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:46.83#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:46.83#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:19:46.83#ibcon#first serial, iclass 19, count 0 2006.229.21:19:46.83#ibcon#enter sib2, iclass 19, count 0 2006.229.21:19:46.83#ibcon#flushed, iclass 19, count 0 2006.229.21:19:46.83#ibcon#about to write, iclass 19, count 0 2006.229.21:19:46.83#ibcon#wrote, iclass 19, count 0 2006.229.21:19:46.83#ibcon#about to read 3, iclass 19, count 0 2006.229.21:19:46.85#ibcon#read 3, iclass 19, count 0 2006.229.21:19:46.85#ibcon#about to read 4, iclass 19, count 0 2006.229.21:19:46.85#ibcon#read 4, iclass 19, count 0 2006.229.21:19:46.85#ibcon#about to read 5, iclass 19, count 0 2006.229.21:19:46.85#ibcon#read 5, iclass 19, count 0 2006.229.21:19:46.85#ibcon#about to read 6, iclass 19, count 0 2006.229.21:19:46.85#ibcon#read 6, iclass 19, count 0 2006.229.21:19:46.85#ibcon#end of sib2, iclass 19, count 0 2006.229.21:19:46.85#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:19:46.85#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:19:46.85#ibcon#[25=USB\r\n] 2006.229.21:19:46.85#ibcon#*before write, iclass 19, count 0 2006.229.21:19:46.85#ibcon#enter sib2, iclass 19, count 0 2006.229.21:19:46.85#ibcon#flushed, iclass 19, count 0 2006.229.21:19:46.85#ibcon#about to write, iclass 19, count 0 2006.229.21:19:46.85#ibcon#wrote, iclass 19, count 0 2006.229.21:19:46.85#ibcon#about to read 3, iclass 19, count 0 2006.229.21:19:46.88#ibcon#read 3, iclass 19, count 0 2006.229.21:19:46.88#ibcon#about to read 4, iclass 19, count 0 2006.229.21:19:46.88#ibcon#read 4, iclass 19, count 0 2006.229.21:19:46.88#ibcon#about to read 5, iclass 19, count 0 2006.229.21:19:46.88#ibcon#read 5, iclass 19, count 0 2006.229.21:19:46.88#ibcon#about to read 6, iclass 19, count 0 2006.229.21:19:46.88#ibcon#read 6, iclass 19, count 0 2006.229.21:19:46.88#ibcon#end of sib2, iclass 19, count 0 2006.229.21:19:46.88#ibcon#*after write, iclass 19, count 0 2006.229.21:19:46.88#ibcon#*before return 0, iclass 19, count 0 2006.229.21:19:46.88#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:46.88#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:46.88#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:19:46.88#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:19:46.88$vck44/valo=6,814.99 2006.229.21:19:46.88#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.21:19:46.88#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.21:19:46.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:46.88#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:46.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:46.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:46.88#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:19:46.88#ibcon#first serial, iclass 21, count 0 2006.229.21:19:46.88#ibcon#enter sib2, iclass 21, count 0 2006.229.21:19:46.88#ibcon#flushed, iclass 21, count 0 2006.229.21:19:46.88#ibcon#about to write, iclass 21, count 0 2006.229.21:19:46.88#ibcon#wrote, iclass 21, count 0 2006.229.21:19:46.88#ibcon#about to read 3, iclass 21, count 0 2006.229.21:19:46.90#ibcon#read 3, iclass 21, count 0 2006.229.21:19:46.90#ibcon#about to read 4, iclass 21, count 0 2006.229.21:19:46.90#ibcon#read 4, iclass 21, count 0 2006.229.21:19:46.90#ibcon#about to read 5, iclass 21, count 0 2006.229.21:19:46.90#ibcon#read 5, iclass 21, count 0 2006.229.21:19:46.90#ibcon#about to read 6, iclass 21, count 0 2006.229.21:19:46.90#ibcon#read 6, iclass 21, count 0 2006.229.21:19:46.90#ibcon#end of sib2, iclass 21, count 0 2006.229.21:19:46.90#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:19:46.90#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:19:46.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:19:46.90#ibcon#*before write, iclass 21, count 0 2006.229.21:19:46.90#ibcon#enter sib2, iclass 21, count 0 2006.229.21:19:46.90#ibcon#flushed, iclass 21, count 0 2006.229.21:19:46.90#ibcon#about to write, iclass 21, count 0 2006.229.21:19:46.90#ibcon#wrote, iclass 21, count 0 2006.229.21:19:46.90#ibcon#about to read 3, iclass 21, count 0 2006.229.21:19:46.94#ibcon#read 3, iclass 21, count 0 2006.229.21:19:46.94#ibcon#about to read 4, iclass 21, count 0 2006.229.21:19:46.94#ibcon#read 4, iclass 21, count 0 2006.229.21:19:46.94#ibcon#about to read 5, iclass 21, count 0 2006.229.21:19:46.94#ibcon#read 5, iclass 21, count 0 2006.229.21:19:46.94#ibcon#about to read 6, iclass 21, count 0 2006.229.21:19:46.94#ibcon#read 6, iclass 21, count 0 2006.229.21:19:46.94#ibcon#end of sib2, iclass 21, count 0 2006.229.21:19:46.94#ibcon#*after write, iclass 21, count 0 2006.229.21:19:46.94#ibcon#*before return 0, iclass 21, count 0 2006.229.21:19:46.94#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:46.94#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:46.94#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:19:46.94#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:19:46.94$vck44/va=6,4 2006.229.21:19:46.94#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.21:19:46.94#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.21:19:46.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:46.94#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:47.00#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:47.00#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:47.00#ibcon#enter wrdev, iclass 23, count 2 2006.229.21:19:47.00#ibcon#first serial, iclass 23, count 2 2006.229.21:19:47.00#ibcon#enter sib2, iclass 23, count 2 2006.229.21:19:47.00#ibcon#flushed, iclass 23, count 2 2006.229.21:19:47.00#ibcon#about to write, iclass 23, count 2 2006.229.21:19:47.00#ibcon#wrote, iclass 23, count 2 2006.229.21:19:47.00#ibcon#about to read 3, iclass 23, count 2 2006.229.21:19:47.02#ibcon#read 3, iclass 23, count 2 2006.229.21:19:47.02#ibcon#about to read 4, iclass 23, count 2 2006.229.21:19:47.02#ibcon#read 4, iclass 23, count 2 2006.229.21:19:47.02#ibcon#about to read 5, iclass 23, count 2 2006.229.21:19:47.02#ibcon#read 5, iclass 23, count 2 2006.229.21:19:47.02#ibcon#about to read 6, iclass 23, count 2 2006.229.21:19:47.02#ibcon#read 6, iclass 23, count 2 2006.229.21:19:47.02#ibcon#end of sib2, iclass 23, count 2 2006.229.21:19:47.02#ibcon#*mode == 0, iclass 23, count 2 2006.229.21:19:47.02#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.21:19:47.02#ibcon#[25=AT06-04\r\n] 2006.229.21:19:47.02#ibcon#*before write, iclass 23, count 2 2006.229.21:19:47.02#ibcon#enter sib2, iclass 23, count 2 2006.229.21:19:47.02#ibcon#flushed, iclass 23, count 2 2006.229.21:19:47.02#ibcon#about to write, iclass 23, count 2 2006.229.21:19:47.02#ibcon#wrote, iclass 23, count 2 2006.229.21:19:47.02#ibcon#about to read 3, iclass 23, count 2 2006.229.21:19:47.05#ibcon#read 3, iclass 23, count 2 2006.229.21:19:47.05#ibcon#about to read 4, iclass 23, count 2 2006.229.21:19:47.05#ibcon#read 4, iclass 23, count 2 2006.229.21:19:47.05#ibcon#about to read 5, iclass 23, count 2 2006.229.21:19:47.05#ibcon#read 5, iclass 23, count 2 2006.229.21:19:47.05#ibcon#about to read 6, iclass 23, count 2 2006.229.21:19:47.05#ibcon#read 6, iclass 23, count 2 2006.229.21:19:47.05#ibcon#end of sib2, iclass 23, count 2 2006.229.21:19:47.05#ibcon#*after write, iclass 23, count 2 2006.229.21:19:47.05#ibcon#*before return 0, iclass 23, count 2 2006.229.21:19:47.05#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:47.05#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:47.05#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.21:19:47.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:47.05#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:47.17#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:47.17#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:47.17#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:19:47.17#ibcon#first serial, iclass 23, count 0 2006.229.21:19:47.17#ibcon#enter sib2, iclass 23, count 0 2006.229.21:19:47.17#ibcon#flushed, iclass 23, count 0 2006.229.21:19:47.17#ibcon#about to write, iclass 23, count 0 2006.229.21:19:47.17#ibcon#wrote, iclass 23, count 0 2006.229.21:19:47.17#ibcon#about to read 3, iclass 23, count 0 2006.229.21:19:47.19#ibcon#read 3, iclass 23, count 0 2006.229.21:19:47.19#ibcon#about to read 4, iclass 23, count 0 2006.229.21:19:47.19#ibcon#read 4, iclass 23, count 0 2006.229.21:19:47.19#ibcon#about to read 5, iclass 23, count 0 2006.229.21:19:47.19#ibcon#read 5, iclass 23, count 0 2006.229.21:19:47.19#ibcon#about to read 6, iclass 23, count 0 2006.229.21:19:47.19#ibcon#read 6, iclass 23, count 0 2006.229.21:19:47.19#ibcon#end of sib2, iclass 23, count 0 2006.229.21:19:47.19#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:19:47.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:19:47.19#ibcon#[25=USB\r\n] 2006.229.21:19:47.19#ibcon#*before write, iclass 23, count 0 2006.229.21:19:47.19#ibcon#enter sib2, iclass 23, count 0 2006.229.21:19:47.19#ibcon#flushed, iclass 23, count 0 2006.229.21:19:47.19#ibcon#about to write, iclass 23, count 0 2006.229.21:19:47.19#ibcon#wrote, iclass 23, count 0 2006.229.21:19:47.19#ibcon#about to read 3, iclass 23, count 0 2006.229.21:19:47.22#ibcon#read 3, iclass 23, count 0 2006.229.21:19:47.22#ibcon#about to read 4, iclass 23, count 0 2006.229.21:19:47.22#ibcon#read 4, iclass 23, count 0 2006.229.21:19:47.22#ibcon#about to read 5, iclass 23, count 0 2006.229.21:19:47.22#ibcon#read 5, iclass 23, count 0 2006.229.21:19:47.22#ibcon#about to read 6, iclass 23, count 0 2006.229.21:19:47.22#ibcon#read 6, iclass 23, count 0 2006.229.21:19:47.22#ibcon#end of sib2, iclass 23, count 0 2006.229.21:19:47.22#ibcon#*after write, iclass 23, count 0 2006.229.21:19:47.22#ibcon#*before return 0, iclass 23, count 0 2006.229.21:19:47.22#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:47.22#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:47.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:19:47.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:19:47.22$vck44/valo=7,864.99 2006.229.21:19:47.22#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.21:19:47.22#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.21:19:47.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:47.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:47.22#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:47.22#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:47.22#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:19:47.22#ibcon#first serial, iclass 25, count 0 2006.229.21:19:47.22#ibcon#enter sib2, iclass 25, count 0 2006.229.21:19:47.22#ibcon#flushed, iclass 25, count 0 2006.229.21:19:47.22#ibcon#about to write, iclass 25, count 0 2006.229.21:19:47.22#ibcon#wrote, iclass 25, count 0 2006.229.21:19:47.22#ibcon#about to read 3, iclass 25, count 0 2006.229.21:19:47.24#ibcon#read 3, iclass 25, count 0 2006.229.21:19:47.24#ibcon#about to read 4, iclass 25, count 0 2006.229.21:19:47.24#ibcon#read 4, iclass 25, count 0 2006.229.21:19:47.24#ibcon#about to read 5, iclass 25, count 0 2006.229.21:19:47.24#ibcon#read 5, iclass 25, count 0 2006.229.21:19:47.24#ibcon#about to read 6, iclass 25, count 0 2006.229.21:19:47.24#ibcon#read 6, iclass 25, count 0 2006.229.21:19:47.24#ibcon#end of sib2, iclass 25, count 0 2006.229.21:19:47.24#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:19:47.24#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:19:47.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:19:47.24#ibcon#*before write, iclass 25, count 0 2006.229.21:19:47.24#ibcon#enter sib2, iclass 25, count 0 2006.229.21:19:47.24#ibcon#flushed, iclass 25, count 0 2006.229.21:19:47.24#ibcon#about to write, iclass 25, count 0 2006.229.21:19:47.24#ibcon#wrote, iclass 25, count 0 2006.229.21:19:47.24#ibcon#about to read 3, iclass 25, count 0 2006.229.21:19:47.28#ibcon#read 3, iclass 25, count 0 2006.229.21:19:47.28#ibcon#about to read 4, iclass 25, count 0 2006.229.21:19:47.28#ibcon#read 4, iclass 25, count 0 2006.229.21:19:47.28#ibcon#about to read 5, iclass 25, count 0 2006.229.21:19:47.28#ibcon#read 5, iclass 25, count 0 2006.229.21:19:47.28#ibcon#about to read 6, iclass 25, count 0 2006.229.21:19:47.28#ibcon#read 6, iclass 25, count 0 2006.229.21:19:47.28#ibcon#end of sib2, iclass 25, count 0 2006.229.21:19:47.28#ibcon#*after write, iclass 25, count 0 2006.229.21:19:47.28#ibcon#*before return 0, iclass 25, count 0 2006.229.21:19:47.28#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:47.28#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:47.28#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:19:47.28#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:19:47.28$vck44/va=7,5 2006.229.21:19:47.28#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.21:19:47.28#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.21:19:47.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:47.28#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:47.34#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:47.34#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:47.34#ibcon#enter wrdev, iclass 27, count 2 2006.229.21:19:47.34#ibcon#first serial, iclass 27, count 2 2006.229.21:19:47.34#ibcon#enter sib2, iclass 27, count 2 2006.229.21:19:47.34#ibcon#flushed, iclass 27, count 2 2006.229.21:19:47.34#ibcon#about to write, iclass 27, count 2 2006.229.21:19:47.34#ibcon#wrote, iclass 27, count 2 2006.229.21:19:47.34#ibcon#about to read 3, iclass 27, count 2 2006.229.21:19:47.36#ibcon#read 3, iclass 27, count 2 2006.229.21:19:47.36#ibcon#about to read 4, iclass 27, count 2 2006.229.21:19:47.36#ibcon#read 4, iclass 27, count 2 2006.229.21:19:47.36#ibcon#about to read 5, iclass 27, count 2 2006.229.21:19:47.36#ibcon#read 5, iclass 27, count 2 2006.229.21:19:47.36#ibcon#about to read 6, iclass 27, count 2 2006.229.21:19:47.36#ibcon#read 6, iclass 27, count 2 2006.229.21:19:47.36#ibcon#end of sib2, iclass 27, count 2 2006.229.21:19:47.36#ibcon#*mode == 0, iclass 27, count 2 2006.229.21:19:47.36#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.21:19:47.36#ibcon#[25=AT07-05\r\n] 2006.229.21:19:47.36#ibcon#*before write, iclass 27, count 2 2006.229.21:19:47.36#ibcon#enter sib2, iclass 27, count 2 2006.229.21:19:47.36#ibcon#flushed, iclass 27, count 2 2006.229.21:19:47.36#ibcon#about to write, iclass 27, count 2 2006.229.21:19:47.36#ibcon#wrote, iclass 27, count 2 2006.229.21:19:47.36#ibcon#about to read 3, iclass 27, count 2 2006.229.21:19:47.39#ibcon#read 3, iclass 27, count 2 2006.229.21:19:47.39#ibcon#about to read 4, iclass 27, count 2 2006.229.21:19:47.39#ibcon#read 4, iclass 27, count 2 2006.229.21:19:47.39#ibcon#about to read 5, iclass 27, count 2 2006.229.21:19:47.39#ibcon#read 5, iclass 27, count 2 2006.229.21:19:47.39#ibcon#about to read 6, iclass 27, count 2 2006.229.21:19:47.39#ibcon#read 6, iclass 27, count 2 2006.229.21:19:47.39#ibcon#end of sib2, iclass 27, count 2 2006.229.21:19:47.39#ibcon#*after write, iclass 27, count 2 2006.229.21:19:47.39#ibcon#*before return 0, iclass 27, count 2 2006.229.21:19:47.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:47.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:47.39#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.21:19:47.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:47.39#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:47.51#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:47.51#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:47.51#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:19:47.51#ibcon#first serial, iclass 27, count 0 2006.229.21:19:47.51#ibcon#enter sib2, iclass 27, count 0 2006.229.21:19:47.51#ibcon#flushed, iclass 27, count 0 2006.229.21:19:47.51#ibcon#about to write, iclass 27, count 0 2006.229.21:19:47.51#ibcon#wrote, iclass 27, count 0 2006.229.21:19:47.51#ibcon#about to read 3, iclass 27, count 0 2006.229.21:19:47.53#ibcon#read 3, iclass 27, count 0 2006.229.21:19:47.53#ibcon#about to read 4, iclass 27, count 0 2006.229.21:19:47.53#ibcon#read 4, iclass 27, count 0 2006.229.21:19:47.53#ibcon#about to read 5, iclass 27, count 0 2006.229.21:19:47.53#ibcon#read 5, iclass 27, count 0 2006.229.21:19:47.53#ibcon#about to read 6, iclass 27, count 0 2006.229.21:19:47.53#ibcon#read 6, iclass 27, count 0 2006.229.21:19:47.53#ibcon#end of sib2, iclass 27, count 0 2006.229.21:19:47.53#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:19:47.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:19:47.53#ibcon#[25=USB\r\n] 2006.229.21:19:47.53#ibcon#*before write, iclass 27, count 0 2006.229.21:19:47.53#ibcon#enter sib2, iclass 27, count 0 2006.229.21:19:47.53#ibcon#flushed, iclass 27, count 0 2006.229.21:19:47.53#ibcon#about to write, iclass 27, count 0 2006.229.21:19:47.53#ibcon#wrote, iclass 27, count 0 2006.229.21:19:47.53#ibcon#about to read 3, iclass 27, count 0 2006.229.21:19:47.56#ibcon#read 3, iclass 27, count 0 2006.229.21:19:47.56#ibcon#about to read 4, iclass 27, count 0 2006.229.21:19:47.56#ibcon#read 4, iclass 27, count 0 2006.229.21:19:47.56#ibcon#about to read 5, iclass 27, count 0 2006.229.21:19:47.56#ibcon#read 5, iclass 27, count 0 2006.229.21:19:47.56#ibcon#about to read 6, iclass 27, count 0 2006.229.21:19:47.56#ibcon#read 6, iclass 27, count 0 2006.229.21:19:47.56#ibcon#end of sib2, iclass 27, count 0 2006.229.21:19:47.56#ibcon#*after write, iclass 27, count 0 2006.229.21:19:47.56#ibcon#*before return 0, iclass 27, count 0 2006.229.21:19:47.56#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:47.56#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:47.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:19:47.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:19:47.56$vck44/valo=8,884.99 2006.229.21:19:47.56#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.21:19:47.56#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.21:19:47.56#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:47.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:47.56#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:47.56#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:47.56#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:19:47.56#ibcon#first serial, iclass 29, count 0 2006.229.21:19:47.56#ibcon#enter sib2, iclass 29, count 0 2006.229.21:19:47.56#ibcon#flushed, iclass 29, count 0 2006.229.21:19:47.56#ibcon#about to write, iclass 29, count 0 2006.229.21:19:47.56#ibcon#wrote, iclass 29, count 0 2006.229.21:19:47.56#ibcon#about to read 3, iclass 29, count 0 2006.229.21:19:47.58#ibcon#read 3, iclass 29, count 0 2006.229.21:19:47.58#ibcon#about to read 4, iclass 29, count 0 2006.229.21:19:47.58#ibcon#read 4, iclass 29, count 0 2006.229.21:19:47.58#ibcon#about to read 5, iclass 29, count 0 2006.229.21:19:47.58#ibcon#read 5, iclass 29, count 0 2006.229.21:19:47.58#ibcon#about to read 6, iclass 29, count 0 2006.229.21:19:47.58#ibcon#read 6, iclass 29, count 0 2006.229.21:19:47.58#ibcon#end of sib2, iclass 29, count 0 2006.229.21:19:47.58#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:19:47.58#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:19:47.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:19:47.58#ibcon#*before write, iclass 29, count 0 2006.229.21:19:47.58#ibcon#enter sib2, iclass 29, count 0 2006.229.21:19:47.58#ibcon#flushed, iclass 29, count 0 2006.229.21:19:47.58#ibcon#about to write, iclass 29, count 0 2006.229.21:19:47.58#ibcon#wrote, iclass 29, count 0 2006.229.21:19:47.58#ibcon#about to read 3, iclass 29, count 0 2006.229.21:19:47.62#ibcon#read 3, iclass 29, count 0 2006.229.21:19:47.62#ibcon#about to read 4, iclass 29, count 0 2006.229.21:19:47.62#ibcon#read 4, iclass 29, count 0 2006.229.21:19:47.62#ibcon#about to read 5, iclass 29, count 0 2006.229.21:19:47.62#ibcon#read 5, iclass 29, count 0 2006.229.21:19:47.62#ibcon#about to read 6, iclass 29, count 0 2006.229.21:19:47.62#ibcon#read 6, iclass 29, count 0 2006.229.21:19:47.62#ibcon#end of sib2, iclass 29, count 0 2006.229.21:19:47.62#ibcon#*after write, iclass 29, count 0 2006.229.21:19:47.62#ibcon#*before return 0, iclass 29, count 0 2006.229.21:19:47.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:47.62#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:47.62#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:19:47.62#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:19:47.62$vck44/va=8,6 2006.229.21:19:47.62#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.21:19:47.62#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.21:19:47.62#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:47.62#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:47.68#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:47.68#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:47.68#ibcon#enter wrdev, iclass 31, count 2 2006.229.21:19:47.68#ibcon#first serial, iclass 31, count 2 2006.229.21:19:47.68#ibcon#enter sib2, iclass 31, count 2 2006.229.21:19:47.68#ibcon#flushed, iclass 31, count 2 2006.229.21:19:47.68#ibcon#about to write, iclass 31, count 2 2006.229.21:19:47.68#ibcon#wrote, iclass 31, count 2 2006.229.21:19:47.68#ibcon#about to read 3, iclass 31, count 2 2006.229.21:19:47.70#ibcon#read 3, iclass 31, count 2 2006.229.21:19:47.70#ibcon#about to read 4, iclass 31, count 2 2006.229.21:19:47.70#ibcon#read 4, iclass 31, count 2 2006.229.21:19:47.70#ibcon#about to read 5, iclass 31, count 2 2006.229.21:19:47.70#ibcon#read 5, iclass 31, count 2 2006.229.21:19:47.70#ibcon#about to read 6, iclass 31, count 2 2006.229.21:19:47.70#ibcon#read 6, iclass 31, count 2 2006.229.21:19:47.70#ibcon#end of sib2, iclass 31, count 2 2006.229.21:19:47.70#ibcon#*mode == 0, iclass 31, count 2 2006.229.21:19:47.70#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.21:19:47.70#ibcon#[25=AT08-06\r\n] 2006.229.21:19:47.70#ibcon#*before write, iclass 31, count 2 2006.229.21:19:47.70#ibcon#enter sib2, iclass 31, count 2 2006.229.21:19:47.70#ibcon#flushed, iclass 31, count 2 2006.229.21:19:47.70#ibcon#about to write, iclass 31, count 2 2006.229.21:19:47.70#ibcon#wrote, iclass 31, count 2 2006.229.21:19:47.70#ibcon#about to read 3, iclass 31, count 2 2006.229.21:19:47.73#ibcon#read 3, iclass 31, count 2 2006.229.21:19:47.73#ibcon#about to read 4, iclass 31, count 2 2006.229.21:19:47.73#ibcon#read 4, iclass 31, count 2 2006.229.21:19:47.73#ibcon#about to read 5, iclass 31, count 2 2006.229.21:19:47.73#ibcon#read 5, iclass 31, count 2 2006.229.21:19:47.73#ibcon#about to read 6, iclass 31, count 2 2006.229.21:19:47.73#ibcon#read 6, iclass 31, count 2 2006.229.21:19:47.73#ibcon#end of sib2, iclass 31, count 2 2006.229.21:19:47.73#ibcon#*after write, iclass 31, count 2 2006.229.21:19:47.73#ibcon#*before return 0, iclass 31, count 2 2006.229.21:19:47.73#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:47.73#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:47.73#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.21:19:47.73#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:47.73#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:47.82#abcon#<5=/08 1.3 4.7 26.771001002.1\r\n> 2006.229.21:19:47.84#abcon#{5=INTERFACE CLEAR} 2006.229.21:19:47.85#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:47.85#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:47.85#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:19:47.85#ibcon#first serial, iclass 31, count 0 2006.229.21:19:47.85#ibcon#enter sib2, iclass 31, count 0 2006.229.21:19:47.85#ibcon#flushed, iclass 31, count 0 2006.229.21:19:47.85#ibcon#about to write, iclass 31, count 0 2006.229.21:19:47.85#ibcon#wrote, iclass 31, count 0 2006.229.21:19:47.85#ibcon#about to read 3, iclass 31, count 0 2006.229.21:19:47.87#ibcon#read 3, iclass 31, count 0 2006.229.21:19:47.87#ibcon#about to read 4, iclass 31, count 0 2006.229.21:19:47.87#ibcon#read 4, iclass 31, count 0 2006.229.21:19:47.87#ibcon#about to read 5, iclass 31, count 0 2006.229.21:19:47.87#ibcon#read 5, iclass 31, count 0 2006.229.21:19:47.87#ibcon#about to read 6, iclass 31, count 0 2006.229.21:19:47.87#ibcon#read 6, iclass 31, count 0 2006.229.21:19:47.87#ibcon#end of sib2, iclass 31, count 0 2006.229.21:19:47.87#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:19:47.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:19:47.87#ibcon#[25=USB\r\n] 2006.229.21:19:47.87#ibcon#*before write, iclass 31, count 0 2006.229.21:19:47.87#ibcon#enter sib2, iclass 31, count 0 2006.229.21:19:47.87#ibcon#flushed, iclass 31, count 0 2006.229.21:19:47.87#ibcon#about to write, iclass 31, count 0 2006.229.21:19:47.87#ibcon#wrote, iclass 31, count 0 2006.229.21:19:47.87#ibcon#about to read 3, iclass 31, count 0 2006.229.21:19:47.90#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:19:47.90#ibcon#read 3, iclass 31, count 0 2006.229.21:19:47.90#ibcon#about to read 4, iclass 31, count 0 2006.229.21:19:47.90#ibcon#read 4, iclass 31, count 0 2006.229.21:19:47.90#ibcon#about to read 5, iclass 31, count 0 2006.229.21:19:47.90#ibcon#read 5, iclass 31, count 0 2006.229.21:19:47.90#ibcon#about to read 6, iclass 31, count 0 2006.229.21:19:47.90#ibcon#read 6, iclass 31, count 0 2006.229.21:19:47.90#ibcon#end of sib2, iclass 31, count 0 2006.229.21:19:47.90#ibcon#*after write, iclass 31, count 0 2006.229.21:19:47.90#ibcon#*before return 0, iclass 31, count 0 2006.229.21:19:47.90#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:47.90#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:47.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:19:47.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:19:47.90$vck44/vblo=1,629.99 2006.229.21:19:47.90#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.21:19:47.90#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.21:19:47.90#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:47.90#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:47.90#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:47.90#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:47.90#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:19:47.90#ibcon#first serial, iclass 37, count 0 2006.229.21:19:47.90#ibcon#enter sib2, iclass 37, count 0 2006.229.21:19:47.90#ibcon#flushed, iclass 37, count 0 2006.229.21:19:47.90#ibcon#about to write, iclass 37, count 0 2006.229.21:19:47.90#ibcon#wrote, iclass 37, count 0 2006.229.21:19:47.90#ibcon#about to read 3, iclass 37, count 0 2006.229.21:19:47.92#ibcon#read 3, iclass 37, count 0 2006.229.21:19:47.92#ibcon#about to read 4, iclass 37, count 0 2006.229.21:19:47.92#ibcon#read 4, iclass 37, count 0 2006.229.21:19:47.92#ibcon#about to read 5, iclass 37, count 0 2006.229.21:19:47.92#ibcon#read 5, iclass 37, count 0 2006.229.21:19:47.92#ibcon#about to read 6, iclass 37, count 0 2006.229.21:19:47.92#ibcon#read 6, iclass 37, count 0 2006.229.21:19:47.92#ibcon#end of sib2, iclass 37, count 0 2006.229.21:19:47.92#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:19:47.92#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:19:47.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:19:47.92#ibcon#*before write, iclass 37, count 0 2006.229.21:19:47.92#ibcon#enter sib2, iclass 37, count 0 2006.229.21:19:47.92#ibcon#flushed, iclass 37, count 0 2006.229.21:19:47.92#ibcon#about to write, iclass 37, count 0 2006.229.21:19:47.92#ibcon#wrote, iclass 37, count 0 2006.229.21:19:47.92#ibcon#about to read 3, iclass 37, count 0 2006.229.21:19:47.96#ibcon#read 3, iclass 37, count 0 2006.229.21:19:47.96#ibcon#about to read 4, iclass 37, count 0 2006.229.21:19:47.96#ibcon#read 4, iclass 37, count 0 2006.229.21:19:47.96#ibcon#about to read 5, iclass 37, count 0 2006.229.21:19:47.96#ibcon#read 5, iclass 37, count 0 2006.229.21:19:47.96#ibcon#about to read 6, iclass 37, count 0 2006.229.21:19:47.96#ibcon#read 6, iclass 37, count 0 2006.229.21:19:47.96#ibcon#end of sib2, iclass 37, count 0 2006.229.21:19:47.96#ibcon#*after write, iclass 37, count 0 2006.229.21:19:47.96#ibcon#*before return 0, iclass 37, count 0 2006.229.21:19:47.96#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:47.96#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:19:47.96#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:19:47.96#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:19:47.96$vck44/vb=1,4 2006.229.21:19:47.96#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.21:19:47.96#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.21:19:47.96#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:47.96#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:47.96#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:47.96#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:47.96#ibcon#enter wrdev, iclass 39, count 2 2006.229.21:19:47.96#ibcon#first serial, iclass 39, count 2 2006.229.21:19:47.96#ibcon#enter sib2, iclass 39, count 2 2006.229.21:19:47.96#ibcon#flushed, iclass 39, count 2 2006.229.21:19:47.96#ibcon#about to write, iclass 39, count 2 2006.229.21:19:47.96#ibcon#wrote, iclass 39, count 2 2006.229.21:19:47.96#ibcon#about to read 3, iclass 39, count 2 2006.229.21:19:47.98#ibcon#read 3, iclass 39, count 2 2006.229.21:19:47.98#ibcon#about to read 4, iclass 39, count 2 2006.229.21:19:47.98#ibcon#read 4, iclass 39, count 2 2006.229.21:19:47.98#ibcon#about to read 5, iclass 39, count 2 2006.229.21:19:47.98#ibcon#read 5, iclass 39, count 2 2006.229.21:19:47.98#ibcon#about to read 6, iclass 39, count 2 2006.229.21:19:47.98#ibcon#read 6, iclass 39, count 2 2006.229.21:19:47.98#ibcon#end of sib2, iclass 39, count 2 2006.229.21:19:47.98#ibcon#*mode == 0, iclass 39, count 2 2006.229.21:19:47.98#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.21:19:47.98#ibcon#[27=AT01-04\r\n] 2006.229.21:19:47.98#ibcon#*before write, iclass 39, count 2 2006.229.21:19:47.98#ibcon#enter sib2, iclass 39, count 2 2006.229.21:19:47.98#ibcon#flushed, iclass 39, count 2 2006.229.21:19:47.98#ibcon#about to write, iclass 39, count 2 2006.229.21:19:47.98#ibcon#wrote, iclass 39, count 2 2006.229.21:19:47.98#ibcon#about to read 3, iclass 39, count 2 2006.229.21:19:48.01#ibcon#read 3, iclass 39, count 2 2006.229.21:19:48.01#ibcon#about to read 4, iclass 39, count 2 2006.229.21:19:48.01#ibcon#read 4, iclass 39, count 2 2006.229.21:19:48.01#ibcon#about to read 5, iclass 39, count 2 2006.229.21:19:48.01#ibcon#read 5, iclass 39, count 2 2006.229.21:19:48.01#ibcon#about to read 6, iclass 39, count 2 2006.229.21:19:48.01#ibcon#read 6, iclass 39, count 2 2006.229.21:19:48.01#ibcon#end of sib2, iclass 39, count 2 2006.229.21:19:48.01#ibcon#*after write, iclass 39, count 2 2006.229.21:19:48.01#ibcon#*before return 0, iclass 39, count 2 2006.229.21:19:48.01#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:48.01#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:19:48.01#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.21:19:48.01#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:48.01#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:48.13#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:48.13#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:48.13#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:19:48.13#ibcon#first serial, iclass 39, count 0 2006.229.21:19:48.13#ibcon#enter sib2, iclass 39, count 0 2006.229.21:19:48.13#ibcon#flushed, iclass 39, count 0 2006.229.21:19:48.13#ibcon#about to write, iclass 39, count 0 2006.229.21:19:48.13#ibcon#wrote, iclass 39, count 0 2006.229.21:19:48.13#ibcon#about to read 3, iclass 39, count 0 2006.229.21:19:48.15#ibcon#read 3, iclass 39, count 0 2006.229.21:19:48.15#ibcon#about to read 4, iclass 39, count 0 2006.229.21:19:48.15#ibcon#read 4, iclass 39, count 0 2006.229.21:19:48.15#ibcon#about to read 5, iclass 39, count 0 2006.229.21:19:48.15#ibcon#read 5, iclass 39, count 0 2006.229.21:19:48.15#ibcon#about to read 6, iclass 39, count 0 2006.229.21:19:48.15#ibcon#read 6, iclass 39, count 0 2006.229.21:19:48.15#ibcon#end of sib2, iclass 39, count 0 2006.229.21:19:48.15#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:19:48.15#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:19:48.15#ibcon#[27=USB\r\n] 2006.229.21:19:48.15#ibcon#*before write, iclass 39, count 0 2006.229.21:19:48.15#ibcon#enter sib2, iclass 39, count 0 2006.229.21:19:48.15#ibcon#flushed, iclass 39, count 0 2006.229.21:19:48.15#ibcon#about to write, iclass 39, count 0 2006.229.21:19:48.15#ibcon#wrote, iclass 39, count 0 2006.229.21:19:48.15#ibcon#about to read 3, iclass 39, count 0 2006.229.21:19:48.18#ibcon#read 3, iclass 39, count 0 2006.229.21:19:48.18#ibcon#about to read 4, iclass 39, count 0 2006.229.21:19:48.18#ibcon#read 4, iclass 39, count 0 2006.229.21:19:48.18#ibcon#about to read 5, iclass 39, count 0 2006.229.21:19:48.18#ibcon#read 5, iclass 39, count 0 2006.229.21:19:48.18#ibcon#about to read 6, iclass 39, count 0 2006.229.21:19:48.18#ibcon#read 6, iclass 39, count 0 2006.229.21:19:48.18#ibcon#end of sib2, iclass 39, count 0 2006.229.21:19:48.18#ibcon#*after write, iclass 39, count 0 2006.229.21:19:48.18#ibcon#*before return 0, iclass 39, count 0 2006.229.21:19:48.18#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:48.18#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:19:48.18#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:19:48.18#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:19:48.18$vck44/vblo=2,634.99 2006.229.21:19:48.18#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.21:19:48.18#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.21:19:48.18#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:48.18#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:48.18#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:48.18#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:48.18#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:19:48.18#ibcon#first serial, iclass 3, count 0 2006.229.21:19:48.18#ibcon#enter sib2, iclass 3, count 0 2006.229.21:19:48.18#ibcon#flushed, iclass 3, count 0 2006.229.21:19:48.18#ibcon#about to write, iclass 3, count 0 2006.229.21:19:48.18#ibcon#wrote, iclass 3, count 0 2006.229.21:19:48.18#ibcon#about to read 3, iclass 3, count 0 2006.229.21:19:48.20#ibcon#read 3, iclass 3, count 0 2006.229.21:19:48.20#ibcon#about to read 4, iclass 3, count 0 2006.229.21:19:48.20#ibcon#read 4, iclass 3, count 0 2006.229.21:19:48.20#ibcon#about to read 5, iclass 3, count 0 2006.229.21:19:48.20#ibcon#read 5, iclass 3, count 0 2006.229.21:19:48.20#ibcon#about to read 6, iclass 3, count 0 2006.229.21:19:48.20#ibcon#read 6, iclass 3, count 0 2006.229.21:19:48.20#ibcon#end of sib2, iclass 3, count 0 2006.229.21:19:48.20#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:19:48.20#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:19:48.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:19:48.20#ibcon#*before write, iclass 3, count 0 2006.229.21:19:48.20#ibcon#enter sib2, iclass 3, count 0 2006.229.21:19:48.20#ibcon#flushed, iclass 3, count 0 2006.229.21:19:48.20#ibcon#about to write, iclass 3, count 0 2006.229.21:19:48.20#ibcon#wrote, iclass 3, count 0 2006.229.21:19:48.20#ibcon#about to read 3, iclass 3, count 0 2006.229.21:19:48.24#ibcon#read 3, iclass 3, count 0 2006.229.21:19:48.24#ibcon#about to read 4, iclass 3, count 0 2006.229.21:19:48.24#ibcon#read 4, iclass 3, count 0 2006.229.21:19:48.24#ibcon#about to read 5, iclass 3, count 0 2006.229.21:19:48.24#ibcon#read 5, iclass 3, count 0 2006.229.21:19:48.24#ibcon#about to read 6, iclass 3, count 0 2006.229.21:19:48.24#ibcon#read 6, iclass 3, count 0 2006.229.21:19:48.24#ibcon#end of sib2, iclass 3, count 0 2006.229.21:19:48.24#ibcon#*after write, iclass 3, count 0 2006.229.21:19:48.24#ibcon#*before return 0, iclass 3, count 0 2006.229.21:19:48.24#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:48.24#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:19:48.24#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:19:48.24#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:19:48.24$vck44/vb=2,4 2006.229.21:19:48.24#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.21:19:48.24#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.21:19:48.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:48.24#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:48.30#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:48.30#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:48.30#ibcon#enter wrdev, iclass 5, count 2 2006.229.21:19:48.30#ibcon#first serial, iclass 5, count 2 2006.229.21:19:48.30#ibcon#enter sib2, iclass 5, count 2 2006.229.21:19:48.30#ibcon#flushed, iclass 5, count 2 2006.229.21:19:48.30#ibcon#about to write, iclass 5, count 2 2006.229.21:19:48.30#ibcon#wrote, iclass 5, count 2 2006.229.21:19:48.30#ibcon#about to read 3, iclass 5, count 2 2006.229.21:19:48.32#ibcon#read 3, iclass 5, count 2 2006.229.21:19:48.32#ibcon#about to read 4, iclass 5, count 2 2006.229.21:19:48.32#ibcon#read 4, iclass 5, count 2 2006.229.21:19:48.32#ibcon#about to read 5, iclass 5, count 2 2006.229.21:19:48.32#ibcon#read 5, iclass 5, count 2 2006.229.21:19:48.32#ibcon#about to read 6, iclass 5, count 2 2006.229.21:19:48.32#ibcon#read 6, iclass 5, count 2 2006.229.21:19:48.32#ibcon#end of sib2, iclass 5, count 2 2006.229.21:19:48.32#ibcon#*mode == 0, iclass 5, count 2 2006.229.21:19:48.32#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.21:19:48.32#ibcon#[27=AT02-04\r\n] 2006.229.21:19:48.32#ibcon#*before write, iclass 5, count 2 2006.229.21:19:48.32#ibcon#enter sib2, iclass 5, count 2 2006.229.21:19:48.32#ibcon#flushed, iclass 5, count 2 2006.229.21:19:48.32#ibcon#about to write, iclass 5, count 2 2006.229.21:19:48.32#ibcon#wrote, iclass 5, count 2 2006.229.21:19:48.32#ibcon#about to read 3, iclass 5, count 2 2006.229.21:19:48.35#ibcon#read 3, iclass 5, count 2 2006.229.21:19:48.35#ibcon#about to read 4, iclass 5, count 2 2006.229.21:19:48.35#ibcon#read 4, iclass 5, count 2 2006.229.21:19:48.35#ibcon#about to read 5, iclass 5, count 2 2006.229.21:19:48.35#ibcon#read 5, iclass 5, count 2 2006.229.21:19:48.35#ibcon#about to read 6, iclass 5, count 2 2006.229.21:19:48.35#ibcon#read 6, iclass 5, count 2 2006.229.21:19:48.35#ibcon#end of sib2, iclass 5, count 2 2006.229.21:19:48.35#ibcon#*after write, iclass 5, count 2 2006.229.21:19:48.35#ibcon#*before return 0, iclass 5, count 2 2006.229.21:19:48.35#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:48.35#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:19:48.35#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.21:19:48.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:48.35#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:48.47#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:48.47#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:48.47#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:19:48.47#ibcon#first serial, iclass 5, count 0 2006.229.21:19:48.47#ibcon#enter sib2, iclass 5, count 0 2006.229.21:19:48.47#ibcon#flushed, iclass 5, count 0 2006.229.21:19:48.47#ibcon#about to write, iclass 5, count 0 2006.229.21:19:48.47#ibcon#wrote, iclass 5, count 0 2006.229.21:19:48.47#ibcon#about to read 3, iclass 5, count 0 2006.229.21:19:48.49#ibcon#read 3, iclass 5, count 0 2006.229.21:19:48.49#ibcon#about to read 4, iclass 5, count 0 2006.229.21:19:48.49#ibcon#read 4, iclass 5, count 0 2006.229.21:19:48.49#ibcon#about to read 5, iclass 5, count 0 2006.229.21:19:48.49#ibcon#read 5, iclass 5, count 0 2006.229.21:19:48.49#ibcon#about to read 6, iclass 5, count 0 2006.229.21:19:48.49#ibcon#read 6, iclass 5, count 0 2006.229.21:19:48.49#ibcon#end of sib2, iclass 5, count 0 2006.229.21:19:48.49#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:19:48.49#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:19:48.49#ibcon#[27=USB\r\n] 2006.229.21:19:48.49#ibcon#*before write, iclass 5, count 0 2006.229.21:19:48.49#ibcon#enter sib2, iclass 5, count 0 2006.229.21:19:48.49#ibcon#flushed, iclass 5, count 0 2006.229.21:19:48.49#ibcon#about to write, iclass 5, count 0 2006.229.21:19:48.49#ibcon#wrote, iclass 5, count 0 2006.229.21:19:48.49#ibcon#about to read 3, iclass 5, count 0 2006.229.21:19:48.52#ibcon#read 3, iclass 5, count 0 2006.229.21:19:48.52#ibcon#about to read 4, iclass 5, count 0 2006.229.21:19:48.52#ibcon#read 4, iclass 5, count 0 2006.229.21:19:48.52#ibcon#about to read 5, iclass 5, count 0 2006.229.21:19:48.52#ibcon#read 5, iclass 5, count 0 2006.229.21:19:48.52#ibcon#about to read 6, iclass 5, count 0 2006.229.21:19:48.52#ibcon#read 6, iclass 5, count 0 2006.229.21:19:48.52#ibcon#end of sib2, iclass 5, count 0 2006.229.21:19:48.52#ibcon#*after write, iclass 5, count 0 2006.229.21:19:48.52#ibcon#*before return 0, iclass 5, count 0 2006.229.21:19:48.52#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:48.52#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:19:48.52#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:19:48.52#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:19:48.52$vck44/vblo=3,649.99 2006.229.21:19:48.52#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.21:19:48.52#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.21:19:48.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:48.52#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:48.52#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:48.52#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:48.52#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:19:48.52#ibcon#first serial, iclass 7, count 0 2006.229.21:19:48.52#ibcon#enter sib2, iclass 7, count 0 2006.229.21:19:48.52#ibcon#flushed, iclass 7, count 0 2006.229.21:19:48.52#ibcon#about to write, iclass 7, count 0 2006.229.21:19:48.52#ibcon#wrote, iclass 7, count 0 2006.229.21:19:48.52#ibcon#about to read 3, iclass 7, count 0 2006.229.21:19:48.54#ibcon#read 3, iclass 7, count 0 2006.229.21:19:48.54#ibcon#about to read 4, iclass 7, count 0 2006.229.21:19:48.54#ibcon#read 4, iclass 7, count 0 2006.229.21:19:48.54#ibcon#about to read 5, iclass 7, count 0 2006.229.21:19:48.54#ibcon#read 5, iclass 7, count 0 2006.229.21:19:48.54#ibcon#about to read 6, iclass 7, count 0 2006.229.21:19:48.54#ibcon#read 6, iclass 7, count 0 2006.229.21:19:48.54#ibcon#end of sib2, iclass 7, count 0 2006.229.21:19:48.54#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:19:48.54#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:19:48.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:19:48.54#ibcon#*before write, iclass 7, count 0 2006.229.21:19:48.54#ibcon#enter sib2, iclass 7, count 0 2006.229.21:19:48.54#ibcon#flushed, iclass 7, count 0 2006.229.21:19:48.54#ibcon#about to write, iclass 7, count 0 2006.229.21:19:48.54#ibcon#wrote, iclass 7, count 0 2006.229.21:19:48.54#ibcon#about to read 3, iclass 7, count 0 2006.229.21:19:48.58#ibcon#read 3, iclass 7, count 0 2006.229.21:19:48.58#ibcon#about to read 4, iclass 7, count 0 2006.229.21:19:48.58#ibcon#read 4, iclass 7, count 0 2006.229.21:19:48.58#ibcon#about to read 5, iclass 7, count 0 2006.229.21:19:48.58#ibcon#read 5, iclass 7, count 0 2006.229.21:19:48.58#ibcon#about to read 6, iclass 7, count 0 2006.229.21:19:48.58#ibcon#read 6, iclass 7, count 0 2006.229.21:19:48.58#ibcon#end of sib2, iclass 7, count 0 2006.229.21:19:48.58#ibcon#*after write, iclass 7, count 0 2006.229.21:19:48.58#ibcon#*before return 0, iclass 7, count 0 2006.229.21:19:48.58#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:48.58#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:19:48.58#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:19:48.58#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:19:48.58$vck44/vb=3,4 2006.229.21:19:48.58#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.21:19:48.58#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.21:19:48.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:48.58#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:48.64#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:48.64#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:48.64#ibcon#enter wrdev, iclass 11, count 2 2006.229.21:19:48.64#ibcon#first serial, iclass 11, count 2 2006.229.21:19:48.64#ibcon#enter sib2, iclass 11, count 2 2006.229.21:19:48.64#ibcon#flushed, iclass 11, count 2 2006.229.21:19:48.64#ibcon#about to write, iclass 11, count 2 2006.229.21:19:48.64#ibcon#wrote, iclass 11, count 2 2006.229.21:19:48.64#ibcon#about to read 3, iclass 11, count 2 2006.229.21:19:48.66#ibcon#read 3, iclass 11, count 2 2006.229.21:19:48.66#ibcon#about to read 4, iclass 11, count 2 2006.229.21:19:48.66#ibcon#read 4, iclass 11, count 2 2006.229.21:19:48.66#ibcon#about to read 5, iclass 11, count 2 2006.229.21:19:48.66#ibcon#read 5, iclass 11, count 2 2006.229.21:19:48.66#ibcon#about to read 6, iclass 11, count 2 2006.229.21:19:48.66#ibcon#read 6, iclass 11, count 2 2006.229.21:19:48.66#ibcon#end of sib2, iclass 11, count 2 2006.229.21:19:48.66#ibcon#*mode == 0, iclass 11, count 2 2006.229.21:19:48.66#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.21:19:48.66#ibcon#[27=AT03-04\r\n] 2006.229.21:19:48.66#ibcon#*before write, iclass 11, count 2 2006.229.21:19:48.66#ibcon#enter sib2, iclass 11, count 2 2006.229.21:19:48.66#ibcon#flushed, iclass 11, count 2 2006.229.21:19:48.66#ibcon#about to write, iclass 11, count 2 2006.229.21:19:48.66#ibcon#wrote, iclass 11, count 2 2006.229.21:19:48.66#ibcon#about to read 3, iclass 11, count 2 2006.229.21:19:48.69#ibcon#read 3, iclass 11, count 2 2006.229.21:19:48.69#ibcon#about to read 4, iclass 11, count 2 2006.229.21:19:48.69#ibcon#read 4, iclass 11, count 2 2006.229.21:19:48.69#ibcon#about to read 5, iclass 11, count 2 2006.229.21:19:48.69#ibcon#read 5, iclass 11, count 2 2006.229.21:19:48.69#ibcon#about to read 6, iclass 11, count 2 2006.229.21:19:48.69#ibcon#read 6, iclass 11, count 2 2006.229.21:19:48.69#ibcon#end of sib2, iclass 11, count 2 2006.229.21:19:48.69#ibcon#*after write, iclass 11, count 2 2006.229.21:19:48.69#ibcon#*before return 0, iclass 11, count 2 2006.229.21:19:48.69#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:48.69#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:19:48.69#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.21:19:48.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:48.69#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:48.81#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:48.81#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:48.81#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:19:48.81#ibcon#first serial, iclass 11, count 0 2006.229.21:19:48.81#ibcon#enter sib2, iclass 11, count 0 2006.229.21:19:48.81#ibcon#flushed, iclass 11, count 0 2006.229.21:19:48.81#ibcon#about to write, iclass 11, count 0 2006.229.21:19:48.81#ibcon#wrote, iclass 11, count 0 2006.229.21:19:48.81#ibcon#about to read 3, iclass 11, count 0 2006.229.21:19:48.83#ibcon#read 3, iclass 11, count 0 2006.229.21:19:48.83#ibcon#about to read 4, iclass 11, count 0 2006.229.21:19:48.83#ibcon#read 4, iclass 11, count 0 2006.229.21:19:48.83#ibcon#about to read 5, iclass 11, count 0 2006.229.21:19:48.83#ibcon#read 5, iclass 11, count 0 2006.229.21:19:48.83#ibcon#about to read 6, iclass 11, count 0 2006.229.21:19:48.83#ibcon#read 6, iclass 11, count 0 2006.229.21:19:48.83#ibcon#end of sib2, iclass 11, count 0 2006.229.21:19:48.83#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:19:48.83#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:19:48.83#ibcon#[27=USB\r\n] 2006.229.21:19:48.83#ibcon#*before write, iclass 11, count 0 2006.229.21:19:48.83#ibcon#enter sib2, iclass 11, count 0 2006.229.21:19:48.83#ibcon#flushed, iclass 11, count 0 2006.229.21:19:48.83#ibcon#about to write, iclass 11, count 0 2006.229.21:19:48.83#ibcon#wrote, iclass 11, count 0 2006.229.21:19:48.83#ibcon#about to read 3, iclass 11, count 0 2006.229.21:19:48.86#ibcon#read 3, iclass 11, count 0 2006.229.21:19:48.86#ibcon#about to read 4, iclass 11, count 0 2006.229.21:19:48.86#ibcon#read 4, iclass 11, count 0 2006.229.21:19:48.86#ibcon#about to read 5, iclass 11, count 0 2006.229.21:19:48.86#ibcon#read 5, iclass 11, count 0 2006.229.21:19:48.86#ibcon#about to read 6, iclass 11, count 0 2006.229.21:19:48.86#ibcon#read 6, iclass 11, count 0 2006.229.21:19:48.86#ibcon#end of sib2, iclass 11, count 0 2006.229.21:19:48.86#ibcon#*after write, iclass 11, count 0 2006.229.21:19:48.86#ibcon#*before return 0, iclass 11, count 0 2006.229.21:19:48.86#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:48.86#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:19:48.86#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:19:48.86#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:19:48.86$vck44/vblo=4,679.99 2006.229.21:19:48.86#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.21:19:48.86#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.21:19:48.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:48.86#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:48.86#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:48.86#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:48.86#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:19:48.86#ibcon#first serial, iclass 13, count 0 2006.229.21:19:48.86#ibcon#enter sib2, iclass 13, count 0 2006.229.21:19:48.86#ibcon#flushed, iclass 13, count 0 2006.229.21:19:48.86#ibcon#about to write, iclass 13, count 0 2006.229.21:19:48.86#ibcon#wrote, iclass 13, count 0 2006.229.21:19:48.86#ibcon#about to read 3, iclass 13, count 0 2006.229.21:19:48.88#ibcon#read 3, iclass 13, count 0 2006.229.21:19:48.88#ibcon#about to read 4, iclass 13, count 0 2006.229.21:19:48.88#ibcon#read 4, iclass 13, count 0 2006.229.21:19:48.88#ibcon#about to read 5, iclass 13, count 0 2006.229.21:19:48.88#ibcon#read 5, iclass 13, count 0 2006.229.21:19:48.88#ibcon#about to read 6, iclass 13, count 0 2006.229.21:19:48.88#ibcon#read 6, iclass 13, count 0 2006.229.21:19:48.88#ibcon#end of sib2, iclass 13, count 0 2006.229.21:19:48.88#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:19:48.88#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:19:48.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:19:48.88#ibcon#*before write, iclass 13, count 0 2006.229.21:19:48.88#ibcon#enter sib2, iclass 13, count 0 2006.229.21:19:48.88#ibcon#flushed, iclass 13, count 0 2006.229.21:19:48.88#ibcon#about to write, iclass 13, count 0 2006.229.21:19:48.88#ibcon#wrote, iclass 13, count 0 2006.229.21:19:48.88#ibcon#about to read 3, iclass 13, count 0 2006.229.21:19:48.92#ibcon#read 3, iclass 13, count 0 2006.229.21:19:48.92#ibcon#about to read 4, iclass 13, count 0 2006.229.21:19:48.92#ibcon#read 4, iclass 13, count 0 2006.229.21:19:48.92#ibcon#about to read 5, iclass 13, count 0 2006.229.21:19:48.92#ibcon#read 5, iclass 13, count 0 2006.229.21:19:48.92#ibcon#about to read 6, iclass 13, count 0 2006.229.21:19:48.92#ibcon#read 6, iclass 13, count 0 2006.229.21:19:48.92#ibcon#end of sib2, iclass 13, count 0 2006.229.21:19:48.92#ibcon#*after write, iclass 13, count 0 2006.229.21:19:48.92#ibcon#*before return 0, iclass 13, count 0 2006.229.21:19:48.92#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:48.92#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:19:48.92#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:19:48.92#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:19:48.92$vck44/vb=4,4 2006.229.21:19:48.92#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.21:19:48.92#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.21:19:48.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:48.92#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:48.98#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:48.98#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:48.98#ibcon#enter wrdev, iclass 15, count 2 2006.229.21:19:48.98#ibcon#first serial, iclass 15, count 2 2006.229.21:19:48.98#ibcon#enter sib2, iclass 15, count 2 2006.229.21:19:48.98#ibcon#flushed, iclass 15, count 2 2006.229.21:19:48.98#ibcon#about to write, iclass 15, count 2 2006.229.21:19:48.98#ibcon#wrote, iclass 15, count 2 2006.229.21:19:48.98#ibcon#about to read 3, iclass 15, count 2 2006.229.21:19:49.00#ibcon#read 3, iclass 15, count 2 2006.229.21:19:49.00#ibcon#about to read 4, iclass 15, count 2 2006.229.21:19:49.00#ibcon#read 4, iclass 15, count 2 2006.229.21:19:49.00#ibcon#about to read 5, iclass 15, count 2 2006.229.21:19:49.00#ibcon#read 5, iclass 15, count 2 2006.229.21:19:49.00#ibcon#about to read 6, iclass 15, count 2 2006.229.21:19:49.00#ibcon#read 6, iclass 15, count 2 2006.229.21:19:49.00#ibcon#end of sib2, iclass 15, count 2 2006.229.21:19:49.00#ibcon#*mode == 0, iclass 15, count 2 2006.229.21:19:49.00#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.21:19:49.00#ibcon#[27=AT04-04\r\n] 2006.229.21:19:49.00#ibcon#*before write, iclass 15, count 2 2006.229.21:19:49.00#ibcon#enter sib2, iclass 15, count 2 2006.229.21:19:49.00#ibcon#flushed, iclass 15, count 2 2006.229.21:19:49.00#ibcon#about to write, iclass 15, count 2 2006.229.21:19:49.00#ibcon#wrote, iclass 15, count 2 2006.229.21:19:49.00#ibcon#about to read 3, iclass 15, count 2 2006.229.21:19:49.03#ibcon#read 3, iclass 15, count 2 2006.229.21:19:49.03#ibcon#about to read 4, iclass 15, count 2 2006.229.21:19:49.03#ibcon#read 4, iclass 15, count 2 2006.229.21:19:49.03#ibcon#about to read 5, iclass 15, count 2 2006.229.21:19:49.03#ibcon#read 5, iclass 15, count 2 2006.229.21:19:49.03#ibcon#about to read 6, iclass 15, count 2 2006.229.21:19:49.03#ibcon#read 6, iclass 15, count 2 2006.229.21:19:49.03#ibcon#end of sib2, iclass 15, count 2 2006.229.21:19:49.03#ibcon#*after write, iclass 15, count 2 2006.229.21:19:49.03#ibcon#*before return 0, iclass 15, count 2 2006.229.21:19:49.03#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:49.03#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:19:49.03#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.21:19:49.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:49.03#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:49.15#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:49.15#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:49.15#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:19:49.15#ibcon#first serial, iclass 15, count 0 2006.229.21:19:49.15#ibcon#enter sib2, iclass 15, count 0 2006.229.21:19:49.15#ibcon#flushed, iclass 15, count 0 2006.229.21:19:49.15#ibcon#about to write, iclass 15, count 0 2006.229.21:19:49.15#ibcon#wrote, iclass 15, count 0 2006.229.21:19:49.15#ibcon#about to read 3, iclass 15, count 0 2006.229.21:19:49.17#ibcon#read 3, iclass 15, count 0 2006.229.21:19:49.17#ibcon#about to read 4, iclass 15, count 0 2006.229.21:19:49.17#ibcon#read 4, iclass 15, count 0 2006.229.21:19:49.17#ibcon#about to read 5, iclass 15, count 0 2006.229.21:19:49.17#ibcon#read 5, iclass 15, count 0 2006.229.21:19:49.17#ibcon#about to read 6, iclass 15, count 0 2006.229.21:19:49.17#ibcon#read 6, iclass 15, count 0 2006.229.21:19:49.17#ibcon#end of sib2, iclass 15, count 0 2006.229.21:19:49.17#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:19:49.17#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:19:49.17#ibcon#[27=USB\r\n] 2006.229.21:19:49.17#ibcon#*before write, iclass 15, count 0 2006.229.21:19:49.17#ibcon#enter sib2, iclass 15, count 0 2006.229.21:19:49.17#ibcon#flushed, iclass 15, count 0 2006.229.21:19:49.17#ibcon#about to write, iclass 15, count 0 2006.229.21:19:49.17#ibcon#wrote, iclass 15, count 0 2006.229.21:19:49.17#ibcon#about to read 3, iclass 15, count 0 2006.229.21:19:49.20#ibcon#read 3, iclass 15, count 0 2006.229.21:19:49.20#ibcon#about to read 4, iclass 15, count 0 2006.229.21:19:49.20#ibcon#read 4, iclass 15, count 0 2006.229.21:19:49.20#ibcon#about to read 5, iclass 15, count 0 2006.229.21:19:49.20#ibcon#read 5, iclass 15, count 0 2006.229.21:19:49.20#ibcon#about to read 6, iclass 15, count 0 2006.229.21:19:49.20#ibcon#read 6, iclass 15, count 0 2006.229.21:19:49.20#ibcon#end of sib2, iclass 15, count 0 2006.229.21:19:49.20#ibcon#*after write, iclass 15, count 0 2006.229.21:19:49.20#ibcon#*before return 0, iclass 15, count 0 2006.229.21:19:49.20#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:49.20#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:19:49.20#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:19:49.20#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:19:49.20$vck44/vblo=5,709.99 2006.229.21:19:49.20#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.21:19:49.20#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.21:19:49.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:49.20#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:49.20#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:49.20#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:49.20#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:19:49.20#ibcon#first serial, iclass 17, count 0 2006.229.21:19:49.20#ibcon#enter sib2, iclass 17, count 0 2006.229.21:19:49.20#ibcon#flushed, iclass 17, count 0 2006.229.21:19:49.20#ibcon#about to write, iclass 17, count 0 2006.229.21:19:49.20#ibcon#wrote, iclass 17, count 0 2006.229.21:19:49.20#ibcon#about to read 3, iclass 17, count 0 2006.229.21:19:49.22#ibcon#read 3, iclass 17, count 0 2006.229.21:19:49.22#ibcon#about to read 4, iclass 17, count 0 2006.229.21:19:49.22#ibcon#read 4, iclass 17, count 0 2006.229.21:19:49.22#ibcon#about to read 5, iclass 17, count 0 2006.229.21:19:49.22#ibcon#read 5, iclass 17, count 0 2006.229.21:19:49.22#ibcon#about to read 6, iclass 17, count 0 2006.229.21:19:49.22#ibcon#read 6, iclass 17, count 0 2006.229.21:19:49.22#ibcon#end of sib2, iclass 17, count 0 2006.229.21:19:49.22#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:19:49.22#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:19:49.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:19:49.22#ibcon#*before write, iclass 17, count 0 2006.229.21:19:49.22#ibcon#enter sib2, iclass 17, count 0 2006.229.21:19:49.22#ibcon#flushed, iclass 17, count 0 2006.229.21:19:49.22#ibcon#about to write, iclass 17, count 0 2006.229.21:19:49.22#ibcon#wrote, iclass 17, count 0 2006.229.21:19:49.22#ibcon#about to read 3, iclass 17, count 0 2006.229.21:19:49.26#ibcon#read 3, iclass 17, count 0 2006.229.21:19:49.26#ibcon#about to read 4, iclass 17, count 0 2006.229.21:19:49.26#ibcon#read 4, iclass 17, count 0 2006.229.21:19:49.26#ibcon#about to read 5, iclass 17, count 0 2006.229.21:19:49.26#ibcon#read 5, iclass 17, count 0 2006.229.21:19:49.26#ibcon#about to read 6, iclass 17, count 0 2006.229.21:19:49.26#ibcon#read 6, iclass 17, count 0 2006.229.21:19:49.26#ibcon#end of sib2, iclass 17, count 0 2006.229.21:19:49.26#ibcon#*after write, iclass 17, count 0 2006.229.21:19:49.26#ibcon#*before return 0, iclass 17, count 0 2006.229.21:19:49.26#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:49.26#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:19:49.26#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:19:49.26#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:19:49.26$vck44/vb=5,4 2006.229.21:19:49.26#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.21:19:49.26#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.21:19:49.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:49.26#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:49.32#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:49.32#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:49.32#ibcon#enter wrdev, iclass 19, count 2 2006.229.21:19:49.32#ibcon#first serial, iclass 19, count 2 2006.229.21:19:49.32#ibcon#enter sib2, iclass 19, count 2 2006.229.21:19:49.32#ibcon#flushed, iclass 19, count 2 2006.229.21:19:49.32#ibcon#about to write, iclass 19, count 2 2006.229.21:19:49.32#ibcon#wrote, iclass 19, count 2 2006.229.21:19:49.32#ibcon#about to read 3, iclass 19, count 2 2006.229.21:19:49.34#ibcon#read 3, iclass 19, count 2 2006.229.21:19:49.34#ibcon#about to read 4, iclass 19, count 2 2006.229.21:19:49.34#ibcon#read 4, iclass 19, count 2 2006.229.21:19:49.34#ibcon#about to read 5, iclass 19, count 2 2006.229.21:19:49.34#ibcon#read 5, iclass 19, count 2 2006.229.21:19:49.34#ibcon#about to read 6, iclass 19, count 2 2006.229.21:19:49.34#ibcon#read 6, iclass 19, count 2 2006.229.21:19:49.34#ibcon#end of sib2, iclass 19, count 2 2006.229.21:19:49.34#ibcon#*mode == 0, iclass 19, count 2 2006.229.21:19:49.34#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.21:19:49.34#ibcon#[27=AT05-04\r\n] 2006.229.21:19:49.34#ibcon#*before write, iclass 19, count 2 2006.229.21:19:49.34#ibcon#enter sib2, iclass 19, count 2 2006.229.21:19:49.34#ibcon#flushed, iclass 19, count 2 2006.229.21:19:49.34#ibcon#about to write, iclass 19, count 2 2006.229.21:19:49.34#ibcon#wrote, iclass 19, count 2 2006.229.21:19:49.34#ibcon#about to read 3, iclass 19, count 2 2006.229.21:19:49.37#ibcon#read 3, iclass 19, count 2 2006.229.21:19:49.37#ibcon#about to read 4, iclass 19, count 2 2006.229.21:19:49.37#ibcon#read 4, iclass 19, count 2 2006.229.21:19:49.37#ibcon#about to read 5, iclass 19, count 2 2006.229.21:19:49.37#ibcon#read 5, iclass 19, count 2 2006.229.21:19:49.37#ibcon#about to read 6, iclass 19, count 2 2006.229.21:19:49.37#ibcon#read 6, iclass 19, count 2 2006.229.21:19:49.37#ibcon#end of sib2, iclass 19, count 2 2006.229.21:19:49.37#ibcon#*after write, iclass 19, count 2 2006.229.21:19:49.37#ibcon#*before return 0, iclass 19, count 2 2006.229.21:19:49.37#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:49.37#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:19:49.37#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.21:19:49.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:49.37#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:49.49#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:49.49#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:49.49#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:19:49.49#ibcon#first serial, iclass 19, count 0 2006.229.21:19:49.49#ibcon#enter sib2, iclass 19, count 0 2006.229.21:19:49.49#ibcon#flushed, iclass 19, count 0 2006.229.21:19:49.49#ibcon#about to write, iclass 19, count 0 2006.229.21:19:49.49#ibcon#wrote, iclass 19, count 0 2006.229.21:19:49.49#ibcon#about to read 3, iclass 19, count 0 2006.229.21:19:49.51#ibcon#read 3, iclass 19, count 0 2006.229.21:19:49.51#ibcon#about to read 4, iclass 19, count 0 2006.229.21:19:49.51#ibcon#read 4, iclass 19, count 0 2006.229.21:19:49.51#ibcon#about to read 5, iclass 19, count 0 2006.229.21:19:49.51#ibcon#read 5, iclass 19, count 0 2006.229.21:19:49.51#ibcon#about to read 6, iclass 19, count 0 2006.229.21:19:49.51#ibcon#read 6, iclass 19, count 0 2006.229.21:19:49.51#ibcon#end of sib2, iclass 19, count 0 2006.229.21:19:49.51#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:19:49.51#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:19:49.51#ibcon#[27=USB\r\n] 2006.229.21:19:49.51#ibcon#*before write, iclass 19, count 0 2006.229.21:19:49.51#ibcon#enter sib2, iclass 19, count 0 2006.229.21:19:49.51#ibcon#flushed, iclass 19, count 0 2006.229.21:19:49.51#ibcon#about to write, iclass 19, count 0 2006.229.21:19:49.51#ibcon#wrote, iclass 19, count 0 2006.229.21:19:49.51#ibcon#about to read 3, iclass 19, count 0 2006.229.21:19:49.54#ibcon#read 3, iclass 19, count 0 2006.229.21:19:49.54#ibcon#about to read 4, iclass 19, count 0 2006.229.21:19:49.54#ibcon#read 4, iclass 19, count 0 2006.229.21:19:49.54#ibcon#about to read 5, iclass 19, count 0 2006.229.21:19:49.54#ibcon#read 5, iclass 19, count 0 2006.229.21:19:49.54#ibcon#about to read 6, iclass 19, count 0 2006.229.21:19:49.54#ibcon#read 6, iclass 19, count 0 2006.229.21:19:49.54#ibcon#end of sib2, iclass 19, count 0 2006.229.21:19:49.54#ibcon#*after write, iclass 19, count 0 2006.229.21:19:49.54#ibcon#*before return 0, iclass 19, count 0 2006.229.21:19:49.54#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:49.54#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:19:49.54#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:19:49.54#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:19:49.54$vck44/vblo=6,719.99 2006.229.21:19:49.54#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.21:19:49.54#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.21:19:49.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:49.54#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:49.54#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:49.54#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:49.54#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:19:49.54#ibcon#first serial, iclass 21, count 0 2006.229.21:19:49.54#ibcon#enter sib2, iclass 21, count 0 2006.229.21:19:49.54#ibcon#flushed, iclass 21, count 0 2006.229.21:19:49.54#ibcon#about to write, iclass 21, count 0 2006.229.21:19:49.54#ibcon#wrote, iclass 21, count 0 2006.229.21:19:49.54#ibcon#about to read 3, iclass 21, count 0 2006.229.21:19:49.56#ibcon#read 3, iclass 21, count 0 2006.229.21:19:49.56#ibcon#about to read 4, iclass 21, count 0 2006.229.21:19:49.56#ibcon#read 4, iclass 21, count 0 2006.229.21:19:49.56#ibcon#about to read 5, iclass 21, count 0 2006.229.21:19:49.56#ibcon#read 5, iclass 21, count 0 2006.229.21:19:49.56#ibcon#about to read 6, iclass 21, count 0 2006.229.21:19:49.56#ibcon#read 6, iclass 21, count 0 2006.229.21:19:49.56#ibcon#end of sib2, iclass 21, count 0 2006.229.21:19:49.56#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:19:49.56#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:19:49.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:19:49.56#ibcon#*before write, iclass 21, count 0 2006.229.21:19:49.56#ibcon#enter sib2, iclass 21, count 0 2006.229.21:19:49.56#ibcon#flushed, iclass 21, count 0 2006.229.21:19:49.56#ibcon#about to write, iclass 21, count 0 2006.229.21:19:49.56#ibcon#wrote, iclass 21, count 0 2006.229.21:19:49.56#ibcon#about to read 3, iclass 21, count 0 2006.229.21:19:49.60#ibcon#read 3, iclass 21, count 0 2006.229.21:19:49.60#ibcon#about to read 4, iclass 21, count 0 2006.229.21:19:49.60#ibcon#read 4, iclass 21, count 0 2006.229.21:19:49.60#ibcon#about to read 5, iclass 21, count 0 2006.229.21:19:49.60#ibcon#read 5, iclass 21, count 0 2006.229.21:19:49.60#ibcon#about to read 6, iclass 21, count 0 2006.229.21:19:49.60#ibcon#read 6, iclass 21, count 0 2006.229.21:19:49.60#ibcon#end of sib2, iclass 21, count 0 2006.229.21:19:49.60#ibcon#*after write, iclass 21, count 0 2006.229.21:19:49.60#ibcon#*before return 0, iclass 21, count 0 2006.229.21:19:49.60#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:49.60#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:19:49.60#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:19:49.60#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:19:49.60$vck44/vb=6,4 2006.229.21:19:49.60#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.21:19:49.60#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.21:19:49.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:49.60#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:49.66#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:49.66#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:49.66#ibcon#enter wrdev, iclass 23, count 2 2006.229.21:19:49.66#ibcon#first serial, iclass 23, count 2 2006.229.21:19:49.66#ibcon#enter sib2, iclass 23, count 2 2006.229.21:19:49.66#ibcon#flushed, iclass 23, count 2 2006.229.21:19:49.66#ibcon#about to write, iclass 23, count 2 2006.229.21:19:49.66#ibcon#wrote, iclass 23, count 2 2006.229.21:19:49.66#ibcon#about to read 3, iclass 23, count 2 2006.229.21:19:49.68#ibcon#read 3, iclass 23, count 2 2006.229.21:19:49.68#ibcon#about to read 4, iclass 23, count 2 2006.229.21:19:49.68#ibcon#read 4, iclass 23, count 2 2006.229.21:19:49.68#ibcon#about to read 5, iclass 23, count 2 2006.229.21:19:49.68#ibcon#read 5, iclass 23, count 2 2006.229.21:19:49.68#ibcon#about to read 6, iclass 23, count 2 2006.229.21:19:49.68#ibcon#read 6, iclass 23, count 2 2006.229.21:19:49.68#ibcon#end of sib2, iclass 23, count 2 2006.229.21:19:49.68#ibcon#*mode == 0, iclass 23, count 2 2006.229.21:19:49.68#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.21:19:49.68#ibcon#[27=AT06-04\r\n] 2006.229.21:19:49.68#ibcon#*before write, iclass 23, count 2 2006.229.21:19:49.68#ibcon#enter sib2, iclass 23, count 2 2006.229.21:19:49.68#ibcon#flushed, iclass 23, count 2 2006.229.21:19:49.68#ibcon#about to write, iclass 23, count 2 2006.229.21:19:49.68#ibcon#wrote, iclass 23, count 2 2006.229.21:19:49.68#ibcon#about to read 3, iclass 23, count 2 2006.229.21:19:49.71#ibcon#read 3, iclass 23, count 2 2006.229.21:19:49.71#ibcon#about to read 4, iclass 23, count 2 2006.229.21:19:49.71#ibcon#read 4, iclass 23, count 2 2006.229.21:19:49.71#ibcon#about to read 5, iclass 23, count 2 2006.229.21:19:49.71#ibcon#read 5, iclass 23, count 2 2006.229.21:19:49.71#ibcon#about to read 6, iclass 23, count 2 2006.229.21:19:49.71#ibcon#read 6, iclass 23, count 2 2006.229.21:19:49.71#ibcon#end of sib2, iclass 23, count 2 2006.229.21:19:49.71#ibcon#*after write, iclass 23, count 2 2006.229.21:19:49.71#ibcon#*before return 0, iclass 23, count 2 2006.229.21:19:49.71#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:49.71#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:19:49.71#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.21:19:49.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:49.71#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:49.83#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:49.83#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:49.83#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:19:49.83#ibcon#first serial, iclass 23, count 0 2006.229.21:19:49.83#ibcon#enter sib2, iclass 23, count 0 2006.229.21:19:49.83#ibcon#flushed, iclass 23, count 0 2006.229.21:19:49.83#ibcon#about to write, iclass 23, count 0 2006.229.21:19:49.83#ibcon#wrote, iclass 23, count 0 2006.229.21:19:49.83#ibcon#about to read 3, iclass 23, count 0 2006.229.21:19:49.85#ibcon#read 3, iclass 23, count 0 2006.229.21:19:49.85#ibcon#about to read 4, iclass 23, count 0 2006.229.21:19:49.85#ibcon#read 4, iclass 23, count 0 2006.229.21:19:49.85#ibcon#about to read 5, iclass 23, count 0 2006.229.21:19:49.85#ibcon#read 5, iclass 23, count 0 2006.229.21:19:49.85#ibcon#about to read 6, iclass 23, count 0 2006.229.21:19:49.85#ibcon#read 6, iclass 23, count 0 2006.229.21:19:49.85#ibcon#end of sib2, iclass 23, count 0 2006.229.21:19:49.85#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:19:49.85#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:19:49.85#ibcon#[27=USB\r\n] 2006.229.21:19:49.85#ibcon#*before write, iclass 23, count 0 2006.229.21:19:49.85#ibcon#enter sib2, iclass 23, count 0 2006.229.21:19:49.85#ibcon#flushed, iclass 23, count 0 2006.229.21:19:49.85#ibcon#about to write, iclass 23, count 0 2006.229.21:19:49.85#ibcon#wrote, iclass 23, count 0 2006.229.21:19:49.85#ibcon#about to read 3, iclass 23, count 0 2006.229.21:19:49.88#ibcon#read 3, iclass 23, count 0 2006.229.21:19:49.88#ibcon#about to read 4, iclass 23, count 0 2006.229.21:19:49.88#ibcon#read 4, iclass 23, count 0 2006.229.21:19:49.88#ibcon#about to read 5, iclass 23, count 0 2006.229.21:19:49.88#ibcon#read 5, iclass 23, count 0 2006.229.21:19:49.88#ibcon#about to read 6, iclass 23, count 0 2006.229.21:19:49.88#ibcon#read 6, iclass 23, count 0 2006.229.21:19:49.88#ibcon#end of sib2, iclass 23, count 0 2006.229.21:19:49.88#ibcon#*after write, iclass 23, count 0 2006.229.21:19:49.88#ibcon#*before return 0, iclass 23, count 0 2006.229.21:19:49.88#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:49.88#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:19:49.88#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:19:49.88#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:19:49.88$vck44/vblo=7,734.99 2006.229.21:19:49.88#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.21:19:49.88#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.21:19:49.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:49.88#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:49.88#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:49.88#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:49.88#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:19:49.88#ibcon#first serial, iclass 25, count 0 2006.229.21:19:49.88#ibcon#enter sib2, iclass 25, count 0 2006.229.21:19:49.88#ibcon#flushed, iclass 25, count 0 2006.229.21:19:49.88#ibcon#about to write, iclass 25, count 0 2006.229.21:19:49.88#ibcon#wrote, iclass 25, count 0 2006.229.21:19:49.88#ibcon#about to read 3, iclass 25, count 0 2006.229.21:19:49.90#ibcon#read 3, iclass 25, count 0 2006.229.21:19:49.90#ibcon#about to read 4, iclass 25, count 0 2006.229.21:19:49.90#ibcon#read 4, iclass 25, count 0 2006.229.21:19:49.90#ibcon#about to read 5, iclass 25, count 0 2006.229.21:19:49.90#ibcon#read 5, iclass 25, count 0 2006.229.21:19:49.90#ibcon#about to read 6, iclass 25, count 0 2006.229.21:19:49.90#ibcon#read 6, iclass 25, count 0 2006.229.21:19:49.90#ibcon#end of sib2, iclass 25, count 0 2006.229.21:19:49.90#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:19:49.90#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:19:49.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:19:49.90#ibcon#*before write, iclass 25, count 0 2006.229.21:19:49.90#ibcon#enter sib2, iclass 25, count 0 2006.229.21:19:49.90#ibcon#flushed, iclass 25, count 0 2006.229.21:19:49.90#ibcon#about to write, iclass 25, count 0 2006.229.21:19:49.90#ibcon#wrote, iclass 25, count 0 2006.229.21:19:49.90#ibcon#about to read 3, iclass 25, count 0 2006.229.21:19:49.94#ibcon#read 3, iclass 25, count 0 2006.229.21:19:49.94#ibcon#about to read 4, iclass 25, count 0 2006.229.21:19:49.94#ibcon#read 4, iclass 25, count 0 2006.229.21:19:49.94#ibcon#about to read 5, iclass 25, count 0 2006.229.21:19:49.94#ibcon#read 5, iclass 25, count 0 2006.229.21:19:49.94#ibcon#about to read 6, iclass 25, count 0 2006.229.21:19:49.94#ibcon#read 6, iclass 25, count 0 2006.229.21:19:49.94#ibcon#end of sib2, iclass 25, count 0 2006.229.21:19:49.94#ibcon#*after write, iclass 25, count 0 2006.229.21:19:49.94#ibcon#*before return 0, iclass 25, count 0 2006.229.21:19:49.94#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:49.94#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:19:49.94#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:19:49.94#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:19:49.94$vck44/vb=7,4 2006.229.21:19:49.94#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.21:19:49.94#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.21:19:49.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:49.94#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:50.00#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:50.00#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:50.00#ibcon#enter wrdev, iclass 27, count 2 2006.229.21:19:50.00#ibcon#first serial, iclass 27, count 2 2006.229.21:19:50.00#ibcon#enter sib2, iclass 27, count 2 2006.229.21:19:50.00#ibcon#flushed, iclass 27, count 2 2006.229.21:19:50.00#ibcon#about to write, iclass 27, count 2 2006.229.21:19:50.00#ibcon#wrote, iclass 27, count 2 2006.229.21:19:50.00#ibcon#about to read 3, iclass 27, count 2 2006.229.21:19:50.02#ibcon#read 3, iclass 27, count 2 2006.229.21:19:50.02#ibcon#about to read 4, iclass 27, count 2 2006.229.21:19:50.02#ibcon#read 4, iclass 27, count 2 2006.229.21:19:50.02#ibcon#about to read 5, iclass 27, count 2 2006.229.21:19:50.02#ibcon#read 5, iclass 27, count 2 2006.229.21:19:50.02#ibcon#about to read 6, iclass 27, count 2 2006.229.21:19:50.02#ibcon#read 6, iclass 27, count 2 2006.229.21:19:50.02#ibcon#end of sib2, iclass 27, count 2 2006.229.21:19:50.02#ibcon#*mode == 0, iclass 27, count 2 2006.229.21:19:50.02#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.21:19:50.02#ibcon#[27=AT07-04\r\n] 2006.229.21:19:50.02#ibcon#*before write, iclass 27, count 2 2006.229.21:19:50.02#ibcon#enter sib2, iclass 27, count 2 2006.229.21:19:50.02#ibcon#flushed, iclass 27, count 2 2006.229.21:19:50.02#ibcon#about to write, iclass 27, count 2 2006.229.21:19:50.02#ibcon#wrote, iclass 27, count 2 2006.229.21:19:50.02#ibcon#about to read 3, iclass 27, count 2 2006.229.21:19:50.05#ibcon#read 3, iclass 27, count 2 2006.229.21:19:50.05#ibcon#about to read 4, iclass 27, count 2 2006.229.21:19:50.05#ibcon#read 4, iclass 27, count 2 2006.229.21:19:50.05#ibcon#about to read 5, iclass 27, count 2 2006.229.21:19:50.05#ibcon#read 5, iclass 27, count 2 2006.229.21:19:50.05#ibcon#about to read 6, iclass 27, count 2 2006.229.21:19:50.05#ibcon#read 6, iclass 27, count 2 2006.229.21:19:50.05#ibcon#end of sib2, iclass 27, count 2 2006.229.21:19:50.05#ibcon#*after write, iclass 27, count 2 2006.229.21:19:50.05#ibcon#*before return 0, iclass 27, count 2 2006.229.21:19:50.05#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:50.05#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:19:50.05#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.21:19:50.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:50.05#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:50.17#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:50.17#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:50.17#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:19:50.17#ibcon#first serial, iclass 27, count 0 2006.229.21:19:50.17#ibcon#enter sib2, iclass 27, count 0 2006.229.21:19:50.17#ibcon#flushed, iclass 27, count 0 2006.229.21:19:50.17#ibcon#about to write, iclass 27, count 0 2006.229.21:19:50.17#ibcon#wrote, iclass 27, count 0 2006.229.21:19:50.17#ibcon#about to read 3, iclass 27, count 0 2006.229.21:19:50.19#ibcon#read 3, iclass 27, count 0 2006.229.21:19:50.19#ibcon#about to read 4, iclass 27, count 0 2006.229.21:19:50.19#ibcon#read 4, iclass 27, count 0 2006.229.21:19:50.19#ibcon#about to read 5, iclass 27, count 0 2006.229.21:19:50.19#ibcon#read 5, iclass 27, count 0 2006.229.21:19:50.19#ibcon#about to read 6, iclass 27, count 0 2006.229.21:19:50.19#ibcon#read 6, iclass 27, count 0 2006.229.21:19:50.19#ibcon#end of sib2, iclass 27, count 0 2006.229.21:19:50.19#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:19:50.19#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:19:50.19#ibcon#[27=USB\r\n] 2006.229.21:19:50.19#ibcon#*before write, iclass 27, count 0 2006.229.21:19:50.19#ibcon#enter sib2, iclass 27, count 0 2006.229.21:19:50.19#ibcon#flushed, iclass 27, count 0 2006.229.21:19:50.19#ibcon#about to write, iclass 27, count 0 2006.229.21:19:50.19#ibcon#wrote, iclass 27, count 0 2006.229.21:19:50.19#ibcon#about to read 3, iclass 27, count 0 2006.229.21:19:50.22#ibcon#read 3, iclass 27, count 0 2006.229.21:19:50.22#ibcon#about to read 4, iclass 27, count 0 2006.229.21:19:50.22#ibcon#read 4, iclass 27, count 0 2006.229.21:19:50.22#ibcon#about to read 5, iclass 27, count 0 2006.229.21:19:50.22#ibcon#read 5, iclass 27, count 0 2006.229.21:19:50.22#ibcon#about to read 6, iclass 27, count 0 2006.229.21:19:50.22#ibcon#read 6, iclass 27, count 0 2006.229.21:19:50.22#ibcon#end of sib2, iclass 27, count 0 2006.229.21:19:50.22#ibcon#*after write, iclass 27, count 0 2006.229.21:19:50.22#ibcon#*before return 0, iclass 27, count 0 2006.229.21:19:50.22#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:50.22#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:19:50.22#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:19:50.22#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:19:50.22$vck44/vblo=8,744.99 2006.229.21:19:50.22#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.21:19:50.22#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.21:19:50.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:19:50.22#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:50.22#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:50.22#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:50.22#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:19:50.22#ibcon#first serial, iclass 29, count 0 2006.229.21:19:50.22#ibcon#enter sib2, iclass 29, count 0 2006.229.21:19:50.22#ibcon#flushed, iclass 29, count 0 2006.229.21:19:50.22#ibcon#about to write, iclass 29, count 0 2006.229.21:19:50.22#ibcon#wrote, iclass 29, count 0 2006.229.21:19:50.22#ibcon#about to read 3, iclass 29, count 0 2006.229.21:19:50.24#ibcon#read 3, iclass 29, count 0 2006.229.21:19:50.24#ibcon#about to read 4, iclass 29, count 0 2006.229.21:19:50.24#ibcon#read 4, iclass 29, count 0 2006.229.21:19:50.24#ibcon#about to read 5, iclass 29, count 0 2006.229.21:19:50.24#ibcon#read 5, iclass 29, count 0 2006.229.21:19:50.24#ibcon#about to read 6, iclass 29, count 0 2006.229.21:19:50.24#ibcon#read 6, iclass 29, count 0 2006.229.21:19:50.24#ibcon#end of sib2, iclass 29, count 0 2006.229.21:19:50.24#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:19:50.24#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:19:50.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:19:50.24#ibcon#*before write, iclass 29, count 0 2006.229.21:19:50.24#ibcon#enter sib2, iclass 29, count 0 2006.229.21:19:50.24#ibcon#flushed, iclass 29, count 0 2006.229.21:19:50.24#ibcon#about to write, iclass 29, count 0 2006.229.21:19:50.24#ibcon#wrote, iclass 29, count 0 2006.229.21:19:50.24#ibcon#about to read 3, iclass 29, count 0 2006.229.21:19:50.28#ibcon#read 3, iclass 29, count 0 2006.229.21:19:50.28#ibcon#about to read 4, iclass 29, count 0 2006.229.21:19:50.28#ibcon#read 4, iclass 29, count 0 2006.229.21:19:50.28#ibcon#about to read 5, iclass 29, count 0 2006.229.21:19:50.28#ibcon#read 5, iclass 29, count 0 2006.229.21:19:50.28#ibcon#about to read 6, iclass 29, count 0 2006.229.21:19:50.28#ibcon#read 6, iclass 29, count 0 2006.229.21:19:50.28#ibcon#end of sib2, iclass 29, count 0 2006.229.21:19:50.28#ibcon#*after write, iclass 29, count 0 2006.229.21:19:50.28#ibcon#*before return 0, iclass 29, count 0 2006.229.21:19:50.28#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:50.28#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:19:50.28#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:19:50.28#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:19:50.28$vck44/vb=8,4 2006.229.21:19:50.28#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.21:19:50.28#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.21:19:50.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:19:50.28#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:50.34#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:50.34#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:50.34#ibcon#enter wrdev, iclass 31, count 2 2006.229.21:19:50.34#ibcon#first serial, iclass 31, count 2 2006.229.21:19:50.34#ibcon#enter sib2, iclass 31, count 2 2006.229.21:19:50.34#ibcon#flushed, iclass 31, count 2 2006.229.21:19:50.34#ibcon#about to write, iclass 31, count 2 2006.229.21:19:50.34#ibcon#wrote, iclass 31, count 2 2006.229.21:19:50.34#ibcon#about to read 3, iclass 31, count 2 2006.229.21:19:50.36#ibcon#read 3, iclass 31, count 2 2006.229.21:19:50.36#ibcon#about to read 4, iclass 31, count 2 2006.229.21:19:50.36#ibcon#read 4, iclass 31, count 2 2006.229.21:19:50.36#ibcon#about to read 5, iclass 31, count 2 2006.229.21:19:50.36#ibcon#read 5, iclass 31, count 2 2006.229.21:19:50.36#ibcon#about to read 6, iclass 31, count 2 2006.229.21:19:50.36#ibcon#read 6, iclass 31, count 2 2006.229.21:19:50.36#ibcon#end of sib2, iclass 31, count 2 2006.229.21:19:50.36#ibcon#*mode == 0, iclass 31, count 2 2006.229.21:19:50.36#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.21:19:50.36#ibcon#[27=AT08-04\r\n] 2006.229.21:19:50.36#ibcon#*before write, iclass 31, count 2 2006.229.21:19:50.36#ibcon#enter sib2, iclass 31, count 2 2006.229.21:19:50.36#ibcon#flushed, iclass 31, count 2 2006.229.21:19:50.36#ibcon#about to write, iclass 31, count 2 2006.229.21:19:50.36#ibcon#wrote, iclass 31, count 2 2006.229.21:19:50.36#ibcon#about to read 3, iclass 31, count 2 2006.229.21:19:50.39#ibcon#read 3, iclass 31, count 2 2006.229.21:19:50.39#ibcon#about to read 4, iclass 31, count 2 2006.229.21:19:50.39#ibcon#read 4, iclass 31, count 2 2006.229.21:19:50.39#ibcon#about to read 5, iclass 31, count 2 2006.229.21:19:50.39#ibcon#read 5, iclass 31, count 2 2006.229.21:19:50.39#ibcon#about to read 6, iclass 31, count 2 2006.229.21:19:50.39#ibcon#read 6, iclass 31, count 2 2006.229.21:19:50.39#ibcon#end of sib2, iclass 31, count 2 2006.229.21:19:50.39#ibcon#*after write, iclass 31, count 2 2006.229.21:19:50.39#ibcon#*before return 0, iclass 31, count 2 2006.229.21:19:50.39#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:50.39#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:19:50.39#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.21:19:50.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:19:50.39#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:50.51#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:50.51#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:50.51#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:19:50.51#ibcon#first serial, iclass 31, count 0 2006.229.21:19:50.51#ibcon#enter sib2, iclass 31, count 0 2006.229.21:19:50.51#ibcon#flushed, iclass 31, count 0 2006.229.21:19:50.51#ibcon#about to write, iclass 31, count 0 2006.229.21:19:50.51#ibcon#wrote, iclass 31, count 0 2006.229.21:19:50.51#ibcon#about to read 3, iclass 31, count 0 2006.229.21:19:50.53#ibcon#read 3, iclass 31, count 0 2006.229.21:19:50.53#ibcon#about to read 4, iclass 31, count 0 2006.229.21:19:50.53#ibcon#read 4, iclass 31, count 0 2006.229.21:19:50.53#ibcon#about to read 5, iclass 31, count 0 2006.229.21:19:50.53#ibcon#read 5, iclass 31, count 0 2006.229.21:19:50.53#ibcon#about to read 6, iclass 31, count 0 2006.229.21:19:50.53#ibcon#read 6, iclass 31, count 0 2006.229.21:19:50.53#ibcon#end of sib2, iclass 31, count 0 2006.229.21:19:50.53#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:19:50.53#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:19:50.53#ibcon#[27=USB\r\n] 2006.229.21:19:50.53#ibcon#*before write, iclass 31, count 0 2006.229.21:19:50.53#ibcon#enter sib2, iclass 31, count 0 2006.229.21:19:50.53#ibcon#flushed, iclass 31, count 0 2006.229.21:19:50.53#ibcon#about to write, iclass 31, count 0 2006.229.21:19:50.53#ibcon#wrote, iclass 31, count 0 2006.229.21:19:50.53#ibcon#about to read 3, iclass 31, count 0 2006.229.21:19:50.56#ibcon#read 3, iclass 31, count 0 2006.229.21:19:50.56#ibcon#about to read 4, iclass 31, count 0 2006.229.21:19:50.56#ibcon#read 4, iclass 31, count 0 2006.229.21:19:50.56#ibcon#about to read 5, iclass 31, count 0 2006.229.21:19:50.56#ibcon#read 5, iclass 31, count 0 2006.229.21:19:50.56#ibcon#about to read 6, iclass 31, count 0 2006.229.21:19:50.56#ibcon#read 6, iclass 31, count 0 2006.229.21:19:50.56#ibcon#end of sib2, iclass 31, count 0 2006.229.21:19:50.56#ibcon#*after write, iclass 31, count 0 2006.229.21:19:50.56#ibcon#*before return 0, iclass 31, count 0 2006.229.21:19:50.56#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:50.56#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:19:50.56#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:19:50.56#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:19:50.56$vck44/vabw=wide 2006.229.21:19:50.56#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.21:19:50.56#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.21:19:50.56#ibcon#ireg 8 cls_cnt 0 2006.229.21:19:50.56#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:19:50.56#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:19:50.56#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:19:50.56#ibcon#enter wrdev, iclass 33, count 0 2006.229.21:19:50.56#ibcon#first serial, iclass 33, count 0 2006.229.21:19:50.56#ibcon#enter sib2, iclass 33, count 0 2006.229.21:19:50.56#ibcon#flushed, iclass 33, count 0 2006.229.21:19:50.56#ibcon#about to write, iclass 33, count 0 2006.229.21:19:50.56#ibcon#wrote, iclass 33, count 0 2006.229.21:19:50.56#ibcon#about to read 3, iclass 33, count 0 2006.229.21:19:50.58#ibcon#read 3, iclass 33, count 0 2006.229.21:19:50.58#ibcon#about to read 4, iclass 33, count 0 2006.229.21:19:50.58#ibcon#read 4, iclass 33, count 0 2006.229.21:19:50.58#ibcon#about to read 5, iclass 33, count 0 2006.229.21:19:50.58#ibcon#read 5, iclass 33, count 0 2006.229.21:19:50.58#ibcon#about to read 6, iclass 33, count 0 2006.229.21:19:50.58#ibcon#read 6, iclass 33, count 0 2006.229.21:19:50.58#ibcon#end of sib2, iclass 33, count 0 2006.229.21:19:50.58#ibcon#*mode == 0, iclass 33, count 0 2006.229.21:19:50.58#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.21:19:50.58#ibcon#[25=BW32\r\n] 2006.229.21:19:50.58#ibcon#*before write, iclass 33, count 0 2006.229.21:19:50.58#ibcon#enter sib2, iclass 33, count 0 2006.229.21:19:50.58#ibcon#flushed, iclass 33, count 0 2006.229.21:19:50.58#ibcon#about to write, iclass 33, count 0 2006.229.21:19:50.58#ibcon#wrote, iclass 33, count 0 2006.229.21:19:50.58#ibcon#about to read 3, iclass 33, count 0 2006.229.21:19:50.61#ibcon#read 3, iclass 33, count 0 2006.229.21:19:50.61#ibcon#about to read 4, iclass 33, count 0 2006.229.21:19:50.61#ibcon#read 4, iclass 33, count 0 2006.229.21:19:50.61#ibcon#about to read 5, iclass 33, count 0 2006.229.21:19:50.61#ibcon#read 5, iclass 33, count 0 2006.229.21:19:50.61#ibcon#about to read 6, iclass 33, count 0 2006.229.21:19:50.61#ibcon#read 6, iclass 33, count 0 2006.229.21:19:50.61#ibcon#end of sib2, iclass 33, count 0 2006.229.21:19:50.61#ibcon#*after write, iclass 33, count 0 2006.229.21:19:50.61#ibcon#*before return 0, iclass 33, count 0 2006.229.21:19:50.61#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:19:50.61#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:19:50.61#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.21:19:50.61#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.21:19:50.61$vck44/vbbw=wide 2006.229.21:19:50.61#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.21:19:50.61#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.21:19:50.61#ibcon#ireg 8 cls_cnt 0 2006.229.21:19:50.61#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:19:50.68#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:19:50.68#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:19:50.68#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:19:50.68#ibcon#first serial, iclass 35, count 0 2006.229.21:19:50.68#ibcon#enter sib2, iclass 35, count 0 2006.229.21:19:50.68#ibcon#flushed, iclass 35, count 0 2006.229.21:19:50.68#ibcon#about to write, iclass 35, count 0 2006.229.21:19:50.68#ibcon#wrote, iclass 35, count 0 2006.229.21:19:50.68#ibcon#about to read 3, iclass 35, count 0 2006.229.21:19:50.70#ibcon#read 3, iclass 35, count 0 2006.229.21:19:50.70#ibcon#about to read 4, iclass 35, count 0 2006.229.21:19:50.70#ibcon#read 4, iclass 35, count 0 2006.229.21:19:50.70#ibcon#about to read 5, iclass 35, count 0 2006.229.21:19:50.70#ibcon#read 5, iclass 35, count 0 2006.229.21:19:50.70#ibcon#about to read 6, iclass 35, count 0 2006.229.21:19:50.70#ibcon#read 6, iclass 35, count 0 2006.229.21:19:50.70#ibcon#end of sib2, iclass 35, count 0 2006.229.21:19:50.70#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:19:50.70#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:19:50.70#ibcon#[27=BW32\r\n] 2006.229.21:19:50.70#ibcon#*before write, iclass 35, count 0 2006.229.21:19:50.70#ibcon#enter sib2, iclass 35, count 0 2006.229.21:19:50.70#ibcon#flushed, iclass 35, count 0 2006.229.21:19:50.70#ibcon#about to write, iclass 35, count 0 2006.229.21:19:50.70#ibcon#wrote, iclass 35, count 0 2006.229.21:19:50.70#ibcon#about to read 3, iclass 35, count 0 2006.229.21:19:50.73#ibcon#read 3, iclass 35, count 0 2006.229.21:19:50.73#ibcon#about to read 4, iclass 35, count 0 2006.229.21:19:50.73#ibcon#read 4, iclass 35, count 0 2006.229.21:19:50.73#ibcon#about to read 5, iclass 35, count 0 2006.229.21:19:50.73#ibcon#read 5, iclass 35, count 0 2006.229.21:19:50.73#ibcon#about to read 6, iclass 35, count 0 2006.229.21:19:50.73#ibcon#read 6, iclass 35, count 0 2006.229.21:19:50.73#ibcon#end of sib2, iclass 35, count 0 2006.229.21:19:50.73#ibcon#*after write, iclass 35, count 0 2006.229.21:19:50.73#ibcon#*before return 0, iclass 35, count 0 2006.229.21:19:50.73#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:19:50.73#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:19:50.73#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:19:50.73#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:19:50.73$setupk4/ifdk4 2006.229.21:19:50.73$ifdk4/lo= 2006.229.21:19:50.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:19:50.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:19:50.73$ifdk4/patch= 2006.229.21:19:50.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:19:50.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:19:50.73$setupk4/!*+20s 2006.229.21:19:57.99#abcon#<5=/08 1.3 4.7 26.781001002.1\r\n> 2006.229.21:19:58.01#abcon#{5=INTERFACE CLEAR} 2006.229.21:19:58.07#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:20:04.14#trakl#Source acquired 2006.229.21:20:04.14#flagr#flagr/antenna,acquired 2006.229.21:20:05.24$setupk4/"tpicd 2006.229.21:20:05.24$setupk4/echo=off 2006.229.21:20:05.24$setupk4/xlog=off 2006.229.21:20:05.24:!2006.229.21:21:11 2006.229.21:21:11.00:preob 2006.229.21:21:11.13/onsource/TRACKING 2006.229.21:21:11.13:!2006.229.21:21:21 2006.229.21:21:21.00:"tape 2006.229.21:21:21.00:"st=record 2006.229.21:21:21.00:data_valid=on 2006.229.21:21:21.00:midob 2006.229.21:21:22.13/onsource/TRACKING 2006.229.21:21:22.13/wx/26.82,1002.1,100 2006.229.21:21:22.22/cable/+6.4212E-03 2006.229.21:21:23.31/va/01,08,usb,yes,30,33 2006.229.21:21:23.31/va/02,07,usb,yes,33,34 2006.229.21:21:23.31/va/03,06,usb,yes,41,43 2006.229.21:21:23.31/va/04,07,usb,yes,34,36 2006.229.21:21:23.31/va/05,04,usb,yes,30,31 2006.229.21:21:23.31/va/06,04,usb,yes,34,34 2006.229.21:21:23.31/va/07,05,usb,yes,30,31 2006.229.21:21:23.31/va/08,06,usb,yes,22,27 2006.229.21:21:23.54/valo/01,524.99,yes,locked 2006.229.21:21:23.54/valo/02,534.99,yes,locked 2006.229.21:21:23.54/valo/03,564.99,yes,locked 2006.229.21:21:23.54/valo/04,624.99,yes,locked 2006.229.21:21:23.54/valo/05,734.99,yes,locked 2006.229.21:21:23.54/valo/06,814.99,yes,locked 2006.229.21:21:23.54/valo/07,864.99,yes,locked 2006.229.21:21:23.54/valo/08,884.99,yes,locked 2006.229.21:21:24.63/vb/01,04,usb,yes,31,29 2006.229.21:21:24.63/vb/02,04,usb,yes,34,34 2006.229.21:21:24.63/vb/03,04,usb,yes,31,34 2006.229.21:21:24.63/vb/04,04,usb,yes,35,34 2006.229.21:21:24.63/vb/05,04,usb,yes,27,30 2006.229.21:21:24.63/vb/06,04,usb,yes,32,28 2006.229.21:21:24.63/vb/07,04,usb,yes,32,32 2006.229.21:21:24.63/vb/08,04,usb,yes,29,33 2006.229.21:21:24.86/vblo/01,629.99,yes,locked 2006.229.21:21:24.86/vblo/02,634.99,yes,locked 2006.229.21:21:24.86/vblo/03,649.99,yes,locked 2006.229.21:21:24.86/vblo/04,679.99,yes,locked 2006.229.21:21:24.86/vblo/05,709.99,yes,locked 2006.229.21:21:24.86/vblo/06,719.99,yes,locked 2006.229.21:21:24.86/vblo/07,734.99,yes,locked 2006.229.21:21:24.86/vblo/08,744.99,yes,locked 2006.229.21:21:25.01/vabw/8 2006.229.21:21:25.16/vbbw/8 2006.229.21:21:25.25/xfe/off,on,12.5 2006.229.21:21:25.62/ifatt/23,28,28,28 2006.229.21:21:26.08/fmout-gps/S +4.53E-07 2006.229.21:21:26.11:!2006.229.21:22:31 2006.229.21:22:31.00:data_valid=off 2006.229.21:22:31.00:"et 2006.229.21:22:31.00:!+3s 2006.229.21:22:34.01:"tape 2006.229.21:22:34.01:postob 2006.229.21:22:34.18/cable/+6.4226E-03 2006.229.21:22:34.18/wx/26.85,1002.1,100 2006.229.21:22:35.08/fmout-gps/S +4.54E-07 2006.229.21:22:35.08:scan_name=229-2125,jd0608,50 2006.229.21:22:35.08:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.21:22:36.14#flagr#flagr/antenna,new-source 2006.229.21:22:36.14:checkk5 2006.229.21:22:36.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:22:36.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:22:37.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:22:37.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:22:38.12/chk_obsdata//k5ts1/T2292121??a.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.21:22:38.54/chk_obsdata//k5ts2/T2292121??b.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.21:22:38.95/chk_obsdata//k5ts3/T2292121??c.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.21:22:39.34/chk_obsdata//k5ts4/T2292121??d.dat file size is correct (nominal:280MB, actual:280MB). 2006.229.21:22:40.06/k5log//k5ts1_log_newline 2006.229.21:22:40.78/k5log//k5ts2_log_newline 2006.229.21:22:41.49/k5log//k5ts3_log_newline 2006.229.21:22:42.20/k5log//k5ts4_log_newline 2006.229.21:22:42.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:22:42.23:setupk4=1 2006.229.21:22:42.23$setupk4/echo=on 2006.229.21:22:42.23$setupk4/pcalon 2006.229.21:22:42.23$pcalon/"no phase cal control is implemented here 2006.229.21:22:42.23$setupk4/"tpicd=stop 2006.229.21:22:42.23$setupk4/"rec=synch_on 2006.229.21:22:42.23$setupk4/"rec_mode=128 2006.229.21:22:42.23$setupk4/!* 2006.229.21:22:42.23$setupk4/recpk4 2006.229.21:22:42.23$recpk4/recpatch= 2006.229.21:22:42.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:22:42.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:22:42.23$setupk4/vck44 2006.229.21:22:42.23$vck44/valo=1,524.99 2006.229.21:22:42.23#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.21:22:42.23#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.21:22:42.23#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:42.23#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:42.23#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:42.23#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:42.23#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:22:42.23#ibcon#first serial, iclass 36, count 0 2006.229.21:22:42.23#ibcon#enter sib2, iclass 36, count 0 2006.229.21:22:42.23#ibcon#flushed, iclass 36, count 0 2006.229.21:22:42.23#ibcon#about to write, iclass 36, count 0 2006.229.21:22:42.23#ibcon#wrote, iclass 36, count 0 2006.229.21:22:42.23#ibcon#about to read 3, iclass 36, count 0 2006.229.21:22:42.25#ibcon#read 3, iclass 36, count 0 2006.229.21:22:42.25#ibcon#about to read 4, iclass 36, count 0 2006.229.21:22:42.25#ibcon#read 4, iclass 36, count 0 2006.229.21:22:42.25#ibcon#about to read 5, iclass 36, count 0 2006.229.21:22:42.25#ibcon#read 5, iclass 36, count 0 2006.229.21:22:42.25#ibcon#about to read 6, iclass 36, count 0 2006.229.21:22:42.25#ibcon#read 6, iclass 36, count 0 2006.229.21:22:42.25#ibcon#end of sib2, iclass 36, count 0 2006.229.21:22:42.25#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:22:42.25#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:22:42.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:22:42.25#ibcon#*before write, iclass 36, count 0 2006.229.21:22:42.25#ibcon#enter sib2, iclass 36, count 0 2006.229.21:22:42.25#ibcon#flushed, iclass 36, count 0 2006.229.21:22:42.25#ibcon#about to write, iclass 36, count 0 2006.229.21:22:42.25#ibcon#wrote, iclass 36, count 0 2006.229.21:22:42.25#ibcon#about to read 3, iclass 36, count 0 2006.229.21:22:42.30#ibcon#read 3, iclass 36, count 0 2006.229.21:22:42.30#ibcon#about to read 4, iclass 36, count 0 2006.229.21:22:42.30#ibcon#read 4, iclass 36, count 0 2006.229.21:22:42.30#ibcon#about to read 5, iclass 36, count 0 2006.229.21:22:42.30#ibcon#read 5, iclass 36, count 0 2006.229.21:22:42.30#ibcon#about to read 6, iclass 36, count 0 2006.229.21:22:42.30#ibcon#read 6, iclass 36, count 0 2006.229.21:22:42.30#ibcon#end of sib2, iclass 36, count 0 2006.229.21:22:42.30#ibcon#*after write, iclass 36, count 0 2006.229.21:22:42.30#ibcon#*before return 0, iclass 36, count 0 2006.229.21:22:42.30#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:42.30#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:42.30#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:22:42.30#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:22:42.30$vck44/va=1,8 2006.229.21:22:42.30#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.21:22:42.30#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.21:22:42.30#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:42.30#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:42.30#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:42.30#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:42.30#ibcon#enter wrdev, iclass 38, count 2 2006.229.21:22:42.30#ibcon#first serial, iclass 38, count 2 2006.229.21:22:42.30#ibcon#enter sib2, iclass 38, count 2 2006.229.21:22:42.30#ibcon#flushed, iclass 38, count 2 2006.229.21:22:42.30#ibcon#about to write, iclass 38, count 2 2006.229.21:22:42.30#ibcon#wrote, iclass 38, count 2 2006.229.21:22:42.30#ibcon#about to read 3, iclass 38, count 2 2006.229.21:22:42.32#ibcon#read 3, iclass 38, count 2 2006.229.21:22:42.32#ibcon#about to read 4, iclass 38, count 2 2006.229.21:22:42.32#ibcon#read 4, iclass 38, count 2 2006.229.21:22:42.32#ibcon#about to read 5, iclass 38, count 2 2006.229.21:22:42.32#ibcon#read 5, iclass 38, count 2 2006.229.21:22:42.32#ibcon#about to read 6, iclass 38, count 2 2006.229.21:22:42.32#ibcon#read 6, iclass 38, count 2 2006.229.21:22:42.32#ibcon#end of sib2, iclass 38, count 2 2006.229.21:22:42.32#ibcon#*mode == 0, iclass 38, count 2 2006.229.21:22:42.32#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.21:22:42.32#ibcon#[25=AT01-08\r\n] 2006.229.21:22:42.32#ibcon#*before write, iclass 38, count 2 2006.229.21:22:42.32#ibcon#enter sib2, iclass 38, count 2 2006.229.21:22:42.32#ibcon#flushed, iclass 38, count 2 2006.229.21:22:42.32#ibcon#about to write, iclass 38, count 2 2006.229.21:22:42.32#ibcon#wrote, iclass 38, count 2 2006.229.21:22:42.32#ibcon#about to read 3, iclass 38, count 2 2006.229.21:22:42.35#ibcon#read 3, iclass 38, count 2 2006.229.21:22:42.35#ibcon#about to read 4, iclass 38, count 2 2006.229.21:22:42.35#ibcon#read 4, iclass 38, count 2 2006.229.21:22:42.35#ibcon#about to read 5, iclass 38, count 2 2006.229.21:22:42.35#ibcon#read 5, iclass 38, count 2 2006.229.21:22:42.35#ibcon#about to read 6, iclass 38, count 2 2006.229.21:22:42.35#ibcon#read 6, iclass 38, count 2 2006.229.21:22:42.35#ibcon#end of sib2, iclass 38, count 2 2006.229.21:22:42.35#ibcon#*after write, iclass 38, count 2 2006.229.21:22:42.35#ibcon#*before return 0, iclass 38, count 2 2006.229.21:22:42.35#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:42.35#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:42.35#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.21:22:42.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:42.35#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:42.47#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:42.47#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:42.47#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:22:42.47#ibcon#first serial, iclass 38, count 0 2006.229.21:22:42.47#ibcon#enter sib2, iclass 38, count 0 2006.229.21:22:42.47#ibcon#flushed, iclass 38, count 0 2006.229.21:22:42.47#ibcon#about to write, iclass 38, count 0 2006.229.21:22:42.47#ibcon#wrote, iclass 38, count 0 2006.229.21:22:42.47#ibcon#about to read 3, iclass 38, count 0 2006.229.21:22:42.49#ibcon#read 3, iclass 38, count 0 2006.229.21:22:42.49#ibcon#about to read 4, iclass 38, count 0 2006.229.21:22:42.49#ibcon#read 4, iclass 38, count 0 2006.229.21:22:42.49#ibcon#about to read 5, iclass 38, count 0 2006.229.21:22:42.49#ibcon#read 5, iclass 38, count 0 2006.229.21:22:42.49#ibcon#about to read 6, iclass 38, count 0 2006.229.21:22:42.49#ibcon#read 6, iclass 38, count 0 2006.229.21:22:42.49#ibcon#end of sib2, iclass 38, count 0 2006.229.21:22:42.49#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:22:42.49#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:22:42.49#ibcon#[25=USB\r\n] 2006.229.21:22:42.49#ibcon#*before write, iclass 38, count 0 2006.229.21:22:42.49#ibcon#enter sib2, iclass 38, count 0 2006.229.21:22:42.49#ibcon#flushed, iclass 38, count 0 2006.229.21:22:42.49#ibcon#about to write, iclass 38, count 0 2006.229.21:22:42.49#ibcon#wrote, iclass 38, count 0 2006.229.21:22:42.49#ibcon#about to read 3, iclass 38, count 0 2006.229.21:22:42.52#ibcon#read 3, iclass 38, count 0 2006.229.21:22:42.52#ibcon#about to read 4, iclass 38, count 0 2006.229.21:22:42.52#ibcon#read 4, iclass 38, count 0 2006.229.21:22:42.52#ibcon#about to read 5, iclass 38, count 0 2006.229.21:22:42.52#ibcon#read 5, iclass 38, count 0 2006.229.21:22:42.52#ibcon#about to read 6, iclass 38, count 0 2006.229.21:22:42.52#ibcon#read 6, iclass 38, count 0 2006.229.21:22:42.52#ibcon#end of sib2, iclass 38, count 0 2006.229.21:22:42.52#ibcon#*after write, iclass 38, count 0 2006.229.21:22:42.52#ibcon#*before return 0, iclass 38, count 0 2006.229.21:22:42.52#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:42.52#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:42.52#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:22:42.52#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:22:42.52$vck44/valo=2,534.99 2006.229.21:22:42.52#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.21:22:42.52#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.21:22:42.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:42.52#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:42.52#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:42.52#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:42.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:22:42.52#ibcon#first serial, iclass 40, count 0 2006.229.21:22:42.52#ibcon#enter sib2, iclass 40, count 0 2006.229.21:22:42.52#ibcon#flushed, iclass 40, count 0 2006.229.21:22:42.52#ibcon#about to write, iclass 40, count 0 2006.229.21:22:42.52#ibcon#wrote, iclass 40, count 0 2006.229.21:22:42.52#ibcon#about to read 3, iclass 40, count 0 2006.229.21:22:42.54#ibcon#read 3, iclass 40, count 0 2006.229.21:22:42.54#ibcon#about to read 4, iclass 40, count 0 2006.229.21:22:42.54#ibcon#read 4, iclass 40, count 0 2006.229.21:22:42.54#ibcon#about to read 5, iclass 40, count 0 2006.229.21:22:42.54#ibcon#read 5, iclass 40, count 0 2006.229.21:22:42.54#ibcon#about to read 6, iclass 40, count 0 2006.229.21:22:42.54#ibcon#read 6, iclass 40, count 0 2006.229.21:22:42.54#ibcon#end of sib2, iclass 40, count 0 2006.229.21:22:42.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:22:42.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:22:42.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:22:42.54#ibcon#*before write, iclass 40, count 0 2006.229.21:22:42.54#ibcon#enter sib2, iclass 40, count 0 2006.229.21:22:42.54#ibcon#flushed, iclass 40, count 0 2006.229.21:22:42.54#ibcon#about to write, iclass 40, count 0 2006.229.21:22:42.54#ibcon#wrote, iclass 40, count 0 2006.229.21:22:42.54#ibcon#about to read 3, iclass 40, count 0 2006.229.21:22:42.58#ibcon#read 3, iclass 40, count 0 2006.229.21:22:42.58#ibcon#about to read 4, iclass 40, count 0 2006.229.21:22:42.58#ibcon#read 4, iclass 40, count 0 2006.229.21:22:42.58#ibcon#about to read 5, iclass 40, count 0 2006.229.21:22:42.58#ibcon#read 5, iclass 40, count 0 2006.229.21:22:42.58#ibcon#about to read 6, iclass 40, count 0 2006.229.21:22:42.58#ibcon#read 6, iclass 40, count 0 2006.229.21:22:42.58#ibcon#end of sib2, iclass 40, count 0 2006.229.21:22:42.58#ibcon#*after write, iclass 40, count 0 2006.229.21:22:42.58#ibcon#*before return 0, iclass 40, count 0 2006.229.21:22:42.58#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:42.58#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:42.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:22:42.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:22:42.58$vck44/va=2,7 2006.229.21:22:42.58#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.21:22:42.58#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.21:22:42.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:42.58#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:42.64#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:42.64#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:42.64#ibcon#enter wrdev, iclass 4, count 2 2006.229.21:22:42.64#ibcon#first serial, iclass 4, count 2 2006.229.21:22:42.64#ibcon#enter sib2, iclass 4, count 2 2006.229.21:22:42.64#ibcon#flushed, iclass 4, count 2 2006.229.21:22:42.64#ibcon#about to write, iclass 4, count 2 2006.229.21:22:42.64#ibcon#wrote, iclass 4, count 2 2006.229.21:22:42.64#ibcon#about to read 3, iclass 4, count 2 2006.229.21:22:42.66#ibcon#read 3, iclass 4, count 2 2006.229.21:22:42.66#ibcon#about to read 4, iclass 4, count 2 2006.229.21:22:42.66#ibcon#read 4, iclass 4, count 2 2006.229.21:22:42.66#ibcon#about to read 5, iclass 4, count 2 2006.229.21:22:42.66#ibcon#read 5, iclass 4, count 2 2006.229.21:22:42.66#ibcon#about to read 6, iclass 4, count 2 2006.229.21:22:42.66#ibcon#read 6, iclass 4, count 2 2006.229.21:22:42.66#ibcon#end of sib2, iclass 4, count 2 2006.229.21:22:42.66#ibcon#*mode == 0, iclass 4, count 2 2006.229.21:22:42.66#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.21:22:42.66#ibcon#[25=AT02-07\r\n] 2006.229.21:22:42.66#ibcon#*before write, iclass 4, count 2 2006.229.21:22:42.66#ibcon#enter sib2, iclass 4, count 2 2006.229.21:22:42.66#ibcon#flushed, iclass 4, count 2 2006.229.21:22:42.66#ibcon#about to write, iclass 4, count 2 2006.229.21:22:42.66#ibcon#wrote, iclass 4, count 2 2006.229.21:22:42.66#ibcon#about to read 3, iclass 4, count 2 2006.229.21:22:42.69#ibcon#read 3, iclass 4, count 2 2006.229.21:22:42.69#ibcon#about to read 4, iclass 4, count 2 2006.229.21:22:42.69#ibcon#read 4, iclass 4, count 2 2006.229.21:22:42.69#ibcon#about to read 5, iclass 4, count 2 2006.229.21:22:42.69#ibcon#read 5, iclass 4, count 2 2006.229.21:22:42.69#ibcon#about to read 6, iclass 4, count 2 2006.229.21:22:42.69#ibcon#read 6, iclass 4, count 2 2006.229.21:22:42.69#ibcon#end of sib2, iclass 4, count 2 2006.229.21:22:42.69#ibcon#*after write, iclass 4, count 2 2006.229.21:22:42.69#ibcon#*before return 0, iclass 4, count 2 2006.229.21:22:42.69#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:42.69#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:42.69#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.21:22:42.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:42.69#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:42.81#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:42.81#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:42.81#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:22:42.81#ibcon#first serial, iclass 4, count 0 2006.229.21:22:42.81#ibcon#enter sib2, iclass 4, count 0 2006.229.21:22:42.81#ibcon#flushed, iclass 4, count 0 2006.229.21:22:42.81#ibcon#about to write, iclass 4, count 0 2006.229.21:22:42.81#ibcon#wrote, iclass 4, count 0 2006.229.21:22:42.81#ibcon#about to read 3, iclass 4, count 0 2006.229.21:22:42.83#ibcon#read 3, iclass 4, count 0 2006.229.21:22:42.83#ibcon#about to read 4, iclass 4, count 0 2006.229.21:22:42.83#ibcon#read 4, iclass 4, count 0 2006.229.21:22:42.83#ibcon#about to read 5, iclass 4, count 0 2006.229.21:22:42.83#ibcon#read 5, iclass 4, count 0 2006.229.21:22:42.83#ibcon#about to read 6, iclass 4, count 0 2006.229.21:22:42.83#ibcon#read 6, iclass 4, count 0 2006.229.21:22:42.83#ibcon#end of sib2, iclass 4, count 0 2006.229.21:22:42.83#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:22:42.83#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:22:42.83#ibcon#[25=USB\r\n] 2006.229.21:22:42.83#ibcon#*before write, iclass 4, count 0 2006.229.21:22:42.83#ibcon#enter sib2, iclass 4, count 0 2006.229.21:22:42.83#ibcon#flushed, iclass 4, count 0 2006.229.21:22:42.83#ibcon#about to write, iclass 4, count 0 2006.229.21:22:42.83#ibcon#wrote, iclass 4, count 0 2006.229.21:22:42.83#ibcon#about to read 3, iclass 4, count 0 2006.229.21:22:42.86#ibcon#read 3, iclass 4, count 0 2006.229.21:22:42.86#ibcon#about to read 4, iclass 4, count 0 2006.229.21:22:42.86#ibcon#read 4, iclass 4, count 0 2006.229.21:22:42.86#ibcon#about to read 5, iclass 4, count 0 2006.229.21:22:42.86#ibcon#read 5, iclass 4, count 0 2006.229.21:22:42.86#ibcon#about to read 6, iclass 4, count 0 2006.229.21:22:42.86#ibcon#read 6, iclass 4, count 0 2006.229.21:22:42.86#ibcon#end of sib2, iclass 4, count 0 2006.229.21:22:42.86#ibcon#*after write, iclass 4, count 0 2006.229.21:22:42.86#ibcon#*before return 0, iclass 4, count 0 2006.229.21:22:42.86#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:42.86#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:42.86#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:22:42.86#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:22:42.86$vck44/valo=3,564.99 2006.229.21:22:42.86#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.21:22:42.86#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.21:22:42.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:42.86#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:42.86#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:42.86#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:42.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:22:42.86#ibcon#first serial, iclass 6, count 0 2006.229.21:22:42.86#ibcon#enter sib2, iclass 6, count 0 2006.229.21:22:42.86#ibcon#flushed, iclass 6, count 0 2006.229.21:22:42.86#ibcon#about to write, iclass 6, count 0 2006.229.21:22:42.86#ibcon#wrote, iclass 6, count 0 2006.229.21:22:42.86#ibcon#about to read 3, iclass 6, count 0 2006.229.21:22:42.88#ibcon#read 3, iclass 6, count 0 2006.229.21:22:42.88#ibcon#about to read 4, iclass 6, count 0 2006.229.21:22:42.88#ibcon#read 4, iclass 6, count 0 2006.229.21:22:42.88#ibcon#about to read 5, iclass 6, count 0 2006.229.21:22:42.88#ibcon#read 5, iclass 6, count 0 2006.229.21:22:42.88#ibcon#about to read 6, iclass 6, count 0 2006.229.21:22:42.88#ibcon#read 6, iclass 6, count 0 2006.229.21:22:42.88#ibcon#end of sib2, iclass 6, count 0 2006.229.21:22:42.88#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:22:42.88#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:22:42.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:22:42.88#ibcon#*before write, iclass 6, count 0 2006.229.21:22:42.88#ibcon#enter sib2, iclass 6, count 0 2006.229.21:22:42.88#ibcon#flushed, iclass 6, count 0 2006.229.21:22:42.88#ibcon#about to write, iclass 6, count 0 2006.229.21:22:42.88#ibcon#wrote, iclass 6, count 0 2006.229.21:22:42.88#ibcon#about to read 3, iclass 6, count 0 2006.229.21:22:42.92#ibcon#read 3, iclass 6, count 0 2006.229.21:22:42.92#ibcon#about to read 4, iclass 6, count 0 2006.229.21:22:42.92#ibcon#read 4, iclass 6, count 0 2006.229.21:22:42.92#ibcon#about to read 5, iclass 6, count 0 2006.229.21:22:42.92#ibcon#read 5, iclass 6, count 0 2006.229.21:22:42.92#ibcon#about to read 6, iclass 6, count 0 2006.229.21:22:42.92#ibcon#read 6, iclass 6, count 0 2006.229.21:22:42.92#ibcon#end of sib2, iclass 6, count 0 2006.229.21:22:42.92#ibcon#*after write, iclass 6, count 0 2006.229.21:22:42.92#ibcon#*before return 0, iclass 6, count 0 2006.229.21:22:42.92#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:42.92#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:42.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:22:42.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:22:42.92$vck44/va=3,6 2006.229.21:22:42.92#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.21:22:42.92#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.21:22:42.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:42.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:42.98#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:42.98#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:42.98#ibcon#enter wrdev, iclass 10, count 2 2006.229.21:22:42.98#ibcon#first serial, iclass 10, count 2 2006.229.21:22:42.98#ibcon#enter sib2, iclass 10, count 2 2006.229.21:22:42.98#ibcon#flushed, iclass 10, count 2 2006.229.21:22:42.98#ibcon#about to write, iclass 10, count 2 2006.229.21:22:42.98#ibcon#wrote, iclass 10, count 2 2006.229.21:22:42.98#ibcon#about to read 3, iclass 10, count 2 2006.229.21:22:43.00#ibcon#read 3, iclass 10, count 2 2006.229.21:22:43.00#ibcon#about to read 4, iclass 10, count 2 2006.229.21:22:43.00#ibcon#read 4, iclass 10, count 2 2006.229.21:22:43.00#ibcon#about to read 5, iclass 10, count 2 2006.229.21:22:43.00#ibcon#read 5, iclass 10, count 2 2006.229.21:22:43.00#ibcon#about to read 6, iclass 10, count 2 2006.229.21:22:43.00#ibcon#read 6, iclass 10, count 2 2006.229.21:22:43.00#ibcon#end of sib2, iclass 10, count 2 2006.229.21:22:43.00#ibcon#*mode == 0, iclass 10, count 2 2006.229.21:22:43.00#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.21:22:43.00#ibcon#[25=AT03-06\r\n] 2006.229.21:22:43.00#ibcon#*before write, iclass 10, count 2 2006.229.21:22:43.00#ibcon#enter sib2, iclass 10, count 2 2006.229.21:22:43.00#ibcon#flushed, iclass 10, count 2 2006.229.21:22:43.00#ibcon#about to write, iclass 10, count 2 2006.229.21:22:43.00#ibcon#wrote, iclass 10, count 2 2006.229.21:22:43.00#ibcon#about to read 3, iclass 10, count 2 2006.229.21:22:43.03#ibcon#read 3, iclass 10, count 2 2006.229.21:22:43.03#ibcon#about to read 4, iclass 10, count 2 2006.229.21:22:43.03#ibcon#read 4, iclass 10, count 2 2006.229.21:22:43.03#ibcon#about to read 5, iclass 10, count 2 2006.229.21:22:43.03#ibcon#read 5, iclass 10, count 2 2006.229.21:22:43.03#ibcon#about to read 6, iclass 10, count 2 2006.229.21:22:43.03#ibcon#read 6, iclass 10, count 2 2006.229.21:22:43.03#ibcon#end of sib2, iclass 10, count 2 2006.229.21:22:43.03#ibcon#*after write, iclass 10, count 2 2006.229.21:22:43.03#ibcon#*before return 0, iclass 10, count 2 2006.229.21:22:43.03#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:43.03#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:43.03#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.21:22:43.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:43.03#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:43.15#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:43.15#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:43.15#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:22:43.15#ibcon#first serial, iclass 10, count 0 2006.229.21:22:43.15#ibcon#enter sib2, iclass 10, count 0 2006.229.21:22:43.15#ibcon#flushed, iclass 10, count 0 2006.229.21:22:43.15#ibcon#about to write, iclass 10, count 0 2006.229.21:22:43.15#ibcon#wrote, iclass 10, count 0 2006.229.21:22:43.15#ibcon#about to read 3, iclass 10, count 0 2006.229.21:22:43.17#ibcon#read 3, iclass 10, count 0 2006.229.21:22:43.17#ibcon#about to read 4, iclass 10, count 0 2006.229.21:22:43.17#ibcon#read 4, iclass 10, count 0 2006.229.21:22:43.17#ibcon#about to read 5, iclass 10, count 0 2006.229.21:22:43.17#ibcon#read 5, iclass 10, count 0 2006.229.21:22:43.17#ibcon#about to read 6, iclass 10, count 0 2006.229.21:22:43.17#ibcon#read 6, iclass 10, count 0 2006.229.21:22:43.17#ibcon#end of sib2, iclass 10, count 0 2006.229.21:22:43.17#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:22:43.17#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:22:43.17#ibcon#[25=USB\r\n] 2006.229.21:22:43.17#ibcon#*before write, iclass 10, count 0 2006.229.21:22:43.17#ibcon#enter sib2, iclass 10, count 0 2006.229.21:22:43.17#ibcon#flushed, iclass 10, count 0 2006.229.21:22:43.17#ibcon#about to write, iclass 10, count 0 2006.229.21:22:43.17#ibcon#wrote, iclass 10, count 0 2006.229.21:22:43.17#ibcon#about to read 3, iclass 10, count 0 2006.229.21:22:43.20#ibcon#read 3, iclass 10, count 0 2006.229.21:22:43.20#ibcon#about to read 4, iclass 10, count 0 2006.229.21:22:43.20#ibcon#read 4, iclass 10, count 0 2006.229.21:22:43.20#ibcon#about to read 5, iclass 10, count 0 2006.229.21:22:43.20#ibcon#read 5, iclass 10, count 0 2006.229.21:22:43.20#ibcon#about to read 6, iclass 10, count 0 2006.229.21:22:43.20#ibcon#read 6, iclass 10, count 0 2006.229.21:22:43.20#ibcon#end of sib2, iclass 10, count 0 2006.229.21:22:43.20#ibcon#*after write, iclass 10, count 0 2006.229.21:22:43.20#ibcon#*before return 0, iclass 10, count 0 2006.229.21:22:43.20#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:43.20#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:43.20#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:22:43.20#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:22:43.20$vck44/valo=4,624.99 2006.229.21:22:43.20#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.21:22:43.20#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.21:22:43.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:43.20#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:43.20#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:43.20#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:43.20#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:22:43.20#ibcon#first serial, iclass 12, count 0 2006.229.21:22:43.20#ibcon#enter sib2, iclass 12, count 0 2006.229.21:22:43.20#ibcon#flushed, iclass 12, count 0 2006.229.21:22:43.20#ibcon#about to write, iclass 12, count 0 2006.229.21:22:43.20#ibcon#wrote, iclass 12, count 0 2006.229.21:22:43.20#ibcon#about to read 3, iclass 12, count 0 2006.229.21:22:43.22#ibcon#read 3, iclass 12, count 0 2006.229.21:22:43.22#ibcon#about to read 4, iclass 12, count 0 2006.229.21:22:43.22#ibcon#read 4, iclass 12, count 0 2006.229.21:22:43.22#ibcon#about to read 5, iclass 12, count 0 2006.229.21:22:43.22#ibcon#read 5, iclass 12, count 0 2006.229.21:22:43.22#ibcon#about to read 6, iclass 12, count 0 2006.229.21:22:43.22#ibcon#read 6, iclass 12, count 0 2006.229.21:22:43.22#ibcon#end of sib2, iclass 12, count 0 2006.229.21:22:43.22#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:22:43.22#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:22:43.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:22:43.22#ibcon#*before write, iclass 12, count 0 2006.229.21:22:43.22#ibcon#enter sib2, iclass 12, count 0 2006.229.21:22:43.22#ibcon#flushed, iclass 12, count 0 2006.229.21:22:43.22#ibcon#about to write, iclass 12, count 0 2006.229.21:22:43.22#ibcon#wrote, iclass 12, count 0 2006.229.21:22:43.22#ibcon#about to read 3, iclass 12, count 0 2006.229.21:22:43.26#ibcon#read 3, iclass 12, count 0 2006.229.21:22:43.26#ibcon#about to read 4, iclass 12, count 0 2006.229.21:22:43.26#ibcon#read 4, iclass 12, count 0 2006.229.21:22:43.26#ibcon#about to read 5, iclass 12, count 0 2006.229.21:22:43.26#ibcon#read 5, iclass 12, count 0 2006.229.21:22:43.26#ibcon#about to read 6, iclass 12, count 0 2006.229.21:22:43.26#ibcon#read 6, iclass 12, count 0 2006.229.21:22:43.26#ibcon#end of sib2, iclass 12, count 0 2006.229.21:22:43.26#ibcon#*after write, iclass 12, count 0 2006.229.21:22:43.26#ibcon#*before return 0, iclass 12, count 0 2006.229.21:22:43.26#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:43.26#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:43.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:22:43.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:22:43.26$vck44/va=4,7 2006.229.21:22:43.26#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.21:22:43.26#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.21:22:43.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:43.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:43.32#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:43.32#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:43.32#ibcon#enter wrdev, iclass 14, count 2 2006.229.21:22:43.32#ibcon#first serial, iclass 14, count 2 2006.229.21:22:43.32#ibcon#enter sib2, iclass 14, count 2 2006.229.21:22:43.32#ibcon#flushed, iclass 14, count 2 2006.229.21:22:43.32#ibcon#about to write, iclass 14, count 2 2006.229.21:22:43.32#ibcon#wrote, iclass 14, count 2 2006.229.21:22:43.32#ibcon#about to read 3, iclass 14, count 2 2006.229.21:22:43.34#ibcon#read 3, iclass 14, count 2 2006.229.21:22:43.34#ibcon#about to read 4, iclass 14, count 2 2006.229.21:22:43.34#ibcon#read 4, iclass 14, count 2 2006.229.21:22:43.34#ibcon#about to read 5, iclass 14, count 2 2006.229.21:22:43.34#ibcon#read 5, iclass 14, count 2 2006.229.21:22:43.34#ibcon#about to read 6, iclass 14, count 2 2006.229.21:22:43.34#ibcon#read 6, iclass 14, count 2 2006.229.21:22:43.34#ibcon#end of sib2, iclass 14, count 2 2006.229.21:22:43.34#ibcon#*mode == 0, iclass 14, count 2 2006.229.21:22:43.34#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.21:22:43.34#ibcon#[25=AT04-07\r\n] 2006.229.21:22:43.34#ibcon#*before write, iclass 14, count 2 2006.229.21:22:43.34#ibcon#enter sib2, iclass 14, count 2 2006.229.21:22:43.34#ibcon#flushed, iclass 14, count 2 2006.229.21:22:43.34#ibcon#about to write, iclass 14, count 2 2006.229.21:22:43.34#ibcon#wrote, iclass 14, count 2 2006.229.21:22:43.34#ibcon#about to read 3, iclass 14, count 2 2006.229.21:22:43.37#ibcon#read 3, iclass 14, count 2 2006.229.21:22:43.37#ibcon#about to read 4, iclass 14, count 2 2006.229.21:22:43.37#ibcon#read 4, iclass 14, count 2 2006.229.21:22:43.37#ibcon#about to read 5, iclass 14, count 2 2006.229.21:22:43.37#ibcon#read 5, iclass 14, count 2 2006.229.21:22:43.37#ibcon#about to read 6, iclass 14, count 2 2006.229.21:22:43.37#ibcon#read 6, iclass 14, count 2 2006.229.21:22:43.37#ibcon#end of sib2, iclass 14, count 2 2006.229.21:22:43.37#ibcon#*after write, iclass 14, count 2 2006.229.21:22:43.37#ibcon#*before return 0, iclass 14, count 2 2006.229.21:22:43.37#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:43.37#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:43.37#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.21:22:43.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:43.37#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:43.49#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:43.49#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:43.49#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:22:43.49#ibcon#first serial, iclass 14, count 0 2006.229.21:22:43.49#ibcon#enter sib2, iclass 14, count 0 2006.229.21:22:43.49#ibcon#flushed, iclass 14, count 0 2006.229.21:22:43.49#ibcon#about to write, iclass 14, count 0 2006.229.21:22:43.49#ibcon#wrote, iclass 14, count 0 2006.229.21:22:43.49#ibcon#about to read 3, iclass 14, count 0 2006.229.21:22:43.51#ibcon#read 3, iclass 14, count 0 2006.229.21:22:43.51#ibcon#about to read 4, iclass 14, count 0 2006.229.21:22:43.51#ibcon#read 4, iclass 14, count 0 2006.229.21:22:43.51#ibcon#about to read 5, iclass 14, count 0 2006.229.21:22:43.51#ibcon#read 5, iclass 14, count 0 2006.229.21:22:43.51#ibcon#about to read 6, iclass 14, count 0 2006.229.21:22:43.51#ibcon#read 6, iclass 14, count 0 2006.229.21:22:43.51#ibcon#end of sib2, iclass 14, count 0 2006.229.21:22:43.51#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:22:43.51#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:22:43.51#ibcon#[25=USB\r\n] 2006.229.21:22:43.51#ibcon#*before write, iclass 14, count 0 2006.229.21:22:43.51#ibcon#enter sib2, iclass 14, count 0 2006.229.21:22:43.51#ibcon#flushed, iclass 14, count 0 2006.229.21:22:43.51#ibcon#about to write, iclass 14, count 0 2006.229.21:22:43.51#ibcon#wrote, iclass 14, count 0 2006.229.21:22:43.51#ibcon#about to read 3, iclass 14, count 0 2006.229.21:22:43.54#ibcon#read 3, iclass 14, count 0 2006.229.21:22:43.54#ibcon#about to read 4, iclass 14, count 0 2006.229.21:22:43.54#ibcon#read 4, iclass 14, count 0 2006.229.21:22:43.54#ibcon#about to read 5, iclass 14, count 0 2006.229.21:22:43.54#ibcon#read 5, iclass 14, count 0 2006.229.21:22:43.54#ibcon#about to read 6, iclass 14, count 0 2006.229.21:22:43.54#ibcon#read 6, iclass 14, count 0 2006.229.21:22:43.54#ibcon#end of sib2, iclass 14, count 0 2006.229.21:22:43.54#ibcon#*after write, iclass 14, count 0 2006.229.21:22:43.54#ibcon#*before return 0, iclass 14, count 0 2006.229.21:22:43.54#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:43.54#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:43.54#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:22:43.54#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:22:43.54$vck44/valo=5,734.99 2006.229.21:22:43.54#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.21:22:43.54#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.21:22:43.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:43.54#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:43.54#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:43.54#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:43.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:22:43.54#ibcon#first serial, iclass 16, count 0 2006.229.21:22:43.54#ibcon#enter sib2, iclass 16, count 0 2006.229.21:22:43.54#ibcon#flushed, iclass 16, count 0 2006.229.21:22:43.54#ibcon#about to write, iclass 16, count 0 2006.229.21:22:43.54#ibcon#wrote, iclass 16, count 0 2006.229.21:22:43.54#ibcon#about to read 3, iclass 16, count 0 2006.229.21:22:43.56#ibcon#read 3, iclass 16, count 0 2006.229.21:22:43.56#ibcon#about to read 4, iclass 16, count 0 2006.229.21:22:43.56#ibcon#read 4, iclass 16, count 0 2006.229.21:22:43.56#ibcon#about to read 5, iclass 16, count 0 2006.229.21:22:43.56#ibcon#read 5, iclass 16, count 0 2006.229.21:22:43.56#ibcon#about to read 6, iclass 16, count 0 2006.229.21:22:43.56#ibcon#read 6, iclass 16, count 0 2006.229.21:22:43.56#ibcon#end of sib2, iclass 16, count 0 2006.229.21:22:43.56#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:22:43.56#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:22:43.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:22:43.56#ibcon#*before write, iclass 16, count 0 2006.229.21:22:43.56#ibcon#enter sib2, iclass 16, count 0 2006.229.21:22:43.56#ibcon#flushed, iclass 16, count 0 2006.229.21:22:43.56#ibcon#about to write, iclass 16, count 0 2006.229.21:22:43.56#ibcon#wrote, iclass 16, count 0 2006.229.21:22:43.56#ibcon#about to read 3, iclass 16, count 0 2006.229.21:22:43.60#ibcon#read 3, iclass 16, count 0 2006.229.21:22:43.60#ibcon#about to read 4, iclass 16, count 0 2006.229.21:22:43.60#ibcon#read 4, iclass 16, count 0 2006.229.21:22:43.60#ibcon#about to read 5, iclass 16, count 0 2006.229.21:22:43.60#ibcon#read 5, iclass 16, count 0 2006.229.21:22:43.60#ibcon#about to read 6, iclass 16, count 0 2006.229.21:22:43.60#ibcon#read 6, iclass 16, count 0 2006.229.21:22:43.60#ibcon#end of sib2, iclass 16, count 0 2006.229.21:22:43.60#ibcon#*after write, iclass 16, count 0 2006.229.21:22:43.60#ibcon#*before return 0, iclass 16, count 0 2006.229.21:22:43.60#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:43.60#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:43.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:22:43.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:22:43.60$vck44/va=5,4 2006.229.21:22:43.60#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.21:22:43.60#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.21:22:43.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:43.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:43.66#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:43.66#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:43.66#ibcon#enter wrdev, iclass 18, count 2 2006.229.21:22:43.66#ibcon#first serial, iclass 18, count 2 2006.229.21:22:43.66#ibcon#enter sib2, iclass 18, count 2 2006.229.21:22:43.66#ibcon#flushed, iclass 18, count 2 2006.229.21:22:43.66#ibcon#about to write, iclass 18, count 2 2006.229.21:22:43.66#ibcon#wrote, iclass 18, count 2 2006.229.21:22:43.66#ibcon#about to read 3, iclass 18, count 2 2006.229.21:22:43.68#ibcon#read 3, iclass 18, count 2 2006.229.21:22:43.68#ibcon#about to read 4, iclass 18, count 2 2006.229.21:22:43.68#ibcon#read 4, iclass 18, count 2 2006.229.21:22:43.68#ibcon#about to read 5, iclass 18, count 2 2006.229.21:22:43.68#ibcon#read 5, iclass 18, count 2 2006.229.21:22:43.68#ibcon#about to read 6, iclass 18, count 2 2006.229.21:22:43.68#ibcon#read 6, iclass 18, count 2 2006.229.21:22:43.68#ibcon#end of sib2, iclass 18, count 2 2006.229.21:22:43.68#ibcon#*mode == 0, iclass 18, count 2 2006.229.21:22:43.68#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.21:22:43.68#ibcon#[25=AT05-04\r\n] 2006.229.21:22:43.68#ibcon#*before write, iclass 18, count 2 2006.229.21:22:43.68#ibcon#enter sib2, iclass 18, count 2 2006.229.21:22:43.68#ibcon#flushed, iclass 18, count 2 2006.229.21:22:43.68#ibcon#about to write, iclass 18, count 2 2006.229.21:22:43.68#ibcon#wrote, iclass 18, count 2 2006.229.21:22:43.68#ibcon#about to read 3, iclass 18, count 2 2006.229.21:22:43.71#ibcon#read 3, iclass 18, count 2 2006.229.21:22:43.71#ibcon#about to read 4, iclass 18, count 2 2006.229.21:22:43.71#ibcon#read 4, iclass 18, count 2 2006.229.21:22:43.71#ibcon#about to read 5, iclass 18, count 2 2006.229.21:22:43.71#ibcon#read 5, iclass 18, count 2 2006.229.21:22:43.71#ibcon#about to read 6, iclass 18, count 2 2006.229.21:22:43.71#ibcon#read 6, iclass 18, count 2 2006.229.21:22:43.71#ibcon#end of sib2, iclass 18, count 2 2006.229.21:22:43.71#ibcon#*after write, iclass 18, count 2 2006.229.21:22:43.71#ibcon#*before return 0, iclass 18, count 2 2006.229.21:22:43.71#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:43.71#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:43.71#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.21:22:43.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:43.71#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:43.83#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:43.83#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:43.83#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:22:43.83#ibcon#first serial, iclass 18, count 0 2006.229.21:22:43.83#ibcon#enter sib2, iclass 18, count 0 2006.229.21:22:43.83#ibcon#flushed, iclass 18, count 0 2006.229.21:22:43.83#ibcon#about to write, iclass 18, count 0 2006.229.21:22:43.83#ibcon#wrote, iclass 18, count 0 2006.229.21:22:43.83#ibcon#about to read 3, iclass 18, count 0 2006.229.21:22:43.85#ibcon#read 3, iclass 18, count 0 2006.229.21:22:43.85#ibcon#about to read 4, iclass 18, count 0 2006.229.21:22:43.85#ibcon#read 4, iclass 18, count 0 2006.229.21:22:43.85#ibcon#about to read 5, iclass 18, count 0 2006.229.21:22:43.85#ibcon#read 5, iclass 18, count 0 2006.229.21:22:43.85#ibcon#about to read 6, iclass 18, count 0 2006.229.21:22:43.85#ibcon#read 6, iclass 18, count 0 2006.229.21:22:43.85#ibcon#end of sib2, iclass 18, count 0 2006.229.21:22:43.85#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:22:43.85#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:22:43.85#ibcon#[25=USB\r\n] 2006.229.21:22:43.85#ibcon#*before write, iclass 18, count 0 2006.229.21:22:43.85#ibcon#enter sib2, iclass 18, count 0 2006.229.21:22:43.85#ibcon#flushed, iclass 18, count 0 2006.229.21:22:43.85#ibcon#about to write, iclass 18, count 0 2006.229.21:22:43.85#ibcon#wrote, iclass 18, count 0 2006.229.21:22:43.85#ibcon#about to read 3, iclass 18, count 0 2006.229.21:22:43.88#ibcon#read 3, iclass 18, count 0 2006.229.21:22:43.88#ibcon#about to read 4, iclass 18, count 0 2006.229.21:22:43.88#ibcon#read 4, iclass 18, count 0 2006.229.21:22:43.88#ibcon#about to read 5, iclass 18, count 0 2006.229.21:22:43.88#ibcon#read 5, iclass 18, count 0 2006.229.21:22:43.88#ibcon#about to read 6, iclass 18, count 0 2006.229.21:22:43.88#ibcon#read 6, iclass 18, count 0 2006.229.21:22:43.88#ibcon#end of sib2, iclass 18, count 0 2006.229.21:22:43.88#ibcon#*after write, iclass 18, count 0 2006.229.21:22:43.88#ibcon#*before return 0, iclass 18, count 0 2006.229.21:22:43.88#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:43.88#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:43.88#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:22:43.88#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:22:43.88$vck44/valo=6,814.99 2006.229.21:22:43.88#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:22:43.88#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:22:43.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:43.88#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:43.88#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:43.88#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:43.88#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:22:43.88#ibcon#first serial, iclass 20, count 0 2006.229.21:22:43.88#ibcon#enter sib2, iclass 20, count 0 2006.229.21:22:43.88#ibcon#flushed, iclass 20, count 0 2006.229.21:22:43.88#ibcon#about to write, iclass 20, count 0 2006.229.21:22:43.88#ibcon#wrote, iclass 20, count 0 2006.229.21:22:43.88#ibcon#about to read 3, iclass 20, count 0 2006.229.21:22:43.90#ibcon#read 3, iclass 20, count 0 2006.229.21:22:43.90#ibcon#about to read 4, iclass 20, count 0 2006.229.21:22:43.90#ibcon#read 4, iclass 20, count 0 2006.229.21:22:43.90#ibcon#about to read 5, iclass 20, count 0 2006.229.21:22:43.90#ibcon#read 5, iclass 20, count 0 2006.229.21:22:43.90#ibcon#about to read 6, iclass 20, count 0 2006.229.21:22:43.90#ibcon#read 6, iclass 20, count 0 2006.229.21:22:43.90#ibcon#end of sib2, iclass 20, count 0 2006.229.21:22:43.90#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:22:43.90#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:22:43.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:22:43.90#ibcon#*before write, iclass 20, count 0 2006.229.21:22:43.90#ibcon#enter sib2, iclass 20, count 0 2006.229.21:22:43.90#ibcon#flushed, iclass 20, count 0 2006.229.21:22:43.90#ibcon#about to write, iclass 20, count 0 2006.229.21:22:43.90#ibcon#wrote, iclass 20, count 0 2006.229.21:22:43.90#ibcon#about to read 3, iclass 20, count 0 2006.229.21:22:43.94#ibcon#read 3, iclass 20, count 0 2006.229.21:22:43.94#ibcon#about to read 4, iclass 20, count 0 2006.229.21:22:43.94#ibcon#read 4, iclass 20, count 0 2006.229.21:22:43.94#ibcon#about to read 5, iclass 20, count 0 2006.229.21:22:43.94#ibcon#read 5, iclass 20, count 0 2006.229.21:22:43.94#ibcon#about to read 6, iclass 20, count 0 2006.229.21:22:43.94#ibcon#read 6, iclass 20, count 0 2006.229.21:22:43.94#ibcon#end of sib2, iclass 20, count 0 2006.229.21:22:43.94#ibcon#*after write, iclass 20, count 0 2006.229.21:22:43.94#ibcon#*before return 0, iclass 20, count 0 2006.229.21:22:43.94#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:43.94#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:43.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:22:43.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:22:43.94$vck44/va=6,4 2006.229.21:22:43.94#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.21:22:43.94#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.21:22:43.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:43.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:44.00#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:44.00#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:44.00#ibcon#enter wrdev, iclass 22, count 2 2006.229.21:22:44.00#ibcon#first serial, iclass 22, count 2 2006.229.21:22:44.00#ibcon#enter sib2, iclass 22, count 2 2006.229.21:22:44.00#ibcon#flushed, iclass 22, count 2 2006.229.21:22:44.00#ibcon#about to write, iclass 22, count 2 2006.229.21:22:44.00#ibcon#wrote, iclass 22, count 2 2006.229.21:22:44.00#ibcon#about to read 3, iclass 22, count 2 2006.229.21:22:44.02#ibcon#read 3, iclass 22, count 2 2006.229.21:22:44.02#ibcon#about to read 4, iclass 22, count 2 2006.229.21:22:44.02#ibcon#read 4, iclass 22, count 2 2006.229.21:22:44.02#ibcon#about to read 5, iclass 22, count 2 2006.229.21:22:44.02#ibcon#read 5, iclass 22, count 2 2006.229.21:22:44.02#ibcon#about to read 6, iclass 22, count 2 2006.229.21:22:44.02#ibcon#read 6, iclass 22, count 2 2006.229.21:22:44.02#ibcon#end of sib2, iclass 22, count 2 2006.229.21:22:44.02#ibcon#*mode == 0, iclass 22, count 2 2006.229.21:22:44.02#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.21:22:44.02#ibcon#[25=AT06-04\r\n] 2006.229.21:22:44.02#ibcon#*before write, iclass 22, count 2 2006.229.21:22:44.02#ibcon#enter sib2, iclass 22, count 2 2006.229.21:22:44.02#ibcon#flushed, iclass 22, count 2 2006.229.21:22:44.02#ibcon#about to write, iclass 22, count 2 2006.229.21:22:44.02#ibcon#wrote, iclass 22, count 2 2006.229.21:22:44.02#ibcon#about to read 3, iclass 22, count 2 2006.229.21:22:44.05#ibcon#read 3, iclass 22, count 2 2006.229.21:22:44.05#ibcon#about to read 4, iclass 22, count 2 2006.229.21:22:44.05#ibcon#read 4, iclass 22, count 2 2006.229.21:22:44.05#ibcon#about to read 5, iclass 22, count 2 2006.229.21:22:44.05#ibcon#read 5, iclass 22, count 2 2006.229.21:22:44.05#ibcon#about to read 6, iclass 22, count 2 2006.229.21:22:44.05#ibcon#read 6, iclass 22, count 2 2006.229.21:22:44.05#ibcon#end of sib2, iclass 22, count 2 2006.229.21:22:44.05#ibcon#*after write, iclass 22, count 2 2006.229.21:22:44.05#ibcon#*before return 0, iclass 22, count 2 2006.229.21:22:44.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:44.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:44.05#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.21:22:44.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:44.05#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:44.17#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:44.17#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:44.17#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:22:44.17#ibcon#first serial, iclass 22, count 0 2006.229.21:22:44.17#ibcon#enter sib2, iclass 22, count 0 2006.229.21:22:44.17#ibcon#flushed, iclass 22, count 0 2006.229.21:22:44.17#ibcon#about to write, iclass 22, count 0 2006.229.21:22:44.17#ibcon#wrote, iclass 22, count 0 2006.229.21:22:44.17#ibcon#about to read 3, iclass 22, count 0 2006.229.21:22:44.19#ibcon#read 3, iclass 22, count 0 2006.229.21:22:44.19#ibcon#about to read 4, iclass 22, count 0 2006.229.21:22:44.19#ibcon#read 4, iclass 22, count 0 2006.229.21:22:44.19#ibcon#about to read 5, iclass 22, count 0 2006.229.21:22:44.19#ibcon#read 5, iclass 22, count 0 2006.229.21:22:44.19#ibcon#about to read 6, iclass 22, count 0 2006.229.21:22:44.19#ibcon#read 6, iclass 22, count 0 2006.229.21:22:44.19#ibcon#end of sib2, iclass 22, count 0 2006.229.21:22:44.19#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:22:44.19#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:22:44.19#ibcon#[25=USB\r\n] 2006.229.21:22:44.19#ibcon#*before write, iclass 22, count 0 2006.229.21:22:44.19#ibcon#enter sib2, iclass 22, count 0 2006.229.21:22:44.19#ibcon#flushed, iclass 22, count 0 2006.229.21:22:44.19#ibcon#about to write, iclass 22, count 0 2006.229.21:22:44.19#ibcon#wrote, iclass 22, count 0 2006.229.21:22:44.19#ibcon#about to read 3, iclass 22, count 0 2006.229.21:22:44.22#ibcon#read 3, iclass 22, count 0 2006.229.21:22:44.22#ibcon#about to read 4, iclass 22, count 0 2006.229.21:22:44.22#ibcon#read 4, iclass 22, count 0 2006.229.21:22:44.22#ibcon#about to read 5, iclass 22, count 0 2006.229.21:22:44.22#ibcon#read 5, iclass 22, count 0 2006.229.21:22:44.22#ibcon#about to read 6, iclass 22, count 0 2006.229.21:22:44.22#ibcon#read 6, iclass 22, count 0 2006.229.21:22:44.22#ibcon#end of sib2, iclass 22, count 0 2006.229.21:22:44.22#ibcon#*after write, iclass 22, count 0 2006.229.21:22:44.22#ibcon#*before return 0, iclass 22, count 0 2006.229.21:22:44.22#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:44.22#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:44.22#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:22:44.22#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:22:44.22$vck44/valo=7,864.99 2006.229.21:22:44.22#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.21:22:44.22#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.21:22:44.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:44.22#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:44.22#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:44.22#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:44.22#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:22:44.22#ibcon#first serial, iclass 24, count 0 2006.229.21:22:44.22#ibcon#enter sib2, iclass 24, count 0 2006.229.21:22:44.22#ibcon#flushed, iclass 24, count 0 2006.229.21:22:44.22#ibcon#about to write, iclass 24, count 0 2006.229.21:22:44.22#ibcon#wrote, iclass 24, count 0 2006.229.21:22:44.22#ibcon#about to read 3, iclass 24, count 0 2006.229.21:22:44.24#ibcon#read 3, iclass 24, count 0 2006.229.21:22:44.24#ibcon#about to read 4, iclass 24, count 0 2006.229.21:22:44.24#ibcon#read 4, iclass 24, count 0 2006.229.21:22:44.24#ibcon#about to read 5, iclass 24, count 0 2006.229.21:22:44.24#ibcon#read 5, iclass 24, count 0 2006.229.21:22:44.24#ibcon#about to read 6, iclass 24, count 0 2006.229.21:22:44.24#ibcon#read 6, iclass 24, count 0 2006.229.21:22:44.24#ibcon#end of sib2, iclass 24, count 0 2006.229.21:22:44.24#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:22:44.24#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:22:44.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:22:44.24#ibcon#*before write, iclass 24, count 0 2006.229.21:22:44.24#ibcon#enter sib2, iclass 24, count 0 2006.229.21:22:44.24#ibcon#flushed, iclass 24, count 0 2006.229.21:22:44.24#ibcon#about to write, iclass 24, count 0 2006.229.21:22:44.24#ibcon#wrote, iclass 24, count 0 2006.229.21:22:44.24#ibcon#about to read 3, iclass 24, count 0 2006.229.21:22:44.28#ibcon#read 3, iclass 24, count 0 2006.229.21:22:44.28#ibcon#about to read 4, iclass 24, count 0 2006.229.21:22:44.28#ibcon#read 4, iclass 24, count 0 2006.229.21:22:44.28#ibcon#about to read 5, iclass 24, count 0 2006.229.21:22:44.28#ibcon#read 5, iclass 24, count 0 2006.229.21:22:44.28#ibcon#about to read 6, iclass 24, count 0 2006.229.21:22:44.28#ibcon#read 6, iclass 24, count 0 2006.229.21:22:44.28#ibcon#end of sib2, iclass 24, count 0 2006.229.21:22:44.28#ibcon#*after write, iclass 24, count 0 2006.229.21:22:44.28#ibcon#*before return 0, iclass 24, count 0 2006.229.21:22:44.28#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:44.28#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:44.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:22:44.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:22:44.28$vck44/va=7,5 2006.229.21:22:44.28#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.21:22:44.28#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.21:22:44.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:44.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:44.34#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:44.34#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:44.34#ibcon#enter wrdev, iclass 26, count 2 2006.229.21:22:44.34#ibcon#first serial, iclass 26, count 2 2006.229.21:22:44.34#ibcon#enter sib2, iclass 26, count 2 2006.229.21:22:44.34#ibcon#flushed, iclass 26, count 2 2006.229.21:22:44.34#ibcon#about to write, iclass 26, count 2 2006.229.21:22:44.34#ibcon#wrote, iclass 26, count 2 2006.229.21:22:44.34#ibcon#about to read 3, iclass 26, count 2 2006.229.21:22:44.36#ibcon#read 3, iclass 26, count 2 2006.229.21:22:44.36#ibcon#about to read 4, iclass 26, count 2 2006.229.21:22:44.36#ibcon#read 4, iclass 26, count 2 2006.229.21:22:44.36#ibcon#about to read 5, iclass 26, count 2 2006.229.21:22:44.36#ibcon#read 5, iclass 26, count 2 2006.229.21:22:44.36#ibcon#about to read 6, iclass 26, count 2 2006.229.21:22:44.36#ibcon#read 6, iclass 26, count 2 2006.229.21:22:44.36#ibcon#end of sib2, iclass 26, count 2 2006.229.21:22:44.36#ibcon#*mode == 0, iclass 26, count 2 2006.229.21:22:44.36#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.21:22:44.36#ibcon#[25=AT07-05\r\n] 2006.229.21:22:44.36#ibcon#*before write, iclass 26, count 2 2006.229.21:22:44.36#ibcon#enter sib2, iclass 26, count 2 2006.229.21:22:44.36#ibcon#flushed, iclass 26, count 2 2006.229.21:22:44.36#ibcon#about to write, iclass 26, count 2 2006.229.21:22:44.36#ibcon#wrote, iclass 26, count 2 2006.229.21:22:44.36#ibcon#about to read 3, iclass 26, count 2 2006.229.21:22:44.39#ibcon#read 3, iclass 26, count 2 2006.229.21:22:44.39#ibcon#about to read 4, iclass 26, count 2 2006.229.21:22:44.39#ibcon#read 4, iclass 26, count 2 2006.229.21:22:44.39#ibcon#about to read 5, iclass 26, count 2 2006.229.21:22:44.39#ibcon#read 5, iclass 26, count 2 2006.229.21:22:44.39#ibcon#about to read 6, iclass 26, count 2 2006.229.21:22:44.39#ibcon#read 6, iclass 26, count 2 2006.229.21:22:44.39#ibcon#end of sib2, iclass 26, count 2 2006.229.21:22:44.39#ibcon#*after write, iclass 26, count 2 2006.229.21:22:44.39#ibcon#*before return 0, iclass 26, count 2 2006.229.21:22:44.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:44.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:44.39#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.21:22:44.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:44.39#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:44.51#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:44.51#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:44.51#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:22:44.51#ibcon#first serial, iclass 26, count 0 2006.229.21:22:44.51#ibcon#enter sib2, iclass 26, count 0 2006.229.21:22:44.51#ibcon#flushed, iclass 26, count 0 2006.229.21:22:44.51#ibcon#about to write, iclass 26, count 0 2006.229.21:22:44.51#ibcon#wrote, iclass 26, count 0 2006.229.21:22:44.51#ibcon#about to read 3, iclass 26, count 0 2006.229.21:22:44.53#ibcon#read 3, iclass 26, count 0 2006.229.21:22:44.53#ibcon#about to read 4, iclass 26, count 0 2006.229.21:22:44.53#ibcon#read 4, iclass 26, count 0 2006.229.21:22:44.53#ibcon#about to read 5, iclass 26, count 0 2006.229.21:22:44.53#ibcon#read 5, iclass 26, count 0 2006.229.21:22:44.53#ibcon#about to read 6, iclass 26, count 0 2006.229.21:22:44.53#ibcon#read 6, iclass 26, count 0 2006.229.21:22:44.53#ibcon#end of sib2, iclass 26, count 0 2006.229.21:22:44.53#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:22:44.53#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:22:44.53#ibcon#[25=USB\r\n] 2006.229.21:22:44.53#ibcon#*before write, iclass 26, count 0 2006.229.21:22:44.53#ibcon#enter sib2, iclass 26, count 0 2006.229.21:22:44.53#ibcon#flushed, iclass 26, count 0 2006.229.21:22:44.53#ibcon#about to write, iclass 26, count 0 2006.229.21:22:44.53#ibcon#wrote, iclass 26, count 0 2006.229.21:22:44.53#ibcon#about to read 3, iclass 26, count 0 2006.229.21:22:44.56#ibcon#read 3, iclass 26, count 0 2006.229.21:22:44.56#ibcon#about to read 4, iclass 26, count 0 2006.229.21:22:44.56#ibcon#read 4, iclass 26, count 0 2006.229.21:22:44.56#ibcon#about to read 5, iclass 26, count 0 2006.229.21:22:44.56#ibcon#read 5, iclass 26, count 0 2006.229.21:22:44.56#ibcon#about to read 6, iclass 26, count 0 2006.229.21:22:44.56#ibcon#read 6, iclass 26, count 0 2006.229.21:22:44.56#ibcon#end of sib2, iclass 26, count 0 2006.229.21:22:44.56#ibcon#*after write, iclass 26, count 0 2006.229.21:22:44.56#ibcon#*before return 0, iclass 26, count 0 2006.229.21:22:44.56#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:44.56#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:44.56#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:22:44.56#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:22:44.56$vck44/valo=8,884.99 2006.229.21:22:44.56#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.21:22:44.56#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.21:22:44.56#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:44.56#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:44.56#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:44.56#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:44.56#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:22:44.56#ibcon#first serial, iclass 28, count 0 2006.229.21:22:44.56#ibcon#enter sib2, iclass 28, count 0 2006.229.21:22:44.56#ibcon#flushed, iclass 28, count 0 2006.229.21:22:44.56#ibcon#about to write, iclass 28, count 0 2006.229.21:22:44.56#ibcon#wrote, iclass 28, count 0 2006.229.21:22:44.56#ibcon#about to read 3, iclass 28, count 0 2006.229.21:22:44.58#ibcon#read 3, iclass 28, count 0 2006.229.21:22:44.58#ibcon#about to read 4, iclass 28, count 0 2006.229.21:22:44.58#ibcon#read 4, iclass 28, count 0 2006.229.21:22:44.58#ibcon#about to read 5, iclass 28, count 0 2006.229.21:22:44.58#ibcon#read 5, iclass 28, count 0 2006.229.21:22:44.58#ibcon#about to read 6, iclass 28, count 0 2006.229.21:22:44.58#ibcon#read 6, iclass 28, count 0 2006.229.21:22:44.58#ibcon#end of sib2, iclass 28, count 0 2006.229.21:22:44.58#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:22:44.58#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:22:44.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:22:44.58#ibcon#*before write, iclass 28, count 0 2006.229.21:22:44.58#ibcon#enter sib2, iclass 28, count 0 2006.229.21:22:44.58#ibcon#flushed, iclass 28, count 0 2006.229.21:22:44.58#ibcon#about to write, iclass 28, count 0 2006.229.21:22:44.58#ibcon#wrote, iclass 28, count 0 2006.229.21:22:44.58#ibcon#about to read 3, iclass 28, count 0 2006.229.21:22:44.62#ibcon#read 3, iclass 28, count 0 2006.229.21:22:44.62#ibcon#about to read 4, iclass 28, count 0 2006.229.21:22:44.62#ibcon#read 4, iclass 28, count 0 2006.229.21:22:44.62#ibcon#about to read 5, iclass 28, count 0 2006.229.21:22:44.62#ibcon#read 5, iclass 28, count 0 2006.229.21:22:44.62#ibcon#about to read 6, iclass 28, count 0 2006.229.21:22:44.62#ibcon#read 6, iclass 28, count 0 2006.229.21:22:44.62#ibcon#end of sib2, iclass 28, count 0 2006.229.21:22:44.62#ibcon#*after write, iclass 28, count 0 2006.229.21:22:44.62#ibcon#*before return 0, iclass 28, count 0 2006.229.21:22:44.62#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:44.62#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:44.62#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:22:44.62#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:22:44.62$vck44/va=8,6 2006.229.21:22:44.62#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.21:22:44.62#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.21:22:44.62#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:44.62#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:22:44.68#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:22:44.68#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:22:44.68#ibcon#enter wrdev, iclass 30, count 2 2006.229.21:22:44.68#ibcon#first serial, iclass 30, count 2 2006.229.21:22:44.68#ibcon#enter sib2, iclass 30, count 2 2006.229.21:22:44.68#ibcon#flushed, iclass 30, count 2 2006.229.21:22:44.68#ibcon#about to write, iclass 30, count 2 2006.229.21:22:44.68#ibcon#wrote, iclass 30, count 2 2006.229.21:22:44.68#ibcon#about to read 3, iclass 30, count 2 2006.229.21:22:44.70#ibcon#read 3, iclass 30, count 2 2006.229.21:22:44.70#ibcon#about to read 4, iclass 30, count 2 2006.229.21:22:44.70#ibcon#read 4, iclass 30, count 2 2006.229.21:22:44.70#ibcon#about to read 5, iclass 30, count 2 2006.229.21:22:44.70#ibcon#read 5, iclass 30, count 2 2006.229.21:22:44.70#ibcon#about to read 6, iclass 30, count 2 2006.229.21:22:44.70#ibcon#read 6, iclass 30, count 2 2006.229.21:22:44.70#ibcon#end of sib2, iclass 30, count 2 2006.229.21:22:44.70#ibcon#*mode == 0, iclass 30, count 2 2006.229.21:22:44.70#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.21:22:44.70#ibcon#[25=AT08-06\r\n] 2006.229.21:22:44.70#ibcon#*before write, iclass 30, count 2 2006.229.21:22:44.70#ibcon#enter sib2, iclass 30, count 2 2006.229.21:22:44.70#ibcon#flushed, iclass 30, count 2 2006.229.21:22:44.70#ibcon#about to write, iclass 30, count 2 2006.229.21:22:44.70#ibcon#wrote, iclass 30, count 2 2006.229.21:22:44.70#ibcon#about to read 3, iclass 30, count 2 2006.229.21:22:44.73#ibcon#read 3, iclass 30, count 2 2006.229.21:22:44.73#ibcon#about to read 4, iclass 30, count 2 2006.229.21:22:44.73#ibcon#read 4, iclass 30, count 2 2006.229.21:22:44.73#ibcon#about to read 5, iclass 30, count 2 2006.229.21:22:44.73#ibcon#read 5, iclass 30, count 2 2006.229.21:22:44.73#ibcon#about to read 6, iclass 30, count 2 2006.229.21:22:44.73#ibcon#read 6, iclass 30, count 2 2006.229.21:22:44.73#ibcon#end of sib2, iclass 30, count 2 2006.229.21:22:44.73#ibcon#*after write, iclass 30, count 2 2006.229.21:22:44.73#ibcon#*before return 0, iclass 30, count 2 2006.229.21:22:44.73#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:22:44.73#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:22:44.73#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.21:22:44.73#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:44.73#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:22:44.85#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:22:44.85#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:22:44.85#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:22:44.85#ibcon#first serial, iclass 30, count 0 2006.229.21:22:44.85#ibcon#enter sib2, iclass 30, count 0 2006.229.21:22:44.85#ibcon#flushed, iclass 30, count 0 2006.229.21:22:44.85#ibcon#about to write, iclass 30, count 0 2006.229.21:22:44.85#ibcon#wrote, iclass 30, count 0 2006.229.21:22:44.85#ibcon#about to read 3, iclass 30, count 0 2006.229.21:22:44.87#ibcon#read 3, iclass 30, count 0 2006.229.21:22:44.87#ibcon#about to read 4, iclass 30, count 0 2006.229.21:22:44.87#ibcon#read 4, iclass 30, count 0 2006.229.21:22:44.87#ibcon#about to read 5, iclass 30, count 0 2006.229.21:22:44.87#ibcon#read 5, iclass 30, count 0 2006.229.21:22:44.87#ibcon#about to read 6, iclass 30, count 0 2006.229.21:22:44.87#ibcon#read 6, iclass 30, count 0 2006.229.21:22:44.87#ibcon#end of sib2, iclass 30, count 0 2006.229.21:22:44.87#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:22:44.87#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:22:44.87#ibcon#[25=USB\r\n] 2006.229.21:22:44.87#ibcon#*before write, iclass 30, count 0 2006.229.21:22:44.87#ibcon#enter sib2, iclass 30, count 0 2006.229.21:22:44.87#ibcon#flushed, iclass 30, count 0 2006.229.21:22:44.87#ibcon#about to write, iclass 30, count 0 2006.229.21:22:44.87#ibcon#wrote, iclass 30, count 0 2006.229.21:22:44.87#ibcon#about to read 3, iclass 30, count 0 2006.229.21:22:44.90#ibcon#read 3, iclass 30, count 0 2006.229.21:22:44.90#ibcon#about to read 4, iclass 30, count 0 2006.229.21:22:44.90#ibcon#read 4, iclass 30, count 0 2006.229.21:22:44.90#ibcon#about to read 5, iclass 30, count 0 2006.229.21:22:44.90#ibcon#read 5, iclass 30, count 0 2006.229.21:22:44.90#ibcon#about to read 6, iclass 30, count 0 2006.229.21:22:44.90#ibcon#read 6, iclass 30, count 0 2006.229.21:22:44.90#ibcon#end of sib2, iclass 30, count 0 2006.229.21:22:44.90#ibcon#*after write, iclass 30, count 0 2006.229.21:22:44.90#ibcon#*before return 0, iclass 30, count 0 2006.229.21:22:44.90#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:22:44.90#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:22:44.90#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:22:44.90#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:22:44.90$vck44/vblo=1,629.99 2006.229.21:22:44.90#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.21:22:44.90#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.21:22:44.90#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:44.90#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:22:44.90#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:22:44.90#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:22:44.90#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:22:44.90#ibcon#first serial, iclass 32, count 0 2006.229.21:22:44.90#ibcon#enter sib2, iclass 32, count 0 2006.229.21:22:44.90#ibcon#flushed, iclass 32, count 0 2006.229.21:22:44.90#ibcon#about to write, iclass 32, count 0 2006.229.21:22:44.90#ibcon#wrote, iclass 32, count 0 2006.229.21:22:44.90#ibcon#about to read 3, iclass 32, count 0 2006.229.21:22:44.92#ibcon#read 3, iclass 32, count 0 2006.229.21:22:44.92#ibcon#about to read 4, iclass 32, count 0 2006.229.21:22:44.92#ibcon#read 4, iclass 32, count 0 2006.229.21:22:44.92#ibcon#about to read 5, iclass 32, count 0 2006.229.21:22:44.92#ibcon#read 5, iclass 32, count 0 2006.229.21:22:44.92#ibcon#about to read 6, iclass 32, count 0 2006.229.21:22:44.92#ibcon#read 6, iclass 32, count 0 2006.229.21:22:44.92#ibcon#end of sib2, iclass 32, count 0 2006.229.21:22:44.92#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:22:44.92#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:22:44.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:22:44.92#ibcon#*before write, iclass 32, count 0 2006.229.21:22:44.92#ibcon#enter sib2, iclass 32, count 0 2006.229.21:22:44.92#ibcon#flushed, iclass 32, count 0 2006.229.21:22:44.92#ibcon#about to write, iclass 32, count 0 2006.229.21:22:44.92#ibcon#wrote, iclass 32, count 0 2006.229.21:22:44.92#ibcon#about to read 3, iclass 32, count 0 2006.229.21:22:44.96#ibcon#read 3, iclass 32, count 0 2006.229.21:22:44.96#ibcon#about to read 4, iclass 32, count 0 2006.229.21:22:44.96#ibcon#read 4, iclass 32, count 0 2006.229.21:22:44.96#ibcon#about to read 5, iclass 32, count 0 2006.229.21:22:44.96#ibcon#read 5, iclass 32, count 0 2006.229.21:22:44.96#ibcon#about to read 6, iclass 32, count 0 2006.229.21:22:44.96#ibcon#read 6, iclass 32, count 0 2006.229.21:22:44.96#ibcon#end of sib2, iclass 32, count 0 2006.229.21:22:44.96#ibcon#*after write, iclass 32, count 0 2006.229.21:22:44.96#ibcon#*before return 0, iclass 32, count 0 2006.229.21:22:44.96#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:22:44.96#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:22:44.96#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:22:44.96#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:22:44.96$vck44/vb=1,4 2006.229.21:22:44.96#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.21:22:44.96#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.21:22:44.96#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:44.96#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:22:44.96#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:22:44.96#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:22:44.96#ibcon#enter wrdev, iclass 34, count 2 2006.229.21:22:44.96#ibcon#first serial, iclass 34, count 2 2006.229.21:22:44.96#ibcon#enter sib2, iclass 34, count 2 2006.229.21:22:44.96#ibcon#flushed, iclass 34, count 2 2006.229.21:22:44.96#ibcon#about to write, iclass 34, count 2 2006.229.21:22:44.96#ibcon#wrote, iclass 34, count 2 2006.229.21:22:44.96#ibcon#about to read 3, iclass 34, count 2 2006.229.21:22:44.98#ibcon#read 3, iclass 34, count 2 2006.229.21:22:44.98#ibcon#about to read 4, iclass 34, count 2 2006.229.21:22:44.98#ibcon#read 4, iclass 34, count 2 2006.229.21:22:44.98#ibcon#about to read 5, iclass 34, count 2 2006.229.21:22:44.98#ibcon#read 5, iclass 34, count 2 2006.229.21:22:44.98#ibcon#about to read 6, iclass 34, count 2 2006.229.21:22:44.98#ibcon#read 6, iclass 34, count 2 2006.229.21:22:44.98#ibcon#end of sib2, iclass 34, count 2 2006.229.21:22:44.98#ibcon#*mode == 0, iclass 34, count 2 2006.229.21:22:44.98#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.21:22:44.98#ibcon#[27=AT01-04\r\n] 2006.229.21:22:44.98#ibcon#*before write, iclass 34, count 2 2006.229.21:22:44.98#ibcon#enter sib2, iclass 34, count 2 2006.229.21:22:44.98#ibcon#flushed, iclass 34, count 2 2006.229.21:22:44.98#ibcon#about to write, iclass 34, count 2 2006.229.21:22:44.98#ibcon#wrote, iclass 34, count 2 2006.229.21:22:44.98#ibcon#about to read 3, iclass 34, count 2 2006.229.21:22:45.01#ibcon#read 3, iclass 34, count 2 2006.229.21:22:45.01#ibcon#about to read 4, iclass 34, count 2 2006.229.21:22:45.01#ibcon#read 4, iclass 34, count 2 2006.229.21:22:45.01#ibcon#about to read 5, iclass 34, count 2 2006.229.21:22:45.01#ibcon#read 5, iclass 34, count 2 2006.229.21:22:45.01#ibcon#about to read 6, iclass 34, count 2 2006.229.21:22:45.01#ibcon#read 6, iclass 34, count 2 2006.229.21:22:45.01#ibcon#end of sib2, iclass 34, count 2 2006.229.21:22:45.01#ibcon#*after write, iclass 34, count 2 2006.229.21:22:45.01#ibcon#*before return 0, iclass 34, count 2 2006.229.21:22:45.01#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:22:45.01#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:22:45.01#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.21:22:45.01#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:45.01#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:22:45.13#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:22:45.13#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:22:45.13#ibcon#enter wrdev, iclass 34, count 0 2006.229.21:22:45.13#ibcon#first serial, iclass 34, count 0 2006.229.21:22:45.13#ibcon#enter sib2, iclass 34, count 0 2006.229.21:22:45.13#ibcon#flushed, iclass 34, count 0 2006.229.21:22:45.13#ibcon#about to write, iclass 34, count 0 2006.229.21:22:45.13#ibcon#wrote, iclass 34, count 0 2006.229.21:22:45.13#ibcon#about to read 3, iclass 34, count 0 2006.229.21:22:45.15#ibcon#read 3, iclass 34, count 0 2006.229.21:22:45.15#ibcon#about to read 4, iclass 34, count 0 2006.229.21:22:45.15#ibcon#read 4, iclass 34, count 0 2006.229.21:22:45.15#ibcon#about to read 5, iclass 34, count 0 2006.229.21:22:45.15#ibcon#read 5, iclass 34, count 0 2006.229.21:22:45.15#ibcon#about to read 6, iclass 34, count 0 2006.229.21:22:45.15#ibcon#read 6, iclass 34, count 0 2006.229.21:22:45.15#ibcon#end of sib2, iclass 34, count 0 2006.229.21:22:45.15#ibcon#*mode == 0, iclass 34, count 0 2006.229.21:22:45.15#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.21:22:45.15#ibcon#[27=USB\r\n] 2006.229.21:22:45.15#ibcon#*before write, iclass 34, count 0 2006.229.21:22:45.15#ibcon#enter sib2, iclass 34, count 0 2006.229.21:22:45.15#ibcon#flushed, iclass 34, count 0 2006.229.21:22:45.15#ibcon#about to write, iclass 34, count 0 2006.229.21:22:45.15#ibcon#wrote, iclass 34, count 0 2006.229.21:22:45.15#ibcon#about to read 3, iclass 34, count 0 2006.229.21:22:45.18#ibcon#read 3, iclass 34, count 0 2006.229.21:22:45.18#ibcon#about to read 4, iclass 34, count 0 2006.229.21:22:45.18#ibcon#read 4, iclass 34, count 0 2006.229.21:22:45.18#ibcon#about to read 5, iclass 34, count 0 2006.229.21:22:45.18#ibcon#read 5, iclass 34, count 0 2006.229.21:22:45.18#ibcon#about to read 6, iclass 34, count 0 2006.229.21:22:45.18#ibcon#read 6, iclass 34, count 0 2006.229.21:22:45.18#ibcon#end of sib2, iclass 34, count 0 2006.229.21:22:45.18#ibcon#*after write, iclass 34, count 0 2006.229.21:22:45.18#ibcon#*before return 0, iclass 34, count 0 2006.229.21:22:45.18#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:22:45.18#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:22:45.18#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.21:22:45.18#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.21:22:45.18$vck44/vblo=2,634.99 2006.229.21:22:45.18#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.21:22:45.18#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.21:22:45.18#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:45.18#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:45.18#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:45.18#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:45.18#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:22:45.18#ibcon#first serial, iclass 36, count 0 2006.229.21:22:45.18#ibcon#enter sib2, iclass 36, count 0 2006.229.21:22:45.18#ibcon#flushed, iclass 36, count 0 2006.229.21:22:45.18#ibcon#about to write, iclass 36, count 0 2006.229.21:22:45.18#ibcon#wrote, iclass 36, count 0 2006.229.21:22:45.18#ibcon#about to read 3, iclass 36, count 0 2006.229.21:22:45.20#ibcon#read 3, iclass 36, count 0 2006.229.21:22:45.20#ibcon#about to read 4, iclass 36, count 0 2006.229.21:22:45.20#ibcon#read 4, iclass 36, count 0 2006.229.21:22:45.20#ibcon#about to read 5, iclass 36, count 0 2006.229.21:22:45.20#ibcon#read 5, iclass 36, count 0 2006.229.21:22:45.20#ibcon#about to read 6, iclass 36, count 0 2006.229.21:22:45.20#ibcon#read 6, iclass 36, count 0 2006.229.21:22:45.20#ibcon#end of sib2, iclass 36, count 0 2006.229.21:22:45.20#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:22:45.20#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:22:45.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:22:45.20#ibcon#*before write, iclass 36, count 0 2006.229.21:22:45.20#ibcon#enter sib2, iclass 36, count 0 2006.229.21:22:45.20#ibcon#flushed, iclass 36, count 0 2006.229.21:22:45.20#ibcon#about to write, iclass 36, count 0 2006.229.21:22:45.20#ibcon#wrote, iclass 36, count 0 2006.229.21:22:45.20#ibcon#about to read 3, iclass 36, count 0 2006.229.21:22:45.24#ibcon#read 3, iclass 36, count 0 2006.229.21:22:45.24#ibcon#about to read 4, iclass 36, count 0 2006.229.21:22:45.24#ibcon#read 4, iclass 36, count 0 2006.229.21:22:45.24#ibcon#about to read 5, iclass 36, count 0 2006.229.21:22:45.24#ibcon#read 5, iclass 36, count 0 2006.229.21:22:45.24#ibcon#about to read 6, iclass 36, count 0 2006.229.21:22:45.24#ibcon#read 6, iclass 36, count 0 2006.229.21:22:45.24#ibcon#end of sib2, iclass 36, count 0 2006.229.21:22:45.24#ibcon#*after write, iclass 36, count 0 2006.229.21:22:45.24#ibcon#*before return 0, iclass 36, count 0 2006.229.21:22:45.24#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:45.24#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:22:45.24#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:22:45.24#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:22:45.24$vck44/vb=2,4 2006.229.21:22:45.24#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.21:22:45.24#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.21:22:45.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:45.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:45.30#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:45.30#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:45.30#ibcon#enter wrdev, iclass 38, count 2 2006.229.21:22:45.30#ibcon#first serial, iclass 38, count 2 2006.229.21:22:45.30#ibcon#enter sib2, iclass 38, count 2 2006.229.21:22:45.30#ibcon#flushed, iclass 38, count 2 2006.229.21:22:45.30#ibcon#about to write, iclass 38, count 2 2006.229.21:22:45.30#ibcon#wrote, iclass 38, count 2 2006.229.21:22:45.30#ibcon#about to read 3, iclass 38, count 2 2006.229.21:22:45.32#ibcon#read 3, iclass 38, count 2 2006.229.21:22:45.32#ibcon#about to read 4, iclass 38, count 2 2006.229.21:22:45.32#ibcon#read 4, iclass 38, count 2 2006.229.21:22:45.32#ibcon#about to read 5, iclass 38, count 2 2006.229.21:22:45.32#ibcon#read 5, iclass 38, count 2 2006.229.21:22:45.32#ibcon#about to read 6, iclass 38, count 2 2006.229.21:22:45.32#ibcon#read 6, iclass 38, count 2 2006.229.21:22:45.32#ibcon#end of sib2, iclass 38, count 2 2006.229.21:22:45.32#ibcon#*mode == 0, iclass 38, count 2 2006.229.21:22:45.32#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.21:22:45.32#ibcon#[27=AT02-04\r\n] 2006.229.21:22:45.32#ibcon#*before write, iclass 38, count 2 2006.229.21:22:45.32#ibcon#enter sib2, iclass 38, count 2 2006.229.21:22:45.32#ibcon#flushed, iclass 38, count 2 2006.229.21:22:45.32#ibcon#about to write, iclass 38, count 2 2006.229.21:22:45.32#ibcon#wrote, iclass 38, count 2 2006.229.21:22:45.32#ibcon#about to read 3, iclass 38, count 2 2006.229.21:22:45.35#ibcon#read 3, iclass 38, count 2 2006.229.21:22:45.35#ibcon#about to read 4, iclass 38, count 2 2006.229.21:22:45.35#ibcon#read 4, iclass 38, count 2 2006.229.21:22:45.35#ibcon#about to read 5, iclass 38, count 2 2006.229.21:22:45.35#ibcon#read 5, iclass 38, count 2 2006.229.21:22:45.35#ibcon#about to read 6, iclass 38, count 2 2006.229.21:22:45.35#ibcon#read 6, iclass 38, count 2 2006.229.21:22:45.35#ibcon#end of sib2, iclass 38, count 2 2006.229.21:22:45.35#ibcon#*after write, iclass 38, count 2 2006.229.21:22:45.35#ibcon#*before return 0, iclass 38, count 2 2006.229.21:22:45.35#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:45.35#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:22:45.35#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.21:22:45.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:45.35#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:45.47#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:45.47#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:45.47#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:22:45.47#ibcon#first serial, iclass 38, count 0 2006.229.21:22:45.47#ibcon#enter sib2, iclass 38, count 0 2006.229.21:22:45.47#ibcon#flushed, iclass 38, count 0 2006.229.21:22:45.47#ibcon#about to write, iclass 38, count 0 2006.229.21:22:45.47#ibcon#wrote, iclass 38, count 0 2006.229.21:22:45.47#ibcon#about to read 3, iclass 38, count 0 2006.229.21:22:45.49#ibcon#read 3, iclass 38, count 0 2006.229.21:22:45.49#ibcon#about to read 4, iclass 38, count 0 2006.229.21:22:45.49#ibcon#read 4, iclass 38, count 0 2006.229.21:22:45.49#ibcon#about to read 5, iclass 38, count 0 2006.229.21:22:45.49#ibcon#read 5, iclass 38, count 0 2006.229.21:22:45.49#ibcon#about to read 6, iclass 38, count 0 2006.229.21:22:45.49#ibcon#read 6, iclass 38, count 0 2006.229.21:22:45.49#ibcon#end of sib2, iclass 38, count 0 2006.229.21:22:45.49#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:22:45.49#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:22:45.49#ibcon#[27=USB\r\n] 2006.229.21:22:45.49#ibcon#*before write, iclass 38, count 0 2006.229.21:22:45.49#ibcon#enter sib2, iclass 38, count 0 2006.229.21:22:45.49#ibcon#flushed, iclass 38, count 0 2006.229.21:22:45.49#ibcon#about to write, iclass 38, count 0 2006.229.21:22:45.49#ibcon#wrote, iclass 38, count 0 2006.229.21:22:45.49#ibcon#about to read 3, iclass 38, count 0 2006.229.21:22:45.52#ibcon#read 3, iclass 38, count 0 2006.229.21:22:45.52#ibcon#about to read 4, iclass 38, count 0 2006.229.21:22:45.52#ibcon#read 4, iclass 38, count 0 2006.229.21:22:45.52#ibcon#about to read 5, iclass 38, count 0 2006.229.21:22:45.52#ibcon#read 5, iclass 38, count 0 2006.229.21:22:45.52#ibcon#about to read 6, iclass 38, count 0 2006.229.21:22:45.52#ibcon#read 6, iclass 38, count 0 2006.229.21:22:45.52#ibcon#end of sib2, iclass 38, count 0 2006.229.21:22:45.52#ibcon#*after write, iclass 38, count 0 2006.229.21:22:45.52#ibcon#*before return 0, iclass 38, count 0 2006.229.21:22:45.52#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:45.52#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:22:45.52#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:22:45.52#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:22:45.52$vck44/vblo=3,649.99 2006.229.21:22:45.52#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.21:22:45.52#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.21:22:45.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:45.52#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:45.52#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:45.52#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:45.52#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:22:45.52#ibcon#first serial, iclass 40, count 0 2006.229.21:22:45.52#ibcon#enter sib2, iclass 40, count 0 2006.229.21:22:45.52#ibcon#flushed, iclass 40, count 0 2006.229.21:22:45.52#ibcon#about to write, iclass 40, count 0 2006.229.21:22:45.52#ibcon#wrote, iclass 40, count 0 2006.229.21:22:45.52#ibcon#about to read 3, iclass 40, count 0 2006.229.21:22:45.54#ibcon#read 3, iclass 40, count 0 2006.229.21:22:45.54#ibcon#about to read 4, iclass 40, count 0 2006.229.21:22:45.54#ibcon#read 4, iclass 40, count 0 2006.229.21:22:45.54#ibcon#about to read 5, iclass 40, count 0 2006.229.21:22:45.54#ibcon#read 5, iclass 40, count 0 2006.229.21:22:45.54#ibcon#about to read 6, iclass 40, count 0 2006.229.21:22:45.54#ibcon#read 6, iclass 40, count 0 2006.229.21:22:45.54#ibcon#end of sib2, iclass 40, count 0 2006.229.21:22:45.54#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:22:45.54#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:22:45.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:22:45.54#ibcon#*before write, iclass 40, count 0 2006.229.21:22:45.54#ibcon#enter sib2, iclass 40, count 0 2006.229.21:22:45.54#ibcon#flushed, iclass 40, count 0 2006.229.21:22:45.54#ibcon#about to write, iclass 40, count 0 2006.229.21:22:45.54#ibcon#wrote, iclass 40, count 0 2006.229.21:22:45.54#ibcon#about to read 3, iclass 40, count 0 2006.229.21:22:45.58#ibcon#read 3, iclass 40, count 0 2006.229.21:22:45.58#ibcon#about to read 4, iclass 40, count 0 2006.229.21:22:45.58#ibcon#read 4, iclass 40, count 0 2006.229.21:22:45.58#ibcon#about to read 5, iclass 40, count 0 2006.229.21:22:45.58#ibcon#read 5, iclass 40, count 0 2006.229.21:22:45.58#ibcon#about to read 6, iclass 40, count 0 2006.229.21:22:45.58#ibcon#read 6, iclass 40, count 0 2006.229.21:22:45.58#ibcon#end of sib2, iclass 40, count 0 2006.229.21:22:45.58#ibcon#*after write, iclass 40, count 0 2006.229.21:22:45.58#ibcon#*before return 0, iclass 40, count 0 2006.229.21:22:45.58#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:45.58#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:22:45.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:22:45.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:22:45.58$vck44/vb=3,4 2006.229.21:22:45.58#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.21:22:45.58#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.21:22:45.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:45.58#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:45.64#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:45.64#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:45.64#ibcon#enter wrdev, iclass 4, count 2 2006.229.21:22:45.64#ibcon#first serial, iclass 4, count 2 2006.229.21:22:45.64#ibcon#enter sib2, iclass 4, count 2 2006.229.21:22:45.64#ibcon#flushed, iclass 4, count 2 2006.229.21:22:45.64#ibcon#about to write, iclass 4, count 2 2006.229.21:22:45.64#ibcon#wrote, iclass 4, count 2 2006.229.21:22:45.64#ibcon#about to read 3, iclass 4, count 2 2006.229.21:22:45.66#ibcon#read 3, iclass 4, count 2 2006.229.21:22:45.66#ibcon#about to read 4, iclass 4, count 2 2006.229.21:22:45.66#ibcon#read 4, iclass 4, count 2 2006.229.21:22:45.66#ibcon#about to read 5, iclass 4, count 2 2006.229.21:22:45.66#ibcon#read 5, iclass 4, count 2 2006.229.21:22:45.66#ibcon#about to read 6, iclass 4, count 2 2006.229.21:22:45.66#ibcon#read 6, iclass 4, count 2 2006.229.21:22:45.66#ibcon#end of sib2, iclass 4, count 2 2006.229.21:22:45.66#ibcon#*mode == 0, iclass 4, count 2 2006.229.21:22:45.66#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.21:22:45.66#ibcon#[27=AT03-04\r\n] 2006.229.21:22:45.66#ibcon#*before write, iclass 4, count 2 2006.229.21:22:45.66#ibcon#enter sib2, iclass 4, count 2 2006.229.21:22:45.66#ibcon#flushed, iclass 4, count 2 2006.229.21:22:45.66#ibcon#about to write, iclass 4, count 2 2006.229.21:22:45.66#ibcon#wrote, iclass 4, count 2 2006.229.21:22:45.66#ibcon#about to read 3, iclass 4, count 2 2006.229.21:22:45.69#ibcon#read 3, iclass 4, count 2 2006.229.21:22:45.69#ibcon#about to read 4, iclass 4, count 2 2006.229.21:22:45.69#ibcon#read 4, iclass 4, count 2 2006.229.21:22:45.69#ibcon#about to read 5, iclass 4, count 2 2006.229.21:22:45.69#ibcon#read 5, iclass 4, count 2 2006.229.21:22:45.69#ibcon#about to read 6, iclass 4, count 2 2006.229.21:22:45.69#ibcon#read 6, iclass 4, count 2 2006.229.21:22:45.69#ibcon#end of sib2, iclass 4, count 2 2006.229.21:22:45.69#ibcon#*after write, iclass 4, count 2 2006.229.21:22:45.69#ibcon#*before return 0, iclass 4, count 2 2006.229.21:22:45.69#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:45.69#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:22:45.69#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.21:22:45.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:45.69#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:45.81#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:45.81#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:45.81#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:22:45.81#ibcon#first serial, iclass 4, count 0 2006.229.21:22:45.81#ibcon#enter sib2, iclass 4, count 0 2006.229.21:22:45.81#ibcon#flushed, iclass 4, count 0 2006.229.21:22:45.81#ibcon#about to write, iclass 4, count 0 2006.229.21:22:45.81#ibcon#wrote, iclass 4, count 0 2006.229.21:22:45.81#ibcon#about to read 3, iclass 4, count 0 2006.229.21:22:45.83#ibcon#read 3, iclass 4, count 0 2006.229.21:22:45.83#ibcon#about to read 4, iclass 4, count 0 2006.229.21:22:45.83#ibcon#read 4, iclass 4, count 0 2006.229.21:22:45.83#ibcon#about to read 5, iclass 4, count 0 2006.229.21:22:45.83#ibcon#read 5, iclass 4, count 0 2006.229.21:22:45.83#ibcon#about to read 6, iclass 4, count 0 2006.229.21:22:45.83#ibcon#read 6, iclass 4, count 0 2006.229.21:22:45.83#ibcon#end of sib2, iclass 4, count 0 2006.229.21:22:45.83#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:22:45.83#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:22:45.83#ibcon#[27=USB\r\n] 2006.229.21:22:45.83#ibcon#*before write, iclass 4, count 0 2006.229.21:22:45.83#ibcon#enter sib2, iclass 4, count 0 2006.229.21:22:45.83#ibcon#flushed, iclass 4, count 0 2006.229.21:22:45.83#ibcon#about to write, iclass 4, count 0 2006.229.21:22:45.83#ibcon#wrote, iclass 4, count 0 2006.229.21:22:45.83#ibcon#about to read 3, iclass 4, count 0 2006.229.21:22:45.86#ibcon#read 3, iclass 4, count 0 2006.229.21:22:45.86#ibcon#about to read 4, iclass 4, count 0 2006.229.21:22:45.86#ibcon#read 4, iclass 4, count 0 2006.229.21:22:45.86#ibcon#about to read 5, iclass 4, count 0 2006.229.21:22:45.86#ibcon#read 5, iclass 4, count 0 2006.229.21:22:45.86#ibcon#about to read 6, iclass 4, count 0 2006.229.21:22:45.86#ibcon#read 6, iclass 4, count 0 2006.229.21:22:45.86#ibcon#end of sib2, iclass 4, count 0 2006.229.21:22:45.86#ibcon#*after write, iclass 4, count 0 2006.229.21:22:45.86#ibcon#*before return 0, iclass 4, count 0 2006.229.21:22:45.86#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:45.86#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:22:45.86#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:22:45.86#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:22:45.86$vck44/vblo=4,679.99 2006.229.21:22:45.86#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.21:22:45.86#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.21:22:45.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:45.86#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:45.86#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:45.86#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:45.86#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:22:45.86#ibcon#first serial, iclass 6, count 0 2006.229.21:22:45.86#ibcon#enter sib2, iclass 6, count 0 2006.229.21:22:45.86#ibcon#flushed, iclass 6, count 0 2006.229.21:22:45.86#ibcon#about to write, iclass 6, count 0 2006.229.21:22:45.86#ibcon#wrote, iclass 6, count 0 2006.229.21:22:45.86#ibcon#about to read 3, iclass 6, count 0 2006.229.21:22:45.88#ibcon#read 3, iclass 6, count 0 2006.229.21:22:45.88#ibcon#about to read 4, iclass 6, count 0 2006.229.21:22:45.88#ibcon#read 4, iclass 6, count 0 2006.229.21:22:45.88#ibcon#about to read 5, iclass 6, count 0 2006.229.21:22:45.88#ibcon#read 5, iclass 6, count 0 2006.229.21:22:45.88#ibcon#about to read 6, iclass 6, count 0 2006.229.21:22:45.88#ibcon#read 6, iclass 6, count 0 2006.229.21:22:45.88#ibcon#end of sib2, iclass 6, count 0 2006.229.21:22:45.88#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:22:45.88#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:22:45.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:22:45.88#ibcon#*before write, iclass 6, count 0 2006.229.21:22:45.88#ibcon#enter sib2, iclass 6, count 0 2006.229.21:22:45.88#ibcon#flushed, iclass 6, count 0 2006.229.21:22:45.88#ibcon#about to write, iclass 6, count 0 2006.229.21:22:45.88#ibcon#wrote, iclass 6, count 0 2006.229.21:22:45.88#ibcon#about to read 3, iclass 6, count 0 2006.229.21:22:45.92#ibcon#read 3, iclass 6, count 0 2006.229.21:22:45.92#ibcon#about to read 4, iclass 6, count 0 2006.229.21:22:45.92#ibcon#read 4, iclass 6, count 0 2006.229.21:22:45.92#ibcon#about to read 5, iclass 6, count 0 2006.229.21:22:45.92#ibcon#read 5, iclass 6, count 0 2006.229.21:22:45.92#ibcon#about to read 6, iclass 6, count 0 2006.229.21:22:45.92#ibcon#read 6, iclass 6, count 0 2006.229.21:22:45.92#ibcon#end of sib2, iclass 6, count 0 2006.229.21:22:45.92#ibcon#*after write, iclass 6, count 0 2006.229.21:22:45.92#ibcon#*before return 0, iclass 6, count 0 2006.229.21:22:45.92#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:45.92#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:22:45.92#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:22:45.92#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:22:45.92$vck44/vb=4,4 2006.229.21:22:45.92#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.21:22:45.92#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.21:22:45.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:45.92#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:45.98#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:45.98#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:45.98#ibcon#enter wrdev, iclass 10, count 2 2006.229.21:22:45.98#ibcon#first serial, iclass 10, count 2 2006.229.21:22:45.98#ibcon#enter sib2, iclass 10, count 2 2006.229.21:22:45.98#ibcon#flushed, iclass 10, count 2 2006.229.21:22:45.98#ibcon#about to write, iclass 10, count 2 2006.229.21:22:45.98#ibcon#wrote, iclass 10, count 2 2006.229.21:22:45.98#ibcon#about to read 3, iclass 10, count 2 2006.229.21:22:46.00#ibcon#read 3, iclass 10, count 2 2006.229.21:22:46.00#ibcon#about to read 4, iclass 10, count 2 2006.229.21:22:46.00#ibcon#read 4, iclass 10, count 2 2006.229.21:22:46.00#ibcon#about to read 5, iclass 10, count 2 2006.229.21:22:46.00#ibcon#read 5, iclass 10, count 2 2006.229.21:22:46.00#ibcon#about to read 6, iclass 10, count 2 2006.229.21:22:46.00#ibcon#read 6, iclass 10, count 2 2006.229.21:22:46.00#ibcon#end of sib2, iclass 10, count 2 2006.229.21:22:46.00#ibcon#*mode == 0, iclass 10, count 2 2006.229.21:22:46.00#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.21:22:46.00#ibcon#[27=AT04-04\r\n] 2006.229.21:22:46.00#ibcon#*before write, iclass 10, count 2 2006.229.21:22:46.00#ibcon#enter sib2, iclass 10, count 2 2006.229.21:22:46.00#ibcon#flushed, iclass 10, count 2 2006.229.21:22:46.00#ibcon#about to write, iclass 10, count 2 2006.229.21:22:46.00#ibcon#wrote, iclass 10, count 2 2006.229.21:22:46.00#ibcon#about to read 3, iclass 10, count 2 2006.229.21:22:46.03#ibcon#read 3, iclass 10, count 2 2006.229.21:22:46.03#ibcon#about to read 4, iclass 10, count 2 2006.229.21:22:46.03#ibcon#read 4, iclass 10, count 2 2006.229.21:22:46.03#ibcon#about to read 5, iclass 10, count 2 2006.229.21:22:46.03#ibcon#read 5, iclass 10, count 2 2006.229.21:22:46.03#ibcon#about to read 6, iclass 10, count 2 2006.229.21:22:46.03#ibcon#read 6, iclass 10, count 2 2006.229.21:22:46.03#ibcon#end of sib2, iclass 10, count 2 2006.229.21:22:46.03#ibcon#*after write, iclass 10, count 2 2006.229.21:22:46.03#ibcon#*before return 0, iclass 10, count 2 2006.229.21:22:46.03#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:46.03#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:22:46.03#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.21:22:46.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:46.03#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:46.15#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:46.15#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:46.15#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:22:46.15#ibcon#first serial, iclass 10, count 0 2006.229.21:22:46.15#ibcon#enter sib2, iclass 10, count 0 2006.229.21:22:46.15#ibcon#flushed, iclass 10, count 0 2006.229.21:22:46.15#ibcon#about to write, iclass 10, count 0 2006.229.21:22:46.15#ibcon#wrote, iclass 10, count 0 2006.229.21:22:46.15#ibcon#about to read 3, iclass 10, count 0 2006.229.21:22:46.17#ibcon#read 3, iclass 10, count 0 2006.229.21:22:46.17#ibcon#about to read 4, iclass 10, count 0 2006.229.21:22:46.17#ibcon#read 4, iclass 10, count 0 2006.229.21:22:46.17#ibcon#about to read 5, iclass 10, count 0 2006.229.21:22:46.17#ibcon#read 5, iclass 10, count 0 2006.229.21:22:46.17#ibcon#about to read 6, iclass 10, count 0 2006.229.21:22:46.17#ibcon#read 6, iclass 10, count 0 2006.229.21:22:46.17#ibcon#end of sib2, iclass 10, count 0 2006.229.21:22:46.17#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:22:46.17#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:22:46.17#ibcon#[27=USB\r\n] 2006.229.21:22:46.17#ibcon#*before write, iclass 10, count 0 2006.229.21:22:46.17#ibcon#enter sib2, iclass 10, count 0 2006.229.21:22:46.17#ibcon#flushed, iclass 10, count 0 2006.229.21:22:46.17#ibcon#about to write, iclass 10, count 0 2006.229.21:22:46.17#ibcon#wrote, iclass 10, count 0 2006.229.21:22:46.17#ibcon#about to read 3, iclass 10, count 0 2006.229.21:22:46.20#ibcon#read 3, iclass 10, count 0 2006.229.21:22:46.20#ibcon#about to read 4, iclass 10, count 0 2006.229.21:22:46.20#ibcon#read 4, iclass 10, count 0 2006.229.21:22:46.20#ibcon#about to read 5, iclass 10, count 0 2006.229.21:22:46.20#ibcon#read 5, iclass 10, count 0 2006.229.21:22:46.20#ibcon#about to read 6, iclass 10, count 0 2006.229.21:22:46.20#ibcon#read 6, iclass 10, count 0 2006.229.21:22:46.20#ibcon#end of sib2, iclass 10, count 0 2006.229.21:22:46.20#ibcon#*after write, iclass 10, count 0 2006.229.21:22:46.20#ibcon#*before return 0, iclass 10, count 0 2006.229.21:22:46.20#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:46.20#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:22:46.20#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:22:46.20#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:22:46.20$vck44/vblo=5,709.99 2006.229.21:22:46.20#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.21:22:46.20#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.21:22:46.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:46.20#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:46.20#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:46.20#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:46.20#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:22:46.20#ibcon#first serial, iclass 12, count 0 2006.229.21:22:46.20#ibcon#enter sib2, iclass 12, count 0 2006.229.21:22:46.20#ibcon#flushed, iclass 12, count 0 2006.229.21:22:46.20#ibcon#about to write, iclass 12, count 0 2006.229.21:22:46.20#ibcon#wrote, iclass 12, count 0 2006.229.21:22:46.20#ibcon#about to read 3, iclass 12, count 0 2006.229.21:22:46.22#ibcon#read 3, iclass 12, count 0 2006.229.21:22:46.22#ibcon#about to read 4, iclass 12, count 0 2006.229.21:22:46.22#ibcon#read 4, iclass 12, count 0 2006.229.21:22:46.22#ibcon#about to read 5, iclass 12, count 0 2006.229.21:22:46.22#ibcon#read 5, iclass 12, count 0 2006.229.21:22:46.22#ibcon#about to read 6, iclass 12, count 0 2006.229.21:22:46.22#ibcon#read 6, iclass 12, count 0 2006.229.21:22:46.22#ibcon#end of sib2, iclass 12, count 0 2006.229.21:22:46.22#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:22:46.22#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:22:46.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:22:46.22#ibcon#*before write, iclass 12, count 0 2006.229.21:22:46.22#ibcon#enter sib2, iclass 12, count 0 2006.229.21:22:46.22#ibcon#flushed, iclass 12, count 0 2006.229.21:22:46.22#ibcon#about to write, iclass 12, count 0 2006.229.21:22:46.22#ibcon#wrote, iclass 12, count 0 2006.229.21:22:46.22#ibcon#about to read 3, iclass 12, count 0 2006.229.21:22:46.26#ibcon#read 3, iclass 12, count 0 2006.229.21:22:46.26#ibcon#about to read 4, iclass 12, count 0 2006.229.21:22:46.26#ibcon#read 4, iclass 12, count 0 2006.229.21:22:46.26#ibcon#about to read 5, iclass 12, count 0 2006.229.21:22:46.26#ibcon#read 5, iclass 12, count 0 2006.229.21:22:46.26#ibcon#about to read 6, iclass 12, count 0 2006.229.21:22:46.26#ibcon#read 6, iclass 12, count 0 2006.229.21:22:46.26#ibcon#end of sib2, iclass 12, count 0 2006.229.21:22:46.26#ibcon#*after write, iclass 12, count 0 2006.229.21:22:46.26#ibcon#*before return 0, iclass 12, count 0 2006.229.21:22:46.26#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:46.26#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:22:46.26#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:22:46.26#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:22:46.26$vck44/vb=5,4 2006.229.21:22:46.26#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.21:22:46.26#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.21:22:46.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:46.26#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:46.32#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:46.32#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:46.32#ibcon#enter wrdev, iclass 14, count 2 2006.229.21:22:46.32#ibcon#first serial, iclass 14, count 2 2006.229.21:22:46.32#ibcon#enter sib2, iclass 14, count 2 2006.229.21:22:46.32#ibcon#flushed, iclass 14, count 2 2006.229.21:22:46.32#ibcon#about to write, iclass 14, count 2 2006.229.21:22:46.32#ibcon#wrote, iclass 14, count 2 2006.229.21:22:46.32#ibcon#about to read 3, iclass 14, count 2 2006.229.21:22:46.34#ibcon#read 3, iclass 14, count 2 2006.229.21:22:46.34#ibcon#about to read 4, iclass 14, count 2 2006.229.21:22:46.34#ibcon#read 4, iclass 14, count 2 2006.229.21:22:46.34#ibcon#about to read 5, iclass 14, count 2 2006.229.21:22:46.34#ibcon#read 5, iclass 14, count 2 2006.229.21:22:46.34#ibcon#about to read 6, iclass 14, count 2 2006.229.21:22:46.34#ibcon#read 6, iclass 14, count 2 2006.229.21:22:46.34#ibcon#end of sib2, iclass 14, count 2 2006.229.21:22:46.34#ibcon#*mode == 0, iclass 14, count 2 2006.229.21:22:46.34#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.21:22:46.34#ibcon#[27=AT05-04\r\n] 2006.229.21:22:46.34#ibcon#*before write, iclass 14, count 2 2006.229.21:22:46.34#ibcon#enter sib2, iclass 14, count 2 2006.229.21:22:46.34#ibcon#flushed, iclass 14, count 2 2006.229.21:22:46.34#ibcon#about to write, iclass 14, count 2 2006.229.21:22:46.34#ibcon#wrote, iclass 14, count 2 2006.229.21:22:46.34#ibcon#about to read 3, iclass 14, count 2 2006.229.21:22:46.37#ibcon#read 3, iclass 14, count 2 2006.229.21:22:46.37#ibcon#about to read 4, iclass 14, count 2 2006.229.21:22:46.37#ibcon#read 4, iclass 14, count 2 2006.229.21:22:46.37#ibcon#about to read 5, iclass 14, count 2 2006.229.21:22:46.37#ibcon#read 5, iclass 14, count 2 2006.229.21:22:46.37#ibcon#about to read 6, iclass 14, count 2 2006.229.21:22:46.37#ibcon#read 6, iclass 14, count 2 2006.229.21:22:46.37#ibcon#end of sib2, iclass 14, count 2 2006.229.21:22:46.37#ibcon#*after write, iclass 14, count 2 2006.229.21:22:46.37#ibcon#*before return 0, iclass 14, count 2 2006.229.21:22:46.37#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:46.37#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:22:46.37#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.21:22:46.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:46.37#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:46.49#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:46.49#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:46.49#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:22:46.49#ibcon#first serial, iclass 14, count 0 2006.229.21:22:46.49#ibcon#enter sib2, iclass 14, count 0 2006.229.21:22:46.49#ibcon#flushed, iclass 14, count 0 2006.229.21:22:46.49#ibcon#about to write, iclass 14, count 0 2006.229.21:22:46.49#ibcon#wrote, iclass 14, count 0 2006.229.21:22:46.49#ibcon#about to read 3, iclass 14, count 0 2006.229.21:22:46.51#ibcon#read 3, iclass 14, count 0 2006.229.21:22:46.51#ibcon#about to read 4, iclass 14, count 0 2006.229.21:22:46.51#ibcon#read 4, iclass 14, count 0 2006.229.21:22:46.51#ibcon#about to read 5, iclass 14, count 0 2006.229.21:22:46.51#ibcon#read 5, iclass 14, count 0 2006.229.21:22:46.51#ibcon#about to read 6, iclass 14, count 0 2006.229.21:22:46.51#ibcon#read 6, iclass 14, count 0 2006.229.21:22:46.51#ibcon#end of sib2, iclass 14, count 0 2006.229.21:22:46.51#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:22:46.51#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:22:46.51#ibcon#[27=USB\r\n] 2006.229.21:22:46.51#ibcon#*before write, iclass 14, count 0 2006.229.21:22:46.51#ibcon#enter sib2, iclass 14, count 0 2006.229.21:22:46.51#ibcon#flushed, iclass 14, count 0 2006.229.21:22:46.51#ibcon#about to write, iclass 14, count 0 2006.229.21:22:46.51#ibcon#wrote, iclass 14, count 0 2006.229.21:22:46.51#ibcon#about to read 3, iclass 14, count 0 2006.229.21:22:46.54#ibcon#read 3, iclass 14, count 0 2006.229.21:22:46.54#ibcon#about to read 4, iclass 14, count 0 2006.229.21:22:46.54#ibcon#read 4, iclass 14, count 0 2006.229.21:22:46.54#ibcon#about to read 5, iclass 14, count 0 2006.229.21:22:46.54#ibcon#read 5, iclass 14, count 0 2006.229.21:22:46.54#ibcon#about to read 6, iclass 14, count 0 2006.229.21:22:46.54#ibcon#read 6, iclass 14, count 0 2006.229.21:22:46.54#ibcon#end of sib2, iclass 14, count 0 2006.229.21:22:46.54#ibcon#*after write, iclass 14, count 0 2006.229.21:22:46.54#ibcon#*before return 0, iclass 14, count 0 2006.229.21:22:46.54#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:46.54#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:22:46.54#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:22:46.54#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:22:46.54$vck44/vblo=6,719.99 2006.229.21:22:46.54#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.21:22:46.54#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.21:22:46.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:46.54#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:46.54#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:46.54#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:46.54#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:22:46.54#ibcon#first serial, iclass 16, count 0 2006.229.21:22:46.54#ibcon#enter sib2, iclass 16, count 0 2006.229.21:22:46.54#ibcon#flushed, iclass 16, count 0 2006.229.21:22:46.54#ibcon#about to write, iclass 16, count 0 2006.229.21:22:46.54#ibcon#wrote, iclass 16, count 0 2006.229.21:22:46.54#ibcon#about to read 3, iclass 16, count 0 2006.229.21:22:46.56#ibcon#read 3, iclass 16, count 0 2006.229.21:22:46.56#ibcon#about to read 4, iclass 16, count 0 2006.229.21:22:46.56#ibcon#read 4, iclass 16, count 0 2006.229.21:22:46.56#ibcon#about to read 5, iclass 16, count 0 2006.229.21:22:46.56#ibcon#read 5, iclass 16, count 0 2006.229.21:22:46.56#ibcon#about to read 6, iclass 16, count 0 2006.229.21:22:46.56#ibcon#read 6, iclass 16, count 0 2006.229.21:22:46.56#ibcon#end of sib2, iclass 16, count 0 2006.229.21:22:46.56#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:22:46.56#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:22:46.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:22:46.56#ibcon#*before write, iclass 16, count 0 2006.229.21:22:46.56#ibcon#enter sib2, iclass 16, count 0 2006.229.21:22:46.56#ibcon#flushed, iclass 16, count 0 2006.229.21:22:46.56#ibcon#about to write, iclass 16, count 0 2006.229.21:22:46.56#ibcon#wrote, iclass 16, count 0 2006.229.21:22:46.56#ibcon#about to read 3, iclass 16, count 0 2006.229.21:22:46.60#ibcon#read 3, iclass 16, count 0 2006.229.21:22:46.60#ibcon#about to read 4, iclass 16, count 0 2006.229.21:22:46.60#ibcon#read 4, iclass 16, count 0 2006.229.21:22:46.60#ibcon#about to read 5, iclass 16, count 0 2006.229.21:22:46.60#ibcon#read 5, iclass 16, count 0 2006.229.21:22:46.60#ibcon#about to read 6, iclass 16, count 0 2006.229.21:22:46.60#ibcon#read 6, iclass 16, count 0 2006.229.21:22:46.60#ibcon#end of sib2, iclass 16, count 0 2006.229.21:22:46.60#ibcon#*after write, iclass 16, count 0 2006.229.21:22:46.60#ibcon#*before return 0, iclass 16, count 0 2006.229.21:22:46.60#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:46.60#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:22:46.60#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:22:46.60#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:22:46.60$vck44/vb=6,4 2006.229.21:22:46.60#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.21:22:46.60#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.21:22:46.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:46.60#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:46.66#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:46.66#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:46.66#ibcon#enter wrdev, iclass 18, count 2 2006.229.21:22:46.66#ibcon#first serial, iclass 18, count 2 2006.229.21:22:46.66#ibcon#enter sib2, iclass 18, count 2 2006.229.21:22:46.66#ibcon#flushed, iclass 18, count 2 2006.229.21:22:46.66#ibcon#about to write, iclass 18, count 2 2006.229.21:22:46.66#ibcon#wrote, iclass 18, count 2 2006.229.21:22:46.66#ibcon#about to read 3, iclass 18, count 2 2006.229.21:22:46.68#ibcon#read 3, iclass 18, count 2 2006.229.21:22:46.68#ibcon#about to read 4, iclass 18, count 2 2006.229.21:22:46.68#ibcon#read 4, iclass 18, count 2 2006.229.21:22:46.68#ibcon#about to read 5, iclass 18, count 2 2006.229.21:22:46.68#ibcon#read 5, iclass 18, count 2 2006.229.21:22:46.68#ibcon#about to read 6, iclass 18, count 2 2006.229.21:22:46.68#ibcon#read 6, iclass 18, count 2 2006.229.21:22:46.68#ibcon#end of sib2, iclass 18, count 2 2006.229.21:22:46.68#ibcon#*mode == 0, iclass 18, count 2 2006.229.21:22:46.68#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.21:22:46.68#ibcon#[27=AT06-04\r\n] 2006.229.21:22:46.68#ibcon#*before write, iclass 18, count 2 2006.229.21:22:46.68#ibcon#enter sib2, iclass 18, count 2 2006.229.21:22:46.68#ibcon#flushed, iclass 18, count 2 2006.229.21:22:46.68#ibcon#about to write, iclass 18, count 2 2006.229.21:22:46.68#ibcon#wrote, iclass 18, count 2 2006.229.21:22:46.68#ibcon#about to read 3, iclass 18, count 2 2006.229.21:22:46.71#ibcon#read 3, iclass 18, count 2 2006.229.21:22:46.71#ibcon#about to read 4, iclass 18, count 2 2006.229.21:22:46.71#ibcon#read 4, iclass 18, count 2 2006.229.21:22:46.71#ibcon#about to read 5, iclass 18, count 2 2006.229.21:22:46.71#ibcon#read 5, iclass 18, count 2 2006.229.21:22:46.71#ibcon#about to read 6, iclass 18, count 2 2006.229.21:22:46.71#ibcon#read 6, iclass 18, count 2 2006.229.21:22:46.71#ibcon#end of sib2, iclass 18, count 2 2006.229.21:22:46.71#ibcon#*after write, iclass 18, count 2 2006.229.21:22:46.71#ibcon#*before return 0, iclass 18, count 2 2006.229.21:22:46.71#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:46.71#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:22:46.71#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.21:22:46.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:46.71#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:46.83#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:46.83#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:46.83#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:22:46.83#ibcon#first serial, iclass 18, count 0 2006.229.21:22:46.83#ibcon#enter sib2, iclass 18, count 0 2006.229.21:22:46.83#ibcon#flushed, iclass 18, count 0 2006.229.21:22:46.83#ibcon#about to write, iclass 18, count 0 2006.229.21:22:46.83#ibcon#wrote, iclass 18, count 0 2006.229.21:22:46.83#ibcon#about to read 3, iclass 18, count 0 2006.229.21:22:46.85#ibcon#read 3, iclass 18, count 0 2006.229.21:22:46.85#ibcon#about to read 4, iclass 18, count 0 2006.229.21:22:46.85#ibcon#read 4, iclass 18, count 0 2006.229.21:22:46.85#ibcon#about to read 5, iclass 18, count 0 2006.229.21:22:46.85#ibcon#read 5, iclass 18, count 0 2006.229.21:22:46.85#ibcon#about to read 6, iclass 18, count 0 2006.229.21:22:46.85#ibcon#read 6, iclass 18, count 0 2006.229.21:22:46.85#ibcon#end of sib2, iclass 18, count 0 2006.229.21:22:46.85#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:22:46.85#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:22:46.85#ibcon#[27=USB\r\n] 2006.229.21:22:46.85#ibcon#*before write, iclass 18, count 0 2006.229.21:22:46.85#ibcon#enter sib2, iclass 18, count 0 2006.229.21:22:46.85#ibcon#flushed, iclass 18, count 0 2006.229.21:22:46.85#ibcon#about to write, iclass 18, count 0 2006.229.21:22:46.85#ibcon#wrote, iclass 18, count 0 2006.229.21:22:46.85#ibcon#about to read 3, iclass 18, count 0 2006.229.21:22:46.88#ibcon#read 3, iclass 18, count 0 2006.229.21:22:46.88#ibcon#about to read 4, iclass 18, count 0 2006.229.21:22:46.88#ibcon#read 4, iclass 18, count 0 2006.229.21:22:46.88#ibcon#about to read 5, iclass 18, count 0 2006.229.21:22:46.88#ibcon#read 5, iclass 18, count 0 2006.229.21:22:46.88#ibcon#about to read 6, iclass 18, count 0 2006.229.21:22:46.88#ibcon#read 6, iclass 18, count 0 2006.229.21:22:46.88#ibcon#end of sib2, iclass 18, count 0 2006.229.21:22:46.88#ibcon#*after write, iclass 18, count 0 2006.229.21:22:46.88#ibcon#*before return 0, iclass 18, count 0 2006.229.21:22:46.88#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:46.88#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:22:46.88#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:22:46.88#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:22:46.88$vck44/vblo=7,734.99 2006.229.21:22:46.88#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:22:46.88#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:22:46.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:46.88#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:46.88#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:46.88#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:46.88#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:22:46.88#ibcon#first serial, iclass 20, count 0 2006.229.21:22:46.88#ibcon#enter sib2, iclass 20, count 0 2006.229.21:22:46.88#ibcon#flushed, iclass 20, count 0 2006.229.21:22:46.88#ibcon#about to write, iclass 20, count 0 2006.229.21:22:46.88#ibcon#wrote, iclass 20, count 0 2006.229.21:22:46.88#ibcon#about to read 3, iclass 20, count 0 2006.229.21:22:46.90#ibcon#read 3, iclass 20, count 0 2006.229.21:22:46.90#ibcon#about to read 4, iclass 20, count 0 2006.229.21:22:46.90#ibcon#read 4, iclass 20, count 0 2006.229.21:22:46.90#ibcon#about to read 5, iclass 20, count 0 2006.229.21:22:46.90#ibcon#read 5, iclass 20, count 0 2006.229.21:22:46.90#ibcon#about to read 6, iclass 20, count 0 2006.229.21:22:46.90#ibcon#read 6, iclass 20, count 0 2006.229.21:22:46.90#ibcon#end of sib2, iclass 20, count 0 2006.229.21:22:46.90#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:22:46.90#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:22:46.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:22:46.90#ibcon#*before write, iclass 20, count 0 2006.229.21:22:46.90#ibcon#enter sib2, iclass 20, count 0 2006.229.21:22:46.90#ibcon#flushed, iclass 20, count 0 2006.229.21:22:46.90#ibcon#about to write, iclass 20, count 0 2006.229.21:22:46.90#ibcon#wrote, iclass 20, count 0 2006.229.21:22:46.90#ibcon#about to read 3, iclass 20, count 0 2006.229.21:22:46.94#ibcon#read 3, iclass 20, count 0 2006.229.21:22:46.94#ibcon#about to read 4, iclass 20, count 0 2006.229.21:22:46.94#ibcon#read 4, iclass 20, count 0 2006.229.21:22:46.94#ibcon#about to read 5, iclass 20, count 0 2006.229.21:22:46.94#ibcon#read 5, iclass 20, count 0 2006.229.21:22:46.94#ibcon#about to read 6, iclass 20, count 0 2006.229.21:22:46.94#ibcon#read 6, iclass 20, count 0 2006.229.21:22:46.94#ibcon#end of sib2, iclass 20, count 0 2006.229.21:22:46.94#ibcon#*after write, iclass 20, count 0 2006.229.21:22:46.94#ibcon#*before return 0, iclass 20, count 0 2006.229.21:22:46.94#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:46.94#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:22:46.94#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:22:46.94#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:22:46.94$vck44/vb=7,4 2006.229.21:22:46.94#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.21:22:46.94#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.21:22:46.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:46.94#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:47.00#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:47.00#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:47.00#ibcon#enter wrdev, iclass 22, count 2 2006.229.21:22:47.00#ibcon#first serial, iclass 22, count 2 2006.229.21:22:47.00#ibcon#enter sib2, iclass 22, count 2 2006.229.21:22:47.00#ibcon#flushed, iclass 22, count 2 2006.229.21:22:47.00#ibcon#about to write, iclass 22, count 2 2006.229.21:22:47.00#ibcon#wrote, iclass 22, count 2 2006.229.21:22:47.00#ibcon#about to read 3, iclass 22, count 2 2006.229.21:22:47.02#ibcon#read 3, iclass 22, count 2 2006.229.21:22:47.02#ibcon#about to read 4, iclass 22, count 2 2006.229.21:22:47.02#ibcon#read 4, iclass 22, count 2 2006.229.21:22:47.02#ibcon#about to read 5, iclass 22, count 2 2006.229.21:22:47.02#ibcon#read 5, iclass 22, count 2 2006.229.21:22:47.02#ibcon#about to read 6, iclass 22, count 2 2006.229.21:22:47.02#ibcon#read 6, iclass 22, count 2 2006.229.21:22:47.02#ibcon#end of sib2, iclass 22, count 2 2006.229.21:22:47.02#ibcon#*mode == 0, iclass 22, count 2 2006.229.21:22:47.02#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.21:22:47.02#ibcon#[27=AT07-04\r\n] 2006.229.21:22:47.02#ibcon#*before write, iclass 22, count 2 2006.229.21:22:47.02#ibcon#enter sib2, iclass 22, count 2 2006.229.21:22:47.02#ibcon#flushed, iclass 22, count 2 2006.229.21:22:47.02#ibcon#about to write, iclass 22, count 2 2006.229.21:22:47.02#ibcon#wrote, iclass 22, count 2 2006.229.21:22:47.02#ibcon#about to read 3, iclass 22, count 2 2006.229.21:22:47.05#ibcon#read 3, iclass 22, count 2 2006.229.21:22:47.05#ibcon#about to read 4, iclass 22, count 2 2006.229.21:22:47.05#ibcon#read 4, iclass 22, count 2 2006.229.21:22:47.05#ibcon#about to read 5, iclass 22, count 2 2006.229.21:22:47.05#ibcon#read 5, iclass 22, count 2 2006.229.21:22:47.05#ibcon#about to read 6, iclass 22, count 2 2006.229.21:22:47.05#ibcon#read 6, iclass 22, count 2 2006.229.21:22:47.05#ibcon#end of sib2, iclass 22, count 2 2006.229.21:22:47.05#ibcon#*after write, iclass 22, count 2 2006.229.21:22:47.05#ibcon#*before return 0, iclass 22, count 2 2006.229.21:22:47.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:47.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:22:47.05#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.21:22:47.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:47.05#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:47.17#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:47.17#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:47.17#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:22:47.17#ibcon#first serial, iclass 22, count 0 2006.229.21:22:47.17#ibcon#enter sib2, iclass 22, count 0 2006.229.21:22:47.17#ibcon#flushed, iclass 22, count 0 2006.229.21:22:47.17#ibcon#about to write, iclass 22, count 0 2006.229.21:22:47.17#ibcon#wrote, iclass 22, count 0 2006.229.21:22:47.17#ibcon#about to read 3, iclass 22, count 0 2006.229.21:22:47.19#ibcon#read 3, iclass 22, count 0 2006.229.21:22:47.19#ibcon#about to read 4, iclass 22, count 0 2006.229.21:22:47.19#ibcon#read 4, iclass 22, count 0 2006.229.21:22:47.19#ibcon#about to read 5, iclass 22, count 0 2006.229.21:22:47.19#ibcon#read 5, iclass 22, count 0 2006.229.21:22:47.19#ibcon#about to read 6, iclass 22, count 0 2006.229.21:22:47.19#ibcon#read 6, iclass 22, count 0 2006.229.21:22:47.19#ibcon#end of sib2, iclass 22, count 0 2006.229.21:22:47.19#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:22:47.19#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:22:47.19#ibcon#[27=USB\r\n] 2006.229.21:22:47.19#ibcon#*before write, iclass 22, count 0 2006.229.21:22:47.19#ibcon#enter sib2, iclass 22, count 0 2006.229.21:22:47.19#ibcon#flushed, iclass 22, count 0 2006.229.21:22:47.19#ibcon#about to write, iclass 22, count 0 2006.229.21:22:47.19#ibcon#wrote, iclass 22, count 0 2006.229.21:22:47.19#ibcon#about to read 3, iclass 22, count 0 2006.229.21:22:47.22#ibcon#read 3, iclass 22, count 0 2006.229.21:22:47.22#ibcon#about to read 4, iclass 22, count 0 2006.229.21:22:47.22#ibcon#read 4, iclass 22, count 0 2006.229.21:22:47.22#ibcon#about to read 5, iclass 22, count 0 2006.229.21:22:47.22#ibcon#read 5, iclass 22, count 0 2006.229.21:22:47.22#ibcon#about to read 6, iclass 22, count 0 2006.229.21:22:47.22#ibcon#read 6, iclass 22, count 0 2006.229.21:22:47.22#ibcon#end of sib2, iclass 22, count 0 2006.229.21:22:47.22#ibcon#*after write, iclass 22, count 0 2006.229.21:22:47.22#ibcon#*before return 0, iclass 22, count 0 2006.229.21:22:47.22#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:47.22#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:22:47.22#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:22:47.22#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:22:47.22$vck44/vblo=8,744.99 2006.229.21:22:47.22#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.21:22:47.22#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.21:22:47.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:22:47.22#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:47.22#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:47.22#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:47.22#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:22:47.22#ibcon#first serial, iclass 24, count 0 2006.229.21:22:47.22#ibcon#enter sib2, iclass 24, count 0 2006.229.21:22:47.22#ibcon#flushed, iclass 24, count 0 2006.229.21:22:47.22#ibcon#about to write, iclass 24, count 0 2006.229.21:22:47.22#ibcon#wrote, iclass 24, count 0 2006.229.21:22:47.22#ibcon#about to read 3, iclass 24, count 0 2006.229.21:22:47.24#ibcon#read 3, iclass 24, count 0 2006.229.21:22:47.24#ibcon#about to read 4, iclass 24, count 0 2006.229.21:22:47.24#ibcon#read 4, iclass 24, count 0 2006.229.21:22:47.24#ibcon#about to read 5, iclass 24, count 0 2006.229.21:22:47.24#ibcon#read 5, iclass 24, count 0 2006.229.21:22:47.24#ibcon#about to read 6, iclass 24, count 0 2006.229.21:22:47.24#ibcon#read 6, iclass 24, count 0 2006.229.21:22:47.24#ibcon#end of sib2, iclass 24, count 0 2006.229.21:22:47.24#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:22:47.24#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:22:47.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:22:47.24#ibcon#*before write, iclass 24, count 0 2006.229.21:22:47.24#ibcon#enter sib2, iclass 24, count 0 2006.229.21:22:47.24#ibcon#flushed, iclass 24, count 0 2006.229.21:22:47.24#ibcon#about to write, iclass 24, count 0 2006.229.21:22:47.24#ibcon#wrote, iclass 24, count 0 2006.229.21:22:47.24#ibcon#about to read 3, iclass 24, count 0 2006.229.21:22:47.28#ibcon#read 3, iclass 24, count 0 2006.229.21:22:47.28#ibcon#about to read 4, iclass 24, count 0 2006.229.21:22:47.28#ibcon#read 4, iclass 24, count 0 2006.229.21:22:47.28#ibcon#about to read 5, iclass 24, count 0 2006.229.21:22:47.28#ibcon#read 5, iclass 24, count 0 2006.229.21:22:47.28#ibcon#about to read 6, iclass 24, count 0 2006.229.21:22:47.28#ibcon#read 6, iclass 24, count 0 2006.229.21:22:47.28#ibcon#end of sib2, iclass 24, count 0 2006.229.21:22:47.28#ibcon#*after write, iclass 24, count 0 2006.229.21:22:47.28#ibcon#*before return 0, iclass 24, count 0 2006.229.21:22:47.28#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:47.28#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:22:47.28#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:22:47.28#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:22:47.28$vck44/vb=8,4 2006.229.21:22:47.28#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.21:22:47.28#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.21:22:47.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:22:47.28#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:47.34#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:47.34#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:47.34#ibcon#enter wrdev, iclass 26, count 2 2006.229.21:22:47.34#ibcon#first serial, iclass 26, count 2 2006.229.21:22:47.34#ibcon#enter sib2, iclass 26, count 2 2006.229.21:22:47.34#ibcon#flushed, iclass 26, count 2 2006.229.21:22:47.34#ibcon#about to write, iclass 26, count 2 2006.229.21:22:47.34#ibcon#wrote, iclass 26, count 2 2006.229.21:22:47.34#ibcon#about to read 3, iclass 26, count 2 2006.229.21:22:47.36#ibcon#read 3, iclass 26, count 2 2006.229.21:22:47.36#ibcon#about to read 4, iclass 26, count 2 2006.229.21:22:47.36#ibcon#read 4, iclass 26, count 2 2006.229.21:22:47.36#ibcon#about to read 5, iclass 26, count 2 2006.229.21:22:47.36#ibcon#read 5, iclass 26, count 2 2006.229.21:22:47.36#ibcon#about to read 6, iclass 26, count 2 2006.229.21:22:47.36#ibcon#read 6, iclass 26, count 2 2006.229.21:22:47.36#ibcon#end of sib2, iclass 26, count 2 2006.229.21:22:47.36#ibcon#*mode == 0, iclass 26, count 2 2006.229.21:22:47.36#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.21:22:47.36#ibcon#[27=AT08-04\r\n] 2006.229.21:22:47.36#ibcon#*before write, iclass 26, count 2 2006.229.21:22:47.36#ibcon#enter sib2, iclass 26, count 2 2006.229.21:22:47.36#ibcon#flushed, iclass 26, count 2 2006.229.21:22:47.36#ibcon#about to write, iclass 26, count 2 2006.229.21:22:47.36#ibcon#wrote, iclass 26, count 2 2006.229.21:22:47.36#ibcon#about to read 3, iclass 26, count 2 2006.229.21:22:47.39#ibcon#read 3, iclass 26, count 2 2006.229.21:22:47.39#ibcon#about to read 4, iclass 26, count 2 2006.229.21:22:47.39#ibcon#read 4, iclass 26, count 2 2006.229.21:22:47.39#ibcon#about to read 5, iclass 26, count 2 2006.229.21:22:47.39#ibcon#read 5, iclass 26, count 2 2006.229.21:22:47.39#ibcon#about to read 6, iclass 26, count 2 2006.229.21:22:47.39#ibcon#read 6, iclass 26, count 2 2006.229.21:22:47.39#ibcon#end of sib2, iclass 26, count 2 2006.229.21:22:47.39#ibcon#*after write, iclass 26, count 2 2006.229.21:22:47.39#ibcon#*before return 0, iclass 26, count 2 2006.229.21:22:47.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:47.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:22:47.39#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.21:22:47.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:22:47.39#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:47.51#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:47.51#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:47.51#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:22:47.51#ibcon#first serial, iclass 26, count 0 2006.229.21:22:47.51#ibcon#enter sib2, iclass 26, count 0 2006.229.21:22:47.51#ibcon#flushed, iclass 26, count 0 2006.229.21:22:47.51#ibcon#about to write, iclass 26, count 0 2006.229.21:22:47.51#ibcon#wrote, iclass 26, count 0 2006.229.21:22:47.51#ibcon#about to read 3, iclass 26, count 0 2006.229.21:22:47.53#ibcon#read 3, iclass 26, count 0 2006.229.21:22:47.53#ibcon#about to read 4, iclass 26, count 0 2006.229.21:22:47.53#ibcon#read 4, iclass 26, count 0 2006.229.21:22:47.53#ibcon#about to read 5, iclass 26, count 0 2006.229.21:22:47.53#ibcon#read 5, iclass 26, count 0 2006.229.21:22:47.53#ibcon#about to read 6, iclass 26, count 0 2006.229.21:22:47.53#ibcon#read 6, iclass 26, count 0 2006.229.21:22:47.53#ibcon#end of sib2, iclass 26, count 0 2006.229.21:22:47.53#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:22:47.53#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:22:47.53#ibcon#[27=USB\r\n] 2006.229.21:22:47.53#ibcon#*before write, iclass 26, count 0 2006.229.21:22:47.53#ibcon#enter sib2, iclass 26, count 0 2006.229.21:22:47.53#ibcon#flushed, iclass 26, count 0 2006.229.21:22:47.53#ibcon#about to write, iclass 26, count 0 2006.229.21:22:47.53#ibcon#wrote, iclass 26, count 0 2006.229.21:22:47.53#ibcon#about to read 3, iclass 26, count 0 2006.229.21:22:47.56#ibcon#read 3, iclass 26, count 0 2006.229.21:22:47.56#ibcon#about to read 4, iclass 26, count 0 2006.229.21:22:47.56#ibcon#read 4, iclass 26, count 0 2006.229.21:22:47.56#ibcon#about to read 5, iclass 26, count 0 2006.229.21:22:47.56#ibcon#read 5, iclass 26, count 0 2006.229.21:22:47.56#ibcon#about to read 6, iclass 26, count 0 2006.229.21:22:47.56#ibcon#read 6, iclass 26, count 0 2006.229.21:22:47.56#ibcon#end of sib2, iclass 26, count 0 2006.229.21:22:47.56#ibcon#*after write, iclass 26, count 0 2006.229.21:22:47.56#ibcon#*before return 0, iclass 26, count 0 2006.229.21:22:47.56#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:47.56#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:22:47.56#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:22:47.56#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:22:47.56$vck44/vabw=wide 2006.229.21:22:47.56#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.21:22:47.56#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.21:22:47.56#ibcon#ireg 8 cls_cnt 0 2006.229.21:22:47.56#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:47.56#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:47.56#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:47.56#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:22:47.56#ibcon#first serial, iclass 28, count 0 2006.229.21:22:47.56#ibcon#enter sib2, iclass 28, count 0 2006.229.21:22:47.56#ibcon#flushed, iclass 28, count 0 2006.229.21:22:47.56#ibcon#about to write, iclass 28, count 0 2006.229.21:22:47.56#ibcon#wrote, iclass 28, count 0 2006.229.21:22:47.56#ibcon#about to read 3, iclass 28, count 0 2006.229.21:22:47.58#ibcon#read 3, iclass 28, count 0 2006.229.21:22:47.58#ibcon#about to read 4, iclass 28, count 0 2006.229.21:22:47.58#ibcon#read 4, iclass 28, count 0 2006.229.21:22:47.58#ibcon#about to read 5, iclass 28, count 0 2006.229.21:22:47.58#ibcon#read 5, iclass 28, count 0 2006.229.21:22:47.58#ibcon#about to read 6, iclass 28, count 0 2006.229.21:22:47.58#ibcon#read 6, iclass 28, count 0 2006.229.21:22:47.58#ibcon#end of sib2, iclass 28, count 0 2006.229.21:22:47.58#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:22:47.58#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:22:47.58#ibcon#[25=BW32\r\n] 2006.229.21:22:47.58#ibcon#*before write, iclass 28, count 0 2006.229.21:22:47.58#ibcon#enter sib2, iclass 28, count 0 2006.229.21:22:47.58#ibcon#flushed, iclass 28, count 0 2006.229.21:22:47.58#ibcon#about to write, iclass 28, count 0 2006.229.21:22:47.58#ibcon#wrote, iclass 28, count 0 2006.229.21:22:47.58#ibcon#about to read 3, iclass 28, count 0 2006.229.21:22:47.61#ibcon#read 3, iclass 28, count 0 2006.229.21:22:47.61#ibcon#about to read 4, iclass 28, count 0 2006.229.21:22:47.61#ibcon#read 4, iclass 28, count 0 2006.229.21:22:47.61#ibcon#about to read 5, iclass 28, count 0 2006.229.21:22:47.61#ibcon#read 5, iclass 28, count 0 2006.229.21:22:47.61#ibcon#about to read 6, iclass 28, count 0 2006.229.21:22:47.61#ibcon#read 6, iclass 28, count 0 2006.229.21:22:47.61#ibcon#end of sib2, iclass 28, count 0 2006.229.21:22:47.61#ibcon#*after write, iclass 28, count 0 2006.229.21:22:47.61#ibcon#*before return 0, iclass 28, count 0 2006.229.21:22:47.61#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:47.61#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:22:47.61#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:22:47.61#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:22:47.61$vck44/vbbw=wide 2006.229.21:22:47.61#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.21:22:47.61#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.21:22:47.61#ibcon#ireg 8 cls_cnt 0 2006.229.21:22:47.61#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:22:47.68#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:22:47.68#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:22:47.68#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:22:47.68#ibcon#first serial, iclass 30, count 0 2006.229.21:22:47.68#ibcon#enter sib2, iclass 30, count 0 2006.229.21:22:47.68#ibcon#flushed, iclass 30, count 0 2006.229.21:22:47.68#ibcon#about to write, iclass 30, count 0 2006.229.21:22:47.68#ibcon#wrote, iclass 30, count 0 2006.229.21:22:47.68#ibcon#about to read 3, iclass 30, count 0 2006.229.21:22:47.70#ibcon#read 3, iclass 30, count 0 2006.229.21:22:47.70#ibcon#about to read 4, iclass 30, count 0 2006.229.21:22:47.70#ibcon#read 4, iclass 30, count 0 2006.229.21:22:47.70#ibcon#about to read 5, iclass 30, count 0 2006.229.21:22:47.70#ibcon#read 5, iclass 30, count 0 2006.229.21:22:47.70#ibcon#about to read 6, iclass 30, count 0 2006.229.21:22:47.70#ibcon#read 6, iclass 30, count 0 2006.229.21:22:47.70#ibcon#end of sib2, iclass 30, count 0 2006.229.21:22:47.70#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:22:47.70#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:22:47.70#ibcon#[27=BW32\r\n] 2006.229.21:22:47.70#ibcon#*before write, iclass 30, count 0 2006.229.21:22:47.70#ibcon#enter sib2, iclass 30, count 0 2006.229.21:22:47.70#ibcon#flushed, iclass 30, count 0 2006.229.21:22:47.70#ibcon#about to write, iclass 30, count 0 2006.229.21:22:47.70#ibcon#wrote, iclass 30, count 0 2006.229.21:22:47.70#ibcon#about to read 3, iclass 30, count 0 2006.229.21:22:47.73#ibcon#read 3, iclass 30, count 0 2006.229.21:22:47.73#ibcon#about to read 4, iclass 30, count 0 2006.229.21:22:47.73#ibcon#read 4, iclass 30, count 0 2006.229.21:22:47.73#ibcon#about to read 5, iclass 30, count 0 2006.229.21:22:47.73#ibcon#read 5, iclass 30, count 0 2006.229.21:22:47.73#ibcon#about to read 6, iclass 30, count 0 2006.229.21:22:47.73#ibcon#read 6, iclass 30, count 0 2006.229.21:22:47.73#ibcon#end of sib2, iclass 30, count 0 2006.229.21:22:47.73#ibcon#*after write, iclass 30, count 0 2006.229.21:22:47.73#ibcon#*before return 0, iclass 30, count 0 2006.229.21:22:47.73#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:22:47.73#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:22:47.73#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:22:47.73#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:22:47.73$setupk4/ifdk4 2006.229.21:22:47.73$ifdk4/lo= 2006.229.21:22:47.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:22:47.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:22:47.73$ifdk4/patch= 2006.229.21:22:47.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:22:47.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:22:47.73$setupk4/!*+20s 2006.229.21:22:50.89#abcon#<5=/07 1.4 4.7 26.861001002.1\r\n> 2006.229.21:22:50.91#abcon#{5=INTERFACE CLEAR} 2006.229.21:22:50.97#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:23:01.06#abcon#<5=/07 1.5 4.7 26.871001002.1\r\n> 2006.229.21:23:01.08#abcon#{5=INTERFACE CLEAR} 2006.229.21:23:01.14#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:23:02.24$setupk4/"tpicd 2006.229.21:23:02.24$setupk4/echo=off 2006.229.21:23:02.24$setupk4/xlog=off 2006.229.21:23:02.24:!2006.229.21:25:04 2006.229.21:23:03.14#trakl#Source acquired 2006.229.21:23:04.14#flagr#flagr/antenna,acquired 2006.229.21:25:04.00:preob 2006.229.21:25:05.14/onsource/TRACKING 2006.229.21:25:05.14:!2006.229.21:25:14 2006.229.21:25:14.00:"tape 2006.229.21:25:14.00:"st=record 2006.229.21:25:14.00:data_valid=on 2006.229.21:25:14.00:midob 2006.229.21:25:14.14/onsource/TRACKING 2006.229.21:25:14.14/wx/26.95,1002.1,100 2006.229.21:25:14.30/cable/+6.4209E-03 2006.229.21:25:15.39/va/01,08,usb,yes,29,31 2006.229.21:25:15.39/va/02,07,usb,yes,31,32 2006.229.21:25:15.39/va/03,06,usb,yes,39,41 2006.229.21:25:15.39/va/04,07,usb,yes,32,34 2006.229.21:25:15.39/va/05,04,usb,yes,29,29 2006.229.21:25:15.39/va/06,04,usb,yes,32,32 2006.229.21:25:15.39/va/07,05,usb,yes,28,29 2006.229.21:25:15.39/va/08,06,usb,yes,21,26 2006.229.21:25:15.62/valo/01,524.99,yes,locked 2006.229.21:25:15.62/valo/02,534.99,yes,locked 2006.229.21:25:15.62/valo/03,564.99,yes,locked 2006.229.21:25:15.62/valo/04,624.99,yes,locked 2006.229.21:25:15.62/valo/05,734.99,yes,locked 2006.229.21:25:15.62/valo/06,814.99,yes,locked 2006.229.21:25:15.62/valo/07,864.99,yes,locked 2006.229.21:25:15.62/valo/08,884.99,yes,locked 2006.229.21:25:16.71/vb/01,04,usb,yes,30,28 2006.229.21:25:16.71/vb/02,04,usb,yes,33,33 2006.229.21:25:16.71/vb/03,04,usb,yes,30,33 2006.229.21:25:16.71/vb/04,04,usb,yes,34,33 2006.229.21:25:16.71/vb/05,04,usb,yes,27,29 2006.229.21:25:16.71/vb/06,04,usb,yes,31,27 2006.229.21:25:16.71/vb/07,04,usb,yes,31,31 2006.229.21:25:16.71/vb/08,04,usb,yes,28,32 2006.229.21:25:16.95/vblo/01,629.99,yes,locked 2006.229.21:25:16.95/vblo/02,634.99,yes,locked 2006.229.21:25:16.95/vblo/03,649.99,yes,locked 2006.229.21:25:16.95/vblo/04,679.99,yes,locked 2006.229.21:25:16.95/vblo/05,709.99,yes,locked 2006.229.21:25:16.95/vblo/06,719.99,yes,locked 2006.229.21:25:16.95/vblo/07,734.99,yes,locked 2006.229.21:25:16.95/vblo/08,744.99,yes,locked 2006.229.21:25:17.10/vabw/8 2006.229.21:25:17.25/vbbw/8 2006.229.21:25:17.34/xfe/off,on,12.2 2006.229.21:25:17.74/ifatt/23,28,28,28 2006.229.21:25:18.08/fmout-gps/S +4.56E-07 2006.229.21:25:18.12:!2006.229.21:26:04 2006.229.21:26:04.02:data_valid=off 2006.229.21:26:04.02:"et 2006.229.21:26:04.02:!+3s 2006.229.21:26:07.04:"tape 2006.229.21:26:07.05:postob 2006.229.21:26:07.14/cable/+6.4228E-03 2006.229.21:26:07.14/wx/26.96,1002.1,100 2006.229.21:26:07.20/fmout-gps/S +4.55E-07 2006.229.21:26:07.20:scan_name=229-2128,jd0608,150 2006.229.21:26:07.20:source=0059+581,010245.76,582411.1,2000.0,ccw 2006.229.21:26:08.14#flagr#flagr/antenna,new-source 2006.229.21:26:08.14:checkk5 2006.229.21:26:08.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:26:08.88/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:26:09.28/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:26:09.67/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:26:10.07/chk_obsdata//k5ts1/T2292125??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.21:26:10.48/chk_obsdata//k5ts2/T2292125??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.21:26:10.88/chk_obsdata//k5ts3/T2292125??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.21:26:11.30/chk_obsdata//k5ts4/T2292125??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.21:26:12.02/k5log//k5ts1_log_newline 2006.229.21:26:12.73/k5log//k5ts2_log_newline 2006.229.21:26:13.45/k5log//k5ts3_log_newline 2006.229.21:26:14.16/k5log//k5ts4_log_newline 2006.229.21:26:14.18/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:26:14.18:setupk4=1 2006.229.21:26:14.18$setupk4/echo=on 2006.229.21:26:14.18$setupk4/pcalon 2006.229.21:26:14.18$pcalon/"no phase cal control is implemented here 2006.229.21:26:14.18$setupk4/"tpicd=stop 2006.229.21:26:14.18$setupk4/"rec=synch_on 2006.229.21:26:14.18$setupk4/"rec_mode=128 2006.229.21:26:14.18$setupk4/!* 2006.229.21:26:14.18$setupk4/recpk4 2006.229.21:26:14.18$recpk4/recpatch= 2006.229.21:26:14.19$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:26:14.19$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:26:14.19$setupk4/vck44 2006.229.21:26:14.19$vck44/valo=1,524.99 2006.229.21:26:14.19#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.21:26:14.19#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.21:26:14.19#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:14.19#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:14.19#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:14.19#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:14.19#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:26:14.19#ibcon#first serial, iclass 5, count 0 2006.229.21:26:14.19#ibcon#enter sib2, iclass 5, count 0 2006.229.21:26:14.19#ibcon#flushed, iclass 5, count 0 2006.229.21:26:14.19#ibcon#about to write, iclass 5, count 0 2006.229.21:26:14.19#ibcon#wrote, iclass 5, count 0 2006.229.21:26:14.19#ibcon#about to read 3, iclass 5, count 0 2006.229.21:26:14.20#ibcon#read 3, iclass 5, count 0 2006.229.21:26:14.20#ibcon#about to read 4, iclass 5, count 0 2006.229.21:26:14.20#ibcon#read 4, iclass 5, count 0 2006.229.21:26:14.20#ibcon#about to read 5, iclass 5, count 0 2006.229.21:26:14.20#ibcon#read 5, iclass 5, count 0 2006.229.21:26:14.20#ibcon#about to read 6, iclass 5, count 0 2006.229.21:26:14.20#ibcon#read 6, iclass 5, count 0 2006.229.21:26:14.21#ibcon#end of sib2, iclass 5, count 0 2006.229.21:26:14.21#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:26:14.21#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:26:14.21#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:26:14.21#ibcon#*before write, iclass 5, count 0 2006.229.21:26:14.21#ibcon#enter sib2, iclass 5, count 0 2006.229.21:26:14.21#ibcon#flushed, iclass 5, count 0 2006.229.21:26:14.21#ibcon#about to write, iclass 5, count 0 2006.229.21:26:14.21#ibcon#wrote, iclass 5, count 0 2006.229.21:26:14.21#ibcon#about to read 3, iclass 5, count 0 2006.229.21:26:14.25#ibcon#read 3, iclass 5, count 0 2006.229.21:26:14.25#ibcon#about to read 4, iclass 5, count 0 2006.229.21:26:14.25#ibcon#read 4, iclass 5, count 0 2006.229.21:26:14.25#ibcon#about to read 5, iclass 5, count 0 2006.229.21:26:14.25#ibcon#read 5, iclass 5, count 0 2006.229.21:26:14.25#ibcon#about to read 6, iclass 5, count 0 2006.229.21:26:14.25#ibcon#read 6, iclass 5, count 0 2006.229.21:26:14.25#ibcon#end of sib2, iclass 5, count 0 2006.229.21:26:14.26#ibcon#*after write, iclass 5, count 0 2006.229.21:26:14.26#ibcon#*before return 0, iclass 5, count 0 2006.229.21:26:14.26#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:14.26#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:14.26#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:26:14.26#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:26:14.26$vck44/va=1,8 2006.229.21:26:14.26#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.21:26:14.26#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.21:26:14.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:14.26#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:14.26#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:14.26#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:14.26#ibcon#enter wrdev, iclass 7, count 2 2006.229.21:26:14.26#ibcon#first serial, iclass 7, count 2 2006.229.21:26:14.26#ibcon#enter sib2, iclass 7, count 2 2006.229.21:26:14.26#ibcon#flushed, iclass 7, count 2 2006.229.21:26:14.26#ibcon#about to write, iclass 7, count 2 2006.229.21:26:14.26#ibcon#wrote, iclass 7, count 2 2006.229.21:26:14.26#ibcon#about to read 3, iclass 7, count 2 2006.229.21:26:14.28#ibcon#read 3, iclass 7, count 2 2006.229.21:26:14.28#ibcon#about to read 4, iclass 7, count 2 2006.229.21:26:14.28#ibcon#read 4, iclass 7, count 2 2006.229.21:26:14.28#ibcon#about to read 5, iclass 7, count 2 2006.229.21:26:14.28#ibcon#read 5, iclass 7, count 2 2006.229.21:26:14.28#ibcon#about to read 6, iclass 7, count 2 2006.229.21:26:14.28#ibcon#read 6, iclass 7, count 2 2006.229.21:26:14.28#ibcon#end of sib2, iclass 7, count 2 2006.229.21:26:14.28#ibcon#*mode == 0, iclass 7, count 2 2006.229.21:26:14.28#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.21:26:14.28#ibcon#[25=AT01-08\r\n] 2006.229.21:26:14.28#ibcon#*before write, iclass 7, count 2 2006.229.21:26:14.28#ibcon#enter sib2, iclass 7, count 2 2006.229.21:26:14.28#ibcon#flushed, iclass 7, count 2 2006.229.21:26:14.28#ibcon#about to write, iclass 7, count 2 2006.229.21:26:14.28#ibcon#wrote, iclass 7, count 2 2006.229.21:26:14.28#ibcon#about to read 3, iclass 7, count 2 2006.229.21:26:14.30#ibcon#read 3, iclass 7, count 2 2006.229.21:26:14.30#ibcon#about to read 4, iclass 7, count 2 2006.229.21:26:14.30#ibcon#read 4, iclass 7, count 2 2006.229.21:26:14.30#ibcon#about to read 5, iclass 7, count 2 2006.229.21:26:14.30#ibcon#read 5, iclass 7, count 2 2006.229.21:26:14.30#ibcon#about to read 6, iclass 7, count 2 2006.229.21:26:14.30#ibcon#read 6, iclass 7, count 2 2006.229.21:26:14.30#ibcon#end of sib2, iclass 7, count 2 2006.229.21:26:14.31#ibcon#*after write, iclass 7, count 2 2006.229.21:26:14.31#ibcon#*before return 0, iclass 7, count 2 2006.229.21:26:14.31#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:14.31#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:14.31#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.21:26:14.31#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:14.31#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:14.42#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:14.42#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:14.42#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:26:14.42#ibcon#first serial, iclass 7, count 0 2006.229.21:26:14.42#ibcon#enter sib2, iclass 7, count 0 2006.229.21:26:14.42#ibcon#flushed, iclass 7, count 0 2006.229.21:26:14.42#ibcon#about to write, iclass 7, count 0 2006.229.21:26:14.42#ibcon#wrote, iclass 7, count 0 2006.229.21:26:14.43#ibcon#about to read 3, iclass 7, count 0 2006.229.21:26:14.43#abcon#<5=/08 1.5 4.7 26.971001002.1\r\n> 2006.229.21:26:14.44#ibcon#read 3, iclass 7, count 0 2006.229.21:26:14.44#ibcon#about to read 4, iclass 7, count 0 2006.229.21:26:14.44#ibcon#read 4, iclass 7, count 0 2006.229.21:26:14.44#ibcon#about to read 5, iclass 7, count 0 2006.229.21:26:14.44#ibcon#read 5, iclass 7, count 0 2006.229.21:26:14.44#ibcon#about to read 6, iclass 7, count 0 2006.229.21:26:14.44#ibcon#read 6, iclass 7, count 0 2006.229.21:26:14.44#ibcon#end of sib2, iclass 7, count 0 2006.229.21:26:14.44#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:26:14.44#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:26:14.45#ibcon#[25=USB\r\n] 2006.229.21:26:14.45#ibcon#*before write, iclass 7, count 0 2006.229.21:26:14.45#ibcon#enter sib2, iclass 7, count 0 2006.229.21:26:14.45#ibcon#flushed, iclass 7, count 0 2006.229.21:26:14.45#ibcon#about to write, iclass 7, count 0 2006.229.21:26:14.45#ibcon#wrote, iclass 7, count 0 2006.229.21:26:14.45#ibcon#about to read 3, iclass 7, count 0 2006.229.21:26:14.45#abcon#{5=INTERFACE CLEAR} 2006.229.21:26:14.47#ibcon#read 3, iclass 7, count 0 2006.229.21:26:14.47#ibcon#about to read 4, iclass 7, count 0 2006.229.21:26:14.47#ibcon#read 4, iclass 7, count 0 2006.229.21:26:14.47#ibcon#about to read 5, iclass 7, count 0 2006.229.21:26:14.47#ibcon#read 5, iclass 7, count 0 2006.229.21:26:14.47#ibcon#about to read 6, iclass 7, count 0 2006.229.21:26:14.47#ibcon#read 6, iclass 7, count 0 2006.229.21:26:14.47#ibcon#end of sib2, iclass 7, count 0 2006.229.21:26:14.47#ibcon#*after write, iclass 7, count 0 2006.229.21:26:14.47#ibcon#*before return 0, iclass 7, count 0 2006.229.21:26:14.48#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:14.48#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:14.48#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:26:14.48#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:26:14.48$vck44/valo=2,534.99 2006.229.21:26:14.48#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.21:26:14.48#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.21:26:14.48#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:14.48#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:26:14.48#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:26:14.48#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:26:14.48#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:26:14.48#ibcon#first serial, iclass 14, count 0 2006.229.21:26:14.48#ibcon#enter sib2, iclass 14, count 0 2006.229.21:26:14.48#ibcon#flushed, iclass 14, count 0 2006.229.21:26:14.48#ibcon#about to write, iclass 14, count 0 2006.229.21:26:14.48#ibcon#wrote, iclass 14, count 0 2006.229.21:26:14.48#ibcon#about to read 3, iclass 14, count 0 2006.229.21:26:14.49#ibcon#read 3, iclass 14, count 0 2006.229.21:26:14.49#ibcon#about to read 4, iclass 14, count 0 2006.229.21:26:14.49#ibcon#read 4, iclass 14, count 0 2006.229.21:26:14.49#ibcon#about to read 5, iclass 14, count 0 2006.229.21:26:14.49#ibcon#read 5, iclass 14, count 0 2006.229.21:26:14.49#ibcon#about to read 6, iclass 14, count 0 2006.229.21:26:14.49#ibcon#read 6, iclass 14, count 0 2006.229.21:26:14.49#ibcon#end of sib2, iclass 14, count 0 2006.229.21:26:14.50#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:26:14.50#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:26:14.50#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:26:14.50#ibcon#*before write, iclass 14, count 0 2006.229.21:26:14.50#ibcon#enter sib2, iclass 14, count 0 2006.229.21:26:14.50#ibcon#flushed, iclass 14, count 0 2006.229.21:26:14.50#ibcon#about to write, iclass 14, count 0 2006.229.21:26:14.50#ibcon#wrote, iclass 14, count 0 2006.229.21:26:14.50#ibcon#about to read 3, iclass 14, count 0 2006.229.21:26:14.51#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:26:14.53#ibcon#read 3, iclass 14, count 0 2006.229.21:26:14.53#ibcon#about to read 4, iclass 14, count 0 2006.229.21:26:14.53#ibcon#read 4, iclass 14, count 0 2006.229.21:26:14.53#ibcon#about to read 5, iclass 14, count 0 2006.229.21:26:14.53#ibcon#read 5, iclass 14, count 0 2006.229.21:26:14.53#ibcon#about to read 6, iclass 14, count 0 2006.229.21:26:14.53#ibcon#read 6, iclass 14, count 0 2006.229.21:26:14.53#ibcon#end of sib2, iclass 14, count 0 2006.229.21:26:14.53#ibcon#*after write, iclass 14, count 0 2006.229.21:26:14.54#ibcon#*before return 0, iclass 14, count 0 2006.229.21:26:14.54#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:26:14.54#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:26:14.54#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:26:14.54#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:26:14.54$vck44/va=2,7 2006.229.21:26:14.54#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.21:26:14.54#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.21:26:14.54#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:14.54#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:14.59#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:14.59#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:14.59#ibcon#enter wrdev, iclass 17, count 2 2006.229.21:26:14.59#ibcon#first serial, iclass 17, count 2 2006.229.21:26:14.59#ibcon#enter sib2, iclass 17, count 2 2006.229.21:26:14.59#ibcon#flushed, iclass 17, count 2 2006.229.21:26:14.59#ibcon#about to write, iclass 17, count 2 2006.229.21:26:14.59#ibcon#wrote, iclass 17, count 2 2006.229.21:26:14.59#ibcon#about to read 3, iclass 17, count 2 2006.229.21:26:14.61#ibcon#read 3, iclass 17, count 2 2006.229.21:26:14.61#ibcon#about to read 4, iclass 17, count 2 2006.229.21:26:14.61#ibcon#read 4, iclass 17, count 2 2006.229.21:26:14.61#ibcon#about to read 5, iclass 17, count 2 2006.229.21:26:14.61#ibcon#read 5, iclass 17, count 2 2006.229.21:26:14.61#ibcon#about to read 6, iclass 17, count 2 2006.229.21:26:14.61#ibcon#read 6, iclass 17, count 2 2006.229.21:26:14.61#ibcon#end of sib2, iclass 17, count 2 2006.229.21:26:14.61#ibcon#*mode == 0, iclass 17, count 2 2006.229.21:26:14.61#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.21:26:14.61#ibcon#[25=AT02-07\r\n] 2006.229.21:26:14.62#ibcon#*before write, iclass 17, count 2 2006.229.21:26:14.62#ibcon#enter sib2, iclass 17, count 2 2006.229.21:26:14.62#ibcon#flushed, iclass 17, count 2 2006.229.21:26:14.62#ibcon#about to write, iclass 17, count 2 2006.229.21:26:14.62#ibcon#wrote, iclass 17, count 2 2006.229.21:26:14.62#ibcon#about to read 3, iclass 17, count 2 2006.229.21:26:14.64#ibcon#read 3, iclass 17, count 2 2006.229.21:26:14.64#ibcon#about to read 4, iclass 17, count 2 2006.229.21:26:14.64#ibcon#read 4, iclass 17, count 2 2006.229.21:26:14.64#ibcon#about to read 5, iclass 17, count 2 2006.229.21:26:14.64#ibcon#read 5, iclass 17, count 2 2006.229.21:26:14.64#ibcon#about to read 6, iclass 17, count 2 2006.229.21:26:14.64#ibcon#read 6, iclass 17, count 2 2006.229.21:26:14.64#ibcon#end of sib2, iclass 17, count 2 2006.229.21:26:14.64#ibcon#*after write, iclass 17, count 2 2006.229.21:26:14.64#ibcon#*before return 0, iclass 17, count 2 2006.229.21:26:14.64#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:14.64#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:14.65#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.21:26:14.65#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:14.65#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:14.75#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:14.75#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:14.75#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:26:14.75#ibcon#first serial, iclass 17, count 0 2006.229.21:26:14.75#ibcon#enter sib2, iclass 17, count 0 2006.229.21:26:14.75#ibcon#flushed, iclass 17, count 0 2006.229.21:26:14.75#ibcon#about to write, iclass 17, count 0 2006.229.21:26:14.75#ibcon#wrote, iclass 17, count 0 2006.229.21:26:14.75#ibcon#about to read 3, iclass 17, count 0 2006.229.21:26:14.77#ibcon#read 3, iclass 17, count 0 2006.229.21:26:14.77#ibcon#about to read 4, iclass 17, count 0 2006.229.21:26:14.77#ibcon#read 4, iclass 17, count 0 2006.229.21:26:14.77#ibcon#about to read 5, iclass 17, count 0 2006.229.21:26:14.77#ibcon#read 5, iclass 17, count 0 2006.229.21:26:14.77#ibcon#about to read 6, iclass 17, count 0 2006.229.21:26:14.77#ibcon#read 6, iclass 17, count 0 2006.229.21:26:14.77#ibcon#end of sib2, iclass 17, count 0 2006.229.21:26:14.77#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:26:14.77#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:26:14.77#ibcon#[25=USB\r\n] 2006.229.21:26:14.77#ibcon#*before write, iclass 17, count 0 2006.229.21:26:14.78#ibcon#enter sib2, iclass 17, count 0 2006.229.21:26:14.78#ibcon#flushed, iclass 17, count 0 2006.229.21:26:14.78#ibcon#about to write, iclass 17, count 0 2006.229.21:26:14.78#ibcon#wrote, iclass 17, count 0 2006.229.21:26:14.78#ibcon#about to read 3, iclass 17, count 0 2006.229.21:26:14.80#ibcon#read 3, iclass 17, count 0 2006.229.21:26:14.80#ibcon#about to read 4, iclass 17, count 0 2006.229.21:26:14.80#ibcon#read 4, iclass 17, count 0 2006.229.21:26:14.80#ibcon#about to read 5, iclass 17, count 0 2006.229.21:26:14.80#ibcon#read 5, iclass 17, count 0 2006.229.21:26:14.80#ibcon#about to read 6, iclass 17, count 0 2006.229.21:26:14.80#ibcon#read 6, iclass 17, count 0 2006.229.21:26:14.80#ibcon#end of sib2, iclass 17, count 0 2006.229.21:26:14.80#ibcon#*after write, iclass 17, count 0 2006.229.21:26:14.80#ibcon#*before return 0, iclass 17, count 0 2006.229.21:26:14.80#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:14.80#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:14.81#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:26:14.81#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:26:14.81$vck44/valo=3,564.99 2006.229.21:26:14.81#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.21:26:14.81#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.21:26:14.81#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:14.81#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:14.81#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:14.81#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:14.81#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:26:14.81#ibcon#first serial, iclass 19, count 0 2006.229.21:26:14.81#ibcon#enter sib2, iclass 19, count 0 2006.229.21:26:14.81#ibcon#flushed, iclass 19, count 0 2006.229.21:26:14.81#ibcon#about to write, iclass 19, count 0 2006.229.21:26:14.81#ibcon#wrote, iclass 19, count 0 2006.229.21:26:14.81#ibcon#about to read 3, iclass 19, count 0 2006.229.21:26:14.82#ibcon#read 3, iclass 19, count 0 2006.229.21:26:14.82#ibcon#about to read 4, iclass 19, count 0 2006.229.21:26:14.82#ibcon#read 4, iclass 19, count 0 2006.229.21:26:14.82#ibcon#about to read 5, iclass 19, count 0 2006.229.21:26:14.82#ibcon#read 5, iclass 19, count 0 2006.229.21:26:14.82#ibcon#about to read 6, iclass 19, count 0 2006.229.21:26:14.82#ibcon#read 6, iclass 19, count 0 2006.229.21:26:14.82#ibcon#end of sib2, iclass 19, count 0 2006.229.21:26:14.82#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:26:14.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:26:14.83#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:26:14.83#ibcon#*before write, iclass 19, count 0 2006.229.21:26:14.83#ibcon#enter sib2, iclass 19, count 0 2006.229.21:26:14.83#ibcon#flushed, iclass 19, count 0 2006.229.21:26:14.83#ibcon#about to write, iclass 19, count 0 2006.229.21:26:14.83#ibcon#wrote, iclass 19, count 0 2006.229.21:26:14.83#ibcon#about to read 3, iclass 19, count 0 2006.229.21:26:14.86#ibcon#read 3, iclass 19, count 0 2006.229.21:26:14.86#ibcon#about to read 4, iclass 19, count 0 2006.229.21:26:14.86#ibcon#read 4, iclass 19, count 0 2006.229.21:26:14.86#ibcon#about to read 5, iclass 19, count 0 2006.229.21:26:14.86#ibcon#read 5, iclass 19, count 0 2006.229.21:26:14.86#ibcon#about to read 6, iclass 19, count 0 2006.229.21:26:14.86#ibcon#read 6, iclass 19, count 0 2006.229.21:26:14.86#ibcon#end of sib2, iclass 19, count 0 2006.229.21:26:14.86#ibcon#*after write, iclass 19, count 0 2006.229.21:26:14.86#ibcon#*before return 0, iclass 19, count 0 2006.229.21:26:14.86#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:14.87#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:14.87#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:26:14.87#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:26:14.87$vck44/va=3,6 2006.229.21:26:14.87#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.21:26:14.87#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.21:26:14.87#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:14.87#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:14.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:14.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:14.91#ibcon#enter wrdev, iclass 21, count 2 2006.229.21:26:14.91#ibcon#first serial, iclass 21, count 2 2006.229.21:26:14.91#ibcon#enter sib2, iclass 21, count 2 2006.229.21:26:14.91#ibcon#flushed, iclass 21, count 2 2006.229.21:26:14.91#ibcon#about to write, iclass 21, count 2 2006.229.21:26:14.91#ibcon#wrote, iclass 21, count 2 2006.229.21:26:14.92#ibcon#about to read 3, iclass 21, count 2 2006.229.21:26:14.93#ibcon#read 3, iclass 21, count 2 2006.229.21:26:14.93#ibcon#about to read 4, iclass 21, count 2 2006.229.21:26:14.93#ibcon#read 4, iclass 21, count 2 2006.229.21:26:14.93#ibcon#about to read 5, iclass 21, count 2 2006.229.21:26:14.93#ibcon#read 5, iclass 21, count 2 2006.229.21:26:14.93#ibcon#about to read 6, iclass 21, count 2 2006.229.21:26:14.93#ibcon#read 6, iclass 21, count 2 2006.229.21:26:14.93#ibcon#end of sib2, iclass 21, count 2 2006.229.21:26:14.93#ibcon#*mode == 0, iclass 21, count 2 2006.229.21:26:14.93#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.21:26:14.93#ibcon#[25=AT03-06\r\n] 2006.229.21:26:14.93#ibcon#*before write, iclass 21, count 2 2006.229.21:26:14.94#ibcon#enter sib2, iclass 21, count 2 2006.229.21:26:14.94#ibcon#flushed, iclass 21, count 2 2006.229.21:26:14.94#ibcon#about to write, iclass 21, count 2 2006.229.21:26:14.94#ibcon#wrote, iclass 21, count 2 2006.229.21:26:14.94#ibcon#about to read 3, iclass 21, count 2 2006.229.21:26:14.96#ibcon#read 3, iclass 21, count 2 2006.229.21:26:14.96#ibcon#about to read 4, iclass 21, count 2 2006.229.21:26:14.96#ibcon#read 4, iclass 21, count 2 2006.229.21:26:14.96#ibcon#about to read 5, iclass 21, count 2 2006.229.21:26:14.96#ibcon#read 5, iclass 21, count 2 2006.229.21:26:14.96#ibcon#about to read 6, iclass 21, count 2 2006.229.21:26:14.96#ibcon#read 6, iclass 21, count 2 2006.229.21:26:14.96#ibcon#end of sib2, iclass 21, count 2 2006.229.21:26:14.96#ibcon#*after write, iclass 21, count 2 2006.229.21:26:14.96#ibcon#*before return 0, iclass 21, count 2 2006.229.21:26:14.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:14.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:14.97#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.21:26:14.97#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:14.97#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:15.07#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:15.07#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:15.07#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:26:15.07#ibcon#first serial, iclass 21, count 0 2006.229.21:26:15.07#ibcon#enter sib2, iclass 21, count 0 2006.229.21:26:15.07#ibcon#flushed, iclass 21, count 0 2006.229.21:26:15.07#ibcon#about to write, iclass 21, count 0 2006.229.21:26:15.07#ibcon#wrote, iclass 21, count 0 2006.229.21:26:15.07#ibcon#about to read 3, iclass 21, count 0 2006.229.21:26:15.09#ibcon#read 3, iclass 21, count 0 2006.229.21:26:15.09#ibcon#about to read 4, iclass 21, count 0 2006.229.21:26:15.09#ibcon#read 4, iclass 21, count 0 2006.229.21:26:15.09#ibcon#about to read 5, iclass 21, count 0 2006.229.21:26:15.09#ibcon#read 5, iclass 21, count 0 2006.229.21:26:15.09#ibcon#about to read 6, iclass 21, count 0 2006.229.21:26:15.09#ibcon#read 6, iclass 21, count 0 2006.229.21:26:15.09#ibcon#end of sib2, iclass 21, count 0 2006.229.21:26:15.09#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:26:15.09#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:26:15.09#ibcon#[25=USB\r\n] 2006.229.21:26:15.09#ibcon#*before write, iclass 21, count 0 2006.229.21:26:15.10#ibcon#enter sib2, iclass 21, count 0 2006.229.21:26:15.10#ibcon#flushed, iclass 21, count 0 2006.229.21:26:15.10#ibcon#about to write, iclass 21, count 0 2006.229.21:26:15.10#ibcon#wrote, iclass 21, count 0 2006.229.21:26:15.10#ibcon#about to read 3, iclass 21, count 0 2006.229.21:26:15.12#ibcon#read 3, iclass 21, count 0 2006.229.21:26:15.12#ibcon#about to read 4, iclass 21, count 0 2006.229.21:26:15.12#ibcon#read 4, iclass 21, count 0 2006.229.21:26:15.12#ibcon#about to read 5, iclass 21, count 0 2006.229.21:26:15.12#ibcon#read 5, iclass 21, count 0 2006.229.21:26:15.12#ibcon#about to read 6, iclass 21, count 0 2006.229.21:26:15.12#ibcon#read 6, iclass 21, count 0 2006.229.21:26:15.12#ibcon#end of sib2, iclass 21, count 0 2006.229.21:26:15.12#ibcon#*after write, iclass 21, count 0 2006.229.21:26:15.12#ibcon#*before return 0, iclass 21, count 0 2006.229.21:26:15.12#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:15.12#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:15.13#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:26:15.13#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:26:15.13$vck44/valo=4,624.99 2006.229.21:26:15.13#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.21:26:15.13#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.21:26:15.13#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:15.13#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:15.13#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:15.13#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:15.13#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:26:15.13#ibcon#first serial, iclass 23, count 0 2006.229.21:26:15.13#ibcon#enter sib2, iclass 23, count 0 2006.229.21:26:15.13#ibcon#flushed, iclass 23, count 0 2006.229.21:26:15.13#ibcon#about to write, iclass 23, count 0 2006.229.21:26:15.13#ibcon#wrote, iclass 23, count 0 2006.229.21:26:15.13#ibcon#about to read 3, iclass 23, count 0 2006.229.21:26:15.14#ibcon#read 3, iclass 23, count 0 2006.229.21:26:15.14#ibcon#about to read 4, iclass 23, count 0 2006.229.21:26:15.14#ibcon#read 4, iclass 23, count 0 2006.229.21:26:15.14#ibcon#about to read 5, iclass 23, count 0 2006.229.21:26:15.14#ibcon#read 5, iclass 23, count 0 2006.229.21:26:15.14#ibcon#about to read 6, iclass 23, count 0 2006.229.21:26:15.14#ibcon#read 6, iclass 23, count 0 2006.229.21:26:15.14#ibcon#end of sib2, iclass 23, count 0 2006.229.21:26:15.14#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:26:15.15#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:26:15.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:26:15.15#ibcon#*before write, iclass 23, count 0 2006.229.21:26:15.15#ibcon#enter sib2, iclass 23, count 0 2006.229.21:26:15.15#ibcon#flushed, iclass 23, count 0 2006.229.21:26:15.15#ibcon#about to write, iclass 23, count 0 2006.229.21:26:15.15#ibcon#wrote, iclass 23, count 0 2006.229.21:26:15.15#ibcon#about to read 3, iclass 23, count 0 2006.229.21:26:15.18#ibcon#read 3, iclass 23, count 0 2006.229.21:26:15.18#ibcon#about to read 4, iclass 23, count 0 2006.229.21:26:15.18#ibcon#read 4, iclass 23, count 0 2006.229.21:26:15.18#ibcon#about to read 5, iclass 23, count 0 2006.229.21:26:15.18#ibcon#read 5, iclass 23, count 0 2006.229.21:26:15.18#ibcon#about to read 6, iclass 23, count 0 2006.229.21:26:15.18#ibcon#read 6, iclass 23, count 0 2006.229.21:26:15.18#ibcon#end of sib2, iclass 23, count 0 2006.229.21:26:15.18#ibcon#*after write, iclass 23, count 0 2006.229.21:26:15.19#ibcon#*before return 0, iclass 23, count 0 2006.229.21:26:15.19#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:15.19#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:15.19#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:26:15.19#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:26:15.19$vck44/va=4,7 2006.229.21:26:15.19#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.21:26:15.19#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.21:26:15.19#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:15.19#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:15.24#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:15.24#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:15.24#ibcon#enter wrdev, iclass 25, count 2 2006.229.21:26:15.24#ibcon#first serial, iclass 25, count 2 2006.229.21:26:15.24#ibcon#enter sib2, iclass 25, count 2 2006.229.21:26:15.24#ibcon#flushed, iclass 25, count 2 2006.229.21:26:15.24#ibcon#about to write, iclass 25, count 2 2006.229.21:26:15.24#ibcon#wrote, iclass 25, count 2 2006.229.21:26:15.24#ibcon#about to read 3, iclass 25, count 2 2006.229.21:26:15.25#ibcon#read 3, iclass 25, count 2 2006.229.21:26:15.25#ibcon#about to read 4, iclass 25, count 2 2006.229.21:26:15.25#ibcon#read 4, iclass 25, count 2 2006.229.21:26:15.25#ibcon#about to read 5, iclass 25, count 2 2006.229.21:26:15.25#ibcon#read 5, iclass 25, count 2 2006.229.21:26:15.25#ibcon#about to read 6, iclass 25, count 2 2006.229.21:26:15.25#ibcon#read 6, iclass 25, count 2 2006.229.21:26:15.25#ibcon#end of sib2, iclass 25, count 2 2006.229.21:26:15.26#ibcon#*mode == 0, iclass 25, count 2 2006.229.21:26:15.26#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.21:26:15.26#ibcon#[25=AT04-07\r\n] 2006.229.21:26:15.26#ibcon#*before write, iclass 25, count 2 2006.229.21:26:15.26#ibcon#enter sib2, iclass 25, count 2 2006.229.21:26:15.26#ibcon#flushed, iclass 25, count 2 2006.229.21:26:15.26#ibcon#about to write, iclass 25, count 2 2006.229.21:26:15.26#ibcon#wrote, iclass 25, count 2 2006.229.21:26:15.26#ibcon#about to read 3, iclass 25, count 2 2006.229.21:26:15.28#ibcon#read 3, iclass 25, count 2 2006.229.21:26:15.28#ibcon#about to read 4, iclass 25, count 2 2006.229.21:26:15.28#ibcon#read 4, iclass 25, count 2 2006.229.21:26:15.28#ibcon#about to read 5, iclass 25, count 2 2006.229.21:26:15.29#ibcon#read 5, iclass 25, count 2 2006.229.21:26:15.29#ibcon#about to read 6, iclass 25, count 2 2006.229.21:26:15.29#ibcon#read 6, iclass 25, count 2 2006.229.21:26:15.29#ibcon#end of sib2, iclass 25, count 2 2006.229.21:26:15.29#ibcon#*after write, iclass 25, count 2 2006.229.21:26:15.29#ibcon#*before return 0, iclass 25, count 2 2006.229.21:26:15.29#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:15.29#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:15.29#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.21:26:15.29#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:15.29#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:15.41#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:15.41#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:15.41#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:26:15.41#ibcon#first serial, iclass 25, count 0 2006.229.21:26:15.41#ibcon#enter sib2, iclass 25, count 0 2006.229.21:26:15.41#ibcon#flushed, iclass 25, count 0 2006.229.21:26:15.41#ibcon#about to write, iclass 25, count 0 2006.229.21:26:15.41#ibcon#wrote, iclass 25, count 0 2006.229.21:26:15.41#ibcon#about to read 3, iclass 25, count 0 2006.229.21:26:15.42#ibcon#read 3, iclass 25, count 0 2006.229.21:26:15.42#ibcon#about to read 4, iclass 25, count 0 2006.229.21:26:15.42#ibcon#read 4, iclass 25, count 0 2006.229.21:26:15.42#ibcon#about to read 5, iclass 25, count 0 2006.229.21:26:15.42#ibcon#read 5, iclass 25, count 0 2006.229.21:26:15.42#ibcon#about to read 6, iclass 25, count 0 2006.229.21:26:15.42#ibcon#read 6, iclass 25, count 0 2006.229.21:26:15.42#ibcon#end of sib2, iclass 25, count 0 2006.229.21:26:15.42#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:26:15.43#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:26:15.43#ibcon#[25=USB\r\n] 2006.229.21:26:15.43#ibcon#*before write, iclass 25, count 0 2006.229.21:26:15.43#ibcon#enter sib2, iclass 25, count 0 2006.229.21:26:15.43#ibcon#flushed, iclass 25, count 0 2006.229.21:26:15.43#ibcon#about to write, iclass 25, count 0 2006.229.21:26:15.43#ibcon#wrote, iclass 25, count 0 2006.229.21:26:15.43#ibcon#about to read 3, iclass 25, count 0 2006.229.21:26:15.45#ibcon#read 3, iclass 25, count 0 2006.229.21:26:15.45#ibcon#about to read 4, iclass 25, count 0 2006.229.21:26:15.45#ibcon#read 4, iclass 25, count 0 2006.229.21:26:15.45#ibcon#about to read 5, iclass 25, count 0 2006.229.21:26:15.45#ibcon#read 5, iclass 25, count 0 2006.229.21:26:15.45#ibcon#about to read 6, iclass 25, count 0 2006.229.21:26:15.45#ibcon#read 6, iclass 25, count 0 2006.229.21:26:15.45#ibcon#end of sib2, iclass 25, count 0 2006.229.21:26:15.46#ibcon#*after write, iclass 25, count 0 2006.229.21:26:15.46#ibcon#*before return 0, iclass 25, count 0 2006.229.21:26:15.46#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:15.46#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:15.46#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:26:15.46#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:26:15.46$vck44/valo=5,734.99 2006.229.21:26:15.46#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.21:26:15.46#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.21:26:15.46#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:15.46#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:15.46#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:15.46#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:15.46#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:26:15.46#ibcon#first serial, iclass 27, count 0 2006.229.21:26:15.46#ibcon#enter sib2, iclass 27, count 0 2006.229.21:26:15.46#ibcon#flushed, iclass 27, count 0 2006.229.21:26:15.46#ibcon#about to write, iclass 27, count 0 2006.229.21:26:15.46#ibcon#wrote, iclass 27, count 0 2006.229.21:26:15.46#ibcon#about to read 3, iclass 27, count 0 2006.229.21:26:15.47#ibcon#read 3, iclass 27, count 0 2006.229.21:26:15.48#ibcon#about to read 4, iclass 27, count 0 2006.229.21:26:15.48#ibcon#read 4, iclass 27, count 0 2006.229.21:26:15.48#ibcon#about to read 5, iclass 27, count 0 2006.229.21:26:15.48#ibcon#read 5, iclass 27, count 0 2006.229.21:26:15.48#ibcon#about to read 6, iclass 27, count 0 2006.229.21:26:15.48#ibcon#read 6, iclass 27, count 0 2006.229.21:26:15.48#ibcon#end of sib2, iclass 27, count 0 2006.229.21:26:15.48#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:26:15.48#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:26:15.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:26:15.48#ibcon#*before write, iclass 27, count 0 2006.229.21:26:15.48#ibcon#enter sib2, iclass 27, count 0 2006.229.21:26:15.48#ibcon#flushed, iclass 27, count 0 2006.229.21:26:15.48#ibcon#about to write, iclass 27, count 0 2006.229.21:26:15.48#ibcon#wrote, iclass 27, count 0 2006.229.21:26:15.48#ibcon#about to read 3, iclass 27, count 0 2006.229.21:26:15.51#ibcon#read 3, iclass 27, count 0 2006.229.21:26:15.51#ibcon#about to read 4, iclass 27, count 0 2006.229.21:26:15.51#ibcon#read 4, iclass 27, count 0 2006.229.21:26:15.51#ibcon#about to read 5, iclass 27, count 0 2006.229.21:26:15.51#ibcon#read 5, iclass 27, count 0 2006.229.21:26:15.51#ibcon#about to read 6, iclass 27, count 0 2006.229.21:26:15.51#ibcon#read 6, iclass 27, count 0 2006.229.21:26:15.51#ibcon#end of sib2, iclass 27, count 0 2006.229.21:26:15.51#ibcon#*after write, iclass 27, count 0 2006.229.21:26:15.52#ibcon#*before return 0, iclass 27, count 0 2006.229.21:26:15.52#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:15.52#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:15.52#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:26:15.52#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:26:15.52$vck44/va=5,4 2006.229.21:26:15.52#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.21:26:15.52#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.21:26:15.52#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:15.52#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:15.57#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:15.57#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:15.57#ibcon#enter wrdev, iclass 29, count 2 2006.229.21:26:15.57#ibcon#first serial, iclass 29, count 2 2006.229.21:26:15.57#ibcon#enter sib2, iclass 29, count 2 2006.229.21:26:15.57#ibcon#flushed, iclass 29, count 2 2006.229.21:26:15.57#ibcon#about to write, iclass 29, count 2 2006.229.21:26:15.57#ibcon#wrote, iclass 29, count 2 2006.229.21:26:15.58#ibcon#about to read 3, iclass 29, count 2 2006.229.21:26:15.59#ibcon#read 3, iclass 29, count 2 2006.229.21:26:15.59#ibcon#about to read 4, iclass 29, count 2 2006.229.21:26:15.59#ibcon#read 4, iclass 29, count 2 2006.229.21:26:15.59#ibcon#about to read 5, iclass 29, count 2 2006.229.21:26:15.59#ibcon#read 5, iclass 29, count 2 2006.229.21:26:15.59#ibcon#about to read 6, iclass 29, count 2 2006.229.21:26:15.59#ibcon#read 6, iclass 29, count 2 2006.229.21:26:15.59#ibcon#end of sib2, iclass 29, count 2 2006.229.21:26:15.59#ibcon#*mode == 0, iclass 29, count 2 2006.229.21:26:15.59#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.21:26:15.59#ibcon#[25=AT05-04\r\n] 2006.229.21:26:15.59#ibcon#*before write, iclass 29, count 2 2006.229.21:26:15.60#ibcon#enter sib2, iclass 29, count 2 2006.229.21:26:15.60#ibcon#flushed, iclass 29, count 2 2006.229.21:26:15.60#ibcon#about to write, iclass 29, count 2 2006.229.21:26:15.60#ibcon#wrote, iclass 29, count 2 2006.229.21:26:15.60#ibcon#about to read 3, iclass 29, count 2 2006.229.21:26:15.62#ibcon#read 3, iclass 29, count 2 2006.229.21:26:15.62#ibcon#about to read 4, iclass 29, count 2 2006.229.21:26:15.62#ibcon#read 4, iclass 29, count 2 2006.229.21:26:15.62#ibcon#about to read 5, iclass 29, count 2 2006.229.21:26:15.62#ibcon#read 5, iclass 29, count 2 2006.229.21:26:15.62#ibcon#about to read 6, iclass 29, count 2 2006.229.21:26:15.62#ibcon#read 6, iclass 29, count 2 2006.229.21:26:15.62#ibcon#end of sib2, iclass 29, count 2 2006.229.21:26:15.62#ibcon#*after write, iclass 29, count 2 2006.229.21:26:15.62#ibcon#*before return 0, iclass 29, count 2 2006.229.21:26:15.62#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:15.63#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:15.63#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.21:26:15.63#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:15.63#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:15.74#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:15.74#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:15.74#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:26:15.74#ibcon#first serial, iclass 29, count 0 2006.229.21:26:15.74#ibcon#enter sib2, iclass 29, count 0 2006.229.21:26:15.74#ibcon#flushed, iclass 29, count 0 2006.229.21:26:15.74#ibcon#about to write, iclass 29, count 0 2006.229.21:26:15.74#ibcon#wrote, iclass 29, count 0 2006.229.21:26:15.74#ibcon#about to read 3, iclass 29, count 0 2006.229.21:26:15.76#ibcon#read 3, iclass 29, count 0 2006.229.21:26:15.76#ibcon#about to read 4, iclass 29, count 0 2006.229.21:26:15.76#ibcon#read 4, iclass 29, count 0 2006.229.21:26:15.76#ibcon#about to read 5, iclass 29, count 0 2006.229.21:26:15.76#ibcon#read 5, iclass 29, count 0 2006.229.21:26:15.76#ibcon#about to read 6, iclass 29, count 0 2006.229.21:26:15.76#ibcon#read 6, iclass 29, count 0 2006.229.21:26:15.76#ibcon#end of sib2, iclass 29, count 0 2006.229.21:26:15.76#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:26:15.76#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:26:15.76#ibcon#[25=USB\r\n] 2006.229.21:26:15.76#ibcon#*before write, iclass 29, count 0 2006.229.21:26:15.76#ibcon#enter sib2, iclass 29, count 0 2006.229.21:26:15.77#ibcon#flushed, iclass 29, count 0 2006.229.21:26:15.77#ibcon#about to write, iclass 29, count 0 2006.229.21:26:15.77#ibcon#wrote, iclass 29, count 0 2006.229.21:26:15.77#ibcon#about to read 3, iclass 29, count 0 2006.229.21:26:15.79#ibcon#read 3, iclass 29, count 0 2006.229.21:26:15.79#ibcon#about to read 4, iclass 29, count 0 2006.229.21:26:15.79#ibcon#read 4, iclass 29, count 0 2006.229.21:26:15.79#ibcon#about to read 5, iclass 29, count 0 2006.229.21:26:15.79#ibcon#read 5, iclass 29, count 0 2006.229.21:26:15.79#ibcon#about to read 6, iclass 29, count 0 2006.229.21:26:15.79#ibcon#read 6, iclass 29, count 0 2006.229.21:26:15.79#ibcon#end of sib2, iclass 29, count 0 2006.229.21:26:15.79#ibcon#*after write, iclass 29, count 0 2006.229.21:26:15.79#ibcon#*before return 0, iclass 29, count 0 2006.229.21:26:15.80#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:15.80#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:15.80#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:26:15.80#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:26:15.80$vck44/valo=6,814.99 2006.229.21:26:15.80#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.21:26:15.80#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.21:26:15.80#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:15.80#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:15.80#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:15.80#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:15.80#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:26:15.80#ibcon#first serial, iclass 31, count 0 2006.229.21:26:15.80#ibcon#enter sib2, iclass 31, count 0 2006.229.21:26:15.80#ibcon#flushed, iclass 31, count 0 2006.229.21:26:15.80#ibcon#about to write, iclass 31, count 0 2006.229.21:26:15.80#ibcon#wrote, iclass 31, count 0 2006.229.21:26:15.80#ibcon#about to read 3, iclass 31, count 0 2006.229.21:26:15.81#ibcon#read 3, iclass 31, count 0 2006.229.21:26:15.81#ibcon#about to read 4, iclass 31, count 0 2006.229.21:26:15.81#ibcon#read 4, iclass 31, count 0 2006.229.21:26:15.81#ibcon#about to read 5, iclass 31, count 0 2006.229.21:26:15.81#ibcon#read 5, iclass 31, count 0 2006.229.21:26:15.81#ibcon#about to read 6, iclass 31, count 0 2006.229.21:26:15.81#ibcon#read 6, iclass 31, count 0 2006.229.21:26:15.81#ibcon#end of sib2, iclass 31, count 0 2006.229.21:26:15.81#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:26:15.82#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:26:15.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:26:15.82#ibcon#*before write, iclass 31, count 0 2006.229.21:26:15.82#ibcon#enter sib2, iclass 31, count 0 2006.229.21:26:15.82#ibcon#flushed, iclass 31, count 0 2006.229.21:26:15.82#ibcon#about to write, iclass 31, count 0 2006.229.21:26:15.82#ibcon#wrote, iclass 31, count 0 2006.229.21:26:15.82#ibcon#about to read 3, iclass 31, count 0 2006.229.21:26:15.85#ibcon#read 3, iclass 31, count 0 2006.229.21:26:15.85#ibcon#about to read 4, iclass 31, count 0 2006.229.21:26:15.85#ibcon#read 4, iclass 31, count 0 2006.229.21:26:15.85#ibcon#about to read 5, iclass 31, count 0 2006.229.21:26:15.85#ibcon#read 5, iclass 31, count 0 2006.229.21:26:15.85#ibcon#about to read 6, iclass 31, count 0 2006.229.21:26:15.85#ibcon#read 6, iclass 31, count 0 2006.229.21:26:15.85#ibcon#end of sib2, iclass 31, count 0 2006.229.21:26:15.85#ibcon#*after write, iclass 31, count 0 2006.229.21:26:15.85#ibcon#*before return 0, iclass 31, count 0 2006.229.21:26:15.85#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:15.86#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:15.86#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:26:15.86#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:26:15.86$vck44/va=6,4 2006.229.21:26:15.86#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.21:26:15.86#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.21:26:15.86#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:15.86#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:15.91#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:15.91#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:15.91#ibcon#enter wrdev, iclass 33, count 2 2006.229.21:26:15.91#ibcon#first serial, iclass 33, count 2 2006.229.21:26:15.91#ibcon#enter sib2, iclass 33, count 2 2006.229.21:26:15.91#ibcon#flushed, iclass 33, count 2 2006.229.21:26:15.91#ibcon#about to write, iclass 33, count 2 2006.229.21:26:15.91#ibcon#wrote, iclass 33, count 2 2006.229.21:26:15.91#ibcon#about to read 3, iclass 33, count 2 2006.229.21:26:15.93#ibcon#read 3, iclass 33, count 2 2006.229.21:26:15.93#ibcon#about to read 4, iclass 33, count 2 2006.229.21:26:15.93#ibcon#read 4, iclass 33, count 2 2006.229.21:26:15.93#ibcon#about to read 5, iclass 33, count 2 2006.229.21:26:15.93#ibcon#read 5, iclass 33, count 2 2006.229.21:26:15.93#ibcon#about to read 6, iclass 33, count 2 2006.229.21:26:15.93#ibcon#read 6, iclass 33, count 2 2006.229.21:26:15.93#ibcon#end of sib2, iclass 33, count 2 2006.229.21:26:15.93#ibcon#*mode == 0, iclass 33, count 2 2006.229.21:26:15.93#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.21:26:15.93#ibcon#[25=AT06-04\r\n] 2006.229.21:26:15.93#ibcon#*before write, iclass 33, count 2 2006.229.21:26:15.93#ibcon#enter sib2, iclass 33, count 2 2006.229.21:26:15.94#ibcon#flushed, iclass 33, count 2 2006.229.21:26:15.94#ibcon#about to write, iclass 33, count 2 2006.229.21:26:15.94#ibcon#wrote, iclass 33, count 2 2006.229.21:26:15.94#ibcon#about to read 3, iclass 33, count 2 2006.229.21:26:15.96#ibcon#read 3, iclass 33, count 2 2006.229.21:26:15.96#ibcon#about to read 4, iclass 33, count 2 2006.229.21:26:15.96#ibcon#read 4, iclass 33, count 2 2006.229.21:26:15.96#ibcon#about to read 5, iclass 33, count 2 2006.229.21:26:15.96#ibcon#read 5, iclass 33, count 2 2006.229.21:26:15.96#ibcon#about to read 6, iclass 33, count 2 2006.229.21:26:15.96#ibcon#read 6, iclass 33, count 2 2006.229.21:26:15.96#ibcon#end of sib2, iclass 33, count 2 2006.229.21:26:15.96#ibcon#*after write, iclass 33, count 2 2006.229.21:26:15.96#ibcon#*before return 0, iclass 33, count 2 2006.229.21:26:15.96#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:15.96#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:15.96#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.21:26:15.97#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:15.97#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:16.07#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:16.07#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:16.07#ibcon#enter wrdev, iclass 33, count 0 2006.229.21:26:16.07#ibcon#first serial, iclass 33, count 0 2006.229.21:26:16.07#ibcon#enter sib2, iclass 33, count 0 2006.229.21:26:16.07#ibcon#flushed, iclass 33, count 0 2006.229.21:26:16.07#ibcon#about to write, iclass 33, count 0 2006.229.21:26:16.07#ibcon#wrote, iclass 33, count 0 2006.229.21:26:16.07#ibcon#about to read 3, iclass 33, count 0 2006.229.21:26:16.09#ibcon#read 3, iclass 33, count 0 2006.229.21:26:16.09#ibcon#about to read 4, iclass 33, count 0 2006.229.21:26:16.09#ibcon#read 4, iclass 33, count 0 2006.229.21:26:16.09#ibcon#about to read 5, iclass 33, count 0 2006.229.21:26:16.09#ibcon#read 5, iclass 33, count 0 2006.229.21:26:16.09#ibcon#about to read 6, iclass 33, count 0 2006.229.21:26:16.09#ibcon#read 6, iclass 33, count 0 2006.229.21:26:16.09#ibcon#end of sib2, iclass 33, count 0 2006.229.21:26:16.09#ibcon#*mode == 0, iclass 33, count 0 2006.229.21:26:16.09#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.21:26:16.09#ibcon#[25=USB\r\n] 2006.229.21:26:16.09#ibcon#*before write, iclass 33, count 0 2006.229.21:26:16.09#ibcon#enter sib2, iclass 33, count 0 2006.229.21:26:16.10#ibcon#flushed, iclass 33, count 0 2006.229.21:26:16.10#ibcon#about to write, iclass 33, count 0 2006.229.21:26:16.10#ibcon#wrote, iclass 33, count 0 2006.229.21:26:16.10#ibcon#about to read 3, iclass 33, count 0 2006.229.21:26:16.12#ibcon#read 3, iclass 33, count 0 2006.229.21:26:16.12#ibcon#about to read 4, iclass 33, count 0 2006.229.21:26:16.12#ibcon#read 4, iclass 33, count 0 2006.229.21:26:16.12#ibcon#about to read 5, iclass 33, count 0 2006.229.21:26:16.12#ibcon#read 5, iclass 33, count 0 2006.229.21:26:16.12#ibcon#about to read 6, iclass 33, count 0 2006.229.21:26:16.12#ibcon#read 6, iclass 33, count 0 2006.229.21:26:16.13#ibcon#end of sib2, iclass 33, count 0 2006.229.21:26:16.13#ibcon#*after write, iclass 33, count 0 2006.229.21:26:16.13#ibcon#*before return 0, iclass 33, count 0 2006.229.21:26:16.13#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:16.13#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:16.13#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.21:26:16.13#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.21:26:16.13$vck44/valo=7,864.99 2006.229.21:26:16.13#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.21:26:16.13#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.21:26:16.13#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:16.13#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:16.13#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:16.13#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:16.13#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:26:16.13#ibcon#first serial, iclass 35, count 0 2006.229.21:26:16.13#ibcon#enter sib2, iclass 35, count 0 2006.229.21:26:16.13#ibcon#flushed, iclass 35, count 0 2006.229.21:26:16.13#ibcon#about to write, iclass 35, count 0 2006.229.21:26:16.13#ibcon#wrote, iclass 35, count 0 2006.229.21:26:16.13#ibcon#about to read 3, iclass 35, count 0 2006.229.21:26:16.14#ibcon#read 3, iclass 35, count 0 2006.229.21:26:16.14#ibcon#about to read 4, iclass 35, count 0 2006.229.21:26:16.14#ibcon#read 4, iclass 35, count 0 2006.229.21:26:16.14#ibcon#about to read 5, iclass 35, count 0 2006.229.21:26:16.14#ibcon#read 5, iclass 35, count 0 2006.229.21:26:16.15#ibcon#about to read 6, iclass 35, count 0 2006.229.21:26:16.15#ibcon#read 6, iclass 35, count 0 2006.229.21:26:16.15#ibcon#end of sib2, iclass 35, count 0 2006.229.21:26:16.15#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:26:16.15#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:26:16.15#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:26:16.15#ibcon#*before write, iclass 35, count 0 2006.229.21:26:16.15#ibcon#enter sib2, iclass 35, count 0 2006.229.21:26:16.15#ibcon#flushed, iclass 35, count 0 2006.229.21:26:16.15#ibcon#about to write, iclass 35, count 0 2006.229.21:26:16.15#ibcon#wrote, iclass 35, count 0 2006.229.21:26:16.15#ibcon#about to read 3, iclass 35, count 0 2006.229.21:26:16.18#ibcon#read 3, iclass 35, count 0 2006.229.21:26:16.18#ibcon#about to read 4, iclass 35, count 0 2006.229.21:26:16.18#ibcon#read 4, iclass 35, count 0 2006.229.21:26:16.18#ibcon#about to read 5, iclass 35, count 0 2006.229.21:26:16.18#ibcon#read 5, iclass 35, count 0 2006.229.21:26:16.19#ibcon#about to read 6, iclass 35, count 0 2006.229.21:26:16.19#ibcon#read 6, iclass 35, count 0 2006.229.21:26:16.19#ibcon#end of sib2, iclass 35, count 0 2006.229.21:26:16.19#ibcon#*after write, iclass 35, count 0 2006.229.21:26:16.19#ibcon#*before return 0, iclass 35, count 0 2006.229.21:26:16.19#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:16.19#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:16.19#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:26:16.19#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:26:16.19$vck44/va=7,5 2006.229.21:26:16.19#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.21:26:16.19#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.21:26:16.19#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:16.19#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:16.24#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:16.24#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:16.24#ibcon#enter wrdev, iclass 37, count 2 2006.229.21:26:16.24#ibcon#first serial, iclass 37, count 2 2006.229.21:26:16.24#ibcon#enter sib2, iclass 37, count 2 2006.229.21:26:16.24#ibcon#flushed, iclass 37, count 2 2006.229.21:26:16.24#ibcon#about to write, iclass 37, count 2 2006.229.21:26:16.24#ibcon#wrote, iclass 37, count 2 2006.229.21:26:16.24#ibcon#about to read 3, iclass 37, count 2 2006.229.21:26:16.26#ibcon#read 3, iclass 37, count 2 2006.229.21:26:16.26#ibcon#about to read 4, iclass 37, count 2 2006.229.21:26:16.26#ibcon#read 4, iclass 37, count 2 2006.229.21:26:16.26#ibcon#about to read 5, iclass 37, count 2 2006.229.21:26:16.26#ibcon#read 5, iclass 37, count 2 2006.229.21:26:16.26#ibcon#about to read 6, iclass 37, count 2 2006.229.21:26:16.26#ibcon#read 6, iclass 37, count 2 2006.229.21:26:16.27#ibcon#end of sib2, iclass 37, count 2 2006.229.21:26:16.27#ibcon#*mode == 0, iclass 37, count 2 2006.229.21:26:16.27#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.21:26:16.27#ibcon#[25=AT07-05\r\n] 2006.229.21:26:16.27#ibcon#*before write, iclass 37, count 2 2006.229.21:26:16.27#ibcon#enter sib2, iclass 37, count 2 2006.229.21:26:16.27#ibcon#flushed, iclass 37, count 2 2006.229.21:26:16.27#ibcon#about to write, iclass 37, count 2 2006.229.21:26:16.27#ibcon#wrote, iclass 37, count 2 2006.229.21:26:16.27#ibcon#about to read 3, iclass 37, count 2 2006.229.21:26:16.29#ibcon#read 3, iclass 37, count 2 2006.229.21:26:16.29#ibcon#about to read 4, iclass 37, count 2 2006.229.21:26:16.29#ibcon#read 4, iclass 37, count 2 2006.229.21:26:16.29#ibcon#about to read 5, iclass 37, count 2 2006.229.21:26:16.29#ibcon#read 5, iclass 37, count 2 2006.229.21:26:16.29#ibcon#about to read 6, iclass 37, count 2 2006.229.21:26:16.29#ibcon#read 6, iclass 37, count 2 2006.229.21:26:16.29#ibcon#end of sib2, iclass 37, count 2 2006.229.21:26:16.29#ibcon#*after write, iclass 37, count 2 2006.229.21:26:16.30#ibcon#*before return 0, iclass 37, count 2 2006.229.21:26:16.30#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:16.30#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:16.30#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.21:26:16.30#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:16.30#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:16.42#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:16.42#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:16.42#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:26:16.42#ibcon#first serial, iclass 37, count 0 2006.229.21:26:16.42#ibcon#enter sib2, iclass 37, count 0 2006.229.21:26:16.42#ibcon#flushed, iclass 37, count 0 2006.229.21:26:16.42#ibcon#about to write, iclass 37, count 0 2006.229.21:26:16.42#ibcon#wrote, iclass 37, count 0 2006.229.21:26:16.42#ibcon#about to read 3, iclass 37, count 0 2006.229.21:26:16.43#ibcon#read 3, iclass 37, count 0 2006.229.21:26:16.43#ibcon#about to read 4, iclass 37, count 0 2006.229.21:26:16.43#ibcon#read 4, iclass 37, count 0 2006.229.21:26:16.43#ibcon#about to read 5, iclass 37, count 0 2006.229.21:26:16.43#ibcon#read 5, iclass 37, count 0 2006.229.21:26:16.43#ibcon#about to read 6, iclass 37, count 0 2006.229.21:26:16.43#ibcon#read 6, iclass 37, count 0 2006.229.21:26:16.43#ibcon#end of sib2, iclass 37, count 0 2006.229.21:26:16.43#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:26:16.43#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:26:16.44#ibcon#[25=USB\r\n] 2006.229.21:26:16.44#ibcon#*before write, iclass 37, count 0 2006.229.21:26:16.44#ibcon#enter sib2, iclass 37, count 0 2006.229.21:26:16.44#ibcon#flushed, iclass 37, count 0 2006.229.21:26:16.44#ibcon#about to write, iclass 37, count 0 2006.229.21:26:16.44#ibcon#wrote, iclass 37, count 0 2006.229.21:26:16.44#ibcon#about to read 3, iclass 37, count 0 2006.229.21:26:16.46#ibcon#read 3, iclass 37, count 0 2006.229.21:26:16.46#ibcon#about to read 4, iclass 37, count 0 2006.229.21:26:16.46#ibcon#read 4, iclass 37, count 0 2006.229.21:26:16.46#ibcon#about to read 5, iclass 37, count 0 2006.229.21:26:16.46#ibcon#read 5, iclass 37, count 0 2006.229.21:26:16.46#ibcon#about to read 6, iclass 37, count 0 2006.229.21:26:16.46#ibcon#read 6, iclass 37, count 0 2006.229.21:26:16.46#ibcon#end of sib2, iclass 37, count 0 2006.229.21:26:16.47#ibcon#*after write, iclass 37, count 0 2006.229.21:26:16.47#ibcon#*before return 0, iclass 37, count 0 2006.229.21:26:16.47#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:16.47#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:16.47#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:26:16.47#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:26:16.47$vck44/valo=8,884.99 2006.229.21:26:16.47#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.21:26:16.47#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.21:26:16.47#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:16.47#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:16.47#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:16.47#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:16.47#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:26:16.47#ibcon#first serial, iclass 39, count 0 2006.229.21:26:16.47#ibcon#enter sib2, iclass 39, count 0 2006.229.21:26:16.47#ibcon#flushed, iclass 39, count 0 2006.229.21:26:16.47#ibcon#about to write, iclass 39, count 0 2006.229.21:26:16.47#ibcon#wrote, iclass 39, count 0 2006.229.21:26:16.47#ibcon#about to read 3, iclass 39, count 0 2006.229.21:26:16.48#ibcon#read 3, iclass 39, count 0 2006.229.21:26:16.48#ibcon#about to read 4, iclass 39, count 0 2006.229.21:26:16.48#ibcon#read 4, iclass 39, count 0 2006.229.21:26:16.48#ibcon#about to read 5, iclass 39, count 0 2006.229.21:26:16.48#ibcon#read 5, iclass 39, count 0 2006.229.21:26:16.48#ibcon#about to read 6, iclass 39, count 0 2006.229.21:26:16.48#ibcon#read 6, iclass 39, count 0 2006.229.21:26:16.48#ibcon#end of sib2, iclass 39, count 0 2006.229.21:26:16.48#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:26:16.48#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:26:16.48#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:26:16.49#ibcon#*before write, iclass 39, count 0 2006.229.21:26:16.49#ibcon#enter sib2, iclass 39, count 0 2006.229.21:26:16.49#ibcon#flushed, iclass 39, count 0 2006.229.21:26:16.49#ibcon#about to write, iclass 39, count 0 2006.229.21:26:16.49#ibcon#wrote, iclass 39, count 0 2006.229.21:26:16.49#ibcon#about to read 3, iclass 39, count 0 2006.229.21:26:16.52#ibcon#read 3, iclass 39, count 0 2006.229.21:26:16.52#ibcon#about to read 4, iclass 39, count 0 2006.229.21:26:16.52#ibcon#read 4, iclass 39, count 0 2006.229.21:26:16.52#ibcon#about to read 5, iclass 39, count 0 2006.229.21:26:16.52#ibcon#read 5, iclass 39, count 0 2006.229.21:26:16.52#ibcon#about to read 6, iclass 39, count 0 2006.229.21:26:16.52#ibcon#read 6, iclass 39, count 0 2006.229.21:26:16.52#ibcon#end of sib2, iclass 39, count 0 2006.229.21:26:16.52#ibcon#*after write, iclass 39, count 0 2006.229.21:26:16.52#ibcon#*before return 0, iclass 39, count 0 2006.229.21:26:16.53#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:16.53#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:16.53#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:26:16.53#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:26:16.53$vck44/va=8,6 2006.229.21:26:16.53#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.21:26:16.53#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.21:26:16.53#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:16.53#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:26:16.58#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:26:16.58#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:26:16.58#ibcon#enter wrdev, iclass 3, count 2 2006.229.21:26:16.58#ibcon#first serial, iclass 3, count 2 2006.229.21:26:16.58#ibcon#enter sib2, iclass 3, count 2 2006.229.21:26:16.58#ibcon#flushed, iclass 3, count 2 2006.229.21:26:16.58#ibcon#about to write, iclass 3, count 2 2006.229.21:26:16.58#ibcon#wrote, iclass 3, count 2 2006.229.21:26:16.58#ibcon#about to read 3, iclass 3, count 2 2006.229.21:26:16.60#ibcon#read 3, iclass 3, count 2 2006.229.21:26:16.60#ibcon#about to read 4, iclass 3, count 2 2006.229.21:26:16.60#ibcon#read 4, iclass 3, count 2 2006.229.21:26:16.60#ibcon#about to read 5, iclass 3, count 2 2006.229.21:26:16.60#ibcon#read 5, iclass 3, count 2 2006.229.21:26:16.60#ibcon#about to read 6, iclass 3, count 2 2006.229.21:26:16.60#ibcon#read 6, iclass 3, count 2 2006.229.21:26:16.60#ibcon#end of sib2, iclass 3, count 2 2006.229.21:26:16.60#ibcon#*mode == 0, iclass 3, count 2 2006.229.21:26:16.61#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.21:26:16.61#ibcon#[25=AT08-06\r\n] 2006.229.21:26:16.61#ibcon#*before write, iclass 3, count 2 2006.229.21:26:16.61#ibcon#enter sib2, iclass 3, count 2 2006.229.21:26:16.61#ibcon#flushed, iclass 3, count 2 2006.229.21:26:16.61#ibcon#about to write, iclass 3, count 2 2006.229.21:26:16.61#ibcon#wrote, iclass 3, count 2 2006.229.21:26:16.61#ibcon#about to read 3, iclass 3, count 2 2006.229.21:26:16.63#ibcon#read 3, iclass 3, count 2 2006.229.21:26:16.63#ibcon#about to read 4, iclass 3, count 2 2006.229.21:26:16.63#ibcon#read 4, iclass 3, count 2 2006.229.21:26:16.63#ibcon#about to read 5, iclass 3, count 2 2006.229.21:26:16.63#ibcon#read 5, iclass 3, count 2 2006.229.21:26:16.63#ibcon#about to read 6, iclass 3, count 2 2006.229.21:26:16.63#ibcon#read 6, iclass 3, count 2 2006.229.21:26:16.63#ibcon#end of sib2, iclass 3, count 2 2006.229.21:26:16.63#ibcon#*after write, iclass 3, count 2 2006.229.21:26:16.63#ibcon#*before return 0, iclass 3, count 2 2006.229.21:26:16.64#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:26:16.64#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.21:26:16.64#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.21:26:16.64#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:16.64#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:26:16.75#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:26:16.75#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:26:16.75#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:26:16.75#ibcon#first serial, iclass 3, count 0 2006.229.21:26:16.75#ibcon#enter sib2, iclass 3, count 0 2006.229.21:26:16.75#ibcon#flushed, iclass 3, count 0 2006.229.21:26:16.75#ibcon#about to write, iclass 3, count 0 2006.229.21:26:16.75#ibcon#wrote, iclass 3, count 0 2006.229.21:26:16.75#ibcon#about to read 3, iclass 3, count 0 2006.229.21:26:16.77#ibcon#read 3, iclass 3, count 0 2006.229.21:26:16.77#ibcon#about to read 4, iclass 3, count 0 2006.229.21:26:16.77#ibcon#read 4, iclass 3, count 0 2006.229.21:26:16.77#ibcon#about to read 5, iclass 3, count 0 2006.229.21:26:16.77#ibcon#read 5, iclass 3, count 0 2006.229.21:26:16.77#ibcon#about to read 6, iclass 3, count 0 2006.229.21:26:16.77#ibcon#read 6, iclass 3, count 0 2006.229.21:26:16.77#ibcon#end of sib2, iclass 3, count 0 2006.229.21:26:16.77#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:26:16.77#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:26:16.77#ibcon#[25=USB\r\n] 2006.229.21:26:16.77#ibcon#*before write, iclass 3, count 0 2006.229.21:26:16.77#ibcon#enter sib2, iclass 3, count 0 2006.229.21:26:16.78#ibcon#flushed, iclass 3, count 0 2006.229.21:26:16.78#ibcon#about to write, iclass 3, count 0 2006.229.21:26:16.78#ibcon#wrote, iclass 3, count 0 2006.229.21:26:16.78#ibcon#about to read 3, iclass 3, count 0 2006.229.21:26:16.80#ibcon#read 3, iclass 3, count 0 2006.229.21:26:16.80#ibcon#about to read 4, iclass 3, count 0 2006.229.21:26:16.80#ibcon#read 4, iclass 3, count 0 2006.229.21:26:16.80#ibcon#about to read 5, iclass 3, count 0 2006.229.21:26:16.80#ibcon#read 5, iclass 3, count 0 2006.229.21:26:16.80#ibcon#about to read 6, iclass 3, count 0 2006.229.21:26:16.80#ibcon#read 6, iclass 3, count 0 2006.229.21:26:16.80#ibcon#end of sib2, iclass 3, count 0 2006.229.21:26:16.80#ibcon#*after write, iclass 3, count 0 2006.229.21:26:16.80#ibcon#*before return 0, iclass 3, count 0 2006.229.21:26:16.81#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:26:16.81#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.21:26:16.81#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:26:16.81#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:26:16.81$vck44/vblo=1,629.99 2006.229.21:26:16.81#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.21:26:16.81#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.21:26:16.81#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:16.81#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:16.81#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:16.81#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:16.81#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:26:16.81#ibcon#first serial, iclass 5, count 0 2006.229.21:26:16.81#ibcon#enter sib2, iclass 5, count 0 2006.229.21:26:16.81#ibcon#flushed, iclass 5, count 0 2006.229.21:26:16.81#ibcon#about to write, iclass 5, count 0 2006.229.21:26:16.81#ibcon#wrote, iclass 5, count 0 2006.229.21:26:16.81#ibcon#about to read 3, iclass 5, count 0 2006.229.21:26:16.82#ibcon#read 3, iclass 5, count 0 2006.229.21:26:16.82#ibcon#about to read 4, iclass 5, count 0 2006.229.21:26:16.82#ibcon#read 4, iclass 5, count 0 2006.229.21:26:16.82#ibcon#about to read 5, iclass 5, count 0 2006.229.21:26:16.82#ibcon#read 5, iclass 5, count 0 2006.229.21:26:16.82#ibcon#about to read 6, iclass 5, count 0 2006.229.21:26:16.82#ibcon#read 6, iclass 5, count 0 2006.229.21:26:16.82#ibcon#end of sib2, iclass 5, count 0 2006.229.21:26:16.82#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:26:16.82#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:26:16.82#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:26:16.82#ibcon#*before write, iclass 5, count 0 2006.229.21:26:16.83#ibcon#enter sib2, iclass 5, count 0 2006.229.21:26:16.83#ibcon#flushed, iclass 5, count 0 2006.229.21:26:16.83#ibcon#about to write, iclass 5, count 0 2006.229.21:26:16.83#ibcon#wrote, iclass 5, count 0 2006.229.21:26:16.83#ibcon#about to read 3, iclass 5, count 0 2006.229.21:26:16.86#ibcon#read 3, iclass 5, count 0 2006.229.21:26:16.86#ibcon#about to read 4, iclass 5, count 0 2006.229.21:26:16.86#ibcon#read 4, iclass 5, count 0 2006.229.21:26:16.86#ibcon#about to read 5, iclass 5, count 0 2006.229.21:26:16.86#ibcon#read 5, iclass 5, count 0 2006.229.21:26:16.86#ibcon#about to read 6, iclass 5, count 0 2006.229.21:26:16.86#ibcon#read 6, iclass 5, count 0 2006.229.21:26:16.86#ibcon#end of sib2, iclass 5, count 0 2006.229.21:26:16.87#ibcon#*after write, iclass 5, count 0 2006.229.21:26:16.87#ibcon#*before return 0, iclass 5, count 0 2006.229.21:26:16.87#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:16.87#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.21:26:16.87#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:26:16.87#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:26:16.87$vck44/vb=1,4 2006.229.21:26:16.87#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.21:26:16.87#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.21:26:16.87#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:16.87#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:16.87#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:16.87#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:16.87#ibcon#enter wrdev, iclass 7, count 2 2006.229.21:26:16.87#ibcon#first serial, iclass 7, count 2 2006.229.21:26:16.87#ibcon#enter sib2, iclass 7, count 2 2006.229.21:26:16.87#ibcon#flushed, iclass 7, count 2 2006.229.21:26:16.87#ibcon#about to write, iclass 7, count 2 2006.229.21:26:16.87#ibcon#wrote, iclass 7, count 2 2006.229.21:26:16.87#ibcon#about to read 3, iclass 7, count 2 2006.229.21:26:16.88#ibcon#read 3, iclass 7, count 2 2006.229.21:26:16.88#ibcon#about to read 4, iclass 7, count 2 2006.229.21:26:16.88#ibcon#read 4, iclass 7, count 2 2006.229.21:26:16.88#ibcon#about to read 5, iclass 7, count 2 2006.229.21:26:16.88#ibcon#read 5, iclass 7, count 2 2006.229.21:26:16.88#ibcon#about to read 6, iclass 7, count 2 2006.229.21:26:16.88#ibcon#read 6, iclass 7, count 2 2006.229.21:26:16.88#ibcon#end of sib2, iclass 7, count 2 2006.229.21:26:16.88#ibcon#*mode == 0, iclass 7, count 2 2006.229.21:26:16.89#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.21:26:16.89#ibcon#[27=AT01-04\r\n] 2006.229.21:26:16.89#ibcon#*before write, iclass 7, count 2 2006.229.21:26:16.89#ibcon#enter sib2, iclass 7, count 2 2006.229.21:26:16.89#ibcon#flushed, iclass 7, count 2 2006.229.21:26:16.89#ibcon#about to write, iclass 7, count 2 2006.229.21:26:16.89#ibcon#wrote, iclass 7, count 2 2006.229.21:26:16.89#ibcon#about to read 3, iclass 7, count 2 2006.229.21:26:16.91#ibcon#read 3, iclass 7, count 2 2006.229.21:26:16.91#ibcon#about to read 4, iclass 7, count 2 2006.229.21:26:16.91#ibcon#read 4, iclass 7, count 2 2006.229.21:26:16.91#ibcon#about to read 5, iclass 7, count 2 2006.229.21:26:16.91#ibcon#read 5, iclass 7, count 2 2006.229.21:26:16.91#ibcon#about to read 6, iclass 7, count 2 2006.229.21:26:16.91#ibcon#read 6, iclass 7, count 2 2006.229.21:26:16.91#ibcon#end of sib2, iclass 7, count 2 2006.229.21:26:16.91#ibcon#*after write, iclass 7, count 2 2006.229.21:26:16.92#ibcon#*before return 0, iclass 7, count 2 2006.229.21:26:16.92#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:16.92#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.21:26:16.92#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.21:26:16.92#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:16.92#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:17.03#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:17.03#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:17.03#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:26:17.03#ibcon#first serial, iclass 7, count 0 2006.229.21:26:17.03#ibcon#enter sib2, iclass 7, count 0 2006.229.21:26:17.03#ibcon#flushed, iclass 7, count 0 2006.229.21:26:17.03#ibcon#about to write, iclass 7, count 0 2006.229.21:26:17.04#ibcon#wrote, iclass 7, count 0 2006.229.21:26:17.04#ibcon#about to read 3, iclass 7, count 0 2006.229.21:26:17.05#ibcon#read 3, iclass 7, count 0 2006.229.21:26:17.05#ibcon#about to read 4, iclass 7, count 0 2006.229.21:26:17.05#ibcon#read 4, iclass 7, count 0 2006.229.21:26:17.05#ibcon#about to read 5, iclass 7, count 0 2006.229.21:26:17.05#ibcon#read 5, iclass 7, count 0 2006.229.21:26:17.05#ibcon#about to read 6, iclass 7, count 0 2006.229.21:26:17.05#ibcon#read 6, iclass 7, count 0 2006.229.21:26:17.05#ibcon#end of sib2, iclass 7, count 0 2006.229.21:26:17.05#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:26:17.05#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:26:17.05#ibcon#[27=USB\r\n] 2006.229.21:26:17.05#ibcon#*before write, iclass 7, count 0 2006.229.21:26:17.05#ibcon#enter sib2, iclass 7, count 0 2006.229.21:26:17.06#ibcon#flushed, iclass 7, count 0 2006.229.21:26:17.06#ibcon#about to write, iclass 7, count 0 2006.229.21:26:17.06#ibcon#wrote, iclass 7, count 0 2006.229.21:26:17.06#ibcon#about to read 3, iclass 7, count 0 2006.229.21:26:17.08#ibcon#read 3, iclass 7, count 0 2006.229.21:26:17.08#ibcon#about to read 4, iclass 7, count 0 2006.229.21:26:17.08#ibcon#read 4, iclass 7, count 0 2006.229.21:26:17.08#ibcon#about to read 5, iclass 7, count 0 2006.229.21:26:17.08#ibcon#read 5, iclass 7, count 0 2006.229.21:26:17.08#ibcon#about to read 6, iclass 7, count 0 2006.229.21:26:17.08#ibcon#read 6, iclass 7, count 0 2006.229.21:26:17.08#ibcon#end of sib2, iclass 7, count 0 2006.229.21:26:17.08#ibcon#*after write, iclass 7, count 0 2006.229.21:26:17.08#ibcon#*before return 0, iclass 7, count 0 2006.229.21:26:17.09#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:17.09#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.21:26:17.09#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:26:17.09#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:26:17.09$vck44/vblo=2,634.99 2006.229.21:26:17.09#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.21:26:17.09#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.21:26:17.09#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:17.09#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:26:17.09#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:26:17.09#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:26:17.09#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:26:17.09#ibcon#first serial, iclass 11, count 0 2006.229.21:26:17.09#ibcon#enter sib2, iclass 11, count 0 2006.229.21:26:17.09#ibcon#flushed, iclass 11, count 0 2006.229.21:26:17.09#ibcon#about to write, iclass 11, count 0 2006.229.21:26:17.09#ibcon#wrote, iclass 11, count 0 2006.229.21:26:17.09#ibcon#about to read 3, iclass 11, count 0 2006.229.21:26:17.10#ibcon#read 3, iclass 11, count 0 2006.229.21:26:17.10#ibcon#about to read 4, iclass 11, count 0 2006.229.21:26:17.10#ibcon#read 4, iclass 11, count 0 2006.229.21:26:17.10#ibcon#about to read 5, iclass 11, count 0 2006.229.21:26:17.10#ibcon#read 5, iclass 11, count 0 2006.229.21:26:17.10#ibcon#about to read 6, iclass 11, count 0 2006.229.21:26:17.10#ibcon#read 6, iclass 11, count 0 2006.229.21:26:17.10#ibcon#end of sib2, iclass 11, count 0 2006.229.21:26:17.10#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:26:17.10#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:26:17.10#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:26:17.10#ibcon#*before write, iclass 11, count 0 2006.229.21:26:17.11#ibcon#enter sib2, iclass 11, count 0 2006.229.21:26:17.11#ibcon#flushed, iclass 11, count 0 2006.229.21:26:17.11#ibcon#about to write, iclass 11, count 0 2006.229.21:26:17.11#ibcon#wrote, iclass 11, count 0 2006.229.21:26:17.11#ibcon#about to read 3, iclass 11, count 0 2006.229.21:26:17.15#ibcon#read 3, iclass 11, count 0 2006.229.21:26:17.15#ibcon#about to read 4, iclass 11, count 0 2006.229.21:26:17.15#ibcon#read 4, iclass 11, count 0 2006.229.21:26:17.15#ibcon#about to read 5, iclass 11, count 0 2006.229.21:26:17.15#ibcon#read 5, iclass 11, count 0 2006.229.21:26:17.15#ibcon#about to read 6, iclass 11, count 0 2006.229.21:26:17.15#ibcon#read 6, iclass 11, count 0 2006.229.21:26:17.15#ibcon#end of sib2, iclass 11, count 0 2006.229.21:26:17.15#ibcon#*after write, iclass 11, count 0 2006.229.21:26:17.15#ibcon#*before return 0, iclass 11, count 0 2006.229.21:26:17.15#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:26:17.15#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.21:26:17.15#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:26:17.15#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:26:17.15$vck44/vb=2,4 2006.229.21:26:17.15#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.21:26:17.15#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.21:26:17.15#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:17.15#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:26:17.20#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:26:17.20#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:26:17.20#ibcon#enter wrdev, iclass 13, count 2 2006.229.21:26:17.20#ibcon#first serial, iclass 13, count 2 2006.229.21:26:17.20#ibcon#enter sib2, iclass 13, count 2 2006.229.21:26:17.20#ibcon#flushed, iclass 13, count 2 2006.229.21:26:17.20#ibcon#about to write, iclass 13, count 2 2006.229.21:26:17.21#ibcon#wrote, iclass 13, count 2 2006.229.21:26:17.21#ibcon#about to read 3, iclass 13, count 2 2006.229.21:26:17.22#ibcon#read 3, iclass 13, count 2 2006.229.21:26:17.22#ibcon#about to read 4, iclass 13, count 2 2006.229.21:26:17.22#ibcon#read 4, iclass 13, count 2 2006.229.21:26:17.22#ibcon#about to read 5, iclass 13, count 2 2006.229.21:26:17.22#ibcon#read 5, iclass 13, count 2 2006.229.21:26:17.22#ibcon#about to read 6, iclass 13, count 2 2006.229.21:26:17.23#ibcon#read 6, iclass 13, count 2 2006.229.21:26:17.23#ibcon#end of sib2, iclass 13, count 2 2006.229.21:26:17.23#ibcon#*mode == 0, iclass 13, count 2 2006.229.21:26:17.23#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.21:26:17.23#ibcon#[27=AT02-04\r\n] 2006.229.21:26:17.23#ibcon#*before write, iclass 13, count 2 2006.229.21:26:17.23#ibcon#enter sib2, iclass 13, count 2 2006.229.21:26:17.23#ibcon#flushed, iclass 13, count 2 2006.229.21:26:17.23#ibcon#about to write, iclass 13, count 2 2006.229.21:26:17.23#ibcon#wrote, iclass 13, count 2 2006.229.21:26:17.23#ibcon#about to read 3, iclass 13, count 2 2006.229.21:26:17.25#ibcon#read 3, iclass 13, count 2 2006.229.21:26:17.25#ibcon#about to read 4, iclass 13, count 2 2006.229.21:26:17.25#ibcon#read 4, iclass 13, count 2 2006.229.21:26:17.25#ibcon#about to read 5, iclass 13, count 2 2006.229.21:26:17.25#ibcon#read 5, iclass 13, count 2 2006.229.21:26:17.25#ibcon#about to read 6, iclass 13, count 2 2006.229.21:26:17.25#ibcon#read 6, iclass 13, count 2 2006.229.21:26:17.25#ibcon#end of sib2, iclass 13, count 2 2006.229.21:26:17.26#ibcon#*after write, iclass 13, count 2 2006.229.21:26:17.26#ibcon#*before return 0, iclass 13, count 2 2006.229.21:26:17.26#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:26:17.26#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.21:26:17.26#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.21:26:17.26#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:17.26#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:26:17.37#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:26:17.37#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:26:17.37#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:26:17.37#ibcon#first serial, iclass 13, count 0 2006.229.21:26:17.37#ibcon#enter sib2, iclass 13, count 0 2006.229.21:26:17.37#ibcon#flushed, iclass 13, count 0 2006.229.21:26:17.37#ibcon#about to write, iclass 13, count 0 2006.229.21:26:17.37#ibcon#wrote, iclass 13, count 0 2006.229.21:26:17.38#ibcon#about to read 3, iclass 13, count 0 2006.229.21:26:17.39#ibcon#read 3, iclass 13, count 0 2006.229.21:26:17.39#ibcon#about to read 4, iclass 13, count 0 2006.229.21:26:17.39#ibcon#read 4, iclass 13, count 0 2006.229.21:26:17.39#ibcon#about to read 5, iclass 13, count 0 2006.229.21:26:17.39#ibcon#read 5, iclass 13, count 0 2006.229.21:26:17.39#ibcon#about to read 6, iclass 13, count 0 2006.229.21:26:17.39#ibcon#read 6, iclass 13, count 0 2006.229.21:26:17.39#ibcon#end of sib2, iclass 13, count 0 2006.229.21:26:17.39#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:26:17.39#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:26:17.40#ibcon#[27=USB\r\n] 2006.229.21:26:17.40#ibcon#*before write, iclass 13, count 0 2006.229.21:26:17.40#ibcon#enter sib2, iclass 13, count 0 2006.229.21:26:17.40#ibcon#flushed, iclass 13, count 0 2006.229.21:26:17.40#ibcon#about to write, iclass 13, count 0 2006.229.21:26:17.40#ibcon#wrote, iclass 13, count 0 2006.229.21:26:17.40#ibcon#about to read 3, iclass 13, count 0 2006.229.21:26:17.42#ibcon#read 3, iclass 13, count 0 2006.229.21:26:17.42#ibcon#about to read 4, iclass 13, count 0 2006.229.21:26:17.42#ibcon#read 4, iclass 13, count 0 2006.229.21:26:17.42#ibcon#about to read 5, iclass 13, count 0 2006.229.21:26:17.42#ibcon#read 5, iclass 13, count 0 2006.229.21:26:17.42#ibcon#about to read 6, iclass 13, count 0 2006.229.21:26:17.42#ibcon#read 6, iclass 13, count 0 2006.229.21:26:17.42#ibcon#end of sib2, iclass 13, count 0 2006.229.21:26:17.42#ibcon#*after write, iclass 13, count 0 2006.229.21:26:17.42#ibcon#*before return 0, iclass 13, count 0 2006.229.21:26:17.43#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:26:17.43#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.21:26:17.43#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:26:17.43#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:26:17.43$vck44/vblo=3,649.99 2006.229.21:26:17.43#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.21:26:17.43#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.21:26:17.43#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:17.43#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:26:17.43#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:26:17.43#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:26:17.43#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:26:17.43#ibcon#first serial, iclass 15, count 0 2006.229.21:26:17.43#ibcon#enter sib2, iclass 15, count 0 2006.229.21:26:17.43#ibcon#flushed, iclass 15, count 0 2006.229.21:26:17.43#ibcon#about to write, iclass 15, count 0 2006.229.21:26:17.43#ibcon#wrote, iclass 15, count 0 2006.229.21:26:17.43#ibcon#about to read 3, iclass 15, count 0 2006.229.21:26:17.44#ibcon#read 3, iclass 15, count 0 2006.229.21:26:17.44#ibcon#about to read 4, iclass 15, count 0 2006.229.21:26:17.44#ibcon#read 4, iclass 15, count 0 2006.229.21:26:17.44#ibcon#about to read 5, iclass 15, count 0 2006.229.21:26:17.44#ibcon#read 5, iclass 15, count 0 2006.229.21:26:17.44#ibcon#about to read 6, iclass 15, count 0 2006.229.21:26:17.44#ibcon#read 6, iclass 15, count 0 2006.229.21:26:17.44#ibcon#end of sib2, iclass 15, count 0 2006.229.21:26:17.44#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:26:17.44#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:26:17.45#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:26:17.45#ibcon#*before write, iclass 15, count 0 2006.229.21:26:17.45#ibcon#enter sib2, iclass 15, count 0 2006.229.21:26:17.45#ibcon#flushed, iclass 15, count 0 2006.229.21:26:17.45#ibcon#about to write, iclass 15, count 0 2006.229.21:26:17.45#ibcon#wrote, iclass 15, count 0 2006.229.21:26:17.45#ibcon#about to read 3, iclass 15, count 0 2006.229.21:26:17.48#ibcon#read 3, iclass 15, count 0 2006.229.21:26:17.48#ibcon#about to read 4, iclass 15, count 0 2006.229.21:26:17.48#ibcon#read 4, iclass 15, count 0 2006.229.21:26:17.48#ibcon#about to read 5, iclass 15, count 0 2006.229.21:26:17.48#ibcon#read 5, iclass 15, count 0 2006.229.21:26:17.48#ibcon#about to read 6, iclass 15, count 0 2006.229.21:26:17.48#ibcon#read 6, iclass 15, count 0 2006.229.21:26:17.48#ibcon#end of sib2, iclass 15, count 0 2006.229.21:26:17.49#ibcon#*after write, iclass 15, count 0 2006.229.21:26:17.49#ibcon#*before return 0, iclass 15, count 0 2006.229.21:26:17.49#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:26:17.49#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:26:17.49#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:26:17.49#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:26:17.49$vck44/vb=3,4 2006.229.21:26:17.49#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.21:26:17.49#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.21:26:17.49#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:17.49#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:17.54#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:17.54#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:17.54#ibcon#enter wrdev, iclass 17, count 2 2006.229.21:26:17.54#ibcon#first serial, iclass 17, count 2 2006.229.21:26:17.54#ibcon#enter sib2, iclass 17, count 2 2006.229.21:26:17.54#ibcon#flushed, iclass 17, count 2 2006.229.21:26:17.54#ibcon#about to write, iclass 17, count 2 2006.229.21:26:17.54#ibcon#wrote, iclass 17, count 2 2006.229.21:26:17.55#ibcon#about to read 3, iclass 17, count 2 2006.229.21:26:17.56#ibcon#read 3, iclass 17, count 2 2006.229.21:26:17.56#ibcon#about to read 4, iclass 17, count 2 2006.229.21:26:17.56#ibcon#read 4, iclass 17, count 2 2006.229.21:26:17.56#ibcon#about to read 5, iclass 17, count 2 2006.229.21:26:17.56#ibcon#read 5, iclass 17, count 2 2006.229.21:26:17.56#ibcon#about to read 6, iclass 17, count 2 2006.229.21:26:17.56#ibcon#read 6, iclass 17, count 2 2006.229.21:26:17.56#ibcon#end of sib2, iclass 17, count 2 2006.229.21:26:17.56#ibcon#*mode == 0, iclass 17, count 2 2006.229.21:26:17.56#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.21:26:17.56#ibcon#[27=AT03-04\r\n] 2006.229.21:26:17.56#ibcon#*before write, iclass 17, count 2 2006.229.21:26:17.56#ibcon#enter sib2, iclass 17, count 2 2006.229.21:26:17.57#ibcon#flushed, iclass 17, count 2 2006.229.21:26:17.57#ibcon#about to write, iclass 17, count 2 2006.229.21:26:17.57#ibcon#wrote, iclass 17, count 2 2006.229.21:26:17.57#ibcon#about to read 3, iclass 17, count 2 2006.229.21:26:17.59#ibcon#read 3, iclass 17, count 2 2006.229.21:26:17.59#ibcon#about to read 4, iclass 17, count 2 2006.229.21:26:17.59#ibcon#read 4, iclass 17, count 2 2006.229.21:26:17.59#ibcon#about to read 5, iclass 17, count 2 2006.229.21:26:17.59#ibcon#read 5, iclass 17, count 2 2006.229.21:26:17.59#ibcon#about to read 6, iclass 17, count 2 2006.229.21:26:17.59#ibcon#read 6, iclass 17, count 2 2006.229.21:26:17.59#ibcon#end of sib2, iclass 17, count 2 2006.229.21:26:17.59#ibcon#*after write, iclass 17, count 2 2006.229.21:26:17.59#ibcon#*before return 0, iclass 17, count 2 2006.229.21:26:17.60#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:17.60#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.21:26:17.60#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.21:26:17.60#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:17.60#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:17.71#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:17.71#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:17.71#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:26:17.71#ibcon#first serial, iclass 17, count 0 2006.229.21:26:17.71#ibcon#enter sib2, iclass 17, count 0 2006.229.21:26:17.71#ibcon#flushed, iclass 17, count 0 2006.229.21:26:17.71#ibcon#about to write, iclass 17, count 0 2006.229.21:26:17.71#ibcon#wrote, iclass 17, count 0 2006.229.21:26:17.71#ibcon#about to read 3, iclass 17, count 0 2006.229.21:26:17.73#ibcon#read 3, iclass 17, count 0 2006.229.21:26:17.73#ibcon#about to read 4, iclass 17, count 0 2006.229.21:26:17.73#ibcon#read 4, iclass 17, count 0 2006.229.21:26:17.73#ibcon#about to read 5, iclass 17, count 0 2006.229.21:26:17.73#ibcon#read 5, iclass 17, count 0 2006.229.21:26:17.73#ibcon#about to read 6, iclass 17, count 0 2006.229.21:26:17.73#ibcon#read 6, iclass 17, count 0 2006.229.21:26:17.73#ibcon#end of sib2, iclass 17, count 0 2006.229.21:26:17.73#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:26:17.73#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:26:17.73#ibcon#[27=USB\r\n] 2006.229.21:26:17.73#ibcon#*before write, iclass 17, count 0 2006.229.21:26:17.74#ibcon#enter sib2, iclass 17, count 0 2006.229.21:26:17.74#ibcon#flushed, iclass 17, count 0 2006.229.21:26:17.74#ibcon#about to write, iclass 17, count 0 2006.229.21:26:17.74#ibcon#wrote, iclass 17, count 0 2006.229.21:26:17.74#ibcon#about to read 3, iclass 17, count 0 2006.229.21:26:17.76#ibcon#read 3, iclass 17, count 0 2006.229.21:26:17.76#ibcon#about to read 4, iclass 17, count 0 2006.229.21:26:17.76#ibcon#read 4, iclass 17, count 0 2006.229.21:26:17.76#ibcon#about to read 5, iclass 17, count 0 2006.229.21:26:17.76#ibcon#read 5, iclass 17, count 0 2006.229.21:26:17.76#ibcon#about to read 6, iclass 17, count 0 2006.229.21:26:17.76#ibcon#read 6, iclass 17, count 0 2006.229.21:26:17.76#ibcon#end of sib2, iclass 17, count 0 2006.229.21:26:17.76#ibcon#*after write, iclass 17, count 0 2006.229.21:26:17.76#ibcon#*before return 0, iclass 17, count 0 2006.229.21:26:17.76#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:17.77#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.21:26:17.77#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:26:17.77#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:26:17.77$vck44/vblo=4,679.99 2006.229.21:26:17.77#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.21:26:17.77#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.21:26:17.77#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:17.77#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:17.77#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:17.77#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:17.77#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:26:17.77#ibcon#first serial, iclass 19, count 0 2006.229.21:26:17.77#ibcon#enter sib2, iclass 19, count 0 2006.229.21:26:17.77#ibcon#flushed, iclass 19, count 0 2006.229.21:26:17.77#ibcon#about to write, iclass 19, count 0 2006.229.21:26:17.77#ibcon#wrote, iclass 19, count 0 2006.229.21:26:17.77#ibcon#about to read 3, iclass 19, count 0 2006.229.21:26:17.78#ibcon#read 3, iclass 19, count 0 2006.229.21:26:17.78#ibcon#about to read 4, iclass 19, count 0 2006.229.21:26:17.78#ibcon#read 4, iclass 19, count 0 2006.229.21:26:17.78#ibcon#about to read 5, iclass 19, count 0 2006.229.21:26:17.78#ibcon#read 5, iclass 19, count 0 2006.229.21:26:17.78#ibcon#about to read 6, iclass 19, count 0 2006.229.21:26:17.78#ibcon#read 6, iclass 19, count 0 2006.229.21:26:17.78#ibcon#end of sib2, iclass 19, count 0 2006.229.21:26:17.78#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:26:17.78#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:26:17.78#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:26:17.78#ibcon#*before write, iclass 19, count 0 2006.229.21:26:17.78#ibcon#enter sib2, iclass 19, count 0 2006.229.21:26:17.79#ibcon#flushed, iclass 19, count 0 2006.229.21:26:17.79#ibcon#about to write, iclass 19, count 0 2006.229.21:26:17.79#ibcon#wrote, iclass 19, count 0 2006.229.21:26:17.79#ibcon#about to read 3, iclass 19, count 0 2006.229.21:26:17.82#ibcon#read 3, iclass 19, count 0 2006.229.21:26:17.82#ibcon#about to read 4, iclass 19, count 0 2006.229.21:26:17.82#ibcon#read 4, iclass 19, count 0 2006.229.21:26:17.82#ibcon#about to read 5, iclass 19, count 0 2006.229.21:26:17.82#ibcon#read 5, iclass 19, count 0 2006.229.21:26:17.82#ibcon#about to read 6, iclass 19, count 0 2006.229.21:26:17.82#ibcon#read 6, iclass 19, count 0 2006.229.21:26:17.82#ibcon#end of sib2, iclass 19, count 0 2006.229.21:26:17.82#ibcon#*after write, iclass 19, count 0 2006.229.21:26:17.82#ibcon#*before return 0, iclass 19, count 0 2006.229.21:26:17.82#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:17.83#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.21:26:17.83#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:26:17.83#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:26:17.83$vck44/vb=4,4 2006.229.21:26:17.83#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.21:26:17.83#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.21:26:17.83#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:17.83#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:17.88#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:17.88#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:17.88#ibcon#enter wrdev, iclass 21, count 2 2006.229.21:26:17.88#ibcon#first serial, iclass 21, count 2 2006.229.21:26:17.88#ibcon#enter sib2, iclass 21, count 2 2006.229.21:26:17.88#ibcon#flushed, iclass 21, count 2 2006.229.21:26:17.88#ibcon#about to write, iclass 21, count 2 2006.229.21:26:17.88#ibcon#wrote, iclass 21, count 2 2006.229.21:26:17.88#ibcon#about to read 3, iclass 21, count 2 2006.229.21:26:17.90#ibcon#read 3, iclass 21, count 2 2006.229.21:26:17.90#ibcon#about to read 4, iclass 21, count 2 2006.229.21:26:17.90#ibcon#read 4, iclass 21, count 2 2006.229.21:26:17.90#ibcon#about to read 5, iclass 21, count 2 2006.229.21:26:17.90#ibcon#read 5, iclass 21, count 2 2006.229.21:26:17.90#ibcon#about to read 6, iclass 21, count 2 2006.229.21:26:17.90#ibcon#read 6, iclass 21, count 2 2006.229.21:26:17.90#ibcon#end of sib2, iclass 21, count 2 2006.229.21:26:17.90#ibcon#*mode == 0, iclass 21, count 2 2006.229.21:26:17.91#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.21:26:17.91#ibcon#[27=AT04-04\r\n] 2006.229.21:26:17.91#ibcon#*before write, iclass 21, count 2 2006.229.21:26:17.91#ibcon#enter sib2, iclass 21, count 2 2006.229.21:26:17.91#ibcon#flushed, iclass 21, count 2 2006.229.21:26:17.91#ibcon#about to write, iclass 21, count 2 2006.229.21:26:17.91#ibcon#wrote, iclass 21, count 2 2006.229.21:26:17.91#ibcon#about to read 3, iclass 21, count 2 2006.229.21:26:17.93#ibcon#read 3, iclass 21, count 2 2006.229.21:26:17.93#ibcon#about to read 4, iclass 21, count 2 2006.229.21:26:17.93#ibcon#read 4, iclass 21, count 2 2006.229.21:26:17.93#ibcon#about to read 5, iclass 21, count 2 2006.229.21:26:17.93#ibcon#read 5, iclass 21, count 2 2006.229.21:26:17.93#ibcon#about to read 6, iclass 21, count 2 2006.229.21:26:17.93#ibcon#read 6, iclass 21, count 2 2006.229.21:26:17.93#ibcon#end of sib2, iclass 21, count 2 2006.229.21:26:17.93#ibcon#*after write, iclass 21, count 2 2006.229.21:26:17.93#ibcon#*before return 0, iclass 21, count 2 2006.229.21:26:17.93#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:17.93#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.21:26:17.94#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.21:26:17.94#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:17.94#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:18.04#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:18.04#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:18.04#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:26:18.04#ibcon#first serial, iclass 21, count 0 2006.229.21:26:18.04#ibcon#enter sib2, iclass 21, count 0 2006.229.21:26:18.04#ibcon#flushed, iclass 21, count 0 2006.229.21:26:18.04#ibcon#about to write, iclass 21, count 0 2006.229.21:26:18.04#ibcon#wrote, iclass 21, count 0 2006.229.21:26:18.04#ibcon#about to read 3, iclass 21, count 0 2006.229.21:26:18.06#ibcon#read 3, iclass 21, count 0 2006.229.21:26:18.06#ibcon#about to read 4, iclass 21, count 0 2006.229.21:26:18.06#ibcon#read 4, iclass 21, count 0 2006.229.21:26:18.06#ibcon#about to read 5, iclass 21, count 0 2006.229.21:26:18.06#ibcon#read 5, iclass 21, count 0 2006.229.21:26:18.06#ibcon#about to read 6, iclass 21, count 0 2006.229.21:26:18.06#ibcon#read 6, iclass 21, count 0 2006.229.21:26:18.06#ibcon#end of sib2, iclass 21, count 0 2006.229.21:26:18.06#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:26:18.07#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:26:18.07#ibcon#[27=USB\r\n] 2006.229.21:26:18.07#ibcon#*before write, iclass 21, count 0 2006.229.21:26:18.07#ibcon#enter sib2, iclass 21, count 0 2006.229.21:26:18.07#ibcon#flushed, iclass 21, count 0 2006.229.21:26:18.07#ibcon#about to write, iclass 21, count 0 2006.229.21:26:18.07#ibcon#wrote, iclass 21, count 0 2006.229.21:26:18.07#ibcon#about to read 3, iclass 21, count 0 2006.229.21:26:18.09#ibcon#read 3, iclass 21, count 0 2006.229.21:26:18.09#ibcon#about to read 4, iclass 21, count 0 2006.229.21:26:18.09#ibcon#read 4, iclass 21, count 0 2006.229.21:26:18.09#ibcon#about to read 5, iclass 21, count 0 2006.229.21:26:18.09#ibcon#read 5, iclass 21, count 0 2006.229.21:26:18.09#ibcon#about to read 6, iclass 21, count 0 2006.229.21:26:18.09#ibcon#read 6, iclass 21, count 0 2006.229.21:26:18.09#ibcon#end of sib2, iclass 21, count 0 2006.229.21:26:18.09#ibcon#*after write, iclass 21, count 0 2006.229.21:26:18.09#ibcon#*before return 0, iclass 21, count 0 2006.229.21:26:18.09#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:18.09#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.21:26:18.10#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:26:18.10#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:26:18.10$vck44/vblo=5,709.99 2006.229.21:26:18.10#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.21:26:18.10#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.21:26:18.10#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:18.10#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:18.10#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:18.10#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:18.10#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:26:18.10#ibcon#first serial, iclass 23, count 0 2006.229.21:26:18.10#ibcon#enter sib2, iclass 23, count 0 2006.229.21:26:18.10#ibcon#flushed, iclass 23, count 0 2006.229.21:26:18.10#ibcon#about to write, iclass 23, count 0 2006.229.21:26:18.10#ibcon#wrote, iclass 23, count 0 2006.229.21:26:18.10#ibcon#about to read 3, iclass 23, count 0 2006.229.21:26:18.11#ibcon#read 3, iclass 23, count 0 2006.229.21:26:18.11#ibcon#about to read 4, iclass 23, count 0 2006.229.21:26:18.11#ibcon#read 4, iclass 23, count 0 2006.229.21:26:18.11#ibcon#about to read 5, iclass 23, count 0 2006.229.21:26:18.11#ibcon#read 5, iclass 23, count 0 2006.229.21:26:18.11#ibcon#about to read 6, iclass 23, count 0 2006.229.21:26:18.11#ibcon#read 6, iclass 23, count 0 2006.229.21:26:18.11#ibcon#end of sib2, iclass 23, count 0 2006.229.21:26:18.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:26:18.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:26:18.11#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:26:18.12#ibcon#*before write, iclass 23, count 0 2006.229.21:26:18.12#ibcon#enter sib2, iclass 23, count 0 2006.229.21:26:18.12#ibcon#flushed, iclass 23, count 0 2006.229.21:26:18.12#ibcon#about to write, iclass 23, count 0 2006.229.21:26:18.12#ibcon#wrote, iclass 23, count 0 2006.229.21:26:18.12#ibcon#about to read 3, iclass 23, count 0 2006.229.21:26:18.15#ibcon#read 3, iclass 23, count 0 2006.229.21:26:18.15#ibcon#about to read 4, iclass 23, count 0 2006.229.21:26:18.15#ibcon#read 4, iclass 23, count 0 2006.229.21:26:18.15#ibcon#about to read 5, iclass 23, count 0 2006.229.21:26:18.15#ibcon#read 5, iclass 23, count 0 2006.229.21:26:18.15#ibcon#about to read 6, iclass 23, count 0 2006.229.21:26:18.15#ibcon#read 6, iclass 23, count 0 2006.229.21:26:18.15#ibcon#end of sib2, iclass 23, count 0 2006.229.21:26:18.16#ibcon#*after write, iclass 23, count 0 2006.229.21:26:18.16#ibcon#*before return 0, iclass 23, count 0 2006.229.21:26:18.16#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:18.16#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.21:26:18.16#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:26:18.16#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:26:18.16$vck44/vb=5,4 2006.229.21:26:18.16#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.21:26:18.16#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.21:26:18.16#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:18.16#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:18.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:18.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:18.20#ibcon#enter wrdev, iclass 25, count 2 2006.229.21:26:18.20#ibcon#first serial, iclass 25, count 2 2006.229.21:26:18.20#ibcon#enter sib2, iclass 25, count 2 2006.229.21:26:18.20#ibcon#flushed, iclass 25, count 2 2006.229.21:26:18.20#ibcon#about to write, iclass 25, count 2 2006.229.21:26:18.20#ibcon#wrote, iclass 25, count 2 2006.229.21:26:18.20#ibcon#about to read 3, iclass 25, count 2 2006.229.21:26:18.22#ibcon#read 3, iclass 25, count 2 2006.229.21:26:18.22#ibcon#about to read 4, iclass 25, count 2 2006.229.21:26:18.22#ibcon#read 4, iclass 25, count 2 2006.229.21:26:18.22#ibcon#about to read 5, iclass 25, count 2 2006.229.21:26:18.22#ibcon#read 5, iclass 25, count 2 2006.229.21:26:18.23#ibcon#about to read 6, iclass 25, count 2 2006.229.21:26:18.23#ibcon#read 6, iclass 25, count 2 2006.229.21:26:18.23#ibcon#end of sib2, iclass 25, count 2 2006.229.21:26:18.23#ibcon#*mode == 0, iclass 25, count 2 2006.229.21:26:18.23#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.21:26:18.23#ibcon#[27=AT05-04\r\n] 2006.229.21:26:18.23#ibcon#*before write, iclass 25, count 2 2006.229.21:26:18.23#ibcon#enter sib2, iclass 25, count 2 2006.229.21:26:18.23#ibcon#flushed, iclass 25, count 2 2006.229.21:26:18.23#ibcon#about to write, iclass 25, count 2 2006.229.21:26:18.23#ibcon#wrote, iclass 25, count 2 2006.229.21:26:18.23#ibcon#about to read 3, iclass 25, count 2 2006.229.21:26:18.25#ibcon#read 3, iclass 25, count 2 2006.229.21:26:18.25#ibcon#about to read 4, iclass 25, count 2 2006.229.21:26:18.25#ibcon#read 4, iclass 25, count 2 2006.229.21:26:18.25#ibcon#about to read 5, iclass 25, count 2 2006.229.21:26:18.25#ibcon#read 5, iclass 25, count 2 2006.229.21:26:18.25#ibcon#about to read 6, iclass 25, count 2 2006.229.21:26:18.25#ibcon#read 6, iclass 25, count 2 2006.229.21:26:18.25#ibcon#end of sib2, iclass 25, count 2 2006.229.21:26:18.25#ibcon#*after write, iclass 25, count 2 2006.229.21:26:18.26#ibcon#*before return 0, iclass 25, count 2 2006.229.21:26:18.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:18.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.21:26:18.26#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.21:26:18.26#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:18.26#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:18.37#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:18.37#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:18.37#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:26:18.37#ibcon#first serial, iclass 25, count 0 2006.229.21:26:18.37#ibcon#enter sib2, iclass 25, count 0 2006.229.21:26:18.37#ibcon#flushed, iclass 25, count 0 2006.229.21:26:18.37#ibcon#about to write, iclass 25, count 0 2006.229.21:26:18.37#ibcon#wrote, iclass 25, count 0 2006.229.21:26:18.37#ibcon#about to read 3, iclass 25, count 0 2006.229.21:26:18.39#ibcon#read 3, iclass 25, count 0 2006.229.21:26:18.39#ibcon#about to read 4, iclass 25, count 0 2006.229.21:26:18.39#ibcon#read 4, iclass 25, count 0 2006.229.21:26:18.39#ibcon#about to read 5, iclass 25, count 0 2006.229.21:26:18.39#ibcon#read 5, iclass 25, count 0 2006.229.21:26:18.39#ibcon#about to read 6, iclass 25, count 0 2006.229.21:26:18.39#ibcon#read 6, iclass 25, count 0 2006.229.21:26:18.39#ibcon#end of sib2, iclass 25, count 0 2006.229.21:26:18.39#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:26:18.40#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:26:18.40#ibcon#[27=USB\r\n] 2006.229.21:26:18.40#ibcon#*before write, iclass 25, count 0 2006.229.21:26:18.40#ibcon#enter sib2, iclass 25, count 0 2006.229.21:26:18.40#ibcon#flushed, iclass 25, count 0 2006.229.21:26:18.40#ibcon#about to write, iclass 25, count 0 2006.229.21:26:18.40#ibcon#wrote, iclass 25, count 0 2006.229.21:26:18.40#ibcon#about to read 3, iclass 25, count 0 2006.229.21:26:18.42#ibcon#read 3, iclass 25, count 0 2006.229.21:26:18.42#ibcon#about to read 4, iclass 25, count 0 2006.229.21:26:18.42#ibcon#read 4, iclass 25, count 0 2006.229.21:26:18.42#ibcon#about to read 5, iclass 25, count 0 2006.229.21:26:18.42#ibcon#read 5, iclass 25, count 0 2006.229.21:26:18.42#ibcon#about to read 6, iclass 25, count 0 2006.229.21:26:18.42#ibcon#read 6, iclass 25, count 0 2006.229.21:26:18.42#ibcon#end of sib2, iclass 25, count 0 2006.229.21:26:18.42#ibcon#*after write, iclass 25, count 0 2006.229.21:26:18.42#ibcon#*before return 0, iclass 25, count 0 2006.229.21:26:18.43#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:18.43#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.21:26:18.43#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:26:18.43#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:26:18.43$vck44/vblo=6,719.99 2006.229.21:26:18.43#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.21:26:18.43#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.21:26:18.43#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:18.43#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:18.43#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:18.43#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:18.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:26:18.43#ibcon#first serial, iclass 27, count 0 2006.229.21:26:18.43#ibcon#enter sib2, iclass 27, count 0 2006.229.21:26:18.43#ibcon#flushed, iclass 27, count 0 2006.229.21:26:18.43#ibcon#about to write, iclass 27, count 0 2006.229.21:26:18.43#ibcon#wrote, iclass 27, count 0 2006.229.21:26:18.43#ibcon#about to read 3, iclass 27, count 0 2006.229.21:26:18.44#ibcon#read 3, iclass 27, count 0 2006.229.21:26:18.44#ibcon#about to read 4, iclass 27, count 0 2006.229.21:26:18.44#ibcon#read 4, iclass 27, count 0 2006.229.21:26:18.44#ibcon#about to read 5, iclass 27, count 0 2006.229.21:26:18.44#ibcon#read 5, iclass 27, count 0 2006.229.21:26:18.44#ibcon#about to read 6, iclass 27, count 0 2006.229.21:26:18.44#ibcon#read 6, iclass 27, count 0 2006.229.21:26:18.44#ibcon#end of sib2, iclass 27, count 0 2006.229.21:26:18.44#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:26:18.44#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:26:18.45#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:26:18.45#ibcon#*before write, iclass 27, count 0 2006.229.21:26:18.45#ibcon#enter sib2, iclass 27, count 0 2006.229.21:26:18.45#ibcon#flushed, iclass 27, count 0 2006.229.21:26:18.45#ibcon#about to write, iclass 27, count 0 2006.229.21:26:18.45#ibcon#wrote, iclass 27, count 0 2006.229.21:26:18.45#ibcon#about to read 3, iclass 27, count 0 2006.229.21:26:18.48#ibcon#read 3, iclass 27, count 0 2006.229.21:26:18.48#ibcon#about to read 4, iclass 27, count 0 2006.229.21:26:18.48#ibcon#read 4, iclass 27, count 0 2006.229.21:26:18.48#ibcon#about to read 5, iclass 27, count 0 2006.229.21:26:18.48#ibcon#read 5, iclass 27, count 0 2006.229.21:26:18.48#ibcon#about to read 6, iclass 27, count 0 2006.229.21:26:18.48#ibcon#read 6, iclass 27, count 0 2006.229.21:26:18.48#ibcon#end of sib2, iclass 27, count 0 2006.229.21:26:18.48#ibcon#*after write, iclass 27, count 0 2006.229.21:26:18.48#ibcon#*before return 0, iclass 27, count 0 2006.229.21:26:18.48#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:18.49#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.21:26:18.49#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:26:18.49#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:26:18.49$vck44/vb=6,4 2006.229.21:26:18.49#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.21:26:18.49#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.21:26:18.49#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:18.49#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:18.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:18.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:18.54#ibcon#enter wrdev, iclass 29, count 2 2006.229.21:26:18.54#ibcon#first serial, iclass 29, count 2 2006.229.21:26:18.54#ibcon#enter sib2, iclass 29, count 2 2006.229.21:26:18.54#ibcon#flushed, iclass 29, count 2 2006.229.21:26:18.54#ibcon#about to write, iclass 29, count 2 2006.229.21:26:18.54#ibcon#wrote, iclass 29, count 2 2006.229.21:26:18.54#ibcon#about to read 3, iclass 29, count 2 2006.229.21:26:18.56#ibcon#read 3, iclass 29, count 2 2006.229.21:26:18.56#ibcon#about to read 4, iclass 29, count 2 2006.229.21:26:18.56#ibcon#read 4, iclass 29, count 2 2006.229.21:26:18.56#ibcon#about to read 5, iclass 29, count 2 2006.229.21:26:18.56#ibcon#read 5, iclass 29, count 2 2006.229.21:26:18.56#ibcon#about to read 6, iclass 29, count 2 2006.229.21:26:18.56#ibcon#read 6, iclass 29, count 2 2006.229.21:26:18.56#ibcon#end of sib2, iclass 29, count 2 2006.229.21:26:18.56#ibcon#*mode == 0, iclass 29, count 2 2006.229.21:26:18.56#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.21:26:18.56#ibcon#[27=AT06-04\r\n] 2006.229.21:26:18.56#ibcon#*before write, iclass 29, count 2 2006.229.21:26:18.56#ibcon#enter sib2, iclass 29, count 2 2006.229.21:26:18.56#ibcon#flushed, iclass 29, count 2 2006.229.21:26:18.57#ibcon#about to write, iclass 29, count 2 2006.229.21:26:18.57#ibcon#wrote, iclass 29, count 2 2006.229.21:26:18.57#ibcon#about to read 3, iclass 29, count 2 2006.229.21:26:18.59#ibcon#read 3, iclass 29, count 2 2006.229.21:26:18.59#ibcon#about to read 4, iclass 29, count 2 2006.229.21:26:18.59#ibcon#read 4, iclass 29, count 2 2006.229.21:26:18.59#ibcon#about to read 5, iclass 29, count 2 2006.229.21:26:18.59#ibcon#read 5, iclass 29, count 2 2006.229.21:26:18.59#ibcon#about to read 6, iclass 29, count 2 2006.229.21:26:18.59#ibcon#read 6, iclass 29, count 2 2006.229.21:26:18.59#ibcon#end of sib2, iclass 29, count 2 2006.229.21:26:18.59#ibcon#*after write, iclass 29, count 2 2006.229.21:26:18.59#ibcon#*before return 0, iclass 29, count 2 2006.229.21:26:18.60#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:18.60#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.21:26:18.60#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.21:26:18.60#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:18.60#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:18.71#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:18.71#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:18.71#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:26:18.71#ibcon#first serial, iclass 29, count 0 2006.229.21:26:18.71#ibcon#enter sib2, iclass 29, count 0 2006.229.21:26:18.71#ibcon#flushed, iclass 29, count 0 2006.229.21:26:18.71#ibcon#about to write, iclass 29, count 0 2006.229.21:26:18.71#ibcon#wrote, iclass 29, count 0 2006.229.21:26:18.71#ibcon#about to read 3, iclass 29, count 0 2006.229.21:26:18.73#ibcon#read 3, iclass 29, count 0 2006.229.21:26:18.73#ibcon#about to read 4, iclass 29, count 0 2006.229.21:26:18.73#ibcon#read 4, iclass 29, count 0 2006.229.21:26:18.73#ibcon#about to read 5, iclass 29, count 0 2006.229.21:26:18.73#ibcon#read 5, iclass 29, count 0 2006.229.21:26:18.73#ibcon#about to read 6, iclass 29, count 0 2006.229.21:26:18.73#ibcon#read 6, iclass 29, count 0 2006.229.21:26:18.73#ibcon#end of sib2, iclass 29, count 0 2006.229.21:26:18.73#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:26:18.73#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:26:18.73#ibcon#[27=USB\r\n] 2006.229.21:26:18.73#ibcon#*before write, iclass 29, count 0 2006.229.21:26:18.73#ibcon#enter sib2, iclass 29, count 0 2006.229.21:26:18.74#ibcon#flushed, iclass 29, count 0 2006.229.21:26:18.74#ibcon#about to write, iclass 29, count 0 2006.229.21:26:18.74#ibcon#wrote, iclass 29, count 0 2006.229.21:26:18.74#ibcon#about to read 3, iclass 29, count 0 2006.229.21:26:18.76#ibcon#read 3, iclass 29, count 0 2006.229.21:26:18.76#ibcon#about to read 4, iclass 29, count 0 2006.229.21:26:18.76#ibcon#read 4, iclass 29, count 0 2006.229.21:26:18.76#ibcon#about to read 5, iclass 29, count 0 2006.229.21:26:18.76#ibcon#read 5, iclass 29, count 0 2006.229.21:26:18.76#ibcon#about to read 6, iclass 29, count 0 2006.229.21:26:18.76#ibcon#read 6, iclass 29, count 0 2006.229.21:26:18.76#ibcon#end of sib2, iclass 29, count 0 2006.229.21:26:18.76#ibcon#*after write, iclass 29, count 0 2006.229.21:26:18.76#ibcon#*before return 0, iclass 29, count 0 2006.229.21:26:18.76#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:18.76#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.21:26:18.77#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:26:18.77#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:26:18.77$vck44/vblo=7,734.99 2006.229.21:26:18.77#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.21:26:18.77#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.21:26:18.77#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:18.77#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:18.77#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:18.77#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:18.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:26:18.77#ibcon#first serial, iclass 31, count 0 2006.229.21:26:18.77#ibcon#enter sib2, iclass 31, count 0 2006.229.21:26:18.77#ibcon#flushed, iclass 31, count 0 2006.229.21:26:18.77#ibcon#about to write, iclass 31, count 0 2006.229.21:26:18.77#ibcon#wrote, iclass 31, count 0 2006.229.21:26:18.77#ibcon#about to read 3, iclass 31, count 0 2006.229.21:26:18.78#ibcon#read 3, iclass 31, count 0 2006.229.21:26:18.78#ibcon#about to read 4, iclass 31, count 0 2006.229.21:26:18.78#ibcon#read 4, iclass 31, count 0 2006.229.21:26:18.78#ibcon#about to read 5, iclass 31, count 0 2006.229.21:26:18.78#ibcon#read 5, iclass 31, count 0 2006.229.21:26:18.78#ibcon#about to read 6, iclass 31, count 0 2006.229.21:26:18.78#ibcon#read 6, iclass 31, count 0 2006.229.21:26:18.78#ibcon#end of sib2, iclass 31, count 0 2006.229.21:26:18.78#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:26:18.78#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:26:18.78#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:26:18.78#ibcon#*before write, iclass 31, count 0 2006.229.21:26:18.78#ibcon#enter sib2, iclass 31, count 0 2006.229.21:26:18.79#ibcon#flushed, iclass 31, count 0 2006.229.21:26:18.79#ibcon#about to write, iclass 31, count 0 2006.229.21:26:18.79#ibcon#wrote, iclass 31, count 0 2006.229.21:26:18.79#ibcon#about to read 3, iclass 31, count 0 2006.229.21:26:18.82#ibcon#read 3, iclass 31, count 0 2006.229.21:26:18.82#ibcon#about to read 4, iclass 31, count 0 2006.229.21:26:18.82#ibcon#read 4, iclass 31, count 0 2006.229.21:26:18.82#ibcon#about to read 5, iclass 31, count 0 2006.229.21:26:18.82#ibcon#read 5, iclass 31, count 0 2006.229.21:26:18.82#ibcon#about to read 6, iclass 31, count 0 2006.229.21:26:18.82#ibcon#read 6, iclass 31, count 0 2006.229.21:26:18.82#ibcon#end of sib2, iclass 31, count 0 2006.229.21:26:18.82#ibcon#*after write, iclass 31, count 0 2006.229.21:26:18.82#ibcon#*before return 0, iclass 31, count 0 2006.229.21:26:18.83#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:18.83#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.21:26:18.83#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:26:18.83#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:26:18.83$vck44/vb=7,4 2006.229.21:26:18.83#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.21:26:18.83#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.21:26:18.83#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:18.83#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:18.87#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:18.87#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:18.87#ibcon#enter wrdev, iclass 33, count 2 2006.229.21:26:18.87#ibcon#first serial, iclass 33, count 2 2006.229.21:26:18.87#ibcon#enter sib2, iclass 33, count 2 2006.229.21:26:18.87#ibcon#flushed, iclass 33, count 2 2006.229.21:26:18.87#ibcon#about to write, iclass 33, count 2 2006.229.21:26:18.87#ibcon#wrote, iclass 33, count 2 2006.229.21:26:18.88#ibcon#about to read 3, iclass 33, count 2 2006.229.21:26:18.89#ibcon#read 3, iclass 33, count 2 2006.229.21:26:18.89#ibcon#about to read 4, iclass 33, count 2 2006.229.21:26:18.89#ibcon#read 4, iclass 33, count 2 2006.229.21:26:18.89#ibcon#about to read 5, iclass 33, count 2 2006.229.21:26:18.89#ibcon#read 5, iclass 33, count 2 2006.229.21:26:18.89#ibcon#about to read 6, iclass 33, count 2 2006.229.21:26:18.89#ibcon#read 6, iclass 33, count 2 2006.229.21:26:18.89#ibcon#end of sib2, iclass 33, count 2 2006.229.21:26:18.89#ibcon#*mode == 0, iclass 33, count 2 2006.229.21:26:18.89#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.21:26:18.89#ibcon#[27=AT07-04\r\n] 2006.229.21:26:18.89#ibcon#*before write, iclass 33, count 2 2006.229.21:26:18.90#ibcon#enter sib2, iclass 33, count 2 2006.229.21:26:18.90#ibcon#flushed, iclass 33, count 2 2006.229.21:26:18.90#ibcon#about to write, iclass 33, count 2 2006.229.21:26:18.90#ibcon#wrote, iclass 33, count 2 2006.229.21:26:18.90#ibcon#about to read 3, iclass 33, count 2 2006.229.21:26:18.92#ibcon#read 3, iclass 33, count 2 2006.229.21:26:18.92#ibcon#about to read 4, iclass 33, count 2 2006.229.21:26:18.92#ibcon#read 4, iclass 33, count 2 2006.229.21:26:18.92#ibcon#about to read 5, iclass 33, count 2 2006.229.21:26:18.92#ibcon#read 5, iclass 33, count 2 2006.229.21:26:18.92#ibcon#about to read 6, iclass 33, count 2 2006.229.21:26:18.92#ibcon#read 6, iclass 33, count 2 2006.229.21:26:18.92#ibcon#end of sib2, iclass 33, count 2 2006.229.21:26:18.92#ibcon#*after write, iclass 33, count 2 2006.229.21:26:18.93#ibcon#*before return 0, iclass 33, count 2 2006.229.21:26:18.93#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:18.93#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.21:26:18.93#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.21:26:18.93#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:18.93#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:19.04#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:19.04#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:19.04#ibcon#enter wrdev, iclass 33, count 0 2006.229.21:26:19.04#ibcon#first serial, iclass 33, count 0 2006.229.21:26:19.04#ibcon#enter sib2, iclass 33, count 0 2006.229.21:26:19.04#ibcon#flushed, iclass 33, count 0 2006.229.21:26:19.04#ibcon#about to write, iclass 33, count 0 2006.229.21:26:19.04#ibcon#wrote, iclass 33, count 0 2006.229.21:26:19.05#ibcon#about to read 3, iclass 33, count 0 2006.229.21:26:19.06#ibcon#read 3, iclass 33, count 0 2006.229.21:26:19.06#ibcon#about to read 4, iclass 33, count 0 2006.229.21:26:19.06#ibcon#read 4, iclass 33, count 0 2006.229.21:26:19.06#ibcon#about to read 5, iclass 33, count 0 2006.229.21:26:19.06#ibcon#read 5, iclass 33, count 0 2006.229.21:26:19.06#ibcon#about to read 6, iclass 33, count 0 2006.229.21:26:19.06#ibcon#read 6, iclass 33, count 0 2006.229.21:26:19.06#ibcon#end of sib2, iclass 33, count 0 2006.229.21:26:19.06#ibcon#*mode == 0, iclass 33, count 0 2006.229.21:26:19.07#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.21:26:19.07#ibcon#[27=USB\r\n] 2006.229.21:26:19.07#ibcon#*before write, iclass 33, count 0 2006.229.21:26:19.07#ibcon#enter sib2, iclass 33, count 0 2006.229.21:26:19.07#ibcon#flushed, iclass 33, count 0 2006.229.21:26:19.07#ibcon#about to write, iclass 33, count 0 2006.229.21:26:19.07#ibcon#wrote, iclass 33, count 0 2006.229.21:26:19.07#ibcon#about to read 3, iclass 33, count 0 2006.229.21:26:19.09#ibcon#read 3, iclass 33, count 0 2006.229.21:26:19.09#ibcon#about to read 4, iclass 33, count 0 2006.229.21:26:19.09#ibcon#read 4, iclass 33, count 0 2006.229.21:26:19.09#ibcon#about to read 5, iclass 33, count 0 2006.229.21:26:19.09#ibcon#read 5, iclass 33, count 0 2006.229.21:26:19.09#ibcon#about to read 6, iclass 33, count 0 2006.229.21:26:19.09#ibcon#read 6, iclass 33, count 0 2006.229.21:26:19.09#ibcon#end of sib2, iclass 33, count 0 2006.229.21:26:19.09#ibcon#*after write, iclass 33, count 0 2006.229.21:26:19.09#ibcon#*before return 0, iclass 33, count 0 2006.229.21:26:19.09#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:19.10#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.21:26:19.10#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.21:26:19.10#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.21:26:19.10$vck44/vblo=8,744.99 2006.229.21:26:19.10#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.21:26:19.10#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.21:26:19.10#ibcon#ireg 17 cls_cnt 0 2006.229.21:26:19.10#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:19.10#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:19.10#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:19.10#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:26:19.10#ibcon#first serial, iclass 35, count 0 2006.229.21:26:19.10#ibcon#enter sib2, iclass 35, count 0 2006.229.21:26:19.10#ibcon#flushed, iclass 35, count 0 2006.229.21:26:19.10#ibcon#about to write, iclass 35, count 0 2006.229.21:26:19.10#ibcon#wrote, iclass 35, count 0 2006.229.21:26:19.10#ibcon#about to read 3, iclass 35, count 0 2006.229.21:26:19.11#ibcon#read 3, iclass 35, count 0 2006.229.21:26:19.11#ibcon#about to read 4, iclass 35, count 0 2006.229.21:26:19.11#ibcon#read 4, iclass 35, count 0 2006.229.21:26:19.11#ibcon#about to read 5, iclass 35, count 0 2006.229.21:26:19.11#ibcon#read 5, iclass 35, count 0 2006.229.21:26:19.11#ibcon#about to read 6, iclass 35, count 0 2006.229.21:26:19.11#ibcon#read 6, iclass 35, count 0 2006.229.21:26:19.11#ibcon#end of sib2, iclass 35, count 0 2006.229.21:26:19.11#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:26:19.12#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:26:19.12#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:26:19.12#ibcon#*before write, iclass 35, count 0 2006.229.21:26:19.12#ibcon#enter sib2, iclass 35, count 0 2006.229.21:26:19.12#ibcon#flushed, iclass 35, count 0 2006.229.21:26:19.12#ibcon#about to write, iclass 35, count 0 2006.229.21:26:19.12#ibcon#wrote, iclass 35, count 0 2006.229.21:26:19.12#ibcon#about to read 3, iclass 35, count 0 2006.229.21:26:19.15#ibcon#read 3, iclass 35, count 0 2006.229.21:26:19.15#ibcon#about to read 4, iclass 35, count 0 2006.229.21:26:19.15#ibcon#read 4, iclass 35, count 0 2006.229.21:26:19.15#ibcon#about to read 5, iclass 35, count 0 2006.229.21:26:19.15#ibcon#read 5, iclass 35, count 0 2006.229.21:26:19.15#ibcon#about to read 6, iclass 35, count 0 2006.229.21:26:19.15#ibcon#read 6, iclass 35, count 0 2006.229.21:26:19.15#ibcon#end of sib2, iclass 35, count 0 2006.229.21:26:19.15#ibcon#*after write, iclass 35, count 0 2006.229.21:26:19.16#ibcon#*before return 0, iclass 35, count 0 2006.229.21:26:19.16#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:19.16#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.21:26:19.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:26:19.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:26:19.16$vck44/vb=8,4 2006.229.21:26:19.16#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.21:26:19.16#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.21:26:19.16#ibcon#ireg 11 cls_cnt 2 2006.229.21:26:19.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:19.20#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:19.20#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:19.20#ibcon#enter wrdev, iclass 37, count 2 2006.229.21:26:19.20#ibcon#first serial, iclass 37, count 2 2006.229.21:26:19.20#ibcon#enter sib2, iclass 37, count 2 2006.229.21:26:19.20#ibcon#flushed, iclass 37, count 2 2006.229.21:26:19.20#ibcon#about to write, iclass 37, count 2 2006.229.21:26:19.20#ibcon#wrote, iclass 37, count 2 2006.229.21:26:19.21#ibcon#about to read 3, iclass 37, count 2 2006.229.21:26:19.22#ibcon#read 3, iclass 37, count 2 2006.229.21:26:19.22#ibcon#about to read 4, iclass 37, count 2 2006.229.21:26:19.22#ibcon#read 4, iclass 37, count 2 2006.229.21:26:19.22#ibcon#about to read 5, iclass 37, count 2 2006.229.21:26:19.22#ibcon#read 5, iclass 37, count 2 2006.229.21:26:19.22#ibcon#about to read 6, iclass 37, count 2 2006.229.21:26:19.22#ibcon#read 6, iclass 37, count 2 2006.229.21:26:19.23#ibcon#end of sib2, iclass 37, count 2 2006.229.21:26:19.23#ibcon#*mode == 0, iclass 37, count 2 2006.229.21:26:19.23#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.21:26:19.23#ibcon#[27=AT08-04\r\n] 2006.229.21:26:19.23#ibcon#*before write, iclass 37, count 2 2006.229.21:26:19.23#ibcon#enter sib2, iclass 37, count 2 2006.229.21:26:19.23#ibcon#flushed, iclass 37, count 2 2006.229.21:26:19.23#ibcon#about to write, iclass 37, count 2 2006.229.21:26:19.23#ibcon#wrote, iclass 37, count 2 2006.229.21:26:19.23#ibcon#about to read 3, iclass 37, count 2 2006.229.21:26:19.25#ibcon#read 3, iclass 37, count 2 2006.229.21:26:19.25#ibcon#about to read 4, iclass 37, count 2 2006.229.21:26:19.25#ibcon#read 4, iclass 37, count 2 2006.229.21:26:19.25#ibcon#about to read 5, iclass 37, count 2 2006.229.21:26:19.25#ibcon#read 5, iclass 37, count 2 2006.229.21:26:19.25#ibcon#about to read 6, iclass 37, count 2 2006.229.21:26:19.25#ibcon#read 6, iclass 37, count 2 2006.229.21:26:19.25#ibcon#end of sib2, iclass 37, count 2 2006.229.21:26:19.26#ibcon#*after write, iclass 37, count 2 2006.229.21:26:19.26#ibcon#*before return 0, iclass 37, count 2 2006.229.21:26:19.26#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:19.26#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.21:26:19.26#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.21:26:19.26#ibcon#ireg 7 cls_cnt 0 2006.229.21:26:19.26#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:19.37#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:19.37#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:19.37#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:26:19.37#ibcon#first serial, iclass 37, count 0 2006.229.21:26:19.37#ibcon#enter sib2, iclass 37, count 0 2006.229.21:26:19.37#ibcon#flushed, iclass 37, count 0 2006.229.21:26:19.37#ibcon#about to write, iclass 37, count 0 2006.229.21:26:19.37#ibcon#wrote, iclass 37, count 0 2006.229.21:26:19.37#ibcon#about to read 3, iclass 37, count 0 2006.229.21:26:19.39#ibcon#read 3, iclass 37, count 0 2006.229.21:26:19.39#ibcon#about to read 4, iclass 37, count 0 2006.229.21:26:19.39#ibcon#read 4, iclass 37, count 0 2006.229.21:26:19.39#ibcon#about to read 5, iclass 37, count 0 2006.229.21:26:19.39#ibcon#read 5, iclass 37, count 0 2006.229.21:26:19.39#ibcon#about to read 6, iclass 37, count 0 2006.229.21:26:19.39#ibcon#read 6, iclass 37, count 0 2006.229.21:26:19.40#ibcon#end of sib2, iclass 37, count 0 2006.229.21:26:19.40#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:26:19.40#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:26:19.40#ibcon#[27=USB\r\n] 2006.229.21:26:19.40#ibcon#*before write, iclass 37, count 0 2006.229.21:26:19.40#ibcon#enter sib2, iclass 37, count 0 2006.229.21:26:19.40#ibcon#flushed, iclass 37, count 0 2006.229.21:26:19.40#ibcon#about to write, iclass 37, count 0 2006.229.21:26:19.40#ibcon#wrote, iclass 37, count 0 2006.229.21:26:19.40#ibcon#about to read 3, iclass 37, count 0 2006.229.21:26:19.42#ibcon#read 3, iclass 37, count 0 2006.229.21:26:19.42#ibcon#about to read 4, iclass 37, count 0 2006.229.21:26:19.42#ibcon#read 4, iclass 37, count 0 2006.229.21:26:19.42#ibcon#about to read 5, iclass 37, count 0 2006.229.21:26:19.42#ibcon#read 5, iclass 37, count 0 2006.229.21:26:19.42#ibcon#about to read 6, iclass 37, count 0 2006.229.21:26:19.42#ibcon#read 6, iclass 37, count 0 2006.229.21:26:19.42#ibcon#end of sib2, iclass 37, count 0 2006.229.21:26:19.42#ibcon#*after write, iclass 37, count 0 2006.229.21:26:19.42#ibcon#*before return 0, iclass 37, count 0 2006.229.21:26:19.43#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:19.43#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.21:26:19.43#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:26:19.43#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:26:19.43$vck44/vabw=wide 2006.229.21:26:19.43#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.21:26:19.43#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.21:26:19.43#ibcon#ireg 8 cls_cnt 0 2006.229.21:26:19.43#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:19.43#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:19.43#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:19.43#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:26:19.43#ibcon#first serial, iclass 39, count 0 2006.229.21:26:19.43#ibcon#enter sib2, iclass 39, count 0 2006.229.21:26:19.43#ibcon#flushed, iclass 39, count 0 2006.229.21:26:19.43#ibcon#about to write, iclass 39, count 0 2006.229.21:26:19.43#ibcon#wrote, iclass 39, count 0 2006.229.21:26:19.43#ibcon#about to read 3, iclass 39, count 0 2006.229.21:26:19.44#ibcon#read 3, iclass 39, count 0 2006.229.21:26:19.44#ibcon#about to read 4, iclass 39, count 0 2006.229.21:26:19.44#ibcon#read 4, iclass 39, count 0 2006.229.21:26:19.44#ibcon#about to read 5, iclass 39, count 0 2006.229.21:26:19.44#ibcon#read 5, iclass 39, count 0 2006.229.21:26:19.44#ibcon#about to read 6, iclass 39, count 0 2006.229.21:26:19.45#ibcon#read 6, iclass 39, count 0 2006.229.21:26:19.45#ibcon#end of sib2, iclass 39, count 0 2006.229.21:26:19.45#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:26:19.45#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:26:19.45#ibcon#[25=BW32\r\n] 2006.229.21:26:19.45#ibcon#*before write, iclass 39, count 0 2006.229.21:26:19.45#ibcon#enter sib2, iclass 39, count 0 2006.229.21:26:19.45#ibcon#flushed, iclass 39, count 0 2006.229.21:26:19.45#ibcon#about to write, iclass 39, count 0 2006.229.21:26:19.45#ibcon#wrote, iclass 39, count 0 2006.229.21:26:19.45#ibcon#about to read 3, iclass 39, count 0 2006.229.21:26:19.47#ibcon#read 3, iclass 39, count 0 2006.229.21:26:19.47#ibcon#about to read 4, iclass 39, count 0 2006.229.21:26:19.47#ibcon#read 4, iclass 39, count 0 2006.229.21:26:19.47#ibcon#about to read 5, iclass 39, count 0 2006.229.21:26:19.47#ibcon#read 5, iclass 39, count 0 2006.229.21:26:19.47#ibcon#about to read 6, iclass 39, count 0 2006.229.21:26:19.47#ibcon#read 6, iclass 39, count 0 2006.229.21:26:19.47#ibcon#end of sib2, iclass 39, count 0 2006.229.21:26:19.47#ibcon#*after write, iclass 39, count 0 2006.229.21:26:19.47#ibcon#*before return 0, iclass 39, count 0 2006.229.21:26:19.48#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:19.48#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.21:26:19.48#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:26:19.48#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:26:19.48$vck44/vbbw=wide 2006.229.21:26:19.48#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.21:26:19.48#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.21:26:19.48#ibcon#ireg 8 cls_cnt 0 2006.229.21:26:19.48#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:26:19.54#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:26:19.54#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:26:19.54#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:26:19.54#ibcon#first serial, iclass 3, count 0 2006.229.21:26:19.54#ibcon#enter sib2, iclass 3, count 0 2006.229.21:26:19.54#ibcon#flushed, iclass 3, count 0 2006.229.21:26:19.54#ibcon#about to write, iclass 3, count 0 2006.229.21:26:19.54#ibcon#wrote, iclass 3, count 0 2006.229.21:26:19.54#ibcon#about to read 3, iclass 3, count 0 2006.229.21:26:19.56#ibcon#read 3, iclass 3, count 0 2006.229.21:26:19.56#ibcon#about to read 4, iclass 3, count 0 2006.229.21:26:19.56#ibcon#read 4, iclass 3, count 0 2006.229.21:26:19.56#ibcon#about to read 5, iclass 3, count 0 2006.229.21:26:19.56#ibcon#read 5, iclass 3, count 0 2006.229.21:26:19.56#ibcon#about to read 6, iclass 3, count 0 2006.229.21:26:19.56#ibcon#read 6, iclass 3, count 0 2006.229.21:26:19.56#ibcon#end of sib2, iclass 3, count 0 2006.229.21:26:19.56#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:26:19.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:26:19.57#ibcon#[27=BW32\r\n] 2006.229.21:26:19.57#ibcon#*before write, iclass 3, count 0 2006.229.21:26:19.57#ibcon#enter sib2, iclass 3, count 0 2006.229.21:26:19.57#ibcon#flushed, iclass 3, count 0 2006.229.21:26:19.57#ibcon#about to write, iclass 3, count 0 2006.229.21:26:19.57#ibcon#wrote, iclass 3, count 0 2006.229.21:26:19.57#ibcon#about to read 3, iclass 3, count 0 2006.229.21:26:19.59#ibcon#read 3, iclass 3, count 0 2006.229.21:26:19.59#ibcon#about to read 4, iclass 3, count 0 2006.229.21:26:19.59#ibcon#read 4, iclass 3, count 0 2006.229.21:26:19.59#ibcon#about to read 5, iclass 3, count 0 2006.229.21:26:19.59#ibcon#read 5, iclass 3, count 0 2006.229.21:26:19.59#ibcon#about to read 6, iclass 3, count 0 2006.229.21:26:19.59#ibcon#read 6, iclass 3, count 0 2006.229.21:26:19.59#ibcon#end of sib2, iclass 3, count 0 2006.229.21:26:19.59#ibcon#*after write, iclass 3, count 0 2006.229.21:26:19.59#ibcon#*before return 0, iclass 3, count 0 2006.229.21:26:19.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:26:19.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:26:19.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:26:19.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:26:19.60$setupk4/ifdk4 2006.229.21:26:19.60$ifdk4/lo= 2006.229.21:26:19.60$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:26:19.60$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:26:19.60$ifdk4/patch= 2006.229.21:26:19.60$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:26:19.60$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:26:19.60$setupk4/!*+20s 2006.229.21:26:24.60#abcon#<5=/07 1.4 4.7 26.971001002.1\r\n> 2006.229.21:26:24.62#abcon#{5=INTERFACE CLEAR} 2006.229.21:26:24.68#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:26:34.20$setupk4/"tpicd 2006.229.21:26:34.20$setupk4/echo=off 2006.229.21:26:34.21$setupk4/xlog=off 2006.229.21:26:34.21:!2006.229.21:28:44 2006.229.21:26:51.14#trakl#Source acquired 2006.229.21:26:51.15#flagr#flagr/antenna,acquired 2006.229.21:28:44.01:preob 2006.229.21:28:45.13/onsource/TRACKING 2006.229.21:28:45.14:!2006.229.21:28:54 2006.229.21:28:54.01:"tape 2006.229.21:28:54.01:"st=record 2006.229.21:28:54.02:data_valid=on 2006.229.21:28:54.02:midob 2006.229.21:28:55.13/onsource/TRACKING 2006.229.21:28:55.14/wx/27.04,1002.1,100 2006.229.21:28:55.30/cable/+6.4210E-03 2006.229.21:28:56.39/va/01,08,usb,yes,29,31 2006.229.21:28:56.39/va/02,07,usb,yes,32,32 2006.229.21:28:56.39/va/03,06,usb,yes,39,42 2006.229.21:28:56.39/va/04,07,usb,yes,32,34 2006.229.21:28:56.39/va/05,04,usb,yes,29,29 2006.229.21:28:56.39/va/06,04,usb,yes,33,32 2006.229.21:28:56.39/va/07,05,usb,yes,29,29 2006.229.21:28:56.39/va/08,06,usb,yes,21,26 2006.229.21:28:56.62/valo/01,524.99,yes,locked 2006.229.21:28:56.62/valo/02,534.99,yes,locked 2006.229.21:28:56.62/valo/03,564.99,yes,locked 2006.229.21:28:56.62/valo/04,624.99,yes,locked 2006.229.21:28:56.62/valo/05,734.99,yes,locked 2006.229.21:28:56.62/valo/06,814.99,yes,locked 2006.229.21:28:56.62/valo/07,864.99,yes,locked 2006.229.21:28:56.62/valo/08,884.99,yes,locked 2006.229.21:28:57.71/vb/01,04,usb,yes,31,29 2006.229.21:28:57.71/vb/02,04,usb,yes,33,33 2006.229.21:28:57.71/vb/03,04,usb,yes,30,33 2006.229.21:28:57.71/vb/04,04,usb,yes,34,33 2006.229.21:28:57.71/vb/05,04,usb,yes,27,29 2006.229.21:28:57.71/vb/06,04,usb,yes,31,27 2006.229.21:28:57.71/vb/07,04,usb,yes,31,31 2006.229.21:28:57.71/vb/08,04,usb,yes,28,32 2006.229.21:28:57.95/vblo/01,629.99,yes,locked 2006.229.21:28:57.95/vblo/02,634.99,yes,locked 2006.229.21:28:57.95/vblo/03,649.99,yes,locked 2006.229.21:28:57.95/vblo/04,679.99,yes,locked 2006.229.21:28:57.95/vblo/05,709.99,yes,locked 2006.229.21:28:57.95/vblo/06,719.99,yes,locked 2006.229.21:28:57.95/vblo/07,734.99,yes,locked 2006.229.21:28:57.95/vblo/08,744.99,yes,locked 2006.229.21:28:58.10/vabw/8 2006.229.21:28:58.25/vbbw/8 2006.229.21:28:58.34/xfe/off,on,12.2 2006.229.21:28:58.73/ifatt/23,28,28,28 2006.229.21:28:59.07/fmout-gps/S +4.56E-07 2006.229.21:28:59.12:!2006.229.21:31:24 2006.229.21:31:24.01:data_valid=off 2006.229.21:31:24.01:"et 2006.229.21:31:24.01:!+3s 2006.229.21:31:27.02:"tape 2006.229.21:31:27.02:postob 2006.229.21:31:27.17/cable/+6.4228E-03 2006.229.21:31:27.17/wx/27.09,1002.1,100 2006.229.21:31:27.23/fmout-gps/S +4.54E-07 2006.229.21:31:27.23:scan_name=229-2133,jd0608,300 2006.229.21:31:27.23:source=2201+315,220314.98,314538.3,2000.0,ccw 2006.229.21:31:28.14#flagr#flagr/antenna,new-source 2006.229.21:31:28.14:checkk5 2006.229.21:31:28.52/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:31:28.92/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:31:29.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:31:29.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:31:30.12/chk_obsdata//k5ts1/T2292128??a.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.21:31:30.51/chk_obsdata//k5ts2/T2292128??b.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.21:31:30.91/chk_obsdata//k5ts3/T2292128??c.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.21:31:31.32/chk_obsdata//k5ts4/T2292128??d.dat file size is correct (nominal:600MB, actual:600MB). 2006.229.21:31:32.05/k5log//k5ts1_log_newline 2006.229.21:31:32.76/k5log//k5ts2_log_newline 2006.229.21:31:33.47/k5log//k5ts3_log_newline 2006.229.21:31:34.18/k5log//k5ts4_log_newline 2006.229.21:31:34.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:31:34.20:setupk4=1 2006.229.21:31:34.20$setupk4/echo=on 2006.229.21:31:34.20$setupk4/pcalon 2006.229.21:31:34.20$pcalon/"no phase cal control is implemented here 2006.229.21:31:34.20$setupk4/"tpicd=stop 2006.229.21:31:34.20$setupk4/"rec=synch_on 2006.229.21:31:34.21$setupk4/"rec_mode=128 2006.229.21:31:34.21$setupk4/!* 2006.229.21:31:34.21$setupk4/recpk4 2006.229.21:31:34.21$recpk4/recpatch= 2006.229.21:31:34.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:31:34.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:31:34.21$setupk4/vck44 2006.229.21:31:34.21$vck44/valo=1,524.99 2006.229.21:31:34.21#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.21:31:34.21#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.21:31:34.21#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:34.21#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:34.21#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:34.21#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:34.21#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:31:34.21#ibcon#first serial, iclass 26, count 0 2006.229.21:31:34.21#ibcon#enter sib2, iclass 26, count 0 2006.229.21:31:34.21#ibcon#flushed, iclass 26, count 0 2006.229.21:31:34.21#ibcon#about to write, iclass 26, count 0 2006.229.21:31:34.21#ibcon#wrote, iclass 26, count 0 2006.229.21:31:34.21#ibcon#about to read 3, iclass 26, count 0 2006.229.21:31:34.23#ibcon#read 3, iclass 26, count 0 2006.229.21:31:34.23#ibcon#about to read 4, iclass 26, count 0 2006.229.21:31:34.23#ibcon#read 4, iclass 26, count 0 2006.229.21:31:34.23#ibcon#about to read 5, iclass 26, count 0 2006.229.21:31:34.23#ibcon#read 5, iclass 26, count 0 2006.229.21:31:34.23#ibcon#about to read 6, iclass 26, count 0 2006.229.21:31:34.23#ibcon#read 6, iclass 26, count 0 2006.229.21:31:34.23#ibcon#end of sib2, iclass 26, count 0 2006.229.21:31:34.23#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:31:34.23#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:31:34.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:31:34.23#ibcon#*before write, iclass 26, count 0 2006.229.21:31:34.23#ibcon#enter sib2, iclass 26, count 0 2006.229.21:31:34.23#ibcon#flushed, iclass 26, count 0 2006.229.21:31:34.23#ibcon#about to write, iclass 26, count 0 2006.229.21:31:34.23#ibcon#wrote, iclass 26, count 0 2006.229.21:31:34.23#ibcon#about to read 3, iclass 26, count 0 2006.229.21:31:34.28#ibcon#read 3, iclass 26, count 0 2006.229.21:31:34.28#ibcon#about to read 4, iclass 26, count 0 2006.229.21:31:34.28#ibcon#read 4, iclass 26, count 0 2006.229.21:31:34.28#ibcon#about to read 5, iclass 26, count 0 2006.229.21:31:34.28#ibcon#read 5, iclass 26, count 0 2006.229.21:31:34.28#ibcon#about to read 6, iclass 26, count 0 2006.229.21:31:34.28#ibcon#read 6, iclass 26, count 0 2006.229.21:31:34.28#ibcon#end of sib2, iclass 26, count 0 2006.229.21:31:34.28#ibcon#*after write, iclass 26, count 0 2006.229.21:31:34.28#ibcon#*before return 0, iclass 26, count 0 2006.229.21:31:34.28#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:34.28#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:34.28#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:31:34.28#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:31:34.28$vck44/va=1,8 2006.229.21:31:34.28#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.21:31:34.28#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.21:31:34.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:34.28#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:34.28#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:34.28#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:34.28#ibcon#enter wrdev, iclass 28, count 2 2006.229.21:31:34.28#ibcon#first serial, iclass 28, count 2 2006.229.21:31:34.28#ibcon#enter sib2, iclass 28, count 2 2006.229.21:31:34.28#ibcon#flushed, iclass 28, count 2 2006.229.21:31:34.28#ibcon#about to write, iclass 28, count 2 2006.229.21:31:34.28#ibcon#wrote, iclass 28, count 2 2006.229.21:31:34.28#ibcon#about to read 3, iclass 28, count 2 2006.229.21:31:34.30#ibcon#read 3, iclass 28, count 2 2006.229.21:31:34.30#ibcon#about to read 4, iclass 28, count 2 2006.229.21:31:34.30#ibcon#read 4, iclass 28, count 2 2006.229.21:31:34.30#ibcon#about to read 5, iclass 28, count 2 2006.229.21:31:34.30#ibcon#read 5, iclass 28, count 2 2006.229.21:31:34.30#ibcon#about to read 6, iclass 28, count 2 2006.229.21:31:34.30#ibcon#read 6, iclass 28, count 2 2006.229.21:31:34.30#ibcon#end of sib2, iclass 28, count 2 2006.229.21:31:34.30#ibcon#*mode == 0, iclass 28, count 2 2006.229.21:31:34.30#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.21:31:34.30#ibcon#[25=AT01-08\r\n] 2006.229.21:31:34.30#ibcon#*before write, iclass 28, count 2 2006.229.21:31:34.30#ibcon#enter sib2, iclass 28, count 2 2006.229.21:31:34.30#ibcon#flushed, iclass 28, count 2 2006.229.21:31:34.30#ibcon#about to write, iclass 28, count 2 2006.229.21:31:34.30#ibcon#wrote, iclass 28, count 2 2006.229.21:31:34.30#ibcon#about to read 3, iclass 28, count 2 2006.229.21:31:34.33#ibcon#read 3, iclass 28, count 2 2006.229.21:31:34.33#ibcon#about to read 4, iclass 28, count 2 2006.229.21:31:34.33#ibcon#read 4, iclass 28, count 2 2006.229.21:31:34.33#ibcon#about to read 5, iclass 28, count 2 2006.229.21:31:34.33#ibcon#read 5, iclass 28, count 2 2006.229.21:31:34.33#ibcon#about to read 6, iclass 28, count 2 2006.229.21:31:34.33#ibcon#read 6, iclass 28, count 2 2006.229.21:31:34.33#ibcon#end of sib2, iclass 28, count 2 2006.229.21:31:34.33#ibcon#*after write, iclass 28, count 2 2006.229.21:31:34.33#ibcon#*before return 0, iclass 28, count 2 2006.229.21:31:34.33#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:34.33#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:34.33#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.21:31:34.33#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:34.33#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:34.45#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:34.45#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:34.45#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:31:34.45#ibcon#first serial, iclass 28, count 0 2006.229.21:31:34.45#ibcon#enter sib2, iclass 28, count 0 2006.229.21:31:34.45#ibcon#flushed, iclass 28, count 0 2006.229.21:31:34.45#ibcon#about to write, iclass 28, count 0 2006.229.21:31:34.45#ibcon#wrote, iclass 28, count 0 2006.229.21:31:34.45#ibcon#about to read 3, iclass 28, count 0 2006.229.21:31:34.47#ibcon#read 3, iclass 28, count 0 2006.229.21:31:34.47#ibcon#about to read 4, iclass 28, count 0 2006.229.21:31:34.47#ibcon#read 4, iclass 28, count 0 2006.229.21:31:34.47#ibcon#about to read 5, iclass 28, count 0 2006.229.21:31:34.47#ibcon#read 5, iclass 28, count 0 2006.229.21:31:34.47#ibcon#about to read 6, iclass 28, count 0 2006.229.21:31:34.47#ibcon#read 6, iclass 28, count 0 2006.229.21:31:34.47#ibcon#end of sib2, iclass 28, count 0 2006.229.21:31:34.47#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:31:34.47#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:31:34.47#ibcon#[25=USB\r\n] 2006.229.21:31:34.47#ibcon#*before write, iclass 28, count 0 2006.229.21:31:34.47#ibcon#enter sib2, iclass 28, count 0 2006.229.21:31:34.47#ibcon#flushed, iclass 28, count 0 2006.229.21:31:34.47#ibcon#about to write, iclass 28, count 0 2006.229.21:31:34.47#ibcon#wrote, iclass 28, count 0 2006.229.21:31:34.47#ibcon#about to read 3, iclass 28, count 0 2006.229.21:31:34.50#ibcon#read 3, iclass 28, count 0 2006.229.21:31:34.50#ibcon#about to read 4, iclass 28, count 0 2006.229.21:31:34.50#ibcon#read 4, iclass 28, count 0 2006.229.21:31:34.50#ibcon#about to read 5, iclass 28, count 0 2006.229.21:31:34.50#ibcon#read 5, iclass 28, count 0 2006.229.21:31:34.50#ibcon#about to read 6, iclass 28, count 0 2006.229.21:31:34.50#ibcon#read 6, iclass 28, count 0 2006.229.21:31:34.50#ibcon#end of sib2, iclass 28, count 0 2006.229.21:31:34.50#ibcon#*after write, iclass 28, count 0 2006.229.21:31:34.50#ibcon#*before return 0, iclass 28, count 0 2006.229.21:31:34.50#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:34.50#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:34.50#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:31:34.50#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:31:34.50$vck44/valo=2,534.99 2006.229.21:31:34.50#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.21:31:34.50#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.21:31:34.50#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:34.50#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:34.50#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:34.50#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:34.50#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:31:34.50#ibcon#first serial, iclass 30, count 0 2006.229.21:31:34.50#ibcon#enter sib2, iclass 30, count 0 2006.229.21:31:34.50#ibcon#flushed, iclass 30, count 0 2006.229.21:31:34.50#ibcon#about to write, iclass 30, count 0 2006.229.21:31:34.50#ibcon#wrote, iclass 30, count 0 2006.229.21:31:34.50#ibcon#about to read 3, iclass 30, count 0 2006.229.21:31:34.52#ibcon#read 3, iclass 30, count 0 2006.229.21:31:34.52#ibcon#about to read 4, iclass 30, count 0 2006.229.21:31:34.52#ibcon#read 4, iclass 30, count 0 2006.229.21:31:34.52#ibcon#about to read 5, iclass 30, count 0 2006.229.21:31:34.52#ibcon#read 5, iclass 30, count 0 2006.229.21:31:34.52#ibcon#about to read 6, iclass 30, count 0 2006.229.21:31:34.52#ibcon#read 6, iclass 30, count 0 2006.229.21:31:34.52#ibcon#end of sib2, iclass 30, count 0 2006.229.21:31:34.52#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:31:34.52#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:31:34.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:31:34.52#ibcon#*before write, iclass 30, count 0 2006.229.21:31:34.52#ibcon#enter sib2, iclass 30, count 0 2006.229.21:31:34.52#ibcon#flushed, iclass 30, count 0 2006.229.21:31:34.52#ibcon#about to write, iclass 30, count 0 2006.229.21:31:34.52#ibcon#wrote, iclass 30, count 0 2006.229.21:31:34.52#ibcon#about to read 3, iclass 30, count 0 2006.229.21:31:34.56#ibcon#read 3, iclass 30, count 0 2006.229.21:31:34.56#ibcon#about to read 4, iclass 30, count 0 2006.229.21:31:34.56#ibcon#read 4, iclass 30, count 0 2006.229.21:31:34.56#ibcon#about to read 5, iclass 30, count 0 2006.229.21:31:34.56#ibcon#read 5, iclass 30, count 0 2006.229.21:31:34.56#ibcon#about to read 6, iclass 30, count 0 2006.229.21:31:34.56#ibcon#read 6, iclass 30, count 0 2006.229.21:31:34.56#ibcon#end of sib2, iclass 30, count 0 2006.229.21:31:34.56#ibcon#*after write, iclass 30, count 0 2006.229.21:31:34.56#ibcon#*before return 0, iclass 30, count 0 2006.229.21:31:34.56#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:34.56#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:34.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:31:34.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:31:34.56$vck44/va=2,7 2006.229.21:31:34.56#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.21:31:34.56#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.21:31:34.56#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:34.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:34.62#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:34.62#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:34.62#ibcon#enter wrdev, iclass 32, count 2 2006.229.21:31:34.62#ibcon#first serial, iclass 32, count 2 2006.229.21:31:34.62#ibcon#enter sib2, iclass 32, count 2 2006.229.21:31:34.62#ibcon#flushed, iclass 32, count 2 2006.229.21:31:34.62#ibcon#about to write, iclass 32, count 2 2006.229.21:31:34.62#ibcon#wrote, iclass 32, count 2 2006.229.21:31:34.62#ibcon#about to read 3, iclass 32, count 2 2006.229.21:31:34.64#ibcon#read 3, iclass 32, count 2 2006.229.21:31:34.64#ibcon#about to read 4, iclass 32, count 2 2006.229.21:31:34.64#ibcon#read 4, iclass 32, count 2 2006.229.21:31:34.64#ibcon#about to read 5, iclass 32, count 2 2006.229.21:31:34.64#ibcon#read 5, iclass 32, count 2 2006.229.21:31:34.64#ibcon#about to read 6, iclass 32, count 2 2006.229.21:31:34.64#ibcon#read 6, iclass 32, count 2 2006.229.21:31:34.64#ibcon#end of sib2, iclass 32, count 2 2006.229.21:31:34.64#ibcon#*mode == 0, iclass 32, count 2 2006.229.21:31:34.64#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.21:31:34.64#ibcon#[25=AT02-07\r\n] 2006.229.21:31:34.64#ibcon#*before write, iclass 32, count 2 2006.229.21:31:34.64#ibcon#enter sib2, iclass 32, count 2 2006.229.21:31:34.64#ibcon#flushed, iclass 32, count 2 2006.229.21:31:34.64#ibcon#about to write, iclass 32, count 2 2006.229.21:31:34.64#ibcon#wrote, iclass 32, count 2 2006.229.21:31:34.64#ibcon#about to read 3, iclass 32, count 2 2006.229.21:31:34.67#ibcon#read 3, iclass 32, count 2 2006.229.21:31:34.67#ibcon#about to read 4, iclass 32, count 2 2006.229.21:31:34.67#ibcon#read 4, iclass 32, count 2 2006.229.21:31:34.67#ibcon#about to read 5, iclass 32, count 2 2006.229.21:31:34.67#ibcon#read 5, iclass 32, count 2 2006.229.21:31:34.67#ibcon#about to read 6, iclass 32, count 2 2006.229.21:31:34.67#ibcon#read 6, iclass 32, count 2 2006.229.21:31:34.67#ibcon#end of sib2, iclass 32, count 2 2006.229.21:31:34.67#ibcon#*after write, iclass 32, count 2 2006.229.21:31:34.67#ibcon#*before return 0, iclass 32, count 2 2006.229.21:31:34.67#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:34.67#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:34.67#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.21:31:34.67#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:34.67#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:34.79#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:34.79#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:34.79#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:31:34.79#ibcon#first serial, iclass 32, count 0 2006.229.21:31:34.79#ibcon#enter sib2, iclass 32, count 0 2006.229.21:31:34.79#ibcon#flushed, iclass 32, count 0 2006.229.21:31:34.79#ibcon#about to write, iclass 32, count 0 2006.229.21:31:34.79#ibcon#wrote, iclass 32, count 0 2006.229.21:31:34.79#ibcon#about to read 3, iclass 32, count 0 2006.229.21:31:34.81#ibcon#read 3, iclass 32, count 0 2006.229.21:31:34.81#ibcon#about to read 4, iclass 32, count 0 2006.229.21:31:34.81#ibcon#read 4, iclass 32, count 0 2006.229.21:31:34.81#ibcon#about to read 5, iclass 32, count 0 2006.229.21:31:34.81#ibcon#read 5, iclass 32, count 0 2006.229.21:31:34.81#ibcon#about to read 6, iclass 32, count 0 2006.229.21:31:34.81#ibcon#read 6, iclass 32, count 0 2006.229.21:31:34.81#ibcon#end of sib2, iclass 32, count 0 2006.229.21:31:34.81#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:31:34.81#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:31:34.81#ibcon#[25=USB\r\n] 2006.229.21:31:34.81#ibcon#*before write, iclass 32, count 0 2006.229.21:31:34.81#ibcon#enter sib2, iclass 32, count 0 2006.229.21:31:34.81#ibcon#flushed, iclass 32, count 0 2006.229.21:31:34.81#ibcon#about to write, iclass 32, count 0 2006.229.21:31:34.81#ibcon#wrote, iclass 32, count 0 2006.229.21:31:34.81#ibcon#about to read 3, iclass 32, count 0 2006.229.21:31:34.84#ibcon#read 3, iclass 32, count 0 2006.229.21:31:34.84#ibcon#about to read 4, iclass 32, count 0 2006.229.21:31:34.84#ibcon#read 4, iclass 32, count 0 2006.229.21:31:34.84#ibcon#about to read 5, iclass 32, count 0 2006.229.21:31:34.84#ibcon#read 5, iclass 32, count 0 2006.229.21:31:34.84#ibcon#about to read 6, iclass 32, count 0 2006.229.21:31:34.84#ibcon#read 6, iclass 32, count 0 2006.229.21:31:34.84#ibcon#end of sib2, iclass 32, count 0 2006.229.21:31:34.84#ibcon#*after write, iclass 32, count 0 2006.229.21:31:34.84#ibcon#*before return 0, iclass 32, count 0 2006.229.21:31:34.84#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:34.84#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:34.84#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:31:34.84#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:31:34.84$vck44/valo=3,564.99 2006.229.21:31:34.84#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.21:31:34.84#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.21:31:34.84#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:34.84#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:34.84#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:34.84#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:34.84#ibcon#enter wrdev, iclass 34, count 0 2006.229.21:31:34.84#ibcon#first serial, iclass 34, count 0 2006.229.21:31:34.84#ibcon#enter sib2, iclass 34, count 0 2006.229.21:31:34.84#ibcon#flushed, iclass 34, count 0 2006.229.21:31:34.84#ibcon#about to write, iclass 34, count 0 2006.229.21:31:34.84#ibcon#wrote, iclass 34, count 0 2006.229.21:31:34.84#ibcon#about to read 3, iclass 34, count 0 2006.229.21:31:34.86#ibcon#read 3, iclass 34, count 0 2006.229.21:31:34.86#ibcon#about to read 4, iclass 34, count 0 2006.229.21:31:34.86#ibcon#read 4, iclass 34, count 0 2006.229.21:31:34.86#ibcon#about to read 5, iclass 34, count 0 2006.229.21:31:34.86#ibcon#read 5, iclass 34, count 0 2006.229.21:31:34.86#ibcon#about to read 6, iclass 34, count 0 2006.229.21:31:34.86#ibcon#read 6, iclass 34, count 0 2006.229.21:31:34.86#ibcon#end of sib2, iclass 34, count 0 2006.229.21:31:34.86#ibcon#*mode == 0, iclass 34, count 0 2006.229.21:31:34.86#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.21:31:34.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:31:34.86#ibcon#*before write, iclass 34, count 0 2006.229.21:31:34.86#ibcon#enter sib2, iclass 34, count 0 2006.229.21:31:34.86#ibcon#flushed, iclass 34, count 0 2006.229.21:31:34.86#ibcon#about to write, iclass 34, count 0 2006.229.21:31:34.86#ibcon#wrote, iclass 34, count 0 2006.229.21:31:34.86#ibcon#about to read 3, iclass 34, count 0 2006.229.21:31:34.90#ibcon#read 3, iclass 34, count 0 2006.229.21:31:34.90#ibcon#about to read 4, iclass 34, count 0 2006.229.21:31:34.90#ibcon#read 4, iclass 34, count 0 2006.229.21:31:34.90#ibcon#about to read 5, iclass 34, count 0 2006.229.21:31:34.90#ibcon#read 5, iclass 34, count 0 2006.229.21:31:34.90#ibcon#about to read 6, iclass 34, count 0 2006.229.21:31:34.90#ibcon#read 6, iclass 34, count 0 2006.229.21:31:34.90#ibcon#end of sib2, iclass 34, count 0 2006.229.21:31:34.90#ibcon#*after write, iclass 34, count 0 2006.229.21:31:34.90#ibcon#*before return 0, iclass 34, count 0 2006.229.21:31:34.90#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:34.90#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:34.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.21:31:34.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.21:31:34.90$vck44/va=3,6 2006.229.21:31:34.90#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.21:31:34.90#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.21:31:34.90#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:34.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:34.96#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:34.96#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:34.96#ibcon#enter wrdev, iclass 36, count 2 2006.229.21:31:34.96#ibcon#first serial, iclass 36, count 2 2006.229.21:31:34.96#ibcon#enter sib2, iclass 36, count 2 2006.229.21:31:34.96#ibcon#flushed, iclass 36, count 2 2006.229.21:31:34.96#ibcon#about to write, iclass 36, count 2 2006.229.21:31:34.96#ibcon#wrote, iclass 36, count 2 2006.229.21:31:34.96#ibcon#about to read 3, iclass 36, count 2 2006.229.21:31:34.98#ibcon#read 3, iclass 36, count 2 2006.229.21:31:34.98#ibcon#about to read 4, iclass 36, count 2 2006.229.21:31:34.98#ibcon#read 4, iclass 36, count 2 2006.229.21:31:34.98#ibcon#about to read 5, iclass 36, count 2 2006.229.21:31:34.98#ibcon#read 5, iclass 36, count 2 2006.229.21:31:34.98#ibcon#about to read 6, iclass 36, count 2 2006.229.21:31:34.98#ibcon#read 6, iclass 36, count 2 2006.229.21:31:34.98#ibcon#end of sib2, iclass 36, count 2 2006.229.21:31:34.98#ibcon#*mode == 0, iclass 36, count 2 2006.229.21:31:34.98#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.21:31:34.98#ibcon#[25=AT03-06\r\n] 2006.229.21:31:34.98#ibcon#*before write, iclass 36, count 2 2006.229.21:31:34.98#ibcon#enter sib2, iclass 36, count 2 2006.229.21:31:34.98#ibcon#flushed, iclass 36, count 2 2006.229.21:31:34.98#ibcon#about to write, iclass 36, count 2 2006.229.21:31:34.98#ibcon#wrote, iclass 36, count 2 2006.229.21:31:34.98#ibcon#about to read 3, iclass 36, count 2 2006.229.21:31:35.01#ibcon#read 3, iclass 36, count 2 2006.229.21:31:35.01#ibcon#about to read 4, iclass 36, count 2 2006.229.21:31:35.01#ibcon#read 4, iclass 36, count 2 2006.229.21:31:35.01#ibcon#about to read 5, iclass 36, count 2 2006.229.21:31:35.01#ibcon#read 5, iclass 36, count 2 2006.229.21:31:35.01#ibcon#about to read 6, iclass 36, count 2 2006.229.21:31:35.01#ibcon#read 6, iclass 36, count 2 2006.229.21:31:35.01#ibcon#end of sib2, iclass 36, count 2 2006.229.21:31:35.01#ibcon#*after write, iclass 36, count 2 2006.229.21:31:35.01#ibcon#*before return 0, iclass 36, count 2 2006.229.21:31:35.01#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:35.01#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:35.01#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.21:31:35.01#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:35.01#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:35.13#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:35.13#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:35.13#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:31:35.13#ibcon#first serial, iclass 36, count 0 2006.229.21:31:35.13#ibcon#enter sib2, iclass 36, count 0 2006.229.21:31:35.13#ibcon#flushed, iclass 36, count 0 2006.229.21:31:35.13#ibcon#about to write, iclass 36, count 0 2006.229.21:31:35.13#ibcon#wrote, iclass 36, count 0 2006.229.21:31:35.13#ibcon#about to read 3, iclass 36, count 0 2006.229.21:31:35.15#ibcon#read 3, iclass 36, count 0 2006.229.21:31:35.15#ibcon#about to read 4, iclass 36, count 0 2006.229.21:31:35.15#ibcon#read 4, iclass 36, count 0 2006.229.21:31:35.15#ibcon#about to read 5, iclass 36, count 0 2006.229.21:31:35.15#ibcon#read 5, iclass 36, count 0 2006.229.21:31:35.15#ibcon#about to read 6, iclass 36, count 0 2006.229.21:31:35.15#ibcon#read 6, iclass 36, count 0 2006.229.21:31:35.15#ibcon#end of sib2, iclass 36, count 0 2006.229.21:31:35.15#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:31:35.15#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:31:35.15#ibcon#[25=USB\r\n] 2006.229.21:31:35.15#ibcon#*before write, iclass 36, count 0 2006.229.21:31:35.15#ibcon#enter sib2, iclass 36, count 0 2006.229.21:31:35.15#ibcon#flushed, iclass 36, count 0 2006.229.21:31:35.15#ibcon#about to write, iclass 36, count 0 2006.229.21:31:35.15#ibcon#wrote, iclass 36, count 0 2006.229.21:31:35.15#ibcon#about to read 3, iclass 36, count 0 2006.229.21:31:35.18#ibcon#read 3, iclass 36, count 0 2006.229.21:31:35.18#ibcon#about to read 4, iclass 36, count 0 2006.229.21:31:35.18#ibcon#read 4, iclass 36, count 0 2006.229.21:31:35.18#ibcon#about to read 5, iclass 36, count 0 2006.229.21:31:35.18#ibcon#read 5, iclass 36, count 0 2006.229.21:31:35.18#ibcon#about to read 6, iclass 36, count 0 2006.229.21:31:35.18#ibcon#read 6, iclass 36, count 0 2006.229.21:31:35.18#ibcon#end of sib2, iclass 36, count 0 2006.229.21:31:35.18#ibcon#*after write, iclass 36, count 0 2006.229.21:31:35.18#ibcon#*before return 0, iclass 36, count 0 2006.229.21:31:35.18#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:35.18#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:35.18#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:31:35.18#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:31:35.18$vck44/valo=4,624.99 2006.229.21:31:35.18#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.21:31:35.18#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.21:31:35.18#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:35.18#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:35.18#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:35.18#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:35.18#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:31:35.18#ibcon#first serial, iclass 38, count 0 2006.229.21:31:35.18#ibcon#enter sib2, iclass 38, count 0 2006.229.21:31:35.18#ibcon#flushed, iclass 38, count 0 2006.229.21:31:35.18#ibcon#about to write, iclass 38, count 0 2006.229.21:31:35.18#ibcon#wrote, iclass 38, count 0 2006.229.21:31:35.18#ibcon#about to read 3, iclass 38, count 0 2006.229.21:31:35.20#ibcon#read 3, iclass 38, count 0 2006.229.21:31:35.20#ibcon#about to read 4, iclass 38, count 0 2006.229.21:31:35.20#ibcon#read 4, iclass 38, count 0 2006.229.21:31:35.20#ibcon#about to read 5, iclass 38, count 0 2006.229.21:31:35.20#ibcon#read 5, iclass 38, count 0 2006.229.21:31:35.20#ibcon#about to read 6, iclass 38, count 0 2006.229.21:31:35.20#ibcon#read 6, iclass 38, count 0 2006.229.21:31:35.20#ibcon#end of sib2, iclass 38, count 0 2006.229.21:31:35.20#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:31:35.20#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:31:35.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:31:35.20#ibcon#*before write, iclass 38, count 0 2006.229.21:31:35.20#ibcon#enter sib2, iclass 38, count 0 2006.229.21:31:35.20#ibcon#flushed, iclass 38, count 0 2006.229.21:31:35.20#ibcon#about to write, iclass 38, count 0 2006.229.21:31:35.20#ibcon#wrote, iclass 38, count 0 2006.229.21:31:35.20#ibcon#about to read 3, iclass 38, count 0 2006.229.21:31:35.24#ibcon#read 3, iclass 38, count 0 2006.229.21:31:35.24#ibcon#about to read 4, iclass 38, count 0 2006.229.21:31:35.24#ibcon#read 4, iclass 38, count 0 2006.229.21:31:35.24#ibcon#about to read 5, iclass 38, count 0 2006.229.21:31:35.24#ibcon#read 5, iclass 38, count 0 2006.229.21:31:35.24#ibcon#about to read 6, iclass 38, count 0 2006.229.21:31:35.24#ibcon#read 6, iclass 38, count 0 2006.229.21:31:35.24#ibcon#end of sib2, iclass 38, count 0 2006.229.21:31:35.24#ibcon#*after write, iclass 38, count 0 2006.229.21:31:35.24#ibcon#*before return 0, iclass 38, count 0 2006.229.21:31:35.24#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:35.24#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:35.24#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:31:35.24#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:31:35.24$vck44/va=4,7 2006.229.21:31:35.24#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.21:31:35.24#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.21:31:35.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:35.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:35.30#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:35.30#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:35.30#ibcon#enter wrdev, iclass 40, count 2 2006.229.21:31:35.30#ibcon#first serial, iclass 40, count 2 2006.229.21:31:35.30#ibcon#enter sib2, iclass 40, count 2 2006.229.21:31:35.30#ibcon#flushed, iclass 40, count 2 2006.229.21:31:35.30#ibcon#about to write, iclass 40, count 2 2006.229.21:31:35.30#ibcon#wrote, iclass 40, count 2 2006.229.21:31:35.30#ibcon#about to read 3, iclass 40, count 2 2006.229.21:31:35.32#ibcon#read 3, iclass 40, count 2 2006.229.21:31:35.32#ibcon#about to read 4, iclass 40, count 2 2006.229.21:31:35.32#ibcon#read 4, iclass 40, count 2 2006.229.21:31:35.32#ibcon#about to read 5, iclass 40, count 2 2006.229.21:31:35.32#ibcon#read 5, iclass 40, count 2 2006.229.21:31:35.32#ibcon#about to read 6, iclass 40, count 2 2006.229.21:31:35.32#ibcon#read 6, iclass 40, count 2 2006.229.21:31:35.32#ibcon#end of sib2, iclass 40, count 2 2006.229.21:31:35.32#ibcon#*mode == 0, iclass 40, count 2 2006.229.21:31:35.32#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.21:31:35.32#ibcon#[25=AT04-07\r\n] 2006.229.21:31:35.32#ibcon#*before write, iclass 40, count 2 2006.229.21:31:35.32#ibcon#enter sib2, iclass 40, count 2 2006.229.21:31:35.32#ibcon#flushed, iclass 40, count 2 2006.229.21:31:35.32#ibcon#about to write, iclass 40, count 2 2006.229.21:31:35.32#ibcon#wrote, iclass 40, count 2 2006.229.21:31:35.32#ibcon#about to read 3, iclass 40, count 2 2006.229.21:31:35.35#ibcon#read 3, iclass 40, count 2 2006.229.21:31:35.35#ibcon#about to read 4, iclass 40, count 2 2006.229.21:31:35.35#ibcon#read 4, iclass 40, count 2 2006.229.21:31:35.35#ibcon#about to read 5, iclass 40, count 2 2006.229.21:31:35.35#ibcon#read 5, iclass 40, count 2 2006.229.21:31:35.35#ibcon#about to read 6, iclass 40, count 2 2006.229.21:31:35.35#ibcon#read 6, iclass 40, count 2 2006.229.21:31:35.35#ibcon#end of sib2, iclass 40, count 2 2006.229.21:31:35.35#ibcon#*after write, iclass 40, count 2 2006.229.21:31:35.35#ibcon#*before return 0, iclass 40, count 2 2006.229.21:31:35.35#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:35.35#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:35.35#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.21:31:35.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:35.35#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:35.47#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:35.47#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:35.47#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:31:35.47#ibcon#first serial, iclass 40, count 0 2006.229.21:31:35.47#ibcon#enter sib2, iclass 40, count 0 2006.229.21:31:35.47#ibcon#flushed, iclass 40, count 0 2006.229.21:31:35.47#ibcon#about to write, iclass 40, count 0 2006.229.21:31:35.47#ibcon#wrote, iclass 40, count 0 2006.229.21:31:35.47#ibcon#about to read 3, iclass 40, count 0 2006.229.21:31:35.49#ibcon#read 3, iclass 40, count 0 2006.229.21:31:35.49#ibcon#about to read 4, iclass 40, count 0 2006.229.21:31:35.49#ibcon#read 4, iclass 40, count 0 2006.229.21:31:35.49#ibcon#about to read 5, iclass 40, count 0 2006.229.21:31:35.49#ibcon#read 5, iclass 40, count 0 2006.229.21:31:35.49#ibcon#about to read 6, iclass 40, count 0 2006.229.21:31:35.49#ibcon#read 6, iclass 40, count 0 2006.229.21:31:35.49#ibcon#end of sib2, iclass 40, count 0 2006.229.21:31:35.49#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:31:35.49#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:31:35.49#ibcon#[25=USB\r\n] 2006.229.21:31:35.49#ibcon#*before write, iclass 40, count 0 2006.229.21:31:35.49#ibcon#enter sib2, iclass 40, count 0 2006.229.21:31:35.49#ibcon#flushed, iclass 40, count 0 2006.229.21:31:35.49#ibcon#about to write, iclass 40, count 0 2006.229.21:31:35.49#ibcon#wrote, iclass 40, count 0 2006.229.21:31:35.49#ibcon#about to read 3, iclass 40, count 0 2006.229.21:31:35.52#ibcon#read 3, iclass 40, count 0 2006.229.21:31:35.52#ibcon#about to read 4, iclass 40, count 0 2006.229.21:31:35.52#ibcon#read 4, iclass 40, count 0 2006.229.21:31:35.52#ibcon#about to read 5, iclass 40, count 0 2006.229.21:31:35.52#ibcon#read 5, iclass 40, count 0 2006.229.21:31:35.52#ibcon#about to read 6, iclass 40, count 0 2006.229.21:31:35.52#ibcon#read 6, iclass 40, count 0 2006.229.21:31:35.52#ibcon#end of sib2, iclass 40, count 0 2006.229.21:31:35.52#ibcon#*after write, iclass 40, count 0 2006.229.21:31:35.52#ibcon#*before return 0, iclass 40, count 0 2006.229.21:31:35.52#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:35.52#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:35.52#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:31:35.52#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:31:35.52$vck44/valo=5,734.99 2006.229.21:31:35.52#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.21:31:35.52#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.21:31:35.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:35.52#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:35.52#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:35.52#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:35.52#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:31:35.52#ibcon#first serial, iclass 4, count 0 2006.229.21:31:35.52#ibcon#enter sib2, iclass 4, count 0 2006.229.21:31:35.52#ibcon#flushed, iclass 4, count 0 2006.229.21:31:35.52#ibcon#about to write, iclass 4, count 0 2006.229.21:31:35.52#ibcon#wrote, iclass 4, count 0 2006.229.21:31:35.52#ibcon#about to read 3, iclass 4, count 0 2006.229.21:31:35.54#ibcon#read 3, iclass 4, count 0 2006.229.21:31:35.54#ibcon#about to read 4, iclass 4, count 0 2006.229.21:31:35.54#ibcon#read 4, iclass 4, count 0 2006.229.21:31:35.54#ibcon#about to read 5, iclass 4, count 0 2006.229.21:31:35.54#ibcon#read 5, iclass 4, count 0 2006.229.21:31:35.54#ibcon#about to read 6, iclass 4, count 0 2006.229.21:31:35.54#ibcon#read 6, iclass 4, count 0 2006.229.21:31:35.54#ibcon#end of sib2, iclass 4, count 0 2006.229.21:31:35.54#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:31:35.54#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:31:35.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:31:35.54#ibcon#*before write, iclass 4, count 0 2006.229.21:31:35.54#ibcon#enter sib2, iclass 4, count 0 2006.229.21:31:35.54#ibcon#flushed, iclass 4, count 0 2006.229.21:31:35.54#ibcon#about to write, iclass 4, count 0 2006.229.21:31:35.54#ibcon#wrote, iclass 4, count 0 2006.229.21:31:35.54#ibcon#about to read 3, iclass 4, count 0 2006.229.21:31:35.58#ibcon#read 3, iclass 4, count 0 2006.229.21:31:35.58#ibcon#about to read 4, iclass 4, count 0 2006.229.21:31:35.58#ibcon#read 4, iclass 4, count 0 2006.229.21:31:35.58#ibcon#about to read 5, iclass 4, count 0 2006.229.21:31:35.58#ibcon#read 5, iclass 4, count 0 2006.229.21:31:35.58#ibcon#about to read 6, iclass 4, count 0 2006.229.21:31:35.58#ibcon#read 6, iclass 4, count 0 2006.229.21:31:35.58#ibcon#end of sib2, iclass 4, count 0 2006.229.21:31:35.58#ibcon#*after write, iclass 4, count 0 2006.229.21:31:35.58#ibcon#*before return 0, iclass 4, count 0 2006.229.21:31:35.58#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:35.58#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:35.58#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:31:35.58#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:31:35.58$vck44/va=5,4 2006.229.21:31:35.58#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.21:31:35.58#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.21:31:35.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:35.58#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:35.64#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:35.64#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:35.64#ibcon#enter wrdev, iclass 6, count 2 2006.229.21:31:35.64#ibcon#first serial, iclass 6, count 2 2006.229.21:31:35.64#ibcon#enter sib2, iclass 6, count 2 2006.229.21:31:35.64#ibcon#flushed, iclass 6, count 2 2006.229.21:31:35.64#ibcon#about to write, iclass 6, count 2 2006.229.21:31:35.64#ibcon#wrote, iclass 6, count 2 2006.229.21:31:35.64#ibcon#about to read 3, iclass 6, count 2 2006.229.21:31:35.66#ibcon#read 3, iclass 6, count 2 2006.229.21:31:35.66#ibcon#about to read 4, iclass 6, count 2 2006.229.21:31:35.66#ibcon#read 4, iclass 6, count 2 2006.229.21:31:35.66#ibcon#about to read 5, iclass 6, count 2 2006.229.21:31:35.66#ibcon#read 5, iclass 6, count 2 2006.229.21:31:35.66#ibcon#about to read 6, iclass 6, count 2 2006.229.21:31:35.66#ibcon#read 6, iclass 6, count 2 2006.229.21:31:35.66#ibcon#end of sib2, iclass 6, count 2 2006.229.21:31:35.66#ibcon#*mode == 0, iclass 6, count 2 2006.229.21:31:35.66#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.21:31:35.66#ibcon#[25=AT05-04\r\n] 2006.229.21:31:35.66#ibcon#*before write, iclass 6, count 2 2006.229.21:31:35.66#ibcon#enter sib2, iclass 6, count 2 2006.229.21:31:35.66#ibcon#flushed, iclass 6, count 2 2006.229.21:31:35.66#ibcon#about to write, iclass 6, count 2 2006.229.21:31:35.66#ibcon#wrote, iclass 6, count 2 2006.229.21:31:35.66#ibcon#about to read 3, iclass 6, count 2 2006.229.21:31:35.69#ibcon#read 3, iclass 6, count 2 2006.229.21:31:35.69#ibcon#about to read 4, iclass 6, count 2 2006.229.21:31:35.69#ibcon#read 4, iclass 6, count 2 2006.229.21:31:35.69#ibcon#about to read 5, iclass 6, count 2 2006.229.21:31:35.69#ibcon#read 5, iclass 6, count 2 2006.229.21:31:35.69#ibcon#about to read 6, iclass 6, count 2 2006.229.21:31:35.69#ibcon#read 6, iclass 6, count 2 2006.229.21:31:35.69#ibcon#end of sib2, iclass 6, count 2 2006.229.21:31:35.69#ibcon#*after write, iclass 6, count 2 2006.229.21:31:35.69#ibcon#*before return 0, iclass 6, count 2 2006.229.21:31:35.69#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:35.69#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:35.69#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.21:31:35.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:35.69#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:35.81#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:35.81#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:35.81#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:31:35.81#ibcon#first serial, iclass 6, count 0 2006.229.21:31:35.81#ibcon#enter sib2, iclass 6, count 0 2006.229.21:31:35.81#ibcon#flushed, iclass 6, count 0 2006.229.21:31:35.81#ibcon#about to write, iclass 6, count 0 2006.229.21:31:35.81#ibcon#wrote, iclass 6, count 0 2006.229.21:31:35.81#ibcon#about to read 3, iclass 6, count 0 2006.229.21:31:35.83#ibcon#read 3, iclass 6, count 0 2006.229.21:31:35.83#ibcon#about to read 4, iclass 6, count 0 2006.229.21:31:35.83#ibcon#read 4, iclass 6, count 0 2006.229.21:31:35.83#ibcon#about to read 5, iclass 6, count 0 2006.229.21:31:35.83#ibcon#read 5, iclass 6, count 0 2006.229.21:31:35.83#ibcon#about to read 6, iclass 6, count 0 2006.229.21:31:35.83#ibcon#read 6, iclass 6, count 0 2006.229.21:31:35.83#ibcon#end of sib2, iclass 6, count 0 2006.229.21:31:35.83#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:31:35.83#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:31:35.83#ibcon#[25=USB\r\n] 2006.229.21:31:35.83#ibcon#*before write, iclass 6, count 0 2006.229.21:31:35.83#ibcon#enter sib2, iclass 6, count 0 2006.229.21:31:35.83#ibcon#flushed, iclass 6, count 0 2006.229.21:31:35.83#ibcon#about to write, iclass 6, count 0 2006.229.21:31:35.83#ibcon#wrote, iclass 6, count 0 2006.229.21:31:35.83#ibcon#about to read 3, iclass 6, count 0 2006.229.21:31:35.86#ibcon#read 3, iclass 6, count 0 2006.229.21:31:35.86#ibcon#about to read 4, iclass 6, count 0 2006.229.21:31:35.86#ibcon#read 4, iclass 6, count 0 2006.229.21:31:35.86#ibcon#about to read 5, iclass 6, count 0 2006.229.21:31:35.86#ibcon#read 5, iclass 6, count 0 2006.229.21:31:35.86#ibcon#about to read 6, iclass 6, count 0 2006.229.21:31:35.86#ibcon#read 6, iclass 6, count 0 2006.229.21:31:35.86#ibcon#end of sib2, iclass 6, count 0 2006.229.21:31:35.86#ibcon#*after write, iclass 6, count 0 2006.229.21:31:35.86#ibcon#*before return 0, iclass 6, count 0 2006.229.21:31:35.86#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:35.86#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:35.86#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:31:35.86#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:31:35.86$vck44/valo=6,814.99 2006.229.21:31:35.86#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.21:31:35.86#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.21:31:35.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:35.86#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:35.86#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:35.86#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:35.86#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:31:35.86#ibcon#first serial, iclass 10, count 0 2006.229.21:31:35.86#ibcon#enter sib2, iclass 10, count 0 2006.229.21:31:35.86#ibcon#flushed, iclass 10, count 0 2006.229.21:31:35.86#ibcon#about to write, iclass 10, count 0 2006.229.21:31:35.86#ibcon#wrote, iclass 10, count 0 2006.229.21:31:35.86#ibcon#about to read 3, iclass 10, count 0 2006.229.21:31:35.88#ibcon#read 3, iclass 10, count 0 2006.229.21:31:35.88#ibcon#about to read 4, iclass 10, count 0 2006.229.21:31:35.88#ibcon#read 4, iclass 10, count 0 2006.229.21:31:35.88#ibcon#about to read 5, iclass 10, count 0 2006.229.21:31:35.88#ibcon#read 5, iclass 10, count 0 2006.229.21:31:35.88#ibcon#about to read 6, iclass 10, count 0 2006.229.21:31:35.88#ibcon#read 6, iclass 10, count 0 2006.229.21:31:35.88#ibcon#end of sib2, iclass 10, count 0 2006.229.21:31:35.88#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:31:35.88#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:31:35.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:31:35.88#ibcon#*before write, iclass 10, count 0 2006.229.21:31:35.88#ibcon#enter sib2, iclass 10, count 0 2006.229.21:31:35.88#ibcon#flushed, iclass 10, count 0 2006.229.21:31:35.88#ibcon#about to write, iclass 10, count 0 2006.229.21:31:35.88#ibcon#wrote, iclass 10, count 0 2006.229.21:31:35.88#ibcon#about to read 3, iclass 10, count 0 2006.229.21:31:35.92#ibcon#read 3, iclass 10, count 0 2006.229.21:31:35.92#ibcon#about to read 4, iclass 10, count 0 2006.229.21:31:35.92#ibcon#read 4, iclass 10, count 0 2006.229.21:31:35.92#ibcon#about to read 5, iclass 10, count 0 2006.229.21:31:35.92#ibcon#read 5, iclass 10, count 0 2006.229.21:31:35.92#ibcon#about to read 6, iclass 10, count 0 2006.229.21:31:35.92#ibcon#read 6, iclass 10, count 0 2006.229.21:31:35.92#ibcon#end of sib2, iclass 10, count 0 2006.229.21:31:35.92#ibcon#*after write, iclass 10, count 0 2006.229.21:31:35.92#ibcon#*before return 0, iclass 10, count 0 2006.229.21:31:35.92#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:35.92#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:35.92#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:31:35.92#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:31:35.92$vck44/va=6,4 2006.229.21:31:35.92#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.21:31:35.92#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.21:31:35.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:35.92#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:35.98#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:35.98#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:35.98#ibcon#enter wrdev, iclass 12, count 2 2006.229.21:31:35.98#ibcon#first serial, iclass 12, count 2 2006.229.21:31:35.98#ibcon#enter sib2, iclass 12, count 2 2006.229.21:31:35.98#ibcon#flushed, iclass 12, count 2 2006.229.21:31:35.98#ibcon#about to write, iclass 12, count 2 2006.229.21:31:35.98#ibcon#wrote, iclass 12, count 2 2006.229.21:31:35.98#ibcon#about to read 3, iclass 12, count 2 2006.229.21:31:36.00#ibcon#read 3, iclass 12, count 2 2006.229.21:31:36.00#ibcon#about to read 4, iclass 12, count 2 2006.229.21:31:36.00#ibcon#read 4, iclass 12, count 2 2006.229.21:31:36.00#ibcon#about to read 5, iclass 12, count 2 2006.229.21:31:36.00#ibcon#read 5, iclass 12, count 2 2006.229.21:31:36.00#ibcon#about to read 6, iclass 12, count 2 2006.229.21:31:36.00#ibcon#read 6, iclass 12, count 2 2006.229.21:31:36.00#ibcon#end of sib2, iclass 12, count 2 2006.229.21:31:36.00#ibcon#*mode == 0, iclass 12, count 2 2006.229.21:31:36.00#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.21:31:36.00#ibcon#[25=AT06-04\r\n] 2006.229.21:31:36.00#ibcon#*before write, iclass 12, count 2 2006.229.21:31:36.00#ibcon#enter sib2, iclass 12, count 2 2006.229.21:31:36.00#ibcon#flushed, iclass 12, count 2 2006.229.21:31:36.00#ibcon#about to write, iclass 12, count 2 2006.229.21:31:36.00#ibcon#wrote, iclass 12, count 2 2006.229.21:31:36.00#ibcon#about to read 3, iclass 12, count 2 2006.229.21:31:36.03#ibcon#read 3, iclass 12, count 2 2006.229.21:31:36.03#ibcon#about to read 4, iclass 12, count 2 2006.229.21:31:36.03#ibcon#read 4, iclass 12, count 2 2006.229.21:31:36.03#ibcon#about to read 5, iclass 12, count 2 2006.229.21:31:36.03#ibcon#read 5, iclass 12, count 2 2006.229.21:31:36.03#ibcon#about to read 6, iclass 12, count 2 2006.229.21:31:36.03#ibcon#read 6, iclass 12, count 2 2006.229.21:31:36.03#ibcon#end of sib2, iclass 12, count 2 2006.229.21:31:36.03#ibcon#*after write, iclass 12, count 2 2006.229.21:31:36.03#ibcon#*before return 0, iclass 12, count 2 2006.229.21:31:36.03#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:36.03#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:36.03#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.21:31:36.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:36.03#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:36.15#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:36.15#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:36.15#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:31:36.15#ibcon#first serial, iclass 12, count 0 2006.229.21:31:36.15#ibcon#enter sib2, iclass 12, count 0 2006.229.21:31:36.15#ibcon#flushed, iclass 12, count 0 2006.229.21:31:36.15#ibcon#about to write, iclass 12, count 0 2006.229.21:31:36.15#ibcon#wrote, iclass 12, count 0 2006.229.21:31:36.15#ibcon#about to read 3, iclass 12, count 0 2006.229.21:31:36.17#ibcon#read 3, iclass 12, count 0 2006.229.21:31:36.17#ibcon#about to read 4, iclass 12, count 0 2006.229.21:31:36.17#ibcon#read 4, iclass 12, count 0 2006.229.21:31:36.17#ibcon#about to read 5, iclass 12, count 0 2006.229.21:31:36.17#ibcon#read 5, iclass 12, count 0 2006.229.21:31:36.17#ibcon#about to read 6, iclass 12, count 0 2006.229.21:31:36.17#ibcon#read 6, iclass 12, count 0 2006.229.21:31:36.17#ibcon#end of sib2, iclass 12, count 0 2006.229.21:31:36.17#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:31:36.17#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:31:36.17#ibcon#[25=USB\r\n] 2006.229.21:31:36.17#ibcon#*before write, iclass 12, count 0 2006.229.21:31:36.17#ibcon#enter sib2, iclass 12, count 0 2006.229.21:31:36.17#ibcon#flushed, iclass 12, count 0 2006.229.21:31:36.17#ibcon#about to write, iclass 12, count 0 2006.229.21:31:36.17#ibcon#wrote, iclass 12, count 0 2006.229.21:31:36.17#ibcon#about to read 3, iclass 12, count 0 2006.229.21:31:36.20#ibcon#read 3, iclass 12, count 0 2006.229.21:31:36.20#ibcon#about to read 4, iclass 12, count 0 2006.229.21:31:36.20#ibcon#read 4, iclass 12, count 0 2006.229.21:31:36.20#ibcon#about to read 5, iclass 12, count 0 2006.229.21:31:36.20#ibcon#read 5, iclass 12, count 0 2006.229.21:31:36.20#ibcon#about to read 6, iclass 12, count 0 2006.229.21:31:36.20#ibcon#read 6, iclass 12, count 0 2006.229.21:31:36.20#ibcon#end of sib2, iclass 12, count 0 2006.229.21:31:36.20#ibcon#*after write, iclass 12, count 0 2006.229.21:31:36.20#ibcon#*before return 0, iclass 12, count 0 2006.229.21:31:36.20#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:36.20#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:36.20#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:31:36.20#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:31:36.20$vck44/valo=7,864.99 2006.229.21:31:36.20#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.21:31:36.20#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.21:31:36.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:36.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:36.20#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:36.20#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:36.20#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:31:36.20#ibcon#first serial, iclass 14, count 0 2006.229.21:31:36.20#ibcon#enter sib2, iclass 14, count 0 2006.229.21:31:36.20#ibcon#flushed, iclass 14, count 0 2006.229.21:31:36.20#ibcon#about to write, iclass 14, count 0 2006.229.21:31:36.20#ibcon#wrote, iclass 14, count 0 2006.229.21:31:36.20#ibcon#about to read 3, iclass 14, count 0 2006.229.21:31:36.22#ibcon#read 3, iclass 14, count 0 2006.229.21:31:36.22#ibcon#about to read 4, iclass 14, count 0 2006.229.21:31:36.22#ibcon#read 4, iclass 14, count 0 2006.229.21:31:36.22#ibcon#about to read 5, iclass 14, count 0 2006.229.21:31:36.22#ibcon#read 5, iclass 14, count 0 2006.229.21:31:36.22#ibcon#about to read 6, iclass 14, count 0 2006.229.21:31:36.22#ibcon#read 6, iclass 14, count 0 2006.229.21:31:36.22#ibcon#end of sib2, iclass 14, count 0 2006.229.21:31:36.22#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:31:36.22#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:31:36.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:31:36.22#ibcon#*before write, iclass 14, count 0 2006.229.21:31:36.22#ibcon#enter sib2, iclass 14, count 0 2006.229.21:31:36.22#ibcon#flushed, iclass 14, count 0 2006.229.21:31:36.22#ibcon#about to write, iclass 14, count 0 2006.229.21:31:36.22#ibcon#wrote, iclass 14, count 0 2006.229.21:31:36.22#ibcon#about to read 3, iclass 14, count 0 2006.229.21:31:36.26#ibcon#read 3, iclass 14, count 0 2006.229.21:31:36.26#ibcon#about to read 4, iclass 14, count 0 2006.229.21:31:36.26#ibcon#read 4, iclass 14, count 0 2006.229.21:31:36.26#ibcon#about to read 5, iclass 14, count 0 2006.229.21:31:36.26#ibcon#read 5, iclass 14, count 0 2006.229.21:31:36.26#ibcon#about to read 6, iclass 14, count 0 2006.229.21:31:36.26#ibcon#read 6, iclass 14, count 0 2006.229.21:31:36.26#ibcon#end of sib2, iclass 14, count 0 2006.229.21:31:36.26#ibcon#*after write, iclass 14, count 0 2006.229.21:31:36.26#ibcon#*before return 0, iclass 14, count 0 2006.229.21:31:36.26#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:36.26#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:36.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:31:36.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:31:36.26$vck44/va=7,5 2006.229.21:31:36.26#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.21:31:36.26#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.21:31:36.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:36.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:36.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:36.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:36.32#ibcon#enter wrdev, iclass 16, count 2 2006.229.21:31:36.32#ibcon#first serial, iclass 16, count 2 2006.229.21:31:36.32#ibcon#enter sib2, iclass 16, count 2 2006.229.21:31:36.32#ibcon#flushed, iclass 16, count 2 2006.229.21:31:36.32#ibcon#about to write, iclass 16, count 2 2006.229.21:31:36.32#ibcon#wrote, iclass 16, count 2 2006.229.21:31:36.32#ibcon#about to read 3, iclass 16, count 2 2006.229.21:31:36.34#ibcon#read 3, iclass 16, count 2 2006.229.21:31:36.34#ibcon#about to read 4, iclass 16, count 2 2006.229.21:31:36.34#ibcon#read 4, iclass 16, count 2 2006.229.21:31:36.34#ibcon#about to read 5, iclass 16, count 2 2006.229.21:31:36.34#ibcon#read 5, iclass 16, count 2 2006.229.21:31:36.34#ibcon#about to read 6, iclass 16, count 2 2006.229.21:31:36.34#ibcon#read 6, iclass 16, count 2 2006.229.21:31:36.34#ibcon#end of sib2, iclass 16, count 2 2006.229.21:31:36.34#ibcon#*mode == 0, iclass 16, count 2 2006.229.21:31:36.34#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.21:31:36.34#ibcon#[25=AT07-05\r\n] 2006.229.21:31:36.34#ibcon#*before write, iclass 16, count 2 2006.229.21:31:36.34#ibcon#enter sib2, iclass 16, count 2 2006.229.21:31:36.34#ibcon#flushed, iclass 16, count 2 2006.229.21:31:36.34#ibcon#about to write, iclass 16, count 2 2006.229.21:31:36.34#ibcon#wrote, iclass 16, count 2 2006.229.21:31:36.34#ibcon#about to read 3, iclass 16, count 2 2006.229.21:31:36.37#ibcon#read 3, iclass 16, count 2 2006.229.21:31:36.37#ibcon#about to read 4, iclass 16, count 2 2006.229.21:31:36.37#ibcon#read 4, iclass 16, count 2 2006.229.21:31:36.37#ibcon#about to read 5, iclass 16, count 2 2006.229.21:31:36.37#ibcon#read 5, iclass 16, count 2 2006.229.21:31:36.37#ibcon#about to read 6, iclass 16, count 2 2006.229.21:31:36.37#ibcon#read 6, iclass 16, count 2 2006.229.21:31:36.37#ibcon#end of sib2, iclass 16, count 2 2006.229.21:31:36.37#ibcon#*after write, iclass 16, count 2 2006.229.21:31:36.37#ibcon#*before return 0, iclass 16, count 2 2006.229.21:31:36.37#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:36.37#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:36.37#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.21:31:36.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:36.37#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:36.49#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:36.49#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:36.49#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:31:36.49#ibcon#first serial, iclass 16, count 0 2006.229.21:31:36.49#ibcon#enter sib2, iclass 16, count 0 2006.229.21:31:36.49#ibcon#flushed, iclass 16, count 0 2006.229.21:31:36.49#ibcon#about to write, iclass 16, count 0 2006.229.21:31:36.49#ibcon#wrote, iclass 16, count 0 2006.229.21:31:36.49#ibcon#about to read 3, iclass 16, count 0 2006.229.21:31:36.51#ibcon#read 3, iclass 16, count 0 2006.229.21:31:36.51#ibcon#about to read 4, iclass 16, count 0 2006.229.21:31:36.51#ibcon#read 4, iclass 16, count 0 2006.229.21:31:36.51#ibcon#about to read 5, iclass 16, count 0 2006.229.21:31:36.51#ibcon#read 5, iclass 16, count 0 2006.229.21:31:36.51#ibcon#about to read 6, iclass 16, count 0 2006.229.21:31:36.51#ibcon#read 6, iclass 16, count 0 2006.229.21:31:36.51#ibcon#end of sib2, iclass 16, count 0 2006.229.21:31:36.51#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:31:36.51#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:31:36.51#ibcon#[25=USB\r\n] 2006.229.21:31:36.51#ibcon#*before write, iclass 16, count 0 2006.229.21:31:36.51#ibcon#enter sib2, iclass 16, count 0 2006.229.21:31:36.51#ibcon#flushed, iclass 16, count 0 2006.229.21:31:36.51#ibcon#about to write, iclass 16, count 0 2006.229.21:31:36.51#ibcon#wrote, iclass 16, count 0 2006.229.21:31:36.51#ibcon#about to read 3, iclass 16, count 0 2006.229.21:31:36.54#ibcon#read 3, iclass 16, count 0 2006.229.21:31:36.54#ibcon#about to read 4, iclass 16, count 0 2006.229.21:31:36.54#ibcon#read 4, iclass 16, count 0 2006.229.21:31:36.54#ibcon#about to read 5, iclass 16, count 0 2006.229.21:31:36.54#ibcon#read 5, iclass 16, count 0 2006.229.21:31:36.54#ibcon#about to read 6, iclass 16, count 0 2006.229.21:31:36.54#ibcon#read 6, iclass 16, count 0 2006.229.21:31:36.54#ibcon#end of sib2, iclass 16, count 0 2006.229.21:31:36.54#ibcon#*after write, iclass 16, count 0 2006.229.21:31:36.54#ibcon#*before return 0, iclass 16, count 0 2006.229.21:31:36.54#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:36.54#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:36.54#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:31:36.54#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:31:36.54$vck44/valo=8,884.99 2006.229.21:31:36.54#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.21:31:36.54#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.21:31:36.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:36.54#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:36.54#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:36.54#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:36.54#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:31:36.54#ibcon#first serial, iclass 18, count 0 2006.229.21:31:36.54#ibcon#enter sib2, iclass 18, count 0 2006.229.21:31:36.54#ibcon#flushed, iclass 18, count 0 2006.229.21:31:36.54#ibcon#about to write, iclass 18, count 0 2006.229.21:31:36.54#ibcon#wrote, iclass 18, count 0 2006.229.21:31:36.54#ibcon#about to read 3, iclass 18, count 0 2006.229.21:31:36.56#ibcon#read 3, iclass 18, count 0 2006.229.21:31:36.56#ibcon#about to read 4, iclass 18, count 0 2006.229.21:31:36.56#ibcon#read 4, iclass 18, count 0 2006.229.21:31:36.56#ibcon#about to read 5, iclass 18, count 0 2006.229.21:31:36.56#ibcon#read 5, iclass 18, count 0 2006.229.21:31:36.56#ibcon#about to read 6, iclass 18, count 0 2006.229.21:31:36.56#ibcon#read 6, iclass 18, count 0 2006.229.21:31:36.56#ibcon#end of sib2, iclass 18, count 0 2006.229.21:31:36.56#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:31:36.56#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:31:36.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:31:36.56#ibcon#*before write, iclass 18, count 0 2006.229.21:31:36.56#ibcon#enter sib2, iclass 18, count 0 2006.229.21:31:36.56#ibcon#flushed, iclass 18, count 0 2006.229.21:31:36.56#ibcon#about to write, iclass 18, count 0 2006.229.21:31:36.56#ibcon#wrote, iclass 18, count 0 2006.229.21:31:36.56#ibcon#about to read 3, iclass 18, count 0 2006.229.21:31:36.60#ibcon#read 3, iclass 18, count 0 2006.229.21:31:36.60#ibcon#about to read 4, iclass 18, count 0 2006.229.21:31:36.60#ibcon#read 4, iclass 18, count 0 2006.229.21:31:36.60#ibcon#about to read 5, iclass 18, count 0 2006.229.21:31:36.60#ibcon#read 5, iclass 18, count 0 2006.229.21:31:36.60#ibcon#about to read 6, iclass 18, count 0 2006.229.21:31:36.60#ibcon#read 6, iclass 18, count 0 2006.229.21:31:36.60#ibcon#end of sib2, iclass 18, count 0 2006.229.21:31:36.60#ibcon#*after write, iclass 18, count 0 2006.229.21:31:36.60#ibcon#*before return 0, iclass 18, count 0 2006.229.21:31:36.60#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:36.60#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:36.60#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:31:36.60#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:31:36.60$vck44/va=8,6 2006.229.21:31:36.60#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.21:31:36.60#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.21:31:36.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:36.60#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.21:31:36.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.21:31:36.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.21:31:36.66#ibcon#enter wrdev, iclass 20, count 2 2006.229.21:31:36.66#ibcon#first serial, iclass 20, count 2 2006.229.21:31:36.66#ibcon#enter sib2, iclass 20, count 2 2006.229.21:31:36.66#ibcon#flushed, iclass 20, count 2 2006.229.21:31:36.66#ibcon#about to write, iclass 20, count 2 2006.229.21:31:36.66#ibcon#wrote, iclass 20, count 2 2006.229.21:31:36.66#ibcon#about to read 3, iclass 20, count 2 2006.229.21:31:36.68#ibcon#read 3, iclass 20, count 2 2006.229.21:31:36.68#ibcon#about to read 4, iclass 20, count 2 2006.229.21:31:36.68#ibcon#read 4, iclass 20, count 2 2006.229.21:31:36.68#ibcon#about to read 5, iclass 20, count 2 2006.229.21:31:36.68#ibcon#read 5, iclass 20, count 2 2006.229.21:31:36.68#ibcon#about to read 6, iclass 20, count 2 2006.229.21:31:36.68#ibcon#read 6, iclass 20, count 2 2006.229.21:31:36.68#ibcon#end of sib2, iclass 20, count 2 2006.229.21:31:36.68#ibcon#*mode == 0, iclass 20, count 2 2006.229.21:31:36.68#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.21:31:36.68#ibcon#[25=AT08-06\r\n] 2006.229.21:31:36.68#ibcon#*before write, iclass 20, count 2 2006.229.21:31:36.68#ibcon#enter sib2, iclass 20, count 2 2006.229.21:31:36.68#ibcon#flushed, iclass 20, count 2 2006.229.21:31:36.68#ibcon#about to write, iclass 20, count 2 2006.229.21:31:36.68#ibcon#wrote, iclass 20, count 2 2006.229.21:31:36.68#ibcon#about to read 3, iclass 20, count 2 2006.229.21:31:36.71#ibcon#read 3, iclass 20, count 2 2006.229.21:31:36.71#ibcon#about to read 4, iclass 20, count 2 2006.229.21:31:36.71#ibcon#read 4, iclass 20, count 2 2006.229.21:31:36.71#ibcon#about to read 5, iclass 20, count 2 2006.229.21:31:36.71#ibcon#read 5, iclass 20, count 2 2006.229.21:31:36.71#ibcon#about to read 6, iclass 20, count 2 2006.229.21:31:36.71#ibcon#read 6, iclass 20, count 2 2006.229.21:31:36.71#ibcon#end of sib2, iclass 20, count 2 2006.229.21:31:36.71#ibcon#*after write, iclass 20, count 2 2006.229.21:31:36.71#ibcon#*before return 0, iclass 20, count 2 2006.229.21:31:36.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.21:31:36.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.21:31:36.71#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.21:31:36.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:36.71#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.21:31:36.83#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.21:31:36.83#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.21:31:36.83#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:31:36.83#ibcon#first serial, iclass 20, count 0 2006.229.21:31:36.83#ibcon#enter sib2, iclass 20, count 0 2006.229.21:31:36.83#ibcon#flushed, iclass 20, count 0 2006.229.21:31:36.83#ibcon#about to write, iclass 20, count 0 2006.229.21:31:36.83#ibcon#wrote, iclass 20, count 0 2006.229.21:31:36.83#ibcon#about to read 3, iclass 20, count 0 2006.229.21:31:36.85#ibcon#read 3, iclass 20, count 0 2006.229.21:31:36.85#ibcon#about to read 4, iclass 20, count 0 2006.229.21:31:36.85#ibcon#read 4, iclass 20, count 0 2006.229.21:31:36.85#ibcon#about to read 5, iclass 20, count 0 2006.229.21:31:36.85#ibcon#read 5, iclass 20, count 0 2006.229.21:31:36.85#ibcon#about to read 6, iclass 20, count 0 2006.229.21:31:36.85#ibcon#read 6, iclass 20, count 0 2006.229.21:31:36.85#ibcon#end of sib2, iclass 20, count 0 2006.229.21:31:36.85#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:31:36.85#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:31:36.85#ibcon#[25=USB\r\n] 2006.229.21:31:36.85#ibcon#*before write, iclass 20, count 0 2006.229.21:31:36.85#ibcon#enter sib2, iclass 20, count 0 2006.229.21:31:36.85#ibcon#flushed, iclass 20, count 0 2006.229.21:31:36.85#ibcon#about to write, iclass 20, count 0 2006.229.21:31:36.85#ibcon#wrote, iclass 20, count 0 2006.229.21:31:36.85#ibcon#about to read 3, iclass 20, count 0 2006.229.21:31:36.88#ibcon#read 3, iclass 20, count 0 2006.229.21:31:36.88#ibcon#about to read 4, iclass 20, count 0 2006.229.21:31:36.88#ibcon#read 4, iclass 20, count 0 2006.229.21:31:36.88#ibcon#about to read 5, iclass 20, count 0 2006.229.21:31:36.88#ibcon#read 5, iclass 20, count 0 2006.229.21:31:36.88#ibcon#about to read 6, iclass 20, count 0 2006.229.21:31:36.88#ibcon#read 6, iclass 20, count 0 2006.229.21:31:36.88#ibcon#end of sib2, iclass 20, count 0 2006.229.21:31:36.88#ibcon#*after write, iclass 20, count 0 2006.229.21:31:36.88#ibcon#*before return 0, iclass 20, count 0 2006.229.21:31:36.88#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.21:31:36.88#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.21:31:36.88#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:31:36.88#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:31:36.88$vck44/vblo=1,629.99 2006.229.21:31:36.88#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.21:31:36.88#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.21:31:36.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:36.88#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:31:36.88#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:31:36.88#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:31:36.88#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:31:36.88#ibcon#first serial, iclass 22, count 0 2006.229.21:31:36.88#ibcon#enter sib2, iclass 22, count 0 2006.229.21:31:36.88#ibcon#flushed, iclass 22, count 0 2006.229.21:31:36.88#ibcon#about to write, iclass 22, count 0 2006.229.21:31:36.88#ibcon#wrote, iclass 22, count 0 2006.229.21:31:36.88#ibcon#about to read 3, iclass 22, count 0 2006.229.21:31:36.90#ibcon#read 3, iclass 22, count 0 2006.229.21:31:36.90#ibcon#about to read 4, iclass 22, count 0 2006.229.21:31:36.90#ibcon#read 4, iclass 22, count 0 2006.229.21:31:36.90#ibcon#about to read 5, iclass 22, count 0 2006.229.21:31:36.90#ibcon#read 5, iclass 22, count 0 2006.229.21:31:36.90#ibcon#about to read 6, iclass 22, count 0 2006.229.21:31:36.90#ibcon#read 6, iclass 22, count 0 2006.229.21:31:36.90#ibcon#end of sib2, iclass 22, count 0 2006.229.21:31:36.90#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:31:36.90#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:31:36.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:31:36.90#ibcon#*before write, iclass 22, count 0 2006.229.21:31:36.90#ibcon#enter sib2, iclass 22, count 0 2006.229.21:31:36.90#ibcon#flushed, iclass 22, count 0 2006.229.21:31:36.90#ibcon#about to write, iclass 22, count 0 2006.229.21:31:36.90#ibcon#wrote, iclass 22, count 0 2006.229.21:31:36.90#ibcon#about to read 3, iclass 22, count 0 2006.229.21:31:36.94#ibcon#read 3, iclass 22, count 0 2006.229.21:31:36.94#ibcon#about to read 4, iclass 22, count 0 2006.229.21:31:36.94#ibcon#read 4, iclass 22, count 0 2006.229.21:31:36.94#ibcon#about to read 5, iclass 22, count 0 2006.229.21:31:36.94#ibcon#read 5, iclass 22, count 0 2006.229.21:31:36.94#ibcon#about to read 6, iclass 22, count 0 2006.229.21:31:36.94#ibcon#read 6, iclass 22, count 0 2006.229.21:31:36.94#ibcon#end of sib2, iclass 22, count 0 2006.229.21:31:36.94#ibcon#*after write, iclass 22, count 0 2006.229.21:31:36.94#ibcon#*before return 0, iclass 22, count 0 2006.229.21:31:36.94#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:31:36.94#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:31:36.94#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:31:36.94#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:31:36.94$vck44/vb=1,4 2006.229.21:31:36.94#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.21:31:36.94#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.21:31:36.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:36.94#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.21:31:36.94#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.21:31:36.94#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.21:31:36.94#ibcon#enter wrdev, iclass 24, count 2 2006.229.21:31:36.94#ibcon#first serial, iclass 24, count 2 2006.229.21:31:36.94#ibcon#enter sib2, iclass 24, count 2 2006.229.21:31:36.94#ibcon#flushed, iclass 24, count 2 2006.229.21:31:36.94#ibcon#about to write, iclass 24, count 2 2006.229.21:31:36.94#ibcon#wrote, iclass 24, count 2 2006.229.21:31:36.94#ibcon#about to read 3, iclass 24, count 2 2006.229.21:31:36.96#ibcon#read 3, iclass 24, count 2 2006.229.21:31:36.96#ibcon#about to read 4, iclass 24, count 2 2006.229.21:31:36.96#ibcon#read 4, iclass 24, count 2 2006.229.21:31:36.96#ibcon#about to read 5, iclass 24, count 2 2006.229.21:31:36.96#ibcon#read 5, iclass 24, count 2 2006.229.21:31:36.96#ibcon#about to read 6, iclass 24, count 2 2006.229.21:31:36.96#ibcon#read 6, iclass 24, count 2 2006.229.21:31:36.96#ibcon#end of sib2, iclass 24, count 2 2006.229.21:31:36.96#ibcon#*mode == 0, iclass 24, count 2 2006.229.21:31:36.96#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.21:31:36.96#ibcon#[27=AT01-04\r\n] 2006.229.21:31:36.96#ibcon#*before write, iclass 24, count 2 2006.229.21:31:36.96#ibcon#enter sib2, iclass 24, count 2 2006.229.21:31:36.96#ibcon#flushed, iclass 24, count 2 2006.229.21:31:36.96#ibcon#about to write, iclass 24, count 2 2006.229.21:31:36.96#ibcon#wrote, iclass 24, count 2 2006.229.21:31:36.96#ibcon#about to read 3, iclass 24, count 2 2006.229.21:31:36.99#ibcon#read 3, iclass 24, count 2 2006.229.21:31:36.99#ibcon#about to read 4, iclass 24, count 2 2006.229.21:31:36.99#ibcon#read 4, iclass 24, count 2 2006.229.21:31:36.99#ibcon#about to read 5, iclass 24, count 2 2006.229.21:31:36.99#ibcon#read 5, iclass 24, count 2 2006.229.21:31:36.99#ibcon#about to read 6, iclass 24, count 2 2006.229.21:31:36.99#ibcon#read 6, iclass 24, count 2 2006.229.21:31:36.99#ibcon#end of sib2, iclass 24, count 2 2006.229.21:31:36.99#ibcon#*after write, iclass 24, count 2 2006.229.21:31:36.99#ibcon#*before return 0, iclass 24, count 2 2006.229.21:31:36.99#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.21:31:36.99#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.21:31:36.99#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.21:31:36.99#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:36.99#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.21:31:37.11#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.21:31:37.11#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.21:31:37.11#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:31:37.11#ibcon#first serial, iclass 24, count 0 2006.229.21:31:37.11#ibcon#enter sib2, iclass 24, count 0 2006.229.21:31:37.11#ibcon#flushed, iclass 24, count 0 2006.229.21:31:37.11#ibcon#about to write, iclass 24, count 0 2006.229.21:31:37.11#ibcon#wrote, iclass 24, count 0 2006.229.21:31:37.11#ibcon#about to read 3, iclass 24, count 0 2006.229.21:31:37.13#ibcon#read 3, iclass 24, count 0 2006.229.21:31:37.13#ibcon#about to read 4, iclass 24, count 0 2006.229.21:31:37.13#ibcon#read 4, iclass 24, count 0 2006.229.21:31:37.13#ibcon#about to read 5, iclass 24, count 0 2006.229.21:31:37.13#ibcon#read 5, iclass 24, count 0 2006.229.21:31:37.13#ibcon#about to read 6, iclass 24, count 0 2006.229.21:31:37.13#ibcon#read 6, iclass 24, count 0 2006.229.21:31:37.13#ibcon#end of sib2, iclass 24, count 0 2006.229.21:31:37.13#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:31:37.13#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:31:37.13#ibcon#[27=USB\r\n] 2006.229.21:31:37.13#ibcon#*before write, iclass 24, count 0 2006.229.21:31:37.13#ibcon#enter sib2, iclass 24, count 0 2006.229.21:31:37.13#ibcon#flushed, iclass 24, count 0 2006.229.21:31:37.13#ibcon#about to write, iclass 24, count 0 2006.229.21:31:37.13#ibcon#wrote, iclass 24, count 0 2006.229.21:31:37.13#ibcon#about to read 3, iclass 24, count 0 2006.229.21:31:37.16#ibcon#read 3, iclass 24, count 0 2006.229.21:31:37.16#ibcon#about to read 4, iclass 24, count 0 2006.229.21:31:37.16#ibcon#read 4, iclass 24, count 0 2006.229.21:31:37.16#ibcon#about to read 5, iclass 24, count 0 2006.229.21:31:37.16#ibcon#read 5, iclass 24, count 0 2006.229.21:31:37.16#ibcon#about to read 6, iclass 24, count 0 2006.229.21:31:37.16#ibcon#read 6, iclass 24, count 0 2006.229.21:31:37.16#ibcon#end of sib2, iclass 24, count 0 2006.229.21:31:37.16#ibcon#*after write, iclass 24, count 0 2006.229.21:31:37.16#ibcon#*before return 0, iclass 24, count 0 2006.229.21:31:37.16#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.21:31:37.16#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.21:31:37.16#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:31:37.16#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:31:37.16$vck44/vblo=2,634.99 2006.229.21:31:37.16#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.21:31:37.16#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.21:31:37.16#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:37.16#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:37.16#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:37.16#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:37.16#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:31:37.16#ibcon#first serial, iclass 26, count 0 2006.229.21:31:37.16#ibcon#enter sib2, iclass 26, count 0 2006.229.21:31:37.16#ibcon#flushed, iclass 26, count 0 2006.229.21:31:37.16#ibcon#about to write, iclass 26, count 0 2006.229.21:31:37.16#ibcon#wrote, iclass 26, count 0 2006.229.21:31:37.16#ibcon#about to read 3, iclass 26, count 0 2006.229.21:31:37.18#ibcon#read 3, iclass 26, count 0 2006.229.21:31:37.18#ibcon#about to read 4, iclass 26, count 0 2006.229.21:31:37.18#ibcon#read 4, iclass 26, count 0 2006.229.21:31:37.18#ibcon#about to read 5, iclass 26, count 0 2006.229.21:31:37.18#ibcon#read 5, iclass 26, count 0 2006.229.21:31:37.18#ibcon#about to read 6, iclass 26, count 0 2006.229.21:31:37.18#ibcon#read 6, iclass 26, count 0 2006.229.21:31:37.18#ibcon#end of sib2, iclass 26, count 0 2006.229.21:31:37.18#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:31:37.18#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:31:37.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:31:37.18#ibcon#*before write, iclass 26, count 0 2006.229.21:31:37.18#ibcon#enter sib2, iclass 26, count 0 2006.229.21:31:37.18#ibcon#flushed, iclass 26, count 0 2006.229.21:31:37.18#ibcon#about to write, iclass 26, count 0 2006.229.21:31:37.18#ibcon#wrote, iclass 26, count 0 2006.229.21:31:37.18#ibcon#about to read 3, iclass 26, count 0 2006.229.21:31:37.22#ibcon#read 3, iclass 26, count 0 2006.229.21:31:37.22#ibcon#about to read 4, iclass 26, count 0 2006.229.21:31:37.22#ibcon#read 4, iclass 26, count 0 2006.229.21:31:37.22#ibcon#about to read 5, iclass 26, count 0 2006.229.21:31:37.22#ibcon#read 5, iclass 26, count 0 2006.229.21:31:37.22#ibcon#about to read 6, iclass 26, count 0 2006.229.21:31:37.22#ibcon#read 6, iclass 26, count 0 2006.229.21:31:37.22#ibcon#end of sib2, iclass 26, count 0 2006.229.21:31:37.22#ibcon#*after write, iclass 26, count 0 2006.229.21:31:37.22#ibcon#*before return 0, iclass 26, count 0 2006.229.21:31:37.22#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:37.22#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.21:31:37.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:31:37.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:31:37.22$vck44/vb=2,4 2006.229.21:31:37.22#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.21:31:37.22#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.21:31:37.22#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:37.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:37.28#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:37.28#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:37.28#ibcon#enter wrdev, iclass 28, count 2 2006.229.21:31:37.28#ibcon#first serial, iclass 28, count 2 2006.229.21:31:37.28#ibcon#enter sib2, iclass 28, count 2 2006.229.21:31:37.28#ibcon#flushed, iclass 28, count 2 2006.229.21:31:37.28#ibcon#about to write, iclass 28, count 2 2006.229.21:31:37.28#ibcon#wrote, iclass 28, count 2 2006.229.21:31:37.28#ibcon#about to read 3, iclass 28, count 2 2006.229.21:31:37.30#ibcon#read 3, iclass 28, count 2 2006.229.21:31:37.30#ibcon#about to read 4, iclass 28, count 2 2006.229.21:31:37.30#ibcon#read 4, iclass 28, count 2 2006.229.21:31:37.30#ibcon#about to read 5, iclass 28, count 2 2006.229.21:31:37.30#ibcon#read 5, iclass 28, count 2 2006.229.21:31:37.30#ibcon#about to read 6, iclass 28, count 2 2006.229.21:31:37.30#ibcon#read 6, iclass 28, count 2 2006.229.21:31:37.30#ibcon#end of sib2, iclass 28, count 2 2006.229.21:31:37.30#ibcon#*mode == 0, iclass 28, count 2 2006.229.21:31:37.30#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.21:31:37.30#ibcon#[27=AT02-04\r\n] 2006.229.21:31:37.30#ibcon#*before write, iclass 28, count 2 2006.229.21:31:37.30#ibcon#enter sib2, iclass 28, count 2 2006.229.21:31:37.30#ibcon#flushed, iclass 28, count 2 2006.229.21:31:37.30#ibcon#about to write, iclass 28, count 2 2006.229.21:31:37.30#ibcon#wrote, iclass 28, count 2 2006.229.21:31:37.30#ibcon#about to read 3, iclass 28, count 2 2006.229.21:31:37.33#ibcon#read 3, iclass 28, count 2 2006.229.21:31:37.33#ibcon#about to read 4, iclass 28, count 2 2006.229.21:31:37.33#ibcon#read 4, iclass 28, count 2 2006.229.21:31:37.33#ibcon#about to read 5, iclass 28, count 2 2006.229.21:31:37.33#ibcon#read 5, iclass 28, count 2 2006.229.21:31:37.33#ibcon#about to read 6, iclass 28, count 2 2006.229.21:31:37.33#ibcon#read 6, iclass 28, count 2 2006.229.21:31:37.33#ibcon#end of sib2, iclass 28, count 2 2006.229.21:31:37.33#ibcon#*after write, iclass 28, count 2 2006.229.21:31:37.33#ibcon#*before return 0, iclass 28, count 2 2006.229.21:31:37.33#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:37.33#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.21:31:37.33#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.21:31:37.33#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:37.33#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:37.45#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:37.45#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:37.45#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:31:37.45#ibcon#first serial, iclass 28, count 0 2006.229.21:31:37.45#ibcon#enter sib2, iclass 28, count 0 2006.229.21:31:37.45#ibcon#flushed, iclass 28, count 0 2006.229.21:31:37.45#ibcon#about to write, iclass 28, count 0 2006.229.21:31:37.45#ibcon#wrote, iclass 28, count 0 2006.229.21:31:37.45#ibcon#about to read 3, iclass 28, count 0 2006.229.21:31:37.47#ibcon#read 3, iclass 28, count 0 2006.229.21:31:37.47#ibcon#about to read 4, iclass 28, count 0 2006.229.21:31:37.47#ibcon#read 4, iclass 28, count 0 2006.229.21:31:37.47#ibcon#about to read 5, iclass 28, count 0 2006.229.21:31:37.47#ibcon#read 5, iclass 28, count 0 2006.229.21:31:37.47#ibcon#about to read 6, iclass 28, count 0 2006.229.21:31:37.47#ibcon#read 6, iclass 28, count 0 2006.229.21:31:37.47#ibcon#end of sib2, iclass 28, count 0 2006.229.21:31:37.47#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:31:37.47#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:31:37.47#ibcon#[27=USB\r\n] 2006.229.21:31:37.47#ibcon#*before write, iclass 28, count 0 2006.229.21:31:37.47#ibcon#enter sib2, iclass 28, count 0 2006.229.21:31:37.47#ibcon#flushed, iclass 28, count 0 2006.229.21:31:37.47#ibcon#about to write, iclass 28, count 0 2006.229.21:31:37.47#ibcon#wrote, iclass 28, count 0 2006.229.21:31:37.47#ibcon#about to read 3, iclass 28, count 0 2006.229.21:31:37.50#ibcon#read 3, iclass 28, count 0 2006.229.21:31:37.50#ibcon#about to read 4, iclass 28, count 0 2006.229.21:31:37.50#ibcon#read 4, iclass 28, count 0 2006.229.21:31:37.50#ibcon#about to read 5, iclass 28, count 0 2006.229.21:31:37.50#ibcon#read 5, iclass 28, count 0 2006.229.21:31:37.50#ibcon#about to read 6, iclass 28, count 0 2006.229.21:31:37.50#ibcon#read 6, iclass 28, count 0 2006.229.21:31:37.50#ibcon#end of sib2, iclass 28, count 0 2006.229.21:31:37.50#ibcon#*after write, iclass 28, count 0 2006.229.21:31:37.50#ibcon#*before return 0, iclass 28, count 0 2006.229.21:31:37.50#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:37.50#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.21:31:37.50#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:31:37.50#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:31:37.50$vck44/vblo=3,649.99 2006.229.21:31:37.50#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.21:31:37.50#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.21:31:37.50#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:37.50#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:37.50#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:37.50#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:37.50#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:31:37.50#ibcon#first serial, iclass 30, count 0 2006.229.21:31:37.50#ibcon#enter sib2, iclass 30, count 0 2006.229.21:31:37.50#ibcon#flushed, iclass 30, count 0 2006.229.21:31:37.50#ibcon#about to write, iclass 30, count 0 2006.229.21:31:37.50#ibcon#wrote, iclass 30, count 0 2006.229.21:31:37.50#ibcon#about to read 3, iclass 30, count 0 2006.229.21:31:37.52#ibcon#read 3, iclass 30, count 0 2006.229.21:31:37.52#ibcon#about to read 4, iclass 30, count 0 2006.229.21:31:37.52#ibcon#read 4, iclass 30, count 0 2006.229.21:31:37.52#ibcon#about to read 5, iclass 30, count 0 2006.229.21:31:37.52#ibcon#read 5, iclass 30, count 0 2006.229.21:31:37.52#ibcon#about to read 6, iclass 30, count 0 2006.229.21:31:37.52#ibcon#read 6, iclass 30, count 0 2006.229.21:31:37.52#ibcon#end of sib2, iclass 30, count 0 2006.229.21:31:37.52#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:31:37.52#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:31:37.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:31:37.52#ibcon#*before write, iclass 30, count 0 2006.229.21:31:37.52#ibcon#enter sib2, iclass 30, count 0 2006.229.21:31:37.52#ibcon#flushed, iclass 30, count 0 2006.229.21:31:37.52#ibcon#about to write, iclass 30, count 0 2006.229.21:31:37.52#ibcon#wrote, iclass 30, count 0 2006.229.21:31:37.52#ibcon#about to read 3, iclass 30, count 0 2006.229.21:31:37.56#ibcon#read 3, iclass 30, count 0 2006.229.21:31:37.56#ibcon#about to read 4, iclass 30, count 0 2006.229.21:31:37.56#ibcon#read 4, iclass 30, count 0 2006.229.21:31:37.56#ibcon#about to read 5, iclass 30, count 0 2006.229.21:31:37.56#ibcon#read 5, iclass 30, count 0 2006.229.21:31:37.56#ibcon#about to read 6, iclass 30, count 0 2006.229.21:31:37.56#ibcon#read 6, iclass 30, count 0 2006.229.21:31:37.56#ibcon#end of sib2, iclass 30, count 0 2006.229.21:31:37.56#ibcon#*after write, iclass 30, count 0 2006.229.21:31:37.56#ibcon#*before return 0, iclass 30, count 0 2006.229.21:31:37.56#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:37.56#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.21:31:37.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:31:37.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:31:37.56$vck44/vb=3,4 2006.229.21:31:37.56#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.21:31:37.56#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.21:31:37.56#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:37.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:37.62#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:37.62#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:37.62#ibcon#enter wrdev, iclass 32, count 2 2006.229.21:31:37.62#ibcon#first serial, iclass 32, count 2 2006.229.21:31:37.62#ibcon#enter sib2, iclass 32, count 2 2006.229.21:31:37.62#ibcon#flushed, iclass 32, count 2 2006.229.21:31:37.62#ibcon#about to write, iclass 32, count 2 2006.229.21:31:37.62#ibcon#wrote, iclass 32, count 2 2006.229.21:31:37.62#ibcon#about to read 3, iclass 32, count 2 2006.229.21:31:37.64#ibcon#read 3, iclass 32, count 2 2006.229.21:31:37.64#ibcon#about to read 4, iclass 32, count 2 2006.229.21:31:37.64#ibcon#read 4, iclass 32, count 2 2006.229.21:31:37.64#ibcon#about to read 5, iclass 32, count 2 2006.229.21:31:37.64#ibcon#read 5, iclass 32, count 2 2006.229.21:31:37.64#ibcon#about to read 6, iclass 32, count 2 2006.229.21:31:37.64#ibcon#read 6, iclass 32, count 2 2006.229.21:31:37.64#ibcon#end of sib2, iclass 32, count 2 2006.229.21:31:37.64#ibcon#*mode == 0, iclass 32, count 2 2006.229.21:31:37.64#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.21:31:37.64#ibcon#[27=AT03-04\r\n] 2006.229.21:31:37.64#ibcon#*before write, iclass 32, count 2 2006.229.21:31:37.64#ibcon#enter sib2, iclass 32, count 2 2006.229.21:31:37.64#ibcon#flushed, iclass 32, count 2 2006.229.21:31:37.64#ibcon#about to write, iclass 32, count 2 2006.229.21:31:37.64#ibcon#wrote, iclass 32, count 2 2006.229.21:31:37.64#ibcon#about to read 3, iclass 32, count 2 2006.229.21:31:37.67#ibcon#read 3, iclass 32, count 2 2006.229.21:31:37.67#ibcon#about to read 4, iclass 32, count 2 2006.229.21:31:37.67#ibcon#read 4, iclass 32, count 2 2006.229.21:31:37.67#ibcon#about to read 5, iclass 32, count 2 2006.229.21:31:37.67#ibcon#read 5, iclass 32, count 2 2006.229.21:31:37.67#ibcon#about to read 6, iclass 32, count 2 2006.229.21:31:37.67#ibcon#read 6, iclass 32, count 2 2006.229.21:31:37.67#ibcon#end of sib2, iclass 32, count 2 2006.229.21:31:37.67#ibcon#*after write, iclass 32, count 2 2006.229.21:31:37.67#ibcon#*before return 0, iclass 32, count 2 2006.229.21:31:37.67#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:37.67#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.21:31:37.67#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.21:31:37.67#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:37.67#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:37.79#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:37.79#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:37.79#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:31:37.79#ibcon#first serial, iclass 32, count 0 2006.229.21:31:37.79#ibcon#enter sib2, iclass 32, count 0 2006.229.21:31:37.79#ibcon#flushed, iclass 32, count 0 2006.229.21:31:37.79#ibcon#about to write, iclass 32, count 0 2006.229.21:31:37.79#ibcon#wrote, iclass 32, count 0 2006.229.21:31:37.79#ibcon#about to read 3, iclass 32, count 0 2006.229.21:31:37.81#ibcon#read 3, iclass 32, count 0 2006.229.21:31:37.81#ibcon#about to read 4, iclass 32, count 0 2006.229.21:31:37.81#ibcon#read 4, iclass 32, count 0 2006.229.21:31:37.81#ibcon#about to read 5, iclass 32, count 0 2006.229.21:31:37.81#ibcon#read 5, iclass 32, count 0 2006.229.21:31:37.81#ibcon#about to read 6, iclass 32, count 0 2006.229.21:31:37.81#ibcon#read 6, iclass 32, count 0 2006.229.21:31:37.81#ibcon#end of sib2, iclass 32, count 0 2006.229.21:31:37.81#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:31:37.81#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:31:37.81#ibcon#[27=USB\r\n] 2006.229.21:31:37.81#ibcon#*before write, iclass 32, count 0 2006.229.21:31:37.81#ibcon#enter sib2, iclass 32, count 0 2006.229.21:31:37.81#ibcon#flushed, iclass 32, count 0 2006.229.21:31:37.81#ibcon#about to write, iclass 32, count 0 2006.229.21:31:37.81#ibcon#wrote, iclass 32, count 0 2006.229.21:31:37.81#ibcon#about to read 3, iclass 32, count 0 2006.229.21:31:37.84#ibcon#read 3, iclass 32, count 0 2006.229.21:31:37.84#ibcon#about to read 4, iclass 32, count 0 2006.229.21:31:37.84#ibcon#read 4, iclass 32, count 0 2006.229.21:31:37.84#ibcon#about to read 5, iclass 32, count 0 2006.229.21:31:37.84#ibcon#read 5, iclass 32, count 0 2006.229.21:31:37.84#ibcon#about to read 6, iclass 32, count 0 2006.229.21:31:37.84#ibcon#read 6, iclass 32, count 0 2006.229.21:31:37.84#ibcon#end of sib2, iclass 32, count 0 2006.229.21:31:37.84#ibcon#*after write, iclass 32, count 0 2006.229.21:31:37.84#ibcon#*before return 0, iclass 32, count 0 2006.229.21:31:37.84#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:37.84#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.21:31:37.84#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:31:37.84#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:31:37.84$vck44/vblo=4,679.99 2006.229.21:31:37.84#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.21:31:37.84#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.21:31:37.84#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:37.84#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:37.84#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:37.84#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:37.84#ibcon#enter wrdev, iclass 34, count 0 2006.229.21:31:37.84#ibcon#first serial, iclass 34, count 0 2006.229.21:31:37.84#ibcon#enter sib2, iclass 34, count 0 2006.229.21:31:37.84#ibcon#flushed, iclass 34, count 0 2006.229.21:31:37.84#ibcon#about to write, iclass 34, count 0 2006.229.21:31:37.84#ibcon#wrote, iclass 34, count 0 2006.229.21:31:37.84#ibcon#about to read 3, iclass 34, count 0 2006.229.21:31:37.86#ibcon#read 3, iclass 34, count 0 2006.229.21:31:37.86#ibcon#about to read 4, iclass 34, count 0 2006.229.21:31:37.86#ibcon#read 4, iclass 34, count 0 2006.229.21:31:37.86#ibcon#about to read 5, iclass 34, count 0 2006.229.21:31:37.86#ibcon#read 5, iclass 34, count 0 2006.229.21:31:37.86#ibcon#about to read 6, iclass 34, count 0 2006.229.21:31:37.86#ibcon#read 6, iclass 34, count 0 2006.229.21:31:37.86#ibcon#end of sib2, iclass 34, count 0 2006.229.21:31:37.86#ibcon#*mode == 0, iclass 34, count 0 2006.229.21:31:37.86#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.21:31:37.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:31:37.86#ibcon#*before write, iclass 34, count 0 2006.229.21:31:37.86#ibcon#enter sib2, iclass 34, count 0 2006.229.21:31:37.86#ibcon#flushed, iclass 34, count 0 2006.229.21:31:37.86#ibcon#about to write, iclass 34, count 0 2006.229.21:31:37.86#ibcon#wrote, iclass 34, count 0 2006.229.21:31:37.86#ibcon#about to read 3, iclass 34, count 0 2006.229.21:31:37.90#ibcon#read 3, iclass 34, count 0 2006.229.21:31:37.90#ibcon#about to read 4, iclass 34, count 0 2006.229.21:31:37.90#ibcon#read 4, iclass 34, count 0 2006.229.21:31:37.90#ibcon#about to read 5, iclass 34, count 0 2006.229.21:31:37.90#ibcon#read 5, iclass 34, count 0 2006.229.21:31:37.90#ibcon#about to read 6, iclass 34, count 0 2006.229.21:31:37.90#ibcon#read 6, iclass 34, count 0 2006.229.21:31:37.90#ibcon#end of sib2, iclass 34, count 0 2006.229.21:31:37.90#ibcon#*after write, iclass 34, count 0 2006.229.21:31:37.90#ibcon#*before return 0, iclass 34, count 0 2006.229.21:31:37.90#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:37.90#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.21:31:37.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.21:31:37.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.21:31:37.90$vck44/vb=4,4 2006.229.21:31:37.90#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.21:31:37.90#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.21:31:37.90#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:37.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:37.96#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:37.96#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:37.96#ibcon#enter wrdev, iclass 36, count 2 2006.229.21:31:37.96#ibcon#first serial, iclass 36, count 2 2006.229.21:31:37.96#ibcon#enter sib2, iclass 36, count 2 2006.229.21:31:37.96#ibcon#flushed, iclass 36, count 2 2006.229.21:31:37.96#ibcon#about to write, iclass 36, count 2 2006.229.21:31:37.96#ibcon#wrote, iclass 36, count 2 2006.229.21:31:37.96#ibcon#about to read 3, iclass 36, count 2 2006.229.21:31:37.98#ibcon#read 3, iclass 36, count 2 2006.229.21:31:37.98#ibcon#about to read 4, iclass 36, count 2 2006.229.21:31:37.98#ibcon#read 4, iclass 36, count 2 2006.229.21:31:37.98#ibcon#about to read 5, iclass 36, count 2 2006.229.21:31:37.98#ibcon#read 5, iclass 36, count 2 2006.229.21:31:37.98#ibcon#about to read 6, iclass 36, count 2 2006.229.21:31:37.98#ibcon#read 6, iclass 36, count 2 2006.229.21:31:37.98#ibcon#end of sib2, iclass 36, count 2 2006.229.21:31:37.98#ibcon#*mode == 0, iclass 36, count 2 2006.229.21:31:37.98#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.21:31:37.98#ibcon#[27=AT04-04\r\n] 2006.229.21:31:37.98#ibcon#*before write, iclass 36, count 2 2006.229.21:31:37.98#ibcon#enter sib2, iclass 36, count 2 2006.229.21:31:37.98#ibcon#flushed, iclass 36, count 2 2006.229.21:31:37.98#ibcon#about to write, iclass 36, count 2 2006.229.21:31:37.98#ibcon#wrote, iclass 36, count 2 2006.229.21:31:37.98#ibcon#about to read 3, iclass 36, count 2 2006.229.21:31:38.01#ibcon#read 3, iclass 36, count 2 2006.229.21:31:38.01#ibcon#about to read 4, iclass 36, count 2 2006.229.21:31:38.01#ibcon#read 4, iclass 36, count 2 2006.229.21:31:38.01#ibcon#about to read 5, iclass 36, count 2 2006.229.21:31:38.01#ibcon#read 5, iclass 36, count 2 2006.229.21:31:38.01#ibcon#about to read 6, iclass 36, count 2 2006.229.21:31:38.01#ibcon#read 6, iclass 36, count 2 2006.229.21:31:38.01#ibcon#end of sib2, iclass 36, count 2 2006.229.21:31:38.01#ibcon#*after write, iclass 36, count 2 2006.229.21:31:38.01#ibcon#*before return 0, iclass 36, count 2 2006.229.21:31:38.01#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:38.01#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.21:31:38.01#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.21:31:38.01#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:38.01#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:38.13#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:38.13#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:38.13#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:31:38.13#ibcon#first serial, iclass 36, count 0 2006.229.21:31:38.13#ibcon#enter sib2, iclass 36, count 0 2006.229.21:31:38.13#ibcon#flushed, iclass 36, count 0 2006.229.21:31:38.13#ibcon#about to write, iclass 36, count 0 2006.229.21:31:38.13#ibcon#wrote, iclass 36, count 0 2006.229.21:31:38.13#ibcon#about to read 3, iclass 36, count 0 2006.229.21:31:38.15#ibcon#read 3, iclass 36, count 0 2006.229.21:31:38.15#ibcon#about to read 4, iclass 36, count 0 2006.229.21:31:38.15#ibcon#read 4, iclass 36, count 0 2006.229.21:31:38.15#ibcon#about to read 5, iclass 36, count 0 2006.229.21:31:38.15#ibcon#read 5, iclass 36, count 0 2006.229.21:31:38.15#ibcon#about to read 6, iclass 36, count 0 2006.229.21:31:38.15#ibcon#read 6, iclass 36, count 0 2006.229.21:31:38.15#ibcon#end of sib2, iclass 36, count 0 2006.229.21:31:38.15#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:31:38.15#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:31:38.15#ibcon#[27=USB\r\n] 2006.229.21:31:38.15#ibcon#*before write, iclass 36, count 0 2006.229.21:31:38.15#ibcon#enter sib2, iclass 36, count 0 2006.229.21:31:38.15#ibcon#flushed, iclass 36, count 0 2006.229.21:31:38.15#ibcon#about to write, iclass 36, count 0 2006.229.21:31:38.15#ibcon#wrote, iclass 36, count 0 2006.229.21:31:38.15#ibcon#about to read 3, iclass 36, count 0 2006.229.21:31:38.18#ibcon#read 3, iclass 36, count 0 2006.229.21:31:38.18#ibcon#about to read 4, iclass 36, count 0 2006.229.21:31:38.18#ibcon#read 4, iclass 36, count 0 2006.229.21:31:38.18#ibcon#about to read 5, iclass 36, count 0 2006.229.21:31:38.18#ibcon#read 5, iclass 36, count 0 2006.229.21:31:38.18#ibcon#about to read 6, iclass 36, count 0 2006.229.21:31:38.18#ibcon#read 6, iclass 36, count 0 2006.229.21:31:38.18#ibcon#end of sib2, iclass 36, count 0 2006.229.21:31:38.18#ibcon#*after write, iclass 36, count 0 2006.229.21:31:38.18#ibcon#*before return 0, iclass 36, count 0 2006.229.21:31:38.18#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:38.18#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.21:31:38.18#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:31:38.18#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:31:38.18$vck44/vblo=5,709.99 2006.229.21:31:38.18#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.21:31:38.18#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.21:31:38.18#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:38.18#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:38.18#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:38.18#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:38.18#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:31:38.18#ibcon#first serial, iclass 38, count 0 2006.229.21:31:38.18#ibcon#enter sib2, iclass 38, count 0 2006.229.21:31:38.18#ibcon#flushed, iclass 38, count 0 2006.229.21:31:38.18#ibcon#about to write, iclass 38, count 0 2006.229.21:31:38.18#ibcon#wrote, iclass 38, count 0 2006.229.21:31:38.18#ibcon#about to read 3, iclass 38, count 0 2006.229.21:31:38.20#ibcon#read 3, iclass 38, count 0 2006.229.21:31:38.20#ibcon#about to read 4, iclass 38, count 0 2006.229.21:31:38.20#ibcon#read 4, iclass 38, count 0 2006.229.21:31:38.20#ibcon#about to read 5, iclass 38, count 0 2006.229.21:31:38.20#ibcon#read 5, iclass 38, count 0 2006.229.21:31:38.20#ibcon#about to read 6, iclass 38, count 0 2006.229.21:31:38.20#ibcon#read 6, iclass 38, count 0 2006.229.21:31:38.20#ibcon#end of sib2, iclass 38, count 0 2006.229.21:31:38.20#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:31:38.20#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:31:38.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:31:38.20#ibcon#*before write, iclass 38, count 0 2006.229.21:31:38.20#ibcon#enter sib2, iclass 38, count 0 2006.229.21:31:38.20#ibcon#flushed, iclass 38, count 0 2006.229.21:31:38.20#ibcon#about to write, iclass 38, count 0 2006.229.21:31:38.20#ibcon#wrote, iclass 38, count 0 2006.229.21:31:38.20#ibcon#about to read 3, iclass 38, count 0 2006.229.21:31:38.24#ibcon#read 3, iclass 38, count 0 2006.229.21:31:38.24#ibcon#about to read 4, iclass 38, count 0 2006.229.21:31:38.24#ibcon#read 4, iclass 38, count 0 2006.229.21:31:38.24#ibcon#about to read 5, iclass 38, count 0 2006.229.21:31:38.24#ibcon#read 5, iclass 38, count 0 2006.229.21:31:38.24#ibcon#about to read 6, iclass 38, count 0 2006.229.21:31:38.24#ibcon#read 6, iclass 38, count 0 2006.229.21:31:38.24#ibcon#end of sib2, iclass 38, count 0 2006.229.21:31:38.24#ibcon#*after write, iclass 38, count 0 2006.229.21:31:38.24#ibcon#*before return 0, iclass 38, count 0 2006.229.21:31:38.24#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:38.24#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.21:31:38.24#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:31:38.24#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:31:38.24$vck44/vb=5,4 2006.229.21:31:38.24#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.21:31:38.24#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.21:31:38.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:38.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:38.30#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:38.30#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:38.30#ibcon#enter wrdev, iclass 40, count 2 2006.229.21:31:38.30#ibcon#first serial, iclass 40, count 2 2006.229.21:31:38.30#ibcon#enter sib2, iclass 40, count 2 2006.229.21:31:38.30#ibcon#flushed, iclass 40, count 2 2006.229.21:31:38.30#ibcon#about to write, iclass 40, count 2 2006.229.21:31:38.30#ibcon#wrote, iclass 40, count 2 2006.229.21:31:38.30#ibcon#about to read 3, iclass 40, count 2 2006.229.21:31:38.32#ibcon#read 3, iclass 40, count 2 2006.229.21:31:38.32#ibcon#about to read 4, iclass 40, count 2 2006.229.21:31:38.32#ibcon#read 4, iclass 40, count 2 2006.229.21:31:38.32#ibcon#about to read 5, iclass 40, count 2 2006.229.21:31:38.32#ibcon#read 5, iclass 40, count 2 2006.229.21:31:38.32#ibcon#about to read 6, iclass 40, count 2 2006.229.21:31:38.32#ibcon#read 6, iclass 40, count 2 2006.229.21:31:38.32#ibcon#end of sib2, iclass 40, count 2 2006.229.21:31:38.32#ibcon#*mode == 0, iclass 40, count 2 2006.229.21:31:38.32#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.21:31:38.32#ibcon#[27=AT05-04\r\n] 2006.229.21:31:38.32#ibcon#*before write, iclass 40, count 2 2006.229.21:31:38.32#ibcon#enter sib2, iclass 40, count 2 2006.229.21:31:38.32#ibcon#flushed, iclass 40, count 2 2006.229.21:31:38.32#ibcon#about to write, iclass 40, count 2 2006.229.21:31:38.32#ibcon#wrote, iclass 40, count 2 2006.229.21:31:38.32#ibcon#about to read 3, iclass 40, count 2 2006.229.21:31:38.35#ibcon#read 3, iclass 40, count 2 2006.229.21:31:38.35#ibcon#about to read 4, iclass 40, count 2 2006.229.21:31:38.35#ibcon#read 4, iclass 40, count 2 2006.229.21:31:38.35#ibcon#about to read 5, iclass 40, count 2 2006.229.21:31:38.35#ibcon#read 5, iclass 40, count 2 2006.229.21:31:38.35#ibcon#about to read 6, iclass 40, count 2 2006.229.21:31:38.35#ibcon#read 6, iclass 40, count 2 2006.229.21:31:38.35#ibcon#end of sib2, iclass 40, count 2 2006.229.21:31:38.35#ibcon#*after write, iclass 40, count 2 2006.229.21:31:38.35#ibcon#*before return 0, iclass 40, count 2 2006.229.21:31:38.35#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:38.35#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.21:31:38.35#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.21:31:38.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:38.35#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:38.47#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:38.47#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:38.47#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:31:38.47#ibcon#first serial, iclass 40, count 0 2006.229.21:31:38.47#ibcon#enter sib2, iclass 40, count 0 2006.229.21:31:38.47#ibcon#flushed, iclass 40, count 0 2006.229.21:31:38.47#ibcon#about to write, iclass 40, count 0 2006.229.21:31:38.47#ibcon#wrote, iclass 40, count 0 2006.229.21:31:38.47#ibcon#about to read 3, iclass 40, count 0 2006.229.21:31:38.49#ibcon#read 3, iclass 40, count 0 2006.229.21:31:38.49#ibcon#about to read 4, iclass 40, count 0 2006.229.21:31:38.49#ibcon#read 4, iclass 40, count 0 2006.229.21:31:38.49#ibcon#about to read 5, iclass 40, count 0 2006.229.21:31:38.49#ibcon#read 5, iclass 40, count 0 2006.229.21:31:38.49#ibcon#about to read 6, iclass 40, count 0 2006.229.21:31:38.49#ibcon#read 6, iclass 40, count 0 2006.229.21:31:38.49#ibcon#end of sib2, iclass 40, count 0 2006.229.21:31:38.49#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:31:38.49#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:31:38.49#ibcon#[27=USB\r\n] 2006.229.21:31:38.49#ibcon#*before write, iclass 40, count 0 2006.229.21:31:38.49#ibcon#enter sib2, iclass 40, count 0 2006.229.21:31:38.49#ibcon#flushed, iclass 40, count 0 2006.229.21:31:38.49#ibcon#about to write, iclass 40, count 0 2006.229.21:31:38.49#ibcon#wrote, iclass 40, count 0 2006.229.21:31:38.49#ibcon#about to read 3, iclass 40, count 0 2006.229.21:31:38.52#ibcon#read 3, iclass 40, count 0 2006.229.21:31:38.52#ibcon#about to read 4, iclass 40, count 0 2006.229.21:31:38.52#ibcon#read 4, iclass 40, count 0 2006.229.21:31:38.52#ibcon#about to read 5, iclass 40, count 0 2006.229.21:31:38.52#ibcon#read 5, iclass 40, count 0 2006.229.21:31:38.52#ibcon#about to read 6, iclass 40, count 0 2006.229.21:31:38.52#ibcon#read 6, iclass 40, count 0 2006.229.21:31:38.52#ibcon#end of sib2, iclass 40, count 0 2006.229.21:31:38.52#ibcon#*after write, iclass 40, count 0 2006.229.21:31:38.52#ibcon#*before return 0, iclass 40, count 0 2006.229.21:31:38.52#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:38.52#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.21:31:38.52#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:31:38.52#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:31:38.52$vck44/vblo=6,719.99 2006.229.21:31:38.52#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.21:31:38.52#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.21:31:38.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:38.52#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:38.52#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:38.52#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:38.52#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:31:38.52#ibcon#first serial, iclass 4, count 0 2006.229.21:31:38.52#ibcon#enter sib2, iclass 4, count 0 2006.229.21:31:38.52#ibcon#flushed, iclass 4, count 0 2006.229.21:31:38.52#ibcon#about to write, iclass 4, count 0 2006.229.21:31:38.52#ibcon#wrote, iclass 4, count 0 2006.229.21:31:38.52#ibcon#about to read 3, iclass 4, count 0 2006.229.21:31:38.54#ibcon#read 3, iclass 4, count 0 2006.229.21:31:38.54#ibcon#about to read 4, iclass 4, count 0 2006.229.21:31:38.54#ibcon#read 4, iclass 4, count 0 2006.229.21:31:38.54#ibcon#about to read 5, iclass 4, count 0 2006.229.21:31:38.54#ibcon#read 5, iclass 4, count 0 2006.229.21:31:38.54#ibcon#about to read 6, iclass 4, count 0 2006.229.21:31:38.54#ibcon#read 6, iclass 4, count 0 2006.229.21:31:38.54#ibcon#end of sib2, iclass 4, count 0 2006.229.21:31:38.54#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:31:38.54#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:31:38.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:31:38.54#ibcon#*before write, iclass 4, count 0 2006.229.21:31:38.54#ibcon#enter sib2, iclass 4, count 0 2006.229.21:31:38.54#ibcon#flushed, iclass 4, count 0 2006.229.21:31:38.54#ibcon#about to write, iclass 4, count 0 2006.229.21:31:38.54#ibcon#wrote, iclass 4, count 0 2006.229.21:31:38.54#ibcon#about to read 3, iclass 4, count 0 2006.229.21:31:38.58#ibcon#read 3, iclass 4, count 0 2006.229.21:31:38.58#ibcon#about to read 4, iclass 4, count 0 2006.229.21:31:38.58#ibcon#read 4, iclass 4, count 0 2006.229.21:31:38.58#ibcon#about to read 5, iclass 4, count 0 2006.229.21:31:38.58#ibcon#read 5, iclass 4, count 0 2006.229.21:31:38.58#ibcon#about to read 6, iclass 4, count 0 2006.229.21:31:38.58#ibcon#read 6, iclass 4, count 0 2006.229.21:31:38.58#ibcon#end of sib2, iclass 4, count 0 2006.229.21:31:38.58#ibcon#*after write, iclass 4, count 0 2006.229.21:31:38.58#ibcon#*before return 0, iclass 4, count 0 2006.229.21:31:38.58#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:38.58#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.21:31:38.58#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:31:38.58#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:31:38.58$vck44/vb=6,4 2006.229.21:31:38.58#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.21:31:38.58#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.21:31:38.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:38.58#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:38.64#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:38.64#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:38.64#ibcon#enter wrdev, iclass 6, count 2 2006.229.21:31:38.64#ibcon#first serial, iclass 6, count 2 2006.229.21:31:38.64#ibcon#enter sib2, iclass 6, count 2 2006.229.21:31:38.64#ibcon#flushed, iclass 6, count 2 2006.229.21:31:38.64#ibcon#about to write, iclass 6, count 2 2006.229.21:31:38.64#ibcon#wrote, iclass 6, count 2 2006.229.21:31:38.64#ibcon#about to read 3, iclass 6, count 2 2006.229.21:31:38.66#ibcon#read 3, iclass 6, count 2 2006.229.21:31:38.66#ibcon#about to read 4, iclass 6, count 2 2006.229.21:31:38.66#ibcon#read 4, iclass 6, count 2 2006.229.21:31:38.66#ibcon#about to read 5, iclass 6, count 2 2006.229.21:31:38.66#ibcon#read 5, iclass 6, count 2 2006.229.21:31:38.66#ibcon#about to read 6, iclass 6, count 2 2006.229.21:31:38.66#ibcon#read 6, iclass 6, count 2 2006.229.21:31:38.66#ibcon#end of sib2, iclass 6, count 2 2006.229.21:31:38.66#ibcon#*mode == 0, iclass 6, count 2 2006.229.21:31:38.66#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.21:31:38.66#ibcon#[27=AT06-04\r\n] 2006.229.21:31:38.66#ibcon#*before write, iclass 6, count 2 2006.229.21:31:38.66#ibcon#enter sib2, iclass 6, count 2 2006.229.21:31:38.66#ibcon#flushed, iclass 6, count 2 2006.229.21:31:38.66#ibcon#about to write, iclass 6, count 2 2006.229.21:31:38.66#ibcon#wrote, iclass 6, count 2 2006.229.21:31:38.66#ibcon#about to read 3, iclass 6, count 2 2006.229.21:31:38.69#ibcon#read 3, iclass 6, count 2 2006.229.21:31:38.69#ibcon#about to read 4, iclass 6, count 2 2006.229.21:31:38.69#ibcon#read 4, iclass 6, count 2 2006.229.21:31:38.69#ibcon#about to read 5, iclass 6, count 2 2006.229.21:31:38.69#ibcon#read 5, iclass 6, count 2 2006.229.21:31:38.69#ibcon#about to read 6, iclass 6, count 2 2006.229.21:31:38.69#ibcon#read 6, iclass 6, count 2 2006.229.21:31:38.69#ibcon#end of sib2, iclass 6, count 2 2006.229.21:31:38.69#ibcon#*after write, iclass 6, count 2 2006.229.21:31:38.69#ibcon#*before return 0, iclass 6, count 2 2006.229.21:31:38.69#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:38.69#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.21:31:38.69#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.21:31:38.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:38.69#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:38.81#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:38.81#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:38.81#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:31:38.81#ibcon#first serial, iclass 6, count 0 2006.229.21:31:38.81#ibcon#enter sib2, iclass 6, count 0 2006.229.21:31:38.81#ibcon#flushed, iclass 6, count 0 2006.229.21:31:38.81#ibcon#about to write, iclass 6, count 0 2006.229.21:31:38.81#ibcon#wrote, iclass 6, count 0 2006.229.21:31:38.81#ibcon#about to read 3, iclass 6, count 0 2006.229.21:31:38.83#ibcon#read 3, iclass 6, count 0 2006.229.21:31:38.83#ibcon#about to read 4, iclass 6, count 0 2006.229.21:31:38.83#ibcon#read 4, iclass 6, count 0 2006.229.21:31:38.83#ibcon#about to read 5, iclass 6, count 0 2006.229.21:31:38.83#ibcon#read 5, iclass 6, count 0 2006.229.21:31:38.83#ibcon#about to read 6, iclass 6, count 0 2006.229.21:31:38.83#ibcon#read 6, iclass 6, count 0 2006.229.21:31:38.83#ibcon#end of sib2, iclass 6, count 0 2006.229.21:31:38.83#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:31:38.83#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:31:38.83#ibcon#[27=USB\r\n] 2006.229.21:31:38.83#ibcon#*before write, iclass 6, count 0 2006.229.21:31:38.83#ibcon#enter sib2, iclass 6, count 0 2006.229.21:31:38.83#ibcon#flushed, iclass 6, count 0 2006.229.21:31:38.83#ibcon#about to write, iclass 6, count 0 2006.229.21:31:38.83#ibcon#wrote, iclass 6, count 0 2006.229.21:31:38.83#ibcon#about to read 3, iclass 6, count 0 2006.229.21:31:38.86#ibcon#read 3, iclass 6, count 0 2006.229.21:31:38.86#ibcon#about to read 4, iclass 6, count 0 2006.229.21:31:38.86#ibcon#read 4, iclass 6, count 0 2006.229.21:31:38.86#ibcon#about to read 5, iclass 6, count 0 2006.229.21:31:38.86#ibcon#read 5, iclass 6, count 0 2006.229.21:31:38.86#ibcon#about to read 6, iclass 6, count 0 2006.229.21:31:38.86#ibcon#read 6, iclass 6, count 0 2006.229.21:31:38.86#ibcon#end of sib2, iclass 6, count 0 2006.229.21:31:38.86#ibcon#*after write, iclass 6, count 0 2006.229.21:31:38.86#ibcon#*before return 0, iclass 6, count 0 2006.229.21:31:38.86#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:38.86#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.21:31:38.86#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:31:38.86#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:31:38.86$vck44/vblo=7,734.99 2006.229.21:31:38.86#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.21:31:38.86#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.21:31:38.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:38.86#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:38.86#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:38.86#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:38.86#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:31:38.86#ibcon#first serial, iclass 10, count 0 2006.229.21:31:38.86#ibcon#enter sib2, iclass 10, count 0 2006.229.21:31:38.86#ibcon#flushed, iclass 10, count 0 2006.229.21:31:38.86#ibcon#about to write, iclass 10, count 0 2006.229.21:31:38.86#ibcon#wrote, iclass 10, count 0 2006.229.21:31:38.86#ibcon#about to read 3, iclass 10, count 0 2006.229.21:31:38.88#ibcon#read 3, iclass 10, count 0 2006.229.21:31:38.88#ibcon#about to read 4, iclass 10, count 0 2006.229.21:31:38.88#ibcon#read 4, iclass 10, count 0 2006.229.21:31:38.88#ibcon#about to read 5, iclass 10, count 0 2006.229.21:31:38.88#ibcon#read 5, iclass 10, count 0 2006.229.21:31:38.88#ibcon#about to read 6, iclass 10, count 0 2006.229.21:31:38.88#ibcon#read 6, iclass 10, count 0 2006.229.21:31:38.88#ibcon#end of sib2, iclass 10, count 0 2006.229.21:31:38.88#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:31:38.88#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:31:38.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:31:38.88#ibcon#*before write, iclass 10, count 0 2006.229.21:31:38.88#ibcon#enter sib2, iclass 10, count 0 2006.229.21:31:38.88#ibcon#flushed, iclass 10, count 0 2006.229.21:31:38.88#ibcon#about to write, iclass 10, count 0 2006.229.21:31:38.88#ibcon#wrote, iclass 10, count 0 2006.229.21:31:38.88#ibcon#about to read 3, iclass 10, count 0 2006.229.21:31:38.92#ibcon#read 3, iclass 10, count 0 2006.229.21:31:38.92#ibcon#about to read 4, iclass 10, count 0 2006.229.21:31:38.92#ibcon#read 4, iclass 10, count 0 2006.229.21:31:38.92#ibcon#about to read 5, iclass 10, count 0 2006.229.21:31:38.92#ibcon#read 5, iclass 10, count 0 2006.229.21:31:38.92#ibcon#about to read 6, iclass 10, count 0 2006.229.21:31:38.92#ibcon#read 6, iclass 10, count 0 2006.229.21:31:38.92#ibcon#end of sib2, iclass 10, count 0 2006.229.21:31:38.92#ibcon#*after write, iclass 10, count 0 2006.229.21:31:38.92#ibcon#*before return 0, iclass 10, count 0 2006.229.21:31:38.92#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:38.92#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.21:31:38.92#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:31:38.92#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:31:38.92$vck44/vb=7,4 2006.229.21:31:38.92#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.21:31:38.92#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.21:31:38.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:38.92#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:38.98#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:38.98#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:38.98#ibcon#enter wrdev, iclass 12, count 2 2006.229.21:31:38.98#ibcon#first serial, iclass 12, count 2 2006.229.21:31:38.98#ibcon#enter sib2, iclass 12, count 2 2006.229.21:31:38.98#ibcon#flushed, iclass 12, count 2 2006.229.21:31:38.98#ibcon#about to write, iclass 12, count 2 2006.229.21:31:38.98#ibcon#wrote, iclass 12, count 2 2006.229.21:31:38.98#ibcon#about to read 3, iclass 12, count 2 2006.229.21:31:39.00#ibcon#read 3, iclass 12, count 2 2006.229.21:31:39.00#ibcon#about to read 4, iclass 12, count 2 2006.229.21:31:39.00#ibcon#read 4, iclass 12, count 2 2006.229.21:31:39.00#ibcon#about to read 5, iclass 12, count 2 2006.229.21:31:39.00#ibcon#read 5, iclass 12, count 2 2006.229.21:31:39.00#ibcon#about to read 6, iclass 12, count 2 2006.229.21:31:39.00#ibcon#read 6, iclass 12, count 2 2006.229.21:31:39.00#ibcon#end of sib2, iclass 12, count 2 2006.229.21:31:39.00#ibcon#*mode == 0, iclass 12, count 2 2006.229.21:31:39.00#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.21:31:39.00#ibcon#[27=AT07-04\r\n] 2006.229.21:31:39.00#ibcon#*before write, iclass 12, count 2 2006.229.21:31:39.00#ibcon#enter sib2, iclass 12, count 2 2006.229.21:31:39.00#ibcon#flushed, iclass 12, count 2 2006.229.21:31:39.00#ibcon#about to write, iclass 12, count 2 2006.229.21:31:39.00#ibcon#wrote, iclass 12, count 2 2006.229.21:31:39.00#ibcon#about to read 3, iclass 12, count 2 2006.229.21:31:39.03#ibcon#read 3, iclass 12, count 2 2006.229.21:31:39.03#ibcon#about to read 4, iclass 12, count 2 2006.229.21:31:39.03#ibcon#read 4, iclass 12, count 2 2006.229.21:31:39.03#ibcon#about to read 5, iclass 12, count 2 2006.229.21:31:39.03#ibcon#read 5, iclass 12, count 2 2006.229.21:31:39.03#ibcon#about to read 6, iclass 12, count 2 2006.229.21:31:39.03#ibcon#read 6, iclass 12, count 2 2006.229.21:31:39.03#ibcon#end of sib2, iclass 12, count 2 2006.229.21:31:39.03#ibcon#*after write, iclass 12, count 2 2006.229.21:31:39.03#ibcon#*before return 0, iclass 12, count 2 2006.229.21:31:39.03#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:39.03#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.21:31:39.03#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.21:31:39.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:39.03#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:39.15#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:39.15#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:39.15#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:31:39.15#ibcon#first serial, iclass 12, count 0 2006.229.21:31:39.15#ibcon#enter sib2, iclass 12, count 0 2006.229.21:31:39.15#ibcon#flushed, iclass 12, count 0 2006.229.21:31:39.15#ibcon#about to write, iclass 12, count 0 2006.229.21:31:39.15#ibcon#wrote, iclass 12, count 0 2006.229.21:31:39.15#ibcon#about to read 3, iclass 12, count 0 2006.229.21:31:39.17#ibcon#read 3, iclass 12, count 0 2006.229.21:31:39.17#ibcon#about to read 4, iclass 12, count 0 2006.229.21:31:39.17#ibcon#read 4, iclass 12, count 0 2006.229.21:31:39.17#ibcon#about to read 5, iclass 12, count 0 2006.229.21:31:39.17#ibcon#read 5, iclass 12, count 0 2006.229.21:31:39.17#ibcon#about to read 6, iclass 12, count 0 2006.229.21:31:39.17#ibcon#read 6, iclass 12, count 0 2006.229.21:31:39.17#ibcon#end of sib2, iclass 12, count 0 2006.229.21:31:39.17#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:31:39.17#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:31:39.17#ibcon#[27=USB\r\n] 2006.229.21:31:39.17#ibcon#*before write, iclass 12, count 0 2006.229.21:31:39.17#ibcon#enter sib2, iclass 12, count 0 2006.229.21:31:39.17#ibcon#flushed, iclass 12, count 0 2006.229.21:31:39.17#ibcon#about to write, iclass 12, count 0 2006.229.21:31:39.17#ibcon#wrote, iclass 12, count 0 2006.229.21:31:39.17#ibcon#about to read 3, iclass 12, count 0 2006.229.21:31:39.20#ibcon#read 3, iclass 12, count 0 2006.229.21:31:39.20#ibcon#about to read 4, iclass 12, count 0 2006.229.21:31:39.20#ibcon#read 4, iclass 12, count 0 2006.229.21:31:39.20#ibcon#about to read 5, iclass 12, count 0 2006.229.21:31:39.20#ibcon#read 5, iclass 12, count 0 2006.229.21:31:39.20#ibcon#about to read 6, iclass 12, count 0 2006.229.21:31:39.20#ibcon#read 6, iclass 12, count 0 2006.229.21:31:39.20#ibcon#end of sib2, iclass 12, count 0 2006.229.21:31:39.20#ibcon#*after write, iclass 12, count 0 2006.229.21:31:39.20#ibcon#*before return 0, iclass 12, count 0 2006.229.21:31:39.20#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:39.20#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.21:31:39.20#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:31:39.20#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:31:39.20$vck44/vblo=8,744.99 2006.229.21:31:39.20#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.21:31:39.20#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.21:31:39.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:31:39.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:39.20#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:39.20#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:39.20#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:31:39.20#ibcon#first serial, iclass 14, count 0 2006.229.21:31:39.20#ibcon#enter sib2, iclass 14, count 0 2006.229.21:31:39.20#ibcon#flushed, iclass 14, count 0 2006.229.21:31:39.20#ibcon#about to write, iclass 14, count 0 2006.229.21:31:39.20#ibcon#wrote, iclass 14, count 0 2006.229.21:31:39.20#ibcon#about to read 3, iclass 14, count 0 2006.229.21:31:39.22#ibcon#read 3, iclass 14, count 0 2006.229.21:31:39.22#ibcon#about to read 4, iclass 14, count 0 2006.229.21:31:39.22#ibcon#read 4, iclass 14, count 0 2006.229.21:31:39.22#ibcon#about to read 5, iclass 14, count 0 2006.229.21:31:39.22#ibcon#read 5, iclass 14, count 0 2006.229.21:31:39.22#ibcon#about to read 6, iclass 14, count 0 2006.229.21:31:39.22#ibcon#read 6, iclass 14, count 0 2006.229.21:31:39.22#ibcon#end of sib2, iclass 14, count 0 2006.229.21:31:39.22#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:31:39.22#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:31:39.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:31:39.22#ibcon#*before write, iclass 14, count 0 2006.229.21:31:39.22#ibcon#enter sib2, iclass 14, count 0 2006.229.21:31:39.22#ibcon#flushed, iclass 14, count 0 2006.229.21:31:39.22#ibcon#about to write, iclass 14, count 0 2006.229.21:31:39.22#ibcon#wrote, iclass 14, count 0 2006.229.21:31:39.22#ibcon#about to read 3, iclass 14, count 0 2006.229.21:31:39.26#ibcon#read 3, iclass 14, count 0 2006.229.21:31:39.26#ibcon#about to read 4, iclass 14, count 0 2006.229.21:31:39.26#ibcon#read 4, iclass 14, count 0 2006.229.21:31:39.26#ibcon#about to read 5, iclass 14, count 0 2006.229.21:31:39.26#ibcon#read 5, iclass 14, count 0 2006.229.21:31:39.26#ibcon#about to read 6, iclass 14, count 0 2006.229.21:31:39.26#ibcon#read 6, iclass 14, count 0 2006.229.21:31:39.26#ibcon#end of sib2, iclass 14, count 0 2006.229.21:31:39.26#ibcon#*after write, iclass 14, count 0 2006.229.21:31:39.26#ibcon#*before return 0, iclass 14, count 0 2006.229.21:31:39.26#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:39.26#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.21:31:39.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:31:39.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:31:39.26$vck44/vb=8,4 2006.229.21:31:39.26#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.21:31:39.26#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.21:31:39.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:31:39.26#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:39.32#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:39.32#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:39.32#ibcon#enter wrdev, iclass 16, count 2 2006.229.21:31:39.32#ibcon#first serial, iclass 16, count 2 2006.229.21:31:39.32#ibcon#enter sib2, iclass 16, count 2 2006.229.21:31:39.32#ibcon#flushed, iclass 16, count 2 2006.229.21:31:39.32#ibcon#about to write, iclass 16, count 2 2006.229.21:31:39.32#ibcon#wrote, iclass 16, count 2 2006.229.21:31:39.32#ibcon#about to read 3, iclass 16, count 2 2006.229.21:31:39.34#ibcon#read 3, iclass 16, count 2 2006.229.21:31:39.34#ibcon#about to read 4, iclass 16, count 2 2006.229.21:31:39.34#ibcon#read 4, iclass 16, count 2 2006.229.21:31:39.34#ibcon#about to read 5, iclass 16, count 2 2006.229.21:31:39.34#ibcon#read 5, iclass 16, count 2 2006.229.21:31:39.34#ibcon#about to read 6, iclass 16, count 2 2006.229.21:31:39.34#ibcon#read 6, iclass 16, count 2 2006.229.21:31:39.34#ibcon#end of sib2, iclass 16, count 2 2006.229.21:31:39.34#ibcon#*mode == 0, iclass 16, count 2 2006.229.21:31:39.34#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.21:31:39.34#ibcon#[27=AT08-04\r\n] 2006.229.21:31:39.34#ibcon#*before write, iclass 16, count 2 2006.229.21:31:39.34#ibcon#enter sib2, iclass 16, count 2 2006.229.21:31:39.34#ibcon#flushed, iclass 16, count 2 2006.229.21:31:39.34#ibcon#about to write, iclass 16, count 2 2006.229.21:31:39.34#ibcon#wrote, iclass 16, count 2 2006.229.21:31:39.34#ibcon#about to read 3, iclass 16, count 2 2006.229.21:31:39.37#ibcon#read 3, iclass 16, count 2 2006.229.21:31:39.37#ibcon#about to read 4, iclass 16, count 2 2006.229.21:31:39.37#ibcon#read 4, iclass 16, count 2 2006.229.21:31:39.37#ibcon#about to read 5, iclass 16, count 2 2006.229.21:31:39.37#ibcon#read 5, iclass 16, count 2 2006.229.21:31:39.37#ibcon#about to read 6, iclass 16, count 2 2006.229.21:31:39.37#ibcon#read 6, iclass 16, count 2 2006.229.21:31:39.37#ibcon#end of sib2, iclass 16, count 2 2006.229.21:31:39.37#ibcon#*after write, iclass 16, count 2 2006.229.21:31:39.37#ibcon#*before return 0, iclass 16, count 2 2006.229.21:31:39.37#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:39.37#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.21:31:39.37#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.21:31:39.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:31:39.37#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:39.49#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:39.49#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:39.49#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:31:39.49#ibcon#first serial, iclass 16, count 0 2006.229.21:31:39.49#ibcon#enter sib2, iclass 16, count 0 2006.229.21:31:39.49#ibcon#flushed, iclass 16, count 0 2006.229.21:31:39.49#ibcon#about to write, iclass 16, count 0 2006.229.21:31:39.49#ibcon#wrote, iclass 16, count 0 2006.229.21:31:39.49#ibcon#about to read 3, iclass 16, count 0 2006.229.21:31:39.51#ibcon#read 3, iclass 16, count 0 2006.229.21:31:39.51#ibcon#about to read 4, iclass 16, count 0 2006.229.21:31:39.51#ibcon#read 4, iclass 16, count 0 2006.229.21:31:39.51#ibcon#about to read 5, iclass 16, count 0 2006.229.21:31:39.51#ibcon#read 5, iclass 16, count 0 2006.229.21:31:39.51#ibcon#about to read 6, iclass 16, count 0 2006.229.21:31:39.51#ibcon#read 6, iclass 16, count 0 2006.229.21:31:39.51#ibcon#end of sib2, iclass 16, count 0 2006.229.21:31:39.51#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:31:39.51#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:31:39.51#ibcon#[27=USB\r\n] 2006.229.21:31:39.51#ibcon#*before write, iclass 16, count 0 2006.229.21:31:39.51#ibcon#enter sib2, iclass 16, count 0 2006.229.21:31:39.51#ibcon#flushed, iclass 16, count 0 2006.229.21:31:39.51#ibcon#about to write, iclass 16, count 0 2006.229.21:31:39.51#ibcon#wrote, iclass 16, count 0 2006.229.21:31:39.51#ibcon#about to read 3, iclass 16, count 0 2006.229.21:31:39.54#ibcon#read 3, iclass 16, count 0 2006.229.21:31:39.54#ibcon#about to read 4, iclass 16, count 0 2006.229.21:31:39.54#ibcon#read 4, iclass 16, count 0 2006.229.21:31:39.54#ibcon#about to read 5, iclass 16, count 0 2006.229.21:31:39.54#ibcon#read 5, iclass 16, count 0 2006.229.21:31:39.54#ibcon#about to read 6, iclass 16, count 0 2006.229.21:31:39.54#ibcon#read 6, iclass 16, count 0 2006.229.21:31:39.54#ibcon#end of sib2, iclass 16, count 0 2006.229.21:31:39.54#ibcon#*after write, iclass 16, count 0 2006.229.21:31:39.54#ibcon#*before return 0, iclass 16, count 0 2006.229.21:31:39.54#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:39.54#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.21:31:39.54#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:31:39.54#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:31:39.54$vck44/vabw=wide 2006.229.21:31:39.54#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.21:31:39.54#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.21:31:39.54#ibcon#ireg 8 cls_cnt 0 2006.229.21:31:39.54#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:39.54#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:39.54#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:39.54#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:31:39.54#ibcon#first serial, iclass 18, count 0 2006.229.21:31:39.54#ibcon#enter sib2, iclass 18, count 0 2006.229.21:31:39.54#ibcon#flushed, iclass 18, count 0 2006.229.21:31:39.54#ibcon#about to write, iclass 18, count 0 2006.229.21:31:39.54#ibcon#wrote, iclass 18, count 0 2006.229.21:31:39.54#ibcon#about to read 3, iclass 18, count 0 2006.229.21:31:39.56#ibcon#read 3, iclass 18, count 0 2006.229.21:31:39.56#ibcon#about to read 4, iclass 18, count 0 2006.229.21:31:39.56#ibcon#read 4, iclass 18, count 0 2006.229.21:31:39.56#ibcon#about to read 5, iclass 18, count 0 2006.229.21:31:39.56#ibcon#read 5, iclass 18, count 0 2006.229.21:31:39.56#ibcon#about to read 6, iclass 18, count 0 2006.229.21:31:39.56#ibcon#read 6, iclass 18, count 0 2006.229.21:31:39.56#ibcon#end of sib2, iclass 18, count 0 2006.229.21:31:39.56#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:31:39.56#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:31:39.56#ibcon#[25=BW32\r\n] 2006.229.21:31:39.56#ibcon#*before write, iclass 18, count 0 2006.229.21:31:39.56#ibcon#enter sib2, iclass 18, count 0 2006.229.21:31:39.56#ibcon#flushed, iclass 18, count 0 2006.229.21:31:39.56#ibcon#about to write, iclass 18, count 0 2006.229.21:31:39.56#ibcon#wrote, iclass 18, count 0 2006.229.21:31:39.56#ibcon#about to read 3, iclass 18, count 0 2006.229.21:31:39.59#ibcon#read 3, iclass 18, count 0 2006.229.21:31:39.59#ibcon#about to read 4, iclass 18, count 0 2006.229.21:31:39.59#ibcon#read 4, iclass 18, count 0 2006.229.21:31:39.59#ibcon#about to read 5, iclass 18, count 0 2006.229.21:31:39.59#ibcon#read 5, iclass 18, count 0 2006.229.21:31:39.59#ibcon#about to read 6, iclass 18, count 0 2006.229.21:31:39.59#ibcon#read 6, iclass 18, count 0 2006.229.21:31:39.59#ibcon#end of sib2, iclass 18, count 0 2006.229.21:31:39.59#ibcon#*after write, iclass 18, count 0 2006.229.21:31:39.59#ibcon#*before return 0, iclass 18, count 0 2006.229.21:31:39.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:39.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.21:31:39.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:31:39.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:31:39.59$vck44/vbbw=wide 2006.229.21:31:39.59#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:31:39.59#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:31:39.59#ibcon#ireg 8 cls_cnt 0 2006.229.21:31:39.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:31:39.66#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:31:39.66#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:31:39.66#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:31:39.66#ibcon#first serial, iclass 20, count 0 2006.229.21:31:39.66#ibcon#enter sib2, iclass 20, count 0 2006.229.21:31:39.66#ibcon#flushed, iclass 20, count 0 2006.229.21:31:39.66#ibcon#about to write, iclass 20, count 0 2006.229.21:31:39.66#ibcon#wrote, iclass 20, count 0 2006.229.21:31:39.66#ibcon#about to read 3, iclass 20, count 0 2006.229.21:31:39.68#ibcon#read 3, iclass 20, count 0 2006.229.21:31:39.68#ibcon#about to read 4, iclass 20, count 0 2006.229.21:31:39.68#ibcon#read 4, iclass 20, count 0 2006.229.21:31:39.68#ibcon#about to read 5, iclass 20, count 0 2006.229.21:31:39.68#ibcon#read 5, iclass 20, count 0 2006.229.21:31:39.68#ibcon#about to read 6, iclass 20, count 0 2006.229.21:31:39.68#ibcon#read 6, iclass 20, count 0 2006.229.21:31:39.68#ibcon#end of sib2, iclass 20, count 0 2006.229.21:31:39.68#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:31:39.68#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:31:39.68#ibcon#[27=BW32\r\n] 2006.229.21:31:39.68#ibcon#*before write, iclass 20, count 0 2006.229.21:31:39.68#ibcon#enter sib2, iclass 20, count 0 2006.229.21:31:39.68#ibcon#flushed, iclass 20, count 0 2006.229.21:31:39.68#ibcon#about to write, iclass 20, count 0 2006.229.21:31:39.68#ibcon#wrote, iclass 20, count 0 2006.229.21:31:39.68#ibcon#about to read 3, iclass 20, count 0 2006.229.21:31:39.71#ibcon#read 3, iclass 20, count 0 2006.229.21:31:39.71#ibcon#about to read 4, iclass 20, count 0 2006.229.21:31:39.71#ibcon#read 4, iclass 20, count 0 2006.229.21:31:39.71#ibcon#about to read 5, iclass 20, count 0 2006.229.21:31:39.71#ibcon#read 5, iclass 20, count 0 2006.229.21:31:39.71#ibcon#about to read 6, iclass 20, count 0 2006.229.21:31:39.71#ibcon#read 6, iclass 20, count 0 2006.229.21:31:39.71#ibcon#end of sib2, iclass 20, count 0 2006.229.21:31:39.71#ibcon#*after write, iclass 20, count 0 2006.229.21:31:39.71#ibcon#*before return 0, iclass 20, count 0 2006.229.21:31:39.71#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:31:39.71#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:31:39.71#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:31:39.71#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:31:39.71$setupk4/ifdk4 2006.229.21:31:39.71$ifdk4/lo= 2006.229.21:31:39.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:31:39.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:31:39.71$ifdk4/patch= 2006.229.21:31:39.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:31:39.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:31:39.72$setupk4/!*+20s 2006.229.21:31:39.87#abcon#<5=/08 1.3 3.7 27.091001002.1\r\n> 2006.229.21:31:39.89#abcon#{5=INTERFACE CLEAR} 2006.229.21:31:39.95#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:31:50.04#abcon#<5=/07 1.3 3.7 27.101001002.2\r\n> 2006.229.21:31:50.06#abcon#{5=INTERFACE CLEAR} 2006.229.21:31:50.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:31:52.14#trakl#Source acquired 2006.229.21:31:53.14#flagr#flagr/antenna,acquired 2006.229.21:31:54.23$setupk4/"tpicd 2006.229.21:31:54.23$setupk4/echo=off 2006.229.21:31:54.23$setupk4/xlog=off 2006.229.21:31:54.23:!2006.229.21:33:41 2006.229.21:33:41.00:preob 2006.229.21:33:42.14/onsource/TRACKING 2006.229.21:33:42.14:!2006.229.21:33:51 2006.229.21:33:51.00:"tape 2006.229.21:33:51.00:"st=record 2006.229.21:33:51.00:data_valid=on 2006.229.21:33:51.00:midob 2006.229.21:33:51.14/onsource/TRACKING 2006.229.21:33:51.14/wx/27.19,1002.2,100 2006.229.21:33:51.25/cable/+6.4212E-03 2006.229.21:33:52.34/va/01,08,usb,yes,34,36 2006.229.21:33:52.34/va/02,07,usb,yes,37,37 2006.229.21:33:52.34/va/03,06,usb,yes,45,48 2006.229.21:33:52.34/va/04,07,usb,yes,38,40 2006.229.21:33:52.34/va/05,04,usb,yes,34,34 2006.229.21:33:52.34/va/06,04,usb,yes,38,38 2006.229.21:33:52.34/va/07,05,usb,yes,34,34 2006.229.21:33:52.34/va/08,06,usb,yes,25,30 2006.229.21:33:52.57/valo/01,524.99,yes,locked 2006.229.21:33:52.57/valo/02,534.99,yes,locked 2006.229.21:33:52.57/valo/03,564.99,yes,locked 2006.229.21:33:52.57/valo/04,624.99,yes,locked 2006.229.21:33:52.57/valo/05,734.99,yes,locked 2006.229.21:33:52.57/valo/06,814.99,yes,locked 2006.229.21:33:52.57/valo/07,864.99,yes,locked 2006.229.21:33:52.57/valo/08,884.99,yes,locked 2006.229.21:33:53.66/vb/01,04,usb,yes,34,31 2006.229.21:33:53.66/vb/02,04,usb,yes,36,36 2006.229.21:33:53.66/vb/03,04,usb,yes,33,36 2006.229.21:33:53.66/vb/04,04,usb,yes,38,37 2006.229.21:33:53.66/vb/05,04,usb,yes,30,32 2006.229.21:33:53.66/vb/06,04,usb,yes,35,31 2006.229.21:33:53.66/vb/07,04,usb,yes,34,34 2006.229.21:33:53.66/vb/08,04,usb,yes,32,35 2006.229.21:33:53.90/vblo/01,629.99,yes,locked 2006.229.21:33:53.90/vblo/02,634.99,yes,locked 2006.229.21:33:53.90/vblo/03,649.99,yes,locked 2006.229.21:33:53.90/vblo/04,679.99,yes,locked 2006.229.21:33:53.90/vblo/05,709.99,yes,locked 2006.229.21:33:53.90/vblo/06,719.99,yes,locked 2006.229.21:33:53.90/vblo/07,734.99,yes,locked 2006.229.21:33:53.90/vblo/08,744.99,yes,locked 2006.229.21:33:54.05/vabw/8 2006.229.21:33:54.20/vbbw/8 2006.229.21:33:54.29/xfe/off,on,12.2 2006.229.21:33:54.66/ifatt/23,28,28,28 2006.229.21:33:55.07/fmout-gps/S +4.55E-07 2006.229.21:33:55.11:!2006.229.21:38:51 2006.229.21:38:51.01:data_valid=off 2006.229.21:38:51.01:"et 2006.229.21:38:51.01:!+3s 2006.229.21:38:54.02:"tape 2006.229.21:38:54.02:postob 2006.229.21:38:54.21/cable/+6.4211E-03 2006.229.21:38:54.21/wx/27.30,1002.2,99 2006.229.21:38:54.27/fmout-gps/S +4.55E-07 2006.229.21:38:54.27:scan_name=229-2140,jd0608,300 2006.229.21:38:54.27:source=1803+784,180045.68,782804.0,2000.0,neutral 2006.229.21:38:55.13#flagr#flagr/antenna,new-source 2006.229.21:38:55.13:checkk5 2006.229.21:38:55.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:38:55.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:38:56.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:38:56.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:38:57.15/chk_obsdata//k5ts1/T2292133??a.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:38:57.57/chk_obsdata//k5ts2/T2292133??b.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:38:57.98/chk_obsdata//k5ts3/T2292133??c.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:38:58.38/chk_obsdata//k5ts4/T2292133??d.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:38:59.08/k5log//k5ts1_log_newline 2006.229.21:38:59.78/k5log//k5ts2_log_newline 2006.229.21:39:00.50/k5log//k5ts3_log_newline 2006.229.21:39:01.21/k5log//k5ts4_log_newline 2006.229.21:39:01.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:39:01.23:setupk4=1 2006.229.21:39:01.23$setupk4/echo=on 2006.229.21:39:01.23$setupk4/pcalon 2006.229.21:39:01.23$pcalon/"no phase cal control is implemented here 2006.229.21:39:01.23$setupk4/"tpicd=stop 2006.229.21:39:01.23$setupk4/"rec=synch_on 2006.229.21:39:01.23$setupk4/"rec_mode=128 2006.229.21:39:01.23$setupk4/!* 2006.229.21:39:01.23$setupk4/recpk4 2006.229.21:39:01.23$recpk4/recpatch= 2006.229.21:39:01.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:39:01.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:39:01.23$setupk4/vck44 2006.229.21:39:01.23$vck44/valo=1,524.99 2006.229.21:39:01.23#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.21:39:01.23#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.21:39:01.23#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:01.23#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:01.23#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:01.23#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:01.23#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:39:01.23#ibcon#first serial, iclass 21, count 0 2006.229.21:39:01.23#ibcon#enter sib2, iclass 21, count 0 2006.229.21:39:01.23#ibcon#flushed, iclass 21, count 0 2006.229.21:39:01.23#ibcon#about to write, iclass 21, count 0 2006.229.21:39:01.23#ibcon#wrote, iclass 21, count 0 2006.229.21:39:01.23#ibcon#about to read 3, iclass 21, count 0 2006.229.21:39:01.25#ibcon#read 3, iclass 21, count 0 2006.229.21:39:01.25#ibcon#about to read 4, iclass 21, count 0 2006.229.21:39:01.25#ibcon#read 4, iclass 21, count 0 2006.229.21:39:01.25#ibcon#about to read 5, iclass 21, count 0 2006.229.21:39:01.25#ibcon#read 5, iclass 21, count 0 2006.229.21:39:01.25#ibcon#about to read 6, iclass 21, count 0 2006.229.21:39:01.25#ibcon#read 6, iclass 21, count 0 2006.229.21:39:01.25#ibcon#end of sib2, iclass 21, count 0 2006.229.21:39:01.25#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:39:01.25#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:39:01.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:39:01.25#ibcon#*before write, iclass 21, count 0 2006.229.21:39:01.25#ibcon#enter sib2, iclass 21, count 0 2006.229.21:39:01.25#ibcon#flushed, iclass 21, count 0 2006.229.21:39:01.25#ibcon#about to write, iclass 21, count 0 2006.229.21:39:01.25#ibcon#wrote, iclass 21, count 0 2006.229.21:39:01.25#ibcon#about to read 3, iclass 21, count 0 2006.229.21:39:01.30#ibcon#read 3, iclass 21, count 0 2006.229.21:39:01.30#ibcon#about to read 4, iclass 21, count 0 2006.229.21:39:01.30#ibcon#read 4, iclass 21, count 0 2006.229.21:39:01.30#ibcon#about to read 5, iclass 21, count 0 2006.229.21:39:01.30#ibcon#read 5, iclass 21, count 0 2006.229.21:39:01.30#ibcon#about to read 6, iclass 21, count 0 2006.229.21:39:01.30#ibcon#read 6, iclass 21, count 0 2006.229.21:39:01.30#ibcon#end of sib2, iclass 21, count 0 2006.229.21:39:01.30#ibcon#*after write, iclass 21, count 0 2006.229.21:39:01.30#ibcon#*before return 0, iclass 21, count 0 2006.229.21:39:01.30#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:01.30#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:01.30#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:39:01.30#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:39:01.30$vck44/va=1,8 2006.229.21:39:01.30#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.21:39:01.30#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.21:39:01.30#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:01.30#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:01.30#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:01.30#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:01.30#ibcon#enter wrdev, iclass 23, count 2 2006.229.21:39:01.30#ibcon#first serial, iclass 23, count 2 2006.229.21:39:01.30#ibcon#enter sib2, iclass 23, count 2 2006.229.21:39:01.30#ibcon#flushed, iclass 23, count 2 2006.229.21:39:01.30#ibcon#about to write, iclass 23, count 2 2006.229.21:39:01.30#ibcon#wrote, iclass 23, count 2 2006.229.21:39:01.30#ibcon#about to read 3, iclass 23, count 2 2006.229.21:39:01.32#ibcon#read 3, iclass 23, count 2 2006.229.21:39:01.32#ibcon#about to read 4, iclass 23, count 2 2006.229.21:39:01.32#ibcon#read 4, iclass 23, count 2 2006.229.21:39:01.32#ibcon#about to read 5, iclass 23, count 2 2006.229.21:39:01.32#ibcon#read 5, iclass 23, count 2 2006.229.21:39:01.32#ibcon#about to read 6, iclass 23, count 2 2006.229.21:39:01.32#ibcon#read 6, iclass 23, count 2 2006.229.21:39:01.32#ibcon#end of sib2, iclass 23, count 2 2006.229.21:39:01.32#ibcon#*mode == 0, iclass 23, count 2 2006.229.21:39:01.32#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.21:39:01.32#ibcon#[25=AT01-08\r\n] 2006.229.21:39:01.32#ibcon#*before write, iclass 23, count 2 2006.229.21:39:01.32#ibcon#enter sib2, iclass 23, count 2 2006.229.21:39:01.32#ibcon#flushed, iclass 23, count 2 2006.229.21:39:01.32#ibcon#about to write, iclass 23, count 2 2006.229.21:39:01.32#ibcon#wrote, iclass 23, count 2 2006.229.21:39:01.32#ibcon#about to read 3, iclass 23, count 2 2006.229.21:39:01.35#ibcon#read 3, iclass 23, count 2 2006.229.21:39:01.35#ibcon#about to read 4, iclass 23, count 2 2006.229.21:39:01.35#ibcon#read 4, iclass 23, count 2 2006.229.21:39:01.35#ibcon#about to read 5, iclass 23, count 2 2006.229.21:39:01.35#ibcon#read 5, iclass 23, count 2 2006.229.21:39:01.35#ibcon#about to read 6, iclass 23, count 2 2006.229.21:39:01.35#ibcon#read 6, iclass 23, count 2 2006.229.21:39:01.35#ibcon#end of sib2, iclass 23, count 2 2006.229.21:39:01.35#ibcon#*after write, iclass 23, count 2 2006.229.21:39:01.35#ibcon#*before return 0, iclass 23, count 2 2006.229.21:39:01.35#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:01.35#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:01.35#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.21:39:01.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:01.35#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:01.47#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:01.47#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:01.47#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:39:01.47#ibcon#first serial, iclass 23, count 0 2006.229.21:39:01.47#ibcon#enter sib2, iclass 23, count 0 2006.229.21:39:01.47#ibcon#flushed, iclass 23, count 0 2006.229.21:39:01.47#ibcon#about to write, iclass 23, count 0 2006.229.21:39:01.47#ibcon#wrote, iclass 23, count 0 2006.229.21:39:01.47#ibcon#about to read 3, iclass 23, count 0 2006.229.21:39:01.49#ibcon#read 3, iclass 23, count 0 2006.229.21:39:01.49#ibcon#about to read 4, iclass 23, count 0 2006.229.21:39:01.49#ibcon#read 4, iclass 23, count 0 2006.229.21:39:01.49#ibcon#about to read 5, iclass 23, count 0 2006.229.21:39:01.49#ibcon#read 5, iclass 23, count 0 2006.229.21:39:01.49#ibcon#about to read 6, iclass 23, count 0 2006.229.21:39:01.49#ibcon#read 6, iclass 23, count 0 2006.229.21:39:01.49#ibcon#end of sib2, iclass 23, count 0 2006.229.21:39:01.49#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:39:01.49#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:39:01.49#ibcon#[25=USB\r\n] 2006.229.21:39:01.49#ibcon#*before write, iclass 23, count 0 2006.229.21:39:01.49#ibcon#enter sib2, iclass 23, count 0 2006.229.21:39:01.49#ibcon#flushed, iclass 23, count 0 2006.229.21:39:01.49#ibcon#about to write, iclass 23, count 0 2006.229.21:39:01.49#ibcon#wrote, iclass 23, count 0 2006.229.21:39:01.49#ibcon#about to read 3, iclass 23, count 0 2006.229.21:39:01.52#ibcon#read 3, iclass 23, count 0 2006.229.21:39:01.52#ibcon#about to read 4, iclass 23, count 0 2006.229.21:39:01.52#ibcon#read 4, iclass 23, count 0 2006.229.21:39:01.52#ibcon#about to read 5, iclass 23, count 0 2006.229.21:39:01.52#ibcon#read 5, iclass 23, count 0 2006.229.21:39:01.52#ibcon#about to read 6, iclass 23, count 0 2006.229.21:39:01.52#ibcon#read 6, iclass 23, count 0 2006.229.21:39:01.52#ibcon#end of sib2, iclass 23, count 0 2006.229.21:39:01.52#ibcon#*after write, iclass 23, count 0 2006.229.21:39:01.52#ibcon#*before return 0, iclass 23, count 0 2006.229.21:39:01.52#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:01.52#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:01.52#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:39:01.52#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:39:01.52$vck44/valo=2,534.99 2006.229.21:39:01.52#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.21:39:01.52#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.21:39:01.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:01.52#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:01.52#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:01.52#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:01.52#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:39:01.52#ibcon#first serial, iclass 25, count 0 2006.229.21:39:01.52#ibcon#enter sib2, iclass 25, count 0 2006.229.21:39:01.52#ibcon#flushed, iclass 25, count 0 2006.229.21:39:01.52#ibcon#about to write, iclass 25, count 0 2006.229.21:39:01.52#ibcon#wrote, iclass 25, count 0 2006.229.21:39:01.52#ibcon#about to read 3, iclass 25, count 0 2006.229.21:39:01.54#ibcon#read 3, iclass 25, count 0 2006.229.21:39:01.54#ibcon#about to read 4, iclass 25, count 0 2006.229.21:39:01.54#ibcon#read 4, iclass 25, count 0 2006.229.21:39:01.54#ibcon#about to read 5, iclass 25, count 0 2006.229.21:39:01.54#ibcon#read 5, iclass 25, count 0 2006.229.21:39:01.54#ibcon#about to read 6, iclass 25, count 0 2006.229.21:39:01.54#ibcon#read 6, iclass 25, count 0 2006.229.21:39:01.54#ibcon#end of sib2, iclass 25, count 0 2006.229.21:39:01.54#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:39:01.54#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:39:01.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:39:01.54#ibcon#*before write, iclass 25, count 0 2006.229.21:39:01.54#ibcon#enter sib2, iclass 25, count 0 2006.229.21:39:01.54#ibcon#flushed, iclass 25, count 0 2006.229.21:39:01.54#ibcon#about to write, iclass 25, count 0 2006.229.21:39:01.54#ibcon#wrote, iclass 25, count 0 2006.229.21:39:01.54#ibcon#about to read 3, iclass 25, count 0 2006.229.21:39:01.58#ibcon#read 3, iclass 25, count 0 2006.229.21:39:01.58#ibcon#about to read 4, iclass 25, count 0 2006.229.21:39:01.58#ibcon#read 4, iclass 25, count 0 2006.229.21:39:01.58#ibcon#about to read 5, iclass 25, count 0 2006.229.21:39:01.58#ibcon#read 5, iclass 25, count 0 2006.229.21:39:01.58#ibcon#about to read 6, iclass 25, count 0 2006.229.21:39:01.58#ibcon#read 6, iclass 25, count 0 2006.229.21:39:01.58#ibcon#end of sib2, iclass 25, count 0 2006.229.21:39:01.58#ibcon#*after write, iclass 25, count 0 2006.229.21:39:01.58#ibcon#*before return 0, iclass 25, count 0 2006.229.21:39:01.58#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:01.58#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:01.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:39:01.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:39:01.58$vck44/va=2,7 2006.229.21:39:01.58#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.21:39:01.58#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.21:39:01.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:01.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:01.64#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:01.64#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:01.64#ibcon#enter wrdev, iclass 27, count 2 2006.229.21:39:01.64#ibcon#first serial, iclass 27, count 2 2006.229.21:39:01.64#ibcon#enter sib2, iclass 27, count 2 2006.229.21:39:01.64#ibcon#flushed, iclass 27, count 2 2006.229.21:39:01.64#ibcon#about to write, iclass 27, count 2 2006.229.21:39:01.64#ibcon#wrote, iclass 27, count 2 2006.229.21:39:01.64#ibcon#about to read 3, iclass 27, count 2 2006.229.21:39:01.66#ibcon#read 3, iclass 27, count 2 2006.229.21:39:01.66#ibcon#about to read 4, iclass 27, count 2 2006.229.21:39:01.66#ibcon#read 4, iclass 27, count 2 2006.229.21:39:01.66#ibcon#about to read 5, iclass 27, count 2 2006.229.21:39:01.66#ibcon#read 5, iclass 27, count 2 2006.229.21:39:01.66#ibcon#about to read 6, iclass 27, count 2 2006.229.21:39:01.66#ibcon#read 6, iclass 27, count 2 2006.229.21:39:01.66#ibcon#end of sib2, iclass 27, count 2 2006.229.21:39:01.66#ibcon#*mode == 0, iclass 27, count 2 2006.229.21:39:01.66#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.21:39:01.66#ibcon#[25=AT02-07\r\n] 2006.229.21:39:01.66#ibcon#*before write, iclass 27, count 2 2006.229.21:39:01.66#ibcon#enter sib2, iclass 27, count 2 2006.229.21:39:01.66#ibcon#flushed, iclass 27, count 2 2006.229.21:39:01.66#ibcon#about to write, iclass 27, count 2 2006.229.21:39:01.66#ibcon#wrote, iclass 27, count 2 2006.229.21:39:01.66#ibcon#about to read 3, iclass 27, count 2 2006.229.21:39:01.69#ibcon#read 3, iclass 27, count 2 2006.229.21:39:01.69#ibcon#about to read 4, iclass 27, count 2 2006.229.21:39:01.69#ibcon#read 4, iclass 27, count 2 2006.229.21:39:01.69#ibcon#about to read 5, iclass 27, count 2 2006.229.21:39:01.69#ibcon#read 5, iclass 27, count 2 2006.229.21:39:01.69#ibcon#about to read 6, iclass 27, count 2 2006.229.21:39:01.69#ibcon#read 6, iclass 27, count 2 2006.229.21:39:01.69#ibcon#end of sib2, iclass 27, count 2 2006.229.21:39:01.69#ibcon#*after write, iclass 27, count 2 2006.229.21:39:01.69#ibcon#*before return 0, iclass 27, count 2 2006.229.21:39:01.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:01.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:01.69#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.21:39:01.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:01.69#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:01.81#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:01.81#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:01.81#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:39:01.81#ibcon#first serial, iclass 27, count 0 2006.229.21:39:01.81#ibcon#enter sib2, iclass 27, count 0 2006.229.21:39:01.81#ibcon#flushed, iclass 27, count 0 2006.229.21:39:01.81#ibcon#about to write, iclass 27, count 0 2006.229.21:39:01.81#ibcon#wrote, iclass 27, count 0 2006.229.21:39:01.81#ibcon#about to read 3, iclass 27, count 0 2006.229.21:39:01.83#ibcon#read 3, iclass 27, count 0 2006.229.21:39:01.83#ibcon#about to read 4, iclass 27, count 0 2006.229.21:39:01.83#ibcon#read 4, iclass 27, count 0 2006.229.21:39:01.83#ibcon#about to read 5, iclass 27, count 0 2006.229.21:39:01.83#ibcon#read 5, iclass 27, count 0 2006.229.21:39:01.83#ibcon#about to read 6, iclass 27, count 0 2006.229.21:39:01.83#ibcon#read 6, iclass 27, count 0 2006.229.21:39:01.83#ibcon#end of sib2, iclass 27, count 0 2006.229.21:39:01.83#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:39:01.83#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:39:01.83#ibcon#[25=USB\r\n] 2006.229.21:39:01.83#ibcon#*before write, iclass 27, count 0 2006.229.21:39:01.83#ibcon#enter sib2, iclass 27, count 0 2006.229.21:39:01.83#ibcon#flushed, iclass 27, count 0 2006.229.21:39:01.83#ibcon#about to write, iclass 27, count 0 2006.229.21:39:01.83#ibcon#wrote, iclass 27, count 0 2006.229.21:39:01.83#ibcon#about to read 3, iclass 27, count 0 2006.229.21:39:01.86#ibcon#read 3, iclass 27, count 0 2006.229.21:39:01.86#ibcon#about to read 4, iclass 27, count 0 2006.229.21:39:01.86#ibcon#read 4, iclass 27, count 0 2006.229.21:39:01.86#ibcon#about to read 5, iclass 27, count 0 2006.229.21:39:01.86#ibcon#read 5, iclass 27, count 0 2006.229.21:39:01.86#ibcon#about to read 6, iclass 27, count 0 2006.229.21:39:01.86#ibcon#read 6, iclass 27, count 0 2006.229.21:39:01.86#ibcon#end of sib2, iclass 27, count 0 2006.229.21:39:01.86#ibcon#*after write, iclass 27, count 0 2006.229.21:39:01.86#ibcon#*before return 0, iclass 27, count 0 2006.229.21:39:01.86#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:01.86#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:01.86#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:39:01.86#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:39:01.86$vck44/valo=3,564.99 2006.229.21:39:01.86#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.21:39:01.86#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.21:39:01.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:01.86#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:01.86#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:01.86#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:01.86#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:39:01.86#ibcon#first serial, iclass 29, count 0 2006.229.21:39:01.86#ibcon#enter sib2, iclass 29, count 0 2006.229.21:39:01.86#ibcon#flushed, iclass 29, count 0 2006.229.21:39:01.86#ibcon#about to write, iclass 29, count 0 2006.229.21:39:01.86#ibcon#wrote, iclass 29, count 0 2006.229.21:39:01.86#ibcon#about to read 3, iclass 29, count 0 2006.229.21:39:01.88#ibcon#read 3, iclass 29, count 0 2006.229.21:39:01.88#ibcon#about to read 4, iclass 29, count 0 2006.229.21:39:01.88#ibcon#read 4, iclass 29, count 0 2006.229.21:39:01.88#ibcon#about to read 5, iclass 29, count 0 2006.229.21:39:01.88#ibcon#read 5, iclass 29, count 0 2006.229.21:39:01.88#ibcon#about to read 6, iclass 29, count 0 2006.229.21:39:01.88#ibcon#read 6, iclass 29, count 0 2006.229.21:39:01.88#ibcon#end of sib2, iclass 29, count 0 2006.229.21:39:01.88#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:39:01.88#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:39:01.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:39:01.88#ibcon#*before write, iclass 29, count 0 2006.229.21:39:01.88#ibcon#enter sib2, iclass 29, count 0 2006.229.21:39:01.88#ibcon#flushed, iclass 29, count 0 2006.229.21:39:01.88#ibcon#about to write, iclass 29, count 0 2006.229.21:39:01.88#ibcon#wrote, iclass 29, count 0 2006.229.21:39:01.88#ibcon#about to read 3, iclass 29, count 0 2006.229.21:39:01.92#ibcon#read 3, iclass 29, count 0 2006.229.21:39:01.92#ibcon#about to read 4, iclass 29, count 0 2006.229.21:39:01.92#ibcon#read 4, iclass 29, count 0 2006.229.21:39:01.92#ibcon#about to read 5, iclass 29, count 0 2006.229.21:39:01.92#ibcon#read 5, iclass 29, count 0 2006.229.21:39:01.92#ibcon#about to read 6, iclass 29, count 0 2006.229.21:39:01.92#ibcon#read 6, iclass 29, count 0 2006.229.21:39:01.92#ibcon#end of sib2, iclass 29, count 0 2006.229.21:39:01.92#ibcon#*after write, iclass 29, count 0 2006.229.21:39:01.92#ibcon#*before return 0, iclass 29, count 0 2006.229.21:39:01.92#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:01.92#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:01.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:39:01.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:39:01.92$vck44/va=3,6 2006.229.21:39:01.92#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.21:39:01.92#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.21:39:01.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:01.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:01.98#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:01.98#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:01.98#ibcon#enter wrdev, iclass 31, count 2 2006.229.21:39:01.98#ibcon#first serial, iclass 31, count 2 2006.229.21:39:01.98#ibcon#enter sib2, iclass 31, count 2 2006.229.21:39:01.98#ibcon#flushed, iclass 31, count 2 2006.229.21:39:01.98#ibcon#about to write, iclass 31, count 2 2006.229.21:39:01.98#ibcon#wrote, iclass 31, count 2 2006.229.21:39:01.98#ibcon#about to read 3, iclass 31, count 2 2006.229.21:39:02.00#ibcon#read 3, iclass 31, count 2 2006.229.21:39:02.00#ibcon#about to read 4, iclass 31, count 2 2006.229.21:39:02.00#ibcon#read 4, iclass 31, count 2 2006.229.21:39:02.00#ibcon#about to read 5, iclass 31, count 2 2006.229.21:39:02.00#ibcon#read 5, iclass 31, count 2 2006.229.21:39:02.00#ibcon#about to read 6, iclass 31, count 2 2006.229.21:39:02.00#ibcon#read 6, iclass 31, count 2 2006.229.21:39:02.00#ibcon#end of sib2, iclass 31, count 2 2006.229.21:39:02.00#ibcon#*mode == 0, iclass 31, count 2 2006.229.21:39:02.00#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.21:39:02.00#ibcon#[25=AT03-06\r\n] 2006.229.21:39:02.00#ibcon#*before write, iclass 31, count 2 2006.229.21:39:02.00#ibcon#enter sib2, iclass 31, count 2 2006.229.21:39:02.00#ibcon#flushed, iclass 31, count 2 2006.229.21:39:02.00#ibcon#about to write, iclass 31, count 2 2006.229.21:39:02.00#ibcon#wrote, iclass 31, count 2 2006.229.21:39:02.00#ibcon#about to read 3, iclass 31, count 2 2006.229.21:39:02.03#ibcon#read 3, iclass 31, count 2 2006.229.21:39:02.03#ibcon#about to read 4, iclass 31, count 2 2006.229.21:39:02.03#ibcon#read 4, iclass 31, count 2 2006.229.21:39:02.03#ibcon#about to read 5, iclass 31, count 2 2006.229.21:39:02.03#ibcon#read 5, iclass 31, count 2 2006.229.21:39:02.03#ibcon#about to read 6, iclass 31, count 2 2006.229.21:39:02.03#ibcon#read 6, iclass 31, count 2 2006.229.21:39:02.03#ibcon#end of sib2, iclass 31, count 2 2006.229.21:39:02.03#ibcon#*after write, iclass 31, count 2 2006.229.21:39:02.03#ibcon#*before return 0, iclass 31, count 2 2006.229.21:39:02.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:02.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:02.03#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.21:39:02.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:02.03#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:02.15#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:02.15#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:02.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:39:02.15#ibcon#first serial, iclass 31, count 0 2006.229.21:39:02.15#ibcon#enter sib2, iclass 31, count 0 2006.229.21:39:02.15#ibcon#flushed, iclass 31, count 0 2006.229.21:39:02.15#ibcon#about to write, iclass 31, count 0 2006.229.21:39:02.15#ibcon#wrote, iclass 31, count 0 2006.229.21:39:02.15#ibcon#about to read 3, iclass 31, count 0 2006.229.21:39:02.17#ibcon#read 3, iclass 31, count 0 2006.229.21:39:02.17#ibcon#about to read 4, iclass 31, count 0 2006.229.21:39:02.17#ibcon#read 4, iclass 31, count 0 2006.229.21:39:02.17#ibcon#about to read 5, iclass 31, count 0 2006.229.21:39:02.17#ibcon#read 5, iclass 31, count 0 2006.229.21:39:02.17#ibcon#about to read 6, iclass 31, count 0 2006.229.21:39:02.17#ibcon#read 6, iclass 31, count 0 2006.229.21:39:02.17#ibcon#end of sib2, iclass 31, count 0 2006.229.21:39:02.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:39:02.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:39:02.17#ibcon#[25=USB\r\n] 2006.229.21:39:02.17#ibcon#*before write, iclass 31, count 0 2006.229.21:39:02.17#ibcon#enter sib2, iclass 31, count 0 2006.229.21:39:02.17#ibcon#flushed, iclass 31, count 0 2006.229.21:39:02.17#ibcon#about to write, iclass 31, count 0 2006.229.21:39:02.17#ibcon#wrote, iclass 31, count 0 2006.229.21:39:02.17#ibcon#about to read 3, iclass 31, count 0 2006.229.21:39:02.20#ibcon#read 3, iclass 31, count 0 2006.229.21:39:02.20#ibcon#about to read 4, iclass 31, count 0 2006.229.21:39:02.20#ibcon#read 4, iclass 31, count 0 2006.229.21:39:02.20#ibcon#about to read 5, iclass 31, count 0 2006.229.21:39:02.20#ibcon#read 5, iclass 31, count 0 2006.229.21:39:02.20#ibcon#about to read 6, iclass 31, count 0 2006.229.21:39:02.20#ibcon#read 6, iclass 31, count 0 2006.229.21:39:02.20#ibcon#end of sib2, iclass 31, count 0 2006.229.21:39:02.20#ibcon#*after write, iclass 31, count 0 2006.229.21:39:02.20#ibcon#*before return 0, iclass 31, count 0 2006.229.21:39:02.20#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:02.20#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:02.20#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:39:02.20#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:39:02.20$vck44/valo=4,624.99 2006.229.21:39:02.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.21:39:02.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.21:39:02.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:02.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:02.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:02.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:02.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.21:39:02.20#ibcon#first serial, iclass 33, count 0 2006.229.21:39:02.20#ibcon#enter sib2, iclass 33, count 0 2006.229.21:39:02.20#ibcon#flushed, iclass 33, count 0 2006.229.21:39:02.20#ibcon#about to write, iclass 33, count 0 2006.229.21:39:02.20#ibcon#wrote, iclass 33, count 0 2006.229.21:39:02.20#ibcon#about to read 3, iclass 33, count 0 2006.229.21:39:02.22#ibcon#read 3, iclass 33, count 0 2006.229.21:39:02.22#ibcon#about to read 4, iclass 33, count 0 2006.229.21:39:02.22#ibcon#read 4, iclass 33, count 0 2006.229.21:39:02.22#ibcon#about to read 5, iclass 33, count 0 2006.229.21:39:02.22#ibcon#read 5, iclass 33, count 0 2006.229.21:39:02.22#ibcon#about to read 6, iclass 33, count 0 2006.229.21:39:02.22#ibcon#read 6, iclass 33, count 0 2006.229.21:39:02.22#ibcon#end of sib2, iclass 33, count 0 2006.229.21:39:02.22#ibcon#*mode == 0, iclass 33, count 0 2006.229.21:39:02.22#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.21:39:02.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:39:02.22#ibcon#*before write, iclass 33, count 0 2006.229.21:39:02.22#ibcon#enter sib2, iclass 33, count 0 2006.229.21:39:02.22#ibcon#flushed, iclass 33, count 0 2006.229.21:39:02.22#ibcon#about to write, iclass 33, count 0 2006.229.21:39:02.22#ibcon#wrote, iclass 33, count 0 2006.229.21:39:02.22#ibcon#about to read 3, iclass 33, count 0 2006.229.21:39:02.26#ibcon#read 3, iclass 33, count 0 2006.229.21:39:02.26#ibcon#about to read 4, iclass 33, count 0 2006.229.21:39:02.26#ibcon#read 4, iclass 33, count 0 2006.229.21:39:02.26#ibcon#about to read 5, iclass 33, count 0 2006.229.21:39:02.26#ibcon#read 5, iclass 33, count 0 2006.229.21:39:02.26#ibcon#about to read 6, iclass 33, count 0 2006.229.21:39:02.26#ibcon#read 6, iclass 33, count 0 2006.229.21:39:02.26#ibcon#end of sib2, iclass 33, count 0 2006.229.21:39:02.26#ibcon#*after write, iclass 33, count 0 2006.229.21:39:02.26#ibcon#*before return 0, iclass 33, count 0 2006.229.21:39:02.26#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:02.26#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:02.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.21:39:02.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.21:39:02.26$vck44/va=4,7 2006.229.21:39:02.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.21:39:02.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.21:39:02.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:02.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:02.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:02.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:02.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.21:39:02.32#ibcon#first serial, iclass 35, count 2 2006.229.21:39:02.32#ibcon#enter sib2, iclass 35, count 2 2006.229.21:39:02.32#ibcon#flushed, iclass 35, count 2 2006.229.21:39:02.32#ibcon#about to write, iclass 35, count 2 2006.229.21:39:02.32#ibcon#wrote, iclass 35, count 2 2006.229.21:39:02.32#ibcon#about to read 3, iclass 35, count 2 2006.229.21:39:02.34#ibcon#read 3, iclass 35, count 2 2006.229.21:39:02.34#ibcon#about to read 4, iclass 35, count 2 2006.229.21:39:02.34#ibcon#read 4, iclass 35, count 2 2006.229.21:39:02.34#ibcon#about to read 5, iclass 35, count 2 2006.229.21:39:02.34#ibcon#read 5, iclass 35, count 2 2006.229.21:39:02.34#ibcon#about to read 6, iclass 35, count 2 2006.229.21:39:02.34#ibcon#read 6, iclass 35, count 2 2006.229.21:39:02.34#ibcon#end of sib2, iclass 35, count 2 2006.229.21:39:02.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.21:39:02.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.21:39:02.34#ibcon#[25=AT04-07\r\n] 2006.229.21:39:02.34#ibcon#*before write, iclass 35, count 2 2006.229.21:39:02.34#ibcon#enter sib2, iclass 35, count 2 2006.229.21:39:02.34#ibcon#flushed, iclass 35, count 2 2006.229.21:39:02.34#ibcon#about to write, iclass 35, count 2 2006.229.21:39:02.34#ibcon#wrote, iclass 35, count 2 2006.229.21:39:02.34#ibcon#about to read 3, iclass 35, count 2 2006.229.21:39:02.37#ibcon#read 3, iclass 35, count 2 2006.229.21:39:02.37#ibcon#about to read 4, iclass 35, count 2 2006.229.21:39:02.37#ibcon#read 4, iclass 35, count 2 2006.229.21:39:02.37#ibcon#about to read 5, iclass 35, count 2 2006.229.21:39:02.37#ibcon#read 5, iclass 35, count 2 2006.229.21:39:02.37#ibcon#about to read 6, iclass 35, count 2 2006.229.21:39:02.37#ibcon#read 6, iclass 35, count 2 2006.229.21:39:02.37#ibcon#end of sib2, iclass 35, count 2 2006.229.21:39:02.37#ibcon#*after write, iclass 35, count 2 2006.229.21:39:02.37#ibcon#*before return 0, iclass 35, count 2 2006.229.21:39:02.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:02.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:02.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.21:39:02.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:02.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:02.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:02.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:02.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:39:02.49#ibcon#first serial, iclass 35, count 0 2006.229.21:39:02.49#ibcon#enter sib2, iclass 35, count 0 2006.229.21:39:02.49#ibcon#flushed, iclass 35, count 0 2006.229.21:39:02.49#ibcon#about to write, iclass 35, count 0 2006.229.21:39:02.49#ibcon#wrote, iclass 35, count 0 2006.229.21:39:02.49#ibcon#about to read 3, iclass 35, count 0 2006.229.21:39:02.51#ibcon#read 3, iclass 35, count 0 2006.229.21:39:02.51#ibcon#about to read 4, iclass 35, count 0 2006.229.21:39:02.51#ibcon#read 4, iclass 35, count 0 2006.229.21:39:02.51#ibcon#about to read 5, iclass 35, count 0 2006.229.21:39:02.51#ibcon#read 5, iclass 35, count 0 2006.229.21:39:02.51#ibcon#about to read 6, iclass 35, count 0 2006.229.21:39:02.51#ibcon#read 6, iclass 35, count 0 2006.229.21:39:02.51#ibcon#end of sib2, iclass 35, count 0 2006.229.21:39:02.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:39:02.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:39:02.51#ibcon#[25=USB\r\n] 2006.229.21:39:02.51#ibcon#*before write, iclass 35, count 0 2006.229.21:39:02.51#ibcon#enter sib2, iclass 35, count 0 2006.229.21:39:02.51#ibcon#flushed, iclass 35, count 0 2006.229.21:39:02.51#ibcon#about to write, iclass 35, count 0 2006.229.21:39:02.51#ibcon#wrote, iclass 35, count 0 2006.229.21:39:02.51#ibcon#about to read 3, iclass 35, count 0 2006.229.21:39:02.54#ibcon#read 3, iclass 35, count 0 2006.229.21:39:02.54#ibcon#about to read 4, iclass 35, count 0 2006.229.21:39:02.54#ibcon#read 4, iclass 35, count 0 2006.229.21:39:02.54#ibcon#about to read 5, iclass 35, count 0 2006.229.21:39:02.54#ibcon#read 5, iclass 35, count 0 2006.229.21:39:02.54#ibcon#about to read 6, iclass 35, count 0 2006.229.21:39:02.54#ibcon#read 6, iclass 35, count 0 2006.229.21:39:02.54#ibcon#end of sib2, iclass 35, count 0 2006.229.21:39:02.54#ibcon#*after write, iclass 35, count 0 2006.229.21:39:02.54#ibcon#*before return 0, iclass 35, count 0 2006.229.21:39:02.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:02.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:02.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:39:02.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:39:02.54$vck44/valo=5,734.99 2006.229.21:39:02.54#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.21:39:02.54#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.21:39:02.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:02.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:02.54#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:02.54#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:02.54#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:39:02.54#ibcon#first serial, iclass 37, count 0 2006.229.21:39:02.54#ibcon#enter sib2, iclass 37, count 0 2006.229.21:39:02.54#ibcon#flushed, iclass 37, count 0 2006.229.21:39:02.54#ibcon#about to write, iclass 37, count 0 2006.229.21:39:02.54#ibcon#wrote, iclass 37, count 0 2006.229.21:39:02.54#ibcon#about to read 3, iclass 37, count 0 2006.229.21:39:02.56#ibcon#read 3, iclass 37, count 0 2006.229.21:39:02.56#ibcon#about to read 4, iclass 37, count 0 2006.229.21:39:02.56#ibcon#read 4, iclass 37, count 0 2006.229.21:39:02.56#ibcon#about to read 5, iclass 37, count 0 2006.229.21:39:02.56#ibcon#read 5, iclass 37, count 0 2006.229.21:39:02.56#ibcon#about to read 6, iclass 37, count 0 2006.229.21:39:02.56#ibcon#read 6, iclass 37, count 0 2006.229.21:39:02.56#ibcon#end of sib2, iclass 37, count 0 2006.229.21:39:02.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:39:02.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:39:02.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:39:02.56#ibcon#*before write, iclass 37, count 0 2006.229.21:39:02.56#ibcon#enter sib2, iclass 37, count 0 2006.229.21:39:02.56#ibcon#flushed, iclass 37, count 0 2006.229.21:39:02.56#ibcon#about to write, iclass 37, count 0 2006.229.21:39:02.56#ibcon#wrote, iclass 37, count 0 2006.229.21:39:02.56#ibcon#about to read 3, iclass 37, count 0 2006.229.21:39:02.60#ibcon#read 3, iclass 37, count 0 2006.229.21:39:02.60#ibcon#about to read 4, iclass 37, count 0 2006.229.21:39:02.60#ibcon#read 4, iclass 37, count 0 2006.229.21:39:02.60#ibcon#about to read 5, iclass 37, count 0 2006.229.21:39:02.60#ibcon#read 5, iclass 37, count 0 2006.229.21:39:02.60#ibcon#about to read 6, iclass 37, count 0 2006.229.21:39:02.60#ibcon#read 6, iclass 37, count 0 2006.229.21:39:02.60#ibcon#end of sib2, iclass 37, count 0 2006.229.21:39:02.60#ibcon#*after write, iclass 37, count 0 2006.229.21:39:02.60#ibcon#*before return 0, iclass 37, count 0 2006.229.21:39:02.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:02.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:02.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:39:02.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:39:02.60$vck44/va=5,4 2006.229.21:39:02.60#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.21:39:02.60#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.21:39:02.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:02.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:02.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:02.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:02.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.21:39:02.66#ibcon#first serial, iclass 39, count 2 2006.229.21:39:02.66#ibcon#enter sib2, iclass 39, count 2 2006.229.21:39:02.66#ibcon#flushed, iclass 39, count 2 2006.229.21:39:02.66#ibcon#about to write, iclass 39, count 2 2006.229.21:39:02.66#ibcon#wrote, iclass 39, count 2 2006.229.21:39:02.66#ibcon#about to read 3, iclass 39, count 2 2006.229.21:39:02.68#ibcon#read 3, iclass 39, count 2 2006.229.21:39:02.68#ibcon#about to read 4, iclass 39, count 2 2006.229.21:39:02.68#ibcon#read 4, iclass 39, count 2 2006.229.21:39:02.68#ibcon#about to read 5, iclass 39, count 2 2006.229.21:39:02.68#ibcon#read 5, iclass 39, count 2 2006.229.21:39:02.68#ibcon#about to read 6, iclass 39, count 2 2006.229.21:39:02.68#ibcon#read 6, iclass 39, count 2 2006.229.21:39:02.68#ibcon#end of sib2, iclass 39, count 2 2006.229.21:39:02.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.21:39:02.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.21:39:02.68#ibcon#[25=AT05-04\r\n] 2006.229.21:39:02.68#ibcon#*before write, iclass 39, count 2 2006.229.21:39:02.68#ibcon#enter sib2, iclass 39, count 2 2006.229.21:39:02.68#ibcon#flushed, iclass 39, count 2 2006.229.21:39:02.68#ibcon#about to write, iclass 39, count 2 2006.229.21:39:02.68#ibcon#wrote, iclass 39, count 2 2006.229.21:39:02.68#ibcon#about to read 3, iclass 39, count 2 2006.229.21:39:02.71#ibcon#read 3, iclass 39, count 2 2006.229.21:39:02.71#ibcon#about to read 4, iclass 39, count 2 2006.229.21:39:02.71#ibcon#read 4, iclass 39, count 2 2006.229.21:39:02.71#ibcon#about to read 5, iclass 39, count 2 2006.229.21:39:02.71#ibcon#read 5, iclass 39, count 2 2006.229.21:39:02.71#ibcon#about to read 6, iclass 39, count 2 2006.229.21:39:02.71#ibcon#read 6, iclass 39, count 2 2006.229.21:39:02.71#ibcon#end of sib2, iclass 39, count 2 2006.229.21:39:02.71#ibcon#*after write, iclass 39, count 2 2006.229.21:39:02.71#ibcon#*before return 0, iclass 39, count 2 2006.229.21:39:02.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:02.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:02.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.21:39:02.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:02.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:02.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:02.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:02.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:39:02.83#ibcon#first serial, iclass 39, count 0 2006.229.21:39:02.83#ibcon#enter sib2, iclass 39, count 0 2006.229.21:39:02.83#ibcon#flushed, iclass 39, count 0 2006.229.21:39:02.83#ibcon#about to write, iclass 39, count 0 2006.229.21:39:02.83#ibcon#wrote, iclass 39, count 0 2006.229.21:39:02.83#ibcon#about to read 3, iclass 39, count 0 2006.229.21:39:02.85#ibcon#read 3, iclass 39, count 0 2006.229.21:39:02.85#ibcon#about to read 4, iclass 39, count 0 2006.229.21:39:02.85#ibcon#read 4, iclass 39, count 0 2006.229.21:39:02.85#ibcon#about to read 5, iclass 39, count 0 2006.229.21:39:02.85#ibcon#read 5, iclass 39, count 0 2006.229.21:39:02.85#ibcon#about to read 6, iclass 39, count 0 2006.229.21:39:02.85#ibcon#read 6, iclass 39, count 0 2006.229.21:39:02.85#ibcon#end of sib2, iclass 39, count 0 2006.229.21:39:02.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:39:02.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:39:02.85#ibcon#[25=USB\r\n] 2006.229.21:39:02.85#ibcon#*before write, iclass 39, count 0 2006.229.21:39:02.85#ibcon#enter sib2, iclass 39, count 0 2006.229.21:39:02.85#ibcon#flushed, iclass 39, count 0 2006.229.21:39:02.85#ibcon#about to write, iclass 39, count 0 2006.229.21:39:02.85#ibcon#wrote, iclass 39, count 0 2006.229.21:39:02.85#ibcon#about to read 3, iclass 39, count 0 2006.229.21:39:02.88#ibcon#read 3, iclass 39, count 0 2006.229.21:39:02.88#ibcon#about to read 4, iclass 39, count 0 2006.229.21:39:02.88#ibcon#read 4, iclass 39, count 0 2006.229.21:39:02.88#ibcon#about to read 5, iclass 39, count 0 2006.229.21:39:02.88#ibcon#read 5, iclass 39, count 0 2006.229.21:39:02.88#ibcon#about to read 6, iclass 39, count 0 2006.229.21:39:02.88#ibcon#read 6, iclass 39, count 0 2006.229.21:39:02.88#ibcon#end of sib2, iclass 39, count 0 2006.229.21:39:02.88#ibcon#*after write, iclass 39, count 0 2006.229.21:39:02.88#ibcon#*before return 0, iclass 39, count 0 2006.229.21:39:02.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:02.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:02.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:39:02.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:39:02.88$vck44/valo=6,814.99 2006.229.21:39:02.88#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.21:39:02.88#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.21:39:02.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:02.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:02.88#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:02.88#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:02.88#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:39:02.88#ibcon#first serial, iclass 3, count 0 2006.229.21:39:02.88#ibcon#enter sib2, iclass 3, count 0 2006.229.21:39:02.88#ibcon#flushed, iclass 3, count 0 2006.229.21:39:02.88#ibcon#about to write, iclass 3, count 0 2006.229.21:39:02.88#ibcon#wrote, iclass 3, count 0 2006.229.21:39:02.88#ibcon#about to read 3, iclass 3, count 0 2006.229.21:39:02.90#ibcon#read 3, iclass 3, count 0 2006.229.21:39:02.90#ibcon#about to read 4, iclass 3, count 0 2006.229.21:39:02.90#ibcon#read 4, iclass 3, count 0 2006.229.21:39:02.90#ibcon#about to read 5, iclass 3, count 0 2006.229.21:39:02.90#ibcon#read 5, iclass 3, count 0 2006.229.21:39:02.90#ibcon#about to read 6, iclass 3, count 0 2006.229.21:39:02.90#ibcon#read 6, iclass 3, count 0 2006.229.21:39:02.90#ibcon#end of sib2, iclass 3, count 0 2006.229.21:39:02.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:39:02.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:39:02.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:39:02.90#ibcon#*before write, iclass 3, count 0 2006.229.21:39:02.90#ibcon#enter sib2, iclass 3, count 0 2006.229.21:39:02.90#ibcon#flushed, iclass 3, count 0 2006.229.21:39:02.90#ibcon#about to write, iclass 3, count 0 2006.229.21:39:02.90#ibcon#wrote, iclass 3, count 0 2006.229.21:39:02.90#ibcon#about to read 3, iclass 3, count 0 2006.229.21:39:02.94#ibcon#read 3, iclass 3, count 0 2006.229.21:39:02.94#ibcon#about to read 4, iclass 3, count 0 2006.229.21:39:02.94#ibcon#read 4, iclass 3, count 0 2006.229.21:39:02.94#ibcon#about to read 5, iclass 3, count 0 2006.229.21:39:02.94#ibcon#read 5, iclass 3, count 0 2006.229.21:39:02.94#ibcon#about to read 6, iclass 3, count 0 2006.229.21:39:02.94#ibcon#read 6, iclass 3, count 0 2006.229.21:39:02.94#ibcon#end of sib2, iclass 3, count 0 2006.229.21:39:02.94#ibcon#*after write, iclass 3, count 0 2006.229.21:39:02.94#ibcon#*before return 0, iclass 3, count 0 2006.229.21:39:02.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:02.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:02.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:39:02.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:39:02.94$vck44/va=6,4 2006.229.21:39:02.94#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.21:39:02.94#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.21:39:02.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:02.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:03.00#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:03.00#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:03.00#ibcon#enter wrdev, iclass 5, count 2 2006.229.21:39:03.00#ibcon#first serial, iclass 5, count 2 2006.229.21:39:03.00#ibcon#enter sib2, iclass 5, count 2 2006.229.21:39:03.00#ibcon#flushed, iclass 5, count 2 2006.229.21:39:03.00#ibcon#about to write, iclass 5, count 2 2006.229.21:39:03.00#ibcon#wrote, iclass 5, count 2 2006.229.21:39:03.00#ibcon#about to read 3, iclass 5, count 2 2006.229.21:39:03.02#ibcon#read 3, iclass 5, count 2 2006.229.21:39:03.02#ibcon#about to read 4, iclass 5, count 2 2006.229.21:39:03.02#ibcon#read 4, iclass 5, count 2 2006.229.21:39:03.02#ibcon#about to read 5, iclass 5, count 2 2006.229.21:39:03.02#ibcon#read 5, iclass 5, count 2 2006.229.21:39:03.02#ibcon#about to read 6, iclass 5, count 2 2006.229.21:39:03.02#ibcon#read 6, iclass 5, count 2 2006.229.21:39:03.02#ibcon#end of sib2, iclass 5, count 2 2006.229.21:39:03.02#ibcon#*mode == 0, iclass 5, count 2 2006.229.21:39:03.02#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.21:39:03.02#ibcon#[25=AT06-04\r\n] 2006.229.21:39:03.02#ibcon#*before write, iclass 5, count 2 2006.229.21:39:03.02#ibcon#enter sib2, iclass 5, count 2 2006.229.21:39:03.02#ibcon#flushed, iclass 5, count 2 2006.229.21:39:03.02#ibcon#about to write, iclass 5, count 2 2006.229.21:39:03.02#ibcon#wrote, iclass 5, count 2 2006.229.21:39:03.02#ibcon#about to read 3, iclass 5, count 2 2006.229.21:39:03.05#ibcon#read 3, iclass 5, count 2 2006.229.21:39:03.05#ibcon#about to read 4, iclass 5, count 2 2006.229.21:39:03.05#ibcon#read 4, iclass 5, count 2 2006.229.21:39:03.05#ibcon#about to read 5, iclass 5, count 2 2006.229.21:39:03.05#ibcon#read 5, iclass 5, count 2 2006.229.21:39:03.05#ibcon#about to read 6, iclass 5, count 2 2006.229.21:39:03.05#ibcon#read 6, iclass 5, count 2 2006.229.21:39:03.05#ibcon#end of sib2, iclass 5, count 2 2006.229.21:39:03.05#ibcon#*after write, iclass 5, count 2 2006.229.21:39:03.05#ibcon#*before return 0, iclass 5, count 2 2006.229.21:39:03.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:03.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:03.05#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.21:39:03.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:03.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:03.17#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:03.17#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:03.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:39:03.17#ibcon#first serial, iclass 5, count 0 2006.229.21:39:03.17#ibcon#enter sib2, iclass 5, count 0 2006.229.21:39:03.17#ibcon#flushed, iclass 5, count 0 2006.229.21:39:03.17#ibcon#about to write, iclass 5, count 0 2006.229.21:39:03.17#ibcon#wrote, iclass 5, count 0 2006.229.21:39:03.17#ibcon#about to read 3, iclass 5, count 0 2006.229.21:39:03.19#ibcon#read 3, iclass 5, count 0 2006.229.21:39:03.19#ibcon#about to read 4, iclass 5, count 0 2006.229.21:39:03.19#ibcon#read 4, iclass 5, count 0 2006.229.21:39:03.19#ibcon#about to read 5, iclass 5, count 0 2006.229.21:39:03.19#ibcon#read 5, iclass 5, count 0 2006.229.21:39:03.19#ibcon#about to read 6, iclass 5, count 0 2006.229.21:39:03.19#ibcon#read 6, iclass 5, count 0 2006.229.21:39:03.19#ibcon#end of sib2, iclass 5, count 0 2006.229.21:39:03.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:39:03.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:39:03.19#ibcon#[25=USB\r\n] 2006.229.21:39:03.19#ibcon#*before write, iclass 5, count 0 2006.229.21:39:03.19#ibcon#enter sib2, iclass 5, count 0 2006.229.21:39:03.19#ibcon#flushed, iclass 5, count 0 2006.229.21:39:03.19#ibcon#about to write, iclass 5, count 0 2006.229.21:39:03.19#ibcon#wrote, iclass 5, count 0 2006.229.21:39:03.19#ibcon#about to read 3, iclass 5, count 0 2006.229.21:39:03.22#ibcon#read 3, iclass 5, count 0 2006.229.21:39:03.22#ibcon#about to read 4, iclass 5, count 0 2006.229.21:39:03.22#ibcon#read 4, iclass 5, count 0 2006.229.21:39:03.22#ibcon#about to read 5, iclass 5, count 0 2006.229.21:39:03.22#ibcon#read 5, iclass 5, count 0 2006.229.21:39:03.22#ibcon#about to read 6, iclass 5, count 0 2006.229.21:39:03.22#ibcon#read 6, iclass 5, count 0 2006.229.21:39:03.22#ibcon#end of sib2, iclass 5, count 0 2006.229.21:39:03.22#ibcon#*after write, iclass 5, count 0 2006.229.21:39:03.22#ibcon#*before return 0, iclass 5, count 0 2006.229.21:39:03.22#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:03.22#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:03.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:39:03.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:39:03.22$vck44/valo=7,864.99 2006.229.21:39:03.22#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.21:39:03.22#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.21:39:03.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:03.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:03.22#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:03.22#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:03.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:39:03.22#ibcon#first serial, iclass 7, count 0 2006.229.21:39:03.22#ibcon#enter sib2, iclass 7, count 0 2006.229.21:39:03.22#ibcon#flushed, iclass 7, count 0 2006.229.21:39:03.22#ibcon#about to write, iclass 7, count 0 2006.229.21:39:03.22#ibcon#wrote, iclass 7, count 0 2006.229.21:39:03.22#ibcon#about to read 3, iclass 7, count 0 2006.229.21:39:03.24#ibcon#read 3, iclass 7, count 0 2006.229.21:39:03.24#ibcon#about to read 4, iclass 7, count 0 2006.229.21:39:03.24#ibcon#read 4, iclass 7, count 0 2006.229.21:39:03.24#ibcon#about to read 5, iclass 7, count 0 2006.229.21:39:03.24#ibcon#read 5, iclass 7, count 0 2006.229.21:39:03.24#ibcon#about to read 6, iclass 7, count 0 2006.229.21:39:03.24#ibcon#read 6, iclass 7, count 0 2006.229.21:39:03.24#ibcon#end of sib2, iclass 7, count 0 2006.229.21:39:03.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:39:03.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:39:03.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:39:03.24#ibcon#*before write, iclass 7, count 0 2006.229.21:39:03.24#ibcon#enter sib2, iclass 7, count 0 2006.229.21:39:03.24#ibcon#flushed, iclass 7, count 0 2006.229.21:39:03.24#ibcon#about to write, iclass 7, count 0 2006.229.21:39:03.24#ibcon#wrote, iclass 7, count 0 2006.229.21:39:03.24#ibcon#about to read 3, iclass 7, count 0 2006.229.21:39:03.28#ibcon#read 3, iclass 7, count 0 2006.229.21:39:03.28#ibcon#about to read 4, iclass 7, count 0 2006.229.21:39:03.28#ibcon#read 4, iclass 7, count 0 2006.229.21:39:03.28#ibcon#about to read 5, iclass 7, count 0 2006.229.21:39:03.28#ibcon#read 5, iclass 7, count 0 2006.229.21:39:03.28#ibcon#about to read 6, iclass 7, count 0 2006.229.21:39:03.28#ibcon#read 6, iclass 7, count 0 2006.229.21:39:03.28#ibcon#end of sib2, iclass 7, count 0 2006.229.21:39:03.28#ibcon#*after write, iclass 7, count 0 2006.229.21:39:03.28#ibcon#*before return 0, iclass 7, count 0 2006.229.21:39:03.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:03.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:03.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:39:03.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:39:03.28$vck44/va=7,5 2006.229.21:39:03.28#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.21:39:03.28#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.21:39:03.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:03.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:03.34#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:03.34#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:03.34#ibcon#enter wrdev, iclass 11, count 2 2006.229.21:39:03.34#ibcon#first serial, iclass 11, count 2 2006.229.21:39:03.34#ibcon#enter sib2, iclass 11, count 2 2006.229.21:39:03.34#ibcon#flushed, iclass 11, count 2 2006.229.21:39:03.34#ibcon#about to write, iclass 11, count 2 2006.229.21:39:03.34#ibcon#wrote, iclass 11, count 2 2006.229.21:39:03.34#ibcon#about to read 3, iclass 11, count 2 2006.229.21:39:03.36#ibcon#read 3, iclass 11, count 2 2006.229.21:39:03.36#ibcon#about to read 4, iclass 11, count 2 2006.229.21:39:03.36#ibcon#read 4, iclass 11, count 2 2006.229.21:39:03.36#ibcon#about to read 5, iclass 11, count 2 2006.229.21:39:03.36#ibcon#read 5, iclass 11, count 2 2006.229.21:39:03.36#ibcon#about to read 6, iclass 11, count 2 2006.229.21:39:03.36#ibcon#read 6, iclass 11, count 2 2006.229.21:39:03.36#ibcon#end of sib2, iclass 11, count 2 2006.229.21:39:03.36#ibcon#*mode == 0, iclass 11, count 2 2006.229.21:39:03.36#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.21:39:03.36#ibcon#[25=AT07-05\r\n] 2006.229.21:39:03.36#ibcon#*before write, iclass 11, count 2 2006.229.21:39:03.36#ibcon#enter sib2, iclass 11, count 2 2006.229.21:39:03.36#ibcon#flushed, iclass 11, count 2 2006.229.21:39:03.36#ibcon#about to write, iclass 11, count 2 2006.229.21:39:03.36#ibcon#wrote, iclass 11, count 2 2006.229.21:39:03.36#ibcon#about to read 3, iclass 11, count 2 2006.229.21:39:03.39#ibcon#read 3, iclass 11, count 2 2006.229.21:39:03.39#ibcon#about to read 4, iclass 11, count 2 2006.229.21:39:03.39#ibcon#read 4, iclass 11, count 2 2006.229.21:39:03.39#ibcon#about to read 5, iclass 11, count 2 2006.229.21:39:03.39#ibcon#read 5, iclass 11, count 2 2006.229.21:39:03.39#ibcon#about to read 6, iclass 11, count 2 2006.229.21:39:03.39#ibcon#read 6, iclass 11, count 2 2006.229.21:39:03.39#ibcon#end of sib2, iclass 11, count 2 2006.229.21:39:03.39#ibcon#*after write, iclass 11, count 2 2006.229.21:39:03.39#ibcon#*before return 0, iclass 11, count 2 2006.229.21:39:03.39#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:03.39#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:03.39#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.21:39:03.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:03.39#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:03.51#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:03.51#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:03.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:39:03.51#ibcon#first serial, iclass 11, count 0 2006.229.21:39:03.51#ibcon#enter sib2, iclass 11, count 0 2006.229.21:39:03.51#ibcon#flushed, iclass 11, count 0 2006.229.21:39:03.51#ibcon#about to write, iclass 11, count 0 2006.229.21:39:03.51#ibcon#wrote, iclass 11, count 0 2006.229.21:39:03.51#ibcon#about to read 3, iclass 11, count 0 2006.229.21:39:03.53#ibcon#read 3, iclass 11, count 0 2006.229.21:39:03.53#ibcon#about to read 4, iclass 11, count 0 2006.229.21:39:03.53#ibcon#read 4, iclass 11, count 0 2006.229.21:39:03.53#ibcon#about to read 5, iclass 11, count 0 2006.229.21:39:03.53#ibcon#read 5, iclass 11, count 0 2006.229.21:39:03.53#ibcon#about to read 6, iclass 11, count 0 2006.229.21:39:03.53#ibcon#read 6, iclass 11, count 0 2006.229.21:39:03.53#ibcon#end of sib2, iclass 11, count 0 2006.229.21:39:03.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:39:03.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:39:03.53#ibcon#[25=USB\r\n] 2006.229.21:39:03.53#ibcon#*before write, iclass 11, count 0 2006.229.21:39:03.53#ibcon#enter sib2, iclass 11, count 0 2006.229.21:39:03.53#ibcon#flushed, iclass 11, count 0 2006.229.21:39:03.53#ibcon#about to write, iclass 11, count 0 2006.229.21:39:03.53#ibcon#wrote, iclass 11, count 0 2006.229.21:39:03.53#ibcon#about to read 3, iclass 11, count 0 2006.229.21:39:03.56#ibcon#read 3, iclass 11, count 0 2006.229.21:39:03.56#ibcon#about to read 4, iclass 11, count 0 2006.229.21:39:03.56#ibcon#read 4, iclass 11, count 0 2006.229.21:39:03.56#ibcon#about to read 5, iclass 11, count 0 2006.229.21:39:03.56#ibcon#read 5, iclass 11, count 0 2006.229.21:39:03.56#ibcon#about to read 6, iclass 11, count 0 2006.229.21:39:03.56#ibcon#read 6, iclass 11, count 0 2006.229.21:39:03.56#ibcon#end of sib2, iclass 11, count 0 2006.229.21:39:03.56#ibcon#*after write, iclass 11, count 0 2006.229.21:39:03.56#ibcon#*before return 0, iclass 11, count 0 2006.229.21:39:03.56#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:03.56#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:03.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:39:03.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:39:03.56$vck44/valo=8,884.99 2006.229.21:39:03.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.21:39:03.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.21:39:03.56#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:03.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:03.56#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:03.56#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:03.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:39:03.56#ibcon#first serial, iclass 13, count 0 2006.229.21:39:03.56#ibcon#enter sib2, iclass 13, count 0 2006.229.21:39:03.56#ibcon#flushed, iclass 13, count 0 2006.229.21:39:03.56#ibcon#about to write, iclass 13, count 0 2006.229.21:39:03.56#ibcon#wrote, iclass 13, count 0 2006.229.21:39:03.56#ibcon#about to read 3, iclass 13, count 0 2006.229.21:39:03.58#ibcon#read 3, iclass 13, count 0 2006.229.21:39:03.58#ibcon#about to read 4, iclass 13, count 0 2006.229.21:39:03.58#ibcon#read 4, iclass 13, count 0 2006.229.21:39:03.58#ibcon#about to read 5, iclass 13, count 0 2006.229.21:39:03.58#ibcon#read 5, iclass 13, count 0 2006.229.21:39:03.58#ibcon#about to read 6, iclass 13, count 0 2006.229.21:39:03.58#ibcon#read 6, iclass 13, count 0 2006.229.21:39:03.58#ibcon#end of sib2, iclass 13, count 0 2006.229.21:39:03.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:39:03.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:39:03.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:39:03.58#ibcon#*before write, iclass 13, count 0 2006.229.21:39:03.58#ibcon#enter sib2, iclass 13, count 0 2006.229.21:39:03.58#ibcon#flushed, iclass 13, count 0 2006.229.21:39:03.58#ibcon#about to write, iclass 13, count 0 2006.229.21:39:03.58#ibcon#wrote, iclass 13, count 0 2006.229.21:39:03.58#ibcon#about to read 3, iclass 13, count 0 2006.229.21:39:03.62#ibcon#read 3, iclass 13, count 0 2006.229.21:39:03.62#ibcon#about to read 4, iclass 13, count 0 2006.229.21:39:03.62#ibcon#read 4, iclass 13, count 0 2006.229.21:39:03.62#ibcon#about to read 5, iclass 13, count 0 2006.229.21:39:03.62#ibcon#read 5, iclass 13, count 0 2006.229.21:39:03.62#ibcon#about to read 6, iclass 13, count 0 2006.229.21:39:03.62#ibcon#read 6, iclass 13, count 0 2006.229.21:39:03.62#ibcon#end of sib2, iclass 13, count 0 2006.229.21:39:03.62#ibcon#*after write, iclass 13, count 0 2006.229.21:39:03.62#ibcon#*before return 0, iclass 13, count 0 2006.229.21:39:03.62#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:03.62#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:03.62#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:39:03.62#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:39:03.62$vck44/va=8,6 2006.229.21:39:03.62#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.21:39:03.62#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.21:39:03.62#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:03.62#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:39:03.68#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:39:03.68#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:39:03.68#ibcon#enter wrdev, iclass 15, count 2 2006.229.21:39:03.68#ibcon#first serial, iclass 15, count 2 2006.229.21:39:03.68#ibcon#enter sib2, iclass 15, count 2 2006.229.21:39:03.68#ibcon#flushed, iclass 15, count 2 2006.229.21:39:03.68#ibcon#about to write, iclass 15, count 2 2006.229.21:39:03.68#ibcon#wrote, iclass 15, count 2 2006.229.21:39:03.68#ibcon#about to read 3, iclass 15, count 2 2006.229.21:39:03.70#ibcon#read 3, iclass 15, count 2 2006.229.21:39:03.70#ibcon#about to read 4, iclass 15, count 2 2006.229.21:39:03.70#ibcon#read 4, iclass 15, count 2 2006.229.21:39:03.70#ibcon#about to read 5, iclass 15, count 2 2006.229.21:39:03.70#ibcon#read 5, iclass 15, count 2 2006.229.21:39:03.70#ibcon#about to read 6, iclass 15, count 2 2006.229.21:39:03.70#ibcon#read 6, iclass 15, count 2 2006.229.21:39:03.70#ibcon#end of sib2, iclass 15, count 2 2006.229.21:39:03.70#ibcon#*mode == 0, iclass 15, count 2 2006.229.21:39:03.70#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.21:39:03.70#ibcon#[25=AT08-06\r\n] 2006.229.21:39:03.70#ibcon#*before write, iclass 15, count 2 2006.229.21:39:03.70#ibcon#enter sib2, iclass 15, count 2 2006.229.21:39:03.70#ibcon#flushed, iclass 15, count 2 2006.229.21:39:03.70#ibcon#about to write, iclass 15, count 2 2006.229.21:39:03.70#ibcon#wrote, iclass 15, count 2 2006.229.21:39:03.70#ibcon#about to read 3, iclass 15, count 2 2006.229.21:39:03.73#ibcon#read 3, iclass 15, count 2 2006.229.21:39:03.73#ibcon#about to read 4, iclass 15, count 2 2006.229.21:39:03.73#ibcon#read 4, iclass 15, count 2 2006.229.21:39:03.73#ibcon#about to read 5, iclass 15, count 2 2006.229.21:39:03.73#ibcon#read 5, iclass 15, count 2 2006.229.21:39:03.73#ibcon#about to read 6, iclass 15, count 2 2006.229.21:39:03.73#ibcon#read 6, iclass 15, count 2 2006.229.21:39:03.73#ibcon#end of sib2, iclass 15, count 2 2006.229.21:39:03.73#ibcon#*after write, iclass 15, count 2 2006.229.21:39:03.73#ibcon#*before return 0, iclass 15, count 2 2006.229.21:39:03.73#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:39:03.73#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.21:39:03.73#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.21:39:03.73#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:03.73#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:39:03.85#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:39:03.85#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:39:03.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:39:03.85#ibcon#first serial, iclass 15, count 0 2006.229.21:39:03.85#ibcon#enter sib2, iclass 15, count 0 2006.229.21:39:03.85#ibcon#flushed, iclass 15, count 0 2006.229.21:39:03.85#ibcon#about to write, iclass 15, count 0 2006.229.21:39:03.85#ibcon#wrote, iclass 15, count 0 2006.229.21:39:03.85#ibcon#about to read 3, iclass 15, count 0 2006.229.21:39:03.87#ibcon#read 3, iclass 15, count 0 2006.229.21:39:03.87#ibcon#about to read 4, iclass 15, count 0 2006.229.21:39:03.87#ibcon#read 4, iclass 15, count 0 2006.229.21:39:03.87#ibcon#about to read 5, iclass 15, count 0 2006.229.21:39:03.87#ibcon#read 5, iclass 15, count 0 2006.229.21:39:03.87#ibcon#about to read 6, iclass 15, count 0 2006.229.21:39:03.87#ibcon#read 6, iclass 15, count 0 2006.229.21:39:03.87#ibcon#end of sib2, iclass 15, count 0 2006.229.21:39:03.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:39:03.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:39:03.87#ibcon#[25=USB\r\n] 2006.229.21:39:03.87#ibcon#*before write, iclass 15, count 0 2006.229.21:39:03.87#ibcon#enter sib2, iclass 15, count 0 2006.229.21:39:03.87#ibcon#flushed, iclass 15, count 0 2006.229.21:39:03.87#ibcon#about to write, iclass 15, count 0 2006.229.21:39:03.87#ibcon#wrote, iclass 15, count 0 2006.229.21:39:03.87#ibcon#about to read 3, iclass 15, count 0 2006.229.21:39:03.90#ibcon#read 3, iclass 15, count 0 2006.229.21:39:03.90#ibcon#about to read 4, iclass 15, count 0 2006.229.21:39:03.90#ibcon#read 4, iclass 15, count 0 2006.229.21:39:03.90#ibcon#about to read 5, iclass 15, count 0 2006.229.21:39:03.90#ibcon#read 5, iclass 15, count 0 2006.229.21:39:03.90#ibcon#about to read 6, iclass 15, count 0 2006.229.21:39:03.90#ibcon#read 6, iclass 15, count 0 2006.229.21:39:03.90#ibcon#end of sib2, iclass 15, count 0 2006.229.21:39:03.90#ibcon#*after write, iclass 15, count 0 2006.229.21:39:03.90#ibcon#*before return 0, iclass 15, count 0 2006.229.21:39:03.90#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:39:03.90#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.21:39:03.90#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:39:03.90#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:39:03.90$vck44/vblo=1,629.99 2006.229.21:39:03.90#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.21:39:03.90#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.21:39:03.90#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:03.90#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:39:03.90#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:39:03.90#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:39:03.90#ibcon#enter wrdev, iclass 17, count 0 2006.229.21:39:03.90#ibcon#first serial, iclass 17, count 0 2006.229.21:39:03.90#ibcon#enter sib2, iclass 17, count 0 2006.229.21:39:03.90#ibcon#flushed, iclass 17, count 0 2006.229.21:39:03.90#ibcon#about to write, iclass 17, count 0 2006.229.21:39:03.90#ibcon#wrote, iclass 17, count 0 2006.229.21:39:03.90#ibcon#about to read 3, iclass 17, count 0 2006.229.21:39:03.92#ibcon#read 3, iclass 17, count 0 2006.229.21:39:03.92#ibcon#about to read 4, iclass 17, count 0 2006.229.21:39:03.92#ibcon#read 4, iclass 17, count 0 2006.229.21:39:03.92#ibcon#about to read 5, iclass 17, count 0 2006.229.21:39:03.92#ibcon#read 5, iclass 17, count 0 2006.229.21:39:03.92#ibcon#about to read 6, iclass 17, count 0 2006.229.21:39:03.92#ibcon#read 6, iclass 17, count 0 2006.229.21:39:03.92#ibcon#end of sib2, iclass 17, count 0 2006.229.21:39:03.92#ibcon#*mode == 0, iclass 17, count 0 2006.229.21:39:03.92#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.21:39:03.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:39:03.92#ibcon#*before write, iclass 17, count 0 2006.229.21:39:03.92#ibcon#enter sib2, iclass 17, count 0 2006.229.21:39:03.92#ibcon#flushed, iclass 17, count 0 2006.229.21:39:03.92#ibcon#about to write, iclass 17, count 0 2006.229.21:39:03.92#ibcon#wrote, iclass 17, count 0 2006.229.21:39:03.92#ibcon#about to read 3, iclass 17, count 0 2006.229.21:39:03.96#ibcon#read 3, iclass 17, count 0 2006.229.21:39:03.96#ibcon#about to read 4, iclass 17, count 0 2006.229.21:39:03.96#ibcon#read 4, iclass 17, count 0 2006.229.21:39:03.96#ibcon#about to read 5, iclass 17, count 0 2006.229.21:39:03.96#ibcon#read 5, iclass 17, count 0 2006.229.21:39:03.96#ibcon#about to read 6, iclass 17, count 0 2006.229.21:39:03.96#ibcon#read 6, iclass 17, count 0 2006.229.21:39:03.96#ibcon#end of sib2, iclass 17, count 0 2006.229.21:39:03.96#ibcon#*after write, iclass 17, count 0 2006.229.21:39:03.96#ibcon#*before return 0, iclass 17, count 0 2006.229.21:39:03.96#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:39:03.96#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.21:39:03.96#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.21:39:03.96#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.21:39:03.96$vck44/vb=1,4 2006.229.21:39:03.96#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.21:39:03.96#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.21:39:03.96#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:03.96#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:39:03.96#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:39:03.96#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:39:03.96#ibcon#enter wrdev, iclass 19, count 2 2006.229.21:39:03.96#ibcon#first serial, iclass 19, count 2 2006.229.21:39:03.96#ibcon#enter sib2, iclass 19, count 2 2006.229.21:39:03.96#ibcon#flushed, iclass 19, count 2 2006.229.21:39:03.96#ibcon#about to write, iclass 19, count 2 2006.229.21:39:03.96#ibcon#wrote, iclass 19, count 2 2006.229.21:39:03.96#ibcon#about to read 3, iclass 19, count 2 2006.229.21:39:03.98#ibcon#read 3, iclass 19, count 2 2006.229.21:39:03.98#ibcon#about to read 4, iclass 19, count 2 2006.229.21:39:03.98#ibcon#read 4, iclass 19, count 2 2006.229.21:39:03.98#ibcon#about to read 5, iclass 19, count 2 2006.229.21:39:03.98#ibcon#read 5, iclass 19, count 2 2006.229.21:39:03.98#ibcon#about to read 6, iclass 19, count 2 2006.229.21:39:03.98#ibcon#read 6, iclass 19, count 2 2006.229.21:39:03.98#ibcon#end of sib2, iclass 19, count 2 2006.229.21:39:03.98#ibcon#*mode == 0, iclass 19, count 2 2006.229.21:39:03.98#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.21:39:03.98#ibcon#[27=AT01-04\r\n] 2006.229.21:39:03.98#ibcon#*before write, iclass 19, count 2 2006.229.21:39:03.98#ibcon#enter sib2, iclass 19, count 2 2006.229.21:39:03.98#ibcon#flushed, iclass 19, count 2 2006.229.21:39:03.98#ibcon#about to write, iclass 19, count 2 2006.229.21:39:03.98#ibcon#wrote, iclass 19, count 2 2006.229.21:39:03.98#ibcon#about to read 3, iclass 19, count 2 2006.229.21:39:04.01#ibcon#read 3, iclass 19, count 2 2006.229.21:39:04.01#ibcon#about to read 4, iclass 19, count 2 2006.229.21:39:04.01#ibcon#read 4, iclass 19, count 2 2006.229.21:39:04.01#ibcon#about to read 5, iclass 19, count 2 2006.229.21:39:04.01#ibcon#read 5, iclass 19, count 2 2006.229.21:39:04.01#ibcon#about to read 6, iclass 19, count 2 2006.229.21:39:04.01#ibcon#read 6, iclass 19, count 2 2006.229.21:39:04.01#ibcon#end of sib2, iclass 19, count 2 2006.229.21:39:04.01#ibcon#*after write, iclass 19, count 2 2006.229.21:39:04.01#ibcon#*before return 0, iclass 19, count 2 2006.229.21:39:04.01#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:39:04.01#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.21:39:04.01#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.21:39:04.01#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:04.01#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:39:04.13#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:39:04.13#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:39:04.13#ibcon#enter wrdev, iclass 19, count 0 2006.229.21:39:04.13#ibcon#first serial, iclass 19, count 0 2006.229.21:39:04.13#ibcon#enter sib2, iclass 19, count 0 2006.229.21:39:04.13#ibcon#flushed, iclass 19, count 0 2006.229.21:39:04.13#ibcon#about to write, iclass 19, count 0 2006.229.21:39:04.13#ibcon#wrote, iclass 19, count 0 2006.229.21:39:04.13#ibcon#about to read 3, iclass 19, count 0 2006.229.21:39:04.15#ibcon#read 3, iclass 19, count 0 2006.229.21:39:04.15#ibcon#about to read 4, iclass 19, count 0 2006.229.21:39:04.15#ibcon#read 4, iclass 19, count 0 2006.229.21:39:04.15#ibcon#about to read 5, iclass 19, count 0 2006.229.21:39:04.15#ibcon#read 5, iclass 19, count 0 2006.229.21:39:04.15#ibcon#about to read 6, iclass 19, count 0 2006.229.21:39:04.15#ibcon#read 6, iclass 19, count 0 2006.229.21:39:04.15#ibcon#end of sib2, iclass 19, count 0 2006.229.21:39:04.15#ibcon#*mode == 0, iclass 19, count 0 2006.229.21:39:04.15#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.21:39:04.15#ibcon#[27=USB\r\n] 2006.229.21:39:04.15#ibcon#*before write, iclass 19, count 0 2006.229.21:39:04.15#ibcon#enter sib2, iclass 19, count 0 2006.229.21:39:04.15#ibcon#flushed, iclass 19, count 0 2006.229.21:39:04.15#ibcon#about to write, iclass 19, count 0 2006.229.21:39:04.15#ibcon#wrote, iclass 19, count 0 2006.229.21:39:04.15#ibcon#about to read 3, iclass 19, count 0 2006.229.21:39:04.18#ibcon#read 3, iclass 19, count 0 2006.229.21:39:04.18#ibcon#about to read 4, iclass 19, count 0 2006.229.21:39:04.18#ibcon#read 4, iclass 19, count 0 2006.229.21:39:04.18#ibcon#about to read 5, iclass 19, count 0 2006.229.21:39:04.18#ibcon#read 5, iclass 19, count 0 2006.229.21:39:04.18#ibcon#about to read 6, iclass 19, count 0 2006.229.21:39:04.18#ibcon#read 6, iclass 19, count 0 2006.229.21:39:04.18#ibcon#end of sib2, iclass 19, count 0 2006.229.21:39:04.18#ibcon#*after write, iclass 19, count 0 2006.229.21:39:04.18#ibcon#*before return 0, iclass 19, count 0 2006.229.21:39:04.18#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:39:04.18#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.21:39:04.18#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.21:39:04.18#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.21:39:04.18$vck44/vblo=2,634.99 2006.229.21:39:04.18#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.21:39:04.18#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.21:39:04.18#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:04.18#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:04.18#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:04.18#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:04.18#ibcon#enter wrdev, iclass 21, count 0 2006.229.21:39:04.18#ibcon#first serial, iclass 21, count 0 2006.229.21:39:04.18#ibcon#enter sib2, iclass 21, count 0 2006.229.21:39:04.18#ibcon#flushed, iclass 21, count 0 2006.229.21:39:04.18#ibcon#about to write, iclass 21, count 0 2006.229.21:39:04.18#ibcon#wrote, iclass 21, count 0 2006.229.21:39:04.18#ibcon#about to read 3, iclass 21, count 0 2006.229.21:39:04.20#ibcon#read 3, iclass 21, count 0 2006.229.21:39:04.20#ibcon#about to read 4, iclass 21, count 0 2006.229.21:39:04.20#ibcon#read 4, iclass 21, count 0 2006.229.21:39:04.20#ibcon#about to read 5, iclass 21, count 0 2006.229.21:39:04.20#ibcon#read 5, iclass 21, count 0 2006.229.21:39:04.20#ibcon#about to read 6, iclass 21, count 0 2006.229.21:39:04.20#ibcon#read 6, iclass 21, count 0 2006.229.21:39:04.20#ibcon#end of sib2, iclass 21, count 0 2006.229.21:39:04.20#ibcon#*mode == 0, iclass 21, count 0 2006.229.21:39:04.20#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.21:39:04.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:39:04.20#ibcon#*before write, iclass 21, count 0 2006.229.21:39:04.20#ibcon#enter sib2, iclass 21, count 0 2006.229.21:39:04.20#ibcon#flushed, iclass 21, count 0 2006.229.21:39:04.20#ibcon#about to write, iclass 21, count 0 2006.229.21:39:04.20#ibcon#wrote, iclass 21, count 0 2006.229.21:39:04.20#ibcon#about to read 3, iclass 21, count 0 2006.229.21:39:04.24#ibcon#read 3, iclass 21, count 0 2006.229.21:39:04.24#ibcon#about to read 4, iclass 21, count 0 2006.229.21:39:04.24#ibcon#read 4, iclass 21, count 0 2006.229.21:39:04.24#ibcon#about to read 5, iclass 21, count 0 2006.229.21:39:04.24#ibcon#read 5, iclass 21, count 0 2006.229.21:39:04.24#ibcon#about to read 6, iclass 21, count 0 2006.229.21:39:04.24#ibcon#read 6, iclass 21, count 0 2006.229.21:39:04.24#ibcon#end of sib2, iclass 21, count 0 2006.229.21:39:04.24#ibcon#*after write, iclass 21, count 0 2006.229.21:39:04.24#ibcon#*before return 0, iclass 21, count 0 2006.229.21:39:04.24#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:04.24#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.21:39:04.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.21:39:04.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.21:39:04.24$vck44/vb=2,4 2006.229.21:39:04.24#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.21:39:04.24#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.21:39:04.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:04.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:04.30#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:04.30#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:04.30#ibcon#enter wrdev, iclass 23, count 2 2006.229.21:39:04.30#ibcon#first serial, iclass 23, count 2 2006.229.21:39:04.30#ibcon#enter sib2, iclass 23, count 2 2006.229.21:39:04.30#ibcon#flushed, iclass 23, count 2 2006.229.21:39:04.30#ibcon#about to write, iclass 23, count 2 2006.229.21:39:04.30#ibcon#wrote, iclass 23, count 2 2006.229.21:39:04.30#ibcon#about to read 3, iclass 23, count 2 2006.229.21:39:04.32#ibcon#read 3, iclass 23, count 2 2006.229.21:39:04.32#ibcon#about to read 4, iclass 23, count 2 2006.229.21:39:04.32#ibcon#read 4, iclass 23, count 2 2006.229.21:39:04.32#ibcon#about to read 5, iclass 23, count 2 2006.229.21:39:04.32#ibcon#read 5, iclass 23, count 2 2006.229.21:39:04.32#ibcon#about to read 6, iclass 23, count 2 2006.229.21:39:04.32#ibcon#read 6, iclass 23, count 2 2006.229.21:39:04.32#ibcon#end of sib2, iclass 23, count 2 2006.229.21:39:04.32#ibcon#*mode == 0, iclass 23, count 2 2006.229.21:39:04.32#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.21:39:04.32#ibcon#[27=AT02-04\r\n] 2006.229.21:39:04.32#ibcon#*before write, iclass 23, count 2 2006.229.21:39:04.32#ibcon#enter sib2, iclass 23, count 2 2006.229.21:39:04.32#ibcon#flushed, iclass 23, count 2 2006.229.21:39:04.32#ibcon#about to write, iclass 23, count 2 2006.229.21:39:04.32#ibcon#wrote, iclass 23, count 2 2006.229.21:39:04.32#ibcon#about to read 3, iclass 23, count 2 2006.229.21:39:04.35#ibcon#read 3, iclass 23, count 2 2006.229.21:39:04.35#ibcon#about to read 4, iclass 23, count 2 2006.229.21:39:04.35#ibcon#read 4, iclass 23, count 2 2006.229.21:39:04.35#ibcon#about to read 5, iclass 23, count 2 2006.229.21:39:04.35#ibcon#read 5, iclass 23, count 2 2006.229.21:39:04.35#ibcon#about to read 6, iclass 23, count 2 2006.229.21:39:04.35#ibcon#read 6, iclass 23, count 2 2006.229.21:39:04.35#ibcon#end of sib2, iclass 23, count 2 2006.229.21:39:04.35#ibcon#*after write, iclass 23, count 2 2006.229.21:39:04.35#ibcon#*before return 0, iclass 23, count 2 2006.229.21:39:04.35#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:04.35#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.21:39:04.35#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.21:39:04.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:04.35#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:04.47#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:04.47#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:04.47#ibcon#enter wrdev, iclass 23, count 0 2006.229.21:39:04.47#ibcon#first serial, iclass 23, count 0 2006.229.21:39:04.47#ibcon#enter sib2, iclass 23, count 0 2006.229.21:39:04.47#ibcon#flushed, iclass 23, count 0 2006.229.21:39:04.47#ibcon#about to write, iclass 23, count 0 2006.229.21:39:04.47#ibcon#wrote, iclass 23, count 0 2006.229.21:39:04.47#ibcon#about to read 3, iclass 23, count 0 2006.229.21:39:04.49#ibcon#read 3, iclass 23, count 0 2006.229.21:39:04.49#ibcon#about to read 4, iclass 23, count 0 2006.229.21:39:04.49#ibcon#read 4, iclass 23, count 0 2006.229.21:39:04.49#ibcon#about to read 5, iclass 23, count 0 2006.229.21:39:04.49#ibcon#read 5, iclass 23, count 0 2006.229.21:39:04.49#ibcon#about to read 6, iclass 23, count 0 2006.229.21:39:04.49#ibcon#read 6, iclass 23, count 0 2006.229.21:39:04.49#ibcon#end of sib2, iclass 23, count 0 2006.229.21:39:04.49#ibcon#*mode == 0, iclass 23, count 0 2006.229.21:39:04.49#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.21:39:04.49#ibcon#[27=USB\r\n] 2006.229.21:39:04.49#ibcon#*before write, iclass 23, count 0 2006.229.21:39:04.49#ibcon#enter sib2, iclass 23, count 0 2006.229.21:39:04.49#ibcon#flushed, iclass 23, count 0 2006.229.21:39:04.49#ibcon#about to write, iclass 23, count 0 2006.229.21:39:04.49#ibcon#wrote, iclass 23, count 0 2006.229.21:39:04.49#ibcon#about to read 3, iclass 23, count 0 2006.229.21:39:04.52#ibcon#read 3, iclass 23, count 0 2006.229.21:39:04.52#ibcon#about to read 4, iclass 23, count 0 2006.229.21:39:04.52#ibcon#read 4, iclass 23, count 0 2006.229.21:39:04.52#ibcon#about to read 5, iclass 23, count 0 2006.229.21:39:04.52#ibcon#read 5, iclass 23, count 0 2006.229.21:39:04.52#ibcon#about to read 6, iclass 23, count 0 2006.229.21:39:04.52#ibcon#read 6, iclass 23, count 0 2006.229.21:39:04.52#ibcon#end of sib2, iclass 23, count 0 2006.229.21:39:04.52#ibcon#*after write, iclass 23, count 0 2006.229.21:39:04.52#ibcon#*before return 0, iclass 23, count 0 2006.229.21:39:04.52#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:04.52#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.21:39:04.52#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.21:39:04.52#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.21:39:04.52$vck44/vblo=3,649.99 2006.229.21:39:04.52#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.21:39:04.52#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.21:39:04.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:04.52#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:04.52#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:04.52#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:04.52#ibcon#enter wrdev, iclass 25, count 0 2006.229.21:39:04.52#ibcon#first serial, iclass 25, count 0 2006.229.21:39:04.52#ibcon#enter sib2, iclass 25, count 0 2006.229.21:39:04.52#ibcon#flushed, iclass 25, count 0 2006.229.21:39:04.52#ibcon#about to write, iclass 25, count 0 2006.229.21:39:04.52#ibcon#wrote, iclass 25, count 0 2006.229.21:39:04.52#ibcon#about to read 3, iclass 25, count 0 2006.229.21:39:04.54#ibcon#read 3, iclass 25, count 0 2006.229.21:39:04.54#ibcon#about to read 4, iclass 25, count 0 2006.229.21:39:04.54#ibcon#read 4, iclass 25, count 0 2006.229.21:39:04.54#ibcon#about to read 5, iclass 25, count 0 2006.229.21:39:04.54#ibcon#read 5, iclass 25, count 0 2006.229.21:39:04.54#ibcon#about to read 6, iclass 25, count 0 2006.229.21:39:04.54#ibcon#read 6, iclass 25, count 0 2006.229.21:39:04.54#ibcon#end of sib2, iclass 25, count 0 2006.229.21:39:04.54#ibcon#*mode == 0, iclass 25, count 0 2006.229.21:39:04.54#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.21:39:04.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:39:04.54#ibcon#*before write, iclass 25, count 0 2006.229.21:39:04.54#ibcon#enter sib2, iclass 25, count 0 2006.229.21:39:04.54#ibcon#flushed, iclass 25, count 0 2006.229.21:39:04.54#ibcon#about to write, iclass 25, count 0 2006.229.21:39:04.54#ibcon#wrote, iclass 25, count 0 2006.229.21:39:04.54#ibcon#about to read 3, iclass 25, count 0 2006.229.21:39:04.58#ibcon#read 3, iclass 25, count 0 2006.229.21:39:04.58#ibcon#about to read 4, iclass 25, count 0 2006.229.21:39:04.58#ibcon#read 4, iclass 25, count 0 2006.229.21:39:04.58#ibcon#about to read 5, iclass 25, count 0 2006.229.21:39:04.58#ibcon#read 5, iclass 25, count 0 2006.229.21:39:04.58#ibcon#about to read 6, iclass 25, count 0 2006.229.21:39:04.58#ibcon#read 6, iclass 25, count 0 2006.229.21:39:04.58#ibcon#end of sib2, iclass 25, count 0 2006.229.21:39:04.58#ibcon#*after write, iclass 25, count 0 2006.229.21:39:04.58#ibcon#*before return 0, iclass 25, count 0 2006.229.21:39:04.58#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:04.58#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.21:39:04.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.21:39:04.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.21:39:04.58$vck44/vb=3,4 2006.229.21:39:04.58#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.21:39:04.58#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.21:39:04.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:04.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:04.64#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:04.64#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:04.64#ibcon#enter wrdev, iclass 27, count 2 2006.229.21:39:04.64#ibcon#first serial, iclass 27, count 2 2006.229.21:39:04.64#ibcon#enter sib2, iclass 27, count 2 2006.229.21:39:04.64#ibcon#flushed, iclass 27, count 2 2006.229.21:39:04.64#ibcon#about to write, iclass 27, count 2 2006.229.21:39:04.64#ibcon#wrote, iclass 27, count 2 2006.229.21:39:04.64#ibcon#about to read 3, iclass 27, count 2 2006.229.21:39:04.66#ibcon#read 3, iclass 27, count 2 2006.229.21:39:04.66#ibcon#about to read 4, iclass 27, count 2 2006.229.21:39:04.66#ibcon#read 4, iclass 27, count 2 2006.229.21:39:04.66#ibcon#about to read 5, iclass 27, count 2 2006.229.21:39:04.66#ibcon#read 5, iclass 27, count 2 2006.229.21:39:04.66#ibcon#about to read 6, iclass 27, count 2 2006.229.21:39:04.66#ibcon#read 6, iclass 27, count 2 2006.229.21:39:04.66#ibcon#end of sib2, iclass 27, count 2 2006.229.21:39:04.66#ibcon#*mode == 0, iclass 27, count 2 2006.229.21:39:04.66#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.21:39:04.66#ibcon#[27=AT03-04\r\n] 2006.229.21:39:04.66#ibcon#*before write, iclass 27, count 2 2006.229.21:39:04.66#ibcon#enter sib2, iclass 27, count 2 2006.229.21:39:04.66#ibcon#flushed, iclass 27, count 2 2006.229.21:39:04.66#ibcon#about to write, iclass 27, count 2 2006.229.21:39:04.66#ibcon#wrote, iclass 27, count 2 2006.229.21:39:04.66#ibcon#about to read 3, iclass 27, count 2 2006.229.21:39:04.69#ibcon#read 3, iclass 27, count 2 2006.229.21:39:04.69#ibcon#about to read 4, iclass 27, count 2 2006.229.21:39:04.69#ibcon#read 4, iclass 27, count 2 2006.229.21:39:04.69#ibcon#about to read 5, iclass 27, count 2 2006.229.21:39:04.69#ibcon#read 5, iclass 27, count 2 2006.229.21:39:04.69#ibcon#about to read 6, iclass 27, count 2 2006.229.21:39:04.69#ibcon#read 6, iclass 27, count 2 2006.229.21:39:04.69#ibcon#end of sib2, iclass 27, count 2 2006.229.21:39:04.69#ibcon#*after write, iclass 27, count 2 2006.229.21:39:04.69#ibcon#*before return 0, iclass 27, count 2 2006.229.21:39:04.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:04.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.21:39:04.69#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.21:39:04.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:04.69#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:04.81#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:04.81#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:04.81#ibcon#enter wrdev, iclass 27, count 0 2006.229.21:39:04.81#ibcon#first serial, iclass 27, count 0 2006.229.21:39:04.81#ibcon#enter sib2, iclass 27, count 0 2006.229.21:39:04.81#ibcon#flushed, iclass 27, count 0 2006.229.21:39:04.81#ibcon#about to write, iclass 27, count 0 2006.229.21:39:04.81#ibcon#wrote, iclass 27, count 0 2006.229.21:39:04.81#ibcon#about to read 3, iclass 27, count 0 2006.229.21:39:04.83#ibcon#read 3, iclass 27, count 0 2006.229.21:39:04.83#ibcon#about to read 4, iclass 27, count 0 2006.229.21:39:04.83#ibcon#read 4, iclass 27, count 0 2006.229.21:39:04.83#ibcon#about to read 5, iclass 27, count 0 2006.229.21:39:04.83#ibcon#read 5, iclass 27, count 0 2006.229.21:39:04.83#ibcon#about to read 6, iclass 27, count 0 2006.229.21:39:04.83#ibcon#read 6, iclass 27, count 0 2006.229.21:39:04.83#ibcon#end of sib2, iclass 27, count 0 2006.229.21:39:04.83#ibcon#*mode == 0, iclass 27, count 0 2006.229.21:39:04.83#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.21:39:04.83#ibcon#[27=USB\r\n] 2006.229.21:39:04.83#ibcon#*before write, iclass 27, count 0 2006.229.21:39:04.83#ibcon#enter sib2, iclass 27, count 0 2006.229.21:39:04.83#ibcon#flushed, iclass 27, count 0 2006.229.21:39:04.83#ibcon#about to write, iclass 27, count 0 2006.229.21:39:04.83#ibcon#wrote, iclass 27, count 0 2006.229.21:39:04.83#ibcon#about to read 3, iclass 27, count 0 2006.229.21:39:04.86#ibcon#read 3, iclass 27, count 0 2006.229.21:39:04.86#ibcon#about to read 4, iclass 27, count 0 2006.229.21:39:04.86#ibcon#read 4, iclass 27, count 0 2006.229.21:39:04.86#ibcon#about to read 5, iclass 27, count 0 2006.229.21:39:04.86#ibcon#read 5, iclass 27, count 0 2006.229.21:39:04.86#ibcon#about to read 6, iclass 27, count 0 2006.229.21:39:04.86#ibcon#read 6, iclass 27, count 0 2006.229.21:39:04.86#ibcon#end of sib2, iclass 27, count 0 2006.229.21:39:04.86#ibcon#*after write, iclass 27, count 0 2006.229.21:39:04.86#ibcon#*before return 0, iclass 27, count 0 2006.229.21:39:04.86#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:04.86#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.21:39:04.86#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.21:39:04.86#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.21:39:04.86$vck44/vblo=4,679.99 2006.229.21:39:04.86#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.21:39:04.86#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.21:39:04.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:04.86#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:04.86#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:04.86#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:04.86#ibcon#enter wrdev, iclass 29, count 0 2006.229.21:39:04.86#ibcon#first serial, iclass 29, count 0 2006.229.21:39:04.86#ibcon#enter sib2, iclass 29, count 0 2006.229.21:39:04.86#ibcon#flushed, iclass 29, count 0 2006.229.21:39:04.86#ibcon#about to write, iclass 29, count 0 2006.229.21:39:04.86#ibcon#wrote, iclass 29, count 0 2006.229.21:39:04.86#ibcon#about to read 3, iclass 29, count 0 2006.229.21:39:04.88#ibcon#read 3, iclass 29, count 0 2006.229.21:39:04.88#ibcon#about to read 4, iclass 29, count 0 2006.229.21:39:04.88#ibcon#read 4, iclass 29, count 0 2006.229.21:39:04.88#ibcon#about to read 5, iclass 29, count 0 2006.229.21:39:04.88#ibcon#read 5, iclass 29, count 0 2006.229.21:39:04.88#ibcon#about to read 6, iclass 29, count 0 2006.229.21:39:04.88#ibcon#read 6, iclass 29, count 0 2006.229.21:39:04.88#ibcon#end of sib2, iclass 29, count 0 2006.229.21:39:04.88#ibcon#*mode == 0, iclass 29, count 0 2006.229.21:39:04.88#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.21:39:04.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:39:04.88#ibcon#*before write, iclass 29, count 0 2006.229.21:39:04.88#ibcon#enter sib2, iclass 29, count 0 2006.229.21:39:04.88#ibcon#flushed, iclass 29, count 0 2006.229.21:39:04.88#ibcon#about to write, iclass 29, count 0 2006.229.21:39:04.88#ibcon#wrote, iclass 29, count 0 2006.229.21:39:04.88#ibcon#about to read 3, iclass 29, count 0 2006.229.21:39:04.92#ibcon#read 3, iclass 29, count 0 2006.229.21:39:04.92#ibcon#about to read 4, iclass 29, count 0 2006.229.21:39:04.92#ibcon#read 4, iclass 29, count 0 2006.229.21:39:04.92#ibcon#about to read 5, iclass 29, count 0 2006.229.21:39:04.92#ibcon#read 5, iclass 29, count 0 2006.229.21:39:04.92#ibcon#about to read 6, iclass 29, count 0 2006.229.21:39:04.92#ibcon#read 6, iclass 29, count 0 2006.229.21:39:04.92#ibcon#end of sib2, iclass 29, count 0 2006.229.21:39:04.92#ibcon#*after write, iclass 29, count 0 2006.229.21:39:04.92#ibcon#*before return 0, iclass 29, count 0 2006.229.21:39:04.92#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:04.92#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.21:39:04.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.21:39:04.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.21:39:04.92$vck44/vb=4,4 2006.229.21:39:04.92#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.21:39:04.92#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.21:39:04.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:04.92#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:04.98#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:04.98#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:04.98#ibcon#enter wrdev, iclass 31, count 2 2006.229.21:39:04.98#ibcon#first serial, iclass 31, count 2 2006.229.21:39:04.98#ibcon#enter sib2, iclass 31, count 2 2006.229.21:39:04.98#ibcon#flushed, iclass 31, count 2 2006.229.21:39:04.98#ibcon#about to write, iclass 31, count 2 2006.229.21:39:04.98#ibcon#wrote, iclass 31, count 2 2006.229.21:39:04.98#ibcon#about to read 3, iclass 31, count 2 2006.229.21:39:05.00#ibcon#read 3, iclass 31, count 2 2006.229.21:39:05.00#ibcon#about to read 4, iclass 31, count 2 2006.229.21:39:05.00#ibcon#read 4, iclass 31, count 2 2006.229.21:39:05.00#ibcon#about to read 5, iclass 31, count 2 2006.229.21:39:05.00#ibcon#read 5, iclass 31, count 2 2006.229.21:39:05.00#ibcon#about to read 6, iclass 31, count 2 2006.229.21:39:05.00#ibcon#read 6, iclass 31, count 2 2006.229.21:39:05.00#ibcon#end of sib2, iclass 31, count 2 2006.229.21:39:05.00#ibcon#*mode == 0, iclass 31, count 2 2006.229.21:39:05.00#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.21:39:05.00#ibcon#[27=AT04-04\r\n] 2006.229.21:39:05.00#ibcon#*before write, iclass 31, count 2 2006.229.21:39:05.00#ibcon#enter sib2, iclass 31, count 2 2006.229.21:39:05.00#ibcon#flushed, iclass 31, count 2 2006.229.21:39:05.00#ibcon#about to write, iclass 31, count 2 2006.229.21:39:05.00#ibcon#wrote, iclass 31, count 2 2006.229.21:39:05.00#ibcon#about to read 3, iclass 31, count 2 2006.229.21:39:05.03#ibcon#read 3, iclass 31, count 2 2006.229.21:39:05.03#ibcon#about to read 4, iclass 31, count 2 2006.229.21:39:05.03#ibcon#read 4, iclass 31, count 2 2006.229.21:39:05.03#ibcon#about to read 5, iclass 31, count 2 2006.229.21:39:05.03#ibcon#read 5, iclass 31, count 2 2006.229.21:39:05.03#ibcon#about to read 6, iclass 31, count 2 2006.229.21:39:05.03#ibcon#read 6, iclass 31, count 2 2006.229.21:39:05.03#ibcon#end of sib2, iclass 31, count 2 2006.229.21:39:05.03#ibcon#*after write, iclass 31, count 2 2006.229.21:39:05.03#ibcon#*before return 0, iclass 31, count 2 2006.229.21:39:05.03#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:05.03#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.21:39:05.03#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.21:39:05.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:05.03#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:05.15#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:05.15#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:05.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.21:39:05.15#ibcon#first serial, iclass 31, count 0 2006.229.21:39:05.15#ibcon#enter sib2, iclass 31, count 0 2006.229.21:39:05.15#ibcon#flushed, iclass 31, count 0 2006.229.21:39:05.15#ibcon#about to write, iclass 31, count 0 2006.229.21:39:05.15#ibcon#wrote, iclass 31, count 0 2006.229.21:39:05.15#ibcon#about to read 3, iclass 31, count 0 2006.229.21:39:05.17#ibcon#read 3, iclass 31, count 0 2006.229.21:39:05.17#ibcon#about to read 4, iclass 31, count 0 2006.229.21:39:05.17#ibcon#read 4, iclass 31, count 0 2006.229.21:39:05.17#ibcon#about to read 5, iclass 31, count 0 2006.229.21:39:05.17#ibcon#read 5, iclass 31, count 0 2006.229.21:39:05.17#ibcon#about to read 6, iclass 31, count 0 2006.229.21:39:05.17#ibcon#read 6, iclass 31, count 0 2006.229.21:39:05.17#ibcon#end of sib2, iclass 31, count 0 2006.229.21:39:05.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.21:39:05.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.21:39:05.17#ibcon#[27=USB\r\n] 2006.229.21:39:05.17#ibcon#*before write, iclass 31, count 0 2006.229.21:39:05.17#ibcon#enter sib2, iclass 31, count 0 2006.229.21:39:05.17#ibcon#flushed, iclass 31, count 0 2006.229.21:39:05.17#ibcon#about to write, iclass 31, count 0 2006.229.21:39:05.17#ibcon#wrote, iclass 31, count 0 2006.229.21:39:05.17#ibcon#about to read 3, iclass 31, count 0 2006.229.21:39:05.20#ibcon#read 3, iclass 31, count 0 2006.229.21:39:05.20#ibcon#about to read 4, iclass 31, count 0 2006.229.21:39:05.20#ibcon#read 4, iclass 31, count 0 2006.229.21:39:05.20#ibcon#about to read 5, iclass 31, count 0 2006.229.21:39:05.20#ibcon#read 5, iclass 31, count 0 2006.229.21:39:05.20#ibcon#about to read 6, iclass 31, count 0 2006.229.21:39:05.20#ibcon#read 6, iclass 31, count 0 2006.229.21:39:05.20#ibcon#end of sib2, iclass 31, count 0 2006.229.21:39:05.20#ibcon#*after write, iclass 31, count 0 2006.229.21:39:05.20#ibcon#*before return 0, iclass 31, count 0 2006.229.21:39:05.20#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:05.20#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.21:39:05.20#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.21:39:05.20#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.21:39:05.20$vck44/vblo=5,709.99 2006.229.21:39:05.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.21:39:05.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.21:39:05.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:05.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:05.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:05.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:05.20#ibcon#enter wrdev, iclass 33, count 0 2006.229.21:39:05.20#ibcon#first serial, iclass 33, count 0 2006.229.21:39:05.20#ibcon#enter sib2, iclass 33, count 0 2006.229.21:39:05.20#ibcon#flushed, iclass 33, count 0 2006.229.21:39:05.20#ibcon#about to write, iclass 33, count 0 2006.229.21:39:05.20#ibcon#wrote, iclass 33, count 0 2006.229.21:39:05.20#ibcon#about to read 3, iclass 33, count 0 2006.229.21:39:05.22#ibcon#read 3, iclass 33, count 0 2006.229.21:39:05.22#ibcon#about to read 4, iclass 33, count 0 2006.229.21:39:05.22#ibcon#read 4, iclass 33, count 0 2006.229.21:39:05.22#ibcon#about to read 5, iclass 33, count 0 2006.229.21:39:05.22#ibcon#read 5, iclass 33, count 0 2006.229.21:39:05.22#ibcon#about to read 6, iclass 33, count 0 2006.229.21:39:05.22#ibcon#read 6, iclass 33, count 0 2006.229.21:39:05.22#ibcon#end of sib2, iclass 33, count 0 2006.229.21:39:05.22#ibcon#*mode == 0, iclass 33, count 0 2006.229.21:39:05.22#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.21:39:05.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:39:05.22#ibcon#*before write, iclass 33, count 0 2006.229.21:39:05.22#ibcon#enter sib2, iclass 33, count 0 2006.229.21:39:05.22#ibcon#flushed, iclass 33, count 0 2006.229.21:39:05.22#ibcon#about to write, iclass 33, count 0 2006.229.21:39:05.22#ibcon#wrote, iclass 33, count 0 2006.229.21:39:05.22#ibcon#about to read 3, iclass 33, count 0 2006.229.21:39:05.26#ibcon#read 3, iclass 33, count 0 2006.229.21:39:05.26#ibcon#about to read 4, iclass 33, count 0 2006.229.21:39:05.26#ibcon#read 4, iclass 33, count 0 2006.229.21:39:05.26#ibcon#about to read 5, iclass 33, count 0 2006.229.21:39:05.26#ibcon#read 5, iclass 33, count 0 2006.229.21:39:05.26#ibcon#about to read 6, iclass 33, count 0 2006.229.21:39:05.26#ibcon#read 6, iclass 33, count 0 2006.229.21:39:05.26#ibcon#end of sib2, iclass 33, count 0 2006.229.21:39:05.26#ibcon#*after write, iclass 33, count 0 2006.229.21:39:05.26#ibcon#*before return 0, iclass 33, count 0 2006.229.21:39:05.26#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:05.26#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.21:39:05.26#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.21:39:05.26#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.21:39:05.26$vck44/vb=5,4 2006.229.21:39:05.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.21:39:05.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.21:39:05.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:05.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:05.32#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:05.32#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:05.32#ibcon#enter wrdev, iclass 35, count 2 2006.229.21:39:05.32#ibcon#first serial, iclass 35, count 2 2006.229.21:39:05.32#ibcon#enter sib2, iclass 35, count 2 2006.229.21:39:05.32#ibcon#flushed, iclass 35, count 2 2006.229.21:39:05.32#ibcon#about to write, iclass 35, count 2 2006.229.21:39:05.32#ibcon#wrote, iclass 35, count 2 2006.229.21:39:05.32#ibcon#about to read 3, iclass 35, count 2 2006.229.21:39:05.34#ibcon#read 3, iclass 35, count 2 2006.229.21:39:05.34#ibcon#about to read 4, iclass 35, count 2 2006.229.21:39:05.34#ibcon#read 4, iclass 35, count 2 2006.229.21:39:05.34#ibcon#about to read 5, iclass 35, count 2 2006.229.21:39:05.34#ibcon#read 5, iclass 35, count 2 2006.229.21:39:05.34#ibcon#about to read 6, iclass 35, count 2 2006.229.21:39:05.34#ibcon#read 6, iclass 35, count 2 2006.229.21:39:05.34#ibcon#end of sib2, iclass 35, count 2 2006.229.21:39:05.34#ibcon#*mode == 0, iclass 35, count 2 2006.229.21:39:05.34#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.21:39:05.34#ibcon#[27=AT05-04\r\n] 2006.229.21:39:05.34#ibcon#*before write, iclass 35, count 2 2006.229.21:39:05.34#ibcon#enter sib2, iclass 35, count 2 2006.229.21:39:05.34#ibcon#flushed, iclass 35, count 2 2006.229.21:39:05.34#ibcon#about to write, iclass 35, count 2 2006.229.21:39:05.34#ibcon#wrote, iclass 35, count 2 2006.229.21:39:05.34#ibcon#about to read 3, iclass 35, count 2 2006.229.21:39:05.37#ibcon#read 3, iclass 35, count 2 2006.229.21:39:05.37#ibcon#about to read 4, iclass 35, count 2 2006.229.21:39:05.37#ibcon#read 4, iclass 35, count 2 2006.229.21:39:05.37#ibcon#about to read 5, iclass 35, count 2 2006.229.21:39:05.37#ibcon#read 5, iclass 35, count 2 2006.229.21:39:05.37#ibcon#about to read 6, iclass 35, count 2 2006.229.21:39:05.37#ibcon#read 6, iclass 35, count 2 2006.229.21:39:05.37#ibcon#end of sib2, iclass 35, count 2 2006.229.21:39:05.37#ibcon#*after write, iclass 35, count 2 2006.229.21:39:05.37#ibcon#*before return 0, iclass 35, count 2 2006.229.21:39:05.37#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:05.37#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:39:05.37#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.21:39:05.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:05.37#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:05.49#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:05.49#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:05.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:39:05.49#ibcon#first serial, iclass 35, count 0 2006.229.21:39:05.49#ibcon#enter sib2, iclass 35, count 0 2006.229.21:39:05.49#ibcon#flushed, iclass 35, count 0 2006.229.21:39:05.49#ibcon#about to write, iclass 35, count 0 2006.229.21:39:05.49#ibcon#wrote, iclass 35, count 0 2006.229.21:39:05.49#ibcon#about to read 3, iclass 35, count 0 2006.229.21:39:05.51#ibcon#read 3, iclass 35, count 0 2006.229.21:39:05.51#ibcon#about to read 4, iclass 35, count 0 2006.229.21:39:05.51#ibcon#read 4, iclass 35, count 0 2006.229.21:39:05.51#ibcon#about to read 5, iclass 35, count 0 2006.229.21:39:05.51#ibcon#read 5, iclass 35, count 0 2006.229.21:39:05.51#ibcon#about to read 6, iclass 35, count 0 2006.229.21:39:05.51#ibcon#read 6, iclass 35, count 0 2006.229.21:39:05.51#ibcon#end of sib2, iclass 35, count 0 2006.229.21:39:05.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:39:05.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:39:05.51#ibcon#[27=USB\r\n] 2006.229.21:39:05.51#ibcon#*before write, iclass 35, count 0 2006.229.21:39:05.51#ibcon#enter sib2, iclass 35, count 0 2006.229.21:39:05.51#ibcon#flushed, iclass 35, count 0 2006.229.21:39:05.51#ibcon#about to write, iclass 35, count 0 2006.229.21:39:05.51#ibcon#wrote, iclass 35, count 0 2006.229.21:39:05.51#ibcon#about to read 3, iclass 35, count 0 2006.229.21:39:05.54#ibcon#read 3, iclass 35, count 0 2006.229.21:39:05.54#ibcon#about to read 4, iclass 35, count 0 2006.229.21:39:05.54#ibcon#read 4, iclass 35, count 0 2006.229.21:39:05.54#ibcon#about to read 5, iclass 35, count 0 2006.229.21:39:05.54#ibcon#read 5, iclass 35, count 0 2006.229.21:39:05.54#ibcon#about to read 6, iclass 35, count 0 2006.229.21:39:05.54#ibcon#read 6, iclass 35, count 0 2006.229.21:39:05.54#ibcon#end of sib2, iclass 35, count 0 2006.229.21:39:05.54#ibcon#*after write, iclass 35, count 0 2006.229.21:39:05.54#ibcon#*before return 0, iclass 35, count 0 2006.229.21:39:05.54#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:05.54#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:39:05.54#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:39:05.54#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:39:05.54$vck44/vblo=6,719.99 2006.229.21:39:05.54#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.21:39:05.54#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.21:39:05.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:05.54#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:05.54#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:05.54#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:05.54#ibcon#enter wrdev, iclass 37, count 0 2006.229.21:39:05.54#ibcon#first serial, iclass 37, count 0 2006.229.21:39:05.54#ibcon#enter sib2, iclass 37, count 0 2006.229.21:39:05.54#ibcon#flushed, iclass 37, count 0 2006.229.21:39:05.54#ibcon#about to write, iclass 37, count 0 2006.229.21:39:05.54#ibcon#wrote, iclass 37, count 0 2006.229.21:39:05.54#ibcon#about to read 3, iclass 37, count 0 2006.229.21:39:05.56#ibcon#read 3, iclass 37, count 0 2006.229.21:39:05.56#ibcon#about to read 4, iclass 37, count 0 2006.229.21:39:05.56#ibcon#read 4, iclass 37, count 0 2006.229.21:39:05.56#ibcon#about to read 5, iclass 37, count 0 2006.229.21:39:05.56#ibcon#read 5, iclass 37, count 0 2006.229.21:39:05.56#ibcon#about to read 6, iclass 37, count 0 2006.229.21:39:05.56#ibcon#read 6, iclass 37, count 0 2006.229.21:39:05.56#ibcon#end of sib2, iclass 37, count 0 2006.229.21:39:05.56#ibcon#*mode == 0, iclass 37, count 0 2006.229.21:39:05.56#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.21:39:05.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:39:05.56#ibcon#*before write, iclass 37, count 0 2006.229.21:39:05.56#ibcon#enter sib2, iclass 37, count 0 2006.229.21:39:05.56#ibcon#flushed, iclass 37, count 0 2006.229.21:39:05.56#ibcon#about to write, iclass 37, count 0 2006.229.21:39:05.56#ibcon#wrote, iclass 37, count 0 2006.229.21:39:05.56#ibcon#about to read 3, iclass 37, count 0 2006.229.21:39:05.60#ibcon#read 3, iclass 37, count 0 2006.229.21:39:05.60#ibcon#about to read 4, iclass 37, count 0 2006.229.21:39:05.60#ibcon#read 4, iclass 37, count 0 2006.229.21:39:05.60#ibcon#about to read 5, iclass 37, count 0 2006.229.21:39:05.60#ibcon#read 5, iclass 37, count 0 2006.229.21:39:05.60#ibcon#about to read 6, iclass 37, count 0 2006.229.21:39:05.60#ibcon#read 6, iclass 37, count 0 2006.229.21:39:05.60#ibcon#end of sib2, iclass 37, count 0 2006.229.21:39:05.60#ibcon#*after write, iclass 37, count 0 2006.229.21:39:05.60#ibcon#*before return 0, iclass 37, count 0 2006.229.21:39:05.60#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:05.60#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.21:39:05.60#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.21:39:05.60#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.21:39:05.60$vck44/vb=6,4 2006.229.21:39:05.60#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.21:39:05.60#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.21:39:05.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:05.60#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:05.66#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:05.66#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:05.66#ibcon#enter wrdev, iclass 39, count 2 2006.229.21:39:05.66#ibcon#first serial, iclass 39, count 2 2006.229.21:39:05.66#ibcon#enter sib2, iclass 39, count 2 2006.229.21:39:05.66#ibcon#flushed, iclass 39, count 2 2006.229.21:39:05.66#ibcon#about to write, iclass 39, count 2 2006.229.21:39:05.66#ibcon#wrote, iclass 39, count 2 2006.229.21:39:05.66#ibcon#about to read 3, iclass 39, count 2 2006.229.21:39:05.68#ibcon#read 3, iclass 39, count 2 2006.229.21:39:05.68#ibcon#about to read 4, iclass 39, count 2 2006.229.21:39:05.68#ibcon#read 4, iclass 39, count 2 2006.229.21:39:05.68#ibcon#about to read 5, iclass 39, count 2 2006.229.21:39:05.68#ibcon#read 5, iclass 39, count 2 2006.229.21:39:05.68#ibcon#about to read 6, iclass 39, count 2 2006.229.21:39:05.68#ibcon#read 6, iclass 39, count 2 2006.229.21:39:05.68#ibcon#end of sib2, iclass 39, count 2 2006.229.21:39:05.68#ibcon#*mode == 0, iclass 39, count 2 2006.229.21:39:05.68#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.21:39:05.68#ibcon#[27=AT06-04\r\n] 2006.229.21:39:05.68#ibcon#*before write, iclass 39, count 2 2006.229.21:39:05.68#ibcon#enter sib2, iclass 39, count 2 2006.229.21:39:05.68#ibcon#flushed, iclass 39, count 2 2006.229.21:39:05.68#ibcon#about to write, iclass 39, count 2 2006.229.21:39:05.68#ibcon#wrote, iclass 39, count 2 2006.229.21:39:05.68#ibcon#about to read 3, iclass 39, count 2 2006.229.21:39:05.71#ibcon#read 3, iclass 39, count 2 2006.229.21:39:05.71#ibcon#about to read 4, iclass 39, count 2 2006.229.21:39:05.71#ibcon#read 4, iclass 39, count 2 2006.229.21:39:05.71#ibcon#about to read 5, iclass 39, count 2 2006.229.21:39:05.71#ibcon#read 5, iclass 39, count 2 2006.229.21:39:05.71#ibcon#about to read 6, iclass 39, count 2 2006.229.21:39:05.71#ibcon#read 6, iclass 39, count 2 2006.229.21:39:05.71#ibcon#end of sib2, iclass 39, count 2 2006.229.21:39:05.71#ibcon#*after write, iclass 39, count 2 2006.229.21:39:05.71#ibcon#*before return 0, iclass 39, count 2 2006.229.21:39:05.71#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:05.71#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.21:39:05.71#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.21:39:05.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:05.71#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:05.83#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:05.83#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:05.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.21:39:05.83#ibcon#first serial, iclass 39, count 0 2006.229.21:39:05.83#ibcon#enter sib2, iclass 39, count 0 2006.229.21:39:05.83#ibcon#flushed, iclass 39, count 0 2006.229.21:39:05.83#ibcon#about to write, iclass 39, count 0 2006.229.21:39:05.83#ibcon#wrote, iclass 39, count 0 2006.229.21:39:05.83#ibcon#about to read 3, iclass 39, count 0 2006.229.21:39:05.85#ibcon#read 3, iclass 39, count 0 2006.229.21:39:05.85#ibcon#about to read 4, iclass 39, count 0 2006.229.21:39:05.85#ibcon#read 4, iclass 39, count 0 2006.229.21:39:05.85#ibcon#about to read 5, iclass 39, count 0 2006.229.21:39:05.85#ibcon#read 5, iclass 39, count 0 2006.229.21:39:05.85#ibcon#about to read 6, iclass 39, count 0 2006.229.21:39:05.85#ibcon#read 6, iclass 39, count 0 2006.229.21:39:05.85#ibcon#end of sib2, iclass 39, count 0 2006.229.21:39:05.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.21:39:05.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.21:39:05.85#ibcon#[27=USB\r\n] 2006.229.21:39:05.85#ibcon#*before write, iclass 39, count 0 2006.229.21:39:05.85#ibcon#enter sib2, iclass 39, count 0 2006.229.21:39:05.85#ibcon#flushed, iclass 39, count 0 2006.229.21:39:05.85#ibcon#about to write, iclass 39, count 0 2006.229.21:39:05.85#ibcon#wrote, iclass 39, count 0 2006.229.21:39:05.85#ibcon#about to read 3, iclass 39, count 0 2006.229.21:39:05.88#ibcon#read 3, iclass 39, count 0 2006.229.21:39:05.88#ibcon#about to read 4, iclass 39, count 0 2006.229.21:39:05.88#ibcon#read 4, iclass 39, count 0 2006.229.21:39:05.88#ibcon#about to read 5, iclass 39, count 0 2006.229.21:39:05.88#ibcon#read 5, iclass 39, count 0 2006.229.21:39:05.88#ibcon#about to read 6, iclass 39, count 0 2006.229.21:39:05.88#ibcon#read 6, iclass 39, count 0 2006.229.21:39:05.88#ibcon#end of sib2, iclass 39, count 0 2006.229.21:39:05.88#ibcon#*after write, iclass 39, count 0 2006.229.21:39:05.88#ibcon#*before return 0, iclass 39, count 0 2006.229.21:39:05.88#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:05.88#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.21:39:05.88#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.21:39:05.88#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.21:39:05.88$vck44/vblo=7,734.99 2006.229.21:39:05.88#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.21:39:05.88#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.21:39:05.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:05.88#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:05.88#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:05.88#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:05.88#ibcon#enter wrdev, iclass 3, count 0 2006.229.21:39:05.88#ibcon#first serial, iclass 3, count 0 2006.229.21:39:05.88#ibcon#enter sib2, iclass 3, count 0 2006.229.21:39:05.88#ibcon#flushed, iclass 3, count 0 2006.229.21:39:05.88#ibcon#about to write, iclass 3, count 0 2006.229.21:39:05.88#ibcon#wrote, iclass 3, count 0 2006.229.21:39:05.88#ibcon#about to read 3, iclass 3, count 0 2006.229.21:39:05.90#ibcon#read 3, iclass 3, count 0 2006.229.21:39:05.90#ibcon#about to read 4, iclass 3, count 0 2006.229.21:39:05.90#ibcon#read 4, iclass 3, count 0 2006.229.21:39:05.90#ibcon#about to read 5, iclass 3, count 0 2006.229.21:39:05.90#ibcon#read 5, iclass 3, count 0 2006.229.21:39:05.90#ibcon#about to read 6, iclass 3, count 0 2006.229.21:39:05.90#ibcon#read 6, iclass 3, count 0 2006.229.21:39:05.90#ibcon#end of sib2, iclass 3, count 0 2006.229.21:39:05.90#ibcon#*mode == 0, iclass 3, count 0 2006.229.21:39:05.90#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.21:39:05.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:39:05.90#ibcon#*before write, iclass 3, count 0 2006.229.21:39:05.90#ibcon#enter sib2, iclass 3, count 0 2006.229.21:39:05.90#ibcon#flushed, iclass 3, count 0 2006.229.21:39:05.90#ibcon#about to write, iclass 3, count 0 2006.229.21:39:05.90#ibcon#wrote, iclass 3, count 0 2006.229.21:39:05.90#ibcon#about to read 3, iclass 3, count 0 2006.229.21:39:05.94#ibcon#read 3, iclass 3, count 0 2006.229.21:39:05.94#ibcon#about to read 4, iclass 3, count 0 2006.229.21:39:05.94#ibcon#read 4, iclass 3, count 0 2006.229.21:39:05.94#ibcon#about to read 5, iclass 3, count 0 2006.229.21:39:05.94#ibcon#read 5, iclass 3, count 0 2006.229.21:39:05.94#ibcon#about to read 6, iclass 3, count 0 2006.229.21:39:05.94#ibcon#read 6, iclass 3, count 0 2006.229.21:39:05.94#ibcon#end of sib2, iclass 3, count 0 2006.229.21:39:05.94#ibcon#*after write, iclass 3, count 0 2006.229.21:39:05.94#ibcon#*before return 0, iclass 3, count 0 2006.229.21:39:05.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:05.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.21:39:05.94#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.21:39:05.94#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.21:39:05.94$vck44/vb=7,4 2006.229.21:39:05.94#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.21:39:05.94#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.21:39:05.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:05.94#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:06.00#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:06.00#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:06.00#ibcon#enter wrdev, iclass 5, count 2 2006.229.21:39:06.00#ibcon#first serial, iclass 5, count 2 2006.229.21:39:06.00#ibcon#enter sib2, iclass 5, count 2 2006.229.21:39:06.00#ibcon#flushed, iclass 5, count 2 2006.229.21:39:06.00#ibcon#about to write, iclass 5, count 2 2006.229.21:39:06.00#ibcon#wrote, iclass 5, count 2 2006.229.21:39:06.00#ibcon#about to read 3, iclass 5, count 2 2006.229.21:39:06.02#ibcon#read 3, iclass 5, count 2 2006.229.21:39:06.02#ibcon#about to read 4, iclass 5, count 2 2006.229.21:39:06.02#ibcon#read 4, iclass 5, count 2 2006.229.21:39:06.02#ibcon#about to read 5, iclass 5, count 2 2006.229.21:39:06.02#ibcon#read 5, iclass 5, count 2 2006.229.21:39:06.02#ibcon#about to read 6, iclass 5, count 2 2006.229.21:39:06.02#ibcon#read 6, iclass 5, count 2 2006.229.21:39:06.02#ibcon#end of sib2, iclass 5, count 2 2006.229.21:39:06.02#ibcon#*mode == 0, iclass 5, count 2 2006.229.21:39:06.02#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.21:39:06.02#ibcon#[27=AT07-04\r\n] 2006.229.21:39:06.02#ibcon#*before write, iclass 5, count 2 2006.229.21:39:06.02#ibcon#enter sib2, iclass 5, count 2 2006.229.21:39:06.02#ibcon#flushed, iclass 5, count 2 2006.229.21:39:06.02#ibcon#about to write, iclass 5, count 2 2006.229.21:39:06.02#ibcon#wrote, iclass 5, count 2 2006.229.21:39:06.02#ibcon#about to read 3, iclass 5, count 2 2006.229.21:39:06.05#ibcon#read 3, iclass 5, count 2 2006.229.21:39:06.05#ibcon#about to read 4, iclass 5, count 2 2006.229.21:39:06.05#ibcon#read 4, iclass 5, count 2 2006.229.21:39:06.05#ibcon#about to read 5, iclass 5, count 2 2006.229.21:39:06.05#ibcon#read 5, iclass 5, count 2 2006.229.21:39:06.05#ibcon#about to read 6, iclass 5, count 2 2006.229.21:39:06.05#ibcon#read 6, iclass 5, count 2 2006.229.21:39:06.05#ibcon#end of sib2, iclass 5, count 2 2006.229.21:39:06.05#ibcon#*after write, iclass 5, count 2 2006.229.21:39:06.05#ibcon#*before return 0, iclass 5, count 2 2006.229.21:39:06.05#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:06.05#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.21:39:06.05#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.21:39:06.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:06.05#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:06.17#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:06.17#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:06.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.21:39:06.17#ibcon#first serial, iclass 5, count 0 2006.229.21:39:06.17#ibcon#enter sib2, iclass 5, count 0 2006.229.21:39:06.17#ibcon#flushed, iclass 5, count 0 2006.229.21:39:06.17#ibcon#about to write, iclass 5, count 0 2006.229.21:39:06.17#ibcon#wrote, iclass 5, count 0 2006.229.21:39:06.17#ibcon#about to read 3, iclass 5, count 0 2006.229.21:39:06.19#ibcon#read 3, iclass 5, count 0 2006.229.21:39:06.19#ibcon#about to read 4, iclass 5, count 0 2006.229.21:39:06.19#ibcon#read 4, iclass 5, count 0 2006.229.21:39:06.19#ibcon#about to read 5, iclass 5, count 0 2006.229.21:39:06.19#ibcon#read 5, iclass 5, count 0 2006.229.21:39:06.19#ibcon#about to read 6, iclass 5, count 0 2006.229.21:39:06.19#ibcon#read 6, iclass 5, count 0 2006.229.21:39:06.19#ibcon#end of sib2, iclass 5, count 0 2006.229.21:39:06.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.21:39:06.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.21:39:06.19#ibcon#[27=USB\r\n] 2006.229.21:39:06.19#ibcon#*before write, iclass 5, count 0 2006.229.21:39:06.19#ibcon#enter sib2, iclass 5, count 0 2006.229.21:39:06.19#ibcon#flushed, iclass 5, count 0 2006.229.21:39:06.19#ibcon#about to write, iclass 5, count 0 2006.229.21:39:06.19#ibcon#wrote, iclass 5, count 0 2006.229.21:39:06.19#ibcon#about to read 3, iclass 5, count 0 2006.229.21:39:06.22#ibcon#read 3, iclass 5, count 0 2006.229.21:39:06.22#ibcon#about to read 4, iclass 5, count 0 2006.229.21:39:06.22#ibcon#read 4, iclass 5, count 0 2006.229.21:39:06.22#ibcon#about to read 5, iclass 5, count 0 2006.229.21:39:06.22#ibcon#read 5, iclass 5, count 0 2006.229.21:39:06.22#ibcon#about to read 6, iclass 5, count 0 2006.229.21:39:06.22#ibcon#read 6, iclass 5, count 0 2006.229.21:39:06.22#ibcon#end of sib2, iclass 5, count 0 2006.229.21:39:06.22#ibcon#*after write, iclass 5, count 0 2006.229.21:39:06.22#ibcon#*before return 0, iclass 5, count 0 2006.229.21:39:06.22#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:06.22#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.21:39:06.22#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.21:39:06.22#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.21:39:06.22$vck44/vblo=8,744.99 2006.229.21:39:06.22#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.21:39:06.22#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.21:39:06.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:39:06.22#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:06.22#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:06.22#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:06.22#ibcon#enter wrdev, iclass 7, count 0 2006.229.21:39:06.22#ibcon#first serial, iclass 7, count 0 2006.229.21:39:06.22#ibcon#enter sib2, iclass 7, count 0 2006.229.21:39:06.22#ibcon#flushed, iclass 7, count 0 2006.229.21:39:06.22#ibcon#about to write, iclass 7, count 0 2006.229.21:39:06.22#ibcon#wrote, iclass 7, count 0 2006.229.21:39:06.22#ibcon#about to read 3, iclass 7, count 0 2006.229.21:39:06.24#ibcon#read 3, iclass 7, count 0 2006.229.21:39:06.24#ibcon#about to read 4, iclass 7, count 0 2006.229.21:39:06.24#ibcon#read 4, iclass 7, count 0 2006.229.21:39:06.24#ibcon#about to read 5, iclass 7, count 0 2006.229.21:39:06.24#ibcon#read 5, iclass 7, count 0 2006.229.21:39:06.24#ibcon#about to read 6, iclass 7, count 0 2006.229.21:39:06.24#ibcon#read 6, iclass 7, count 0 2006.229.21:39:06.24#ibcon#end of sib2, iclass 7, count 0 2006.229.21:39:06.24#ibcon#*mode == 0, iclass 7, count 0 2006.229.21:39:06.24#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.21:39:06.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:39:06.24#ibcon#*before write, iclass 7, count 0 2006.229.21:39:06.24#ibcon#enter sib2, iclass 7, count 0 2006.229.21:39:06.24#ibcon#flushed, iclass 7, count 0 2006.229.21:39:06.24#ibcon#about to write, iclass 7, count 0 2006.229.21:39:06.24#ibcon#wrote, iclass 7, count 0 2006.229.21:39:06.24#ibcon#about to read 3, iclass 7, count 0 2006.229.21:39:06.28#ibcon#read 3, iclass 7, count 0 2006.229.21:39:06.28#ibcon#about to read 4, iclass 7, count 0 2006.229.21:39:06.28#ibcon#read 4, iclass 7, count 0 2006.229.21:39:06.28#ibcon#about to read 5, iclass 7, count 0 2006.229.21:39:06.28#ibcon#read 5, iclass 7, count 0 2006.229.21:39:06.28#ibcon#about to read 6, iclass 7, count 0 2006.229.21:39:06.28#ibcon#read 6, iclass 7, count 0 2006.229.21:39:06.28#ibcon#end of sib2, iclass 7, count 0 2006.229.21:39:06.28#ibcon#*after write, iclass 7, count 0 2006.229.21:39:06.28#ibcon#*before return 0, iclass 7, count 0 2006.229.21:39:06.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:06.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.21:39:06.28#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.21:39:06.28#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.21:39:06.28$vck44/vb=8,4 2006.229.21:39:06.28#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.21:39:06.28#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.21:39:06.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:39:06.28#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:06.34#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:06.34#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:06.34#ibcon#enter wrdev, iclass 11, count 2 2006.229.21:39:06.34#ibcon#first serial, iclass 11, count 2 2006.229.21:39:06.34#ibcon#enter sib2, iclass 11, count 2 2006.229.21:39:06.34#ibcon#flushed, iclass 11, count 2 2006.229.21:39:06.34#ibcon#about to write, iclass 11, count 2 2006.229.21:39:06.34#ibcon#wrote, iclass 11, count 2 2006.229.21:39:06.34#ibcon#about to read 3, iclass 11, count 2 2006.229.21:39:06.36#ibcon#read 3, iclass 11, count 2 2006.229.21:39:06.36#ibcon#about to read 4, iclass 11, count 2 2006.229.21:39:06.36#ibcon#read 4, iclass 11, count 2 2006.229.21:39:06.36#ibcon#about to read 5, iclass 11, count 2 2006.229.21:39:06.36#ibcon#read 5, iclass 11, count 2 2006.229.21:39:06.36#ibcon#about to read 6, iclass 11, count 2 2006.229.21:39:06.36#ibcon#read 6, iclass 11, count 2 2006.229.21:39:06.36#ibcon#end of sib2, iclass 11, count 2 2006.229.21:39:06.36#ibcon#*mode == 0, iclass 11, count 2 2006.229.21:39:06.36#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.21:39:06.36#ibcon#[27=AT08-04\r\n] 2006.229.21:39:06.36#ibcon#*before write, iclass 11, count 2 2006.229.21:39:06.36#ibcon#enter sib2, iclass 11, count 2 2006.229.21:39:06.36#ibcon#flushed, iclass 11, count 2 2006.229.21:39:06.36#ibcon#about to write, iclass 11, count 2 2006.229.21:39:06.36#ibcon#wrote, iclass 11, count 2 2006.229.21:39:06.36#ibcon#about to read 3, iclass 11, count 2 2006.229.21:39:06.39#ibcon#read 3, iclass 11, count 2 2006.229.21:39:06.39#ibcon#about to read 4, iclass 11, count 2 2006.229.21:39:06.39#ibcon#read 4, iclass 11, count 2 2006.229.21:39:06.39#ibcon#about to read 5, iclass 11, count 2 2006.229.21:39:06.39#ibcon#read 5, iclass 11, count 2 2006.229.21:39:06.39#ibcon#about to read 6, iclass 11, count 2 2006.229.21:39:06.39#ibcon#read 6, iclass 11, count 2 2006.229.21:39:06.39#ibcon#end of sib2, iclass 11, count 2 2006.229.21:39:06.39#ibcon#*after write, iclass 11, count 2 2006.229.21:39:06.39#ibcon#*before return 0, iclass 11, count 2 2006.229.21:39:06.39#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:06.39#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.21:39:06.39#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.21:39:06.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:39:06.39#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:06.51#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:06.51#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:06.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.21:39:06.51#ibcon#first serial, iclass 11, count 0 2006.229.21:39:06.51#ibcon#enter sib2, iclass 11, count 0 2006.229.21:39:06.51#ibcon#flushed, iclass 11, count 0 2006.229.21:39:06.51#ibcon#about to write, iclass 11, count 0 2006.229.21:39:06.51#ibcon#wrote, iclass 11, count 0 2006.229.21:39:06.51#ibcon#about to read 3, iclass 11, count 0 2006.229.21:39:06.53#ibcon#read 3, iclass 11, count 0 2006.229.21:39:06.53#ibcon#about to read 4, iclass 11, count 0 2006.229.21:39:06.53#ibcon#read 4, iclass 11, count 0 2006.229.21:39:06.53#ibcon#about to read 5, iclass 11, count 0 2006.229.21:39:06.53#ibcon#read 5, iclass 11, count 0 2006.229.21:39:06.53#ibcon#about to read 6, iclass 11, count 0 2006.229.21:39:06.53#ibcon#read 6, iclass 11, count 0 2006.229.21:39:06.53#ibcon#end of sib2, iclass 11, count 0 2006.229.21:39:06.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.21:39:06.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.21:39:06.53#ibcon#[27=USB\r\n] 2006.229.21:39:06.53#ibcon#*before write, iclass 11, count 0 2006.229.21:39:06.53#ibcon#enter sib2, iclass 11, count 0 2006.229.21:39:06.53#ibcon#flushed, iclass 11, count 0 2006.229.21:39:06.53#ibcon#about to write, iclass 11, count 0 2006.229.21:39:06.53#ibcon#wrote, iclass 11, count 0 2006.229.21:39:06.53#ibcon#about to read 3, iclass 11, count 0 2006.229.21:39:06.56#ibcon#read 3, iclass 11, count 0 2006.229.21:39:06.56#ibcon#about to read 4, iclass 11, count 0 2006.229.21:39:06.56#ibcon#read 4, iclass 11, count 0 2006.229.21:39:06.56#ibcon#about to read 5, iclass 11, count 0 2006.229.21:39:06.56#ibcon#read 5, iclass 11, count 0 2006.229.21:39:06.56#ibcon#about to read 6, iclass 11, count 0 2006.229.21:39:06.56#ibcon#read 6, iclass 11, count 0 2006.229.21:39:06.56#ibcon#end of sib2, iclass 11, count 0 2006.229.21:39:06.56#ibcon#*after write, iclass 11, count 0 2006.229.21:39:06.56#ibcon#*before return 0, iclass 11, count 0 2006.229.21:39:06.56#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:06.56#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.21:39:06.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.21:39:06.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.21:39:06.56$vck44/vabw=wide 2006.229.21:39:06.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.21:39:06.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.21:39:06.56#ibcon#ireg 8 cls_cnt 0 2006.229.21:39:06.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:06.56#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:06.56#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:06.56#ibcon#enter wrdev, iclass 13, count 0 2006.229.21:39:06.56#ibcon#first serial, iclass 13, count 0 2006.229.21:39:06.56#ibcon#enter sib2, iclass 13, count 0 2006.229.21:39:06.56#ibcon#flushed, iclass 13, count 0 2006.229.21:39:06.56#ibcon#about to write, iclass 13, count 0 2006.229.21:39:06.56#ibcon#wrote, iclass 13, count 0 2006.229.21:39:06.56#ibcon#about to read 3, iclass 13, count 0 2006.229.21:39:06.58#ibcon#read 3, iclass 13, count 0 2006.229.21:39:06.58#ibcon#about to read 4, iclass 13, count 0 2006.229.21:39:06.58#ibcon#read 4, iclass 13, count 0 2006.229.21:39:06.58#ibcon#about to read 5, iclass 13, count 0 2006.229.21:39:06.58#ibcon#read 5, iclass 13, count 0 2006.229.21:39:06.58#ibcon#about to read 6, iclass 13, count 0 2006.229.21:39:06.58#ibcon#read 6, iclass 13, count 0 2006.229.21:39:06.58#ibcon#end of sib2, iclass 13, count 0 2006.229.21:39:06.58#ibcon#*mode == 0, iclass 13, count 0 2006.229.21:39:06.58#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.21:39:06.58#ibcon#[25=BW32\r\n] 2006.229.21:39:06.58#ibcon#*before write, iclass 13, count 0 2006.229.21:39:06.58#ibcon#enter sib2, iclass 13, count 0 2006.229.21:39:06.58#ibcon#flushed, iclass 13, count 0 2006.229.21:39:06.58#ibcon#about to write, iclass 13, count 0 2006.229.21:39:06.58#ibcon#wrote, iclass 13, count 0 2006.229.21:39:06.58#ibcon#about to read 3, iclass 13, count 0 2006.229.21:39:06.61#ibcon#read 3, iclass 13, count 0 2006.229.21:39:06.61#ibcon#about to read 4, iclass 13, count 0 2006.229.21:39:06.61#ibcon#read 4, iclass 13, count 0 2006.229.21:39:06.61#ibcon#about to read 5, iclass 13, count 0 2006.229.21:39:06.61#ibcon#read 5, iclass 13, count 0 2006.229.21:39:06.61#ibcon#about to read 6, iclass 13, count 0 2006.229.21:39:06.61#ibcon#read 6, iclass 13, count 0 2006.229.21:39:06.61#ibcon#end of sib2, iclass 13, count 0 2006.229.21:39:06.61#ibcon#*after write, iclass 13, count 0 2006.229.21:39:06.61#ibcon#*before return 0, iclass 13, count 0 2006.229.21:39:06.61#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:06.61#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.21:39:06.61#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.21:39:06.61#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.21:39:06.61$vck44/vbbw=wide 2006.229.21:39:06.61#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.21:39:06.61#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.21:39:06.61#ibcon#ireg 8 cls_cnt 0 2006.229.21:39:06.61#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:39:06.68#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:39:06.68#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:39:06.68#ibcon#enter wrdev, iclass 15, count 0 2006.229.21:39:06.68#ibcon#first serial, iclass 15, count 0 2006.229.21:39:06.68#ibcon#enter sib2, iclass 15, count 0 2006.229.21:39:06.68#ibcon#flushed, iclass 15, count 0 2006.229.21:39:06.68#ibcon#about to write, iclass 15, count 0 2006.229.21:39:06.68#ibcon#wrote, iclass 15, count 0 2006.229.21:39:06.68#ibcon#about to read 3, iclass 15, count 0 2006.229.21:39:06.70#ibcon#read 3, iclass 15, count 0 2006.229.21:39:06.70#ibcon#about to read 4, iclass 15, count 0 2006.229.21:39:06.70#ibcon#read 4, iclass 15, count 0 2006.229.21:39:06.70#ibcon#about to read 5, iclass 15, count 0 2006.229.21:39:06.70#ibcon#read 5, iclass 15, count 0 2006.229.21:39:06.70#ibcon#about to read 6, iclass 15, count 0 2006.229.21:39:06.70#ibcon#read 6, iclass 15, count 0 2006.229.21:39:06.70#ibcon#end of sib2, iclass 15, count 0 2006.229.21:39:06.70#ibcon#*mode == 0, iclass 15, count 0 2006.229.21:39:06.70#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.21:39:06.70#ibcon#[27=BW32\r\n] 2006.229.21:39:06.70#ibcon#*before write, iclass 15, count 0 2006.229.21:39:06.70#ibcon#enter sib2, iclass 15, count 0 2006.229.21:39:06.70#ibcon#flushed, iclass 15, count 0 2006.229.21:39:06.70#ibcon#about to write, iclass 15, count 0 2006.229.21:39:06.70#ibcon#wrote, iclass 15, count 0 2006.229.21:39:06.70#ibcon#about to read 3, iclass 15, count 0 2006.229.21:39:06.73#ibcon#read 3, iclass 15, count 0 2006.229.21:39:06.73#ibcon#about to read 4, iclass 15, count 0 2006.229.21:39:06.73#ibcon#read 4, iclass 15, count 0 2006.229.21:39:06.73#ibcon#about to read 5, iclass 15, count 0 2006.229.21:39:06.73#ibcon#read 5, iclass 15, count 0 2006.229.21:39:06.73#ibcon#about to read 6, iclass 15, count 0 2006.229.21:39:06.73#ibcon#read 6, iclass 15, count 0 2006.229.21:39:06.73#ibcon#end of sib2, iclass 15, count 0 2006.229.21:39:06.73#ibcon#*after write, iclass 15, count 0 2006.229.21:39:06.73#ibcon#*before return 0, iclass 15, count 0 2006.229.21:39:06.73#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:39:06.73#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.21:39:06.73#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.21:39:06.73#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.21:39:06.73$setupk4/ifdk4 2006.229.21:39:06.73$ifdk4/lo= 2006.229.21:39:06.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:39:06.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:39:06.73$ifdk4/patch= 2006.229.21:39:06.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:39:06.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:39:06.73$setupk4/!*+20s 2006.229.21:39:07.49#abcon#<5=/07 1.1 3.2 27.30 991002.2\r\n> 2006.229.21:39:07.51#abcon#{5=INTERFACE CLEAR} 2006.229.21:39:07.57#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:39:17.66#abcon#<5=/07 1.1 3.1 27.31 991002.2\r\n> 2006.229.21:39:17.68#abcon#{5=INTERFACE CLEAR} 2006.229.21:39:17.74#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:39:21.14#trakl#Source acquired 2006.229.21:39:21.14#flagr#flagr/antenna,acquired 2006.229.21:39:21.24$setupk4/"tpicd 2006.229.21:39:21.24$setupk4/echo=off 2006.229.21:39:21.24$setupk4/xlog=off 2006.229.21:39:21.24:!2006.229.21:40:02 2006.229.21:40:02.00:preob 2006.229.21:40:02.14/onsource/TRACKING 2006.229.21:40:02.14:!2006.229.21:40:12 2006.229.21:40:12.00:"tape 2006.229.21:40:12.00:"st=record 2006.229.21:40:12.00:data_valid=on 2006.229.21:40:12.00:midob 2006.229.21:40:12.14/onsource/TRACKING 2006.229.21:40:12.14/wx/27.32,1002.2,99 2006.229.21:40:12.26/cable/+6.4195E-03 2006.229.21:40:13.35/va/01,08,usb,yes,30,33 2006.229.21:40:13.35/va/02,07,usb,yes,33,34 2006.229.21:40:13.35/va/03,06,usb,yes,41,43 2006.229.21:40:13.35/va/04,07,usb,yes,34,36 2006.229.21:40:13.35/va/05,04,usb,yes,30,31 2006.229.21:40:13.35/va/06,04,usb,yes,34,34 2006.229.21:40:13.35/va/07,05,usb,yes,30,31 2006.229.21:40:13.35/va/08,06,usb,yes,22,27 2006.229.21:40:13.58/valo/01,524.99,yes,locked 2006.229.21:40:13.58/valo/02,534.99,yes,locked 2006.229.21:40:13.58/valo/03,564.99,yes,locked 2006.229.21:40:13.58/valo/04,624.99,yes,locked 2006.229.21:40:13.58/valo/05,734.99,yes,locked 2006.229.21:40:13.58/valo/06,814.99,yes,locked 2006.229.21:40:13.58/valo/07,864.99,yes,locked 2006.229.21:40:13.58/valo/08,884.99,yes,locked 2006.229.21:40:14.67/vb/01,04,usb,yes,31,29 2006.229.21:40:14.67/vb/02,04,usb,yes,34,34 2006.229.21:40:14.67/vb/03,04,usb,yes,31,34 2006.229.21:40:14.67/vb/04,04,usb,yes,35,34 2006.229.21:40:14.67/vb/05,04,usb,yes,28,30 2006.229.21:40:14.67/vb/06,04,usb,yes,32,28 2006.229.21:40:14.67/vb/07,04,usb,yes,32,32 2006.229.21:40:14.67/vb/08,04,usb,yes,29,33 2006.229.21:40:14.90/vblo/01,629.99,yes,locked 2006.229.21:40:14.90/vblo/02,634.99,yes,locked 2006.229.21:40:14.90/vblo/03,649.99,yes,locked 2006.229.21:40:14.90/vblo/04,679.99,yes,locked 2006.229.21:40:14.90/vblo/05,709.99,yes,locked 2006.229.21:40:14.90/vblo/06,719.99,yes,locked 2006.229.21:40:14.90/vblo/07,734.99,yes,locked 2006.229.21:40:14.90/vblo/08,744.99,yes,locked 2006.229.21:40:15.05/vabw/8 2006.229.21:40:15.20/vbbw/8 2006.229.21:40:15.29/xfe/off,on,12.2 2006.229.21:40:15.68/ifatt/23,28,28,28 2006.229.21:40:16.08/fmout-gps/S +4.56E-07 2006.229.21:40:16.12:!2006.229.21:45:12 2006.229.21:45:12.00:data_valid=off 2006.229.21:45:12.00:"et 2006.229.21:45:12.00:!+3s 2006.229.21:45:15.01:"tape 2006.229.21:45:15.01:postob 2006.229.21:45:15.17/cable/+6.4219E-03 2006.229.21:45:15.17/wx/27.41,1002.3,99 2006.229.21:45:16.08/fmout-gps/S +4.57E-07 2006.229.21:45:16.08:scan_name=229-2154,jd0608,420 2006.229.21:45:16.08:source=0804+499,080839.67,495036.5,2000.0,cw 2006.229.21:45:16.14#flagr#flagr/antenna,new-source 2006.229.21:45:17.14:checkk5 2006.229.21:45:17.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.21:45:17.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.21:45:18.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.21:45:18.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.21:45:19.15/chk_obsdata//k5ts1/T2292140??a.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:45:19.55/chk_obsdata//k5ts2/T2292140??b.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:45:19.96/chk_obsdata//k5ts3/T2292140??c.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:45:20.35/chk_obsdata//k5ts4/T2292140??d.dat file size is correct (nominal:1200MB, actual:1196MB). 2006.229.21:45:21.05/k5log//k5ts1_log_newline 2006.229.21:45:21.76/k5log//k5ts2_log_newline 2006.229.21:45:22.48/k5log//k5ts3_log_newline 2006.229.21:45:23.21/k5log//k5ts4_log_newline 2006.229.21:45:23.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.21:45:23.23:setupk4=1 2006.229.21:45:23.23$setupk4/echo=on 2006.229.21:45:23.23$setupk4/pcalon 2006.229.21:45:23.23$pcalon/"no phase cal control is implemented here 2006.229.21:45:23.23$setupk4/"tpicd=stop 2006.229.21:45:23.23$setupk4/"rec=synch_on 2006.229.21:45:23.23$setupk4/"rec_mode=128 2006.229.21:45:23.23$setupk4/!* 2006.229.21:45:23.23$setupk4/recpk4 2006.229.21:45:23.23$recpk4/recpatch= 2006.229.21:45:23.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.21:45:23.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.21:45:23.24$setupk4/vck44 2006.229.21:45:23.24$vck44/valo=1,524.99 2006.229.21:45:23.24#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.21:45:23.24#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.21:45:23.24#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:23.24#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:23.24#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:23.24#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:23.24#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:45:23.24#ibcon#first serial, iclass 24, count 0 2006.229.21:45:23.24#ibcon#enter sib2, iclass 24, count 0 2006.229.21:45:23.24#ibcon#flushed, iclass 24, count 0 2006.229.21:45:23.24#ibcon#about to write, iclass 24, count 0 2006.229.21:45:23.24#ibcon#wrote, iclass 24, count 0 2006.229.21:45:23.24#ibcon#about to read 3, iclass 24, count 0 2006.229.21:45:23.25#ibcon#read 3, iclass 24, count 0 2006.229.21:45:23.25#ibcon#about to read 4, iclass 24, count 0 2006.229.21:45:23.25#ibcon#read 4, iclass 24, count 0 2006.229.21:45:23.25#ibcon#about to read 5, iclass 24, count 0 2006.229.21:45:23.25#ibcon#read 5, iclass 24, count 0 2006.229.21:45:23.25#ibcon#about to read 6, iclass 24, count 0 2006.229.21:45:23.25#ibcon#read 6, iclass 24, count 0 2006.229.21:45:23.25#ibcon#end of sib2, iclass 24, count 0 2006.229.21:45:23.25#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:45:23.25#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:45:23.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.21:45:23.25#ibcon#*before write, iclass 24, count 0 2006.229.21:45:23.25#ibcon#enter sib2, iclass 24, count 0 2006.229.21:45:23.25#ibcon#flushed, iclass 24, count 0 2006.229.21:45:23.25#ibcon#about to write, iclass 24, count 0 2006.229.21:45:23.25#ibcon#wrote, iclass 24, count 0 2006.229.21:45:23.25#ibcon#about to read 3, iclass 24, count 0 2006.229.21:45:23.30#ibcon#read 3, iclass 24, count 0 2006.229.21:45:23.30#ibcon#about to read 4, iclass 24, count 0 2006.229.21:45:23.30#ibcon#read 4, iclass 24, count 0 2006.229.21:45:23.30#ibcon#about to read 5, iclass 24, count 0 2006.229.21:45:23.30#ibcon#read 5, iclass 24, count 0 2006.229.21:45:23.30#ibcon#about to read 6, iclass 24, count 0 2006.229.21:45:23.30#ibcon#read 6, iclass 24, count 0 2006.229.21:45:23.30#ibcon#end of sib2, iclass 24, count 0 2006.229.21:45:23.30#ibcon#*after write, iclass 24, count 0 2006.229.21:45:23.30#ibcon#*before return 0, iclass 24, count 0 2006.229.21:45:23.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:23.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:23.30#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:45:23.30#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:45:23.30$vck44/va=1,8 2006.229.21:45:23.30#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.21:45:23.30#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.21:45:23.30#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:23.30#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:23.30#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:23.30#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:23.30#ibcon#enter wrdev, iclass 26, count 2 2006.229.21:45:23.30#ibcon#first serial, iclass 26, count 2 2006.229.21:45:23.30#ibcon#enter sib2, iclass 26, count 2 2006.229.21:45:23.30#ibcon#flushed, iclass 26, count 2 2006.229.21:45:23.30#ibcon#about to write, iclass 26, count 2 2006.229.21:45:23.30#ibcon#wrote, iclass 26, count 2 2006.229.21:45:23.30#ibcon#about to read 3, iclass 26, count 2 2006.229.21:45:23.32#ibcon#read 3, iclass 26, count 2 2006.229.21:45:23.32#ibcon#about to read 4, iclass 26, count 2 2006.229.21:45:23.32#ibcon#read 4, iclass 26, count 2 2006.229.21:45:23.32#ibcon#about to read 5, iclass 26, count 2 2006.229.21:45:23.32#ibcon#read 5, iclass 26, count 2 2006.229.21:45:23.32#ibcon#about to read 6, iclass 26, count 2 2006.229.21:45:23.32#ibcon#read 6, iclass 26, count 2 2006.229.21:45:23.32#ibcon#end of sib2, iclass 26, count 2 2006.229.21:45:23.32#ibcon#*mode == 0, iclass 26, count 2 2006.229.21:45:23.32#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.21:45:23.32#ibcon#[25=AT01-08\r\n] 2006.229.21:45:23.32#ibcon#*before write, iclass 26, count 2 2006.229.21:45:23.32#ibcon#enter sib2, iclass 26, count 2 2006.229.21:45:23.32#ibcon#flushed, iclass 26, count 2 2006.229.21:45:23.32#ibcon#about to write, iclass 26, count 2 2006.229.21:45:23.32#ibcon#wrote, iclass 26, count 2 2006.229.21:45:23.32#ibcon#about to read 3, iclass 26, count 2 2006.229.21:45:23.35#ibcon#read 3, iclass 26, count 2 2006.229.21:45:23.35#ibcon#about to read 4, iclass 26, count 2 2006.229.21:45:23.35#ibcon#read 4, iclass 26, count 2 2006.229.21:45:23.35#ibcon#about to read 5, iclass 26, count 2 2006.229.21:45:23.35#ibcon#read 5, iclass 26, count 2 2006.229.21:45:23.35#ibcon#about to read 6, iclass 26, count 2 2006.229.21:45:23.35#ibcon#read 6, iclass 26, count 2 2006.229.21:45:23.35#ibcon#end of sib2, iclass 26, count 2 2006.229.21:45:23.35#ibcon#*after write, iclass 26, count 2 2006.229.21:45:23.35#ibcon#*before return 0, iclass 26, count 2 2006.229.21:45:23.35#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:23.35#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:23.35#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.21:45:23.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:23.35#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:23.47#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:23.47#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:23.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:45:23.47#ibcon#first serial, iclass 26, count 0 2006.229.21:45:23.47#ibcon#enter sib2, iclass 26, count 0 2006.229.21:45:23.47#ibcon#flushed, iclass 26, count 0 2006.229.21:45:23.47#ibcon#about to write, iclass 26, count 0 2006.229.21:45:23.47#ibcon#wrote, iclass 26, count 0 2006.229.21:45:23.47#ibcon#about to read 3, iclass 26, count 0 2006.229.21:45:23.49#ibcon#read 3, iclass 26, count 0 2006.229.21:45:23.49#ibcon#about to read 4, iclass 26, count 0 2006.229.21:45:23.49#ibcon#read 4, iclass 26, count 0 2006.229.21:45:23.49#ibcon#about to read 5, iclass 26, count 0 2006.229.21:45:23.49#ibcon#read 5, iclass 26, count 0 2006.229.21:45:23.49#ibcon#about to read 6, iclass 26, count 0 2006.229.21:45:23.49#ibcon#read 6, iclass 26, count 0 2006.229.21:45:23.49#ibcon#end of sib2, iclass 26, count 0 2006.229.21:45:23.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:45:23.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:45:23.49#ibcon#[25=USB\r\n] 2006.229.21:45:23.49#ibcon#*before write, iclass 26, count 0 2006.229.21:45:23.49#ibcon#enter sib2, iclass 26, count 0 2006.229.21:45:23.49#ibcon#flushed, iclass 26, count 0 2006.229.21:45:23.49#ibcon#about to write, iclass 26, count 0 2006.229.21:45:23.49#ibcon#wrote, iclass 26, count 0 2006.229.21:45:23.49#ibcon#about to read 3, iclass 26, count 0 2006.229.21:45:23.52#ibcon#read 3, iclass 26, count 0 2006.229.21:45:23.52#ibcon#about to read 4, iclass 26, count 0 2006.229.21:45:23.52#ibcon#read 4, iclass 26, count 0 2006.229.21:45:23.52#ibcon#about to read 5, iclass 26, count 0 2006.229.21:45:23.52#ibcon#read 5, iclass 26, count 0 2006.229.21:45:23.52#ibcon#about to read 6, iclass 26, count 0 2006.229.21:45:23.52#ibcon#read 6, iclass 26, count 0 2006.229.21:45:23.52#ibcon#end of sib2, iclass 26, count 0 2006.229.21:45:23.52#ibcon#*after write, iclass 26, count 0 2006.229.21:45:23.52#ibcon#*before return 0, iclass 26, count 0 2006.229.21:45:23.52#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:23.52#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:23.52#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:45:23.52#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:45:23.52$vck44/valo=2,534.99 2006.229.21:45:23.52#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.21:45:23.52#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.21:45:23.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:23.52#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:23.52#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:23.52#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:23.52#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:45:23.52#ibcon#first serial, iclass 28, count 0 2006.229.21:45:23.52#ibcon#enter sib2, iclass 28, count 0 2006.229.21:45:23.52#ibcon#flushed, iclass 28, count 0 2006.229.21:45:23.52#ibcon#about to write, iclass 28, count 0 2006.229.21:45:23.52#ibcon#wrote, iclass 28, count 0 2006.229.21:45:23.52#ibcon#about to read 3, iclass 28, count 0 2006.229.21:45:23.54#ibcon#read 3, iclass 28, count 0 2006.229.21:45:23.54#ibcon#about to read 4, iclass 28, count 0 2006.229.21:45:23.54#ibcon#read 4, iclass 28, count 0 2006.229.21:45:23.54#ibcon#about to read 5, iclass 28, count 0 2006.229.21:45:23.54#ibcon#read 5, iclass 28, count 0 2006.229.21:45:23.54#ibcon#about to read 6, iclass 28, count 0 2006.229.21:45:23.54#ibcon#read 6, iclass 28, count 0 2006.229.21:45:23.54#ibcon#end of sib2, iclass 28, count 0 2006.229.21:45:23.54#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:45:23.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:45:23.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.21:45:23.54#ibcon#*before write, iclass 28, count 0 2006.229.21:45:23.54#ibcon#enter sib2, iclass 28, count 0 2006.229.21:45:23.54#ibcon#flushed, iclass 28, count 0 2006.229.21:45:23.54#ibcon#about to write, iclass 28, count 0 2006.229.21:45:23.54#ibcon#wrote, iclass 28, count 0 2006.229.21:45:23.54#ibcon#about to read 3, iclass 28, count 0 2006.229.21:45:23.58#ibcon#read 3, iclass 28, count 0 2006.229.21:45:23.58#ibcon#about to read 4, iclass 28, count 0 2006.229.21:45:23.58#ibcon#read 4, iclass 28, count 0 2006.229.21:45:23.58#ibcon#about to read 5, iclass 28, count 0 2006.229.21:45:23.58#ibcon#read 5, iclass 28, count 0 2006.229.21:45:23.58#ibcon#about to read 6, iclass 28, count 0 2006.229.21:45:23.58#ibcon#read 6, iclass 28, count 0 2006.229.21:45:23.58#ibcon#end of sib2, iclass 28, count 0 2006.229.21:45:23.58#ibcon#*after write, iclass 28, count 0 2006.229.21:45:23.58#ibcon#*before return 0, iclass 28, count 0 2006.229.21:45:23.58#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:23.58#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:23.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:45:23.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:45:23.58$vck44/va=2,7 2006.229.21:45:23.58#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.21:45:23.58#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.21:45:23.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:23.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:23.64#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:23.64#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:23.64#ibcon#enter wrdev, iclass 30, count 2 2006.229.21:45:23.64#ibcon#first serial, iclass 30, count 2 2006.229.21:45:23.64#ibcon#enter sib2, iclass 30, count 2 2006.229.21:45:23.64#ibcon#flushed, iclass 30, count 2 2006.229.21:45:23.64#ibcon#about to write, iclass 30, count 2 2006.229.21:45:23.64#ibcon#wrote, iclass 30, count 2 2006.229.21:45:23.64#ibcon#about to read 3, iclass 30, count 2 2006.229.21:45:23.66#ibcon#read 3, iclass 30, count 2 2006.229.21:45:23.66#ibcon#about to read 4, iclass 30, count 2 2006.229.21:45:23.66#ibcon#read 4, iclass 30, count 2 2006.229.21:45:23.66#ibcon#about to read 5, iclass 30, count 2 2006.229.21:45:23.66#ibcon#read 5, iclass 30, count 2 2006.229.21:45:23.66#ibcon#about to read 6, iclass 30, count 2 2006.229.21:45:23.66#ibcon#read 6, iclass 30, count 2 2006.229.21:45:23.66#ibcon#end of sib2, iclass 30, count 2 2006.229.21:45:23.66#ibcon#*mode == 0, iclass 30, count 2 2006.229.21:45:23.66#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.21:45:23.66#ibcon#[25=AT02-07\r\n] 2006.229.21:45:23.66#ibcon#*before write, iclass 30, count 2 2006.229.21:45:23.66#ibcon#enter sib2, iclass 30, count 2 2006.229.21:45:23.66#ibcon#flushed, iclass 30, count 2 2006.229.21:45:23.66#ibcon#about to write, iclass 30, count 2 2006.229.21:45:23.66#ibcon#wrote, iclass 30, count 2 2006.229.21:45:23.66#ibcon#about to read 3, iclass 30, count 2 2006.229.21:45:23.69#ibcon#read 3, iclass 30, count 2 2006.229.21:45:23.69#ibcon#about to read 4, iclass 30, count 2 2006.229.21:45:23.69#ibcon#read 4, iclass 30, count 2 2006.229.21:45:23.69#ibcon#about to read 5, iclass 30, count 2 2006.229.21:45:23.69#ibcon#read 5, iclass 30, count 2 2006.229.21:45:23.69#ibcon#about to read 6, iclass 30, count 2 2006.229.21:45:23.69#ibcon#read 6, iclass 30, count 2 2006.229.21:45:23.69#ibcon#end of sib2, iclass 30, count 2 2006.229.21:45:23.69#ibcon#*after write, iclass 30, count 2 2006.229.21:45:23.69#ibcon#*before return 0, iclass 30, count 2 2006.229.21:45:23.69#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:23.69#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:23.69#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.21:45:23.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:23.69#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:23.81#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:23.81#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:23.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:45:23.81#ibcon#first serial, iclass 30, count 0 2006.229.21:45:23.81#ibcon#enter sib2, iclass 30, count 0 2006.229.21:45:23.81#ibcon#flushed, iclass 30, count 0 2006.229.21:45:23.81#ibcon#about to write, iclass 30, count 0 2006.229.21:45:23.81#ibcon#wrote, iclass 30, count 0 2006.229.21:45:23.81#ibcon#about to read 3, iclass 30, count 0 2006.229.21:45:23.83#ibcon#read 3, iclass 30, count 0 2006.229.21:45:23.83#ibcon#about to read 4, iclass 30, count 0 2006.229.21:45:23.83#ibcon#read 4, iclass 30, count 0 2006.229.21:45:23.83#ibcon#about to read 5, iclass 30, count 0 2006.229.21:45:23.83#ibcon#read 5, iclass 30, count 0 2006.229.21:45:23.83#ibcon#about to read 6, iclass 30, count 0 2006.229.21:45:23.83#ibcon#read 6, iclass 30, count 0 2006.229.21:45:23.83#ibcon#end of sib2, iclass 30, count 0 2006.229.21:45:23.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:45:23.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:45:23.83#ibcon#[25=USB\r\n] 2006.229.21:45:23.83#ibcon#*before write, iclass 30, count 0 2006.229.21:45:23.83#ibcon#enter sib2, iclass 30, count 0 2006.229.21:45:23.83#ibcon#flushed, iclass 30, count 0 2006.229.21:45:23.83#ibcon#about to write, iclass 30, count 0 2006.229.21:45:23.83#ibcon#wrote, iclass 30, count 0 2006.229.21:45:23.83#ibcon#about to read 3, iclass 30, count 0 2006.229.21:45:23.86#ibcon#read 3, iclass 30, count 0 2006.229.21:45:23.86#ibcon#about to read 4, iclass 30, count 0 2006.229.21:45:23.86#ibcon#read 4, iclass 30, count 0 2006.229.21:45:23.86#ibcon#about to read 5, iclass 30, count 0 2006.229.21:45:23.86#ibcon#read 5, iclass 30, count 0 2006.229.21:45:23.86#ibcon#about to read 6, iclass 30, count 0 2006.229.21:45:23.86#ibcon#read 6, iclass 30, count 0 2006.229.21:45:23.86#ibcon#end of sib2, iclass 30, count 0 2006.229.21:45:23.86#ibcon#*after write, iclass 30, count 0 2006.229.21:45:23.86#ibcon#*before return 0, iclass 30, count 0 2006.229.21:45:23.86#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:23.86#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:23.86#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:45:23.86#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:45:23.86$vck44/valo=3,564.99 2006.229.21:45:23.86#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.21:45:23.86#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.21:45:23.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:23.86#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:23.86#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:23.86#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:23.86#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:45:23.86#ibcon#first serial, iclass 32, count 0 2006.229.21:45:23.86#ibcon#enter sib2, iclass 32, count 0 2006.229.21:45:23.86#ibcon#flushed, iclass 32, count 0 2006.229.21:45:23.86#ibcon#about to write, iclass 32, count 0 2006.229.21:45:23.86#ibcon#wrote, iclass 32, count 0 2006.229.21:45:23.86#ibcon#about to read 3, iclass 32, count 0 2006.229.21:45:23.88#ibcon#read 3, iclass 32, count 0 2006.229.21:45:23.88#ibcon#about to read 4, iclass 32, count 0 2006.229.21:45:23.88#ibcon#read 4, iclass 32, count 0 2006.229.21:45:23.88#ibcon#about to read 5, iclass 32, count 0 2006.229.21:45:23.88#ibcon#read 5, iclass 32, count 0 2006.229.21:45:23.88#ibcon#about to read 6, iclass 32, count 0 2006.229.21:45:23.88#ibcon#read 6, iclass 32, count 0 2006.229.21:45:23.88#ibcon#end of sib2, iclass 32, count 0 2006.229.21:45:23.88#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:45:23.88#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:45:23.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.21:45:23.88#ibcon#*before write, iclass 32, count 0 2006.229.21:45:23.88#ibcon#enter sib2, iclass 32, count 0 2006.229.21:45:23.88#ibcon#flushed, iclass 32, count 0 2006.229.21:45:23.88#ibcon#about to write, iclass 32, count 0 2006.229.21:45:23.88#ibcon#wrote, iclass 32, count 0 2006.229.21:45:23.88#ibcon#about to read 3, iclass 32, count 0 2006.229.21:45:23.92#ibcon#read 3, iclass 32, count 0 2006.229.21:45:23.92#ibcon#about to read 4, iclass 32, count 0 2006.229.21:45:23.92#ibcon#read 4, iclass 32, count 0 2006.229.21:45:23.92#ibcon#about to read 5, iclass 32, count 0 2006.229.21:45:23.92#ibcon#read 5, iclass 32, count 0 2006.229.21:45:23.92#ibcon#about to read 6, iclass 32, count 0 2006.229.21:45:23.92#ibcon#read 6, iclass 32, count 0 2006.229.21:45:23.92#ibcon#end of sib2, iclass 32, count 0 2006.229.21:45:23.92#ibcon#*after write, iclass 32, count 0 2006.229.21:45:23.92#ibcon#*before return 0, iclass 32, count 0 2006.229.21:45:23.92#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:23.92#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:23.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:45:23.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:45:23.92$vck44/va=3,6 2006.229.21:45:23.92#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.21:45:23.92#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.21:45:23.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:23.92#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:45:23.93#abcon#<5=/08 0.8 2.9 27.41 991002.3\r\n> 2006.229.21:45:23.95#abcon#{5=INTERFACE CLEAR} 2006.229.21:45:23.98#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:45:23.98#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:45:23.98#ibcon#enter wrdev, iclass 35, count 2 2006.229.21:45:23.98#ibcon#first serial, iclass 35, count 2 2006.229.21:45:23.98#ibcon#enter sib2, iclass 35, count 2 2006.229.21:45:23.98#ibcon#flushed, iclass 35, count 2 2006.229.21:45:23.98#ibcon#about to write, iclass 35, count 2 2006.229.21:45:23.98#ibcon#wrote, iclass 35, count 2 2006.229.21:45:23.98#ibcon#about to read 3, iclass 35, count 2 2006.229.21:45:24.00#ibcon#read 3, iclass 35, count 2 2006.229.21:45:24.00#ibcon#about to read 4, iclass 35, count 2 2006.229.21:45:24.00#ibcon#read 4, iclass 35, count 2 2006.229.21:45:24.00#ibcon#about to read 5, iclass 35, count 2 2006.229.21:45:24.00#ibcon#read 5, iclass 35, count 2 2006.229.21:45:24.00#ibcon#about to read 6, iclass 35, count 2 2006.229.21:45:24.00#ibcon#read 6, iclass 35, count 2 2006.229.21:45:24.00#ibcon#end of sib2, iclass 35, count 2 2006.229.21:45:24.00#ibcon#*mode == 0, iclass 35, count 2 2006.229.21:45:24.00#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.21:45:24.00#ibcon#[25=AT03-06\r\n] 2006.229.21:45:24.00#ibcon#*before write, iclass 35, count 2 2006.229.21:45:24.00#ibcon#enter sib2, iclass 35, count 2 2006.229.21:45:24.00#ibcon#flushed, iclass 35, count 2 2006.229.21:45:24.00#ibcon#about to write, iclass 35, count 2 2006.229.21:45:24.00#ibcon#wrote, iclass 35, count 2 2006.229.21:45:24.00#ibcon#about to read 3, iclass 35, count 2 2006.229.21:45:24.01#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:45:24.03#ibcon#read 3, iclass 35, count 2 2006.229.21:45:24.03#ibcon#about to read 4, iclass 35, count 2 2006.229.21:45:24.03#ibcon#read 4, iclass 35, count 2 2006.229.21:45:24.03#ibcon#about to read 5, iclass 35, count 2 2006.229.21:45:24.03#ibcon#read 5, iclass 35, count 2 2006.229.21:45:24.03#ibcon#about to read 6, iclass 35, count 2 2006.229.21:45:24.03#ibcon#read 6, iclass 35, count 2 2006.229.21:45:24.03#ibcon#end of sib2, iclass 35, count 2 2006.229.21:45:24.03#ibcon#*after write, iclass 35, count 2 2006.229.21:45:24.03#ibcon#*before return 0, iclass 35, count 2 2006.229.21:45:24.03#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:45:24.03#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.21:45:24.03#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.21:45:24.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:24.03#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:45:24.15#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:45:24.15#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:45:24.15#ibcon#enter wrdev, iclass 35, count 0 2006.229.21:45:24.15#ibcon#first serial, iclass 35, count 0 2006.229.21:45:24.15#ibcon#enter sib2, iclass 35, count 0 2006.229.21:45:24.15#ibcon#flushed, iclass 35, count 0 2006.229.21:45:24.15#ibcon#about to write, iclass 35, count 0 2006.229.21:45:24.15#ibcon#wrote, iclass 35, count 0 2006.229.21:45:24.15#ibcon#about to read 3, iclass 35, count 0 2006.229.21:45:24.17#ibcon#read 3, iclass 35, count 0 2006.229.21:45:24.17#ibcon#about to read 4, iclass 35, count 0 2006.229.21:45:24.17#ibcon#read 4, iclass 35, count 0 2006.229.21:45:24.17#ibcon#about to read 5, iclass 35, count 0 2006.229.21:45:24.17#ibcon#read 5, iclass 35, count 0 2006.229.21:45:24.17#ibcon#about to read 6, iclass 35, count 0 2006.229.21:45:24.17#ibcon#read 6, iclass 35, count 0 2006.229.21:45:24.17#ibcon#end of sib2, iclass 35, count 0 2006.229.21:45:24.17#ibcon#*mode == 0, iclass 35, count 0 2006.229.21:45:24.17#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.21:45:24.17#ibcon#[25=USB\r\n] 2006.229.21:45:24.17#ibcon#*before write, iclass 35, count 0 2006.229.21:45:24.17#ibcon#enter sib2, iclass 35, count 0 2006.229.21:45:24.17#ibcon#flushed, iclass 35, count 0 2006.229.21:45:24.17#ibcon#about to write, iclass 35, count 0 2006.229.21:45:24.17#ibcon#wrote, iclass 35, count 0 2006.229.21:45:24.17#ibcon#about to read 3, iclass 35, count 0 2006.229.21:45:24.20#ibcon#read 3, iclass 35, count 0 2006.229.21:45:24.20#ibcon#about to read 4, iclass 35, count 0 2006.229.21:45:24.20#ibcon#read 4, iclass 35, count 0 2006.229.21:45:24.20#ibcon#about to read 5, iclass 35, count 0 2006.229.21:45:24.20#ibcon#read 5, iclass 35, count 0 2006.229.21:45:24.20#ibcon#about to read 6, iclass 35, count 0 2006.229.21:45:24.20#ibcon#read 6, iclass 35, count 0 2006.229.21:45:24.20#ibcon#end of sib2, iclass 35, count 0 2006.229.21:45:24.20#ibcon#*after write, iclass 35, count 0 2006.229.21:45:24.20#ibcon#*before return 0, iclass 35, count 0 2006.229.21:45:24.20#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:45:24.20#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.21:45:24.20#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.21:45:24.20#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.21:45:24.20$vck44/valo=4,624.99 2006.229.21:45:24.20#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.21:45:24.20#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.21:45:24.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:24.20#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:24.20#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:24.20#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:24.20#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:45:24.20#ibcon#first serial, iclass 40, count 0 2006.229.21:45:24.20#ibcon#enter sib2, iclass 40, count 0 2006.229.21:45:24.20#ibcon#flushed, iclass 40, count 0 2006.229.21:45:24.20#ibcon#about to write, iclass 40, count 0 2006.229.21:45:24.20#ibcon#wrote, iclass 40, count 0 2006.229.21:45:24.20#ibcon#about to read 3, iclass 40, count 0 2006.229.21:45:24.22#ibcon#read 3, iclass 40, count 0 2006.229.21:45:24.22#ibcon#about to read 4, iclass 40, count 0 2006.229.21:45:24.22#ibcon#read 4, iclass 40, count 0 2006.229.21:45:24.22#ibcon#about to read 5, iclass 40, count 0 2006.229.21:45:24.22#ibcon#read 5, iclass 40, count 0 2006.229.21:45:24.22#ibcon#about to read 6, iclass 40, count 0 2006.229.21:45:24.22#ibcon#read 6, iclass 40, count 0 2006.229.21:45:24.22#ibcon#end of sib2, iclass 40, count 0 2006.229.21:45:24.22#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:45:24.22#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:45:24.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.21:45:24.22#ibcon#*before write, iclass 40, count 0 2006.229.21:45:24.22#ibcon#enter sib2, iclass 40, count 0 2006.229.21:45:24.22#ibcon#flushed, iclass 40, count 0 2006.229.21:45:24.22#ibcon#about to write, iclass 40, count 0 2006.229.21:45:24.22#ibcon#wrote, iclass 40, count 0 2006.229.21:45:24.22#ibcon#about to read 3, iclass 40, count 0 2006.229.21:45:24.26#ibcon#read 3, iclass 40, count 0 2006.229.21:45:24.26#ibcon#about to read 4, iclass 40, count 0 2006.229.21:45:24.26#ibcon#read 4, iclass 40, count 0 2006.229.21:45:24.26#ibcon#about to read 5, iclass 40, count 0 2006.229.21:45:24.26#ibcon#read 5, iclass 40, count 0 2006.229.21:45:24.26#ibcon#about to read 6, iclass 40, count 0 2006.229.21:45:24.26#ibcon#read 6, iclass 40, count 0 2006.229.21:45:24.26#ibcon#end of sib2, iclass 40, count 0 2006.229.21:45:24.26#ibcon#*after write, iclass 40, count 0 2006.229.21:45:24.26#ibcon#*before return 0, iclass 40, count 0 2006.229.21:45:24.26#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:24.26#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:24.26#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:45:24.26#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:45:24.26$vck44/va=4,7 2006.229.21:45:24.26#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.21:45:24.26#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.21:45:24.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:24.26#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:24.32#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:24.32#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:24.32#ibcon#enter wrdev, iclass 4, count 2 2006.229.21:45:24.32#ibcon#first serial, iclass 4, count 2 2006.229.21:45:24.32#ibcon#enter sib2, iclass 4, count 2 2006.229.21:45:24.32#ibcon#flushed, iclass 4, count 2 2006.229.21:45:24.32#ibcon#about to write, iclass 4, count 2 2006.229.21:45:24.32#ibcon#wrote, iclass 4, count 2 2006.229.21:45:24.32#ibcon#about to read 3, iclass 4, count 2 2006.229.21:45:24.34#ibcon#read 3, iclass 4, count 2 2006.229.21:45:24.34#ibcon#about to read 4, iclass 4, count 2 2006.229.21:45:24.34#ibcon#read 4, iclass 4, count 2 2006.229.21:45:24.34#ibcon#about to read 5, iclass 4, count 2 2006.229.21:45:24.34#ibcon#read 5, iclass 4, count 2 2006.229.21:45:24.34#ibcon#about to read 6, iclass 4, count 2 2006.229.21:45:24.34#ibcon#read 6, iclass 4, count 2 2006.229.21:45:24.34#ibcon#end of sib2, iclass 4, count 2 2006.229.21:45:24.34#ibcon#*mode == 0, iclass 4, count 2 2006.229.21:45:24.34#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.21:45:24.34#ibcon#[25=AT04-07\r\n] 2006.229.21:45:24.34#ibcon#*before write, iclass 4, count 2 2006.229.21:45:24.34#ibcon#enter sib2, iclass 4, count 2 2006.229.21:45:24.34#ibcon#flushed, iclass 4, count 2 2006.229.21:45:24.34#ibcon#about to write, iclass 4, count 2 2006.229.21:45:24.34#ibcon#wrote, iclass 4, count 2 2006.229.21:45:24.34#ibcon#about to read 3, iclass 4, count 2 2006.229.21:45:24.37#ibcon#read 3, iclass 4, count 2 2006.229.21:45:24.37#ibcon#about to read 4, iclass 4, count 2 2006.229.21:45:24.37#ibcon#read 4, iclass 4, count 2 2006.229.21:45:24.37#ibcon#about to read 5, iclass 4, count 2 2006.229.21:45:24.37#ibcon#read 5, iclass 4, count 2 2006.229.21:45:24.37#ibcon#about to read 6, iclass 4, count 2 2006.229.21:45:24.37#ibcon#read 6, iclass 4, count 2 2006.229.21:45:24.37#ibcon#end of sib2, iclass 4, count 2 2006.229.21:45:24.37#ibcon#*after write, iclass 4, count 2 2006.229.21:45:24.37#ibcon#*before return 0, iclass 4, count 2 2006.229.21:45:24.37#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:24.37#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:24.37#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.21:45:24.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:24.37#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:24.49#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:24.49#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:24.49#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:45:24.49#ibcon#first serial, iclass 4, count 0 2006.229.21:45:24.49#ibcon#enter sib2, iclass 4, count 0 2006.229.21:45:24.49#ibcon#flushed, iclass 4, count 0 2006.229.21:45:24.49#ibcon#about to write, iclass 4, count 0 2006.229.21:45:24.49#ibcon#wrote, iclass 4, count 0 2006.229.21:45:24.49#ibcon#about to read 3, iclass 4, count 0 2006.229.21:45:24.51#ibcon#read 3, iclass 4, count 0 2006.229.21:45:24.51#ibcon#about to read 4, iclass 4, count 0 2006.229.21:45:24.51#ibcon#read 4, iclass 4, count 0 2006.229.21:45:24.51#ibcon#about to read 5, iclass 4, count 0 2006.229.21:45:24.51#ibcon#read 5, iclass 4, count 0 2006.229.21:45:24.51#ibcon#about to read 6, iclass 4, count 0 2006.229.21:45:24.51#ibcon#read 6, iclass 4, count 0 2006.229.21:45:24.51#ibcon#end of sib2, iclass 4, count 0 2006.229.21:45:24.51#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:45:24.51#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:45:24.51#ibcon#[25=USB\r\n] 2006.229.21:45:24.51#ibcon#*before write, iclass 4, count 0 2006.229.21:45:24.51#ibcon#enter sib2, iclass 4, count 0 2006.229.21:45:24.51#ibcon#flushed, iclass 4, count 0 2006.229.21:45:24.51#ibcon#about to write, iclass 4, count 0 2006.229.21:45:24.51#ibcon#wrote, iclass 4, count 0 2006.229.21:45:24.51#ibcon#about to read 3, iclass 4, count 0 2006.229.21:45:24.54#ibcon#read 3, iclass 4, count 0 2006.229.21:45:24.54#ibcon#about to read 4, iclass 4, count 0 2006.229.21:45:24.54#ibcon#read 4, iclass 4, count 0 2006.229.21:45:24.54#ibcon#about to read 5, iclass 4, count 0 2006.229.21:45:24.54#ibcon#read 5, iclass 4, count 0 2006.229.21:45:24.54#ibcon#about to read 6, iclass 4, count 0 2006.229.21:45:24.54#ibcon#read 6, iclass 4, count 0 2006.229.21:45:24.54#ibcon#end of sib2, iclass 4, count 0 2006.229.21:45:24.54#ibcon#*after write, iclass 4, count 0 2006.229.21:45:24.54#ibcon#*before return 0, iclass 4, count 0 2006.229.21:45:24.54#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:24.54#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:24.54#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:45:24.54#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:45:24.54$vck44/valo=5,734.99 2006.229.21:45:24.54#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.21:45:24.54#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.21:45:24.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:24.54#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:24.54#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:24.54#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:24.54#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:45:24.54#ibcon#first serial, iclass 6, count 0 2006.229.21:45:24.54#ibcon#enter sib2, iclass 6, count 0 2006.229.21:45:24.54#ibcon#flushed, iclass 6, count 0 2006.229.21:45:24.54#ibcon#about to write, iclass 6, count 0 2006.229.21:45:24.54#ibcon#wrote, iclass 6, count 0 2006.229.21:45:24.54#ibcon#about to read 3, iclass 6, count 0 2006.229.21:45:24.56#ibcon#read 3, iclass 6, count 0 2006.229.21:45:24.56#ibcon#about to read 4, iclass 6, count 0 2006.229.21:45:24.56#ibcon#read 4, iclass 6, count 0 2006.229.21:45:24.56#ibcon#about to read 5, iclass 6, count 0 2006.229.21:45:24.56#ibcon#read 5, iclass 6, count 0 2006.229.21:45:24.56#ibcon#about to read 6, iclass 6, count 0 2006.229.21:45:24.56#ibcon#read 6, iclass 6, count 0 2006.229.21:45:24.56#ibcon#end of sib2, iclass 6, count 0 2006.229.21:45:24.56#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:45:24.56#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:45:24.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.21:45:24.56#ibcon#*before write, iclass 6, count 0 2006.229.21:45:24.56#ibcon#enter sib2, iclass 6, count 0 2006.229.21:45:24.56#ibcon#flushed, iclass 6, count 0 2006.229.21:45:24.56#ibcon#about to write, iclass 6, count 0 2006.229.21:45:24.56#ibcon#wrote, iclass 6, count 0 2006.229.21:45:24.56#ibcon#about to read 3, iclass 6, count 0 2006.229.21:45:24.60#ibcon#read 3, iclass 6, count 0 2006.229.21:45:24.60#ibcon#about to read 4, iclass 6, count 0 2006.229.21:45:24.60#ibcon#read 4, iclass 6, count 0 2006.229.21:45:24.60#ibcon#about to read 5, iclass 6, count 0 2006.229.21:45:24.60#ibcon#read 5, iclass 6, count 0 2006.229.21:45:24.60#ibcon#about to read 6, iclass 6, count 0 2006.229.21:45:24.60#ibcon#read 6, iclass 6, count 0 2006.229.21:45:24.60#ibcon#end of sib2, iclass 6, count 0 2006.229.21:45:24.60#ibcon#*after write, iclass 6, count 0 2006.229.21:45:24.60#ibcon#*before return 0, iclass 6, count 0 2006.229.21:45:24.60#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:24.60#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:24.60#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:45:24.60#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:45:24.60$vck44/va=5,4 2006.229.21:45:24.60#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.21:45:24.60#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.21:45:24.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:24.60#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:24.66#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:24.66#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:24.66#ibcon#enter wrdev, iclass 10, count 2 2006.229.21:45:24.66#ibcon#first serial, iclass 10, count 2 2006.229.21:45:24.66#ibcon#enter sib2, iclass 10, count 2 2006.229.21:45:24.66#ibcon#flushed, iclass 10, count 2 2006.229.21:45:24.66#ibcon#about to write, iclass 10, count 2 2006.229.21:45:24.66#ibcon#wrote, iclass 10, count 2 2006.229.21:45:24.66#ibcon#about to read 3, iclass 10, count 2 2006.229.21:45:24.68#ibcon#read 3, iclass 10, count 2 2006.229.21:45:24.68#ibcon#about to read 4, iclass 10, count 2 2006.229.21:45:24.68#ibcon#read 4, iclass 10, count 2 2006.229.21:45:24.68#ibcon#about to read 5, iclass 10, count 2 2006.229.21:45:24.68#ibcon#read 5, iclass 10, count 2 2006.229.21:45:24.68#ibcon#about to read 6, iclass 10, count 2 2006.229.21:45:24.68#ibcon#read 6, iclass 10, count 2 2006.229.21:45:24.68#ibcon#end of sib2, iclass 10, count 2 2006.229.21:45:24.68#ibcon#*mode == 0, iclass 10, count 2 2006.229.21:45:24.68#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.21:45:24.68#ibcon#[25=AT05-04\r\n] 2006.229.21:45:24.68#ibcon#*before write, iclass 10, count 2 2006.229.21:45:24.68#ibcon#enter sib2, iclass 10, count 2 2006.229.21:45:24.68#ibcon#flushed, iclass 10, count 2 2006.229.21:45:24.68#ibcon#about to write, iclass 10, count 2 2006.229.21:45:24.68#ibcon#wrote, iclass 10, count 2 2006.229.21:45:24.68#ibcon#about to read 3, iclass 10, count 2 2006.229.21:45:24.71#ibcon#read 3, iclass 10, count 2 2006.229.21:45:24.71#ibcon#about to read 4, iclass 10, count 2 2006.229.21:45:24.71#ibcon#read 4, iclass 10, count 2 2006.229.21:45:24.71#ibcon#about to read 5, iclass 10, count 2 2006.229.21:45:24.71#ibcon#read 5, iclass 10, count 2 2006.229.21:45:24.71#ibcon#about to read 6, iclass 10, count 2 2006.229.21:45:24.71#ibcon#read 6, iclass 10, count 2 2006.229.21:45:24.71#ibcon#end of sib2, iclass 10, count 2 2006.229.21:45:24.71#ibcon#*after write, iclass 10, count 2 2006.229.21:45:24.71#ibcon#*before return 0, iclass 10, count 2 2006.229.21:45:24.71#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:24.71#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:24.71#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.21:45:24.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:24.71#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:24.83#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:24.83#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:24.83#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:45:24.83#ibcon#first serial, iclass 10, count 0 2006.229.21:45:24.83#ibcon#enter sib2, iclass 10, count 0 2006.229.21:45:24.83#ibcon#flushed, iclass 10, count 0 2006.229.21:45:24.83#ibcon#about to write, iclass 10, count 0 2006.229.21:45:24.83#ibcon#wrote, iclass 10, count 0 2006.229.21:45:24.83#ibcon#about to read 3, iclass 10, count 0 2006.229.21:45:24.85#ibcon#read 3, iclass 10, count 0 2006.229.21:45:24.85#ibcon#about to read 4, iclass 10, count 0 2006.229.21:45:24.85#ibcon#read 4, iclass 10, count 0 2006.229.21:45:24.85#ibcon#about to read 5, iclass 10, count 0 2006.229.21:45:24.85#ibcon#read 5, iclass 10, count 0 2006.229.21:45:24.85#ibcon#about to read 6, iclass 10, count 0 2006.229.21:45:24.85#ibcon#read 6, iclass 10, count 0 2006.229.21:45:24.85#ibcon#end of sib2, iclass 10, count 0 2006.229.21:45:24.85#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:45:24.85#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:45:24.85#ibcon#[25=USB\r\n] 2006.229.21:45:24.85#ibcon#*before write, iclass 10, count 0 2006.229.21:45:24.85#ibcon#enter sib2, iclass 10, count 0 2006.229.21:45:24.85#ibcon#flushed, iclass 10, count 0 2006.229.21:45:24.85#ibcon#about to write, iclass 10, count 0 2006.229.21:45:24.85#ibcon#wrote, iclass 10, count 0 2006.229.21:45:24.85#ibcon#about to read 3, iclass 10, count 0 2006.229.21:45:24.88#ibcon#read 3, iclass 10, count 0 2006.229.21:45:24.88#ibcon#about to read 4, iclass 10, count 0 2006.229.21:45:24.88#ibcon#read 4, iclass 10, count 0 2006.229.21:45:24.88#ibcon#about to read 5, iclass 10, count 0 2006.229.21:45:24.88#ibcon#read 5, iclass 10, count 0 2006.229.21:45:24.88#ibcon#about to read 6, iclass 10, count 0 2006.229.21:45:24.88#ibcon#read 6, iclass 10, count 0 2006.229.21:45:24.88#ibcon#end of sib2, iclass 10, count 0 2006.229.21:45:24.88#ibcon#*after write, iclass 10, count 0 2006.229.21:45:24.88#ibcon#*before return 0, iclass 10, count 0 2006.229.21:45:24.88#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:24.88#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:24.88#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:45:24.88#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:45:24.88$vck44/valo=6,814.99 2006.229.21:45:24.88#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.21:45:24.88#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.21:45:24.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:24.88#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:24.88#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:24.88#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:24.88#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:45:24.88#ibcon#first serial, iclass 12, count 0 2006.229.21:45:24.88#ibcon#enter sib2, iclass 12, count 0 2006.229.21:45:24.88#ibcon#flushed, iclass 12, count 0 2006.229.21:45:24.88#ibcon#about to write, iclass 12, count 0 2006.229.21:45:24.88#ibcon#wrote, iclass 12, count 0 2006.229.21:45:24.88#ibcon#about to read 3, iclass 12, count 0 2006.229.21:45:24.90#ibcon#read 3, iclass 12, count 0 2006.229.21:45:24.90#ibcon#about to read 4, iclass 12, count 0 2006.229.21:45:24.90#ibcon#read 4, iclass 12, count 0 2006.229.21:45:24.90#ibcon#about to read 5, iclass 12, count 0 2006.229.21:45:24.90#ibcon#read 5, iclass 12, count 0 2006.229.21:45:24.90#ibcon#about to read 6, iclass 12, count 0 2006.229.21:45:24.90#ibcon#read 6, iclass 12, count 0 2006.229.21:45:24.90#ibcon#end of sib2, iclass 12, count 0 2006.229.21:45:24.90#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:45:24.90#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:45:24.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.21:45:24.90#ibcon#*before write, iclass 12, count 0 2006.229.21:45:24.90#ibcon#enter sib2, iclass 12, count 0 2006.229.21:45:24.90#ibcon#flushed, iclass 12, count 0 2006.229.21:45:24.90#ibcon#about to write, iclass 12, count 0 2006.229.21:45:24.90#ibcon#wrote, iclass 12, count 0 2006.229.21:45:24.90#ibcon#about to read 3, iclass 12, count 0 2006.229.21:45:24.94#ibcon#read 3, iclass 12, count 0 2006.229.21:45:24.94#ibcon#about to read 4, iclass 12, count 0 2006.229.21:45:24.94#ibcon#read 4, iclass 12, count 0 2006.229.21:45:24.94#ibcon#about to read 5, iclass 12, count 0 2006.229.21:45:24.94#ibcon#read 5, iclass 12, count 0 2006.229.21:45:24.94#ibcon#about to read 6, iclass 12, count 0 2006.229.21:45:24.94#ibcon#read 6, iclass 12, count 0 2006.229.21:45:24.94#ibcon#end of sib2, iclass 12, count 0 2006.229.21:45:24.94#ibcon#*after write, iclass 12, count 0 2006.229.21:45:24.94#ibcon#*before return 0, iclass 12, count 0 2006.229.21:45:24.94#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:24.94#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:24.94#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:45:24.94#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:45:24.94$vck44/va=6,4 2006.229.21:45:24.94#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.21:45:24.94#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.21:45:24.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:24.94#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:25.00#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:25.00#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:25.00#ibcon#enter wrdev, iclass 14, count 2 2006.229.21:45:25.00#ibcon#first serial, iclass 14, count 2 2006.229.21:45:25.00#ibcon#enter sib2, iclass 14, count 2 2006.229.21:45:25.00#ibcon#flushed, iclass 14, count 2 2006.229.21:45:25.00#ibcon#about to write, iclass 14, count 2 2006.229.21:45:25.00#ibcon#wrote, iclass 14, count 2 2006.229.21:45:25.00#ibcon#about to read 3, iclass 14, count 2 2006.229.21:45:25.02#ibcon#read 3, iclass 14, count 2 2006.229.21:45:25.02#ibcon#about to read 4, iclass 14, count 2 2006.229.21:45:25.02#ibcon#read 4, iclass 14, count 2 2006.229.21:45:25.02#ibcon#about to read 5, iclass 14, count 2 2006.229.21:45:25.02#ibcon#read 5, iclass 14, count 2 2006.229.21:45:25.02#ibcon#about to read 6, iclass 14, count 2 2006.229.21:45:25.02#ibcon#read 6, iclass 14, count 2 2006.229.21:45:25.02#ibcon#end of sib2, iclass 14, count 2 2006.229.21:45:25.02#ibcon#*mode == 0, iclass 14, count 2 2006.229.21:45:25.02#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.21:45:25.02#ibcon#[25=AT06-04\r\n] 2006.229.21:45:25.02#ibcon#*before write, iclass 14, count 2 2006.229.21:45:25.02#ibcon#enter sib2, iclass 14, count 2 2006.229.21:45:25.02#ibcon#flushed, iclass 14, count 2 2006.229.21:45:25.02#ibcon#about to write, iclass 14, count 2 2006.229.21:45:25.02#ibcon#wrote, iclass 14, count 2 2006.229.21:45:25.02#ibcon#about to read 3, iclass 14, count 2 2006.229.21:45:25.05#ibcon#read 3, iclass 14, count 2 2006.229.21:45:25.05#ibcon#about to read 4, iclass 14, count 2 2006.229.21:45:25.05#ibcon#read 4, iclass 14, count 2 2006.229.21:45:25.05#ibcon#about to read 5, iclass 14, count 2 2006.229.21:45:25.05#ibcon#read 5, iclass 14, count 2 2006.229.21:45:25.05#ibcon#about to read 6, iclass 14, count 2 2006.229.21:45:25.05#ibcon#read 6, iclass 14, count 2 2006.229.21:45:25.05#ibcon#end of sib2, iclass 14, count 2 2006.229.21:45:25.05#ibcon#*after write, iclass 14, count 2 2006.229.21:45:25.05#ibcon#*before return 0, iclass 14, count 2 2006.229.21:45:25.05#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:25.05#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:25.05#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.21:45:25.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:25.05#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:25.17#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:25.17#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:25.17#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:45:25.17#ibcon#first serial, iclass 14, count 0 2006.229.21:45:25.17#ibcon#enter sib2, iclass 14, count 0 2006.229.21:45:25.17#ibcon#flushed, iclass 14, count 0 2006.229.21:45:25.17#ibcon#about to write, iclass 14, count 0 2006.229.21:45:25.17#ibcon#wrote, iclass 14, count 0 2006.229.21:45:25.17#ibcon#about to read 3, iclass 14, count 0 2006.229.21:45:25.19#ibcon#read 3, iclass 14, count 0 2006.229.21:45:25.19#ibcon#about to read 4, iclass 14, count 0 2006.229.21:45:25.19#ibcon#read 4, iclass 14, count 0 2006.229.21:45:25.19#ibcon#about to read 5, iclass 14, count 0 2006.229.21:45:25.19#ibcon#read 5, iclass 14, count 0 2006.229.21:45:25.19#ibcon#about to read 6, iclass 14, count 0 2006.229.21:45:25.19#ibcon#read 6, iclass 14, count 0 2006.229.21:45:25.19#ibcon#end of sib2, iclass 14, count 0 2006.229.21:45:25.19#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:45:25.19#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:45:25.19#ibcon#[25=USB\r\n] 2006.229.21:45:25.19#ibcon#*before write, iclass 14, count 0 2006.229.21:45:25.19#ibcon#enter sib2, iclass 14, count 0 2006.229.21:45:25.19#ibcon#flushed, iclass 14, count 0 2006.229.21:45:25.19#ibcon#about to write, iclass 14, count 0 2006.229.21:45:25.19#ibcon#wrote, iclass 14, count 0 2006.229.21:45:25.19#ibcon#about to read 3, iclass 14, count 0 2006.229.21:45:25.22#ibcon#read 3, iclass 14, count 0 2006.229.21:45:25.22#ibcon#about to read 4, iclass 14, count 0 2006.229.21:45:25.22#ibcon#read 4, iclass 14, count 0 2006.229.21:45:25.22#ibcon#about to read 5, iclass 14, count 0 2006.229.21:45:25.22#ibcon#read 5, iclass 14, count 0 2006.229.21:45:25.22#ibcon#about to read 6, iclass 14, count 0 2006.229.21:45:25.22#ibcon#read 6, iclass 14, count 0 2006.229.21:45:25.22#ibcon#end of sib2, iclass 14, count 0 2006.229.21:45:25.22#ibcon#*after write, iclass 14, count 0 2006.229.21:45:25.22#ibcon#*before return 0, iclass 14, count 0 2006.229.21:45:25.22#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:25.22#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:25.22#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:45:25.22#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:45:25.22$vck44/valo=7,864.99 2006.229.21:45:25.22#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.21:45:25.22#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.21:45:25.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:25.22#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:25.22#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:25.22#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:25.22#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:45:25.22#ibcon#first serial, iclass 16, count 0 2006.229.21:45:25.22#ibcon#enter sib2, iclass 16, count 0 2006.229.21:45:25.22#ibcon#flushed, iclass 16, count 0 2006.229.21:45:25.22#ibcon#about to write, iclass 16, count 0 2006.229.21:45:25.22#ibcon#wrote, iclass 16, count 0 2006.229.21:45:25.22#ibcon#about to read 3, iclass 16, count 0 2006.229.21:45:25.24#ibcon#read 3, iclass 16, count 0 2006.229.21:45:25.24#ibcon#about to read 4, iclass 16, count 0 2006.229.21:45:25.24#ibcon#read 4, iclass 16, count 0 2006.229.21:45:25.24#ibcon#about to read 5, iclass 16, count 0 2006.229.21:45:25.24#ibcon#read 5, iclass 16, count 0 2006.229.21:45:25.24#ibcon#about to read 6, iclass 16, count 0 2006.229.21:45:25.24#ibcon#read 6, iclass 16, count 0 2006.229.21:45:25.24#ibcon#end of sib2, iclass 16, count 0 2006.229.21:45:25.24#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:45:25.24#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:45:25.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.21:45:25.24#ibcon#*before write, iclass 16, count 0 2006.229.21:45:25.24#ibcon#enter sib2, iclass 16, count 0 2006.229.21:45:25.24#ibcon#flushed, iclass 16, count 0 2006.229.21:45:25.24#ibcon#about to write, iclass 16, count 0 2006.229.21:45:25.24#ibcon#wrote, iclass 16, count 0 2006.229.21:45:25.24#ibcon#about to read 3, iclass 16, count 0 2006.229.21:45:25.28#ibcon#read 3, iclass 16, count 0 2006.229.21:45:25.28#ibcon#about to read 4, iclass 16, count 0 2006.229.21:45:25.28#ibcon#read 4, iclass 16, count 0 2006.229.21:45:25.28#ibcon#about to read 5, iclass 16, count 0 2006.229.21:45:25.28#ibcon#read 5, iclass 16, count 0 2006.229.21:45:25.28#ibcon#about to read 6, iclass 16, count 0 2006.229.21:45:25.28#ibcon#read 6, iclass 16, count 0 2006.229.21:45:25.28#ibcon#end of sib2, iclass 16, count 0 2006.229.21:45:25.28#ibcon#*after write, iclass 16, count 0 2006.229.21:45:25.28#ibcon#*before return 0, iclass 16, count 0 2006.229.21:45:25.28#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:25.28#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:25.28#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:45:25.28#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:45:25.28$vck44/va=7,5 2006.229.21:45:25.28#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.21:45:25.28#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.21:45:25.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:25.28#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:25.34#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:25.34#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:25.34#ibcon#enter wrdev, iclass 18, count 2 2006.229.21:45:25.34#ibcon#first serial, iclass 18, count 2 2006.229.21:45:25.34#ibcon#enter sib2, iclass 18, count 2 2006.229.21:45:25.34#ibcon#flushed, iclass 18, count 2 2006.229.21:45:25.34#ibcon#about to write, iclass 18, count 2 2006.229.21:45:25.34#ibcon#wrote, iclass 18, count 2 2006.229.21:45:25.34#ibcon#about to read 3, iclass 18, count 2 2006.229.21:45:25.36#ibcon#read 3, iclass 18, count 2 2006.229.21:45:25.36#ibcon#about to read 4, iclass 18, count 2 2006.229.21:45:25.36#ibcon#read 4, iclass 18, count 2 2006.229.21:45:25.36#ibcon#about to read 5, iclass 18, count 2 2006.229.21:45:25.36#ibcon#read 5, iclass 18, count 2 2006.229.21:45:25.36#ibcon#about to read 6, iclass 18, count 2 2006.229.21:45:25.36#ibcon#read 6, iclass 18, count 2 2006.229.21:45:25.36#ibcon#end of sib2, iclass 18, count 2 2006.229.21:45:25.36#ibcon#*mode == 0, iclass 18, count 2 2006.229.21:45:25.36#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.21:45:25.36#ibcon#[25=AT07-05\r\n] 2006.229.21:45:25.36#ibcon#*before write, iclass 18, count 2 2006.229.21:45:25.36#ibcon#enter sib2, iclass 18, count 2 2006.229.21:45:25.36#ibcon#flushed, iclass 18, count 2 2006.229.21:45:25.36#ibcon#about to write, iclass 18, count 2 2006.229.21:45:25.36#ibcon#wrote, iclass 18, count 2 2006.229.21:45:25.36#ibcon#about to read 3, iclass 18, count 2 2006.229.21:45:25.39#ibcon#read 3, iclass 18, count 2 2006.229.21:45:25.39#ibcon#about to read 4, iclass 18, count 2 2006.229.21:45:25.39#ibcon#read 4, iclass 18, count 2 2006.229.21:45:25.39#ibcon#about to read 5, iclass 18, count 2 2006.229.21:45:25.39#ibcon#read 5, iclass 18, count 2 2006.229.21:45:25.39#ibcon#about to read 6, iclass 18, count 2 2006.229.21:45:25.39#ibcon#read 6, iclass 18, count 2 2006.229.21:45:25.39#ibcon#end of sib2, iclass 18, count 2 2006.229.21:45:25.39#ibcon#*after write, iclass 18, count 2 2006.229.21:45:25.39#ibcon#*before return 0, iclass 18, count 2 2006.229.21:45:25.39#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:25.39#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:25.39#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.21:45:25.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:25.39#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:25.51#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:25.51#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:25.51#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:45:25.51#ibcon#first serial, iclass 18, count 0 2006.229.21:45:25.51#ibcon#enter sib2, iclass 18, count 0 2006.229.21:45:25.51#ibcon#flushed, iclass 18, count 0 2006.229.21:45:25.51#ibcon#about to write, iclass 18, count 0 2006.229.21:45:25.51#ibcon#wrote, iclass 18, count 0 2006.229.21:45:25.51#ibcon#about to read 3, iclass 18, count 0 2006.229.21:45:25.53#ibcon#read 3, iclass 18, count 0 2006.229.21:45:25.53#ibcon#about to read 4, iclass 18, count 0 2006.229.21:45:25.53#ibcon#read 4, iclass 18, count 0 2006.229.21:45:25.53#ibcon#about to read 5, iclass 18, count 0 2006.229.21:45:25.53#ibcon#read 5, iclass 18, count 0 2006.229.21:45:25.53#ibcon#about to read 6, iclass 18, count 0 2006.229.21:45:25.53#ibcon#read 6, iclass 18, count 0 2006.229.21:45:25.53#ibcon#end of sib2, iclass 18, count 0 2006.229.21:45:25.53#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:45:25.53#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:45:25.53#ibcon#[25=USB\r\n] 2006.229.21:45:25.53#ibcon#*before write, iclass 18, count 0 2006.229.21:45:25.53#ibcon#enter sib2, iclass 18, count 0 2006.229.21:45:25.53#ibcon#flushed, iclass 18, count 0 2006.229.21:45:25.53#ibcon#about to write, iclass 18, count 0 2006.229.21:45:25.53#ibcon#wrote, iclass 18, count 0 2006.229.21:45:25.53#ibcon#about to read 3, iclass 18, count 0 2006.229.21:45:25.56#ibcon#read 3, iclass 18, count 0 2006.229.21:45:25.56#ibcon#about to read 4, iclass 18, count 0 2006.229.21:45:25.56#ibcon#read 4, iclass 18, count 0 2006.229.21:45:25.56#ibcon#about to read 5, iclass 18, count 0 2006.229.21:45:25.56#ibcon#read 5, iclass 18, count 0 2006.229.21:45:25.56#ibcon#about to read 6, iclass 18, count 0 2006.229.21:45:25.56#ibcon#read 6, iclass 18, count 0 2006.229.21:45:25.56#ibcon#end of sib2, iclass 18, count 0 2006.229.21:45:25.56#ibcon#*after write, iclass 18, count 0 2006.229.21:45:25.56#ibcon#*before return 0, iclass 18, count 0 2006.229.21:45:25.56#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:25.56#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:25.56#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:45:25.56#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:45:25.56$vck44/valo=8,884.99 2006.229.21:45:25.56#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:45:25.56#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:45:25.56#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:25.56#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:25.56#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:25.56#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:25.56#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:45:25.56#ibcon#first serial, iclass 20, count 0 2006.229.21:45:25.56#ibcon#enter sib2, iclass 20, count 0 2006.229.21:45:25.56#ibcon#flushed, iclass 20, count 0 2006.229.21:45:25.56#ibcon#about to write, iclass 20, count 0 2006.229.21:45:25.56#ibcon#wrote, iclass 20, count 0 2006.229.21:45:25.56#ibcon#about to read 3, iclass 20, count 0 2006.229.21:45:25.58#ibcon#read 3, iclass 20, count 0 2006.229.21:45:25.58#ibcon#about to read 4, iclass 20, count 0 2006.229.21:45:25.58#ibcon#read 4, iclass 20, count 0 2006.229.21:45:25.58#ibcon#about to read 5, iclass 20, count 0 2006.229.21:45:25.58#ibcon#read 5, iclass 20, count 0 2006.229.21:45:25.58#ibcon#about to read 6, iclass 20, count 0 2006.229.21:45:25.58#ibcon#read 6, iclass 20, count 0 2006.229.21:45:25.58#ibcon#end of sib2, iclass 20, count 0 2006.229.21:45:25.58#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:45:25.58#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:45:25.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.21:45:25.58#ibcon#*before write, iclass 20, count 0 2006.229.21:45:25.58#ibcon#enter sib2, iclass 20, count 0 2006.229.21:45:25.58#ibcon#flushed, iclass 20, count 0 2006.229.21:45:25.58#ibcon#about to write, iclass 20, count 0 2006.229.21:45:25.58#ibcon#wrote, iclass 20, count 0 2006.229.21:45:25.58#ibcon#about to read 3, iclass 20, count 0 2006.229.21:45:25.62#ibcon#read 3, iclass 20, count 0 2006.229.21:45:25.62#ibcon#about to read 4, iclass 20, count 0 2006.229.21:45:25.62#ibcon#read 4, iclass 20, count 0 2006.229.21:45:25.62#ibcon#about to read 5, iclass 20, count 0 2006.229.21:45:25.62#ibcon#read 5, iclass 20, count 0 2006.229.21:45:25.62#ibcon#about to read 6, iclass 20, count 0 2006.229.21:45:25.62#ibcon#read 6, iclass 20, count 0 2006.229.21:45:25.62#ibcon#end of sib2, iclass 20, count 0 2006.229.21:45:25.62#ibcon#*after write, iclass 20, count 0 2006.229.21:45:25.62#ibcon#*before return 0, iclass 20, count 0 2006.229.21:45:25.62#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:25.62#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:25.62#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:45:25.62#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:45:25.62$vck44/va=8,6 2006.229.21:45:25.62#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.21:45:25.62#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.21:45:25.62#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:25.62#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:45:25.68#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:45:25.68#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:45:25.68#ibcon#enter wrdev, iclass 22, count 2 2006.229.21:45:25.68#ibcon#first serial, iclass 22, count 2 2006.229.21:45:25.68#ibcon#enter sib2, iclass 22, count 2 2006.229.21:45:25.68#ibcon#flushed, iclass 22, count 2 2006.229.21:45:25.68#ibcon#about to write, iclass 22, count 2 2006.229.21:45:25.68#ibcon#wrote, iclass 22, count 2 2006.229.21:45:25.68#ibcon#about to read 3, iclass 22, count 2 2006.229.21:45:25.70#ibcon#read 3, iclass 22, count 2 2006.229.21:45:25.70#ibcon#about to read 4, iclass 22, count 2 2006.229.21:45:25.70#ibcon#read 4, iclass 22, count 2 2006.229.21:45:25.70#ibcon#about to read 5, iclass 22, count 2 2006.229.21:45:25.70#ibcon#read 5, iclass 22, count 2 2006.229.21:45:25.70#ibcon#about to read 6, iclass 22, count 2 2006.229.21:45:25.70#ibcon#read 6, iclass 22, count 2 2006.229.21:45:25.70#ibcon#end of sib2, iclass 22, count 2 2006.229.21:45:25.70#ibcon#*mode == 0, iclass 22, count 2 2006.229.21:45:25.70#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.21:45:25.70#ibcon#[25=AT08-06\r\n] 2006.229.21:45:25.70#ibcon#*before write, iclass 22, count 2 2006.229.21:45:25.70#ibcon#enter sib2, iclass 22, count 2 2006.229.21:45:25.70#ibcon#flushed, iclass 22, count 2 2006.229.21:45:25.70#ibcon#about to write, iclass 22, count 2 2006.229.21:45:25.70#ibcon#wrote, iclass 22, count 2 2006.229.21:45:25.70#ibcon#about to read 3, iclass 22, count 2 2006.229.21:45:25.73#ibcon#read 3, iclass 22, count 2 2006.229.21:45:25.73#ibcon#about to read 4, iclass 22, count 2 2006.229.21:45:25.73#ibcon#read 4, iclass 22, count 2 2006.229.21:45:25.73#ibcon#about to read 5, iclass 22, count 2 2006.229.21:45:25.73#ibcon#read 5, iclass 22, count 2 2006.229.21:45:25.73#ibcon#about to read 6, iclass 22, count 2 2006.229.21:45:25.73#ibcon#read 6, iclass 22, count 2 2006.229.21:45:25.73#ibcon#end of sib2, iclass 22, count 2 2006.229.21:45:25.73#ibcon#*after write, iclass 22, count 2 2006.229.21:45:25.73#ibcon#*before return 0, iclass 22, count 2 2006.229.21:45:25.73#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:45:25.73#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.21:45:25.73#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.21:45:25.73#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:25.73#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:45:25.85#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:45:25.85#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:45:25.85#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:45:25.85#ibcon#first serial, iclass 22, count 0 2006.229.21:45:25.85#ibcon#enter sib2, iclass 22, count 0 2006.229.21:45:25.85#ibcon#flushed, iclass 22, count 0 2006.229.21:45:25.85#ibcon#about to write, iclass 22, count 0 2006.229.21:45:25.85#ibcon#wrote, iclass 22, count 0 2006.229.21:45:25.85#ibcon#about to read 3, iclass 22, count 0 2006.229.21:45:25.87#ibcon#read 3, iclass 22, count 0 2006.229.21:45:25.87#ibcon#about to read 4, iclass 22, count 0 2006.229.21:45:25.87#ibcon#read 4, iclass 22, count 0 2006.229.21:45:25.87#ibcon#about to read 5, iclass 22, count 0 2006.229.21:45:25.87#ibcon#read 5, iclass 22, count 0 2006.229.21:45:25.87#ibcon#about to read 6, iclass 22, count 0 2006.229.21:45:25.87#ibcon#read 6, iclass 22, count 0 2006.229.21:45:25.87#ibcon#end of sib2, iclass 22, count 0 2006.229.21:45:25.87#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:45:25.87#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:45:25.87#ibcon#[25=USB\r\n] 2006.229.21:45:25.87#ibcon#*before write, iclass 22, count 0 2006.229.21:45:25.87#ibcon#enter sib2, iclass 22, count 0 2006.229.21:45:25.87#ibcon#flushed, iclass 22, count 0 2006.229.21:45:25.87#ibcon#about to write, iclass 22, count 0 2006.229.21:45:25.87#ibcon#wrote, iclass 22, count 0 2006.229.21:45:25.87#ibcon#about to read 3, iclass 22, count 0 2006.229.21:45:25.90#ibcon#read 3, iclass 22, count 0 2006.229.21:45:25.90#ibcon#about to read 4, iclass 22, count 0 2006.229.21:45:25.90#ibcon#read 4, iclass 22, count 0 2006.229.21:45:25.90#ibcon#about to read 5, iclass 22, count 0 2006.229.21:45:25.90#ibcon#read 5, iclass 22, count 0 2006.229.21:45:25.90#ibcon#about to read 6, iclass 22, count 0 2006.229.21:45:25.90#ibcon#read 6, iclass 22, count 0 2006.229.21:45:25.90#ibcon#end of sib2, iclass 22, count 0 2006.229.21:45:25.90#ibcon#*after write, iclass 22, count 0 2006.229.21:45:25.90#ibcon#*before return 0, iclass 22, count 0 2006.229.21:45:25.90#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:45:25.90#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.21:45:25.90#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:45:25.90#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:45:25.90$vck44/vblo=1,629.99 2006.229.21:45:25.90#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.21:45:25.90#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.21:45:25.90#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:25.90#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:25.90#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:25.90#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:25.90#ibcon#enter wrdev, iclass 24, count 0 2006.229.21:45:25.90#ibcon#first serial, iclass 24, count 0 2006.229.21:45:25.90#ibcon#enter sib2, iclass 24, count 0 2006.229.21:45:25.90#ibcon#flushed, iclass 24, count 0 2006.229.21:45:25.90#ibcon#about to write, iclass 24, count 0 2006.229.21:45:25.90#ibcon#wrote, iclass 24, count 0 2006.229.21:45:25.90#ibcon#about to read 3, iclass 24, count 0 2006.229.21:45:25.92#ibcon#read 3, iclass 24, count 0 2006.229.21:45:25.92#ibcon#about to read 4, iclass 24, count 0 2006.229.21:45:25.92#ibcon#read 4, iclass 24, count 0 2006.229.21:45:25.92#ibcon#about to read 5, iclass 24, count 0 2006.229.21:45:25.92#ibcon#read 5, iclass 24, count 0 2006.229.21:45:25.92#ibcon#about to read 6, iclass 24, count 0 2006.229.21:45:25.92#ibcon#read 6, iclass 24, count 0 2006.229.21:45:25.92#ibcon#end of sib2, iclass 24, count 0 2006.229.21:45:25.92#ibcon#*mode == 0, iclass 24, count 0 2006.229.21:45:25.92#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.21:45:25.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.21:45:25.92#ibcon#*before write, iclass 24, count 0 2006.229.21:45:25.92#ibcon#enter sib2, iclass 24, count 0 2006.229.21:45:25.92#ibcon#flushed, iclass 24, count 0 2006.229.21:45:25.92#ibcon#about to write, iclass 24, count 0 2006.229.21:45:25.92#ibcon#wrote, iclass 24, count 0 2006.229.21:45:25.92#ibcon#about to read 3, iclass 24, count 0 2006.229.21:45:25.96#ibcon#read 3, iclass 24, count 0 2006.229.21:45:25.96#ibcon#about to read 4, iclass 24, count 0 2006.229.21:45:25.96#ibcon#read 4, iclass 24, count 0 2006.229.21:45:25.96#ibcon#about to read 5, iclass 24, count 0 2006.229.21:45:25.96#ibcon#read 5, iclass 24, count 0 2006.229.21:45:25.96#ibcon#about to read 6, iclass 24, count 0 2006.229.21:45:25.96#ibcon#read 6, iclass 24, count 0 2006.229.21:45:25.96#ibcon#end of sib2, iclass 24, count 0 2006.229.21:45:25.96#ibcon#*after write, iclass 24, count 0 2006.229.21:45:25.96#ibcon#*before return 0, iclass 24, count 0 2006.229.21:45:25.96#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:25.96#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.21:45:25.96#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.21:45:25.96#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.21:45:25.96$vck44/vb=1,4 2006.229.21:45:25.96#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.21:45:25.96#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.21:45:25.96#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:25.96#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:25.96#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:25.96#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:25.96#ibcon#enter wrdev, iclass 26, count 2 2006.229.21:45:25.96#ibcon#first serial, iclass 26, count 2 2006.229.21:45:25.96#ibcon#enter sib2, iclass 26, count 2 2006.229.21:45:25.96#ibcon#flushed, iclass 26, count 2 2006.229.21:45:25.96#ibcon#about to write, iclass 26, count 2 2006.229.21:45:25.96#ibcon#wrote, iclass 26, count 2 2006.229.21:45:25.96#ibcon#about to read 3, iclass 26, count 2 2006.229.21:45:25.98#ibcon#read 3, iclass 26, count 2 2006.229.21:45:25.98#ibcon#about to read 4, iclass 26, count 2 2006.229.21:45:25.98#ibcon#read 4, iclass 26, count 2 2006.229.21:45:25.98#ibcon#about to read 5, iclass 26, count 2 2006.229.21:45:25.98#ibcon#read 5, iclass 26, count 2 2006.229.21:45:25.98#ibcon#about to read 6, iclass 26, count 2 2006.229.21:45:25.98#ibcon#read 6, iclass 26, count 2 2006.229.21:45:25.98#ibcon#end of sib2, iclass 26, count 2 2006.229.21:45:25.98#ibcon#*mode == 0, iclass 26, count 2 2006.229.21:45:25.98#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.21:45:25.98#ibcon#[27=AT01-04\r\n] 2006.229.21:45:25.98#ibcon#*before write, iclass 26, count 2 2006.229.21:45:25.98#ibcon#enter sib2, iclass 26, count 2 2006.229.21:45:25.98#ibcon#flushed, iclass 26, count 2 2006.229.21:45:25.98#ibcon#about to write, iclass 26, count 2 2006.229.21:45:25.98#ibcon#wrote, iclass 26, count 2 2006.229.21:45:25.98#ibcon#about to read 3, iclass 26, count 2 2006.229.21:45:26.01#ibcon#read 3, iclass 26, count 2 2006.229.21:45:26.01#ibcon#about to read 4, iclass 26, count 2 2006.229.21:45:26.01#ibcon#read 4, iclass 26, count 2 2006.229.21:45:26.01#ibcon#about to read 5, iclass 26, count 2 2006.229.21:45:26.01#ibcon#read 5, iclass 26, count 2 2006.229.21:45:26.01#ibcon#about to read 6, iclass 26, count 2 2006.229.21:45:26.01#ibcon#read 6, iclass 26, count 2 2006.229.21:45:26.01#ibcon#end of sib2, iclass 26, count 2 2006.229.21:45:26.01#ibcon#*after write, iclass 26, count 2 2006.229.21:45:26.01#ibcon#*before return 0, iclass 26, count 2 2006.229.21:45:26.01#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:26.01#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.21:45:26.01#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.21:45:26.01#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:26.01#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:26.13#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:26.13#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:26.13#ibcon#enter wrdev, iclass 26, count 0 2006.229.21:45:26.13#ibcon#first serial, iclass 26, count 0 2006.229.21:45:26.13#ibcon#enter sib2, iclass 26, count 0 2006.229.21:45:26.13#ibcon#flushed, iclass 26, count 0 2006.229.21:45:26.13#ibcon#about to write, iclass 26, count 0 2006.229.21:45:26.13#ibcon#wrote, iclass 26, count 0 2006.229.21:45:26.13#ibcon#about to read 3, iclass 26, count 0 2006.229.21:45:26.15#ibcon#read 3, iclass 26, count 0 2006.229.21:45:26.15#ibcon#about to read 4, iclass 26, count 0 2006.229.21:45:26.15#ibcon#read 4, iclass 26, count 0 2006.229.21:45:26.15#ibcon#about to read 5, iclass 26, count 0 2006.229.21:45:26.15#ibcon#read 5, iclass 26, count 0 2006.229.21:45:26.15#ibcon#about to read 6, iclass 26, count 0 2006.229.21:45:26.15#ibcon#read 6, iclass 26, count 0 2006.229.21:45:26.15#ibcon#end of sib2, iclass 26, count 0 2006.229.21:45:26.15#ibcon#*mode == 0, iclass 26, count 0 2006.229.21:45:26.15#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.21:45:26.15#ibcon#[27=USB\r\n] 2006.229.21:45:26.15#ibcon#*before write, iclass 26, count 0 2006.229.21:45:26.15#ibcon#enter sib2, iclass 26, count 0 2006.229.21:45:26.15#ibcon#flushed, iclass 26, count 0 2006.229.21:45:26.15#ibcon#about to write, iclass 26, count 0 2006.229.21:45:26.15#ibcon#wrote, iclass 26, count 0 2006.229.21:45:26.15#ibcon#about to read 3, iclass 26, count 0 2006.229.21:45:26.18#ibcon#read 3, iclass 26, count 0 2006.229.21:45:26.18#ibcon#about to read 4, iclass 26, count 0 2006.229.21:45:26.18#ibcon#read 4, iclass 26, count 0 2006.229.21:45:26.18#ibcon#about to read 5, iclass 26, count 0 2006.229.21:45:26.18#ibcon#read 5, iclass 26, count 0 2006.229.21:45:26.18#ibcon#about to read 6, iclass 26, count 0 2006.229.21:45:26.18#ibcon#read 6, iclass 26, count 0 2006.229.21:45:26.18#ibcon#end of sib2, iclass 26, count 0 2006.229.21:45:26.18#ibcon#*after write, iclass 26, count 0 2006.229.21:45:26.18#ibcon#*before return 0, iclass 26, count 0 2006.229.21:45:26.18#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:26.18#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.21:45:26.18#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.21:45:26.18#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.21:45:26.18$vck44/vblo=2,634.99 2006.229.21:45:26.18#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.21:45:26.18#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.21:45:26.18#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:26.18#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:26.18#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:26.18#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:26.18#ibcon#enter wrdev, iclass 28, count 0 2006.229.21:45:26.18#ibcon#first serial, iclass 28, count 0 2006.229.21:45:26.18#ibcon#enter sib2, iclass 28, count 0 2006.229.21:45:26.18#ibcon#flushed, iclass 28, count 0 2006.229.21:45:26.18#ibcon#about to write, iclass 28, count 0 2006.229.21:45:26.18#ibcon#wrote, iclass 28, count 0 2006.229.21:45:26.18#ibcon#about to read 3, iclass 28, count 0 2006.229.21:45:26.20#ibcon#read 3, iclass 28, count 0 2006.229.21:45:26.20#ibcon#about to read 4, iclass 28, count 0 2006.229.21:45:26.20#ibcon#read 4, iclass 28, count 0 2006.229.21:45:26.20#ibcon#about to read 5, iclass 28, count 0 2006.229.21:45:26.20#ibcon#read 5, iclass 28, count 0 2006.229.21:45:26.20#ibcon#about to read 6, iclass 28, count 0 2006.229.21:45:26.20#ibcon#read 6, iclass 28, count 0 2006.229.21:45:26.20#ibcon#end of sib2, iclass 28, count 0 2006.229.21:45:26.20#ibcon#*mode == 0, iclass 28, count 0 2006.229.21:45:26.20#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.21:45:26.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.21:45:26.20#ibcon#*before write, iclass 28, count 0 2006.229.21:45:26.20#ibcon#enter sib2, iclass 28, count 0 2006.229.21:45:26.20#ibcon#flushed, iclass 28, count 0 2006.229.21:45:26.20#ibcon#about to write, iclass 28, count 0 2006.229.21:45:26.20#ibcon#wrote, iclass 28, count 0 2006.229.21:45:26.20#ibcon#about to read 3, iclass 28, count 0 2006.229.21:45:26.24#ibcon#read 3, iclass 28, count 0 2006.229.21:45:26.24#ibcon#about to read 4, iclass 28, count 0 2006.229.21:45:26.24#ibcon#read 4, iclass 28, count 0 2006.229.21:45:26.24#ibcon#about to read 5, iclass 28, count 0 2006.229.21:45:26.24#ibcon#read 5, iclass 28, count 0 2006.229.21:45:26.24#ibcon#about to read 6, iclass 28, count 0 2006.229.21:45:26.24#ibcon#read 6, iclass 28, count 0 2006.229.21:45:26.24#ibcon#end of sib2, iclass 28, count 0 2006.229.21:45:26.24#ibcon#*after write, iclass 28, count 0 2006.229.21:45:26.24#ibcon#*before return 0, iclass 28, count 0 2006.229.21:45:26.24#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:26.24#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.21:45:26.24#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.21:45:26.24#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.21:45:26.24$vck44/vb=2,4 2006.229.21:45:26.24#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.21:45:26.24#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.21:45:26.24#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:26.24#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:26.30#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:26.30#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:26.30#ibcon#enter wrdev, iclass 30, count 2 2006.229.21:45:26.30#ibcon#first serial, iclass 30, count 2 2006.229.21:45:26.30#ibcon#enter sib2, iclass 30, count 2 2006.229.21:45:26.30#ibcon#flushed, iclass 30, count 2 2006.229.21:45:26.30#ibcon#about to write, iclass 30, count 2 2006.229.21:45:26.30#ibcon#wrote, iclass 30, count 2 2006.229.21:45:26.30#ibcon#about to read 3, iclass 30, count 2 2006.229.21:45:26.32#ibcon#read 3, iclass 30, count 2 2006.229.21:45:26.32#ibcon#about to read 4, iclass 30, count 2 2006.229.21:45:26.32#ibcon#read 4, iclass 30, count 2 2006.229.21:45:26.32#ibcon#about to read 5, iclass 30, count 2 2006.229.21:45:26.32#ibcon#read 5, iclass 30, count 2 2006.229.21:45:26.32#ibcon#about to read 6, iclass 30, count 2 2006.229.21:45:26.32#ibcon#read 6, iclass 30, count 2 2006.229.21:45:26.32#ibcon#end of sib2, iclass 30, count 2 2006.229.21:45:26.32#ibcon#*mode == 0, iclass 30, count 2 2006.229.21:45:26.32#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.21:45:26.32#ibcon#[27=AT02-04\r\n] 2006.229.21:45:26.32#ibcon#*before write, iclass 30, count 2 2006.229.21:45:26.32#ibcon#enter sib2, iclass 30, count 2 2006.229.21:45:26.32#ibcon#flushed, iclass 30, count 2 2006.229.21:45:26.32#ibcon#about to write, iclass 30, count 2 2006.229.21:45:26.32#ibcon#wrote, iclass 30, count 2 2006.229.21:45:26.32#ibcon#about to read 3, iclass 30, count 2 2006.229.21:45:26.35#ibcon#read 3, iclass 30, count 2 2006.229.21:45:26.35#ibcon#about to read 4, iclass 30, count 2 2006.229.21:45:26.35#ibcon#read 4, iclass 30, count 2 2006.229.21:45:26.35#ibcon#about to read 5, iclass 30, count 2 2006.229.21:45:26.35#ibcon#read 5, iclass 30, count 2 2006.229.21:45:26.35#ibcon#about to read 6, iclass 30, count 2 2006.229.21:45:26.35#ibcon#read 6, iclass 30, count 2 2006.229.21:45:26.35#ibcon#end of sib2, iclass 30, count 2 2006.229.21:45:26.35#ibcon#*after write, iclass 30, count 2 2006.229.21:45:26.35#ibcon#*before return 0, iclass 30, count 2 2006.229.21:45:26.35#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:26.35#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.21:45:26.35#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.21:45:26.35#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:26.35#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:26.47#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:26.47#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:26.47#ibcon#enter wrdev, iclass 30, count 0 2006.229.21:45:26.47#ibcon#first serial, iclass 30, count 0 2006.229.21:45:26.47#ibcon#enter sib2, iclass 30, count 0 2006.229.21:45:26.47#ibcon#flushed, iclass 30, count 0 2006.229.21:45:26.47#ibcon#about to write, iclass 30, count 0 2006.229.21:45:26.47#ibcon#wrote, iclass 30, count 0 2006.229.21:45:26.47#ibcon#about to read 3, iclass 30, count 0 2006.229.21:45:26.49#ibcon#read 3, iclass 30, count 0 2006.229.21:45:26.49#ibcon#about to read 4, iclass 30, count 0 2006.229.21:45:26.49#ibcon#read 4, iclass 30, count 0 2006.229.21:45:26.49#ibcon#about to read 5, iclass 30, count 0 2006.229.21:45:26.49#ibcon#read 5, iclass 30, count 0 2006.229.21:45:26.49#ibcon#about to read 6, iclass 30, count 0 2006.229.21:45:26.49#ibcon#read 6, iclass 30, count 0 2006.229.21:45:26.49#ibcon#end of sib2, iclass 30, count 0 2006.229.21:45:26.49#ibcon#*mode == 0, iclass 30, count 0 2006.229.21:45:26.49#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.21:45:26.49#ibcon#[27=USB\r\n] 2006.229.21:45:26.49#ibcon#*before write, iclass 30, count 0 2006.229.21:45:26.49#ibcon#enter sib2, iclass 30, count 0 2006.229.21:45:26.49#ibcon#flushed, iclass 30, count 0 2006.229.21:45:26.49#ibcon#about to write, iclass 30, count 0 2006.229.21:45:26.49#ibcon#wrote, iclass 30, count 0 2006.229.21:45:26.49#ibcon#about to read 3, iclass 30, count 0 2006.229.21:45:26.52#ibcon#read 3, iclass 30, count 0 2006.229.21:45:26.52#ibcon#about to read 4, iclass 30, count 0 2006.229.21:45:26.52#ibcon#read 4, iclass 30, count 0 2006.229.21:45:26.52#ibcon#about to read 5, iclass 30, count 0 2006.229.21:45:26.52#ibcon#read 5, iclass 30, count 0 2006.229.21:45:26.52#ibcon#about to read 6, iclass 30, count 0 2006.229.21:45:26.52#ibcon#read 6, iclass 30, count 0 2006.229.21:45:26.52#ibcon#end of sib2, iclass 30, count 0 2006.229.21:45:26.52#ibcon#*after write, iclass 30, count 0 2006.229.21:45:26.52#ibcon#*before return 0, iclass 30, count 0 2006.229.21:45:26.52#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:26.52#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.21:45:26.52#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.21:45:26.52#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.21:45:26.52$vck44/vblo=3,649.99 2006.229.21:45:26.52#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.21:45:26.52#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.21:45:26.52#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:26.52#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:26.52#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:26.52#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:26.52#ibcon#enter wrdev, iclass 32, count 0 2006.229.21:45:26.52#ibcon#first serial, iclass 32, count 0 2006.229.21:45:26.52#ibcon#enter sib2, iclass 32, count 0 2006.229.21:45:26.52#ibcon#flushed, iclass 32, count 0 2006.229.21:45:26.52#ibcon#about to write, iclass 32, count 0 2006.229.21:45:26.52#ibcon#wrote, iclass 32, count 0 2006.229.21:45:26.52#ibcon#about to read 3, iclass 32, count 0 2006.229.21:45:26.54#ibcon#read 3, iclass 32, count 0 2006.229.21:45:26.54#ibcon#about to read 4, iclass 32, count 0 2006.229.21:45:26.54#ibcon#read 4, iclass 32, count 0 2006.229.21:45:26.54#ibcon#about to read 5, iclass 32, count 0 2006.229.21:45:26.54#ibcon#read 5, iclass 32, count 0 2006.229.21:45:26.54#ibcon#about to read 6, iclass 32, count 0 2006.229.21:45:26.54#ibcon#read 6, iclass 32, count 0 2006.229.21:45:26.54#ibcon#end of sib2, iclass 32, count 0 2006.229.21:45:26.54#ibcon#*mode == 0, iclass 32, count 0 2006.229.21:45:26.54#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.21:45:26.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.21:45:26.54#ibcon#*before write, iclass 32, count 0 2006.229.21:45:26.54#ibcon#enter sib2, iclass 32, count 0 2006.229.21:45:26.54#ibcon#flushed, iclass 32, count 0 2006.229.21:45:26.54#ibcon#about to write, iclass 32, count 0 2006.229.21:45:26.54#ibcon#wrote, iclass 32, count 0 2006.229.21:45:26.54#ibcon#about to read 3, iclass 32, count 0 2006.229.21:45:26.58#ibcon#read 3, iclass 32, count 0 2006.229.21:45:26.58#ibcon#about to read 4, iclass 32, count 0 2006.229.21:45:26.58#ibcon#read 4, iclass 32, count 0 2006.229.21:45:26.58#ibcon#about to read 5, iclass 32, count 0 2006.229.21:45:26.58#ibcon#read 5, iclass 32, count 0 2006.229.21:45:26.58#ibcon#about to read 6, iclass 32, count 0 2006.229.21:45:26.58#ibcon#read 6, iclass 32, count 0 2006.229.21:45:26.58#ibcon#end of sib2, iclass 32, count 0 2006.229.21:45:26.58#ibcon#*after write, iclass 32, count 0 2006.229.21:45:26.58#ibcon#*before return 0, iclass 32, count 0 2006.229.21:45:26.58#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:26.58#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.21:45:26.58#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.21:45:26.58#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.21:45:26.58$vck44/vb=3,4 2006.229.21:45:26.58#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.21:45:26.58#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.21:45:26.58#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:26.58#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:45:26.64#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:45:26.64#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:45:26.64#ibcon#enter wrdev, iclass 34, count 2 2006.229.21:45:26.64#ibcon#first serial, iclass 34, count 2 2006.229.21:45:26.64#ibcon#enter sib2, iclass 34, count 2 2006.229.21:45:26.64#ibcon#flushed, iclass 34, count 2 2006.229.21:45:26.64#ibcon#about to write, iclass 34, count 2 2006.229.21:45:26.64#ibcon#wrote, iclass 34, count 2 2006.229.21:45:26.64#ibcon#about to read 3, iclass 34, count 2 2006.229.21:45:26.66#ibcon#read 3, iclass 34, count 2 2006.229.21:45:26.66#ibcon#about to read 4, iclass 34, count 2 2006.229.21:45:26.66#ibcon#read 4, iclass 34, count 2 2006.229.21:45:26.66#ibcon#about to read 5, iclass 34, count 2 2006.229.21:45:26.66#ibcon#read 5, iclass 34, count 2 2006.229.21:45:26.66#ibcon#about to read 6, iclass 34, count 2 2006.229.21:45:26.66#ibcon#read 6, iclass 34, count 2 2006.229.21:45:26.66#ibcon#end of sib2, iclass 34, count 2 2006.229.21:45:26.66#ibcon#*mode == 0, iclass 34, count 2 2006.229.21:45:26.66#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.21:45:26.66#ibcon#[27=AT03-04\r\n] 2006.229.21:45:26.66#ibcon#*before write, iclass 34, count 2 2006.229.21:45:26.66#ibcon#enter sib2, iclass 34, count 2 2006.229.21:45:26.66#ibcon#flushed, iclass 34, count 2 2006.229.21:45:26.66#ibcon#about to write, iclass 34, count 2 2006.229.21:45:26.66#ibcon#wrote, iclass 34, count 2 2006.229.21:45:26.66#ibcon#about to read 3, iclass 34, count 2 2006.229.21:45:26.69#ibcon#read 3, iclass 34, count 2 2006.229.21:45:26.69#ibcon#about to read 4, iclass 34, count 2 2006.229.21:45:26.69#ibcon#read 4, iclass 34, count 2 2006.229.21:45:26.69#ibcon#about to read 5, iclass 34, count 2 2006.229.21:45:26.69#ibcon#read 5, iclass 34, count 2 2006.229.21:45:26.69#ibcon#about to read 6, iclass 34, count 2 2006.229.21:45:26.69#ibcon#read 6, iclass 34, count 2 2006.229.21:45:26.69#ibcon#end of sib2, iclass 34, count 2 2006.229.21:45:26.69#ibcon#*after write, iclass 34, count 2 2006.229.21:45:26.69#ibcon#*before return 0, iclass 34, count 2 2006.229.21:45:26.69#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:45:26.69#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.21:45:26.69#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.21:45:26.69#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:26.69#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:45:26.81#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:45:26.81#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:45:26.81#ibcon#enter wrdev, iclass 34, count 0 2006.229.21:45:26.81#ibcon#first serial, iclass 34, count 0 2006.229.21:45:26.81#ibcon#enter sib2, iclass 34, count 0 2006.229.21:45:26.81#ibcon#flushed, iclass 34, count 0 2006.229.21:45:26.81#ibcon#about to write, iclass 34, count 0 2006.229.21:45:26.81#ibcon#wrote, iclass 34, count 0 2006.229.21:45:26.81#ibcon#about to read 3, iclass 34, count 0 2006.229.21:45:26.83#ibcon#read 3, iclass 34, count 0 2006.229.21:45:26.83#ibcon#about to read 4, iclass 34, count 0 2006.229.21:45:26.83#ibcon#read 4, iclass 34, count 0 2006.229.21:45:26.83#ibcon#about to read 5, iclass 34, count 0 2006.229.21:45:26.83#ibcon#read 5, iclass 34, count 0 2006.229.21:45:26.83#ibcon#about to read 6, iclass 34, count 0 2006.229.21:45:26.83#ibcon#read 6, iclass 34, count 0 2006.229.21:45:26.83#ibcon#end of sib2, iclass 34, count 0 2006.229.21:45:26.83#ibcon#*mode == 0, iclass 34, count 0 2006.229.21:45:26.83#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.21:45:26.83#ibcon#[27=USB\r\n] 2006.229.21:45:26.83#ibcon#*before write, iclass 34, count 0 2006.229.21:45:26.83#ibcon#enter sib2, iclass 34, count 0 2006.229.21:45:26.83#ibcon#flushed, iclass 34, count 0 2006.229.21:45:26.83#ibcon#about to write, iclass 34, count 0 2006.229.21:45:26.83#ibcon#wrote, iclass 34, count 0 2006.229.21:45:26.83#ibcon#about to read 3, iclass 34, count 0 2006.229.21:45:26.86#ibcon#read 3, iclass 34, count 0 2006.229.21:45:26.86#ibcon#about to read 4, iclass 34, count 0 2006.229.21:45:26.86#ibcon#read 4, iclass 34, count 0 2006.229.21:45:26.86#ibcon#about to read 5, iclass 34, count 0 2006.229.21:45:26.86#ibcon#read 5, iclass 34, count 0 2006.229.21:45:26.86#ibcon#about to read 6, iclass 34, count 0 2006.229.21:45:26.86#ibcon#read 6, iclass 34, count 0 2006.229.21:45:26.86#ibcon#end of sib2, iclass 34, count 0 2006.229.21:45:26.86#ibcon#*after write, iclass 34, count 0 2006.229.21:45:26.86#ibcon#*before return 0, iclass 34, count 0 2006.229.21:45:26.86#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:45:26.86#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.21:45:26.86#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.21:45:26.86#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.21:45:26.86$vck44/vblo=4,679.99 2006.229.21:45:26.86#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.21:45:26.86#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.21:45:26.86#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:26.86#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:45:26.86#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:45:26.86#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:45:26.86#ibcon#enter wrdev, iclass 36, count 0 2006.229.21:45:26.86#ibcon#first serial, iclass 36, count 0 2006.229.21:45:26.86#ibcon#enter sib2, iclass 36, count 0 2006.229.21:45:26.86#ibcon#flushed, iclass 36, count 0 2006.229.21:45:26.86#ibcon#about to write, iclass 36, count 0 2006.229.21:45:26.86#ibcon#wrote, iclass 36, count 0 2006.229.21:45:26.86#ibcon#about to read 3, iclass 36, count 0 2006.229.21:45:26.88#ibcon#read 3, iclass 36, count 0 2006.229.21:45:26.88#ibcon#about to read 4, iclass 36, count 0 2006.229.21:45:26.88#ibcon#read 4, iclass 36, count 0 2006.229.21:45:26.88#ibcon#about to read 5, iclass 36, count 0 2006.229.21:45:26.88#ibcon#read 5, iclass 36, count 0 2006.229.21:45:26.88#ibcon#about to read 6, iclass 36, count 0 2006.229.21:45:26.88#ibcon#read 6, iclass 36, count 0 2006.229.21:45:26.88#ibcon#end of sib2, iclass 36, count 0 2006.229.21:45:26.88#ibcon#*mode == 0, iclass 36, count 0 2006.229.21:45:26.88#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.21:45:26.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.21:45:26.88#ibcon#*before write, iclass 36, count 0 2006.229.21:45:26.88#ibcon#enter sib2, iclass 36, count 0 2006.229.21:45:26.88#ibcon#flushed, iclass 36, count 0 2006.229.21:45:26.88#ibcon#about to write, iclass 36, count 0 2006.229.21:45:26.88#ibcon#wrote, iclass 36, count 0 2006.229.21:45:26.88#ibcon#about to read 3, iclass 36, count 0 2006.229.21:45:26.92#ibcon#read 3, iclass 36, count 0 2006.229.21:45:26.92#ibcon#about to read 4, iclass 36, count 0 2006.229.21:45:26.92#ibcon#read 4, iclass 36, count 0 2006.229.21:45:26.92#ibcon#about to read 5, iclass 36, count 0 2006.229.21:45:26.92#ibcon#read 5, iclass 36, count 0 2006.229.21:45:26.92#ibcon#about to read 6, iclass 36, count 0 2006.229.21:45:26.92#ibcon#read 6, iclass 36, count 0 2006.229.21:45:26.92#ibcon#end of sib2, iclass 36, count 0 2006.229.21:45:26.92#ibcon#*after write, iclass 36, count 0 2006.229.21:45:26.92#ibcon#*before return 0, iclass 36, count 0 2006.229.21:45:26.92#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:45:26.92#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.21:45:26.92#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.21:45:26.92#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.21:45:26.92$vck44/vb=4,4 2006.229.21:45:26.92#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.21:45:26.92#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.21:45:26.92#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:26.92#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:45:26.98#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:45:26.98#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:45:26.98#ibcon#enter wrdev, iclass 38, count 2 2006.229.21:45:26.98#ibcon#first serial, iclass 38, count 2 2006.229.21:45:26.98#ibcon#enter sib2, iclass 38, count 2 2006.229.21:45:26.98#ibcon#flushed, iclass 38, count 2 2006.229.21:45:26.98#ibcon#about to write, iclass 38, count 2 2006.229.21:45:26.98#ibcon#wrote, iclass 38, count 2 2006.229.21:45:26.98#ibcon#about to read 3, iclass 38, count 2 2006.229.21:45:27.00#ibcon#read 3, iclass 38, count 2 2006.229.21:45:27.00#ibcon#about to read 4, iclass 38, count 2 2006.229.21:45:27.00#ibcon#read 4, iclass 38, count 2 2006.229.21:45:27.00#ibcon#about to read 5, iclass 38, count 2 2006.229.21:45:27.00#ibcon#read 5, iclass 38, count 2 2006.229.21:45:27.00#ibcon#about to read 6, iclass 38, count 2 2006.229.21:45:27.00#ibcon#read 6, iclass 38, count 2 2006.229.21:45:27.00#ibcon#end of sib2, iclass 38, count 2 2006.229.21:45:27.00#ibcon#*mode == 0, iclass 38, count 2 2006.229.21:45:27.00#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.21:45:27.00#ibcon#[27=AT04-04\r\n] 2006.229.21:45:27.00#ibcon#*before write, iclass 38, count 2 2006.229.21:45:27.00#ibcon#enter sib2, iclass 38, count 2 2006.229.21:45:27.00#ibcon#flushed, iclass 38, count 2 2006.229.21:45:27.00#ibcon#about to write, iclass 38, count 2 2006.229.21:45:27.00#ibcon#wrote, iclass 38, count 2 2006.229.21:45:27.00#ibcon#about to read 3, iclass 38, count 2 2006.229.21:45:27.03#ibcon#read 3, iclass 38, count 2 2006.229.21:45:27.03#ibcon#about to read 4, iclass 38, count 2 2006.229.21:45:27.03#ibcon#read 4, iclass 38, count 2 2006.229.21:45:27.03#ibcon#about to read 5, iclass 38, count 2 2006.229.21:45:27.03#ibcon#read 5, iclass 38, count 2 2006.229.21:45:27.03#ibcon#about to read 6, iclass 38, count 2 2006.229.21:45:27.03#ibcon#read 6, iclass 38, count 2 2006.229.21:45:27.03#ibcon#end of sib2, iclass 38, count 2 2006.229.21:45:27.03#ibcon#*after write, iclass 38, count 2 2006.229.21:45:27.03#ibcon#*before return 0, iclass 38, count 2 2006.229.21:45:27.03#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:45:27.03#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.21:45:27.03#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.21:45:27.03#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:27.03#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:45:27.15#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:45:27.15#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:45:27.15#ibcon#enter wrdev, iclass 38, count 0 2006.229.21:45:27.15#ibcon#first serial, iclass 38, count 0 2006.229.21:45:27.15#ibcon#enter sib2, iclass 38, count 0 2006.229.21:45:27.15#ibcon#flushed, iclass 38, count 0 2006.229.21:45:27.15#ibcon#about to write, iclass 38, count 0 2006.229.21:45:27.15#ibcon#wrote, iclass 38, count 0 2006.229.21:45:27.15#ibcon#about to read 3, iclass 38, count 0 2006.229.21:45:27.17#ibcon#read 3, iclass 38, count 0 2006.229.21:45:27.17#ibcon#about to read 4, iclass 38, count 0 2006.229.21:45:27.17#ibcon#read 4, iclass 38, count 0 2006.229.21:45:27.17#ibcon#about to read 5, iclass 38, count 0 2006.229.21:45:27.17#ibcon#read 5, iclass 38, count 0 2006.229.21:45:27.17#ibcon#about to read 6, iclass 38, count 0 2006.229.21:45:27.17#ibcon#read 6, iclass 38, count 0 2006.229.21:45:27.17#ibcon#end of sib2, iclass 38, count 0 2006.229.21:45:27.17#ibcon#*mode == 0, iclass 38, count 0 2006.229.21:45:27.17#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.21:45:27.17#ibcon#[27=USB\r\n] 2006.229.21:45:27.17#ibcon#*before write, iclass 38, count 0 2006.229.21:45:27.17#ibcon#enter sib2, iclass 38, count 0 2006.229.21:45:27.17#ibcon#flushed, iclass 38, count 0 2006.229.21:45:27.17#ibcon#about to write, iclass 38, count 0 2006.229.21:45:27.17#ibcon#wrote, iclass 38, count 0 2006.229.21:45:27.17#ibcon#about to read 3, iclass 38, count 0 2006.229.21:45:27.20#ibcon#read 3, iclass 38, count 0 2006.229.21:45:27.20#ibcon#about to read 4, iclass 38, count 0 2006.229.21:45:27.20#ibcon#read 4, iclass 38, count 0 2006.229.21:45:27.20#ibcon#about to read 5, iclass 38, count 0 2006.229.21:45:27.20#ibcon#read 5, iclass 38, count 0 2006.229.21:45:27.20#ibcon#about to read 6, iclass 38, count 0 2006.229.21:45:27.20#ibcon#read 6, iclass 38, count 0 2006.229.21:45:27.20#ibcon#end of sib2, iclass 38, count 0 2006.229.21:45:27.20#ibcon#*after write, iclass 38, count 0 2006.229.21:45:27.20#ibcon#*before return 0, iclass 38, count 0 2006.229.21:45:27.20#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:45:27.20#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.21:45:27.20#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.21:45:27.20#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.21:45:27.20$vck44/vblo=5,709.99 2006.229.21:45:27.20#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.21:45:27.20#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.21:45:27.20#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:27.20#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:27.20#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:27.20#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:27.20#ibcon#enter wrdev, iclass 40, count 0 2006.229.21:45:27.20#ibcon#first serial, iclass 40, count 0 2006.229.21:45:27.20#ibcon#enter sib2, iclass 40, count 0 2006.229.21:45:27.20#ibcon#flushed, iclass 40, count 0 2006.229.21:45:27.20#ibcon#about to write, iclass 40, count 0 2006.229.21:45:27.20#ibcon#wrote, iclass 40, count 0 2006.229.21:45:27.20#ibcon#about to read 3, iclass 40, count 0 2006.229.21:45:27.22#ibcon#read 3, iclass 40, count 0 2006.229.21:45:27.22#ibcon#about to read 4, iclass 40, count 0 2006.229.21:45:27.22#ibcon#read 4, iclass 40, count 0 2006.229.21:45:27.22#ibcon#about to read 5, iclass 40, count 0 2006.229.21:45:27.22#ibcon#read 5, iclass 40, count 0 2006.229.21:45:27.22#ibcon#about to read 6, iclass 40, count 0 2006.229.21:45:27.22#ibcon#read 6, iclass 40, count 0 2006.229.21:45:27.22#ibcon#end of sib2, iclass 40, count 0 2006.229.21:45:27.22#ibcon#*mode == 0, iclass 40, count 0 2006.229.21:45:27.22#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.21:45:27.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.21:45:27.22#ibcon#*before write, iclass 40, count 0 2006.229.21:45:27.22#ibcon#enter sib2, iclass 40, count 0 2006.229.21:45:27.22#ibcon#flushed, iclass 40, count 0 2006.229.21:45:27.22#ibcon#about to write, iclass 40, count 0 2006.229.21:45:27.22#ibcon#wrote, iclass 40, count 0 2006.229.21:45:27.22#ibcon#about to read 3, iclass 40, count 0 2006.229.21:45:27.26#ibcon#read 3, iclass 40, count 0 2006.229.21:45:27.26#ibcon#about to read 4, iclass 40, count 0 2006.229.21:45:27.26#ibcon#read 4, iclass 40, count 0 2006.229.21:45:27.26#ibcon#about to read 5, iclass 40, count 0 2006.229.21:45:27.26#ibcon#read 5, iclass 40, count 0 2006.229.21:45:27.26#ibcon#about to read 6, iclass 40, count 0 2006.229.21:45:27.26#ibcon#read 6, iclass 40, count 0 2006.229.21:45:27.26#ibcon#end of sib2, iclass 40, count 0 2006.229.21:45:27.26#ibcon#*after write, iclass 40, count 0 2006.229.21:45:27.26#ibcon#*before return 0, iclass 40, count 0 2006.229.21:45:27.26#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:27.26#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.21:45:27.26#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.21:45:27.26#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.21:45:27.26$vck44/vb=5,4 2006.229.21:45:27.26#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.21:45:27.26#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.21:45:27.26#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:27.26#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:27.32#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:27.32#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:27.32#ibcon#enter wrdev, iclass 4, count 2 2006.229.21:45:27.32#ibcon#first serial, iclass 4, count 2 2006.229.21:45:27.32#ibcon#enter sib2, iclass 4, count 2 2006.229.21:45:27.32#ibcon#flushed, iclass 4, count 2 2006.229.21:45:27.32#ibcon#about to write, iclass 4, count 2 2006.229.21:45:27.32#ibcon#wrote, iclass 4, count 2 2006.229.21:45:27.32#ibcon#about to read 3, iclass 4, count 2 2006.229.21:45:27.34#ibcon#read 3, iclass 4, count 2 2006.229.21:45:27.34#ibcon#about to read 4, iclass 4, count 2 2006.229.21:45:27.34#ibcon#read 4, iclass 4, count 2 2006.229.21:45:27.34#ibcon#about to read 5, iclass 4, count 2 2006.229.21:45:27.34#ibcon#read 5, iclass 4, count 2 2006.229.21:45:27.34#ibcon#about to read 6, iclass 4, count 2 2006.229.21:45:27.34#ibcon#read 6, iclass 4, count 2 2006.229.21:45:27.34#ibcon#end of sib2, iclass 4, count 2 2006.229.21:45:27.34#ibcon#*mode == 0, iclass 4, count 2 2006.229.21:45:27.34#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.21:45:27.34#ibcon#[27=AT05-04\r\n] 2006.229.21:45:27.34#ibcon#*before write, iclass 4, count 2 2006.229.21:45:27.34#ibcon#enter sib2, iclass 4, count 2 2006.229.21:45:27.34#ibcon#flushed, iclass 4, count 2 2006.229.21:45:27.34#ibcon#about to write, iclass 4, count 2 2006.229.21:45:27.34#ibcon#wrote, iclass 4, count 2 2006.229.21:45:27.34#ibcon#about to read 3, iclass 4, count 2 2006.229.21:45:27.37#ibcon#read 3, iclass 4, count 2 2006.229.21:45:27.37#ibcon#about to read 4, iclass 4, count 2 2006.229.21:45:27.37#ibcon#read 4, iclass 4, count 2 2006.229.21:45:27.37#ibcon#about to read 5, iclass 4, count 2 2006.229.21:45:27.37#ibcon#read 5, iclass 4, count 2 2006.229.21:45:27.37#ibcon#about to read 6, iclass 4, count 2 2006.229.21:45:27.37#ibcon#read 6, iclass 4, count 2 2006.229.21:45:27.37#ibcon#end of sib2, iclass 4, count 2 2006.229.21:45:27.37#ibcon#*after write, iclass 4, count 2 2006.229.21:45:27.37#ibcon#*before return 0, iclass 4, count 2 2006.229.21:45:27.37#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:27.37#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.21:45:27.37#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.21:45:27.37#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:27.37#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:27.49#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:27.49#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:27.49#ibcon#enter wrdev, iclass 4, count 0 2006.229.21:45:27.49#ibcon#first serial, iclass 4, count 0 2006.229.21:45:27.49#ibcon#enter sib2, iclass 4, count 0 2006.229.21:45:27.49#ibcon#flushed, iclass 4, count 0 2006.229.21:45:27.49#ibcon#about to write, iclass 4, count 0 2006.229.21:45:27.49#ibcon#wrote, iclass 4, count 0 2006.229.21:45:27.49#ibcon#about to read 3, iclass 4, count 0 2006.229.21:45:27.51#ibcon#read 3, iclass 4, count 0 2006.229.21:45:27.51#ibcon#about to read 4, iclass 4, count 0 2006.229.21:45:27.51#ibcon#read 4, iclass 4, count 0 2006.229.21:45:27.51#ibcon#about to read 5, iclass 4, count 0 2006.229.21:45:27.51#ibcon#read 5, iclass 4, count 0 2006.229.21:45:27.51#ibcon#about to read 6, iclass 4, count 0 2006.229.21:45:27.51#ibcon#read 6, iclass 4, count 0 2006.229.21:45:27.51#ibcon#end of sib2, iclass 4, count 0 2006.229.21:45:27.51#ibcon#*mode == 0, iclass 4, count 0 2006.229.21:45:27.51#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.21:45:27.51#ibcon#[27=USB\r\n] 2006.229.21:45:27.51#ibcon#*before write, iclass 4, count 0 2006.229.21:45:27.51#ibcon#enter sib2, iclass 4, count 0 2006.229.21:45:27.51#ibcon#flushed, iclass 4, count 0 2006.229.21:45:27.51#ibcon#about to write, iclass 4, count 0 2006.229.21:45:27.51#ibcon#wrote, iclass 4, count 0 2006.229.21:45:27.51#ibcon#about to read 3, iclass 4, count 0 2006.229.21:45:27.54#ibcon#read 3, iclass 4, count 0 2006.229.21:45:27.54#ibcon#about to read 4, iclass 4, count 0 2006.229.21:45:27.54#ibcon#read 4, iclass 4, count 0 2006.229.21:45:27.54#ibcon#about to read 5, iclass 4, count 0 2006.229.21:45:27.54#ibcon#read 5, iclass 4, count 0 2006.229.21:45:27.54#ibcon#about to read 6, iclass 4, count 0 2006.229.21:45:27.54#ibcon#read 6, iclass 4, count 0 2006.229.21:45:27.54#ibcon#end of sib2, iclass 4, count 0 2006.229.21:45:27.54#ibcon#*after write, iclass 4, count 0 2006.229.21:45:27.54#ibcon#*before return 0, iclass 4, count 0 2006.229.21:45:27.54#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:27.54#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.21:45:27.54#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.21:45:27.54#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.21:45:27.54$vck44/vblo=6,719.99 2006.229.21:45:27.54#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.21:45:27.54#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.21:45:27.54#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:27.54#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:27.54#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:27.54#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:27.54#ibcon#enter wrdev, iclass 6, count 0 2006.229.21:45:27.54#ibcon#first serial, iclass 6, count 0 2006.229.21:45:27.54#ibcon#enter sib2, iclass 6, count 0 2006.229.21:45:27.54#ibcon#flushed, iclass 6, count 0 2006.229.21:45:27.54#ibcon#about to write, iclass 6, count 0 2006.229.21:45:27.54#ibcon#wrote, iclass 6, count 0 2006.229.21:45:27.54#ibcon#about to read 3, iclass 6, count 0 2006.229.21:45:27.56#ibcon#read 3, iclass 6, count 0 2006.229.21:45:27.56#ibcon#about to read 4, iclass 6, count 0 2006.229.21:45:27.56#ibcon#read 4, iclass 6, count 0 2006.229.21:45:27.56#ibcon#about to read 5, iclass 6, count 0 2006.229.21:45:27.56#ibcon#read 5, iclass 6, count 0 2006.229.21:45:27.56#ibcon#about to read 6, iclass 6, count 0 2006.229.21:45:27.56#ibcon#read 6, iclass 6, count 0 2006.229.21:45:27.56#ibcon#end of sib2, iclass 6, count 0 2006.229.21:45:27.56#ibcon#*mode == 0, iclass 6, count 0 2006.229.21:45:27.56#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.21:45:27.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.21:45:27.56#ibcon#*before write, iclass 6, count 0 2006.229.21:45:27.56#ibcon#enter sib2, iclass 6, count 0 2006.229.21:45:27.56#ibcon#flushed, iclass 6, count 0 2006.229.21:45:27.56#ibcon#about to write, iclass 6, count 0 2006.229.21:45:27.56#ibcon#wrote, iclass 6, count 0 2006.229.21:45:27.56#ibcon#about to read 3, iclass 6, count 0 2006.229.21:45:27.60#ibcon#read 3, iclass 6, count 0 2006.229.21:45:27.60#ibcon#about to read 4, iclass 6, count 0 2006.229.21:45:27.60#ibcon#read 4, iclass 6, count 0 2006.229.21:45:27.60#ibcon#about to read 5, iclass 6, count 0 2006.229.21:45:27.60#ibcon#read 5, iclass 6, count 0 2006.229.21:45:27.60#ibcon#about to read 6, iclass 6, count 0 2006.229.21:45:27.60#ibcon#read 6, iclass 6, count 0 2006.229.21:45:27.60#ibcon#end of sib2, iclass 6, count 0 2006.229.21:45:27.60#ibcon#*after write, iclass 6, count 0 2006.229.21:45:27.60#ibcon#*before return 0, iclass 6, count 0 2006.229.21:45:27.60#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:27.60#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.21:45:27.60#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.21:45:27.60#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.21:45:27.60$vck44/vb=6,4 2006.229.21:45:27.60#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.21:45:27.60#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.21:45:27.60#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:27.60#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:27.66#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:27.66#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:27.66#ibcon#enter wrdev, iclass 10, count 2 2006.229.21:45:27.66#ibcon#first serial, iclass 10, count 2 2006.229.21:45:27.66#ibcon#enter sib2, iclass 10, count 2 2006.229.21:45:27.66#ibcon#flushed, iclass 10, count 2 2006.229.21:45:27.66#ibcon#about to write, iclass 10, count 2 2006.229.21:45:27.66#ibcon#wrote, iclass 10, count 2 2006.229.21:45:27.66#ibcon#about to read 3, iclass 10, count 2 2006.229.21:45:27.68#ibcon#read 3, iclass 10, count 2 2006.229.21:45:27.68#ibcon#about to read 4, iclass 10, count 2 2006.229.21:45:27.68#ibcon#read 4, iclass 10, count 2 2006.229.21:45:27.68#ibcon#about to read 5, iclass 10, count 2 2006.229.21:45:27.68#ibcon#read 5, iclass 10, count 2 2006.229.21:45:27.68#ibcon#about to read 6, iclass 10, count 2 2006.229.21:45:27.68#ibcon#read 6, iclass 10, count 2 2006.229.21:45:27.68#ibcon#end of sib2, iclass 10, count 2 2006.229.21:45:27.68#ibcon#*mode == 0, iclass 10, count 2 2006.229.21:45:27.68#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.21:45:27.68#ibcon#[27=AT06-04\r\n] 2006.229.21:45:27.68#ibcon#*before write, iclass 10, count 2 2006.229.21:45:27.68#ibcon#enter sib2, iclass 10, count 2 2006.229.21:45:27.68#ibcon#flushed, iclass 10, count 2 2006.229.21:45:27.68#ibcon#about to write, iclass 10, count 2 2006.229.21:45:27.68#ibcon#wrote, iclass 10, count 2 2006.229.21:45:27.68#ibcon#about to read 3, iclass 10, count 2 2006.229.21:45:27.71#ibcon#read 3, iclass 10, count 2 2006.229.21:45:27.71#ibcon#about to read 4, iclass 10, count 2 2006.229.21:45:27.71#ibcon#read 4, iclass 10, count 2 2006.229.21:45:27.71#ibcon#about to read 5, iclass 10, count 2 2006.229.21:45:27.71#ibcon#read 5, iclass 10, count 2 2006.229.21:45:27.71#ibcon#about to read 6, iclass 10, count 2 2006.229.21:45:27.71#ibcon#read 6, iclass 10, count 2 2006.229.21:45:27.71#ibcon#end of sib2, iclass 10, count 2 2006.229.21:45:27.71#ibcon#*after write, iclass 10, count 2 2006.229.21:45:27.71#ibcon#*before return 0, iclass 10, count 2 2006.229.21:45:27.71#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:27.71#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.21:45:27.71#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.21:45:27.71#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:27.71#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:27.83#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:27.83#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:27.83#ibcon#enter wrdev, iclass 10, count 0 2006.229.21:45:27.83#ibcon#first serial, iclass 10, count 0 2006.229.21:45:27.83#ibcon#enter sib2, iclass 10, count 0 2006.229.21:45:27.83#ibcon#flushed, iclass 10, count 0 2006.229.21:45:27.83#ibcon#about to write, iclass 10, count 0 2006.229.21:45:27.83#ibcon#wrote, iclass 10, count 0 2006.229.21:45:27.83#ibcon#about to read 3, iclass 10, count 0 2006.229.21:45:27.85#ibcon#read 3, iclass 10, count 0 2006.229.21:45:27.85#ibcon#about to read 4, iclass 10, count 0 2006.229.21:45:27.85#ibcon#read 4, iclass 10, count 0 2006.229.21:45:27.85#ibcon#about to read 5, iclass 10, count 0 2006.229.21:45:27.85#ibcon#read 5, iclass 10, count 0 2006.229.21:45:27.85#ibcon#about to read 6, iclass 10, count 0 2006.229.21:45:27.85#ibcon#read 6, iclass 10, count 0 2006.229.21:45:27.85#ibcon#end of sib2, iclass 10, count 0 2006.229.21:45:27.85#ibcon#*mode == 0, iclass 10, count 0 2006.229.21:45:27.85#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.21:45:27.85#ibcon#[27=USB\r\n] 2006.229.21:45:27.85#ibcon#*before write, iclass 10, count 0 2006.229.21:45:27.85#ibcon#enter sib2, iclass 10, count 0 2006.229.21:45:27.85#ibcon#flushed, iclass 10, count 0 2006.229.21:45:27.85#ibcon#about to write, iclass 10, count 0 2006.229.21:45:27.85#ibcon#wrote, iclass 10, count 0 2006.229.21:45:27.85#ibcon#about to read 3, iclass 10, count 0 2006.229.21:45:27.88#ibcon#read 3, iclass 10, count 0 2006.229.21:45:27.88#ibcon#about to read 4, iclass 10, count 0 2006.229.21:45:27.88#ibcon#read 4, iclass 10, count 0 2006.229.21:45:27.88#ibcon#about to read 5, iclass 10, count 0 2006.229.21:45:27.88#ibcon#read 5, iclass 10, count 0 2006.229.21:45:27.88#ibcon#about to read 6, iclass 10, count 0 2006.229.21:45:27.88#ibcon#read 6, iclass 10, count 0 2006.229.21:45:27.88#ibcon#end of sib2, iclass 10, count 0 2006.229.21:45:27.88#ibcon#*after write, iclass 10, count 0 2006.229.21:45:27.88#ibcon#*before return 0, iclass 10, count 0 2006.229.21:45:27.88#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:27.88#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.21:45:27.88#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.21:45:27.88#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.21:45:27.88$vck44/vblo=7,734.99 2006.229.21:45:27.88#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.21:45:27.88#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.21:45:27.88#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:27.88#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:27.88#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:27.88#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:27.88#ibcon#enter wrdev, iclass 12, count 0 2006.229.21:45:27.88#ibcon#first serial, iclass 12, count 0 2006.229.21:45:27.88#ibcon#enter sib2, iclass 12, count 0 2006.229.21:45:27.88#ibcon#flushed, iclass 12, count 0 2006.229.21:45:27.88#ibcon#about to write, iclass 12, count 0 2006.229.21:45:27.88#ibcon#wrote, iclass 12, count 0 2006.229.21:45:27.88#ibcon#about to read 3, iclass 12, count 0 2006.229.21:45:27.90#ibcon#read 3, iclass 12, count 0 2006.229.21:45:27.90#ibcon#about to read 4, iclass 12, count 0 2006.229.21:45:27.90#ibcon#read 4, iclass 12, count 0 2006.229.21:45:27.90#ibcon#about to read 5, iclass 12, count 0 2006.229.21:45:27.90#ibcon#read 5, iclass 12, count 0 2006.229.21:45:27.90#ibcon#about to read 6, iclass 12, count 0 2006.229.21:45:27.90#ibcon#read 6, iclass 12, count 0 2006.229.21:45:27.90#ibcon#end of sib2, iclass 12, count 0 2006.229.21:45:27.90#ibcon#*mode == 0, iclass 12, count 0 2006.229.21:45:27.90#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.21:45:27.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.21:45:27.90#ibcon#*before write, iclass 12, count 0 2006.229.21:45:27.90#ibcon#enter sib2, iclass 12, count 0 2006.229.21:45:27.90#ibcon#flushed, iclass 12, count 0 2006.229.21:45:27.90#ibcon#about to write, iclass 12, count 0 2006.229.21:45:27.90#ibcon#wrote, iclass 12, count 0 2006.229.21:45:27.90#ibcon#about to read 3, iclass 12, count 0 2006.229.21:45:27.94#ibcon#read 3, iclass 12, count 0 2006.229.21:45:27.94#ibcon#about to read 4, iclass 12, count 0 2006.229.21:45:27.94#ibcon#read 4, iclass 12, count 0 2006.229.21:45:27.94#ibcon#about to read 5, iclass 12, count 0 2006.229.21:45:27.94#ibcon#read 5, iclass 12, count 0 2006.229.21:45:27.94#ibcon#about to read 6, iclass 12, count 0 2006.229.21:45:27.94#ibcon#read 6, iclass 12, count 0 2006.229.21:45:27.94#ibcon#end of sib2, iclass 12, count 0 2006.229.21:45:27.94#ibcon#*after write, iclass 12, count 0 2006.229.21:45:27.94#ibcon#*before return 0, iclass 12, count 0 2006.229.21:45:27.94#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:27.94#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.21:45:27.94#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.21:45:27.94#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.21:45:27.94$vck44/vb=7,4 2006.229.21:45:27.94#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.21:45:27.94#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.21:45:27.94#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:27.94#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:28.00#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:28.00#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:28.00#ibcon#enter wrdev, iclass 14, count 2 2006.229.21:45:28.00#ibcon#first serial, iclass 14, count 2 2006.229.21:45:28.00#ibcon#enter sib2, iclass 14, count 2 2006.229.21:45:28.00#ibcon#flushed, iclass 14, count 2 2006.229.21:45:28.00#ibcon#about to write, iclass 14, count 2 2006.229.21:45:28.00#ibcon#wrote, iclass 14, count 2 2006.229.21:45:28.00#ibcon#about to read 3, iclass 14, count 2 2006.229.21:45:28.02#ibcon#read 3, iclass 14, count 2 2006.229.21:45:28.02#ibcon#about to read 4, iclass 14, count 2 2006.229.21:45:28.02#ibcon#read 4, iclass 14, count 2 2006.229.21:45:28.02#ibcon#about to read 5, iclass 14, count 2 2006.229.21:45:28.02#ibcon#read 5, iclass 14, count 2 2006.229.21:45:28.02#ibcon#about to read 6, iclass 14, count 2 2006.229.21:45:28.02#ibcon#read 6, iclass 14, count 2 2006.229.21:45:28.02#ibcon#end of sib2, iclass 14, count 2 2006.229.21:45:28.02#ibcon#*mode == 0, iclass 14, count 2 2006.229.21:45:28.02#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.21:45:28.02#ibcon#[27=AT07-04\r\n] 2006.229.21:45:28.02#ibcon#*before write, iclass 14, count 2 2006.229.21:45:28.02#ibcon#enter sib2, iclass 14, count 2 2006.229.21:45:28.02#ibcon#flushed, iclass 14, count 2 2006.229.21:45:28.02#ibcon#about to write, iclass 14, count 2 2006.229.21:45:28.02#ibcon#wrote, iclass 14, count 2 2006.229.21:45:28.02#ibcon#about to read 3, iclass 14, count 2 2006.229.21:45:28.05#ibcon#read 3, iclass 14, count 2 2006.229.21:45:28.05#ibcon#about to read 4, iclass 14, count 2 2006.229.21:45:28.05#ibcon#read 4, iclass 14, count 2 2006.229.21:45:28.05#ibcon#about to read 5, iclass 14, count 2 2006.229.21:45:28.05#ibcon#read 5, iclass 14, count 2 2006.229.21:45:28.05#ibcon#about to read 6, iclass 14, count 2 2006.229.21:45:28.05#ibcon#read 6, iclass 14, count 2 2006.229.21:45:28.05#ibcon#end of sib2, iclass 14, count 2 2006.229.21:45:28.05#ibcon#*after write, iclass 14, count 2 2006.229.21:45:28.05#ibcon#*before return 0, iclass 14, count 2 2006.229.21:45:28.05#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:28.05#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.21:45:28.05#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.21:45:28.05#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:28.05#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:28.17#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:28.17#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:28.17#ibcon#enter wrdev, iclass 14, count 0 2006.229.21:45:28.17#ibcon#first serial, iclass 14, count 0 2006.229.21:45:28.17#ibcon#enter sib2, iclass 14, count 0 2006.229.21:45:28.17#ibcon#flushed, iclass 14, count 0 2006.229.21:45:28.17#ibcon#about to write, iclass 14, count 0 2006.229.21:45:28.17#ibcon#wrote, iclass 14, count 0 2006.229.21:45:28.17#ibcon#about to read 3, iclass 14, count 0 2006.229.21:45:28.19#ibcon#read 3, iclass 14, count 0 2006.229.21:45:28.19#ibcon#about to read 4, iclass 14, count 0 2006.229.21:45:28.19#ibcon#read 4, iclass 14, count 0 2006.229.21:45:28.19#ibcon#about to read 5, iclass 14, count 0 2006.229.21:45:28.19#ibcon#read 5, iclass 14, count 0 2006.229.21:45:28.19#ibcon#about to read 6, iclass 14, count 0 2006.229.21:45:28.19#ibcon#read 6, iclass 14, count 0 2006.229.21:45:28.19#ibcon#end of sib2, iclass 14, count 0 2006.229.21:45:28.19#ibcon#*mode == 0, iclass 14, count 0 2006.229.21:45:28.19#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.21:45:28.19#ibcon#[27=USB\r\n] 2006.229.21:45:28.19#ibcon#*before write, iclass 14, count 0 2006.229.21:45:28.19#ibcon#enter sib2, iclass 14, count 0 2006.229.21:45:28.19#ibcon#flushed, iclass 14, count 0 2006.229.21:45:28.19#ibcon#about to write, iclass 14, count 0 2006.229.21:45:28.19#ibcon#wrote, iclass 14, count 0 2006.229.21:45:28.19#ibcon#about to read 3, iclass 14, count 0 2006.229.21:45:28.22#ibcon#read 3, iclass 14, count 0 2006.229.21:45:28.22#ibcon#about to read 4, iclass 14, count 0 2006.229.21:45:28.22#ibcon#read 4, iclass 14, count 0 2006.229.21:45:28.22#ibcon#about to read 5, iclass 14, count 0 2006.229.21:45:28.22#ibcon#read 5, iclass 14, count 0 2006.229.21:45:28.22#ibcon#about to read 6, iclass 14, count 0 2006.229.21:45:28.22#ibcon#read 6, iclass 14, count 0 2006.229.21:45:28.22#ibcon#end of sib2, iclass 14, count 0 2006.229.21:45:28.22#ibcon#*after write, iclass 14, count 0 2006.229.21:45:28.22#ibcon#*before return 0, iclass 14, count 0 2006.229.21:45:28.22#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:28.22#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.21:45:28.22#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.21:45:28.22#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.21:45:28.22$vck44/vblo=8,744.99 2006.229.21:45:28.22#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.21:45:28.22#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.21:45:28.22#ibcon#ireg 17 cls_cnt 0 2006.229.21:45:28.22#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:28.22#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:28.22#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:28.22#ibcon#enter wrdev, iclass 16, count 0 2006.229.21:45:28.22#ibcon#first serial, iclass 16, count 0 2006.229.21:45:28.22#ibcon#enter sib2, iclass 16, count 0 2006.229.21:45:28.22#ibcon#flushed, iclass 16, count 0 2006.229.21:45:28.22#ibcon#about to write, iclass 16, count 0 2006.229.21:45:28.22#ibcon#wrote, iclass 16, count 0 2006.229.21:45:28.22#ibcon#about to read 3, iclass 16, count 0 2006.229.21:45:28.24#ibcon#read 3, iclass 16, count 0 2006.229.21:45:28.24#ibcon#about to read 4, iclass 16, count 0 2006.229.21:45:28.24#ibcon#read 4, iclass 16, count 0 2006.229.21:45:28.24#ibcon#about to read 5, iclass 16, count 0 2006.229.21:45:28.24#ibcon#read 5, iclass 16, count 0 2006.229.21:45:28.24#ibcon#about to read 6, iclass 16, count 0 2006.229.21:45:28.24#ibcon#read 6, iclass 16, count 0 2006.229.21:45:28.24#ibcon#end of sib2, iclass 16, count 0 2006.229.21:45:28.24#ibcon#*mode == 0, iclass 16, count 0 2006.229.21:45:28.24#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.21:45:28.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.21:45:28.24#ibcon#*before write, iclass 16, count 0 2006.229.21:45:28.24#ibcon#enter sib2, iclass 16, count 0 2006.229.21:45:28.24#ibcon#flushed, iclass 16, count 0 2006.229.21:45:28.24#ibcon#about to write, iclass 16, count 0 2006.229.21:45:28.24#ibcon#wrote, iclass 16, count 0 2006.229.21:45:28.24#ibcon#about to read 3, iclass 16, count 0 2006.229.21:45:28.28#ibcon#read 3, iclass 16, count 0 2006.229.21:45:28.28#ibcon#about to read 4, iclass 16, count 0 2006.229.21:45:28.28#ibcon#read 4, iclass 16, count 0 2006.229.21:45:28.28#ibcon#about to read 5, iclass 16, count 0 2006.229.21:45:28.28#ibcon#read 5, iclass 16, count 0 2006.229.21:45:28.28#ibcon#about to read 6, iclass 16, count 0 2006.229.21:45:28.28#ibcon#read 6, iclass 16, count 0 2006.229.21:45:28.28#ibcon#end of sib2, iclass 16, count 0 2006.229.21:45:28.28#ibcon#*after write, iclass 16, count 0 2006.229.21:45:28.28#ibcon#*before return 0, iclass 16, count 0 2006.229.21:45:28.28#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:28.28#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.21:45:28.28#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.21:45:28.28#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.21:45:28.28$vck44/vb=8,4 2006.229.21:45:28.28#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.21:45:28.28#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.21:45:28.28#ibcon#ireg 11 cls_cnt 2 2006.229.21:45:28.28#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:28.34#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:28.34#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:28.34#ibcon#enter wrdev, iclass 18, count 2 2006.229.21:45:28.34#ibcon#first serial, iclass 18, count 2 2006.229.21:45:28.34#ibcon#enter sib2, iclass 18, count 2 2006.229.21:45:28.34#ibcon#flushed, iclass 18, count 2 2006.229.21:45:28.34#ibcon#about to write, iclass 18, count 2 2006.229.21:45:28.34#ibcon#wrote, iclass 18, count 2 2006.229.21:45:28.34#ibcon#about to read 3, iclass 18, count 2 2006.229.21:45:28.36#ibcon#read 3, iclass 18, count 2 2006.229.21:45:28.36#ibcon#about to read 4, iclass 18, count 2 2006.229.21:45:28.36#ibcon#read 4, iclass 18, count 2 2006.229.21:45:28.36#ibcon#about to read 5, iclass 18, count 2 2006.229.21:45:28.36#ibcon#read 5, iclass 18, count 2 2006.229.21:45:28.36#ibcon#about to read 6, iclass 18, count 2 2006.229.21:45:28.36#ibcon#read 6, iclass 18, count 2 2006.229.21:45:28.36#ibcon#end of sib2, iclass 18, count 2 2006.229.21:45:28.36#ibcon#*mode == 0, iclass 18, count 2 2006.229.21:45:28.36#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.21:45:28.36#ibcon#[27=AT08-04\r\n] 2006.229.21:45:28.36#ibcon#*before write, iclass 18, count 2 2006.229.21:45:28.36#ibcon#enter sib2, iclass 18, count 2 2006.229.21:45:28.36#ibcon#flushed, iclass 18, count 2 2006.229.21:45:28.36#ibcon#about to write, iclass 18, count 2 2006.229.21:45:28.36#ibcon#wrote, iclass 18, count 2 2006.229.21:45:28.36#ibcon#about to read 3, iclass 18, count 2 2006.229.21:45:28.39#ibcon#read 3, iclass 18, count 2 2006.229.21:45:28.39#ibcon#about to read 4, iclass 18, count 2 2006.229.21:45:28.39#ibcon#read 4, iclass 18, count 2 2006.229.21:45:28.39#ibcon#about to read 5, iclass 18, count 2 2006.229.21:45:28.39#ibcon#read 5, iclass 18, count 2 2006.229.21:45:28.39#ibcon#about to read 6, iclass 18, count 2 2006.229.21:45:28.39#ibcon#read 6, iclass 18, count 2 2006.229.21:45:28.39#ibcon#end of sib2, iclass 18, count 2 2006.229.21:45:28.39#ibcon#*after write, iclass 18, count 2 2006.229.21:45:28.39#ibcon#*before return 0, iclass 18, count 2 2006.229.21:45:28.39#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:28.39#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.21:45:28.39#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.21:45:28.39#ibcon#ireg 7 cls_cnt 0 2006.229.21:45:28.39#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:28.51#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:28.51#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:28.51#ibcon#enter wrdev, iclass 18, count 0 2006.229.21:45:28.51#ibcon#first serial, iclass 18, count 0 2006.229.21:45:28.51#ibcon#enter sib2, iclass 18, count 0 2006.229.21:45:28.51#ibcon#flushed, iclass 18, count 0 2006.229.21:45:28.51#ibcon#about to write, iclass 18, count 0 2006.229.21:45:28.51#ibcon#wrote, iclass 18, count 0 2006.229.21:45:28.51#ibcon#about to read 3, iclass 18, count 0 2006.229.21:45:28.53#ibcon#read 3, iclass 18, count 0 2006.229.21:45:28.53#ibcon#about to read 4, iclass 18, count 0 2006.229.21:45:28.53#ibcon#read 4, iclass 18, count 0 2006.229.21:45:28.53#ibcon#about to read 5, iclass 18, count 0 2006.229.21:45:28.53#ibcon#read 5, iclass 18, count 0 2006.229.21:45:28.53#ibcon#about to read 6, iclass 18, count 0 2006.229.21:45:28.53#ibcon#read 6, iclass 18, count 0 2006.229.21:45:28.53#ibcon#end of sib2, iclass 18, count 0 2006.229.21:45:28.53#ibcon#*mode == 0, iclass 18, count 0 2006.229.21:45:28.53#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.21:45:28.53#ibcon#[27=USB\r\n] 2006.229.21:45:28.53#ibcon#*before write, iclass 18, count 0 2006.229.21:45:28.53#ibcon#enter sib2, iclass 18, count 0 2006.229.21:45:28.53#ibcon#flushed, iclass 18, count 0 2006.229.21:45:28.53#ibcon#about to write, iclass 18, count 0 2006.229.21:45:28.53#ibcon#wrote, iclass 18, count 0 2006.229.21:45:28.53#ibcon#about to read 3, iclass 18, count 0 2006.229.21:45:28.56#ibcon#read 3, iclass 18, count 0 2006.229.21:45:28.56#ibcon#about to read 4, iclass 18, count 0 2006.229.21:45:28.56#ibcon#read 4, iclass 18, count 0 2006.229.21:45:28.56#ibcon#about to read 5, iclass 18, count 0 2006.229.21:45:28.56#ibcon#read 5, iclass 18, count 0 2006.229.21:45:28.56#ibcon#about to read 6, iclass 18, count 0 2006.229.21:45:28.56#ibcon#read 6, iclass 18, count 0 2006.229.21:45:28.56#ibcon#end of sib2, iclass 18, count 0 2006.229.21:45:28.56#ibcon#*after write, iclass 18, count 0 2006.229.21:45:28.56#ibcon#*before return 0, iclass 18, count 0 2006.229.21:45:28.56#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:28.56#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.21:45:28.56#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.21:45:28.56#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.21:45:28.56$vck44/vabw=wide 2006.229.21:45:28.56#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.21:45:28.56#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.21:45:28.56#ibcon#ireg 8 cls_cnt 0 2006.229.21:45:28.56#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:28.56#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:28.56#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:28.56#ibcon#enter wrdev, iclass 20, count 0 2006.229.21:45:28.56#ibcon#first serial, iclass 20, count 0 2006.229.21:45:28.56#ibcon#enter sib2, iclass 20, count 0 2006.229.21:45:28.56#ibcon#flushed, iclass 20, count 0 2006.229.21:45:28.56#ibcon#about to write, iclass 20, count 0 2006.229.21:45:28.56#ibcon#wrote, iclass 20, count 0 2006.229.21:45:28.56#ibcon#about to read 3, iclass 20, count 0 2006.229.21:45:28.58#ibcon#read 3, iclass 20, count 0 2006.229.21:45:28.58#ibcon#about to read 4, iclass 20, count 0 2006.229.21:45:28.58#ibcon#read 4, iclass 20, count 0 2006.229.21:45:28.58#ibcon#about to read 5, iclass 20, count 0 2006.229.21:45:28.58#ibcon#read 5, iclass 20, count 0 2006.229.21:45:28.58#ibcon#about to read 6, iclass 20, count 0 2006.229.21:45:28.58#ibcon#read 6, iclass 20, count 0 2006.229.21:45:28.58#ibcon#end of sib2, iclass 20, count 0 2006.229.21:45:28.58#ibcon#*mode == 0, iclass 20, count 0 2006.229.21:45:28.58#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.21:45:28.58#ibcon#[25=BW32\r\n] 2006.229.21:45:28.58#ibcon#*before write, iclass 20, count 0 2006.229.21:45:28.58#ibcon#enter sib2, iclass 20, count 0 2006.229.21:45:28.58#ibcon#flushed, iclass 20, count 0 2006.229.21:45:28.58#ibcon#about to write, iclass 20, count 0 2006.229.21:45:28.58#ibcon#wrote, iclass 20, count 0 2006.229.21:45:28.58#ibcon#about to read 3, iclass 20, count 0 2006.229.21:45:28.61#ibcon#read 3, iclass 20, count 0 2006.229.21:45:28.61#ibcon#about to read 4, iclass 20, count 0 2006.229.21:45:28.61#ibcon#read 4, iclass 20, count 0 2006.229.21:45:28.61#ibcon#about to read 5, iclass 20, count 0 2006.229.21:45:28.61#ibcon#read 5, iclass 20, count 0 2006.229.21:45:28.61#ibcon#about to read 6, iclass 20, count 0 2006.229.21:45:28.61#ibcon#read 6, iclass 20, count 0 2006.229.21:45:28.61#ibcon#end of sib2, iclass 20, count 0 2006.229.21:45:28.61#ibcon#*after write, iclass 20, count 0 2006.229.21:45:28.61#ibcon#*before return 0, iclass 20, count 0 2006.229.21:45:28.61#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:28.61#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.21:45:28.61#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.21:45:28.61#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.21:45:28.61$vck44/vbbw=wide 2006.229.21:45:28.61#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.21:45:28.61#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.21:45:28.61#ibcon#ireg 8 cls_cnt 0 2006.229.21:45:28.61#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:45:28.68#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:45:28.68#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:45:28.68#ibcon#enter wrdev, iclass 22, count 0 2006.229.21:45:28.68#ibcon#first serial, iclass 22, count 0 2006.229.21:45:28.68#ibcon#enter sib2, iclass 22, count 0 2006.229.21:45:28.68#ibcon#flushed, iclass 22, count 0 2006.229.21:45:28.68#ibcon#about to write, iclass 22, count 0 2006.229.21:45:28.68#ibcon#wrote, iclass 22, count 0 2006.229.21:45:28.68#ibcon#about to read 3, iclass 22, count 0 2006.229.21:45:28.70#ibcon#read 3, iclass 22, count 0 2006.229.21:45:28.70#ibcon#about to read 4, iclass 22, count 0 2006.229.21:45:28.70#ibcon#read 4, iclass 22, count 0 2006.229.21:45:28.70#ibcon#about to read 5, iclass 22, count 0 2006.229.21:45:28.70#ibcon#read 5, iclass 22, count 0 2006.229.21:45:28.70#ibcon#about to read 6, iclass 22, count 0 2006.229.21:45:28.70#ibcon#read 6, iclass 22, count 0 2006.229.21:45:28.70#ibcon#end of sib2, iclass 22, count 0 2006.229.21:45:28.70#ibcon#*mode == 0, iclass 22, count 0 2006.229.21:45:28.70#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.21:45:28.70#ibcon#[27=BW32\r\n] 2006.229.21:45:28.70#ibcon#*before write, iclass 22, count 0 2006.229.21:45:28.70#ibcon#enter sib2, iclass 22, count 0 2006.229.21:45:28.70#ibcon#flushed, iclass 22, count 0 2006.229.21:45:28.70#ibcon#about to write, iclass 22, count 0 2006.229.21:45:28.70#ibcon#wrote, iclass 22, count 0 2006.229.21:45:28.70#ibcon#about to read 3, iclass 22, count 0 2006.229.21:45:28.73#ibcon#read 3, iclass 22, count 0 2006.229.21:45:28.73#ibcon#about to read 4, iclass 22, count 0 2006.229.21:45:28.73#ibcon#read 4, iclass 22, count 0 2006.229.21:45:28.73#ibcon#about to read 5, iclass 22, count 0 2006.229.21:45:28.73#ibcon#read 5, iclass 22, count 0 2006.229.21:45:28.73#ibcon#about to read 6, iclass 22, count 0 2006.229.21:45:28.73#ibcon#read 6, iclass 22, count 0 2006.229.21:45:28.73#ibcon#end of sib2, iclass 22, count 0 2006.229.21:45:28.73#ibcon#*after write, iclass 22, count 0 2006.229.21:45:28.73#ibcon#*before return 0, iclass 22, count 0 2006.229.21:45:28.73#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:45:28.73#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.21:45:28.73#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.21:45:28.73#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.21:45:28.73$setupk4/ifdk4 2006.229.21:45:28.73$ifdk4/lo= 2006.229.21:45:28.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.21:45:28.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.21:45:28.73$ifdk4/patch= 2006.229.21:45:28.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.21:45:28.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.21:45:28.73$setupk4/!*+20s 2006.229.21:45:34.10#abcon#<5=/08 0.8 2.9 27.41 991002.3\r\n> 2006.229.21:45:34.12#abcon#{5=INTERFACE CLEAR} 2006.229.21:45:34.18#abcon#[5=S1D000X0/0*\r\n] 2006.229.21:45:43.24$setupk4/"tpicd 2006.229.21:45:43.24$setupk4/echo=off 2006.229.21:45:43.24$setupk4/xlog=off 2006.229.21:45:43.24:!2006.229.21:53:53 2006.229.21:45:44.13#trakl#Source acquired 2006.229.21:45:46.13#flagr#flagr/antenna,acquired 2006.229.21:53:53.00:preob 2006.229.21:53:53.14/onsource/TRACKING 2006.229.21:53:53.14:!2006.229.21:54:03 2006.229.21:54:03.00:"tape 2006.229.21:54:03.00:"st=record 2006.229.21:54:03.00:data_valid=on 2006.229.21:54:03.00:midob 2006.229.21:54:04.14/onsource/TRACKING 2006.229.21:54:04.14/wx/27.66,1002.3,97 2006.229.21:54:04.30/cable/+6.4182E-03 2006.229.21:54:05.39/va/01,08,usb,yes,29,31 2006.229.21:54:05.39/va/02,07,usb,yes,31,32 2006.229.21:54:05.39/va/03,06,usb,yes,39,41 2006.229.21:54:05.39/va/04,07,usb,yes,32,34 2006.229.21:54:05.39/va/05,04,usb,yes,29,29 2006.229.21:54:05.39/va/06,04,usb,yes,32,32 2006.229.21:54:05.39/va/07,05,usb,yes,28,29 2006.229.21:54:05.39/va/08,06,usb,yes,21,25 2006.229.21:54:05.62/valo/01,524.99,yes,locked 2006.229.21:54:05.62/valo/02,534.99,yes,locked 2006.229.21:54:05.62/valo/03,564.99,yes,locked 2006.229.21:54:05.62/valo/04,624.99,yes,locked 2006.229.21:54:05.62/valo/05,734.99,yes,locked 2006.229.21:54:05.62/valo/06,814.99,yes,locked 2006.229.21:54:05.62/valo/07,864.99,yes,locked 2006.229.21:54:05.62/valo/08,884.99,yes,locked 2006.229.21:54:06.71/vb/01,04,usb,yes,31,28 2006.229.21:54:06.71/vb/02,04,usb,yes,33,33 2006.229.21:54:06.71/vb/03,04,usb,yes,30,33 2006.229.21:54:06.71/vb/04,04,usb,yes,34,33 2006.229.21:54:06.71/vb/05,04,usb,yes,27,29 2006.229.21:54:06.71/vb/06,04,usb,yes,31,27 2006.229.21:54:06.71/vb/07,04,usb,yes,31,31 2006.229.21:54:06.71/vb/08,04,usb,yes,28,32 2006.229.21:54:06.94/vblo/01,629.99,yes,locked 2006.229.21:54:06.94/vblo/02,634.99,yes,locked 2006.229.21:54:06.94/vblo/03,649.99,yes,locked 2006.229.21:54:06.94/vblo/04,679.99,yes,locked 2006.229.21:54:06.94/vblo/05,709.99,yes,locked 2006.229.21:54:06.94/vblo/06,719.99,yes,locked 2006.229.21:54:06.94/vblo/07,734.99,yes,locked 2006.229.21:54:06.94/vblo/08,744.99,yes,locked 2006.229.21:54:07.09/vabw/8 2006.229.21:54:07.24/vbbw/8 2006.229.21:54:07.33/xfe/off,on,12.2 2006.229.21:54:07.72/ifatt/23,28,28,28 2006.229.21:54:08.08/fmout-gps/S +4.60E-07 2006.229.21:54:08.12:!2006.229.22:01:03 2006.229.22:01:03.00:data_valid=off 2006.229.22:01:03.00:"et 2006.229.22:01:03.00:!+3s 2006.229.22:01:06.01:"tape 2006.229.22:01:06.01:postob 2006.229.22:01:06.18/cable/+6.4192E-03 2006.229.22:01:06.18/wx/27.98,1002.3,94 2006.229.22:01:07.08/fmout-gps/S +4.60E-07 2006.229.22:01:07.08:scan_name=229-2208,jd0608,70 2006.229.22:01:07.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.229.22:01:07.14#flagr#flagr/antenna,new-source 2006.229.22:01:08.14:checkk5 2006.229.22:01:08.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:01:08.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:01:09.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:01:09.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:01:10.15/chk_obsdata//k5ts1/T2292154??a.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.229.22:01:10.54/chk_obsdata//k5ts2/T2292154??b.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.229.22:01:10.93/chk_obsdata//k5ts3/T2292154??c.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.229.22:01:11.33/chk_obsdata//k5ts4/T2292154??d.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.229.22:01:12.05/k5log//k5ts1_log_newline 2006.229.22:01:12.76/k5log//k5ts2_log_newline 2006.229.22:01:13.47/k5log//k5ts3_log_newline 2006.229.22:01:14.19/k5log//k5ts4_log_newline 2006.229.22:01:14.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:01:14.22:setupk4=1 2006.229.22:01:14.22$setupk4/echo=on 2006.229.22:01:14.22$setupk4/pcalon 2006.229.22:01:14.22$pcalon/"no phase cal control is implemented here 2006.229.22:01:14.22$setupk4/"tpicd=stop 2006.229.22:01:14.22$setupk4/"rec=synch_on 2006.229.22:01:14.22$setupk4/"rec_mode=128 2006.229.22:01:14.22$setupk4/!* 2006.229.22:01:14.22$setupk4/recpk4 2006.229.22:01:14.22$recpk4/recpatch= 2006.229.22:01:14.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:01:14.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:01:14.22$setupk4/vck44 2006.229.22:01:14.22$vck44/valo=1,524.99 2006.229.22:01:14.22#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.22:01:14.22#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.22:01:14.22#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:14.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:14.22#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:14.22#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:14.22#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:01:14.22#ibcon#first serial, iclass 39, count 0 2006.229.22:01:14.22#ibcon#enter sib2, iclass 39, count 0 2006.229.22:01:14.22#ibcon#flushed, iclass 39, count 0 2006.229.22:01:14.22#ibcon#about to write, iclass 39, count 0 2006.229.22:01:14.22#ibcon#wrote, iclass 39, count 0 2006.229.22:01:14.22#ibcon#about to read 3, iclass 39, count 0 2006.229.22:01:14.24#ibcon#read 3, iclass 39, count 0 2006.229.22:01:14.24#ibcon#about to read 4, iclass 39, count 0 2006.229.22:01:14.24#ibcon#read 4, iclass 39, count 0 2006.229.22:01:14.24#ibcon#about to read 5, iclass 39, count 0 2006.229.22:01:14.24#ibcon#read 5, iclass 39, count 0 2006.229.22:01:14.24#ibcon#about to read 6, iclass 39, count 0 2006.229.22:01:14.24#ibcon#read 6, iclass 39, count 0 2006.229.22:01:14.24#ibcon#end of sib2, iclass 39, count 0 2006.229.22:01:14.24#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:01:14.24#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:01:14.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:01:14.24#ibcon#*before write, iclass 39, count 0 2006.229.22:01:14.24#ibcon#enter sib2, iclass 39, count 0 2006.229.22:01:14.24#ibcon#flushed, iclass 39, count 0 2006.229.22:01:14.24#ibcon#about to write, iclass 39, count 0 2006.229.22:01:14.24#ibcon#wrote, iclass 39, count 0 2006.229.22:01:14.24#ibcon#about to read 3, iclass 39, count 0 2006.229.22:01:14.29#ibcon#read 3, iclass 39, count 0 2006.229.22:01:14.29#ibcon#about to read 4, iclass 39, count 0 2006.229.22:01:14.29#ibcon#read 4, iclass 39, count 0 2006.229.22:01:14.29#ibcon#about to read 5, iclass 39, count 0 2006.229.22:01:14.29#ibcon#read 5, iclass 39, count 0 2006.229.22:01:14.29#ibcon#about to read 6, iclass 39, count 0 2006.229.22:01:14.29#ibcon#read 6, iclass 39, count 0 2006.229.22:01:14.29#ibcon#end of sib2, iclass 39, count 0 2006.229.22:01:14.29#ibcon#*after write, iclass 39, count 0 2006.229.22:01:14.29#ibcon#*before return 0, iclass 39, count 0 2006.229.22:01:14.29#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:14.29#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:14.29#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:01:14.29#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:01:14.29$vck44/va=1,8 2006.229.22:01:14.29#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.22:01:14.29#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.22:01:14.29#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:14.29#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:14.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:14.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:14.29#ibcon#enter wrdev, iclass 3, count 2 2006.229.22:01:14.29#ibcon#first serial, iclass 3, count 2 2006.229.22:01:14.29#ibcon#enter sib2, iclass 3, count 2 2006.229.22:01:14.29#ibcon#flushed, iclass 3, count 2 2006.229.22:01:14.29#ibcon#about to write, iclass 3, count 2 2006.229.22:01:14.29#ibcon#wrote, iclass 3, count 2 2006.229.22:01:14.29#ibcon#about to read 3, iclass 3, count 2 2006.229.22:01:14.31#ibcon#read 3, iclass 3, count 2 2006.229.22:01:14.31#ibcon#about to read 4, iclass 3, count 2 2006.229.22:01:14.31#ibcon#read 4, iclass 3, count 2 2006.229.22:01:14.31#ibcon#about to read 5, iclass 3, count 2 2006.229.22:01:14.31#ibcon#read 5, iclass 3, count 2 2006.229.22:01:14.31#ibcon#about to read 6, iclass 3, count 2 2006.229.22:01:14.31#ibcon#read 6, iclass 3, count 2 2006.229.22:01:14.31#ibcon#end of sib2, iclass 3, count 2 2006.229.22:01:14.31#ibcon#*mode == 0, iclass 3, count 2 2006.229.22:01:14.31#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.22:01:14.31#ibcon#[25=AT01-08\r\n] 2006.229.22:01:14.31#ibcon#*before write, iclass 3, count 2 2006.229.22:01:14.31#ibcon#enter sib2, iclass 3, count 2 2006.229.22:01:14.31#ibcon#flushed, iclass 3, count 2 2006.229.22:01:14.31#ibcon#about to write, iclass 3, count 2 2006.229.22:01:14.31#ibcon#wrote, iclass 3, count 2 2006.229.22:01:14.31#ibcon#about to read 3, iclass 3, count 2 2006.229.22:01:14.34#ibcon#read 3, iclass 3, count 2 2006.229.22:01:14.34#ibcon#about to read 4, iclass 3, count 2 2006.229.22:01:14.34#ibcon#read 4, iclass 3, count 2 2006.229.22:01:14.34#ibcon#about to read 5, iclass 3, count 2 2006.229.22:01:14.34#ibcon#read 5, iclass 3, count 2 2006.229.22:01:14.34#ibcon#about to read 6, iclass 3, count 2 2006.229.22:01:14.34#ibcon#read 6, iclass 3, count 2 2006.229.22:01:14.34#ibcon#end of sib2, iclass 3, count 2 2006.229.22:01:14.34#ibcon#*after write, iclass 3, count 2 2006.229.22:01:14.34#ibcon#*before return 0, iclass 3, count 2 2006.229.22:01:14.34#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:14.34#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:14.34#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.22:01:14.34#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:14.34#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:14.46#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:14.46#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:14.46#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:01:14.46#ibcon#first serial, iclass 3, count 0 2006.229.22:01:14.46#ibcon#enter sib2, iclass 3, count 0 2006.229.22:01:14.46#ibcon#flushed, iclass 3, count 0 2006.229.22:01:14.46#ibcon#about to write, iclass 3, count 0 2006.229.22:01:14.46#ibcon#wrote, iclass 3, count 0 2006.229.22:01:14.46#ibcon#about to read 3, iclass 3, count 0 2006.229.22:01:14.48#ibcon#read 3, iclass 3, count 0 2006.229.22:01:14.48#ibcon#about to read 4, iclass 3, count 0 2006.229.22:01:14.48#ibcon#read 4, iclass 3, count 0 2006.229.22:01:14.48#ibcon#about to read 5, iclass 3, count 0 2006.229.22:01:14.48#ibcon#read 5, iclass 3, count 0 2006.229.22:01:14.48#ibcon#about to read 6, iclass 3, count 0 2006.229.22:01:14.48#ibcon#read 6, iclass 3, count 0 2006.229.22:01:14.48#ibcon#end of sib2, iclass 3, count 0 2006.229.22:01:14.48#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:01:14.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:01:14.48#ibcon#[25=USB\r\n] 2006.229.22:01:14.48#ibcon#*before write, iclass 3, count 0 2006.229.22:01:14.48#ibcon#enter sib2, iclass 3, count 0 2006.229.22:01:14.48#ibcon#flushed, iclass 3, count 0 2006.229.22:01:14.48#ibcon#about to write, iclass 3, count 0 2006.229.22:01:14.48#ibcon#wrote, iclass 3, count 0 2006.229.22:01:14.48#ibcon#about to read 3, iclass 3, count 0 2006.229.22:01:14.51#ibcon#read 3, iclass 3, count 0 2006.229.22:01:14.51#ibcon#about to read 4, iclass 3, count 0 2006.229.22:01:14.51#ibcon#read 4, iclass 3, count 0 2006.229.22:01:14.51#ibcon#about to read 5, iclass 3, count 0 2006.229.22:01:14.51#ibcon#read 5, iclass 3, count 0 2006.229.22:01:14.51#ibcon#about to read 6, iclass 3, count 0 2006.229.22:01:14.51#ibcon#read 6, iclass 3, count 0 2006.229.22:01:14.51#ibcon#end of sib2, iclass 3, count 0 2006.229.22:01:14.51#ibcon#*after write, iclass 3, count 0 2006.229.22:01:14.51#ibcon#*before return 0, iclass 3, count 0 2006.229.22:01:14.51#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:14.51#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:14.51#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:01:14.51#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:01:14.51$vck44/valo=2,534.99 2006.229.22:01:14.51#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:01:14.51#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:01:14.51#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:14.51#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:14.51#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:14.51#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:14.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:01:14.51#ibcon#first serial, iclass 5, count 0 2006.229.22:01:14.51#ibcon#enter sib2, iclass 5, count 0 2006.229.22:01:14.51#ibcon#flushed, iclass 5, count 0 2006.229.22:01:14.51#ibcon#about to write, iclass 5, count 0 2006.229.22:01:14.51#ibcon#wrote, iclass 5, count 0 2006.229.22:01:14.51#ibcon#about to read 3, iclass 5, count 0 2006.229.22:01:14.53#ibcon#read 3, iclass 5, count 0 2006.229.22:01:14.53#ibcon#about to read 4, iclass 5, count 0 2006.229.22:01:14.53#ibcon#read 4, iclass 5, count 0 2006.229.22:01:14.53#ibcon#about to read 5, iclass 5, count 0 2006.229.22:01:14.53#ibcon#read 5, iclass 5, count 0 2006.229.22:01:14.53#ibcon#about to read 6, iclass 5, count 0 2006.229.22:01:14.53#ibcon#read 6, iclass 5, count 0 2006.229.22:01:14.53#ibcon#end of sib2, iclass 5, count 0 2006.229.22:01:14.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:01:14.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:01:14.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:01:14.53#ibcon#*before write, iclass 5, count 0 2006.229.22:01:14.53#ibcon#enter sib2, iclass 5, count 0 2006.229.22:01:14.53#ibcon#flushed, iclass 5, count 0 2006.229.22:01:14.53#ibcon#about to write, iclass 5, count 0 2006.229.22:01:14.53#ibcon#wrote, iclass 5, count 0 2006.229.22:01:14.53#ibcon#about to read 3, iclass 5, count 0 2006.229.22:01:14.57#ibcon#read 3, iclass 5, count 0 2006.229.22:01:14.57#ibcon#about to read 4, iclass 5, count 0 2006.229.22:01:14.57#ibcon#read 4, iclass 5, count 0 2006.229.22:01:14.57#ibcon#about to read 5, iclass 5, count 0 2006.229.22:01:14.57#ibcon#read 5, iclass 5, count 0 2006.229.22:01:14.57#ibcon#about to read 6, iclass 5, count 0 2006.229.22:01:14.57#ibcon#read 6, iclass 5, count 0 2006.229.22:01:14.57#ibcon#end of sib2, iclass 5, count 0 2006.229.22:01:14.57#ibcon#*after write, iclass 5, count 0 2006.229.22:01:14.57#ibcon#*before return 0, iclass 5, count 0 2006.229.22:01:14.57#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:14.57#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:14.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:01:14.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:01:14.57$vck44/va=2,7 2006.229.22:01:14.57#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.22:01:14.57#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.22:01:14.57#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:14.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:14.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:14.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:14.63#ibcon#enter wrdev, iclass 7, count 2 2006.229.22:01:14.63#ibcon#first serial, iclass 7, count 2 2006.229.22:01:14.63#ibcon#enter sib2, iclass 7, count 2 2006.229.22:01:14.63#ibcon#flushed, iclass 7, count 2 2006.229.22:01:14.63#ibcon#about to write, iclass 7, count 2 2006.229.22:01:14.63#ibcon#wrote, iclass 7, count 2 2006.229.22:01:14.63#ibcon#about to read 3, iclass 7, count 2 2006.229.22:01:14.65#ibcon#read 3, iclass 7, count 2 2006.229.22:01:14.65#ibcon#about to read 4, iclass 7, count 2 2006.229.22:01:14.65#ibcon#read 4, iclass 7, count 2 2006.229.22:01:14.65#ibcon#about to read 5, iclass 7, count 2 2006.229.22:01:14.65#ibcon#read 5, iclass 7, count 2 2006.229.22:01:14.65#ibcon#about to read 6, iclass 7, count 2 2006.229.22:01:14.65#ibcon#read 6, iclass 7, count 2 2006.229.22:01:14.65#ibcon#end of sib2, iclass 7, count 2 2006.229.22:01:14.65#ibcon#*mode == 0, iclass 7, count 2 2006.229.22:01:14.65#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.22:01:14.65#ibcon#[25=AT02-07\r\n] 2006.229.22:01:14.65#ibcon#*before write, iclass 7, count 2 2006.229.22:01:14.65#ibcon#enter sib2, iclass 7, count 2 2006.229.22:01:14.65#ibcon#flushed, iclass 7, count 2 2006.229.22:01:14.65#ibcon#about to write, iclass 7, count 2 2006.229.22:01:14.65#ibcon#wrote, iclass 7, count 2 2006.229.22:01:14.65#ibcon#about to read 3, iclass 7, count 2 2006.229.22:01:14.68#ibcon#read 3, iclass 7, count 2 2006.229.22:01:14.68#ibcon#about to read 4, iclass 7, count 2 2006.229.22:01:14.68#ibcon#read 4, iclass 7, count 2 2006.229.22:01:14.68#ibcon#about to read 5, iclass 7, count 2 2006.229.22:01:14.68#ibcon#read 5, iclass 7, count 2 2006.229.22:01:14.68#ibcon#about to read 6, iclass 7, count 2 2006.229.22:01:14.68#ibcon#read 6, iclass 7, count 2 2006.229.22:01:14.68#ibcon#end of sib2, iclass 7, count 2 2006.229.22:01:14.68#ibcon#*after write, iclass 7, count 2 2006.229.22:01:14.68#ibcon#*before return 0, iclass 7, count 2 2006.229.22:01:14.68#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:14.68#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:14.68#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.22:01:14.68#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:14.68#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:14.80#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:14.80#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:14.80#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:01:14.80#ibcon#first serial, iclass 7, count 0 2006.229.22:01:14.80#ibcon#enter sib2, iclass 7, count 0 2006.229.22:01:14.80#ibcon#flushed, iclass 7, count 0 2006.229.22:01:14.80#ibcon#about to write, iclass 7, count 0 2006.229.22:01:14.80#ibcon#wrote, iclass 7, count 0 2006.229.22:01:14.80#ibcon#about to read 3, iclass 7, count 0 2006.229.22:01:14.82#ibcon#read 3, iclass 7, count 0 2006.229.22:01:14.82#ibcon#about to read 4, iclass 7, count 0 2006.229.22:01:14.82#ibcon#read 4, iclass 7, count 0 2006.229.22:01:14.82#ibcon#about to read 5, iclass 7, count 0 2006.229.22:01:14.82#ibcon#read 5, iclass 7, count 0 2006.229.22:01:14.82#ibcon#about to read 6, iclass 7, count 0 2006.229.22:01:14.82#ibcon#read 6, iclass 7, count 0 2006.229.22:01:14.82#ibcon#end of sib2, iclass 7, count 0 2006.229.22:01:14.82#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:01:14.82#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:01:14.82#ibcon#[25=USB\r\n] 2006.229.22:01:14.82#ibcon#*before write, iclass 7, count 0 2006.229.22:01:14.82#ibcon#enter sib2, iclass 7, count 0 2006.229.22:01:14.82#ibcon#flushed, iclass 7, count 0 2006.229.22:01:14.82#ibcon#about to write, iclass 7, count 0 2006.229.22:01:14.82#ibcon#wrote, iclass 7, count 0 2006.229.22:01:14.82#ibcon#about to read 3, iclass 7, count 0 2006.229.22:01:14.85#ibcon#read 3, iclass 7, count 0 2006.229.22:01:14.85#ibcon#about to read 4, iclass 7, count 0 2006.229.22:01:14.85#ibcon#read 4, iclass 7, count 0 2006.229.22:01:14.85#ibcon#about to read 5, iclass 7, count 0 2006.229.22:01:14.85#ibcon#read 5, iclass 7, count 0 2006.229.22:01:14.85#ibcon#about to read 6, iclass 7, count 0 2006.229.22:01:14.85#ibcon#read 6, iclass 7, count 0 2006.229.22:01:14.85#ibcon#end of sib2, iclass 7, count 0 2006.229.22:01:14.85#ibcon#*after write, iclass 7, count 0 2006.229.22:01:14.85#ibcon#*before return 0, iclass 7, count 0 2006.229.22:01:14.85#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:14.85#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:14.85#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:01:14.85#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:01:14.85$vck44/valo=3,564.99 2006.229.22:01:14.85#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.22:01:14.85#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.22:01:14.85#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:14.85#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:14.85#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:14.85#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:14.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:01:14.85#ibcon#first serial, iclass 11, count 0 2006.229.22:01:14.85#ibcon#enter sib2, iclass 11, count 0 2006.229.22:01:14.85#ibcon#flushed, iclass 11, count 0 2006.229.22:01:14.85#ibcon#about to write, iclass 11, count 0 2006.229.22:01:14.85#ibcon#wrote, iclass 11, count 0 2006.229.22:01:14.85#ibcon#about to read 3, iclass 11, count 0 2006.229.22:01:14.87#ibcon#read 3, iclass 11, count 0 2006.229.22:01:14.87#ibcon#about to read 4, iclass 11, count 0 2006.229.22:01:14.87#ibcon#read 4, iclass 11, count 0 2006.229.22:01:14.87#ibcon#about to read 5, iclass 11, count 0 2006.229.22:01:14.87#ibcon#read 5, iclass 11, count 0 2006.229.22:01:14.87#ibcon#about to read 6, iclass 11, count 0 2006.229.22:01:14.87#ibcon#read 6, iclass 11, count 0 2006.229.22:01:14.87#ibcon#end of sib2, iclass 11, count 0 2006.229.22:01:14.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:01:14.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:01:14.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:01:14.87#ibcon#*before write, iclass 11, count 0 2006.229.22:01:14.87#ibcon#enter sib2, iclass 11, count 0 2006.229.22:01:14.87#ibcon#flushed, iclass 11, count 0 2006.229.22:01:14.87#ibcon#about to write, iclass 11, count 0 2006.229.22:01:14.87#ibcon#wrote, iclass 11, count 0 2006.229.22:01:14.87#ibcon#about to read 3, iclass 11, count 0 2006.229.22:01:14.91#ibcon#read 3, iclass 11, count 0 2006.229.22:01:14.91#ibcon#about to read 4, iclass 11, count 0 2006.229.22:01:14.91#ibcon#read 4, iclass 11, count 0 2006.229.22:01:14.91#ibcon#about to read 5, iclass 11, count 0 2006.229.22:01:14.91#ibcon#read 5, iclass 11, count 0 2006.229.22:01:14.91#ibcon#about to read 6, iclass 11, count 0 2006.229.22:01:14.91#ibcon#read 6, iclass 11, count 0 2006.229.22:01:14.91#ibcon#end of sib2, iclass 11, count 0 2006.229.22:01:14.91#ibcon#*after write, iclass 11, count 0 2006.229.22:01:14.91#ibcon#*before return 0, iclass 11, count 0 2006.229.22:01:14.91#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:14.91#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:14.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:01:14.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:01:14.91$vck44/va=3,6 2006.229.22:01:14.91#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.22:01:14.91#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.22:01:14.91#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:14.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:14.97#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:14.97#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:14.97#ibcon#enter wrdev, iclass 13, count 2 2006.229.22:01:14.97#ibcon#first serial, iclass 13, count 2 2006.229.22:01:14.97#ibcon#enter sib2, iclass 13, count 2 2006.229.22:01:14.97#ibcon#flushed, iclass 13, count 2 2006.229.22:01:14.97#ibcon#about to write, iclass 13, count 2 2006.229.22:01:14.97#ibcon#wrote, iclass 13, count 2 2006.229.22:01:14.97#ibcon#about to read 3, iclass 13, count 2 2006.229.22:01:14.99#ibcon#read 3, iclass 13, count 2 2006.229.22:01:14.99#ibcon#about to read 4, iclass 13, count 2 2006.229.22:01:14.99#ibcon#read 4, iclass 13, count 2 2006.229.22:01:14.99#ibcon#about to read 5, iclass 13, count 2 2006.229.22:01:14.99#ibcon#read 5, iclass 13, count 2 2006.229.22:01:14.99#ibcon#about to read 6, iclass 13, count 2 2006.229.22:01:14.99#ibcon#read 6, iclass 13, count 2 2006.229.22:01:14.99#ibcon#end of sib2, iclass 13, count 2 2006.229.22:01:14.99#ibcon#*mode == 0, iclass 13, count 2 2006.229.22:01:14.99#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.22:01:14.99#ibcon#[25=AT03-06\r\n] 2006.229.22:01:14.99#ibcon#*before write, iclass 13, count 2 2006.229.22:01:14.99#ibcon#enter sib2, iclass 13, count 2 2006.229.22:01:14.99#ibcon#flushed, iclass 13, count 2 2006.229.22:01:14.99#ibcon#about to write, iclass 13, count 2 2006.229.22:01:14.99#ibcon#wrote, iclass 13, count 2 2006.229.22:01:14.99#ibcon#about to read 3, iclass 13, count 2 2006.229.22:01:15.02#ibcon#read 3, iclass 13, count 2 2006.229.22:01:15.02#ibcon#about to read 4, iclass 13, count 2 2006.229.22:01:15.02#ibcon#read 4, iclass 13, count 2 2006.229.22:01:15.02#ibcon#about to read 5, iclass 13, count 2 2006.229.22:01:15.02#ibcon#read 5, iclass 13, count 2 2006.229.22:01:15.02#ibcon#about to read 6, iclass 13, count 2 2006.229.22:01:15.02#ibcon#read 6, iclass 13, count 2 2006.229.22:01:15.02#ibcon#end of sib2, iclass 13, count 2 2006.229.22:01:15.02#ibcon#*after write, iclass 13, count 2 2006.229.22:01:15.02#ibcon#*before return 0, iclass 13, count 2 2006.229.22:01:15.02#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:15.02#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:15.02#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.22:01:15.02#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:15.02#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:15.14#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:15.14#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:15.14#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:01:15.14#ibcon#first serial, iclass 13, count 0 2006.229.22:01:15.14#ibcon#enter sib2, iclass 13, count 0 2006.229.22:01:15.14#ibcon#flushed, iclass 13, count 0 2006.229.22:01:15.14#ibcon#about to write, iclass 13, count 0 2006.229.22:01:15.14#ibcon#wrote, iclass 13, count 0 2006.229.22:01:15.14#ibcon#about to read 3, iclass 13, count 0 2006.229.22:01:15.16#ibcon#read 3, iclass 13, count 0 2006.229.22:01:15.16#ibcon#about to read 4, iclass 13, count 0 2006.229.22:01:15.16#ibcon#read 4, iclass 13, count 0 2006.229.22:01:15.16#ibcon#about to read 5, iclass 13, count 0 2006.229.22:01:15.16#ibcon#read 5, iclass 13, count 0 2006.229.22:01:15.16#ibcon#about to read 6, iclass 13, count 0 2006.229.22:01:15.16#ibcon#read 6, iclass 13, count 0 2006.229.22:01:15.16#ibcon#end of sib2, iclass 13, count 0 2006.229.22:01:15.16#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:01:15.16#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:01:15.16#ibcon#[25=USB\r\n] 2006.229.22:01:15.16#ibcon#*before write, iclass 13, count 0 2006.229.22:01:15.16#ibcon#enter sib2, iclass 13, count 0 2006.229.22:01:15.16#ibcon#flushed, iclass 13, count 0 2006.229.22:01:15.16#ibcon#about to write, iclass 13, count 0 2006.229.22:01:15.16#ibcon#wrote, iclass 13, count 0 2006.229.22:01:15.16#ibcon#about to read 3, iclass 13, count 0 2006.229.22:01:15.19#ibcon#read 3, iclass 13, count 0 2006.229.22:01:15.19#ibcon#about to read 4, iclass 13, count 0 2006.229.22:01:15.19#ibcon#read 4, iclass 13, count 0 2006.229.22:01:15.19#ibcon#about to read 5, iclass 13, count 0 2006.229.22:01:15.19#ibcon#read 5, iclass 13, count 0 2006.229.22:01:15.19#ibcon#about to read 6, iclass 13, count 0 2006.229.22:01:15.19#ibcon#read 6, iclass 13, count 0 2006.229.22:01:15.19#ibcon#end of sib2, iclass 13, count 0 2006.229.22:01:15.19#ibcon#*after write, iclass 13, count 0 2006.229.22:01:15.19#ibcon#*before return 0, iclass 13, count 0 2006.229.22:01:15.19#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:15.19#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:15.19#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:01:15.19#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:01:15.19$vck44/valo=4,624.99 2006.229.22:01:15.19#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.22:01:15.19#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.22:01:15.19#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:15.19#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:15.19#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:15.19#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:15.19#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:01:15.19#ibcon#first serial, iclass 15, count 0 2006.229.22:01:15.19#ibcon#enter sib2, iclass 15, count 0 2006.229.22:01:15.19#ibcon#flushed, iclass 15, count 0 2006.229.22:01:15.19#ibcon#about to write, iclass 15, count 0 2006.229.22:01:15.19#ibcon#wrote, iclass 15, count 0 2006.229.22:01:15.19#ibcon#about to read 3, iclass 15, count 0 2006.229.22:01:15.21#ibcon#read 3, iclass 15, count 0 2006.229.22:01:15.21#ibcon#about to read 4, iclass 15, count 0 2006.229.22:01:15.21#ibcon#read 4, iclass 15, count 0 2006.229.22:01:15.21#ibcon#about to read 5, iclass 15, count 0 2006.229.22:01:15.21#ibcon#read 5, iclass 15, count 0 2006.229.22:01:15.21#ibcon#about to read 6, iclass 15, count 0 2006.229.22:01:15.21#ibcon#read 6, iclass 15, count 0 2006.229.22:01:15.21#ibcon#end of sib2, iclass 15, count 0 2006.229.22:01:15.21#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:01:15.21#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:01:15.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:01:15.21#ibcon#*before write, iclass 15, count 0 2006.229.22:01:15.21#ibcon#enter sib2, iclass 15, count 0 2006.229.22:01:15.21#ibcon#flushed, iclass 15, count 0 2006.229.22:01:15.21#ibcon#about to write, iclass 15, count 0 2006.229.22:01:15.21#ibcon#wrote, iclass 15, count 0 2006.229.22:01:15.21#ibcon#about to read 3, iclass 15, count 0 2006.229.22:01:15.25#ibcon#read 3, iclass 15, count 0 2006.229.22:01:15.25#ibcon#about to read 4, iclass 15, count 0 2006.229.22:01:15.25#ibcon#read 4, iclass 15, count 0 2006.229.22:01:15.25#ibcon#about to read 5, iclass 15, count 0 2006.229.22:01:15.25#ibcon#read 5, iclass 15, count 0 2006.229.22:01:15.25#ibcon#about to read 6, iclass 15, count 0 2006.229.22:01:15.25#ibcon#read 6, iclass 15, count 0 2006.229.22:01:15.25#ibcon#end of sib2, iclass 15, count 0 2006.229.22:01:15.25#ibcon#*after write, iclass 15, count 0 2006.229.22:01:15.25#ibcon#*before return 0, iclass 15, count 0 2006.229.22:01:15.25#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:15.25#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:15.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:01:15.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:01:15.25$vck44/va=4,7 2006.229.22:01:15.25#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.22:01:15.25#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.22:01:15.25#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:15.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:15.31#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:15.31#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:15.31#ibcon#enter wrdev, iclass 17, count 2 2006.229.22:01:15.31#ibcon#first serial, iclass 17, count 2 2006.229.22:01:15.31#ibcon#enter sib2, iclass 17, count 2 2006.229.22:01:15.31#ibcon#flushed, iclass 17, count 2 2006.229.22:01:15.31#ibcon#about to write, iclass 17, count 2 2006.229.22:01:15.31#ibcon#wrote, iclass 17, count 2 2006.229.22:01:15.31#ibcon#about to read 3, iclass 17, count 2 2006.229.22:01:15.33#ibcon#read 3, iclass 17, count 2 2006.229.22:01:15.33#ibcon#about to read 4, iclass 17, count 2 2006.229.22:01:15.33#ibcon#read 4, iclass 17, count 2 2006.229.22:01:15.33#ibcon#about to read 5, iclass 17, count 2 2006.229.22:01:15.33#ibcon#read 5, iclass 17, count 2 2006.229.22:01:15.33#ibcon#about to read 6, iclass 17, count 2 2006.229.22:01:15.33#ibcon#read 6, iclass 17, count 2 2006.229.22:01:15.33#ibcon#end of sib2, iclass 17, count 2 2006.229.22:01:15.33#ibcon#*mode == 0, iclass 17, count 2 2006.229.22:01:15.33#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.22:01:15.33#ibcon#[25=AT04-07\r\n] 2006.229.22:01:15.33#ibcon#*before write, iclass 17, count 2 2006.229.22:01:15.33#ibcon#enter sib2, iclass 17, count 2 2006.229.22:01:15.33#ibcon#flushed, iclass 17, count 2 2006.229.22:01:15.33#ibcon#about to write, iclass 17, count 2 2006.229.22:01:15.33#ibcon#wrote, iclass 17, count 2 2006.229.22:01:15.33#ibcon#about to read 3, iclass 17, count 2 2006.229.22:01:15.36#ibcon#read 3, iclass 17, count 2 2006.229.22:01:15.36#ibcon#about to read 4, iclass 17, count 2 2006.229.22:01:15.36#ibcon#read 4, iclass 17, count 2 2006.229.22:01:15.36#ibcon#about to read 5, iclass 17, count 2 2006.229.22:01:15.36#ibcon#read 5, iclass 17, count 2 2006.229.22:01:15.36#ibcon#about to read 6, iclass 17, count 2 2006.229.22:01:15.36#ibcon#read 6, iclass 17, count 2 2006.229.22:01:15.36#ibcon#end of sib2, iclass 17, count 2 2006.229.22:01:15.36#ibcon#*after write, iclass 17, count 2 2006.229.22:01:15.36#ibcon#*before return 0, iclass 17, count 2 2006.229.22:01:15.36#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:15.36#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:15.36#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.22:01:15.36#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:15.36#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:15.48#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:15.48#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:15.48#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:01:15.48#ibcon#first serial, iclass 17, count 0 2006.229.22:01:15.48#ibcon#enter sib2, iclass 17, count 0 2006.229.22:01:15.48#ibcon#flushed, iclass 17, count 0 2006.229.22:01:15.48#ibcon#about to write, iclass 17, count 0 2006.229.22:01:15.48#ibcon#wrote, iclass 17, count 0 2006.229.22:01:15.48#ibcon#about to read 3, iclass 17, count 0 2006.229.22:01:15.50#ibcon#read 3, iclass 17, count 0 2006.229.22:01:15.50#ibcon#about to read 4, iclass 17, count 0 2006.229.22:01:15.50#ibcon#read 4, iclass 17, count 0 2006.229.22:01:15.50#ibcon#about to read 5, iclass 17, count 0 2006.229.22:01:15.50#ibcon#read 5, iclass 17, count 0 2006.229.22:01:15.50#ibcon#about to read 6, iclass 17, count 0 2006.229.22:01:15.50#ibcon#read 6, iclass 17, count 0 2006.229.22:01:15.50#ibcon#end of sib2, iclass 17, count 0 2006.229.22:01:15.50#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:01:15.50#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:01:15.50#ibcon#[25=USB\r\n] 2006.229.22:01:15.50#ibcon#*before write, iclass 17, count 0 2006.229.22:01:15.50#ibcon#enter sib2, iclass 17, count 0 2006.229.22:01:15.50#ibcon#flushed, iclass 17, count 0 2006.229.22:01:15.50#ibcon#about to write, iclass 17, count 0 2006.229.22:01:15.50#ibcon#wrote, iclass 17, count 0 2006.229.22:01:15.50#ibcon#about to read 3, iclass 17, count 0 2006.229.22:01:15.53#ibcon#read 3, iclass 17, count 0 2006.229.22:01:15.53#ibcon#about to read 4, iclass 17, count 0 2006.229.22:01:15.53#ibcon#read 4, iclass 17, count 0 2006.229.22:01:15.53#ibcon#about to read 5, iclass 17, count 0 2006.229.22:01:15.53#ibcon#read 5, iclass 17, count 0 2006.229.22:01:15.53#ibcon#about to read 6, iclass 17, count 0 2006.229.22:01:15.53#ibcon#read 6, iclass 17, count 0 2006.229.22:01:15.53#ibcon#end of sib2, iclass 17, count 0 2006.229.22:01:15.53#ibcon#*after write, iclass 17, count 0 2006.229.22:01:15.53#ibcon#*before return 0, iclass 17, count 0 2006.229.22:01:15.53#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:15.53#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:15.53#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:01:15.53#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:01:15.53$vck44/valo=5,734.99 2006.229.22:01:15.53#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.22:01:15.53#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.22:01:15.53#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:15.53#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:15.53#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:15.53#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:15.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:01:15.53#ibcon#first serial, iclass 19, count 0 2006.229.22:01:15.53#ibcon#enter sib2, iclass 19, count 0 2006.229.22:01:15.53#ibcon#flushed, iclass 19, count 0 2006.229.22:01:15.53#ibcon#about to write, iclass 19, count 0 2006.229.22:01:15.53#ibcon#wrote, iclass 19, count 0 2006.229.22:01:15.53#ibcon#about to read 3, iclass 19, count 0 2006.229.22:01:15.55#ibcon#read 3, iclass 19, count 0 2006.229.22:01:15.55#ibcon#about to read 4, iclass 19, count 0 2006.229.22:01:15.55#ibcon#read 4, iclass 19, count 0 2006.229.22:01:15.55#ibcon#about to read 5, iclass 19, count 0 2006.229.22:01:15.55#ibcon#read 5, iclass 19, count 0 2006.229.22:01:15.55#ibcon#about to read 6, iclass 19, count 0 2006.229.22:01:15.55#ibcon#read 6, iclass 19, count 0 2006.229.22:01:15.55#ibcon#end of sib2, iclass 19, count 0 2006.229.22:01:15.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:01:15.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:01:15.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:01:15.55#ibcon#*before write, iclass 19, count 0 2006.229.22:01:15.55#ibcon#enter sib2, iclass 19, count 0 2006.229.22:01:15.55#ibcon#flushed, iclass 19, count 0 2006.229.22:01:15.55#ibcon#about to write, iclass 19, count 0 2006.229.22:01:15.55#ibcon#wrote, iclass 19, count 0 2006.229.22:01:15.55#ibcon#about to read 3, iclass 19, count 0 2006.229.22:01:15.59#ibcon#read 3, iclass 19, count 0 2006.229.22:01:15.59#ibcon#about to read 4, iclass 19, count 0 2006.229.22:01:15.59#ibcon#read 4, iclass 19, count 0 2006.229.22:01:15.59#ibcon#about to read 5, iclass 19, count 0 2006.229.22:01:15.59#ibcon#read 5, iclass 19, count 0 2006.229.22:01:15.59#ibcon#about to read 6, iclass 19, count 0 2006.229.22:01:15.59#ibcon#read 6, iclass 19, count 0 2006.229.22:01:15.59#ibcon#end of sib2, iclass 19, count 0 2006.229.22:01:15.59#ibcon#*after write, iclass 19, count 0 2006.229.22:01:15.59#ibcon#*before return 0, iclass 19, count 0 2006.229.22:01:15.59#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:15.59#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:15.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:01:15.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:01:15.59$vck44/va=5,4 2006.229.22:01:15.59#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.22:01:15.59#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.22:01:15.59#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:15.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:15.65#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:15.65#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:15.65#ibcon#enter wrdev, iclass 21, count 2 2006.229.22:01:15.65#ibcon#first serial, iclass 21, count 2 2006.229.22:01:15.65#ibcon#enter sib2, iclass 21, count 2 2006.229.22:01:15.65#ibcon#flushed, iclass 21, count 2 2006.229.22:01:15.65#ibcon#about to write, iclass 21, count 2 2006.229.22:01:15.65#ibcon#wrote, iclass 21, count 2 2006.229.22:01:15.65#ibcon#about to read 3, iclass 21, count 2 2006.229.22:01:15.67#ibcon#read 3, iclass 21, count 2 2006.229.22:01:15.67#ibcon#about to read 4, iclass 21, count 2 2006.229.22:01:15.67#ibcon#read 4, iclass 21, count 2 2006.229.22:01:15.67#ibcon#about to read 5, iclass 21, count 2 2006.229.22:01:15.67#ibcon#read 5, iclass 21, count 2 2006.229.22:01:15.67#ibcon#about to read 6, iclass 21, count 2 2006.229.22:01:15.67#ibcon#read 6, iclass 21, count 2 2006.229.22:01:15.67#ibcon#end of sib2, iclass 21, count 2 2006.229.22:01:15.67#ibcon#*mode == 0, iclass 21, count 2 2006.229.22:01:15.67#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.22:01:15.67#ibcon#[25=AT05-04\r\n] 2006.229.22:01:15.67#ibcon#*before write, iclass 21, count 2 2006.229.22:01:15.67#ibcon#enter sib2, iclass 21, count 2 2006.229.22:01:15.67#ibcon#flushed, iclass 21, count 2 2006.229.22:01:15.67#ibcon#about to write, iclass 21, count 2 2006.229.22:01:15.67#ibcon#wrote, iclass 21, count 2 2006.229.22:01:15.67#ibcon#about to read 3, iclass 21, count 2 2006.229.22:01:15.70#ibcon#read 3, iclass 21, count 2 2006.229.22:01:15.70#ibcon#about to read 4, iclass 21, count 2 2006.229.22:01:15.70#ibcon#read 4, iclass 21, count 2 2006.229.22:01:15.70#ibcon#about to read 5, iclass 21, count 2 2006.229.22:01:15.70#ibcon#read 5, iclass 21, count 2 2006.229.22:01:15.70#ibcon#about to read 6, iclass 21, count 2 2006.229.22:01:15.70#ibcon#read 6, iclass 21, count 2 2006.229.22:01:15.70#ibcon#end of sib2, iclass 21, count 2 2006.229.22:01:15.70#ibcon#*after write, iclass 21, count 2 2006.229.22:01:15.70#ibcon#*before return 0, iclass 21, count 2 2006.229.22:01:15.70#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:15.70#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:15.70#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.22:01:15.70#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:15.70#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:15.82#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:15.82#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:15.82#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:01:15.82#ibcon#first serial, iclass 21, count 0 2006.229.22:01:15.82#ibcon#enter sib2, iclass 21, count 0 2006.229.22:01:15.82#ibcon#flushed, iclass 21, count 0 2006.229.22:01:15.82#ibcon#about to write, iclass 21, count 0 2006.229.22:01:15.82#ibcon#wrote, iclass 21, count 0 2006.229.22:01:15.82#ibcon#about to read 3, iclass 21, count 0 2006.229.22:01:15.84#ibcon#read 3, iclass 21, count 0 2006.229.22:01:15.84#ibcon#about to read 4, iclass 21, count 0 2006.229.22:01:15.84#ibcon#read 4, iclass 21, count 0 2006.229.22:01:15.84#ibcon#about to read 5, iclass 21, count 0 2006.229.22:01:15.84#ibcon#read 5, iclass 21, count 0 2006.229.22:01:15.84#ibcon#about to read 6, iclass 21, count 0 2006.229.22:01:15.84#ibcon#read 6, iclass 21, count 0 2006.229.22:01:15.84#ibcon#end of sib2, iclass 21, count 0 2006.229.22:01:15.84#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:01:15.84#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:01:15.84#ibcon#[25=USB\r\n] 2006.229.22:01:15.84#ibcon#*before write, iclass 21, count 0 2006.229.22:01:15.84#ibcon#enter sib2, iclass 21, count 0 2006.229.22:01:15.84#ibcon#flushed, iclass 21, count 0 2006.229.22:01:15.84#ibcon#about to write, iclass 21, count 0 2006.229.22:01:15.84#ibcon#wrote, iclass 21, count 0 2006.229.22:01:15.84#ibcon#about to read 3, iclass 21, count 0 2006.229.22:01:15.87#ibcon#read 3, iclass 21, count 0 2006.229.22:01:15.87#ibcon#about to read 4, iclass 21, count 0 2006.229.22:01:15.87#ibcon#read 4, iclass 21, count 0 2006.229.22:01:15.87#ibcon#about to read 5, iclass 21, count 0 2006.229.22:01:15.87#ibcon#read 5, iclass 21, count 0 2006.229.22:01:15.87#ibcon#about to read 6, iclass 21, count 0 2006.229.22:01:15.87#ibcon#read 6, iclass 21, count 0 2006.229.22:01:15.87#ibcon#end of sib2, iclass 21, count 0 2006.229.22:01:15.87#ibcon#*after write, iclass 21, count 0 2006.229.22:01:15.87#ibcon#*before return 0, iclass 21, count 0 2006.229.22:01:15.87#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:15.87#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:15.87#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:01:15.87#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:01:15.87$vck44/valo=6,814.99 2006.229.22:01:15.87#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.22:01:15.87#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.22:01:15.87#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:15.87#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:15.87#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:15.87#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:15.87#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:01:15.87#ibcon#first serial, iclass 23, count 0 2006.229.22:01:15.87#ibcon#enter sib2, iclass 23, count 0 2006.229.22:01:15.87#ibcon#flushed, iclass 23, count 0 2006.229.22:01:15.87#ibcon#about to write, iclass 23, count 0 2006.229.22:01:15.87#ibcon#wrote, iclass 23, count 0 2006.229.22:01:15.87#ibcon#about to read 3, iclass 23, count 0 2006.229.22:01:15.89#ibcon#read 3, iclass 23, count 0 2006.229.22:01:15.89#ibcon#about to read 4, iclass 23, count 0 2006.229.22:01:15.89#ibcon#read 4, iclass 23, count 0 2006.229.22:01:15.89#ibcon#about to read 5, iclass 23, count 0 2006.229.22:01:15.89#ibcon#read 5, iclass 23, count 0 2006.229.22:01:15.89#ibcon#about to read 6, iclass 23, count 0 2006.229.22:01:15.89#ibcon#read 6, iclass 23, count 0 2006.229.22:01:15.89#ibcon#end of sib2, iclass 23, count 0 2006.229.22:01:15.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:01:15.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:01:15.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:01:15.89#ibcon#*before write, iclass 23, count 0 2006.229.22:01:15.89#ibcon#enter sib2, iclass 23, count 0 2006.229.22:01:15.89#ibcon#flushed, iclass 23, count 0 2006.229.22:01:15.89#ibcon#about to write, iclass 23, count 0 2006.229.22:01:15.89#ibcon#wrote, iclass 23, count 0 2006.229.22:01:15.89#ibcon#about to read 3, iclass 23, count 0 2006.229.22:01:15.93#ibcon#read 3, iclass 23, count 0 2006.229.22:01:15.93#ibcon#about to read 4, iclass 23, count 0 2006.229.22:01:15.93#ibcon#read 4, iclass 23, count 0 2006.229.22:01:15.93#ibcon#about to read 5, iclass 23, count 0 2006.229.22:01:15.93#ibcon#read 5, iclass 23, count 0 2006.229.22:01:15.93#ibcon#about to read 6, iclass 23, count 0 2006.229.22:01:15.93#ibcon#read 6, iclass 23, count 0 2006.229.22:01:15.93#ibcon#end of sib2, iclass 23, count 0 2006.229.22:01:15.93#ibcon#*after write, iclass 23, count 0 2006.229.22:01:15.93#ibcon#*before return 0, iclass 23, count 0 2006.229.22:01:15.93#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:15.93#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:15.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:01:15.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:01:15.93$vck44/va=6,4 2006.229.22:01:15.93#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.22:01:15.93#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.22:01:15.93#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:15.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:15.99#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:15.99#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:15.99#ibcon#enter wrdev, iclass 25, count 2 2006.229.22:01:15.99#ibcon#first serial, iclass 25, count 2 2006.229.22:01:15.99#ibcon#enter sib2, iclass 25, count 2 2006.229.22:01:15.99#ibcon#flushed, iclass 25, count 2 2006.229.22:01:15.99#ibcon#about to write, iclass 25, count 2 2006.229.22:01:15.99#ibcon#wrote, iclass 25, count 2 2006.229.22:01:15.99#ibcon#about to read 3, iclass 25, count 2 2006.229.22:01:16.01#ibcon#read 3, iclass 25, count 2 2006.229.22:01:16.01#ibcon#about to read 4, iclass 25, count 2 2006.229.22:01:16.01#ibcon#read 4, iclass 25, count 2 2006.229.22:01:16.01#ibcon#about to read 5, iclass 25, count 2 2006.229.22:01:16.01#ibcon#read 5, iclass 25, count 2 2006.229.22:01:16.01#ibcon#about to read 6, iclass 25, count 2 2006.229.22:01:16.01#ibcon#read 6, iclass 25, count 2 2006.229.22:01:16.01#ibcon#end of sib2, iclass 25, count 2 2006.229.22:01:16.01#ibcon#*mode == 0, iclass 25, count 2 2006.229.22:01:16.01#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.22:01:16.01#ibcon#[25=AT06-04\r\n] 2006.229.22:01:16.01#ibcon#*before write, iclass 25, count 2 2006.229.22:01:16.01#ibcon#enter sib2, iclass 25, count 2 2006.229.22:01:16.01#ibcon#flushed, iclass 25, count 2 2006.229.22:01:16.01#ibcon#about to write, iclass 25, count 2 2006.229.22:01:16.01#ibcon#wrote, iclass 25, count 2 2006.229.22:01:16.01#ibcon#about to read 3, iclass 25, count 2 2006.229.22:01:16.04#ibcon#read 3, iclass 25, count 2 2006.229.22:01:16.04#ibcon#about to read 4, iclass 25, count 2 2006.229.22:01:16.04#ibcon#read 4, iclass 25, count 2 2006.229.22:01:16.04#ibcon#about to read 5, iclass 25, count 2 2006.229.22:01:16.04#ibcon#read 5, iclass 25, count 2 2006.229.22:01:16.04#ibcon#about to read 6, iclass 25, count 2 2006.229.22:01:16.04#ibcon#read 6, iclass 25, count 2 2006.229.22:01:16.04#ibcon#end of sib2, iclass 25, count 2 2006.229.22:01:16.04#ibcon#*after write, iclass 25, count 2 2006.229.22:01:16.04#ibcon#*before return 0, iclass 25, count 2 2006.229.22:01:16.04#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:16.04#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:16.04#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.22:01:16.04#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:16.04#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:16.16#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:16.16#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:16.16#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:01:16.16#ibcon#first serial, iclass 25, count 0 2006.229.22:01:16.16#ibcon#enter sib2, iclass 25, count 0 2006.229.22:01:16.16#ibcon#flushed, iclass 25, count 0 2006.229.22:01:16.16#ibcon#about to write, iclass 25, count 0 2006.229.22:01:16.16#ibcon#wrote, iclass 25, count 0 2006.229.22:01:16.16#ibcon#about to read 3, iclass 25, count 0 2006.229.22:01:16.18#ibcon#read 3, iclass 25, count 0 2006.229.22:01:16.18#ibcon#about to read 4, iclass 25, count 0 2006.229.22:01:16.18#ibcon#read 4, iclass 25, count 0 2006.229.22:01:16.18#ibcon#about to read 5, iclass 25, count 0 2006.229.22:01:16.18#ibcon#read 5, iclass 25, count 0 2006.229.22:01:16.18#ibcon#about to read 6, iclass 25, count 0 2006.229.22:01:16.18#ibcon#read 6, iclass 25, count 0 2006.229.22:01:16.18#ibcon#end of sib2, iclass 25, count 0 2006.229.22:01:16.18#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:01:16.18#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:01:16.18#ibcon#[25=USB\r\n] 2006.229.22:01:16.18#ibcon#*before write, iclass 25, count 0 2006.229.22:01:16.18#ibcon#enter sib2, iclass 25, count 0 2006.229.22:01:16.18#ibcon#flushed, iclass 25, count 0 2006.229.22:01:16.18#ibcon#about to write, iclass 25, count 0 2006.229.22:01:16.18#ibcon#wrote, iclass 25, count 0 2006.229.22:01:16.18#ibcon#about to read 3, iclass 25, count 0 2006.229.22:01:16.21#ibcon#read 3, iclass 25, count 0 2006.229.22:01:16.21#ibcon#about to read 4, iclass 25, count 0 2006.229.22:01:16.21#ibcon#read 4, iclass 25, count 0 2006.229.22:01:16.21#ibcon#about to read 5, iclass 25, count 0 2006.229.22:01:16.21#ibcon#read 5, iclass 25, count 0 2006.229.22:01:16.21#ibcon#about to read 6, iclass 25, count 0 2006.229.22:01:16.21#ibcon#read 6, iclass 25, count 0 2006.229.22:01:16.21#ibcon#end of sib2, iclass 25, count 0 2006.229.22:01:16.21#ibcon#*after write, iclass 25, count 0 2006.229.22:01:16.21#ibcon#*before return 0, iclass 25, count 0 2006.229.22:01:16.21#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:16.21#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:16.21#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:01:16.21#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:01:16.21$vck44/valo=7,864.99 2006.229.22:01:16.21#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.22:01:16.21#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.22:01:16.21#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:16.21#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:16.21#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:16.21#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:16.21#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:01:16.21#ibcon#first serial, iclass 27, count 0 2006.229.22:01:16.21#ibcon#enter sib2, iclass 27, count 0 2006.229.22:01:16.21#ibcon#flushed, iclass 27, count 0 2006.229.22:01:16.21#ibcon#about to write, iclass 27, count 0 2006.229.22:01:16.21#ibcon#wrote, iclass 27, count 0 2006.229.22:01:16.21#ibcon#about to read 3, iclass 27, count 0 2006.229.22:01:16.23#ibcon#read 3, iclass 27, count 0 2006.229.22:01:16.23#ibcon#about to read 4, iclass 27, count 0 2006.229.22:01:16.23#ibcon#read 4, iclass 27, count 0 2006.229.22:01:16.23#ibcon#about to read 5, iclass 27, count 0 2006.229.22:01:16.23#ibcon#read 5, iclass 27, count 0 2006.229.22:01:16.23#ibcon#about to read 6, iclass 27, count 0 2006.229.22:01:16.23#ibcon#read 6, iclass 27, count 0 2006.229.22:01:16.23#ibcon#end of sib2, iclass 27, count 0 2006.229.22:01:16.23#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:01:16.23#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:01:16.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:01:16.23#ibcon#*before write, iclass 27, count 0 2006.229.22:01:16.23#ibcon#enter sib2, iclass 27, count 0 2006.229.22:01:16.23#ibcon#flushed, iclass 27, count 0 2006.229.22:01:16.23#ibcon#about to write, iclass 27, count 0 2006.229.22:01:16.23#ibcon#wrote, iclass 27, count 0 2006.229.22:01:16.23#ibcon#about to read 3, iclass 27, count 0 2006.229.22:01:16.27#ibcon#read 3, iclass 27, count 0 2006.229.22:01:16.27#ibcon#about to read 4, iclass 27, count 0 2006.229.22:01:16.27#ibcon#read 4, iclass 27, count 0 2006.229.22:01:16.27#ibcon#about to read 5, iclass 27, count 0 2006.229.22:01:16.27#ibcon#read 5, iclass 27, count 0 2006.229.22:01:16.27#ibcon#about to read 6, iclass 27, count 0 2006.229.22:01:16.27#ibcon#read 6, iclass 27, count 0 2006.229.22:01:16.27#ibcon#end of sib2, iclass 27, count 0 2006.229.22:01:16.27#ibcon#*after write, iclass 27, count 0 2006.229.22:01:16.27#ibcon#*before return 0, iclass 27, count 0 2006.229.22:01:16.27#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:16.27#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:16.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:01:16.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:01:16.27$vck44/va=7,5 2006.229.22:01:16.27#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.22:01:16.27#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.22:01:16.27#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:16.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:16.33#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:16.33#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:16.33#ibcon#enter wrdev, iclass 29, count 2 2006.229.22:01:16.33#ibcon#first serial, iclass 29, count 2 2006.229.22:01:16.33#ibcon#enter sib2, iclass 29, count 2 2006.229.22:01:16.33#ibcon#flushed, iclass 29, count 2 2006.229.22:01:16.33#ibcon#about to write, iclass 29, count 2 2006.229.22:01:16.33#ibcon#wrote, iclass 29, count 2 2006.229.22:01:16.33#ibcon#about to read 3, iclass 29, count 2 2006.229.22:01:16.35#ibcon#read 3, iclass 29, count 2 2006.229.22:01:16.35#ibcon#about to read 4, iclass 29, count 2 2006.229.22:01:16.35#ibcon#read 4, iclass 29, count 2 2006.229.22:01:16.35#ibcon#about to read 5, iclass 29, count 2 2006.229.22:01:16.35#ibcon#read 5, iclass 29, count 2 2006.229.22:01:16.35#ibcon#about to read 6, iclass 29, count 2 2006.229.22:01:16.35#ibcon#read 6, iclass 29, count 2 2006.229.22:01:16.35#ibcon#end of sib2, iclass 29, count 2 2006.229.22:01:16.35#ibcon#*mode == 0, iclass 29, count 2 2006.229.22:01:16.35#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.22:01:16.35#ibcon#[25=AT07-05\r\n] 2006.229.22:01:16.35#ibcon#*before write, iclass 29, count 2 2006.229.22:01:16.35#ibcon#enter sib2, iclass 29, count 2 2006.229.22:01:16.35#ibcon#flushed, iclass 29, count 2 2006.229.22:01:16.35#ibcon#about to write, iclass 29, count 2 2006.229.22:01:16.35#ibcon#wrote, iclass 29, count 2 2006.229.22:01:16.35#ibcon#about to read 3, iclass 29, count 2 2006.229.22:01:16.38#ibcon#read 3, iclass 29, count 2 2006.229.22:01:16.38#ibcon#about to read 4, iclass 29, count 2 2006.229.22:01:16.38#ibcon#read 4, iclass 29, count 2 2006.229.22:01:16.38#ibcon#about to read 5, iclass 29, count 2 2006.229.22:01:16.38#ibcon#read 5, iclass 29, count 2 2006.229.22:01:16.38#ibcon#about to read 6, iclass 29, count 2 2006.229.22:01:16.38#ibcon#read 6, iclass 29, count 2 2006.229.22:01:16.38#ibcon#end of sib2, iclass 29, count 2 2006.229.22:01:16.38#ibcon#*after write, iclass 29, count 2 2006.229.22:01:16.38#ibcon#*before return 0, iclass 29, count 2 2006.229.22:01:16.38#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:16.38#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:16.38#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.22:01:16.38#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:16.38#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:16.50#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:16.50#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:16.50#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:01:16.50#ibcon#first serial, iclass 29, count 0 2006.229.22:01:16.50#ibcon#enter sib2, iclass 29, count 0 2006.229.22:01:16.50#ibcon#flushed, iclass 29, count 0 2006.229.22:01:16.50#ibcon#about to write, iclass 29, count 0 2006.229.22:01:16.50#ibcon#wrote, iclass 29, count 0 2006.229.22:01:16.50#ibcon#about to read 3, iclass 29, count 0 2006.229.22:01:16.52#ibcon#read 3, iclass 29, count 0 2006.229.22:01:16.52#ibcon#about to read 4, iclass 29, count 0 2006.229.22:01:16.52#ibcon#read 4, iclass 29, count 0 2006.229.22:01:16.52#ibcon#about to read 5, iclass 29, count 0 2006.229.22:01:16.52#ibcon#read 5, iclass 29, count 0 2006.229.22:01:16.52#ibcon#about to read 6, iclass 29, count 0 2006.229.22:01:16.52#ibcon#read 6, iclass 29, count 0 2006.229.22:01:16.52#ibcon#end of sib2, iclass 29, count 0 2006.229.22:01:16.52#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:01:16.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:01:16.52#ibcon#[25=USB\r\n] 2006.229.22:01:16.52#ibcon#*before write, iclass 29, count 0 2006.229.22:01:16.52#ibcon#enter sib2, iclass 29, count 0 2006.229.22:01:16.52#ibcon#flushed, iclass 29, count 0 2006.229.22:01:16.52#ibcon#about to write, iclass 29, count 0 2006.229.22:01:16.52#ibcon#wrote, iclass 29, count 0 2006.229.22:01:16.52#ibcon#about to read 3, iclass 29, count 0 2006.229.22:01:16.55#ibcon#read 3, iclass 29, count 0 2006.229.22:01:16.55#ibcon#about to read 4, iclass 29, count 0 2006.229.22:01:16.55#ibcon#read 4, iclass 29, count 0 2006.229.22:01:16.55#ibcon#about to read 5, iclass 29, count 0 2006.229.22:01:16.55#ibcon#read 5, iclass 29, count 0 2006.229.22:01:16.55#ibcon#about to read 6, iclass 29, count 0 2006.229.22:01:16.55#ibcon#read 6, iclass 29, count 0 2006.229.22:01:16.55#ibcon#end of sib2, iclass 29, count 0 2006.229.22:01:16.55#ibcon#*after write, iclass 29, count 0 2006.229.22:01:16.55#ibcon#*before return 0, iclass 29, count 0 2006.229.22:01:16.55#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:16.55#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:16.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:01:16.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:01:16.55$vck44/valo=8,884.99 2006.229.22:01:16.55#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:01:16.55#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:01:16.55#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:16.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:16.55#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:16.55#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:16.55#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:01:16.55#ibcon#first serial, iclass 31, count 0 2006.229.22:01:16.55#ibcon#enter sib2, iclass 31, count 0 2006.229.22:01:16.55#ibcon#flushed, iclass 31, count 0 2006.229.22:01:16.55#ibcon#about to write, iclass 31, count 0 2006.229.22:01:16.55#ibcon#wrote, iclass 31, count 0 2006.229.22:01:16.55#ibcon#about to read 3, iclass 31, count 0 2006.229.22:01:16.57#ibcon#read 3, iclass 31, count 0 2006.229.22:01:16.57#ibcon#about to read 4, iclass 31, count 0 2006.229.22:01:16.57#ibcon#read 4, iclass 31, count 0 2006.229.22:01:16.57#ibcon#about to read 5, iclass 31, count 0 2006.229.22:01:16.57#ibcon#read 5, iclass 31, count 0 2006.229.22:01:16.57#ibcon#about to read 6, iclass 31, count 0 2006.229.22:01:16.57#ibcon#read 6, iclass 31, count 0 2006.229.22:01:16.57#ibcon#end of sib2, iclass 31, count 0 2006.229.22:01:16.57#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:01:16.57#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:01:16.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:01:16.57#ibcon#*before write, iclass 31, count 0 2006.229.22:01:16.57#ibcon#enter sib2, iclass 31, count 0 2006.229.22:01:16.57#ibcon#flushed, iclass 31, count 0 2006.229.22:01:16.57#ibcon#about to write, iclass 31, count 0 2006.229.22:01:16.57#ibcon#wrote, iclass 31, count 0 2006.229.22:01:16.57#ibcon#about to read 3, iclass 31, count 0 2006.229.22:01:16.61#ibcon#read 3, iclass 31, count 0 2006.229.22:01:16.61#ibcon#about to read 4, iclass 31, count 0 2006.229.22:01:16.61#ibcon#read 4, iclass 31, count 0 2006.229.22:01:16.61#ibcon#about to read 5, iclass 31, count 0 2006.229.22:01:16.61#ibcon#read 5, iclass 31, count 0 2006.229.22:01:16.61#ibcon#about to read 6, iclass 31, count 0 2006.229.22:01:16.61#ibcon#read 6, iclass 31, count 0 2006.229.22:01:16.61#ibcon#end of sib2, iclass 31, count 0 2006.229.22:01:16.61#ibcon#*after write, iclass 31, count 0 2006.229.22:01:16.61#ibcon#*before return 0, iclass 31, count 0 2006.229.22:01:16.61#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:16.61#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:16.61#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:01:16.61#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:01:16.61$vck44/va=8,6 2006.229.22:01:16.61#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.22:01:16.61#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.22:01:16.61#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:16.61#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:01:16.67#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:01:16.67#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:01:16.67#ibcon#enter wrdev, iclass 33, count 2 2006.229.22:01:16.67#ibcon#first serial, iclass 33, count 2 2006.229.22:01:16.67#ibcon#enter sib2, iclass 33, count 2 2006.229.22:01:16.67#ibcon#flushed, iclass 33, count 2 2006.229.22:01:16.67#ibcon#about to write, iclass 33, count 2 2006.229.22:01:16.67#ibcon#wrote, iclass 33, count 2 2006.229.22:01:16.67#ibcon#about to read 3, iclass 33, count 2 2006.229.22:01:16.69#ibcon#read 3, iclass 33, count 2 2006.229.22:01:16.69#ibcon#about to read 4, iclass 33, count 2 2006.229.22:01:16.69#ibcon#read 4, iclass 33, count 2 2006.229.22:01:16.69#ibcon#about to read 5, iclass 33, count 2 2006.229.22:01:16.69#ibcon#read 5, iclass 33, count 2 2006.229.22:01:16.69#ibcon#about to read 6, iclass 33, count 2 2006.229.22:01:16.69#ibcon#read 6, iclass 33, count 2 2006.229.22:01:16.69#ibcon#end of sib2, iclass 33, count 2 2006.229.22:01:16.69#ibcon#*mode == 0, iclass 33, count 2 2006.229.22:01:16.69#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.22:01:16.69#ibcon#[25=AT08-06\r\n] 2006.229.22:01:16.69#ibcon#*before write, iclass 33, count 2 2006.229.22:01:16.69#ibcon#enter sib2, iclass 33, count 2 2006.229.22:01:16.69#ibcon#flushed, iclass 33, count 2 2006.229.22:01:16.69#ibcon#about to write, iclass 33, count 2 2006.229.22:01:16.69#ibcon#wrote, iclass 33, count 2 2006.229.22:01:16.69#ibcon#about to read 3, iclass 33, count 2 2006.229.22:01:16.72#ibcon#read 3, iclass 33, count 2 2006.229.22:01:16.72#ibcon#about to read 4, iclass 33, count 2 2006.229.22:01:16.72#ibcon#read 4, iclass 33, count 2 2006.229.22:01:16.72#ibcon#about to read 5, iclass 33, count 2 2006.229.22:01:16.72#ibcon#read 5, iclass 33, count 2 2006.229.22:01:16.72#ibcon#about to read 6, iclass 33, count 2 2006.229.22:01:16.72#ibcon#read 6, iclass 33, count 2 2006.229.22:01:16.72#ibcon#end of sib2, iclass 33, count 2 2006.229.22:01:16.72#ibcon#*after write, iclass 33, count 2 2006.229.22:01:16.72#ibcon#*before return 0, iclass 33, count 2 2006.229.22:01:16.72#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:01:16.72#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:01:16.72#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.22:01:16.72#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:16.72#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:01:16.84#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:01:16.84#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:01:16.84#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:01:16.84#ibcon#first serial, iclass 33, count 0 2006.229.22:01:16.84#ibcon#enter sib2, iclass 33, count 0 2006.229.22:01:16.84#ibcon#flushed, iclass 33, count 0 2006.229.22:01:16.84#ibcon#about to write, iclass 33, count 0 2006.229.22:01:16.84#ibcon#wrote, iclass 33, count 0 2006.229.22:01:16.84#ibcon#about to read 3, iclass 33, count 0 2006.229.22:01:16.86#ibcon#read 3, iclass 33, count 0 2006.229.22:01:16.86#ibcon#about to read 4, iclass 33, count 0 2006.229.22:01:16.86#ibcon#read 4, iclass 33, count 0 2006.229.22:01:16.86#ibcon#about to read 5, iclass 33, count 0 2006.229.22:01:16.86#ibcon#read 5, iclass 33, count 0 2006.229.22:01:16.86#ibcon#about to read 6, iclass 33, count 0 2006.229.22:01:16.86#ibcon#read 6, iclass 33, count 0 2006.229.22:01:16.86#ibcon#end of sib2, iclass 33, count 0 2006.229.22:01:16.86#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:01:16.86#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:01:16.86#ibcon#[25=USB\r\n] 2006.229.22:01:16.86#ibcon#*before write, iclass 33, count 0 2006.229.22:01:16.86#ibcon#enter sib2, iclass 33, count 0 2006.229.22:01:16.86#ibcon#flushed, iclass 33, count 0 2006.229.22:01:16.86#ibcon#about to write, iclass 33, count 0 2006.229.22:01:16.86#ibcon#wrote, iclass 33, count 0 2006.229.22:01:16.86#ibcon#about to read 3, iclass 33, count 0 2006.229.22:01:16.89#ibcon#read 3, iclass 33, count 0 2006.229.22:01:16.89#ibcon#about to read 4, iclass 33, count 0 2006.229.22:01:16.89#ibcon#read 4, iclass 33, count 0 2006.229.22:01:16.89#ibcon#about to read 5, iclass 33, count 0 2006.229.22:01:16.89#ibcon#read 5, iclass 33, count 0 2006.229.22:01:16.89#ibcon#about to read 6, iclass 33, count 0 2006.229.22:01:16.89#ibcon#read 6, iclass 33, count 0 2006.229.22:01:16.89#ibcon#end of sib2, iclass 33, count 0 2006.229.22:01:16.89#ibcon#*after write, iclass 33, count 0 2006.229.22:01:16.89#ibcon#*before return 0, iclass 33, count 0 2006.229.22:01:16.89#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:01:16.89#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:01:16.89#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:01:16.89#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:01:16.89$vck44/vblo=1,629.99 2006.229.22:01:16.89#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.22:01:16.89#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.22:01:16.89#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:16.89#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:01:16.89#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:01:16.89#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:01:16.89#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:01:16.89#ibcon#first serial, iclass 35, count 0 2006.229.22:01:16.89#ibcon#enter sib2, iclass 35, count 0 2006.229.22:01:16.89#ibcon#flushed, iclass 35, count 0 2006.229.22:01:16.89#ibcon#about to write, iclass 35, count 0 2006.229.22:01:16.89#ibcon#wrote, iclass 35, count 0 2006.229.22:01:16.89#ibcon#about to read 3, iclass 35, count 0 2006.229.22:01:16.91#ibcon#read 3, iclass 35, count 0 2006.229.22:01:16.91#ibcon#about to read 4, iclass 35, count 0 2006.229.22:01:16.91#ibcon#read 4, iclass 35, count 0 2006.229.22:01:16.91#ibcon#about to read 5, iclass 35, count 0 2006.229.22:01:16.91#ibcon#read 5, iclass 35, count 0 2006.229.22:01:16.91#ibcon#about to read 6, iclass 35, count 0 2006.229.22:01:16.91#ibcon#read 6, iclass 35, count 0 2006.229.22:01:16.91#ibcon#end of sib2, iclass 35, count 0 2006.229.22:01:16.91#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:01:16.91#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:01:16.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:01:16.91#ibcon#*before write, iclass 35, count 0 2006.229.22:01:16.91#ibcon#enter sib2, iclass 35, count 0 2006.229.22:01:16.91#ibcon#flushed, iclass 35, count 0 2006.229.22:01:16.91#ibcon#about to write, iclass 35, count 0 2006.229.22:01:16.91#ibcon#wrote, iclass 35, count 0 2006.229.22:01:16.91#ibcon#about to read 3, iclass 35, count 0 2006.229.22:01:16.95#ibcon#read 3, iclass 35, count 0 2006.229.22:01:16.95#ibcon#about to read 4, iclass 35, count 0 2006.229.22:01:16.95#ibcon#read 4, iclass 35, count 0 2006.229.22:01:16.95#ibcon#about to read 5, iclass 35, count 0 2006.229.22:01:16.95#ibcon#read 5, iclass 35, count 0 2006.229.22:01:16.95#ibcon#about to read 6, iclass 35, count 0 2006.229.22:01:16.95#ibcon#read 6, iclass 35, count 0 2006.229.22:01:16.95#ibcon#end of sib2, iclass 35, count 0 2006.229.22:01:16.95#ibcon#*after write, iclass 35, count 0 2006.229.22:01:16.95#ibcon#*before return 0, iclass 35, count 0 2006.229.22:01:16.95#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:01:16.95#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:01:16.95#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:01:16.95#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:01:16.95$vck44/vb=1,4 2006.229.22:01:16.95#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.22:01:16.95#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.22:01:16.95#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:16.95#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:01:16.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:01:16.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:01:16.95#ibcon#enter wrdev, iclass 37, count 2 2006.229.22:01:16.95#ibcon#first serial, iclass 37, count 2 2006.229.22:01:16.95#ibcon#enter sib2, iclass 37, count 2 2006.229.22:01:16.95#ibcon#flushed, iclass 37, count 2 2006.229.22:01:16.95#ibcon#about to write, iclass 37, count 2 2006.229.22:01:16.95#ibcon#wrote, iclass 37, count 2 2006.229.22:01:16.95#ibcon#about to read 3, iclass 37, count 2 2006.229.22:01:16.97#ibcon#read 3, iclass 37, count 2 2006.229.22:01:16.97#ibcon#about to read 4, iclass 37, count 2 2006.229.22:01:16.97#ibcon#read 4, iclass 37, count 2 2006.229.22:01:16.97#ibcon#about to read 5, iclass 37, count 2 2006.229.22:01:16.97#ibcon#read 5, iclass 37, count 2 2006.229.22:01:16.97#ibcon#about to read 6, iclass 37, count 2 2006.229.22:01:16.97#ibcon#read 6, iclass 37, count 2 2006.229.22:01:16.97#ibcon#end of sib2, iclass 37, count 2 2006.229.22:01:16.97#ibcon#*mode == 0, iclass 37, count 2 2006.229.22:01:16.97#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.22:01:16.97#ibcon#[27=AT01-04\r\n] 2006.229.22:01:16.97#ibcon#*before write, iclass 37, count 2 2006.229.22:01:16.97#ibcon#enter sib2, iclass 37, count 2 2006.229.22:01:16.97#ibcon#flushed, iclass 37, count 2 2006.229.22:01:16.97#ibcon#about to write, iclass 37, count 2 2006.229.22:01:16.97#ibcon#wrote, iclass 37, count 2 2006.229.22:01:16.97#ibcon#about to read 3, iclass 37, count 2 2006.229.22:01:17.00#ibcon#read 3, iclass 37, count 2 2006.229.22:01:17.00#ibcon#about to read 4, iclass 37, count 2 2006.229.22:01:17.00#ibcon#read 4, iclass 37, count 2 2006.229.22:01:17.00#ibcon#about to read 5, iclass 37, count 2 2006.229.22:01:17.00#ibcon#read 5, iclass 37, count 2 2006.229.22:01:17.00#ibcon#about to read 6, iclass 37, count 2 2006.229.22:01:17.00#ibcon#read 6, iclass 37, count 2 2006.229.22:01:17.00#ibcon#end of sib2, iclass 37, count 2 2006.229.22:01:17.00#ibcon#*after write, iclass 37, count 2 2006.229.22:01:17.00#ibcon#*before return 0, iclass 37, count 2 2006.229.22:01:17.00#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:01:17.00#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:01:17.00#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.22:01:17.00#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:17.00#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:01:17.12#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:01:17.12#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:01:17.12#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:01:17.12#ibcon#first serial, iclass 37, count 0 2006.229.22:01:17.12#ibcon#enter sib2, iclass 37, count 0 2006.229.22:01:17.12#ibcon#flushed, iclass 37, count 0 2006.229.22:01:17.12#ibcon#about to write, iclass 37, count 0 2006.229.22:01:17.12#ibcon#wrote, iclass 37, count 0 2006.229.22:01:17.12#ibcon#about to read 3, iclass 37, count 0 2006.229.22:01:17.14#ibcon#read 3, iclass 37, count 0 2006.229.22:01:17.14#ibcon#about to read 4, iclass 37, count 0 2006.229.22:01:17.14#ibcon#read 4, iclass 37, count 0 2006.229.22:01:17.14#ibcon#about to read 5, iclass 37, count 0 2006.229.22:01:17.14#ibcon#read 5, iclass 37, count 0 2006.229.22:01:17.14#ibcon#about to read 6, iclass 37, count 0 2006.229.22:01:17.14#ibcon#read 6, iclass 37, count 0 2006.229.22:01:17.14#ibcon#end of sib2, iclass 37, count 0 2006.229.22:01:17.14#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:01:17.14#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:01:17.14#ibcon#[27=USB\r\n] 2006.229.22:01:17.14#ibcon#*before write, iclass 37, count 0 2006.229.22:01:17.14#ibcon#enter sib2, iclass 37, count 0 2006.229.22:01:17.14#ibcon#flushed, iclass 37, count 0 2006.229.22:01:17.14#ibcon#about to write, iclass 37, count 0 2006.229.22:01:17.14#ibcon#wrote, iclass 37, count 0 2006.229.22:01:17.14#ibcon#about to read 3, iclass 37, count 0 2006.229.22:01:17.17#ibcon#read 3, iclass 37, count 0 2006.229.22:01:17.17#ibcon#about to read 4, iclass 37, count 0 2006.229.22:01:17.17#ibcon#read 4, iclass 37, count 0 2006.229.22:01:17.17#ibcon#about to read 5, iclass 37, count 0 2006.229.22:01:17.17#ibcon#read 5, iclass 37, count 0 2006.229.22:01:17.17#ibcon#about to read 6, iclass 37, count 0 2006.229.22:01:17.17#ibcon#read 6, iclass 37, count 0 2006.229.22:01:17.17#ibcon#end of sib2, iclass 37, count 0 2006.229.22:01:17.17#ibcon#*after write, iclass 37, count 0 2006.229.22:01:17.17#ibcon#*before return 0, iclass 37, count 0 2006.229.22:01:17.17#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:01:17.17#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:01:17.17#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:01:17.17#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:01:17.17$vck44/vblo=2,634.99 2006.229.22:01:17.17#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.22:01:17.17#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.22:01:17.17#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:17.17#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:17.17#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:17.17#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:17.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:01:17.17#ibcon#first serial, iclass 39, count 0 2006.229.22:01:17.17#ibcon#enter sib2, iclass 39, count 0 2006.229.22:01:17.17#ibcon#flushed, iclass 39, count 0 2006.229.22:01:17.17#ibcon#about to write, iclass 39, count 0 2006.229.22:01:17.17#ibcon#wrote, iclass 39, count 0 2006.229.22:01:17.17#ibcon#about to read 3, iclass 39, count 0 2006.229.22:01:17.19#ibcon#read 3, iclass 39, count 0 2006.229.22:01:17.19#ibcon#about to read 4, iclass 39, count 0 2006.229.22:01:17.19#ibcon#read 4, iclass 39, count 0 2006.229.22:01:17.19#ibcon#about to read 5, iclass 39, count 0 2006.229.22:01:17.19#ibcon#read 5, iclass 39, count 0 2006.229.22:01:17.19#ibcon#about to read 6, iclass 39, count 0 2006.229.22:01:17.19#ibcon#read 6, iclass 39, count 0 2006.229.22:01:17.19#ibcon#end of sib2, iclass 39, count 0 2006.229.22:01:17.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:01:17.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:01:17.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:01:17.19#ibcon#*before write, iclass 39, count 0 2006.229.22:01:17.19#ibcon#enter sib2, iclass 39, count 0 2006.229.22:01:17.19#ibcon#flushed, iclass 39, count 0 2006.229.22:01:17.19#ibcon#about to write, iclass 39, count 0 2006.229.22:01:17.19#ibcon#wrote, iclass 39, count 0 2006.229.22:01:17.19#ibcon#about to read 3, iclass 39, count 0 2006.229.22:01:17.23#ibcon#read 3, iclass 39, count 0 2006.229.22:01:17.23#ibcon#about to read 4, iclass 39, count 0 2006.229.22:01:17.23#ibcon#read 4, iclass 39, count 0 2006.229.22:01:17.23#ibcon#about to read 5, iclass 39, count 0 2006.229.22:01:17.23#ibcon#read 5, iclass 39, count 0 2006.229.22:01:17.23#ibcon#about to read 6, iclass 39, count 0 2006.229.22:01:17.23#ibcon#read 6, iclass 39, count 0 2006.229.22:01:17.23#ibcon#end of sib2, iclass 39, count 0 2006.229.22:01:17.23#ibcon#*after write, iclass 39, count 0 2006.229.22:01:17.23#ibcon#*before return 0, iclass 39, count 0 2006.229.22:01:17.23#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:17.23#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:01:17.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:01:17.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:01:17.23$vck44/vb=2,4 2006.229.22:01:17.23#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.22:01:17.23#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.22:01:17.23#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:17.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:17.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:17.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:17.29#ibcon#enter wrdev, iclass 3, count 2 2006.229.22:01:17.29#ibcon#first serial, iclass 3, count 2 2006.229.22:01:17.29#ibcon#enter sib2, iclass 3, count 2 2006.229.22:01:17.29#ibcon#flushed, iclass 3, count 2 2006.229.22:01:17.29#ibcon#about to write, iclass 3, count 2 2006.229.22:01:17.29#ibcon#wrote, iclass 3, count 2 2006.229.22:01:17.29#ibcon#about to read 3, iclass 3, count 2 2006.229.22:01:17.31#ibcon#read 3, iclass 3, count 2 2006.229.22:01:17.31#ibcon#about to read 4, iclass 3, count 2 2006.229.22:01:17.31#ibcon#read 4, iclass 3, count 2 2006.229.22:01:17.31#ibcon#about to read 5, iclass 3, count 2 2006.229.22:01:17.31#ibcon#read 5, iclass 3, count 2 2006.229.22:01:17.31#ibcon#about to read 6, iclass 3, count 2 2006.229.22:01:17.31#ibcon#read 6, iclass 3, count 2 2006.229.22:01:17.31#ibcon#end of sib2, iclass 3, count 2 2006.229.22:01:17.31#ibcon#*mode == 0, iclass 3, count 2 2006.229.22:01:17.31#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.22:01:17.31#ibcon#[27=AT02-04\r\n] 2006.229.22:01:17.31#ibcon#*before write, iclass 3, count 2 2006.229.22:01:17.31#ibcon#enter sib2, iclass 3, count 2 2006.229.22:01:17.31#ibcon#flushed, iclass 3, count 2 2006.229.22:01:17.31#ibcon#about to write, iclass 3, count 2 2006.229.22:01:17.31#ibcon#wrote, iclass 3, count 2 2006.229.22:01:17.31#ibcon#about to read 3, iclass 3, count 2 2006.229.22:01:17.34#ibcon#read 3, iclass 3, count 2 2006.229.22:01:17.34#ibcon#about to read 4, iclass 3, count 2 2006.229.22:01:17.34#ibcon#read 4, iclass 3, count 2 2006.229.22:01:17.34#ibcon#about to read 5, iclass 3, count 2 2006.229.22:01:17.34#ibcon#read 5, iclass 3, count 2 2006.229.22:01:17.34#ibcon#about to read 6, iclass 3, count 2 2006.229.22:01:17.34#ibcon#read 6, iclass 3, count 2 2006.229.22:01:17.34#ibcon#end of sib2, iclass 3, count 2 2006.229.22:01:17.34#ibcon#*after write, iclass 3, count 2 2006.229.22:01:17.34#ibcon#*before return 0, iclass 3, count 2 2006.229.22:01:17.34#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:17.34#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:01:17.34#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.22:01:17.34#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:17.34#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:17.46#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:17.46#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:17.46#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:01:17.46#ibcon#first serial, iclass 3, count 0 2006.229.22:01:17.46#ibcon#enter sib2, iclass 3, count 0 2006.229.22:01:17.46#ibcon#flushed, iclass 3, count 0 2006.229.22:01:17.46#ibcon#about to write, iclass 3, count 0 2006.229.22:01:17.46#ibcon#wrote, iclass 3, count 0 2006.229.22:01:17.46#ibcon#about to read 3, iclass 3, count 0 2006.229.22:01:17.48#ibcon#read 3, iclass 3, count 0 2006.229.22:01:17.48#ibcon#about to read 4, iclass 3, count 0 2006.229.22:01:17.48#ibcon#read 4, iclass 3, count 0 2006.229.22:01:17.48#ibcon#about to read 5, iclass 3, count 0 2006.229.22:01:17.48#ibcon#read 5, iclass 3, count 0 2006.229.22:01:17.48#ibcon#about to read 6, iclass 3, count 0 2006.229.22:01:17.48#ibcon#read 6, iclass 3, count 0 2006.229.22:01:17.48#ibcon#end of sib2, iclass 3, count 0 2006.229.22:01:17.48#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:01:17.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:01:17.48#ibcon#[27=USB\r\n] 2006.229.22:01:17.48#ibcon#*before write, iclass 3, count 0 2006.229.22:01:17.48#ibcon#enter sib2, iclass 3, count 0 2006.229.22:01:17.48#ibcon#flushed, iclass 3, count 0 2006.229.22:01:17.48#ibcon#about to write, iclass 3, count 0 2006.229.22:01:17.48#ibcon#wrote, iclass 3, count 0 2006.229.22:01:17.48#ibcon#about to read 3, iclass 3, count 0 2006.229.22:01:17.51#ibcon#read 3, iclass 3, count 0 2006.229.22:01:17.51#ibcon#about to read 4, iclass 3, count 0 2006.229.22:01:17.51#ibcon#read 4, iclass 3, count 0 2006.229.22:01:17.51#ibcon#about to read 5, iclass 3, count 0 2006.229.22:01:17.51#ibcon#read 5, iclass 3, count 0 2006.229.22:01:17.51#ibcon#about to read 6, iclass 3, count 0 2006.229.22:01:17.51#ibcon#read 6, iclass 3, count 0 2006.229.22:01:17.51#ibcon#end of sib2, iclass 3, count 0 2006.229.22:01:17.51#ibcon#*after write, iclass 3, count 0 2006.229.22:01:17.51#ibcon#*before return 0, iclass 3, count 0 2006.229.22:01:17.51#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:17.51#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:01:17.51#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:01:17.51#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:01:17.51$vck44/vblo=3,649.99 2006.229.22:01:17.51#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:01:17.51#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:01:17.51#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:17.51#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:17.51#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:17.51#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:17.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:01:17.51#ibcon#first serial, iclass 5, count 0 2006.229.22:01:17.51#ibcon#enter sib2, iclass 5, count 0 2006.229.22:01:17.51#ibcon#flushed, iclass 5, count 0 2006.229.22:01:17.51#ibcon#about to write, iclass 5, count 0 2006.229.22:01:17.51#ibcon#wrote, iclass 5, count 0 2006.229.22:01:17.51#ibcon#about to read 3, iclass 5, count 0 2006.229.22:01:17.53#ibcon#read 3, iclass 5, count 0 2006.229.22:01:17.53#ibcon#about to read 4, iclass 5, count 0 2006.229.22:01:17.53#ibcon#read 4, iclass 5, count 0 2006.229.22:01:17.53#ibcon#about to read 5, iclass 5, count 0 2006.229.22:01:17.53#ibcon#read 5, iclass 5, count 0 2006.229.22:01:17.53#ibcon#about to read 6, iclass 5, count 0 2006.229.22:01:17.53#ibcon#read 6, iclass 5, count 0 2006.229.22:01:17.53#ibcon#end of sib2, iclass 5, count 0 2006.229.22:01:17.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:01:17.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:01:17.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:01:17.53#ibcon#*before write, iclass 5, count 0 2006.229.22:01:17.53#ibcon#enter sib2, iclass 5, count 0 2006.229.22:01:17.53#ibcon#flushed, iclass 5, count 0 2006.229.22:01:17.53#ibcon#about to write, iclass 5, count 0 2006.229.22:01:17.53#ibcon#wrote, iclass 5, count 0 2006.229.22:01:17.53#ibcon#about to read 3, iclass 5, count 0 2006.229.22:01:17.57#ibcon#read 3, iclass 5, count 0 2006.229.22:01:17.57#ibcon#about to read 4, iclass 5, count 0 2006.229.22:01:17.57#ibcon#read 4, iclass 5, count 0 2006.229.22:01:17.57#ibcon#about to read 5, iclass 5, count 0 2006.229.22:01:17.57#ibcon#read 5, iclass 5, count 0 2006.229.22:01:17.57#ibcon#about to read 6, iclass 5, count 0 2006.229.22:01:17.57#ibcon#read 6, iclass 5, count 0 2006.229.22:01:17.57#ibcon#end of sib2, iclass 5, count 0 2006.229.22:01:17.57#ibcon#*after write, iclass 5, count 0 2006.229.22:01:17.57#ibcon#*before return 0, iclass 5, count 0 2006.229.22:01:17.57#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:17.57#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:01:17.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:01:17.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:01:17.57$vck44/vb=3,4 2006.229.22:01:17.57#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.22:01:17.57#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.22:01:17.57#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:17.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:17.63#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:17.63#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:17.63#ibcon#enter wrdev, iclass 7, count 2 2006.229.22:01:17.63#ibcon#first serial, iclass 7, count 2 2006.229.22:01:17.63#ibcon#enter sib2, iclass 7, count 2 2006.229.22:01:17.63#ibcon#flushed, iclass 7, count 2 2006.229.22:01:17.63#ibcon#about to write, iclass 7, count 2 2006.229.22:01:17.63#ibcon#wrote, iclass 7, count 2 2006.229.22:01:17.63#ibcon#about to read 3, iclass 7, count 2 2006.229.22:01:17.65#ibcon#read 3, iclass 7, count 2 2006.229.22:01:17.65#ibcon#about to read 4, iclass 7, count 2 2006.229.22:01:17.65#ibcon#read 4, iclass 7, count 2 2006.229.22:01:17.65#ibcon#about to read 5, iclass 7, count 2 2006.229.22:01:17.65#ibcon#read 5, iclass 7, count 2 2006.229.22:01:17.65#ibcon#about to read 6, iclass 7, count 2 2006.229.22:01:17.65#ibcon#read 6, iclass 7, count 2 2006.229.22:01:17.65#ibcon#end of sib2, iclass 7, count 2 2006.229.22:01:17.65#ibcon#*mode == 0, iclass 7, count 2 2006.229.22:01:17.65#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.22:01:17.65#ibcon#[27=AT03-04\r\n] 2006.229.22:01:17.65#ibcon#*before write, iclass 7, count 2 2006.229.22:01:17.65#ibcon#enter sib2, iclass 7, count 2 2006.229.22:01:17.65#ibcon#flushed, iclass 7, count 2 2006.229.22:01:17.65#ibcon#about to write, iclass 7, count 2 2006.229.22:01:17.65#ibcon#wrote, iclass 7, count 2 2006.229.22:01:17.65#ibcon#about to read 3, iclass 7, count 2 2006.229.22:01:17.68#ibcon#read 3, iclass 7, count 2 2006.229.22:01:17.68#ibcon#about to read 4, iclass 7, count 2 2006.229.22:01:17.68#ibcon#read 4, iclass 7, count 2 2006.229.22:01:17.68#ibcon#about to read 5, iclass 7, count 2 2006.229.22:01:17.68#ibcon#read 5, iclass 7, count 2 2006.229.22:01:17.68#ibcon#about to read 6, iclass 7, count 2 2006.229.22:01:17.68#ibcon#read 6, iclass 7, count 2 2006.229.22:01:17.68#ibcon#end of sib2, iclass 7, count 2 2006.229.22:01:17.68#ibcon#*after write, iclass 7, count 2 2006.229.22:01:17.68#ibcon#*before return 0, iclass 7, count 2 2006.229.22:01:17.68#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:17.68#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:01:17.68#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.22:01:17.68#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:17.68#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:17.80#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:17.80#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:17.80#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:01:17.80#ibcon#first serial, iclass 7, count 0 2006.229.22:01:17.80#ibcon#enter sib2, iclass 7, count 0 2006.229.22:01:17.80#ibcon#flushed, iclass 7, count 0 2006.229.22:01:17.80#ibcon#about to write, iclass 7, count 0 2006.229.22:01:17.80#ibcon#wrote, iclass 7, count 0 2006.229.22:01:17.80#ibcon#about to read 3, iclass 7, count 0 2006.229.22:01:17.82#ibcon#read 3, iclass 7, count 0 2006.229.22:01:17.82#ibcon#about to read 4, iclass 7, count 0 2006.229.22:01:17.82#ibcon#read 4, iclass 7, count 0 2006.229.22:01:17.82#ibcon#about to read 5, iclass 7, count 0 2006.229.22:01:17.82#ibcon#read 5, iclass 7, count 0 2006.229.22:01:17.82#ibcon#about to read 6, iclass 7, count 0 2006.229.22:01:17.82#ibcon#read 6, iclass 7, count 0 2006.229.22:01:17.82#ibcon#end of sib2, iclass 7, count 0 2006.229.22:01:17.82#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:01:17.82#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:01:17.82#ibcon#[27=USB\r\n] 2006.229.22:01:17.82#ibcon#*before write, iclass 7, count 0 2006.229.22:01:17.82#ibcon#enter sib2, iclass 7, count 0 2006.229.22:01:17.82#ibcon#flushed, iclass 7, count 0 2006.229.22:01:17.82#ibcon#about to write, iclass 7, count 0 2006.229.22:01:17.82#ibcon#wrote, iclass 7, count 0 2006.229.22:01:17.82#ibcon#about to read 3, iclass 7, count 0 2006.229.22:01:17.85#ibcon#read 3, iclass 7, count 0 2006.229.22:01:17.85#ibcon#about to read 4, iclass 7, count 0 2006.229.22:01:17.85#ibcon#read 4, iclass 7, count 0 2006.229.22:01:17.85#ibcon#about to read 5, iclass 7, count 0 2006.229.22:01:17.85#ibcon#read 5, iclass 7, count 0 2006.229.22:01:17.85#ibcon#about to read 6, iclass 7, count 0 2006.229.22:01:17.85#ibcon#read 6, iclass 7, count 0 2006.229.22:01:17.85#ibcon#end of sib2, iclass 7, count 0 2006.229.22:01:17.85#ibcon#*after write, iclass 7, count 0 2006.229.22:01:17.85#ibcon#*before return 0, iclass 7, count 0 2006.229.22:01:17.85#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:17.85#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:01:17.85#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:01:17.85#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:01:17.85$vck44/vblo=4,679.99 2006.229.22:01:17.85#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.22:01:17.85#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.22:01:17.85#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:17.85#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:17.85#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:17.85#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:17.85#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:01:17.85#ibcon#first serial, iclass 11, count 0 2006.229.22:01:17.85#ibcon#enter sib2, iclass 11, count 0 2006.229.22:01:17.85#ibcon#flushed, iclass 11, count 0 2006.229.22:01:17.85#ibcon#about to write, iclass 11, count 0 2006.229.22:01:17.85#ibcon#wrote, iclass 11, count 0 2006.229.22:01:17.85#ibcon#about to read 3, iclass 11, count 0 2006.229.22:01:17.87#ibcon#read 3, iclass 11, count 0 2006.229.22:01:17.87#ibcon#about to read 4, iclass 11, count 0 2006.229.22:01:17.87#ibcon#read 4, iclass 11, count 0 2006.229.22:01:17.87#ibcon#about to read 5, iclass 11, count 0 2006.229.22:01:17.87#ibcon#read 5, iclass 11, count 0 2006.229.22:01:17.87#ibcon#about to read 6, iclass 11, count 0 2006.229.22:01:17.87#ibcon#read 6, iclass 11, count 0 2006.229.22:01:17.87#ibcon#end of sib2, iclass 11, count 0 2006.229.22:01:17.87#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:01:17.87#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:01:17.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:01:17.87#ibcon#*before write, iclass 11, count 0 2006.229.22:01:17.87#ibcon#enter sib2, iclass 11, count 0 2006.229.22:01:17.87#ibcon#flushed, iclass 11, count 0 2006.229.22:01:17.87#ibcon#about to write, iclass 11, count 0 2006.229.22:01:17.87#ibcon#wrote, iclass 11, count 0 2006.229.22:01:17.87#ibcon#about to read 3, iclass 11, count 0 2006.229.22:01:17.91#ibcon#read 3, iclass 11, count 0 2006.229.22:01:17.91#ibcon#about to read 4, iclass 11, count 0 2006.229.22:01:17.91#ibcon#read 4, iclass 11, count 0 2006.229.22:01:17.91#ibcon#about to read 5, iclass 11, count 0 2006.229.22:01:17.91#ibcon#read 5, iclass 11, count 0 2006.229.22:01:17.91#ibcon#about to read 6, iclass 11, count 0 2006.229.22:01:17.91#ibcon#read 6, iclass 11, count 0 2006.229.22:01:17.91#ibcon#end of sib2, iclass 11, count 0 2006.229.22:01:17.91#ibcon#*after write, iclass 11, count 0 2006.229.22:01:17.91#ibcon#*before return 0, iclass 11, count 0 2006.229.22:01:17.91#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:17.91#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:01:17.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:01:17.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:01:17.91$vck44/vb=4,4 2006.229.22:01:17.91#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.22:01:17.91#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.22:01:17.91#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:17.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:17.97#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:17.97#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:17.97#ibcon#enter wrdev, iclass 13, count 2 2006.229.22:01:17.97#ibcon#first serial, iclass 13, count 2 2006.229.22:01:17.97#ibcon#enter sib2, iclass 13, count 2 2006.229.22:01:17.97#ibcon#flushed, iclass 13, count 2 2006.229.22:01:17.97#ibcon#about to write, iclass 13, count 2 2006.229.22:01:17.97#ibcon#wrote, iclass 13, count 2 2006.229.22:01:17.97#ibcon#about to read 3, iclass 13, count 2 2006.229.22:01:17.99#ibcon#read 3, iclass 13, count 2 2006.229.22:01:17.99#ibcon#about to read 4, iclass 13, count 2 2006.229.22:01:17.99#ibcon#read 4, iclass 13, count 2 2006.229.22:01:17.99#ibcon#about to read 5, iclass 13, count 2 2006.229.22:01:17.99#ibcon#read 5, iclass 13, count 2 2006.229.22:01:17.99#ibcon#about to read 6, iclass 13, count 2 2006.229.22:01:17.99#ibcon#read 6, iclass 13, count 2 2006.229.22:01:17.99#ibcon#end of sib2, iclass 13, count 2 2006.229.22:01:17.99#ibcon#*mode == 0, iclass 13, count 2 2006.229.22:01:17.99#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.22:01:17.99#ibcon#[27=AT04-04\r\n] 2006.229.22:01:17.99#ibcon#*before write, iclass 13, count 2 2006.229.22:01:17.99#ibcon#enter sib2, iclass 13, count 2 2006.229.22:01:17.99#ibcon#flushed, iclass 13, count 2 2006.229.22:01:17.99#ibcon#about to write, iclass 13, count 2 2006.229.22:01:17.99#ibcon#wrote, iclass 13, count 2 2006.229.22:01:17.99#ibcon#about to read 3, iclass 13, count 2 2006.229.22:01:18.02#ibcon#read 3, iclass 13, count 2 2006.229.22:01:18.02#ibcon#about to read 4, iclass 13, count 2 2006.229.22:01:18.02#ibcon#read 4, iclass 13, count 2 2006.229.22:01:18.02#ibcon#about to read 5, iclass 13, count 2 2006.229.22:01:18.02#ibcon#read 5, iclass 13, count 2 2006.229.22:01:18.02#ibcon#about to read 6, iclass 13, count 2 2006.229.22:01:18.02#ibcon#read 6, iclass 13, count 2 2006.229.22:01:18.02#ibcon#end of sib2, iclass 13, count 2 2006.229.22:01:18.02#ibcon#*after write, iclass 13, count 2 2006.229.22:01:18.02#ibcon#*before return 0, iclass 13, count 2 2006.229.22:01:18.02#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:18.02#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:01:18.02#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.22:01:18.02#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:18.02#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:18.14#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:18.14#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:18.14#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:01:18.14#ibcon#first serial, iclass 13, count 0 2006.229.22:01:18.14#ibcon#enter sib2, iclass 13, count 0 2006.229.22:01:18.14#ibcon#flushed, iclass 13, count 0 2006.229.22:01:18.14#ibcon#about to write, iclass 13, count 0 2006.229.22:01:18.14#ibcon#wrote, iclass 13, count 0 2006.229.22:01:18.14#ibcon#about to read 3, iclass 13, count 0 2006.229.22:01:18.16#ibcon#read 3, iclass 13, count 0 2006.229.22:01:18.16#ibcon#about to read 4, iclass 13, count 0 2006.229.22:01:18.16#ibcon#read 4, iclass 13, count 0 2006.229.22:01:18.16#ibcon#about to read 5, iclass 13, count 0 2006.229.22:01:18.16#ibcon#read 5, iclass 13, count 0 2006.229.22:01:18.16#ibcon#about to read 6, iclass 13, count 0 2006.229.22:01:18.16#ibcon#read 6, iclass 13, count 0 2006.229.22:01:18.16#ibcon#end of sib2, iclass 13, count 0 2006.229.22:01:18.16#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:01:18.16#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:01:18.16#ibcon#[27=USB\r\n] 2006.229.22:01:18.16#ibcon#*before write, iclass 13, count 0 2006.229.22:01:18.16#ibcon#enter sib2, iclass 13, count 0 2006.229.22:01:18.16#ibcon#flushed, iclass 13, count 0 2006.229.22:01:18.16#ibcon#about to write, iclass 13, count 0 2006.229.22:01:18.16#ibcon#wrote, iclass 13, count 0 2006.229.22:01:18.16#ibcon#about to read 3, iclass 13, count 0 2006.229.22:01:18.19#ibcon#read 3, iclass 13, count 0 2006.229.22:01:18.19#ibcon#about to read 4, iclass 13, count 0 2006.229.22:01:18.19#ibcon#read 4, iclass 13, count 0 2006.229.22:01:18.19#ibcon#about to read 5, iclass 13, count 0 2006.229.22:01:18.19#ibcon#read 5, iclass 13, count 0 2006.229.22:01:18.19#ibcon#about to read 6, iclass 13, count 0 2006.229.22:01:18.19#ibcon#read 6, iclass 13, count 0 2006.229.22:01:18.19#ibcon#end of sib2, iclass 13, count 0 2006.229.22:01:18.19#ibcon#*after write, iclass 13, count 0 2006.229.22:01:18.19#ibcon#*before return 0, iclass 13, count 0 2006.229.22:01:18.19#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:18.19#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:01:18.19#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:01:18.19#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:01:18.19$vck44/vblo=5,709.99 2006.229.22:01:18.19#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.22:01:18.19#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.22:01:18.19#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:18.19#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:18.19#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:18.19#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:18.19#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:01:18.19#ibcon#first serial, iclass 15, count 0 2006.229.22:01:18.19#ibcon#enter sib2, iclass 15, count 0 2006.229.22:01:18.19#ibcon#flushed, iclass 15, count 0 2006.229.22:01:18.19#ibcon#about to write, iclass 15, count 0 2006.229.22:01:18.19#ibcon#wrote, iclass 15, count 0 2006.229.22:01:18.19#ibcon#about to read 3, iclass 15, count 0 2006.229.22:01:18.21#ibcon#read 3, iclass 15, count 0 2006.229.22:01:18.21#ibcon#about to read 4, iclass 15, count 0 2006.229.22:01:18.21#ibcon#read 4, iclass 15, count 0 2006.229.22:01:18.21#ibcon#about to read 5, iclass 15, count 0 2006.229.22:01:18.21#ibcon#read 5, iclass 15, count 0 2006.229.22:01:18.21#ibcon#about to read 6, iclass 15, count 0 2006.229.22:01:18.21#ibcon#read 6, iclass 15, count 0 2006.229.22:01:18.21#ibcon#end of sib2, iclass 15, count 0 2006.229.22:01:18.21#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:01:18.21#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:01:18.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:01:18.21#ibcon#*before write, iclass 15, count 0 2006.229.22:01:18.21#ibcon#enter sib2, iclass 15, count 0 2006.229.22:01:18.21#ibcon#flushed, iclass 15, count 0 2006.229.22:01:18.21#ibcon#about to write, iclass 15, count 0 2006.229.22:01:18.21#ibcon#wrote, iclass 15, count 0 2006.229.22:01:18.21#ibcon#about to read 3, iclass 15, count 0 2006.229.22:01:18.25#ibcon#read 3, iclass 15, count 0 2006.229.22:01:18.25#ibcon#about to read 4, iclass 15, count 0 2006.229.22:01:18.25#ibcon#read 4, iclass 15, count 0 2006.229.22:01:18.25#ibcon#about to read 5, iclass 15, count 0 2006.229.22:01:18.25#ibcon#read 5, iclass 15, count 0 2006.229.22:01:18.25#ibcon#about to read 6, iclass 15, count 0 2006.229.22:01:18.25#ibcon#read 6, iclass 15, count 0 2006.229.22:01:18.25#ibcon#end of sib2, iclass 15, count 0 2006.229.22:01:18.25#ibcon#*after write, iclass 15, count 0 2006.229.22:01:18.25#ibcon#*before return 0, iclass 15, count 0 2006.229.22:01:18.25#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:18.25#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:01:18.25#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:01:18.25#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:01:18.25$vck44/vb=5,4 2006.229.22:01:18.25#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.22:01:18.25#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.22:01:18.25#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:18.25#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:18.31#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:18.31#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:18.31#ibcon#enter wrdev, iclass 17, count 2 2006.229.22:01:18.31#ibcon#first serial, iclass 17, count 2 2006.229.22:01:18.31#ibcon#enter sib2, iclass 17, count 2 2006.229.22:01:18.31#ibcon#flushed, iclass 17, count 2 2006.229.22:01:18.31#ibcon#about to write, iclass 17, count 2 2006.229.22:01:18.31#ibcon#wrote, iclass 17, count 2 2006.229.22:01:18.31#ibcon#about to read 3, iclass 17, count 2 2006.229.22:01:18.33#ibcon#read 3, iclass 17, count 2 2006.229.22:01:18.33#ibcon#about to read 4, iclass 17, count 2 2006.229.22:01:18.33#ibcon#read 4, iclass 17, count 2 2006.229.22:01:18.33#ibcon#about to read 5, iclass 17, count 2 2006.229.22:01:18.33#ibcon#read 5, iclass 17, count 2 2006.229.22:01:18.33#ibcon#about to read 6, iclass 17, count 2 2006.229.22:01:18.33#ibcon#read 6, iclass 17, count 2 2006.229.22:01:18.33#ibcon#end of sib2, iclass 17, count 2 2006.229.22:01:18.33#ibcon#*mode == 0, iclass 17, count 2 2006.229.22:01:18.33#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.22:01:18.33#ibcon#[27=AT05-04\r\n] 2006.229.22:01:18.33#ibcon#*before write, iclass 17, count 2 2006.229.22:01:18.33#ibcon#enter sib2, iclass 17, count 2 2006.229.22:01:18.33#ibcon#flushed, iclass 17, count 2 2006.229.22:01:18.33#ibcon#about to write, iclass 17, count 2 2006.229.22:01:18.33#ibcon#wrote, iclass 17, count 2 2006.229.22:01:18.33#ibcon#about to read 3, iclass 17, count 2 2006.229.22:01:18.36#ibcon#read 3, iclass 17, count 2 2006.229.22:01:18.36#ibcon#about to read 4, iclass 17, count 2 2006.229.22:01:18.36#ibcon#read 4, iclass 17, count 2 2006.229.22:01:18.36#ibcon#about to read 5, iclass 17, count 2 2006.229.22:01:18.36#ibcon#read 5, iclass 17, count 2 2006.229.22:01:18.36#ibcon#about to read 6, iclass 17, count 2 2006.229.22:01:18.36#ibcon#read 6, iclass 17, count 2 2006.229.22:01:18.36#ibcon#end of sib2, iclass 17, count 2 2006.229.22:01:18.36#ibcon#*after write, iclass 17, count 2 2006.229.22:01:18.36#ibcon#*before return 0, iclass 17, count 2 2006.229.22:01:18.36#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:18.36#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:01:18.36#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.22:01:18.36#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:18.36#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:18.48#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:18.48#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:18.48#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:01:18.48#ibcon#first serial, iclass 17, count 0 2006.229.22:01:18.48#ibcon#enter sib2, iclass 17, count 0 2006.229.22:01:18.48#ibcon#flushed, iclass 17, count 0 2006.229.22:01:18.48#ibcon#about to write, iclass 17, count 0 2006.229.22:01:18.48#ibcon#wrote, iclass 17, count 0 2006.229.22:01:18.48#ibcon#about to read 3, iclass 17, count 0 2006.229.22:01:18.50#ibcon#read 3, iclass 17, count 0 2006.229.22:01:18.50#ibcon#about to read 4, iclass 17, count 0 2006.229.22:01:18.50#ibcon#read 4, iclass 17, count 0 2006.229.22:01:18.50#ibcon#about to read 5, iclass 17, count 0 2006.229.22:01:18.50#ibcon#read 5, iclass 17, count 0 2006.229.22:01:18.50#ibcon#about to read 6, iclass 17, count 0 2006.229.22:01:18.50#ibcon#read 6, iclass 17, count 0 2006.229.22:01:18.50#ibcon#end of sib2, iclass 17, count 0 2006.229.22:01:18.50#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:01:18.50#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:01:18.50#ibcon#[27=USB\r\n] 2006.229.22:01:18.50#ibcon#*before write, iclass 17, count 0 2006.229.22:01:18.50#ibcon#enter sib2, iclass 17, count 0 2006.229.22:01:18.50#ibcon#flushed, iclass 17, count 0 2006.229.22:01:18.50#ibcon#about to write, iclass 17, count 0 2006.229.22:01:18.50#ibcon#wrote, iclass 17, count 0 2006.229.22:01:18.50#ibcon#about to read 3, iclass 17, count 0 2006.229.22:01:18.53#ibcon#read 3, iclass 17, count 0 2006.229.22:01:18.53#ibcon#about to read 4, iclass 17, count 0 2006.229.22:01:18.53#ibcon#read 4, iclass 17, count 0 2006.229.22:01:18.53#ibcon#about to read 5, iclass 17, count 0 2006.229.22:01:18.53#ibcon#read 5, iclass 17, count 0 2006.229.22:01:18.53#ibcon#about to read 6, iclass 17, count 0 2006.229.22:01:18.53#ibcon#read 6, iclass 17, count 0 2006.229.22:01:18.53#ibcon#end of sib2, iclass 17, count 0 2006.229.22:01:18.53#ibcon#*after write, iclass 17, count 0 2006.229.22:01:18.53#ibcon#*before return 0, iclass 17, count 0 2006.229.22:01:18.53#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:18.53#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:01:18.53#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:01:18.53#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:01:18.53$vck44/vblo=6,719.99 2006.229.22:01:18.53#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.22:01:18.53#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.22:01:18.53#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:18.53#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:18.53#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:18.53#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:18.53#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:01:18.53#ibcon#first serial, iclass 19, count 0 2006.229.22:01:18.53#ibcon#enter sib2, iclass 19, count 0 2006.229.22:01:18.53#ibcon#flushed, iclass 19, count 0 2006.229.22:01:18.53#ibcon#about to write, iclass 19, count 0 2006.229.22:01:18.53#ibcon#wrote, iclass 19, count 0 2006.229.22:01:18.53#ibcon#about to read 3, iclass 19, count 0 2006.229.22:01:18.55#ibcon#read 3, iclass 19, count 0 2006.229.22:01:18.55#ibcon#about to read 4, iclass 19, count 0 2006.229.22:01:18.55#ibcon#read 4, iclass 19, count 0 2006.229.22:01:18.55#ibcon#about to read 5, iclass 19, count 0 2006.229.22:01:18.55#ibcon#read 5, iclass 19, count 0 2006.229.22:01:18.55#ibcon#about to read 6, iclass 19, count 0 2006.229.22:01:18.55#ibcon#read 6, iclass 19, count 0 2006.229.22:01:18.55#ibcon#end of sib2, iclass 19, count 0 2006.229.22:01:18.55#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:01:18.55#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:01:18.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:01:18.55#ibcon#*before write, iclass 19, count 0 2006.229.22:01:18.55#ibcon#enter sib2, iclass 19, count 0 2006.229.22:01:18.55#ibcon#flushed, iclass 19, count 0 2006.229.22:01:18.55#ibcon#about to write, iclass 19, count 0 2006.229.22:01:18.55#ibcon#wrote, iclass 19, count 0 2006.229.22:01:18.55#ibcon#about to read 3, iclass 19, count 0 2006.229.22:01:18.59#ibcon#read 3, iclass 19, count 0 2006.229.22:01:18.59#ibcon#about to read 4, iclass 19, count 0 2006.229.22:01:18.59#ibcon#read 4, iclass 19, count 0 2006.229.22:01:18.59#ibcon#about to read 5, iclass 19, count 0 2006.229.22:01:18.59#ibcon#read 5, iclass 19, count 0 2006.229.22:01:18.59#ibcon#about to read 6, iclass 19, count 0 2006.229.22:01:18.59#ibcon#read 6, iclass 19, count 0 2006.229.22:01:18.59#ibcon#end of sib2, iclass 19, count 0 2006.229.22:01:18.59#ibcon#*after write, iclass 19, count 0 2006.229.22:01:18.59#ibcon#*before return 0, iclass 19, count 0 2006.229.22:01:18.59#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:18.59#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:01:18.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:01:18.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:01:18.59$vck44/vb=6,4 2006.229.22:01:18.59#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.22:01:18.59#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.22:01:18.59#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:18.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:18.65#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:18.65#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:18.65#ibcon#enter wrdev, iclass 21, count 2 2006.229.22:01:18.65#ibcon#first serial, iclass 21, count 2 2006.229.22:01:18.65#ibcon#enter sib2, iclass 21, count 2 2006.229.22:01:18.65#ibcon#flushed, iclass 21, count 2 2006.229.22:01:18.65#ibcon#about to write, iclass 21, count 2 2006.229.22:01:18.65#ibcon#wrote, iclass 21, count 2 2006.229.22:01:18.65#ibcon#about to read 3, iclass 21, count 2 2006.229.22:01:18.67#ibcon#read 3, iclass 21, count 2 2006.229.22:01:18.67#ibcon#about to read 4, iclass 21, count 2 2006.229.22:01:18.67#ibcon#read 4, iclass 21, count 2 2006.229.22:01:18.67#ibcon#about to read 5, iclass 21, count 2 2006.229.22:01:18.67#ibcon#read 5, iclass 21, count 2 2006.229.22:01:18.67#ibcon#about to read 6, iclass 21, count 2 2006.229.22:01:18.67#ibcon#read 6, iclass 21, count 2 2006.229.22:01:18.67#ibcon#end of sib2, iclass 21, count 2 2006.229.22:01:18.67#ibcon#*mode == 0, iclass 21, count 2 2006.229.22:01:18.67#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.22:01:18.67#ibcon#[27=AT06-04\r\n] 2006.229.22:01:18.67#ibcon#*before write, iclass 21, count 2 2006.229.22:01:18.67#ibcon#enter sib2, iclass 21, count 2 2006.229.22:01:18.67#ibcon#flushed, iclass 21, count 2 2006.229.22:01:18.67#ibcon#about to write, iclass 21, count 2 2006.229.22:01:18.67#ibcon#wrote, iclass 21, count 2 2006.229.22:01:18.67#ibcon#about to read 3, iclass 21, count 2 2006.229.22:01:18.70#ibcon#read 3, iclass 21, count 2 2006.229.22:01:18.70#ibcon#about to read 4, iclass 21, count 2 2006.229.22:01:18.70#ibcon#read 4, iclass 21, count 2 2006.229.22:01:18.70#ibcon#about to read 5, iclass 21, count 2 2006.229.22:01:18.70#ibcon#read 5, iclass 21, count 2 2006.229.22:01:18.70#ibcon#about to read 6, iclass 21, count 2 2006.229.22:01:18.70#ibcon#read 6, iclass 21, count 2 2006.229.22:01:18.70#ibcon#end of sib2, iclass 21, count 2 2006.229.22:01:18.70#ibcon#*after write, iclass 21, count 2 2006.229.22:01:18.70#ibcon#*before return 0, iclass 21, count 2 2006.229.22:01:18.70#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:18.70#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:01:18.70#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.22:01:18.70#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:18.70#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:18.82#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:18.82#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:18.82#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:01:18.82#ibcon#first serial, iclass 21, count 0 2006.229.22:01:18.82#ibcon#enter sib2, iclass 21, count 0 2006.229.22:01:18.82#ibcon#flushed, iclass 21, count 0 2006.229.22:01:18.82#ibcon#about to write, iclass 21, count 0 2006.229.22:01:18.82#ibcon#wrote, iclass 21, count 0 2006.229.22:01:18.82#ibcon#about to read 3, iclass 21, count 0 2006.229.22:01:18.84#ibcon#read 3, iclass 21, count 0 2006.229.22:01:18.84#ibcon#about to read 4, iclass 21, count 0 2006.229.22:01:18.84#ibcon#read 4, iclass 21, count 0 2006.229.22:01:18.84#ibcon#about to read 5, iclass 21, count 0 2006.229.22:01:18.84#ibcon#read 5, iclass 21, count 0 2006.229.22:01:18.84#ibcon#about to read 6, iclass 21, count 0 2006.229.22:01:18.84#ibcon#read 6, iclass 21, count 0 2006.229.22:01:18.84#ibcon#end of sib2, iclass 21, count 0 2006.229.22:01:18.84#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:01:18.84#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:01:18.84#ibcon#[27=USB\r\n] 2006.229.22:01:18.84#ibcon#*before write, iclass 21, count 0 2006.229.22:01:18.84#ibcon#enter sib2, iclass 21, count 0 2006.229.22:01:18.84#ibcon#flushed, iclass 21, count 0 2006.229.22:01:18.84#ibcon#about to write, iclass 21, count 0 2006.229.22:01:18.84#ibcon#wrote, iclass 21, count 0 2006.229.22:01:18.84#ibcon#about to read 3, iclass 21, count 0 2006.229.22:01:18.87#ibcon#read 3, iclass 21, count 0 2006.229.22:01:18.87#ibcon#about to read 4, iclass 21, count 0 2006.229.22:01:18.87#ibcon#read 4, iclass 21, count 0 2006.229.22:01:18.87#ibcon#about to read 5, iclass 21, count 0 2006.229.22:01:18.87#ibcon#read 5, iclass 21, count 0 2006.229.22:01:18.87#ibcon#about to read 6, iclass 21, count 0 2006.229.22:01:18.87#ibcon#read 6, iclass 21, count 0 2006.229.22:01:18.87#ibcon#end of sib2, iclass 21, count 0 2006.229.22:01:18.87#ibcon#*after write, iclass 21, count 0 2006.229.22:01:18.87#ibcon#*before return 0, iclass 21, count 0 2006.229.22:01:18.87#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:18.87#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:01:18.87#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:01:18.87#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:01:18.87$vck44/vblo=7,734.99 2006.229.22:01:18.87#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.22:01:18.87#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.22:01:18.87#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:18.87#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:18.87#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:18.87#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:18.87#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:01:18.87#ibcon#first serial, iclass 23, count 0 2006.229.22:01:18.87#ibcon#enter sib2, iclass 23, count 0 2006.229.22:01:18.87#ibcon#flushed, iclass 23, count 0 2006.229.22:01:18.87#ibcon#about to write, iclass 23, count 0 2006.229.22:01:18.87#ibcon#wrote, iclass 23, count 0 2006.229.22:01:18.87#ibcon#about to read 3, iclass 23, count 0 2006.229.22:01:18.89#ibcon#read 3, iclass 23, count 0 2006.229.22:01:18.89#ibcon#about to read 4, iclass 23, count 0 2006.229.22:01:18.89#ibcon#read 4, iclass 23, count 0 2006.229.22:01:18.89#ibcon#about to read 5, iclass 23, count 0 2006.229.22:01:18.89#ibcon#read 5, iclass 23, count 0 2006.229.22:01:18.89#ibcon#about to read 6, iclass 23, count 0 2006.229.22:01:18.89#ibcon#read 6, iclass 23, count 0 2006.229.22:01:18.89#ibcon#end of sib2, iclass 23, count 0 2006.229.22:01:18.89#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:01:18.89#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:01:18.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:01:18.89#ibcon#*before write, iclass 23, count 0 2006.229.22:01:18.89#ibcon#enter sib2, iclass 23, count 0 2006.229.22:01:18.89#ibcon#flushed, iclass 23, count 0 2006.229.22:01:18.89#ibcon#about to write, iclass 23, count 0 2006.229.22:01:18.89#ibcon#wrote, iclass 23, count 0 2006.229.22:01:18.89#ibcon#about to read 3, iclass 23, count 0 2006.229.22:01:18.93#ibcon#read 3, iclass 23, count 0 2006.229.22:01:18.93#ibcon#about to read 4, iclass 23, count 0 2006.229.22:01:18.93#ibcon#read 4, iclass 23, count 0 2006.229.22:01:18.93#ibcon#about to read 5, iclass 23, count 0 2006.229.22:01:18.93#ibcon#read 5, iclass 23, count 0 2006.229.22:01:18.93#ibcon#about to read 6, iclass 23, count 0 2006.229.22:01:18.93#ibcon#read 6, iclass 23, count 0 2006.229.22:01:18.93#ibcon#end of sib2, iclass 23, count 0 2006.229.22:01:18.93#ibcon#*after write, iclass 23, count 0 2006.229.22:01:18.93#ibcon#*before return 0, iclass 23, count 0 2006.229.22:01:18.93#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:18.93#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:01:18.93#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:01:18.93#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:01:18.93$vck44/vb=7,4 2006.229.22:01:18.93#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.22:01:18.93#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.22:01:18.93#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:18.93#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:18.99#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:18.99#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:18.99#ibcon#enter wrdev, iclass 25, count 2 2006.229.22:01:18.99#ibcon#first serial, iclass 25, count 2 2006.229.22:01:18.99#ibcon#enter sib2, iclass 25, count 2 2006.229.22:01:18.99#ibcon#flushed, iclass 25, count 2 2006.229.22:01:18.99#ibcon#about to write, iclass 25, count 2 2006.229.22:01:18.99#ibcon#wrote, iclass 25, count 2 2006.229.22:01:18.99#ibcon#about to read 3, iclass 25, count 2 2006.229.22:01:19.01#ibcon#read 3, iclass 25, count 2 2006.229.22:01:19.01#ibcon#about to read 4, iclass 25, count 2 2006.229.22:01:19.01#ibcon#read 4, iclass 25, count 2 2006.229.22:01:19.01#ibcon#about to read 5, iclass 25, count 2 2006.229.22:01:19.01#ibcon#read 5, iclass 25, count 2 2006.229.22:01:19.01#ibcon#about to read 6, iclass 25, count 2 2006.229.22:01:19.01#ibcon#read 6, iclass 25, count 2 2006.229.22:01:19.01#ibcon#end of sib2, iclass 25, count 2 2006.229.22:01:19.01#ibcon#*mode == 0, iclass 25, count 2 2006.229.22:01:19.01#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.22:01:19.01#ibcon#[27=AT07-04\r\n] 2006.229.22:01:19.01#ibcon#*before write, iclass 25, count 2 2006.229.22:01:19.01#ibcon#enter sib2, iclass 25, count 2 2006.229.22:01:19.01#ibcon#flushed, iclass 25, count 2 2006.229.22:01:19.01#ibcon#about to write, iclass 25, count 2 2006.229.22:01:19.01#ibcon#wrote, iclass 25, count 2 2006.229.22:01:19.01#ibcon#about to read 3, iclass 25, count 2 2006.229.22:01:19.04#ibcon#read 3, iclass 25, count 2 2006.229.22:01:19.04#ibcon#about to read 4, iclass 25, count 2 2006.229.22:01:19.04#ibcon#read 4, iclass 25, count 2 2006.229.22:01:19.04#ibcon#about to read 5, iclass 25, count 2 2006.229.22:01:19.04#ibcon#read 5, iclass 25, count 2 2006.229.22:01:19.04#ibcon#about to read 6, iclass 25, count 2 2006.229.22:01:19.04#ibcon#read 6, iclass 25, count 2 2006.229.22:01:19.04#ibcon#end of sib2, iclass 25, count 2 2006.229.22:01:19.04#ibcon#*after write, iclass 25, count 2 2006.229.22:01:19.04#ibcon#*before return 0, iclass 25, count 2 2006.229.22:01:19.04#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:19.04#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:01:19.04#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.22:01:19.04#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:19.04#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:19.16#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:19.16#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:19.16#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:01:19.16#ibcon#first serial, iclass 25, count 0 2006.229.22:01:19.16#ibcon#enter sib2, iclass 25, count 0 2006.229.22:01:19.16#ibcon#flushed, iclass 25, count 0 2006.229.22:01:19.16#ibcon#about to write, iclass 25, count 0 2006.229.22:01:19.16#ibcon#wrote, iclass 25, count 0 2006.229.22:01:19.16#ibcon#about to read 3, iclass 25, count 0 2006.229.22:01:19.18#ibcon#read 3, iclass 25, count 0 2006.229.22:01:19.18#ibcon#about to read 4, iclass 25, count 0 2006.229.22:01:19.18#ibcon#read 4, iclass 25, count 0 2006.229.22:01:19.18#ibcon#about to read 5, iclass 25, count 0 2006.229.22:01:19.18#ibcon#read 5, iclass 25, count 0 2006.229.22:01:19.18#ibcon#about to read 6, iclass 25, count 0 2006.229.22:01:19.18#ibcon#read 6, iclass 25, count 0 2006.229.22:01:19.18#ibcon#end of sib2, iclass 25, count 0 2006.229.22:01:19.18#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:01:19.18#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:01:19.18#ibcon#[27=USB\r\n] 2006.229.22:01:19.18#ibcon#*before write, iclass 25, count 0 2006.229.22:01:19.18#ibcon#enter sib2, iclass 25, count 0 2006.229.22:01:19.18#ibcon#flushed, iclass 25, count 0 2006.229.22:01:19.18#ibcon#about to write, iclass 25, count 0 2006.229.22:01:19.18#ibcon#wrote, iclass 25, count 0 2006.229.22:01:19.18#ibcon#about to read 3, iclass 25, count 0 2006.229.22:01:19.21#ibcon#read 3, iclass 25, count 0 2006.229.22:01:19.21#ibcon#about to read 4, iclass 25, count 0 2006.229.22:01:19.21#ibcon#read 4, iclass 25, count 0 2006.229.22:01:19.21#ibcon#about to read 5, iclass 25, count 0 2006.229.22:01:19.21#ibcon#read 5, iclass 25, count 0 2006.229.22:01:19.21#ibcon#about to read 6, iclass 25, count 0 2006.229.22:01:19.21#ibcon#read 6, iclass 25, count 0 2006.229.22:01:19.21#ibcon#end of sib2, iclass 25, count 0 2006.229.22:01:19.21#ibcon#*after write, iclass 25, count 0 2006.229.22:01:19.21#ibcon#*before return 0, iclass 25, count 0 2006.229.22:01:19.21#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:19.21#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:01:19.21#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:01:19.21#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:01:19.21$vck44/vblo=8,744.99 2006.229.22:01:19.21#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.22:01:19.21#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.22:01:19.21#ibcon#ireg 17 cls_cnt 0 2006.229.22:01:19.21#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:19.21#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:19.21#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:19.21#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:01:19.21#ibcon#first serial, iclass 27, count 0 2006.229.22:01:19.21#ibcon#enter sib2, iclass 27, count 0 2006.229.22:01:19.21#ibcon#flushed, iclass 27, count 0 2006.229.22:01:19.21#ibcon#about to write, iclass 27, count 0 2006.229.22:01:19.21#ibcon#wrote, iclass 27, count 0 2006.229.22:01:19.21#ibcon#about to read 3, iclass 27, count 0 2006.229.22:01:19.23#ibcon#read 3, iclass 27, count 0 2006.229.22:01:19.23#ibcon#about to read 4, iclass 27, count 0 2006.229.22:01:19.23#ibcon#read 4, iclass 27, count 0 2006.229.22:01:19.23#ibcon#about to read 5, iclass 27, count 0 2006.229.22:01:19.23#ibcon#read 5, iclass 27, count 0 2006.229.22:01:19.23#ibcon#about to read 6, iclass 27, count 0 2006.229.22:01:19.23#ibcon#read 6, iclass 27, count 0 2006.229.22:01:19.23#ibcon#end of sib2, iclass 27, count 0 2006.229.22:01:19.23#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:01:19.23#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:01:19.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:01:19.23#ibcon#*before write, iclass 27, count 0 2006.229.22:01:19.23#ibcon#enter sib2, iclass 27, count 0 2006.229.22:01:19.23#ibcon#flushed, iclass 27, count 0 2006.229.22:01:19.23#ibcon#about to write, iclass 27, count 0 2006.229.22:01:19.23#ibcon#wrote, iclass 27, count 0 2006.229.22:01:19.23#ibcon#about to read 3, iclass 27, count 0 2006.229.22:01:19.27#ibcon#read 3, iclass 27, count 0 2006.229.22:01:19.27#ibcon#about to read 4, iclass 27, count 0 2006.229.22:01:19.27#ibcon#read 4, iclass 27, count 0 2006.229.22:01:19.27#ibcon#about to read 5, iclass 27, count 0 2006.229.22:01:19.27#ibcon#read 5, iclass 27, count 0 2006.229.22:01:19.27#ibcon#about to read 6, iclass 27, count 0 2006.229.22:01:19.27#ibcon#read 6, iclass 27, count 0 2006.229.22:01:19.27#ibcon#end of sib2, iclass 27, count 0 2006.229.22:01:19.27#ibcon#*after write, iclass 27, count 0 2006.229.22:01:19.27#ibcon#*before return 0, iclass 27, count 0 2006.229.22:01:19.27#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:19.27#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:01:19.27#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:01:19.27#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:01:19.27$vck44/vb=8,4 2006.229.22:01:19.27#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.22:01:19.27#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.22:01:19.27#ibcon#ireg 11 cls_cnt 2 2006.229.22:01:19.27#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:19.33#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:19.33#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:19.33#ibcon#enter wrdev, iclass 29, count 2 2006.229.22:01:19.33#ibcon#first serial, iclass 29, count 2 2006.229.22:01:19.33#ibcon#enter sib2, iclass 29, count 2 2006.229.22:01:19.33#ibcon#flushed, iclass 29, count 2 2006.229.22:01:19.33#ibcon#about to write, iclass 29, count 2 2006.229.22:01:19.33#ibcon#wrote, iclass 29, count 2 2006.229.22:01:19.33#ibcon#about to read 3, iclass 29, count 2 2006.229.22:01:19.35#ibcon#read 3, iclass 29, count 2 2006.229.22:01:19.35#ibcon#about to read 4, iclass 29, count 2 2006.229.22:01:19.35#ibcon#read 4, iclass 29, count 2 2006.229.22:01:19.35#ibcon#about to read 5, iclass 29, count 2 2006.229.22:01:19.35#ibcon#read 5, iclass 29, count 2 2006.229.22:01:19.35#ibcon#about to read 6, iclass 29, count 2 2006.229.22:01:19.35#ibcon#read 6, iclass 29, count 2 2006.229.22:01:19.35#ibcon#end of sib2, iclass 29, count 2 2006.229.22:01:19.35#ibcon#*mode == 0, iclass 29, count 2 2006.229.22:01:19.35#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.22:01:19.35#ibcon#[27=AT08-04\r\n] 2006.229.22:01:19.35#ibcon#*before write, iclass 29, count 2 2006.229.22:01:19.35#ibcon#enter sib2, iclass 29, count 2 2006.229.22:01:19.35#ibcon#flushed, iclass 29, count 2 2006.229.22:01:19.35#ibcon#about to write, iclass 29, count 2 2006.229.22:01:19.35#ibcon#wrote, iclass 29, count 2 2006.229.22:01:19.35#ibcon#about to read 3, iclass 29, count 2 2006.229.22:01:19.38#ibcon#read 3, iclass 29, count 2 2006.229.22:01:19.38#ibcon#about to read 4, iclass 29, count 2 2006.229.22:01:19.38#ibcon#read 4, iclass 29, count 2 2006.229.22:01:19.38#ibcon#about to read 5, iclass 29, count 2 2006.229.22:01:19.38#ibcon#read 5, iclass 29, count 2 2006.229.22:01:19.38#ibcon#about to read 6, iclass 29, count 2 2006.229.22:01:19.38#ibcon#read 6, iclass 29, count 2 2006.229.22:01:19.38#ibcon#end of sib2, iclass 29, count 2 2006.229.22:01:19.38#ibcon#*after write, iclass 29, count 2 2006.229.22:01:19.38#ibcon#*before return 0, iclass 29, count 2 2006.229.22:01:19.38#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:19.38#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:01:19.38#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.22:01:19.38#ibcon#ireg 7 cls_cnt 0 2006.229.22:01:19.38#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:19.50#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:19.50#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:19.50#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:01:19.50#ibcon#first serial, iclass 29, count 0 2006.229.22:01:19.50#ibcon#enter sib2, iclass 29, count 0 2006.229.22:01:19.50#ibcon#flushed, iclass 29, count 0 2006.229.22:01:19.50#ibcon#about to write, iclass 29, count 0 2006.229.22:01:19.50#ibcon#wrote, iclass 29, count 0 2006.229.22:01:19.50#ibcon#about to read 3, iclass 29, count 0 2006.229.22:01:19.52#ibcon#read 3, iclass 29, count 0 2006.229.22:01:19.52#ibcon#about to read 4, iclass 29, count 0 2006.229.22:01:19.52#ibcon#read 4, iclass 29, count 0 2006.229.22:01:19.52#ibcon#about to read 5, iclass 29, count 0 2006.229.22:01:19.52#ibcon#read 5, iclass 29, count 0 2006.229.22:01:19.52#ibcon#about to read 6, iclass 29, count 0 2006.229.22:01:19.52#ibcon#read 6, iclass 29, count 0 2006.229.22:01:19.52#ibcon#end of sib2, iclass 29, count 0 2006.229.22:01:19.52#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:01:19.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:01:19.52#ibcon#[27=USB\r\n] 2006.229.22:01:19.52#ibcon#*before write, iclass 29, count 0 2006.229.22:01:19.52#ibcon#enter sib2, iclass 29, count 0 2006.229.22:01:19.52#ibcon#flushed, iclass 29, count 0 2006.229.22:01:19.52#ibcon#about to write, iclass 29, count 0 2006.229.22:01:19.52#ibcon#wrote, iclass 29, count 0 2006.229.22:01:19.52#ibcon#about to read 3, iclass 29, count 0 2006.229.22:01:19.55#ibcon#read 3, iclass 29, count 0 2006.229.22:01:19.55#ibcon#about to read 4, iclass 29, count 0 2006.229.22:01:19.55#ibcon#read 4, iclass 29, count 0 2006.229.22:01:19.55#ibcon#about to read 5, iclass 29, count 0 2006.229.22:01:19.55#ibcon#read 5, iclass 29, count 0 2006.229.22:01:19.55#ibcon#about to read 6, iclass 29, count 0 2006.229.22:01:19.55#ibcon#read 6, iclass 29, count 0 2006.229.22:01:19.55#ibcon#end of sib2, iclass 29, count 0 2006.229.22:01:19.55#ibcon#*after write, iclass 29, count 0 2006.229.22:01:19.55#ibcon#*before return 0, iclass 29, count 0 2006.229.22:01:19.55#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:19.55#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:01:19.55#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:01:19.55#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:01:19.55$vck44/vabw=wide 2006.229.22:01:19.55#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:01:19.55#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:01:19.55#ibcon#ireg 8 cls_cnt 0 2006.229.22:01:19.55#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:19.55#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:19.55#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:19.55#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:01:19.55#ibcon#first serial, iclass 31, count 0 2006.229.22:01:19.55#ibcon#enter sib2, iclass 31, count 0 2006.229.22:01:19.55#ibcon#flushed, iclass 31, count 0 2006.229.22:01:19.55#ibcon#about to write, iclass 31, count 0 2006.229.22:01:19.55#ibcon#wrote, iclass 31, count 0 2006.229.22:01:19.55#ibcon#about to read 3, iclass 31, count 0 2006.229.22:01:19.57#ibcon#read 3, iclass 31, count 0 2006.229.22:01:19.57#ibcon#about to read 4, iclass 31, count 0 2006.229.22:01:19.57#ibcon#read 4, iclass 31, count 0 2006.229.22:01:19.57#ibcon#about to read 5, iclass 31, count 0 2006.229.22:01:19.57#ibcon#read 5, iclass 31, count 0 2006.229.22:01:19.57#ibcon#about to read 6, iclass 31, count 0 2006.229.22:01:19.57#ibcon#read 6, iclass 31, count 0 2006.229.22:01:19.57#ibcon#end of sib2, iclass 31, count 0 2006.229.22:01:19.57#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:01:19.57#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:01:19.57#ibcon#[25=BW32\r\n] 2006.229.22:01:19.57#ibcon#*before write, iclass 31, count 0 2006.229.22:01:19.57#ibcon#enter sib2, iclass 31, count 0 2006.229.22:01:19.57#ibcon#flushed, iclass 31, count 0 2006.229.22:01:19.57#ibcon#about to write, iclass 31, count 0 2006.229.22:01:19.57#ibcon#wrote, iclass 31, count 0 2006.229.22:01:19.57#ibcon#about to read 3, iclass 31, count 0 2006.229.22:01:19.60#ibcon#read 3, iclass 31, count 0 2006.229.22:01:19.60#ibcon#about to read 4, iclass 31, count 0 2006.229.22:01:19.60#ibcon#read 4, iclass 31, count 0 2006.229.22:01:19.60#ibcon#about to read 5, iclass 31, count 0 2006.229.22:01:19.60#ibcon#read 5, iclass 31, count 0 2006.229.22:01:19.60#ibcon#about to read 6, iclass 31, count 0 2006.229.22:01:19.60#ibcon#read 6, iclass 31, count 0 2006.229.22:01:19.60#ibcon#end of sib2, iclass 31, count 0 2006.229.22:01:19.60#ibcon#*after write, iclass 31, count 0 2006.229.22:01:19.60#ibcon#*before return 0, iclass 31, count 0 2006.229.22:01:19.60#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:19.60#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:01:19.60#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:01:19.60#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:01:19.60$vck44/vbbw=wide 2006.229.22:01:19.60#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.22:01:19.60#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.22:01:19.60#ibcon#ireg 8 cls_cnt 0 2006.229.22:01:19.60#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:01:19.67#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:01:19.67#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:01:19.67#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:01:19.67#ibcon#first serial, iclass 33, count 0 2006.229.22:01:19.67#ibcon#enter sib2, iclass 33, count 0 2006.229.22:01:19.67#ibcon#flushed, iclass 33, count 0 2006.229.22:01:19.67#ibcon#about to write, iclass 33, count 0 2006.229.22:01:19.67#ibcon#wrote, iclass 33, count 0 2006.229.22:01:19.67#ibcon#about to read 3, iclass 33, count 0 2006.229.22:01:19.69#ibcon#read 3, iclass 33, count 0 2006.229.22:01:19.69#ibcon#about to read 4, iclass 33, count 0 2006.229.22:01:19.69#ibcon#read 4, iclass 33, count 0 2006.229.22:01:19.69#ibcon#about to read 5, iclass 33, count 0 2006.229.22:01:19.69#ibcon#read 5, iclass 33, count 0 2006.229.22:01:19.69#ibcon#about to read 6, iclass 33, count 0 2006.229.22:01:19.69#ibcon#read 6, iclass 33, count 0 2006.229.22:01:19.69#ibcon#end of sib2, iclass 33, count 0 2006.229.22:01:19.69#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:01:19.69#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:01:19.69#ibcon#[27=BW32\r\n] 2006.229.22:01:19.69#ibcon#*before write, iclass 33, count 0 2006.229.22:01:19.69#ibcon#enter sib2, iclass 33, count 0 2006.229.22:01:19.69#ibcon#flushed, iclass 33, count 0 2006.229.22:01:19.69#ibcon#about to write, iclass 33, count 0 2006.229.22:01:19.69#ibcon#wrote, iclass 33, count 0 2006.229.22:01:19.69#ibcon#about to read 3, iclass 33, count 0 2006.229.22:01:19.72#ibcon#read 3, iclass 33, count 0 2006.229.22:01:19.72#ibcon#about to read 4, iclass 33, count 0 2006.229.22:01:19.72#ibcon#read 4, iclass 33, count 0 2006.229.22:01:19.72#ibcon#about to read 5, iclass 33, count 0 2006.229.22:01:19.72#ibcon#read 5, iclass 33, count 0 2006.229.22:01:19.72#ibcon#about to read 6, iclass 33, count 0 2006.229.22:01:19.72#ibcon#read 6, iclass 33, count 0 2006.229.22:01:19.72#ibcon#end of sib2, iclass 33, count 0 2006.229.22:01:19.72#ibcon#*after write, iclass 33, count 0 2006.229.22:01:19.72#ibcon#*before return 0, iclass 33, count 0 2006.229.22:01:19.72#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:01:19.72#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:01:19.72#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:01:19.72#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:01:19.72$setupk4/ifdk4 2006.229.22:01:19.72$ifdk4/lo= 2006.229.22:01:19.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:01:19.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:01:19.72$ifdk4/patch= 2006.229.22:01:19.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:01:19.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:01:19.72$setupk4/!*+20s 2006.229.22:01:20.15#abcon#<5=/08 1.1 3.2 27.98 951002.3\r\n> 2006.229.22:01:20.17#abcon#{5=INTERFACE CLEAR} 2006.229.22:01:20.23#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:01:30.32#abcon#<5=/08 1.1 3.1 27.98 951002.3\r\n> 2006.229.22:01:30.34#abcon#{5=INTERFACE CLEAR} 2006.229.22:01:30.40#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:01:34.23$setupk4/"tpicd 2006.229.22:01:34.23$setupk4/echo=off 2006.229.22:01:34.23$setupk4/xlog=off 2006.229.22:01:34.23:!2006.229.22:07:55 2006.229.22:01:44.14#trakl#Source acquired 2006.229.22:01:46.14#flagr#flagr/antenna,acquired 2006.229.22:07:55.00:preob 2006.229.22:07:56.14/onsource/TRACKING 2006.229.22:07:56.14:!2006.229.22:08:05 2006.229.22:08:05.00:"tape 2006.229.22:08:05.00:"st=record 2006.229.22:08:05.00:data_valid=on 2006.229.22:08:05.00:midob 2006.229.22:08:05.14/onsource/TRACKING 2006.229.22:08:05.14/wx/28.15,1002.4,95 2006.229.22:08:05.22/cable/+6.4184E-03 2006.229.22:08:06.31/va/01,08,usb,yes,30,32 2006.229.22:08:06.31/va/02,07,usb,yes,32,33 2006.229.22:08:06.31/va/03,06,usb,yes,40,43 2006.229.22:08:06.31/va/04,07,usb,yes,33,35 2006.229.22:08:06.31/va/05,04,usb,yes,30,30 2006.229.22:08:06.31/va/06,04,usb,yes,33,33 2006.229.22:08:06.31/va/07,05,usb,yes,29,30 2006.229.22:08:06.31/va/08,06,usb,yes,21,26 2006.229.22:08:06.54/valo/01,524.99,yes,locked 2006.229.22:08:06.54/valo/02,534.99,yes,locked 2006.229.22:08:06.54/valo/03,564.99,yes,locked 2006.229.22:08:06.54/valo/04,624.99,yes,locked 2006.229.22:08:06.54/valo/05,734.99,yes,locked 2006.229.22:08:06.54/valo/06,814.99,yes,locked 2006.229.22:08:06.54/valo/07,864.99,yes,locked 2006.229.22:08:06.54/valo/08,884.99,yes,locked 2006.229.22:08:07.63/vb/01,04,usb,yes,31,29 2006.229.22:08:07.63/vb/02,04,usb,yes,34,34 2006.229.22:08:07.63/vb/03,04,usb,yes,31,34 2006.229.22:08:07.63/vb/04,04,usb,yes,35,34 2006.229.22:08:07.63/vb/05,04,usb,yes,27,30 2006.229.22:08:07.63/vb/06,04,usb,yes,32,28 2006.229.22:08:07.63/vb/07,04,usb,yes,32,32 2006.229.22:08:07.63/vb/08,04,usb,yes,29,33 2006.229.22:08:07.86/vblo/01,629.99,yes,locked 2006.229.22:08:07.86/vblo/02,634.99,yes,locked 2006.229.22:08:07.86/vblo/03,649.99,yes,locked 2006.229.22:08:07.86/vblo/04,679.99,yes,locked 2006.229.22:08:07.86/vblo/05,709.99,yes,locked 2006.229.22:08:07.86/vblo/06,719.99,yes,locked 2006.229.22:08:07.86/vblo/07,734.99,yes,locked 2006.229.22:08:07.86/vblo/08,744.99,yes,locked 2006.229.22:08:08.01/vabw/8 2006.229.22:08:08.16/vbbw/8 2006.229.22:08:08.25/xfe/off,on,12.0 2006.229.22:08:08.64/ifatt/23,28,28,28 2006.229.22:08:09.07/fmout-gps/S +4.62E-07 2006.229.22:08:09.11:!2006.229.22:09:15 2006.229.22:09:15.01:data_valid=off 2006.229.22:09:15.01:"et 2006.229.22:09:15.01:!+3s 2006.229.22:09:18.02:"tape 2006.229.22:09:18.02:postob 2006.229.22:09:18.13/cable/+6.4179E-03 2006.229.22:09:18.13/wx/28.17,1002.3,94 2006.229.22:09:18.19/fmout-gps/S +4.63E-07 2006.229.22:09:18.19:scan_name=229-2211,jd0608,100 2006.229.22:09:18.19:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.22:09:20.14#flagr#flagr/antenna,new-source 2006.229.22:09:20.14:checkk5 2006.229.22:09:20.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:09:20.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:09:21.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:09:21.69/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:09:22.08/chk_obsdata//k5ts1/T2292208??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:09:22.48/chk_obsdata//k5ts2/T2292208??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:09:22.88/chk_obsdata//k5ts3/T2292208??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:09:23.30/chk_obsdata//k5ts4/T2292208??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:09:24.03/k5log//k5ts1_log_newline 2006.229.22:09:24.76/k5log//k5ts2_log_newline 2006.229.22:09:25.48/k5log//k5ts3_log_newline 2006.229.22:09:26.20/k5log//k5ts4_log_newline 2006.229.22:09:26.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:09:26.23:setupk4=1 2006.229.22:09:26.23$setupk4/echo=on 2006.229.22:09:26.23$setupk4/pcalon 2006.229.22:09:26.23$pcalon/"no phase cal control is implemented here 2006.229.22:09:26.23$setupk4/"tpicd=stop 2006.229.22:09:26.23$setupk4/"rec=synch_on 2006.229.22:09:26.23$setupk4/"rec_mode=128 2006.229.22:09:26.23$setupk4/!* 2006.229.22:09:26.23$setupk4/recpk4 2006.229.22:09:26.23$recpk4/recpatch= 2006.229.22:09:26.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:09:26.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:09:26.23$setupk4/vck44 2006.229.22:09:26.23$vck44/valo=1,524.99 2006.229.22:09:26.23#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:09:26.23#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:09:26.23#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:26.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:26.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:26.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:26.23#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:09:26.23#ibcon#first serial, iclass 14, count 0 2006.229.22:09:26.23#ibcon#enter sib2, iclass 14, count 0 2006.229.22:09:26.23#ibcon#flushed, iclass 14, count 0 2006.229.22:09:26.23#ibcon#about to write, iclass 14, count 0 2006.229.22:09:26.23#ibcon#wrote, iclass 14, count 0 2006.229.22:09:26.23#ibcon#about to read 3, iclass 14, count 0 2006.229.22:09:26.25#ibcon#read 3, iclass 14, count 0 2006.229.22:09:26.25#ibcon#about to read 4, iclass 14, count 0 2006.229.22:09:26.25#ibcon#read 4, iclass 14, count 0 2006.229.22:09:26.25#ibcon#about to read 5, iclass 14, count 0 2006.229.22:09:26.25#ibcon#read 5, iclass 14, count 0 2006.229.22:09:26.25#ibcon#about to read 6, iclass 14, count 0 2006.229.22:09:26.25#ibcon#read 6, iclass 14, count 0 2006.229.22:09:26.25#ibcon#end of sib2, iclass 14, count 0 2006.229.22:09:26.25#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:09:26.25#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:09:26.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:09:26.25#ibcon#*before write, iclass 14, count 0 2006.229.22:09:26.25#ibcon#enter sib2, iclass 14, count 0 2006.229.22:09:26.25#ibcon#flushed, iclass 14, count 0 2006.229.22:09:26.25#ibcon#about to write, iclass 14, count 0 2006.229.22:09:26.25#ibcon#wrote, iclass 14, count 0 2006.229.22:09:26.25#ibcon#about to read 3, iclass 14, count 0 2006.229.22:09:26.30#ibcon#read 3, iclass 14, count 0 2006.229.22:09:26.30#ibcon#about to read 4, iclass 14, count 0 2006.229.22:09:26.30#ibcon#read 4, iclass 14, count 0 2006.229.22:09:26.30#ibcon#about to read 5, iclass 14, count 0 2006.229.22:09:26.30#ibcon#read 5, iclass 14, count 0 2006.229.22:09:26.30#ibcon#about to read 6, iclass 14, count 0 2006.229.22:09:26.30#ibcon#read 6, iclass 14, count 0 2006.229.22:09:26.30#ibcon#end of sib2, iclass 14, count 0 2006.229.22:09:26.30#ibcon#*after write, iclass 14, count 0 2006.229.22:09:26.30#ibcon#*before return 0, iclass 14, count 0 2006.229.22:09:26.30#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:26.30#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:26.30#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:09:26.30#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:09:26.30$vck44/va=1,8 2006.229.22:09:26.30#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.22:09:26.30#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.22:09:26.30#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:26.30#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:26.30#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:26.30#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:26.30#ibcon#enter wrdev, iclass 16, count 2 2006.229.22:09:26.30#ibcon#first serial, iclass 16, count 2 2006.229.22:09:26.30#ibcon#enter sib2, iclass 16, count 2 2006.229.22:09:26.30#ibcon#flushed, iclass 16, count 2 2006.229.22:09:26.30#ibcon#about to write, iclass 16, count 2 2006.229.22:09:26.30#ibcon#wrote, iclass 16, count 2 2006.229.22:09:26.30#ibcon#about to read 3, iclass 16, count 2 2006.229.22:09:26.32#ibcon#read 3, iclass 16, count 2 2006.229.22:09:26.32#ibcon#about to read 4, iclass 16, count 2 2006.229.22:09:26.32#ibcon#read 4, iclass 16, count 2 2006.229.22:09:26.32#ibcon#about to read 5, iclass 16, count 2 2006.229.22:09:26.32#ibcon#read 5, iclass 16, count 2 2006.229.22:09:26.32#ibcon#about to read 6, iclass 16, count 2 2006.229.22:09:26.32#ibcon#read 6, iclass 16, count 2 2006.229.22:09:26.32#ibcon#end of sib2, iclass 16, count 2 2006.229.22:09:26.32#ibcon#*mode == 0, iclass 16, count 2 2006.229.22:09:26.32#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.22:09:26.32#ibcon#[25=AT01-08\r\n] 2006.229.22:09:26.32#ibcon#*before write, iclass 16, count 2 2006.229.22:09:26.32#ibcon#enter sib2, iclass 16, count 2 2006.229.22:09:26.32#ibcon#flushed, iclass 16, count 2 2006.229.22:09:26.32#ibcon#about to write, iclass 16, count 2 2006.229.22:09:26.32#ibcon#wrote, iclass 16, count 2 2006.229.22:09:26.32#ibcon#about to read 3, iclass 16, count 2 2006.229.22:09:26.35#ibcon#read 3, iclass 16, count 2 2006.229.22:09:26.35#ibcon#about to read 4, iclass 16, count 2 2006.229.22:09:26.35#ibcon#read 4, iclass 16, count 2 2006.229.22:09:26.35#ibcon#about to read 5, iclass 16, count 2 2006.229.22:09:26.35#ibcon#read 5, iclass 16, count 2 2006.229.22:09:26.35#ibcon#about to read 6, iclass 16, count 2 2006.229.22:09:26.35#ibcon#read 6, iclass 16, count 2 2006.229.22:09:26.35#ibcon#end of sib2, iclass 16, count 2 2006.229.22:09:26.35#ibcon#*after write, iclass 16, count 2 2006.229.22:09:26.35#ibcon#*before return 0, iclass 16, count 2 2006.229.22:09:26.35#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:26.35#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:26.35#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.22:09:26.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:26.35#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:26.47#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:26.47#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:26.47#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:09:26.47#ibcon#first serial, iclass 16, count 0 2006.229.22:09:26.47#ibcon#enter sib2, iclass 16, count 0 2006.229.22:09:26.47#ibcon#flushed, iclass 16, count 0 2006.229.22:09:26.47#ibcon#about to write, iclass 16, count 0 2006.229.22:09:26.47#ibcon#wrote, iclass 16, count 0 2006.229.22:09:26.47#ibcon#about to read 3, iclass 16, count 0 2006.229.22:09:26.49#ibcon#read 3, iclass 16, count 0 2006.229.22:09:26.49#ibcon#about to read 4, iclass 16, count 0 2006.229.22:09:26.49#ibcon#read 4, iclass 16, count 0 2006.229.22:09:26.49#ibcon#about to read 5, iclass 16, count 0 2006.229.22:09:26.49#ibcon#read 5, iclass 16, count 0 2006.229.22:09:26.49#ibcon#about to read 6, iclass 16, count 0 2006.229.22:09:26.49#ibcon#read 6, iclass 16, count 0 2006.229.22:09:26.49#ibcon#end of sib2, iclass 16, count 0 2006.229.22:09:26.49#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:09:26.49#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:09:26.49#ibcon#[25=USB\r\n] 2006.229.22:09:26.49#ibcon#*before write, iclass 16, count 0 2006.229.22:09:26.49#ibcon#enter sib2, iclass 16, count 0 2006.229.22:09:26.49#ibcon#flushed, iclass 16, count 0 2006.229.22:09:26.49#ibcon#about to write, iclass 16, count 0 2006.229.22:09:26.49#ibcon#wrote, iclass 16, count 0 2006.229.22:09:26.49#ibcon#about to read 3, iclass 16, count 0 2006.229.22:09:26.52#ibcon#read 3, iclass 16, count 0 2006.229.22:09:26.52#ibcon#about to read 4, iclass 16, count 0 2006.229.22:09:26.52#ibcon#read 4, iclass 16, count 0 2006.229.22:09:26.52#ibcon#about to read 5, iclass 16, count 0 2006.229.22:09:26.52#ibcon#read 5, iclass 16, count 0 2006.229.22:09:26.52#ibcon#about to read 6, iclass 16, count 0 2006.229.22:09:26.52#ibcon#read 6, iclass 16, count 0 2006.229.22:09:26.52#ibcon#end of sib2, iclass 16, count 0 2006.229.22:09:26.52#ibcon#*after write, iclass 16, count 0 2006.229.22:09:26.52#ibcon#*before return 0, iclass 16, count 0 2006.229.22:09:26.52#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:26.52#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:26.52#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:09:26.52#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:09:26.52$vck44/valo=2,534.99 2006.229.22:09:26.52#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:09:26.52#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:09:26.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:26.52#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:26.52#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:26.52#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:26.52#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:09:26.52#ibcon#first serial, iclass 18, count 0 2006.229.22:09:26.52#ibcon#enter sib2, iclass 18, count 0 2006.229.22:09:26.52#ibcon#flushed, iclass 18, count 0 2006.229.22:09:26.52#ibcon#about to write, iclass 18, count 0 2006.229.22:09:26.52#ibcon#wrote, iclass 18, count 0 2006.229.22:09:26.52#ibcon#about to read 3, iclass 18, count 0 2006.229.22:09:26.54#ibcon#read 3, iclass 18, count 0 2006.229.22:09:26.54#ibcon#about to read 4, iclass 18, count 0 2006.229.22:09:26.54#ibcon#read 4, iclass 18, count 0 2006.229.22:09:26.54#ibcon#about to read 5, iclass 18, count 0 2006.229.22:09:26.54#ibcon#read 5, iclass 18, count 0 2006.229.22:09:26.54#ibcon#about to read 6, iclass 18, count 0 2006.229.22:09:26.54#ibcon#read 6, iclass 18, count 0 2006.229.22:09:26.54#ibcon#end of sib2, iclass 18, count 0 2006.229.22:09:26.54#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:09:26.54#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:09:26.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:09:26.54#ibcon#*before write, iclass 18, count 0 2006.229.22:09:26.54#ibcon#enter sib2, iclass 18, count 0 2006.229.22:09:26.54#ibcon#flushed, iclass 18, count 0 2006.229.22:09:26.54#ibcon#about to write, iclass 18, count 0 2006.229.22:09:26.54#ibcon#wrote, iclass 18, count 0 2006.229.22:09:26.54#ibcon#about to read 3, iclass 18, count 0 2006.229.22:09:26.58#ibcon#read 3, iclass 18, count 0 2006.229.22:09:26.58#ibcon#about to read 4, iclass 18, count 0 2006.229.22:09:26.58#ibcon#read 4, iclass 18, count 0 2006.229.22:09:26.58#ibcon#about to read 5, iclass 18, count 0 2006.229.22:09:26.58#ibcon#read 5, iclass 18, count 0 2006.229.22:09:26.58#ibcon#about to read 6, iclass 18, count 0 2006.229.22:09:26.58#ibcon#read 6, iclass 18, count 0 2006.229.22:09:26.58#ibcon#end of sib2, iclass 18, count 0 2006.229.22:09:26.58#ibcon#*after write, iclass 18, count 0 2006.229.22:09:26.58#ibcon#*before return 0, iclass 18, count 0 2006.229.22:09:26.58#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:26.58#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:26.58#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:09:26.58#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:09:26.58$vck44/va=2,7 2006.229.22:09:26.58#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.22:09:26.58#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.22:09:26.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:26.58#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:26.64#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:26.64#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:26.64#ibcon#enter wrdev, iclass 20, count 2 2006.229.22:09:26.64#ibcon#first serial, iclass 20, count 2 2006.229.22:09:26.64#ibcon#enter sib2, iclass 20, count 2 2006.229.22:09:26.64#ibcon#flushed, iclass 20, count 2 2006.229.22:09:26.64#ibcon#about to write, iclass 20, count 2 2006.229.22:09:26.64#ibcon#wrote, iclass 20, count 2 2006.229.22:09:26.64#ibcon#about to read 3, iclass 20, count 2 2006.229.22:09:26.66#ibcon#read 3, iclass 20, count 2 2006.229.22:09:26.66#ibcon#about to read 4, iclass 20, count 2 2006.229.22:09:26.66#ibcon#read 4, iclass 20, count 2 2006.229.22:09:26.66#ibcon#about to read 5, iclass 20, count 2 2006.229.22:09:26.66#ibcon#read 5, iclass 20, count 2 2006.229.22:09:26.66#ibcon#about to read 6, iclass 20, count 2 2006.229.22:09:26.66#ibcon#read 6, iclass 20, count 2 2006.229.22:09:26.66#ibcon#end of sib2, iclass 20, count 2 2006.229.22:09:26.66#ibcon#*mode == 0, iclass 20, count 2 2006.229.22:09:26.66#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.22:09:26.66#ibcon#[25=AT02-07\r\n] 2006.229.22:09:26.66#ibcon#*before write, iclass 20, count 2 2006.229.22:09:26.66#ibcon#enter sib2, iclass 20, count 2 2006.229.22:09:26.66#ibcon#flushed, iclass 20, count 2 2006.229.22:09:26.66#ibcon#about to write, iclass 20, count 2 2006.229.22:09:26.66#ibcon#wrote, iclass 20, count 2 2006.229.22:09:26.66#ibcon#about to read 3, iclass 20, count 2 2006.229.22:09:26.69#ibcon#read 3, iclass 20, count 2 2006.229.22:09:26.69#ibcon#about to read 4, iclass 20, count 2 2006.229.22:09:26.69#ibcon#read 4, iclass 20, count 2 2006.229.22:09:26.69#ibcon#about to read 5, iclass 20, count 2 2006.229.22:09:26.69#ibcon#read 5, iclass 20, count 2 2006.229.22:09:26.69#ibcon#about to read 6, iclass 20, count 2 2006.229.22:09:26.69#ibcon#read 6, iclass 20, count 2 2006.229.22:09:26.69#ibcon#end of sib2, iclass 20, count 2 2006.229.22:09:26.69#ibcon#*after write, iclass 20, count 2 2006.229.22:09:26.69#ibcon#*before return 0, iclass 20, count 2 2006.229.22:09:26.69#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:26.69#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:26.69#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.22:09:26.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:26.69#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:26.81#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:26.81#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:26.81#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:09:26.81#ibcon#first serial, iclass 20, count 0 2006.229.22:09:26.81#ibcon#enter sib2, iclass 20, count 0 2006.229.22:09:26.81#ibcon#flushed, iclass 20, count 0 2006.229.22:09:26.81#ibcon#about to write, iclass 20, count 0 2006.229.22:09:26.81#ibcon#wrote, iclass 20, count 0 2006.229.22:09:26.81#ibcon#about to read 3, iclass 20, count 0 2006.229.22:09:26.83#ibcon#read 3, iclass 20, count 0 2006.229.22:09:26.83#ibcon#about to read 4, iclass 20, count 0 2006.229.22:09:26.83#ibcon#read 4, iclass 20, count 0 2006.229.22:09:26.83#ibcon#about to read 5, iclass 20, count 0 2006.229.22:09:26.83#ibcon#read 5, iclass 20, count 0 2006.229.22:09:26.83#ibcon#about to read 6, iclass 20, count 0 2006.229.22:09:26.83#ibcon#read 6, iclass 20, count 0 2006.229.22:09:26.83#ibcon#end of sib2, iclass 20, count 0 2006.229.22:09:26.83#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:09:26.83#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:09:26.83#ibcon#[25=USB\r\n] 2006.229.22:09:26.83#ibcon#*before write, iclass 20, count 0 2006.229.22:09:26.83#ibcon#enter sib2, iclass 20, count 0 2006.229.22:09:26.83#ibcon#flushed, iclass 20, count 0 2006.229.22:09:26.83#ibcon#about to write, iclass 20, count 0 2006.229.22:09:26.83#ibcon#wrote, iclass 20, count 0 2006.229.22:09:26.83#ibcon#about to read 3, iclass 20, count 0 2006.229.22:09:26.86#ibcon#read 3, iclass 20, count 0 2006.229.22:09:26.86#ibcon#about to read 4, iclass 20, count 0 2006.229.22:09:26.86#ibcon#read 4, iclass 20, count 0 2006.229.22:09:26.86#ibcon#about to read 5, iclass 20, count 0 2006.229.22:09:26.86#ibcon#read 5, iclass 20, count 0 2006.229.22:09:26.86#ibcon#about to read 6, iclass 20, count 0 2006.229.22:09:26.86#ibcon#read 6, iclass 20, count 0 2006.229.22:09:26.86#ibcon#end of sib2, iclass 20, count 0 2006.229.22:09:26.86#ibcon#*after write, iclass 20, count 0 2006.229.22:09:26.86#ibcon#*before return 0, iclass 20, count 0 2006.229.22:09:26.86#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:26.86#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:26.86#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:09:26.86#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:09:26.86$vck44/valo=3,564.99 2006.229.22:09:26.86#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.22:09:26.86#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.22:09:26.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:26.86#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:26.86#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:26.86#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:26.86#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:09:26.86#ibcon#first serial, iclass 22, count 0 2006.229.22:09:26.86#ibcon#enter sib2, iclass 22, count 0 2006.229.22:09:26.86#ibcon#flushed, iclass 22, count 0 2006.229.22:09:26.86#ibcon#about to write, iclass 22, count 0 2006.229.22:09:26.86#ibcon#wrote, iclass 22, count 0 2006.229.22:09:26.86#ibcon#about to read 3, iclass 22, count 0 2006.229.22:09:26.88#ibcon#read 3, iclass 22, count 0 2006.229.22:09:26.88#ibcon#about to read 4, iclass 22, count 0 2006.229.22:09:26.88#ibcon#read 4, iclass 22, count 0 2006.229.22:09:26.88#ibcon#about to read 5, iclass 22, count 0 2006.229.22:09:26.88#ibcon#read 5, iclass 22, count 0 2006.229.22:09:26.88#ibcon#about to read 6, iclass 22, count 0 2006.229.22:09:26.88#ibcon#read 6, iclass 22, count 0 2006.229.22:09:26.88#ibcon#end of sib2, iclass 22, count 0 2006.229.22:09:26.88#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:09:26.88#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:09:26.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:09:26.88#ibcon#*before write, iclass 22, count 0 2006.229.22:09:26.88#ibcon#enter sib2, iclass 22, count 0 2006.229.22:09:26.88#ibcon#flushed, iclass 22, count 0 2006.229.22:09:26.88#ibcon#about to write, iclass 22, count 0 2006.229.22:09:26.88#ibcon#wrote, iclass 22, count 0 2006.229.22:09:26.88#ibcon#about to read 3, iclass 22, count 0 2006.229.22:09:26.92#ibcon#read 3, iclass 22, count 0 2006.229.22:09:26.92#ibcon#about to read 4, iclass 22, count 0 2006.229.22:09:26.92#ibcon#read 4, iclass 22, count 0 2006.229.22:09:26.92#ibcon#about to read 5, iclass 22, count 0 2006.229.22:09:26.92#ibcon#read 5, iclass 22, count 0 2006.229.22:09:26.92#ibcon#about to read 6, iclass 22, count 0 2006.229.22:09:26.92#ibcon#read 6, iclass 22, count 0 2006.229.22:09:26.92#ibcon#end of sib2, iclass 22, count 0 2006.229.22:09:26.92#ibcon#*after write, iclass 22, count 0 2006.229.22:09:26.92#ibcon#*before return 0, iclass 22, count 0 2006.229.22:09:26.92#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:26.92#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:26.92#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:09:26.92#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:09:26.92$vck44/va=3,6 2006.229.22:09:26.92#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.22:09:26.92#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.22:09:26.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:26.92#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:26.98#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:26.98#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:26.98#ibcon#enter wrdev, iclass 24, count 2 2006.229.22:09:26.98#ibcon#first serial, iclass 24, count 2 2006.229.22:09:26.98#ibcon#enter sib2, iclass 24, count 2 2006.229.22:09:26.98#ibcon#flushed, iclass 24, count 2 2006.229.22:09:26.98#ibcon#about to write, iclass 24, count 2 2006.229.22:09:26.98#ibcon#wrote, iclass 24, count 2 2006.229.22:09:26.98#ibcon#about to read 3, iclass 24, count 2 2006.229.22:09:27.00#ibcon#read 3, iclass 24, count 2 2006.229.22:09:27.00#ibcon#about to read 4, iclass 24, count 2 2006.229.22:09:27.00#ibcon#read 4, iclass 24, count 2 2006.229.22:09:27.00#ibcon#about to read 5, iclass 24, count 2 2006.229.22:09:27.00#ibcon#read 5, iclass 24, count 2 2006.229.22:09:27.00#ibcon#about to read 6, iclass 24, count 2 2006.229.22:09:27.00#ibcon#read 6, iclass 24, count 2 2006.229.22:09:27.00#ibcon#end of sib2, iclass 24, count 2 2006.229.22:09:27.00#ibcon#*mode == 0, iclass 24, count 2 2006.229.22:09:27.00#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.22:09:27.00#ibcon#[25=AT03-06\r\n] 2006.229.22:09:27.00#ibcon#*before write, iclass 24, count 2 2006.229.22:09:27.00#ibcon#enter sib2, iclass 24, count 2 2006.229.22:09:27.00#ibcon#flushed, iclass 24, count 2 2006.229.22:09:27.00#ibcon#about to write, iclass 24, count 2 2006.229.22:09:27.00#ibcon#wrote, iclass 24, count 2 2006.229.22:09:27.00#ibcon#about to read 3, iclass 24, count 2 2006.229.22:09:27.03#ibcon#read 3, iclass 24, count 2 2006.229.22:09:27.03#ibcon#about to read 4, iclass 24, count 2 2006.229.22:09:27.03#ibcon#read 4, iclass 24, count 2 2006.229.22:09:27.03#ibcon#about to read 5, iclass 24, count 2 2006.229.22:09:27.03#ibcon#read 5, iclass 24, count 2 2006.229.22:09:27.03#ibcon#about to read 6, iclass 24, count 2 2006.229.22:09:27.03#ibcon#read 6, iclass 24, count 2 2006.229.22:09:27.03#ibcon#end of sib2, iclass 24, count 2 2006.229.22:09:27.03#ibcon#*after write, iclass 24, count 2 2006.229.22:09:27.03#ibcon#*before return 0, iclass 24, count 2 2006.229.22:09:27.03#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:27.03#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:27.03#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.22:09:27.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:27.03#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:27.15#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:27.15#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:27.15#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:09:27.15#ibcon#first serial, iclass 24, count 0 2006.229.22:09:27.15#ibcon#enter sib2, iclass 24, count 0 2006.229.22:09:27.15#ibcon#flushed, iclass 24, count 0 2006.229.22:09:27.15#ibcon#about to write, iclass 24, count 0 2006.229.22:09:27.15#ibcon#wrote, iclass 24, count 0 2006.229.22:09:27.15#ibcon#about to read 3, iclass 24, count 0 2006.229.22:09:27.17#ibcon#read 3, iclass 24, count 0 2006.229.22:09:27.17#ibcon#about to read 4, iclass 24, count 0 2006.229.22:09:27.17#ibcon#read 4, iclass 24, count 0 2006.229.22:09:27.17#ibcon#about to read 5, iclass 24, count 0 2006.229.22:09:27.17#ibcon#read 5, iclass 24, count 0 2006.229.22:09:27.17#ibcon#about to read 6, iclass 24, count 0 2006.229.22:09:27.17#ibcon#read 6, iclass 24, count 0 2006.229.22:09:27.17#ibcon#end of sib2, iclass 24, count 0 2006.229.22:09:27.17#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:09:27.17#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:09:27.17#ibcon#[25=USB\r\n] 2006.229.22:09:27.17#ibcon#*before write, iclass 24, count 0 2006.229.22:09:27.17#ibcon#enter sib2, iclass 24, count 0 2006.229.22:09:27.17#ibcon#flushed, iclass 24, count 0 2006.229.22:09:27.17#ibcon#about to write, iclass 24, count 0 2006.229.22:09:27.17#ibcon#wrote, iclass 24, count 0 2006.229.22:09:27.17#ibcon#about to read 3, iclass 24, count 0 2006.229.22:09:27.20#ibcon#read 3, iclass 24, count 0 2006.229.22:09:27.20#ibcon#about to read 4, iclass 24, count 0 2006.229.22:09:27.20#ibcon#read 4, iclass 24, count 0 2006.229.22:09:27.20#ibcon#about to read 5, iclass 24, count 0 2006.229.22:09:27.20#ibcon#read 5, iclass 24, count 0 2006.229.22:09:27.20#ibcon#about to read 6, iclass 24, count 0 2006.229.22:09:27.20#ibcon#read 6, iclass 24, count 0 2006.229.22:09:27.20#ibcon#end of sib2, iclass 24, count 0 2006.229.22:09:27.20#ibcon#*after write, iclass 24, count 0 2006.229.22:09:27.20#ibcon#*before return 0, iclass 24, count 0 2006.229.22:09:27.20#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:27.20#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:27.20#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:09:27.20#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:09:27.20$vck44/valo=4,624.99 2006.229.22:09:27.20#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.22:09:27.20#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.22:09:27.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:27.20#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:27.20#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:27.20#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:27.20#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:09:27.20#ibcon#first serial, iclass 26, count 0 2006.229.22:09:27.20#ibcon#enter sib2, iclass 26, count 0 2006.229.22:09:27.20#ibcon#flushed, iclass 26, count 0 2006.229.22:09:27.20#ibcon#about to write, iclass 26, count 0 2006.229.22:09:27.20#ibcon#wrote, iclass 26, count 0 2006.229.22:09:27.20#ibcon#about to read 3, iclass 26, count 0 2006.229.22:09:27.22#ibcon#read 3, iclass 26, count 0 2006.229.22:09:27.22#ibcon#about to read 4, iclass 26, count 0 2006.229.22:09:27.22#ibcon#read 4, iclass 26, count 0 2006.229.22:09:27.22#ibcon#about to read 5, iclass 26, count 0 2006.229.22:09:27.22#ibcon#read 5, iclass 26, count 0 2006.229.22:09:27.22#ibcon#about to read 6, iclass 26, count 0 2006.229.22:09:27.22#ibcon#read 6, iclass 26, count 0 2006.229.22:09:27.22#ibcon#end of sib2, iclass 26, count 0 2006.229.22:09:27.22#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:09:27.22#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:09:27.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:09:27.22#ibcon#*before write, iclass 26, count 0 2006.229.22:09:27.22#ibcon#enter sib2, iclass 26, count 0 2006.229.22:09:27.22#ibcon#flushed, iclass 26, count 0 2006.229.22:09:27.22#ibcon#about to write, iclass 26, count 0 2006.229.22:09:27.22#ibcon#wrote, iclass 26, count 0 2006.229.22:09:27.22#ibcon#about to read 3, iclass 26, count 0 2006.229.22:09:27.26#ibcon#read 3, iclass 26, count 0 2006.229.22:09:27.26#ibcon#about to read 4, iclass 26, count 0 2006.229.22:09:27.26#ibcon#read 4, iclass 26, count 0 2006.229.22:09:27.26#ibcon#about to read 5, iclass 26, count 0 2006.229.22:09:27.26#ibcon#read 5, iclass 26, count 0 2006.229.22:09:27.26#ibcon#about to read 6, iclass 26, count 0 2006.229.22:09:27.26#ibcon#read 6, iclass 26, count 0 2006.229.22:09:27.26#ibcon#end of sib2, iclass 26, count 0 2006.229.22:09:27.26#ibcon#*after write, iclass 26, count 0 2006.229.22:09:27.26#ibcon#*before return 0, iclass 26, count 0 2006.229.22:09:27.26#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:27.26#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:27.26#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:09:27.26#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:09:27.26$vck44/va=4,7 2006.229.22:09:27.26#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.22:09:27.26#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.22:09:27.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:27.26#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:27.32#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:27.32#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:27.32#ibcon#enter wrdev, iclass 28, count 2 2006.229.22:09:27.32#ibcon#first serial, iclass 28, count 2 2006.229.22:09:27.32#ibcon#enter sib2, iclass 28, count 2 2006.229.22:09:27.32#ibcon#flushed, iclass 28, count 2 2006.229.22:09:27.32#ibcon#about to write, iclass 28, count 2 2006.229.22:09:27.32#ibcon#wrote, iclass 28, count 2 2006.229.22:09:27.32#ibcon#about to read 3, iclass 28, count 2 2006.229.22:09:27.34#ibcon#read 3, iclass 28, count 2 2006.229.22:09:27.34#ibcon#about to read 4, iclass 28, count 2 2006.229.22:09:27.34#ibcon#read 4, iclass 28, count 2 2006.229.22:09:27.34#ibcon#about to read 5, iclass 28, count 2 2006.229.22:09:27.34#ibcon#read 5, iclass 28, count 2 2006.229.22:09:27.34#ibcon#about to read 6, iclass 28, count 2 2006.229.22:09:27.34#ibcon#read 6, iclass 28, count 2 2006.229.22:09:27.34#ibcon#end of sib2, iclass 28, count 2 2006.229.22:09:27.34#ibcon#*mode == 0, iclass 28, count 2 2006.229.22:09:27.34#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.22:09:27.34#ibcon#[25=AT04-07\r\n] 2006.229.22:09:27.34#ibcon#*before write, iclass 28, count 2 2006.229.22:09:27.34#ibcon#enter sib2, iclass 28, count 2 2006.229.22:09:27.34#ibcon#flushed, iclass 28, count 2 2006.229.22:09:27.34#ibcon#about to write, iclass 28, count 2 2006.229.22:09:27.34#ibcon#wrote, iclass 28, count 2 2006.229.22:09:27.34#ibcon#about to read 3, iclass 28, count 2 2006.229.22:09:27.37#ibcon#read 3, iclass 28, count 2 2006.229.22:09:27.37#ibcon#about to read 4, iclass 28, count 2 2006.229.22:09:27.37#ibcon#read 4, iclass 28, count 2 2006.229.22:09:27.37#ibcon#about to read 5, iclass 28, count 2 2006.229.22:09:27.37#ibcon#read 5, iclass 28, count 2 2006.229.22:09:27.37#ibcon#about to read 6, iclass 28, count 2 2006.229.22:09:27.37#ibcon#read 6, iclass 28, count 2 2006.229.22:09:27.37#ibcon#end of sib2, iclass 28, count 2 2006.229.22:09:27.37#ibcon#*after write, iclass 28, count 2 2006.229.22:09:27.40#ibcon#*before return 0, iclass 28, count 2 2006.229.22:09:27.40#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:27.40#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:27.41#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.22:09:27.41#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:27.41#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:27.51#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:27.51#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:27.51#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:09:27.51#ibcon#first serial, iclass 28, count 0 2006.229.22:09:27.51#ibcon#enter sib2, iclass 28, count 0 2006.229.22:09:27.51#ibcon#flushed, iclass 28, count 0 2006.229.22:09:27.51#ibcon#about to write, iclass 28, count 0 2006.229.22:09:27.51#ibcon#wrote, iclass 28, count 0 2006.229.22:09:27.51#ibcon#about to read 3, iclass 28, count 0 2006.229.22:09:27.53#ibcon#read 3, iclass 28, count 0 2006.229.22:09:27.53#ibcon#about to read 4, iclass 28, count 0 2006.229.22:09:27.53#ibcon#read 4, iclass 28, count 0 2006.229.22:09:27.53#ibcon#about to read 5, iclass 28, count 0 2006.229.22:09:27.53#ibcon#read 5, iclass 28, count 0 2006.229.22:09:27.53#ibcon#about to read 6, iclass 28, count 0 2006.229.22:09:27.53#ibcon#read 6, iclass 28, count 0 2006.229.22:09:27.53#ibcon#end of sib2, iclass 28, count 0 2006.229.22:09:27.53#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:09:27.53#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:09:27.53#ibcon#[25=USB\r\n] 2006.229.22:09:27.53#ibcon#*before write, iclass 28, count 0 2006.229.22:09:27.53#ibcon#enter sib2, iclass 28, count 0 2006.229.22:09:27.53#ibcon#flushed, iclass 28, count 0 2006.229.22:09:27.53#ibcon#about to write, iclass 28, count 0 2006.229.22:09:27.53#ibcon#wrote, iclass 28, count 0 2006.229.22:09:27.53#ibcon#about to read 3, iclass 28, count 0 2006.229.22:09:27.56#ibcon#read 3, iclass 28, count 0 2006.229.22:09:27.56#ibcon#about to read 4, iclass 28, count 0 2006.229.22:09:27.56#ibcon#read 4, iclass 28, count 0 2006.229.22:09:27.56#ibcon#about to read 5, iclass 28, count 0 2006.229.22:09:27.56#ibcon#read 5, iclass 28, count 0 2006.229.22:09:27.56#ibcon#about to read 6, iclass 28, count 0 2006.229.22:09:27.56#ibcon#read 6, iclass 28, count 0 2006.229.22:09:27.56#ibcon#end of sib2, iclass 28, count 0 2006.229.22:09:27.56#ibcon#*after write, iclass 28, count 0 2006.229.22:09:27.56#ibcon#*before return 0, iclass 28, count 0 2006.229.22:09:27.56#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:27.56#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:27.56#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:09:27.56#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:09:27.56$vck44/valo=5,734.99 2006.229.22:09:27.56#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.22:09:27.56#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.22:09:27.56#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:27.56#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:27.56#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:27.56#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:27.56#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:09:27.56#ibcon#first serial, iclass 30, count 0 2006.229.22:09:27.56#ibcon#enter sib2, iclass 30, count 0 2006.229.22:09:27.56#ibcon#flushed, iclass 30, count 0 2006.229.22:09:27.56#ibcon#about to write, iclass 30, count 0 2006.229.22:09:27.56#ibcon#wrote, iclass 30, count 0 2006.229.22:09:27.56#ibcon#about to read 3, iclass 30, count 0 2006.229.22:09:27.58#ibcon#read 3, iclass 30, count 0 2006.229.22:09:27.58#ibcon#about to read 4, iclass 30, count 0 2006.229.22:09:27.58#ibcon#read 4, iclass 30, count 0 2006.229.22:09:27.58#ibcon#about to read 5, iclass 30, count 0 2006.229.22:09:27.58#ibcon#read 5, iclass 30, count 0 2006.229.22:09:27.58#ibcon#about to read 6, iclass 30, count 0 2006.229.22:09:27.58#ibcon#read 6, iclass 30, count 0 2006.229.22:09:27.58#ibcon#end of sib2, iclass 30, count 0 2006.229.22:09:27.58#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:09:27.58#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:09:27.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:09:27.58#ibcon#*before write, iclass 30, count 0 2006.229.22:09:27.58#ibcon#enter sib2, iclass 30, count 0 2006.229.22:09:27.58#ibcon#flushed, iclass 30, count 0 2006.229.22:09:27.58#ibcon#about to write, iclass 30, count 0 2006.229.22:09:27.58#ibcon#wrote, iclass 30, count 0 2006.229.22:09:27.58#ibcon#about to read 3, iclass 30, count 0 2006.229.22:09:27.62#ibcon#read 3, iclass 30, count 0 2006.229.22:09:27.62#ibcon#about to read 4, iclass 30, count 0 2006.229.22:09:27.62#ibcon#read 4, iclass 30, count 0 2006.229.22:09:27.62#ibcon#about to read 5, iclass 30, count 0 2006.229.22:09:27.62#ibcon#read 5, iclass 30, count 0 2006.229.22:09:27.62#ibcon#about to read 6, iclass 30, count 0 2006.229.22:09:27.62#ibcon#read 6, iclass 30, count 0 2006.229.22:09:27.62#ibcon#end of sib2, iclass 30, count 0 2006.229.22:09:27.62#ibcon#*after write, iclass 30, count 0 2006.229.22:09:27.62#ibcon#*before return 0, iclass 30, count 0 2006.229.22:09:27.62#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:27.62#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:27.62#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:09:27.62#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:09:27.62$vck44/va=5,4 2006.229.22:09:27.62#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.22:09:27.62#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.22:09:27.62#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:27.62#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:27.68#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:27.68#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:27.68#ibcon#enter wrdev, iclass 32, count 2 2006.229.22:09:27.68#ibcon#first serial, iclass 32, count 2 2006.229.22:09:27.68#ibcon#enter sib2, iclass 32, count 2 2006.229.22:09:27.68#ibcon#flushed, iclass 32, count 2 2006.229.22:09:27.68#ibcon#about to write, iclass 32, count 2 2006.229.22:09:27.68#ibcon#wrote, iclass 32, count 2 2006.229.22:09:27.68#ibcon#about to read 3, iclass 32, count 2 2006.229.22:09:27.70#ibcon#read 3, iclass 32, count 2 2006.229.22:09:27.70#ibcon#about to read 4, iclass 32, count 2 2006.229.22:09:27.70#ibcon#read 4, iclass 32, count 2 2006.229.22:09:27.70#ibcon#about to read 5, iclass 32, count 2 2006.229.22:09:27.70#ibcon#read 5, iclass 32, count 2 2006.229.22:09:27.70#ibcon#about to read 6, iclass 32, count 2 2006.229.22:09:27.70#ibcon#read 6, iclass 32, count 2 2006.229.22:09:27.70#ibcon#end of sib2, iclass 32, count 2 2006.229.22:09:27.70#ibcon#*mode == 0, iclass 32, count 2 2006.229.22:09:27.70#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.22:09:27.70#ibcon#[25=AT05-04\r\n] 2006.229.22:09:27.70#ibcon#*before write, iclass 32, count 2 2006.229.22:09:27.70#ibcon#enter sib2, iclass 32, count 2 2006.229.22:09:27.70#ibcon#flushed, iclass 32, count 2 2006.229.22:09:27.70#ibcon#about to write, iclass 32, count 2 2006.229.22:09:27.70#ibcon#wrote, iclass 32, count 2 2006.229.22:09:27.70#ibcon#about to read 3, iclass 32, count 2 2006.229.22:09:27.73#ibcon#read 3, iclass 32, count 2 2006.229.22:09:27.73#ibcon#about to read 4, iclass 32, count 2 2006.229.22:09:27.73#ibcon#read 4, iclass 32, count 2 2006.229.22:09:27.73#ibcon#about to read 5, iclass 32, count 2 2006.229.22:09:27.73#ibcon#read 5, iclass 32, count 2 2006.229.22:09:27.73#ibcon#about to read 6, iclass 32, count 2 2006.229.22:09:27.73#ibcon#read 6, iclass 32, count 2 2006.229.22:09:27.73#ibcon#end of sib2, iclass 32, count 2 2006.229.22:09:27.73#ibcon#*after write, iclass 32, count 2 2006.229.22:09:27.73#ibcon#*before return 0, iclass 32, count 2 2006.229.22:09:27.73#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:27.73#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:27.73#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.22:09:27.73#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:27.73#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:27.85#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:27.85#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:27.85#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:09:27.85#ibcon#first serial, iclass 32, count 0 2006.229.22:09:27.85#ibcon#enter sib2, iclass 32, count 0 2006.229.22:09:27.85#ibcon#flushed, iclass 32, count 0 2006.229.22:09:27.85#ibcon#about to write, iclass 32, count 0 2006.229.22:09:27.85#ibcon#wrote, iclass 32, count 0 2006.229.22:09:27.85#ibcon#about to read 3, iclass 32, count 0 2006.229.22:09:27.87#ibcon#read 3, iclass 32, count 0 2006.229.22:09:27.87#ibcon#about to read 4, iclass 32, count 0 2006.229.22:09:27.87#ibcon#read 4, iclass 32, count 0 2006.229.22:09:27.87#ibcon#about to read 5, iclass 32, count 0 2006.229.22:09:27.87#ibcon#read 5, iclass 32, count 0 2006.229.22:09:27.87#ibcon#about to read 6, iclass 32, count 0 2006.229.22:09:27.87#ibcon#read 6, iclass 32, count 0 2006.229.22:09:27.87#ibcon#end of sib2, iclass 32, count 0 2006.229.22:09:27.87#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:09:27.87#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:09:27.87#ibcon#[25=USB\r\n] 2006.229.22:09:27.87#ibcon#*before write, iclass 32, count 0 2006.229.22:09:27.87#ibcon#enter sib2, iclass 32, count 0 2006.229.22:09:27.87#ibcon#flushed, iclass 32, count 0 2006.229.22:09:27.87#ibcon#about to write, iclass 32, count 0 2006.229.22:09:27.87#ibcon#wrote, iclass 32, count 0 2006.229.22:09:27.87#ibcon#about to read 3, iclass 32, count 0 2006.229.22:09:27.90#ibcon#read 3, iclass 32, count 0 2006.229.22:09:27.90#ibcon#about to read 4, iclass 32, count 0 2006.229.22:09:27.90#ibcon#read 4, iclass 32, count 0 2006.229.22:09:27.90#ibcon#about to read 5, iclass 32, count 0 2006.229.22:09:27.90#ibcon#read 5, iclass 32, count 0 2006.229.22:09:27.90#ibcon#about to read 6, iclass 32, count 0 2006.229.22:09:27.90#ibcon#read 6, iclass 32, count 0 2006.229.22:09:27.90#ibcon#end of sib2, iclass 32, count 0 2006.229.22:09:27.90#ibcon#*after write, iclass 32, count 0 2006.229.22:09:27.90#ibcon#*before return 0, iclass 32, count 0 2006.229.22:09:27.90#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:27.90#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:27.90#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:09:27.90#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:09:27.90$vck44/valo=6,814.99 2006.229.22:09:27.90#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.22:09:27.90#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.22:09:27.90#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:27.90#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:27.90#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:27.90#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:27.90#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:09:27.90#ibcon#first serial, iclass 34, count 0 2006.229.22:09:27.90#ibcon#enter sib2, iclass 34, count 0 2006.229.22:09:27.90#ibcon#flushed, iclass 34, count 0 2006.229.22:09:27.90#ibcon#about to write, iclass 34, count 0 2006.229.22:09:27.90#ibcon#wrote, iclass 34, count 0 2006.229.22:09:27.90#ibcon#about to read 3, iclass 34, count 0 2006.229.22:09:27.92#ibcon#read 3, iclass 34, count 0 2006.229.22:09:27.92#ibcon#about to read 4, iclass 34, count 0 2006.229.22:09:27.92#ibcon#read 4, iclass 34, count 0 2006.229.22:09:27.92#ibcon#about to read 5, iclass 34, count 0 2006.229.22:09:27.92#ibcon#read 5, iclass 34, count 0 2006.229.22:09:27.92#ibcon#about to read 6, iclass 34, count 0 2006.229.22:09:27.92#ibcon#read 6, iclass 34, count 0 2006.229.22:09:27.92#ibcon#end of sib2, iclass 34, count 0 2006.229.22:09:27.92#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:09:27.92#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:09:27.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:09:27.92#ibcon#*before write, iclass 34, count 0 2006.229.22:09:27.92#ibcon#enter sib2, iclass 34, count 0 2006.229.22:09:27.92#ibcon#flushed, iclass 34, count 0 2006.229.22:09:27.92#ibcon#about to write, iclass 34, count 0 2006.229.22:09:27.92#ibcon#wrote, iclass 34, count 0 2006.229.22:09:27.92#ibcon#about to read 3, iclass 34, count 0 2006.229.22:09:27.96#ibcon#read 3, iclass 34, count 0 2006.229.22:09:27.96#ibcon#about to read 4, iclass 34, count 0 2006.229.22:09:27.96#ibcon#read 4, iclass 34, count 0 2006.229.22:09:27.96#ibcon#about to read 5, iclass 34, count 0 2006.229.22:09:27.96#ibcon#read 5, iclass 34, count 0 2006.229.22:09:27.96#ibcon#about to read 6, iclass 34, count 0 2006.229.22:09:27.96#ibcon#read 6, iclass 34, count 0 2006.229.22:09:27.96#ibcon#end of sib2, iclass 34, count 0 2006.229.22:09:27.96#ibcon#*after write, iclass 34, count 0 2006.229.22:09:27.96#ibcon#*before return 0, iclass 34, count 0 2006.229.22:09:27.96#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:27.96#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:27.96#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:09:27.96#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:09:27.96$vck44/va=6,4 2006.229.22:09:27.96#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.22:09:27.96#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.22:09:27.96#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:27.96#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:28.02#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:28.02#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:28.02#ibcon#enter wrdev, iclass 36, count 2 2006.229.22:09:28.02#ibcon#first serial, iclass 36, count 2 2006.229.22:09:28.02#ibcon#enter sib2, iclass 36, count 2 2006.229.22:09:28.02#ibcon#flushed, iclass 36, count 2 2006.229.22:09:28.02#ibcon#about to write, iclass 36, count 2 2006.229.22:09:28.02#ibcon#wrote, iclass 36, count 2 2006.229.22:09:28.02#ibcon#about to read 3, iclass 36, count 2 2006.229.22:09:28.04#ibcon#read 3, iclass 36, count 2 2006.229.22:09:28.04#ibcon#about to read 4, iclass 36, count 2 2006.229.22:09:28.04#ibcon#read 4, iclass 36, count 2 2006.229.22:09:28.04#ibcon#about to read 5, iclass 36, count 2 2006.229.22:09:28.04#ibcon#read 5, iclass 36, count 2 2006.229.22:09:28.04#ibcon#about to read 6, iclass 36, count 2 2006.229.22:09:28.04#ibcon#read 6, iclass 36, count 2 2006.229.22:09:28.04#ibcon#end of sib2, iclass 36, count 2 2006.229.22:09:28.04#ibcon#*mode == 0, iclass 36, count 2 2006.229.22:09:28.04#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.22:09:28.04#ibcon#[25=AT06-04\r\n] 2006.229.22:09:28.04#ibcon#*before write, iclass 36, count 2 2006.229.22:09:28.04#ibcon#enter sib2, iclass 36, count 2 2006.229.22:09:28.04#ibcon#flushed, iclass 36, count 2 2006.229.22:09:28.04#ibcon#about to write, iclass 36, count 2 2006.229.22:09:28.04#ibcon#wrote, iclass 36, count 2 2006.229.22:09:28.04#ibcon#about to read 3, iclass 36, count 2 2006.229.22:09:28.07#ibcon#read 3, iclass 36, count 2 2006.229.22:09:28.07#ibcon#about to read 4, iclass 36, count 2 2006.229.22:09:28.07#ibcon#read 4, iclass 36, count 2 2006.229.22:09:28.07#ibcon#about to read 5, iclass 36, count 2 2006.229.22:09:28.07#ibcon#read 5, iclass 36, count 2 2006.229.22:09:28.07#ibcon#about to read 6, iclass 36, count 2 2006.229.22:09:28.07#ibcon#read 6, iclass 36, count 2 2006.229.22:09:28.07#ibcon#end of sib2, iclass 36, count 2 2006.229.22:09:28.07#ibcon#*after write, iclass 36, count 2 2006.229.22:09:28.07#ibcon#*before return 0, iclass 36, count 2 2006.229.22:09:28.07#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:28.07#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:28.07#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.22:09:28.07#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:28.07#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:28.19#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:28.19#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:28.19#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:09:28.19#ibcon#first serial, iclass 36, count 0 2006.229.22:09:28.19#ibcon#enter sib2, iclass 36, count 0 2006.229.22:09:28.19#ibcon#flushed, iclass 36, count 0 2006.229.22:09:28.19#ibcon#about to write, iclass 36, count 0 2006.229.22:09:28.19#ibcon#wrote, iclass 36, count 0 2006.229.22:09:28.19#ibcon#about to read 3, iclass 36, count 0 2006.229.22:09:28.21#ibcon#read 3, iclass 36, count 0 2006.229.22:09:28.21#ibcon#about to read 4, iclass 36, count 0 2006.229.22:09:28.21#ibcon#read 4, iclass 36, count 0 2006.229.22:09:28.21#ibcon#about to read 5, iclass 36, count 0 2006.229.22:09:28.21#ibcon#read 5, iclass 36, count 0 2006.229.22:09:28.21#ibcon#about to read 6, iclass 36, count 0 2006.229.22:09:28.21#ibcon#read 6, iclass 36, count 0 2006.229.22:09:28.21#ibcon#end of sib2, iclass 36, count 0 2006.229.22:09:28.21#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:09:28.21#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:09:28.21#ibcon#[25=USB\r\n] 2006.229.22:09:28.21#ibcon#*before write, iclass 36, count 0 2006.229.22:09:28.21#ibcon#enter sib2, iclass 36, count 0 2006.229.22:09:28.21#ibcon#flushed, iclass 36, count 0 2006.229.22:09:28.21#ibcon#about to write, iclass 36, count 0 2006.229.22:09:28.21#ibcon#wrote, iclass 36, count 0 2006.229.22:09:28.21#ibcon#about to read 3, iclass 36, count 0 2006.229.22:09:28.24#ibcon#read 3, iclass 36, count 0 2006.229.22:09:28.24#ibcon#about to read 4, iclass 36, count 0 2006.229.22:09:28.24#ibcon#read 4, iclass 36, count 0 2006.229.22:09:28.24#ibcon#about to read 5, iclass 36, count 0 2006.229.22:09:28.24#ibcon#read 5, iclass 36, count 0 2006.229.22:09:28.24#ibcon#about to read 6, iclass 36, count 0 2006.229.22:09:28.24#ibcon#read 6, iclass 36, count 0 2006.229.22:09:28.24#ibcon#end of sib2, iclass 36, count 0 2006.229.22:09:28.24#ibcon#*after write, iclass 36, count 0 2006.229.22:09:28.24#ibcon#*before return 0, iclass 36, count 0 2006.229.22:09:28.24#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:28.24#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:28.24#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:09:28.24#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:09:28.24$vck44/valo=7,864.99 2006.229.22:09:28.24#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.22:09:28.24#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.22:09:28.24#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:28.24#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:28.24#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:28.24#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:28.24#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:09:28.24#ibcon#first serial, iclass 38, count 0 2006.229.22:09:28.24#ibcon#enter sib2, iclass 38, count 0 2006.229.22:09:28.24#ibcon#flushed, iclass 38, count 0 2006.229.22:09:28.24#ibcon#about to write, iclass 38, count 0 2006.229.22:09:28.24#ibcon#wrote, iclass 38, count 0 2006.229.22:09:28.24#ibcon#about to read 3, iclass 38, count 0 2006.229.22:09:28.26#ibcon#read 3, iclass 38, count 0 2006.229.22:09:28.26#ibcon#about to read 4, iclass 38, count 0 2006.229.22:09:28.26#ibcon#read 4, iclass 38, count 0 2006.229.22:09:28.26#ibcon#about to read 5, iclass 38, count 0 2006.229.22:09:28.26#ibcon#read 5, iclass 38, count 0 2006.229.22:09:28.26#ibcon#about to read 6, iclass 38, count 0 2006.229.22:09:28.26#ibcon#read 6, iclass 38, count 0 2006.229.22:09:28.26#ibcon#end of sib2, iclass 38, count 0 2006.229.22:09:28.26#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:09:28.26#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:09:28.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:09:28.26#ibcon#*before write, iclass 38, count 0 2006.229.22:09:28.26#ibcon#enter sib2, iclass 38, count 0 2006.229.22:09:28.26#ibcon#flushed, iclass 38, count 0 2006.229.22:09:28.26#ibcon#about to write, iclass 38, count 0 2006.229.22:09:28.26#ibcon#wrote, iclass 38, count 0 2006.229.22:09:28.26#ibcon#about to read 3, iclass 38, count 0 2006.229.22:09:28.30#ibcon#read 3, iclass 38, count 0 2006.229.22:09:28.30#ibcon#about to read 4, iclass 38, count 0 2006.229.22:09:28.30#ibcon#read 4, iclass 38, count 0 2006.229.22:09:28.30#ibcon#about to read 5, iclass 38, count 0 2006.229.22:09:28.30#ibcon#read 5, iclass 38, count 0 2006.229.22:09:28.30#ibcon#about to read 6, iclass 38, count 0 2006.229.22:09:28.30#ibcon#read 6, iclass 38, count 0 2006.229.22:09:28.30#ibcon#end of sib2, iclass 38, count 0 2006.229.22:09:28.30#ibcon#*after write, iclass 38, count 0 2006.229.22:09:28.30#ibcon#*before return 0, iclass 38, count 0 2006.229.22:09:28.30#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:28.30#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:28.30#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:09:28.30#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:09:28.30$vck44/va=7,5 2006.229.22:09:28.30#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.22:09:28.30#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.22:09:28.30#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:28.30#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:28.36#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:28.36#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:28.36#ibcon#enter wrdev, iclass 40, count 2 2006.229.22:09:28.36#ibcon#first serial, iclass 40, count 2 2006.229.22:09:28.36#ibcon#enter sib2, iclass 40, count 2 2006.229.22:09:28.36#ibcon#flushed, iclass 40, count 2 2006.229.22:09:28.36#ibcon#about to write, iclass 40, count 2 2006.229.22:09:28.36#ibcon#wrote, iclass 40, count 2 2006.229.22:09:28.36#ibcon#about to read 3, iclass 40, count 2 2006.229.22:09:28.38#ibcon#read 3, iclass 40, count 2 2006.229.22:09:28.38#ibcon#about to read 4, iclass 40, count 2 2006.229.22:09:28.38#ibcon#read 4, iclass 40, count 2 2006.229.22:09:28.38#ibcon#about to read 5, iclass 40, count 2 2006.229.22:09:28.38#ibcon#read 5, iclass 40, count 2 2006.229.22:09:28.38#ibcon#about to read 6, iclass 40, count 2 2006.229.22:09:28.38#ibcon#read 6, iclass 40, count 2 2006.229.22:09:28.38#ibcon#end of sib2, iclass 40, count 2 2006.229.22:09:28.38#ibcon#*mode == 0, iclass 40, count 2 2006.229.22:09:28.38#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.22:09:28.38#ibcon#[25=AT07-05\r\n] 2006.229.22:09:28.38#ibcon#*before write, iclass 40, count 2 2006.229.22:09:28.38#ibcon#enter sib2, iclass 40, count 2 2006.229.22:09:28.38#ibcon#flushed, iclass 40, count 2 2006.229.22:09:28.38#ibcon#about to write, iclass 40, count 2 2006.229.22:09:28.38#ibcon#wrote, iclass 40, count 2 2006.229.22:09:28.38#ibcon#about to read 3, iclass 40, count 2 2006.229.22:09:28.41#ibcon#read 3, iclass 40, count 2 2006.229.22:09:28.41#ibcon#about to read 4, iclass 40, count 2 2006.229.22:09:28.41#ibcon#read 4, iclass 40, count 2 2006.229.22:09:28.41#ibcon#about to read 5, iclass 40, count 2 2006.229.22:09:28.41#ibcon#read 5, iclass 40, count 2 2006.229.22:09:28.41#ibcon#about to read 6, iclass 40, count 2 2006.229.22:09:28.41#ibcon#read 6, iclass 40, count 2 2006.229.22:09:28.41#ibcon#end of sib2, iclass 40, count 2 2006.229.22:09:28.41#ibcon#*after write, iclass 40, count 2 2006.229.22:09:28.41#ibcon#*before return 0, iclass 40, count 2 2006.229.22:09:28.41#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:28.41#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:28.41#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.22:09:28.41#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:28.41#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:28.51#abcon#<5=/08 1.1 5.6 28.17 951002.4\r\n> 2006.229.22:09:28.53#abcon#{5=INTERFACE CLEAR} 2006.229.22:09:28.53#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:28.53#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:28.53#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:09:28.53#ibcon#first serial, iclass 40, count 0 2006.229.22:09:28.53#ibcon#enter sib2, iclass 40, count 0 2006.229.22:09:28.53#ibcon#flushed, iclass 40, count 0 2006.229.22:09:28.53#ibcon#about to write, iclass 40, count 0 2006.229.22:09:28.53#ibcon#wrote, iclass 40, count 0 2006.229.22:09:28.53#ibcon#about to read 3, iclass 40, count 0 2006.229.22:09:28.55#ibcon#read 3, iclass 40, count 0 2006.229.22:09:28.55#ibcon#about to read 4, iclass 40, count 0 2006.229.22:09:28.55#ibcon#read 4, iclass 40, count 0 2006.229.22:09:28.55#ibcon#about to read 5, iclass 40, count 0 2006.229.22:09:28.55#ibcon#read 5, iclass 40, count 0 2006.229.22:09:28.55#ibcon#about to read 6, iclass 40, count 0 2006.229.22:09:28.55#ibcon#read 6, iclass 40, count 0 2006.229.22:09:28.55#ibcon#end of sib2, iclass 40, count 0 2006.229.22:09:28.55#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:09:28.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:09:28.55#ibcon#[25=USB\r\n] 2006.229.22:09:28.55#ibcon#*before write, iclass 40, count 0 2006.229.22:09:28.55#ibcon#enter sib2, iclass 40, count 0 2006.229.22:09:28.55#ibcon#flushed, iclass 40, count 0 2006.229.22:09:28.55#ibcon#about to write, iclass 40, count 0 2006.229.22:09:28.55#ibcon#wrote, iclass 40, count 0 2006.229.22:09:28.55#ibcon#about to read 3, iclass 40, count 0 2006.229.22:09:28.58#ibcon#read 3, iclass 40, count 0 2006.229.22:09:28.58#ibcon#about to read 4, iclass 40, count 0 2006.229.22:09:28.58#ibcon#read 4, iclass 40, count 0 2006.229.22:09:28.58#ibcon#about to read 5, iclass 40, count 0 2006.229.22:09:28.58#ibcon#read 5, iclass 40, count 0 2006.229.22:09:28.58#ibcon#about to read 6, iclass 40, count 0 2006.229.22:09:28.58#ibcon#read 6, iclass 40, count 0 2006.229.22:09:28.58#ibcon#end of sib2, iclass 40, count 0 2006.229.22:09:28.58#ibcon#*after write, iclass 40, count 0 2006.229.22:09:28.58#ibcon#*before return 0, iclass 40, count 0 2006.229.22:09:28.58#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:28.58#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:28.58#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:09:28.58#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:09:28.58$vck44/valo=8,884.99 2006.229.22:09:28.58#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.22:09:28.58#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.22:09:28.58#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:28.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:28.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:28.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:28.58#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:09:28.58#ibcon#first serial, iclass 10, count 0 2006.229.22:09:28.58#ibcon#enter sib2, iclass 10, count 0 2006.229.22:09:28.58#ibcon#flushed, iclass 10, count 0 2006.229.22:09:28.58#ibcon#about to write, iclass 10, count 0 2006.229.22:09:28.58#ibcon#wrote, iclass 10, count 0 2006.229.22:09:28.58#ibcon#about to read 3, iclass 10, count 0 2006.229.22:09:28.59#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:09:28.60#ibcon#read 3, iclass 10, count 0 2006.229.22:09:28.60#ibcon#about to read 4, iclass 10, count 0 2006.229.22:09:28.60#ibcon#read 4, iclass 10, count 0 2006.229.22:09:28.60#ibcon#about to read 5, iclass 10, count 0 2006.229.22:09:28.60#ibcon#read 5, iclass 10, count 0 2006.229.22:09:28.60#ibcon#about to read 6, iclass 10, count 0 2006.229.22:09:28.60#ibcon#read 6, iclass 10, count 0 2006.229.22:09:28.60#ibcon#end of sib2, iclass 10, count 0 2006.229.22:09:28.60#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:09:28.60#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:09:28.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:09:28.60#ibcon#*before write, iclass 10, count 0 2006.229.22:09:28.60#ibcon#enter sib2, iclass 10, count 0 2006.229.22:09:28.60#ibcon#flushed, iclass 10, count 0 2006.229.22:09:28.60#ibcon#about to write, iclass 10, count 0 2006.229.22:09:28.60#ibcon#wrote, iclass 10, count 0 2006.229.22:09:28.60#ibcon#about to read 3, iclass 10, count 0 2006.229.22:09:28.64#ibcon#read 3, iclass 10, count 0 2006.229.22:09:28.64#ibcon#about to read 4, iclass 10, count 0 2006.229.22:09:28.64#ibcon#read 4, iclass 10, count 0 2006.229.22:09:28.64#ibcon#about to read 5, iclass 10, count 0 2006.229.22:09:28.64#ibcon#read 5, iclass 10, count 0 2006.229.22:09:28.64#ibcon#about to read 6, iclass 10, count 0 2006.229.22:09:28.64#ibcon#read 6, iclass 10, count 0 2006.229.22:09:28.64#ibcon#end of sib2, iclass 10, count 0 2006.229.22:09:28.64#ibcon#*after write, iclass 10, count 0 2006.229.22:09:28.64#ibcon#*before return 0, iclass 10, count 0 2006.229.22:09:28.64#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:28.64#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:28.64#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:09:28.64#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:09:28.64$vck44/va=8,6 2006.229.22:09:28.64#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.22:09:28.64#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.22:09:28.64#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:28.64#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:09:28.70#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:09:28.70#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:09:28.70#ibcon#enter wrdev, iclass 12, count 2 2006.229.22:09:28.70#ibcon#first serial, iclass 12, count 2 2006.229.22:09:28.70#ibcon#enter sib2, iclass 12, count 2 2006.229.22:09:28.70#ibcon#flushed, iclass 12, count 2 2006.229.22:09:28.70#ibcon#about to write, iclass 12, count 2 2006.229.22:09:28.70#ibcon#wrote, iclass 12, count 2 2006.229.22:09:28.70#ibcon#about to read 3, iclass 12, count 2 2006.229.22:09:28.72#ibcon#read 3, iclass 12, count 2 2006.229.22:09:28.72#ibcon#about to read 4, iclass 12, count 2 2006.229.22:09:28.72#ibcon#read 4, iclass 12, count 2 2006.229.22:09:28.72#ibcon#about to read 5, iclass 12, count 2 2006.229.22:09:28.72#ibcon#read 5, iclass 12, count 2 2006.229.22:09:28.72#ibcon#about to read 6, iclass 12, count 2 2006.229.22:09:28.72#ibcon#read 6, iclass 12, count 2 2006.229.22:09:28.72#ibcon#end of sib2, iclass 12, count 2 2006.229.22:09:28.72#ibcon#*mode == 0, iclass 12, count 2 2006.229.22:09:28.72#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.22:09:28.72#ibcon#[25=AT08-06\r\n] 2006.229.22:09:28.72#ibcon#*before write, iclass 12, count 2 2006.229.22:09:28.72#ibcon#enter sib2, iclass 12, count 2 2006.229.22:09:28.72#ibcon#flushed, iclass 12, count 2 2006.229.22:09:28.72#ibcon#about to write, iclass 12, count 2 2006.229.22:09:28.72#ibcon#wrote, iclass 12, count 2 2006.229.22:09:28.72#ibcon#about to read 3, iclass 12, count 2 2006.229.22:09:28.75#ibcon#read 3, iclass 12, count 2 2006.229.22:09:28.75#ibcon#about to read 4, iclass 12, count 2 2006.229.22:09:28.75#ibcon#read 4, iclass 12, count 2 2006.229.22:09:28.75#ibcon#about to read 5, iclass 12, count 2 2006.229.22:09:28.75#ibcon#read 5, iclass 12, count 2 2006.229.22:09:28.75#ibcon#about to read 6, iclass 12, count 2 2006.229.22:09:28.75#ibcon#read 6, iclass 12, count 2 2006.229.22:09:28.75#ibcon#end of sib2, iclass 12, count 2 2006.229.22:09:28.75#ibcon#*after write, iclass 12, count 2 2006.229.22:09:28.75#ibcon#*before return 0, iclass 12, count 2 2006.229.22:09:28.75#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:09:28.75#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:09:28.75#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.22:09:28.75#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:28.75#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:09:28.87#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:09:28.87#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:09:28.87#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:09:28.87#ibcon#first serial, iclass 12, count 0 2006.229.22:09:28.87#ibcon#enter sib2, iclass 12, count 0 2006.229.22:09:28.87#ibcon#flushed, iclass 12, count 0 2006.229.22:09:28.87#ibcon#about to write, iclass 12, count 0 2006.229.22:09:28.87#ibcon#wrote, iclass 12, count 0 2006.229.22:09:28.87#ibcon#about to read 3, iclass 12, count 0 2006.229.22:09:28.89#ibcon#read 3, iclass 12, count 0 2006.229.22:09:28.89#ibcon#about to read 4, iclass 12, count 0 2006.229.22:09:28.89#ibcon#read 4, iclass 12, count 0 2006.229.22:09:28.89#ibcon#about to read 5, iclass 12, count 0 2006.229.22:09:28.89#ibcon#read 5, iclass 12, count 0 2006.229.22:09:28.89#ibcon#about to read 6, iclass 12, count 0 2006.229.22:09:28.89#ibcon#read 6, iclass 12, count 0 2006.229.22:09:28.89#ibcon#end of sib2, iclass 12, count 0 2006.229.22:09:28.89#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:09:28.89#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:09:28.89#ibcon#[25=USB\r\n] 2006.229.22:09:28.89#ibcon#*before write, iclass 12, count 0 2006.229.22:09:28.89#ibcon#enter sib2, iclass 12, count 0 2006.229.22:09:28.89#ibcon#flushed, iclass 12, count 0 2006.229.22:09:28.89#ibcon#about to write, iclass 12, count 0 2006.229.22:09:28.89#ibcon#wrote, iclass 12, count 0 2006.229.22:09:28.89#ibcon#about to read 3, iclass 12, count 0 2006.229.22:09:28.92#ibcon#read 3, iclass 12, count 0 2006.229.22:09:28.92#ibcon#about to read 4, iclass 12, count 0 2006.229.22:09:28.92#ibcon#read 4, iclass 12, count 0 2006.229.22:09:28.92#ibcon#about to read 5, iclass 12, count 0 2006.229.22:09:28.92#ibcon#read 5, iclass 12, count 0 2006.229.22:09:28.92#ibcon#about to read 6, iclass 12, count 0 2006.229.22:09:28.92#ibcon#read 6, iclass 12, count 0 2006.229.22:09:28.92#ibcon#end of sib2, iclass 12, count 0 2006.229.22:09:28.92#ibcon#*after write, iclass 12, count 0 2006.229.22:09:28.92#ibcon#*before return 0, iclass 12, count 0 2006.229.22:09:28.92#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:09:28.92#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:09:28.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:09:28.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:09:28.92$vck44/vblo=1,629.99 2006.229.22:09:28.92#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:09:28.92#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:09:28.92#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:28.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:28.92#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:28.92#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:28.92#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:09:28.92#ibcon#first serial, iclass 14, count 0 2006.229.22:09:28.92#ibcon#enter sib2, iclass 14, count 0 2006.229.22:09:28.92#ibcon#flushed, iclass 14, count 0 2006.229.22:09:28.92#ibcon#about to write, iclass 14, count 0 2006.229.22:09:28.92#ibcon#wrote, iclass 14, count 0 2006.229.22:09:28.92#ibcon#about to read 3, iclass 14, count 0 2006.229.22:09:28.94#ibcon#read 3, iclass 14, count 0 2006.229.22:09:28.94#ibcon#about to read 4, iclass 14, count 0 2006.229.22:09:28.94#ibcon#read 4, iclass 14, count 0 2006.229.22:09:28.94#ibcon#about to read 5, iclass 14, count 0 2006.229.22:09:28.94#ibcon#read 5, iclass 14, count 0 2006.229.22:09:28.94#ibcon#about to read 6, iclass 14, count 0 2006.229.22:09:28.94#ibcon#read 6, iclass 14, count 0 2006.229.22:09:28.94#ibcon#end of sib2, iclass 14, count 0 2006.229.22:09:28.94#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:09:28.94#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:09:28.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:09:28.94#ibcon#*before write, iclass 14, count 0 2006.229.22:09:28.94#ibcon#enter sib2, iclass 14, count 0 2006.229.22:09:28.94#ibcon#flushed, iclass 14, count 0 2006.229.22:09:28.94#ibcon#about to write, iclass 14, count 0 2006.229.22:09:28.94#ibcon#wrote, iclass 14, count 0 2006.229.22:09:28.94#ibcon#about to read 3, iclass 14, count 0 2006.229.22:09:28.98#ibcon#read 3, iclass 14, count 0 2006.229.22:09:28.98#ibcon#about to read 4, iclass 14, count 0 2006.229.22:09:28.98#ibcon#read 4, iclass 14, count 0 2006.229.22:09:28.98#ibcon#about to read 5, iclass 14, count 0 2006.229.22:09:28.98#ibcon#read 5, iclass 14, count 0 2006.229.22:09:28.98#ibcon#about to read 6, iclass 14, count 0 2006.229.22:09:28.98#ibcon#read 6, iclass 14, count 0 2006.229.22:09:28.98#ibcon#end of sib2, iclass 14, count 0 2006.229.22:09:28.98#ibcon#*after write, iclass 14, count 0 2006.229.22:09:28.98#ibcon#*before return 0, iclass 14, count 0 2006.229.22:09:28.98#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:28.98#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:09:28.98#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:09:28.98#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:09:28.98$vck44/vb=1,4 2006.229.22:09:28.98#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.22:09:28.98#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.22:09:28.98#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:28.98#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:28.98#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:28.98#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:28.98#ibcon#enter wrdev, iclass 16, count 2 2006.229.22:09:28.98#ibcon#first serial, iclass 16, count 2 2006.229.22:09:28.98#ibcon#enter sib2, iclass 16, count 2 2006.229.22:09:28.98#ibcon#flushed, iclass 16, count 2 2006.229.22:09:28.98#ibcon#about to write, iclass 16, count 2 2006.229.22:09:28.98#ibcon#wrote, iclass 16, count 2 2006.229.22:09:28.98#ibcon#about to read 3, iclass 16, count 2 2006.229.22:09:29.00#ibcon#read 3, iclass 16, count 2 2006.229.22:09:29.00#ibcon#about to read 4, iclass 16, count 2 2006.229.22:09:29.00#ibcon#read 4, iclass 16, count 2 2006.229.22:09:29.00#ibcon#about to read 5, iclass 16, count 2 2006.229.22:09:29.00#ibcon#read 5, iclass 16, count 2 2006.229.22:09:29.00#ibcon#about to read 6, iclass 16, count 2 2006.229.22:09:29.00#ibcon#read 6, iclass 16, count 2 2006.229.22:09:29.00#ibcon#end of sib2, iclass 16, count 2 2006.229.22:09:29.00#ibcon#*mode == 0, iclass 16, count 2 2006.229.22:09:29.00#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.22:09:29.00#ibcon#[27=AT01-04\r\n] 2006.229.22:09:29.00#ibcon#*before write, iclass 16, count 2 2006.229.22:09:29.00#ibcon#enter sib2, iclass 16, count 2 2006.229.22:09:29.00#ibcon#flushed, iclass 16, count 2 2006.229.22:09:29.00#ibcon#about to write, iclass 16, count 2 2006.229.22:09:29.00#ibcon#wrote, iclass 16, count 2 2006.229.22:09:29.00#ibcon#about to read 3, iclass 16, count 2 2006.229.22:09:29.03#ibcon#read 3, iclass 16, count 2 2006.229.22:09:29.03#ibcon#about to read 4, iclass 16, count 2 2006.229.22:09:29.03#ibcon#read 4, iclass 16, count 2 2006.229.22:09:29.03#ibcon#about to read 5, iclass 16, count 2 2006.229.22:09:29.03#ibcon#read 5, iclass 16, count 2 2006.229.22:09:29.03#ibcon#about to read 6, iclass 16, count 2 2006.229.22:09:29.03#ibcon#read 6, iclass 16, count 2 2006.229.22:09:29.03#ibcon#end of sib2, iclass 16, count 2 2006.229.22:09:29.03#ibcon#*after write, iclass 16, count 2 2006.229.22:09:29.03#ibcon#*before return 0, iclass 16, count 2 2006.229.22:09:29.03#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:29.03#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:09:29.03#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.22:09:29.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:29.03#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:29.15#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:29.15#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:29.15#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:09:29.15#ibcon#first serial, iclass 16, count 0 2006.229.22:09:29.15#ibcon#enter sib2, iclass 16, count 0 2006.229.22:09:29.15#ibcon#flushed, iclass 16, count 0 2006.229.22:09:29.15#ibcon#about to write, iclass 16, count 0 2006.229.22:09:29.15#ibcon#wrote, iclass 16, count 0 2006.229.22:09:29.15#ibcon#about to read 3, iclass 16, count 0 2006.229.22:09:29.17#ibcon#read 3, iclass 16, count 0 2006.229.22:09:29.17#ibcon#about to read 4, iclass 16, count 0 2006.229.22:09:29.17#ibcon#read 4, iclass 16, count 0 2006.229.22:09:29.17#ibcon#about to read 5, iclass 16, count 0 2006.229.22:09:29.17#ibcon#read 5, iclass 16, count 0 2006.229.22:09:29.17#ibcon#about to read 6, iclass 16, count 0 2006.229.22:09:29.17#ibcon#read 6, iclass 16, count 0 2006.229.22:09:29.17#ibcon#end of sib2, iclass 16, count 0 2006.229.22:09:29.17#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:09:29.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:09:29.17#ibcon#[27=USB\r\n] 2006.229.22:09:29.17#ibcon#*before write, iclass 16, count 0 2006.229.22:09:29.17#ibcon#enter sib2, iclass 16, count 0 2006.229.22:09:29.17#ibcon#flushed, iclass 16, count 0 2006.229.22:09:29.17#ibcon#about to write, iclass 16, count 0 2006.229.22:09:29.17#ibcon#wrote, iclass 16, count 0 2006.229.22:09:29.17#ibcon#about to read 3, iclass 16, count 0 2006.229.22:09:29.20#ibcon#read 3, iclass 16, count 0 2006.229.22:09:29.20#ibcon#about to read 4, iclass 16, count 0 2006.229.22:09:29.20#ibcon#read 4, iclass 16, count 0 2006.229.22:09:29.20#ibcon#about to read 5, iclass 16, count 0 2006.229.22:09:29.20#ibcon#read 5, iclass 16, count 0 2006.229.22:09:29.20#ibcon#about to read 6, iclass 16, count 0 2006.229.22:09:29.20#ibcon#read 6, iclass 16, count 0 2006.229.22:09:29.20#ibcon#end of sib2, iclass 16, count 0 2006.229.22:09:29.20#ibcon#*after write, iclass 16, count 0 2006.229.22:09:29.20#ibcon#*before return 0, iclass 16, count 0 2006.229.22:09:29.20#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:29.20#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:09:29.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:09:29.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:09:29.20$vck44/vblo=2,634.99 2006.229.22:09:29.20#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:09:29.20#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:09:29.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:29.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:29.20#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:29.20#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:29.20#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:09:29.20#ibcon#first serial, iclass 18, count 0 2006.229.22:09:29.20#ibcon#enter sib2, iclass 18, count 0 2006.229.22:09:29.20#ibcon#flushed, iclass 18, count 0 2006.229.22:09:29.20#ibcon#about to write, iclass 18, count 0 2006.229.22:09:29.20#ibcon#wrote, iclass 18, count 0 2006.229.22:09:29.20#ibcon#about to read 3, iclass 18, count 0 2006.229.22:09:29.22#ibcon#read 3, iclass 18, count 0 2006.229.22:09:29.22#ibcon#about to read 4, iclass 18, count 0 2006.229.22:09:29.22#ibcon#read 4, iclass 18, count 0 2006.229.22:09:29.22#ibcon#about to read 5, iclass 18, count 0 2006.229.22:09:29.22#ibcon#read 5, iclass 18, count 0 2006.229.22:09:29.22#ibcon#about to read 6, iclass 18, count 0 2006.229.22:09:29.22#ibcon#read 6, iclass 18, count 0 2006.229.22:09:29.22#ibcon#end of sib2, iclass 18, count 0 2006.229.22:09:29.22#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:09:29.22#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:09:29.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:09:29.22#ibcon#*before write, iclass 18, count 0 2006.229.22:09:29.22#ibcon#enter sib2, iclass 18, count 0 2006.229.22:09:29.22#ibcon#flushed, iclass 18, count 0 2006.229.22:09:29.22#ibcon#about to write, iclass 18, count 0 2006.229.22:09:29.22#ibcon#wrote, iclass 18, count 0 2006.229.22:09:29.22#ibcon#about to read 3, iclass 18, count 0 2006.229.22:09:29.26#ibcon#read 3, iclass 18, count 0 2006.229.22:09:29.26#ibcon#about to read 4, iclass 18, count 0 2006.229.22:09:29.26#ibcon#read 4, iclass 18, count 0 2006.229.22:09:29.26#ibcon#about to read 5, iclass 18, count 0 2006.229.22:09:29.26#ibcon#read 5, iclass 18, count 0 2006.229.22:09:29.26#ibcon#about to read 6, iclass 18, count 0 2006.229.22:09:29.26#ibcon#read 6, iclass 18, count 0 2006.229.22:09:29.26#ibcon#end of sib2, iclass 18, count 0 2006.229.22:09:29.26#ibcon#*after write, iclass 18, count 0 2006.229.22:09:29.26#ibcon#*before return 0, iclass 18, count 0 2006.229.22:09:29.26#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:29.26#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:09:29.26#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:09:29.26#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:09:29.26$vck44/vb=2,4 2006.229.22:09:29.26#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.22:09:29.26#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.22:09:29.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:29.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:29.32#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:29.32#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:29.32#ibcon#enter wrdev, iclass 20, count 2 2006.229.22:09:29.32#ibcon#first serial, iclass 20, count 2 2006.229.22:09:29.32#ibcon#enter sib2, iclass 20, count 2 2006.229.22:09:29.32#ibcon#flushed, iclass 20, count 2 2006.229.22:09:29.32#ibcon#about to write, iclass 20, count 2 2006.229.22:09:29.32#ibcon#wrote, iclass 20, count 2 2006.229.22:09:29.32#ibcon#about to read 3, iclass 20, count 2 2006.229.22:09:29.34#ibcon#read 3, iclass 20, count 2 2006.229.22:09:29.34#ibcon#about to read 4, iclass 20, count 2 2006.229.22:09:29.34#ibcon#read 4, iclass 20, count 2 2006.229.22:09:29.34#ibcon#about to read 5, iclass 20, count 2 2006.229.22:09:29.34#ibcon#read 5, iclass 20, count 2 2006.229.22:09:29.34#ibcon#about to read 6, iclass 20, count 2 2006.229.22:09:29.34#ibcon#read 6, iclass 20, count 2 2006.229.22:09:29.34#ibcon#end of sib2, iclass 20, count 2 2006.229.22:09:29.34#ibcon#*mode == 0, iclass 20, count 2 2006.229.22:09:29.34#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.22:09:29.34#ibcon#[27=AT02-04\r\n] 2006.229.22:09:29.34#ibcon#*before write, iclass 20, count 2 2006.229.22:09:29.34#ibcon#enter sib2, iclass 20, count 2 2006.229.22:09:29.34#ibcon#flushed, iclass 20, count 2 2006.229.22:09:29.34#ibcon#about to write, iclass 20, count 2 2006.229.22:09:29.34#ibcon#wrote, iclass 20, count 2 2006.229.22:09:29.34#ibcon#about to read 3, iclass 20, count 2 2006.229.22:09:29.37#ibcon#read 3, iclass 20, count 2 2006.229.22:09:29.37#ibcon#about to read 4, iclass 20, count 2 2006.229.22:09:29.37#ibcon#read 4, iclass 20, count 2 2006.229.22:09:29.37#ibcon#about to read 5, iclass 20, count 2 2006.229.22:09:29.37#ibcon#read 5, iclass 20, count 2 2006.229.22:09:29.37#ibcon#about to read 6, iclass 20, count 2 2006.229.22:09:29.37#ibcon#read 6, iclass 20, count 2 2006.229.22:09:29.37#ibcon#end of sib2, iclass 20, count 2 2006.229.22:09:29.37#ibcon#*after write, iclass 20, count 2 2006.229.22:09:29.37#ibcon#*before return 0, iclass 20, count 2 2006.229.22:09:29.37#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:29.37#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:09:29.37#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.22:09:29.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:29.37#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:29.49#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:29.49#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:29.49#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:09:29.49#ibcon#first serial, iclass 20, count 0 2006.229.22:09:29.49#ibcon#enter sib2, iclass 20, count 0 2006.229.22:09:29.49#ibcon#flushed, iclass 20, count 0 2006.229.22:09:29.49#ibcon#about to write, iclass 20, count 0 2006.229.22:09:29.49#ibcon#wrote, iclass 20, count 0 2006.229.22:09:29.49#ibcon#about to read 3, iclass 20, count 0 2006.229.22:09:29.51#ibcon#read 3, iclass 20, count 0 2006.229.22:09:29.51#ibcon#about to read 4, iclass 20, count 0 2006.229.22:09:29.51#ibcon#read 4, iclass 20, count 0 2006.229.22:09:29.51#ibcon#about to read 5, iclass 20, count 0 2006.229.22:09:29.51#ibcon#read 5, iclass 20, count 0 2006.229.22:09:29.51#ibcon#about to read 6, iclass 20, count 0 2006.229.22:09:29.51#ibcon#read 6, iclass 20, count 0 2006.229.22:09:29.51#ibcon#end of sib2, iclass 20, count 0 2006.229.22:09:29.51#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:09:29.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:09:29.51#ibcon#[27=USB\r\n] 2006.229.22:09:29.51#ibcon#*before write, iclass 20, count 0 2006.229.22:09:29.51#ibcon#enter sib2, iclass 20, count 0 2006.229.22:09:29.51#ibcon#flushed, iclass 20, count 0 2006.229.22:09:29.51#ibcon#about to write, iclass 20, count 0 2006.229.22:09:29.51#ibcon#wrote, iclass 20, count 0 2006.229.22:09:29.51#ibcon#about to read 3, iclass 20, count 0 2006.229.22:09:29.54#ibcon#read 3, iclass 20, count 0 2006.229.22:09:29.54#ibcon#about to read 4, iclass 20, count 0 2006.229.22:09:29.54#ibcon#read 4, iclass 20, count 0 2006.229.22:09:29.54#ibcon#about to read 5, iclass 20, count 0 2006.229.22:09:29.54#ibcon#read 5, iclass 20, count 0 2006.229.22:09:29.54#ibcon#about to read 6, iclass 20, count 0 2006.229.22:09:29.54#ibcon#read 6, iclass 20, count 0 2006.229.22:09:29.54#ibcon#end of sib2, iclass 20, count 0 2006.229.22:09:29.54#ibcon#*after write, iclass 20, count 0 2006.229.22:09:29.54#ibcon#*before return 0, iclass 20, count 0 2006.229.22:09:29.54#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:29.54#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:09:29.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:09:29.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:09:29.54$vck44/vblo=3,649.99 2006.229.22:09:29.54#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.22:09:29.54#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.22:09:29.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:29.54#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:29.54#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:29.54#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:29.54#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:09:29.54#ibcon#first serial, iclass 22, count 0 2006.229.22:09:29.54#ibcon#enter sib2, iclass 22, count 0 2006.229.22:09:29.54#ibcon#flushed, iclass 22, count 0 2006.229.22:09:29.54#ibcon#about to write, iclass 22, count 0 2006.229.22:09:29.54#ibcon#wrote, iclass 22, count 0 2006.229.22:09:29.54#ibcon#about to read 3, iclass 22, count 0 2006.229.22:09:29.56#ibcon#read 3, iclass 22, count 0 2006.229.22:09:29.56#ibcon#about to read 4, iclass 22, count 0 2006.229.22:09:29.56#ibcon#read 4, iclass 22, count 0 2006.229.22:09:29.56#ibcon#about to read 5, iclass 22, count 0 2006.229.22:09:29.56#ibcon#read 5, iclass 22, count 0 2006.229.22:09:29.56#ibcon#about to read 6, iclass 22, count 0 2006.229.22:09:29.56#ibcon#read 6, iclass 22, count 0 2006.229.22:09:29.56#ibcon#end of sib2, iclass 22, count 0 2006.229.22:09:29.56#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:09:29.56#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:09:29.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:09:29.56#ibcon#*before write, iclass 22, count 0 2006.229.22:09:29.56#ibcon#enter sib2, iclass 22, count 0 2006.229.22:09:29.56#ibcon#flushed, iclass 22, count 0 2006.229.22:09:29.56#ibcon#about to write, iclass 22, count 0 2006.229.22:09:29.56#ibcon#wrote, iclass 22, count 0 2006.229.22:09:29.56#ibcon#about to read 3, iclass 22, count 0 2006.229.22:09:29.60#ibcon#read 3, iclass 22, count 0 2006.229.22:09:29.60#ibcon#about to read 4, iclass 22, count 0 2006.229.22:09:29.60#ibcon#read 4, iclass 22, count 0 2006.229.22:09:29.60#ibcon#about to read 5, iclass 22, count 0 2006.229.22:09:29.60#ibcon#read 5, iclass 22, count 0 2006.229.22:09:29.60#ibcon#about to read 6, iclass 22, count 0 2006.229.22:09:29.60#ibcon#read 6, iclass 22, count 0 2006.229.22:09:29.60#ibcon#end of sib2, iclass 22, count 0 2006.229.22:09:29.60#ibcon#*after write, iclass 22, count 0 2006.229.22:09:29.60#ibcon#*before return 0, iclass 22, count 0 2006.229.22:09:29.60#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:29.60#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:09:29.60#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:09:29.60#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:09:29.60$vck44/vb=3,4 2006.229.22:09:29.60#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.22:09:29.60#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.22:09:29.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:29.60#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:29.66#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:29.66#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:29.66#ibcon#enter wrdev, iclass 24, count 2 2006.229.22:09:29.66#ibcon#first serial, iclass 24, count 2 2006.229.22:09:29.66#ibcon#enter sib2, iclass 24, count 2 2006.229.22:09:29.66#ibcon#flushed, iclass 24, count 2 2006.229.22:09:29.66#ibcon#about to write, iclass 24, count 2 2006.229.22:09:29.66#ibcon#wrote, iclass 24, count 2 2006.229.22:09:29.66#ibcon#about to read 3, iclass 24, count 2 2006.229.22:09:29.68#ibcon#read 3, iclass 24, count 2 2006.229.22:09:29.68#ibcon#about to read 4, iclass 24, count 2 2006.229.22:09:29.68#ibcon#read 4, iclass 24, count 2 2006.229.22:09:29.68#ibcon#about to read 5, iclass 24, count 2 2006.229.22:09:29.68#ibcon#read 5, iclass 24, count 2 2006.229.22:09:29.68#ibcon#about to read 6, iclass 24, count 2 2006.229.22:09:29.68#ibcon#read 6, iclass 24, count 2 2006.229.22:09:29.68#ibcon#end of sib2, iclass 24, count 2 2006.229.22:09:29.68#ibcon#*mode == 0, iclass 24, count 2 2006.229.22:09:29.68#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.22:09:29.68#ibcon#[27=AT03-04\r\n] 2006.229.22:09:29.68#ibcon#*before write, iclass 24, count 2 2006.229.22:09:29.68#ibcon#enter sib2, iclass 24, count 2 2006.229.22:09:29.68#ibcon#flushed, iclass 24, count 2 2006.229.22:09:29.68#ibcon#about to write, iclass 24, count 2 2006.229.22:09:29.68#ibcon#wrote, iclass 24, count 2 2006.229.22:09:29.68#ibcon#about to read 3, iclass 24, count 2 2006.229.22:09:29.71#ibcon#read 3, iclass 24, count 2 2006.229.22:09:29.71#ibcon#about to read 4, iclass 24, count 2 2006.229.22:09:29.71#ibcon#read 4, iclass 24, count 2 2006.229.22:09:29.71#ibcon#about to read 5, iclass 24, count 2 2006.229.22:09:29.71#ibcon#read 5, iclass 24, count 2 2006.229.22:09:29.71#ibcon#about to read 6, iclass 24, count 2 2006.229.22:09:29.71#ibcon#read 6, iclass 24, count 2 2006.229.22:09:29.71#ibcon#end of sib2, iclass 24, count 2 2006.229.22:09:29.71#ibcon#*after write, iclass 24, count 2 2006.229.22:09:29.71#ibcon#*before return 0, iclass 24, count 2 2006.229.22:09:29.71#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:29.71#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:09:29.71#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.22:09:29.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:29.71#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:29.83#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:29.83#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:29.83#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:09:29.83#ibcon#first serial, iclass 24, count 0 2006.229.22:09:29.83#ibcon#enter sib2, iclass 24, count 0 2006.229.22:09:29.83#ibcon#flushed, iclass 24, count 0 2006.229.22:09:29.83#ibcon#about to write, iclass 24, count 0 2006.229.22:09:29.83#ibcon#wrote, iclass 24, count 0 2006.229.22:09:29.83#ibcon#about to read 3, iclass 24, count 0 2006.229.22:09:29.85#ibcon#read 3, iclass 24, count 0 2006.229.22:09:29.85#ibcon#about to read 4, iclass 24, count 0 2006.229.22:09:29.85#ibcon#read 4, iclass 24, count 0 2006.229.22:09:29.85#ibcon#about to read 5, iclass 24, count 0 2006.229.22:09:29.85#ibcon#read 5, iclass 24, count 0 2006.229.22:09:29.85#ibcon#about to read 6, iclass 24, count 0 2006.229.22:09:29.85#ibcon#read 6, iclass 24, count 0 2006.229.22:09:29.85#ibcon#end of sib2, iclass 24, count 0 2006.229.22:09:29.85#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:09:29.85#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:09:29.85#ibcon#[27=USB\r\n] 2006.229.22:09:29.85#ibcon#*before write, iclass 24, count 0 2006.229.22:09:29.85#ibcon#enter sib2, iclass 24, count 0 2006.229.22:09:29.85#ibcon#flushed, iclass 24, count 0 2006.229.22:09:29.85#ibcon#about to write, iclass 24, count 0 2006.229.22:09:29.85#ibcon#wrote, iclass 24, count 0 2006.229.22:09:29.85#ibcon#about to read 3, iclass 24, count 0 2006.229.22:09:29.88#ibcon#read 3, iclass 24, count 0 2006.229.22:09:29.88#ibcon#about to read 4, iclass 24, count 0 2006.229.22:09:29.88#ibcon#read 4, iclass 24, count 0 2006.229.22:09:29.88#ibcon#about to read 5, iclass 24, count 0 2006.229.22:09:29.88#ibcon#read 5, iclass 24, count 0 2006.229.22:09:29.88#ibcon#about to read 6, iclass 24, count 0 2006.229.22:09:29.88#ibcon#read 6, iclass 24, count 0 2006.229.22:09:29.88#ibcon#end of sib2, iclass 24, count 0 2006.229.22:09:29.88#ibcon#*after write, iclass 24, count 0 2006.229.22:09:29.88#ibcon#*before return 0, iclass 24, count 0 2006.229.22:09:29.88#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:29.88#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:09:29.88#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:09:29.88#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:09:29.88$vck44/vblo=4,679.99 2006.229.22:09:29.88#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.22:09:29.88#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.22:09:29.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:29.88#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:29.88#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:29.88#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:29.88#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:09:29.88#ibcon#first serial, iclass 26, count 0 2006.229.22:09:29.88#ibcon#enter sib2, iclass 26, count 0 2006.229.22:09:29.88#ibcon#flushed, iclass 26, count 0 2006.229.22:09:29.88#ibcon#about to write, iclass 26, count 0 2006.229.22:09:29.88#ibcon#wrote, iclass 26, count 0 2006.229.22:09:29.88#ibcon#about to read 3, iclass 26, count 0 2006.229.22:09:29.90#ibcon#read 3, iclass 26, count 0 2006.229.22:09:29.90#ibcon#about to read 4, iclass 26, count 0 2006.229.22:09:29.90#ibcon#read 4, iclass 26, count 0 2006.229.22:09:29.90#ibcon#about to read 5, iclass 26, count 0 2006.229.22:09:29.90#ibcon#read 5, iclass 26, count 0 2006.229.22:09:29.90#ibcon#about to read 6, iclass 26, count 0 2006.229.22:09:29.90#ibcon#read 6, iclass 26, count 0 2006.229.22:09:29.90#ibcon#end of sib2, iclass 26, count 0 2006.229.22:09:29.90#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:09:29.90#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:09:29.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:09:29.90#ibcon#*before write, iclass 26, count 0 2006.229.22:09:29.90#ibcon#enter sib2, iclass 26, count 0 2006.229.22:09:29.90#ibcon#flushed, iclass 26, count 0 2006.229.22:09:29.90#ibcon#about to write, iclass 26, count 0 2006.229.22:09:29.90#ibcon#wrote, iclass 26, count 0 2006.229.22:09:29.90#ibcon#about to read 3, iclass 26, count 0 2006.229.22:09:29.94#ibcon#read 3, iclass 26, count 0 2006.229.22:09:29.94#ibcon#about to read 4, iclass 26, count 0 2006.229.22:09:29.94#ibcon#read 4, iclass 26, count 0 2006.229.22:09:29.94#ibcon#about to read 5, iclass 26, count 0 2006.229.22:09:29.94#ibcon#read 5, iclass 26, count 0 2006.229.22:09:29.94#ibcon#about to read 6, iclass 26, count 0 2006.229.22:09:29.94#ibcon#read 6, iclass 26, count 0 2006.229.22:09:29.94#ibcon#end of sib2, iclass 26, count 0 2006.229.22:09:29.94#ibcon#*after write, iclass 26, count 0 2006.229.22:09:29.94#ibcon#*before return 0, iclass 26, count 0 2006.229.22:09:29.94#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:29.94#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:09:29.94#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:09:29.94#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:09:29.94$vck44/vb=4,4 2006.229.22:09:29.94#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.22:09:29.94#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.22:09:29.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:29.94#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:30.00#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:30.00#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:30.00#ibcon#enter wrdev, iclass 28, count 2 2006.229.22:09:30.00#ibcon#first serial, iclass 28, count 2 2006.229.22:09:30.00#ibcon#enter sib2, iclass 28, count 2 2006.229.22:09:30.00#ibcon#flushed, iclass 28, count 2 2006.229.22:09:30.00#ibcon#about to write, iclass 28, count 2 2006.229.22:09:30.00#ibcon#wrote, iclass 28, count 2 2006.229.22:09:30.00#ibcon#about to read 3, iclass 28, count 2 2006.229.22:09:30.02#ibcon#read 3, iclass 28, count 2 2006.229.22:09:30.02#ibcon#about to read 4, iclass 28, count 2 2006.229.22:09:30.02#ibcon#read 4, iclass 28, count 2 2006.229.22:09:30.02#ibcon#about to read 5, iclass 28, count 2 2006.229.22:09:30.02#ibcon#read 5, iclass 28, count 2 2006.229.22:09:30.02#ibcon#about to read 6, iclass 28, count 2 2006.229.22:09:30.02#ibcon#read 6, iclass 28, count 2 2006.229.22:09:30.02#ibcon#end of sib2, iclass 28, count 2 2006.229.22:09:30.02#ibcon#*mode == 0, iclass 28, count 2 2006.229.22:09:30.02#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.22:09:30.02#ibcon#[27=AT04-04\r\n] 2006.229.22:09:30.02#ibcon#*before write, iclass 28, count 2 2006.229.22:09:30.02#ibcon#enter sib2, iclass 28, count 2 2006.229.22:09:30.02#ibcon#flushed, iclass 28, count 2 2006.229.22:09:30.02#ibcon#about to write, iclass 28, count 2 2006.229.22:09:30.02#ibcon#wrote, iclass 28, count 2 2006.229.22:09:30.02#ibcon#about to read 3, iclass 28, count 2 2006.229.22:09:30.05#ibcon#read 3, iclass 28, count 2 2006.229.22:09:30.05#ibcon#about to read 4, iclass 28, count 2 2006.229.22:09:30.05#ibcon#read 4, iclass 28, count 2 2006.229.22:09:30.05#ibcon#about to read 5, iclass 28, count 2 2006.229.22:09:30.05#ibcon#read 5, iclass 28, count 2 2006.229.22:09:30.05#ibcon#about to read 6, iclass 28, count 2 2006.229.22:09:30.05#ibcon#read 6, iclass 28, count 2 2006.229.22:09:30.05#ibcon#end of sib2, iclass 28, count 2 2006.229.22:09:30.05#ibcon#*after write, iclass 28, count 2 2006.229.22:09:30.05#ibcon#*before return 0, iclass 28, count 2 2006.229.22:09:30.05#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:30.05#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:09:30.05#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.22:09:30.05#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:30.05#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:30.17#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:30.17#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:30.17#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:09:30.17#ibcon#first serial, iclass 28, count 0 2006.229.22:09:30.17#ibcon#enter sib2, iclass 28, count 0 2006.229.22:09:30.17#ibcon#flushed, iclass 28, count 0 2006.229.22:09:30.17#ibcon#about to write, iclass 28, count 0 2006.229.22:09:30.17#ibcon#wrote, iclass 28, count 0 2006.229.22:09:30.17#ibcon#about to read 3, iclass 28, count 0 2006.229.22:09:30.19#ibcon#read 3, iclass 28, count 0 2006.229.22:09:30.19#ibcon#about to read 4, iclass 28, count 0 2006.229.22:09:30.19#ibcon#read 4, iclass 28, count 0 2006.229.22:09:30.19#ibcon#about to read 5, iclass 28, count 0 2006.229.22:09:30.19#ibcon#read 5, iclass 28, count 0 2006.229.22:09:30.19#ibcon#about to read 6, iclass 28, count 0 2006.229.22:09:30.19#ibcon#read 6, iclass 28, count 0 2006.229.22:09:30.19#ibcon#end of sib2, iclass 28, count 0 2006.229.22:09:30.19#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:09:30.19#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:09:30.19#ibcon#[27=USB\r\n] 2006.229.22:09:30.19#ibcon#*before write, iclass 28, count 0 2006.229.22:09:30.19#ibcon#enter sib2, iclass 28, count 0 2006.229.22:09:30.19#ibcon#flushed, iclass 28, count 0 2006.229.22:09:30.19#ibcon#about to write, iclass 28, count 0 2006.229.22:09:30.19#ibcon#wrote, iclass 28, count 0 2006.229.22:09:30.19#ibcon#about to read 3, iclass 28, count 0 2006.229.22:09:30.22#ibcon#read 3, iclass 28, count 0 2006.229.22:09:30.22#ibcon#about to read 4, iclass 28, count 0 2006.229.22:09:30.22#ibcon#read 4, iclass 28, count 0 2006.229.22:09:30.22#ibcon#about to read 5, iclass 28, count 0 2006.229.22:09:30.22#ibcon#read 5, iclass 28, count 0 2006.229.22:09:30.22#ibcon#about to read 6, iclass 28, count 0 2006.229.22:09:30.22#ibcon#read 6, iclass 28, count 0 2006.229.22:09:30.22#ibcon#end of sib2, iclass 28, count 0 2006.229.22:09:30.22#ibcon#*after write, iclass 28, count 0 2006.229.22:09:30.22#ibcon#*before return 0, iclass 28, count 0 2006.229.22:09:30.22#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:30.22#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:09:30.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:09:30.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:09:30.22$vck44/vblo=5,709.99 2006.229.22:09:30.22#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.22:09:30.22#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.22:09:30.22#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:30.22#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:30.22#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:30.22#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:30.22#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:09:30.22#ibcon#first serial, iclass 30, count 0 2006.229.22:09:30.22#ibcon#enter sib2, iclass 30, count 0 2006.229.22:09:30.22#ibcon#flushed, iclass 30, count 0 2006.229.22:09:30.22#ibcon#about to write, iclass 30, count 0 2006.229.22:09:30.22#ibcon#wrote, iclass 30, count 0 2006.229.22:09:30.22#ibcon#about to read 3, iclass 30, count 0 2006.229.22:09:30.24#ibcon#read 3, iclass 30, count 0 2006.229.22:09:30.24#ibcon#about to read 4, iclass 30, count 0 2006.229.22:09:30.24#ibcon#read 4, iclass 30, count 0 2006.229.22:09:30.24#ibcon#about to read 5, iclass 30, count 0 2006.229.22:09:30.24#ibcon#read 5, iclass 30, count 0 2006.229.22:09:30.24#ibcon#about to read 6, iclass 30, count 0 2006.229.22:09:30.24#ibcon#read 6, iclass 30, count 0 2006.229.22:09:30.24#ibcon#end of sib2, iclass 30, count 0 2006.229.22:09:30.24#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:09:30.24#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:09:30.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:09:30.24#ibcon#*before write, iclass 30, count 0 2006.229.22:09:30.24#ibcon#enter sib2, iclass 30, count 0 2006.229.22:09:30.24#ibcon#flushed, iclass 30, count 0 2006.229.22:09:30.24#ibcon#about to write, iclass 30, count 0 2006.229.22:09:30.24#ibcon#wrote, iclass 30, count 0 2006.229.22:09:30.24#ibcon#about to read 3, iclass 30, count 0 2006.229.22:09:30.28#ibcon#read 3, iclass 30, count 0 2006.229.22:09:30.28#ibcon#about to read 4, iclass 30, count 0 2006.229.22:09:30.28#ibcon#read 4, iclass 30, count 0 2006.229.22:09:30.28#ibcon#about to read 5, iclass 30, count 0 2006.229.22:09:30.28#ibcon#read 5, iclass 30, count 0 2006.229.22:09:30.28#ibcon#about to read 6, iclass 30, count 0 2006.229.22:09:30.28#ibcon#read 6, iclass 30, count 0 2006.229.22:09:30.28#ibcon#end of sib2, iclass 30, count 0 2006.229.22:09:30.28#ibcon#*after write, iclass 30, count 0 2006.229.22:09:30.28#ibcon#*before return 0, iclass 30, count 0 2006.229.22:09:30.28#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:30.28#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:09:30.28#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:09:30.28#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:09:30.28$vck44/vb=5,4 2006.229.22:09:30.28#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.22:09:30.28#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.22:09:30.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:30.28#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:30.34#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:30.34#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:30.34#ibcon#enter wrdev, iclass 32, count 2 2006.229.22:09:30.34#ibcon#first serial, iclass 32, count 2 2006.229.22:09:30.34#ibcon#enter sib2, iclass 32, count 2 2006.229.22:09:30.34#ibcon#flushed, iclass 32, count 2 2006.229.22:09:30.34#ibcon#about to write, iclass 32, count 2 2006.229.22:09:30.34#ibcon#wrote, iclass 32, count 2 2006.229.22:09:30.34#ibcon#about to read 3, iclass 32, count 2 2006.229.22:09:30.36#ibcon#read 3, iclass 32, count 2 2006.229.22:09:30.36#ibcon#about to read 4, iclass 32, count 2 2006.229.22:09:30.36#ibcon#read 4, iclass 32, count 2 2006.229.22:09:30.36#ibcon#about to read 5, iclass 32, count 2 2006.229.22:09:30.36#ibcon#read 5, iclass 32, count 2 2006.229.22:09:30.36#ibcon#about to read 6, iclass 32, count 2 2006.229.22:09:30.36#ibcon#read 6, iclass 32, count 2 2006.229.22:09:30.36#ibcon#end of sib2, iclass 32, count 2 2006.229.22:09:30.36#ibcon#*mode == 0, iclass 32, count 2 2006.229.22:09:30.36#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.22:09:30.36#ibcon#[27=AT05-04\r\n] 2006.229.22:09:30.36#ibcon#*before write, iclass 32, count 2 2006.229.22:09:30.36#ibcon#enter sib2, iclass 32, count 2 2006.229.22:09:30.36#ibcon#flushed, iclass 32, count 2 2006.229.22:09:30.36#ibcon#about to write, iclass 32, count 2 2006.229.22:09:30.36#ibcon#wrote, iclass 32, count 2 2006.229.22:09:30.36#ibcon#about to read 3, iclass 32, count 2 2006.229.22:09:30.39#ibcon#read 3, iclass 32, count 2 2006.229.22:09:30.39#ibcon#about to read 4, iclass 32, count 2 2006.229.22:09:30.39#ibcon#read 4, iclass 32, count 2 2006.229.22:09:30.39#ibcon#about to read 5, iclass 32, count 2 2006.229.22:09:30.39#ibcon#read 5, iclass 32, count 2 2006.229.22:09:30.39#ibcon#about to read 6, iclass 32, count 2 2006.229.22:09:30.39#ibcon#read 6, iclass 32, count 2 2006.229.22:09:30.39#ibcon#end of sib2, iclass 32, count 2 2006.229.22:09:30.39#ibcon#*after write, iclass 32, count 2 2006.229.22:09:30.39#ibcon#*before return 0, iclass 32, count 2 2006.229.22:09:30.39#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:30.39#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:09:30.39#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.22:09:30.39#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:30.39#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:30.51#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:30.51#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:30.51#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:09:30.51#ibcon#first serial, iclass 32, count 0 2006.229.22:09:30.51#ibcon#enter sib2, iclass 32, count 0 2006.229.22:09:30.51#ibcon#flushed, iclass 32, count 0 2006.229.22:09:30.51#ibcon#about to write, iclass 32, count 0 2006.229.22:09:30.51#ibcon#wrote, iclass 32, count 0 2006.229.22:09:30.51#ibcon#about to read 3, iclass 32, count 0 2006.229.22:09:30.53#ibcon#read 3, iclass 32, count 0 2006.229.22:09:30.53#ibcon#about to read 4, iclass 32, count 0 2006.229.22:09:30.53#ibcon#read 4, iclass 32, count 0 2006.229.22:09:30.53#ibcon#about to read 5, iclass 32, count 0 2006.229.22:09:30.53#ibcon#read 5, iclass 32, count 0 2006.229.22:09:30.53#ibcon#about to read 6, iclass 32, count 0 2006.229.22:09:30.53#ibcon#read 6, iclass 32, count 0 2006.229.22:09:30.53#ibcon#end of sib2, iclass 32, count 0 2006.229.22:09:30.53#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:09:30.53#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:09:30.53#ibcon#[27=USB\r\n] 2006.229.22:09:30.53#ibcon#*before write, iclass 32, count 0 2006.229.22:09:30.53#ibcon#enter sib2, iclass 32, count 0 2006.229.22:09:30.53#ibcon#flushed, iclass 32, count 0 2006.229.22:09:30.53#ibcon#about to write, iclass 32, count 0 2006.229.22:09:30.53#ibcon#wrote, iclass 32, count 0 2006.229.22:09:30.53#ibcon#about to read 3, iclass 32, count 0 2006.229.22:09:30.56#ibcon#read 3, iclass 32, count 0 2006.229.22:09:30.56#ibcon#about to read 4, iclass 32, count 0 2006.229.22:09:30.56#ibcon#read 4, iclass 32, count 0 2006.229.22:09:30.56#ibcon#about to read 5, iclass 32, count 0 2006.229.22:09:30.56#ibcon#read 5, iclass 32, count 0 2006.229.22:09:30.56#ibcon#about to read 6, iclass 32, count 0 2006.229.22:09:30.56#ibcon#read 6, iclass 32, count 0 2006.229.22:09:30.56#ibcon#end of sib2, iclass 32, count 0 2006.229.22:09:30.56#ibcon#*after write, iclass 32, count 0 2006.229.22:09:30.56#ibcon#*before return 0, iclass 32, count 0 2006.229.22:09:30.56#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:30.56#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:09:30.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:09:30.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:09:30.56$vck44/vblo=6,719.99 2006.229.22:09:30.56#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.22:09:30.56#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.22:09:30.56#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:30.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:30.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:30.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:30.56#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:09:30.56#ibcon#first serial, iclass 34, count 0 2006.229.22:09:30.56#ibcon#enter sib2, iclass 34, count 0 2006.229.22:09:30.56#ibcon#flushed, iclass 34, count 0 2006.229.22:09:30.56#ibcon#about to write, iclass 34, count 0 2006.229.22:09:30.56#ibcon#wrote, iclass 34, count 0 2006.229.22:09:30.56#ibcon#about to read 3, iclass 34, count 0 2006.229.22:09:30.58#ibcon#read 3, iclass 34, count 0 2006.229.22:09:30.58#ibcon#about to read 4, iclass 34, count 0 2006.229.22:09:30.58#ibcon#read 4, iclass 34, count 0 2006.229.22:09:30.58#ibcon#about to read 5, iclass 34, count 0 2006.229.22:09:30.58#ibcon#read 5, iclass 34, count 0 2006.229.22:09:30.58#ibcon#about to read 6, iclass 34, count 0 2006.229.22:09:30.58#ibcon#read 6, iclass 34, count 0 2006.229.22:09:30.58#ibcon#end of sib2, iclass 34, count 0 2006.229.22:09:30.58#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:09:30.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:09:30.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:09:30.58#ibcon#*before write, iclass 34, count 0 2006.229.22:09:30.58#ibcon#enter sib2, iclass 34, count 0 2006.229.22:09:30.58#ibcon#flushed, iclass 34, count 0 2006.229.22:09:30.58#ibcon#about to write, iclass 34, count 0 2006.229.22:09:30.58#ibcon#wrote, iclass 34, count 0 2006.229.22:09:30.58#ibcon#about to read 3, iclass 34, count 0 2006.229.22:09:30.62#ibcon#read 3, iclass 34, count 0 2006.229.22:09:30.62#ibcon#about to read 4, iclass 34, count 0 2006.229.22:09:30.62#ibcon#read 4, iclass 34, count 0 2006.229.22:09:30.62#ibcon#about to read 5, iclass 34, count 0 2006.229.22:09:30.62#ibcon#read 5, iclass 34, count 0 2006.229.22:09:30.62#ibcon#about to read 6, iclass 34, count 0 2006.229.22:09:30.62#ibcon#read 6, iclass 34, count 0 2006.229.22:09:30.62#ibcon#end of sib2, iclass 34, count 0 2006.229.22:09:30.62#ibcon#*after write, iclass 34, count 0 2006.229.22:09:30.62#ibcon#*before return 0, iclass 34, count 0 2006.229.22:09:30.62#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:30.62#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:09:30.62#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:09:30.62#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:09:30.62$vck44/vb=6,4 2006.229.22:09:30.62#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.22:09:30.62#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.22:09:30.62#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:30.62#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:30.68#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:30.68#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:30.68#ibcon#enter wrdev, iclass 36, count 2 2006.229.22:09:30.68#ibcon#first serial, iclass 36, count 2 2006.229.22:09:30.68#ibcon#enter sib2, iclass 36, count 2 2006.229.22:09:30.68#ibcon#flushed, iclass 36, count 2 2006.229.22:09:30.68#ibcon#about to write, iclass 36, count 2 2006.229.22:09:30.68#ibcon#wrote, iclass 36, count 2 2006.229.22:09:30.68#ibcon#about to read 3, iclass 36, count 2 2006.229.22:09:30.70#ibcon#read 3, iclass 36, count 2 2006.229.22:09:30.70#ibcon#about to read 4, iclass 36, count 2 2006.229.22:09:30.70#ibcon#read 4, iclass 36, count 2 2006.229.22:09:30.70#ibcon#about to read 5, iclass 36, count 2 2006.229.22:09:30.70#ibcon#read 5, iclass 36, count 2 2006.229.22:09:30.70#ibcon#about to read 6, iclass 36, count 2 2006.229.22:09:30.70#ibcon#read 6, iclass 36, count 2 2006.229.22:09:30.70#ibcon#end of sib2, iclass 36, count 2 2006.229.22:09:30.70#ibcon#*mode == 0, iclass 36, count 2 2006.229.22:09:30.70#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.22:09:30.70#ibcon#[27=AT06-04\r\n] 2006.229.22:09:30.70#ibcon#*before write, iclass 36, count 2 2006.229.22:09:30.70#ibcon#enter sib2, iclass 36, count 2 2006.229.22:09:30.70#ibcon#flushed, iclass 36, count 2 2006.229.22:09:30.70#ibcon#about to write, iclass 36, count 2 2006.229.22:09:30.70#ibcon#wrote, iclass 36, count 2 2006.229.22:09:30.70#ibcon#about to read 3, iclass 36, count 2 2006.229.22:09:30.73#ibcon#read 3, iclass 36, count 2 2006.229.22:09:30.73#ibcon#about to read 4, iclass 36, count 2 2006.229.22:09:30.73#ibcon#read 4, iclass 36, count 2 2006.229.22:09:30.73#ibcon#about to read 5, iclass 36, count 2 2006.229.22:09:30.73#ibcon#read 5, iclass 36, count 2 2006.229.22:09:30.73#ibcon#about to read 6, iclass 36, count 2 2006.229.22:09:30.73#ibcon#read 6, iclass 36, count 2 2006.229.22:09:30.73#ibcon#end of sib2, iclass 36, count 2 2006.229.22:09:30.73#ibcon#*after write, iclass 36, count 2 2006.229.22:09:30.73#ibcon#*before return 0, iclass 36, count 2 2006.229.22:09:30.73#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:30.73#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:09:30.73#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.22:09:30.73#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:30.73#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:30.85#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:30.85#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:30.85#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:09:30.85#ibcon#first serial, iclass 36, count 0 2006.229.22:09:30.85#ibcon#enter sib2, iclass 36, count 0 2006.229.22:09:30.85#ibcon#flushed, iclass 36, count 0 2006.229.22:09:30.85#ibcon#about to write, iclass 36, count 0 2006.229.22:09:30.85#ibcon#wrote, iclass 36, count 0 2006.229.22:09:30.85#ibcon#about to read 3, iclass 36, count 0 2006.229.22:09:30.87#ibcon#read 3, iclass 36, count 0 2006.229.22:09:30.87#ibcon#about to read 4, iclass 36, count 0 2006.229.22:09:30.87#ibcon#read 4, iclass 36, count 0 2006.229.22:09:30.87#ibcon#about to read 5, iclass 36, count 0 2006.229.22:09:30.87#ibcon#read 5, iclass 36, count 0 2006.229.22:09:30.87#ibcon#about to read 6, iclass 36, count 0 2006.229.22:09:30.87#ibcon#read 6, iclass 36, count 0 2006.229.22:09:30.87#ibcon#end of sib2, iclass 36, count 0 2006.229.22:09:30.87#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:09:30.87#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:09:30.87#ibcon#[27=USB\r\n] 2006.229.22:09:30.87#ibcon#*before write, iclass 36, count 0 2006.229.22:09:30.87#ibcon#enter sib2, iclass 36, count 0 2006.229.22:09:30.87#ibcon#flushed, iclass 36, count 0 2006.229.22:09:30.87#ibcon#about to write, iclass 36, count 0 2006.229.22:09:30.87#ibcon#wrote, iclass 36, count 0 2006.229.22:09:30.87#ibcon#about to read 3, iclass 36, count 0 2006.229.22:09:30.90#ibcon#read 3, iclass 36, count 0 2006.229.22:09:30.90#ibcon#about to read 4, iclass 36, count 0 2006.229.22:09:30.90#ibcon#read 4, iclass 36, count 0 2006.229.22:09:30.90#ibcon#about to read 5, iclass 36, count 0 2006.229.22:09:30.90#ibcon#read 5, iclass 36, count 0 2006.229.22:09:30.90#ibcon#about to read 6, iclass 36, count 0 2006.229.22:09:30.90#ibcon#read 6, iclass 36, count 0 2006.229.22:09:30.90#ibcon#end of sib2, iclass 36, count 0 2006.229.22:09:30.90#ibcon#*after write, iclass 36, count 0 2006.229.22:09:30.90#ibcon#*before return 0, iclass 36, count 0 2006.229.22:09:30.90#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:30.90#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:09:30.90#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:09:30.90#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:09:30.90$vck44/vblo=7,734.99 2006.229.22:09:30.90#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.22:09:30.90#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.22:09:30.90#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:30.90#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:30.90#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:30.90#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:30.90#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:09:30.90#ibcon#first serial, iclass 38, count 0 2006.229.22:09:30.90#ibcon#enter sib2, iclass 38, count 0 2006.229.22:09:30.90#ibcon#flushed, iclass 38, count 0 2006.229.22:09:30.90#ibcon#about to write, iclass 38, count 0 2006.229.22:09:30.90#ibcon#wrote, iclass 38, count 0 2006.229.22:09:30.90#ibcon#about to read 3, iclass 38, count 0 2006.229.22:09:30.92#ibcon#read 3, iclass 38, count 0 2006.229.22:09:30.92#ibcon#about to read 4, iclass 38, count 0 2006.229.22:09:30.92#ibcon#read 4, iclass 38, count 0 2006.229.22:09:30.92#ibcon#about to read 5, iclass 38, count 0 2006.229.22:09:30.92#ibcon#read 5, iclass 38, count 0 2006.229.22:09:30.92#ibcon#about to read 6, iclass 38, count 0 2006.229.22:09:30.92#ibcon#read 6, iclass 38, count 0 2006.229.22:09:30.92#ibcon#end of sib2, iclass 38, count 0 2006.229.22:09:30.92#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:09:30.92#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:09:30.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:09:30.92#ibcon#*before write, iclass 38, count 0 2006.229.22:09:30.92#ibcon#enter sib2, iclass 38, count 0 2006.229.22:09:30.92#ibcon#flushed, iclass 38, count 0 2006.229.22:09:30.92#ibcon#about to write, iclass 38, count 0 2006.229.22:09:30.92#ibcon#wrote, iclass 38, count 0 2006.229.22:09:30.92#ibcon#about to read 3, iclass 38, count 0 2006.229.22:09:30.96#ibcon#read 3, iclass 38, count 0 2006.229.22:09:30.96#ibcon#about to read 4, iclass 38, count 0 2006.229.22:09:30.96#ibcon#read 4, iclass 38, count 0 2006.229.22:09:30.96#ibcon#about to read 5, iclass 38, count 0 2006.229.22:09:30.96#ibcon#read 5, iclass 38, count 0 2006.229.22:09:30.96#ibcon#about to read 6, iclass 38, count 0 2006.229.22:09:30.96#ibcon#read 6, iclass 38, count 0 2006.229.22:09:30.96#ibcon#end of sib2, iclass 38, count 0 2006.229.22:09:30.96#ibcon#*after write, iclass 38, count 0 2006.229.22:09:30.96#ibcon#*before return 0, iclass 38, count 0 2006.229.22:09:30.96#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:30.96#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:09:30.96#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:09:30.96#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:09:30.96$vck44/vb=7,4 2006.229.22:09:30.96#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.22:09:30.96#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.22:09:30.96#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:30.96#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:31.02#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:31.02#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:31.02#ibcon#enter wrdev, iclass 40, count 2 2006.229.22:09:31.02#ibcon#first serial, iclass 40, count 2 2006.229.22:09:31.02#ibcon#enter sib2, iclass 40, count 2 2006.229.22:09:31.02#ibcon#flushed, iclass 40, count 2 2006.229.22:09:31.02#ibcon#about to write, iclass 40, count 2 2006.229.22:09:31.02#ibcon#wrote, iclass 40, count 2 2006.229.22:09:31.02#ibcon#about to read 3, iclass 40, count 2 2006.229.22:09:31.04#ibcon#read 3, iclass 40, count 2 2006.229.22:09:31.04#ibcon#about to read 4, iclass 40, count 2 2006.229.22:09:31.04#ibcon#read 4, iclass 40, count 2 2006.229.22:09:31.04#ibcon#about to read 5, iclass 40, count 2 2006.229.22:09:31.04#ibcon#read 5, iclass 40, count 2 2006.229.22:09:31.04#ibcon#about to read 6, iclass 40, count 2 2006.229.22:09:31.04#ibcon#read 6, iclass 40, count 2 2006.229.22:09:31.04#ibcon#end of sib2, iclass 40, count 2 2006.229.22:09:31.04#ibcon#*mode == 0, iclass 40, count 2 2006.229.22:09:31.04#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.22:09:31.04#ibcon#[27=AT07-04\r\n] 2006.229.22:09:31.04#ibcon#*before write, iclass 40, count 2 2006.229.22:09:31.04#ibcon#enter sib2, iclass 40, count 2 2006.229.22:09:31.04#ibcon#flushed, iclass 40, count 2 2006.229.22:09:31.04#ibcon#about to write, iclass 40, count 2 2006.229.22:09:31.04#ibcon#wrote, iclass 40, count 2 2006.229.22:09:31.04#ibcon#about to read 3, iclass 40, count 2 2006.229.22:09:31.07#ibcon#read 3, iclass 40, count 2 2006.229.22:09:31.07#ibcon#about to read 4, iclass 40, count 2 2006.229.22:09:31.07#ibcon#read 4, iclass 40, count 2 2006.229.22:09:31.07#ibcon#about to read 5, iclass 40, count 2 2006.229.22:09:31.07#ibcon#read 5, iclass 40, count 2 2006.229.22:09:31.07#ibcon#about to read 6, iclass 40, count 2 2006.229.22:09:31.07#ibcon#read 6, iclass 40, count 2 2006.229.22:09:31.07#ibcon#end of sib2, iclass 40, count 2 2006.229.22:09:31.07#ibcon#*after write, iclass 40, count 2 2006.229.22:09:31.07#ibcon#*before return 0, iclass 40, count 2 2006.229.22:09:31.07#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:31.07#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:09:31.07#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.22:09:31.07#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:31.07#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:31.19#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:31.19#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:31.19#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:09:31.19#ibcon#first serial, iclass 40, count 0 2006.229.22:09:31.19#ibcon#enter sib2, iclass 40, count 0 2006.229.22:09:31.19#ibcon#flushed, iclass 40, count 0 2006.229.22:09:31.19#ibcon#about to write, iclass 40, count 0 2006.229.22:09:31.19#ibcon#wrote, iclass 40, count 0 2006.229.22:09:31.19#ibcon#about to read 3, iclass 40, count 0 2006.229.22:09:31.21#ibcon#read 3, iclass 40, count 0 2006.229.22:09:31.21#ibcon#about to read 4, iclass 40, count 0 2006.229.22:09:31.21#ibcon#read 4, iclass 40, count 0 2006.229.22:09:31.21#ibcon#about to read 5, iclass 40, count 0 2006.229.22:09:31.21#ibcon#read 5, iclass 40, count 0 2006.229.22:09:31.21#ibcon#about to read 6, iclass 40, count 0 2006.229.22:09:31.21#ibcon#read 6, iclass 40, count 0 2006.229.22:09:31.21#ibcon#end of sib2, iclass 40, count 0 2006.229.22:09:31.21#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:09:31.21#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:09:31.21#ibcon#[27=USB\r\n] 2006.229.22:09:31.21#ibcon#*before write, iclass 40, count 0 2006.229.22:09:31.21#ibcon#enter sib2, iclass 40, count 0 2006.229.22:09:31.21#ibcon#flushed, iclass 40, count 0 2006.229.22:09:31.21#ibcon#about to write, iclass 40, count 0 2006.229.22:09:31.21#ibcon#wrote, iclass 40, count 0 2006.229.22:09:31.21#ibcon#about to read 3, iclass 40, count 0 2006.229.22:09:31.24#ibcon#read 3, iclass 40, count 0 2006.229.22:09:31.24#ibcon#about to read 4, iclass 40, count 0 2006.229.22:09:31.24#ibcon#read 4, iclass 40, count 0 2006.229.22:09:31.24#ibcon#about to read 5, iclass 40, count 0 2006.229.22:09:31.24#ibcon#read 5, iclass 40, count 0 2006.229.22:09:31.24#ibcon#about to read 6, iclass 40, count 0 2006.229.22:09:31.24#ibcon#read 6, iclass 40, count 0 2006.229.22:09:31.24#ibcon#end of sib2, iclass 40, count 0 2006.229.22:09:31.24#ibcon#*after write, iclass 40, count 0 2006.229.22:09:31.24#ibcon#*before return 0, iclass 40, count 0 2006.229.22:09:31.24#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:31.24#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:09:31.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:09:31.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:09:31.24$vck44/vblo=8,744.99 2006.229.22:09:31.24#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.22:09:31.24#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.22:09:31.24#ibcon#ireg 17 cls_cnt 0 2006.229.22:09:31.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:09:31.24#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:09:31.24#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:09:31.24#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:09:31.24#ibcon#first serial, iclass 4, count 0 2006.229.22:09:31.24#ibcon#enter sib2, iclass 4, count 0 2006.229.22:09:31.24#ibcon#flushed, iclass 4, count 0 2006.229.22:09:31.24#ibcon#about to write, iclass 4, count 0 2006.229.22:09:31.24#ibcon#wrote, iclass 4, count 0 2006.229.22:09:31.24#ibcon#about to read 3, iclass 4, count 0 2006.229.22:09:31.26#ibcon#read 3, iclass 4, count 0 2006.229.22:09:31.26#ibcon#about to read 4, iclass 4, count 0 2006.229.22:09:31.26#ibcon#read 4, iclass 4, count 0 2006.229.22:09:31.26#ibcon#about to read 5, iclass 4, count 0 2006.229.22:09:31.26#ibcon#read 5, iclass 4, count 0 2006.229.22:09:31.26#ibcon#about to read 6, iclass 4, count 0 2006.229.22:09:31.26#ibcon#read 6, iclass 4, count 0 2006.229.22:09:31.26#ibcon#end of sib2, iclass 4, count 0 2006.229.22:09:31.26#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:09:31.26#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:09:31.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:09:31.26#ibcon#*before write, iclass 4, count 0 2006.229.22:09:31.26#ibcon#enter sib2, iclass 4, count 0 2006.229.22:09:31.26#ibcon#flushed, iclass 4, count 0 2006.229.22:09:31.26#ibcon#about to write, iclass 4, count 0 2006.229.22:09:31.26#ibcon#wrote, iclass 4, count 0 2006.229.22:09:31.26#ibcon#about to read 3, iclass 4, count 0 2006.229.22:09:31.30#ibcon#read 3, iclass 4, count 0 2006.229.22:09:31.30#ibcon#about to read 4, iclass 4, count 0 2006.229.22:09:31.30#ibcon#read 4, iclass 4, count 0 2006.229.22:09:31.30#ibcon#about to read 5, iclass 4, count 0 2006.229.22:09:31.30#ibcon#read 5, iclass 4, count 0 2006.229.22:09:31.30#ibcon#about to read 6, iclass 4, count 0 2006.229.22:09:31.30#ibcon#read 6, iclass 4, count 0 2006.229.22:09:31.30#ibcon#end of sib2, iclass 4, count 0 2006.229.22:09:31.30#ibcon#*after write, iclass 4, count 0 2006.229.22:09:31.30#ibcon#*before return 0, iclass 4, count 0 2006.229.22:09:31.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:09:31.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:09:31.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:09:31.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:09:31.30$vck44/vb=8,4 2006.229.22:09:31.30#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.22:09:31.30#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.22:09:31.30#ibcon#ireg 11 cls_cnt 2 2006.229.22:09:31.30#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:09:31.36#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:09:31.36#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:09:31.36#ibcon#enter wrdev, iclass 6, count 2 2006.229.22:09:31.36#ibcon#first serial, iclass 6, count 2 2006.229.22:09:31.36#ibcon#enter sib2, iclass 6, count 2 2006.229.22:09:31.36#ibcon#flushed, iclass 6, count 2 2006.229.22:09:31.36#ibcon#about to write, iclass 6, count 2 2006.229.22:09:31.36#ibcon#wrote, iclass 6, count 2 2006.229.22:09:31.36#ibcon#about to read 3, iclass 6, count 2 2006.229.22:09:31.38#ibcon#read 3, iclass 6, count 2 2006.229.22:09:31.38#ibcon#about to read 4, iclass 6, count 2 2006.229.22:09:31.38#ibcon#read 4, iclass 6, count 2 2006.229.22:09:31.38#ibcon#about to read 5, iclass 6, count 2 2006.229.22:09:31.38#ibcon#read 5, iclass 6, count 2 2006.229.22:09:31.38#ibcon#about to read 6, iclass 6, count 2 2006.229.22:09:31.38#ibcon#read 6, iclass 6, count 2 2006.229.22:09:31.38#ibcon#end of sib2, iclass 6, count 2 2006.229.22:09:31.38#ibcon#*mode == 0, iclass 6, count 2 2006.229.22:09:31.38#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.22:09:31.38#ibcon#[27=AT08-04\r\n] 2006.229.22:09:31.38#ibcon#*before write, iclass 6, count 2 2006.229.22:09:31.38#ibcon#enter sib2, iclass 6, count 2 2006.229.22:09:31.38#ibcon#flushed, iclass 6, count 2 2006.229.22:09:31.38#ibcon#about to write, iclass 6, count 2 2006.229.22:09:31.38#ibcon#wrote, iclass 6, count 2 2006.229.22:09:31.38#ibcon#about to read 3, iclass 6, count 2 2006.229.22:09:31.41#ibcon#read 3, iclass 6, count 2 2006.229.22:09:31.41#ibcon#about to read 4, iclass 6, count 2 2006.229.22:09:31.41#ibcon#read 4, iclass 6, count 2 2006.229.22:09:31.41#ibcon#about to read 5, iclass 6, count 2 2006.229.22:09:31.41#ibcon#read 5, iclass 6, count 2 2006.229.22:09:31.41#ibcon#about to read 6, iclass 6, count 2 2006.229.22:09:31.41#ibcon#read 6, iclass 6, count 2 2006.229.22:09:31.41#ibcon#end of sib2, iclass 6, count 2 2006.229.22:09:31.41#ibcon#*after write, iclass 6, count 2 2006.229.22:09:31.41#ibcon#*before return 0, iclass 6, count 2 2006.229.22:09:31.41#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:09:31.41#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:09:31.41#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.22:09:31.41#ibcon#ireg 7 cls_cnt 0 2006.229.22:09:31.41#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:09:31.53#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:09:31.53#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:09:31.53#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:09:31.53#ibcon#first serial, iclass 6, count 0 2006.229.22:09:31.53#ibcon#enter sib2, iclass 6, count 0 2006.229.22:09:31.53#ibcon#flushed, iclass 6, count 0 2006.229.22:09:31.53#ibcon#about to write, iclass 6, count 0 2006.229.22:09:31.53#ibcon#wrote, iclass 6, count 0 2006.229.22:09:31.53#ibcon#about to read 3, iclass 6, count 0 2006.229.22:09:31.55#ibcon#read 3, iclass 6, count 0 2006.229.22:09:31.55#ibcon#about to read 4, iclass 6, count 0 2006.229.22:09:31.55#ibcon#read 4, iclass 6, count 0 2006.229.22:09:31.55#ibcon#about to read 5, iclass 6, count 0 2006.229.22:09:31.55#ibcon#read 5, iclass 6, count 0 2006.229.22:09:31.55#ibcon#about to read 6, iclass 6, count 0 2006.229.22:09:31.55#ibcon#read 6, iclass 6, count 0 2006.229.22:09:31.55#ibcon#end of sib2, iclass 6, count 0 2006.229.22:09:31.55#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:09:31.55#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:09:31.55#ibcon#[27=USB\r\n] 2006.229.22:09:31.55#ibcon#*before write, iclass 6, count 0 2006.229.22:09:31.55#ibcon#enter sib2, iclass 6, count 0 2006.229.22:09:31.55#ibcon#flushed, iclass 6, count 0 2006.229.22:09:31.55#ibcon#about to write, iclass 6, count 0 2006.229.22:09:31.55#ibcon#wrote, iclass 6, count 0 2006.229.22:09:31.55#ibcon#about to read 3, iclass 6, count 0 2006.229.22:09:31.58#ibcon#read 3, iclass 6, count 0 2006.229.22:09:31.58#ibcon#about to read 4, iclass 6, count 0 2006.229.22:09:31.58#ibcon#read 4, iclass 6, count 0 2006.229.22:09:31.58#ibcon#about to read 5, iclass 6, count 0 2006.229.22:09:31.58#ibcon#read 5, iclass 6, count 0 2006.229.22:09:31.58#ibcon#about to read 6, iclass 6, count 0 2006.229.22:09:31.58#ibcon#read 6, iclass 6, count 0 2006.229.22:09:31.58#ibcon#end of sib2, iclass 6, count 0 2006.229.22:09:31.58#ibcon#*after write, iclass 6, count 0 2006.229.22:09:31.58#ibcon#*before return 0, iclass 6, count 0 2006.229.22:09:31.58#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:09:31.58#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:09:31.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:09:31.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:09:31.58$vck44/vabw=wide 2006.229.22:09:31.58#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.22:09:31.58#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.22:09:31.58#ibcon#ireg 8 cls_cnt 0 2006.229.22:09:31.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:31.58#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:31.58#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:31.58#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:09:31.58#ibcon#first serial, iclass 10, count 0 2006.229.22:09:31.58#ibcon#enter sib2, iclass 10, count 0 2006.229.22:09:31.58#ibcon#flushed, iclass 10, count 0 2006.229.22:09:31.58#ibcon#about to write, iclass 10, count 0 2006.229.22:09:31.58#ibcon#wrote, iclass 10, count 0 2006.229.22:09:31.58#ibcon#about to read 3, iclass 10, count 0 2006.229.22:09:31.60#ibcon#read 3, iclass 10, count 0 2006.229.22:09:31.60#ibcon#about to read 4, iclass 10, count 0 2006.229.22:09:31.60#ibcon#read 4, iclass 10, count 0 2006.229.22:09:31.60#ibcon#about to read 5, iclass 10, count 0 2006.229.22:09:31.60#ibcon#read 5, iclass 10, count 0 2006.229.22:09:31.60#ibcon#about to read 6, iclass 10, count 0 2006.229.22:09:31.60#ibcon#read 6, iclass 10, count 0 2006.229.22:09:31.60#ibcon#end of sib2, iclass 10, count 0 2006.229.22:09:31.60#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:09:31.60#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:09:31.60#ibcon#[25=BW32\r\n] 2006.229.22:09:31.60#ibcon#*before write, iclass 10, count 0 2006.229.22:09:31.60#ibcon#enter sib2, iclass 10, count 0 2006.229.22:09:31.60#ibcon#flushed, iclass 10, count 0 2006.229.22:09:31.60#ibcon#about to write, iclass 10, count 0 2006.229.22:09:31.60#ibcon#wrote, iclass 10, count 0 2006.229.22:09:31.60#ibcon#about to read 3, iclass 10, count 0 2006.229.22:09:31.63#ibcon#read 3, iclass 10, count 0 2006.229.22:09:31.63#ibcon#about to read 4, iclass 10, count 0 2006.229.22:09:31.63#ibcon#read 4, iclass 10, count 0 2006.229.22:09:31.63#ibcon#about to read 5, iclass 10, count 0 2006.229.22:09:31.63#ibcon#read 5, iclass 10, count 0 2006.229.22:09:31.63#ibcon#about to read 6, iclass 10, count 0 2006.229.22:09:31.63#ibcon#read 6, iclass 10, count 0 2006.229.22:09:31.63#ibcon#end of sib2, iclass 10, count 0 2006.229.22:09:31.63#ibcon#*after write, iclass 10, count 0 2006.229.22:09:31.63#ibcon#*before return 0, iclass 10, count 0 2006.229.22:09:31.63#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:31.63#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:09:31.63#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:09:31.63#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:09:31.63$vck44/vbbw=wide 2006.229.22:09:31.63#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.22:09:31.63#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.22:09:31.63#ibcon#ireg 8 cls_cnt 0 2006.229.22:09:31.63#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:09:31.70#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:09:31.70#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:09:31.70#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:09:31.70#ibcon#first serial, iclass 12, count 0 2006.229.22:09:31.70#ibcon#enter sib2, iclass 12, count 0 2006.229.22:09:31.70#ibcon#flushed, iclass 12, count 0 2006.229.22:09:31.70#ibcon#about to write, iclass 12, count 0 2006.229.22:09:31.70#ibcon#wrote, iclass 12, count 0 2006.229.22:09:31.70#ibcon#about to read 3, iclass 12, count 0 2006.229.22:09:31.72#ibcon#read 3, iclass 12, count 0 2006.229.22:09:31.72#ibcon#about to read 4, iclass 12, count 0 2006.229.22:09:31.72#ibcon#read 4, iclass 12, count 0 2006.229.22:09:31.72#ibcon#about to read 5, iclass 12, count 0 2006.229.22:09:31.72#ibcon#read 5, iclass 12, count 0 2006.229.22:09:31.72#ibcon#about to read 6, iclass 12, count 0 2006.229.22:09:31.72#ibcon#read 6, iclass 12, count 0 2006.229.22:09:31.72#ibcon#end of sib2, iclass 12, count 0 2006.229.22:09:31.72#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:09:31.72#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:09:31.72#ibcon#[27=BW32\r\n] 2006.229.22:09:31.72#ibcon#*before write, iclass 12, count 0 2006.229.22:09:31.72#ibcon#enter sib2, iclass 12, count 0 2006.229.22:09:31.72#ibcon#flushed, iclass 12, count 0 2006.229.22:09:31.72#ibcon#about to write, iclass 12, count 0 2006.229.22:09:31.72#ibcon#wrote, iclass 12, count 0 2006.229.22:09:31.72#ibcon#about to read 3, iclass 12, count 0 2006.229.22:09:31.75#ibcon#read 3, iclass 12, count 0 2006.229.22:09:31.75#ibcon#about to read 4, iclass 12, count 0 2006.229.22:09:31.75#ibcon#read 4, iclass 12, count 0 2006.229.22:09:31.75#ibcon#about to read 5, iclass 12, count 0 2006.229.22:09:31.75#ibcon#read 5, iclass 12, count 0 2006.229.22:09:31.75#ibcon#about to read 6, iclass 12, count 0 2006.229.22:09:31.75#ibcon#read 6, iclass 12, count 0 2006.229.22:09:31.75#ibcon#end of sib2, iclass 12, count 0 2006.229.22:09:31.75#ibcon#*after write, iclass 12, count 0 2006.229.22:09:31.75#ibcon#*before return 0, iclass 12, count 0 2006.229.22:09:31.75#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:09:31.75#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:09:31.75#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:09:31.75#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:09:31.75$setupk4/ifdk4 2006.229.22:09:31.75$ifdk4/lo= 2006.229.22:09:31.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:09:31.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:09:31.75$ifdk4/patch= 2006.229.22:09:31.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:09:31.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:09:31.75$setupk4/!*+20s 2006.229.22:09:38.68#abcon#<5=/08 1.1 5.6 28.17 951002.4\r\n> 2006.229.22:09:38.70#abcon#{5=INTERFACE CLEAR} 2006.229.22:09:38.76#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:09:40.14#trakl#Source acquired 2006.229.22:09:42.14#flagr#flagr/antenna,acquired 2006.229.22:09:46.24$setupk4/"tpicd 2006.229.22:09:46.24$setupk4/echo=off 2006.229.22:09:46.24$setupk4/xlog=off 2006.229.22:09:46.24:!2006.229.22:11:22 2006.229.22:11:22.00:preob 2006.229.22:11:22.13/onsource/TRACKING 2006.229.22:11:22.13:!2006.229.22:11:32 2006.229.22:11:32.00:"tape 2006.229.22:11:32.00:"st=record 2006.229.22:11:32.00:data_valid=on 2006.229.22:11:32.00:midob 2006.229.22:11:33.13/onsource/TRACKING 2006.229.22:11:33.13/wx/28.23,1002.4,95 2006.229.22:11:33.22/cable/+6.4174E-03 2006.229.22:11:34.31/va/01,08,usb,yes,29,31 2006.229.22:11:34.31/va/02,07,usb,yes,31,32 2006.229.22:11:34.31/va/03,06,usb,yes,39,41 2006.229.22:11:34.31/va/04,07,usb,yes,32,33 2006.229.22:11:34.31/va/05,04,usb,yes,29,29 2006.229.22:11:34.31/va/06,04,usb,yes,32,32 2006.229.22:11:34.31/va/07,05,usb,yes,28,29 2006.229.22:11:34.31/va/08,06,usb,yes,20,25 2006.229.22:11:34.54/valo/01,524.99,yes,locked 2006.229.22:11:34.54/valo/02,534.99,yes,locked 2006.229.22:11:34.54/valo/03,564.99,yes,locked 2006.229.22:11:34.54/valo/04,624.99,yes,locked 2006.229.22:11:34.54/valo/05,734.99,yes,locked 2006.229.22:11:34.54/valo/06,814.99,yes,locked 2006.229.22:11:34.54/valo/07,864.99,yes,locked 2006.229.22:11:34.54/valo/08,884.99,yes,locked 2006.229.22:11:35.63/vb/01,04,usb,yes,30,28 2006.229.22:11:35.63/vb/02,04,usb,yes,33,33 2006.229.22:11:35.63/vb/03,04,usb,yes,30,33 2006.229.22:11:35.63/vb/04,04,usb,yes,34,33 2006.229.22:11:35.63/vb/05,04,usb,yes,26,29 2006.229.22:11:35.63/vb/06,04,usb,yes,31,27 2006.229.22:11:35.63/vb/07,04,usb,yes,31,31 2006.229.22:11:35.63/vb/08,04,usb,yes,28,32 2006.229.22:11:35.86/vblo/01,629.99,yes,locked 2006.229.22:11:35.86/vblo/02,634.99,yes,locked 2006.229.22:11:35.86/vblo/03,649.99,yes,locked 2006.229.22:11:35.86/vblo/04,679.99,yes,locked 2006.229.22:11:35.86/vblo/05,709.99,yes,locked 2006.229.22:11:35.86/vblo/06,719.99,yes,locked 2006.229.22:11:35.86/vblo/07,734.99,yes,locked 2006.229.22:11:35.86/vblo/08,744.99,yes,locked 2006.229.22:11:36.01/vabw/8 2006.229.22:11:36.16/vbbw/8 2006.229.22:11:36.25/xfe/off,on,12.2 2006.229.22:11:36.63/ifatt/23,28,28,28 2006.229.22:11:37.07/fmout-gps/S +4.64E-07 2006.229.22:11:37.11:!2006.229.22:13:12 2006.229.22:13:12.01:data_valid=off 2006.229.22:13:12.02:"et 2006.229.22:13:12.02:!+3s 2006.229.22:13:15.03:"tape 2006.229.22:13:15.03:postob 2006.229.22:13:15.25/cable/+6.4169E-03 2006.229.22:13:15.25/wx/28.28,1002.3,93 2006.229.22:13:15.31/fmout-gps/S +4.62E-07 2006.229.22:13:15.31:scan_name=229-2215,jd0608,50 2006.229.22:13:15.31:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.22:13:17.14#flagr#flagr/antenna,new-source 2006.229.22:13:17.14:checkk5 2006.229.22:13:17.51/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:13:17.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:13:18.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:13:18.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:13:19.13/chk_obsdata//k5ts1/T2292211??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:13:19.55/chk_obsdata//k5ts2/T2292211??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:13:19.95/chk_obsdata//k5ts3/T2292211??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:13:20.35/chk_obsdata//k5ts4/T2292211??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:13:21.06/k5log//k5ts1_log_newline 2006.229.22:13:21.77/k5log//k5ts2_log_newline 2006.229.22:13:22.50/k5log//k5ts3_log_newline 2006.229.22:13:23.23/k5log//k5ts4_log_newline 2006.229.22:13:23.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:13:23.25:setupk4=1 2006.229.22:13:23.25$setupk4/echo=on 2006.229.22:13:23.25$setupk4/pcalon 2006.229.22:13:23.25$pcalon/"no phase cal control is implemented here 2006.229.22:13:23.25$setupk4/"tpicd=stop 2006.229.22:13:23.25$setupk4/"rec=synch_on 2006.229.22:13:23.25$setupk4/"rec_mode=128 2006.229.22:13:23.25$setupk4/!* 2006.229.22:13:23.25$setupk4/recpk4 2006.229.22:13:23.25$recpk4/recpatch= 2006.229.22:13:23.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:13:23.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:13:23.25$setupk4/vck44 2006.229.22:13:23.25$vck44/valo=1,524.99 2006.229.22:13:23.25#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.22:13:23.25#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.22:13:23.25#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:23.26#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:23.26#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:23.26#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:23.26#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:13:23.26#ibcon#first serial, iclass 37, count 0 2006.229.22:13:23.26#ibcon#enter sib2, iclass 37, count 0 2006.229.22:13:23.26#ibcon#flushed, iclass 37, count 0 2006.229.22:13:23.26#ibcon#about to write, iclass 37, count 0 2006.229.22:13:23.26#ibcon#wrote, iclass 37, count 0 2006.229.22:13:23.26#ibcon#about to read 3, iclass 37, count 0 2006.229.22:13:23.27#ibcon#read 3, iclass 37, count 0 2006.229.22:13:23.27#ibcon#about to read 4, iclass 37, count 0 2006.229.22:13:23.27#ibcon#read 4, iclass 37, count 0 2006.229.22:13:23.27#ibcon#about to read 5, iclass 37, count 0 2006.229.22:13:23.27#ibcon#read 5, iclass 37, count 0 2006.229.22:13:23.27#ibcon#about to read 6, iclass 37, count 0 2006.229.22:13:23.27#ibcon#read 6, iclass 37, count 0 2006.229.22:13:23.27#ibcon#end of sib2, iclass 37, count 0 2006.229.22:13:23.27#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:13:23.27#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:13:23.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:13:23.27#ibcon#*before write, iclass 37, count 0 2006.229.22:13:23.27#ibcon#enter sib2, iclass 37, count 0 2006.229.22:13:23.27#ibcon#flushed, iclass 37, count 0 2006.229.22:13:23.27#ibcon#about to write, iclass 37, count 0 2006.229.22:13:23.27#ibcon#wrote, iclass 37, count 0 2006.229.22:13:23.27#ibcon#about to read 3, iclass 37, count 0 2006.229.22:13:23.32#ibcon#read 3, iclass 37, count 0 2006.229.22:13:23.32#ibcon#about to read 4, iclass 37, count 0 2006.229.22:13:23.32#ibcon#read 4, iclass 37, count 0 2006.229.22:13:23.32#ibcon#about to read 5, iclass 37, count 0 2006.229.22:13:23.32#ibcon#read 5, iclass 37, count 0 2006.229.22:13:23.32#ibcon#about to read 6, iclass 37, count 0 2006.229.22:13:23.32#ibcon#read 6, iclass 37, count 0 2006.229.22:13:23.32#ibcon#end of sib2, iclass 37, count 0 2006.229.22:13:23.32#ibcon#*after write, iclass 37, count 0 2006.229.22:13:23.32#ibcon#*before return 0, iclass 37, count 0 2006.229.22:13:23.32#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:23.32#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:23.32#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:13:23.32#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:13:23.32$vck44/va=1,8 2006.229.22:13:23.32#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.22:13:23.32#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.22:13:23.32#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:23.32#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:23.32#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:23.32#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:23.32#ibcon#enter wrdev, iclass 39, count 2 2006.229.22:13:23.32#ibcon#first serial, iclass 39, count 2 2006.229.22:13:23.32#ibcon#enter sib2, iclass 39, count 2 2006.229.22:13:23.32#ibcon#flushed, iclass 39, count 2 2006.229.22:13:23.32#ibcon#about to write, iclass 39, count 2 2006.229.22:13:23.32#ibcon#wrote, iclass 39, count 2 2006.229.22:13:23.32#ibcon#about to read 3, iclass 39, count 2 2006.229.22:13:23.34#ibcon#read 3, iclass 39, count 2 2006.229.22:13:23.34#ibcon#about to read 4, iclass 39, count 2 2006.229.22:13:23.34#ibcon#read 4, iclass 39, count 2 2006.229.22:13:23.34#ibcon#about to read 5, iclass 39, count 2 2006.229.22:13:23.34#ibcon#read 5, iclass 39, count 2 2006.229.22:13:23.34#ibcon#about to read 6, iclass 39, count 2 2006.229.22:13:23.34#ibcon#read 6, iclass 39, count 2 2006.229.22:13:23.34#ibcon#end of sib2, iclass 39, count 2 2006.229.22:13:23.34#ibcon#*mode == 0, iclass 39, count 2 2006.229.22:13:23.34#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.22:13:23.34#ibcon#[25=AT01-08\r\n] 2006.229.22:13:23.34#ibcon#*before write, iclass 39, count 2 2006.229.22:13:23.34#ibcon#enter sib2, iclass 39, count 2 2006.229.22:13:23.34#ibcon#flushed, iclass 39, count 2 2006.229.22:13:23.34#ibcon#about to write, iclass 39, count 2 2006.229.22:13:23.34#ibcon#wrote, iclass 39, count 2 2006.229.22:13:23.34#ibcon#about to read 3, iclass 39, count 2 2006.229.22:13:23.37#ibcon#read 3, iclass 39, count 2 2006.229.22:13:23.37#ibcon#about to read 4, iclass 39, count 2 2006.229.22:13:23.37#ibcon#read 4, iclass 39, count 2 2006.229.22:13:23.37#ibcon#about to read 5, iclass 39, count 2 2006.229.22:13:23.37#ibcon#read 5, iclass 39, count 2 2006.229.22:13:23.37#ibcon#about to read 6, iclass 39, count 2 2006.229.22:13:23.37#ibcon#read 6, iclass 39, count 2 2006.229.22:13:23.37#ibcon#end of sib2, iclass 39, count 2 2006.229.22:13:23.37#ibcon#*after write, iclass 39, count 2 2006.229.22:13:23.37#ibcon#*before return 0, iclass 39, count 2 2006.229.22:13:23.37#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:23.37#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:23.37#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.22:13:23.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:23.37#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:23.49#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:23.49#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:23.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:13:23.49#ibcon#first serial, iclass 39, count 0 2006.229.22:13:23.49#ibcon#enter sib2, iclass 39, count 0 2006.229.22:13:23.49#ibcon#flushed, iclass 39, count 0 2006.229.22:13:23.49#ibcon#about to write, iclass 39, count 0 2006.229.22:13:23.49#ibcon#wrote, iclass 39, count 0 2006.229.22:13:23.49#ibcon#about to read 3, iclass 39, count 0 2006.229.22:13:23.51#ibcon#read 3, iclass 39, count 0 2006.229.22:13:23.51#ibcon#about to read 4, iclass 39, count 0 2006.229.22:13:23.51#ibcon#read 4, iclass 39, count 0 2006.229.22:13:23.51#ibcon#about to read 5, iclass 39, count 0 2006.229.22:13:23.51#ibcon#read 5, iclass 39, count 0 2006.229.22:13:23.51#ibcon#about to read 6, iclass 39, count 0 2006.229.22:13:23.51#ibcon#read 6, iclass 39, count 0 2006.229.22:13:23.51#ibcon#end of sib2, iclass 39, count 0 2006.229.22:13:23.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:13:23.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:13:23.51#ibcon#[25=USB\r\n] 2006.229.22:13:23.51#ibcon#*before write, iclass 39, count 0 2006.229.22:13:23.51#ibcon#enter sib2, iclass 39, count 0 2006.229.22:13:23.51#ibcon#flushed, iclass 39, count 0 2006.229.22:13:23.51#ibcon#about to write, iclass 39, count 0 2006.229.22:13:23.51#ibcon#wrote, iclass 39, count 0 2006.229.22:13:23.51#ibcon#about to read 3, iclass 39, count 0 2006.229.22:13:23.54#ibcon#read 3, iclass 39, count 0 2006.229.22:13:23.54#ibcon#about to read 4, iclass 39, count 0 2006.229.22:13:23.54#ibcon#read 4, iclass 39, count 0 2006.229.22:13:23.54#ibcon#about to read 5, iclass 39, count 0 2006.229.22:13:23.54#ibcon#read 5, iclass 39, count 0 2006.229.22:13:23.54#ibcon#about to read 6, iclass 39, count 0 2006.229.22:13:23.54#ibcon#read 6, iclass 39, count 0 2006.229.22:13:23.54#ibcon#end of sib2, iclass 39, count 0 2006.229.22:13:23.54#ibcon#*after write, iclass 39, count 0 2006.229.22:13:23.54#ibcon#*before return 0, iclass 39, count 0 2006.229.22:13:23.54#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:23.54#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:23.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:13:23.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:13:23.54$vck44/valo=2,534.99 2006.229.22:13:23.54#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.22:13:23.54#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.22:13:23.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:23.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:23.54#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:23.54#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:23.54#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:13:23.54#ibcon#first serial, iclass 3, count 0 2006.229.22:13:23.54#ibcon#enter sib2, iclass 3, count 0 2006.229.22:13:23.54#ibcon#flushed, iclass 3, count 0 2006.229.22:13:23.54#ibcon#about to write, iclass 3, count 0 2006.229.22:13:23.54#ibcon#wrote, iclass 3, count 0 2006.229.22:13:23.54#ibcon#about to read 3, iclass 3, count 0 2006.229.22:13:23.56#ibcon#read 3, iclass 3, count 0 2006.229.22:13:23.56#ibcon#about to read 4, iclass 3, count 0 2006.229.22:13:23.56#ibcon#read 4, iclass 3, count 0 2006.229.22:13:23.56#ibcon#about to read 5, iclass 3, count 0 2006.229.22:13:23.56#ibcon#read 5, iclass 3, count 0 2006.229.22:13:23.56#ibcon#about to read 6, iclass 3, count 0 2006.229.22:13:23.56#ibcon#read 6, iclass 3, count 0 2006.229.22:13:23.56#ibcon#end of sib2, iclass 3, count 0 2006.229.22:13:23.56#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:13:23.56#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:13:23.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:13:23.56#ibcon#*before write, iclass 3, count 0 2006.229.22:13:23.56#ibcon#enter sib2, iclass 3, count 0 2006.229.22:13:23.56#ibcon#flushed, iclass 3, count 0 2006.229.22:13:23.56#ibcon#about to write, iclass 3, count 0 2006.229.22:13:23.56#ibcon#wrote, iclass 3, count 0 2006.229.22:13:23.56#ibcon#about to read 3, iclass 3, count 0 2006.229.22:13:23.60#ibcon#read 3, iclass 3, count 0 2006.229.22:13:23.60#ibcon#about to read 4, iclass 3, count 0 2006.229.22:13:23.60#ibcon#read 4, iclass 3, count 0 2006.229.22:13:23.60#ibcon#about to read 5, iclass 3, count 0 2006.229.22:13:23.60#ibcon#read 5, iclass 3, count 0 2006.229.22:13:23.60#ibcon#about to read 6, iclass 3, count 0 2006.229.22:13:23.60#ibcon#read 6, iclass 3, count 0 2006.229.22:13:23.60#ibcon#end of sib2, iclass 3, count 0 2006.229.22:13:23.60#ibcon#*after write, iclass 3, count 0 2006.229.22:13:23.60#ibcon#*before return 0, iclass 3, count 0 2006.229.22:13:23.60#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:23.60#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:23.60#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:13:23.60#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:13:23.60$vck44/va=2,7 2006.229.22:13:23.60#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.22:13:23.60#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.22:13:23.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:23.60#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:23.66#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:23.66#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:23.66#ibcon#enter wrdev, iclass 5, count 2 2006.229.22:13:23.66#ibcon#first serial, iclass 5, count 2 2006.229.22:13:23.66#ibcon#enter sib2, iclass 5, count 2 2006.229.22:13:23.66#ibcon#flushed, iclass 5, count 2 2006.229.22:13:23.66#ibcon#about to write, iclass 5, count 2 2006.229.22:13:23.66#ibcon#wrote, iclass 5, count 2 2006.229.22:13:23.66#ibcon#about to read 3, iclass 5, count 2 2006.229.22:13:23.68#ibcon#read 3, iclass 5, count 2 2006.229.22:13:23.68#ibcon#about to read 4, iclass 5, count 2 2006.229.22:13:23.68#ibcon#read 4, iclass 5, count 2 2006.229.22:13:23.68#ibcon#about to read 5, iclass 5, count 2 2006.229.22:13:23.68#ibcon#read 5, iclass 5, count 2 2006.229.22:13:23.68#ibcon#about to read 6, iclass 5, count 2 2006.229.22:13:23.68#ibcon#read 6, iclass 5, count 2 2006.229.22:13:23.68#ibcon#end of sib2, iclass 5, count 2 2006.229.22:13:23.68#ibcon#*mode == 0, iclass 5, count 2 2006.229.22:13:23.68#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.22:13:23.68#ibcon#[25=AT02-07\r\n] 2006.229.22:13:23.68#ibcon#*before write, iclass 5, count 2 2006.229.22:13:23.68#ibcon#enter sib2, iclass 5, count 2 2006.229.22:13:23.68#ibcon#flushed, iclass 5, count 2 2006.229.22:13:23.68#ibcon#about to write, iclass 5, count 2 2006.229.22:13:23.68#ibcon#wrote, iclass 5, count 2 2006.229.22:13:23.68#ibcon#about to read 3, iclass 5, count 2 2006.229.22:13:23.71#ibcon#read 3, iclass 5, count 2 2006.229.22:13:23.71#ibcon#about to read 4, iclass 5, count 2 2006.229.22:13:23.71#ibcon#read 4, iclass 5, count 2 2006.229.22:13:23.71#ibcon#about to read 5, iclass 5, count 2 2006.229.22:13:23.71#ibcon#read 5, iclass 5, count 2 2006.229.22:13:23.71#ibcon#about to read 6, iclass 5, count 2 2006.229.22:13:23.71#ibcon#read 6, iclass 5, count 2 2006.229.22:13:23.71#ibcon#end of sib2, iclass 5, count 2 2006.229.22:13:23.71#ibcon#*after write, iclass 5, count 2 2006.229.22:13:23.71#ibcon#*before return 0, iclass 5, count 2 2006.229.22:13:23.71#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:23.71#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:23.71#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.22:13:23.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:23.71#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:23.83#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:23.83#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:23.83#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:13:23.83#ibcon#first serial, iclass 5, count 0 2006.229.22:13:23.83#ibcon#enter sib2, iclass 5, count 0 2006.229.22:13:23.83#ibcon#flushed, iclass 5, count 0 2006.229.22:13:23.83#ibcon#about to write, iclass 5, count 0 2006.229.22:13:23.83#ibcon#wrote, iclass 5, count 0 2006.229.22:13:23.83#ibcon#about to read 3, iclass 5, count 0 2006.229.22:13:23.85#ibcon#read 3, iclass 5, count 0 2006.229.22:13:23.85#ibcon#about to read 4, iclass 5, count 0 2006.229.22:13:23.85#ibcon#read 4, iclass 5, count 0 2006.229.22:13:23.85#ibcon#about to read 5, iclass 5, count 0 2006.229.22:13:23.85#ibcon#read 5, iclass 5, count 0 2006.229.22:13:23.85#ibcon#about to read 6, iclass 5, count 0 2006.229.22:13:23.85#ibcon#read 6, iclass 5, count 0 2006.229.22:13:23.85#ibcon#end of sib2, iclass 5, count 0 2006.229.22:13:23.85#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:13:23.85#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:13:23.85#ibcon#[25=USB\r\n] 2006.229.22:13:23.85#ibcon#*before write, iclass 5, count 0 2006.229.22:13:23.85#ibcon#enter sib2, iclass 5, count 0 2006.229.22:13:23.85#ibcon#flushed, iclass 5, count 0 2006.229.22:13:23.85#ibcon#about to write, iclass 5, count 0 2006.229.22:13:23.85#ibcon#wrote, iclass 5, count 0 2006.229.22:13:23.85#ibcon#about to read 3, iclass 5, count 0 2006.229.22:13:23.88#ibcon#read 3, iclass 5, count 0 2006.229.22:13:23.88#ibcon#about to read 4, iclass 5, count 0 2006.229.22:13:23.88#ibcon#read 4, iclass 5, count 0 2006.229.22:13:23.88#ibcon#about to read 5, iclass 5, count 0 2006.229.22:13:23.88#ibcon#read 5, iclass 5, count 0 2006.229.22:13:23.88#ibcon#about to read 6, iclass 5, count 0 2006.229.22:13:23.88#ibcon#read 6, iclass 5, count 0 2006.229.22:13:23.88#ibcon#end of sib2, iclass 5, count 0 2006.229.22:13:23.88#ibcon#*after write, iclass 5, count 0 2006.229.22:13:23.88#ibcon#*before return 0, iclass 5, count 0 2006.229.22:13:23.88#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:23.88#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:23.88#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:13:23.88#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:13:23.88$vck44/valo=3,564.99 2006.229.22:13:23.88#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.22:13:23.88#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.22:13:23.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:23.88#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:23.88#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:23.88#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:23.88#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:13:23.88#ibcon#first serial, iclass 7, count 0 2006.229.22:13:23.88#ibcon#enter sib2, iclass 7, count 0 2006.229.22:13:23.88#ibcon#flushed, iclass 7, count 0 2006.229.22:13:23.88#ibcon#about to write, iclass 7, count 0 2006.229.22:13:23.88#ibcon#wrote, iclass 7, count 0 2006.229.22:13:23.88#ibcon#about to read 3, iclass 7, count 0 2006.229.22:13:23.90#ibcon#read 3, iclass 7, count 0 2006.229.22:13:23.90#ibcon#about to read 4, iclass 7, count 0 2006.229.22:13:23.90#ibcon#read 4, iclass 7, count 0 2006.229.22:13:23.90#ibcon#about to read 5, iclass 7, count 0 2006.229.22:13:23.90#ibcon#read 5, iclass 7, count 0 2006.229.22:13:23.90#ibcon#about to read 6, iclass 7, count 0 2006.229.22:13:23.90#ibcon#read 6, iclass 7, count 0 2006.229.22:13:23.90#ibcon#end of sib2, iclass 7, count 0 2006.229.22:13:23.90#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:13:23.90#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:13:23.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:13:23.90#ibcon#*before write, iclass 7, count 0 2006.229.22:13:23.90#ibcon#enter sib2, iclass 7, count 0 2006.229.22:13:23.90#ibcon#flushed, iclass 7, count 0 2006.229.22:13:23.90#ibcon#about to write, iclass 7, count 0 2006.229.22:13:23.90#ibcon#wrote, iclass 7, count 0 2006.229.22:13:23.90#ibcon#about to read 3, iclass 7, count 0 2006.229.22:13:23.94#ibcon#read 3, iclass 7, count 0 2006.229.22:13:23.94#ibcon#about to read 4, iclass 7, count 0 2006.229.22:13:23.94#ibcon#read 4, iclass 7, count 0 2006.229.22:13:23.94#ibcon#about to read 5, iclass 7, count 0 2006.229.22:13:23.94#ibcon#read 5, iclass 7, count 0 2006.229.22:13:23.94#ibcon#about to read 6, iclass 7, count 0 2006.229.22:13:23.94#ibcon#read 6, iclass 7, count 0 2006.229.22:13:23.94#ibcon#end of sib2, iclass 7, count 0 2006.229.22:13:23.94#ibcon#*after write, iclass 7, count 0 2006.229.22:13:23.94#ibcon#*before return 0, iclass 7, count 0 2006.229.22:13:23.94#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:23.94#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:23.94#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:13:23.94#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:13:23.94$vck44/va=3,6 2006.229.22:13:23.94#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.22:13:23.94#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.22:13:23.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:23.94#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:24.00#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:24.00#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:24.00#ibcon#enter wrdev, iclass 11, count 2 2006.229.22:13:24.00#ibcon#first serial, iclass 11, count 2 2006.229.22:13:24.00#ibcon#enter sib2, iclass 11, count 2 2006.229.22:13:24.00#ibcon#flushed, iclass 11, count 2 2006.229.22:13:24.00#ibcon#about to write, iclass 11, count 2 2006.229.22:13:24.00#ibcon#wrote, iclass 11, count 2 2006.229.22:13:24.00#ibcon#about to read 3, iclass 11, count 2 2006.229.22:13:24.02#ibcon#read 3, iclass 11, count 2 2006.229.22:13:24.02#ibcon#about to read 4, iclass 11, count 2 2006.229.22:13:24.02#ibcon#read 4, iclass 11, count 2 2006.229.22:13:24.02#ibcon#about to read 5, iclass 11, count 2 2006.229.22:13:24.02#ibcon#read 5, iclass 11, count 2 2006.229.22:13:24.02#ibcon#about to read 6, iclass 11, count 2 2006.229.22:13:24.02#ibcon#read 6, iclass 11, count 2 2006.229.22:13:24.02#ibcon#end of sib2, iclass 11, count 2 2006.229.22:13:24.02#ibcon#*mode == 0, iclass 11, count 2 2006.229.22:13:24.02#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.22:13:24.02#ibcon#[25=AT03-06\r\n] 2006.229.22:13:24.02#ibcon#*before write, iclass 11, count 2 2006.229.22:13:24.02#ibcon#enter sib2, iclass 11, count 2 2006.229.22:13:24.02#ibcon#flushed, iclass 11, count 2 2006.229.22:13:24.02#ibcon#about to write, iclass 11, count 2 2006.229.22:13:24.02#ibcon#wrote, iclass 11, count 2 2006.229.22:13:24.02#ibcon#about to read 3, iclass 11, count 2 2006.229.22:13:24.05#ibcon#read 3, iclass 11, count 2 2006.229.22:13:24.05#ibcon#about to read 4, iclass 11, count 2 2006.229.22:13:24.05#ibcon#read 4, iclass 11, count 2 2006.229.22:13:24.05#ibcon#about to read 5, iclass 11, count 2 2006.229.22:13:24.05#ibcon#read 5, iclass 11, count 2 2006.229.22:13:24.05#ibcon#about to read 6, iclass 11, count 2 2006.229.22:13:24.05#ibcon#read 6, iclass 11, count 2 2006.229.22:13:24.05#ibcon#end of sib2, iclass 11, count 2 2006.229.22:13:24.05#ibcon#*after write, iclass 11, count 2 2006.229.22:13:24.05#ibcon#*before return 0, iclass 11, count 2 2006.229.22:13:24.05#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:24.05#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:24.05#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.22:13:24.05#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:24.05#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:24.17#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:24.17#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:24.17#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:13:24.17#ibcon#first serial, iclass 11, count 0 2006.229.22:13:24.17#ibcon#enter sib2, iclass 11, count 0 2006.229.22:13:24.17#ibcon#flushed, iclass 11, count 0 2006.229.22:13:24.17#ibcon#about to write, iclass 11, count 0 2006.229.22:13:24.17#ibcon#wrote, iclass 11, count 0 2006.229.22:13:24.17#ibcon#about to read 3, iclass 11, count 0 2006.229.22:13:24.19#ibcon#read 3, iclass 11, count 0 2006.229.22:13:24.19#ibcon#about to read 4, iclass 11, count 0 2006.229.22:13:24.19#ibcon#read 4, iclass 11, count 0 2006.229.22:13:24.19#ibcon#about to read 5, iclass 11, count 0 2006.229.22:13:24.19#ibcon#read 5, iclass 11, count 0 2006.229.22:13:24.19#ibcon#about to read 6, iclass 11, count 0 2006.229.22:13:24.19#ibcon#read 6, iclass 11, count 0 2006.229.22:13:24.19#ibcon#end of sib2, iclass 11, count 0 2006.229.22:13:24.19#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:13:24.19#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:13:24.19#ibcon#[25=USB\r\n] 2006.229.22:13:24.19#ibcon#*before write, iclass 11, count 0 2006.229.22:13:24.19#ibcon#enter sib2, iclass 11, count 0 2006.229.22:13:24.19#ibcon#flushed, iclass 11, count 0 2006.229.22:13:24.19#ibcon#about to write, iclass 11, count 0 2006.229.22:13:24.19#ibcon#wrote, iclass 11, count 0 2006.229.22:13:24.19#ibcon#about to read 3, iclass 11, count 0 2006.229.22:13:24.22#ibcon#read 3, iclass 11, count 0 2006.229.22:13:24.22#ibcon#about to read 4, iclass 11, count 0 2006.229.22:13:24.22#ibcon#read 4, iclass 11, count 0 2006.229.22:13:24.22#ibcon#about to read 5, iclass 11, count 0 2006.229.22:13:24.22#ibcon#read 5, iclass 11, count 0 2006.229.22:13:24.22#ibcon#about to read 6, iclass 11, count 0 2006.229.22:13:24.22#ibcon#read 6, iclass 11, count 0 2006.229.22:13:24.22#ibcon#end of sib2, iclass 11, count 0 2006.229.22:13:24.22#ibcon#*after write, iclass 11, count 0 2006.229.22:13:24.22#ibcon#*before return 0, iclass 11, count 0 2006.229.22:13:24.22#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:24.22#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:24.22#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:13:24.22#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:13:24.22$vck44/valo=4,624.99 2006.229.22:13:24.22#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.22:13:24.22#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.22:13:24.22#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:24.22#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:24.22#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:24.22#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:24.22#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:13:24.22#ibcon#first serial, iclass 13, count 0 2006.229.22:13:24.22#ibcon#enter sib2, iclass 13, count 0 2006.229.22:13:24.22#ibcon#flushed, iclass 13, count 0 2006.229.22:13:24.22#ibcon#about to write, iclass 13, count 0 2006.229.22:13:24.22#ibcon#wrote, iclass 13, count 0 2006.229.22:13:24.22#ibcon#about to read 3, iclass 13, count 0 2006.229.22:13:24.24#ibcon#read 3, iclass 13, count 0 2006.229.22:13:24.24#ibcon#about to read 4, iclass 13, count 0 2006.229.22:13:24.24#ibcon#read 4, iclass 13, count 0 2006.229.22:13:24.24#ibcon#about to read 5, iclass 13, count 0 2006.229.22:13:24.24#ibcon#read 5, iclass 13, count 0 2006.229.22:13:24.24#ibcon#about to read 6, iclass 13, count 0 2006.229.22:13:24.24#ibcon#read 6, iclass 13, count 0 2006.229.22:13:24.24#ibcon#end of sib2, iclass 13, count 0 2006.229.22:13:24.24#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:13:24.24#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:13:24.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:13:24.24#ibcon#*before write, iclass 13, count 0 2006.229.22:13:24.24#ibcon#enter sib2, iclass 13, count 0 2006.229.22:13:24.24#ibcon#flushed, iclass 13, count 0 2006.229.22:13:24.24#ibcon#about to write, iclass 13, count 0 2006.229.22:13:24.24#ibcon#wrote, iclass 13, count 0 2006.229.22:13:24.24#ibcon#about to read 3, iclass 13, count 0 2006.229.22:13:24.28#ibcon#read 3, iclass 13, count 0 2006.229.22:13:24.28#ibcon#about to read 4, iclass 13, count 0 2006.229.22:13:24.28#ibcon#read 4, iclass 13, count 0 2006.229.22:13:24.28#ibcon#about to read 5, iclass 13, count 0 2006.229.22:13:24.28#ibcon#read 5, iclass 13, count 0 2006.229.22:13:24.28#ibcon#about to read 6, iclass 13, count 0 2006.229.22:13:24.28#ibcon#read 6, iclass 13, count 0 2006.229.22:13:24.28#ibcon#end of sib2, iclass 13, count 0 2006.229.22:13:24.28#ibcon#*after write, iclass 13, count 0 2006.229.22:13:24.28#ibcon#*before return 0, iclass 13, count 0 2006.229.22:13:24.28#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:24.28#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:24.28#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:13:24.28#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:13:24.28$vck44/va=4,7 2006.229.22:13:24.28#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.22:13:24.28#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.22:13:24.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:24.28#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:24.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:24.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:24.34#ibcon#enter wrdev, iclass 15, count 2 2006.229.22:13:24.34#ibcon#first serial, iclass 15, count 2 2006.229.22:13:24.34#ibcon#enter sib2, iclass 15, count 2 2006.229.22:13:24.34#ibcon#flushed, iclass 15, count 2 2006.229.22:13:24.34#ibcon#about to write, iclass 15, count 2 2006.229.22:13:24.34#ibcon#wrote, iclass 15, count 2 2006.229.22:13:24.34#ibcon#about to read 3, iclass 15, count 2 2006.229.22:13:24.36#ibcon#read 3, iclass 15, count 2 2006.229.22:13:24.36#ibcon#about to read 4, iclass 15, count 2 2006.229.22:13:24.36#ibcon#read 4, iclass 15, count 2 2006.229.22:13:24.36#ibcon#about to read 5, iclass 15, count 2 2006.229.22:13:24.36#ibcon#read 5, iclass 15, count 2 2006.229.22:13:24.36#ibcon#about to read 6, iclass 15, count 2 2006.229.22:13:24.36#ibcon#read 6, iclass 15, count 2 2006.229.22:13:24.36#ibcon#end of sib2, iclass 15, count 2 2006.229.22:13:24.36#ibcon#*mode == 0, iclass 15, count 2 2006.229.22:13:24.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.22:13:24.36#ibcon#[25=AT04-07\r\n] 2006.229.22:13:24.36#ibcon#*before write, iclass 15, count 2 2006.229.22:13:24.36#ibcon#enter sib2, iclass 15, count 2 2006.229.22:13:24.36#ibcon#flushed, iclass 15, count 2 2006.229.22:13:24.36#ibcon#about to write, iclass 15, count 2 2006.229.22:13:24.36#ibcon#wrote, iclass 15, count 2 2006.229.22:13:24.36#ibcon#about to read 3, iclass 15, count 2 2006.229.22:13:24.39#ibcon#read 3, iclass 15, count 2 2006.229.22:13:24.39#ibcon#about to read 4, iclass 15, count 2 2006.229.22:13:24.39#ibcon#read 4, iclass 15, count 2 2006.229.22:13:24.39#ibcon#about to read 5, iclass 15, count 2 2006.229.22:13:24.39#ibcon#read 5, iclass 15, count 2 2006.229.22:13:24.39#ibcon#about to read 6, iclass 15, count 2 2006.229.22:13:24.39#ibcon#read 6, iclass 15, count 2 2006.229.22:13:24.39#ibcon#end of sib2, iclass 15, count 2 2006.229.22:13:24.39#ibcon#*after write, iclass 15, count 2 2006.229.22:13:24.39#ibcon#*before return 0, iclass 15, count 2 2006.229.22:13:24.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:24.43#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:24.43#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.22:13:24.43#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:24.43#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:24.54#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:24.54#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:24.54#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:13:24.54#ibcon#first serial, iclass 15, count 0 2006.229.22:13:24.54#ibcon#enter sib2, iclass 15, count 0 2006.229.22:13:24.54#ibcon#flushed, iclass 15, count 0 2006.229.22:13:24.54#ibcon#about to write, iclass 15, count 0 2006.229.22:13:24.54#ibcon#wrote, iclass 15, count 0 2006.229.22:13:24.54#ibcon#about to read 3, iclass 15, count 0 2006.229.22:13:24.56#ibcon#read 3, iclass 15, count 0 2006.229.22:13:24.56#ibcon#about to read 4, iclass 15, count 0 2006.229.22:13:24.56#ibcon#read 4, iclass 15, count 0 2006.229.22:13:24.56#ibcon#about to read 5, iclass 15, count 0 2006.229.22:13:24.56#ibcon#read 5, iclass 15, count 0 2006.229.22:13:24.56#ibcon#about to read 6, iclass 15, count 0 2006.229.22:13:24.56#ibcon#read 6, iclass 15, count 0 2006.229.22:13:24.56#ibcon#end of sib2, iclass 15, count 0 2006.229.22:13:24.56#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:13:24.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:13:24.56#ibcon#[25=USB\r\n] 2006.229.22:13:24.56#ibcon#*before write, iclass 15, count 0 2006.229.22:13:24.56#ibcon#enter sib2, iclass 15, count 0 2006.229.22:13:24.56#ibcon#flushed, iclass 15, count 0 2006.229.22:13:24.56#ibcon#about to write, iclass 15, count 0 2006.229.22:13:24.56#ibcon#wrote, iclass 15, count 0 2006.229.22:13:24.56#ibcon#about to read 3, iclass 15, count 0 2006.229.22:13:24.59#ibcon#read 3, iclass 15, count 0 2006.229.22:13:24.59#ibcon#about to read 4, iclass 15, count 0 2006.229.22:13:24.59#ibcon#read 4, iclass 15, count 0 2006.229.22:13:24.59#ibcon#about to read 5, iclass 15, count 0 2006.229.22:13:24.59#ibcon#read 5, iclass 15, count 0 2006.229.22:13:24.59#ibcon#about to read 6, iclass 15, count 0 2006.229.22:13:24.59#ibcon#read 6, iclass 15, count 0 2006.229.22:13:24.59#ibcon#end of sib2, iclass 15, count 0 2006.229.22:13:24.59#ibcon#*after write, iclass 15, count 0 2006.229.22:13:24.59#ibcon#*before return 0, iclass 15, count 0 2006.229.22:13:24.59#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:24.59#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:24.59#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:13:24.59#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:13:24.59$vck44/valo=5,734.99 2006.229.22:13:24.59#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.22:13:24.59#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.22:13:24.59#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:24.59#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:24.59#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:24.59#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:24.59#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:13:24.59#ibcon#first serial, iclass 17, count 0 2006.229.22:13:24.59#ibcon#enter sib2, iclass 17, count 0 2006.229.22:13:24.59#ibcon#flushed, iclass 17, count 0 2006.229.22:13:24.59#ibcon#about to write, iclass 17, count 0 2006.229.22:13:24.59#ibcon#wrote, iclass 17, count 0 2006.229.22:13:24.59#ibcon#about to read 3, iclass 17, count 0 2006.229.22:13:24.61#ibcon#read 3, iclass 17, count 0 2006.229.22:13:24.61#ibcon#about to read 4, iclass 17, count 0 2006.229.22:13:24.61#ibcon#read 4, iclass 17, count 0 2006.229.22:13:24.61#ibcon#about to read 5, iclass 17, count 0 2006.229.22:13:24.61#ibcon#read 5, iclass 17, count 0 2006.229.22:13:24.61#ibcon#about to read 6, iclass 17, count 0 2006.229.22:13:24.61#ibcon#read 6, iclass 17, count 0 2006.229.22:13:24.61#ibcon#end of sib2, iclass 17, count 0 2006.229.22:13:24.61#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:13:24.61#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:13:24.61#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:13:24.61#ibcon#*before write, iclass 17, count 0 2006.229.22:13:24.61#ibcon#enter sib2, iclass 17, count 0 2006.229.22:13:24.61#ibcon#flushed, iclass 17, count 0 2006.229.22:13:24.61#ibcon#about to write, iclass 17, count 0 2006.229.22:13:24.61#ibcon#wrote, iclass 17, count 0 2006.229.22:13:24.61#ibcon#about to read 3, iclass 17, count 0 2006.229.22:13:24.65#ibcon#read 3, iclass 17, count 0 2006.229.22:13:24.65#ibcon#about to read 4, iclass 17, count 0 2006.229.22:13:24.65#ibcon#read 4, iclass 17, count 0 2006.229.22:13:24.65#ibcon#about to read 5, iclass 17, count 0 2006.229.22:13:24.65#ibcon#read 5, iclass 17, count 0 2006.229.22:13:24.65#ibcon#about to read 6, iclass 17, count 0 2006.229.22:13:24.65#ibcon#read 6, iclass 17, count 0 2006.229.22:13:24.65#ibcon#end of sib2, iclass 17, count 0 2006.229.22:13:24.65#ibcon#*after write, iclass 17, count 0 2006.229.22:13:24.65#ibcon#*before return 0, iclass 17, count 0 2006.229.22:13:24.65#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:24.65#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:24.65#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:13:24.65#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:13:24.65$vck44/va=5,4 2006.229.22:13:24.65#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.22:13:24.65#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.22:13:24.65#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:24.65#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:24.71#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:24.71#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:24.71#ibcon#enter wrdev, iclass 19, count 2 2006.229.22:13:24.71#ibcon#first serial, iclass 19, count 2 2006.229.22:13:24.71#ibcon#enter sib2, iclass 19, count 2 2006.229.22:13:24.71#ibcon#flushed, iclass 19, count 2 2006.229.22:13:24.71#ibcon#about to write, iclass 19, count 2 2006.229.22:13:24.71#ibcon#wrote, iclass 19, count 2 2006.229.22:13:24.71#ibcon#about to read 3, iclass 19, count 2 2006.229.22:13:24.73#ibcon#read 3, iclass 19, count 2 2006.229.22:13:24.73#ibcon#about to read 4, iclass 19, count 2 2006.229.22:13:24.73#ibcon#read 4, iclass 19, count 2 2006.229.22:13:24.73#ibcon#about to read 5, iclass 19, count 2 2006.229.22:13:24.73#ibcon#read 5, iclass 19, count 2 2006.229.22:13:24.73#ibcon#about to read 6, iclass 19, count 2 2006.229.22:13:24.73#ibcon#read 6, iclass 19, count 2 2006.229.22:13:24.73#ibcon#end of sib2, iclass 19, count 2 2006.229.22:13:24.73#ibcon#*mode == 0, iclass 19, count 2 2006.229.22:13:24.73#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.22:13:24.73#ibcon#[25=AT05-04\r\n] 2006.229.22:13:24.73#ibcon#*before write, iclass 19, count 2 2006.229.22:13:24.73#ibcon#enter sib2, iclass 19, count 2 2006.229.22:13:24.73#ibcon#flushed, iclass 19, count 2 2006.229.22:13:24.73#ibcon#about to write, iclass 19, count 2 2006.229.22:13:24.73#ibcon#wrote, iclass 19, count 2 2006.229.22:13:24.73#ibcon#about to read 3, iclass 19, count 2 2006.229.22:13:24.76#ibcon#read 3, iclass 19, count 2 2006.229.22:13:24.76#ibcon#about to read 4, iclass 19, count 2 2006.229.22:13:24.76#ibcon#read 4, iclass 19, count 2 2006.229.22:13:24.76#ibcon#about to read 5, iclass 19, count 2 2006.229.22:13:24.76#ibcon#read 5, iclass 19, count 2 2006.229.22:13:24.76#ibcon#about to read 6, iclass 19, count 2 2006.229.22:13:24.76#ibcon#read 6, iclass 19, count 2 2006.229.22:13:24.76#ibcon#end of sib2, iclass 19, count 2 2006.229.22:13:24.76#ibcon#*after write, iclass 19, count 2 2006.229.22:13:24.76#ibcon#*before return 0, iclass 19, count 2 2006.229.22:13:24.76#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:24.76#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:24.76#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.22:13:24.76#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:24.76#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:24.88#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:24.88#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:24.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:13:24.88#ibcon#first serial, iclass 19, count 0 2006.229.22:13:24.88#ibcon#enter sib2, iclass 19, count 0 2006.229.22:13:24.88#ibcon#flushed, iclass 19, count 0 2006.229.22:13:24.88#ibcon#about to write, iclass 19, count 0 2006.229.22:13:24.88#ibcon#wrote, iclass 19, count 0 2006.229.22:13:24.88#ibcon#about to read 3, iclass 19, count 0 2006.229.22:13:24.90#ibcon#read 3, iclass 19, count 0 2006.229.22:13:24.90#ibcon#about to read 4, iclass 19, count 0 2006.229.22:13:24.90#ibcon#read 4, iclass 19, count 0 2006.229.22:13:24.90#ibcon#about to read 5, iclass 19, count 0 2006.229.22:13:24.90#ibcon#read 5, iclass 19, count 0 2006.229.22:13:24.90#ibcon#about to read 6, iclass 19, count 0 2006.229.22:13:24.90#ibcon#read 6, iclass 19, count 0 2006.229.22:13:24.90#ibcon#end of sib2, iclass 19, count 0 2006.229.22:13:24.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:13:24.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:13:24.90#ibcon#[25=USB\r\n] 2006.229.22:13:24.90#ibcon#*before write, iclass 19, count 0 2006.229.22:13:24.90#ibcon#enter sib2, iclass 19, count 0 2006.229.22:13:24.90#ibcon#flushed, iclass 19, count 0 2006.229.22:13:24.90#ibcon#about to write, iclass 19, count 0 2006.229.22:13:24.90#ibcon#wrote, iclass 19, count 0 2006.229.22:13:24.90#ibcon#about to read 3, iclass 19, count 0 2006.229.22:13:24.93#ibcon#read 3, iclass 19, count 0 2006.229.22:13:24.93#ibcon#about to read 4, iclass 19, count 0 2006.229.22:13:24.93#ibcon#read 4, iclass 19, count 0 2006.229.22:13:24.93#ibcon#about to read 5, iclass 19, count 0 2006.229.22:13:24.93#ibcon#read 5, iclass 19, count 0 2006.229.22:13:24.93#ibcon#about to read 6, iclass 19, count 0 2006.229.22:13:24.93#ibcon#read 6, iclass 19, count 0 2006.229.22:13:24.93#ibcon#end of sib2, iclass 19, count 0 2006.229.22:13:24.93#ibcon#*after write, iclass 19, count 0 2006.229.22:13:24.93#ibcon#*before return 0, iclass 19, count 0 2006.229.22:13:24.93#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:24.93#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:24.93#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:13:24.93#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:13:24.93$vck44/valo=6,814.99 2006.229.22:13:24.93#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:13:24.93#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:13:24.93#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:24.93#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:24.93#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:24.93#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:24.93#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:13:24.93#ibcon#first serial, iclass 21, count 0 2006.229.22:13:24.93#ibcon#enter sib2, iclass 21, count 0 2006.229.22:13:24.93#ibcon#flushed, iclass 21, count 0 2006.229.22:13:24.93#ibcon#about to write, iclass 21, count 0 2006.229.22:13:24.93#ibcon#wrote, iclass 21, count 0 2006.229.22:13:24.93#ibcon#about to read 3, iclass 21, count 0 2006.229.22:13:24.95#ibcon#read 3, iclass 21, count 0 2006.229.22:13:24.95#ibcon#about to read 4, iclass 21, count 0 2006.229.22:13:24.95#ibcon#read 4, iclass 21, count 0 2006.229.22:13:24.95#ibcon#about to read 5, iclass 21, count 0 2006.229.22:13:24.95#ibcon#read 5, iclass 21, count 0 2006.229.22:13:24.95#ibcon#about to read 6, iclass 21, count 0 2006.229.22:13:24.95#ibcon#read 6, iclass 21, count 0 2006.229.22:13:24.95#ibcon#end of sib2, iclass 21, count 0 2006.229.22:13:24.95#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:13:24.95#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:13:24.95#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:13:24.95#ibcon#*before write, iclass 21, count 0 2006.229.22:13:24.95#ibcon#enter sib2, iclass 21, count 0 2006.229.22:13:24.95#ibcon#flushed, iclass 21, count 0 2006.229.22:13:24.95#ibcon#about to write, iclass 21, count 0 2006.229.22:13:24.95#ibcon#wrote, iclass 21, count 0 2006.229.22:13:24.95#ibcon#about to read 3, iclass 21, count 0 2006.229.22:13:24.99#ibcon#read 3, iclass 21, count 0 2006.229.22:13:24.99#ibcon#about to read 4, iclass 21, count 0 2006.229.22:13:24.99#ibcon#read 4, iclass 21, count 0 2006.229.22:13:24.99#ibcon#about to read 5, iclass 21, count 0 2006.229.22:13:24.99#ibcon#read 5, iclass 21, count 0 2006.229.22:13:24.99#ibcon#about to read 6, iclass 21, count 0 2006.229.22:13:24.99#ibcon#read 6, iclass 21, count 0 2006.229.22:13:24.99#ibcon#end of sib2, iclass 21, count 0 2006.229.22:13:24.99#ibcon#*after write, iclass 21, count 0 2006.229.22:13:24.99#ibcon#*before return 0, iclass 21, count 0 2006.229.22:13:24.99#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:24.99#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:24.99#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:13:24.99#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:13:24.99$vck44/va=6,4 2006.229.22:13:24.99#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.22:13:24.99#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.22:13:24.99#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:24.99#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:25.05#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:25.05#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:25.05#ibcon#enter wrdev, iclass 23, count 2 2006.229.22:13:25.05#ibcon#first serial, iclass 23, count 2 2006.229.22:13:25.05#ibcon#enter sib2, iclass 23, count 2 2006.229.22:13:25.05#ibcon#flushed, iclass 23, count 2 2006.229.22:13:25.05#ibcon#about to write, iclass 23, count 2 2006.229.22:13:25.05#ibcon#wrote, iclass 23, count 2 2006.229.22:13:25.05#ibcon#about to read 3, iclass 23, count 2 2006.229.22:13:25.07#ibcon#read 3, iclass 23, count 2 2006.229.22:13:25.07#ibcon#about to read 4, iclass 23, count 2 2006.229.22:13:25.07#ibcon#read 4, iclass 23, count 2 2006.229.22:13:25.07#ibcon#about to read 5, iclass 23, count 2 2006.229.22:13:25.07#ibcon#read 5, iclass 23, count 2 2006.229.22:13:25.07#ibcon#about to read 6, iclass 23, count 2 2006.229.22:13:25.07#ibcon#read 6, iclass 23, count 2 2006.229.22:13:25.07#ibcon#end of sib2, iclass 23, count 2 2006.229.22:13:25.07#ibcon#*mode == 0, iclass 23, count 2 2006.229.22:13:25.07#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.22:13:25.07#ibcon#[25=AT06-04\r\n] 2006.229.22:13:25.07#ibcon#*before write, iclass 23, count 2 2006.229.22:13:25.07#ibcon#enter sib2, iclass 23, count 2 2006.229.22:13:25.07#ibcon#flushed, iclass 23, count 2 2006.229.22:13:25.07#ibcon#about to write, iclass 23, count 2 2006.229.22:13:25.07#ibcon#wrote, iclass 23, count 2 2006.229.22:13:25.07#ibcon#about to read 3, iclass 23, count 2 2006.229.22:13:25.10#ibcon#read 3, iclass 23, count 2 2006.229.22:13:25.10#ibcon#about to read 4, iclass 23, count 2 2006.229.22:13:25.10#ibcon#read 4, iclass 23, count 2 2006.229.22:13:25.10#ibcon#about to read 5, iclass 23, count 2 2006.229.22:13:25.10#ibcon#read 5, iclass 23, count 2 2006.229.22:13:25.10#ibcon#about to read 6, iclass 23, count 2 2006.229.22:13:25.10#ibcon#read 6, iclass 23, count 2 2006.229.22:13:25.10#ibcon#end of sib2, iclass 23, count 2 2006.229.22:13:25.10#ibcon#*after write, iclass 23, count 2 2006.229.22:13:25.10#ibcon#*before return 0, iclass 23, count 2 2006.229.22:13:25.10#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:25.10#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:25.10#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.22:13:25.10#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:25.10#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:25.22#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:25.22#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:25.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:13:25.22#ibcon#first serial, iclass 23, count 0 2006.229.22:13:25.22#ibcon#enter sib2, iclass 23, count 0 2006.229.22:13:25.22#ibcon#flushed, iclass 23, count 0 2006.229.22:13:25.22#ibcon#about to write, iclass 23, count 0 2006.229.22:13:25.22#ibcon#wrote, iclass 23, count 0 2006.229.22:13:25.22#ibcon#about to read 3, iclass 23, count 0 2006.229.22:13:25.24#ibcon#read 3, iclass 23, count 0 2006.229.22:13:25.24#ibcon#about to read 4, iclass 23, count 0 2006.229.22:13:25.24#ibcon#read 4, iclass 23, count 0 2006.229.22:13:25.24#ibcon#about to read 5, iclass 23, count 0 2006.229.22:13:25.24#ibcon#read 5, iclass 23, count 0 2006.229.22:13:25.24#ibcon#about to read 6, iclass 23, count 0 2006.229.22:13:25.24#ibcon#read 6, iclass 23, count 0 2006.229.22:13:25.24#ibcon#end of sib2, iclass 23, count 0 2006.229.22:13:25.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:13:25.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:13:25.24#ibcon#[25=USB\r\n] 2006.229.22:13:25.24#ibcon#*before write, iclass 23, count 0 2006.229.22:13:25.24#ibcon#enter sib2, iclass 23, count 0 2006.229.22:13:25.24#ibcon#flushed, iclass 23, count 0 2006.229.22:13:25.24#ibcon#about to write, iclass 23, count 0 2006.229.22:13:25.24#ibcon#wrote, iclass 23, count 0 2006.229.22:13:25.24#ibcon#about to read 3, iclass 23, count 0 2006.229.22:13:25.27#ibcon#read 3, iclass 23, count 0 2006.229.22:13:25.27#ibcon#about to read 4, iclass 23, count 0 2006.229.22:13:25.27#ibcon#read 4, iclass 23, count 0 2006.229.22:13:25.27#ibcon#about to read 5, iclass 23, count 0 2006.229.22:13:25.27#ibcon#read 5, iclass 23, count 0 2006.229.22:13:25.27#ibcon#about to read 6, iclass 23, count 0 2006.229.22:13:25.27#ibcon#read 6, iclass 23, count 0 2006.229.22:13:25.27#ibcon#end of sib2, iclass 23, count 0 2006.229.22:13:25.27#ibcon#*after write, iclass 23, count 0 2006.229.22:13:25.27#ibcon#*before return 0, iclass 23, count 0 2006.229.22:13:25.27#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:25.27#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:25.27#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:13:25.27#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:13:25.27$vck44/valo=7,864.99 2006.229.22:13:25.27#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.22:13:25.27#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.22:13:25.27#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:25.27#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:25.27#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:25.27#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:25.27#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:13:25.27#ibcon#first serial, iclass 25, count 0 2006.229.22:13:25.27#ibcon#enter sib2, iclass 25, count 0 2006.229.22:13:25.27#ibcon#flushed, iclass 25, count 0 2006.229.22:13:25.27#ibcon#about to write, iclass 25, count 0 2006.229.22:13:25.27#ibcon#wrote, iclass 25, count 0 2006.229.22:13:25.27#ibcon#about to read 3, iclass 25, count 0 2006.229.22:13:25.29#ibcon#read 3, iclass 25, count 0 2006.229.22:13:25.29#ibcon#about to read 4, iclass 25, count 0 2006.229.22:13:25.29#ibcon#read 4, iclass 25, count 0 2006.229.22:13:25.29#ibcon#about to read 5, iclass 25, count 0 2006.229.22:13:25.29#ibcon#read 5, iclass 25, count 0 2006.229.22:13:25.29#ibcon#about to read 6, iclass 25, count 0 2006.229.22:13:25.29#ibcon#read 6, iclass 25, count 0 2006.229.22:13:25.29#ibcon#end of sib2, iclass 25, count 0 2006.229.22:13:25.29#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:13:25.29#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:13:25.29#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:13:25.29#ibcon#*before write, iclass 25, count 0 2006.229.22:13:25.29#ibcon#enter sib2, iclass 25, count 0 2006.229.22:13:25.29#ibcon#flushed, iclass 25, count 0 2006.229.22:13:25.29#ibcon#about to write, iclass 25, count 0 2006.229.22:13:25.29#ibcon#wrote, iclass 25, count 0 2006.229.22:13:25.29#ibcon#about to read 3, iclass 25, count 0 2006.229.22:13:25.33#ibcon#read 3, iclass 25, count 0 2006.229.22:13:25.33#ibcon#about to read 4, iclass 25, count 0 2006.229.22:13:25.33#ibcon#read 4, iclass 25, count 0 2006.229.22:13:25.33#ibcon#about to read 5, iclass 25, count 0 2006.229.22:13:25.33#ibcon#read 5, iclass 25, count 0 2006.229.22:13:25.33#ibcon#about to read 6, iclass 25, count 0 2006.229.22:13:25.33#ibcon#read 6, iclass 25, count 0 2006.229.22:13:25.33#ibcon#end of sib2, iclass 25, count 0 2006.229.22:13:25.33#ibcon#*after write, iclass 25, count 0 2006.229.22:13:25.33#ibcon#*before return 0, iclass 25, count 0 2006.229.22:13:25.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:25.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:25.33#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:13:25.33#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:13:25.33$vck44/va=7,5 2006.229.22:13:25.33#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.22:13:25.33#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.22:13:25.33#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:25.33#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:25.39#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:25.39#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:25.39#ibcon#enter wrdev, iclass 27, count 2 2006.229.22:13:25.39#ibcon#first serial, iclass 27, count 2 2006.229.22:13:25.39#ibcon#enter sib2, iclass 27, count 2 2006.229.22:13:25.39#ibcon#flushed, iclass 27, count 2 2006.229.22:13:25.39#ibcon#about to write, iclass 27, count 2 2006.229.22:13:25.39#ibcon#wrote, iclass 27, count 2 2006.229.22:13:25.39#ibcon#about to read 3, iclass 27, count 2 2006.229.22:13:25.41#ibcon#read 3, iclass 27, count 2 2006.229.22:13:25.41#ibcon#about to read 4, iclass 27, count 2 2006.229.22:13:25.41#ibcon#read 4, iclass 27, count 2 2006.229.22:13:25.41#ibcon#about to read 5, iclass 27, count 2 2006.229.22:13:25.41#ibcon#read 5, iclass 27, count 2 2006.229.22:13:25.41#ibcon#about to read 6, iclass 27, count 2 2006.229.22:13:25.41#ibcon#read 6, iclass 27, count 2 2006.229.22:13:25.41#ibcon#end of sib2, iclass 27, count 2 2006.229.22:13:25.41#ibcon#*mode == 0, iclass 27, count 2 2006.229.22:13:25.41#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.22:13:25.41#ibcon#[25=AT07-05\r\n] 2006.229.22:13:25.41#ibcon#*before write, iclass 27, count 2 2006.229.22:13:25.41#ibcon#enter sib2, iclass 27, count 2 2006.229.22:13:25.41#ibcon#flushed, iclass 27, count 2 2006.229.22:13:25.41#ibcon#about to write, iclass 27, count 2 2006.229.22:13:25.41#ibcon#wrote, iclass 27, count 2 2006.229.22:13:25.41#ibcon#about to read 3, iclass 27, count 2 2006.229.22:13:25.44#ibcon#read 3, iclass 27, count 2 2006.229.22:13:25.44#ibcon#about to read 4, iclass 27, count 2 2006.229.22:13:25.44#ibcon#read 4, iclass 27, count 2 2006.229.22:13:25.44#ibcon#about to read 5, iclass 27, count 2 2006.229.22:13:25.44#ibcon#read 5, iclass 27, count 2 2006.229.22:13:25.44#ibcon#about to read 6, iclass 27, count 2 2006.229.22:13:25.44#ibcon#read 6, iclass 27, count 2 2006.229.22:13:25.44#ibcon#end of sib2, iclass 27, count 2 2006.229.22:13:25.44#ibcon#*after write, iclass 27, count 2 2006.229.22:13:25.44#ibcon#*before return 0, iclass 27, count 2 2006.229.22:13:25.44#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:25.44#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:25.44#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.22:13:25.44#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:25.44#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:25.56#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:25.56#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:25.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:13:25.56#ibcon#first serial, iclass 27, count 0 2006.229.22:13:25.56#ibcon#enter sib2, iclass 27, count 0 2006.229.22:13:25.56#ibcon#flushed, iclass 27, count 0 2006.229.22:13:25.56#ibcon#about to write, iclass 27, count 0 2006.229.22:13:25.56#ibcon#wrote, iclass 27, count 0 2006.229.22:13:25.56#ibcon#about to read 3, iclass 27, count 0 2006.229.22:13:25.58#ibcon#read 3, iclass 27, count 0 2006.229.22:13:25.58#ibcon#about to read 4, iclass 27, count 0 2006.229.22:13:25.58#ibcon#read 4, iclass 27, count 0 2006.229.22:13:25.58#ibcon#about to read 5, iclass 27, count 0 2006.229.22:13:25.58#ibcon#read 5, iclass 27, count 0 2006.229.22:13:25.58#ibcon#about to read 6, iclass 27, count 0 2006.229.22:13:25.58#ibcon#read 6, iclass 27, count 0 2006.229.22:13:25.58#ibcon#end of sib2, iclass 27, count 0 2006.229.22:13:25.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:13:25.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:13:25.58#ibcon#[25=USB\r\n] 2006.229.22:13:25.58#ibcon#*before write, iclass 27, count 0 2006.229.22:13:25.58#ibcon#enter sib2, iclass 27, count 0 2006.229.22:13:25.58#ibcon#flushed, iclass 27, count 0 2006.229.22:13:25.58#ibcon#about to write, iclass 27, count 0 2006.229.22:13:25.58#ibcon#wrote, iclass 27, count 0 2006.229.22:13:25.58#ibcon#about to read 3, iclass 27, count 0 2006.229.22:13:25.61#ibcon#read 3, iclass 27, count 0 2006.229.22:13:25.61#ibcon#about to read 4, iclass 27, count 0 2006.229.22:13:25.61#ibcon#read 4, iclass 27, count 0 2006.229.22:13:25.61#ibcon#about to read 5, iclass 27, count 0 2006.229.22:13:25.61#ibcon#read 5, iclass 27, count 0 2006.229.22:13:25.61#ibcon#about to read 6, iclass 27, count 0 2006.229.22:13:25.61#ibcon#read 6, iclass 27, count 0 2006.229.22:13:25.61#ibcon#end of sib2, iclass 27, count 0 2006.229.22:13:25.61#ibcon#*after write, iclass 27, count 0 2006.229.22:13:25.61#ibcon#*before return 0, iclass 27, count 0 2006.229.22:13:25.61#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:25.61#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:25.61#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:13:25.61#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:13:25.61$vck44/valo=8,884.99 2006.229.22:13:25.61#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.22:13:25.61#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.22:13:25.61#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:25.61#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:25.61#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:25.61#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:25.61#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:13:25.61#ibcon#first serial, iclass 29, count 0 2006.229.22:13:25.61#ibcon#enter sib2, iclass 29, count 0 2006.229.22:13:25.61#ibcon#flushed, iclass 29, count 0 2006.229.22:13:25.61#ibcon#about to write, iclass 29, count 0 2006.229.22:13:25.61#ibcon#wrote, iclass 29, count 0 2006.229.22:13:25.61#ibcon#about to read 3, iclass 29, count 0 2006.229.22:13:25.63#ibcon#read 3, iclass 29, count 0 2006.229.22:13:25.63#ibcon#about to read 4, iclass 29, count 0 2006.229.22:13:25.63#ibcon#read 4, iclass 29, count 0 2006.229.22:13:25.63#ibcon#about to read 5, iclass 29, count 0 2006.229.22:13:25.63#ibcon#read 5, iclass 29, count 0 2006.229.22:13:25.63#ibcon#about to read 6, iclass 29, count 0 2006.229.22:13:25.63#ibcon#read 6, iclass 29, count 0 2006.229.22:13:25.63#ibcon#end of sib2, iclass 29, count 0 2006.229.22:13:25.63#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:13:25.63#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:13:25.63#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:13:25.63#ibcon#*before write, iclass 29, count 0 2006.229.22:13:25.63#ibcon#enter sib2, iclass 29, count 0 2006.229.22:13:25.63#ibcon#flushed, iclass 29, count 0 2006.229.22:13:25.63#ibcon#about to write, iclass 29, count 0 2006.229.22:13:25.63#ibcon#wrote, iclass 29, count 0 2006.229.22:13:25.63#ibcon#about to read 3, iclass 29, count 0 2006.229.22:13:25.67#ibcon#read 3, iclass 29, count 0 2006.229.22:13:25.67#ibcon#about to read 4, iclass 29, count 0 2006.229.22:13:25.67#ibcon#read 4, iclass 29, count 0 2006.229.22:13:25.67#ibcon#about to read 5, iclass 29, count 0 2006.229.22:13:25.67#ibcon#read 5, iclass 29, count 0 2006.229.22:13:25.67#ibcon#about to read 6, iclass 29, count 0 2006.229.22:13:25.67#ibcon#read 6, iclass 29, count 0 2006.229.22:13:25.67#ibcon#end of sib2, iclass 29, count 0 2006.229.22:13:25.67#ibcon#*after write, iclass 29, count 0 2006.229.22:13:25.67#ibcon#*before return 0, iclass 29, count 0 2006.229.22:13:25.67#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:25.67#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:25.67#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:13:25.67#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:13:25.67$vck44/va=8,6 2006.229.22:13:25.67#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.22:13:25.67#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.22:13:25.67#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:25.67#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:13:25.73#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:13:25.73#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:13:25.73#ibcon#enter wrdev, iclass 31, count 2 2006.229.22:13:25.73#ibcon#first serial, iclass 31, count 2 2006.229.22:13:25.73#ibcon#enter sib2, iclass 31, count 2 2006.229.22:13:25.73#ibcon#flushed, iclass 31, count 2 2006.229.22:13:25.73#ibcon#about to write, iclass 31, count 2 2006.229.22:13:25.73#ibcon#wrote, iclass 31, count 2 2006.229.22:13:25.73#ibcon#about to read 3, iclass 31, count 2 2006.229.22:13:25.75#ibcon#read 3, iclass 31, count 2 2006.229.22:13:25.75#ibcon#about to read 4, iclass 31, count 2 2006.229.22:13:25.75#ibcon#read 4, iclass 31, count 2 2006.229.22:13:25.75#ibcon#about to read 5, iclass 31, count 2 2006.229.22:13:25.75#ibcon#read 5, iclass 31, count 2 2006.229.22:13:25.75#ibcon#about to read 6, iclass 31, count 2 2006.229.22:13:25.75#ibcon#read 6, iclass 31, count 2 2006.229.22:13:25.75#ibcon#end of sib2, iclass 31, count 2 2006.229.22:13:25.75#ibcon#*mode == 0, iclass 31, count 2 2006.229.22:13:25.75#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.22:13:25.75#ibcon#[25=AT08-06\r\n] 2006.229.22:13:25.75#ibcon#*before write, iclass 31, count 2 2006.229.22:13:25.75#ibcon#enter sib2, iclass 31, count 2 2006.229.22:13:25.75#ibcon#flushed, iclass 31, count 2 2006.229.22:13:25.75#ibcon#about to write, iclass 31, count 2 2006.229.22:13:25.75#ibcon#wrote, iclass 31, count 2 2006.229.22:13:25.75#ibcon#about to read 3, iclass 31, count 2 2006.229.22:13:25.78#ibcon#read 3, iclass 31, count 2 2006.229.22:13:25.78#ibcon#about to read 4, iclass 31, count 2 2006.229.22:13:25.78#ibcon#read 4, iclass 31, count 2 2006.229.22:13:25.78#ibcon#about to read 5, iclass 31, count 2 2006.229.22:13:25.78#ibcon#read 5, iclass 31, count 2 2006.229.22:13:25.78#ibcon#about to read 6, iclass 31, count 2 2006.229.22:13:25.78#ibcon#read 6, iclass 31, count 2 2006.229.22:13:25.78#ibcon#end of sib2, iclass 31, count 2 2006.229.22:13:25.78#ibcon#*after write, iclass 31, count 2 2006.229.22:13:25.78#ibcon#*before return 0, iclass 31, count 2 2006.229.22:13:25.78#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:13:25.78#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:13:25.78#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.22:13:25.78#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:25.78#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:13:25.90#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:13:25.90#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:13:25.90#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:13:25.90#ibcon#first serial, iclass 31, count 0 2006.229.22:13:25.90#ibcon#enter sib2, iclass 31, count 0 2006.229.22:13:25.90#ibcon#flushed, iclass 31, count 0 2006.229.22:13:25.90#ibcon#about to write, iclass 31, count 0 2006.229.22:13:25.90#ibcon#wrote, iclass 31, count 0 2006.229.22:13:25.90#ibcon#about to read 3, iclass 31, count 0 2006.229.22:13:25.92#ibcon#read 3, iclass 31, count 0 2006.229.22:13:25.92#ibcon#about to read 4, iclass 31, count 0 2006.229.22:13:25.92#ibcon#read 4, iclass 31, count 0 2006.229.22:13:25.92#ibcon#about to read 5, iclass 31, count 0 2006.229.22:13:25.92#ibcon#read 5, iclass 31, count 0 2006.229.22:13:25.92#ibcon#about to read 6, iclass 31, count 0 2006.229.22:13:25.92#ibcon#read 6, iclass 31, count 0 2006.229.22:13:25.92#ibcon#end of sib2, iclass 31, count 0 2006.229.22:13:25.92#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:13:25.92#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:13:25.92#ibcon#[25=USB\r\n] 2006.229.22:13:25.92#ibcon#*before write, iclass 31, count 0 2006.229.22:13:25.92#ibcon#enter sib2, iclass 31, count 0 2006.229.22:13:25.92#ibcon#flushed, iclass 31, count 0 2006.229.22:13:25.92#ibcon#about to write, iclass 31, count 0 2006.229.22:13:25.92#ibcon#wrote, iclass 31, count 0 2006.229.22:13:25.92#ibcon#about to read 3, iclass 31, count 0 2006.229.22:13:25.95#ibcon#read 3, iclass 31, count 0 2006.229.22:13:25.95#ibcon#about to read 4, iclass 31, count 0 2006.229.22:13:25.95#ibcon#read 4, iclass 31, count 0 2006.229.22:13:25.95#ibcon#about to read 5, iclass 31, count 0 2006.229.22:13:25.95#ibcon#read 5, iclass 31, count 0 2006.229.22:13:25.95#ibcon#about to read 6, iclass 31, count 0 2006.229.22:13:25.95#ibcon#read 6, iclass 31, count 0 2006.229.22:13:25.95#ibcon#end of sib2, iclass 31, count 0 2006.229.22:13:25.95#ibcon#*after write, iclass 31, count 0 2006.229.22:13:25.95#ibcon#*before return 0, iclass 31, count 0 2006.229.22:13:25.95#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:13:25.95#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:13:25.95#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:13:25.95#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:13:25.95$vck44/vblo=1,629.99 2006.229.22:13:25.95#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.22:13:25.95#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.22:13:25.95#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:25.95#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:13:25.95#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:13:25.95#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:13:25.95#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:13:25.95#ibcon#first serial, iclass 33, count 0 2006.229.22:13:25.95#ibcon#enter sib2, iclass 33, count 0 2006.229.22:13:25.95#ibcon#flushed, iclass 33, count 0 2006.229.22:13:25.95#ibcon#about to write, iclass 33, count 0 2006.229.22:13:25.95#ibcon#wrote, iclass 33, count 0 2006.229.22:13:25.95#ibcon#about to read 3, iclass 33, count 0 2006.229.22:13:25.97#ibcon#read 3, iclass 33, count 0 2006.229.22:13:25.97#ibcon#about to read 4, iclass 33, count 0 2006.229.22:13:25.97#ibcon#read 4, iclass 33, count 0 2006.229.22:13:25.97#ibcon#about to read 5, iclass 33, count 0 2006.229.22:13:25.97#ibcon#read 5, iclass 33, count 0 2006.229.22:13:25.97#ibcon#about to read 6, iclass 33, count 0 2006.229.22:13:25.97#ibcon#read 6, iclass 33, count 0 2006.229.22:13:25.97#ibcon#end of sib2, iclass 33, count 0 2006.229.22:13:25.97#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:13:25.97#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:13:25.97#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:13:25.97#ibcon#*before write, iclass 33, count 0 2006.229.22:13:25.97#ibcon#enter sib2, iclass 33, count 0 2006.229.22:13:25.97#ibcon#flushed, iclass 33, count 0 2006.229.22:13:25.97#ibcon#about to write, iclass 33, count 0 2006.229.22:13:25.97#ibcon#wrote, iclass 33, count 0 2006.229.22:13:25.97#ibcon#about to read 3, iclass 33, count 0 2006.229.22:13:26.01#ibcon#read 3, iclass 33, count 0 2006.229.22:13:26.01#ibcon#about to read 4, iclass 33, count 0 2006.229.22:13:26.01#ibcon#read 4, iclass 33, count 0 2006.229.22:13:26.01#ibcon#about to read 5, iclass 33, count 0 2006.229.22:13:26.01#ibcon#read 5, iclass 33, count 0 2006.229.22:13:26.01#ibcon#about to read 6, iclass 33, count 0 2006.229.22:13:26.01#ibcon#read 6, iclass 33, count 0 2006.229.22:13:26.01#ibcon#end of sib2, iclass 33, count 0 2006.229.22:13:26.01#ibcon#*after write, iclass 33, count 0 2006.229.22:13:26.01#ibcon#*before return 0, iclass 33, count 0 2006.229.22:13:26.01#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:13:26.01#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:13:26.01#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:13:26.01#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:13:26.01$vck44/vb=1,4 2006.229.22:13:26.01#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.22:13:26.01#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.22:13:26.01#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:26.01#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:13:26.01#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:13:26.01#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:13:26.01#ibcon#enter wrdev, iclass 35, count 2 2006.229.22:13:26.01#ibcon#first serial, iclass 35, count 2 2006.229.22:13:26.01#ibcon#enter sib2, iclass 35, count 2 2006.229.22:13:26.01#ibcon#flushed, iclass 35, count 2 2006.229.22:13:26.01#ibcon#about to write, iclass 35, count 2 2006.229.22:13:26.01#ibcon#wrote, iclass 35, count 2 2006.229.22:13:26.01#ibcon#about to read 3, iclass 35, count 2 2006.229.22:13:26.03#ibcon#read 3, iclass 35, count 2 2006.229.22:13:26.03#ibcon#about to read 4, iclass 35, count 2 2006.229.22:13:26.03#ibcon#read 4, iclass 35, count 2 2006.229.22:13:26.03#ibcon#about to read 5, iclass 35, count 2 2006.229.22:13:26.03#ibcon#read 5, iclass 35, count 2 2006.229.22:13:26.03#ibcon#about to read 6, iclass 35, count 2 2006.229.22:13:26.03#ibcon#read 6, iclass 35, count 2 2006.229.22:13:26.03#ibcon#end of sib2, iclass 35, count 2 2006.229.22:13:26.03#ibcon#*mode == 0, iclass 35, count 2 2006.229.22:13:26.03#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.22:13:26.03#ibcon#[27=AT01-04\r\n] 2006.229.22:13:26.03#ibcon#*before write, iclass 35, count 2 2006.229.22:13:26.03#ibcon#enter sib2, iclass 35, count 2 2006.229.22:13:26.03#ibcon#flushed, iclass 35, count 2 2006.229.22:13:26.03#ibcon#about to write, iclass 35, count 2 2006.229.22:13:26.03#ibcon#wrote, iclass 35, count 2 2006.229.22:13:26.03#ibcon#about to read 3, iclass 35, count 2 2006.229.22:13:26.06#ibcon#read 3, iclass 35, count 2 2006.229.22:13:26.06#ibcon#about to read 4, iclass 35, count 2 2006.229.22:13:26.06#ibcon#read 4, iclass 35, count 2 2006.229.22:13:26.06#ibcon#about to read 5, iclass 35, count 2 2006.229.22:13:26.06#ibcon#read 5, iclass 35, count 2 2006.229.22:13:26.06#ibcon#about to read 6, iclass 35, count 2 2006.229.22:13:26.06#ibcon#read 6, iclass 35, count 2 2006.229.22:13:26.06#ibcon#end of sib2, iclass 35, count 2 2006.229.22:13:26.06#ibcon#*after write, iclass 35, count 2 2006.229.22:13:26.06#ibcon#*before return 0, iclass 35, count 2 2006.229.22:13:26.06#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:13:26.06#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:13:26.06#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.22:13:26.06#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:26.06#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:13:26.18#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:13:26.18#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:13:26.18#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:13:26.18#ibcon#first serial, iclass 35, count 0 2006.229.22:13:26.18#ibcon#enter sib2, iclass 35, count 0 2006.229.22:13:26.18#ibcon#flushed, iclass 35, count 0 2006.229.22:13:26.18#ibcon#about to write, iclass 35, count 0 2006.229.22:13:26.18#ibcon#wrote, iclass 35, count 0 2006.229.22:13:26.18#ibcon#about to read 3, iclass 35, count 0 2006.229.22:13:26.20#ibcon#read 3, iclass 35, count 0 2006.229.22:13:26.20#ibcon#about to read 4, iclass 35, count 0 2006.229.22:13:26.20#ibcon#read 4, iclass 35, count 0 2006.229.22:13:26.20#ibcon#about to read 5, iclass 35, count 0 2006.229.22:13:26.20#ibcon#read 5, iclass 35, count 0 2006.229.22:13:26.20#ibcon#about to read 6, iclass 35, count 0 2006.229.22:13:26.20#ibcon#read 6, iclass 35, count 0 2006.229.22:13:26.20#ibcon#end of sib2, iclass 35, count 0 2006.229.22:13:26.20#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:13:26.20#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:13:26.20#ibcon#[27=USB\r\n] 2006.229.22:13:26.20#ibcon#*before write, iclass 35, count 0 2006.229.22:13:26.20#ibcon#enter sib2, iclass 35, count 0 2006.229.22:13:26.20#ibcon#flushed, iclass 35, count 0 2006.229.22:13:26.20#ibcon#about to write, iclass 35, count 0 2006.229.22:13:26.20#ibcon#wrote, iclass 35, count 0 2006.229.22:13:26.20#ibcon#about to read 3, iclass 35, count 0 2006.229.22:13:26.23#ibcon#read 3, iclass 35, count 0 2006.229.22:13:26.23#ibcon#about to read 4, iclass 35, count 0 2006.229.22:13:26.23#ibcon#read 4, iclass 35, count 0 2006.229.22:13:26.23#ibcon#about to read 5, iclass 35, count 0 2006.229.22:13:26.23#ibcon#read 5, iclass 35, count 0 2006.229.22:13:26.23#ibcon#about to read 6, iclass 35, count 0 2006.229.22:13:26.23#ibcon#read 6, iclass 35, count 0 2006.229.22:13:26.23#ibcon#end of sib2, iclass 35, count 0 2006.229.22:13:26.23#ibcon#*after write, iclass 35, count 0 2006.229.22:13:26.23#ibcon#*before return 0, iclass 35, count 0 2006.229.22:13:26.23#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:13:26.23#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:13:26.23#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:13:26.23#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:13:26.23$vck44/vblo=2,634.99 2006.229.22:13:26.23#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.22:13:26.23#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.22:13:26.23#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:26.23#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:26.23#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:26.23#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:26.23#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:13:26.23#ibcon#first serial, iclass 37, count 0 2006.229.22:13:26.23#ibcon#enter sib2, iclass 37, count 0 2006.229.22:13:26.23#ibcon#flushed, iclass 37, count 0 2006.229.22:13:26.23#ibcon#about to write, iclass 37, count 0 2006.229.22:13:26.23#ibcon#wrote, iclass 37, count 0 2006.229.22:13:26.23#ibcon#about to read 3, iclass 37, count 0 2006.229.22:13:26.25#ibcon#read 3, iclass 37, count 0 2006.229.22:13:26.25#ibcon#about to read 4, iclass 37, count 0 2006.229.22:13:26.25#ibcon#read 4, iclass 37, count 0 2006.229.22:13:26.25#ibcon#about to read 5, iclass 37, count 0 2006.229.22:13:26.25#ibcon#read 5, iclass 37, count 0 2006.229.22:13:26.25#ibcon#about to read 6, iclass 37, count 0 2006.229.22:13:26.25#ibcon#read 6, iclass 37, count 0 2006.229.22:13:26.25#ibcon#end of sib2, iclass 37, count 0 2006.229.22:13:26.25#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:13:26.25#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:13:26.25#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:13:26.25#ibcon#*before write, iclass 37, count 0 2006.229.22:13:26.25#ibcon#enter sib2, iclass 37, count 0 2006.229.22:13:26.25#ibcon#flushed, iclass 37, count 0 2006.229.22:13:26.25#ibcon#about to write, iclass 37, count 0 2006.229.22:13:26.25#ibcon#wrote, iclass 37, count 0 2006.229.22:13:26.25#ibcon#about to read 3, iclass 37, count 0 2006.229.22:13:26.29#ibcon#read 3, iclass 37, count 0 2006.229.22:13:26.29#ibcon#about to read 4, iclass 37, count 0 2006.229.22:13:26.29#ibcon#read 4, iclass 37, count 0 2006.229.22:13:26.29#ibcon#about to read 5, iclass 37, count 0 2006.229.22:13:26.29#ibcon#read 5, iclass 37, count 0 2006.229.22:13:26.29#ibcon#about to read 6, iclass 37, count 0 2006.229.22:13:26.29#ibcon#read 6, iclass 37, count 0 2006.229.22:13:26.29#ibcon#end of sib2, iclass 37, count 0 2006.229.22:13:26.29#ibcon#*after write, iclass 37, count 0 2006.229.22:13:26.29#ibcon#*before return 0, iclass 37, count 0 2006.229.22:13:26.29#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:26.29#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:13:26.29#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:13:26.29#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:13:26.29$vck44/vb=2,4 2006.229.22:13:26.29#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.22:13:26.29#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.22:13:26.29#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:26.29#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:26.35#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:26.35#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:26.35#ibcon#enter wrdev, iclass 39, count 2 2006.229.22:13:26.35#ibcon#first serial, iclass 39, count 2 2006.229.22:13:26.35#ibcon#enter sib2, iclass 39, count 2 2006.229.22:13:26.35#ibcon#flushed, iclass 39, count 2 2006.229.22:13:26.35#ibcon#about to write, iclass 39, count 2 2006.229.22:13:26.35#ibcon#wrote, iclass 39, count 2 2006.229.22:13:26.35#ibcon#about to read 3, iclass 39, count 2 2006.229.22:13:26.37#ibcon#read 3, iclass 39, count 2 2006.229.22:13:26.37#ibcon#about to read 4, iclass 39, count 2 2006.229.22:13:26.37#ibcon#read 4, iclass 39, count 2 2006.229.22:13:26.37#ibcon#about to read 5, iclass 39, count 2 2006.229.22:13:26.37#ibcon#read 5, iclass 39, count 2 2006.229.22:13:26.37#ibcon#about to read 6, iclass 39, count 2 2006.229.22:13:26.37#ibcon#read 6, iclass 39, count 2 2006.229.22:13:26.37#ibcon#end of sib2, iclass 39, count 2 2006.229.22:13:26.37#ibcon#*mode == 0, iclass 39, count 2 2006.229.22:13:26.37#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.22:13:26.37#ibcon#[27=AT02-04\r\n] 2006.229.22:13:26.37#ibcon#*before write, iclass 39, count 2 2006.229.22:13:26.37#ibcon#enter sib2, iclass 39, count 2 2006.229.22:13:26.37#ibcon#flushed, iclass 39, count 2 2006.229.22:13:26.37#ibcon#about to write, iclass 39, count 2 2006.229.22:13:26.37#ibcon#wrote, iclass 39, count 2 2006.229.22:13:26.37#ibcon#about to read 3, iclass 39, count 2 2006.229.22:13:26.40#ibcon#read 3, iclass 39, count 2 2006.229.22:13:26.40#ibcon#about to read 4, iclass 39, count 2 2006.229.22:13:26.40#ibcon#read 4, iclass 39, count 2 2006.229.22:13:26.40#ibcon#about to read 5, iclass 39, count 2 2006.229.22:13:26.40#ibcon#read 5, iclass 39, count 2 2006.229.22:13:26.40#ibcon#about to read 6, iclass 39, count 2 2006.229.22:13:26.40#ibcon#read 6, iclass 39, count 2 2006.229.22:13:26.40#ibcon#end of sib2, iclass 39, count 2 2006.229.22:13:26.40#ibcon#*after write, iclass 39, count 2 2006.229.22:13:26.40#ibcon#*before return 0, iclass 39, count 2 2006.229.22:13:26.40#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:26.40#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:13:26.40#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.22:13:26.40#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:26.40#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:26.52#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:26.52#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:26.52#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:13:26.52#ibcon#first serial, iclass 39, count 0 2006.229.22:13:26.52#ibcon#enter sib2, iclass 39, count 0 2006.229.22:13:26.52#ibcon#flushed, iclass 39, count 0 2006.229.22:13:26.52#ibcon#about to write, iclass 39, count 0 2006.229.22:13:26.52#ibcon#wrote, iclass 39, count 0 2006.229.22:13:26.52#ibcon#about to read 3, iclass 39, count 0 2006.229.22:13:26.54#ibcon#read 3, iclass 39, count 0 2006.229.22:13:26.54#ibcon#about to read 4, iclass 39, count 0 2006.229.22:13:26.54#ibcon#read 4, iclass 39, count 0 2006.229.22:13:26.54#ibcon#about to read 5, iclass 39, count 0 2006.229.22:13:26.54#ibcon#read 5, iclass 39, count 0 2006.229.22:13:26.54#ibcon#about to read 6, iclass 39, count 0 2006.229.22:13:26.54#ibcon#read 6, iclass 39, count 0 2006.229.22:13:26.54#ibcon#end of sib2, iclass 39, count 0 2006.229.22:13:26.54#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:13:26.54#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:13:26.54#ibcon#[27=USB\r\n] 2006.229.22:13:26.54#ibcon#*before write, iclass 39, count 0 2006.229.22:13:26.54#ibcon#enter sib2, iclass 39, count 0 2006.229.22:13:26.54#ibcon#flushed, iclass 39, count 0 2006.229.22:13:26.54#ibcon#about to write, iclass 39, count 0 2006.229.22:13:26.54#ibcon#wrote, iclass 39, count 0 2006.229.22:13:26.54#ibcon#about to read 3, iclass 39, count 0 2006.229.22:13:26.57#ibcon#read 3, iclass 39, count 0 2006.229.22:13:26.57#ibcon#about to read 4, iclass 39, count 0 2006.229.22:13:26.57#ibcon#read 4, iclass 39, count 0 2006.229.22:13:26.57#ibcon#about to read 5, iclass 39, count 0 2006.229.22:13:26.57#ibcon#read 5, iclass 39, count 0 2006.229.22:13:26.57#ibcon#about to read 6, iclass 39, count 0 2006.229.22:13:26.57#ibcon#read 6, iclass 39, count 0 2006.229.22:13:26.57#ibcon#end of sib2, iclass 39, count 0 2006.229.22:13:26.57#ibcon#*after write, iclass 39, count 0 2006.229.22:13:26.57#ibcon#*before return 0, iclass 39, count 0 2006.229.22:13:26.57#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:26.57#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:13:26.57#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:13:26.57#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:13:26.57$vck44/vblo=3,649.99 2006.229.22:13:26.57#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.22:13:26.57#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.22:13:26.57#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:26.57#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:26.57#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:26.57#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:26.57#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:13:26.57#ibcon#first serial, iclass 3, count 0 2006.229.22:13:26.57#ibcon#enter sib2, iclass 3, count 0 2006.229.22:13:26.57#ibcon#flushed, iclass 3, count 0 2006.229.22:13:26.57#ibcon#about to write, iclass 3, count 0 2006.229.22:13:26.57#ibcon#wrote, iclass 3, count 0 2006.229.22:13:26.57#ibcon#about to read 3, iclass 3, count 0 2006.229.22:13:26.59#ibcon#read 3, iclass 3, count 0 2006.229.22:13:26.59#ibcon#about to read 4, iclass 3, count 0 2006.229.22:13:26.59#ibcon#read 4, iclass 3, count 0 2006.229.22:13:26.59#ibcon#about to read 5, iclass 3, count 0 2006.229.22:13:26.59#ibcon#read 5, iclass 3, count 0 2006.229.22:13:26.59#ibcon#about to read 6, iclass 3, count 0 2006.229.22:13:26.59#ibcon#read 6, iclass 3, count 0 2006.229.22:13:26.59#ibcon#end of sib2, iclass 3, count 0 2006.229.22:13:26.59#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:13:26.59#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:13:26.59#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:13:26.59#ibcon#*before write, iclass 3, count 0 2006.229.22:13:26.59#ibcon#enter sib2, iclass 3, count 0 2006.229.22:13:26.59#ibcon#flushed, iclass 3, count 0 2006.229.22:13:26.59#ibcon#about to write, iclass 3, count 0 2006.229.22:13:26.59#ibcon#wrote, iclass 3, count 0 2006.229.22:13:26.59#ibcon#about to read 3, iclass 3, count 0 2006.229.22:13:26.63#ibcon#read 3, iclass 3, count 0 2006.229.22:13:26.63#ibcon#about to read 4, iclass 3, count 0 2006.229.22:13:26.63#ibcon#read 4, iclass 3, count 0 2006.229.22:13:26.63#ibcon#about to read 5, iclass 3, count 0 2006.229.22:13:26.63#ibcon#read 5, iclass 3, count 0 2006.229.22:13:26.63#ibcon#about to read 6, iclass 3, count 0 2006.229.22:13:26.63#ibcon#read 6, iclass 3, count 0 2006.229.22:13:26.63#ibcon#end of sib2, iclass 3, count 0 2006.229.22:13:26.63#ibcon#*after write, iclass 3, count 0 2006.229.22:13:26.63#ibcon#*before return 0, iclass 3, count 0 2006.229.22:13:26.63#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:26.63#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:13:26.63#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:13:26.63#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:13:26.63$vck44/vb=3,4 2006.229.22:13:26.63#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.22:13:26.63#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.22:13:26.63#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:26.63#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:26.69#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:26.69#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:26.69#ibcon#enter wrdev, iclass 5, count 2 2006.229.22:13:26.69#ibcon#first serial, iclass 5, count 2 2006.229.22:13:26.69#ibcon#enter sib2, iclass 5, count 2 2006.229.22:13:26.69#ibcon#flushed, iclass 5, count 2 2006.229.22:13:26.69#ibcon#about to write, iclass 5, count 2 2006.229.22:13:26.69#ibcon#wrote, iclass 5, count 2 2006.229.22:13:26.69#ibcon#about to read 3, iclass 5, count 2 2006.229.22:13:26.71#ibcon#read 3, iclass 5, count 2 2006.229.22:13:26.71#ibcon#about to read 4, iclass 5, count 2 2006.229.22:13:26.71#ibcon#read 4, iclass 5, count 2 2006.229.22:13:26.71#ibcon#about to read 5, iclass 5, count 2 2006.229.22:13:26.71#ibcon#read 5, iclass 5, count 2 2006.229.22:13:26.71#ibcon#about to read 6, iclass 5, count 2 2006.229.22:13:26.71#ibcon#read 6, iclass 5, count 2 2006.229.22:13:26.71#ibcon#end of sib2, iclass 5, count 2 2006.229.22:13:26.71#ibcon#*mode == 0, iclass 5, count 2 2006.229.22:13:26.71#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.22:13:26.71#ibcon#[27=AT03-04\r\n] 2006.229.22:13:26.71#ibcon#*before write, iclass 5, count 2 2006.229.22:13:26.71#ibcon#enter sib2, iclass 5, count 2 2006.229.22:13:26.71#ibcon#flushed, iclass 5, count 2 2006.229.22:13:26.71#ibcon#about to write, iclass 5, count 2 2006.229.22:13:26.71#ibcon#wrote, iclass 5, count 2 2006.229.22:13:26.71#ibcon#about to read 3, iclass 5, count 2 2006.229.22:13:26.74#ibcon#read 3, iclass 5, count 2 2006.229.22:13:26.74#ibcon#about to read 4, iclass 5, count 2 2006.229.22:13:26.74#ibcon#read 4, iclass 5, count 2 2006.229.22:13:26.74#ibcon#about to read 5, iclass 5, count 2 2006.229.22:13:26.74#ibcon#read 5, iclass 5, count 2 2006.229.22:13:26.74#ibcon#about to read 6, iclass 5, count 2 2006.229.22:13:26.74#ibcon#read 6, iclass 5, count 2 2006.229.22:13:26.74#ibcon#end of sib2, iclass 5, count 2 2006.229.22:13:26.74#ibcon#*after write, iclass 5, count 2 2006.229.22:13:26.74#ibcon#*before return 0, iclass 5, count 2 2006.229.22:13:26.74#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:26.74#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:13:26.74#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.22:13:26.74#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:26.74#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:26.86#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:26.86#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:26.86#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:13:26.86#ibcon#first serial, iclass 5, count 0 2006.229.22:13:26.86#ibcon#enter sib2, iclass 5, count 0 2006.229.22:13:26.86#ibcon#flushed, iclass 5, count 0 2006.229.22:13:26.86#ibcon#about to write, iclass 5, count 0 2006.229.22:13:26.86#ibcon#wrote, iclass 5, count 0 2006.229.22:13:26.86#ibcon#about to read 3, iclass 5, count 0 2006.229.22:13:26.88#ibcon#read 3, iclass 5, count 0 2006.229.22:13:26.88#ibcon#about to read 4, iclass 5, count 0 2006.229.22:13:26.88#ibcon#read 4, iclass 5, count 0 2006.229.22:13:26.88#ibcon#about to read 5, iclass 5, count 0 2006.229.22:13:26.88#ibcon#read 5, iclass 5, count 0 2006.229.22:13:26.88#ibcon#about to read 6, iclass 5, count 0 2006.229.22:13:26.88#ibcon#read 6, iclass 5, count 0 2006.229.22:13:26.88#ibcon#end of sib2, iclass 5, count 0 2006.229.22:13:26.88#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:13:26.88#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:13:26.88#ibcon#[27=USB\r\n] 2006.229.22:13:26.88#ibcon#*before write, iclass 5, count 0 2006.229.22:13:26.88#ibcon#enter sib2, iclass 5, count 0 2006.229.22:13:26.88#ibcon#flushed, iclass 5, count 0 2006.229.22:13:26.88#ibcon#about to write, iclass 5, count 0 2006.229.22:13:26.88#ibcon#wrote, iclass 5, count 0 2006.229.22:13:26.88#ibcon#about to read 3, iclass 5, count 0 2006.229.22:13:26.91#ibcon#read 3, iclass 5, count 0 2006.229.22:13:26.91#ibcon#about to read 4, iclass 5, count 0 2006.229.22:13:26.91#ibcon#read 4, iclass 5, count 0 2006.229.22:13:26.91#ibcon#about to read 5, iclass 5, count 0 2006.229.22:13:26.91#ibcon#read 5, iclass 5, count 0 2006.229.22:13:26.91#ibcon#about to read 6, iclass 5, count 0 2006.229.22:13:26.91#ibcon#read 6, iclass 5, count 0 2006.229.22:13:26.91#ibcon#end of sib2, iclass 5, count 0 2006.229.22:13:26.91#ibcon#*after write, iclass 5, count 0 2006.229.22:13:26.91#ibcon#*before return 0, iclass 5, count 0 2006.229.22:13:26.91#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:26.91#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:13:26.91#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:13:26.91#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:13:26.91$vck44/vblo=4,679.99 2006.229.22:13:26.91#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.22:13:26.91#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.22:13:26.91#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:26.91#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:26.91#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:26.91#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:26.91#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:13:26.91#ibcon#first serial, iclass 7, count 0 2006.229.22:13:26.91#ibcon#enter sib2, iclass 7, count 0 2006.229.22:13:26.91#ibcon#flushed, iclass 7, count 0 2006.229.22:13:26.91#ibcon#about to write, iclass 7, count 0 2006.229.22:13:26.91#ibcon#wrote, iclass 7, count 0 2006.229.22:13:26.91#ibcon#about to read 3, iclass 7, count 0 2006.229.22:13:26.93#ibcon#read 3, iclass 7, count 0 2006.229.22:13:26.93#ibcon#about to read 4, iclass 7, count 0 2006.229.22:13:26.93#ibcon#read 4, iclass 7, count 0 2006.229.22:13:26.93#ibcon#about to read 5, iclass 7, count 0 2006.229.22:13:26.93#ibcon#read 5, iclass 7, count 0 2006.229.22:13:26.93#ibcon#about to read 6, iclass 7, count 0 2006.229.22:13:26.93#ibcon#read 6, iclass 7, count 0 2006.229.22:13:26.93#ibcon#end of sib2, iclass 7, count 0 2006.229.22:13:26.93#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:13:26.93#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:13:26.93#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:13:26.93#ibcon#*before write, iclass 7, count 0 2006.229.22:13:26.93#ibcon#enter sib2, iclass 7, count 0 2006.229.22:13:26.93#ibcon#flushed, iclass 7, count 0 2006.229.22:13:26.93#ibcon#about to write, iclass 7, count 0 2006.229.22:13:26.93#ibcon#wrote, iclass 7, count 0 2006.229.22:13:26.93#ibcon#about to read 3, iclass 7, count 0 2006.229.22:13:26.97#ibcon#read 3, iclass 7, count 0 2006.229.22:13:26.97#ibcon#about to read 4, iclass 7, count 0 2006.229.22:13:26.97#ibcon#read 4, iclass 7, count 0 2006.229.22:13:26.97#ibcon#about to read 5, iclass 7, count 0 2006.229.22:13:26.97#ibcon#read 5, iclass 7, count 0 2006.229.22:13:26.97#ibcon#about to read 6, iclass 7, count 0 2006.229.22:13:26.97#ibcon#read 6, iclass 7, count 0 2006.229.22:13:26.97#ibcon#end of sib2, iclass 7, count 0 2006.229.22:13:26.97#ibcon#*after write, iclass 7, count 0 2006.229.22:13:26.97#ibcon#*before return 0, iclass 7, count 0 2006.229.22:13:26.97#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:26.97#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:13:26.97#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:13:26.97#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:13:26.97$vck44/vb=4,4 2006.229.22:13:26.97#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.22:13:26.97#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.22:13:26.97#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:26.97#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:27.03#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:27.03#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:27.03#ibcon#enter wrdev, iclass 11, count 2 2006.229.22:13:27.03#ibcon#first serial, iclass 11, count 2 2006.229.22:13:27.03#ibcon#enter sib2, iclass 11, count 2 2006.229.22:13:27.03#ibcon#flushed, iclass 11, count 2 2006.229.22:13:27.03#ibcon#about to write, iclass 11, count 2 2006.229.22:13:27.03#ibcon#wrote, iclass 11, count 2 2006.229.22:13:27.03#ibcon#about to read 3, iclass 11, count 2 2006.229.22:13:27.05#ibcon#read 3, iclass 11, count 2 2006.229.22:13:27.05#ibcon#about to read 4, iclass 11, count 2 2006.229.22:13:27.05#ibcon#read 4, iclass 11, count 2 2006.229.22:13:27.05#ibcon#about to read 5, iclass 11, count 2 2006.229.22:13:27.05#ibcon#read 5, iclass 11, count 2 2006.229.22:13:27.05#ibcon#about to read 6, iclass 11, count 2 2006.229.22:13:27.05#ibcon#read 6, iclass 11, count 2 2006.229.22:13:27.05#ibcon#end of sib2, iclass 11, count 2 2006.229.22:13:27.05#ibcon#*mode == 0, iclass 11, count 2 2006.229.22:13:27.05#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.22:13:27.05#ibcon#[27=AT04-04\r\n] 2006.229.22:13:27.05#ibcon#*before write, iclass 11, count 2 2006.229.22:13:27.05#ibcon#enter sib2, iclass 11, count 2 2006.229.22:13:27.05#ibcon#flushed, iclass 11, count 2 2006.229.22:13:27.05#ibcon#about to write, iclass 11, count 2 2006.229.22:13:27.05#ibcon#wrote, iclass 11, count 2 2006.229.22:13:27.05#ibcon#about to read 3, iclass 11, count 2 2006.229.22:13:27.08#ibcon#read 3, iclass 11, count 2 2006.229.22:13:27.08#ibcon#about to read 4, iclass 11, count 2 2006.229.22:13:27.08#ibcon#read 4, iclass 11, count 2 2006.229.22:13:27.08#ibcon#about to read 5, iclass 11, count 2 2006.229.22:13:27.08#ibcon#read 5, iclass 11, count 2 2006.229.22:13:27.08#ibcon#about to read 6, iclass 11, count 2 2006.229.22:13:27.08#ibcon#read 6, iclass 11, count 2 2006.229.22:13:27.08#ibcon#end of sib2, iclass 11, count 2 2006.229.22:13:27.08#ibcon#*after write, iclass 11, count 2 2006.229.22:13:27.08#ibcon#*before return 0, iclass 11, count 2 2006.229.22:13:27.08#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:27.08#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:13:27.08#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.22:13:27.08#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:27.08#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:27.20#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:27.20#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:27.20#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:13:27.20#ibcon#first serial, iclass 11, count 0 2006.229.22:13:27.20#ibcon#enter sib2, iclass 11, count 0 2006.229.22:13:27.20#ibcon#flushed, iclass 11, count 0 2006.229.22:13:27.20#ibcon#about to write, iclass 11, count 0 2006.229.22:13:27.20#ibcon#wrote, iclass 11, count 0 2006.229.22:13:27.20#ibcon#about to read 3, iclass 11, count 0 2006.229.22:13:27.22#ibcon#read 3, iclass 11, count 0 2006.229.22:13:27.22#ibcon#about to read 4, iclass 11, count 0 2006.229.22:13:27.22#ibcon#read 4, iclass 11, count 0 2006.229.22:13:27.22#ibcon#about to read 5, iclass 11, count 0 2006.229.22:13:27.22#ibcon#read 5, iclass 11, count 0 2006.229.22:13:27.22#ibcon#about to read 6, iclass 11, count 0 2006.229.22:13:27.22#ibcon#read 6, iclass 11, count 0 2006.229.22:13:27.22#ibcon#end of sib2, iclass 11, count 0 2006.229.22:13:27.22#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:13:27.22#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:13:27.22#ibcon#[27=USB\r\n] 2006.229.22:13:27.22#ibcon#*before write, iclass 11, count 0 2006.229.22:13:27.22#ibcon#enter sib2, iclass 11, count 0 2006.229.22:13:27.22#ibcon#flushed, iclass 11, count 0 2006.229.22:13:27.22#ibcon#about to write, iclass 11, count 0 2006.229.22:13:27.22#ibcon#wrote, iclass 11, count 0 2006.229.22:13:27.22#ibcon#about to read 3, iclass 11, count 0 2006.229.22:13:27.25#ibcon#read 3, iclass 11, count 0 2006.229.22:13:27.25#ibcon#about to read 4, iclass 11, count 0 2006.229.22:13:27.25#ibcon#read 4, iclass 11, count 0 2006.229.22:13:27.25#ibcon#about to read 5, iclass 11, count 0 2006.229.22:13:27.25#ibcon#read 5, iclass 11, count 0 2006.229.22:13:27.25#ibcon#about to read 6, iclass 11, count 0 2006.229.22:13:27.25#ibcon#read 6, iclass 11, count 0 2006.229.22:13:27.25#ibcon#end of sib2, iclass 11, count 0 2006.229.22:13:27.25#ibcon#*after write, iclass 11, count 0 2006.229.22:13:27.25#ibcon#*before return 0, iclass 11, count 0 2006.229.22:13:27.25#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:27.25#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:13:27.25#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:13:27.25#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:13:27.25$vck44/vblo=5,709.99 2006.229.22:13:27.25#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.22:13:27.25#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.22:13:27.25#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:27.25#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:27.25#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:27.25#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:27.25#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:13:27.25#ibcon#first serial, iclass 13, count 0 2006.229.22:13:27.25#ibcon#enter sib2, iclass 13, count 0 2006.229.22:13:27.25#ibcon#flushed, iclass 13, count 0 2006.229.22:13:27.25#ibcon#about to write, iclass 13, count 0 2006.229.22:13:27.25#ibcon#wrote, iclass 13, count 0 2006.229.22:13:27.25#ibcon#about to read 3, iclass 13, count 0 2006.229.22:13:27.27#ibcon#read 3, iclass 13, count 0 2006.229.22:13:27.27#ibcon#about to read 4, iclass 13, count 0 2006.229.22:13:27.27#ibcon#read 4, iclass 13, count 0 2006.229.22:13:27.27#ibcon#about to read 5, iclass 13, count 0 2006.229.22:13:27.27#ibcon#read 5, iclass 13, count 0 2006.229.22:13:27.27#ibcon#about to read 6, iclass 13, count 0 2006.229.22:13:27.27#ibcon#read 6, iclass 13, count 0 2006.229.22:13:27.27#ibcon#end of sib2, iclass 13, count 0 2006.229.22:13:27.27#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:13:27.27#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:13:27.27#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:13:27.27#ibcon#*before write, iclass 13, count 0 2006.229.22:13:27.27#ibcon#enter sib2, iclass 13, count 0 2006.229.22:13:27.27#ibcon#flushed, iclass 13, count 0 2006.229.22:13:27.27#ibcon#about to write, iclass 13, count 0 2006.229.22:13:27.27#ibcon#wrote, iclass 13, count 0 2006.229.22:13:27.27#ibcon#about to read 3, iclass 13, count 0 2006.229.22:13:27.31#ibcon#read 3, iclass 13, count 0 2006.229.22:13:27.31#ibcon#about to read 4, iclass 13, count 0 2006.229.22:13:27.31#ibcon#read 4, iclass 13, count 0 2006.229.22:13:27.31#ibcon#about to read 5, iclass 13, count 0 2006.229.22:13:27.31#ibcon#read 5, iclass 13, count 0 2006.229.22:13:27.31#ibcon#about to read 6, iclass 13, count 0 2006.229.22:13:27.31#ibcon#read 6, iclass 13, count 0 2006.229.22:13:27.31#ibcon#end of sib2, iclass 13, count 0 2006.229.22:13:27.31#ibcon#*after write, iclass 13, count 0 2006.229.22:13:27.31#ibcon#*before return 0, iclass 13, count 0 2006.229.22:13:27.31#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:27.31#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:13:27.31#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:13:27.31#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:13:27.31$vck44/vb=5,4 2006.229.22:13:27.31#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.22:13:27.31#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.22:13:27.31#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:27.31#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:27.37#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:27.37#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:27.37#ibcon#enter wrdev, iclass 15, count 2 2006.229.22:13:27.37#ibcon#first serial, iclass 15, count 2 2006.229.22:13:27.37#ibcon#enter sib2, iclass 15, count 2 2006.229.22:13:27.37#ibcon#flushed, iclass 15, count 2 2006.229.22:13:27.37#ibcon#about to write, iclass 15, count 2 2006.229.22:13:27.37#ibcon#wrote, iclass 15, count 2 2006.229.22:13:27.37#ibcon#about to read 3, iclass 15, count 2 2006.229.22:13:27.39#ibcon#read 3, iclass 15, count 2 2006.229.22:13:27.39#ibcon#about to read 4, iclass 15, count 2 2006.229.22:13:27.39#ibcon#read 4, iclass 15, count 2 2006.229.22:13:27.39#ibcon#about to read 5, iclass 15, count 2 2006.229.22:13:27.39#ibcon#read 5, iclass 15, count 2 2006.229.22:13:27.39#ibcon#about to read 6, iclass 15, count 2 2006.229.22:13:27.39#ibcon#read 6, iclass 15, count 2 2006.229.22:13:27.39#ibcon#end of sib2, iclass 15, count 2 2006.229.22:13:27.39#ibcon#*mode == 0, iclass 15, count 2 2006.229.22:13:27.39#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.22:13:27.39#ibcon#[27=AT05-04\r\n] 2006.229.22:13:27.39#ibcon#*before write, iclass 15, count 2 2006.229.22:13:27.39#ibcon#enter sib2, iclass 15, count 2 2006.229.22:13:27.39#ibcon#flushed, iclass 15, count 2 2006.229.22:13:27.39#ibcon#about to write, iclass 15, count 2 2006.229.22:13:27.39#ibcon#wrote, iclass 15, count 2 2006.229.22:13:27.39#ibcon#about to read 3, iclass 15, count 2 2006.229.22:13:27.42#ibcon#read 3, iclass 15, count 2 2006.229.22:13:27.42#ibcon#about to read 4, iclass 15, count 2 2006.229.22:13:27.42#ibcon#read 4, iclass 15, count 2 2006.229.22:13:27.42#ibcon#about to read 5, iclass 15, count 2 2006.229.22:13:27.42#ibcon#read 5, iclass 15, count 2 2006.229.22:13:27.42#ibcon#about to read 6, iclass 15, count 2 2006.229.22:13:27.42#ibcon#read 6, iclass 15, count 2 2006.229.22:13:27.42#ibcon#end of sib2, iclass 15, count 2 2006.229.22:13:27.42#ibcon#*after write, iclass 15, count 2 2006.229.22:13:27.42#ibcon#*before return 0, iclass 15, count 2 2006.229.22:13:27.42#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:27.42#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:13:27.42#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.22:13:27.42#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:27.42#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:27.54#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:27.54#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:27.54#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:13:27.54#ibcon#first serial, iclass 15, count 0 2006.229.22:13:27.54#ibcon#enter sib2, iclass 15, count 0 2006.229.22:13:27.54#ibcon#flushed, iclass 15, count 0 2006.229.22:13:27.54#ibcon#about to write, iclass 15, count 0 2006.229.22:13:27.54#ibcon#wrote, iclass 15, count 0 2006.229.22:13:27.54#ibcon#about to read 3, iclass 15, count 0 2006.229.22:13:27.56#ibcon#read 3, iclass 15, count 0 2006.229.22:13:27.56#ibcon#about to read 4, iclass 15, count 0 2006.229.22:13:27.56#ibcon#read 4, iclass 15, count 0 2006.229.22:13:27.56#ibcon#about to read 5, iclass 15, count 0 2006.229.22:13:27.56#ibcon#read 5, iclass 15, count 0 2006.229.22:13:27.56#ibcon#about to read 6, iclass 15, count 0 2006.229.22:13:27.56#ibcon#read 6, iclass 15, count 0 2006.229.22:13:27.56#ibcon#end of sib2, iclass 15, count 0 2006.229.22:13:27.56#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:13:27.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:13:27.56#ibcon#[27=USB\r\n] 2006.229.22:13:27.56#ibcon#*before write, iclass 15, count 0 2006.229.22:13:27.56#ibcon#enter sib2, iclass 15, count 0 2006.229.22:13:27.56#ibcon#flushed, iclass 15, count 0 2006.229.22:13:27.56#ibcon#about to write, iclass 15, count 0 2006.229.22:13:27.56#ibcon#wrote, iclass 15, count 0 2006.229.22:13:27.56#ibcon#about to read 3, iclass 15, count 0 2006.229.22:13:27.59#ibcon#read 3, iclass 15, count 0 2006.229.22:13:27.59#ibcon#about to read 4, iclass 15, count 0 2006.229.22:13:27.59#ibcon#read 4, iclass 15, count 0 2006.229.22:13:27.59#ibcon#about to read 5, iclass 15, count 0 2006.229.22:13:27.59#ibcon#read 5, iclass 15, count 0 2006.229.22:13:27.59#ibcon#about to read 6, iclass 15, count 0 2006.229.22:13:27.59#ibcon#read 6, iclass 15, count 0 2006.229.22:13:27.59#ibcon#end of sib2, iclass 15, count 0 2006.229.22:13:27.59#ibcon#*after write, iclass 15, count 0 2006.229.22:13:27.59#ibcon#*before return 0, iclass 15, count 0 2006.229.22:13:27.59#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:27.59#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:13:27.59#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:13:27.59#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:13:27.59$vck44/vblo=6,719.99 2006.229.22:13:27.59#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.22:13:27.59#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.22:13:27.59#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:27.59#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:27.59#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:27.59#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:27.59#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:13:27.59#ibcon#first serial, iclass 17, count 0 2006.229.22:13:27.59#ibcon#enter sib2, iclass 17, count 0 2006.229.22:13:27.59#ibcon#flushed, iclass 17, count 0 2006.229.22:13:27.59#ibcon#about to write, iclass 17, count 0 2006.229.22:13:27.59#ibcon#wrote, iclass 17, count 0 2006.229.22:13:27.59#ibcon#about to read 3, iclass 17, count 0 2006.229.22:13:27.61#ibcon#read 3, iclass 17, count 0 2006.229.22:13:27.61#ibcon#about to read 4, iclass 17, count 0 2006.229.22:13:27.61#ibcon#read 4, iclass 17, count 0 2006.229.22:13:27.61#ibcon#about to read 5, iclass 17, count 0 2006.229.22:13:27.61#ibcon#read 5, iclass 17, count 0 2006.229.22:13:27.61#ibcon#about to read 6, iclass 17, count 0 2006.229.22:13:27.61#ibcon#read 6, iclass 17, count 0 2006.229.22:13:27.61#ibcon#end of sib2, iclass 17, count 0 2006.229.22:13:27.61#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:13:27.61#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:13:27.61#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:13:27.61#ibcon#*before write, iclass 17, count 0 2006.229.22:13:27.61#ibcon#enter sib2, iclass 17, count 0 2006.229.22:13:27.61#ibcon#flushed, iclass 17, count 0 2006.229.22:13:27.61#ibcon#about to write, iclass 17, count 0 2006.229.22:13:27.61#ibcon#wrote, iclass 17, count 0 2006.229.22:13:27.61#ibcon#about to read 3, iclass 17, count 0 2006.229.22:13:27.65#ibcon#read 3, iclass 17, count 0 2006.229.22:13:27.65#ibcon#about to read 4, iclass 17, count 0 2006.229.22:13:27.65#ibcon#read 4, iclass 17, count 0 2006.229.22:13:27.65#ibcon#about to read 5, iclass 17, count 0 2006.229.22:13:27.65#ibcon#read 5, iclass 17, count 0 2006.229.22:13:27.65#ibcon#about to read 6, iclass 17, count 0 2006.229.22:13:27.65#ibcon#read 6, iclass 17, count 0 2006.229.22:13:27.65#ibcon#end of sib2, iclass 17, count 0 2006.229.22:13:27.65#ibcon#*after write, iclass 17, count 0 2006.229.22:13:27.65#ibcon#*before return 0, iclass 17, count 0 2006.229.22:13:27.65#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:27.65#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:13:27.65#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:13:27.65#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:13:27.65$vck44/vb=6,4 2006.229.22:13:27.65#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.22:13:27.65#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.22:13:27.65#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:27.65#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:27.71#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:27.71#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:27.71#ibcon#enter wrdev, iclass 19, count 2 2006.229.22:13:27.71#ibcon#first serial, iclass 19, count 2 2006.229.22:13:27.71#ibcon#enter sib2, iclass 19, count 2 2006.229.22:13:27.71#ibcon#flushed, iclass 19, count 2 2006.229.22:13:27.71#ibcon#about to write, iclass 19, count 2 2006.229.22:13:27.71#ibcon#wrote, iclass 19, count 2 2006.229.22:13:27.71#ibcon#about to read 3, iclass 19, count 2 2006.229.22:13:27.73#ibcon#read 3, iclass 19, count 2 2006.229.22:13:27.73#ibcon#about to read 4, iclass 19, count 2 2006.229.22:13:27.73#ibcon#read 4, iclass 19, count 2 2006.229.22:13:27.73#ibcon#about to read 5, iclass 19, count 2 2006.229.22:13:27.73#ibcon#read 5, iclass 19, count 2 2006.229.22:13:27.73#ibcon#about to read 6, iclass 19, count 2 2006.229.22:13:27.73#ibcon#read 6, iclass 19, count 2 2006.229.22:13:27.73#ibcon#end of sib2, iclass 19, count 2 2006.229.22:13:27.73#ibcon#*mode == 0, iclass 19, count 2 2006.229.22:13:27.73#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.22:13:27.73#ibcon#[27=AT06-04\r\n] 2006.229.22:13:27.73#ibcon#*before write, iclass 19, count 2 2006.229.22:13:27.73#ibcon#enter sib2, iclass 19, count 2 2006.229.22:13:27.73#ibcon#flushed, iclass 19, count 2 2006.229.22:13:27.73#ibcon#about to write, iclass 19, count 2 2006.229.22:13:27.73#ibcon#wrote, iclass 19, count 2 2006.229.22:13:27.73#ibcon#about to read 3, iclass 19, count 2 2006.229.22:13:27.76#ibcon#read 3, iclass 19, count 2 2006.229.22:13:27.76#ibcon#about to read 4, iclass 19, count 2 2006.229.22:13:27.76#ibcon#read 4, iclass 19, count 2 2006.229.22:13:27.76#ibcon#about to read 5, iclass 19, count 2 2006.229.22:13:27.76#ibcon#read 5, iclass 19, count 2 2006.229.22:13:27.76#ibcon#about to read 6, iclass 19, count 2 2006.229.22:13:27.76#ibcon#read 6, iclass 19, count 2 2006.229.22:13:27.76#ibcon#end of sib2, iclass 19, count 2 2006.229.22:13:27.76#ibcon#*after write, iclass 19, count 2 2006.229.22:13:27.76#ibcon#*before return 0, iclass 19, count 2 2006.229.22:13:27.76#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:27.76#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:13:27.76#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.22:13:27.76#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:27.76#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:27.88#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:27.88#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:27.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:13:27.88#ibcon#first serial, iclass 19, count 0 2006.229.22:13:27.88#ibcon#enter sib2, iclass 19, count 0 2006.229.22:13:27.88#ibcon#flushed, iclass 19, count 0 2006.229.22:13:27.88#ibcon#about to write, iclass 19, count 0 2006.229.22:13:27.88#ibcon#wrote, iclass 19, count 0 2006.229.22:13:27.88#ibcon#about to read 3, iclass 19, count 0 2006.229.22:13:27.90#ibcon#read 3, iclass 19, count 0 2006.229.22:13:27.90#ibcon#about to read 4, iclass 19, count 0 2006.229.22:13:27.90#ibcon#read 4, iclass 19, count 0 2006.229.22:13:27.90#ibcon#about to read 5, iclass 19, count 0 2006.229.22:13:27.90#ibcon#read 5, iclass 19, count 0 2006.229.22:13:27.90#ibcon#about to read 6, iclass 19, count 0 2006.229.22:13:27.90#ibcon#read 6, iclass 19, count 0 2006.229.22:13:27.90#ibcon#end of sib2, iclass 19, count 0 2006.229.22:13:27.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:13:27.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:13:27.90#ibcon#[27=USB\r\n] 2006.229.22:13:27.90#ibcon#*before write, iclass 19, count 0 2006.229.22:13:27.90#ibcon#enter sib2, iclass 19, count 0 2006.229.22:13:27.90#ibcon#flushed, iclass 19, count 0 2006.229.22:13:27.90#ibcon#about to write, iclass 19, count 0 2006.229.22:13:27.90#ibcon#wrote, iclass 19, count 0 2006.229.22:13:27.90#ibcon#about to read 3, iclass 19, count 0 2006.229.22:13:27.93#ibcon#read 3, iclass 19, count 0 2006.229.22:13:27.93#ibcon#about to read 4, iclass 19, count 0 2006.229.22:13:27.93#ibcon#read 4, iclass 19, count 0 2006.229.22:13:27.93#ibcon#about to read 5, iclass 19, count 0 2006.229.22:13:27.93#ibcon#read 5, iclass 19, count 0 2006.229.22:13:27.93#ibcon#about to read 6, iclass 19, count 0 2006.229.22:13:27.93#ibcon#read 6, iclass 19, count 0 2006.229.22:13:27.93#ibcon#end of sib2, iclass 19, count 0 2006.229.22:13:27.93#ibcon#*after write, iclass 19, count 0 2006.229.22:13:27.93#ibcon#*before return 0, iclass 19, count 0 2006.229.22:13:27.93#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:27.93#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:13:27.93#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:13:27.93#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:13:27.93$vck44/vblo=7,734.99 2006.229.22:13:27.93#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:13:27.93#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:13:27.93#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:27.93#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:27.93#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:27.93#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:27.93#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:13:27.93#ibcon#first serial, iclass 21, count 0 2006.229.22:13:27.93#ibcon#enter sib2, iclass 21, count 0 2006.229.22:13:27.93#ibcon#flushed, iclass 21, count 0 2006.229.22:13:27.93#ibcon#about to write, iclass 21, count 0 2006.229.22:13:27.93#ibcon#wrote, iclass 21, count 0 2006.229.22:13:27.93#ibcon#about to read 3, iclass 21, count 0 2006.229.22:13:27.95#ibcon#read 3, iclass 21, count 0 2006.229.22:13:27.95#ibcon#about to read 4, iclass 21, count 0 2006.229.22:13:27.95#ibcon#read 4, iclass 21, count 0 2006.229.22:13:27.95#ibcon#about to read 5, iclass 21, count 0 2006.229.22:13:27.95#ibcon#read 5, iclass 21, count 0 2006.229.22:13:27.95#ibcon#about to read 6, iclass 21, count 0 2006.229.22:13:27.95#ibcon#read 6, iclass 21, count 0 2006.229.22:13:27.95#ibcon#end of sib2, iclass 21, count 0 2006.229.22:13:27.95#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:13:27.95#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:13:27.95#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:13:27.95#ibcon#*before write, iclass 21, count 0 2006.229.22:13:27.95#ibcon#enter sib2, iclass 21, count 0 2006.229.22:13:27.95#ibcon#flushed, iclass 21, count 0 2006.229.22:13:27.95#ibcon#about to write, iclass 21, count 0 2006.229.22:13:27.95#ibcon#wrote, iclass 21, count 0 2006.229.22:13:27.95#ibcon#about to read 3, iclass 21, count 0 2006.229.22:13:27.99#ibcon#read 3, iclass 21, count 0 2006.229.22:13:27.99#ibcon#about to read 4, iclass 21, count 0 2006.229.22:13:27.99#ibcon#read 4, iclass 21, count 0 2006.229.22:13:27.99#ibcon#about to read 5, iclass 21, count 0 2006.229.22:13:27.99#ibcon#read 5, iclass 21, count 0 2006.229.22:13:27.99#ibcon#about to read 6, iclass 21, count 0 2006.229.22:13:27.99#ibcon#read 6, iclass 21, count 0 2006.229.22:13:27.99#ibcon#end of sib2, iclass 21, count 0 2006.229.22:13:27.99#ibcon#*after write, iclass 21, count 0 2006.229.22:13:27.99#ibcon#*before return 0, iclass 21, count 0 2006.229.22:13:27.99#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:27.99#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:13:27.99#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:13:27.99#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:13:27.99$vck44/vb=7,4 2006.229.22:13:27.99#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.22:13:27.99#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.22:13:27.99#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:27.99#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:28.05#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:28.05#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:28.05#ibcon#enter wrdev, iclass 23, count 2 2006.229.22:13:28.05#ibcon#first serial, iclass 23, count 2 2006.229.22:13:28.05#ibcon#enter sib2, iclass 23, count 2 2006.229.22:13:28.05#ibcon#flushed, iclass 23, count 2 2006.229.22:13:28.05#ibcon#about to write, iclass 23, count 2 2006.229.22:13:28.05#ibcon#wrote, iclass 23, count 2 2006.229.22:13:28.05#ibcon#about to read 3, iclass 23, count 2 2006.229.22:13:28.07#ibcon#read 3, iclass 23, count 2 2006.229.22:13:28.07#ibcon#about to read 4, iclass 23, count 2 2006.229.22:13:28.07#ibcon#read 4, iclass 23, count 2 2006.229.22:13:28.07#ibcon#about to read 5, iclass 23, count 2 2006.229.22:13:28.07#ibcon#read 5, iclass 23, count 2 2006.229.22:13:28.07#ibcon#about to read 6, iclass 23, count 2 2006.229.22:13:28.07#ibcon#read 6, iclass 23, count 2 2006.229.22:13:28.07#ibcon#end of sib2, iclass 23, count 2 2006.229.22:13:28.07#ibcon#*mode == 0, iclass 23, count 2 2006.229.22:13:28.07#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.22:13:28.07#ibcon#[27=AT07-04\r\n] 2006.229.22:13:28.07#ibcon#*before write, iclass 23, count 2 2006.229.22:13:28.07#ibcon#enter sib2, iclass 23, count 2 2006.229.22:13:28.07#ibcon#flushed, iclass 23, count 2 2006.229.22:13:28.07#ibcon#about to write, iclass 23, count 2 2006.229.22:13:28.07#ibcon#wrote, iclass 23, count 2 2006.229.22:13:28.07#ibcon#about to read 3, iclass 23, count 2 2006.229.22:13:28.10#ibcon#read 3, iclass 23, count 2 2006.229.22:13:28.10#ibcon#about to read 4, iclass 23, count 2 2006.229.22:13:28.10#ibcon#read 4, iclass 23, count 2 2006.229.22:13:28.10#ibcon#about to read 5, iclass 23, count 2 2006.229.22:13:28.10#ibcon#read 5, iclass 23, count 2 2006.229.22:13:28.10#ibcon#about to read 6, iclass 23, count 2 2006.229.22:13:28.10#ibcon#read 6, iclass 23, count 2 2006.229.22:13:28.10#ibcon#end of sib2, iclass 23, count 2 2006.229.22:13:28.10#ibcon#*after write, iclass 23, count 2 2006.229.22:13:28.10#ibcon#*before return 0, iclass 23, count 2 2006.229.22:13:28.10#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:28.10#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:13:28.10#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.22:13:28.10#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:28.10#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:28.22#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:28.22#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:28.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:13:28.22#ibcon#first serial, iclass 23, count 0 2006.229.22:13:28.22#ibcon#enter sib2, iclass 23, count 0 2006.229.22:13:28.22#ibcon#flushed, iclass 23, count 0 2006.229.22:13:28.22#ibcon#about to write, iclass 23, count 0 2006.229.22:13:28.22#ibcon#wrote, iclass 23, count 0 2006.229.22:13:28.22#ibcon#about to read 3, iclass 23, count 0 2006.229.22:13:28.24#ibcon#read 3, iclass 23, count 0 2006.229.22:13:28.24#ibcon#about to read 4, iclass 23, count 0 2006.229.22:13:28.24#ibcon#read 4, iclass 23, count 0 2006.229.22:13:28.24#ibcon#about to read 5, iclass 23, count 0 2006.229.22:13:28.24#ibcon#read 5, iclass 23, count 0 2006.229.22:13:28.24#ibcon#about to read 6, iclass 23, count 0 2006.229.22:13:28.24#ibcon#read 6, iclass 23, count 0 2006.229.22:13:28.24#ibcon#end of sib2, iclass 23, count 0 2006.229.22:13:28.24#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:13:28.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:13:28.24#ibcon#[27=USB\r\n] 2006.229.22:13:28.24#ibcon#*before write, iclass 23, count 0 2006.229.22:13:28.24#ibcon#enter sib2, iclass 23, count 0 2006.229.22:13:28.24#ibcon#flushed, iclass 23, count 0 2006.229.22:13:28.24#ibcon#about to write, iclass 23, count 0 2006.229.22:13:28.24#ibcon#wrote, iclass 23, count 0 2006.229.22:13:28.24#ibcon#about to read 3, iclass 23, count 0 2006.229.22:13:28.27#ibcon#read 3, iclass 23, count 0 2006.229.22:13:28.27#ibcon#about to read 4, iclass 23, count 0 2006.229.22:13:28.27#ibcon#read 4, iclass 23, count 0 2006.229.22:13:28.27#ibcon#about to read 5, iclass 23, count 0 2006.229.22:13:28.27#ibcon#read 5, iclass 23, count 0 2006.229.22:13:28.27#ibcon#about to read 6, iclass 23, count 0 2006.229.22:13:28.27#ibcon#read 6, iclass 23, count 0 2006.229.22:13:28.27#ibcon#end of sib2, iclass 23, count 0 2006.229.22:13:28.27#ibcon#*after write, iclass 23, count 0 2006.229.22:13:28.27#ibcon#*before return 0, iclass 23, count 0 2006.229.22:13:28.27#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:28.27#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:13:28.27#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:13:28.27#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:13:28.27$vck44/vblo=8,744.99 2006.229.22:13:28.27#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.22:13:28.27#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.22:13:28.27#ibcon#ireg 17 cls_cnt 0 2006.229.22:13:28.27#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:28.27#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:28.27#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:28.27#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:13:28.27#ibcon#first serial, iclass 25, count 0 2006.229.22:13:28.27#ibcon#enter sib2, iclass 25, count 0 2006.229.22:13:28.27#ibcon#flushed, iclass 25, count 0 2006.229.22:13:28.27#ibcon#about to write, iclass 25, count 0 2006.229.22:13:28.27#ibcon#wrote, iclass 25, count 0 2006.229.22:13:28.27#ibcon#about to read 3, iclass 25, count 0 2006.229.22:13:28.29#ibcon#read 3, iclass 25, count 0 2006.229.22:13:28.29#ibcon#about to read 4, iclass 25, count 0 2006.229.22:13:28.29#ibcon#read 4, iclass 25, count 0 2006.229.22:13:28.29#ibcon#about to read 5, iclass 25, count 0 2006.229.22:13:28.29#ibcon#read 5, iclass 25, count 0 2006.229.22:13:28.29#ibcon#about to read 6, iclass 25, count 0 2006.229.22:13:28.29#ibcon#read 6, iclass 25, count 0 2006.229.22:13:28.29#ibcon#end of sib2, iclass 25, count 0 2006.229.22:13:28.29#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:13:28.29#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:13:28.29#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:13:28.29#ibcon#*before write, iclass 25, count 0 2006.229.22:13:28.29#ibcon#enter sib2, iclass 25, count 0 2006.229.22:13:28.29#ibcon#flushed, iclass 25, count 0 2006.229.22:13:28.29#ibcon#about to write, iclass 25, count 0 2006.229.22:13:28.29#ibcon#wrote, iclass 25, count 0 2006.229.22:13:28.29#ibcon#about to read 3, iclass 25, count 0 2006.229.22:13:28.33#ibcon#read 3, iclass 25, count 0 2006.229.22:13:28.33#ibcon#about to read 4, iclass 25, count 0 2006.229.22:13:28.33#ibcon#read 4, iclass 25, count 0 2006.229.22:13:28.33#ibcon#about to read 5, iclass 25, count 0 2006.229.22:13:28.33#ibcon#read 5, iclass 25, count 0 2006.229.22:13:28.33#ibcon#about to read 6, iclass 25, count 0 2006.229.22:13:28.33#ibcon#read 6, iclass 25, count 0 2006.229.22:13:28.33#ibcon#end of sib2, iclass 25, count 0 2006.229.22:13:28.33#ibcon#*after write, iclass 25, count 0 2006.229.22:13:28.33#ibcon#*before return 0, iclass 25, count 0 2006.229.22:13:28.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:28.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:13:28.33#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:13:28.33#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:13:28.33$vck44/vb=8,4 2006.229.22:13:28.33#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.22:13:28.33#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.22:13:28.33#ibcon#ireg 11 cls_cnt 2 2006.229.22:13:28.33#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:28.39#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:28.39#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:28.39#ibcon#enter wrdev, iclass 27, count 2 2006.229.22:13:28.39#ibcon#first serial, iclass 27, count 2 2006.229.22:13:28.39#ibcon#enter sib2, iclass 27, count 2 2006.229.22:13:28.39#ibcon#flushed, iclass 27, count 2 2006.229.22:13:28.39#ibcon#about to write, iclass 27, count 2 2006.229.22:13:28.39#ibcon#wrote, iclass 27, count 2 2006.229.22:13:28.39#ibcon#about to read 3, iclass 27, count 2 2006.229.22:13:28.41#ibcon#read 3, iclass 27, count 2 2006.229.22:13:28.41#ibcon#about to read 4, iclass 27, count 2 2006.229.22:13:28.41#ibcon#read 4, iclass 27, count 2 2006.229.22:13:28.41#ibcon#about to read 5, iclass 27, count 2 2006.229.22:13:28.41#ibcon#read 5, iclass 27, count 2 2006.229.22:13:28.41#ibcon#about to read 6, iclass 27, count 2 2006.229.22:13:28.41#ibcon#read 6, iclass 27, count 2 2006.229.22:13:28.41#ibcon#end of sib2, iclass 27, count 2 2006.229.22:13:28.41#ibcon#*mode == 0, iclass 27, count 2 2006.229.22:13:28.41#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.22:13:28.41#ibcon#[27=AT08-04\r\n] 2006.229.22:13:28.41#ibcon#*before write, iclass 27, count 2 2006.229.22:13:28.41#ibcon#enter sib2, iclass 27, count 2 2006.229.22:13:28.41#ibcon#flushed, iclass 27, count 2 2006.229.22:13:28.41#ibcon#about to write, iclass 27, count 2 2006.229.22:13:28.41#ibcon#wrote, iclass 27, count 2 2006.229.22:13:28.41#ibcon#about to read 3, iclass 27, count 2 2006.229.22:13:28.44#ibcon#read 3, iclass 27, count 2 2006.229.22:13:28.44#ibcon#about to read 4, iclass 27, count 2 2006.229.22:13:28.44#ibcon#read 4, iclass 27, count 2 2006.229.22:13:28.44#ibcon#about to read 5, iclass 27, count 2 2006.229.22:13:28.44#ibcon#read 5, iclass 27, count 2 2006.229.22:13:28.44#ibcon#about to read 6, iclass 27, count 2 2006.229.22:13:28.44#ibcon#read 6, iclass 27, count 2 2006.229.22:13:28.44#ibcon#end of sib2, iclass 27, count 2 2006.229.22:13:28.44#ibcon#*after write, iclass 27, count 2 2006.229.22:13:28.44#ibcon#*before return 0, iclass 27, count 2 2006.229.22:13:28.44#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:28.44#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:13:28.44#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.22:13:28.44#ibcon#ireg 7 cls_cnt 0 2006.229.22:13:28.44#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:28.56#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:28.56#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:28.56#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:13:28.56#ibcon#first serial, iclass 27, count 0 2006.229.22:13:28.56#ibcon#enter sib2, iclass 27, count 0 2006.229.22:13:28.56#ibcon#flushed, iclass 27, count 0 2006.229.22:13:28.56#ibcon#about to write, iclass 27, count 0 2006.229.22:13:28.56#ibcon#wrote, iclass 27, count 0 2006.229.22:13:28.56#ibcon#about to read 3, iclass 27, count 0 2006.229.22:13:28.58#ibcon#read 3, iclass 27, count 0 2006.229.22:13:28.58#ibcon#about to read 4, iclass 27, count 0 2006.229.22:13:28.58#ibcon#read 4, iclass 27, count 0 2006.229.22:13:28.58#ibcon#about to read 5, iclass 27, count 0 2006.229.22:13:28.58#ibcon#read 5, iclass 27, count 0 2006.229.22:13:28.58#ibcon#about to read 6, iclass 27, count 0 2006.229.22:13:28.58#ibcon#read 6, iclass 27, count 0 2006.229.22:13:28.58#ibcon#end of sib2, iclass 27, count 0 2006.229.22:13:28.58#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:13:28.58#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:13:28.58#ibcon#[27=USB\r\n] 2006.229.22:13:28.58#ibcon#*before write, iclass 27, count 0 2006.229.22:13:28.58#ibcon#enter sib2, iclass 27, count 0 2006.229.22:13:28.58#ibcon#flushed, iclass 27, count 0 2006.229.22:13:28.58#ibcon#about to write, iclass 27, count 0 2006.229.22:13:28.58#ibcon#wrote, iclass 27, count 0 2006.229.22:13:28.58#ibcon#about to read 3, iclass 27, count 0 2006.229.22:13:28.61#ibcon#read 3, iclass 27, count 0 2006.229.22:13:28.61#ibcon#about to read 4, iclass 27, count 0 2006.229.22:13:28.61#ibcon#read 4, iclass 27, count 0 2006.229.22:13:28.61#ibcon#about to read 5, iclass 27, count 0 2006.229.22:13:28.61#ibcon#read 5, iclass 27, count 0 2006.229.22:13:28.61#ibcon#about to read 6, iclass 27, count 0 2006.229.22:13:28.61#ibcon#read 6, iclass 27, count 0 2006.229.22:13:28.61#ibcon#end of sib2, iclass 27, count 0 2006.229.22:13:28.61#ibcon#*after write, iclass 27, count 0 2006.229.22:13:28.61#ibcon#*before return 0, iclass 27, count 0 2006.229.22:13:28.61#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:28.61#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:13:28.61#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:13:28.61#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:13:28.61$vck44/vabw=wide 2006.229.22:13:28.61#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.22:13:28.61#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.22:13:28.61#ibcon#ireg 8 cls_cnt 0 2006.229.22:13:28.61#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:28.61#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:28.61#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:28.61#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:13:28.61#ibcon#first serial, iclass 29, count 0 2006.229.22:13:28.61#ibcon#enter sib2, iclass 29, count 0 2006.229.22:13:28.61#ibcon#flushed, iclass 29, count 0 2006.229.22:13:28.61#ibcon#about to write, iclass 29, count 0 2006.229.22:13:28.61#ibcon#wrote, iclass 29, count 0 2006.229.22:13:28.61#ibcon#about to read 3, iclass 29, count 0 2006.229.22:13:28.63#ibcon#read 3, iclass 29, count 0 2006.229.22:13:28.63#ibcon#about to read 4, iclass 29, count 0 2006.229.22:13:28.63#ibcon#read 4, iclass 29, count 0 2006.229.22:13:28.63#ibcon#about to read 5, iclass 29, count 0 2006.229.22:13:28.63#ibcon#read 5, iclass 29, count 0 2006.229.22:13:28.63#ibcon#about to read 6, iclass 29, count 0 2006.229.22:13:28.63#ibcon#read 6, iclass 29, count 0 2006.229.22:13:28.63#ibcon#end of sib2, iclass 29, count 0 2006.229.22:13:28.63#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:13:28.63#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:13:28.63#ibcon#[25=BW32\r\n] 2006.229.22:13:28.63#ibcon#*before write, iclass 29, count 0 2006.229.22:13:28.63#ibcon#enter sib2, iclass 29, count 0 2006.229.22:13:28.63#ibcon#flushed, iclass 29, count 0 2006.229.22:13:28.63#ibcon#about to write, iclass 29, count 0 2006.229.22:13:28.63#ibcon#wrote, iclass 29, count 0 2006.229.22:13:28.63#ibcon#about to read 3, iclass 29, count 0 2006.229.22:13:28.66#ibcon#read 3, iclass 29, count 0 2006.229.22:13:28.66#ibcon#about to read 4, iclass 29, count 0 2006.229.22:13:28.66#ibcon#read 4, iclass 29, count 0 2006.229.22:13:28.66#ibcon#about to read 5, iclass 29, count 0 2006.229.22:13:28.66#ibcon#read 5, iclass 29, count 0 2006.229.22:13:28.66#ibcon#about to read 6, iclass 29, count 0 2006.229.22:13:28.66#ibcon#read 6, iclass 29, count 0 2006.229.22:13:28.66#ibcon#end of sib2, iclass 29, count 0 2006.229.22:13:28.66#ibcon#*after write, iclass 29, count 0 2006.229.22:13:28.66#ibcon#*before return 0, iclass 29, count 0 2006.229.22:13:28.66#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:28.66#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:13:28.66#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:13:28.66#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:13:28.66$vck44/vbbw=wide 2006.229.22:13:28.66#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:13:28.66#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:13:28.66#ibcon#ireg 8 cls_cnt 0 2006.229.22:13:28.66#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:13:28.73#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:13:28.73#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:13:28.73#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:13:28.73#ibcon#first serial, iclass 31, count 0 2006.229.22:13:28.73#ibcon#enter sib2, iclass 31, count 0 2006.229.22:13:28.73#ibcon#flushed, iclass 31, count 0 2006.229.22:13:28.73#ibcon#about to write, iclass 31, count 0 2006.229.22:13:28.73#ibcon#wrote, iclass 31, count 0 2006.229.22:13:28.73#ibcon#about to read 3, iclass 31, count 0 2006.229.22:13:28.75#ibcon#read 3, iclass 31, count 0 2006.229.22:13:28.75#ibcon#about to read 4, iclass 31, count 0 2006.229.22:13:28.75#ibcon#read 4, iclass 31, count 0 2006.229.22:13:28.75#ibcon#about to read 5, iclass 31, count 0 2006.229.22:13:28.75#ibcon#read 5, iclass 31, count 0 2006.229.22:13:28.75#ibcon#about to read 6, iclass 31, count 0 2006.229.22:13:28.75#ibcon#read 6, iclass 31, count 0 2006.229.22:13:28.75#ibcon#end of sib2, iclass 31, count 0 2006.229.22:13:28.75#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:13:28.75#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:13:28.75#ibcon#[27=BW32\r\n] 2006.229.22:13:28.75#ibcon#*before write, iclass 31, count 0 2006.229.22:13:28.75#ibcon#enter sib2, iclass 31, count 0 2006.229.22:13:28.75#ibcon#flushed, iclass 31, count 0 2006.229.22:13:28.75#ibcon#about to write, iclass 31, count 0 2006.229.22:13:28.75#ibcon#wrote, iclass 31, count 0 2006.229.22:13:28.75#ibcon#about to read 3, iclass 31, count 0 2006.229.22:13:28.78#ibcon#read 3, iclass 31, count 0 2006.229.22:13:28.78#ibcon#about to read 4, iclass 31, count 0 2006.229.22:13:28.78#ibcon#read 4, iclass 31, count 0 2006.229.22:13:28.78#ibcon#about to read 5, iclass 31, count 0 2006.229.22:13:28.78#ibcon#read 5, iclass 31, count 0 2006.229.22:13:28.78#ibcon#about to read 6, iclass 31, count 0 2006.229.22:13:28.78#ibcon#read 6, iclass 31, count 0 2006.229.22:13:28.78#ibcon#end of sib2, iclass 31, count 0 2006.229.22:13:28.78#ibcon#*after write, iclass 31, count 0 2006.229.22:13:28.78#ibcon#*before return 0, iclass 31, count 0 2006.229.22:13:28.78#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:13:28.78#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:13:28.78#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:13:28.78#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:13:28.78$setupk4/ifdk4 2006.229.22:13:28.78$ifdk4/lo= 2006.229.22:13:28.78$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:13:28.78$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:13:28.78$ifdk4/patch= 2006.229.22:13:28.78$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:13:28.78$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:13:28.78$setupk4/!*+20s 2006.229.22:13:32.61#abcon#<5=/08 1.0 5.6 28.28 941002.4\r\n> 2006.229.22:13:32.63#abcon#{5=INTERFACE CLEAR} 2006.229.22:13:32.69#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:13:42.78#abcon#<5=/08 1.0 5.6 28.29 941002.4\r\n> 2006.229.22:13:42.80#abcon#{5=INTERFACE CLEAR} 2006.229.22:13:42.86#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:13:43.26$setupk4/"tpicd 2006.229.22:13:43.26$setupk4/echo=off 2006.229.22:13:43.26$setupk4/xlog=off 2006.229.22:13:43.26:!2006.229.22:15:20 2006.229.22:14:01.14#trakl#Source acquired 2006.229.22:14:03.14#flagr#flagr/antenna,acquired 2006.229.22:15:20.00:preob 2006.229.22:15:20.14/onsource/TRACKING 2006.229.22:15:20.14:!2006.229.22:15:30 2006.229.22:15:30.00:"tape 2006.229.22:15:30.00:"st=record 2006.229.22:15:30.00:data_valid=on 2006.229.22:15:30.00:midob 2006.229.22:15:30.14/onsource/TRACKING 2006.229.22:15:30.14/wx/28.31,1002.3,93 2006.229.22:15:30.26/cable/+6.4192E-03 2006.229.22:15:31.35/va/01,08,usb,yes,29,31 2006.229.22:15:31.35/va/02,07,usb,yes,31,32 2006.229.22:15:31.35/va/03,06,usb,yes,39,41 2006.229.22:15:31.35/va/04,07,usb,yes,32,34 2006.229.22:15:31.35/va/05,04,usb,yes,29,29 2006.229.22:15:31.35/va/06,04,usb,yes,32,32 2006.229.22:15:31.35/va/07,05,usb,yes,28,29 2006.229.22:15:31.35/va/08,06,usb,yes,21,26 2006.229.22:15:31.58/valo/01,524.99,yes,locked 2006.229.22:15:31.58/valo/02,534.99,yes,locked 2006.229.22:15:31.58/valo/03,564.99,yes,locked 2006.229.22:15:31.58/valo/04,624.99,yes,locked 2006.229.22:15:31.58/valo/05,734.99,yes,locked 2006.229.22:15:31.58/valo/06,814.99,yes,locked 2006.229.22:15:31.58/valo/07,864.99,yes,locked 2006.229.22:15:31.58/valo/08,884.99,yes,locked 2006.229.22:15:32.67/vb/01,04,usb,yes,31,29 2006.229.22:15:32.67/vb/02,04,usb,yes,33,33 2006.229.22:15:32.67/vb/03,04,usb,yes,30,33 2006.229.22:15:32.67/vb/04,04,usb,yes,34,33 2006.229.22:15:32.67/vb/05,04,usb,yes,27,29 2006.229.22:15:32.67/vb/06,04,usb,yes,31,27 2006.229.22:15:32.67/vb/07,04,usb,yes,31,31 2006.229.22:15:32.67/vb/08,04,usb,yes,28,32 2006.229.22:15:32.90/vblo/01,629.99,yes,locked 2006.229.22:15:32.90/vblo/02,634.99,yes,locked 2006.229.22:15:32.90/vblo/03,649.99,yes,locked 2006.229.22:15:32.90/vblo/04,679.99,yes,locked 2006.229.22:15:32.90/vblo/05,709.99,yes,locked 2006.229.22:15:32.90/vblo/06,719.99,yes,locked 2006.229.22:15:32.90/vblo/07,734.99,yes,locked 2006.229.22:15:32.90/vblo/08,744.99,yes,locked 2006.229.22:15:33.05/vabw/8 2006.229.22:15:33.20/vbbw/8 2006.229.22:15:33.29/xfe/off,on,12.2 2006.229.22:15:33.67/ifatt/23,28,28,28 2006.229.22:15:34.08/fmout-gps/S +4.60E-07 2006.229.22:15:34.12:!2006.229.22:16:20 2006.229.22:16:20.01:data_valid=off 2006.229.22:16:20.02:"et 2006.229.22:16:20.02:!+3s 2006.229.22:16:23.03:"tape 2006.229.22:16:23.03:postob 2006.229.22:16:23.25/cable/+6.4172E-03 2006.229.22:16:23.26/wx/28.33,1002.4,91 2006.229.22:16:23.31/fmout-gps/S +4.60E-07 2006.229.22:16:23.32:scan_name=229-2219,jd0608,40 2006.229.22:16:23.32:source=0537-441,053850.36,-440508.9,2000.0,cw 2006.229.22:16:24.14#flagr#flagr/antenna,new-source 2006.229.22:16:24.15:checkk5 2006.229.22:16:24.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:16:24.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:16:25.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:16:25.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:16:26.17/chk_obsdata//k5ts1/T2292215??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:16:26.57/chk_obsdata//k5ts2/T2292215??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:16:26.96/chk_obsdata//k5ts3/T2292215??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:16:27.37/chk_obsdata//k5ts4/T2292215??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:16:28.09/k5log//k5ts1_log_newline 2006.229.22:16:28.81/k5log//k5ts2_log_newline 2006.229.22:16:29.50/k5log//k5ts3_log_newline 2006.229.22:16:30.22/k5log//k5ts4_log_newline 2006.229.22:16:30.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:16:30.24:setupk4=1 2006.229.22:16:30.24$setupk4/echo=on 2006.229.22:16:30.24$setupk4/pcalon 2006.229.22:16:30.24$pcalon/"no phase cal control is implemented here 2006.229.22:16:30.24$setupk4/"tpicd=stop 2006.229.22:16:30.24$setupk4/"rec=synch_on 2006.229.22:16:30.24$setupk4/"rec_mode=128 2006.229.22:16:30.24$setupk4/!* 2006.229.22:16:30.24$setupk4/recpk4 2006.229.22:16:30.24$recpk4/recpatch= 2006.229.22:16:30.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:16:30.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:16:30.25$setupk4/vck44 2006.229.22:16:30.25$vck44/valo=1,524.99 2006.229.22:16:30.25#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:16:30.25#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:16:30.25#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:30.25#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:30.25#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:30.25#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:30.25#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:16:30.25#ibcon#first serial, iclass 31, count 0 2006.229.22:16:30.25#ibcon#enter sib2, iclass 31, count 0 2006.229.22:16:30.25#ibcon#flushed, iclass 31, count 0 2006.229.22:16:30.25#ibcon#about to write, iclass 31, count 0 2006.229.22:16:30.25#ibcon#wrote, iclass 31, count 0 2006.229.22:16:30.25#ibcon#about to read 3, iclass 31, count 0 2006.229.22:16:30.26#ibcon#read 3, iclass 31, count 0 2006.229.22:16:30.26#ibcon#about to read 4, iclass 31, count 0 2006.229.22:16:30.26#ibcon#read 4, iclass 31, count 0 2006.229.22:16:30.26#ibcon#about to read 5, iclass 31, count 0 2006.229.22:16:30.26#ibcon#read 5, iclass 31, count 0 2006.229.22:16:30.26#ibcon#about to read 6, iclass 31, count 0 2006.229.22:16:30.26#ibcon#read 6, iclass 31, count 0 2006.229.22:16:30.26#ibcon#end of sib2, iclass 31, count 0 2006.229.22:16:30.26#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:16:30.26#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:16:30.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:16:30.26#ibcon#*before write, iclass 31, count 0 2006.229.22:16:30.26#ibcon#enter sib2, iclass 31, count 0 2006.229.22:16:30.26#ibcon#flushed, iclass 31, count 0 2006.229.22:16:30.26#ibcon#about to write, iclass 31, count 0 2006.229.22:16:30.26#ibcon#wrote, iclass 31, count 0 2006.229.22:16:30.26#ibcon#about to read 3, iclass 31, count 0 2006.229.22:16:30.31#ibcon#read 3, iclass 31, count 0 2006.229.22:16:30.31#ibcon#about to read 4, iclass 31, count 0 2006.229.22:16:30.31#ibcon#read 4, iclass 31, count 0 2006.229.22:16:30.31#ibcon#about to read 5, iclass 31, count 0 2006.229.22:16:30.31#ibcon#read 5, iclass 31, count 0 2006.229.22:16:30.31#ibcon#about to read 6, iclass 31, count 0 2006.229.22:16:30.31#ibcon#read 6, iclass 31, count 0 2006.229.22:16:30.31#ibcon#end of sib2, iclass 31, count 0 2006.229.22:16:30.31#ibcon#*after write, iclass 31, count 0 2006.229.22:16:30.31#ibcon#*before return 0, iclass 31, count 0 2006.229.22:16:30.31#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:30.31#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:30.31#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:16:30.31#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:16:30.31$vck44/va=1,8 2006.229.22:16:30.31#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.22:16:30.31#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.22:16:30.31#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:30.31#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:30.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:30.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:30.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.22:16:30.31#ibcon#first serial, iclass 33, count 2 2006.229.22:16:30.31#ibcon#enter sib2, iclass 33, count 2 2006.229.22:16:30.31#ibcon#flushed, iclass 33, count 2 2006.229.22:16:30.31#ibcon#about to write, iclass 33, count 2 2006.229.22:16:30.31#ibcon#wrote, iclass 33, count 2 2006.229.22:16:30.31#ibcon#about to read 3, iclass 33, count 2 2006.229.22:16:30.33#ibcon#read 3, iclass 33, count 2 2006.229.22:16:30.33#ibcon#about to read 4, iclass 33, count 2 2006.229.22:16:30.33#ibcon#read 4, iclass 33, count 2 2006.229.22:16:30.33#ibcon#about to read 5, iclass 33, count 2 2006.229.22:16:30.33#ibcon#read 5, iclass 33, count 2 2006.229.22:16:30.33#ibcon#about to read 6, iclass 33, count 2 2006.229.22:16:30.33#ibcon#read 6, iclass 33, count 2 2006.229.22:16:30.33#ibcon#end of sib2, iclass 33, count 2 2006.229.22:16:30.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.22:16:30.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.22:16:30.33#ibcon#[25=AT01-08\r\n] 2006.229.22:16:30.33#ibcon#*before write, iclass 33, count 2 2006.229.22:16:30.33#ibcon#enter sib2, iclass 33, count 2 2006.229.22:16:30.33#ibcon#flushed, iclass 33, count 2 2006.229.22:16:30.33#ibcon#about to write, iclass 33, count 2 2006.229.22:16:30.33#ibcon#wrote, iclass 33, count 2 2006.229.22:16:30.33#ibcon#about to read 3, iclass 33, count 2 2006.229.22:16:30.36#ibcon#read 3, iclass 33, count 2 2006.229.22:16:30.36#ibcon#about to read 4, iclass 33, count 2 2006.229.22:16:30.36#ibcon#read 4, iclass 33, count 2 2006.229.22:16:30.36#ibcon#about to read 5, iclass 33, count 2 2006.229.22:16:30.36#ibcon#read 5, iclass 33, count 2 2006.229.22:16:30.36#ibcon#about to read 6, iclass 33, count 2 2006.229.22:16:30.36#ibcon#read 6, iclass 33, count 2 2006.229.22:16:30.36#ibcon#end of sib2, iclass 33, count 2 2006.229.22:16:30.36#ibcon#*after write, iclass 33, count 2 2006.229.22:16:30.36#ibcon#*before return 0, iclass 33, count 2 2006.229.22:16:30.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:30.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:30.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.22:16:30.36#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:30.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:30.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:30.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:30.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:16:30.48#ibcon#first serial, iclass 33, count 0 2006.229.22:16:30.48#ibcon#enter sib2, iclass 33, count 0 2006.229.22:16:30.48#ibcon#flushed, iclass 33, count 0 2006.229.22:16:30.48#ibcon#about to write, iclass 33, count 0 2006.229.22:16:30.48#ibcon#wrote, iclass 33, count 0 2006.229.22:16:30.48#ibcon#about to read 3, iclass 33, count 0 2006.229.22:16:30.50#ibcon#read 3, iclass 33, count 0 2006.229.22:16:30.50#ibcon#about to read 4, iclass 33, count 0 2006.229.22:16:30.50#ibcon#read 4, iclass 33, count 0 2006.229.22:16:30.50#ibcon#about to read 5, iclass 33, count 0 2006.229.22:16:30.50#ibcon#read 5, iclass 33, count 0 2006.229.22:16:30.50#ibcon#about to read 6, iclass 33, count 0 2006.229.22:16:30.50#ibcon#read 6, iclass 33, count 0 2006.229.22:16:30.50#ibcon#end of sib2, iclass 33, count 0 2006.229.22:16:30.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:16:30.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:16:30.50#ibcon#[25=USB\r\n] 2006.229.22:16:30.50#ibcon#*before write, iclass 33, count 0 2006.229.22:16:30.50#ibcon#enter sib2, iclass 33, count 0 2006.229.22:16:30.50#ibcon#flushed, iclass 33, count 0 2006.229.22:16:30.50#ibcon#about to write, iclass 33, count 0 2006.229.22:16:30.50#ibcon#wrote, iclass 33, count 0 2006.229.22:16:30.50#ibcon#about to read 3, iclass 33, count 0 2006.229.22:16:30.53#ibcon#read 3, iclass 33, count 0 2006.229.22:16:30.53#ibcon#about to read 4, iclass 33, count 0 2006.229.22:16:30.53#ibcon#read 4, iclass 33, count 0 2006.229.22:16:30.53#ibcon#about to read 5, iclass 33, count 0 2006.229.22:16:30.53#ibcon#read 5, iclass 33, count 0 2006.229.22:16:30.53#ibcon#about to read 6, iclass 33, count 0 2006.229.22:16:30.53#ibcon#read 6, iclass 33, count 0 2006.229.22:16:30.53#ibcon#end of sib2, iclass 33, count 0 2006.229.22:16:30.53#ibcon#*after write, iclass 33, count 0 2006.229.22:16:30.53#ibcon#*before return 0, iclass 33, count 0 2006.229.22:16:30.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:30.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:30.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:16:30.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:16:30.53$vck44/valo=2,534.99 2006.229.22:16:30.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.22:16:30.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.22:16:30.53#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:30.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:30.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:30.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:30.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:16:30.53#ibcon#first serial, iclass 35, count 0 2006.229.22:16:30.53#ibcon#enter sib2, iclass 35, count 0 2006.229.22:16:30.53#ibcon#flushed, iclass 35, count 0 2006.229.22:16:30.53#ibcon#about to write, iclass 35, count 0 2006.229.22:16:30.53#ibcon#wrote, iclass 35, count 0 2006.229.22:16:30.53#ibcon#about to read 3, iclass 35, count 0 2006.229.22:16:30.55#ibcon#read 3, iclass 35, count 0 2006.229.22:16:30.55#ibcon#about to read 4, iclass 35, count 0 2006.229.22:16:30.55#ibcon#read 4, iclass 35, count 0 2006.229.22:16:30.55#ibcon#about to read 5, iclass 35, count 0 2006.229.22:16:30.55#ibcon#read 5, iclass 35, count 0 2006.229.22:16:30.55#ibcon#about to read 6, iclass 35, count 0 2006.229.22:16:30.55#ibcon#read 6, iclass 35, count 0 2006.229.22:16:30.55#ibcon#end of sib2, iclass 35, count 0 2006.229.22:16:30.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:16:30.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:16:30.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:16:30.55#ibcon#*before write, iclass 35, count 0 2006.229.22:16:30.55#ibcon#enter sib2, iclass 35, count 0 2006.229.22:16:30.55#ibcon#flushed, iclass 35, count 0 2006.229.22:16:30.55#ibcon#about to write, iclass 35, count 0 2006.229.22:16:30.55#ibcon#wrote, iclass 35, count 0 2006.229.22:16:30.55#ibcon#about to read 3, iclass 35, count 0 2006.229.22:16:30.59#ibcon#read 3, iclass 35, count 0 2006.229.22:16:30.59#ibcon#about to read 4, iclass 35, count 0 2006.229.22:16:30.59#ibcon#read 4, iclass 35, count 0 2006.229.22:16:30.59#ibcon#about to read 5, iclass 35, count 0 2006.229.22:16:30.59#ibcon#read 5, iclass 35, count 0 2006.229.22:16:30.59#ibcon#about to read 6, iclass 35, count 0 2006.229.22:16:30.59#ibcon#read 6, iclass 35, count 0 2006.229.22:16:30.59#ibcon#end of sib2, iclass 35, count 0 2006.229.22:16:30.59#ibcon#*after write, iclass 35, count 0 2006.229.22:16:30.59#ibcon#*before return 0, iclass 35, count 0 2006.229.22:16:30.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:30.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:30.59#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:16:30.59#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:16:30.59$vck44/va=2,7 2006.229.22:16:30.59#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.22:16:30.59#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.22:16:30.59#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:30.59#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:30.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:30.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:30.65#ibcon#enter wrdev, iclass 37, count 2 2006.229.22:16:30.65#ibcon#first serial, iclass 37, count 2 2006.229.22:16:30.65#ibcon#enter sib2, iclass 37, count 2 2006.229.22:16:30.65#ibcon#flushed, iclass 37, count 2 2006.229.22:16:30.65#ibcon#about to write, iclass 37, count 2 2006.229.22:16:30.65#ibcon#wrote, iclass 37, count 2 2006.229.22:16:30.65#ibcon#about to read 3, iclass 37, count 2 2006.229.22:16:30.67#ibcon#read 3, iclass 37, count 2 2006.229.22:16:30.67#ibcon#about to read 4, iclass 37, count 2 2006.229.22:16:30.67#ibcon#read 4, iclass 37, count 2 2006.229.22:16:30.67#ibcon#about to read 5, iclass 37, count 2 2006.229.22:16:30.67#ibcon#read 5, iclass 37, count 2 2006.229.22:16:30.67#ibcon#about to read 6, iclass 37, count 2 2006.229.22:16:30.67#ibcon#read 6, iclass 37, count 2 2006.229.22:16:30.67#ibcon#end of sib2, iclass 37, count 2 2006.229.22:16:30.67#ibcon#*mode == 0, iclass 37, count 2 2006.229.22:16:30.67#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.22:16:30.67#ibcon#[25=AT02-07\r\n] 2006.229.22:16:30.67#ibcon#*before write, iclass 37, count 2 2006.229.22:16:30.67#ibcon#enter sib2, iclass 37, count 2 2006.229.22:16:30.67#ibcon#flushed, iclass 37, count 2 2006.229.22:16:30.67#ibcon#about to write, iclass 37, count 2 2006.229.22:16:30.67#ibcon#wrote, iclass 37, count 2 2006.229.22:16:30.67#ibcon#about to read 3, iclass 37, count 2 2006.229.22:16:30.70#ibcon#read 3, iclass 37, count 2 2006.229.22:16:30.70#ibcon#about to read 4, iclass 37, count 2 2006.229.22:16:30.70#ibcon#read 4, iclass 37, count 2 2006.229.22:16:30.70#ibcon#about to read 5, iclass 37, count 2 2006.229.22:16:30.70#ibcon#read 5, iclass 37, count 2 2006.229.22:16:30.70#ibcon#about to read 6, iclass 37, count 2 2006.229.22:16:30.70#ibcon#read 6, iclass 37, count 2 2006.229.22:16:30.70#ibcon#end of sib2, iclass 37, count 2 2006.229.22:16:30.70#ibcon#*after write, iclass 37, count 2 2006.229.22:16:30.70#ibcon#*before return 0, iclass 37, count 2 2006.229.22:16:30.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:30.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:30.70#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.22:16:30.70#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:30.70#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:30.82#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:30.82#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:30.82#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:16:30.82#ibcon#first serial, iclass 37, count 0 2006.229.22:16:30.82#ibcon#enter sib2, iclass 37, count 0 2006.229.22:16:30.82#ibcon#flushed, iclass 37, count 0 2006.229.22:16:30.82#ibcon#about to write, iclass 37, count 0 2006.229.22:16:30.82#ibcon#wrote, iclass 37, count 0 2006.229.22:16:30.82#ibcon#about to read 3, iclass 37, count 0 2006.229.22:16:30.84#ibcon#read 3, iclass 37, count 0 2006.229.22:16:30.84#ibcon#about to read 4, iclass 37, count 0 2006.229.22:16:30.84#ibcon#read 4, iclass 37, count 0 2006.229.22:16:30.84#ibcon#about to read 5, iclass 37, count 0 2006.229.22:16:30.84#ibcon#read 5, iclass 37, count 0 2006.229.22:16:30.84#ibcon#about to read 6, iclass 37, count 0 2006.229.22:16:30.84#ibcon#read 6, iclass 37, count 0 2006.229.22:16:30.84#ibcon#end of sib2, iclass 37, count 0 2006.229.22:16:30.84#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:16:30.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:16:30.84#ibcon#[25=USB\r\n] 2006.229.22:16:30.84#ibcon#*before write, iclass 37, count 0 2006.229.22:16:30.84#ibcon#enter sib2, iclass 37, count 0 2006.229.22:16:30.84#ibcon#flushed, iclass 37, count 0 2006.229.22:16:30.84#ibcon#about to write, iclass 37, count 0 2006.229.22:16:30.84#ibcon#wrote, iclass 37, count 0 2006.229.22:16:30.84#ibcon#about to read 3, iclass 37, count 0 2006.229.22:16:30.87#ibcon#read 3, iclass 37, count 0 2006.229.22:16:30.87#ibcon#about to read 4, iclass 37, count 0 2006.229.22:16:30.87#ibcon#read 4, iclass 37, count 0 2006.229.22:16:30.87#ibcon#about to read 5, iclass 37, count 0 2006.229.22:16:30.87#ibcon#read 5, iclass 37, count 0 2006.229.22:16:30.87#ibcon#about to read 6, iclass 37, count 0 2006.229.22:16:30.87#ibcon#read 6, iclass 37, count 0 2006.229.22:16:30.87#ibcon#end of sib2, iclass 37, count 0 2006.229.22:16:30.87#ibcon#*after write, iclass 37, count 0 2006.229.22:16:30.87#ibcon#*before return 0, iclass 37, count 0 2006.229.22:16:30.87#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:30.87#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:30.87#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:16:30.87#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:16:30.87$vck44/valo=3,564.99 2006.229.22:16:30.87#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.22:16:30.87#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.22:16:30.87#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:30.87#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:30.87#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:30.87#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:30.87#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:16:30.87#ibcon#first serial, iclass 39, count 0 2006.229.22:16:30.87#ibcon#enter sib2, iclass 39, count 0 2006.229.22:16:30.87#ibcon#flushed, iclass 39, count 0 2006.229.22:16:30.87#ibcon#about to write, iclass 39, count 0 2006.229.22:16:30.87#ibcon#wrote, iclass 39, count 0 2006.229.22:16:30.87#ibcon#about to read 3, iclass 39, count 0 2006.229.22:16:30.89#ibcon#read 3, iclass 39, count 0 2006.229.22:16:30.89#ibcon#about to read 4, iclass 39, count 0 2006.229.22:16:30.89#ibcon#read 4, iclass 39, count 0 2006.229.22:16:30.89#ibcon#about to read 5, iclass 39, count 0 2006.229.22:16:30.89#ibcon#read 5, iclass 39, count 0 2006.229.22:16:30.89#ibcon#about to read 6, iclass 39, count 0 2006.229.22:16:30.89#ibcon#read 6, iclass 39, count 0 2006.229.22:16:30.89#ibcon#end of sib2, iclass 39, count 0 2006.229.22:16:30.89#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:16:30.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:16:30.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:16:30.89#ibcon#*before write, iclass 39, count 0 2006.229.22:16:30.89#ibcon#enter sib2, iclass 39, count 0 2006.229.22:16:30.89#ibcon#flushed, iclass 39, count 0 2006.229.22:16:30.89#ibcon#about to write, iclass 39, count 0 2006.229.22:16:30.89#ibcon#wrote, iclass 39, count 0 2006.229.22:16:30.89#ibcon#about to read 3, iclass 39, count 0 2006.229.22:16:30.93#ibcon#read 3, iclass 39, count 0 2006.229.22:16:30.93#ibcon#about to read 4, iclass 39, count 0 2006.229.22:16:30.93#ibcon#read 4, iclass 39, count 0 2006.229.22:16:30.93#ibcon#about to read 5, iclass 39, count 0 2006.229.22:16:30.93#ibcon#read 5, iclass 39, count 0 2006.229.22:16:30.93#ibcon#about to read 6, iclass 39, count 0 2006.229.22:16:30.93#ibcon#read 6, iclass 39, count 0 2006.229.22:16:30.93#ibcon#end of sib2, iclass 39, count 0 2006.229.22:16:30.93#ibcon#*after write, iclass 39, count 0 2006.229.22:16:30.93#ibcon#*before return 0, iclass 39, count 0 2006.229.22:16:30.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:30.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:30.93#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:16:30.93#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:16:30.93$vck44/va=3,6 2006.229.22:16:30.93#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.22:16:30.93#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.22:16:30.93#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:30.93#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:30.99#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:30.99#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:30.99#ibcon#enter wrdev, iclass 3, count 2 2006.229.22:16:30.99#ibcon#first serial, iclass 3, count 2 2006.229.22:16:30.99#ibcon#enter sib2, iclass 3, count 2 2006.229.22:16:30.99#ibcon#flushed, iclass 3, count 2 2006.229.22:16:30.99#ibcon#about to write, iclass 3, count 2 2006.229.22:16:30.99#ibcon#wrote, iclass 3, count 2 2006.229.22:16:30.99#ibcon#about to read 3, iclass 3, count 2 2006.229.22:16:31.01#ibcon#read 3, iclass 3, count 2 2006.229.22:16:31.01#ibcon#about to read 4, iclass 3, count 2 2006.229.22:16:31.01#ibcon#read 4, iclass 3, count 2 2006.229.22:16:31.01#ibcon#about to read 5, iclass 3, count 2 2006.229.22:16:31.01#ibcon#read 5, iclass 3, count 2 2006.229.22:16:31.01#ibcon#about to read 6, iclass 3, count 2 2006.229.22:16:31.01#ibcon#read 6, iclass 3, count 2 2006.229.22:16:31.01#ibcon#end of sib2, iclass 3, count 2 2006.229.22:16:31.01#ibcon#*mode == 0, iclass 3, count 2 2006.229.22:16:31.01#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.22:16:31.01#ibcon#[25=AT03-06\r\n] 2006.229.22:16:31.01#ibcon#*before write, iclass 3, count 2 2006.229.22:16:31.01#ibcon#enter sib2, iclass 3, count 2 2006.229.22:16:31.01#ibcon#flushed, iclass 3, count 2 2006.229.22:16:31.01#ibcon#about to write, iclass 3, count 2 2006.229.22:16:31.01#ibcon#wrote, iclass 3, count 2 2006.229.22:16:31.01#ibcon#about to read 3, iclass 3, count 2 2006.229.22:16:31.04#ibcon#read 3, iclass 3, count 2 2006.229.22:16:31.04#ibcon#about to read 4, iclass 3, count 2 2006.229.22:16:31.04#ibcon#read 4, iclass 3, count 2 2006.229.22:16:31.04#ibcon#about to read 5, iclass 3, count 2 2006.229.22:16:31.04#ibcon#read 5, iclass 3, count 2 2006.229.22:16:31.04#ibcon#about to read 6, iclass 3, count 2 2006.229.22:16:31.04#ibcon#read 6, iclass 3, count 2 2006.229.22:16:31.04#ibcon#end of sib2, iclass 3, count 2 2006.229.22:16:31.04#ibcon#*after write, iclass 3, count 2 2006.229.22:16:31.04#ibcon#*before return 0, iclass 3, count 2 2006.229.22:16:31.04#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:31.04#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:31.04#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.22:16:31.04#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:31.04#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:31.16#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:31.16#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:31.16#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:16:31.16#ibcon#first serial, iclass 3, count 0 2006.229.22:16:31.16#ibcon#enter sib2, iclass 3, count 0 2006.229.22:16:31.16#ibcon#flushed, iclass 3, count 0 2006.229.22:16:31.16#ibcon#about to write, iclass 3, count 0 2006.229.22:16:31.16#ibcon#wrote, iclass 3, count 0 2006.229.22:16:31.16#ibcon#about to read 3, iclass 3, count 0 2006.229.22:16:31.18#ibcon#read 3, iclass 3, count 0 2006.229.22:16:31.18#ibcon#about to read 4, iclass 3, count 0 2006.229.22:16:31.18#ibcon#read 4, iclass 3, count 0 2006.229.22:16:31.18#ibcon#about to read 5, iclass 3, count 0 2006.229.22:16:31.18#ibcon#read 5, iclass 3, count 0 2006.229.22:16:31.18#ibcon#about to read 6, iclass 3, count 0 2006.229.22:16:31.18#ibcon#read 6, iclass 3, count 0 2006.229.22:16:31.18#ibcon#end of sib2, iclass 3, count 0 2006.229.22:16:31.18#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:16:31.18#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:16:31.18#ibcon#[25=USB\r\n] 2006.229.22:16:31.18#ibcon#*before write, iclass 3, count 0 2006.229.22:16:31.18#ibcon#enter sib2, iclass 3, count 0 2006.229.22:16:31.18#ibcon#flushed, iclass 3, count 0 2006.229.22:16:31.18#ibcon#about to write, iclass 3, count 0 2006.229.22:16:31.18#ibcon#wrote, iclass 3, count 0 2006.229.22:16:31.18#ibcon#about to read 3, iclass 3, count 0 2006.229.22:16:31.21#ibcon#read 3, iclass 3, count 0 2006.229.22:16:31.21#ibcon#about to read 4, iclass 3, count 0 2006.229.22:16:31.21#ibcon#read 4, iclass 3, count 0 2006.229.22:16:31.21#ibcon#about to read 5, iclass 3, count 0 2006.229.22:16:31.21#ibcon#read 5, iclass 3, count 0 2006.229.22:16:31.21#ibcon#about to read 6, iclass 3, count 0 2006.229.22:16:31.21#ibcon#read 6, iclass 3, count 0 2006.229.22:16:31.21#ibcon#end of sib2, iclass 3, count 0 2006.229.22:16:31.21#ibcon#*after write, iclass 3, count 0 2006.229.22:16:31.21#ibcon#*before return 0, iclass 3, count 0 2006.229.22:16:31.21#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:31.21#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:31.21#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:16:31.21#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:16:31.21$vck44/valo=4,624.99 2006.229.22:16:31.21#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:16:31.21#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:16:31.21#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:31.21#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:31.21#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:31.21#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:31.21#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:16:31.21#ibcon#first serial, iclass 5, count 0 2006.229.22:16:31.21#ibcon#enter sib2, iclass 5, count 0 2006.229.22:16:31.21#ibcon#flushed, iclass 5, count 0 2006.229.22:16:31.21#ibcon#about to write, iclass 5, count 0 2006.229.22:16:31.21#ibcon#wrote, iclass 5, count 0 2006.229.22:16:31.21#ibcon#about to read 3, iclass 5, count 0 2006.229.22:16:31.23#ibcon#read 3, iclass 5, count 0 2006.229.22:16:31.23#ibcon#about to read 4, iclass 5, count 0 2006.229.22:16:31.23#ibcon#read 4, iclass 5, count 0 2006.229.22:16:31.23#ibcon#about to read 5, iclass 5, count 0 2006.229.22:16:31.23#ibcon#read 5, iclass 5, count 0 2006.229.22:16:31.23#ibcon#about to read 6, iclass 5, count 0 2006.229.22:16:31.23#ibcon#read 6, iclass 5, count 0 2006.229.22:16:31.23#ibcon#end of sib2, iclass 5, count 0 2006.229.22:16:31.23#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:16:31.23#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:16:31.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:16:31.23#ibcon#*before write, iclass 5, count 0 2006.229.22:16:31.23#ibcon#enter sib2, iclass 5, count 0 2006.229.22:16:31.23#ibcon#flushed, iclass 5, count 0 2006.229.22:16:31.23#ibcon#about to write, iclass 5, count 0 2006.229.22:16:31.23#ibcon#wrote, iclass 5, count 0 2006.229.22:16:31.23#ibcon#about to read 3, iclass 5, count 0 2006.229.22:16:31.27#ibcon#read 3, iclass 5, count 0 2006.229.22:16:31.27#ibcon#about to read 4, iclass 5, count 0 2006.229.22:16:31.27#ibcon#read 4, iclass 5, count 0 2006.229.22:16:31.27#ibcon#about to read 5, iclass 5, count 0 2006.229.22:16:31.27#ibcon#read 5, iclass 5, count 0 2006.229.22:16:31.27#ibcon#about to read 6, iclass 5, count 0 2006.229.22:16:31.27#ibcon#read 6, iclass 5, count 0 2006.229.22:16:31.27#ibcon#end of sib2, iclass 5, count 0 2006.229.22:16:31.27#ibcon#*after write, iclass 5, count 0 2006.229.22:16:31.27#ibcon#*before return 0, iclass 5, count 0 2006.229.22:16:31.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:31.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:31.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:16:31.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:16:31.27$vck44/va=4,7 2006.229.22:16:31.27#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.22:16:31.27#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.22:16:31.27#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:31.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:31.33#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:31.33#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:31.33#ibcon#enter wrdev, iclass 7, count 2 2006.229.22:16:31.33#ibcon#first serial, iclass 7, count 2 2006.229.22:16:31.33#ibcon#enter sib2, iclass 7, count 2 2006.229.22:16:31.33#ibcon#flushed, iclass 7, count 2 2006.229.22:16:31.33#ibcon#about to write, iclass 7, count 2 2006.229.22:16:31.33#ibcon#wrote, iclass 7, count 2 2006.229.22:16:31.33#ibcon#about to read 3, iclass 7, count 2 2006.229.22:16:31.35#ibcon#read 3, iclass 7, count 2 2006.229.22:16:31.35#ibcon#about to read 4, iclass 7, count 2 2006.229.22:16:31.35#ibcon#read 4, iclass 7, count 2 2006.229.22:16:31.35#ibcon#about to read 5, iclass 7, count 2 2006.229.22:16:31.35#ibcon#read 5, iclass 7, count 2 2006.229.22:16:31.35#ibcon#about to read 6, iclass 7, count 2 2006.229.22:16:31.35#ibcon#read 6, iclass 7, count 2 2006.229.22:16:31.35#ibcon#end of sib2, iclass 7, count 2 2006.229.22:16:31.35#ibcon#*mode == 0, iclass 7, count 2 2006.229.22:16:31.35#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.22:16:31.35#ibcon#[25=AT04-07\r\n] 2006.229.22:16:31.35#ibcon#*before write, iclass 7, count 2 2006.229.22:16:31.35#ibcon#enter sib2, iclass 7, count 2 2006.229.22:16:31.35#ibcon#flushed, iclass 7, count 2 2006.229.22:16:31.35#ibcon#about to write, iclass 7, count 2 2006.229.22:16:31.35#ibcon#wrote, iclass 7, count 2 2006.229.22:16:31.35#ibcon#about to read 3, iclass 7, count 2 2006.229.22:16:31.38#ibcon#read 3, iclass 7, count 2 2006.229.22:16:31.38#ibcon#about to read 4, iclass 7, count 2 2006.229.22:16:31.38#ibcon#read 4, iclass 7, count 2 2006.229.22:16:31.38#ibcon#about to read 5, iclass 7, count 2 2006.229.22:16:31.38#ibcon#read 5, iclass 7, count 2 2006.229.22:16:31.38#ibcon#about to read 6, iclass 7, count 2 2006.229.22:16:31.38#ibcon#read 6, iclass 7, count 2 2006.229.22:16:31.38#ibcon#end of sib2, iclass 7, count 2 2006.229.22:16:31.38#ibcon#*after write, iclass 7, count 2 2006.229.22:16:31.38#ibcon#*before return 0, iclass 7, count 2 2006.229.22:16:31.38#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:31.38#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:31.38#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.22:16:31.38#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:31.38#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:31.50#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:31.50#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:31.50#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:16:31.50#ibcon#first serial, iclass 7, count 0 2006.229.22:16:31.50#ibcon#enter sib2, iclass 7, count 0 2006.229.22:16:31.50#ibcon#flushed, iclass 7, count 0 2006.229.22:16:31.50#ibcon#about to write, iclass 7, count 0 2006.229.22:16:31.50#ibcon#wrote, iclass 7, count 0 2006.229.22:16:31.50#ibcon#about to read 3, iclass 7, count 0 2006.229.22:16:31.52#ibcon#read 3, iclass 7, count 0 2006.229.22:16:31.52#ibcon#about to read 4, iclass 7, count 0 2006.229.22:16:31.52#ibcon#read 4, iclass 7, count 0 2006.229.22:16:31.52#ibcon#about to read 5, iclass 7, count 0 2006.229.22:16:31.52#ibcon#read 5, iclass 7, count 0 2006.229.22:16:31.52#ibcon#about to read 6, iclass 7, count 0 2006.229.22:16:31.52#ibcon#read 6, iclass 7, count 0 2006.229.22:16:31.52#ibcon#end of sib2, iclass 7, count 0 2006.229.22:16:31.52#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:16:31.52#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:16:31.52#ibcon#[25=USB\r\n] 2006.229.22:16:31.52#ibcon#*before write, iclass 7, count 0 2006.229.22:16:31.52#ibcon#enter sib2, iclass 7, count 0 2006.229.22:16:31.52#ibcon#flushed, iclass 7, count 0 2006.229.22:16:31.52#ibcon#about to write, iclass 7, count 0 2006.229.22:16:31.52#ibcon#wrote, iclass 7, count 0 2006.229.22:16:31.52#ibcon#about to read 3, iclass 7, count 0 2006.229.22:16:31.55#ibcon#read 3, iclass 7, count 0 2006.229.22:16:31.55#ibcon#about to read 4, iclass 7, count 0 2006.229.22:16:31.55#ibcon#read 4, iclass 7, count 0 2006.229.22:16:31.55#ibcon#about to read 5, iclass 7, count 0 2006.229.22:16:31.55#ibcon#read 5, iclass 7, count 0 2006.229.22:16:31.55#ibcon#about to read 6, iclass 7, count 0 2006.229.22:16:31.55#ibcon#read 6, iclass 7, count 0 2006.229.22:16:31.55#ibcon#end of sib2, iclass 7, count 0 2006.229.22:16:31.55#ibcon#*after write, iclass 7, count 0 2006.229.22:16:31.55#ibcon#*before return 0, iclass 7, count 0 2006.229.22:16:31.55#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:31.55#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:31.55#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:16:31.55#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:16:31.55$vck44/valo=5,734.99 2006.229.22:16:31.55#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.22:16:31.55#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.22:16:31.55#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:31.55#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:31.55#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:31.55#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:31.55#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:16:31.55#ibcon#first serial, iclass 11, count 0 2006.229.22:16:31.55#ibcon#enter sib2, iclass 11, count 0 2006.229.22:16:31.55#ibcon#flushed, iclass 11, count 0 2006.229.22:16:31.55#ibcon#about to write, iclass 11, count 0 2006.229.22:16:31.55#ibcon#wrote, iclass 11, count 0 2006.229.22:16:31.55#ibcon#about to read 3, iclass 11, count 0 2006.229.22:16:31.57#ibcon#read 3, iclass 11, count 0 2006.229.22:16:31.57#ibcon#about to read 4, iclass 11, count 0 2006.229.22:16:31.57#ibcon#read 4, iclass 11, count 0 2006.229.22:16:31.57#ibcon#about to read 5, iclass 11, count 0 2006.229.22:16:31.57#ibcon#read 5, iclass 11, count 0 2006.229.22:16:31.57#ibcon#about to read 6, iclass 11, count 0 2006.229.22:16:31.57#ibcon#read 6, iclass 11, count 0 2006.229.22:16:31.57#ibcon#end of sib2, iclass 11, count 0 2006.229.22:16:31.57#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:16:31.57#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:16:31.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:16:31.57#ibcon#*before write, iclass 11, count 0 2006.229.22:16:31.57#ibcon#enter sib2, iclass 11, count 0 2006.229.22:16:31.57#ibcon#flushed, iclass 11, count 0 2006.229.22:16:31.57#ibcon#about to write, iclass 11, count 0 2006.229.22:16:31.57#ibcon#wrote, iclass 11, count 0 2006.229.22:16:31.57#ibcon#about to read 3, iclass 11, count 0 2006.229.22:16:31.61#ibcon#read 3, iclass 11, count 0 2006.229.22:16:31.61#ibcon#about to read 4, iclass 11, count 0 2006.229.22:16:31.61#ibcon#read 4, iclass 11, count 0 2006.229.22:16:31.61#ibcon#about to read 5, iclass 11, count 0 2006.229.22:16:31.61#ibcon#read 5, iclass 11, count 0 2006.229.22:16:31.61#ibcon#about to read 6, iclass 11, count 0 2006.229.22:16:31.61#ibcon#read 6, iclass 11, count 0 2006.229.22:16:31.61#ibcon#end of sib2, iclass 11, count 0 2006.229.22:16:31.61#ibcon#*after write, iclass 11, count 0 2006.229.22:16:31.61#ibcon#*before return 0, iclass 11, count 0 2006.229.22:16:31.61#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:31.61#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:31.61#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:16:31.61#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:16:31.61$vck44/va=5,4 2006.229.22:16:31.61#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.22:16:31.61#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.22:16:31.61#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:31.61#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:31.67#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:31.67#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:31.67#ibcon#enter wrdev, iclass 13, count 2 2006.229.22:16:31.67#ibcon#first serial, iclass 13, count 2 2006.229.22:16:31.67#ibcon#enter sib2, iclass 13, count 2 2006.229.22:16:31.67#ibcon#flushed, iclass 13, count 2 2006.229.22:16:31.67#ibcon#about to write, iclass 13, count 2 2006.229.22:16:31.67#ibcon#wrote, iclass 13, count 2 2006.229.22:16:31.67#ibcon#about to read 3, iclass 13, count 2 2006.229.22:16:31.69#ibcon#read 3, iclass 13, count 2 2006.229.22:16:31.69#ibcon#about to read 4, iclass 13, count 2 2006.229.22:16:31.69#ibcon#read 4, iclass 13, count 2 2006.229.22:16:31.69#ibcon#about to read 5, iclass 13, count 2 2006.229.22:16:31.69#ibcon#read 5, iclass 13, count 2 2006.229.22:16:31.69#ibcon#about to read 6, iclass 13, count 2 2006.229.22:16:31.69#ibcon#read 6, iclass 13, count 2 2006.229.22:16:31.69#ibcon#end of sib2, iclass 13, count 2 2006.229.22:16:31.69#ibcon#*mode == 0, iclass 13, count 2 2006.229.22:16:31.69#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.22:16:31.69#ibcon#[25=AT05-04\r\n] 2006.229.22:16:31.69#ibcon#*before write, iclass 13, count 2 2006.229.22:16:31.69#ibcon#enter sib2, iclass 13, count 2 2006.229.22:16:31.69#ibcon#flushed, iclass 13, count 2 2006.229.22:16:31.69#ibcon#about to write, iclass 13, count 2 2006.229.22:16:31.69#ibcon#wrote, iclass 13, count 2 2006.229.22:16:31.69#ibcon#about to read 3, iclass 13, count 2 2006.229.22:16:31.72#ibcon#read 3, iclass 13, count 2 2006.229.22:16:31.72#ibcon#about to read 4, iclass 13, count 2 2006.229.22:16:31.72#ibcon#read 4, iclass 13, count 2 2006.229.22:16:31.72#ibcon#about to read 5, iclass 13, count 2 2006.229.22:16:31.72#ibcon#read 5, iclass 13, count 2 2006.229.22:16:31.72#ibcon#about to read 6, iclass 13, count 2 2006.229.22:16:31.72#ibcon#read 6, iclass 13, count 2 2006.229.22:16:31.72#ibcon#end of sib2, iclass 13, count 2 2006.229.22:16:31.72#ibcon#*after write, iclass 13, count 2 2006.229.22:16:31.72#ibcon#*before return 0, iclass 13, count 2 2006.229.22:16:31.72#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:31.72#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:31.72#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.22:16:31.72#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:31.72#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:31.84#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:31.84#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:31.84#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:16:31.84#ibcon#first serial, iclass 13, count 0 2006.229.22:16:31.84#ibcon#enter sib2, iclass 13, count 0 2006.229.22:16:31.84#ibcon#flushed, iclass 13, count 0 2006.229.22:16:31.84#ibcon#about to write, iclass 13, count 0 2006.229.22:16:31.84#ibcon#wrote, iclass 13, count 0 2006.229.22:16:31.84#ibcon#about to read 3, iclass 13, count 0 2006.229.22:16:31.86#ibcon#read 3, iclass 13, count 0 2006.229.22:16:31.86#ibcon#about to read 4, iclass 13, count 0 2006.229.22:16:31.86#ibcon#read 4, iclass 13, count 0 2006.229.22:16:31.86#ibcon#about to read 5, iclass 13, count 0 2006.229.22:16:31.86#ibcon#read 5, iclass 13, count 0 2006.229.22:16:31.86#ibcon#about to read 6, iclass 13, count 0 2006.229.22:16:31.86#ibcon#read 6, iclass 13, count 0 2006.229.22:16:31.86#ibcon#end of sib2, iclass 13, count 0 2006.229.22:16:31.86#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:16:31.86#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:16:31.86#ibcon#[25=USB\r\n] 2006.229.22:16:31.86#ibcon#*before write, iclass 13, count 0 2006.229.22:16:31.86#ibcon#enter sib2, iclass 13, count 0 2006.229.22:16:31.86#ibcon#flushed, iclass 13, count 0 2006.229.22:16:31.86#ibcon#about to write, iclass 13, count 0 2006.229.22:16:31.86#ibcon#wrote, iclass 13, count 0 2006.229.22:16:31.86#ibcon#about to read 3, iclass 13, count 0 2006.229.22:16:31.89#ibcon#read 3, iclass 13, count 0 2006.229.22:16:31.89#ibcon#about to read 4, iclass 13, count 0 2006.229.22:16:31.89#ibcon#read 4, iclass 13, count 0 2006.229.22:16:31.89#ibcon#about to read 5, iclass 13, count 0 2006.229.22:16:31.89#ibcon#read 5, iclass 13, count 0 2006.229.22:16:31.89#ibcon#about to read 6, iclass 13, count 0 2006.229.22:16:31.89#ibcon#read 6, iclass 13, count 0 2006.229.22:16:31.89#ibcon#end of sib2, iclass 13, count 0 2006.229.22:16:31.89#ibcon#*after write, iclass 13, count 0 2006.229.22:16:31.89#ibcon#*before return 0, iclass 13, count 0 2006.229.22:16:31.89#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:31.89#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:31.89#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:16:31.89#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:16:31.89$vck44/valo=6,814.99 2006.229.22:16:31.89#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.22:16:31.89#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.22:16:31.89#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:31.89#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:31.89#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:31.89#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:31.89#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:16:31.89#ibcon#first serial, iclass 15, count 0 2006.229.22:16:31.89#ibcon#enter sib2, iclass 15, count 0 2006.229.22:16:31.89#ibcon#flushed, iclass 15, count 0 2006.229.22:16:31.89#ibcon#about to write, iclass 15, count 0 2006.229.22:16:31.89#ibcon#wrote, iclass 15, count 0 2006.229.22:16:31.89#ibcon#about to read 3, iclass 15, count 0 2006.229.22:16:31.91#ibcon#read 3, iclass 15, count 0 2006.229.22:16:31.91#ibcon#about to read 4, iclass 15, count 0 2006.229.22:16:31.91#ibcon#read 4, iclass 15, count 0 2006.229.22:16:31.91#ibcon#about to read 5, iclass 15, count 0 2006.229.22:16:31.91#ibcon#read 5, iclass 15, count 0 2006.229.22:16:31.91#ibcon#about to read 6, iclass 15, count 0 2006.229.22:16:31.91#ibcon#read 6, iclass 15, count 0 2006.229.22:16:31.91#ibcon#end of sib2, iclass 15, count 0 2006.229.22:16:31.91#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:16:31.91#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:16:31.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:16:31.91#ibcon#*before write, iclass 15, count 0 2006.229.22:16:31.91#ibcon#enter sib2, iclass 15, count 0 2006.229.22:16:31.91#ibcon#flushed, iclass 15, count 0 2006.229.22:16:31.91#ibcon#about to write, iclass 15, count 0 2006.229.22:16:31.91#ibcon#wrote, iclass 15, count 0 2006.229.22:16:31.91#ibcon#about to read 3, iclass 15, count 0 2006.229.22:16:31.95#ibcon#read 3, iclass 15, count 0 2006.229.22:16:31.95#ibcon#about to read 4, iclass 15, count 0 2006.229.22:16:31.95#ibcon#read 4, iclass 15, count 0 2006.229.22:16:31.95#ibcon#about to read 5, iclass 15, count 0 2006.229.22:16:31.95#ibcon#read 5, iclass 15, count 0 2006.229.22:16:31.95#ibcon#about to read 6, iclass 15, count 0 2006.229.22:16:31.95#ibcon#read 6, iclass 15, count 0 2006.229.22:16:31.95#ibcon#end of sib2, iclass 15, count 0 2006.229.22:16:31.95#ibcon#*after write, iclass 15, count 0 2006.229.22:16:31.95#ibcon#*before return 0, iclass 15, count 0 2006.229.22:16:31.95#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:31.95#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:31.95#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:16:31.95#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:16:31.95$vck44/va=6,4 2006.229.22:16:31.95#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.22:16:31.95#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.22:16:31.95#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:31.95#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:32.01#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:32.01#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:32.01#ibcon#enter wrdev, iclass 17, count 2 2006.229.22:16:32.01#ibcon#first serial, iclass 17, count 2 2006.229.22:16:32.01#ibcon#enter sib2, iclass 17, count 2 2006.229.22:16:32.01#ibcon#flushed, iclass 17, count 2 2006.229.22:16:32.01#ibcon#about to write, iclass 17, count 2 2006.229.22:16:32.01#ibcon#wrote, iclass 17, count 2 2006.229.22:16:32.01#ibcon#about to read 3, iclass 17, count 2 2006.229.22:16:32.03#ibcon#read 3, iclass 17, count 2 2006.229.22:16:32.03#ibcon#about to read 4, iclass 17, count 2 2006.229.22:16:32.03#ibcon#read 4, iclass 17, count 2 2006.229.22:16:32.03#ibcon#about to read 5, iclass 17, count 2 2006.229.22:16:32.03#ibcon#read 5, iclass 17, count 2 2006.229.22:16:32.03#ibcon#about to read 6, iclass 17, count 2 2006.229.22:16:32.03#ibcon#read 6, iclass 17, count 2 2006.229.22:16:32.03#ibcon#end of sib2, iclass 17, count 2 2006.229.22:16:32.03#ibcon#*mode == 0, iclass 17, count 2 2006.229.22:16:32.03#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.22:16:32.03#ibcon#[25=AT06-04\r\n] 2006.229.22:16:32.03#ibcon#*before write, iclass 17, count 2 2006.229.22:16:32.03#ibcon#enter sib2, iclass 17, count 2 2006.229.22:16:32.03#ibcon#flushed, iclass 17, count 2 2006.229.22:16:32.03#ibcon#about to write, iclass 17, count 2 2006.229.22:16:32.03#ibcon#wrote, iclass 17, count 2 2006.229.22:16:32.03#ibcon#about to read 3, iclass 17, count 2 2006.229.22:16:32.06#ibcon#read 3, iclass 17, count 2 2006.229.22:16:32.06#ibcon#about to read 4, iclass 17, count 2 2006.229.22:16:32.06#ibcon#read 4, iclass 17, count 2 2006.229.22:16:32.06#ibcon#about to read 5, iclass 17, count 2 2006.229.22:16:32.06#ibcon#read 5, iclass 17, count 2 2006.229.22:16:32.06#ibcon#about to read 6, iclass 17, count 2 2006.229.22:16:32.06#ibcon#read 6, iclass 17, count 2 2006.229.22:16:32.06#ibcon#end of sib2, iclass 17, count 2 2006.229.22:16:32.06#ibcon#*after write, iclass 17, count 2 2006.229.22:16:32.06#ibcon#*before return 0, iclass 17, count 2 2006.229.22:16:32.06#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:32.06#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:32.06#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.22:16:32.06#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:32.06#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:32.18#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:32.18#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:32.18#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:16:32.18#ibcon#first serial, iclass 17, count 0 2006.229.22:16:32.18#ibcon#enter sib2, iclass 17, count 0 2006.229.22:16:32.18#ibcon#flushed, iclass 17, count 0 2006.229.22:16:32.18#ibcon#about to write, iclass 17, count 0 2006.229.22:16:32.18#ibcon#wrote, iclass 17, count 0 2006.229.22:16:32.18#ibcon#about to read 3, iclass 17, count 0 2006.229.22:16:32.20#ibcon#read 3, iclass 17, count 0 2006.229.22:16:32.20#ibcon#about to read 4, iclass 17, count 0 2006.229.22:16:32.20#ibcon#read 4, iclass 17, count 0 2006.229.22:16:32.20#ibcon#about to read 5, iclass 17, count 0 2006.229.22:16:32.20#ibcon#read 5, iclass 17, count 0 2006.229.22:16:32.20#ibcon#about to read 6, iclass 17, count 0 2006.229.22:16:32.20#ibcon#read 6, iclass 17, count 0 2006.229.22:16:32.20#ibcon#end of sib2, iclass 17, count 0 2006.229.22:16:32.20#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:16:32.20#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:16:32.20#ibcon#[25=USB\r\n] 2006.229.22:16:32.20#ibcon#*before write, iclass 17, count 0 2006.229.22:16:32.20#ibcon#enter sib2, iclass 17, count 0 2006.229.22:16:32.20#ibcon#flushed, iclass 17, count 0 2006.229.22:16:32.20#ibcon#about to write, iclass 17, count 0 2006.229.22:16:32.20#ibcon#wrote, iclass 17, count 0 2006.229.22:16:32.20#ibcon#about to read 3, iclass 17, count 0 2006.229.22:16:32.23#ibcon#read 3, iclass 17, count 0 2006.229.22:16:32.23#ibcon#about to read 4, iclass 17, count 0 2006.229.22:16:32.23#ibcon#read 4, iclass 17, count 0 2006.229.22:16:32.23#ibcon#about to read 5, iclass 17, count 0 2006.229.22:16:32.23#ibcon#read 5, iclass 17, count 0 2006.229.22:16:32.23#ibcon#about to read 6, iclass 17, count 0 2006.229.22:16:32.23#ibcon#read 6, iclass 17, count 0 2006.229.22:16:32.23#ibcon#end of sib2, iclass 17, count 0 2006.229.22:16:32.23#ibcon#*after write, iclass 17, count 0 2006.229.22:16:32.23#ibcon#*before return 0, iclass 17, count 0 2006.229.22:16:32.23#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:32.23#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:32.23#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:16:32.23#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:16:32.23$vck44/valo=7,864.99 2006.229.22:16:32.23#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.22:16:32.23#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.22:16:32.23#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:32.23#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:32.23#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:32.23#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:32.23#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:16:32.23#ibcon#first serial, iclass 19, count 0 2006.229.22:16:32.23#ibcon#enter sib2, iclass 19, count 0 2006.229.22:16:32.23#ibcon#flushed, iclass 19, count 0 2006.229.22:16:32.23#ibcon#about to write, iclass 19, count 0 2006.229.22:16:32.23#ibcon#wrote, iclass 19, count 0 2006.229.22:16:32.23#ibcon#about to read 3, iclass 19, count 0 2006.229.22:16:32.25#ibcon#read 3, iclass 19, count 0 2006.229.22:16:32.25#ibcon#about to read 4, iclass 19, count 0 2006.229.22:16:32.25#ibcon#read 4, iclass 19, count 0 2006.229.22:16:32.25#ibcon#about to read 5, iclass 19, count 0 2006.229.22:16:32.25#ibcon#read 5, iclass 19, count 0 2006.229.22:16:32.25#ibcon#about to read 6, iclass 19, count 0 2006.229.22:16:32.25#ibcon#read 6, iclass 19, count 0 2006.229.22:16:32.25#ibcon#end of sib2, iclass 19, count 0 2006.229.22:16:32.25#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:16:32.25#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:16:32.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:16:32.25#ibcon#*before write, iclass 19, count 0 2006.229.22:16:32.25#ibcon#enter sib2, iclass 19, count 0 2006.229.22:16:32.25#ibcon#flushed, iclass 19, count 0 2006.229.22:16:32.25#ibcon#about to write, iclass 19, count 0 2006.229.22:16:32.25#ibcon#wrote, iclass 19, count 0 2006.229.22:16:32.25#ibcon#about to read 3, iclass 19, count 0 2006.229.22:16:32.29#ibcon#read 3, iclass 19, count 0 2006.229.22:16:32.29#ibcon#about to read 4, iclass 19, count 0 2006.229.22:16:32.29#ibcon#read 4, iclass 19, count 0 2006.229.22:16:32.29#ibcon#about to read 5, iclass 19, count 0 2006.229.22:16:32.29#ibcon#read 5, iclass 19, count 0 2006.229.22:16:32.29#ibcon#about to read 6, iclass 19, count 0 2006.229.22:16:32.29#ibcon#read 6, iclass 19, count 0 2006.229.22:16:32.29#ibcon#end of sib2, iclass 19, count 0 2006.229.22:16:32.29#ibcon#*after write, iclass 19, count 0 2006.229.22:16:32.29#ibcon#*before return 0, iclass 19, count 0 2006.229.22:16:32.29#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:32.29#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:32.29#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:16:32.29#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:16:32.29$vck44/va=7,5 2006.229.22:16:32.29#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.22:16:32.29#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.22:16:32.29#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:32.29#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:32.35#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:32.35#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:32.35#ibcon#enter wrdev, iclass 21, count 2 2006.229.22:16:32.35#ibcon#first serial, iclass 21, count 2 2006.229.22:16:32.35#ibcon#enter sib2, iclass 21, count 2 2006.229.22:16:32.35#ibcon#flushed, iclass 21, count 2 2006.229.22:16:32.35#ibcon#about to write, iclass 21, count 2 2006.229.22:16:32.35#ibcon#wrote, iclass 21, count 2 2006.229.22:16:32.35#ibcon#about to read 3, iclass 21, count 2 2006.229.22:16:32.37#ibcon#read 3, iclass 21, count 2 2006.229.22:16:32.37#ibcon#about to read 4, iclass 21, count 2 2006.229.22:16:32.37#ibcon#read 4, iclass 21, count 2 2006.229.22:16:32.37#ibcon#about to read 5, iclass 21, count 2 2006.229.22:16:32.37#ibcon#read 5, iclass 21, count 2 2006.229.22:16:32.37#ibcon#about to read 6, iclass 21, count 2 2006.229.22:16:32.37#ibcon#read 6, iclass 21, count 2 2006.229.22:16:32.37#ibcon#end of sib2, iclass 21, count 2 2006.229.22:16:32.37#ibcon#*mode == 0, iclass 21, count 2 2006.229.22:16:32.37#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.22:16:32.37#ibcon#[25=AT07-05\r\n] 2006.229.22:16:32.37#ibcon#*before write, iclass 21, count 2 2006.229.22:16:32.37#ibcon#enter sib2, iclass 21, count 2 2006.229.22:16:32.37#ibcon#flushed, iclass 21, count 2 2006.229.22:16:32.37#ibcon#about to write, iclass 21, count 2 2006.229.22:16:32.37#ibcon#wrote, iclass 21, count 2 2006.229.22:16:32.37#ibcon#about to read 3, iclass 21, count 2 2006.229.22:16:32.40#ibcon#read 3, iclass 21, count 2 2006.229.22:16:32.40#ibcon#about to read 4, iclass 21, count 2 2006.229.22:16:32.40#ibcon#read 4, iclass 21, count 2 2006.229.22:16:32.40#ibcon#about to read 5, iclass 21, count 2 2006.229.22:16:32.40#ibcon#read 5, iclass 21, count 2 2006.229.22:16:32.40#ibcon#about to read 6, iclass 21, count 2 2006.229.22:16:32.40#ibcon#read 6, iclass 21, count 2 2006.229.22:16:32.40#ibcon#end of sib2, iclass 21, count 2 2006.229.22:16:32.40#ibcon#*after write, iclass 21, count 2 2006.229.22:16:32.40#ibcon#*before return 0, iclass 21, count 2 2006.229.22:16:32.40#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:32.40#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:32.40#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.22:16:32.40#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:32.40#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:32.52#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:32.52#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:32.52#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:16:32.52#ibcon#first serial, iclass 21, count 0 2006.229.22:16:32.52#ibcon#enter sib2, iclass 21, count 0 2006.229.22:16:32.52#ibcon#flushed, iclass 21, count 0 2006.229.22:16:32.52#ibcon#about to write, iclass 21, count 0 2006.229.22:16:32.52#ibcon#wrote, iclass 21, count 0 2006.229.22:16:32.52#ibcon#about to read 3, iclass 21, count 0 2006.229.22:16:32.54#ibcon#read 3, iclass 21, count 0 2006.229.22:16:32.54#ibcon#about to read 4, iclass 21, count 0 2006.229.22:16:32.54#ibcon#read 4, iclass 21, count 0 2006.229.22:16:32.54#ibcon#about to read 5, iclass 21, count 0 2006.229.22:16:32.54#ibcon#read 5, iclass 21, count 0 2006.229.22:16:32.54#ibcon#about to read 6, iclass 21, count 0 2006.229.22:16:32.54#ibcon#read 6, iclass 21, count 0 2006.229.22:16:32.54#ibcon#end of sib2, iclass 21, count 0 2006.229.22:16:32.54#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:16:32.54#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:16:32.54#ibcon#[25=USB\r\n] 2006.229.22:16:32.54#ibcon#*before write, iclass 21, count 0 2006.229.22:16:32.54#ibcon#enter sib2, iclass 21, count 0 2006.229.22:16:32.54#ibcon#flushed, iclass 21, count 0 2006.229.22:16:32.54#ibcon#about to write, iclass 21, count 0 2006.229.22:16:32.54#ibcon#wrote, iclass 21, count 0 2006.229.22:16:32.54#ibcon#about to read 3, iclass 21, count 0 2006.229.22:16:32.57#ibcon#read 3, iclass 21, count 0 2006.229.22:16:32.57#ibcon#about to read 4, iclass 21, count 0 2006.229.22:16:32.57#ibcon#read 4, iclass 21, count 0 2006.229.22:16:32.57#ibcon#about to read 5, iclass 21, count 0 2006.229.22:16:32.57#ibcon#read 5, iclass 21, count 0 2006.229.22:16:32.57#ibcon#about to read 6, iclass 21, count 0 2006.229.22:16:32.57#ibcon#read 6, iclass 21, count 0 2006.229.22:16:32.57#ibcon#end of sib2, iclass 21, count 0 2006.229.22:16:32.57#ibcon#*after write, iclass 21, count 0 2006.229.22:16:32.57#ibcon#*before return 0, iclass 21, count 0 2006.229.22:16:32.57#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:32.57#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:32.57#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:16:32.57#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:16:32.57$vck44/valo=8,884.99 2006.229.22:16:32.57#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.22:16:32.57#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.22:16:32.57#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:32.57#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:32.57#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:32.57#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:32.57#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:16:32.57#ibcon#first serial, iclass 23, count 0 2006.229.22:16:32.57#ibcon#enter sib2, iclass 23, count 0 2006.229.22:16:32.57#ibcon#flushed, iclass 23, count 0 2006.229.22:16:32.57#ibcon#about to write, iclass 23, count 0 2006.229.22:16:32.57#ibcon#wrote, iclass 23, count 0 2006.229.22:16:32.57#ibcon#about to read 3, iclass 23, count 0 2006.229.22:16:32.59#ibcon#read 3, iclass 23, count 0 2006.229.22:16:32.59#ibcon#about to read 4, iclass 23, count 0 2006.229.22:16:32.59#ibcon#read 4, iclass 23, count 0 2006.229.22:16:32.59#ibcon#about to read 5, iclass 23, count 0 2006.229.22:16:32.59#ibcon#read 5, iclass 23, count 0 2006.229.22:16:32.59#ibcon#about to read 6, iclass 23, count 0 2006.229.22:16:32.59#ibcon#read 6, iclass 23, count 0 2006.229.22:16:32.59#ibcon#end of sib2, iclass 23, count 0 2006.229.22:16:32.59#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:16:32.59#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:16:32.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:16:32.59#ibcon#*before write, iclass 23, count 0 2006.229.22:16:32.59#ibcon#enter sib2, iclass 23, count 0 2006.229.22:16:32.59#ibcon#flushed, iclass 23, count 0 2006.229.22:16:32.59#ibcon#about to write, iclass 23, count 0 2006.229.22:16:32.59#ibcon#wrote, iclass 23, count 0 2006.229.22:16:32.59#ibcon#about to read 3, iclass 23, count 0 2006.229.22:16:32.63#ibcon#read 3, iclass 23, count 0 2006.229.22:16:32.63#ibcon#about to read 4, iclass 23, count 0 2006.229.22:16:32.63#ibcon#read 4, iclass 23, count 0 2006.229.22:16:32.63#ibcon#about to read 5, iclass 23, count 0 2006.229.22:16:32.63#ibcon#read 5, iclass 23, count 0 2006.229.22:16:32.63#ibcon#about to read 6, iclass 23, count 0 2006.229.22:16:32.63#ibcon#read 6, iclass 23, count 0 2006.229.22:16:32.63#ibcon#end of sib2, iclass 23, count 0 2006.229.22:16:32.63#ibcon#*after write, iclass 23, count 0 2006.229.22:16:32.63#ibcon#*before return 0, iclass 23, count 0 2006.229.22:16:32.63#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:32.63#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:32.63#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:16:32.63#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:16:32.63$vck44/va=8,6 2006.229.22:16:32.63#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.22:16:32.63#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.22:16:32.63#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:32.63#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:16:32.69#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:16:32.69#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:16:32.69#ibcon#enter wrdev, iclass 25, count 2 2006.229.22:16:32.69#ibcon#first serial, iclass 25, count 2 2006.229.22:16:32.69#ibcon#enter sib2, iclass 25, count 2 2006.229.22:16:32.69#ibcon#flushed, iclass 25, count 2 2006.229.22:16:32.69#ibcon#about to write, iclass 25, count 2 2006.229.22:16:32.69#ibcon#wrote, iclass 25, count 2 2006.229.22:16:32.69#ibcon#about to read 3, iclass 25, count 2 2006.229.22:16:32.71#ibcon#read 3, iclass 25, count 2 2006.229.22:16:32.71#ibcon#about to read 4, iclass 25, count 2 2006.229.22:16:32.71#ibcon#read 4, iclass 25, count 2 2006.229.22:16:32.71#ibcon#about to read 5, iclass 25, count 2 2006.229.22:16:32.71#ibcon#read 5, iclass 25, count 2 2006.229.22:16:32.71#ibcon#about to read 6, iclass 25, count 2 2006.229.22:16:32.71#ibcon#read 6, iclass 25, count 2 2006.229.22:16:32.71#ibcon#end of sib2, iclass 25, count 2 2006.229.22:16:32.71#ibcon#*mode == 0, iclass 25, count 2 2006.229.22:16:32.71#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.22:16:32.71#ibcon#[25=AT08-06\r\n] 2006.229.22:16:32.71#ibcon#*before write, iclass 25, count 2 2006.229.22:16:32.71#ibcon#enter sib2, iclass 25, count 2 2006.229.22:16:32.71#ibcon#flushed, iclass 25, count 2 2006.229.22:16:32.71#ibcon#about to write, iclass 25, count 2 2006.229.22:16:32.71#ibcon#wrote, iclass 25, count 2 2006.229.22:16:32.71#ibcon#about to read 3, iclass 25, count 2 2006.229.22:16:32.74#ibcon#read 3, iclass 25, count 2 2006.229.22:16:32.74#ibcon#about to read 4, iclass 25, count 2 2006.229.22:16:32.74#ibcon#read 4, iclass 25, count 2 2006.229.22:16:32.74#ibcon#about to read 5, iclass 25, count 2 2006.229.22:16:32.74#ibcon#read 5, iclass 25, count 2 2006.229.22:16:32.74#ibcon#about to read 6, iclass 25, count 2 2006.229.22:16:32.74#ibcon#read 6, iclass 25, count 2 2006.229.22:16:32.74#ibcon#end of sib2, iclass 25, count 2 2006.229.22:16:32.74#ibcon#*after write, iclass 25, count 2 2006.229.22:16:32.74#ibcon#*before return 0, iclass 25, count 2 2006.229.22:16:32.74#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:16:32.74#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:16:32.74#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.22:16:32.74#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:32.74#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:16:32.86#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:16:32.86#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:16:32.86#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:16:32.86#ibcon#first serial, iclass 25, count 0 2006.229.22:16:32.86#ibcon#enter sib2, iclass 25, count 0 2006.229.22:16:32.86#ibcon#flushed, iclass 25, count 0 2006.229.22:16:32.86#ibcon#about to write, iclass 25, count 0 2006.229.22:16:32.86#ibcon#wrote, iclass 25, count 0 2006.229.22:16:32.86#ibcon#about to read 3, iclass 25, count 0 2006.229.22:16:32.88#ibcon#read 3, iclass 25, count 0 2006.229.22:16:32.88#ibcon#about to read 4, iclass 25, count 0 2006.229.22:16:32.88#ibcon#read 4, iclass 25, count 0 2006.229.22:16:32.88#ibcon#about to read 5, iclass 25, count 0 2006.229.22:16:32.88#ibcon#read 5, iclass 25, count 0 2006.229.22:16:32.88#ibcon#about to read 6, iclass 25, count 0 2006.229.22:16:32.88#ibcon#read 6, iclass 25, count 0 2006.229.22:16:32.88#ibcon#end of sib2, iclass 25, count 0 2006.229.22:16:32.88#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:16:32.88#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:16:32.88#ibcon#[25=USB\r\n] 2006.229.22:16:32.88#ibcon#*before write, iclass 25, count 0 2006.229.22:16:32.88#ibcon#enter sib2, iclass 25, count 0 2006.229.22:16:32.88#ibcon#flushed, iclass 25, count 0 2006.229.22:16:32.88#ibcon#about to write, iclass 25, count 0 2006.229.22:16:32.88#ibcon#wrote, iclass 25, count 0 2006.229.22:16:32.88#ibcon#about to read 3, iclass 25, count 0 2006.229.22:16:32.91#ibcon#read 3, iclass 25, count 0 2006.229.22:16:32.91#ibcon#about to read 4, iclass 25, count 0 2006.229.22:16:32.91#ibcon#read 4, iclass 25, count 0 2006.229.22:16:32.91#ibcon#about to read 5, iclass 25, count 0 2006.229.22:16:32.91#ibcon#read 5, iclass 25, count 0 2006.229.22:16:32.91#ibcon#about to read 6, iclass 25, count 0 2006.229.22:16:32.91#ibcon#read 6, iclass 25, count 0 2006.229.22:16:32.91#ibcon#end of sib2, iclass 25, count 0 2006.229.22:16:32.91#ibcon#*after write, iclass 25, count 0 2006.229.22:16:32.91#ibcon#*before return 0, iclass 25, count 0 2006.229.22:16:32.91#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:16:32.91#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:16:32.91#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:16:32.91#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:16:32.91$vck44/vblo=1,629.99 2006.229.22:16:32.91#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.22:16:32.91#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.22:16:32.91#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:32.91#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:16:32.91#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:16:32.91#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:16:32.91#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:16:32.91#ibcon#first serial, iclass 27, count 0 2006.229.22:16:32.91#ibcon#enter sib2, iclass 27, count 0 2006.229.22:16:32.91#ibcon#flushed, iclass 27, count 0 2006.229.22:16:32.91#ibcon#about to write, iclass 27, count 0 2006.229.22:16:32.91#ibcon#wrote, iclass 27, count 0 2006.229.22:16:32.91#ibcon#about to read 3, iclass 27, count 0 2006.229.22:16:32.93#ibcon#read 3, iclass 27, count 0 2006.229.22:16:32.93#ibcon#about to read 4, iclass 27, count 0 2006.229.22:16:32.93#ibcon#read 4, iclass 27, count 0 2006.229.22:16:32.93#ibcon#about to read 5, iclass 27, count 0 2006.229.22:16:32.93#ibcon#read 5, iclass 27, count 0 2006.229.22:16:32.93#ibcon#about to read 6, iclass 27, count 0 2006.229.22:16:32.93#ibcon#read 6, iclass 27, count 0 2006.229.22:16:32.93#ibcon#end of sib2, iclass 27, count 0 2006.229.22:16:32.93#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:16:32.93#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:16:32.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:16:32.93#ibcon#*before write, iclass 27, count 0 2006.229.22:16:32.93#ibcon#enter sib2, iclass 27, count 0 2006.229.22:16:32.93#ibcon#flushed, iclass 27, count 0 2006.229.22:16:32.93#ibcon#about to write, iclass 27, count 0 2006.229.22:16:32.93#ibcon#wrote, iclass 27, count 0 2006.229.22:16:32.93#ibcon#about to read 3, iclass 27, count 0 2006.229.22:16:32.97#ibcon#read 3, iclass 27, count 0 2006.229.22:16:32.97#ibcon#about to read 4, iclass 27, count 0 2006.229.22:16:32.97#ibcon#read 4, iclass 27, count 0 2006.229.22:16:32.97#ibcon#about to read 5, iclass 27, count 0 2006.229.22:16:32.97#ibcon#read 5, iclass 27, count 0 2006.229.22:16:32.97#ibcon#about to read 6, iclass 27, count 0 2006.229.22:16:32.97#ibcon#read 6, iclass 27, count 0 2006.229.22:16:32.97#ibcon#end of sib2, iclass 27, count 0 2006.229.22:16:32.97#ibcon#*after write, iclass 27, count 0 2006.229.22:16:32.97#ibcon#*before return 0, iclass 27, count 0 2006.229.22:16:32.97#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:16:32.97#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:16:32.97#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:16:32.97#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:16:32.97$vck44/vb=1,4 2006.229.22:16:32.97#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.22:16:32.97#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.22:16:32.97#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:32.97#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:16:32.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:16:32.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:16:32.97#ibcon#enter wrdev, iclass 29, count 2 2006.229.22:16:32.97#ibcon#first serial, iclass 29, count 2 2006.229.22:16:32.97#ibcon#enter sib2, iclass 29, count 2 2006.229.22:16:32.97#ibcon#flushed, iclass 29, count 2 2006.229.22:16:32.97#ibcon#about to write, iclass 29, count 2 2006.229.22:16:32.97#ibcon#wrote, iclass 29, count 2 2006.229.22:16:32.97#ibcon#about to read 3, iclass 29, count 2 2006.229.22:16:32.99#ibcon#read 3, iclass 29, count 2 2006.229.22:16:32.99#ibcon#about to read 4, iclass 29, count 2 2006.229.22:16:32.99#ibcon#read 4, iclass 29, count 2 2006.229.22:16:32.99#ibcon#about to read 5, iclass 29, count 2 2006.229.22:16:32.99#ibcon#read 5, iclass 29, count 2 2006.229.22:16:32.99#ibcon#about to read 6, iclass 29, count 2 2006.229.22:16:32.99#ibcon#read 6, iclass 29, count 2 2006.229.22:16:32.99#ibcon#end of sib2, iclass 29, count 2 2006.229.22:16:32.99#ibcon#*mode == 0, iclass 29, count 2 2006.229.22:16:32.99#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.22:16:32.99#ibcon#[27=AT01-04\r\n] 2006.229.22:16:32.99#ibcon#*before write, iclass 29, count 2 2006.229.22:16:32.99#ibcon#enter sib2, iclass 29, count 2 2006.229.22:16:32.99#ibcon#flushed, iclass 29, count 2 2006.229.22:16:32.99#ibcon#about to write, iclass 29, count 2 2006.229.22:16:32.99#ibcon#wrote, iclass 29, count 2 2006.229.22:16:32.99#ibcon#about to read 3, iclass 29, count 2 2006.229.22:16:33.02#ibcon#read 3, iclass 29, count 2 2006.229.22:16:33.02#ibcon#about to read 4, iclass 29, count 2 2006.229.22:16:33.02#ibcon#read 4, iclass 29, count 2 2006.229.22:16:33.02#ibcon#about to read 5, iclass 29, count 2 2006.229.22:16:33.02#ibcon#read 5, iclass 29, count 2 2006.229.22:16:33.02#ibcon#about to read 6, iclass 29, count 2 2006.229.22:16:33.02#ibcon#read 6, iclass 29, count 2 2006.229.22:16:33.02#ibcon#end of sib2, iclass 29, count 2 2006.229.22:16:33.02#ibcon#*after write, iclass 29, count 2 2006.229.22:16:33.02#ibcon#*before return 0, iclass 29, count 2 2006.229.22:16:33.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:16:33.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:16:33.02#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.22:16:33.02#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:33.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:16:33.14#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:16:33.14#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:16:33.14#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:16:33.14#ibcon#first serial, iclass 29, count 0 2006.229.22:16:33.14#ibcon#enter sib2, iclass 29, count 0 2006.229.22:16:33.14#ibcon#flushed, iclass 29, count 0 2006.229.22:16:33.14#ibcon#about to write, iclass 29, count 0 2006.229.22:16:33.14#ibcon#wrote, iclass 29, count 0 2006.229.22:16:33.14#ibcon#about to read 3, iclass 29, count 0 2006.229.22:16:33.16#ibcon#read 3, iclass 29, count 0 2006.229.22:16:33.16#ibcon#about to read 4, iclass 29, count 0 2006.229.22:16:33.16#ibcon#read 4, iclass 29, count 0 2006.229.22:16:33.16#ibcon#about to read 5, iclass 29, count 0 2006.229.22:16:33.16#ibcon#read 5, iclass 29, count 0 2006.229.22:16:33.16#ibcon#about to read 6, iclass 29, count 0 2006.229.22:16:33.16#ibcon#read 6, iclass 29, count 0 2006.229.22:16:33.16#ibcon#end of sib2, iclass 29, count 0 2006.229.22:16:33.16#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:16:33.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:16:33.16#ibcon#[27=USB\r\n] 2006.229.22:16:33.16#ibcon#*before write, iclass 29, count 0 2006.229.22:16:33.16#ibcon#enter sib2, iclass 29, count 0 2006.229.22:16:33.16#ibcon#flushed, iclass 29, count 0 2006.229.22:16:33.16#ibcon#about to write, iclass 29, count 0 2006.229.22:16:33.16#ibcon#wrote, iclass 29, count 0 2006.229.22:16:33.16#ibcon#about to read 3, iclass 29, count 0 2006.229.22:16:33.19#ibcon#read 3, iclass 29, count 0 2006.229.22:16:33.19#ibcon#about to read 4, iclass 29, count 0 2006.229.22:16:33.19#ibcon#read 4, iclass 29, count 0 2006.229.22:16:33.19#ibcon#about to read 5, iclass 29, count 0 2006.229.22:16:33.19#ibcon#read 5, iclass 29, count 0 2006.229.22:16:33.19#ibcon#about to read 6, iclass 29, count 0 2006.229.22:16:33.19#ibcon#read 6, iclass 29, count 0 2006.229.22:16:33.19#ibcon#end of sib2, iclass 29, count 0 2006.229.22:16:33.19#ibcon#*after write, iclass 29, count 0 2006.229.22:16:33.19#ibcon#*before return 0, iclass 29, count 0 2006.229.22:16:33.19#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:16:33.19#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:16:33.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:16:33.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:16:33.19$vck44/vblo=2,634.99 2006.229.22:16:33.19#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:16:33.19#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:16:33.19#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:33.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:33.19#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:33.19#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:33.19#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:16:33.19#ibcon#first serial, iclass 31, count 0 2006.229.22:16:33.19#ibcon#enter sib2, iclass 31, count 0 2006.229.22:16:33.19#ibcon#flushed, iclass 31, count 0 2006.229.22:16:33.19#ibcon#about to write, iclass 31, count 0 2006.229.22:16:33.19#ibcon#wrote, iclass 31, count 0 2006.229.22:16:33.19#ibcon#about to read 3, iclass 31, count 0 2006.229.22:16:33.21#ibcon#read 3, iclass 31, count 0 2006.229.22:16:33.21#ibcon#about to read 4, iclass 31, count 0 2006.229.22:16:33.21#ibcon#read 4, iclass 31, count 0 2006.229.22:16:33.21#ibcon#about to read 5, iclass 31, count 0 2006.229.22:16:33.21#ibcon#read 5, iclass 31, count 0 2006.229.22:16:33.21#ibcon#about to read 6, iclass 31, count 0 2006.229.22:16:33.21#ibcon#read 6, iclass 31, count 0 2006.229.22:16:33.21#ibcon#end of sib2, iclass 31, count 0 2006.229.22:16:33.21#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:16:33.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:16:33.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:16:33.21#ibcon#*before write, iclass 31, count 0 2006.229.22:16:33.21#ibcon#enter sib2, iclass 31, count 0 2006.229.22:16:33.21#ibcon#flushed, iclass 31, count 0 2006.229.22:16:33.21#ibcon#about to write, iclass 31, count 0 2006.229.22:16:33.21#ibcon#wrote, iclass 31, count 0 2006.229.22:16:33.21#ibcon#about to read 3, iclass 31, count 0 2006.229.22:16:33.25#ibcon#read 3, iclass 31, count 0 2006.229.22:16:33.25#ibcon#about to read 4, iclass 31, count 0 2006.229.22:16:33.25#ibcon#read 4, iclass 31, count 0 2006.229.22:16:33.25#ibcon#about to read 5, iclass 31, count 0 2006.229.22:16:33.25#ibcon#read 5, iclass 31, count 0 2006.229.22:16:33.25#ibcon#about to read 6, iclass 31, count 0 2006.229.22:16:33.25#ibcon#read 6, iclass 31, count 0 2006.229.22:16:33.25#ibcon#end of sib2, iclass 31, count 0 2006.229.22:16:33.25#ibcon#*after write, iclass 31, count 0 2006.229.22:16:33.25#ibcon#*before return 0, iclass 31, count 0 2006.229.22:16:33.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:33.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:16:33.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:16:33.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:16:33.25$vck44/vb=2,4 2006.229.22:16:33.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.22:16:33.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.22:16:33.25#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:33.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:33.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:33.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:33.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.22:16:33.31#ibcon#first serial, iclass 33, count 2 2006.229.22:16:33.31#ibcon#enter sib2, iclass 33, count 2 2006.229.22:16:33.31#ibcon#flushed, iclass 33, count 2 2006.229.22:16:33.31#ibcon#about to write, iclass 33, count 2 2006.229.22:16:33.31#ibcon#wrote, iclass 33, count 2 2006.229.22:16:33.31#ibcon#about to read 3, iclass 33, count 2 2006.229.22:16:33.33#ibcon#read 3, iclass 33, count 2 2006.229.22:16:33.33#ibcon#about to read 4, iclass 33, count 2 2006.229.22:16:33.33#ibcon#read 4, iclass 33, count 2 2006.229.22:16:33.33#ibcon#about to read 5, iclass 33, count 2 2006.229.22:16:33.33#ibcon#read 5, iclass 33, count 2 2006.229.22:16:33.33#ibcon#about to read 6, iclass 33, count 2 2006.229.22:16:33.33#ibcon#read 6, iclass 33, count 2 2006.229.22:16:33.33#ibcon#end of sib2, iclass 33, count 2 2006.229.22:16:33.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.22:16:33.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.22:16:33.33#ibcon#[27=AT02-04\r\n] 2006.229.22:16:33.33#ibcon#*before write, iclass 33, count 2 2006.229.22:16:33.33#ibcon#enter sib2, iclass 33, count 2 2006.229.22:16:33.33#ibcon#flushed, iclass 33, count 2 2006.229.22:16:33.33#ibcon#about to write, iclass 33, count 2 2006.229.22:16:33.33#ibcon#wrote, iclass 33, count 2 2006.229.22:16:33.33#ibcon#about to read 3, iclass 33, count 2 2006.229.22:16:33.36#ibcon#read 3, iclass 33, count 2 2006.229.22:16:33.36#ibcon#about to read 4, iclass 33, count 2 2006.229.22:16:33.36#ibcon#read 4, iclass 33, count 2 2006.229.22:16:33.36#ibcon#about to read 5, iclass 33, count 2 2006.229.22:16:33.36#ibcon#read 5, iclass 33, count 2 2006.229.22:16:33.36#ibcon#about to read 6, iclass 33, count 2 2006.229.22:16:33.36#ibcon#read 6, iclass 33, count 2 2006.229.22:16:33.36#ibcon#end of sib2, iclass 33, count 2 2006.229.22:16:33.36#ibcon#*after write, iclass 33, count 2 2006.229.22:16:33.36#ibcon#*before return 0, iclass 33, count 2 2006.229.22:16:33.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:33.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:16:33.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.22:16:33.36#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:33.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:33.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:33.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:33.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:16:33.48#ibcon#first serial, iclass 33, count 0 2006.229.22:16:33.48#ibcon#enter sib2, iclass 33, count 0 2006.229.22:16:33.48#ibcon#flushed, iclass 33, count 0 2006.229.22:16:33.48#ibcon#about to write, iclass 33, count 0 2006.229.22:16:33.48#ibcon#wrote, iclass 33, count 0 2006.229.22:16:33.48#ibcon#about to read 3, iclass 33, count 0 2006.229.22:16:33.50#ibcon#read 3, iclass 33, count 0 2006.229.22:16:33.50#ibcon#about to read 4, iclass 33, count 0 2006.229.22:16:33.50#ibcon#read 4, iclass 33, count 0 2006.229.22:16:33.50#ibcon#about to read 5, iclass 33, count 0 2006.229.22:16:33.50#ibcon#read 5, iclass 33, count 0 2006.229.22:16:33.50#ibcon#about to read 6, iclass 33, count 0 2006.229.22:16:33.50#ibcon#read 6, iclass 33, count 0 2006.229.22:16:33.50#ibcon#end of sib2, iclass 33, count 0 2006.229.22:16:33.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:16:33.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:16:33.50#ibcon#[27=USB\r\n] 2006.229.22:16:33.50#ibcon#*before write, iclass 33, count 0 2006.229.22:16:33.50#ibcon#enter sib2, iclass 33, count 0 2006.229.22:16:33.50#ibcon#flushed, iclass 33, count 0 2006.229.22:16:33.50#ibcon#about to write, iclass 33, count 0 2006.229.22:16:33.50#ibcon#wrote, iclass 33, count 0 2006.229.22:16:33.50#ibcon#about to read 3, iclass 33, count 0 2006.229.22:16:33.53#ibcon#read 3, iclass 33, count 0 2006.229.22:16:33.53#ibcon#about to read 4, iclass 33, count 0 2006.229.22:16:33.53#ibcon#read 4, iclass 33, count 0 2006.229.22:16:33.53#ibcon#about to read 5, iclass 33, count 0 2006.229.22:16:33.53#ibcon#read 5, iclass 33, count 0 2006.229.22:16:33.53#ibcon#about to read 6, iclass 33, count 0 2006.229.22:16:33.53#ibcon#read 6, iclass 33, count 0 2006.229.22:16:33.53#ibcon#end of sib2, iclass 33, count 0 2006.229.22:16:33.53#ibcon#*after write, iclass 33, count 0 2006.229.22:16:33.53#ibcon#*before return 0, iclass 33, count 0 2006.229.22:16:33.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:33.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:16:33.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:16:33.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:16:33.53$vck44/vblo=3,649.99 2006.229.22:16:33.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.22:16:33.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.22:16:33.53#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:33.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:33.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:33.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:33.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:16:33.53#ibcon#first serial, iclass 35, count 0 2006.229.22:16:33.53#ibcon#enter sib2, iclass 35, count 0 2006.229.22:16:33.53#ibcon#flushed, iclass 35, count 0 2006.229.22:16:33.53#ibcon#about to write, iclass 35, count 0 2006.229.22:16:33.53#ibcon#wrote, iclass 35, count 0 2006.229.22:16:33.53#ibcon#about to read 3, iclass 35, count 0 2006.229.22:16:33.55#ibcon#read 3, iclass 35, count 0 2006.229.22:16:33.55#ibcon#about to read 4, iclass 35, count 0 2006.229.22:16:33.55#ibcon#read 4, iclass 35, count 0 2006.229.22:16:33.55#ibcon#about to read 5, iclass 35, count 0 2006.229.22:16:33.55#ibcon#read 5, iclass 35, count 0 2006.229.22:16:33.55#ibcon#about to read 6, iclass 35, count 0 2006.229.22:16:33.55#ibcon#read 6, iclass 35, count 0 2006.229.22:16:33.55#ibcon#end of sib2, iclass 35, count 0 2006.229.22:16:33.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:16:33.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:16:33.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:16:33.55#ibcon#*before write, iclass 35, count 0 2006.229.22:16:33.55#ibcon#enter sib2, iclass 35, count 0 2006.229.22:16:33.55#ibcon#flushed, iclass 35, count 0 2006.229.22:16:33.55#ibcon#about to write, iclass 35, count 0 2006.229.22:16:33.55#ibcon#wrote, iclass 35, count 0 2006.229.22:16:33.55#ibcon#about to read 3, iclass 35, count 0 2006.229.22:16:33.59#ibcon#read 3, iclass 35, count 0 2006.229.22:16:33.59#ibcon#about to read 4, iclass 35, count 0 2006.229.22:16:33.59#ibcon#read 4, iclass 35, count 0 2006.229.22:16:33.59#ibcon#about to read 5, iclass 35, count 0 2006.229.22:16:33.59#ibcon#read 5, iclass 35, count 0 2006.229.22:16:33.59#ibcon#about to read 6, iclass 35, count 0 2006.229.22:16:33.59#ibcon#read 6, iclass 35, count 0 2006.229.22:16:33.59#ibcon#end of sib2, iclass 35, count 0 2006.229.22:16:33.59#ibcon#*after write, iclass 35, count 0 2006.229.22:16:33.59#ibcon#*before return 0, iclass 35, count 0 2006.229.22:16:33.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:33.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:16:33.59#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:16:33.59#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:16:33.59$vck44/vb=3,4 2006.229.22:16:33.59#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.22:16:33.59#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.22:16:33.59#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:33.59#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:33.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:33.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:33.65#ibcon#enter wrdev, iclass 37, count 2 2006.229.22:16:33.65#ibcon#first serial, iclass 37, count 2 2006.229.22:16:33.65#ibcon#enter sib2, iclass 37, count 2 2006.229.22:16:33.65#ibcon#flushed, iclass 37, count 2 2006.229.22:16:33.65#ibcon#about to write, iclass 37, count 2 2006.229.22:16:33.65#ibcon#wrote, iclass 37, count 2 2006.229.22:16:33.65#ibcon#about to read 3, iclass 37, count 2 2006.229.22:16:33.67#ibcon#read 3, iclass 37, count 2 2006.229.22:16:33.67#ibcon#about to read 4, iclass 37, count 2 2006.229.22:16:33.67#ibcon#read 4, iclass 37, count 2 2006.229.22:16:33.67#ibcon#about to read 5, iclass 37, count 2 2006.229.22:16:33.67#ibcon#read 5, iclass 37, count 2 2006.229.22:16:33.67#ibcon#about to read 6, iclass 37, count 2 2006.229.22:16:33.67#ibcon#read 6, iclass 37, count 2 2006.229.22:16:33.67#ibcon#end of sib2, iclass 37, count 2 2006.229.22:16:33.67#ibcon#*mode == 0, iclass 37, count 2 2006.229.22:16:33.67#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.22:16:33.67#ibcon#[27=AT03-04\r\n] 2006.229.22:16:33.67#ibcon#*before write, iclass 37, count 2 2006.229.22:16:33.67#ibcon#enter sib2, iclass 37, count 2 2006.229.22:16:33.67#ibcon#flushed, iclass 37, count 2 2006.229.22:16:33.67#ibcon#about to write, iclass 37, count 2 2006.229.22:16:33.67#ibcon#wrote, iclass 37, count 2 2006.229.22:16:33.67#ibcon#about to read 3, iclass 37, count 2 2006.229.22:16:33.70#ibcon#read 3, iclass 37, count 2 2006.229.22:16:33.70#ibcon#about to read 4, iclass 37, count 2 2006.229.22:16:33.70#ibcon#read 4, iclass 37, count 2 2006.229.22:16:33.70#ibcon#about to read 5, iclass 37, count 2 2006.229.22:16:33.70#ibcon#read 5, iclass 37, count 2 2006.229.22:16:33.70#ibcon#about to read 6, iclass 37, count 2 2006.229.22:16:33.70#ibcon#read 6, iclass 37, count 2 2006.229.22:16:33.70#ibcon#end of sib2, iclass 37, count 2 2006.229.22:16:33.70#ibcon#*after write, iclass 37, count 2 2006.229.22:16:33.70#ibcon#*before return 0, iclass 37, count 2 2006.229.22:16:33.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:33.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:16:33.70#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.22:16:33.70#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:33.70#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:33.82#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:33.82#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:33.82#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:16:33.82#ibcon#first serial, iclass 37, count 0 2006.229.22:16:33.82#ibcon#enter sib2, iclass 37, count 0 2006.229.22:16:33.82#ibcon#flushed, iclass 37, count 0 2006.229.22:16:33.82#ibcon#about to write, iclass 37, count 0 2006.229.22:16:33.82#ibcon#wrote, iclass 37, count 0 2006.229.22:16:33.82#ibcon#about to read 3, iclass 37, count 0 2006.229.22:16:33.84#ibcon#read 3, iclass 37, count 0 2006.229.22:16:33.84#ibcon#about to read 4, iclass 37, count 0 2006.229.22:16:33.84#ibcon#read 4, iclass 37, count 0 2006.229.22:16:33.84#ibcon#about to read 5, iclass 37, count 0 2006.229.22:16:33.84#ibcon#read 5, iclass 37, count 0 2006.229.22:16:33.84#ibcon#about to read 6, iclass 37, count 0 2006.229.22:16:33.84#ibcon#read 6, iclass 37, count 0 2006.229.22:16:33.84#ibcon#end of sib2, iclass 37, count 0 2006.229.22:16:33.84#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:16:33.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:16:33.84#ibcon#[27=USB\r\n] 2006.229.22:16:33.84#ibcon#*before write, iclass 37, count 0 2006.229.22:16:33.84#ibcon#enter sib2, iclass 37, count 0 2006.229.22:16:33.84#ibcon#flushed, iclass 37, count 0 2006.229.22:16:33.84#ibcon#about to write, iclass 37, count 0 2006.229.22:16:33.84#ibcon#wrote, iclass 37, count 0 2006.229.22:16:33.84#ibcon#about to read 3, iclass 37, count 0 2006.229.22:16:33.87#ibcon#read 3, iclass 37, count 0 2006.229.22:16:33.87#ibcon#about to read 4, iclass 37, count 0 2006.229.22:16:33.87#ibcon#read 4, iclass 37, count 0 2006.229.22:16:33.87#ibcon#about to read 5, iclass 37, count 0 2006.229.22:16:33.87#ibcon#read 5, iclass 37, count 0 2006.229.22:16:33.87#ibcon#about to read 6, iclass 37, count 0 2006.229.22:16:33.87#ibcon#read 6, iclass 37, count 0 2006.229.22:16:33.87#ibcon#end of sib2, iclass 37, count 0 2006.229.22:16:33.87#ibcon#*after write, iclass 37, count 0 2006.229.22:16:33.87#ibcon#*before return 0, iclass 37, count 0 2006.229.22:16:33.87#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:33.87#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:16:33.87#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:16:33.87#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:16:33.87$vck44/vblo=4,679.99 2006.229.22:16:33.87#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.22:16:33.87#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.22:16:33.87#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:33.87#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:33.87#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:33.87#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:33.87#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:16:33.87#ibcon#first serial, iclass 39, count 0 2006.229.22:16:33.87#ibcon#enter sib2, iclass 39, count 0 2006.229.22:16:33.87#ibcon#flushed, iclass 39, count 0 2006.229.22:16:33.87#ibcon#about to write, iclass 39, count 0 2006.229.22:16:33.87#ibcon#wrote, iclass 39, count 0 2006.229.22:16:33.87#ibcon#about to read 3, iclass 39, count 0 2006.229.22:16:33.89#ibcon#read 3, iclass 39, count 0 2006.229.22:16:33.89#ibcon#about to read 4, iclass 39, count 0 2006.229.22:16:33.89#ibcon#read 4, iclass 39, count 0 2006.229.22:16:33.89#ibcon#about to read 5, iclass 39, count 0 2006.229.22:16:33.89#ibcon#read 5, iclass 39, count 0 2006.229.22:16:33.89#ibcon#about to read 6, iclass 39, count 0 2006.229.22:16:33.89#ibcon#read 6, iclass 39, count 0 2006.229.22:16:33.89#ibcon#end of sib2, iclass 39, count 0 2006.229.22:16:33.89#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:16:33.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:16:33.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:16:33.89#ibcon#*before write, iclass 39, count 0 2006.229.22:16:33.89#ibcon#enter sib2, iclass 39, count 0 2006.229.22:16:33.89#ibcon#flushed, iclass 39, count 0 2006.229.22:16:33.89#ibcon#about to write, iclass 39, count 0 2006.229.22:16:33.89#ibcon#wrote, iclass 39, count 0 2006.229.22:16:33.89#ibcon#about to read 3, iclass 39, count 0 2006.229.22:16:33.93#ibcon#read 3, iclass 39, count 0 2006.229.22:16:33.93#ibcon#about to read 4, iclass 39, count 0 2006.229.22:16:33.93#ibcon#read 4, iclass 39, count 0 2006.229.22:16:33.93#ibcon#about to read 5, iclass 39, count 0 2006.229.22:16:33.93#ibcon#read 5, iclass 39, count 0 2006.229.22:16:33.93#ibcon#about to read 6, iclass 39, count 0 2006.229.22:16:33.93#ibcon#read 6, iclass 39, count 0 2006.229.22:16:33.93#ibcon#end of sib2, iclass 39, count 0 2006.229.22:16:33.93#ibcon#*after write, iclass 39, count 0 2006.229.22:16:33.93#ibcon#*before return 0, iclass 39, count 0 2006.229.22:16:33.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:33.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:16:33.93#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:16:33.93#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:16:33.93$vck44/vb=4,4 2006.229.22:16:33.93#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.22:16:33.93#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.22:16:33.93#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:33.93#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:33.99#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:33.99#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:33.99#ibcon#enter wrdev, iclass 3, count 2 2006.229.22:16:33.99#ibcon#first serial, iclass 3, count 2 2006.229.22:16:33.99#ibcon#enter sib2, iclass 3, count 2 2006.229.22:16:33.99#ibcon#flushed, iclass 3, count 2 2006.229.22:16:33.99#ibcon#about to write, iclass 3, count 2 2006.229.22:16:33.99#ibcon#wrote, iclass 3, count 2 2006.229.22:16:33.99#ibcon#about to read 3, iclass 3, count 2 2006.229.22:16:34.01#ibcon#read 3, iclass 3, count 2 2006.229.22:16:34.01#ibcon#about to read 4, iclass 3, count 2 2006.229.22:16:34.01#ibcon#read 4, iclass 3, count 2 2006.229.22:16:34.01#ibcon#about to read 5, iclass 3, count 2 2006.229.22:16:34.01#ibcon#read 5, iclass 3, count 2 2006.229.22:16:34.01#ibcon#about to read 6, iclass 3, count 2 2006.229.22:16:34.01#ibcon#read 6, iclass 3, count 2 2006.229.22:16:34.01#ibcon#end of sib2, iclass 3, count 2 2006.229.22:16:34.01#ibcon#*mode == 0, iclass 3, count 2 2006.229.22:16:34.01#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.22:16:34.01#ibcon#[27=AT04-04\r\n] 2006.229.22:16:34.01#ibcon#*before write, iclass 3, count 2 2006.229.22:16:34.01#ibcon#enter sib2, iclass 3, count 2 2006.229.22:16:34.01#ibcon#flushed, iclass 3, count 2 2006.229.22:16:34.01#ibcon#about to write, iclass 3, count 2 2006.229.22:16:34.01#ibcon#wrote, iclass 3, count 2 2006.229.22:16:34.01#ibcon#about to read 3, iclass 3, count 2 2006.229.22:16:34.04#ibcon#read 3, iclass 3, count 2 2006.229.22:16:34.04#ibcon#about to read 4, iclass 3, count 2 2006.229.22:16:34.04#ibcon#read 4, iclass 3, count 2 2006.229.22:16:34.04#ibcon#about to read 5, iclass 3, count 2 2006.229.22:16:34.04#ibcon#read 5, iclass 3, count 2 2006.229.22:16:34.04#ibcon#about to read 6, iclass 3, count 2 2006.229.22:16:34.04#ibcon#read 6, iclass 3, count 2 2006.229.22:16:34.04#ibcon#end of sib2, iclass 3, count 2 2006.229.22:16:34.04#ibcon#*after write, iclass 3, count 2 2006.229.22:16:34.04#ibcon#*before return 0, iclass 3, count 2 2006.229.22:16:34.04#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:34.04#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:16:34.04#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.22:16:34.04#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:34.04#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:34.16#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:34.16#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:34.16#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:16:34.16#ibcon#first serial, iclass 3, count 0 2006.229.22:16:34.16#ibcon#enter sib2, iclass 3, count 0 2006.229.22:16:34.16#ibcon#flushed, iclass 3, count 0 2006.229.22:16:34.16#ibcon#about to write, iclass 3, count 0 2006.229.22:16:34.16#ibcon#wrote, iclass 3, count 0 2006.229.22:16:34.16#ibcon#about to read 3, iclass 3, count 0 2006.229.22:16:34.18#ibcon#read 3, iclass 3, count 0 2006.229.22:16:34.18#ibcon#about to read 4, iclass 3, count 0 2006.229.22:16:34.18#ibcon#read 4, iclass 3, count 0 2006.229.22:16:34.18#ibcon#about to read 5, iclass 3, count 0 2006.229.22:16:34.18#ibcon#read 5, iclass 3, count 0 2006.229.22:16:34.18#ibcon#about to read 6, iclass 3, count 0 2006.229.22:16:34.18#ibcon#read 6, iclass 3, count 0 2006.229.22:16:34.18#ibcon#end of sib2, iclass 3, count 0 2006.229.22:16:34.18#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:16:34.18#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:16:34.18#ibcon#[27=USB\r\n] 2006.229.22:16:34.18#ibcon#*before write, iclass 3, count 0 2006.229.22:16:34.18#ibcon#enter sib2, iclass 3, count 0 2006.229.22:16:34.18#ibcon#flushed, iclass 3, count 0 2006.229.22:16:34.18#ibcon#about to write, iclass 3, count 0 2006.229.22:16:34.18#ibcon#wrote, iclass 3, count 0 2006.229.22:16:34.18#ibcon#about to read 3, iclass 3, count 0 2006.229.22:16:34.21#ibcon#read 3, iclass 3, count 0 2006.229.22:16:34.21#ibcon#about to read 4, iclass 3, count 0 2006.229.22:16:34.21#ibcon#read 4, iclass 3, count 0 2006.229.22:16:34.21#ibcon#about to read 5, iclass 3, count 0 2006.229.22:16:34.21#ibcon#read 5, iclass 3, count 0 2006.229.22:16:34.21#ibcon#about to read 6, iclass 3, count 0 2006.229.22:16:34.21#ibcon#read 6, iclass 3, count 0 2006.229.22:16:34.21#ibcon#end of sib2, iclass 3, count 0 2006.229.22:16:34.21#ibcon#*after write, iclass 3, count 0 2006.229.22:16:34.21#ibcon#*before return 0, iclass 3, count 0 2006.229.22:16:34.21#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:34.21#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:16:34.21#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:16:34.21#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:16:34.21$vck44/vblo=5,709.99 2006.229.22:16:34.21#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:16:34.21#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:16:34.21#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:34.21#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:34.21#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:34.21#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:34.21#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:16:34.21#ibcon#first serial, iclass 5, count 0 2006.229.22:16:34.21#ibcon#enter sib2, iclass 5, count 0 2006.229.22:16:34.21#ibcon#flushed, iclass 5, count 0 2006.229.22:16:34.21#ibcon#about to write, iclass 5, count 0 2006.229.22:16:34.21#ibcon#wrote, iclass 5, count 0 2006.229.22:16:34.21#ibcon#about to read 3, iclass 5, count 0 2006.229.22:16:34.23#ibcon#read 3, iclass 5, count 0 2006.229.22:16:34.23#ibcon#about to read 4, iclass 5, count 0 2006.229.22:16:34.23#ibcon#read 4, iclass 5, count 0 2006.229.22:16:34.23#ibcon#about to read 5, iclass 5, count 0 2006.229.22:16:34.23#ibcon#read 5, iclass 5, count 0 2006.229.22:16:34.23#ibcon#about to read 6, iclass 5, count 0 2006.229.22:16:34.23#ibcon#read 6, iclass 5, count 0 2006.229.22:16:34.23#ibcon#end of sib2, iclass 5, count 0 2006.229.22:16:34.23#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:16:34.23#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:16:34.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:16:34.23#ibcon#*before write, iclass 5, count 0 2006.229.22:16:34.23#ibcon#enter sib2, iclass 5, count 0 2006.229.22:16:34.23#ibcon#flushed, iclass 5, count 0 2006.229.22:16:34.23#ibcon#about to write, iclass 5, count 0 2006.229.22:16:34.23#ibcon#wrote, iclass 5, count 0 2006.229.22:16:34.23#ibcon#about to read 3, iclass 5, count 0 2006.229.22:16:34.27#ibcon#read 3, iclass 5, count 0 2006.229.22:16:34.27#ibcon#about to read 4, iclass 5, count 0 2006.229.22:16:34.27#ibcon#read 4, iclass 5, count 0 2006.229.22:16:34.27#ibcon#about to read 5, iclass 5, count 0 2006.229.22:16:34.27#ibcon#read 5, iclass 5, count 0 2006.229.22:16:34.27#ibcon#about to read 6, iclass 5, count 0 2006.229.22:16:34.27#ibcon#read 6, iclass 5, count 0 2006.229.22:16:34.27#ibcon#end of sib2, iclass 5, count 0 2006.229.22:16:34.27#ibcon#*after write, iclass 5, count 0 2006.229.22:16:34.27#ibcon#*before return 0, iclass 5, count 0 2006.229.22:16:34.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:34.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:16:34.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:16:34.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:16:34.27$vck44/vb=5,4 2006.229.22:16:34.27#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.22:16:34.27#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.22:16:34.27#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:34.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:34.33#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:34.33#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:34.33#ibcon#enter wrdev, iclass 7, count 2 2006.229.22:16:34.33#ibcon#first serial, iclass 7, count 2 2006.229.22:16:34.33#ibcon#enter sib2, iclass 7, count 2 2006.229.22:16:34.33#ibcon#flushed, iclass 7, count 2 2006.229.22:16:34.33#ibcon#about to write, iclass 7, count 2 2006.229.22:16:34.33#ibcon#wrote, iclass 7, count 2 2006.229.22:16:34.33#ibcon#about to read 3, iclass 7, count 2 2006.229.22:16:34.35#ibcon#read 3, iclass 7, count 2 2006.229.22:16:34.35#ibcon#about to read 4, iclass 7, count 2 2006.229.22:16:34.35#ibcon#read 4, iclass 7, count 2 2006.229.22:16:34.35#ibcon#about to read 5, iclass 7, count 2 2006.229.22:16:34.35#ibcon#read 5, iclass 7, count 2 2006.229.22:16:34.35#ibcon#about to read 6, iclass 7, count 2 2006.229.22:16:34.35#ibcon#read 6, iclass 7, count 2 2006.229.22:16:34.35#ibcon#end of sib2, iclass 7, count 2 2006.229.22:16:34.35#ibcon#*mode == 0, iclass 7, count 2 2006.229.22:16:34.35#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.22:16:34.35#ibcon#[27=AT05-04\r\n] 2006.229.22:16:34.35#ibcon#*before write, iclass 7, count 2 2006.229.22:16:34.35#ibcon#enter sib2, iclass 7, count 2 2006.229.22:16:34.35#ibcon#flushed, iclass 7, count 2 2006.229.22:16:34.35#ibcon#about to write, iclass 7, count 2 2006.229.22:16:34.35#ibcon#wrote, iclass 7, count 2 2006.229.22:16:34.35#ibcon#about to read 3, iclass 7, count 2 2006.229.22:16:34.38#ibcon#read 3, iclass 7, count 2 2006.229.22:16:34.38#ibcon#about to read 4, iclass 7, count 2 2006.229.22:16:34.38#ibcon#read 4, iclass 7, count 2 2006.229.22:16:34.38#ibcon#about to read 5, iclass 7, count 2 2006.229.22:16:34.38#ibcon#read 5, iclass 7, count 2 2006.229.22:16:34.38#ibcon#about to read 6, iclass 7, count 2 2006.229.22:16:34.38#ibcon#read 6, iclass 7, count 2 2006.229.22:16:34.38#ibcon#end of sib2, iclass 7, count 2 2006.229.22:16:34.38#ibcon#*after write, iclass 7, count 2 2006.229.22:16:34.38#ibcon#*before return 0, iclass 7, count 2 2006.229.22:16:34.38#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:34.38#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:16:34.38#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.22:16:34.38#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:34.38#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:34.50#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:34.50#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:34.50#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:16:34.50#ibcon#first serial, iclass 7, count 0 2006.229.22:16:34.50#ibcon#enter sib2, iclass 7, count 0 2006.229.22:16:34.50#ibcon#flushed, iclass 7, count 0 2006.229.22:16:34.50#ibcon#about to write, iclass 7, count 0 2006.229.22:16:34.50#ibcon#wrote, iclass 7, count 0 2006.229.22:16:34.50#ibcon#about to read 3, iclass 7, count 0 2006.229.22:16:34.52#ibcon#read 3, iclass 7, count 0 2006.229.22:16:34.52#ibcon#about to read 4, iclass 7, count 0 2006.229.22:16:34.52#ibcon#read 4, iclass 7, count 0 2006.229.22:16:34.52#ibcon#about to read 5, iclass 7, count 0 2006.229.22:16:34.52#ibcon#read 5, iclass 7, count 0 2006.229.22:16:34.52#ibcon#about to read 6, iclass 7, count 0 2006.229.22:16:34.52#ibcon#read 6, iclass 7, count 0 2006.229.22:16:34.52#ibcon#end of sib2, iclass 7, count 0 2006.229.22:16:34.52#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:16:34.52#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:16:34.52#ibcon#[27=USB\r\n] 2006.229.22:16:34.52#ibcon#*before write, iclass 7, count 0 2006.229.22:16:34.52#ibcon#enter sib2, iclass 7, count 0 2006.229.22:16:34.52#ibcon#flushed, iclass 7, count 0 2006.229.22:16:34.52#ibcon#about to write, iclass 7, count 0 2006.229.22:16:34.52#ibcon#wrote, iclass 7, count 0 2006.229.22:16:34.52#ibcon#about to read 3, iclass 7, count 0 2006.229.22:16:34.55#ibcon#read 3, iclass 7, count 0 2006.229.22:16:34.55#ibcon#about to read 4, iclass 7, count 0 2006.229.22:16:34.55#ibcon#read 4, iclass 7, count 0 2006.229.22:16:34.55#ibcon#about to read 5, iclass 7, count 0 2006.229.22:16:34.55#ibcon#read 5, iclass 7, count 0 2006.229.22:16:34.55#ibcon#about to read 6, iclass 7, count 0 2006.229.22:16:34.55#ibcon#read 6, iclass 7, count 0 2006.229.22:16:34.55#ibcon#end of sib2, iclass 7, count 0 2006.229.22:16:34.55#ibcon#*after write, iclass 7, count 0 2006.229.22:16:34.55#ibcon#*before return 0, iclass 7, count 0 2006.229.22:16:34.55#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:34.55#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:16:34.55#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:16:34.55#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:16:34.55$vck44/vblo=6,719.99 2006.229.22:16:34.55#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.22:16:34.55#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.22:16:34.55#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:34.55#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:34.55#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:34.55#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:34.55#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:16:34.55#ibcon#first serial, iclass 11, count 0 2006.229.22:16:34.55#ibcon#enter sib2, iclass 11, count 0 2006.229.22:16:34.55#ibcon#flushed, iclass 11, count 0 2006.229.22:16:34.55#ibcon#about to write, iclass 11, count 0 2006.229.22:16:34.55#ibcon#wrote, iclass 11, count 0 2006.229.22:16:34.55#ibcon#about to read 3, iclass 11, count 0 2006.229.22:16:34.57#ibcon#read 3, iclass 11, count 0 2006.229.22:16:34.57#ibcon#about to read 4, iclass 11, count 0 2006.229.22:16:34.57#ibcon#read 4, iclass 11, count 0 2006.229.22:16:34.57#ibcon#about to read 5, iclass 11, count 0 2006.229.22:16:34.57#ibcon#read 5, iclass 11, count 0 2006.229.22:16:34.57#ibcon#about to read 6, iclass 11, count 0 2006.229.22:16:34.57#ibcon#read 6, iclass 11, count 0 2006.229.22:16:34.57#ibcon#end of sib2, iclass 11, count 0 2006.229.22:16:34.57#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:16:34.57#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:16:34.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:16:34.57#ibcon#*before write, iclass 11, count 0 2006.229.22:16:34.57#ibcon#enter sib2, iclass 11, count 0 2006.229.22:16:34.57#ibcon#flushed, iclass 11, count 0 2006.229.22:16:34.57#ibcon#about to write, iclass 11, count 0 2006.229.22:16:34.57#ibcon#wrote, iclass 11, count 0 2006.229.22:16:34.57#ibcon#about to read 3, iclass 11, count 0 2006.229.22:16:34.61#ibcon#read 3, iclass 11, count 0 2006.229.22:16:34.61#ibcon#about to read 4, iclass 11, count 0 2006.229.22:16:34.61#ibcon#read 4, iclass 11, count 0 2006.229.22:16:34.61#ibcon#about to read 5, iclass 11, count 0 2006.229.22:16:34.61#ibcon#read 5, iclass 11, count 0 2006.229.22:16:34.61#ibcon#about to read 6, iclass 11, count 0 2006.229.22:16:34.61#ibcon#read 6, iclass 11, count 0 2006.229.22:16:34.61#ibcon#end of sib2, iclass 11, count 0 2006.229.22:16:34.61#ibcon#*after write, iclass 11, count 0 2006.229.22:16:34.61#ibcon#*before return 0, iclass 11, count 0 2006.229.22:16:34.61#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:34.61#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:16:34.61#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:16:34.61#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:16:34.61$vck44/vb=6,4 2006.229.22:16:34.61#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.22:16:34.61#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.22:16:34.61#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:34.61#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:34.67#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:34.67#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:34.67#ibcon#enter wrdev, iclass 13, count 2 2006.229.22:16:34.67#ibcon#first serial, iclass 13, count 2 2006.229.22:16:34.67#ibcon#enter sib2, iclass 13, count 2 2006.229.22:16:34.67#ibcon#flushed, iclass 13, count 2 2006.229.22:16:34.67#ibcon#about to write, iclass 13, count 2 2006.229.22:16:34.67#ibcon#wrote, iclass 13, count 2 2006.229.22:16:34.67#ibcon#about to read 3, iclass 13, count 2 2006.229.22:16:34.69#ibcon#read 3, iclass 13, count 2 2006.229.22:16:34.69#ibcon#about to read 4, iclass 13, count 2 2006.229.22:16:34.69#ibcon#read 4, iclass 13, count 2 2006.229.22:16:34.69#ibcon#about to read 5, iclass 13, count 2 2006.229.22:16:34.69#ibcon#read 5, iclass 13, count 2 2006.229.22:16:34.69#ibcon#about to read 6, iclass 13, count 2 2006.229.22:16:34.69#ibcon#read 6, iclass 13, count 2 2006.229.22:16:34.69#ibcon#end of sib2, iclass 13, count 2 2006.229.22:16:34.69#ibcon#*mode == 0, iclass 13, count 2 2006.229.22:16:34.69#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.22:16:34.69#ibcon#[27=AT06-04\r\n] 2006.229.22:16:34.69#ibcon#*before write, iclass 13, count 2 2006.229.22:16:34.69#ibcon#enter sib2, iclass 13, count 2 2006.229.22:16:34.69#ibcon#flushed, iclass 13, count 2 2006.229.22:16:34.69#ibcon#about to write, iclass 13, count 2 2006.229.22:16:34.69#ibcon#wrote, iclass 13, count 2 2006.229.22:16:34.69#ibcon#about to read 3, iclass 13, count 2 2006.229.22:16:34.72#ibcon#read 3, iclass 13, count 2 2006.229.22:16:34.72#ibcon#about to read 4, iclass 13, count 2 2006.229.22:16:34.72#ibcon#read 4, iclass 13, count 2 2006.229.22:16:34.72#ibcon#about to read 5, iclass 13, count 2 2006.229.22:16:34.72#ibcon#read 5, iclass 13, count 2 2006.229.22:16:34.72#ibcon#about to read 6, iclass 13, count 2 2006.229.22:16:34.72#ibcon#read 6, iclass 13, count 2 2006.229.22:16:34.72#ibcon#end of sib2, iclass 13, count 2 2006.229.22:16:34.72#ibcon#*after write, iclass 13, count 2 2006.229.22:16:34.72#ibcon#*before return 0, iclass 13, count 2 2006.229.22:16:34.72#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:34.72#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:16:34.72#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.22:16:34.72#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:34.72#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:34.84#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:34.84#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:34.84#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:16:34.84#ibcon#first serial, iclass 13, count 0 2006.229.22:16:34.84#ibcon#enter sib2, iclass 13, count 0 2006.229.22:16:34.84#ibcon#flushed, iclass 13, count 0 2006.229.22:16:34.84#ibcon#about to write, iclass 13, count 0 2006.229.22:16:34.84#ibcon#wrote, iclass 13, count 0 2006.229.22:16:34.84#ibcon#about to read 3, iclass 13, count 0 2006.229.22:16:34.86#ibcon#read 3, iclass 13, count 0 2006.229.22:16:34.86#ibcon#about to read 4, iclass 13, count 0 2006.229.22:16:34.86#ibcon#read 4, iclass 13, count 0 2006.229.22:16:34.86#ibcon#about to read 5, iclass 13, count 0 2006.229.22:16:34.86#ibcon#read 5, iclass 13, count 0 2006.229.22:16:34.86#ibcon#about to read 6, iclass 13, count 0 2006.229.22:16:34.86#ibcon#read 6, iclass 13, count 0 2006.229.22:16:34.86#ibcon#end of sib2, iclass 13, count 0 2006.229.22:16:34.86#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:16:34.86#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:16:34.86#ibcon#[27=USB\r\n] 2006.229.22:16:34.86#ibcon#*before write, iclass 13, count 0 2006.229.22:16:34.86#ibcon#enter sib2, iclass 13, count 0 2006.229.22:16:34.86#ibcon#flushed, iclass 13, count 0 2006.229.22:16:34.86#ibcon#about to write, iclass 13, count 0 2006.229.22:16:34.86#ibcon#wrote, iclass 13, count 0 2006.229.22:16:34.86#ibcon#about to read 3, iclass 13, count 0 2006.229.22:16:34.89#ibcon#read 3, iclass 13, count 0 2006.229.22:16:34.89#ibcon#about to read 4, iclass 13, count 0 2006.229.22:16:34.89#ibcon#read 4, iclass 13, count 0 2006.229.22:16:34.89#ibcon#about to read 5, iclass 13, count 0 2006.229.22:16:34.89#ibcon#read 5, iclass 13, count 0 2006.229.22:16:34.89#ibcon#about to read 6, iclass 13, count 0 2006.229.22:16:34.89#ibcon#read 6, iclass 13, count 0 2006.229.22:16:34.89#ibcon#end of sib2, iclass 13, count 0 2006.229.22:16:34.89#ibcon#*after write, iclass 13, count 0 2006.229.22:16:34.89#ibcon#*before return 0, iclass 13, count 0 2006.229.22:16:34.89#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:34.89#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:16:34.89#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:16:34.89#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:16:34.89$vck44/vblo=7,734.99 2006.229.22:16:34.89#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.22:16:34.89#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.22:16:34.89#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:34.89#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:34.89#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:34.89#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:34.89#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:16:34.89#ibcon#first serial, iclass 15, count 0 2006.229.22:16:34.89#ibcon#enter sib2, iclass 15, count 0 2006.229.22:16:34.89#ibcon#flushed, iclass 15, count 0 2006.229.22:16:34.89#ibcon#about to write, iclass 15, count 0 2006.229.22:16:34.89#ibcon#wrote, iclass 15, count 0 2006.229.22:16:34.89#ibcon#about to read 3, iclass 15, count 0 2006.229.22:16:34.91#ibcon#read 3, iclass 15, count 0 2006.229.22:16:34.91#ibcon#about to read 4, iclass 15, count 0 2006.229.22:16:34.91#ibcon#read 4, iclass 15, count 0 2006.229.22:16:34.91#ibcon#about to read 5, iclass 15, count 0 2006.229.22:16:34.91#ibcon#read 5, iclass 15, count 0 2006.229.22:16:34.91#ibcon#about to read 6, iclass 15, count 0 2006.229.22:16:34.91#ibcon#read 6, iclass 15, count 0 2006.229.22:16:34.91#ibcon#end of sib2, iclass 15, count 0 2006.229.22:16:34.91#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:16:34.91#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:16:34.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:16:34.91#ibcon#*before write, iclass 15, count 0 2006.229.22:16:34.91#ibcon#enter sib2, iclass 15, count 0 2006.229.22:16:34.91#ibcon#flushed, iclass 15, count 0 2006.229.22:16:34.91#ibcon#about to write, iclass 15, count 0 2006.229.22:16:34.91#ibcon#wrote, iclass 15, count 0 2006.229.22:16:34.91#ibcon#about to read 3, iclass 15, count 0 2006.229.22:16:34.95#ibcon#read 3, iclass 15, count 0 2006.229.22:16:34.95#ibcon#about to read 4, iclass 15, count 0 2006.229.22:16:34.95#ibcon#read 4, iclass 15, count 0 2006.229.22:16:34.95#ibcon#about to read 5, iclass 15, count 0 2006.229.22:16:34.95#ibcon#read 5, iclass 15, count 0 2006.229.22:16:34.95#ibcon#about to read 6, iclass 15, count 0 2006.229.22:16:34.95#ibcon#read 6, iclass 15, count 0 2006.229.22:16:34.95#ibcon#end of sib2, iclass 15, count 0 2006.229.22:16:34.95#ibcon#*after write, iclass 15, count 0 2006.229.22:16:34.95#ibcon#*before return 0, iclass 15, count 0 2006.229.22:16:34.95#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:34.95#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:16:34.95#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:16:34.95#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:16:34.95$vck44/vb=7,4 2006.229.22:16:34.95#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.22:16:34.95#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.22:16:34.95#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:34.95#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:35.01#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:35.01#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:35.01#ibcon#enter wrdev, iclass 17, count 2 2006.229.22:16:35.01#ibcon#first serial, iclass 17, count 2 2006.229.22:16:35.01#ibcon#enter sib2, iclass 17, count 2 2006.229.22:16:35.01#ibcon#flushed, iclass 17, count 2 2006.229.22:16:35.01#ibcon#about to write, iclass 17, count 2 2006.229.22:16:35.01#ibcon#wrote, iclass 17, count 2 2006.229.22:16:35.01#ibcon#about to read 3, iclass 17, count 2 2006.229.22:16:35.03#ibcon#read 3, iclass 17, count 2 2006.229.22:16:35.03#ibcon#about to read 4, iclass 17, count 2 2006.229.22:16:35.03#ibcon#read 4, iclass 17, count 2 2006.229.22:16:35.03#ibcon#about to read 5, iclass 17, count 2 2006.229.22:16:35.03#ibcon#read 5, iclass 17, count 2 2006.229.22:16:35.03#ibcon#about to read 6, iclass 17, count 2 2006.229.22:16:35.03#ibcon#read 6, iclass 17, count 2 2006.229.22:16:35.03#ibcon#end of sib2, iclass 17, count 2 2006.229.22:16:35.03#ibcon#*mode == 0, iclass 17, count 2 2006.229.22:16:35.03#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.22:16:35.03#ibcon#[27=AT07-04\r\n] 2006.229.22:16:35.03#ibcon#*before write, iclass 17, count 2 2006.229.22:16:35.03#ibcon#enter sib2, iclass 17, count 2 2006.229.22:16:35.03#ibcon#flushed, iclass 17, count 2 2006.229.22:16:35.03#ibcon#about to write, iclass 17, count 2 2006.229.22:16:35.03#ibcon#wrote, iclass 17, count 2 2006.229.22:16:35.03#ibcon#about to read 3, iclass 17, count 2 2006.229.22:16:35.06#ibcon#read 3, iclass 17, count 2 2006.229.22:16:35.06#ibcon#about to read 4, iclass 17, count 2 2006.229.22:16:35.06#ibcon#read 4, iclass 17, count 2 2006.229.22:16:35.06#ibcon#about to read 5, iclass 17, count 2 2006.229.22:16:35.06#ibcon#read 5, iclass 17, count 2 2006.229.22:16:35.06#ibcon#about to read 6, iclass 17, count 2 2006.229.22:16:35.06#ibcon#read 6, iclass 17, count 2 2006.229.22:16:35.06#ibcon#end of sib2, iclass 17, count 2 2006.229.22:16:35.06#ibcon#*after write, iclass 17, count 2 2006.229.22:16:35.06#ibcon#*before return 0, iclass 17, count 2 2006.229.22:16:35.06#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:35.06#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:16:35.06#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.22:16:35.06#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:35.06#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:35.18#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:35.18#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:35.18#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:16:35.18#ibcon#first serial, iclass 17, count 0 2006.229.22:16:35.18#ibcon#enter sib2, iclass 17, count 0 2006.229.22:16:35.18#ibcon#flushed, iclass 17, count 0 2006.229.22:16:35.18#ibcon#about to write, iclass 17, count 0 2006.229.22:16:35.18#ibcon#wrote, iclass 17, count 0 2006.229.22:16:35.18#ibcon#about to read 3, iclass 17, count 0 2006.229.22:16:35.20#ibcon#read 3, iclass 17, count 0 2006.229.22:16:35.20#ibcon#about to read 4, iclass 17, count 0 2006.229.22:16:35.20#ibcon#read 4, iclass 17, count 0 2006.229.22:16:35.20#ibcon#about to read 5, iclass 17, count 0 2006.229.22:16:35.20#ibcon#read 5, iclass 17, count 0 2006.229.22:16:35.20#ibcon#about to read 6, iclass 17, count 0 2006.229.22:16:35.20#ibcon#read 6, iclass 17, count 0 2006.229.22:16:35.20#ibcon#end of sib2, iclass 17, count 0 2006.229.22:16:35.20#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:16:35.20#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:16:35.20#ibcon#[27=USB\r\n] 2006.229.22:16:35.20#ibcon#*before write, iclass 17, count 0 2006.229.22:16:35.20#ibcon#enter sib2, iclass 17, count 0 2006.229.22:16:35.20#ibcon#flushed, iclass 17, count 0 2006.229.22:16:35.20#ibcon#about to write, iclass 17, count 0 2006.229.22:16:35.20#ibcon#wrote, iclass 17, count 0 2006.229.22:16:35.20#ibcon#about to read 3, iclass 17, count 0 2006.229.22:16:35.23#ibcon#read 3, iclass 17, count 0 2006.229.22:16:35.23#ibcon#about to read 4, iclass 17, count 0 2006.229.22:16:35.23#ibcon#read 4, iclass 17, count 0 2006.229.22:16:35.23#ibcon#about to read 5, iclass 17, count 0 2006.229.22:16:35.23#ibcon#read 5, iclass 17, count 0 2006.229.22:16:35.23#ibcon#about to read 6, iclass 17, count 0 2006.229.22:16:35.23#ibcon#read 6, iclass 17, count 0 2006.229.22:16:35.23#ibcon#end of sib2, iclass 17, count 0 2006.229.22:16:35.23#ibcon#*after write, iclass 17, count 0 2006.229.22:16:35.23#ibcon#*before return 0, iclass 17, count 0 2006.229.22:16:35.23#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:35.23#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:16:35.23#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:16:35.23#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:16:35.23$vck44/vblo=8,744.99 2006.229.22:16:35.23#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.22:16:35.23#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.22:16:35.23#ibcon#ireg 17 cls_cnt 0 2006.229.22:16:35.23#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:35.23#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:35.23#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:35.23#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:16:35.23#ibcon#first serial, iclass 19, count 0 2006.229.22:16:35.23#ibcon#enter sib2, iclass 19, count 0 2006.229.22:16:35.23#ibcon#flushed, iclass 19, count 0 2006.229.22:16:35.23#ibcon#about to write, iclass 19, count 0 2006.229.22:16:35.23#ibcon#wrote, iclass 19, count 0 2006.229.22:16:35.23#ibcon#about to read 3, iclass 19, count 0 2006.229.22:16:35.25#ibcon#read 3, iclass 19, count 0 2006.229.22:16:35.25#ibcon#about to read 4, iclass 19, count 0 2006.229.22:16:35.25#ibcon#read 4, iclass 19, count 0 2006.229.22:16:35.25#ibcon#about to read 5, iclass 19, count 0 2006.229.22:16:35.25#ibcon#read 5, iclass 19, count 0 2006.229.22:16:35.25#ibcon#about to read 6, iclass 19, count 0 2006.229.22:16:35.25#ibcon#read 6, iclass 19, count 0 2006.229.22:16:35.25#ibcon#end of sib2, iclass 19, count 0 2006.229.22:16:35.25#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:16:35.25#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:16:35.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:16:35.25#ibcon#*before write, iclass 19, count 0 2006.229.22:16:35.25#ibcon#enter sib2, iclass 19, count 0 2006.229.22:16:35.25#ibcon#flushed, iclass 19, count 0 2006.229.22:16:35.25#ibcon#about to write, iclass 19, count 0 2006.229.22:16:35.25#ibcon#wrote, iclass 19, count 0 2006.229.22:16:35.25#ibcon#about to read 3, iclass 19, count 0 2006.229.22:16:35.29#ibcon#read 3, iclass 19, count 0 2006.229.22:16:35.29#ibcon#about to read 4, iclass 19, count 0 2006.229.22:16:35.29#ibcon#read 4, iclass 19, count 0 2006.229.22:16:35.29#ibcon#about to read 5, iclass 19, count 0 2006.229.22:16:35.29#ibcon#read 5, iclass 19, count 0 2006.229.22:16:35.29#ibcon#about to read 6, iclass 19, count 0 2006.229.22:16:35.29#ibcon#read 6, iclass 19, count 0 2006.229.22:16:35.29#ibcon#end of sib2, iclass 19, count 0 2006.229.22:16:35.29#ibcon#*after write, iclass 19, count 0 2006.229.22:16:35.29#ibcon#*before return 0, iclass 19, count 0 2006.229.22:16:35.29#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:35.29#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:16:35.29#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:16:35.29#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:16:35.29$vck44/vb=8,4 2006.229.22:16:35.29#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.22:16:35.29#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.22:16:35.29#ibcon#ireg 11 cls_cnt 2 2006.229.22:16:35.29#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:35.35#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:35.35#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:35.35#ibcon#enter wrdev, iclass 21, count 2 2006.229.22:16:35.35#ibcon#first serial, iclass 21, count 2 2006.229.22:16:35.35#ibcon#enter sib2, iclass 21, count 2 2006.229.22:16:35.35#ibcon#flushed, iclass 21, count 2 2006.229.22:16:35.35#ibcon#about to write, iclass 21, count 2 2006.229.22:16:35.35#ibcon#wrote, iclass 21, count 2 2006.229.22:16:35.35#ibcon#about to read 3, iclass 21, count 2 2006.229.22:16:35.37#ibcon#read 3, iclass 21, count 2 2006.229.22:16:35.37#ibcon#about to read 4, iclass 21, count 2 2006.229.22:16:35.37#ibcon#read 4, iclass 21, count 2 2006.229.22:16:35.37#ibcon#about to read 5, iclass 21, count 2 2006.229.22:16:35.37#ibcon#read 5, iclass 21, count 2 2006.229.22:16:35.37#ibcon#about to read 6, iclass 21, count 2 2006.229.22:16:35.37#ibcon#read 6, iclass 21, count 2 2006.229.22:16:35.37#ibcon#end of sib2, iclass 21, count 2 2006.229.22:16:35.37#ibcon#*mode == 0, iclass 21, count 2 2006.229.22:16:35.37#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.22:16:35.37#ibcon#[27=AT08-04\r\n] 2006.229.22:16:35.37#ibcon#*before write, iclass 21, count 2 2006.229.22:16:35.37#ibcon#enter sib2, iclass 21, count 2 2006.229.22:16:35.37#ibcon#flushed, iclass 21, count 2 2006.229.22:16:35.37#ibcon#about to write, iclass 21, count 2 2006.229.22:16:35.37#ibcon#wrote, iclass 21, count 2 2006.229.22:16:35.37#ibcon#about to read 3, iclass 21, count 2 2006.229.22:16:35.40#ibcon#read 3, iclass 21, count 2 2006.229.22:16:35.40#ibcon#about to read 4, iclass 21, count 2 2006.229.22:16:35.40#ibcon#read 4, iclass 21, count 2 2006.229.22:16:35.40#ibcon#about to read 5, iclass 21, count 2 2006.229.22:16:35.40#ibcon#read 5, iclass 21, count 2 2006.229.22:16:35.40#ibcon#about to read 6, iclass 21, count 2 2006.229.22:16:35.40#ibcon#read 6, iclass 21, count 2 2006.229.22:16:35.40#ibcon#end of sib2, iclass 21, count 2 2006.229.22:16:35.40#ibcon#*after write, iclass 21, count 2 2006.229.22:16:35.40#ibcon#*before return 0, iclass 21, count 2 2006.229.22:16:35.40#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:35.40#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:16:35.40#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.22:16:35.40#ibcon#ireg 7 cls_cnt 0 2006.229.22:16:35.40#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:35.52#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:35.52#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:35.52#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:16:35.52#ibcon#first serial, iclass 21, count 0 2006.229.22:16:35.52#ibcon#enter sib2, iclass 21, count 0 2006.229.22:16:35.52#ibcon#flushed, iclass 21, count 0 2006.229.22:16:35.52#ibcon#about to write, iclass 21, count 0 2006.229.22:16:35.52#ibcon#wrote, iclass 21, count 0 2006.229.22:16:35.52#ibcon#about to read 3, iclass 21, count 0 2006.229.22:16:35.54#ibcon#read 3, iclass 21, count 0 2006.229.22:16:35.54#ibcon#about to read 4, iclass 21, count 0 2006.229.22:16:35.54#ibcon#read 4, iclass 21, count 0 2006.229.22:16:35.54#ibcon#about to read 5, iclass 21, count 0 2006.229.22:16:35.54#ibcon#read 5, iclass 21, count 0 2006.229.22:16:35.54#ibcon#about to read 6, iclass 21, count 0 2006.229.22:16:35.54#ibcon#read 6, iclass 21, count 0 2006.229.22:16:35.54#ibcon#end of sib2, iclass 21, count 0 2006.229.22:16:35.54#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:16:35.54#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:16:35.54#ibcon#[27=USB\r\n] 2006.229.22:16:35.54#ibcon#*before write, iclass 21, count 0 2006.229.22:16:35.54#ibcon#enter sib2, iclass 21, count 0 2006.229.22:16:35.54#ibcon#flushed, iclass 21, count 0 2006.229.22:16:35.54#ibcon#about to write, iclass 21, count 0 2006.229.22:16:35.54#ibcon#wrote, iclass 21, count 0 2006.229.22:16:35.54#ibcon#about to read 3, iclass 21, count 0 2006.229.22:16:35.57#ibcon#read 3, iclass 21, count 0 2006.229.22:16:35.57#ibcon#about to read 4, iclass 21, count 0 2006.229.22:16:35.57#ibcon#read 4, iclass 21, count 0 2006.229.22:16:35.57#ibcon#about to read 5, iclass 21, count 0 2006.229.22:16:35.57#ibcon#read 5, iclass 21, count 0 2006.229.22:16:35.57#ibcon#about to read 6, iclass 21, count 0 2006.229.22:16:35.57#ibcon#read 6, iclass 21, count 0 2006.229.22:16:35.57#ibcon#end of sib2, iclass 21, count 0 2006.229.22:16:35.57#ibcon#*after write, iclass 21, count 0 2006.229.22:16:35.57#ibcon#*before return 0, iclass 21, count 0 2006.229.22:16:35.57#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:35.57#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:16:35.57#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:16:35.57#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:16:35.57$vck44/vabw=wide 2006.229.22:16:35.57#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.22:16:35.57#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.22:16:35.57#ibcon#ireg 8 cls_cnt 0 2006.229.22:16:35.57#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:35.57#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:35.57#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:35.57#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:16:35.57#ibcon#first serial, iclass 23, count 0 2006.229.22:16:35.57#ibcon#enter sib2, iclass 23, count 0 2006.229.22:16:35.57#ibcon#flushed, iclass 23, count 0 2006.229.22:16:35.57#ibcon#about to write, iclass 23, count 0 2006.229.22:16:35.57#ibcon#wrote, iclass 23, count 0 2006.229.22:16:35.57#ibcon#about to read 3, iclass 23, count 0 2006.229.22:16:35.59#ibcon#read 3, iclass 23, count 0 2006.229.22:16:35.59#ibcon#about to read 4, iclass 23, count 0 2006.229.22:16:35.59#ibcon#read 4, iclass 23, count 0 2006.229.22:16:35.59#ibcon#about to read 5, iclass 23, count 0 2006.229.22:16:35.59#ibcon#read 5, iclass 23, count 0 2006.229.22:16:35.59#ibcon#about to read 6, iclass 23, count 0 2006.229.22:16:35.59#ibcon#read 6, iclass 23, count 0 2006.229.22:16:35.59#ibcon#end of sib2, iclass 23, count 0 2006.229.22:16:35.59#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:16:35.59#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:16:35.59#ibcon#[25=BW32\r\n] 2006.229.22:16:35.59#ibcon#*before write, iclass 23, count 0 2006.229.22:16:35.59#ibcon#enter sib2, iclass 23, count 0 2006.229.22:16:35.59#ibcon#flushed, iclass 23, count 0 2006.229.22:16:35.59#ibcon#about to write, iclass 23, count 0 2006.229.22:16:35.59#ibcon#wrote, iclass 23, count 0 2006.229.22:16:35.59#ibcon#about to read 3, iclass 23, count 0 2006.229.22:16:35.62#ibcon#read 3, iclass 23, count 0 2006.229.22:16:35.62#ibcon#about to read 4, iclass 23, count 0 2006.229.22:16:35.62#ibcon#read 4, iclass 23, count 0 2006.229.22:16:35.62#ibcon#about to read 5, iclass 23, count 0 2006.229.22:16:35.62#ibcon#read 5, iclass 23, count 0 2006.229.22:16:35.62#ibcon#about to read 6, iclass 23, count 0 2006.229.22:16:35.62#ibcon#read 6, iclass 23, count 0 2006.229.22:16:35.62#ibcon#end of sib2, iclass 23, count 0 2006.229.22:16:35.62#ibcon#*after write, iclass 23, count 0 2006.229.22:16:35.62#ibcon#*before return 0, iclass 23, count 0 2006.229.22:16:35.62#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:35.62#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:16:35.62#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:16:35.62#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:16:35.62$vck44/vbbw=wide 2006.229.22:16:35.62#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.22:16:35.62#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.22:16:35.62#ibcon#ireg 8 cls_cnt 0 2006.229.22:16:35.62#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:16:35.69#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:16:35.69#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:16:35.69#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:16:35.69#ibcon#first serial, iclass 25, count 0 2006.229.22:16:35.69#ibcon#enter sib2, iclass 25, count 0 2006.229.22:16:35.69#ibcon#flushed, iclass 25, count 0 2006.229.22:16:35.69#ibcon#about to write, iclass 25, count 0 2006.229.22:16:35.69#ibcon#wrote, iclass 25, count 0 2006.229.22:16:35.69#ibcon#about to read 3, iclass 25, count 0 2006.229.22:16:35.71#ibcon#read 3, iclass 25, count 0 2006.229.22:16:35.71#ibcon#about to read 4, iclass 25, count 0 2006.229.22:16:35.71#ibcon#read 4, iclass 25, count 0 2006.229.22:16:35.71#ibcon#about to read 5, iclass 25, count 0 2006.229.22:16:35.71#ibcon#read 5, iclass 25, count 0 2006.229.22:16:35.71#ibcon#about to read 6, iclass 25, count 0 2006.229.22:16:35.71#ibcon#read 6, iclass 25, count 0 2006.229.22:16:35.71#ibcon#end of sib2, iclass 25, count 0 2006.229.22:16:35.71#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:16:35.71#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:16:35.71#ibcon#[27=BW32\r\n] 2006.229.22:16:35.71#ibcon#*before write, iclass 25, count 0 2006.229.22:16:35.71#ibcon#enter sib2, iclass 25, count 0 2006.229.22:16:35.71#ibcon#flushed, iclass 25, count 0 2006.229.22:16:35.71#ibcon#about to write, iclass 25, count 0 2006.229.22:16:35.71#ibcon#wrote, iclass 25, count 0 2006.229.22:16:35.71#ibcon#about to read 3, iclass 25, count 0 2006.229.22:16:35.74#ibcon#read 3, iclass 25, count 0 2006.229.22:16:35.74#ibcon#about to read 4, iclass 25, count 0 2006.229.22:16:35.74#ibcon#read 4, iclass 25, count 0 2006.229.22:16:35.74#ibcon#about to read 5, iclass 25, count 0 2006.229.22:16:35.74#ibcon#read 5, iclass 25, count 0 2006.229.22:16:35.74#ibcon#about to read 6, iclass 25, count 0 2006.229.22:16:35.74#ibcon#read 6, iclass 25, count 0 2006.229.22:16:35.74#ibcon#end of sib2, iclass 25, count 0 2006.229.22:16:35.74#ibcon#*after write, iclass 25, count 0 2006.229.22:16:35.74#ibcon#*before return 0, iclass 25, count 0 2006.229.22:16:35.74#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:16:35.74#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:16:35.74#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:16:35.74#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:16:35.74$setupk4/ifdk4 2006.229.22:16:35.74$ifdk4/lo= 2006.229.22:16:35.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:16:35.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:16:35.74$ifdk4/patch= 2006.229.22:16:35.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:16:35.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:16:35.74$setupk4/!*+20s 2006.229.22:16:38.59#abcon#<5=/08 1.2 5.6 28.33 921002.4\r\n> 2006.229.22:16:38.61#abcon#{5=INTERFACE CLEAR} 2006.229.22:16:38.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:16:48.76#abcon#<5=/08 1.2 5.6 28.33 921002.4\r\n> 2006.229.22:16:48.78#abcon#{5=INTERFACE CLEAR} 2006.229.22:16:48.84#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:16:50.25$setupk4/"tpicd 2006.229.22:16:50.25$setupk4/echo=off 2006.229.22:16:50.25$setupk4/xlog=off 2006.229.22:16:50.25:!2006.229.22:19:09 2006.229.22:17:10.14#trakl#Source acquired 2006.229.22:17:10.14#flagr#flagr/antenna,acquired 2006.229.22:19:09.00:preob 2006.229.22:19:09.14/onsource/TRACKING 2006.229.22:19:09.14:!2006.229.22:19:19 2006.229.22:19:19.00:"tape 2006.229.22:19:19.00:"st=record 2006.229.22:19:19.00:data_valid=on 2006.229.22:19:19.00:midob 2006.229.22:19:19.14/onsource/TRACKING 2006.229.22:19:19.14/wx/28.35,1002.4,92 2006.229.22:19:19.30/cable/+6.4165E-03 2006.229.22:19:20.39/va/01,08,usb,yes,35,38 2006.229.22:19:20.39/va/02,07,usb,yes,38,39 2006.229.22:19:20.39/va/03,06,usb,yes,47,50 2006.229.22:19:20.39/va/04,07,usb,yes,39,41 2006.229.22:19:20.39/va/05,04,usb,yes,35,36 2006.229.22:19:20.39/va/06,04,usb,yes,39,39 2006.229.22:19:20.39/va/07,05,usb,yes,35,36 2006.229.22:19:20.39/va/08,06,usb,yes,26,32 2006.229.22:19:20.62/valo/01,524.99,yes,locked 2006.229.22:19:20.62/valo/02,534.99,yes,locked 2006.229.22:19:20.62/valo/03,564.99,yes,locked 2006.229.22:19:20.62/valo/04,624.99,yes,locked 2006.229.22:19:20.62/valo/05,734.99,yes,locked 2006.229.22:19:20.62/valo/06,814.99,yes,locked 2006.229.22:19:20.62/valo/07,864.99,yes,locked 2006.229.22:19:20.62/valo/08,884.99,yes,locked 2006.229.22:19:21.71/vb/01,04,usb,yes,34,32 2006.229.22:19:21.71/vb/02,04,usb,yes,36,36 2006.229.22:19:21.71/vb/03,04,usb,yes,33,37 2006.229.22:19:21.71/vb/04,04,usb,yes,38,37 2006.229.22:19:21.71/vb/05,04,usb,yes,30,33 2006.229.22:19:21.71/vb/06,04,usb,yes,35,31 2006.229.22:19:21.71/vb/07,04,usb,yes,35,35 2006.229.22:19:21.71/vb/08,04,usb,yes,32,35 2006.229.22:19:21.94/vblo/01,629.99,yes,locked 2006.229.22:19:21.94/vblo/02,634.99,yes,locked 2006.229.22:19:21.94/vblo/03,649.99,yes,locked 2006.229.22:19:21.94/vblo/04,679.99,yes,locked 2006.229.22:19:21.94/vblo/05,709.99,yes,locked 2006.229.22:19:21.94/vblo/06,719.99,yes,locked 2006.229.22:19:21.94/vblo/07,734.99,yes,locked 2006.229.22:19:21.94/vblo/08,744.99,yes,locked 2006.229.22:19:22.09/vabw/8 2006.229.22:19:22.24/vbbw/8 2006.229.22:19:22.41/xfe/off,on,12.0 2006.229.22:19:22.79/ifatt/23,28,28,28 2006.229.22:19:23.07/fmout-gps/S +4.58E-07 2006.229.22:19:23.11:!2006.229.22:19:59 2006.229.22:19:59.00:data_valid=off 2006.229.22:19:59.00:"et 2006.229.22:19:59.00:!+3s 2006.229.22:20:02.01:"tape 2006.229.22:20:02.01:postob 2006.229.22:20:02.17/cable/+6.4176E-03 2006.229.22:20:02.17/wx/28.38,1002.4,93 2006.229.22:20:03.07/fmout-gps/S +4.58E-07 2006.229.22:20:03.07:scan_name=229-2227,jd0608,230 2006.229.22:20:03.07:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.22:20:04.13#flagr#flagr/antenna,new-source 2006.229.22:20:04.13:checkk5 2006.229.22:20:04.49/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:20:04.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:20:05.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:20:05.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:20:06.12/chk_obsdata//k5ts1/T2292219??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.22:20:06.51/chk_obsdata//k5ts2/T2292219??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.22:20:06.89/chk_obsdata//k5ts3/T2292219??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.22:20:07.30/chk_obsdata//k5ts4/T2292219??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.229.22:20:08.02/k5log//k5ts1_log_newline 2006.229.22:20:08.72/k5log//k5ts2_log_newline 2006.229.22:20:09.43/k5log//k5ts3_log_newline 2006.229.22:20:10.14/k5log//k5ts4_log_newline 2006.229.22:20:10.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:20:10.16:setupk4=1 2006.229.22:20:10.16$setupk4/echo=on 2006.229.22:20:10.16$setupk4/pcalon 2006.229.22:20:10.16$pcalon/"no phase cal control is implemented here 2006.229.22:20:10.16$setupk4/"tpicd=stop 2006.229.22:20:10.16$setupk4/"rec=synch_on 2006.229.22:20:10.16$setupk4/"rec_mode=128 2006.229.22:20:10.16$setupk4/!* 2006.229.22:20:10.16$setupk4/recpk4 2006.229.22:20:10.16$recpk4/recpatch= 2006.229.22:20:10.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:20:10.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:20:10.16$setupk4/vck44 2006.229.22:20:10.16$vck44/valo=1,524.99 2006.229.22:20:10.16#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.22:20:10.16#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.22:20:10.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:10.16#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:10.16#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:10.16#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:10.16#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:20:10.16#ibcon#first serial, iclass 4, count 0 2006.229.22:20:10.16#ibcon#enter sib2, iclass 4, count 0 2006.229.22:20:10.16#ibcon#flushed, iclass 4, count 0 2006.229.22:20:10.16#ibcon#about to write, iclass 4, count 0 2006.229.22:20:10.16#ibcon#wrote, iclass 4, count 0 2006.229.22:20:10.16#ibcon#about to read 3, iclass 4, count 0 2006.229.22:20:10.18#ibcon#read 3, iclass 4, count 0 2006.229.22:20:10.18#ibcon#about to read 4, iclass 4, count 0 2006.229.22:20:10.18#ibcon#read 4, iclass 4, count 0 2006.229.22:20:10.18#ibcon#about to read 5, iclass 4, count 0 2006.229.22:20:10.18#ibcon#read 5, iclass 4, count 0 2006.229.22:20:10.18#ibcon#about to read 6, iclass 4, count 0 2006.229.22:20:10.18#ibcon#read 6, iclass 4, count 0 2006.229.22:20:10.18#ibcon#end of sib2, iclass 4, count 0 2006.229.22:20:10.18#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:20:10.18#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:20:10.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:20:10.18#ibcon#*before write, iclass 4, count 0 2006.229.22:20:10.18#ibcon#enter sib2, iclass 4, count 0 2006.229.22:20:10.18#ibcon#flushed, iclass 4, count 0 2006.229.22:20:10.18#ibcon#about to write, iclass 4, count 0 2006.229.22:20:10.18#ibcon#wrote, iclass 4, count 0 2006.229.22:20:10.18#ibcon#about to read 3, iclass 4, count 0 2006.229.22:20:10.23#ibcon#read 3, iclass 4, count 0 2006.229.22:20:10.23#ibcon#about to read 4, iclass 4, count 0 2006.229.22:20:10.23#ibcon#read 4, iclass 4, count 0 2006.229.22:20:10.23#ibcon#about to read 5, iclass 4, count 0 2006.229.22:20:10.23#ibcon#read 5, iclass 4, count 0 2006.229.22:20:10.23#ibcon#about to read 6, iclass 4, count 0 2006.229.22:20:10.23#ibcon#read 6, iclass 4, count 0 2006.229.22:20:10.23#ibcon#end of sib2, iclass 4, count 0 2006.229.22:20:10.23#ibcon#*after write, iclass 4, count 0 2006.229.22:20:10.23#ibcon#*before return 0, iclass 4, count 0 2006.229.22:20:10.23#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:10.23#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:10.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:20:10.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:20:10.23$vck44/va=1,8 2006.229.22:20:10.23#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.22:20:10.23#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.22:20:10.23#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:10.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:10.23#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:10.23#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:10.23#ibcon#enter wrdev, iclass 6, count 2 2006.229.22:20:10.23#ibcon#first serial, iclass 6, count 2 2006.229.22:20:10.23#ibcon#enter sib2, iclass 6, count 2 2006.229.22:20:10.23#ibcon#flushed, iclass 6, count 2 2006.229.22:20:10.23#ibcon#about to write, iclass 6, count 2 2006.229.22:20:10.23#ibcon#wrote, iclass 6, count 2 2006.229.22:20:10.23#ibcon#about to read 3, iclass 6, count 2 2006.229.22:20:10.25#ibcon#read 3, iclass 6, count 2 2006.229.22:20:10.25#ibcon#about to read 4, iclass 6, count 2 2006.229.22:20:10.25#ibcon#read 4, iclass 6, count 2 2006.229.22:20:10.25#ibcon#about to read 5, iclass 6, count 2 2006.229.22:20:10.25#ibcon#read 5, iclass 6, count 2 2006.229.22:20:10.25#ibcon#about to read 6, iclass 6, count 2 2006.229.22:20:10.25#ibcon#read 6, iclass 6, count 2 2006.229.22:20:10.25#ibcon#end of sib2, iclass 6, count 2 2006.229.22:20:10.25#ibcon#*mode == 0, iclass 6, count 2 2006.229.22:20:10.25#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.22:20:10.25#ibcon#[25=AT01-08\r\n] 2006.229.22:20:10.25#ibcon#*before write, iclass 6, count 2 2006.229.22:20:10.25#ibcon#enter sib2, iclass 6, count 2 2006.229.22:20:10.25#ibcon#flushed, iclass 6, count 2 2006.229.22:20:10.25#ibcon#about to write, iclass 6, count 2 2006.229.22:20:10.25#ibcon#wrote, iclass 6, count 2 2006.229.22:20:10.25#ibcon#about to read 3, iclass 6, count 2 2006.229.22:20:10.28#ibcon#read 3, iclass 6, count 2 2006.229.22:20:10.28#ibcon#about to read 4, iclass 6, count 2 2006.229.22:20:10.28#ibcon#read 4, iclass 6, count 2 2006.229.22:20:10.28#ibcon#about to read 5, iclass 6, count 2 2006.229.22:20:10.28#ibcon#read 5, iclass 6, count 2 2006.229.22:20:10.28#ibcon#about to read 6, iclass 6, count 2 2006.229.22:20:10.28#ibcon#read 6, iclass 6, count 2 2006.229.22:20:10.28#ibcon#end of sib2, iclass 6, count 2 2006.229.22:20:10.28#ibcon#*after write, iclass 6, count 2 2006.229.22:20:10.28#ibcon#*before return 0, iclass 6, count 2 2006.229.22:20:10.28#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:10.28#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:10.28#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.22:20:10.28#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:10.28#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:10.40#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:10.40#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:10.40#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:20:10.40#ibcon#first serial, iclass 6, count 0 2006.229.22:20:10.40#ibcon#enter sib2, iclass 6, count 0 2006.229.22:20:10.40#ibcon#flushed, iclass 6, count 0 2006.229.22:20:10.40#ibcon#about to write, iclass 6, count 0 2006.229.22:20:10.40#ibcon#wrote, iclass 6, count 0 2006.229.22:20:10.40#ibcon#about to read 3, iclass 6, count 0 2006.229.22:20:10.42#ibcon#read 3, iclass 6, count 0 2006.229.22:20:10.42#ibcon#about to read 4, iclass 6, count 0 2006.229.22:20:10.42#ibcon#read 4, iclass 6, count 0 2006.229.22:20:10.42#ibcon#about to read 5, iclass 6, count 0 2006.229.22:20:10.42#ibcon#read 5, iclass 6, count 0 2006.229.22:20:10.42#ibcon#about to read 6, iclass 6, count 0 2006.229.22:20:10.42#ibcon#read 6, iclass 6, count 0 2006.229.22:20:10.42#ibcon#end of sib2, iclass 6, count 0 2006.229.22:20:10.42#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:20:10.42#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:20:10.42#ibcon#[25=USB\r\n] 2006.229.22:20:10.42#ibcon#*before write, iclass 6, count 0 2006.229.22:20:10.42#ibcon#enter sib2, iclass 6, count 0 2006.229.22:20:10.42#ibcon#flushed, iclass 6, count 0 2006.229.22:20:10.42#ibcon#about to write, iclass 6, count 0 2006.229.22:20:10.42#ibcon#wrote, iclass 6, count 0 2006.229.22:20:10.42#ibcon#about to read 3, iclass 6, count 0 2006.229.22:20:10.45#ibcon#read 3, iclass 6, count 0 2006.229.22:20:10.45#ibcon#about to read 4, iclass 6, count 0 2006.229.22:20:10.45#ibcon#read 4, iclass 6, count 0 2006.229.22:20:10.45#ibcon#about to read 5, iclass 6, count 0 2006.229.22:20:10.45#ibcon#read 5, iclass 6, count 0 2006.229.22:20:10.45#ibcon#about to read 6, iclass 6, count 0 2006.229.22:20:10.45#ibcon#read 6, iclass 6, count 0 2006.229.22:20:10.45#ibcon#end of sib2, iclass 6, count 0 2006.229.22:20:10.45#ibcon#*after write, iclass 6, count 0 2006.229.22:20:10.45#ibcon#*before return 0, iclass 6, count 0 2006.229.22:20:10.45#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:10.45#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:10.45#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:20:10.45#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:20:10.45$vck44/valo=2,534.99 2006.229.22:20:10.45#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.22:20:10.45#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.22:20:10.45#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:10.45#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:10.45#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:10.45#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:10.45#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:20:10.45#ibcon#first serial, iclass 10, count 0 2006.229.22:20:10.45#ibcon#enter sib2, iclass 10, count 0 2006.229.22:20:10.45#ibcon#flushed, iclass 10, count 0 2006.229.22:20:10.45#ibcon#about to write, iclass 10, count 0 2006.229.22:20:10.45#ibcon#wrote, iclass 10, count 0 2006.229.22:20:10.45#ibcon#about to read 3, iclass 10, count 0 2006.229.22:20:10.47#ibcon#read 3, iclass 10, count 0 2006.229.22:20:10.47#ibcon#about to read 4, iclass 10, count 0 2006.229.22:20:10.47#ibcon#read 4, iclass 10, count 0 2006.229.22:20:10.47#ibcon#about to read 5, iclass 10, count 0 2006.229.22:20:10.47#ibcon#read 5, iclass 10, count 0 2006.229.22:20:10.47#ibcon#about to read 6, iclass 10, count 0 2006.229.22:20:10.47#ibcon#read 6, iclass 10, count 0 2006.229.22:20:10.47#ibcon#end of sib2, iclass 10, count 0 2006.229.22:20:10.47#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:20:10.47#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:20:10.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:20:10.47#ibcon#*before write, iclass 10, count 0 2006.229.22:20:10.47#ibcon#enter sib2, iclass 10, count 0 2006.229.22:20:10.47#ibcon#flushed, iclass 10, count 0 2006.229.22:20:10.47#ibcon#about to write, iclass 10, count 0 2006.229.22:20:10.47#ibcon#wrote, iclass 10, count 0 2006.229.22:20:10.47#ibcon#about to read 3, iclass 10, count 0 2006.229.22:20:10.51#ibcon#read 3, iclass 10, count 0 2006.229.22:20:10.51#ibcon#about to read 4, iclass 10, count 0 2006.229.22:20:10.51#ibcon#read 4, iclass 10, count 0 2006.229.22:20:10.51#ibcon#about to read 5, iclass 10, count 0 2006.229.22:20:10.51#ibcon#read 5, iclass 10, count 0 2006.229.22:20:10.51#ibcon#about to read 6, iclass 10, count 0 2006.229.22:20:10.51#ibcon#read 6, iclass 10, count 0 2006.229.22:20:10.51#ibcon#end of sib2, iclass 10, count 0 2006.229.22:20:10.51#ibcon#*after write, iclass 10, count 0 2006.229.22:20:10.51#ibcon#*before return 0, iclass 10, count 0 2006.229.22:20:10.51#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:10.51#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:10.51#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:20:10.51#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:20:10.51$vck44/va=2,7 2006.229.22:20:10.51#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.22:20:10.51#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.22:20:10.51#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:10.51#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:10.57#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:10.57#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:10.57#ibcon#enter wrdev, iclass 12, count 2 2006.229.22:20:10.57#ibcon#first serial, iclass 12, count 2 2006.229.22:20:10.57#ibcon#enter sib2, iclass 12, count 2 2006.229.22:20:10.57#ibcon#flushed, iclass 12, count 2 2006.229.22:20:10.57#ibcon#about to write, iclass 12, count 2 2006.229.22:20:10.57#ibcon#wrote, iclass 12, count 2 2006.229.22:20:10.57#ibcon#about to read 3, iclass 12, count 2 2006.229.22:20:10.59#ibcon#read 3, iclass 12, count 2 2006.229.22:20:10.59#ibcon#about to read 4, iclass 12, count 2 2006.229.22:20:10.59#ibcon#read 4, iclass 12, count 2 2006.229.22:20:10.59#ibcon#about to read 5, iclass 12, count 2 2006.229.22:20:10.59#ibcon#read 5, iclass 12, count 2 2006.229.22:20:10.59#ibcon#about to read 6, iclass 12, count 2 2006.229.22:20:10.59#ibcon#read 6, iclass 12, count 2 2006.229.22:20:10.59#ibcon#end of sib2, iclass 12, count 2 2006.229.22:20:10.59#ibcon#*mode == 0, iclass 12, count 2 2006.229.22:20:10.59#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.22:20:10.59#ibcon#[25=AT02-07\r\n] 2006.229.22:20:10.59#ibcon#*before write, iclass 12, count 2 2006.229.22:20:10.59#ibcon#enter sib2, iclass 12, count 2 2006.229.22:20:10.59#ibcon#flushed, iclass 12, count 2 2006.229.22:20:10.59#ibcon#about to write, iclass 12, count 2 2006.229.22:20:10.59#ibcon#wrote, iclass 12, count 2 2006.229.22:20:10.59#ibcon#about to read 3, iclass 12, count 2 2006.229.22:20:10.62#ibcon#read 3, iclass 12, count 2 2006.229.22:20:10.62#ibcon#about to read 4, iclass 12, count 2 2006.229.22:20:10.62#ibcon#read 4, iclass 12, count 2 2006.229.22:20:10.62#ibcon#about to read 5, iclass 12, count 2 2006.229.22:20:10.62#ibcon#read 5, iclass 12, count 2 2006.229.22:20:10.62#ibcon#about to read 6, iclass 12, count 2 2006.229.22:20:10.62#ibcon#read 6, iclass 12, count 2 2006.229.22:20:10.62#ibcon#end of sib2, iclass 12, count 2 2006.229.22:20:10.62#ibcon#*after write, iclass 12, count 2 2006.229.22:20:10.62#ibcon#*before return 0, iclass 12, count 2 2006.229.22:20:10.62#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:10.62#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:10.62#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.22:20:10.62#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:10.62#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:10.74#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:10.74#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:10.74#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:20:10.74#ibcon#first serial, iclass 12, count 0 2006.229.22:20:10.74#ibcon#enter sib2, iclass 12, count 0 2006.229.22:20:10.74#ibcon#flushed, iclass 12, count 0 2006.229.22:20:10.74#ibcon#about to write, iclass 12, count 0 2006.229.22:20:10.74#ibcon#wrote, iclass 12, count 0 2006.229.22:20:10.74#ibcon#about to read 3, iclass 12, count 0 2006.229.22:20:10.76#ibcon#read 3, iclass 12, count 0 2006.229.22:20:10.76#ibcon#about to read 4, iclass 12, count 0 2006.229.22:20:10.76#ibcon#read 4, iclass 12, count 0 2006.229.22:20:10.76#ibcon#about to read 5, iclass 12, count 0 2006.229.22:20:10.76#ibcon#read 5, iclass 12, count 0 2006.229.22:20:10.76#ibcon#about to read 6, iclass 12, count 0 2006.229.22:20:10.76#ibcon#read 6, iclass 12, count 0 2006.229.22:20:10.76#ibcon#end of sib2, iclass 12, count 0 2006.229.22:20:10.76#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:20:10.76#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:20:10.76#ibcon#[25=USB\r\n] 2006.229.22:20:10.76#ibcon#*before write, iclass 12, count 0 2006.229.22:20:10.76#ibcon#enter sib2, iclass 12, count 0 2006.229.22:20:10.76#ibcon#flushed, iclass 12, count 0 2006.229.22:20:10.76#ibcon#about to write, iclass 12, count 0 2006.229.22:20:10.76#ibcon#wrote, iclass 12, count 0 2006.229.22:20:10.76#ibcon#about to read 3, iclass 12, count 0 2006.229.22:20:10.79#ibcon#read 3, iclass 12, count 0 2006.229.22:20:10.79#ibcon#about to read 4, iclass 12, count 0 2006.229.22:20:10.79#ibcon#read 4, iclass 12, count 0 2006.229.22:20:10.79#ibcon#about to read 5, iclass 12, count 0 2006.229.22:20:10.79#ibcon#read 5, iclass 12, count 0 2006.229.22:20:10.79#ibcon#about to read 6, iclass 12, count 0 2006.229.22:20:10.79#ibcon#read 6, iclass 12, count 0 2006.229.22:20:10.79#ibcon#end of sib2, iclass 12, count 0 2006.229.22:20:10.79#ibcon#*after write, iclass 12, count 0 2006.229.22:20:10.79#ibcon#*before return 0, iclass 12, count 0 2006.229.22:20:10.79#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:10.79#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:10.79#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:20:10.79#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:20:10.79$vck44/valo=3,564.99 2006.229.22:20:10.79#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:20:10.79#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:20:10.79#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:10.79#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:10.79#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:10.79#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:10.79#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:20:10.79#ibcon#first serial, iclass 14, count 0 2006.229.22:20:10.79#ibcon#enter sib2, iclass 14, count 0 2006.229.22:20:10.79#ibcon#flushed, iclass 14, count 0 2006.229.22:20:10.79#ibcon#about to write, iclass 14, count 0 2006.229.22:20:10.79#ibcon#wrote, iclass 14, count 0 2006.229.22:20:10.79#ibcon#about to read 3, iclass 14, count 0 2006.229.22:20:10.81#ibcon#read 3, iclass 14, count 0 2006.229.22:20:10.81#ibcon#about to read 4, iclass 14, count 0 2006.229.22:20:10.81#ibcon#read 4, iclass 14, count 0 2006.229.22:20:10.81#ibcon#about to read 5, iclass 14, count 0 2006.229.22:20:10.81#ibcon#read 5, iclass 14, count 0 2006.229.22:20:10.81#ibcon#about to read 6, iclass 14, count 0 2006.229.22:20:10.81#ibcon#read 6, iclass 14, count 0 2006.229.22:20:10.81#ibcon#end of sib2, iclass 14, count 0 2006.229.22:20:10.81#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:20:10.81#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:20:10.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:20:10.81#ibcon#*before write, iclass 14, count 0 2006.229.22:20:10.81#ibcon#enter sib2, iclass 14, count 0 2006.229.22:20:10.81#ibcon#flushed, iclass 14, count 0 2006.229.22:20:10.81#ibcon#about to write, iclass 14, count 0 2006.229.22:20:10.81#ibcon#wrote, iclass 14, count 0 2006.229.22:20:10.81#ibcon#about to read 3, iclass 14, count 0 2006.229.22:20:10.85#ibcon#read 3, iclass 14, count 0 2006.229.22:20:10.85#ibcon#about to read 4, iclass 14, count 0 2006.229.22:20:10.85#ibcon#read 4, iclass 14, count 0 2006.229.22:20:10.85#ibcon#about to read 5, iclass 14, count 0 2006.229.22:20:10.85#ibcon#read 5, iclass 14, count 0 2006.229.22:20:10.85#ibcon#about to read 6, iclass 14, count 0 2006.229.22:20:10.85#ibcon#read 6, iclass 14, count 0 2006.229.22:20:10.85#ibcon#end of sib2, iclass 14, count 0 2006.229.22:20:10.85#ibcon#*after write, iclass 14, count 0 2006.229.22:20:10.85#ibcon#*before return 0, iclass 14, count 0 2006.229.22:20:10.85#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:10.85#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:10.85#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:20:10.85#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:20:10.85$vck44/va=3,6 2006.229.22:20:10.85#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.22:20:10.85#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.22:20:10.85#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:10.85#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:10.91#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:10.91#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:10.91#ibcon#enter wrdev, iclass 16, count 2 2006.229.22:20:10.91#ibcon#first serial, iclass 16, count 2 2006.229.22:20:10.91#ibcon#enter sib2, iclass 16, count 2 2006.229.22:20:10.91#ibcon#flushed, iclass 16, count 2 2006.229.22:20:10.91#ibcon#about to write, iclass 16, count 2 2006.229.22:20:10.91#ibcon#wrote, iclass 16, count 2 2006.229.22:20:10.91#ibcon#about to read 3, iclass 16, count 2 2006.229.22:20:10.93#ibcon#read 3, iclass 16, count 2 2006.229.22:20:10.93#ibcon#about to read 4, iclass 16, count 2 2006.229.22:20:10.93#ibcon#read 4, iclass 16, count 2 2006.229.22:20:10.93#ibcon#about to read 5, iclass 16, count 2 2006.229.22:20:10.93#ibcon#read 5, iclass 16, count 2 2006.229.22:20:10.93#ibcon#about to read 6, iclass 16, count 2 2006.229.22:20:10.93#ibcon#read 6, iclass 16, count 2 2006.229.22:20:10.93#ibcon#end of sib2, iclass 16, count 2 2006.229.22:20:10.93#ibcon#*mode == 0, iclass 16, count 2 2006.229.22:20:10.93#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.22:20:10.93#ibcon#[25=AT03-06\r\n] 2006.229.22:20:10.93#ibcon#*before write, iclass 16, count 2 2006.229.22:20:10.93#ibcon#enter sib2, iclass 16, count 2 2006.229.22:20:10.93#ibcon#flushed, iclass 16, count 2 2006.229.22:20:10.93#ibcon#about to write, iclass 16, count 2 2006.229.22:20:10.93#ibcon#wrote, iclass 16, count 2 2006.229.22:20:10.93#ibcon#about to read 3, iclass 16, count 2 2006.229.22:20:10.96#ibcon#read 3, iclass 16, count 2 2006.229.22:20:10.96#ibcon#about to read 4, iclass 16, count 2 2006.229.22:20:10.96#ibcon#read 4, iclass 16, count 2 2006.229.22:20:10.96#ibcon#about to read 5, iclass 16, count 2 2006.229.22:20:10.96#ibcon#read 5, iclass 16, count 2 2006.229.22:20:10.96#ibcon#about to read 6, iclass 16, count 2 2006.229.22:20:10.96#ibcon#read 6, iclass 16, count 2 2006.229.22:20:10.96#ibcon#end of sib2, iclass 16, count 2 2006.229.22:20:10.96#ibcon#*after write, iclass 16, count 2 2006.229.22:20:10.96#ibcon#*before return 0, iclass 16, count 2 2006.229.22:20:10.96#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:10.96#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:10.96#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.22:20:10.96#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:10.96#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:11.08#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:11.08#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:11.08#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:20:11.08#ibcon#first serial, iclass 16, count 0 2006.229.22:20:11.08#ibcon#enter sib2, iclass 16, count 0 2006.229.22:20:11.08#ibcon#flushed, iclass 16, count 0 2006.229.22:20:11.08#ibcon#about to write, iclass 16, count 0 2006.229.22:20:11.08#ibcon#wrote, iclass 16, count 0 2006.229.22:20:11.08#ibcon#about to read 3, iclass 16, count 0 2006.229.22:20:11.10#ibcon#read 3, iclass 16, count 0 2006.229.22:20:11.10#ibcon#about to read 4, iclass 16, count 0 2006.229.22:20:11.10#ibcon#read 4, iclass 16, count 0 2006.229.22:20:11.10#ibcon#about to read 5, iclass 16, count 0 2006.229.22:20:11.10#ibcon#read 5, iclass 16, count 0 2006.229.22:20:11.10#ibcon#about to read 6, iclass 16, count 0 2006.229.22:20:11.10#ibcon#read 6, iclass 16, count 0 2006.229.22:20:11.10#ibcon#end of sib2, iclass 16, count 0 2006.229.22:20:11.10#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:20:11.10#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:20:11.10#ibcon#[25=USB\r\n] 2006.229.22:20:11.10#ibcon#*before write, iclass 16, count 0 2006.229.22:20:11.10#ibcon#enter sib2, iclass 16, count 0 2006.229.22:20:11.10#ibcon#flushed, iclass 16, count 0 2006.229.22:20:11.10#ibcon#about to write, iclass 16, count 0 2006.229.22:20:11.10#ibcon#wrote, iclass 16, count 0 2006.229.22:20:11.10#ibcon#about to read 3, iclass 16, count 0 2006.229.22:20:11.13#ibcon#read 3, iclass 16, count 0 2006.229.22:20:11.13#ibcon#about to read 4, iclass 16, count 0 2006.229.22:20:11.13#ibcon#read 4, iclass 16, count 0 2006.229.22:20:11.13#ibcon#about to read 5, iclass 16, count 0 2006.229.22:20:11.13#ibcon#read 5, iclass 16, count 0 2006.229.22:20:11.13#ibcon#about to read 6, iclass 16, count 0 2006.229.22:20:11.13#ibcon#read 6, iclass 16, count 0 2006.229.22:20:11.13#ibcon#end of sib2, iclass 16, count 0 2006.229.22:20:11.13#ibcon#*after write, iclass 16, count 0 2006.229.22:20:11.13#ibcon#*before return 0, iclass 16, count 0 2006.229.22:20:11.13#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:11.13#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:11.13#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:20:11.13#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:20:11.13$vck44/valo=4,624.99 2006.229.22:20:11.13#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:20:11.13#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:20:11.13#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:11.13#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:11.13#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:11.13#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:11.13#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:20:11.13#ibcon#first serial, iclass 18, count 0 2006.229.22:20:11.13#ibcon#enter sib2, iclass 18, count 0 2006.229.22:20:11.13#ibcon#flushed, iclass 18, count 0 2006.229.22:20:11.13#ibcon#about to write, iclass 18, count 0 2006.229.22:20:11.13#ibcon#wrote, iclass 18, count 0 2006.229.22:20:11.13#ibcon#about to read 3, iclass 18, count 0 2006.229.22:20:11.15#ibcon#read 3, iclass 18, count 0 2006.229.22:20:11.15#ibcon#about to read 4, iclass 18, count 0 2006.229.22:20:11.15#ibcon#read 4, iclass 18, count 0 2006.229.22:20:11.15#ibcon#about to read 5, iclass 18, count 0 2006.229.22:20:11.15#ibcon#read 5, iclass 18, count 0 2006.229.22:20:11.15#ibcon#about to read 6, iclass 18, count 0 2006.229.22:20:11.15#ibcon#read 6, iclass 18, count 0 2006.229.22:20:11.15#ibcon#end of sib2, iclass 18, count 0 2006.229.22:20:11.15#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:20:11.15#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:20:11.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:20:11.15#ibcon#*before write, iclass 18, count 0 2006.229.22:20:11.15#ibcon#enter sib2, iclass 18, count 0 2006.229.22:20:11.15#ibcon#flushed, iclass 18, count 0 2006.229.22:20:11.15#ibcon#about to write, iclass 18, count 0 2006.229.22:20:11.15#ibcon#wrote, iclass 18, count 0 2006.229.22:20:11.15#ibcon#about to read 3, iclass 18, count 0 2006.229.22:20:11.19#ibcon#read 3, iclass 18, count 0 2006.229.22:20:11.19#ibcon#about to read 4, iclass 18, count 0 2006.229.22:20:11.19#ibcon#read 4, iclass 18, count 0 2006.229.22:20:11.19#ibcon#about to read 5, iclass 18, count 0 2006.229.22:20:11.19#ibcon#read 5, iclass 18, count 0 2006.229.22:20:11.19#ibcon#about to read 6, iclass 18, count 0 2006.229.22:20:11.19#ibcon#read 6, iclass 18, count 0 2006.229.22:20:11.19#ibcon#end of sib2, iclass 18, count 0 2006.229.22:20:11.19#ibcon#*after write, iclass 18, count 0 2006.229.22:20:11.19#ibcon#*before return 0, iclass 18, count 0 2006.229.22:20:11.19#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:11.19#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:11.19#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:20:11.19#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:20:11.19$vck44/va=4,7 2006.229.22:20:11.19#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.22:20:11.19#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.22:20:11.19#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:11.19#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:11.25#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:11.25#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:11.25#ibcon#enter wrdev, iclass 20, count 2 2006.229.22:20:11.25#ibcon#first serial, iclass 20, count 2 2006.229.22:20:11.25#ibcon#enter sib2, iclass 20, count 2 2006.229.22:20:11.25#ibcon#flushed, iclass 20, count 2 2006.229.22:20:11.25#ibcon#about to write, iclass 20, count 2 2006.229.22:20:11.25#ibcon#wrote, iclass 20, count 2 2006.229.22:20:11.25#ibcon#about to read 3, iclass 20, count 2 2006.229.22:20:11.27#ibcon#read 3, iclass 20, count 2 2006.229.22:20:11.27#ibcon#about to read 4, iclass 20, count 2 2006.229.22:20:11.27#ibcon#read 4, iclass 20, count 2 2006.229.22:20:11.27#ibcon#about to read 5, iclass 20, count 2 2006.229.22:20:11.27#ibcon#read 5, iclass 20, count 2 2006.229.22:20:11.27#ibcon#about to read 6, iclass 20, count 2 2006.229.22:20:11.27#ibcon#read 6, iclass 20, count 2 2006.229.22:20:11.27#ibcon#end of sib2, iclass 20, count 2 2006.229.22:20:11.27#ibcon#*mode == 0, iclass 20, count 2 2006.229.22:20:11.27#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.22:20:11.27#ibcon#[25=AT04-07\r\n] 2006.229.22:20:11.27#ibcon#*before write, iclass 20, count 2 2006.229.22:20:11.27#ibcon#enter sib2, iclass 20, count 2 2006.229.22:20:11.27#ibcon#flushed, iclass 20, count 2 2006.229.22:20:11.27#ibcon#about to write, iclass 20, count 2 2006.229.22:20:11.27#ibcon#wrote, iclass 20, count 2 2006.229.22:20:11.27#ibcon#about to read 3, iclass 20, count 2 2006.229.22:20:11.30#ibcon#read 3, iclass 20, count 2 2006.229.22:20:11.30#ibcon#about to read 4, iclass 20, count 2 2006.229.22:20:11.30#ibcon#read 4, iclass 20, count 2 2006.229.22:20:11.30#ibcon#about to read 5, iclass 20, count 2 2006.229.22:20:11.30#ibcon#read 5, iclass 20, count 2 2006.229.22:20:11.30#ibcon#about to read 6, iclass 20, count 2 2006.229.22:20:11.30#ibcon#read 6, iclass 20, count 2 2006.229.22:20:11.30#ibcon#end of sib2, iclass 20, count 2 2006.229.22:20:11.30#ibcon#*after write, iclass 20, count 2 2006.229.22:20:11.30#ibcon#*before return 0, iclass 20, count 2 2006.229.22:20:11.30#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:11.30#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:11.30#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.22:20:11.30#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:11.30#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:11.42#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:11.42#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:11.42#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:20:11.42#ibcon#first serial, iclass 20, count 0 2006.229.22:20:11.42#ibcon#enter sib2, iclass 20, count 0 2006.229.22:20:11.42#ibcon#flushed, iclass 20, count 0 2006.229.22:20:11.42#ibcon#about to write, iclass 20, count 0 2006.229.22:20:11.42#ibcon#wrote, iclass 20, count 0 2006.229.22:20:11.42#ibcon#about to read 3, iclass 20, count 0 2006.229.22:20:11.44#ibcon#read 3, iclass 20, count 0 2006.229.22:20:11.44#ibcon#about to read 4, iclass 20, count 0 2006.229.22:20:11.44#ibcon#read 4, iclass 20, count 0 2006.229.22:20:11.44#ibcon#about to read 5, iclass 20, count 0 2006.229.22:20:11.44#ibcon#read 5, iclass 20, count 0 2006.229.22:20:11.44#ibcon#about to read 6, iclass 20, count 0 2006.229.22:20:11.44#ibcon#read 6, iclass 20, count 0 2006.229.22:20:11.44#ibcon#end of sib2, iclass 20, count 0 2006.229.22:20:11.44#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:20:11.44#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:20:11.44#ibcon#[25=USB\r\n] 2006.229.22:20:11.44#ibcon#*before write, iclass 20, count 0 2006.229.22:20:11.44#ibcon#enter sib2, iclass 20, count 0 2006.229.22:20:11.44#ibcon#flushed, iclass 20, count 0 2006.229.22:20:11.44#ibcon#about to write, iclass 20, count 0 2006.229.22:20:11.44#ibcon#wrote, iclass 20, count 0 2006.229.22:20:11.44#ibcon#about to read 3, iclass 20, count 0 2006.229.22:20:11.47#ibcon#read 3, iclass 20, count 0 2006.229.22:20:11.47#ibcon#about to read 4, iclass 20, count 0 2006.229.22:20:11.47#ibcon#read 4, iclass 20, count 0 2006.229.22:20:11.47#ibcon#about to read 5, iclass 20, count 0 2006.229.22:20:11.47#ibcon#read 5, iclass 20, count 0 2006.229.22:20:11.47#ibcon#about to read 6, iclass 20, count 0 2006.229.22:20:11.47#ibcon#read 6, iclass 20, count 0 2006.229.22:20:11.47#ibcon#end of sib2, iclass 20, count 0 2006.229.22:20:11.47#ibcon#*after write, iclass 20, count 0 2006.229.22:20:11.47#ibcon#*before return 0, iclass 20, count 0 2006.229.22:20:11.47#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:11.47#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:11.47#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:20:11.47#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:20:11.47$vck44/valo=5,734.99 2006.229.22:20:11.47#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.22:20:11.47#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.22:20:11.47#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:11.47#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:11.47#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:11.47#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:11.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:20:11.47#ibcon#first serial, iclass 22, count 0 2006.229.22:20:11.47#ibcon#enter sib2, iclass 22, count 0 2006.229.22:20:11.47#ibcon#flushed, iclass 22, count 0 2006.229.22:20:11.47#ibcon#about to write, iclass 22, count 0 2006.229.22:20:11.47#ibcon#wrote, iclass 22, count 0 2006.229.22:20:11.47#ibcon#about to read 3, iclass 22, count 0 2006.229.22:20:11.49#ibcon#read 3, iclass 22, count 0 2006.229.22:20:11.49#ibcon#about to read 4, iclass 22, count 0 2006.229.22:20:11.49#ibcon#read 4, iclass 22, count 0 2006.229.22:20:11.49#ibcon#about to read 5, iclass 22, count 0 2006.229.22:20:11.49#ibcon#read 5, iclass 22, count 0 2006.229.22:20:11.49#ibcon#about to read 6, iclass 22, count 0 2006.229.22:20:11.49#ibcon#read 6, iclass 22, count 0 2006.229.22:20:11.49#ibcon#end of sib2, iclass 22, count 0 2006.229.22:20:11.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:20:11.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:20:11.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:20:11.49#ibcon#*before write, iclass 22, count 0 2006.229.22:20:11.49#ibcon#enter sib2, iclass 22, count 0 2006.229.22:20:11.49#ibcon#flushed, iclass 22, count 0 2006.229.22:20:11.49#ibcon#about to write, iclass 22, count 0 2006.229.22:20:11.49#ibcon#wrote, iclass 22, count 0 2006.229.22:20:11.49#ibcon#about to read 3, iclass 22, count 0 2006.229.22:20:11.53#ibcon#read 3, iclass 22, count 0 2006.229.22:20:11.53#ibcon#about to read 4, iclass 22, count 0 2006.229.22:20:11.53#ibcon#read 4, iclass 22, count 0 2006.229.22:20:11.53#ibcon#about to read 5, iclass 22, count 0 2006.229.22:20:11.53#ibcon#read 5, iclass 22, count 0 2006.229.22:20:11.53#ibcon#about to read 6, iclass 22, count 0 2006.229.22:20:11.53#ibcon#read 6, iclass 22, count 0 2006.229.22:20:11.53#ibcon#end of sib2, iclass 22, count 0 2006.229.22:20:11.53#ibcon#*after write, iclass 22, count 0 2006.229.22:20:11.53#ibcon#*before return 0, iclass 22, count 0 2006.229.22:20:11.53#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:11.53#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:11.53#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:20:11.53#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:20:11.53$vck44/va=5,4 2006.229.22:20:11.53#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.22:20:11.53#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.22:20:11.53#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:11.53#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:11.59#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:11.59#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:11.59#ibcon#enter wrdev, iclass 24, count 2 2006.229.22:20:11.59#ibcon#first serial, iclass 24, count 2 2006.229.22:20:11.59#ibcon#enter sib2, iclass 24, count 2 2006.229.22:20:11.59#ibcon#flushed, iclass 24, count 2 2006.229.22:20:11.59#ibcon#about to write, iclass 24, count 2 2006.229.22:20:11.59#ibcon#wrote, iclass 24, count 2 2006.229.22:20:11.59#ibcon#about to read 3, iclass 24, count 2 2006.229.22:20:11.61#ibcon#read 3, iclass 24, count 2 2006.229.22:20:11.61#ibcon#about to read 4, iclass 24, count 2 2006.229.22:20:11.61#ibcon#read 4, iclass 24, count 2 2006.229.22:20:11.61#ibcon#about to read 5, iclass 24, count 2 2006.229.22:20:11.61#ibcon#read 5, iclass 24, count 2 2006.229.22:20:11.61#ibcon#about to read 6, iclass 24, count 2 2006.229.22:20:11.61#ibcon#read 6, iclass 24, count 2 2006.229.22:20:11.61#ibcon#end of sib2, iclass 24, count 2 2006.229.22:20:11.61#ibcon#*mode == 0, iclass 24, count 2 2006.229.22:20:11.61#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.22:20:11.61#ibcon#[25=AT05-04\r\n] 2006.229.22:20:11.61#ibcon#*before write, iclass 24, count 2 2006.229.22:20:11.61#ibcon#enter sib2, iclass 24, count 2 2006.229.22:20:11.61#ibcon#flushed, iclass 24, count 2 2006.229.22:20:11.61#ibcon#about to write, iclass 24, count 2 2006.229.22:20:11.61#ibcon#wrote, iclass 24, count 2 2006.229.22:20:11.61#ibcon#about to read 3, iclass 24, count 2 2006.229.22:20:11.64#ibcon#read 3, iclass 24, count 2 2006.229.22:20:11.64#ibcon#about to read 4, iclass 24, count 2 2006.229.22:20:11.64#ibcon#read 4, iclass 24, count 2 2006.229.22:20:11.64#ibcon#about to read 5, iclass 24, count 2 2006.229.22:20:11.64#ibcon#read 5, iclass 24, count 2 2006.229.22:20:11.64#ibcon#about to read 6, iclass 24, count 2 2006.229.22:20:11.64#ibcon#read 6, iclass 24, count 2 2006.229.22:20:11.64#ibcon#end of sib2, iclass 24, count 2 2006.229.22:20:11.64#ibcon#*after write, iclass 24, count 2 2006.229.22:20:11.64#ibcon#*before return 0, iclass 24, count 2 2006.229.22:20:11.64#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:11.64#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:11.64#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.22:20:11.64#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:11.64#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:11.76#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:11.76#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:11.76#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:20:11.76#ibcon#first serial, iclass 24, count 0 2006.229.22:20:11.76#ibcon#enter sib2, iclass 24, count 0 2006.229.22:20:11.76#ibcon#flushed, iclass 24, count 0 2006.229.22:20:11.76#ibcon#about to write, iclass 24, count 0 2006.229.22:20:11.76#ibcon#wrote, iclass 24, count 0 2006.229.22:20:11.76#ibcon#about to read 3, iclass 24, count 0 2006.229.22:20:11.78#ibcon#read 3, iclass 24, count 0 2006.229.22:20:11.78#ibcon#about to read 4, iclass 24, count 0 2006.229.22:20:11.78#ibcon#read 4, iclass 24, count 0 2006.229.22:20:11.78#ibcon#about to read 5, iclass 24, count 0 2006.229.22:20:11.78#ibcon#read 5, iclass 24, count 0 2006.229.22:20:11.78#ibcon#about to read 6, iclass 24, count 0 2006.229.22:20:11.78#ibcon#read 6, iclass 24, count 0 2006.229.22:20:11.78#ibcon#end of sib2, iclass 24, count 0 2006.229.22:20:11.78#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:20:11.78#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:20:11.78#ibcon#[25=USB\r\n] 2006.229.22:20:11.78#ibcon#*before write, iclass 24, count 0 2006.229.22:20:11.78#ibcon#enter sib2, iclass 24, count 0 2006.229.22:20:11.78#ibcon#flushed, iclass 24, count 0 2006.229.22:20:11.78#ibcon#about to write, iclass 24, count 0 2006.229.22:20:11.78#ibcon#wrote, iclass 24, count 0 2006.229.22:20:11.78#ibcon#about to read 3, iclass 24, count 0 2006.229.22:20:11.81#ibcon#read 3, iclass 24, count 0 2006.229.22:20:11.81#ibcon#about to read 4, iclass 24, count 0 2006.229.22:20:11.81#ibcon#read 4, iclass 24, count 0 2006.229.22:20:11.81#ibcon#about to read 5, iclass 24, count 0 2006.229.22:20:11.81#ibcon#read 5, iclass 24, count 0 2006.229.22:20:11.81#ibcon#about to read 6, iclass 24, count 0 2006.229.22:20:11.81#ibcon#read 6, iclass 24, count 0 2006.229.22:20:11.81#ibcon#end of sib2, iclass 24, count 0 2006.229.22:20:11.81#ibcon#*after write, iclass 24, count 0 2006.229.22:20:11.81#ibcon#*before return 0, iclass 24, count 0 2006.229.22:20:11.81#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:11.81#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:11.81#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:20:11.81#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:20:11.81$vck44/valo=6,814.99 2006.229.22:20:11.81#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.22:20:11.81#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.22:20:11.81#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:11.81#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:11.81#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:11.81#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:11.81#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:20:11.81#ibcon#first serial, iclass 26, count 0 2006.229.22:20:11.81#ibcon#enter sib2, iclass 26, count 0 2006.229.22:20:11.81#ibcon#flushed, iclass 26, count 0 2006.229.22:20:11.81#ibcon#about to write, iclass 26, count 0 2006.229.22:20:11.81#ibcon#wrote, iclass 26, count 0 2006.229.22:20:11.81#ibcon#about to read 3, iclass 26, count 0 2006.229.22:20:11.83#ibcon#read 3, iclass 26, count 0 2006.229.22:20:11.83#ibcon#about to read 4, iclass 26, count 0 2006.229.22:20:11.83#ibcon#read 4, iclass 26, count 0 2006.229.22:20:11.83#ibcon#about to read 5, iclass 26, count 0 2006.229.22:20:11.83#ibcon#read 5, iclass 26, count 0 2006.229.22:20:11.83#ibcon#about to read 6, iclass 26, count 0 2006.229.22:20:11.83#ibcon#read 6, iclass 26, count 0 2006.229.22:20:11.83#ibcon#end of sib2, iclass 26, count 0 2006.229.22:20:11.83#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:20:11.83#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:20:11.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:20:11.83#ibcon#*before write, iclass 26, count 0 2006.229.22:20:11.83#ibcon#enter sib2, iclass 26, count 0 2006.229.22:20:11.83#ibcon#flushed, iclass 26, count 0 2006.229.22:20:11.83#ibcon#about to write, iclass 26, count 0 2006.229.22:20:11.83#ibcon#wrote, iclass 26, count 0 2006.229.22:20:11.83#ibcon#about to read 3, iclass 26, count 0 2006.229.22:20:11.87#ibcon#read 3, iclass 26, count 0 2006.229.22:20:11.87#ibcon#about to read 4, iclass 26, count 0 2006.229.22:20:11.87#ibcon#read 4, iclass 26, count 0 2006.229.22:20:11.87#ibcon#about to read 5, iclass 26, count 0 2006.229.22:20:11.87#ibcon#read 5, iclass 26, count 0 2006.229.22:20:11.87#ibcon#about to read 6, iclass 26, count 0 2006.229.22:20:11.87#ibcon#read 6, iclass 26, count 0 2006.229.22:20:11.87#ibcon#end of sib2, iclass 26, count 0 2006.229.22:20:11.87#ibcon#*after write, iclass 26, count 0 2006.229.22:20:11.87#ibcon#*before return 0, iclass 26, count 0 2006.229.22:20:11.87#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:11.87#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:11.87#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:20:11.87#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:20:11.87$vck44/va=6,4 2006.229.22:20:11.87#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.22:20:11.87#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.22:20:11.87#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:11.87#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:11.93#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:11.93#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:11.93#ibcon#enter wrdev, iclass 28, count 2 2006.229.22:20:11.93#ibcon#first serial, iclass 28, count 2 2006.229.22:20:11.93#ibcon#enter sib2, iclass 28, count 2 2006.229.22:20:11.93#ibcon#flushed, iclass 28, count 2 2006.229.22:20:11.93#ibcon#about to write, iclass 28, count 2 2006.229.22:20:11.93#ibcon#wrote, iclass 28, count 2 2006.229.22:20:11.93#ibcon#about to read 3, iclass 28, count 2 2006.229.22:20:11.95#ibcon#read 3, iclass 28, count 2 2006.229.22:20:11.95#ibcon#about to read 4, iclass 28, count 2 2006.229.22:20:11.95#ibcon#read 4, iclass 28, count 2 2006.229.22:20:11.95#ibcon#about to read 5, iclass 28, count 2 2006.229.22:20:11.95#ibcon#read 5, iclass 28, count 2 2006.229.22:20:11.95#ibcon#about to read 6, iclass 28, count 2 2006.229.22:20:11.95#ibcon#read 6, iclass 28, count 2 2006.229.22:20:11.95#ibcon#end of sib2, iclass 28, count 2 2006.229.22:20:11.95#ibcon#*mode == 0, iclass 28, count 2 2006.229.22:20:11.95#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.22:20:11.95#ibcon#[25=AT06-04\r\n] 2006.229.22:20:11.95#ibcon#*before write, iclass 28, count 2 2006.229.22:20:11.95#ibcon#enter sib2, iclass 28, count 2 2006.229.22:20:11.95#ibcon#flushed, iclass 28, count 2 2006.229.22:20:11.95#ibcon#about to write, iclass 28, count 2 2006.229.22:20:11.95#ibcon#wrote, iclass 28, count 2 2006.229.22:20:11.95#ibcon#about to read 3, iclass 28, count 2 2006.229.22:20:11.98#ibcon#read 3, iclass 28, count 2 2006.229.22:20:11.98#ibcon#about to read 4, iclass 28, count 2 2006.229.22:20:11.98#ibcon#read 4, iclass 28, count 2 2006.229.22:20:11.98#ibcon#about to read 5, iclass 28, count 2 2006.229.22:20:11.98#ibcon#read 5, iclass 28, count 2 2006.229.22:20:11.98#ibcon#about to read 6, iclass 28, count 2 2006.229.22:20:11.98#ibcon#read 6, iclass 28, count 2 2006.229.22:20:11.98#ibcon#end of sib2, iclass 28, count 2 2006.229.22:20:11.98#ibcon#*after write, iclass 28, count 2 2006.229.22:20:11.98#ibcon#*before return 0, iclass 28, count 2 2006.229.22:20:11.98#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:11.98#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:11.98#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.22:20:11.98#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:11.98#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:12.10#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:12.10#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:12.10#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:20:12.10#ibcon#first serial, iclass 28, count 0 2006.229.22:20:12.10#ibcon#enter sib2, iclass 28, count 0 2006.229.22:20:12.10#ibcon#flushed, iclass 28, count 0 2006.229.22:20:12.10#ibcon#about to write, iclass 28, count 0 2006.229.22:20:12.10#ibcon#wrote, iclass 28, count 0 2006.229.22:20:12.10#ibcon#about to read 3, iclass 28, count 0 2006.229.22:20:12.12#ibcon#read 3, iclass 28, count 0 2006.229.22:20:12.12#ibcon#about to read 4, iclass 28, count 0 2006.229.22:20:12.12#ibcon#read 4, iclass 28, count 0 2006.229.22:20:12.12#ibcon#about to read 5, iclass 28, count 0 2006.229.22:20:12.12#ibcon#read 5, iclass 28, count 0 2006.229.22:20:12.12#ibcon#about to read 6, iclass 28, count 0 2006.229.22:20:12.12#ibcon#read 6, iclass 28, count 0 2006.229.22:20:12.12#ibcon#end of sib2, iclass 28, count 0 2006.229.22:20:12.12#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:20:12.12#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:20:12.12#ibcon#[25=USB\r\n] 2006.229.22:20:12.12#ibcon#*before write, iclass 28, count 0 2006.229.22:20:12.12#ibcon#enter sib2, iclass 28, count 0 2006.229.22:20:12.12#ibcon#flushed, iclass 28, count 0 2006.229.22:20:12.12#ibcon#about to write, iclass 28, count 0 2006.229.22:20:12.12#ibcon#wrote, iclass 28, count 0 2006.229.22:20:12.12#ibcon#about to read 3, iclass 28, count 0 2006.229.22:20:12.15#ibcon#read 3, iclass 28, count 0 2006.229.22:20:12.15#ibcon#about to read 4, iclass 28, count 0 2006.229.22:20:12.15#ibcon#read 4, iclass 28, count 0 2006.229.22:20:12.15#ibcon#about to read 5, iclass 28, count 0 2006.229.22:20:12.15#ibcon#read 5, iclass 28, count 0 2006.229.22:20:12.15#ibcon#about to read 6, iclass 28, count 0 2006.229.22:20:12.15#ibcon#read 6, iclass 28, count 0 2006.229.22:20:12.15#ibcon#end of sib2, iclass 28, count 0 2006.229.22:20:12.15#ibcon#*after write, iclass 28, count 0 2006.229.22:20:12.15#ibcon#*before return 0, iclass 28, count 0 2006.229.22:20:12.15#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:12.15#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:12.15#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:20:12.15#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:20:12.15$vck44/valo=7,864.99 2006.229.22:20:12.15#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.22:20:12.15#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.22:20:12.15#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:12.15#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:12.15#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:12.15#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:12.15#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:20:12.15#ibcon#first serial, iclass 30, count 0 2006.229.22:20:12.15#ibcon#enter sib2, iclass 30, count 0 2006.229.22:20:12.15#ibcon#flushed, iclass 30, count 0 2006.229.22:20:12.15#ibcon#about to write, iclass 30, count 0 2006.229.22:20:12.15#ibcon#wrote, iclass 30, count 0 2006.229.22:20:12.15#ibcon#about to read 3, iclass 30, count 0 2006.229.22:20:12.17#ibcon#read 3, iclass 30, count 0 2006.229.22:20:12.17#ibcon#about to read 4, iclass 30, count 0 2006.229.22:20:12.17#ibcon#read 4, iclass 30, count 0 2006.229.22:20:12.17#ibcon#about to read 5, iclass 30, count 0 2006.229.22:20:12.17#ibcon#read 5, iclass 30, count 0 2006.229.22:20:12.17#ibcon#about to read 6, iclass 30, count 0 2006.229.22:20:12.17#ibcon#read 6, iclass 30, count 0 2006.229.22:20:12.17#ibcon#end of sib2, iclass 30, count 0 2006.229.22:20:12.17#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:20:12.17#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:20:12.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:20:12.17#ibcon#*before write, iclass 30, count 0 2006.229.22:20:12.17#ibcon#enter sib2, iclass 30, count 0 2006.229.22:20:12.17#ibcon#flushed, iclass 30, count 0 2006.229.22:20:12.17#ibcon#about to write, iclass 30, count 0 2006.229.22:20:12.17#ibcon#wrote, iclass 30, count 0 2006.229.22:20:12.17#ibcon#about to read 3, iclass 30, count 0 2006.229.22:20:12.21#ibcon#read 3, iclass 30, count 0 2006.229.22:20:12.21#ibcon#about to read 4, iclass 30, count 0 2006.229.22:20:12.21#ibcon#read 4, iclass 30, count 0 2006.229.22:20:12.21#ibcon#about to read 5, iclass 30, count 0 2006.229.22:20:12.21#ibcon#read 5, iclass 30, count 0 2006.229.22:20:12.21#ibcon#about to read 6, iclass 30, count 0 2006.229.22:20:12.21#ibcon#read 6, iclass 30, count 0 2006.229.22:20:12.21#ibcon#end of sib2, iclass 30, count 0 2006.229.22:20:12.21#ibcon#*after write, iclass 30, count 0 2006.229.22:20:12.21#ibcon#*before return 0, iclass 30, count 0 2006.229.22:20:12.21#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:12.21#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:12.21#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:20:12.21#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:20:12.21$vck44/va=7,5 2006.229.22:20:12.21#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.22:20:12.21#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.22:20:12.21#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:12.21#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:20:12.25#abcon#<5=/08 1.4 3.8 28.39 921002.4\r\n> 2006.229.22:20:12.27#abcon#{5=INTERFACE CLEAR} 2006.229.22:20:12.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:20:12.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:20:12.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.22:20:12.27#ibcon#first serial, iclass 33, count 2 2006.229.22:20:12.27#ibcon#enter sib2, iclass 33, count 2 2006.229.22:20:12.27#ibcon#flushed, iclass 33, count 2 2006.229.22:20:12.27#ibcon#about to write, iclass 33, count 2 2006.229.22:20:12.27#ibcon#wrote, iclass 33, count 2 2006.229.22:20:12.27#ibcon#about to read 3, iclass 33, count 2 2006.229.22:20:12.29#ibcon#read 3, iclass 33, count 2 2006.229.22:20:12.29#ibcon#about to read 4, iclass 33, count 2 2006.229.22:20:12.29#ibcon#read 4, iclass 33, count 2 2006.229.22:20:12.29#ibcon#about to read 5, iclass 33, count 2 2006.229.22:20:12.29#ibcon#read 5, iclass 33, count 2 2006.229.22:20:12.29#ibcon#about to read 6, iclass 33, count 2 2006.229.22:20:12.29#ibcon#read 6, iclass 33, count 2 2006.229.22:20:12.29#ibcon#end of sib2, iclass 33, count 2 2006.229.22:20:12.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.22:20:12.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.22:20:12.29#ibcon#[25=AT07-05\r\n] 2006.229.22:20:12.29#ibcon#*before write, iclass 33, count 2 2006.229.22:20:12.29#ibcon#enter sib2, iclass 33, count 2 2006.229.22:20:12.29#ibcon#flushed, iclass 33, count 2 2006.229.22:20:12.29#ibcon#about to write, iclass 33, count 2 2006.229.22:20:12.29#ibcon#wrote, iclass 33, count 2 2006.229.22:20:12.29#ibcon#about to read 3, iclass 33, count 2 2006.229.22:20:12.32#ibcon#read 3, iclass 33, count 2 2006.229.22:20:12.32#ibcon#about to read 4, iclass 33, count 2 2006.229.22:20:12.32#ibcon#read 4, iclass 33, count 2 2006.229.22:20:12.32#ibcon#about to read 5, iclass 33, count 2 2006.229.22:20:12.32#ibcon#read 5, iclass 33, count 2 2006.229.22:20:12.32#ibcon#about to read 6, iclass 33, count 2 2006.229.22:20:12.32#ibcon#read 6, iclass 33, count 2 2006.229.22:20:12.32#ibcon#end of sib2, iclass 33, count 2 2006.229.22:20:12.32#ibcon#*after write, iclass 33, count 2 2006.229.22:20:12.32#ibcon#*before return 0, iclass 33, count 2 2006.229.22:20:12.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:20:12.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:20:12.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.22:20:12.32#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:12.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:20:12.33#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:20:12.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:20:12.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:20:12.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:20:12.44#ibcon#first serial, iclass 33, count 0 2006.229.22:20:12.44#ibcon#enter sib2, iclass 33, count 0 2006.229.22:20:12.44#ibcon#flushed, iclass 33, count 0 2006.229.22:20:12.44#ibcon#about to write, iclass 33, count 0 2006.229.22:20:12.44#ibcon#wrote, iclass 33, count 0 2006.229.22:20:12.44#ibcon#about to read 3, iclass 33, count 0 2006.229.22:20:12.46#ibcon#read 3, iclass 33, count 0 2006.229.22:20:12.46#ibcon#about to read 4, iclass 33, count 0 2006.229.22:20:12.46#ibcon#read 4, iclass 33, count 0 2006.229.22:20:12.46#ibcon#about to read 5, iclass 33, count 0 2006.229.22:20:12.46#ibcon#read 5, iclass 33, count 0 2006.229.22:20:12.46#ibcon#about to read 6, iclass 33, count 0 2006.229.22:20:12.46#ibcon#read 6, iclass 33, count 0 2006.229.22:20:12.46#ibcon#end of sib2, iclass 33, count 0 2006.229.22:20:12.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:20:12.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:20:12.46#ibcon#[25=USB\r\n] 2006.229.22:20:12.46#ibcon#*before write, iclass 33, count 0 2006.229.22:20:12.46#ibcon#enter sib2, iclass 33, count 0 2006.229.22:20:12.46#ibcon#flushed, iclass 33, count 0 2006.229.22:20:12.46#ibcon#about to write, iclass 33, count 0 2006.229.22:20:12.46#ibcon#wrote, iclass 33, count 0 2006.229.22:20:12.46#ibcon#about to read 3, iclass 33, count 0 2006.229.22:20:12.49#ibcon#read 3, iclass 33, count 0 2006.229.22:20:12.49#ibcon#about to read 4, iclass 33, count 0 2006.229.22:20:12.49#ibcon#read 4, iclass 33, count 0 2006.229.22:20:12.49#ibcon#about to read 5, iclass 33, count 0 2006.229.22:20:12.49#ibcon#read 5, iclass 33, count 0 2006.229.22:20:12.49#ibcon#about to read 6, iclass 33, count 0 2006.229.22:20:12.49#ibcon#read 6, iclass 33, count 0 2006.229.22:20:12.49#ibcon#end of sib2, iclass 33, count 0 2006.229.22:20:12.49#ibcon#*after write, iclass 33, count 0 2006.229.22:20:12.49#ibcon#*before return 0, iclass 33, count 0 2006.229.22:20:12.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:20:12.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:20:12.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:20:12.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:20:12.49$vck44/valo=8,884.99 2006.229.22:20:12.49#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.22:20:12.49#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.22:20:12.49#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:12.49#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:12.49#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:12.49#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:12.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:20:12.49#ibcon#first serial, iclass 38, count 0 2006.229.22:20:12.49#ibcon#enter sib2, iclass 38, count 0 2006.229.22:20:12.49#ibcon#flushed, iclass 38, count 0 2006.229.22:20:12.49#ibcon#about to write, iclass 38, count 0 2006.229.22:20:12.49#ibcon#wrote, iclass 38, count 0 2006.229.22:20:12.49#ibcon#about to read 3, iclass 38, count 0 2006.229.22:20:12.51#ibcon#read 3, iclass 38, count 0 2006.229.22:20:12.51#ibcon#about to read 4, iclass 38, count 0 2006.229.22:20:12.51#ibcon#read 4, iclass 38, count 0 2006.229.22:20:12.51#ibcon#about to read 5, iclass 38, count 0 2006.229.22:20:12.51#ibcon#read 5, iclass 38, count 0 2006.229.22:20:12.51#ibcon#about to read 6, iclass 38, count 0 2006.229.22:20:12.51#ibcon#read 6, iclass 38, count 0 2006.229.22:20:12.51#ibcon#end of sib2, iclass 38, count 0 2006.229.22:20:12.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:20:12.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:20:12.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:20:12.51#ibcon#*before write, iclass 38, count 0 2006.229.22:20:12.51#ibcon#enter sib2, iclass 38, count 0 2006.229.22:20:12.51#ibcon#flushed, iclass 38, count 0 2006.229.22:20:12.51#ibcon#about to write, iclass 38, count 0 2006.229.22:20:12.51#ibcon#wrote, iclass 38, count 0 2006.229.22:20:12.51#ibcon#about to read 3, iclass 38, count 0 2006.229.22:20:12.55#ibcon#read 3, iclass 38, count 0 2006.229.22:20:12.55#ibcon#about to read 4, iclass 38, count 0 2006.229.22:20:12.55#ibcon#read 4, iclass 38, count 0 2006.229.22:20:12.55#ibcon#about to read 5, iclass 38, count 0 2006.229.22:20:12.55#ibcon#read 5, iclass 38, count 0 2006.229.22:20:12.55#ibcon#about to read 6, iclass 38, count 0 2006.229.22:20:12.55#ibcon#read 6, iclass 38, count 0 2006.229.22:20:12.55#ibcon#end of sib2, iclass 38, count 0 2006.229.22:20:12.55#ibcon#*after write, iclass 38, count 0 2006.229.22:20:12.55#ibcon#*before return 0, iclass 38, count 0 2006.229.22:20:12.55#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:12.55#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:12.55#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:20:12.55#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:20:12.55$vck44/va=8,6 2006.229.22:20:12.55#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.22:20:12.55#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.22:20:12.55#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:12.55#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:20:12.61#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:20:12.61#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:20:12.61#ibcon#enter wrdev, iclass 40, count 2 2006.229.22:20:12.61#ibcon#first serial, iclass 40, count 2 2006.229.22:20:12.61#ibcon#enter sib2, iclass 40, count 2 2006.229.22:20:12.61#ibcon#flushed, iclass 40, count 2 2006.229.22:20:12.61#ibcon#about to write, iclass 40, count 2 2006.229.22:20:12.61#ibcon#wrote, iclass 40, count 2 2006.229.22:20:12.61#ibcon#about to read 3, iclass 40, count 2 2006.229.22:20:12.63#ibcon#read 3, iclass 40, count 2 2006.229.22:20:12.63#ibcon#about to read 4, iclass 40, count 2 2006.229.22:20:12.63#ibcon#read 4, iclass 40, count 2 2006.229.22:20:12.63#ibcon#about to read 5, iclass 40, count 2 2006.229.22:20:12.63#ibcon#read 5, iclass 40, count 2 2006.229.22:20:12.63#ibcon#about to read 6, iclass 40, count 2 2006.229.22:20:12.63#ibcon#read 6, iclass 40, count 2 2006.229.22:20:12.63#ibcon#end of sib2, iclass 40, count 2 2006.229.22:20:12.63#ibcon#*mode == 0, iclass 40, count 2 2006.229.22:20:12.63#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.22:20:12.63#ibcon#[25=AT08-06\r\n] 2006.229.22:20:12.63#ibcon#*before write, iclass 40, count 2 2006.229.22:20:12.63#ibcon#enter sib2, iclass 40, count 2 2006.229.22:20:12.63#ibcon#flushed, iclass 40, count 2 2006.229.22:20:12.63#ibcon#about to write, iclass 40, count 2 2006.229.22:20:12.63#ibcon#wrote, iclass 40, count 2 2006.229.22:20:12.63#ibcon#about to read 3, iclass 40, count 2 2006.229.22:20:12.66#ibcon#read 3, iclass 40, count 2 2006.229.22:20:12.66#ibcon#about to read 4, iclass 40, count 2 2006.229.22:20:12.66#ibcon#read 4, iclass 40, count 2 2006.229.22:20:12.66#ibcon#about to read 5, iclass 40, count 2 2006.229.22:20:12.66#ibcon#read 5, iclass 40, count 2 2006.229.22:20:12.66#ibcon#about to read 6, iclass 40, count 2 2006.229.22:20:12.66#ibcon#read 6, iclass 40, count 2 2006.229.22:20:12.66#ibcon#end of sib2, iclass 40, count 2 2006.229.22:20:12.66#ibcon#*after write, iclass 40, count 2 2006.229.22:20:12.66#ibcon#*before return 0, iclass 40, count 2 2006.229.22:20:12.66#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:20:12.66#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:20:12.66#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.22:20:12.66#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:12.66#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:20:12.78#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:20:12.78#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:20:12.78#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:20:12.78#ibcon#first serial, iclass 40, count 0 2006.229.22:20:12.78#ibcon#enter sib2, iclass 40, count 0 2006.229.22:20:12.78#ibcon#flushed, iclass 40, count 0 2006.229.22:20:12.78#ibcon#about to write, iclass 40, count 0 2006.229.22:20:12.78#ibcon#wrote, iclass 40, count 0 2006.229.22:20:12.78#ibcon#about to read 3, iclass 40, count 0 2006.229.22:20:12.80#ibcon#read 3, iclass 40, count 0 2006.229.22:20:12.80#ibcon#about to read 4, iclass 40, count 0 2006.229.22:20:12.80#ibcon#read 4, iclass 40, count 0 2006.229.22:20:12.80#ibcon#about to read 5, iclass 40, count 0 2006.229.22:20:12.80#ibcon#read 5, iclass 40, count 0 2006.229.22:20:12.80#ibcon#about to read 6, iclass 40, count 0 2006.229.22:20:12.80#ibcon#read 6, iclass 40, count 0 2006.229.22:20:12.80#ibcon#end of sib2, iclass 40, count 0 2006.229.22:20:12.80#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:20:12.80#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:20:12.80#ibcon#[25=USB\r\n] 2006.229.22:20:12.80#ibcon#*before write, iclass 40, count 0 2006.229.22:20:12.80#ibcon#enter sib2, iclass 40, count 0 2006.229.22:20:12.80#ibcon#flushed, iclass 40, count 0 2006.229.22:20:12.80#ibcon#about to write, iclass 40, count 0 2006.229.22:20:12.80#ibcon#wrote, iclass 40, count 0 2006.229.22:20:12.80#ibcon#about to read 3, iclass 40, count 0 2006.229.22:20:12.83#ibcon#read 3, iclass 40, count 0 2006.229.22:20:12.83#ibcon#about to read 4, iclass 40, count 0 2006.229.22:20:12.83#ibcon#read 4, iclass 40, count 0 2006.229.22:20:12.83#ibcon#about to read 5, iclass 40, count 0 2006.229.22:20:12.83#ibcon#read 5, iclass 40, count 0 2006.229.22:20:12.83#ibcon#about to read 6, iclass 40, count 0 2006.229.22:20:12.83#ibcon#read 6, iclass 40, count 0 2006.229.22:20:12.83#ibcon#end of sib2, iclass 40, count 0 2006.229.22:20:12.83#ibcon#*after write, iclass 40, count 0 2006.229.22:20:12.83#ibcon#*before return 0, iclass 40, count 0 2006.229.22:20:12.83#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:20:12.83#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:20:12.83#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:20:12.83#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:20:12.83$vck44/vblo=1,629.99 2006.229.22:20:12.83#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.22:20:12.83#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.22:20:12.83#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:12.83#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:12.83#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:12.83#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:12.83#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:20:12.83#ibcon#first serial, iclass 4, count 0 2006.229.22:20:12.83#ibcon#enter sib2, iclass 4, count 0 2006.229.22:20:12.83#ibcon#flushed, iclass 4, count 0 2006.229.22:20:12.83#ibcon#about to write, iclass 4, count 0 2006.229.22:20:12.83#ibcon#wrote, iclass 4, count 0 2006.229.22:20:12.83#ibcon#about to read 3, iclass 4, count 0 2006.229.22:20:12.85#ibcon#read 3, iclass 4, count 0 2006.229.22:20:12.85#ibcon#about to read 4, iclass 4, count 0 2006.229.22:20:12.85#ibcon#read 4, iclass 4, count 0 2006.229.22:20:12.85#ibcon#about to read 5, iclass 4, count 0 2006.229.22:20:12.85#ibcon#read 5, iclass 4, count 0 2006.229.22:20:12.85#ibcon#about to read 6, iclass 4, count 0 2006.229.22:20:12.85#ibcon#read 6, iclass 4, count 0 2006.229.22:20:12.85#ibcon#end of sib2, iclass 4, count 0 2006.229.22:20:12.85#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:20:12.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:20:12.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:20:12.85#ibcon#*before write, iclass 4, count 0 2006.229.22:20:12.85#ibcon#enter sib2, iclass 4, count 0 2006.229.22:20:12.85#ibcon#flushed, iclass 4, count 0 2006.229.22:20:12.85#ibcon#about to write, iclass 4, count 0 2006.229.22:20:12.85#ibcon#wrote, iclass 4, count 0 2006.229.22:20:12.85#ibcon#about to read 3, iclass 4, count 0 2006.229.22:20:12.89#ibcon#read 3, iclass 4, count 0 2006.229.22:20:12.89#ibcon#about to read 4, iclass 4, count 0 2006.229.22:20:12.89#ibcon#read 4, iclass 4, count 0 2006.229.22:20:12.89#ibcon#about to read 5, iclass 4, count 0 2006.229.22:20:12.89#ibcon#read 5, iclass 4, count 0 2006.229.22:20:12.89#ibcon#about to read 6, iclass 4, count 0 2006.229.22:20:12.89#ibcon#read 6, iclass 4, count 0 2006.229.22:20:12.89#ibcon#end of sib2, iclass 4, count 0 2006.229.22:20:12.89#ibcon#*after write, iclass 4, count 0 2006.229.22:20:12.89#ibcon#*before return 0, iclass 4, count 0 2006.229.22:20:12.89#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:12.89#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:20:12.89#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:20:12.89#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:20:12.89$vck44/vb=1,4 2006.229.22:20:12.89#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.22:20:12.89#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.22:20:12.89#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:12.89#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:12.89#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:12.89#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:12.89#ibcon#enter wrdev, iclass 6, count 2 2006.229.22:20:12.89#ibcon#first serial, iclass 6, count 2 2006.229.22:20:12.89#ibcon#enter sib2, iclass 6, count 2 2006.229.22:20:12.89#ibcon#flushed, iclass 6, count 2 2006.229.22:20:12.89#ibcon#about to write, iclass 6, count 2 2006.229.22:20:12.89#ibcon#wrote, iclass 6, count 2 2006.229.22:20:12.89#ibcon#about to read 3, iclass 6, count 2 2006.229.22:20:12.91#ibcon#read 3, iclass 6, count 2 2006.229.22:20:12.91#ibcon#about to read 4, iclass 6, count 2 2006.229.22:20:12.91#ibcon#read 4, iclass 6, count 2 2006.229.22:20:12.91#ibcon#about to read 5, iclass 6, count 2 2006.229.22:20:12.91#ibcon#read 5, iclass 6, count 2 2006.229.22:20:12.91#ibcon#about to read 6, iclass 6, count 2 2006.229.22:20:12.91#ibcon#read 6, iclass 6, count 2 2006.229.22:20:12.91#ibcon#end of sib2, iclass 6, count 2 2006.229.22:20:12.91#ibcon#*mode == 0, iclass 6, count 2 2006.229.22:20:12.91#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.22:20:12.91#ibcon#[27=AT01-04\r\n] 2006.229.22:20:12.91#ibcon#*before write, iclass 6, count 2 2006.229.22:20:12.91#ibcon#enter sib2, iclass 6, count 2 2006.229.22:20:12.91#ibcon#flushed, iclass 6, count 2 2006.229.22:20:12.91#ibcon#about to write, iclass 6, count 2 2006.229.22:20:12.91#ibcon#wrote, iclass 6, count 2 2006.229.22:20:12.91#ibcon#about to read 3, iclass 6, count 2 2006.229.22:20:12.94#ibcon#read 3, iclass 6, count 2 2006.229.22:20:12.94#ibcon#about to read 4, iclass 6, count 2 2006.229.22:20:12.94#ibcon#read 4, iclass 6, count 2 2006.229.22:20:12.94#ibcon#about to read 5, iclass 6, count 2 2006.229.22:20:12.94#ibcon#read 5, iclass 6, count 2 2006.229.22:20:12.94#ibcon#about to read 6, iclass 6, count 2 2006.229.22:20:12.94#ibcon#read 6, iclass 6, count 2 2006.229.22:20:12.94#ibcon#end of sib2, iclass 6, count 2 2006.229.22:20:12.94#ibcon#*after write, iclass 6, count 2 2006.229.22:20:12.94#ibcon#*before return 0, iclass 6, count 2 2006.229.22:20:12.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:12.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:20:12.94#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.22:20:12.94#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:12.94#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:13.06#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:13.06#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:13.06#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:20:13.06#ibcon#first serial, iclass 6, count 0 2006.229.22:20:13.06#ibcon#enter sib2, iclass 6, count 0 2006.229.22:20:13.06#ibcon#flushed, iclass 6, count 0 2006.229.22:20:13.06#ibcon#about to write, iclass 6, count 0 2006.229.22:20:13.06#ibcon#wrote, iclass 6, count 0 2006.229.22:20:13.06#ibcon#about to read 3, iclass 6, count 0 2006.229.22:20:13.08#ibcon#read 3, iclass 6, count 0 2006.229.22:20:13.08#ibcon#about to read 4, iclass 6, count 0 2006.229.22:20:13.08#ibcon#read 4, iclass 6, count 0 2006.229.22:20:13.08#ibcon#about to read 5, iclass 6, count 0 2006.229.22:20:13.08#ibcon#read 5, iclass 6, count 0 2006.229.22:20:13.08#ibcon#about to read 6, iclass 6, count 0 2006.229.22:20:13.08#ibcon#read 6, iclass 6, count 0 2006.229.22:20:13.08#ibcon#end of sib2, iclass 6, count 0 2006.229.22:20:13.08#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:20:13.08#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:20:13.08#ibcon#[27=USB\r\n] 2006.229.22:20:13.08#ibcon#*before write, iclass 6, count 0 2006.229.22:20:13.08#ibcon#enter sib2, iclass 6, count 0 2006.229.22:20:13.08#ibcon#flushed, iclass 6, count 0 2006.229.22:20:13.08#ibcon#about to write, iclass 6, count 0 2006.229.22:20:13.08#ibcon#wrote, iclass 6, count 0 2006.229.22:20:13.08#ibcon#about to read 3, iclass 6, count 0 2006.229.22:20:13.11#ibcon#read 3, iclass 6, count 0 2006.229.22:20:13.11#ibcon#about to read 4, iclass 6, count 0 2006.229.22:20:13.11#ibcon#read 4, iclass 6, count 0 2006.229.22:20:13.11#ibcon#about to read 5, iclass 6, count 0 2006.229.22:20:13.11#ibcon#read 5, iclass 6, count 0 2006.229.22:20:13.11#ibcon#about to read 6, iclass 6, count 0 2006.229.22:20:13.11#ibcon#read 6, iclass 6, count 0 2006.229.22:20:13.11#ibcon#end of sib2, iclass 6, count 0 2006.229.22:20:13.11#ibcon#*after write, iclass 6, count 0 2006.229.22:20:13.11#ibcon#*before return 0, iclass 6, count 0 2006.229.22:20:13.11#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:13.11#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:20:13.11#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:20:13.11#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:20:13.11$vck44/vblo=2,634.99 2006.229.22:20:13.11#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.22:20:13.11#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.22:20:13.11#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:13.11#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:13.11#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:13.11#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:13.11#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:20:13.11#ibcon#first serial, iclass 10, count 0 2006.229.22:20:13.11#ibcon#enter sib2, iclass 10, count 0 2006.229.22:20:13.11#ibcon#flushed, iclass 10, count 0 2006.229.22:20:13.11#ibcon#about to write, iclass 10, count 0 2006.229.22:20:13.11#ibcon#wrote, iclass 10, count 0 2006.229.22:20:13.11#ibcon#about to read 3, iclass 10, count 0 2006.229.22:20:13.13#ibcon#read 3, iclass 10, count 0 2006.229.22:20:13.13#ibcon#about to read 4, iclass 10, count 0 2006.229.22:20:13.13#ibcon#read 4, iclass 10, count 0 2006.229.22:20:13.13#ibcon#about to read 5, iclass 10, count 0 2006.229.22:20:13.13#ibcon#read 5, iclass 10, count 0 2006.229.22:20:13.13#ibcon#about to read 6, iclass 10, count 0 2006.229.22:20:13.13#ibcon#read 6, iclass 10, count 0 2006.229.22:20:13.13#ibcon#end of sib2, iclass 10, count 0 2006.229.22:20:13.13#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:20:13.13#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:20:13.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:20:13.13#ibcon#*before write, iclass 10, count 0 2006.229.22:20:13.13#ibcon#enter sib2, iclass 10, count 0 2006.229.22:20:13.13#ibcon#flushed, iclass 10, count 0 2006.229.22:20:13.13#ibcon#about to write, iclass 10, count 0 2006.229.22:20:13.13#ibcon#wrote, iclass 10, count 0 2006.229.22:20:13.13#ibcon#about to read 3, iclass 10, count 0 2006.229.22:20:13.17#ibcon#read 3, iclass 10, count 0 2006.229.22:20:13.17#ibcon#about to read 4, iclass 10, count 0 2006.229.22:20:13.17#ibcon#read 4, iclass 10, count 0 2006.229.22:20:13.17#ibcon#about to read 5, iclass 10, count 0 2006.229.22:20:13.17#ibcon#read 5, iclass 10, count 0 2006.229.22:20:13.17#ibcon#about to read 6, iclass 10, count 0 2006.229.22:20:13.17#ibcon#read 6, iclass 10, count 0 2006.229.22:20:13.17#ibcon#end of sib2, iclass 10, count 0 2006.229.22:20:13.17#ibcon#*after write, iclass 10, count 0 2006.229.22:20:13.17#ibcon#*before return 0, iclass 10, count 0 2006.229.22:20:13.17#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:13.17#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:20:13.17#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:20:13.17#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:20:13.17$vck44/vb=2,4 2006.229.22:20:13.17#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.22:20:13.17#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.22:20:13.17#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:13.17#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:13.23#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:13.23#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:13.23#ibcon#enter wrdev, iclass 12, count 2 2006.229.22:20:13.23#ibcon#first serial, iclass 12, count 2 2006.229.22:20:13.23#ibcon#enter sib2, iclass 12, count 2 2006.229.22:20:13.23#ibcon#flushed, iclass 12, count 2 2006.229.22:20:13.23#ibcon#about to write, iclass 12, count 2 2006.229.22:20:13.23#ibcon#wrote, iclass 12, count 2 2006.229.22:20:13.23#ibcon#about to read 3, iclass 12, count 2 2006.229.22:20:13.25#ibcon#read 3, iclass 12, count 2 2006.229.22:20:13.25#ibcon#about to read 4, iclass 12, count 2 2006.229.22:20:13.25#ibcon#read 4, iclass 12, count 2 2006.229.22:20:13.25#ibcon#about to read 5, iclass 12, count 2 2006.229.22:20:13.25#ibcon#read 5, iclass 12, count 2 2006.229.22:20:13.25#ibcon#about to read 6, iclass 12, count 2 2006.229.22:20:13.25#ibcon#read 6, iclass 12, count 2 2006.229.22:20:13.25#ibcon#end of sib2, iclass 12, count 2 2006.229.22:20:13.25#ibcon#*mode == 0, iclass 12, count 2 2006.229.22:20:13.25#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.22:20:13.25#ibcon#[27=AT02-04\r\n] 2006.229.22:20:13.25#ibcon#*before write, iclass 12, count 2 2006.229.22:20:13.25#ibcon#enter sib2, iclass 12, count 2 2006.229.22:20:13.25#ibcon#flushed, iclass 12, count 2 2006.229.22:20:13.25#ibcon#about to write, iclass 12, count 2 2006.229.22:20:13.25#ibcon#wrote, iclass 12, count 2 2006.229.22:20:13.25#ibcon#about to read 3, iclass 12, count 2 2006.229.22:20:13.28#ibcon#read 3, iclass 12, count 2 2006.229.22:20:13.28#ibcon#about to read 4, iclass 12, count 2 2006.229.22:20:13.28#ibcon#read 4, iclass 12, count 2 2006.229.22:20:13.28#ibcon#about to read 5, iclass 12, count 2 2006.229.22:20:13.28#ibcon#read 5, iclass 12, count 2 2006.229.22:20:13.28#ibcon#about to read 6, iclass 12, count 2 2006.229.22:20:13.28#ibcon#read 6, iclass 12, count 2 2006.229.22:20:13.28#ibcon#end of sib2, iclass 12, count 2 2006.229.22:20:13.28#ibcon#*after write, iclass 12, count 2 2006.229.22:20:13.28#ibcon#*before return 0, iclass 12, count 2 2006.229.22:20:13.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:13.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:20:13.28#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.22:20:13.28#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:13.28#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:13.40#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:13.40#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:13.40#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:20:13.40#ibcon#first serial, iclass 12, count 0 2006.229.22:20:13.40#ibcon#enter sib2, iclass 12, count 0 2006.229.22:20:13.40#ibcon#flushed, iclass 12, count 0 2006.229.22:20:13.40#ibcon#about to write, iclass 12, count 0 2006.229.22:20:13.40#ibcon#wrote, iclass 12, count 0 2006.229.22:20:13.40#ibcon#about to read 3, iclass 12, count 0 2006.229.22:20:13.42#ibcon#read 3, iclass 12, count 0 2006.229.22:20:13.42#ibcon#about to read 4, iclass 12, count 0 2006.229.22:20:13.42#ibcon#read 4, iclass 12, count 0 2006.229.22:20:13.42#ibcon#about to read 5, iclass 12, count 0 2006.229.22:20:13.42#ibcon#read 5, iclass 12, count 0 2006.229.22:20:13.42#ibcon#about to read 6, iclass 12, count 0 2006.229.22:20:13.42#ibcon#read 6, iclass 12, count 0 2006.229.22:20:13.42#ibcon#end of sib2, iclass 12, count 0 2006.229.22:20:13.42#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:20:13.42#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:20:13.42#ibcon#[27=USB\r\n] 2006.229.22:20:13.42#ibcon#*before write, iclass 12, count 0 2006.229.22:20:13.42#ibcon#enter sib2, iclass 12, count 0 2006.229.22:20:13.42#ibcon#flushed, iclass 12, count 0 2006.229.22:20:13.42#ibcon#about to write, iclass 12, count 0 2006.229.22:20:13.42#ibcon#wrote, iclass 12, count 0 2006.229.22:20:13.42#ibcon#about to read 3, iclass 12, count 0 2006.229.22:20:13.45#ibcon#read 3, iclass 12, count 0 2006.229.22:20:13.45#ibcon#about to read 4, iclass 12, count 0 2006.229.22:20:13.45#ibcon#read 4, iclass 12, count 0 2006.229.22:20:13.45#ibcon#about to read 5, iclass 12, count 0 2006.229.22:20:13.45#ibcon#read 5, iclass 12, count 0 2006.229.22:20:13.45#ibcon#about to read 6, iclass 12, count 0 2006.229.22:20:13.45#ibcon#read 6, iclass 12, count 0 2006.229.22:20:13.45#ibcon#end of sib2, iclass 12, count 0 2006.229.22:20:13.45#ibcon#*after write, iclass 12, count 0 2006.229.22:20:13.45#ibcon#*before return 0, iclass 12, count 0 2006.229.22:20:13.45#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:13.45#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:20:13.45#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:20:13.45#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:20:13.45$vck44/vblo=3,649.99 2006.229.22:20:13.45#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:20:13.45#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:20:13.45#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:13.45#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:13.45#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:13.45#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:13.45#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:20:13.45#ibcon#first serial, iclass 14, count 0 2006.229.22:20:13.45#ibcon#enter sib2, iclass 14, count 0 2006.229.22:20:13.45#ibcon#flushed, iclass 14, count 0 2006.229.22:20:13.45#ibcon#about to write, iclass 14, count 0 2006.229.22:20:13.45#ibcon#wrote, iclass 14, count 0 2006.229.22:20:13.45#ibcon#about to read 3, iclass 14, count 0 2006.229.22:20:13.47#ibcon#read 3, iclass 14, count 0 2006.229.22:20:13.47#ibcon#about to read 4, iclass 14, count 0 2006.229.22:20:13.47#ibcon#read 4, iclass 14, count 0 2006.229.22:20:13.47#ibcon#about to read 5, iclass 14, count 0 2006.229.22:20:13.47#ibcon#read 5, iclass 14, count 0 2006.229.22:20:13.47#ibcon#about to read 6, iclass 14, count 0 2006.229.22:20:13.47#ibcon#read 6, iclass 14, count 0 2006.229.22:20:13.47#ibcon#end of sib2, iclass 14, count 0 2006.229.22:20:13.47#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:20:13.47#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:20:13.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:20:13.47#ibcon#*before write, iclass 14, count 0 2006.229.22:20:13.47#ibcon#enter sib2, iclass 14, count 0 2006.229.22:20:13.47#ibcon#flushed, iclass 14, count 0 2006.229.22:20:13.47#ibcon#about to write, iclass 14, count 0 2006.229.22:20:13.47#ibcon#wrote, iclass 14, count 0 2006.229.22:20:13.47#ibcon#about to read 3, iclass 14, count 0 2006.229.22:20:13.51#ibcon#read 3, iclass 14, count 0 2006.229.22:20:13.51#ibcon#about to read 4, iclass 14, count 0 2006.229.22:20:13.51#ibcon#read 4, iclass 14, count 0 2006.229.22:20:13.51#ibcon#about to read 5, iclass 14, count 0 2006.229.22:20:13.51#ibcon#read 5, iclass 14, count 0 2006.229.22:20:13.51#ibcon#about to read 6, iclass 14, count 0 2006.229.22:20:13.51#ibcon#read 6, iclass 14, count 0 2006.229.22:20:13.51#ibcon#end of sib2, iclass 14, count 0 2006.229.22:20:13.51#ibcon#*after write, iclass 14, count 0 2006.229.22:20:13.51#ibcon#*before return 0, iclass 14, count 0 2006.229.22:20:13.51#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:13.51#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:20:13.51#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:20:13.51#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:20:13.51$vck44/vb=3,4 2006.229.22:20:13.51#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.22:20:13.51#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.22:20:13.51#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:13.51#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:13.57#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:13.57#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:13.57#ibcon#enter wrdev, iclass 16, count 2 2006.229.22:20:13.57#ibcon#first serial, iclass 16, count 2 2006.229.22:20:13.57#ibcon#enter sib2, iclass 16, count 2 2006.229.22:20:13.57#ibcon#flushed, iclass 16, count 2 2006.229.22:20:13.57#ibcon#about to write, iclass 16, count 2 2006.229.22:20:13.57#ibcon#wrote, iclass 16, count 2 2006.229.22:20:13.57#ibcon#about to read 3, iclass 16, count 2 2006.229.22:20:13.59#ibcon#read 3, iclass 16, count 2 2006.229.22:20:13.59#ibcon#about to read 4, iclass 16, count 2 2006.229.22:20:13.59#ibcon#read 4, iclass 16, count 2 2006.229.22:20:13.59#ibcon#about to read 5, iclass 16, count 2 2006.229.22:20:13.59#ibcon#read 5, iclass 16, count 2 2006.229.22:20:13.59#ibcon#about to read 6, iclass 16, count 2 2006.229.22:20:13.59#ibcon#read 6, iclass 16, count 2 2006.229.22:20:13.59#ibcon#end of sib2, iclass 16, count 2 2006.229.22:20:13.59#ibcon#*mode == 0, iclass 16, count 2 2006.229.22:20:13.59#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.22:20:13.59#ibcon#[27=AT03-04\r\n] 2006.229.22:20:13.59#ibcon#*before write, iclass 16, count 2 2006.229.22:20:13.59#ibcon#enter sib2, iclass 16, count 2 2006.229.22:20:13.59#ibcon#flushed, iclass 16, count 2 2006.229.22:20:13.59#ibcon#about to write, iclass 16, count 2 2006.229.22:20:13.59#ibcon#wrote, iclass 16, count 2 2006.229.22:20:13.59#ibcon#about to read 3, iclass 16, count 2 2006.229.22:20:13.62#ibcon#read 3, iclass 16, count 2 2006.229.22:20:13.62#ibcon#about to read 4, iclass 16, count 2 2006.229.22:20:13.62#ibcon#read 4, iclass 16, count 2 2006.229.22:20:13.62#ibcon#about to read 5, iclass 16, count 2 2006.229.22:20:13.62#ibcon#read 5, iclass 16, count 2 2006.229.22:20:13.62#ibcon#about to read 6, iclass 16, count 2 2006.229.22:20:13.62#ibcon#read 6, iclass 16, count 2 2006.229.22:20:13.62#ibcon#end of sib2, iclass 16, count 2 2006.229.22:20:13.62#ibcon#*after write, iclass 16, count 2 2006.229.22:20:13.62#ibcon#*before return 0, iclass 16, count 2 2006.229.22:20:13.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:13.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:20:13.62#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.22:20:13.62#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:13.62#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:13.74#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:13.74#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:13.74#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:20:13.74#ibcon#first serial, iclass 16, count 0 2006.229.22:20:13.74#ibcon#enter sib2, iclass 16, count 0 2006.229.22:20:13.74#ibcon#flushed, iclass 16, count 0 2006.229.22:20:13.74#ibcon#about to write, iclass 16, count 0 2006.229.22:20:13.74#ibcon#wrote, iclass 16, count 0 2006.229.22:20:13.74#ibcon#about to read 3, iclass 16, count 0 2006.229.22:20:13.76#ibcon#read 3, iclass 16, count 0 2006.229.22:20:13.76#ibcon#about to read 4, iclass 16, count 0 2006.229.22:20:13.76#ibcon#read 4, iclass 16, count 0 2006.229.22:20:13.76#ibcon#about to read 5, iclass 16, count 0 2006.229.22:20:13.76#ibcon#read 5, iclass 16, count 0 2006.229.22:20:13.76#ibcon#about to read 6, iclass 16, count 0 2006.229.22:20:13.76#ibcon#read 6, iclass 16, count 0 2006.229.22:20:13.76#ibcon#end of sib2, iclass 16, count 0 2006.229.22:20:13.76#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:20:13.76#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:20:13.76#ibcon#[27=USB\r\n] 2006.229.22:20:13.76#ibcon#*before write, iclass 16, count 0 2006.229.22:20:13.76#ibcon#enter sib2, iclass 16, count 0 2006.229.22:20:13.76#ibcon#flushed, iclass 16, count 0 2006.229.22:20:13.76#ibcon#about to write, iclass 16, count 0 2006.229.22:20:13.76#ibcon#wrote, iclass 16, count 0 2006.229.22:20:13.76#ibcon#about to read 3, iclass 16, count 0 2006.229.22:20:13.79#ibcon#read 3, iclass 16, count 0 2006.229.22:20:13.79#ibcon#about to read 4, iclass 16, count 0 2006.229.22:20:13.79#ibcon#read 4, iclass 16, count 0 2006.229.22:20:13.79#ibcon#about to read 5, iclass 16, count 0 2006.229.22:20:13.79#ibcon#read 5, iclass 16, count 0 2006.229.22:20:13.79#ibcon#about to read 6, iclass 16, count 0 2006.229.22:20:13.79#ibcon#read 6, iclass 16, count 0 2006.229.22:20:13.79#ibcon#end of sib2, iclass 16, count 0 2006.229.22:20:13.79#ibcon#*after write, iclass 16, count 0 2006.229.22:20:13.79#ibcon#*before return 0, iclass 16, count 0 2006.229.22:20:13.79#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:13.79#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:20:13.79#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:20:13.79#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:20:13.79$vck44/vblo=4,679.99 2006.229.22:20:13.79#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:20:13.79#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:20:13.79#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:13.79#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:13.79#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:13.79#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:13.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:20:13.79#ibcon#first serial, iclass 18, count 0 2006.229.22:20:13.79#ibcon#enter sib2, iclass 18, count 0 2006.229.22:20:13.79#ibcon#flushed, iclass 18, count 0 2006.229.22:20:13.79#ibcon#about to write, iclass 18, count 0 2006.229.22:20:13.79#ibcon#wrote, iclass 18, count 0 2006.229.22:20:13.79#ibcon#about to read 3, iclass 18, count 0 2006.229.22:20:13.81#ibcon#read 3, iclass 18, count 0 2006.229.22:20:13.81#ibcon#about to read 4, iclass 18, count 0 2006.229.22:20:13.81#ibcon#read 4, iclass 18, count 0 2006.229.22:20:13.81#ibcon#about to read 5, iclass 18, count 0 2006.229.22:20:13.81#ibcon#read 5, iclass 18, count 0 2006.229.22:20:13.81#ibcon#about to read 6, iclass 18, count 0 2006.229.22:20:13.81#ibcon#read 6, iclass 18, count 0 2006.229.22:20:13.81#ibcon#end of sib2, iclass 18, count 0 2006.229.22:20:13.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:20:13.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:20:13.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:20:13.81#ibcon#*before write, iclass 18, count 0 2006.229.22:20:13.81#ibcon#enter sib2, iclass 18, count 0 2006.229.22:20:13.81#ibcon#flushed, iclass 18, count 0 2006.229.22:20:13.81#ibcon#about to write, iclass 18, count 0 2006.229.22:20:13.81#ibcon#wrote, iclass 18, count 0 2006.229.22:20:13.81#ibcon#about to read 3, iclass 18, count 0 2006.229.22:20:13.85#ibcon#read 3, iclass 18, count 0 2006.229.22:20:13.85#ibcon#about to read 4, iclass 18, count 0 2006.229.22:20:13.85#ibcon#read 4, iclass 18, count 0 2006.229.22:20:13.85#ibcon#about to read 5, iclass 18, count 0 2006.229.22:20:13.85#ibcon#read 5, iclass 18, count 0 2006.229.22:20:13.85#ibcon#about to read 6, iclass 18, count 0 2006.229.22:20:13.85#ibcon#read 6, iclass 18, count 0 2006.229.22:20:13.85#ibcon#end of sib2, iclass 18, count 0 2006.229.22:20:13.85#ibcon#*after write, iclass 18, count 0 2006.229.22:20:13.85#ibcon#*before return 0, iclass 18, count 0 2006.229.22:20:13.85#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:13.85#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:20:13.85#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:20:13.85#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:20:13.85$vck44/vb=4,4 2006.229.22:20:13.85#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.22:20:13.85#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.22:20:13.85#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:13.85#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:13.91#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:13.91#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:13.91#ibcon#enter wrdev, iclass 20, count 2 2006.229.22:20:13.91#ibcon#first serial, iclass 20, count 2 2006.229.22:20:13.91#ibcon#enter sib2, iclass 20, count 2 2006.229.22:20:13.91#ibcon#flushed, iclass 20, count 2 2006.229.22:20:13.91#ibcon#about to write, iclass 20, count 2 2006.229.22:20:13.91#ibcon#wrote, iclass 20, count 2 2006.229.22:20:13.91#ibcon#about to read 3, iclass 20, count 2 2006.229.22:20:13.93#ibcon#read 3, iclass 20, count 2 2006.229.22:20:13.93#ibcon#about to read 4, iclass 20, count 2 2006.229.22:20:13.93#ibcon#read 4, iclass 20, count 2 2006.229.22:20:13.93#ibcon#about to read 5, iclass 20, count 2 2006.229.22:20:13.93#ibcon#read 5, iclass 20, count 2 2006.229.22:20:13.93#ibcon#about to read 6, iclass 20, count 2 2006.229.22:20:13.93#ibcon#read 6, iclass 20, count 2 2006.229.22:20:13.93#ibcon#end of sib2, iclass 20, count 2 2006.229.22:20:13.93#ibcon#*mode == 0, iclass 20, count 2 2006.229.22:20:13.93#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.22:20:13.93#ibcon#[27=AT04-04\r\n] 2006.229.22:20:13.93#ibcon#*before write, iclass 20, count 2 2006.229.22:20:13.93#ibcon#enter sib2, iclass 20, count 2 2006.229.22:20:13.93#ibcon#flushed, iclass 20, count 2 2006.229.22:20:13.93#ibcon#about to write, iclass 20, count 2 2006.229.22:20:13.93#ibcon#wrote, iclass 20, count 2 2006.229.22:20:13.93#ibcon#about to read 3, iclass 20, count 2 2006.229.22:20:13.96#ibcon#read 3, iclass 20, count 2 2006.229.22:20:13.96#ibcon#about to read 4, iclass 20, count 2 2006.229.22:20:13.96#ibcon#read 4, iclass 20, count 2 2006.229.22:20:13.96#ibcon#about to read 5, iclass 20, count 2 2006.229.22:20:13.96#ibcon#read 5, iclass 20, count 2 2006.229.22:20:13.96#ibcon#about to read 6, iclass 20, count 2 2006.229.22:20:13.96#ibcon#read 6, iclass 20, count 2 2006.229.22:20:13.96#ibcon#end of sib2, iclass 20, count 2 2006.229.22:20:13.96#ibcon#*after write, iclass 20, count 2 2006.229.22:20:13.96#ibcon#*before return 0, iclass 20, count 2 2006.229.22:20:13.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:13.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:20:13.96#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.22:20:13.96#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:13.96#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:14.08#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:14.08#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:14.08#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:20:14.08#ibcon#first serial, iclass 20, count 0 2006.229.22:20:14.08#ibcon#enter sib2, iclass 20, count 0 2006.229.22:20:14.08#ibcon#flushed, iclass 20, count 0 2006.229.22:20:14.08#ibcon#about to write, iclass 20, count 0 2006.229.22:20:14.08#ibcon#wrote, iclass 20, count 0 2006.229.22:20:14.08#ibcon#about to read 3, iclass 20, count 0 2006.229.22:20:14.10#ibcon#read 3, iclass 20, count 0 2006.229.22:20:14.10#ibcon#about to read 4, iclass 20, count 0 2006.229.22:20:14.10#ibcon#read 4, iclass 20, count 0 2006.229.22:20:14.10#ibcon#about to read 5, iclass 20, count 0 2006.229.22:20:14.10#ibcon#read 5, iclass 20, count 0 2006.229.22:20:14.10#ibcon#about to read 6, iclass 20, count 0 2006.229.22:20:14.10#ibcon#read 6, iclass 20, count 0 2006.229.22:20:14.10#ibcon#end of sib2, iclass 20, count 0 2006.229.22:20:14.10#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:20:14.10#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:20:14.10#ibcon#[27=USB\r\n] 2006.229.22:20:14.10#ibcon#*before write, iclass 20, count 0 2006.229.22:20:14.10#ibcon#enter sib2, iclass 20, count 0 2006.229.22:20:14.10#ibcon#flushed, iclass 20, count 0 2006.229.22:20:14.10#ibcon#about to write, iclass 20, count 0 2006.229.22:20:14.10#ibcon#wrote, iclass 20, count 0 2006.229.22:20:14.10#ibcon#about to read 3, iclass 20, count 0 2006.229.22:20:14.13#ibcon#read 3, iclass 20, count 0 2006.229.22:20:14.13#ibcon#about to read 4, iclass 20, count 0 2006.229.22:20:14.13#ibcon#read 4, iclass 20, count 0 2006.229.22:20:14.13#ibcon#about to read 5, iclass 20, count 0 2006.229.22:20:14.13#ibcon#read 5, iclass 20, count 0 2006.229.22:20:14.13#ibcon#about to read 6, iclass 20, count 0 2006.229.22:20:14.13#ibcon#read 6, iclass 20, count 0 2006.229.22:20:14.13#ibcon#end of sib2, iclass 20, count 0 2006.229.22:20:14.13#ibcon#*after write, iclass 20, count 0 2006.229.22:20:14.13#ibcon#*before return 0, iclass 20, count 0 2006.229.22:20:14.13#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:14.13#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:20:14.13#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:20:14.13#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:20:14.13$vck44/vblo=5,709.99 2006.229.22:20:14.13#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.22:20:14.13#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.22:20:14.13#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:14.13#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:14.13#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:14.13#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:14.13#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:20:14.13#ibcon#first serial, iclass 22, count 0 2006.229.22:20:14.13#ibcon#enter sib2, iclass 22, count 0 2006.229.22:20:14.13#ibcon#flushed, iclass 22, count 0 2006.229.22:20:14.13#ibcon#about to write, iclass 22, count 0 2006.229.22:20:14.13#ibcon#wrote, iclass 22, count 0 2006.229.22:20:14.13#ibcon#about to read 3, iclass 22, count 0 2006.229.22:20:14.15#ibcon#read 3, iclass 22, count 0 2006.229.22:20:14.15#ibcon#about to read 4, iclass 22, count 0 2006.229.22:20:14.15#ibcon#read 4, iclass 22, count 0 2006.229.22:20:14.15#ibcon#about to read 5, iclass 22, count 0 2006.229.22:20:14.15#ibcon#read 5, iclass 22, count 0 2006.229.22:20:14.15#ibcon#about to read 6, iclass 22, count 0 2006.229.22:20:14.15#ibcon#read 6, iclass 22, count 0 2006.229.22:20:14.15#ibcon#end of sib2, iclass 22, count 0 2006.229.22:20:14.15#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:20:14.15#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:20:14.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:20:14.15#ibcon#*before write, iclass 22, count 0 2006.229.22:20:14.15#ibcon#enter sib2, iclass 22, count 0 2006.229.22:20:14.15#ibcon#flushed, iclass 22, count 0 2006.229.22:20:14.15#ibcon#about to write, iclass 22, count 0 2006.229.22:20:14.15#ibcon#wrote, iclass 22, count 0 2006.229.22:20:14.15#ibcon#about to read 3, iclass 22, count 0 2006.229.22:20:14.19#ibcon#read 3, iclass 22, count 0 2006.229.22:20:14.19#ibcon#about to read 4, iclass 22, count 0 2006.229.22:20:14.19#ibcon#read 4, iclass 22, count 0 2006.229.22:20:14.19#ibcon#about to read 5, iclass 22, count 0 2006.229.22:20:14.19#ibcon#read 5, iclass 22, count 0 2006.229.22:20:14.19#ibcon#about to read 6, iclass 22, count 0 2006.229.22:20:14.19#ibcon#read 6, iclass 22, count 0 2006.229.22:20:14.19#ibcon#end of sib2, iclass 22, count 0 2006.229.22:20:14.19#ibcon#*after write, iclass 22, count 0 2006.229.22:20:14.19#ibcon#*before return 0, iclass 22, count 0 2006.229.22:20:14.19#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:14.19#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:20:14.19#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:20:14.19#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:20:14.19$vck44/vb=5,4 2006.229.22:20:14.19#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.22:20:14.19#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.22:20:14.19#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:14.19#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:14.25#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:14.25#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:14.25#ibcon#enter wrdev, iclass 24, count 2 2006.229.22:20:14.25#ibcon#first serial, iclass 24, count 2 2006.229.22:20:14.25#ibcon#enter sib2, iclass 24, count 2 2006.229.22:20:14.25#ibcon#flushed, iclass 24, count 2 2006.229.22:20:14.25#ibcon#about to write, iclass 24, count 2 2006.229.22:20:14.25#ibcon#wrote, iclass 24, count 2 2006.229.22:20:14.25#ibcon#about to read 3, iclass 24, count 2 2006.229.22:20:14.27#ibcon#read 3, iclass 24, count 2 2006.229.22:20:14.27#ibcon#about to read 4, iclass 24, count 2 2006.229.22:20:14.27#ibcon#read 4, iclass 24, count 2 2006.229.22:20:14.27#ibcon#about to read 5, iclass 24, count 2 2006.229.22:20:14.27#ibcon#read 5, iclass 24, count 2 2006.229.22:20:14.27#ibcon#about to read 6, iclass 24, count 2 2006.229.22:20:14.27#ibcon#read 6, iclass 24, count 2 2006.229.22:20:14.27#ibcon#end of sib2, iclass 24, count 2 2006.229.22:20:14.27#ibcon#*mode == 0, iclass 24, count 2 2006.229.22:20:14.27#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.22:20:14.27#ibcon#[27=AT05-04\r\n] 2006.229.22:20:14.27#ibcon#*before write, iclass 24, count 2 2006.229.22:20:14.27#ibcon#enter sib2, iclass 24, count 2 2006.229.22:20:14.27#ibcon#flushed, iclass 24, count 2 2006.229.22:20:14.27#ibcon#about to write, iclass 24, count 2 2006.229.22:20:14.27#ibcon#wrote, iclass 24, count 2 2006.229.22:20:14.27#ibcon#about to read 3, iclass 24, count 2 2006.229.22:20:14.30#ibcon#read 3, iclass 24, count 2 2006.229.22:20:14.30#ibcon#about to read 4, iclass 24, count 2 2006.229.22:20:14.30#ibcon#read 4, iclass 24, count 2 2006.229.22:20:14.30#ibcon#about to read 5, iclass 24, count 2 2006.229.22:20:14.30#ibcon#read 5, iclass 24, count 2 2006.229.22:20:14.30#ibcon#about to read 6, iclass 24, count 2 2006.229.22:20:14.30#ibcon#read 6, iclass 24, count 2 2006.229.22:20:14.30#ibcon#end of sib2, iclass 24, count 2 2006.229.22:20:14.30#ibcon#*after write, iclass 24, count 2 2006.229.22:20:14.30#ibcon#*before return 0, iclass 24, count 2 2006.229.22:20:14.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:14.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:20:14.30#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.22:20:14.30#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:14.30#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:14.42#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:14.42#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:14.42#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:20:14.42#ibcon#first serial, iclass 24, count 0 2006.229.22:20:14.42#ibcon#enter sib2, iclass 24, count 0 2006.229.22:20:14.42#ibcon#flushed, iclass 24, count 0 2006.229.22:20:14.42#ibcon#about to write, iclass 24, count 0 2006.229.22:20:14.42#ibcon#wrote, iclass 24, count 0 2006.229.22:20:14.42#ibcon#about to read 3, iclass 24, count 0 2006.229.22:20:14.44#ibcon#read 3, iclass 24, count 0 2006.229.22:20:14.44#ibcon#about to read 4, iclass 24, count 0 2006.229.22:20:14.44#ibcon#read 4, iclass 24, count 0 2006.229.22:20:14.44#ibcon#about to read 5, iclass 24, count 0 2006.229.22:20:14.44#ibcon#read 5, iclass 24, count 0 2006.229.22:20:14.44#ibcon#about to read 6, iclass 24, count 0 2006.229.22:20:14.44#ibcon#read 6, iclass 24, count 0 2006.229.22:20:14.44#ibcon#end of sib2, iclass 24, count 0 2006.229.22:20:14.44#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:20:14.44#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:20:14.44#ibcon#[27=USB\r\n] 2006.229.22:20:14.44#ibcon#*before write, iclass 24, count 0 2006.229.22:20:14.44#ibcon#enter sib2, iclass 24, count 0 2006.229.22:20:14.44#ibcon#flushed, iclass 24, count 0 2006.229.22:20:14.44#ibcon#about to write, iclass 24, count 0 2006.229.22:20:14.44#ibcon#wrote, iclass 24, count 0 2006.229.22:20:14.44#ibcon#about to read 3, iclass 24, count 0 2006.229.22:20:14.47#ibcon#read 3, iclass 24, count 0 2006.229.22:20:14.47#ibcon#about to read 4, iclass 24, count 0 2006.229.22:20:14.47#ibcon#read 4, iclass 24, count 0 2006.229.22:20:14.47#ibcon#about to read 5, iclass 24, count 0 2006.229.22:20:14.47#ibcon#read 5, iclass 24, count 0 2006.229.22:20:14.47#ibcon#about to read 6, iclass 24, count 0 2006.229.22:20:14.47#ibcon#read 6, iclass 24, count 0 2006.229.22:20:14.47#ibcon#end of sib2, iclass 24, count 0 2006.229.22:20:14.47#ibcon#*after write, iclass 24, count 0 2006.229.22:20:14.47#ibcon#*before return 0, iclass 24, count 0 2006.229.22:20:14.47#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:14.47#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:20:14.47#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:20:14.47#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:20:14.47$vck44/vblo=6,719.99 2006.229.22:20:14.47#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.22:20:14.47#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.22:20:14.47#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:14.47#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:14.47#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:14.47#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:14.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:20:14.47#ibcon#first serial, iclass 26, count 0 2006.229.22:20:14.47#ibcon#enter sib2, iclass 26, count 0 2006.229.22:20:14.47#ibcon#flushed, iclass 26, count 0 2006.229.22:20:14.47#ibcon#about to write, iclass 26, count 0 2006.229.22:20:14.47#ibcon#wrote, iclass 26, count 0 2006.229.22:20:14.47#ibcon#about to read 3, iclass 26, count 0 2006.229.22:20:14.49#ibcon#read 3, iclass 26, count 0 2006.229.22:20:14.49#ibcon#about to read 4, iclass 26, count 0 2006.229.22:20:14.49#ibcon#read 4, iclass 26, count 0 2006.229.22:20:14.49#ibcon#about to read 5, iclass 26, count 0 2006.229.22:20:14.49#ibcon#read 5, iclass 26, count 0 2006.229.22:20:14.49#ibcon#about to read 6, iclass 26, count 0 2006.229.22:20:14.49#ibcon#read 6, iclass 26, count 0 2006.229.22:20:14.49#ibcon#end of sib2, iclass 26, count 0 2006.229.22:20:14.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:20:14.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:20:14.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:20:14.49#ibcon#*before write, iclass 26, count 0 2006.229.22:20:14.49#ibcon#enter sib2, iclass 26, count 0 2006.229.22:20:14.49#ibcon#flushed, iclass 26, count 0 2006.229.22:20:14.49#ibcon#about to write, iclass 26, count 0 2006.229.22:20:14.49#ibcon#wrote, iclass 26, count 0 2006.229.22:20:14.49#ibcon#about to read 3, iclass 26, count 0 2006.229.22:20:14.53#ibcon#read 3, iclass 26, count 0 2006.229.22:20:14.53#ibcon#about to read 4, iclass 26, count 0 2006.229.22:20:14.53#ibcon#read 4, iclass 26, count 0 2006.229.22:20:14.53#ibcon#about to read 5, iclass 26, count 0 2006.229.22:20:14.53#ibcon#read 5, iclass 26, count 0 2006.229.22:20:14.53#ibcon#about to read 6, iclass 26, count 0 2006.229.22:20:14.53#ibcon#read 6, iclass 26, count 0 2006.229.22:20:14.53#ibcon#end of sib2, iclass 26, count 0 2006.229.22:20:14.53#ibcon#*after write, iclass 26, count 0 2006.229.22:20:14.53#ibcon#*before return 0, iclass 26, count 0 2006.229.22:20:14.53#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:14.53#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:20:14.53#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:20:14.53#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:20:14.53$vck44/vb=6,4 2006.229.22:20:14.53#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.22:20:14.53#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.22:20:14.53#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:14.53#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:14.59#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:14.59#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:14.59#ibcon#enter wrdev, iclass 28, count 2 2006.229.22:20:14.59#ibcon#first serial, iclass 28, count 2 2006.229.22:20:14.59#ibcon#enter sib2, iclass 28, count 2 2006.229.22:20:14.59#ibcon#flushed, iclass 28, count 2 2006.229.22:20:14.59#ibcon#about to write, iclass 28, count 2 2006.229.22:20:14.59#ibcon#wrote, iclass 28, count 2 2006.229.22:20:14.59#ibcon#about to read 3, iclass 28, count 2 2006.229.22:20:14.61#ibcon#read 3, iclass 28, count 2 2006.229.22:20:14.61#ibcon#about to read 4, iclass 28, count 2 2006.229.22:20:14.61#ibcon#read 4, iclass 28, count 2 2006.229.22:20:14.61#ibcon#about to read 5, iclass 28, count 2 2006.229.22:20:14.61#ibcon#read 5, iclass 28, count 2 2006.229.22:20:14.61#ibcon#about to read 6, iclass 28, count 2 2006.229.22:20:14.61#ibcon#read 6, iclass 28, count 2 2006.229.22:20:14.61#ibcon#end of sib2, iclass 28, count 2 2006.229.22:20:14.61#ibcon#*mode == 0, iclass 28, count 2 2006.229.22:20:14.61#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.22:20:14.61#ibcon#[27=AT06-04\r\n] 2006.229.22:20:14.61#ibcon#*before write, iclass 28, count 2 2006.229.22:20:14.61#ibcon#enter sib2, iclass 28, count 2 2006.229.22:20:14.61#ibcon#flushed, iclass 28, count 2 2006.229.22:20:14.61#ibcon#about to write, iclass 28, count 2 2006.229.22:20:14.61#ibcon#wrote, iclass 28, count 2 2006.229.22:20:14.61#ibcon#about to read 3, iclass 28, count 2 2006.229.22:20:14.64#ibcon#read 3, iclass 28, count 2 2006.229.22:20:14.64#ibcon#about to read 4, iclass 28, count 2 2006.229.22:20:14.64#ibcon#read 4, iclass 28, count 2 2006.229.22:20:14.64#ibcon#about to read 5, iclass 28, count 2 2006.229.22:20:14.64#ibcon#read 5, iclass 28, count 2 2006.229.22:20:14.64#ibcon#about to read 6, iclass 28, count 2 2006.229.22:20:14.64#ibcon#read 6, iclass 28, count 2 2006.229.22:20:14.64#ibcon#end of sib2, iclass 28, count 2 2006.229.22:20:14.64#ibcon#*after write, iclass 28, count 2 2006.229.22:20:14.64#ibcon#*before return 0, iclass 28, count 2 2006.229.22:20:14.64#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:14.64#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:20:14.64#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.22:20:14.64#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:14.64#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:14.76#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:14.76#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:14.76#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:20:14.76#ibcon#first serial, iclass 28, count 0 2006.229.22:20:14.76#ibcon#enter sib2, iclass 28, count 0 2006.229.22:20:14.76#ibcon#flushed, iclass 28, count 0 2006.229.22:20:14.76#ibcon#about to write, iclass 28, count 0 2006.229.22:20:14.76#ibcon#wrote, iclass 28, count 0 2006.229.22:20:14.76#ibcon#about to read 3, iclass 28, count 0 2006.229.22:20:14.78#ibcon#read 3, iclass 28, count 0 2006.229.22:20:14.78#ibcon#about to read 4, iclass 28, count 0 2006.229.22:20:14.78#ibcon#read 4, iclass 28, count 0 2006.229.22:20:14.78#ibcon#about to read 5, iclass 28, count 0 2006.229.22:20:14.78#ibcon#read 5, iclass 28, count 0 2006.229.22:20:14.78#ibcon#about to read 6, iclass 28, count 0 2006.229.22:20:14.78#ibcon#read 6, iclass 28, count 0 2006.229.22:20:14.78#ibcon#end of sib2, iclass 28, count 0 2006.229.22:20:14.78#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:20:14.78#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:20:14.78#ibcon#[27=USB\r\n] 2006.229.22:20:14.78#ibcon#*before write, iclass 28, count 0 2006.229.22:20:14.78#ibcon#enter sib2, iclass 28, count 0 2006.229.22:20:14.78#ibcon#flushed, iclass 28, count 0 2006.229.22:20:14.78#ibcon#about to write, iclass 28, count 0 2006.229.22:20:14.78#ibcon#wrote, iclass 28, count 0 2006.229.22:20:14.78#ibcon#about to read 3, iclass 28, count 0 2006.229.22:20:14.81#ibcon#read 3, iclass 28, count 0 2006.229.22:20:14.81#ibcon#about to read 4, iclass 28, count 0 2006.229.22:20:14.81#ibcon#read 4, iclass 28, count 0 2006.229.22:20:14.81#ibcon#about to read 5, iclass 28, count 0 2006.229.22:20:14.81#ibcon#read 5, iclass 28, count 0 2006.229.22:20:14.81#ibcon#about to read 6, iclass 28, count 0 2006.229.22:20:14.81#ibcon#read 6, iclass 28, count 0 2006.229.22:20:14.81#ibcon#end of sib2, iclass 28, count 0 2006.229.22:20:14.81#ibcon#*after write, iclass 28, count 0 2006.229.22:20:14.81#ibcon#*before return 0, iclass 28, count 0 2006.229.22:20:14.81#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:14.81#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:20:14.81#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:20:14.81#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:20:14.81$vck44/vblo=7,734.99 2006.229.22:20:14.81#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.22:20:14.81#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.22:20:14.81#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:14.81#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:14.81#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:14.81#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:14.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:20:14.81#ibcon#first serial, iclass 30, count 0 2006.229.22:20:14.81#ibcon#enter sib2, iclass 30, count 0 2006.229.22:20:14.81#ibcon#flushed, iclass 30, count 0 2006.229.22:20:14.81#ibcon#about to write, iclass 30, count 0 2006.229.22:20:14.81#ibcon#wrote, iclass 30, count 0 2006.229.22:20:14.81#ibcon#about to read 3, iclass 30, count 0 2006.229.22:20:14.83#ibcon#read 3, iclass 30, count 0 2006.229.22:20:14.83#ibcon#about to read 4, iclass 30, count 0 2006.229.22:20:14.83#ibcon#read 4, iclass 30, count 0 2006.229.22:20:14.83#ibcon#about to read 5, iclass 30, count 0 2006.229.22:20:14.83#ibcon#read 5, iclass 30, count 0 2006.229.22:20:14.83#ibcon#about to read 6, iclass 30, count 0 2006.229.22:20:14.83#ibcon#read 6, iclass 30, count 0 2006.229.22:20:14.83#ibcon#end of sib2, iclass 30, count 0 2006.229.22:20:14.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:20:14.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:20:14.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:20:14.83#ibcon#*before write, iclass 30, count 0 2006.229.22:20:14.83#ibcon#enter sib2, iclass 30, count 0 2006.229.22:20:14.83#ibcon#flushed, iclass 30, count 0 2006.229.22:20:14.83#ibcon#about to write, iclass 30, count 0 2006.229.22:20:14.83#ibcon#wrote, iclass 30, count 0 2006.229.22:20:14.83#ibcon#about to read 3, iclass 30, count 0 2006.229.22:20:14.87#ibcon#read 3, iclass 30, count 0 2006.229.22:20:14.87#ibcon#about to read 4, iclass 30, count 0 2006.229.22:20:14.87#ibcon#read 4, iclass 30, count 0 2006.229.22:20:14.87#ibcon#about to read 5, iclass 30, count 0 2006.229.22:20:14.87#ibcon#read 5, iclass 30, count 0 2006.229.22:20:14.87#ibcon#about to read 6, iclass 30, count 0 2006.229.22:20:14.87#ibcon#read 6, iclass 30, count 0 2006.229.22:20:14.87#ibcon#end of sib2, iclass 30, count 0 2006.229.22:20:14.87#ibcon#*after write, iclass 30, count 0 2006.229.22:20:14.87#ibcon#*before return 0, iclass 30, count 0 2006.229.22:20:14.87#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:14.87#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:20:14.87#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:20:14.87#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:20:14.87$vck44/vb=7,4 2006.229.22:20:14.87#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.22:20:14.87#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.22:20:14.87#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:14.87#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:20:14.93#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:20:14.93#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:20:14.93#ibcon#enter wrdev, iclass 32, count 2 2006.229.22:20:14.93#ibcon#first serial, iclass 32, count 2 2006.229.22:20:14.93#ibcon#enter sib2, iclass 32, count 2 2006.229.22:20:14.93#ibcon#flushed, iclass 32, count 2 2006.229.22:20:14.93#ibcon#about to write, iclass 32, count 2 2006.229.22:20:14.93#ibcon#wrote, iclass 32, count 2 2006.229.22:20:14.93#ibcon#about to read 3, iclass 32, count 2 2006.229.22:20:14.95#ibcon#read 3, iclass 32, count 2 2006.229.22:20:14.95#ibcon#about to read 4, iclass 32, count 2 2006.229.22:20:14.95#ibcon#read 4, iclass 32, count 2 2006.229.22:20:14.95#ibcon#about to read 5, iclass 32, count 2 2006.229.22:20:14.95#ibcon#read 5, iclass 32, count 2 2006.229.22:20:14.95#ibcon#about to read 6, iclass 32, count 2 2006.229.22:20:14.95#ibcon#read 6, iclass 32, count 2 2006.229.22:20:14.95#ibcon#end of sib2, iclass 32, count 2 2006.229.22:20:14.95#ibcon#*mode == 0, iclass 32, count 2 2006.229.22:20:14.95#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.22:20:14.95#ibcon#[27=AT07-04\r\n] 2006.229.22:20:14.95#ibcon#*before write, iclass 32, count 2 2006.229.22:20:14.95#ibcon#enter sib2, iclass 32, count 2 2006.229.22:20:14.95#ibcon#flushed, iclass 32, count 2 2006.229.22:20:14.95#ibcon#about to write, iclass 32, count 2 2006.229.22:20:14.95#ibcon#wrote, iclass 32, count 2 2006.229.22:20:14.95#ibcon#about to read 3, iclass 32, count 2 2006.229.22:20:14.98#ibcon#read 3, iclass 32, count 2 2006.229.22:20:14.98#ibcon#about to read 4, iclass 32, count 2 2006.229.22:20:14.98#ibcon#read 4, iclass 32, count 2 2006.229.22:20:14.98#ibcon#about to read 5, iclass 32, count 2 2006.229.22:20:14.98#ibcon#read 5, iclass 32, count 2 2006.229.22:20:14.98#ibcon#about to read 6, iclass 32, count 2 2006.229.22:20:14.98#ibcon#read 6, iclass 32, count 2 2006.229.22:20:14.98#ibcon#end of sib2, iclass 32, count 2 2006.229.22:20:14.98#ibcon#*after write, iclass 32, count 2 2006.229.22:20:14.98#ibcon#*before return 0, iclass 32, count 2 2006.229.22:20:14.98#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:20:14.98#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:20:14.98#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.22:20:14.98#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:14.98#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:20:15.10#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:20:15.10#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:20:15.10#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:20:15.10#ibcon#first serial, iclass 32, count 0 2006.229.22:20:15.10#ibcon#enter sib2, iclass 32, count 0 2006.229.22:20:15.10#ibcon#flushed, iclass 32, count 0 2006.229.22:20:15.10#ibcon#about to write, iclass 32, count 0 2006.229.22:20:15.10#ibcon#wrote, iclass 32, count 0 2006.229.22:20:15.10#ibcon#about to read 3, iclass 32, count 0 2006.229.22:20:15.12#ibcon#read 3, iclass 32, count 0 2006.229.22:20:15.12#ibcon#about to read 4, iclass 32, count 0 2006.229.22:20:15.12#ibcon#read 4, iclass 32, count 0 2006.229.22:20:15.12#ibcon#about to read 5, iclass 32, count 0 2006.229.22:20:15.12#ibcon#read 5, iclass 32, count 0 2006.229.22:20:15.12#ibcon#about to read 6, iclass 32, count 0 2006.229.22:20:15.12#ibcon#read 6, iclass 32, count 0 2006.229.22:20:15.12#ibcon#end of sib2, iclass 32, count 0 2006.229.22:20:15.12#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:20:15.12#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:20:15.12#ibcon#[27=USB\r\n] 2006.229.22:20:15.12#ibcon#*before write, iclass 32, count 0 2006.229.22:20:15.12#ibcon#enter sib2, iclass 32, count 0 2006.229.22:20:15.12#ibcon#flushed, iclass 32, count 0 2006.229.22:20:15.12#ibcon#about to write, iclass 32, count 0 2006.229.22:20:15.12#ibcon#wrote, iclass 32, count 0 2006.229.22:20:15.12#ibcon#about to read 3, iclass 32, count 0 2006.229.22:20:15.15#ibcon#read 3, iclass 32, count 0 2006.229.22:20:15.15#ibcon#about to read 4, iclass 32, count 0 2006.229.22:20:15.15#ibcon#read 4, iclass 32, count 0 2006.229.22:20:15.15#ibcon#about to read 5, iclass 32, count 0 2006.229.22:20:15.15#ibcon#read 5, iclass 32, count 0 2006.229.22:20:15.15#ibcon#about to read 6, iclass 32, count 0 2006.229.22:20:15.15#ibcon#read 6, iclass 32, count 0 2006.229.22:20:15.15#ibcon#end of sib2, iclass 32, count 0 2006.229.22:20:15.15#ibcon#*after write, iclass 32, count 0 2006.229.22:20:15.15#ibcon#*before return 0, iclass 32, count 0 2006.229.22:20:15.15#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:20:15.15#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:20:15.15#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:20:15.15#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:20:15.15$vck44/vblo=8,744.99 2006.229.22:20:15.15#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.22:20:15.15#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.22:20:15.15#ibcon#ireg 17 cls_cnt 0 2006.229.22:20:15.15#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:20:15.15#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:20:15.15#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:20:15.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:20:15.15#ibcon#first serial, iclass 34, count 0 2006.229.22:20:15.15#ibcon#enter sib2, iclass 34, count 0 2006.229.22:20:15.15#ibcon#flushed, iclass 34, count 0 2006.229.22:20:15.15#ibcon#about to write, iclass 34, count 0 2006.229.22:20:15.15#ibcon#wrote, iclass 34, count 0 2006.229.22:20:15.15#ibcon#about to read 3, iclass 34, count 0 2006.229.22:20:15.17#ibcon#read 3, iclass 34, count 0 2006.229.22:20:15.17#ibcon#about to read 4, iclass 34, count 0 2006.229.22:20:15.17#ibcon#read 4, iclass 34, count 0 2006.229.22:20:15.17#ibcon#about to read 5, iclass 34, count 0 2006.229.22:20:15.17#ibcon#read 5, iclass 34, count 0 2006.229.22:20:15.17#ibcon#about to read 6, iclass 34, count 0 2006.229.22:20:15.17#ibcon#read 6, iclass 34, count 0 2006.229.22:20:15.17#ibcon#end of sib2, iclass 34, count 0 2006.229.22:20:15.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:20:15.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:20:15.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:20:15.17#ibcon#*before write, iclass 34, count 0 2006.229.22:20:15.17#ibcon#enter sib2, iclass 34, count 0 2006.229.22:20:15.17#ibcon#flushed, iclass 34, count 0 2006.229.22:20:15.17#ibcon#about to write, iclass 34, count 0 2006.229.22:20:15.17#ibcon#wrote, iclass 34, count 0 2006.229.22:20:15.17#ibcon#about to read 3, iclass 34, count 0 2006.229.22:20:15.21#ibcon#read 3, iclass 34, count 0 2006.229.22:20:15.21#ibcon#about to read 4, iclass 34, count 0 2006.229.22:20:15.21#ibcon#read 4, iclass 34, count 0 2006.229.22:20:15.21#ibcon#about to read 5, iclass 34, count 0 2006.229.22:20:15.21#ibcon#read 5, iclass 34, count 0 2006.229.22:20:15.21#ibcon#about to read 6, iclass 34, count 0 2006.229.22:20:15.21#ibcon#read 6, iclass 34, count 0 2006.229.22:20:15.21#ibcon#end of sib2, iclass 34, count 0 2006.229.22:20:15.21#ibcon#*after write, iclass 34, count 0 2006.229.22:20:15.21#ibcon#*before return 0, iclass 34, count 0 2006.229.22:20:15.21#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:20:15.21#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:20:15.21#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:20:15.21#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:20:15.21$vck44/vb=8,4 2006.229.22:20:15.21#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.22:20:15.21#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.22:20:15.21#ibcon#ireg 11 cls_cnt 2 2006.229.22:20:15.21#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:20:15.27#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:20:15.27#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:20:15.27#ibcon#enter wrdev, iclass 36, count 2 2006.229.22:20:15.27#ibcon#first serial, iclass 36, count 2 2006.229.22:20:15.27#ibcon#enter sib2, iclass 36, count 2 2006.229.22:20:15.27#ibcon#flushed, iclass 36, count 2 2006.229.22:20:15.27#ibcon#about to write, iclass 36, count 2 2006.229.22:20:15.27#ibcon#wrote, iclass 36, count 2 2006.229.22:20:15.27#ibcon#about to read 3, iclass 36, count 2 2006.229.22:20:15.29#ibcon#read 3, iclass 36, count 2 2006.229.22:20:15.29#ibcon#about to read 4, iclass 36, count 2 2006.229.22:20:15.29#ibcon#read 4, iclass 36, count 2 2006.229.22:20:15.29#ibcon#about to read 5, iclass 36, count 2 2006.229.22:20:15.29#ibcon#read 5, iclass 36, count 2 2006.229.22:20:15.29#ibcon#about to read 6, iclass 36, count 2 2006.229.22:20:15.29#ibcon#read 6, iclass 36, count 2 2006.229.22:20:15.29#ibcon#end of sib2, iclass 36, count 2 2006.229.22:20:15.29#ibcon#*mode == 0, iclass 36, count 2 2006.229.22:20:15.29#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.22:20:15.29#ibcon#[27=AT08-04\r\n] 2006.229.22:20:15.29#ibcon#*before write, iclass 36, count 2 2006.229.22:20:15.29#ibcon#enter sib2, iclass 36, count 2 2006.229.22:20:15.29#ibcon#flushed, iclass 36, count 2 2006.229.22:20:15.29#ibcon#about to write, iclass 36, count 2 2006.229.22:20:15.29#ibcon#wrote, iclass 36, count 2 2006.229.22:20:15.29#ibcon#about to read 3, iclass 36, count 2 2006.229.22:20:15.32#ibcon#read 3, iclass 36, count 2 2006.229.22:20:15.32#ibcon#about to read 4, iclass 36, count 2 2006.229.22:20:15.32#ibcon#read 4, iclass 36, count 2 2006.229.22:20:15.32#ibcon#about to read 5, iclass 36, count 2 2006.229.22:20:15.32#ibcon#read 5, iclass 36, count 2 2006.229.22:20:15.32#ibcon#about to read 6, iclass 36, count 2 2006.229.22:20:15.32#ibcon#read 6, iclass 36, count 2 2006.229.22:20:15.32#ibcon#end of sib2, iclass 36, count 2 2006.229.22:20:15.32#ibcon#*after write, iclass 36, count 2 2006.229.22:20:15.32#ibcon#*before return 0, iclass 36, count 2 2006.229.22:20:15.32#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:20:15.32#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:20:15.32#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.22:20:15.32#ibcon#ireg 7 cls_cnt 0 2006.229.22:20:15.32#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:20:15.44#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:20:15.44#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:20:15.44#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:20:15.44#ibcon#first serial, iclass 36, count 0 2006.229.22:20:15.44#ibcon#enter sib2, iclass 36, count 0 2006.229.22:20:15.44#ibcon#flushed, iclass 36, count 0 2006.229.22:20:15.44#ibcon#about to write, iclass 36, count 0 2006.229.22:20:15.44#ibcon#wrote, iclass 36, count 0 2006.229.22:20:15.44#ibcon#about to read 3, iclass 36, count 0 2006.229.22:20:15.46#ibcon#read 3, iclass 36, count 0 2006.229.22:20:15.46#ibcon#about to read 4, iclass 36, count 0 2006.229.22:20:15.46#ibcon#read 4, iclass 36, count 0 2006.229.22:20:15.46#ibcon#about to read 5, iclass 36, count 0 2006.229.22:20:15.46#ibcon#read 5, iclass 36, count 0 2006.229.22:20:15.46#ibcon#about to read 6, iclass 36, count 0 2006.229.22:20:15.46#ibcon#read 6, iclass 36, count 0 2006.229.22:20:15.46#ibcon#end of sib2, iclass 36, count 0 2006.229.22:20:15.46#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:20:15.46#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:20:15.46#ibcon#[27=USB\r\n] 2006.229.22:20:15.46#ibcon#*before write, iclass 36, count 0 2006.229.22:20:15.46#ibcon#enter sib2, iclass 36, count 0 2006.229.22:20:15.46#ibcon#flushed, iclass 36, count 0 2006.229.22:20:15.46#ibcon#about to write, iclass 36, count 0 2006.229.22:20:15.46#ibcon#wrote, iclass 36, count 0 2006.229.22:20:15.46#ibcon#about to read 3, iclass 36, count 0 2006.229.22:20:15.49#ibcon#read 3, iclass 36, count 0 2006.229.22:20:15.49#ibcon#about to read 4, iclass 36, count 0 2006.229.22:20:15.49#ibcon#read 4, iclass 36, count 0 2006.229.22:20:15.49#ibcon#about to read 5, iclass 36, count 0 2006.229.22:20:15.49#ibcon#read 5, iclass 36, count 0 2006.229.22:20:15.49#ibcon#about to read 6, iclass 36, count 0 2006.229.22:20:15.49#ibcon#read 6, iclass 36, count 0 2006.229.22:20:15.49#ibcon#end of sib2, iclass 36, count 0 2006.229.22:20:15.49#ibcon#*after write, iclass 36, count 0 2006.229.22:20:15.49#ibcon#*before return 0, iclass 36, count 0 2006.229.22:20:15.49#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:20:15.49#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:20:15.49#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:20:15.49#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:20:15.49$vck44/vabw=wide 2006.229.22:20:15.49#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.22:20:15.49#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.22:20:15.49#ibcon#ireg 8 cls_cnt 0 2006.229.22:20:15.49#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:15.49#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:15.49#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:15.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:20:15.49#ibcon#first serial, iclass 38, count 0 2006.229.22:20:15.49#ibcon#enter sib2, iclass 38, count 0 2006.229.22:20:15.49#ibcon#flushed, iclass 38, count 0 2006.229.22:20:15.49#ibcon#about to write, iclass 38, count 0 2006.229.22:20:15.49#ibcon#wrote, iclass 38, count 0 2006.229.22:20:15.49#ibcon#about to read 3, iclass 38, count 0 2006.229.22:20:15.51#ibcon#read 3, iclass 38, count 0 2006.229.22:20:15.51#ibcon#about to read 4, iclass 38, count 0 2006.229.22:20:15.51#ibcon#read 4, iclass 38, count 0 2006.229.22:20:15.51#ibcon#about to read 5, iclass 38, count 0 2006.229.22:20:15.51#ibcon#read 5, iclass 38, count 0 2006.229.22:20:15.51#ibcon#about to read 6, iclass 38, count 0 2006.229.22:20:15.51#ibcon#read 6, iclass 38, count 0 2006.229.22:20:15.51#ibcon#end of sib2, iclass 38, count 0 2006.229.22:20:15.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:20:15.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:20:15.51#ibcon#[25=BW32\r\n] 2006.229.22:20:15.51#ibcon#*before write, iclass 38, count 0 2006.229.22:20:15.51#ibcon#enter sib2, iclass 38, count 0 2006.229.22:20:15.51#ibcon#flushed, iclass 38, count 0 2006.229.22:20:15.51#ibcon#about to write, iclass 38, count 0 2006.229.22:20:15.51#ibcon#wrote, iclass 38, count 0 2006.229.22:20:15.51#ibcon#about to read 3, iclass 38, count 0 2006.229.22:20:15.54#ibcon#read 3, iclass 38, count 0 2006.229.22:20:15.54#ibcon#about to read 4, iclass 38, count 0 2006.229.22:20:15.54#ibcon#read 4, iclass 38, count 0 2006.229.22:20:15.54#ibcon#about to read 5, iclass 38, count 0 2006.229.22:20:15.54#ibcon#read 5, iclass 38, count 0 2006.229.22:20:15.54#ibcon#about to read 6, iclass 38, count 0 2006.229.22:20:15.54#ibcon#read 6, iclass 38, count 0 2006.229.22:20:15.54#ibcon#end of sib2, iclass 38, count 0 2006.229.22:20:15.54#ibcon#*after write, iclass 38, count 0 2006.229.22:20:15.54#ibcon#*before return 0, iclass 38, count 0 2006.229.22:20:15.54#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:15.54#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:20:15.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:20:15.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:20:15.54$vck44/vbbw=wide 2006.229.22:20:15.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.22:20:15.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.22:20:15.54#ibcon#ireg 8 cls_cnt 0 2006.229.22:20:15.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:20:15.61#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:20:15.61#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:20:15.61#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:20:15.61#ibcon#first serial, iclass 40, count 0 2006.229.22:20:15.61#ibcon#enter sib2, iclass 40, count 0 2006.229.22:20:15.61#ibcon#flushed, iclass 40, count 0 2006.229.22:20:15.61#ibcon#about to write, iclass 40, count 0 2006.229.22:20:15.61#ibcon#wrote, iclass 40, count 0 2006.229.22:20:15.61#ibcon#about to read 3, iclass 40, count 0 2006.229.22:20:15.63#ibcon#read 3, iclass 40, count 0 2006.229.22:20:15.63#ibcon#about to read 4, iclass 40, count 0 2006.229.22:20:15.63#ibcon#read 4, iclass 40, count 0 2006.229.22:20:15.63#ibcon#about to read 5, iclass 40, count 0 2006.229.22:20:15.63#ibcon#read 5, iclass 40, count 0 2006.229.22:20:15.63#ibcon#about to read 6, iclass 40, count 0 2006.229.22:20:15.63#ibcon#read 6, iclass 40, count 0 2006.229.22:20:15.63#ibcon#end of sib2, iclass 40, count 0 2006.229.22:20:15.63#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:20:15.63#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:20:15.63#ibcon#[27=BW32\r\n] 2006.229.22:20:15.63#ibcon#*before write, iclass 40, count 0 2006.229.22:20:15.63#ibcon#enter sib2, iclass 40, count 0 2006.229.22:20:15.63#ibcon#flushed, iclass 40, count 0 2006.229.22:20:15.63#ibcon#about to write, iclass 40, count 0 2006.229.22:20:15.63#ibcon#wrote, iclass 40, count 0 2006.229.22:20:15.63#ibcon#about to read 3, iclass 40, count 0 2006.229.22:20:15.66#ibcon#read 3, iclass 40, count 0 2006.229.22:20:15.66#ibcon#about to read 4, iclass 40, count 0 2006.229.22:20:15.66#ibcon#read 4, iclass 40, count 0 2006.229.22:20:15.66#ibcon#about to read 5, iclass 40, count 0 2006.229.22:20:15.66#ibcon#read 5, iclass 40, count 0 2006.229.22:20:15.66#ibcon#about to read 6, iclass 40, count 0 2006.229.22:20:15.66#ibcon#read 6, iclass 40, count 0 2006.229.22:20:15.66#ibcon#end of sib2, iclass 40, count 0 2006.229.22:20:15.66#ibcon#*after write, iclass 40, count 0 2006.229.22:20:15.66#ibcon#*before return 0, iclass 40, count 0 2006.229.22:20:15.66#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:20:15.66#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:20:15.66#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:20:15.66#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:20:15.66$setupk4/ifdk4 2006.229.22:20:15.66$ifdk4/lo= 2006.229.22:20:15.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:20:15.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:20:15.66$ifdk4/patch= 2006.229.22:20:15.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:20:15.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:20:15.66$setupk4/!*+20s 2006.229.22:20:22.42#abcon#<5=/09 1.4 3.8 28.39 911002.4\r\n> 2006.229.22:20:22.44#abcon#{5=INTERFACE CLEAR} 2006.229.22:20:22.50#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:20:30.17$setupk4/"tpicd 2006.229.22:20:30.17$setupk4/echo=off 2006.229.22:20:30.17$setupk4/xlog=off 2006.229.22:20:30.17:!2006.229.22:27:09 2006.229.22:21:01.13#trakl#Source acquired 2006.229.22:21:02.13#flagr#flagr/antenna,acquired 2006.229.22:27:09.00:preob 2006.229.22:27:09.14/onsource/TRACKING 2006.229.22:27:09.14:!2006.229.22:27:19 2006.229.22:27:19.00:"tape 2006.229.22:27:19.00:"st=record 2006.229.22:27:19.00:data_valid=on 2006.229.22:27:19.00:midob 2006.229.22:27:20.14/onsource/TRACKING 2006.229.22:27:20.14/wx/28.48,1002.4,93 2006.229.22:27:20.34/cable/+6.4169E-03 2006.229.22:27:21.43/va/01,08,usb,yes,29,32 2006.229.22:27:21.43/va/02,07,usb,yes,32,32 2006.229.22:27:21.43/va/03,06,usb,yes,39,42 2006.229.22:27:21.43/va/04,07,usb,yes,33,34 2006.229.22:27:21.43/va/05,04,usb,yes,29,30 2006.229.22:27:21.43/va/06,04,usb,yes,33,32 2006.229.22:27:21.43/va/07,05,usb,yes,29,29 2006.229.22:27:21.43/va/08,06,usb,yes,21,26 2006.229.22:27:21.66/valo/01,524.99,yes,locked 2006.229.22:27:21.66/valo/02,534.99,yes,locked 2006.229.22:27:21.66/valo/03,564.99,yes,locked 2006.229.22:27:21.66/valo/04,624.99,yes,locked 2006.229.22:27:21.66/valo/05,734.99,yes,locked 2006.229.22:27:21.66/valo/06,814.99,yes,locked 2006.229.22:27:21.66/valo/07,864.99,yes,locked 2006.229.22:27:21.66/valo/08,884.99,yes,locked 2006.229.22:27:22.75/vb/01,04,usb,yes,31,29 2006.229.22:27:22.75/vb/02,04,usb,yes,33,33 2006.229.22:27:22.75/vb/03,04,usb,yes,30,33 2006.229.22:27:22.75/vb/04,04,usb,yes,35,34 2006.229.22:27:22.75/vb/05,04,usb,yes,27,30 2006.229.22:27:22.75/vb/06,04,usb,yes,32,28 2006.229.22:27:22.75/vb/07,04,usb,yes,31,31 2006.229.22:27:22.75/vb/08,04,usb,yes,29,32 2006.229.22:27:22.98/vblo/01,629.99,yes,locked 2006.229.22:27:22.98/vblo/02,634.99,yes,locked 2006.229.22:27:22.98/vblo/03,649.99,yes,locked 2006.229.22:27:22.98/vblo/04,679.99,yes,locked 2006.229.22:27:22.98/vblo/05,709.99,yes,locked 2006.229.22:27:22.98/vblo/06,719.99,yes,locked 2006.229.22:27:22.98/vblo/07,734.99,yes,locked 2006.229.22:27:22.98/vblo/08,744.99,yes,locked 2006.229.22:27:23.13/vabw/8 2006.229.22:27:23.28/vbbw/8 2006.229.22:27:23.37/xfe/off,on,12.2 2006.229.22:27:23.75/ifatt/23,28,28,28 2006.229.22:27:24.08/fmout-gps/S +4.53E-07 2006.229.22:27:24.12:!2006.229.22:31:09 2006.229.22:31:09.00:data_valid=off 2006.229.22:31:09.00:"et 2006.229.22:31:09.00:!+3s 2006.229.22:31:12.01:"tape 2006.229.22:31:12.01:postob 2006.229.22:31:12.23/cable/+6.4166E-03 2006.229.22:31:12.23/wx/28.58,1002.5,92 2006.229.22:31:13.08/fmout-gps/S +4.53E-07 2006.229.22:31:13.08:scan_name=229-2234,jd0608,150 2006.229.22:31:13.08:source=0059+581,010245.76,582411.1,2000.0,ccw 2006.229.22:31:14.14#flagr#flagr/antenna,new-source 2006.229.22:31:14.14:checkk5 2006.229.22:31:14.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:31:14.91/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:31:15.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:31:15.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:31:16.11/chk_obsdata//k5ts1/T2292227??a.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.22:31:16.50/chk_obsdata//k5ts2/T2292227??b.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.22:31:16.90/chk_obsdata//k5ts3/T2292227??c.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.22:31:17.33/chk_obsdata//k5ts4/T2292227??d.dat file size is correct (nominal:920MB, actual:916MB). 2006.229.22:31:18.05/k5log//k5ts1_log_newline 2006.229.22:31:18.76/k5log//k5ts2_log_newline 2006.229.22:31:19.47/k5log//k5ts3_log_newline 2006.229.22:31:20.18/k5log//k5ts4_log_newline 2006.229.22:31:20.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:31:20.20:setupk4=1 2006.229.22:31:20.20$setupk4/echo=on 2006.229.22:31:20.20$setupk4/pcalon 2006.229.22:31:20.20$pcalon/"no phase cal control is implemented here 2006.229.22:31:20.20$setupk4/"tpicd=stop 2006.229.22:31:20.20$setupk4/"rec=synch_on 2006.229.22:31:20.20$setupk4/"rec_mode=128 2006.229.22:31:20.20$setupk4/!* 2006.229.22:31:20.20$setupk4/recpk4 2006.229.22:31:20.21$recpk4/recpatch= 2006.229.22:31:20.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:31:20.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:31:20.21$setupk4/vck44 2006.229.22:31:20.21$vck44/valo=1,524.99 2006.229.22:31:20.21#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.22:31:20.21#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.22:31:20.21#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:20.21#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:20.21#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:20.21#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:20.21#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:31:20.21#ibcon#first serial, iclass 17, count 0 2006.229.22:31:20.21#ibcon#enter sib2, iclass 17, count 0 2006.229.22:31:20.21#ibcon#flushed, iclass 17, count 0 2006.229.22:31:20.21#ibcon#about to write, iclass 17, count 0 2006.229.22:31:20.21#ibcon#wrote, iclass 17, count 0 2006.229.22:31:20.21#ibcon#about to read 3, iclass 17, count 0 2006.229.22:31:20.23#ibcon#read 3, iclass 17, count 0 2006.229.22:31:20.23#ibcon#about to read 4, iclass 17, count 0 2006.229.22:31:20.23#ibcon#read 4, iclass 17, count 0 2006.229.22:31:20.23#ibcon#about to read 5, iclass 17, count 0 2006.229.22:31:20.23#ibcon#read 5, iclass 17, count 0 2006.229.22:31:20.23#ibcon#about to read 6, iclass 17, count 0 2006.229.22:31:20.23#ibcon#read 6, iclass 17, count 0 2006.229.22:31:20.23#ibcon#end of sib2, iclass 17, count 0 2006.229.22:31:20.23#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:31:20.23#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:31:20.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:31:20.23#ibcon#*before write, iclass 17, count 0 2006.229.22:31:20.23#ibcon#enter sib2, iclass 17, count 0 2006.229.22:31:20.23#ibcon#flushed, iclass 17, count 0 2006.229.22:31:20.23#ibcon#about to write, iclass 17, count 0 2006.229.22:31:20.23#ibcon#wrote, iclass 17, count 0 2006.229.22:31:20.23#ibcon#about to read 3, iclass 17, count 0 2006.229.22:31:20.28#ibcon#read 3, iclass 17, count 0 2006.229.22:31:20.28#ibcon#about to read 4, iclass 17, count 0 2006.229.22:31:20.28#ibcon#read 4, iclass 17, count 0 2006.229.22:31:20.28#ibcon#about to read 5, iclass 17, count 0 2006.229.22:31:20.28#ibcon#read 5, iclass 17, count 0 2006.229.22:31:20.28#ibcon#about to read 6, iclass 17, count 0 2006.229.22:31:20.28#ibcon#read 6, iclass 17, count 0 2006.229.22:31:20.28#ibcon#end of sib2, iclass 17, count 0 2006.229.22:31:20.28#ibcon#*after write, iclass 17, count 0 2006.229.22:31:20.28#ibcon#*before return 0, iclass 17, count 0 2006.229.22:31:20.28#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:20.28#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:20.28#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:31:20.28#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:31:20.28$vck44/va=1,8 2006.229.22:31:20.28#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.22:31:20.28#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.22:31:20.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:20.28#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:20.28#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:20.28#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:20.28#ibcon#enter wrdev, iclass 19, count 2 2006.229.22:31:20.28#ibcon#first serial, iclass 19, count 2 2006.229.22:31:20.28#ibcon#enter sib2, iclass 19, count 2 2006.229.22:31:20.28#ibcon#flushed, iclass 19, count 2 2006.229.22:31:20.28#ibcon#about to write, iclass 19, count 2 2006.229.22:31:20.28#ibcon#wrote, iclass 19, count 2 2006.229.22:31:20.28#ibcon#about to read 3, iclass 19, count 2 2006.229.22:31:20.30#ibcon#read 3, iclass 19, count 2 2006.229.22:31:20.30#ibcon#about to read 4, iclass 19, count 2 2006.229.22:31:20.30#ibcon#read 4, iclass 19, count 2 2006.229.22:31:20.30#ibcon#about to read 5, iclass 19, count 2 2006.229.22:31:20.30#ibcon#read 5, iclass 19, count 2 2006.229.22:31:20.30#ibcon#about to read 6, iclass 19, count 2 2006.229.22:31:20.30#ibcon#read 6, iclass 19, count 2 2006.229.22:31:20.30#ibcon#end of sib2, iclass 19, count 2 2006.229.22:31:20.30#ibcon#*mode == 0, iclass 19, count 2 2006.229.22:31:20.30#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.22:31:20.30#ibcon#[25=AT01-08\r\n] 2006.229.22:31:20.30#ibcon#*before write, iclass 19, count 2 2006.229.22:31:20.30#ibcon#enter sib2, iclass 19, count 2 2006.229.22:31:20.30#ibcon#flushed, iclass 19, count 2 2006.229.22:31:20.30#ibcon#about to write, iclass 19, count 2 2006.229.22:31:20.30#ibcon#wrote, iclass 19, count 2 2006.229.22:31:20.30#ibcon#about to read 3, iclass 19, count 2 2006.229.22:31:20.33#ibcon#read 3, iclass 19, count 2 2006.229.22:31:20.33#ibcon#about to read 4, iclass 19, count 2 2006.229.22:31:20.33#ibcon#read 4, iclass 19, count 2 2006.229.22:31:20.33#ibcon#about to read 5, iclass 19, count 2 2006.229.22:31:20.33#ibcon#read 5, iclass 19, count 2 2006.229.22:31:20.33#ibcon#about to read 6, iclass 19, count 2 2006.229.22:31:20.33#ibcon#read 6, iclass 19, count 2 2006.229.22:31:20.33#ibcon#end of sib2, iclass 19, count 2 2006.229.22:31:20.33#ibcon#*after write, iclass 19, count 2 2006.229.22:31:20.33#ibcon#*before return 0, iclass 19, count 2 2006.229.22:31:20.33#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:20.33#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:20.33#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.22:31:20.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:20.33#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:20.45#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:20.45#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:20.45#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:31:20.45#ibcon#first serial, iclass 19, count 0 2006.229.22:31:20.45#ibcon#enter sib2, iclass 19, count 0 2006.229.22:31:20.45#ibcon#flushed, iclass 19, count 0 2006.229.22:31:20.45#ibcon#about to write, iclass 19, count 0 2006.229.22:31:20.45#ibcon#wrote, iclass 19, count 0 2006.229.22:31:20.45#ibcon#about to read 3, iclass 19, count 0 2006.229.22:31:20.47#ibcon#read 3, iclass 19, count 0 2006.229.22:31:20.47#ibcon#about to read 4, iclass 19, count 0 2006.229.22:31:20.47#ibcon#read 4, iclass 19, count 0 2006.229.22:31:20.47#ibcon#about to read 5, iclass 19, count 0 2006.229.22:31:20.47#ibcon#read 5, iclass 19, count 0 2006.229.22:31:20.47#ibcon#about to read 6, iclass 19, count 0 2006.229.22:31:20.47#ibcon#read 6, iclass 19, count 0 2006.229.22:31:20.47#ibcon#end of sib2, iclass 19, count 0 2006.229.22:31:20.47#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:31:20.47#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:31:20.47#ibcon#[25=USB\r\n] 2006.229.22:31:20.47#ibcon#*before write, iclass 19, count 0 2006.229.22:31:20.47#ibcon#enter sib2, iclass 19, count 0 2006.229.22:31:20.47#ibcon#flushed, iclass 19, count 0 2006.229.22:31:20.47#ibcon#about to write, iclass 19, count 0 2006.229.22:31:20.47#ibcon#wrote, iclass 19, count 0 2006.229.22:31:20.47#ibcon#about to read 3, iclass 19, count 0 2006.229.22:31:20.50#ibcon#read 3, iclass 19, count 0 2006.229.22:31:20.50#ibcon#about to read 4, iclass 19, count 0 2006.229.22:31:20.50#ibcon#read 4, iclass 19, count 0 2006.229.22:31:20.50#ibcon#about to read 5, iclass 19, count 0 2006.229.22:31:20.50#ibcon#read 5, iclass 19, count 0 2006.229.22:31:20.50#ibcon#about to read 6, iclass 19, count 0 2006.229.22:31:20.50#ibcon#read 6, iclass 19, count 0 2006.229.22:31:20.50#ibcon#end of sib2, iclass 19, count 0 2006.229.22:31:20.50#ibcon#*after write, iclass 19, count 0 2006.229.22:31:20.50#ibcon#*before return 0, iclass 19, count 0 2006.229.22:31:20.50#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:20.50#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:20.50#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:31:20.50#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:31:20.50$vck44/valo=2,534.99 2006.229.22:31:20.50#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:31:20.50#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:31:20.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:20.50#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:20.50#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:20.50#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:20.50#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:31:20.50#ibcon#first serial, iclass 21, count 0 2006.229.22:31:20.50#ibcon#enter sib2, iclass 21, count 0 2006.229.22:31:20.50#ibcon#flushed, iclass 21, count 0 2006.229.22:31:20.50#ibcon#about to write, iclass 21, count 0 2006.229.22:31:20.50#ibcon#wrote, iclass 21, count 0 2006.229.22:31:20.50#ibcon#about to read 3, iclass 21, count 0 2006.229.22:31:20.52#ibcon#read 3, iclass 21, count 0 2006.229.22:31:20.52#ibcon#about to read 4, iclass 21, count 0 2006.229.22:31:20.52#ibcon#read 4, iclass 21, count 0 2006.229.22:31:20.52#ibcon#about to read 5, iclass 21, count 0 2006.229.22:31:20.52#ibcon#read 5, iclass 21, count 0 2006.229.22:31:20.52#ibcon#about to read 6, iclass 21, count 0 2006.229.22:31:20.52#ibcon#read 6, iclass 21, count 0 2006.229.22:31:20.52#ibcon#end of sib2, iclass 21, count 0 2006.229.22:31:20.52#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:31:20.52#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:31:20.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:31:20.52#ibcon#*before write, iclass 21, count 0 2006.229.22:31:20.52#ibcon#enter sib2, iclass 21, count 0 2006.229.22:31:20.52#ibcon#flushed, iclass 21, count 0 2006.229.22:31:20.52#ibcon#about to write, iclass 21, count 0 2006.229.22:31:20.52#ibcon#wrote, iclass 21, count 0 2006.229.22:31:20.52#ibcon#about to read 3, iclass 21, count 0 2006.229.22:31:20.56#ibcon#read 3, iclass 21, count 0 2006.229.22:31:20.56#ibcon#about to read 4, iclass 21, count 0 2006.229.22:31:20.56#ibcon#read 4, iclass 21, count 0 2006.229.22:31:20.56#ibcon#about to read 5, iclass 21, count 0 2006.229.22:31:20.56#ibcon#read 5, iclass 21, count 0 2006.229.22:31:20.56#ibcon#about to read 6, iclass 21, count 0 2006.229.22:31:20.56#ibcon#read 6, iclass 21, count 0 2006.229.22:31:20.56#ibcon#end of sib2, iclass 21, count 0 2006.229.22:31:20.56#ibcon#*after write, iclass 21, count 0 2006.229.22:31:20.56#ibcon#*before return 0, iclass 21, count 0 2006.229.22:31:20.56#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:20.56#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:20.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:31:20.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:31:20.56$vck44/va=2,7 2006.229.22:31:20.56#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.22:31:20.56#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.22:31:20.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:20.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:20.62#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:20.62#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:20.62#ibcon#enter wrdev, iclass 23, count 2 2006.229.22:31:20.62#ibcon#first serial, iclass 23, count 2 2006.229.22:31:20.62#ibcon#enter sib2, iclass 23, count 2 2006.229.22:31:20.62#ibcon#flushed, iclass 23, count 2 2006.229.22:31:20.62#ibcon#about to write, iclass 23, count 2 2006.229.22:31:20.62#ibcon#wrote, iclass 23, count 2 2006.229.22:31:20.62#ibcon#about to read 3, iclass 23, count 2 2006.229.22:31:20.64#ibcon#read 3, iclass 23, count 2 2006.229.22:31:20.64#ibcon#about to read 4, iclass 23, count 2 2006.229.22:31:20.64#ibcon#read 4, iclass 23, count 2 2006.229.22:31:20.64#ibcon#about to read 5, iclass 23, count 2 2006.229.22:31:20.64#ibcon#read 5, iclass 23, count 2 2006.229.22:31:20.64#ibcon#about to read 6, iclass 23, count 2 2006.229.22:31:20.64#ibcon#read 6, iclass 23, count 2 2006.229.22:31:20.64#ibcon#end of sib2, iclass 23, count 2 2006.229.22:31:20.64#ibcon#*mode == 0, iclass 23, count 2 2006.229.22:31:20.64#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.22:31:20.64#ibcon#[25=AT02-07\r\n] 2006.229.22:31:20.64#ibcon#*before write, iclass 23, count 2 2006.229.22:31:20.64#ibcon#enter sib2, iclass 23, count 2 2006.229.22:31:20.64#ibcon#flushed, iclass 23, count 2 2006.229.22:31:20.64#ibcon#about to write, iclass 23, count 2 2006.229.22:31:20.64#ibcon#wrote, iclass 23, count 2 2006.229.22:31:20.64#ibcon#about to read 3, iclass 23, count 2 2006.229.22:31:20.67#ibcon#read 3, iclass 23, count 2 2006.229.22:31:20.67#ibcon#about to read 4, iclass 23, count 2 2006.229.22:31:20.67#ibcon#read 4, iclass 23, count 2 2006.229.22:31:20.67#ibcon#about to read 5, iclass 23, count 2 2006.229.22:31:20.67#ibcon#read 5, iclass 23, count 2 2006.229.22:31:20.67#ibcon#about to read 6, iclass 23, count 2 2006.229.22:31:20.67#ibcon#read 6, iclass 23, count 2 2006.229.22:31:20.67#ibcon#end of sib2, iclass 23, count 2 2006.229.22:31:20.67#ibcon#*after write, iclass 23, count 2 2006.229.22:31:20.67#ibcon#*before return 0, iclass 23, count 2 2006.229.22:31:20.67#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:20.67#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:20.67#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.22:31:20.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:20.67#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:20.79#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:20.79#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:20.79#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:31:20.79#ibcon#first serial, iclass 23, count 0 2006.229.22:31:20.79#ibcon#enter sib2, iclass 23, count 0 2006.229.22:31:20.79#ibcon#flushed, iclass 23, count 0 2006.229.22:31:20.79#ibcon#about to write, iclass 23, count 0 2006.229.22:31:20.79#ibcon#wrote, iclass 23, count 0 2006.229.22:31:20.79#ibcon#about to read 3, iclass 23, count 0 2006.229.22:31:20.81#ibcon#read 3, iclass 23, count 0 2006.229.22:31:20.81#ibcon#about to read 4, iclass 23, count 0 2006.229.22:31:20.81#ibcon#read 4, iclass 23, count 0 2006.229.22:31:20.81#ibcon#about to read 5, iclass 23, count 0 2006.229.22:31:20.81#ibcon#read 5, iclass 23, count 0 2006.229.22:31:20.81#ibcon#about to read 6, iclass 23, count 0 2006.229.22:31:20.81#ibcon#read 6, iclass 23, count 0 2006.229.22:31:20.81#ibcon#end of sib2, iclass 23, count 0 2006.229.22:31:20.81#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:31:20.81#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:31:20.81#ibcon#[25=USB\r\n] 2006.229.22:31:20.81#ibcon#*before write, iclass 23, count 0 2006.229.22:31:20.81#ibcon#enter sib2, iclass 23, count 0 2006.229.22:31:20.81#ibcon#flushed, iclass 23, count 0 2006.229.22:31:20.81#ibcon#about to write, iclass 23, count 0 2006.229.22:31:20.81#ibcon#wrote, iclass 23, count 0 2006.229.22:31:20.81#ibcon#about to read 3, iclass 23, count 0 2006.229.22:31:20.84#ibcon#read 3, iclass 23, count 0 2006.229.22:31:20.84#ibcon#about to read 4, iclass 23, count 0 2006.229.22:31:20.84#ibcon#read 4, iclass 23, count 0 2006.229.22:31:20.84#ibcon#about to read 5, iclass 23, count 0 2006.229.22:31:20.84#ibcon#read 5, iclass 23, count 0 2006.229.22:31:20.84#ibcon#about to read 6, iclass 23, count 0 2006.229.22:31:20.84#ibcon#read 6, iclass 23, count 0 2006.229.22:31:20.84#ibcon#end of sib2, iclass 23, count 0 2006.229.22:31:20.84#ibcon#*after write, iclass 23, count 0 2006.229.22:31:20.84#ibcon#*before return 0, iclass 23, count 0 2006.229.22:31:20.84#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:20.84#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:20.84#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:31:20.84#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:31:20.84$vck44/valo=3,564.99 2006.229.22:31:20.84#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.22:31:20.84#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.22:31:20.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:20.84#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:31:20.84#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:31:20.84#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:31:20.84#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:31:20.84#ibcon#first serial, iclass 25, count 0 2006.229.22:31:20.84#ibcon#enter sib2, iclass 25, count 0 2006.229.22:31:20.84#ibcon#flushed, iclass 25, count 0 2006.229.22:31:20.84#ibcon#about to write, iclass 25, count 0 2006.229.22:31:20.84#ibcon#wrote, iclass 25, count 0 2006.229.22:31:20.84#ibcon#about to read 3, iclass 25, count 0 2006.229.22:31:20.86#ibcon#read 3, iclass 25, count 0 2006.229.22:31:20.86#ibcon#about to read 4, iclass 25, count 0 2006.229.22:31:20.86#ibcon#read 4, iclass 25, count 0 2006.229.22:31:20.86#ibcon#about to read 5, iclass 25, count 0 2006.229.22:31:20.86#ibcon#read 5, iclass 25, count 0 2006.229.22:31:20.86#ibcon#about to read 6, iclass 25, count 0 2006.229.22:31:20.86#ibcon#read 6, iclass 25, count 0 2006.229.22:31:20.86#ibcon#end of sib2, iclass 25, count 0 2006.229.22:31:20.86#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:31:20.86#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:31:20.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:31:20.86#ibcon#*before write, iclass 25, count 0 2006.229.22:31:20.86#ibcon#enter sib2, iclass 25, count 0 2006.229.22:31:20.86#ibcon#flushed, iclass 25, count 0 2006.229.22:31:20.86#ibcon#about to write, iclass 25, count 0 2006.229.22:31:20.86#ibcon#wrote, iclass 25, count 0 2006.229.22:31:20.86#ibcon#about to read 3, iclass 25, count 0 2006.229.22:31:20.90#ibcon#read 3, iclass 25, count 0 2006.229.22:31:20.90#ibcon#about to read 4, iclass 25, count 0 2006.229.22:31:20.90#ibcon#read 4, iclass 25, count 0 2006.229.22:31:20.90#ibcon#about to read 5, iclass 25, count 0 2006.229.22:31:20.90#ibcon#read 5, iclass 25, count 0 2006.229.22:31:20.90#ibcon#about to read 6, iclass 25, count 0 2006.229.22:31:20.90#ibcon#read 6, iclass 25, count 0 2006.229.22:31:20.90#ibcon#end of sib2, iclass 25, count 0 2006.229.22:31:20.90#ibcon#*after write, iclass 25, count 0 2006.229.22:31:20.90#ibcon#*before return 0, iclass 25, count 0 2006.229.22:31:20.90#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:31:20.90#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:31:20.90#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:31:20.90#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:31:20.90$vck44/va=3,6 2006.229.22:31:20.90#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.22:31:20.90#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.22:31:20.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:20.90#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:31:20.96#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:31:20.96#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:31:20.96#ibcon#enter wrdev, iclass 27, count 2 2006.229.22:31:20.96#ibcon#first serial, iclass 27, count 2 2006.229.22:31:20.96#ibcon#enter sib2, iclass 27, count 2 2006.229.22:31:20.96#ibcon#flushed, iclass 27, count 2 2006.229.22:31:20.96#ibcon#about to write, iclass 27, count 2 2006.229.22:31:20.96#ibcon#wrote, iclass 27, count 2 2006.229.22:31:20.96#ibcon#about to read 3, iclass 27, count 2 2006.229.22:31:20.98#ibcon#read 3, iclass 27, count 2 2006.229.22:31:20.98#ibcon#about to read 4, iclass 27, count 2 2006.229.22:31:20.98#ibcon#read 4, iclass 27, count 2 2006.229.22:31:20.98#ibcon#about to read 5, iclass 27, count 2 2006.229.22:31:20.98#ibcon#read 5, iclass 27, count 2 2006.229.22:31:20.98#ibcon#about to read 6, iclass 27, count 2 2006.229.22:31:20.98#ibcon#read 6, iclass 27, count 2 2006.229.22:31:20.98#ibcon#end of sib2, iclass 27, count 2 2006.229.22:31:20.98#ibcon#*mode == 0, iclass 27, count 2 2006.229.22:31:20.98#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.22:31:20.98#ibcon#[25=AT03-06\r\n] 2006.229.22:31:20.98#ibcon#*before write, iclass 27, count 2 2006.229.22:31:20.98#ibcon#enter sib2, iclass 27, count 2 2006.229.22:31:20.98#ibcon#flushed, iclass 27, count 2 2006.229.22:31:20.98#ibcon#about to write, iclass 27, count 2 2006.229.22:31:20.98#ibcon#wrote, iclass 27, count 2 2006.229.22:31:20.98#ibcon#about to read 3, iclass 27, count 2 2006.229.22:31:21.01#ibcon#read 3, iclass 27, count 2 2006.229.22:31:21.01#ibcon#about to read 4, iclass 27, count 2 2006.229.22:31:21.01#ibcon#read 4, iclass 27, count 2 2006.229.22:31:21.01#ibcon#about to read 5, iclass 27, count 2 2006.229.22:31:21.01#ibcon#read 5, iclass 27, count 2 2006.229.22:31:21.01#ibcon#about to read 6, iclass 27, count 2 2006.229.22:31:21.01#ibcon#read 6, iclass 27, count 2 2006.229.22:31:21.01#ibcon#end of sib2, iclass 27, count 2 2006.229.22:31:21.01#ibcon#*after write, iclass 27, count 2 2006.229.22:31:21.01#ibcon#*before return 0, iclass 27, count 2 2006.229.22:31:21.01#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:31:21.01#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:31:21.01#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.22:31:21.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:21.01#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:31:21.13#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:31:21.13#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:31:21.13#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:31:21.13#ibcon#first serial, iclass 27, count 0 2006.229.22:31:21.13#ibcon#enter sib2, iclass 27, count 0 2006.229.22:31:21.13#ibcon#flushed, iclass 27, count 0 2006.229.22:31:21.13#ibcon#about to write, iclass 27, count 0 2006.229.22:31:21.13#ibcon#wrote, iclass 27, count 0 2006.229.22:31:21.13#ibcon#about to read 3, iclass 27, count 0 2006.229.22:31:21.15#ibcon#read 3, iclass 27, count 0 2006.229.22:31:21.15#ibcon#about to read 4, iclass 27, count 0 2006.229.22:31:21.15#ibcon#read 4, iclass 27, count 0 2006.229.22:31:21.15#ibcon#about to read 5, iclass 27, count 0 2006.229.22:31:21.15#ibcon#read 5, iclass 27, count 0 2006.229.22:31:21.15#ibcon#about to read 6, iclass 27, count 0 2006.229.22:31:21.15#ibcon#read 6, iclass 27, count 0 2006.229.22:31:21.15#ibcon#end of sib2, iclass 27, count 0 2006.229.22:31:21.15#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:31:21.15#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:31:21.15#ibcon#[25=USB\r\n] 2006.229.22:31:21.15#ibcon#*before write, iclass 27, count 0 2006.229.22:31:21.15#ibcon#enter sib2, iclass 27, count 0 2006.229.22:31:21.15#ibcon#flushed, iclass 27, count 0 2006.229.22:31:21.15#ibcon#about to write, iclass 27, count 0 2006.229.22:31:21.15#ibcon#wrote, iclass 27, count 0 2006.229.22:31:21.15#ibcon#about to read 3, iclass 27, count 0 2006.229.22:31:21.18#ibcon#read 3, iclass 27, count 0 2006.229.22:31:21.18#ibcon#about to read 4, iclass 27, count 0 2006.229.22:31:21.18#ibcon#read 4, iclass 27, count 0 2006.229.22:31:21.18#ibcon#about to read 5, iclass 27, count 0 2006.229.22:31:21.18#ibcon#read 5, iclass 27, count 0 2006.229.22:31:21.18#ibcon#about to read 6, iclass 27, count 0 2006.229.22:31:21.18#ibcon#read 6, iclass 27, count 0 2006.229.22:31:21.18#ibcon#end of sib2, iclass 27, count 0 2006.229.22:31:21.18#ibcon#*after write, iclass 27, count 0 2006.229.22:31:21.18#ibcon#*before return 0, iclass 27, count 0 2006.229.22:31:21.18#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:31:21.18#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:31:21.18#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:31:21.18#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:31:21.18$vck44/valo=4,624.99 2006.229.22:31:21.18#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.22:31:21.18#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.22:31:21.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:21.18#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:21.18#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:21.18#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:21.18#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:31:21.18#ibcon#first serial, iclass 29, count 0 2006.229.22:31:21.18#ibcon#enter sib2, iclass 29, count 0 2006.229.22:31:21.18#ibcon#flushed, iclass 29, count 0 2006.229.22:31:21.18#ibcon#about to write, iclass 29, count 0 2006.229.22:31:21.18#ibcon#wrote, iclass 29, count 0 2006.229.22:31:21.18#ibcon#about to read 3, iclass 29, count 0 2006.229.22:31:21.20#ibcon#read 3, iclass 29, count 0 2006.229.22:31:21.20#ibcon#about to read 4, iclass 29, count 0 2006.229.22:31:21.20#ibcon#read 4, iclass 29, count 0 2006.229.22:31:21.20#ibcon#about to read 5, iclass 29, count 0 2006.229.22:31:21.20#ibcon#read 5, iclass 29, count 0 2006.229.22:31:21.20#ibcon#about to read 6, iclass 29, count 0 2006.229.22:31:21.20#ibcon#read 6, iclass 29, count 0 2006.229.22:31:21.20#ibcon#end of sib2, iclass 29, count 0 2006.229.22:31:21.20#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:31:21.20#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:31:21.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:31:21.20#ibcon#*before write, iclass 29, count 0 2006.229.22:31:21.20#ibcon#enter sib2, iclass 29, count 0 2006.229.22:31:21.20#ibcon#flushed, iclass 29, count 0 2006.229.22:31:21.20#ibcon#about to write, iclass 29, count 0 2006.229.22:31:21.20#ibcon#wrote, iclass 29, count 0 2006.229.22:31:21.20#ibcon#about to read 3, iclass 29, count 0 2006.229.22:31:21.24#ibcon#read 3, iclass 29, count 0 2006.229.22:31:21.24#ibcon#about to read 4, iclass 29, count 0 2006.229.22:31:21.24#ibcon#read 4, iclass 29, count 0 2006.229.22:31:21.24#ibcon#about to read 5, iclass 29, count 0 2006.229.22:31:21.24#ibcon#read 5, iclass 29, count 0 2006.229.22:31:21.24#ibcon#about to read 6, iclass 29, count 0 2006.229.22:31:21.24#ibcon#read 6, iclass 29, count 0 2006.229.22:31:21.24#ibcon#end of sib2, iclass 29, count 0 2006.229.22:31:21.24#ibcon#*after write, iclass 29, count 0 2006.229.22:31:21.24#ibcon#*before return 0, iclass 29, count 0 2006.229.22:31:21.24#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:21.24#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:21.24#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:31:21.24#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:31:21.24$vck44/va=4,7 2006.229.22:31:21.24#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.22:31:21.24#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.22:31:21.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:21.24#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:21.30#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:21.30#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:21.30#ibcon#enter wrdev, iclass 31, count 2 2006.229.22:31:21.30#ibcon#first serial, iclass 31, count 2 2006.229.22:31:21.30#ibcon#enter sib2, iclass 31, count 2 2006.229.22:31:21.30#ibcon#flushed, iclass 31, count 2 2006.229.22:31:21.30#ibcon#about to write, iclass 31, count 2 2006.229.22:31:21.30#ibcon#wrote, iclass 31, count 2 2006.229.22:31:21.30#ibcon#about to read 3, iclass 31, count 2 2006.229.22:31:21.32#ibcon#read 3, iclass 31, count 2 2006.229.22:31:21.32#ibcon#about to read 4, iclass 31, count 2 2006.229.22:31:21.32#ibcon#read 4, iclass 31, count 2 2006.229.22:31:21.32#ibcon#about to read 5, iclass 31, count 2 2006.229.22:31:21.32#ibcon#read 5, iclass 31, count 2 2006.229.22:31:21.32#ibcon#about to read 6, iclass 31, count 2 2006.229.22:31:21.32#ibcon#read 6, iclass 31, count 2 2006.229.22:31:21.32#ibcon#end of sib2, iclass 31, count 2 2006.229.22:31:21.32#ibcon#*mode == 0, iclass 31, count 2 2006.229.22:31:21.32#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.22:31:21.32#ibcon#[25=AT04-07\r\n] 2006.229.22:31:21.32#ibcon#*before write, iclass 31, count 2 2006.229.22:31:21.32#ibcon#enter sib2, iclass 31, count 2 2006.229.22:31:21.32#ibcon#flushed, iclass 31, count 2 2006.229.22:31:21.32#ibcon#about to write, iclass 31, count 2 2006.229.22:31:21.32#ibcon#wrote, iclass 31, count 2 2006.229.22:31:21.32#ibcon#about to read 3, iclass 31, count 2 2006.229.22:31:21.35#ibcon#read 3, iclass 31, count 2 2006.229.22:31:21.35#ibcon#about to read 4, iclass 31, count 2 2006.229.22:31:21.35#ibcon#read 4, iclass 31, count 2 2006.229.22:31:21.35#ibcon#about to read 5, iclass 31, count 2 2006.229.22:31:21.35#ibcon#read 5, iclass 31, count 2 2006.229.22:31:21.35#ibcon#about to read 6, iclass 31, count 2 2006.229.22:31:21.35#ibcon#read 6, iclass 31, count 2 2006.229.22:31:21.35#ibcon#end of sib2, iclass 31, count 2 2006.229.22:31:21.35#ibcon#*after write, iclass 31, count 2 2006.229.22:31:21.35#ibcon#*before return 0, iclass 31, count 2 2006.229.22:31:21.35#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:21.35#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:21.35#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.22:31:21.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:21.35#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:21.47#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:21.47#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:21.47#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:31:21.47#ibcon#first serial, iclass 31, count 0 2006.229.22:31:21.47#ibcon#enter sib2, iclass 31, count 0 2006.229.22:31:21.47#ibcon#flushed, iclass 31, count 0 2006.229.22:31:21.47#ibcon#about to write, iclass 31, count 0 2006.229.22:31:21.47#ibcon#wrote, iclass 31, count 0 2006.229.22:31:21.47#ibcon#about to read 3, iclass 31, count 0 2006.229.22:31:21.49#ibcon#read 3, iclass 31, count 0 2006.229.22:31:21.49#ibcon#about to read 4, iclass 31, count 0 2006.229.22:31:21.49#ibcon#read 4, iclass 31, count 0 2006.229.22:31:21.49#ibcon#about to read 5, iclass 31, count 0 2006.229.22:31:21.49#ibcon#read 5, iclass 31, count 0 2006.229.22:31:21.49#ibcon#about to read 6, iclass 31, count 0 2006.229.22:31:21.49#ibcon#read 6, iclass 31, count 0 2006.229.22:31:21.49#ibcon#end of sib2, iclass 31, count 0 2006.229.22:31:21.49#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:31:21.49#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:31:21.49#ibcon#[25=USB\r\n] 2006.229.22:31:21.49#ibcon#*before write, iclass 31, count 0 2006.229.22:31:21.49#ibcon#enter sib2, iclass 31, count 0 2006.229.22:31:21.49#ibcon#flushed, iclass 31, count 0 2006.229.22:31:21.49#ibcon#about to write, iclass 31, count 0 2006.229.22:31:21.49#ibcon#wrote, iclass 31, count 0 2006.229.22:31:21.49#ibcon#about to read 3, iclass 31, count 0 2006.229.22:31:21.52#ibcon#read 3, iclass 31, count 0 2006.229.22:31:21.52#ibcon#about to read 4, iclass 31, count 0 2006.229.22:31:21.52#ibcon#read 4, iclass 31, count 0 2006.229.22:31:21.52#ibcon#about to read 5, iclass 31, count 0 2006.229.22:31:21.52#ibcon#read 5, iclass 31, count 0 2006.229.22:31:21.52#ibcon#about to read 6, iclass 31, count 0 2006.229.22:31:21.52#ibcon#read 6, iclass 31, count 0 2006.229.22:31:21.52#ibcon#end of sib2, iclass 31, count 0 2006.229.22:31:21.52#ibcon#*after write, iclass 31, count 0 2006.229.22:31:21.52#ibcon#*before return 0, iclass 31, count 0 2006.229.22:31:21.52#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:21.52#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:21.52#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:31:21.52#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:31:21.52$vck44/valo=5,734.99 2006.229.22:31:21.52#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.22:31:21.52#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.22:31:21.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:21.52#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:21.52#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:21.52#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:21.52#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:31:21.52#ibcon#first serial, iclass 33, count 0 2006.229.22:31:21.52#ibcon#enter sib2, iclass 33, count 0 2006.229.22:31:21.52#ibcon#flushed, iclass 33, count 0 2006.229.22:31:21.52#ibcon#about to write, iclass 33, count 0 2006.229.22:31:21.52#ibcon#wrote, iclass 33, count 0 2006.229.22:31:21.52#ibcon#about to read 3, iclass 33, count 0 2006.229.22:31:21.54#ibcon#read 3, iclass 33, count 0 2006.229.22:31:21.54#ibcon#about to read 4, iclass 33, count 0 2006.229.22:31:21.54#ibcon#read 4, iclass 33, count 0 2006.229.22:31:21.54#ibcon#about to read 5, iclass 33, count 0 2006.229.22:31:21.54#ibcon#read 5, iclass 33, count 0 2006.229.22:31:21.54#ibcon#about to read 6, iclass 33, count 0 2006.229.22:31:21.54#ibcon#read 6, iclass 33, count 0 2006.229.22:31:21.54#ibcon#end of sib2, iclass 33, count 0 2006.229.22:31:21.54#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:31:21.54#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:31:21.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:31:21.54#ibcon#*before write, iclass 33, count 0 2006.229.22:31:21.54#ibcon#enter sib2, iclass 33, count 0 2006.229.22:31:21.54#ibcon#flushed, iclass 33, count 0 2006.229.22:31:21.54#ibcon#about to write, iclass 33, count 0 2006.229.22:31:21.54#ibcon#wrote, iclass 33, count 0 2006.229.22:31:21.54#ibcon#about to read 3, iclass 33, count 0 2006.229.22:31:21.58#ibcon#read 3, iclass 33, count 0 2006.229.22:31:21.58#ibcon#about to read 4, iclass 33, count 0 2006.229.22:31:21.58#ibcon#read 4, iclass 33, count 0 2006.229.22:31:21.58#ibcon#about to read 5, iclass 33, count 0 2006.229.22:31:21.58#ibcon#read 5, iclass 33, count 0 2006.229.22:31:21.58#ibcon#about to read 6, iclass 33, count 0 2006.229.22:31:21.58#ibcon#read 6, iclass 33, count 0 2006.229.22:31:21.58#ibcon#end of sib2, iclass 33, count 0 2006.229.22:31:21.58#ibcon#*after write, iclass 33, count 0 2006.229.22:31:21.58#ibcon#*before return 0, iclass 33, count 0 2006.229.22:31:21.58#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:21.58#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:21.58#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:31:21.58#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:31:21.58$vck44/va=5,4 2006.229.22:31:21.58#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.22:31:21.58#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.22:31:21.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:21.58#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:21.64#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:21.64#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:21.64#ibcon#enter wrdev, iclass 35, count 2 2006.229.22:31:21.64#ibcon#first serial, iclass 35, count 2 2006.229.22:31:21.64#ibcon#enter sib2, iclass 35, count 2 2006.229.22:31:21.64#ibcon#flushed, iclass 35, count 2 2006.229.22:31:21.64#ibcon#about to write, iclass 35, count 2 2006.229.22:31:21.64#ibcon#wrote, iclass 35, count 2 2006.229.22:31:21.64#ibcon#about to read 3, iclass 35, count 2 2006.229.22:31:21.66#ibcon#read 3, iclass 35, count 2 2006.229.22:31:21.66#ibcon#about to read 4, iclass 35, count 2 2006.229.22:31:21.66#ibcon#read 4, iclass 35, count 2 2006.229.22:31:21.66#ibcon#about to read 5, iclass 35, count 2 2006.229.22:31:21.66#ibcon#read 5, iclass 35, count 2 2006.229.22:31:21.66#ibcon#about to read 6, iclass 35, count 2 2006.229.22:31:21.66#ibcon#read 6, iclass 35, count 2 2006.229.22:31:21.66#ibcon#end of sib2, iclass 35, count 2 2006.229.22:31:21.66#ibcon#*mode == 0, iclass 35, count 2 2006.229.22:31:21.66#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.22:31:21.66#ibcon#[25=AT05-04\r\n] 2006.229.22:31:21.66#ibcon#*before write, iclass 35, count 2 2006.229.22:31:21.66#ibcon#enter sib2, iclass 35, count 2 2006.229.22:31:21.66#ibcon#flushed, iclass 35, count 2 2006.229.22:31:21.66#ibcon#about to write, iclass 35, count 2 2006.229.22:31:21.66#ibcon#wrote, iclass 35, count 2 2006.229.22:31:21.66#ibcon#about to read 3, iclass 35, count 2 2006.229.22:31:21.69#ibcon#read 3, iclass 35, count 2 2006.229.22:31:21.69#ibcon#about to read 4, iclass 35, count 2 2006.229.22:31:21.69#ibcon#read 4, iclass 35, count 2 2006.229.22:31:21.69#ibcon#about to read 5, iclass 35, count 2 2006.229.22:31:21.69#ibcon#read 5, iclass 35, count 2 2006.229.22:31:21.69#ibcon#about to read 6, iclass 35, count 2 2006.229.22:31:21.69#ibcon#read 6, iclass 35, count 2 2006.229.22:31:21.69#ibcon#end of sib2, iclass 35, count 2 2006.229.22:31:21.69#ibcon#*after write, iclass 35, count 2 2006.229.22:31:21.69#ibcon#*before return 0, iclass 35, count 2 2006.229.22:31:21.69#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:21.69#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:21.69#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.22:31:21.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:21.69#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:21.81#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:21.81#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:21.81#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:31:21.81#ibcon#first serial, iclass 35, count 0 2006.229.22:31:21.81#ibcon#enter sib2, iclass 35, count 0 2006.229.22:31:21.81#ibcon#flushed, iclass 35, count 0 2006.229.22:31:21.81#ibcon#about to write, iclass 35, count 0 2006.229.22:31:21.81#ibcon#wrote, iclass 35, count 0 2006.229.22:31:21.81#ibcon#about to read 3, iclass 35, count 0 2006.229.22:31:21.83#ibcon#read 3, iclass 35, count 0 2006.229.22:31:21.83#ibcon#about to read 4, iclass 35, count 0 2006.229.22:31:21.83#ibcon#read 4, iclass 35, count 0 2006.229.22:31:21.83#ibcon#about to read 5, iclass 35, count 0 2006.229.22:31:21.83#ibcon#read 5, iclass 35, count 0 2006.229.22:31:21.83#ibcon#about to read 6, iclass 35, count 0 2006.229.22:31:21.83#ibcon#read 6, iclass 35, count 0 2006.229.22:31:21.83#ibcon#end of sib2, iclass 35, count 0 2006.229.22:31:21.83#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:31:21.83#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:31:21.83#ibcon#[25=USB\r\n] 2006.229.22:31:21.83#ibcon#*before write, iclass 35, count 0 2006.229.22:31:21.83#ibcon#enter sib2, iclass 35, count 0 2006.229.22:31:21.83#ibcon#flushed, iclass 35, count 0 2006.229.22:31:21.83#ibcon#about to write, iclass 35, count 0 2006.229.22:31:21.83#ibcon#wrote, iclass 35, count 0 2006.229.22:31:21.83#ibcon#about to read 3, iclass 35, count 0 2006.229.22:31:21.86#ibcon#read 3, iclass 35, count 0 2006.229.22:31:21.86#ibcon#about to read 4, iclass 35, count 0 2006.229.22:31:21.86#ibcon#read 4, iclass 35, count 0 2006.229.22:31:21.86#ibcon#about to read 5, iclass 35, count 0 2006.229.22:31:21.86#ibcon#read 5, iclass 35, count 0 2006.229.22:31:21.86#ibcon#about to read 6, iclass 35, count 0 2006.229.22:31:21.86#ibcon#read 6, iclass 35, count 0 2006.229.22:31:21.86#ibcon#end of sib2, iclass 35, count 0 2006.229.22:31:21.86#ibcon#*after write, iclass 35, count 0 2006.229.22:31:21.86#ibcon#*before return 0, iclass 35, count 0 2006.229.22:31:21.86#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:21.86#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:21.86#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:31:21.86#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:31:21.86$vck44/valo=6,814.99 2006.229.22:31:21.86#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.22:31:21.86#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.22:31:21.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:21.86#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:21.86#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:21.86#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:21.86#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:31:21.86#ibcon#first serial, iclass 37, count 0 2006.229.22:31:21.86#ibcon#enter sib2, iclass 37, count 0 2006.229.22:31:21.86#ibcon#flushed, iclass 37, count 0 2006.229.22:31:21.86#ibcon#about to write, iclass 37, count 0 2006.229.22:31:21.86#ibcon#wrote, iclass 37, count 0 2006.229.22:31:21.86#ibcon#about to read 3, iclass 37, count 0 2006.229.22:31:21.88#ibcon#read 3, iclass 37, count 0 2006.229.22:31:21.88#ibcon#about to read 4, iclass 37, count 0 2006.229.22:31:21.88#ibcon#read 4, iclass 37, count 0 2006.229.22:31:21.88#ibcon#about to read 5, iclass 37, count 0 2006.229.22:31:21.88#ibcon#read 5, iclass 37, count 0 2006.229.22:31:21.88#ibcon#about to read 6, iclass 37, count 0 2006.229.22:31:21.88#ibcon#read 6, iclass 37, count 0 2006.229.22:31:21.88#ibcon#end of sib2, iclass 37, count 0 2006.229.22:31:21.88#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:31:21.88#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:31:21.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:31:21.88#ibcon#*before write, iclass 37, count 0 2006.229.22:31:21.88#ibcon#enter sib2, iclass 37, count 0 2006.229.22:31:21.88#ibcon#flushed, iclass 37, count 0 2006.229.22:31:21.88#ibcon#about to write, iclass 37, count 0 2006.229.22:31:21.88#ibcon#wrote, iclass 37, count 0 2006.229.22:31:21.88#ibcon#about to read 3, iclass 37, count 0 2006.229.22:31:21.92#ibcon#read 3, iclass 37, count 0 2006.229.22:31:21.92#ibcon#about to read 4, iclass 37, count 0 2006.229.22:31:21.92#ibcon#read 4, iclass 37, count 0 2006.229.22:31:21.92#ibcon#about to read 5, iclass 37, count 0 2006.229.22:31:21.92#ibcon#read 5, iclass 37, count 0 2006.229.22:31:21.92#ibcon#about to read 6, iclass 37, count 0 2006.229.22:31:21.92#ibcon#read 6, iclass 37, count 0 2006.229.22:31:21.92#ibcon#end of sib2, iclass 37, count 0 2006.229.22:31:21.92#ibcon#*after write, iclass 37, count 0 2006.229.22:31:21.92#ibcon#*before return 0, iclass 37, count 0 2006.229.22:31:21.92#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:21.92#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:21.92#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:31:21.92#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:31:21.92$vck44/va=6,4 2006.229.22:31:21.92#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.22:31:21.92#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.22:31:21.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:21.92#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:21.98#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:21.98#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:21.98#ibcon#enter wrdev, iclass 39, count 2 2006.229.22:31:21.98#ibcon#first serial, iclass 39, count 2 2006.229.22:31:21.98#ibcon#enter sib2, iclass 39, count 2 2006.229.22:31:21.98#ibcon#flushed, iclass 39, count 2 2006.229.22:31:21.98#ibcon#about to write, iclass 39, count 2 2006.229.22:31:21.98#ibcon#wrote, iclass 39, count 2 2006.229.22:31:21.98#ibcon#about to read 3, iclass 39, count 2 2006.229.22:31:22.00#ibcon#read 3, iclass 39, count 2 2006.229.22:31:22.00#ibcon#about to read 4, iclass 39, count 2 2006.229.22:31:22.00#ibcon#read 4, iclass 39, count 2 2006.229.22:31:22.00#ibcon#about to read 5, iclass 39, count 2 2006.229.22:31:22.00#ibcon#read 5, iclass 39, count 2 2006.229.22:31:22.00#ibcon#about to read 6, iclass 39, count 2 2006.229.22:31:22.00#ibcon#read 6, iclass 39, count 2 2006.229.22:31:22.00#ibcon#end of sib2, iclass 39, count 2 2006.229.22:31:22.00#ibcon#*mode == 0, iclass 39, count 2 2006.229.22:31:22.00#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.22:31:22.00#ibcon#[25=AT06-04\r\n] 2006.229.22:31:22.00#ibcon#*before write, iclass 39, count 2 2006.229.22:31:22.00#ibcon#enter sib2, iclass 39, count 2 2006.229.22:31:22.00#ibcon#flushed, iclass 39, count 2 2006.229.22:31:22.00#ibcon#about to write, iclass 39, count 2 2006.229.22:31:22.00#ibcon#wrote, iclass 39, count 2 2006.229.22:31:22.00#ibcon#about to read 3, iclass 39, count 2 2006.229.22:31:22.03#ibcon#read 3, iclass 39, count 2 2006.229.22:31:22.03#ibcon#about to read 4, iclass 39, count 2 2006.229.22:31:22.03#ibcon#read 4, iclass 39, count 2 2006.229.22:31:22.03#ibcon#about to read 5, iclass 39, count 2 2006.229.22:31:22.03#ibcon#read 5, iclass 39, count 2 2006.229.22:31:22.03#ibcon#about to read 6, iclass 39, count 2 2006.229.22:31:22.03#ibcon#read 6, iclass 39, count 2 2006.229.22:31:22.03#ibcon#end of sib2, iclass 39, count 2 2006.229.22:31:22.03#ibcon#*after write, iclass 39, count 2 2006.229.22:31:22.03#ibcon#*before return 0, iclass 39, count 2 2006.229.22:31:22.03#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:22.03#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:22.03#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.22:31:22.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:22.03#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:22.15#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:22.15#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:22.15#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:31:22.15#ibcon#first serial, iclass 39, count 0 2006.229.22:31:22.15#ibcon#enter sib2, iclass 39, count 0 2006.229.22:31:22.15#ibcon#flushed, iclass 39, count 0 2006.229.22:31:22.15#ibcon#about to write, iclass 39, count 0 2006.229.22:31:22.15#ibcon#wrote, iclass 39, count 0 2006.229.22:31:22.15#ibcon#about to read 3, iclass 39, count 0 2006.229.22:31:22.17#ibcon#read 3, iclass 39, count 0 2006.229.22:31:22.17#ibcon#about to read 4, iclass 39, count 0 2006.229.22:31:22.17#ibcon#read 4, iclass 39, count 0 2006.229.22:31:22.17#ibcon#about to read 5, iclass 39, count 0 2006.229.22:31:22.17#ibcon#read 5, iclass 39, count 0 2006.229.22:31:22.17#ibcon#about to read 6, iclass 39, count 0 2006.229.22:31:22.17#ibcon#read 6, iclass 39, count 0 2006.229.22:31:22.17#ibcon#end of sib2, iclass 39, count 0 2006.229.22:31:22.17#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:31:22.17#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:31:22.17#ibcon#[25=USB\r\n] 2006.229.22:31:22.17#ibcon#*before write, iclass 39, count 0 2006.229.22:31:22.17#ibcon#enter sib2, iclass 39, count 0 2006.229.22:31:22.17#ibcon#flushed, iclass 39, count 0 2006.229.22:31:22.17#ibcon#about to write, iclass 39, count 0 2006.229.22:31:22.17#ibcon#wrote, iclass 39, count 0 2006.229.22:31:22.17#ibcon#about to read 3, iclass 39, count 0 2006.229.22:31:22.20#ibcon#read 3, iclass 39, count 0 2006.229.22:31:22.20#ibcon#about to read 4, iclass 39, count 0 2006.229.22:31:22.20#ibcon#read 4, iclass 39, count 0 2006.229.22:31:22.20#ibcon#about to read 5, iclass 39, count 0 2006.229.22:31:22.20#ibcon#read 5, iclass 39, count 0 2006.229.22:31:22.20#ibcon#about to read 6, iclass 39, count 0 2006.229.22:31:22.20#ibcon#read 6, iclass 39, count 0 2006.229.22:31:22.20#ibcon#end of sib2, iclass 39, count 0 2006.229.22:31:22.20#ibcon#*after write, iclass 39, count 0 2006.229.22:31:22.20#ibcon#*before return 0, iclass 39, count 0 2006.229.22:31:22.20#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:22.20#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:22.20#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:31:22.20#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:31:22.20$vck44/valo=7,864.99 2006.229.22:31:22.20#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.22:31:22.20#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.22:31:22.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:22.20#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:22.20#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:22.20#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:22.20#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:31:22.20#ibcon#first serial, iclass 3, count 0 2006.229.22:31:22.20#ibcon#enter sib2, iclass 3, count 0 2006.229.22:31:22.20#ibcon#flushed, iclass 3, count 0 2006.229.22:31:22.20#ibcon#about to write, iclass 3, count 0 2006.229.22:31:22.20#ibcon#wrote, iclass 3, count 0 2006.229.22:31:22.20#ibcon#about to read 3, iclass 3, count 0 2006.229.22:31:22.22#ibcon#read 3, iclass 3, count 0 2006.229.22:31:22.22#ibcon#about to read 4, iclass 3, count 0 2006.229.22:31:22.22#ibcon#read 4, iclass 3, count 0 2006.229.22:31:22.22#ibcon#about to read 5, iclass 3, count 0 2006.229.22:31:22.22#ibcon#read 5, iclass 3, count 0 2006.229.22:31:22.22#ibcon#about to read 6, iclass 3, count 0 2006.229.22:31:22.22#ibcon#read 6, iclass 3, count 0 2006.229.22:31:22.22#ibcon#end of sib2, iclass 3, count 0 2006.229.22:31:22.22#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:31:22.22#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:31:22.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:31:22.22#ibcon#*before write, iclass 3, count 0 2006.229.22:31:22.22#ibcon#enter sib2, iclass 3, count 0 2006.229.22:31:22.22#ibcon#flushed, iclass 3, count 0 2006.229.22:31:22.22#ibcon#about to write, iclass 3, count 0 2006.229.22:31:22.22#ibcon#wrote, iclass 3, count 0 2006.229.22:31:22.22#ibcon#about to read 3, iclass 3, count 0 2006.229.22:31:22.26#ibcon#read 3, iclass 3, count 0 2006.229.22:31:22.26#ibcon#about to read 4, iclass 3, count 0 2006.229.22:31:22.26#ibcon#read 4, iclass 3, count 0 2006.229.22:31:22.26#ibcon#about to read 5, iclass 3, count 0 2006.229.22:31:22.26#ibcon#read 5, iclass 3, count 0 2006.229.22:31:22.26#ibcon#about to read 6, iclass 3, count 0 2006.229.22:31:22.26#ibcon#read 6, iclass 3, count 0 2006.229.22:31:22.26#ibcon#end of sib2, iclass 3, count 0 2006.229.22:31:22.26#ibcon#*after write, iclass 3, count 0 2006.229.22:31:22.26#ibcon#*before return 0, iclass 3, count 0 2006.229.22:31:22.26#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:22.26#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:22.26#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:31:22.26#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:31:22.26$vck44/va=7,5 2006.229.22:31:22.26#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.22:31:22.26#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.22:31:22.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:22.26#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:22.32#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:22.32#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:22.32#ibcon#enter wrdev, iclass 5, count 2 2006.229.22:31:22.32#ibcon#first serial, iclass 5, count 2 2006.229.22:31:22.32#ibcon#enter sib2, iclass 5, count 2 2006.229.22:31:22.32#ibcon#flushed, iclass 5, count 2 2006.229.22:31:22.32#ibcon#about to write, iclass 5, count 2 2006.229.22:31:22.32#ibcon#wrote, iclass 5, count 2 2006.229.22:31:22.32#ibcon#about to read 3, iclass 5, count 2 2006.229.22:31:22.34#ibcon#read 3, iclass 5, count 2 2006.229.22:31:22.34#ibcon#about to read 4, iclass 5, count 2 2006.229.22:31:22.34#ibcon#read 4, iclass 5, count 2 2006.229.22:31:22.34#ibcon#about to read 5, iclass 5, count 2 2006.229.22:31:22.34#ibcon#read 5, iclass 5, count 2 2006.229.22:31:22.34#ibcon#about to read 6, iclass 5, count 2 2006.229.22:31:22.34#ibcon#read 6, iclass 5, count 2 2006.229.22:31:22.34#ibcon#end of sib2, iclass 5, count 2 2006.229.22:31:22.34#ibcon#*mode == 0, iclass 5, count 2 2006.229.22:31:22.34#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.22:31:22.34#ibcon#[25=AT07-05\r\n] 2006.229.22:31:22.34#ibcon#*before write, iclass 5, count 2 2006.229.22:31:22.34#ibcon#enter sib2, iclass 5, count 2 2006.229.22:31:22.34#ibcon#flushed, iclass 5, count 2 2006.229.22:31:22.34#ibcon#about to write, iclass 5, count 2 2006.229.22:31:22.34#ibcon#wrote, iclass 5, count 2 2006.229.22:31:22.34#ibcon#about to read 3, iclass 5, count 2 2006.229.22:31:22.37#ibcon#read 3, iclass 5, count 2 2006.229.22:31:22.37#ibcon#about to read 4, iclass 5, count 2 2006.229.22:31:22.37#ibcon#read 4, iclass 5, count 2 2006.229.22:31:22.37#ibcon#about to read 5, iclass 5, count 2 2006.229.22:31:22.37#ibcon#read 5, iclass 5, count 2 2006.229.22:31:22.37#ibcon#about to read 6, iclass 5, count 2 2006.229.22:31:22.37#ibcon#read 6, iclass 5, count 2 2006.229.22:31:22.37#ibcon#end of sib2, iclass 5, count 2 2006.229.22:31:22.37#ibcon#*after write, iclass 5, count 2 2006.229.22:31:22.37#ibcon#*before return 0, iclass 5, count 2 2006.229.22:31:22.37#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:22.37#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:22.37#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.22:31:22.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:22.37#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:22.49#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:22.49#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:22.49#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:31:22.49#ibcon#first serial, iclass 5, count 0 2006.229.22:31:22.49#ibcon#enter sib2, iclass 5, count 0 2006.229.22:31:22.49#ibcon#flushed, iclass 5, count 0 2006.229.22:31:22.49#ibcon#about to write, iclass 5, count 0 2006.229.22:31:22.49#ibcon#wrote, iclass 5, count 0 2006.229.22:31:22.49#ibcon#about to read 3, iclass 5, count 0 2006.229.22:31:22.51#ibcon#read 3, iclass 5, count 0 2006.229.22:31:22.51#ibcon#about to read 4, iclass 5, count 0 2006.229.22:31:22.51#ibcon#read 4, iclass 5, count 0 2006.229.22:31:22.51#ibcon#about to read 5, iclass 5, count 0 2006.229.22:31:22.51#ibcon#read 5, iclass 5, count 0 2006.229.22:31:22.51#ibcon#about to read 6, iclass 5, count 0 2006.229.22:31:22.51#ibcon#read 6, iclass 5, count 0 2006.229.22:31:22.51#ibcon#end of sib2, iclass 5, count 0 2006.229.22:31:22.51#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:31:22.51#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:31:22.51#ibcon#[25=USB\r\n] 2006.229.22:31:22.51#ibcon#*before write, iclass 5, count 0 2006.229.22:31:22.51#ibcon#enter sib2, iclass 5, count 0 2006.229.22:31:22.51#ibcon#flushed, iclass 5, count 0 2006.229.22:31:22.51#ibcon#about to write, iclass 5, count 0 2006.229.22:31:22.51#ibcon#wrote, iclass 5, count 0 2006.229.22:31:22.51#ibcon#about to read 3, iclass 5, count 0 2006.229.22:31:22.54#ibcon#read 3, iclass 5, count 0 2006.229.22:31:22.54#ibcon#about to read 4, iclass 5, count 0 2006.229.22:31:22.54#ibcon#read 4, iclass 5, count 0 2006.229.22:31:22.54#ibcon#about to read 5, iclass 5, count 0 2006.229.22:31:22.54#ibcon#read 5, iclass 5, count 0 2006.229.22:31:22.54#ibcon#about to read 6, iclass 5, count 0 2006.229.22:31:22.54#ibcon#read 6, iclass 5, count 0 2006.229.22:31:22.54#ibcon#end of sib2, iclass 5, count 0 2006.229.22:31:22.54#ibcon#*after write, iclass 5, count 0 2006.229.22:31:22.54#ibcon#*before return 0, iclass 5, count 0 2006.229.22:31:22.54#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:22.54#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:22.54#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:31:22.54#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:31:22.54$vck44/valo=8,884.99 2006.229.22:31:22.54#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.22:31:22.54#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.22:31:22.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:22.54#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:22.54#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:22.54#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:22.54#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:31:22.54#ibcon#first serial, iclass 7, count 0 2006.229.22:31:22.54#ibcon#enter sib2, iclass 7, count 0 2006.229.22:31:22.54#ibcon#flushed, iclass 7, count 0 2006.229.22:31:22.54#ibcon#about to write, iclass 7, count 0 2006.229.22:31:22.54#ibcon#wrote, iclass 7, count 0 2006.229.22:31:22.54#ibcon#about to read 3, iclass 7, count 0 2006.229.22:31:22.56#ibcon#read 3, iclass 7, count 0 2006.229.22:31:22.56#ibcon#about to read 4, iclass 7, count 0 2006.229.22:31:22.56#ibcon#read 4, iclass 7, count 0 2006.229.22:31:22.56#ibcon#about to read 5, iclass 7, count 0 2006.229.22:31:22.56#ibcon#read 5, iclass 7, count 0 2006.229.22:31:22.56#ibcon#about to read 6, iclass 7, count 0 2006.229.22:31:22.56#ibcon#read 6, iclass 7, count 0 2006.229.22:31:22.56#ibcon#end of sib2, iclass 7, count 0 2006.229.22:31:22.56#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:31:22.56#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:31:22.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:31:22.56#ibcon#*before write, iclass 7, count 0 2006.229.22:31:22.56#ibcon#enter sib2, iclass 7, count 0 2006.229.22:31:22.56#ibcon#flushed, iclass 7, count 0 2006.229.22:31:22.56#ibcon#about to write, iclass 7, count 0 2006.229.22:31:22.56#ibcon#wrote, iclass 7, count 0 2006.229.22:31:22.56#ibcon#about to read 3, iclass 7, count 0 2006.229.22:31:22.60#ibcon#read 3, iclass 7, count 0 2006.229.22:31:22.60#ibcon#about to read 4, iclass 7, count 0 2006.229.22:31:22.60#ibcon#read 4, iclass 7, count 0 2006.229.22:31:22.60#ibcon#about to read 5, iclass 7, count 0 2006.229.22:31:22.60#ibcon#read 5, iclass 7, count 0 2006.229.22:31:22.60#ibcon#about to read 6, iclass 7, count 0 2006.229.22:31:22.60#ibcon#read 6, iclass 7, count 0 2006.229.22:31:22.60#ibcon#end of sib2, iclass 7, count 0 2006.229.22:31:22.60#ibcon#*after write, iclass 7, count 0 2006.229.22:31:22.60#ibcon#*before return 0, iclass 7, count 0 2006.229.22:31:22.60#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:22.60#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:22.60#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:31:22.60#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:31:22.60$vck44/va=8,6 2006.229.22:31:22.60#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.22:31:22.60#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.22:31:22.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:22.60#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:22.66#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:22.66#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:22.66#ibcon#enter wrdev, iclass 11, count 2 2006.229.22:31:22.66#ibcon#first serial, iclass 11, count 2 2006.229.22:31:22.66#ibcon#enter sib2, iclass 11, count 2 2006.229.22:31:22.66#ibcon#flushed, iclass 11, count 2 2006.229.22:31:22.66#ibcon#about to write, iclass 11, count 2 2006.229.22:31:22.66#ibcon#wrote, iclass 11, count 2 2006.229.22:31:22.66#ibcon#about to read 3, iclass 11, count 2 2006.229.22:31:22.68#ibcon#read 3, iclass 11, count 2 2006.229.22:31:22.68#ibcon#about to read 4, iclass 11, count 2 2006.229.22:31:22.68#ibcon#read 4, iclass 11, count 2 2006.229.22:31:22.68#ibcon#about to read 5, iclass 11, count 2 2006.229.22:31:22.68#ibcon#read 5, iclass 11, count 2 2006.229.22:31:22.68#ibcon#about to read 6, iclass 11, count 2 2006.229.22:31:22.68#ibcon#read 6, iclass 11, count 2 2006.229.22:31:22.68#ibcon#end of sib2, iclass 11, count 2 2006.229.22:31:22.68#ibcon#*mode == 0, iclass 11, count 2 2006.229.22:31:22.68#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.22:31:22.68#ibcon#[25=AT08-06\r\n] 2006.229.22:31:22.68#ibcon#*before write, iclass 11, count 2 2006.229.22:31:22.68#ibcon#enter sib2, iclass 11, count 2 2006.229.22:31:22.68#ibcon#flushed, iclass 11, count 2 2006.229.22:31:22.68#ibcon#about to write, iclass 11, count 2 2006.229.22:31:22.68#ibcon#wrote, iclass 11, count 2 2006.229.22:31:22.68#ibcon#about to read 3, iclass 11, count 2 2006.229.22:31:22.71#ibcon#read 3, iclass 11, count 2 2006.229.22:31:22.71#ibcon#about to read 4, iclass 11, count 2 2006.229.22:31:22.71#ibcon#read 4, iclass 11, count 2 2006.229.22:31:22.71#ibcon#about to read 5, iclass 11, count 2 2006.229.22:31:22.71#ibcon#read 5, iclass 11, count 2 2006.229.22:31:22.71#ibcon#about to read 6, iclass 11, count 2 2006.229.22:31:22.71#ibcon#read 6, iclass 11, count 2 2006.229.22:31:22.71#ibcon#end of sib2, iclass 11, count 2 2006.229.22:31:22.71#ibcon#*after write, iclass 11, count 2 2006.229.22:31:22.71#ibcon#*before return 0, iclass 11, count 2 2006.229.22:31:22.71#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:22.71#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:22.71#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.22:31:22.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:22.71#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:22.83#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:22.83#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:22.83#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:31:22.83#ibcon#first serial, iclass 11, count 0 2006.229.22:31:22.83#ibcon#enter sib2, iclass 11, count 0 2006.229.22:31:22.83#ibcon#flushed, iclass 11, count 0 2006.229.22:31:22.83#ibcon#about to write, iclass 11, count 0 2006.229.22:31:22.83#ibcon#wrote, iclass 11, count 0 2006.229.22:31:22.83#ibcon#about to read 3, iclass 11, count 0 2006.229.22:31:22.85#ibcon#read 3, iclass 11, count 0 2006.229.22:31:22.85#ibcon#about to read 4, iclass 11, count 0 2006.229.22:31:22.85#ibcon#read 4, iclass 11, count 0 2006.229.22:31:22.85#ibcon#about to read 5, iclass 11, count 0 2006.229.22:31:22.85#ibcon#read 5, iclass 11, count 0 2006.229.22:31:22.85#ibcon#about to read 6, iclass 11, count 0 2006.229.22:31:22.85#ibcon#read 6, iclass 11, count 0 2006.229.22:31:22.85#ibcon#end of sib2, iclass 11, count 0 2006.229.22:31:22.85#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:31:22.85#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:31:22.85#ibcon#[25=USB\r\n] 2006.229.22:31:22.85#ibcon#*before write, iclass 11, count 0 2006.229.22:31:22.85#ibcon#enter sib2, iclass 11, count 0 2006.229.22:31:22.85#ibcon#flushed, iclass 11, count 0 2006.229.22:31:22.85#ibcon#about to write, iclass 11, count 0 2006.229.22:31:22.85#ibcon#wrote, iclass 11, count 0 2006.229.22:31:22.85#ibcon#about to read 3, iclass 11, count 0 2006.229.22:31:22.88#ibcon#read 3, iclass 11, count 0 2006.229.22:31:22.88#ibcon#about to read 4, iclass 11, count 0 2006.229.22:31:22.88#ibcon#read 4, iclass 11, count 0 2006.229.22:31:22.88#ibcon#about to read 5, iclass 11, count 0 2006.229.22:31:22.88#ibcon#read 5, iclass 11, count 0 2006.229.22:31:22.88#ibcon#about to read 6, iclass 11, count 0 2006.229.22:31:22.88#ibcon#read 6, iclass 11, count 0 2006.229.22:31:22.88#ibcon#end of sib2, iclass 11, count 0 2006.229.22:31:22.88#ibcon#*after write, iclass 11, count 0 2006.229.22:31:22.88#ibcon#*before return 0, iclass 11, count 0 2006.229.22:31:22.88#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:22.88#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:22.88#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:31:22.88#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:31:22.88$vck44/vblo=1,629.99 2006.229.22:31:22.88#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.22:31:22.88#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.22:31:22.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:22.88#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:22.88#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:22.88#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:22.88#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:31:22.88#ibcon#first serial, iclass 13, count 0 2006.229.22:31:22.88#ibcon#enter sib2, iclass 13, count 0 2006.229.22:31:22.88#ibcon#flushed, iclass 13, count 0 2006.229.22:31:22.88#ibcon#about to write, iclass 13, count 0 2006.229.22:31:22.88#ibcon#wrote, iclass 13, count 0 2006.229.22:31:22.88#ibcon#about to read 3, iclass 13, count 0 2006.229.22:31:22.90#ibcon#read 3, iclass 13, count 0 2006.229.22:31:22.90#ibcon#about to read 4, iclass 13, count 0 2006.229.22:31:22.90#ibcon#read 4, iclass 13, count 0 2006.229.22:31:22.90#ibcon#about to read 5, iclass 13, count 0 2006.229.22:31:22.90#ibcon#read 5, iclass 13, count 0 2006.229.22:31:22.90#ibcon#about to read 6, iclass 13, count 0 2006.229.22:31:22.90#ibcon#read 6, iclass 13, count 0 2006.229.22:31:22.90#ibcon#end of sib2, iclass 13, count 0 2006.229.22:31:22.90#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:31:22.90#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:31:22.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:31:22.90#ibcon#*before write, iclass 13, count 0 2006.229.22:31:22.90#ibcon#enter sib2, iclass 13, count 0 2006.229.22:31:22.90#ibcon#flushed, iclass 13, count 0 2006.229.22:31:22.90#ibcon#about to write, iclass 13, count 0 2006.229.22:31:22.90#ibcon#wrote, iclass 13, count 0 2006.229.22:31:22.90#ibcon#about to read 3, iclass 13, count 0 2006.229.22:31:22.94#ibcon#read 3, iclass 13, count 0 2006.229.22:31:22.94#ibcon#about to read 4, iclass 13, count 0 2006.229.22:31:22.94#ibcon#read 4, iclass 13, count 0 2006.229.22:31:22.94#ibcon#about to read 5, iclass 13, count 0 2006.229.22:31:22.94#ibcon#read 5, iclass 13, count 0 2006.229.22:31:22.94#ibcon#about to read 6, iclass 13, count 0 2006.229.22:31:22.94#ibcon#read 6, iclass 13, count 0 2006.229.22:31:22.94#ibcon#end of sib2, iclass 13, count 0 2006.229.22:31:22.94#ibcon#*after write, iclass 13, count 0 2006.229.22:31:22.94#ibcon#*before return 0, iclass 13, count 0 2006.229.22:31:22.94#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:22.94#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:22.94#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:31:22.94#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:31:22.94$vck44/vb=1,4 2006.229.22:31:22.94#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.22:31:22.94#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.22:31:22.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:22.94#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:31:22.94#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:31:22.94#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:31:22.94#ibcon#enter wrdev, iclass 15, count 2 2006.229.22:31:22.94#ibcon#first serial, iclass 15, count 2 2006.229.22:31:22.94#ibcon#enter sib2, iclass 15, count 2 2006.229.22:31:22.94#ibcon#flushed, iclass 15, count 2 2006.229.22:31:22.94#ibcon#about to write, iclass 15, count 2 2006.229.22:31:22.94#ibcon#wrote, iclass 15, count 2 2006.229.22:31:22.94#ibcon#about to read 3, iclass 15, count 2 2006.229.22:31:22.96#ibcon#read 3, iclass 15, count 2 2006.229.22:31:22.96#ibcon#about to read 4, iclass 15, count 2 2006.229.22:31:22.96#ibcon#read 4, iclass 15, count 2 2006.229.22:31:22.96#ibcon#about to read 5, iclass 15, count 2 2006.229.22:31:22.96#ibcon#read 5, iclass 15, count 2 2006.229.22:31:22.96#ibcon#about to read 6, iclass 15, count 2 2006.229.22:31:22.96#ibcon#read 6, iclass 15, count 2 2006.229.22:31:22.96#ibcon#end of sib2, iclass 15, count 2 2006.229.22:31:22.96#ibcon#*mode == 0, iclass 15, count 2 2006.229.22:31:22.96#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.22:31:22.96#ibcon#[27=AT01-04\r\n] 2006.229.22:31:22.96#ibcon#*before write, iclass 15, count 2 2006.229.22:31:22.96#ibcon#enter sib2, iclass 15, count 2 2006.229.22:31:22.96#ibcon#flushed, iclass 15, count 2 2006.229.22:31:22.96#ibcon#about to write, iclass 15, count 2 2006.229.22:31:22.96#ibcon#wrote, iclass 15, count 2 2006.229.22:31:22.96#ibcon#about to read 3, iclass 15, count 2 2006.229.22:31:22.99#ibcon#read 3, iclass 15, count 2 2006.229.22:31:22.99#ibcon#about to read 4, iclass 15, count 2 2006.229.22:31:22.99#ibcon#read 4, iclass 15, count 2 2006.229.22:31:22.99#ibcon#about to read 5, iclass 15, count 2 2006.229.22:31:22.99#ibcon#read 5, iclass 15, count 2 2006.229.22:31:22.99#ibcon#about to read 6, iclass 15, count 2 2006.229.22:31:22.99#ibcon#read 6, iclass 15, count 2 2006.229.22:31:22.99#ibcon#end of sib2, iclass 15, count 2 2006.229.22:31:22.99#ibcon#*after write, iclass 15, count 2 2006.229.22:31:22.99#ibcon#*before return 0, iclass 15, count 2 2006.229.22:31:22.99#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:31:22.99#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:31:22.99#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.22:31:22.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:22.99#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:31:23.11#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:31:23.11#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:31:23.11#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:31:23.11#ibcon#first serial, iclass 15, count 0 2006.229.22:31:23.11#ibcon#enter sib2, iclass 15, count 0 2006.229.22:31:23.11#ibcon#flushed, iclass 15, count 0 2006.229.22:31:23.11#ibcon#about to write, iclass 15, count 0 2006.229.22:31:23.11#ibcon#wrote, iclass 15, count 0 2006.229.22:31:23.11#ibcon#about to read 3, iclass 15, count 0 2006.229.22:31:23.13#ibcon#read 3, iclass 15, count 0 2006.229.22:31:23.13#ibcon#about to read 4, iclass 15, count 0 2006.229.22:31:23.13#ibcon#read 4, iclass 15, count 0 2006.229.22:31:23.13#ibcon#about to read 5, iclass 15, count 0 2006.229.22:31:23.13#ibcon#read 5, iclass 15, count 0 2006.229.22:31:23.13#ibcon#about to read 6, iclass 15, count 0 2006.229.22:31:23.13#ibcon#read 6, iclass 15, count 0 2006.229.22:31:23.13#ibcon#end of sib2, iclass 15, count 0 2006.229.22:31:23.13#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:31:23.13#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:31:23.13#ibcon#[27=USB\r\n] 2006.229.22:31:23.13#ibcon#*before write, iclass 15, count 0 2006.229.22:31:23.13#ibcon#enter sib2, iclass 15, count 0 2006.229.22:31:23.13#ibcon#flushed, iclass 15, count 0 2006.229.22:31:23.13#ibcon#about to write, iclass 15, count 0 2006.229.22:31:23.13#ibcon#wrote, iclass 15, count 0 2006.229.22:31:23.13#ibcon#about to read 3, iclass 15, count 0 2006.229.22:31:23.16#ibcon#read 3, iclass 15, count 0 2006.229.22:31:23.16#ibcon#about to read 4, iclass 15, count 0 2006.229.22:31:23.16#ibcon#read 4, iclass 15, count 0 2006.229.22:31:23.16#ibcon#about to read 5, iclass 15, count 0 2006.229.22:31:23.16#ibcon#read 5, iclass 15, count 0 2006.229.22:31:23.16#ibcon#about to read 6, iclass 15, count 0 2006.229.22:31:23.16#ibcon#read 6, iclass 15, count 0 2006.229.22:31:23.16#ibcon#end of sib2, iclass 15, count 0 2006.229.22:31:23.16#ibcon#*after write, iclass 15, count 0 2006.229.22:31:23.16#ibcon#*before return 0, iclass 15, count 0 2006.229.22:31:23.16#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:31:23.16#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:31:23.16#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:31:23.16#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:31:23.16$vck44/vblo=2,634.99 2006.229.22:31:23.16#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.22:31:23.16#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.22:31:23.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:23.16#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:23.16#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:23.16#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:23.16#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:31:23.16#ibcon#first serial, iclass 17, count 0 2006.229.22:31:23.16#ibcon#enter sib2, iclass 17, count 0 2006.229.22:31:23.16#ibcon#flushed, iclass 17, count 0 2006.229.22:31:23.16#ibcon#about to write, iclass 17, count 0 2006.229.22:31:23.16#ibcon#wrote, iclass 17, count 0 2006.229.22:31:23.16#ibcon#about to read 3, iclass 17, count 0 2006.229.22:31:23.18#ibcon#read 3, iclass 17, count 0 2006.229.22:31:23.18#ibcon#about to read 4, iclass 17, count 0 2006.229.22:31:23.18#ibcon#read 4, iclass 17, count 0 2006.229.22:31:23.18#ibcon#about to read 5, iclass 17, count 0 2006.229.22:31:23.18#ibcon#read 5, iclass 17, count 0 2006.229.22:31:23.18#ibcon#about to read 6, iclass 17, count 0 2006.229.22:31:23.18#ibcon#read 6, iclass 17, count 0 2006.229.22:31:23.18#ibcon#end of sib2, iclass 17, count 0 2006.229.22:31:23.18#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:31:23.18#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:31:23.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:31:23.18#ibcon#*before write, iclass 17, count 0 2006.229.22:31:23.18#ibcon#enter sib2, iclass 17, count 0 2006.229.22:31:23.18#ibcon#flushed, iclass 17, count 0 2006.229.22:31:23.18#ibcon#about to write, iclass 17, count 0 2006.229.22:31:23.18#ibcon#wrote, iclass 17, count 0 2006.229.22:31:23.18#ibcon#about to read 3, iclass 17, count 0 2006.229.22:31:23.22#ibcon#read 3, iclass 17, count 0 2006.229.22:31:23.22#ibcon#about to read 4, iclass 17, count 0 2006.229.22:31:23.22#ibcon#read 4, iclass 17, count 0 2006.229.22:31:23.22#ibcon#about to read 5, iclass 17, count 0 2006.229.22:31:23.22#ibcon#read 5, iclass 17, count 0 2006.229.22:31:23.22#ibcon#about to read 6, iclass 17, count 0 2006.229.22:31:23.22#ibcon#read 6, iclass 17, count 0 2006.229.22:31:23.22#ibcon#end of sib2, iclass 17, count 0 2006.229.22:31:23.22#ibcon#*after write, iclass 17, count 0 2006.229.22:31:23.22#ibcon#*before return 0, iclass 17, count 0 2006.229.22:31:23.22#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:23.22#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:31:23.22#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:31:23.22#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:31:23.22$vck44/vb=2,4 2006.229.22:31:23.22#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.22:31:23.22#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.22:31:23.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:23.22#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:23.28#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:23.28#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:23.28#ibcon#enter wrdev, iclass 19, count 2 2006.229.22:31:23.28#ibcon#first serial, iclass 19, count 2 2006.229.22:31:23.28#ibcon#enter sib2, iclass 19, count 2 2006.229.22:31:23.28#ibcon#flushed, iclass 19, count 2 2006.229.22:31:23.28#ibcon#about to write, iclass 19, count 2 2006.229.22:31:23.28#ibcon#wrote, iclass 19, count 2 2006.229.22:31:23.28#ibcon#about to read 3, iclass 19, count 2 2006.229.22:31:23.30#ibcon#read 3, iclass 19, count 2 2006.229.22:31:23.30#ibcon#about to read 4, iclass 19, count 2 2006.229.22:31:23.30#ibcon#read 4, iclass 19, count 2 2006.229.22:31:23.30#ibcon#about to read 5, iclass 19, count 2 2006.229.22:31:23.30#ibcon#read 5, iclass 19, count 2 2006.229.22:31:23.30#ibcon#about to read 6, iclass 19, count 2 2006.229.22:31:23.30#ibcon#read 6, iclass 19, count 2 2006.229.22:31:23.30#ibcon#end of sib2, iclass 19, count 2 2006.229.22:31:23.30#ibcon#*mode == 0, iclass 19, count 2 2006.229.22:31:23.30#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.22:31:23.30#ibcon#[27=AT02-04\r\n] 2006.229.22:31:23.30#ibcon#*before write, iclass 19, count 2 2006.229.22:31:23.30#ibcon#enter sib2, iclass 19, count 2 2006.229.22:31:23.30#ibcon#flushed, iclass 19, count 2 2006.229.22:31:23.30#ibcon#about to write, iclass 19, count 2 2006.229.22:31:23.30#ibcon#wrote, iclass 19, count 2 2006.229.22:31:23.30#ibcon#about to read 3, iclass 19, count 2 2006.229.22:31:23.33#ibcon#read 3, iclass 19, count 2 2006.229.22:31:23.33#ibcon#about to read 4, iclass 19, count 2 2006.229.22:31:23.33#ibcon#read 4, iclass 19, count 2 2006.229.22:31:23.33#ibcon#about to read 5, iclass 19, count 2 2006.229.22:31:23.33#ibcon#read 5, iclass 19, count 2 2006.229.22:31:23.33#ibcon#about to read 6, iclass 19, count 2 2006.229.22:31:23.33#ibcon#read 6, iclass 19, count 2 2006.229.22:31:23.33#ibcon#end of sib2, iclass 19, count 2 2006.229.22:31:23.33#ibcon#*after write, iclass 19, count 2 2006.229.22:31:23.33#ibcon#*before return 0, iclass 19, count 2 2006.229.22:31:23.33#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:23.33#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:31:23.33#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.22:31:23.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:23.33#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:23.45#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:23.45#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:23.45#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:31:23.45#ibcon#first serial, iclass 19, count 0 2006.229.22:31:23.45#ibcon#enter sib2, iclass 19, count 0 2006.229.22:31:23.45#ibcon#flushed, iclass 19, count 0 2006.229.22:31:23.45#ibcon#about to write, iclass 19, count 0 2006.229.22:31:23.45#ibcon#wrote, iclass 19, count 0 2006.229.22:31:23.45#ibcon#about to read 3, iclass 19, count 0 2006.229.22:31:23.47#ibcon#read 3, iclass 19, count 0 2006.229.22:31:23.47#ibcon#about to read 4, iclass 19, count 0 2006.229.22:31:23.47#ibcon#read 4, iclass 19, count 0 2006.229.22:31:23.47#ibcon#about to read 5, iclass 19, count 0 2006.229.22:31:23.47#ibcon#read 5, iclass 19, count 0 2006.229.22:31:23.47#ibcon#about to read 6, iclass 19, count 0 2006.229.22:31:23.47#ibcon#read 6, iclass 19, count 0 2006.229.22:31:23.47#ibcon#end of sib2, iclass 19, count 0 2006.229.22:31:23.47#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:31:23.47#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:31:23.47#ibcon#[27=USB\r\n] 2006.229.22:31:23.47#ibcon#*before write, iclass 19, count 0 2006.229.22:31:23.47#ibcon#enter sib2, iclass 19, count 0 2006.229.22:31:23.47#ibcon#flushed, iclass 19, count 0 2006.229.22:31:23.47#ibcon#about to write, iclass 19, count 0 2006.229.22:31:23.47#ibcon#wrote, iclass 19, count 0 2006.229.22:31:23.47#ibcon#about to read 3, iclass 19, count 0 2006.229.22:31:23.50#ibcon#read 3, iclass 19, count 0 2006.229.22:31:23.50#ibcon#about to read 4, iclass 19, count 0 2006.229.22:31:23.50#ibcon#read 4, iclass 19, count 0 2006.229.22:31:23.50#ibcon#about to read 5, iclass 19, count 0 2006.229.22:31:23.50#ibcon#read 5, iclass 19, count 0 2006.229.22:31:23.50#ibcon#about to read 6, iclass 19, count 0 2006.229.22:31:23.50#ibcon#read 6, iclass 19, count 0 2006.229.22:31:23.50#ibcon#end of sib2, iclass 19, count 0 2006.229.22:31:23.50#ibcon#*after write, iclass 19, count 0 2006.229.22:31:23.50#ibcon#*before return 0, iclass 19, count 0 2006.229.22:31:23.50#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:23.50#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:31:23.50#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:31:23.50#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:31:23.50$vck44/vblo=3,649.99 2006.229.22:31:23.50#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:31:23.50#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:31:23.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:23.50#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:23.50#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:23.50#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:23.50#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:31:23.50#ibcon#first serial, iclass 21, count 0 2006.229.22:31:23.50#ibcon#enter sib2, iclass 21, count 0 2006.229.22:31:23.50#ibcon#flushed, iclass 21, count 0 2006.229.22:31:23.50#ibcon#about to write, iclass 21, count 0 2006.229.22:31:23.50#ibcon#wrote, iclass 21, count 0 2006.229.22:31:23.50#ibcon#about to read 3, iclass 21, count 0 2006.229.22:31:23.52#ibcon#read 3, iclass 21, count 0 2006.229.22:31:23.52#ibcon#about to read 4, iclass 21, count 0 2006.229.22:31:23.52#ibcon#read 4, iclass 21, count 0 2006.229.22:31:23.52#ibcon#about to read 5, iclass 21, count 0 2006.229.22:31:23.52#ibcon#read 5, iclass 21, count 0 2006.229.22:31:23.52#ibcon#about to read 6, iclass 21, count 0 2006.229.22:31:23.52#ibcon#read 6, iclass 21, count 0 2006.229.22:31:23.52#ibcon#end of sib2, iclass 21, count 0 2006.229.22:31:23.52#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:31:23.52#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:31:23.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:31:23.52#ibcon#*before write, iclass 21, count 0 2006.229.22:31:23.52#ibcon#enter sib2, iclass 21, count 0 2006.229.22:31:23.52#ibcon#flushed, iclass 21, count 0 2006.229.22:31:23.52#ibcon#about to write, iclass 21, count 0 2006.229.22:31:23.52#ibcon#wrote, iclass 21, count 0 2006.229.22:31:23.52#ibcon#about to read 3, iclass 21, count 0 2006.229.22:31:23.56#ibcon#read 3, iclass 21, count 0 2006.229.22:31:23.56#ibcon#about to read 4, iclass 21, count 0 2006.229.22:31:23.56#ibcon#read 4, iclass 21, count 0 2006.229.22:31:23.56#ibcon#about to read 5, iclass 21, count 0 2006.229.22:31:23.56#ibcon#read 5, iclass 21, count 0 2006.229.22:31:23.56#ibcon#about to read 6, iclass 21, count 0 2006.229.22:31:23.56#ibcon#read 6, iclass 21, count 0 2006.229.22:31:23.56#ibcon#end of sib2, iclass 21, count 0 2006.229.22:31:23.56#ibcon#*after write, iclass 21, count 0 2006.229.22:31:23.56#ibcon#*before return 0, iclass 21, count 0 2006.229.22:31:23.56#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:23.56#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:31:23.56#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:31:23.56#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:31:23.56$vck44/vb=3,4 2006.229.22:31:23.56#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.22:31:23.56#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.22:31:23.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:23.56#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:23.62#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:23.62#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:23.62#ibcon#enter wrdev, iclass 23, count 2 2006.229.22:31:23.62#ibcon#first serial, iclass 23, count 2 2006.229.22:31:23.62#ibcon#enter sib2, iclass 23, count 2 2006.229.22:31:23.62#ibcon#flushed, iclass 23, count 2 2006.229.22:31:23.62#ibcon#about to write, iclass 23, count 2 2006.229.22:31:23.62#ibcon#wrote, iclass 23, count 2 2006.229.22:31:23.62#ibcon#about to read 3, iclass 23, count 2 2006.229.22:31:23.64#ibcon#read 3, iclass 23, count 2 2006.229.22:31:23.64#ibcon#about to read 4, iclass 23, count 2 2006.229.22:31:23.64#ibcon#read 4, iclass 23, count 2 2006.229.22:31:23.64#ibcon#about to read 5, iclass 23, count 2 2006.229.22:31:23.64#ibcon#read 5, iclass 23, count 2 2006.229.22:31:23.64#ibcon#about to read 6, iclass 23, count 2 2006.229.22:31:23.64#ibcon#read 6, iclass 23, count 2 2006.229.22:31:23.64#ibcon#end of sib2, iclass 23, count 2 2006.229.22:31:23.64#ibcon#*mode == 0, iclass 23, count 2 2006.229.22:31:23.64#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.22:31:23.64#ibcon#[27=AT03-04\r\n] 2006.229.22:31:23.64#ibcon#*before write, iclass 23, count 2 2006.229.22:31:23.64#ibcon#enter sib2, iclass 23, count 2 2006.229.22:31:23.64#ibcon#flushed, iclass 23, count 2 2006.229.22:31:23.64#ibcon#about to write, iclass 23, count 2 2006.229.22:31:23.64#ibcon#wrote, iclass 23, count 2 2006.229.22:31:23.64#ibcon#about to read 3, iclass 23, count 2 2006.229.22:31:23.67#ibcon#read 3, iclass 23, count 2 2006.229.22:31:23.67#ibcon#about to read 4, iclass 23, count 2 2006.229.22:31:23.67#ibcon#read 4, iclass 23, count 2 2006.229.22:31:23.67#ibcon#about to read 5, iclass 23, count 2 2006.229.22:31:23.67#ibcon#read 5, iclass 23, count 2 2006.229.22:31:23.67#ibcon#about to read 6, iclass 23, count 2 2006.229.22:31:23.67#ibcon#read 6, iclass 23, count 2 2006.229.22:31:23.67#ibcon#end of sib2, iclass 23, count 2 2006.229.22:31:23.67#ibcon#*after write, iclass 23, count 2 2006.229.22:31:23.67#ibcon#*before return 0, iclass 23, count 2 2006.229.22:31:23.67#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:23.67#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:31:23.67#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.22:31:23.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:23.67#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:23.75#abcon#<5=/09 1.5 4.6 28.59 921002.4\r\n> 2006.229.22:31:23.77#abcon#{5=INTERFACE CLEAR} 2006.229.22:31:23.79#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:23.79#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:23.79#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:31:23.79#ibcon#first serial, iclass 23, count 0 2006.229.22:31:23.79#ibcon#enter sib2, iclass 23, count 0 2006.229.22:31:23.79#ibcon#flushed, iclass 23, count 0 2006.229.22:31:23.79#ibcon#about to write, iclass 23, count 0 2006.229.22:31:23.79#ibcon#wrote, iclass 23, count 0 2006.229.22:31:23.79#ibcon#about to read 3, iclass 23, count 0 2006.229.22:31:23.81#ibcon#read 3, iclass 23, count 0 2006.229.22:31:23.81#ibcon#about to read 4, iclass 23, count 0 2006.229.22:31:23.81#ibcon#read 4, iclass 23, count 0 2006.229.22:31:23.81#ibcon#about to read 5, iclass 23, count 0 2006.229.22:31:23.81#ibcon#read 5, iclass 23, count 0 2006.229.22:31:23.81#ibcon#about to read 6, iclass 23, count 0 2006.229.22:31:23.81#ibcon#read 6, iclass 23, count 0 2006.229.22:31:23.81#ibcon#end of sib2, iclass 23, count 0 2006.229.22:31:23.81#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:31:23.81#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:31:23.81#ibcon#[27=USB\r\n] 2006.229.22:31:23.81#ibcon#*before write, iclass 23, count 0 2006.229.22:31:23.81#ibcon#enter sib2, iclass 23, count 0 2006.229.22:31:23.81#ibcon#flushed, iclass 23, count 0 2006.229.22:31:23.81#ibcon#about to write, iclass 23, count 0 2006.229.22:31:23.81#ibcon#wrote, iclass 23, count 0 2006.229.22:31:23.81#ibcon#about to read 3, iclass 23, count 0 2006.229.22:31:23.83#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:31:23.84#ibcon#read 3, iclass 23, count 0 2006.229.22:31:23.84#ibcon#about to read 4, iclass 23, count 0 2006.229.22:31:23.84#ibcon#read 4, iclass 23, count 0 2006.229.22:31:23.84#ibcon#about to read 5, iclass 23, count 0 2006.229.22:31:23.84#ibcon#read 5, iclass 23, count 0 2006.229.22:31:23.84#ibcon#about to read 6, iclass 23, count 0 2006.229.22:31:23.84#ibcon#read 6, iclass 23, count 0 2006.229.22:31:23.84#ibcon#end of sib2, iclass 23, count 0 2006.229.22:31:23.84#ibcon#*after write, iclass 23, count 0 2006.229.22:31:23.84#ibcon#*before return 0, iclass 23, count 0 2006.229.22:31:23.84#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:23.84#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:31:23.84#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:31:23.84#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:31:23.84$vck44/vblo=4,679.99 2006.229.22:31:23.84#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.22:31:23.84#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.22:31:23.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:23.84#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:23.84#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:23.84#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:23.84#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:31:23.84#ibcon#first serial, iclass 29, count 0 2006.229.22:31:23.84#ibcon#enter sib2, iclass 29, count 0 2006.229.22:31:23.84#ibcon#flushed, iclass 29, count 0 2006.229.22:31:23.84#ibcon#about to write, iclass 29, count 0 2006.229.22:31:23.84#ibcon#wrote, iclass 29, count 0 2006.229.22:31:23.84#ibcon#about to read 3, iclass 29, count 0 2006.229.22:31:23.86#ibcon#read 3, iclass 29, count 0 2006.229.22:31:23.86#ibcon#about to read 4, iclass 29, count 0 2006.229.22:31:23.86#ibcon#read 4, iclass 29, count 0 2006.229.22:31:23.86#ibcon#about to read 5, iclass 29, count 0 2006.229.22:31:23.86#ibcon#read 5, iclass 29, count 0 2006.229.22:31:23.86#ibcon#about to read 6, iclass 29, count 0 2006.229.22:31:23.86#ibcon#read 6, iclass 29, count 0 2006.229.22:31:23.86#ibcon#end of sib2, iclass 29, count 0 2006.229.22:31:23.86#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:31:23.86#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:31:23.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:31:23.86#ibcon#*before write, iclass 29, count 0 2006.229.22:31:23.86#ibcon#enter sib2, iclass 29, count 0 2006.229.22:31:23.86#ibcon#flushed, iclass 29, count 0 2006.229.22:31:23.86#ibcon#about to write, iclass 29, count 0 2006.229.22:31:23.86#ibcon#wrote, iclass 29, count 0 2006.229.22:31:23.86#ibcon#about to read 3, iclass 29, count 0 2006.229.22:31:23.90#ibcon#read 3, iclass 29, count 0 2006.229.22:31:23.90#ibcon#about to read 4, iclass 29, count 0 2006.229.22:31:23.90#ibcon#read 4, iclass 29, count 0 2006.229.22:31:23.90#ibcon#about to read 5, iclass 29, count 0 2006.229.22:31:23.90#ibcon#read 5, iclass 29, count 0 2006.229.22:31:23.90#ibcon#about to read 6, iclass 29, count 0 2006.229.22:31:23.90#ibcon#read 6, iclass 29, count 0 2006.229.22:31:23.90#ibcon#end of sib2, iclass 29, count 0 2006.229.22:31:23.90#ibcon#*after write, iclass 29, count 0 2006.229.22:31:23.90#ibcon#*before return 0, iclass 29, count 0 2006.229.22:31:23.90#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:23.90#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:31:23.90#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:31:23.90#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:31:23.90$vck44/vb=4,4 2006.229.22:31:23.90#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.22:31:23.90#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.22:31:23.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:23.90#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:23.96#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:23.96#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:23.96#ibcon#enter wrdev, iclass 31, count 2 2006.229.22:31:23.96#ibcon#first serial, iclass 31, count 2 2006.229.22:31:23.96#ibcon#enter sib2, iclass 31, count 2 2006.229.22:31:23.96#ibcon#flushed, iclass 31, count 2 2006.229.22:31:23.96#ibcon#about to write, iclass 31, count 2 2006.229.22:31:23.96#ibcon#wrote, iclass 31, count 2 2006.229.22:31:23.96#ibcon#about to read 3, iclass 31, count 2 2006.229.22:31:23.98#ibcon#read 3, iclass 31, count 2 2006.229.22:31:23.98#ibcon#about to read 4, iclass 31, count 2 2006.229.22:31:23.98#ibcon#read 4, iclass 31, count 2 2006.229.22:31:23.98#ibcon#about to read 5, iclass 31, count 2 2006.229.22:31:23.98#ibcon#read 5, iclass 31, count 2 2006.229.22:31:23.98#ibcon#about to read 6, iclass 31, count 2 2006.229.22:31:23.98#ibcon#read 6, iclass 31, count 2 2006.229.22:31:23.98#ibcon#end of sib2, iclass 31, count 2 2006.229.22:31:23.98#ibcon#*mode == 0, iclass 31, count 2 2006.229.22:31:23.98#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.22:31:23.98#ibcon#[27=AT04-04\r\n] 2006.229.22:31:23.98#ibcon#*before write, iclass 31, count 2 2006.229.22:31:23.98#ibcon#enter sib2, iclass 31, count 2 2006.229.22:31:23.98#ibcon#flushed, iclass 31, count 2 2006.229.22:31:23.98#ibcon#about to write, iclass 31, count 2 2006.229.22:31:23.98#ibcon#wrote, iclass 31, count 2 2006.229.22:31:23.98#ibcon#about to read 3, iclass 31, count 2 2006.229.22:31:24.01#ibcon#read 3, iclass 31, count 2 2006.229.22:31:24.01#ibcon#about to read 4, iclass 31, count 2 2006.229.22:31:24.01#ibcon#read 4, iclass 31, count 2 2006.229.22:31:24.01#ibcon#about to read 5, iclass 31, count 2 2006.229.22:31:24.01#ibcon#read 5, iclass 31, count 2 2006.229.22:31:24.01#ibcon#about to read 6, iclass 31, count 2 2006.229.22:31:24.01#ibcon#read 6, iclass 31, count 2 2006.229.22:31:24.01#ibcon#end of sib2, iclass 31, count 2 2006.229.22:31:24.01#ibcon#*after write, iclass 31, count 2 2006.229.22:31:24.01#ibcon#*before return 0, iclass 31, count 2 2006.229.22:31:24.01#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:24.01#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:31:24.01#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.22:31:24.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:24.01#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:24.13#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:24.13#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:24.13#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:31:24.13#ibcon#first serial, iclass 31, count 0 2006.229.22:31:24.13#ibcon#enter sib2, iclass 31, count 0 2006.229.22:31:24.13#ibcon#flushed, iclass 31, count 0 2006.229.22:31:24.13#ibcon#about to write, iclass 31, count 0 2006.229.22:31:24.13#ibcon#wrote, iclass 31, count 0 2006.229.22:31:24.13#ibcon#about to read 3, iclass 31, count 0 2006.229.22:31:24.15#ibcon#read 3, iclass 31, count 0 2006.229.22:31:24.15#ibcon#about to read 4, iclass 31, count 0 2006.229.22:31:24.15#ibcon#read 4, iclass 31, count 0 2006.229.22:31:24.15#ibcon#about to read 5, iclass 31, count 0 2006.229.22:31:24.15#ibcon#read 5, iclass 31, count 0 2006.229.22:31:24.15#ibcon#about to read 6, iclass 31, count 0 2006.229.22:31:24.15#ibcon#read 6, iclass 31, count 0 2006.229.22:31:24.15#ibcon#end of sib2, iclass 31, count 0 2006.229.22:31:24.15#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:31:24.15#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:31:24.15#ibcon#[27=USB\r\n] 2006.229.22:31:24.15#ibcon#*before write, iclass 31, count 0 2006.229.22:31:24.15#ibcon#enter sib2, iclass 31, count 0 2006.229.22:31:24.15#ibcon#flushed, iclass 31, count 0 2006.229.22:31:24.15#ibcon#about to write, iclass 31, count 0 2006.229.22:31:24.15#ibcon#wrote, iclass 31, count 0 2006.229.22:31:24.15#ibcon#about to read 3, iclass 31, count 0 2006.229.22:31:24.18#ibcon#read 3, iclass 31, count 0 2006.229.22:31:24.18#ibcon#about to read 4, iclass 31, count 0 2006.229.22:31:24.18#ibcon#read 4, iclass 31, count 0 2006.229.22:31:24.18#ibcon#about to read 5, iclass 31, count 0 2006.229.22:31:24.18#ibcon#read 5, iclass 31, count 0 2006.229.22:31:24.18#ibcon#about to read 6, iclass 31, count 0 2006.229.22:31:24.18#ibcon#read 6, iclass 31, count 0 2006.229.22:31:24.18#ibcon#end of sib2, iclass 31, count 0 2006.229.22:31:24.18#ibcon#*after write, iclass 31, count 0 2006.229.22:31:24.18#ibcon#*before return 0, iclass 31, count 0 2006.229.22:31:24.18#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:24.18#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:31:24.18#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:31:24.18#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:31:24.18$vck44/vblo=5,709.99 2006.229.22:31:24.18#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.22:31:24.18#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.22:31:24.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:24.18#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:24.18#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:24.18#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:24.18#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:31:24.18#ibcon#first serial, iclass 33, count 0 2006.229.22:31:24.18#ibcon#enter sib2, iclass 33, count 0 2006.229.22:31:24.18#ibcon#flushed, iclass 33, count 0 2006.229.22:31:24.18#ibcon#about to write, iclass 33, count 0 2006.229.22:31:24.18#ibcon#wrote, iclass 33, count 0 2006.229.22:31:24.18#ibcon#about to read 3, iclass 33, count 0 2006.229.22:31:24.20#ibcon#read 3, iclass 33, count 0 2006.229.22:31:24.20#ibcon#about to read 4, iclass 33, count 0 2006.229.22:31:24.20#ibcon#read 4, iclass 33, count 0 2006.229.22:31:24.20#ibcon#about to read 5, iclass 33, count 0 2006.229.22:31:24.20#ibcon#read 5, iclass 33, count 0 2006.229.22:31:24.20#ibcon#about to read 6, iclass 33, count 0 2006.229.22:31:24.20#ibcon#read 6, iclass 33, count 0 2006.229.22:31:24.20#ibcon#end of sib2, iclass 33, count 0 2006.229.22:31:24.20#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:31:24.20#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:31:24.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:31:24.20#ibcon#*before write, iclass 33, count 0 2006.229.22:31:24.20#ibcon#enter sib2, iclass 33, count 0 2006.229.22:31:24.20#ibcon#flushed, iclass 33, count 0 2006.229.22:31:24.20#ibcon#about to write, iclass 33, count 0 2006.229.22:31:24.20#ibcon#wrote, iclass 33, count 0 2006.229.22:31:24.20#ibcon#about to read 3, iclass 33, count 0 2006.229.22:31:24.24#ibcon#read 3, iclass 33, count 0 2006.229.22:31:24.24#ibcon#about to read 4, iclass 33, count 0 2006.229.22:31:24.24#ibcon#read 4, iclass 33, count 0 2006.229.22:31:24.24#ibcon#about to read 5, iclass 33, count 0 2006.229.22:31:24.24#ibcon#read 5, iclass 33, count 0 2006.229.22:31:24.24#ibcon#about to read 6, iclass 33, count 0 2006.229.22:31:24.24#ibcon#read 6, iclass 33, count 0 2006.229.22:31:24.24#ibcon#end of sib2, iclass 33, count 0 2006.229.22:31:24.24#ibcon#*after write, iclass 33, count 0 2006.229.22:31:24.24#ibcon#*before return 0, iclass 33, count 0 2006.229.22:31:24.24#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:24.24#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:31:24.24#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:31:24.24#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:31:24.24$vck44/vb=5,4 2006.229.22:31:24.24#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.22:31:24.24#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.22:31:24.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:24.24#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:24.30#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:24.30#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:24.30#ibcon#enter wrdev, iclass 35, count 2 2006.229.22:31:24.30#ibcon#first serial, iclass 35, count 2 2006.229.22:31:24.30#ibcon#enter sib2, iclass 35, count 2 2006.229.22:31:24.30#ibcon#flushed, iclass 35, count 2 2006.229.22:31:24.30#ibcon#about to write, iclass 35, count 2 2006.229.22:31:24.30#ibcon#wrote, iclass 35, count 2 2006.229.22:31:24.30#ibcon#about to read 3, iclass 35, count 2 2006.229.22:31:24.32#ibcon#read 3, iclass 35, count 2 2006.229.22:31:24.32#ibcon#about to read 4, iclass 35, count 2 2006.229.22:31:24.32#ibcon#read 4, iclass 35, count 2 2006.229.22:31:24.32#ibcon#about to read 5, iclass 35, count 2 2006.229.22:31:24.32#ibcon#read 5, iclass 35, count 2 2006.229.22:31:24.32#ibcon#about to read 6, iclass 35, count 2 2006.229.22:31:24.32#ibcon#read 6, iclass 35, count 2 2006.229.22:31:24.32#ibcon#end of sib2, iclass 35, count 2 2006.229.22:31:24.32#ibcon#*mode == 0, iclass 35, count 2 2006.229.22:31:24.32#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.22:31:24.32#ibcon#[27=AT05-04\r\n] 2006.229.22:31:24.32#ibcon#*before write, iclass 35, count 2 2006.229.22:31:24.32#ibcon#enter sib2, iclass 35, count 2 2006.229.22:31:24.32#ibcon#flushed, iclass 35, count 2 2006.229.22:31:24.32#ibcon#about to write, iclass 35, count 2 2006.229.22:31:24.32#ibcon#wrote, iclass 35, count 2 2006.229.22:31:24.32#ibcon#about to read 3, iclass 35, count 2 2006.229.22:31:24.35#ibcon#read 3, iclass 35, count 2 2006.229.22:31:24.35#ibcon#about to read 4, iclass 35, count 2 2006.229.22:31:24.35#ibcon#read 4, iclass 35, count 2 2006.229.22:31:24.35#ibcon#about to read 5, iclass 35, count 2 2006.229.22:31:24.35#ibcon#read 5, iclass 35, count 2 2006.229.22:31:24.35#ibcon#about to read 6, iclass 35, count 2 2006.229.22:31:24.35#ibcon#read 6, iclass 35, count 2 2006.229.22:31:24.35#ibcon#end of sib2, iclass 35, count 2 2006.229.22:31:24.35#ibcon#*after write, iclass 35, count 2 2006.229.22:31:24.35#ibcon#*before return 0, iclass 35, count 2 2006.229.22:31:24.35#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:24.35#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:31:24.35#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.22:31:24.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:24.35#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:24.47#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:24.47#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:24.47#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:31:24.47#ibcon#first serial, iclass 35, count 0 2006.229.22:31:24.47#ibcon#enter sib2, iclass 35, count 0 2006.229.22:31:24.47#ibcon#flushed, iclass 35, count 0 2006.229.22:31:24.47#ibcon#about to write, iclass 35, count 0 2006.229.22:31:24.47#ibcon#wrote, iclass 35, count 0 2006.229.22:31:24.47#ibcon#about to read 3, iclass 35, count 0 2006.229.22:31:24.49#ibcon#read 3, iclass 35, count 0 2006.229.22:31:24.49#ibcon#about to read 4, iclass 35, count 0 2006.229.22:31:24.49#ibcon#read 4, iclass 35, count 0 2006.229.22:31:24.49#ibcon#about to read 5, iclass 35, count 0 2006.229.22:31:24.49#ibcon#read 5, iclass 35, count 0 2006.229.22:31:24.49#ibcon#about to read 6, iclass 35, count 0 2006.229.22:31:24.49#ibcon#read 6, iclass 35, count 0 2006.229.22:31:24.49#ibcon#end of sib2, iclass 35, count 0 2006.229.22:31:24.49#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:31:24.49#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:31:24.49#ibcon#[27=USB\r\n] 2006.229.22:31:24.49#ibcon#*before write, iclass 35, count 0 2006.229.22:31:24.49#ibcon#enter sib2, iclass 35, count 0 2006.229.22:31:24.49#ibcon#flushed, iclass 35, count 0 2006.229.22:31:24.49#ibcon#about to write, iclass 35, count 0 2006.229.22:31:24.49#ibcon#wrote, iclass 35, count 0 2006.229.22:31:24.49#ibcon#about to read 3, iclass 35, count 0 2006.229.22:31:24.52#ibcon#read 3, iclass 35, count 0 2006.229.22:31:24.52#ibcon#about to read 4, iclass 35, count 0 2006.229.22:31:24.52#ibcon#read 4, iclass 35, count 0 2006.229.22:31:24.52#ibcon#about to read 5, iclass 35, count 0 2006.229.22:31:24.52#ibcon#read 5, iclass 35, count 0 2006.229.22:31:24.52#ibcon#about to read 6, iclass 35, count 0 2006.229.22:31:24.52#ibcon#read 6, iclass 35, count 0 2006.229.22:31:24.52#ibcon#end of sib2, iclass 35, count 0 2006.229.22:31:24.52#ibcon#*after write, iclass 35, count 0 2006.229.22:31:24.52#ibcon#*before return 0, iclass 35, count 0 2006.229.22:31:24.52#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:24.52#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:31:24.52#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:31:24.52#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:31:24.52$vck44/vblo=6,719.99 2006.229.22:31:24.52#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.22:31:24.52#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.22:31:24.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:24.52#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:24.52#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:24.52#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:24.52#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:31:24.52#ibcon#first serial, iclass 37, count 0 2006.229.22:31:24.52#ibcon#enter sib2, iclass 37, count 0 2006.229.22:31:24.52#ibcon#flushed, iclass 37, count 0 2006.229.22:31:24.52#ibcon#about to write, iclass 37, count 0 2006.229.22:31:24.52#ibcon#wrote, iclass 37, count 0 2006.229.22:31:24.52#ibcon#about to read 3, iclass 37, count 0 2006.229.22:31:24.54#ibcon#read 3, iclass 37, count 0 2006.229.22:31:24.54#ibcon#about to read 4, iclass 37, count 0 2006.229.22:31:24.54#ibcon#read 4, iclass 37, count 0 2006.229.22:31:24.54#ibcon#about to read 5, iclass 37, count 0 2006.229.22:31:24.54#ibcon#read 5, iclass 37, count 0 2006.229.22:31:24.54#ibcon#about to read 6, iclass 37, count 0 2006.229.22:31:24.54#ibcon#read 6, iclass 37, count 0 2006.229.22:31:24.54#ibcon#end of sib2, iclass 37, count 0 2006.229.22:31:24.54#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:31:24.54#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:31:24.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:31:24.54#ibcon#*before write, iclass 37, count 0 2006.229.22:31:24.54#ibcon#enter sib2, iclass 37, count 0 2006.229.22:31:24.54#ibcon#flushed, iclass 37, count 0 2006.229.22:31:24.54#ibcon#about to write, iclass 37, count 0 2006.229.22:31:24.54#ibcon#wrote, iclass 37, count 0 2006.229.22:31:24.54#ibcon#about to read 3, iclass 37, count 0 2006.229.22:31:24.58#ibcon#read 3, iclass 37, count 0 2006.229.22:31:24.58#ibcon#about to read 4, iclass 37, count 0 2006.229.22:31:24.58#ibcon#read 4, iclass 37, count 0 2006.229.22:31:24.58#ibcon#about to read 5, iclass 37, count 0 2006.229.22:31:24.58#ibcon#read 5, iclass 37, count 0 2006.229.22:31:24.58#ibcon#about to read 6, iclass 37, count 0 2006.229.22:31:24.58#ibcon#read 6, iclass 37, count 0 2006.229.22:31:24.58#ibcon#end of sib2, iclass 37, count 0 2006.229.22:31:24.58#ibcon#*after write, iclass 37, count 0 2006.229.22:31:24.58#ibcon#*before return 0, iclass 37, count 0 2006.229.22:31:24.58#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:24.58#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:31:24.58#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:31:24.58#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:31:24.58$vck44/vb=6,4 2006.229.22:31:24.58#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.22:31:24.58#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.22:31:24.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:24.58#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:24.64#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:24.64#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:24.64#ibcon#enter wrdev, iclass 39, count 2 2006.229.22:31:24.64#ibcon#first serial, iclass 39, count 2 2006.229.22:31:24.64#ibcon#enter sib2, iclass 39, count 2 2006.229.22:31:24.64#ibcon#flushed, iclass 39, count 2 2006.229.22:31:24.64#ibcon#about to write, iclass 39, count 2 2006.229.22:31:24.64#ibcon#wrote, iclass 39, count 2 2006.229.22:31:24.64#ibcon#about to read 3, iclass 39, count 2 2006.229.22:31:24.66#ibcon#read 3, iclass 39, count 2 2006.229.22:31:24.66#ibcon#about to read 4, iclass 39, count 2 2006.229.22:31:24.66#ibcon#read 4, iclass 39, count 2 2006.229.22:31:24.66#ibcon#about to read 5, iclass 39, count 2 2006.229.22:31:24.66#ibcon#read 5, iclass 39, count 2 2006.229.22:31:24.66#ibcon#about to read 6, iclass 39, count 2 2006.229.22:31:24.66#ibcon#read 6, iclass 39, count 2 2006.229.22:31:24.66#ibcon#end of sib2, iclass 39, count 2 2006.229.22:31:24.66#ibcon#*mode == 0, iclass 39, count 2 2006.229.22:31:24.66#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.22:31:24.66#ibcon#[27=AT06-04\r\n] 2006.229.22:31:24.66#ibcon#*before write, iclass 39, count 2 2006.229.22:31:24.66#ibcon#enter sib2, iclass 39, count 2 2006.229.22:31:24.66#ibcon#flushed, iclass 39, count 2 2006.229.22:31:24.66#ibcon#about to write, iclass 39, count 2 2006.229.22:31:24.66#ibcon#wrote, iclass 39, count 2 2006.229.22:31:24.66#ibcon#about to read 3, iclass 39, count 2 2006.229.22:31:24.69#ibcon#read 3, iclass 39, count 2 2006.229.22:31:24.69#ibcon#about to read 4, iclass 39, count 2 2006.229.22:31:24.69#ibcon#read 4, iclass 39, count 2 2006.229.22:31:24.69#ibcon#about to read 5, iclass 39, count 2 2006.229.22:31:24.69#ibcon#read 5, iclass 39, count 2 2006.229.22:31:24.69#ibcon#about to read 6, iclass 39, count 2 2006.229.22:31:24.69#ibcon#read 6, iclass 39, count 2 2006.229.22:31:24.69#ibcon#end of sib2, iclass 39, count 2 2006.229.22:31:24.69#ibcon#*after write, iclass 39, count 2 2006.229.22:31:24.69#ibcon#*before return 0, iclass 39, count 2 2006.229.22:31:24.69#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:24.69#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:31:24.69#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.22:31:24.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:24.69#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:24.81#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:24.81#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:24.81#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:31:24.81#ibcon#first serial, iclass 39, count 0 2006.229.22:31:24.81#ibcon#enter sib2, iclass 39, count 0 2006.229.22:31:24.81#ibcon#flushed, iclass 39, count 0 2006.229.22:31:24.81#ibcon#about to write, iclass 39, count 0 2006.229.22:31:24.81#ibcon#wrote, iclass 39, count 0 2006.229.22:31:24.81#ibcon#about to read 3, iclass 39, count 0 2006.229.22:31:24.83#ibcon#read 3, iclass 39, count 0 2006.229.22:31:24.83#ibcon#about to read 4, iclass 39, count 0 2006.229.22:31:24.83#ibcon#read 4, iclass 39, count 0 2006.229.22:31:24.83#ibcon#about to read 5, iclass 39, count 0 2006.229.22:31:24.83#ibcon#read 5, iclass 39, count 0 2006.229.22:31:24.83#ibcon#about to read 6, iclass 39, count 0 2006.229.22:31:24.83#ibcon#read 6, iclass 39, count 0 2006.229.22:31:24.83#ibcon#end of sib2, iclass 39, count 0 2006.229.22:31:24.83#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:31:24.83#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:31:24.83#ibcon#[27=USB\r\n] 2006.229.22:31:24.83#ibcon#*before write, iclass 39, count 0 2006.229.22:31:24.83#ibcon#enter sib2, iclass 39, count 0 2006.229.22:31:24.83#ibcon#flushed, iclass 39, count 0 2006.229.22:31:24.83#ibcon#about to write, iclass 39, count 0 2006.229.22:31:24.83#ibcon#wrote, iclass 39, count 0 2006.229.22:31:24.83#ibcon#about to read 3, iclass 39, count 0 2006.229.22:31:24.86#ibcon#read 3, iclass 39, count 0 2006.229.22:31:24.86#ibcon#about to read 4, iclass 39, count 0 2006.229.22:31:24.86#ibcon#read 4, iclass 39, count 0 2006.229.22:31:24.86#ibcon#about to read 5, iclass 39, count 0 2006.229.22:31:24.86#ibcon#read 5, iclass 39, count 0 2006.229.22:31:24.86#ibcon#about to read 6, iclass 39, count 0 2006.229.22:31:24.86#ibcon#read 6, iclass 39, count 0 2006.229.22:31:24.86#ibcon#end of sib2, iclass 39, count 0 2006.229.22:31:24.86#ibcon#*after write, iclass 39, count 0 2006.229.22:31:24.86#ibcon#*before return 0, iclass 39, count 0 2006.229.22:31:24.86#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:24.86#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:31:24.86#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:31:24.86#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:31:24.86$vck44/vblo=7,734.99 2006.229.22:31:24.86#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.22:31:24.86#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.22:31:24.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:24.86#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:24.86#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:24.86#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:24.86#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:31:24.86#ibcon#first serial, iclass 3, count 0 2006.229.22:31:24.86#ibcon#enter sib2, iclass 3, count 0 2006.229.22:31:24.86#ibcon#flushed, iclass 3, count 0 2006.229.22:31:24.86#ibcon#about to write, iclass 3, count 0 2006.229.22:31:24.86#ibcon#wrote, iclass 3, count 0 2006.229.22:31:24.86#ibcon#about to read 3, iclass 3, count 0 2006.229.22:31:24.88#ibcon#read 3, iclass 3, count 0 2006.229.22:31:24.88#ibcon#about to read 4, iclass 3, count 0 2006.229.22:31:24.88#ibcon#read 4, iclass 3, count 0 2006.229.22:31:24.88#ibcon#about to read 5, iclass 3, count 0 2006.229.22:31:24.88#ibcon#read 5, iclass 3, count 0 2006.229.22:31:24.88#ibcon#about to read 6, iclass 3, count 0 2006.229.22:31:24.88#ibcon#read 6, iclass 3, count 0 2006.229.22:31:24.88#ibcon#end of sib2, iclass 3, count 0 2006.229.22:31:24.88#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:31:24.88#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:31:24.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:31:24.88#ibcon#*before write, iclass 3, count 0 2006.229.22:31:24.88#ibcon#enter sib2, iclass 3, count 0 2006.229.22:31:24.88#ibcon#flushed, iclass 3, count 0 2006.229.22:31:24.88#ibcon#about to write, iclass 3, count 0 2006.229.22:31:24.88#ibcon#wrote, iclass 3, count 0 2006.229.22:31:24.88#ibcon#about to read 3, iclass 3, count 0 2006.229.22:31:24.92#ibcon#read 3, iclass 3, count 0 2006.229.22:31:24.92#ibcon#about to read 4, iclass 3, count 0 2006.229.22:31:24.92#ibcon#read 4, iclass 3, count 0 2006.229.22:31:24.92#ibcon#about to read 5, iclass 3, count 0 2006.229.22:31:24.92#ibcon#read 5, iclass 3, count 0 2006.229.22:31:24.92#ibcon#about to read 6, iclass 3, count 0 2006.229.22:31:24.92#ibcon#read 6, iclass 3, count 0 2006.229.22:31:24.92#ibcon#end of sib2, iclass 3, count 0 2006.229.22:31:24.92#ibcon#*after write, iclass 3, count 0 2006.229.22:31:24.92#ibcon#*before return 0, iclass 3, count 0 2006.229.22:31:24.92#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:24.92#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:31:24.92#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:31:24.92#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:31:24.92$vck44/vb=7,4 2006.229.22:31:24.92#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.22:31:24.92#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.22:31:24.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:24.92#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:24.98#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:24.98#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:24.98#ibcon#enter wrdev, iclass 5, count 2 2006.229.22:31:24.98#ibcon#first serial, iclass 5, count 2 2006.229.22:31:24.98#ibcon#enter sib2, iclass 5, count 2 2006.229.22:31:24.98#ibcon#flushed, iclass 5, count 2 2006.229.22:31:24.98#ibcon#about to write, iclass 5, count 2 2006.229.22:31:24.98#ibcon#wrote, iclass 5, count 2 2006.229.22:31:24.98#ibcon#about to read 3, iclass 5, count 2 2006.229.22:31:25.00#ibcon#read 3, iclass 5, count 2 2006.229.22:31:25.00#ibcon#about to read 4, iclass 5, count 2 2006.229.22:31:25.00#ibcon#read 4, iclass 5, count 2 2006.229.22:31:25.00#ibcon#about to read 5, iclass 5, count 2 2006.229.22:31:25.00#ibcon#read 5, iclass 5, count 2 2006.229.22:31:25.00#ibcon#about to read 6, iclass 5, count 2 2006.229.22:31:25.00#ibcon#read 6, iclass 5, count 2 2006.229.22:31:25.00#ibcon#end of sib2, iclass 5, count 2 2006.229.22:31:25.00#ibcon#*mode == 0, iclass 5, count 2 2006.229.22:31:25.00#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.22:31:25.00#ibcon#[27=AT07-04\r\n] 2006.229.22:31:25.00#ibcon#*before write, iclass 5, count 2 2006.229.22:31:25.00#ibcon#enter sib2, iclass 5, count 2 2006.229.22:31:25.00#ibcon#flushed, iclass 5, count 2 2006.229.22:31:25.00#ibcon#about to write, iclass 5, count 2 2006.229.22:31:25.00#ibcon#wrote, iclass 5, count 2 2006.229.22:31:25.00#ibcon#about to read 3, iclass 5, count 2 2006.229.22:31:25.03#ibcon#read 3, iclass 5, count 2 2006.229.22:31:25.03#ibcon#about to read 4, iclass 5, count 2 2006.229.22:31:25.03#ibcon#read 4, iclass 5, count 2 2006.229.22:31:25.03#ibcon#about to read 5, iclass 5, count 2 2006.229.22:31:25.03#ibcon#read 5, iclass 5, count 2 2006.229.22:31:25.03#ibcon#about to read 6, iclass 5, count 2 2006.229.22:31:25.03#ibcon#read 6, iclass 5, count 2 2006.229.22:31:25.03#ibcon#end of sib2, iclass 5, count 2 2006.229.22:31:25.03#ibcon#*after write, iclass 5, count 2 2006.229.22:31:25.03#ibcon#*before return 0, iclass 5, count 2 2006.229.22:31:25.03#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:25.03#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:31:25.03#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.22:31:25.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:25.03#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:25.15#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:25.15#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:25.15#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:31:25.15#ibcon#first serial, iclass 5, count 0 2006.229.22:31:25.15#ibcon#enter sib2, iclass 5, count 0 2006.229.22:31:25.15#ibcon#flushed, iclass 5, count 0 2006.229.22:31:25.15#ibcon#about to write, iclass 5, count 0 2006.229.22:31:25.15#ibcon#wrote, iclass 5, count 0 2006.229.22:31:25.15#ibcon#about to read 3, iclass 5, count 0 2006.229.22:31:25.17#ibcon#read 3, iclass 5, count 0 2006.229.22:31:25.17#ibcon#about to read 4, iclass 5, count 0 2006.229.22:31:25.17#ibcon#read 4, iclass 5, count 0 2006.229.22:31:25.17#ibcon#about to read 5, iclass 5, count 0 2006.229.22:31:25.17#ibcon#read 5, iclass 5, count 0 2006.229.22:31:25.17#ibcon#about to read 6, iclass 5, count 0 2006.229.22:31:25.17#ibcon#read 6, iclass 5, count 0 2006.229.22:31:25.17#ibcon#end of sib2, iclass 5, count 0 2006.229.22:31:25.17#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:31:25.17#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:31:25.17#ibcon#[27=USB\r\n] 2006.229.22:31:25.17#ibcon#*before write, iclass 5, count 0 2006.229.22:31:25.17#ibcon#enter sib2, iclass 5, count 0 2006.229.22:31:25.17#ibcon#flushed, iclass 5, count 0 2006.229.22:31:25.17#ibcon#about to write, iclass 5, count 0 2006.229.22:31:25.17#ibcon#wrote, iclass 5, count 0 2006.229.22:31:25.17#ibcon#about to read 3, iclass 5, count 0 2006.229.22:31:25.20#ibcon#read 3, iclass 5, count 0 2006.229.22:31:25.20#ibcon#about to read 4, iclass 5, count 0 2006.229.22:31:25.20#ibcon#read 4, iclass 5, count 0 2006.229.22:31:25.20#ibcon#about to read 5, iclass 5, count 0 2006.229.22:31:25.20#ibcon#read 5, iclass 5, count 0 2006.229.22:31:25.20#ibcon#about to read 6, iclass 5, count 0 2006.229.22:31:25.20#ibcon#read 6, iclass 5, count 0 2006.229.22:31:25.20#ibcon#end of sib2, iclass 5, count 0 2006.229.22:31:25.20#ibcon#*after write, iclass 5, count 0 2006.229.22:31:25.20#ibcon#*before return 0, iclass 5, count 0 2006.229.22:31:25.20#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:25.20#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:31:25.20#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:31:25.20#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:31:25.20$vck44/vblo=8,744.99 2006.229.22:31:25.20#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.22:31:25.20#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.22:31:25.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:31:25.20#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:25.20#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:25.20#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:25.20#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:31:25.20#ibcon#first serial, iclass 7, count 0 2006.229.22:31:25.20#ibcon#enter sib2, iclass 7, count 0 2006.229.22:31:25.20#ibcon#flushed, iclass 7, count 0 2006.229.22:31:25.20#ibcon#about to write, iclass 7, count 0 2006.229.22:31:25.20#ibcon#wrote, iclass 7, count 0 2006.229.22:31:25.20#ibcon#about to read 3, iclass 7, count 0 2006.229.22:31:25.22#ibcon#read 3, iclass 7, count 0 2006.229.22:31:25.22#ibcon#about to read 4, iclass 7, count 0 2006.229.22:31:25.22#ibcon#read 4, iclass 7, count 0 2006.229.22:31:25.22#ibcon#about to read 5, iclass 7, count 0 2006.229.22:31:25.22#ibcon#read 5, iclass 7, count 0 2006.229.22:31:25.22#ibcon#about to read 6, iclass 7, count 0 2006.229.22:31:25.22#ibcon#read 6, iclass 7, count 0 2006.229.22:31:25.22#ibcon#end of sib2, iclass 7, count 0 2006.229.22:31:25.22#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:31:25.22#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:31:25.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:31:25.22#ibcon#*before write, iclass 7, count 0 2006.229.22:31:25.22#ibcon#enter sib2, iclass 7, count 0 2006.229.22:31:25.22#ibcon#flushed, iclass 7, count 0 2006.229.22:31:25.22#ibcon#about to write, iclass 7, count 0 2006.229.22:31:25.22#ibcon#wrote, iclass 7, count 0 2006.229.22:31:25.22#ibcon#about to read 3, iclass 7, count 0 2006.229.22:31:25.26#ibcon#read 3, iclass 7, count 0 2006.229.22:31:25.26#ibcon#about to read 4, iclass 7, count 0 2006.229.22:31:25.26#ibcon#read 4, iclass 7, count 0 2006.229.22:31:25.26#ibcon#about to read 5, iclass 7, count 0 2006.229.22:31:25.26#ibcon#read 5, iclass 7, count 0 2006.229.22:31:25.26#ibcon#about to read 6, iclass 7, count 0 2006.229.22:31:25.26#ibcon#read 6, iclass 7, count 0 2006.229.22:31:25.26#ibcon#end of sib2, iclass 7, count 0 2006.229.22:31:25.26#ibcon#*after write, iclass 7, count 0 2006.229.22:31:25.26#ibcon#*before return 0, iclass 7, count 0 2006.229.22:31:25.26#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:25.26#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:31:25.26#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:31:25.26#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:31:25.26$vck44/vb=8,4 2006.229.22:31:25.26#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.22:31:25.26#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.22:31:25.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:31:25.26#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:25.32#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:25.32#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:25.32#ibcon#enter wrdev, iclass 11, count 2 2006.229.22:31:25.32#ibcon#first serial, iclass 11, count 2 2006.229.22:31:25.32#ibcon#enter sib2, iclass 11, count 2 2006.229.22:31:25.32#ibcon#flushed, iclass 11, count 2 2006.229.22:31:25.32#ibcon#about to write, iclass 11, count 2 2006.229.22:31:25.32#ibcon#wrote, iclass 11, count 2 2006.229.22:31:25.32#ibcon#about to read 3, iclass 11, count 2 2006.229.22:31:25.34#ibcon#read 3, iclass 11, count 2 2006.229.22:31:25.34#ibcon#about to read 4, iclass 11, count 2 2006.229.22:31:25.34#ibcon#read 4, iclass 11, count 2 2006.229.22:31:25.34#ibcon#about to read 5, iclass 11, count 2 2006.229.22:31:25.34#ibcon#read 5, iclass 11, count 2 2006.229.22:31:25.34#ibcon#about to read 6, iclass 11, count 2 2006.229.22:31:25.34#ibcon#read 6, iclass 11, count 2 2006.229.22:31:25.34#ibcon#end of sib2, iclass 11, count 2 2006.229.22:31:25.34#ibcon#*mode == 0, iclass 11, count 2 2006.229.22:31:25.34#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.22:31:25.34#ibcon#[27=AT08-04\r\n] 2006.229.22:31:25.34#ibcon#*before write, iclass 11, count 2 2006.229.22:31:25.34#ibcon#enter sib2, iclass 11, count 2 2006.229.22:31:25.34#ibcon#flushed, iclass 11, count 2 2006.229.22:31:25.34#ibcon#about to write, iclass 11, count 2 2006.229.22:31:25.34#ibcon#wrote, iclass 11, count 2 2006.229.22:31:25.34#ibcon#about to read 3, iclass 11, count 2 2006.229.22:31:25.37#ibcon#read 3, iclass 11, count 2 2006.229.22:31:25.37#ibcon#about to read 4, iclass 11, count 2 2006.229.22:31:25.37#ibcon#read 4, iclass 11, count 2 2006.229.22:31:25.37#ibcon#about to read 5, iclass 11, count 2 2006.229.22:31:25.37#ibcon#read 5, iclass 11, count 2 2006.229.22:31:25.37#ibcon#about to read 6, iclass 11, count 2 2006.229.22:31:25.37#ibcon#read 6, iclass 11, count 2 2006.229.22:31:25.37#ibcon#end of sib2, iclass 11, count 2 2006.229.22:31:25.37#ibcon#*after write, iclass 11, count 2 2006.229.22:31:25.37#ibcon#*before return 0, iclass 11, count 2 2006.229.22:31:25.37#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:25.37#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:31:25.37#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.22:31:25.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:31:25.37#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:25.49#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:25.49#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:25.49#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:31:25.49#ibcon#first serial, iclass 11, count 0 2006.229.22:31:25.49#ibcon#enter sib2, iclass 11, count 0 2006.229.22:31:25.49#ibcon#flushed, iclass 11, count 0 2006.229.22:31:25.49#ibcon#about to write, iclass 11, count 0 2006.229.22:31:25.49#ibcon#wrote, iclass 11, count 0 2006.229.22:31:25.49#ibcon#about to read 3, iclass 11, count 0 2006.229.22:31:25.51#ibcon#read 3, iclass 11, count 0 2006.229.22:31:25.51#ibcon#about to read 4, iclass 11, count 0 2006.229.22:31:25.51#ibcon#read 4, iclass 11, count 0 2006.229.22:31:25.51#ibcon#about to read 5, iclass 11, count 0 2006.229.22:31:25.51#ibcon#read 5, iclass 11, count 0 2006.229.22:31:25.51#ibcon#about to read 6, iclass 11, count 0 2006.229.22:31:25.51#ibcon#read 6, iclass 11, count 0 2006.229.22:31:25.51#ibcon#end of sib2, iclass 11, count 0 2006.229.22:31:25.51#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:31:25.51#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:31:25.51#ibcon#[27=USB\r\n] 2006.229.22:31:25.51#ibcon#*before write, iclass 11, count 0 2006.229.22:31:25.51#ibcon#enter sib2, iclass 11, count 0 2006.229.22:31:25.51#ibcon#flushed, iclass 11, count 0 2006.229.22:31:25.51#ibcon#about to write, iclass 11, count 0 2006.229.22:31:25.51#ibcon#wrote, iclass 11, count 0 2006.229.22:31:25.51#ibcon#about to read 3, iclass 11, count 0 2006.229.22:31:25.54#ibcon#read 3, iclass 11, count 0 2006.229.22:31:25.54#ibcon#about to read 4, iclass 11, count 0 2006.229.22:31:25.54#ibcon#read 4, iclass 11, count 0 2006.229.22:31:25.54#ibcon#about to read 5, iclass 11, count 0 2006.229.22:31:25.54#ibcon#read 5, iclass 11, count 0 2006.229.22:31:25.54#ibcon#about to read 6, iclass 11, count 0 2006.229.22:31:25.54#ibcon#read 6, iclass 11, count 0 2006.229.22:31:25.54#ibcon#end of sib2, iclass 11, count 0 2006.229.22:31:25.54#ibcon#*after write, iclass 11, count 0 2006.229.22:31:25.54#ibcon#*before return 0, iclass 11, count 0 2006.229.22:31:25.54#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:25.54#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:31:25.54#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:31:25.54#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:31:25.54$vck44/vabw=wide 2006.229.22:31:25.54#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.22:31:25.54#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.22:31:25.54#ibcon#ireg 8 cls_cnt 0 2006.229.22:31:25.54#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:25.54#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:25.54#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:25.54#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:31:25.54#ibcon#first serial, iclass 13, count 0 2006.229.22:31:25.54#ibcon#enter sib2, iclass 13, count 0 2006.229.22:31:25.54#ibcon#flushed, iclass 13, count 0 2006.229.22:31:25.54#ibcon#about to write, iclass 13, count 0 2006.229.22:31:25.54#ibcon#wrote, iclass 13, count 0 2006.229.22:31:25.54#ibcon#about to read 3, iclass 13, count 0 2006.229.22:31:25.56#ibcon#read 3, iclass 13, count 0 2006.229.22:31:25.56#ibcon#about to read 4, iclass 13, count 0 2006.229.22:31:25.56#ibcon#read 4, iclass 13, count 0 2006.229.22:31:25.56#ibcon#about to read 5, iclass 13, count 0 2006.229.22:31:25.56#ibcon#read 5, iclass 13, count 0 2006.229.22:31:25.56#ibcon#about to read 6, iclass 13, count 0 2006.229.22:31:25.56#ibcon#read 6, iclass 13, count 0 2006.229.22:31:25.56#ibcon#end of sib2, iclass 13, count 0 2006.229.22:31:25.56#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:31:25.56#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:31:25.56#ibcon#[25=BW32\r\n] 2006.229.22:31:25.56#ibcon#*before write, iclass 13, count 0 2006.229.22:31:25.56#ibcon#enter sib2, iclass 13, count 0 2006.229.22:31:25.56#ibcon#flushed, iclass 13, count 0 2006.229.22:31:25.56#ibcon#about to write, iclass 13, count 0 2006.229.22:31:25.56#ibcon#wrote, iclass 13, count 0 2006.229.22:31:25.56#ibcon#about to read 3, iclass 13, count 0 2006.229.22:31:25.59#ibcon#read 3, iclass 13, count 0 2006.229.22:31:25.59#ibcon#about to read 4, iclass 13, count 0 2006.229.22:31:25.59#ibcon#read 4, iclass 13, count 0 2006.229.22:31:25.59#ibcon#about to read 5, iclass 13, count 0 2006.229.22:31:25.59#ibcon#read 5, iclass 13, count 0 2006.229.22:31:25.59#ibcon#about to read 6, iclass 13, count 0 2006.229.22:31:25.59#ibcon#read 6, iclass 13, count 0 2006.229.22:31:25.59#ibcon#end of sib2, iclass 13, count 0 2006.229.22:31:25.59#ibcon#*after write, iclass 13, count 0 2006.229.22:31:25.59#ibcon#*before return 0, iclass 13, count 0 2006.229.22:31:25.59#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:25.59#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:31:25.59#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:31:25.59#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:31:25.59$vck44/vbbw=wide 2006.229.22:31:25.59#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.22:31:25.59#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.22:31:25.59#ibcon#ireg 8 cls_cnt 0 2006.229.22:31:25.59#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:31:25.66#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:31:25.66#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:31:25.66#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:31:25.66#ibcon#first serial, iclass 15, count 0 2006.229.22:31:25.66#ibcon#enter sib2, iclass 15, count 0 2006.229.22:31:25.66#ibcon#flushed, iclass 15, count 0 2006.229.22:31:25.66#ibcon#about to write, iclass 15, count 0 2006.229.22:31:25.66#ibcon#wrote, iclass 15, count 0 2006.229.22:31:25.66#ibcon#about to read 3, iclass 15, count 0 2006.229.22:31:25.68#ibcon#read 3, iclass 15, count 0 2006.229.22:31:25.68#ibcon#about to read 4, iclass 15, count 0 2006.229.22:31:25.68#ibcon#read 4, iclass 15, count 0 2006.229.22:31:25.68#ibcon#about to read 5, iclass 15, count 0 2006.229.22:31:25.68#ibcon#read 5, iclass 15, count 0 2006.229.22:31:25.68#ibcon#about to read 6, iclass 15, count 0 2006.229.22:31:25.68#ibcon#read 6, iclass 15, count 0 2006.229.22:31:25.68#ibcon#end of sib2, iclass 15, count 0 2006.229.22:31:25.68#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:31:25.68#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:31:25.68#ibcon#[27=BW32\r\n] 2006.229.22:31:25.68#ibcon#*before write, iclass 15, count 0 2006.229.22:31:25.68#ibcon#enter sib2, iclass 15, count 0 2006.229.22:31:25.68#ibcon#flushed, iclass 15, count 0 2006.229.22:31:25.68#ibcon#about to write, iclass 15, count 0 2006.229.22:31:25.68#ibcon#wrote, iclass 15, count 0 2006.229.22:31:25.68#ibcon#about to read 3, iclass 15, count 0 2006.229.22:31:25.71#ibcon#read 3, iclass 15, count 0 2006.229.22:31:25.71#ibcon#about to read 4, iclass 15, count 0 2006.229.22:31:25.71#ibcon#read 4, iclass 15, count 0 2006.229.22:31:25.71#ibcon#about to read 5, iclass 15, count 0 2006.229.22:31:25.71#ibcon#read 5, iclass 15, count 0 2006.229.22:31:25.71#ibcon#about to read 6, iclass 15, count 0 2006.229.22:31:25.71#ibcon#read 6, iclass 15, count 0 2006.229.22:31:25.71#ibcon#end of sib2, iclass 15, count 0 2006.229.22:31:25.71#ibcon#*after write, iclass 15, count 0 2006.229.22:31:25.71#ibcon#*before return 0, iclass 15, count 0 2006.229.22:31:25.71#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:31:25.71#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:31:25.71#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:31:25.71#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:31:25.71$setupk4/ifdk4 2006.229.22:31:25.71$ifdk4/lo= 2006.229.22:31:25.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:31:25.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:31:25.71$ifdk4/patch= 2006.229.22:31:25.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:31:25.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:31:25.71$setupk4/!*+20s 2006.229.22:31:33.92#abcon#<5=/09 1.5 4.6 28.60 921002.5\r\n> 2006.229.22:31:33.94#abcon#{5=INTERFACE CLEAR} 2006.229.22:31:34.00#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:31:40.21$setupk4/"tpicd 2006.229.22:31:40.21$setupk4/echo=off 2006.229.22:31:40.21$setupk4/xlog=off 2006.229.22:31:40.21:!2006.229.22:34:46 2006.229.22:31:43.14#trakl#Source acquired 2006.229.22:31:43.14#flagr#flagr/antenna,acquired 2006.229.22:34:46.00:preob 2006.229.22:34:47.14/onsource/TRACKING 2006.229.22:34:47.14:!2006.229.22:34:56 2006.229.22:34:56.00:"tape 2006.229.22:34:56.00:"st=record 2006.229.22:34:56.00:data_valid=on 2006.229.22:34:56.00:midob 2006.229.22:34:56.14/onsource/TRACKING 2006.229.22:34:56.14/wx/28.68,1002.5,92 2006.229.22:34:56.35/cable/+6.4164E-03 2006.229.22:34:57.44/va/01,08,usb,yes,29,31 2006.229.22:34:57.44/va/02,07,usb,yes,32,32 2006.229.22:34:57.44/va/03,06,usb,yes,39,42 2006.229.22:34:57.44/va/04,07,usb,yes,33,34 2006.229.22:34:57.44/va/05,04,usb,yes,29,29 2006.229.22:34:57.44/va/06,04,usb,yes,33,32 2006.229.22:34:57.44/va/07,05,usb,yes,29,29 2006.229.22:34:57.44/va/08,06,usb,yes,21,26 2006.229.22:34:57.67/valo/01,524.99,yes,locked 2006.229.22:34:57.67/valo/02,534.99,yes,locked 2006.229.22:34:57.67/valo/03,564.99,yes,locked 2006.229.22:34:57.67/valo/04,624.99,yes,locked 2006.229.22:34:57.67/valo/05,734.99,yes,locked 2006.229.22:34:57.67/valo/06,814.99,yes,locked 2006.229.22:34:57.67/valo/07,864.99,yes,locked 2006.229.22:34:57.67/valo/08,884.99,yes,locked 2006.229.22:34:58.76/vb/01,04,usb,yes,31,29 2006.229.22:34:58.76/vb/02,04,usb,yes,33,33 2006.229.22:34:58.76/vb/03,04,usb,yes,30,33 2006.229.22:34:58.76/vb/04,04,usb,yes,35,33 2006.229.22:34:58.76/vb/05,04,usb,yes,27,29 2006.229.22:34:58.76/vb/06,04,usb,yes,31,27 2006.229.22:34:58.76/vb/07,04,usb,yes,31,31 2006.229.22:34:58.76/vb/08,04,usb,yes,29,32 2006.229.22:34:58.99/vblo/01,629.99,yes,locked 2006.229.22:34:58.99/vblo/02,634.99,yes,locked 2006.229.22:34:58.99/vblo/03,649.99,yes,locked 2006.229.22:34:58.99/vblo/04,679.99,yes,locked 2006.229.22:34:58.99/vblo/05,709.99,yes,locked 2006.229.22:34:58.99/vblo/06,719.99,yes,locked 2006.229.22:34:58.99/vblo/07,734.99,yes,locked 2006.229.22:34:58.99/vblo/08,744.99,yes,locked 2006.229.22:34:59.14/vabw/8 2006.229.22:34:59.29/vbbw/8 2006.229.22:34:59.38/xfe/off,on,12.2 2006.229.22:34:59.75/ifatt/23,28,28,28 2006.229.22:35:00.08/fmout-gps/S +4.53E-07 2006.229.22:35:00.12:!2006.229.22:37:26 2006.229.22:37:26.00:data_valid=off 2006.229.22:37:26.00:"et 2006.229.22:37:26.00:!+3s 2006.229.22:37:29.01:"tape 2006.229.22:37:29.01:postob 2006.229.22:37:29.09/cable/+6.4174E-03 2006.229.22:37:29.09/wx/28.78,1002.5,89 2006.229.22:37:30.08/fmout-gps/S +4.56E-07 2006.229.22:37:30.08:scan_name=229-2240,jd0608,310 2006.229.22:37:30.08:source=nrao150,035929.75,505750.2,2000.0,ccw 2006.229.22:37:30.13#flagr#flagr/antenna,new-source 2006.229.22:37:31.13:checkk5 2006.229.22:37:31.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:37:31.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:37:32.35/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:37:32.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:37:33.14/chk_obsdata//k5ts1/T2292234??a.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.22:37:33.54/chk_obsdata//k5ts2/T2292234??b.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.22:37:33.94/chk_obsdata//k5ts3/T2292234??c.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.22:37:34.34/chk_obsdata//k5ts4/T2292234??d.dat file size is correct (nominal:600MB, actual:596MB). 2006.229.22:37:35.07/k5log//k5ts1_log_newline 2006.229.22:37:35.79/k5log//k5ts2_log_newline 2006.229.22:37:36.50/k5log//k5ts3_log_newline 2006.229.22:37:37.20/k5log//k5ts4_log_newline 2006.229.22:37:37.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:37:37.22:setupk4=1 2006.229.22:37:37.22$setupk4/echo=on 2006.229.22:37:37.22$setupk4/pcalon 2006.229.22:37:37.22$pcalon/"no phase cal control is implemented here 2006.229.22:37:37.22$setupk4/"tpicd=stop 2006.229.22:37:37.22$setupk4/"rec=synch_on 2006.229.22:37:37.22$setupk4/"rec_mode=128 2006.229.22:37:37.22$setupk4/!* 2006.229.22:37:37.22$setupk4/recpk4 2006.229.22:37:37.22$recpk4/recpatch= 2006.229.22:37:37.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:37:37.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:37:37.23$setupk4/vck44 2006.229.22:37:37.23$vck44/valo=1,524.99 2006.229.22:37:37.23#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.22:37:37.23#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.22:37:37.23#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:37.23#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:37:37.23#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:37:37.23#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:37:37.23#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:37:37.23#ibcon#first serial, iclass 20, count 0 2006.229.22:37:37.23#ibcon#enter sib2, iclass 20, count 0 2006.229.22:37:37.23#ibcon#flushed, iclass 20, count 0 2006.229.22:37:37.23#ibcon#about to write, iclass 20, count 0 2006.229.22:37:37.23#ibcon#wrote, iclass 20, count 0 2006.229.22:37:37.23#ibcon#about to read 3, iclass 20, count 0 2006.229.22:37:37.25#ibcon#read 3, iclass 20, count 0 2006.229.22:37:37.25#ibcon#about to read 4, iclass 20, count 0 2006.229.22:37:37.25#ibcon#read 4, iclass 20, count 0 2006.229.22:37:37.25#ibcon#about to read 5, iclass 20, count 0 2006.229.22:37:37.25#ibcon#read 5, iclass 20, count 0 2006.229.22:37:37.25#ibcon#about to read 6, iclass 20, count 0 2006.229.22:37:37.25#ibcon#read 6, iclass 20, count 0 2006.229.22:37:37.25#ibcon#end of sib2, iclass 20, count 0 2006.229.22:37:37.25#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:37:37.25#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:37:37.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:37:37.25#ibcon#*before write, iclass 20, count 0 2006.229.22:37:37.25#ibcon#enter sib2, iclass 20, count 0 2006.229.22:37:37.25#ibcon#flushed, iclass 20, count 0 2006.229.22:37:37.25#ibcon#about to write, iclass 20, count 0 2006.229.22:37:37.25#ibcon#wrote, iclass 20, count 0 2006.229.22:37:37.25#ibcon#about to read 3, iclass 20, count 0 2006.229.22:37:37.30#ibcon#read 3, iclass 20, count 0 2006.229.22:37:37.30#ibcon#about to read 4, iclass 20, count 0 2006.229.22:37:37.30#ibcon#read 4, iclass 20, count 0 2006.229.22:37:37.30#ibcon#about to read 5, iclass 20, count 0 2006.229.22:37:37.30#ibcon#read 5, iclass 20, count 0 2006.229.22:37:37.30#ibcon#about to read 6, iclass 20, count 0 2006.229.22:37:37.30#ibcon#read 6, iclass 20, count 0 2006.229.22:37:37.30#ibcon#end of sib2, iclass 20, count 0 2006.229.22:37:37.30#ibcon#*after write, iclass 20, count 0 2006.229.22:37:37.30#ibcon#*before return 0, iclass 20, count 0 2006.229.22:37:37.30#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:37:37.30#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:37:37.30#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:37:37.30#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:37:37.30$vck44/va=1,8 2006.229.22:37:37.30#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.22:37:37.30#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.22:37:37.30#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:37.30#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:37:37.30#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:37:37.30#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:37:37.30#ibcon#enter wrdev, iclass 22, count 2 2006.229.22:37:37.30#ibcon#first serial, iclass 22, count 2 2006.229.22:37:37.30#ibcon#enter sib2, iclass 22, count 2 2006.229.22:37:37.30#ibcon#flushed, iclass 22, count 2 2006.229.22:37:37.30#ibcon#about to write, iclass 22, count 2 2006.229.22:37:37.30#ibcon#wrote, iclass 22, count 2 2006.229.22:37:37.30#ibcon#about to read 3, iclass 22, count 2 2006.229.22:37:37.32#ibcon#read 3, iclass 22, count 2 2006.229.22:37:37.32#ibcon#about to read 4, iclass 22, count 2 2006.229.22:37:37.32#ibcon#read 4, iclass 22, count 2 2006.229.22:37:37.32#ibcon#about to read 5, iclass 22, count 2 2006.229.22:37:37.32#ibcon#read 5, iclass 22, count 2 2006.229.22:37:37.32#ibcon#about to read 6, iclass 22, count 2 2006.229.22:37:37.32#ibcon#read 6, iclass 22, count 2 2006.229.22:37:37.32#ibcon#end of sib2, iclass 22, count 2 2006.229.22:37:37.32#ibcon#*mode == 0, iclass 22, count 2 2006.229.22:37:37.32#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.22:37:37.32#ibcon#[25=AT01-08\r\n] 2006.229.22:37:37.32#ibcon#*before write, iclass 22, count 2 2006.229.22:37:37.32#ibcon#enter sib2, iclass 22, count 2 2006.229.22:37:37.32#ibcon#flushed, iclass 22, count 2 2006.229.22:37:37.32#ibcon#about to write, iclass 22, count 2 2006.229.22:37:37.32#ibcon#wrote, iclass 22, count 2 2006.229.22:37:37.32#ibcon#about to read 3, iclass 22, count 2 2006.229.22:37:37.35#ibcon#read 3, iclass 22, count 2 2006.229.22:37:37.35#ibcon#about to read 4, iclass 22, count 2 2006.229.22:37:37.35#ibcon#read 4, iclass 22, count 2 2006.229.22:37:37.35#ibcon#about to read 5, iclass 22, count 2 2006.229.22:37:37.35#ibcon#read 5, iclass 22, count 2 2006.229.22:37:37.35#ibcon#about to read 6, iclass 22, count 2 2006.229.22:37:37.35#ibcon#read 6, iclass 22, count 2 2006.229.22:37:37.35#ibcon#end of sib2, iclass 22, count 2 2006.229.22:37:37.35#ibcon#*after write, iclass 22, count 2 2006.229.22:37:37.35#ibcon#*before return 0, iclass 22, count 2 2006.229.22:37:37.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:37:37.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:37:37.35#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.22:37:37.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:37.35#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:37:37.47#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:37:37.47#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:37:37.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:37:37.47#ibcon#first serial, iclass 22, count 0 2006.229.22:37:37.47#ibcon#enter sib2, iclass 22, count 0 2006.229.22:37:37.47#ibcon#flushed, iclass 22, count 0 2006.229.22:37:37.47#ibcon#about to write, iclass 22, count 0 2006.229.22:37:37.47#ibcon#wrote, iclass 22, count 0 2006.229.22:37:37.47#ibcon#about to read 3, iclass 22, count 0 2006.229.22:37:37.49#ibcon#read 3, iclass 22, count 0 2006.229.22:37:37.49#ibcon#about to read 4, iclass 22, count 0 2006.229.22:37:37.49#ibcon#read 4, iclass 22, count 0 2006.229.22:37:37.49#ibcon#about to read 5, iclass 22, count 0 2006.229.22:37:37.49#ibcon#read 5, iclass 22, count 0 2006.229.22:37:37.49#ibcon#about to read 6, iclass 22, count 0 2006.229.22:37:37.49#ibcon#read 6, iclass 22, count 0 2006.229.22:37:37.49#ibcon#end of sib2, iclass 22, count 0 2006.229.22:37:37.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:37:37.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:37:37.49#ibcon#[25=USB\r\n] 2006.229.22:37:37.49#ibcon#*before write, iclass 22, count 0 2006.229.22:37:37.49#ibcon#enter sib2, iclass 22, count 0 2006.229.22:37:37.49#ibcon#flushed, iclass 22, count 0 2006.229.22:37:37.49#ibcon#about to write, iclass 22, count 0 2006.229.22:37:37.49#ibcon#wrote, iclass 22, count 0 2006.229.22:37:37.49#ibcon#about to read 3, iclass 22, count 0 2006.229.22:37:37.52#ibcon#read 3, iclass 22, count 0 2006.229.22:37:37.52#ibcon#about to read 4, iclass 22, count 0 2006.229.22:37:37.52#ibcon#read 4, iclass 22, count 0 2006.229.22:37:37.52#ibcon#about to read 5, iclass 22, count 0 2006.229.22:37:37.52#ibcon#read 5, iclass 22, count 0 2006.229.22:37:37.52#ibcon#about to read 6, iclass 22, count 0 2006.229.22:37:37.52#ibcon#read 6, iclass 22, count 0 2006.229.22:37:37.52#ibcon#end of sib2, iclass 22, count 0 2006.229.22:37:37.52#ibcon#*after write, iclass 22, count 0 2006.229.22:37:37.52#ibcon#*before return 0, iclass 22, count 0 2006.229.22:37:37.52#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:37:37.52#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:37:37.52#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:37:37.52#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:37:37.52$vck44/valo=2,534.99 2006.229.22:37:37.52#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.22:37:37.52#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.22:37:37.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:37.52#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:37.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:37.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:37.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:37:37.52#ibcon#first serial, iclass 24, count 0 2006.229.22:37:37.52#ibcon#enter sib2, iclass 24, count 0 2006.229.22:37:37.52#ibcon#flushed, iclass 24, count 0 2006.229.22:37:37.52#ibcon#about to write, iclass 24, count 0 2006.229.22:37:37.52#ibcon#wrote, iclass 24, count 0 2006.229.22:37:37.52#ibcon#about to read 3, iclass 24, count 0 2006.229.22:37:37.54#ibcon#read 3, iclass 24, count 0 2006.229.22:37:37.54#ibcon#about to read 4, iclass 24, count 0 2006.229.22:37:37.54#ibcon#read 4, iclass 24, count 0 2006.229.22:37:37.54#ibcon#about to read 5, iclass 24, count 0 2006.229.22:37:37.54#ibcon#read 5, iclass 24, count 0 2006.229.22:37:37.54#ibcon#about to read 6, iclass 24, count 0 2006.229.22:37:37.54#ibcon#read 6, iclass 24, count 0 2006.229.22:37:37.54#ibcon#end of sib2, iclass 24, count 0 2006.229.22:37:37.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:37:37.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:37:37.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:37:37.54#ibcon#*before write, iclass 24, count 0 2006.229.22:37:37.54#ibcon#enter sib2, iclass 24, count 0 2006.229.22:37:37.54#ibcon#flushed, iclass 24, count 0 2006.229.22:37:37.54#ibcon#about to write, iclass 24, count 0 2006.229.22:37:37.54#ibcon#wrote, iclass 24, count 0 2006.229.22:37:37.54#ibcon#about to read 3, iclass 24, count 0 2006.229.22:37:37.58#ibcon#read 3, iclass 24, count 0 2006.229.22:37:37.58#ibcon#about to read 4, iclass 24, count 0 2006.229.22:37:37.58#ibcon#read 4, iclass 24, count 0 2006.229.22:37:37.58#ibcon#about to read 5, iclass 24, count 0 2006.229.22:37:37.58#ibcon#read 5, iclass 24, count 0 2006.229.22:37:37.58#ibcon#about to read 6, iclass 24, count 0 2006.229.22:37:37.58#ibcon#read 6, iclass 24, count 0 2006.229.22:37:37.58#ibcon#end of sib2, iclass 24, count 0 2006.229.22:37:37.58#ibcon#*after write, iclass 24, count 0 2006.229.22:37:37.58#ibcon#*before return 0, iclass 24, count 0 2006.229.22:37:37.58#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:37.58#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:37.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:37:37.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:37:37.58$vck44/va=2,7 2006.229.22:37:37.58#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.22:37:37.58#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.22:37:37.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:37.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:37.64#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:37.64#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:37.64#ibcon#enter wrdev, iclass 26, count 2 2006.229.22:37:37.64#ibcon#first serial, iclass 26, count 2 2006.229.22:37:37.64#ibcon#enter sib2, iclass 26, count 2 2006.229.22:37:37.64#ibcon#flushed, iclass 26, count 2 2006.229.22:37:37.64#ibcon#about to write, iclass 26, count 2 2006.229.22:37:37.64#ibcon#wrote, iclass 26, count 2 2006.229.22:37:37.64#ibcon#about to read 3, iclass 26, count 2 2006.229.22:37:37.66#ibcon#read 3, iclass 26, count 2 2006.229.22:37:37.66#ibcon#about to read 4, iclass 26, count 2 2006.229.22:37:37.66#ibcon#read 4, iclass 26, count 2 2006.229.22:37:37.66#ibcon#about to read 5, iclass 26, count 2 2006.229.22:37:37.66#ibcon#read 5, iclass 26, count 2 2006.229.22:37:37.66#ibcon#about to read 6, iclass 26, count 2 2006.229.22:37:37.66#ibcon#read 6, iclass 26, count 2 2006.229.22:37:37.66#ibcon#end of sib2, iclass 26, count 2 2006.229.22:37:37.66#ibcon#*mode == 0, iclass 26, count 2 2006.229.22:37:37.66#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.22:37:37.66#ibcon#[25=AT02-07\r\n] 2006.229.22:37:37.66#ibcon#*before write, iclass 26, count 2 2006.229.22:37:37.66#ibcon#enter sib2, iclass 26, count 2 2006.229.22:37:37.66#ibcon#flushed, iclass 26, count 2 2006.229.22:37:37.66#ibcon#about to write, iclass 26, count 2 2006.229.22:37:37.66#ibcon#wrote, iclass 26, count 2 2006.229.22:37:37.66#ibcon#about to read 3, iclass 26, count 2 2006.229.22:37:37.69#ibcon#read 3, iclass 26, count 2 2006.229.22:37:37.69#ibcon#about to read 4, iclass 26, count 2 2006.229.22:37:37.69#ibcon#read 4, iclass 26, count 2 2006.229.22:37:37.69#ibcon#about to read 5, iclass 26, count 2 2006.229.22:37:37.69#ibcon#read 5, iclass 26, count 2 2006.229.22:37:37.69#ibcon#about to read 6, iclass 26, count 2 2006.229.22:37:37.69#ibcon#read 6, iclass 26, count 2 2006.229.22:37:37.69#ibcon#end of sib2, iclass 26, count 2 2006.229.22:37:37.69#ibcon#*after write, iclass 26, count 2 2006.229.22:37:37.69#ibcon#*before return 0, iclass 26, count 2 2006.229.22:37:37.69#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:37.69#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:37.69#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.22:37:37.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:37.69#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:37.81#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:37.81#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:37.81#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:37:37.81#ibcon#first serial, iclass 26, count 0 2006.229.22:37:37.81#ibcon#enter sib2, iclass 26, count 0 2006.229.22:37:37.81#ibcon#flushed, iclass 26, count 0 2006.229.22:37:37.81#ibcon#about to write, iclass 26, count 0 2006.229.22:37:37.81#ibcon#wrote, iclass 26, count 0 2006.229.22:37:37.81#ibcon#about to read 3, iclass 26, count 0 2006.229.22:37:37.83#ibcon#read 3, iclass 26, count 0 2006.229.22:37:37.83#ibcon#about to read 4, iclass 26, count 0 2006.229.22:37:37.83#ibcon#read 4, iclass 26, count 0 2006.229.22:37:37.83#ibcon#about to read 5, iclass 26, count 0 2006.229.22:37:37.83#ibcon#read 5, iclass 26, count 0 2006.229.22:37:37.83#ibcon#about to read 6, iclass 26, count 0 2006.229.22:37:37.83#ibcon#read 6, iclass 26, count 0 2006.229.22:37:37.83#ibcon#end of sib2, iclass 26, count 0 2006.229.22:37:37.83#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:37:37.83#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:37:37.83#ibcon#[25=USB\r\n] 2006.229.22:37:37.83#ibcon#*before write, iclass 26, count 0 2006.229.22:37:37.83#ibcon#enter sib2, iclass 26, count 0 2006.229.22:37:37.83#ibcon#flushed, iclass 26, count 0 2006.229.22:37:37.83#ibcon#about to write, iclass 26, count 0 2006.229.22:37:37.83#ibcon#wrote, iclass 26, count 0 2006.229.22:37:37.83#ibcon#about to read 3, iclass 26, count 0 2006.229.22:37:37.86#ibcon#read 3, iclass 26, count 0 2006.229.22:37:37.86#ibcon#about to read 4, iclass 26, count 0 2006.229.22:37:37.86#ibcon#read 4, iclass 26, count 0 2006.229.22:37:37.86#ibcon#about to read 5, iclass 26, count 0 2006.229.22:37:37.86#ibcon#read 5, iclass 26, count 0 2006.229.22:37:37.86#ibcon#about to read 6, iclass 26, count 0 2006.229.22:37:37.86#ibcon#read 6, iclass 26, count 0 2006.229.22:37:37.86#ibcon#end of sib2, iclass 26, count 0 2006.229.22:37:37.86#ibcon#*after write, iclass 26, count 0 2006.229.22:37:37.86#ibcon#*before return 0, iclass 26, count 0 2006.229.22:37:37.86#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:37.86#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:37.86#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:37:37.86#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:37:37.86$vck44/valo=3,564.99 2006.229.22:37:37.86#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.22:37:37.86#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.22:37:37.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:37.86#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:37.86#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:37.86#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:37.86#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:37:37.86#ibcon#first serial, iclass 28, count 0 2006.229.22:37:37.86#ibcon#enter sib2, iclass 28, count 0 2006.229.22:37:37.86#ibcon#flushed, iclass 28, count 0 2006.229.22:37:37.86#ibcon#about to write, iclass 28, count 0 2006.229.22:37:37.86#ibcon#wrote, iclass 28, count 0 2006.229.22:37:37.86#ibcon#about to read 3, iclass 28, count 0 2006.229.22:37:37.88#ibcon#read 3, iclass 28, count 0 2006.229.22:37:37.88#ibcon#about to read 4, iclass 28, count 0 2006.229.22:37:37.88#ibcon#read 4, iclass 28, count 0 2006.229.22:37:37.88#ibcon#about to read 5, iclass 28, count 0 2006.229.22:37:37.88#ibcon#read 5, iclass 28, count 0 2006.229.22:37:37.88#ibcon#about to read 6, iclass 28, count 0 2006.229.22:37:37.88#ibcon#read 6, iclass 28, count 0 2006.229.22:37:37.88#ibcon#end of sib2, iclass 28, count 0 2006.229.22:37:37.88#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:37:37.88#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:37:37.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:37:37.88#ibcon#*before write, iclass 28, count 0 2006.229.22:37:37.88#ibcon#enter sib2, iclass 28, count 0 2006.229.22:37:37.88#ibcon#flushed, iclass 28, count 0 2006.229.22:37:37.88#ibcon#about to write, iclass 28, count 0 2006.229.22:37:37.88#ibcon#wrote, iclass 28, count 0 2006.229.22:37:37.88#ibcon#about to read 3, iclass 28, count 0 2006.229.22:37:37.92#ibcon#read 3, iclass 28, count 0 2006.229.22:37:37.92#ibcon#about to read 4, iclass 28, count 0 2006.229.22:37:37.92#ibcon#read 4, iclass 28, count 0 2006.229.22:37:37.92#ibcon#about to read 5, iclass 28, count 0 2006.229.22:37:37.92#ibcon#read 5, iclass 28, count 0 2006.229.22:37:37.92#ibcon#about to read 6, iclass 28, count 0 2006.229.22:37:37.92#ibcon#read 6, iclass 28, count 0 2006.229.22:37:37.92#ibcon#end of sib2, iclass 28, count 0 2006.229.22:37:37.92#ibcon#*after write, iclass 28, count 0 2006.229.22:37:37.92#ibcon#*before return 0, iclass 28, count 0 2006.229.22:37:37.92#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:37.92#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:37.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:37:37.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:37:37.92$vck44/va=3,6 2006.229.22:37:37.92#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.22:37:37.92#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.22:37:37.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:37.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:37.98#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:37.98#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:37.98#ibcon#enter wrdev, iclass 30, count 2 2006.229.22:37:37.98#ibcon#first serial, iclass 30, count 2 2006.229.22:37:37.98#ibcon#enter sib2, iclass 30, count 2 2006.229.22:37:37.98#ibcon#flushed, iclass 30, count 2 2006.229.22:37:37.98#ibcon#about to write, iclass 30, count 2 2006.229.22:37:37.98#ibcon#wrote, iclass 30, count 2 2006.229.22:37:37.98#ibcon#about to read 3, iclass 30, count 2 2006.229.22:37:38.00#ibcon#read 3, iclass 30, count 2 2006.229.22:37:38.00#ibcon#about to read 4, iclass 30, count 2 2006.229.22:37:38.00#ibcon#read 4, iclass 30, count 2 2006.229.22:37:38.00#ibcon#about to read 5, iclass 30, count 2 2006.229.22:37:38.00#ibcon#read 5, iclass 30, count 2 2006.229.22:37:38.00#ibcon#about to read 6, iclass 30, count 2 2006.229.22:37:38.00#ibcon#read 6, iclass 30, count 2 2006.229.22:37:38.00#ibcon#end of sib2, iclass 30, count 2 2006.229.22:37:38.00#ibcon#*mode == 0, iclass 30, count 2 2006.229.22:37:38.00#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.22:37:38.00#ibcon#[25=AT03-06\r\n] 2006.229.22:37:38.00#ibcon#*before write, iclass 30, count 2 2006.229.22:37:38.00#ibcon#enter sib2, iclass 30, count 2 2006.229.22:37:38.00#ibcon#flushed, iclass 30, count 2 2006.229.22:37:38.00#ibcon#about to write, iclass 30, count 2 2006.229.22:37:38.00#ibcon#wrote, iclass 30, count 2 2006.229.22:37:38.00#ibcon#about to read 3, iclass 30, count 2 2006.229.22:37:38.03#ibcon#read 3, iclass 30, count 2 2006.229.22:37:38.03#ibcon#about to read 4, iclass 30, count 2 2006.229.22:37:38.03#ibcon#read 4, iclass 30, count 2 2006.229.22:37:38.03#ibcon#about to read 5, iclass 30, count 2 2006.229.22:37:38.03#ibcon#read 5, iclass 30, count 2 2006.229.22:37:38.03#ibcon#about to read 6, iclass 30, count 2 2006.229.22:37:38.03#ibcon#read 6, iclass 30, count 2 2006.229.22:37:38.03#ibcon#end of sib2, iclass 30, count 2 2006.229.22:37:38.03#ibcon#*after write, iclass 30, count 2 2006.229.22:37:38.03#ibcon#*before return 0, iclass 30, count 2 2006.229.22:37:38.03#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:38.03#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:38.03#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.22:37:38.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:38.03#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:38.15#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:38.15#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:38.15#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:37:38.15#ibcon#first serial, iclass 30, count 0 2006.229.22:37:38.15#ibcon#enter sib2, iclass 30, count 0 2006.229.22:37:38.15#ibcon#flushed, iclass 30, count 0 2006.229.22:37:38.15#ibcon#about to write, iclass 30, count 0 2006.229.22:37:38.15#ibcon#wrote, iclass 30, count 0 2006.229.22:37:38.15#ibcon#about to read 3, iclass 30, count 0 2006.229.22:37:38.17#ibcon#read 3, iclass 30, count 0 2006.229.22:37:38.17#ibcon#about to read 4, iclass 30, count 0 2006.229.22:37:38.17#ibcon#read 4, iclass 30, count 0 2006.229.22:37:38.17#ibcon#about to read 5, iclass 30, count 0 2006.229.22:37:38.17#ibcon#read 5, iclass 30, count 0 2006.229.22:37:38.17#ibcon#about to read 6, iclass 30, count 0 2006.229.22:37:38.17#ibcon#read 6, iclass 30, count 0 2006.229.22:37:38.17#ibcon#end of sib2, iclass 30, count 0 2006.229.22:37:38.17#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:37:38.17#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:37:38.17#ibcon#[25=USB\r\n] 2006.229.22:37:38.17#ibcon#*before write, iclass 30, count 0 2006.229.22:37:38.17#ibcon#enter sib2, iclass 30, count 0 2006.229.22:37:38.17#ibcon#flushed, iclass 30, count 0 2006.229.22:37:38.17#ibcon#about to write, iclass 30, count 0 2006.229.22:37:38.17#ibcon#wrote, iclass 30, count 0 2006.229.22:37:38.17#ibcon#about to read 3, iclass 30, count 0 2006.229.22:37:38.20#ibcon#read 3, iclass 30, count 0 2006.229.22:37:38.20#ibcon#about to read 4, iclass 30, count 0 2006.229.22:37:38.20#ibcon#read 4, iclass 30, count 0 2006.229.22:37:38.20#ibcon#about to read 5, iclass 30, count 0 2006.229.22:37:38.20#ibcon#read 5, iclass 30, count 0 2006.229.22:37:38.20#ibcon#about to read 6, iclass 30, count 0 2006.229.22:37:38.20#ibcon#read 6, iclass 30, count 0 2006.229.22:37:38.20#ibcon#end of sib2, iclass 30, count 0 2006.229.22:37:38.20#ibcon#*after write, iclass 30, count 0 2006.229.22:37:38.20#ibcon#*before return 0, iclass 30, count 0 2006.229.22:37:38.20#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:38.20#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:38.20#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:37:38.20#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:37:38.20$vck44/valo=4,624.99 2006.229.22:37:38.20#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.22:37:38.20#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.22:37:38.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:38.20#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:38.20#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:38.20#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:38.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:37:38.20#ibcon#first serial, iclass 32, count 0 2006.229.22:37:38.20#ibcon#enter sib2, iclass 32, count 0 2006.229.22:37:38.20#ibcon#flushed, iclass 32, count 0 2006.229.22:37:38.20#ibcon#about to write, iclass 32, count 0 2006.229.22:37:38.20#ibcon#wrote, iclass 32, count 0 2006.229.22:37:38.20#ibcon#about to read 3, iclass 32, count 0 2006.229.22:37:38.22#ibcon#read 3, iclass 32, count 0 2006.229.22:37:38.22#ibcon#about to read 4, iclass 32, count 0 2006.229.22:37:38.22#ibcon#read 4, iclass 32, count 0 2006.229.22:37:38.22#ibcon#about to read 5, iclass 32, count 0 2006.229.22:37:38.22#ibcon#read 5, iclass 32, count 0 2006.229.22:37:38.22#ibcon#about to read 6, iclass 32, count 0 2006.229.22:37:38.22#ibcon#read 6, iclass 32, count 0 2006.229.22:37:38.22#ibcon#end of sib2, iclass 32, count 0 2006.229.22:37:38.22#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:37:38.22#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:37:38.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:37:38.22#ibcon#*before write, iclass 32, count 0 2006.229.22:37:38.22#ibcon#enter sib2, iclass 32, count 0 2006.229.22:37:38.22#ibcon#flushed, iclass 32, count 0 2006.229.22:37:38.22#ibcon#about to write, iclass 32, count 0 2006.229.22:37:38.22#ibcon#wrote, iclass 32, count 0 2006.229.22:37:38.22#ibcon#about to read 3, iclass 32, count 0 2006.229.22:37:38.26#ibcon#read 3, iclass 32, count 0 2006.229.22:37:38.26#ibcon#about to read 4, iclass 32, count 0 2006.229.22:37:38.26#ibcon#read 4, iclass 32, count 0 2006.229.22:37:38.26#ibcon#about to read 5, iclass 32, count 0 2006.229.22:37:38.26#ibcon#read 5, iclass 32, count 0 2006.229.22:37:38.26#ibcon#about to read 6, iclass 32, count 0 2006.229.22:37:38.26#ibcon#read 6, iclass 32, count 0 2006.229.22:37:38.26#ibcon#end of sib2, iclass 32, count 0 2006.229.22:37:38.26#ibcon#*after write, iclass 32, count 0 2006.229.22:37:38.26#ibcon#*before return 0, iclass 32, count 0 2006.229.22:37:38.26#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:38.26#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:38.26#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:37:38.26#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:37:38.26$vck44/va=4,7 2006.229.22:37:38.26#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.22:37:38.26#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.22:37:38.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:38.26#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:38.32#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:38.32#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:38.32#ibcon#enter wrdev, iclass 34, count 2 2006.229.22:37:38.32#ibcon#first serial, iclass 34, count 2 2006.229.22:37:38.32#ibcon#enter sib2, iclass 34, count 2 2006.229.22:37:38.32#ibcon#flushed, iclass 34, count 2 2006.229.22:37:38.32#ibcon#about to write, iclass 34, count 2 2006.229.22:37:38.32#ibcon#wrote, iclass 34, count 2 2006.229.22:37:38.32#ibcon#about to read 3, iclass 34, count 2 2006.229.22:37:38.34#ibcon#read 3, iclass 34, count 2 2006.229.22:37:38.34#ibcon#about to read 4, iclass 34, count 2 2006.229.22:37:38.34#ibcon#read 4, iclass 34, count 2 2006.229.22:37:38.34#ibcon#about to read 5, iclass 34, count 2 2006.229.22:37:38.34#ibcon#read 5, iclass 34, count 2 2006.229.22:37:38.34#ibcon#about to read 6, iclass 34, count 2 2006.229.22:37:38.34#ibcon#read 6, iclass 34, count 2 2006.229.22:37:38.34#ibcon#end of sib2, iclass 34, count 2 2006.229.22:37:38.34#ibcon#*mode == 0, iclass 34, count 2 2006.229.22:37:38.34#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.22:37:38.34#ibcon#[25=AT04-07\r\n] 2006.229.22:37:38.34#ibcon#*before write, iclass 34, count 2 2006.229.22:37:38.34#ibcon#enter sib2, iclass 34, count 2 2006.229.22:37:38.34#ibcon#flushed, iclass 34, count 2 2006.229.22:37:38.34#ibcon#about to write, iclass 34, count 2 2006.229.22:37:38.34#ibcon#wrote, iclass 34, count 2 2006.229.22:37:38.34#ibcon#about to read 3, iclass 34, count 2 2006.229.22:37:38.37#ibcon#read 3, iclass 34, count 2 2006.229.22:37:38.37#ibcon#about to read 4, iclass 34, count 2 2006.229.22:37:38.37#ibcon#read 4, iclass 34, count 2 2006.229.22:37:38.37#ibcon#about to read 5, iclass 34, count 2 2006.229.22:37:38.37#ibcon#read 5, iclass 34, count 2 2006.229.22:37:38.37#ibcon#about to read 6, iclass 34, count 2 2006.229.22:37:38.37#ibcon#read 6, iclass 34, count 2 2006.229.22:37:38.37#ibcon#end of sib2, iclass 34, count 2 2006.229.22:37:38.37#ibcon#*after write, iclass 34, count 2 2006.229.22:37:38.37#ibcon#*before return 0, iclass 34, count 2 2006.229.22:37:38.37#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:38.37#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:38.37#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.22:37:38.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:38.37#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:38.49#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:38.49#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:38.49#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:37:38.49#ibcon#first serial, iclass 34, count 0 2006.229.22:37:38.49#ibcon#enter sib2, iclass 34, count 0 2006.229.22:37:38.49#ibcon#flushed, iclass 34, count 0 2006.229.22:37:38.49#ibcon#about to write, iclass 34, count 0 2006.229.22:37:38.49#ibcon#wrote, iclass 34, count 0 2006.229.22:37:38.49#ibcon#about to read 3, iclass 34, count 0 2006.229.22:37:38.51#ibcon#read 3, iclass 34, count 0 2006.229.22:37:38.51#ibcon#about to read 4, iclass 34, count 0 2006.229.22:37:38.51#ibcon#read 4, iclass 34, count 0 2006.229.22:37:38.51#ibcon#about to read 5, iclass 34, count 0 2006.229.22:37:38.51#ibcon#read 5, iclass 34, count 0 2006.229.22:37:38.51#ibcon#about to read 6, iclass 34, count 0 2006.229.22:37:38.51#ibcon#read 6, iclass 34, count 0 2006.229.22:37:38.51#ibcon#end of sib2, iclass 34, count 0 2006.229.22:37:38.51#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:37:38.51#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:37:38.51#ibcon#[25=USB\r\n] 2006.229.22:37:38.51#ibcon#*before write, iclass 34, count 0 2006.229.22:37:38.51#ibcon#enter sib2, iclass 34, count 0 2006.229.22:37:38.51#ibcon#flushed, iclass 34, count 0 2006.229.22:37:38.51#ibcon#about to write, iclass 34, count 0 2006.229.22:37:38.51#ibcon#wrote, iclass 34, count 0 2006.229.22:37:38.51#ibcon#about to read 3, iclass 34, count 0 2006.229.22:37:38.54#ibcon#read 3, iclass 34, count 0 2006.229.22:37:38.54#ibcon#about to read 4, iclass 34, count 0 2006.229.22:37:38.54#ibcon#read 4, iclass 34, count 0 2006.229.22:37:38.54#ibcon#about to read 5, iclass 34, count 0 2006.229.22:37:38.54#ibcon#read 5, iclass 34, count 0 2006.229.22:37:38.54#ibcon#about to read 6, iclass 34, count 0 2006.229.22:37:38.54#ibcon#read 6, iclass 34, count 0 2006.229.22:37:38.54#ibcon#end of sib2, iclass 34, count 0 2006.229.22:37:38.54#ibcon#*after write, iclass 34, count 0 2006.229.22:37:38.54#ibcon#*before return 0, iclass 34, count 0 2006.229.22:37:38.54#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:38.54#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:38.54#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:37:38.54#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:37:38.54$vck44/valo=5,734.99 2006.229.22:37:38.54#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.22:37:38.54#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.22:37:38.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:38.54#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:38.54#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:38.54#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:38.54#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:37:38.54#ibcon#first serial, iclass 36, count 0 2006.229.22:37:38.54#ibcon#enter sib2, iclass 36, count 0 2006.229.22:37:38.54#ibcon#flushed, iclass 36, count 0 2006.229.22:37:38.54#ibcon#about to write, iclass 36, count 0 2006.229.22:37:38.54#ibcon#wrote, iclass 36, count 0 2006.229.22:37:38.54#ibcon#about to read 3, iclass 36, count 0 2006.229.22:37:38.56#ibcon#read 3, iclass 36, count 0 2006.229.22:37:38.56#ibcon#about to read 4, iclass 36, count 0 2006.229.22:37:38.56#ibcon#read 4, iclass 36, count 0 2006.229.22:37:38.56#ibcon#about to read 5, iclass 36, count 0 2006.229.22:37:38.56#ibcon#read 5, iclass 36, count 0 2006.229.22:37:38.56#ibcon#about to read 6, iclass 36, count 0 2006.229.22:37:38.56#ibcon#read 6, iclass 36, count 0 2006.229.22:37:38.56#ibcon#end of sib2, iclass 36, count 0 2006.229.22:37:38.56#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:37:38.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:37:38.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:37:38.56#ibcon#*before write, iclass 36, count 0 2006.229.22:37:38.56#ibcon#enter sib2, iclass 36, count 0 2006.229.22:37:38.56#ibcon#flushed, iclass 36, count 0 2006.229.22:37:38.56#ibcon#about to write, iclass 36, count 0 2006.229.22:37:38.56#ibcon#wrote, iclass 36, count 0 2006.229.22:37:38.56#ibcon#about to read 3, iclass 36, count 0 2006.229.22:37:38.60#ibcon#read 3, iclass 36, count 0 2006.229.22:37:38.60#ibcon#about to read 4, iclass 36, count 0 2006.229.22:37:38.60#ibcon#read 4, iclass 36, count 0 2006.229.22:37:38.60#ibcon#about to read 5, iclass 36, count 0 2006.229.22:37:38.60#ibcon#read 5, iclass 36, count 0 2006.229.22:37:38.60#ibcon#about to read 6, iclass 36, count 0 2006.229.22:37:38.60#ibcon#read 6, iclass 36, count 0 2006.229.22:37:38.60#ibcon#end of sib2, iclass 36, count 0 2006.229.22:37:38.60#ibcon#*after write, iclass 36, count 0 2006.229.22:37:38.60#ibcon#*before return 0, iclass 36, count 0 2006.229.22:37:38.60#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:38.60#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:38.60#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:37:38.60#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:37:38.60$vck44/va=5,4 2006.229.22:37:38.60#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.22:37:38.60#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.22:37:38.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:38.60#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:38.66#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:38.66#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:38.66#ibcon#enter wrdev, iclass 38, count 2 2006.229.22:37:38.66#ibcon#first serial, iclass 38, count 2 2006.229.22:37:38.66#ibcon#enter sib2, iclass 38, count 2 2006.229.22:37:38.66#ibcon#flushed, iclass 38, count 2 2006.229.22:37:38.66#ibcon#about to write, iclass 38, count 2 2006.229.22:37:38.66#ibcon#wrote, iclass 38, count 2 2006.229.22:37:38.66#ibcon#about to read 3, iclass 38, count 2 2006.229.22:37:38.68#ibcon#read 3, iclass 38, count 2 2006.229.22:37:38.68#ibcon#about to read 4, iclass 38, count 2 2006.229.22:37:38.68#ibcon#read 4, iclass 38, count 2 2006.229.22:37:38.68#ibcon#about to read 5, iclass 38, count 2 2006.229.22:37:38.68#ibcon#read 5, iclass 38, count 2 2006.229.22:37:38.68#ibcon#about to read 6, iclass 38, count 2 2006.229.22:37:38.68#ibcon#read 6, iclass 38, count 2 2006.229.22:37:38.68#ibcon#end of sib2, iclass 38, count 2 2006.229.22:37:38.68#ibcon#*mode == 0, iclass 38, count 2 2006.229.22:37:38.68#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.22:37:38.68#ibcon#[25=AT05-04\r\n] 2006.229.22:37:38.68#ibcon#*before write, iclass 38, count 2 2006.229.22:37:38.68#ibcon#enter sib2, iclass 38, count 2 2006.229.22:37:38.68#ibcon#flushed, iclass 38, count 2 2006.229.22:37:38.68#ibcon#about to write, iclass 38, count 2 2006.229.22:37:38.68#ibcon#wrote, iclass 38, count 2 2006.229.22:37:38.68#ibcon#about to read 3, iclass 38, count 2 2006.229.22:37:38.71#ibcon#read 3, iclass 38, count 2 2006.229.22:37:38.71#ibcon#about to read 4, iclass 38, count 2 2006.229.22:37:38.71#ibcon#read 4, iclass 38, count 2 2006.229.22:37:38.71#ibcon#about to read 5, iclass 38, count 2 2006.229.22:37:38.71#ibcon#read 5, iclass 38, count 2 2006.229.22:37:38.71#ibcon#about to read 6, iclass 38, count 2 2006.229.22:37:38.71#ibcon#read 6, iclass 38, count 2 2006.229.22:37:38.71#ibcon#end of sib2, iclass 38, count 2 2006.229.22:37:38.71#ibcon#*after write, iclass 38, count 2 2006.229.22:37:38.71#ibcon#*before return 0, iclass 38, count 2 2006.229.22:37:38.71#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:38.71#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:38.71#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.22:37:38.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:38.71#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:38.83#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:38.83#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:38.83#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:37:38.83#ibcon#first serial, iclass 38, count 0 2006.229.22:37:38.83#ibcon#enter sib2, iclass 38, count 0 2006.229.22:37:38.83#ibcon#flushed, iclass 38, count 0 2006.229.22:37:38.83#ibcon#about to write, iclass 38, count 0 2006.229.22:37:38.83#ibcon#wrote, iclass 38, count 0 2006.229.22:37:38.83#ibcon#about to read 3, iclass 38, count 0 2006.229.22:37:38.85#ibcon#read 3, iclass 38, count 0 2006.229.22:37:38.85#ibcon#about to read 4, iclass 38, count 0 2006.229.22:37:38.85#ibcon#read 4, iclass 38, count 0 2006.229.22:37:38.85#ibcon#about to read 5, iclass 38, count 0 2006.229.22:37:38.85#ibcon#read 5, iclass 38, count 0 2006.229.22:37:38.85#ibcon#about to read 6, iclass 38, count 0 2006.229.22:37:38.85#ibcon#read 6, iclass 38, count 0 2006.229.22:37:38.85#ibcon#end of sib2, iclass 38, count 0 2006.229.22:37:38.85#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:37:38.85#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:37:38.85#ibcon#[25=USB\r\n] 2006.229.22:37:38.85#ibcon#*before write, iclass 38, count 0 2006.229.22:37:38.85#ibcon#enter sib2, iclass 38, count 0 2006.229.22:37:38.85#ibcon#flushed, iclass 38, count 0 2006.229.22:37:38.85#ibcon#about to write, iclass 38, count 0 2006.229.22:37:38.85#ibcon#wrote, iclass 38, count 0 2006.229.22:37:38.85#ibcon#about to read 3, iclass 38, count 0 2006.229.22:37:38.88#ibcon#read 3, iclass 38, count 0 2006.229.22:37:38.88#ibcon#about to read 4, iclass 38, count 0 2006.229.22:37:38.88#ibcon#read 4, iclass 38, count 0 2006.229.22:37:38.88#ibcon#about to read 5, iclass 38, count 0 2006.229.22:37:38.88#ibcon#read 5, iclass 38, count 0 2006.229.22:37:38.88#ibcon#about to read 6, iclass 38, count 0 2006.229.22:37:38.88#ibcon#read 6, iclass 38, count 0 2006.229.22:37:38.88#ibcon#end of sib2, iclass 38, count 0 2006.229.22:37:38.88#ibcon#*after write, iclass 38, count 0 2006.229.22:37:38.88#ibcon#*before return 0, iclass 38, count 0 2006.229.22:37:38.88#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:38.88#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:38.88#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:37:38.88#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:37:38.88$vck44/valo=6,814.99 2006.229.22:37:38.88#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.22:37:38.88#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.22:37:38.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:38.88#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:38.88#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:38.88#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:38.88#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:37:38.88#ibcon#first serial, iclass 40, count 0 2006.229.22:37:38.88#ibcon#enter sib2, iclass 40, count 0 2006.229.22:37:38.88#ibcon#flushed, iclass 40, count 0 2006.229.22:37:38.88#ibcon#about to write, iclass 40, count 0 2006.229.22:37:38.88#ibcon#wrote, iclass 40, count 0 2006.229.22:37:38.88#ibcon#about to read 3, iclass 40, count 0 2006.229.22:37:38.90#ibcon#read 3, iclass 40, count 0 2006.229.22:37:38.90#ibcon#about to read 4, iclass 40, count 0 2006.229.22:37:38.90#ibcon#read 4, iclass 40, count 0 2006.229.22:37:38.90#ibcon#about to read 5, iclass 40, count 0 2006.229.22:37:38.90#ibcon#read 5, iclass 40, count 0 2006.229.22:37:38.90#ibcon#about to read 6, iclass 40, count 0 2006.229.22:37:38.90#ibcon#read 6, iclass 40, count 0 2006.229.22:37:38.90#ibcon#end of sib2, iclass 40, count 0 2006.229.22:37:38.90#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:37:38.90#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:37:38.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:37:38.90#ibcon#*before write, iclass 40, count 0 2006.229.22:37:38.90#ibcon#enter sib2, iclass 40, count 0 2006.229.22:37:38.90#ibcon#flushed, iclass 40, count 0 2006.229.22:37:38.90#ibcon#about to write, iclass 40, count 0 2006.229.22:37:38.90#ibcon#wrote, iclass 40, count 0 2006.229.22:37:38.90#ibcon#about to read 3, iclass 40, count 0 2006.229.22:37:38.94#ibcon#read 3, iclass 40, count 0 2006.229.22:37:38.94#ibcon#about to read 4, iclass 40, count 0 2006.229.22:37:38.94#ibcon#read 4, iclass 40, count 0 2006.229.22:37:38.94#ibcon#about to read 5, iclass 40, count 0 2006.229.22:37:38.94#ibcon#read 5, iclass 40, count 0 2006.229.22:37:38.94#ibcon#about to read 6, iclass 40, count 0 2006.229.22:37:38.94#ibcon#read 6, iclass 40, count 0 2006.229.22:37:38.94#ibcon#end of sib2, iclass 40, count 0 2006.229.22:37:38.94#ibcon#*after write, iclass 40, count 0 2006.229.22:37:38.94#ibcon#*before return 0, iclass 40, count 0 2006.229.22:37:38.94#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:38.94#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:38.94#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:37:38.94#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:37:38.94$vck44/va=6,4 2006.229.22:37:38.94#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.22:37:38.94#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.22:37:38.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:38.94#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:39.00#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:39.00#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:39.00#ibcon#enter wrdev, iclass 4, count 2 2006.229.22:37:39.00#ibcon#first serial, iclass 4, count 2 2006.229.22:37:39.00#ibcon#enter sib2, iclass 4, count 2 2006.229.22:37:39.00#ibcon#flushed, iclass 4, count 2 2006.229.22:37:39.00#ibcon#about to write, iclass 4, count 2 2006.229.22:37:39.00#ibcon#wrote, iclass 4, count 2 2006.229.22:37:39.00#ibcon#about to read 3, iclass 4, count 2 2006.229.22:37:39.02#ibcon#read 3, iclass 4, count 2 2006.229.22:37:39.02#ibcon#about to read 4, iclass 4, count 2 2006.229.22:37:39.02#ibcon#read 4, iclass 4, count 2 2006.229.22:37:39.02#ibcon#about to read 5, iclass 4, count 2 2006.229.22:37:39.02#ibcon#read 5, iclass 4, count 2 2006.229.22:37:39.02#ibcon#about to read 6, iclass 4, count 2 2006.229.22:37:39.02#ibcon#read 6, iclass 4, count 2 2006.229.22:37:39.02#ibcon#end of sib2, iclass 4, count 2 2006.229.22:37:39.02#ibcon#*mode == 0, iclass 4, count 2 2006.229.22:37:39.02#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.22:37:39.02#ibcon#[25=AT06-04\r\n] 2006.229.22:37:39.02#ibcon#*before write, iclass 4, count 2 2006.229.22:37:39.02#ibcon#enter sib2, iclass 4, count 2 2006.229.22:37:39.02#ibcon#flushed, iclass 4, count 2 2006.229.22:37:39.02#ibcon#about to write, iclass 4, count 2 2006.229.22:37:39.02#ibcon#wrote, iclass 4, count 2 2006.229.22:37:39.02#ibcon#about to read 3, iclass 4, count 2 2006.229.22:37:39.05#ibcon#read 3, iclass 4, count 2 2006.229.22:37:39.05#ibcon#about to read 4, iclass 4, count 2 2006.229.22:37:39.05#ibcon#read 4, iclass 4, count 2 2006.229.22:37:39.05#ibcon#about to read 5, iclass 4, count 2 2006.229.22:37:39.05#ibcon#read 5, iclass 4, count 2 2006.229.22:37:39.05#ibcon#about to read 6, iclass 4, count 2 2006.229.22:37:39.05#ibcon#read 6, iclass 4, count 2 2006.229.22:37:39.05#ibcon#end of sib2, iclass 4, count 2 2006.229.22:37:39.05#ibcon#*after write, iclass 4, count 2 2006.229.22:37:39.05#ibcon#*before return 0, iclass 4, count 2 2006.229.22:37:39.05#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:39.05#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:39.05#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.22:37:39.05#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:39.05#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:39.17#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:39.17#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:39.17#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:37:39.17#ibcon#first serial, iclass 4, count 0 2006.229.22:37:39.17#ibcon#enter sib2, iclass 4, count 0 2006.229.22:37:39.17#ibcon#flushed, iclass 4, count 0 2006.229.22:37:39.17#ibcon#about to write, iclass 4, count 0 2006.229.22:37:39.17#ibcon#wrote, iclass 4, count 0 2006.229.22:37:39.17#ibcon#about to read 3, iclass 4, count 0 2006.229.22:37:39.19#ibcon#read 3, iclass 4, count 0 2006.229.22:37:39.19#ibcon#about to read 4, iclass 4, count 0 2006.229.22:37:39.19#ibcon#read 4, iclass 4, count 0 2006.229.22:37:39.19#ibcon#about to read 5, iclass 4, count 0 2006.229.22:37:39.19#ibcon#read 5, iclass 4, count 0 2006.229.22:37:39.19#ibcon#about to read 6, iclass 4, count 0 2006.229.22:37:39.19#ibcon#read 6, iclass 4, count 0 2006.229.22:37:39.19#ibcon#end of sib2, iclass 4, count 0 2006.229.22:37:39.19#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:37:39.19#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:37:39.19#ibcon#[25=USB\r\n] 2006.229.22:37:39.19#ibcon#*before write, iclass 4, count 0 2006.229.22:37:39.19#ibcon#enter sib2, iclass 4, count 0 2006.229.22:37:39.19#ibcon#flushed, iclass 4, count 0 2006.229.22:37:39.19#ibcon#about to write, iclass 4, count 0 2006.229.22:37:39.19#ibcon#wrote, iclass 4, count 0 2006.229.22:37:39.19#ibcon#about to read 3, iclass 4, count 0 2006.229.22:37:39.22#ibcon#read 3, iclass 4, count 0 2006.229.22:37:39.22#ibcon#about to read 4, iclass 4, count 0 2006.229.22:37:39.22#ibcon#read 4, iclass 4, count 0 2006.229.22:37:39.22#ibcon#about to read 5, iclass 4, count 0 2006.229.22:37:39.22#ibcon#read 5, iclass 4, count 0 2006.229.22:37:39.22#ibcon#about to read 6, iclass 4, count 0 2006.229.22:37:39.22#ibcon#read 6, iclass 4, count 0 2006.229.22:37:39.22#ibcon#end of sib2, iclass 4, count 0 2006.229.22:37:39.22#ibcon#*after write, iclass 4, count 0 2006.229.22:37:39.22#ibcon#*before return 0, iclass 4, count 0 2006.229.22:37:39.22#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:39.22#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:39.22#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:37:39.22#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:37:39.22$vck44/valo=7,864.99 2006.229.22:37:39.22#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.22:37:39.22#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.22:37:39.22#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:39.22#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:39.22#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:39.22#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:39.22#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:37:39.22#ibcon#first serial, iclass 6, count 0 2006.229.22:37:39.22#ibcon#enter sib2, iclass 6, count 0 2006.229.22:37:39.22#ibcon#flushed, iclass 6, count 0 2006.229.22:37:39.22#ibcon#about to write, iclass 6, count 0 2006.229.22:37:39.22#ibcon#wrote, iclass 6, count 0 2006.229.22:37:39.22#ibcon#about to read 3, iclass 6, count 0 2006.229.22:37:39.24#ibcon#read 3, iclass 6, count 0 2006.229.22:37:39.24#ibcon#about to read 4, iclass 6, count 0 2006.229.22:37:39.24#ibcon#read 4, iclass 6, count 0 2006.229.22:37:39.24#ibcon#about to read 5, iclass 6, count 0 2006.229.22:37:39.24#ibcon#read 5, iclass 6, count 0 2006.229.22:37:39.24#ibcon#about to read 6, iclass 6, count 0 2006.229.22:37:39.24#ibcon#read 6, iclass 6, count 0 2006.229.22:37:39.24#ibcon#end of sib2, iclass 6, count 0 2006.229.22:37:39.24#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:37:39.24#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:37:39.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:37:39.24#ibcon#*before write, iclass 6, count 0 2006.229.22:37:39.24#ibcon#enter sib2, iclass 6, count 0 2006.229.22:37:39.24#ibcon#flushed, iclass 6, count 0 2006.229.22:37:39.24#ibcon#about to write, iclass 6, count 0 2006.229.22:37:39.24#ibcon#wrote, iclass 6, count 0 2006.229.22:37:39.24#ibcon#about to read 3, iclass 6, count 0 2006.229.22:37:39.28#ibcon#read 3, iclass 6, count 0 2006.229.22:37:39.28#ibcon#about to read 4, iclass 6, count 0 2006.229.22:37:39.28#ibcon#read 4, iclass 6, count 0 2006.229.22:37:39.28#ibcon#about to read 5, iclass 6, count 0 2006.229.22:37:39.28#ibcon#read 5, iclass 6, count 0 2006.229.22:37:39.28#ibcon#about to read 6, iclass 6, count 0 2006.229.22:37:39.28#ibcon#read 6, iclass 6, count 0 2006.229.22:37:39.28#ibcon#end of sib2, iclass 6, count 0 2006.229.22:37:39.28#ibcon#*after write, iclass 6, count 0 2006.229.22:37:39.28#ibcon#*before return 0, iclass 6, count 0 2006.229.22:37:39.28#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:39.28#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:39.28#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:37:39.28#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:37:39.28$vck44/va=7,5 2006.229.22:37:39.28#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.22:37:39.28#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.22:37:39.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:39.28#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:39.34#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:39.34#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:39.34#ibcon#enter wrdev, iclass 10, count 2 2006.229.22:37:39.34#ibcon#first serial, iclass 10, count 2 2006.229.22:37:39.34#ibcon#enter sib2, iclass 10, count 2 2006.229.22:37:39.34#ibcon#flushed, iclass 10, count 2 2006.229.22:37:39.34#ibcon#about to write, iclass 10, count 2 2006.229.22:37:39.34#ibcon#wrote, iclass 10, count 2 2006.229.22:37:39.34#ibcon#about to read 3, iclass 10, count 2 2006.229.22:37:39.36#ibcon#read 3, iclass 10, count 2 2006.229.22:37:39.36#ibcon#about to read 4, iclass 10, count 2 2006.229.22:37:39.36#ibcon#read 4, iclass 10, count 2 2006.229.22:37:39.36#ibcon#about to read 5, iclass 10, count 2 2006.229.22:37:39.36#ibcon#read 5, iclass 10, count 2 2006.229.22:37:39.36#ibcon#about to read 6, iclass 10, count 2 2006.229.22:37:39.36#ibcon#read 6, iclass 10, count 2 2006.229.22:37:39.36#ibcon#end of sib2, iclass 10, count 2 2006.229.22:37:39.36#ibcon#*mode == 0, iclass 10, count 2 2006.229.22:37:39.36#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.22:37:39.36#ibcon#[25=AT07-05\r\n] 2006.229.22:37:39.36#ibcon#*before write, iclass 10, count 2 2006.229.22:37:39.36#ibcon#enter sib2, iclass 10, count 2 2006.229.22:37:39.36#ibcon#flushed, iclass 10, count 2 2006.229.22:37:39.36#ibcon#about to write, iclass 10, count 2 2006.229.22:37:39.36#ibcon#wrote, iclass 10, count 2 2006.229.22:37:39.36#ibcon#about to read 3, iclass 10, count 2 2006.229.22:37:39.39#ibcon#read 3, iclass 10, count 2 2006.229.22:37:39.39#ibcon#about to read 4, iclass 10, count 2 2006.229.22:37:39.39#ibcon#read 4, iclass 10, count 2 2006.229.22:37:39.39#ibcon#about to read 5, iclass 10, count 2 2006.229.22:37:39.39#ibcon#read 5, iclass 10, count 2 2006.229.22:37:39.39#ibcon#about to read 6, iclass 10, count 2 2006.229.22:37:39.39#ibcon#read 6, iclass 10, count 2 2006.229.22:37:39.39#ibcon#end of sib2, iclass 10, count 2 2006.229.22:37:39.39#ibcon#*after write, iclass 10, count 2 2006.229.22:37:39.39#ibcon#*before return 0, iclass 10, count 2 2006.229.22:37:39.39#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:39.39#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:39.39#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.22:37:39.39#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:39.39#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:39.51#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:39.51#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:39.51#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:37:39.51#ibcon#first serial, iclass 10, count 0 2006.229.22:37:39.51#ibcon#enter sib2, iclass 10, count 0 2006.229.22:37:39.51#ibcon#flushed, iclass 10, count 0 2006.229.22:37:39.51#ibcon#about to write, iclass 10, count 0 2006.229.22:37:39.51#ibcon#wrote, iclass 10, count 0 2006.229.22:37:39.51#ibcon#about to read 3, iclass 10, count 0 2006.229.22:37:39.53#ibcon#read 3, iclass 10, count 0 2006.229.22:37:39.53#ibcon#about to read 4, iclass 10, count 0 2006.229.22:37:39.53#ibcon#read 4, iclass 10, count 0 2006.229.22:37:39.53#ibcon#about to read 5, iclass 10, count 0 2006.229.22:37:39.53#ibcon#read 5, iclass 10, count 0 2006.229.22:37:39.53#ibcon#about to read 6, iclass 10, count 0 2006.229.22:37:39.53#ibcon#read 6, iclass 10, count 0 2006.229.22:37:39.53#ibcon#end of sib2, iclass 10, count 0 2006.229.22:37:39.53#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:37:39.53#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:37:39.53#ibcon#[25=USB\r\n] 2006.229.22:37:39.53#ibcon#*before write, iclass 10, count 0 2006.229.22:37:39.53#ibcon#enter sib2, iclass 10, count 0 2006.229.22:37:39.53#ibcon#flushed, iclass 10, count 0 2006.229.22:37:39.53#ibcon#about to write, iclass 10, count 0 2006.229.22:37:39.53#ibcon#wrote, iclass 10, count 0 2006.229.22:37:39.53#ibcon#about to read 3, iclass 10, count 0 2006.229.22:37:39.56#ibcon#read 3, iclass 10, count 0 2006.229.22:37:39.56#ibcon#about to read 4, iclass 10, count 0 2006.229.22:37:39.56#ibcon#read 4, iclass 10, count 0 2006.229.22:37:39.56#ibcon#about to read 5, iclass 10, count 0 2006.229.22:37:39.56#ibcon#read 5, iclass 10, count 0 2006.229.22:37:39.56#ibcon#about to read 6, iclass 10, count 0 2006.229.22:37:39.56#ibcon#read 6, iclass 10, count 0 2006.229.22:37:39.56#ibcon#end of sib2, iclass 10, count 0 2006.229.22:37:39.56#ibcon#*after write, iclass 10, count 0 2006.229.22:37:39.56#ibcon#*before return 0, iclass 10, count 0 2006.229.22:37:39.56#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:39.56#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:39.56#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:37:39.56#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:37:39.56$vck44/valo=8,884.99 2006.229.22:37:39.56#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.22:37:39.56#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.22:37:39.56#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:39.56#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:39.56#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:39.56#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:39.56#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:37:39.56#ibcon#first serial, iclass 12, count 0 2006.229.22:37:39.56#ibcon#enter sib2, iclass 12, count 0 2006.229.22:37:39.56#ibcon#flushed, iclass 12, count 0 2006.229.22:37:39.56#ibcon#about to write, iclass 12, count 0 2006.229.22:37:39.56#ibcon#wrote, iclass 12, count 0 2006.229.22:37:39.56#ibcon#about to read 3, iclass 12, count 0 2006.229.22:37:39.58#ibcon#read 3, iclass 12, count 0 2006.229.22:37:39.58#ibcon#about to read 4, iclass 12, count 0 2006.229.22:37:39.58#ibcon#read 4, iclass 12, count 0 2006.229.22:37:39.58#ibcon#about to read 5, iclass 12, count 0 2006.229.22:37:39.58#ibcon#read 5, iclass 12, count 0 2006.229.22:37:39.58#ibcon#about to read 6, iclass 12, count 0 2006.229.22:37:39.58#ibcon#read 6, iclass 12, count 0 2006.229.22:37:39.58#ibcon#end of sib2, iclass 12, count 0 2006.229.22:37:39.58#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:37:39.58#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:37:39.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:37:39.58#ibcon#*before write, iclass 12, count 0 2006.229.22:37:39.58#ibcon#enter sib2, iclass 12, count 0 2006.229.22:37:39.58#ibcon#flushed, iclass 12, count 0 2006.229.22:37:39.58#ibcon#about to write, iclass 12, count 0 2006.229.22:37:39.58#ibcon#wrote, iclass 12, count 0 2006.229.22:37:39.58#ibcon#about to read 3, iclass 12, count 0 2006.229.22:37:39.62#ibcon#read 3, iclass 12, count 0 2006.229.22:37:39.62#ibcon#about to read 4, iclass 12, count 0 2006.229.22:37:39.62#ibcon#read 4, iclass 12, count 0 2006.229.22:37:39.62#ibcon#about to read 5, iclass 12, count 0 2006.229.22:37:39.62#ibcon#read 5, iclass 12, count 0 2006.229.22:37:39.62#ibcon#about to read 6, iclass 12, count 0 2006.229.22:37:39.62#ibcon#read 6, iclass 12, count 0 2006.229.22:37:39.62#ibcon#end of sib2, iclass 12, count 0 2006.229.22:37:39.62#ibcon#*after write, iclass 12, count 0 2006.229.22:37:39.62#ibcon#*before return 0, iclass 12, count 0 2006.229.22:37:39.62#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:39.62#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:39.62#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:37:39.62#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:37:39.62$vck44/va=8,6 2006.229.22:37:39.62#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.22:37:39.62#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.22:37:39.62#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:39.62#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:39.68#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:39.68#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:39.68#ibcon#enter wrdev, iclass 14, count 2 2006.229.22:37:39.68#ibcon#first serial, iclass 14, count 2 2006.229.22:37:39.68#ibcon#enter sib2, iclass 14, count 2 2006.229.22:37:39.68#ibcon#flushed, iclass 14, count 2 2006.229.22:37:39.68#ibcon#about to write, iclass 14, count 2 2006.229.22:37:39.68#ibcon#wrote, iclass 14, count 2 2006.229.22:37:39.68#ibcon#about to read 3, iclass 14, count 2 2006.229.22:37:39.70#ibcon#read 3, iclass 14, count 2 2006.229.22:37:39.70#ibcon#about to read 4, iclass 14, count 2 2006.229.22:37:39.70#ibcon#read 4, iclass 14, count 2 2006.229.22:37:39.70#ibcon#about to read 5, iclass 14, count 2 2006.229.22:37:39.70#ibcon#read 5, iclass 14, count 2 2006.229.22:37:39.70#ibcon#about to read 6, iclass 14, count 2 2006.229.22:37:39.70#ibcon#read 6, iclass 14, count 2 2006.229.22:37:39.70#ibcon#end of sib2, iclass 14, count 2 2006.229.22:37:39.70#ibcon#*mode == 0, iclass 14, count 2 2006.229.22:37:39.70#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.22:37:39.70#ibcon#[25=AT08-06\r\n] 2006.229.22:37:39.70#ibcon#*before write, iclass 14, count 2 2006.229.22:37:39.70#ibcon#enter sib2, iclass 14, count 2 2006.229.22:37:39.70#ibcon#flushed, iclass 14, count 2 2006.229.22:37:39.70#ibcon#about to write, iclass 14, count 2 2006.229.22:37:39.70#ibcon#wrote, iclass 14, count 2 2006.229.22:37:39.70#ibcon#about to read 3, iclass 14, count 2 2006.229.22:37:39.73#ibcon#read 3, iclass 14, count 2 2006.229.22:37:39.73#ibcon#about to read 4, iclass 14, count 2 2006.229.22:37:39.73#ibcon#read 4, iclass 14, count 2 2006.229.22:37:39.73#ibcon#about to read 5, iclass 14, count 2 2006.229.22:37:39.73#ibcon#read 5, iclass 14, count 2 2006.229.22:37:39.73#ibcon#about to read 6, iclass 14, count 2 2006.229.22:37:39.73#ibcon#read 6, iclass 14, count 2 2006.229.22:37:39.73#ibcon#end of sib2, iclass 14, count 2 2006.229.22:37:39.73#ibcon#*after write, iclass 14, count 2 2006.229.22:37:39.73#ibcon#*before return 0, iclass 14, count 2 2006.229.22:37:39.73#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:39.73#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:39.73#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.22:37:39.73#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:39.73#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:39.85#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:39.85#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:39.85#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:37:39.85#ibcon#first serial, iclass 14, count 0 2006.229.22:37:39.85#ibcon#enter sib2, iclass 14, count 0 2006.229.22:37:39.85#ibcon#flushed, iclass 14, count 0 2006.229.22:37:39.85#ibcon#about to write, iclass 14, count 0 2006.229.22:37:39.85#ibcon#wrote, iclass 14, count 0 2006.229.22:37:39.85#ibcon#about to read 3, iclass 14, count 0 2006.229.22:37:39.87#ibcon#read 3, iclass 14, count 0 2006.229.22:37:39.87#ibcon#about to read 4, iclass 14, count 0 2006.229.22:37:39.87#ibcon#read 4, iclass 14, count 0 2006.229.22:37:39.87#ibcon#about to read 5, iclass 14, count 0 2006.229.22:37:39.87#ibcon#read 5, iclass 14, count 0 2006.229.22:37:39.87#ibcon#about to read 6, iclass 14, count 0 2006.229.22:37:39.87#ibcon#read 6, iclass 14, count 0 2006.229.22:37:39.87#ibcon#end of sib2, iclass 14, count 0 2006.229.22:37:39.87#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:37:39.87#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:37:39.87#ibcon#[25=USB\r\n] 2006.229.22:37:39.87#ibcon#*before write, iclass 14, count 0 2006.229.22:37:39.87#ibcon#enter sib2, iclass 14, count 0 2006.229.22:37:39.87#ibcon#flushed, iclass 14, count 0 2006.229.22:37:39.87#ibcon#about to write, iclass 14, count 0 2006.229.22:37:39.87#ibcon#wrote, iclass 14, count 0 2006.229.22:37:39.87#ibcon#about to read 3, iclass 14, count 0 2006.229.22:37:39.90#ibcon#read 3, iclass 14, count 0 2006.229.22:37:39.90#ibcon#about to read 4, iclass 14, count 0 2006.229.22:37:39.90#ibcon#read 4, iclass 14, count 0 2006.229.22:37:39.90#ibcon#about to read 5, iclass 14, count 0 2006.229.22:37:39.90#ibcon#read 5, iclass 14, count 0 2006.229.22:37:39.90#ibcon#about to read 6, iclass 14, count 0 2006.229.22:37:39.90#ibcon#read 6, iclass 14, count 0 2006.229.22:37:39.90#ibcon#end of sib2, iclass 14, count 0 2006.229.22:37:39.90#ibcon#*after write, iclass 14, count 0 2006.229.22:37:39.90#ibcon#*before return 0, iclass 14, count 0 2006.229.22:37:39.90#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:39.90#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:39.90#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:37:39.90#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:37:39.90$vck44/vblo=1,629.99 2006.229.22:37:39.90#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.22:37:39.90#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.22:37:39.90#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:39.90#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:39.90#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:39.90#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:39.90#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:37:39.90#ibcon#first serial, iclass 16, count 0 2006.229.22:37:39.90#ibcon#enter sib2, iclass 16, count 0 2006.229.22:37:39.90#ibcon#flushed, iclass 16, count 0 2006.229.22:37:39.90#ibcon#about to write, iclass 16, count 0 2006.229.22:37:39.90#ibcon#wrote, iclass 16, count 0 2006.229.22:37:39.90#ibcon#about to read 3, iclass 16, count 0 2006.229.22:37:39.92#ibcon#read 3, iclass 16, count 0 2006.229.22:37:39.92#ibcon#about to read 4, iclass 16, count 0 2006.229.22:37:39.92#ibcon#read 4, iclass 16, count 0 2006.229.22:37:39.92#ibcon#about to read 5, iclass 16, count 0 2006.229.22:37:39.92#ibcon#read 5, iclass 16, count 0 2006.229.22:37:39.92#ibcon#about to read 6, iclass 16, count 0 2006.229.22:37:39.92#ibcon#read 6, iclass 16, count 0 2006.229.22:37:39.92#ibcon#end of sib2, iclass 16, count 0 2006.229.22:37:39.92#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:37:39.92#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:37:39.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:37:39.92#ibcon#*before write, iclass 16, count 0 2006.229.22:37:39.92#ibcon#enter sib2, iclass 16, count 0 2006.229.22:37:39.92#ibcon#flushed, iclass 16, count 0 2006.229.22:37:39.92#ibcon#about to write, iclass 16, count 0 2006.229.22:37:39.92#ibcon#wrote, iclass 16, count 0 2006.229.22:37:39.92#ibcon#about to read 3, iclass 16, count 0 2006.229.22:37:39.96#ibcon#read 3, iclass 16, count 0 2006.229.22:37:39.96#ibcon#about to read 4, iclass 16, count 0 2006.229.22:37:39.96#ibcon#read 4, iclass 16, count 0 2006.229.22:37:39.96#ibcon#about to read 5, iclass 16, count 0 2006.229.22:37:39.96#ibcon#read 5, iclass 16, count 0 2006.229.22:37:39.96#ibcon#about to read 6, iclass 16, count 0 2006.229.22:37:39.96#ibcon#read 6, iclass 16, count 0 2006.229.22:37:39.96#ibcon#end of sib2, iclass 16, count 0 2006.229.22:37:39.96#ibcon#*after write, iclass 16, count 0 2006.229.22:37:39.96#ibcon#*before return 0, iclass 16, count 0 2006.229.22:37:39.96#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:39.96#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:39.96#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:37:39.96#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:37:39.96$vck44/vb=1,4 2006.229.22:37:39.96#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.22:37:39.96#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.22:37:39.96#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:39.96#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:37:39.96#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:37:39.96#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:37:39.96#ibcon#enter wrdev, iclass 18, count 2 2006.229.22:37:39.96#ibcon#first serial, iclass 18, count 2 2006.229.22:37:39.96#ibcon#enter sib2, iclass 18, count 2 2006.229.22:37:39.96#ibcon#flushed, iclass 18, count 2 2006.229.22:37:39.96#ibcon#about to write, iclass 18, count 2 2006.229.22:37:39.96#ibcon#wrote, iclass 18, count 2 2006.229.22:37:39.96#ibcon#about to read 3, iclass 18, count 2 2006.229.22:37:39.98#ibcon#read 3, iclass 18, count 2 2006.229.22:37:39.98#ibcon#about to read 4, iclass 18, count 2 2006.229.22:37:39.98#ibcon#read 4, iclass 18, count 2 2006.229.22:37:39.98#ibcon#about to read 5, iclass 18, count 2 2006.229.22:37:39.98#ibcon#read 5, iclass 18, count 2 2006.229.22:37:39.98#ibcon#about to read 6, iclass 18, count 2 2006.229.22:37:39.98#ibcon#read 6, iclass 18, count 2 2006.229.22:37:39.98#ibcon#end of sib2, iclass 18, count 2 2006.229.22:37:39.98#ibcon#*mode == 0, iclass 18, count 2 2006.229.22:37:39.98#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.22:37:39.98#ibcon#[27=AT01-04\r\n] 2006.229.22:37:39.98#ibcon#*before write, iclass 18, count 2 2006.229.22:37:39.98#ibcon#enter sib2, iclass 18, count 2 2006.229.22:37:39.98#ibcon#flushed, iclass 18, count 2 2006.229.22:37:39.98#ibcon#about to write, iclass 18, count 2 2006.229.22:37:39.98#ibcon#wrote, iclass 18, count 2 2006.229.22:37:39.98#ibcon#about to read 3, iclass 18, count 2 2006.229.22:37:40.01#ibcon#read 3, iclass 18, count 2 2006.229.22:37:40.01#ibcon#about to read 4, iclass 18, count 2 2006.229.22:37:40.01#ibcon#read 4, iclass 18, count 2 2006.229.22:37:40.01#ibcon#about to read 5, iclass 18, count 2 2006.229.22:37:40.01#ibcon#read 5, iclass 18, count 2 2006.229.22:37:40.01#ibcon#about to read 6, iclass 18, count 2 2006.229.22:37:40.01#ibcon#read 6, iclass 18, count 2 2006.229.22:37:40.01#ibcon#end of sib2, iclass 18, count 2 2006.229.22:37:40.01#ibcon#*after write, iclass 18, count 2 2006.229.22:37:40.01#ibcon#*before return 0, iclass 18, count 2 2006.229.22:37:40.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:37:40.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:37:40.01#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.22:37:40.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:40.01#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:37:40.04#abcon#<5=/09 1.0 4.7 28.78 891002.5\r\n> 2006.229.22:37:40.06#abcon#{5=INTERFACE CLEAR} 2006.229.22:37:40.12#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:37:40.13#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:37:40.13#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:37:40.13#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:37:40.13#ibcon#first serial, iclass 18, count 0 2006.229.22:37:40.13#ibcon#enter sib2, iclass 18, count 0 2006.229.22:37:40.13#ibcon#flushed, iclass 18, count 0 2006.229.22:37:40.13#ibcon#about to write, iclass 18, count 0 2006.229.22:37:40.13#ibcon#wrote, iclass 18, count 0 2006.229.22:37:40.13#ibcon#about to read 3, iclass 18, count 0 2006.229.22:37:40.15#ibcon#read 3, iclass 18, count 0 2006.229.22:37:40.15#ibcon#about to read 4, iclass 18, count 0 2006.229.22:37:40.15#ibcon#read 4, iclass 18, count 0 2006.229.22:37:40.15#ibcon#about to read 5, iclass 18, count 0 2006.229.22:37:40.15#ibcon#read 5, iclass 18, count 0 2006.229.22:37:40.15#ibcon#about to read 6, iclass 18, count 0 2006.229.22:37:40.15#ibcon#read 6, iclass 18, count 0 2006.229.22:37:40.15#ibcon#end of sib2, iclass 18, count 0 2006.229.22:37:40.15#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:37:40.15#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:37:40.15#ibcon#[27=USB\r\n] 2006.229.22:37:40.15#ibcon#*before write, iclass 18, count 0 2006.229.22:37:40.15#ibcon#enter sib2, iclass 18, count 0 2006.229.22:37:40.15#ibcon#flushed, iclass 18, count 0 2006.229.22:37:40.15#ibcon#about to write, iclass 18, count 0 2006.229.22:37:40.15#ibcon#wrote, iclass 18, count 0 2006.229.22:37:40.15#ibcon#about to read 3, iclass 18, count 0 2006.229.22:37:40.18#ibcon#read 3, iclass 18, count 0 2006.229.22:37:40.18#ibcon#about to read 4, iclass 18, count 0 2006.229.22:37:40.18#ibcon#read 4, iclass 18, count 0 2006.229.22:37:40.18#ibcon#about to read 5, iclass 18, count 0 2006.229.22:37:40.18#ibcon#read 5, iclass 18, count 0 2006.229.22:37:40.18#ibcon#about to read 6, iclass 18, count 0 2006.229.22:37:40.18#ibcon#read 6, iclass 18, count 0 2006.229.22:37:40.18#ibcon#end of sib2, iclass 18, count 0 2006.229.22:37:40.18#ibcon#*after write, iclass 18, count 0 2006.229.22:37:40.18#ibcon#*before return 0, iclass 18, count 0 2006.229.22:37:40.18#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:37:40.18#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:37:40.18#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:37:40.18#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:37:40.18$vck44/vblo=2,634.99 2006.229.22:37:40.18#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.22:37:40.18#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.22:37:40.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:40.18#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:40.18#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:40.18#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:40.18#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:37:40.18#ibcon#first serial, iclass 24, count 0 2006.229.22:37:40.18#ibcon#enter sib2, iclass 24, count 0 2006.229.22:37:40.18#ibcon#flushed, iclass 24, count 0 2006.229.22:37:40.18#ibcon#about to write, iclass 24, count 0 2006.229.22:37:40.18#ibcon#wrote, iclass 24, count 0 2006.229.22:37:40.18#ibcon#about to read 3, iclass 24, count 0 2006.229.22:37:40.20#ibcon#read 3, iclass 24, count 0 2006.229.22:37:40.20#ibcon#about to read 4, iclass 24, count 0 2006.229.22:37:40.20#ibcon#read 4, iclass 24, count 0 2006.229.22:37:40.20#ibcon#about to read 5, iclass 24, count 0 2006.229.22:37:40.20#ibcon#read 5, iclass 24, count 0 2006.229.22:37:40.20#ibcon#about to read 6, iclass 24, count 0 2006.229.22:37:40.20#ibcon#read 6, iclass 24, count 0 2006.229.22:37:40.20#ibcon#end of sib2, iclass 24, count 0 2006.229.22:37:40.20#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:37:40.20#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:37:40.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:37:40.20#ibcon#*before write, iclass 24, count 0 2006.229.22:37:40.20#ibcon#enter sib2, iclass 24, count 0 2006.229.22:37:40.20#ibcon#flushed, iclass 24, count 0 2006.229.22:37:40.20#ibcon#about to write, iclass 24, count 0 2006.229.22:37:40.20#ibcon#wrote, iclass 24, count 0 2006.229.22:37:40.20#ibcon#about to read 3, iclass 24, count 0 2006.229.22:37:40.24#ibcon#read 3, iclass 24, count 0 2006.229.22:37:40.24#ibcon#about to read 4, iclass 24, count 0 2006.229.22:37:40.24#ibcon#read 4, iclass 24, count 0 2006.229.22:37:40.24#ibcon#about to read 5, iclass 24, count 0 2006.229.22:37:40.24#ibcon#read 5, iclass 24, count 0 2006.229.22:37:40.24#ibcon#about to read 6, iclass 24, count 0 2006.229.22:37:40.24#ibcon#read 6, iclass 24, count 0 2006.229.22:37:40.24#ibcon#end of sib2, iclass 24, count 0 2006.229.22:37:40.24#ibcon#*after write, iclass 24, count 0 2006.229.22:37:40.24#ibcon#*before return 0, iclass 24, count 0 2006.229.22:37:40.24#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:40.24#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:37:40.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:37:40.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:37:40.24$vck44/vb=2,4 2006.229.22:37:40.24#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.22:37:40.24#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.22:37:40.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:40.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:40.30#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:40.30#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:40.30#ibcon#enter wrdev, iclass 26, count 2 2006.229.22:37:40.30#ibcon#first serial, iclass 26, count 2 2006.229.22:37:40.30#ibcon#enter sib2, iclass 26, count 2 2006.229.22:37:40.30#ibcon#flushed, iclass 26, count 2 2006.229.22:37:40.30#ibcon#about to write, iclass 26, count 2 2006.229.22:37:40.30#ibcon#wrote, iclass 26, count 2 2006.229.22:37:40.30#ibcon#about to read 3, iclass 26, count 2 2006.229.22:37:40.32#ibcon#read 3, iclass 26, count 2 2006.229.22:37:40.32#ibcon#about to read 4, iclass 26, count 2 2006.229.22:37:40.32#ibcon#read 4, iclass 26, count 2 2006.229.22:37:40.32#ibcon#about to read 5, iclass 26, count 2 2006.229.22:37:40.32#ibcon#read 5, iclass 26, count 2 2006.229.22:37:40.32#ibcon#about to read 6, iclass 26, count 2 2006.229.22:37:40.32#ibcon#read 6, iclass 26, count 2 2006.229.22:37:40.32#ibcon#end of sib2, iclass 26, count 2 2006.229.22:37:40.32#ibcon#*mode == 0, iclass 26, count 2 2006.229.22:37:40.32#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.22:37:40.32#ibcon#[27=AT02-04\r\n] 2006.229.22:37:40.32#ibcon#*before write, iclass 26, count 2 2006.229.22:37:40.32#ibcon#enter sib2, iclass 26, count 2 2006.229.22:37:40.32#ibcon#flushed, iclass 26, count 2 2006.229.22:37:40.32#ibcon#about to write, iclass 26, count 2 2006.229.22:37:40.32#ibcon#wrote, iclass 26, count 2 2006.229.22:37:40.32#ibcon#about to read 3, iclass 26, count 2 2006.229.22:37:40.35#ibcon#read 3, iclass 26, count 2 2006.229.22:37:40.35#ibcon#about to read 4, iclass 26, count 2 2006.229.22:37:40.35#ibcon#read 4, iclass 26, count 2 2006.229.22:37:40.35#ibcon#about to read 5, iclass 26, count 2 2006.229.22:37:40.35#ibcon#read 5, iclass 26, count 2 2006.229.22:37:40.35#ibcon#about to read 6, iclass 26, count 2 2006.229.22:37:40.35#ibcon#read 6, iclass 26, count 2 2006.229.22:37:40.35#ibcon#end of sib2, iclass 26, count 2 2006.229.22:37:40.35#ibcon#*after write, iclass 26, count 2 2006.229.22:37:40.35#ibcon#*before return 0, iclass 26, count 2 2006.229.22:37:40.35#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:40.35#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:37:40.35#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.22:37:40.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:40.35#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:40.47#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:40.47#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:40.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:37:40.47#ibcon#first serial, iclass 26, count 0 2006.229.22:37:40.47#ibcon#enter sib2, iclass 26, count 0 2006.229.22:37:40.47#ibcon#flushed, iclass 26, count 0 2006.229.22:37:40.47#ibcon#about to write, iclass 26, count 0 2006.229.22:37:40.47#ibcon#wrote, iclass 26, count 0 2006.229.22:37:40.47#ibcon#about to read 3, iclass 26, count 0 2006.229.22:37:40.49#ibcon#read 3, iclass 26, count 0 2006.229.22:37:40.49#ibcon#about to read 4, iclass 26, count 0 2006.229.22:37:40.49#ibcon#read 4, iclass 26, count 0 2006.229.22:37:40.49#ibcon#about to read 5, iclass 26, count 0 2006.229.22:37:40.49#ibcon#read 5, iclass 26, count 0 2006.229.22:37:40.49#ibcon#about to read 6, iclass 26, count 0 2006.229.22:37:40.49#ibcon#read 6, iclass 26, count 0 2006.229.22:37:40.49#ibcon#end of sib2, iclass 26, count 0 2006.229.22:37:40.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:37:40.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:37:40.49#ibcon#[27=USB\r\n] 2006.229.22:37:40.49#ibcon#*before write, iclass 26, count 0 2006.229.22:37:40.49#ibcon#enter sib2, iclass 26, count 0 2006.229.22:37:40.49#ibcon#flushed, iclass 26, count 0 2006.229.22:37:40.49#ibcon#about to write, iclass 26, count 0 2006.229.22:37:40.49#ibcon#wrote, iclass 26, count 0 2006.229.22:37:40.49#ibcon#about to read 3, iclass 26, count 0 2006.229.22:37:40.52#ibcon#read 3, iclass 26, count 0 2006.229.22:37:40.52#ibcon#about to read 4, iclass 26, count 0 2006.229.22:37:40.52#ibcon#read 4, iclass 26, count 0 2006.229.22:37:40.52#ibcon#about to read 5, iclass 26, count 0 2006.229.22:37:40.52#ibcon#read 5, iclass 26, count 0 2006.229.22:37:40.52#ibcon#about to read 6, iclass 26, count 0 2006.229.22:37:40.52#ibcon#read 6, iclass 26, count 0 2006.229.22:37:40.52#ibcon#end of sib2, iclass 26, count 0 2006.229.22:37:40.52#ibcon#*after write, iclass 26, count 0 2006.229.22:37:40.52#ibcon#*before return 0, iclass 26, count 0 2006.229.22:37:40.52#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:40.52#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:37:40.52#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:37:40.52#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:37:40.52$vck44/vblo=3,649.99 2006.229.22:37:40.52#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.22:37:40.52#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.22:37:40.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:40.52#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:40.52#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:40.52#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:40.52#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:37:40.52#ibcon#first serial, iclass 28, count 0 2006.229.22:37:40.52#ibcon#enter sib2, iclass 28, count 0 2006.229.22:37:40.52#ibcon#flushed, iclass 28, count 0 2006.229.22:37:40.52#ibcon#about to write, iclass 28, count 0 2006.229.22:37:40.52#ibcon#wrote, iclass 28, count 0 2006.229.22:37:40.52#ibcon#about to read 3, iclass 28, count 0 2006.229.22:37:40.54#ibcon#read 3, iclass 28, count 0 2006.229.22:37:40.54#ibcon#about to read 4, iclass 28, count 0 2006.229.22:37:40.54#ibcon#read 4, iclass 28, count 0 2006.229.22:37:40.54#ibcon#about to read 5, iclass 28, count 0 2006.229.22:37:40.54#ibcon#read 5, iclass 28, count 0 2006.229.22:37:40.54#ibcon#about to read 6, iclass 28, count 0 2006.229.22:37:40.54#ibcon#read 6, iclass 28, count 0 2006.229.22:37:40.54#ibcon#end of sib2, iclass 28, count 0 2006.229.22:37:40.54#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:37:40.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:37:40.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:37:40.54#ibcon#*before write, iclass 28, count 0 2006.229.22:37:40.54#ibcon#enter sib2, iclass 28, count 0 2006.229.22:37:40.54#ibcon#flushed, iclass 28, count 0 2006.229.22:37:40.54#ibcon#about to write, iclass 28, count 0 2006.229.22:37:40.54#ibcon#wrote, iclass 28, count 0 2006.229.22:37:40.54#ibcon#about to read 3, iclass 28, count 0 2006.229.22:37:40.58#ibcon#read 3, iclass 28, count 0 2006.229.22:37:40.58#ibcon#about to read 4, iclass 28, count 0 2006.229.22:37:40.58#ibcon#read 4, iclass 28, count 0 2006.229.22:37:40.58#ibcon#about to read 5, iclass 28, count 0 2006.229.22:37:40.58#ibcon#read 5, iclass 28, count 0 2006.229.22:37:40.58#ibcon#about to read 6, iclass 28, count 0 2006.229.22:37:40.58#ibcon#read 6, iclass 28, count 0 2006.229.22:37:40.58#ibcon#end of sib2, iclass 28, count 0 2006.229.22:37:40.58#ibcon#*after write, iclass 28, count 0 2006.229.22:37:40.58#ibcon#*before return 0, iclass 28, count 0 2006.229.22:37:40.58#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:40.58#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:37:40.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:37:40.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:37:40.58$vck44/vb=3,4 2006.229.22:37:40.58#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.22:37:40.58#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.22:37:40.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:40.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:40.64#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:40.64#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:40.64#ibcon#enter wrdev, iclass 30, count 2 2006.229.22:37:40.64#ibcon#first serial, iclass 30, count 2 2006.229.22:37:40.64#ibcon#enter sib2, iclass 30, count 2 2006.229.22:37:40.64#ibcon#flushed, iclass 30, count 2 2006.229.22:37:40.64#ibcon#about to write, iclass 30, count 2 2006.229.22:37:40.64#ibcon#wrote, iclass 30, count 2 2006.229.22:37:40.64#ibcon#about to read 3, iclass 30, count 2 2006.229.22:37:40.66#ibcon#read 3, iclass 30, count 2 2006.229.22:37:40.66#ibcon#about to read 4, iclass 30, count 2 2006.229.22:37:40.66#ibcon#read 4, iclass 30, count 2 2006.229.22:37:40.66#ibcon#about to read 5, iclass 30, count 2 2006.229.22:37:40.66#ibcon#read 5, iclass 30, count 2 2006.229.22:37:40.66#ibcon#about to read 6, iclass 30, count 2 2006.229.22:37:40.66#ibcon#read 6, iclass 30, count 2 2006.229.22:37:40.66#ibcon#end of sib2, iclass 30, count 2 2006.229.22:37:40.66#ibcon#*mode == 0, iclass 30, count 2 2006.229.22:37:40.66#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.22:37:40.66#ibcon#[27=AT03-04\r\n] 2006.229.22:37:40.66#ibcon#*before write, iclass 30, count 2 2006.229.22:37:40.66#ibcon#enter sib2, iclass 30, count 2 2006.229.22:37:40.66#ibcon#flushed, iclass 30, count 2 2006.229.22:37:40.66#ibcon#about to write, iclass 30, count 2 2006.229.22:37:40.66#ibcon#wrote, iclass 30, count 2 2006.229.22:37:40.66#ibcon#about to read 3, iclass 30, count 2 2006.229.22:37:40.69#ibcon#read 3, iclass 30, count 2 2006.229.22:37:40.69#ibcon#about to read 4, iclass 30, count 2 2006.229.22:37:40.69#ibcon#read 4, iclass 30, count 2 2006.229.22:37:40.69#ibcon#about to read 5, iclass 30, count 2 2006.229.22:37:40.69#ibcon#read 5, iclass 30, count 2 2006.229.22:37:40.69#ibcon#about to read 6, iclass 30, count 2 2006.229.22:37:40.69#ibcon#read 6, iclass 30, count 2 2006.229.22:37:40.69#ibcon#end of sib2, iclass 30, count 2 2006.229.22:37:40.69#ibcon#*after write, iclass 30, count 2 2006.229.22:37:40.69#ibcon#*before return 0, iclass 30, count 2 2006.229.22:37:40.69#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:40.69#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:37:40.69#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.22:37:40.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:40.69#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:40.81#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:40.81#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:40.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:37:40.81#ibcon#first serial, iclass 30, count 0 2006.229.22:37:40.81#ibcon#enter sib2, iclass 30, count 0 2006.229.22:37:40.81#ibcon#flushed, iclass 30, count 0 2006.229.22:37:40.81#ibcon#about to write, iclass 30, count 0 2006.229.22:37:40.81#ibcon#wrote, iclass 30, count 0 2006.229.22:37:40.81#ibcon#about to read 3, iclass 30, count 0 2006.229.22:37:40.83#ibcon#read 3, iclass 30, count 0 2006.229.22:37:40.83#ibcon#about to read 4, iclass 30, count 0 2006.229.22:37:40.83#ibcon#read 4, iclass 30, count 0 2006.229.22:37:40.83#ibcon#about to read 5, iclass 30, count 0 2006.229.22:37:40.83#ibcon#read 5, iclass 30, count 0 2006.229.22:37:40.83#ibcon#about to read 6, iclass 30, count 0 2006.229.22:37:40.83#ibcon#read 6, iclass 30, count 0 2006.229.22:37:40.83#ibcon#end of sib2, iclass 30, count 0 2006.229.22:37:40.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:37:40.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:37:40.83#ibcon#[27=USB\r\n] 2006.229.22:37:40.83#ibcon#*before write, iclass 30, count 0 2006.229.22:37:40.83#ibcon#enter sib2, iclass 30, count 0 2006.229.22:37:40.83#ibcon#flushed, iclass 30, count 0 2006.229.22:37:40.83#ibcon#about to write, iclass 30, count 0 2006.229.22:37:40.83#ibcon#wrote, iclass 30, count 0 2006.229.22:37:40.83#ibcon#about to read 3, iclass 30, count 0 2006.229.22:37:40.86#ibcon#read 3, iclass 30, count 0 2006.229.22:37:40.86#ibcon#about to read 4, iclass 30, count 0 2006.229.22:37:40.86#ibcon#read 4, iclass 30, count 0 2006.229.22:37:40.86#ibcon#about to read 5, iclass 30, count 0 2006.229.22:37:40.86#ibcon#read 5, iclass 30, count 0 2006.229.22:37:40.86#ibcon#about to read 6, iclass 30, count 0 2006.229.22:37:40.86#ibcon#read 6, iclass 30, count 0 2006.229.22:37:40.86#ibcon#end of sib2, iclass 30, count 0 2006.229.22:37:40.86#ibcon#*after write, iclass 30, count 0 2006.229.22:37:40.86#ibcon#*before return 0, iclass 30, count 0 2006.229.22:37:40.86#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:40.86#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:37:40.86#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:37:40.86#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:37:40.86$vck44/vblo=4,679.99 2006.229.22:37:40.86#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.22:37:40.86#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.22:37:40.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:40.86#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:40.86#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:40.86#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:40.86#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:37:40.86#ibcon#first serial, iclass 32, count 0 2006.229.22:37:40.86#ibcon#enter sib2, iclass 32, count 0 2006.229.22:37:40.86#ibcon#flushed, iclass 32, count 0 2006.229.22:37:40.86#ibcon#about to write, iclass 32, count 0 2006.229.22:37:40.86#ibcon#wrote, iclass 32, count 0 2006.229.22:37:40.86#ibcon#about to read 3, iclass 32, count 0 2006.229.22:37:40.88#ibcon#read 3, iclass 32, count 0 2006.229.22:37:40.88#ibcon#about to read 4, iclass 32, count 0 2006.229.22:37:40.88#ibcon#read 4, iclass 32, count 0 2006.229.22:37:40.88#ibcon#about to read 5, iclass 32, count 0 2006.229.22:37:40.88#ibcon#read 5, iclass 32, count 0 2006.229.22:37:40.88#ibcon#about to read 6, iclass 32, count 0 2006.229.22:37:40.88#ibcon#read 6, iclass 32, count 0 2006.229.22:37:40.88#ibcon#end of sib2, iclass 32, count 0 2006.229.22:37:40.88#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:37:40.88#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:37:40.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:37:40.88#ibcon#*before write, iclass 32, count 0 2006.229.22:37:40.88#ibcon#enter sib2, iclass 32, count 0 2006.229.22:37:40.88#ibcon#flushed, iclass 32, count 0 2006.229.22:37:40.88#ibcon#about to write, iclass 32, count 0 2006.229.22:37:40.88#ibcon#wrote, iclass 32, count 0 2006.229.22:37:40.88#ibcon#about to read 3, iclass 32, count 0 2006.229.22:37:40.92#ibcon#read 3, iclass 32, count 0 2006.229.22:37:40.92#ibcon#about to read 4, iclass 32, count 0 2006.229.22:37:40.92#ibcon#read 4, iclass 32, count 0 2006.229.22:37:40.92#ibcon#about to read 5, iclass 32, count 0 2006.229.22:37:40.92#ibcon#read 5, iclass 32, count 0 2006.229.22:37:40.92#ibcon#about to read 6, iclass 32, count 0 2006.229.22:37:40.92#ibcon#read 6, iclass 32, count 0 2006.229.22:37:40.92#ibcon#end of sib2, iclass 32, count 0 2006.229.22:37:40.92#ibcon#*after write, iclass 32, count 0 2006.229.22:37:40.92#ibcon#*before return 0, iclass 32, count 0 2006.229.22:37:40.92#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:40.92#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:37:40.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:37:40.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:37:40.92$vck44/vb=4,4 2006.229.22:37:40.92#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.22:37:40.92#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.22:37:40.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:40.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:40.98#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:40.98#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:40.98#ibcon#enter wrdev, iclass 34, count 2 2006.229.22:37:40.98#ibcon#first serial, iclass 34, count 2 2006.229.22:37:40.98#ibcon#enter sib2, iclass 34, count 2 2006.229.22:37:40.98#ibcon#flushed, iclass 34, count 2 2006.229.22:37:40.98#ibcon#about to write, iclass 34, count 2 2006.229.22:37:40.98#ibcon#wrote, iclass 34, count 2 2006.229.22:37:40.98#ibcon#about to read 3, iclass 34, count 2 2006.229.22:37:41.00#ibcon#read 3, iclass 34, count 2 2006.229.22:37:41.00#ibcon#about to read 4, iclass 34, count 2 2006.229.22:37:41.00#ibcon#read 4, iclass 34, count 2 2006.229.22:37:41.00#ibcon#about to read 5, iclass 34, count 2 2006.229.22:37:41.00#ibcon#read 5, iclass 34, count 2 2006.229.22:37:41.00#ibcon#about to read 6, iclass 34, count 2 2006.229.22:37:41.00#ibcon#read 6, iclass 34, count 2 2006.229.22:37:41.00#ibcon#end of sib2, iclass 34, count 2 2006.229.22:37:41.00#ibcon#*mode == 0, iclass 34, count 2 2006.229.22:37:41.00#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.22:37:41.00#ibcon#[27=AT04-04\r\n] 2006.229.22:37:41.00#ibcon#*before write, iclass 34, count 2 2006.229.22:37:41.00#ibcon#enter sib2, iclass 34, count 2 2006.229.22:37:41.00#ibcon#flushed, iclass 34, count 2 2006.229.22:37:41.00#ibcon#about to write, iclass 34, count 2 2006.229.22:37:41.00#ibcon#wrote, iclass 34, count 2 2006.229.22:37:41.00#ibcon#about to read 3, iclass 34, count 2 2006.229.22:37:41.03#ibcon#read 3, iclass 34, count 2 2006.229.22:37:41.03#ibcon#about to read 4, iclass 34, count 2 2006.229.22:37:41.03#ibcon#read 4, iclass 34, count 2 2006.229.22:37:41.03#ibcon#about to read 5, iclass 34, count 2 2006.229.22:37:41.03#ibcon#read 5, iclass 34, count 2 2006.229.22:37:41.03#ibcon#about to read 6, iclass 34, count 2 2006.229.22:37:41.03#ibcon#read 6, iclass 34, count 2 2006.229.22:37:41.03#ibcon#end of sib2, iclass 34, count 2 2006.229.22:37:41.03#ibcon#*after write, iclass 34, count 2 2006.229.22:37:41.03#ibcon#*before return 0, iclass 34, count 2 2006.229.22:37:41.03#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:41.03#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:37:41.03#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.22:37:41.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:41.03#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:41.15#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:41.15#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:41.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:37:41.15#ibcon#first serial, iclass 34, count 0 2006.229.22:37:41.15#ibcon#enter sib2, iclass 34, count 0 2006.229.22:37:41.15#ibcon#flushed, iclass 34, count 0 2006.229.22:37:41.15#ibcon#about to write, iclass 34, count 0 2006.229.22:37:41.15#ibcon#wrote, iclass 34, count 0 2006.229.22:37:41.15#ibcon#about to read 3, iclass 34, count 0 2006.229.22:37:41.17#ibcon#read 3, iclass 34, count 0 2006.229.22:37:41.17#ibcon#about to read 4, iclass 34, count 0 2006.229.22:37:41.17#ibcon#read 4, iclass 34, count 0 2006.229.22:37:41.17#ibcon#about to read 5, iclass 34, count 0 2006.229.22:37:41.17#ibcon#read 5, iclass 34, count 0 2006.229.22:37:41.17#ibcon#about to read 6, iclass 34, count 0 2006.229.22:37:41.17#ibcon#read 6, iclass 34, count 0 2006.229.22:37:41.17#ibcon#end of sib2, iclass 34, count 0 2006.229.22:37:41.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:37:41.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:37:41.17#ibcon#[27=USB\r\n] 2006.229.22:37:41.17#ibcon#*before write, iclass 34, count 0 2006.229.22:37:41.17#ibcon#enter sib2, iclass 34, count 0 2006.229.22:37:41.17#ibcon#flushed, iclass 34, count 0 2006.229.22:37:41.17#ibcon#about to write, iclass 34, count 0 2006.229.22:37:41.17#ibcon#wrote, iclass 34, count 0 2006.229.22:37:41.17#ibcon#about to read 3, iclass 34, count 0 2006.229.22:37:41.20#ibcon#read 3, iclass 34, count 0 2006.229.22:37:41.20#ibcon#about to read 4, iclass 34, count 0 2006.229.22:37:41.20#ibcon#read 4, iclass 34, count 0 2006.229.22:37:41.20#ibcon#about to read 5, iclass 34, count 0 2006.229.22:37:41.20#ibcon#read 5, iclass 34, count 0 2006.229.22:37:41.20#ibcon#about to read 6, iclass 34, count 0 2006.229.22:37:41.20#ibcon#read 6, iclass 34, count 0 2006.229.22:37:41.20#ibcon#end of sib2, iclass 34, count 0 2006.229.22:37:41.20#ibcon#*after write, iclass 34, count 0 2006.229.22:37:41.20#ibcon#*before return 0, iclass 34, count 0 2006.229.22:37:41.20#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:41.20#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:37:41.20#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:37:41.20#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:37:41.20$vck44/vblo=5,709.99 2006.229.22:37:41.20#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.22:37:41.20#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.22:37:41.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:41.20#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:41.20#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:41.20#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:41.20#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:37:41.20#ibcon#first serial, iclass 36, count 0 2006.229.22:37:41.20#ibcon#enter sib2, iclass 36, count 0 2006.229.22:37:41.20#ibcon#flushed, iclass 36, count 0 2006.229.22:37:41.20#ibcon#about to write, iclass 36, count 0 2006.229.22:37:41.20#ibcon#wrote, iclass 36, count 0 2006.229.22:37:41.20#ibcon#about to read 3, iclass 36, count 0 2006.229.22:37:41.22#ibcon#read 3, iclass 36, count 0 2006.229.22:37:41.22#ibcon#about to read 4, iclass 36, count 0 2006.229.22:37:41.22#ibcon#read 4, iclass 36, count 0 2006.229.22:37:41.22#ibcon#about to read 5, iclass 36, count 0 2006.229.22:37:41.22#ibcon#read 5, iclass 36, count 0 2006.229.22:37:41.22#ibcon#about to read 6, iclass 36, count 0 2006.229.22:37:41.22#ibcon#read 6, iclass 36, count 0 2006.229.22:37:41.22#ibcon#end of sib2, iclass 36, count 0 2006.229.22:37:41.22#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:37:41.22#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:37:41.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:37:41.22#ibcon#*before write, iclass 36, count 0 2006.229.22:37:41.22#ibcon#enter sib2, iclass 36, count 0 2006.229.22:37:41.22#ibcon#flushed, iclass 36, count 0 2006.229.22:37:41.22#ibcon#about to write, iclass 36, count 0 2006.229.22:37:41.22#ibcon#wrote, iclass 36, count 0 2006.229.22:37:41.22#ibcon#about to read 3, iclass 36, count 0 2006.229.22:37:41.26#ibcon#read 3, iclass 36, count 0 2006.229.22:37:41.26#ibcon#about to read 4, iclass 36, count 0 2006.229.22:37:41.26#ibcon#read 4, iclass 36, count 0 2006.229.22:37:41.26#ibcon#about to read 5, iclass 36, count 0 2006.229.22:37:41.26#ibcon#read 5, iclass 36, count 0 2006.229.22:37:41.26#ibcon#about to read 6, iclass 36, count 0 2006.229.22:37:41.26#ibcon#read 6, iclass 36, count 0 2006.229.22:37:41.26#ibcon#end of sib2, iclass 36, count 0 2006.229.22:37:41.26#ibcon#*after write, iclass 36, count 0 2006.229.22:37:41.26#ibcon#*before return 0, iclass 36, count 0 2006.229.22:37:41.26#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:41.26#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:37:41.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:37:41.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:37:41.26$vck44/vb=5,4 2006.229.22:37:41.26#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.22:37:41.26#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.22:37:41.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:41.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:41.32#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:41.32#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:41.32#ibcon#enter wrdev, iclass 38, count 2 2006.229.22:37:41.32#ibcon#first serial, iclass 38, count 2 2006.229.22:37:41.32#ibcon#enter sib2, iclass 38, count 2 2006.229.22:37:41.32#ibcon#flushed, iclass 38, count 2 2006.229.22:37:41.32#ibcon#about to write, iclass 38, count 2 2006.229.22:37:41.32#ibcon#wrote, iclass 38, count 2 2006.229.22:37:41.32#ibcon#about to read 3, iclass 38, count 2 2006.229.22:37:41.34#ibcon#read 3, iclass 38, count 2 2006.229.22:37:41.34#ibcon#about to read 4, iclass 38, count 2 2006.229.22:37:41.34#ibcon#read 4, iclass 38, count 2 2006.229.22:37:41.34#ibcon#about to read 5, iclass 38, count 2 2006.229.22:37:41.34#ibcon#read 5, iclass 38, count 2 2006.229.22:37:41.34#ibcon#about to read 6, iclass 38, count 2 2006.229.22:37:41.34#ibcon#read 6, iclass 38, count 2 2006.229.22:37:41.34#ibcon#end of sib2, iclass 38, count 2 2006.229.22:37:41.34#ibcon#*mode == 0, iclass 38, count 2 2006.229.22:37:41.34#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.22:37:41.34#ibcon#[27=AT05-04\r\n] 2006.229.22:37:41.34#ibcon#*before write, iclass 38, count 2 2006.229.22:37:41.34#ibcon#enter sib2, iclass 38, count 2 2006.229.22:37:41.34#ibcon#flushed, iclass 38, count 2 2006.229.22:37:41.34#ibcon#about to write, iclass 38, count 2 2006.229.22:37:41.34#ibcon#wrote, iclass 38, count 2 2006.229.22:37:41.34#ibcon#about to read 3, iclass 38, count 2 2006.229.22:37:41.37#ibcon#read 3, iclass 38, count 2 2006.229.22:37:41.37#ibcon#about to read 4, iclass 38, count 2 2006.229.22:37:41.37#ibcon#read 4, iclass 38, count 2 2006.229.22:37:41.37#ibcon#about to read 5, iclass 38, count 2 2006.229.22:37:41.37#ibcon#read 5, iclass 38, count 2 2006.229.22:37:41.37#ibcon#about to read 6, iclass 38, count 2 2006.229.22:37:41.37#ibcon#read 6, iclass 38, count 2 2006.229.22:37:41.37#ibcon#end of sib2, iclass 38, count 2 2006.229.22:37:41.37#ibcon#*after write, iclass 38, count 2 2006.229.22:37:41.37#ibcon#*before return 0, iclass 38, count 2 2006.229.22:37:41.37#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:41.37#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:37:41.37#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.22:37:41.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:41.37#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:41.49#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:41.49#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:41.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:37:41.49#ibcon#first serial, iclass 38, count 0 2006.229.22:37:41.49#ibcon#enter sib2, iclass 38, count 0 2006.229.22:37:41.49#ibcon#flushed, iclass 38, count 0 2006.229.22:37:41.49#ibcon#about to write, iclass 38, count 0 2006.229.22:37:41.49#ibcon#wrote, iclass 38, count 0 2006.229.22:37:41.49#ibcon#about to read 3, iclass 38, count 0 2006.229.22:37:41.51#ibcon#read 3, iclass 38, count 0 2006.229.22:37:41.51#ibcon#about to read 4, iclass 38, count 0 2006.229.22:37:41.51#ibcon#read 4, iclass 38, count 0 2006.229.22:37:41.51#ibcon#about to read 5, iclass 38, count 0 2006.229.22:37:41.51#ibcon#read 5, iclass 38, count 0 2006.229.22:37:41.51#ibcon#about to read 6, iclass 38, count 0 2006.229.22:37:41.51#ibcon#read 6, iclass 38, count 0 2006.229.22:37:41.51#ibcon#end of sib2, iclass 38, count 0 2006.229.22:37:41.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:37:41.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:37:41.51#ibcon#[27=USB\r\n] 2006.229.22:37:41.51#ibcon#*before write, iclass 38, count 0 2006.229.22:37:41.51#ibcon#enter sib2, iclass 38, count 0 2006.229.22:37:41.51#ibcon#flushed, iclass 38, count 0 2006.229.22:37:41.51#ibcon#about to write, iclass 38, count 0 2006.229.22:37:41.51#ibcon#wrote, iclass 38, count 0 2006.229.22:37:41.51#ibcon#about to read 3, iclass 38, count 0 2006.229.22:37:41.54#ibcon#read 3, iclass 38, count 0 2006.229.22:37:41.54#ibcon#about to read 4, iclass 38, count 0 2006.229.22:37:41.54#ibcon#read 4, iclass 38, count 0 2006.229.22:37:41.54#ibcon#about to read 5, iclass 38, count 0 2006.229.22:37:41.54#ibcon#read 5, iclass 38, count 0 2006.229.22:37:41.54#ibcon#about to read 6, iclass 38, count 0 2006.229.22:37:41.54#ibcon#read 6, iclass 38, count 0 2006.229.22:37:41.54#ibcon#end of sib2, iclass 38, count 0 2006.229.22:37:41.54#ibcon#*after write, iclass 38, count 0 2006.229.22:37:41.54#ibcon#*before return 0, iclass 38, count 0 2006.229.22:37:41.54#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:41.54#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:37:41.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:37:41.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:37:41.54$vck44/vblo=6,719.99 2006.229.22:37:41.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.22:37:41.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.22:37:41.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:41.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:41.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:41.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:41.54#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:37:41.54#ibcon#first serial, iclass 40, count 0 2006.229.22:37:41.54#ibcon#enter sib2, iclass 40, count 0 2006.229.22:37:41.54#ibcon#flushed, iclass 40, count 0 2006.229.22:37:41.54#ibcon#about to write, iclass 40, count 0 2006.229.22:37:41.54#ibcon#wrote, iclass 40, count 0 2006.229.22:37:41.54#ibcon#about to read 3, iclass 40, count 0 2006.229.22:37:41.56#ibcon#read 3, iclass 40, count 0 2006.229.22:37:41.56#ibcon#about to read 4, iclass 40, count 0 2006.229.22:37:41.56#ibcon#read 4, iclass 40, count 0 2006.229.22:37:41.56#ibcon#about to read 5, iclass 40, count 0 2006.229.22:37:41.56#ibcon#read 5, iclass 40, count 0 2006.229.22:37:41.56#ibcon#about to read 6, iclass 40, count 0 2006.229.22:37:41.56#ibcon#read 6, iclass 40, count 0 2006.229.22:37:41.56#ibcon#end of sib2, iclass 40, count 0 2006.229.22:37:41.56#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:37:41.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:37:41.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:37:41.56#ibcon#*before write, iclass 40, count 0 2006.229.22:37:41.56#ibcon#enter sib2, iclass 40, count 0 2006.229.22:37:41.56#ibcon#flushed, iclass 40, count 0 2006.229.22:37:41.56#ibcon#about to write, iclass 40, count 0 2006.229.22:37:41.56#ibcon#wrote, iclass 40, count 0 2006.229.22:37:41.56#ibcon#about to read 3, iclass 40, count 0 2006.229.22:37:41.60#ibcon#read 3, iclass 40, count 0 2006.229.22:37:41.60#ibcon#about to read 4, iclass 40, count 0 2006.229.22:37:41.60#ibcon#read 4, iclass 40, count 0 2006.229.22:37:41.60#ibcon#about to read 5, iclass 40, count 0 2006.229.22:37:41.60#ibcon#read 5, iclass 40, count 0 2006.229.22:37:41.60#ibcon#about to read 6, iclass 40, count 0 2006.229.22:37:41.60#ibcon#read 6, iclass 40, count 0 2006.229.22:37:41.60#ibcon#end of sib2, iclass 40, count 0 2006.229.22:37:41.60#ibcon#*after write, iclass 40, count 0 2006.229.22:37:41.60#ibcon#*before return 0, iclass 40, count 0 2006.229.22:37:41.60#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:41.60#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:37:41.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:37:41.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:37:41.60$vck44/vb=6,4 2006.229.22:37:41.60#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.22:37:41.60#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.22:37:41.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:41.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:41.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:41.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:41.66#ibcon#enter wrdev, iclass 4, count 2 2006.229.22:37:41.66#ibcon#first serial, iclass 4, count 2 2006.229.22:37:41.66#ibcon#enter sib2, iclass 4, count 2 2006.229.22:37:41.66#ibcon#flushed, iclass 4, count 2 2006.229.22:37:41.66#ibcon#about to write, iclass 4, count 2 2006.229.22:37:41.66#ibcon#wrote, iclass 4, count 2 2006.229.22:37:41.66#ibcon#about to read 3, iclass 4, count 2 2006.229.22:37:41.68#ibcon#read 3, iclass 4, count 2 2006.229.22:37:41.68#ibcon#about to read 4, iclass 4, count 2 2006.229.22:37:41.68#ibcon#read 4, iclass 4, count 2 2006.229.22:37:41.68#ibcon#about to read 5, iclass 4, count 2 2006.229.22:37:41.68#ibcon#read 5, iclass 4, count 2 2006.229.22:37:41.68#ibcon#about to read 6, iclass 4, count 2 2006.229.22:37:41.68#ibcon#read 6, iclass 4, count 2 2006.229.22:37:41.68#ibcon#end of sib2, iclass 4, count 2 2006.229.22:37:41.68#ibcon#*mode == 0, iclass 4, count 2 2006.229.22:37:41.68#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.22:37:41.68#ibcon#[27=AT06-04\r\n] 2006.229.22:37:41.68#ibcon#*before write, iclass 4, count 2 2006.229.22:37:41.68#ibcon#enter sib2, iclass 4, count 2 2006.229.22:37:41.68#ibcon#flushed, iclass 4, count 2 2006.229.22:37:41.68#ibcon#about to write, iclass 4, count 2 2006.229.22:37:41.68#ibcon#wrote, iclass 4, count 2 2006.229.22:37:41.68#ibcon#about to read 3, iclass 4, count 2 2006.229.22:37:41.71#ibcon#read 3, iclass 4, count 2 2006.229.22:37:41.71#ibcon#about to read 4, iclass 4, count 2 2006.229.22:37:41.71#ibcon#read 4, iclass 4, count 2 2006.229.22:37:41.71#ibcon#about to read 5, iclass 4, count 2 2006.229.22:37:41.71#ibcon#read 5, iclass 4, count 2 2006.229.22:37:41.71#ibcon#about to read 6, iclass 4, count 2 2006.229.22:37:41.71#ibcon#read 6, iclass 4, count 2 2006.229.22:37:41.71#ibcon#end of sib2, iclass 4, count 2 2006.229.22:37:41.71#ibcon#*after write, iclass 4, count 2 2006.229.22:37:41.71#ibcon#*before return 0, iclass 4, count 2 2006.229.22:37:41.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:41.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.22:37:41.71#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.22:37:41.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:41.71#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:41.83#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:41.83#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:41.83#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:37:41.83#ibcon#first serial, iclass 4, count 0 2006.229.22:37:41.83#ibcon#enter sib2, iclass 4, count 0 2006.229.22:37:41.83#ibcon#flushed, iclass 4, count 0 2006.229.22:37:41.83#ibcon#about to write, iclass 4, count 0 2006.229.22:37:41.83#ibcon#wrote, iclass 4, count 0 2006.229.22:37:41.83#ibcon#about to read 3, iclass 4, count 0 2006.229.22:37:41.85#ibcon#read 3, iclass 4, count 0 2006.229.22:37:41.85#ibcon#about to read 4, iclass 4, count 0 2006.229.22:37:41.85#ibcon#read 4, iclass 4, count 0 2006.229.22:37:41.85#ibcon#about to read 5, iclass 4, count 0 2006.229.22:37:41.85#ibcon#read 5, iclass 4, count 0 2006.229.22:37:41.85#ibcon#about to read 6, iclass 4, count 0 2006.229.22:37:41.85#ibcon#read 6, iclass 4, count 0 2006.229.22:37:41.85#ibcon#end of sib2, iclass 4, count 0 2006.229.22:37:41.85#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:37:41.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:37:41.85#ibcon#[27=USB\r\n] 2006.229.22:37:41.85#ibcon#*before write, iclass 4, count 0 2006.229.22:37:41.85#ibcon#enter sib2, iclass 4, count 0 2006.229.22:37:41.85#ibcon#flushed, iclass 4, count 0 2006.229.22:37:41.85#ibcon#about to write, iclass 4, count 0 2006.229.22:37:41.85#ibcon#wrote, iclass 4, count 0 2006.229.22:37:41.85#ibcon#about to read 3, iclass 4, count 0 2006.229.22:37:41.88#ibcon#read 3, iclass 4, count 0 2006.229.22:37:41.88#ibcon#about to read 4, iclass 4, count 0 2006.229.22:37:41.88#ibcon#read 4, iclass 4, count 0 2006.229.22:37:41.88#ibcon#about to read 5, iclass 4, count 0 2006.229.22:37:41.88#ibcon#read 5, iclass 4, count 0 2006.229.22:37:41.88#ibcon#about to read 6, iclass 4, count 0 2006.229.22:37:41.88#ibcon#read 6, iclass 4, count 0 2006.229.22:37:41.88#ibcon#end of sib2, iclass 4, count 0 2006.229.22:37:41.88#ibcon#*after write, iclass 4, count 0 2006.229.22:37:41.88#ibcon#*before return 0, iclass 4, count 0 2006.229.22:37:41.88#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:41.88#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.22:37:41.88#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:37:41.88#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:37:41.88$vck44/vblo=7,734.99 2006.229.22:37:41.88#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.22:37:41.88#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.22:37:41.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:41.88#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:41.88#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:41.88#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:41.88#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:37:41.88#ibcon#first serial, iclass 6, count 0 2006.229.22:37:41.88#ibcon#enter sib2, iclass 6, count 0 2006.229.22:37:41.88#ibcon#flushed, iclass 6, count 0 2006.229.22:37:41.88#ibcon#about to write, iclass 6, count 0 2006.229.22:37:41.88#ibcon#wrote, iclass 6, count 0 2006.229.22:37:41.88#ibcon#about to read 3, iclass 6, count 0 2006.229.22:37:41.90#ibcon#read 3, iclass 6, count 0 2006.229.22:37:41.90#ibcon#about to read 4, iclass 6, count 0 2006.229.22:37:41.90#ibcon#read 4, iclass 6, count 0 2006.229.22:37:41.90#ibcon#about to read 5, iclass 6, count 0 2006.229.22:37:41.90#ibcon#read 5, iclass 6, count 0 2006.229.22:37:41.90#ibcon#about to read 6, iclass 6, count 0 2006.229.22:37:41.90#ibcon#read 6, iclass 6, count 0 2006.229.22:37:41.90#ibcon#end of sib2, iclass 6, count 0 2006.229.22:37:41.90#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:37:41.90#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:37:41.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:37:41.90#ibcon#*before write, iclass 6, count 0 2006.229.22:37:41.90#ibcon#enter sib2, iclass 6, count 0 2006.229.22:37:41.90#ibcon#flushed, iclass 6, count 0 2006.229.22:37:41.90#ibcon#about to write, iclass 6, count 0 2006.229.22:37:41.90#ibcon#wrote, iclass 6, count 0 2006.229.22:37:41.90#ibcon#about to read 3, iclass 6, count 0 2006.229.22:37:41.94#ibcon#read 3, iclass 6, count 0 2006.229.22:37:41.94#ibcon#about to read 4, iclass 6, count 0 2006.229.22:37:41.94#ibcon#read 4, iclass 6, count 0 2006.229.22:37:41.94#ibcon#about to read 5, iclass 6, count 0 2006.229.22:37:41.94#ibcon#read 5, iclass 6, count 0 2006.229.22:37:41.94#ibcon#about to read 6, iclass 6, count 0 2006.229.22:37:41.94#ibcon#read 6, iclass 6, count 0 2006.229.22:37:41.94#ibcon#end of sib2, iclass 6, count 0 2006.229.22:37:41.94#ibcon#*after write, iclass 6, count 0 2006.229.22:37:41.94#ibcon#*before return 0, iclass 6, count 0 2006.229.22:37:41.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:41.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:37:41.94#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:37:41.94#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:37:41.94$vck44/vb=7,4 2006.229.22:37:41.94#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.22:37:41.94#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.22:37:41.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:41.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:42.00#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:42.00#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:42.00#ibcon#enter wrdev, iclass 10, count 2 2006.229.22:37:42.00#ibcon#first serial, iclass 10, count 2 2006.229.22:37:42.00#ibcon#enter sib2, iclass 10, count 2 2006.229.22:37:42.00#ibcon#flushed, iclass 10, count 2 2006.229.22:37:42.00#ibcon#about to write, iclass 10, count 2 2006.229.22:37:42.00#ibcon#wrote, iclass 10, count 2 2006.229.22:37:42.00#ibcon#about to read 3, iclass 10, count 2 2006.229.22:37:42.02#ibcon#read 3, iclass 10, count 2 2006.229.22:37:42.02#ibcon#about to read 4, iclass 10, count 2 2006.229.22:37:42.02#ibcon#read 4, iclass 10, count 2 2006.229.22:37:42.02#ibcon#about to read 5, iclass 10, count 2 2006.229.22:37:42.02#ibcon#read 5, iclass 10, count 2 2006.229.22:37:42.02#ibcon#about to read 6, iclass 10, count 2 2006.229.22:37:42.02#ibcon#read 6, iclass 10, count 2 2006.229.22:37:42.02#ibcon#end of sib2, iclass 10, count 2 2006.229.22:37:42.02#ibcon#*mode == 0, iclass 10, count 2 2006.229.22:37:42.02#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.22:37:42.02#ibcon#[27=AT07-04\r\n] 2006.229.22:37:42.02#ibcon#*before write, iclass 10, count 2 2006.229.22:37:42.02#ibcon#enter sib2, iclass 10, count 2 2006.229.22:37:42.02#ibcon#flushed, iclass 10, count 2 2006.229.22:37:42.02#ibcon#about to write, iclass 10, count 2 2006.229.22:37:42.02#ibcon#wrote, iclass 10, count 2 2006.229.22:37:42.02#ibcon#about to read 3, iclass 10, count 2 2006.229.22:37:42.05#ibcon#read 3, iclass 10, count 2 2006.229.22:37:42.05#ibcon#about to read 4, iclass 10, count 2 2006.229.22:37:42.05#ibcon#read 4, iclass 10, count 2 2006.229.22:37:42.05#ibcon#about to read 5, iclass 10, count 2 2006.229.22:37:42.05#ibcon#read 5, iclass 10, count 2 2006.229.22:37:42.05#ibcon#about to read 6, iclass 10, count 2 2006.229.22:37:42.05#ibcon#read 6, iclass 10, count 2 2006.229.22:37:42.05#ibcon#end of sib2, iclass 10, count 2 2006.229.22:37:42.05#ibcon#*after write, iclass 10, count 2 2006.229.22:37:42.05#ibcon#*before return 0, iclass 10, count 2 2006.229.22:37:42.05#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:42.05#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:37:42.05#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.22:37:42.05#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:42.05#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:42.17#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:42.17#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:42.17#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:37:42.17#ibcon#first serial, iclass 10, count 0 2006.229.22:37:42.17#ibcon#enter sib2, iclass 10, count 0 2006.229.22:37:42.17#ibcon#flushed, iclass 10, count 0 2006.229.22:37:42.17#ibcon#about to write, iclass 10, count 0 2006.229.22:37:42.17#ibcon#wrote, iclass 10, count 0 2006.229.22:37:42.17#ibcon#about to read 3, iclass 10, count 0 2006.229.22:37:42.19#ibcon#read 3, iclass 10, count 0 2006.229.22:37:42.19#ibcon#about to read 4, iclass 10, count 0 2006.229.22:37:42.19#ibcon#read 4, iclass 10, count 0 2006.229.22:37:42.19#ibcon#about to read 5, iclass 10, count 0 2006.229.22:37:42.19#ibcon#read 5, iclass 10, count 0 2006.229.22:37:42.19#ibcon#about to read 6, iclass 10, count 0 2006.229.22:37:42.19#ibcon#read 6, iclass 10, count 0 2006.229.22:37:42.19#ibcon#end of sib2, iclass 10, count 0 2006.229.22:37:42.19#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:37:42.19#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:37:42.19#ibcon#[27=USB\r\n] 2006.229.22:37:42.19#ibcon#*before write, iclass 10, count 0 2006.229.22:37:42.19#ibcon#enter sib2, iclass 10, count 0 2006.229.22:37:42.19#ibcon#flushed, iclass 10, count 0 2006.229.22:37:42.19#ibcon#about to write, iclass 10, count 0 2006.229.22:37:42.19#ibcon#wrote, iclass 10, count 0 2006.229.22:37:42.19#ibcon#about to read 3, iclass 10, count 0 2006.229.22:37:42.22#ibcon#read 3, iclass 10, count 0 2006.229.22:37:42.22#ibcon#about to read 4, iclass 10, count 0 2006.229.22:37:42.22#ibcon#read 4, iclass 10, count 0 2006.229.22:37:42.22#ibcon#about to read 5, iclass 10, count 0 2006.229.22:37:42.22#ibcon#read 5, iclass 10, count 0 2006.229.22:37:42.22#ibcon#about to read 6, iclass 10, count 0 2006.229.22:37:42.22#ibcon#read 6, iclass 10, count 0 2006.229.22:37:42.22#ibcon#end of sib2, iclass 10, count 0 2006.229.22:37:42.22#ibcon#*after write, iclass 10, count 0 2006.229.22:37:42.22#ibcon#*before return 0, iclass 10, count 0 2006.229.22:37:42.22#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:42.22#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:37:42.22#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:37:42.22#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:37:42.22$vck44/vblo=8,744.99 2006.229.22:37:42.22#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.22:37:42.22#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.22:37:42.22#ibcon#ireg 17 cls_cnt 0 2006.229.22:37:42.22#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:42.22#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:42.22#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:42.22#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:37:42.22#ibcon#first serial, iclass 12, count 0 2006.229.22:37:42.22#ibcon#enter sib2, iclass 12, count 0 2006.229.22:37:42.22#ibcon#flushed, iclass 12, count 0 2006.229.22:37:42.22#ibcon#about to write, iclass 12, count 0 2006.229.22:37:42.22#ibcon#wrote, iclass 12, count 0 2006.229.22:37:42.22#ibcon#about to read 3, iclass 12, count 0 2006.229.22:37:42.24#ibcon#read 3, iclass 12, count 0 2006.229.22:37:42.24#ibcon#about to read 4, iclass 12, count 0 2006.229.22:37:42.24#ibcon#read 4, iclass 12, count 0 2006.229.22:37:42.24#ibcon#about to read 5, iclass 12, count 0 2006.229.22:37:42.24#ibcon#read 5, iclass 12, count 0 2006.229.22:37:42.24#ibcon#about to read 6, iclass 12, count 0 2006.229.22:37:42.24#ibcon#read 6, iclass 12, count 0 2006.229.22:37:42.24#ibcon#end of sib2, iclass 12, count 0 2006.229.22:37:42.24#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:37:42.24#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:37:42.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:37:42.24#ibcon#*before write, iclass 12, count 0 2006.229.22:37:42.24#ibcon#enter sib2, iclass 12, count 0 2006.229.22:37:42.24#ibcon#flushed, iclass 12, count 0 2006.229.22:37:42.24#ibcon#about to write, iclass 12, count 0 2006.229.22:37:42.24#ibcon#wrote, iclass 12, count 0 2006.229.22:37:42.24#ibcon#about to read 3, iclass 12, count 0 2006.229.22:37:42.28#ibcon#read 3, iclass 12, count 0 2006.229.22:37:42.28#ibcon#about to read 4, iclass 12, count 0 2006.229.22:37:42.28#ibcon#read 4, iclass 12, count 0 2006.229.22:37:42.28#ibcon#about to read 5, iclass 12, count 0 2006.229.22:37:42.28#ibcon#read 5, iclass 12, count 0 2006.229.22:37:42.28#ibcon#about to read 6, iclass 12, count 0 2006.229.22:37:42.28#ibcon#read 6, iclass 12, count 0 2006.229.22:37:42.28#ibcon#end of sib2, iclass 12, count 0 2006.229.22:37:42.28#ibcon#*after write, iclass 12, count 0 2006.229.22:37:42.28#ibcon#*before return 0, iclass 12, count 0 2006.229.22:37:42.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:42.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:37:42.28#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:37:42.28#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:37:42.28$vck44/vb=8,4 2006.229.22:37:42.28#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.22:37:42.28#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.22:37:42.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:37:42.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:42.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:42.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:42.34#ibcon#enter wrdev, iclass 14, count 2 2006.229.22:37:42.34#ibcon#first serial, iclass 14, count 2 2006.229.22:37:42.34#ibcon#enter sib2, iclass 14, count 2 2006.229.22:37:42.34#ibcon#flushed, iclass 14, count 2 2006.229.22:37:42.34#ibcon#about to write, iclass 14, count 2 2006.229.22:37:42.34#ibcon#wrote, iclass 14, count 2 2006.229.22:37:42.34#ibcon#about to read 3, iclass 14, count 2 2006.229.22:37:42.36#ibcon#read 3, iclass 14, count 2 2006.229.22:37:42.36#ibcon#about to read 4, iclass 14, count 2 2006.229.22:37:42.36#ibcon#read 4, iclass 14, count 2 2006.229.22:37:42.36#ibcon#about to read 5, iclass 14, count 2 2006.229.22:37:42.36#ibcon#read 5, iclass 14, count 2 2006.229.22:37:42.36#ibcon#about to read 6, iclass 14, count 2 2006.229.22:37:42.36#ibcon#read 6, iclass 14, count 2 2006.229.22:37:42.36#ibcon#end of sib2, iclass 14, count 2 2006.229.22:37:42.36#ibcon#*mode == 0, iclass 14, count 2 2006.229.22:37:42.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.22:37:42.36#ibcon#[27=AT08-04\r\n] 2006.229.22:37:42.36#ibcon#*before write, iclass 14, count 2 2006.229.22:37:42.36#ibcon#enter sib2, iclass 14, count 2 2006.229.22:37:42.36#ibcon#flushed, iclass 14, count 2 2006.229.22:37:42.36#ibcon#about to write, iclass 14, count 2 2006.229.22:37:42.36#ibcon#wrote, iclass 14, count 2 2006.229.22:37:42.36#ibcon#about to read 3, iclass 14, count 2 2006.229.22:37:42.39#ibcon#read 3, iclass 14, count 2 2006.229.22:37:42.39#ibcon#about to read 4, iclass 14, count 2 2006.229.22:37:42.39#ibcon#read 4, iclass 14, count 2 2006.229.22:37:42.39#ibcon#about to read 5, iclass 14, count 2 2006.229.22:37:42.39#ibcon#read 5, iclass 14, count 2 2006.229.22:37:42.39#ibcon#about to read 6, iclass 14, count 2 2006.229.22:37:42.39#ibcon#read 6, iclass 14, count 2 2006.229.22:37:42.39#ibcon#end of sib2, iclass 14, count 2 2006.229.22:37:42.39#ibcon#*after write, iclass 14, count 2 2006.229.22:37:42.39#ibcon#*before return 0, iclass 14, count 2 2006.229.22:37:42.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:42.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:37:42.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.22:37:42.39#ibcon#ireg 7 cls_cnt 0 2006.229.22:37:42.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:42.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:42.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:42.51#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:37:42.51#ibcon#first serial, iclass 14, count 0 2006.229.22:37:42.51#ibcon#enter sib2, iclass 14, count 0 2006.229.22:37:42.51#ibcon#flushed, iclass 14, count 0 2006.229.22:37:42.51#ibcon#about to write, iclass 14, count 0 2006.229.22:37:42.51#ibcon#wrote, iclass 14, count 0 2006.229.22:37:42.51#ibcon#about to read 3, iclass 14, count 0 2006.229.22:37:42.53#ibcon#read 3, iclass 14, count 0 2006.229.22:37:42.53#ibcon#about to read 4, iclass 14, count 0 2006.229.22:37:42.53#ibcon#read 4, iclass 14, count 0 2006.229.22:37:42.53#ibcon#about to read 5, iclass 14, count 0 2006.229.22:37:42.53#ibcon#read 5, iclass 14, count 0 2006.229.22:37:42.53#ibcon#about to read 6, iclass 14, count 0 2006.229.22:37:42.53#ibcon#read 6, iclass 14, count 0 2006.229.22:37:42.53#ibcon#end of sib2, iclass 14, count 0 2006.229.22:37:42.53#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:37:42.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:37:42.53#ibcon#[27=USB\r\n] 2006.229.22:37:42.53#ibcon#*before write, iclass 14, count 0 2006.229.22:37:42.53#ibcon#enter sib2, iclass 14, count 0 2006.229.22:37:42.53#ibcon#flushed, iclass 14, count 0 2006.229.22:37:42.53#ibcon#about to write, iclass 14, count 0 2006.229.22:37:42.53#ibcon#wrote, iclass 14, count 0 2006.229.22:37:42.53#ibcon#about to read 3, iclass 14, count 0 2006.229.22:37:42.56#ibcon#read 3, iclass 14, count 0 2006.229.22:37:42.56#ibcon#about to read 4, iclass 14, count 0 2006.229.22:37:42.56#ibcon#read 4, iclass 14, count 0 2006.229.22:37:42.56#ibcon#about to read 5, iclass 14, count 0 2006.229.22:37:42.56#ibcon#read 5, iclass 14, count 0 2006.229.22:37:42.56#ibcon#about to read 6, iclass 14, count 0 2006.229.22:37:42.56#ibcon#read 6, iclass 14, count 0 2006.229.22:37:42.56#ibcon#end of sib2, iclass 14, count 0 2006.229.22:37:42.56#ibcon#*after write, iclass 14, count 0 2006.229.22:37:42.56#ibcon#*before return 0, iclass 14, count 0 2006.229.22:37:42.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:42.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:37:42.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:37:42.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:37:42.56$vck44/vabw=wide 2006.229.22:37:42.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.22:37:42.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.22:37:42.56#ibcon#ireg 8 cls_cnt 0 2006.229.22:37:42.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:42.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:42.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:42.56#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:37:42.56#ibcon#first serial, iclass 16, count 0 2006.229.22:37:42.56#ibcon#enter sib2, iclass 16, count 0 2006.229.22:37:42.56#ibcon#flushed, iclass 16, count 0 2006.229.22:37:42.56#ibcon#about to write, iclass 16, count 0 2006.229.22:37:42.56#ibcon#wrote, iclass 16, count 0 2006.229.22:37:42.56#ibcon#about to read 3, iclass 16, count 0 2006.229.22:37:42.58#ibcon#read 3, iclass 16, count 0 2006.229.22:37:42.58#ibcon#about to read 4, iclass 16, count 0 2006.229.22:37:42.58#ibcon#read 4, iclass 16, count 0 2006.229.22:37:42.58#ibcon#about to read 5, iclass 16, count 0 2006.229.22:37:42.58#ibcon#read 5, iclass 16, count 0 2006.229.22:37:42.58#ibcon#about to read 6, iclass 16, count 0 2006.229.22:37:42.58#ibcon#read 6, iclass 16, count 0 2006.229.22:37:42.58#ibcon#end of sib2, iclass 16, count 0 2006.229.22:37:42.58#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:37:42.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:37:42.58#ibcon#[25=BW32\r\n] 2006.229.22:37:42.58#ibcon#*before write, iclass 16, count 0 2006.229.22:37:42.58#ibcon#enter sib2, iclass 16, count 0 2006.229.22:37:42.58#ibcon#flushed, iclass 16, count 0 2006.229.22:37:42.58#ibcon#about to write, iclass 16, count 0 2006.229.22:37:42.58#ibcon#wrote, iclass 16, count 0 2006.229.22:37:42.58#ibcon#about to read 3, iclass 16, count 0 2006.229.22:37:42.61#ibcon#read 3, iclass 16, count 0 2006.229.22:37:42.61#ibcon#about to read 4, iclass 16, count 0 2006.229.22:37:42.61#ibcon#read 4, iclass 16, count 0 2006.229.22:37:42.61#ibcon#about to read 5, iclass 16, count 0 2006.229.22:37:42.61#ibcon#read 5, iclass 16, count 0 2006.229.22:37:42.61#ibcon#about to read 6, iclass 16, count 0 2006.229.22:37:42.61#ibcon#read 6, iclass 16, count 0 2006.229.22:37:42.61#ibcon#end of sib2, iclass 16, count 0 2006.229.22:37:42.61#ibcon#*after write, iclass 16, count 0 2006.229.22:37:42.61#ibcon#*before return 0, iclass 16, count 0 2006.229.22:37:42.61#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:42.61#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:37:42.61#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:37:42.61#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:37:42.61$vck44/vbbw=wide 2006.229.22:37:42.61#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:37:42.61#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:37:42.61#ibcon#ireg 8 cls_cnt 0 2006.229.22:37:42.61#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:37:42.68#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:37:42.68#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:37:42.68#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:37:42.68#ibcon#first serial, iclass 18, count 0 2006.229.22:37:42.68#ibcon#enter sib2, iclass 18, count 0 2006.229.22:37:42.68#ibcon#flushed, iclass 18, count 0 2006.229.22:37:42.68#ibcon#about to write, iclass 18, count 0 2006.229.22:37:42.68#ibcon#wrote, iclass 18, count 0 2006.229.22:37:42.68#ibcon#about to read 3, iclass 18, count 0 2006.229.22:37:42.70#ibcon#read 3, iclass 18, count 0 2006.229.22:37:42.70#ibcon#about to read 4, iclass 18, count 0 2006.229.22:37:42.70#ibcon#read 4, iclass 18, count 0 2006.229.22:37:42.70#ibcon#about to read 5, iclass 18, count 0 2006.229.22:37:42.70#ibcon#read 5, iclass 18, count 0 2006.229.22:37:42.70#ibcon#about to read 6, iclass 18, count 0 2006.229.22:37:42.70#ibcon#read 6, iclass 18, count 0 2006.229.22:37:42.70#ibcon#end of sib2, iclass 18, count 0 2006.229.22:37:42.70#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:37:42.70#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:37:42.70#ibcon#[27=BW32\r\n] 2006.229.22:37:42.70#ibcon#*before write, iclass 18, count 0 2006.229.22:37:42.70#ibcon#enter sib2, iclass 18, count 0 2006.229.22:37:42.70#ibcon#flushed, iclass 18, count 0 2006.229.22:37:42.70#ibcon#about to write, iclass 18, count 0 2006.229.22:37:42.70#ibcon#wrote, iclass 18, count 0 2006.229.22:37:42.70#ibcon#about to read 3, iclass 18, count 0 2006.229.22:37:42.73#ibcon#read 3, iclass 18, count 0 2006.229.22:37:42.73#ibcon#about to read 4, iclass 18, count 0 2006.229.22:37:42.73#ibcon#read 4, iclass 18, count 0 2006.229.22:37:42.73#ibcon#about to read 5, iclass 18, count 0 2006.229.22:37:42.73#ibcon#read 5, iclass 18, count 0 2006.229.22:37:42.73#ibcon#about to read 6, iclass 18, count 0 2006.229.22:37:42.73#ibcon#read 6, iclass 18, count 0 2006.229.22:37:42.73#ibcon#end of sib2, iclass 18, count 0 2006.229.22:37:42.73#ibcon#*after write, iclass 18, count 0 2006.229.22:37:42.73#ibcon#*before return 0, iclass 18, count 0 2006.229.22:37:42.73#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:37:42.73#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:37:42.73#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:37:42.73#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:37:42.73$setupk4/ifdk4 2006.229.22:37:42.73$ifdk4/lo= 2006.229.22:37:42.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:37:42.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:37:42.73$ifdk4/patch= 2006.229.22:37:42.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:37:42.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:37:42.73$setupk4/!*+20s 2006.229.22:37:50.21#abcon#<5=/09 1.1 4.6 28.78 891002.5\r\n> 2006.229.22:37:50.23#abcon#{5=INTERFACE CLEAR} 2006.229.22:37:50.29#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:37:51.13#trakl#Source acquired 2006.229.22:37:51.13#flagr#flagr/antenna,acquired 2006.229.22:37:57.23$setupk4/"tpicd 2006.229.22:37:57.23$setupk4/echo=off 2006.229.22:37:57.23$setupk4/xlog=off 2006.229.22:37:57.23:!2006.229.22:39:53 2006.229.22:39:53.01:preob 2006.229.22:39:54.15/onsource/TRACKING 2006.229.22:39:54.15:!2006.229.22:40:03 2006.229.22:40:03.02:"tape 2006.229.22:40:03.02:"st=record 2006.229.22:40:03.02:data_valid=on 2006.229.22:40:03.02:midob 2006.229.22:40:04.15/onsource/TRACKING 2006.229.22:40:04.15/wx/28.71,1002.5,91 2006.229.22:40:04.34/cable/+6.4175E-03 2006.229.22:40:05.43/va/01,08,usb,yes,29,31 2006.229.22:40:05.43/va/02,07,usb,yes,31,32 2006.229.22:40:05.43/va/03,06,usb,yes,39,41 2006.229.22:40:05.43/va/04,07,usb,yes,32,34 2006.229.22:40:05.43/va/05,04,usb,yes,29,29 2006.229.22:40:05.43/va/06,04,usb,yes,32,32 2006.229.22:40:05.43/va/07,05,usb,yes,28,29 2006.229.22:40:05.43/va/08,06,usb,yes,21,26 2006.229.22:40:05.66/valo/01,524.99,yes,locked 2006.229.22:40:05.66/valo/02,534.99,yes,locked 2006.229.22:40:05.66/valo/03,564.99,yes,locked 2006.229.22:40:05.66/valo/04,624.99,yes,locked 2006.229.22:40:05.66/valo/05,734.99,yes,locked 2006.229.22:40:05.66/valo/06,814.99,yes,locked 2006.229.22:40:05.66/valo/07,864.99,yes,locked 2006.229.22:40:05.66/valo/08,884.99,yes,locked 2006.229.22:40:06.75/vb/01,04,usb,yes,31,28 2006.229.22:40:06.75/vb/02,04,usb,yes,33,33 2006.229.22:40:06.75/vb/03,04,usb,yes,30,33 2006.229.22:40:06.75/vb/04,04,usb,yes,34,33 2006.229.22:40:06.75/vb/05,04,usb,yes,28,29 2006.229.22:40:06.75/vb/06,04,usb,yes,31,28 2006.229.22:40:06.75/vb/07,04,usb,yes,31,31 2006.229.22:40:06.75/vb/08,04,usb,yes,28,32 2006.229.22:40:06.99/vblo/01,629.99,yes,locked 2006.229.22:40:06.99/vblo/02,634.99,yes,locked 2006.229.22:40:06.99/vblo/03,649.99,yes,locked 2006.229.22:40:06.99/vblo/04,679.99,yes,locked 2006.229.22:40:06.99/vblo/05,709.99,yes,locked 2006.229.22:40:06.99/vblo/06,719.99,yes,locked 2006.229.22:40:06.99/vblo/07,734.99,yes,locked 2006.229.22:40:06.99/vblo/08,744.99,yes,locked 2006.229.22:40:07.14/vabw/8 2006.229.22:40:07.29/vbbw/8 2006.229.22:40:07.38/xfe/off,on,12.2 2006.229.22:40:07.76/ifatt/23,28,28,28 2006.229.22:40:08.07/fmout-gps/S +4.55E-07 2006.229.22:40:08.12:!2006.229.22:45:13 2006.229.22:45:13.00:data_valid=off 2006.229.22:45:13.01:"et 2006.229.22:45:13.01:!+3s 2006.229.22:45:16.02:"tape 2006.229.22:45:16.03:postob 2006.229.22:45:16.09/cable/+6.4173E-03 2006.229.22:45:16.10/wx/28.85,1002.6,91 2006.229.22:45:16.15/fmout-gps/S +4.54E-07 2006.229.22:45:16.16:scan_name=229-2250,jd0608,70 2006.229.22:45:16.16:source=0727-115,073019.11,-114112.6,2000.0,ccw 2006.229.22:45:17.13#flagr#flagr/antenna,new-source 2006.229.22:45:17.14:checkk5 2006.229.22:45:17.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:45:17.94/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:45:18.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:45:18.75/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:45:19.14/chk_obsdata//k5ts1/T2292240??a.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.22:45:19.52/chk_obsdata//k5ts2/T2292240??b.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.22:45:19.91/chk_obsdata//k5ts3/T2292240??c.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.22:45:20.31/chk_obsdata//k5ts4/T2292240??d.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.22:45:21.04/k5log//k5ts1_log_newline 2006.229.22:45:21.74/k5log//k5ts2_log_newline 2006.229.22:45:22.44/k5log//k5ts3_log_newline 2006.229.22:45:23.19/k5log//k5ts4_log_newline 2006.229.22:45:23.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:45:23.22:setupk4=1 2006.229.22:45:23.22$setupk4/echo=on 2006.229.22:45:23.22$setupk4/pcalon 2006.229.22:45:23.22$pcalon/"no phase cal control is implemented here 2006.229.22:45:23.22$setupk4/"tpicd=stop 2006.229.22:45:23.22$setupk4/"rec=synch_on 2006.229.22:45:23.22$setupk4/"rec_mode=128 2006.229.22:45:23.22$setupk4/!* 2006.229.22:45:23.22$setupk4/recpk4 2006.229.22:45:23.22$recpk4/recpatch= 2006.229.22:45:23.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:45:23.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:45:23.22$setupk4/vck44 2006.229.22:45:23.22$vck44/valo=1,524.99 2006.229.22:45:23.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.22:45:23.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.22:45:23.22#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:23.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:23.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:23.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:23.22#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:45:23.22#ibcon#first serial, iclass 23, count 0 2006.229.22:45:23.22#ibcon#enter sib2, iclass 23, count 0 2006.229.22:45:23.22#ibcon#flushed, iclass 23, count 0 2006.229.22:45:23.22#ibcon#about to write, iclass 23, count 0 2006.229.22:45:23.22#ibcon#wrote, iclass 23, count 0 2006.229.22:45:23.22#ibcon#about to read 3, iclass 23, count 0 2006.229.22:45:23.23#ibcon#read 3, iclass 23, count 0 2006.229.22:45:23.23#ibcon#about to read 4, iclass 23, count 0 2006.229.22:45:23.23#ibcon#read 4, iclass 23, count 0 2006.229.22:45:23.23#ibcon#about to read 5, iclass 23, count 0 2006.229.22:45:23.23#ibcon#read 5, iclass 23, count 0 2006.229.22:45:23.23#ibcon#about to read 6, iclass 23, count 0 2006.229.22:45:23.23#ibcon#read 6, iclass 23, count 0 2006.229.22:45:23.23#ibcon#end of sib2, iclass 23, count 0 2006.229.22:45:23.23#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:45:23.23#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:45:23.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:45:23.23#ibcon#*before write, iclass 23, count 0 2006.229.22:45:23.23#ibcon#enter sib2, iclass 23, count 0 2006.229.22:45:23.23#ibcon#flushed, iclass 23, count 0 2006.229.22:45:23.23#ibcon#about to write, iclass 23, count 0 2006.229.22:45:23.23#ibcon#wrote, iclass 23, count 0 2006.229.22:45:23.23#ibcon#about to read 3, iclass 23, count 0 2006.229.22:45:23.28#ibcon#read 3, iclass 23, count 0 2006.229.22:45:23.28#ibcon#about to read 4, iclass 23, count 0 2006.229.22:45:23.28#ibcon#read 4, iclass 23, count 0 2006.229.22:45:23.28#ibcon#about to read 5, iclass 23, count 0 2006.229.22:45:23.28#ibcon#read 5, iclass 23, count 0 2006.229.22:45:23.28#ibcon#about to read 6, iclass 23, count 0 2006.229.22:45:23.28#ibcon#read 6, iclass 23, count 0 2006.229.22:45:23.28#ibcon#end of sib2, iclass 23, count 0 2006.229.22:45:23.28#ibcon#*after write, iclass 23, count 0 2006.229.22:45:23.28#ibcon#*before return 0, iclass 23, count 0 2006.229.22:45:23.28#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:23.28#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:23.28#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:45:23.28#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:45:23.28$vck44/va=1,8 2006.229.22:45:23.28#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.22:45:23.28#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.22:45:23.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:23.28#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:23.28#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:23.28#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:23.28#ibcon#enter wrdev, iclass 25, count 2 2006.229.22:45:23.28#ibcon#first serial, iclass 25, count 2 2006.229.22:45:23.28#ibcon#enter sib2, iclass 25, count 2 2006.229.22:45:23.28#ibcon#flushed, iclass 25, count 2 2006.229.22:45:23.28#ibcon#about to write, iclass 25, count 2 2006.229.22:45:23.29#ibcon#wrote, iclass 25, count 2 2006.229.22:45:23.29#ibcon#about to read 3, iclass 25, count 2 2006.229.22:45:23.30#ibcon#read 3, iclass 25, count 2 2006.229.22:45:23.30#ibcon#about to read 4, iclass 25, count 2 2006.229.22:45:23.30#ibcon#read 4, iclass 25, count 2 2006.229.22:45:23.30#ibcon#about to read 5, iclass 25, count 2 2006.229.22:45:23.30#ibcon#read 5, iclass 25, count 2 2006.229.22:45:23.30#ibcon#about to read 6, iclass 25, count 2 2006.229.22:45:23.30#ibcon#read 6, iclass 25, count 2 2006.229.22:45:23.30#ibcon#end of sib2, iclass 25, count 2 2006.229.22:45:23.30#ibcon#*mode == 0, iclass 25, count 2 2006.229.22:45:23.30#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.22:45:23.30#ibcon#[25=AT01-08\r\n] 2006.229.22:45:23.30#ibcon#*before write, iclass 25, count 2 2006.229.22:45:23.30#ibcon#enter sib2, iclass 25, count 2 2006.229.22:45:23.30#ibcon#flushed, iclass 25, count 2 2006.229.22:45:23.30#ibcon#about to write, iclass 25, count 2 2006.229.22:45:23.30#ibcon#wrote, iclass 25, count 2 2006.229.22:45:23.30#ibcon#about to read 3, iclass 25, count 2 2006.229.22:45:23.33#ibcon#read 3, iclass 25, count 2 2006.229.22:45:23.33#ibcon#about to read 4, iclass 25, count 2 2006.229.22:45:23.33#ibcon#read 4, iclass 25, count 2 2006.229.22:45:23.33#ibcon#about to read 5, iclass 25, count 2 2006.229.22:45:23.33#ibcon#read 5, iclass 25, count 2 2006.229.22:45:23.33#ibcon#about to read 6, iclass 25, count 2 2006.229.22:45:23.33#ibcon#read 6, iclass 25, count 2 2006.229.22:45:23.33#ibcon#end of sib2, iclass 25, count 2 2006.229.22:45:23.33#ibcon#*after write, iclass 25, count 2 2006.229.22:45:23.33#ibcon#*before return 0, iclass 25, count 2 2006.229.22:45:23.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:23.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:23.33#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.22:45:23.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:23.33#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:23.45#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:23.45#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:23.45#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:45:23.45#ibcon#first serial, iclass 25, count 0 2006.229.22:45:23.45#ibcon#enter sib2, iclass 25, count 0 2006.229.22:45:23.45#ibcon#flushed, iclass 25, count 0 2006.229.22:45:23.45#ibcon#about to write, iclass 25, count 0 2006.229.22:45:23.45#ibcon#wrote, iclass 25, count 0 2006.229.22:45:23.45#ibcon#about to read 3, iclass 25, count 0 2006.229.22:45:23.47#ibcon#read 3, iclass 25, count 0 2006.229.22:45:23.47#ibcon#about to read 4, iclass 25, count 0 2006.229.22:45:23.47#ibcon#read 4, iclass 25, count 0 2006.229.22:45:23.47#ibcon#about to read 5, iclass 25, count 0 2006.229.22:45:23.47#ibcon#read 5, iclass 25, count 0 2006.229.22:45:23.47#ibcon#about to read 6, iclass 25, count 0 2006.229.22:45:23.47#ibcon#read 6, iclass 25, count 0 2006.229.22:45:23.47#ibcon#end of sib2, iclass 25, count 0 2006.229.22:45:23.47#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:45:23.47#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:45:23.47#ibcon#[25=USB\r\n] 2006.229.22:45:23.47#ibcon#*before write, iclass 25, count 0 2006.229.22:45:23.47#ibcon#enter sib2, iclass 25, count 0 2006.229.22:45:23.47#ibcon#flushed, iclass 25, count 0 2006.229.22:45:23.47#ibcon#about to write, iclass 25, count 0 2006.229.22:45:23.47#ibcon#wrote, iclass 25, count 0 2006.229.22:45:23.47#ibcon#about to read 3, iclass 25, count 0 2006.229.22:45:23.50#ibcon#read 3, iclass 25, count 0 2006.229.22:45:23.50#ibcon#about to read 4, iclass 25, count 0 2006.229.22:45:23.50#ibcon#read 4, iclass 25, count 0 2006.229.22:45:23.50#ibcon#about to read 5, iclass 25, count 0 2006.229.22:45:23.50#ibcon#read 5, iclass 25, count 0 2006.229.22:45:23.50#ibcon#about to read 6, iclass 25, count 0 2006.229.22:45:23.50#ibcon#read 6, iclass 25, count 0 2006.229.22:45:23.50#ibcon#end of sib2, iclass 25, count 0 2006.229.22:45:23.50#ibcon#*after write, iclass 25, count 0 2006.229.22:45:23.50#ibcon#*before return 0, iclass 25, count 0 2006.229.22:45:23.50#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:23.50#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:23.50#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:45:23.50#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:45:23.50$vck44/valo=2,534.99 2006.229.22:45:23.50#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.22:45:23.50#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.22:45:23.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:23.50#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:23.50#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:23.50#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:23.50#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:45:23.50#ibcon#first serial, iclass 27, count 0 2006.229.22:45:23.50#ibcon#enter sib2, iclass 27, count 0 2006.229.22:45:23.50#ibcon#flushed, iclass 27, count 0 2006.229.22:45:23.50#ibcon#about to write, iclass 27, count 0 2006.229.22:45:23.50#ibcon#wrote, iclass 27, count 0 2006.229.22:45:23.50#ibcon#about to read 3, iclass 27, count 0 2006.229.22:45:23.52#ibcon#read 3, iclass 27, count 0 2006.229.22:45:23.52#ibcon#about to read 4, iclass 27, count 0 2006.229.22:45:23.52#ibcon#read 4, iclass 27, count 0 2006.229.22:45:23.52#ibcon#about to read 5, iclass 27, count 0 2006.229.22:45:23.52#ibcon#read 5, iclass 27, count 0 2006.229.22:45:23.52#ibcon#about to read 6, iclass 27, count 0 2006.229.22:45:23.52#ibcon#read 6, iclass 27, count 0 2006.229.22:45:23.52#ibcon#end of sib2, iclass 27, count 0 2006.229.22:45:23.52#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:45:23.52#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:45:23.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:45:23.52#ibcon#*before write, iclass 27, count 0 2006.229.22:45:23.52#ibcon#enter sib2, iclass 27, count 0 2006.229.22:45:23.52#ibcon#flushed, iclass 27, count 0 2006.229.22:45:23.52#ibcon#about to write, iclass 27, count 0 2006.229.22:45:23.52#ibcon#wrote, iclass 27, count 0 2006.229.22:45:23.52#ibcon#about to read 3, iclass 27, count 0 2006.229.22:45:23.56#ibcon#read 3, iclass 27, count 0 2006.229.22:45:23.56#ibcon#about to read 4, iclass 27, count 0 2006.229.22:45:23.56#ibcon#read 4, iclass 27, count 0 2006.229.22:45:23.56#ibcon#about to read 5, iclass 27, count 0 2006.229.22:45:23.56#ibcon#read 5, iclass 27, count 0 2006.229.22:45:23.56#ibcon#about to read 6, iclass 27, count 0 2006.229.22:45:23.56#ibcon#read 6, iclass 27, count 0 2006.229.22:45:23.56#ibcon#end of sib2, iclass 27, count 0 2006.229.22:45:23.56#ibcon#*after write, iclass 27, count 0 2006.229.22:45:23.56#ibcon#*before return 0, iclass 27, count 0 2006.229.22:45:23.56#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:23.56#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:23.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:45:23.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:45:23.56$vck44/va=2,7 2006.229.22:45:23.56#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.22:45:23.56#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.22:45:23.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:23.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:23.62#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:23.62#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:23.62#ibcon#enter wrdev, iclass 29, count 2 2006.229.22:45:23.62#ibcon#first serial, iclass 29, count 2 2006.229.22:45:23.62#ibcon#enter sib2, iclass 29, count 2 2006.229.22:45:23.62#ibcon#flushed, iclass 29, count 2 2006.229.22:45:23.62#ibcon#about to write, iclass 29, count 2 2006.229.22:45:23.62#ibcon#wrote, iclass 29, count 2 2006.229.22:45:23.62#ibcon#about to read 3, iclass 29, count 2 2006.229.22:45:23.64#ibcon#read 3, iclass 29, count 2 2006.229.22:45:23.64#ibcon#about to read 4, iclass 29, count 2 2006.229.22:45:23.64#ibcon#read 4, iclass 29, count 2 2006.229.22:45:23.64#ibcon#about to read 5, iclass 29, count 2 2006.229.22:45:23.64#ibcon#read 5, iclass 29, count 2 2006.229.22:45:23.64#ibcon#about to read 6, iclass 29, count 2 2006.229.22:45:23.64#ibcon#read 6, iclass 29, count 2 2006.229.22:45:23.64#ibcon#end of sib2, iclass 29, count 2 2006.229.22:45:23.64#ibcon#*mode == 0, iclass 29, count 2 2006.229.22:45:23.64#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.22:45:23.64#ibcon#[25=AT02-07\r\n] 2006.229.22:45:23.64#ibcon#*before write, iclass 29, count 2 2006.229.22:45:23.64#ibcon#enter sib2, iclass 29, count 2 2006.229.22:45:23.64#ibcon#flushed, iclass 29, count 2 2006.229.22:45:23.64#ibcon#about to write, iclass 29, count 2 2006.229.22:45:23.64#ibcon#wrote, iclass 29, count 2 2006.229.22:45:23.64#ibcon#about to read 3, iclass 29, count 2 2006.229.22:45:23.67#ibcon#read 3, iclass 29, count 2 2006.229.22:45:23.67#ibcon#about to read 4, iclass 29, count 2 2006.229.22:45:23.67#ibcon#read 4, iclass 29, count 2 2006.229.22:45:23.67#ibcon#about to read 5, iclass 29, count 2 2006.229.22:45:23.67#ibcon#read 5, iclass 29, count 2 2006.229.22:45:23.67#ibcon#about to read 6, iclass 29, count 2 2006.229.22:45:23.67#ibcon#read 6, iclass 29, count 2 2006.229.22:45:23.67#ibcon#end of sib2, iclass 29, count 2 2006.229.22:45:23.67#ibcon#*after write, iclass 29, count 2 2006.229.22:45:23.67#ibcon#*before return 0, iclass 29, count 2 2006.229.22:45:23.67#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:23.67#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:23.67#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.22:45:23.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:23.67#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:23.79#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:23.79#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:23.79#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:45:23.79#ibcon#first serial, iclass 29, count 0 2006.229.22:45:23.79#ibcon#enter sib2, iclass 29, count 0 2006.229.22:45:23.79#ibcon#flushed, iclass 29, count 0 2006.229.22:45:23.79#ibcon#about to write, iclass 29, count 0 2006.229.22:45:23.79#ibcon#wrote, iclass 29, count 0 2006.229.22:45:23.79#ibcon#about to read 3, iclass 29, count 0 2006.229.22:45:23.81#ibcon#read 3, iclass 29, count 0 2006.229.22:45:23.81#ibcon#about to read 4, iclass 29, count 0 2006.229.22:45:23.81#ibcon#read 4, iclass 29, count 0 2006.229.22:45:23.81#ibcon#about to read 5, iclass 29, count 0 2006.229.22:45:23.81#ibcon#read 5, iclass 29, count 0 2006.229.22:45:23.81#ibcon#about to read 6, iclass 29, count 0 2006.229.22:45:23.81#ibcon#read 6, iclass 29, count 0 2006.229.22:45:23.81#ibcon#end of sib2, iclass 29, count 0 2006.229.22:45:23.81#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:45:23.81#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:45:23.81#ibcon#[25=USB\r\n] 2006.229.22:45:23.81#ibcon#*before write, iclass 29, count 0 2006.229.22:45:23.81#ibcon#enter sib2, iclass 29, count 0 2006.229.22:45:23.81#ibcon#flushed, iclass 29, count 0 2006.229.22:45:23.81#ibcon#about to write, iclass 29, count 0 2006.229.22:45:23.81#ibcon#wrote, iclass 29, count 0 2006.229.22:45:23.81#ibcon#about to read 3, iclass 29, count 0 2006.229.22:45:23.84#ibcon#read 3, iclass 29, count 0 2006.229.22:45:23.84#ibcon#about to read 4, iclass 29, count 0 2006.229.22:45:23.84#ibcon#read 4, iclass 29, count 0 2006.229.22:45:23.84#ibcon#about to read 5, iclass 29, count 0 2006.229.22:45:23.84#ibcon#read 5, iclass 29, count 0 2006.229.22:45:23.84#ibcon#about to read 6, iclass 29, count 0 2006.229.22:45:23.84#ibcon#read 6, iclass 29, count 0 2006.229.22:45:23.84#ibcon#end of sib2, iclass 29, count 0 2006.229.22:45:23.84#ibcon#*after write, iclass 29, count 0 2006.229.22:45:23.84#ibcon#*before return 0, iclass 29, count 0 2006.229.22:45:23.84#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:23.84#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:23.84#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:45:23.84#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:45:23.84$vck44/valo=3,564.99 2006.229.22:45:23.84#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:45:23.84#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:45:23.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:23.84#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:23.84#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:23.84#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:23.84#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:45:23.84#ibcon#first serial, iclass 31, count 0 2006.229.22:45:23.84#ibcon#enter sib2, iclass 31, count 0 2006.229.22:45:23.84#ibcon#flushed, iclass 31, count 0 2006.229.22:45:23.84#ibcon#about to write, iclass 31, count 0 2006.229.22:45:23.84#ibcon#wrote, iclass 31, count 0 2006.229.22:45:23.84#ibcon#about to read 3, iclass 31, count 0 2006.229.22:45:23.86#ibcon#read 3, iclass 31, count 0 2006.229.22:45:23.86#ibcon#about to read 4, iclass 31, count 0 2006.229.22:45:23.86#ibcon#read 4, iclass 31, count 0 2006.229.22:45:23.86#ibcon#about to read 5, iclass 31, count 0 2006.229.22:45:23.86#ibcon#read 5, iclass 31, count 0 2006.229.22:45:23.86#ibcon#about to read 6, iclass 31, count 0 2006.229.22:45:23.86#ibcon#read 6, iclass 31, count 0 2006.229.22:45:23.86#ibcon#end of sib2, iclass 31, count 0 2006.229.22:45:23.86#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:45:23.86#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:45:23.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:45:23.86#ibcon#*before write, iclass 31, count 0 2006.229.22:45:23.86#ibcon#enter sib2, iclass 31, count 0 2006.229.22:45:23.86#ibcon#flushed, iclass 31, count 0 2006.229.22:45:23.86#ibcon#about to write, iclass 31, count 0 2006.229.22:45:23.86#ibcon#wrote, iclass 31, count 0 2006.229.22:45:23.86#ibcon#about to read 3, iclass 31, count 0 2006.229.22:45:23.90#ibcon#read 3, iclass 31, count 0 2006.229.22:45:23.90#ibcon#about to read 4, iclass 31, count 0 2006.229.22:45:23.90#ibcon#read 4, iclass 31, count 0 2006.229.22:45:23.90#ibcon#about to read 5, iclass 31, count 0 2006.229.22:45:23.90#ibcon#read 5, iclass 31, count 0 2006.229.22:45:23.90#ibcon#about to read 6, iclass 31, count 0 2006.229.22:45:23.90#ibcon#read 6, iclass 31, count 0 2006.229.22:45:23.90#ibcon#end of sib2, iclass 31, count 0 2006.229.22:45:23.90#ibcon#*after write, iclass 31, count 0 2006.229.22:45:23.90#ibcon#*before return 0, iclass 31, count 0 2006.229.22:45:23.90#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:23.90#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:23.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:45:23.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:45:23.90$vck44/va=3,6 2006.229.22:45:23.90#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.22:45:23.90#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.22:45:23.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:23.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:23.96#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:23.96#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:23.96#ibcon#enter wrdev, iclass 33, count 2 2006.229.22:45:23.96#ibcon#first serial, iclass 33, count 2 2006.229.22:45:23.96#ibcon#enter sib2, iclass 33, count 2 2006.229.22:45:23.96#ibcon#flushed, iclass 33, count 2 2006.229.22:45:23.96#ibcon#about to write, iclass 33, count 2 2006.229.22:45:23.96#ibcon#wrote, iclass 33, count 2 2006.229.22:45:23.96#ibcon#about to read 3, iclass 33, count 2 2006.229.22:45:23.98#ibcon#read 3, iclass 33, count 2 2006.229.22:45:23.98#ibcon#about to read 4, iclass 33, count 2 2006.229.22:45:23.98#ibcon#read 4, iclass 33, count 2 2006.229.22:45:23.98#ibcon#about to read 5, iclass 33, count 2 2006.229.22:45:23.98#ibcon#read 5, iclass 33, count 2 2006.229.22:45:23.98#ibcon#about to read 6, iclass 33, count 2 2006.229.22:45:23.98#ibcon#read 6, iclass 33, count 2 2006.229.22:45:23.98#ibcon#end of sib2, iclass 33, count 2 2006.229.22:45:23.98#ibcon#*mode == 0, iclass 33, count 2 2006.229.22:45:23.98#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.22:45:23.98#ibcon#[25=AT03-06\r\n] 2006.229.22:45:23.98#ibcon#*before write, iclass 33, count 2 2006.229.22:45:23.98#ibcon#enter sib2, iclass 33, count 2 2006.229.22:45:23.98#ibcon#flushed, iclass 33, count 2 2006.229.22:45:23.98#ibcon#about to write, iclass 33, count 2 2006.229.22:45:23.98#ibcon#wrote, iclass 33, count 2 2006.229.22:45:23.98#ibcon#about to read 3, iclass 33, count 2 2006.229.22:45:24.01#ibcon#read 3, iclass 33, count 2 2006.229.22:45:24.01#ibcon#about to read 4, iclass 33, count 2 2006.229.22:45:24.01#ibcon#read 4, iclass 33, count 2 2006.229.22:45:24.01#ibcon#about to read 5, iclass 33, count 2 2006.229.22:45:24.01#ibcon#read 5, iclass 33, count 2 2006.229.22:45:24.01#ibcon#about to read 6, iclass 33, count 2 2006.229.22:45:24.01#ibcon#read 6, iclass 33, count 2 2006.229.22:45:24.01#ibcon#end of sib2, iclass 33, count 2 2006.229.22:45:24.01#ibcon#*after write, iclass 33, count 2 2006.229.22:45:24.01#ibcon#*before return 0, iclass 33, count 2 2006.229.22:45:24.01#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:24.01#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:24.01#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.22:45:24.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:24.01#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:24.13#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:24.13#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:24.13#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:45:24.13#ibcon#first serial, iclass 33, count 0 2006.229.22:45:24.13#ibcon#enter sib2, iclass 33, count 0 2006.229.22:45:24.13#ibcon#flushed, iclass 33, count 0 2006.229.22:45:24.13#ibcon#about to write, iclass 33, count 0 2006.229.22:45:24.13#ibcon#wrote, iclass 33, count 0 2006.229.22:45:24.13#ibcon#about to read 3, iclass 33, count 0 2006.229.22:45:24.15#ibcon#read 3, iclass 33, count 0 2006.229.22:45:24.15#ibcon#about to read 4, iclass 33, count 0 2006.229.22:45:24.15#ibcon#read 4, iclass 33, count 0 2006.229.22:45:24.15#ibcon#about to read 5, iclass 33, count 0 2006.229.22:45:24.15#ibcon#read 5, iclass 33, count 0 2006.229.22:45:24.15#ibcon#about to read 6, iclass 33, count 0 2006.229.22:45:24.15#ibcon#read 6, iclass 33, count 0 2006.229.22:45:24.15#ibcon#end of sib2, iclass 33, count 0 2006.229.22:45:24.15#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:45:24.15#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:45:24.15#ibcon#[25=USB\r\n] 2006.229.22:45:24.15#ibcon#*before write, iclass 33, count 0 2006.229.22:45:24.15#ibcon#enter sib2, iclass 33, count 0 2006.229.22:45:24.15#ibcon#flushed, iclass 33, count 0 2006.229.22:45:24.15#ibcon#about to write, iclass 33, count 0 2006.229.22:45:24.15#ibcon#wrote, iclass 33, count 0 2006.229.22:45:24.15#ibcon#about to read 3, iclass 33, count 0 2006.229.22:45:24.18#ibcon#read 3, iclass 33, count 0 2006.229.22:45:24.18#ibcon#about to read 4, iclass 33, count 0 2006.229.22:45:24.18#ibcon#read 4, iclass 33, count 0 2006.229.22:45:24.18#ibcon#about to read 5, iclass 33, count 0 2006.229.22:45:24.18#ibcon#read 5, iclass 33, count 0 2006.229.22:45:24.18#ibcon#about to read 6, iclass 33, count 0 2006.229.22:45:24.18#ibcon#read 6, iclass 33, count 0 2006.229.22:45:24.18#ibcon#end of sib2, iclass 33, count 0 2006.229.22:45:24.18#ibcon#*after write, iclass 33, count 0 2006.229.22:45:24.18#ibcon#*before return 0, iclass 33, count 0 2006.229.22:45:24.18#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:24.18#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:24.18#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:45:24.18#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:45:24.18$vck44/valo=4,624.99 2006.229.22:45:24.18#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.22:45:24.18#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.22:45:24.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:24.18#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:24.18#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:24.18#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:24.18#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:45:24.18#ibcon#first serial, iclass 35, count 0 2006.229.22:45:24.18#ibcon#enter sib2, iclass 35, count 0 2006.229.22:45:24.18#ibcon#flushed, iclass 35, count 0 2006.229.22:45:24.18#ibcon#about to write, iclass 35, count 0 2006.229.22:45:24.18#ibcon#wrote, iclass 35, count 0 2006.229.22:45:24.18#ibcon#about to read 3, iclass 35, count 0 2006.229.22:45:24.20#ibcon#read 3, iclass 35, count 0 2006.229.22:45:24.20#ibcon#about to read 4, iclass 35, count 0 2006.229.22:45:24.20#ibcon#read 4, iclass 35, count 0 2006.229.22:45:24.20#ibcon#about to read 5, iclass 35, count 0 2006.229.22:45:24.20#ibcon#read 5, iclass 35, count 0 2006.229.22:45:24.20#ibcon#about to read 6, iclass 35, count 0 2006.229.22:45:24.20#ibcon#read 6, iclass 35, count 0 2006.229.22:45:24.20#ibcon#end of sib2, iclass 35, count 0 2006.229.22:45:24.20#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:45:24.20#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:45:24.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:45:24.20#ibcon#*before write, iclass 35, count 0 2006.229.22:45:24.20#ibcon#enter sib2, iclass 35, count 0 2006.229.22:45:24.20#ibcon#flushed, iclass 35, count 0 2006.229.22:45:24.20#ibcon#about to write, iclass 35, count 0 2006.229.22:45:24.20#ibcon#wrote, iclass 35, count 0 2006.229.22:45:24.20#ibcon#about to read 3, iclass 35, count 0 2006.229.22:45:24.24#ibcon#read 3, iclass 35, count 0 2006.229.22:45:24.24#ibcon#about to read 4, iclass 35, count 0 2006.229.22:45:24.24#ibcon#read 4, iclass 35, count 0 2006.229.22:45:24.24#ibcon#about to read 5, iclass 35, count 0 2006.229.22:45:24.24#ibcon#read 5, iclass 35, count 0 2006.229.22:45:24.24#ibcon#about to read 6, iclass 35, count 0 2006.229.22:45:24.24#ibcon#read 6, iclass 35, count 0 2006.229.22:45:24.24#ibcon#end of sib2, iclass 35, count 0 2006.229.22:45:24.24#ibcon#*after write, iclass 35, count 0 2006.229.22:45:24.24#ibcon#*before return 0, iclass 35, count 0 2006.229.22:45:24.24#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:24.24#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:24.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:45:24.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:45:24.24$vck44/va=4,7 2006.229.22:45:24.24#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.22:45:24.24#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.22:45:24.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:24.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:24.30#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:24.30#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:24.30#ibcon#enter wrdev, iclass 37, count 2 2006.229.22:45:24.30#ibcon#first serial, iclass 37, count 2 2006.229.22:45:24.30#ibcon#enter sib2, iclass 37, count 2 2006.229.22:45:24.30#ibcon#flushed, iclass 37, count 2 2006.229.22:45:24.30#ibcon#about to write, iclass 37, count 2 2006.229.22:45:24.30#ibcon#wrote, iclass 37, count 2 2006.229.22:45:24.30#ibcon#about to read 3, iclass 37, count 2 2006.229.22:45:24.32#ibcon#read 3, iclass 37, count 2 2006.229.22:45:24.32#ibcon#about to read 4, iclass 37, count 2 2006.229.22:45:24.32#ibcon#read 4, iclass 37, count 2 2006.229.22:45:24.32#ibcon#about to read 5, iclass 37, count 2 2006.229.22:45:24.32#ibcon#read 5, iclass 37, count 2 2006.229.22:45:24.32#ibcon#about to read 6, iclass 37, count 2 2006.229.22:45:24.32#ibcon#read 6, iclass 37, count 2 2006.229.22:45:24.32#ibcon#end of sib2, iclass 37, count 2 2006.229.22:45:24.32#ibcon#*mode == 0, iclass 37, count 2 2006.229.22:45:24.32#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.22:45:24.32#ibcon#[25=AT04-07\r\n] 2006.229.22:45:24.32#ibcon#*before write, iclass 37, count 2 2006.229.22:45:24.32#ibcon#enter sib2, iclass 37, count 2 2006.229.22:45:24.32#ibcon#flushed, iclass 37, count 2 2006.229.22:45:24.32#ibcon#about to write, iclass 37, count 2 2006.229.22:45:24.32#ibcon#wrote, iclass 37, count 2 2006.229.22:45:24.32#ibcon#about to read 3, iclass 37, count 2 2006.229.22:45:24.35#ibcon#read 3, iclass 37, count 2 2006.229.22:45:24.35#ibcon#about to read 4, iclass 37, count 2 2006.229.22:45:24.35#ibcon#read 4, iclass 37, count 2 2006.229.22:45:24.35#ibcon#about to read 5, iclass 37, count 2 2006.229.22:45:24.35#ibcon#read 5, iclass 37, count 2 2006.229.22:45:24.35#ibcon#about to read 6, iclass 37, count 2 2006.229.22:45:24.35#ibcon#read 6, iclass 37, count 2 2006.229.22:45:24.35#ibcon#end of sib2, iclass 37, count 2 2006.229.22:45:24.35#ibcon#*after write, iclass 37, count 2 2006.229.22:45:24.35#ibcon#*before return 0, iclass 37, count 2 2006.229.22:45:24.35#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:24.35#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:24.35#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.22:45:24.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:24.35#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:24.47#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:24.47#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:24.47#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:45:24.47#ibcon#first serial, iclass 37, count 0 2006.229.22:45:24.47#ibcon#enter sib2, iclass 37, count 0 2006.229.22:45:24.47#ibcon#flushed, iclass 37, count 0 2006.229.22:45:24.47#ibcon#about to write, iclass 37, count 0 2006.229.22:45:24.47#ibcon#wrote, iclass 37, count 0 2006.229.22:45:24.47#ibcon#about to read 3, iclass 37, count 0 2006.229.22:45:24.49#ibcon#read 3, iclass 37, count 0 2006.229.22:45:24.49#ibcon#about to read 4, iclass 37, count 0 2006.229.22:45:24.49#ibcon#read 4, iclass 37, count 0 2006.229.22:45:24.49#ibcon#about to read 5, iclass 37, count 0 2006.229.22:45:24.49#ibcon#read 5, iclass 37, count 0 2006.229.22:45:24.49#ibcon#about to read 6, iclass 37, count 0 2006.229.22:45:24.49#ibcon#read 6, iclass 37, count 0 2006.229.22:45:24.49#ibcon#end of sib2, iclass 37, count 0 2006.229.22:45:24.49#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:45:24.49#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:45:24.49#ibcon#[25=USB\r\n] 2006.229.22:45:24.49#ibcon#*before write, iclass 37, count 0 2006.229.22:45:24.49#ibcon#enter sib2, iclass 37, count 0 2006.229.22:45:24.49#ibcon#flushed, iclass 37, count 0 2006.229.22:45:24.49#ibcon#about to write, iclass 37, count 0 2006.229.22:45:24.49#ibcon#wrote, iclass 37, count 0 2006.229.22:45:24.49#ibcon#about to read 3, iclass 37, count 0 2006.229.22:45:24.52#ibcon#read 3, iclass 37, count 0 2006.229.22:45:24.52#ibcon#about to read 4, iclass 37, count 0 2006.229.22:45:24.52#ibcon#read 4, iclass 37, count 0 2006.229.22:45:24.52#ibcon#about to read 5, iclass 37, count 0 2006.229.22:45:24.52#ibcon#read 5, iclass 37, count 0 2006.229.22:45:24.52#ibcon#about to read 6, iclass 37, count 0 2006.229.22:45:24.52#ibcon#read 6, iclass 37, count 0 2006.229.22:45:24.52#ibcon#end of sib2, iclass 37, count 0 2006.229.22:45:24.52#ibcon#*after write, iclass 37, count 0 2006.229.22:45:24.52#ibcon#*before return 0, iclass 37, count 0 2006.229.22:45:24.52#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:24.52#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:24.52#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:45:24.52#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:45:24.52$vck44/valo=5,734.99 2006.229.22:45:24.52#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.22:45:24.52#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.22:45:24.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:24.52#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:24.52#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:24.52#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:24.52#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:45:24.52#ibcon#first serial, iclass 39, count 0 2006.229.22:45:24.52#ibcon#enter sib2, iclass 39, count 0 2006.229.22:45:24.52#ibcon#flushed, iclass 39, count 0 2006.229.22:45:24.52#ibcon#about to write, iclass 39, count 0 2006.229.22:45:24.52#ibcon#wrote, iclass 39, count 0 2006.229.22:45:24.52#ibcon#about to read 3, iclass 39, count 0 2006.229.22:45:24.54#ibcon#read 3, iclass 39, count 0 2006.229.22:45:24.54#ibcon#about to read 4, iclass 39, count 0 2006.229.22:45:24.54#ibcon#read 4, iclass 39, count 0 2006.229.22:45:24.54#ibcon#about to read 5, iclass 39, count 0 2006.229.22:45:24.54#ibcon#read 5, iclass 39, count 0 2006.229.22:45:24.54#ibcon#about to read 6, iclass 39, count 0 2006.229.22:45:24.54#ibcon#read 6, iclass 39, count 0 2006.229.22:45:24.54#ibcon#end of sib2, iclass 39, count 0 2006.229.22:45:24.54#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:45:24.54#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:45:24.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:45:24.54#ibcon#*before write, iclass 39, count 0 2006.229.22:45:24.54#ibcon#enter sib2, iclass 39, count 0 2006.229.22:45:24.54#ibcon#flushed, iclass 39, count 0 2006.229.22:45:24.54#ibcon#about to write, iclass 39, count 0 2006.229.22:45:24.54#ibcon#wrote, iclass 39, count 0 2006.229.22:45:24.54#ibcon#about to read 3, iclass 39, count 0 2006.229.22:45:24.58#ibcon#read 3, iclass 39, count 0 2006.229.22:45:24.58#ibcon#about to read 4, iclass 39, count 0 2006.229.22:45:24.58#ibcon#read 4, iclass 39, count 0 2006.229.22:45:24.58#ibcon#about to read 5, iclass 39, count 0 2006.229.22:45:24.58#ibcon#read 5, iclass 39, count 0 2006.229.22:45:24.58#ibcon#about to read 6, iclass 39, count 0 2006.229.22:45:24.58#ibcon#read 6, iclass 39, count 0 2006.229.22:45:24.58#ibcon#end of sib2, iclass 39, count 0 2006.229.22:45:24.58#ibcon#*after write, iclass 39, count 0 2006.229.22:45:24.58#ibcon#*before return 0, iclass 39, count 0 2006.229.22:45:24.58#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:24.58#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:24.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:45:24.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:45:24.58$vck44/va=5,4 2006.229.22:45:24.58#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.22:45:24.58#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.22:45:24.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:24.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:24.64#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:24.64#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:24.64#ibcon#enter wrdev, iclass 3, count 2 2006.229.22:45:24.64#ibcon#first serial, iclass 3, count 2 2006.229.22:45:24.64#ibcon#enter sib2, iclass 3, count 2 2006.229.22:45:24.64#ibcon#flushed, iclass 3, count 2 2006.229.22:45:24.64#ibcon#about to write, iclass 3, count 2 2006.229.22:45:24.64#ibcon#wrote, iclass 3, count 2 2006.229.22:45:24.64#ibcon#about to read 3, iclass 3, count 2 2006.229.22:45:24.66#ibcon#read 3, iclass 3, count 2 2006.229.22:45:24.66#ibcon#about to read 4, iclass 3, count 2 2006.229.22:45:24.66#ibcon#read 4, iclass 3, count 2 2006.229.22:45:24.66#ibcon#about to read 5, iclass 3, count 2 2006.229.22:45:24.66#ibcon#read 5, iclass 3, count 2 2006.229.22:45:24.66#ibcon#about to read 6, iclass 3, count 2 2006.229.22:45:24.66#ibcon#read 6, iclass 3, count 2 2006.229.22:45:24.66#ibcon#end of sib2, iclass 3, count 2 2006.229.22:45:24.66#ibcon#*mode == 0, iclass 3, count 2 2006.229.22:45:24.66#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.22:45:24.66#ibcon#[25=AT05-04\r\n] 2006.229.22:45:24.66#ibcon#*before write, iclass 3, count 2 2006.229.22:45:24.66#ibcon#enter sib2, iclass 3, count 2 2006.229.22:45:24.66#ibcon#flushed, iclass 3, count 2 2006.229.22:45:24.66#ibcon#about to write, iclass 3, count 2 2006.229.22:45:24.66#ibcon#wrote, iclass 3, count 2 2006.229.22:45:24.66#ibcon#about to read 3, iclass 3, count 2 2006.229.22:45:24.69#ibcon#read 3, iclass 3, count 2 2006.229.22:45:24.69#ibcon#about to read 4, iclass 3, count 2 2006.229.22:45:24.69#ibcon#read 4, iclass 3, count 2 2006.229.22:45:24.69#ibcon#about to read 5, iclass 3, count 2 2006.229.22:45:24.69#ibcon#read 5, iclass 3, count 2 2006.229.22:45:24.69#ibcon#about to read 6, iclass 3, count 2 2006.229.22:45:24.69#ibcon#read 6, iclass 3, count 2 2006.229.22:45:24.69#ibcon#end of sib2, iclass 3, count 2 2006.229.22:45:24.69#ibcon#*after write, iclass 3, count 2 2006.229.22:45:24.69#ibcon#*before return 0, iclass 3, count 2 2006.229.22:45:24.69#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:24.69#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:24.69#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.22:45:24.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:24.69#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:24.81#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:24.81#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:24.81#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:45:24.81#ibcon#first serial, iclass 3, count 0 2006.229.22:45:24.81#ibcon#enter sib2, iclass 3, count 0 2006.229.22:45:24.81#ibcon#flushed, iclass 3, count 0 2006.229.22:45:24.81#ibcon#about to write, iclass 3, count 0 2006.229.22:45:24.81#ibcon#wrote, iclass 3, count 0 2006.229.22:45:24.81#ibcon#about to read 3, iclass 3, count 0 2006.229.22:45:24.83#ibcon#read 3, iclass 3, count 0 2006.229.22:45:24.83#ibcon#about to read 4, iclass 3, count 0 2006.229.22:45:24.83#ibcon#read 4, iclass 3, count 0 2006.229.22:45:24.83#ibcon#about to read 5, iclass 3, count 0 2006.229.22:45:24.83#ibcon#read 5, iclass 3, count 0 2006.229.22:45:24.83#ibcon#about to read 6, iclass 3, count 0 2006.229.22:45:24.83#ibcon#read 6, iclass 3, count 0 2006.229.22:45:24.83#ibcon#end of sib2, iclass 3, count 0 2006.229.22:45:24.83#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:45:24.83#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:45:24.83#ibcon#[25=USB\r\n] 2006.229.22:45:24.83#ibcon#*before write, iclass 3, count 0 2006.229.22:45:24.83#ibcon#enter sib2, iclass 3, count 0 2006.229.22:45:24.83#ibcon#flushed, iclass 3, count 0 2006.229.22:45:24.83#ibcon#about to write, iclass 3, count 0 2006.229.22:45:24.83#ibcon#wrote, iclass 3, count 0 2006.229.22:45:24.83#ibcon#about to read 3, iclass 3, count 0 2006.229.22:45:24.86#ibcon#read 3, iclass 3, count 0 2006.229.22:45:24.86#ibcon#about to read 4, iclass 3, count 0 2006.229.22:45:24.86#ibcon#read 4, iclass 3, count 0 2006.229.22:45:24.86#ibcon#about to read 5, iclass 3, count 0 2006.229.22:45:24.86#ibcon#read 5, iclass 3, count 0 2006.229.22:45:24.86#ibcon#about to read 6, iclass 3, count 0 2006.229.22:45:24.86#ibcon#read 6, iclass 3, count 0 2006.229.22:45:24.86#ibcon#end of sib2, iclass 3, count 0 2006.229.22:45:24.86#ibcon#*after write, iclass 3, count 0 2006.229.22:45:24.86#ibcon#*before return 0, iclass 3, count 0 2006.229.22:45:24.86#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:24.86#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:24.86#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:45:24.86#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:45:24.86$vck44/valo=6,814.99 2006.229.22:45:24.86#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:45:24.86#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:45:24.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:24.86#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:24.86#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:24.86#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:24.86#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:45:24.86#ibcon#first serial, iclass 5, count 0 2006.229.22:45:24.86#ibcon#enter sib2, iclass 5, count 0 2006.229.22:45:24.86#ibcon#flushed, iclass 5, count 0 2006.229.22:45:24.86#ibcon#about to write, iclass 5, count 0 2006.229.22:45:24.86#ibcon#wrote, iclass 5, count 0 2006.229.22:45:24.86#ibcon#about to read 3, iclass 5, count 0 2006.229.22:45:24.88#ibcon#read 3, iclass 5, count 0 2006.229.22:45:24.88#ibcon#about to read 4, iclass 5, count 0 2006.229.22:45:24.88#ibcon#read 4, iclass 5, count 0 2006.229.22:45:24.88#ibcon#about to read 5, iclass 5, count 0 2006.229.22:45:24.88#ibcon#read 5, iclass 5, count 0 2006.229.22:45:24.88#ibcon#about to read 6, iclass 5, count 0 2006.229.22:45:24.88#ibcon#read 6, iclass 5, count 0 2006.229.22:45:24.88#ibcon#end of sib2, iclass 5, count 0 2006.229.22:45:24.88#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:45:24.88#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:45:24.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:45:24.88#ibcon#*before write, iclass 5, count 0 2006.229.22:45:24.88#ibcon#enter sib2, iclass 5, count 0 2006.229.22:45:24.88#ibcon#flushed, iclass 5, count 0 2006.229.22:45:24.88#ibcon#about to write, iclass 5, count 0 2006.229.22:45:24.88#ibcon#wrote, iclass 5, count 0 2006.229.22:45:24.88#ibcon#about to read 3, iclass 5, count 0 2006.229.22:45:24.92#ibcon#read 3, iclass 5, count 0 2006.229.22:45:24.92#ibcon#about to read 4, iclass 5, count 0 2006.229.22:45:24.92#ibcon#read 4, iclass 5, count 0 2006.229.22:45:24.92#ibcon#about to read 5, iclass 5, count 0 2006.229.22:45:24.92#ibcon#read 5, iclass 5, count 0 2006.229.22:45:24.92#ibcon#about to read 6, iclass 5, count 0 2006.229.22:45:24.92#ibcon#read 6, iclass 5, count 0 2006.229.22:45:24.92#ibcon#end of sib2, iclass 5, count 0 2006.229.22:45:24.92#ibcon#*after write, iclass 5, count 0 2006.229.22:45:24.92#ibcon#*before return 0, iclass 5, count 0 2006.229.22:45:24.92#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:24.92#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:24.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:45:24.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:45:24.92$vck44/va=6,4 2006.229.22:45:24.92#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.22:45:24.92#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.22:45:24.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:24.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:24.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:24.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:24.98#ibcon#enter wrdev, iclass 7, count 2 2006.229.22:45:24.98#ibcon#first serial, iclass 7, count 2 2006.229.22:45:24.98#ibcon#enter sib2, iclass 7, count 2 2006.229.22:45:24.98#ibcon#flushed, iclass 7, count 2 2006.229.22:45:24.98#ibcon#about to write, iclass 7, count 2 2006.229.22:45:24.98#ibcon#wrote, iclass 7, count 2 2006.229.22:45:24.98#ibcon#about to read 3, iclass 7, count 2 2006.229.22:45:25.00#ibcon#read 3, iclass 7, count 2 2006.229.22:45:25.00#ibcon#about to read 4, iclass 7, count 2 2006.229.22:45:25.00#ibcon#read 4, iclass 7, count 2 2006.229.22:45:25.00#ibcon#about to read 5, iclass 7, count 2 2006.229.22:45:25.00#ibcon#read 5, iclass 7, count 2 2006.229.22:45:25.00#ibcon#about to read 6, iclass 7, count 2 2006.229.22:45:25.00#ibcon#read 6, iclass 7, count 2 2006.229.22:45:25.00#ibcon#end of sib2, iclass 7, count 2 2006.229.22:45:25.00#ibcon#*mode == 0, iclass 7, count 2 2006.229.22:45:25.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.22:45:25.00#ibcon#[25=AT06-04\r\n] 2006.229.22:45:25.00#ibcon#*before write, iclass 7, count 2 2006.229.22:45:25.00#ibcon#enter sib2, iclass 7, count 2 2006.229.22:45:25.00#ibcon#flushed, iclass 7, count 2 2006.229.22:45:25.00#ibcon#about to write, iclass 7, count 2 2006.229.22:45:25.00#ibcon#wrote, iclass 7, count 2 2006.229.22:45:25.00#ibcon#about to read 3, iclass 7, count 2 2006.229.22:45:25.03#ibcon#read 3, iclass 7, count 2 2006.229.22:45:25.03#ibcon#about to read 4, iclass 7, count 2 2006.229.22:45:25.03#ibcon#read 4, iclass 7, count 2 2006.229.22:45:25.03#ibcon#about to read 5, iclass 7, count 2 2006.229.22:45:25.03#ibcon#read 5, iclass 7, count 2 2006.229.22:45:25.03#ibcon#about to read 6, iclass 7, count 2 2006.229.22:45:25.03#ibcon#read 6, iclass 7, count 2 2006.229.22:45:25.03#ibcon#end of sib2, iclass 7, count 2 2006.229.22:45:25.03#ibcon#*after write, iclass 7, count 2 2006.229.22:45:25.03#ibcon#*before return 0, iclass 7, count 2 2006.229.22:45:25.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:25.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:25.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.22:45:25.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:25.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:25.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:25.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:25.15#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:45:25.15#ibcon#first serial, iclass 7, count 0 2006.229.22:45:25.15#ibcon#enter sib2, iclass 7, count 0 2006.229.22:45:25.15#ibcon#flushed, iclass 7, count 0 2006.229.22:45:25.15#ibcon#about to write, iclass 7, count 0 2006.229.22:45:25.15#ibcon#wrote, iclass 7, count 0 2006.229.22:45:25.15#ibcon#about to read 3, iclass 7, count 0 2006.229.22:45:25.17#ibcon#read 3, iclass 7, count 0 2006.229.22:45:25.17#ibcon#about to read 4, iclass 7, count 0 2006.229.22:45:25.17#ibcon#read 4, iclass 7, count 0 2006.229.22:45:25.17#ibcon#about to read 5, iclass 7, count 0 2006.229.22:45:25.17#ibcon#read 5, iclass 7, count 0 2006.229.22:45:25.17#ibcon#about to read 6, iclass 7, count 0 2006.229.22:45:25.17#ibcon#read 6, iclass 7, count 0 2006.229.22:45:25.17#ibcon#end of sib2, iclass 7, count 0 2006.229.22:45:25.17#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:45:25.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:45:25.17#ibcon#[25=USB\r\n] 2006.229.22:45:25.17#ibcon#*before write, iclass 7, count 0 2006.229.22:45:25.17#ibcon#enter sib2, iclass 7, count 0 2006.229.22:45:25.17#ibcon#flushed, iclass 7, count 0 2006.229.22:45:25.17#ibcon#about to write, iclass 7, count 0 2006.229.22:45:25.17#ibcon#wrote, iclass 7, count 0 2006.229.22:45:25.17#ibcon#about to read 3, iclass 7, count 0 2006.229.22:45:25.20#ibcon#read 3, iclass 7, count 0 2006.229.22:45:25.20#ibcon#about to read 4, iclass 7, count 0 2006.229.22:45:25.20#ibcon#read 4, iclass 7, count 0 2006.229.22:45:25.20#ibcon#about to read 5, iclass 7, count 0 2006.229.22:45:25.20#ibcon#read 5, iclass 7, count 0 2006.229.22:45:25.20#ibcon#about to read 6, iclass 7, count 0 2006.229.22:45:25.20#ibcon#read 6, iclass 7, count 0 2006.229.22:45:25.20#ibcon#end of sib2, iclass 7, count 0 2006.229.22:45:25.20#ibcon#*after write, iclass 7, count 0 2006.229.22:45:25.20#ibcon#*before return 0, iclass 7, count 0 2006.229.22:45:25.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:25.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:25.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:45:25.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:45:25.20$vck44/valo=7,864.99 2006.229.22:45:25.20#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.22:45:25.20#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.22:45:25.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:25.20#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:45:25.20#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:45:25.20#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:45:25.20#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:45:25.20#ibcon#first serial, iclass 11, count 0 2006.229.22:45:25.20#ibcon#enter sib2, iclass 11, count 0 2006.229.22:45:25.20#ibcon#flushed, iclass 11, count 0 2006.229.22:45:25.20#ibcon#about to write, iclass 11, count 0 2006.229.22:45:25.20#ibcon#wrote, iclass 11, count 0 2006.229.22:45:25.20#ibcon#about to read 3, iclass 11, count 0 2006.229.22:45:25.22#ibcon#read 3, iclass 11, count 0 2006.229.22:45:25.22#ibcon#about to read 4, iclass 11, count 0 2006.229.22:45:25.22#ibcon#read 4, iclass 11, count 0 2006.229.22:45:25.22#ibcon#about to read 5, iclass 11, count 0 2006.229.22:45:25.22#ibcon#read 5, iclass 11, count 0 2006.229.22:45:25.22#ibcon#about to read 6, iclass 11, count 0 2006.229.22:45:25.22#ibcon#read 6, iclass 11, count 0 2006.229.22:45:25.22#ibcon#end of sib2, iclass 11, count 0 2006.229.22:45:25.22#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:45:25.22#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:45:25.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:45:25.22#ibcon#*before write, iclass 11, count 0 2006.229.22:45:25.22#ibcon#enter sib2, iclass 11, count 0 2006.229.22:45:25.22#ibcon#flushed, iclass 11, count 0 2006.229.22:45:25.22#ibcon#about to write, iclass 11, count 0 2006.229.22:45:25.22#ibcon#wrote, iclass 11, count 0 2006.229.22:45:25.22#ibcon#about to read 3, iclass 11, count 0 2006.229.22:45:25.26#ibcon#read 3, iclass 11, count 0 2006.229.22:45:25.26#ibcon#about to read 4, iclass 11, count 0 2006.229.22:45:25.26#ibcon#read 4, iclass 11, count 0 2006.229.22:45:25.26#ibcon#about to read 5, iclass 11, count 0 2006.229.22:45:25.26#ibcon#read 5, iclass 11, count 0 2006.229.22:45:25.26#ibcon#about to read 6, iclass 11, count 0 2006.229.22:45:25.26#ibcon#read 6, iclass 11, count 0 2006.229.22:45:25.26#ibcon#end of sib2, iclass 11, count 0 2006.229.22:45:25.26#ibcon#*after write, iclass 11, count 0 2006.229.22:45:25.26#ibcon#*before return 0, iclass 11, count 0 2006.229.22:45:25.26#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:45:25.26#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.22:45:25.26#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:45:25.26#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:45:25.26$vck44/va=7,5 2006.229.22:45:25.26#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.22:45:25.26#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.22:45:25.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:25.26#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:45:25.32#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:45:25.32#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:45:25.32#ibcon#enter wrdev, iclass 13, count 2 2006.229.22:45:25.32#ibcon#first serial, iclass 13, count 2 2006.229.22:45:25.32#ibcon#enter sib2, iclass 13, count 2 2006.229.22:45:25.32#ibcon#flushed, iclass 13, count 2 2006.229.22:45:25.32#ibcon#about to write, iclass 13, count 2 2006.229.22:45:25.32#ibcon#wrote, iclass 13, count 2 2006.229.22:45:25.32#ibcon#about to read 3, iclass 13, count 2 2006.229.22:45:25.34#ibcon#read 3, iclass 13, count 2 2006.229.22:45:25.34#ibcon#about to read 4, iclass 13, count 2 2006.229.22:45:25.34#ibcon#read 4, iclass 13, count 2 2006.229.22:45:25.34#ibcon#about to read 5, iclass 13, count 2 2006.229.22:45:25.34#ibcon#read 5, iclass 13, count 2 2006.229.22:45:25.34#ibcon#about to read 6, iclass 13, count 2 2006.229.22:45:25.34#ibcon#read 6, iclass 13, count 2 2006.229.22:45:25.34#ibcon#end of sib2, iclass 13, count 2 2006.229.22:45:25.34#ibcon#*mode == 0, iclass 13, count 2 2006.229.22:45:25.34#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.22:45:25.34#ibcon#[25=AT07-05\r\n] 2006.229.22:45:25.34#ibcon#*before write, iclass 13, count 2 2006.229.22:45:25.34#ibcon#enter sib2, iclass 13, count 2 2006.229.22:45:25.34#ibcon#flushed, iclass 13, count 2 2006.229.22:45:25.34#ibcon#about to write, iclass 13, count 2 2006.229.22:45:25.34#ibcon#wrote, iclass 13, count 2 2006.229.22:45:25.34#ibcon#about to read 3, iclass 13, count 2 2006.229.22:45:25.37#ibcon#read 3, iclass 13, count 2 2006.229.22:45:25.37#ibcon#about to read 4, iclass 13, count 2 2006.229.22:45:25.37#ibcon#read 4, iclass 13, count 2 2006.229.22:45:25.37#ibcon#about to read 5, iclass 13, count 2 2006.229.22:45:25.37#ibcon#read 5, iclass 13, count 2 2006.229.22:45:25.37#ibcon#about to read 6, iclass 13, count 2 2006.229.22:45:25.37#ibcon#read 6, iclass 13, count 2 2006.229.22:45:25.37#ibcon#end of sib2, iclass 13, count 2 2006.229.22:45:25.37#ibcon#*after write, iclass 13, count 2 2006.229.22:45:25.37#ibcon#*before return 0, iclass 13, count 2 2006.229.22:45:25.37#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:45:25.37#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.22:45:25.37#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.22:45:25.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:25.37#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:45:25.49#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:45:25.49#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:45:25.49#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:45:25.49#ibcon#first serial, iclass 13, count 0 2006.229.22:45:25.49#ibcon#enter sib2, iclass 13, count 0 2006.229.22:45:25.49#ibcon#flushed, iclass 13, count 0 2006.229.22:45:25.49#ibcon#about to write, iclass 13, count 0 2006.229.22:45:25.49#ibcon#wrote, iclass 13, count 0 2006.229.22:45:25.49#ibcon#about to read 3, iclass 13, count 0 2006.229.22:45:25.51#ibcon#read 3, iclass 13, count 0 2006.229.22:45:25.51#ibcon#about to read 4, iclass 13, count 0 2006.229.22:45:25.51#ibcon#read 4, iclass 13, count 0 2006.229.22:45:25.51#ibcon#about to read 5, iclass 13, count 0 2006.229.22:45:25.51#ibcon#read 5, iclass 13, count 0 2006.229.22:45:25.51#ibcon#about to read 6, iclass 13, count 0 2006.229.22:45:25.51#ibcon#read 6, iclass 13, count 0 2006.229.22:45:25.51#ibcon#end of sib2, iclass 13, count 0 2006.229.22:45:25.51#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:45:25.51#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:45:25.51#ibcon#[25=USB\r\n] 2006.229.22:45:25.51#ibcon#*before write, iclass 13, count 0 2006.229.22:45:25.51#ibcon#enter sib2, iclass 13, count 0 2006.229.22:45:25.51#ibcon#flushed, iclass 13, count 0 2006.229.22:45:25.51#ibcon#about to write, iclass 13, count 0 2006.229.22:45:25.51#ibcon#wrote, iclass 13, count 0 2006.229.22:45:25.51#ibcon#about to read 3, iclass 13, count 0 2006.229.22:45:25.54#ibcon#read 3, iclass 13, count 0 2006.229.22:45:25.54#ibcon#about to read 4, iclass 13, count 0 2006.229.22:45:25.54#ibcon#read 4, iclass 13, count 0 2006.229.22:45:25.54#ibcon#about to read 5, iclass 13, count 0 2006.229.22:45:25.54#ibcon#read 5, iclass 13, count 0 2006.229.22:45:25.54#ibcon#about to read 6, iclass 13, count 0 2006.229.22:45:25.54#ibcon#read 6, iclass 13, count 0 2006.229.22:45:25.54#ibcon#end of sib2, iclass 13, count 0 2006.229.22:45:25.54#ibcon#*after write, iclass 13, count 0 2006.229.22:45:25.54#ibcon#*before return 0, iclass 13, count 0 2006.229.22:45:25.54#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:45:25.54#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.22:45:25.54#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:45:25.54#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:45:25.54$vck44/valo=8,884.99 2006.229.22:45:25.54#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.22:45:25.54#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.22:45:25.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:25.54#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:45:25.54#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:45:25.54#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:45:25.54#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:45:25.54#ibcon#first serial, iclass 15, count 0 2006.229.22:45:25.54#ibcon#enter sib2, iclass 15, count 0 2006.229.22:45:25.54#ibcon#flushed, iclass 15, count 0 2006.229.22:45:25.54#ibcon#about to write, iclass 15, count 0 2006.229.22:45:25.54#ibcon#wrote, iclass 15, count 0 2006.229.22:45:25.54#ibcon#about to read 3, iclass 15, count 0 2006.229.22:45:25.56#ibcon#read 3, iclass 15, count 0 2006.229.22:45:25.56#ibcon#about to read 4, iclass 15, count 0 2006.229.22:45:25.56#ibcon#read 4, iclass 15, count 0 2006.229.22:45:25.56#ibcon#about to read 5, iclass 15, count 0 2006.229.22:45:25.56#ibcon#read 5, iclass 15, count 0 2006.229.22:45:25.56#ibcon#about to read 6, iclass 15, count 0 2006.229.22:45:25.56#ibcon#read 6, iclass 15, count 0 2006.229.22:45:25.56#ibcon#end of sib2, iclass 15, count 0 2006.229.22:45:25.56#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:45:25.56#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:45:25.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:45:25.56#ibcon#*before write, iclass 15, count 0 2006.229.22:45:25.56#ibcon#enter sib2, iclass 15, count 0 2006.229.22:45:25.56#ibcon#flushed, iclass 15, count 0 2006.229.22:45:25.56#ibcon#about to write, iclass 15, count 0 2006.229.22:45:25.56#ibcon#wrote, iclass 15, count 0 2006.229.22:45:25.56#ibcon#about to read 3, iclass 15, count 0 2006.229.22:45:25.60#ibcon#read 3, iclass 15, count 0 2006.229.22:45:25.60#ibcon#about to read 4, iclass 15, count 0 2006.229.22:45:25.60#ibcon#read 4, iclass 15, count 0 2006.229.22:45:25.60#ibcon#about to read 5, iclass 15, count 0 2006.229.22:45:25.60#ibcon#read 5, iclass 15, count 0 2006.229.22:45:25.60#ibcon#about to read 6, iclass 15, count 0 2006.229.22:45:25.60#ibcon#read 6, iclass 15, count 0 2006.229.22:45:25.60#ibcon#end of sib2, iclass 15, count 0 2006.229.22:45:25.60#ibcon#*after write, iclass 15, count 0 2006.229.22:45:25.60#ibcon#*before return 0, iclass 15, count 0 2006.229.22:45:25.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:45:25.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.22:45:25.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:45:25.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:45:25.60$vck44/va=8,6 2006.229.22:45:25.60#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.22:45:25.60#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.22:45:25.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:25.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:25.66#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:25.66#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:25.66#ibcon#enter wrdev, iclass 17, count 2 2006.229.22:45:25.66#ibcon#first serial, iclass 17, count 2 2006.229.22:45:25.66#ibcon#enter sib2, iclass 17, count 2 2006.229.22:45:25.66#ibcon#flushed, iclass 17, count 2 2006.229.22:45:25.66#ibcon#about to write, iclass 17, count 2 2006.229.22:45:25.66#ibcon#wrote, iclass 17, count 2 2006.229.22:45:25.66#ibcon#about to read 3, iclass 17, count 2 2006.229.22:45:25.68#ibcon#read 3, iclass 17, count 2 2006.229.22:45:25.68#ibcon#about to read 4, iclass 17, count 2 2006.229.22:45:25.68#ibcon#read 4, iclass 17, count 2 2006.229.22:45:25.68#ibcon#about to read 5, iclass 17, count 2 2006.229.22:45:25.68#ibcon#read 5, iclass 17, count 2 2006.229.22:45:25.68#ibcon#about to read 6, iclass 17, count 2 2006.229.22:45:25.68#ibcon#read 6, iclass 17, count 2 2006.229.22:45:25.68#ibcon#end of sib2, iclass 17, count 2 2006.229.22:45:25.68#ibcon#*mode == 0, iclass 17, count 2 2006.229.22:45:25.68#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.22:45:25.68#ibcon#[25=AT08-06\r\n] 2006.229.22:45:25.68#ibcon#*before write, iclass 17, count 2 2006.229.22:45:25.68#ibcon#enter sib2, iclass 17, count 2 2006.229.22:45:25.68#ibcon#flushed, iclass 17, count 2 2006.229.22:45:25.68#ibcon#about to write, iclass 17, count 2 2006.229.22:45:25.68#ibcon#wrote, iclass 17, count 2 2006.229.22:45:25.68#ibcon#about to read 3, iclass 17, count 2 2006.229.22:45:25.71#ibcon#read 3, iclass 17, count 2 2006.229.22:45:25.71#ibcon#about to read 4, iclass 17, count 2 2006.229.22:45:25.71#ibcon#read 4, iclass 17, count 2 2006.229.22:45:25.71#ibcon#about to read 5, iclass 17, count 2 2006.229.22:45:25.71#ibcon#read 5, iclass 17, count 2 2006.229.22:45:25.71#ibcon#about to read 6, iclass 17, count 2 2006.229.22:45:25.71#ibcon#read 6, iclass 17, count 2 2006.229.22:45:25.71#ibcon#end of sib2, iclass 17, count 2 2006.229.22:45:25.71#ibcon#*after write, iclass 17, count 2 2006.229.22:45:25.71#ibcon#*before return 0, iclass 17, count 2 2006.229.22:45:25.71#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:25.71#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:25.71#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.22:45:25.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:25.71#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:25.83#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:25.83#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:25.83#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:45:25.83#ibcon#first serial, iclass 17, count 0 2006.229.22:45:25.83#ibcon#enter sib2, iclass 17, count 0 2006.229.22:45:25.83#ibcon#flushed, iclass 17, count 0 2006.229.22:45:25.83#ibcon#about to write, iclass 17, count 0 2006.229.22:45:25.83#ibcon#wrote, iclass 17, count 0 2006.229.22:45:25.83#ibcon#about to read 3, iclass 17, count 0 2006.229.22:45:25.85#ibcon#read 3, iclass 17, count 0 2006.229.22:45:25.85#ibcon#about to read 4, iclass 17, count 0 2006.229.22:45:25.85#ibcon#read 4, iclass 17, count 0 2006.229.22:45:25.85#ibcon#about to read 5, iclass 17, count 0 2006.229.22:45:25.85#ibcon#read 5, iclass 17, count 0 2006.229.22:45:25.85#ibcon#about to read 6, iclass 17, count 0 2006.229.22:45:25.85#ibcon#read 6, iclass 17, count 0 2006.229.22:45:25.85#ibcon#end of sib2, iclass 17, count 0 2006.229.22:45:25.85#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:45:25.85#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:45:25.85#ibcon#[25=USB\r\n] 2006.229.22:45:25.85#ibcon#*before write, iclass 17, count 0 2006.229.22:45:25.85#ibcon#enter sib2, iclass 17, count 0 2006.229.22:45:25.85#ibcon#flushed, iclass 17, count 0 2006.229.22:45:25.85#ibcon#about to write, iclass 17, count 0 2006.229.22:45:25.85#ibcon#wrote, iclass 17, count 0 2006.229.22:45:25.85#ibcon#about to read 3, iclass 17, count 0 2006.229.22:45:25.88#ibcon#read 3, iclass 17, count 0 2006.229.22:45:25.88#ibcon#about to read 4, iclass 17, count 0 2006.229.22:45:25.88#ibcon#read 4, iclass 17, count 0 2006.229.22:45:25.88#ibcon#about to read 5, iclass 17, count 0 2006.229.22:45:25.88#ibcon#read 5, iclass 17, count 0 2006.229.22:45:25.88#ibcon#about to read 6, iclass 17, count 0 2006.229.22:45:25.88#ibcon#read 6, iclass 17, count 0 2006.229.22:45:25.88#ibcon#end of sib2, iclass 17, count 0 2006.229.22:45:25.88#ibcon#*after write, iclass 17, count 0 2006.229.22:45:25.88#ibcon#*before return 0, iclass 17, count 0 2006.229.22:45:25.88#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:25.88#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:25.88#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:45:25.88#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:45:25.88$vck44/vblo=1,629.99 2006.229.22:45:25.88#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.22:45:25.88#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.22:45:25.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:25.88#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:25.88#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:25.88#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:25.88#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:45:25.88#ibcon#first serial, iclass 19, count 0 2006.229.22:45:25.88#ibcon#enter sib2, iclass 19, count 0 2006.229.22:45:25.88#ibcon#flushed, iclass 19, count 0 2006.229.22:45:25.88#ibcon#about to write, iclass 19, count 0 2006.229.22:45:25.88#ibcon#wrote, iclass 19, count 0 2006.229.22:45:25.88#ibcon#about to read 3, iclass 19, count 0 2006.229.22:45:25.90#ibcon#read 3, iclass 19, count 0 2006.229.22:45:25.90#ibcon#about to read 4, iclass 19, count 0 2006.229.22:45:25.90#ibcon#read 4, iclass 19, count 0 2006.229.22:45:25.90#ibcon#about to read 5, iclass 19, count 0 2006.229.22:45:25.90#ibcon#read 5, iclass 19, count 0 2006.229.22:45:25.90#ibcon#about to read 6, iclass 19, count 0 2006.229.22:45:25.90#ibcon#read 6, iclass 19, count 0 2006.229.22:45:25.90#ibcon#end of sib2, iclass 19, count 0 2006.229.22:45:25.90#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:45:25.90#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:45:25.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:45:25.90#ibcon#*before write, iclass 19, count 0 2006.229.22:45:25.90#ibcon#enter sib2, iclass 19, count 0 2006.229.22:45:25.90#ibcon#flushed, iclass 19, count 0 2006.229.22:45:25.90#ibcon#about to write, iclass 19, count 0 2006.229.22:45:25.90#ibcon#wrote, iclass 19, count 0 2006.229.22:45:25.90#ibcon#about to read 3, iclass 19, count 0 2006.229.22:45:25.94#ibcon#read 3, iclass 19, count 0 2006.229.22:45:25.94#ibcon#about to read 4, iclass 19, count 0 2006.229.22:45:25.94#ibcon#read 4, iclass 19, count 0 2006.229.22:45:25.94#ibcon#about to read 5, iclass 19, count 0 2006.229.22:45:25.94#ibcon#read 5, iclass 19, count 0 2006.229.22:45:25.94#ibcon#about to read 6, iclass 19, count 0 2006.229.22:45:25.94#ibcon#read 6, iclass 19, count 0 2006.229.22:45:25.94#ibcon#end of sib2, iclass 19, count 0 2006.229.22:45:25.94#ibcon#*after write, iclass 19, count 0 2006.229.22:45:25.94#ibcon#*before return 0, iclass 19, count 0 2006.229.22:45:25.94#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:25.94#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:25.94#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:45:25.94#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:45:25.94$vck44/vb=1,4 2006.229.22:45:25.94#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.22:45:25.94#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.22:45:25.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:25.94#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:45:25.94#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:45:25.94#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:45:25.94#ibcon#enter wrdev, iclass 21, count 2 2006.229.22:45:25.94#ibcon#first serial, iclass 21, count 2 2006.229.22:45:25.94#ibcon#enter sib2, iclass 21, count 2 2006.229.22:45:25.94#ibcon#flushed, iclass 21, count 2 2006.229.22:45:25.94#ibcon#about to write, iclass 21, count 2 2006.229.22:45:25.94#ibcon#wrote, iclass 21, count 2 2006.229.22:45:25.94#ibcon#about to read 3, iclass 21, count 2 2006.229.22:45:25.96#ibcon#read 3, iclass 21, count 2 2006.229.22:45:25.96#ibcon#about to read 4, iclass 21, count 2 2006.229.22:45:25.96#ibcon#read 4, iclass 21, count 2 2006.229.22:45:25.96#ibcon#about to read 5, iclass 21, count 2 2006.229.22:45:25.96#ibcon#read 5, iclass 21, count 2 2006.229.22:45:25.96#ibcon#about to read 6, iclass 21, count 2 2006.229.22:45:25.96#ibcon#read 6, iclass 21, count 2 2006.229.22:45:25.96#ibcon#end of sib2, iclass 21, count 2 2006.229.22:45:25.96#ibcon#*mode == 0, iclass 21, count 2 2006.229.22:45:25.96#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.22:45:25.96#ibcon#[27=AT01-04\r\n] 2006.229.22:45:25.96#ibcon#*before write, iclass 21, count 2 2006.229.22:45:25.96#ibcon#enter sib2, iclass 21, count 2 2006.229.22:45:25.96#ibcon#flushed, iclass 21, count 2 2006.229.22:45:25.96#ibcon#about to write, iclass 21, count 2 2006.229.22:45:25.96#ibcon#wrote, iclass 21, count 2 2006.229.22:45:25.96#ibcon#about to read 3, iclass 21, count 2 2006.229.22:45:25.99#ibcon#read 3, iclass 21, count 2 2006.229.22:45:25.99#ibcon#about to read 4, iclass 21, count 2 2006.229.22:45:25.99#ibcon#read 4, iclass 21, count 2 2006.229.22:45:25.99#ibcon#about to read 5, iclass 21, count 2 2006.229.22:45:25.99#ibcon#read 5, iclass 21, count 2 2006.229.22:45:25.99#ibcon#about to read 6, iclass 21, count 2 2006.229.22:45:25.99#ibcon#read 6, iclass 21, count 2 2006.229.22:45:25.99#ibcon#end of sib2, iclass 21, count 2 2006.229.22:45:25.99#ibcon#*after write, iclass 21, count 2 2006.229.22:45:25.99#ibcon#*before return 0, iclass 21, count 2 2006.229.22:45:25.99#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:45:25.99#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.22:45:25.99#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.22:45:25.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:25.99#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:45:26.11#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:45:26.11#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:45:26.11#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:45:26.11#ibcon#first serial, iclass 21, count 0 2006.229.22:45:26.11#ibcon#enter sib2, iclass 21, count 0 2006.229.22:45:26.11#ibcon#flushed, iclass 21, count 0 2006.229.22:45:26.11#ibcon#about to write, iclass 21, count 0 2006.229.22:45:26.11#ibcon#wrote, iclass 21, count 0 2006.229.22:45:26.11#ibcon#about to read 3, iclass 21, count 0 2006.229.22:45:26.13#ibcon#read 3, iclass 21, count 0 2006.229.22:45:26.13#ibcon#about to read 4, iclass 21, count 0 2006.229.22:45:26.13#ibcon#read 4, iclass 21, count 0 2006.229.22:45:26.13#ibcon#about to read 5, iclass 21, count 0 2006.229.22:45:26.13#ibcon#read 5, iclass 21, count 0 2006.229.22:45:26.13#ibcon#about to read 6, iclass 21, count 0 2006.229.22:45:26.13#ibcon#read 6, iclass 21, count 0 2006.229.22:45:26.13#ibcon#end of sib2, iclass 21, count 0 2006.229.22:45:26.13#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:45:26.13#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:45:26.13#ibcon#[27=USB\r\n] 2006.229.22:45:26.13#ibcon#*before write, iclass 21, count 0 2006.229.22:45:26.13#ibcon#enter sib2, iclass 21, count 0 2006.229.22:45:26.13#ibcon#flushed, iclass 21, count 0 2006.229.22:45:26.13#ibcon#about to write, iclass 21, count 0 2006.229.22:45:26.13#ibcon#wrote, iclass 21, count 0 2006.229.22:45:26.13#ibcon#about to read 3, iclass 21, count 0 2006.229.22:45:26.16#ibcon#read 3, iclass 21, count 0 2006.229.22:45:26.16#ibcon#about to read 4, iclass 21, count 0 2006.229.22:45:26.16#ibcon#read 4, iclass 21, count 0 2006.229.22:45:26.16#ibcon#about to read 5, iclass 21, count 0 2006.229.22:45:26.16#ibcon#read 5, iclass 21, count 0 2006.229.22:45:26.16#ibcon#about to read 6, iclass 21, count 0 2006.229.22:45:26.16#ibcon#read 6, iclass 21, count 0 2006.229.22:45:26.16#ibcon#end of sib2, iclass 21, count 0 2006.229.22:45:26.16#ibcon#*after write, iclass 21, count 0 2006.229.22:45:26.16#ibcon#*before return 0, iclass 21, count 0 2006.229.22:45:26.16#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:45:26.16#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.22:45:26.16#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:45:26.16#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:45:26.16$vck44/vblo=2,634.99 2006.229.22:45:26.16#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.22:45:26.16#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.22:45:26.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:26.16#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:26.16#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:26.16#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:26.16#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:45:26.16#ibcon#first serial, iclass 23, count 0 2006.229.22:45:26.16#ibcon#enter sib2, iclass 23, count 0 2006.229.22:45:26.16#ibcon#flushed, iclass 23, count 0 2006.229.22:45:26.16#ibcon#about to write, iclass 23, count 0 2006.229.22:45:26.16#ibcon#wrote, iclass 23, count 0 2006.229.22:45:26.16#ibcon#about to read 3, iclass 23, count 0 2006.229.22:45:26.18#ibcon#read 3, iclass 23, count 0 2006.229.22:45:26.18#ibcon#about to read 4, iclass 23, count 0 2006.229.22:45:26.18#ibcon#read 4, iclass 23, count 0 2006.229.22:45:26.18#ibcon#about to read 5, iclass 23, count 0 2006.229.22:45:26.18#ibcon#read 5, iclass 23, count 0 2006.229.22:45:26.18#ibcon#about to read 6, iclass 23, count 0 2006.229.22:45:26.18#ibcon#read 6, iclass 23, count 0 2006.229.22:45:26.18#ibcon#end of sib2, iclass 23, count 0 2006.229.22:45:26.18#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:45:26.18#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:45:26.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:45:26.18#ibcon#*before write, iclass 23, count 0 2006.229.22:45:26.18#ibcon#enter sib2, iclass 23, count 0 2006.229.22:45:26.18#ibcon#flushed, iclass 23, count 0 2006.229.22:45:26.18#ibcon#about to write, iclass 23, count 0 2006.229.22:45:26.18#ibcon#wrote, iclass 23, count 0 2006.229.22:45:26.18#ibcon#about to read 3, iclass 23, count 0 2006.229.22:45:26.22#ibcon#read 3, iclass 23, count 0 2006.229.22:45:26.22#ibcon#about to read 4, iclass 23, count 0 2006.229.22:45:26.22#ibcon#read 4, iclass 23, count 0 2006.229.22:45:26.22#ibcon#about to read 5, iclass 23, count 0 2006.229.22:45:26.22#ibcon#read 5, iclass 23, count 0 2006.229.22:45:26.22#ibcon#about to read 6, iclass 23, count 0 2006.229.22:45:26.22#ibcon#read 6, iclass 23, count 0 2006.229.22:45:26.22#ibcon#end of sib2, iclass 23, count 0 2006.229.22:45:26.22#ibcon#*after write, iclass 23, count 0 2006.229.22:45:26.22#ibcon#*before return 0, iclass 23, count 0 2006.229.22:45:26.22#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:26.22#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.22:45:26.22#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:45:26.22#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:45:26.22$vck44/vb=2,4 2006.229.22:45:26.22#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.22:45:26.22#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.22:45:26.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:26.22#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:26.28#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:26.28#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:26.28#ibcon#enter wrdev, iclass 25, count 2 2006.229.22:45:26.28#ibcon#first serial, iclass 25, count 2 2006.229.22:45:26.28#ibcon#enter sib2, iclass 25, count 2 2006.229.22:45:26.28#ibcon#flushed, iclass 25, count 2 2006.229.22:45:26.28#ibcon#about to write, iclass 25, count 2 2006.229.22:45:26.28#ibcon#wrote, iclass 25, count 2 2006.229.22:45:26.28#ibcon#about to read 3, iclass 25, count 2 2006.229.22:45:26.30#ibcon#read 3, iclass 25, count 2 2006.229.22:45:26.30#ibcon#about to read 4, iclass 25, count 2 2006.229.22:45:26.30#ibcon#read 4, iclass 25, count 2 2006.229.22:45:26.30#ibcon#about to read 5, iclass 25, count 2 2006.229.22:45:26.30#ibcon#read 5, iclass 25, count 2 2006.229.22:45:26.30#ibcon#about to read 6, iclass 25, count 2 2006.229.22:45:26.30#ibcon#read 6, iclass 25, count 2 2006.229.22:45:26.30#ibcon#end of sib2, iclass 25, count 2 2006.229.22:45:26.30#ibcon#*mode == 0, iclass 25, count 2 2006.229.22:45:26.30#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.22:45:26.30#ibcon#[27=AT02-04\r\n] 2006.229.22:45:26.30#ibcon#*before write, iclass 25, count 2 2006.229.22:45:26.30#ibcon#enter sib2, iclass 25, count 2 2006.229.22:45:26.30#ibcon#flushed, iclass 25, count 2 2006.229.22:45:26.30#ibcon#about to write, iclass 25, count 2 2006.229.22:45:26.30#ibcon#wrote, iclass 25, count 2 2006.229.22:45:26.30#ibcon#about to read 3, iclass 25, count 2 2006.229.22:45:26.33#ibcon#read 3, iclass 25, count 2 2006.229.22:45:26.33#ibcon#about to read 4, iclass 25, count 2 2006.229.22:45:26.33#ibcon#read 4, iclass 25, count 2 2006.229.22:45:26.33#ibcon#about to read 5, iclass 25, count 2 2006.229.22:45:26.33#ibcon#read 5, iclass 25, count 2 2006.229.22:45:26.33#ibcon#about to read 6, iclass 25, count 2 2006.229.22:45:26.33#ibcon#read 6, iclass 25, count 2 2006.229.22:45:26.33#ibcon#end of sib2, iclass 25, count 2 2006.229.22:45:26.33#ibcon#*after write, iclass 25, count 2 2006.229.22:45:26.33#ibcon#*before return 0, iclass 25, count 2 2006.229.22:45:26.33#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:26.33#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.22:45:26.33#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.22:45:26.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:26.33#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:26.45#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:26.45#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:26.45#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:45:26.45#ibcon#first serial, iclass 25, count 0 2006.229.22:45:26.45#ibcon#enter sib2, iclass 25, count 0 2006.229.22:45:26.45#ibcon#flushed, iclass 25, count 0 2006.229.22:45:26.45#ibcon#about to write, iclass 25, count 0 2006.229.22:45:26.45#ibcon#wrote, iclass 25, count 0 2006.229.22:45:26.45#ibcon#about to read 3, iclass 25, count 0 2006.229.22:45:26.47#ibcon#read 3, iclass 25, count 0 2006.229.22:45:26.47#ibcon#about to read 4, iclass 25, count 0 2006.229.22:45:26.47#ibcon#read 4, iclass 25, count 0 2006.229.22:45:26.47#ibcon#about to read 5, iclass 25, count 0 2006.229.22:45:26.47#ibcon#read 5, iclass 25, count 0 2006.229.22:45:26.47#ibcon#about to read 6, iclass 25, count 0 2006.229.22:45:26.47#ibcon#read 6, iclass 25, count 0 2006.229.22:45:26.47#ibcon#end of sib2, iclass 25, count 0 2006.229.22:45:26.47#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:45:26.47#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:45:26.47#ibcon#[27=USB\r\n] 2006.229.22:45:26.47#ibcon#*before write, iclass 25, count 0 2006.229.22:45:26.47#ibcon#enter sib2, iclass 25, count 0 2006.229.22:45:26.47#ibcon#flushed, iclass 25, count 0 2006.229.22:45:26.47#ibcon#about to write, iclass 25, count 0 2006.229.22:45:26.47#ibcon#wrote, iclass 25, count 0 2006.229.22:45:26.47#ibcon#about to read 3, iclass 25, count 0 2006.229.22:45:26.50#ibcon#read 3, iclass 25, count 0 2006.229.22:45:26.50#ibcon#about to read 4, iclass 25, count 0 2006.229.22:45:26.50#ibcon#read 4, iclass 25, count 0 2006.229.22:45:26.50#ibcon#about to read 5, iclass 25, count 0 2006.229.22:45:26.50#ibcon#read 5, iclass 25, count 0 2006.229.22:45:26.50#ibcon#about to read 6, iclass 25, count 0 2006.229.22:45:26.50#ibcon#read 6, iclass 25, count 0 2006.229.22:45:26.50#ibcon#end of sib2, iclass 25, count 0 2006.229.22:45:26.50#ibcon#*after write, iclass 25, count 0 2006.229.22:45:26.50#ibcon#*before return 0, iclass 25, count 0 2006.229.22:45:26.50#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:26.50#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.22:45:26.50#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:45:26.50#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:45:26.50$vck44/vblo=3,649.99 2006.229.22:45:26.50#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.22:45:26.50#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.22:45:26.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:26.50#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:26.50#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:26.50#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:26.50#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:45:26.50#ibcon#first serial, iclass 27, count 0 2006.229.22:45:26.50#ibcon#enter sib2, iclass 27, count 0 2006.229.22:45:26.50#ibcon#flushed, iclass 27, count 0 2006.229.22:45:26.50#ibcon#about to write, iclass 27, count 0 2006.229.22:45:26.50#ibcon#wrote, iclass 27, count 0 2006.229.22:45:26.50#ibcon#about to read 3, iclass 27, count 0 2006.229.22:45:26.52#ibcon#read 3, iclass 27, count 0 2006.229.22:45:26.52#ibcon#about to read 4, iclass 27, count 0 2006.229.22:45:26.52#ibcon#read 4, iclass 27, count 0 2006.229.22:45:26.52#ibcon#about to read 5, iclass 27, count 0 2006.229.22:45:26.52#ibcon#read 5, iclass 27, count 0 2006.229.22:45:26.52#ibcon#about to read 6, iclass 27, count 0 2006.229.22:45:26.52#ibcon#read 6, iclass 27, count 0 2006.229.22:45:26.52#ibcon#end of sib2, iclass 27, count 0 2006.229.22:45:26.52#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:45:26.52#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:45:26.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:45:26.52#ibcon#*before write, iclass 27, count 0 2006.229.22:45:26.52#ibcon#enter sib2, iclass 27, count 0 2006.229.22:45:26.52#ibcon#flushed, iclass 27, count 0 2006.229.22:45:26.52#ibcon#about to write, iclass 27, count 0 2006.229.22:45:26.52#ibcon#wrote, iclass 27, count 0 2006.229.22:45:26.52#ibcon#about to read 3, iclass 27, count 0 2006.229.22:45:26.56#ibcon#read 3, iclass 27, count 0 2006.229.22:45:26.56#ibcon#about to read 4, iclass 27, count 0 2006.229.22:45:26.56#ibcon#read 4, iclass 27, count 0 2006.229.22:45:26.56#ibcon#about to read 5, iclass 27, count 0 2006.229.22:45:26.56#ibcon#read 5, iclass 27, count 0 2006.229.22:45:26.56#ibcon#about to read 6, iclass 27, count 0 2006.229.22:45:26.56#ibcon#read 6, iclass 27, count 0 2006.229.22:45:26.56#ibcon#end of sib2, iclass 27, count 0 2006.229.22:45:26.56#ibcon#*after write, iclass 27, count 0 2006.229.22:45:26.56#ibcon#*before return 0, iclass 27, count 0 2006.229.22:45:26.56#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:26.56#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.22:45:26.56#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:45:26.56#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:45:26.56$vck44/vb=3,4 2006.229.22:45:26.56#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.22:45:26.56#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.22:45:26.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:26.56#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:26.62#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:26.62#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:26.62#ibcon#enter wrdev, iclass 29, count 2 2006.229.22:45:26.62#ibcon#first serial, iclass 29, count 2 2006.229.22:45:26.62#ibcon#enter sib2, iclass 29, count 2 2006.229.22:45:26.62#ibcon#flushed, iclass 29, count 2 2006.229.22:45:26.62#ibcon#about to write, iclass 29, count 2 2006.229.22:45:26.62#ibcon#wrote, iclass 29, count 2 2006.229.22:45:26.62#ibcon#about to read 3, iclass 29, count 2 2006.229.22:45:26.64#ibcon#read 3, iclass 29, count 2 2006.229.22:45:26.64#ibcon#about to read 4, iclass 29, count 2 2006.229.22:45:26.64#ibcon#read 4, iclass 29, count 2 2006.229.22:45:26.64#ibcon#about to read 5, iclass 29, count 2 2006.229.22:45:26.64#ibcon#read 5, iclass 29, count 2 2006.229.22:45:26.64#ibcon#about to read 6, iclass 29, count 2 2006.229.22:45:26.64#ibcon#read 6, iclass 29, count 2 2006.229.22:45:26.64#ibcon#end of sib2, iclass 29, count 2 2006.229.22:45:26.64#ibcon#*mode == 0, iclass 29, count 2 2006.229.22:45:26.64#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.22:45:26.64#ibcon#[27=AT03-04\r\n] 2006.229.22:45:26.64#ibcon#*before write, iclass 29, count 2 2006.229.22:45:26.64#ibcon#enter sib2, iclass 29, count 2 2006.229.22:45:26.64#ibcon#flushed, iclass 29, count 2 2006.229.22:45:26.64#ibcon#about to write, iclass 29, count 2 2006.229.22:45:26.64#ibcon#wrote, iclass 29, count 2 2006.229.22:45:26.64#ibcon#about to read 3, iclass 29, count 2 2006.229.22:45:26.67#ibcon#read 3, iclass 29, count 2 2006.229.22:45:26.67#ibcon#about to read 4, iclass 29, count 2 2006.229.22:45:26.67#ibcon#read 4, iclass 29, count 2 2006.229.22:45:26.67#ibcon#about to read 5, iclass 29, count 2 2006.229.22:45:26.67#ibcon#read 5, iclass 29, count 2 2006.229.22:45:26.67#ibcon#about to read 6, iclass 29, count 2 2006.229.22:45:26.67#ibcon#read 6, iclass 29, count 2 2006.229.22:45:26.67#ibcon#end of sib2, iclass 29, count 2 2006.229.22:45:26.67#ibcon#*after write, iclass 29, count 2 2006.229.22:45:26.67#ibcon#*before return 0, iclass 29, count 2 2006.229.22:45:26.67#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:26.67#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.22:45:26.67#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.22:45:26.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:26.67#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:26.79#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:26.79#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:26.79#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:45:26.79#ibcon#first serial, iclass 29, count 0 2006.229.22:45:26.79#ibcon#enter sib2, iclass 29, count 0 2006.229.22:45:26.79#ibcon#flushed, iclass 29, count 0 2006.229.22:45:26.79#ibcon#about to write, iclass 29, count 0 2006.229.22:45:26.79#ibcon#wrote, iclass 29, count 0 2006.229.22:45:26.79#ibcon#about to read 3, iclass 29, count 0 2006.229.22:45:26.81#ibcon#read 3, iclass 29, count 0 2006.229.22:45:26.81#ibcon#about to read 4, iclass 29, count 0 2006.229.22:45:26.81#ibcon#read 4, iclass 29, count 0 2006.229.22:45:26.81#ibcon#about to read 5, iclass 29, count 0 2006.229.22:45:26.81#ibcon#read 5, iclass 29, count 0 2006.229.22:45:26.81#ibcon#about to read 6, iclass 29, count 0 2006.229.22:45:26.81#ibcon#read 6, iclass 29, count 0 2006.229.22:45:26.81#ibcon#end of sib2, iclass 29, count 0 2006.229.22:45:26.81#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:45:26.81#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:45:26.81#ibcon#[27=USB\r\n] 2006.229.22:45:26.81#ibcon#*before write, iclass 29, count 0 2006.229.22:45:26.81#ibcon#enter sib2, iclass 29, count 0 2006.229.22:45:26.81#ibcon#flushed, iclass 29, count 0 2006.229.22:45:26.81#ibcon#about to write, iclass 29, count 0 2006.229.22:45:26.81#ibcon#wrote, iclass 29, count 0 2006.229.22:45:26.81#ibcon#about to read 3, iclass 29, count 0 2006.229.22:45:26.84#ibcon#read 3, iclass 29, count 0 2006.229.22:45:26.84#ibcon#about to read 4, iclass 29, count 0 2006.229.22:45:26.84#ibcon#read 4, iclass 29, count 0 2006.229.22:45:26.84#ibcon#about to read 5, iclass 29, count 0 2006.229.22:45:26.84#ibcon#read 5, iclass 29, count 0 2006.229.22:45:26.84#ibcon#about to read 6, iclass 29, count 0 2006.229.22:45:26.84#ibcon#read 6, iclass 29, count 0 2006.229.22:45:26.84#ibcon#end of sib2, iclass 29, count 0 2006.229.22:45:26.84#ibcon#*after write, iclass 29, count 0 2006.229.22:45:26.84#ibcon#*before return 0, iclass 29, count 0 2006.229.22:45:26.84#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:26.84#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.22:45:26.84#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:45:26.84#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:45:26.84$vck44/vblo=4,679.99 2006.229.22:45:26.84#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.22:45:26.84#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.22:45:26.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:26.84#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:26.84#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:26.84#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:26.84#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:45:26.84#ibcon#first serial, iclass 31, count 0 2006.229.22:45:26.84#ibcon#enter sib2, iclass 31, count 0 2006.229.22:45:26.84#ibcon#flushed, iclass 31, count 0 2006.229.22:45:26.84#ibcon#about to write, iclass 31, count 0 2006.229.22:45:26.84#ibcon#wrote, iclass 31, count 0 2006.229.22:45:26.84#ibcon#about to read 3, iclass 31, count 0 2006.229.22:45:26.86#ibcon#read 3, iclass 31, count 0 2006.229.22:45:26.86#ibcon#about to read 4, iclass 31, count 0 2006.229.22:45:26.86#ibcon#read 4, iclass 31, count 0 2006.229.22:45:26.86#ibcon#about to read 5, iclass 31, count 0 2006.229.22:45:26.86#ibcon#read 5, iclass 31, count 0 2006.229.22:45:26.86#ibcon#about to read 6, iclass 31, count 0 2006.229.22:45:26.86#ibcon#read 6, iclass 31, count 0 2006.229.22:45:26.86#ibcon#end of sib2, iclass 31, count 0 2006.229.22:45:26.86#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:45:26.86#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:45:26.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:45:26.86#ibcon#*before write, iclass 31, count 0 2006.229.22:45:26.86#ibcon#enter sib2, iclass 31, count 0 2006.229.22:45:26.86#ibcon#flushed, iclass 31, count 0 2006.229.22:45:26.86#ibcon#about to write, iclass 31, count 0 2006.229.22:45:26.86#ibcon#wrote, iclass 31, count 0 2006.229.22:45:26.86#ibcon#about to read 3, iclass 31, count 0 2006.229.22:45:26.90#ibcon#read 3, iclass 31, count 0 2006.229.22:45:26.90#ibcon#about to read 4, iclass 31, count 0 2006.229.22:45:26.90#ibcon#read 4, iclass 31, count 0 2006.229.22:45:26.90#ibcon#about to read 5, iclass 31, count 0 2006.229.22:45:26.90#ibcon#read 5, iclass 31, count 0 2006.229.22:45:26.90#ibcon#about to read 6, iclass 31, count 0 2006.229.22:45:26.90#ibcon#read 6, iclass 31, count 0 2006.229.22:45:26.90#ibcon#end of sib2, iclass 31, count 0 2006.229.22:45:26.90#ibcon#*after write, iclass 31, count 0 2006.229.22:45:26.90#ibcon#*before return 0, iclass 31, count 0 2006.229.22:45:26.90#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:26.90#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.22:45:26.90#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:45:26.90#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:45:26.90$vck44/vb=4,4 2006.229.22:45:26.90#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.22:45:26.90#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.22:45:26.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:26.90#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:26.96#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:26.96#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:26.96#ibcon#enter wrdev, iclass 33, count 2 2006.229.22:45:26.96#ibcon#first serial, iclass 33, count 2 2006.229.22:45:26.96#ibcon#enter sib2, iclass 33, count 2 2006.229.22:45:26.96#ibcon#flushed, iclass 33, count 2 2006.229.22:45:26.96#ibcon#about to write, iclass 33, count 2 2006.229.22:45:26.96#ibcon#wrote, iclass 33, count 2 2006.229.22:45:26.96#ibcon#about to read 3, iclass 33, count 2 2006.229.22:45:26.98#ibcon#read 3, iclass 33, count 2 2006.229.22:45:26.98#ibcon#about to read 4, iclass 33, count 2 2006.229.22:45:26.98#ibcon#read 4, iclass 33, count 2 2006.229.22:45:26.98#ibcon#about to read 5, iclass 33, count 2 2006.229.22:45:26.98#ibcon#read 5, iclass 33, count 2 2006.229.22:45:26.98#ibcon#about to read 6, iclass 33, count 2 2006.229.22:45:26.98#ibcon#read 6, iclass 33, count 2 2006.229.22:45:26.98#ibcon#end of sib2, iclass 33, count 2 2006.229.22:45:26.98#ibcon#*mode == 0, iclass 33, count 2 2006.229.22:45:26.98#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.22:45:26.98#ibcon#[27=AT04-04\r\n] 2006.229.22:45:26.98#ibcon#*before write, iclass 33, count 2 2006.229.22:45:26.98#ibcon#enter sib2, iclass 33, count 2 2006.229.22:45:26.98#ibcon#flushed, iclass 33, count 2 2006.229.22:45:26.98#ibcon#about to write, iclass 33, count 2 2006.229.22:45:26.98#ibcon#wrote, iclass 33, count 2 2006.229.22:45:26.98#ibcon#about to read 3, iclass 33, count 2 2006.229.22:45:27.01#ibcon#read 3, iclass 33, count 2 2006.229.22:45:27.01#ibcon#about to read 4, iclass 33, count 2 2006.229.22:45:27.01#ibcon#read 4, iclass 33, count 2 2006.229.22:45:27.01#ibcon#about to read 5, iclass 33, count 2 2006.229.22:45:27.01#ibcon#read 5, iclass 33, count 2 2006.229.22:45:27.01#ibcon#about to read 6, iclass 33, count 2 2006.229.22:45:27.01#ibcon#read 6, iclass 33, count 2 2006.229.22:45:27.01#ibcon#end of sib2, iclass 33, count 2 2006.229.22:45:27.01#ibcon#*after write, iclass 33, count 2 2006.229.22:45:27.01#ibcon#*before return 0, iclass 33, count 2 2006.229.22:45:27.01#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:27.01#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.22:45:27.01#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.22:45:27.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:27.01#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:27.13#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:27.13#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:27.13#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:45:27.13#ibcon#first serial, iclass 33, count 0 2006.229.22:45:27.13#ibcon#enter sib2, iclass 33, count 0 2006.229.22:45:27.13#ibcon#flushed, iclass 33, count 0 2006.229.22:45:27.13#ibcon#about to write, iclass 33, count 0 2006.229.22:45:27.13#ibcon#wrote, iclass 33, count 0 2006.229.22:45:27.13#ibcon#about to read 3, iclass 33, count 0 2006.229.22:45:27.15#ibcon#read 3, iclass 33, count 0 2006.229.22:45:27.15#ibcon#about to read 4, iclass 33, count 0 2006.229.22:45:27.15#ibcon#read 4, iclass 33, count 0 2006.229.22:45:27.15#ibcon#about to read 5, iclass 33, count 0 2006.229.22:45:27.15#ibcon#read 5, iclass 33, count 0 2006.229.22:45:27.15#ibcon#about to read 6, iclass 33, count 0 2006.229.22:45:27.15#ibcon#read 6, iclass 33, count 0 2006.229.22:45:27.15#ibcon#end of sib2, iclass 33, count 0 2006.229.22:45:27.15#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:45:27.15#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:45:27.15#ibcon#[27=USB\r\n] 2006.229.22:45:27.15#ibcon#*before write, iclass 33, count 0 2006.229.22:45:27.15#ibcon#enter sib2, iclass 33, count 0 2006.229.22:45:27.15#ibcon#flushed, iclass 33, count 0 2006.229.22:45:27.15#ibcon#about to write, iclass 33, count 0 2006.229.22:45:27.15#ibcon#wrote, iclass 33, count 0 2006.229.22:45:27.15#ibcon#about to read 3, iclass 33, count 0 2006.229.22:45:27.18#ibcon#read 3, iclass 33, count 0 2006.229.22:45:27.18#ibcon#about to read 4, iclass 33, count 0 2006.229.22:45:27.18#ibcon#read 4, iclass 33, count 0 2006.229.22:45:27.18#ibcon#about to read 5, iclass 33, count 0 2006.229.22:45:27.18#ibcon#read 5, iclass 33, count 0 2006.229.22:45:27.18#ibcon#about to read 6, iclass 33, count 0 2006.229.22:45:27.18#ibcon#read 6, iclass 33, count 0 2006.229.22:45:27.18#ibcon#end of sib2, iclass 33, count 0 2006.229.22:45:27.18#ibcon#*after write, iclass 33, count 0 2006.229.22:45:27.18#ibcon#*before return 0, iclass 33, count 0 2006.229.22:45:27.18#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:27.18#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.22:45:27.18#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:45:27.18#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:45:27.18$vck44/vblo=5,709.99 2006.229.22:45:27.18#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.22:45:27.18#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.22:45:27.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:27.18#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:27.18#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:27.18#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:27.18#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:45:27.18#ibcon#first serial, iclass 35, count 0 2006.229.22:45:27.18#ibcon#enter sib2, iclass 35, count 0 2006.229.22:45:27.18#ibcon#flushed, iclass 35, count 0 2006.229.22:45:27.18#ibcon#about to write, iclass 35, count 0 2006.229.22:45:27.18#ibcon#wrote, iclass 35, count 0 2006.229.22:45:27.18#ibcon#about to read 3, iclass 35, count 0 2006.229.22:45:27.20#ibcon#read 3, iclass 35, count 0 2006.229.22:45:27.20#ibcon#about to read 4, iclass 35, count 0 2006.229.22:45:27.20#ibcon#read 4, iclass 35, count 0 2006.229.22:45:27.20#ibcon#about to read 5, iclass 35, count 0 2006.229.22:45:27.20#ibcon#read 5, iclass 35, count 0 2006.229.22:45:27.20#ibcon#about to read 6, iclass 35, count 0 2006.229.22:45:27.20#ibcon#read 6, iclass 35, count 0 2006.229.22:45:27.20#ibcon#end of sib2, iclass 35, count 0 2006.229.22:45:27.20#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:45:27.20#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:45:27.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:45:27.20#ibcon#*before write, iclass 35, count 0 2006.229.22:45:27.20#ibcon#enter sib2, iclass 35, count 0 2006.229.22:45:27.20#ibcon#flushed, iclass 35, count 0 2006.229.22:45:27.20#ibcon#about to write, iclass 35, count 0 2006.229.22:45:27.20#ibcon#wrote, iclass 35, count 0 2006.229.22:45:27.20#ibcon#about to read 3, iclass 35, count 0 2006.229.22:45:27.24#ibcon#read 3, iclass 35, count 0 2006.229.22:45:27.24#ibcon#about to read 4, iclass 35, count 0 2006.229.22:45:27.24#ibcon#read 4, iclass 35, count 0 2006.229.22:45:27.24#ibcon#about to read 5, iclass 35, count 0 2006.229.22:45:27.24#ibcon#read 5, iclass 35, count 0 2006.229.22:45:27.24#ibcon#about to read 6, iclass 35, count 0 2006.229.22:45:27.24#ibcon#read 6, iclass 35, count 0 2006.229.22:45:27.24#ibcon#end of sib2, iclass 35, count 0 2006.229.22:45:27.24#ibcon#*after write, iclass 35, count 0 2006.229.22:45:27.24#ibcon#*before return 0, iclass 35, count 0 2006.229.22:45:27.24#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:27.24#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.22:45:27.24#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:45:27.24#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:45:27.24$vck44/vb=5,4 2006.229.22:45:27.24#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.22:45:27.24#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.22:45:27.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:27.24#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:27.30#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:27.30#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:27.30#ibcon#enter wrdev, iclass 37, count 2 2006.229.22:45:27.30#ibcon#first serial, iclass 37, count 2 2006.229.22:45:27.30#ibcon#enter sib2, iclass 37, count 2 2006.229.22:45:27.30#ibcon#flushed, iclass 37, count 2 2006.229.22:45:27.30#ibcon#about to write, iclass 37, count 2 2006.229.22:45:27.30#ibcon#wrote, iclass 37, count 2 2006.229.22:45:27.30#ibcon#about to read 3, iclass 37, count 2 2006.229.22:45:27.32#ibcon#read 3, iclass 37, count 2 2006.229.22:45:27.32#ibcon#about to read 4, iclass 37, count 2 2006.229.22:45:27.32#ibcon#read 4, iclass 37, count 2 2006.229.22:45:27.32#ibcon#about to read 5, iclass 37, count 2 2006.229.22:45:27.32#ibcon#read 5, iclass 37, count 2 2006.229.22:45:27.32#ibcon#about to read 6, iclass 37, count 2 2006.229.22:45:27.32#ibcon#read 6, iclass 37, count 2 2006.229.22:45:27.32#ibcon#end of sib2, iclass 37, count 2 2006.229.22:45:27.32#ibcon#*mode == 0, iclass 37, count 2 2006.229.22:45:27.32#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.22:45:27.32#ibcon#[27=AT05-04\r\n] 2006.229.22:45:27.32#ibcon#*before write, iclass 37, count 2 2006.229.22:45:27.32#ibcon#enter sib2, iclass 37, count 2 2006.229.22:45:27.32#ibcon#flushed, iclass 37, count 2 2006.229.22:45:27.32#ibcon#about to write, iclass 37, count 2 2006.229.22:45:27.32#ibcon#wrote, iclass 37, count 2 2006.229.22:45:27.32#ibcon#about to read 3, iclass 37, count 2 2006.229.22:45:27.35#ibcon#read 3, iclass 37, count 2 2006.229.22:45:27.35#ibcon#about to read 4, iclass 37, count 2 2006.229.22:45:27.35#ibcon#read 4, iclass 37, count 2 2006.229.22:45:27.35#ibcon#about to read 5, iclass 37, count 2 2006.229.22:45:27.35#ibcon#read 5, iclass 37, count 2 2006.229.22:45:27.35#ibcon#about to read 6, iclass 37, count 2 2006.229.22:45:27.35#ibcon#read 6, iclass 37, count 2 2006.229.22:45:27.35#ibcon#end of sib2, iclass 37, count 2 2006.229.22:45:27.35#ibcon#*after write, iclass 37, count 2 2006.229.22:45:27.35#ibcon#*before return 0, iclass 37, count 2 2006.229.22:45:27.35#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:27.35#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.22:45:27.35#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.22:45:27.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:27.35#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:27.47#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:27.47#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:27.47#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:45:27.47#ibcon#first serial, iclass 37, count 0 2006.229.22:45:27.47#ibcon#enter sib2, iclass 37, count 0 2006.229.22:45:27.47#ibcon#flushed, iclass 37, count 0 2006.229.22:45:27.47#ibcon#about to write, iclass 37, count 0 2006.229.22:45:27.47#ibcon#wrote, iclass 37, count 0 2006.229.22:45:27.47#ibcon#about to read 3, iclass 37, count 0 2006.229.22:45:27.49#ibcon#read 3, iclass 37, count 0 2006.229.22:45:27.49#ibcon#about to read 4, iclass 37, count 0 2006.229.22:45:27.49#ibcon#read 4, iclass 37, count 0 2006.229.22:45:27.49#ibcon#about to read 5, iclass 37, count 0 2006.229.22:45:27.49#ibcon#read 5, iclass 37, count 0 2006.229.22:45:27.49#ibcon#about to read 6, iclass 37, count 0 2006.229.22:45:27.49#ibcon#read 6, iclass 37, count 0 2006.229.22:45:27.49#ibcon#end of sib2, iclass 37, count 0 2006.229.22:45:27.49#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:45:27.49#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:45:27.49#ibcon#[27=USB\r\n] 2006.229.22:45:27.49#ibcon#*before write, iclass 37, count 0 2006.229.22:45:27.49#ibcon#enter sib2, iclass 37, count 0 2006.229.22:45:27.49#ibcon#flushed, iclass 37, count 0 2006.229.22:45:27.49#ibcon#about to write, iclass 37, count 0 2006.229.22:45:27.49#ibcon#wrote, iclass 37, count 0 2006.229.22:45:27.49#ibcon#about to read 3, iclass 37, count 0 2006.229.22:45:27.52#ibcon#read 3, iclass 37, count 0 2006.229.22:45:27.52#ibcon#about to read 4, iclass 37, count 0 2006.229.22:45:27.52#ibcon#read 4, iclass 37, count 0 2006.229.22:45:27.52#ibcon#about to read 5, iclass 37, count 0 2006.229.22:45:27.52#ibcon#read 5, iclass 37, count 0 2006.229.22:45:27.52#ibcon#about to read 6, iclass 37, count 0 2006.229.22:45:27.52#ibcon#read 6, iclass 37, count 0 2006.229.22:45:27.52#ibcon#end of sib2, iclass 37, count 0 2006.229.22:45:27.52#ibcon#*after write, iclass 37, count 0 2006.229.22:45:27.52#ibcon#*before return 0, iclass 37, count 0 2006.229.22:45:27.52#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:27.52#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.22:45:27.52#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:45:27.52#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:45:27.52$vck44/vblo=6,719.99 2006.229.22:45:27.52#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.22:45:27.52#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.22:45:27.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:27.52#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:27.52#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:27.52#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:27.52#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:45:27.52#ibcon#first serial, iclass 39, count 0 2006.229.22:45:27.52#ibcon#enter sib2, iclass 39, count 0 2006.229.22:45:27.52#ibcon#flushed, iclass 39, count 0 2006.229.22:45:27.52#ibcon#about to write, iclass 39, count 0 2006.229.22:45:27.52#ibcon#wrote, iclass 39, count 0 2006.229.22:45:27.52#ibcon#about to read 3, iclass 39, count 0 2006.229.22:45:27.54#ibcon#read 3, iclass 39, count 0 2006.229.22:45:27.54#ibcon#about to read 4, iclass 39, count 0 2006.229.22:45:27.54#ibcon#read 4, iclass 39, count 0 2006.229.22:45:27.54#ibcon#about to read 5, iclass 39, count 0 2006.229.22:45:27.54#ibcon#read 5, iclass 39, count 0 2006.229.22:45:27.54#ibcon#about to read 6, iclass 39, count 0 2006.229.22:45:27.54#ibcon#read 6, iclass 39, count 0 2006.229.22:45:27.54#ibcon#end of sib2, iclass 39, count 0 2006.229.22:45:27.54#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:45:27.54#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:45:27.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:45:27.54#ibcon#*before write, iclass 39, count 0 2006.229.22:45:27.54#ibcon#enter sib2, iclass 39, count 0 2006.229.22:45:27.54#ibcon#flushed, iclass 39, count 0 2006.229.22:45:27.54#ibcon#about to write, iclass 39, count 0 2006.229.22:45:27.54#ibcon#wrote, iclass 39, count 0 2006.229.22:45:27.54#ibcon#about to read 3, iclass 39, count 0 2006.229.22:45:27.58#ibcon#read 3, iclass 39, count 0 2006.229.22:45:27.58#ibcon#about to read 4, iclass 39, count 0 2006.229.22:45:27.58#ibcon#read 4, iclass 39, count 0 2006.229.22:45:27.58#ibcon#about to read 5, iclass 39, count 0 2006.229.22:45:27.58#ibcon#read 5, iclass 39, count 0 2006.229.22:45:27.58#ibcon#about to read 6, iclass 39, count 0 2006.229.22:45:27.58#ibcon#read 6, iclass 39, count 0 2006.229.22:45:27.58#ibcon#end of sib2, iclass 39, count 0 2006.229.22:45:27.58#ibcon#*after write, iclass 39, count 0 2006.229.22:45:27.58#ibcon#*before return 0, iclass 39, count 0 2006.229.22:45:27.58#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:27.58#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.22:45:27.58#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:45:27.58#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:45:27.58$vck44/vb=6,4 2006.229.22:45:27.58#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.22:45:27.58#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.22:45:27.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:27.58#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:27.64#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:27.64#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:27.64#ibcon#enter wrdev, iclass 3, count 2 2006.229.22:45:27.64#ibcon#first serial, iclass 3, count 2 2006.229.22:45:27.64#ibcon#enter sib2, iclass 3, count 2 2006.229.22:45:27.64#ibcon#flushed, iclass 3, count 2 2006.229.22:45:27.64#ibcon#about to write, iclass 3, count 2 2006.229.22:45:27.64#ibcon#wrote, iclass 3, count 2 2006.229.22:45:27.64#ibcon#about to read 3, iclass 3, count 2 2006.229.22:45:27.66#ibcon#read 3, iclass 3, count 2 2006.229.22:45:27.66#ibcon#about to read 4, iclass 3, count 2 2006.229.22:45:27.66#ibcon#read 4, iclass 3, count 2 2006.229.22:45:27.66#ibcon#about to read 5, iclass 3, count 2 2006.229.22:45:27.66#ibcon#read 5, iclass 3, count 2 2006.229.22:45:27.66#ibcon#about to read 6, iclass 3, count 2 2006.229.22:45:27.66#ibcon#read 6, iclass 3, count 2 2006.229.22:45:27.66#ibcon#end of sib2, iclass 3, count 2 2006.229.22:45:27.66#ibcon#*mode == 0, iclass 3, count 2 2006.229.22:45:27.66#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.22:45:27.66#ibcon#[27=AT06-04\r\n] 2006.229.22:45:27.66#ibcon#*before write, iclass 3, count 2 2006.229.22:45:27.66#ibcon#enter sib2, iclass 3, count 2 2006.229.22:45:27.66#ibcon#flushed, iclass 3, count 2 2006.229.22:45:27.66#ibcon#about to write, iclass 3, count 2 2006.229.22:45:27.66#ibcon#wrote, iclass 3, count 2 2006.229.22:45:27.66#ibcon#about to read 3, iclass 3, count 2 2006.229.22:45:27.69#ibcon#read 3, iclass 3, count 2 2006.229.22:45:27.69#ibcon#about to read 4, iclass 3, count 2 2006.229.22:45:27.69#ibcon#read 4, iclass 3, count 2 2006.229.22:45:27.69#ibcon#about to read 5, iclass 3, count 2 2006.229.22:45:27.69#ibcon#read 5, iclass 3, count 2 2006.229.22:45:27.69#ibcon#about to read 6, iclass 3, count 2 2006.229.22:45:27.69#ibcon#read 6, iclass 3, count 2 2006.229.22:45:27.69#ibcon#end of sib2, iclass 3, count 2 2006.229.22:45:27.69#ibcon#*after write, iclass 3, count 2 2006.229.22:45:27.69#ibcon#*before return 0, iclass 3, count 2 2006.229.22:45:27.69#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:27.69#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.22:45:27.69#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.22:45:27.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:27.69#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:27.81#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:27.81#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:27.81#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:45:27.81#ibcon#first serial, iclass 3, count 0 2006.229.22:45:27.81#ibcon#enter sib2, iclass 3, count 0 2006.229.22:45:27.81#ibcon#flushed, iclass 3, count 0 2006.229.22:45:27.81#ibcon#about to write, iclass 3, count 0 2006.229.22:45:27.81#ibcon#wrote, iclass 3, count 0 2006.229.22:45:27.81#ibcon#about to read 3, iclass 3, count 0 2006.229.22:45:27.83#ibcon#read 3, iclass 3, count 0 2006.229.22:45:27.83#ibcon#about to read 4, iclass 3, count 0 2006.229.22:45:27.83#ibcon#read 4, iclass 3, count 0 2006.229.22:45:27.83#ibcon#about to read 5, iclass 3, count 0 2006.229.22:45:27.83#ibcon#read 5, iclass 3, count 0 2006.229.22:45:27.83#ibcon#about to read 6, iclass 3, count 0 2006.229.22:45:27.83#ibcon#read 6, iclass 3, count 0 2006.229.22:45:27.83#ibcon#end of sib2, iclass 3, count 0 2006.229.22:45:27.83#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:45:27.83#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:45:27.83#ibcon#[27=USB\r\n] 2006.229.22:45:27.83#ibcon#*before write, iclass 3, count 0 2006.229.22:45:27.83#ibcon#enter sib2, iclass 3, count 0 2006.229.22:45:27.83#ibcon#flushed, iclass 3, count 0 2006.229.22:45:27.83#ibcon#about to write, iclass 3, count 0 2006.229.22:45:27.83#ibcon#wrote, iclass 3, count 0 2006.229.22:45:27.83#ibcon#about to read 3, iclass 3, count 0 2006.229.22:45:27.86#ibcon#read 3, iclass 3, count 0 2006.229.22:45:27.86#ibcon#about to read 4, iclass 3, count 0 2006.229.22:45:27.86#ibcon#read 4, iclass 3, count 0 2006.229.22:45:27.86#ibcon#about to read 5, iclass 3, count 0 2006.229.22:45:27.86#ibcon#read 5, iclass 3, count 0 2006.229.22:45:27.86#ibcon#about to read 6, iclass 3, count 0 2006.229.22:45:27.86#ibcon#read 6, iclass 3, count 0 2006.229.22:45:27.86#ibcon#end of sib2, iclass 3, count 0 2006.229.22:45:27.86#ibcon#*after write, iclass 3, count 0 2006.229.22:45:27.86#ibcon#*before return 0, iclass 3, count 0 2006.229.22:45:27.86#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:27.86#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.22:45:27.86#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:45:27.86#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:45:27.86$vck44/vblo=7,734.99 2006.229.22:45:27.86#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:45:27.86#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:45:27.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:27.86#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:27.86#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:27.86#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:27.86#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:45:27.86#ibcon#first serial, iclass 5, count 0 2006.229.22:45:27.86#ibcon#enter sib2, iclass 5, count 0 2006.229.22:45:27.86#ibcon#flushed, iclass 5, count 0 2006.229.22:45:27.86#ibcon#about to write, iclass 5, count 0 2006.229.22:45:27.86#ibcon#wrote, iclass 5, count 0 2006.229.22:45:27.86#ibcon#about to read 3, iclass 5, count 0 2006.229.22:45:27.88#ibcon#read 3, iclass 5, count 0 2006.229.22:45:27.88#ibcon#about to read 4, iclass 5, count 0 2006.229.22:45:27.88#ibcon#read 4, iclass 5, count 0 2006.229.22:45:27.88#ibcon#about to read 5, iclass 5, count 0 2006.229.22:45:27.88#ibcon#read 5, iclass 5, count 0 2006.229.22:45:27.88#ibcon#about to read 6, iclass 5, count 0 2006.229.22:45:27.88#ibcon#read 6, iclass 5, count 0 2006.229.22:45:27.88#ibcon#end of sib2, iclass 5, count 0 2006.229.22:45:27.88#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:45:27.88#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:45:27.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:45:27.88#ibcon#*before write, iclass 5, count 0 2006.229.22:45:27.88#ibcon#enter sib2, iclass 5, count 0 2006.229.22:45:27.88#ibcon#flushed, iclass 5, count 0 2006.229.22:45:27.88#ibcon#about to write, iclass 5, count 0 2006.229.22:45:27.88#ibcon#wrote, iclass 5, count 0 2006.229.22:45:27.88#ibcon#about to read 3, iclass 5, count 0 2006.229.22:45:27.92#ibcon#read 3, iclass 5, count 0 2006.229.22:45:27.92#ibcon#about to read 4, iclass 5, count 0 2006.229.22:45:27.92#ibcon#read 4, iclass 5, count 0 2006.229.22:45:27.92#ibcon#about to read 5, iclass 5, count 0 2006.229.22:45:27.92#ibcon#read 5, iclass 5, count 0 2006.229.22:45:27.92#ibcon#about to read 6, iclass 5, count 0 2006.229.22:45:27.92#ibcon#read 6, iclass 5, count 0 2006.229.22:45:27.92#ibcon#end of sib2, iclass 5, count 0 2006.229.22:45:27.92#ibcon#*after write, iclass 5, count 0 2006.229.22:45:27.92#ibcon#*before return 0, iclass 5, count 0 2006.229.22:45:27.92#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:27.92#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:45:27.92#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:45:27.92#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:45:27.92$vck44/vb=7,4 2006.229.22:45:27.92#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.22:45:27.92#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.22:45:27.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:27.92#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:27.98#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:27.98#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:27.98#ibcon#enter wrdev, iclass 7, count 2 2006.229.22:45:27.98#ibcon#first serial, iclass 7, count 2 2006.229.22:45:27.98#ibcon#enter sib2, iclass 7, count 2 2006.229.22:45:27.98#ibcon#flushed, iclass 7, count 2 2006.229.22:45:27.98#ibcon#about to write, iclass 7, count 2 2006.229.22:45:27.98#ibcon#wrote, iclass 7, count 2 2006.229.22:45:27.98#ibcon#about to read 3, iclass 7, count 2 2006.229.22:45:28.00#ibcon#read 3, iclass 7, count 2 2006.229.22:45:28.00#ibcon#about to read 4, iclass 7, count 2 2006.229.22:45:28.00#ibcon#read 4, iclass 7, count 2 2006.229.22:45:28.00#ibcon#about to read 5, iclass 7, count 2 2006.229.22:45:28.00#ibcon#read 5, iclass 7, count 2 2006.229.22:45:28.00#ibcon#about to read 6, iclass 7, count 2 2006.229.22:45:28.00#ibcon#read 6, iclass 7, count 2 2006.229.22:45:28.00#ibcon#end of sib2, iclass 7, count 2 2006.229.22:45:28.00#ibcon#*mode == 0, iclass 7, count 2 2006.229.22:45:28.00#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.22:45:28.00#ibcon#[27=AT07-04\r\n] 2006.229.22:45:28.00#ibcon#*before write, iclass 7, count 2 2006.229.22:45:28.00#ibcon#enter sib2, iclass 7, count 2 2006.229.22:45:28.00#ibcon#flushed, iclass 7, count 2 2006.229.22:45:28.00#ibcon#about to write, iclass 7, count 2 2006.229.22:45:28.00#ibcon#wrote, iclass 7, count 2 2006.229.22:45:28.00#ibcon#about to read 3, iclass 7, count 2 2006.229.22:45:28.03#ibcon#read 3, iclass 7, count 2 2006.229.22:45:28.03#ibcon#about to read 4, iclass 7, count 2 2006.229.22:45:28.03#ibcon#read 4, iclass 7, count 2 2006.229.22:45:28.03#ibcon#about to read 5, iclass 7, count 2 2006.229.22:45:28.03#ibcon#read 5, iclass 7, count 2 2006.229.22:45:28.03#ibcon#about to read 6, iclass 7, count 2 2006.229.22:45:28.03#ibcon#read 6, iclass 7, count 2 2006.229.22:45:28.03#ibcon#end of sib2, iclass 7, count 2 2006.229.22:45:28.03#ibcon#*after write, iclass 7, count 2 2006.229.22:45:28.03#ibcon#*before return 0, iclass 7, count 2 2006.229.22:45:28.03#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:28.03#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.22:45:28.03#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.22:45:28.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:28.03#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:28.15#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:28.15#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:28.15#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:45:28.15#ibcon#first serial, iclass 7, count 0 2006.229.22:45:28.15#ibcon#enter sib2, iclass 7, count 0 2006.229.22:45:28.15#ibcon#flushed, iclass 7, count 0 2006.229.22:45:28.15#ibcon#about to write, iclass 7, count 0 2006.229.22:45:28.15#ibcon#wrote, iclass 7, count 0 2006.229.22:45:28.15#ibcon#about to read 3, iclass 7, count 0 2006.229.22:45:28.17#ibcon#read 3, iclass 7, count 0 2006.229.22:45:28.17#ibcon#about to read 4, iclass 7, count 0 2006.229.22:45:28.17#ibcon#read 4, iclass 7, count 0 2006.229.22:45:28.17#ibcon#about to read 5, iclass 7, count 0 2006.229.22:45:28.17#ibcon#read 5, iclass 7, count 0 2006.229.22:45:28.17#ibcon#about to read 6, iclass 7, count 0 2006.229.22:45:28.17#ibcon#read 6, iclass 7, count 0 2006.229.22:45:28.17#ibcon#end of sib2, iclass 7, count 0 2006.229.22:45:28.17#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:45:28.17#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:45:28.17#ibcon#[27=USB\r\n] 2006.229.22:45:28.17#ibcon#*before write, iclass 7, count 0 2006.229.22:45:28.17#ibcon#enter sib2, iclass 7, count 0 2006.229.22:45:28.17#ibcon#flushed, iclass 7, count 0 2006.229.22:45:28.17#ibcon#about to write, iclass 7, count 0 2006.229.22:45:28.17#ibcon#wrote, iclass 7, count 0 2006.229.22:45:28.17#ibcon#about to read 3, iclass 7, count 0 2006.229.22:45:28.17#abcon#<5=/08 1.3 4.3 28.86 901002.6\r\n> 2006.229.22:45:28.19#abcon#{5=INTERFACE CLEAR} 2006.229.22:45:28.20#ibcon#read 3, iclass 7, count 0 2006.229.22:45:28.20#ibcon#about to read 4, iclass 7, count 0 2006.229.22:45:28.20#ibcon#read 4, iclass 7, count 0 2006.229.22:45:28.20#ibcon#about to read 5, iclass 7, count 0 2006.229.22:45:28.20#ibcon#read 5, iclass 7, count 0 2006.229.22:45:28.20#ibcon#about to read 6, iclass 7, count 0 2006.229.22:45:28.20#ibcon#read 6, iclass 7, count 0 2006.229.22:45:28.20#ibcon#end of sib2, iclass 7, count 0 2006.229.22:45:28.20#ibcon#*after write, iclass 7, count 0 2006.229.22:45:28.20#ibcon#*before return 0, iclass 7, count 0 2006.229.22:45:28.20#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:28.20#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.22:45:28.20#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:45:28.20#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:45:28.20$vck44/vblo=8,744.99 2006.229.22:45:28.20#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:45:28.20#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:45:28.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:45:28.20#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:45:28.20#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:45:28.20#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:45:28.20#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:45:28.20#ibcon#first serial, iclass 14, count 0 2006.229.22:45:28.20#ibcon#enter sib2, iclass 14, count 0 2006.229.22:45:28.20#ibcon#flushed, iclass 14, count 0 2006.229.22:45:28.20#ibcon#about to write, iclass 14, count 0 2006.229.22:45:28.20#ibcon#wrote, iclass 14, count 0 2006.229.22:45:28.20#ibcon#about to read 3, iclass 14, count 0 2006.229.22:45:28.22#ibcon#read 3, iclass 14, count 0 2006.229.22:45:28.22#ibcon#about to read 4, iclass 14, count 0 2006.229.22:45:28.22#ibcon#read 4, iclass 14, count 0 2006.229.22:45:28.22#ibcon#about to read 5, iclass 14, count 0 2006.229.22:45:28.22#ibcon#read 5, iclass 14, count 0 2006.229.22:45:28.22#ibcon#about to read 6, iclass 14, count 0 2006.229.22:45:28.22#ibcon#read 6, iclass 14, count 0 2006.229.22:45:28.22#ibcon#end of sib2, iclass 14, count 0 2006.229.22:45:28.22#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:45:28.22#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:45:28.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:45:28.22#ibcon#*before write, iclass 14, count 0 2006.229.22:45:28.22#ibcon#enter sib2, iclass 14, count 0 2006.229.22:45:28.22#ibcon#flushed, iclass 14, count 0 2006.229.22:45:28.22#ibcon#about to write, iclass 14, count 0 2006.229.22:45:28.22#ibcon#wrote, iclass 14, count 0 2006.229.22:45:28.22#ibcon#about to read 3, iclass 14, count 0 2006.229.22:45:28.25#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:45:28.26#ibcon#read 3, iclass 14, count 0 2006.229.22:45:28.26#ibcon#about to read 4, iclass 14, count 0 2006.229.22:45:28.26#ibcon#read 4, iclass 14, count 0 2006.229.22:45:28.26#ibcon#about to read 5, iclass 14, count 0 2006.229.22:45:28.26#ibcon#read 5, iclass 14, count 0 2006.229.22:45:28.26#ibcon#about to read 6, iclass 14, count 0 2006.229.22:45:28.26#ibcon#read 6, iclass 14, count 0 2006.229.22:45:28.26#ibcon#end of sib2, iclass 14, count 0 2006.229.22:45:28.26#ibcon#*after write, iclass 14, count 0 2006.229.22:45:28.26#ibcon#*before return 0, iclass 14, count 0 2006.229.22:45:28.26#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:45:28.26#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:45:28.26#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:45:28.26#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:45:28.26$vck44/vb=8,4 2006.229.22:45:28.26#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.22:45:28.26#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.22:45:28.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:45:28.26#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:28.32#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:28.32#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:28.32#ibcon#enter wrdev, iclass 17, count 2 2006.229.22:45:28.32#ibcon#first serial, iclass 17, count 2 2006.229.22:45:28.32#ibcon#enter sib2, iclass 17, count 2 2006.229.22:45:28.32#ibcon#flushed, iclass 17, count 2 2006.229.22:45:28.32#ibcon#about to write, iclass 17, count 2 2006.229.22:45:28.32#ibcon#wrote, iclass 17, count 2 2006.229.22:45:28.32#ibcon#about to read 3, iclass 17, count 2 2006.229.22:45:28.34#ibcon#read 3, iclass 17, count 2 2006.229.22:45:28.34#ibcon#about to read 4, iclass 17, count 2 2006.229.22:45:28.34#ibcon#read 4, iclass 17, count 2 2006.229.22:45:28.34#ibcon#about to read 5, iclass 17, count 2 2006.229.22:45:28.34#ibcon#read 5, iclass 17, count 2 2006.229.22:45:28.34#ibcon#about to read 6, iclass 17, count 2 2006.229.22:45:28.34#ibcon#read 6, iclass 17, count 2 2006.229.22:45:28.34#ibcon#end of sib2, iclass 17, count 2 2006.229.22:45:28.34#ibcon#*mode == 0, iclass 17, count 2 2006.229.22:45:28.34#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.22:45:28.34#ibcon#[27=AT08-04\r\n] 2006.229.22:45:28.34#ibcon#*before write, iclass 17, count 2 2006.229.22:45:28.34#ibcon#enter sib2, iclass 17, count 2 2006.229.22:45:28.34#ibcon#flushed, iclass 17, count 2 2006.229.22:45:28.34#ibcon#about to write, iclass 17, count 2 2006.229.22:45:28.34#ibcon#wrote, iclass 17, count 2 2006.229.22:45:28.34#ibcon#about to read 3, iclass 17, count 2 2006.229.22:45:28.37#ibcon#read 3, iclass 17, count 2 2006.229.22:45:28.37#ibcon#about to read 4, iclass 17, count 2 2006.229.22:45:28.37#ibcon#read 4, iclass 17, count 2 2006.229.22:45:28.37#ibcon#about to read 5, iclass 17, count 2 2006.229.22:45:28.37#ibcon#read 5, iclass 17, count 2 2006.229.22:45:28.37#ibcon#about to read 6, iclass 17, count 2 2006.229.22:45:28.37#ibcon#read 6, iclass 17, count 2 2006.229.22:45:28.37#ibcon#end of sib2, iclass 17, count 2 2006.229.22:45:28.37#ibcon#*after write, iclass 17, count 2 2006.229.22:45:28.37#ibcon#*before return 0, iclass 17, count 2 2006.229.22:45:28.37#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:28.37#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.22:45:28.37#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.22:45:28.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:45:28.37#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:28.49#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:28.49#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:28.49#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:45:28.49#ibcon#first serial, iclass 17, count 0 2006.229.22:45:28.49#ibcon#enter sib2, iclass 17, count 0 2006.229.22:45:28.49#ibcon#flushed, iclass 17, count 0 2006.229.22:45:28.49#ibcon#about to write, iclass 17, count 0 2006.229.22:45:28.49#ibcon#wrote, iclass 17, count 0 2006.229.22:45:28.49#ibcon#about to read 3, iclass 17, count 0 2006.229.22:45:28.51#ibcon#read 3, iclass 17, count 0 2006.229.22:45:28.51#ibcon#about to read 4, iclass 17, count 0 2006.229.22:45:28.51#ibcon#read 4, iclass 17, count 0 2006.229.22:45:28.51#ibcon#about to read 5, iclass 17, count 0 2006.229.22:45:28.51#ibcon#read 5, iclass 17, count 0 2006.229.22:45:28.51#ibcon#about to read 6, iclass 17, count 0 2006.229.22:45:28.51#ibcon#read 6, iclass 17, count 0 2006.229.22:45:28.51#ibcon#end of sib2, iclass 17, count 0 2006.229.22:45:28.51#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:45:28.51#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:45:28.51#ibcon#[27=USB\r\n] 2006.229.22:45:28.51#ibcon#*before write, iclass 17, count 0 2006.229.22:45:28.51#ibcon#enter sib2, iclass 17, count 0 2006.229.22:45:28.51#ibcon#flushed, iclass 17, count 0 2006.229.22:45:28.51#ibcon#about to write, iclass 17, count 0 2006.229.22:45:28.51#ibcon#wrote, iclass 17, count 0 2006.229.22:45:28.51#ibcon#about to read 3, iclass 17, count 0 2006.229.22:45:28.54#ibcon#read 3, iclass 17, count 0 2006.229.22:45:28.54#ibcon#about to read 4, iclass 17, count 0 2006.229.22:45:28.54#ibcon#read 4, iclass 17, count 0 2006.229.22:45:28.54#ibcon#about to read 5, iclass 17, count 0 2006.229.22:45:28.54#ibcon#read 5, iclass 17, count 0 2006.229.22:45:28.54#ibcon#about to read 6, iclass 17, count 0 2006.229.22:45:28.54#ibcon#read 6, iclass 17, count 0 2006.229.22:45:28.54#ibcon#end of sib2, iclass 17, count 0 2006.229.22:45:28.54#ibcon#*after write, iclass 17, count 0 2006.229.22:45:28.54#ibcon#*before return 0, iclass 17, count 0 2006.229.22:45:28.54#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:28.54#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.22:45:28.54#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:45:28.54#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:45:28.54$vck44/vabw=wide 2006.229.22:45:28.54#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.22:45:28.54#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.22:45:28.54#ibcon#ireg 8 cls_cnt 0 2006.229.22:45:28.54#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:28.54#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:28.54#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:28.54#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:45:28.54#ibcon#first serial, iclass 19, count 0 2006.229.22:45:28.54#ibcon#enter sib2, iclass 19, count 0 2006.229.22:45:28.54#ibcon#flushed, iclass 19, count 0 2006.229.22:45:28.54#ibcon#about to write, iclass 19, count 0 2006.229.22:45:28.54#ibcon#wrote, iclass 19, count 0 2006.229.22:45:28.54#ibcon#about to read 3, iclass 19, count 0 2006.229.22:45:28.56#ibcon#read 3, iclass 19, count 0 2006.229.22:45:28.56#ibcon#about to read 4, iclass 19, count 0 2006.229.22:45:28.56#ibcon#read 4, iclass 19, count 0 2006.229.22:45:28.56#ibcon#about to read 5, iclass 19, count 0 2006.229.22:45:28.56#ibcon#read 5, iclass 19, count 0 2006.229.22:45:28.56#ibcon#about to read 6, iclass 19, count 0 2006.229.22:45:28.56#ibcon#read 6, iclass 19, count 0 2006.229.22:45:28.56#ibcon#end of sib2, iclass 19, count 0 2006.229.22:45:28.56#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:45:28.56#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:45:28.56#ibcon#[25=BW32\r\n] 2006.229.22:45:28.56#ibcon#*before write, iclass 19, count 0 2006.229.22:45:28.56#ibcon#enter sib2, iclass 19, count 0 2006.229.22:45:28.56#ibcon#flushed, iclass 19, count 0 2006.229.22:45:28.56#ibcon#about to write, iclass 19, count 0 2006.229.22:45:28.56#ibcon#wrote, iclass 19, count 0 2006.229.22:45:28.56#ibcon#about to read 3, iclass 19, count 0 2006.229.22:45:28.59#ibcon#read 3, iclass 19, count 0 2006.229.22:45:28.59#ibcon#about to read 4, iclass 19, count 0 2006.229.22:45:28.59#ibcon#read 4, iclass 19, count 0 2006.229.22:45:28.59#ibcon#about to read 5, iclass 19, count 0 2006.229.22:45:28.59#ibcon#read 5, iclass 19, count 0 2006.229.22:45:28.59#ibcon#about to read 6, iclass 19, count 0 2006.229.22:45:28.59#ibcon#read 6, iclass 19, count 0 2006.229.22:45:28.59#ibcon#end of sib2, iclass 19, count 0 2006.229.22:45:28.59#ibcon#*after write, iclass 19, count 0 2006.229.22:45:28.59#ibcon#*before return 0, iclass 19, count 0 2006.229.22:45:28.59#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:28.59#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.22:45:28.59#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:45:28.59#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:45:28.59$vck44/vbbw=wide 2006.229.22:45:28.59#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:45:28.59#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:45:28.59#ibcon#ireg 8 cls_cnt 0 2006.229.22:45:28.59#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:45:28.66#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:45:28.66#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:45:28.66#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:45:28.66#ibcon#first serial, iclass 21, count 0 2006.229.22:45:28.66#ibcon#enter sib2, iclass 21, count 0 2006.229.22:45:28.66#ibcon#flushed, iclass 21, count 0 2006.229.22:45:28.66#ibcon#about to write, iclass 21, count 0 2006.229.22:45:28.66#ibcon#wrote, iclass 21, count 0 2006.229.22:45:28.66#ibcon#about to read 3, iclass 21, count 0 2006.229.22:45:28.68#ibcon#read 3, iclass 21, count 0 2006.229.22:45:28.68#ibcon#about to read 4, iclass 21, count 0 2006.229.22:45:28.68#ibcon#read 4, iclass 21, count 0 2006.229.22:45:28.68#ibcon#about to read 5, iclass 21, count 0 2006.229.22:45:28.68#ibcon#read 5, iclass 21, count 0 2006.229.22:45:28.68#ibcon#about to read 6, iclass 21, count 0 2006.229.22:45:28.68#ibcon#read 6, iclass 21, count 0 2006.229.22:45:28.68#ibcon#end of sib2, iclass 21, count 0 2006.229.22:45:28.68#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:45:28.68#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:45:28.68#ibcon#[27=BW32\r\n] 2006.229.22:45:28.68#ibcon#*before write, iclass 21, count 0 2006.229.22:45:28.68#ibcon#enter sib2, iclass 21, count 0 2006.229.22:45:28.68#ibcon#flushed, iclass 21, count 0 2006.229.22:45:28.68#ibcon#about to write, iclass 21, count 0 2006.229.22:45:28.68#ibcon#wrote, iclass 21, count 0 2006.229.22:45:28.68#ibcon#about to read 3, iclass 21, count 0 2006.229.22:45:28.71#ibcon#read 3, iclass 21, count 0 2006.229.22:45:28.71#ibcon#about to read 4, iclass 21, count 0 2006.229.22:45:28.71#ibcon#read 4, iclass 21, count 0 2006.229.22:45:28.71#ibcon#about to read 5, iclass 21, count 0 2006.229.22:45:28.71#ibcon#read 5, iclass 21, count 0 2006.229.22:45:28.71#ibcon#about to read 6, iclass 21, count 0 2006.229.22:45:28.71#ibcon#read 6, iclass 21, count 0 2006.229.22:45:28.71#ibcon#end of sib2, iclass 21, count 0 2006.229.22:45:28.71#ibcon#*after write, iclass 21, count 0 2006.229.22:45:28.71#ibcon#*before return 0, iclass 21, count 0 2006.229.22:45:28.71#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:45:28.71#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:45:28.71#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:45:28.71#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:45:28.71$setupk4/ifdk4 2006.229.22:45:28.71$ifdk4/lo= 2006.229.22:45:28.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:45:28.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:45:28.71$ifdk4/patch= 2006.229.22:45:28.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:45:28.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:45:28.71$setupk4/!*+20s 2006.229.22:45:38.34#abcon#<5=/08 1.4 4.3 28.86 891002.6\r\n> 2006.229.22:45:38.36#abcon#{5=INTERFACE CLEAR} 2006.229.22:45:38.42#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:45:43.23$setupk4/"tpicd 2006.229.22:45:43.23$setupk4/echo=off 2006.229.22:45:43.23$setupk4/xlog=off 2006.229.22:45:43.23:!2006.229.22:50:18 2006.229.22:46:18.13#trakl#Source acquired 2006.229.22:46:19.13#flagr#flagr/antenna,acquired 2006.229.22:50:18.00:preob 2006.229.22:50:18.14/onsource/TRACKING 2006.229.22:50:18.14:!2006.229.22:50:28 2006.229.22:50:28.00:"tape 2006.229.22:50:28.00:"st=record 2006.229.22:50:28.00:data_valid=on 2006.229.22:50:28.00:midob 2006.229.22:50:28.14/onsource/TRACKING 2006.229.22:50:28.14/wx/28.91,1002.6,88 2006.229.22:50:28.30/cable/+6.4159E-03 2006.229.22:50:29.39/va/01,08,usb,yes,29,32 2006.229.22:50:29.39/va/02,07,usb,yes,32,32 2006.229.22:50:29.39/va/03,06,usb,yes,39,42 2006.229.22:50:29.39/va/04,07,usb,yes,33,34 2006.229.22:50:29.39/va/05,04,usb,yes,29,30 2006.229.22:50:29.39/va/06,04,usb,yes,33,32 2006.229.22:50:29.39/va/07,05,usb,yes,29,30 2006.229.22:50:29.39/va/08,06,usb,yes,21,26 2006.229.22:50:29.62/valo/01,524.99,yes,locked 2006.229.22:50:29.62/valo/02,534.99,yes,locked 2006.229.22:50:29.62/valo/03,564.99,yes,locked 2006.229.22:50:29.62/valo/04,624.99,yes,locked 2006.229.22:50:29.62/valo/05,734.99,yes,locked 2006.229.22:50:29.62/valo/06,814.99,yes,locked 2006.229.22:50:29.62/valo/07,864.99,yes,locked 2006.229.22:50:29.62/valo/08,884.99,yes,locked 2006.229.22:50:30.71/vb/01,04,usb,yes,31,29 2006.229.22:50:30.71/vb/02,04,usb,yes,33,33 2006.229.22:50:30.71/vb/03,04,usb,yes,30,34 2006.229.22:50:30.71/vb/04,04,usb,yes,35,34 2006.229.22:50:30.71/vb/05,04,usb,yes,27,30 2006.229.22:50:30.71/vb/06,04,usb,yes,32,28 2006.229.22:50:30.71/vb/07,04,usb,yes,31,31 2006.229.22:50:30.71/vb/08,04,usb,yes,29,32 2006.229.22:50:30.94/vblo/01,629.99,yes,locked 2006.229.22:50:30.94/vblo/02,634.99,yes,locked 2006.229.22:50:30.94/vblo/03,649.99,yes,locked 2006.229.22:50:30.94/vblo/04,679.99,yes,locked 2006.229.22:50:30.94/vblo/05,709.99,yes,locked 2006.229.22:50:30.94/vblo/06,719.99,yes,locked 2006.229.22:50:30.94/vblo/07,734.99,yes,locked 2006.229.22:50:30.94/vblo/08,744.99,yes,locked 2006.229.22:50:31.09/vabw/8 2006.229.22:50:31.24/vbbw/8 2006.229.22:50:31.33/xfe/off,on,12.2 2006.229.22:50:31.70/ifatt/23,28,28,28 2006.229.22:50:32.07/fmout-gps/S +4.53E-07 2006.229.22:50:32.11:!2006.229.22:51:38 2006.229.22:51:38.00:data_valid=off 2006.229.22:51:38.00:"et 2006.229.22:51:38.00:!+3s 2006.229.22:51:41.01:"tape 2006.229.22:51:41.01:postob 2006.229.22:51:41.17/cable/+6.4137E-03 2006.229.22:51:41.17/wx/28.98,1002.6,89 2006.229.22:51:42.07/fmout-gps/S +4.53E-07 2006.229.22:51:42.07:scan_name=229-2253,jd0608,100 2006.229.22:51:42.07:source=0528+134,053056.42,133155.1,2000.0,ccw 2006.229.22:51:43.14#flagr#flagr/antenna,new-source 2006.229.22:51:43.14:checkk5 2006.229.22:51:43.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:51:43.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:51:44.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:51:44.70/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:51:45.09/chk_obsdata//k5ts1/T2292250??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:51:45.50/chk_obsdata//k5ts2/T2292250??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:51:45.89/chk_obsdata//k5ts3/T2292250??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:51:46.30/chk_obsdata//k5ts4/T2292250??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.22:51:47.01/k5log//k5ts1_log_newline 2006.229.22:51:47.72/k5log//k5ts2_log_newline 2006.229.22:51:48.45/k5log//k5ts3_log_newline 2006.229.22:51:49.15/k5log//k5ts4_log_newline 2006.229.22:51:49.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:51:49.17:setupk4=1 2006.229.22:51:49.17$setupk4/echo=on 2006.229.22:51:49.17$setupk4/pcalon 2006.229.22:51:49.17$pcalon/"no phase cal control is implemented here 2006.229.22:51:49.17$setupk4/"tpicd=stop 2006.229.22:51:49.18$setupk4/"rec=synch_on 2006.229.22:51:49.18$setupk4/"rec_mode=128 2006.229.22:51:49.18$setupk4/!* 2006.229.22:51:49.18$setupk4/recpk4 2006.229.22:51:49.18$recpk4/recpatch= 2006.229.22:51:49.18$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:51:49.18$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:51:49.18$setupk4/vck44 2006.229.22:51:49.18$vck44/valo=1,524.99 2006.229.22:51:49.18#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.22:51:49.18#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.22:51:49.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:49.18#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:49.18#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:49.18#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:49.18#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:51:49.18#ibcon#first serial, iclass 30, count 0 2006.229.22:51:49.18#ibcon#enter sib2, iclass 30, count 0 2006.229.22:51:49.18#ibcon#flushed, iclass 30, count 0 2006.229.22:51:49.18#ibcon#about to write, iclass 30, count 0 2006.229.22:51:49.18#ibcon#wrote, iclass 30, count 0 2006.229.22:51:49.18#ibcon#about to read 3, iclass 30, count 0 2006.229.22:51:49.19#ibcon#read 3, iclass 30, count 0 2006.229.22:51:49.19#ibcon#about to read 4, iclass 30, count 0 2006.229.22:51:49.19#ibcon#read 4, iclass 30, count 0 2006.229.22:51:49.19#ibcon#about to read 5, iclass 30, count 0 2006.229.22:51:49.19#ibcon#read 5, iclass 30, count 0 2006.229.22:51:49.19#ibcon#about to read 6, iclass 30, count 0 2006.229.22:51:49.19#ibcon#read 6, iclass 30, count 0 2006.229.22:51:49.19#ibcon#end of sib2, iclass 30, count 0 2006.229.22:51:49.19#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:51:49.19#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:51:49.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:51:49.19#ibcon#*before write, iclass 30, count 0 2006.229.22:51:49.19#ibcon#enter sib2, iclass 30, count 0 2006.229.22:51:49.19#ibcon#flushed, iclass 30, count 0 2006.229.22:51:49.19#ibcon#about to write, iclass 30, count 0 2006.229.22:51:49.19#ibcon#wrote, iclass 30, count 0 2006.229.22:51:49.19#ibcon#about to read 3, iclass 30, count 0 2006.229.22:51:49.24#ibcon#read 3, iclass 30, count 0 2006.229.22:51:49.24#ibcon#about to read 4, iclass 30, count 0 2006.229.22:51:49.24#ibcon#read 4, iclass 30, count 0 2006.229.22:51:49.24#ibcon#about to read 5, iclass 30, count 0 2006.229.22:51:49.24#ibcon#read 5, iclass 30, count 0 2006.229.22:51:49.24#ibcon#about to read 6, iclass 30, count 0 2006.229.22:51:49.24#ibcon#read 6, iclass 30, count 0 2006.229.22:51:49.24#ibcon#end of sib2, iclass 30, count 0 2006.229.22:51:49.24#ibcon#*after write, iclass 30, count 0 2006.229.22:51:49.24#ibcon#*before return 0, iclass 30, count 0 2006.229.22:51:49.24#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:49.24#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:49.24#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:51:49.24#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:51:49.24$vck44/va=1,8 2006.229.22:51:49.24#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.22:51:49.24#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.22:51:49.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:49.24#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:49.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:49.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:49.24#ibcon#enter wrdev, iclass 32, count 2 2006.229.22:51:49.24#ibcon#first serial, iclass 32, count 2 2006.229.22:51:49.24#ibcon#enter sib2, iclass 32, count 2 2006.229.22:51:49.24#ibcon#flushed, iclass 32, count 2 2006.229.22:51:49.24#ibcon#about to write, iclass 32, count 2 2006.229.22:51:49.24#ibcon#wrote, iclass 32, count 2 2006.229.22:51:49.24#ibcon#about to read 3, iclass 32, count 2 2006.229.22:51:49.26#ibcon#read 3, iclass 32, count 2 2006.229.22:51:49.26#ibcon#about to read 4, iclass 32, count 2 2006.229.22:51:49.26#ibcon#read 4, iclass 32, count 2 2006.229.22:51:49.26#ibcon#about to read 5, iclass 32, count 2 2006.229.22:51:49.26#ibcon#read 5, iclass 32, count 2 2006.229.22:51:49.26#ibcon#about to read 6, iclass 32, count 2 2006.229.22:51:49.26#ibcon#read 6, iclass 32, count 2 2006.229.22:51:49.26#ibcon#end of sib2, iclass 32, count 2 2006.229.22:51:49.26#ibcon#*mode == 0, iclass 32, count 2 2006.229.22:51:49.26#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.22:51:49.26#ibcon#[25=AT01-08\r\n] 2006.229.22:51:49.26#ibcon#*before write, iclass 32, count 2 2006.229.22:51:49.26#ibcon#enter sib2, iclass 32, count 2 2006.229.22:51:49.26#ibcon#flushed, iclass 32, count 2 2006.229.22:51:49.26#ibcon#about to write, iclass 32, count 2 2006.229.22:51:49.26#ibcon#wrote, iclass 32, count 2 2006.229.22:51:49.26#ibcon#about to read 3, iclass 32, count 2 2006.229.22:51:49.29#ibcon#read 3, iclass 32, count 2 2006.229.22:51:49.29#ibcon#about to read 4, iclass 32, count 2 2006.229.22:51:49.29#ibcon#read 4, iclass 32, count 2 2006.229.22:51:49.29#ibcon#about to read 5, iclass 32, count 2 2006.229.22:51:49.29#ibcon#read 5, iclass 32, count 2 2006.229.22:51:49.29#ibcon#about to read 6, iclass 32, count 2 2006.229.22:51:49.29#ibcon#read 6, iclass 32, count 2 2006.229.22:51:49.29#ibcon#end of sib2, iclass 32, count 2 2006.229.22:51:49.29#ibcon#*after write, iclass 32, count 2 2006.229.22:51:49.29#ibcon#*before return 0, iclass 32, count 2 2006.229.22:51:49.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:49.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:49.29#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.22:51:49.29#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:49.29#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:49.41#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:49.41#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:49.41#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:51:49.41#ibcon#first serial, iclass 32, count 0 2006.229.22:51:49.41#ibcon#enter sib2, iclass 32, count 0 2006.229.22:51:49.41#ibcon#flushed, iclass 32, count 0 2006.229.22:51:49.41#ibcon#about to write, iclass 32, count 0 2006.229.22:51:49.41#ibcon#wrote, iclass 32, count 0 2006.229.22:51:49.41#ibcon#about to read 3, iclass 32, count 0 2006.229.22:51:49.43#ibcon#read 3, iclass 32, count 0 2006.229.22:51:49.43#ibcon#about to read 4, iclass 32, count 0 2006.229.22:51:49.43#ibcon#read 4, iclass 32, count 0 2006.229.22:51:49.43#ibcon#about to read 5, iclass 32, count 0 2006.229.22:51:49.43#ibcon#read 5, iclass 32, count 0 2006.229.22:51:49.43#ibcon#about to read 6, iclass 32, count 0 2006.229.22:51:49.43#ibcon#read 6, iclass 32, count 0 2006.229.22:51:49.43#ibcon#end of sib2, iclass 32, count 0 2006.229.22:51:49.43#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:51:49.43#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:51:49.43#ibcon#[25=USB\r\n] 2006.229.22:51:49.43#ibcon#*before write, iclass 32, count 0 2006.229.22:51:49.43#ibcon#enter sib2, iclass 32, count 0 2006.229.22:51:49.43#ibcon#flushed, iclass 32, count 0 2006.229.22:51:49.43#ibcon#about to write, iclass 32, count 0 2006.229.22:51:49.43#ibcon#wrote, iclass 32, count 0 2006.229.22:51:49.43#ibcon#about to read 3, iclass 32, count 0 2006.229.22:51:49.46#ibcon#read 3, iclass 32, count 0 2006.229.22:51:49.46#ibcon#about to read 4, iclass 32, count 0 2006.229.22:51:49.46#ibcon#read 4, iclass 32, count 0 2006.229.22:51:49.46#ibcon#about to read 5, iclass 32, count 0 2006.229.22:51:49.46#ibcon#read 5, iclass 32, count 0 2006.229.22:51:49.46#ibcon#about to read 6, iclass 32, count 0 2006.229.22:51:49.46#ibcon#read 6, iclass 32, count 0 2006.229.22:51:49.46#ibcon#end of sib2, iclass 32, count 0 2006.229.22:51:49.46#ibcon#*after write, iclass 32, count 0 2006.229.22:51:49.46#ibcon#*before return 0, iclass 32, count 0 2006.229.22:51:49.46#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:49.46#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:49.46#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:51:49.46#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:51:49.46$vck44/valo=2,534.99 2006.229.22:51:49.46#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.22:51:49.46#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.22:51:49.46#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:49.46#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:49.46#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:49.46#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:49.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:51:49.46#ibcon#first serial, iclass 34, count 0 2006.229.22:51:49.46#ibcon#enter sib2, iclass 34, count 0 2006.229.22:51:49.46#ibcon#flushed, iclass 34, count 0 2006.229.22:51:49.46#ibcon#about to write, iclass 34, count 0 2006.229.22:51:49.46#ibcon#wrote, iclass 34, count 0 2006.229.22:51:49.46#ibcon#about to read 3, iclass 34, count 0 2006.229.22:51:49.48#ibcon#read 3, iclass 34, count 0 2006.229.22:51:49.48#ibcon#about to read 4, iclass 34, count 0 2006.229.22:51:49.48#ibcon#read 4, iclass 34, count 0 2006.229.22:51:49.48#ibcon#about to read 5, iclass 34, count 0 2006.229.22:51:49.48#ibcon#read 5, iclass 34, count 0 2006.229.22:51:49.48#ibcon#about to read 6, iclass 34, count 0 2006.229.22:51:49.48#ibcon#read 6, iclass 34, count 0 2006.229.22:51:49.48#ibcon#end of sib2, iclass 34, count 0 2006.229.22:51:49.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:51:49.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:51:49.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:51:49.48#ibcon#*before write, iclass 34, count 0 2006.229.22:51:49.48#ibcon#enter sib2, iclass 34, count 0 2006.229.22:51:49.48#ibcon#flushed, iclass 34, count 0 2006.229.22:51:49.48#ibcon#about to write, iclass 34, count 0 2006.229.22:51:49.48#ibcon#wrote, iclass 34, count 0 2006.229.22:51:49.48#ibcon#about to read 3, iclass 34, count 0 2006.229.22:51:49.52#ibcon#read 3, iclass 34, count 0 2006.229.22:51:49.52#ibcon#about to read 4, iclass 34, count 0 2006.229.22:51:49.52#ibcon#read 4, iclass 34, count 0 2006.229.22:51:49.52#ibcon#about to read 5, iclass 34, count 0 2006.229.22:51:49.52#ibcon#read 5, iclass 34, count 0 2006.229.22:51:49.52#ibcon#about to read 6, iclass 34, count 0 2006.229.22:51:49.52#ibcon#read 6, iclass 34, count 0 2006.229.22:51:49.52#ibcon#end of sib2, iclass 34, count 0 2006.229.22:51:49.52#ibcon#*after write, iclass 34, count 0 2006.229.22:51:49.52#ibcon#*before return 0, iclass 34, count 0 2006.229.22:51:49.52#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:49.52#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:49.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:51:49.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:51:49.52$vck44/va=2,7 2006.229.22:51:49.52#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.22:51:49.52#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.22:51:49.52#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:49.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:49.58#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:49.58#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:49.58#ibcon#enter wrdev, iclass 36, count 2 2006.229.22:51:49.58#ibcon#first serial, iclass 36, count 2 2006.229.22:51:49.58#ibcon#enter sib2, iclass 36, count 2 2006.229.22:51:49.58#ibcon#flushed, iclass 36, count 2 2006.229.22:51:49.58#ibcon#about to write, iclass 36, count 2 2006.229.22:51:49.58#ibcon#wrote, iclass 36, count 2 2006.229.22:51:49.58#ibcon#about to read 3, iclass 36, count 2 2006.229.22:51:49.60#ibcon#read 3, iclass 36, count 2 2006.229.22:51:49.60#ibcon#about to read 4, iclass 36, count 2 2006.229.22:51:49.60#ibcon#read 4, iclass 36, count 2 2006.229.22:51:49.60#ibcon#about to read 5, iclass 36, count 2 2006.229.22:51:49.60#ibcon#read 5, iclass 36, count 2 2006.229.22:51:49.60#ibcon#about to read 6, iclass 36, count 2 2006.229.22:51:49.60#ibcon#read 6, iclass 36, count 2 2006.229.22:51:49.60#ibcon#end of sib2, iclass 36, count 2 2006.229.22:51:49.60#ibcon#*mode == 0, iclass 36, count 2 2006.229.22:51:49.60#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.22:51:49.60#ibcon#[25=AT02-07\r\n] 2006.229.22:51:49.60#ibcon#*before write, iclass 36, count 2 2006.229.22:51:49.60#ibcon#enter sib2, iclass 36, count 2 2006.229.22:51:49.60#ibcon#flushed, iclass 36, count 2 2006.229.22:51:49.60#ibcon#about to write, iclass 36, count 2 2006.229.22:51:49.60#ibcon#wrote, iclass 36, count 2 2006.229.22:51:49.60#ibcon#about to read 3, iclass 36, count 2 2006.229.22:51:49.63#ibcon#read 3, iclass 36, count 2 2006.229.22:51:49.63#ibcon#about to read 4, iclass 36, count 2 2006.229.22:51:49.63#ibcon#read 4, iclass 36, count 2 2006.229.22:51:49.63#ibcon#about to read 5, iclass 36, count 2 2006.229.22:51:49.63#ibcon#read 5, iclass 36, count 2 2006.229.22:51:49.63#ibcon#about to read 6, iclass 36, count 2 2006.229.22:51:49.63#ibcon#read 6, iclass 36, count 2 2006.229.22:51:49.63#ibcon#end of sib2, iclass 36, count 2 2006.229.22:51:49.63#ibcon#*after write, iclass 36, count 2 2006.229.22:51:49.63#ibcon#*before return 0, iclass 36, count 2 2006.229.22:51:49.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:49.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:49.63#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.22:51:49.63#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:49.63#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:49.75#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:49.75#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:49.75#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:51:49.75#ibcon#first serial, iclass 36, count 0 2006.229.22:51:49.75#ibcon#enter sib2, iclass 36, count 0 2006.229.22:51:49.75#ibcon#flushed, iclass 36, count 0 2006.229.22:51:49.75#ibcon#about to write, iclass 36, count 0 2006.229.22:51:49.75#ibcon#wrote, iclass 36, count 0 2006.229.22:51:49.75#ibcon#about to read 3, iclass 36, count 0 2006.229.22:51:49.77#ibcon#read 3, iclass 36, count 0 2006.229.22:51:49.77#ibcon#about to read 4, iclass 36, count 0 2006.229.22:51:49.77#ibcon#read 4, iclass 36, count 0 2006.229.22:51:49.77#ibcon#about to read 5, iclass 36, count 0 2006.229.22:51:49.77#ibcon#read 5, iclass 36, count 0 2006.229.22:51:49.77#ibcon#about to read 6, iclass 36, count 0 2006.229.22:51:49.77#ibcon#read 6, iclass 36, count 0 2006.229.22:51:49.77#ibcon#end of sib2, iclass 36, count 0 2006.229.22:51:49.77#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:51:49.77#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:51:49.77#ibcon#[25=USB\r\n] 2006.229.22:51:49.77#ibcon#*before write, iclass 36, count 0 2006.229.22:51:49.77#ibcon#enter sib2, iclass 36, count 0 2006.229.22:51:49.77#ibcon#flushed, iclass 36, count 0 2006.229.22:51:49.77#ibcon#about to write, iclass 36, count 0 2006.229.22:51:49.77#ibcon#wrote, iclass 36, count 0 2006.229.22:51:49.77#ibcon#about to read 3, iclass 36, count 0 2006.229.22:51:49.80#ibcon#read 3, iclass 36, count 0 2006.229.22:51:49.80#ibcon#about to read 4, iclass 36, count 0 2006.229.22:51:49.80#ibcon#read 4, iclass 36, count 0 2006.229.22:51:49.80#ibcon#about to read 5, iclass 36, count 0 2006.229.22:51:49.80#ibcon#read 5, iclass 36, count 0 2006.229.22:51:49.80#ibcon#about to read 6, iclass 36, count 0 2006.229.22:51:49.80#ibcon#read 6, iclass 36, count 0 2006.229.22:51:49.80#ibcon#end of sib2, iclass 36, count 0 2006.229.22:51:49.80#ibcon#*after write, iclass 36, count 0 2006.229.22:51:49.80#ibcon#*before return 0, iclass 36, count 0 2006.229.22:51:49.80#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:49.80#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:49.80#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:51:49.80#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:51:49.80$vck44/valo=3,564.99 2006.229.22:51:49.80#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.22:51:49.80#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.22:51:49.80#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:49.80#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:49.80#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:49.80#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:49.80#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:51:49.80#ibcon#first serial, iclass 38, count 0 2006.229.22:51:49.80#ibcon#enter sib2, iclass 38, count 0 2006.229.22:51:49.80#ibcon#flushed, iclass 38, count 0 2006.229.22:51:49.80#ibcon#about to write, iclass 38, count 0 2006.229.22:51:49.80#ibcon#wrote, iclass 38, count 0 2006.229.22:51:49.80#ibcon#about to read 3, iclass 38, count 0 2006.229.22:51:49.82#ibcon#read 3, iclass 38, count 0 2006.229.22:51:49.82#ibcon#about to read 4, iclass 38, count 0 2006.229.22:51:49.82#ibcon#read 4, iclass 38, count 0 2006.229.22:51:49.82#ibcon#about to read 5, iclass 38, count 0 2006.229.22:51:49.82#ibcon#read 5, iclass 38, count 0 2006.229.22:51:49.82#ibcon#about to read 6, iclass 38, count 0 2006.229.22:51:49.82#ibcon#read 6, iclass 38, count 0 2006.229.22:51:49.82#ibcon#end of sib2, iclass 38, count 0 2006.229.22:51:49.82#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:51:49.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:51:49.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:51:49.82#ibcon#*before write, iclass 38, count 0 2006.229.22:51:49.82#ibcon#enter sib2, iclass 38, count 0 2006.229.22:51:49.82#ibcon#flushed, iclass 38, count 0 2006.229.22:51:49.82#ibcon#about to write, iclass 38, count 0 2006.229.22:51:49.82#ibcon#wrote, iclass 38, count 0 2006.229.22:51:49.82#ibcon#about to read 3, iclass 38, count 0 2006.229.22:51:49.86#ibcon#read 3, iclass 38, count 0 2006.229.22:51:49.86#ibcon#about to read 4, iclass 38, count 0 2006.229.22:51:49.86#ibcon#read 4, iclass 38, count 0 2006.229.22:51:49.86#ibcon#about to read 5, iclass 38, count 0 2006.229.22:51:49.86#ibcon#read 5, iclass 38, count 0 2006.229.22:51:49.86#ibcon#about to read 6, iclass 38, count 0 2006.229.22:51:49.86#ibcon#read 6, iclass 38, count 0 2006.229.22:51:49.86#ibcon#end of sib2, iclass 38, count 0 2006.229.22:51:49.86#ibcon#*after write, iclass 38, count 0 2006.229.22:51:49.86#ibcon#*before return 0, iclass 38, count 0 2006.229.22:51:49.86#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:49.86#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:49.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:51:49.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:51:49.86$vck44/va=3,6 2006.229.22:51:49.86#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.22:51:49.86#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.22:51:49.86#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:49.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:49.92#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:49.92#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:49.92#ibcon#enter wrdev, iclass 40, count 2 2006.229.22:51:49.92#ibcon#first serial, iclass 40, count 2 2006.229.22:51:49.92#ibcon#enter sib2, iclass 40, count 2 2006.229.22:51:49.92#ibcon#flushed, iclass 40, count 2 2006.229.22:51:49.92#ibcon#about to write, iclass 40, count 2 2006.229.22:51:49.92#ibcon#wrote, iclass 40, count 2 2006.229.22:51:49.92#ibcon#about to read 3, iclass 40, count 2 2006.229.22:51:49.94#ibcon#read 3, iclass 40, count 2 2006.229.22:51:49.94#ibcon#about to read 4, iclass 40, count 2 2006.229.22:51:49.94#ibcon#read 4, iclass 40, count 2 2006.229.22:51:49.94#ibcon#about to read 5, iclass 40, count 2 2006.229.22:51:49.94#ibcon#read 5, iclass 40, count 2 2006.229.22:51:49.94#ibcon#about to read 6, iclass 40, count 2 2006.229.22:51:49.94#ibcon#read 6, iclass 40, count 2 2006.229.22:51:49.94#ibcon#end of sib2, iclass 40, count 2 2006.229.22:51:49.94#ibcon#*mode == 0, iclass 40, count 2 2006.229.22:51:49.94#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.22:51:49.94#ibcon#[25=AT03-06\r\n] 2006.229.22:51:49.94#ibcon#*before write, iclass 40, count 2 2006.229.22:51:49.94#ibcon#enter sib2, iclass 40, count 2 2006.229.22:51:49.94#ibcon#flushed, iclass 40, count 2 2006.229.22:51:49.94#ibcon#about to write, iclass 40, count 2 2006.229.22:51:49.94#ibcon#wrote, iclass 40, count 2 2006.229.22:51:49.94#ibcon#about to read 3, iclass 40, count 2 2006.229.22:51:49.97#ibcon#read 3, iclass 40, count 2 2006.229.22:51:49.97#ibcon#about to read 4, iclass 40, count 2 2006.229.22:51:49.97#ibcon#read 4, iclass 40, count 2 2006.229.22:51:49.97#ibcon#about to read 5, iclass 40, count 2 2006.229.22:51:49.97#ibcon#read 5, iclass 40, count 2 2006.229.22:51:49.97#ibcon#about to read 6, iclass 40, count 2 2006.229.22:51:49.97#ibcon#read 6, iclass 40, count 2 2006.229.22:51:49.97#ibcon#end of sib2, iclass 40, count 2 2006.229.22:51:49.97#ibcon#*after write, iclass 40, count 2 2006.229.22:51:49.97#ibcon#*before return 0, iclass 40, count 2 2006.229.22:51:49.97#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:49.97#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:49.97#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.22:51:49.97#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:49.97#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:50.09#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:50.09#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:50.09#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:51:50.09#ibcon#first serial, iclass 40, count 0 2006.229.22:51:50.09#ibcon#enter sib2, iclass 40, count 0 2006.229.22:51:50.09#ibcon#flushed, iclass 40, count 0 2006.229.22:51:50.09#ibcon#about to write, iclass 40, count 0 2006.229.22:51:50.09#ibcon#wrote, iclass 40, count 0 2006.229.22:51:50.09#ibcon#about to read 3, iclass 40, count 0 2006.229.22:51:50.11#ibcon#read 3, iclass 40, count 0 2006.229.22:51:50.11#ibcon#about to read 4, iclass 40, count 0 2006.229.22:51:50.11#ibcon#read 4, iclass 40, count 0 2006.229.22:51:50.11#ibcon#about to read 5, iclass 40, count 0 2006.229.22:51:50.11#ibcon#read 5, iclass 40, count 0 2006.229.22:51:50.11#ibcon#about to read 6, iclass 40, count 0 2006.229.22:51:50.11#ibcon#read 6, iclass 40, count 0 2006.229.22:51:50.11#ibcon#end of sib2, iclass 40, count 0 2006.229.22:51:50.11#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:51:50.11#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:51:50.11#ibcon#[25=USB\r\n] 2006.229.22:51:50.11#ibcon#*before write, iclass 40, count 0 2006.229.22:51:50.11#ibcon#enter sib2, iclass 40, count 0 2006.229.22:51:50.11#ibcon#flushed, iclass 40, count 0 2006.229.22:51:50.11#ibcon#about to write, iclass 40, count 0 2006.229.22:51:50.11#ibcon#wrote, iclass 40, count 0 2006.229.22:51:50.11#ibcon#about to read 3, iclass 40, count 0 2006.229.22:51:50.14#ibcon#read 3, iclass 40, count 0 2006.229.22:51:50.14#ibcon#about to read 4, iclass 40, count 0 2006.229.22:51:50.14#ibcon#read 4, iclass 40, count 0 2006.229.22:51:50.14#ibcon#about to read 5, iclass 40, count 0 2006.229.22:51:50.14#ibcon#read 5, iclass 40, count 0 2006.229.22:51:50.14#ibcon#about to read 6, iclass 40, count 0 2006.229.22:51:50.14#ibcon#read 6, iclass 40, count 0 2006.229.22:51:50.14#ibcon#end of sib2, iclass 40, count 0 2006.229.22:51:50.14#ibcon#*after write, iclass 40, count 0 2006.229.22:51:50.14#ibcon#*before return 0, iclass 40, count 0 2006.229.22:51:50.14#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:50.14#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:50.14#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:51:50.14#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:51:50.14$vck44/valo=4,624.99 2006.229.22:51:50.14#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.22:51:50.14#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.22:51:50.14#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:50.14#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:50.14#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:50.14#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:50.14#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:51:50.14#ibcon#first serial, iclass 4, count 0 2006.229.22:51:50.14#ibcon#enter sib2, iclass 4, count 0 2006.229.22:51:50.14#ibcon#flushed, iclass 4, count 0 2006.229.22:51:50.14#ibcon#about to write, iclass 4, count 0 2006.229.22:51:50.14#ibcon#wrote, iclass 4, count 0 2006.229.22:51:50.14#ibcon#about to read 3, iclass 4, count 0 2006.229.22:51:50.16#ibcon#read 3, iclass 4, count 0 2006.229.22:51:50.16#ibcon#about to read 4, iclass 4, count 0 2006.229.22:51:50.16#ibcon#read 4, iclass 4, count 0 2006.229.22:51:50.16#ibcon#about to read 5, iclass 4, count 0 2006.229.22:51:50.16#ibcon#read 5, iclass 4, count 0 2006.229.22:51:50.16#ibcon#about to read 6, iclass 4, count 0 2006.229.22:51:50.16#ibcon#read 6, iclass 4, count 0 2006.229.22:51:50.16#ibcon#end of sib2, iclass 4, count 0 2006.229.22:51:50.16#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:51:50.16#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:51:50.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:51:50.16#ibcon#*before write, iclass 4, count 0 2006.229.22:51:50.16#ibcon#enter sib2, iclass 4, count 0 2006.229.22:51:50.16#ibcon#flushed, iclass 4, count 0 2006.229.22:51:50.16#ibcon#about to write, iclass 4, count 0 2006.229.22:51:50.16#ibcon#wrote, iclass 4, count 0 2006.229.22:51:50.16#ibcon#about to read 3, iclass 4, count 0 2006.229.22:51:50.20#ibcon#read 3, iclass 4, count 0 2006.229.22:51:50.20#ibcon#about to read 4, iclass 4, count 0 2006.229.22:51:50.20#ibcon#read 4, iclass 4, count 0 2006.229.22:51:50.20#ibcon#about to read 5, iclass 4, count 0 2006.229.22:51:50.20#ibcon#read 5, iclass 4, count 0 2006.229.22:51:50.20#ibcon#about to read 6, iclass 4, count 0 2006.229.22:51:50.20#ibcon#read 6, iclass 4, count 0 2006.229.22:51:50.20#ibcon#end of sib2, iclass 4, count 0 2006.229.22:51:50.20#ibcon#*after write, iclass 4, count 0 2006.229.22:51:50.20#ibcon#*before return 0, iclass 4, count 0 2006.229.22:51:50.20#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:50.20#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:50.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:51:50.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:51:50.20$vck44/va=4,7 2006.229.22:51:50.20#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.22:51:50.20#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.22:51:50.20#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:50.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:50.26#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:50.26#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:50.26#ibcon#enter wrdev, iclass 6, count 2 2006.229.22:51:50.26#ibcon#first serial, iclass 6, count 2 2006.229.22:51:50.26#ibcon#enter sib2, iclass 6, count 2 2006.229.22:51:50.26#ibcon#flushed, iclass 6, count 2 2006.229.22:51:50.26#ibcon#about to write, iclass 6, count 2 2006.229.22:51:50.26#ibcon#wrote, iclass 6, count 2 2006.229.22:51:50.26#ibcon#about to read 3, iclass 6, count 2 2006.229.22:51:50.28#ibcon#read 3, iclass 6, count 2 2006.229.22:51:50.28#ibcon#about to read 4, iclass 6, count 2 2006.229.22:51:50.28#ibcon#read 4, iclass 6, count 2 2006.229.22:51:50.28#ibcon#about to read 5, iclass 6, count 2 2006.229.22:51:50.28#ibcon#read 5, iclass 6, count 2 2006.229.22:51:50.28#ibcon#about to read 6, iclass 6, count 2 2006.229.22:51:50.28#ibcon#read 6, iclass 6, count 2 2006.229.22:51:50.28#ibcon#end of sib2, iclass 6, count 2 2006.229.22:51:50.28#ibcon#*mode == 0, iclass 6, count 2 2006.229.22:51:50.28#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.22:51:50.28#ibcon#[25=AT04-07\r\n] 2006.229.22:51:50.28#ibcon#*before write, iclass 6, count 2 2006.229.22:51:50.28#ibcon#enter sib2, iclass 6, count 2 2006.229.22:51:50.28#ibcon#flushed, iclass 6, count 2 2006.229.22:51:50.28#ibcon#about to write, iclass 6, count 2 2006.229.22:51:50.28#ibcon#wrote, iclass 6, count 2 2006.229.22:51:50.28#ibcon#about to read 3, iclass 6, count 2 2006.229.22:51:50.31#ibcon#read 3, iclass 6, count 2 2006.229.22:51:50.31#ibcon#about to read 4, iclass 6, count 2 2006.229.22:51:50.31#ibcon#read 4, iclass 6, count 2 2006.229.22:51:50.31#ibcon#about to read 5, iclass 6, count 2 2006.229.22:51:50.31#ibcon#read 5, iclass 6, count 2 2006.229.22:51:50.31#ibcon#about to read 6, iclass 6, count 2 2006.229.22:51:50.31#ibcon#read 6, iclass 6, count 2 2006.229.22:51:50.31#ibcon#end of sib2, iclass 6, count 2 2006.229.22:51:50.31#ibcon#*after write, iclass 6, count 2 2006.229.22:51:50.31#ibcon#*before return 0, iclass 6, count 2 2006.229.22:51:50.31#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:50.31#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:50.31#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.22:51:50.31#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:50.31#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:50.43#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:50.43#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:50.43#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:51:50.43#ibcon#first serial, iclass 6, count 0 2006.229.22:51:50.43#ibcon#enter sib2, iclass 6, count 0 2006.229.22:51:50.43#ibcon#flushed, iclass 6, count 0 2006.229.22:51:50.43#ibcon#about to write, iclass 6, count 0 2006.229.22:51:50.43#ibcon#wrote, iclass 6, count 0 2006.229.22:51:50.43#ibcon#about to read 3, iclass 6, count 0 2006.229.22:51:50.45#ibcon#read 3, iclass 6, count 0 2006.229.22:51:50.45#ibcon#about to read 4, iclass 6, count 0 2006.229.22:51:50.45#ibcon#read 4, iclass 6, count 0 2006.229.22:51:50.45#ibcon#about to read 5, iclass 6, count 0 2006.229.22:51:50.45#ibcon#read 5, iclass 6, count 0 2006.229.22:51:50.45#ibcon#about to read 6, iclass 6, count 0 2006.229.22:51:50.45#ibcon#read 6, iclass 6, count 0 2006.229.22:51:50.45#ibcon#end of sib2, iclass 6, count 0 2006.229.22:51:50.45#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:51:50.45#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:51:50.45#ibcon#[25=USB\r\n] 2006.229.22:51:50.45#ibcon#*before write, iclass 6, count 0 2006.229.22:51:50.45#ibcon#enter sib2, iclass 6, count 0 2006.229.22:51:50.45#ibcon#flushed, iclass 6, count 0 2006.229.22:51:50.45#ibcon#about to write, iclass 6, count 0 2006.229.22:51:50.45#ibcon#wrote, iclass 6, count 0 2006.229.22:51:50.45#ibcon#about to read 3, iclass 6, count 0 2006.229.22:51:50.48#ibcon#read 3, iclass 6, count 0 2006.229.22:51:50.48#ibcon#about to read 4, iclass 6, count 0 2006.229.22:51:50.48#ibcon#read 4, iclass 6, count 0 2006.229.22:51:50.48#ibcon#about to read 5, iclass 6, count 0 2006.229.22:51:50.48#ibcon#read 5, iclass 6, count 0 2006.229.22:51:50.48#ibcon#about to read 6, iclass 6, count 0 2006.229.22:51:50.48#ibcon#read 6, iclass 6, count 0 2006.229.22:51:50.48#ibcon#end of sib2, iclass 6, count 0 2006.229.22:51:50.48#ibcon#*after write, iclass 6, count 0 2006.229.22:51:50.48#ibcon#*before return 0, iclass 6, count 0 2006.229.22:51:50.48#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:50.48#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:50.48#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:51:50.48#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:51:50.48$vck44/valo=5,734.99 2006.229.22:51:50.48#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.22:51:50.48#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.22:51:50.48#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:50.48#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:50.48#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:50.48#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:50.48#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:51:50.48#ibcon#first serial, iclass 10, count 0 2006.229.22:51:50.48#ibcon#enter sib2, iclass 10, count 0 2006.229.22:51:50.48#ibcon#flushed, iclass 10, count 0 2006.229.22:51:50.48#ibcon#about to write, iclass 10, count 0 2006.229.22:51:50.48#ibcon#wrote, iclass 10, count 0 2006.229.22:51:50.48#ibcon#about to read 3, iclass 10, count 0 2006.229.22:51:50.50#ibcon#read 3, iclass 10, count 0 2006.229.22:51:50.50#ibcon#about to read 4, iclass 10, count 0 2006.229.22:51:50.50#ibcon#read 4, iclass 10, count 0 2006.229.22:51:50.50#ibcon#about to read 5, iclass 10, count 0 2006.229.22:51:50.50#ibcon#read 5, iclass 10, count 0 2006.229.22:51:50.50#ibcon#about to read 6, iclass 10, count 0 2006.229.22:51:50.50#ibcon#read 6, iclass 10, count 0 2006.229.22:51:50.50#ibcon#end of sib2, iclass 10, count 0 2006.229.22:51:50.50#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:51:50.50#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:51:50.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:51:50.50#ibcon#*before write, iclass 10, count 0 2006.229.22:51:50.50#ibcon#enter sib2, iclass 10, count 0 2006.229.22:51:50.50#ibcon#flushed, iclass 10, count 0 2006.229.22:51:50.50#ibcon#about to write, iclass 10, count 0 2006.229.22:51:50.50#ibcon#wrote, iclass 10, count 0 2006.229.22:51:50.50#ibcon#about to read 3, iclass 10, count 0 2006.229.22:51:50.54#ibcon#read 3, iclass 10, count 0 2006.229.22:51:50.54#ibcon#about to read 4, iclass 10, count 0 2006.229.22:51:50.54#ibcon#read 4, iclass 10, count 0 2006.229.22:51:50.54#ibcon#about to read 5, iclass 10, count 0 2006.229.22:51:50.54#ibcon#read 5, iclass 10, count 0 2006.229.22:51:50.54#ibcon#about to read 6, iclass 10, count 0 2006.229.22:51:50.54#ibcon#read 6, iclass 10, count 0 2006.229.22:51:50.54#ibcon#end of sib2, iclass 10, count 0 2006.229.22:51:50.54#ibcon#*after write, iclass 10, count 0 2006.229.22:51:50.54#ibcon#*before return 0, iclass 10, count 0 2006.229.22:51:50.54#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:50.54#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:50.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:51:50.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:51:50.54$vck44/va=5,4 2006.229.22:51:50.54#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.22:51:50.54#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.22:51:50.54#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:50.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:50.60#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:50.60#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:50.60#ibcon#enter wrdev, iclass 12, count 2 2006.229.22:51:50.60#ibcon#first serial, iclass 12, count 2 2006.229.22:51:50.60#ibcon#enter sib2, iclass 12, count 2 2006.229.22:51:50.60#ibcon#flushed, iclass 12, count 2 2006.229.22:51:50.60#ibcon#about to write, iclass 12, count 2 2006.229.22:51:50.60#ibcon#wrote, iclass 12, count 2 2006.229.22:51:50.60#ibcon#about to read 3, iclass 12, count 2 2006.229.22:51:50.62#ibcon#read 3, iclass 12, count 2 2006.229.22:51:50.62#ibcon#about to read 4, iclass 12, count 2 2006.229.22:51:50.62#ibcon#read 4, iclass 12, count 2 2006.229.22:51:50.62#ibcon#about to read 5, iclass 12, count 2 2006.229.22:51:50.62#ibcon#read 5, iclass 12, count 2 2006.229.22:51:50.62#ibcon#about to read 6, iclass 12, count 2 2006.229.22:51:50.62#ibcon#read 6, iclass 12, count 2 2006.229.22:51:50.62#ibcon#end of sib2, iclass 12, count 2 2006.229.22:51:50.62#ibcon#*mode == 0, iclass 12, count 2 2006.229.22:51:50.62#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.22:51:50.62#ibcon#[25=AT05-04\r\n] 2006.229.22:51:50.62#ibcon#*before write, iclass 12, count 2 2006.229.22:51:50.62#ibcon#enter sib2, iclass 12, count 2 2006.229.22:51:50.62#ibcon#flushed, iclass 12, count 2 2006.229.22:51:50.62#ibcon#about to write, iclass 12, count 2 2006.229.22:51:50.62#ibcon#wrote, iclass 12, count 2 2006.229.22:51:50.62#ibcon#about to read 3, iclass 12, count 2 2006.229.22:51:50.65#ibcon#read 3, iclass 12, count 2 2006.229.22:51:50.65#ibcon#about to read 4, iclass 12, count 2 2006.229.22:51:50.65#ibcon#read 4, iclass 12, count 2 2006.229.22:51:50.65#ibcon#about to read 5, iclass 12, count 2 2006.229.22:51:50.65#ibcon#read 5, iclass 12, count 2 2006.229.22:51:50.65#ibcon#about to read 6, iclass 12, count 2 2006.229.22:51:50.65#ibcon#read 6, iclass 12, count 2 2006.229.22:51:50.65#ibcon#end of sib2, iclass 12, count 2 2006.229.22:51:50.65#ibcon#*after write, iclass 12, count 2 2006.229.22:51:50.65#ibcon#*before return 0, iclass 12, count 2 2006.229.22:51:50.65#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:50.65#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:50.65#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.22:51:50.65#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:50.65#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:50.77#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:50.77#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:50.77#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:51:50.77#ibcon#first serial, iclass 12, count 0 2006.229.22:51:50.77#ibcon#enter sib2, iclass 12, count 0 2006.229.22:51:50.77#ibcon#flushed, iclass 12, count 0 2006.229.22:51:50.77#ibcon#about to write, iclass 12, count 0 2006.229.22:51:50.77#ibcon#wrote, iclass 12, count 0 2006.229.22:51:50.77#ibcon#about to read 3, iclass 12, count 0 2006.229.22:51:50.79#ibcon#read 3, iclass 12, count 0 2006.229.22:51:50.79#ibcon#about to read 4, iclass 12, count 0 2006.229.22:51:50.79#ibcon#read 4, iclass 12, count 0 2006.229.22:51:50.79#ibcon#about to read 5, iclass 12, count 0 2006.229.22:51:50.79#ibcon#read 5, iclass 12, count 0 2006.229.22:51:50.79#ibcon#about to read 6, iclass 12, count 0 2006.229.22:51:50.79#ibcon#read 6, iclass 12, count 0 2006.229.22:51:50.79#ibcon#end of sib2, iclass 12, count 0 2006.229.22:51:50.79#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:51:50.79#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:51:50.79#ibcon#[25=USB\r\n] 2006.229.22:51:50.79#ibcon#*before write, iclass 12, count 0 2006.229.22:51:50.79#ibcon#enter sib2, iclass 12, count 0 2006.229.22:51:50.79#ibcon#flushed, iclass 12, count 0 2006.229.22:51:50.79#ibcon#about to write, iclass 12, count 0 2006.229.22:51:50.79#ibcon#wrote, iclass 12, count 0 2006.229.22:51:50.79#ibcon#about to read 3, iclass 12, count 0 2006.229.22:51:50.82#ibcon#read 3, iclass 12, count 0 2006.229.22:51:50.82#ibcon#about to read 4, iclass 12, count 0 2006.229.22:51:50.82#ibcon#read 4, iclass 12, count 0 2006.229.22:51:50.82#ibcon#about to read 5, iclass 12, count 0 2006.229.22:51:50.82#ibcon#read 5, iclass 12, count 0 2006.229.22:51:50.82#ibcon#about to read 6, iclass 12, count 0 2006.229.22:51:50.82#ibcon#read 6, iclass 12, count 0 2006.229.22:51:50.82#ibcon#end of sib2, iclass 12, count 0 2006.229.22:51:50.82#ibcon#*after write, iclass 12, count 0 2006.229.22:51:50.82#ibcon#*before return 0, iclass 12, count 0 2006.229.22:51:50.82#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:50.82#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:50.82#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:51:50.82#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:51:50.82$vck44/valo=6,814.99 2006.229.22:51:50.82#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:51:50.82#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:51:50.82#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:50.82#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:50.82#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:50.82#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:50.82#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:51:50.82#ibcon#first serial, iclass 14, count 0 2006.229.22:51:50.82#ibcon#enter sib2, iclass 14, count 0 2006.229.22:51:50.82#ibcon#flushed, iclass 14, count 0 2006.229.22:51:50.82#ibcon#about to write, iclass 14, count 0 2006.229.22:51:50.82#ibcon#wrote, iclass 14, count 0 2006.229.22:51:50.82#ibcon#about to read 3, iclass 14, count 0 2006.229.22:51:50.84#ibcon#read 3, iclass 14, count 0 2006.229.22:51:50.84#ibcon#about to read 4, iclass 14, count 0 2006.229.22:51:50.84#ibcon#read 4, iclass 14, count 0 2006.229.22:51:50.84#ibcon#about to read 5, iclass 14, count 0 2006.229.22:51:50.84#ibcon#read 5, iclass 14, count 0 2006.229.22:51:50.84#ibcon#about to read 6, iclass 14, count 0 2006.229.22:51:50.84#ibcon#read 6, iclass 14, count 0 2006.229.22:51:50.84#ibcon#end of sib2, iclass 14, count 0 2006.229.22:51:50.84#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:51:50.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:51:50.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:51:50.84#ibcon#*before write, iclass 14, count 0 2006.229.22:51:50.84#ibcon#enter sib2, iclass 14, count 0 2006.229.22:51:50.84#ibcon#flushed, iclass 14, count 0 2006.229.22:51:50.84#ibcon#about to write, iclass 14, count 0 2006.229.22:51:50.84#ibcon#wrote, iclass 14, count 0 2006.229.22:51:50.84#ibcon#about to read 3, iclass 14, count 0 2006.229.22:51:50.88#ibcon#read 3, iclass 14, count 0 2006.229.22:51:50.88#ibcon#about to read 4, iclass 14, count 0 2006.229.22:51:50.88#ibcon#read 4, iclass 14, count 0 2006.229.22:51:50.88#ibcon#about to read 5, iclass 14, count 0 2006.229.22:51:50.88#ibcon#read 5, iclass 14, count 0 2006.229.22:51:50.88#ibcon#about to read 6, iclass 14, count 0 2006.229.22:51:50.88#ibcon#read 6, iclass 14, count 0 2006.229.22:51:50.88#ibcon#end of sib2, iclass 14, count 0 2006.229.22:51:50.88#ibcon#*after write, iclass 14, count 0 2006.229.22:51:50.88#ibcon#*before return 0, iclass 14, count 0 2006.229.22:51:50.88#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:50.88#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:50.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:51:50.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:51:50.88$vck44/va=6,4 2006.229.22:51:50.88#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.22:51:50.88#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.22:51:50.88#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:50.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:50.94#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:50.94#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:50.94#ibcon#enter wrdev, iclass 16, count 2 2006.229.22:51:50.94#ibcon#first serial, iclass 16, count 2 2006.229.22:51:50.94#ibcon#enter sib2, iclass 16, count 2 2006.229.22:51:50.94#ibcon#flushed, iclass 16, count 2 2006.229.22:51:50.94#ibcon#about to write, iclass 16, count 2 2006.229.22:51:50.94#ibcon#wrote, iclass 16, count 2 2006.229.22:51:50.94#ibcon#about to read 3, iclass 16, count 2 2006.229.22:51:50.96#ibcon#read 3, iclass 16, count 2 2006.229.22:51:50.96#ibcon#about to read 4, iclass 16, count 2 2006.229.22:51:50.96#ibcon#read 4, iclass 16, count 2 2006.229.22:51:50.96#ibcon#about to read 5, iclass 16, count 2 2006.229.22:51:50.96#ibcon#read 5, iclass 16, count 2 2006.229.22:51:50.96#ibcon#about to read 6, iclass 16, count 2 2006.229.22:51:50.96#ibcon#read 6, iclass 16, count 2 2006.229.22:51:50.96#ibcon#end of sib2, iclass 16, count 2 2006.229.22:51:50.96#ibcon#*mode == 0, iclass 16, count 2 2006.229.22:51:50.96#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.22:51:50.96#ibcon#[25=AT06-04\r\n] 2006.229.22:51:50.96#ibcon#*before write, iclass 16, count 2 2006.229.22:51:50.96#ibcon#enter sib2, iclass 16, count 2 2006.229.22:51:50.96#ibcon#flushed, iclass 16, count 2 2006.229.22:51:50.96#ibcon#about to write, iclass 16, count 2 2006.229.22:51:50.96#ibcon#wrote, iclass 16, count 2 2006.229.22:51:50.96#ibcon#about to read 3, iclass 16, count 2 2006.229.22:51:50.99#ibcon#read 3, iclass 16, count 2 2006.229.22:51:50.99#ibcon#about to read 4, iclass 16, count 2 2006.229.22:51:50.99#ibcon#read 4, iclass 16, count 2 2006.229.22:51:50.99#ibcon#about to read 5, iclass 16, count 2 2006.229.22:51:50.99#ibcon#read 5, iclass 16, count 2 2006.229.22:51:50.99#ibcon#about to read 6, iclass 16, count 2 2006.229.22:51:50.99#ibcon#read 6, iclass 16, count 2 2006.229.22:51:50.99#ibcon#end of sib2, iclass 16, count 2 2006.229.22:51:50.99#ibcon#*after write, iclass 16, count 2 2006.229.22:51:50.99#ibcon#*before return 0, iclass 16, count 2 2006.229.22:51:50.99#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:50.99#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:50.99#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.22:51:50.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:50.99#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:51.11#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:51.11#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:51.11#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:51:51.11#ibcon#first serial, iclass 16, count 0 2006.229.22:51:51.11#ibcon#enter sib2, iclass 16, count 0 2006.229.22:51:51.11#ibcon#flushed, iclass 16, count 0 2006.229.22:51:51.11#ibcon#about to write, iclass 16, count 0 2006.229.22:51:51.11#ibcon#wrote, iclass 16, count 0 2006.229.22:51:51.11#ibcon#about to read 3, iclass 16, count 0 2006.229.22:51:51.13#ibcon#read 3, iclass 16, count 0 2006.229.22:51:51.13#ibcon#about to read 4, iclass 16, count 0 2006.229.22:51:51.13#ibcon#read 4, iclass 16, count 0 2006.229.22:51:51.13#ibcon#about to read 5, iclass 16, count 0 2006.229.22:51:51.13#ibcon#read 5, iclass 16, count 0 2006.229.22:51:51.13#ibcon#about to read 6, iclass 16, count 0 2006.229.22:51:51.13#ibcon#read 6, iclass 16, count 0 2006.229.22:51:51.13#ibcon#end of sib2, iclass 16, count 0 2006.229.22:51:51.13#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:51:51.13#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:51:51.13#ibcon#[25=USB\r\n] 2006.229.22:51:51.13#ibcon#*before write, iclass 16, count 0 2006.229.22:51:51.13#ibcon#enter sib2, iclass 16, count 0 2006.229.22:51:51.13#ibcon#flushed, iclass 16, count 0 2006.229.22:51:51.13#ibcon#about to write, iclass 16, count 0 2006.229.22:51:51.13#ibcon#wrote, iclass 16, count 0 2006.229.22:51:51.13#ibcon#about to read 3, iclass 16, count 0 2006.229.22:51:51.16#ibcon#read 3, iclass 16, count 0 2006.229.22:51:51.16#ibcon#about to read 4, iclass 16, count 0 2006.229.22:51:51.16#ibcon#read 4, iclass 16, count 0 2006.229.22:51:51.16#ibcon#about to read 5, iclass 16, count 0 2006.229.22:51:51.16#ibcon#read 5, iclass 16, count 0 2006.229.22:51:51.16#ibcon#about to read 6, iclass 16, count 0 2006.229.22:51:51.16#ibcon#read 6, iclass 16, count 0 2006.229.22:51:51.16#ibcon#end of sib2, iclass 16, count 0 2006.229.22:51:51.16#ibcon#*after write, iclass 16, count 0 2006.229.22:51:51.16#ibcon#*before return 0, iclass 16, count 0 2006.229.22:51:51.16#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:51.16#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:51.16#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:51:51.16#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:51:51.16$vck44/valo=7,864.99 2006.229.22:51:51.16#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:51:51.16#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:51:51.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:51.16#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:51.16#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:51.16#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:51.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:51:51.16#ibcon#first serial, iclass 18, count 0 2006.229.22:51:51.16#ibcon#enter sib2, iclass 18, count 0 2006.229.22:51:51.16#ibcon#flushed, iclass 18, count 0 2006.229.22:51:51.16#ibcon#about to write, iclass 18, count 0 2006.229.22:51:51.16#ibcon#wrote, iclass 18, count 0 2006.229.22:51:51.16#ibcon#about to read 3, iclass 18, count 0 2006.229.22:51:51.18#ibcon#read 3, iclass 18, count 0 2006.229.22:51:51.18#ibcon#about to read 4, iclass 18, count 0 2006.229.22:51:51.18#ibcon#read 4, iclass 18, count 0 2006.229.22:51:51.18#ibcon#about to read 5, iclass 18, count 0 2006.229.22:51:51.18#ibcon#read 5, iclass 18, count 0 2006.229.22:51:51.18#ibcon#about to read 6, iclass 18, count 0 2006.229.22:51:51.18#ibcon#read 6, iclass 18, count 0 2006.229.22:51:51.18#ibcon#end of sib2, iclass 18, count 0 2006.229.22:51:51.18#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:51:51.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:51:51.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:51:51.18#ibcon#*before write, iclass 18, count 0 2006.229.22:51:51.18#ibcon#enter sib2, iclass 18, count 0 2006.229.22:51:51.18#ibcon#flushed, iclass 18, count 0 2006.229.22:51:51.18#ibcon#about to write, iclass 18, count 0 2006.229.22:51:51.18#ibcon#wrote, iclass 18, count 0 2006.229.22:51:51.18#ibcon#about to read 3, iclass 18, count 0 2006.229.22:51:51.22#ibcon#read 3, iclass 18, count 0 2006.229.22:51:51.22#ibcon#about to read 4, iclass 18, count 0 2006.229.22:51:51.22#ibcon#read 4, iclass 18, count 0 2006.229.22:51:51.22#ibcon#about to read 5, iclass 18, count 0 2006.229.22:51:51.22#ibcon#read 5, iclass 18, count 0 2006.229.22:51:51.22#ibcon#about to read 6, iclass 18, count 0 2006.229.22:51:51.22#ibcon#read 6, iclass 18, count 0 2006.229.22:51:51.22#ibcon#end of sib2, iclass 18, count 0 2006.229.22:51:51.22#ibcon#*after write, iclass 18, count 0 2006.229.22:51:51.22#ibcon#*before return 0, iclass 18, count 0 2006.229.22:51:51.22#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:51.22#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:51.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:51:51.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:51:51.22$vck44/va=7,5 2006.229.22:51:51.22#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.22:51:51.22#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.22:51:51.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:51.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:51.28#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:51.28#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:51.28#ibcon#enter wrdev, iclass 20, count 2 2006.229.22:51:51.28#ibcon#first serial, iclass 20, count 2 2006.229.22:51:51.28#ibcon#enter sib2, iclass 20, count 2 2006.229.22:51:51.28#ibcon#flushed, iclass 20, count 2 2006.229.22:51:51.28#ibcon#about to write, iclass 20, count 2 2006.229.22:51:51.28#ibcon#wrote, iclass 20, count 2 2006.229.22:51:51.28#ibcon#about to read 3, iclass 20, count 2 2006.229.22:51:51.30#ibcon#read 3, iclass 20, count 2 2006.229.22:51:51.30#ibcon#about to read 4, iclass 20, count 2 2006.229.22:51:51.30#ibcon#read 4, iclass 20, count 2 2006.229.22:51:51.30#ibcon#about to read 5, iclass 20, count 2 2006.229.22:51:51.30#ibcon#read 5, iclass 20, count 2 2006.229.22:51:51.30#ibcon#about to read 6, iclass 20, count 2 2006.229.22:51:51.30#ibcon#read 6, iclass 20, count 2 2006.229.22:51:51.30#ibcon#end of sib2, iclass 20, count 2 2006.229.22:51:51.30#ibcon#*mode == 0, iclass 20, count 2 2006.229.22:51:51.30#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.22:51:51.30#ibcon#[25=AT07-05\r\n] 2006.229.22:51:51.30#ibcon#*before write, iclass 20, count 2 2006.229.22:51:51.30#ibcon#enter sib2, iclass 20, count 2 2006.229.22:51:51.30#ibcon#flushed, iclass 20, count 2 2006.229.22:51:51.30#ibcon#about to write, iclass 20, count 2 2006.229.22:51:51.30#ibcon#wrote, iclass 20, count 2 2006.229.22:51:51.30#ibcon#about to read 3, iclass 20, count 2 2006.229.22:51:51.33#ibcon#read 3, iclass 20, count 2 2006.229.22:51:51.33#ibcon#about to read 4, iclass 20, count 2 2006.229.22:51:51.33#ibcon#read 4, iclass 20, count 2 2006.229.22:51:51.33#ibcon#about to read 5, iclass 20, count 2 2006.229.22:51:51.33#ibcon#read 5, iclass 20, count 2 2006.229.22:51:51.33#ibcon#about to read 6, iclass 20, count 2 2006.229.22:51:51.33#ibcon#read 6, iclass 20, count 2 2006.229.22:51:51.33#ibcon#end of sib2, iclass 20, count 2 2006.229.22:51:51.33#ibcon#*after write, iclass 20, count 2 2006.229.22:51:51.33#ibcon#*before return 0, iclass 20, count 2 2006.229.22:51:51.33#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:51.33#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:51.33#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.22:51:51.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:51.33#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:51.45#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:51.45#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:51.45#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:51:51.45#ibcon#first serial, iclass 20, count 0 2006.229.22:51:51.45#ibcon#enter sib2, iclass 20, count 0 2006.229.22:51:51.45#ibcon#flushed, iclass 20, count 0 2006.229.22:51:51.45#ibcon#about to write, iclass 20, count 0 2006.229.22:51:51.45#ibcon#wrote, iclass 20, count 0 2006.229.22:51:51.45#ibcon#about to read 3, iclass 20, count 0 2006.229.22:51:51.47#ibcon#read 3, iclass 20, count 0 2006.229.22:51:51.47#ibcon#about to read 4, iclass 20, count 0 2006.229.22:51:51.47#ibcon#read 4, iclass 20, count 0 2006.229.22:51:51.47#ibcon#about to read 5, iclass 20, count 0 2006.229.22:51:51.47#ibcon#read 5, iclass 20, count 0 2006.229.22:51:51.47#ibcon#about to read 6, iclass 20, count 0 2006.229.22:51:51.47#ibcon#read 6, iclass 20, count 0 2006.229.22:51:51.47#ibcon#end of sib2, iclass 20, count 0 2006.229.22:51:51.47#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:51:51.47#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:51:51.47#ibcon#[25=USB\r\n] 2006.229.22:51:51.47#ibcon#*before write, iclass 20, count 0 2006.229.22:51:51.47#ibcon#enter sib2, iclass 20, count 0 2006.229.22:51:51.47#ibcon#flushed, iclass 20, count 0 2006.229.22:51:51.47#ibcon#about to write, iclass 20, count 0 2006.229.22:51:51.47#ibcon#wrote, iclass 20, count 0 2006.229.22:51:51.47#ibcon#about to read 3, iclass 20, count 0 2006.229.22:51:51.50#ibcon#read 3, iclass 20, count 0 2006.229.22:51:51.50#ibcon#about to read 4, iclass 20, count 0 2006.229.22:51:51.50#ibcon#read 4, iclass 20, count 0 2006.229.22:51:51.50#ibcon#about to read 5, iclass 20, count 0 2006.229.22:51:51.50#ibcon#read 5, iclass 20, count 0 2006.229.22:51:51.50#ibcon#about to read 6, iclass 20, count 0 2006.229.22:51:51.50#ibcon#read 6, iclass 20, count 0 2006.229.22:51:51.50#ibcon#end of sib2, iclass 20, count 0 2006.229.22:51:51.50#ibcon#*after write, iclass 20, count 0 2006.229.22:51:51.50#ibcon#*before return 0, iclass 20, count 0 2006.229.22:51:51.50#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:51.50#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:51.50#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:51:51.50#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:51:51.50$vck44/valo=8,884.99 2006.229.22:51:51.50#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.22:51:51.50#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.22:51:51.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:51.50#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:51.50#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:51.50#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:51.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:51:51.50#ibcon#first serial, iclass 22, count 0 2006.229.22:51:51.50#ibcon#enter sib2, iclass 22, count 0 2006.229.22:51:51.50#ibcon#flushed, iclass 22, count 0 2006.229.22:51:51.50#ibcon#about to write, iclass 22, count 0 2006.229.22:51:51.50#ibcon#wrote, iclass 22, count 0 2006.229.22:51:51.50#ibcon#about to read 3, iclass 22, count 0 2006.229.22:51:51.52#ibcon#read 3, iclass 22, count 0 2006.229.22:51:51.52#ibcon#about to read 4, iclass 22, count 0 2006.229.22:51:51.52#ibcon#read 4, iclass 22, count 0 2006.229.22:51:51.52#ibcon#about to read 5, iclass 22, count 0 2006.229.22:51:51.52#ibcon#read 5, iclass 22, count 0 2006.229.22:51:51.52#ibcon#about to read 6, iclass 22, count 0 2006.229.22:51:51.52#ibcon#read 6, iclass 22, count 0 2006.229.22:51:51.52#ibcon#end of sib2, iclass 22, count 0 2006.229.22:51:51.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:51:51.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:51:51.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:51:51.52#ibcon#*before write, iclass 22, count 0 2006.229.22:51:51.52#ibcon#enter sib2, iclass 22, count 0 2006.229.22:51:51.52#ibcon#flushed, iclass 22, count 0 2006.229.22:51:51.52#ibcon#about to write, iclass 22, count 0 2006.229.22:51:51.52#ibcon#wrote, iclass 22, count 0 2006.229.22:51:51.52#ibcon#about to read 3, iclass 22, count 0 2006.229.22:51:51.56#ibcon#read 3, iclass 22, count 0 2006.229.22:51:51.56#ibcon#about to read 4, iclass 22, count 0 2006.229.22:51:51.56#ibcon#read 4, iclass 22, count 0 2006.229.22:51:51.56#ibcon#about to read 5, iclass 22, count 0 2006.229.22:51:51.56#ibcon#read 5, iclass 22, count 0 2006.229.22:51:51.56#ibcon#about to read 6, iclass 22, count 0 2006.229.22:51:51.56#ibcon#read 6, iclass 22, count 0 2006.229.22:51:51.56#ibcon#end of sib2, iclass 22, count 0 2006.229.22:51:51.56#ibcon#*after write, iclass 22, count 0 2006.229.22:51:51.56#ibcon#*before return 0, iclass 22, count 0 2006.229.22:51:51.56#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:51.56#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:51.56#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:51:51.56#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:51:51.56$vck44/va=8,6 2006.229.22:51:51.56#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.22:51:51.56#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.22:51:51.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:51.56#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:51:51.62#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:51:51.62#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:51:51.62#ibcon#enter wrdev, iclass 24, count 2 2006.229.22:51:51.62#ibcon#first serial, iclass 24, count 2 2006.229.22:51:51.62#ibcon#enter sib2, iclass 24, count 2 2006.229.22:51:51.62#ibcon#flushed, iclass 24, count 2 2006.229.22:51:51.62#ibcon#about to write, iclass 24, count 2 2006.229.22:51:51.62#ibcon#wrote, iclass 24, count 2 2006.229.22:51:51.62#ibcon#about to read 3, iclass 24, count 2 2006.229.22:51:51.64#ibcon#read 3, iclass 24, count 2 2006.229.22:51:51.64#ibcon#about to read 4, iclass 24, count 2 2006.229.22:51:51.64#ibcon#read 4, iclass 24, count 2 2006.229.22:51:51.64#ibcon#about to read 5, iclass 24, count 2 2006.229.22:51:51.64#ibcon#read 5, iclass 24, count 2 2006.229.22:51:51.64#ibcon#about to read 6, iclass 24, count 2 2006.229.22:51:51.64#ibcon#read 6, iclass 24, count 2 2006.229.22:51:51.64#ibcon#end of sib2, iclass 24, count 2 2006.229.22:51:51.64#ibcon#*mode == 0, iclass 24, count 2 2006.229.22:51:51.64#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.22:51:51.64#ibcon#[25=AT08-06\r\n] 2006.229.22:51:51.64#ibcon#*before write, iclass 24, count 2 2006.229.22:51:51.64#ibcon#enter sib2, iclass 24, count 2 2006.229.22:51:51.64#ibcon#flushed, iclass 24, count 2 2006.229.22:51:51.64#ibcon#about to write, iclass 24, count 2 2006.229.22:51:51.64#ibcon#wrote, iclass 24, count 2 2006.229.22:51:51.64#ibcon#about to read 3, iclass 24, count 2 2006.229.22:51:51.67#ibcon#read 3, iclass 24, count 2 2006.229.22:51:51.67#ibcon#about to read 4, iclass 24, count 2 2006.229.22:51:51.67#ibcon#read 4, iclass 24, count 2 2006.229.22:51:51.67#ibcon#about to read 5, iclass 24, count 2 2006.229.22:51:51.67#ibcon#read 5, iclass 24, count 2 2006.229.22:51:51.67#ibcon#about to read 6, iclass 24, count 2 2006.229.22:51:51.67#ibcon#read 6, iclass 24, count 2 2006.229.22:51:51.67#ibcon#end of sib2, iclass 24, count 2 2006.229.22:51:51.67#ibcon#*after write, iclass 24, count 2 2006.229.22:51:51.67#ibcon#*before return 0, iclass 24, count 2 2006.229.22:51:51.67#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:51:51.67#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.22:51:51.67#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.22:51:51.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:51.67#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:51:51.79#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:51:51.79#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:51:51.79#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:51:51.79#ibcon#first serial, iclass 24, count 0 2006.229.22:51:51.79#ibcon#enter sib2, iclass 24, count 0 2006.229.22:51:51.79#ibcon#flushed, iclass 24, count 0 2006.229.22:51:51.79#ibcon#about to write, iclass 24, count 0 2006.229.22:51:51.79#ibcon#wrote, iclass 24, count 0 2006.229.22:51:51.79#ibcon#about to read 3, iclass 24, count 0 2006.229.22:51:51.81#ibcon#read 3, iclass 24, count 0 2006.229.22:51:51.81#ibcon#about to read 4, iclass 24, count 0 2006.229.22:51:51.81#ibcon#read 4, iclass 24, count 0 2006.229.22:51:51.81#ibcon#about to read 5, iclass 24, count 0 2006.229.22:51:51.81#ibcon#read 5, iclass 24, count 0 2006.229.22:51:51.81#ibcon#about to read 6, iclass 24, count 0 2006.229.22:51:51.81#ibcon#read 6, iclass 24, count 0 2006.229.22:51:51.81#ibcon#end of sib2, iclass 24, count 0 2006.229.22:51:51.81#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:51:51.81#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:51:51.81#ibcon#[25=USB\r\n] 2006.229.22:51:51.81#ibcon#*before write, iclass 24, count 0 2006.229.22:51:51.81#ibcon#enter sib2, iclass 24, count 0 2006.229.22:51:51.81#ibcon#flushed, iclass 24, count 0 2006.229.22:51:51.81#ibcon#about to write, iclass 24, count 0 2006.229.22:51:51.81#ibcon#wrote, iclass 24, count 0 2006.229.22:51:51.81#ibcon#about to read 3, iclass 24, count 0 2006.229.22:51:51.84#ibcon#read 3, iclass 24, count 0 2006.229.22:51:51.84#ibcon#about to read 4, iclass 24, count 0 2006.229.22:51:51.84#ibcon#read 4, iclass 24, count 0 2006.229.22:51:51.84#ibcon#about to read 5, iclass 24, count 0 2006.229.22:51:51.84#ibcon#read 5, iclass 24, count 0 2006.229.22:51:51.84#ibcon#about to read 6, iclass 24, count 0 2006.229.22:51:51.84#ibcon#read 6, iclass 24, count 0 2006.229.22:51:51.84#ibcon#end of sib2, iclass 24, count 0 2006.229.22:51:51.84#ibcon#*after write, iclass 24, count 0 2006.229.22:51:51.84#ibcon#*before return 0, iclass 24, count 0 2006.229.22:51:51.84#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:51:51.84#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.22:51:51.84#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:51:51.84#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:51:51.84$vck44/vblo=1,629.99 2006.229.22:51:51.84#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.22:51:51.84#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.22:51:51.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:51.84#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:51:51.84#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:51:51.84#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:51:51.84#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:51:51.84#ibcon#first serial, iclass 26, count 0 2006.229.22:51:51.84#ibcon#enter sib2, iclass 26, count 0 2006.229.22:51:51.84#ibcon#flushed, iclass 26, count 0 2006.229.22:51:51.84#ibcon#about to write, iclass 26, count 0 2006.229.22:51:51.84#ibcon#wrote, iclass 26, count 0 2006.229.22:51:51.84#ibcon#about to read 3, iclass 26, count 0 2006.229.22:51:51.86#ibcon#read 3, iclass 26, count 0 2006.229.22:51:51.86#ibcon#about to read 4, iclass 26, count 0 2006.229.22:51:51.86#ibcon#read 4, iclass 26, count 0 2006.229.22:51:51.86#ibcon#about to read 5, iclass 26, count 0 2006.229.22:51:51.86#ibcon#read 5, iclass 26, count 0 2006.229.22:51:51.86#ibcon#about to read 6, iclass 26, count 0 2006.229.22:51:51.86#ibcon#read 6, iclass 26, count 0 2006.229.22:51:51.86#ibcon#end of sib2, iclass 26, count 0 2006.229.22:51:51.86#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:51:51.86#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:51:51.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:51:51.86#ibcon#*before write, iclass 26, count 0 2006.229.22:51:51.86#ibcon#enter sib2, iclass 26, count 0 2006.229.22:51:51.86#ibcon#flushed, iclass 26, count 0 2006.229.22:51:51.86#ibcon#about to write, iclass 26, count 0 2006.229.22:51:51.86#ibcon#wrote, iclass 26, count 0 2006.229.22:51:51.86#ibcon#about to read 3, iclass 26, count 0 2006.229.22:51:51.90#ibcon#read 3, iclass 26, count 0 2006.229.22:51:51.90#ibcon#about to read 4, iclass 26, count 0 2006.229.22:51:51.90#ibcon#read 4, iclass 26, count 0 2006.229.22:51:51.90#ibcon#about to read 5, iclass 26, count 0 2006.229.22:51:51.90#ibcon#read 5, iclass 26, count 0 2006.229.22:51:51.90#ibcon#about to read 6, iclass 26, count 0 2006.229.22:51:51.90#ibcon#read 6, iclass 26, count 0 2006.229.22:51:51.90#ibcon#end of sib2, iclass 26, count 0 2006.229.22:51:51.90#ibcon#*after write, iclass 26, count 0 2006.229.22:51:51.90#ibcon#*before return 0, iclass 26, count 0 2006.229.22:51:51.90#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:51:51.90#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.22:51:51.90#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:51:51.90#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:51:51.90$vck44/vb=1,4 2006.229.22:51:51.90#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.22:51:51.90#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.22:51:51.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:51.90#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:51:51.90#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:51:51.90#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:51:51.90#ibcon#enter wrdev, iclass 28, count 2 2006.229.22:51:51.90#ibcon#first serial, iclass 28, count 2 2006.229.22:51:51.90#ibcon#enter sib2, iclass 28, count 2 2006.229.22:51:51.90#ibcon#flushed, iclass 28, count 2 2006.229.22:51:51.90#ibcon#about to write, iclass 28, count 2 2006.229.22:51:51.90#ibcon#wrote, iclass 28, count 2 2006.229.22:51:51.90#ibcon#about to read 3, iclass 28, count 2 2006.229.22:51:51.92#ibcon#read 3, iclass 28, count 2 2006.229.22:51:51.92#ibcon#about to read 4, iclass 28, count 2 2006.229.22:51:51.92#ibcon#read 4, iclass 28, count 2 2006.229.22:51:51.92#ibcon#about to read 5, iclass 28, count 2 2006.229.22:51:51.92#ibcon#read 5, iclass 28, count 2 2006.229.22:51:51.92#ibcon#about to read 6, iclass 28, count 2 2006.229.22:51:51.92#ibcon#read 6, iclass 28, count 2 2006.229.22:51:51.92#ibcon#end of sib2, iclass 28, count 2 2006.229.22:51:51.92#ibcon#*mode == 0, iclass 28, count 2 2006.229.22:51:51.92#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.22:51:51.92#ibcon#[27=AT01-04\r\n] 2006.229.22:51:51.92#ibcon#*before write, iclass 28, count 2 2006.229.22:51:51.92#ibcon#enter sib2, iclass 28, count 2 2006.229.22:51:51.92#ibcon#flushed, iclass 28, count 2 2006.229.22:51:51.92#ibcon#about to write, iclass 28, count 2 2006.229.22:51:51.92#ibcon#wrote, iclass 28, count 2 2006.229.22:51:51.92#ibcon#about to read 3, iclass 28, count 2 2006.229.22:51:51.95#ibcon#read 3, iclass 28, count 2 2006.229.22:51:51.95#ibcon#about to read 4, iclass 28, count 2 2006.229.22:51:51.95#ibcon#read 4, iclass 28, count 2 2006.229.22:51:51.95#ibcon#about to read 5, iclass 28, count 2 2006.229.22:51:51.95#ibcon#read 5, iclass 28, count 2 2006.229.22:51:51.95#ibcon#about to read 6, iclass 28, count 2 2006.229.22:51:51.95#ibcon#read 6, iclass 28, count 2 2006.229.22:51:51.95#ibcon#end of sib2, iclass 28, count 2 2006.229.22:51:51.95#ibcon#*after write, iclass 28, count 2 2006.229.22:51:51.95#ibcon#*before return 0, iclass 28, count 2 2006.229.22:51:51.95#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:51:51.95#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.22:51:51.95#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.22:51:51.95#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:51.95#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:51:52.07#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:51:52.07#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:51:52.07#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:51:52.07#ibcon#first serial, iclass 28, count 0 2006.229.22:51:52.07#ibcon#enter sib2, iclass 28, count 0 2006.229.22:51:52.07#ibcon#flushed, iclass 28, count 0 2006.229.22:51:52.07#ibcon#about to write, iclass 28, count 0 2006.229.22:51:52.07#ibcon#wrote, iclass 28, count 0 2006.229.22:51:52.07#ibcon#about to read 3, iclass 28, count 0 2006.229.22:51:52.09#ibcon#read 3, iclass 28, count 0 2006.229.22:51:52.09#ibcon#about to read 4, iclass 28, count 0 2006.229.22:51:52.09#ibcon#read 4, iclass 28, count 0 2006.229.22:51:52.09#ibcon#about to read 5, iclass 28, count 0 2006.229.22:51:52.09#ibcon#read 5, iclass 28, count 0 2006.229.22:51:52.09#ibcon#about to read 6, iclass 28, count 0 2006.229.22:51:52.09#ibcon#read 6, iclass 28, count 0 2006.229.22:51:52.09#ibcon#end of sib2, iclass 28, count 0 2006.229.22:51:52.09#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:51:52.09#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:51:52.09#ibcon#[27=USB\r\n] 2006.229.22:51:52.09#ibcon#*before write, iclass 28, count 0 2006.229.22:51:52.09#ibcon#enter sib2, iclass 28, count 0 2006.229.22:51:52.09#ibcon#flushed, iclass 28, count 0 2006.229.22:51:52.09#ibcon#about to write, iclass 28, count 0 2006.229.22:51:52.09#ibcon#wrote, iclass 28, count 0 2006.229.22:51:52.09#ibcon#about to read 3, iclass 28, count 0 2006.229.22:51:52.12#ibcon#read 3, iclass 28, count 0 2006.229.22:51:52.12#ibcon#about to read 4, iclass 28, count 0 2006.229.22:51:52.12#ibcon#read 4, iclass 28, count 0 2006.229.22:51:52.12#ibcon#about to read 5, iclass 28, count 0 2006.229.22:51:52.12#ibcon#read 5, iclass 28, count 0 2006.229.22:51:52.12#ibcon#about to read 6, iclass 28, count 0 2006.229.22:51:52.12#ibcon#read 6, iclass 28, count 0 2006.229.22:51:52.12#ibcon#end of sib2, iclass 28, count 0 2006.229.22:51:52.12#ibcon#*after write, iclass 28, count 0 2006.229.22:51:52.12#ibcon#*before return 0, iclass 28, count 0 2006.229.22:51:52.12#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:51:52.12#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.22:51:52.12#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:51:52.12#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:51:52.12$vck44/vblo=2,634.99 2006.229.22:51:52.12#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.22:51:52.12#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.22:51:52.12#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:52.12#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:52.12#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:52.12#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:52.12#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:51:52.12#ibcon#first serial, iclass 30, count 0 2006.229.22:51:52.12#ibcon#enter sib2, iclass 30, count 0 2006.229.22:51:52.12#ibcon#flushed, iclass 30, count 0 2006.229.22:51:52.12#ibcon#about to write, iclass 30, count 0 2006.229.22:51:52.12#ibcon#wrote, iclass 30, count 0 2006.229.22:51:52.12#ibcon#about to read 3, iclass 30, count 0 2006.229.22:51:52.14#ibcon#read 3, iclass 30, count 0 2006.229.22:51:52.14#ibcon#about to read 4, iclass 30, count 0 2006.229.22:51:52.14#ibcon#read 4, iclass 30, count 0 2006.229.22:51:52.14#ibcon#about to read 5, iclass 30, count 0 2006.229.22:51:52.14#ibcon#read 5, iclass 30, count 0 2006.229.22:51:52.14#ibcon#about to read 6, iclass 30, count 0 2006.229.22:51:52.14#ibcon#read 6, iclass 30, count 0 2006.229.22:51:52.14#ibcon#end of sib2, iclass 30, count 0 2006.229.22:51:52.14#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:51:52.14#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:51:52.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:51:52.14#ibcon#*before write, iclass 30, count 0 2006.229.22:51:52.14#ibcon#enter sib2, iclass 30, count 0 2006.229.22:51:52.14#ibcon#flushed, iclass 30, count 0 2006.229.22:51:52.14#ibcon#about to write, iclass 30, count 0 2006.229.22:51:52.14#ibcon#wrote, iclass 30, count 0 2006.229.22:51:52.14#ibcon#about to read 3, iclass 30, count 0 2006.229.22:51:52.18#ibcon#read 3, iclass 30, count 0 2006.229.22:51:52.18#ibcon#about to read 4, iclass 30, count 0 2006.229.22:51:52.18#ibcon#read 4, iclass 30, count 0 2006.229.22:51:52.18#ibcon#about to read 5, iclass 30, count 0 2006.229.22:51:52.18#ibcon#read 5, iclass 30, count 0 2006.229.22:51:52.18#ibcon#about to read 6, iclass 30, count 0 2006.229.22:51:52.18#ibcon#read 6, iclass 30, count 0 2006.229.22:51:52.18#ibcon#end of sib2, iclass 30, count 0 2006.229.22:51:52.18#ibcon#*after write, iclass 30, count 0 2006.229.22:51:52.18#ibcon#*before return 0, iclass 30, count 0 2006.229.22:51:52.18#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:52.18#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.22:51:52.18#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:51:52.18#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:51:52.18$vck44/vb=2,4 2006.229.22:51:52.18#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.22:51:52.18#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.22:51:52.18#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:52.18#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:52.24#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:52.24#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:52.24#ibcon#enter wrdev, iclass 32, count 2 2006.229.22:51:52.24#ibcon#first serial, iclass 32, count 2 2006.229.22:51:52.24#ibcon#enter sib2, iclass 32, count 2 2006.229.22:51:52.24#ibcon#flushed, iclass 32, count 2 2006.229.22:51:52.24#ibcon#about to write, iclass 32, count 2 2006.229.22:51:52.24#ibcon#wrote, iclass 32, count 2 2006.229.22:51:52.24#ibcon#about to read 3, iclass 32, count 2 2006.229.22:51:52.26#ibcon#read 3, iclass 32, count 2 2006.229.22:51:52.26#ibcon#about to read 4, iclass 32, count 2 2006.229.22:51:52.26#ibcon#read 4, iclass 32, count 2 2006.229.22:51:52.26#ibcon#about to read 5, iclass 32, count 2 2006.229.22:51:52.26#ibcon#read 5, iclass 32, count 2 2006.229.22:51:52.26#ibcon#about to read 6, iclass 32, count 2 2006.229.22:51:52.26#ibcon#read 6, iclass 32, count 2 2006.229.22:51:52.26#ibcon#end of sib2, iclass 32, count 2 2006.229.22:51:52.26#ibcon#*mode == 0, iclass 32, count 2 2006.229.22:51:52.26#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.22:51:52.26#ibcon#[27=AT02-04\r\n] 2006.229.22:51:52.26#ibcon#*before write, iclass 32, count 2 2006.229.22:51:52.26#ibcon#enter sib2, iclass 32, count 2 2006.229.22:51:52.26#ibcon#flushed, iclass 32, count 2 2006.229.22:51:52.26#ibcon#about to write, iclass 32, count 2 2006.229.22:51:52.26#ibcon#wrote, iclass 32, count 2 2006.229.22:51:52.26#ibcon#about to read 3, iclass 32, count 2 2006.229.22:51:52.29#ibcon#read 3, iclass 32, count 2 2006.229.22:51:52.29#ibcon#about to read 4, iclass 32, count 2 2006.229.22:51:52.29#ibcon#read 4, iclass 32, count 2 2006.229.22:51:52.29#ibcon#about to read 5, iclass 32, count 2 2006.229.22:51:52.29#ibcon#read 5, iclass 32, count 2 2006.229.22:51:52.29#ibcon#about to read 6, iclass 32, count 2 2006.229.22:51:52.29#ibcon#read 6, iclass 32, count 2 2006.229.22:51:52.29#ibcon#end of sib2, iclass 32, count 2 2006.229.22:51:52.29#ibcon#*after write, iclass 32, count 2 2006.229.22:51:52.29#ibcon#*before return 0, iclass 32, count 2 2006.229.22:51:52.29#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:52.29#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.22:51:52.29#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.22:51:52.29#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:52.29#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:52.41#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:52.41#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:52.41#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:51:52.41#ibcon#first serial, iclass 32, count 0 2006.229.22:51:52.41#ibcon#enter sib2, iclass 32, count 0 2006.229.22:51:52.41#ibcon#flushed, iclass 32, count 0 2006.229.22:51:52.41#ibcon#about to write, iclass 32, count 0 2006.229.22:51:52.41#ibcon#wrote, iclass 32, count 0 2006.229.22:51:52.41#ibcon#about to read 3, iclass 32, count 0 2006.229.22:51:52.43#ibcon#read 3, iclass 32, count 0 2006.229.22:51:52.43#ibcon#about to read 4, iclass 32, count 0 2006.229.22:51:52.43#ibcon#read 4, iclass 32, count 0 2006.229.22:51:52.43#ibcon#about to read 5, iclass 32, count 0 2006.229.22:51:52.43#ibcon#read 5, iclass 32, count 0 2006.229.22:51:52.43#ibcon#about to read 6, iclass 32, count 0 2006.229.22:51:52.43#ibcon#read 6, iclass 32, count 0 2006.229.22:51:52.43#ibcon#end of sib2, iclass 32, count 0 2006.229.22:51:52.43#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:51:52.43#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:51:52.43#ibcon#[27=USB\r\n] 2006.229.22:51:52.43#ibcon#*before write, iclass 32, count 0 2006.229.22:51:52.43#ibcon#enter sib2, iclass 32, count 0 2006.229.22:51:52.43#ibcon#flushed, iclass 32, count 0 2006.229.22:51:52.43#ibcon#about to write, iclass 32, count 0 2006.229.22:51:52.43#ibcon#wrote, iclass 32, count 0 2006.229.22:51:52.43#ibcon#about to read 3, iclass 32, count 0 2006.229.22:51:52.46#ibcon#read 3, iclass 32, count 0 2006.229.22:51:52.46#ibcon#about to read 4, iclass 32, count 0 2006.229.22:51:52.46#ibcon#read 4, iclass 32, count 0 2006.229.22:51:52.46#ibcon#about to read 5, iclass 32, count 0 2006.229.22:51:52.46#ibcon#read 5, iclass 32, count 0 2006.229.22:51:52.46#ibcon#about to read 6, iclass 32, count 0 2006.229.22:51:52.46#ibcon#read 6, iclass 32, count 0 2006.229.22:51:52.46#ibcon#end of sib2, iclass 32, count 0 2006.229.22:51:52.46#ibcon#*after write, iclass 32, count 0 2006.229.22:51:52.46#ibcon#*before return 0, iclass 32, count 0 2006.229.22:51:52.46#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:52.46#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.22:51:52.46#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:51:52.46#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:51:52.46$vck44/vblo=3,649.99 2006.229.22:51:52.46#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.22:51:52.46#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.22:51:52.46#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:52.46#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:52.46#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:52.46#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:52.46#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:51:52.46#ibcon#first serial, iclass 34, count 0 2006.229.22:51:52.46#ibcon#enter sib2, iclass 34, count 0 2006.229.22:51:52.46#ibcon#flushed, iclass 34, count 0 2006.229.22:51:52.46#ibcon#about to write, iclass 34, count 0 2006.229.22:51:52.46#ibcon#wrote, iclass 34, count 0 2006.229.22:51:52.46#ibcon#about to read 3, iclass 34, count 0 2006.229.22:51:52.48#ibcon#read 3, iclass 34, count 0 2006.229.22:51:52.48#ibcon#about to read 4, iclass 34, count 0 2006.229.22:51:52.48#ibcon#read 4, iclass 34, count 0 2006.229.22:51:52.48#ibcon#about to read 5, iclass 34, count 0 2006.229.22:51:52.48#ibcon#read 5, iclass 34, count 0 2006.229.22:51:52.48#ibcon#about to read 6, iclass 34, count 0 2006.229.22:51:52.48#ibcon#read 6, iclass 34, count 0 2006.229.22:51:52.48#ibcon#end of sib2, iclass 34, count 0 2006.229.22:51:52.48#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:51:52.48#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:51:52.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:51:52.48#ibcon#*before write, iclass 34, count 0 2006.229.22:51:52.48#ibcon#enter sib2, iclass 34, count 0 2006.229.22:51:52.48#ibcon#flushed, iclass 34, count 0 2006.229.22:51:52.48#ibcon#about to write, iclass 34, count 0 2006.229.22:51:52.48#ibcon#wrote, iclass 34, count 0 2006.229.22:51:52.48#ibcon#about to read 3, iclass 34, count 0 2006.229.22:51:52.52#ibcon#read 3, iclass 34, count 0 2006.229.22:51:52.52#ibcon#about to read 4, iclass 34, count 0 2006.229.22:51:52.52#ibcon#read 4, iclass 34, count 0 2006.229.22:51:52.52#ibcon#about to read 5, iclass 34, count 0 2006.229.22:51:52.52#ibcon#read 5, iclass 34, count 0 2006.229.22:51:52.52#ibcon#about to read 6, iclass 34, count 0 2006.229.22:51:52.52#ibcon#read 6, iclass 34, count 0 2006.229.22:51:52.52#ibcon#end of sib2, iclass 34, count 0 2006.229.22:51:52.52#ibcon#*after write, iclass 34, count 0 2006.229.22:51:52.52#ibcon#*before return 0, iclass 34, count 0 2006.229.22:51:52.52#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:52.52#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.22:51:52.52#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:51:52.52#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:51:52.52$vck44/vb=3,4 2006.229.22:51:52.52#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.22:51:52.52#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.22:51:52.52#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:52.52#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:52.58#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:52.58#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:52.58#ibcon#enter wrdev, iclass 36, count 2 2006.229.22:51:52.58#ibcon#first serial, iclass 36, count 2 2006.229.22:51:52.58#ibcon#enter sib2, iclass 36, count 2 2006.229.22:51:52.58#ibcon#flushed, iclass 36, count 2 2006.229.22:51:52.58#ibcon#about to write, iclass 36, count 2 2006.229.22:51:52.58#ibcon#wrote, iclass 36, count 2 2006.229.22:51:52.58#ibcon#about to read 3, iclass 36, count 2 2006.229.22:51:52.60#ibcon#read 3, iclass 36, count 2 2006.229.22:51:52.60#ibcon#about to read 4, iclass 36, count 2 2006.229.22:51:52.60#ibcon#read 4, iclass 36, count 2 2006.229.22:51:52.60#ibcon#about to read 5, iclass 36, count 2 2006.229.22:51:52.60#ibcon#read 5, iclass 36, count 2 2006.229.22:51:52.60#ibcon#about to read 6, iclass 36, count 2 2006.229.22:51:52.60#ibcon#read 6, iclass 36, count 2 2006.229.22:51:52.60#ibcon#end of sib2, iclass 36, count 2 2006.229.22:51:52.60#ibcon#*mode == 0, iclass 36, count 2 2006.229.22:51:52.60#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.22:51:52.60#ibcon#[27=AT03-04\r\n] 2006.229.22:51:52.60#ibcon#*before write, iclass 36, count 2 2006.229.22:51:52.60#ibcon#enter sib2, iclass 36, count 2 2006.229.22:51:52.60#ibcon#flushed, iclass 36, count 2 2006.229.22:51:52.60#ibcon#about to write, iclass 36, count 2 2006.229.22:51:52.60#ibcon#wrote, iclass 36, count 2 2006.229.22:51:52.60#ibcon#about to read 3, iclass 36, count 2 2006.229.22:51:52.63#ibcon#read 3, iclass 36, count 2 2006.229.22:51:52.63#ibcon#about to read 4, iclass 36, count 2 2006.229.22:51:52.63#ibcon#read 4, iclass 36, count 2 2006.229.22:51:52.63#ibcon#about to read 5, iclass 36, count 2 2006.229.22:51:52.63#ibcon#read 5, iclass 36, count 2 2006.229.22:51:52.63#ibcon#about to read 6, iclass 36, count 2 2006.229.22:51:52.63#ibcon#read 6, iclass 36, count 2 2006.229.22:51:52.63#ibcon#end of sib2, iclass 36, count 2 2006.229.22:51:52.63#ibcon#*after write, iclass 36, count 2 2006.229.22:51:52.63#ibcon#*before return 0, iclass 36, count 2 2006.229.22:51:52.63#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:52.63#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.22:51:52.63#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.22:51:52.63#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:52.63#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:52.75#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:52.75#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:52.75#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:51:52.75#ibcon#first serial, iclass 36, count 0 2006.229.22:51:52.75#ibcon#enter sib2, iclass 36, count 0 2006.229.22:51:52.75#ibcon#flushed, iclass 36, count 0 2006.229.22:51:52.75#ibcon#about to write, iclass 36, count 0 2006.229.22:51:52.75#ibcon#wrote, iclass 36, count 0 2006.229.22:51:52.75#ibcon#about to read 3, iclass 36, count 0 2006.229.22:51:52.77#ibcon#read 3, iclass 36, count 0 2006.229.22:51:52.77#ibcon#about to read 4, iclass 36, count 0 2006.229.22:51:52.77#ibcon#read 4, iclass 36, count 0 2006.229.22:51:52.77#ibcon#about to read 5, iclass 36, count 0 2006.229.22:51:52.77#ibcon#read 5, iclass 36, count 0 2006.229.22:51:52.77#ibcon#about to read 6, iclass 36, count 0 2006.229.22:51:52.77#ibcon#read 6, iclass 36, count 0 2006.229.22:51:52.77#ibcon#end of sib2, iclass 36, count 0 2006.229.22:51:52.77#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:51:52.77#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:51:52.77#ibcon#[27=USB\r\n] 2006.229.22:51:52.77#ibcon#*before write, iclass 36, count 0 2006.229.22:51:52.77#ibcon#enter sib2, iclass 36, count 0 2006.229.22:51:52.77#ibcon#flushed, iclass 36, count 0 2006.229.22:51:52.77#ibcon#about to write, iclass 36, count 0 2006.229.22:51:52.77#ibcon#wrote, iclass 36, count 0 2006.229.22:51:52.77#ibcon#about to read 3, iclass 36, count 0 2006.229.22:51:52.80#ibcon#read 3, iclass 36, count 0 2006.229.22:51:52.80#ibcon#about to read 4, iclass 36, count 0 2006.229.22:51:52.80#ibcon#read 4, iclass 36, count 0 2006.229.22:51:52.80#ibcon#about to read 5, iclass 36, count 0 2006.229.22:51:52.80#ibcon#read 5, iclass 36, count 0 2006.229.22:51:52.80#ibcon#about to read 6, iclass 36, count 0 2006.229.22:51:52.80#ibcon#read 6, iclass 36, count 0 2006.229.22:51:52.80#ibcon#end of sib2, iclass 36, count 0 2006.229.22:51:52.80#ibcon#*after write, iclass 36, count 0 2006.229.22:51:52.80#ibcon#*before return 0, iclass 36, count 0 2006.229.22:51:52.80#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:52.80#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.22:51:52.80#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:51:52.80#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:51:52.80$vck44/vblo=4,679.99 2006.229.22:51:52.80#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.22:51:52.80#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.22:51:52.80#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:52.80#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:52.80#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:52.80#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:52.80#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:51:52.80#ibcon#first serial, iclass 38, count 0 2006.229.22:51:52.80#ibcon#enter sib2, iclass 38, count 0 2006.229.22:51:52.80#ibcon#flushed, iclass 38, count 0 2006.229.22:51:52.80#ibcon#about to write, iclass 38, count 0 2006.229.22:51:52.80#ibcon#wrote, iclass 38, count 0 2006.229.22:51:52.80#ibcon#about to read 3, iclass 38, count 0 2006.229.22:51:52.82#ibcon#read 3, iclass 38, count 0 2006.229.22:51:52.82#ibcon#about to read 4, iclass 38, count 0 2006.229.22:51:52.82#ibcon#read 4, iclass 38, count 0 2006.229.22:51:52.82#ibcon#about to read 5, iclass 38, count 0 2006.229.22:51:52.82#ibcon#read 5, iclass 38, count 0 2006.229.22:51:52.82#ibcon#about to read 6, iclass 38, count 0 2006.229.22:51:52.82#ibcon#read 6, iclass 38, count 0 2006.229.22:51:52.82#ibcon#end of sib2, iclass 38, count 0 2006.229.22:51:52.82#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:51:52.82#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:51:52.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:51:52.82#ibcon#*before write, iclass 38, count 0 2006.229.22:51:52.82#ibcon#enter sib2, iclass 38, count 0 2006.229.22:51:52.82#ibcon#flushed, iclass 38, count 0 2006.229.22:51:52.82#ibcon#about to write, iclass 38, count 0 2006.229.22:51:52.82#ibcon#wrote, iclass 38, count 0 2006.229.22:51:52.82#ibcon#about to read 3, iclass 38, count 0 2006.229.22:51:52.86#ibcon#read 3, iclass 38, count 0 2006.229.22:51:52.86#ibcon#about to read 4, iclass 38, count 0 2006.229.22:51:52.86#ibcon#read 4, iclass 38, count 0 2006.229.22:51:52.86#ibcon#about to read 5, iclass 38, count 0 2006.229.22:51:52.86#ibcon#read 5, iclass 38, count 0 2006.229.22:51:52.86#ibcon#about to read 6, iclass 38, count 0 2006.229.22:51:52.86#ibcon#read 6, iclass 38, count 0 2006.229.22:51:52.86#ibcon#end of sib2, iclass 38, count 0 2006.229.22:51:52.86#ibcon#*after write, iclass 38, count 0 2006.229.22:51:52.86#ibcon#*before return 0, iclass 38, count 0 2006.229.22:51:52.86#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:52.86#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.22:51:52.86#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:51:52.86#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:51:52.86$vck44/vb=4,4 2006.229.22:51:52.86#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.22:51:52.86#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.22:51:52.86#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:52.86#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:52.92#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:52.92#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:52.92#ibcon#enter wrdev, iclass 40, count 2 2006.229.22:51:52.92#ibcon#first serial, iclass 40, count 2 2006.229.22:51:52.92#ibcon#enter sib2, iclass 40, count 2 2006.229.22:51:52.92#ibcon#flushed, iclass 40, count 2 2006.229.22:51:52.92#ibcon#about to write, iclass 40, count 2 2006.229.22:51:52.92#ibcon#wrote, iclass 40, count 2 2006.229.22:51:52.92#ibcon#about to read 3, iclass 40, count 2 2006.229.22:51:52.94#ibcon#read 3, iclass 40, count 2 2006.229.22:51:52.94#ibcon#about to read 4, iclass 40, count 2 2006.229.22:51:52.94#ibcon#read 4, iclass 40, count 2 2006.229.22:51:52.94#ibcon#about to read 5, iclass 40, count 2 2006.229.22:51:52.94#ibcon#read 5, iclass 40, count 2 2006.229.22:51:52.94#ibcon#about to read 6, iclass 40, count 2 2006.229.22:51:52.94#ibcon#read 6, iclass 40, count 2 2006.229.22:51:52.94#ibcon#end of sib2, iclass 40, count 2 2006.229.22:51:52.94#ibcon#*mode == 0, iclass 40, count 2 2006.229.22:51:52.94#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.22:51:52.94#ibcon#[27=AT04-04\r\n] 2006.229.22:51:52.94#ibcon#*before write, iclass 40, count 2 2006.229.22:51:52.94#ibcon#enter sib2, iclass 40, count 2 2006.229.22:51:52.94#ibcon#flushed, iclass 40, count 2 2006.229.22:51:52.94#ibcon#about to write, iclass 40, count 2 2006.229.22:51:52.94#ibcon#wrote, iclass 40, count 2 2006.229.22:51:52.94#ibcon#about to read 3, iclass 40, count 2 2006.229.22:51:52.97#ibcon#read 3, iclass 40, count 2 2006.229.22:51:52.97#ibcon#about to read 4, iclass 40, count 2 2006.229.22:51:52.97#ibcon#read 4, iclass 40, count 2 2006.229.22:51:52.97#ibcon#about to read 5, iclass 40, count 2 2006.229.22:51:52.97#ibcon#read 5, iclass 40, count 2 2006.229.22:51:52.97#ibcon#about to read 6, iclass 40, count 2 2006.229.22:51:52.97#ibcon#read 6, iclass 40, count 2 2006.229.22:51:52.97#ibcon#end of sib2, iclass 40, count 2 2006.229.22:51:52.97#ibcon#*after write, iclass 40, count 2 2006.229.22:51:52.97#ibcon#*before return 0, iclass 40, count 2 2006.229.22:51:52.97#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:52.97#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.22:51:52.97#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.22:51:52.97#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:52.97#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:53.09#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:53.09#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:53.09#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:51:53.09#ibcon#first serial, iclass 40, count 0 2006.229.22:51:53.09#ibcon#enter sib2, iclass 40, count 0 2006.229.22:51:53.09#ibcon#flushed, iclass 40, count 0 2006.229.22:51:53.09#ibcon#about to write, iclass 40, count 0 2006.229.22:51:53.09#ibcon#wrote, iclass 40, count 0 2006.229.22:51:53.09#ibcon#about to read 3, iclass 40, count 0 2006.229.22:51:53.11#ibcon#read 3, iclass 40, count 0 2006.229.22:51:53.11#ibcon#about to read 4, iclass 40, count 0 2006.229.22:51:53.11#ibcon#read 4, iclass 40, count 0 2006.229.22:51:53.11#ibcon#about to read 5, iclass 40, count 0 2006.229.22:51:53.11#ibcon#read 5, iclass 40, count 0 2006.229.22:51:53.11#ibcon#about to read 6, iclass 40, count 0 2006.229.22:51:53.11#ibcon#read 6, iclass 40, count 0 2006.229.22:51:53.11#ibcon#end of sib2, iclass 40, count 0 2006.229.22:51:53.11#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:51:53.11#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:51:53.11#ibcon#[27=USB\r\n] 2006.229.22:51:53.11#ibcon#*before write, iclass 40, count 0 2006.229.22:51:53.11#ibcon#enter sib2, iclass 40, count 0 2006.229.22:51:53.11#ibcon#flushed, iclass 40, count 0 2006.229.22:51:53.11#ibcon#about to write, iclass 40, count 0 2006.229.22:51:53.11#ibcon#wrote, iclass 40, count 0 2006.229.22:51:53.11#ibcon#about to read 3, iclass 40, count 0 2006.229.22:51:53.14#ibcon#read 3, iclass 40, count 0 2006.229.22:51:53.14#ibcon#about to read 4, iclass 40, count 0 2006.229.22:51:53.14#ibcon#read 4, iclass 40, count 0 2006.229.22:51:53.14#ibcon#about to read 5, iclass 40, count 0 2006.229.22:51:53.14#ibcon#read 5, iclass 40, count 0 2006.229.22:51:53.14#ibcon#about to read 6, iclass 40, count 0 2006.229.22:51:53.14#ibcon#read 6, iclass 40, count 0 2006.229.22:51:53.14#ibcon#end of sib2, iclass 40, count 0 2006.229.22:51:53.14#ibcon#*after write, iclass 40, count 0 2006.229.22:51:53.14#ibcon#*before return 0, iclass 40, count 0 2006.229.22:51:53.14#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:53.14#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.22:51:53.14#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:51:53.14#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:51:53.14$vck44/vblo=5,709.99 2006.229.22:51:53.14#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.22:51:53.14#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.22:51:53.14#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:53.14#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:53.14#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:53.14#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:53.14#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:51:53.14#ibcon#first serial, iclass 4, count 0 2006.229.22:51:53.14#ibcon#enter sib2, iclass 4, count 0 2006.229.22:51:53.14#ibcon#flushed, iclass 4, count 0 2006.229.22:51:53.14#ibcon#about to write, iclass 4, count 0 2006.229.22:51:53.14#ibcon#wrote, iclass 4, count 0 2006.229.22:51:53.14#ibcon#about to read 3, iclass 4, count 0 2006.229.22:51:53.16#ibcon#read 3, iclass 4, count 0 2006.229.22:51:53.16#ibcon#about to read 4, iclass 4, count 0 2006.229.22:51:53.16#ibcon#read 4, iclass 4, count 0 2006.229.22:51:53.16#ibcon#about to read 5, iclass 4, count 0 2006.229.22:51:53.16#ibcon#read 5, iclass 4, count 0 2006.229.22:51:53.16#ibcon#about to read 6, iclass 4, count 0 2006.229.22:51:53.16#ibcon#read 6, iclass 4, count 0 2006.229.22:51:53.16#ibcon#end of sib2, iclass 4, count 0 2006.229.22:51:53.16#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:51:53.16#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:51:53.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:51:53.16#ibcon#*before write, iclass 4, count 0 2006.229.22:51:53.16#ibcon#enter sib2, iclass 4, count 0 2006.229.22:51:53.16#ibcon#flushed, iclass 4, count 0 2006.229.22:51:53.16#ibcon#about to write, iclass 4, count 0 2006.229.22:51:53.16#ibcon#wrote, iclass 4, count 0 2006.229.22:51:53.16#ibcon#about to read 3, iclass 4, count 0 2006.229.22:51:53.20#ibcon#read 3, iclass 4, count 0 2006.229.22:51:53.20#ibcon#about to read 4, iclass 4, count 0 2006.229.22:51:53.20#ibcon#read 4, iclass 4, count 0 2006.229.22:51:53.20#ibcon#about to read 5, iclass 4, count 0 2006.229.22:51:53.20#ibcon#read 5, iclass 4, count 0 2006.229.22:51:53.20#ibcon#about to read 6, iclass 4, count 0 2006.229.22:51:53.20#ibcon#read 6, iclass 4, count 0 2006.229.22:51:53.20#ibcon#end of sib2, iclass 4, count 0 2006.229.22:51:53.20#ibcon#*after write, iclass 4, count 0 2006.229.22:51:53.20#ibcon#*before return 0, iclass 4, count 0 2006.229.22:51:53.20#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:53.20#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:51:53.20#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:51:53.20#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:51:53.20$vck44/vb=5,4 2006.229.22:51:53.20#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.22:51:53.20#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.22:51:53.20#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:53.20#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:53.26#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:53.26#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:53.26#ibcon#enter wrdev, iclass 6, count 2 2006.229.22:51:53.26#ibcon#first serial, iclass 6, count 2 2006.229.22:51:53.26#ibcon#enter sib2, iclass 6, count 2 2006.229.22:51:53.26#ibcon#flushed, iclass 6, count 2 2006.229.22:51:53.26#ibcon#about to write, iclass 6, count 2 2006.229.22:51:53.26#ibcon#wrote, iclass 6, count 2 2006.229.22:51:53.26#ibcon#about to read 3, iclass 6, count 2 2006.229.22:51:53.28#ibcon#read 3, iclass 6, count 2 2006.229.22:51:53.28#ibcon#about to read 4, iclass 6, count 2 2006.229.22:51:53.28#ibcon#read 4, iclass 6, count 2 2006.229.22:51:53.28#ibcon#about to read 5, iclass 6, count 2 2006.229.22:51:53.28#ibcon#read 5, iclass 6, count 2 2006.229.22:51:53.28#ibcon#about to read 6, iclass 6, count 2 2006.229.22:51:53.28#ibcon#read 6, iclass 6, count 2 2006.229.22:51:53.28#ibcon#end of sib2, iclass 6, count 2 2006.229.22:51:53.28#ibcon#*mode == 0, iclass 6, count 2 2006.229.22:51:53.28#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.22:51:53.28#ibcon#[27=AT05-04\r\n] 2006.229.22:51:53.28#ibcon#*before write, iclass 6, count 2 2006.229.22:51:53.28#ibcon#enter sib2, iclass 6, count 2 2006.229.22:51:53.28#ibcon#flushed, iclass 6, count 2 2006.229.22:51:53.28#ibcon#about to write, iclass 6, count 2 2006.229.22:51:53.28#ibcon#wrote, iclass 6, count 2 2006.229.22:51:53.28#ibcon#about to read 3, iclass 6, count 2 2006.229.22:51:53.31#ibcon#read 3, iclass 6, count 2 2006.229.22:51:53.31#ibcon#about to read 4, iclass 6, count 2 2006.229.22:51:53.31#ibcon#read 4, iclass 6, count 2 2006.229.22:51:53.31#ibcon#about to read 5, iclass 6, count 2 2006.229.22:51:53.31#ibcon#read 5, iclass 6, count 2 2006.229.22:51:53.31#ibcon#about to read 6, iclass 6, count 2 2006.229.22:51:53.31#ibcon#read 6, iclass 6, count 2 2006.229.22:51:53.31#ibcon#end of sib2, iclass 6, count 2 2006.229.22:51:53.31#ibcon#*after write, iclass 6, count 2 2006.229.22:51:53.31#ibcon#*before return 0, iclass 6, count 2 2006.229.22:51:53.31#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:53.31#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.22:51:53.31#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.22:51:53.31#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:53.31#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:53.43#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:53.43#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:53.43#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:51:53.43#ibcon#first serial, iclass 6, count 0 2006.229.22:51:53.43#ibcon#enter sib2, iclass 6, count 0 2006.229.22:51:53.43#ibcon#flushed, iclass 6, count 0 2006.229.22:51:53.43#ibcon#about to write, iclass 6, count 0 2006.229.22:51:53.43#ibcon#wrote, iclass 6, count 0 2006.229.22:51:53.43#ibcon#about to read 3, iclass 6, count 0 2006.229.22:51:53.45#ibcon#read 3, iclass 6, count 0 2006.229.22:51:53.45#ibcon#about to read 4, iclass 6, count 0 2006.229.22:51:53.45#ibcon#read 4, iclass 6, count 0 2006.229.22:51:53.45#ibcon#about to read 5, iclass 6, count 0 2006.229.22:51:53.45#ibcon#read 5, iclass 6, count 0 2006.229.22:51:53.45#ibcon#about to read 6, iclass 6, count 0 2006.229.22:51:53.45#ibcon#read 6, iclass 6, count 0 2006.229.22:51:53.45#ibcon#end of sib2, iclass 6, count 0 2006.229.22:51:53.45#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:51:53.45#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:51:53.45#ibcon#[27=USB\r\n] 2006.229.22:51:53.45#ibcon#*before write, iclass 6, count 0 2006.229.22:51:53.45#ibcon#enter sib2, iclass 6, count 0 2006.229.22:51:53.45#ibcon#flushed, iclass 6, count 0 2006.229.22:51:53.45#ibcon#about to write, iclass 6, count 0 2006.229.22:51:53.45#ibcon#wrote, iclass 6, count 0 2006.229.22:51:53.45#ibcon#about to read 3, iclass 6, count 0 2006.229.22:51:53.48#ibcon#read 3, iclass 6, count 0 2006.229.22:51:53.48#ibcon#about to read 4, iclass 6, count 0 2006.229.22:51:53.48#ibcon#read 4, iclass 6, count 0 2006.229.22:51:53.48#ibcon#about to read 5, iclass 6, count 0 2006.229.22:51:53.48#ibcon#read 5, iclass 6, count 0 2006.229.22:51:53.48#ibcon#about to read 6, iclass 6, count 0 2006.229.22:51:53.48#ibcon#read 6, iclass 6, count 0 2006.229.22:51:53.48#ibcon#end of sib2, iclass 6, count 0 2006.229.22:51:53.48#ibcon#*after write, iclass 6, count 0 2006.229.22:51:53.48#ibcon#*before return 0, iclass 6, count 0 2006.229.22:51:53.48#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:53.48#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.22:51:53.48#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:51:53.48#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:51:53.48$vck44/vblo=6,719.99 2006.229.22:51:53.48#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.22:51:53.48#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.22:51:53.48#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:53.48#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:53.48#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:53.48#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:53.48#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:51:53.48#ibcon#first serial, iclass 10, count 0 2006.229.22:51:53.48#ibcon#enter sib2, iclass 10, count 0 2006.229.22:51:53.48#ibcon#flushed, iclass 10, count 0 2006.229.22:51:53.48#ibcon#about to write, iclass 10, count 0 2006.229.22:51:53.48#ibcon#wrote, iclass 10, count 0 2006.229.22:51:53.48#ibcon#about to read 3, iclass 10, count 0 2006.229.22:51:53.50#ibcon#read 3, iclass 10, count 0 2006.229.22:51:53.50#ibcon#about to read 4, iclass 10, count 0 2006.229.22:51:53.50#ibcon#read 4, iclass 10, count 0 2006.229.22:51:53.50#ibcon#about to read 5, iclass 10, count 0 2006.229.22:51:53.50#ibcon#read 5, iclass 10, count 0 2006.229.22:51:53.50#ibcon#about to read 6, iclass 10, count 0 2006.229.22:51:53.50#ibcon#read 6, iclass 10, count 0 2006.229.22:51:53.50#ibcon#end of sib2, iclass 10, count 0 2006.229.22:51:53.50#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:51:53.50#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:51:53.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:51:53.50#ibcon#*before write, iclass 10, count 0 2006.229.22:51:53.50#ibcon#enter sib2, iclass 10, count 0 2006.229.22:51:53.50#ibcon#flushed, iclass 10, count 0 2006.229.22:51:53.50#ibcon#about to write, iclass 10, count 0 2006.229.22:51:53.50#ibcon#wrote, iclass 10, count 0 2006.229.22:51:53.50#ibcon#about to read 3, iclass 10, count 0 2006.229.22:51:53.54#ibcon#read 3, iclass 10, count 0 2006.229.22:51:53.54#ibcon#about to read 4, iclass 10, count 0 2006.229.22:51:53.54#ibcon#read 4, iclass 10, count 0 2006.229.22:51:53.54#ibcon#about to read 5, iclass 10, count 0 2006.229.22:51:53.54#ibcon#read 5, iclass 10, count 0 2006.229.22:51:53.54#ibcon#about to read 6, iclass 10, count 0 2006.229.22:51:53.54#ibcon#read 6, iclass 10, count 0 2006.229.22:51:53.54#ibcon#end of sib2, iclass 10, count 0 2006.229.22:51:53.54#ibcon#*after write, iclass 10, count 0 2006.229.22:51:53.54#ibcon#*before return 0, iclass 10, count 0 2006.229.22:51:53.54#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:53.54#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.22:51:53.54#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:51:53.54#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:51:53.54$vck44/vb=6,4 2006.229.22:51:53.54#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.22:51:53.54#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.22:51:53.54#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:53.54#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:53.60#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:53.60#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:53.60#ibcon#enter wrdev, iclass 12, count 2 2006.229.22:51:53.60#ibcon#first serial, iclass 12, count 2 2006.229.22:51:53.60#ibcon#enter sib2, iclass 12, count 2 2006.229.22:51:53.60#ibcon#flushed, iclass 12, count 2 2006.229.22:51:53.60#ibcon#about to write, iclass 12, count 2 2006.229.22:51:53.60#ibcon#wrote, iclass 12, count 2 2006.229.22:51:53.60#ibcon#about to read 3, iclass 12, count 2 2006.229.22:51:53.62#ibcon#read 3, iclass 12, count 2 2006.229.22:51:53.62#ibcon#about to read 4, iclass 12, count 2 2006.229.22:51:53.62#ibcon#read 4, iclass 12, count 2 2006.229.22:51:53.62#ibcon#about to read 5, iclass 12, count 2 2006.229.22:51:53.62#ibcon#read 5, iclass 12, count 2 2006.229.22:51:53.62#ibcon#about to read 6, iclass 12, count 2 2006.229.22:51:53.62#ibcon#read 6, iclass 12, count 2 2006.229.22:51:53.62#ibcon#end of sib2, iclass 12, count 2 2006.229.22:51:53.62#ibcon#*mode == 0, iclass 12, count 2 2006.229.22:51:53.62#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.22:51:53.62#ibcon#[27=AT06-04\r\n] 2006.229.22:51:53.62#ibcon#*before write, iclass 12, count 2 2006.229.22:51:53.62#ibcon#enter sib2, iclass 12, count 2 2006.229.22:51:53.62#ibcon#flushed, iclass 12, count 2 2006.229.22:51:53.62#ibcon#about to write, iclass 12, count 2 2006.229.22:51:53.62#ibcon#wrote, iclass 12, count 2 2006.229.22:51:53.62#ibcon#about to read 3, iclass 12, count 2 2006.229.22:51:53.65#ibcon#read 3, iclass 12, count 2 2006.229.22:51:53.65#ibcon#about to read 4, iclass 12, count 2 2006.229.22:51:53.65#ibcon#read 4, iclass 12, count 2 2006.229.22:51:53.65#ibcon#about to read 5, iclass 12, count 2 2006.229.22:51:53.65#ibcon#read 5, iclass 12, count 2 2006.229.22:51:53.65#ibcon#about to read 6, iclass 12, count 2 2006.229.22:51:53.65#ibcon#read 6, iclass 12, count 2 2006.229.22:51:53.65#ibcon#end of sib2, iclass 12, count 2 2006.229.22:51:53.65#ibcon#*after write, iclass 12, count 2 2006.229.22:51:53.65#ibcon#*before return 0, iclass 12, count 2 2006.229.22:51:53.65#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:53.65#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.22:51:53.65#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.22:51:53.65#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:53.65#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:53.77#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:53.77#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:53.77#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:51:53.77#ibcon#first serial, iclass 12, count 0 2006.229.22:51:53.77#ibcon#enter sib2, iclass 12, count 0 2006.229.22:51:53.77#ibcon#flushed, iclass 12, count 0 2006.229.22:51:53.77#ibcon#about to write, iclass 12, count 0 2006.229.22:51:53.77#ibcon#wrote, iclass 12, count 0 2006.229.22:51:53.77#ibcon#about to read 3, iclass 12, count 0 2006.229.22:51:53.79#ibcon#read 3, iclass 12, count 0 2006.229.22:51:53.79#ibcon#about to read 4, iclass 12, count 0 2006.229.22:51:53.79#ibcon#read 4, iclass 12, count 0 2006.229.22:51:53.79#ibcon#about to read 5, iclass 12, count 0 2006.229.22:51:53.79#ibcon#read 5, iclass 12, count 0 2006.229.22:51:53.79#ibcon#about to read 6, iclass 12, count 0 2006.229.22:51:53.79#ibcon#read 6, iclass 12, count 0 2006.229.22:51:53.79#ibcon#end of sib2, iclass 12, count 0 2006.229.22:51:53.79#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:51:53.79#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:51:53.79#ibcon#[27=USB\r\n] 2006.229.22:51:53.79#ibcon#*before write, iclass 12, count 0 2006.229.22:51:53.79#ibcon#enter sib2, iclass 12, count 0 2006.229.22:51:53.79#ibcon#flushed, iclass 12, count 0 2006.229.22:51:53.79#ibcon#about to write, iclass 12, count 0 2006.229.22:51:53.79#ibcon#wrote, iclass 12, count 0 2006.229.22:51:53.79#ibcon#about to read 3, iclass 12, count 0 2006.229.22:51:53.82#ibcon#read 3, iclass 12, count 0 2006.229.22:51:53.82#ibcon#about to read 4, iclass 12, count 0 2006.229.22:51:53.82#ibcon#read 4, iclass 12, count 0 2006.229.22:51:53.82#ibcon#about to read 5, iclass 12, count 0 2006.229.22:51:53.82#ibcon#read 5, iclass 12, count 0 2006.229.22:51:53.82#ibcon#about to read 6, iclass 12, count 0 2006.229.22:51:53.82#ibcon#read 6, iclass 12, count 0 2006.229.22:51:53.82#ibcon#end of sib2, iclass 12, count 0 2006.229.22:51:53.82#ibcon#*after write, iclass 12, count 0 2006.229.22:51:53.82#ibcon#*before return 0, iclass 12, count 0 2006.229.22:51:53.82#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:53.82#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.22:51:53.82#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:51:53.82#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:51:53.82$vck44/vblo=7,734.99 2006.229.22:51:53.82#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.22:51:53.82#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.22:51:53.82#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:53.82#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:53.82#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:53.82#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:53.82#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:51:53.82#ibcon#first serial, iclass 14, count 0 2006.229.22:51:53.82#ibcon#enter sib2, iclass 14, count 0 2006.229.22:51:53.82#ibcon#flushed, iclass 14, count 0 2006.229.22:51:53.82#ibcon#about to write, iclass 14, count 0 2006.229.22:51:53.82#ibcon#wrote, iclass 14, count 0 2006.229.22:51:53.82#ibcon#about to read 3, iclass 14, count 0 2006.229.22:51:53.84#ibcon#read 3, iclass 14, count 0 2006.229.22:51:53.84#ibcon#about to read 4, iclass 14, count 0 2006.229.22:51:53.84#ibcon#read 4, iclass 14, count 0 2006.229.22:51:53.84#ibcon#about to read 5, iclass 14, count 0 2006.229.22:51:53.84#ibcon#read 5, iclass 14, count 0 2006.229.22:51:53.84#ibcon#about to read 6, iclass 14, count 0 2006.229.22:51:53.84#ibcon#read 6, iclass 14, count 0 2006.229.22:51:53.84#ibcon#end of sib2, iclass 14, count 0 2006.229.22:51:53.84#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:51:53.84#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:51:53.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:51:53.84#ibcon#*before write, iclass 14, count 0 2006.229.22:51:53.84#ibcon#enter sib2, iclass 14, count 0 2006.229.22:51:53.84#ibcon#flushed, iclass 14, count 0 2006.229.22:51:53.84#ibcon#about to write, iclass 14, count 0 2006.229.22:51:53.84#ibcon#wrote, iclass 14, count 0 2006.229.22:51:53.84#ibcon#about to read 3, iclass 14, count 0 2006.229.22:51:53.88#ibcon#read 3, iclass 14, count 0 2006.229.22:51:53.88#ibcon#about to read 4, iclass 14, count 0 2006.229.22:51:53.88#ibcon#read 4, iclass 14, count 0 2006.229.22:51:53.88#ibcon#about to read 5, iclass 14, count 0 2006.229.22:51:53.88#ibcon#read 5, iclass 14, count 0 2006.229.22:51:53.88#ibcon#about to read 6, iclass 14, count 0 2006.229.22:51:53.88#ibcon#read 6, iclass 14, count 0 2006.229.22:51:53.88#ibcon#end of sib2, iclass 14, count 0 2006.229.22:51:53.88#ibcon#*after write, iclass 14, count 0 2006.229.22:51:53.88#ibcon#*before return 0, iclass 14, count 0 2006.229.22:51:53.88#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:53.88#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.22:51:53.88#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:51:53.88#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:51:53.88$vck44/vb=7,4 2006.229.22:51:53.88#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.22:51:53.88#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.22:51:53.88#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:53.88#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:53.94#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:53.94#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:53.94#ibcon#enter wrdev, iclass 16, count 2 2006.229.22:51:53.94#ibcon#first serial, iclass 16, count 2 2006.229.22:51:53.94#ibcon#enter sib2, iclass 16, count 2 2006.229.22:51:53.94#ibcon#flushed, iclass 16, count 2 2006.229.22:51:53.94#ibcon#about to write, iclass 16, count 2 2006.229.22:51:53.94#ibcon#wrote, iclass 16, count 2 2006.229.22:51:53.94#ibcon#about to read 3, iclass 16, count 2 2006.229.22:51:53.96#ibcon#read 3, iclass 16, count 2 2006.229.22:51:53.96#ibcon#about to read 4, iclass 16, count 2 2006.229.22:51:53.96#ibcon#read 4, iclass 16, count 2 2006.229.22:51:53.96#ibcon#about to read 5, iclass 16, count 2 2006.229.22:51:53.96#ibcon#read 5, iclass 16, count 2 2006.229.22:51:53.96#ibcon#about to read 6, iclass 16, count 2 2006.229.22:51:53.96#ibcon#read 6, iclass 16, count 2 2006.229.22:51:53.96#ibcon#end of sib2, iclass 16, count 2 2006.229.22:51:53.96#ibcon#*mode == 0, iclass 16, count 2 2006.229.22:51:53.96#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.22:51:53.96#ibcon#[27=AT07-04\r\n] 2006.229.22:51:53.96#ibcon#*before write, iclass 16, count 2 2006.229.22:51:53.96#ibcon#enter sib2, iclass 16, count 2 2006.229.22:51:53.96#ibcon#flushed, iclass 16, count 2 2006.229.22:51:53.96#ibcon#about to write, iclass 16, count 2 2006.229.22:51:53.96#ibcon#wrote, iclass 16, count 2 2006.229.22:51:53.96#ibcon#about to read 3, iclass 16, count 2 2006.229.22:51:53.99#ibcon#read 3, iclass 16, count 2 2006.229.22:51:53.99#ibcon#about to read 4, iclass 16, count 2 2006.229.22:51:53.99#ibcon#read 4, iclass 16, count 2 2006.229.22:51:53.99#ibcon#about to read 5, iclass 16, count 2 2006.229.22:51:53.99#ibcon#read 5, iclass 16, count 2 2006.229.22:51:53.99#ibcon#about to read 6, iclass 16, count 2 2006.229.22:51:53.99#ibcon#read 6, iclass 16, count 2 2006.229.22:51:53.99#ibcon#end of sib2, iclass 16, count 2 2006.229.22:51:53.99#ibcon#*after write, iclass 16, count 2 2006.229.22:51:53.99#ibcon#*before return 0, iclass 16, count 2 2006.229.22:51:53.99#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:53.99#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.22:51:53.99#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.22:51:53.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:53.99#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:54.11#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:54.11#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:54.11#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:51:54.11#ibcon#first serial, iclass 16, count 0 2006.229.22:51:54.11#ibcon#enter sib2, iclass 16, count 0 2006.229.22:51:54.11#ibcon#flushed, iclass 16, count 0 2006.229.22:51:54.11#ibcon#about to write, iclass 16, count 0 2006.229.22:51:54.11#ibcon#wrote, iclass 16, count 0 2006.229.22:51:54.11#ibcon#about to read 3, iclass 16, count 0 2006.229.22:51:54.13#ibcon#read 3, iclass 16, count 0 2006.229.22:51:54.13#ibcon#about to read 4, iclass 16, count 0 2006.229.22:51:54.13#ibcon#read 4, iclass 16, count 0 2006.229.22:51:54.13#ibcon#about to read 5, iclass 16, count 0 2006.229.22:51:54.13#ibcon#read 5, iclass 16, count 0 2006.229.22:51:54.13#ibcon#about to read 6, iclass 16, count 0 2006.229.22:51:54.13#ibcon#read 6, iclass 16, count 0 2006.229.22:51:54.13#ibcon#end of sib2, iclass 16, count 0 2006.229.22:51:54.13#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:51:54.13#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:51:54.13#ibcon#[27=USB\r\n] 2006.229.22:51:54.13#ibcon#*before write, iclass 16, count 0 2006.229.22:51:54.13#ibcon#enter sib2, iclass 16, count 0 2006.229.22:51:54.13#ibcon#flushed, iclass 16, count 0 2006.229.22:51:54.13#ibcon#about to write, iclass 16, count 0 2006.229.22:51:54.13#ibcon#wrote, iclass 16, count 0 2006.229.22:51:54.13#ibcon#about to read 3, iclass 16, count 0 2006.229.22:51:54.16#ibcon#read 3, iclass 16, count 0 2006.229.22:51:54.16#ibcon#about to read 4, iclass 16, count 0 2006.229.22:51:54.16#ibcon#read 4, iclass 16, count 0 2006.229.22:51:54.16#ibcon#about to read 5, iclass 16, count 0 2006.229.22:51:54.16#ibcon#read 5, iclass 16, count 0 2006.229.22:51:54.16#ibcon#about to read 6, iclass 16, count 0 2006.229.22:51:54.16#ibcon#read 6, iclass 16, count 0 2006.229.22:51:54.16#ibcon#end of sib2, iclass 16, count 0 2006.229.22:51:54.16#ibcon#*after write, iclass 16, count 0 2006.229.22:51:54.16#ibcon#*before return 0, iclass 16, count 0 2006.229.22:51:54.16#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:54.16#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.22:51:54.16#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:51:54.16#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:51:54.16$vck44/vblo=8,744.99 2006.229.22:51:54.16#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.22:51:54.16#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.22:51:54.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:51:54.16#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:54.16#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:54.16#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:54.16#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:51:54.16#ibcon#first serial, iclass 18, count 0 2006.229.22:51:54.16#ibcon#enter sib2, iclass 18, count 0 2006.229.22:51:54.16#ibcon#flushed, iclass 18, count 0 2006.229.22:51:54.16#ibcon#about to write, iclass 18, count 0 2006.229.22:51:54.16#ibcon#wrote, iclass 18, count 0 2006.229.22:51:54.16#ibcon#about to read 3, iclass 18, count 0 2006.229.22:51:54.18#ibcon#read 3, iclass 18, count 0 2006.229.22:51:54.18#ibcon#about to read 4, iclass 18, count 0 2006.229.22:51:54.18#ibcon#read 4, iclass 18, count 0 2006.229.22:51:54.18#ibcon#about to read 5, iclass 18, count 0 2006.229.22:51:54.18#ibcon#read 5, iclass 18, count 0 2006.229.22:51:54.18#ibcon#about to read 6, iclass 18, count 0 2006.229.22:51:54.18#ibcon#read 6, iclass 18, count 0 2006.229.22:51:54.18#ibcon#end of sib2, iclass 18, count 0 2006.229.22:51:54.18#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:51:54.18#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:51:54.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:51:54.18#ibcon#*before write, iclass 18, count 0 2006.229.22:51:54.18#ibcon#enter sib2, iclass 18, count 0 2006.229.22:51:54.18#ibcon#flushed, iclass 18, count 0 2006.229.22:51:54.18#ibcon#about to write, iclass 18, count 0 2006.229.22:51:54.18#ibcon#wrote, iclass 18, count 0 2006.229.22:51:54.18#ibcon#about to read 3, iclass 18, count 0 2006.229.22:51:54.22#ibcon#read 3, iclass 18, count 0 2006.229.22:51:54.22#ibcon#about to read 4, iclass 18, count 0 2006.229.22:51:54.22#ibcon#read 4, iclass 18, count 0 2006.229.22:51:54.22#ibcon#about to read 5, iclass 18, count 0 2006.229.22:51:54.22#ibcon#read 5, iclass 18, count 0 2006.229.22:51:54.22#ibcon#about to read 6, iclass 18, count 0 2006.229.22:51:54.22#ibcon#read 6, iclass 18, count 0 2006.229.22:51:54.22#ibcon#end of sib2, iclass 18, count 0 2006.229.22:51:54.22#ibcon#*after write, iclass 18, count 0 2006.229.22:51:54.22#ibcon#*before return 0, iclass 18, count 0 2006.229.22:51:54.22#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:54.22#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.22:51:54.22#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:51:54.22#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:51:54.22$vck44/vb=8,4 2006.229.22:51:54.22#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.22:51:54.22#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.22:51:54.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:51:54.22#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:54.28#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:54.28#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:54.28#ibcon#enter wrdev, iclass 20, count 2 2006.229.22:51:54.28#ibcon#first serial, iclass 20, count 2 2006.229.22:51:54.28#ibcon#enter sib2, iclass 20, count 2 2006.229.22:51:54.28#ibcon#flushed, iclass 20, count 2 2006.229.22:51:54.28#ibcon#about to write, iclass 20, count 2 2006.229.22:51:54.28#ibcon#wrote, iclass 20, count 2 2006.229.22:51:54.28#ibcon#about to read 3, iclass 20, count 2 2006.229.22:51:54.30#ibcon#read 3, iclass 20, count 2 2006.229.22:51:54.30#ibcon#about to read 4, iclass 20, count 2 2006.229.22:51:54.30#ibcon#read 4, iclass 20, count 2 2006.229.22:51:54.30#ibcon#about to read 5, iclass 20, count 2 2006.229.22:51:54.30#ibcon#read 5, iclass 20, count 2 2006.229.22:51:54.30#ibcon#about to read 6, iclass 20, count 2 2006.229.22:51:54.30#ibcon#read 6, iclass 20, count 2 2006.229.22:51:54.30#ibcon#end of sib2, iclass 20, count 2 2006.229.22:51:54.30#ibcon#*mode == 0, iclass 20, count 2 2006.229.22:51:54.30#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.22:51:54.30#ibcon#[27=AT08-04\r\n] 2006.229.22:51:54.30#ibcon#*before write, iclass 20, count 2 2006.229.22:51:54.30#ibcon#enter sib2, iclass 20, count 2 2006.229.22:51:54.30#ibcon#flushed, iclass 20, count 2 2006.229.22:51:54.30#ibcon#about to write, iclass 20, count 2 2006.229.22:51:54.30#ibcon#wrote, iclass 20, count 2 2006.229.22:51:54.30#ibcon#about to read 3, iclass 20, count 2 2006.229.22:51:54.33#ibcon#read 3, iclass 20, count 2 2006.229.22:51:54.33#ibcon#about to read 4, iclass 20, count 2 2006.229.22:51:54.33#ibcon#read 4, iclass 20, count 2 2006.229.22:51:54.33#ibcon#about to read 5, iclass 20, count 2 2006.229.22:51:54.33#ibcon#read 5, iclass 20, count 2 2006.229.22:51:54.33#ibcon#about to read 6, iclass 20, count 2 2006.229.22:51:54.33#ibcon#read 6, iclass 20, count 2 2006.229.22:51:54.33#ibcon#end of sib2, iclass 20, count 2 2006.229.22:51:54.33#ibcon#*after write, iclass 20, count 2 2006.229.22:51:54.33#ibcon#*before return 0, iclass 20, count 2 2006.229.22:51:54.33#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:54.33#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.22:51:54.33#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.22:51:54.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:51:54.33#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:54.45#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:54.45#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:54.45#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:51:54.45#ibcon#first serial, iclass 20, count 0 2006.229.22:51:54.45#ibcon#enter sib2, iclass 20, count 0 2006.229.22:51:54.45#ibcon#flushed, iclass 20, count 0 2006.229.22:51:54.45#ibcon#about to write, iclass 20, count 0 2006.229.22:51:54.45#ibcon#wrote, iclass 20, count 0 2006.229.22:51:54.45#ibcon#about to read 3, iclass 20, count 0 2006.229.22:51:54.47#ibcon#read 3, iclass 20, count 0 2006.229.22:51:54.47#ibcon#about to read 4, iclass 20, count 0 2006.229.22:51:54.47#ibcon#read 4, iclass 20, count 0 2006.229.22:51:54.47#ibcon#about to read 5, iclass 20, count 0 2006.229.22:51:54.47#ibcon#read 5, iclass 20, count 0 2006.229.22:51:54.47#ibcon#about to read 6, iclass 20, count 0 2006.229.22:51:54.47#ibcon#read 6, iclass 20, count 0 2006.229.22:51:54.47#ibcon#end of sib2, iclass 20, count 0 2006.229.22:51:54.47#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:51:54.47#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:51:54.47#ibcon#[27=USB\r\n] 2006.229.22:51:54.47#ibcon#*before write, iclass 20, count 0 2006.229.22:51:54.47#ibcon#enter sib2, iclass 20, count 0 2006.229.22:51:54.47#ibcon#flushed, iclass 20, count 0 2006.229.22:51:54.47#ibcon#about to write, iclass 20, count 0 2006.229.22:51:54.47#ibcon#wrote, iclass 20, count 0 2006.229.22:51:54.47#ibcon#about to read 3, iclass 20, count 0 2006.229.22:51:54.50#ibcon#read 3, iclass 20, count 0 2006.229.22:51:54.50#ibcon#about to read 4, iclass 20, count 0 2006.229.22:51:54.50#ibcon#read 4, iclass 20, count 0 2006.229.22:51:54.50#ibcon#about to read 5, iclass 20, count 0 2006.229.22:51:54.50#ibcon#read 5, iclass 20, count 0 2006.229.22:51:54.50#ibcon#about to read 6, iclass 20, count 0 2006.229.22:51:54.50#ibcon#read 6, iclass 20, count 0 2006.229.22:51:54.50#ibcon#end of sib2, iclass 20, count 0 2006.229.22:51:54.50#ibcon#*after write, iclass 20, count 0 2006.229.22:51:54.50#ibcon#*before return 0, iclass 20, count 0 2006.229.22:51:54.50#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:54.50#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.22:51:54.50#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:51:54.50#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:51:54.50$vck44/vabw=wide 2006.229.22:51:54.50#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.22:51:54.50#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.22:51:54.50#ibcon#ireg 8 cls_cnt 0 2006.229.22:51:54.50#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:54.50#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:54.50#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:54.50#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:51:54.50#ibcon#first serial, iclass 22, count 0 2006.229.22:51:54.50#ibcon#enter sib2, iclass 22, count 0 2006.229.22:51:54.50#ibcon#flushed, iclass 22, count 0 2006.229.22:51:54.50#ibcon#about to write, iclass 22, count 0 2006.229.22:51:54.50#ibcon#wrote, iclass 22, count 0 2006.229.22:51:54.50#ibcon#about to read 3, iclass 22, count 0 2006.229.22:51:54.52#ibcon#read 3, iclass 22, count 0 2006.229.22:51:54.52#ibcon#about to read 4, iclass 22, count 0 2006.229.22:51:54.52#ibcon#read 4, iclass 22, count 0 2006.229.22:51:54.52#ibcon#about to read 5, iclass 22, count 0 2006.229.22:51:54.52#ibcon#read 5, iclass 22, count 0 2006.229.22:51:54.52#ibcon#about to read 6, iclass 22, count 0 2006.229.22:51:54.52#ibcon#read 6, iclass 22, count 0 2006.229.22:51:54.52#ibcon#end of sib2, iclass 22, count 0 2006.229.22:51:54.52#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:51:54.52#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:51:54.52#ibcon#[25=BW32\r\n] 2006.229.22:51:54.52#ibcon#*before write, iclass 22, count 0 2006.229.22:51:54.52#ibcon#enter sib2, iclass 22, count 0 2006.229.22:51:54.52#ibcon#flushed, iclass 22, count 0 2006.229.22:51:54.52#ibcon#about to write, iclass 22, count 0 2006.229.22:51:54.52#ibcon#wrote, iclass 22, count 0 2006.229.22:51:54.52#ibcon#about to read 3, iclass 22, count 0 2006.229.22:51:54.55#ibcon#read 3, iclass 22, count 0 2006.229.22:51:54.55#ibcon#about to read 4, iclass 22, count 0 2006.229.22:51:54.55#ibcon#read 4, iclass 22, count 0 2006.229.22:51:54.55#ibcon#about to read 5, iclass 22, count 0 2006.229.22:51:54.55#ibcon#read 5, iclass 22, count 0 2006.229.22:51:54.55#ibcon#about to read 6, iclass 22, count 0 2006.229.22:51:54.55#ibcon#read 6, iclass 22, count 0 2006.229.22:51:54.55#ibcon#end of sib2, iclass 22, count 0 2006.229.22:51:54.55#ibcon#*after write, iclass 22, count 0 2006.229.22:51:54.55#ibcon#*before return 0, iclass 22, count 0 2006.229.22:51:54.55#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:54.55#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.22:51:54.55#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:51:54.55#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:51:54.55$vck44/vbbw=wide 2006.229.22:51:54.55#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.22:51:54.55#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.22:51:54.55#ibcon#ireg 8 cls_cnt 0 2006.229.22:51:54.55#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:51:54.62#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:51:54.62#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:51:54.62#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:51:54.62#ibcon#first serial, iclass 24, count 0 2006.229.22:51:54.62#ibcon#enter sib2, iclass 24, count 0 2006.229.22:51:54.62#ibcon#flushed, iclass 24, count 0 2006.229.22:51:54.62#ibcon#about to write, iclass 24, count 0 2006.229.22:51:54.62#ibcon#wrote, iclass 24, count 0 2006.229.22:51:54.62#ibcon#about to read 3, iclass 24, count 0 2006.229.22:51:54.64#ibcon#read 3, iclass 24, count 0 2006.229.22:51:54.64#ibcon#about to read 4, iclass 24, count 0 2006.229.22:51:54.64#ibcon#read 4, iclass 24, count 0 2006.229.22:51:54.64#ibcon#about to read 5, iclass 24, count 0 2006.229.22:51:54.64#ibcon#read 5, iclass 24, count 0 2006.229.22:51:54.64#ibcon#about to read 6, iclass 24, count 0 2006.229.22:51:54.64#ibcon#read 6, iclass 24, count 0 2006.229.22:51:54.64#ibcon#end of sib2, iclass 24, count 0 2006.229.22:51:54.64#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:51:54.64#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:51:54.64#ibcon#[27=BW32\r\n] 2006.229.22:51:54.64#ibcon#*before write, iclass 24, count 0 2006.229.22:51:54.64#ibcon#enter sib2, iclass 24, count 0 2006.229.22:51:54.64#ibcon#flushed, iclass 24, count 0 2006.229.22:51:54.64#ibcon#about to write, iclass 24, count 0 2006.229.22:51:54.64#ibcon#wrote, iclass 24, count 0 2006.229.22:51:54.64#ibcon#about to read 3, iclass 24, count 0 2006.229.22:51:54.67#ibcon#read 3, iclass 24, count 0 2006.229.22:51:54.67#ibcon#about to read 4, iclass 24, count 0 2006.229.22:51:54.67#ibcon#read 4, iclass 24, count 0 2006.229.22:51:54.67#ibcon#about to read 5, iclass 24, count 0 2006.229.22:51:54.67#ibcon#read 5, iclass 24, count 0 2006.229.22:51:54.67#ibcon#about to read 6, iclass 24, count 0 2006.229.22:51:54.67#ibcon#read 6, iclass 24, count 0 2006.229.22:51:54.67#ibcon#end of sib2, iclass 24, count 0 2006.229.22:51:54.67#ibcon#*after write, iclass 24, count 0 2006.229.22:51:54.67#ibcon#*before return 0, iclass 24, count 0 2006.229.22:51:54.67#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:51:54.67#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:51:54.67#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:51:54.67#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:51:54.67$setupk4/ifdk4 2006.229.22:51:54.67$ifdk4/lo= 2006.229.22:51:54.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:51:54.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:51:54.67$ifdk4/patch= 2006.229.22:51:54.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:51:54.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:51:54.67$setupk4/!*+20s 2006.229.22:51:54.86#abcon#<5=/08 1.7 5.7 29.00 891002.6\r\n> 2006.229.22:51:54.88#abcon#{5=INTERFACE CLEAR} 2006.229.22:51:54.94#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:52:05.03#abcon#<5=/08 1.7 5.7 29.01 891002.6\r\n> 2006.229.22:52:05.05#abcon#{5=INTERFACE CLEAR} 2006.229.22:52:05.11#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:52:06.14#trakl#Source acquired 2006.229.22:52:08.14#flagr#flagr/antenna,acquired 2006.229.22:52:09.19$setupk4/"tpicd 2006.229.22:52:09.19$setupk4/echo=off 2006.229.22:52:09.19$setupk4/xlog=off 2006.229.22:52:09.19:!2006.229.22:53:36 2006.229.22:53:36.00:preob 2006.229.22:53:36.13/onsource/TRACKING 2006.229.22:53:36.13:!2006.229.22:53:46 2006.229.22:53:46.00:"tape 2006.229.22:53:46.00:"st=record 2006.229.22:53:46.00:data_valid=on 2006.229.22:53:46.00:midob 2006.229.22:53:47.13/onsource/TRACKING 2006.229.22:53:47.13/wx/29.12,1002.6,88 2006.229.22:53:47.19/cable/+6.4162E-03 2006.229.22:53:48.28/va/01,08,usb,yes,28,31 2006.229.22:53:48.28/va/02,07,usb,yes,31,31 2006.229.22:53:48.28/va/03,06,usb,yes,38,41 2006.229.22:53:48.28/va/04,07,usb,yes,32,33 2006.229.22:53:48.28/va/05,04,usb,yes,28,29 2006.229.22:53:48.28/va/06,04,usb,yes,32,32 2006.229.22:53:48.28/va/07,05,usb,yes,28,29 2006.229.22:53:48.28/va/08,06,usb,yes,20,25 2006.229.22:53:48.51/valo/01,524.99,yes,locked 2006.229.22:53:48.51/valo/02,534.99,yes,locked 2006.229.22:53:48.51/valo/03,564.99,yes,locked 2006.229.22:53:48.51/valo/04,624.99,yes,locked 2006.229.22:53:48.51/valo/05,734.99,yes,locked 2006.229.22:53:48.51/valo/06,814.99,yes,locked 2006.229.22:53:48.51/valo/07,864.99,yes,locked 2006.229.22:53:48.51/valo/08,884.99,yes,locked 2006.229.22:53:49.60/vb/01,04,usb,yes,30,28 2006.229.22:53:49.60/vb/02,04,usb,yes,33,33 2006.229.22:53:49.60/vb/03,04,usb,yes,30,33 2006.229.22:53:49.60/vb/04,04,usb,yes,34,33 2006.229.22:53:49.60/vb/05,04,usb,yes,26,29 2006.229.22:53:49.60/vb/06,04,usb,yes,31,27 2006.229.22:53:49.60/vb/07,04,usb,yes,31,31 2006.229.22:53:49.60/vb/08,04,usb,yes,28,32 2006.229.22:53:49.83/vblo/01,629.99,yes,locked 2006.229.22:53:49.83/vblo/02,634.99,yes,locked 2006.229.22:53:49.83/vblo/03,649.99,yes,locked 2006.229.22:53:49.83/vblo/04,679.99,yes,locked 2006.229.22:53:49.83/vblo/05,709.99,yes,locked 2006.229.22:53:49.83/vblo/06,719.99,yes,locked 2006.229.22:53:49.83/vblo/07,734.99,yes,locked 2006.229.22:53:49.83/vblo/08,744.99,yes,locked 2006.229.22:53:49.98/vabw/8 2006.229.22:53:50.13/vbbw/8 2006.229.22:53:50.33/xfe/off,on,12.0 2006.229.22:53:50.73/ifatt/23,28,28,28 2006.229.22:53:51.07/fmout-gps/S +4.53E-07 2006.229.22:53:51.11:!2006.229.22:55:26 2006.229.22:55:26.00:data_valid=off 2006.229.22:55:26.00:"et 2006.229.22:55:26.00:!+3s 2006.229.22:55:29.01:"tape 2006.229.22:55:29.01:postob 2006.229.22:55:29.17/cable/+6.4143E-03 2006.229.22:55:29.17/wx/29.24,1002.6,84 2006.229.22:55:30.07/fmout-gps/S +4.55E-07 2006.229.22:55:30.07:scan_name=229-2257,jd0608,50 2006.229.22:55:30.07:source=0552+398,055530.81,394849.2,2000.0,ccw 2006.229.22:55:31.14#flagr#flagr/antenna,new-source 2006.229.22:55:31.14:checkk5 2006.229.22:55:31.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:55:31.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:55:32.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:55:32.69/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:55:33.07/chk_obsdata//k5ts1/T2292253??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:55:33.47/chk_obsdata//k5ts2/T2292253??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:55:33.87/chk_obsdata//k5ts3/T2292253??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:55:34.32/chk_obsdata//k5ts4/T2292253??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.22:55:35.03/k5log//k5ts1_log_newline 2006.229.22:55:35.73/k5log//k5ts2_log_newline 2006.229.22:55:36.44/k5log//k5ts3_log_newline 2006.229.22:55:37.14/k5log//k5ts4_log_newline 2006.229.22:55:37.17/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:55:37.17:setupk4=1 2006.229.22:55:37.17$setupk4/echo=on 2006.229.22:55:37.17$setupk4/pcalon 2006.229.22:55:37.17$pcalon/"no phase cal control is implemented here 2006.229.22:55:37.17$setupk4/"tpicd=stop 2006.229.22:55:37.17$setupk4/"rec=synch_on 2006.229.22:55:37.17$setupk4/"rec_mode=128 2006.229.22:55:37.17$setupk4/!* 2006.229.22:55:37.17$setupk4/recpk4 2006.229.22:55:37.17$recpk4/recpatch= 2006.229.22:55:37.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:55:37.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:55:37.17$setupk4/vck44 2006.229.22:55:37.17$vck44/valo=1,524.99 2006.229.22:55:37.17#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.22:55:37.17#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.22:55:37.17#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:37.17#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:37.17#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:37.17#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:37.17#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:55:37.17#ibcon#first serial, iclass 7, count 0 2006.229.22:55:37.17#ibcon#enter sib2, iclass 7, count 0 2006.229.22:55:37.17#ibcon#flushed, iclass 7, count 0 2006.229.22:55:37.17#ibcon#about to write, iclass 7, count 0 2006.229.22:55:37.17#ibcon#wrote, iclass 7, count 0 2006.229.22:55:37.17#ibcon#about to read 3, iclass 7, count 0 2006.229.22:55:37.19#ibcon#read 3, iclass 7, count 0 2006.229.22:55:37.19#ibcon#about to read 4, iclass 7, count 0 2006.229.22:55:37.19#ibcon#read 4, iclass 7, count 0 2006.229.22:55:37.19#ibcon#about to read 5, iclass 7, count 0 2006.229.22:55:37.19#ibcon#read 5, iclass 7, count 0 2006.229.22:55:37.19#ibcon#about to read 6, iclass 7, count 0 2006.229.22:55:37.19#ibcon#read 6, iclass 7, count 0 2006.229.22:55:37.19#ibcon#end of sib2, iclass 7, count 0 2006.229.22:55:37.19#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:55:37.19#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:55:37.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:55:37.19#ibcon#*before write, iclass 7, count 0 2006.229.22:55:37.19#ibcon#enter sib2, iclass 7, count 0 2006.229.22:55:37.19#ibcon#flushed, iclass 7, count 0 2006.229.22:55:37.19#ibcon#about to write, iclass 7, count 0 2006.229.22:55:37.19#ibcon#wrote, iclass 7, count 0 2006.229.22:55:37.19#ibcon#about to read 3, iclass 7, count 0 2006.229.22:55:37.24#ibcon#read 3, iclass 7, count 0 2006.229.22:55:37.24#ibcon#about to read 4, iclass 7, count 0 2006.229.22:55:37.24#ibcon#read 4, iclass 7, count 0 2006.229.22:55:37.24#ibcon#about to read 5, iclass 7, count 0 2006.229.22:55:37.24#ibcon#read 5, iclass 7, count 0 2006.229.22:55:37.24#ibcon#about to read 6, iclass 7, count 0 2006.229.22:55:37.24#ibcon#read 6, iclass 7, count 0 2006.229.22:55:37.24#ibcon#end of sib2, iclass 7, count 0 2006.229.22:55:37.24#ibcon#*after write, iclass 7, count 0 2006.229.22:55:37.24#ibcon#*before return 0, iclass 7, count 0 2006.229.22:55:37.24#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:37.24#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:37.24#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:55:37.24#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:55:37.24$vck44/va=1,8 2006.229.22:55:37.24#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.22:55:37.24#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.22:55:37.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:37.24#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:37.24#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:37.24#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:37.24#ibcon#enter wrdev, iclass 11, count 2 2006.229.22:55:37.24#ibcon#first serial, iclass 11, count 2 2006.229.22:55:37.24#ibcon#enter sib2, iclass 11, count 2 2006.229.22:55:37.24#ibcon#flushed, iclass 11, count 2 2006.229.22:55:37.24#ibcon#about to write, iclass 11, count 2 2006.229.22:55:37.24#ibcon#wrote, iclass 11, count 2 2006.229.22:55:37.24#ibcon#about to read 3, iclass 11, count 2 2006.229.22:55:37.26#ibcon#read 3, iclass 11, count 2 2006.229.22:55:37.26#ibcon#about to read 4, iclass 11, count 2 2006.229.22:55:37.26#ibcon#read 4, iclass 11, count 2 2006.229.22:55:37.26#ibcon#about to read 5, iclass 11, count 2 2006.229.22:55:37.26#ibcon#read 5, iclass 11, count 2 2006.229.22:55:37.26#ibcon#about to read 6, iclass 11, count 2 2006.229.22:55:37.26#ibcon#read 6, iclass 11, count 2 2006.229.22:55:37.26#ibcon#end of sib2, iclass 11, count 2 2006.229.22:55:37.26#ibcon#*mode == 0, iclass 11, count 2 2006.229.22:55:37.26#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.22:55:37.26#ibcon#[25=AT01-08\r\n] 2006.229.22:55:37.26#ibcon#*before write, iclass 11, count 2 2006.229.22:55:37.26#ibcon#enter sib2, iclass 11, count 2 2006.229.22:55:37.26#ibcon#flushed, iclass 11, count 2 2006.229.22:55:37.26#ibcon#about to write, iclass 11, count 2 2006.229.22:55:37.26#ibcon#wrote, iclass 11, count 2 2006.229.22:55:37.26#ibcon#about to read 3, iclass 11, count 2 2006.229.22:55:37.29#ibcon#read 3, iclass 11, count 2 2006.229.22:55:37.29#ibcon#about to read 4, iclass 11, count 2 2006.229.22:55:37.29#ibcon#read 4, iclass 11, count 2 2006.229.22:55:37.29#ibcon#about to read 5, iclass 11, count 2 2006.229.22:55:37.29#ibcon#read 5, iclass 11, count 2 2006.229.22:55:37.29#ibcon#about to read 6, iclass 11, count 2 2006.229.22:55:37.29#ibcon#read 6, iclass 11, count 2 2006.229.22:55:37.29#ibcon#end of sib2, iclass 11, count 2 2006.229.22:55:37.29#ibcon#*after write, iclass 11, count 2 2006.229.22:55:37.29#ibcon#*before return 0, iclass 11, count 2 2006.229.22:55:37.29#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:37.29#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:37.29#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.22:55:37.29#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:37.29#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:37.41#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:37.41#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:37.41#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:55:37.41#ibcon#first serial, iclass 11, count 0 2006.229.22:55:37.41#ibcon#enter sib2, iclass 11, count 0 2006.229.22:55:37.41#ibcon#flushed, iclass 11, count 0 2006.229.22:55:37.41#ibcon#about to write, iclass 11, count 0 2006.229.22:55:37.41#ibcon#wrote, iclass 11, count 0 2006.229.22:55:37.41#ibcon#about to read 3, iclass 11, count 0 2006.229.22:55:37.43#ibcon#read 3, iclass 11, count 0 2006.229.22:55:37.43#ibcon#about to read 4, iclass 11, count 0 2006.229.22:55:37.43#ibcon#read 4, iclass 11, count 0 2006.229.22:55:37.43#ibcon#about to read 5, iclass 11, count 0 2006.229.22:55:37.43#ibcon#read 5, iclass 11, count 0 2006.229.22:55:37.43#ibcon#about to read 6, iclass 11, count 0 2006.229.22:55:37.43#ibcon#read 6, iclass 11, count 0 2006.229.22:55:37.43#ibcon#end of sib2, iclass 11, count 0 2006.229.22:55:37.43#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:55:37.43#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:55:37.43#ibcon#[25=USB\r\n] 2006.229.22:55:37.43#ibcon#*before write, iclass 11, count 0 2006.229.22:55:37.43#ibcon#enter sib2, iclass 11, count 0 2006.229.22:55:37.43#ibcon#flushed, iclass 11, count 0 2006.229.22:55:37.43#ibcon#about to write, iclass 11, count 0 2006.229.22:55:37.43#ibcon#wrote, iclass 11, count 0 2006.229.22:55:37.43#ibcon#about to read 3, iclass 11, count 0 2006.229.22:55:37.46#ibcon#read 3, iclass 11, count 0 2006.229.22:55:37.46#ibcon#about to read 4, iclass 11, count 0 2006.229.22:55:37.46#ibcon#read 4, iclass 11, count 0 2006.229.22:55:37.46#ibcon#about to read 5, iclass 11, count 0 2006.229.22:55:37.46#ibcon#read 5, iclass 11, count 0 2006.229.22:55:37.46#ibcon#about to read 6, iclass 11, count 0 2006.229.22:55:37.46#ibcon#read 6, iclass 11, count 0 2006.229.22:55:37.46#ibcon#end of sib2, iclass 11, count 0 2006.229.22:55:37.46#ibcon#*after write, iclass 11, count 0 2006.229.22:55:37.46#ibcon#*before return 0, iclass 11, count 0 2006.229.22:55:37.46#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:37.46#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:37.46#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:55:37.46#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:55:37.46$vck44/valo=2,534.99 2006.229.22:55:37.46#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.22:55:37.46#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.22:55:37.46#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:37.46#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:37.46#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:37.46#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:37.46#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:55:37.46#ibcon#first serial, iclass 13, count 0 2006.229.22:55:37.46#ibcon#enter sib2, iclass 13, count 0 2006.229.22:55:37.46#ibcon#flushed, iclass 13, count 0 2006.229.22:55:37.46#ibcon#about to write, iclass 13, count 0 2006.229.22:55:37.46#ibcon#wrote, iclass 13, count 0 2006.229.22:55:37.46#ibcon#about to read 3, iclass 13, count 0 2006.229.22:55:37.48#ibcon#read 3, iclass 13, count 0 2006.229.22:55:37.48#ibcon#about to read 4, iclass 13, count 0 2006.229.22:55:37.48#ibcon#read 4, iclass 13, count 0 2006.229.22:55:37.48#ibcon#about to read 5, iclass 13, count 0 2006.229.22:55:37.48#ibcon#read 5, iclass 13, count 0 2006.229.22:55:37.48#ibcon#about to read 6, iclass 13, count 0 2006.229.22:55:37.48#ibcon#read 6, iclass 13, count 0 2006.229.22:55:37.48#ibcon#end of sib2, iclass 13, count 0 2006.229.22:55:37.48#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:55:37.48#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:55:37.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:55:37.48#ibcon#*before write, iclass 13, count 0 2006.229.22:55:37.48#ibcon#enter sib2, iclass 13, count 0 2006.229.22:55:37.48#ibcon#flushed, iclass 13, count 0 2006.229.22:55:37.48#ibcon#about to write, iclass 13, count 0 2006.229.22:55:37.48#ibcon#wrote, iclass 13, count 0 2006.229.22:55:37.48#ibcon#about to read 3, iclass 13, count 0 2006.229.22:55:37.52#ibcon#read 3, iclass 13, count 0 2006.229.22:55:37.52#ibcon#about to read 4, iclass 13, count 0 2006.229.22:55:37.52#ibcon#read 4, iclass 13, count 0 2006.229.22:55:37.52#ibcon#about to read 5, iclass 13, count 0 2006.229.22:55:37.52#ibcon#read 5, iclass 13, count 0 2006.229.22:55:37.52#ibcon#about to read 6, iclass 13, count 0 2006.229.22:55:37.52#ibcon#read 6, iclass 13, count 0 2006.229.22:55:37.52#ibcon#end of sib2, iclass 13, count 0 2006.229.22:55:37.52#ibcon#*after write, iclass 13, count 0 2006.229.22:55:37.52#ibcon#*before return 0, iclass 13, count 0 2006.229.22:55:37.52#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:37.52#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:37.52#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:55:37.52#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:55:37.52$vck44/va=2,7 2006.229.22:55:37.52#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.22:55:37.52#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.22:55:37.52#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:37.52#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:37.58#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:37.58#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:37.58#ibcon#enter wrdev, iclass 15, count 2 2006.229.22:55:37.58#ibcon#first serial, iclass 15, count 2 2006.229.22:55:37.58#ibcon#enter sib2, iclass 15, count 2 2006.229.22:55:37.58#ibcon#flushed, iclass 15, count 2 2006.229.22:55:37.58#ibcon#about to write, iclass 15, count 2 2006.229.22:55:37.58#ibcon#wrote, iclass 15, count 2 2006.229.22:55:37.58#ibcon#about to read 3, iclass 15, count 2 2006.229.22:55:37.60#ibcon#read 3, iclass 15, count 2 2006.229.22:55:37.60#ibcon#about to read 4, iclass 15, count 2 2006.229.22:55:37.60#ibcon#read 4, iclass 15, count 2 2006.229.22:55:37.60#ibcon#about to read 5, iclass 15, count 2 2006.229.22:55:37.60#ibcon#read 5, iclass 15, count 2 2006.229.22:55:37.60#ibcon#about to read 6, iclass 15, count 2 2006.229.22:55:37.60#ibcon#read 6, iclass 15, count 2 2006.229.22:55:37.60#ibcon#end of sib2, iclass 15, count 2 2006.229.22:55:37.60#ibcon#*mode == 0, iclass 15, count 2 2006.229.22:55:37.60#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.22:55:37.60#ibcon#[25=AT02-07\r\n] 2006.229.22:55:37.60#ibcon#*before write, iclass 15, count 2 2006.229.22:55:37.60#ibcon#enter sib2, iclass 15, count 2 2006.229.22:55:37.60#ibcon#flushed, iclass 15, count 2 2006.229.22:55:37.60#ibcon#about to write, iclass 15, count 2 2006.229.22:55:37.60#ibcon#wrote, iclass 15, count 2 2006.229.22:55:37.60#ibcon#about to read 3, iclass 15, count 2 2006.229.22:55:37.63#ibcon#read 3, iclass 15, count 2 2006.229.22:55:37.63#ibcon#about to read 4, iclass 15, count 2 2006.229.22:55:37.63#ibcon#read 4, iclass 15, count 2 2006.229.22:55:37.63#ibcon#about to read 5, iclass 15, count 2 2006.229.22:55:37.63#ibcon#read 5, iclass 15, count 2 2006.229.22:55:37.63#ibcon#about to read 6, iclass 15, count 2 2006.229.22:55:37.63#ibcon#read 6, iclass 15, count 2 2006.229.22:55:37.63#ibcon#end of sib2, iclass 15, count 2 2006.229.22:55:37.63#ibcon#*after write, iclass 15, count 2 2006.229.22:55:37.63#ibcon#*before return 0, iclass 15, count 2 2006.229.22:55:37.63#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:37.63#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:37.63#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.22:55:37.63#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:37.63#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:37.75#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:37.75#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:37.75#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:55:37.75#ibcon#first serial, iclass 15, count 0 2006.229.22:55:37.75#ibcon#enter sib2, iclass 15, count 0 2006.229.22:55:37.75#ibcon#flushed, iclass 15, count 0 2006.229.22:55:37.75#ibcon#about to write, iclass 15, count 0 2006.229.22:55:37.75#ibcon#wrote, iclass 15, count 0 2006.229.22:55:37.75#ibcon#about to read 3, iclass 15, count 0 2006.229.22:55:37.77#ibcon#read 3, iclass 15, count 0 2006.229.22:55:37.77#ibcon#about to read 4, iclass 15, count 0 2006.229.22:55:37.77#ibcon#read 4, iclass 15, count 0 2006.229.22:55:37.77#ibcon#about to read 5, iclass 15, count 0 2006.229.22:55:37.77#ibcon#read 5, iclass 15, count 0 2006.229.22:55:37.77#ibcon#about to read 6, iclass 15, count 0 2006.229.22:55:37.77#ibcon#read 6, iclass 15, count 0 2006.229.22:55:37.77#ibcon#end of sib2, iclass 15, count 0 2006.229.22:55:37.77#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:55:37.77#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:55:37.77#ibcon#[25=USB\r\n] 2006.229.22:55:37.77#ibcon#*before write, iclass 15, count 0 2006.229.22:55:37.77#ibcon#enter sib2, iclass 15, count 0 2006.229.22:55:37.77#ibcon#flushed, iclass 15, count 0 2006.229.22:55:37.77#ibcon#about to write, iclass 15, count 0 2006.229.22:55:37.77#ibcon#wrote, iclass 15, count 0 2006.229.22:55:37.77#ibcon#about to read 3, iclass 15, count 0 2006.229.22:55:37.80#ibcon#read 3, iclass 15, count 0 2006.229.22:55:37.80#ibcon#about to read 4, iclass 15, count 0 2006.229.22:55:37.80#ibcon#read 4, iclass 15, count 0 2006.229.22:55:37.80#ibcon#about to read 5, iclass 15, count 0 2006.229.22:55:37.80#ibcon#read 5, iclass 15, count 0 2006.229.22:55:37.80#ibcon#about to read 6, iclass 15, count 0 2006.229.22:55:37.80#ibcon#read 6, iclass 15, count 0 2006.229.22:55:37.80#ibcon#end of sib2, iclass 15, count 0 2006.229.22:55:37.80#ibcon#*after write, iclass 15, count 0 2006.229.22:55:37.80#ibcon#*before return 0, iclass 15, count 0 2006.229.22:55:37.80#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:37.80#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:37.80#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:55:37.80#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:55:37.80$vck44/valo=3,564.99 2006.229.22:55:37.80#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.22:55:37.80#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.22:55:37.80#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:37.80#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:37.80#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:37.80#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:37.80#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:55:37.80#ibcon#first serial, iclass 17, count 0 2006.229.22:55:37.80#ibcon#enter sib2, iclass 17, count 0 2006.229.22:55:37.80#ibcon#flushed, iclass 17, count 0 2006.229.22:55:37.80#ibcon#about to write, iclass 17, count 0 2006.229.22:55:37.80#ibcon#wrote, iclass 17, count 0 2006.229.22:55:37.80#ibcon#about to read 3, iclass 17, count 0 2006.229.22:55:37.82#ibcon#read 3, iclass 17, count 0 2006.229.22:55:37.82#ibcon#about to read 4, iclass 17, count 0 2006.229.22:55:37.82#ibcon#read 4, iclass 17, count 0 2006.229.22:55:37.82#ibcon#about to read 5, iclass 17, count 0 2006.229.22:55:37.82#ibcon#read 5, iclass 17, count 0 2006.229.22:55:37.82#ibcon#about to read 6, iclass 17, count 0 2006.229.22:55:37.82#ibcon#read 6, iclass 17, count 0 2006.229.22:55:37.82#ibcon#end of sib2, iclass 17, count 0 2006.229.22:55:37.82#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:55:37.82#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:55:37.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:55:37.82#ibcon#*before write, iclass 17, count 0 2006.229.22:55:37.82#ibcon#enter sib2, iclass 17, count 0 2006.229.22:55:37.82#ibcon#flushed, iclass 17, count 0 2006.229.22:55:37.82#ibcon#about to write, iclass 17, count 0 2006.229.22:55:37.82#ibcon#wrote, iclass 17, count 0 2006.229.22:55:37.82#ibcon#about to read 3, iclass 17, count 0 2006.229.22:55:37.86#ibcon#read 3, iclass 17, count 0 2006.229.22:55:37.86#ibcon#about to read 4, iclass 17, count 0 2006.229.22:55:37.86#ibcon#read 4, iclass 17, count 0 2006.229.22:55:37.86#ibcon#about to read 5, iclass 17, count 0 2006.229.22:55:37.86#ibcon#read 5, iclass 17, count 0 2006.229.22:55:37.86#ibcon#about to read 6, iclass 17, count 0 2006.229.22:55:37.86#ibcon#read 6, iclass 17, count 0 2006.229.22:55:37.86#ibcon#end of sib2, iclass 17, count 0 2006.229.22:55:37.86#ibcon#*after write, iclass 17, count 0 2006.229.22:55:37.86#ibcon#*before return 0, iclass 17, count 0 2006.229.22:55:37.86#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:37.86#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:37.86#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:55:37.86#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:55:37.86$vck44/va=3,6 2006.229.22:55:37.86#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.22:55:37.86#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.22:55:37.86#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:37.86#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:37.92#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:37.92#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:37.92#ibcon#enter wrdev, iclass 19, count 2 2006.229.22:55:37.92#ibcon#first serial, iclass 19, count 2 2006.229.22:55:37.92#ibcon#enter sib2, iclass 19, count 2 2006.229.22:55:37.92#ibcon#flushed, iclass 19, count 2 2006.229.22:55:37.92#ibcon#about to write, iclass 19, count 2 2006.229.22:55:37.92#ibcon#wrote, iclass 19, count 2 2006.229.22:55:37.92#ibcon#about to read 3, iclass 19, count 2 2006.229.22:55:37.94#ibcon#read 3, iclass 19, count 2 2006.229.22:55:37.94#ibcon#about to read 4, iclass 19, count 2 2006.229.22:55:37.94#ibcon#read 4, iclass 19, count 2 2006.229.22:55:37.94#ibcon#about to read 5, iclass 19, count 2 2006.229.22:55:37.94#ibcon#read 5, iclass 19, count 2 2006.229.22:55:37.94#ibcon#about to read 6, iclass 19, count 2 2006.229.22:55:37.94#ibcon#read 6, iclass 19, count 2 2006.229.22:55:37.94#ibcon#end of sib2, iclass 19, count 2 2006.229.22:55:37.94#ibcon#*mode == 0, iclass 19, count 2 2006.229.22:55:37.94#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.22:55:37.94#ibcon#[25=AT03-06\r\n] 2006.229.22:55:37.94#ibcon#*before write, iclass 19, count 2 2006.229.22:55:37.94#ibcon#enter sib2, iclass 19, count 2 2006.229.22:55:37.94#ibcon#flushed, iclass 19, count 2 2006.229.22:55:37.94#ibcon#about to write, iclass 19, count 2 2006.229.22:55:37.94#ibcon#wrote, iclass 19, count 2 2006.229.22:55:37.94#ibcon#about to read 3, iclass 19, count 2 2006.229.22:55:37.97#ibcon#read 3, iclass 19, count 2 2006.229.22:55:37.97#ibcon#about to read 4, iclass 19, count 2 2006.229.22:55:37.97#ibcon#read 4, iclass 19, count 2 2006.229.22:55:37.97#ibcon#about to read 5, iclass 19, count 2 2006.229.22:55:37.97#ibcon#read 5, iclass 19, count 2 2006.229.22:55:37.97#ibcon#about to read 6, iclass 19, count 2 2006.229.22:55:37.97#ibcon#read 6, iclass 19, count 2 2006.229.22:55:37.97#ibcon#end of sib2, iclass 19, count 2 2006.229.22:55:37.97#ibcon#*after write, iclass 19, count 2 2006.229.22:55:37.97#ibcon#*before return 0, iclass 19, count 2 2006.229.22:55:37.97#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:37.97#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:37.97#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.22:55:37.97#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:37.97#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:38.09#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:38.09#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:38.09#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:55:38.09#ibcon#first serial, iclass 19, count 0 2006.229.22:55:38.09#ibcon#enter sib2, iclass 19, count 0 2006.229.22:55:38.09#ibcon#flushed, iclass 19, count 0 2006.229.22:55:38.09#ibcon#about to write, iclass 19, count 0 2006.229.22:55:38.09#ibcon#wrote, iclass 19, count 0 2006.229.22:55:38.09#ibcon#about to read 3, iclass 19, count 0 2006.229.22:55:38.11#ibcon#read 3, iclass 19, count 0 2006.229.22:55:38.11#ibcon#about to read 4, iclass 19, count 0 2006.229.22:55:38.11#ibcon#read 4, iclass 19, count 0 2006.229.22:55:38.11#ibcon#about to read 5, iclass 19, count 0 2006.229.22:55:38.11#ibcon#read 5, iclass 19, count 0 2006.229.22:55:38.11#ibcon#about to read 6, iclass 19, count 0 2006.229.22:55:38.11#ibcon#read 6, iclass 19, count 0 2006.229.22:55:38.11#ibcon#end of sib2, iclass 19, count 0 2006.229.22:55:38.11#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:55:38.11#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:55:38.11#ibcon#[25=USB\r\n] 2006.229.22:55:38.11#ibcon#*before write, iclass 19, count 0 2006.229.22:55:38.11#ibcon#enter sib2, iclass 19, count 0 2006.229.22:55:38.11#ibcon#flushed, iclass 19, count 0 2006.229.22:55:38.11#ibcon#about to write, iclass 19, count 0 2006.229.22:55:38.11#ibcon#wrote, iclass 19, count 0 2006.229.22:55:38.11#ibcon#about to read 3, iclass 19, count 0 2006.229.22:55:38.14#ibcon#read 3, iclass 19, count 0 2006.229.22:55:38.14#ibcon#about to read 4, iclass 19, count 0 2006.229.22:55:38.14#ibcon#read 4, iclass 19, count 0 2006.229.22:55:38.14#ibcon#about to read 5, iclass 19, count 0 2006.229.22:55:38.14#ibcon#read 5, iclass 19, count 0 2006.229.22:55:38.14#ibcon#about to read 6, iclass 19, count 0 2006.229.22:55:38.14#ibcon#read 6, iclass 19, count 0 2006.229.22:55:38.14#ibcon#end of sib2, iclass 19, count 0 2006.229.22:55:38.14#ibcon#*after write, iclass 19, count 0 2006.229.22:55:38.14#ibcon#*before return 0, iclass 19, count 0 2006.229.22:55:38.14#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:38.14#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:38.14#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:55:38.14#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:55:38.14$vck44/valo=4,624.99 2006.229.22:55:38.14#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:55:38.14#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:55:38.14#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:38.14#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:38.14#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:38.14#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:38.14#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:55:38.14#ibcon#first serial, iclass 21, count 0 2006.229.22:55:38.14#ibcon#enter sib2, iclass 21, count 0 2006.229.22:55:38.14#ibcon#flushed, iclass 21, count 0 2006.229.22:55:38.14#ibcon#about to write, iclass 21, count 0 2006.229.22:55:38.14#ibcon#wrote, iclass 21, count 0 2006.229.22:55:38.14#ibcon#about to read 3, iclass 21, count 0 2006.229.22:55:38.16#ibcon#read 3, iclass 21, count 0 2006.229.22:55:38.16#ibcon#about to read 4, iclass 21, count 0 2006.229.22:55:38.16#ibcon#read 4, iclass 21, count 0 2006.229.22:55:38.16#ibcon#about to read 5, iclass 21, count 0 2006.229.22:55:38.16#ibcon#read 5, iclass 21, count 0 2006.229.22:55:38.16#ibcon#about to read 6, iclass 21, count 0 2006.229.22:55:38.16#ibcon#read 6, iclass 21, count 0 2006.229.22:55:38.16#ibcon#end of sib2, iclass 21, count 0 2006.229.22:55:38.16#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:55:38.16#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:55:38.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:55:38.16#ibcon#*before write, iclass 21, count 0 2006.229.22:55:38.16#ibcon#enter sib2, iclass 21, count 0 2006.229.22:55:38.16#ibcon#flushed, iclass 21, count 0 2006.229.22:55:38.16#ibcon#about to write, iclass 21, count 0 2006.229.22:55:38.16#ibcon#wrote, iclass 21, count 0 2006.229.22:55:38.16#ibcon#about to read 3, iclass 21, count 0 2006.229.22:55:38.20#ibcon#read 3, iclass 21, count 0 2006.229.22:55:38.20#ibcon#about to read 4, iclass 21, count 0 2006.229.22:55:38.20#ibcon#read 4, iclass 21, count 0 2006.229.22:55:38.20#ibcon#about to read 5, iclass 21, count 0 2006.229.22:55:38.20#ibcon#read 5, iclass 21, count 0 2006.229.22:55:38.20#ibcon#about to read 6, iclass 21, count 0 2006.229.22:55:38.20#ibcon#read 6, iclass 21, count 0 2006.229.22:55:38.20#ibcon#end of sib2, iclass 21, count 0 2006.229.22:55:38.20#ibcon#*after write, iclass 21, count 0 2006.229.22:55:38.20#ibcon#*before return 0, iclass 21, count 0 2006.229.22:55:38.20#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:38.20#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:38.20#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:55:38.20#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:55:38.20$vck44/va=4,7 2006.229.22:55:38.20#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.22:55:38.20#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.22:55:38.20#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:38.20#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:38.26#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:38.26#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:38.26#ibcon#enter wrdev, iclass 23, count 2 2006.229.22:55:38.26#ibcon#first serial, iclass 23, count 2 2006.229.22:55:38.26#ibcon#enter sib2, iclass 23, count 2 2006.229.22:55:38.26#ibcon#flushed, iclass 23, count 2 2006.229.22:55:38.26#ibcon#about to write, iclass 23, count 2 2006.229.22:55:38.26#ibcon#wrote, iclass 23, count 2 2006.229.22:55:38.26#ibcon#about to read 3, iclass 23, count 2 2006.229.22:55:38.28#ibcon#read 3, iclass 23, count 2 2006.229.22:55:38.28#ibcon#about to read 4, iclass 23, count 2 2006.229.22:55:38.28#ibcon#read 4, iclass 23, count 2 2006.229.22:55:38.28#ibcon#about to read 5, iclass 23, count 2 2006.229.22:55:38.28#ibcon#read 5, iclass 23, count 2 2006.229.22:55:38.28#ibcon#about to read 6, iclass 23, count 2 2006.229.22:55:38.28#ibcon#read 6, iclass 23, count 2 2006.229.22:55:38.28#ibcon#end of sib2, iclass 23, count 2 2006.229.22:55:38.28#ibcon#*mode == 0, iclass 23, count 2 2006.229.22:55:38.28#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.22:55:38.28#ibcon#[25=AT04-07\r\n] 2006.229.22:55:38.28#ibcon#*before write, iclass 23, count 2 2006.229.22:55:38.28#ibcon#enter sib2, iclass 23, count 2 2006.229.22:55:38.28#ibcon#flushed, iclass 23, count 2 2006.229.22:55:38.28#ibcon#about to write, iclass 23, count 2 2006.229.22:55:38.28#ibcon#wrote, iclass 23, count 2 2006.229.22:55:38.28#ibcon#about to read 3, iclass 23, count 2 2006.229.22:55:38.31#ibcon#read 3, iclass 23, count 2 2006.229.22:55:38.31#ibcon#about to read 4, iclass 23, count 2 2006.229.22:55:38.31#ibcon#read 4, iclass 23, count 2 2006.229.22:55:38.31#ibcon#about to read 5, iclass 23, count 2 2006.229.22:55:38.31#ibcon#read 5, iclass 23, count 2 2006.229.22:55:38.31#ibcon#about to read 6, iclass 23, count 2 2006.229.22:55:38.31#ibcon#read 6, iclass 23, count 2 2006.229.22:55:38.31#ibcon#end of sib2, iclass 23, count 2 2006.229.22:55:38.31#ibcon#*after write, iclass 23, count 2 2006.229.22:55:38.31#ibcon#*before return 0, iclass 23, count 2 2006.229.22:55:38.31#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:38.31#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:38.31#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.22:55:38.31#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:38.31#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:38.43#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:38.43#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:38.43#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:55:38.43#ibcon#first serial, iclass 23, count 0 2006.229.22:55:38.43#ibcon#enter sib2, iclass 23, count 0 2006.229.22:55:38.43#ibcon#flushed, iclass 23, count 0 2006.229.22:55:38.43#ibcon#about to write, iclass 23, count 0 2006.229.22:55:38.43#ibcon#wrote, iclass 23, count 0 2006.229.22:55:38.43#ibcon#about to read 3, iclass 23, count 0 2006.229.22:55:38.45#ibcon#read 3, iclass 23, count 0 2006.229.22:55:38.45#ibcon#about to read 4, iclass 23, count 0 2006.229.22:55:38.45#ibcon#read 4, iclass 23, count 0 2006.229.22:55:38.45#ibcon#about to read 5, iclass 23, count 0 2006.229.22:55:38.45#ibcon#read 5, iclass 23, count 0 2006.229.22:55:38.45#ibcon#about to read 6, iclass 23, count 0 2006.229.22:55:38.45#ibcon#read 6, iclass 23, count 0 2006.229.22:55:38.45#ibcon#end of sib2, iclass 23, count 0 2006.229.22:55:38.45#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:55:38.45#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:55:38.45#ibcon#[25=USB\r\n] 2006.229.22:55:38.45#ibcon#*before write, iclass 23, count 0 2006.229.22:55:38.45#ibcon#enter sib2, iclass 23, count 0 2006.229.22:55:38.45#ibcon#flushed, iclass 23, count 0 2006.229.22:55:38.45#ibcon#about to write, iclass 23, count 0 2006.229.22:55:38.45#ibcon#wrote, iclass 23, count 0 2006.229.22:55:38.45#ibcon#about to read 3, iclass 23, count 0 2006.229.22:55:38.48#ibcon#read 3, iclass 23, count 0 2006.229.22:55:38.48#ibcon#about to read 4, iclass 23, count 0 2006.229.22:55:38.48#ibcon#read 4, iclass 23, count 0 2006.229.22:55:38.48#ibcon#about to read 5, iclass 23, count 0 2006.229.22:55:38.48#ibcon#read 5, iclass 23, count 0 2006.229.22:55:38.48#ibcon#about to read 6, iclass 23, count 0 2006.229.22:55:38.48#ibcon#read 6, iclass 23, count 0 2006.229.22:55:38.48#ibcon#end of sib2, iclass 23, count 0 2006.229.22:55:38.48#ibcon#*after write, iclass 23, count 0 2006.229.22:55:38.48#ibcon#*before return 0, iclass 23, count 0 2006.229.22:55:38.48#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:38.48#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:38.48#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:55:38.48#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:55:38.48$vck44/valo=5,734.99 2006.229.22:55:38.48#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.22:55:38.48#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.22:55:38.48#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:38.48#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:38.48#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:38.48#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:38.48#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:55:38.48#ibcon#first serial, iclass 25, count 0 2006.229.22:55:38.48#ibcon#enter sib2, iclass 25, count 0 2006.229.22:55:38.48#ibcon#flushed, iclass 25, count 0 2006.229.22:55:38.48#ibcon#about to write, iclass 25, count 0 2006.229.22:55:38.48#ibcon#wrote, iclass 25, count 0 2006.229.22:55:38.48#ibcon#about to read 3, iclass 25, count 0 2006.229.22:55:38.50#ibcon#read 3, iclass 25, count 0 2006.229.22:55:38.50#ibcon#about to read 4, iclass 25, count 0 2006.229.22:55:38.50#ibcon#read 4, iclass 25, count 0 2006.229.22:55:38.50#ibcon#about to read 5, iclass 25, count 0 2006.229.22:55:38.50#ibcon#read 5, iclass 25, count 0 2006.229.22:55:38.50#ibcon#about to read 6, iclass 25, count 0 2006.229.22:55:38.50#ibcon#read 6, iclass 25, count 0 2006.229.22:55:38.50#ibcon#end of sib2, iclass 25, count 0 2006.229.22:55:38.50#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:55:38.50#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:55:38.50#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:55:38.50#ibcon#*before write, iclass 25, count 0 2006.229.22:55:38.50#ibcon#enter sib2, iclass 25, count 0 2006.229.22:55:38.50#ibcon#flushed, iclass 25, count 0 2006.229.22:55:38.50#ibcon#about to write, iclass 25, count 0 2006.229.22:55:38.50#ibcon#wrote, iclass 25, count 0 2006.229.22:55:38.50#ibcon#about to read 3, iclass 25, count 0 2006.229.22:55:38.54#ibcon#read 3, iclass 25, count 0 2006.229.22:55:38.54#ibcon#about to read 4, iclass 25, count 0 2006.229.22:55:38.54#ibcon#read 4, iclass 25, count 0 2006.229.22:55:38.54#ibcon#about to read 5, iclass 25, count 0 2006.229.22:55:38.54#ibcon#read 5, iclass 25, count 0 2006.229.22:55:38.54#ibcon#about to read 6, iclass 25, count 0 2006.229.22:55:38.54#ibcon#read 6, iclass 25, count 0 2006.229.22:55:38.54#ibcon#end of sib2, iclass 25, count 0 2006.229.22:55:38.54#ibcon#*after write, iclass 25, count 0 2006.229.22:55:38.54#ibcon#*before return 0, iclass 25, count 0 2006.229.22:55:38.54#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:38.54#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:38.54#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:55:38.54#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:55:38.54$vck44/va=5,4 2006.229.22:55:38.54#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.22:55:38.54#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.22:55:38.54#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:38.54#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:38.60#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:38.60#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:38.60#ibcon#enter wrdev, iclass 27, count 2 2006.229.22:55:38.60#ibcon#first serial, iclass 27, count 2 2006.229.22:55:38.60#ibcon#enter sib2, iclass 27, count 2 2006.229.22:55:38.60#ibcon#flushed, iclass 27, count 2 2006.229.22:55:38.60#ibcon#about to write, iclass 27, count 2 2006.229.22:55:38.60#ibcon#wrote, iclass 27, count 2 2006.229.22:55:38.60#ibcon#about to read 3, iclass 27, count 2 2006.229.22:55:38.62#ibcon#read 3, iclass 27, count 2 2006.229.22:55:38.62#ibcon#about to read 4, iclass 27, count 2 2006.229.22:55:38.62#ibcon#read 4, iclass 27, count 2 2006.229.22:55:38.62#ibcon#about to read 5, iclass 27, count 2 2006.229.22:55:38.62#ibcon#read 5, iclass 27, count 2 2006.229.22:55:38.62#ibcon#about to read 6, iclass 27, count 2 2006.229.22:55:38.62#ibcon#read 6, iclass 27, count 2 2006.229.22:55:38.62#ibcon#end of sib2, iclass 27, count 2 2006.229.22:55:38.62#ibcon#*mode == 0, iclass 27, count 2 2006.229.22:55:38.62#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.22:55:38.62#ibcon#[25=AT05-04\r\n] 2006.229.22:55:38.62#ibcon#*before write, iclass 27, count 2 2006.229.22:55:38.62#ibcon#enter sib2, iclass 27, count 2 2006.229.22:55:38.62#ibcon#flushed, iclass 27, count 2 2006.229.22:55:38.62#ibcon#about to write, iclass 27, count 2 2006.229.22:55:38.62#ibcon#wrote, iclass 27, count 2 2006.229.22:55:38.62#ibcon#about to read 3, iclass 27, count 2 2006.229.22:55:38.65#ibcon#read 3, iclass 27, count 2 2006.229.22:55:38.65#ibcon#about to read 4, iclass 27, count 2 2006.229.22:55:38.65#ibcon#read 4, iclass 27, count 2 2006.229.22:55:38.65#ibcon#about to read 5, iclass 27, count 2 2006.229.22:55:38.65#ibcon#read 5, iclass 27, count 2 2006.229.22:55:38.65#ibcon#about to read 6, iclass 27, count 2 2006.229.22:55:38.65#ibcon#read 6, iclass 27, count 2 2006.229.22:55:38.65#ibcon#end of sib2, iclass 27, count 2 2006.229.22:55:38.65#ibcon#*after write, iclass 27, count 2 2006.229.22:55:38.65#ibcon#*before return 0, iclass 27, count 2 2006.229.22:55:38.65#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:38.65#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:38.65#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.22:55:38.65#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:38.65#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:38.77#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:38.77#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:38.77#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:55:38.77#ibcon#first serial, iclass 27, count 0 2006.229.22:55:38.77#ibcon#enter sib2, iclass 27, count 0 2006.229.22:55:38.77#ibcon#flushed, iclass 27, count 0 2006.229.22:55:38.77#ibcon#about to write, iclass 27, count 0 2006.229.22:55:38.77#ibcon#wrote, iclass 27, count 0 2006.229.22:55:38.77#ibcon#about to read 3, iclass 27, count 0 2006.229.22:55:38.78#abcon#<5=/09 1.7 5.7 29.25 841002.6\r\n> 2006.229.22:55:38.79#ibcon#read 3, iclass 27, count 0 2006.229.22:55:38.79#ibcon#about to read 4, iclass 27, count 0 2006.229.22:55:38.79#ibcon#read 4, iclass 27, count 0 2006.229.22:55:38.79#ibcon#about to read 5, iclass 27, count 0 2006.229.22:55:38.79#ibcon#read 5, iclass 27, count 0 2006.229.22:55:38.79#ibcon#about to read 6, iclass 27, count 0 2006.229.22:55:38.79#ibcon#read 6, iclass 27, count 0 2006.229.22:55:38.79#ibcon#end of sib2, iclass 27, count 0 2006.229.22:55:38.79#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:55:38.79#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:55:38.79#ibcon#[25=USB\r\n] 2006.229.22:55:38.79#ibcon#*before write, iclass 27, count 0 2006.229.22:55:38.79#ibcon#enter sib2, iclass 27, count 0 2006.229.22:55:38.79#ibcon#flushed, iclass 27, count 0 2006.229.22:55:38.79#ibcon#about to write, iclass 27, count 0 2006.229.22:55:38.79#ibcon#wrote, iclass 27, count 0 2006.229.22:55:38.79#ibcon#about to read 3, iclass 27, count 0 2006.229.22:55:38.80#abcon#{5=INTERFACE CLEAR} 2006.229.22:55:38.82#ibcon#read 3, iclass 27, count 0 2006.229.22:55:38.82#ibcon#about to read 4, iclass 27, count 0 2006.229.22:55:38.82#ibcon#read 4, iclass 27, count 0 2006.229.22:55:38.82#ibcon#about to read 5, iclass 27, count 0 2006.229.22:55:38.82#ibcon#read 5, iclass 27, count 0 2006.229.22:55:38.82#ibcon#about to read 6, iclass 27, count 0 2006.229.22:55:38.82#ibcon#read 6, iclass 27, count 0 2006.229.22:55:38.82#ibcon#end of sib2, iclass 27, count 0 2006.229.22:55:38.82#ibcon#*after write, iclass 27, count 0 2006.229.22:55:38.82#ibcon#*before return 0, iclass 27, count 0 2006.229.22:55:38.82#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:38.82#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:38.82#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:55:38.82#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:55:38.82$vck44/valo=6,814.99 2006.229.22:55:38.82#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.22:55:38.82#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.22:55:38.82#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:38.82#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:55:38.82#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:55:38.82#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:55:38.82#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:55:38.82#ibcon#first serial, iclass 32, count 0 2006.229.22:55:38.82#ibcon#enter sib2, iclass 32, count 0 2006.229.22:55:38.82#ibcon#flushed, iclass 32, count 0 2006.229.22:55:38.82#ibcon#about to write, iclass 32, count 0 2006.229.22:55:38.82#ibcon#wrote, iclass 32, count 0 2006.229.22:55:38.82#ibcon#about to read 3, iclass 32, count 0 2006.229.22:55:38.84#ibcon#read 3, iclass 32, count 0 2006.229.22:55:38.84#ibcon#about to read 4, iclass 32, count 0 2006.229.22:55:38.84#ibcon#read 4, iclass 32, count 0 2006.229.22:55:38.84#ibcon#about to read 5, iclass 32, count 0 2006.229.22:55:38.84#ibcon#read 5, iclass 32, count 0 2006.229.22:55:38.84#ibcon#about to read 6, iclass 32, count 0 2006.229.22:55:38.84#ibcon#read 6, iclass 32, count 0 2006.229.22:55:38.84#ibcon#end of sib2, iclass 32, count 0 2006.229.22:55:38.84#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:55:38.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:55:38.84#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:55:38.84#ibcon#*before write, iclass 32, count 0 2006.229.22:55:38.84#ibcon#enter sib2, iclass 32, count 0 2006.229.22:55:38.84#ibcon#flushed, iclass 32, count 0 2006.229.22:55:38.84#ibcon#about to write, iclass 32, count 0 2006.229.22:55:38.84#ibcon#wrote, iclass 32, count 0 2006.229.22:55:38.84#ibcon#about to read 3, iclass 32, count 0 2006.229.22:55:38.86#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:55:38.88#ibcon#read 3, iclass 32, count 0 2006.229.22:55:38.88#ibcon#about to read 4, iclass 32, count 0 2006.229.22:55:38.88#ibcon#read 4, iclass 32, count 0 2006.229.22:55:38.88#ibcon#about to read 5, iclass 32, count 0 2006.229.22:55:38.88#ibcon#read 5, iclass 32, count 0 2006.229.22:55:38.88#ibcon#about to read 6, iclass 32, count 0 2006.229.22:55:38.88#ibcon#read 6, iclass 32, count 0 2006.229.22:55:38.88#ibcon#end of sib2, iclass 32, count 0 2006.229.22:55:38.88#ibcon#*after write, iclass 32, count 0 2006.229.22:55:38.88#ibcon#*before return 0, iclass 32, count 0 2006.229.22:55:38.88#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:55:38.88#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:55:38.88#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:55:38.88#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:55:38.88$vck44/va=6,4 2006.229.22:55:38.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.22:55:38.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.22:55:38.88#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:38.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:38.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:38.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:38.94#ibcon#enter wrdev, iclass 35, count 2 2006.229.22:55:38.94#ibcon#first serial, iclass 35, count 2 2006.229.22:55:38.94#ibcon#enter sib2, iclass 35, count 2 2006.229.22:55:38.94#ibcon#flushed, iclass 35, count 2 2006.229.22:55:38.94#ibcon#about to write, iclass 35, count 2 2006.229.22:55:38.94#ibcon#wrote, iclass 35, count 2 2006.229.22:55:38.94#ibcon#about to read 3, iclass 35, count 2 2006.229.22:55:38.96#ibcon#read 3, iclass 35, count 2 2006.229.22:55:38.96#ibcon#about to read 4, iclass 35, count 2 2006.229.22:55:38.96#ibcon#read 4, iclass 35, count 2 2006.229.22:55:38.96#ibcon#about to read 5, iclass 35, count 2 2006.229.22:55:38.96#ibcon#read 5, iclass 35, count 2 2006.229.22:55:38.96#ibcon#about to read 6, iclass 35, count 2 2006.229.22:55:38.96#ibcon#read 6, iclass 35, count 2 2006.229.22:55:38.96#ibcon#end of sib2, iclass 35, count 2 2006.229.22:55:38.96#ibcon#*mode == 0, iclass 35, count 2 2006.229.22:55:38.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.22:55:38.96#ibcon#[25=AT06-04\r\n] 2006.229.22:55:38.96#ibcon#*before write, iclass 35, count 2 2006.229.22:55:38.96#ibcon#enter sib2, iclass 35, count 2 2006.229.22:55:38.96#ibcon#flushed, iclass 35, count 2 2006.229.22:55:38.96#ibcon#about to write, iclass 35, count 2 2006.229.22:55:38.96#ibcon#wrote, iclass 35, count 2 2006.229.22:55:38.96#ibcon#about to read 3, iclass 35, count 2 2006.229.22:55:38.99#ibcon#read 3, iclass 35, count 2 2006.229.22:55:38.99#ibcon#about to read 4, iclass 35, count 2 2006.229.22:55:38.99#ibcon#read 4, iclass 35, count 2 2006.229.22:55:38.99#ibcon#about to read 5, iclass 35, count 2 2006.229.22:55:38.99#ibcon#read 5, iclass 35, count 2 2006.229.22:55:38.99#ibcon#about to read 6, iclass 35, count 2 2006.229.22:55:38.99#ibcon#read 6, iclass 35, count 2 2006.229.22:55:38.99#ibcon#end of sib2, iclass 35, count 2 2006.229.22:55:38.99#ibcon#*after write, iclass 35, count 2 2006.229.22:55:38.99#ibcon#*before return 0, iclass 35, count 2 2006.229.22:55:38.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:38.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:38.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.22:55:38.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:38.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:39.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:39.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:39.11#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:55:39.11#ibcon#first serial, iclass 35, count 0 2006.229.22:55:39.11#ibcon#enter sib2, iclass 35, count 0 2006.229.22:55:39.11#ibcon#flushed, iclass 35, count 0 2006.229.22:55:39.11#ibcon#about to write, iclass 35, count 0 2006.229.22:55:39.11#ibcon#wrote, iclass 35, count 0 2006.229.22:55:39.11#ibcon#about to read 3, iclass 35, count 0 2006.229.22:55:39.13#ibcon#read 3, iclass 35, count 0 2006.229.22:55:39.13#ibcon#about to read 4, iclass 35, count 0 2006.229.22:55:39.13#ibcon#read 4, iclass 35, count 0 2006.229.22:55:39.13#ibcon#about to read 5, iclass 35, count 0 2006.229.22:55:39.13#ibcon#read 5, iclass 35, count 0 2006.229.22:55:39.13#ibcon#about to read 6, iclass 35, count 0 2006.229.22:55:39.13#ibcon#read 6, iclass 35, count 0 2006.229.22:55:39.13#ibcon#end of sib2, iclass 35, count 0 2006.229.22:55:39.13#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:55:39.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:55:39.13#ibcon#[25=USB\r\n] 2006.229.22:55:39.13#ibcon#*before write, iclass 35, count 0 2006.229.22:55:39.13#ibcon#enter sib2, iclass 35, count 0 2006.229.22:55:39.13#ibcon#flushed, iclass 35, count 0 2006.229.22:55:39.13#ibcon#about to write, iclass 35, count 0 2006.229.22:55:39.13#ibcon#wrote, iclass 35, count 0 2006.229.22:55:39.13#ibcon#about to read 3, iclass 35, count 0 2006.229.22:55:39.16#ibcon#read 3, iclass 35, count 0 2006.229.22:55:39.16#ibcon#about to read 4, iclass 35, count 0 2006.229.22:55:39.16#ibcon#read 4, iclass 35, count 0 2006.229.22:55:39.16#ibcon#about to read 5, iclass 35, count 0 2006.229.22:55:39.16#ibcon#read 5, iclass 35, count 0 2006.229.22:55:39.16#ibcon#about to read 6, iclass 35, count 0 2006.229.22:55:39.16#ibcon#read 6, iclass 35, count 0 2006.229.22:55:39.16#ibcon#end of sib2, iclass 35, count 0 2006.229.22:55:39.16#ibcon#*after write, iclass 35, count 0 2006.229.22:55:39.16#ibcon#*before return 0, iclass 35, count 0 2006.229.22:55:39.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:39.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:39.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:55:39.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:55:39.16$vck44/valo=7,864.99 2006.229.22:55:39.16#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.22:55:39.16#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.22:55:39.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:39.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:39.16#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:39.16#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:39.16#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:55:39.16#ibcon#first serial, iclass 37, count 0 2006.229.22:55:39.16#ibcon#enter sib2, iclass 37, count 0 2006.229.22:55:39.16#ibcon#flushed, iclass 37, count 0 2006.229.22:55:39.16#ibcon#about to write, iclass 37, count 0 2006.229.22:55:39.16#ibcon#wrote, iclass 37, count 0 2006.229.22:55:39.16#ibcon#about to read 3, iclass 37, count 0 2006.229.22:55:39.18#ibcon#read 3, iclass 37, count 0 2006.229.22:55:39.18#ibcon#about to read 4, iclass 37, count 0 2006.229.22:55:39.18#ibcon#read 4, iclass 37, count 0 2006.229.22:55:39.18#ibcon#about to read 5, iclass 37, count 0 2006.229.22:55:39.18#ibcon#read 5, iclass 37, count 0 2006.229.22:55:39.18#ibcon#about to read 6, iclass 37, count 0 2006.229.22:55:39.18#ibcon#read 6, iclass 37, count 0 2006.229.22:55:39.18#ibcon#end of sib2, iclass 37, count 0 2006.229.22:55:39.18#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:55:39.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:55:39.18#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:55:39.18#ibcon#*before write, iclass 37, count 0 2006.229.22:55:39.18#ibcon#enter sib2, iclass 37, count 0 2006.229.22:55:39.18#ibcon#flushed, iclass 37, count 0 2006.229.22:55:39.18#ibcon#about to write, iclass 37, count 0 2006.229.22:55:39.18#ibcon#wrote, iclass 37, count 0 2006.229.22:55:39.18#ibcon#about to read 3, iclass 37, count 0 2006.229.22:55:39.22#ibcon#read 3, iclass 37, count 0 2006.229.22:55:39.22#ibcon#about to read 4, iclass 37, count 0 2006.229.22:55:39.22#ibcon#read 4, iclass 37, count 0 2006.229.22:55:39.22#ibcon#about to read 5, iclass 37, count 0 2006.229.22:55:39.22#ibcon#read 5, iclass 37, count 0 2006.229.22:55:39.22#ibcon#about to read 6, iclass 37, count 0 2006.229.22:55:39.22#ibcon#read 6, iclass 37, count 0 2006.229.22:55:39.22#ibcon#end of sib2, iclass 37, count 0 2006.229.22:55:39.22#ibcon#*after write, iclass 37, count 0 2006.229.22:55:39.22#ibcon#*before return 0, iclass 37, count 0 2006.229.22:55:39.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:39.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:39.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:55:39.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:55:39.22$vck44/va=7,5 2006.229.22:55:39.22#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.22:55:39.22#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.22:55:39.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:39.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:39.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:39.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:39.28#ibcon#enter wrdev, iclass 39, count 2 2006.229.22:55:39.28#ibcon#first serial, iclass 39, count 2 2006.229.22:55:39.28#ibcon#enter sib2, iclass 39, count 2 2006.229.22:55:39.28#ibcon#flushed, iclass 39, count 2 2006.229.22:55:39.28#ibcon#about to write, iclass 39, count 2 2006.229.22:55:39.28#ibcon#wrote, iclass 39, count 2 2006.229.22:55:39.28#ibcon#about to read 3, iclass 39, count 2 2006.229.22:55:39.30#ibcon#read 3, iclass 39, count 2 2006.229.22:55:39.30#ibcon#about to read 4, iclass 39, count 2 2006.229.22:55:39.30#ibcon#read 4, iclass 39, count 2 2006.229.22:55:39.30#ibcon#about to read 5, iclass 39, count 2 2006.229.22:55:39.30#ibcon#read 5, iclass 39, count 2 2006.229.22:55:39.30#ibcon#about to read 6, iclass 39, count 2 2006.229.22:55:39.30#ibcon#read 6, iclass 39, count 2 2006.229.22:55:39.30#ibcon#end of sib2, iclass 39, count 2 2006.229.22:55:39.30#ibcon#*mode == 0, iclass 39, count 2 2006.229.22:55:39.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.22:55:39.30#ibcon#[25=AT07-05\r\n] 2006.229.22:55:39.30#ibcon#*before write, iclass 39, count 2 2006.229.22:55:39.30#ibcon#enter sib2, iclass 39, count 2 2006.229.22:55:39.30#ibcon#flushed, iclass 39, count 2 2006.229.22:55:39.30#ibcon#about to write, iclass 39, count 2 2006.229.22:55:39.30#ibcon#wrote, iclass 39, count 2 2006.229.22:55:39.30#ibcon#about to read 3, iclass 39, count 2 2006.229.22:55:39.33#ibcon#read 3, iclass 39, count 2 2006.229.22:55:39.33#ibcon#about to read 4, iclass 39, count 2 2006.229.22:55:39.33#ibcon#read 4, iclass 39, count 2 2006.229.22:55:39.33#ibcon#about to read 5, iclass 39, count 2 2006.229.22:55:39.33#ibcon#read 5, iclass 39, count 2 2006.229.22:55:39.33#ibcon#about to read 6, iclass 39, count 2 2006.229.22:55:39.33#ibcon#read 6, iclass 39, count 2 2006.229.22:55:39.33#ibcon#end of sib2, iclass 39, count 2 2006.229.22:55:39.33#ibcon#*after write, iclass 39, count 2 2006.229.22:55:39.33#ibcon#*before return 0, iclass 39, count 2 2006.229.22:55:39.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:39.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:39.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.22:55:39.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:39.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:39.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:39.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:39.45#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:55:39.45#ibcon#first serial, iclass 39, count 0 2006.229.22:55:39.45#ibcon#enter sib2, iclass 39, count 0 2006.229.22:55:39.45#ibcon#flushed, iclass 39, count 0 2006.229.22:55:39.45#ibcon#about to write, iclass 39, count 0 2006.229.22:55:39.45#ibcon#wrote, iclass 39, count 0 2006.229.22:55:39.45#ibcon#about to read 3, iclass 39, count 0 2006.229.22:55:39.47#ibcon#read 3, iclass 39, count 0 2006.229.22:55:39.47#ibcon#about to read 4, iclass 39, count 0 2006.229.22:55:39.47#ibcon#read 4, iclass 39, count 0 2006.229.22:55:39.47#ibcon#about to read 5, iclass 39, count 0 2006.229.22:55:39.47#ibcon#read 5, iclass 39, count 0 2006.229.22:55:39.47#ibcon#about to read 6, iclass 39, count 0 2006.229.22:55:39.47#ibcon#read 6, iclass 39, count 0 2006.229.22:55:39.47#ibcon#end of sib2, iclass 39, count 0 2006.229.22:55:39.47#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:55:39.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:55:39.47#ibcon#[25=USB\r\n] 2006.229.22:55:39.47#ibcon#*before write, iclass 39, count 0 2006.229.22:55:39.47#ibcon#enter sib2, iclass 39, count 0 2006.229.22:55:39.47#ibcon#flushed, iclass 39, count 0 2006.229.22:55:39.47#ibcon#about to write, iclass 39, count 0 2006.229.22:55:39.47#ibcon#wrote, iclass 39, count 0 2006.229.22:55:39.47#ibcon#about to read 3, iclass 39, count 0 2006.229.22:55:39.50#ibcon#read 3, iclass 39, count 0 2006.229.22:55:39.50#ibcon#about to read 4, iclass 39, count 0 2006.229.22:55:39.50#ibcon#read 4, iclass 39, count 0 2006.229.22:55:39.50#ibcon#about to read 5, iclass 39, count 0 2006.229.22:55:39.50#ibcon#read 5, iclass 39, count 0 2006.229.22:55:39.50#ibcon#about to read 6, iclass 39, count 0 2006.229.22:55:39.50#ibcon#read 6, iclass 39, count 0 2006.229.22:55:39.50#ibcon#end of sib2, iclass 39, count 0 2006.229.22:55:39.50#ibcon#*after write, iclass 39, count 0 2006.229.22:55:39.50#ibcon#*before return 0, iclass 39, count 0 2006.229.22:55:39.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:39.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:39.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:55:39.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:55:39.50$vck44/valo=8,884.99 2006.229.22:55:39.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.22:55:39.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.22:55:39.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:39.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:39.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:39.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:39.50#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:55:39.50#ibcon#first serial, iclass 3, count 0 2006.229.22:55:39.50#ibcon#enter sib2, iclass 3, count 0 2006.229.22:55:39.50#ibcon#flushed, iclass 3, count 0 2006.229.22:55:39.50#ibcon#about to write, iclass 3, count 0 2006.229.22:55:39.50#ibcon#wrote, iclass 3, count 0 2006.229.22:55:39.50#ibcon#about to read 3, iclass 3, count 0 2006.229.22:55:39.52#ibcon#read 3, iclass 3, count 0 2006.229.22:55:39.52#ibcon#about to read 4, iclass 3, count 0 2006.229.22:55:39.52#ibcon#read 4, iclass 3, count 0 2006.229.22:55:39.52#ibcon#about to read 5, iclass 3, count 0 2006.229.22:55:39.52#ibcon#read 5, iclass 3, count 0 2006.229.22:55:39.52#ibcon#about to read 6, iclass 3, count 0 2006.229.22:55:39.52#ibcon#read 6, iclass 3, count 0 2006.229.22:55:39.52#ibcon#end of sib2, iclass 3, count 0 2006.229.22:55:39.52#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:55:39.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:55:39.52#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:55:39.52#ibcon#*before write, iclass 3, count 0 2006.229.22:55:39.52#ibcon#enter sib2, iclass 3, count 0 2006.229.22:55:39.52#ibcon#flushed, iclass 3, count 0 2006.229.22:55:39.52#ibcon#about to write, iclass 3, count 0 2006.229.22:55:39.52#ibcon#wrote, iclass 3, count 0 2006.229.22:55:39.52#ibcon#about to read 3, iclass 3, count 0 2006.229.22:55:39.56#ibcon#read 3, iclass 3, count 0 2006.229.22:55:39.56#ibcon#about to read 4, iclass 3, count 0 2006.229.22:55:39.56#ibcon#read 4, iclass 3, count 0 2006.229.22:55:39.56#ibcon#about to read 5, iclass 3, count 0 2006.229.22:55:39.56#ibcon#read 5, iclass 3, count 0 2006.229.22:55:39.56#ibcon#about to read 6, iclass 3, count 0 2006.229.22:55:39.56#ibcon#read 6, iclass 3, count 0 2006.229.22:55:39.56#ibcon#end of sib2, iclass 3, count 0 2006.229.22:55:39.56#ibcon#*after write, iclass 3, count 0 2006.229.22:55:39.56#ibcon#*before return 0, iclass 3, count 0 2006.229.22:55:39.56#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:39.56#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:39.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:55:39.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:55:39.56$vck44/va=8,6 2006.229.22:55:39.56#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.22:55:39.56#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.22:55:39.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:39.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:55:39.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:55:39.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:55:39.62#ibcon#enter wrdev, iclass 5, count 2 2006.229.22:55:39.62#ibcon#first serial, iclass 5, count 2 2006.229.22:55:39.62#ibcon#enter sib2, iclass 5, count 2 2006.229.22:55:39.62#ibcon#flushed, iclass 5, count 2 2006.229.22:55:39.62#ibcon#about to write, iclass 5, count 2 2006.229.22:55:39.62#ibcon#wrote, iclass 5, count 2 2006.229.22:55:39.62#ibcon#about to read 3, iclass 5, count 2 2006.229.22:55:39.64#ibcon#read 3, iclass 5, count 2 2006.229.22:55:39.64#ibcon#about to read 4, iclass 5, count 2 2006.229.22:55:39.64#ibcon#read 4, iclass 5, count 2 2006.229.22:55:39.64#ibcon#about to read 5, iclass 5, count 2 2006.229.22:55:39.64#ibcon#read 5, iclass 5, count 2 2006.229.22:55:39.64#ibcon#about to read 6, iclass 5, count 2 2006.229.22:55:39.64#ibcon#read 6, iclass 5, count 2 2006.229.22:55:39.64#ibcon#end of sib2, iclass 5, count 2 2006.229.22:55:39.64#ibcon#*mode == 0, iclass 5, count 2 2006.229.22:55:39.64#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.22:55:39.64#ibcon#[25=AT08-06\r\n] 2006.229.22:55:39.64#ibcon#*before write, iclass 5, count 2 2006.229.22:55:39.64#ibcon#enter sib2, iclass 5, count 2 2006.229.22:55:39.64#ibcon#flushed, iclass 5, count 2 2006.229.22:55:39.64#ibcon#about to write, iclass 5, count 2 2006.229.22:55:39.64#ibcon#wrote, iclass 5, count 2 2006.229.22:55:39.64#ibcon#about to read 3, iclass 5, count 2 2006.229.22:55:39.67#ibcon#read 3, iclass 5, count 2 2006.229.22:55:39.67#ibcon#about to read 4, iclass 5, count 2 2006.229.22:55:39.67#ibcon#read 4, iclass 5, count 2 2006.229.22:55:39.67#ibcon#about to read 5, iclass 5, count 2 2006.229.22:55:39.67#ibcon#read 5, iclass 5, count 2 2006.229.22:55:39.67#ibcon#about to read 6, iclass 5, count 2 2006.229.22:55:39.67#ibcon#read 6, iclass 5, count 2 2006.229.22:55:39.67#ibcon#end of sib2, iclass 5, count 2 2006.229.22:55:39.67#ibcon#*after write, iclass 5, count 2 2006.229.22:55:39.67#ibcon#*before return 0, iclass 5, count 2 2006.229.22:55:39.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:55:39.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.22:55:39.67#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.22:55:39.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:39.67#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:55:39.79#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:55:39.79#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:55:39.79#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:55:39.79#ibcon#first serial, iclass 5, count 0 2006.229.22:55:39.79#ibcon#enter sib2, iclass 5, count 0 2006.229.22:55:39.79#ibcon#flushed, iclass 5, count 0 2006.229.22:55:39.79#ibcon#about to write, iclass 5, count 0 2006.229.22:55:39.79#ibcon#wrote, iclass 5, count 0 2006.229.22:55:39.79#ibcon#about to read 3, iclass 5, count 0 2006.229.22:55:39.81#ibcon#read 3, iclass 5, count 0 2006.229.22:55:39.81#ibcon#about to read 4, iclass 5, count 0 2006.229.22:55:39.81#ibcon#read 4, iclass 5, count 0 2006.229.22:55:39.81#ibcon#about to read 5, iclass 5, count 0 2006.229.22:55:39.81#ibcon#read 5, iclass 5, count 0 2006.229.22:55:39.81#ibcon#about to read 6, iclass 5, count 0 2006.229.22:55:39.81#ibcon#read 6, iclass 5, count 0 2006.229.22:55:39.81#ibcon#end of sib2, iclass 5, count 0 2006.229.22:55:39.81#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:55:39.81#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:55:39.81#ibcon#[25=USB\r\n] 2006.229.22:55:39.81#ibcon#*before write, iclass 5, count 0 2006.229.22:55:39.81#ibcon#enter sib2, iclass 5, count 0 2006.229.22:55:39.81#ibcon#flushed, iclass 5, count 0 2006.229.22:55:39.81#ibcon#about to write, iclass 5, count 0 2006.229.22:55:39.81#ibcon#wrote, iclass 5, count 0 2006.229.22:55:39.81#ibcon#about to read 3, iclass 5, count 0 2006.229.22:55:39.84#ibcon#read 3, iclass 5, count 0 2006.229.22:55:39.84#ibcon#about to read 4, iclass 5, count 0 2006.229.22:55:39.84#ibcon#read 4, iclass 5, count 0 2006.229.22:55:39.84#ibcon#about to read 5, iclass 5, count 0 2006.229.22:55:39.84#ibcon#read 5, iclass 5, count 0 2006.229.22:55:39.84#ibcon#about to read 6, iclass 5, count 0 2006.229.22:55:39.84#ibcon#read 6, iclass 5, count 0 2006.229.22:55:39.84#ibcon#end of sib2, iclass 5, count 0 2006.229.22:55:39.84#ibcon#*after write, iclass 5, count 0 2006.229.22:55:39.84#ibcon#*before return 0, iclass 5, count 0 2006.229.22:55:39.84#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:55:39.84#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.22:55:39.84#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:55:39.84#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:55:39.84$vck44/vblo=1,629.99 2006.229.22:55:39.84#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.22:55:39.84#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.22:55:39.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:39.84#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:39.84#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:39.84#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:39.84#ibcon#enter wrdev, iclass 7, count 0 2006.229.22:55:39.84#ibcon#first serial, iclass 7, count 0 2006.229.22:55:39.84#ibcon#enter sib2, iclass 7, count 0 2006.229.22:55:39.84#ibcon#flushed, iclass 7, count 0 2006.229.22:55:39.84#ibcon#about to write, iclass 7, count 0 2006.229.22:55:39.84#ibcon#wrote, iclass 7, count 0 2006.229.22:55:39.84#ibcon#about to read 3, iclass 7, count 0 2006.229.22:55:39.86#ibcon#read 3, iclass 7, count 0 2006.229.22:55:39.86#ibcon#about to read 4, iclass 7, count 0 2006.229.22:55:39.86#ibcon#read 4, iclass 7, count 0 2006.229.22:55:39.86#ibcon#about to read 5, iclass 7, count 0 2006.229.22:55:39.86#ibcon#read 5, iclass 7, count 0 2006.229.22:55:39.86#ibcon#about to read 6, iclass 7, count 0 2006.229.22:55:39.86#ibcon#read 6, iclass 7, count 0 2006.229.22:55:39.86#ibcon#end of sib2, iclass 7, count 0 2006.229.22:55:39.86#ibcon#*mode == 0, iclass 7, count 0 2006.229.22:55:39.86#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.22:55:39.86#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:55:39.86#ibcon#*before write, iclass 7, count 0 2006.229.22:55:39.86#ibcon#enter sib2, iclass 7, count 0 2006.229.22:55:39.86#ibcon#flushed, iclass 7, count 0 2006.229.22:55:39.86#ibcon#about to write, iclass 7, count 0 2006.229.22:55:39.86#ibcon#wrote, iclass 7, count 0 2006.229.22:55:39.86#ibcon#about to read 3, iclass 7, count 0 2006.229.22:55:39.90#ibcon#read 3, iclass 7, count 0 2006.229.22:55:39.90#ibcon#about to read 4, iclass 7, count 0 2006.229.22:55:39.90#ibcon#read 4, iclass 7, count 0 2006.229.22:55:39.90#ibcon#about to read 5, iclass 7, count 0 2006.229.22:55:39.90#ibcon#read 5, iclass 7, count 0 2006.229.22:55:39.90#ibcon#about to read 6, iclass 7, count 0 2006.229.22:55:39.90#ibcon#read 6, iclass 7, count 0 2006.229.22:55:39.90#ibcon#end of sib2, iclass 7, count 0 2006.229.22:55:39.90#ibcon#*after write, iclass 7, count 0 2006.229.22:55:39.90#ibcon#*before return 0, iclass 7, count 0 2006.229.22:55:39.90#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:39.90#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.22:55:39.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.22:55:39.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.22:55:39.90$vck44/vb=1,4 2006.229.22:55:39.90#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.22:55:39.90#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.22:55:39.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:39.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:39.90#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:39.90#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:39.90#ibcon#enter wrdev, iclass 11, count 2 2006.229.22:55:39.90#ibcon#first serial, iclass 11, count 2 2006.229.22:55:39.90#ibcon#enter sib2, iclass 11, count 2 2006.229.22:55:39.90#ibcon#flushed, iclass 11, count 2 2006.229.22:55:39.90#ibcon#about to write, iclass 11, count 2 2006.229.22:55:39.90#ibcon#wrote, iclass 11, count 2 2006.229.22:55:39.90#ibcon#about to read 3, iclass 11, count 2 2006.229.22:55:39.92#ibcon#read 3, iclass 11, count 2 2006.229.22:55:39.92#ibcon#about to read 4, iclass 11, count 2 2006.229.22:55:39.92#ibcon#read 4, iclass 11, count 2 2006.229.22:55:39.92#ibcon#about to read 5, iclass 11, count 2 2006.229.22:55:39.92#ibcon#read 5, iclass 11, count 2 2006.229.22:55:39.92#ibcon#about to read 6, iclass 11, count 2 2006.229.22:55:39.92#ibcon#read 6, iclass 11, count 2 2006.229.22:55:39.92#ibcon#end of sib2, iclass 11, count 2 2006.229.22:55:39.92#ibcon#*mode == 0, iclass 11, count 2 2006.229.22:55:39.92#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.22:55:39.92#ibcon#[27=AT01-04\r\n] 2006.229.22:55:39.92#ibcon#*before write, iclass 11, count 2 2006.229.22:55:39.92#ibcon#enter sib2, iclass 11, count 2 2006.229.22:55:39.92#ibcon#flushed, iclass 11, count 2 2006.229.22:55:39.92#ibcon#about to write, iclass 11, count 2 2006.229.22:55:39.92#ibcon#wrote, iclass 11, count 2 2006.229.22:55:39.92#ibcon#about to read 3, iclass 11, count 2 2006.229.22:55:39.95#ibcon#read 3, iclass 11, count 2 2006.229.22:55:39.95#ibcon#about to read 4, iclass 11, count 2 2006.229.22:55:39.95#ibcon#read 4, iclass 11, count 2 2006.229.22:55:39.95#ibcon#about to read 5, iclass 11, count 2 2006.229.22:55:39.95#ibcon#read 5, iclass 11, count 2 2006.229.22:55:39.95#ibcon#about to read 6, iclass 11, count 2 2006.229.22:55:39.95#ibcon#read 6, iclass 11, count 2 2006.229.22:55:39.95#ibcon#end of sib2, iclass 11, count 2 2006.229.22:55:39.95#ibcon#*after write, iclass 11, count 2 2006.229.22:55:39.95#ibcon#*before return 0, iclass 11, count 2 2006.229.22:55:39.95#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:39.95#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.22:55:39.95#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.22:55:39.95#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:39.95#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:40.07#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:40.07#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:40.07#ibcon#enter wrdev, iclass 11, count 0 2006.229.22:55:40.07#ibcon#first serial, iclass 11, count 0 2006.229.22:55:40.07#ibcon#enter sib2, iclass 11, count 0 2006.229.22:55:40.07#ibcon#flushed, iclass 11, count 0 2006.229.22:55:40.07#ibcon#about to write, iclass 11, count 0 2006.229.22:55:40.07#ibcon#wrote, iclass 11, count 0 2006.229.22:55:40.07#ibcon#about to read 3, iclass 11, count 0 2006.229.22:55:40.09#ibcon#read 3, iclass 11, count 0 2006.229.22:55:40.09#ibcon#about to read 4, iclass 11, count 0 2006.229.22:55:40.09#ibcon#read 4, iclass 11, count 0 2006.229.22:55:40.09#ibcon#about to read 5, iclass 11, count 0 2006.229.22:55:40.09#ibcon#read 5, iclass 11, count 0 2006.229.22:55:40.09#ibcon#about to read 6, iclass 11, count 0 2006.229.22:55:40.09#ibcon#read 6, iclass 11, count 0 2006.229.22:55:40.09#ibcon#end of sib2, iclass 11, count 0 2006.229.22:55:40.09#ibcon#*mode == 0, iclass 11, count 0 2006.229.22:55:40.09#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.22:55:40.09#ibcon#[27=USB\r\n] 2006.229.22:55:40.09#ibcon#*before write, iclass 11, count 0 2006.229.22:55:40.09#ibcon#enter sib2, iclass 11, count 0 2006.229.22:55:40.09#ibcon#flushed, iclass 11, count 0 2006.229.22:55:40.09#ibcon#about to write, iclass 11, count 0 2006.229.22:55:40.09#ibcon#wrote, iclass 11, count 0 2006.229.22:55:40.09#ibcon#about to read 3, iclass 11, count 0 2006.229.22:55:40.12#ibcon#read 3, iclass 11, count 0 2006.229.22:55:40.12#ibcon#about to read 4, iclass 11, count 0 2006.229.22:55:40.12#ibcon#read 4, iclass 11, count 0 2006.229.22:55:40.12#ibcon#about to read 5, iclass 11, count 0 2006.229.22:55:40.12#ibcon#read 5, iclass 11, count 0 2006.229.22:55:40.12#ibcon#about to read 6, iclass 11, count 0 2006.229.22:55:40.12#ibcon#read 6, iclass 11, count 0 2006.229.22:55:40.12#ibcon#end of sib2, iclass 11, count 0 2006.229.22:55:40.12#ibcon#*after write, iclass 11, count 0 2006.229.22:55:40.12#ibcon#*before return 0, iclass 11, count 0 2006.229.22:55:40.12#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:40.12#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.22:55:40.12#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.22:55:40.12#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.22:55:40.12$vck44/vblo=2,634.99 2006.229.22:55:40.12#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.22:55:40.12#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.22:55:40.12#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:40.12#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:40.12#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:40.12#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:40.12#ibcon#enter wrdev, iclass 13, count 0 2006.229.22:55:40.12#ibcon#first serial, iclass 13, count 0 2006.229.22:55:40.12#ibcon#enter sib2, iclass 13, count 0 2006.229.22:55:40.12#ibcon#flushed, iclass 13, count 0 2006.229.22:55:40.12#ibcon#about to write, iclass 13, count 0 2006.229.22:55:40.12#ibcon#wrote, iclass 13, count 0 2006.229.22:55:40.12#ibcon#about to read 3, iclass 13, count 0 2006.229.22:55:40.14#ibcon#read 3, iclass 13, count 0 2006.229.22:55:40.14#ibcon#about to read 4, iclass 13, count 0 2006.229.22:55:40.14#ibcon#read 4, iclass 13, count 0 2006.229.22:55:40.14#ibcon#about to read 5, iclass 13, count 0 2006.229.22:55:40.14#ibcon#read 5, iclass 13, count 0 2006.229.22:55:40.14#ibcon#about to read 6, iclass 13, count 0 2006.229.22:55:40.14#ibcon#read 6, iclass 13, count 0 2006.229.22:55:40.14#ibcon#end of sib2, iclass 13, count 0 2006.229.22:55:40.14#ibcon#*mode == 0, iclass 13, count 0 2006.229.22:55:40.14#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.22:55:40.14#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:55:40.14#ibcon#*before write, iclass 13, count 0 2006.229.22:55:40.14#ibcon#enter sib2, iclass 13, count 0 2006.229.22:55:40.14#ibcon#flushed, iclass 13, count 0 2006.229.22:55:40.14#ibcon#about to write, iclass 13, count 0 2006.229.22:55:40.14#ibcon#wrote, iclass 13, count 0 2006.229.22:55:40.14#ibcon#about to read 3, iclass 13, count 0 2006.229.22:55:40.18#ibcon#read 3, iclass 13, count 0 2006.229.22:55:40.18#ibcon#about to read 4, iclass 13, count 0 2006.229.22:55:40.18#ibcon#read 4, iclass 13, count 0 2006.229.22:55:40.18#ibcon#about to read 5, iclass 13, count 0 2006.229.22:55:40.18#ibcon#read 5, iclass 13, count 0 2006.229.22:55:40.18#ibcon#about to read 6, iclass 13, count 0 2006.229.22:55:40.18#ibcon#read 6, iclass 13, count 0 2006.229.22:55:40.18#ibcon#end of sib2, iclass 13, count 0 2006.229.22:55:40.18#ibcon#*after write, iclass 13, count 0 2006.229.22:55:40.18#ibcon#*before return 0, iclass 13, count 0 2006.229.22:55:40.18#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:40.18#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.22:55:40.18#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.22:55:40.18#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.22:55:40.18$vck44/vb=2,4 2006.229.22:55:40.18#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.22:55:40.18#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.22:55:40.18#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:40.18#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:40.24#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:40.24#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:40.24#ibcon#enter wrdev, iclass 15, count 2 2006.229.22:55:40.24#ibcon#first serial, iclass 15, count 2 2006.229.22:55:40.24#ibcon#enter sib2, iclass 15, count 2 2006.229.22:55:40.24#ibcon#flushed, iclass 15, count 2 2006.229.22:55:40.24#ibcon#about to write, iclass 15, count 2 2006.229.22:55:40.24#ibcon#wrote, iclass 15, count 2 2006.229.22:55:40.24#ibcon#about to read 3, iclass 15, count 2 2006.229.22:55:40.26#ibcon#read 3, iclass 15, count 2 2006.229.22:55:40.26#ibcon#about to read 4, iclass 15, count 2 2006.229.22:55:40.26#ibcon#read 4, iclass 15, count 2 2006.229.22:55:40.26#ibcon#about to read 5, iclass 15, count 2 2006.229.22:55:40.26#ibcon#read 5, iclass 15, count 2 2006.229.22:55:40.26#ibcon#about to read 6, iclass 15, count 2 2006.229.22:55:40.26#ibcon#read 6, iclass 15, count 2 2006.229.22:55:40.26#ibcon#end of sib2, iclass 15, count 2 2006.229.22:55:40.26#ibcon#*mode == 0, iclass 15, count 2 2006.229.22:55:40.26#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.22:55:40.26#ibcon#[27=AT02-04\r\n] 2006.229.22:55:40.26#ibcon#*before write, iclass 15, count 2 2006.229.22:55:40.26#ibcon#enter sib2, iclass 15, count 2 2006.229.22:55:40.26#ibcon#flushed, iclass 15, count 2 2006.229.22:55:40.26#ibcon#about to write, iclass 15, count 2 2006.229.22:55:40.26#ibcon#wrote, iclass 15, count 2 2006.229.22:55:40.26#ibcon#about to read 3, iclass 15, count 2 2006.229.22:55:40.29#ibcon#read 3, iclass 15, count 2 2006.229.22:55:40.29#ibcon#about to read 4, iclass 15, count 2 2006.229.22:55:40.29#ibcon#read 4, iclass 15, count 2 2006.229.22:55:40.29#ibcon#about to read 5, iclass 15, count 2 2006.229.22:55:40.29#ibcon#read 5, iclass 15, count 2 2006.229.22:55:40.29#ibcon#about to read 6, iclass 15, count 2 2006.229.22:55:40.29#ibcon#read 6, iclass 15, count 2 2006.229.22:55:40.29#ibcon#end of sib2, iclass 15, count 2 2006.229.22:55:40.29#ibcon#*after write, iclass 15, count 2 2006.229.22:55:40.29#ibcon#*before return 0, iclass 15, count 2 2006.229.22:55:40.29#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:40.29#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.22:55:40.29#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.22:55:40.29#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:40.29#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:40.41#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:40.41#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:40.41#ibcon#enter wrdev, iclass 15, count 0 2006.229.22:55:40.41#ibcon#first serial, iclass 15, count 0 2006.229.22:55:40.41#ibcon#enter sib2, iclass 15, count 0 2006.229.22:55:40.41#ibcon#flushed, iclass 15, count 0 2006.229.22:55:40.41#ibcon#about to write, iclass 15, count 0 2006.229.22:55:40.41#ibcon#wrote, iclass 15, count 0 2006.229.22:55:40.41#ibcon#about to read 3, iclass 15, count 0 2006.229.22:55:40.43#ibcon#read 3, iclass 15, count 0 2006.229.22:55:40.43#ibcon#about to read 4, iclass 15, count 0 2006.229.22:55:40.43#ibcon#read 4, iclass 15, count 0 2006.229.22:55:40.43#ibcon#about to read 5, iclass 15, count 0 2006.229.22:55:40.43#ibcon#read 5, iclass 15, count 0 2006.229.22:55:40.43#ibcon#about to read 6, iclass 15, count 0 2006.229.22:55:40.43#ibcon#read 6, iclass 15, count 0 2006.229.22:55:40.43#ibcon#end of sib2, iclass 15, count 0 2006.229.22:55:40.43#ibcon#*mode == 0, iclass 15, count 0 2006.229.22:55:40.43#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.22:55:40.43#ibcon#[27=USB\r\n] 2006.229.22:55:40.43#ibcon#*before write, iclass 15, count 0 2006.229.22:55:40.43#ibcon#enter sib2, iclass 15, count 0 2006.229.22:55:40.43#ibcon#flushed, iclass 15, count 0 2006.229.22:55:40.43#ibcon#about to write, iclass 15, count 0 2006.229.22:55:40.43#ibcon#wrote, iclass 15, count 0 2006.229.22:55:40.43#ibcon#about to read 3, iclass 15, count 0 2006.229.22:55:40.46#ibcon#read 3, iclass 15, count 0 2006.229.22:55:40.46#ibcon#about to read 4, iclass 15, count 0 2006.229.22:55:40.46#ibcon#read 4, iclass 15, count 0 2006.229.22:55:40.46#ibcon#about to read 5, iclass 15, count 0 2006.229.22:55:40.46#ibcon#read 5, iclass 15, count 0 2006.229.22:55:40.46#ibcon#about to read 6, iclass 15, count 0 2006.229.22:55:40.46#ibcon#read 6, iclass 15, count 0 2006.229.22:55:40.46#ibcon#end of sib2, iclass 15, count 0 2006.229.22:55:40.46#ibcon#*after write, iclass 15, count 0 2006.229.22:55:40.46#ibcon#*before return 0, iclass 15, count 0 2006.229.22:55:40.46#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:40.46#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.22:55:40.46#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.22:55:40.46#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.22:55:40.46$vck44/vblo=3,649.99 2006.229.22:55:40.46#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.22:55:40.46#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.22:55:40.46#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:40.46#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:40.46#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:40.46#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:40.46#ibcon#enter wrdev, iclass 17, count 0 2006.229.22:55:40.46#ibcon#first serial, iclass 17, count 0 2006.229.22:55:40.46#ibcon#enter sib2, iclass 17, count 0 2006.229.22:55:40.46#ibcon#flushed, iclass 17, count 0 2006.229.22:55:40.46#ibcon#about to write, iclass 17, count 0 2006.229.22:55:40.46#ibcon#wrote, iclass 17, count 0 2006.229.22:55:40.46#ibcon#about to read 3, iclass 17, count 0 2006.229.22:55:40.48#ibcon#read 3, iclass 17, count 0 2006.229.22:55:40.48#ibcon#about to read 4, iclass 17, count 0 2006.229.22:55:40.48#ibcon#read 4, iclass 17, count 0 2006.229.22:55:40.48#ibcon#about to read 5, iclass 17, count 0 2006.229.22:55:40.48#ibcon#read 5, iclass 17, count 0 2006.229.22:55:40.48#ibcon#about to read 6, iclass 17, count 0 2006.229.22:55:40.48#ibcon#read 6, iclass 17, count 0 2006.229.22:55:40.48#ibcon#end of sib2, iclass 17, count 0 2006.229.22:55:40.48#ibcon#*mode == 0, iclass 17, count 0 2006.229.22:55:40.48#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.22:55:40.48#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:55:40.48#ibcon#*before write, iclass 17, count 0 2006.229.22:55:40.48#ibcon#enter sib2, iclass 17, count 0 2006.229.22:55:40.48#ibcon#flushed, iclass 17, count 0 2006.229.22:55:40.48#ibcon#about to write, iclass 17, count 0 2006.229.22:55:40.48#ibcon#wrote, iclass 17, count 0 2006.229.22:55:40.48#ibcon#about to read 3, iclass 17, count 0 2006.229.22:55:40.52#ibcon#read 3, iclass 17, count 0 2006.229.22:55:40.52#ibcon#about to read 4, iclass 17, count 0 2006.229.22:55:40.52#ibcon#read 4, iclass 17, count 0 2006.229.22:55:40.52#ibcon#about to read 5, iclass 17, count 0 2006.229.22:55:40.52#ibcon#read 5, iclass 17, count 0 2006.229.22:55:40.52#ibcon#about to read 6, iclass 17, count 0 2006.229.22:55:40.52#ibcon#read 6, iclass 17, count 0 2006.229.22:55:40.52#ibcon#end of sib2, iclass 17, count 0 2006.229.22:55:40.52#ibcon#*after write, iclass 17, count 0 2006.229.22:55:40.52#ibcon#*before return 0, iclass 17, count 0 2006.229.22:55:40.52#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:40.52#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.22:55:40.52#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.22:55:40.52#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.22:55:40.52$vck44/vb=3,4 2006.229.22:55:40.52#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.22:55:40.52#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.22:55:40.52#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:40.52#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:40.58#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:40.58#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:40.58#ibcon#enter wrdev, iclass 19, count 2 2006.229.22:55:40.58#ibcon#first serial, iclass 19, count 2 2006.229.22:55:40.58#ibcon#enter sib2, iclass 19, count 2 2006.229.22:55:40.58#ibcon#flushed, iclass 19, count 2 2006.229.22:55:40.58#ibcon#about to write, iclass 19, count 2 2006.229.22:55:40.58#ibcon#wrote, iclass 19, count 2 2006.229.22:55:40.58#ibcon#about to read 3, iclass 19, count 2 2006.229.22:55:40.60#ibcon#read 3, iclass 19, count 2 2006.229.22:55:40.60#ibcon#about to read 4, iclass 19, count 2 2006.229.22:55:40.60#ibcon#read 4, iclass 19, count 2 2006.229.22:55:40.60#ibcon#about to read 5, iclass 19, count 2 2006.229.22:55:40.60#ibcon#read 5, iclass 19, count 2 2006.229.22:55:40.60#ibcon#about to read 6, iclass 19, count 2 2006.229.22:55:40.60#ibcon#read 6, iclass 19, count 2 2006.229.22:55:40.60#ibcon#end of sib2, iclass 19, count 2 2006.229.22:55:40.60#ibcon#*mode == 0, iclass 19, count 2 2006.229.22:55:40.60#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.22:55:40.60#ibcon#[27=AT03-04\r\n] 2006.229.22:55:40.60#ibcon#*before write, iclass 19, count 2 2006.229.22:55:40.60#ibcon#enter sib2, iclass 19, count 2 2006.229.22:55:40.60#ibcon#flushed, iclass 19, count 2 2006.229.22:55:40.60#ibcon#about to write, iclass 19, count 2 2006.229.22:55:40.60#ibcon#wrote, iclass 19, count 2 2006.229.22:55:40.60#ibcon#about to read 3, iclass 19, count 2 2006.229.22:55:40.63#ibcon#read 3, iclass 19, count 2 2006.229.22:55:40.63#ibcon#about to read 4, iclass 19, count 2 2006.229.22:55:40.63#ibcon#read 4, iclass 19, count 2 2006.229.22:55:40.63#ibcon#about to read 5, iclass 19, count 2 2006.229.22:55:40.63#ibcon#read 5, iclass 19, count 2 2006.229.22:55:40.63#ibcon#about to read 6, iclass 19, count 2 2006.229.22:55:40.63#ibcon#read 6, iclass 19, count 2 2006.229.22:55:40.63#ibcon#end of sib2, iclass 19, count 2 2006.229.22:55:40.63#ibcon#*after write, iclass 19, count 2 2006.229.22:55:40.63#ibcon#*before return 0, iclass 19, count 2 2006.229.22:55:40.63#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:40.63#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.22:55:40.63#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.22:55:40.63#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:40.63#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:40.75#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:40.75#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:40.75#ibcon#enter wrdev, iclass 19, count 0 2006.229.22:55:40.75#ibcon#first serial, iclass 19, count 0 2006.229.22:55:40.75#ibcon#enter sib2, iclass 19, count 0 2006.229.22:55:40.75#ibcon#flushed, iclass 19, count 0 2006.229.22:55:40.75#ibcon#about to write, iclass 19, count 0 2006.229.22:55:40.75#ibcon#wrote, iclass 19, count 0 2006.229.22:55:40.75#ibcon#about to read 3, iclass 19, count 0 2006.229.22:55:40.77#ibcon#read 3, iclass 19, count 0 2006.229.22:55:40.77#ibcon#about to read 4, iclass 19, count 0 2006.229.22:55:40.77#ibcon#read 4, iclass 19, count 0 2006.229.22:55:40.77#ibcon#about to read 5, iclass 19, count 0 2006.229.22:55:40.77#ibcon#read 5, iclass 19, count 0 2006.229.22:55:40.77#ibcon#about to read 6, iclass 19, count 0 2006.229.22:55:40.77#ibcon#read 6, iclass 19, count 0 2006.229.22:55:40.77#ibcon#end of sib2, iclass 19, count 0 2006.229.22:55:40.77#ibcon#*mode == 0, iclass 19, count 0 2006.229.22:55:40.77#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.22:55:40.77#ibcon#[27=USB\r\n] 2006.229.22:55:40.77#ibcon#*before write, iclass 19, count 0 2006.229.22:55:40.77#ibcon#enter sib2, iclass 19, count 0 2006.229.22:55:40.77#ibcon#flushed, iclass 19, count 0 2006.229.22:55:40.77#ibcon#about to write, iclass 19, count 0 2006.229.22:55:40.77#ibcon#wrote, iclass 19, count 0 2006.229.22:55:40.77#ibcon#about to read 3, iclass 19, count 0 2006.229.22:55:40.80#ibcon#read 3, iclass 19, count 0 2006.229.22:55:40.80#ibcon#about to read 4, iclass 19, count 0 2006.229.22:55:40.80#ibcon#read 4, iclass 19, count 0 2006.229.22:55:40.80#ibcon#about to read 5, iclass 19, count 0 2006.229.22:55:40.80#ibcon#read 5, iclass 19, count 0 2006.229.22:55:40.80#ibcon#about to read 6, iclass 19, count 0 2006.229.22:55:40.80#ibcon#read 6, iclass 19, count 0 2006.229.22:55:40.80#ibcon#end of sib2, iclass 19, count 0 2006.229.22:55:40.80#ibcon#*after write, iclass 19, count 0 2006.229.22:55:40.80#ibcon#*before return 0, iclass 19, count 0 2006.229.22:55:40.80#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:40.80#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.22:55:40.80#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.22:55:40.80#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.22:55:40.80$vck44/vblo=4,679.99 2006.229.22:55:40.80#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.22:55:40.80#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.22:55:40.80#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:40.80#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:40.80#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:40.80#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:40.80#ibcon#enter wrdev, iclass 21, count 0 2006.229.22:55:40.80#ibcon#first serial, iclass 21, count 0 2006.229.22:55:40.80#ibcon#enter sib2, iclass 21, count 0 2006.229.22:55:40.80#ibcon#flushed, iclass 21, count 0 2006.229.22:55:40.80#ibcon#about to write, iclass 21, count 0 2006.229.22:55:40.80#ibcon#wrote, iclass 21, count 0 2006.229.22:55:40.80#ibcon#about to read 3, iclass 21, count 0 2006.229.22:55:40.82#ibcon#read 3, iclass 21, count 0 2006.229.22:55:40.82#ibcon#about to read 4, iclass 21, count 0 2006.229.22:55:40.82#ibcon#read 4, iclass 21, count 0 2006.229.22:55:40.82#ibcon#about to read 5, iclass 21, count 0 2006.229.22:55:40.82#ibcon#read 5, iclass 21, count 0 2006.229.22:55:40.82#ibcon#about to read 6, iclass 21, count 0 2006.229.22:55:40.82#ibcon#read 6, iclass 21, count 0 2006.229.22:55:40.82#ibcon#end of sib2, iclass 21, count 0 2006.229.22:55:40.82#ibcon#*mode == 0, iclass 21, count 0 2006.229.22:55:40.82#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.22:55:40.82#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:55:40.82#ibcon#*before write, iclass 21, count 0 2006.229.22:55:40.82#ibcon#enter sib2, iclass 21, count 0 2006.229.22:55:40.82#ibcon#flushed, iclass 21, count 0 2006.229.22:55:40.82#ibcon#about to write, iclass 21, count 0 2006.229.22:55:40.82#ibcon#wrote, iclass 21, count 0 2006.229.22:55:40.82#ibcon#about to read 3, iclass 21, count 0 2006.229.22:55:40.86#ibcon#read 3, iclass 21, count 0 2006.229.22:55:40.86#ibcon#about to read 4, iclass 21, count 0 2006.229.22:55:40.86#ibcon#read 4, iclass 21, count 0 2006.229.22:55:40.86#ibcon#about to read 5, iclass 21, count 0 2006.229.22:55:40.86#ibcon#read 5, iclass 21, count 0 2006.229.22:55:40.86#ibcon#about to read 6, iclass 21, count 0 2006.229.22:55:40.86#ibcon#read 6, iclass 21, count 0 2006.229.22:55:40.86#ibcon#end of sib2, iclass 21, count 0 2006.229.22:55:40.86#ibcon#*after write, iclass 21, count 0 2006.229.22:55:40.86#ibcon#*before return 0, iclass 21, count 0 2006.229.22:55:40.86#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:40.86#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.22:55:40.86#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.22:55:40.86#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.22:55:40.86$vck44/vb=4,4 2006.229.22:55:40.86#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.22:55:40.86#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.22:55:40.86#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:40.86#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:40.92#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:40.92#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:40.92#ibcon#enter wrdev, iclass 23, count 2 2006.229.22:55:40.92#ibcon#first serial, iclass 23, count 2 2006.229.22:55:40.92#ibcon#enter sib2, iclass 23, count 2 2006.229.22:55:40.92#ibcon#flushed, iclass 23, count 2 2006.229.22:55:40.92#ibcon#about to write, iclass 23, count 2 2006.229.22:55:40.92#ibcon#wrote, iclass 23, count 2 2006.229.22:55:40.92#ibcon#about to read 3, iclass 23, count 2 2006.229.22:55:40.94#ibcon#read 3, iclass 23, count 2 2006.229.22:55:40.94#ibcon#about to read 4, iclass 23, count 2 2006.229.22:55:40.94#ibcon#read 4, iclass 23, count 2 2006.229.22:55:40.94#ibcon#about to read 5, iclass 23, count 2 2006.229.22:55:40.94#ibcon#read 5, iclass 23, count 2 2006.229.22:55:40.94#ibcon#about to read 6, iclass 23, count 2 2006.229.22:55:40.94#ibcon#read 6, iclass 23, count 2 2006.229.22:55:40.94#ibcon#end of sib2, iclass 23, count 2 2006.229.22:55:40.94#ibcon#*mode == 0, iclass 23, count 2 2006.229.22:55:40.94#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.22:55:40.94#ibcon#[27=AT04-04\r\n] 2006.229.22:55:40.94#ibcon#*before write, iclass 23, count 2 2006.229.22:55:40.94#ibcon#enter sib2, iclass 23, count 2 2006.229.22:55:40.94#ibcon#flushed, iclass 23, count 2 2006.229.22:55:40.94#ibcon#about to write, iclass 23, count 2 2006.229.22:55:40.94#ibcon#wrote, iclass 23, count 2 2006.229.22:55:40.94#ibcon#about to read 3, iclass 23, count 2 2006.229.22:55:40.97#ibcon#read 3, iclass 23, count 2 2006.229.22:55:40.97#ibcon#about to read 4, iclass 23, count 2 2006.229.22:55:40.97#ibcon#read 4, iclass 23, count 2 2006.229.22:55:40.97#ibcon#about to read 5, iclass 23, count 2 2006.229.22:55:40.97#ibcon#read 5, iclass 23, count 2 2006.229.22:55:40.97#ibcon#about to read 6, iclass 23, count 2 2006.229.22:55:40.97#ibcon#read 6, iclass 23, count 2 2006.229.22:55:40.97#ibcon#end of sib2, iclass 23, count 2 2006.229.22:55:40.97#ibcon#*after write, iclass 23, count 2 2006.229.22:55:40.97#ibcon#*before return 0, iclass 23, count 2 2006.229.22:55:40.97#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:40.97#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.22:55:40.97#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.22:55:40.97#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:40.97#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:41.09#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:41.09#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:41.09#ibcon#enter wrdev, iclass 23, count 0 2006.229.22:55:41.09#ibcon#first serial, iclass 23, count 0 2006.229.22:55:41.09#ibcon#enter sib2, iclass 23, count 0 2006.229.22:55:41.09#ibcon#flushed, iclass 23, count 0 2006.229.22:55:41.09#ibcon#about to write, iclass 23, count 0 2006.229.22:55:41.09#ibcon#wrote, iclass 23, count 0 2006.229.22:55:41.09#ibcon#about to read 3, iclass 23, count 0 2006.229.22:55:41.11#ibcon#read 3, iclass 23, count 0 2006.229.22:55:41.11#ibcon#about to read 4, iclass 23, count 0 2006.229.22:55:41.11#ibcon#read 4, iclass 23, count 0 2006.229.22:55:41.11#ibcon#about to read 5, iclass 23, count 0 2006.229.22:55:41.11#ibcon#read 5, iclass 23, count 0 2006.229.22:55:41.11#ibcon#about to read 6, iclass 23, count 0 2006.229.22:55:41.11#ibcon#read 6, iclass 23, count 0 2006.229.22:55:41.11#ibcon#end of sib2, iclass 23, count 0 2006.229.22:55:41.11#ibcon#*mode == 0, iclass 23, count 0 2006.229.22:55:41.11#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.22:55:41.11#ibcon#[27=USB\r\n] 2006.229.22:55:41.11#ibcon#*before write, iclass 23, count 0 2006.229.22:55:41.11#ibcon#enter sib2, iclass 23, count 0 2006.229.22:55:41.11#ibcon#flushed, iclass 23, count 0 2006.229.22:55:41.11#ibcon#about to write, iclass 23, count 0 2006.229.22:55:41.11#ibcon#wrote, iclass 23, count 0 2006.229.22:55:41.11#ibcon#about to read 3, iclass 23, count 0 2006.229.22:55:41.14#ibcon#read 3, iclass 23, count 0 2006.229.22:55:41.14#ibcon#about to read 4, iclass 23, count 0 2006.229.22:55:41.14#ibcon#read 4, iclass 23, count 0 2006.229.22:55:41.14#ibcon#about to read 5, iclass 23, count 0 2006.229.22:55:41.14#ibcon#read 5, iclass 23, count 0 2006.229.22:55:41.14#ibcon#about to read 6, iclass 23, count 0 2006.229.22:55:41.14#ibcon#read 6, iclass 23, count 0 2006.229.22:55:41.14#ibcon#end of sib2, iclass 23, count 0 2006.229.22:55:41.14#ibcon#*after write, iclass 23, count 0 2006.229.22:55:41.14#ibcon#*before return 0, iclass 23, count 0 2006.229.22:55:41.14#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:41.14#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.22:55:41.14#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.22:55:41.14#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.22:55:41.14$vck44/vblo=5,709.99 2006.229.22:55:41.14#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.22:55:41.14#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.22:55:41.14#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:41.14#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:41.14#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:41.14#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:41.14#ibcon#enter wrdev, iclass 25, count 0 2006.229.22:55:41.14#ibcon#first serial, iclass 25, count 0 2006.229.22:55:41.14#ibcon#enter sib2, iclass 25, count 0 2006.229.22:55:41.14#ibcon#flushed, iclass 25, count 0 2006.229.22:55:41.14#ibcon#about to write, iclass 25, count 0 2006.229.22:55:41.14#ibcon#wrote, iclass 25, count 0 2006.229.22:55:41.14#ibcon#about to read 3, iclass 25, count 0 2006.229.22:55:41.16#ibcon#read 3, iclass 25, count 0 2006.229.22:55:41.16#ibcon#about to read 4, iclass 25, count 0 2006.229.22:55:41.16#ibcon#read 4, iclass 25, count 0 2006.229.22:55:41.16#ibcon#about to read 5, iclass 25, count 0 2006.229.22:55:41.16#ibcon#read 5, iclass 25, count 0 2006.229.22:55:41.16#ibcon#about to read 6, iclass 25, count 0 2006.229.22:55:41.16#ibcon#read 6, iclass 25, count 0 2006.229.22:55:41.16#ibcon#end of sib2, iclass 25, count 0 2006.229.22:55:41.16#ibcon#*mode == 0, iclass 25, count 0 2006.229.22:55:41.16#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.22:55:41.16#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:55:41.16#ibcon#*before write, iclass 25, count 0 2006.229.22:55:41.16#ibcon#enter sib2, iclass 25, count 0 2006.229.22:55:41.16#ibcon#flushed, iclass 25, count 0 2006.229.22:55:41.16#ibcon#about to write, iclass 25, count 0 2006.229.22:55:41.16#ibcon#wrote, iclass 25, count 0 2006.229.22:55:41.16#ibcon#about to read 3, iclass 25, count 0 2006.229.22:55:41.20#ibcon#read 3, iclass 25, count 0 2006.229.22:55:41.20#ibcon#about to read 4, iclass 25, count 0 2006.229.22:55:41.20#ibcon#read 4, iclass 25, count 0 2006.229.22:55:41.20#ibcon#about to read 5, iclass 25, count 0 2006.229.22:55:41.20#ibcon#read 5, iclass 25, count 0 2006.229.22:55:41.20#ibcon#about to read 6, iclass 25, count 0 2006.229.22:55:41.20#ibcon#read 6, iclass 25, count 0 2006.229.22:55:41.20#ibcon#end of sib2, iclass 25, count 0 2006.229.22:55:41.20#ibcon#*after write, iclass 25, count 0 2006.229.22:55:41.20#ibcon#*before return 0, iclass 25, count 0 2006.229.22:55:41.20#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:41.20#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.22:55:41.20#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.22:55:41.20#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.22:55:41.20$vck44/vb=5,4 2006.229.22:55:41.20#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.22:55:41.20#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.22:55:41.20#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:41.20#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:41.26#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:41.26#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:41.26#ibcon#enter wrdev, iclass 27, count 2 2006.229.22:55:41.26#ibcon#first serial, iclass 27, count 2 2006.229.22:55:41.26#ibcon#enter sib2, iclass 27, count 2 2006.229.22:55:41.26#ibcon#flushed, iclass 27, count 2 2006.229.22:55:41.26#ibcon#about to write, iclass 27, count 2 2006.229.22:55:41.26#ibcon#wrote, iclass 27, count 2 2006.229.22:55:41.26#ibcon#about to read 3, iclass 27, count 2 2006.229.22:55:41.28#ibcon#read 3, iclass 27, count 2 2006.229.22:55:41.28#ibcon#about to read 4, iclass 27, count 2 2006.229.22:55:41.28#ibcon#read 4, iclass 27, count 2 2006.229.22:55:41.28#ibcon#about to read 5, iclass 27, count 2 2006.229.22:55:41.28#ibcon#read 5, iclass 27, count 2 2006.229.22:55:41.28#ibcon#about to read 6, iclass 27, count 2 2006.229.22:55:41.28#ibcon#read 6, iclass 27, count 2 2006.229.22:55:41.28#ibcon#end of sib2, iclass 27, count 2 2006.229.22:55:41.28#ibcon#*mode == 0, iclass 27, count 2 2006.229.22:55:41.28#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.22:55:41.28#ibcon#[27=AT05-04\r\n] 2006.229.22:55:41.28#ibcon#*before write, iclass 27, count 2 2006.229.22:55:41.28#ibcon#enter sib2, iclass 27, count 2 2006.229.22:55:41.28#ibcon#flushed, iclass 27, count 2 2006.229.22:55:41.28#ibcon#about to write, iclass 27, count 2 2006.229.22:55:41.28#ibcon#wrote, iclass 27, count 2 2006.229.22:55:41.28#ibcon#about to read 3, iclass 27, count 2 2006.229.22:55:41.31#ibcon#read 3, iclass 27, count 2 2006.229.22:55:41.31#ibcon#about to read 4, iclass 27, count 2 2006.229.22:55:41.31#ibcon#read 4, iclass 27, count 2 2006.229.22:55:41.31#ibcon#about to read 5, iclass 27, count 2 2006.229.22:55:41.31#ibcon#read 5, iclass 27, count 2 2006.229.22:55:41.31#ibcon#about to read 6, iclass 27, count 2 2006.229.22:55:41.31#ibcon#read 6, iclass 27, count 2 2006.229.22:55:41.31#ibcon#end of sib2, iclass 27, count 2 2006.229.22:55:41.31#ibcon#*after write, iclass 27, count 2 2006.229.22:55:41.31#ibcon#*before return 0, iclass 27, count 2 2006.229.22:55:41.31#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:41.31#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.22:55:41.31#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.22:55:41.31#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:41.31#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:41.43#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:41.43#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:41.43#ibcon#enter wrdev, iclass 27, count 0 2006.229.22:55:41.43#ibcon#first serial, iclass 27, count 0 2006.229.22:55:41.43#ibcon#enter sib2, iclass 27, count 0 2006.229.22:55:41.43#ibcon#flushed, iclass 27, count 0 2006.229.22:55:41.43#ibcon#about to write, iclass 27, count 0 2006.229.22:55:41.43#ibcon#wrote, iclass 27, count 0 2006.229.22:55:41.43#ibcon#about to read 3, iclass 27, count 0 2006.229.22:55:41.45#ibcon#read 3, iclass 27, count 0 2006.229.22:55:41.45#ibcon#about to read 4, iclass 27, count 0 2006.229.22:55:41.45#ibcon#read 4, iclass 27, count 0 2006.229.22:55:41.45#ibcon#about to read 5, iclass 27, count 0 2006.229.22:55:41.45#ibcon#read 5, iclass 27, count 0 2006.229.22:55:41.45#ibcon#about to read 6, iclass 27, count 0 2006.229.22:55:41.45#ibcon#read 6, iclass 27, count 0 2006.229.22:55:41.45#ibcon#end of sib2, iclass 27, count 0 2006.229.22:55:41.45#ibcon#*mode == 0, iclass 27, count 0 2006.229.22:55:41.45#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.22:55:41.45#ibcon#[27=USB\r\n] 2006.229.22:55:41.45#ibcon#*before write, iclass 27, count 0 2006.229.22:55:41.45#ibcon#enter sib2, iclass 27, count 0 2006.229.22:55:41.45#ibcon#flushed, iclass 27, count 0 2006.229.22:55:41.45#ibcon#about to write, iclass 27, count 0 2006.229.22:55:41.45#ibcon#wrote, iclass 27, count 0 2006.229.22:55:41.45#ibcon#about to read 3, iclass 27, count 0 2006.229.22:55:41.48#ibcon#read 3, iclass 27, count 0 2006.229.22:55:41.48#ibcon#about to read 4, iclass 27, count 0 2006.229.22:55:41.48#ibcon#read 4, iclass 27, count 0 2006.229.22:55:41.48#ibcon#about to read 5, iclass 27, count 0 2006.229.22:55:41.48#ibcon#read 5, iclass 27, count 0 2006.229.22:55:41.48#ibcon#about to read 6, iclass 27, count 0 2006.229.22:55:41.48#ibcon#read 6, iclass 27, count 0 2006.229.22:55:41.48#ibcon#end of sib2, iclass 27, count 0 2006.229.22:55:41.48#ibcon#*after write, iclass 27, count 0 2006.229.22:55:41.48#ibcon#*before return 0, iclass 27, count 0 2006.229.22:55:41.48#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:41.48#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.22:55:41.48#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.22:55:41.48#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.22:55:41.48$vck44/vblo=6,719.99 2006.229.22:55:41.48#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.22:55:41.48#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.22:55:41.48#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:41.48#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:55:41.48#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:55:41.48#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:55:41.48#ibcon#enter wrdev, iclass 29, count 0 2006.229.22:55:41.48#ibcon#first serial, iclass 29, count 0 2006.229.22:55:41.48#ibcon#enter sib2, iclass 29, count 0 2006.229.22:55:41.48#ibcon#flushed, iclass 29, count 0 2006.229.22:55:41.48#ibcon#about to write, iclass 29, count 0 2006.229.22:55:41.48#ibcon#wrote, iclass 29, count 0 2006.229.22:55:41.48#ibcon#about to read 3, iclass 29, count 0 2006.229.22:55:41.50#ibcon#read 3, iclass 29, count 0 2006.229.22:55:41.50#ibcon#about to read 4, iclass 29, count 0 2006.229.22:55:41.50#ibcon#read 4, iclass 29, count 0 2006.229.22:55:41.50#ibcon#about to read 5, iclass 29, count 0 2006.229.22:55:41.50#ibcon#read 5, iclass 29, count 0 2006.229.22:55:41.50#ibcon#about to read 6, iclass 29, count 0 2006.229.22:55:41.50#ibcon#read 6, iclass 29, count 0 2006.229.22:55:41.50#ibcon#end of sib2, iclass 29, count 0 2006.229.22:55:41.50#ibcon#*mode == 0, iclass 29, count 0 2006.229.22:55:41.50#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.22:55:41.50#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:55:41.50#ibcon#*before write, iclass 29, count 0 2006.229.22:55:41.50#ibcon#enter sib2, iclass 29, count 0 2006.229.22:55:41.50#ibcon#flushed, iclass 29, count 0 2006.229.22:55:41.50#ibcon#about to write, iclass 29, count 0 2006.229.22:55:41.50#ibcon#wrote, iclass 29, count 0 2006.229.22:55:41.50#ibcon#about to read 3, iclass 29, count 0 2006.229.22:55:41.54#ibcon#read 3, iclass 29, count 0 2006.229.22:55:41.54#ibcon#about to read 4, iclass 29, count 0 2006.229.22:55:41.54#ibcon#read 4, iclass 29, count 0 2006.229.22:55:41.54#ibcon#about to read 5, iclass 29, count 0 2006.229.22:55:41.54#ibcon#read 5, iclass 29, count 0 2006.229.22:55:41.54#ibcon#about to read 6, iclass 29, count 0 2006.229.22:55:41.54#ibcon#read 6, iclass 29, count 0 2006.229.22:55:41.54#ibcon#end of sib2, iclass 29, count 0 2006.229.22:55:41.54#ibcon#*after write, iclass 29, count 0 2006.229.22:55:41.54#ibcon#*before return 0, iclass 29, count 0 2006.229.22:55:41.54#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:55:41.54#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.22:55:41.54#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.22:55:41.54#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.22:55:41.54$vck44/vb=6,4 2006.229.22:55:41.54#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.22:55:41.54#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.22:55:41.54#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:41.54#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:55:41.60#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:55:41.60#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:55:41.60#ibcon#enter wrdev, iclass 31, count 2 2006.229.22:55:41.60#ibcon#first serial, iclass 31, count 2 2006.229.22:55:41.60#ibcon#enter sib2, iclass 31, count 2 2006.229.22:55:41.60#ibcon#flushed, iclass 31, count 2 2006.229.22:55:41.60#ibcon#about to write, iclass 31, count 2 2006.229.22:55:41.60#ibcon#wrote, iclass 31, count 2 2006.229.22:55:41.60#ibcon#about to read 3, iclass 31, count 2 2006.229.22:55:41.62#ibcon#read 3, iclass 31, count 2 2006.229.22:55:41.62#ibcon#about to read 4, iclass 31, count 2 2006.229.22:55:41.62#ibcon#read 4, iclass 31, count 2 2006.229.22:55:41.62#ibcon#about to read 5, iclass 31, count 2 2006.229.22:55:41.62#ibcon#read 5, iclass 31, count 2 2006.229.22:55:41.62#ibcon#about to read 6, iclass 31, count 2 2006.229.22:55:41.62#ibcon#read 6, iclass 31, count 2 2006.229.22:55:41.62#ibcon#end of sib2, iclass 31, count 2 2006.229.22:55:41.62#ibcon#*mode == 0, iclass 31, count 2 2006.229.22:55:41.62#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.22:55:41.62#ibcon#[27=AT06-04\r\n] 2006.229.22:55:41.62#ibcon#*before write, iclass 31, count 2 2006.229.22:55:41.62#ibcon#enter sib2, iclass 31, count 2 2006.229.22:55:41.62#ibcon#flushed, iclass 31, count 2 2006.229.22:55:41.62#ibcon#about to write, iclass 31, count 2 2006.229.22:55:41.62#ibcon#wrote, iclass 31, count 2 2006.229.22:55:41.62#ibcon#about to read 3, iclass 31, count 2 2006.229.22:55:41.65#ibcon#read 3, iclass 31, count 2 2006.229.22:55:41.65#ibcon#about to read 4, iclass 31, count 2 2006.229.22:55:41.65#ibcon#read 4, iclass 31, count 2 2006.229.22:55:41.65#ibcon#about to read 5, iclass 31, count 2 2006.229.22:55:41.65#ibcon#read 5, iclass 31, count 2 2006.229.22:55:41.65#ibcon#about to read 6, iclass 31, count 2 2006.229.22:55:41.65#ibcon#read 6, iclass 31, count 2 2006.229.22:55:41.65#ibcon#end of sib2, iclass 31, count 2 2006.229.22:55:41.65#ibcon#*after write, iclass 31, count 2 2006.229.22:55:41.65#ibcon#*before return 0, iclass 31, count 2 2006.229.22:55:41.65#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:55:41.65#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.22:55:41.65#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.22:55:41.65#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:41.65#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:55:41.77#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:55:41.77#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:55:41.77#ibcon#enter wrdev, iclass 31, count 0 2006.229.22:55:41.77#ibcon#first serial, iclass 31, count 0 2006.229.22:55:41.77#ibcon#enter sib2, iclass 31, count 0 2006.229.22:55:41.77#ibcon#flushed, iclass 31, count 0 2006.229.22:55:41.77#ibcon#about to write, iclass 31, count 0 2006.229.22:55:41.77#ibcon#wrote, iclass 31, count 0 2006.229.22:55:41.77#ibcon#about to read 3, iclass 31, count 0 2006.229.22:55:41.79#ibcon#read 3, iclass 31, count 0 2006.229.22:55:41.79#ibcon#about to read 4, iclass 31, count 0 2006.229.22:55:41.79#ibcon#read 4, iclass 31, count 0 2006.229.22:55:41.79#ibcon#about to read 5, iclass 31, count 0 2006.229.22:55:41.79#ibcon#read 5, iclass 31, count 0 2006.229.22:55:41.79#ibcon#about to read 6, iclass 31, count 0 2006.229.22:55:41.79#ibcon#read 6, iclass 31, count 0 2006.229.22:55:41.79#ibcon#end of sib2, iclass 31, count 0 2006.229.22:55:41.79#ibcon#*mode == 0, iclass 31, count 0 2006.229.22:55:41.79#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.22:55:41.79#ibcon#[27=USB\r\n] 2006.229.22:55:41.79#ibcon#*before write, iclass 31, count 0 2006.229.22:55:41.79#ibcon#enter sib2, iclass 31, count 0 2006.229.22:55:41.79#ibcon#flushed, iclass 31, count 0 2006.229.22:55:41.79#ibcon#about to write, iclass 31, count 0 2006.229.22:55:41.79#ibcon#wrote, iclass 31, count 0 2006.229.22:55:41.79#ibcon#about to read 3, iclass 31, count 0 2006.229.22:55:41.82#ibcon#read 3, iclass 31, count 0 2006.229.22:55:41.82#ibcon#about to read 4, iclass 31, count 0 2006.229.22:55:41.82#ibcon#read 4, iclass 31, count 0 2006.229.22:55:41.82#ibcon#about to read 5, iclass 31, count 0 2006.229.22:55:41.82#ibcon#read 5, iclass 31, count 0 2006.229.22:55:41.82#ibcon#about to read 6, iclass 31, count 0 2006.229.22:55:41.82#ibcon#read 6, iclass 31, count 0 2006.229.22:55:41.82#ibcon#end of sib2, iclass 31, count 0 2006.229.22:55:41.82#ibcon#*after write, iclass 31, count 0 2006.229.22:55:41.82#ibcon#*before return 0, iclass 31, count 0 2006.229.22:55:41.82#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:55:41.82#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.22:55:41.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.22:55:41.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.22:55:41.82$vck44/vblo=7,734.99 2006.229.22:55:41.82#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.22:55:41.82#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.22:55:41.82#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:41.82#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:55:41.82#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:55:41.82#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:55:41.82#ibcon#enter wrdev, iclass 33, count 0 2006.229.22:55:41.82#ibcon#first serial, iclass 33, count 0 2006.229.22:55:41.82#ibcon#enter sib2, iclass 33, count 0 2006.229.22:55:41.82#ibcon#flushed, iclass 33, count 0 2006.229.22:55:41.82#ibcon#about to write, iclass 33, count 0 2006.229.22:55:41.82#ibcon#wrote, iclass 33, count 0 2006.229.22:55:41.82#ibcon#about to read 3, iclass 33, count 0 2006.229.22:55:41.84#ibcon#read 3, iclass 33, count 0 2006.229.22:55:41.84#ibcon#about to read 4, iclass 33, count 0 2006.229.22:55:41.84#ibcon#read 4, iclass 33, count 0 2006.229.22:55:41.84#ibcon#about to read 5, iclass 33, count 0 2006.229.22:55:41.84#ibcon#read 5, iclass 33, count 0 2006.229.22:55:41.84#ibcon#about to read 6, iclass 33, count 0 2006.229.22:55:41.84#ibcon#read 6, iclass 33, count 0 2006.229.22:55:41.84#ibcon#end of sib2, iclass 33, count 0 2006.229.22:55:41.84#ibcon#*mode == 0, iclass 33, count 0 2006.229.22:55:41.84#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.22:55:41.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:55:41.84#ibcon#*before write, iclass 33, count 0 2006.229.22:55:41.84#ibcon#enter sib2, iclass 33, count 0 2006.229.22:55:41.84#ibcon#flushed, iclass 33, count 0 2006.229.22:55:41.84#ibcon#about to write, iclass 33, count 0 2006.229.22:55:41.84#ibcon#wrote, iclass 33, count 0 2006.229.22:55:41.84#ibcon#about to read 3, iclass 33, count 0 2006.229.22:55:41.88#ibcon#read 3, iclass 33, count 0 2006.229.22:55:41.88#ibcon#about to read 4, iclass 33, count 0 2006.229.22:55:41.88#ibcon#read 4, iclass 33, count 0 2006.229.22:55:41.88#ibcon#about to read 5, iclass 33, count 0 2006.229.22:55:41.88#ibcon#read 5, iclass 33, count 0 2006.229.22:55:41.88#ibcon#about to read 6, iclass 33, count 0 2006.229.22:55:41.88#ibcon#read 6, iclass 33, count 0 2006.229.22:55:41.88#ibcon#end of sib2, iclass 33, count 0 2006.229.22:55:41.88#ibcon#*after write, iclass 33, count 0 2006.229.22:55:41.88#ibcon#*before return 0, iclass 33, count 0 2006.229.22:55:41.88#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:55:41.88#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.22:55:41.88#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.22:55:41.88#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.22:55:41.88$vck44/vb=7,4 2006.229.22:55:41.88#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.22:55:41.88#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.22:55:41.88#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:41.88#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:41.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:41.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:41.94#ibcon#enter wrdev, iclass 35, count 2 2006.229.22:55:41.94#ibcon#first serial, iclass 35, count 2 2006.229.22:55:41.94#ibcon#enter sib2, iclass 35, count 2 2006.229.22:55:41.94#ibcon#flushed, iclass 35, count 2 2006.229.22:55:41.94#ibcon#about to write, iclass 35, count 2 2006.229.22:55:41.94#ibcon#wrote, iclass 35, count 2 2006.229.22:55:41.94#ibcon#about to read 3, iclass 35, count 2 2006.229.22:55:41.96#ibcon#read 3, iclass 35, count 2 2006.229.22:55:41.96#ibcon#about to read 4, iclass 35, count 2 2006.229.22:55:41.96#ibcon#read 4, iclass 35, count 2 2006.229.22:55:41.96#ibcon#about to read 5, iclass 35, count 2 2006.229.22:55:41.96#ibcon#read 5, iclass 35, count 2 2006.229.22:55:41.96#ibcon#about to read 6, iclass 35, count 2 2006.229.22:55:41.96#ibcon#read 6, iclass 35, count 2 2006.229.22:55:41.96#ibcon#end of sib2, iclass 35, count 2 2006.229.22:55:41.96#ibcon#*mode == 0, iclass 35, count 2 2006.229.22:55:41.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.22:55:41.96#ibcon#[27=AT07-04\r\n] 2006.229.22:55:41.96#ibcon#*before write, iclass 35, count 2 2006.229.22:55:41.96#ibcon#enter sib2, iclass 35, count 2 2006.229.22:55:41.96#ibcon#flushed, iclass 35, count 2 2006.229.22:55:41.96#ibcon#about to write, iclass 35, count 2 2006.229.22:55:41.96#ibcon#wrote, iclass 35, count 2 2006.229.22:55:41.96#ibcon#about to read 3, iclass 35, count 2 2006.229.22:55:41.99#ibcon#read 3, iclass 35, count 2 2006.229.22:55:41.99#ibcon#about to read 4, iclass 35, count 2 2006.229.22:55:41.99#ibcon#read 4, iclass 35, count 2 2006.229.22:55:41.99#ibcon#about to read 5, iclass 35, count 2 2006.229.22:55:41.99#ibcon#read 5, iclass 35, count 2 2006.229.22:55:41.99#ibcon#about to read 6, iclass 35, count 2 2006.229.22:55:41.99#ibcon#read 6, iclass 35, count 2 2006.229.22:55:41.99#ibcon#end of sib2, iclass 35, count 2 2006.229.22:55:41.99#ibcon#*after write, iclass 35, count 2 2006.229.22:55:41.99#ibcon#*before return 0, iclass 35, count 2 2006.229.22:55:41.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:41.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.22:55:41.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.22:55:41.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:41.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:42.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:42.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:42.11#ibcon#enter wrdev, iclass 35, count 0 2006.229.22:55:42.11#ibcon#first serial, iclass 35, count 0 2006.229.22:55:42.11#ibcon#enter sib2, iclass 35, count 0 2006.229.22:55:42.11#ibcon#flushed, iclass 35, count 0 2006.229.22:55:42.11#ibcon#about to write, iclass 35, count 0 2006.229.22:55:42.11#ibcon#wrote, iclass 35, count 0 2006.229.22:55:42.11#ibcon#about to read 3, iclass 35, count 0 2006.229.22:55:42.13#ibcon#read 3, iclass 35, count 0 2006.229.22:55:42.13#ibcon#about to read 4, iclass 35, count 0 2006.229.22:55:42.13#ibcon#read 4, iclass 35, count 0 2006.229.22:55:42.13#ibcon#about to read 5, iclass 35, count 0 2006.229.22:55:42.13#ibcon#read 5, iclass 35, count 0 2006.229.22:55:42.13#ibcon#about to read 6, iclass 35, count 0 2006.229.22:55:42.13#ibcon#read 6, iclass 35, count 0 2006.229.22:55:42.13#ibcon#end of sib2, iclass 35, count 0 2006.229.22:55:42.13#ibcon#*mode == 0, iclass 35, count 0 2006.229.22:55:42.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.22:55:42.13#ibcon#[27=USB\r\n] 2006.229.22:55:42.13#ibcon#*before write, iclass 35, count 0 2006.229.22:55:42.13#ibcon#enter sib2, iclass 35, count 0 2006.229.22:55:42.13#ibcon#flushed, iclass 35, count 0 2006.229.22:55:42.13#ibcon#about to write, iclass 35, count 0 2006.229.22:55:42.13#ibcon#wrote, iclass 35, count 0 2006.229.22:55:42.13#ibcon#about to read 3, iclass 35, count 0 2006.229.22:55:42.16#ibcon#read 3, iclass 35, count 0 2006.229.22:55:42.16#ibcon#about to read 4, iclass 35, count 0 2006.229.22:55:42.16#ibcon#read 4, iclass 35, count 0 2006.229.22:55:42.16#ibcon#about to read 5, iclass 35, count 0 2006.229.22:55:42.16#ibcon#read 5, iclass 35, count 0 2006.229.22:55:42.16#ibcon#about to read 6, iclass 35, count 0 2006.229.22:55:42.16#ibcon#read 6, iclass 35, count 0 2006.229.22:55:42.16#ibcon#end of sib2, iclass 35, count 0 2006.229.22:55:42.16#ibcon#*after write, iclass 35, count 0 2006.229.22:55:42.16#ibcon#*before return 0, iclass 35, count 0 2006.229.22:55:42.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:42.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.22:55:42.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.22:55:42.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.22:55:42.16$vck44/vblo=8,744.99 2006.229.22:55:42.16#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.22:55:42.16#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.22:55:42.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:55:42.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:42.16#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:42.16#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:42.16#ibcon#enter wrdev, iclass 37, count 0 2006.229.22:55:42.16#ibcon#first serial, iclass 37, count 0 2006.229.22:55:42.16#ibcon#enter sib2, iclass 37, count 0 2006.229.22:55:42.16#ibcon#flushed, iclass 37, count 0 2006.229.22:55:42.16#ibcon#about to write, iclass 37, count 0 2006.229.22:55:42.16#ibcon#wrote, iclass 37, count 0 2006.229.22:55:42.16#ibcon#about to read 3, iclass 37, count 0 2006.229.22:55:42.18#ibcon#read 3, iclass 37, count 0 2006.229.22:55:42.18#ibcon#about to read 4, iclass 37, count 0 2006.229.22:55:42.18#ibcon#read 4, iclass 37, count 0 2006.229.22:55:42.18#ibcon#about to read 5, iclass 37, count 0 2006.229.22:55:42.18#ibcon#read 5, iclass 37, count 0 2006.229.22:55:42.18#ibcon#about to read 6, iclass 37, count 0 2006.229.22:55:42.18#ibcon#read 6, iclass 37, count 0 2006.229.22:55:42.18#ibcon#end of sib2, iclass 37, count 0 2006.229.22:55:42.18#ibcon#*mode == 0, iclass 37, count 0 2006.229.22:55:42.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.22:55:42.18#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:55:42.18#ibcon#*before write, iclass 37, count 0 2006.229.22:55:42.18#ibcon#enter sib2, iclass 37, count 0 2006.229.22:55:42.18#ibcon#flushed, iclass 37, count 0 2006.229.22:55:42.18#ibcon#about to write, iclass 37, count 0 2006.229.22:55:42.18#ibcon#wrote, iclass 37, count 0 2006.229.22:55:42.18#ibcon#about to read 3, iclass 37, count 0 2006.229.22:55:42.22#ibcon#read 3, iclass 37, count 0 2006.229.22:55:42.22#ibcon#about to read 4, iclass 37, count 0 2006.229.22:55:42.22#ibcon#read 4, iclass 37, count 0 2006.229.22:55:42.22#ibcon#about to read 5, iclass 37, count 0 2006.229.22:55:42.22#ibcon#read 5, iclass 37, count 0 2006.229.22:55:42.22#ibcon#about to read 6, iclass 37, count 0 2006.229.22:55:42.22#ibcon#read 6, iclass 37, count 0 2006.229.22:55:42.22#ibcon#end of sib2, iclass 37, count 0 2006.229.22:55:42.22#ibcon#*after write, iclass 37, count 0 2006.229.22:55:42.22#ibcon#*before return 0, iclass 37, count 0 2006.229.22:55:42.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:42.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.22:55:42.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.22:55:42.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.22:55:42.22$vck44/vb=8,4 2006.229.22:55:42.22#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.22:55:42.22#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.22:55:42.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:55:42.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:42.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:42.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:42.28#ibcon#enter wrdev, iclass 39, count 2 2006.229.22:55:42.28#ibcon#first serial, iclass 39, count 2 2006.229.22:55:42.28#ibcon#enter sib2, iclass 39, count 2 2006.229.22:55:42.28#ibcon#flushed, iclass 39, count 2 2006.229.22:55:42.28#ibcon#about to write, iclass 39, count 2 2006.229.22:55:42.28#ibcon#wrote, iclass 39, count 2 2006.229.22:55:42.28#ibcon#about to read 3, iclass 39, count 2 2006.229.22:55:42.30#ibcon#read 3, iclass 39, count 2 2006.229.22:55:42.30#ibcon#about to read 4, iclass 39, count 2 2006.229.22:55:42.30#ibcon#read 4, iclass 39, count 2 2006.229.22:55:42.30#ibcon#about to read 5, iclass 39, count 2 2006.229.22:55:42.30#ibcon#read 5, iclass 39, count 2 2006.229.22:55:42.30#ibcon#about to read 6, iclass 39, count 2 2006.229.22:55:42.30#ibcon#read 6, iclass 39, count 2 2006.229.22:55:42.30#ibcon#end of sib2, iclass 39, count 2 2006.229.22:55:42.30#ibcon#*mode == 0, iclass 39, count 2 2006.229.22:55:42.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.22:55:42.30#ibcon#[27=AT08-04\r\n] 2006.229.22:55:42.30#ibcon#*before write, iclass 39, count 2 2006.229.22:55:42.30#ibcon#enter sib2, iclass 39, count 2 2006.229.22:55:42.30#ibcon#flushed, iclass 39, count 2 2006.229.22:55:42.30#ibcon#about to write, iclass 39, count 2 2006.229.22:55:42.30#ibcon#wrote, iclass 39, count 2 2006.229.22:55:42.30#ibcon#about to read 3, iclass 39, count 2 2006.229.22:55:42.33#ibcon#read 3, iclass 39, count 2 2006.229.22:55:42.33#ibcon#about to read 4, iclass 39, count 2 2006.229.22:55:42.33#ibcon#read 4, iclass 39, count 2 2006.229.22:55:42.33#ibcon#about to read 5, iclass 39, count 2 2006.229.22:55:42.33#ibcon#read 5, iclass 39, count 2 2006.229.22:55:42.33#ibcon#about to read 6, iclass 39, count 2 2006.229.22:55:42.33#ibcon#read 6, iclass 39, count 2 2006.229.22:55:42.33#ibcon#end of sib2, iclass 39, count 2 2006.229.22:55:42.33#ibcon#*after write, iclass 39, count 2 2006.229.22:55:42.33#ibcon#*before return 0, iclass 39, count 2 2006.229.22:55:42.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:42.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.22:55:42.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.22:55:42.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:55:42.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:42.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:42.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:42.45#ibcon#enter wrdev, iclass 39, count 0 2006.229.22:55:42.45#ibcon#first serial, iclass 39, count 0 2006.229.22:55:42.45#ibcon#enter sib2, iclass 39, count 0 2006.229.22:55:42.45#ibcon#flushed, iclass 39, count 0 2006.229.22:55:42.45#ibcon#about to write, iclass 39, count 0 2006.229.22:55:42.45#ibcon#wrote, iclass 39, count 0 2006.229.22:55:42.45#ibcon#about to read 3, iclass 39, count 0 2006.229.22:55:42.47#ibcon#read 3, iclass 39, count 0 2006.229.22:55:42.47#ibcon#about to read 4, iclass 39, count 0 2006.229.22:55:42.47#ibcon#read 4, iclass 39, count 0 2006.229.22:55:42.47#ibcon#about to read 5, iclass 39, count 0 2006.229.22:55:42.47#ibcon#read 5, iclass 39, count 0 2006.229.22:55:42.47#ibcon#about to read 6, iclass 39, count 0 2006.229.22:55:42.47#ibcon#read 6, iclass 39, count 0 2006.229.22:55:42.47#ibcon#end of sib2, iclass 39, count 0 2006.229.22:55:42.47#ibcon#*mode == 0, iclass 39, count 0 2006.229.22:55:42.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.22:55:42.47#ibcon#[27=USB\r\n] 2006.229.22:55:42.47#ibcon#*before write, iclass 39, count 0 2006.229.22:55:42.47#ibcon#enter sib2, iclass 39, count 0 2006.229.22:55:42.47#ibcon#flushed, iclass 39, count 0 2006.229.22:55:42.47#ibcon#about to write, iclass 39, count 0 2006.229.22:55:42.47#ibcon#wrote, iclass 39, count 0 2006.229.22:55:42.47#ibcon#about to read 3, iclass 39, count 0 2006.229.22:55:42.50#ibcon#read 3, iclass 39, count 0 2006.229.22:55:42.50#ibcon#about to read 4, iclass 39, count 0 2006.229.22:55:42.50#ibcon#read 4, iclass 39, count 0 2006.229.22:55:42.50#ibcon#about to read 5, iclass 39, count 0 2006.229.22:55:42.50#ibcon#read 5, iclass 39, count 0 2006.229.22:55:42.50#ibcon#about to read 6, iclass 39, count 0 2006.229.22:55:42.50#ibcon#read 6, iclass 39, count 0 2006.229.22:55:42.50#ibcon#end of sib2, iclass 39, count 0 2006.229.22:55:42.50#ibcon#*after write, iclass 39, count 0 2006.229.22:55:42.50#ibcon#*before return 0, iclass 39, count 0 2006.229.22:55:42.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:42.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.22:55:42.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.22:55:42.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.22:55:42.50$vck44/vabw=wide 2006.229.22:55:42.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.22:55:42.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.22:55:42.50#ibcon#ireg 8 cls_cnt 0 2006.229.22:55:42.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:42.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:42.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:42.50#ibcon#enter wrdev, iclass 3, count 0 2006.229.22:55:42.50#ibcon#first serial, iclass 3, count 0 2006.229.22:55:42.50#ibcon#enter sib2, iclass 3, count 0 2006.229.22:55:42.50#ibcon#flushed, iclass 3, count 0 2006.229.22:55:42.50#ibcon#about to write, iclass 3, count 0 2006.229.22:55:42.50#ibcon#wrote, iclass 3, count 0 2006.229.22:55:42.50#ibcon#about to read 3, iclass 3, count 0 2006.229.22:55:42.52#ibcon#read 3, iclass 3, count 0 2006.229.22:55:42.52#ibcon#about to read 4, iclass 3, count 0 2006.229.22:55:42.52#ibcon#read 4, iclass 3, count 0 2006.229.22:55:42.52#ibcon#about to read 5, iclass 3, count 0 2006.229.22:55:42.52#ibcon#read 5, iclass 3, count 0 2006.229.22:55:42.52#ibcon#about to read 6, iclass 3, count 0 2006.229.22:55:42.52#ibcon#read 6, iclass 3, count 0 2006.229.22:55:42.52#ibcon#end of sib2, iclass 3, count 0 2006.229.22:55:42.52#ibcon#*mode == 0, iclass 3, count 0 2006.229.22:55:42.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.22:55:42.52#ibcon#[25=BW32\r\n] 2006.229.22:55:42.52#ibcon#*before write, iclass 3, count 0 2006.229.22:55:42.52#ibcon#enter sib2, iclass 3, count 0 2006.229.22:55:42.52#ibcon#flushed, iclass 3, count 0 2006.229.22:55:42.52#ibcon#about to write, iclass 3, count 0 2006.229.22:55:42.52#ibcon#wrote, iclass 3, count 0 2006.229.22:55:42.52#ibcon#about to read 3, iclass 3, count 0 2006.229.22:55:42.55#ibcon#read 3, iclass 3, count 0 2006.229.22:55:42.55#ibcon#about to read 4, iclass 3, count 0 2006.229.22:55:42.55#ibcon#read 4, iclass 3, count 0 2006.229.22:55:42.55#ibcon#about to read 5, iclass 3, count 0 2006.229.22:55:42.55#ibcon#read 5, iclass 3, count 0 2006.229.22:55:42.55#ibcon#about to read 6, iclass 3, count 0 2006.229.22:55:42.55#ibcon#read 6, iclass 3, count 0 2006.229.22:55:42.55#ibcon#end of sib2, iclass 3, count 0 2006.229.22:55:42.55#ibcon#*after write, iclass 3, count 0 2006.229.22:55:42.55#ibcon#*before return 0, iclass 3, count 0 2006.229.22:55:42.55#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:42.55#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.22:55:42.55#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.22:55:42.55#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.22:55:42.55$vck44/vbbw=wide 2006.229.22:55:42.55#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:55:42.55#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:55:42.55#ibcon#ireg 8 cls_cnt 0 2006.229.22:55:42.55#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:55:42.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:55:42.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:55:42.62#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:55:42.62#ibcon#first serial, iclass 5, count 0 2006.229.22:55:42.62#ibcon#enter sib2, iclass 5, count 0 2006.229.22:55:42.62#ibcon#flushed, iclass 5, count 0 2006.229.22:55:42.62#ibcon#about to write, iclass 5, count 0 2006.229.22:55:42.62#ibcon#wrote, iclass 5, count 0 2006.229.22:55:42.62#ibcon#about to read 3, iclass 5, count 0 2006.229.22:55:42.64#ibcon#read 3, iclass 5, count 0 2006.229.22:55:42.64#ibcon#about to read 4, iclass 5, count 0 2006.229.22:55:42.64#ibcon#read 4, iclass 5, count 0 2006.229.22:55:42.64#ibcon#about to read 5, iclass 5, count 0 2006.229.22:55:42.64#ibcon#read 5, iclass 5, count 0 2006.229.22:55:42.64#ibcon#about to read 6, iclass 5, count 0 2006.229.22:55:42.64#ibcon#read 6, iclass 5, count 0 2006.229.22:55:42.64#ibcon#end of sib2, iclass 5, count 0 2006.229.22:55:42.64#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:55:42.64#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:55:42.64#ibcon#[27=BW32\r\n] 2006.229.22:55:42.64#ibcon#*before write, iclass 5, count 0 2006.229.22:55:42.64#ibcon#enter sib2, iclass 5, count 0 2006.229.22:55:42.64#ibcon#flushed, iclass 5, count 0 2006.229.22:55:42.64#ibcon#about to write, iclass 5, count 0 2006.229.22:55:42.64#ibcon#wrote, iclass 5, count 0 2006.229.22:55:42.64#ibcon#about to read 3, iclass 5, count 0 2006.229.22:55:42.67#ibcon#read 3, iclass 5, count 0 2006.229.22:55:42.67#ibcon#about to read 4, iclass 5, count 0 2006.229.22:55:42.67#ibcon#read 4, iclass 5, count 0 2006.229.22:55:42.67#ibcon#about to read 5, iclass 5, count 0 2006.229.22:55:42.67#ibcon#read 5, iclass 5, count 0 2006.229.22:55:42.67#ibcon#about to read 6, iclass 5, count 0 2006.229.22:55:42.67#ibcon#read 6, iclass 5, count 0 2006.229.22:55:42.67#ibcon#end of sib2, iclass 5, count 0 2006.229.22:55:42.67#ibcon#*after write, iclass 5, count 0 2006.229.22:55:42.67#ibcon#*before return 0, iclass 5, count 0 2006.229.22:55:42.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:55:42.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:55:42.67#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:55:42.67#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:55:42.67$setupk4/ifdk4 2006.229.22:55:42.67$ifdk4/lo= 2006.229.22:55:42.67$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:55:42.67$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:55:42.67$ifdk4/patch= 2006.229.22:55:42.67$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:55:42.67$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:55:42.67$setupk4/!*+20s 2006.229.22:55:48.95#abcon#<5=/09 1.7 5.7 29.25 841002.6\r\n> 2006.229.22:55:48.97#abcon#{5=INTERFACE CLEAR} 2006.229.22:55:49.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:55:57.18$setupk4/"tpicd 2006.229.22:55:57.18$setupk4/echo=off 2006.229.22:55:57.18$setupk4/xlog=off 2006.229.22:55:57.18:!2006.229.22:57:28 2006.229.22:56:25.14#trakl#Source acquired 2006.229.22:56:26.14#flagr#flagr/antenna,acquired 2006.229.22:57:28.00:preob 2006.229.22:57:28.14/onsource/TRACKING 2006.229.22:57:28.14:!2006.229.22:57:38 2006.229.22:57:38.00:"tape 2006.229.22:57:38.00:"st=record 2006.229.22:57:38.00:data_valid=on 2006.229.22:57:38.00:midob 2006.229.22:57:38.14/onsource/TRACKING 2006.229.22:57:38.14/wx/29.30,1002.6,86 2006.229.22:57:38.37/cable/+6.4151E-03 2006.229.22:57:39.46/va/01,08,usb,yes,29,31 2006.229.22:57:39.46/va/02,07,usb,yes,31,32 2006.229.22:57:39.46/va/03,06,usb,yes,39,41 2006.229.22:57:39.46/va/04,07,usb,yes,32,34 2006.229.22:57:39.46/va/05,04,usb,yes,29,29 2006.229.22:57:39.46/va/06,04,usb,yes,32,32 2006.229.22:57:39.46/va/07,05,usb,yes,29,29 2006.229.22:57:39.46/va/08,06,usb,yes,21,26 2006.229.22:57:39.69/valo/01,524.99,yes,locked 2006.229.22:57:39.69/valo/02,534.99,yes,locked 2006.229.22:57:39.69/valo/03,564.99,yes,locked 2006.229.22:57:39.69/valo/04,624.99,yes,locked 2006.229.22:57:39.69/valo/05,734.99,yes,locked 2006.229.22:57:39.69/valo/06,814.99,yes,locked 2006.229.22:57:39.69/valo/07,864.99,yes,locked 2006.229.22:57:39.69/valo/08,884.99,yes,locked 2006.229.22:57:40.78/vb/01,04,usb,yes,31,28 2006.229.22:57:40.78/vb/02,04,usb,yes,33,33 2006.229.22:57:40.78/vb/03,04,usb,yes,30,33 2006.229.22:57:40.78/vb/04,04,usb,yes,34,33 2006.229.22:57:40.78/vb/05,04,usb,yes,27,29 2006.229.22:57:40.78/vb/06,04,usb,yes,31,27 2006.229.22:57:40.78/vb/07,04,usb,yes,31,31 2006.229.22:57:40.78/vb/08,04,usb,yes,28,32 2006.229.22:57:41.02/vblo/01,629.99,yes,locked 2006.229.22:57:41.02/vblo/02,634.99,yes,locked 2006.229.22:57:41.02/vblo/03,649.99,yes,locked 2006.229.22:57:41.02/vblo/04,679.99,yes,locked 2006.229.22:57:41.02/vblo/05,709.99,yes,locked 2006.229.22:57:41.02/vblo/06,719.99,yes,locked 2006.229.22:57:41.02/vblo/07,734.99,yes,locked 2006.229.22:57:41.02/vblo/08,744.99,yes,locked 2006.229.22:57:41.17/vabw/8 2006.229.22:57:41.32/vbbw/8 2006.229.22:57:41.41/xfe/off,on,12.0 2006.229.22:57:41.80/ifatt/23,28,28,28 2006.229.22:57:42.08/fmout-gps/S +4.55E-07 2006.229.22:57:42.12:!2006.229.22:58:28 2006.229.22:58:28.00:data_valid=off 2006.229.22:58:28.00:"et 2006.229.22:58:28.00:!+3s 2006.229.22:58:31.01:"tape 2006.229.22:58:31.01:postob 2006.229.22:58:31.17/cable/+6.4155E-03 2006.229.22:58:31.17/wx/29.36,1002.6,84 2006.229.22:58:32.08/fmout-gps/S +4.55E-07 2006.229.22:58:32.08:scan_name=229-2301,jd0608,270 2006.229.22:58:32.08:source=0014+813,001708.47,813508.1,2000.0,ccw 2006.229.22:58:33.14#flagr#flagr/antenna,new-source 2006.229.22:58:33.14:checkk5 2006.229.22:58:33.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.22:58:33.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.22:58:34.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.22:58:34.72/chk_autoobs//k5ts4/ autoobs is running! 2006.229.22:58:35.10/chk_obsdata//k5ts1/T2292257??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:58:35.50/chk_obsdata//k5ts2/T2292257??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:58:35.89/chk_obsdata//k5ts3/T2292257??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:58:36.32/chk_obsdata//k5ts4/T2292257??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.22:58:37.04/k5log//k5ts1_log_newline 2006.229.22:58:37.74/k5log//k5ts2_log_newline 2006.229.22:58:38.45/k5log//k5ts3_log_newline 2006.229.22:58:39.17/k5log//k5ts4_log_newline 2006.229.22:58:39.20/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.22:58:39.20:setupk4=1 2006.229.22:58:39.20$setupk4/echo=on 2006.229.22:58:39.20$setupk4/pcalon 2006.229.22:58:39.20$pcalon/"no phase cal control is implemented here 2006.229.22:58:39.20$setupk4/"tpicd=stop 2006.229.22:58:39.20$setupk4/"rec=synch_on 2006.229.22:58:39.20$setupk4/"rec_mode=128 2006.229.22:58:39.20$setupk4/!* 2006.229.22:58:39.20$setupk4/recpk4 2006.229.22:58:39.20$recpk4/recpatch= 2006.229.22:58:39.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.22:58:39.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.22:58:39.21$setupk4/vck44 2006.229.22:58:39.21$vck44/valo=1,524.99 2006.229.22:58:39.21#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.22:58:39.21#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.22:58:39.21#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:39.21#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:58:39.21#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:58:39.21#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:58:39.21#ibcon#enter wrdev, iclass 6, count 0 2006.229.22:58:39.21#ibcon#first serial, iclass 6, count 0 2006.229.22:58:39.21#ibcon#enter sib2, iclass 6, count 0 2006.229.22:58:39.21#ibcon#flushed, iclass 6, count 0 2006.229.22:58:39.21#ibcon#about to write, iclass 6, count 0 2006.229.22:58:39.21#ibcon#wrote, iclass 6, count 0 2006.229.22:58:39.21#ibcon#about to read 3, iclass 6, count 0 2006.229.22:58:39.23#ibcon#read 3, iclass 6, count 0 2006.229.22:58:39.23#ibcon#about to read 4, iclass 6, count 0 2006.229.22:58:39.23#ibcon#read 4, iclass 6, count 0 2006.229.22:58:39.23#ibcon#about to read 5, iclass 6, count 0 2006.229.22:58:39.23#ibcon#read 5, iclass 6, count 0 2006.229.22:58:39.23#ibcon#about to read 6, iclass 6, count 0 2006.229.22:58:39.23#ibcon#read 6, iclass 6, count 0 2006.229.22:58:39.23#ibcon#end of sib2, iclass 6, count 0 2006.229.22:58:39.23#ibcon#*mode == 0, iclass 6, count 0 2006.229.22:58:39.23#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.22:58:39.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.22:58:39.23#ibcon#*before write, iclass 6, count 0 2006.229.22:58:39.23#ibcon#enter sib2, iclass 6, count 0 2006.229.22:58:39.23#ibcon#flushed, iclass 6, count 0 2006.229.22:58:39.23#ibcon#about to write, iclass 6, count 0 2006.229.22:58:39.23#ibcon#wrote, iclass 6, count 0 2006.229.22:58:39.23#ibcon#about to read 3, iclass 6, count 0 2006.229.22:58:39.28#ibcon#read 3, iclass 6, count 0 2006.229.22:58:39.28#ibcon#about to read 4, iclass 6, count 0 2006.229.22:58:39.28#ibcon#read 4, iclass 6, count 0 2006.229.22:58:39.28#ibcon#about to read 5, iclass 6, count 0 2006.229.22:58:39.28#ibcon#read 5, iclass 6, count 0 2006.229.22:58:39.28#ibcon#about to read 6, iclass 6, count 0 2006.229.22:58:39.28#ibcon#read 6, iclass 6, count 0 2006.229.22:58:39.28#ibcon#end of sib2, iclass 6, count 0 2006.229.22:58:39.28#ibcon#*after write, iclass 6, count 0 2006.229.22:58:39.28#ibcon#*before return 0, iclass 6, count 0 2006.229.22:58:39.28#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:58:39.28#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.22:58:39.28#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.22:58:39.28#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.22:58:39.28$vck44/va=1,8 2006.229.22:58:39.28#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.22:58:39.28#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.22:58:39.28#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:39.28#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:39.28#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:39.28#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:39.28#ibcon#enter wrdev, iclass 10, count 2 2006.229.22:58:39.28#ibcon#first serial, iclass 10, count 2 2006.229.22:58:39.28#ibcon#enter sib2, iclass 10, count 2 2006.229.22:58:39.28#ibcon#flushed, iclass 10, count 2 2006.229.22:58:39.28#ibcon#about to write, iclass 10, count 2 2006.229.22:58:39.28#ibcon#wrote, iclass 10, count 2 2006.229.22:58:39.28#ibcon#about to read 3, iclass 10, count 2 2006.229.22:58:39.30#ibcon#read 3, iclass 10, count 2 2006.229.22:58:39.30#ibcon#about to read 4, iclass 10, count 2 2006.229.22:58:39.30#ibcon#read 4, iclass 10, count 2 2006.229.22:58:39.30#ibcon#about to read 5, iclass 10, count 2 2006.229.22:58:39.30#ibcon#read 5, iclass 10, count 2 2006.229.22:58:39.30#ibcon#about to read 6, iclass 10, count 2 2006.229.22:58:39.30#ibcon#read 6, iclass 10, count 2 2006.229.22:58:39.30#ibcon#end of sib2, iclass 10, count 2 2006.229.22:58:39.30#ibcon#*mode == 0, iclass 10, count 2 2006.229.22:58:39.30#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.22:58:39.30#ibcon#[25=AT01-08\r\n] 2006.229.22:58:39.30#ibcon#*before write, iclass 10, count 2 2006.229.22:58:39.30#ibcon#enter sib2, iclass 10, count 2 2006.229.22:58:39.30#ibcon#flushed, iclass 10, count 2 2006.229.22:58:39.30#ibcon#about to write, iclass 10, count 2 2006.229.22:58:39.30#ibcon#wrote, iclass 10, count 2 2006.229.22:58:39.30#ibcon#about to read 3, iclass 10, count 2 2006.229.22:58:39.33#ibcon#read 3, iclass 10, count 2 2006.229.22:58:39.33#ibcon#about to read 4, iclass 10, count 2 2006.229.22:58:39.33#ibcon#read 4, iclass 10, count 2 2006.229.22:58:39.33#ibcon#about to read 5, iclass 10, count 2 2006.229.22:58:39.33#ibcon#read 5, iclass 10, count 2 2006.229.22:58:39.33#ibcon#about to read 6, iclass 10, count 2 2006.229.22:58:39.33#ibcon#read 6, iclass 10, count 2 2006.229.22:58:39.33#ibcon#end of sib2, iclass 10, count 2 2006.229.22:58:39.33#ibcon#*after write, iclass 10, count 2 2006.229.22:58:39.33#ibcon#*before return 0, iclass 10, count 2 2006.229.22:58:39.33#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:39.33#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:39.33#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.22:58:39.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:39.33#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:39.45#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:39.45#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:39.45#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:58:39.45#ibcon#first serial, iclass 10, count 0 2006.229.22:58:39.45#ibcon#enter sib2, iclass 10, count 0 2006.229.22:58:39.45#ibcon#flushed, iclass 10, count 0 2006.229.22:58:39.45#ibcon#about to write, iclass 10, count 0 2006.229.22:58:39.45#ibcon#wrote, iclass 10, count 0 2006.229.22:58:39.45#ibcon#about to read 3, iclass 10, count 0 2006.229.22:58:39.47#ibcon#read 3, iclass 10, count 0 2006.229.22:58:39.47#ibcon#about to read 4, iclass 10, count 0 2006.229.22:58:39.47#ibcon#read 4, iclass 10, count 0 2006.229.22:58:39.47#ibcon#about to read 5, iclass 10, count 0 2006.229.22:58:39.47#ibcon#read 5, iclass 10, count 0 2006.229.22:58:39.47#ibcon#about to read 6, iclass 10, count 0 2006.229.22:58:39.47#ibcon#read 6, iclass 10, count 0 2006.229.22:58:39.47#ibcon#end of sib2, iclass 10, count 0 2006.229.22:58:39.47#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:58:39.47#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:58:39.47#ibcon#[25=USB\r\n] 2006.229.22:58:39.47#ibcon#*before write, iclass 10, count 0 2006.229.22:58:39.47#ibcon#enter sib2, iclass 10, count 0 2006.229.22:58:39.47#ibcon#flushed, iclass 10, count 0 2006.229.22:58:39.47#ibcon#about to write, iclass 10, count 0 2006.229.22:58:39.47#ibcon#wrote, iclass 10, count 0 2006.229.22:58:39.47#ibcon#about to read 3, iclass 10, count 0 2006.229.22:58:39.50#ibcon#read 3, iclass 10, count 0 2006.229.22:58:39.50#ibcon#about to read 4, iclass 10, count 0 2006.229.22:58:39.50#ibcon#read 4, iclass 10, count 0 2006.229.22:58:39.50#ibcon#about to read 5, iclass 10, count 0 2006.229.22:58:39.50#ibcon#read 5, iclass 10, count 0 2006.229.22:58:39.50#ibcon#about to read 6, iclass 10, count 0 2006.229.22:58:39.50#ibcon#read 6, iclass 10, count 0 2006.229.22:58:39.50#ibcon#end of sib2, iclass 10, count 0 2006.229.22:58:39.50#ibcon#*after write, iclass 10, count 0 2006.229.22:58:39.50#ibcon#*before return 0, iclass 10, count 0 2006.229.22:58:39.50#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:39.50#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:39.50#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:58:39.50#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:58:39.50$vck44/valo=2,534.99 2006.229.22:58:39.50#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.22:58:39.50#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.22:58:39.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:39.50#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:39.50#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:39.50#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:39.50#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:58:39.50#ibcon#first serial, iclass 12, count 0 2006.229.22:58:39.50#ibcon#enter sib2, iclass 12, count 0 2006.229.22:58:39.50#ibcon#flushed, iclass 12, count 0 2006.229.22:58:39.50#ibcon#about to write, iclass 12, count 0 2006.229.22:58:39.50#ibcon#wrote, iclass 12, count 0 2006.229.22:58:39.50#ibcon#about to read 3, iclass 12, count 0 2006.229.22:58:39.52#ibcon#read 3, iclass 12, count 0 2006.229.22:58:39.52#ibcon#about to read 4, iclass 12, count 0 2006.229.22:58:39.52#ibcon#read 4, iclass 12, count 0 2006.229.22:58:39.52#ibcon#about to read 5, iclass 12, count 0 2006.229.22:58:39.52#ibcon#read 5, iclass 12, count 0 2006.229.22:58:39.52#ibcon#about to read 6, iclass 12, count 0 2006.229.22:58:39.52#ibcon#read 6, iclass 12, count 0 2006.229.22:58:39.52#ibcon#end of sib2, iclass 12, count 0 2006.229.22:58:39.52#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:58:39.52#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:58:39.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.22:58:39.52#ibcon#*before write, iclass 12, count 0 2006.229.22:58:39.52#ibcon#enter sib2, iclass 12, count 0 2006.229.22:58:39.52#ibcon#flushed, iclass 12, count 0 2006.229.22:58:39.52#ibcon#about to write, iclass 12, count 0 2006.229.22:58:39.52#ibcon#wrote, iclass 12, count 0 2006.229.22:58:39.52#ibcon#about to read 3, iclass 12, count 0 2006.229.22:58:39.56#ibcon#read 3, iclass 12, count 0 2006.229.22:58:39.56#ibcon#about to read 4, iclass 12, count 0 2006.229.22:58:39.56#ibcon#read 4, iclass 12, count 0 2006.229.22:58:39.56#ibcon#about to read 5, iclass 12, count 0 2006.229.22:58:39.56#ibcon#read 5, iclass 12, count 0 2006.229.22:58:39.56#ibcon#about to read 6, iclass 12, count 0 2006.229.22:58:39.56#ibcon#read 6, iclass 12, count 0 2006.229.22:58:39.56#ibcon#end of sib2, iclass 12, count 0 2006.229.22:58:39.56#ibcon#*after write, iclass 12, count 0 2006.229.22:58:39.56#ibcon#*before return 0, iclass 12, count 0 2006.229.22:58:39.56#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:39.56#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:39.56#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:58:39.56#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:58:39.56$vck44/va=2,7 2006.229.22:58:39.56#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.22:58:39.56#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.22:58:39.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:39.56#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:39.62#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:39.62#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:39.62#ibcon#enter wrdev, iclass 14, count 2 2006.229.22:58:39.62#ibcon#first serial, iclass 14, count 2 2006.229.22:58:39.62#ibcon#enter sib2, iclass 14, count 2 2006.229.22:58:39.62#ibcon#flushed, iclass 14, count 2 2006.229.22:58:39.62#ibcon#about to write, iclass 14, count 2 2006.229.22:58:39.62#ibcon#wrote, iclass 14, count 2 2006.229.22:58:39.62#ibcon#about to read 3, iclass 14, count 2 2006.229.22:58:39.64#ibcon#read 3, iclass 14, count 2 2006.229.22:58:39.64#ibcon#about to read 4, iclass 14, count 2 2006.229.22:58:39.64#ibcon#read 4, iclass 14, count 2 2006.229.22:58:39.64#ibcon#about to read 5, iclass 14, count 2 2006.229.22:58:39.64#ibcon#read 5, iclass 14, count 2 2006.229.22:58:39.64#ibcon#about to read 6, iclass 14, count 2 2006.229.22:58:39.64#ibcon#read 6, iclass 14, count 2 2006.229.22:58:39.64#ibcon#end of sib2, iclass 14, count 2 2006.229.22:58:39.64#ibcon#*mode == 0, iclass 14, count 2 2006.229.22:58:39.64#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.22:58:39.64#ibcon#[25=AT02-07\r\n] 2006.229.22:58:39.64#ibcon#*before write, iclass 14, count 2 2006.229.22:58:39.64#ibcon#enter sib2, iclass 14, count 2 2006.229.22:58:39.64#ibcon#flushed, iclass 14, count 2 2006.229.22:58:39.64#ibcon#about to write, iclass 14, count 2 2006.229.22:58:39.64#ibcon#wrote, iclass 14, count 2 2006.229.22:58:39.64#ibcon#about to read 3, iclass 14, count 2 2006.229.22:58:39.67#ibcon#read 3, iclass 14, count 2 2006.229.22:58:39.67#ibcon#about to read 4, iclass 14, count 2 2006.229.22:58:39.67#ibcon#read 4, iclass 14, count 2 2006.229.22:58:39.67#ibcon#about to read 5, iclass 14, count 2 2006.229.22:58:39.67#ibcon#read 5, iclass 14, count 2 2006.229.22:58:39.67#ibcon#about to read 6, iclass 14, count 2 2006.229.22:58:39.67#ibcon#read 6, iclass 14, count 2 2006.229.22:58:39.67#ibcon#end of sib2, iclass 14, count 2 2006.229.22:58:39.67#ibcon#*after write, iclass 14, count 2 2006.229.22:58:39.67#ibcon#*before return 0, iclass 14, count 2 2006.229.22:58:39.67#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:39.67#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:39.67#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.22:58:39.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:39.67#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:39.79#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:39.79#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:39.79#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:58:39.79#ibcon#first serial, iclass 14, count 0 2006.229.22:58:39.79#ibcon#enter sib2, iclass 14, count 0 2006.229.22:58:39.79#ibcon#flushed, iclass 14, count 0 2006.229.22:58:39.79#ibcon#about to write, iclass 14, count 0 2006.229.22:58:39.79#ibcon#wrote, iclass 14, count 0 2006.229.22:58:39.79#ibcon#about to read 3, iclass 14, count 0 2006.229.22:58:39.81#ibcon#read 3, iclass 14, count 0 2006.229.22:58:39.81#ibcon#about to read 4, iclass 14, count 0 2006.229.22:58:39.81#ibcon#read 4, iclass 14, count 0 2006.229.22:58:39.81#ibcon#about to read 5, iclass 14, count 0 2006.229.22:58:39.81#ibcon#read 5, iclass 14, count 0 2006.229.22:58:39.81#ibcon#about to read 6, iclass 14, count 0 2006.229.22:58:39.81#ibcon#read 6, iclass 14, count 0 2006.229.22:58:39.81#ibcon#end of sib2, iclass 14, count 0 2006.229.22:58:39.81#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:58:39.81#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:58:39.81#ibcon#[25=USB\r\n] 2006.229.22:58:39.81#ibcon#*before write, iclass 14, count 0 2006.229.22:58:39.81#ibcon#enter sib2, iclass 14, count 0 2006.229.22:58:39.81#ibcon#flushed, iclass 14, count 0 2006.229.22:58:39.81#ibcon#about to write, iclass 14, count 0 2006.229.22:58:39.81#ibcon#wrote, iclass 14, count 0 2006.229.22:58:39.81#ibcon#about to read 3, iclass 14, count 0 2006.229.22:58:39.84#ibcon#read 3, iclass 14, count 0 2006.229.22:58:39.84#ibcon#about to read 4, iclass 14, count 0 2006.229.22:58:39.84#ibcon#read 4, iclass 14, count 0 2006.229.22:58:39.84#ibcon#about to read 5, iclass 14, count 0 2006.229.22:58:39.84#ibcon#read 5, iclass 14, count 0 2006.229.22:58:39.84#ibcon#about to read 6, iclass 14, count 0 2006.229.22:58:39.84#ibcon#read 6, iclass 14, count 0 2006.229.22:58:39.84#ibcon#end of sib2, iclass 14, count 0 2006.229.22:58:39.84#ibcon#*after write, iclass 14, count 0 2006.229.22:58:39.84#ibcon#*before return 0, iclass 14, count 0 2006.229.22:58:39.84#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:39.84#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:39.84#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:58:39.84#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:58:39.84$vck44/valo=3,564.99 2006.229.22:58:39.84#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.22:58:39.84#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.22:58:39.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:39.84#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:39.84#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:39.84#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:39.84#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:58:39.84#ibcon#first serial, iclass 16, count 0 2006.229.22:58:39.84#ibcon#enter sib2, iclass 16, count 0 2006.229.22:58:39.84#ibcon#flushed, iclass 16, count 0 2006.229.22:58:39.84#ibcon#about to write, iclass 16, count 0 2006.229.22:58:39.84#ibcon#wrote, iclass 16, count 0 2006.229.22:58:39.84#ibcon#about to read 3, iclass 16, count 0 2006.229.22:58:39.86#ibcon#read 3, iclass 16, count 0 2006.229.22:58:39.86#ibcon#about to read 4, iclass 16, count 0 2006.229.22:58:39.86#ibcon#read 4, iclass 16, count 0 2006.229.22:58:39.86#ibcon#about to read 5, iclass 16, count 0 2006.229.22:58:39.86#ibcon#read 5, iclass 16, count 0 2006.229.22:58:39.86#ibcon#about to read 6, iclass 16, count 0 2006.229.22:58:39.86#ibcon#read 6, iclass 16, count 0 2006.229.22:58:39.86#ibcon#end of sib2, iclass 16, count 0 2006.229.22:58:39.86#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:58:39.86#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:58:39.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.22:58:39.86#ibcon#*before write, iclass 16, count 0 2006.229.22:58:39.86#ibcon#enter sib2, iclass 16, count 0 2006.229.22:58:39.86#ibcon#flushed, iclass 16, count 0 2006.229.22:58:39.86#ibcon#about to write, iclass 16, count 0 2006.229.22:58:39.86#ibcon#wrote, iclass 16, count 0 2006.229.22:58:39.86#ibcon#about to read 3, iclass 16, count 0 2006.229.22:58:39.90#ibcon#read 3, iclass 16, count 0 2006.229.22:58:39.90#ibcon#about to read 4, iclass 16, count 0 2006.229.22:58:39.90#ibcon#read 4, iclass 16, count 0 2006.229.22:58:39.90#ibcon#about to read 5, iclass 16, count 0 2006.229.22:58:39.90#ibcon#read 5, iclass 16, count 0 2006.229.22:58:39.90#ibcon#about to read 6, iclass 16, count 0 2006.229.22:58:39.90#ibcon#read 6, iclass 16, count 0 2006.229.22:58:39.90#ibcon#end of sib2, iclass 16, count 0 2006.229.22:58:39.90#ibcon#*after write, iclass 16, count 0 2006.229.22:58:39.90#ibcon#*before return 0, iclass 16, count 0 2006.229.22:58:39.90#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:39.90#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:39.90#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:58:39.90#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:58:39.90$vck44/va=3,6 2006.229.22:58:39.90#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.22:58:39.90#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.22:58:39.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:39.90#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:39.96#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:39.96#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:39.96#ibcon#enter wrdev, iclass 18, count 2 2006.229.22:58:39.96#ibcon#first serial, iclass 18, count 2 2006.229.22:58:39.96#ibcon#enter sib2, iclass 18, count 2 2006.229.22:58:39.96#ibcon#flushed, iclass 18, count 2 2006.229.22:58:39.96#ibcon#about to write, iclass 18, count 2 2006.229.22:58:39.96#ibcon#wrote, iclass 18, count 2 2006.229.22:58:39.96#ibcon#about to read 3, iclass 18, count 2 2006.229.22:58:39.98#ibcon#read 3, iclass 18, count 2 2006.229.22:58:39.98#ibcon#about to read 4, iclass 18, count 2 2006.229.22:58:39.98#ibcon#read 4, iclass 18, count 2 2006.229.22:58:39.98#ibcon#about to read 5, iclass 18, count 2 2006.229.22:58:39.98#ibcon#read 5, iclass 18, count 2 2006.229.22:58:39.98#ibcon#about to read 6, iclass 18, count 2 2006.229.22:58:39.98#ibcon#read 6, iclass 18, count 2 2006.229.22:58:39.98#ibcon#end of sib2, iclass 18, count 2 2006.229.22:58:39.98#ibcon#*mode == 0, iclass 18, count 2 2006.229.22:58:39.98#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.22:58:39.98#ibcon#[25=AT03-06\r\n] 2006.229.22:58:39.98#ibcon#*before write, iclass 18, count 2 2006.229.22:58:39.98#ibcon#enter sib2, iclass 18, count 2 2006.229.22:58:39.98#ibcon#flushed, iclass 18, count 2 2006.229.22:58:39.98#ibcon#about to write, iclass 18, count 2 2006.229.22:58:39.98#ibcon#wrote, iclass 18, count 2 2006.229.22:58:39.98#ibcon#about to read 3, iclass 18, count 2 2006.229.22:58:40.01#ibcon#read 3, iclass 18, count 2 2006.229.22:58:40.01#ibcon#about to read 4, iclass 18, count 2 2006.229.22:58:40.01#ibcon#read 4, iclass 18, count 2 2006.229.22:58:40.01#ibcon#about to read 5, iclass 18, count 2 2006.229.22:58:40.01#ibcon#read 5, iclass 18, count 2 2006.229.22:58:40.01#ibcon#about to read 6, iclass 18, count 2 2006.229.22:58:40.01#ibcon#read 6, iclass 18, count 2 2006.229.22:58:40.01#ibcon#end of sib2, iclass 18, count 2 2006.229.22:58:40.01#ibcon#*after write, iclass 18, count 2 2006.229.22:58:40.01#ibcon#*before return 0, iclass 18, count 2 2006.229.22:58:40.01#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:40.01#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:40.01#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.22:58:40.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:40.01#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:40.13#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:40.13#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:40.13#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:58:40.13#ibcon#first serial, iclass 18, count 0 2006.229.22:58:40.13#ibcon#enter sib2, iclass 18, count 0 2006.229.22:58:40.13#ibcon#flushed, iclass 18, count 0 2006.229.22:58:40.13#ibcon#about to write, iclass 18, count 0 2006.229.22:58:40.13#ibcon#wrote, iclass 18, count 0 2006.229.22:58:40.13#ibcon#about to read 3, iclass 18, count 0 2006.229.22:58:40.15#ibcon#read 3, iclass 18, count 0 2006.229.22:58:40.15#ibcon#about to read 4, iclass 18, count 0 2006.229.22:58:40.15#ibcon#read 4, iclass 18, count 0 2006.229.22:58:40.15#ibcon#about to read 5, iclass 18, count 0 2006.229.22:58:40.15#ibcon#read 5, iclass 18, count 0 2006.229.22:58:40.15#ibcon#about to read 6, iclass 18, count 0 2006.229.22:58:40.15#ibcon#read 6, iclass 18, count 0 2006.229.22:58:40.15#ibcon#end of sib2, iclass 18, count 0 2006.229.22:58:40.15#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:58:40.15#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:58:40.15#ibcon#[25=USB\r\n] 2006.229.22:58:40.15#ibcon#*before write, iclass 18, count 0 2006.229.22:58:40.15#ibcon#enter sib2, iclass 18, count 0 2006.229.22:58:40.15#ibcon#flushed, iclass 18, count 0 2006.229.22:58:40.15#ibcon#about to write, iclass 18, count 0 2006.229.22:58:40.15#ibcon#wrote, iclass 18, count 0 2006.229.22:58:40.15#ibcon#about to read 3, iclass 18, count 0 2006.229.22:58:40.18#ibcon#read 3, iclass 18, count 0 2006.229.22:58:40.18#ibcon#about to read 4, iclass 18, count 0 2006.229.22:58:40.18#ibcon#read 4, iclass 18, count 0 2006.229.22:58:40.18#ibcon#about to read 5, iclass 18, count 0 2006.229.22:58:40.18#ibcon#read 5, iclass 18, count 0 2006.229.22:58:40.18#ibcon#about to read 6, iclass 18, count 0 2006.229.22:58:40.18#ibcon#read 6, iclass 18, count 0 2006.229.22:58:40.18#ibcon#end of sib2, iclass 18, count 0 2006.229.22:58:40.18#ibcon#*after write, iclass 18, count 0 2006.229.22:58:40.18#ibcon#*before return 0, iclass 18, count 0 2006.229.22:58:40.18#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:40.18#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:40.18#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:58:40.18#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:58:40.18$vck44/valo=4,624.99 2006.229.22:58:40.18#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.22:58:40.18#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.22:58:40.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:40.18#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:40.18#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:40.18#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:40.18#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:58:40.18#ibcon#first serial, iclass 20, count 0 2006.229.22:58:40.18#ibcon#enter sib2, iclass 20, count 0 2006.229.22:58:40.18#ibcon#flushed, iclass 20, count 0 2006.229.22:58:40.18#ibcon#about to write, iclass 20, count 0 2006.229.22:58:40.18#ibcon#wrote, iclass 20, count 0 2006.229.22:58:40.18#ibcon#about to read 3, iclass 20, count 0 2006.229.22:58:40.20#ibcon#read 3, iclass 20, count 0 2006.229.22:58:40.20#ibcon#about to read 4, iclass 20, count 0 2006.229.22:58:40.20#ibcon#read 4, iclass 20, count 0 2006.229.22:58:40.20#ibcon#about to read 5, iclass 20, count 0 2006.229.22:58:40.20#ibcon#read 5, iclass 20, count 0 2006.229.22:58:40.20#ibcon#about to read 6, iclass 20, count 0 2006.229.22:58:40.20#ibcon#read 6, iclass 20, count 0 2006.229.22:58:40.20#ibcon#end of sib2, iclass 20, count 0 2006.229.22:58:40.20#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:58:40.20#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:58:40.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.22:58:40.20#ibcon#*before write, iclass 20, count 0 2006.229.22:58:40.20#ibcon#enter sib2, iclass 20, count 0 2006.229.22:58:40.20#ibcon#flushed, iclass 20, count 0 2006.229.22:58:40.20#ibcon#about to write, iclass 20, count 0 2006.229.22:58:40.20#ibcon#wrote, iclass 20, count 0 2006.229.22:58:40.20#ibcon#about to read 3, iclass 20, count 0 2006.229.22:58:40.24#ibcon#read 3, iclass 20, count 0 2006.229.22:58:40.24#ibcon#about to read 4, iclass 20, count 0 2006.229.22:58:40.24#ibcon#read 4, iclass 20, count 0 2006.229.22:58:40.24#ibcon#about to read 5, iclass 20, count 0 2006.229.22:58:40.24#ibcon#read 5, iclass 20, count 0 2006.229.22:58:40.24#ibcon#about to read 6, iclass 20, count 0 2006.229.22:58:40.24#ibcon#read 6, iclass 20, count 0 2006.229.22:58:40.24#ibcon#end of sib2, iclass 20, count 0 2006.229.22:58:40.24#ibcon#*after write, iclass 20, count 0 2006.229.22:58:40.24#ibcon#*before return 0, iclass 20, count 0 2006.229.22:58:40.24#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:40.24#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:40.24#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:58:40.24#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:58:40.24$vck44/va=4,7 2006.229.22:58:40.24#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.22:58:40.24#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.22:58:40.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:40.24#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:40.30#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:40.30#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:40.30#ibcon#enter wrdev, iclass 22, count 2 2006.229.22:58:40.30#ibcon#first serial, iclass 22, count 2 2006.229.22:58:40.30#ibcon#enter sib2, iclass 22, count 2 2006.229.22:58:40.30#ibcon#flushed, iclass 22, count 2 2006.229.22:58:40.30#ibcon#about to write, iclass 22, count 2 2006.229.22:58:40.30#ibcon#wrote, iclass 22, count 2 2006.229.22:58:40.30#ibcon#about to read 3, iclass 22, count 2 2006.229.22:58:40.32#ibcon#read 3, iclass 22, count 2 2006.229.22:58:40.32#ibcon#about to read 4, iclass 22, count 2 2006.229.22:58:40.32#ibcon#read 4, iclass 22, count 2 2006.229.22:58:40.32#ibcon#about to read 5, iclass 22, count 2 2006.229.22:58:40.32#ibcon#read 5, iclass 22, count 2 2006.229.22:58:40.32#ibcon#about to read 6, iclass 22, count 2 2006.229.22:58:40.32#ibcon#read 6, iclass 22, count 2 2006.229.22:58:40.32#ibcon#end of sib2, iclass 22, count 2 2006.229.22:58:40.32#ibcon#*mode == 0, iclass 22, count 2 2006.229.22:58:40.32#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.22:58:40.32#ibcon#[25=AT04-07\r\n] 2006.229.22:58:40.32#ibcon#*before write, iclass 22, count 2 2006.229.22:58:40.32#ibcon#enter sib2, iclass 22, count 2 2006.229.22:58:40.32#ibcon#flushed, iclass 22, count 2 2006.229.22:58:40.32#ibcon#about to write, iclass 22, count 2 2006.229.22:58:40.32#ibcon#wrote, iclass 22, count 2 2006.229.22:58:40.32#ibcon#about to read 3, iclass 22, count 2 2006.229.22:58:40.35#ibcon#read 3, iclass 22, count 2 2006.229.22:58:40.35#ibcon#about to read 4, iclass 22, count 2 2006.229.22:58:40.35#ibcon#read 4, iclass 22, count 2 2006.229.22:58:40.35#ibcon#about to read 5, iclass 22, count 2 2006.229.22:58:40.35#ibcon#read 5, iclass 22, count 2 2006.229.22:58:40.35#ibcon#about to read 6, iclass 22, count 2 2006.229.22:58:40.35#ibcon#read 6, iclass 22, count 2 2006.229.22:58:40.35#ibcon#end of sib2, iclass 22, count 2 2006.229.22:58:40.35#ibcon#*after write, iclass 22, count 2 2006.229.22:58:40.35#ibcon#*before return 0, iclass 22, count 2 2006.229.22:58:40.35#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:40.35#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:40.35#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.22:58:40.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:40.35#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:40.47#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:40.47#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:40.47#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:58:40.47#ibcon#first serial, iclass 22, count 0 2006.229.22:58:40.47#ibcon#enter sib2, iclass 22, count 0 2006.229.22:58:40.47#ibcon#flushed, iclass 22, count 0 2006.229.22:58:40.47#ibcon#about to write, iclass 22, count 0 2006.229.22:58:40.47#ibcon#wrote, iclass 22, count 0 2006.229.22:58:40.47#ibcon#about to read 3, iclass 22, count 0 2006.229.22:58:40.49#ibcon#read 3, iclass 22, count 0 2006.229.22:58:40.49#ibcon#about to read 4, iclass 22, count 0 2006.229.22:58:40.49#ibcon#read 4, iclass 22, count 0 2006.229.22:58:40.49#ibcon#about to read 5, iclass 22, count 0 2006.229.22:58:40.49#ibcon#read 5, iclass 22, count 0 2006.229.22:58:40.49#ibcon#about to read 6, iclass 22, count 0 2006.229.22:58:40.49#ibcon#read 6, iclass 22, count 0 2006.229.22:58:40.49#ibcon#end of sib2, iclass 22, count 0 2006.229.22:58:40.49#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:58:40.49#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:58:40.49#ibcon#[25=USB\r\n] 2006.229.22:58:40.49#ibcon#*before write, iclass 22, count 0 2006.229.22:58:40.49#ibcon#enter sib2, iclass 22, count 0 2006.229.22:58:40.49#ibcon#flushed, iclass 22, count 0 2006.229.22:58:40.49#ibcon#about to write, iclass 22, count 0 2006.229.22:58:40.49#ibcon#wrote, iclass 22, count 0 2006.229.22:58:40.49#ibcon#about to read 3, iclass 22, count 0 2006.229.22:58:40.52#ibcon#read 3, iclass 22, count 0 2006.229.22:58:40.52#ibcon#about to read 4, iclass 22, count 0 2006.229.22:58:40.52#ibcon#read 4, iclass 22, count 0 2006.229.22:58:40.52#ibcon#about to read 5, iclass 22, count 0 2006.229.22:58:40.52#ibcon#read 5, iclass 22, count 0 2006.229.22:58:40.52#ibcon#about to read 6, iclass 22, count 0 2006.229.22:58:40.52#ibcon#read 6, iclass 22, count 0 2006.229.22:58:40.52#ibcon#end of sib2, iclass 22, count 0 2006.229.22:58:40.52#ibcon#*after write, iclass 22, count 0 2006.229.22:58:40.52#ibcon#*before return 0, iclass 22, count 0 2006.229.22:58:40.52#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:40.52#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:40.52#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:58:40.52#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:58:40.52$vck44/valo=5,734.99 2006.229.22:58:40.52#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.22:58:40.52#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.22:58:40.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:40.52#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:40.52#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:40.52#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:40.52#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:58:40.52#ibcon#first serial, iclass 24, count 0 2006.229.22:58:40.52#ibcon#enter sib2, iclass 24, count 0 2006.229.22:58:40.52#ibcon#flushed, iclass 24, count 0 2006.229.22:58:40.52#ibcon#about to write, iclass 24, count 0 2006.229.22:58:40.52#ibcon#wrote, iclass 24, count 0 2006.229.22:58:40.52#ibcon#about to read 3, iclass 24, count 0 2006.229.22:58:40.54#ibcon#read 3, iclass 24, count 0 2006.229.22:58:40.54#ibcon#about to read 4, iclass 24, count 0 2006.229.22:58:40.54#ibcon#read 4, iclass 24, count 0 2006.229.22:58:40.54#ibcon#about to read 5, iclass 24, count 0 2006.229.22:58:40.54#ibcon#read 5, iclass 24, count 0 2006.229.22:58:40.54#ibcon#about to read 6, iclass 24, count 0 2006.229.22:58:40.54#ibcon#read 6, iclass 24, count 0 2006.229.22:58:40.54#ibcon#end of sib2, iclass 24, count 0 2006.229.22:58:40.54#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:58:40.54#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:58:40.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.22:58:40.54#ibcon#*before write, iclass 24, count 0 2006.229.22:58:40.54#ibcon#enter sib2, iclass 24, count 0 2006.229.22:58:40.54#ibcon#flushed, iclass 24, count 0 2006.229.22:58:40.54#ibcon#about to write, iclass 24, count 0 2006.229.22:58:40.54#ibcon#wrote, iclass 24, count 0 2006.229.22:58:40.54#ibcon#about to read 3, iclass 24, count 0 2006.229.22:58:40.58#ibcon#read 3, iclass 24, count 0 2006.229.22:58:40.58#ibcon#about to read 4, iclass 24, count 0 2006.229.22:58:40.58#ibcon#read 4, iclass 24, count 0 2006.229.22:58:40.58#ibcon#about to read 5, iclass 24, count 0 2006.229.22:58:40.58#ibcon#read 5, iclass 24, count 0 2006.229.22:58:40.58#ibcon#about to read 6, iclass 24, count 0 2006.229.22:58:40.58#ibcon#read 6, iclass 24, count 0 2006.229.22:58:40.58#ibcon#end of sib2, iclass 24, count 0 2006.229.22:58:40.58#ibcon#*after write, iclass 24, count 0 2006.229.22:58:40.58#ibcon#*before return 0, iclass 24, count 0 2006.229.22:58:40.58#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:40.58#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:40.58#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:58:40.58#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:58:40.58$vck44/va=5,4 2006.229.22:58:40.58#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.22:58:40.58#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.22:58:40.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:40.58#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:40.64#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:40.64#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:40.64#ibcon#enter wrdev, iclass 26, count 2 2006.229.22:58:40.64#ibcon#first serial, iclass 26, count 2 2006.229.22:58:40.64#ibcon#enter sib2, iclass 26, count 2 2006.229.22:58:40.64#ibcon#flushed, iclass 26, count 2 2006.229.22:58:40.64#ibcon#about to write, iclass 26, count 2 2006.229.22:58:40.64#ibcon#wrote, iclass 26, count 2 2006.229.22:58:40.64#ibcon#about to read 3, iclass 26, count 2 2006.229.22:58:40.66#ibcon#read 3, iclass 26, count 2 2006.229.22:58:40.66#ibcon#about to read 4, iclass 26, count 2 2006.229.22:58:40.66#ibcon#read 4, iclass 26, count 2 2006.229.22:58:40.66#ibcon#about to read 5, iclass 26, count 2 2006.229.22:58:40.66#ibcon#read 5, iclass 26, count 2 2006.229.22:58:40.66#ibcon#about to read 6, iclass 26, count 2 2006.229.22:58:40.66#ibcon#read 6, iclass 26, count 2 2006.229.22:58:40.66#ibcon#end of sib2, iclass 26, count 2 2006.229.22:58:40.66#ibcon#*mode == 0, iclass 26, count 2 2006.229.22:58:40.66#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.22:58:40.66#ibcon#[25=AT05-04\r\n] 2006.229.22:58:40.66#ibcon#*before write, iclass 26, count 2 2006.229.22:58:40.66#ibcon#enter sib2, iclass 26, count 2 2006.229.22:58:40.66#ibcon#flushed, iclass 26, count 2 2006.229.22:58:40.66#ibcon#about to write, iclass 26, count 2 2006.229.22:58:40.66#ibcon#wrote, iclass 26, count 2 2006.229.22:58:40.66#ibcon#about to read 3, iclass 26, count 2 2006.229.22:58:40.69#ibcon#read 3, iclass 26, count 2 2006.229.22:58:40.69#ibcon#about to read 4, iclass 26, count 2 2006.229.22:58:40.69#ibcon#read 4, iclass 26, count 2 2006.229.22:58:40.69#ibcon#about to read 5, iclass 26, count 2 2006.229.22:58:40.69#ibcon#read 5, iclass 26, count 2 2006.229.22:58:40.69#ibcon#about to read 6, iclass 26, count 2 2006.229.22:58:40.69#ibcon#read 6, iclass 26, count 2 2006.229.22:58:40.69#ibcon#end of sib2, iclass 26, count 2 2006.229.22:58:40.69#ibcon#*after write, iclass 26, count 2 2006.229.22:58:40.69#ibcon#*before return 0, iclass 26, count 2 2006.229.22:58:40.69#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:40.69#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:40.69#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.22:58:40.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:40.69#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:40.81#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:40.81#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:40.81#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:58:40.81#ibcon#first serial, iclass 26, count 0 2006.229.22:58:40.81#ibcon#enter sib2, iclass 26, count 0 2006.229.22:58:40.81#ibcon#flushed, iclass 26, count 0 2006.229.22:58:40.81#ibcon#about to write, iclass 26, count 0 2006.229.22:58:40.81#ibcon#wrote, iclass 26, count 0 2006.229.22:58:40.81#ibcon#about to read 3, iclass 26, count 0 2006.229.22:58:40.83#ibcon#read 3, iclass 26, count 0 2006.229.22:58:40.83#ibcon#about to read 4, iclass 26, count 0 2006.229.22:58:40.83#ibcon#read 4, iclass 26, count 0 2006.229.22:58:40.83#ibcon#about to read 5, iclass 26, count 0 2006.229.22:58:40.83#ibcon#read 5, iclass 26, count 0 2006.229.22:58:40.83#ibcon#about to read 6, iclass 26, count 0 2006.229.22:58:40.83#ibcon#read 6, iclass 26, count 0 2006.229.22:58:40.83#ibcon#end of sib2, iclass 26, count 0 2006.229.22:58:40.83#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:58:40.83#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:58:40.83#ibcon#[25=USB\r\n] 2006.229.22:58:40.83#ibcon#*before write, iclass 26, count 0 2006.229.22:58:40.83#ibcon#enter sib2, iclass 26, count 0 2006.229.22:58:40.83#ibcon#flushed, iclass 26, count 0 2006.229.22:58:40.83#ibcon#about to write, iclass 26, count 0 2006.229.22:58:40.83#ibcon#wrote, iclass 26, count 0 2006.229.22:58:40.83#ibcon#about to read 3, iclass 26, count 0 2006.229.22:58:40.86#ibcon#read 3, iclass 26, count 0 2006.229.22:58:40.86#ibcon#about to read 4, iclass 26, count 0 2006.229.22:58:40.86#ibcon#read 4, iclass 26, count 0 2006.229.22:58:40.86#ibcon#about to read 5, iclass 26, count 0 2006.229.22:58:40.86#ibcon#read 5, iclass 26, count 0 2006.229.22:58:40.86#ibcon#about to read 6, iclass 26, count 0 2006.229.22:58:40.86#ibcon#read 6, iclass 26, count 0 2006.229.22:58:40.86#ibcon#end of sib2, iclass 26, count 0 2006.229.22:58:40.86#ibcon#*after write, iclass 26, count 0 2006.229.22:58:40.86#ibcon#*before return 0, iclass 26, count 0 2006.229.22:58:40.86#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:40.86#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:40.86#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:58:40.86#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:58:40.86$vck44/valo=6,814.99 2006.229.22:58:40.86#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.22:58:40.86#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.22:58:40.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:40.86#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:40.86#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:40.86#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:40.86#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:58:40.86#ibcon#first serial, iclass 28, count 0 2006.229.22:58:40.86#ibcon#enter sib2, iclass 28, count 0 2006.229.22:58:40.86#ibcon#flushed, iclass 28, count 0 2006.229.22:58:40.86#ibcon#about to write, iclass 28, count 0 2006.229.22:58:40.86#ibcon#wrote, iclass 28, count 0 2006.229.22:58:40.86#ibcon#about to read 3, iclass 28, count 0 2006.229.22:58:40.88#ibcon#read 3, iclass 28, count 0 2006.229.22:58:40.88#ibcon#about to read 4, iclass 28, count 0 2006.229.22:58:40.88#ibcon#read 4, iclass 28, count 0 2006.229.22:58:40.88#ibcon#about to read 5, iclass 28, count 0 2006.229.22:58:40.88#ibcon#read 5, iclass 28, count 0 2006.229.22:58:40.88#ibcon#about to read 6, iclass 28, count 0 2006.229.22:58:40.88#ibcon#read 6, iclass 28, count 0 2006.229.22:58:40.88#ibcon#end of sib2, iclass 28, count 0 2006.229.22:58:40.88#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:58:40.88#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:58:40.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.22:58:40.88#ibcon#*before write, iclass 28, count 0 2006.229.22:58:40.88#ibcon#enter sib2, iclass 28, count 0 2006.229.22:58:40.88#ibcon#flushed, iclass 28, count 0 2006.229.22:58:40.88#ibcon#about to write, iclass 28, count 0 2006.229.22:58:40.88#ibcon#wrote, iclass 28, count 0 2006.229.22:58:40.88#ibcon#about to read 3, iclass 28, count 0 2006.229.22:58:40.92#ibcon#read 3, iclass 28, count 0 2006.229.22:58:40.92#ibcon#about to read 4, iclass 28, count 0 2006.229.22:58:40.92#ibcon#read 4, iclass 28, count 0 2006.229.22:58:40.92#ibcon#about to read 5, iclass 28, count 0 2006.229.22:58:40.92#ibcon#read 5, iclass 28, count 0 2006.229.22:58:40.92#ibcon#about to read 6, iclass 28, count 0 2006.229.22:58:40.92#ibcon#read 6, iclass 28, count 0 2006.229.22:58:40.92#ibcon#end of sib2, iclass 28, count 0 2006.229.22:58:40.92#ibcon#*after write, iclass 28, count 0 2006.229.22:58:40.92#ibcon#*before return 0, iclass 28, count 0 2006.229.22:58:40.92#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:40.92#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:40.92#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:58:40.92#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:58:40.92$vck44/va=6,4 2006.229.22:58:40.92#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.22:58:40.92#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.22:58:40.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:40.92#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:40.98#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:40.98#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:40.98#ibcon#enter wrdev, iclass 30, count 2 2006.229.22:58:40.98#ibcon#first serial, iclass 30, count 2 2006.229.22:58:40.98#ibcon#enter sib2, iclass 30, count 2 2006.229.22:58:40.98#ibcon#flushed, iclass 30, count 2 2006.229.22:58:40.98#ibcon#about to write, iclass 30, count 2 2006.229.22:58:40.98#ibcon#wrote, iclass 30, count 2 2006.229.22:58:40.98#ibcon#about to read 3, iclass 30, count 2 2006.229.22:58:41.00#ibcon#read 3, iclass 30, count 2 2006.229.22:58:41.00#ibcon#about to read 4, iclass 30, count 2 2006.229.22:58:41.00#ibcon#read 4, iclass 30, count 2 2006.229.22:58:41.00#ibcon#about to read 5, iclass 30, count 2 2006.229.22:58:41.00#ibcon#read 5, iclass 30, count 2 2006.229.22:58:41.00#ibcon#about to read 6, iclass 30, count 2 2006.229.22:58:41.00#ibcon#read 6, iclass 30, count 2 2006.229.22:58:41.00#ibcon#end of sib2, iclass 30, count 2 2006.229.22:58:41.00#ibcon#*mode == 0, iclass 30, count 2 2006.229.22:58:41.00#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.22:58:41.00#ibcon#[25=AT06-04\r\n] 2006.229.22:58:41.00#ibcon#*before write, iclass 30, count 2 2006.229.22:58:41.00#ibcon#enter sib2, iclass 30, count 2 2006.229.22:58:41.00#ibcon#flushed, iclass 30, count 2 2006.229.22:58:41.00#ibcon#about to write, iclass 30, count 2 2006.229.22:58:41.00#ibcon#wrote, iclass 30, count 2 2006.229.22:58:41.00#ibcon#about to read 3, iclass 30, count 2 2006.229.22:58:41.03#ibcon#read 3, iclass 30, count 2 2006.229.22:58:41.03#ibcon#about to read 4, iclass 30, count 2 2006.229.22:58:41.03#ibcon#read 4, iclass 30, count 2 2006.229.22:58:41.03#ibcon#about to read 5, iclass 30, count 2 2006.229.22:58:41.03#ibcon#read 5, iclass 30, count 2 2006.229.22:58:41.03#ibcon#about to read 6, iclass 30, count 2 2006.229.22:58:41.03#ibcon#read 6, iclass 30, count 2 2006.229.22:58:41.03#ibcon#end of sib2, iclass 30, count 2 2006.229.22:58:41.03#ibcon#*after write, iclass 30, count 2 2006.229.22:58:41.03#ibcon#*before return 0, iclass 30, count 2 2006.229.22:58:41.03#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:41.03#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:41.03#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.22:58:41.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:41.03#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:41.15#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:41.15#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:41.15#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:58:41.15#ibcon#first serial, iclass 30, count 0 2006.229.22:58:41.15#ibcon#enter sib2, iclass 30, count 0 2006.229.22:58:41.15#ibcon#flushed, iclass 30, count 0 2006.229.22:58:41.15#ibcon#about to write, iclass 30, count 0 2006.229.22:58:41.15#ibcon#wrote, iclass 30, count 0 2006.229.22:58:41.15#ibcon#about to read 3, iclass 30, count 0 2006.229.22:58:41.17#ibcon#read 3, iclass 30, count 0 2006.229.22:58:41.17#ibcon#about to read 4, iclass 30, count 0 2006.229.22:58:41.17#ibcon#read 4, iclass 30, count 0 2006.229.22:58:41.17#ibcon#about to read 5, iclass 30, count 0 2006.229.22:58:41.17#ibcon#read 5, iclass 30, count 0 2006.229.22:58:41.17#ibcon#about to read 6, iclass 30, count 0 2006.229.22:58:41.17#ibcon#read 6, iclass 30, count 0 2006.229.22:58:41.17#ibcon#end of sib2, iclass 30, count 0 2006.229.22:58:41.17#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:58:41.17#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:58:41.17#ibcon#[25=USB\r\n] 2006.229.22:58:41.17#ibcon#*before write, iclass 30, count 0 2006.229.22:58:41.17#ibcon#enter sib2, iclass 30, count 0 2006.229.22:58:41.17#ibcon#flushed, iclass 30, count 0 2006.229.22:58:41.17#ibcon#about to write, iclass 30, count 0 2006.229.22:58:41.17#ibcon#wrote, iclass 30, count 0 2006.229.22:58:41.17#ibcon#about to read 3, iclass 30, count 0 2006.229.22:58:41.20#ibcon#read 3, iclass 30, count 0 2006.229.22:58:41.20#ibcon#about to read 4, iclass 30, count 0 2006.229.22:58:41.20#ibcon#read 4, iclass 30, count 0 2006.229.22:58:41.20#ibcon#about to read 5, iclass 30, count 0 2006.229.22:58:41.20#ibcon#read 5, iclass 30, count 0 2006.229.22:58:41.20#ibcon#about to read 6, iclass 30, count 0 2006.229.22:58:41.20#ibcon#read 6, iclass 30, count 0 2006.229.22:58:41.20#ibcon#end of sib2, iclass 30, count 0 2006.229.22:58:41.20#ibcon#*after write, iclass 30, count 0 2006.229.22:58:41.20#ibcon#*before return 0, iclass 30, count 0 2006.229.22:58:41.20#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:41.20#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:41.20#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:58:41.20#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:58:41.20$vck44/valo=7,864.99 2006.229.22:58:41.20#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.22:58:41.20#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.22:58:41.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:41.20#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:41.20#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:41.20#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:41.20#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:58:41.20#ibcon#first serial, iclass 32, count 0 2006.229.22:58:41.20#ibcon#enter sib2, iclass 32, count 0 2006.229.22:58:41.20#ibcon#flushed, iclass 32, count 0 2006.229.22:58:41.20#ibcon#about to write, iclass 32, count 0 2006.229.22:58:41.20#ibcon#wrote, iclass 32, count 0 2006.229.22:58:41.20#ibcon#about to read 3, iclass 32, count 0 2006.229.22:58:41.23#ibcon#read 3, iclass 32, count 0 2006.229.22:58:41.23#ibcon#about to read 4, iclass 32, count 0 2006.229.22:58:41.23#ibcon#read 4, iclass 32, count 0 2006.229.22:58:41.23#ibcon#about to read 5, iclass 32, count 0 2006.229.22:58:41.23#ibcon#read 5, iclass 32, count 0 2006.229.22:58:41.23#ibcon#about to read 6, iclass 32, count 0 2006.229.22:58:41.23#ibcon#read 6, iclass 32, count 0 2006.229.22:58:41.23#ibcon#end of sib2, iclass 32, count 0 2006.229.22:58:41.23#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:58:41.23#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:58:41.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.22:58:41.23#ibcon#*before write, iclass 32, count 0 2006.229.22:58:41.23#ibcon#enter sib2, iclass 32, count 0 2006.229.22:58:41.23#ibcon#flushed, iclass 32, count 0 2006.229.22:58:41.23#ibcon#about to write, iclass 32, count 0 2006.229.22:58:41.23#ibcon#wrote, iclass 32, count 0 2006.229.22:58:41.23#ibcon#about to read 3, iclass 32, count 0 2006.229.22:58:41.27#ibcon#read 3, iclass 32, count 0 2006.229.22:58:41.27#ibcon#about to read 4, iclass 32, count 0 2006.229.22:58:41.27#ibcon#read 4, iclass 32, count 0 2006.229.22:58:41.27#ibcon#about to read 5, iclass 32, count 0 2006.229.22:58:41.27#ibcon#read 5, iclass 32, count 0 2006.229.22:58:41.27#ibcon#about to read 6, iclass 32, count 0 2006.229.22:58:41.27#ibcon#read 6, iclass 32, count 0 2006.229.22:58:41.27#ibcon#end of sib2, iclass 32, count 0 2006.229.22:58:41.27#ibcon#*after write, iclass 32, count 0 2006.229.22:58:41.27#ibcon#*before return 0, iclass 32, count 0 2006.229.22:58:41.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:41.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:41.27#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:58:41.27#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:58:41.27$vck44/va=7,5 2006.229.22:58:41.27#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.22:58:41.27#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.22:58:41.27#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:41.27#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:41.32#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:41.32#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:41.32#ibcon#enter wrdev, iclass 34, count 2 2006.229.22:58:41.32#ibcon#first serial, iclass 34, count 2 2006.229.22:58:41.32#ibcon#enter sib2, iclass 34, count 2 2006.229.22:58:41.32#ibcon#flushed, iclass 34, count 2 2006.229.22:58:41.32#ibcon#about to write, iclass 34, count 2 2006.229.22:58:41.32#ibcon#wrote, iclass 34, count 2 2006.229.22:58:41.32#ibcon#about to read 3, iclass 34, count 2 2006.229.22:58:41.34#ibcon#read 3, iclass 34, count 2 2006.229.22:58:41.34#ibcon#about to read 4, iclass 34, count 2 2006.229.22:58:41.34#ibcon#read 4, iclass 34, count 2 2006.229.22:58:41.34#ibcon#about to read 5, iclass 34, count 2 2006.229.22:58:41.34#ibcon#read 5, iclass 34, count 2 2006.229.22:58:41.34#ibcon#about to read 6, iclass 34, count 2 2006.229.22:58:41.34#ibcon#read 6, iclass 34, count 2 2006.229.22:58:41.34#ibcon#end of sib2, iclass 34, count 2 2006.229.22:58:41.34#ibcon#*mode == 0, iclass 34, count 2 2006.229.22:58:41.34#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.22:58:41.34#ibcon#[25=AT07-05\r\n] 2006.229.22:58:41.34#ibcon#*before write, iclass 34, count 2 2006.229.22:58:41.34#ibcon#enter sib2, iclass 34, count 2 2006.229.22:58:41.34#ibcon#flushed, iclass 34, count 2 2006.229.22:58:41.34#ibcon#about to write, iclass 34, count 2 2006.229.22:58:41.34#ibcon#wrote, iclass 34, count 2 2006.229.22:58:41.34#ibcon#about to read 3, iclass 34, count 2 2006.229.22:58:41.37#ibcon#read 3, iclass 34, count 2 2006.229.22:58:41.37#ibcon#about to read 4, iclass 34, count 2 2006.229.22:58:41.37#ibcon#read 4, iclass 34, count 2 2006.229.22:58:41.37#ibcon#about to read 5, iclass 34, count 2 2006.229.22:58:41.37#ibcon#read 5, iclass 34, count 2 2006.229.22:58:41.37#ibcon#about to read 6, iclass 34, count 2 2006.229.22:58:41.37#ibcon#read 6, iclass 34, count 2 2006.229.22:58:41.37#ibcon#end of sib2, iclass 34, count 2 2006.229.22:58:41.37#ibcon#*after write, iclass 34, count 2 2006.229.22:58:41.37#ibcon#*before return 0, iclass 34, count 2 2006.229.22:58:41.37#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:41.37#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:41.37#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.22:58:41.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:41.37#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:41.49#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:41.49#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:41.49#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:58:41.49#ibcon#first serial, iclass 34, count 0 2006.229.22:58:41.49#ibcon#enter sib2, iclass 34, count 0 2006.229.22:58:41.49#ibcon#flushed, iclass 34, count 0 2006.229.22:58:41.49#ibcon#about to write, iclass 34, count 0 2006.229.22:58:41.49#ibcon#wrote, iclass 34, count 0 2006.229.22:58:41.49#ibcon#about to read 3, iclass 34, count 0 2006.229.22:58:41.51#ibcon#read 3, iclass 34, count 0 2006.229.22:58:41.51#ibcon#about to read 4, iclass 34, count 0 2006.229.22:58:41.51#ibcon#read 4, iclass 34, count 0 2006.229.22:58:41.51#ibcon#about to read 5, iclass 34, count 0 2006.229.22:58:41.51#ibcon#read 5, iclass 34, count 0 2006.229.22:58:41.51#ibcon#about to read 6, iclass 34, count 0 2006.229.22:58:41.51#ibcon#read 6, iclass 34, count 0 2006.229.22:58:41.51#ibcon#end of sib2, iclass 34, count 0 2006.229.22:58:41.51#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:58:41.51#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:58:41.51#ibcon#[25=USB\r\n] 2006.229.22:58:41.51#ibcon#*before write, iclass 34, count 0 2006.229.22:58:41.51#ibcon#enter sib2, iclass 34, count 0 2006.229.22:58:41.51#ibcon#flushed, iclass 34, count 0 2006.229.22:58:41.51#ibcon#about to write, iclass 34, count 0 2006.229.22:58:41.51#ibcon#wrote, iclass 34, count 0 2006.229.22:58:41.51#ibcon#about to read 3, iclass 34, count 0 2006.229.22:58:41.54#ibcon#read 3, iclass 34, count 0 2006.229.22:58:41.54#ibcon#about to read 4, iclass 34, count 0 2006.229.22:58:41.54#ibcon#read 4, iclass 34, count 0 2006.229.22:58:41.54#ibcon#about to read 5, iclass 34, count 0 2006.229.22:58:41.54#ibcon#read 5, iclass 34, count 0 2006.229.22:58:41.54#ibcon#about to read 6, iclass 34, count 0 2006.229.22:58:41.54#ibcon#read 6, iclass 34, count 0 2006.229.22:58:41.54#ibcon#end of sib2, iclass 34, count 0 2006.229.22:58:41.54#ibcon#*after write, iclass 34, count 0 2006.229.22:58:41.54#ibcon#*before return 0, iclass 34, count 0 2006.229.22:58:41.54#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:41.54#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:41.54#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:58:41.54#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:58:41.54$vck44/valo=8,884.99 2006.229.22:58:41.54#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.22:58:41.54#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.22:58:41.54#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:41.54#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:41.54#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:41.54#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:41.54#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:58:41.54#ibcon#first serial, iclass 36, count 0 2006.229.22:58:41.54#ibcon#enter sib2, iclass 36, count 0 2006.229.22:58:41.54#ibcon#flushed, iclass 36, count 0 2006.229.22:58:41.54#ibcon#about to write, iclass 36, count 0 2006.229.22:58:41.54#ibcon#wrote, iclass 36, count 0 2006.229.22:58:41.54#ibcon#about to read 3, iclass 36, count 0 2006.229.22:58:41.56#ibcon#read 3, iclass 36, count 0 2006.229.22:58:41.56#ibcon#about to read 4, iclass 36, count 0 2006.229.22:58:41.56#ibcon#read 4, iclass 36, count 0 2006.229.22:58:41.56#ibcon#about to read 5, iclass 36, count 0 2006.229.22:58:41.56#ibcon#read 5, iclass 36, count 0 2006.229.22:58:41.56#ibcon#about to read 6, iclass 36, count 0 2006.229.22:58:41.56#ibcon#read 6, iclass 36, count 0 2006.229.22:58:41.56#ibcon#end of sib2, iclass 36, count 0 2006.229.22:58:41.56#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:58:41.56#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:58:41.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.22:58:41.56#ibcon#*before write, iclass 36, count 0 2006.229.22:58:41.56#ibcon#enter sib2, iclass 36, count 0 2006.229.22:58:41.56#ibcon#flushed, iclass 36, count 0 2006.229.22:58:41.56#ibcon#about to write, iclass 36, count 0 2006.229.22:58:41.56#ibcon#wrote, iclass 36, count 0 2006.229.22:58:41.56#ibcon#about to read 3, iclass 36, count 0 2006.229.22:58:41.60#ibcon#read 3, iclass 36, count 0 2006.229.22:58:41.60#ibcon#about to read 4, iclass 36, count 0 2006.229.22:58:41.60#ibcon#read 4, iclass 36, count 0 2006.229.22:58:41.60#ibcon#about to read 5, iclass 36, count 0 2006.229.22:58:41.60#ibcon#read 5, iclass 36, count 0 2006.229.22:58:41.60#ibcon#about to read 6, iclass 36, count 0 2006.229.22:58:41.60#ibcon#read 6, iclass 36, count 0 2006.229.22:58:41.60#ibcon#end of sib2, iclass 36, count 0 2006.229.22:58:41.60#ibcon#*after write, iclass 36, count 0 2006.229.22:58:41.60#ibcon#*before return 0, iclass 36, count 0 2006.229.22:58:41.60#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:41.60#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:41.60#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:58:41.60#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:58:41.60$vck44/va=8,6 2006.229.22:58:41.60#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.22:58:41.60#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.22:58:41.60#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:41.60#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:41.66#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:41.66#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:41.66#ibcon#enter wrdev, iclass 38, count 2 2006.229.22:58:41.66#ibcon#first serial, iclass 38, count 2 2006.229.22:58:41.66#ibcon#enter sib2, iclass 38, count 2 2006.229.22:58:41.66#ibcon#flushed, iclass 38, count 2 2006.229.22:58:41.66#ibcon#about to write, iclass 38, count 2 2006.229.22:58:41.66#ibcon#wrote, iclass 38, count 2 2006.229.22:58:41.66#ibcon#about to read 3, iclass 38, count 2 2006.229.22:58:41.68#ibcon#read 3, iclass 38, count 2 2006.229.22:58:41.68#ibcon#about to read 4, iclass 38, count 2 2006.229.22:58:41.68#ibcon#read 4, iclass 38, count 2 2006.229.22:58:41.68#ibcon#about to read 5, iclass 38, count 2 2006.229.22:58:41.68#ibcon#read 5, iclass 38, count 2 2006.229.22:58:41.68#ibcon#about to read 6, iclass 38, count 2 2006.229.22:58:41.68#ibcon#read 6, iclass 38, count 2 2006.229.22:58:41.68#ibcon#end of sib2, iclass 38, count 2 2006.229.22:58:41.68#ibcon#*mode == 0, iclass 38, count 2 2006.229.22:58:41.68#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.22:58:41.68#ibcon#[25=AT08-06\r\n] 2006.229.22:58:41.68#ibcon#*before write, iclass 38, count 2 2006.229.22:58:41.68#ibcon#enter sib2, iclass 38, count 2 2006.229.22:58:41.68#ibcon#flushed, iclass 38, count 2 2006.229.22:58:41.68#ibcon#about to write, iclass 38, count 2 2006.229.22:58:41.68#ibcon#wrote, iclass 38, count 2 2006.229.22:58:41.68#ibcon#about to read 3, iclass 38, count 2 2006.229.22:58:41.71#ibcon#read 3, iclass 38, count 2 2006.229.22:58:41.71#ibcon#about to read 4, iclass 38, count 2 2006.229.22:58:41.71#ibcon#read 4, iclass 38, count 2 2006.229.22:58:41.71#ibcon#about to read 5, iclass 38, count 2 2006.229.22:58:41.71#ibcon#read 5, iclass 38, count 2 2006.229.22:58:41.71#ibcon#about to read 6, iclass 38, count 2 2006.229.22:58:41.71#ibcon#read 6, iclass 38, count 2 2006.229.22:58:41.71#ibcon#end of sib2, iclass 38, count 2 2006.229.22:58:41.71#ibcon#*after write, iclass 38, count 2 2006.229.22:58:41.71#ibcon#*before return 0, iclass 38, count 2 2006.229.22:58:41.71#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:41.71#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:41.71#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.22:58:41.71#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:41.71#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:41.83#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:41.83#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:41.83#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:58:41.83#ibcon#first serial, iclass 38, count 0 2006.229.22:58:41.83#ibcon#enter sib2, iclass 38, count 0 2006.229.22:58:41.83#ibcon#flushed, iclass 38, count 0 2006.229.22:58:41.83#ibcon#about to write, iclass 38, count 0 2006.229.22:58:41.83#ibcon#wrote, iclass 38, count 0 2006.229.22:58:41.83#ibcon#about to read 3, iclass 38, count 0 2006.229.22:58:41.84#abcon#<5=/08 1.6 5.7 29.37 861002.6\r\n> 2006.229.22:58:41.85#ibcon#read 3, iclass 38, count 0 2006.229.22:58:41.85#ibcon#about to read 4, iclass 38, count 0 2006.229.22:58:41.85#ibcon#read 4, iclass 38, count 0 2006.229.22:58:41.85#ibcon#about to read 5, iclass 38, count 0 2006.229.22:58:41.85#ibcon#read 5, iclass 38, count 0 2006.229.22:58:41.85#ibcon#about to read 6, iclass 38, count 0 2006.229.22:58:41.85#ibcon#read 6, iclass 38, count 0 2006.229.22:58:41.85#ibcon#end of sib2, iclass 38, count 0 2006.229.22:58:41.85#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:58:41.85#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:58:41.85#ibcon#[25=USB\r\n] 2006.229.22:58:41.85#ibcon#*before write, iclass 38, count 0 2006.229.22:58:41.85#ibcon#enter sib2, iclass 38, count 0 2006.229.22:58:41.85#ibcon#flushed, iclass 38, count 0 2006.229.22:58:41.85#ibcon#about to write, iclass 38, count 0 2006.229.22:58:41.85#ibcon#wrote, iclass 38, count 0 2006.229.22:58:41.85#ibcon#about to read 3, iclass 38, count 0 2006.229.22:58:41.86#abcon#{5=INTERFACE CLEAR} 2006.229.22:58:41.88#ibcon#read 3, iclass 38, count 0 2006.229.22:58:41.88#ibcon#about to read 4, iclass 38, count 0 2006.229.22:58:41.88#ibcon#read 4, iclass 38, count 0 2006.229.22:58:41.88#ibcon#about to read 5, iclass 38, count 0 2006.229.22:58:41.88#ibcon#read 5, iclass 38, count 0 2006.229.22:58:41.88#ibcon#about to read 6, iclass 38, count 0 2006.229.22:58:41.88#ibcon#read 6, iclass 38, count 0 2006.229.22:58:41.88#ibcon#end of sib2, iclass 38, count 0 2006.229.22:58:41.88#ibcon#*after write, iclass 38, count 0 2006.229.22:58:41.88#ibcon#*before return 0, iclass 38, count 0 2006.229.22:58:41.88#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:41.88#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:41.88#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:58:41.88#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:58:41.88$vck44/vblo=1,629.99 2006.229.22:58:41.88#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.22:58:41.88#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.22:58:41.88#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:41.88#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:58:41.88#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:58:41.88#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:58:41.88#ibcon#enter wrdev, iclass 5, count 0 2006.229.22:58:41.88#ibcon#first serial, iclass 5, count 0 2006.229.22:58:41.88#ibcon#enter sib2, iclass 5, count 0 2006.229.22:58:41.88#ibcon#flushed, iclass 5, count 0 2006.229.22:58:41.88#ibcon#about to write, iclass 5, count 0 2006.229.22:58:41.88#ibcon#wrote, iclass 5, count 0 2006.229.22:58:41.88#ibcon#about to read 3, iclass 5, count 0 2006.229.22:58:41.90#ibcon#read 3, iclass 5, count 0 2006.229.22:58:41.90#ibcon#about to read 4, iclass 5, count 0 2006.229.22:58:41.90#ibcon#read 4, iclass 5, count 0 2006.229.22:58:41.90#ibcon#about to read 5, iclass 5, count 0 2006.229.22:58:41.90#ibcon#read 5, iclass 5, count 0 2006.229.22:58:41.90#ibcon#about to read 6, iclass 5, count 0 2006.229.22:58:41.90#ibcon#read 6, iclass 5, count 0 2006.229.22:58:41.90#ibcon#end of sib2, iclass 5, count 0 2006.229.22:58:41.90#ibcon#*mode == 0, iclass 5, count 0 2006.229.22:58:41.90#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.22:58:41.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.22:58:41.90#ibcon#*before write, iclass 5, count 0 2006.229.22:58:41.90#ibcon#enter sib2, iclass 5, count 0 2006.229.22:58:41.90#ibcon#flushed, iclass 5, count 0 2006.229.22:58:41.90#ibcon#about to write, iclass 5, count 0 2006.229.22:58:41.90#ibcon#wrote, iclass 5, count 0 2006.229.22:58:41.90#ibcon#about to read 3, iclass 5, count 0 2006.229.22:58:41.92#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:58:41.94#ibcon#read 3, iclass 5, count 0 2006.229.22:58:41.94#ibcon#about to read 4, iclass 5, count 0 2006.229.22:58:41.94#ibcon#read 4, iclass 5, count 0 2006.229.22:58:41.94#ibcon#about to read 5, iclass 5, count 0 2006.229.22:58:41.94#ibcon#read 5, iclass 5, count 0 2006.229.22:58:41.94#ibcon#about to read 6, iclass 5, count 0 2006.229.22:58:41.94#ibcon#read 6, iclass 5, count 0 2006.229.22:58:41.94#ibcon#end of sib2, iclass 5, count 0 2006.229.22:58:41.94#ibcon#*after write, iclass 5, count 0 2006.229.22:58:41.94#ibcon#*before return 0, iclass 5, count 0 2006.229.22:58:41.94#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:58:41.94#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.22:58:41.94#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.22:58:41.94#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.22:58:41.94$vck44/vb=1,4 2006.229.22:58:41.94#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.22:58:41.94#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.22:58:41.94#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:41.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:41.94#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:41.94#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:41.94#ibcon#enter wrdev, iclass 10, count 2 2006.229.22:58:41.94#ibcon#first serial, iclass 10, count 2 2006.229.22:58:41.94#ibcon#enter sib2, iclass 10, count 2 2006.229.22:58:41.94#ibcon#flushed, iclass 10, count 2 2006.229.22:58:41.94#ibcon#about to write, iclass 10, count 2 2006.229.22:58:41.94#ibcon#wrote, iclass 10, count 2 2006.229.22:58:41.94#ibcon#about to read 3, iclass 10, count 2 2006.229.22:58:41.96#ibcon#read 3, iclass 10, count 2 2006.229.22:58:41.96#ibcon#about to read 4, iclass 10, count 2 2006.229.22:58:41.96#ibcon#read 4, iclass 10, count 2 2006.229.22:58:41.96#ibcon#about to read 5, iclass 10, count 2 2006.229.22:58:41.96#ibcon#read 5, iclass 10, count 2 2006.229.22:58:41.96#ibcon#about to read 6, iclass 10, count 2 2006.229.22:58:41.96#ibcon#read 6, iclass 10, count 2 2006.229.22:58:41.96#ibcon#end of sib2, iclass 10, count 2 2006.229.22:58:41.96#ibcon#*mode == 0, iclass 10, count 2 2006.229.22:58:41.96#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.22:58:41.96#ibcon#[27=AT01-04\r\n] 2006.229.22:58:41.96#ibcon#*before write, iclass 10, count 2 2006.229.22:58:41.96#ibcon#enter sib2, iclass 10, count 2 2006.229.22:58:41.96#ibcon#flushed, iclass 10, count 2 2006.229.22:58:41.96#ibcon#about to write, iclass 10, count 2 2006.229.22:58:41.96#ibcon#wrote, iclass 10, count 2 2006.229.22:58:41.96#ibcon#about to read 3, iclass 10, count 2 2006.229.22:58:41.99#ibcon#read 3, iclass 10, count 2 2006.229.22:58:41.99#ibcon#about to read 4, iclass 10, count 2 2006.229.22:58:41.99#ibcon#read 4, iclass 10, count 2 2006.229.22:58:41.99#ibcon#about to read 5, iclass 10, count 2 2006.229.22:58:41.99#ibcon#read 5, iclass 10, count 2 2006.229.22:58:41.99#ibcon#about to read 6, iclass 10, count 2 2006.229.22:58:41.99#ibcon#read 6, iclass 10, count 2 2006.229.22:58:41.99#ibcon#end of sib2, iclass 10, count 2 2006.229.22:58:41.99#ibcon#*after write, iclass 10, count 2 2006.229.22:58:41.99#ibcon#*before return 0, iclass 10, count 2 2006.229.22:58:41.99#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:41.99#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.22:58:41.99#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.22:58:41.99#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:41.99#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:42.11#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:42.11#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:42.11#ibcon#enter wrdev, iclass 10, count 0 2006.229.22:58:42.11#ibcon#first serial, iclass 10, count 0 2006.229.22:58:42.11#ibcon#enter sib2, iclass 10, count 0 2006.229.22:58:42.11#ibcon#flushed, iclass 10, count 0 2006.229.22:58:42.11#ibcon#about to write, iclass 10, count 0 2006.229.22:58:42.11#ibcon#wrote, iclass 10, count 0 2006.229.22:58:42.11#ibcon#about to read 3, iclass 10, count 0 2006.229.22:58:42.13#ibcon#read 3, iclass 10, count 0 2006.229.22:58:42.13#ibcon#about to read 4, iclass 10, count 0 2006.229.22:58:42.13#ibcon#read 4, iclass 10, count 0 2006.229.22:58:42.13#ibcon#about to read 5, iclass 10, count 0 2006.229.22:58:42.13#ibcon#read 5, iclass 10, count 0 2006.229.22:58:42.13#ibcon#about to read 6, iclass 10, count 0 2006.229.22:58:42.13#ibcon#read 6, iclass 10, count 0 2006.229.22:58:42.13#ibcon#end of sib2, iclass 10, count 0 2006.229.22:58:42.13#ibcon#*mode == 0, iclass 10, count 0 2006.229.22:58:42.13#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.22:58:42.13#ibcon#[27=USB\r\n] 2006.229.22:58:42.13#ibcon#*before write, iclass 10, count 0 2006.229.22:58:42.13#ibcon#enter sib2, iclass 10, count 0 2006.229.22:58:42.13#ibcon#flushed, iclass 10, count 0 2006.229.22:58:42.13#ibcon#about to write, iclass 10, count 0 2006.229.22:58:42.13#ibcon#wrote, iclass 10, count 0 2006.229.22:58:42.13#ibcon#about to read 3, iclass 10, count 0 2006.229.22:58:42.16#ibcon#read 3, iclass 10, count 0 2006.229.22:58:42.16#ibcon#about to read 4, iclass 10, count 0 2006.229.22:58:42.16#ibcon#read 4, iclass 10, count 0 2006.229.22:58:42.16#ibcon#about to read 5, iclass 10, count 0 2006.229.22:58:42.16#ibcon#read 5, iclass 10, count 0 2006.229.22:58:42.16#ibcon#about to read 6, iclass 10, count 0 2006.229.22:58:42.16#ibcon#read 6, iclass 10, count 0 2006.229.22:58:42.16#ibcon#end of sib2, iclass 10, count 0 2006.229.22:58:42.16#ibcon#*after write, iclass 10, count 0 2006.229.22:58:42.16#ibcon#*before return 0, iclass 10, count 0 2006.229.22:58:42.16#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:42.16#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.22:58:42.16#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.22:58:42.16#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.22:58:42.16$vck44/vblo=2,634.99 2006.229.22:58:42.16#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.22:58:42.16#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.22:58:42.16#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:42.16#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:42.16#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:42.16#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:42.16#ibcon#enter wrdev, iclass 12, count 0 2006.229.22:58:42.16#ibcon#first serial, iclass 12, count 0 2006.229.22:58:42.16#ibcon#enter sib2, iclass 12, count 0 2006.229.22:58:42.16#ibcon#flushed, iclass 12, count 0 2006.229.22:58:42.16#ibcon#about to write, iclass 12, count 0 2006.229.22:58:42.16#ibcon#wrote, iclass 12, count 0 2006.229.22:58:42.16#ibcon#about to read 3, iclass 12, count 0 2006.229.22:58:42.18#ibcon#read 3, iclass 12, count 0 2006.229.22:58:42.18#ibcon#about to read 4, iclass 12, count 0 2006.229.22:58:42.18#ibcon#read 4, iclass 12, count 0 2006.229.22:58:42.18#ibcon#about to read 5, iclass 12, count 0 2006.229.22:58:42.18#ibcon#read 5, iclass 12, count 0 2006.229.22:58:42.18#ibcon#about to read 6, iclass 12, count 0 2006.229.22:58:42.18#ibcon#read 6, iclass 12, count 0 2006.229.22:58:42.18#ibcon#end of sib2, iclass 12, count 0 2006.229.22:58:42.18#ibcon#*mode == 0, iclass 12, count 0 2006.229.22:58:42.18#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.22:58:42.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.22:58:42.18#ibcon#*before write, iclass 12, count 0 2006.229.22:58:42.18#ibcon#enter sib2, iclass 12, count 0 2006.229.22:58:42.18#ibcon#flushed, iclass 12, count 0 2006.229.22:58:42.18#ibcon#about to write, iclass 12, count 0 2006.229.22:58:42.18#ibcon#wrote, iclass 12, count 0 2006.229.22:58:42.18#ibcon#about to read 3, iclass 12, count 0 2006.229.22:58:42.22#ibcon#read 3, iclass 12, count 0 2006.229.22:58:42.22#ibcon#about to read 4, iclass 12, count 0 2006.229.22:58:42.22#ibcon#read 4, iclass 12, count 0 2006.229.22:58:42.22#ibcon#about to read 5, iclass 12, count 0 2006.229.22:58:42.22#ibcon#read 5, iclass 12, count 0 2006.229.22:58:42.22#ibcon#about to read 6, iclass 12, count 0 2006.229.22:58:42.22#ibcon#read 6, iclass 12, count 0 2006.229.22:58:42.22#ibcon#end of sib2, iclass 12, count 0 2006.229.22:58:42.22#ibcon#*after write, iclass 12, count 0 2006.229.22:58:42.22#ibcon#*before return 0, iclass 12, count 0 2006.229.22:58:42.22#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:42.22#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.22:58:42.22#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.22:58:42.22#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.22:58:42.22$vck44/vb=2,4 2006.229.22:58:42.22#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.22:58:42.22#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.22:58:42.22#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:42.22#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:42.28#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:42.28#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:42.28#ibcon#enter wrdev, iclass 14, count 2 2006.229.22:58:42.28#ibcon#first serial, iclass 14, count 2 2006.229.22:58:42.28#ibcon#enter sib2, iclass 14, count 2 2006.229.22:58:42.28#ibcon#flushed, iclass 14, count 2 2006.229.22:58:42.28#ibcon#about to write, iclass 14, count 2 2006.229.22:58:42.28#ibcon#wrote, iclass 14, count 2 2006.229.22:58:42.28#ibcon#about to read 3, iclass 14, count 2 2006.229.22:58:42.30#ibcon#read 3, iclass 14, count 2 2006.229.22:58:42.30#ibcon#about to read 4, iclass 14, count 2 2006.229.22:58:42.30#ibcon#read 4, iclass 14, count 2 2006.229.22:58:42.30#ibcon#about to read 5, iclass 14, count 2 2006.229.22:58:42.30#ibcon#read 5, iclass 14, count 2 2006.229.22:58:42.30#ibcon#about to read 6, iclass 14, count 2 2006.229.22:58:42.30#ibcon#read 6, iclass 14, count 2 2006.229.22:58:42.30#ibcon#end of sib2, iclass 14, count 2 2006.229.22:58:42.30#ibcon#*mode == 0, iclass 14, count 2 2006.229.22:58:42.30#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.22:58:42.30#ibcon#[27=AT02-04\r\n] 2006.229.22:58:42.30#ibcon#*before write, iclass 14, count 2 2006.229.22:58:42.30#ibcon#enter sib2, iclass 14, count 2 2006.229.22:58:42.30#ibcon#flushed, iclass 14, count 2 2006.229.22:58:42.30#ibcon#about to write, iclass 14, count 2 2006.229.22:58:42.30#ibcon#wrote, iclass 14, count 2 2006.229.22:58:42.30#ibcon#about to read 3, iclass 14, count 2 2006.229.22:58:42.33#ibcon#read 3, iclass 14, count 2 2006.229.22:58:42.33#ibcon#about to read 4, iclass 14, count 2 2006.229.22:58:42.33#ibcon#read 4, iclass 14, count 2 2006.229.22:58:42.33#ibcon#about to read 5, iclass 14, count 2 2006.229.22:58:42.33#ibcon#read 5, iclass 14, count 2 2006.229.22:58:42.33#ibcon#about to read 6, iclass 14, count 2 2006.229.22:58:42.33#ibcon#read 6, iclass 14, count 2 2006.229.22:58:42.33#ibcon#end of sib2, iclass 14, count 2 2006.229.22:58:42.33#ibcon#*after write, iclass 14, count 2 2006.229.22:58:42.33#ibcon#*before return 0, iclass 14, count 2 2006.229.22:58:42.33#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:42.33#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.22:58:42.33#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.22:58:42.33#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:42.33#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:42.45#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:42.45#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:42.45#ibcon#enter wrdev, iclass 14, count 0 2006.229.22:58:42.45#ibcon#first serial, iclass 14, count 0 2006.229.22:58:42.45#ibcon#enter sib2, iclass 14, count 0 2006.229.22:58:42.45#ibcon#flushed, iclass 14, count 0 2006.229.22:58:42.45#ibcon#about to write, iclass 14, count 0 2006.229.22:58:42.45#ibcon#wrote, iclass 14, count 0 2006.229.22:58:42.45#ibcon#about to read 3, iclass 14, count 0 2006.229.22:58:42.47#ibcon#read 3, iclass 14, count 0 2006.229.22:58:42.47#ibcon#about to read 4, iclass 14, count 0 2006.229.22:58:42.47#ibcon#read 4, iclass 14, count 0 2006.229.22:58:42.47#ibcon#about to read 5, iclass 14, count 0 2006.229.22:58:42.47#ibcon#read 5, iclass 14, count 0 2006.229.22:58:42.47#ibcon#about to read 6, iclass 14, count 0 2006.229.22:58:42.47#ibcon#read 6, iclass 14, count 0 2006.229.22:58:42.47#ibcon#end of sib2, iclass 14, count 0 2006.229.22:58:42.47#ibcon#*mode == 0, iclass 14, count 0 2006.229.22:58:42.47#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.22:58:42.47#ibcon#[27=USB\r\n] 2006.229.22:58:42.47#ibcon#*before write, iclass 14, count 0 2006.229.22:58:42.47#ibcon#enter sib2, iclass 14, count 0 2006.229.22:58:42.47#ibcon#flushed, iclass 14, count 0 2006.229.22:58:42.47#ibcon#about to write, iclass 14, count 0 2006.229.22:58:42.47#ibcon#wrote, iclass 14, count 0 2006.229.22:58:42.47#ibcon#about to read 3, iclass 14, count 0 2006.229.22:58:42.50#ibcon#read 3, iclass 14, count 0 2006.229.22:58:42.50#ibcon#about to read 4, iclass 14, count 0 2006.229.22:58:42.50#ibcon#read 4, iclass 14, count 0 2006.229.22:58:42.50#ibcon#about to read 5, iclass 14, count 0 2006.229.22:58:42.50#ibcon#read 5, iclass 14, count 0 2006.229.22:58:42.50#ibcon#about to read 6, iclass 14, count 0 2006.229.22:58:42.50#ibcon#read 6, iclass 14, count 0 2006.229.22:58:42.50#ibcon#end of sib2, iclass 14, count 0 2006.229.22:58:42.50#ibcon#*after write, iclass 14, count 0 2006.229.22:58:42.50#ibcon#*before return 0, iclass 14, count 0 2006.229.22:58:42.50#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:42.50#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.22:58:42.50#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.22:58:42.50#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.22:58:42.50$vck44/vblo=3,649.99 2006.229.22:58:42.50#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.22:58:42.50#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.22:58:42.50#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:42.50#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:42.50#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:42.50#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:42.50#ibcon#enter wrdev, iclass 16, count 0 2006.229.22:58:42.50#ibcon#first serial, iclass 16, count 0 2006.229.22:58:42.50#ibcon#enter sib2, iclass 16, count 0 2006.229.22:58:42.50#ibcon#flushed, iclass 16, count 0 2006.229.22:58:42.50#ibcon#about to write, iclass 16, count 0 2006.229.22:58:42.50#ibcon#wrote, iclass 16, count 0 2006.229.22:58:42.50#ibcon#about to read 3, iclass 16, count 0 2006.229.22:58:42.52#ibcon#read 3, iclass 16, count 0 2006.229.22:58:42.52#ibcon#about to read 4, iclass 16, count 0 2006.229.22:58:42.52#ibcon#read 4, iclass 16, count 0 2006.229.22:58:42.52#ibcon#about to read 5, iclass 16, count 0 2006.229.22:58:42.52#ibcon#read 5, iclass 16, count 0 2006.229.22:58:42.52#ibcon#about to read 6, iclass 16, count 0 2006.229.22:58:42.52#ibcon#read 6, iclass 16, count 0 2006.229.22:58:42.52#ibcon#end of sib2, iclass 16, count 0 2006.229.22:58:42.52#ibcon#*mode == 0, iclass 16, count 0 2006.229.22:58:42.52#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.22:58:42.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.22:58:42.52#ibcon#*before write, iclass 16, count 0 2006.229.22:58:42.52#ibcon#enter sib2, iclass 16, count 0 2006.229.22:58:42.52#ibcon#flushed, iclass 16, count 0 2006.229.22:58:42.52#ibcon#about to write, iclass 16, count 0 2006.229.22:58:42.52#ibcon#wrote, iclass 16, count 0 2006.229.22:58:42.52#ibcon#about to read 3, iclass 16, count 0 2006.229.22:58:42.56#ibcon#read 3, iclass 16, count 0 2006.229.22:58:42.56#ibcon#about to read 4, iclass 16, count 0 2006.229.22:58:42.56#ibcon#read 4, iclass 16, count 0 2006.229.22:58:42.56#ibcon#about to read 5, iclass 16, count 0 2006.229.22:58:42.56#ibcon#read 5, iclass 16, count 0 2006.229.22:58:42.56#ibcon#about to read 6, iclass 16, count 0 2006.229.22:58:42.56#ibcon#read 6, iclass 16, count 0 2006.229.22:58:42.56#ibcon#end of sib2, iclass 16, count 0 2006.229.22:58:42.56#ibcon#*after write, iclass 16, count 0 2006.229.22:58:42.56#ibcon#*before return 0, iclass 16, count 0 2006.229.22:58:42.56#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:42.56#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.22:58:42.56#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.22:58:42.56#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.22:58:42.56$vck44/vb=3,4 2006.229.22:58:42.56#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.22:58:42.56#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.22:58:42.56#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:42.56#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:42.62#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:42.62#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:42.62#ibcon#enter wrdev, iclass 18, count 2 2006.229.22:58:42.62#ibcon#first serial, iclass 18, count 2 2006.229.22:58:42.62#ibcon#enter sib2, iclass 18, count 2 2006.229.22:58:42.62#ibcon#flushed, iclass 18, count 2 2006.229.22:58:42.62#ibcon#about to write, iclass 18, count 2 2006.229.22:58:42.62#ibcon#wrote, iclass 18, count 2 2006.229.22:58:42.62#ibcon#about to read 3, iclass 18, count 2 2006.229.22:58:42.64#ibcon#read 3, iclass 18, count 2 2006.229.22:58:42.64#ibcon#about to read 4, iclass 18, count 2 2006.229.22:58:42.64#ibcon#read 4, iclass 18, count 2 2006.229.22:58:42.64#ibcon#about to read 5, iclass 18, count 2 2006.229.22:58:42.64#ibcon#read 5, iclass 18, count 2 2006.229.22:58:42.64#ibcon#about to read 6, iclass 18, count 2 2006.229.22:58:42.64#ibcon#read 6, iclass 18, count 2 2006.229.22:58:42.64#ibcon#end of sib2, iclass 18, count 2 2006.229.22:58:42.64#ibcon#*mode == 0, iclass 18, count 2 2006.229.22:58:42.64#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.22:58:42.64#ibcon#[27=AT03-04\r\n] 2006.229.22:58:42.64#ibcon#*before write, iclass 18, count 2 2006.229.22:58:42.64#ibcon#enter sib2, iclass 18, count 2 2006.229.22:58:42.64#ibcon#flushed, iclass 18, count 2 2006.229.22:58:42.64#ibcon#about to write, iclass 18, count 2 2006.229.22:58:42.64#ibcon#wrote, iclass 18, count 2 2006.229.22:58:42.64#ibcon#about to read 3, iclass 18, count 2 2006.229.22:58:42.67#ibcon#read 3, iclass 18, count 2 2006.229.22:58:42.67#ibcon#about to read 4, iclass 18, count 2 2006.229.22:58:42.67#ibcon#read 4, iclass 18, count 2 2006.229.22:58:42.67#ibcon#about to read 5, iclass 18, count 2 2006.229.22:58:42.67#ibcon#read 5, iclass 18, count 2 2006.229.22:58:42.67#ibcon#about to read 6, iclass 18, count 2 2006.229.22:58:42.67#ibcon#read 6, iclass 18, count 2 2006.229.22:58:42.67#ibcon#end of sib2, iclass 18, count 2 2006.229.22:58:42.67#ibcon#*after write, iclass 18, count 2 2006.229.22:58:42.67#ibcon#*before return 0, iclass 18, count 2 2006.229.22:58:42.67#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:42.67#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.22:58:42.67#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.22:58:42.67#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:42.67#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:42.79#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:42.79#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:42.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.22:58:42.79#ibcon#first serial, iclass 18, count 0 2006.229.22:58:42.79#ibcon#enter sib2, iclass 18, count 0 2006.229.22:58:42.79#ibcon#flushed, iclass 18, count 0 2006.229.22:58:42.79#ibcon#about to write, iclass 18, count 0 2006.229.22:58:42.79#ibcon#wrote, iclass 18, count 0 2006.229.22:58:42.79#ibcon#about to read 3, iclass 18, count 0 2006.229.22:58:42.81#ibcon#read 3, iclass 18, count 0 2006.229.22:58:42.81#ibcon#about to read 4, iclass 18, count 0 2006.229.22:58:42.81#ibcon#read 4, iclass 18, count 0 2006.229.22:58:42.81#ibcon#about to read 5, iclass 18, count 0 2006.229.22:58:42.81#ibcon#read 5, iclass 18, count 0 2006.229.22:58:42.81#ibcon#about to read 6, iclass 18, count 0 2006.229.22:58:42.81#ibcon#read 6, iclass 18, count 0 2006.229.22:58:42.81#ibcon#end of sib2, iclass 18, count 0 2006.229.22:58:42.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.22:58:42.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.22:58:42.81#ibcon#[27=USB\r\n] 2006.229.22:58:42.81#ibcon#*before write, iclass 18, count 0 2006.229.22:58:42.81#ibcon#enter sib2, iclass 18, count 0 2006.229.22:58:42.81#ibcon#flushed, iclass 18, count 0 2006.229.22:58:42.81#ibcon#about to write, iclass 18, count 0 2006.229.22:58:42.81#ibcon#wrote, iclass 18, count 0 2006.229.22:58:42.81#ibcon#about to read 3, iclass 18, count 0 2006.229.22:58:42.84#ibcon#read 3, iclass 18, count 0 2006.229.22:58:42.84#ibcon#about to read 4, iclass 18, count 0 2006.229.22:58:42.84#ibcon#read 4, iclass 18, count 0 2006.229.22:58:42.84#ibcon#about to read 5, iclass 18, count 0 2006.229.22:58:42.84#ibcon#read 5, iclass 18, count 0 2006.229.22:58:42.84#ibcon#about to read 6, iclass 18, count 0 2006.229.22:58:42.84#ibcon#read 6, iclass 18, count 0 2006.229.22:58:42.84#ibcon#end of sib2, iclass 18, count 0 2006.229.22:58:42.84#ibcon#*after write, iclass 18, count 0 2006.229.22:58:42.84#ibcon#*before return 0, iclass 18, count 0 2006.229.22:58:42.84#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:42.84#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.22:58:42.84#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.22:58:42.84#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.22:58:42.84$vck44/vblo=4,679.99 2006.229.22:58:42.84#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.22:58:42.84#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.22:58:42.84#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:42.84#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:42.84#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:42.84#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:42.84#ibcon#enter wrdev, iclass 20, count 0 2006.229.22:58:42.84#ibcon#first serial, iclass 20, count 0 2006.229.22:58:42.84#ibcon#enter sib2, iclass 20, count 0 2006.229.22:58:42.84#ibcon#flushed, iclass 20, count 0 2006.229.22:58:42.84#ibcon#about to write, iclass 20, count 0 2006.229.22:58:42.84#ibcon#wrote, iclass 20, count 0 2006.229.22:58:42.84#ibcon#about to read 3, iclass 20, count 0 2006.229.22:58:42.86#ibcon#read 3, iclass 20, count 0 2006.229.22:58:42.86#ibcon#about to read 4, iclass 20, count 0 2006.229.22:58:42.86#ibcon#read 4, iclass 20, count 0 2006.229.22:58:42.86#ibcon#about to read 5, iclass 20, count 0 2006.229.22:58:42.86#ibcon#read 5, iclass 20, count 0 2006.229.22:58:42.86#ibcon#about to read 6, iclass 20, count 0 2006.229.22:58:42.86#ibcon#read 6, iclass 20, count 0 2006.229.22:58:42.86#ibcon#end of sib2, iclass 20, count 0 2006.229.22:58:42.86#ibcon#*mode == 0, iclass 20, count 0 2006.229.22:58:42.86#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.22:58:42.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.22:58:42.86#ibcon#*before write, iclass 20, count 0 2006.229.22:58:42.86#ibcon#enter sib2, iclass 20, count 0 2006.229.22:58:42.86#ibcon#flushed, iclass 20, count 0 2006.229.22:58:42.86#ibcon#about to write, iclass 20, count 0 2006.229.22:58:42.86#ibcon#wrote, iclass 20, count 0 2006.229.22:58:42.86#ibcon#about to read 3, iclass 20, count 0 2006.229.22:58:42.90#ibcon#read 3, iclass 20, count 0 2006.229.22:58:42.90#ibcon#about to read 4, iclass 20, count 0 2006.229.22:58:42.90#ibcon#read 4, iclass 20, count 0 2006.229.22:58:42.90#ibcon#about to read 5, iclass 20, count 0 2006.229.22:58:42.90#ibcon#read 5, iclass 20, count 0 2006.229.22:58:42.90#ibcon#about to read 6, iclass 20, count 0 2006.229.22:58:42.90#ibcon#read 6, iclass 20, count 0 2006.229.22:58:42.90#ibcon#end of sib2, iclass 20, count 0 2006.229.22:58:42.90#ibcon#*after write, iclass 20, count 0 2006.229.22:58:42.90#ibcon#*before return 0, iclass 20, count 0 2006.229.22:58:42.90#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:42.90#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.22:58:42.90#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.22:58:42.90#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.22:58:42.90$vck44/vb=4,4 2006.229.22:58:42.90#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.22:58:42.90#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.22:58:42.90#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:42.90#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:42.96#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:42.96#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:42.96#ibcon#enter wrdev, iclass 22, count 2 2006.229.22:58:42.96#ibcon#first serial, iclass 22, count 2 2006.229.22:58:42.96#ibcon#enter sib2, iclass 22, count 2 2006.229.22:58:42.96#ibcon#flushed, iclass 22, count 2 2006.229.22:58:42.96#ibcon#about to write, iclass 22, count 2 2006.229.22:58:42.96#ibcon#wrote, iclass 22, count 2 2006.229.22:58:42.96#ibcon#about to read 3, iclass 22, count 2 2006.229.22:58:42.98#ibcon#read 3, iclass 22, count 2 2006.229.22:58:42.98#ibcon#about to read 4, iclass 22, count 2 2006.229.22:58:42.98#ibcon#read 4, iclass 22, count 2 2006.229.22:58:42.98#ibcon#about to read 5, iclass 22, count 2 2006.229.22:58:42.98#ibcon#read 5, iclass 22, count 2 2006.229.22:58:42.98#ibcon#about to read 6, iclass 22, count 2 2006.229.22:58:42.98#ibcon#read 6, iclass 22, count 2 2006.229.22:58:42.98#ibcon#end of sib2, iclass 22, count 2 2006.229.22:58:42.98#ibcon#*mode == 0, iclass 22, count 2 2006.229.22:58:42.98#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.22:58:42.98#ibcon#[27=AT04-04\r\n] 2006.229.22:58:42.98#ibcon#*before write, iclass 22, count 2 2006.229.22:58:42.98#ibcon#enter sib2, iclass 22, count 2 2006.229.22:58:42.98#ibcon#flushed, iclass 22, count 2 2006.229.22:58:42.98#ibcon#about to write, iclass 22, count 2 2006.229.22:58:42.98#ibcon#wrote, iclass 22, count 2 2006.229.22:58:42.98#ibcon#about to read 3, iclass 22, count 2 2006.229.22:58:43.01#ibcon#read 3, iclass 22, count 2 2006.229.22:58:43.01#ibcon#about to read 4, iclass 22, count 2 2006.229.22:58:43.01#ibcon#read 4, iclass 22, count 2 2006.229.22:58:43.01#ibcon#about to read 5, iclass 22, count 2 2006.229.22:58:43.01#ibcon#read 5, iclass 22, count 2 2006.229.22:58:43.01#ibcon#about to read 6, iclass 22, count 2 2006.229.22:58:43.01#ibcon#read 6, iclass 22, count 2 2006.229.22:58:43.01#ibcon#end of sib2, iclass 22, count 2 2006.229.22:58:43.01#ibcon#*after write, iclass 22, count 2 2006.229.22:58:43.01#ibcon#*before return 0, iclass 22, count 2 2006.229.22:58:43.01#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:43.01#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.22:58:43.01#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.22:58:43.01#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:43.01#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:43.13#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:43.13#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:43.13#ibcon#enter wrdev, iclass 22, count 0 2006.229.22:58:43.13#ibcon#first serial, iclass 22, count 0 2006.229.22:58:43.13#ibcon#enter sib2, iclass 22, count 0 2006.229.22:58:43.13#ibcon#flushed, iclass 22, count 0 2006.229.22:58:43.13#ibcon#about to write, iclass 22, count 0 2006.229.22:58:43.13#ibcon#wrote, iclass 22, count 0 2006.229.22:58:43.13#ibcon#about to read 3, iclass 22, count 0 2006.229.22:58:43.15#ibcon#read 3, iclass 22, count 0 2006.229.22:58:43.15#ibcon#about to read 4, iclass 22, count 0 2006.229.22:58:43.15#ibcon#read 4, iclass 22, count 0 2006.229.22:58:43.15#ibcon#about to read 5, iclass 22, count 0 2006.229.22:58:43.15#ibcon#read 5, iclass 22, count 0 2006.229.22:58:43.15#ibcon#about to read 6, iclass 22, count 0 2006.229.22:58:43.15#ibcon#read 6, iclass 22, count 0 2006.229.22:58:43.15#ibcon#end of sib2, iclass 22, count 0 2006.229.22:58:43.15#ibcon#*mode == 0, iclass 22, count 0 2006.229.22:58:43.15#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.22:58:43.15#ibcon#[27=USB\r\n] 2006.229.22:58:43.15#ibcon#*before write, iclass 22, count 0 2006.229.22:58:43.15#ibcon#enter sib2, iclass 22, count 0 2006.229.22:58:43.15#ibcon#flushed, iclass 22, count 0 2006.229.22:58:43.15#ibcon#about to write, iclass 22, count 0 2006.229.22:58:43.15#ibcon#wrote, iclass 22, count 0 2006.229.22:58:43.15#ibcon#about to read 3, iclass 22, count 0 2006.229.22:58:43.18#ibcon#read 3, iclass 22, count 0 2006.229.22:58:43.18#ibcon#about to read 4, iclass 22, count 0 2006.229.22:58:43.18#ibcon#read 4, iclass 22, count 0 2006.229.22:58:43.18#ibcon#about to read 5, iclass 22, count 0 2006.229.22:58:43.18#ibcon#read 5, iclass 22, count 0 2006.229.22:58:43.18#ibcon#about to read 6, iclass 22, count 0 2006.229.22:58:43.18#ibcon#read 6, iclass 22, count 0 2006.229.22:58:43.18#ibcon#end of sib2, iclass 22, count 0 2006.229.22:58:43.18#ibcon#*after write, iclass 22, count 0 2006.229.22:58:43.18#ibcon#*before return 0, iclass 22, count 0 2006.229.22:58:43.18#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:43.18#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.22:58:43.18#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.22:58:43.18#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.22:58:43.18$vck44/vblo=5,709.99 2006.229.22:58:43.18#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.22:58:43.18#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.22:58:43.18#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:43.18#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:43.18#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:43.18#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:43.18#ibcon#enter wrdev, iclass 24, count 0 2006.229.22:58:43.18#ibcon#first serial, iclass 24, count 0 2006.229.22:58:43.18#ibcon#enter sib2, iclass 24, count 0 2006.229.22:58:43.18#ibcon#flushed, iclass 24, count 0 2006.229.22:58:43.18#ibcon#about to write, iclass 24, count 0 2006.229.22:58:43.18#ibcon#wrote, iclass 24, count 0 2006.229.22:58:43.18#ibcon#about to read 3, iclass 24, count 0 2006.229.22:58:43.20#ibcon#read 3, iclass 24, count 0 2006.229.22:58:43.20#ibcon#about to read 4, iclass 24, count 0 2006.229.22:58:43.20#ibcon#read 4, iclass 24, count 0 2006.229.22:58:43.20#ibcon#about to read 5, iclass 24, count 0 2006.229.22:58:43.20#ibcon#read 5, iclass 24, count 0 2006.229.22:58:43.20#ibcon#about to read 6, iclass 24, count 0 2006.229.22:58:43.20#ibcon#read 6, iclass 24, count 0 2006.229.22:58:43.20#ibcon#end of sib2, iclass 24, count 0 2006.229.22:58:43.20#ibcon#*mode == 0, iclass 24, count 0 2006.229.22:58:43.20#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.22:58:43.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.22:58:43.20#ibcon#*before write, iclass 24, count 0 2006.229.22:58:43.20#ibcon#enter sib2, iclass 24, count 0 2006.229.22:58:43.20#ibcon#flushed, iclass 24, count 0 2006.229.22:58:43.20#ibcon#about to write, iclass 24, count 0 2006.229.22:58:43.20#ibcon#wrote, iclass 24, count 0 2006.229.22:58:43.20#ibcon#about to read 3, iclass 24, count 0 2006.229.22:58:43.24#ibcon#read 3, iclass 24, count 0 2006.229.22:58:43.24#ibcon#about to read 4, iclass 24, count 0 2006.229.22:58:43.24#ibcon#read 4, iclass 24, count 0 2006.229.22:58:43.24#ibcon#about to read 5, iclass 24, count 0 2006.229.22:58:43.24#ibcon#read 5, iclass 24, count 0 2006.229.22:58:43.24#ibcon#about to read 6, iclass 24, count 0 2006.229.22:58:43.24#ibcon#read 6, iclass 24, count 0 2006.229.22:58:43.24#ibcon#end of sib2, iclass 24, count 0 2006.229.22:58:43.24#ibcon#*after write, iclass 24, count 0 2006.229.22:58:43.24#ibcon#*before return 0, iclass 24, count 0 2006.229.22:58:43.24#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:43.24#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.22:58:43.24#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.22:58:43.24#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.22:58:43.24$vck44/vb=5,4 2006.229.22:58:43.24#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.22:58:43.24#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.22:58:43.24#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:43.24#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:43.30#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:43.30#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:43.30#ibcon#enter wrdev, iclass 26, count 2 2006.229.22:58:43.30#ibcon#first serial, iclass 26, count 2 2006.229.22:58:43.30#ibcon#enter sib2, iclass 26, count 2 2006.229.22:58:43.30#ibcon#flushed, iclass 26, count 2 2006.229.22:58:43.30#ibcon#about to write, iclass 26, count 2 2006.229.22:58:43.30#ibcon#wrote, iclass 26, count 2 2006.229.22:58:43.30#ibcon#about to read 3, iclass 26, count 2 2006.229.22:58:43.32#ibcon#read 3, iclass 26, count 2 2006.229.22:58:43.32#ibcon#about to read 4, iclass 26, count 2 2006.229.22:58:43.32#ibcon#read 4, iclass 26, count 2 2006.229.22:58:43.32#ibcon#about to read 5, iclass 26, count 2 2006.229.22:58:43.32#ibcon#read 5, iclass 26, count 2 2006.229.22:58:43.32#ibcon#about to read 6, iclass 26, count 2 2006.229.22:58:43.32#ibcon#read 6, iclass 26, count 2 2006.229.22:58:43.32#ibcon#end of sib2, iclass 26, count 2 2006.229.22:58:43.32#ibcon#*mode == 0, iclass 26, count 2 2006.229.22:58:43.32#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.22:58:43.32#ibcon#[27=AT05-04\r\n] 2006.229.22:58:43.32#ibcon#*before write, iclass 26, count 2 2006.229.22:58:43.32#ibcon#enter sib2, iclass 26, count 2 2006.229.22:58:43.32#ibcon#flushed, iclass 26, count 2 2006.229.22:58:43.32#ibcon#about to write, iclass 26, count 2 2006.229.22:58:43.32#ibcon#wrote, iclass 26, count 2 2006.229.22:58:43.32#ibcon#about to read 3, iclass 26, count 2 2006.229.22:58:43.35#ibcon#read 3, iclass 26, count 2 2006.229.22:58:43.35#ibcon#about to read 4, iclass 26, count 2 2006.229.22:58:43.35#ibcon#read 4, iclass 26, count 2 2006.229.22:58:43.35#ibcon#about to read 5, iclass 26, count 2 2006.229.22:58:43.35#ibcon#read 5, iclass 26, count 2 2006.229.22:58:43.35#ibcon#about to read 6, iclass 26, count 2 2006.229.22:58:43.35#ibcon#read 6, iclass 26, count 2 2006.229.22:58:43.35#ibcon#end of sib2, iclass 26, count 2 2006.229.22:58:43.35#ibcon#*after write, iclass 26, count 2 2006.229.22:58:43.35#ibcon#*before return 0, iclass 26, count 2 2006.229.22:58:43.35#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:43.35#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.22:58:43.35#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.22:58:43.35#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:43.35#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:43.47#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:43.47#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:43.47#ibcon#enter wrdev, iclass 26, count 0 2006.229.22:58:43.47#ibcon#first serial, iclass 26, count 0 2006.229.22:58:43.47#ibcon#enter sib2, iclass 26, count 0 2006.229.22:58:43.47#ibcon#flushed, iclass 26, count 0 2006.229.22:58:43.47#ibcon#about to write, iclass 26, count 0 2006.229.22:58:43.47#ibcon#wrote, iclass 26, count 0 2006.229.22:58:43.47#ibcon#about to read 3, iclass 26, count 0 2006.229.22:58:43.49#ibcon#read 3, iclass 26, count 0 2006.229.22:58:43.49#ibcon#about to read 4, iclass 26, count 0 2006.229.22:58:43.49#ibcon#read 4, iclass 26, count 0 2006.229.22:58:43.49#ibcon#about to read 5, iclass 26, count 0 2006.229.22:58:43.49#ibcon#read 5, iclass 26, count 0 2006.229.22:58:43.49#ibcon#about to read 6, iclass 26, count 0 2006.229.22:58:43.49#ibcon#read 6, iclass 26, count 0 2006.229.22:58:43.49#ibcon#end of sib2, iclass 26, count 0 2006.229.22:58:43.49#ibcon#*mode == 0, iclass 26, count 0 2006.229.22:58:43.49#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.22:58:43.49#ibcon#[27=USB\r\n] 2006.229.22:58:43.49#ibcon#*before write, iclass 26, count 0 2006.229.22:58:43.49#ibcon#enter sib2, iclass 26, count 0 2006.229.22:58:43.49#ibcon#flushed, iclass 26, count 0 2006.229.22:58:43.49#ibcon#about to write, iclass 26, count 0 2006.229.22:58:43.49#ibcon#wrote, iclass 26, count 0 2006.229.22:58:43.49#ibcon#about to read 3, iclass 26, count 0 2006.229.22:58:43.52#ibcon#read 3, iclass 26, count 0 2006.229.22:58:43.52#ibcon#about to read 4, iclass 26, count 0 2006.229.22:58:43.52#ibcon#read 4, iclass 26, count 0 2006.229.22:58:43.52#ibcon#about to read 5, iclass 26, count 0 2006.229.22:58:43.52#ibcon#read 5, iclass 26, count 0 2006.229.22:58:43.52#ibcon#about to read 6, iclass 26, count 0 2006.229.22:58:43.52#ibcon#read 6, iclass 26, count 0 2006.229.22:58:43.52#ibcon#end of sib2, iclass 26, count 0 2006.229.22:58:43.52#ibcon#*after write, iclass 26, count 0 2006.229.22:58:43.52#ibcon#*before return 0, iclass 26, count 0 2006.229.22:58:43.52#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:43.52#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.22:58:43.52#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.22:58:43.52#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.22:58:43.52$vck44/vblo=6,719.99 2006.229.22:58:43.52#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.22:58:43.52#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.22:58:43.52#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:43.52#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:43.52#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:43.52#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:43.52#ibcon#enter wrdev, iclass 28, count 0 2006.229.22:58:43.52#ibcon#first serial, iclass 28, count 0 2006.229.22:58:43.52#ibcon#enter sib2, iclass 28, count 0 2006.229.22:58:43.52#ibcon#flushed, iclass 28, count 0 2006.229.22:58:43.52#ibcon#about to write, iclass 28, count 0 2006.229.22:58:43.52#ibcon#wrote, iclass 28, count 0 2006.229.22:58:43.52#ibcon#about to read 3, iclass 28, count 0 2006.229.22:58:43.54#ibcon#read 3, iclass 28, count 0 2006.229.22:58:43.54#ibcon#about to read 4, iclass 28, count 0 2006.229.22:58:43.54#ibcon#read 4, iclass 28, count 0 2006.229.22:58:43.54#ibcon#about to read 5, iclass 28, count 0 2006.229.22:58:43.54#ibcon#read 5, iclass 28, count 0 2006.229.22:58:43.54#ibcon#about to read 6, iclass 28, count 0 2006.229.22:58:43.54#ibcon#read 6, iclass 28, count 0 2006.229.22:58:43.54#ibcon#end of sib2, iclass 28, count 0 2006.229.22:58:43.54#ibcon#*mode == 0, iclass 28, count 0 2006.229.22:58:43.54#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.22:58:43.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.22:58:43.54#ibcon#*before write, iclass 28, count 0 2006.229.22:58:43.54#ibcon#enter sib2, iclass 28, count 0 2006.229.22:58:43.54#ibcon#flushed, iclass 28, count 0 2006.229.22:58:43.54#ibcon#about to write, iclass 28, count 0 2006.229.22:58:43.54#ibcon#wrote, iclass 28, count 0 2006.229.22:58:43.54#ibcon#about to read 3, iclass 28, count 0 2006.229.22:58:43.58#ibcon#read 3, iclass 28, count 0 2006.229.22:58:43.58#ibcon#about to read 4, iclass 28, count 0 2006.229.22:58:43.58#ibcon#read 4, iclass 28, count 0 2006.229.22:58:43.58#ibcon#about to read 5, iclass 28, count 0 2006.229.22:58:43.58#ibcon#read 5, iclass 28, count 0 2006.229.22:58:43.58#ibcon#about to read 6, iclass 28, count 0 2006.229.22:58:43.58#ibcon#read 6, iclass 28, count 0 2006.229.22:58:43.58#ibcon#end of sib2, iclass 28, count 0 2006.229.22:58:43.58#ibcon#*after write, iclass 28, count 0 2006.229.22:58:43.58#ibcon#*before return 0, iclass 28, count 0 2006.229.22:58:43.58#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:43.58#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.22:58:43.58#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.22:58:43.58#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.22:58:43.58$vck44/vb=6,4 2006.229.22:58:43.58#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.22:58:43.58#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.22:58:43.58#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:43.58#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:43.64#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:43.64#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:43.64#ibcon#enter wrdev, iclass 30, count 2 2006.229.22:58:43.64#ibcon#first serial, iclass 30, count 2 2006.229.22:58:43.64#ibcon#enter sib2, iclass 30, count 2 2006.229.22:58:43.64#ibcon#flushed, iclass 30, count 2 2006.229.22:58:43.64#ibcon#about to write, iclass 30, count 2 2006.229.22:58:43.64#ibcon#wrote, iclass 30, count 2 2006.229.22:58:43.64#ibcon#about to read 3, iclass 30, count 2 2006.229.22:58:43.66#ibcon#read 3, iclass 30, count 2 2006.229.22:58:43.66#ibcon#about to read 4, iclass 30, count 2 2006.229.22:58:43.66#ibcon#read 4, iclass 30, count 2 2006.229.22:58:43.66#ibcon#about to read 5, iclass 30, count 2 2006.229.22:58:43.66#ibcon#read 5, iclass 30, count 2 2006.229.22:58:43.66#ibcon#about to read 6, iclass 30, count 2 2006.229.22:58:43.66#ibcon#read 6, iclass 30, count 2 2006.229.22:58:43.66#ibcon#end of sib2, iclass 30, count 2 2006.229.22:58:43.66#ibcon#*mode == 0, iclass 30, count 2 2006.229.22:58:43.66#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.22:58:43.66#ibcon#[27=AT06-04\r\n] 2006.229.22:58:43.66#ibcon#*before write, iclass 30, count 2 2006.229.22:58:43.66#ibcon#enter sib2, iclass 30, count 2 2006.229.22:58:43.66#ibcon#flushed, iclass 30, count 2 2006.229.22:58:43.66#ibcon#about to write, iclass 30, count 2 2006.229.22:58:43.66#ibcon#wrote, iclass 30, count 2 2006.229.22:58:43.66#ibcon#about to read 3, iclass 30, count 2 2006.229.22:58:43.69#ibcon#read 3, iclass 30, count 2 2006.229.22:58:43.69#ibcon#about to read 4, iclass 30, count 2 2006.229.22:58:43.69#ibcon#read 4, iclass 30, count 2 2006.229.22:58:43.69#ibcon#about to read 5, iclass 30, count 2 2006.229.22:58:43.69#ibcon#read 5, iclass 30, count 2 2006.229.22:58:43.69#ibcon#about to read 6, iclass 30, count 2 2006.229.22:58:43.69#ibcon#read 6, iclass 30, count 2 2006.229.22:58:43.69#ibcon#end of sib2, iclass 30, count 2 2006.229.22:58:43.69#ibcon#*after write, iclass 30, count 2 2006.229.22:58:43.69#ibcon#*before return 0, iclass 30, count 2 2006.229.22:58:43.69#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:43.69#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.22:58:43.69#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.22:58:43.69#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:43.69#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:43.81#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:43.81#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:43.81#ibcon#enter wrdev, iclass 30, count 0 2006.229.22:58:43.81#ibcon#first serial, iclass 30, count 0 2006.229.22:58:43.81#ibcon#enter sib2, iclass 30, count 0 2006.229.22:58:43.81#ibcon#flushed, iclass 30, count 0 2006.229.22:58:43.81#ibcon#about to write, iclass 30, count 0 2006.229.22:58:43.81#ibcon#wrote, iclass 30, count 0 2006.229.22:58:43.81#ibcon#about to read 3, iclass 30, count 0 2006.229.22:58:43.83#ibcon#read 3, iclass 30, count 0 2006.229.22:58:43.83#ibcon#about to read 4, iclass 30, count 0 2006.229.22:58:43.83#ibcon#read 4, iclass 30, count 0 2006.229.22:58:43.83#ibcon#about to read 5, iclass 30, count 0 2006.229.22:58:43.83#ibcon#read 5, iclass 30, count 0 2006.229.22:58:43.83#ibcon#about to read 6, iclass 30, count 0 2006.229.22:58:43.83#ibcon#read 6, iclass 30, count 0 2006.229.22:58:43.83#ibcon#end of sib2, iclass 30, count 0 2006.229.22:58:43.83#ibcon#*mode == 0, iclass 30, count 0 2006.229.22:58:43.83#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.22:58:43.83#ibcon#[27=USB\r\n] 2006.229.22:58:43.83#ibcon#*before write, iclass 30, count 0 2006.229.22:58:43.83#ibcon#enter sib2, iclass 30, count 0 2006.229.22:58:43.83#ibcon#flushed, iclass 30, count 0 2006.229.22:58:43.83#ibcon#about to write, iclass 30, count 0 2006.229.22:58:43.83#ibcon#wrote, iclass 30, count 0 2006.229.22:58:43.83#ibcon#about to read 3, iclass 30, count 0 2006.229.22:58:43.86#ibcon#read 3, iclass 30, count 0 2006.229.22:58:43.86#ibcon#about to read 4, iclass 30, count 0 2006.229.22:58:43.86#ibcon#read 4, iclass 30, count 0 2006.229.22:58:43.86#ibcon#about to read 5, iclass 30, count 0 2006.229.22:58:43.86#ibcon#read 5, iclass 30, count 0 2006.229.22:58:43.86#ibcon#about to read 6, iclass 30, count 0 2006.229.22:58:43.86#ibcon#read 6, iclass 30, count 0 2006.229.22:58:43.86#ibcon#end of sib2, iclass 30, count 0 2006.229.22:58:43.86#ibcon#*after write, iclass 30, count 0 2006.229.22:58:43.86#ibcon#*before return 0, iclass 30, count 0 2006.229.22:58:43.86#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:43.86#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.22:58:43.86#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.22:58:43.86#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.22:58:43.86$vck44/vblo=7,734.99 2006.229.22:58:43.86#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.22:58:43.86#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.22:58:43.86#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:43.86#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:43.86#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:43.86#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:43.86#ibcon#enter wrdev, iclass 32, count 0 2006.229.22:58:43.86#ibcon#first serial, iclass 32, count 0 2006.229.22:58:43.86#ibcon#enter sib2, iclass 32, count 0 2006.229.22:58:43.86#ibcon#flushed, iclass 32, count 0 2006.229.22:58:43.86#ibcon#about to write, iclass 32, count 0 2006.229.22:58:43.86#ibcon#wrote, iclass 32, count 0 2006.229.22:58:43.86#ibcon#about to read 3, iclass 32, count 0 2006.229.22:58:43.88#ibcon#read 3, iclass 32, count 0 2006.229.22:58:43.88#ibcon#about to read 4, iclass 32, count 0 2006.229.22:58:43.88#ibcon#read 4, iclass 32, count 0 2006.229.22:58:43.88#ibcon#about to read 5, iclass 32, count 0 2006.229.22:58:43.88#ibcon#read 5, iclass 32, count 0 2006.229.22:58:43.88#ibcon#about to read 6, iclass 32, count 0 2006.229.22:58:43.88#ibcon#read 6, iclass 32, count 0 2006.229.22:58:43.88#ibcon#end of sib2, iclass 32, count 0 2006.229.22:58:43.88#ibcon#*mode == 0, iclass 32, count 0 2006.229.22:58:43.88#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.22:58:43.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.22:58:43.88#ibcon#*before write, iclass 32, count 0 2006.229.22:58:43.88#ibcon#enter sib2, iclass 32, count 0 2006.229.22:58:43.88#ibcon#flushed, iclass 32, count 0 2006.229.22:58:43.88#ibcon#about to write, iclass 32, count 0 2006.229.22:58:43.88#ibcon#wrote, iclass 32, count 0 2006.229.22:58:43.88#ibcon#about to read 3, iclass 32, count 0 2006.229.22:58:43.92#ibcon#read 3, iclass 32, count 0 2006.229.22:58:43.92#ibcon#about to read 4, iclass 32, count 0 2006.229.22:58:43.92#ibcon#read 4, iclass 32, count 0 2006.229.22:58:43.92#ibcon#about to read 5, iclass 32, count 0 2006.229.22:58:43.92#ibcon#read 5, iclass 32, count 0 2006.229.22:58:43.92#ibcon#about to read 6, iclass 32, count 0 2006.229.22:58:43.92#ibcon#read 6, iclass 32, count 0 2006.229.22:58:43.92#ibcon#end of sib2, iclass 32, count 0 2006.229.22:58:43.92#ibcon#*after write, iclass 32, count 0 2006.229.22:58:43.92#ibcon#*before return 0, iclass 32, count 0 2006.229.22:58:43.92#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:43.92#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.22:58:43.92#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.22:58:43.92#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.22:58:43.92$vck44/vb=7,4 2006.229.22:58:43.92#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.22:58:43.92#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.22:58:43.92#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:43.92#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:43.98#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:43.98#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:43.98#ibcon#enter wrdev, iclass 34, count 2 2006.229.22:58:43.98#ibcon#first serial, iclass 34, count 2 2006.229.22:58:43.98#ibcon#enter sib2, iclass 34, count 2 2006.229.22:58:43.98#ibcon#flushed, iclass 34, count 2 2006.229.22:58:43.98#ibcon#about to write, iclass 34, count 2 2006.229.22:58:43.98#ibcon#wrote, iclass 34, count 2 2006.229.22:58:43.98#ibcon#about to read 3, iclass 34, count 2 2006.229.22:58:44.00#ibcon#read 3, iclass 34, count 2 2006.229.22:58:44.00#ibcon#about to read 4, iclass 34, count 2 2006.229.22:58:44.00#ibcon#read 4, iclass 34, count 2 2006.229.22:58:44.00#ibcon#about to read 5, iclass 34, count 2 2006.229.22:58:44.00#ibcon#read 5, iclass 34, count 2 2006.229.22:58:44.00#ibcon#about to read 6, iclass 34, count 2 2006.229.22:58:44.00#ibcon#read 6, iclass 34, count 2 2006.229.22:58:44.00#ibcon#end of sib2, iclass 34, count 2 2006.229.22:58:44.00#ibcon#*mode == 0, iclass 34, count 2 2006.229.22:58:44.00#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.22:58:44.00#ibcon#[27=AT07-04\r\n] 2006.229.22:58:44.00#ibcon#*before write, iclass 34, count 2 2006.229.22:58:44.00#ibcon#enter sib2, iclass 34, count 2 2006.229.22:58:44.00#ibcon#flushed, iclass 34, count 2 2006.229.22:58:44.00#ibcon#about to write, iclass 34, count 2 2006.229.22:58:44.00#ibcon#wrote, iclass 34, count 2 2006.229.22:58:44.00#ibcon#about to read 3, iclass 34, count 2 2006.229.22:58:44.03#ibcon#read 3, iclass 34, count 2 2006.229.22:58:44.03#ibcon#about to read 4, iclass 34, count 2 2006.229.22:58:44.03#ibcon#read 4, iclass 34, count 2 2006.229.22:58:44.03#ibcon#about to read 5, iclass 34, count 2 2006.229.22:58:44.03#ibcon#read 5, iclass 34, count 2 2006.229.22:58:44.03#ibcon#about to read 6, iclass 34, count 2 2006.229.22:58:44.03#ibcon#read 6, iclass 34, count 2 2006.229.22:58:44.03#ibcon#end of sib2, iclass 34, count 2 2006.229.22:58:44.03#ibcon#*after write, iclass 34, count 2 2006.229.22:58:44.03#ibcon#*before return 0, iclass 34, count 2 2006.229.22:58:44.03#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:44.03#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.22:58:44.03#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.22:58:44.03#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:44.03#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:44.15#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:44.15#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:44.15#ibcon#enter wrdev, iclass 34, count 0 2006.229.22:58:44.15#ibcon#first serial, iclass 34, count 0 2006.229.22:58:44.15#ibcon#enter sib2, iclass 34, count 0 2006.229.22:58:44.15#ibcon#flushed, iclass 34, count 0 2006.229.22:58:44.15#ibcon#about to write, iclass 34, count 0 2006.229.22:58:44.15#ibcon#wrote, iclass 34, count 0 2006.229.22:58:44.15#ibcon#about to read 3, iclass 34, count 0 2006.229.22:58:44.17#ibcon#read 3, iclass 34, count 0 2006.229.22:58:44.17#ibcon#about to read 4, iclass 34, count 0 2006.229.22:58:44.17#ibcon#read 4, iclass 34, count 0 2006.229.22:58:44.17#ibcon#about to read 5, iclass 34, count 0 2006.229.22:58:44.17#ibcon#read 5, iclass 34, count 0 2006.229.22:58:44.17#ibcon#about to read 6, iclass 34, count 0 2006.229.22:58:44.17#ibcon#read 6, iclass 34, count 0 2006.229.22:58:44.17#ibcon#end of sib2, iclass 34, count 0 2006.229.22:58:44.17#ibcon#*mode == 0, iclass 34, count 0 2006.229.22:58:44.17#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.22:58:44.17#ibcon#[27=USB\r\n] 2006.229.22:58:44.17#ibcon#*before write, iclass 34, count 0 2006.229.22:58:44.17#ibcon#enter sib2, iclass 34, count 0 2006.229.22:58:44.17#ibcon#flushed, iclass 34, count 0 2006.229.22:58:44.17#ibcon#about to write, iclass 34, count 0 2006.229.22:58:44.17#ibcon#wrote, iclass 34, count 0 2006.229.22:58:44.17#ibcon#about to read 3, iclass 34, count 0 2006.229.22:58:44.20#ibcon#read 3, iclass 34, count 0 2006.229.22:58:44.20#ibcon#about to read 4, iclass 34, count 0 2006.229.22:58:44.20#ibcon#read 4, iclass 34, count 0 2006.229.22:58:44.20#ibcon#about to read 5, iclass 34, count 0 2006.229.22:58:44.20#ibcon#read 5, iclass 34, count 0 2006.229.22:58:44.20#ibcon#about to read 6, iclass 34, count 0 2006.229.22:58:44.20#ibcon#read 6, iclass 34, count 0 2006.229.22:58:44.20#ibcon#end of sib2, iclass 34, count 0 2006.229.22:58:44.20#ibcon#*after write, iclass 34, count 0 2006.229.22:58:44.20#ibcon#*before return 0, iclass 34, count 0 2006.229.22:58:44.20#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:44.20#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.22:58:44.20#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.22:58:44.20#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.22:58:44.20$vck44/vblo=8,744.99 2006.229.22:58:44.20#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.22:58:44.20#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.22:58:44.20#ibcon#ireg 17 cls_cnt 0 2006.229.22:58:44.20#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:44.20#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:44.20#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:44.20#ibcon#enter wrdev, iclass 36, count 0 2006.229.22:58:44.20#ibcon#first serial, iclass 36, count 0 2006.229.22:58:44.20#ibcon#enter sib2, iclass 36, count 0 2006.229.22:58:44.20#ibcon#flushed, iclass 36, count 0 2006.229.22:58:44.20#ibcon#about to write, iclass 36, count 0 2006.229.22:58:44.20#ibcon#wrote, iclass 36, count 0 2006.229.22:58:44.20#ibcon#about to read 3, iclass 36, count 0 2006.229.22:58:44.22#ibcon#read 3, iclass 36, count 0 2006.229.22:58:44.22#ibcon#about to read 4, iclass 36, count 0 2006.229.22:58:44.22#ibcon#read 4, iclass 36, count 0 2006.229.22:58:44.22#ibcon#about to read 5, iclass 36, count 0 2006.229.22:58:44.22#ibcon#read 5, iclass 36, count 0 2006.229.22:58:44.22#ibcon#about to read 6, iclass 36, count 0 2006.229.22:58:44.22#ibcon#read 6, iclass 36, count 0 2006.229.22:58:44.22#ibcon#end of sib2, iclass 36, count 0 2006.229.22:58:44.22#ibcon#*mode == 0, iclass 36, count 0 2006.229.22:58:44.22#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.22:58:44.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.22:58:44.22#ibcon#*before write, iclass 36, count 0 2006.229.22:58:44.22#ibcon#enter sib2, iclass 36, count 0 2006.229.22:58:44.22#ibcon#flushed, iclass 36, count 0 2006.229.22:58:44.22#ibcon#about to write, iclass 36, count 0 2006.229.22:58:44.22#ibcon#wrote, iclass 36, count 0 2006.229.22:58:44.22#ibcon#about to read 3, iclass 36, count 0 2006.229.22:58:44.26#ibcon#read 3, iclass 36, count 0 2006.229.22:58:44.26#ibcon#about to read 4, iclass 36, count 0 2006.229.22:58:44.26#ibcon#read 4, iclass 36, count 0 2006.229.22:58:44.26#ibcon#about to read 5, iclass 36, count 0 2006.229.22:58:44.26#ibcon#read 5, iclass 36, count 0 2006.229.22:58:44.26#ibcon#about to read 6, iclass 36, count 0 2006.229.22:58:44.26#ibcon#read 6, iclass 36, count 0 2006.229.22:58:44.26#ibcon#end of sib2, iclass 36, count 0 2006.229.22:58:44.26#ibcon#*after write, iclass 36, count 0 2006.229.22:58:44.26#ibcon#*before return 0, iclass 36, count 0 2006.229.22:58:44.26#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:44.26#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.22:58:44.26#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.22:58:44.26#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.22:58:44.26$vck44/vb=8,4 2006.229.22:58:44.26#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.22:58:44.26#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.22:58:44.26#ibcon#ireg 11 cls_cnt 2 2006.229.22:58:44.26#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:44.32#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:44.32#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:44.32#ibcon#enter wrdev, iclass 38, count 2 2006.229.22:58:44.32#ibcon#first serial, iclass 38, count 2 2006.229.22:58:44.32#ibcon#enter sib2, iclass 38, count 2 2006.229.22:58:44.32#ibcon#flushed, iclass 38, count 2 2006.229.22:58:44.32#ibcon#about to write, iclass 38, count 2 2006.229.22:58:44.32#ibcon#wrote, iclass 38, count 2 2006.229.22:58:44.32#ibcon#about to read 3, iclass 38, count 2 2006.229.22:58:44.34#ibcon#read 3, iclass 38, count 2 2006.229.22:58:44.34#ibcon#about to read 4, iclass 38, count 2 2006.229.22:58:44.34#ibcon#read 4, iclass 38, count 2 2006.229.22:58:44.34#ibcon#about to read 5, iclass 38, count 2 2006.229.22:58:44.34#ibcon#read 5, iclass 38, count 2 2006.229.22:58:44.34#ibcon#about to read 6, iclass 38, count 2 2006.229.22:58:44.34#ibcon#read 6, iclass 38, count 2 2006.229.22:58:44.34#ibcon#end of sib2, iclass 38, count 2 2006.229.22:58:44.34#ibcon#*mode == 0, iclass 38, count 2 2006.229.22:58:44.34#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.22:58:44.34#ibcon#[27=AT08-04\r\n] 2006.229.22:58:44.34#ibcon#*before write, iclass 38, count 2 2006.229.22:58:44.34#ibcon#enter sib2, iclass 38, count 2 2006.229.22:58:44.34#ibcon#flushed, iclass 38, count 2 2006.229.22:58:44.34#ibcon#about to write, iclass 38, count 2 2006.229.22:58:44.34#ibcon#wrote, iclass 38, count 2 2006.229.22:58:44.34#ibcon#about to read 3, iclass 38, count 2 2006.229.22:58:44.37#ibcon#read 3, iclass 38, count 2 2006.229.22:58:44.37#ibcon#about to read 4, iclass 38, count 2 2006.229.22:58:44.37#ibcon#read 4, iclass 38, count 2 2006.229.22:58:44.37#ibcon#about to read 5, iclass 38, count 2 2006.229.22:58:44.37#ibcon#read 5, iclass 38, count 2 2006.229.22:58:44.37#ibcon#about to read 6, iclass 38, count 2 2006.229.22:58:44.37#ibcon#read 6, iclass 38, count 2 2006.229.22:58:44.37#ibcon#end of sib2, iclass 38, count 2 2006.229.22:58:44.37#ibcon#*after write, iclass 38, count 2 2006.229.22:58:44.37#ibcon#*before return 0, iclass 38, count 2 2006.229.22:58:44.37#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:44.37#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.22:58:44.37#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.22:58:44.37#ibcon#ireg 7 cls_cnt 0 2006.229.22:58:44.37#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:44.49#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:44.49#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:44.49#ibcon#enter wrdev, iclass 38, count 0 2006.229.22:58:44.49#ibcon#first serial, iclass 38, count 0 2006.229.22:58:44.49#ibcon#enter sib2, iclass 38, count 0 2006.229.22:58:44.49#ibcon#flushed, iclass 38, count 0 2006.229.22:58:44.49#ibcon#about to write, iclass 38, count 0 2006.229.22:58:44.49#ibcon#wrote, iclass 38, count 0 2006.229.22:58:44.49#ibcon#about to read 3, iclass 38, count 0 2006.229.22:58:44.51#ibcon#read 3, iclass 38, count 0 2006.229.22:58:44.51#ibcon#about to read 4, iclass 38, count 0 2006.229.22:58:44.51#ibcon#read 4, iclass 38, count 0 2006.229.22:58:44.51#ibcon#about to read 5, iclass 38, count 0 2006.229.22:58:44.51#ibcon#read 5, iclass 38, count 0 2006.229.22:58:44.51#ibcon#about to read 6, iclass 38, count 0 2006.229.22:58:44.51#ibcon#read 6, iclass 38, count 0 2006.229.22:58:44.51#ibcon#end of sib2, iclass 38, count 0 2006.229.22:58:44.51#ibcon#*mode == 0, iclass 38, count 0 2006.229.22:58:44.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.22:58:44.51#ibcon#[27=USB\r\n] 2006.229.22:58:44.51#ibcon#*before write, iclass 38, count 0 2006.229.22:58:44.51#ibcon#enter sib2, iclass 38, count 0 2006.229.22:58:44.51#ibcon#flushed, iclass 38, count 0 2006.229.22:58:44.51#ibcon#about to write, iclass 38, count 0 2006.229.22:58:44.51#ibcon#wrote, iclass 38, count 0 2006.229.22:58:44.51#ibcon#about to read 3, iclass 38, count 0 2006.229.22:58:44.54#ibcon#read 3, iclass 38, count 0 2006.229.22:58:44.54#ibcon#about to read 4, iclass 38, count 0 2006.229.22:58:44.54#ibcon#read 4, iclass 38, count 0 2006.229.22:58:44.54#ibcon#about to read 5, iclass 38, count 0 2006.229.22:58:44.54#ibcon#read 5, iclass 38, count 0 2006.229.22:58:44.54#ibcon#about to read 6, iclass 38, count 0 2006.229.22:58:44.54#ibcon#read 6, iclass 38, count 0 2006.229.22:58:44.54#ibcon#end of sib2, iclass 38, count 0 2006.229.22:58:44.54#ibcon#*after write, iclass 38, count 0 2006.229.22:58:44.54#ibcon#*before return 0, iclass 38, count 0 2006.229.22:58:44.54#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:44.54#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.22:58:44.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.22:58:44.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.22:58:44.54$vck44/vabw=wide 2006.229.22:58:44.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.22:58:44.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.22:58:44.54#ibcon#ireg 8 cls_cnt 0 2006.229.22:58:44.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:58:44.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:58:44.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:58:44.54#ibcon#enter wrdev, iclass 40, count 0 2006.229.22:58:44.54#ibcon#first serial, iclass 40, count 0 2006.229.22:58:44.54#ibcon#enter sib2, iclass 40, count 0 2006.229.22:58:44.54#ibcon#flushed, iclass 40, count 0 2006.229.22:58:44.54#ibcon#about to write, iclass 40, count 0 2006.229.22:58:44.54#ibcon#wrote, iclass 40, count 0 2006.229.22:58:44.54#ibcon#about to read 3, iclass 40, count 0 2006.229.22:58:44.56#ibcon#read 3, iclass 40, count 0 2006.229.22:58:44.56#ibcon#about to read 4, iclass 40, count 0 2006.229.22:58:44.56#ibcon#read 4, iclass 40, count 0 2006.229.22:58:44.56#ibcon#about to read 5, iclass 40, count 0 2006.229.22:58:44.56#ibcon#read 5, iclass 40, count 0 2006.229.22:58:44.56#ibcon#about to read 6, iclass 40, count 0 2006.229.22:58:44.56#ibcon#read 6, iclass 40, count 0 2006.229.22:58:44.56#ibcon#end of sib2, iclass 40, count 0 2006.229.22:58:44.56#ibcon#*mode == 0, iclass 40, count 0 2006.229.22:58:44.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.22:58:44.56#ibcon#[25=BW32\r\n] 2006.229.22:58:44.56#ibcon#*before write, iclass 40, count 0 2006.229.22:58:44.56#ibcon#enter sib2, iclass 40, count 0 2006.229.22:58:44.56#ibcon#flushed, iclass 40, count 0 2006.229.22:58:44.56#ibcon#about to write, iclass 40, count 0 2006.229.22:58:44.56#ibcon#wrote, iclass 40, count 0 2006.229.22:58:44.56#ibcon#about to read 3, iclass 40, count 0 2006.229.22:58:44.59#ibcon#read 3, iclass 40, count 0 2006.229.22:58:44.59#ibcon#about to read 4, iclass 40, count 0 2006.229.22:58:44.59#ibcon#read 4, iclass 40, count 0 2006.229.22:58:44.59#ibcon#about to read 5, iclass 40, count 0 2006.229.22:58:44.59#ibcon#read 5, iclass 40, count 0 2006.229.22:58:44.59#ibcon#about to read 6, iclass 40, count 0 2006.229.22:58:44.59#ibcon#read 6, iclass 40, count 0 2006.229.22:58:44.59#ibcon#end of sib2, iclass 40, count 0 2006.229.22:58:44.59#ibcon#*after write, iclass 40, count 0 2006.229.22:58:44.59#ibcon#*before return 0, iclass 40, count 0 2006.229.22:58:44.59#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:58:44.59#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.22:58:44.59#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.22:58:44.59#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.22:58:44.59$vck44/vbbw=wide 2006.229.22:58:44.59#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.22:58:44.59#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.22:58:44.59#ibcon#ireg 8 cls_cnt 0 2006.229.22:58:44.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:58:44.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:58:44.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:58:44.66#ibcon#enter wrdev, iclass 4, count 0 2006.229.22:58:44.66#ibcon#first serial, iclass 4, count 0 2006.229.22:58:44.66#ibcon#enter sib2, iclass 4, count 0 2006.229.22:58:44.66#ibcon#flushed, iclass 4, count 0 2006.229.22:58:44.66#ibcon#about to write, iclass 4, count 0 2006.229.22:58:44.66#ibcon#wrote, iclass 4, count 0 2006.229.22:58:44.66#ibcon#about to read 3, iclass 4, count 0 2006.229.22:58:44.68#ibcon#read 3, iclass 4, count 0 2006.229.22:58:44.68#ibcon#about to read 4, iclass 4, count 0 2006.229.22:58:44.68#ibcon#read 4, iclass 4, count 0 2006.229.22:58:44.68#ibcon#about to read 5, iclass 4, count 0 2006.229.22:58:44.68#ibcon#read 5, iclass 4, count 0 2006.229.22:58:44.68#ibcon#about to read 6, iclass 4, count 0 2006.229.22:58:44.68#ibcon#read 6, iclass 4, count 0 2006.229.22:58:44.68#ibcon#end of sib2, iclass 4, count 0 2006.229.22:58:44.68#ibcon#*mode == 0, iclass 4, count 0 2006.229.22:58:44.68#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.22:58:44.68#ibcon#[27=BW32\r\n] 2006.229.22:58:44.68#ibcon#*before write, iclass 4, count 0 2006.229.22:58:44.68#ibcon#enter sib2, iclass 4, count 0 2006.229.22:58:44.68#ibcon#flushed, iclass 4, count 0 2006.229.22:58:44.68#ibcon#about to write, iclass 4, count 0 2006.229.22:58:44.68#ibcon#wrote, iclass 4, count 0 2006.229.22:58:44.68#ibcon#about to read 3, iclass 4, count 0 2006.229.22:58:44.71#ibcon#read 3, iclass 4, count 0 2006.229.22:58:44.71#ibcon#about to read 4, iclass 4, count 0 2006.229.22:58:44.71#ibcon#read 4, iclass 4, count 0 2006.229.22:58:44.71#ibcon#about to read 5, iclass 4, count 0 2006.229.22:58:44.71#ibcon#read 5, iclass 4, count 0 2006.229.22:58:44.71#ibcon#about to read 6, iclass 4, count 0 2006.229.22:58:44.71#ibcon#read 6, iclass 4, count 0 2006.229.22:58:44.71#ibcon#end of sib2, iclass 4, count 0 2006.229.22:58:44.71#ibcon#*after write, iclass 4, count 0 2006.229.22:58:44.71#ibcon#*before return 0, iclass 4, count 0 2006.229.22:58:44.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:58:44.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.22:58:44.71#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.22:58:44.71#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.22:58:44.71$setupk4/ifdk4 2006.229.22:58:44.71$ifdk4/lo= 2006.229.22:58:44.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.22:58:44.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.22:58:44.71$ifdk4/patch= 2006.229.22:58:44.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.22:58:44.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.22:58:44.71$setupk4/!*+20s 2006.229.22:58:52.01#abcon#<5=/08 1.6 5.7 29.38 861002.6\r\n> 2006.229.22:58:52.03#abcon#{5=INTERFACE CLEAR} 2006.229.22:58:52.09#abcon#[5=S1D000X0/0*\r\n] 2006.229.22:58:59.21$setupk4/"tpicd 2006.229.22:58:59.21$setupk4/echo=off 2006.229.22:58:59.21$setupk4/xlog=off 2006.229.22:58:59.21:!2006.229.23:00:55 2006.229.22:59:01.14#trakl#Source acquired 2006.229.22:59:02.14#flagr#flagr/antenna,acquired 2006.229.23:00:55.00:preob 2006.229.23:00:55.14/onsource/TRACKING 2006.229.23:00:55.14:!2006.229.23:01:05 2006.229.23:01:05.00:"tape 2006.229.23:01:05.00:"st=record 2006.229.23:01:05.00:data_valid=on 2006.229.23:01:05.00:midob 2006.229.23:01:05.14/onsource/TRACKING 2006.229.23:01:05.14/wx/29.52,1002.6,85 2006.229.23:01:05.26/cable/+6.4147E-03 2006.229.23:01:06.35/va/01,08,usb,yes,29,32 2006.229.23:01:06.35/va/02,07,usb,yes,32,32 2006.229.23:01:06.35/va/03,06,usb,yes,40,42 2006.229.23:01:06.35/va/04,07,usb,yes,33,34 2006.229.23:01:06.35/va/05,04,usb,yes,29,30 2006.229.23:01:06.35/va/06,04,usb,yes,33,33 2006.229.23:01:06.35/va/07,05,usb,yes,29,30 2006.229.23:01:06.35/va/08,06,usb,yes,21,26 2006.229.23:01:06.58/valo/01,524.99,yes,locked 2006.229.23:01:06.58/valo/02,534.99,yes,locked 2006.229.23:01:06.58/valo/03,564.99,yes,locked 2006.229.23:01:06.58/valo/04,624.99,yes,locked 2006.229.23:01:06.58/valo/05,734.99,yes,locked 2006.229.23:01:06.58/valo/06,814.99,yes,locked 2006.229.23:01:06.58/valo/07,864.99,yes,locked 2006.229.23:01:06.58/valo/08,884.99,yes,locked 2006.229.23:01:07.67/vb/01,04,usb,yes,31,28 2006.229.23:01:07.67/vb/02,04,usb,yes,33,33 2006.229.23:01:07.67/vb/03,04,usb,yes,30,33 2006.229.23:01:07.67/vb/04,04,usb,yes,34,33 2006.229.23:01:07.67/vb/05,04,usb,yes,27,29 2006.229.23:01:07.67/vb/06,04,usb,yes,32,28 2006.229.23:01:07.67/vb/07,04,usb,yes,31,31 2006.229.23:01:07.67/vb/08,04,usb,yes,29,32 2006.229.23:01:07.90/vblo/01,629.99,yes,locked 2006.229.23:01:07.90/vblo/02,634.99,yes,locked 2006.229.23:01:07.90/vblo/03,649.99,yes,locked 2006.229.23:01:07.90/vblo/04,679.99,yes,locked 2006.229.23:01:07.90/vblo/05,709.99,yes,locked 2006.229.23:01:07.90/vblo/06,719.99,yes,locked 2006.229.23:01:07.90/vblo/07,734.99,yes,locked 2006.229.23:01:07.90/vblo/08,744.99,yes,locked 2006.229.23:01:08.05/vabw/8 2006.229.23:01:08.20/vbbw/8 2006.229.23:01:08.29/xfe/off,on,13.5 2006.229.23:01:08.66/ifatt/23,28,28,28 2006.229.23:01:09.07/fmout-gps/S +4.55E-07 2006.229.23:01:09.11:!2006.229.23:05:35 2006.229.23:05:35.01:data_valid=off 2006.229.23:05:35.01:"et 2006.229.23:05:35.02:!+3s 2006.229.23:05:38.03:"tape 2006.229.23:05:38.03:postob 2006.229.23:05:38.15/cable/+6.4139E-03 2006.229.23:05:38.15/wx/29.61,1002.6,83 2006.229.23:05:38.21/fmout-gps/S +4.55E-07 2006.229.23:05:38.21:scan_name=229-2314,jd0608,200 2006.229.23:05:38.21:source=0642+449,064632.03,445116.6,2000.0,cw 2006.229.23:05:39.14#flagr#flagr/antenna,new-source 2006.229.23:05:39.14:checkk5 2006.229.23:05:39.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:05:39.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:05:40.37/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:05:40.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:05:41.17/chk_obsdata//k5ts1/T2292301??a.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.23:05:41.58/chk_obsdata//k5ts2/T2292301??b.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.23:05:41.99/chk_obsdata//k5ts3/T2292301??c.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.23:05:42.40/chk_obsdata//k5ts4/T2292301??d.dat file size is correct (nominal:1080MB, actual:1076MB). 2006.229.23:05:43.11/k5log//k5ts1_log_newline 2006.229.23:05:43.80/k5log//k5ts2_log_newline 2006.229.23:05:44.50/k5log//k5ts3_log_newline 2006.229.23:05:45.21/k5log//k5ts4_log_newline 2006.229.23:05:45.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:05:45.23:setupk4=1 2006.229.23:05:45.23$setupk4/echo=on 2006.229.23:05:45.23$setupk4/pcalon 2006.229.23:05:45.23$pcalon/"no phase cal control is implemented here 2006.229.23:05:45.23$setupk4/"tpicd=stop 2006.229.23:05:45.23$setupk4/"rec=synch_on 2006.229.23:05:45.23$setupk4/"rec_mode=128 2006.229.23:05:45.23$setupk4/!* 2006.229.23:05:45.23$setupk4/recpk4 2006.229.23:05:45.23$recpk4/recpatch= 2006.229.23:05:45.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:05:45.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:05:45.24$setupk4/vck44 2006.229.23:05:45.24$vck44/valo=1,524.99 2006.229.23:05:45.24#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:05:45.24#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:05:45.24#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:45.24#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:45.24#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:45.24#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:45.24#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:05:45.24#ibcon#first serial, iclass 31, count 0 2006.229.23:05:45.24#ibcon#enter sib2, iclass 31, count 0 2006.229.23:05:45.24#ibcon#flushed, iclass 31, count 0 2006.229.23:05:45.24#ibcon#about to write, iclass 31, count 0 2006.229.23:05:45.24#ibcon#wrote, iclass 31, count 0 2006.229.23:05:45.24#ibcon#about to read 3, iclass 31, count 0 2006.229.23:05:45.26#ibcon#read 3, iclass 31, count 0 2006.229.23:05:45.26#ibcon#about to read 4, iclass 31, count 0 2006.229.23:05:45.26#ibcon#read 4, iclass 31, count 0 2006.229.23:05:45.26#ibcon#about to read 5, iclass 31, count 0 2006.229.23:05:45.26#ibcon#read 5, iclass 31, count 0 2006.229.23:05:45.26#ibcon#about to read 6, iclass 31, count 0 2006.229.23:05:45.26#ibcon#read 6, iclass 31, count 0 2006.229.23:05:45.26#ibcon#end of sib2, iclass 31, count 0 2006.229.23:05:45.26#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:05:45.26#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:05:45.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:05:45.26#ibcon#*before write, iclass 31, count 0 2006.229.23:05:45.26#ibcon#enter sib2, iclass 31, count 0 2006.229.23:05:45.26#ibcon#flushed, iclass 31, count 0 2006.229.23:05:45.26#ibcon#about to write, iclass 31, count 0 2006.229.23:05:45.26#ibcon#wrote, iclass 31, count 0 2006.229.23:05:45.26#ibcon#about to read 3, iclass 31, count 0 2006.229.23:05:45.31#ibcon#read 3, iclass 31, count 0 2006.229.23:05:45.31#ibcon#about to read 4, iclass 31, count 0 2006.229.23:05:45.31#ibcon#read 4, iclass 31, count 0 2006.229.23:05:45.31#ibcon#about to read 5, iclass 31, count 0 2006.229.23:05:45.31#ibcon#read 5, iclass 31, count 0 2006.229.23:05:45.31#ibcon#about to read 6, iclass 31, count 0 2006.229.23:05:45.31#ibcon#read 6, iclass 31, count 0 2006.229.23:05:45.31#ibcon#end of sib2, iclass 31, count 0 2006.229.23:05:45.31#ibcon#*after write, iclass 31, count 0 2006.229.23:05:45.31#ibcon#*before return 0, iclass 31, count 0 2006.229.23:05:45.31#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:45.31#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:45.31#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:05:45.31#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:05:45.31$vck44/va=1,8 2006.229.23:05:45.31#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.23:05:45.31#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.23:05:45.31#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:45.31#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:45.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:45.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:45.31#ibcon#enter wrdev, iclass 33, count 2 2006.229.23:05:45.31#ibcon#first serial, iclass 33, count 2 2006.229.23:05:45.31#ibcon#enter sib2, iclass 33, count 2 2006.229.23:05:45.31#ibcon#flushed, iclass 33, count 2 2006.229.23:05:45.31#ibcon#about to write, iclass 33, count 2 2006.229.23:05:45.31#ibcon#wrote, iclass 33, count 2 2006.229.23:05:45.31#ibcon#about to read 3, iclass 33, count 2 2006.229.23:05:45.33#ibcon#read 3, iclass 33, count 2 2006.229.23:05:45.33#ibcon#about to read 4, iclass 33, count 2 2006.229.23:05:45.33#ibcon#read 4, iclass 33, count 2 2006.229.23:05:45.33#ibcon#about to read 5, iclass 33, count 2 2006.229.23:05:45.33#ibcon#read 5, iclass 33, count 2 2006.229.23:05:45.33#ibcon#about to read 6, iclass 33, count 2 2006.229.23:05:45.33#ibcon#read 6, iclass 33, count 2 2006.229.23:05:45.33#ibcon#end of sib2, iclass 33, count 2 2006.229.23:05:45.33#ibcon#*mode == 0, iclass 33, count 2 2006.229.23:05:45.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.23:05:45.33#ibcon#[25=AT01-08\r\n] 2006.229.23:05:45.33#ibcon#*before write, iclass 33, count 2 2006.229.23:05:45.33#ibcon#enter sib2, iclass 33, count 2 2006.229.23:05:45.33#ibcon#flushed, iclass 33, count 2 2006.229.23:05:45.33#ibcon#about to write, iclass 33, count 2 2006.229.23:05:45.33#ibcon#wrote, iclass 33, count 2 2006.229.23:05:45.33#ibcon#about to read 3, iclass 33, count 2 2006.229.23:05:45.36#ibcon#read 3, iclass 33, count 2 2006.229.23:05:45.36#ibcon#about to read 4, iclass 33, count 2 2006.229.23:05:45.36#ibcon#read 4, iclass 33, count 2 2006.229.23:05:45.36#ibcon#about to read 5, iclass 33, count 2 2006.229.23:05:45.36#ibcon#read 5, iclass 33, count 2 2006.229.23:05:45.36#ibcon#about to read 6, iclass 33, count 2 2006.229.23:05:45.36#ibcon#read 6, iclass 33, count 2 2006.229.23:05:45.36#ibcon#end of sib2, iclass 33, count 2 2006.229.23:05:45.36#ibcon#*after write, iclass 33, count 2 2006.229.23:05:45.36#ibcon#*before return 0, iclass 33, count 2 2006.229.23:05:45.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:45.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:45.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.23:05:45.36#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:45.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:45.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:45.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:45.48#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:05:45.48#ibcon#first serial, iclass 33, count 0 2006.229.23:05:45.48#ibcon#enter sib2, iclass 33, count 0 2006.229.23:05:45.48#ibcon#flushed, iclass 33, count 0 2006.229.23:05:45.48#ibcon#about to write, iclass 33, count 0 2006.229.23:05:45.48#ibcon#wrote, iclass 33, count 0 2006.229.23:05:45.48#ibcon#about to read 3, iclass 33, count 0 2006.229.23:05:45.50#ibcon#read 3, iclass 33, count 0 2006.229.23:05:45.50#ibcon#about to read 4, iclass 33, count 0 2006.229.23:05:45.50#ibcon#read 4, iclass 33, count 0 2006.229.23:05:45.50#ibcon#about to read 5, iclass 33, count 0 2006.229.23:05:45.50#ibcon#read 5, iclass 33, count 0 2006.229.23:05:45.50#ibcon#about to read 6, iclass 33, count 0 2006.229.23:05:45.50#ibcon#read 6, iclass 33, count 0 2006.229.23:05:45.50#ibcon#end of sib2, iclass 33, count 0 2006.229.23:05:45.50#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:05:45.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:05:45.50#ibcon#[25=USB\r\n] 2006.229.23:05:45.50#ibcon#*before write, iclass 33, count 0 2006.229.23:05:45.50#ibcon#enter sib2, iclass 33, count 0 2006.229.23:05:45.50#ibcon#flushed, iclass 33, count 0 2006.229.23:05:45.50#ibcon#about to write, iclass 33, count 0 2006.229.23:05:45.50#ibcon#wrote, iclass 33, count 0 2006.229.23:05:45.50#ibcon#about to read 3, iclass 33, count 0 2006.229.23:05:45.53#ibcon#read 3, iclass 33, count 0 2006.229.23:05:45.53#ibcon#about to read 4, iclass 33, count 0 2006.229.23:05:45.53#ibcon#read 4, iclass 33, count 0 2006.229.23:05:45.53#ibcon#about to read 5, iclass 33, count 0 2006.229.23:05:45.53#ibcon#read 5, iclass 33, count 0 2006.229.23:05:45.53#ibcon#about to read 6, iclass 33, count 0 2006.229.23:05:45.53#ibcon#read 6, iclass 33, count 0 2006.229.23:05:45.53#ibcon#end of sib2, iclass 33, count 0 2006.229.23:05:45.53#ibcon#*after write, iclass 33, count 0 2006.229.23:05:45.53#ibcon#*before return 0, iclass 33, count 0 2006.229.23:05:45.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:45.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:45.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:05:45.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:05:45.53$vck44/valo=2,534.99 2006.229.23:05:45.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:05:45.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:05:45.53#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:45.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:45.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:45.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:45.53#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:05:45.53#ibcon#first serial, iclass 35, count 0 2006.229.23:05:45.53#ibcon#enter sib2, iclass 35, count 0 2006.229.23:05:45.53#ibcon#flushed, iclass 35, count 0 2006.229.23:05:45.53#ibcon#about to write, iclass 35, count 0 2006.229.23:05:45.53#ibcon#wrote, iclass 35, count 0 2006.229.23:05:45.53#ibcon#about to read 3, iclass 35, count 0 2006.229.23:05:45.55#ibcon#read 3, iclass 35, count 0 2006.229.23:05:45.55#ibcon#about to read 4, iclass 35, count 0 2006.229.23:05:45.55#ibcon#read 4, iclass 35, count 0 2006.229.23:05:45.55#ibcon#about to read 5, iclass 35, count 0 2006.229.23:05:45.55#ibcon#read 5, iclass 35, count 0 2006.229.23:05:45.55#ibcon#about to read 6, iclass 35, count 0 2006.229.23:05:45.55#ibcon#read 6, iclass 35, count 0 2006.229.23:05:45.55#ibcon#end of sib2, iclass 35, count 0 2006.229.23:05:45.55#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:05:45.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:05:45.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:05:45.55#ibcon#*before write, iclass 35, count 0 2006.229.23:05:45.55#ibcon#enter sib2, iclass 35, count 0 2006.229.23:05:45.55#ibcon#flushed, iclass 35, count 0 2006.229.23:05:45.55#ibcon#about to write, iclass 35, count 0 2006.229.23:05:45.55#ibcon#wrote, iclass 35, count 0 2006.229.23:05:45.55#ibcon#about to read 3, iclass 35, count 0 2006.229.23:05:45.59#ibcon#read 3, iclass 35, count 0 2006.229.23:05:45.59#ibcon#about to read 4, iclass 35, count 0 2006.229.23:05:45.59#ibcon#read 4, iclass 35, count 0 2006.229.23:05:45.59#ibcon#about to read 5, iclass 35, count 0 2006.229.23:05:45.59#ibcon#read 5, iclass 35, count 0 2006.229.23:05:45.59#ibcon#about to read 6, iclass 35, count 0 2006.229.23:05:45.59#ibcon#read 6, iclass 35, count 0 2006.229.23:05:45.59#ibcon#end of sib2, iclass 35, count 0 2006.229.23:05:45.59#ibcon#*after write, iclass 35, count 0 2006.229.23:05:45.59#ibcon#*before return 0, iclass 35, count 0 2006.229.23:05:45.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:45.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:45.59#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:05:45.59#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:05:45.59$vck44/va=2,7 2006.229.23:05:45.59#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.23:05:45.59#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.23:05:45.59#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:45.59#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:45.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:45.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:45.65#ibcon#enter wrdev, iclass 37, count 2 2006.229.23:05:45.65#ibcon#first serial, iclass 37, count 2 2006.229.23:05:45.65#ibcon#enter sib2, iclass 37, count 2 2006.229.23:05:45.65#ibcon#flushed, iclass 37, count 2 2006.229.23:05:45.65#ibcon#about to write, iclass 37, count 2 2006.229.23:05:45.65#ibcon#wrote, iclass 37, count 2 2006.229.23:05:45.65#ibcon#about to read 3, iclass 37, count 2 2006.229.23:05:45.67#ibcon#read 3, iclass 37, count 2 2006.229.23:05:45.67#ibcon#about to read 4, iclass 37, count 2 2006.229.23:05:45.67#ibcon#read 4, iclass 37, count 2 2006.229.23:05:45.67#ibcon#about to read 5, iclass 37, count 2 2006.229.23:05:45.67#ibcon#read 5, iclass 37, count 2 2006.229.23:05:45.67#ibcon#about to read 6, iclass 37, count 2 2006.229.23:05:45.67#ibcon#read 6, iclass 37, count 2 2006.229.23:05:45.67#ibcon#end of sib2, iclass 37, count 2 2006.229.23:05:45.67#ibcon#*mode == 0, iclass 37, count 2 2006.229.23:05:45.67#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.23:05:45.67#ibcon#[25=AT02-07\r\n] 2006.229.23:05:45.67#ibcon#*before write, iclass 37, count 2 2006.229.23:05:45.67#ibcon#enter sib2, iclass 37, count 2 2006.229.23:05:45.67#ibcon#flushed, iclass 37, count 2 2006.229.23:05:45.67#ibcon#about to write, iclass 37, count 2 2006.229.23:05:45.67#ibcon#wrote, iclass 37, count 2 2006.229.23:05:45.67#ibcon#about to read 3, iclass 37, count 2 2006.229.23:05:45.70#ibcon#read 3, iclass 37, count 2 2006.229.23:05:45.70#ibcon#about to read 4, iclass 37, count 2 2006.229.23:05:45.70#ibcon#read 4, iclass 37, count 2 2006.229.23:05:45.70#ibcon#about to read 5, iclass 37, count 2 2006.229.23:05:45.70#ibcon#read 5, iclass 37, count 2 2006.229.23:05:45.70#ibcon#about to read 6, iclass 37, count 2 2006.229.23:05:45.70#ibcon#read 6, iclass 37, count 2 2006.229.23:05:45.70#ibcon#end of sib2, iclass 37, count 2 2006.229.23:05:45.70#ibcon#*after write, iclass 37, count 2 2006.229.23:05:45.70#ibcon#*before return 0, iclass 37, count 2 2006.229.23:05:45.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:45.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:45.70#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.23:05:45.70#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:45.70#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:45.82#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:45.82#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:45.82#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:05:45.82#ibcon#first serial, iclass 37, count 0 2006.229.23:05:45.82#ibcon#enter sib2, iclass 37, count 0 2006.229.23:05:45.82#ibcon#flushed, iclass 37, count 0 2006.229.23:05:45.82#ibcon#about to write, iclass 37, count 0 2006.229.23:05:45.82#ibcon#wrote, iclass 37, count 0 2006.229.23:05:45.82#ibcon#about to read 3, iclass 37, count 0 2006.229.23:05:45.84#ibcon#read 3, iclass 37, count 0 2006.229.23:05:45.84#ibcon#about to read 4, iclass 37, count 0 2006.229.23:05:45.84#ibcon#read 4, iclass 37, count 0 2006.229.23:05:45.84#ibcon#about to read 5, iclass 37, count 0 2006.229.23:05:45.84#ibcon#read 5, iclass 37, count 0 2006.229.23:05:45.84#ibcon#about to read 6, iclass 37, count 0 2006.229.23:05:45.84#ibcon#read 6, iclass 37, count 0 2006.229.23:05:45.84#ibcon#end of sib2, iclass 37, count 0 2006.229.23:05:45.84#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:05:45.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:05:45.84#ibcon#[25=USB\r\n] 2006.229.23:05:45.84#ibcon#*before write, iclass 37, count 0 2006.229.23:05:45.84#ibcon#enter sib2, iclass 37, count 0 2006.229.23:05:45.84#ibcon#flushed, iclass 37, count 0 2006.229.23:05:45.84#ibcon#about to write, iclass 37, count 0 2006.229.23:05:45.84#ibcon#wrote, iclass 37, count 0 2006.229.23:05:45.84#ibcon#about to read 3, iclass 37, count 0 2006.229.23:05:45.87#ibcon#read 3, iclass 37, count 0 2006.229.23:05:45.87#ibcon#about to read 4, iclass 37, count 0 2006.229.23:05:45.87#ibcon#read 4, iclass 37, count 0 2006.229.23:05:45.87#ibcon#about to read 5, iclass 37, count 0 2006.229.23:05:45.87#ibcon#read 5, iclass 37, count 0 2006.229.23:05:45.87#ibcon#about to read 6, iclass 37, count 0 2006.229.23:05:45.87#ibcon#read 6, iclass 37, count 0 2006.229.23:05:45.87#ibcon#end of sib2, iclass 37, count 0 2006.229.23:05:45.87#ibcon#*after write, iclass 37, count 0 2006.229.23:05:45.87#ibcon#*before return 0, iclass 37, count 0 2006.229.23:05:45.87#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:45.87#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:45.87#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:05:45.87#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:05:45.87$vck44/valo=3,564.99 2006.229.23:05:45.87#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.23:05:45.87#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.23:05:45.87#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:45.87#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:45.87#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:45.87#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:45.87#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:05:45.87#ibcon#first serial, iclass 39, count 0 2006.229.23:05:45.87#ibcon#enter sib2, iclass 39, count 0 2006.229.23:05:45.87#ibcon#flushed, iclass 39, count 0 2006.229.23:05:45.87#ibcon#about to write, iclass 39, count 0 2006.229.23:05:45.87#ibcon#wrote, iclass 39, count 0 2006.229.23:05:45.87#ibcon#about to read 3, iclass 39, count 0 2006.229.23:05:45.89#ibcon#read 3, iclass 39, count 0 2006.229.23:05:45.89#ibcon#about to read 4, iclass 39, count 0 2006.229.23:05:45.89#ibcon#read 4, iclass 39, count 0 2006.229.23:05:45.89#ibcon#about to read 5, iclass 39, count 0 2006.229.23:05:45.89#ibcon#read 5, iclass 39, count 0 2006.229.23:05:45.89#ibcon#about to read 6, iclass 39, count 0 2006.229.23:05:45.89#ibcon#read 6, iclass 39, count 0 2006.229.23:05:45.89#ibcon#end of sib2, iclass 39, count 0 2006.229.23:05:45.89#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:05:45.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:05:45.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:05:45.89#ibcon#*before write, iclass 39, count 0 2006.229.23:05:45.89#ibcon#enter sib2, iclass 39, count 0 2006.229.23:05:45.89#ibcon#flushed, iclass 39, count 0 2006.229.23:05:45.89#ibcon#about to write, iclass 39, count 0 2006.229.23:05:45.89#ibcon#wrote, iclass 39, count 0 2006.229.23:05:45.89#ibcon#about to read 3, iclass 39, count 0 2006.229.23:05:45.93#ibcon#read 3, iclass 39, count 0 2006.229.23:05:45.93#ibcon#about to read 4, iclass 39, count 0 2006.229.23:05:45.93#ibcon#read 4, iclass 39, count 0 2006.229.23:05:45.93#ibcon#about to read 5, iclass 39, count 0 2006.229.23:05:45.93#ibcon#read 5, iclass 39, count 0 2006.229.23:05:45.93#ibcon#about to read 6, iclass 39, count 0 2006.229.23:05:45.93#ibcon#read 6, iclass 39, count 0 2006.229.23:05:45.93#ibcon#end of sib2, iclass 39, count 0 2006.229.23:05:45.93#ibcon#*after write, iclass 39, count 0 2006.229.23:05:45.93#ibcon#*before return 0, iclass 39, count 0 2006.229.23:05:45.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:45.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:45.93#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:05:45.93#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:05:45.93$vck44/va=3,6 2006.229.23:05:45.93#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.23:05:45.93#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.23:05:45.93#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:45.93#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:45.99#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:45.99#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:45.99#ibcon#enter wrdev, iclass 3, count 2 2006.229.23:05:45.99#ibcon#first serial, iclass 3, count 2 2006.229.23:05:45.99#ibcon#enter sib2, iclass 3, count 2 2006.229.23:05:45.99#ibcon#flushed, iclass 3, count 2 2006.229.23:05:45.99#ibcon#about to write, iclass 3, count 2 2006.229.23:05:45.99#ibcon#wrote, iclass 3, count 2 2006.229.23:05:45.99#ibcon#about to read 3, iclass 3, count 2 2006.229.23:05:46.01#ibcon#read 3, iclass 3, count 2 2006.229.23:05:46.01#ibcon#about to read 4, iclass 3, count 2 2006.229.23:05:46.01#ibcon#read 4, iclass 3, count 2 2006.229.23:05:46.01#ibcon#about to read 5, iclass 3, count 2 2006.229.23:05:46.01#ibcon#read 5, iclass 3, count 2 2006.229.23:05:46.01#ibcon#about to read 6, iclass 3, count 2 2006.229.23:05:46.01#ibcon#read 6, iclass 3, count 2 2006.229.23:05:46.01#ibcon#end of sib2, iclass 3, count 2 2006.229.23:05:46.01#ibcon#*mode == 0, iclass 3, count 2 2006.229.23:05:46.01#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.23:05:46.01#ibcon#[25=AT03-06\r\n] 2006.229.23:05:46.01#ibcon#*before write, iclass 3, count 2 2006.229.23:05:46.01#ibcon#enter sib2, iclass 3, count 2 2006.229.23:05:46.01#ibcon#flushed, iclass 3, count 2 2006.229.23:05:46.01#ibcon#about to write, iclass 3, count 2 2006.229.23:05:46.01#ibcon#wrote, iclass 3, count 2 2006.229.23:05:46.01#ibcon#about to read 3, iclass 3, count 2 2006.229.23:05:46.04#ibcon#read 3, iclass 3, count 2 2006.229.23:05:46.04#ibcon#about to read 4, iclass 3, count 2 2006.229.23:05:46.04#ibcon#read 4, iclass 3, count 2 2006.229.23:05:46.04#ibcon#about to read 5, iclass 3, count 2 2006.229.23:05:46.04#ibcon#read 5, iclass 3, count 2 2006.229.23:05:46.04#ibcon#about to read 6, iclass 3, count 2 2006.229.23:05:46.04#ibcon#read 6, iclass 3, count 2 2006.229.23:05:46.04#ibcon#end of sib2, iclass 3, count 2 2006.229.23:05:46.04#ibcon#*after write, iclass 3, count 2 2006.229.23:05:46.04#ibcon#*before return 0, iclass 3, count 2 2006.229.23:05:46.04#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:46.04#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:46.04#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.23:05:46.04#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:46.04#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:46.16#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:46.16#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:46.16#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:05:46.16#ibcon#first serial, iclass 3, count 0 2006.229.23:05:46.16#ibcon#enter sib2, iclass 3, count 0 2006.229.23:05:46.16#ibcon#flushed, iclass 3, count 0 2006.229.23:05:46.16#ibcon#about to write, iclass 3, count 0 2006.229.23:05:46.16#ibcon#wrote, iclass 3, count 0 2006.229.23:05:46.16#ibcon#about to read 3, iclass 3, count 0 2006.229.23:05:46.18#ibcon#read 3, iclass 3, count 0 2006.229.23:05:46.18#ibcon#about to read 4, iclass 3, count 0 2006.229.23:05:46.18#ibcon#read 4, iclass 3, count 0 2006.229.23:05:46.18#ibcon#about to read 5, iclass 3, count 0 2006.229.23:05:46.18#ibcon#read 5, iclass 3, count 0 2006.229.23:05:46.18#ibcon#about to read 6, iclass 3, count 0 2006.229.23:05:46.18#ibcon#read 6, iclass 3, count 0 2006.229.23:05:46.18#ibcon#end of sib2, iclass 3, count 0 2006.229.23:05:46.18#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:05:46.18#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:05:46.18#ibcon#[25=USB\r\n] 2006.229.23:05:46.18#ibcon#*before write, iclass 3, count 0 2006.229.23:05:46.18#ibcon#enter sib2, iclass 3, count 0 2006.229.23:05:46.18#ibcon#flushed, iclass 3, count 0 2006.229.23:05:46.18#ibcon#about to write, iclass 3, count 0 2006.229.23:05:46.18#ibcon#wrote, iclass 3, count 0 2006.229.23:05:46.18#ibcon#about to read 3, iclass 3, count 0 2006.229.23:05:46.21#ibcon#read 3, iclass 3, count 0 2006.229.23:05:46.21#ibcon#about to read 4, iclass 3, count 0 2006.229.23:05:46.21#ibcon#read 4, iclass 3, count 0 2006.229.23:05:46.21#ibcon#about to read 5, iclass 3, count 0 2006.229.23:05:46.21#ibcon#read 5, iclass 3, count 0 2006.229.23:05:46.21#ibcon#about to read 6, iclass 3, count 0 2006.229.23:05:46.21#ibcon#read 6, iclass 3, count 0 2006.229.23:05:46.21#ibcon#end of sib2, iclass 3, count 0 2006.229.23:05:46.21#ibcon#*after write, iclass 3, count 0 2006.229.23:05:46.21#ibcon#*before return 0, iclass 3, count 0 2006.229.23:05:46.21#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:46.21#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:46.21#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:05:46.21#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:05:46.21$vck44/valo=4,624.99 2006.229.23:05:46.21#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.23:05:46.21#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.23:05:46.21#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:46.21#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:05:46.21#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:05:46.21#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:05:46.21#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:05:46.21#ibcon#first serial, iclass 5, count 0 2006.229.23:05:46.21#ibcon#enter sib2, iclass 5, count 0 2006.229.23:05:46.21#ibcon#flushed, iclass 5, count 0 2006.229.23:05:46.21#ibcon#about to write, iclass 5, count 0 2006.229.23:05:46.21#ibcon#wrote, iclass 5, count 0 2006.229.23:05:46.21#ibcon#about to read 3, iclass 5, count 0 2006.229.23:05:46.23#ibcon#read 3, iclass 5, count 0 2006.229.23:05:46.23#ibcon#about to read 4, iclass 5, count 0 2006.229.23:05:46.23#ibcon#read 4, iclass 5, count 0 2006.229.23:05:46.23#ibcon#about to read 5, iclass 5, count 0 2006.229.23:05:46.23#ibcon#read 5, iclass 5, count 0 2006.229.23:05:46.23#ibcon#about to read 6, iclass 5, count 0 2006.229.23:05:46.23#ibcon#read 6, iclass 5, count 0 2006.229.23:05:46.23#ibcon#end of sib2, iclass 5, count 0 2006.229.23:05:46.23#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:05:46.23#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:05:46.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:05:46.23#ibcon#*before write, iclass 5, count 0 2006.229.23:05:46.23#ibcon#enter sib2, iclass 5, count 0 2006.229.23:05:46.23#ibcon#flushed, iclass 5, count 0 2006.229.23:05:46.23#ibcon#about to write, iclass 5, count 0 2006.229.23:05:46.23#ibcon#wrote, iclass 5, count 0 2006.229.23:05:46.23#ibcon#about to read 3, iclass 5, count 0 2006.229.23:05:46.27#ibcon#read 3, iclass 5, count 0 2006.229.23:05:46.27#ibcon#about to read 4, iclass 5, count 0 2006.229.23:05:46.27#ibcon#read 4, iclass 5, count 0 2006.229.23:05:46.27#ibcon#about to read 5, iclass 5, count 0 2006.229.23:05:46.27#ibcon#read 5, iclass 5, count 0 2006.229.23:05:46.27#ibcon#about to read 6, iclass 5, count 0 2006.229.23:05:46.27#ibcon#read 6, iclass 5, count 0 2006.229.23:05:46.27#ibcon#end of sib2, iclass 5, count 0 2006.229.23:05:46.27#ibcon#*after write, iclass 5, count 0 2006.229.23:05:46.27#ibcon#*before return 0, iclass 5, count 0 2006.229.23:05:46.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:05:46.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:05:46.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:05:46.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:05:46.27$vck44/va=4,7 2006.229.23:05:46.27#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.23:05:46.27#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.23:05:46.27#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:46.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:05:46.33#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:05:46.33#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:05:46.33#ibcon#enter wrdev, iclass 7, count 2 2006.229.23:05:46.33#ibcon#first serial, iclass 7, count 2 2006.229.23:05:46.33#ibcon#enter sib2, iclass 7, count 2 2006.229.23:05:46.33#ibcon#flushed, iclass 7, count 2 2006.229.23:05:46.33#ibcon#about to write, iclass 7, count 2 2006.229.23:05:46.33#ibcon#wrote, iclass 7, count 2 2006.229.23:05:46.33#ibcon#about to read 3, iclass 7, count 2 2006.229.23:05:46.35#ibcon#read 3, iclass 7, count 2 2006.229.23:05:46.35#ibcon#about to read 4, iclass 7, count 2 2006.229.23:05:46.35#ibcon#read 4, iclass 7, count 2 2006.229.23:05:46.35#ibcon#about to read 5, iclass 7, count 2 2006.229.23:05:46.35#ibcon#read 5, iclass 7, count 2 2006.229.23:05:46.35#ibcon#about to read 6, iclass 7, count 2 2006.229.23:05:46.35#ibcon#read 6, iclass 7, count 2 2006.229.23:05:46.35#ibcon#end of sib2, iclass 7, count 2 2006.229.23:05:46.35#ibcon#*mode == 0, iclass 7, count 2 2006.229.23:05:46.35#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.23:05:46.35#ibcon#[25=AT04-07\r\n] 2006.229.23:05:46.35#ibcon#*before write, iclass 7, count 2 2006.229.23:05:46.35#ibcon#enter sib2, iclass 7, count 2 2006.229.23:05:46.35#ibcon#flushed, iclass 7, count 2 2006.229.23:05:46.35#ibcon#about to write, iclass 7, count 2 2006.229.23:05:46.35#ibcon#wrote, iclass 7, count 2 2006.229.23:05:46.35#ibcon#about to read 3, iclass 7, count 2 2006.229.23:05:46.38#ibcon#read 3, iclass 7, count 2 2006.229.23:05:46.38#ibcon#about to read 4, iclass 7, count 2 2006.229.23:05:46.38#ibcon#read 4, iclass 7, count 2 2006.229.23:05:46.38#ibcon#about to read 5, iclass 7, count 2 2006.229.23:05:46.38#ibcon#read 5, iclass 7, count 2 2006.229.23:05:46.38#ibcon#about to read 6, iclass 7, count 2 2006.229.23:05:46.38#ibcon#read 6, iclass 7, count 2 2006.229.23:05:46.38#ibcon#end of sib2, iclass 7, count 2 2006.229.23:05:46.38#ibcon#*after write, iclass 7, count 2 2006.229.23:05:46.38#ibcon#*before return 0, iclass 7, count 2 2006.229.23:05:46.38#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:05:46.40#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:05:46.40#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.23:05:46.41#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:46.41#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:05:46.51#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:05:46.51#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:05:46.51#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:05:46.51#ibcon#first serial, iclass 7, count 0 2006.229.23:05:46.51#ibcon#enter sib2, iclass 7, count 0 2006.229.23:05:46.51#ibcon#flushed, iclass 7, count 0 2006.229.23:05:46.51#ibcon#about to write, iclass 7, count 0 2006.229.23:05:46.51#ibcon#wrote, iclass 7, count 0 2006.229.23:05:46.51#ibcon#about to read 3, iclass 7, count 0 2006.229.23:05:46.53#ibcon#read 3, iclass 7, count 0 2006.229.23:05:46.53#ibcon#about to read 4, iclass 7, count 0 2006.229.23:05:46.53#ibcon#read 4, iclass 7, count 0 2006.229.23:05:46.53#ibcon#about to read 5, iclass 7, count 0 2006.229.23:05:46.53#ibcon#read 5, iclass 7, count 0 2006.229.23:05:46.53#ibcon#about to read 6, iclass 7, count 0 2006.229.23:05:46.53#ibcon#read 6, iclass 7, count 0 2006.229.23:05:46.53#ibcon#end of sib2, iclass 7, count 0 2006.229.23:05:46.53#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:05:46.53#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:05:46.53#ibcon#[25=USB\r\n] 2006.229.23:05:46.53#ibcon#*before write, iclass 7, count 0 2006.229.23:05:46.53#ibcon#enter sib2, iclass 7, count 0 2006.229.23:05:46.53#ibcon#flushed, iclass 7, count 0 2006.229.23:05:46.53#ibcon#about to write, iclass 7, count 0 2006.229.23:05:46.53#ibcon#wrote, iclass 7, count 0 2006.229.23:05:46.53#ibcon#about to read 3, iclass 7, count 0 2006.229.23:05:46.56#ibcon#read 3, iclass 7, count 0 2006.229.23:05:46.56#ibcon#about to read 4, iclass 7, count 0 2006.229.23:05:46.56#ibcon#read 4, iclass 7, count 0 2006.229.23:05:46.56#ibcon#about to read 5, iclass 7, count 0 2006.229.23:05:46.56#ibcon#read 5, iclass 7, count 0 2006.229.23:05:46.56#ibcon#about to read 6, iclass 7, count 0 2006.229.23:05:46.56#ibcon#read 6, iclass 7, count 0 2006.229.23:05:46.56#ibcon#end of sib2, iclass 7, count 0 2006.229.23:05:46.56#ibcon#*after write, iclass 7, count 0 2006.229.23:05:46.56#ibcon#*before return 0, iclass 7, count 0 2006.229.23:05:46.56#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:05:46.56#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:05:46.56#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:05:46.56#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:05:46.56$vck44/valo=5,734.99 2006.229.23:05:46.56#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.23:05:46.56#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.23:05:46.56#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:46.56#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:05:46.56#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:05:46.56#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:05:46.56#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:05:46.56#ibcon#first serial, iclass 11, count 0 2006.229.23:05:46.56#ibcon#enter sib2, iclass 11, count 0 2006.229.23:05:46.56#ibcon#flushed, iclass 11, count 0 2006.229.23:05:46.56#ibcon#about to write, iclass 11, count 0 2006.229.23:05:46.56#ibcon#wrote, iclass 11, count 0 2006.229.23:05:46.56#ibcon#about to read 3, iclass 11, count 0 2006.229.23:05:46.58#ibcon#read 3, iclass 11, count 0 2006.229.23:05:46.58#ibcon#about to read 4, iclass 11, count 0 2006.229.23:05:46.58#ibcon#read 4, iclass 11, count 0 2006.229.23:05:46.58#ibcon#about to read 5, iclass 11, count 0 2006.229.23:05:46.58#ibcon#read 5, iclass 11, count 0 2006.229.23:05:46.58#ibcon#about to read 6, iclass 11, count 0 2006.229.23:05:46.58#ibcon#read 6, iclass 11, count 0 2006.229.23:05:46.58#ibcon#end of sib2, iclass 11, count 0 2006.229.23:05:46.58#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:05:46.58#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:05:46.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:05:46.58#ibcon#*before write, iclass 11, count 0 2006.229.23:05:46.58#ibcon#enter sib2, iclass 11, count 0 2006.229.23:05:46.58#ibcon#flushed, iclass 11, count 0 2006.229.23:05:46.58#ibcon#about to write, iclass 11, count 0 2006.229.23:05:46.58#ibcon#wrote, iclass 11, count 0 2006.229.23:05:46.58#ibcon#about to read 3, iclass 11, count 0 2006.229.23:05:46.62#ibcon#read 3, iclass 11, count 0 2006.229.23:05:46.62#ibcon#about to read 4, iclass 11, count 0 2006.229.23:05:46.62#ibcon#read 4, iclass 11, count 0 2006.229.23:05:46.62#ibcon#about to read 5, iclass 11, count 0 2006.229.23:05:46.62#ibcon#read 5, iclass 11, count 0 2006.229.23:05:46.62#ibcon#about to read 6, iclass 11, count 0 2006.229.23:05:46.62#ibcon#read 6, iclass 11, count 0 2006.229.23:05:46.62#ibcon#end of sib2, iclass 11, count 0 2006.229.23:05:46.62#ibcon#*after write, iclass 11, count 0 2006.229.23:05:46.62#ibcon#*before return 0, iclass 11, count 0 2006.229.23:05:46.62#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:05:46.62#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:05:46.62#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:05:46.62#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:05:46.62$vck44/va=5,4 2006.229.23:05:46.62#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.23:05:46.62#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.23:05:46.62#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:46.62#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:46.68#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:46.68#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:46.68#ibcon#enter wrdev, iclass 13, count 2 2006.229.23:05:46.68#ibcon#first serial, iclass 13, count 2 2006.229.23:05:46.68#ibcon#enter sib2, iclass 13, count 2 2006.229.23:05:46.68#ibcon#flushed, iclass 13, count 2 2006.229.23:05:46.68#ibcon#about to write, iclass 13, count 2 2006.229.23:05:46.68#ibcon#wrote, iclass 13, count 2 2006.229.23:05:46.68#ibcon#about to read 3, iclass 13, count 2 2006.229.23:05:46.70#ibcon#read 3, iclass 13, count 2 2006.229.23:05:46.70#ibcon#about to read 4, iclass 13, count 2 2006.229.23:05:46.70#ibcon#read 4, iclass 13, count 2 2006.229.23:05:46.70#ibcon#about to read 5, iclass 13, count 2 2006.229.23:05:46.70#ibcon#read 5, iclass 13, count 2 2006.229.23:05:46.70#ibcon#about to read 6, iclass 13, count 2 2006.229.23:05:46.70#ibcon#read 6, iclass 13, count 2 2006.229.23:05:46.70#ibcon#end of sib2, iclass 13, count 2 2006.229.23:05:46.70#ibcon#*mode == 0, iclass 13, count 2 2006.229.23:05:46.70#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.23:05:46.70#ibcon#[25=AT05-04\r\n] 2006.229.23:05:46.70#ibcon#*before write, iclass 13, count 2 2006.229.23:05:46.70#ibcon#enter sib2, iclass 13, count 2 2006.229.23:05:46.70#ibcon#flushed, iclass 13, count 2 2006.229.23:05:46.70#ibcon#about to write, iclass 13, count 2 2006.229.23:05:46.70#ibcon#wrote, iclass 13, count 2 2006.229.23:05:46.70#ibcon#about to read 3, iclass 13, count 2 2006.229.23:05:46.73#ibcon#read 3, iclass 13, count 2 2006.229.23:05:46.73#ibcon#about to read 4, iclass 13, count 2 2006.229.23:05:46.73#ibcon#read 4, iclass 13, count 2 2006.229.23:05:46.73#ibcon#about to read 5, iclass 13, count 2 2006.229.23:05:46.73#ibcon#read 5, iclass 13, count 2 2006.229.23:05:46.73#ibcon#about to read 6, iclass 13, count 2 2006.229.23:05:46.73#ibcon#read 6, iclass 13, count 2 2006.229.23:05:46.73#ibcon#end of sib2, iclass 13, count 2 2006.229.23:05:46.73#ibcon#*after write, iclass 13, count 2 2006.229.23:05:46.73#ibcon#*before return 0, iclass 13, count 2 2006.229.23:05:46.73#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:46.73#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:46.73#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.23:05:46.73#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:46.73#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:46.85#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:46.85#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:46.85#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:05:46.85#ibcon#first serial, iclass 13, count 0 2006.229.23:05:46.85#ibcon#enter sib2, iclass 13, count 0 2006.229.23:05:46.85#ibcon#flushed, iclass 13, count 0 2006.229.23:05:46.85#ibcon#about to write, iclass 13, count 0 2006.229.23:05:46.85#ibcon#wrote, iclass 13, count 0 2006.229.23:05:46.85#ibcon#about to read 3, iclass 13, count 0 2006.229.23:05:46.87#ibcon#read 3, iclass 13, count 0 2006.229.23:05:46.87#ibcon#about to read 4, iclass 13, count 0 2006.229.23:05:46.87#ibcon#read 4, iclass 13, count 0 2006.229.23:05:46.87#ibcon#about to read 5, iclass 13, count 0 2006.229.23:05:46.87#ibcon#read 5, iclass 13, count 0 2006.229.23:05:46.87#ibcon#about to read 6, iclass 13, count 0 2006.229.23:05:46.87#ibcon#read 6, iclass 13, count 0 2006.229.23:05:46.87#ibcon#end of sib2, iclass 13, count 0 2006.229.23:05:46.87#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:05:46.87#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:05:46.87#ibcon#[25=USB\r\n] 2006.229.23:05:46.87#ibcon#*before write, iclass 13, count 0 2006.229.23:05:46.87#ibcon#enter sib2, iclass 13, count 0 2006.229.23:05:46.87#ibcon#flushed, iclass 13, count 0 2006.229.23:05:46.87#ibcon#about to write, iclass 13, count 0 2006.229.23:05:46.87#ibcon#wrote, iclass 13, count 0 2006.229.23:05:46.87#ibcon#about to read 3, iclass 13, count 0 2006.229.23:05:46.90#ibcon#read 3, iclass 13, count 0 2006.229.23:05:46.90#ibcon#about to read 4, iclass 13, count 0 2006.229.23:05:46.90#ibcon#read 4, iclass 13, count 0 2006.229.23:05:46.90#ibcon#about to read 5, iclass 13, count 0 2006.229.23:05:46.90#ibcon#read 5, iclass 13, count 0 2006.229.23:05:46.90#ibcon#about to read 6, iclass 13, count 0 2006.229.23:05:46.90#ibcon#read 6, iclass 13, count 0 2006.229.23:05:46.90#ibcon#end of sib2, iclass 13, count 0 2006.229.23:05:46.90#ibcon#*after write, iclass 13, count 0 2006.229.23:05:46.90#ibcon#*before return 0, iclass 13, count 0 2006.229.23:05:46.90#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:46.90#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:46.90#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:05:46.90#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:05:46.90$vck44/valo=6,814.99 2006.229.23:05:46.90#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.23:05:46.90#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.23:05:46.90#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:46.90#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:46.90#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:46.90#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:46.90#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:05:46.90#ibcon#first serial, iclass 15, count 0 2006.229.23:05:46.90#ibcon#enter sib2, iclass 15, count 0 2006.229.23:05:46.90#ibcon#flushed, iclass 15, count 0 2006.229.23:05:46.90#ibcon#about to write, iclass 15, count 0 2006.229.23:05:46.90#ibcon#wrote, iclass 15, count 0 2006.229.23:05:46.90#ibcon#about to read 3, iclass 15, count 0 2006.229.23:05:46.92#ibcon#read 3, iclass 15, count 0 2006.229.23:05:46.92#ibcon#about to read 4, iclass 15, count 0 2006.229.23:05:46.92#ibcon#read 4, iclass 15, count 0 2006.229.23:05:46.92#ibcon#about to read 5, iclass 15, count 0 2006.229.23:05:46.92#ibcon#read 5, iclass 15, count 0 2006.229.23:05:46.92#ibcon#about to read 6, iclass 15, count 0 2006.229.23:05:46.92#ibcon#read 6, iclass 15, count 0 2006.229.23:05:46.92#ibcon#end of sib2, iclass 15, count 0 2006.229.23:05:46.92#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:05:46.92#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:05:46.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:05:46.92#ibcon#*before write, iclass 15, count 0 2006.229.23:05:46.92#ibcon#enter sib2, iclass 15, count 0 2006.229.23:05:46.92#ibcon#flushed, iclass 15, count 0 2006.229.23:05:46.92#ibcon#about to write, iclass 15, count 0 2006.229.23:05:46.92#ibcon#wrote, iclass 15, count 0 2006.229.23:05:46.92#ibcon#about to read 3, iclass 15, count 0 2006.229.23:05:46.96#ibcon#read 3, iclass 15, count 0 2006.229.23:05:46.96#ibcon#about to read 4, iclass 15, count 0 2006.229.23:05:46.96#ibcon#read 4, iclass 15, count 0 2006.229.23:05:46.96#ibcon#about to read 5, iclass 15, count 0 2006.229.23:05:46.96#ibcon#read 5, iclass 15, count 0 2006.229.23:05:46.96#ibcon#about to read 6, iclass 15, count 0 2006.229.23:05:46.96#ibcon#read 6, iclass 15, count 0 2006.229.23:05:46.96#ibcon#end of sib2, iclass 15, count 0 2006.229.23:05:46.96#ibcon#*after write, iclass 15, count 0 2006.229.23:05:46.96#ibcon#*before return 0, iclass 15, count 0 2006.229.23:05:46.96#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:46.96#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:46.96#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:05:46.96#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:05:46.96$vck44/va=6,4 2006.229.23:05:46.96#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.23:05:46.96#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.23:05:46.96#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:46.96#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:47.02#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:47.02#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:47.02#ibcon#enter wrdev, iclass 17, count 2 2006.229.23:05:47.02#ibcon#first serial, iclass 17, count 2 2006.229.23:05:47.02#ibcon#enter sib2, iclass 17, count 2 2006.229.23:05:47.02#ibcon#flushed, iclass 17, count 2 2006.229.23:05:47.02#ibcon#about to write, iclass 17, count 2 2006.229.23:05:47.02#ibcon#wrote, iclass 17, count 2 2006.229.23:05:47.02#ibcon#about to read 3, iclass 17, count 2 2006.229.23:05:47.04#ibcon#read 3, iclass 17, count 2 2006.229.23:05:47.04#ibcon#about to read 4, iclass 17, count 2 2006.229.23:05:47.04#ibcon#read 4, iclass 17, count 2 2006.229.23:05:47.04#ibcon#about to read 5, iclass 17, count 2 2006.229.23:05:47.04#ibcon#read 5, iclass 17, count 2 2006.229.23:05:47.04#ibcon#about to read 6, iclass 17, count 2 2006.229.23:05:47.04#ibcon#read 6, iclass 17, count 2 2006.229.23:05:47.04#ibcon#end of sib2, iclass 17, count 2 2006.229.23:05:47.04#ibcon#*mode == 0, iclass 17, count 2 2006.229.23:05:47.04#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.23:05:47.04#ibcon#[25=AT06-04\r\n] 2006.229.23:05:47.04#ibcon#*before write, iclass 17, count 2 2006.229.23:05:47.04#ibcon#enter sib2, iclass 17, count 2 2006.229.23:05:47.04#ibcon#flushed, iclass 17, count 2 2006.229.23:05:47.04#ibcon#about to write, iclass 17, count 2 2006.229.23:05:47.04#ibcon#wrote, iclass 17, count 2 2006.229.23:05:47.04#ibcon#about to read 3, iclass 17, count 2 2006.229.23:05:47.07#ibcon#read 3, iclass 17, count 2 2006.229.23:05:47.07#ibcon#about to read 4, iclass 17, count 2 2006.229.23:05:47.07#ibcon#read 4, iclass 17, count 2 2006.229.23:05:47.07#ibcon#about to read 5, iclass 17, count 2 2006.229.23:05:47.07#ibcon#read 5, iclass 17, count 2 2006.229.23:05:47.07#ibcon#about to read 6, iclass 17, count 2 2006.229.23:05:47.07#ibcon#read 6, iclass 17, count 2 2006.229.23:05:47.07#ibcon#end of sib2, iclass 17, count 2 2006.229.23:05:47.07#ibcon#*after write, iclass 17, count 2 2006.229.23:05:47.07#ibcon#*before return 0, iclass 17, count 2 2006.229.23:05:47.07#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:47.07#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:47.07#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.23:05:47.07#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:47.07#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:47.19#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:47.19#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:47.19#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:05:47.19#ibcon#first serial, iclass 17, count 0 2006.229.23:05:47.19#ibcon#enter sib2, iclass 17, count 0 2006.229.23:05:47.19#ibcon#flushed, iclass 17, count 0 2006.229.23:05:47.19#ibcon#about to write, iclass 17, count 0 2006.229.23:05:47.19#ibcon#wrote, iclass 17, count 0 2006.229.23:05:47.19#ibcon#about to read 3, iclass 17, count 0 2006.229.23:05:47.21#ibcon#read 3, iclass 17, count 0 2006.229.23:05:47.21#ibcon#about to read 4, iclass 17, count 0 2006.229.23:05:47.21#ibcon#read 4, iclass 17, count 0 2006.229.23:05:47.21#ibcon#about to read 5, iclass 17, count 0 2006.229.23:05:47.21#ibcon#read 5, iclass 17, count 0 2006.229.23:05:47.21#ibcon#about to read 6, iclass 17, count 0 2006.229.23:05:47.21#ibcon#read 6, iclass 17, count 0 2006.229.23:05:47.21#ibcon#end of sib2, iclass 17, count 0 2006.229.23:05:47.21#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:05:47.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:05:47.21#ibcon#[25=USB\r\n] 2006.229.23:05:47.21#ibcon#*before write, iclass 17, count 0 2006.229.23:05:47.21#ibcon#enter sib2, iclass 17, count 0 2006.229.23:05:47.21#ibcon#flushed, iclass 17, count 0 2006.229.23:05:47.21#ibcon#about to write, iclass 17, count 0 2006.229.23:05:47.21#ibcon#wrote, iclass 17, count 0 2006.229.23:05:47.21#ibcon#about to read 3, iclass 17, count 0 2006.229.23:05:47.24#ibcon#read 3, iclass 17, count 0 2006.229.23:05:47.24#ibcon#about to read 4, iclass 17, count 0 2006.229.23:05:47.24#ibcon#read 4, iclass 17, count 0 2006.229.23:05:47.24#ibcon#about to read 5, iclass 17, count 0 2006.229.23:05:47.24#ibcon#read 5, iclass 17, count 0 2006.229.23:05:47.24#ibcon#about to read 6, iclass 17, count 0 2006.229.23:05:47.24#ibcon#read 6, iclass 17, count 0 2006.229.23:05:47.24#ibcon#end of sib2, iclass 17, count 0 2006.229.23:05:47.24#ibcon#*after write, iclass 17, count 0 2006.229.23:05:47.24#ibcon#*before return 0, iclass 17, count 0 2006.229.23:05:47.24#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:47.24#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:47.24#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:05:47.24#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:05:47.24$vck44/valo=7,864.99 2006.229.23:05:47.24#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.23:05:47.24#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.23:05:47.24#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:47.24#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:47.24#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:47.24#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:47.24#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:05:47.24#ibcon#first serial, iclass 19, count 0 2006.229.23:05:47.24#ibcon#enter sib2, iclass 19, count 0 2006.229.23:05:47.24#ibcon#flushed, iclass 19, count 0 2006.229.23:05:47.24#ibcon#about to write, iclass 19, count 0 2006.229.23:05:47.24#ibcon#wrote, iclass 19, count 0 2006.229.23:05:47.24#ibcon#about to read 3, iclass 19, count 0 2006.229.23:05:47.26#ibcon#read 3, iclass 19, count 0 2006.229.23:05:47.26#ibcon#about to read 4, iclass 19, count 0 2006.229.23:05:47.26#ibcon#read 4, iclass 19, count 0 2006.229.23:05:47.26#ibcon#about to read 5, iclass 19, count 0 2006.229.23:05:47.26#ibcon#read 5, iclass 19, count 0 2006.229.23:05:47.26#ibcon#about to read 6, iclass 19, count 0 2006.229.23:05:47.26#ibcon#read 6, iclass 19, count 0 2006.229.23:05:47.26#ibcon#end of sib2, iclass 19, count 0 2006.229.23:05:47.26#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:05:47.26#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:05:47.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:05:47.26#ibcon#*before write, iclass 19, count 0 2006.229.23:05:47.26#ibcon#enter sib2, iclass 19, count 0 2006.229.23:05:47.26#ibcon#flushed, iclass 19, count 0 2006.229.23:05:47.26#ibcon#about to write, iclass 19, count 0 2006.229.23:05:47.26#ibcon#wrote, iclass 19, count 0 2006.229.23:05:47.26#ibcon#about to read 3, iclass 19, count 0 2006.229.23:05:47.30#ibcon#read 3, iclass 19, count 0 2006.229.23:05:47.30#ibcon#about to read 4, iclass 19, count 0 2006.229.23:05:47.30#ibcon#read 4, iclass 19, count 0 2006.229.23:05:47.30#ibcon#about to read 5, iclass 19, count 0 2006.229.23:05:47.30#ibcon#read 5, iclass 19, count 0 2006.229.23:05:47.30#ibcon#about to read 6, iclass 19, count 0 2006.229.23:05:47.30#ibcon#read 6, iclass 19, count 0 2006.229.23:05:47.30#ibcon#end of sib2, iclass 19, count 0 2006.229.23:05:47.30#ibcon#*after write, iclass 19, count 0 2006.229.23:05:47.30#ibcon#*before return 0, iclass 19, count 0 2006.229.23:05:47.30#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:47.30#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:47.30#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:05:47.30#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:05:47.30$vck44/va=7,5 2006.229.23:05:47.30#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.23:05:47.30#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.23:05:47.30#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:47.30#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:47.36#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:47.36#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:47.36#ibcon#enter wrdev, iclass 21, count 2 2006.229.23:05:47.36#ibcon#first serial, iclass 21, count 2 2006.229.23:05:47.36#ibcon#enter sib2, iclass 21, count 2 2006.229.23:05:47.36#ibcon#flushed, iclass 21, count 2 2006.229.23:05:47.36#ibcon#about to write, iclass 21, count 2 2006.229.23:05:47.36#ibcon#wrote, iclass 21, count 2 2006.229.23:05:47.36#ibcon#about to read 3, iclass 21, count 2 2006.229.23:05:47.38#ibcon#read 3, iclass 21, count 2 2006.229.23:05:47.38#ibcon#about to read 4, iclass 21, count 2 2006.229.23:05:47.38#ibcon#read 4, iclass 21, count 2 2006.229.23:05:47.38#ibcon#about to read 5, iclass 21, count 2 2006.229.23:05:47.38#ibcon#read 5, iclass 21, count 2 2006.229.23:05:47.38#ibcon#about to read 6, iclass 21, count 2 2006.229.23:05:47.38#ibcon#read 6, iclass 21, count 2 2006.229.23:05:47.38#ibcon#end of sib2, iclass 21, count 2 2006.229.23:05:47.38#ibcon#*mode == 0, iclass 21, count 2 2006.229.23:05:47.38#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.23:05:47.38#ibcon#[25=AT07-05\r\n] 2006.229.23:05:47.38#ibcon#*before write, iclass 21, count 2 2006.229.23:05:47.38#ibcon#enter sib2, iclass 21, count 2 2006.229.23:05:47.38#ibcon#flushed, iclass 21, count 2 2006.229.23:05:47.38#ibcon#about to write, iclass 21, count 2 2006.229.23:05:47.38#ibcon#wrote, iclass 21, count 2 2006.229.23:05:47.38#ibcon#about to read 3, iclass 21, count 2 2006.229.23:05:47.41#ibcon#read 3, iclass 21, count 2 2006.229.23:05:47.41#ibcon#about to read 4, iclass 21, count 2 2006.229.23:05:47.41#ibcon#read 4, iclass 21, count 2 2006.229.23:05:47.41#ibcon#about to read 5, iclass 21, count 2 2006.229.23:05:47.41#ibcon#read 5, iclass 21, count 2 2006.229.23:05:47.41#ibcon#about to read 6, iclass 21, count 2 2006.229.23:05:47.41#ibcon#read 6, iclass 21, count 2 2006.229.23:05:47.41#ibcon#end of sib2, iclass 21, count 2 2006.229.23:05:47.41#ibcon#*after write, iclass 21, count 2 2006.229.23:05:47.41#ibcon#*before return 0, iclass 21, count 2 2006.229.23:05:47.41#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:47.41#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:47.41#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.23:05:47.41#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:47.41#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:47.53#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:47.53#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:47.53#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:05:47.53#ibcon#first serial, iclass 21, count 0 2006.229.23:05:47.53#ibcon#enter sib2, iclass 21, count 0 2006.229.23:05:47.53#ibcon#flushed, iclass 21, count 0 2006.229.23:05:47.53#ibcon#about to write, iclass 21, count 0 2006.229.23:05:47.53#ibcon#wrote, iclass 21, count 0 2006.229.23:05:47.53#ibcon#about to read 3, iclass 21, count 0 2006.229.23:05:47.55#ibcon#read 3, iclass 21, count 0 2006.229.23:05:47.55#ibcon#about to read 4, iclass 21, count 0 2006.229.23:05:47.55#ibcon#read 4, iclass 21, count 0 2006.229.23:05:47.55#ibcon#about to read 5, iclass 21, count 0 2006.229.23:05:47.55#ibcon#read 5, iclass 21, count 0 2006.229.23:05:47.55#ibcon#about to read 6, iclass 21, count 0 2006.229.23:05:47.55#ibcon#read 6, iclass 21, count 0 2006.229.23:05:47.55#ibcon#end of sib2, iclass 21, count 0 2006.229.23:05:47.55#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:05:47.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:05:47.55#ibcon#[25=USB\r\n] 2006.229.23:05:47.55#ibcon#*before write, iclass 21, count 0 2006.229.23:05:47.55#ibcon#enter sib2, iclass 21, count 0 2006.229.23:05:47.55#ibcon#flushed, iclass 21, count 0 2006.229.23:05:47.55#ibcon#about to write, iclass 21, count 0 2006.229.23:05:47.55#ibcon#wrote, iclass 21, count 0 2006.229.23:05:47.55#ibcon#about to read 3, iclass 21, count 0 2006.229.23:05:47.58#ibcon#read 3, iclass 21, count 0 2006.229.23:05:47.58#ibcon#about to read 4, iclass 21, count 0 2006.229.23:05:47.58#ibcon#read 4, iclass 21, count 0 2006.229.23:05:47.58#ibcon#about to read 5, iclass 21, count 0 2006.229.23:05:47.58#ibcon#read 5, iclass 21, count 0 2006.229.23:05:47.58#ibcon#about to read 6, iclass 21, count 0 2006.229.23:05:47.58#ibcon#read 6, iclass 21, count 0 2006.229.23:05:47.58#ibcon#end of sib2, iclass 21, count 0 2006.229.23:05:47.58#ibcon#*after write, iclass 21, count 0 2006.229.23:05:47.58#ibcon#*before return 0, iclass 21, count 0 2006.229.23:05:47.58#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:47.58#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:47.58#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:05:47.58#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:05:47.58$vck44/valo=8,884.99 2006.229.23:05:47.58#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.23:05:47.58#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.23:05:47.58#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:47.58#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:47.58#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:47.58#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:47.58#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:05:47.58#ibcon#first serial, iclass 23, count 0 2006.229.23:05:47.58#ibcon#enter sib2, iclass 23, count 0 2006.229.23:05:47.58#ibcon#flushed, iclass 23, count 0 2006.229.23:05:47.58#ibcon#about to write, iclass 23, count 0 2006.229.23:05:47.58#ibcon#wrote, iclass 23, count 0 2006.229.23:05:47.58#ibcon#about to read 3, iclass 23, count 0 2006.229.23:05:47.60#ibcon#read 3, iclass 23, count 0 2006.229.23:05:47.60#ibcon#about to read 4, iclass 23, count 0 2006.229.23:05:47.60#ibcon#read 4, iclass 23, count 0 2006.229.23:05:47.60#ibcon#about to read 5, iclass 23, count 0 2006.229.23:05:47.60#ibcon#read 5, iclass 23, count 0 2006.229.23:05:47.60#ibcon#about to read 6, iclass 23, count 0 2006.229.23:05:47.60#ibcon#read 6, iclass 23, count 0 2006.229.23:05:47.60#ibcon#end of sib2, iclass 23, count 0 2006.229.23:05:47.60#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:05:47.60#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:05:47.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:05:47.60#ibcon#*before write, iclass 23, count 0 2006.229.23:05:47.60#ibcon#enter sib2, iclass 23, count 0 2006.229.23:05:47.60#ibcon#flushed, iclass 23, count 0 2006.229.23:05:47.60#ibcon#about to write, iclass 23, count 0 2006.229.23:05:47.60#ibcon#wrote, iclass 23, count 0 2006.229.23:05:47.60#ibcon#about to read 3, iclass 23, count 0 2006.229.23:05:47.64#ibcon#read 3, iclass 23, count 0 2006.229.23:05:47.64#ibcon#about to read 4, iclass 23, count 0 2006.229.23:05:47.64#ibcon#read 4, iclass 23, count 0 2006.229.23:05:47.64#ibcon#about to read 5, iclass 23, count 0 2006.229.23:05:47.64#ibcon#read 5, iclass 23, count 0 2006.229.23:05:47.64#ibcon#about to read 6, iclass 23, count 0 2006.229.23:05:47.64#ibcon#read 6, iclass 23, count 0 2006.229.23:05:47.64#ibcon#end of sib2, iclass 23, count 0 2006.229.23:05:47.64#ibcon#*after write, iclass 23, count 0 2006.229.23:05:47.64#ibcon#*before return 0, iclass 23, count 0 2006.229.23:05:47.64#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:47.64#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:47.64#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:05:47.64#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:05:47.64$vck44/va=8,6 2006.229.23:05:47.64#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.23:05:47.64#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.23:05:47.64#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:47.64#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:47.70#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:47.70#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:47.70#ibcon#enter wrdev, iclass 25, count 2 2006.229.23:05:47.70#ibcon#first serial, iclass 25, count 2 2006.229.23:05:47.70#ibcon#enter sib2, iclass 25, count 2 2006.229.23:05:47.70#ibcon#flushed, iclass 25, count 2 2006.229.23:05:47.70#ibcon#about to write, iclass 25, count 2 2006.229.23:05:47.70#ibcon#wrote, iclass 25, count 2 2006.229.23:05:47.70#ibcon#about to read 3, iclass 25, count 2 2006.229.23:05:47.72#ibcon#read 3, iclass 25, count 2 2006.229.23:05:47.72#ibcon#about to read 4, iclass 25, count 2 2006.229.23:05:47.72#ibcon#read 4, iclass 25, count 2 2006.229.23:05:47.72#ibcon#about to read 5, iclass 25, count 2 2006.229.23:05:47.72#ibcon#read 5, iclass 25, count 2 2006.229.23:05:47.72#ibcon#about to read 6, iclass 25, count 2 2006.229.23:05:47.72#ibcon#read 6, iclass 25, count 2 2006.229.23:05:47.72#ibcon#end of sib2, iclass 25, count 2 2006.229.23:05:47.72#ibcon#*mode == 0, iclass 25, count 2 2006.229.23:05:47.72#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.23:05:47.72#ibcon#[25=AT08-06\r\n] 2006.229.23:05:47.72#ibcon#*before write, iclass 25, count 2 2006.229.23:05:47.72#ibcon#enter sib2, iclass 25, count 2 2006.229.23:05:47.72#ibcon#flushed, iclass 25, count 2 2006.229.23:05:47.72#ibcon#about to write, iclass 25, count 2 2006.229.23:05:47.72#ibcon#wrote, iclass 25, count 2 2006.229.23:05:47.72#ibcon#about to read 3, iclass 25, count 2 2006.229.23:05:47.75#ibcon#read 3, iclass 25, count 2 2006.229.23:05:47.75#ibcon#about to read 4, iclass 25, count 2 2006.229.23:05:47.75#ibcon#read 4, iclass 25, count 2 2006.229.23:05:47.75#ibcon#about to read 5, iclass 25, count 2 2006.229.23:05:47.75#ibcon#read 5, iclass 25, count 2 2006.229.23:05:47.75#ibcon#about to read 6, iclass 25, count 2 2006.229.23:05:47.75#ibcon#read 6, iclass 25, count 2 2006.229.23:05:47.75#ibcon#end of sib2, iclass 25, count 2 2006.229.23:05:47.75#ibcon#*after write, iclass 25, count 2 2006.229.23:05:47.75#ibcon#*before return 0, iclass 25, count 2 2006.229.23:05:47.75#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:47.75#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:47.75#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.23:05:47.75#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:47.75#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:47.87#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:47.87#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:47.87#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:05:47.87#ibcon#first serial, iclass 25, count 0 2006.229.23:05:47.87#ibcon#enter sib2, iclass 25, count 0 2006.229.23:05:47.87#ibcon#flushed, iclass 25, count 0 2006.229.23:05:47.87#ibcon#about to write, iclass 25, count 0 2006.229.23:05:47.87#ibcon#wrote, iclass 25, count 0 2006.229.23:05:47.87#ibcon#about to read 3, iclass 25, count 0 2006.229.23:05:47.89#ibcon#read 3, iclass 25, count 0 2006.229.23:05:47.89#ibcon#about to read 4, iclass 25, count 0 2006.229.23:05:47.89#ibcon#read 4, iclass 25, count 0 2006.229.23:05:47.89#ibcon#about to read 5, iclass 25, count 0 2006.229.23:05:47.89#ibcon#read 5, iclass 25, count 0 2006.229.23:05:47.89#ibcon#about to read 6, iclass 25, count 0 2006.229.23:05:47.89#ibcon#read 6, iclass 25, count 0 2006.229.23:05:47.89#ibcon#end of sib2, iclass 25, count 0 2006.229.23:05:47.89#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:05:47.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:05:47.89#ibcon#[25=USB\r\n] 2006.229.23:05:47.89#ibcon#*before write, iclass 25, count 0 2006.229.23:05:47.89#ibcon#enter sib2, iclass 25, count 0 2006.229.23:05:47.89#ibcon#flushed, iclass 25, count 0 2006.229.23:05:47.89#ibcon#about to write, iclass 25, count 0 2006.229.23:05:47.89#ibcon#wrote, iclass 25, count 0 2006.229.23:05:47.89#ibcon#about to read 3, iclass 25, count 0 2006.229.23:05:47.92#ibcon#read 3, iclass 25, count 0 2006.229.23:05:47.92#ibcon#about to read 4, iclass 25, count 0 2006.229.23:05:47.92#ibcon#read 4, iclass 25, count 0 2006.229.23:05:47.92#ibcon#about to read 5, iclass 25, count 0 2006.229.23:05:47.92#ibcon#read 5, iclass 25, count 0 2006.229.23:05:47.92#ibcon#about to read 6, iclass 25, count 0 2006.229.23:05:47.92#ibcon#read 6, iclass 25, count 0 2006.229.23:05:47.92#ibcon#end of sib2, iclass 25, count 0 2006.229.23:05:47.92#ibcon#*after write, iclass 25, count 0 2006.229.23:05:47.92#ibcon#*before return 0, iclass 25, count 0 2006.229.23:05:47.92#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:47.92#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:47.92#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:05:47.92#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:05:47.92$vck44/vblo=1,629.99 2006.229.23:05:47.92#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.23:05:47.92#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.23:05:47.92#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:47.92#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:47.92#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:47.92#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:47.92#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:05:47.92#ibcon#first serial, iclass 27, count 0 2006.229.23:05:47.92#ibcon#enter sib2, iclass 27, count 0 2006.229.23:05:47.92#ibcon#flushed, iclass 27, count 0 2006.229.23:05:47.92#ibcon#about to write, iclass 27, count 0 2006.229.23:05:47.92#ibcon#wrote, iclass 27, count 0 2006.229.23:05:47.92#ibcon#about to read 3, iclass 27, count 0 2006.229.23:05:47.94#ibcon#read 3, iclass 27, count 0 2006.229.23:05:47.94#ibcon#about to read 4, iclass 27, count 0 2006.229.23:05:47.94#ibcon#read 4, iclass 27, count 0 2006.229.23:05:47.94#ibcon#about to read 5, iclass 27, count 0 2006.229.23:05:47.94#ibcon#read 5, iclass 27, count 0 2006.229.23:05:47.94#ibcon#about to read 6, iclass 27, count 0 2006.229.23:05:47.94#ibcon#read 6, iclass 27, count 0 2006.229.23:05:47.94#ibcon#end of sib2, iclass 27, count 0 2006.229.23:05:47.94#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:05:47.94#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:05:47.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:05:47.94#ibcon#*before write, iclass 27, count 0 2006.229.23:05:47.94#ibcon#enter sib2, iclass 27, count 0 2006.229.23:05:47.94#ibcon#flushed, iclass 27, count 0 2006.229.23:05:47.94#ibcon#about to write, iclass 27, count 0 2006.229.23:05:47.94#ibcon#wrote, iclass 27, count 0 2006.229.23:05:47.94#ibcon#about to read 3, iclass 27, count 0 2006.229.23:05:47.98#ibcon#read 3, iclass 27, count 0 2006.229.23:05:47.98#ibcon#about to read 4, iclass 27, count 0 2006.229.23:05:47.98#ibcon#read 4, iclass 27, count 0 2006.229.23:05:47.98#ibcon#about to read 5, iclass 27, count 0 2006.229.23:05:47.98#ibcon#read 5, iclass 27, count 0 2006.229.23:05:47.98#ibcon#about to read 6, iclass 27, count 0 2006.229.23:05:47.98#ibcon#read 6, iclass 27, count 0 2006.229.23:05:47.98#ibcon#end of sib2, iclass 27, count 0 2006.229.23:05:47.98#ibcon#*after write, iclass 27, count 0 2006.229.23:05:47.98#ibcon#*before return 0, iclass 27, count 0 2006.229.23:05:47.98#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:47.98#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:47.98#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:05:47.98#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:05:47.98$vck44/vb=1,4 2006.229.23:05:47.98#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.23:05:47.98#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.23:05:47.98#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:47.98#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:05:47.98#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:05:47.98#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:05:47.98#ibcon#enter wrdev, iclass 29, count 2 2006.229.23:05:47.98#ibcon#first serial, iclass 29, count 2 2006.229.23:05:47.98#ibcon#enter sib2, iclass 29, count 2 2006.229.23:05:47.98#ibcon#flushed, iclass 29, count 2 2006.229.23:05:47.98#ibcon#about to write, iclass 29, count 2 2006.229.23:05:47.98#ibcon#wrote, iclass 29, count 2 2006.229.23:05:47.98#ibcon#about to read 3, iclass 29, count 2 2006.229.23:05:48.00#ibcon#read 3, iclass 29, count 2 2006.229.23:05:48.00#ibcon#about to read 4, iclass 29, count 2 2006.229.23:05:48.00#ibcon#read 4, iclass 29, count 2 2006.229.23:05:48.00#ibcon#about to read 5, iclass 29, count 2 2006.229.23:05:48.00#ibcon#read 5, iclass 29, count 2 2006.229.23:05:48.00#ibcon#about to read 6, iclass 29, count 2 2006.229.23:05:48.00#ibcon#read 6, iclass 29, count 2 2006.229.23:05:48.00#ibcon#end of sib2, iclass 29, count 2 2006.229.23:05:48.00#ibcon#*mode == 0, iclass 29, count 2 2006.229.23:05:48.00#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.23:05:48.00#ibcon#[27=AT01-04\r\n] 2006.229.23:05:48.00#ibcon#*before write, iclass 29, count 2 2006.229.23:05:48.00#ibcon#enter sib2, iclass 29, count 2 2006.229.23:05:48.00#ibcon#flushed, iclass 29, count 2 2006.229.23:05:48.00#ibcon#about to write, iclass 29, count 2 2006.229.23:05:48.00#ibcon#wrote, iclass 29, count 2 2006.229.23:05:48.00#ibcon#about to read 3, iclass 29, count 2 2006.229.23:05:48.03#ibcon#read 3, iclass 29, count 2 2006.229.23:05:48.03#ibcon#about to read 4, iclass 29, count 2 2006.229.23:05:48.03#ibcon#read 4, iclass 29, count 2 2006.229.23:05:48.03#ibcon#about to read 5, iclass 29, count 2 2006.229.23:05:48.03#ibcon#read 5, iclass 29, count 2 2006.229.23:05:48.03#ibcon#about to read 6, iclass 29, count 2 2006.229.23:05:48.03#ibcon#read 6, iclass 29, count 2 2006.229.23:05:48.03#ibcon#end of sib2, iclass 29, count 2 2006.229.23:05:48.03#ibcon#*after write, iclass 29, count 2 2006.229.23:05:48.03#ibcon#*before return 0, iclass 29, count 2 2006.229.23:05:48.03#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:05:48.03#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:05:48.03#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.23:05:48.03#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:48.03#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:05:48.15#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:05:48.15#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:05:48.15#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:05:48.15#ibcon#first serial, iclass 29, count 0 2006.229.23:05:48.15#ibcon#enter sib2, iclass 29, count 0 2006.229.23:05:48.15#ibcon#flushed, iclass 29, count 0 2006.229.23:05:48.15#ibcon#about to write, iclass 29, count 0 2006.229.23:05:48.15#ibcon#wrote, iclass 29, count 0 2006.229.23:05:48.15#ibcon#about to read 3, iclass 29, count 0 2006.229.23:05:48.17#ibcon#read 3, iclass 29, count 0 2006.229.23:05:48.17#ibcon#about to read 4, iclass 29, count 0 2006.229.23:05:48.17#ibcon#read 4, iclass 29, count 0 2006.229.23:05:48.17#ibcon#about to read 5, iclass 29, count 0 2006.229.23:05:48.17#ibcon#read 5, iclass 29, count 0 2006.229.23:05:48.17#ibcon#about to read 6, iclass 29, count 0 2006.229.23:05:48.17#ibcon#read 6, iclass 29, count 0 2006.229.23:05:48.17#ibcon#end of sib2, iclass 29, count 0 2006.229.23:05:48.17#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:05:48.17#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:05:48.17#ibcon#[27=USB\r\n] 2006.229.23:05:48.17#ibcon#*before write, iclass 29, count 0 2006.229.23:05:48.17#ibcon#enter sib2, iclass 29, count 0 2006.229.23:05:48.17#ibcon#flushed, iclass 29, count 0 2006.229.23:05:48.17#ibcon#about to write, iclass 29, count 0 2006.229.23:05:48.17#ibcon#wrote, iclass 29, count 0 2006.229.23:05:48.17#ibcon#about to read 3, iclass 29, count 0 2006.229.23:05:48.20#ibcon#read 3, iclass 29, count 0 2006.229.23:05:48.20#ibcon#about to read 4, iclass 29, count 0 2006.229.23:05:48.20#ibcon#read 4, iclass 29, count 0 2006.229.23:05:48.20#ibcon#about to read 5, iclass 29, count 0 2006.229.23:05:48.20#ibcon#read 5, iclass 29, count 0 2006.229.23:05:48.20#ibcon#about to read 6, iclass 29, count 0 2006.229.23:05:48.20#ibcon#read 6, iclass 29, count 0 2006.229.23:05:48.20#ibcon#end of sib2, iclass 29, count 0 2006.229.23:05:48.20#ibcon#*after write, iclass 29, count 0 2006.229.23:05:48.20#ibcon#*before return 0, iclass 29, count 0 2006.229.23:05:48.20#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:05:48.20#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:05:48.20#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:05:48.20#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:05:48.20$vck44/vblo=2,634.99 2006.229.23:05:48.20#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:05:48.20#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:05:48.20#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:48.20#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:48.20#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:48.20#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:48.20#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:05:48.20#ibcon#first serial, iclass 31, count 0 2006.229.23:05:48.20#ibcon#enter sib2, iclass 31, count 0 2006.229.23:05:48.20#ibcon#flushed, iclass 31, count 0 2006.229.23:05:48.20#ibcon#about to write, iclass 31, count 0 2006.229.23:05:48.20#ibcon#wrote, iclass 31, count 0 2006.229.23:05:48.20#ibcon#about to read 3, iclass 31, count 0 2006.229.23:05:48.22#ibcon#read 3, iclass 31, count 0 2006.229.23:05:48.22#ibcon#about to read 4, iclass 31, count 0 2006.229.23:05:48.22#ibcon#read 4, iclass 31, count 0 2006.229.23:05:48.22#ibcon#about to read 5, iclass 31, count 0 2006.229.23:05:48.22#ibcon#read 5, iclass 31, count 0 2006.229.23:05:48.22#ibcon#about to read 6, iclass 31, count 0 2006.229.23:05:48.22#ibcon#read 6, iclass 31, count 0 2006.229.23:05:48.22#ibcon#end of sib2, iclass 31, count 0 2006.229.23:05:48.22#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:05:48.22#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:05:48.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:05:48.22#ibcon#*before write, iclass 31, count 0 2006.229.23:05:48.22#ibcon#enter sib2, iclass 31, count 0 2006.229.23:05:48.22#ibcon#flushed, iclass 31, count 0 2006.229.23:05:48.22#ibcon#about to write, iclass 31, count 0 2006.229.23:05:48.22#ibcon#wrote, iclass 31, count 0 2006.229.23:05:48.22#ibcon#about to read 3, iclass 31, count 0 2006.229.23:05:48.26#ibcon#read 3, iclass 31, count 0 2006.229.23:05:48.26#ibcon#about to read 4, iclass 31, count 0 2006.229.23:05:48.26#ibcon#read 4, iclass 31, count 0 2006.229.23:05:48.26#ibcon#about to read 5, iclass 31, count 0 2006.229.23:05:48.26#ibcon#read 5, iclass 31, count 0 2006.229.23:05:48.26#ibcon#about to read 6, iclass 31, count 0 2006.229.23:05:48.26#ibcon#read 6, iclass 31, count 0 2006.229.23:05:48.26#ibcon#end of sib2, iclass 31, count 0 2006.229.23:05:48.26#ibcon#*after write, iclass 31, count 0 2006.229.23:05:48.26#ibcon#*before return 0, iclass 31, count 0 2006.229.23:05:48.26#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:48.26#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:05:48.26#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:05:48.26#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:05:48.26$vck44/vb=2,4 2006.229.23:05:48.26#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.23:05:48.26#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.23:05:48.26#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:48.26#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:48.32#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:48.32#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:48.32#ibcon#enter wrdev, iclass 33, count 2 2006.229.23:05:48.32#ibcon#first serial, iclass 33, count 2 2006.229.23:05:48.32#ibcon#enter sib2, iclass 33, count 2 2006.229.23:05:48.32#ibcon#flushed, iclass 33, count 2 2006.229.23:05:48.32#ibcon#about to write, iclass 33, count 2 2006.229.23:05:48.32#ibcon#wrote, iclass 33, count 2 2006.229.23:05:48.32#ibcon#about to read 3, iclass 33, count 2 2006.229.23:05:48.34#ibcon#read 3, iclass 33, count 2 2006.229.23:05:48.34#ibcon#about to read 4, iclass 33, count 2 2006.229.23:05:48.34#ibcon#read 4, iclass 33, count 2 2006.229.23:05:48.34#ibcon#about to read 5, iclass 33, count 2 2006.229.23:05:48.34#ibcon#read 5, iclass 33, count 2 2006.229.23:05:48.34#ibcon#about to read 6, iclass 33, count 2 2006.229.23:05:48.34#ibcon#read 6, iclass 33, count 2 2006.229.23:05:48.34#ibcon#end of sib2, iclass 33, count 2 2006.229.23:05:48.34#ibcon#*mode == 0, iclass 33, count 2 2006.229.23:05:48.34#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.23:05:48.34#ibcon#[27=AT02-04\r\n] 2006.229.23:05:48.34#ibcon#*before write, iclass 33, count 2 2006.229.23:05:48.34#ibcon#enter sib2, iclass 33, count 2 2006.229.23:05:48.34#ibcon#flushed, iclass 33, count 2 2006.229.23:05:48.34#ibcon#about to write, iclass 33, count 2 2006.229.23:05:48.34#ibcon#wrote, iclass 33, count 2 2006.229.23:05:48.34#ibcon#about to read 3, iclass 33, count 2 2006.229.23:05:48.37#ibcon#read 3, iclass 33, count 2 2006.229.23:05:48.37#ibcon#about to read 4, iclass 33, count 2 2006.229.23:05:48.37#ibcon#read 4, iclass 33, count 2 2006.229.23:05:48.37#ibcon#about to read 5, iclass 33, count 2 2006.229.23:05:48.37#ibcon#read 5, iclass 33, count 2 2006.229.23:05:48.37#ibcon#about to read 6, iclass 33, count 2 2006.229.23:05:48.37#ibcon#read 6, iclass 33, count 2 2006.229.23:05:48.37#ibcon#end of sib2, iclass 33, count 2 2006.229.23:05:48.37#ibcon#*after write, iclass 33, count 2 2006.229.23:05:48.37#ibcon#*before return 0, iclass 33, count 2 2006.229.23:05:48.37#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:48.37#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:05:48.37#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.23:05:48.37#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:48.37#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:48.49#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:48.49#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:48.49#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:05:48.49#ibcon#first serial, iclass 33, count 0 2006.229.23:05:48.49#ibcon#enter sib2, iclass 33, count 0 2006.229.23:05:48.49#ibcon#flushed, iclass 33, count 0 2006.229.23:05:48.49#ibcon#about to write, iclass 33, count 0 2006.229.23:05:48.49#ibcon#wrote, iclass 33, count 0 2006.229.23:05:48.49#ibcon#about to read 3, iclass 33, count 0 2006.229.23:05:48.51#ibcon#read 3, iclass 33, count 0 2006.229.23:05:48.51#ibcon#about to read 4, iclass 33, count 0 2006.229.23:05:48.51#ibcon#read 4, iclass 33, count 0 2006.229.23:05:48.51#ibcon#about to read 5, iclass 33, count 0 2006.229.23:05:48.51#ibcon#read 5, iclass 33, count 0 2006.229.23:05:48.51#ibcon#about to read 6, iclass 33, count 0 2006.229.23:05:48.51#ibcon#read 6, iclass 33, count 0 2006.229.23:05:48.51#ibcon#end of sib2, iclass 33, count 0 2006.229.23:05:48.51#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:05:48.51#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:05:48.51#ibcon#[27=USB\r\n] 2006.229.23:05:48.51#ibcon#*before write, iclass 33, count 0 2006.229.23:05:48.51#ibcon#enter sib2, iclass 33, count 0 2006.229.23:05:48.51#ibcon#flushed, iclass 33, count 0 2006.229.23:05:48.51#ibcon#about to write, iclass 33, count 0 2006.229.23:05:48.51#ibcon#wrote, iclass 33, count 0 2006.229.23:05:48.51#ibcon#about to read 3, iclass 33, count 0 2006.229.23:05:48.54#ibcon#read 3, iclass 33, count 0 2006.229.23:05:48.54#ibcon#about to read 4, iclass 33, count 0 2006.229.23:05:48.54#ibcon#read 4, iclass 33, count 0 2006.229.23:05:48.54#ibcon#about to read 5, iclass 33, count 0 2006.229.23:05:48.54#ibcon#read 5, iclass 33, count 0 2006.229.23:05:48.54#ibcon#about to read 6, iclass 33, count 0 2006.229.23:05:48.54#ibcon#read 6, iclass 33, count 0 2006.229.23:05:48.54#ibcon#end of sib2, iclass 33, count 0 2006.229.23:05:48.54#ibcon#*after write, iclass 33, count 0 2006.229.23:05:48.54#ibcon#*before return 0, iclass 33, count 0 2006.229.23:05:48.54#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:48.54#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:05:48.54#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:05:48.54#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:05:48.54$vck44/vblo=3,649.99 2006.229.23:05:48.54#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:05:48.54#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:05:48.54#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:48.54#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:48.54#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:48.54#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:48.54#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:05:48.54#ibcon#first serial, iclass 35, count 0 2006.229.23:05:48.54#ibcon#enter sib2, iclass 35, count 0 2006.229.23:05:48.54#ibcon#flushed, iclass 35, count 0 2006.229.23:05:48.54#ibcon#about to write, iclass 35, count 0 2006.229.23:05:48.54#ibcon#wrote, iclass 35, count 0 2006.229.23:05:48.54#ibcon#about to read 3, iclass 35, count 0 2006.229.23:05:48.56#ibcon#read 3, iclass 35, count 0 2006.229.23:05:48.56#ibcon#about to read 4, iclass 35, count 0 2006.229.23:05:48.56#ibcon#read 4, iclass 35, count 0 2006.229.23:05:48.56#ibcon#about to read 5, iclass 35, count 0 2006.229.23:05:48.56#ibcon#read 5, iclass 35, count 0 2006.229.23:05:48.56#ibcon#about to read 6, iclass 35, count 0 2006.229.23:05:48.56#ibcon#read 6, iclass 35, count 0 2006.229.23:05:48.56#ibcon#end of sib2, iclass 35, count 0 2006.229.23:05:48.56#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:05:48.56#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:05:48.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:05:48.56#ibcon#*before write, iclass 35, count 0 2006.229.23:05:48.56#ibcon#enter sib2, iclass 35, count 0 2006.229.23:05:48.56#ibcon#flushed, iclass 35, count 0 2006.229.23:05:48.56#ibcon#about to write, iclass 35, count 0 2006.229.23:05:48.56#ibcon#wrote, iclass 35, count 0 2006.229.23:05:48.56#ibcon#about to read 3, iclass 35, count 0 2006.229.23:05:48.60#ibcon#read 3, iclass 35, count 0 2006.229.23:05:48.60#ibcon#about to read 4, iclass 35, count 0 2006.229.23:05:48.60#ibcon#read 4, iclass 35, count 0 2006.229.23:05:48.60#ibcon#about to read 5, iclass 35, count 0 2006.229.23:05:48.60#ibcon#read 5, iclass 35, count 0 2006.229.23:05:48.60#ibcon#about to read 6, iclass 35, count 0 2006.229.23:05:48.60#ibcon#read 6, iclass 35, count 0 2006.229.23:05:48.60#ibcon#end of sib2, iclass 35, count 0 2006.229.23:05:48.60#ibcon#*after write, iclass 35, count 0 2006.229.23:05:48.60#ibcon#*before return 0, iclass 35, count 0 2006.229.23:05:48.60#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:48.63#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:05:48.63#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:05:48.63#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:05:48.63$vck44/vb=3,4 2006.229.23:05:48.63#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.23:05:48.63#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.23:05:48.63#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:48.63#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:48.66#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:48.66#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:48.66#ibcon#enter wrdev, iclass 37, count 2 2006.229.23:05:48.66#ibcon#first serial, iclass 37, count 2 2006.229.23:05:48.66#ibcon#enter sib2, iclass 37, count 2 2006.229.23:05:48.66#ibcon#flushed, iclass 37, count 2 2006.229.23:05:48.66#ibcon#about to write, iclass 37, count 2 2006.229.23:05:48.66#ibcon#wrote, iclass 37, count 2 2006.229.23:05:48.66#ibcon#about to read 3, iclass 37, count 2 2006.229.23:05:48.68#ibcon#read 3, iclass 37, count 2 2006.229.23:05:48.68#ibcon#about to read 4, iclass 37, count 2 2006.229.23:05:48.68#ibcon#read 4, iclass 37, count 2 2006.229.23:05:48.68#ibcon#about to read 5, iclass 37, count 2 2006.229.23:05:48.68#ibcon#read 5, iclass 37, count 2 2006.229.23:05:48.68#ibcon#about to read 6, iclass 37, count 2 2006.229.23:05:48.68#ibcon#read 6, iclass 37, count 2 2006.229.23:05:48.68#ibcon#end of sib2, iclass 37, count 2 2006.229.23:05:48.68#ibcon#*mode == 0, iclass 37, count 2 2006.229.23:05:48.68#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.23:05:48.68#ibcon#[27=AT03-04\r\n] 2006.229.23:05:48.68#ibcon#*before write, iclass 37, count 2 2006.229.23:05:48.68#ibcon#enter sib2, iclass 37, count 2 2006.229.23:05:48.68#ibcon#flushed, iclass 37, count 2 2006.229.23:05:48.68#ibcon#about to write, iclass 37, count 2 2006.229.23:05:48.68#ibcon#wrote, iclass 37, count 2 2006.229.23:05:48.68#ibcon#about to read 3, iclass 37, count 2 2006.229.23:05:48.71#ibcon#read 3, iclass 37, count 2 2006.229.23:05:48.71#ibcon#about to read 4, iclass 37, count 2 2006.229.23:05:48.71#ibcon#read 4, iclass 37, count 2 2006.229.23:05:48.71#ibcon#about to read 5, iclass 37, count 2 2006.229.23:05:48.71#ibcon#read 5, iclass 37, count 2 2006.229.23:05:48.71#ibcon#about to read 6, iclass 37, count 2 2006.229.23:05:48.71#ibcon#read 6, iclass 37, count 2 2006.229.23:05:48.71#ibcon#end of sib2, iclass 37, count 2 2006.229.23:05:48.71#ibcon#*after write, iclass 37, count 2 2006.229.23:05:48.71#ibcon#*before return 0, iclass 37, count 2 2006.229.23:05:48.71#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:48.71#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:05:48.71#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.23:05:48.71#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:48.71#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:48.83#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:48.83#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:48.83#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:05:48.83#ibcon#first serial, iclass 37, count 0 2006.229.23:05:48.83#ibcon#enter sib2, iclass 37, count 0 2006.229.23:05:48.83#ibcon#flushed, iclass 37, count 0 2006.229.23:05:48.83#ibcon#about to write, iclass 37, count 0 2006.229.23:05:48.83#ibcon#wrote, iclass 37, count 0 2006.229.23:05:48.83#ibcon#about to read 3, iclass 37, count 0 2006.229.23:05:48.85#ibcon#read 3, iclass 37, count 0 2006.229.23:05:48.85#ibcon#about to read 4, iclass 37, count 0 2006.229.23:05:48.85#ibcon#read 4, iclass 37, count 0 2006.229.23:05:48.85#ibcon#about to read 5, iclass 37, count 0 2006.229.23:05:48.85#ibcon#read 5, iclass 37, count 0 2006.229.23:05:48.85#ibcon#about to read 6, iclass 37, count 0 2006.229.23:05:48.85#ibcon#read 6, iclass 37, count 0 2006.229.23:05:48.85#ibcon#end of sib2, iclass 37, count 0 2006.229.23:05:48.85#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:05:48.85#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:05:48.85#ibcon#[27=USB\r\n] 2006.229.23:05:48.85#ibcon#*before write, iclass 37, count 0 2006.229.23:05:48.85#ibcon#enter sib2, iclass 37, count 0 2006.229.23:05:48.85#ibcon#flushed, iclass 37, count 0 2006.229.23:05:48.85#ibcon#about to write, iclass 37, count 0 2006.229.23:05:48.85#ibcon#wrote, iclass 37, count 0 2006.229.23:05:48.85#ibcon#about to read 3, iclass 37, count 0 2006.229.23:05:48.88#ibcon#read 3, iclass 37, count 0 2006.229.23:05:48.88#ibcon#about to read 4, iclass 37, count 0 2006.229.23:05:48.88#ibcon#read 4, iclass 37, count 0 2006.229.23:05:48.88#ibcon#about to read 5, iclass 37, count 0 2006.229.23:05:48.88#ibcon#read 5, iclass 37, count 0 2006.229.23:05:48.88#ibcon#about to read 6, iclass 37, count 0 2006.229.23:05:48.88#ibcon#read 6, iclass 37, count 0 2006.229.23:05:48.88#ibcon#end of sib2, iclass 37, count 0 2006.229.23:05:48.88#ibcon#*after write, iclass 37, count 0 2006.229.23:05:48.88#ibcon#*before return 0, iclass 37, count 0 2006.229.23:05:48.88#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:48.88#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:05:48.88#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:05:48.88#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:05:48.88$vck44/vblo=4,679.99 2006.229.23:05:48.88#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.23:05:48.88#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.23:05:48.88#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:48.88#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:48.88#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:48.88#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:48.88#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:05:48.88#ibcon#first serial, iclass 39, count 0 2006.229.23:05:48.88#ibcon#enter sib2, iclass 39, count 0 2006.229.23:05:48.88#ibcon#flushed, iclass 39, count 0 2006.229.23:05:48.88#ibcon#about to write, iclass 39, count 0 2006.229.23:05:48.88#ibcon#wrote, iclass 39, count 0 2006.229.23:05:48.88#ibcon#about to read 3, iclass 39, count 0 2006.229.23:05:48.90#ibcon#read 3, iclass 39, count 0 2006.229.23:05:48.90#ibcon#about to read 4, iclass 39, count 0 2006.229.23:05:48.90#ibcon#read 4, iclass 39, count 0 2006.229.23:05:48.90#ibcon#about to read 5, iclass 39, count 0 2006.229.23:05:48.90#ibcon#read 5, iclass 39, count 0 2006.229.23:05:48.90#ibcon#about to read 6, iclass 39, count 0 2006.229.23:05:48.90#ibcon#read 6, iclass 39, count 0 2006.229.23:05:48.90#ibcon#end of sib2, iclass 39, count 0 2006.229.23:05:48.90#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:05:48.90#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:05:48.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:05:48.90#ibcon#*before write, iclass 39, count 0 2006.229.23:05:48.90#ibcon#enter sib2, iclass 39, count 0 2006.229.23:05:48.90#ibcon#flushed, iclass 39, count 0 2006.229.23:05:48.90#ibcon#about to write, iclass 39, count 0 2006.229.23:05:48.90#ibcon#wrote, iclass 39, count 0 2006.229.23:05:48.90#ibcon#about to read 3, iclass 39, count 0 2006.229.23:05:48.94#ibcon#read 3, iclass 39, count 0 2006.229.23:05:48.94#ibcon#about to read 4, iclass 39, count 0 2006.229.23:05:48.94#ibcon#read 4, iclass 39, count 0 2006.229.23:05:48.94#ibcon#about to read 5, iclass 39, count 0 2006.229.23:05:48.94#ibcon#read 5, iclass 39, count 0 2006.229.23:05:48.94#ibcon#about to read 6, iclass 39, count 0 2006.229.23:05:48.94#ibcon#read 6, iclass 39, count 0 2006.229.23:05:48.94#ibcon#end of sib2, iclass 39, count 0 2006.229.23:05:48.94#ibcon#*after write, iclass 39, count 0 2006.229.23:05:48.94#ibcon#*before return 0, iclass 39, count 0 2006.229.23:05:48.94#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:48.94#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:05:48.94#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:05:48.94#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:05:48.94$vck44/vb=4,4 2006.229.23:05:48.94#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.23:05:48.94#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.23:05:48.94#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:48.94#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:49.00#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:49.00#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:49.00#ibcon#enter wrdev, iclass 3, count 2 2006.229.23:05:49.00#ibcon#first serial, iclass 3, count 2 2006.229.23:05:49.00#ibcon#enter sib2, iclass 3, count 2 2006.229.23:05:49.00#ibcon#flushed, iclass 3, count 2 2006.229.23:05:49.00#ibcon#about to write, iclass 3, count 2 2006.229.23:05:49.00#ibcon#wrote, iclass 3, count 2 2006.229.23:05:49.00#ibcon#about to read 3, iclass 3, count 2 2006.229.23:05:49.02#ibcon#read 3, iclass 3, count 2 2006.229.23:05:49.02#ibcon#about to read 4, iclass 3, count 2 2006.229.23:05:49.02#ibcon#read 4, iclass 3, count 2 2006.229.23:05:49.02#ibcon#about to read 5, iclass 3, count 2 2006.229.23:05:49.02#ibcon#read 5, iclass 3, count 2 2006.229.23:05:49.02#ibcon#about to read 6, iclass 3, count 2 2006.229.23:05:49.02#ibcon#read 6, iclass 3, count 2 2006.229.23:05:49.02#ibcon#end of sib2, iclass 3, count 2 2006.229.23:05:49.02#ibcon#*mode == 0, iclass 3, count 2 2006.229.23:05:49.02#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.23:05:49.02#ibcon#[27=AT04-04\r\n] 2006.229.23:05:49.02#ibcon#*before write, iclass 3, count 2 2006.229.23:05:49.02#ibcon#enter sib2, iclass 3, count 2 2006.229.23:05:49.02#ibcon#flushed, iclass 3, count 2 2006.229.23:05:49.02#ibcon#about to write, iclass 3, count 2 2006.229.23:05:49.02#ibcon#wrote, iclass 3, count 2 2006.229.23:05:49.02#ibcon#about to read 3, iclass 3, count 2 2006.229.23:05:49.05#ibcon#read 3, iclass 3, count 2 2006.229.23:05:49.05#ibcon#about to read 4, iclass 3, count 2 2006.229.23:05:49.05#ibcon#read 4, iclass 3, count 2 2006.229.23:05:49.05#ibcon#about to read 5, iclass 3, count 2 2006.229.23:05:49.05#ibcon#read 5, iclass 3, count 2 2006.229.23:05:49.05#ibcon#about to read 6, iclass 3, count 2 2006.229.23:05:49.05#ibcon#read 6, iclass 3, count 2 2006.229.23:05:49.05#ibcon#end of sib2, iclass 3, count 2 2006.229.23:05:49.05#ibcon#*after write, iclass 3, count 2 2006.229.23:05:49.05#ibcon#*before return 0, iclass 3, count 2 2006.229.23:05:49.05#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:49.05#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:05:49.05#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.23:05:49.05#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:49.05#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:49.17#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:49.17#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:49.17#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:05:49.17#ibcon#first serial, iclass 3, count 0 2006.229.23:05:49.17#ibcon#enter sib2, iclass 3, count 0 2006.229.23:05:49.17#ibcon#flushed, iclass 3, count 0 2006.229.23:05:49.17#ibcon#about to write, iclass 3, count 0 2006.229.23:05:49.17#ibcon#wrote, iclass 3, count 0 2006.229.23:05:49.17#ibcon#about to read 3, iclass 3, count 0 2006.229.23:05:49.19#ibcon#read 3, iclass 3, count 0 2006.229.23:05:49.19#ibcon#about to read 4, iclass 3, count 0 2006.229.23:05:49.19#ibcon#read 4, iclass 3, count 0 2006.229.23:05:49.19#ibcon#about to read 5, iclass 3, count 0 2006.229.23:05:49.19#ibcon#read 5, iclass 3, count 0 2006.229.23:05:49.19#ibcon#about to read 6, iclass 3, count 0 2006.229.23:05:49.19#ibcon#read 6, iclass 3, count 0 2006.229.23:05:49.19#ibcon#end of sib2, iclass 3, count 0 2006.229.23:05:49.19#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:05:49.19#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:05:49.19#ibcon#[27=USB\r\n] 2006.229.23:05:49.19#ibcon#*before write, iclass 3, count 0 2006.229.23:05:49.19#ibcon#enter sib2, iclass 3, count 0 2006.229.23:05:49.19#ibcon#flushed, iclass 3, count 0 2006.229.23:05:49.19#ibcon#about to write, iclass 3, count 0 2006.229.23:05:49.19#ibcon#wrote, iclass 3, count 0 2006.229.23:05:49.19#ibcon#about to read 3, iclass 3, count 0 2006.229.23:05:49.19#abcon#<5=/08 1.6 4.3 29.61 831002.6\r\n> 2006.229.23:05:49.21#abcon#{5=INTERFACE CLEAR} 2006.229.23:05:49.22#ibcon#read 3, iclass 3, count 0 2006.229.23:05:49.22#ibcon#about to read 4, iclass 3, count 0 2006.229.23:05:49.22#ibcon#read 4, iclass 3, count 0 2006.229.23:05:49.22#ibcon#about to read 5, iclass 3, count 0 2006.229.23:05:49.22#ibcon#read 5, iclass 3, count 0 2006.229.23:05:49.22#ibcon#about to read 6, iclass 3, count 0 2006.229.23:05:49.22#ibcon#read 6, iclass 3, count 0 2006.229.23:05:49.22#ibcon#end of sib2, iclass 3, count 0 2006.229.23:05:49.22#ibcon#*after write, iclass 3, count 0 2006.229.23:05:49.22#ibcon#*before return 0, iclass 3, count 0 2006.229.23:05:49.22#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:49.22#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:05:49.22#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:05:49.22#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:05:49.22$vck44/vblo=5,709.99 2006.229.23:05:49.22#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.23:05:49.22#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.23:05:49.22#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:49.22#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:05:49.22#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:05:49.22#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:05:49.22#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:05:49.22#ibcon#first serial, iclass 10, count 0 2006.229.23:05:49.22#ibcon#enter sib2, iclass 10, count 0 2006.229.23:05:49.22#ibcon#flushed, iclass 10, count 0 2006.229.23:05:49.22#ibcon#about to write, iclass 10, count 0 2006.229.23:05:49.22#ibcon#wrote, iclass 10, count 0 2006.229.23:05:49.22#ibcon#about to read 3, iclass 10, count 0 2006.229.23:05:49.24#ibcon#read 3, iclass 10, count 0 2006.229.23:05:49.24#ibcon#about to read 4, iclass 10, count 0 2006.229.23:05:49.24#ibcon#read 4, iclass 10, count 0 2006.229.23:05:49.24#ibcon#about to read 5, iclass 10, count 0 2006.229.23:05:49.24#ibcon#read 5, iclass 10, count 0 2006.229.23:05:49.24#ibcon#about to read 6, iclass 10, count 0 2006.229.23:05:49.24#ibcon#read 6, iclass 10, count 0 2006.229.23:05:49.24#ibcon#end of sib2, iclass 10, count 0 2006.229.23:05:49.24#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:05:49.24#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:05:49.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:05:49.24#ibcon#*before write, iclass 10, count 0 2006.229.23:05:49.24#ibcon#enter sib2, iclass 10, count 0 2006.229.23:05:49.24#ibcon#flushed, iclass 10, count 0 2006.229.23:05:49.24#ibcon#about to write, iclass 10, count 0 2006.229.23:05:49.24#ibcon#wrote, iclass 10, count 0 2006.229.23:05:49.24#ibcon#about to read 3, iclass 10, count 0 2006.229.23:05:49.27#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:05:49.28#ibcon#read 3, iclass 10, count 0 2006.229.23:05:49.28#ibcon#about to read 4, iclass 10, count 0 2006.229.23:05:49.28#ibcon#read 4, iclass 10, count 0 2006.229.23:05:49.28#ibcon#about to read 5, iclass 10, count 0 2006.229.23:05:49.28#ibcon#read 5, iclass 10, count 0 2006.229.23:05:49.28#ibcon#about to read 6, iclass 10, count 0 2006.229.23:05:49.28#ibcon#read 6, iclass 10, count 0 2006.229.23:05:49.28#ibcon#end of sib2, iclass 10, count 0 2006.229.23:05:49.28#ibcon#*after write, iclass 10, count 0 2006.229.23:05:49.28#ibcon#*before return 0, iclass 10, count 0 2006.229.23:05:49.28#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:05:49.28#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:05:49.28#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:05:49.28#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:05:49.28$vck44/vb=5,4 2006.229.23:05:49.28#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.23:05:49.28#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.23:05:49.28#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:49.28#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:49.34#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:49.34#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:49.34#ibcon#enter wrdev, iclass 13, count 2 2006.229.23:05:49.34#ibcon#first serial, iclass 13, count 2 2006.229.23:05:49.34#ibcon#enter sib2, iclass 13, count 2 2006.229.23:05:49.34#ibcon#flushed, iclass 13, count 2 2006.229.23:05:49.34#ibcon#about to write, iclass 13, count 2 2006.229.23:05:49.34#ibcon#wrote, iclass 13, count 2 2006.229.23:05:49.34#ibcon#about to read 3, iclass 13, count 2 2006.229.23:05:49.36#ibcon#read 3, iclass 13, count 2 2006.229.23:05:49.36#ibcon#about to read 4, iclass 13, count 2 2006.229.23:05:49.36#ibcon#read 4, iclass 13, count 2 2006.229.23:05:49.36#ibcon#about to read 5, iclass 13, count 2 2006.229.23:05:49.36#ibcon#read 5, iclass 13, count 2 2006.229.23:05:49.36#ibcon#about to read 6, iclass 13, count 2 2006.229.23:05:49.36#ibcon#read 6, iclass 13, count 2 2006.229.23:05:49.36#ibcon#end of sib2, iclass 13, count 2 2006.229.23:05:49.36#ibcon#*mode == 0, iclass 13, count 2 2006.229.23:05:49.36#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.23:05:49.36#ibcon#[27=AT05-04\r\n] 2006.229.23:05:49.36#ibcon#*before write, iclass 13, count 2 2006.229.23:05:49.36#ibcon#enter sib2, iclass 13, count 2 2006.229.23:05:49.36#ibcon#flushed, iclass 13, count 2 2006.229.23:05:49.36#ibcon#about to write, iclass 13, count 2 2006.229.23:05:49.36#ibcon#wrote, iclass 13, count 2 2006.229.23:05:49.36#ibcon#about to read 3, iclass 13, count 2 2006.229.23:05:49.39#ibcon#read 3, iclass 13, count 2 2006.229.23:05:49.39#ibcon#about to read 4, iclass 13, count 2 2006.229.23:05:49.39#ibcon#read 4, iclass 13, count 2 2006.229.23:05:49.39#ibcon#about to read 5, iclass 13, count 2 2006.229.23:05:49.39#ibcon#read 5, iclass 13, count 2 2006.229.23:05:49.39#ibcon#about to read 6, iclass 13, count 2 2006.229.23:05:49.39#ibcon#read 6, iclass 13, count 2 2006.229.23:05:49.39#ibcon#end of sib2, iclass 13, count 2 2006.229.23:05:49.39#ibcon#*after write, iclass 13, count 2 2006.229.23:05:49.39#ibcon#*before return 0, iclass 13, count 2 2006.229.23:05:49.39#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:49.39#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:05:49.39#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.23:05:49.39#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:49.39#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:49.51#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:49.51#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:49.51#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:05:49.51#ibcon#first serial, iclass 13, count 0 2006.229.23:05:49.51#ibcon#enter sib2, iclass 13, count 0 2006.229.23:05:49.51#ibcon#flushed, iclass 13, count 0 2006.229.23:05:49.51#ibcon#about to write, iclass 13, count 0 2006.229.23:05:49.51#ibcon#wrote, iclass 13, count 0 2006.229.23:05:49.51#ibcon#about to read 3, iclass 13, count 0 2006.229.23:05:49.53#ibcon#read 3, iclass 13, count 0 2006.229.23:05:49.53#ibcon#about to read 4, iclass 13, count 0 2006.229.23:05:49.53#ibcon#read 4, iclass 13, count 0 2006.229.23:05:49.53#ibcon#about to read 5, iclass 13, count 0 2006.229.23:05:49.53#ibcon#read 5, iclass 13, count 0 2006.229.23:05:49.53#ibcon#about to read 6, iclass 13, count 0 2006.229.23:05:49.53#ibcon#read 6, iclass 13, count 0 2006.229.23:05:49.53#ibcon#end of sib2, iclass 13, count 0 2006.229.23:05:49.53#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:05:49.53#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:05:49.53#ibcon#[27=USB\r\n] 2006.229.23:05:49.53#ibcon#*before write, iclass 13, count 0 2006.229.23:05:49.53#ibcon#enter sib2, iclass 13, count 0 2006.229.23:05:49.53#ibcon#flushed, iclass 13, count 0 2006.229.23:05:49.53#ibcon#about to write, iclass 13, count 0 2006.229.23:05:49.53#ibcon#wrote, iclass 13, count 0 2006.229.23:05:49.53#ibcon#about to read 3, iclass 13, count 0 2006.229.23:05:49.56#ibcon#read 3, iclass 13, count 0 2006.229.23:05:49.56#ibcon#about to read 4, iclass 13, count 0 2006.229.23:05:49.56#ibcon#read 4, iclass 13, count 0 2006.229.23:05:49.56#ibcon#about to read 5, iclass 13, count 0 2006.229.23:05:49.56#ibcon#read 5, iclass 13, count 0 2006.229.23:05:49.56#ibcon#about to read 6, iclass 13, count 0 2006.229.23:05:49.56#ibcon#read 6, iclass 13, count 0 2006.229.23:05:49.56#ibcon#end of sib2, iclass 13, count 0 2006.229.23:05:49.56#ibcon#*after write, iclass 13, count 0 2006.229.23:05:49.56#ibcon#*before return 0, iclass 13, count 0 2006.229.23:05:49.56#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:49.56#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:05:49.56#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:05:49.56#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:05:49.56$vck44/vblo=6,719.99 2006.229.23:05:49.56#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.23:05:49.56#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.23:05:49.56#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:49.56#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:49.56#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:49.56#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:49.56#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:05:49.56#ibcon#first serial, iclass 15, count 0 2006.229.23:05:49.56#ibcon#enter sib2, iclass 15, count 0 2006.229.23:05:49.56#ibcon#flushed, iclass 15, count 0 2006.229.23:05:49.56#ibcon#about to write, iclass 15, count 0 2006.229.23:05:49.56#ibcon#wrote, iclass 15, count 0 2006.229.23:05:49.56#ibcon#about to read 3, iclass 15, count 0 2006.229.23:05:49.58#ibcon#read 3, iclass 15, count 0 2006.229.23:05:49.58#ibcon#about to read 4, iclass 15, count 0 2006.229.23:05:49.58#ibcon#read 4, iclass 15, count 0 2006.229.23:05:49.58#ibcon#about to read 5, iclass 15, count 0 2006.229.23:05:49.58#ibcon#read 5, iclass 15, count 0 2006.229.23:05:49.58#ibcon#about to read 6, iclass 15, count 0 2006.229.23:05:49.58#ibcon#read 6, iclass 15, count 0 2006.229.23:05:49.58#ibcon#end of sib2, iclass 15, count 0 2006.229.23:05:49.58#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:05:49.58#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:05:49.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:05:49.58#ibcon#*before write, iclass 15, count 0 2006.229.23:05:49.58#ibcon#enter sib2, iclass 15, count 0 2006.229.23:05:49.58#ibcon#flushed, iclass 15, count 0 2006.229.23:05:49.58#ibcon#about to write, iclass 15, count 0 2006.229.23:05:49.58#ibcon#wrote, iclass 15, count 0 2006.229.23:05:49.58#ibcon#about to read 3, iclass 15, count 0 2006.229.23:05:49.62#ibcon#read 3, iclass 15, count 0 2006.229.23:05:49.62#ibcon#about to read 4, iclass 15, count 0 2006.229.23:05:49.62#ibcon#read 4, iclass 15, count 0 2006.229.23:05:49.62#ibcon#about to read 5, iclass 15, count 0 2006.229.23:05:49.62#ibcon#read 5, iclass 15, count 0 2006.229.23:05:49.62#ibcon#about to read 6, iclass 15, count 0 2006.229.23:05:49.62#ibcon#read 6, iclass 15, count 0 2006.229.23:05:49.62#ibcon#end of sib2, iclass 15, count 0 2006.229.23:05:49.62#ibcon#*after write, iclass 15, count 0 2006.229.23:05:49.62#ibcon#*before return 0, iclass 15, count 0 2006.229.23:05:49.62#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:49.62#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:05:49.62#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:05:49.62#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:05:49.62$vck44/vb=6,4 2006.229.23:05:49.62#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.23:05:49.62#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.23:05:49.62#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:49.62#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:49.68#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:49.68#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:49.68#ibcon#enter wrdev, iclass 17, count 2 2006.229.23:05:49.68#ibcon#first serial, iclass 17, count 2 2006.229.23:05:49.68#ibcon#enter sib2, iclass 17, count 2 2006.229.23:05:49.68#ibcon#flushed, iclass 17, count 2 2006.229.23:05:49.68#ibcon#about to write, iclass 17, count 2 2006.229.23:05:49.68#ibcon#wrote, iclass 17, count 2 2006.229.23:05:49.68#ibcon#about to read 3, iclass 17, count 2 2006.229.23:05:49.70#ibcon#read 3, iclass 17, count 2 2006.229.23:05:49.70#ibcon#about to read 4, iclass 17, count 2 2006.229.23:05:49.70#ibcon#read 4, iclass 17, count 2 2006.229.23:05:49.70#ibcon#about to read 5, iclass 17, count 2 2006.229.23:05:49.70#ibcon#read 5, iclass 17, count 2 2006.229.23:05:49.70#ibcon#about to read 6, iclass 17, count 2 2006.229.23:05:49.70#ibcon#read 6, iclass 17, count 2 2006.229.23:05:49.70#ibcon#end of sib2, iclass 17, count 2 2006.229.23:05:49.70#ibcon#*mode == 0, iclass 17, count 2 2006.229.23:05:49.70#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.23:05:49.70#ibcon#[27=AT06-04\r\n] 2006.229.23:05:49.70#ibcon#*before write, iclass 17, count 2 2006.229.23:05:49.70#ibcon#enter sib2, iclass 17, count 2 2006.229.23:05:49.70#ibcon#flushed, iclass 17, count 2 2006.229.23:05:49.70#ibcon#about to write, iclass 17, count 2 2006.229.23:05:49.70#ibcon#wrote, iclass 17, count 2 2006.229.23:05:49.70#ibcon#about to read 3, iclass 17, count 2 2006.229.23:05:49.73#ibcon#read 3, iclass 17, count 2 2006.229.23:05:49.73#ibcon#about to read 4, iclass 17, count 2 2006.229.23:05:49.73#ibcon#read 4, iclass 17, count 2 2006.229.23:05:49.73#ibcon#about to read 5, iclass 17, count 2 2006.229.23:05:49.73#ibcon#read 5, iclass 17, count 2 2006.229.23:05:49.73#ibcon#about to read 6, iclass 17, count 2 2006.229.23:05:49.73#ibcon#read 6, iclass 17, count 2 2006.229.23:05:49.73#ibcon#end of sib2, iclass 17, count 2 2006.229.23:05:49.73#ibcon#*after write, iclass 17, count 2 2006.229.23:05:49.73#ibcon#*before return 0, iclass 17, count 2 2006.229.23:05:49.73#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:49.73#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:05:49.73#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.23:05:49.73#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:49.73#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:49.85#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:49.85#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:49.85#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:05:49.85#ibcon#first serial, iclass 17, count 0 2006.229.23:05:49.85#ibcon#enter sib2, iclass 17, count 0 2006.229.23:05:49.85#ibcon#flushed, iclass 17, count 0 2006.229.23:05:49.85#ibcon#about to write, iclass 17, count 0 2006.229.23:05:49.85#ibcon#wrote, iclass 17, count 0 2006.229.23:05:49.85#ibcon#about to read 3, iclass 17, count 0 2006.229.23:05:49.87#ibcon#read 3, iclass 17, count 0 2006.229.23:05:49.87#ibcon#about to read 4, iclass 17, count 0 2006.229.23:05:49.87#ibcon#read 4, iclass 17, count 0 2006.229.23:05:49.87#ibcon#about to read 5, iclass 17, count 0 2006.229.23:05:49.87#ibcon#read 5, iclass 17, count 0 2006.229.23:05:49.87#ibcon#about to read 6, iclass 17, count 0 2006.229.23:05:49.87#ibcon#read 6, iclass 17, count 0 2006.229.23:05:49.87#ibcon#end of sib2, iclass 17, count 0 2006.229.23:05:49.87#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:05:49.87#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:05:49.87#ibcon#[27=USB\r\n] 2006.229.23:05:49.87#ibcon#*before write, iclass 17, count 0 2006.229.23:05:49.87#ibcon#enter sib2, iclass 17, count 0 2006.229.23:05:49.87#ibcon#flushed, iclass 17, count 0 2006.229.23:05:49.87#ibcon#about to write, iclass 17, count 0 2006.229.23:05:49.87#ibcon#wrote, iclass 17, count 0 2006.229.23:05:49.87#ibcon#about to read 3, iclass 17, count 0 2006.229.23:05:49.90#ibcon#read 3, iclass 17, count 0 2006.229.23:05:49.90#ibcon#about to read 4, iclass 17, count 0 2006.229.23:05:49.90#ibcon#read 4, iclass 17, count 0 2006.229.23:05:49.90#ibcon#about to read 5, iclass 17, count 0 2006.229.23:05:49.90#ibcon#read 5, iclass 17, count 0 2006.229.23:05:49.90#ibcon#about to read 6, iclass 17, count 0 2006.229.23:05:49.90#ibcon#read 6, iclass 17, count 0 2006.229.23:05:49.90#ibcon#end of sib2, iclass 17, count 0 2006.229.23:05:49.90#ibcon#*after write, iclass 17, count 0 2006.229.23:05:49.90#ibcon#*before return 0, iclass 17, count 0 2006.229.23:05:49.90#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:49.90#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:05:49.90#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:05:49.90#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:05:49.90$vck44/vblo=7,734.99 2006.229.23:05:49.90#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.23:05:49.90#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.23:05:49.90#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:49.90#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:49.90#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:49.90#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:49.90#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:05:49.90#ibcon#first serial, iclass 19, count 0 2006.229.23:05:49.90#ibcon#enter sib2, iclass 19, count 0 2006.229.23:05:49.90#ibcon#flushed, iclass 19, count 0 2006.229.23:05:49.90#ibcon#about to write, iclass 19, count 0 2006.229.23:05:49.90#ibcon#wrote, iclass 19, count 0 2006.229.23:05:49.90#ibcon#about to read 3, iclass 19, count 0 2006.229.23:05:49.92#ibcon#read 3, iclass 19, count 0 2006.229.23:05:49.92#ibcon#about to read 4, iclass 19, count 0 2006.229.23:05:49.92#ibcon#read 4, iclass 19, count 0 2006.229.23:05:49.92#ibcon#about to read 5, iclass 19, count 0 2006.229.23:05:49.92#ibcon#read 5, iclass 19, count 0 2006.229.23:05:49.92#ibcon#about to read 6, iclass 19, count 0 2006.229.23:05:49.92#ibcon#read 6, iclass 19, count 0 2006.229.23:05:49.92#ibcon#end of sib2, iclass 19, count 0 2006.229.23:05:49.92#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:05:49.92#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:05:49.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:05:49.92#ibcon#*before write, iclass 19, count 0 2006.229.23:05:49.92#ibcon#enter sib2, iclass 19, count 0 2006.229.23:05:49.92#ibcon#flushed, iclass 19, count 0 2006.229.23:05:49.92#ibcon#about to write, iclass 19, count 0 2006.229.23:05:49.92#ibcon#wrote, iclass 19, count 0 2006.229.23:05:49.92#ibcon#about to read 3, iclass 19, count 0 2006.229.23:05:49.96#ibcon#read 3, iclass 19, count 0 2006.229.23:05:49.96#ibcon#about to read 4, iclass 19, count 0 2006.229.23:05:49.96#ibcon#read 4, iclass 19, count 0 2006.229.23:05:49.96#ibcon#about to read 5, iclass 19, count 0 2006.229.23:05:49.96#ibcon#read 5, iclass 19, count 0 2006.229.23:05:49.96#ibcon#about to read 6, iclass 19, count 0 2006.229.23:05:49.96#ibcon#read 6, iclass 19, count 0 2006.229.23:05:49.96#ibcon#end of sib2, iclass 19, count 0 2006.229.23:05:49.96#ibcon#*after write, iclass 19, count 0 2006.229.23:05:49.96#ibcon#*before return 0, iclass 19, count 0 2006.229.23:05:49.96#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:49.96#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:05:49.96#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:05:49.96#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:05:49.96$vck44/vb=7,4 2006.229.23:05:49.96#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.23:05:49.96#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.23:05:49.96#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:49.96#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:50.02#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:50.02#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:50.02#ibcon#enter wrdev, iclass 21, count 2 2006.229.23:05:50.02#ibcon#first serial, iclass 21, count 2 2006.229.23:05:50.02#ibcon#enter sib2, iclass 21, count 2 2006.229.23:05:50.02#ibcon#flushed, iclass 21, count 2 2006.229.23:05:50.02#ibcon#about to write, iclass 21, count 2 2006.229.23:05:50.02#ibcon#wrote, iclass 21, count 2 2006.229.23:05:50.02#ibcon#about to read 3, iclass 21, count 2 2006.229.23:05:50.04#ibcon#read 3, iclass 21, count 2 2006.229.23:05:50.04#ibcon#about to read 4, iclass 21, count 2 2006.229.23:05:50.04#ibcon#read 4, iclass 21, count 2 2006.229.23:05:50.04#ibcon#about to read 5, iclass 21, count 2 2006.229.23:05:50.04#ibcon#read 5, iclass 21, count 2 2006.229.23:05:50.04#ibcon#about to read 6, iclass 21, count 2 2006.229.23:05:50.04#ibcon#read 6, iclass 21, count 2 2006.229.23:05:50.04#ibcon#end of sib2, iclass 21, count 2 2006.229.23:05:50.04#ibcon#*mode == 0, iclass 21, count 2 2006.229.23:05:50.04#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.23:05:50.04#ibcon#[27=AT07-04\r\n] 2006.229.23:05:50.04#ibcon#*before write, iclass 21, count 2 2006.229.23:05:50.04#ibcon#enter sib2, iclass 21, count 2 2006.229.23:05:50.04#ibcon#flushed, iclass 21, count 2 2006.229.23:05:50.04#ibcon#about to write, iclass 21, count 2 2006.229.23:05:50.04#ibcon#wrote, iclass 21, count 2 2006.229.23:05:50.04#ibcon#about to read 3, iclass 21, count 2 2006.229.23:05:50.07#ibcon#read 3, iclass 21, count 2 2006.229.23:05:50.07#ibcon#about to read 4, iclass 21, count 2 2006.229.23:05:50.07#ibcon#read 4, iclass 21, count 2 2006.229.23:05:50.07#ibcon#about to read 5, iclass 21, count 2 2006.229.23:05:50.07#ibcon#read 5, iclass 21, count 2 2006.229.23:05:50.07#ibcon#about to read 6, iclass 21, count 2 2006.229.23:05:50.07#ibcon#read 6, iclass 21, count 2 2006.229.23:05:50.07#ibcon#end of sib2, iclass 21, count 2 2006.229.23:05:50.07#ibcon#*after write, iclass 21, count 2 2006.229.23:05:50.07#ibcon#*before return 0, iclass 21, count 2 2006.229.23:05:50.07#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:50.07#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:05:50.07#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.23:05:50.07#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:50.07#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:50.19#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:50.19#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:50.19#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:05:50.19#ibcon#first serial, iclass 21, count 0 2006.229.23:05:50.19#ibcon#enter sib2, iclass 21, count 0 2006.229.23:05:50.19#ibcon#flushed, iclass 21, count 0 2006.229.23:05:50.19#ibcon#about to write, iclass 21, count 0 2006.229.23:05:50.19#ibcon#wrote, iclass 21, count 0 2006.229.23:05:50.19#ibcon#about to read 3, iclass 21, count 0 2006.229.23:05:50.21#ibcon#read 3, iclass 21, count 0 2006.229.23:05:50.21#ibcon#about to read 4, iclass 21, count 0 2006.229.23:05:50.21#ibcon#read 4, iclass 21, count 0 2006.229.23:05:50.21#ibcon#about to read 5, iclass 21, count 0 2006.229.23:05:50.21#ibcon#read 5, iclass 21, count 0 2006.229.23:05:50.21#ibcon#about to read 6, iclass 21, count 0 2006.229.23:05:50.21#ibcon#read 6, iclass 21, count 0 2006.229.23:05:50.21#ibcon#end of sib2, iclass 21, count 0 2006.229.23:05:50.21#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:05:50.21#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:05:50.21#ibcon#[27=USB\r\n] 2006.229.23:05:50.21#ibcon#*before write, iclass 21, count 0 2006.229.23:05:50.21#ibcon#enter sib2, iclass 21, count 0 2006.229.23:05:50.21#ibcon#flushed, iclass 21, count 0 2006.229.23:05:50.21#ibcon#about to write, iclass 21, count 0 2006.229.23:05:50.21#ibcon#wrote, iclass 21, count 0 2006.229.23:05:50.21#ibcon#about to read 3, iclass 21, count 0 2006.229.23:05:50.24#ibcon#read 3, iclass 21, count 0 2006.229.23:05:50.24#ibcon#about to read 4, iclass 21, count 0 2006.229.23:05:50.24#ibcon#read 4, iclass 21, count 0 2006.229.23:05:50.24#ibcon#about to read 5, iclass 21, count 0 2006.229.23:05:50.24#ibcon#read 5, iclass 21, count 0 2006.229.23:05:50.24#ibcon#about to read 6, iclass 21, count 0 2006.229.23:05:50.24#ibcon#read 6, iclass 21, count 0 2006.229.23:05:50.24#ibcon#end of sib2, iclass 21, count 0 2006.229.23:05:50.24#ibcon#*after write, iclass 21, count 0 2006.229.23:05:50.24#ibcon#*before return 0, iclass 21, count 0 2006.229.23:05:50.24#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:50.24#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:05:50.24#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:05:50.24#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:05:50.24$vck44/vblo=8,744.99 2006.229.23:05:50.24#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.23:05:50.24#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.23:05:50.24#ibcon#ireg 17 cls_cnt 0 2006.229.23:05:50.24#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:50.24#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:50.24#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:50.24#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:05:50.24#ibcon#first serial, iclass 23, count 0 2006.229.23:05:50.24#ibcon#enter sib2, iclass 23, count 0 2006.229.23:05:50.24#ibcon#flushed, iclass 23, count 0 2006.229.23:05:50.24#ibcon#about to write, iclass 23, count 0 2006.229.23:05:50.24#ibcon#wrote, iclass 23, count 0 2006.229.23:05:50.24#ibcon#about to read 3, iclass 23, count 0 2006.229.23:05:50.26#ibcon#read 3, iclass 23, count 0 2006.229.23:05:50.26#ibcon#about to read 4, iclass 23, count 0 2006.229.23:05:50.26#ibcon#read 4, iclass 23, count 0 2006.229.23:05:50.26#ibcon#about to read 5, iclass 23, count 0 2006.229.23:05:50.26#ibcon#read 5, iclass 23, count 0 2006.229.23:05:50.26#ibcon#about to read 6, iclass 23, count 0 2006.229.23:05:50.26#ibcon#read 6, iclass 23, count 0 2006.229.23:05:50.26#ibcon#end of sib2, iclass 23, count 0 2006.229.23:05:50.26#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:05:50.26#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:05:50.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:05:50.26#ibcon#*before write, iclass 23, count 0 2006.229.23:05:50.26#ibcon#enter sib2, iclass 23, count 0 2006.229.23:05:50.26#ibcon#flushed, iclass 23, count 0 2006.229.23:05:50.26#ibcon#about to write, iclass 23, count 0 2006.229.23:05:50.26#ibcon#wrote, iclass 23, count 0 2006.229.23:05:50.26#ibcon#about to read 3, iclass 23, count 0 2006.229.23:05:50.30#ibcon#read 3, iclass 23, count 0 2006.229.23:05:50.30#ibcon#about to read 4, iclass 23, count 0 2006.229.23:05:50.30#ibcon#read 4, iclass 23, count 0 2006.229.23:05:50.30#ibcon#about to read 5, iclass 23, count 0 2006.229.23:05:50.30#ibcon#read 5, iclass 23, count 0 2006.229.23:05:50.30#ibcon#about to read 6, iclass 23, count 0 2006.229.23:05:50.30#ibcon#read 6, iclass 23, count 0 2006.229.23:05:50.30#ibcon#end of sib2, iclass 23, count 0 2006.229.23:05:50.30#ibcon#*after write, iclass 23, count 0 2006.229.23:05:50.30#ibcon#*before return 0, iclass 23, count 0 2006.229.23:05:50.30#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:50.30#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:05:50.30#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:05:50.30#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:05:50.30$vck44/vb=8,4 2006.229.23:05:50.30#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.23:05:50.30#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.23:05:50.30#ibcon#ireg 11 cls_cnt 2 2006.229.23:05:50.30#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:50.36#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:50.36#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:50.36#ibcon#enter wrdev, iclass 25, count 2 2006.229.23:05:50.36#ibcon#first serial, iclass 25, count 2 2006.229.23:05:50.36#ibcon#enter sib2, iclass 25, count 2 2006.229.23:05:50.36#ibcon#flushed, iclass 25, count 2 2006.229.23:05:50.36#ibcon#about to write, iclass 25, count 2 2006.229.23:05:50.36#ibcon#wrote, iclass 25, count 2 2006.229.23:05:50.36#ibcon#about to read 3, iclass 25, count 2 2006.229.23:05:50.38#ibcon#read 3, iclass 25, count 2 2006.229.23:05:50.38#ibcon#about to read 4, iclass 25, count 2 2006.229.23:05:50.38#ibcon#read 4, iclass 25, count 2 2006.229.23:05:50.38#ibcon#about to read 5, iclass 25, count 2 2006.229.23:05:50.38#ibcon#read 5, iclass 25, count 2 2006.229.23:05:50.38#ibcon#about to read 6, iclass 25, count 2 2006.229.23:05:50.38#ibcon#read 6, iclass 25, count 2 2006.229.23:05:50.38#ibcon#end of sib2, iclass 25, count 2 2006.229.23:05:50.38#ibcon#*mode == 0, iclass 25, count 2 2006.229.23:05:50.38#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.23:05:50.38#ibcon#[27=AT08-04\r\n] 2006.229.23:05:50.38#ibcon#*before write, iclass 25, count 2 2006.229.23:05:50.38#ibcon#enter sib2, iclass 25, count 2 2006.229.23:05:50.38#ibcon#flushed, iclass 25, count 2 2006.229.23:05:50.38#ibcon#about to write, iclass 25, count 2 2006.229.23:05:50.38#ibcon#wrote, iclass 25, count 2 2006.229.23:05:50.38#ibcon#about to read 3, iclass 25, count 2 2006.229.23:05:50.41#ibcon#read 3, iclass 25, count 2 2006.229.23:05:50.41#ibcon#about to read 4, iclass 25, count 2 2006.229.23:05:50.41#ibcon#read 4, iclass 25, count 2 2006.229.23:05:50.41#ibcon#about to read 5, iclass 25, count 2 2006.229.23:05:50.41#ibcon#read 5, iclass 25, count 2 2006.229.23:05:50.41#ibcon#about to read 6, iclass 25, count 2 2006.229.23:05:50.41#ibcon#read 6, iclass 25, count 2 2006.229.23:05:50.41#ibcon#end of sib2, iclass 25, count 2 2006.229.23:05:50.41#ibcon#*after write, iclass 25, count 2 2006.229.23:05:50.41#ibcon#*before return 0, iclass 25, count 2 2006.229.23:05:50.41#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:50.41#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:05:50.41#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.23:05:50.41#ibcon#ireg 7 cls_cnt 0 2006.229.23:05:50.41#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:50.53#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:50.53#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:50.53#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:05:50.53#ibcon#first serial, iclass 25, count 0 2006.229.23:05:50.53#ibcon#enter sib2, iclass 25, count 0 2006.229.23:05:50.53#ibcon#flushed, iclass 25, count 0 2006.229.23:05:50.53#ibcon#about to write, iclass 25, count 0 2006.229.23:05:50.53#ibcon#wrote, iclass 25, count 0 2006.229.23:05:50.53#ibcon#about to read 3, iclass 25, count 0 2006.229.23:05:50.55#ibcon#read 3, iclass 25, count 0 2006.229.23:05:50.55#ibcon#about to read 4, iclass 25, count 0 2006.229.23:05:50.55#ibcon#read 4, iclass 25, count 0 2006.229.23:05:50.55#ibcon#about to read 5, iclass 25, count 0 2006.229.23:05:50.55#ibcon#read 5, iclass 25, count 0 2006.229.23:05:50.55#ibcon#about to read 6, iclass 25, count 0 2006.229.23:05:50.55#ibcon#read 6, iclass 25, count 0 2006.229.23:05:50.55#ibcon#end of sib2, iclass 25, count 0 2006.229.23:05:50.55#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:05:50.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:05:50.55#ibcon#[27=USB\r\n] 2006.229.23:05:50.55#ibcon#*before write, iclass 25, count 0 2006.229.23:05:50.55#ibcon#enter sib2, iclass 25, count 0 2006.229.23:05:50.55#ibcon#flushed, iclass 25, count 0 2006.229.23:05:50.55#ibcon#about to write, iclass 25, count 0 2006.229.23:05:50.55#ibcon#wrote, iclass 25, count 0 2006.229.23:05:50.55#ibcon#about to read 3, iclass 25, count 0 2006.229.23:05:50.58#ibcon#read 3, iclass 25, count 0 2006.229.23:05:50.58#ibcon#about to read 4, iclass 25, count 0 2006.229.23:05:50.58#ibcon#read 4, iclass 25, count 0 2006.229.23:05:50.58#ibcon#about to read 5, iclass 25, count 0 2006.229.23:05:50.58#ibcon#read 5, iclass 25, count 0 2006.229.23:05:50.58#ibcon#about to read 6, iclass 25, count 0 2006.229.23:05:50.58#ibcon#read 6, iclass 25, count 0 2006.229.23:05:50.58#ibcon#end of sib2, iclass 25, count 0 2006.229.23:05:50.58#ibcon#*after write, iclass 25, count 0 2006.229.23:05:50.58#ibcon#*before return 0, iclass 25, count 0 2006.229.23:05:50.58#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:50.58#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:05:50.58#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:05:50.58#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:05:50.58$vck44/vabw=wide 2006.229.23:05:50.58#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.23:05:50.58#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.23:05:50.58#ibcon#ireg 8 cls_cnt 0 2006.229.23:05:50.58#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:50.58#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:50.58#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:50.58#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:05:50.58#ibcon#first serial, iclass 27, count 0 2006.229.23:05:50.58#ibcon#enter sib2, iclass 27, count 0 2006.229.23:05:50.58#ibcon#flushed, iclass 27, count 0 2006.229.23:05:50.58#ibcon#about to write, iclass 27, count 0 2006.229.23:05:50.58#ibcon#wrote, iclass 27, count 0 2006.229.23:05:50.58#ibcon#about to read 3, iclass 27, count 0 2006.229.23:05:50.60#ibcon#read 3, iclass 27, count 0 2006.229.23:05:50.60#ibcon#about to read 4, iclass 27, count 0 2006.229.23:05:50.60#ibcon#read 4, iclass 27, count 0 2006.229.23:05:50.60#ibcon#about to read 5, iclass 27, count 0 2006.229.23:05:50.60#ibcon#read 5, iclass 27, count 0 2006.229.23:05:50.60#ibcon#about to read 6, iclass 27, count 0 2006.229.23:05:50.60#ibcon#read 6, iclass 27, count 0 2006.229.23:05:50.60#ibcon#end of sib2, iclass 27, count 0 2006.229.23:05:50.60#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:05:50.60#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:05:50.60#ibcon#[25=BW32\r\n] 2006.229.23:05:50.60#ibcon#*before write, iclass 27, count 0 2006.229.23:05:50.60#ibcon#enter sib2, iclass 27, count 0 2006.229.23:05:50.60#ibcon#flushed, iclass 27, count 0 2006.229.23:05:50.60#ibcon#about to write, iclass 27, count 0 2006.229.23:05:50.60#ibcon#wrote, iclass 27, count 0 2006.229.23:05:50.60#ibcon#about to read 3, iclass 27, count 0 2006.229.23:05:50.63#ibcon#read 3, iclass 27, count 0 2006.229.23:05:50.63#ibcon#about to read 4, iclass 27, count 0 2006.229.23:05:50.63#ibcon#read 4, iclass 27, count 0 2006.229.23:05:50.63#ibcon#about to read 5, iclass 27, count 0 2006.229.23:05:50.63#ibcon#read 5, iclass 27, count 0 2006.229.23:05:50.63#ibcon#about to read 6, iclass 27, count 0 2006.229.23:05:50.63#ibcon#read 6, iclass 27, count 0 2006.229.23:05:50.63#ibcon#end of sib2, iclass 27, count 0 2006.229.23:05:50.63#ibcon#*after write, iclass 27, count 0 2006.229.23:05:50.63#ibcon#*before return 0, iclass 27, count 0 2006.229.23:05:50.63#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:50.63#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:05:50.63#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:05:50.63#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:05:50.63$vck44/vbbw=wide 2006.229.23:05:50.63#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.23:05:50.63#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.23:05:50.63#ibcon#ireg 8 cls_cnt 0 2006.229.23:05:50.63#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:05:50.70#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:05:50.70#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:05:50.70#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:05:50.70#ibcon#first serial, iclass 29, count 0 2006.229.23:05:50.70#ibcon#enter sib2, iclass 29, count 0 2006.229.23:05:50.70#ibcon#flushed, iclass 29, count 0 2006.229.23:05:50.70#ibcon#about to write, iclass 29, count 0 2006.229.23:05:50.70#ibcon#wrote, iclass 29, count 0 2006.229.23:05:50.70#ibcon#about to read 3, iclass 29, count 0 2006.229.23:05:50.72#ibcon#read 3, iclass 29, count 0 2006.229.23:05:50.72#ibcon#about to read 4, iclass 29, count 0 2006.229.23:05:50.72#ibcon#read 4, iclass 29, count 0 2006.229.23:05:50.72#ibcon#about to read 5, iclass 29, count 0 2006.229.23:05:50.72#ibcon#read 5, iclass 29, count 0 2006.229.23:05:50.72#ibcon#about to read 6, iclass 29, count 0 2006.229.23:05:50.72#ibcon#read 6, iclass 29, count 0 2006.229.23:05:50.72#ibcon#end of sib2, iclass 29, count 0 2006.229.23:05:50.72#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:05:50.72#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:05:50.72#ibcon#[27=BW32\r\n] 2006.229.23:05:50.72#ibcon#*before write, iclass 29, count 0 2006.229.23:05:50.72#ibcon#enter sib2, iclass 29, count 0 2006.229.23:05:50.72#ibcon#flushed, iclass 29, count 0 2006.229.23:05:50.72#ibcon#about to write, iclass 29, count 0 2006.229.23:05:50.72#ibcon#wrote, iclass 29, count 0 2006.229.23:05:50.72#ibcon#about to read 3, iclass 29, count 0 2006.229.23:05:50.75#ibcon#read 3, iclass 29, count 0 2006.229.23:05:50.75#ibcon#about to read 4, iclass 29, count 0 2006.229.23:05:50.75#ibcon#read 4, iclass 29, count 0 2006.229.23:05:50.75#ibcon#about to read 5, iclass 29, count 0 2006.229.23:05:50.75#ibcon#read 5, iclass 29, count 0 2006.229.23:05:50.75#ibcon#about to read 6, iclass 29, count 0 2006.229.23:05:50.75#ibcon#read 6, iclass 29, count 0 2006.229.23:05:50.75#ibcon#end of sib2, iclass 29, count 0 2006.229.23:05:50.75#ibcon#*after write, iclass 29, count 0 2006.229.23:05:50.75#ibcon#*before return 0, iclass 29, count 0 2006.229.23:05:50.75#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:05:50.75#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:05:50.75#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:05:50.75#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:05:50.75$setupk4/ifdk4 2006.229.23:05:50.75$ifdk4/lo= 2006.229.23:05:50.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:05:50.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:05:50.75$ifdk4/patch= 2006.229.23:05:50.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:05:50.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:05:50.75$setupk4/!*+20s 2006.229.23:05:59.36#abcon#<5=/08 1.5 4.3 29.61 841002.6\r\n> 2006.229.23:05:59.38#abcon#{5=INTERFACE CLEAR} 2006.229.23:05:59.44#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:06:03.14#trakl#Source acquired 2006.229.23:06:05.14#flagr#flagr/antenna,acquired 2006.229.23:06:05.24$setupk4/"tpicd 2006.229.23:06:05.24$setupk4/echo=off 2006.229.23:06:05.24$setupk4/xlog=off 2006.229.23:06:05.24:!2006.229.23:14:46 2006.229.23:14:46.00:preob 2006.229.23:14:46.14/onsource/TRACKING 2006.229.23:14:46.14:!2006.229.23:14:56 2006.229.23:14:56.02:"tape 2006.229.23:14:56.02:"st=record 2006.229.23:14:56.02:data_valid=on 2006.229.23:14:56.02:midob 2006.229.23:14:57.14/onsource/TRACKING 2006.229.23:14:57.14/wx/29.61,1002.7,84 2006.229.23:14:57.22/cable/+6.4126E-03 2006.229.23:14:58.31/va/01,08,usb,yes,28,31 2006.229.23:14:58.31/va/02,07,usb,yes,31,31 2006.229.23:14:58.31/va/03,06,usb,yes,38,41 2006.229.23:14:58.31/va/04,07,usb,yes,32,33 2006.229.23:14:58.31/va/05,04,usb,yes,28,29 2006.229.23:14:58.31/va/06,04,usb,yes,32,32 2006.229.23:14:58.31/va/07,05,usb,yes,28,29 2006.229.23:14:58.31/va/08,06,usb,yes,20,25 2006.229.23:14:58.54/valo/01,524.99,yes,locked 2006.229.23:14:58.54/valo/02,534.99,yes,locked 2006.229.23:14:58.54/valo/03,564.99,yes,locked 2006.229.23:14:58.54/valo/04,624.99,yes,locked 2006.229.23:14:58.54/valo/05,734.99,yes,locked 2006.229.23:14:58.54/valo/06,814.99,yes,locked 2006.229.23:14:58.54/valo/07,864.99,yes,locked 2006.229.23:14:58.54/valo/08,884.99,yes,locked 2006.229.23:14:59.62/vb/01,04,usb,yes,31,28 2006.229.23:14:59.62/vb/02,04,usb,yes,33,33 2006.229.23:14:59.62/vb/03,04,usb,yes,30,33 2006.229.23:14:59.62/vb/04,04,usb,yes,34,33 2006.229.23:14:59.62/vb/05,04,usb,yes,27,29 2006.229.23:14:59.62/vb/06,04,usb,yes,31,27 2006.229.23:14:59.62/vb/07,04,usb,yes,31,31 2006.229.23:14:59.62/vb/08,04,usb,yes,28,32 2006.229.23:14:59.86/vblo/01,629.99,yes,locked 2006.229.23:14:59.86/vblo/02,634.99,yes,locked 2006.229.23:14:59.86/vblo/03,649.99,yes,locked 2006.229.23:14:59.86/vblo/04,679.99,yes,locked 2006.229.23:14:59.86/vblo/05,709.99,yes,locked 2006.229.23:14:59.86/vblo/06,719.99,yes,locked 2006.229.23:14:59.86/vblo/07,734.99,yes,locked 2006.229.23:14:59.86/vblo/08,744.99,yes,locked 2006.229.23:15:00.01/vabw/8 2006.229.23:15:00.16/vbbw/8 2006.229.23:15:00.25/xfe/off,on,12.2 2006.229.23:15:00.62/ifatt/23,28,28,28 2006.229.23:15:01.08/fmout-gps/S +4.58E-07 2006.229.23:15:01.12:!2006.229.23:18:16 2006.229.23:18:16.01:data_valid=off 2006.229.23:18:16.02:"et 2006.229.23:18:16.02:!+3s 2006.229.23:18:19.05:"tape 2006.229.23:18:19.06:postob 2006.229.23:18:19.15/cable/+6.4101E-03 2006.229.23:18:19.15/wx/29.58,1002.7,87 2006.229.23:18:19.20/fmout-gps/S +4.59E-07 2006.229.23:18:19.20:scan_name=229-2321,jd0608,310 2006.229.23:18:19.21:source=nrao150,035929.75,505750.2,2000.0,ccw 2006.229.23:18:21.14#flagr#flagr/antenna,new-source 2006.229.23:18:21.15:checkk5 2006.229.23:18:21.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:18:21.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:18:22.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:18:22.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:18:23.16/chk_obsdata//k5ts1/T2292314??a.dat file size is correct (nominal:800MB, actual:796MB). 2006.229.23:18:23.56/chk_obsdata//k5ts2/T2292314??b.dat file size is correct (nominal:800MB, actual:796MB). 2006.229.23:18:23.96/chk_obsdata//k5ts3/T2292314??c.dat file size is correct (nominal:800MB, actual:796MB). 2006.229.23:18:24.37/chk_obsdata//k5ts4/T2292314??d.dat file size is correct (nominal:800MB, actual:796MB). 2006.229.23:18:25.09/k5log//k5ts1_log_newline 2006.229.23:18:25.81/k5log//k5ts2_log_newline 2006.229.23:18:26.51/k5log//k5ts3_log_newline 2006.229.23:18:27.24/k5log//k5ts4_log_newline 2006.229.23:18:27.26/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:18:27.26:setupk4=1 2006.229.23:18:27.26$setupk4/echo=on 2006.229.23:18:27.26$setupk4/pcalon 2006.229.23:18:27.26$pcalon/"no phase cal control is implemented here 2006.229.23:18:27.26$setupk4/"tpicd=stop 2006.229.23:18:27.26$setupk4/"rec=synch_on 2006.229.23:18:27.26$setupk4/"rec_mode=128 2006.229.23:18:27.26$setupk4/!* 2006.229.23:18:27.26$setupk4/recpk4 2006.229.23:18:27.26$recpk4/recpatch= 2006.229.23:18:27.27$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:18:27.27$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:18:27.27$setupk4/vck44 2006.229.23:18:27.27$vck44/valo=1,524.99 2006.229.23:18:27.27#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.23:18:27.27#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.23:18:27.27#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:27.27#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:27.27#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:27.27#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:27.27#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:18:27.27#ibcon#first serial, iclass 37, count 0 2006.229.23:18:27.27#ibcon#enter sib2, iclass 37, count 0 2006.229.23:18:27.27#ibcon#flushed, iclass 37, count 0 2006.229.23:18:27.27#ibcon#about to write, iclass 37, count 0 2006.229.23:18:27.27#ibcon#wrote, iclass 37, count 0 2006.229.23:18:27.27#ibcon#about to read 3, iclass 37, count 0 2006.229.23:18:27.28#ibcon#read 3, iclass 37, count 0 2006.229.23:18:27.28#ibcon#about to read 4, iclass 37, count 0 2006.229.23:18:27.28#ibcon#read 4, iclass 37, count 0 2006.229.23:18:27.28#ibcon#about to read 5, iclass 37, count 0 2006.229.23:18:27.28#ibcon#read 5, iclass 37, count 0 2006.229.23:18:27.28#ibcon#about to read 6, iclass 37, count 0 2006.229.23:18:27.28#ibcon#read 6, iclass 37, count 0 2006.229.23:18:27.28#ibcon#end of sib2, iclass 37, count 0 2006.229.23:18:27.28#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:18:27.28#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:18:27.28#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:18:27.28#ibcon#*before write, iclass 37, count 0 2006.229.23:18:27.28#ibcon#enter sib2, iclass 37, count 0 2006.229.23:18:27.28#ibcon#flushed, iclass 37, count 0 2006.229.23:18:27.28#ibcon#about to write, iclass 37, count 0 2006.229.23:18:27.28#ibcon#wrote, iclass 37, count 0 2006.229.23:18:27.28#ibcon#about to read 3, iclass 37, count 0 2006.229.23:18:27.33#ibcon#read 3, iclass 37, count 0 2006.229.23:18:27.33#ibcon#about to read 4, iclass 37, count 0 2006.229.23:18:27.33#ibcon#read 4, iclass 37, count 0 2006.229.23:18:27.33#ibcon#about to read 5, iclass 37, count 0 2006.229.23:18:27.33#ibcon#read 5, iclass 37, count 0 2006.229.23:18:27.33#ibcon#about to read 6, iclass 37, count 0 2006.229.23:18:27.33#ibcon#read 6, iclass 37, count 0 2006.229.23:18:27.33#ibcon#end of sib2, iclass 37, count 0 2006.229.23:18:27.33#ibcon#*after write, iclass 37, count 0 2006.229.23:18:27.33#ibcon#*before return 0, iclass 37, count 0 2006.229.23:18:27.33#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:27.33#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:27.33#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:18:27.33#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:18:27.33$vck44/va=1,8 2006.229.23:18:27.33#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.23:18:27.33#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.23:18:27.33#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:27.33#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:27.33#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:27.33#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:27.33#ibcon#enter wrdev, iclass 39, count 2 2006.229.23:18:27.33#ibcon#first serial, iclass 39, count 2 2006.229.23:18:27.33#ibcon#enter sib2, iclass 39, count 2 2006.229.23:18:27.33#ibcon#flushed, iclass 39, count 2 2006.229.23:18:27.33#ibcon#about to write, iclass 39, count 2 2006.229.23:18:27.33#ibcon#wrote, iclass 39, count 2 2006.229.23:18:27.33#ibcon#about to read 3, iclass 39, count 2 2006.229.23:18:27.35#ibcon#read 3, iclass 39, count 2 2006.229.23:18:27.35#ibcon#about to read 4, iclass 39, count 2 2006.229.23:18:27.35#ibcon#read 4, iclass 39, count 2 2006.229.23:18:27.35#ibcon#about to read 5, iclass 39, count 2 2006.229.23:18:27.35#ibcon#read 5, iclass 39, count 2 2006.229.23:18:27.35#ibcon#about to read 6, iclass 39, count 2 2006.229.23:18:27.35#ibcon#read 6, iclass 39, count 2 2006.229.23:18:27.35#ibcon#end of sib2, iclass 39, count 2 2006.229.23:18:27.35#ibcon#*mode == 0, iclass 39, count 2 2006.229.23:18:27.35#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.23:18:27.35#ibcon#[25=AT01-08\r\n] 2006.229.23:18:27.35#ibcon#*before write, iclass 39, count 2 2006.229.23:18:27.35#ibcon#enter sib2, iclass 39, count 2 2006.229.23:18:27.35#ibcon#flushed, iclass 39, count 2 2006.229.23:18:27.35#ibcon#about to write, iclass 39, count 2 2006.229.23:18:27.35#ibcon#wrote, iclass 39, count 2 2006.229.23:18:27.35#ibcon#about to read 3, iclass 39, count 2 2006.229.23:18:27.38#ibcon#read 3, iclass 39, count 2 2006.229.23:18:27.38#ibcon#about to read 4, iclass 39, count 2 2006.229.23:18:27.38#ibcon#read 4, iclass 39, count 2 2006.229.23:18:27.38#ibcon#about to read 5, iclass 39, count 2 2006.229.23:18:27.38#ibcon#read 5, iclass 39, count 2 2006.229.23:18:27.38#ibcon#about to read 6, iclass 39, count 2 2006.229.23:18:27.38#ibcon#read 6, iclass 39, count 2 2006.229.23:18:27.38#ibcon#end of sib2, iclass 39, count 2 2006.229.23:18:27.38#ibcon#*after write, iclass 39, count 2 2006.229.23:18:27.38#ibcon#*before return 0, iclass 39, count 2 2006.229.23:18:27.38#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:27.38#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:27.38#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.23:18:27.38#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:27.38#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:27.50#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:27.50#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:27.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:18:27.50#ibcon#first serial, iclass 39, count 0 2006.229.23:18:27.50#ibcon#enter sib2, iclass 39, count 0 2006.229.23:18:27.50#ibcon#flushed, iclass 39, count 0 2006.229.23:18:27.50#ibcon#about to write, iclass 39, count 0 2006.229.23:18:27.50#ibcon#wrote, iclass 39, count 0 2006.229.23:18:27.50#ibcon#about to read 3, iclass 39, count 0 2006.229.23:18:27.52#ibcon#read 3, iclass 39, count 0 2006.229.23:18:27.52#ibcon#about to read 4, iclass 39, count 0 2006.229.23:18:27.52#ibcon#read 4, iclass 39, count 0 2006.229.23:18:27.52#ibcon#about to read 5, iclass 39, count 0 2006.229.23:18:27.52#ibcon#read 5, iclass 39, count 0 2006.229.23:18:27.52#ibcon#about to read 6, iclass 39, count 0 2006.229.23:18:27.52#ibcon#read 6, iclass 39, count 0 2006.229.23:18:27.52#ibcon#end of sib2, iclass 39, count 0 2006.229.23:18:27.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:18:27.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:18:27.52#ibcon#[25=USB\r\n] 2006.229.23:18:27.52#ibcon#*before write, iclass 39, count 0 2006.229.23:18:27.52#ibcon#enter sib2, iclass 39, count 0 2006.229.23:18:27.52#ibcon#flushed, iclass 39, count 0 2006.229.23:18:27.52#ibcon#about to write, iclass 39, count 0 2006.229.23:18:27.52#ibcon#wrote, iclass 39, count 0 2006.229.23:18:27.52#ibcon#about to read 3, iclass 39, count 0 2006.229.23:18:27.55#ibcon#read 3, iclass 39, count 0 2006.229.23:18:27.55#ibcon#about to read 4, iclass 39, count 0 2006.229.23:18:27.55#ibcon#read 4, iclass 39, count 0 2006.229.23:18:27.55#ibcon#about to read 5, iclass 39, count 0 2006.229.23:18:27.55#ibcon#read 5, iclass 39, count 0 2006.229.23:18:27.55#ibcon#about to read 6, iclass 39, count 0 2006.229.23:18:27.55#ibcon#read 6, iclass 39, count 0 2006.229.23:18:27.55#ibcon#end of sib2, iclass 39, count 0 2006.229.23:18:27.55#ibcon#*after write, iclass 39, count 0 2006.229.23:18:27.55#ibcon#*before return 0, iclass 39, count 0 2006.229.23:18:27.55#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:27.55#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:27.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:18:27.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:18:27.55$vck44/valo=2,534.99 2006.229.23:18:27.55#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.23:18:27.55#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.23:18:27.55#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:27.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:27.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:27.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:27.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:18:27.55#ibcon#first serial, iclass 3, count 0 2006.229.23:18:27.55#ibcon#enter sib2, iclass 3, count 0 2006.229.23:18:27.55#ibcon#flushed, iclass 3, count 0 2006.229.23:18:27.55#ibcon#about to write, iclass 3, count 0 2006.229.23:18:27.55#ibcon#wrote, iclass 3, count 0 2006.229.23:18:27.56#ibcon#about to read 3, iclass 3, count 0 2006.229.23:18:27.57#ibcon#read 3, iclass 3, count 0 2006.229.23:18:27.57#ibcon#about to read 4, iclass 3, count 0 2006.229.23:18:27.57#ibcon#read 4, iclass 3, count 0 2006.229.23:18:27.57#ibcon#about to read 5, iclass 3, count 0 2006.229.23:18:27.57#ibcon#read 5, iclass 3, count 0 2006.229.23:18:27.57#ibcon#about to read 6, iclass 3, count 0 2006.229.23:18:27.57#ibcon#read 6, iclass 3, count 0 2006.229.23:18:27.57#ibcon#end of sib2, iclass 3, count 0 2006.229.23:18:27.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:18:27.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:18:27.57#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:18:27.57#ibcon#*before write, iclass 3, count 0 2006.229.23:18:27.57#ibcon#enter sib2, iclass 3, count 0 2006.229.23:18:27.57#ibcon#flushed, iclass 3, count 0 2006.229.23:18:27.57#ibcon#about to write, iclass 3, count 0 2006.229.23:18:27.57#ibcon#wrote, iclass 3, count 0 2006.229.23:18:27.57#ibcon#about to read 3, iclass 3, count 0 2006.229.23:18:27.61#ibcon#read 3, iclass 3, count 0 2006.229.23:18:27.61#ibcon#about to read 4, iclass 3, count 0 2006.229.23:18:27.61#ibcon#read 4, iclass 3, count 0 2006.229.23:18:27.61#ibcon#about to read 5, iclass 3, count 0 2006.229.23:18:27.61#ibcon#read 5, iclass 3, count 0 2006.229.23:18:27.61#ibcon#about to read 6, iclass 3, count 0 2006.229.23:18:27.61#ibcon#read 6, iclass 3, count 0 2006.229.23:18:27.61#ibcon#end of sib2, iclass 3, count 0 2006.229.23:18:27.61#ibcon#*after write, iclass 3, count 0 2006.229.23:18:27.61#ibcon#*before return 0, iclass 3, count 0 2006.229.23:18:27.61#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:27.61#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:27.61#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:18:27.61#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:18:27.61$vck44/va=2,7 2006.229.23:18:27.61#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.23:18:27.61#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.23:18:27.61#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:27.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:27.67#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:27.67#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:27.67#ibcon#enter wrdev, iclass 5, count 2 2006.229.23:18:27.67#ibcon#first serial, iclass 5, count 2 2006.229.23:18:27.67#ibcon#enter sib2, iclass 5, count 2 2006.229.23:18:27.67#ibcon#flushed, iclass 5, count 2 2006.229.23:18:27.67#ibcon#about to write, iclass 5, count 2 2006.229.23:18:27.67#ibcon#wrote, iclass 5, count 2 2006.229.23:18:27.67#ibcon#about to read 3, iclass 5, count 2 2006.229.23:18:27.69#ibcon#read 3, iclass 5, count 2 2006.229.23:18:27.69#ibcon#about to read 4, iclass 5, count 2 2006.229.23:18:27.69#ibcon#read 4, iclass 5, count 2 2006.229.23:18:27.69#ibcon#about to read 5, iclass 5, count 2 2006.229.23:18:27.69#ibcon#read 5, iclass 5, count 2 2006.229.23:18:27.69#ibcon#about to read 6, iclass 5, count 2 2006.229.23:18:27.69#ibcon#read 6, iclass 5, count 2 2006.229.23:18:27.69#ibcon#end of sib2, iclass 5, count 2 2006.229.23:18:27.69#ibcon#*mode == 0, iclass 5, count 2 2006.229.23:18:27.69#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.23:18:27.69#ibcon#[25=AT02-07\r\n] 2006.229.23:18:27.69#ibcon#*before write, iclass 5, count 2 2006.229.23:18:27.69#ibcon#enter sib2, iclass 5, count 2 2006.229.23:18:27.69#ibcon#flushed, iclass 5, count 2 2006.229.23:18:27.69#ibcon#about to write, iclass 5, count 2 2006.229.23:18:27.69#ibcon#wrote, iclass 5, count 2 2006.229.23:18:27.69#ibcon#about to read 3, iclass 5, count 2 2006.229.23:18:27.72#ibcon#read 3, iclass 5, count 2 2006.229.23:18:27.72#ibcon#about to read 4, iclass 5, count 2 2006.229.23:18:27.72#ibcon#read 4, iclass 5, count 2 2006.229.23:18:27.72#ibcon#about to read 5, iclass 5, count 2 2006.229.23:18:27.72#ibcon#read 5, iclass 5, count 2 2006.229.23:18:27.72#ibcon#about to read 6, iclass 5, count 2 2006.229.23:18:27.72#ibcon#read 6, iclass 5, count 2 2006.229.23:18:27.72#ibcon#end of sib2, iclass 5, count 2 2006.229.23:18:27.72#ibcon#*after write, iclass 5, count 2 2006.229.23:18:27.72#ibcon#*before return 0, iclass 5, count 2 2006.229.23:18:27.72#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:27.72#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:27.72#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.23:18:27.72#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:27.72#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:27.84#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:27.84#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:27.84#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:18:27.84#ibcon#first serial, iclass 5, count 0 2006.229.23:18:27.84#ibcon#enter sib2, iclass 5, count 0 2006.229.23:18:27.84#ibcon#flushed, iclass 5, count 0 2006.229.23:18:27.84#ibcon#about to write, iclass 5, count 0 2006.229.23:18:27.84#ibcon#wrote, iclass 5, count 0 2006.229.23:18:27.84#ibcon#about to read 3, iclass 5, count 0 2006.229.23:18:27.86#ibcon#read 3, iclass 5, count 0 2006.229.23:18:27.86#ibcon#about to read 4, iclass 5, count 0 2006.229.23:18:27.86#ibcon#read 4, iclass 5, count 0 2006.229.23:18:27.86#ibcon#about to read 5, iclass 5, count 0 2006.229.23:18:27.86#ibcon#read 5, iclass 5, count 0 2006.229.23:18:27.86#ibcon#about to read 6, iclass 5, count 0 2006.229.23:18:27.86#ibcon#read 6, iclass 5, count 0 2006.229.23:18:27.86#ibcon#end of sib2, iclass 5, count 0 2006.229.23:18:27.86#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:18:27.86#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:18:27.86#ibcon#[25=USB\r\n] 2006.229.23:18:27.86#ibcon#*before write, iclass 5, count 0 2006.229.23:18:27.86#ibcon#enter sib2, iclass 5, count 0 2006.229.23:18:27.86#ibcon#flushed, iclass 5, count 0 2006.229.23:18:27.86#ibcon#about to write, iclass 5, count 0 2006.229.23:18:27.86#ibcon#wrote, iclass 5, count 0 2006.229.23:18:27.86#ibcon#about to read 3, iclass 5, count 0 2006.229.23:18:27.89#ibcon#read 3, iclass 5, count 0 2006.229.23:18:27.89#ibcon#about to read 4, iclass 5, count 0 2006.229.23:18:27.89#ibcon#read 4, iclass 5, count 0 2006.229.23:18:27.89#ibcon#about to read 5, iclass 5, count 0 2006.229.23:18:27.89#ibcon#read 5, iclass 5, count 0 2006.229.23:18:27.89#ibcon#about to read 6, iclass 5, count 0 2006.229.23:18:27.89#ibcon#read 6, iclass 5, count 0 2006.229.23:18:27.89#ibcon#end of sib2, iclass 5, count 0 2006.229.23:18:27.89#ibcon#*after write, iclass 5, count 0 2006.229.23:18:27.89#ibcon#*before return 0, iclass 5, count 0 2006.229.23:18:27.89#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:27.89#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:27.89#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:18:27.89#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:18:27.89$vck44/valo=3,564.99 2006.229.23:18:27.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.23:18:27.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.23:18:27.89#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:27.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:27.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:27.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:27.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:18:27.89#ibcon#first serial, iclass 7, count 0 2006.229.23:18:27.89#ibcon#enter sib2, iclass 7, count 0 2006.229.23:18:27.89#ibcon#flushed, iclass 7, count 0 2006.229.23:18:27.89#ibcon#about to write, iclass 7, count 0 2006.229.23:18:27.89#ibcon#wrote, iclass 7, count 0 2006.229.23:18:27.89#ibcon#about to read 3, iclass 7, count 0 2006.229.23:18:27.91#ibcon#read 3, iclass 7, count 0 2006.229.23:18:27.91#ibcon#about to read 4, iclass 7, count 0 2006.229.23:18:27.91#ibcon#read 4, iclass 7, count 0 2006.229.23:18:27.91#ibcon#about to read 5, iclass 7, count 0 2006.229.23:18:27.91#ibcon#read 5, iclass 7, count 0 2006.229.23:18:27.91#ibcon#about to read 6, iclass 7, count 0 2006.229.23:18:27.91#ibcon#read 6, iclass 7, count 0 2006.229.23:18:27.91#ibcon#end of sib2, iclass 7, count 0 2006.229.23:18:27.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:18:27.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:18:27.91#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:18:27.91#ibcon#*before write, iclass 7, count 0 2006.229.23:18:27.91#ibcon#enter sib2, iclass 7, count 0 2006.229.23:18:27.91#ibcon#flushed, iclass 7, count 0 2006.229.23:18:27.91#ibcon#about to write, iclass 7, count 0 2006.229.23:18:27.91#ibcon#wrote, iclass 7, count 0 2006.229.23:18:27.91#ibcon#about to read 3, iclass 7, count 0 2006.229.23:18:27.95#ibcon#read 3, iclass 7, count 0 2006.229.23:18:27.95#ibcon#about to read 4, iclass 7, count 0 2006.229.23:18:27.95#ibcon#read 4, iclass 7, count 0 2006.229.23:18:27.95#ibcon#about to read 5, iclass 7, count 0 2006.229.23:18:27.95#ibcon#read 5, iclass 7, count 0 2006.229.23:18:27.95#ibcon#about to read 6, iclass 7, count 0 2006.229.23:18:27.95#ibcon#read 6, iclass 7, count 0 2006.229.23:18:27.95#ibcon#end of sib2, iclass 7, count 0 2006.229.23:18:27.95#ibcon#*after write, iclass 7, count 0 2006.229.23:18:27.95#ibcon#*before return 0, iclass 7, count 0 2006.229.23:18:27.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:27.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:27.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:18:27.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:18:27.95$vck44/va=3,6 2006.229.23:18:27.95#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.23:18:27.95#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.23:18:27.95#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:27.95#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:28.01#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:28.01#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:28.01#ibcon#enter wrdev, iclass 11, count 2 2006.229.23:18:28.01#ibcon#first serial, iclass 11, count 2 2006.229.23:18:28.01#ibcon#enter sib2, iclass 11, count 2 2006.229.23:18:28.01#ibcon#flushed, iclass 11, count 2 2006.229.23:18:28.01#ibcon#about to write, iclass 11, count 2 2006.229.23:18:28.01#ibcon#wrote, iclass 11, count 2 2006.229.23:18:28.01#ibcon#about to read 3, iclass 11, count 2 2006.229.23:18:28.03#ibcon#read 3, iclass 11, count 2 2006.229.23:18:28.03#ibcon#about to read 4, iclass 11, count 2 2006.229.23:18:28.03#ibcon#read 4, iclass 11, count 2 2006.229.23:18:28.03#ibcon#about to read 5, iclass 11, count 2 2006.229.23:18:28.03#ibcon#read 5, iclass 11, count 2 2006.229.23:18:28.03#ibcon#about to read 6, iclass 11, count 2 2006.229.23:18:28.03#ibcon#read 6, iclass 11, count 2 2006.229.23:18:28.03#ibcon#end of sib2, iclass 11, count 2 2006.229.23:18:28.03#ibcon#*mode == 0, iclass 11, count 2 2006.229.23:18:28.03#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.23:18:28.03#ibcon#[25=AT03-06\r\n] 2006.229.23:18:28.03#ibcon#*before write, iclass 11, count 2 2006.229.23:18:28.03#ibcon#enter sib2, iclass 11, count 2 2006.229.23:18:28.03#ibcon#flushed, iclass 11, count 2 2006.229.23:18:28.03#ibcon#about to write, iclass 11, count 2 2006.229.23:18:28.03#ibcon#wrote, iclass 11, count 2 2006.229.23:18:28.03#ibcon#about to read 3, iclass 11, count 2 2006.229.23:18:28.06#ibcon#read 3, iclass 11, count 2 2006.229.23:18:28.06#ibcon#about to read 4, iclass 11, count 2 2006.229.23:18:28.06#ibcon#read 4, iclass 11, count 2 2006.229.23:18:28.06#ibcon#about to read 5, iclass 11, count 2 2006.229.23:18:28.06#ibcon#read 5, iclass 11, count 2 2006.229.23:18:28.06#ibcon#about to read 6, iclass 11, count 2 2006.229.23:18:28.06#ibcon#read 6, iclass 11, count 2 2006.229.23:18:28.06#ibcon#end of sib2, iclass 11, count 2 2006.229.23:18:28.06#ibcon#*after write, iclass 11, count 2 2006.229.23:18:28.06#ibcon#*before return 0, iclass 11, count 2 2006.229.23:18:28.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:28.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:28.06#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.23:18:28.06#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:28.06#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:28.18#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:28.18#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:28.18#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:18:28.18#ibcon#first serial, iclass 11, count 0 2006.229.23:18:28.18#ibcon#enter sib2, iclass 11, count 0 2006.229.23:18:28.18#ibcon#flushed, iclass 11, count 0 2006.229.23:18:28.18#ibcon#about to write, iclass 11, count 0 2006.229.23:18:28.18#ibcon#wrote, iclass 11, count 0 2006.229.23:18:28.18#ibcon#about to read 3, iclass 11, count 0 2006.229.23:18:28.20#ibcon#read 3, iclass 11, count 0 2006.229.23:18:28.20#ibcon#about to read 4, iclass 11, count 0 2006.229.23:18:28.20#ibcon#read 4, iclass 11, count 0 2006.229.23:18:28.20#ibcon#about to read 5, iclass 11, count 0 2006.229.23:18:28.20#ibcon#read 5, iclass 11, count 0 2006.229.23:18:28.20#ibcon#about to read 6, iclass 11, count 0 2006.229.23:18:28.20#ibcon#read 6, iclass 11, count 0 2006.229.23:18:28.20#ibcon#end of sib2, iclass 11, count 0 2006.229.23:18:28.20#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:18:28.20#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:18:28.20#ibcon#[25=USB\r\n] 2006.229.23:18:28.20#ibcon#*before write, iclass 11, count 0 2006.229.23:18:28.20#ibcon#enter sib2, iclass 11, count 0 2006.229.23:18:28.20#ibcon#flushed, iclass 11, count 0 2006.229.23:18:28.20#ibcon#about to write, iclass 11, count 0 2006.229.23:18:28.20#ibcon#wrote, iclass 11, count 0 2006.229.23:18:28.20#ibcon#about to read 3, iclass 11, count 0 2006.229.23:18:28.23#ibcon#read 3, iclass 11, count 0 2006.229.23:18:28.23#ibcon#about to read 4, iclass 11, count 0 2006.229.23:18:28.23#ibcon#read 4, iclass 11, count 0 2006.229.23:18:28.23#ibcon#about to read 5, iclass 11, count 0 2006.229.23:18:28.23#ibcon#read 5, iclass 11, count 0 2006.229.23:18:28.23#ibcon#about to read 6, iclass 11, count 0 2006.229.23:18:28.23#ibcon#read 6, iclass 11, count 0 2006.229.23:18:28.23#ibcon#end of sib2, iclass 11, count 0 2006.229.23:18:28.23#ibcon#*after write, iclass 11, count 0 2006.229.23:18:28.23#ibcon#*before return 0, iclass 11, count 0 2006.229.23:18:28.23#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:28.23#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:28.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:18:28.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:18:28.23$vck44/valo=4,624.99 2006.229.23:18:28.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.23:18:28.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.23:18:28.23#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:28.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:28.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:28.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:28.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:18:28.23#ibcon#first serial, iclass 13, count 0 2006.229.23:18:28.23#ibcon#enter sib2, iclass 13, count 0 2006.229.23:18:28.23#ibcon#flushed, iclass 13, count 0 2006.229.23:18:28.23#ibcon#about to write, iclass 13, count 0 2006.229.23:18:28.23#ibcon#wrote, iclass 13, count 0 2006.229.23:18:28.23#ibcon#about to read 3, iclass 13, count 0 2006.229.23:18:28.25#ibcon#read 3, iclass 13, count 0 2006.229.23:18:28.25#ibcon#about to read 4, iclass 13, count 0 2006.229.23:18:28.25#ibcon#read 4, iclass 13, count 0 2006.229.23:18:28.25#ibcon#about to read 5, iclass 13, count 0 2006.229.23:18:28.25#ibcon#read 5, iclass 13, count 0 2006.229.23:18:28.25#ibcon#about to read 6, iclass 13, count 0 2006.229.23:18:28.25#ibcon#read 6, iclass 13, count 0 2006.229.23:18:28.25#ibcon#end of sib2, iclass 13, count 0 2006.229.23:18:28.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:18:28.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:18:28.25#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:18:28.25#ibcon#*before write, iclass 13, count 0 2006.229.23:18:28.25#ibcon#enter sib2, iclass 13, count 0 2006.229.23:18:28.25#ibcon#flushed, iclass 13, count 0 2006.229.23:18:28.25#ibcon#about to write, iclass 13, count 0 2006.229.23:18:28.25#ibcon#wrote, iclass 13, count 0 2006.229.23:18:28.25#ibcon#about to read 3, iclass 13, count 0 2006.229.23:18:28.29#ibcon#read 3, iclass 13, count 0 2006.229.23:18:28.29#ibcon#about to read 4, iclass 13, count 0 2006.229.23:18:28.29#ibcon#read 4, iclass 13, count 0 2006.229.23:18:28.29#ibcon#about to read 5, iclass 13, count 0 2006.229.23:18:28.29#ibcon#read 5, iclass 13, count 0 2006.229.23:18:28.29#ibcon#about to read 6, iclass 13, count 0 2006.229.23:18:28.29#ibcon#read 6, iclass 13, count 0 2006.229.23:18:28.29#ibcon#end of sib2, iclass 13, count 0 2006.229.23:18:28.29#ibcon#*after write, iclass 13, count 0 2006.229.23:18:28.29#ibcon#*before return 0, iclass 13, count 0 2006.229.23:18:28.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:28.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:28.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:18:28.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:18:28.29$vck44/va=4,7 2006.229.23:18:28.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.23:18:28.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.23:18:28.29#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:28.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:28.35#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:28.35#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:28.35#ibcon#enter wrdev, iclass 15, count 2 2006.229.23:18:28.35#ibcon#first serial, iclass 15, count 2 2006.229.23:18:28.35#ibcon#enter sib2, iclass 15, count 2 2006.229.23:18:28.35#ibcon#flushed, iclass 15, count 2 2006.229.23:18:28.35#ibcon#about to write, iclass 15, count 2 2006.229.23:18:28.35#ibcon#wrote, iclass 15, count 2 2006.229.23:18:28.35#ibcon#about to read 3, iclass 15, count 2 2006.229.23:18:28.37#ibcon#read 3, iclass 15, count 2 2006.229.23:18:28.37#ibcon#about to read 4, iclass 15, count 2 2006.229.23:18:28.37#ibcon#read 4, iclass 15, count 2 2006.229.23:18:28.37#ibcon#about to read 5, iclass 15, count 2 2006.229.23:18:28.37#ibcon#read 5, iclass 15, count 2 2006.229.23:18:28.37#ibcon#about to read 6, iclass 15, count 2 2006.229.23:18:28.37#ibcon#read 6, iclass 15, count 2 2006.229.23:18:28.37#ibcon#end of sib2, iclass 15, count 2 2006.229.23:18:28.37#ibcon#*mode == 0, iclass 15, count 2 2006.229.23:18:28.37#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.23:18:28.37#ibcon#[25=AT04-07\r\n] 2006.229.23:18:28.37#ibcon#*before write, iclass 15, count 2 2006.229.23:18:28.37#ibcon#enter sib2, iclass 15, count 2 2006.229.23:18:28.37#ibcon#flushed, iclass 15, count 2 2006.229.23:18:28.37#ibcon#about to write, iclass 15, count 2 2006.229.23:18:28.37#ibcon#wrote, iclass 15, count 2 2006.229.23:18:28.37#ibcon#about to read 3, iclass 15, count 2 2006.229.23:18:28.40#ibcon#read 3, iclass 15, count 2 2006.229.23:18:28.40#ibcon#about to read 4, iclass 15, count 2 2006.229.23:18:28.40#ibcon#read 4, iclass 15, count 2 2006.229.23:18:28.40#ibcon#about to read 5, iclass 15, count 2 2006.229.23:18:28.40#ibcon#read 5, iclass 15, count 2 2006.229.23:18:28.40#ibcon#about to read 6, iclass 15, count 2 2006.229.23:18:28.40#ibcon#read 6, iclass 15, count 2 2006.229.23:18:28.40#ibcon#end of sib2, iclass 15, count 2 2006.229.23:18:28.40#ibcon#*after write, iclass 15, count 2 2006.229.23:18:28.40#ibcon#*before return 0, iclass 15, count 2 2006.229.23:18:28.40#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:28.40#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:28.40#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.23:18:28.40#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:28.40#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:28.52#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:28.52#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:28.52#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:18:28.52#ibcon#first serial, iclass 15, count 0 2006.229.23:18:28.52#ibcon#enter sib2, iclass 15, count 0 2006.229.23:18:28.52#ibcon#flushed, iclass 15, count 0 2006.229.23:18:28.52#ibcon#about to write, iclass 15, count 0 2006.229.23:18:28.52#ibcon#wrote, iclass 15, count 0 2006.229.23:18:28.52#ibcon#about to read 3, iclass 15, count 0 2006.229.23:18:28.54#ibcon#read 3, iclass 15, count 0 2006.229.23:18:28.54#ibcon#about to read 4, iclass 15, count 0 2006.229.23:18:28.54#ibcon#read 4, iclass 15, count 0 2006.229.23:18:28.54#ibcon#about to read 5, iclass 15, count 0 2006.229.23:18:28.54#ibcon#read 5, iclass 15, count 0 2006.229.23:18:28.54#ibcon#about to read 6, iclass 15, count 0 2006.229.23:18:28.54#ibcon#read 6, iclass 15, count 0 2006.229.23:18:28.54#ibcon#end of sib2, iclass 15, count 0 2006.229.23:18:28.54#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:18:28.54#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:18:28.54#ibcon#[25=USB\r\n] 2006.229.23:18:28.54#ibcon#*before write, iclass 15, count 0 2006.229.23:18:28.54#ibcon#enter sib2, iclass 15, count 0 2006.229.23:18:28.54#ibcon#flushed, iclass 15, count 0 2006.229.23:18:28.54#ibcon#about to write, iclass 15, count 0 2006.229.23:18:28.54#ibcon#wrote, iclass 15, count 0 2006.229.23:18:28.54#ibcon#about to read 3, iclass 15, count 0 2006.229.23:18:28.57#ibcon#read 3, iclass 15, count 0 2006.229.23:18:28.57#ibcon#about to read 4, iclass 15, count 0 2006.229.23:18:28.57#ibcon#read 4, iclass 15, count 0 2006.229.23:18:28.57#ibcon#about to read 5, iclass 15, count 0 2006.229.23:18:28.57#ibcon#read 5, iclass 15, count 0 2006.229.23:18:28.57#ibcon#about to read 6, iclass 15, count 0 2006.229.23:18:28.57#ibcon#read 6, iclass 15, count 0 2006.229.23:18:28.57#ibcon#end of sib2, iclass 15, count 0 2006.229.23:18:28.57#ibcon#*after write, iclass 15, count 0 2006.229.23:18:28.57#ibcon#*before return 0, iclass 15, count 0 2006.229.23:18:28.57#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:28.57#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:28.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:18:28.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:18:28.57$vck44/valo=5,734.99 2006.229.23:18:28.57#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.23:18:28.57#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.23:18:28.57#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:28.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:28.57#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:28.57#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:28.57#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:18:28.57#ibcon#first serial, iclass 17, count 0 2006.229.23:18:28.57#ibcon#enter sib2, iclass 17, count 0 2006.229.23:18:28.57#ibcon#flushed, iclass 17, count 0 2006.229.23:18:28.57#ibcon#about to write, iclass 17, count 0 2006.229.23:18:28.57#ibcon#wrote, iclass 17, count 0 2006.229.23:18:28.57#ibcon#about to read 3, iclass 17, count 0 2006.229.23:18:28.59#ibcon#read 3, iclass 17, count 0 2006.229.23:18:28.59#ibcon#about to read 4, iclass 17, count 0 2006.229.23:18:28.59#ibcon#read 4, iclass 17, count 0 2006.229.23:18:28.59#ibcon#about to read 5, iclass 17, count 0 2006.229.23:18:28.59#ibcon#read 5, iclass 17, count 0 2006.229.23:18:28.59#ibcon#about to read 6, iclass 17, count 0 2006.229.23:18:28.59#ibcon#read 6, iclass 17, count 0 2006.229.23:18:28.59#ibcon#end of sib2, iclass 17, count 0 2006.229.23:18:28.59#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:18:28.59#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:18:28.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:18:28.59#ibcon#*before write, iclass 17, count 0 2006.229.23:18:28.59#ibcon#enter sib2, iclass 17, count 0 2006.229.23:18:28.59#ibcon#flushed, iclass 17, count 0 2006.229.23:18:28.59#ibcon#about to write, iclass 17, count 0 2006.229.23:18:28.59#ibcon#wrote, iclass 17, count 0 2006.229.23:18:28.59#ibcon#about to read 3, iclass 17, count 0 2006.229.23:18:28.63#ibcon#read 3, iclass 17, count 0 2006.229.23:18:28.63#ibcon#about to read 4, iclass 17, count 0 2006.229.23:18:28.63#ibcon#read 4, iclass 17, count 0 2006.229.23:18:28.63#ibcon#about to read 5, iclass 17, count 0 2006.229.23:18:28.63#ibcon#read 5, iclass 17, count 0 2006.229.23:18:28.63#ibcon#about to read 6, iclass 17, count 0 2006.229.23:18:28.63#ibcon#read 6, iclass 17, count 0 2006.229.23:18:28.63#ibcon#end of sib2, iclass 17, count 0 2006.229.23:18:28.63#ibcon#*after write, iclass 17, count 0 2006.229.23:18:28.63#ibcon#*before return 0, iclass 17, count 0 2006.229.23:18:28.63#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:28.63#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:28.63#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:18:28.63#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:18:28.63$vck44/va=5,4 2006.229.23:18:28.63#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.23:18:28.63#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.23:18:28.63#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:28.63#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:28.69#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:28.69#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:28.69#ibcon#enter wrdev, iclass 19, count 2 2006.229.23:18:28.69#ibcon#first serial, iclass 19, count 2 2006.229.23:18:28.69#ibcon#enter sib2, iclass 19, count 2 2006.229.23:18:28.69#ibcon#flushed, iclass 19, count 2 2006.229.23:18:28.69#ibcon#about to write, iclass 19, count 2 2006.229.23:18:28.69#ibcon#wrote, iclass 19, count 2 2006.229.23:18:28.69#ibcon#about to read 3, iclass 19, count 2 2006.229.23:18:28.71#ibcon#read 3, iclass 19, count 2 2006.229.23:18:28.71#ibcon#about to read 4, iclass 19, count 2 2006.229.23:18:28.71#ibcon#read 4, iclass 19, count 2 2006.229.23:18:28.71#ibcon#about to read 5, iclass 19, count 2 2006.229.23:18:28.71#ibcon#read 5, iclass 19, count 2 2006.229.23:18:28.71#ibcon#about to read 6, iclass 19, count 2 2006.229.23:18:28.71#ibcon#read 6, iclass 19, count 2 2006.229.23:18:28.71#ibcon#end of sib2, iclass 19, count 2 2006.229.23:18:28.71#ibcon#*mode == 0, iclass 19, count 2 2006.229.23:18:28.71#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.23:18:28.71#ibcon#[25=AT05-04\r\n] 2006.229.23:18:28.71#ibcon#*before write, iclass 19, count 2 2006.229.23:18:28.71#ibcon#enter sib2, iclass 19, count 2 2006.229.23:18:28.71#ibcon#flushed, iclass 19, count 2 2006.229.23:18:28.71#ibcon#about to write, iclass 19, count 2 2006.229.23:18:28.71#ibcon#wrote, iclass 19, count 2 2006.229.23:18:28.71#ibcon#about to read 3, iclass 19, count 2 2006.229.23:18:28.74#ibcon#read 3, iclass 19, count 2 2006.229.23:18:28.74#ibcon#about to read 4, iclass 19, count 2 2006.229.23:18:28.74#ibcon#read 4, iclass 19, count 2 2006.229.23:18:28.74#ibcon#about to read 5, iclass 19, count 2 2006.229.23:18:28.74#ibcon#read 5, iclass 19, count 2 2006.229.23:18:28.74#ibcon#about to read 6, iclass 19, count 2 2006.229.23:18:28.74#ibcon#read 6, iclass 19, count 2 2006.229.23:18:28.74#ibcon#end of sib2, iclass 19, count 2 2006.229.23:18:28.74#ibcon#*after write, iclass 19, count 2 2006.229.23:18:28.74#ibcon#*before return 0, iclass 19, count 2 2006.229.23:18:28.74#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:28.74#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:28.74#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.23:18:28.74#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:28.74#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:28.86#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:28.86#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:28.86#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:18:28.86#ibcon#first serial, iclass 19, count 0 2006.229.23:18:28.86#ibcon#enter sib2, iclass 19, count 0 2006.229.23:18:28.86#ibcon#flushed, iclass 19, count 0 2006.229.23:18:28.86#ibcon#about to write, iclass 19, count 0 2006.229.23:18:28.86#ibcon#wrote, iclass 19, count 0 2006.229.23:18:28.86#ibcon#about to read 3, iclass 19, count 0 2006.229.23:18:28.88#ibcon#read 3, iclass 19, count 0 2006.229.23:18:28.88#ibcon#about to read 4, iclass 19, count 0 2006.229.23:18:28.88#ibcon#read 4, iclass 19, count 0 2006.229.23:18:28.88#ibcon#about to read 5, iclass 19, count 0 2006.229.23:18:28.88#ibcon#read 5, iclass 19, count 0 2006.229.23:18:28.88#ibcon#about to read 6, iclass 19, count 0 2006.229.23:18:28.88#ibcon#read 6, iclass 19, count 0 2006.229.23:18:28.88#ibcon#end of sib2, iclass 19, count 0 2006.229.23:18:28.88#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:18:28.88#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:18:28.88#ibcon#[25=USB\r\n] 2006.229.23:18:28.88#ibcon#*before write, iclass 19, count 0 2006.229.23:18:28.88#ibcon#enter sib2, iclass 19, count 0 2006.229.23:18:28.88#ibcon#flushed, iclass 19, count 0 2006.229.23:18:28.88#ibcon#about to write, iclass 19, count 0 2006.229.23:18:28.88#ibcon#wrote, iclass 19, count 0 2006.229.23:18:28.88#ibcon#about to read 3, iclass 19, count 0 2006.229.23:18:28.91#ibcon#read 3, iclass 19, count 0 2006.229.23:18:28.91#ibcon#about to read 4, iclass 19, count 0 2006.229.23:18:28.91#ibcon#read 4, iclass 19, count 0 2006.229.23:18:28.91#ibcon#about to read 5, iclass 19, count 0 2006.229.23:18:28.91#ibcon#read 5, iclass 19, count 0 2006.229.23:18:28.91#ibcon#about to read 6, iclass 19, count 0 2006.229.23:18:28.91#ibcon#read 6, iclass 19, count 0 2006.229.23:18:28.91#ibcon#end of sib2, iclass 19, count 0 2006.229.23:18:28.91#ibcon#*after write, iclass 19, count 0 2006.229.23:18:28.91#ibcon#*before return 0, iclass 19, count 0 2006.229.23:18:28.91#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:28.91#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:28.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:18:28.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:18:28.91$vck44/valo=6,814.99 2006.229.23:18:28.91#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.23:18:28.91#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.23:18:28.91#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:28.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:28.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:28.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:28.91#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:18:28.91#ibcon#first serial, iclass 21, count 0 2006.229.23:18:28.91#ibcon#enter sib2, iclass 21, count 0 2006.229.23:18:28.91#ibcon#flushed, iclass 21, count 0 2006.229.23:18:28.91#ibcon#about to write, iclass 21, count 0 2006.229.23:18:28.91#ibcon#wrote, iclass 21, count 0 2006.229.23:18:28.91#ibcon#about to read 3, iclass 21, count 0 2006.229.23:18:28.93#ibcon#read 3, iclass 21, count 0 2006.229.23:18:28.93#ibcon#about to read 4, iclass 21, count 0 2006.229.23:18:28.93#ibcon#read 4, iclass 21, count 0 2006.229.23:18:28.93#ibcon#about to read 5, iclass 21, count 0 2006.229.23:18:28.93#ibcon#read 5, iclass 21, count 0 2006.229.23:18:28.93#ibcon#about to read 6, iclass 21, count 0 2006.229.23:18:28.93#ibcon#read 6, iclass 21, count 0 2006.229.23:18:28.93#ibcon#end of sib2, iclass 21, count 0 2006.229.23:18:28.93#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:18:28.93#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:18:28.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:18:28.93#ibcon#*before write, iclass 21, count 0 2006.229.23:18:28.93#ibcon#enter sib2, iclass 21, count 0 2006.229.23:18:28.93#ibcon#flushed, iclass 21, count 0 2006.229.23:18:28.93#ibcon#about to write, iclass 21, count 0 2006.229.23:18:28.93#ibcon#wrote, iclass 21, count 0 2006.229.23:18:28.93#ibcon#about to read 3, iclass 21, count 0 2006.229.23:18:28.97#ibcon#read 3, iclass 21, count 0 2006.229.23:18:28.97#ibcon#about to read 4, iclass 21, count 0 2006.229.23:18:28.97#ibcon#read 4, iclass 21, count 0 2006.229.23:18:28.97#ibcon#about to read 5, iclass 21, count 0 2006.229.23:18:28.97#ibcon#read 5, iclass 21, count 0 2006.229.23:18:28.97#ibcon#about to read 6, iclass 21, count 0 2006.229.23:18:28.97#ibcon#read 6, iclass 21, count 0 2006.229.23:18:28.97#ibcon#end of sib2, iclass 21, count 0 2006.229.23:18:28.97#ibcon#*after write, iclass 21, count 0 2006.229.23:18:28.97#ibcon#*before return 0, iclass 21, count 0 2006.229.23:18:28.97#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:28.97#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:28.97#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:18:28.97#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:18:28.97$vck44/va=6,4 2006.229.23:18:28.97#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.23:18:28.97#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.23:18:28.97#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:28.97#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:29.03#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:29.03#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:29.03#ibcon#enter wrdev, iclass 23, count 2 2006.229.23:18:29.03#ibcon#first serial, iclass 23, count 2 2006.229.23:18:29.03#ibcon#enter sib2, iclass 23, count 2 2006.229.23:18:29.03#ibcon#flushed, iclass 23, count 2 2006.229.23:18:29.03#ibcon#about to write, iclass 23, count 2 2006.229.23:18:29.03#ibcon#wrote, iclass 23, count 2 2006.229.23:18:29.03#ibcon#about to read 3, iclass 23, count 2 2006.229.23:18:29.05#ibcon#read 3, iclass 23, count 2 2006.229.23:18:29.05#ibcon#about to read 4, iclass 23, count 2 2006.229.23:18:29.05#ibcon#read 4, iclass 23, count 2 2006.229.23:18:29.05#ibcon#about to read 5, iclass 23, count 2 2006.229.23:18:29.05#ibcon#read 5, iclass 23, count 2 2006.229.23:18:29.05#ibcon#about to read 6, iclass 23, count 2 2006.229.23:18:29.05#ibcon#read 6, iclass 23, count 2 2006.229.23:18:29.05#ibcon#end of sib2, iclass 23, count 2 2006.229.23:18:29.05#ibcon#*mode == 0, iclass 23, count 2 2006.229.23:18:29.05#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.23:18:29.05#ibcon#[25=AT06-04\r\n] 2006.229.23:18:29.05#ibcon#*before write, iclass 23, count 2 2006.229.23:18:29.05#ibcon#enter sib2, iclass 23, count 2 2006.229.23:18:29.05#ibcon#flushed, iclass 23, count 2 2006.229.23:18:29.05#ibcon#about to write, iclass 23, count 2 2006.229.23:18:29.05#ibcon#wrote, iclass 23, count 2 2006.229.23:18:29.05#ibcon#about to read 3, iclass 23, count 2 2006.229.23:18:29.08#ibcon#read 3, iclass 23, count 2 2006.229.23:18:29.08#ibcon#about to read 4, iclass 23, count 2 2006.229.23:18:29.08#ibcon#read 4, iclass 23, count 2 2006.229.23:18:29.08#ibcon#about to read 5, iclass 23, count 2 2006.229.23:18:29.08#ibcon#read 5, iclass 23, count 2 2006.229.23:18:29.08#ibcon#about to read 6, iclass 23, count 2 2006.229.23:18:29.08#ibcon#read 6, iclass 23, count 2 2006.229.23:18:29.08#ibcon#end of sib2, iclass 23, count 2 2006.229.23:18:29.08#ibcon#*after write, iclass 23, count 2 2006.229.23:18:29.08#ibcon#*before return 0, iclass 23, count 2 2006.229.23:18:29.08#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:29.08#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:29.08#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.23:18:29.08#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:29.08#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:29.20#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:29.20#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:29.20#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:18:29.20#ibcon#first serial, iclass 23, count 0 2006.229.23:18:29.20#ibcon#enter sib2, iclass 23, count 0 2006.229.23:18:29.20#ibcon#flushed, iclass 23, count 0 2006.229.23:18:29.20#ibcon#about to write, iclass 23, count 0 2006.229.23:18:29.20#ibcon#wrote, iclass 23, count 0 2006.229.23:18:29.20#ibcon#about to read 3, iclass 23, count 0 2006.229.23:18:29.22#ibcon#read 3, iclass 23, count 0 2006.229.23:18:29.22#ibcon#about to read 4, iclass 23, count 0 2006.229.23:18:29.22#ibcon#read 4, iclass 23, count 0 2006.229.23:18:29.22#ibcon#about to read 5, iclass 23, count 0 2006.229.23:18:29.22#ibcon#read 5, iclass 23, count 0 2006.229.23:18:29.22#ibcon#about to read 6, iclass 23, count 0 2006.229.23:18:29.22#ibcon#read 6, iclass 23, count 0 2006.229.23:18:29.22#ibcon#end of sib2, iclass 23, count 0 2006.229.23:18:29.22#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:18:29.22#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:18:29.22#ibcon#[25=USB\r\n] 2006.229.23:18:29.22#ibcon#*before write, iclass 23, count 0 2006.229.23:18:29.22#ibcon#enter sib2, iclass 23, count 0 2006.229.23:18:29.22#ibcon#flushed, iclass 23, count 0 2006.229.23:18:29.22#ibcon#about to write, iclass 23, count 0 2006.229.23:18:29.22#ibcon#wrote, iclass 23, count 0 2006.229.23:18:29.22#ibcon#about to read 3, iclass 23, count 0 2006.229.23:18:29.25#ibcon#read 3, iclass 23, count 0 2006.229.23:18:29.25#ibcon#about to read 4, iclass 23, count 0 2006.229.23:18:29.25#ibcon#read 4, iclass 23, count 0 2006.229.23:18:29.25#ibcon#about to read 5, iclass 23, count 0 2006.229.23:18:29.25#ibcon#read 5, iclass 23, count 0 2006.229.23:18:29.25#ibcon#about to read 6, iclass 23, count 0 2006.229.23:18:29.25#ibcon#read 6, iclass 23, count 0 2006.229.23:18:29.25#ibcon#end of sib2, iclass 23, count 0 2006.229.23:18:29.25#ibcon#*after write, iclass 23, count 0 2006.229.23:18:29.25#ibcon#*before return 0, iclass 23, count 0 2006.229.23:18:29.25#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:29.25#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:29.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:18:29.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:18:29.25$vck44/valo=7,864.99 2006.229.23:18:29.25#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.23:18:29.25#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.23:18:29.25#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:29.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:29.25#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:29.25#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:29.25#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:18:29.25#ibcon#first serial, iclass 25, count 0 2006.229.23:18:29.25#ibcon#enter sib2, iclass 25, count 0 2006.229.23:18:29.25#ibcon#flushed, iclass 25, count 0 2006.229.23:18:29.25#ibcon#about to write, iclass 25, count 0 2006.229.23:18:29.25#ibcon#wrote, iclass 25, count 0 2006.229.23:18:29.25#ibcon#about to read 3, iclass 25, count 0 2006.229.23:18:29.27#ibcon#read 3, iclass 25, count 0 2006.229.23:18:29.27#ibcon#about to read 4, iclass 25, count 0 2006.229.23:18:29.27#ibcon#read 4, iclass 25, count 0 2006.229.23:18:29.27#ibcon#about to read 5, iclass 25, count 0 2006.229.23:18:29.27#ibcon#read 5, iclass 25, count 0 2006.229.23:18:29.27#ibcon#about to read 6, iclass 25, count 0 2006.229.23:18:29.27#ibcon#read 6, iclass 25, count 0 2006.229.23:18:29.27#ibcon#end of sib2, iclass 25, count 0 2006.229.23:18:29.27#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:18:29.27#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:18:29.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:18:29.27#ibcon#*before write, iclass 25, count 0 2006.229.23:18:29.27#ibcon#enter sib2, iclass 25, count 0 2006.229.23:18:29.27#ibcon#flushed, iclass 25, count 0 2006.229.23:18:29.27#ibcon#about to write, iclass 25, count 0 2006.229.23:18:29.27#ibcon#wrote, iclass 25, count 0 2006.229.23:18:29.27#ibcon#about to read 3, iclass 25, count 0 2006.229.23:18:29.31#ibcon#read 3, iclass 25, count 0 2006.229.23:18:29.31#ibcon#about to read 4, iclass 25, count 0 2006.229.23:18:29.31#ibcon#read 4, iclass 25, count 0 2006.229.23:18:29.31#ibcon#about to read 5, iclass 25, count 0 2006.229.23:18:29.31#ibcon#read 5, iclass 25, count 0 2006.229.23:18:29.31#ibcon#about to read 6, iclass 25, count 0 2006.229.23:18:29.31#ibcon#read 6, iclass 25, count 0 2006.229.23:18:29.31#ibcon#end of sib2, iclass 25, count 0 2006.229.23:18:29.31#ibcon#*after write, iclass 25, count 0 2006.229.23:18:29.31#ibcon#*before return 0, iclass 25, count 0 2006.229.23:18:29.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:29.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:29.31#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:18:29.31#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:18:29.31$vck44/va=7,5 2006.229.23:18:29.31#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.23:18:29.31#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.23:18:29.31#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:29.31#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:29.37#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:29.37#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:29.37#ibcon#enter wrdev, iclass 27, count 2 2006.229.23:18:29.37#ibcon#first serial, iclass 27, count 2 2006.229.23:18:29.37#ibcon#enter sib2, iclass 27, count 2 2006.229.23:18:29.37#ibcon#flushed, iclass 27, count 2 2006.229.23:18:29.37#ibcon#about to write, iclass 27, count 2 2006.229.23:18:29.37#ibcon#wrote, iclass 27, count 2 2006.229.23:18:29.37#ibcon#about to read 3, iclass 27, count 2 2006.229.23:18:29.39#ibcon#read 3, iclass 27, count 2 2006.229.23:18:29.39#ibcon#about to read 4, iclass 27, count 2 2006.229.23:18:29.39#ibcon#read 4, iclass 27, count 2 2006.229.23:18:29.39#ibcon#about to read 5, iclass 27, count 2 2006.229.23:18:29.39#ibcon#read 5, iclass 27, count 2 2006.229.23:18:29.39#ibcon#about to read 6, iclass 27, count 2 2006.229.23:18:29.39#ibcon#read 6, iclass 27, count 2 2006.229.23:18:29.39#ibcon#end of sib2, iclass 27, count 2 2006.229.23:18:29.39#ibcon#*mode == 0, iclass 27, count 2 2006.229.23:18:29.39#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.23:18:29.39#ibcon#[25=AT07-05\r\n] 2006.229.23:18:29.39#ibcon#*before write, iclass 27, count 2 2006.229.23:18:29.39#ibcon#enter sib2, iclass 27, count 2 2006.229.23:18:29.39#ibcon#flushed, iclass 27, count 2 2006.229.23:18:29.39#ibcon#about to write, iclass 27, count 2 2006.229.23:18:29.39#ibcon#wrote, iclass 27, count 2 2006.229.23:18:29.39#ibcon#about to read 3, iclass 27, count 2 2006.229.23:18:29.42#ibcon#read 3, iclass 27, count 2 2006.229.23:18:29.42#ibcon#about to read 4, iclass 27, count 2 2006.229.23:18:29.42#ibcon#read 4, iclass 27, count 2 2006.229.23:18:29.42#ibcon#about to read 5, iclass 27, count 2 2006.229.23:18:29.42#ibcon#read 5, iclass 27, count 2 2006.229.23:18:29.42#ibcon#about to read 6, iclass 27, count 2 2006.229.23:18:29.42#ibcon#read 6, iclass 27, count 2 2006.229.23:18:29.42#ibcon#end of sib2, iclass 27, count 2 2006.229.23:18:29.42#ibcon#*after write, iclass 27, count 2 2006.229.23:18:29.42#ibcon#*before return 0, iclass 27, count 2 2006.229.23:18:29.42#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:29.42#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:29.42#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.23:18:29.42#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:29.42#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:29.54#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:29.54#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:29.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:18:29.54#ibcon#first serial, iclass 27, count 0 2006.229.23:18:29.54#ibcon#enter sib2, iclass 27, count 0 2006.229.23:18:29.54#ibcon#flushed, iclass 27, count 0 2006.229.23:18:29.54#ibcon#about to write, iclass 27, count 0 2006.229.23:18:29.54#ibcon#wrote, iclass 27, count 0 2006.229.23:18:29.54#ibcon#about to read 3, iclass 27, count 0 2006.229.23:18:29.56#ibcon#read 3, iclass 27, count 0 2006.229.23:18:29.56#ibcon#about to read 4, iclass 27, count 0 2006.229.23:18:29.56#ibcon#read 4, iclass 27, count 0 2006.229.23:18:29.56#ibcon#about to read 5, iclass 27, count 0 2006.229.23:18:29.56#ibcon#read 5, iclass 27, count 0 2006.229.23:18:29.56#ibcon#about to read 6, iclass 27, count 0 2006.229.23:18:29.56#ibcon#read 6, iclass 27, count 0 2006.229.23:18:29.56#ibcon#end of sib2, iclass 27, count 0 2006.229.23:18:29.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:18:29.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:18:29.56#ibcon#[25=USB\r\n] 2006.229.23:18:29.56#ibcon#*before write, iclass 27, count 0 2006.229.23:18:29.56#ibcon#enter sib2, iclass 27, count 0 2006.229.23:18:29.56#ibcon#flushed, iclass 27, count 0 2006.229.23:18:29.56#ibcon#about to write, iclass 27, count 0 2006.229.23:18:29.56#ibcon#wrote, iclass 27, count 0 2006.229.23:18:29.56#ibcon#about to read 3, iclass 27, count 0 2006.229.23:18:29.59#ibcon#read 3, iclass 27, count 0 2006.229.23:18:29.59#ibcon#about to read 4, iclass 27, count 0 2006.229.23:18:29.59#ibcon#read 4, iclass 27, count 0 2006.229.23:18:29.59#ibcon#about to read 5, iclass 27, count 0 2006.229.23:18:29.59#ibcon#read 5, iclass 27, count 0 2006.229.23:18:29.59#ibcon#about to read 6, iclass 27, count 0 2006.229.23:18:29.59#ibcon#read 6, iclass 27, count 0 2006.229.23:18:29.59#ibcon#end of sib2, iclass 27, count 0 2006.229.23:18:29.59#ibcon#*after write, iclass 27, count 0 2006.229.23:18:29.59#ibcon#*before return 0, iclass 27, count 0 2006.229.23:18:29.59#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:29.59#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:29.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:18:29.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:18:29.59$vck44/valo=8,884.99 2006.229.23:18:29.59#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.23:18:29.59#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.23:18:29.59#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:29.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:29.59#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:29.59#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:29.59#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:18:29.59#ibcon#first serial, iclass 29, count 0 2006.229.23:18:29.59#ibcon#enter sib2, iclass 29, count 0 2006.229.23:18:29.59#ibcon#flushed, iclass 29, count 0 2006.229.23:18:29.59#ibcon#about to write, iclass 29, count 0 2006.229.23:18:29.59#ibcon#wrote, iclass 29, count 0 2006.229.23:18:29.59#ibcon#about to read 3, iclass 29, count 0 2006.229.23:18:29.61#ibcon#read 3, iclass 29, count 0 2006.229.23:18:29.61#ibcon#about to read 4, iclass 29, count 0 2006.229.23:18:29.61#ibcon#read 4, iclass 29, count 0 2006.229.23:18:29.61#ibcon#about to read 5, iclass 29, count 0 2006.229.23:18:29.61#ibcon#read 5, iclass 29, count 0 2006.229.23:18:29.61#ibcon#about to read 6, iclass 29, count 0 2006.229.23:18:29.61#ibcon#read 6, iclass 29, count 0 2006.229.23:18:29.61#ibcon#end of sib2, iclass 29, count 0 2006.229.23:18:29.61#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:18:29.61#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:18:29.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:18:29.61#ibcon#*before write, iclass 29, count 0 2006.229.23:18:29.61#ibcon#enter sib2, iclass 29, count 0 2006.229.23:18:29.61#ibcon#flushed, iclass 29, count 0 2006.229.23:18:29.61#ibcon#about to write, iclass 29, count 0 2006.229.23:18:29.61#ibcon#wrote, iclass 29, count 0 2006.229.23:18:29.61#ibcon#about to read 3, iclass 29, count 0 2006.229.23:18:29.65#ibcon#read 3, iclass 29, count 0 2006.229.23:18:29.65#ibcon#about to read 4, iclass 29, count 0 2006.229.23:18:29.65#ibcon#read 4, iclass 29, count 0 2006.229.23:18:29.65#ibcon#about to read 5, iclass 29, count 0 2006.229.23:18:29.65#ibcon#read 5, iclass 29, count 0 2006.229.23:18:29.65#ibcon#about to read 6, iclass 29, count 0 2006.229.23:18:29.65#ibcon#read 6, iclass 29, count 0 2006.229.23:18:29.65#ibcon#end of sib2, iclass 29, count 0 2006.229.23:18:29.65#ibcon#*after write, iclass 29, count 0 2006.229.23:18:29.65#ibcon#*before return 0, iclass 29, count 0 2006.229.23:18:29.65#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:29.65#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:29.65#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:18:29.65#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:18:29.65$vck44/va=8,6 2006.229.23:18:29.65#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.23:18:29.65#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.23:18:29.65#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:29.65#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:18:29.71#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:18:29.71#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:18:29.71#ibcon#enter wrdev, iclass 31, count 2 2006.229.23:18:29.71#ibcon#first serial, iclass 31, count 2 2006.229.23:18:29.71#ibcon#enter sib2, iclass 31, count 2 2006.229.23:18:29.71#ibcon#flushed, iclass 31, count 2 2006.229.23:18:29.71#ibcon#about to write, iclass 31, count 2 2006.229.23:18:29.71#ibcon#wrote, iclass 31, count 2 2006.229.23:18:29.71#ibcon#about to read 3, iclass 31, count 2 2006.229.23:18:29.73#ibcon#read 3, iclass 31, count 2 2006.229.23:18:29.73#ibcon#about to read 4, iclass 31, count 2 2006.229.23:18:29.73#ibcon#read 4, iclass 31, count 2 2006.229.23:18:29.73#ibcon#about to read 5, iclass 31, count 2 2006.229.23:18:29.73#ibcon#read 5, iclass 31, count 2 2006.229.23:18:29.73#ibcon#about to read 6, iclass 31, count 2 2006.229.23:18:29.73#ibcon#read 6, iclass 31, count 2 2006.229.23:18:29.73#ibcon#end of sib2, iclass 31, count 2 2006.229.23:18:29.73#ibcon#*mode == 0, iclass 31, count 2 2006.229.23:18:29.73#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.23:18:29.73#ibcon#[25=AT08-06\r\n] 2006.229.23:18:29.73#ibcon#*before write, iclass 31, count 2 2006.229.23:18:29.73#ibcon#enter sib2, iclass 31, count 2 2006.229.23:18:29.73#ibcon#flushed, iclass 31, count 2 2006.229.23:18:29.73#ibcon#about to write, iclass 31, count 2 2006.229.23:18:29.73#ibcon#wrote, iclass 31, count 2 2006.229.23:18:29.73#ibcon#about to read 3, iclass 31, count 2 2006.229.23:18:29.76#ibcon#read 3, iclass 31, count 2 2006.229.23:18:29.76#ibcon#about to read 4, iclass 31, count 2 2006.229.23:18:29.76#ibcon#read 4, iclass 31, count 2 2006.229.23:18:29.76#ibcon#about to read 5, iclass 31, count 2 2006.229.23:18:29.76#ibcon#read 5, iclass 31, count 2 2006.229.23:18:29.76#ibcon#about to read 6, iclass 31, count 2 2006.229.23:18:29.76#ibcon#read 6, iclass 31, count 2 2006.229.23:18:29.76#ibcon#end of sib2, iclass 31, count 2 2006.229.23:18:29.76#ibcon#*after write, iclass 31, count 2 2006.229.23:18:29.76#ibcon#*before return 0, iclass 31, count 2 2006.229.23:18:29.76#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:18:29.76#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:18:29.76#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.23:18:29.76#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:29.76#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:18:29.88#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:18:29.88#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:18:29.88#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:18:29.88#ibcon#first serial, iclass 31, count 0 2006.229.23:18:29.88#ibcon#enter sib2, iclass 31, count 0 2006.229.23:18:29.88#ibcon#flushed, iclass 31, count 0 2006.229.23:18:29.88#ibcon#about to write, iclass 31, count 0 2006.229.23:18:29.88#ibcon#wrote, iclass 31, count 0 2006.229.23:18:29.88#ibcon#about to read 3, iclass 31, count 0 2006.229.23:18:29.90#ibcon#read 3, iclass 31, count 0 2006.229.23:18:29.90#ibcon#about to read 4, iclass 31, count 0 2006.229.23:18:29.90#ibcon#read 4, iclass 31, count 0 2006.229.23:18:29.90#ibcon#about to read 5, iclass 31, count 0 2006.229.23:18:29.90#ibcon#read 5, iclass 31, count 0 2006.229.23:18:29.90#ibcon#about to read 6, iclass 31, count 0 2006.229.23:18:29.90#ibcon#read 6, iclass 31, count 0 2006.229.23:18:29.90#ibcon#end of sib2, iclass 31, count 0 2006.229.23:18:29.90#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:18:29.90#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:18:29.90#ibcon#[25=USB\r\n] 2006.229.23:18:29.90#ibcon#*before write, iclass 31, count 0 2006.229.23:18:29.90#ibcon#enter sib2, iclass 31, count 0 2006.229.23:18:29.90#ibcon#flushed, iclass 31, count 0 2006.229.23:18:29.90#ibcon#about to write, iclass 31, count 0 2006.229.23:18:29.90#ibcon#wrote, iclass 31, count 0 2006.229.23:18:29.90#ibcon#about to read 3, iclass 31, count 0 2006.229.23:18:29.93#ibcon#read 3, iclass 31, count 0 2006.229.23:18:29.93#ibcon#about to read 4, iclass 31, count 0 2006.229.23:18:29.93#ibcon#read 4, iclass 31, count 0 2006.229.23:18:29.93#ibcon#about to read 5, iclass 31, count 0 2006.229.23:18:29.93#ibcon#read 5, iclass 31, count 0 2006.229.23:18:29.93#ibcon#about to read 6, iclass 31, count 0 2006.229.23:18:29.93#ibcon#read 6, iclass 31, count 0 2006.229.23:18:29.93#ibcon#end of sib2, iclass 31, count 0 2006.229.23:18:29.93#ibcon#*after write, iclass 31, count 0 2006.229.23:18:29.93#ibcon#*before return 0, iclass 31, count 0 2006.229.23:18:29.93#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:18:29.93#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:18:29.93#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:18:29.93#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:18:29.93$vck44/vblo=1,629.99 2006.229.23:18:29.93#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.23:18:29.93#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.23:18:29.93#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:29.93#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:18:29.93#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:18:29.93#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:18:29.93#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:18:29.93#ibcon#first serial, iclass 33, count 0 2006.229.23:18:29.93#ibcon#enter sib2, iclass 33, count 0 2006.229.23:18:29.93#ibcon#flushed, iclass 33, count 0 2006.229.23:18:29.93#ibcon#about to write, iclass 33, count 0 2006.229.23:18:29.93#ibcon#wrote, iclass 33, count 0 2006.229.23:18:29.93#ibcon#about to read 3, iclass 33, count 0 2006.229.23:18:29.95#ibcon#read 3, iclass 33, count 0 2006.229.23:18:29.95#ibcon#about to read 4, iclass 33, count 0 2006.229.23:18:29.95#ibcon#read 4, iclass 33, count 0 2006.229.23:18:29.95#ibcon#about to read 5, iclass 33, count 0 2006.229.23:18:29.95#ibcon#read 5, iclass 33, count 0 2006.229.23:18:29.95#ibcon#about to read 6, iclass 33, count 0 2006.229.23:18:29.95#ibcon#read 6, iclass 33, count 0 2006.229.23:18:29.95#ibcon#end of sib2, iclass 33, count 0 2006.229.23:18:29.95#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:18:29.95#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:18:29.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:18:29.95#ibcon#*before write, iclass 33, count 0 2006.229.23:18:29.95#ibcon#enter sib2, iclass 33, count 0 2006.229.23:18:29.95#ibcon#flushed, iclass 33, count 0 2006.229.23:18:29.95#ibcon#about to write, iclass 33, count 0 2006.229.23:18:29.95#ibcon#wrote, iclass 33, count 0 2006.229.23:18:29.95#ibcon#about to read 3, iclass 33, count 0 2006.229.23:18:29.99#ibcon#read 3, iclass 33, count 0 2006.229.23:18:29.99#ibcon#about to read 4, iclass 33, count 0 2006.229.23:18:29.99#ibcon#read 4, iclass 33, count 0 2006.229.23:18:29.99#ibcon#about to read 5, iclass 33, count 0 2006.229.23:18:29.99#ibcon#read 5, iclass 33, count 0 2006.229.23:18:29.99#ibcon#about to read 6, iclass 33, count 0 2006.229.23:18:29.99#ibcon#read 6, iclass 33, count 0 2006.229.23:18:29.99#ibcon#end of sib2, iclass 33, count 0 2006.229.23:18:29.99#ibcon#*after write, iclass 33, count 0 2006.229.23:18:29.99#ibcon#*before return 0, iclass 33, count 0 2006.229.23:18:29.99#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:18:29.99#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:18:29.99#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:18:29.99#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:18:29.99$vck44/vb=1,4 2006.229.23:18:29.99#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.23:18:29.99#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.23:18:29.99#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:29.99#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:18:29.99#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:18:29.99#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:18:29.99#ibcon#enter wrdev, iclass 35, count 2 2006.229.23:18:29.99#ibcon#first serial, iclass 35, count 2 2006.229.23:18:29.99#ibcon#enter sib2, iclass 35, count 2 2006.229.23:18:29.99#ibcon#flushed, iclass 35, count 2 2006.229.23:18:29.99#ibcon#about to write, iclass 35, count 2 2006.229.23:18:29.99#ibcon#wrote, iclass 35, count 2 2006.229.23:18:29.99#ibcon#about to read 3, iclass 35, count 2 2006.229.23:18:30.01#ibcon#read 3, iclass 35, count 2 2006.229.23:18:30.01#ibcon#about to read 4, iclass 35, count 2 2006.229.23:18:30.01#ibcon#read 4, iclass 35, count 2 2006.229.23:18:30.01#ibcon#about to read 5, iclass 35, count 2 2006.229.23:18:30.01#ibcon#read 5, iclass 35, count 2 2006.229.23:18:30.01#ibcon#about to read 6, iclass 35, count 2 2006.229.23:18:30.01#ibcon#read 6, iclass 35, count 2 2006.229.23:18:30.01#ibcon#end of sib2, iclass 35, count 2 2006.229.23:18:30.01#ibcon#*mode == 0, iclass 35, count 2 2006.229.23:18:30.01#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.23:18:30.01#ibcon#[27=AT01-04\r\n] 2006.229.23:18:30.01#ibcon#*before write, iclass 35, count 2 2006.229.23:18:30.01#ibcon#enter sib2, iclass 35, count 2 2006.229.23:18:30.01#ibcon#flushed, iclass 35, count 2 2006.229.23:18:30.01#ibcon#about to write, iclass 35, count 2 2006.229.23:18:30.01#ibcon#wrote, iclass 35, count 2 2006.229.23:18:30.01#ibcon#about to read 3, iclass 35, count 2 2006.229.23:18:30.04#ibcon#read 3, iclass 35, count 2 2006.229.23:18:30.04#ibcon#about to read 4, iclass 35, count 2 2006.229.23:18:30.04#ibcon#read 4, iclass 35, count 2 2006.229.23:18:30.04#ibcon#about to read 5, iclass 35, count 2 2006.229.23:18:30.04#ibcon#read 5, iclass 35, count 2 2006.229.23:18:30.04#ibcon#about to read 6, iclass 35, count 2 2006.229.23:18:30.04#ibcon#read 6, iclass 35, count 2 2006.229.23:18:30.04#ibcon#end of sib2, iclass 35, count 2 2006.229.23:18:30.04#ibcon#*after write, iclass 35, count 2 2006.229.23:18:30.04#ibcon#*before return 0, iclass 35, count 2 2006.229.23:18:30.04#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:18:30.04#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:18:30.04#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.23:18:30.04#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:30.04#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:18:30.16#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:18:30.16#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:18:30.16#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:18:30.16#ibcon#first serial, iclass 35, count 0 2006.229.23:18:30.16#ibcon#enter sib2, iclass 35, count 0 2006.229.23:18:30.16#ibcon#flushed, iclass 35, count 0 2006.229.23:18:30.16#ibcon#about to write, iclass 35, count 0 2006.229.23:18:30.16#ibcon#wrote, iclass 35, count 0 2006.229.23:18:30.16#ibcon#about to read 3, iclass 35, count 0 2006.229.23:18:30.18#ibcon#read 3, iclass 35, count 0 2006.229.23:18:30.18#ibcon#about to read 4, iclass 35, count 0 2006.229.23:18:30.18#ibcon#read 4, iclass 35, count 0 2006.229.23:18:30.18#ibcon#about to read 5, iclass 35, count 0 2006.229.23:18:30.18#ibcon#read 5, iclass 35, count 0 2006.229.23:18:30.18#ibcon#about to read 6, iclass 35, count 0 2006.229.23:18:30.18#ibcon#read 6, iclass 35, count 0 2006.229.23:18:30.18#ibcon#end of sib2, iclass 35, count 0 2006.229.23:18:30.18#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:18:30.18#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:18:30.18#ibcon#[27=USB\r\n] 2006.229.23:18:30.18#ibcon#*before write, iclass 35, count 0 2006.229.23:18:30.18#ibcon#enter sib2, iclass 35, count 0 2006.229.23:18:30.18#ibcon#flushed, iclass 35, count 0 2006.229.23:18:30.18#ibcon#about to write, iclass 35, count 0 2006.229.23:18:30.18#ibcon#wrote, iclass 35, count 0 2006.229.23:18:30.18#ibcon#about to read 3, iclass 35, count 0 2006.229.23:18:30.21#ibcon#read 3, iclass 35, count 0 2006.229.23:18:30.21#ibcon#about to read 4, iclass 35, count 0 2006.229.23:18:30.21#ibcon#read 4, iclass 35, count 0 2006.229.23:18:30.21#ibcon#about to read 5, iclass 35, count 0 2006.229.23:18:30.21#ibcon#read 5, iclass 35, count 0 2006.229.23:18:30.21#ibcon#about to read 6, iclass 35, count 0 2006.229.23:18:30.21#ibcon#read 6, iclass 35, count 0 2006.229.23:18:30.21#ibcon#end of sib2, iclass 35, count 0 2006.229.23:18:30.21#ibcon#*after write, iclass 35, count 0 2006.229.23:18:30.21#ibcon#*before return 0, iclass 35, count 0 2006.229.23:18:30.21#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:18:30.21#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:18:30.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:18:30.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:18:30.21$vck44/vblo=2,634.99 2006.229.23:18:30.21#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.23:18:30.21#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.23:18:30.21#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:30.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:30.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:30.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:30.21#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:18:30.21#ibcon#first serial, iclass 37, count 0 2006.229.23:18:30.21#ibcon#enter sib2, iclass 37, count 0 2006.229.23:18:30.21#ibcon#flushed, iclass 37, count 0 2006.229.23:18:30.21#ibcon#about to write, iclass 37, count 0 2006.229.23:18:30.21#ibcon#wrote, iclass 37, count 0 2006.229.23:18:30.21#ibcon#about to read 3, iclass 37, count 0 2006.229.23:18:30.23#ibcon#read 3, iclass 37, count 0 2006.229.23:18:30.23#ibcon#about to read 4, iclass 37, count 0 2006.229.23:18:30.23#ibcon#read 4, iclass 37, count 0 2006.229.23:18:30.23#ibcon#about to read 5, iclass 37, count 0 2006.229.23:18:30.23#ibcon#read 5, iclass 37, count 0 2006.229.23:18:30.23#ibcon#about to read 6, iclass 37, count 0 2006.229.23:18:30.23#ibcon#read 6, iclass 37, count 0 2006.229.23:18:30.23#ibcon#end of sib2, iclass 37, count 0 2006.229.23:18:30.23#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:18:30.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:18:30.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:18:30.23#ibcon#*before write, iclass 37, count 0 2006.229.23:18:30.23#ibcon#enter sib2, iclass 37, count 0 2006.229.23:18:30.23#ibcon#flushed, iclass 37, count 0 2006.229.23:18:30.23#ibcon#about to write, iclass 37, count 0 2006.229.23:18:30.23#ibcon#wrote, iclass 37, count 0 2006.229.23:18:30.23#ibcon#about to read 3, iclass 37, count 0 2006.229.23:18:30.27#ibcon#read 3, iclass 37, count 0 2006.229.23:18:30.27#ibcon#about to read 4, iclass 37, count 0 2006.229.23:18:30.27#ibcon#read 4, iclass 37, count 0 2006.229.23:18:30.27#ibcon#about to read 5, iclass 37, count 0 2006.229.23:18:30.27#ibcon#read 5, iclass 37, count 0 2006.229.23:18:30.27#ibcon#about to read 6, iclass 37, count 0 2006.229.23:18:30.27#ibcon#read 6, iclass 37, count 0 2006.229.23:18:30.27#ibcon#end of sib2, iclass 37, count 0 2006.229.23:18:30.27#ibcon#*after write, iclass 37, count 0 2006.229.23:18:30.27#ibcon#*before return 0, iclass 37, count 0 2006.229.23:18:30.27#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:30.27#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:18:30.27#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:18:30.27#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:18:30.27$vck44/vb=2,4 2006.229.23:18:30.27#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.23:18:30.27#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.23:18:30.27#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:30.27#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:30.33#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:30.33#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:30.33#ibcon#enter wrdev, iclass 39, count 2 2006.229.23:18:30.33#ibcon#first serial, iclass 39, count 2 2006.229.23:18:30.33#ibcon#enter sib2, iclass 39, count 2 2006.229.23:18:30.33#ibcon#flushed, iclass 39, count 2 2006.229.23:18:30.33#ibcon#about to write, iclass 39, count 2 2006.229.23:18:30.33#ibcon#wrote, iclass 39, count 2 2006.229.23:18:30.33#ibcon#about to read 3, iclass 39, count 2 2006.229.23:18:30.35#ibcon#read 3, iclass 39, count 2 2006.229.23:18:30.35#ibcon#about to read 4, iclass 39, count 2 2006.229.23:18:30.35#ibcon#read 4, iclass 39, count 2 2006.229.23:18:30.35#ibcon#about to read 5, iclass 39, count 2 2006.229.23:18:30.35#ibcon#read 5, iclass 39, count 2 2006.229.23:18:30.35#ibcon#about to read 6, iclass 39, count 2 2006.229.23:18:30.35#ibcon#read 6, iclass 39, count 2 2006.229.23:18:30.35#ibcon#end of sib2, iclass 39, count 2 2006.229.23:18:30.35#ibcon#*mode == 0, iclass 39, count 2 2006.229.23:18:30.35#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.23:18:30.35#ibcon#[27=AT02-04\r\n] 2006.229.23:18:30.35#ibcon#*before write, iclass 39, count 2 2006.229.23:18:30.35#ibcon#enter sib2, iclass 39, count 2 2006.229.23:18:30.35#ibcon#flushed, iclass 39, count 2 2006.229.23:18:30.35#ibcon#about to write, iclass 39, count 2 2006.229.23:18:30.35#ibcon#wrote, iclass 39, count 2 2006.229.23:18:30.35#ibcon#about to read 3, iclass 39, count 2 2006.229.23:18:30.38#ibcon#read 3, iclass 39, count 2 2006.229.23:18:30.38#ibcon#about to read 4, iclass 39, count 2 2006.229.23:18:30.38#ibcon#read 4, iclass 39, count 2 2006.229.23:18:30.38#ibcon#about to read 5, iclass 39, count 2 2006.229.23:18:30.38#ibcon#read 5, iclass 39, count 2 2006.229.23:18:30.38#ibcon#about to read 6, iclass 39, count 2 2006.229.23:18:30.38#ibcon#read 6, iclass 39, count 2 2006.229.23:18:30.38#ibcon#end of sib2, iclass 39, count 2 2006.229.23:18:30.38#ibcon#*after write, iclass 39, count 2 2006.229.23:18:30.38#ibcon#*before return 0, iclass 39, count 2 2006.229.23:18:30.38#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:30.38#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:18:30.38#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.23:18:30.38#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:30.38#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:30.50#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:30.50#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:30.50#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:18:30.50#ibcon#first serial, iclass 39, count 0 2006.229.23:18:30.50#ibcon#enter sib2, iclass 39, count 0 2006.229.23:18:30.50#ibcon#flushed, iclass 39, count 0 2006.229.23:18:30.50#ibcon#about to write, iclass 39, count 0 2006.229.23:18:30.50#ibcon#wrote, iclass 39, count 0 2006.229.23:18:30.50#ibcon#about to read 3, iclass 39, count 0 2006.229.23:18:30.52#ibcon#read 3, iclass 39, count 0 2006.229.23:18:30.52#ibcon#about to read 4, iclass 39, count 0 2006.229.23:18:30.52#ibcon#read 4, iclass 39, count 0 2006.229.23:18:30.52#ibcon#about to read 5, iclass 39, count 0 2006.229.23:18:30.52#ibcon#read 5, iclass 39, count 0 2006.229.23:18:30.52#ibcon#about to read 6, iclass 39, count 0 2006.229.23:18:30.52#ibcon#read 6, iclass 39, count 0 2006.229.23:18:30.52#ibcon#end of sib2, iclass 39, count 0 2006.229.23:18:30.52#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:18:30.52#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:18:30.52#ibcon#[27=USB\r\n] 2006.229.23:18:30.52#ibcon#*before write, iclass 39, count 0 2006.229.23:18:30.52#ibcon#enter sib2, iclass 39, count 0 2006.229.23:18:30.52#ibcon#flushed, iclass 39, count 0 2006.229.23:18:30.52#ibcon#about to write, iclass 39, count 0 2006.229.23:18:30.52#ibcon#wrote, iclass 39, count 0 2006.229.23:18:30.52#ibcon#about to read 3, iclass 39, count 0 2006.229.23:18:30.55#ibcon#read 3, iclass 39, count 0 2006.229.23:18:30.55#ibcon#about to read 4, iclass 39, count 0 2006.229.23:18:30.55#ibcon#read 4, iclass 39, count 0 2006.229.23:18:30.55#ibcon#about to read 5, iclass 39, count 0 2006.229.23:18:30.55#ibcon#read 5, iclass 39, count 0 2006.229.23:18:30.55#ibcon#about to read 6, iclass 39, count 0 2006.229.23:18:30.55#ibcon#read 6, iclass 39, count 0 2006.229.23:18:30.55#ibcon#end of sib2, iclass 39, count 0 2006.229.23:18:30.55#ibcon#*after write, iclass 39, count 0 2006.229.23:18:30.55#ibcon#*before return 0, iclass 39, count 0 2006.229.23:18:30.55#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:30.55#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:18:30.55#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:18:30.55#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:18:30.55$vck44/vblo=3,649.99 2006.229.23:18:30.55#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.23:18:30.55#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.23:18:30.55#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:30.55#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:30.55#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:30.55#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:30.55#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:18:30.55#ibcon#first serial, iclass 3, count 0 2006.229.23:18:30.55#ibcon#enter sib2, iclass 3, count 0 2006.229.23:18:30.55#ibcon#flushed, iclass 3, count 0 2006.229.23:18:30.55#ibcon#about to write, iclass 3, count 0 2006.229.23:18:30.55#ibcon#wrote, iclass 3, count 0 2006.229.23:18:30.55#ibcon#about to read 3, iclass 3, count 0 2006.229.23:18:30.57#ibcon#read 3, iclass 3, count 0 2006.229.23:18:30.57#ibcon#about to read 4, iclass 3, count 0 2006.229.23:18:30.57#ibcon#read 4, iclass 3, count 0 2006.229.23:18:30.57#ibcon#about to read 5, iclass 3, count 0 2006.229.23:18:30.57#ibcon#read 5, iclass 3, count 0 2006.229.23:18:30.57#ibcon#about to read 6, iclass 3, count 0 2006.229.23:18:30.57#ibcon#read 6, iclass 3, count 0 2006.229.23:18:30.57#ibcon#end of sib2, iclass 3, count 0 2006.229.23:18:30.57#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:18:30.57#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:18:30.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:18:30.57#ibcon#*before write, iclass 3, count 0 2006.229.23:18:30.57#ibcon#enter sib2, iclass 3, count 0 2006.229.23:18:30.57#ibcon#flushed, iclass 3, count 0 2006.229.23:18:30.57#ibcon#about to write, iclass 3, count 0 2006.229.23:18:30.57#ibcon#wrote, iclass 3, count 0 2006.229.23:18:30.57#ibcon#about to read 3, iclass 3, count 0 2006.229.23:18:30.61#ibcon#read 3, iclass 3, count 0 2006.229.23:18:30.61#ibcon#about to read 4, iclass 3, count 0 2006.229.23:18:30.61#ibcon#read 4, iclass 3, count 0 2006.229.23:18:30.61#ibcon#about to read 5, iclass 3, count 0 2006.229.23:18:30.61#ibcon#read 5, iclass 3, count 0 2006.229.23:18:30.61#ibcon#about to read 6, iclass 3, count 0 2006.229.23:18:30.61#ibcon#read 6, iclass 3, count 0 2006.229.23:18:30.61#ibcon#end of sib2, iclass 3, count 0 2006.229.23:18:30.61#ibcon#*after write, iclass 3, count 0 2006.229.23:18:30.61#ibcon#*before return 0, iclass 3, count 0 2006.229.23:18:30.61#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:30.61#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:18:30.61#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:18:30.61#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:18:30.61$vck44/vb=3,4 2006.229.23:18:30.61#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.23:18:30.61#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.23:18:30.61#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:30.61#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:30.67#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:30.67#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:30.67#ibcon#enter wrdev, iclass 5, count 2 2006.229.23:18:30.67#ibcon#first serial, iclass 5, count 2 2006.229.23:18:30.67#ibcon#enter sib2, iclass 5, count 2 2006.229.23:18:30.67#ibcon#flushed, iclass 5, count 2 2006.229.23:18:30.67#ibcon#about to write, iclass 5, count 2 2006.229.23:18:30.67#ibcon#wrote, iclass 5, count 2 2006.229.23:18:30.67#ibcon#about to read 3, iclass 5, count 2 2006.229.23:18:30.69#ibcon#read 3, iclass 5, count 2 2006.229.23:18:30.69#ibcon#about to read 4, iclass 5, count 2 2006.229.23:18:30.69#ibcon#read 4, iclass 5, count 2 2006.229.23:18:30.69#ibcon#about to read 5, iclass 5, count 2 2006.229.23:18:30.69#ibcon#read 5, iclass 5, count 2 2006.229.23:18:30.69#ibcon#about to read 6, iclass 5, count 2 2006.229.23:18:30.69#ibcon#read 6, iclass 5, count 2 2006.229.23:18:30.69#ibcon#end of sib2, iclass 5, count 2 2006.229.23:18:30.69#ibcon#*mode == 0, iclass 5, count 2 2006.229.23:18:30.69#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.23:18:30.69#ibcon#[27=AT03-04\r\n] 2006.229.23:18:30.69#ibcon#*before write, iclass 5, count 2 2006.229.23:18:30.69#ibcon#enter sib2, iclass 5, count 2 2006.229.23:18:30.69#ibcon#flushed, iclass 5, count 2 2006.229.23:18:30.69#ibcon#about to write, iclass 5, count 2 2006.229.23:18:30.69#ibcon#wrote, iclass 5, count 2 2006.229.23:18:30.69#ibcon#about to read 3, iclass 5, count 2 2006.229.23:18:30.72#ibcon#read 3, iclass 5, count 2 2006.229.23:18:30.72#ibcon#about to read 4, iclass 5, count 2 2006.229.23:18:30.72#ibcon#read 4, iclass 5, count 2 2006.229.23:18:30.72#ibcon#about to read 5, iclass 5, count 2 2006.229.23:18:30.72#ibcon#read 5, iclass 5, count 2 2006.229.23:18:30.72#ibcon#about to read 6, iclass 5, count 2 2006.229.23:18:30.72#ibcon#read 6, iclass 5, count 2 2006.229.23:18:30.72#ibcon#end of sib2, iclass 5, count 2 2006.229.23:18:30.72#ibcon#*after write, iclass 5, count 2 2006.229.23:18:30.72#ibcon#*before return 0, iclass 5, count 2 2006.229.23:18:30.72#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:30.72#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:18:30.72#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.23:18:30.72#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:30.72#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:30.84#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:30.84#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:30.84#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:18:30.84#ibcon#first serial, iclass 5, count 0 2006.229.23:18:30.84#ibcon#enter sib2, iclass 5, count 0 2006.229.23:18:30.84#ibcon#flushed, iclass 5, count 0 2006.229.23:18:30.84#ibcon#about to write, iclass 5, count 0 2006.229.23:18:30.84#ibcon#wrote, iclass 5, count 0 2006.229.23:18:30.84#ibcon#about to read 3, iclass 5, count 0 2006.229.23:18:30.86#ibcon#read 3, iclass 5, count 0 2006.229.23:18:30.86#ibcon#about to read 4, iclass 5, count 0 2006.229.23:18:30.86#ibcon#read 4, iclass 5, count 0 2006.229.23:18:30.86#ibcon#about to read 5, iclass 5, count 0 2006.229.23:18:30.86#ibcon#read 5, iclass 5, count 0 2006.229.23:18:30.86#ibcon#about to read 6, iclass 5, count 0 2006.229.23:18:30.86#ibcon#read 6, iclass 5, count 0 2006.229.23:18:30.86#ibcon#end of sib2, iclass 5, count 0 2006.229.23:18:30.86#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:18:30.86#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:18:30.86#ibcon#[27=USB\r\n] 2006.229.23:18:30.86#ibcon#*before write, iclass 5, count 0 2006.229.23:18:30.86#ibcon#enter sib2, iclass 5, count 0 2006.229.23:18:30.86#ibcon#flushed, iclass 5, count 0 2006.229.23:18:30.86#ibcon#about to write, iclass 5, count 0 2006.229.23:18:30.86#ibcon#wrote, iclass 5, count 0 2006.229.23:18:30.86#ibcon#about to read 3, iclass 5, count 0 2006.229.23:18:30.89#ibcon#read 3, iclass 5, count 0 2006.229.23:18:30.89#ibcon#about to read 4, iclass 5, count 0 2006.229.23:18:30.89#ibcon#read 4, iclass 5, count 0 2006.229.23:18:30.89#ibcon#about to read 5, iclass 5, count 0 2006.229.23:18:30.89#ibcon#read 5, iclass 5, count 0 2006.229.23:18:30.89#ibcon#about to read 6, iclass 5, count 0 2006.229.23:18:30.89#ibcon#read 6, iclass 5, count 0 2006.229.23:18:30.89#ibcon#end of sib2, iclass 5, count 0 2006.229.23:18:30.89#ibcon#*after write, iclass 5, count 0 2006.229.23:18:30.89#ibcon#*before return 0, iclass 5, count 0 2006.229.23:18:30.89#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:30.89#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:18:30.89#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:18:30.89#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:18:30.89$vck44/vblo=4,679.99 2006.229.23:18:30.89#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.23:18:30.89#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.23:18:30.89#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:30.89#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:30.89#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:30.89#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:30.89#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:18:30.89#ibcon#first serial, iclass 7, count 0 2006.229.23:18:30.89#ibcon#enter sib2, iclass 7, count 0 2006.229.23:18:30.89#ibcon#flushed, iclass 7, count 0 2006.229.23:18:30.89#ibcon#about to write, iclass 7, count 0 2006.229.23:18:30.89#ibcon#wrote, iclass 7, count 0 2006.229.23:18:30.89#ibcon#about to read 3, iclass 7, count 0 2006.229.23:18:30.91#ibcon#read 3, iclass 7, count 0 2006.229.23:18:30.91#ibcon#about to read 4, iclass 7, count 0 2006.229.23:18:30.91#ibcon#read 4, iclass 7, count 0 2006.229.23:18:30.91#ibcon#about to read 5, iclass 7, count 0 2006.229.23:18:30.91#ibcon#read 5, iclass 7, count 0 2006.229.23:18:30.91#ibcon#about to read 6, iclass 7, count 0 2006.229.23:18:30.91#ibcon#read 6, iclass 7, count 0 2006.229.23:18:30.91#ibcon#end of sib2, iclass 7, count 0 2006.229.23:18:30.91#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:18:30.91#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:18:30.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:18:30.91#ibcon#*before write, iclass 7, count 0 2006.229.23:18:30.91#ibcon#enter sib2, iclass 7, count 0 2006.229.23:18:30.91#ibcon#flushed, iclass 7, count 0 2006.229.23:18:30.91#ibcon#about to write, iclass 7, count 0 2006.229.23:18:30.91#ibcon#wrote, iclass 7, count 0 2006.229.23:18:30.91#ibcon#about to read 3, iclass 7, count 0 2006.229.23:18:30.95#ibcon#read 3, iclass 7, count 0 2006.229.23:18:30.95#ibcon#about to read 4, iclass 7, count 0 2006.229.23:18:30.95#ibcon#read 4, iclass 7, count 0 2006.229.23:18:30.95#ibcon#about to read 5, iclass 7, count 0 2006.229.23:18:30.95#ibcon#read 5, iclass 7, count 0 2006.229.23:18:30.95#ibcon#about to read 6, iclass 7, count 0 2006.229.23:18:30.95#ibcon#read 6, iclass 7, count 0 2006.229.23:18:30.95#ibcon#end of sib2, iclass 7, count 0 2006.229.23:18:30.95#ibcon#*after write, iclass 7, count 0 2006.229.23:18:30.95#ibcon#*before return 0, iclass 7, count 0 2006.229.23:18:30.95#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:30.95#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:18:30.95#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:18:30.95#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:18:30.95$vck44/vb=4,4 2006.229.23:18:30.95#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.23:18:30.95#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.23:18:30.95#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:30.95#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:31.01#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:31.01#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:31.01#ibcon#enter wrdev, iclass 11, count 2 2006.229.23:18:31.01#ibcon#first serial, iclass 11, count 2 2006.229.23:18:31.01#ibcon#enter sib2, iclass 11, count 2 2006.229.23:18:31.01#ibcon#flushed, iclass 11, count 2 2006.229.23:18:31.01#ibcon#about to write, iclass 11, count 2 2006.229.23:18:31.01#ibcon#wrote, iclass 11, count 2 2006.229.23:18:31.01#ibcon#about to read 3, iclass 11, count 2 2006.229.23:18:31.03#ibcon#read 3, iclass 11, count 2 2006.229.23:18:31.03#ibcon#about to read 4, iclass 11, count 2 2006.229.23:18:31.03#ibcon#read 4, iclass 11, count 2 2006.229.23:18:31.03#ibcon#about to read 5, iclass 11, count 2 2006.229.23:18:31.03#ibcon#read 5, iclass 11, count 2 2006.229.23:18:31.03#ibcon#about to read 6, iclass 11, count 2 2006.229.23:18:31.03#ibcon#read 6, iclass 11, count 2 2006.229.23:18:31.03#ibcon#end of sib2, iclass 11, count 2 2006.229.23:18:31.03#ibcon#*mode == 0, iclass 11, count 2 2006.229.23:18:31.03#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.23:18:31.03#ibcon#[27=AT04-04\r\n] 2006.229.23:18:31.03#ibcon#*before write, iclass 11, count 2 2006.229.23:18:31.03#ibcon#enter sib2, iclass 11, count 2 2006.229.23:18:31.03#ibcon#flushed, iclass 11, count 2 2006.229.23:18:31.03#ibcon#about to write, iclass 11, count 2 2006.229.23:18:31.03#ibcon#wrote, iclass 11, count 2 2006.229.23:18:31.03#ibcon#about to read 3, iclass 11, count 2 2006.229.23:18:31.06#ibcon#read 3, iclass 11, count 2 2006.229.23:18:31.06#ibcon#about to read 4, iclass 11, count 2 2006.229.23:18:31.06#ibcon#read 4, iclass 11, count 2 2006.229.23:18:31.06#ibcon#about to read 5, iclass 11, count 2 2006.229.23:18:31.06#ibcon#read 5, iclass 11, count 2 2006.229.23:18:31.06#ibcon#about to read 6, iclass 11, count 2 2006.229.23:18:31.06#ibcon#read 6, iclass 11, count 2 2006.229.23:18:31.06#ibcon#end of sib2, iclass 11, count 2 2006.229.23:18:31.06#ibcon#*after write, iclass 11, count 2 2006.229.23:18:31.06#ibcon#*before return 0, iclass 11, count 2 2006.229.23:18:31.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:31.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:18:31.06#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.23:18:31.06#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:31.06#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:31.18#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:31.18#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:31.18#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:18:31.18#ibcon#first serial, iclass 11, count 0 2006.229.23:18:31.18#ibcon#enter sib2, iclass 11, count 0 2006.229.23:18:31.18#ibcon#flushed, iclass 11, count 0 2006.229.23:18:31.18#ibcon#about to write, iclass 11, count 0 2006.229.23:18:31.18#ibcon#wrote, iclass 11, count 0 2006.229.23:18:31.18#ibcon#about to read 3, iclass 11, count 0 2006.229.23:18:31.20#ibcon#read 3, iclass 11, count 0 2006.229.23:18:31.20#ibcon#about to read 4, iclass 11, count 0 2006.229.23:18:31.20#ibcon#read 4, iclass 11, count 0 2006.229.23:18:31.20#ibcon#about to read 5, iclass 11, count 0 2006.229.23:18:31.20#ibcon#read 5, iclass 11, count 0 2006.229.23:18:31.20#ibcon#about to read 6, iclass 11, count 0 2006.229.23:18:31.20#ibcon#read 6, iclass 11, count 0 2006.229.23:18:31.20#ibcon#end of sib2, iclass 11, count 0 2006.229.23:18:31.20#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:18:31.20#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:18:31.20#ibcon#[27=USB\r\n] 2006.229.23:18:31.20#ibcon#*before write, iclass 11, count 0 2006.229.23:18:31.20#ibcon#enter sib2, iclass 11, count 0 2006.229.23:18:31.20#ibcon#flushed, iclass 11, count 0 2006.229.23:18:31.20#ibcon#about to write, iclass 11, count 0 2006.229.23:18:31.20#ibcon#wrote, iclass 11, count 0 2006.229.23:18:31.20#ibcon#about to read 3, iclass 11, count 0 2006.229.23:18:31.23#ibcon#read 3, iclass 11, count 0 2006.229.23:18:31.23#ibcon#about to read 4, iclass 11, count 0 2006.229.23:18:31.23#ibcon#read 4, iclass 11, count 0 2006.229.23:18:31.23#ibcon#about to read 5, iclass 11, count 0 2006.229.23:18:31.23#ibcon#read 5, iclass 11, count 0 2006.229.23:18:31.23#ibcon#about to read 6, iclass 11, count 0 2006.229.23:18:31.23#ibcon#read 6, iclass 11, count 0 2006.229.23:18:31.23#ibcon#end of sib2, iclass 11, count 0 2006.229.23:18:31.23#ibcon#*after write, iclass 11, count 0 2006.229.23:18:31.23#ibcon#*before return 0, iclass 11, count 0 2006.229.23:18:31.23#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:31.23#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:18:31.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:18:31.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:18:31.23$vck44/vblo=5,709.99 2006.229.23:18:31.23#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.23:18:31.23#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.23:18:31.23#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:31.23#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:31.23#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:31.23#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:31.23#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:18:31.23#ibcon#first serial, iclass 13, count 0 2006.229.23:18:31.23#ibcon#enter sib2, iclass 13, count 0 2006.229.23:18:31.23#ibcon#flushed, iclass 13, count 0 2006.229.23:18:31.23#ibcon#about to write, iclass 13, count 0 2006.229.23:18:31.23#ibcon#wrote, iclass 13, count 0 2006.229.23:18:31.23#ibcon#about to read 3, iclass 13, count 0 2006.229.23:18:31.25#ibcon#read 3, iclass 13, count 0 2006.229.23:18:31.25#ibcon#about to read 4, iclass 13, count 0 2006.229.23:18:31.25#ibcon#read 4, iclass 13, count 0 2006.229.23:18:31.25#ibcon#about to read 5, iclass 13, count 0 2006.229.23:18:31.25#ibcon#read 5, iclass 13, count 0 2006.229.23:18:31.25#ibcon#about to read 6, iclass 13, count 0 2006.229.23:18:31.25#ibcon#read 6, iclass 13, count 0 2006.229.23:18:31.25#ibcon#end of sib2, iclass 13, count 0 2006.229.23:18:31.25#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:18:31.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:18:31.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:18:31.25#ibcon#*before write, iclass 13, count 0 2006.229.23:18:31.25#ibcon#enter sib2, iclass 13, count 0 2006.229.23:18:31.25#ibcon#flushed, iclass 13, count 0 2006.229.23:18:31.25#ibcon#about to write, iclass 13, count 0 2006.229.23:18:31.25#ibcon#wrote, iclass 13, count 0 2006.229.23:18:31.25#ibcon#about to read 3, iclass 13, count 0 2006.229.23:18:31.29#ibcon#read 3, iclass 13, count 0 2006.229.23:18:31.29#ibcon#about to read 4, iclass 13, count 0 2006.229.23:18:31.29#ibcon#read 4, iclass 13, count 0 2006.229.23:18:31.29#ibcon#about to read 5, iclass 13, count 0 2006.229.23:18:31.29#ibcon#read 5, iclass 13, count 0 2006.229.23:18:31.29#ibcon#about to read 6, iclass 13, count 0 2006.229.23:18:31.29#ibcon#read 6, iclass 13, count 0 2006.229.23:18:31.29#ibcon#end of sib2, iclass 13, count 0 2006.229.23:18:31.29#ibcon#*after write, iclass 13, count 0 2006.229.23:18:31.29#ibcon#*before return 0, iclass 13, count 0 2006.229.23:18:31.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:31.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:18:31.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:18:31.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:18:31.29$vck44/vb=5,4 2006.229.23:18:31.29#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.23:18:31.29#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.23:18:31.29#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:31.29#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:31.35#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:31.35#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:31.35#ibcon#enter wrdev, iclass 15, count 2 2006.229.23:18:31.35#ibcon#first serial, iclass 15, count 2 2006.229.23:18:31.35#ibcon#enter sib2, iclass 15, count 2 2006.229.23:18:31.35#ibcon#flushed, iclass 15, count 2 2006.229.23:18:31.35#ibcon#about to write, iclass 15, count 2 2006.229.23:18:31.35#ibcon#wrote, iclass 15, count 2 2006.229.23:18:31.35#ibcon#about to read 3, iclass 15, count 2 2006.229.23:18:31.37#ibcon#read 3, iclass 15, count 2 2006.229.23:18:31.37#ibcon#about to read 4, iclass 15, count 2 2006.229.23:18:31.37#ibcon#read 4, iclass 15, count 2 2006.229.23:18:31.37#ibcon#about to read 5, iclass 15, count 2 2006.229.23:18:31.37#ibcon#read 5, iclass 15, count 2 2006.229.23:18:31.37#ibcon#about to read 6, iclass 15, count 2 2006.229.23:18:31.37#ibcon#read 6, iclass 15, count 2 2006.229.23:18:31.37#ibcon#end of sib2, iclass 15, count 2 2006.229.23:18:31.37#ibcon#*mode == 0, iclass 15, count 2 2006.229.23:18:31.37#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.23:18:31.37#ibcon#[27=AT05-04\r\n] 2006.229.23:18:31.37#ibcon#*before write, iclass 15, count 2 2006.229.23:18:31.37#ibcon#enter sib2, iclass 15, count 2 2006.229.23:18:31.37#ibcon#flushed, iclass 15, count 2 2006.229.23:18:31.37#ibcon#about to write, iclass 15, count 2 2006.229.23:18:31.37#ibcon#wrote, iclass 15, count 2 2006.229.23:18:31.37#ibcon#about to read 3, iclass 15, count 2 2006.229.23:18:31.40#ibcon#read 3, iclass 15, count 2 2006.229.23:18:31.40#ibcon#about to read 4, iclass 15, count 2 2006.229.23:18:31.40#ibcon#read 4, iclass 15, count 2 2006.229.23:18:31.40#ibcon#about to read 5, iclass 15, count 2 2006.229.23:18:31.40#ibcon#read 5, iclass 15, count 2 2006.229.23:18:31.40#ibcon#about to read 6, iclass 15, count 2 2006.229.23:18:31.40#ibcon#read 6, iclass 15, count 2 2006.229.23:18:31.40#ibcon#end of sib2, iclass 15, count 2 2006.229.23:18:31.40#ibcon#*after write, iclass 15, count 2 2006.229.23:18:31.40#ibcon#*before return 0, iclass 15, count 2 2006.229.23:18:31.40#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:31.40#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:18:31.40#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.23:18:31.40#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:31.40#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:31.52#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:31.52#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:31.52#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:18:31.52#ibcon#first serial, iclass 15, count 0 2006.229.23:18:31.52#ibcon#enter sib2, iclass 15, count 0 2006.229.23:18:31.52#ibcon#flushed, iclass 15, count 0 2006.229.23:18:31.52#ibcon#about to write, iclass 15, count 0 2006.229.23:18:31.52#ibcon#wrote, iclass 15, count 0 2006.229.23:18:31.52#ibcon#about to read 3, iclass 15, count 0 2006.229.23:18:31.54#ibcon#read 3, iclass 15, count 0 2006.229.23:18:31.54#ibcon#about to read 4, iclass 15, count 0 2006.229.23:18:31.54#ibcon#read 4, iclass 15, count 0 2006.229.23:18:31.54#ibcon#about to read 5, iclass 15, count 0 2006.229.23:18:31.54#ibcon#read 5, iclass 15, count 0 2006.229.23:18:31.54#ibcon#about to read 6, iclass 15, count 0 2006.229.23:18:31.54#ibcon#read 6, iclass 15, count 0 2006.229.23:18:31.54#ibcon#end of sib2, iclass 15, count 0 2006.229.23:18:31.54#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:18:31.54#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:18:31.54#ibcon#[27=USB\r\n] 2006.229.23:18:31.54#ibcon#*before write, iclass 15, count 0 2006.229.23:18:31.54#ibcon#enter sib2, iclass 15, count 0 2006.229.23:18:31.54#ibcon#flushed, iclass 15, count 0 2006.229.23:18:31.54#ibcon#about to write, iclass 15, count 0 2006.229.23:18:31.54#ibcon#wrote, iclass 15, count 0 2006.229.23:18:31.54#ibcon#about to read 3, iclass 15, count 0 2006.229.23:18:31.57#ibcon#read 3, iclass 15, count 0 2006.229.23:18:31.57#ibcon#about to read 4, iclass 15, count 0 2006.229.23:18:31.57#ibcon#read 4, iclass 15, count 0 2006.229.23:18:31.57#ibcon#about to read 5, iclass 15, count 0 2006.229.23:18:31.57#ibcon#read 5, iclass 15, count 0 2006.229.23:18:31.57#ibcon#about to read 6, iclass 15, count 0 2006.229.23:18:31.57#ibcon#read 6, iclass 15, count 0 2006.229.23:18:31.57#ibcon#end of sib2, iclass 15, count 0 2006.229.23:18:31.57#ibcon#*after write, iclass 15, count 0 2006.229.23:18:31.57#ibcon#*before return 0, iclass 15, count 0 2006.229.23:18:31.57#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:31.57#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:18:31.57#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:18:31.57#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:18:31.57$vck44/vblo=6,719.99 2006.229.23:18:31.57#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.23:18:31.57#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.23:18:31.57#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:31.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:31.57#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:31.57#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:31.57#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:18:31.57#ibcon#first serial, iclass 17, count 0 2006.229.23:18:31.57#ibcon#enter sib2, iclass 17, count 0 2006.229.23:18:31.57#ibcon#flushed, iclass 17, count 0 2006.229.23:18:31.57#ibcon#about to write, iclass 17, count 0 2006.229.23:18:31.57#ibcon#wrote, iclass 17, count 0 2006.229.23:18:31.57#ibcon#about to read 3, iclass 17, count 0 2006.229.23:18:31.59#ibcon#read 3, iclass 17, count 0 2006.229.23:18:31.59#ibcon#about to read 4, iclass 17, count 0 2006.229.23:18:31.59#ibcon#read 4, iclass 17, count 0 2006.229.23:18:31.59#ibcon#about to read 5, iclass 17, count 0 2006.229.23:18:31.59#ibcon#read 5, iclass 17, count 0 2006.229.23:18:31.59#ibcon#about to read 6, iclass 17, count 0 2006.229.23:18:31.59#ibcon#read 6, iclass 17, count 0 2006.229.23:18:31.59#ibcon#end of sib2, iclass 17, count 0 2006.229.23:18:31.59#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:18:31.59#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:18:31.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:18:31.59#ibcon#*before write, iclass 17, count 0 2006.229.23:18:31.59#ibcon#enter sib2, iclass 17, count 0 2006.229.23:18:31.59#ibcon#flushed, iclass 17, count 0 2006.229.23:18:31.59#ibcon#about to write, iclass 17, count 0 2006.229.23:18:31.59#ibcon#wrote, iclass 17, count 0 2006.229.23:18:31.59#ibcon#about to read 3, iclass 17, count 0 2006.229.23:18:31.63#ibcon#read 3, iclass 17, count 0 2006.229.23:18:31.63#ibcon#about to read 4, iclass 17, count 0 2006.229.23:18:31.63#ibcon#read 4, iclass 17, count 0 2006.229.23:18:31.63#ibcon#about to read 5, iclass 17, count 0 2006.229.23:18:31.63#ibcon#read 5, iclass 17, count 0 2006.229.23:18:31.63#ibcon#about to read 6, iclass 17, count 0 2006.229.23:18:31.63#ibcon#read 6, iclass 17, count 0 2006.229.23:18:31.63#ibcon#end of sib2, iclass 17, count 0 2006.229.23:18:31.63#ibcon#*after write, iclass 17, count 0 2006.229.23:18:31.63#ibcon#*before return 0, iclass 17, count 0 2006.229.23:18:31.63#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:31.63#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:18:31.63#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:18:31.63#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:18:31.63$vck44/vb=6,4 2006.229.23:18:31.63#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.23:18:31.63#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.23:18:31.63#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:31.63#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:31.69#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:31.69#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:31.69#ibcon#enter wrdev, iclass 19, count 2 2006.229.23:18:31.69#ibcon#first serial, iclass 19, count 2 2006.229.23:18:31.69#ibcon#enter sib2, iclass 19, count 2 2006.229.23:18:31.69#ibcon#flushed, iclass 19, count 2 2006.229.23:18:31.69#ibcon#about to write, iclass 19, count 2 2006.229.23:18:31.69#ibcon#wrote, iclass 19, count 2 2006.229.23:18:31.69#ibcon#about to read 3, iclass 19, count 2 2006.229.23:18:31.71#ibcon#read 3, iclass 19, count 2 2006.229.23:18:31.71#ibcon#about to read 4, iclass 19, count 2 2006.229.23:18:31.71#ibcon#read 4, iclass 19, count 2 2006.229.23:18:31.71#ibcon#about to read 5, iclass 19, count 2 2006.229.23:18:31.71#ibcon#read 5, iclass 19, count 2 2006.229.23:18:31.71#ibcon#about to read 6, iclass 19, count 2 2006.229.23:18:31.71#ibcon#read 6, iclass 19, count 2 2006.229.23:18:31.71#ibcon#end of sib2, iclass 19, count 2 2006.229.23:18:31.71#ibcon#*mode == 0, iclass 19, count 2 2006.229.23:18:31.71#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.23:18:31.71#ibcon#[27=AT06-04\r\n] 2006.229.23:18:31.71#ibcon#*before write, iclass 19, count 2 2006.229.23:18:31.71#ibcon#enter sib2, iclass 19, count 2 2006.229.23:18:31.71#ibcon#flushed, iclass 19, count 2 2006.229.23:18:31.71#ibcon#about to write, iclass 19, count 2 2006.229.23:18:31.71#ibcon#wrote, iclass 19, count 2 2006.229.23:18:31.71#ibcon#about to read 3, iclass 19, count 2 2006.229.23:18:31.74#ibcon#read 3, iclass 19, count 2 2006.229.23:18:31.74#ibcon#about to read 4, iclass 19, count 2 2006.229.23:18:31.74#ibcon#read 4, iclass 19, count 2 2006.229.23:18:31.74#ibcon#about to read 5, iclass 19, count 2 2006.229.23:18:31.74#ibcon#read 5, iclass 19, count 2 2006.229.23:18:31.74#ibcon#about to read 6, iclass 19, count 2 2006.229.23:18:31.74#ibcon#read 6, iclass 19, count 2 2006.229.23:18:31.74#ibcon#end of sib2, iclass 19, count 2 2006.229.23:18:31.74#ibcon#*after write, iclass 19, count 2 2006.229.23:18:31.74#ibcon#*before return 0, iclass 19, count 2 2006.229.23:18:31.74#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:31.74#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:18:31.74#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.23:18:31.74#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:31.74#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:31.86#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:31.86#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:31.86#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:18:31.86#ibcon#first serial, iclass 19, count 0 2006.229.23:18:31.86#ibcon#enter sib2, iclass 19, count 0 2006.229.23:18:31.86#ibcon#flushed, iclass 19, count 0 2006.229.23:18:31.86#ibcon#about to write, iclass 19, count 0 2006.229.23:18:31.86#ibcon#wrote, iclass 19, count 0 2006.229.23:18:31.86#ibcon#about to read 3, iclass 19, count 0 2006.229.23:18:31.88#ibcon#read 3, iclass 19, count 0 2006.229.23:18:31.88#ibcon#about to read 4, iclass 19, count 0 2006.229.23:18:31.88#ibcon#read 4, iclass 19, count 0 2006.229.23:18:31.88#ibcon#about to read 5, iclass 19, count 0 2006.229.23:18:31.88#ibcon#read 5, iclass 19, count 0 2006.229.23:18:31.88#ibcon#about to read 6, iclass 19, count 0 2006.229.23:18:31.88#ibcon#read 6, iclass 19, count 0 2006.229.23:18:31.88#ibcon#end of sib2, iclass 19, count 0 2006.229.23:18:31.88#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:18:31.88#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:18:31.88#ibcon#[27=USB\r\n] 2006.229.23:18:31.88#ibcon#*before write, iclass 19, count 0 2006.229.23:18:31.88#ibcon#enter sib2, iclass 19, count 0 2006.229.23:18:31.88#ibcon#flushed, iclass 19, count 0 2006.229.23:18:31.88#ibcon#about to write, iclass 19, count 0 2006.229.23:18:31.88#ibcon#wrote, iclass 19, count 0 2006.229.23:18:31.88#ibcon#about to read 3, iclass 19, count 0 2006.229.23:18:31.91#ibcon#read 3, iclass 19, count 0 2006.229.23:18:31.91#ibcon#about to read 4, iclass 19, count 0 2006.229.23:18:31.91#ibcon#read 4, iclass 19, count 0 2006.229.23:18:31.91#ibcon#about to read 5, iclass 19, count 0 2006.229.23:18:31.91#ibcon#read 5, iclass 19, count 0 2006.229.23:18:31.91#ibcon#about to read 6, iclass 19, count 0 2006.229.23:18:31.91#ibcon#read 6, iclass 19, count 0 2006.229.23:18:31.91#ibcon#end of sib2, iclass 19, count 0 2006.229.23:18:31.91#ibcon#*after write, iclass 19, count 0 2006.229.23:18:31.91#ibcon#*before return 0, iclass 19, count 0 2006.229.23:18:31.91#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:31.91#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:18:31.91#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:18:31.91#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:18:31.91$vck44/vblo=7,734.99 2006.229.23:18:31.91#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.23:18:31.91#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.23:18:31.91#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:31.91#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:31.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:31.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:31.91#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:18:31.91#ibcon#first serial, iclass 21, count 0 2006.229.23:18:31.91#ibcon#enter sib2, iclass 21, count 0 2006.229.23:18:31.91#ibcon#flushed, iclass 21, count 0 2006.229.23:18:31.91#ibcon#about to write, iclass 21, count 0 2006.229.23:18:31.91#ibcon#wrote, iclass 21, count 0 2006.229.23:18:31.91#ibcon#about to read 3, iclass 21, count 0 2006.229.23:18:31.93#ibcon#read 3, iclass 21, count 0 2006.229.23:18:31.93#ibcon#about to read 4, iclass 21, count 0 2006.229.23:18:31.93#ibcon#read 4, iclass 21, count 0 2006.229.23:18:31.93#ibcon#about to read 5, iclass 21, count 0 2006.229.23:18:31.93#ibcon#read 5, iclass 21, count 0 2006.229.23:18:31.93#ibcon#about to read 6, iclass 21, count 0 2006.229.23:18:31.93#ibcon#read 6, iclass 21, count 0 2006.229.23:18:31.93#ibcon#end of sib2, iclass 21, count 0 2006.229.23:18:31.93#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:18:31.93#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:18:31.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:18:31.93#ibcon#*before write, iclass 21, count 0 2006.229.23:18:31.93#ibcon#enter sib2, iclass 21, count 0 2006.229.23:18:31.93#ibcon#flushed, iclass 21, count 0 2006.229.23:18:31.93#ibcon#about to write, iclass 21, count 0 2006.229.23:18:31.93#ibcon#wrote, iclass 21, count 0 2006.229.23:18:31.93#ibcon#about to read 3, iclass 21, count 0 2006.229.23:18:31.97#ibcon#read 3, iclass 21, count 0 2006.229.23:18:31.97#ibcon#about to read 4, iclass 21, count 0 2006.229.23:18:31.97#ibcon#read 4, iclass 21, count 0 2006.229.23:18:31.97#ibcon#about to read 5, iclass 21, count 0 2006.229.23:18:31.97#ibcon#read 5, iclass 21, count 0 2006.229.23:18:31.97#ibcon#about to read 6, iclass 21, count 0 2006.229.23:18:31.97#ibcon#read 6, iclass 21, count 0 2006.229.23:18:31.97#ibcon#end of sib2, iclass 21, count 0 2006.229.23:18:31.97#ibcon#*after write, iclass 21, count 0 2006.229.23:18:31.97#ibcon#*before return 0, iclass 21, count 0 2006.229.23:18:31.97#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:31.97#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:18:31.97#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:18:31.97#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:18:31.97$vck44/vb=7,4 2006.229.23:18:31.97#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.23:18:31.97#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.23:18:31.97#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:31.97#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:32.03#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:32.03#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:32.03#ibcon#enter wrdev, iclass 23, count 2 2006.229.23:18:32.03#ibcon#first serial, iclass 23, count 2 2006.229.23:18:32.03#ibcon#enter sib2, iclass 23, count 2 2006.229.23:18:32.03#ibcon#flushed, iclass 23, count 2 2006.229.23:18:32.03#ibcon#about to write, iclass 23, count 2 2006.229.23:18:32.03#ibcon#wrote, iclass 23, count 2 2006.229.23:18:32.03#ibcon#about to read 3, iclass 23, count 2 2006.229.23:18:32.05#ibcon#read 3, iclass 23, count 2 2006.229.23:18:32.05#ibcon#about to read 4, iclass 23, count 2 2006.229.23:18:32.05#ibcon#read 4, iclass 23, count 2 2006.229.23:18:32.05#ibcon#about to read 5, iclass 23, count 2 2006.229.23:18:32.05#ibcon#read 5, iclass 23, count 2 2006.229.23:18:32.05#ibcon#about to read 6, iclass 23, count 2 2006.229.23:18:32.05#ibcon#read 6, iclass 23, count 2 2006.229.23:18:32.05#ibcon#end of sib2, iclass 23, count 2 2006.229.23:18:32.05#ibcon#*mode == 0, iclass 23, count 2 2006.229.23:18:32.05#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.23:18:32.05#ibcon#[27=AT07-04\r\n] 2006.229.23:18:32.05#ibcon#*before write, iclass 23, count 2 2006.229.23:18:32.05#ibcon#enter sib2, iclass 23, count 2 2006.229.23:18:32.05#ibcon#flushed, iclass 23, count 2 2006.229.23:18:32.05#ibcon#about to write, iclass 23, count 2 2006.229.23:18:32.05#ibcon#wrote, iclass 23, count 2 2006.229.23:18:32.05#ibcon#about to read 3, iclass 23, count 2 2006.229.23:18:32.08#ibcon#read 3, iclass 23, count 2 2006.229.23:18:32.08#ibcon#about to read 4, iclass 23, count 2 2006.229.23:18:32.08#ibcon#read 4, iclass 23, count 2 2006.229.23:18:32.08#ibcon#about to read 5, iclass 23, count 2 2006.229.23:18:32.08#ibcon#read 5, iclass 23, count 2 2006.229.23:18:32.08#ibcon#about to read 6, iclass 23, count 2 2006.229.23:18:32.08#ibcon#read 6, iclass 23, count 2 2006.229.23:18:32.08#ibcon#end of sib2, iclass 23, count 2 2006.229.23:18:32.08#ibcon#*after write, iclass 23, count 2 2006.229.23:18:32.08#ibcon#*before return 0, iclass 23, count 2 2006.229.23:18:32.08#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:32.08#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:18:32.08#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.23:18:32.08#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:32.08#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:32.20#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:32.20#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:32.20#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:18:32.20#ibcon#first serial, iclass 23, count 0 2006.229.23:18:32.20#ibcon#enter sib2, iclass 23, count 0 2006.229.23:18:32.20#ibcon#flushed, iclass 23, count 0 2006.229.23:18:32.20#ibcon#about to write, iclass 23, count 0 2006.229.23:18:32.20#ibcon#wrote, iclass 23, count 0 2006.229.23:18:32.20#ibcon#about to read 3, iclass 23, count 0 2006.229.23:18:32.22#ibcon#read 3, iclass 23, count 0 2006.229.23:18:32.22#ibcon#about to read 4, iclass 23, count 0 2006.229.23:18:32.22#ibcon#read 4, iclass 23, count 0 2006.229.23:18:32.22#ibcon#about to read 5, iclass 23, count 0 2006.229.23:18:32.22#ibcon#read 5, iclass 23, count 0 2006.229.23:18:32.22#ibcon#about to read 6, iclass 23, count 0 2006.229.23:18:32.22#ibcon#read 6, iclass 23, count 0 2006.229.23:18:32.22#ibcon#end of sib2, iclass 23, count 0 2006.229.23:18:32.22#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:18:32.22#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:18:32.22#ibcon#[27=USB\r\n] 2006.229.23:18:32.22#ibcon#*before write, iclass 23, count 0 2006.229.23:18:32.22#ibcon#enter sib2, iclass 23, count 0 2006.229.23:18:32.22#ibcon#flushed, iclass 23, count 0 2006.229.23:18:32.22#ibcon#about to write, iclass 23, count 0 2006.229.23:18:32.22#ibcon#wrote, iclass 23, count 0 2006.229.23:18:32.22#ibcon#about to read 3, iclass 23, count 0 2006.229.23:18:32.25#ibcon#read 3, iclass 23, count 0 2006.229.23:18:32.25#ibcon#about to read 4, iclass 23, count 0 2006.229.23:18:32.25#ibcon#read 4, iclass 23, count 0 2006.229.23:18:32.25#ibcon#about to read 5, iclass 23, count 0 2006.229.23:18:32.25#ibcon#read 5, iclass 23, count 0 2006.229.23:18:32.25#ibcon#about to read 6, iclass 23, count 0 2006.229.23:18:32.25#ibcon#read 6, iclass 23, count 0 2006.229.23:18:32.25#ibcon#end of sib2, iclass 23, count 0 2006.229.23:18:32.25#ibcon#*after write, iclass 23, count 0 2006.229.23:18:32.25#ibcon#*before return 0, iclass 23, count 0 2006.229.23:18:32.25#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:32.25#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:18:32.25#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:18:32.25#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:18:32.25$vck44/vblo=8,744.99 2006.229.23:18:32.25#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.23:18:32.25#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.23:18:32.25#ibcon#ireg 17 cls_cnt 0 2006.229.23:18:32.25#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:32.25#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:32.25#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:32.25#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:18:32.25#ibcon#first serial, iclass 25, count 0 2006.229.23:18:32.25#ibcon#enter sib2, iclass 25, count 0 2006.229.23:18:32.25#ibcon#flushed, iclass 25, count 0 2006.229.23:18:32.25#ibcon#about to write, iclass 25, count 0 2006.229.23:18:32.25#ibcon#wrote, iclass 25, count 0 2006.229.23:18:32.25#ibcon#about to read 3, iclass 25, count 0 2006.229.23:18:32.27#ibcon#read 3, iclass 25, count 0 2006.229.23:18:32.27#ibcon#about to read 4, iclass 25, count 0 2006.229.23:18:32.27#ibcon#read 4, iclass 25, count 0 2006.229.23:18:32.27#ibcon#about to read 5, iclass 25, count 0 2006.229.23:18:32.27#ibcon#read 5, iclass 25, count 0 2006.229.23:18:32.27#ibcon#about to read 6, iclass 25, count 0 2006.229.23:18:32.27#ibcon#read 6, iclass 25, count 0 2006.229.23:18:32.27#ibcon#end of sib2, iclass 25, count 0 2006.229.23:18:32.27#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:18:32.27#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:18:32.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:18:32.27#ibcon#*before write, iclass 25, count 0 2006.229.23:18:32.27#ibcon#enter sib2, iclass 25, count 0 2006.229.23:18:32.27#ibcon#flushed, iclass 25, count 0 2006.229.23:18:32.27#ibcon#about to write, iclass 25, count 0 2006.229.23:18:32.27#ibcon#wrote, iclass 25, count 0 2006.229.23:18:32.27#ibcon#about to read 3, iclass 25, count 0 2006.229.23:18:32.31#ibcon#read 3, iclass 25, count 0 2006.229.23:18:32.31#ibcon#about to read 4, iclass 25, count 0 2006.229.23:18:32.31#ibcon#read 4, iclass 25, count 0 2006.229.23:18:32.31#ibcon#about to read 5, iclass 25, count 0 2006.229.23:18:32.31#ibcon#read 5, iclass 25, count 0 2006.229.23:18:32.31#ibcon#about to read 6, iclass 25, count 0 2006.229.23:18:32.31#ibcon#read 6, iclass 25, count 0 2006.229.23:18:32.31#ibcon#end of sib2, iclass 25, count 0 2006.229.23:18:32.31#ibcon#*after write, iclass 25, count 0 2006.229.23:18:32.31#ibcon#*before return 0, iclass 25, count 0 2006.229.23:18:32.31#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:32.31#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:18:32.31#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:18:32.31#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:18:32.31$vck44/vb=8,4 2006.229.23:18:32.31#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.23:18:32.31#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.23:18:32.31#ibcon#ireg 11 cls_cnt 2 2006.229.23:18:32.31#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:32.37#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:32.37#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:32.37#ibcon#enter wrdev, iclass 27, count 2 2006.229.23:18:32.37#ibcon#first serial, iclass 27, count 2 2006.229.23:18:32.37#ibcon#enter sib2, iclass 27, count 2 2006.229.23:18:32.37#ibcon#flushed, iclass 27, count 2 2006.229.23:18:32.37#ibcon#about to write, iclass 27, count 2 2006.229.23:18:32.37#ibcon#wrote, iclass 27, count 2 2006.229.23:18:32.37#ibcon#about to read 3, iclass 27, count 2 2006.229.23:18:32.39#ibcon#read 3, iclass 27, count 2 2006.229.23:18:32.39#ibcon#about to read 4, iclass 27, count 2 2006.229.23:18:32.39#ibcon#read 4, iclass 27, count 2 2006.229.23:18:32.39#ibcon#about to read 5, iclass 27, count 2 2006.229.23:18:32.39#ibcon#read 5, iclass 27, count 2 2006.229.23:18:32.39#ibcon#about to read 6, iclass 27, count 2 2006.229.23:18:32.39#ibcon#read 6, iclass 27, count 2 2006.229.23:18:32.39#ibcon#end of sib2, iclass 27, count 2 2006.229.23:18:32.39#ibcon#*mode == 0, iclass 27, count 2 2006.229.23:18:32.39#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.23:18:32.39#ibcon#[27=AT08-04\r\n] 2006.229.23:18:32.39#ibcon#*before write, iclass 27, count 2 2006.229.23:18:32.39#ibcon#enter sib2, iclass 27, count 2 2006.229.23:18:32.39#ibcon#flushed, iclass 27, count 2 2006.229.23:18:32.39#ibcon#about to write, iclass 27, count 2 2006.229.23:18:32.39#ibcon#wrote, iclass 27, count 2 2006.229.23:18:32.39#ibcon#about to read 3, iclass 27, count 2 2006.229.23:18:32.42#ibcon#read 3, iclass 27, count 2 2006.229.23:18:32.42#ibcon#about to read 4, iclass 27, count 2 2006.229.23:18:32.42#ibcon#read 4, iclass 27, count 2 2006.229.23:18:32.42#ibcon#about to read 5, iclass 27, count 2 2006.229.23:18:32.42#ibcon#read 5, iclass 27, count 2 2006.229.23:18:32.42#ibcon#about to read 6, iclass 27, count 2 2006.229.23:18:32.42#ibcon#read 6, iclass 27, count 2 2006.229.23:18:32.42#ibcon#end of sib2, iclass 27, count 2 2006.229.23:18:32.42#ibcon#*after write, iclass 27, count 2 2006.229.23:18:32.42#ibcon#*before return 0, iclass 27, count 2 2006.229.23:18:32.42#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:32.42#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:18:32.42#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.23:18:32.42#ibcon#ireg 7 cls_cnt 0 2006.229.23:18:32.42#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:32.54#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:32.54#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:32.54#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:18:32.54#ibcon#first serial, iclass 27, count 0 2006.229.23:18:32.54#ibcon#enter sib2, iclass 27, count 0 2006.229.23:18:32.54#ibcon#flushed, iclass 27, count 0 2006.229.23:18:32.54#ibcon#about to write, iclass 27, count 0 2006.229.23:18:32.54#ibcon#wrote, iclass 27, count 0 2006.229.23:18:32.54#ibcon#about to read 3, iclass 27, count 0 2006.229.23:18:32.56#ibcon#read 3, iclass 27, count 0 2006.229.23:18:32.56#ibcon#about to read 4, iclass 27, count 0 2006.229.23:18:32.56#ibcon#read 4, iclass 27, count 0 2006.229.23:18:32.56#ibcon#about to read 5, iclass 27, count 0 2006.229.23:18:32.56#ibcon#read 5, iclass 27, count 0 2006.229.23:18:32.56#ibcon#about to read 6, iclass 27, count 0 2006.229.23:18:32.56#ibcon#read 6, iclass 27, count 0 2006.229.23:18:32.56#ibcon#end of sib2, iclass 27, count 0 2006.229.23:18:32.56#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:18:32.56#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:18:32.56#ibcon#[27=USB\r\n] 2006.229.23:18:32.56#ibcon#*before write, iclass 27, count 0 2006.229.23:18:32.56#ibcon#enter sib2, iclass 27, count 0 2006.229.23:18:32.56#ibcon#flushed, iclass 27, count 0 2006.229.23:18:32.56#ibcon#about to write, iclass 27, count 0 2006.229.23:18:32.56#ibcon#wrote, iclass 27, count 0 2006.229.23:18:32.56#ibcon#about to read 3, iclass 27, count 0 2006.229.23:18:32.59#ibcon#read 3, iclass 27, count 0 2006.229.23:18:32.59#ibcon#about to read 4, iclass 27, count 0 2006.229.23:18:32.59#ibcon#read 4, iclass 27, count 0 2006.229.23:18:32.59#ibcon#about to read 5, iclass 27, count 0 2006.229.23:18:32.59#ibcon#read 5, iclass 27, count 0 2006.229.23:18:32.59#ibcon#about to read 6, iclass 27, count 0 2006.229.23:18:32.59#ibcon#read 6, iclass 27, count 0 2006.229.23:18:32.59#ibcon#end of sib2, iclass 27, count 0 2006.229.23:18:32.59#ibcon#*after write, iclass 27, count 0 2006.229.23:18:32.59#ibcon#*before return 0, iclass 27, count 0 2006.229.23:18:32.59#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:32.59#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:18:32.59#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:18:32.59#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:18:32.59$vck44/vabw=wide 2006.229.23:18:32.59#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.23:18:32.59#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.23:18:32.59#ibcon#ireg 8 cls_cnt 0 2006.229.23:18:32.59#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:32.59#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:32.59#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:32.59#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:18:32.59#ibcon#first serial, iclass 29, count 0 2006.229.23:18:32.59#ibcon#enter sib2, iclass 29, count 0 2006.229.23:18:32.59#ibcon#flushed, iclass 29, count 0 2006.229.23:18:32.59#ibcon#about to write, iclass 29, count 0 2006.229.23:18:32.59#ibcon#wrote, iclass 29, count 0 2006.229.23:18:32.59#ibcon#about to read 3, iclass 29, count 0 2006.229.23:18:32.61#ibcon#read 3, iclass 29, count 0 2006.229.23:18:32.61#ibcon#about to read 4, iclass 29, count 0 2006.229.23:18:32.61#ibcon#read 4, iclass 29, count 0 2006.229.23:18:32.61#ibcon#about to read 5, iclass 29, count 0 2006.229.23:18:32.61#ibcon#read 5, iclass 29, count 0 2006.229.23:18:32.61#ibcon#about to read 6, iclass 29, count 0 2006.229.23:18:32.61#ibcon#read 6, iclass 29, count 0 2006.229.23:18:32.61#ibcon#end of sib2, iclass 29, count 0 2006.229.23:18:32.61#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:18:32.61#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:18:32.61#ibcon#[25=BW32\r\n] 2006.229.23:18:32.61#ibcon#*before write, iclass 29, count 0 2006.229.23:18:32.61#ibcon#enter sib2, iclass 29, count 0 2006.229.23:18:32.61#ibcon#flushed, iclass 29, count 0 2006.229.23:18:32.61#ibcon#about to write, iclass 29, count 0 2006.229.23:18:32.61#ibcon#wrote, iclass 29, count 0 2006.229.23:18:32.61#ibcon#about to read 3, iclass 29, count 0 2006.229.23:18:32.64#ibcon#read 3, iclass 29, count 0 2006.229.23:18:32.64#ibcon#about to read 4, iclass 29, count 0 2006.229.23:18:32.64#ibcon#read 4, iclass 29, count 0 2006.229.23:18:32.64#ibcon#about to read 5, iclass 29, count 0 2006.229.23:18:32.64#ibcon#read 5, iclass 29, count 0 2006.229.23:18:32.64#ibcon#about to read 6, iclass 29, count 0 2006.229.23:18:32.64#ibcon#read 6, iclass 29, count 0 2006.229.23:18:32.64#ibcon#end of sib2, iclass 29, count 0 2006.229.23:18:32.64#ibcon#*after write, iclass 29, count 0 2006.229.23:18:32.64#ibcon#*before return 0, iclass 29, count 0 2006.229.23:18:32.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:32.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:18:32.64#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:18:32.64#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:18:32.64$vck44/vbbw=wide 2006.229.23:18:32.64#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:18:32.64#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:18:32.64#ibcon#ireg 8 cls_cnt 0 2006.229.23:18:32.64#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:18:32.71#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:18:32.71#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:18:32.71#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:18:32.71#ibcon#first serial, iclass 31, count 0 2006.229.23:18:32.71#ibcon#enter sib2, iclass 31, count 0 2006.229.23:18:32.71#ibcon#flushed, iclass 31, count 0 2006.229.23:18:32.71#ibcon#about to write, iclass 31, count 0 2006.229.23:18:32.71#ibcon#wrote, iclass 31, count 0 2006.229.23:18:32.71#ibcon#about to read 3, iclass 31, count 0 2006.229.23:18:32.73#ibcon#read 3, iclass 31, count 0 2006.229.23:18:32.73#ibcon#about to read 4, iclass 31, count 0 2006.229.23:18:32.73#ibcon#read 4, iclass 31, count 0 2006.229.23:18:32.73#ibcon#about to read 5, iclass 31, count 0 2006.229.23:18:32.73#ibcon#read 5, iclass 31, count 0 2006.229.23:18:32.73#ibcon#about to read 6, iclass 31, count 0 2006.229.23:18:32.73#ibcon#read 6, iclass 31, count 0 2006.229.23:18:32.73#ibcon#end of sib2, iclass 31, count 0 2006.229.23:18:32.73#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:18:32.73#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:18:32.73#ibcon#[27=BW32\r\n] 2006.229.23:18:32.73#ibcon#*before write, iclass 31, count 0 2006.229.23:18:32.73#ibcon#enter sib2, iclass 31, count 0 2006.229.23:18:32.73#ibcon#flushed, iclass 31, count 0 2006.229.23:18:32.73#ibcon#about to write, iclass 31, count 0 2006.229.23:18:32.73#ibcon#wrote, iclass 31, count 0 2006.229.23:18:32.73#ibcon#about to read 3, iclass 31, count 0 2006.229.23:18:32.76#ibcon#read 3, iclass 31, count 0 2006.229.23:18:32.82#ibcon#about to read 4, iclass 31, count 0 2006.229.23:18:32.82#ibcon#read 4, iclass 31, count 0 2006.229.23:18:32.82#ibcon#about to read 5, iclass 31, count 0 2006.229.23:18:32.82#ibcon#read 5, iclass 31, count 0 2006.229.23:18:32.82#ibcon#about to read 6, iclass 31, count 0 2006.229.23:18:32.82#ibcon#read 6, iclass 31, count 0 2006.229.23:18:32.82#ibcon#end of sib2, iclass 31, count 0 2006.229.23:18:32.82#ibcon#*after write, iclass 31, count 0 2006.229.23:18:32.82#ibcon#*before return 0, iclass 31, count 0 2006.229.23:18:32.82#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:18:32.82#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:18:32.82#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:18:32.82#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:18:32.82$setupk4/ifdk4 2006.229.23:18:32.82$ifdk4/lo= 2006.229.23:18:32.82$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:18:32.82$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:18:32.82$ifdk4/patch= 2006.229.23:18:32.82$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:18:32.82$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:18:32.83$setupk4/!*+20s 2006.229.23:18:35.12#abcon#<5=/08 1.8 5.7 29.59 871002.6\r\n> 2006.229.23:18:35.14#abcon#{5=INTERFACE CLEAR} 2006.229.23:18:35.20#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:18:45.29#abcon#<5=/08 1.8 5.7 29.60 861002.7\r\n> 2006.229.23:18:45.31#abcon#{5=INTERFACE CLEAR} 2006.229.23:18:45.37#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:18:47.28$setupk4/"tpicd 2006.229.23:18:47.28$setupk4/echo=off 2006.229.23:18:47.28$setupk4/xlog=off 2006.229.23:18:47.28:!2006.229.23:21:18 2006.229.23:18:53.13#trakl#Source acquired 2006.229.23:18:55.13#flagr#flagr/antenna,acquired 2006.229.23:21:18.00:preob 2006.229.23:21:18.14/onsource/TRACKING 2006.229.23:21:18.14:!2006.229.23:21:28 2006.229.23:21:28.00:"tape 2006.229.23:21:28.00:"st=record 2006.229.23:21:28.00:data_valid=on 2006.229.23:21:28.00:midob 2006.229.23:21:28.14/onsource/TRACKING 2006.229.23:21:28.14/wx/29.74,1002.7,83 2006.229.23:21:28.21/cable/+6.4122E-03 2006.229.23:21:29.30/va/01,08,usb,yes,29,31 2006.229.23:21:29.30/va/02,07,usb,yes,31,32 2006.229.23:21:29.30/va/03,06,usb,yes,39,41 2006.229.23:21:29.30/va/04,07,usb,yes,32,34 2006.229.23:21:29.30/va/05,04,usb,yes,29,29 2006.229.23:21:29.30/va/06,04,usb,yes,32,32 2006.229.23:21:29.30/va/07,05,usb,yes,28,29 2006.229.23:21:29.30/va/08,06,usb,yes,21,26 2006.229.23:21:29.53/valo/01,524.99,yes,locked 2006.229.23:21:29.53/valo/02,534.99,yes,locked 2006.229.23:21:29.53/valo/03,564.99,yes,locked 2006.229.23:21:29.53/valo/04,624.99,yes,locked 2006.229.23:21:29.53/valo/05,734.99,yes,locked 2006.229.23:21:29.53/valo/06,814.99,yes,locked 2006.229.23:21:29.53/valo/07,864.99,yes,locked 2006.229.23:21:29.53/valo/08,884.99,yes,locked 2006.229.23:21:30.62/vb/01,04,usb,yes,31,29 2006.229.23:21:30.62/vb/02,04,usb,yes,33,33 2006.229.23:21:30.62/vb/03,04,usb,yes,30,33 2006.229.23:21:30.62/vb/04,04,usb,yes,34,33 2006.229.23:21:30.62/vb/05,04,usb,yes,27,29 2006.229.23:21:30.62/vb/06,04,usb,yes,31,28 2006.229.23:21:30.62/vb/07,04,usb,yes,31,31 2006.229.23:21:30.62/vb/08,04,usb,yes,28,32 2006.229.23:21:30.85/vblo/01,629.99,yes,locked 2006.229.23:21:30.85/vblo/02,634.99,yes,locked 2006.229.23:21:30.85/vblo/03,649.99,yes,locked 2006.229.23:21:30.85/vblo/04,679.99,yes,locked 2006.229.23:21:30.85/vblo/05,709.99,yes,locked 2006.229.23:21:30.85/vblo/06,719.99,yes,locked 2006.229.23:21:30.85/vblo/07,734.99,yes,locked 2006.229.23:21:30.85/vblo/08,744.99,yes,locked 2006.229.23:21:31.00/vabw/8 2006.229.23:21:31.15/vbbw/8 2006.229.23:21:31.35/xfe/off,on,12.2 2006.229.23:21:31.72/ifatt/23,28,28,28 2006.229.23:21:32.07/fmout-gps/S +4.59E-07 2006.229.23:21:32.11:!2006.229.23:26:38 2006.229.23:26:38.00:data_valid=off 2006.229.23:26:38.01:"et 2006.229.23:26:38.01:!+3s 2006.229.23:26:41.02:"tape 2006.229.23:26:41.03:postob 2006.229.23:26:41.18/cable/+6.4109E-03 2006.229.23:26:41.18/wx/29.87,1002.6,82 2006.229.23:26:41.24/fmout-gps/S +4.59E-07 2006.229.23:26:41.24:scan_name=229-2331,jd0608,50 2006.229.23:26:41.24:source=3c274,123049.42,122328.0,2000.0,cw 2006.229.23:26:43.14#flagr#flagr/antenna,new-source 2006.229.23:26:43.14:checkk5 2006.229.23:26:43.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:26:43.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:26:44.38/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:26:44.77/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:26:45.16/chk_obsdata//k5ts1/T2292321??a.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.23:26:45.56/chk_obsdata//k5ts2/T2292321??b.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.23:26:45.96/chk_obsdata//k5ts3/T2292321??c.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.23:26:46.36/chk_obsdata//k5ts4/T2292321??d.dat file size is correct (nominal:1240MB, actual:1236MB). 2006.229.23:26:47.08/k5log//k5ts1_log_newline 2006.229.23:26:47.80/k5log//k5ts2_log_newline 2006.229.23:26:48.51/k5log//k5ts3_log_newline 2006.229.23:26:49.22/k5log//k5ts4_log_newline 2006.229.23:26:49.25/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:26:49.25:setupk4=1 2006.229.23:26:49.25$setupk4/echo=on 2006.229.23:26:49.25$setupk4/pcalon 2006.229.23:26:49.25$pcalon/"no phase cal control is implemented here 2006.229.23:26:49.25$setupk4/"tpicd=stop 2006.229.23:26:49.25$setupk4/"rec=synch_on 2006.229.23:26:49.25$setupk4/"rec_mode=128 2006.229.23:26:49.25$setupk4/!* 2006.229.23:26:49.25$setupk4/recpk4 2006.229.23:26:49.25$recpk4/recpatch= 2006.229.23:26:49.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:26:49.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:26:49.25$setupk4/vck44 2006.229.23:26:49.25$vck44/valo=1,524.99 2006.229.23:26:49.25#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.23:26:49.25#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.23:26:49.25#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:49.25#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:49.25#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:49.25#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:49.25#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:26:49.25#ibcon#first serial, iclass 16, count 0 2006.229.23:26:49.25#ibcon#enter sib2, iclass 16, count 0 2006.229.23:26:49.25#ibcon#flushed, iclass 16, count 0 2006.229.23:26:49.25#ibcon#about to write, iclass 16, count 0 2006.229.23:26:49.25#ibcon#wrote, iclass 16, count 0 2006.229.23:26:49.25#ibcon#about to read 3, iclass 16, count 0 2006.229.23:26:49.27#ibcon#read 3, iclass 16, count 0 2006.229.23:26:49.27#ibcon#about to read 4, iclass 16, count 0 2006.229.23:26:49.27#ibcon#read 4, iclass 16, count 0 2006.229.23:26:49.27#ibcon#about to read 5, iclass 16, count 0 2006.229.23:26:49.27#ibcon#read 5, iclass 16, count 0 2006.229.23:26:49.27#ibcon#about to read 6, iclass 16, count 0 2006.229.23:26:49.27#ibcon#read 6, iclass 16, count 0 2006.229.23:26:49.27#ibcon#end of sib2, iclass 16, count 0 2006.229.23:26:49.27#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:26:49.27#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:26:49.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:26:49.27#ibcon#*before write, iclass 16, count 0 2006.229.23:26:49.27#ibcon#enter sib2, iclass 16, count 0 2006.229.23:26:49.27#ibcon#flushed, iclass 16, count 0 2006.229.23:26:49.27#ibcon#about to write, iclass 16, count 0 2006.229.23:26:49.27#ibcon#wrote, iclass 16, count 0 2006.229.23:26:49.27#ibcon#about to read 3, iclass 16, count 0 2006.229.23:26:49.32#ibcon#read 3, iclass 16, count 0 2006.229.23:26:49.32#ibcon#about to read 4, iclass 16, count 0 2006.229.23:26:49.32#ibcon#read 4, iclass 16, count 0 2006.229.23:26:49.32#ibcon#about to read 5, iclass 16, count 0 2006.229.23:26:49.32#ibcon#read 5, iclass 16, count 0 2006.229.23:26:49.32#ibcon#about to read 6, iclass 16, count 0 2006.229.23:26:49.32#ibcon#read 6, iclass 16, count 0 2006.229.23:26:49.32#ibcon#end of sib2, iclass 16, count 0 2006.229.23:26:49.32#ibcon#*after write, iclass 16, count 0 2006.229.23:26:49.32#ibcon#*before return 0, iclass 16, count 0 2006.229.23:26:49.32#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:49.32#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:49.32#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:26:49.32#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:26:49.32$vck44/va=1,8 2006.229.23:26:49.32#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.23:26:49.32#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.23:26:49.32#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:49.32#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:49.32#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:49.32#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:49.32#ibcon#enter wrdev, iclass 18, count 2 2006.229.23:26:49.32#ibcon#first serial, iclass 18, count 2 2006.229.23:26:49.32#ibcon#enter sib2, iclass 18, count 2 2006.229.23:26:49.32#ibcon#flushed, iclass 18, count 2 2006.229.23:26:49.32#ibcon#about to write, iclass 18, count 2 2006.229.23:26:49.32#ibcon#wrote, iclass 18, count 2 2006.229.23:26:49.32#ibcon#about to read 3, iclass 18, count 2 2006.229.23:26:49.34#ibcon#read 3, iclass 18, count 2 2006.229.23:26:49.34#ibcon#about to read 4, iclass 18, count 2 2006.229.23:26:49.34#ibcon#read 4, iclass 18, count 2 2006.229.23:26:49.34#ibcon#about to read 5, iclass 18, count 2 2006.229.23:26:49.34#ibcon#read 5, iclass 18, count 2 2006.229.23:26:49.34#ibcon#about to read 6, iclass 18, count 2 2006.229.23:26:49.34#ibcon#read 6, iclass 18, count 2 2006.229.23:26:49.34#ibcon#end of sib2, iclass 18, count 2 2006.229.23:26:49.34#ibcon#*mode == 0, iclass 18, count 2 2006.229.23:26:49.34#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.23:26:49.34#ibcon#[25=AT01-08\r\n] 2006.229.23:26:49.34#ibcon#*before write, iclass 18, count 2 2006.229.23:26:49.34#ibcon#enter sib2, iclass 18, count 2 2006.229.23:26:49.34#ibcon#flushed, iclass 18, count 2 2006.229.23:26:49.34#ibcon#about to write, iclass 18, count 2 2006.229.23:26:49.34#ibcon#wrote, iclass 18, count 2 2006.229.23:26:49.34#ibcon#about to read 3, iclass 18, count 2 2006.229.23:26:49.37#ibcon#read 3, iclass 18, count 2 2006.229.23:26:49.37#ibcon#about to read 4, iclass 18, count 2 2006.229.23:26:49.37#ibcon#read 4, iclass 18, count 2 2006.229.23:26:49.37#ibcon#about to read 5, iclass 18, count 2 2006.229.23:26:49.37#ibcon#read 5, iclass 18, count 2 2006.229.23:26:49.37#ibcon#about to read 6, iclass 18, count 2 2006.229.23:26:49.37#ibcon#read 6, iclass 18, count 2 2006.229.23:26:49.37#ibcon#end of sib2, iclass 18, count 2 2006.229.23:26:49.37#ibcon#*after write, iclass 18, count 2 2006.229.23:26:49.37#ibcon#*before return 0, iclass 18, count 2 2006.229.23:26:49.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:49.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:49.37#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.23:26:49.37#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:49.37#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:49.49#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:49.49#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:49.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:26:49.49#ibcon#first serial, iclass 18, count 0 2006.229.23:26:49.49#ibcon#enter sib2, iclass 18, count 0 2006.229.23:26:49.49#ibcon#flushed, iclass 18, count 0 2006.229.23:26:49.49#ibcon#about to write, iclass 18, count 0 2006.229.23:26:49.49#ibcon#wrote, iclass 18, count 0 2006.229.23:26:49.49#ibcon#about to read 3, iclass 18, count 0 2006.229.23:26:49.51#ibcon#read 3, iclass 18, count 0 2006.229.23:26:49.51#ibcon#about to read 4, iclass 18, count 0 2006.229.23:26:49.51#ibcon#read 4, iclass 18, count 0 2006.229.23:26:49.51#ibcon#about to read 5, iclass 18, count 0 2006.229.23:26:49.51#ibcon#read 5, iclass 18, count 0 2006.229.23:26:49.51#ibcon#about to read 6, iclass 18, count 0 2006.229.23:26:49.51#ibcon#read 6, iclass 18, count 0 2006.229.23:26:49.51#ibcon#end of sib2, iclass 18, count 0 2006.229.23:26:49.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:26:49.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:26:49.51#ibcon#[25=USB\r\n] 2006.229.23:26:49.51#ibcon#*before write, iclass 18, count 0 2006.229.23:26:49.51#ibcon#enter sib2, iclass 18, count 0 2006.229.23:26:49.51#ibcon#flushed, iclass 18, count 0 2006.229.23:26:49.51#ibcon#about to write, iclass 18, count 0 2006.229.23:26:49.51#ibcon#wrote, iclass 18, count 0 2006.229.23:26:49.51#ibcon#about to read 3, iclass 18, count 0 2006.229.23:26:49.54#ibcon#read 3, iclass 18, count 0 2006.229.23:26:49.54#ibcon#about to read 4, iclass 18, count 0 2006.229.23:26:49.54#ibcon#read 4, iclass 18, count 0 2006.229.23:26:49.54#ibcon#about to read 5, iclass 18, count 0 2006.229.23:26:49.54#ibcon#read 5, iclass 18, count 0 2006.229.23:26:49.54#ibcon#about to read 6, iclass 18, count 0 2006.229.23:26:49.54#ibcon#read 6, iclass 18, count 0 2006.229.23:26:49.54#ibcon#end of sib2, iclass 18, count 0 2006.229.23:26:49.54#ibcon#*after write, iclass 18, count 0 2006.229.23:26:49.54#ibcon#*before return 0, iclass 18, count 0 2006.229.23:26:49.54#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:49.54#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:49.54#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:26:49.54#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:26:49.54$vck44/valo=2,534.99 2006.229.23:26:49.54#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.23:26:49.54#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.23:26:49.54#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:49.54#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:49.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:49.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:49.54#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:26:49.54#ibcon#first serial, iclass 20, count 0 2006.229.23:26:49.54#ibcon#enter sib2, iclass 20, count 0 2006.229.23:26:49.54#ibcon#flushed, iclass 20, count 0 2006.229.23:26:49.54#ibcon#about to write, iclass 20, count 0 2006.229.23:26:49.54#ibcon#wrote, iclass 20, count 0 2006.229.23:26:49.54#ibcon#about to read 3, iclass 20, count 0 2006.229.23:26:49.56#ibcon#read 3, iclass 20, count 0 2006.229.23:26:49.56#ibcon#about to read 4, iclass 20, count 0 2006.229.23:26:49.56#ibcon#read 4, iclass 20, count 0 2006.229.23:26:49.56#ibcon#about to read 5, iclass 20, count 0 2006.229.23:26:49.56#ibcon#read 5, iclass 20, count 0 2006.229.23:26:49.56#ibcon#about to read 6, iclass 20, count 0 2006.229.23:26:49.56#ibcon#read 6, iclass 20, count 0 2006.229.23:26:49.56#ibcon#end of sib2, iclass 20, count 0 2006.229.23:26:49.56#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:26:49.56#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:26:49.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:26:49.56#ibcon#*before write, iclass 20, count 0 2006.229.23:26:49.56#ibcon#enter sib2, iclass 20, count 0 2006.229.23:26:49.56#ibcon#flushed, iclass 20, count 0 2006.229.23:26:49.56#ibcon#about to write, iclass 20, count 0 2006.229.23:26:49.56#ibcon#wrote, iclass 20, count 0 2006.229.23:26:49.56#ibcon#about to read 3, iclass 20, count 0 2006.229.23:26:49.60#ibcon#read 3, iclass 20, count 0 2006.229.23:26:49.60#ibcon#about to read 4, iclass 20, count 0 2006.229.23:26:49.60#ibcon#read 4, iclass 20, count 0 2006.229.23:26:49.60#ibcon#about to read 5, iclass 20, count 0 2006.229.23:26:49.60#ibcon#read 5, iclass 20, count 0 2006.229.23:26:49.60#ibcon#about to read 6, iclass 20, count 0 2006.229.23:26:49.60#ibcon#read 6, iclass 20, count 0 2006.229.23:26:49.60#ibcon#end of sib2, iclass 20, count 0 2006.229.23:26:49.60#ibcon#*after write, iclass 20, count 0 2006.229.23:26:49.60#ibcon#*before return 0, iclass 20, count 0 2006.229.23:26:49.60#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:49.60#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:49.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:26:49.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:26:49.60$vck44/va=2,7 2006.229.23:26:49.60#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.23:26:49.60#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.23:26:49.60#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:49.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:49.66#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:49.66#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:49.66#ibcon#enter wrdev, iclass 22, count 2 2006.229.23:26:49.66#ibcon#first serial, iclass 22, count 2 2006.229.23:26:49.66#ibcon#enter sib2, iclass 22, count 2 2006.229.23:26:49.66#ibcon#flushed, iclass 22, count 2 2006.229.23:26:49.66#ibcon#about to write, iclass 22, count 2 2006.229.23:26:49.66#ibcon#wrote, iclass 22, count 2 2006.229.23:26:49.66#ibcon#about to read 3, iclass 22, count 2 2006.229.23:26:49.68#ibcon#read 3, iclass 22, count 2 2006.229.23:26:49.68#ibcon#about to read 4, iclass 22, count 2 2006.229.23:26:49.68#ibcon#read 4, iclass 22, count 2 2006.229.23:26:49.68#ibcon#about to read 5, iclass 22, count 2 2006.229.23:26:49.68#ibcon#read 5, iclass 22, count 2 2006.229.23:26:49.68#ibcon#about to read 6, iclass 22, count 2 2006.229.23:26:49.68#ibcon#read 6, iclass 22, count 2 2006.229.23:26:49.68#ibcon#end of sib2, iclass 22, count 2 2006.229.23:26:49.68#ibcon#*mode == 0, iclass 22, count 2 2006.229.23:26:49.68#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.23:26:49.68#ibcon#[25=AT02-07\r\n] 2006.229.23:26:49.68#ibcon#*before write, iclass 22, count 2 2006.229.23:26:49.68#ibcon#enter sib2, iclass 22, count 2 2006.229.23:26:49.68#ibcon#flushed, iclass 22, count 2 2006.229.23:26:49.68#ibcon#about to write, iclass 22, count 2 2006.229.23:26:49.68#ibcon#wrote, iclass 22, count 2 2006.229.23:26:49.68#ibcon#about to read 3, iclass 22, count 2 2006.229.23:26:49.71#ibcon#read 3, iclass 22, count 2 2006.229.23:26:49.71#ibcon#about to read 4, iclass 22, count 2 2006.229.23:26:49.71#ibcon#read 4, iclass 22, count 2 2006.229.23:26:49.71#ibcon#about to read 5, iclass 22, count 2 2006.229.23:26:49.71#ibcon#read 5, iclass 22, count 2 2006.229.23:26:49.71#ibcon#about to read 6, iclass 22, count 2 2006.229.23:26:49.71#ibcon#read 6, iclass 22, count 2 2006.229.23:26:49.71#ibcon#end of sib2, iclass 22, count 2 2006.229.23:26:49.71#ibcon#*after write, iclass 22, count 2 2006.229.23:26:49.71#ibcon#*before return 0, iclass 22, count 2 2006.229.23:26:49.71#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:49.71#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:49.71#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.23:26:49.71#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:49.71#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:49.83#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:49.83#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:49.83#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:26:49.83#ibcon#first serial, iclass 22, count 0 2006.229.23:26:49.83#ibcon#enter sib2, iclass 22, count 0 2006.229.23:26:49.83#ibcon#flushed, iclass 22, count 0 2006.229.23:26:49.83#ibcon#about to write, iclass 22, count 0 2006.229.23:26:49.83#ibcon#wrote, iclass 22, count 0 2006.229.23:26:49.83#ibcon#about to read 3, iclass 22, count 0 2006.229.23:26:49.85#ibcon#read 3, iclass 22, count 0 2006.229.23:26:49.85#ibcon#about to read 4, iclass 22, count 0 2006.229.23:26:49.85#ibcon#read 4, iclass 22, count 0 2006.229.23:26:49.85#ibcon#about to read 5, iclass 22, count 0 2006.229.23:26:49.85#ibcon#read 5, iclass 22, count 0 2006.229.23:26:49.85#ibcon#about to read 6, iclass 22, count 0 2006.229.23:26:49.85#ibcon#read 6, iclass 22, count 0 2006.229.23:26:49.85#ibcon#end of sib2, iclass 22, count 0 2006.229.23:26:49.85#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:26:49.85#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:26:49.85#ibcon#[25=USB\r\n] 2006.229.23:26:49.85#ibcon#*before write, iclass 22, count 0 2006.229.23:26:49.85#ibcon#enter sib2, iclass 22, count 0 2006.229.23:26:49.85#ibcon#flushed, iclass 22, count 0 2006.229.23:26:49.85#ibcon#about to write, iclass 22, count 0 2006.229.23:26:49.85#ibcon#wrote, iclass 22, count 0 2006.229.23:26:49.85#ibcon#about to read 3, iclass 22, count 0 2006.229.23:26:49.88#ibcon#read 3, iclass 22, count 0 2006.229.23:26:49.88#ibcon#about to read 4, iclass 22, count 0 2006.229.23:26:49.88#ibcon#read 4, iclass 22, count 0 2006.229.23:26:49.88#ibcon#about to read 5, iclass 22, count 0 2006.229.23:26:49.88#ibcon#read 5, iclass 22, count 0 2006.229.23:26:49.88#ibcon#about to read 6, iclass 22, count 0 2006.229.23:26:49.88#ibcon#read 6, iclass 22, count 0 2006.229.23:26:49.88#ibcon#end of sib2, iclass 22, count 0 2006.229.23:26:49.88#ibcon#*after write, iclass 22, count 0 2006.229.23:26:49.88#ibcon#*before return 0, iclass 22, count 0 2006.229.23:26:49.88#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:49.88#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:49.88#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:26:49.88#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:26:49.88$vck44/valo=3,564.99 2006.229.23:26:49.88#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.23:26:49.88#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.23:26:49.88#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:49.88#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:49.88#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:49.88#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:49.88#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:26:49.88#ibcon#first serial, iclass 24, count 0 2006.229.23:26:49.88#ibcon#enter sib2, iclass 24, count 0 2006.229.23:26:49.88#ibcon#flushed, iclass 24, count 0 2006.229.23:26:49.88#ibcon#about to write, iclass 24, count 0 2006.229.23:26:49.88#ibcon#wrote, iclass 24, count 0 2006.229.23:26:49.88#ibcon#about to read 3, iclass 24, count 0 2006.229.23:26:49.90#ibcon#read 3, iclass 24, count 0 2006.229.23:26:49.90#ibcon#about to read 4, iclass 24, count 0 2006.229.23:26:49.90#ibcon#read 4, iclass 24, count 0 2006.229.23:26:49.90#ibcon#about to read 5, iclass 24, count 0 2006.229.23:26:49.90#ibcon#read 5, iclass 24, count 0 2006.229.23:26:49.90#ibcon#about to read 6, iclass 24, count 0 2006.229.23:26:49.90#ibcon#read 6, iclass 24, count 0 2006.229.23:26:49.90#ibcon#end of sib2, iclass 24, count 0 2006.229.23:26:49.90#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:26:49.90#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:26:49.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:26:49.90#ibcon#*before write, iclass 24, count 0 2006.229.23:26:49.90#ibcon#enter sib2, iclass 24, count 0 2006.229.23:26:49.90#ibcon#flushed, iclass 24, count 0 2006.229.23:26:49.90#ibcon#about to write, iclass 24, count 0 2006.229.23:26:49.90#ibcon#wrote, iclass 24, count 0 2006.229.23:26:49.90#ibcon#about to read 3, iclass 24, count 0 2006.229.23:26:49.94#ibcon#read 3, iclass 24, count 0 2006.229.23:26:49.94#ibcon#about to read 4, iclass 24, count 0 2006.229.23:26:49.94#ibcon#read 4, iclass 24, count 0 2006.229.23:26:49.94#ibcon#about to read 5, iclass 24, count 0 2006.229.23:26:49.94#ibcon#read 5, iclass 24, count 0 2006.229.23:26:49.94#ibcon#about to read 6, iclass 24, count 0 2006.229.23:26:49.94#ibcon#read 6, iclass 24, count 0 2006.229.23:26:49.94#ibcon#end of sib2, iclass 24, count 0 2006.229.23:26:49.94#ibcon#*after write, iclass 24, count 0 2006.229.23:26:49.94#ibcon#*before return 0, iclass 24, count 0 2006.229.23:26:49.94#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:49.94#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:49.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:26:49.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:26:49.94$vck44/va=3,6 2006.229.23:26:49.94#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.23:26:49.94#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.23:26:49.94#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:49.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:50.00#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:50.00#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:50.00#ibcon#enter wrdev, iclass 26, count 2 2006.229.23:26:50.00#ibcon#first serial, iclass 26, count 2 2006.229.23:26:50.00#ibcon#enter sib2, iclass 26, count 2 2006.229.23:26:50.00#ibcon#flushed, iclass 26, count 2 2006.229.23:26:50.00#ibcon#about to write, iclass 26, count 2 2006.229.23:26:50.00#ibcon#wrote, iclass 26, count 2 2006.229.23:26:50.00#ibcon#about to read 3, iclass 26, count 2 2006.229.23:26:50.02#ibcon#read 3, iclass 26, count 2 2006.229.23:26:50.02#ibcon#about to read 4, iclass 26, count 2 2006.229.23:26:50.02#ibcon#read 4, iclass 26, count 2 2006.229.23:26:50.02#ibcon#about to read 5, iclass 26, count 2 2006.229.23:26:50.02#ibcon#read 5, iclass 26, count 2 2006.229.23:26:50.02#ibcon#about to read 6, iclass 26, count 2 2006.229.23:26:50.02#ibcon#read 6, iclass 26, count 2 2006.229.23:26:50.02#ibcon#end of sib2, iclass 26, count 2 2006.229.23:26:50.02#ibcon#*mode == 0, iclass 26, count 2 2006.229.23:26:50.02#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.23:26:50.02#ibcon#[25=AT03-06\r\n] 2006.229.23:26:50.02#ibcon#*before write, iclass 26, count 2 2006.229.23:26:50.02#ibcon#enter sib2, iclass 26, count 2 2006.229.23:26:50.02#ibcon#flushed, iclass 26, count 2 2006.229.23:26:50.02#ibcon#about to write, iclass 26, count 2 2006.229.23:26:50.02#ibcon#wrote, iclass 26, count 2 2006.229.23:26:50.02#ibcon#about to read 3, iclass 26, count 2 2006.229.23:26:50.05#ibcon#read 3, iclass 26, count 2 2006.229.23:26:50.05#ibcon#about to read 4, iclass 26, count 2 2006.229.23:26:50.05#ibcon#read 4, iclass 26, count 2 2006.229.23:26:50.05#ibcon#about to read 5, iclass 26, count 2 2006.229.23:26:50.05#ibcon#read 5, iclass 26, count 2 2006.229.23:26:50.05#ibcon#about to read 6, iclass 26, count 2 2006.229.23:26:50.05#ibcon#read 6, iclass 26, count 2 2006.229.23:26:50.05#ibcon#end of sib2, iclass 26, count 2 2006.229.23:26:50.05#ibcon#*after write, iclass 26, count 2 2006.229.23:26:50.05#ibcon#*before return 0, iclass 26, count 2 2006.229.23:26:50.05#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:50.05#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:50.05#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.23:26:50.05#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:50.05#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:50.17#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:50.17#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:50.17#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:26:50.17#ibcon#first serial, iclass 26, count 0 2006.229.23:26:50.17#ibcon#enter sib2, iclass 26, count 0 2006.229.23:26:50.17#ibcon#flushed, iclass 26, count 0 2006.229.23:26:50.17#ibcon#about to write, iclass 26, count 0 2006.229.23:26:50.17#ibcon#wrote, iclass 26, count 0 2006.229.23:26:50.17#ibcon#about to read 3, iclass 26, count 0 2006.229.23:26:50.19#ibcon#read 3, iclass 26, count 0 2006.229.23:26:50.19#ibcon#about to read 4, iclass 26, count 0 2006.229.23:26:50.19#ibcon#read 4, iclass 26, count 0 2006.229.23:26:50.19#ibcon#about to read 5, iclass 26, count 0 2006.229.23:26:50.19#ibcon#read 5, iclass 26, count 0 2006.229.23:26:50.19#ibcon#about to read 6, iclass 26, count 0 2006.229.23:26:50.19#ibcon#read 6, iclass 26, count 0 2006.229.23:26:50.19#ibcon#end of sib2, iclass 26, count 0 2006.229.23:26:50.19#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:26:50.19#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:26:50.19#ibcon#[25=USB\r\n] 2006.229.23:26:50.19#ibcon#*before write, iclass 26, count 0 2006.229.23:26:50.19#ibcon#enter sib2, iclass 26, count 0 2006.229.23:26:50.19#ibcon#flushed, iclass 26, count 0 2006.229.23:26:50.19#ibcon#about to write, iclass 26, count 0 2006.229.23:26:50.19#ibcon#wrote, iclass 26, count 0 2006.229.23:26:50.19#ibcon#about to read 3, iclass 26, count 0 2006.229.23:26:50.22#ibcon#read 3, iclass 26, count 0 2006.229.23:26:50.22#ibcon#about to read 4, iclass 26, count 0 2006.229.23:26:50.22#ibcon#read 4, iclass 26, count 0 2006.229.23:26:50.22#ibcon#about to read 5, iclass 26, count 0 2006.229.23:26:50.22#ibcon#read 5, iclass 26, count 0 2006.229.23:26:50.22#ibcon#about to read 6, iclass 26, count 0 2006.229.23:26:50.22#ibcon#read 6, iclass 26, count 0 2006.229.23:26:50.22#ibcon#end of sib2, iclass 26, count 0 2006.229.23:26:50.22#ibcon#*after write, iclass 26, count 0 2006.229.23:26:50.22#ibcon#*before return 0, iclass 26, count 0 2006.229.23:26:50.22#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:50.22#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:50.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:26:50.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:26:50.22$vck44/valo=4,624.99 2006.229.23:26:50.22#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.23:26:50.22#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.23:26:50.22#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:50.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:50.22#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:50.22#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:50.22#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:26:50.22#ibcon#first serial, iclass 28, count 0 2006.229.23:26:50.22#ibcon#enter sib2, iclass 28, count 0 2006.229.23:26:50.22#ibcon#flushed, iclass 28, count 0 2006.229.23:26:50.22#ibcon#about to write, iclass 28, count 0 2006.229.23:26:50.22#ibcon#wrote, iclass 28, count 0 2006.229.23:26:50.22#ibcon#about to read 3, iclass 28, count 0 2006.229.23:26:50.24#ibcon#read 3, iclass 28, count 0 2006.229.23:26:50.24#ibcon#about to read 4, iclass 28, count 0 2006.229.23:26:50.24#ibcon#read 4, iclass 28, count 0 2006.229.23:26:50.24#ibcon#about to read 5, iclass 28, count 0 2006.229.23:26:50.24#ibcon#read 5, iclass 28, count 0 2006.229.23:26:50.24#ibcon#about to read 6, iclass 28, count 0 2006.229.23:26:50.24#ibcon#read 6, iclass 28, count 0 2006.229.23:26:50.24#ibcon#end of sib2, iclass 28, count 0 2006.229.23:26:50.24#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:26:50.24#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:26:50.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:26:50.24#ibcon#*before write, iclass 28, count 0 2006.229.23:26:50.24#ibcon#enter sib2, iclass 28, count 0 2006.229.23:26:50.24#ibcon#flushed, iclass 28, count 0 2006.229.23:26:50.24#ibcon#about to write, iclass 28, count 0 2006.229.23:26:50.24#ibcon#wrote, iclass 28, count 0 2006.229.23:26:50.24#ibcon#about to read 3, iclass 28, count 0 2006.229.23:26:50.28#ibcon#read 3, iclass 28, count 0 2006.229.23:26:50.28#ibcon#about to read 4, iclass 28, count 0 2006.229.23:26:50.28#ibcon#read 4, iclass 28, count 0 2006.229.23:26:50.28#ibcon#about to read 5, iclass 28, count 0 2006.229.23:26:50.28#ibcon#read 5, iclass 28, count 0 2006.229.23:26:50.28#ibcon#about to read 6, iclass 28, count 0 2006.229.23:26:50.28#ibcon#read 6, iclass 28, count 0 2006.229.23:26:50.28#ibcon#end of sib2, iclass 28, count 0 2006.229.23:26:50.28#ibcon#*after write, iclass 28, count 0 2006.229.23:26:50.28#ibcon#*before return 0, iclass 28, count 0 2006.229.23:26:50.28#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:50.28#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:50.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:26:50.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:26:50.28$vck44/va=4,7 2006.229.23:26:50.28#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.23:26:50.28#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.23:26:50.28#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:50.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:50.34#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:50.34#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:50.34#ibcon#enter wrdev, iclass 30, count 2 2006.229.23:26:50.34#ibcon#first serial, iclass 30, count 2 2006.229.23:26:50.34#ibcon#enter sib2, iclass 30, count 2 2006.229.23:26:50.34#ibcon#flushed, iclass 30, count 2 2006.229.23:26:50.34#ibcon#about to write, iclass 30, count 2 2006.229.23:26:50.34#ibcon#wrote, iclass 30, count 2 2006.229.23:26:50.34#ibcon#about to read 3, iclass 30, count 2 2006.229.23:26:50.36#ibcon#read 3, iclass 30, count 2 2006.229.23:26:50.36#ibcon#about to read 4, iclass 30, count 2 2006.229.23:26:50.36#ibcon#read 4, iclass 30, count 2 2006.229.23:26:50.36#ibcon#about to read 5, iclass 30, count 2 2006.229.23:26:50.36#ibcon#read 5, iclass 30, count 2 2006.229.23:26:50.36#ibcon#about to read 6, iclass 30, count 2 2006.229.23:26:50.36#ibcon#read 6, iclass 30, count 2 2006.229.23:26:50.36#ibcon#end of sib2, iclass 30, count 2 2006.229.23:26:50.36#ibcon#*mode == 0, iclass 30, count 2 2006.229.23:26:50.36#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.23:26:50.36#ibcon#[25=AT04-07\r\n] 2006.229.23:26:50.36#ibcon#*before write, iclass 30, count 2 2006.229.23:26:50.36#ibcon#enter sib2, iclass 30, count 2 2006.229.23:26:50.36#ibcon#flushed, iclass 30, count 2 2006.229.23:26:50.36#ibcon#about to write, iclass 30, count 2 2006.229.23:26:50.36#ibcon#wrote, iclass 30, count 2 2006.229.23:26:50.36#ibcon#about to read 3, iclass 30, count 2 2006.229.23:26:50.39#ibcon#read 3, iclass 30, count 2 2006.229.23:26:50.39#ibcon#about to read 4, iclass 30, count 2 2006.229.23:26:50.39#ibcon#read 4, iclass 30, count 2 2006.229.23:26:50.39#ibcon#about to read 5, iclass 30, count 2 2006.229.23:26:50.39#ibcon#read 5, iclass 30, count 2 2006.229.23:26:50.39#ibcon#about to read 6, iclass 30, count 2 2006.229.23:26:50.39#ibcon#read 6, iclass 30, count 2 2006.229.23:26:50.39#ibcon#end of sib2, iclass 30, count 2 2006.229.23:26:50.39#ibcon#*after write, iclass 30, count 2 2006.229.23:26:50.39#ibcon#*before return 0, iclass 30, count 2 2006.229.23:26:50.39#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:50.39#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:50.39#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.23:26:50.39#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:50.39#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:50.51#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:50.51#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:50.51#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:26:50.51#ibcon#first serial, iclass 30, count 0 2006.229.23:26:50.51#ibcon#enter sib2, iclass 30, count 0 2006.229.23:26:50.51#ibcon#flushed, iclass 30, count 0 2006.229.23:26:50.51#ibcon#about to write, iclass 30, count 0 2006.229.23:26:50.51#ibcon#wrote, iclass 30, count 0 2006.229.23:26:50.51#ibcon#about to read 3, iclass 30, count 0 2006.229.23:26:50.53#ibcon#read 3, iclass 30, count 0 2006.229.23:26:50.53#ibcon#about to read 4, iclass 30, count 0 2006.229.23:26:50.53#ibcon#read 4, iclass 30, count 0 2006.229.23:26:50.53#ibcon#about to read 5, iclass 30, count 0 2006.229.23:26:50.53#ibcon#read 5, iclass 30, count 0 2006.229.23:26:50.53#ibcon#about to read 6, iclass 30, count 0 2006.229.23:26:50.53#ibcon#read 6, iclass 30, count 0 2006.229.23:26:50.53#ibcon#end of sib2, iclass 30, count 0 2006.229.23:26:50.53#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:26:50.53#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:26:50.53#ibcon#[25=USB\r\n] 2006.229.23:26:50.53#ibcon#*before write, iclass 30, count 0 2006.229.23:26:50.53#ibcon#enter sib2, iclass 30, count 0 2006.229.23:26:50.53#ibcon#flushed, iclass 30, count 0 2006.229.23:26:50.53#ibcon#about to write, iclass 30, count 0 2006.229.23:26:50.53#ibcon#wrote, iclass 30, count 0 2006.229.23:26:50.53#ibcon#about to read 3, iclass 30, count 0 2006.229.23:26:50.56#ibcon#read 3, iclass 30, count 0 2006.229.23:26:50.56#ibcon#about to read 4, iclass 30, count 0 2006.229.23:26:50.56#ibcon#read 4, iclass 30, count 0 2006.229.23:26:50.56#ibcon#about to read 5, iclass 30, count 0 2006.229.23:26:50.56#ibcon#read 5, iclass 30, count 0 2006.229.23:26:50.56#ibcon#about to read 6, iclass 30, count 0 2006.229.23:26:50.56#ibcon#read 6, iclass 30, count 0 2006.229.23:26:50.56#ibcon#end of sib2, iclass 30, count 0 2006.229.23:26:50.56#ibcon#*after write, iclass 30, count 0 2006.229.23:26:50.56#ibcon#*before return 0, iclass 30, count 0 2006.229.23:26:50.56#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:50.56#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:50.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:26:50.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:26:50.56$vck44/valo=5,734.99 2006.229.23:26:50.56#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.23:26:50.56#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.23:26:50.56#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:50.56#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:26:50.56#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:26:50.56#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:26:50.56#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:26:50.56#ibcon#first serial, iclass 32, count 0 2006.229.23:26:50.56#ibcon#enter sib2, iclass 32, count 0 2006.229.23:26:50.56#ibcon#flushed, iclass 32, count 0 2006.229.23:26:50.56#ibcon#about to write, iclass 32, count 0 2006.229.23:26:50.56#ibcon#wrote, iclass 32, count 0 2006.229.23:26:50.56#ibcon#about to read 3, iclass 32, count 0 2006.229.23:26:50.58#ibcon#read 3, iclass 32, count 0 2006.229.23:26:50.58#ibcon#about to read 4, iclass 32, count 0 2006.229.23:26:50.58#ibcon#read 4, iclass 32, count 0 2006.229.23:26:50.58#ibcon#about to read 5, iclass 32, count 0 2006.229.23:26:50.58#ibcon#read 5, iclass 32, count 0 2006.229.23:26:50.58#ibcon#about to read 6, iclass 32, count 0 2006.229.23:26:50.58#ibcon#read 6, iclass 32, count 0 2006.229.23:26:50.58#ibcon#end of sib2, iclass 32, count 0 2006.229.23:26:50.58#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:26:50.58#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:26:50.58#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:26:50.58#ibcon#*before write, iclass 32, count 0 2006.229.23:26:50.58#ibcon#enter sib2, iclass 32, count 0 2006.229.23:26:50.58#ibcon#flushed, iclass 32, count 0 2006.229.23:26:50.58#ibcon#about to write, iclass 32, count 0 2006.229.23:26:50.58#ibcon#wrote, iclass 32, count 0 2006.229.23:26:50.58#ibcon#about to read 3, iclass 32, count 0 2006.229.23:26:50.62#ibcon#read 3, iclass 32, count 0 2006.229.23:26:50.62#ibcon#about to read 4, iclass 32, count 0 2006.229.23:26:50.62#ibcon#read 4, iclass 32, count 0 2006.229.23:26:50.62#ibcon#about to read 5, iclass 32, count 0 2006.229.23:26:50.62#ibcon#read 5, iclass 32, count 0 2006.229.23:26:50.62#ibcon#about to read 6, iclass 32, count 0 2006.229.23:26:50.62#ibcon#read 6, iclass 32, count 0 2006.229.23:26:50.62#ibcon#end of sib2, iclass 32, count 0 2006.229.23:26:50.62#ibcon#*after write, iclass 32, count 0 2006.229.23:26:50.62#ibcon#*before return 0, iclass 32, count 0 2006.229.23:26:50.62#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:26:50.62#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:26:50.62#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:26:50.62#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:26:50.62$vck44/va=5,4 2006.229.23:26:50.62#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.23:26:50.62#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.23:26:50.62#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:50.62#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:26:50.68#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:26:50.68#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:26:50.68#ibcon#enter wrdev, iclass 34, count 2 2006.229.23:26:50.68#ibcon#first serial, iclass 34, count 2 2006.229.23:26:50.68#ibcon#enter sib2, iclass 34, count 2 2006.229.23:26:50.68#ibcon#flushed, iclass 34, count 2 2006.229.23:26:50.68#ibcon#about to write, iclass 34, count 2 2006.229.23:26:50.68#ibcon#wrote, iclass 34, count 2 2006.229.23:26:50.68#ibcon#about to read 3, iclass 34, count 2 2006.229.23:26:50.70#ibcon#read 3, iclass 34, count 2 2006.229.23:26:50.70#ibcon#about to read 4, iclass 34, count 2 2006.229.23:26:50.70#ibcon#read 4, iclass 34, count 2 2006.229.23:26:50.70#ibcon#about to read 5, iclass 34, count 2 2006.229.23:26:50.70#ibcon#read 5, iclass 34, count 2 2006.229.23:26:50.70#ibcon#about to read 6, iclass 34, count 2 2006.229.23:26:50.70#ibcon#read 6, iclass 34, count 2 2006.229.23:26:50.70#ibcon#end of sib2, iclass 34, count 2 2006.229.23:26:50.70#ibcon#*mode == 0, iclass 34, count 2 2006.229.23:26:50.70#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.23:26:50.70#ibcon#[25=AT05-04\r\n] 2006.229.23:26:50.70#ibcon#*before write, iclass 34, count 2 2006.229.23:26:50.70#ibcon#enter sib2, iclass 34, count 2 2006.229.23:26:50.70#ibcon#flushed, iclass 34, count 2 2006.229.23:26:50.70#ibcon#about to write, iclass 34, count 2 2006.229.23:26:50.70#ibcon#wrote, iclass 34, count 2 2006.229.23:26:50.70#ibcon#about to read 3, iclass 34, count 2 2006.229.23:26:50.73#ibcon#read 3, iclass 34, count 2 2006.229.23:26:50.73#ibcon#about to read 4, iclass 34, count 2 2006.229.23:26:50.73#ibcon#read 4, iclass 34, count 2 2006.229.23:26:50.73#ibcon#about to read 5, iclass 34, count 2 2006.229.23:26:50.73#ibcon#read 5, iclass 34, count 2 2006.229.23:26:50.73#ibcon#about to read 6, iclass 34, count 2 2006.229.23:26:50.73#ibcon#read 6, iclass 34, count 2 2006.229.23:26:50.73#ibcon#end of sib2, iclass 34, count 2 2006.229.23:26:50.73#ibcon#*after write, iclass 34, count 2 2006.229.23:26:50.73#ibcon#*before return 0, iclass 34, count 2 2006.229.23:26:50.73#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:26:50.73#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:26:50.73#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.23:26:50.73#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:50.73#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:26:50.85#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:26:50.85#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:26:50.85#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:26:50.85#ibcon#first serial, iclass 34, count 0 2006.229.23:26:50.85#ibcon#enter sib2, iclass 34, count 0 2006.229.23:26:50.85#ibcon#flushed, iclass 34, count 0 2006.229.23:26:50.85#ibcon#about to write, iclass 34, count 0 2006.229.23:26:50.85#ibcon#wrote, iclass 34, count 0 2006.229.23:26:50.85#ibcon#about to read 3, iclass 34, count 0 2006.229.23:26:50.87#ibcon#read 3, iclass 34, count 0 2006.229.23:26:50.87#ibcon#about to read 4, iclass 34, count 0 2006.229.23:26:50.87#ibcon#read 4, iclass 34, count 0 2006.229.23:26:50.87#ibcon#about to read 5, iclass 34, count 0 2006.229.23:26:50.87#ibcon#read 5, iclass 34, count 0 2006.229.23:26:50.87#ibcon#about to read 6, iclass 34, count 0 2006.229.23:26:50.87#ibcon#read 6, iclass 34, count 0 2006.229.23:26:50.87#ibcon#end of sib2, iclass 34, count 0 2006.229.23:26:50.87#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:26:50.87#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:26:50.87#ibcon#[25=USB\r\n] 2006.229.23:26:50.87#ibcon#*before write, iclass 34, count 0 2006.229.23:26:50.87#ibcon#enter sib2, iclass 34, count 0 2006.229.23:26:50.87#ibcon#flushed, iclass 34, count 0 2006.229.23:26:50.87#ibcon#about to write, iclass 34, count 0 2006.229.23:26:50.87#ibcon#wrote, iclass 34, count 0 2006.229.23:26:50.87#ibcon#about to read 3, iclass 34, count 0 2006.229.23:26:50.90#ibcon#read 3, iclass 34, count 0 2006.229.23:26:50.90#ibcon#about to read 4, iclass 34, count 0 2006.229.23:26:50.90#ibcon#read 4, iclass 34, count 0 2006.229.23:26:50.90#ibcon#about to read 5, iclass 34, count 0 2006.229.23:26:50.90#ibcon#read 5, iclass 34, count 0 2006.229.23:26:50.90#ibcon#about to read 6, iclass 34, count 0 2006.229.23:26:50.90#ibcon#read 6, iclass 34, count 0 2006.229.23:26:50.90#ibcon#end of sib2, iclass 34, count 0 2006.229.23:26:50.90#ibcon#*after write, iclass 34, count 0 2006.229.23:26:50.90#ibcon#*before return 0, iclass 34, count 0 2006.229.23:26:50.90#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:26:50.90#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:26:50.90#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:26:50.90#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:26:50.90$vck44/valo=6,814.99 2006.229.23:26:50.90#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.23:26:50.90#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.23:26:50.90#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:50.90#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:50.90#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:50.90#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:50.90#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:26:50.90#ibcon#first serial, iclass 36, count 0 2006.229.23:26:50.90#ibcon#enter sib2, iclass 36, count 0 2006.229.23:26:50.90#ibcon#flushed, iclass 36, count 0 2006.229.23:26:50.90#ibcon#about to write, iclass 36, count 0 2006.229.23:26:50.90#ibcon#wrote, iclass 36, count 0 2006.229.23:26:50.90#ibcon#about to read 3, iclass 36, count 0 2006.229.23:26:50.92#ibcon#read 3, iclass 36, count 0 2006.229.23:26:50.92#ibcon#about to read 4, iclass 36, count 0 2006.229.23:26:50.92#ibcon#read 4, iclass 36, count 0 2006.229.23:26:50.92#ibcon#about to read 5, iclass 36, count 0 2006.229.23:26:50.92#ibcon#read 5, iclass 36, count 0 2006.229.23:26:50.92#ibcon#about to read 6, iclass 36, count 0 2006.229.23:26:50.92#ibcon#read 6, iclass 36, count 0 2006.229.23:26:50.92#ibcon#end of sib2, iclass 36, count 0 2006.229.23:26:50.92#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:26:50.92#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:26:50.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:26:50.92#ibcon#*before write, iclass 36, count 0 2006.229.23:26:50.92#ibcon#enter sib2, iclass 36, count 0 2006.229.23:26:50.92#ibcon#flushed, iclass 36, count 0 2006.229.23:26:50.92#ibcon#about to write, iclass 36, count 0 2006.229.23:26:50.92#ibcon#wrote, iclass 36, count 0 2006.229.23:26:50.92#ibcon#about to read 3, iclass 36, count 0 2006.229.23:26:50.96#ibcon#read 3, iclass 36, count 0 2006.229.23:26:50.96#ibcon#about to read 4, iclass 36, count 0 2006.229.23:26:50.96#ibcon#read 4, iclass 36, count 0 2006.229.23:26:50.96#ibcon#about to read 5, iclass 36, count 0 2006.229.23:26:50.96#ibcon#read 5, iclass 36, count 0 2006.229.23:26:50.96#ibcon#about to read 6, iclass 36, count 0 2006.229.23:26:50.96#ibcon#read 6, iclass 36, count 0 2006.229.23:26:50.96#ibcon#end of sib2, iclass 36, count 0 2006.229.23:26:50.96#ibcon#*after write, iclass 36, count 0 2006.229.23:26:50.96#ibcon#*before return 0, iclass 36, count 0 2006.229.23:26:50.96#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:50.96#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:50.96#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:26:50.96#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:26:50.96$vck44/va=6,4 2006.229.23:26:50.96#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.23:26:50.96#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.23:26:50.96#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:50.96#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:51.02#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:51.02#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:51.02#ibcon#enter wrdev, iclass 38, count 2 2006.229.23:26:51.02#ibcon#first serial, iclass 38, count 2 2006.229.23:26:51.02#ibcon#enter sib2, iclass 38, count 2 2006.229.23:26:51.02#ibcon#flushed, iclass 38, count 2 2006.229.23:26:51.02#ibcon#about to write, iclass 38, count 2 2006.229.23:26:51.02#ibcon#wrote, iclass 38, count 2 2006.229.23:26:51.02#ibcon#about to read 3, iclass 38, count 2 2006.229.23:26:51.04#ibcon#read 3, iclass 38, count 2 2006.229.23:26:51.04#ibcon#about to read 4, iclass 38, count 2 2006.229.23:26:51.04#ibcon#read 4, iclass 38, count 2 2006.229.23:26:51.04#ibcon#about to read 5, iclass 38, count 2 2006.229.23:26:51.04#ibcon#read 5, iclass 38, count 2 2006.229.23:26:51.04#ibcon#about to read 6, iclass 38, count 2 2006.229.23:26:51.04#ibcon#read 6, iclass 38, count 2 2006.229.23:26:51.04#ibcon#end of sib2, iclass 38, count 2 2006.229.23:26:51.04#ibcon#*mode == 0, iclass 38, count 2 2006.229.23:26:51.04#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.23:26:51.04#ibcon#[25=AT06-04\r\n] 2006.229.23:26:51.04#ibcon#*before write, iclass 38, count 2 2006.229.23:26:51.04#ibcon#enter sib2, iclass 38, count 2 2006.229.23:26:51.04#ibcon#flushed, iclass 38, count 2 2006.229.23:26:51.04#ibcon#about to write, iclass 38, count 2 2006.229.23:26:51.04#ibcon#wrote, iclass 38, count 2 2006.229.23:26:51.04#ibcon#about to read 3, iclass 38, count 2 2006.229.23:26:51.07#ibcon#read 3, iclass 38, count 2 2006.229.23:26:51.07#ibcon#about to read 4, iclass 38, count 2 2006.229.23:26:51.07#ibcon#read 4, iclass 38, count 2 2006.229.23:26:51.07#ibcon#about to read 5, iclass 38, count 2 2006.229.23:26:51.07#ibcon#read 5, iclass 38, count 2 2006.229.23:26:51.07#ibcon#about to read 6, iclass 38, count 2 2006.229.23:26:51.07#ibcon#read 6, iclass 38, count 2 2006.229.23:26:51.07#ibcon#end of sib2, iclass 38, count 2 2006.229.23:26:51.07#ibcon#*after write, iclass 38, count 2 2006.229.23:26:51.07#ibcon#*before return 0, iclass 38, count 2 2006.229.23:26:51.07#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:51.07#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:51.07#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.23:26:51.07#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:51.07#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:51.19#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:51.19#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:51.19#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:26:51.19#ibcon#first serial, iclass 38, count 0 2006.229.23:26:51.19#ibcon#enter sib2, iclass 38, count 0 2006.229.23:26:51.19#ibcon#flushed, iclass 38, count 0 2006.229.23:26:51.19#ibcon#about to write, iclass 38, count 0 2006.229.23:26:51.19#ibcon#wrote, iclass 38, count 0 2006.229.23:26:51.19#ibcon#about to read 3, iclass 38, count 0 2006.229.23:26:51.21#ibcon#read 3, iclass 38, count 0 2006.229.23:26:51.21#ibcon#about to read 4, iclass 38, count 0 2006.229.23:26:51.21#ibcon#read 4, iclass 38, count 0 2006.229.23:26:51.21#ibcon#about to read 5, iclass 38, count 0 2006.229.23:26:51.21#ibcon#read 5, iclass 38, count 0 2006.229.23:26:51.21#ibcon#about to read 6, iclass 38, count 0 2006.229.23:26:51.21#ibcon#read 6, iclass 38, count 0 2006.229.23:26:51.21#ibcon#end of sib2, iclass 38, count 0 2006.229.23:26:51.21#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:26:51.21#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:26:51.21#ibcon#[25=USB\r\n] 2006.229.23:26:51.21#ibcon#*before write, iclass 38, count 0 2006.229.23:26:51.21#ibcon#enter sib2, iclass 38, count 0 2006.229.23:26:51.21#ibcon#flushed, iclass 38, count 0 2006.229.23:26:51.21#ibcon#about to write, iclass 38, count 0 2006.229.23:26:51.21#ibcon#wrote, iclass 38, count 0 2006.229.23:26:51.21#ibcon#about to read 3, iclass 38, count 0 2006.229.23:26:51.24#ibcon#read 3, iclass 38, count 0 2006.229.23:26:51.24#ibcon#about to read 4, iclass 38, count 0 2006.229.23:26:51.24#ibcon#read 4, iclass 38, count 0 2006.229.23:26:51.24#ibcon#about to read 5, iclass 38, count 0 2006.229.23:26:51.24#ibcon#read 5, iclass 38, count 0 2006.229.23:26:51.24#ibcon#about to read 6, iclass 38, count 0 2006.229.23:26:51.24#ibcon#read 6, iclass 38, count 0 2006.229.23:26:51.24#ibcon#end of sib2, iclass 38, count 0 2006.229.23:26:51.24#ibcon#*after write, iclass 38, count 0 2006.229.23:26:51.24#ibcon#*before return 0, iclass 38, count 0 2006.229.23:26:51.24#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:51.24#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:51.24#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:26:51.24#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:26:51.24$vck44/valo=7,864.99 2006.229.23:26:51.24#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.23:26:51.24#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.23:26:51.24#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:51.24#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:51.24#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:51.24#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:51.24#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:26:51.24#ibcon#first serial, iclass 40, count 0 2006.229.23:26:51.24#ibcon#enter sib2, iclass 40, count 0 2006.229.23:26:51.24#ibcon#flushed, iclass 40, count 0 2006.229.23:26:51.24#ibcon#about to write, iclass 40, count 0 2006.229.23:26:51.24#ibcon#wrote, iclass 40, count 0 2006.229.23:26:51.24#ibcon#about to read 3, iclass 40, count 0 2006.229.23:26:51.26#ibcon#read 3, iclass 40, count 0 2006.229.23:26:51.26#ibcon#about to read 4, iclass 40, count 0 2006.229.23:26:51.26#ibcon#read 4, iclass 40, count 0 2006.229.23:26:51.26#ibcon#about to read 5, iclass 40, count 0 2006.229.23:26:51.26#ibcon#read 5, iclass 40, count 0 2006.229.23:26:51.26#ibcon#about to read 6, iclass 40, count 0 2006.229.23:26:51.26#ibcon#read 6, iclass 40, count 0 2006.229.23:26:51.26#ibcon#end of sib2, iclass 40, count 0 2006.229.23:26:51.26#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:26:51.26#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:26:51.26#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:26:51.26#ibcon#*before write, iclass 40, count 0 2006.229.23:26:51.26#ibcon#enter sib2, iclass 40, count 0 2006.229.23:26:51.26#ibcon#flushed, iclass 40, count 0 2006.229.23:26:51.26#ibcon#about to write, iclass 40, count 0 2006.229.23:26:51.26#ibcon#wrote, iclass 40, count 0 2006.229.23:26:51.26#ibcon#about to read 3, iclass 40, count 0 2006.229.23:26:51.30#ibcon#read 3, iclass 40, count 0 2006.229.23:26:51.30#ibcon#about to read 4, iclass 40, count 0 2006.229.23:26:51.30#ibcon#read 4, iclass 40, count 0 2006.229.23:26:51.30#ibcon#about to read 5, iclass 40, count 0 2006.229.23:26:51.30#ibcon#read 5, iclass 40, count 0 2006.229.23:26:51.30#ibcon#about to read 6, iclass 40, count 0 2006.229.23:26:51.30#ibcon#read 6, iclass 40, count 0 2006.229.23:26:51.30#ibcon#end of sib2, iclass 40, count 0 2006.229.23:26:51.30#ibcon#*after write, iclass 40, count 0 2006.229.23:26:51.30#ibcon#*before return 0, iclass 40, count 0 2006.229.23:26:51.30#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:51.30#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:51.30#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:26:51.30#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:26:51.30$vck44/va=7,5 2006.229.23:26:51.30#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.23:26:51.30#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.23:26:51.30#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:51.30#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:51.36#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:51.36#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:51.36#ibcon#enter wrdev, iclass 4, count 2 2006.229.23:26:51.36#ibcon#first serial, iclass 4, count 2 2006.229.23:26:51.36#ibcon#enter sib2, iclass 4, count 2 2006.229.23:26:51.36#ibcon#flushed, iclass 4, count 2 2006.229.23:26:51.36#ibcon#about to write, iclass 4, count 2 2006.229.23:26:51.36#ibcon#wrote, iclass 4, count 2 2006.229.23:26:51.36#ibcon#about to read 3, iclass 4, count 2 2006.229.23:26:51.38#ibcon#read 3, iclass 4, count 2 2006.229.23:26:51.38#ibcon#about to read 4, iclass 4, count 2 2006.229.23:26:51.38#ibcon#read 4, iclass 4, count 2 2006.229.23:26:51.38#ibcon#about to read 5, iclass 4, count 2 2006.229.23:26:51.38#ibcon#read 5, iclass 4, count 2 2006.229.23:26:51.38#ibcon#about to read 6, iclass 4, count 2 2006.229.23:26:51.38#ibcon#read 6, iclass 4, count 2 2006.229.23:26:51.38#ibcon#end of sib2, iclass 4, count 2 2006.229.23:26:51.38#ibcon#*mode == 0, iclass 4, count 2 2006.229.23:26:51.38#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.23:26:51.38#ibcon#[25=AT07-05\r\n] 2006.229.23:26:51.38#ibcon#*before write, iclass 4, count 2 2006.229.23:26:51.38#ibcon#enter sib2, iclass 4, count 2 2006.229.23:26:51.38#ibcon#flushed, iclass 4, count 2 2006.229.23:26:51.38#ibcon#about to write, iclass 4, count 2 2006.229.23:26:51.38#ibcon#wrote, iclass 4, count 2 2006.229.23:26:51.38#ibcon#about to read 3, iclass 4, count 2 2006.229.23:26:51.41#ibcon#read 3, iclass 4, count 2 2006.229.23:26:51.41#ibcon#about to read 4, iclass 4, count 2 2006.229.23:26:51.41#ibcon#read 4, iclass 4, count 2 2006.229.23:26:51.41#ibcon#about to read 5, iclass 4, count 2 2006.229.23:26:51.41#ibcon#read 5, iclass 4, count 2 2006.229.23:26:51.41#ibcon#about to read 6, iclass 4, count 2 2006.229.23:26:51.41#ibcon#read 6, iclass 4, count 2 2006.229.23:26:51.41#ibcon#end of sib2, iclass 4, count 2 2006.229.23:26:51.41#ibcon#*after write, iclass 4, count 2 2006.229.23:26:51.41#ibcon#*before return 0, iclass 4, count 2 2006.229.23:26:51.41#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:51.41#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:51.41#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.23:26:51.41#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:51.41#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:51.53#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:51.53#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:51.53#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:26:51.53#ibcon#first serial, iclass 4, count 0 2006.229.23:26:51.53#ibcon#enter sib2, iclass 4, count 0 2006.229.23:26:51.53#ibcon#flushed, iclass 4, count 0 2006.229.23:26:51.53#ibcon#about to write, iclass 4, count 0 2006.229.23:26:51.53#ibcon#wrote, iclass 4, count 0 2006.229.23:26:51.53#ibcon#about to read 3, iclass 4, count 0 2006.229.23:26:51.55#ibcon#read 3, iclass 4, count 0 2006.229.23:26:51.55#ibcon#about to read 4, iclass 4, count 0 2006.229.23:26:51.55#ibcon#read 4, iclass 4, count 0 2006.229.23:26:51.55#ibcon#about to read 5, iclass 4, count 0 2006.229.23:26:51.55#ibcon#read 5, iclass 4, count 0 2006.229.23:26:51.55#ibcon#about to read 6, iclass 4, count 0 2006.229.23:26:51.55#ibcon#read 6, iclass 4, count 0 2006.229.23:26:51.55#ibcon#end of sib2, iclass 4, count 0 2006.229.23:26:51.55#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:26:51.55#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:26:51.55#ibcon#[25=USB\r\n] 2006.229.23:26:51.55#ibcon#*before write, iclass 4, count 0 2006.229.23:26:51.55#ibcon#enter sib2, iclass 4, count 0 2006.229.23:26:51.55#ibcon#flushed, iclass 4, count 0 2006.229.23:26:51.55#ibcon#about to write, iclass 4, count 0 2006.229.23:26:51.55#ibcon#wrote, iclass 4, count 0 2006.229.23:26:51.55#ibcon#about to read 3, iclass 4, count 0 2006.229.23:26:51.58#ibcon#read 3, iclass 4, count 0 2006.229.23:26:51.58#ibcon#about to read 4, iclass 4, count 0 2006.229.23:26:51.58#ibcon#read 4, iclass 4, count 0 2006.229.23:26:51.58#ibcon#about to read 5, iclass 4, count 0 2006.229.23:26:51.58#ibcon#read 5, iclass 4, count 0 2006.229.23:26:51.58#ibcon#about to read 6, iclass 4, count 0 2006.229.23:26:51.58#ibcon#read 6, iclass 4, count 0 2006.229.23:26:51.58#ibcon#end of sib2, iclass 4, count 0 2006.229.23:26:51.58#ibcon#*after write, iclass 4, count 0 2006.229.23:26:51.58#ibcon#*before return 0, iclass 4, count 0 2006.229.23:26:51.58#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:51.58#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:51.58#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:26:51.58#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:26:51.58$vck44/valo=8,884.99 2006.229.23:26:51.58#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.23:26:51.58#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.23:26:51.58#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:51.58#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:51.58#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:51.58#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:51.58#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:26:51.58#ibcon#first serial, iclass 6, count 0 2006.229.23:26:51.58#ibcon#enter sib2, iclass 6, count 0 2006.229.23:26:51.58#ibcon#flushed, iclass 6, count 0 2006.229.23:26:51.58#ibcon#about to write, iclass 6, count 0 2006.229.23:26:51.58#ibcon#wrote, iclass 6, count 0 2006.229.23:26:51.58#ibcon#about to read 3, iclass 6, count 0 2006.229.23:26:51.60#ibcon#read 3, iclass 6, count 0 2006.229.23:26:51.60#ibcon#about to read 4, iclass 6, count 0 2006.229.23:26:51.60#ibcon#read 4, iclass 6, count 0 2006.229.23:26:51.60#ibcon#about to read 5, iclass 6, count 0 2006.229.23:26:51.60#ibcon#read 5, iclass 6, count 0 2006.229.23:26:51.60#ibcon#about to read 6, iclass 6, count 0 2006.229.23:26:51.60#ibcon#read 6, iclass 6, count 0 2006.229.23:26:51.60#ibcon#end of sib2, iclass 6, count 0 2006.229.23:26:51.60#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:26:51.60#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:26:51.60#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:26:51.60#ibcon#*before write, iclass 6, count 0 2006.229.23:26:51.60#ibcon#enter sib2, iclass 6, count 0 2006.229.23:26:51.60#ibcon#flushed, iclass 6, count 0 2006.229.23:26:51.60#ibcon#about to write, iclass 6, count 0 2006.229.23:26:51.60#ibcon#wrote, iclass 6, count 0 2006.229.23:26:51.60#ibcon#about to read 3, iclass 6, count 0 2006.229.23:26:51.64#ibcon#read 3, iclass 6, count 0 2006.229.23:26:51.64#ibcon#about to read 4, iclass 6, count 0 2006.229.23:26:51.64#ibcon#read 4, iclass 6, count 0 2006.229.23:26:51.64#ibcon#about to read 5, iclass 6, count 0 2006.229.23:26:51.64#ibcon#read 5, iclass 6, count 0 2006.229.23:26:51.64#ibcon#about to read 6, iclass 6, count 0 2006.229.23:26:51.64#ibcon#read 6, iclass 6, count 0 2006.229.23:26:51.64#ibcon#end of sib2, iclass 6, count 0 2006.229.23:26:51.64#ibcon#*after write, iclass 6, count 0 2006.229.23:26:51.64#ibcon#*before return 0, iclass 6, count 0 2006.229.23:26:51.64#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:51.64#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:51.64#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:26:51.64#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:26:51.64$vck44/va=8,6 2006.229.23:26:51.64#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.23:26:51.64#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.23:26:51.64#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:51.64#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:51.70#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:51.70#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:51.70#ibcon#enter wrdev, iclass 10, count 2 2006.229.23:26:51.70#ibcon#first serial, iclass 10, count 2 2006.229.23:26:51.70#ibcon#enter sib2, iclass 10, count 2 2006.229.23:26:51.70#ibcon#flushed, iclass 10, count 2 2006.229.23:26:51.70#ibcon#about to write, iclass 10, count 2 2006.229.23:26:51.70#ibcon#wrote, iclass 10, count 2 2006.229.23:26:51.70#ibcon#about to read 3, iclass 10, count 2 2006.229.23:26:51.72#ibcon#read 3, iclass 10, count 2 2006.229.23:26:51.72#ibcon#about to read 4, iclass 10, count 2 2006.229.23:26:51.72#ibcon#read 4, iclass 10, count 2 2006.229.23:26:51.72#ibcon#about to read 5, iclass 10, count 2 2006.229.23:26:51.72#ibcon#read 5, iclass 10, count 2 2006.229.23:26:51.72#ibcon#about to read 6, iclass 10, count 2 2006.229.23:26:51.72#ibcon#read 6, iclass 10, count 2 2006.229.23:26:51.72#ibcon#end of sib2, iclass 10, count 2 2006.229.23:26:51.72#ibcon#*mode == 0, iclass 10, count 2 2006.229.23:26:51.72#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.23:26:51.72#ibcon#[25=AT08-06\r\n] 2006.229.23:26:51.72#ibcon#*before write, iclass 10, count 2 2006.229.23:26:51.72#ibcon#enter sib2, iclass 10, count 2 2006.229.23:26:51.72#ibcon#flushed, iclass 10, count 2 2006.229.23:26:51.72#ibcon#about to write, iclass 10, count 2 2006.229.23:26:51.72#ibcon#wrote, iclass 10, count 2 2006.229.23:26:51.72#ibcon#about to read 3, iclass 10, count 2 2006.229.23:26:51.75#ibcon#read 3, iclass 10, count 2 2006.229.23:26:51.75#ibcon#about to read 4, iclass 10, count 2 2006.229.23:26:51.75#ibcon#read 4, iclass 10, count 2 2006.229.23:26:51.75#ibcon#about to read 5, iclass 10, count 2 2006.229.23:26:51.75#ibcon#read 5, iclass 10, count 2 2006.229.23:26:51.75#ibcon#about to read 6, iclass 10, count 2 2006.229.23:26:51.75#ibcon#read 6, iclass 10, count 2 2006.229.23:26:51.75#ibcon#end of sib2, iclass 10, count 2 2006.229.23:26:51.75#ibcon#*after write, iclass 10, count 2 2006.229.23:26:51.75#ibcon#*before return 0, iclass 10, count 2 2006.229.23:26:51.75#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:51.75#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:51.75#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.23:26:51.75#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:51.75#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:51.87#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:51.87#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:51.87#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:26:51.87#ibcon#first serial, iclass 10, count 0 2006.229.23:26:51.87#ibcon#enter sib2, iclass 10, count 0 2006.229.23:26:51.87#ibcon#flushed, iclass 10, count 0 2006.229.23:26:51.87#ibcon#about to write, iclass 10, count 0 2006.229.23:26:51.87#ibcon#wrote, iclass 10, count 0 2006.229.23:26:51.87#ibcon#about to read 3, iclass 10, count 0 2006.229.23:26:51.89#ibcon#read 3, iclass 10, count 0 2006.229.23:26:51.89#ibcon#about to read 4, iclass 10, count 0 2006.229.23:26:51.89#ibcon#read 4, iclass 10, count 0 2006.229.23:26:51.89#ibcon#about to read 5, iclass 10, count 0 2006.229.23:26:51.89#ibcon#read 5, iclass 10, count 0 2006.229.23:26:51.89#ibcon#about to read 6, iclass 10, count 0 2006.229.23:26:51.89#ibcon#read 6, iclass 10, count 0 2006.229.23:26:51.89#ibcon#end of sib2, iclass 10, count 0 2006.229.23:26:51.89#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:26:51.89#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:26:51.89#ibcon#[25=USB\r\n] 2006.229.23:26:51.89#ibcon#*before write, iclass 10, count 0 2006.229.23:26:51.89#ibcon#enter sib2, iclass 10, count 0 2006.229.23:26:51.89#ibcon#flushed, iclass 10, count 0 2006.229.23:26:51.89#ibcon#about to write, iclass 10, count 0 2006.229.23:26:51.89#ibcon#wrote, iclass 10, count 0 2006.229.23:26:51.89#ibcon#about to read 3, iclass 10, count 0 2006.229.23:26:51.92#ibcon#read 3, iclass 10, count 0 2006.229.23:26:51.92#ibcon#about to read 4, iclass 10, count 0 2006.229.23:26:51.92#ibcon#read 4, iclass 10, count 0 2006.229.23:26:51.92#ibcon#about to read 5, iclass 10, count 0 2006.229.23:26:51.92#ibcon#read 5, iclass 10, count 0 2006.229.23:26:51.92#ibcon#about to read 6, iclass 10, count 0 2006.229.23:26:51.92#ibcon#read 6, iclass 10, count 0 2006.229.23:26:51.92#ibcon#end of sib2, iclass 10, count 0 2006.229.23:26:51.92#ibcon#*after write, iclass 10, count 0 2006.229.23:26:51.92#ibcon#*before return 0, iclass 10, count 0 2006.229.23:26:51.92#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:51.92#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:51.92#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:26:51.92#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:26:51.92$vck44/vblo=1,629.99 2006.229.23:26:51.92#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.23:26:51.92#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.23:26:51.92#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:51.92#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:51.92#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:51.92#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:51.92#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:26:51.92#ibcon#first serial, iclass 12, count 0 2006.229.23:26:51.92#ibcon#enter sib2, iclass 12, count 0 2006.229.23:26:51.92#ibcon#flushed, iclass 12, count 0 2006.229.23:26:51.92#ibcon#about to write, iclass 12, count 0 2006.229.23:26:51.92#ibcon#wrote, iclass 12, count 0 2006.229.23:26:51.92#ibcon#about to read 3, iclass 12, count 0 2006.229.23:26:51.94#ibcon#read 3, iclass 12, count 0 2006.229.23:26:51.94#ibcon#about to read 4, iclass 12, count 0 2006.229.23:26:51.94#ibcon#read 4, iclass 12, count 0 2006.229.23:26:51.94#ibcon#about to read 5, iclass 12, count 0 2006.229.23:26:51.94#ibcon#read 5, iclass 12, count 0 2006.229.23:26:51.94#ibcon#about to read 6, iclass 12, count 0 2006.229.23:26:51.94#ibcon#read 6, iclass 12, count 0 2006.229.23:26:51.94#ibcon#end of sib2, iclass 12, count 0 2006.229.23:26:51.94#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:26:51.94#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:26:51.94#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:26:51.94#ibcon#*before write, iclass 12, count 0 2006.229.23:26:51.94#ibcon#enter sib2, iclass 12, count 0 2006.229.23:26:51.94#ibcon#flushed, iclass 12, count 0 2006.229.23:26:51.94#ibcon#about to write, iclass 12, count 0 2006.229.23:26:51.94#ibcon#wrote, iclass 12, count 0 2006.229.23:26:51.94#ibcon#about to read 3, iclass 12, count 0 2006.229.23:26:51.98#ibcon#read 3, iclass 12, count 0 2006.229.23:26:51.98#ibcon#about to read 4, iclass 12, count 0 2006.229.23:26:51.98#ibcon#read 4, iclass 12, count 0 2006.229.23:26:51.98#ibcon#about to read 5, iclass 12, count 0 2006.229.23:26:51.98#ibcon#read 5, iclass 12, count 0 2006.229.23:26:51.98#ibcon#about to read 6, iclass 12, count 0 2006.229.23:26:51.98#ibcon#read 6, iclass 12, count 0 2006.229.23:26:51.98#ibcon#end of sib2, iclass 12, count 0 2006.229.23:26:51.98#ibcon#*after write, iclass 12, count 0 2006.229.23:26:51.98#ibcon#*before return 0, iclass 12, count 0 2006.229.23:26:51.98#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:51.98#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:51.98#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:26:51.98#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:26:51.98$vck44/vb=1,4 2006.229.23:26:51.98#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.23:26:51.98#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.23:26:51.98#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:51.98#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:26:51.98#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:26:51.98#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:26:51.98#ibcon#enter wrdev, iclass 14, count 2 2006.229.23:26:51.98#ibcon#first serial, iclass 14, count 2 2006.229.23:26:51.98#ibcon#enter sib2, iclass 14, count 2 2006.229.23:26:51.98#ibcon#flushed, iclass 14, count 2 2006.229.23:26:51.98#ibcon#about to write, iclass 14, count 2 2006.229.23:26:51.98#ibcon#wrote, iclass 14, count 2 2006.229.23:26:51.98#ibcon#about to read 3, iclass 14, count 2 2006.229.23:26:52.00#ibcon#read 3, iclass 14, count 2 2006.229.23:26:52.00#ibcon#about to read 4, iclass 14, count 2 2006.229.23:26:52.00#ibcon#read 4, iclass 14, count 2 2006.229.23:26:52.00#ibcon#about to read 5, iclass 14, count 2 2006.229.23:26:52.00#ibcon#read 5, iclass 14, count 2 2006.229.23:26:52.00#ibcon#about to read 6, iclass 14, count 2 2006.229.23:26:52.00#ibcon#read 6, iclass 14, count 2 2006.229.23:26:52.00#ibcon#end of sib2, iclass 14, count 2 2006.229.23:26:52.00#ibcon#*mode == 0, iclass 14, count 2 2006.229.23:26:52.00#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.23:26:52.00#ibcon#[27=AT01-04\r\n] 2006.229.23:26:52.00#ibcon#*before write, iclass 14, count 2 2006.229.23:26:52.00#ibcon#enter sib2, iclass 14, count 2 2006.229.23:26:52.00#ibcon#flushed, iclass 14, count 2 2006.229.23:26:52.00#ibcon#about to write, iclass 14, count 2 2006.229.23:26:52.00#ibcon#wrote, iclass 14, count 2 2006.229.23:26:52.00#ibcon#about to read 3, iclass 14, count 2 2006.229.23:26:52.03#ibcon#read 3, iclass 14, count 2 2006.229.23:26:52.03#ibcon#about to read 4, iclass 14, count 2 2006.229.23:26:52.03#ibcon#read 4, iclass 14, count 2 2006.229.23:26:52.03#ibcon#about to read 5, iclass 14, count 2 2006.229.23:26:52.03#ibcon#read 5, iclass 14, count 2 2006.229.23:26:52.03#ibcon#about to read 6, iclass 14, count 2 2006.229.23:26:52.03#ibcon#read 6, iclass 14, count 2 2006.229.23:26:52.03#ibcon#end of sib2, iclass 14, count 2 2006.229.23:26:52.03#ibcon#*after write, iclass 14, count 2 2006.229.23:26:52.03#ibcon#*before return 0, iclass 14, count 2 2006.229.23:26:52.03#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:26:52.03#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:26:52.03#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.23:26:52.03#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:52.03#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:26:52.15#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:26:52.15#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:26:52.15#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:26:52.15#ibcon#first serial, iclass 14, count 0 2006.229.23:26:52.15#ibcon#enter sib2, iclass 14, count 0 2006.229.23:26:52.15#ibcon#flushed, iclass 14, count 0 2006.229.23:26:52.15#ibcon#about to write, iclass 14, count 0 2006.229.23:26:52.15#ibcon#wrote, iclass 14, count 0 2006.229.23:26:52.15#ibcon#about to read 3, iclass 14, count 0 2006.229.23:26:52.17#ibcon#read 3, iclass 14, count 0 2006.229.23:26:52.17#ibcon#about to read 4, iclass 14, count 0 2006.229.23:26:52.17#ibcon#read 4, iclass 14, count 0 2006.229.23:26:52.17#ibcon#about to read 5, iclass 14, count 0 2006.229.23:26:52.17#ibcon#read 5, iclass 14, count 0 2006.229.23:26:52.17#ibcon#about to read 6, iclass 14, count 0 2006.229.23:26:52.17#ibcon#read 6, iclass 14, count 0 2006.229.23:26:52.17#ibcon#end of sib2, iclass 14, count 0 2006.229.23:26:52.17#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:26:52.17#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:26:52.17#ibcon#[27=USB\r\n] 2006.229.23:26:52.17#ibcon#*before write, iclass 14, count 0 2006.229.23:26:52.17#ibcon#enter sib2, iclass 14, count 0 2006.229.23:26:52.17#ibcon#flushed, iclass 14, count 0 2006.229.23:26:52.17#ibcon#about to write, iclass 14, count 0 2006.229.23:26:52.17#ibcon#wrote, iclass 14, count 0 2006.229.23:26:52.17#ibcon#about to read 3, iclass 14, count 0 2006.229.23:26:52.20#ibcon#read 3, iclass 14, count 0 2006.229.23:26:52.20#ibcon#about to read 4, iclass 14, count 0 2006.229.23:26:52.20#ibcon#read 4, iclass 14, count 0 2006.229.23:26:52.20#ibcon#about to read 5, iclass 14, count 0 2006.229.23:26:52.20#ibcon#read 5, iclass 14, count 0 2006.229.23:26:52.20#ibcon#about to read 6, iclass 14, count 0 2006.229.23:26:52.20#ibcon#read 6, iclass 14, count 0 2006.229.23:26:52.20#ibcon#end of sib2, iclass 14, count 0 2006.229.23:26:52.20#ibcon#*after write, iclass 14, count 0 2006.229.23:26:52.20#ibcon#*before return 0, iclass 14, count 0 2006.229.23:26:52.20#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:26:52.20#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:26:52.20#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:26:52.20#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:26:52.20$vck44/vblo=2,634.99 2006.229.23:26:52.20#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.23:26:52.20#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.23:26:52.20#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:52.20#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:52.20#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:52.20#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:52.20#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:26:52.20#ibcon#first serial, iclass 16, count 0 2006.229.23:26:52.20#ibcon#enter sib2, iclass 16, count 0 2006.229.23:26:52.20#ibcon#flushed, iclass 16, count 0 2006.229.23:26:52.20#ibcon#about to write, iclass 16, count 0 2006.229.23:26:52.20#ibcon#wrote, iclass 16, count 0 2006.229.23:26:52.20#ibcon#about to read 3, iclass 16, count 0 2006.229.23:26:52.22#ibcon#read 3, iclass 16, count 0 2006.229.23:26:52.22#ibcon#about to read 4, iclass 16, count 0 2006.229.23:26:52.22#ibcon#read 4, iclass 16, count 0 2006.229.23:26:52.22#ibcon#about to read 5, iclass 16, count 0 2006.229.23:26:52.22#ibcon#read 5, iclass 16, count 0 2006.229.23:26:52.22#ibcon#about to read 6, iclass 16, count 0 2006.229.23:26:52.22#ibcon#read 6, iclass 16, count 0 2006.229.23:26:52.22#ibcon#end of sib2, iclass 16, count 0 2006.229.23:26:52.22#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:26:52.22#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:26:52.22#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:26:52.22#ibcon#*before write, iclass 16, count 0 2006.229.23:26:52.22#ibcon#enter sib2, iclass 16, count 0 2006.229.23:26:52.22#ibcon#flushed, iclass 16, count 0 2006.229.23:26:52.22#ibcon#about to write, iclass 16, count 0 2006.229.23:26:52.22#ibcon#wrote, iclass 16, count 0 2006.229.23:26:52.22#ibcon#about to read 3, iclass 16, count 0 2006.229.23:26:52.26#ibcon#read 3, iclass 16, count 0 2006.229.23:26:52.26#ibcon#about to read 4, iclass 16, count 0 2006.229.23:26:52.26#ibcon#read 4, iclass 16, count 0 2006.229.23:26:52.26#ibcon#about to read 5, iclass 16, count 0 2006.229.23:26:52.26#ibcon#read 5, iclass 16, count 0 2006.229.23:26:52.26#ibcon#about to read 6, iclass 16, count 0 2006.229.23:26:52.26#ibcon#read 6, iclass 16, count 0 2006.229.23:26:52.26#ibcon#end of sib2, iclass 16, count 0 2006.229.23:26:52.26#ibcon#*after write, iclass 16, count 0 2006.229.23:26:52.26#ibcon#*before return 0, iclass 16, count 0 2006.229.23:26:52.26#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:52.26#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:26:52.26#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:26:52.26#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:26:52.26$vck44/vb=2,4 2006.229.23:26:52.26#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.23:26:52.26#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.23:26:52.26#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:52.26#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:52.32#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:52.32#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:52.32#ibcon#enter wrdev, iclass 18, count 2 2006.229.23:26:52.32#ibcon#first serial, iclass 18, count 2 2006.229.23:26:52.32#ibcon#enter sib2, iclass 18, count 2 2006.229.23:26:52.32#ibcon#flushed, iclass 18, count 2 2006.229.23:26:52.32#ibcon#about to write, iclass 18, count 2 2006.229.23:26:52.32#ibcon#wrote, iclass 18, count 2 2006.229.23:26:52.32#ibcon#about to read 3, iclass 18, count 2 2006.229.23:26:52.34#ibcon#read 3, iclass 18, count 2 2006.229.23:26:52.34#ibcon#about to read 4, iclass 18, count 2 2006.229.23:26:52.34#ibcon#read 4, iclass 18, count 2 2006.229.23:26:52.34#ibcon#about to read 5, iclass 18, count 2 2006.229.23:26:52.34#ibcon#read 5, iclass 18, count 2 2006.229.23:26:52.34#ibcon#about to read 6, iclass 18, count 2 2006.229.23:26:52.34#ibcon#read 6, iclass 18, count 2 2006.229.23:26:52.34#ibcon#end of sib2, iclass 18, count 2 2006.229.23:26:52.34#ibcon#*mode == 0, iclass 18, count 2 2006.229.23:26:52.34#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.23:26:52.34#ibcon#[27=AT02-04\r\n] 2006.229.23:26:52.34#ibcon#*before write, iclass 18, count 2 2006.229.23:26:52.34#ibcon#enter sib2, iclass 18, count 2 2006.229.23:26:52.34#ibcon#flushed, iclass 18, count 2 2006.229.23:26:52.34#ibcon#about to write, iclass 18, count 2 2006.229.23:26:52.34#ibcon#wrote, iclass 18, count 2 2006.229.23:26:52.34#ibcon#about to read 3, iclass 18, count 2 2006.229.23:26:52.37#ibcon#read 3, iclass 18, count 2 2006.229.23:26:52.37#ibcon#about to read 4, iclass 18, count 2 2006.229.23:26:52.37#ibcon#read 4, iclass 18, count 2 2006.229.23:26:52.37#ibcon#about to read 5, iclass 18, count 2 2006.229.23:26:52.37#ibcon#read 5, iclass 18, count 2 2006.229.23:26:52.37#ibcon#about to read 6, iclass 18, count 2 2006.229.23:26:52.37#ibcon#read 6, iclass 18, count 2 2006.229.23:26:52.37#ibcon#end of sib2, iclass 18, count 2 2006.229.23:26:52.37#ibcon#*after write, iclass 18, count 2 2006.229.23:26:52.37#ibcon#*before return 0, iclass 18, count 2 2006.229.23:26:52.37#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:52.37#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:26:52.37#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.23:26:52.37#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:52.37#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:52.49#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:52.49#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:52.49#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:26:52.49#ibcon#first serial, iclass 18, count 0 2006.229.23:26:52.49#ibcon#enter sib2, iclass 18, count 0 2006.229.23:26:52.49#ibcon#flushed, iclass 18, count 0 2006.229.23:26:52.49#ibcon#about to write, iclass 18, count 0 2006.229.23:26:52.49#ibcon#wrote, iclass 18, count 0 2006.229.23:26:52.49#ibcon#about to read 3, iclass 18, count 0 2006.229.23:26:52.51#ibcon#read 3, iclass 18, count 0 2006.229.23:26:52.51#ibcon#about to read 4, iclass 18, count 0 2006.229.23:26:52.51#ibcon#read 4, iclass 18, count 0 2006.229.23:26:52.51#ibcon#about to read 5, iclass 18, count 0 2006.229.23:26:52.51#ibcon#read 5, iclass 18, count 0 2006.229.23:26:52.51#ibcon#about to read 6, iclass 18, count 0 2006.229.23:26:52.51#ibcon#read 6, iclass 18, count 0 2006.229.23:26:52.51#ibcon#end of sib2, iclass 18, count 0 2006.229.23:26:52.51#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:26:52.51#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:26:52.51#ibcon#[27=USB\r\n] 2006.229.23:26:52.51#ibcon#*before write, iclass 18, count 0 2006.229.23:26:52.51#ibcon#enter sib2, iclass 18, count 0 2006.229.23:26:52.51#ibcon#flushed, iclass 18, count 0 2006.229.23:26:52.51#ibcon#about to write, iclass 18, count 0 2006.229.23:26:52.51#ibcon#wrote, iclass 18, count 0 2006.229.23:26:52.51#ibcon#about to read 3, iclass 18, count 0 2006.229.23:26:52.54#ibcon#read 3, iclass 18, count 0 2006.229.23:26:52.54#ibcon#about to read 4, iclass 18, count 0 2006.229.23:26:52.54#ibcon#read 4, iclass 18, count 0 2006.229.23:26:52.54#ibcon#about to read 5, iclass 18, count 0 2006.229.23:26:52.54#ibcon#read 5, iclass 18, count 0 2006.229.23:26:52.54#ibcon#about to read 6, iclass 18, count 0 2006.229.23:26:52.54#ibcon#read 6, iclass 18, count 0 2006.229.23:26:52.54#ibcon#end of sib2, iclass 18, count 0 2006.229.23:26:52.54#ibcon#*after write, iclass 18, count 0 2006.229.23:26:52.54#ibcon#*before return 0, iclass 18, count 0 2006.229.23:26:52.54#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:52.54#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:26:52.54#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:26:52.54#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:26:52.54$vck44/vblo=3,649.99 2006.229.23:26:52.54#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.23:26:52.54#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.23:26:52.54#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:52.54#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:52.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:52.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:52.54#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:26:52.54#ibcon#first serial, iclass 20, count 0 2006.229.23:26:52.54#ibcon#enter sib2, iclass 20, count 0 2006.229.23:26:52.54#ibcon#flushed, iclass 20, count 0 2006.229.23:26:52.54#ibcon#about to write, iclass 20, count 0 2006.229.23:26:52.54#ibcon#wrote, iclass 20, count 0 2006.229.23:26:52.54#ibcon#about to read 3, iclass 20, count 0 2006.229.23:26:52.56#ibcon#read 3, iclass 20, count 0 2006.229.23:26:52.56#ibcon#about to read 4, iclass 20, count 0 2006.229.23:26:52.56#ibcon#read 4, iclass 20, count 0 2006.229.23:26:52.56#ibcon#about to read 5, iclass 20, count 0 2006.229.23:26:52.56#ibcon#read 5, iclass 20, count 0 2006.229.23:26:52.56#ibcon#about to read 6, iclass 20, count 0 2006.229.23:26:52.56#ibcon#read 6, iclass 20, count 0 2006.229.23:26:52.56#ibcon#end of sib2, iclass 20, count 0 2006.229.23:26:52.56#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:26:52.56#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:26:52.56#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:26:52.56#ibcon#*before write, iclass 20, count 0 2006.229.23:26:52.56#ibcon#enter sib2, iclass 20, count 0 2006.229.23:26:52.56#ibcon#flushed, iclass 20, count 0 2006.229.23:26:52.56#ibcon#about to write, iclass 20, count 0 2006.229.23:26:52.56#ibcon#wrote, iclass 20, count 0 2006.229.23:26:52.56#ibcon#about to read 3, iclass 20, count 0 2006.229.23:26:52.60#ibcon#read 3, iclass 20, count 0 2006.229.23:26:52.60#ibcon#about to read 4, iclass 20, count 0 2006.229.23:26:52.60#ibcon#read 4, iclass 20, count 0 2006.229.23:26:52.60#ibcon#about to read 5, iclass 20, count 0 2006.229.23:26:52.60#ibcon#read 5, iclass 20, count 0 2006.229.23:26:52.60#ibcon#about to read 6, iclass 20, count 0 2006.229.23:26:52.60#ibcon#read 6, iclass 20, count 0 2006.229.23:26:52.60#ibcon#end of sib2, iclass 20, count 0 2006.229.23:26:52.60#ibcon#*after write, iclass 20, count 0 2006.229.23:26:52.60#ibcon#*before return 0, iclass 20, count 0 2006.229.23:26:52.60#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:52.60#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:26:52.60#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:26:52.60#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:26:52.60$vck44/vb=3,4 2006.229.23:26:52.60#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.23:26:52.60#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.23:26:52.60#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:52.60#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:52.66#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:52.66#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:52.66#ibcon#enter wrdev, iclass 22, count 2 2006.229.23:26:52.66#ibcon#first serial, iclass 22, count 2 2006.229.23:26:52.66#ibcon#enter sib2, iclass 22, count 2 2006.229.23:26:52.66#ibcon#flushed, iclass 22, count 2 2006.229.23:26:52.66#ibcon#about to write, iclass 22, count 2 2006.229.23:26:52.66#ibcon#wrote, iclass 22, count 2 2006.229.23:26:52.66#ibcon#about to read 3, iclass 22, count 2 2006.229.23:26:52.68#ibcon#read 3, iclass 22, count 2 2006.229.23:26:52.68#ibcon#about to read 4, iclass 22, count 2 2006.229.23:26:52.68#ibcon#read 4, iclass 22, count 2 2006.229.23:26:52.68#ibcon#about to read 5, iclass 22, count 2 2006.229.23:26:52.68#ibcon#read 5, iclass 22, count 2 2006.229.23:26:52.68#ibcon#about to read 6, iclass 22, count 2 2006.229.23:26:52.68#ibcon#read 6, iclass 22, count 2 2006.229.23:26:52.68#ibcon#end of sib2, iclass 22, count 2 2006.229.23:26:52.68#ibcon#*mode == 0, iclass 22, count 2 2006.229.23:26:52.68#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.23:26:52.68#ibcon#[27=AT03-04\r\n] 2006.229.23:26:52.68#ibcon#*before write, iclass 22, count 2 2006.229.23:26:52.68#ibcon#enter sib2, iclass 22, count 2 2006.229.23:26:52.68#ibcon#flushed, iclass 22, count 2 2006.229.23:26:52.68#ibcon#about to write, iclass 22, count 2 2006.229.23:26:52.68#ibcon#wrote, iclass 22, count 2 2006.229.23:26:52.68#ibcon#about to read 3, iclass 22, count 2 2006.229.23:26:52.71#ibcon#read 3, iclass 22, count 2 2006.229.23:26:52.71#ibcon#about to read 4, iclass 22, count 2 2006.229.23:26:52.71#ibcon#read 4, iclass 22, count 2 2006.229.23:26:52.71#ibcon#about to read 5, iclass 22, count 2 2006.229.23:26:52.71#ibcon#read 5, iclass 22, count 2 2006.229.23:26:52.71#ibcon#about to read 6, iclass 22, count 2 2006.229.23:26:52.71#ibcon#read 6, iclass 22, count 2 2006.229.23:26:52.71#ibcon#end of sib2, iclass 22, count 2 2006.229.23:26:52.71#ibcon#*after write, iclass 22, count 2 2006.229.23:26:52.71#ibcon#*before return 0, iclass 22, count 2 2006.229.23:26:52.71#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:52.71#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:26:52.71#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.23:26:52.71#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:52.71#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:52.83#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:52.83#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:52.83#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:26:52.83#ibcon#first serial, iclass 22, count 0 2006.229.23:26:52.83#ibcon#enter sib2, iclass 22, count 0 2006.229.23:26:52.83#ibcon#flushed, iclass 22, count 0 2006.229.23:26:52.83#ibcon#about to write, iclass 22, count 0 2006.229.23:26:52.83#ibcon#wrote, iclass 22, count 0 2006.229.23:26:52.83#ibcon#about to read 3, iclass 22, count 0 2006.229.23:26:52.85#ibcon#read 3, iclass 22, count 0 2006.229.23:26:52.85#ibcon#about to read 4, iclass 22, count 0 2006.229.23:26:52.85#ibcon#read 4, iclass 22, count 0 2006.229.23:26:52.85#ibcon#about to read 5, iclass 22, count 0 2006.229.23:26:52.85#ibcon#read 5, iclass 22, count 0 2006.229.23:26:52.85#ibcon#about to read 6, iclass 22, count 0 2006.229.23:26:52.85#ibcon#read 6, iclass 22, count 0 2006.229.23:26:52.85#ibcon#end of sib2, iclass 22, count 0 2006.229.23:26:52.85#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:26:52.85#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:26:52.85#ibcon#[27=USB\r\n] 2006.229.23:26:52.85#ibcon#*before write, iclass 22, count 0 2006.229.23:26:52.85#ibcon#enter sib2, iclass 22, count 0 2006.229.23:26:52.85#ibcon#flushed, iclass 22, count 0 2006.229.23:26:52.85#ibcon#about to write, iclass 22, count 0 2006.229.23:26:52.85#ibcon#wrote, iclass 22, count 0 2006.229.23:26:52.85#ibcon#about to read 3, iclass 22, count 0 2006.229.23:26:52.88#ibcon#read 3, iclass 22, count 0 2006.229.23:26:52.88#ibcon#about to read 4, iclass 22, count 0 2006.229.23:26:52.88#ibcon#read 4, iclass 22, count 0 2006.229.23:26:52.88#ibcon#about to read 5, iclass 22, count 0 2006.229.23:26:52.88#ibcon#read 5, iclass 22, count 0 2006.229.23:26:52.88#ibcon#about to read 6, iclass 22, count 0 2006.229.23:26:52.88#ibcon#read 6, iclass 22, count 0 2006.229.23:26:52.88#ibcon#end of sib2, iclass 22, count 0 2006.229.23:26:52.88#ibcon#*after write, iclass 22, count 0 2006.229.23:26:52.88#ibcon#*before return 0, iclass 22, count 0 2006.229.23:26:52.88#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:52.88#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:26:52.88#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:26:52.88#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:26:52.88$vck44/vblo=4,679.99 2006.229.23:26:52.88#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.23:26:52.88#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.23:26:52.88#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:52.88#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:52.88#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:52.88#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:52.88#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:26:52.88#ibcon#first serial, iclass 24, count 0 2006.229.23:26:52.88#ibcon#enter sib2, iclass 24, count 0 2006.229.23:26:52.88#ibcon#flushed, iclass 24, count 0 2006.229.23:26:52.88#ibcon#about to write, iclass 24, count 0 2006.229.23:26:52.88#ibcon#wrote, iclass 24, count 0 2006.229.23:26:52.88#ibcon#about to read 3, iclass 24, count 0 2006.229.23:26:52.90#ibcon#read 3, iclass 24, count 0 2006.229.23:26:52.90#ibcon#about to read 4, iclass 24, count 0 2006.229.23:26:52.90#ibcon#read 4, iclass 24, count 0 2006.229.23:26:52.90#ibcon#about to read 5, iclass 24, count 0 2006.229.23:26:52.90#ibcon#read 5, iclass 24, count 0 2006.229.23:26:52.90#ibcon#about to read 6, iclass 24, count 0 2006.229.23:26:52.90#ibcon#read 6, iclass 24, count 0 2006.229.23:26:52.90#ibcon#end of sib2, iclass 24, count 0 2006.229.23:26:52.90#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:26:52.90#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:26:52.90#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:26:52.90#ibcon#*before write, iclass 24, count 0 2006.229.23:26:52.90#ibcon#enter sib2, iclass 24, count 0 2006.229.23:26:52.90#ibcon#flushed, iclass 24, count 0 2006.229.23:26:52.90#ibcon#about to write, iclass 24, count 0 2006.229.23:26:52.90#ibcon#wrote, iclass 24, count 0 2006.229.23:26:52.90#ibcon#about to read 3, iclass 24, count 0 2006.229.23:26:52.94#ibcon#read 3, iclass 24, count 0 2006.229.23:26:52.94#ibcon#about to read 4, iclass 24, count 0 2006.229.23:26:52.94#ibcon#read 4, iclass 24, count 0 2006.229.23:26:52.94#ibcon#about to read 5, iclass 24, count 0 2006.229.23:26:52.94#ibcon#read 5, iclass 24, count 0 2006.229.23:26:52.94#ibcon#about to read 6, iclass 24, count 0 2006.229.23:26:52.94#ibcon#read 6, iclass 24, count 0 2006.229.23:26:52.94#ibcon#end of sib2, iclass 24, count 0 2006.229.23:26:52.94#ibcon#*after write, iclass 24, count 0 2006.229.23:26:52.94#ibcon#*before return 0, iclass 24, count 0 2006.229.23:26:52.94#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:52.94#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:26:52.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:26:52.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:26:52.94$vck44/vb=4,4 2006.229.23:26:52.94#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.23:26:52.94#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.23:26:52.94#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:52.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:53.00#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:53.00#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:53.00#ibcon#enter wrdev, iclass 26, count 2 2006.229.23:26:53.00#ibcon#first serial, iclass 26, count 2 2006.229.23:26:53.00#ibcon#enter sib2, iclass 26, count 2 2006.229.23:26:53.00#ibcon#flushed, iclass 26, count 2 2006.229.23:26:53.00#ibcon#about to write, iclass 26, count 2 2006.229.23:26:53.00#ibcon#wrote, iclass 26, count 2 2006.229.23:26:53.00#ibcon#about to read 3, iclass 26, count 2 2006.229.23:26:53.02#ibcon#read 3, iclass 26, count 2 2006.229.23:26:53.02#ibcon#about to read 4, iclass 26, count 2 2006.229.23:26:53.02#ibcon#read 4, iclass 26, count 2 2006.229.23:26:53.02#ibcon#about to read 5, iclass 26, count 2 2006.229.23:26:53.02#ibcon#read 5, iclass 26, count 2 2006.229.23:26:53.02#ibcon#about to read 6, iclass 26, count 2 2006.229.23:26:53.02#ibcon#read 6, iclass 26, count 2 2006.229.23:26:53.02#ibcon#end of sib2, iclass 26, count 2 2006.229.23:26:53.02#ibcon#*mode == 0, iclass 26, count 2 2006.229.23:26:53.02#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.23:26:53.02#ibcon#[27=AT04-04\r\n] 2006.229.23:26:53.02#ibcon#*before write, iclass 26, count 2 2006.229.23:26:53.02#ibcon#enter sib2, iclass 26, count 2 2006.229.23:26:53.02#ibcon#flushed, iclass 26, count 2 2006.229.23:26:53.02#ibcon#about to write, iclass 26, count 2 2006.229.23:26:53.02#ibcon#wrote, iclass 26, count 2 2006.229.23:26:53.02#ibcon#about to read 3, iclass 26, count 2 2006.229.23:26:53.05#ibcon#read 3, iclass 26, count 2 2006.229.23:26:53.05#ibcon#about to read 4, iclass 26, count 2 2006.229.23:26:53.05#ibcon#read 4, iclass 26, count 2 2006.229.23:26:53.05#ibcon#about to read 5, iclass 26, count 2 2006.229.23:26:53.05#ibcon#read 5, iclass 26, count 2 2006.229.23:26:53.05#ibcon#about to read 6, iclass 26, count 2 2006.229.23:26:53.05#ibcon#read 6, iclass 26, count 2 2006.229.23:26:53.05#ibcon#end of sib2, iclass 26, count 2 2006.229.23:26:53.05#ibcon#*after write, iclass 26, count 2 2006.229.23:26:53.05#ibcon#*before return 0, iclass 26, count 2 2006.229.23:26:53.05#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:53.05#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:26:53.05#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.23:26:53.05#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:53.05#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:53.17#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:53.17#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:53.17#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:26:53.17#ibcon#first serial, iclass 26, count 0 2006.229.23:26:53.17#ibcon#enter sib2, iclass 26, count 0 2006.229.23:26:53.17#ibcon#flushed, iclass 26, count 0 2006.229.23:26:53.17#ibcon#about to write, iclass 26, count 0 2006.229.23:26:53.17#ibcon#wrote, iclass 26, count 0 2006.229.23:26:53.17#ibcon#about to read 3, iclass 26, count 0 2006.229.23:26:53.19#ibcon#read 3, iclass 26, count 0 2006.229.23:26:53.19#ibcon#about to read 4, iclass 26, count 0 2006.229.23:26:53.19#ibcon#read 4, iclass 26, count 0 2006.229.23:26:53.19#ibcon#about to read 5, iclass 26, count 0 2006.229.23:26:53.19#ibcon#read 5, iclass 26, count 0 2006.229.23:26:53.19#ibcon#about to read 6, iclass 26, count 0 2006.229.23:26:53.19#ibcon#read 6, iclass 26, count 0 2006.229.23:26:53.19#ibcon#end of sib2, iclass 26, count 0 2006.229.23:26:53.19#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:26:53.19#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:26:53.19#ibcon#[27=USB\r\n] 2006.229.23:26:53.19#ibcon#*before write, iclass 26, count 0 2006.229.23:26:53.19#ibcon#enter sib2, iclass 26, count 0 2006.229.23:26:53.19#ibcon#flushed, iclass 26, count 0 2006.229.23:26:53.19#ibcon#about to write, iclass 26, count 0 2006.229.23:26:53.19#ibcon#wrote, iclass 26, count 0 2006.229.23:26:53.19#ibcon#about to read 3, iclass 26, count 0 2006.229.23:26:53.22#ibcon#read 3, iclass 26, count 0 2006.229.23:26:53.22#ibcon#about to read 4, iclass 26, count 0 2006.229.23:26:53.22#ibcon#read 4, iclass 26, count 0 2006.229.23:26:53.22#ibcon#about to read 5, iclass 26, count 0 2006.229.23:26:53.22#ibcon#read 5, iclass 26, count 0 2006.229.23:26:53.22#ibcon#about to read 6, iclass 26, count 0 2006.229.23:26:53.22#ibcon#read 6, iclass 26, count 0 2006.229.23:26:53.22#ibcon#end of sib2, iclass 26, count 0 2006.229.23:26:53.22#ibcon#*after write, iclass 26, count 0 2006.229.23:26:53.22#ibcon#*before return 0, iclass 26, count 0 2006.229.23:26:53.22#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:53.22#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:26:53.22#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:26:53.22#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:26:53.22$vck44/vblo=5,709.99 2006.229.23:26:53.22#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.23:26:53.22#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.23:26:53.22#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:53.22#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:53.22#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:53.22#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:53.22#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:26:53.22#ibcon#first serial, iclass 28, count 0 2006.229.23:26:53.22#ibcon#enter sib2, iclass 28, count 0 2006.229.23:26:53.22#ibcon#flushed, iclass 28, count 0 2006.229.23:26:53.22#ibcon#about to write, iclass 28, count 0 2006.229.23:26:53.22#ibcon#wrote, iclass 28, count 0 2006.229.23:26:53.22#ibcon#about to read 3, iclass 28, count 0 2006.229.23:26:53.24#ibcon#read 3, iclass 28, count 0 2006.229.23:26:53.24#ibcon#about to read 4, iclass 28, count 0 2006.229.23:26:53.24#ibcon#read 4, iclass 28, count 0 2006.229.23:26:53.24#ibcon#about to read 5, iclass 28, count 0 2006.229.23:26:53.24#ibcon#read 5, iclass 28, count 0 2006.229.23:26:53.24#ibcon#about to read 6, iclass 28, count 0 2006.229.23:26:53.24#ibcon#read 6, iclass 28, count 0 2006.229.23:26:53.24#ibcon#end of sib2, iclass 28, count 0 2006.229.23:26:53.24#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:26:53.24#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:26:53.24#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:26:53.24#ibcon#*before write, iclass 28, count 0 2006.229.23:26:53.24#ibcon#enter sib2, iclass 28, count 0 2006.229.23:26:53.24#ibcon#flushed, iclass 28, count 0 2006.229.23:26:53.24#ibcon#about to write, iclass 28, count 0 2006.229.23:26:53.24#ibcon#wrote, iclass 28, count 0 2006.229.23:26:53.24#ibcon#about to read 3, iclass 28, count 0 2006.229.23:26:53.28#ibcon#read 3, iclass 28, count 0 2006.229.23:26:53.28#ibcon#about to read 4, iclass 28, count 0 2006.229.23:26:53.28#ibcon#read 4, iclass 28, count 0 2006.229.23:26:53.28#ibcon#about to read 5, iclass 28, count 0 2006.229.23:26:53.28#ibcon#read 5, iclass 28, count 0 2006.229.23:26:53.28#ibcon#about to read 6, iclass 28, count 0 2006.229.23:26:53.28#ibcon#read 6, iclass 28, count 0 2006.229.23:26:53.28#ibcon#end of sib2, iclass 28, count 0 2006.229.23:26:53.28#ibcon#*after write, iclass 28, count 0 2006.229.23:26:53.28#ibcon#*before return 0, iclass 28, count 0 2006.229.23:26:53.28#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:53.28#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:26:53.28#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:26:53.28#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:26:53.28$vck44/vb=5,4 2006.229.23:26:53.28#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.23:26:53.28#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.23:26:53.28#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:53.28#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:53.34#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:53.34#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:53.34#ibcon#enter wrdev, iclass 30, count 2 2006.229.23:26:53.34#ibcon#first serial, iclass 30, count 2 2006.229.23:26:53.34#ibcon#enter sib2, iclass 30, count 2 2006.229.23:26:53.34#ibcon#flushed, iclass 30, count 2 2006.229.23:26:53.34#ibcon#about to write, iclass 30, count 2 2006.229.23:26:53.34#ibcon#wrote, iclass 30, count 2 2006.229.23:26:53.34#ibcon#about to read 3, iclass 30, count 2 2006.229.23:26:53.36#ibcon#read 3, iclass 30, count 2 2006.229.23:26:53.36#ibcon#about to read 4, iclass 30, count 2 2006.229.23:26:53.36#ibcon#read 4, iclass 30, count 2 2006.229.23:26:53.36#ibcon#about to read 5, iclass 30, count 2 2006.229.23:26:53.36#ibcon#read 5, iclass 30, count 2 2006.229.23:26:53.36#ibcon#about to read 6, iclass 30, count 2 2006.229.23:26:53.36#ibcon#read 6, iclass 30, count 2 2006.229.23:26:53.36#ibcon#end of sib2, iclass 30, count 2 2006.229.23:26:53.36#ibcon#*mode == 0, iclass 30, count 2 2006.229.23:26:53.36#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.23:26:53.36#ibcon#[27=AT05-04\r\n] 2006.229.23:26:53.36#ibcon#*before write, iclass 30, count 2 2006.229.23:26:53.36#ibcon#enter sib2, iclass 30, count 2 2006.229.23:26:53.36#ibcon#flushed, iclass 30, count 2 2006.229.23:26:53.36#ibcon#about to write, iclass 30, count 2 2006.229.23:26:53.36#ibcon#wrote, iclass 30, count 2 2006.229.23:26:53.36#ibcon#about to read 3, iclass 30, count 2 2006.229.23:26:53.39#ibcon#read 3, iclass 30, count 2 2006.229.23:26:53.39#ibcon#about to read 4, iclass 30, count 2 2006.229.23:26:53.39#ibcon#read 4, iclass 30, count 2 2006.229.23:26:53.39#ibcon#about to read 5, iclass 30, count 2 2006.229.23:26:53.39#ibcon#read 5, iclass 30, count 2 2006.229.23:26:53.39#ibcon#about to read 6, iclass 30, count 2 2006.229.23:26:53.39#ibcon#read 6, iclass 30, count 2 2006.229.23:26:53.39#ibcon#end of sib2, iclass 30, count 2 2006.229.23:26:53.39#ibcon#*after write, iclass 30, count 2 2006.229.23:26:53.39#ibcon#*before return 0, iclass 30, count 2 2006.229.23:26:53.39#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:53.39#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:26:53.39#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.23:26:53.39#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:53.39#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:53.45#abcon#<5=/08 1.2 3.7 29.87 811002.7\r\n> 2006.229.23:26:53.47#abcon#{5=INTERFACE CLEAR} 2006.229.23:26:53.51#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:53.51#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:53.51#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:26:53.51#ibcon#first serial, iclass 30, count 0 2006.229.23:26:53.51#ibcon#enter sib2, iclass 30, count 0 2006.229.23:26:53.51#ibcon#flushed, iclass 30, count 0 2006.229.23:26:53.51#ibcon#about to write, iclass 30, count 0 2006.229.23:26:53.51#ibcon#wrote, iclass 30, count 0 2006.229.23:26:53.51#ibcon#about to read 3, iclass 30, count 0 2006.229.23:26:53.53#ibcon#read 3, iclass 30, count 0 2006.229.23:26:53.53#ibcon#about to read 4, iclass 30, count 0 2006.229.23:26:53.53#ibcon#read 4, iclass 30, count 0 2006.229.23:26:53.53#ibcon#about to read 5, iclass 30, count 0 2006.229.23:26:53.53#ibcon#read 5, iclass 30, count 0 2006.229.23:26:53.53#ibcon#about to read 6, iclass 30, count 0 2006.229.23:26:53.53#ibcon#read 6, iclass 30, count 0 2006.229.23:26:53.53#ibcon#end of sib2, iclass 30, count 0 2006.229.23:26:53.53#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:26:53.53#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:26:53.53#ibcon#[27=USB\r\n] 2006.229.23:26:53.53#ibcon#*before write, iclass 30, count 0 2006.229.23:26:53.53#ibcon#enter sib2, iclass 30, count 0 2006.229.23:26:53.53#ibcon#flushed, iclass 30, count 0 2006.229.23:26:53.53#ibcon#about to write, iclass 30, count 0 2006.229.23:26:53.53#ibcon#wrote, iclass 30, count 0 2006.229.23:26:53.53#ibcon#about to read 3, iclass 30, count 0 2006.229.23:26:53.53#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:26:53.56#ibcon#read 3, iclass 30, count 0 2006.229.23:26:53.56#ibcon#about to read 4, iclass 30, count 0 2006.229.23:26:53.56#ibcon#read 4, iclass 30, count 0 2006.229.23:26:53.56#ibcon#about to read 5, iclass 30, count 0 2006.229.23:26:53.56#ibcon#read 5, iclass 30, count 0 2006.229.23:26:53.56#ibcon#about to read 6, iclass 30, count 0 2006.229.23:26:53.56#ibcon#read 6, iclass 30, count 0 2006.229.23:26:53.56#ibcon#end of sib2, iclass 30, count 0 2006.229.23:26:53.56#ibcon#*after write, iclass 30, count 0 2006.229.23:26:53.56#ibcon#*before return 0, iclass 30, count 0 2006.229.23:26:53.56#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:53.56#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:26:53.56#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:26:53.56#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:26:53.56$vck44/vblo=6,719.99 2006.229.23:26:53.56#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.23:26:53.56#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.23:26:53.56#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:53.56#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:53.56#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:53.56#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:53.56#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:26:53.56#ibcon#first serial, iclass 36, count 0 2006.229.23:26:53.56#ibcon#enter sib2, iclass 36, count 0 2006.229.23:26:53.56#ibcon#flushed, iclass 36, count 0 2006.229.23:26:53.56#ibcon#about to write, iclass 36, count 0 2006.229.23:26:53.56#ibcon#wrote, iclass 36, count 0 2006.229.23:26:53.56#ibcon#about to read 3, iclass 36, count 0 2006.229.23:26:53.58#ibcon#read 3, iclass 36, count 0 2006.229.23:26:53.58#ibcon#about to read 4, iclass 36, count 0 2006.229.23:26:53.58#ibcon#read 4, iclass 36, count 0 2006.229.23:26:53.58#ibcon#about to read 5, iclass 36, count 0 2006.229.23:26:53.58#ibcon#read 5, iclass 36, count 0 2006.229.23:26:53.58#ibcon#about to read 6, iclass 36, count 0 2006.229.23:26:53.58#ibcon#read 6, iclass 36, count 0 2006.229.23:26:53.58#ibcon#end of sib2, iclass 36, count 0 2006.229.23:26:53.58#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:26:53.58#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:26:53.58#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:26:53.58#ibcon#*before write, iclass 36, count 0 2006.229.23:26:53.58#ibcon#enter sib2, iclass 36, count 0 2006.229.23:26:53.58#ibcon#flushed, iclass 36, count 0 2006.229.23:26:53.58#ibcon#about to write, iclass 36, count 0 2006.229.23:26:53.58#ibcon#wrote, iclass 36, count 0 2006.229.23:26:53.58#ibcon#about to read 3, iclass 36, count 0 2006.229.23:26:53.62#ibcon#read 3, iclass 36, count 0 2006.229.23:26:53.62#ibcon#about to read 4, iclass 36, count 0 2006.229.23:26:53.62#ibcon#read 4, iclass 36, count 0 2006.229.23:26:53.62#ibcon#about to read 5, iclass 36, count 0 2006.229.23:26:53.62#ibcon#read 5, iclass 36, count 0 2006.229.23:26:53.62#ibcon#about to read 6, iclass 36, count 0 2006.229.23:26:53.62#ibcon#read 6, iclass 36, count 0 2006.229.23:26:53.62#ibcon#end of sib2, iclass 36, count 0 2006.229.23:26:53.62#ibcon#*after write, iclass 36, count 0 2006.229.23:26:53.62#ibcon#*before return 0, iclass 36, count 0 2006.229.23:26:53.62#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:53.62#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:26:53.62#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:26:53.62#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:26:53.62$vck44/vb=6,4 2006.229.23:26:53.62#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.23:26:53.62#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.23:26:53.62#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:53.62#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:53.68#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:53.68#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:53.68#ibcon#enter wrdev, iclass 38, count 2 2006.229.23:26:53.68#ibcon#first serial, iclass 38, count 2 2006.229.23:26:53.68#ibcon#enter sib2, iclass 38, count 2 2006.229.23:26:53.68#ibcon#flushed, iclass 38, count 2 2006.229.23:26:53.68#ibcon#about to write, iclass 38, count 2 2006.229.23:26:53.68#ibcon#wrote, iclass 38, count 2 2006.229.23:26:53.68#ibcon#about to read 3, iclass 38, count 2 2006.229.23:26:53.70#ibcon#read 3, iclass 38, count 2 2006.229.23:26:53.70#ibcon#about to read 4, iclass 38, count 2 2006.229.23:26:53.70#ibcon#read 4, iclass 38, count 2 2006.229.23:26:53.70#ibcon#about to read 5, iclass 38, count 2 2006.229.23:26:53.70#ibcon#read 5, iclass 38, count 2 2006.229.23:26:53.70#ibcon#about to read 6, iclass 38, count 2 2006.229.23:26:53.70#ibcon#read 6, iclass 38, count 2 2006.229.23:26:53.70#ibcon#end of sib2, iclass 38, count 2 2006.229.23:26:53.70#ibcon#*mode == 0, iclass 38, count 2 2006.229.23:26:53.70#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.23:26:53.70#ibcon#[27=AT06-04\r\n] 2006.229.23:26:53.70#ibcon#*before write, iclass 38, count 2 2006.229.23:26:53.70#ibcon#enter sib2, iclass 38, count 2 2006.229.23:26:53.70#ibcon#flushed, iclass 38, count 2 2006.229.23:26:53.70#ibcon#about to write, iclass 38, count 2 2006.229.23:26:53.70#ibcon#wrote, iclass 38, count 2 2006.229.23:26:53.70#ibcon#about to read 3, iclass 38, count 2 2006.229.23:26:53.73#ibcon#read 3, iclass 38, count 2 2006.229.23:26:53.73#ibcon#about to read 4, iclass 38, count 2 2006.229.23:26:53.73#ibcon#read 4, iclass 38, count 2 2006.229.23:26:53.73#ibcon#about to read 5, iclass 38, count 2 2006.229.23:26:53.73#ibcon#read 5, iclass 38, count 2 2006.229.23:26:53.73#ibcon#about to read 6, iclass 38, count 2 2006.229.23:26:53.73#ibcon#read 6, iclass 38, count 2 2006.229.23:26:53.73#ibcon#end of sib2, iclass 38, count 2 2006.229.23:26:53.73#ibcon#*after write, iclass 38, count 2 2006.229.23:26:53.73#ibcon#*before return 0, iclass 38, count 2 2006.229.23:26:53.73#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:53.73#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:26:53.73#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.23:26:53.73#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:53.73#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:53.85#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:53.85#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:53.85#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:26:53.85#ibcon#first serial, iclass 38, count 0 2006.229.23:26:53.85#ibcon#enter sib2, iclass 38, count 0 2006.229.23:26:53.85#ibcon#flushed, iclass 38, count 0 2006.229.23:26:53.85#ibcon#about to write, iclass 38, count 0 2006.229.23:26:53.85#ibcon#wrote, iclass 38, count 0 2006.229.23:26:53.85#ibcon#about to read 3, iclass 38, count 0 2006.229.23:26:53.87#ibcon#read 3, iclass 38, count 0 2006.229.23:26:53.87#ibcon#about to read 4, iclass 38, count 0 2006.229.23:26:53.87#ibcon#read 4, iclass 38, count 0 2006.229.23:26:53.87#ibcon#about to read 5, iclass 38, count 0 2006.229.23:26:53.87#ibcon#read 5, iclass 38, count 0 2006.229.23:26:53.87#ibcon#about to read 6, iclass 38, count 0 2006.229.23:26:53.87#ibcon#read 6, iclass 38, count 0 2006.229.23:26:53.87#ibcon#end of sib2, iclass 38, count 0 2006.229.23:26:53.87#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:26:53.87#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:26:53.87#ibcon#[27=USB\r\n] 2006.229.23:26:53.87#ibcon#*before write, iclass 38, count 0 2006.229.23:26:53.87#ibcon#enter sib2, iclass 38, count 0 2006.229.23:26:53.87#ibcon#flushed, iclass 38, count 0 2006.229.23:26:53.87#ibcon#about to write, iclass 38, count 0 2006.229.23:26:53.87#ibcon#wrote, iclass 38, count 0 2006.229.23:26:53.87#ibcon#about to read 3, iclass 38, count 0 2006.229.23:26:53.90#ibcon#read 3, iclass 38, count 0 2006.229.23:26:53.90#ibcon#about to read 4, iclass 38, count 0 2006.229.23:26:53.90#ibcon#read 4, iclass 38, count 0 2006.229.23:26:53.90#ibcon#about to read 5, iclass 38, count 0 2006.229.23:26:53.90#ibcon#read 5, iclass 38, count 0 2006.229.23:26:53.90#ibcon#about to read 6, iclass 38, count 0 2006.229.23:26:53.90#ibcon#read 6, iclass 38, count 0 2006.229.23:26:53.90#ibcon#end of sib2, iclass 38, count 0 2006.229.23:26:53.90#ibcon#*after write, iclass 38, count 0 2006.229.23:26:53.90#ibcon#*before return 0, iclass 38, count 0 2006.229.23:26:53.90#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:53.90#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:26:53.90#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:26:53.90#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:26:53.90$vck44/vblo=7,734.99 2006.229.23:26:53.90#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.23:26:53.90#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.23:26:53.90#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:53.90#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:53.90#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:53.90#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:53.90#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:26:53.90#ibcon#first serial, iclass 40, count 0 2006.229.23:26:53.90#ibcon#enter sib2, iclass 40, count 0 2006.229.23:26:53.90#ibcon#flushed, iclass 40, count 0 2006.229.23:26:53.90#ibcon#about to write, iclass 40, count 0 2006.229.23:26:53.90#ibcon#wrote, iclass 40, count 0 2006.229.23:26:53.90#ibcon#about to read 3, iclass 40, count 0 2006.229.23:26:53.92#ibcon#read 3, iclass 40, count 0 2006.229.23:26:53.92#ibcon#about to read 4, iclass 40, count 0 2006.229.23:26:53.92#ibcon#read 4, iclass 40, count 0 2006.229.23:26:53.92#ibcon#about to read 5, iclass 40, count 0 2006.229.23:26:53.92#ibcon#read 5, iclass 40, count 0 2006.229.23:26:53.92#ibcon#about to read 6, iclass 40, count 0 2006.229.23:26:53.92#ibcon#read 6, iclass 40, count 0 2006.229.23:26:53.92#ibcon#end of sib2, iclass 40, count 0 2006.229.23:26:53.92#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:26:53.92#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:26:53.92#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:26:53.92#ibcon#*before write, iclass 40, count 0 2006.229.23:26:53.92#ibcon#enter sib2, iclass 40, count 0 2006.229.23:26:53.92#ibcon#flushed, iclass 40, count 0 2006.229.23:26:53.92#ibcon#about to write, iclass 40, count 0 2006.229.23:26:53.92#ibcon#wrote, iclass 40, count 0 2006.229.23:26:53.92#ibcon#about to read 3, iclass 40, count 0 2006.229.23:26:53.96#ibcon#read 3, iclass 40, count 0 2006.229.23:26:53.96#ibcon#about to read 4, iclass 40, count 0 2006.229.23:26:53.96#ibcon#read 4, iclass 40, count 0 2006.229.23:26:53.96#ibcon#about to read 5, iclass 40, count 0 2006.229.23:26:53.96#ibcon#read 5, iclass 40, count 0 2006.229.23:26:53.96#ibcon#about to read 6, iclass 40, count 0 2006.229.23:26:53.96#ibcon#read 6, iclass 40, count 0 2006.229.23:26:53.96#ibcon#end of sib2, iclass 40, count 0 2006.229.23:26:53.96#ibcon#*after write, iclass 40, count 0 2006.229.23:26:53.96#ibcon#*before return 0, iclass 40, count 0 2006.229.23:26:53.96#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:53.96#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:26:53.96#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:26:53.96#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:26:53.96$vck44/vb=7,4 2006.229.23:26:53.96#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.23:26:53.96#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.23:26:53.96#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:53.96#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:54.02#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:54.02#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:54.02#ibcon#enter wrdev, iclass 4, count 2 2006.229.23:26:54.02#ibcon#first serial, iclass 4, count 2 2006.229.23:26:54.02#ibcon#enter sib2, iclass 4, count 2 2006.229.23:26:54.02#ibcon#flushed, iclass 4, count 2 2006.229.23:26:54.02#ibcon#about to write, iclass 4, count 2 2006.229.23:26:54.02#ibcon#wrote, iclass 4, count 2 2006.229.23:26:54.02#ibcon#about to read 3, iclass 4, count 2 2006.229.23:26:54.04#ibcon#read 3, iclass 4, count 2 2006.229.23:26:54.04#ibcon#about to read 4, iclass 4, count 2 2006.229.23:26:54.04#ibcon#read 4, iclass 4, count 2 2006.229.23:26:54.04#ibcon#about to read 5, iclass 4, count 2 2006.229.23:26:54.04#ibcon#read 5, iclass 4, count 2 2006.229.23:26:54.04#ibcon#about to read 6, iclass 4, count 2 2006.229.23:26:54.04#ibcon#read 6, iclass 4, count 2 2006.229.23:26:54.04#ibcon#end of sib2, iclass 4, count 2 2006.229.23:26:54.04#ibcon#*mode == 0, iclass 4, count 2 2006.229.23:26:54.04#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.23:26:54.04#ibcon#[27=AT07-04\r\n] 2006.229.23:26:54.04#ibcon#*before write, iclass 4, count 2 2006.229.23:26:54.04#ibcon#enter sib2, iclass 4, count 2 2006.229.23:26:54.04#ibcon#flushed, iclass 4, count 2 2006.229.23:26:54.04#ibcon#about to write, iclass 4, count 2 2006.229.23:26:54.04#ibcon#wrote, iclass 4, count 2 2006.229.23:26:54.04#ibcon#about to read 3, iclass 4, count 2 2006.229.23:26:54.07#ibcon#read 3, iclass 4, count 2 2006.229.23:26:54.07#ibcon#about to read 4, iclass 4, count 2 2006.229.23:26:54.07#ibcon#read 4, iclass 4, count 2 2006.229.23:26:54.07#ibcon#about to read 5, iclass 4, count 2 2006.229.23:26:54.07#ibcon#read 5, iclass 4, count 2 2006.229.23:26:54.07#ibcon#about to read 6, iclass 4, count 2 2006.229.23:26:54.07#ibcon#read 6, iclass 4, count 2 2006.229.23:26:54.07#ibcon#end of sib2, iclass 4, count 2 2006.229.23:26:54.07#ibcon#*after write, iclass 4, count 2 2006.229.23:26:54.07#ibcon#*before return 0, iclass 4, count 2 2006.229.23:26:54.07#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:54.07#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:26:54.07#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.23:26:54.07#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:54.07#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:54.19#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:54.19#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:54.19#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:26:54.19#ibcon#first serial, iclass 4, count 0 2006.229.23:26:54.19#ibcon#enter sib2, iclass 4, count 0 2006.229.23:26:54.19#ibcon#flushed, iclass 4, count 0 2006.229.23:26:54.19#ibcon#about to write, iclass 4, count 0 2006.229.23:26:54.19#ibcon#wrote, iclass 4, count 0 2006.229.23:26:54.19#ibcon#about to read 3, iclass 4, count 0 2006.229.23:26:54.21#ibcon#read 3, iclass 4, count 0 2006.229.23:26:54.21#ibcon#about to read 4, iclass 4, count 0 2006.229.23:26:54.21#ibcon#read 4, iclass 4, count 0 2006.229.23:26:54.21#ibcon#about to read 5, iclass 4, count 0 2006.229.23:26:54.21#ibcon#read 5, iclass 4, count 0 2006.229.23:26:54.21#ibcon#about to read 6, iclass 4, count 0 2006.229.23:26:54.21#ibcon#read 6, iclass 4, count 0 2006.229.23:26:54.21#ibcon#end of sib2, iclass 4, count 0 2006.229.23:26:54.21#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:26:54.21#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:26:54.21#ibcon#[27=USB\r\n] 2006.229.23:26:54.21#ibcon#*before write, iclass 4, count 0 2006.229.23:26:54.21#ibcon#enter sib2, iclass 4, count 0 2006.229.23:26:54.21#ibcon#flushed, iclass 4, count 0 2006.229.23:26:54.21#ibcon#about to write, iclass 4, count 0 2006.229.23:26:54.21#ibcon#wrote, iclass 4, count 0 2006.229.23:26:54.21#ibcon#about to read 3, iclass 4, count 0 2006.229.23:26:54.24#ibcon#read 3, iclass 4, count 0 2006.229.23:26:54.24#ibcon#about to read 4, iclass 4, count 0 2006.229.23:26:54.24#ibcon#read 4, iclass 4, count 0 2006.229.23:26:54.24#ibcon#about to read 5, iclass 4, count 0 2006.229.23:26:54.24#ibcon#read 5, iclass 4, count 0 2006.229.23:26:54.24#ibcon#about to read 6, iclass 4, count 0 2006.229.23:26:54.24#ibcon#read 6, iclass 4, count 0 2006.229.23:26:54.24#ibcon#end of sib2, iclass 4, count 0 2006.229.23:26:54.24#ibcon#*after write, iclass 4, count 0 2006.229.23:26:54.24#ibcon#*before return 0, iclass 4, count 0 2006.229.23:26:54.24#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:54.24#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:26:54.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:26:54.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:26:54.24$vck44/vblo=8,744.99 2006.229.23:26:54.24#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.23:26:54.24#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.23:26:54.24#ibcon#ireg 17 cls_cnt 0 2006.229.23:26:54.24#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:54.24#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:54.24#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:54.24#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:26:54.24#ibcon#first serial, iclass 6, count 0 2006.229.23:26:54.24#ibcon#enter sib2, iclass 6, count 0 2006.229.23:26:54.24#ibcon#flushed, iclass 6, count 0 2006.229.23:26:54.24#ibcon#about to write, iclass 6, count 0 2006.229.23:26:54.24#ibcon#wrote, iclass 6, count 0 2006.229.23:26:54.24#ibcon#about to read 3, iclass 6, count 0 2006.229.23:26:54.26#ibcon#read 3, iclass 6, count 0 2006.229.23:26:54.26#ibcon#about to read 4, iclass 6, count 0 2006.229.23:26:54.26#ibcon#read 4, iclass 6, count 0 2006.229.23:26:54.26#ibcon#about to read 5, iclass 6, count 0 2006.229.23:26:54.26#ibcon#read 5, iclass 6, count 0 2006.229.23:26:54.26#ibcon#about to read 6, iclass 6, count 0 2006.229.23:26:54.26#ibcon#read 6, iclass 6, count 0 2006.229.23:26:54.26#ibcon#end of sib2, iclass 6, count 0 2006.229.23:26:54.26#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:26:54.26#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:26:54.26#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:26:54.26#ibcon#*before write, iclass 6, count 0 2006.229.23:26:54.26#ibcon#enter sib2, iclass 6, count 0 2006.229.23:26:54.26#ibcon#flushed, iclass 6, count 0 2006.229.23:26:54.26#ibcon#about to write, iclass 6, count 0 2006.229.23:26:54.26#ibcon#wrote, iclass 6, count 0 2006.229.23:26:54.26#ibcon#about to read 3, iclass 6, count 0 2006.229.23:26:54.30#ibcon#read 3, iclass 6, count 0 2006.229.23:26:54.30#ibcon#about to read 4, iclass 6, count 0 2006.229.23:26:54.30#ibcon#read 4, iclass 6, count 0 2006.229.23:26:54.30#ibcon#about to read 5, iclass 6, count 0 2006.229.23:26:54.30#ibcon#read 5, iclass 6, count 0 2006.229.23:26:54.30#ibcon#about to read 6, iclass 6, count 0 2006.229.23:26:54.30#ibcon#read 6, iclass 6, count 0 2006.229.23:26:54.30#ibcon#end of sib2, iclass 6, count 0 2006.229.23:26:54.30#ibcon#*after write, iclass 6, count 0 2006.229.23:26:54.30#ibcon#*before return 0, iclass 6, count 0 2006.229.23:26:54.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:54.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:26:54.30#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:26:54.30#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:26:54.30$vck44/vb=8,4 2006.229.23:26:54.30#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.23:26:54.30#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.23:26:54.30#ibcon#ireg 11 cls_cnt 2 2006.229.23:26:54.30#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:54.36#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:54.36#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:54.36#ibcon#enter wrdev, iclass 10, count 2 2006.229.23:26:54.36#ibcon#first serial, iclass 10, count 2 2006.229.23:26:54.36#ibcon#enter sib2, iclass 10, count 2 2006.229.23:26:54.36#ibcon#flushed, iclass 10, count 2 2006.229.23:26:54.36#ibcon#about to write, iclass 10, count 2 2006.229.23:26:54.36#ibcon#wrote, iclass 10, count 2 2006.229.23:26:54.36#ibcon#about to read 3, iclass 10, count 2 2006.229.23:26:54.38#ibcon#read 3, iclass 10, count 2 2006.229.23:26:54.38#ibcon#about to read 4, iclass 10, count 2 2006.229.23:26:54.38#ibcon#read 4, iclass 10, count 2 2006.229.23:26:54.38#ibcon#about to read 5, iclass 10, count 2 2006.229.23:26:54.38#ibcon#read 5, iclass 10, count 2 2006.229.23:26:54.38#ibcon#about to read 6, iclass 10, count 2 2006.229.23:26:54.38#ibcon#read 6, iclass 10, count 2 2006.229.23:26:54.38#ibcon#end of sib2, iclass 10, count 2 2006.229.23:26:54.38#ibcon#*mode == 0, iclass 10, count 2 2006.229.23:26:54.38#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.23:26:54.38#ibcon#[27=AT08-04\r\n] 2006.229.23:26:54.38#ibcon#*before write, iclass 10, count 2 2006.229.23:26:54.38#ibcon#enter sib2, iclass 10, count 2 2006.229.23:26:54.38#ibcon#flushed, iclass 10, count 2 2006.229.23:26:54.38#ibcon#about to write, iclass 10, count 2 2006.229.23:26:54.38#ibcon#wrote, iclass 10, count 2 2006.229.23:26:54.38#ibcon#about to read 3, iclass 10, count 2 2006.229.23:26:54.41#ibcon#read 3, iclass 10, count 2 2006.229.23:26:54.41#ibcon#about to read 4, iclass 10, count 2 2006.229.23:26:54.41#ibcon#read 4, iclass 10, count 2 2006.229.23:26:54.41#ibcon#about to read 5, iclass 10, count 2 2006.229.23:26:54.41#ibcon#read 5, iclass 10, count 2 2006.229.23:26:54.41#ibcon#about to read 6, iclass 10, count 2 2006.229.23:26:54.41#ibcon#read 6, iclass 10, count 2 2006.229.23:26:54.41#ibcon#end of sib2, iclass 10, count 2 2006.229.23:26:54.41#ibcon#*after write, iclass 10, count 2 2006.229.23:26:54.41#ibcon#*before return 0, iclass 10, count 2 2006.229.23:26:54.41#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:54.41#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:26:54.41#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.23:26:54.41#ibcon#ireg 7 cls_cnt 0 2006.229.23:26:54.41#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:54.53#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:54.53#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:54.53#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:26:54.53#ibcon#first serial, iclass 10, count 0 2006.229.23:26:54.53#ibcon#enter sib2, iclass 10, count 0 2006.229.23:26:54.53#ibcon#flushed, iclass 10, count 0 2006.229.23:26:54.53#ibcon#about to write, iclass 10, count 0 2006.229.23:26:54.53#ibcon#wrote, iclass 10, count 0 2006.229.23:26:54.53#ibcon#about to read 3, iclass 10, count 0 2006.229.23:26:54.55#ibcon#read 3, iclass 10, count 0 2006.229.23:26:54.55#ibcon#about to read 4, iclass 10, count 0 2006.229.23:26:54.55#ibcon#read 4, iclass 10, count 0 2006.229.23:26:54.55#ibcon#about to read 5, iclass 10, count 0 2006.229.23:26:54.55#ibcon#read 5, iclass 10, count 0 2006.229.23:26:54.55#ibcon#about to read 6, iclass 10, count 0 2006.229.23:26:54.55#ibcon#read 6, iclass 10, count 0 2006.229.23:26:54.55#ibcon#end of sib2, iclass 10, count 0 2006.229.23:26:54.55#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:26:54.55#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:26:54.55#ibcon#[27=USB\r\n] 2006.229.23:26:54.55#ibcon#*before write, iclass 10, count 0 2006.229.23:26:54.55#ibcon#enter sib2, iclass 10, count 0 2006.229.23:26:54.55#ibcon#flushed, iclass 10, count 0 2006.229.23:26:54.55#ibcon#about to write, iclass 10, count 0 2006.229.23:26:54.55#ibcon#wrote, iclass 10, count 0 2006.229.23:26:54.55#ibcon#about to read 3, iclass 10, count 0 2006.229.23:26:54.58#ibcon#read 3, iclass 10, count 0 2006.229.23:26:54.58#ibcon#about to read 4, iclass 10, count 0 2006.229.23:26:54.58#ibcon#read 4, iclass 10, count 0 2006.229.23:26:54.58#ibcon#about to read 5, iclass 10, count 0 2006.229.23:26:54.58#ibcon#read 5, iclass 10, count 0 2006.229.23:26:54.58#ibcon#about to read 6, iclass 10, count 0 2006.229.23:26:54.58#ibcon#read 6, iclass 10, count 0 2006.229.23:26:54.58#ibcon#end of sib2, iclass 10, count 0 2006.229.23:26:54.58#ibcon#*after write, iclass 10, count 0 2006.229.23:26:54.58#ibcon#*before return 0, iclass 10, count 0 2006.229.23:26:54.58#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:54.58#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:26:54.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:26:54.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:26:54.58$vck44/vabw=wide 2006.229.23:26:54.58#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.23:26:54.58#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.23:26:54.58#ibcon#ireg 8 cls_cnt 0 2006.229.23:26:54.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:54.58#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:54.58#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:54.58#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:26:54.58#ibcon#first serial, iclass 12, count 0 2006.229.23:26:54.58#ibcon#enter sib2, iclass 12, count 0 2006.229.23:26:54.58#ibcon#flushed, iclass 12, count 0 2006.229.23:26:54.58#ibcon#about to write, iclass 12, count 0 2006.229.23:26:54.58#ibcon#wrote, iclass 12, count 0 2006.229.23:26:54.58#ibcon#about to read 3, iclass 12, count 0 2006.229.23:26:54.60#ibcon#read 3, iclass 12, count 0 2006.229.23:26:54.60#ibcon#about to read 4, iclass 12, count 0 2006.229.23:26:54.60#ibcon#read 4, iclass 12, count 0 2006.229.23:26:54.60#ibcon#about to read 5, iclass 12, count 0 2006.229.23:26:54.60#ibcon#read 5, iclass 12, count 0 2006.229.23:26:54.60#ibcon#about to read 6, iclass 12, count 0 2006.229.23:26:54.60#ibcon#read 6, iclass 12, count 0 2006.229.23:26:54.60#ibcon#end of sib2, iclass 12, count 0 2006.229.23:26:54.60#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:26:54.60#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:26:54.60#ibcon#[25=BW32\r\n] 2006.229.23:26:54.60#ibcon#*before write, iclass 12, count 0 2006.229.23:26:54.60#ibcon#enter sib2, iclass 12, count 0 2006.229.23:26:54.60#ibcon#flushed, iclass 12, count 0 2006.229.23:26:54.60#ibcon#about to write, iclass 12, count 0 2006.229.23:26:54.60#ibcon#wrote, iclass 12, count 0 2006.229.23:26:54.60#ibcon#about to read 3, iclass 12, count 0 2006.229.23:26:54.63#ibcon#read 3, iclass 12, count 0 2006.229.23:26:54.63#ibcon#about to read 4, iclass 12, count 0 2006.229.23:26:54.63#ibcon#read 4, iclass 12, count 0 2006.229.23:26:54.63#ibcon#about to read 5, iclass 12, count 0 2006.229.23:26:54.63#ibcon#read 5, iclass 12, count 0 2006.229.23:26:54.63#ibcon#about to read 6, iclass 12, count 0 2006.229.23:26:54.63#ibcon#read 6, iclass 12, count 0 2006.229.23:26:54.63#ibcon#end of sib2, iclass 12, count 0 2006.229.23:26:54.63#ibcon#*after write, iclass 12, count 0 2006.229.23:26:54.63#ibcon#*before return 0, iclass 12, count 0 2006.229.23:26:54.63#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:54.63#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:26:54.63#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:26:54.63#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:26:54.63$vck44/vbbw=wide 2006.229.23:26:54.63#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.23:26:54.63#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.23:26:54.63#ibcon#ireg 8 cls_cnt 0 2006.229.23:26:54.63#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:26:54.70#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:26:54.70#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:26:54.70#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:26:54.70#ibcon#first serial, iclass 14, count 0 2006.229.23:26:54.70#ibcon#enter sib2, iclass 14, count 0 2006.229.23:26:54.70#ibcon#flushed, iclass 14, count 0 2006.229.23:26:54.70#ibcon#about to write, iclass 14, count 0 2006.229.23:26:54.70#ibcon#wrote, iclass 14, count 0 2006.229.23:26:54.70#ibcon#about to read 3, iclass 14, count 0 2006.229.23:26:54.72#ibcon#read 3, iclass 14, count 0 2006.229.23:26:54.72#ibcon#about to read 4, iclass 14, count 0 2006.229.23:26:54.72#ibcon#read 4, iclass 14, count 0 2006.229.23:26:54.72#ibcon#about to read 5, iclass 14, count 0 2006.229.23:26:54.72#ibcon#read 5, iclass 14, count 0 2006.229.23:26:54.72#ibcon#about to read 6, iclass 14, count 0 2006.229.23:26:54.72#ibcon#read 6, iclass 14, count 0 2006.229.23:26:54.72#ibcon#end of sib2, iclass 14, count 0 2006.229.23:26:54.72#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:26:54.72#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:26:54.72#ibcon#[27=BW32\r\n] 2006.229.23:26:54.72#ibcon#*before write, iclass 14, count 0 2006.229.23:26:54.72#ibcon#enter sib2, iclass 14, count 0 2006.229.23:26:54.72#ibcon#flushed, iclass 14, count 0 2006.229.23:26:54.72#ibcon#about to write, iclass 14, count 0 2006.229.23:26:54.72#ibcon#wrote, iclass 14, count 0 2006.229.23:26:54.72#ibcon#about to read 3, iclass 14, count 0 2006.229.23:26:54.75#ibcon#read 3, iclass 14, count 0 2006.229.23:26:54.75#ibcon#about to read 4, iclass 14, count 0 2006.229.23:26:54.75#ibcon#read 4, iclass 14, count 0 2006.229.23:26:54.75#ibcon#about to read 5, iclass 14, count 0 2006.229.23:26:54.75#ibcon#read 5, iclass 14, count 0 2006.229.23:26:54.75#ibcon#about to read 6, iclass 14, count 0 2006.229.23:26:54.75#ibcon#read 6, iclass 14, count 0 2006.229.23:26:54.75#ibcon#end of sib2, iclass 14, count 0 2006.229.23:26:54.75#ibcon#*after write, iclass 14, count 0 2006.229.23:26:54.75#ibcon#*before return 0, iclass 14, count 0 2006.229.23:26:54.75#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:26:54.75#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:26:54.75#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:26:54.75#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:26:54.75$setupk4/ifdk4 2006.229.23:26:54.75$ifdk4/lo= 2006.229.23:26:54.75$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:26:54.75$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:26:54.75$ifdk4/patch= 2006.229.23:26:54.75$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:26:54.75$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:26:54.75$setupk4/!*+20s 2006.229.23:27:03.75#abcon#<5=/08 1.3 3.7 29.86 811002.6\r\n> 2006.229.23:27:03.77#abcon#{5=INTERFACE CLEAR} 2006.229.23:27:03.83#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:27:09.26$setupk4/"tpicd 2006.229.23:27:09.26$setupk4/echo=off 2006.229.23:27:09.26$setupk4/xlog=off 2006.229.23:27:09.26:!2006.229.23:31:25 2006.229.23:27:35.13#trakl#Source acquired 2006.229.23:27:35.13#flagr#flagr/antenna,acquired 2006.229.23:31:25.00:preob 2006.229.23:31:25.14/onsource/TRACKING 2006.229.23:31:25.14:!2006.229.23:31:35 2006.229.23:31:35.00:"tape 2006.229.23:31:35.00:"st=record 2006.229.23:31:35.00:data_valid=on 2006.229.23:31:35.00:midob 2006.229.23:31:35.14/onsource/TRACKING 2006.229.23:31:35.14/wx/29.78,1002.6,85 2006.229.23:31:35.21/cable/+6.4091E-03 2006.229.23:31:36.30/va/01,08,usb,yes,37,39 2006.229.23:31:36.30/va/02,07,usb,yes,40,40 2006.229.23:31:36.30/va/03,06,usb,yes,49,52 2006.229.23:31:36.30/va/04,07,usb,yes,41,43 2006.229.23:31:36.30/va/05,04,usb,yes,36,37 2006.229.23:31:36.30/va/06,04,usb,yes,41,40 2006.229.23:31:36.30/va/07,05,usb,yes,36,37 2006.229.23:31:36.30/va/08,06,usb,yes,26,33 2006.229.23:31:36.53/valo/01,524.99,yes,locked 2006.229.23:31:36.53/valo/02,534.99,yes,locked 2006.229.23:31:36.53/valo/03,564.99,yes,locked 2006.229.23:31:36.53/valo/04,624.99,yes,locked 2006.229.23:31:36.53/valo/05,734.99,yes,locked 2006.229.23:31:36.53/valo/06,814.99,yes,locked 2006.229.23:31:36.53/valo/07,864.99,yes,locked 2006.229.23:31:36.53/valo/08,884.99,yes,locked 2006.229.23:31:37.62/vb/01,04,usb,yes,41,38 2006.229.23:31:37.62/vb/02,04,usb,yes,44,43 2006.229.23:31:37.62/vb/03,04,usb,yes,40,44 2006.229.23:31:37.62/vb/04,04,usb,yes,45,44 2006.229.23:31:37.62/vb/05,04,usb,yes,36,39 2006.229.23:31:37.62/vb/06,04,usb,yes,42,37 2006.229.23:31:37.62/vb/07,04,usb,yes,42,42 2006.229.23:31:37.62/vb/08,04,usb,yes,38,42 2006.229.23:31:37.85/vblo/01,629.99,yes,locked 2006.229.23:31:37.85/vblo/02,634.99,yes,locked 2006.229.23:31:37.85/vblo/03,649.99,yes,locked 2006.229.23:31:37.85/vblo/04,679.99,yes,locked 2006.229.23:31:37.85/vblo/05,709.99,yes,locked 2006.229.23:31:37.85/vblo/06,719.99,yes,locked 2006.229.23:31:37.85/vblo/07,734.99,yes,locked 2006.229.23:31:37.85/vblo/08,744.99,yes,locked 2006.229.23:31:38.00/vabw/8 2006.229.23:31:38.15/vbbw/8 2006.229.23:31:38.32/xfe/off,on,12.2 2006.229.23:31:38.76/ifatt/23,28,28,28 2006.229.23:31:39.08/fmout-gps/S +4.58E-07 2006.229.23:31:39.12:!2006.229.23:32:25 2006.229.23:32:25.00:data_valid=off 2006.229.23:32:25.00:"et 2006.229.23:32:25.00:!+3s 2006.229.23:32:28.01:"tape 2006.229.23:32:28.01:postob 2006.229.23:32:28.10/cable/+6.4105E-03 2006.229.23:32:28.10/wx/29.83,1002.6,85 2006.229.23:32:29.08/fmout-gps/S +4.57E-07 2006.229.23:32:29.08:scan_name=229-2333,jd0608,70 2006.229.23:32:29.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.229.23:32:30.14#flagr#flagr/antenna,new-source 2006.229.23:32:30.14:checkk5 2006.229.23:32:30.55/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:32:30.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:32:31.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:32:31.74/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:32:32.13/chk_obsdata//k5ts1/T2292331??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:32:32.53/chk_obsdata//k5ts2/T2292331??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:32:32.93/chk_obsdata//k5ts3/T2292331??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:32:33.33/chk_obsdata//k5ts4/T2292331??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:32:34.05/k5log//k5ts1_log_newline 2006.229.23:32:34.73/k5log//k5ts2_log_newline 2006.229.23:32:35.44/k5log//k5ts3_log_newline 2006.229.23:32:36.14/k5log//k5ts4_log_newline 2006.229.23:32:36.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:32:36.16:setupk4=1 2006.229.23:32:36.16$setupk4/echo=on 2006.229.23:32:36.16$setupk4/pcalon 2006.229.23:32:36.16$pcalon/"no phase cal control is implemented here 2006.229.23:32:36.16$setupk4/"tpicd=stop 2006.229.23:32:36.16$setupk4/"rec=synch_on 2006.229.23:32:36.16$setupk4/"rec_mode=128 2006.229.23:32:36.16$setupk4/!* 2006.229.23:32:36.16$setupk4/recpk4 2006.229.23:32:36.16$recpk4/recpatch= 2006.229.23:32:36.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:32:36.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:32:36.16$setupk4/vck44 2006.229.23:32:36.16$vck44/valo=1,524.99 2006.229.23:32:36.16#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.23:32:36.16#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.23:32:36.16#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:36.16#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:36.16#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:36.16#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:36.16#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:32:36.16#ibcon#first serial, iclass 5, count 0 2006.229.23:32:36.16#ibcon#enter sib2, iclass 5, count 0 2006.229.23:32:36.17#ibcon#flushed, iclass 5, count 0 2006.229.23:32:36.17#ibcon#about to write, iclass 5, count 0 2006.229.23:32:36.17#ibcon#wrote, iclass 5, count 0 2006.229.23:32:36.17#ibcon#about to read 3, iclass 5, count 0 2006.229.23:32:36.18#ibcon#read 3, iclass 5, count 0 2006.229.23:32:36.18#ibcon#about to read 4, iclass 5, count 0 2006.229.23:32:36.18#ibcon#read 4, iclass 5, count 0 2006.229.23:32:36.18#ibcon#about to read 5, iclass 5, count 0 2006.229.23:32:36.18#ibcon#read 5, iclass 5, count 0 2006.229.23:32:36.18#ibcon#about to read 6, iclass 5, count 0 2006.229.23:32:36.18#ibcon#read 6, iclass 5, count 0 2006.229.23:32:36.18#ibcon#end of sib2, iclass 5, count 0 2006.229.23:32:36.18#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:32:36.18#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:32:36.18#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:32:36.18#ibcon#*before write, iclass 5, count 0 2006.229.23:32:36.18#ibcon#enter sib2, iclass 5, count 0 2006.229.23:32:36.18#ibcon#flushed, iclass 5, count 0 2006.229.23:32:36.18#ibcon#about to write, iclass 5, count 0 2006.229.23:32:36.18#ibcon#wrote, iclass 5, count 0 2006.229.23:32:36.18#ibcon#about to read 3, iclass 5, count 0 2006.229.23:32:36.23#ibcon#read 3, iclass 5, count 0 2006.229.23:32:36.23#ibcon#about to read 4, iclass 5, count 0 2006.229.23:32:36.23#ibcon#read 4, iclass 5, count 0 2006.229.23:32:36.23#ibcon#about to read 5, iclass 5, count 0 2006.229.23:32:36.23#ibcon#read 5, iclass 5, count 0 2006.229.23:32:36.23#ibcon#about to read 6, iclass 5, count 0 2006.229.23:32:36.23#ibcon#read 6, iclass 5, count 0 2006.229.23:32:36.23#ibcon#end of sib2, iclass 5, count 0 2006.229.23:32:36.23#ibcon#*after write, iclass 5, count 0 2006.229.23:32:36.23#ibcon#*before return 0, iclass 5, count 0 2006.229.23:32:36.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:36.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:36.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:32:36.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:32:36.23$vck44/va=1,8 2006.229.23:32:36.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.23:32:36.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.23:32:36.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:36.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:36.23#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:36.23#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:36.23#ibcon#enter wrdev, iclass 7, count 2 2006.229.23:32:36.23#ibcon#first serial, iclass 7, count 2 2006.229.23:32:36.23#ibcon#enter sib2, iclass 7, count 2 2006.229.23:32:36.23#ibcon#flushed, iclass 7, count 2 2006.229.23:32:36.23#ibcon#about to write, iclass 7, count 2 2006.229.23:32:36.23#ibcon#wrote, iclass 7, count 2 2006.229.23:32:36.23#ibcon#about to read 3, iclass 7, count 2 2006.229.23:32:36.25#ibcon#read 3, iclass 7, count 2 2006.229.23:32:36.25#ibcon#about to read 4, iclass 7, count 2 2006.229.23:32:36.25#ibcon#read 4, iclass 7, count 2 2006.229.23:32:36.25#ibcon#about to read 5, iclass 7, count 2 2006.229.23:32:36.25#ibcon#read 5, iclass 7, count 2 2006.229.23:32:36.25#ibcon#about to read 6, iclass 7, count 2 2006.229.23:32:36.25#ibcon#read 6, iclass 7, count 2 2006.229.23:32:36.25#ibcon#end of sib2, iclass 7, count 2 2006.229.23:32:36.25#ibcon#*mode == 0, iclass 7, count 2 2006.229.23:32:36.25#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.23:32:36.25#ibcon#[25=AT01-08\r\n] 2006.229.23:32:36.25#ibcon#*before write, iclass 7, count 2 2006.229.23:32:36.25#ibcon#enter sib2, iclass 7, count 2 2006.229.23:32:36.25#ibcon#flushed, iclass 7, count 2 2006.229.23:32:36.25#ibcon#about to write, iclass 7, count 2 2006.229.23:32:36.25#ibcon#wrote, iclass 7, count 2 2006.229.23:32:36.25#ibcon#about to read 3, iclass 7, count 2 2006.229.23:32:36.28#ibcon#read 3, iclass 7, count 2 2006.229.23:32:36.28#ibcon#about to read 4, iclass 7, count 2 2006.229.23:32:36.28#ibcon#read 4, iclass 7, count 2 2006.229.23:32:36.28#ibcon#about to read 5, iclass 7, count 2 2006.229.23:32:36.28#ibcon#read 5, iclass 7, count 2 2006.229.23:32:36.28#ibcon#about to read 6, iclass 7, count 2 2006.229.23:32:36.28#ibcon#read 6, iclass 7, count 2 2006.229.23:32:36.28#ibcon#end of sib2, iclass 7, count 2 2006.229.23:32:36.28#ibcon#*after write, iclass 7, count 2 2006.229.23:32:36.28#ibcon#*before return 0, iclass 7, count 2 2006.229.23:32:36.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:36.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:36.28#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.23:32:36.28#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:36.28#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:36.40#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:36.40#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:36.40#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:32:36.40#ibcon#first serial, iclass 7, count 0 2006.229.23:32:36.40#ibcon#enter sib2, iclass 7, count 0 2006.229.23:32:36.40#ibcon#flushed, iclass 7, count 0 2006.229.23:32:36.40#ibcon#about to write, iclass 7, count 0 2006.229.23:32:36.40#ibcon#wrote, iclass 7, count 0 2006.229.23:32:36.40#ibcon#about to read 3, iclass 7, count 0 2006.229.23:32:36.42#ibcon#read 3, iclass 7, count 0 2006.229.23:32:36.42#ibcon#about to read 4, iclass 7, count 0 2006.229.23:32:36.42#ibcon#read 4, iclass 7, count 0 2006.229.23:32:36.42#ibcon#about to read 5, iclass 7, count 0 2006.229.23:32:36.42#ibcon#read 5, iclass 7, count 0 2006.229.23:32:36.42#ibcon#about to read 6, iclass 7, count 0 2006.229.23:32:36.42#ibcon#read 6, iclass 7, count 0 2006.229.23:32:36.42#ibcon#end of sib2, iclass 7, count 0 2006.229.23:32:36.42#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:32:36.42#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:32:36.42#ibcon#[25=USB\r\n] 2006.229.23:32:36.42#ibcon#*before write, iclass 7, count 0 2006.229.23:32:36.42#ibcon#enter sib2, iclass 7, count 0 2006.229.23:32:36.42#ibcon#flushed, iclass 7, count 0 2006.229.23:32:36.42#ibcon#about to write, iclass 7, count 0 2006.229.23:32:36.42#ibcon#wrote, iclass 7, count 0 2006.229.23:32:36.42#ibcon#about to read 3, iclass 7, count 0 2006.229.23:32:36.45#ibcon#read 3, iclass 7, count 0 2006.229.23:32:36.45#ibcon#about to read 4, iclass 7, count 0 2006.229.23:32:36.45#ibcon#read 4, iclass 7, count 0 2006.229.23:32:36.45#ibcon#about to read 5, iclass 7, count 0 2006.229.23:32:36.45#ibcon#read 5, iclass 7, count 0 2006.229.23:32:36.45#ibcon#about to read 6, iclass 7, count 0 2006.229.23:32:36.45#ibcon#read 6, iclass 7, count 0 2006.229.23:32:36.45#ibcon#end of sib2, iclass 7, count 0 2006.229.23:32:36.45#ibcon#*after write, iclass 7, count 0 2006.229.23:32:36.45#ibcon#*before return 0, iclass 7, count 0 2006.229.23:32:36.45#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:36.45#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:36.45#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:32:36.45#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:32:36.45$vck44/valo=2,534.99 2006.229.23:32:36.45#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.23:32:36.45#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.23:32:36.45#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:36.45#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:36.45#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:36.45#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:36.45#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:32:36.45#ibcon#first serial, iclass 11, count 0 2006.229.23:32:36.45#ibcon#enter sib2, iclass 11, count 0 2006.229.23:32:36.45#ibcon#flushed, iclass 11, count 0 2006.229.23:32:36.45#ibcon#about to write, iclass 11, count 0 2006.229.23:32:36.45#ibcon#wrote, iclass 11, count 0 2006.229.23:32:36.45#ibcon#about to read 3, iclass 11, count 0 2006.229.23:32:36.47#ibcon#read 3, iclass 11, count 0 2006.229.23:32:36.47#ibcon#about to read 4, iclass 11, count 0 2006.229.23:32:36.47#ibcon#read 4, iclass 11, count 0 2006.229.23:32:36.47#ibcon#about to read 5, iclass 11, count 0 2006.229.23:32:36.47#ibcon#read 5, iclass 11, count 0 2006.229.23:32:36.47#ibcon#about to read 6, iclass 11, count 0 2006.229.23:32:36.47#ibcon#read 6, iclass 11, count 0 2006.229.23:32:36.47#ibcon#end of sib2, iclass 11, count 0 2006.229.23:32:36.47#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:32:36.47#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:32:36.47#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:32:36.47#ibcon#*before write, iclass 11, count 0 2006.229.23:32:36.47#ibcon#enter sib2, iclass 11, count 0 2006.229.23:32:36.47#ibcon#flushed, iclass 11, count 0 2006.229.23:32:36.47#ibcon#about to write, iclass 11, count 0 2006.229.23:32:36.47#ibcon#wrote, iclass 11, count 0 2006.229.23:32:36.47#ibcon#about to read 3, iclass 11, count 0 2006.229.23:32:36.51#ibcon#read 3, iclass 11, count 0 2006.229.23:32:36.51#ibcon#about to read 4, iclass 11, count 0 2006.229.23:32:36.51#ibcon#read 4, iclass 11, count 0 2006.229.23:32:36.51#ibcon#about to read 5, iclass 11, count 0 2006.229.23:32:36.51#ibcon#read 5, iclass 11, count 0 2006.229.23:32:36.51#ibcon#about to read 6, iclass 11, count 0 2006.229.23:32:36.51#ibcon#read 6, iclass 11, count 0 2006.229.23:32:36.51#ibcon#end of sib2, iclass 11, count 0 2006.229.23:32:36.51#ibcon#*after write, iclass 11, count 0 2006.229.23:32:36.51#ibcon#*before return 0, iclass 11, count 0 2006.229.23:32:36.51#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:36.51#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:36.51#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:32:36.51#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:32:36.51$vck44/va=2,7 2006.229.23:32:36.51#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.23:32:36.51#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.23:32:36.51#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:36.51#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:36.57#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:36.57#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:36.57#ibcon#enter wrdev, iclass 13, count 2 2006.229.23:32:36.57#ibcon#first serial, iclass 13, count 2 2006.229.23:32:36.57#ibcon#enter sib2, iclass 13, count 2 2006.229.23:32:36.57#ibcon#flushed, iclass 13, count 2 2006.229.23:32:36.57#ibcon#about to write, iclass 13, count 2 2006.229.23:32:36.57#ibcon#wrote, iclass 13, count 2 2006.229.23:32:36.57#ibcon#about to read 3, iclass 13, count 2 2006.229.23:32:36.59#ibcon#read 3, iclass 13, count 2 2006.229.23:32:36.59#ibcon#about to read 4, iclass 13, count 2 2006.229.23:32:36.59#ibcon#read 4, iclass 13, count 2 2006.229.23:32:36.59#ibcon#about to read 5, iclass 13, count 2 2006.229.23:32:36.59#ibcon#read 5, iclass 13, count 2 2006.229.23:32:36.59#ibcon#about to read 6, iclass 13, count 2 2006.229.23:32:36.59#ibcon#read 6, iclass 13, count 2 2006.229.23:32:36.59#ibcon#end of sib2, iclass 13, count 2 2006.229.23:32:36.59#ibcon#*mode == 0, iclass 13, count 2 2006.229.23:32:36.59#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.23:32:36.59#ibcon#[25=AT02-07\r\n] 2006.229.23:32:36.59#ibcon#*before write, iclass 13, count 2 2006.229.23:32:36.59#ibcon#enter sib2, iclass 13, count 2 2006.229.23:32:36.59#ibcon#flushed, iclass 13, count 2 2006.229.23:32:36.59#ibcon#about to write, iclass 13, count 2 2006.229.23:32:36.59#ibcon#wrote, iclass 13, count 2 2006.229.23:32:36.59#ibcon#about to read 3, iclass 13, count 2 2006.229.23:32:36.62#ibcon#read 3, iclass 13, count 2 2006.229.23:32:36.62#ibcon#about to read 4, iclass 13, count 2 2006.229.23:32:36.62#ibcon#read 4, iclass 13, count 2 2006.229.23:32:36.62#ibcon#about to read 5, iclass 13, count 2 2006.229.23:32:36.62#ibcon#read 5, iclass 13, count 2 2006.229.23:32:36.62#ibcon#about to read 6, iclass 13, count 2 2006.229.23:32:36.62#ibcon#read 6, iclass 13, count 2 2006.229.23:32:36.62#ibcon#end of sib2, iclass 13, count 2 2006.229.23:32:36.62#ibcon#*after write, iclass 13, count 2 2006.229.23:32:36.62#ibcon#*before return 0, iclass 13, count 2 2006.229.23:32:36.62#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:36.62#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:36.62#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.23:32:36.62#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:36.62#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:36.74#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:36.74#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:36.74#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:32:36.74#ibcon#first serial, iclass 13, count 0 2006.229.23:32:36.74#ibcon#enter sib2, iclass 13, count 0 2006.229.23:32:36.74#ibcon#flushed, iclass 13, count 0 2006.229.23:32:36.74#ibcon#about to write, iclass 13, count 0 2006.229.23:32:36.74#ibcon#wrote, iclass 13, count 0 2006.229.23:32:36.74#ibcon#about to read 3, iclass 13, count 0 2006.229.23:32:36.76#ibcon#read 3, iclass 13, count 0 2006.229.23:32:36.76#ibcon#about to read 4, iclass 13, count 0 2006.229.23:32:36.76#ibcon#read 4, iclass 13, count 0 2006.229.23:32:36.76#ibcon#about to read 5, iclass 13, count 0 2006.229.23:32:36.76#ibcon#read 5, iclass 13, count 0 2006.229.23:32:36.76#ibcon#about to read 6, iclass 13, count 0 2006.229.23:32:36.76#ibcon#read 6, iclass 13, count 0 2006.229.23:32:36.76#ibcon#end of sib2, iclass 13, count 0 2006.229.23:32:36.76#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:32:36.76#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:32:36.76#ibcon#[25=USB\r\n] 2006.229.23:32:36.76#ibcon#*before write, iclass 13, count 0 2006.229.23:32:36.76#ibcon#enter sib2, iclass 13, count 0 2006.229.23:32:36.76#ibcon#flushed, iclass 13, count 0 2006.229.23:32:36.76#ibcon#about to write, iclass 13, count 0 2006.229.23:32:36.76#ibcon#wrote, iclass 13, count 0 2006.229.23:32:36.76#ibcon#about to read 3, iclass 13, count 0 2006.229.23:32:36.79#ibcon#read 3, iclass 13, count 0 2006.229.23:32:36.79#ibcon#about to read 4, iclass 13, count 0 2006.229.23:32:36.79#ibcon#read 4, iclass 13, count 0 2006.229.23:32:36.79#ibcon#about to read 5, iclass 13, count 0 2006.229.23:32:36.79#ibcon#read 5, iclass 13, count 0 2006.229.23:32:36.79#ibcon#about to read 6, iclass 13, count 0 2006.229.23:32:36.79#ibcon#read 6, iclass 13, count 0 2006.229.23:32:36.79#ibcon#end of sib2, iclass 13, count 0 2006.229.23:32:36.79#ibcon#*after write, iclass 13, count 0 2006.229.23:32:36.79#ibcon#*before return 0, iclass 13, count 0 2006.229.23:32:36.79#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:36.79#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:36.79#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:32:36.79#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:32:36.79$vck44/valo=3,564.99 2006.229.23:32:36.79#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.23:32:36.79#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.23:32:36.79#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:36.79#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:32:36.79#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:32:36.79#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:32:36.79#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:32:36.79#ibcon#first serial, iclass 15, count 0 2006.229.23:32:36.79#ibcon#enter sib2, iclass 15, count 0 2006.229.23:32:36.79#ibcon#flushed, iclass 15, count 0 2006.229.23:32:36.79#ibcon#about to write, iclass 15, count 0 2006.229.23:32:36.79#ibcon#wrote, iclass 15, count 0 2006.229.23:32:36.79#ibcon#about to read 3, iclass 15, count 0 2006.229.23:32:36.81#ibcon#read 3, iclass 15, count 0 2006.229.23:32:36.81#ibcon#about to read 4, iclass 15, count 0 2006.229.23:32:36.81#ibcon#read 4, iclass 15, count 0 2006.229.23:32:36.81#ibcon#about to read 5, iclass 15, count 0 2006.229.23:32:36.81#ibcon#read 5, iclass 15, count 0 2006.229.23:32:36.81#ibcon#about to read 6, iclass 15, count 0 2006.229.23:32:36.81#ibcon#read 6, iclass 15, count 0 2006.229.23:32:36.81#ibcon#end of sib2, iclass 15, count 0 2006.229.23:32:36.81#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:32:36.81#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:32:36.81#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:32:36.81#ibcon#*before write, iclass 15, count 0 2006.229.23:32:36.81#ibcon#enter sib2, iclass 15, count 0 2006.229.23:32:36.81#ibcon#flushed, iclass 15, count 0 2006.229.23:32:36.81#ibcon#about to write, iclass 15, count 0 2006.229.23:32:36.81#ibcon#wrote, iclass 15, count 0 2006.229.23:32:36.81#ibcon#about to read 3, iclass 15, count 0 2006.229.23:32:36.85#ibcon#read 3, iclass 15, count 0 2006.229.23:32:36.85#ibcon#about to read 4, iclass 15, count 0 2006.229.23:32:36.85#ibcon#read 4, iclass 15, count 0 2006.229.23:32:36.85#ibcon#about to read 5, iclass 15, count 0 2006.229.23:32:36.85#ibcon#read 5, iclass 15, count 0 2006.229.23:32:36.85#ibcon#about to read 6, iclass 15, count 0 2006.229.23:32:36.85#ibcon#read 6, iclass 15, count 0 2006.229.23:32:36.85#ibcon#end of sib2, iclass 15, count 0 2006.229.23:32:36.85#ibcon#*after write, iclass 15, count 0 2006.229.23:32:36.85#ibcon#*before return 0, iclass 15, count 0 2006.229.23:32:36.85#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:32:36.85#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:32:36.85#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:32:36.85#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:32:36.85$vck44/va=3,6 2006.229.23:32:36.85#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.23:32:36.85#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.23:32:36.85#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:36.85#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:32:36.91#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:32:36.91#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:32:36.91#ibcon#enter wrdev, iclass 17, count 2 2006.229.23:32:36.91#ibcon#first serial, iclass 17, count 2 2006.229.23:32:36.91#ibcon#enter sib2, iclass 17, count 2 2006.229.23:32:36.91#ibcon#flushed, iclass 17, count 2 2006.229.23:32:36.91#ibcon#about to write, iclass 17, count 2 2006.229.23:32:36.91#ibcon#wrote, iclass 17, count 2 2006.229.23:32:36.91#ibcon#about to read 3, iclass 17, count 2 2006.229.23:32:36.93#ibcon#read 3, iclass 17, count 2 2006.229.23:32:36.93#ibcon#about to read 4, iclass 17, count 2 2006.229.23:32:36.93#ibcon#read 4, iclass 17, count 2 2006.229.23:32:36.93#ibcon#about to read 5, iclass 17, count 2 2006.229.23:32:36.93#ibcon#read 5, iclass 17, count 2 2006.229.23:32:36.93#ibcon#about to read 6, iclass 17, count 2 2006.229.23:32:36.93#ibcon#read 6, iclass 17, count 2 2006.229.23:32:36.93#ibcon#end of sib2, iclass 17, count 2 2006.229.23:32:36.93#ibcon#*mode == 0, iclass 17, count 2 2006.229.23:32:36.93#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.23:32:36.93#ibcon#[25=AT03-06\r\n] 2006.229.23:32:36.93#ibcon#*before write, iclass 17, count 2 2006.229.23:32:36.93#ibcon#enter sib2, iclass 17, count 2 2006.229.23:32:36.93#ibcon#flushed, iclass 17, count 2 2006.229.23:32:36.93#ibcon#about to write, iclass 17, count 2 2006.229.23:32:36.93#ibcon#wrote, iclass 17, count 2 2006.229.23:32:36.93#ibcon#about to read 3, iclass 17, count 2 2006.229.23:32:36.96#ibcon#read 3, iclass 17, count 2 2006.229.23:32:36.96#ibcon#about to read 4, iclass 17, count 2 2006.229.23:32:36.96#ibcon#read 4, iclass 17, count 2 2006.229.23:32:36.96#ibcon#about to read 5, iclass 17, count 2 2006.229.23:32:36.96#ibcon#read 5, iclass 17, count 2 2006.229.23:32:36.96#ibcon#about to read 6, iclass 17, count 2 2006.229.23:32:36.96#ibcon#read 6, iclass 17, count 2 2006.229.23:32:36.96#ibcon#end of sib2, iclass 17, count 2 2006.229.23:32:36.96#ibcon#*after write, iclass 17, count 2 2006.229.23:32:36.96#ibcon#*before return 0, iclass 17, count 2 2006.229.23:32:36.96#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:32:36.96#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:32:36.96#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.23:32:36.96#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:36.96#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:32:37.08#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:32:37.08#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:32:37.08#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:32:37.08#ibcon#first serial, iclass 17, count 0 2006.229.23:32:37.08#ibcon#enter sib2, iclass 17, count 0 2006.229.23:32:37.08#ibcon#flushed, iclass 17, count 0 2006.229.23:32:37.08#ibcon#about to write, iclass 17, count 0 2006.229.23:32:37.08#ibcon#wrote, iclass 17, count 0 2006.229.23:32:37.08#ibcon#about to read 3, iclass 17, count 0 2006.229.23:32:37.10#ibcon#read 3, iclass 17, count 0 2006.229.23:32:37.10#ibcon#about to read 4, iclass 17, count 0 2006.229.23:32:37.10#ibcon#read 4, iclass 17, count 0 2006.229.23:32:37.10#ibcon#about to read 5, iclass 17, count 0 2006.229.23:32:37.10#ibcon#read 5, iclass 17, count 0 2006.229.23:32:37.10#ibcon#about to read 6, iclass 17, count 0 2006.229.23:32:37.10#ibcon#read 6, iclass 17, count 0 2006.229.23:32:37.10#ibcon#end of sib2, iclass 17, count 0 2006.229.23:32:37.10#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:32:37.10#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:32:37.10#ibcon#[25=USB\r\n] 2006.229.23:32:37.10#ibcon#*before write, iclass 17, count 0 2006.229.23:32:37.10#ibcon#enter sib2, iclass 17, count 0 2006.229.23:32:37.10#ibcon#flushed, iclass 17, count 0 2006.229.23:32:37.10#ibcon#about to write, iclass 17, count 0 2006.229.23:32:37.10#ibcon#wrote, iclass 17, count 0 2006.229.23:32:37.10#ibcon#about to read 3, iclass 17, count 0 2006.229.23:32:37.13#ibcon#read 3, iclass 17, count 0 2006.229.23:32:37.13#ibcon#about to read 4, iclass 17, count 0 2006.229.23:32:37.13#ibcon#read 4, iclass 17, count 0 2006.229.23:32:37.13#ibcon#about to read 5, iclass 17, count 0 2006.229.23:32:37.13#ibcon#read 5, iclass 17, count 0 2006.229.23:32:37.13#ibcon#about to read 6, iclass 17, count 0 2006.229.23:32:37.13#ibcon#read 6, iclass 17, count 0 2006.229.23:32:37.13#ibcon#end of sib2, iclass 17, count 0 2006.229.23:32:37.13#ibcon#*after write, iclass 17, count 0 2006.229.23:32:37.13#ibcon#*before return 0, iclass 17, count 0 2006.229.23:32:37.13#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:32:37.13#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:32:37.13#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:32:37.13#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:32:37.13$vck44/valo=4,624.99 2006.229.23:32:37.13#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.23:32:37.13#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.23:32:37.13#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:37.13#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:32:37.13#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:32:37.13#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:32:37.13#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:32:37.13#ibcon#first serial, iclass 19, count 0 2006.229.23:32:37.13#ibcon#enter sib2, iclass 19, count 0 2006.229.23:32:37.13#ibcon#flushed, iclass 19, count 0 2006.229.23:32:37.13#ibcon#about to write, iclass 19, count 0 2006.229.23:32:37.13#ibcon#wrote, iclass 19, count 0 2006.229.23:32:37.13#ibcon#about to read 3, iclass 19, count 0 2006.229.23:32:37.15#ibcon#read 3, iclass 19, count 0 2006.229.23:32:37.15#ibcon#about to read 4, iclass 19, count 0 2006.229.23:32:37.15#ibcon#read 4, iclass 19, count 0 2006.229.23:32:37.15#ibcon#about to read 5, iclass 19, count 0 2006.229.23:32:37.15#ibcon#read 5, iclass 19, count 0 2006.229.23:32:37.15#ibcon#about to read 6, iclass 19, count 0 2006.229.23:32:37.15#ibcon#read 6, iclass 19, count 0 2006.229.23:32:37.15#ibcon#end of sib2, iclass 19, count 0 2006.229.23:32:37.15#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:32:37.15#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:32:37.15#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:32:37.15#ibcon#*before write, iclass 19, count 0 2006.229.23:32:37.15#ibcon#enter sib2, iclass 19, count 0 2006.229.23:32:37.15#ibcon#flushed, iclass 19, count 0 2006.229.23:32:37.15#ibcon#about to write, iclass 19, count 0 2006.229.23:32:37.15#ibcon#wrote, iclass 19, count 0 2006.229.23:32:37.15#ibcon#about to read 3, iclass 19, count 0 2006.229.23:32:37.19#ibcon#read 3, iclass 19, count 0 2006.229.23:32:37.19#ibcon#about to read 4, iclass 19, count 0 2006.229.23:32:37.19#ibcon#read 4, iclass 19, count 0 2006.229.23:32:37.19#ibcon#about to read 5, iclass 19, count 0 2006.229.23:32:37.19#ibcon#read 5, iclass 19, count 0 2006.229.23:32:37.19#ibcon#about to read 6, iclass 19, count 0 2006.229.23:32:37.19#ibcon#read 6, iclass 19, count 0 2006.229.23:32:37.19#ibcon#end of sib2, iclass 19, count 0 2006.229.23:32:37.19#ibcon#*after write, iclass 19, count 0 2006.229.23:32:37.19#ibcon#*before return 0, iclass 19, count 0 2006.229.23:32:37.19#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:32:37.19#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:32:37.19#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:32:37.19#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:32:37.19$vck44/va=4,7 2006.229.23:32:37.19#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.23:32:37.19#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.23:32:37.19#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:37.19#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:37.25#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:37.25#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:37.25#ibcon#enter wrdev, iclass 21, count 2 2006.229.23:32:37.25#ibcon#first serial, iclass 21, count 2 2006.229.23:32:37.25#ibcon#enter sib2, iclass 21, count 2 2006.229.23:32:37.25#ibcon#flushed, iclass 21, count 2 2006.229.23:32:37.25#ibcon#about to write, iclass 21, count 2 2006.229.23:32:37.25#ibcon#wrote, iclass 21, count 2 2006.229.23:32:37.25#ibcon#about to read 3, iclass 21, count 2 2006.229.23:32:37.27#ibcon#read 3, iclass 21, count 2 2006.229.23:32:37.27#ibcon#about to read 4, iclass 21, count 2 2006.229.23:32:37.27#ibcon#read 4, iclass 21, count 2 2006.229.23:32:37.27#ibcon#about to read 5, iclass 21, count 2 2006.229.23:32:37.27#ibcon#read 5, iclass 21, count 2 2006.229.23:32:37.27#ibcon#about to read 6, iclass 21, count 2 2006.229.23:32:37.27#ibcon#read 6, iclass 21, count 2 2006.229.23:32:37.27#ibcon#end of sib2, iclass 21, count 2 2006.229.23:32:37.27#ibcon#*mode == 0, iclass 21, count 2 2006.229.23:32:37.27#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.23:32:37.27#ibcon#[25=AT04-07\r\n] 2006.229.23:32:37.27#ibcon#*before write, iclass 21, count 2 2006.229.23:32:37.27#ibcon#enter sib2, iclass 21, count 2 2006.229.23:32:37.27#ibcon#flushed, iclass 21, count 2 2006.229.23:32:37.27#ibcon#about to write, iclass 21, count 2 2006.229.23:32:37.27#ibcon#wrote, iclass 21, count 2 2006.229.23:32:37.27#ibcon#about to read 3, iclass 21, count 2 2006.229.23:32:37.30#ibcon#read 3, iclass 21, count 2 2006.229.23:32:37.30#ibcon#about to read 4, iclass 21, count 2 2006.229.23:32:37.30#ibcon#read 4, iclass 21, count 2 2006.229.23:32:37.30#ibcon#about to read 5, iclass 21, count 2 2006.229.23:32:37.30#ibcon#read 5, iclass 21, count 2 2006.229.23:32:37.30#ibcon#about to read 6, iclass 21, count 2 2006.229.23:32:37.30#ibcon#read 6, iclass 21, count 2 2006.229.23:32:37.30#ibcon#end of sib2, iclass 21, count 2 2006.229.23:32:37.30#ibcon#*after write, iclass 21, count 2 2006.229.23:32:37.30#ibcon#*before return 0, iclass 21, count 2 2006.229.23:32:37.30#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:37.30#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:37.30#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.23:32:37.30#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:37.30#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:37.42#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:37.42#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:37.42#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:32:37.42#ibcon#first serial, iclass 21, count 0 2006.229.23:32:37.42#ibcon#enter sib2, iclass 21, count 0 2006.229.23:32:37.42#ibcon#flushed, iclass 21, count 0 2006.229.23:32:37.42#ibcon#about to write, iclass 21, count 0 2006.229.23:32:37.42#ibcon#wrote, iclass 21, count 0 2006.229.23:32:37.42#ibcon#about to read 3, iclass 21, count 0 2006.229.23:32:37.44#ibcon#read 3, iclass 21, count 0 2006.229.23:32:37.44#ibcon#about to read 4, iclass 21, count 0 2006.229.23:32:37.44#ibcon#read 4, iclass 21, count 0 2006.229.23:32:37.44#ibcon#about to read 5, iclass 21, count 0 2006.229.23:32:37.44#ibcon#read 5, iclass 21, count 0 2006.229.23:32:37.44#ibcon#about to read 6, iclass 21, count 0 2006.229.23:32:37.44#ibcon#read 6, iclass 21, count 0 2006.229.23:32:37.44#ibcon#end of sib2, iclass 21, count 0 2006.229.23:32:37.44#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:32:37.44#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:32:37.44#ibcon#[25=USB\r\n] 2006.229.23:32:37.44#ibcon#*before write, iclass 21, count 0 2006.229.23:32:37.44#ibcon#enter sib2, iclass 21, count 0 2006.229.23:32:37.44#ibcon#flushed, iclass 21, count 0 2006.229.23:32:37.44#ibcon#about to write, iclass 21, count 0 2006.229.23:32:37.44#ibcon#wrote, iclass 21, count 0 2006.229.23:32:37.44#ibcon#about to read 3, iclass 21, count 0 2006.229.23:32:37.47#ibcon#read 3, iclass 21, count 0 2006.229.23:32:37.47#ibcon#about to read 4, iclass 21, count 0 2006.229.23:32:37.47#ibcon#read 4, iclass 21, count 0 2006.229.23:32:37.47#ibcon#about to read 5, iclass 21, count 0 2006.229.23:32:37.47#ibcon#read 5, iclass 21, count 0 2006.229.23:32:37.47#ibcon#about to read 6, iclass 21, count 0 2006.229.23:32:37.47#ibcon#read 6, iclass 21, count 0 2006.229.23:32:37.47#ibcon#end of sib2, iclass 21, count 0 2006.229.23:32:37.47#ibcon#*after write, iclass 21, count 0 2006.229.23:32:37.47#ibcon#*before return 0, iclass 21, count 0 2006.229.23:32:37.47#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:37.47#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:37.47#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:32:37.47#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:32:37.47$vck44/valo=5,734.99 2006.229.23:32:37.47#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.23:32:37.47#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.23:32:37.47#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:37.47#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:37.47#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:37.47#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:37.47#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:32:37.47#ibcon#first serial, iclass 23, count 0 2006.229.23:32:37.47#ibcon#enter sib2, iclass 23, count 0 2006.229.23:32:37.47#ibcon#flushed, iclass 23, count 0 2006.229.23:32:37.47#ibcon#about to write, iclass 23, count 0 2006.229.23:32:37.47#ibcon#wrote, iclass 23, count 0 2006.229.23:32:37.47#ibcon#about to read 3, iclass 23, count 0 2006.229.23:32:37.49#ibcon#read 3, iclass 23, count 0 2006.229.23:32:37.49#ibcon#about to read 4, iclass 23, count 0 2006.229.23:32:37.49#ibcon#read 4, iclass 23, count 0 2006.229.23:32:37.49#ibcon#about to read 5, iclass 23, count 0 2006.229.23:32:37.49#ibcon#read 5, iclass 23, count 0 2006.229.23:32:37.49#ibcon#about to read 6, iclass 23, count 0 2006.229.23:32:37.49#ibcon#read 6, iclass 23, count 0 2006.229.23:32:37.49#ibcon#end of sib2, iclass 23, count 0 2006.229.23:32:37.49#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:32:37.49#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:32:37.49#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:32:37.49#ibcon#*before write, iclass 23, count 0 2006.229.23:32:37.49#ibcon#enter sib2, iclass 23, count 0 2006.229.23:32:37.49#ibcon#flushed, iclass 23, count 0 2006.229.23:32:37.49#ibcon#about to write, iclass 23, count 0 2006.229.23:32:37.49#ibcon#wrote, iclass 23, count 0 2006.229.23:32:37.49#ibcon#about to read 3, iclass 23, count 0 2006.229.23:32:37.53#ibcon#read 3, iclass 23, count 0 2006.229.23:32:37.53#ibcon#about to read 4, iclass 23, count 0 2006.229.23:32:37.53#ibcon#read 4, iclass 23, count 0 2006.229.23:32:37.53#ibcon#about to read 5, iclass 23, count 0 2006.229.23:32:37.53#ibcon#read 5, iclass 23, count 0 2006.229.23:32:37.53#ibcon#about to read 6, iclass 23, count 0 2006.229.23:32:37.53#ibcon#read 6, iclass 23, count 0 2006.229.23:32:37.53#ibcon#end of sib2, iclass 23, count 0 2006.229.23:32:37.53#ibcon#*after write, iclass 23, count 0 2006.229.23:32:37.53#ibcon#*before return 0, iclass 23, count 0 2006.229.23:32:37.53#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:37.53#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:37.53#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:32:37.53#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:32:37.53$vck44/va=5,4 2006.229.23:32:37.53#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.23:32:37.53#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.23:32:37.53#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:37.53#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:37.59#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:37.59#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:37.59#ibcon#enter wrdev, iclass 25, count 2 2006.229.23:32:37.59#ibcon#first serial, iclass 25, count 2 2006.229.23:32:37.59#ibcon#enter sib2, iclass 25, count 2 2006.229.23:32:37.59#ibcon#flushed, iclass 25, count 2 2006.229.23:32:37.59#ibcon#about to write, iclass 25, count 2 2006.229.23:32:37.59#ibcon#wrote, iclass 25, count 2 2006.229.23:32:37.59#ibcon#about to read 3, iclass 25, count 2 2006.229.23:32:37.61#ibcon#read 3, iclass 25, count 2 2006.229.23:32:37.61#ibcon#about to read 4, iclass 25, count 2 2006.229.23:32:37.61#ibcon#read 4, iclass 25, count 2 2006.229.23:32:37.61#ibcon#about to read 5, iclass 25, count 2 2006.229.23:32:37.61#ibcon#read 5, iclass 25, count 2 2006.229.23:32:37.61#ibcon#about to read 6, iclass 25, count 2 2006.229.23:32:37.61#ibcon#read 6, iclass 25, count 2 2006.229.23:32:37.61#ibcon#end of sib2, iclass 25, count 2 2006.229.23:32:37.61#ibcon#*mode == 0, iclass 25, count 2 2006.229.23:32:37.61#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.23:32:37.61#ibcon#[25=AT05-04\r\n] 2006.229.23:32:37.61#ibcon#*before write, iclass 25, count 2 2006.229.23:32:37.61#ibcon#enter sib2, iclass 25, count 2 2006.229.23:32:37.61#ibcon#flushed, iclass 25, count 2 2006.229.23:32:37.61#ibcon#about to write, iclass 25, count 2 2006.229.23:32:37.61#ibcon#wrote, iclass 25, count 2 2006.229.23:32:37.61#ibcon#about to read 3, iclass 25, count 2 2006.229.23:32:37.64#ibcon#read 3, iclass 25, count 2 2006.229.23:32:37.64#ibcon#about to read 4, iclass 25, count 2 2006.229.23:32:37.64#ibcon#read 4, iclass 25, count 2 2006.229.23:32:37.64#ibcon#about to read 5, iclass 25, count 2 2006.229.23:32:37.64#ibcon#read 5, iclass 25, count 2 2006.229.23:32:37.64#ibcon#about to read 6, iclass 25, count 2 2006.229.23:32:37.64#ibcon#read 6, iclass 25, count 2 2006.229.23:32:37.64#ibcon#end of sib2, iclass 25, count 2 2006.229.23:32:37.64#ibcon#*after write, iclass 25, count 2 2006.229.23:32:37.64#ibcon#*before return 0, iclass 25, count 2 2006.229.23:32:37.64#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:37.64#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:37.64#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.23:32:37.64#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:37.64#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:37.76#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:37.76#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:37.76#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:32:37.76#ibcon#first serial, iclass 25, count 0 2006.229.23:32:37.76#ibcon#enter sib2, iclass 25, count 0 2006.229.23:32:37.76#ibcon#flushed, iclass 25, count 0 2006.229.23:32:37.76#ibcon#about to write, iclass 25, count 0 2006.229.23:32:37.76#ibcon#wrote, iclass 25, count 0 2006.229.23:32:37.76#ibcon#about to read 3, iclass 25, count 0 2006.229.23:32:37.78#ibcon#read 3, iclass 25, count 0 2006.229.23:32:37.78#ibcon#about to read 4, iclass 25, count 0 2006.229.23:32:37.78#ibcon#read 4, iclass 25, count 0 2006.229.23:32:37.78#ibcon#about to read 5, iclass 25, count 0 2006.229.23:32:37.78#ibcon#read 5, iclass 25, count 0 2006.229.23:32:37.78#ibcon#about to read 6, iclass 25, count 0 2006.229.23:32:37.78#ibcon#read 6, iclass 25, count 0 2006.229.23:32:37.78#ibcon#end of sib2, iclass 25, count 0 2006.229.23:32:37.78#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:32:37.78#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:32:37.78#ibcon#[25=USB\r\n] 2006.229.23:32:37.78#ibcon#*before write, iclass 25, count 0 2006.229.23:32:37.78#ibcon#enter sib2, iclass 25, count 0 2006.229.23:32:37.78#ibcon#flushed, iclass 25, count 0 2006.229.23:32:37.78#ibcon#about to write, iclass 25, count 0 2006.229.23:32:37.78#ibcon#wrote, iclass 25, count 0 2006.229.23:32:37.78#ibcon#about to read 3, iclass 25, count 0 2006.229.23:32:37.81#ibcon#read 3, iclass 25, count 0 2006.229.23:32:37.81#ibcon#about to read 4, iclass 25, count 0 2006.229.23:32:37.81#ibcon#read 4, iclass 25, count 0 2006.229.23:32:37.81#ibcon#about to read 5, iclass 25, count 0 2006.229.23:32:37.81#ibcon#read 5, iclass 25, count 0 2006.229.23:32:37.81#ibcon#about to read 6, iclass 25, count 0 2006.229.23:32:37.81#ibcon#read 6, iclass 25, count 0 2006.229.23:32:37.81#ibcon#end of sib2, iclass 25, count 0 2006.229.23:32:37.81#ibcon#*after write, iclass 25, count 0 2006.229.23:32:37.81#ibcon#*before return 0, iclass 25, count 0 2006.229.23:32:37.81#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:37.81#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:37.81#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:32:37.81#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:32:37.81$vck44/valo=6,814.99 2006.229.23:32:37.81#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.23:32:37.81#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.23:32:37.81#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:37.81#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:37.81#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:37.81#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:37.81#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:32:37.81#ibcon#first serial, iclass 27, count 0 2006.229.23:32:37.81#ibcon#enter sib2, iclass 27, count 0 2006.229.23:32:37.81#ibcon#flushed, iclass 27, count 0 2006.229.23:32:37.81#ibcon#about to write, iclass 27, count 0 2006.229.23:32:37.81#ibcon#wrote, iclass 27, count 0 2006.229.23:32:37.81#ibcon#about to read 3, iclass 27, count 0 2006.229.23:32:37.83#ibcon#read 3, iclass 27, count 0 2006.229.23:32:37.83#ibcon#about to read 4, iclass 27, count 0 2006.229.23:32:37.83#ibcon#read 4, iclass 27, count 0 2006.229.23:32:37.83#ibcon#about to read 5, iclass 27, count 0 2006.229.23:32:37.83#ibcon#read 5, iclass 27, count 0 2006.229.23:32:37.83#ibcon#about to read 6, iclass 27, count 0 2006.229.23:32:37.83#ibcon#read 6, iclass 27, count 0 2006.229.23:32:37.83#ibcon#end of sib2, iclass 27, count 0 2006.229.23:32:37.83#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:32:37.83#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:32:37.83#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:32:37.83#ibcon#*before write, iclass 27, count 0 2006.229.23:32:37.83#ibcon#enter sib2, iclass 27, count 0 2006.229.23:32:37.83#ibcon#flushed, iclass 27, count 0 2006.229.23:32:37.83#ibcon#about to write, iclass 27, count 0 2006.229.23:32:37.83#ibcon#wrote, iclass 27, count 0 2006.229.23:32:37.83#ibcon#about to read 3, iclass 27, count 0 2006.229.23:32:37.87#ibcon#read 3, iclass 27, count 0 2006.229.23:32:37.87#ibcon#about to read 4, iclass 27, count 0 2006.229.23:32:37.87#ibcon#read 4, iclass 27, count 0 2006.229.23:32:37.87#ibcon#about to read 5, iclass 27, count 0 2006.229.23:32:37.87#ibcon#read 5, iclass 27, count 0 2006.229.23:32:37.87#ibcon#about to read 6, iclass 27, count 0 2006.229.23:32:37.87#ibcon#read 6, iclass 27, count 0 2006.229.23:32:37.87#ibcon#end of sib2, iclass 27, count 0 2006.229.23:32:37.87#ibcon#*after write, iclass 27, count 0 2006.229.23:32:37.87#ibcon#*before return 0, iclass 27, count 0 2006.229.23:32:37.87#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:37.87#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:37.87#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:32:37.87#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:32:37.87$vck44/va=6,4 2006.229.23:32:37.87#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.23:32:37.87#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.23:32:37.87#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:37.87#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:37.93#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:37.93#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:37.93#ibcon#enter wrdev, iclass 29, count 2 2006.229.23:32:37.93#ibcon#first serial, iclass 29, count 2 2006.229.23:32:37.93#ibcon#enter sib2, iclass 29, count 2 2006.229.23:32:37.93#ibcon#flushed, iclass 29, count 2 2006.229.23:32:37.93#ibcon#about to write, iclass 29, count 2 2006.229.23:32:37.93#ibcon#wrote, iclass 29, count 2 2006.229.23:32:37.93#ibcon#about to read 3, iclass 29, count 2 2006.229.23:32:37.95#ibcon#read 3, iclass 29, count 2 2006.229.23:32:37.95#ibcon#about to read 4, iclass 29, count 2 2006.229.23:32:37.95#ibcon#read 4, iclass 29, count 2 2006.229.23:32:37.95#ibcon#about to read 5, iclass 29, count 2 2006.229.23:32:37.95#ibcon#read 5, iclass 29, count 2 2006.229.23:32:37.95#ibcon#about to read 6, iclass 29, count 2 2006.229.23:32:37.95#ibcon#read 6, iclass 29, count 2 2006.229.23:32:37.95#ibcon#end of sib2, iclass 29, count 2 2006.229.23:32:37.95#ibcon#*mode == 0, iclass 29, count 2 2006.229.23:32:37.95#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.23:32:37.95#ibcon#[25=AT06-04\r\n] 2006.229.23:32:37.95#ibcon#*before write, iclass 29, count 2 2006.229.23:32:37.95#ibcon#enter sib2, iclass 29, count 2 2006.229.23:32:37.95#ibcon#flushed, iclass 29, count 2 2006.229.23:32:37.95#ibcon#about to write, iclass 29, count 2 2006.229.23:32:37.95#ibcon#wrote, iclass 29, count 2 2006.229.23:32:37.95#ibcon#about to read 3, iclass 29, count 2 2006.229.23:32:37.98#ibcon#read 3, iclass 29, count 2 2006.229.23:32:37.98#ibcon#about to read 4, iclass 29, count 2 2006.229.23:32:37.98#ibcon#read 4, iclass 29, count 2 2006.229.23:32:37.98#ibcon#about to read 5, iclass 29, count 2 2006.229.23:32:37.98#ibcon#read 5, iclass 29, count 2 2006.229.23:32:37.98#ibcon#about to read 6, iclass 29, count 2 2006.229.23:32:37.98#ibcon#read 6, iclass 29, count 2 2006.229.23:32:37.98#ibcon#end of sib2, iclass 29, count 2 2006.229.23:32:37.98#ibcon#*after write, iclass 29, count 2 2006.229.23:32:37.98#ibcon#*before return 0, iclass 29, count 2 2006.229.23:32:37.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:37.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:37.98#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.23:32:37.98#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:37.98#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:38.10#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:38.10#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:38.10#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:32:38.10#ibcon#first serial, iclass 29, count 0 2006.229.23:32:38.10#ibcon#enter sib2, iclass 29, count 0 2006.229.23:32:38.10#ibcon#flushed, iclass 29, count 0 2006.229.23:32:38.10#ibcon#about to write, iclass 29, count 0 2006.229.23:32:38.10#ibcon#wrote, iclass 29, count 0 2006.229.23:32:38.10#ibcon#about to read 3, iclass 29, count 0 2006.229.23:32:38.12#ibcon#read 3, iclass 29, count 0 2006.229.23:32:38.12#ibcon#about to read 4, iclass 29, count 0 2006.229.23:32:38.12#ibcon#read 4, iclass 29, count 0 2006.229.23:32:38.12#ibcon#about to read 5, iclass 29, count 0 2006.229.23:32:38.12#ibcon#read 5, iclass 29, count 0 2006.229.23:32:38.12#ibcon#about to read 6, iclass 29, count 0 2006.229.23:32:38.12#ibcon#read 6, iclass 29, count 0 2006.229.23:32:38.12#ibcon#end of sib2, iclass 29, count 0 2006.229.23:32:38.12#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:32:38.12#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:32:38.12#ibcon#[25=USB\r\n] 2006.229.23:32:38.12#ibcon#*before write, iclass 29, count 0 2006.229.23:32:38.12#ibcon#enter sib2, iclass 29, count 0 2006.229.23:32:38.12#ibcon#flushed, iclass 29, count 0 2006.229.23:32:38.12#ibcon#about to write, iclass 29, count 0 2006.229.23:32:38.12#ibcon#wrote, iclass 29, count 0 2006.229.23:32:38.12#ibcon#about to read 3, iclass 29, count 0 2006.229.23:32:38.15#ibcon#read 3, iclass 29, count 0 2006.229.23:32:38.15#ibcon#about to read 4, iclass 29, count 0 2006.229.23:32:38.15#ibcon#read 4, iclass 29, count 0 2006.229.23:32:38.15#ibcon#about to read 5, iclass 29, count 0 2006.229.23:32:38.15#ibcon#read 5, iclass 29, count 0 2006.229.23:32:38.15#ibcon#about to read 6, iclass 29, count 0 2006.229.23:32:38.15#ibcon#read 6, iclass 29, count 0 2006.229.23:32:38.15#ibcon#end of sib2, iclass 29, count 0 2006.229.23:32:38.15#ibcon#*after write, iclass 29, count 0 2006.229.23:32:38.15#ibcon#*before return 0, iclass 29, count 0 2006.229.23:32:38.15#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:38.15#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:38.15#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:32:38.15#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:32:38.15$vck44/valo=7,864.99 2006.229.23:32:38.15#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:32:38.15#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:32:38.15#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:38.15#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:38.15#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:38.15#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:38.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:32:38.15#ibcon#first serial, iclass 31, count 0 2006.229.23:32:38.15#ibcon#enter sib2, iclass 31, count 0 2006.229.23:32:38.15#ibcon#flushed, iclass 31, count 0 2006.229.23:32:38.15#ibcon#about to write, iclass 31, count 0 2006.229.23:32:38.15#ibcon#wrote, iclass 31, count 0 2006.229.23:32:38.15#ibcon#about to read 3, iclass 31, count 0 2006.229.23:32:38.17#ibcon#read 3, iclass 31, count 0 2006.229.23:32:38.17#ibcon#about to read 4, iclass 31, count 0 2006.229.23:32:38.17#ibcon#read 4, iclass 31, count 0 2006.229.23:32:38.17#ibcon#about to read 5, iclass 31, count 0 2006.229.23:32:38.17#ibcon#read 5, iclass 31, count 0 2006.229.23:32:38.17#ibcon#about to read 6, iclass 31, count 0 2006.229.23:32:38.17#ibcon#read 6, iclass 31, count 0 2006.229.23:32:38.17#ibcon#end of sib2, iclass 31, count 0 2006.229.23:32:38.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:32:38.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:32:38.17#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:32:38.17#ibcon#*before write, iclass 31, count 0 2006.229.23:32:38.17#ibcon#enter sib2, iclass 31, count 0 2006.229.23:32:38.17#ibcon#flushed, iclass 31, count 0 2006.229.23:32:38.17#ibcon#about to write, iclass 31, count 0 2006.229.23:32:38.17#ibcon#wrote, iclass 31, count 0 2006.229.23:32:38.17#ibcon#about to read 3, iclass 31, count 0 2006.229.23:32:38.21#ibcon#read 3, iclass 31, count 0 2006.229.23:32:38.21#ibcon#about to read 4, iclass 31, count 0 2006.229.23:32:38.21#ibcon#read 4, iclass 31, count 0 2006.229.23:32:38.21#ibcon#about to read 5, iclass 31, count 0 2006.229.23:32:38.21#ibcon#read 5, iclass 31, count 0 2006.229.23:32:38.21#ibcon#about to read 6, iclass 31, count 0 2006.229.23:32:38.21#ibcon#read 6, iclass 31, count 0 2006.229.23:32:38.21#ibcon#end of sib2, iclass 31, count 0 2006.229.23:32:38.21#ibcon#*after write, iclass 31, count 0 2006.229.23:32:38.21#ibcon#*before return 0, iclass 31, count 0 2006.229.23:32:38.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:38.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:38.21#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:32:38.21#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:32:38.21$vck44/va=7,5 2006.229.23:32:38.21#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.23:32:38.21#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.23:32:38.21#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:38.21#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:38.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:38.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:38.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.23:32:38.27#ibcon#first serial, iclass 33, count 2 2006.229.23:32:38.27#ibcon#enter sib2, iclass 33, count 2 2006.229.23:32:38.27#ibcon#flushed, iclass 33, count 2 2006.229.23:32:38.27#ibcon#about to write, iclass 33, count 2 2006.229.23:32:38.27#ibcon#wrote, iclass 33, count 2 2006.229.23:32:38.27#ibcon#about to read 3, iclass 33, count 2 2006.229.23:32:38.29#ibcon#read 3, iclass 33, count 2 2006.229.23:32:38.29#ibcon#about to read 4, iclass 33, count 2 2006.229.23:32:38.29#ibcon#read 4, iclass 33, count 2 2006.229.23:32:38.29#ibcon#about to read 5, iclass 33, count 2 2006.229.23:32:38.29#ibcon#read 5, iclass 33, count 2 2006.229.23:32:38.29#ibcon#about to read 6, iclass 33, count 2 2006.229.23:32:38.29#ibcon#read 6, iclass 33, count 2 2006.229.23:32:38.29#ibcon#end of sib2, iclass 33, count 2 2006.229.23:32:38.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.23:32:38.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.23:32:38.29#ibcon#[25=AT07-05\r\n] 2006.229.23:32:38.29#ibcon#*before write, iclass 33, count 2 2006.229.23:32:38.29#ibcon#enter sib2, iclass 33, count 2 2006.229.23:32:38.29#ibcon#flushed, iclass 33, count 2 2006.229.23:32:38.29#ibcon#about to write, iclass 33, count 2 2006.229.23:32:38.29#ibcon#wrote, iclass 33, count 2 2006.229.23:32:38.29#ibcon#about to read 3, iclass 33, count 2 2006.229.23:32:38.32#ibcon#read 3, iclass 33, count 2 2006.229.23:32:38.32#ibcon#about to read 4, iclass 33, count 2 2006.229.23:32:38.32#ibcon#read 4, iclass 33, count 2 2006.229.23:32:38.32#ibcon#about to read 5, iclass 33, count 2 2006.229.23:32:38.32#ibcon#read 5, iclass 33, count 2 2006.229.23:32:38.32#ibcon#about to read 6, iclass 33, count 2 2006.229.23:32:38.32#ibcon#read 6, iclass 33, count 2 2006.229.23:32:38.32#ibcon#end of sib2, iclass 33, count 2 2006.229.23:32:38.32#ibcon#*after write, iclass 33, count 2 2006.229.23:32:38.32#ibcon#*before return 0, iclass 33, count 2 2006.229.23:32:38.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:38.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:38.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.23:32:38.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:38.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:38.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:38.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:38.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:32:38.44#ibcon#first serial, iclass 33, count 0 2006.229.23:32:38.44#ibcon#enter sib2, iclass 33, count 0 2006.229.23:32:38.44#ibcon#flushed, iclass 33, count 0 2006.229.23:32:38.44#ibcon#about to write, iclass 33, count 0 2006.229.23:32:38.44#ibcon#wrote, iclass 33, count 0 2006.229.23:32:38.44#ibcon#about to read 3, iclass 33, count 0 2006.229.23:32:38.46#ibcon#read 3, iclass 33, count 0 2006.229.23:32:38.46#ibcon#about to read 4, iclass 33, count 0 2006.229.23:32:38.46#ibcon#read 4, iclass 33, count 0 2006.229.23:32:38.46#ibcon#about to read 5, iclass 33, count 0 2006.229.23:32:38.46#ibcon#read 5, iclass 33, count 0 2006.229.23:32:38.46#ibcon#about to read 6, iclass 33, count 0 2006.229.23:32:38.46#ibcon#read 6, iclass 33, count 0 2006.229.23:32:38.46#ibcon#end of sib2, iclass 33, count 0 2006.229.23:32:38.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:32:38.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:32:38.46#ibcon#[25=USB\r\n] 2006.229.23:32:38.46#ibcon#*before write, iclass 33, count 0 2006.229.23:32:38.46#ibcon#enter sib2, iclass 33, count 0 2006.229.23:32:38.46#ibcon#flushed, iclass 33, count 0 2006.229.23:32:38.46#ibcon#about to write, iclass 33, count 0 2006.229.23:32:38.46#ibcon#wrote, iclass 33, count 0 2006.229.23:32:38.46#ibcon#about to read 3, iclass 33, count 0 2006.229.23:32:38.49#ibcon#read 3, iclass 33, count 0 2006.229.23:32:38.49#ibcon#about to read 4, iclass 33, count 0 2006.229.23:32:38.49#ibcon#read 4, iclass 33, count 0 2006.229.23:32:38.49#ibcon#about to read 5, iclass 33, count 0 2006.229.23:32:38.49#ibcon#read 5, iclass 33, count 0 2006.229.23:32:38.49#ibcon#about to read 6, iclass 33, count 0 2006.229.23:32:38.49#ibcon#read 6, iclass 33, count 0 2006.229.23:32:38.49#ibcon#end of sib2, iclass 33, count 0 2006.229.23:32:38.49#ibcon#*after write, iclass 33, count 0 2006.229.23:32:38.49#ibcon#*before return 0, iclass 33, count 0 2006.229.23:32:38.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:38.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:38.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:32:38.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:32:38.49$vck44/valo=8,884.99 2006.229.23:32:38.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:32:38.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:32:38.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:38.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:38.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:38.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:38.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:32:38.49#ibcon#first serial, iclass 35, count 0 2006.229.23:32:38.49#ibcon#enter sib2, iclass 35, count 0 2006.229.23:32:38.49#ibcon#flushed, iclass 35, count 0 2006.229.23:32:38.49#ibcon#about to write, iclass 35, count 0 2006.229.23:32:38.49#ibcon#wrote, iclass 35, count 0 2006.229.23:32:38.49#ibcon#about to read 3, iclass 35, count 0 2006.229.23:32:38.51#ibcon#read 3, iclass 35, count 0 2006.229.23:32:38.51#ibcon#about to read 4, iclass 35, count 0 2006.229.23:32:38.51#ibcon#read 4, iclass 35, count 0 2006.229.23:32:38.51#ibcon#about to read 5, iclass 35, count 0 2006.229.23:32:38.51#ibcon#read 5, iclass 35, count 0 2006.229.23:32:38.51#ibcon#about to read 6, iclass 35, count 0 2006.229.23:32:38.51#ibcon#read 6, iclass 35, count 0 2006.229.23:32:38.51#ibcon#end of sib2, iclass 35, count 0 2006.229.23:32:38.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:32:38.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:32:38.51#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:32:38.51#ibcon#*before write, iclass 35, count 0 2006.229.23:32:38.51#ibcon#enter sib2, iclass 35, count 0 2006.229.23:32:38.51#ibcon#flushed, iclass 35, count 0 2006.229.23:32:38.51#ibcon#about to write, iclass 35, count 0 2006.229.23:32:38.51#ibcon#wrote, iclass 35, count 0 2006.229.23:32:38.51#ibcon#about to read 3, iclass 35, count 0 2006.229.23:32:38.55#ibcon#read 3, iclass 35, count 0 2006.229.23:32:38.55#ibcon#about to read 4, iclass 35, count 0 2006.229.23:32:38.55#ibcon#read 4, iclass 35, count 0 2006.229.23:32:38.55#ibcon#about to read 5, iclass 35, count 0 2006.229.23:32:38.55#ibcon#read 5, iclass 35, count 0 2006.229.23:32:38.55#ibcon#about to read 6, iclass 35, count 0 2006.229.23:32:38.55#ibcon#read 6, iclass 35, count 0 2006.229.23:32:38.55#ibcon#end of sib2, iclass 35, count 0 2006.229.23:32:38.55#ibcon#*after write, iclass 35, count 0 2006.229.23:32:38.55#ibcon#*before return 0, iclass 35, count 0 2006.229.23:32:38.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:38.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:38.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:32:38.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:32:38.55$vck44/va=8,6 2006.229.23:32:38.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.23:32:38.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.23:32:38.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:38.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:38.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:38.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:38.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.23:32:38.61#ibcon#first serial, iclass 37, count 2 2006.229.23:32:38.61#ibcon#enter sib2, iclass 37, count 2 2006.229.23:32:38.61#ibcon#flushed, iclass 37, count 2 2006.229.23:32:38.61#ibcon#about to write, iclass 37, count 2 2006.229.23:32:38.61#ibcon#wrote, iclass 37, count 2 2006.229.23:32:38.61#ibcon#about to read 3, iclass 37, count 2 2006.229.23:32:38.63#ibcon#read 3, iclass 37, count 2 2006.229.23:32:38.63#ibcon#about to read 4, iclass 37, count 2 2006.229.23:32:38.63#ibcon#read 4, iclass 37, count 2 2006.229.23:32:38.63#ibcon#about to read 5, iclass 37, count 2 2006.229.23:32:38.63#ibcon#read 5, iclass 37, count 2 2006.229.23:32:38.63#ibcon#about to read 6, iclass 37, count 2 2006.229.23:32:38.63#ibcon#read 6, iclass 37, count 2 2006.229.23:32:38.63#ibcon#end of sib2, iclass 37, count 2 2006.229.23:32:38.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.23:32:38.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.23:32:38.63#ibcon#[25=AT08-06\r\n] 2006.229.23:32:38.63#ibcon#*before write, iclass 37, count 2 2006.229.23:32:38.63#ibcon#enter sib2, iclass 37, count 2 2006.229.23:32:38.63#ibcon#flushed, iclass 37, count 2 2006.229.23:32:38.63#ibcon#about to write, iclass 37, count 2 2006.229.23:32:38.63#ibcon#wrote, iclass 37, count 2 2006.229.23:32:38.63#ibcon#about to read 3, iclass 37, count 2 2006.229.23:32:38.66#ibcon#read 3, iclass 37, count 2 2006.229.23:32:38.66#ibcon#about to read 4, iclass 37, count 2 2006.229.23:32:38.66#ibcon#read 4, iclass 37, count 2 2006.229.23:32:38.66#ibcon#about to read 5, iclass 37, count 2 2006.229.23:32:38.66#ibcon#read 5, iclass 37, count 2 2006.229.23:32:38.66#ibcon#about to read 6, iclass 37, count 2 2006.229.23:32:38.66#ibcon#read 6, iclass 37, count 2 2006.229.23:32:38.66#ibcon#end of sib2, iclass 37, count 2 2006.229.23:32:38.66#ibcon#*after write, iclass 37, count 2 2006.229.23:32:38.66#ibcon#*before return 0, iclass 37, count 2 2006.229.23:32:38.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:38.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:38.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.23:32:38.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:38.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:38.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:38.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:38.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:32:38.78#ibcon#first serial, iclass 37, count 0 2006.229.23:32:38.78#ibcon#enter sib2, iclass 37, count 0 2006.229.23:32:38.78#ibcon#flushed, iclass 37, count 0 2006.229.23:32:38.78#ibcon#about to write, iclass 37, count 0 2006.229.23:32:38.78#ibcon#wrote, iclass 37, count 0 2006.229.23:32:38.78#ibcon#about to read 3, iclass 37, count 0 2006.229.23:32:38.80#ibcon#read 3, iclass 37, count 0 2006.229.23:32:38.80#ibcon#about to read 4, iclass 37, count 0 2006.229.23:32:38.80#ibcon#read 4, iclass 37, count 0 2006.229.23:32:38.80#ibcon#about to read 5, iclass 37, count 0 2006.229.23:32:38.80#ibcon#read 5, iclass 37, count 0 2006.229.23:32:38.80#ibcon#about to read 6, iclass 37, count 0 2006.229.23:32:38.80#ibcon#read 6, iclass 37, count 0 2006.229.23:32:38.80#ibcon#end of sib2, iclass 37, count 0 2006.229.23:32:38.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:32:38.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:32:38.80#ibcon#[25=USB\r\n] 2006.229.23:32:38.80#ibcon#*before write, iclass 37, count 0 2006.229.23:32:38.80#ibcon#enter sib2, iclass 37, count 0 2006.229.23:32:38.80#ibcon#flushed, iclass 37, count 0 2006.229.23:32:38.80#ibcon#about to write, iclass 37, count 0 2006.229.23:32:38.80#ibcon#wrote, iclass 37, count 0 2006.229.23:32:38.80#ibcon#about to read 3, iclass 37, count 0 2006.229.23:32:38.83#ibcon#read 3, iclass 37, count 0 2006.229.23:32:38.83#ibcon#about to read 4, iclass 37, count 0 2006.229.23:32:38.83#ibcon#read 4, iclass 37, count 0 2006.229.23:32:38.83#ibcon#about to read 5, iclass 37, count 0 2006.229.23:32:38.83#ibcon#read 5, iclass 37, count 0 2006.229.23:32:38.83#ibcon#about to read 6, iclass 37, count 0 2006.229.23:32:38.83#ibcon#read 6, iclass 37, count 0 2006.229.23:32:38.83#ibcon#end of sib2, iclass 37, count 0 2006.229.23:32:38.83#ibcon#*after write, iclass 37, count 0 2006.229.23:32:38.83#ibcon#*before return 0, iclass 37, count 0 2006.229.23:32:38.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:38.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:38.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:32:38.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:32:38.83$vck44/vblo=1,629.99 2006.229.23:32:38.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.23:32:38.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.23:32:38.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:38.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:38.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:38.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:38.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:32:38.83#ibcon#first serial, iclass 39, count 0 2006.229.23:32:38.83#ibcon#enter sib2, iclass 39, count 0 2006.229.23:32:38.83#ibcon#flushed, iclass 39, count 0 2006.229.23:32:38.83#ibcon#about to write, iclass 39, count 0 2006.229.23:32:38.83#ibcon#wrote, iclass 39, count 0 2006.229.23:32:38.83#ibcon#about to read 3, iclass 39, count 0 2006.229.23:32:38.85#ibcon#read 3, iclass 39, count 0 2006.229.23:32:38.85#ibcon#about to read 4, iclass 39, count 0 2006.229.23:32:38.85#ibcon#read 4, iclass 39, count 0 2006.229.23:32:38.85#ibcon#about to read 5, iclass 39, count 0 2006.229.23:32:38.85#ibcon#read 5, iclass 39, count 0 2006.229.23:32:38.85#ibcon#about to read 6, iclass 39, count 0 2006.229.23:32:38.85#ibcon#read 6, iclass 39, count 0 2006.229.23:32:38.85#ibcon#end of sib2, iclass 39, count 0 2006.229.23:32:38.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:32:38.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:32:38.85#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:32:38.85#ibcon#*before write, iclass 39, count 0 2006.229.23:32:38.85#ibcon#enter sib2, iclass 39, count 0 2006.229.23:32:38.85#ibcon#flushed, iclass 39, count 0 2006.229.23:32:38.85#ibcon#about to write, iclass 39, count 0 2006.229.23:32:38.85#ibcon#wrote, iclass 39, count 0 2006.229.23:32:38.85#ibcon#about to read 3, iclass 39, count 0 2006.229.23:32:38.89#ibcon#read 3, iclass 39, count 0 2006.229.23:32:38.89#ibcon#about to read 4, iclass 39, count 0 2006.229.23:32:38.89#ibcon#read 4, iclass 39, count 0 2006.229.23:32:38.89#ibcon#about to read 5, iclass 39, count 0 2006.229.23:32:38.89#ibcon#read 5, iclass 39, count 0 2006.229.23:32:38.89#ibcon#about to read 6, iclass 39, count 0 2006.229.23:32:38.89#ibcon#read 6, iclass 39, count 0 2006.229.23:32:38.89#ibcon#end of sib2, iclass 39, count 0 2006.229.23:32:38.89#ibcon#*after write, iclass 39, count 0 2006.229.23:32:38.89#ibcon#*before return 0, iclass 39, count 0 2006.229.23:32:38.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:38.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:38.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:32:38.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:32:38.89$vck44/vb=1,4 2006.229.23:32:38.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.23:32:38.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.23:32:38.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:38.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:32:38.89#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:32:38.89#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:32:38.89#ibcon#enter wrdev, iclass 3, count 2 2006.229.23:32:38.89#ibcon#first serial, iclass 3, count 2 2006.229.23:32:38.89#ibcon#enter sib2, iclass 3, count 2 2006.229.23:32:38.89#ibcon#flushed, iclass 3, count 2 2006.229.23:32:38.89#ibcon#about to write, iclass 3, count 2 2006.229.23:32:38.89#ibcon#wrote, iclass 3, count 2 2006.229.23:32:38.89#ibcon#about to read 3, iclass 3, count 2 2006.229.23:32:38.91#ibcon#read 3, iclass 3, count 2 2006.229.23:32:38.91#ibcon#about to read 4, iclass 3, count 2 2006.229.23:32:38.91#ibcon#read 4, iclass 3, count 2 2006.229.23:32:38.91#ibcon#about to read 5, iclass 3, count 2 2006.229.23:32:38.91#ibcon#read 5, iclass 3, count 2 2006.229.23:32:38.91#ibcon#about to read 6, iclass 3, count 2 2006.229.23:32:38.91#ibcon#read 6, iclass 3, count 2 2006.229.23:32:38.91#ibcon#end of sib2, iclass 3, count 2 2006.229.23:32:38.91#ibcon#*mode == 0, iclass 3, count 2 2006.229.23:32:38.91#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.23:32:38.91#ibcon#[27=AT01-04\r\n] 2006.229.23:32:38.91#ibcon#*before write, iclass 3, count 2 2006.229.23:32:38.91#ibcon#enter sib2, iclass 3, count 2 2006.229.23:32:38.91#ibcon#flushed, iclass 3, count 2 2006.229.23:32:38.91#ibcon#about to write, iclass 3, count 2 2006.229.23:32:38.91#ibcon#wrote, iclass 3, count 2 2006.229.23:32:38.91#ibcon#about to read 3, iclass 3, count 2 2006.229.23:32:38.94#ibcon#read 3, iclass 3, count 2 2006.229.23:32:38.94#ibcon#about to read 4, iclass 3, count 2 2006.229.23:32:38.94#ibcon#read 4, iclass 3, count 2 2006.229.23:32:38.94#ibcon#about to read 5, iclass 3, count 2 2006.229.23:32:38.94#ibcon#read 5, iclass 3, count 2 2006.229.23:32:38.94#ibcon#about to read 6, iclass 3, count 2 2006.229.23:32:38.94#ibcon#read 6, iclass 3, count 2 2006.229.23:32:38.94#ibcon#end of sib2, iclass 3, count 2 2006.229.23:32:38.94#ibcon#*after write, iclass 3, count 2 2006.229.23:32:38.94#ibcon#*before return 0, iclass 3, count 2 2006.229.23:32:38.94#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:32:38.94#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:32:38.94#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.23:32:38.94#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:38.94#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:32:39.06#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:32:39.06#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:32:39.06#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:32:39.06#ibcon#first serial, iclass 3, count 0 2006.229.23:32:39.06#ibcon#enter sib2, iclass 3, count 0 2006.229.23:32:39.06#ibcon#flushed, iclass 3, count 0 2006.229.23:32:39.06#ibcon#about to write, iclass 3, count 0 2006.229.23:32:39.06#ibcon#wrote, iclass 3, count 0 2006.229.23:32:39.06#ibcon#about to read 3, iclass 3, count 0 2006.229.23:32:39.08#ibcon#read 3, iclass 3, count 0 2006.229.23:32:39.08#ibcon#about to read 4, iclass 3, count 0 2006.229.23:32:39.08#ibcon#read 4, iclass 3, count 0 2006.229.23:32:39.08#ibcon#about to read 5, iclass 3, count 0 2006.229.23:32:39.08#ibcon#read 5, iclass 3, count 0 2006.229.23:32:39.08#ibcon#about to read 6, iclass 3, count 0 2006.229.23:32:39.08#ibcon#read 6, iclass 3, count 0 2006.229.23:32:39.08#ibcon#end of sib2, iclass 3, count 0 2006.229.23:32:39.08#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:32:39.08#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:32:39.08#ibcon#[27=USB\r\n] 2006.229.23:32:39.08#ibcon#*before write, iclass 3, count 0 2006.229.23:32:39.08#ibcon#enter sib2, iclass 3, count 0 2006.229.23:32:39.08#ibcon#flushed, iclass 3, count 0 2006.229.23:32:39.08#ibcon#about to write, iclass 3, count 0 2006.229.23:32:39.08#ibcon#wrote, iclass 3, count 0 2006.229.23:32:39.08#ibcon#about to read 3, iclass 3, count 0 2006.229.23:32:39.11#ibcon#read 3, iclass 3, count 0 2006.229.23:32:39.11#ibcon#about to read 4, iclass 3, count 0 2006.229.23:32:39.11#ibcon#read 4, iclass 3, count 0 2006.229.23:32:39.11#ibcon#about to read 5, iclass 3, count 0 2006.229.23:32:39.11#ibcon#read 5, iclass 3, count 0 2006.229.23:32:39.11#ibcon#about to read 6, iclass 3, count 0 2006.229.23:32:39.11#ibcon#read 6, iclass 3, count 0 2006.229.23:32:39.11#ibcon#end of sib2, iclass 3, count 0 2006.229.23:32:39.11#ibcon#*after write, iclass 3, count 0 2006.229.23:32:39.11#ibcon#*before return 0, iclass 3, count 0 2006.229.23:32:39.11#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:32:39.11#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:32:39.11#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:32:39.11#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:32:39.11$vck44/vblo=2,634.99 2006.229.23:32:39.11#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.23:32:39.11#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.23:32:39.11#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:39.11#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:39.11#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:39.11#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:39.11#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:32:39.11#ibcon#first serial, iclass 5, count 0 2006.229.23:32:39.11#ibcon#enter sib2, iclass 5, count 0 2006.229.23:32:39.11#ibcon#flushed, iclass 5, count 0 2006.229.23:32:39.11#ibcon#about to write, iclass 5, count 0 2006.229.23:32:39.11#ibcon#wrote, iclass 5, count 0 2006.229.23:32:39.11#ibcon#about to read 3, iclass 5, count 0 2006.229.23:32:39.13#ibcon#read 3, iclass 5, count 0 2006.229.23:32:39.13#ibcon#about to read 4, iclass 5, count 0 2006.229.23:32:39.13#ibcon#read 4, iclass 5, count 0 2006.229.23:32:39.13#ibcon#about to read 5, iclass 5, count 0 2006.229.23:32:39.13#ibcon#read 5, iclass 5, count 0 2006.229.23:32:39.13#ibcon#about to read 6, iclass 5, count 0 2006.229.23:32:39.13#ibcon#read 6, iclass 5, count 0 2006.229.23:32:39.13#ibcon#end of sib2, iclass 5, count 0 2006.229.23:32:39.13#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:32:39.13#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:32:39.13#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:32:39.13#ibcon#*before write, iclass 5, count 0 2006.229.23:32:39.13#ibcon#enter sib2, iclass 5, count 0 2006.229.23:32:39.13#ibcon#flushed, iclass 5, count 0 2006.229.23:32:39.13#ibcon#about to write, iclass 5, count 0 2006.229.23:32:39.13#ibcon#wrote, iclass 5, count 0 2006.229.23:32:39.13#ibcon#about to read 3, iclass 5, count 0 2006.229.23:32:39.17#ibcon#read 3, iclass 5, count 0 2006.229.23:32:39.17#ibcon#about to read 4, iclass 5, count 0 2006.229.23:32:39.17#ibcon#read 4, iclass 5, count 0 2006.229.23:32:39.17#ibcon#about to read 5, iclass 5, count 0 2006.229.23:32:39.17#ibcon#read 5, iclass 5, count 0 2006.229.23:32:39.17#ibcon#about to read 6, iclass 5, count 0 2006.229.23:32:39.17#ibcon#read 6, iclass 5, count 0 2006.229.23:32:39.17#ibcon#end of sib2, iclass 5, count 0 2006.229.23:32:39.17#ibcon#*after write, iclass 5, count 0 2006.229.23:32:39.17#ibcon#*before return 0, iclass 5, count 0 2006.229.23:32:39.17#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:39.17#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:32:39.17#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:32:39.17#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:32:39.17$vck44/vb=2,4 2006.229.23:32:39.17#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.23:32:39.17#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.23:32:39.17#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:39.17#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:39.23#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:39.23#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:39.23#ibcon#enter wrdev, iclass 7, count 2 2006.229.23:32:39.23#ibcon#first serial, iclass 7, count 2 2006.229.23:32:39.23#ibcon#enter sib2, iclass 7, count 2 2006.229.23:32:39.23#ibcon#flushed, iclass 7, count 2 2006.229.23:32:39.23#ibcon#about to write, iclass 7, count 2 2006.229.23:32:39.23#ibcon#wrote, iclass 7, count 2 2006.229.23:32:39.23#ibcon#about to read 3, iclass 7, count 2 2006.229.23:32:39.25#ibcon#read 3, iclass 7, count 2 2006.229.23:32:39.25#ibcon#about to read 4, iclass 7, count 2 2006.229.23:32:39.25#ibcon#read 4, iclass 7, count 2 2006.229.23:32:39.25#ibcon#about to read 5, iclass 7, count 2 2006.229.23:32:39.25#ibcon#read 5, iclass 7, count 2 2006.229.23:32:39.25#ibcon#about to read 6, iclass 7, count 2 2006.229.23:32:39.25#ibcon#read 6, iclass 7, count 2 2006.229.23:32:39.25#ibcon#end of sib2, iclass 7, count 2 2006.229.23:32:39.25#ibcon#*mode == 0, iclass 7, count 2 2006.229.23:32:39.25#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.23:32:39.25#ibcon#[27=AT02-04\r\n] 2006.229.23:32:39.25#ibcon#*before write, iclass 7, count 2 2006.229.23:32:39.25#ibcon#enter sib2, iclass 7, count 2 2006.229.23:32:39.25#ibcon#flushed, iclass 7, count 2 2006.229.23:32:39.25#ibcon#about to write, iclass 7, count 2 2006.229.23:32:39.25#ibcon#wrote, iclass 7, count 2 2006.229.23:32:39.25#ibcon#about to read 3, iclass 7, count 2 2006.229.23:32:39.28#ibcon#read 3, iclass 7, count 2 2006.229.23:32:39.28#ibcon#about to read 4, iclass 7, count 2 2006.229.23:32:39.28#ibcon#read 4, iclass 7, count 2 2006.229.23:32:39.28#ibcon#about to read 5, iclass 7, count 2 2006.229.23:32:39.28#ibcon#read 5, iclass 7, count 2 2006.229.23:32:39.28#ibcon#about to read 6, iclass 7, count 2 2006.229.23:32:39.28#ibcon#read 6, iclass 7, count 2 2006.229.23:32:39.28#ibcon#end of sib2, iclass 7, count 2 2006.229.23:32:39.28#ibcon#*after write, iclass 7, count 2 2006.229.23:32:39.28#ibcon#*before return 0, iclass 7, count 2 2006.229.23:32:39.28#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:39.28#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:32:39.28#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.23:32:39.28#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:39.28#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:39.40#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:39.40#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:39.40#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:32:39.40#ibcon#first serial, iclass 7, count 0 2006.229.23:32:39.40#ibcon#enter sib2, iclass 7, count 0 2006.229.23:32:39.40#ibcon#flushed, iclass 7, count 0 2006.229.23:32:39.40#ibcon#about to write, iclass 7, count 0 2006.229.23:32:39.40#ibcon#wrote, iclass 7, count 0 2006.229.23:32:39.40#ibcon#about to read 3, iclass 7, count 0 2006.229.23:32:39.42#ibcon#read 3, iclass 7, count 0 2006.229.23:32:39.42#ibcon#about to read 4, iclass 7, count 0 2006.229.23:32:39.42#ibcon#read 4, iclass 7, count 0 2006.229.23:32:39.42#ibcon#about to read 5, iclass 7, count 0 2006.229.23:32:39.42#ibcon#read 5, iclass 7, count 0 2006.229.23:32:39.42#ibcon#about to read 6, iclass 7, count 0 2006.229.23:32:39.42#ibcon#read 6, iclass 7, count 0 2006.229.23:32:39.42#ibcon#end of sib2, iclass 7, count 0 2006.229.23:32:39.42#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:32:39.42#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:32:39.42#ibcon#[27=USB\r\n] 2006.229.23:32:39.42#ibcon#*before write, iclass 7, count 0 2006.229.23:32:39.42#ibcon#enter sib2, iclass 7, count 0 2006.229.23:32:39.42#ibcon#flushed, iclass 7, count 0 2006.229.23:32:39.42#ibcon#about to write, iclass 7, count 0 2006.229.23:32:39.42#ibcon#wrote, iclass 7, count 0 2006.229.23:32:39.42#ibcon#about to read 3, iclass 7, count 0 2006.229.23:32:39.45#ibcon#read 3, iclass 7, count 0 2006.229.23:32:39.45#ibcon#about to read 4, iclass 7, count 0 2006.229.23:32:39.45#ibcon#read 4, iclass 7, count 0 2006.229.23:32:39.45#ibcon#about to read 5, iclass 7, count 0 2006.229.23:32:39.45#ibcon#read 5, iclass 7, count 0 2006.229.23:32:39.45#ibcon#about to read 6, iclass 7, count 0 2006.229.23:32:39.45#ibcon#read 6, iclass 7, count 0 2006.229.23:32:39.45#ibcon#end of sib2, iclass 7, count 0 2006.229.23:32:39.45#ibcon#*after write, iclass 7, count 0 2006.229.23:32:39.45#ibcon#*before return 0, iclass 7, count 0 2006.229.23:32:39.45#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:39.45#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:32:39.45#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:32:39.45#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:32:39.45$vck44/vblo=3,649.99 2006.229.23:32:39.45#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.23:32:39.45#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.23:32:39.45#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:39.45#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:39.45#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:39.45#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:39.45#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:32:39.45#ibcon#first serial, iclass 11, count 0 2006.229.23:32:39.45#ibcon#enter sib2, iclass 11, count 0 2006.229.23:32:39.45#ibcon#flushed, iclass 11, count 0 2006.229.23:32:39.45#ibcon#about to write, iclass 11, count 0 2006.229.23:32:39.45#ibcon#wrote, iclass 11, count 0 2006.229.23:32:39.45#ibcon#about to read 3, iclass 11, count 0 2006.229.23:32:39.47#ibcon#read 3, iclass 11, count 0 2006.229.23:32:39.47#ibcon#about to read 4, iclass 11, count 0 2006.229.23:32:39.47#ibcon#read 4, iclass 11, count 0 2006.229.23:32:39.47#ibcon#about to read 5, iclass 11, count 0 2006.229.23:32:39.47#ibcon#read 5, iclass 11, count 0 2006.229.23:32:39.47#ibcon#about to read 6, iclass 11, count 0 2006.229.23:32:39.47#ibcon#read 6, iclass 11, count 0 2006.229.23:32:39.47#ibcon#end of sib2, iclass 11, count 0 2006.229.23:32:39.47#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:32:39.47#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:32:39.47#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:32:39.47#ibcon#*before write, iclass 11, count 0 2006.229.23:32:39.47#ibcon#enter sib2, iclass 11, count 0 2006.229.23:32:39.47#ibcon#flushed, iclass 11, count 0 2006.229.23:32:39.47#ibcon#about to write, iclass 11, count 0 2006.229.23:32:39.47#ibcon#wrote, iclass 11, count 0 2006.229.23:32:39.47#ibcon#about to read 3, iclass 11, count 0 2006.229.23:32:39.51#ibcon#read 3, iclass 11, count 0 2006.229.23:32:39.51#ibcon#about to read 4, iclass 11, count 0 2006.229.23:32:39.51#ibcon#read 4, iclass 11, count 0 2006.229.23:32:39.51#ibcon#about to read 5, iclass 11, count 0 2006.229.23:32:39.51#ibcon#read 5, iclass 11, count 0 2006.229.23:32:39.51#ibcon#about to read 6, iclass 11, count 0 2006.229.23:32:39.51#ibcon#read 6, iclass 11, count 0 2006.229.23:32:39.51#ibcon#end of sib2, iclass 11, count 0 2006.229.23:32:39.51#ibcon#*after write, iclass 11, count 0 2006.229.23:32:39.51#ibcon#*before return 0, iclass 11, count 0 2006.229.23:32:39.51#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:39.51#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:32:39.51#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:32:39.51#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:32:39.51$vck44/vb=3,4 2006.229.23:32:39.51#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.229.23:32:39.51#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.229.23:32:39.51#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:39.51#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:39.57#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:39.57#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:39.57#ibcon#enter wrdev, iclass 13, count 2 2006.229.23:32:39.57#ibcon#first serial, iclass 13, count 2 2006.229.23:32:39.57#ibcon#enter sib2, iclass 13, count 2 2006.229.23:32:39.57#ibcon#flushed, iclass 13, count 2 2006.229.23:32:39.57#ibcon#about to write, iclass 13, count 2 2006.229.23:32:39.57#ibcon#wrote, iclass 13, count 2 2006.229.23:32:39.57#ibcon#about to read 3, iclass 13, count 2 2006.229.23:32:39.59#ibcon#read 3, iclass 13, count 2 2006.229.23:32:39.59#ibcon#about to read 4, iclass 13, count 2 2006.229.23:32:39.59#ibcon#read 4, iclass 13, count 2 2006.229.23:32:39.59#ibcon#about to read 5, iclass 13, count 2 2006.229.23:32:39.59#ibcon#read 5, iclass 13, count 2 2006.229.23:32:39.59#ibcon#about to read 6, iclass 13, count 2 2006.229.23:32:39.59#ibcon#read 6, iclass 13, count 2 2006.229.23:32:39.59#ibcon#end of sib2, iclass 13, count 2 2006.229.23:32:39.59#ibcon#*mode == 0, iclass 13, count 2 2006.229.23:32:39.59#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.229.23:32:39.59#ibcon#[27=AT03-04\r\n] 2006.229.23:32:39.59#ibcon#*before write, iclass 13, count 2 2006.229.23:32:39.59#ibcon#enter sib2, iclass 13, count 2 2006.229.23:32:39.59#ibcon#flushed, iclass 13, count 2 2006.229.23:32:39.59#ibcon#about to write, iclass 13, count 2 2006.229.23:32:39.59#ibcon#wrote, iclass 13, count 2 2006.229.23:32:39.59#ibcon#about to read 3, iclass 13, count 2 2006.229.23:32:39.62#ibcon#read 3, iclass 13, count 2 2006.229.23:32:39.62#ibcon#about to read 4, iclass 13, count 2 2006.229.23:32:39.62#ibcon#read 4, iclass 13, count 2 2006.229.23:32:39.62#ibcon#about to read 5, iclass 13, count 2 2006.229.23:32:39.62#ibcon#read 5, iclass 13, count 2 2006.229.23:32:39.62#ibcon#about to read 6, iclass 13, count 2 2006.229.23:32:39.62#ibcon#read 6, iclass 13, count 2 2006.229.23:32:39.62#ibcon#end of sib2, iclass 13, count 2 2006.229.23:32:39.62#ibcon#*after write, iclass 13, count 2 2006.229.23:32:39.62#ibcon#*before return 0, iclass 13, count 2 2006.229.23:32:39.62#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:39.62#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.229.23:32:39.62#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.229.23:32:39.62#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:39.62#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:39.74#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:39.74#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:39.74#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:32:39.74#ibcon#first serial, iclass 13, count 0 2006.229.23:32:39.74#ibcon#enter sib2, iclass 13, count 0 2006.229.23:32:39.74#ibcon#flushed, iclass 13, count 0 2006.229.23:32:39.74#ibcon#about to write, iclass 13, count 0 2006.229.23:32:39.74#ibcon#wrote, iclass 13, count 0 2006.229.23:32:39.74#ibcon#about to read 3, iclass 13, count 0 2006.229.23:32:39.76#ibcon#read 3, iclass 13, count 0 2006.229.23:32:39.76#ibcon#about to read 4, iclass 13, count 0 2006.229.23:32:39.76#ibcon#read 4, iclass 13, count 0 2006.229.23:32:39.76#ibcon#about to read 5, iclass 13, count 0 2006.229.23:32:39.76#ibcon#read 5, iclass 13, count 0 2006.229.23:32:39.76#ibcon#about to read 6, iclass 13, count 0 2006.229.23:32:39.76#ibcon#read 6, iclass 13, count 0 2006.229.23:32:39.76#ibcon#end of sib2, iclass 13, count 0 2006.229.23:32:39.76#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:32:39.76#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:32:39.76#ibcon#[27=USB\r\n] 2006.229.23:32:39.76#ibcon#*before write, iclass 13, count 0 2006.229.23:32:39.76#ibcon#enter sib2, iclass 13, count 0 2006.229.23:32:39.76#ibcon#flushed, iclass 13, count 0 2006.229.23:32:39.76#ibcon#about to write, iclass 13, count 0 2006.229.23:32:39.76#ibcon#wrote, iclass 13, count 0 2006.229.23:32:39.76#ibcon#about to read 3, iclass 13, count 0 2006.229.23:32:39.78#abcon#<5=/08 1.4 4.7 29.85 841002.6\r\n> 2006.229.23:32:39.79#ibcon#read 3, iclass 13, count 0 2006.229.23:32:39.79#ibcon#about to read 4, iclass 13, count 0 2006.229.23:32:39.79#ibcon#read 4, iclass 13, count 0 2006.229.23:32:39.79#ibcon#about to read 5, iclass 13, count 0 2006.229.23:32:39.79#ibcon#read 5, iclass 13, count 0 2006.229.23:32:39.79#ibcon#about to read 6, iclass 13, count 0 2006.229.23:32:39.79#ibcon#read 6, iclass 13, count 0 2006.229.23:32:39.79#ibcon#end of sib2, iclass 13, count 0 2006.229.23:32:39.79#ibcon#*after write, iclass 13, count 0 2006.229.23:32:39.79#ibcon#*before return 0, iclass 13, count 0 2006.229.23:32:39.79#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:39.79#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.229.23:32:39.79#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:32:39.79#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:32:39.79$vck44/vblo=4,679.99 2006.229.23:32:39.79#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.23:32:39.79#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.23:32:39.79#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:39.79#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:32:39.79#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:32:39.79#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:32:39.79#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:32:39.79#ibcon#first serial, iclass 18, count 0 2006.229.23:32:39.79#ibcon#enter sib2, iclass 18, count 0 2006.229.23:32:39.79#ibcon#flushed, iclass 18, count 0 2006.229.23:32:39.79#ibcon#about to write, iclass 18, count 0 2006.229.23:32:39.79#ibcon#wrote, iclass 18, count 0 2006.229.23:32:39.79#ibcon#about to read 3, iclass 18, count 0 2006.229.23:32:39.80#abcon#{5=INTERFACE CLEAR} 2006.229.23:32:39.81#ibcon#read 3, iclass 18, count 0 2006.229.23:32:39.81#ibcon#about to read 4, iclass 18, count 0 2006.229.23:32:39.81#ibcon#read 4, iclass 18, count 0 2006.229.23:32:39.81#ibcon#about to read 5, iclass 18, count 0 2006.229.23:32:39.81#ibcon#read 5, iclass 18, count 0 2006.229.23:32:39.81#ibcon#about to read 6, iclass 18, count 0 2006.229.23:32:39.81#ibcon#read 6, iclass 18, count 0 2006.229.23:32:39.81#ibcon#end of sib2, iclass 18, count 0 2006.229.23:32:39.81#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:32:39.81#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:32:39.81#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:32:39.81#ibcon#*before write, iclass 18, count 0 2006.229.23:32:39.81#ibcon#enter sib2, iclass 18, count 0 2006.229.23:32:39.81#ibcon#flushed, iclass 18, count 0 2006.229.23:32:39.81#ibcon#about to write, iclass 18, count 0 2006.229.23:32:39.81#ibcon#wrote, iclass 18, count 0 2006.229.23:32:39.81#ibcon#about to read 3, iclass 18, count 0 2006.229.23:32:39.85#ibcon#read 3, iclass 18, count 0 2006.229.23:32:39.85#ibcon#about to read 4, iclass 18, count 0 2006.229.23:32:39.85#ibcon#read 4, iclass 18, count 0 2006.229.23:32:39.85#ibcon#about to read 5, iclass 18, count 0 2006.229.23:32:39.85#ibcon#read 5, iclass 18, count 0 2006.229.23:32:39.85#ibcon#about to read 6, iclass 18, count 0 2006.229.23:32:39.85#ibcon#read 6, iclass 18, count 0 2006.229.23:32:39.85#ibcon#end of sib2, iclass 18, count 0 2006.229.23:32:39.85#ibcon#*after write, iclass 18, count 0 2006.229.23:32:39.85#ibcon#*before return 0, iclass 18, count 0 2006.229.23:32:39.85#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:32:39.85#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:32:39.85#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:32:39.85#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:32:39.85$vck44/vb=4,4 2006.229.23:32:39.85#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.23:32:39.85#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.23:32:39.85#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:39.85#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:39.86#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:32:39.91#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:39.91#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:39.91#ibcon#enter wrdev, iclass 21, count 2 2006.229.23:32:39.91#ibcon#first serial, iclass 21, count 2 2006.229.23:32:39.91#ibcon#enter sib2, iclass 21, count 2 2006.229.23:32:39.91#ibcon#flushed, iclass 21, count 2 2006.229.23:32:39.91#ibcon#about to write, iclass 21, count 2 2006.229.23:32:39.91#ibcon#wrote, iclass 21, count 2 2006.229.23:32:39.91#ibcon#about to read 3, iclass 21, count 2 2006.229.23:32:39.93#ibcon#read 3, iclass 21, count 2 2006.229.23:32:39.93#ibcon#about to read 4, iclass 21, count 2 2006.229.23:32:39.93#ibcon#read 4, iclass 21, count 2 2006.229.23:32:39.93#ibcon#about to read 5, iclass 21, count 2 2006.229.23:32:39.93#ibcon#read 5, iclass 21, count 2 2006.229.23:32:39.93#ibcon#about to read 6, iclass 21, count 2 2006.229.23:32:39.93#ibcon#read 6, iclass 21, count 2 2006.229.23:32:39.93#ibcon#end of sib2, iclass 21, count 2 2006.229.23:32:39.93#ibcon#*mode == 0, iclass 21, count 2 2006.229.23:32:39.93#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.23:32:39.93#ibcon#[27=AT04-04\r\n] 2006.229.23:32:39.93#ibcon#*before write, iclass 21, count 2 2006.229.23:32:39.93#ibcon#enter sib2, iclass 21, count 2 2006.229.23:32:39.93#ibcon#flushed, iclass 21, count 2 2006.229.23:32:39.93#ibcon#about to write, iclass 21, count 2 2006.229.23:32:39.93#ibcon#wrote, iclass 21, count 2 2006.229.23:32:39.93#ibcon#about to read 3, iclass 21, count 2 2006.229.23:32:39.96#ibcon#read 3, iclass 21, count 2 2006.229.23:32:39.96#ibcon#about to read 4, iclass 21, count 2 2006.229.23:32:39.96#ibcon#read 4, iclass 21, count 2 2006.229.23:32:39.96#ibcon#about to read 5, iclass 21, count 2 2006.229.23:32:39.96#ibcon#read 5, iclass 21, count 2 2006.229.23:32:39.96#ibcon#about to read 6, iclass 21, count 2 2006.229.23:32:39.96#ibcon#read 6, iclass 21, count 2 2006.229.23:32:39.96#ibcon#end of sib2, iclass 21, count 2 2006.229.23:32:39.96#ibcon#*after write, iclass 21, count 2 2006.229.23:32:39.96#ibcon#*before return 0, iclass 21, count 2 2006.229.23:32:39.96#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:39.96#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:32:39.96#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.23:32:39.96#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:39.96#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:40.08#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:40.08#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:40.08#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:32:40.08#ibcon#first serial, iclass 21, count 0 2006.229.23:32:40.08#ibcon#enter sib2, iclass 21, count 0 2006.229.23:32:40.08#ibcon#flushed, iclass 21, count 0 2006.229.23:32:40.08#ibcon#about to write, iclass 21, count 0 2006.229.23:32:40.08#ibcon#wrote, iclass 21, count 0 2006.229.23:32:40.08#ibcon#about to read 3, iclass 21, count 0 2006.229.23:32:40.10#ibcon#read 3, iclass 21, count 0 2006.229.23:32:40.10#ibcon#about to read 4, iclass 21, count 0 2006.229.23:32:40.10#ibcon#read 4, iclass 21, count 0 2006.229.23:32:40.10#ibcon#about to read 5, iclass 21, count 0 2006.229.23:32:40.10#ibcon#read 5, iclass 21, count 0 2006.229.23:32:40.10#ibcon#about to read 6, iclass 21, count 0 2006.229.23:32:40.10#ibcon#read 6, iclass 21, count 0 2006.229.23:32:40.10#ibcon#end of sib2, iclass 21, count 0 2006.229.23:32:40.10#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:32:40.10#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:32:40.10#ibcon#[27=USB\r\n] 2006.229.23:32:40.10#ibcon#*before write, iclass 21, count 0 2006.229.23:32:40.10#ibcon#enter sib2, iclass 21, count 0 2006.229.23:32:40.10#ibcon#flushed, iclass 21, count 0 2006.229.23:32:40.10#ibcon#about to write, iclass 21, count 0 2006.229.23:32:40.10#ibcon#wrote, iclass 21, count 0 2006.229.23:32:40.10#ibcon#about to read 3, iclass 21, count 0 2006.229.23:32:40.13#ibcon#read 3, iclass 21, count 0 2006.229.23:32:40.13#ibcon#about to read 4, iclass 21, count 0 2006.229.23:32:40.13#ibcon#read 4, iclass 21, count 0 2006.229.23:32:40.13#ibcon#about to read 5, iclass 21, count 0 2006.229.23:32:40.13#ibcon#read 5, iclass 21, count 0 2006.229.23:32:40.13#ibcon#about to read 6, iclass 21, count 0 2006.229.23:32:40.13#ibcon#read 6, iclass 21, count 0 2006.229.23:32:40.13#ibcon#end of sib2, iclass 21, count 0 2006.229.23:32:40.13#ibcon#*after write, iclass 21, count 0 2006.229.23:32:40.13#ibcon#*before return 0, iclass 21, count 0 2006.229.23:32:40.13#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:40.13#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:32:40.13#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:32:40.13#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:32:40.13$vck44/vblo=5,709.99 2006.229.23:32:40.13#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.23:32:40.13#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.23:32:40.13#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:40.13#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:40.13#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:40.13#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:40.13#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:32:40.13#ibcon#first serial, iclass 23, count 0 2006.229.23:32:40.13#ibcon#enter sib2, iclass 23, count 0 2006.229.23:32:40.13#ibcon#flushed, iclass 23, count 0 2006.229.23:32:40.13#ibcon#about to write, iclass 23, count 0 2006.229.23:32:40.13#ibcon#wrote, iclass 23, count 0 2006.229.23:32:40.13#ibcon#about to read 3, iclass 23, count 0 2006.229.23:32:40.15#ibcon#read 3, iclass 23, count 0 2006.229.23:32:40.15#ibcon#about to read 4, iclass 23, count 0 2006.229.23:32:40.15#ibcon#read 4, iclass 23, count 0 2006.229.23:32:40.15#ibcon#about to read 5, iclass 23, count 0 2006.229.23:32:40.15#ibcon#read 5, iclass 23, count 0 2006.229.23:32:40.15#ibcon#about to read 6, iclass 23, count 0 2006.229.23:32:40.15#ibcon#read 6, iclass 23, count 0 2006.229.23:32:40.15#ibcon#end of sib2, iclass 23, count 0 2006.229.23:32:40.15#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:32:40.15#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:32:40.15#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:32:40.15#ibcon#*before write, iclass 23, count 0 2006.229.23:32:40.15#ibcon#enter sib2, iclass 23, count 0 2006.229.23:32:40.15#ibcon#flushed, iclass 23, count 0 2006.229.23:32:40.15#ibcon#about to write, iclass 23, count 0 2006.229.23:32:40.15#ibcon#wrote, iclass 23, count 0 2006.229.23:32:40.15#ibcon#about to read 3, iclass 23, count 0 2006.229.23:32:40.19#ibcon#read 3, iclass 23, count 0 2006.229.23:32:40.19#ibcon#about to read 4, iclass 23, count 0 2006.229.23:32:40.19#ibcon#read 4, iclass 23, count 0 2006.229.23:32:40.19#ibcon#about to read 5, iclass 23, count 0 2006.229.23:32:40.19#ibcon#read 5, iclass 23, count 0 2006.229.23:32:40.19#ibcon#about to read 6, iclass 23, count 0 2006.229.23:32:40.19#ibcon#read 6, iclass 23, count 0 2006.229.23:32:40.19#ibcon#end of sib2, iclass 23, count 0 2006.229.23:32:40.19#ibcon#*after write, iclass 23, count 0 2006.229.23:32:40.19#ibcon#*before return 0, iclass 23, count 0 2006.229.23:32:40.19#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:40.19#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:32:40.19#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:32:40.19#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:32:40.19$vck44/vb=5,4 2006.229.23:32:40.19#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.23:32:40.19#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.23:32:40.19#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:40.19#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:40.25#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:40.25#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:40.25#ibcon#enter wrdev, iclass 25, count 2 2006.229.23:32:40.25#ibcon#first serial, iclass 25, count 2 2006.229.23:32:40.25#ibcon#enter sib2, iclass 25, count 2 2006.229.23:32:40.25#ibcon#flushed, iclass 25, count 2 2006.229.23:32:40.25#ibcon#about to write, iclass 25, count 2 2006.229.23:32:40.25#ibcon#wrote, iclass 25, count 2 2006.229.23:32:40.25#ibcon#about to read 3, iclass 25, count 2 2006.229.23:32:40.27#ibcon#read 3, iclass 25, count 2 2006.229.23:32:40.27#ibcon#about to read 4, iclass 25, count 2 2006.229.23:32:40.27#ibcon#read 4, iclass 25, count 2 2006.229.23:32:40.27#ibcon#about to read 5, iclass 25, count 2 2006.229.23:32:40.27#ibcon#read 5, iclass 25, count 2 2006.229.23:32:40.27#ibcon#about to read 6, iclass 25, count 2 2006.229.23:32:40.27#ibcon#read 6, iclass 25, count 2 2006.229.23:32:40.27#ibcon#end of sib2, iclass 25, count 2 2006.229.23:32:40.27#ibcon#*mode == 0, iclass 25, count 2 2006.229.23:32:40.27#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.23:32:40.27#ibcon#[27=AT05-04\r\n] 2006.229.23:32:40.27#ibcon#*before write, iclass 25, count 2 2006.229.23:32:40.27#ibcon#enter sib2, iclass 25, count 2 2006.229.23:32:40.27#ibcon#flushed, iclass 25, count 2 2006.229.23:32:40.27#ibcon#about to write, iclass 25, count 2 2006.229.23:32:40.27#ibcon#wrote, iclass 25, count 2 2006.229.23:32:40.27#ibcon#about to read 3, iclass 25, count 2 2006.229.23:32:40.30#ibcon#read 3, iclass 25, count 2 2006.229.23:32:40.30#ibcon#about to read 4, iclass 25, count 2 2006.229.23:32:40.30#ibcon#read 4, iclass 25, count 2 2006.229.23:32:40.30#ibcon#about to read 5, iclass 25, count 2 2006.229.23:32:40.30#ibcon#read 5, iclass 25, count 2 2006.229.23:32:40.30#ibcon#about to read 6, iclass 25, count 2 2006.229.23:32:40.30#ibcon#read 6, iclass 25, count 2 2006.229.23:32:40.30#ibcon#end of sib2, iclass 25, count 2 2006.229.23:32:40.30#ibcon#*after write, iclass 25, count 2 2006.229.23:32:40.30#ibcon#*before return 0, iclass 25, count 2 2006.229.23:32:40.30#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:40.30#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:32:40.30#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.23:32:40.30#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:40.30#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:40.42#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:40.42#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:40.42#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:32:40.42#ibcon#first serial, iclass 25, count 0 2006.229.23:32:40.42#ibcon#enter sib2, iclass 25, count 0 2006.229.23:32:40.42#ibcon#flushed, iclass 25, count 0 2006.229.23:32:40.42#ibcon#about to write, iclass 25, count 0 2006.229.23:32:40.42#ibcon#wrote, iclass 25, count 0 2006.229.23:32:40.42#ibcon#about to read 3, iclass 25, count 0 2006.229.23:32:40.44#ibcon#read 3, iclass 25, count 0 2006.229.23:32:40.44#ibcon#about to read 4, iclass 25, count 0 2006.229.23:32:40.44#ibcon#read 4, iclass 25, count 0 2006.229.23:32:40.44#ibcon#about to read 5, iclass 25, count 0 2006.229.23:32:40.44#ibcon#read 5, iclass 25, count 0 2006.229.23:32:40.44#ibcon#about to read 6, iclass 25, count 0 2006.229.23:32:40.44#ibcon#read 6, iclass 25, count 0 2006.229.23:32:40.44#ibcon#end of sib2, iclass 25, count 0 2006.229.23:32:40.44#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:32:40.44#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:32:40.44#ibcon#[27=USB\r\n] 2006.229.23:32:40.44#ibcon#*before write, iclass 25, count 0 2006.229.23:32:40.44#ibcon#enter sib2, iclass 25, count 0 2006.229.23:32:40.44#ibcon#flushed, iclass 25, count 0 2006.229.23:32:40.44#ibcon#about to write, iclass 25, count 0 2006.229.23:32:40.44#ibcon#wrote, iclass 25, count 0 2006.229.23:32:40.44#ibcon#about to read 3, iclass 25, count 0 2006.229.23:32:40.47#ibcon#read 3, iclass 25, count 0 2006.229.23:32:40.47#ibcon#about to read 4, iclass 25, count 0 2006.229.23:32:40.47#ibcon#read 4, iclass 25, count 0 2006.229.23:32:40.47#ibcon#about to read 5, iclass 25, count 0 2006.229.23:32:40.47#ibcon#read 5, iclass 25, count 0 2006.229.23:32:40.47#ibcon#about to read 6, iclass 25, count 0 2006.229.23:32:40.47#ibcon#read 6, iclass 25, count 0 2006.229.23:32:40.47#ibcon#end of sib2, iclass 25, count 0 2006.229.23:32:40.47#ibcon#*after write, iclass 25, count 0 2006.229.23:32:40.47#ibcon#*before return 0, iclass 25, count 0 2006.229.23:32:40.47#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:40.47#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:32:40.47#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:32:40.47#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:32:40.47$vck44/vblo=6,719.99 2006.229.23:32:40.47#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.23:32:40.47#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.23:32:40.47#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:40.47#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:40.47#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:40.47#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:40.47#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:32:40.47#ibcon#first serial, iclass 27, count 0 2006.229.23:32:40.47#ibcon#enter sib2, iclass 27, count 0 2006.229.23:32:40.47#ibcon#flushed, iclass 27, count 0 2006.229.23:32:40.47#ibcon#about to write, iclass 27, count 0 2006.229.23:32:40.47#ibcon#wrote, iclass 27, count 0 2006.229.23:32:40.47#ibcon#about to read 3, iclass 27, count 0 2006.229.23:32:40.49#ibcon#read 3, iclass 27, count 0 2006.229.23:32:40.49#ibcon#about to read 4, iclass 27, count 0 2006.229.23:32:40.49#ibcon#read 4, iclass 27, count 0 2006.229.23:32:40.49#ibcon#about to read 5, iclass 27, count 0 2006.229.23:32:40.49#ibcon#read 5, iclass 27, count 0 2006.229.23:32:40.49#ibcon#about to read 6, iclass 27, count 0 2006.229.23:32:40.49#ibcon#read 6, iclass 27, count 0 2006.229.23:32:40.49#ibcon#end of sib2, iclass 27, count 0 2006.229.23:32:40.49#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:32:40.49#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:32:40.49#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:32:40.49#ibcon#*before write, iclass 27, count 0 2006.229.23:32:40.49#ibcon#enter sib2, iclass 27, count 0 2006.229.23:32:40.49#ibcon#flushed, iclass 27, count 0 2006.229.23:32:40.49#ibcon#about to write, iclass 27, count 0 2006.229.23:32:40.49#ibcon#wrote, iclass 27, count 0 2006.229.23:32:40.49#ibcon#about to read 3, iclass 27, count 0 2006.229.23:32:40.53#ibcon#read 3, iclass 27, count 0 2006.229.23:32:40.53#ibcon#about to read 4, iclass 27, count 0 2006.229.23:32:40.53#ibcon#read 4, iclass 27, count 0 2006.229.23:32:40.53#ibcon#about to read 5, iclass 27, count 0 2006.229.23:32:40.53#ibcon#read 5, iclass 27, count 0 2006.229.23:32:40.53#ibcon#about to read 6, iclass 27, count 0 2006.229.23:32:40.53#ibcon#read 6, iclass 27, count 0 2006.229.23:32:40.53#ibcon#end of sib2, iclass 27, count 0 2006.229.23:32:40.53#ibcon#*after write, iclass 27, count 0 2006.229.23:32:40.53#ibcon#*before return 0, iclass 27, count 0 2006.229.23:32:40.53#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:40.53#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:32:40.53#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:32:40.53#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:32:40.53$vck44/vb=6,4 2006.229.23:32:40.53#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.23:32:40.53#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.23:32:40.53#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:40.53#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:40.59#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:40.59#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:40.59#ibcon#enter wrdev, iclass 29, count 2 2006.229.23:32:40.59#ibcon#first serial, iclass 29, count 2 2006.229.23:32:40.59#ibcon#enter sib2, iclass 29, count 2 2006.229.23:32:40.59#ibcon#flushed, iclass 29, count 2 2006.229.23:32:40.59#ibcon#about to write, iclass 29, count 2 2006.229.23:32:40.59#ibcon#wrote, iclass 29, count 2 2006.229.23:32:40.59#ibcon#about to read 3, iclass 29, count 2 2006.229.23:32:40.61#ibcon#read 3, iclass 29, count 2 2006.229.23:32:40.61#ibcon#about to read 4, iclass 29, count 2 2006.229.23:32:40.61#ibcon#read 4, iclass 29, count 2 2006.229.23:32:40.61#ibcon#about to read 5, iclass 29, count 2 2006.229.23:32:40.61#ibcon#read 5, iclass 29, count 2 2006.229.23:32:40.61#ibcon#about to read 6, iclass 29, count 2 2006.229.23:32:40.61#ibcon#read 6, iclass 29, count 2 2006.229.23:32:40.61#ibcon#end of sib2, iclass 29, count 2 2006.229.23:32:40.61#ibcon#*mode == 0, iclass 29, count 2 2006.229.23:32:40.61#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.23:32:40.61#ibcon#[27=AT06-04\r\n] 2006.229.23:32:40.61#ibcon#*before write, iclass 29, count 2 2006.229.23:32:40.61#ibcon#enter sib2, iclass 29, count 2 2006.229.23:32:40.61#ibcon#flushed, iclass 29, count 2 2006.229.23:32:40.61#ibcon#about to write, iclass 29, count 2 2006.229.23:32:40.61#ibcon#wrote, iclass 29, count 2 2006.229.23:32:40.61#ibcon#about to read 3, iclass 29, count 2 2006.229.23:32:40.64#ibcon#read 3, iclass 29, count 2 2006.229.23:32:40.64#ibcon#about to read 4, iclass 29, count 2 2006.229.23:32:40.64#ibcon#read 4, iclass 29, count 2 2006.229.23:32:40.64#ibcon#about to read 5, iclass 29, count 2 2006.229.23:32:40.64#ibcon#read 5, iclass 29, count 2 2006.229.23:32:40.64#ibcon#about to read 6, iclass 29, count 2 2006.229.23:32:40.64#ibcon#read 6, iclass 29, count 2 2006.229.23:32:40.64#ibcon#end of sib2, iclass 29, count 2 2006.229.23:32:40.64#ibcon#*after write, iclass 29, count 2 2006.229.23:32:40.64#ibcon#*before return 0, iclass 29, count 2 2006.229.23:32:40.64#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:40.64#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:32:40.64#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.23:32:40.64#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:40.64#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:40.76#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:40.76#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:40.76#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:32:40.76#ibcon#first serial, iclass 29, count 0 2006.229.23:32:40.76#ibcon#enter sib2, iclass 29, count 0 2006.229.23:32:40.76#ibcon#flushed, iclass 29, count 0 2006.229.23:32:40.76#ibcon#about to write, iclass 29, count 0 2006.229.23:32:40.76#ibcon#wrote, iclass 29, count 0 2006.229.23:32:40.76#ibcon#about to read 3, iclass 29, count 0 2006.229.23:32:40.78#ibcon#read 3, iclass 29, count 0 2006.229.23:32:40.78#ibcon#about to read 4, iclass 29, count 0 2006.229.23:32:40.78#ibcon#read 4, iclass 29, count 0 2006.229.23:32:40.78#ibcon#about to read 5, iclass 29, count 0 2006.229.23:32:40.78#ibcon#read 5, iclass 29, count 0 2006.229.23:32:40.78#ibcon#about to read 6, iclass 29, count 0 2006.229.23:32:40.78#ibcon#read 6, iclass 29, count 0 2006.229.23:32:40.78#ibcon#end of sib2, iclass 29, count 0 2006.229.23:32:40.78#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:32:40.78#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:32:40.78#ibcon#[27=USB\r\n] 2006.229.23:32:40.78#ibcon#*before write, iclass 29, count 0 2006.229.23:32:40.78#ibcon#enter sib2, iclass 29, count 0 2006.229.23:32:40.78#ibcon#flushed, iclass 29, count 0 2006.229.23:32:40.78#ibcon#about to write, iclass 29, count 0 2006.229.23:32:40.78#ibcon#wrote, iclass 29, count 0 2006.229.23:32:40.78#ibcon#about to read 3, iclass 29, count 0 2006.229.23:32:40.81#ibcon#read 3, iclass 29, count 0 2006.229.23:32:40.81#ibcon#about to read 4, iclass 29, count 0 2006.229.23:32:40.81#ibcon#read 4, iclass 29, count 0 2006.229.23:32:40.81#ibcon#about to read 5, iclass 29, count 0 2006.229.23:32:40.81#ibcon#read 5, iclass 29, count 0 2006.229.23:32:40.81#ibcon#about to read 6, iclass 29, count 0 2006.229.23:32:40.81#ibcon#read 6, iclass 29, count 0 2006.229.23:32:40.81#ibcon#end of sib2, iclass 29, count 0 2006.229.23:32:40.81#ibcon#*after write, iclass 29, count 0 2006.229.23:32:40.81#ibcon#*before return 0, iclass 29, count 0 2006.229.23:32:40.81#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:40.81#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:32:40.81#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:32:40.81#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:32:40.81$vck44/vblo=7,734.99 2006.229.23:32:40.81#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:32:40.81#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:32:40.81#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:40.81#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:40.81#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:40.81#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:40.81#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:32:40.81#ibcon#first serial, iclass 31, count 0 2006.229.23:32:40.81#ibcon#enter sib2, iclass 31, count 0 2006.229.23:32:40.81#ibcon#flushed, iclass 31, count 0 2006.229.23:32:40.81#ibcon#about to write, iclass 31, count 0 2006.229.23:32:40.81#ibcon#wrote, iclass 31, count 0 2006.229.23:32:40.81#ibcon#about to read 3, iclass 31, count 0 2006.229.23:32:40.83#ibcon#read 3, iclass 31, count 0 2006.229.23:32:40.83#ibcon#about to read 4, iclass 31, count 0 2006.229.23:32:40.83#ibcon#read 4, iclass 31, count 0 2006.229.23:32:40.83#ibcon#about to read 5, iclass 31, count 0 2006.229.23:32:40.83#ibcon#read 5, iclass 31, count 0 2006.229.23:32:40.83#ibcon#about to read 6, iclass 31, count 0 2006.229.23:32:40.83#ibcon#read 6, iclass 31, count 0 2006.229.23:32:40.83#ibcon#end of sib2, iclass 31, count 0 2006.229.23:32:40.83#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:32:40.83#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:32:40.83#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:32:40.83#ibcon#*before write, iclass 31, count 0 2006.229.23:32:40.83#ibcon#enter sib2, iclass 31, count 0 2006.229.23:32:40.83#ibcon#flushed, iclass 31, count 0 2006.229.23:32:40.83#ibcon#about to write, iclass 31, count 0 2006.229.23:32:40.83#ibcon#wrote, iclass 31, count 0 2006.229.23:32:40.83#ibcon#about to read 3, iclass 31, count 0 2006.229.23:32:40.87#ibcon#read 3, iclass 31, count 0 2006.229.23:32:40.87#ibcon#about to read 4, iclass 31, count 0 2006.229.23:32:40.87#ibcon#read 4, iclass 31, count 0 2006.229.23:32:40.87#ibcon#about to read 5, iclass 31, count 0 2006.229.23:32:40.87#ibcon#read 5, iclass 31, count 0 2006.229.23:32:40.87#ibcon#about to read 6, iclass 31, count 0 2006.229.23:32:40.87#ibcon#read 6, iclass 31, count 0 2006.229.23:32:40.87#ibcon#end of sib2, iclass 31, count 0 2006.229.23:32:40.87#ibcon#*after write, iclass 31, count 0 2006.229.23:32:40.87#ibcon#*before return 0, iclass 31, count 0 2006.229.23:32:40.87#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:40.87#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:32:40.87#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:32:40.87#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:32:40.87$vck44/vb=7,4 2006.229.23:32:40.87#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.23:32:40.87#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.23:32:40.87#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:40.87#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:40.93#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:40.93#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:40.93#ibcon#enter wrdev, iclass 33, count 2 2006.229.23:32:40.93#ibcon#first serial, iclass 33, count 2 2006.229.23:32:40.93#ibcon#enter sib2, iclass 33, count 2 2006.229.23:32:40.93#ibcon#flushed, iclass 33, count 2 2006.229.23:32:40.93#ibcon#about to write, iclass 33, count 2 2006.229.23:32:40.93#ibcon#wrote, iclass 33, count 2 2006.229.23:32:40.93#ibcon#about to read 3, iclass 33, count 2 2006.229.23:32:40.95#ibcon#read 3, iclass 33, count 2 2006.229.23:32:40.95#ibcon#about to read 4, iclass 33, count 2 2006.229.23:32:40.95#ibcon#read 4, iclass 33, count 2 2006.229.23:32:40.95#ibcon#about to read 5, iclass 33, count 2 2006.229.23:32:40.95#ibcon#read 5, iclass 33, count 2 2006.229.23:32:40.95#ibcon#about to read 6, iclass 33, count 2 2006.229.23:32:40.95#ibcon#read 6, iclass 33, count 2 2006.229.23:32:40.95#ibcon#end of sib2, iclass 33, count 2 2006.229.23:32:40.95#ibcon#*mode == 0, iclass 33, count 2 2006.229.23:32:40.95#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.23:32:40.95#ibcon#[27=AT07-04\r\n] 2006.229.23:32:40.95#ibcon#*before write, iclass 33, count 2 2006.229.23:32:40.95#ibcon#enter sib2, iclass 33, count 2 2006.229.23:32:40.95#ibcon#flushed, iclass 33, count 2 2006.229.23:32:40.95#ibcon#about to write, iclass 33, count 2 2006.229.23:32:40.95#ibcon#wrote, iclass 33, count 2 2006.229.23:32:40.95#ibcon#about to read 3, iclass 33, count 2 2006.229.23:32:40.98#ibcon#read 3, iclass 33, count 2 2006.229.23:32:40.98#ibcon#about to read 4, iclass 33, count 2 2006.229.23:32:40.98#ibcon#read 4, iclass 33, count 2 2006.229.23:32:40.98#ibcon#about to read 5, iclass 33, count 2 2006.229.23:32:40.98#ibcon#read 5, iclass 33, count 2 2006.229.23:32:40.98#ibcon#about to read 6, iclass 33, count 2 2006.229.23:32:40.98#ibcon#read 6, iclass 33, count 2 2006.229.23:32:40.98#ibcon#end of sib2, iclass 33, count 2 2006.229.23:32:40.98#ibcon#*after write, iclass 33, count 2 2006.229.23:32:40.98#ibcon#*before return 0, iclass 33, count 2 2006.229.23:32:40.98#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:40.98#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:32:40.98#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.23:32:40.98#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:40.98#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:41.10#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:41.10#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:41.10#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:32:41.10#ibcon#first serial, iclass 33, count 0 2006.229.23:32:41.10#ibcon#enter sib2, iclass 33, count 0 2006.229.23:32:41.10#ibcon#flushed, iclass 33, count 0 2006.229.23:32:41.10#ibcon#about to write, iclass 33, count 0 2006.229.23:32:41.10#ibcon#wrote, iclass 33, count 0 2006.229.23:32:41.10#ibcon#about to read 3, iclass 33, count 0 2006.229.23:32:41.12#ibcon#read 3, iclass 33, count 0 2006.229.23:32:41.12#ibcon#about to read 4, iclass 33, count 0 2006.229.23:32:41.12#ibcon#read 4, iclass 33, count 0 2006.229.23:32:41.12#ibcon#about to read 5, iclass 33, count 0 2006.229.23:32:41.12#ibcon#read 5, iclass 33, count 0 2006.229.23:32:41.12#ibcon#about to read 6, iclass 33, count 0 2006.229.23:32:41.12#ibcon#read 6, iclass 33, count 0 2006.229.23:32:41.12#ibcon#end of sib2, iclass 33, count 0 2006.229.23:32:41.12#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:32:41.12#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:32:41.12#ibcon#[27=USB\r\n] 2006.229.23:32:41.12#ibcon#*before write, iclass 33, count 0 2006.229.23:32:41.12#ibcon#enter sib2, iclass 33, count 0 2006.229.23:32:41.12#ibcon#flushed, iclass 33, count 0 2006.229.23:32:41.12#ibcon#about to write, iclass 33, count 0 2006.229.23:32:41.12#ibcon#wrote, iclass 33, count 0 2006.229.23:32:41.12#ibcon#about to read 3, iclass 33, count 0 2006.229.23:32:41.15#ibcon#read 3, iclass 33, count 0 2006.229.23:32:41.15#ibcon#about to read 4, iclass 33, count 0 2006.229.23:32:41.15#ibcon#read 4, iclass 33, count 0 2006.229.23:32:41.15#ibcon#about to read 5, iclass 33, count 0 2006.229.23:32:41.15#ibcon#read 5, iclass 33, count 0 2006.229.23:32:41.15#ibcon#about to read 6, iclass 33, count 0 2006.229.23:32:41.15#ibcon#read 6, iclass 33, count 0 2006.229.23:32:41.15#ibcon#end of sib2, iclass 33, count 0 2006.229.23:32:41.15#ibcon#*after write, iclass 33, count 0 2006.229.23:32:41.15#ibcon#*before return 0, iclass 33, count 0 2006.229.23:32:41.15#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:41.15#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:32:41.15#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:32:41.15#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:32:41.15$vck44/vblo=8,744.99 2006.229.23:32:41.15#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:32:41.15#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:32:41.15#ibcon#ireg 17 cls_cnt 0 2006.229.23:32:41.15#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:41.15#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:41.15#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:41.15#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:32:41.15#ibcon#first serial, iclass 35, count 0 2006.229.23:32:41.15#ibcon#enter sib2, iclass 35, count 0 2006.229.23:32:41.15#ibcon#flushed, iclass 35, count 0 2006.229.23:32:41.15#ibcon#about to write, iclass 35, count 0 2006.229.23:32:41.15#ibcon#wrote, iclass 35, count 0 2006.229.23:32:41.15#ibcon#about to read 3, iclass 35, count 0 2006.229.23:32:41.17#ibcon#read 3, iclass 35, count 0 2006.229.23:32:41.17#ibcon#about to read 4, iclass 35, count 0 2006.229.23:32:41.17#ibcon#read 4, iclass 35, count 0 2006.229.23:32:41.17#ibcon#about to read 5, iclass 35, count 0 2006.229.23:32:41.17#ibcon#read 5, iclass 35, count 0 2006.229.23:32:41.17#ibcon#about to read 6, iclass 35, count 0 2006.229.23:32:41.17#ibcon#read 6, iclass 35, count 0 2006.229.23:32:41.17#ibcon#end of sib2, iclass 35, count 0 2006.229.23:32:41.17#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:32:41.17#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:32:41.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:32:41.17#ibcon#*before write, iclass 35, count 0 2006.229.23:32:41.17#ibcon#enter sib2, iclass 35, count 0 2006.229.23:32:41.17#ibcon#flushed, iclass 35, count 0 2006.229.23:32:41.17#ibcon#about to write, iclass 35, count 0 2006.229.23:32:41.17#ibcon#wrote, iclass 35, count 0 2006.229.23:32:41.17#ibcon#about to read 3, iclass 35, count 0 2006.229.23:32:41.21#ibcon#read 3, iclass 35, count 0 2006.229.23:32:41.21#ibcon#about to read 4, iclass 35, count 0 2006.229.23:32:41.21#ibcon#read 4, iclass 35, count 0 2006.229.23:32:41.21#ibcon#about to read 5, iclass 35, count 0 2006.229.23:32:41.21#ibcon#read 5, iclass 35, count 0 2006.229.23:32:41.21#ibcon#about to read 6, iclass 35, count 0 2006.229.23:32:41.21#ibcon#read 6, iclass 35, count 0 2006.229.23:32:41.21#ibcon#end of sib2, iclass 35, count 0 2006.229.23:32:41.21#ibcon#*after write, iclass 35, count 0 2006.229.23:32:41.21#ibcon#*before return 0, iclass 35, count 0 2006.229.23:32:41.21#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:41.21#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:32:41.21#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:32:41.21#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:32:41.21$vck44/vb=8,4 2006.229.23:32:41.21#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.23:32:41.21#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.23:32:41.21#ibcon#ireg 11 cls_cnt 2 2006.229.23:32:41.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:41.27#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:41.27#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:41.27#ibcon#enter wrdev, iclass 37, count 2 2006.229.23:32:41.27#ibcon#first serial, iclass 37, count 2 2006.229.23:32:41.27#ibcon#enter sib2, iclass 37, count 2 2006.229.23:32:41.27#ibcon#flushed, iclass 37, count 2 2006.229.23:32:41.27#ibcon#about to write, iclass 37, count 2 2006.229.23:32:41.27#ibcon#wrote, iclass 37, count 2 2006.229.23:32:41.27#ibcon#about to read 3, iclass 37, count 2 2006.229.23:32:41.29#ibcon#read 3, iclass 37, count 2 2006.229.23:32:41.29#ibcon#about to read 4, iclass 37, count 2 2006.229.23:32:41.29#ibcon#read 4, iclass 37, count 2 2006.229.23:32:41.29#ibcon#about to read 5, iclass 37, count 2 2006.229.23:32:41.29#ibcon#read 5, iclass 37, count 2 2006.229.23:32:41.29#ibcon#about to read 6, iclass 37, count 2 2006.229.23:32:41.29#ibcon#read 6, iclass 37, count 2 2006.229.23:32:41.29#ibcon#end of sib2, iclass 37, count 2 2006.229.23:32:41.29#ibcon#*mode == 0, iclass 37, count 2 2006.229.23:32:41.29#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.23:32:41.29#ibcon#[27=AT08-04\r\n] 2006.229.23:32:41.29#ibcon#*before write, iclass 37, count 2 2006.229.23:32:41.29#ibcon#enter sib2, iclass 37, count 2 2006.229.23:32:41.29#ibcon#flushed, iclass 37, count 2 2006.229.23:32:41.29#ibcon#about to write, iclass 37, count 2 2006.229.23:32:41.29#ibcon#wrote, iclass 37, count 2 2006.229.23:32:41.29#ibcon#about to read 3, iclass 37, count 2 2006.229.23:32:41.32#ibcon#read 3, iclass 37, count 2 2006.229.23:32:41.32#ibcon#about to read 4, iclass 37, count 2 2006.229.23:32:41.32#ibcon#read 4, iclass 37, count 2 2006.229.23:32:41.32#ibcon#about to read 5, iclass 37, count 2 2006.229.23:32:41.32#ibcon#read 5, iclass 37, count 2 2006.229.23:32:41.32#ibcon#about to read 6, iclass 37, count 2 2006.229.23:32:41.32#ibcon#read 6, iclass 37, count 2 2006.229.23:32:41.32#ibcon#end of sib2, iclass 37, count 2 2006.229.23:32:41.32#ibcon#*after write, iclass 37, count 2 2006.229.23:32:41.32#ibcon#*before return 0, iclass 37, count 2 2006.229.23:32:41.32#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:41.32#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:32:41.32#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.23:32:41.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:32:41.32#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:41.44#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:41.44#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:41.44#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:32:41.44#ibcon#first serial, iclass 37, count 0 2006.229.23:32:41.44#ibcon#enter sib2, iclass 37, count 0 2006.229.23:32:41.44#ibcon#flushed, iclass 37, count 0 2006.229.23:32:41.44#ibcon#about to write, iclass 37, count 0 2006.229.23:32:41.44#ibcon#wrote, iclass 37, count 0 2006.229.23:32:41.44#ibcon#about to read 3, iclass 37, count 0 2006.229.23:32:41.46#ibcon#read 3, iclass 37, count 0 2006.229.23:32:41.46#ibcon#about to read 4, iclass 37, count 0 2006.229.23:32:41.46#ibcon#read 4, iclass 37, count 0 2006.229.23:32:41.46#ibcon#about to read 5, iclass 37, count 0 2006.229.23:32:41.46#ibcon#read 5, iclass 37, count 0 2006.229.23:32:41.46#ibcon#about to read 6, iclass 37, count 0 2006.229.23:32:41.46#ibcon#read 6, iclass 37, count 0 2006.229.23:32:41.46#ibcon#end of sib2, iclass 37, count 0 2006.229.23:32:41.46#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:32:41.46#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:32:41.46#ibcon#[27=USB\r\n] 2006.229.23:32:41.46#ibcon#*before write, iclass 37, count 0 2006.229.23:32:41.46#ibcon#enter sib2, iclass 37, count 0 2006.229.23:32:41.46#ibcon#flushed, iclass 37, count 0 2006.229.23:32:41.46#ibcon#about to write, iclass 37, count 0 2006.229.23:32:41.46#ibcon#wrote, iclass 37, count 0 2006.229.23:32:41.46#ibcon#about to read 3, iclass 37, count 0 2006.229.23:32:41.49#ibcon#read 3, iclass 37, count 0 2006.229.23:32:41.49#ibcon#about to read 4, iclass 37, count 0 2006.229.23:32:41.49#ibcon#read 4, iclass 37, count 0 2006.229.23:32:41.49#ibcon#about to read 5, iclass 37, count 0 2006.229.23:32:41.49#ibcon#read 5, iclass 37, count 0 2006.229.23:32:41.49#ibcon#about to read 6, iclass 37, count 0 2006.229.23:32:41.49#ibcon#read 6, iclass 37, count 0 2006.229.23:32:41.49#ibcon#end of sib2, iclass 37, count 0 2006.229.23:32:41.49#ibcon#*after write, iclass 37, count 0 2006.229.23:32:41.49#ibcon#*before return 0, iclass 37, count 0 2006.229.23:32:41.49#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:41.49#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:32:41.49#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:32:41.49#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:32:41.49$vck44/vabw=wide 2006.229.23:32:41.49#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.23:32:41.49#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.23:32:41.49#ibcon#ireg 8 cls_cnt 0 2006.229.23:32:41.49#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:41.49#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:41.49#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:41.49#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:32:41.49#ibcon#first serial, iclass 39, count 0 2006.229.23:32:41.49#ibcon#enter sib2, iclass 39, count 0 2006.229.23:32:41.49#ibcon#flushed, iclass 39, count 0 2006.229.23:32:41.49#ibcon#about to write, iclass 39, count 0 2006.229.23:32:41.49#ibcon#wrote, iclass 39, count 0 2006.229.23:32:41.49#ibcon#about to read 3, iclass 39, count 0 2006.229.23:32:41.51#ibcon#read 3, iclass 39, count 0 2006.229.23:32:41.51#ibcon#about to read 4, iclass 39, count 0 2006.229.23:32:41.51#ibcon#read 4, iclass 39, count 0 2006.229.23:32:41.51#ibcon#about to read 5, iclass 39, count 0 2006.229.23:32:41.51#ibcon#read 5, iclass 39, count 0 2006.229.23:32:41.51#ibcon#about to read 6, iclass 39, count 0 2006.229.23:32:41.51#ibcon#read 6, iclass 39, count 0 2006.229.23:32:41.51#ibcon#end of sib2, iclass 39, count 0 2006.229.23:32:41.51#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:32:41.51#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:32:41.51#ibcon#[25=BW32\r\n] 2006.229.23:32:41.51#ibcon#*before write, iclass 39, count 0 2006.229.23:32:41.51#ibcon#enter sib2, iclass 39, count 0 2006.229.23:32:41.51#ibcon#flushed, iclass 39, count 0 2006.229.23:32:41.51#ibcon#about to write, iclass 39, count 0 2006.229.23:32:41.51#ibcon#wrote, iclass 39, count 0 2006.229.23:32:41.51#ibcon#about to read 3, iclass 39, count 0 2006.229.23:32:41.54#ibcon#read 3, iclass 39, count 0 2006.229.23:32:41.54#ibcon#about to read 4, iclass 39, count 0 2006.229.23:32:41.54#ibcon#read 4, iclass 39, count 0 2006.229.23:32:41.54#ibcon#about to read 5, iclass 39, count 0 2006.229.23:32:41.54#ibcon#read 5, iclass 39, count 0 2006.229.23:32:41.54#ibcon#about to read 6, iclass 39, count 0 2006.229.23:32:41.54#ibcon#read 6, iclass 39, count 0 2006.229.23:32:41.54#ibcon#end of sib2, iclass 39, count 0 2006.229.23:32:41.54#ibcon#*after write, iclass 39, count 0 2006.229.23:32:41.54#ibcon#*before return 0, iclass 39, count 0 2006.229.23:32:41.54#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:41.54#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:32:41.54#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:32:41.54#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:32:41.54$vck44/vbbw=wide 2006.229.23:32:41.54#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.23:32:41.54#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.23:32:41.54#ibcon#ireg 8 cls_cnt 0 2006.229.23:32:41.54#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:32:41.61#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:32:41.61#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:32:41.61#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:32:41.61#ibcon#first serial, iclass 3, count 0 2006.229.23:32:41.61#ibcon#enter sib2, iclass 3, count 0 2006.229.23:32:41.61#ibcon#flushed, iclass 3, count 0 2006.229.23:32:41.61#ibcon#about to write, iclass 3, count 0 2006.229.23:32:41.61#ibcon#wrote, iclass 3, count 0 2006.229.23:32:41.61#ibcon#about to read 3, iclass 3, count 0 2006.229.23:32:41.63#ibcon#read 3, iclass 3, count 0 2006.229.23:32:41.63#ibcon#about to read 4, iclass 3, count 0 2006.229.23:32:41.63#ibcon#read 4, iclass 3, count 0 2006.229.23:32:41.63#ibcon#about to read 5, iclass 3, count 0 2006.229.23:32:41.63#ibcon#read 5, iclass 3, count 0 2006.229.23:32:41.63#ibcon#about to read 6, iclass 3, count 0 2006.229.23:32:41.63#ibcon#read 6, iclass 3, count 0 2006.229.23:32:41.63#ibcon#end of sib2, iclass 3, count 0 2006.229.23:32:41.63#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:32:41.63#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:32:41.63#ibcon#[27=BW32\r\n] 2006.229.23:32:41.63#ibcon#*before write, iclass 3, count 0 2006.229.23:32:41.63#ibcon#enter sib2, iclass 3, count 0 2006.229.23:32:41.63#ibcon#flushed, iclass 3, count 0 2006.229.23:32:41.63#ibcon#about to write, iclass 3, count 0 2006.229.23:32:41.63#ibcon#wrote, iclass 3, count 0 2006.229.23:32:41.63#ibcon#about to read 3, iclass 3, count 0 2006.229.23:32:41.66#ibcon#read 3, iclass 3, count 0 2006.229.23:32:41.66#ibcon#about to read 4, iclass 3, count 0 2006.229.23:32:41.66#ibcon#read 4, iclass 3, count 0 2006.229.23:32:41.66#ibcon#about to read 5, iclass 3, count 0 2006.229.23:32:41.66#ibcon#read 5, iclass 3, count 0 2006.229.23:32:41.66#ibcon#about to read 6, iclass 3, count 0 2006.229.23:32:41.66#ibcon#read 6, iclass 3, count 0 2006.229.23:32:41.66#ibcon#end of sib2, iclass 3, count 0 2006.229.23:32:41.66#ibcon#*after write, iclass 3, count 0 2006.229.23:32:41.66#ibcon#*before return 0, iclass 3, count 0 2006.229.23:32:41.66#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:32:41.66#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:32:41.66#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:32:41.66#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:32:41.66$setupk4/ifdk4 2006.229.23:32:41.66$ifdk4/lo= 2006.229.23:32:41.66$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:32:41.66$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:32:41.66$ifdk4/patch= 2006.229.23:32:41.66$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:32:41.66$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:32:41.66$setupk4/!*+20s 2006.229.23:32:49.95#abcon#<5=/08 1.5 4.7 29.85 841002.6\r\n> 2006.229.23:32:49.97#abcon#{5=INTERFACE CLEAR} 2006.229.23:32:50.03#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:32:56.17$setupk4/"tpicd 2006.229.23:32:56.17$setupk4/echo=off 2006.229.23:32:56.17$setupk4/xlog=off 2006.229.23:32:56.17:!2006.229.23:33:23 2006.229.23:33:05.14#trakl#Source acquired 2006.229.23:33:05.14#flagr#flagr/antenna,acquired 2006.229.23:33:23.00:preob 2006.229.23:33:24.14/onsource/TRACKING 2006.229.23:33:24.14:!2006.229.23:33:33 2006.229.23:33:33.00:"tape 2006.229.23:33:33.00:"st=record 2006.229.23:33:33.00:data_valid=on 2006.229.23:33:33.00:midob 2006.229.23:33:33.14/onsource/TRACKING 2006.229.23:33:33.14/wx/29.89,1002.6,86 2006.229.23:33:33.22/cable/+6.4076E-03 2006.229.23:33:34.31/va/01,08,usb,yes,29,31 2006.229.23:33:34.31/va/02,07,usb,yes,32,32 2006.229.23:33:34.31/va/03,06,usb,yes,39,42 2006.229.23:33:34.31/va/04,07,usb,yes,33,34 2006.229.23:33:34.31/va/05,04,usb,yes,29,29 2006.229.23:33:34.31/va/06,04,usb,yes,33,32 2006.229.23:33:34.31/va/07,05,usb,yes,29,29 2006.229.23:33:34.31/va/08,06,usb,yes,21,26 2006.229.23:33:34.54/valo/01,524.99,yes,locked 2006.229.23:33:34.54/valo/02,534.99,yes,locked 2006.229.23:33:34.54/valo/03,564.99,yes,locked 2006.229.23:33:34.54/valo/04,624.99,yes,locked 2006.229.23:33:34.54/valo/05,734.99,yes,locked 2006.229.23:33:34.54/valo/06,814.99,yes,locked 2006.229.23:33:34.54/valo/07,864.99,yes,locked 2006.229.23:33:34.54/valo/08,884.99,yes,locked 2006.229.23:33:35.63/vb/01,04,usb,yes,31,29 2006.229.23:33:35.63/vb/02,04,usb,yes,33,33 2006.229.23:33:35.63/vb/03,04,usb,yes,30,33 2006.229.23:33:35.63/vb/04,04,usb,yes,35,33 2006.229.23:33:35.63/vb/05,04,usb,yes,27,29 2006.229.23:33:35.63/vb/06,04,usb,yes,31,28 2006.229.23:33:35.63/vb/07,04,usb,yes,31,31 2006.229.23:33:35.63/vb/08,04,usb,yes,29,32 2006.229.23:33:35.86/vblo/01,629.99,yes,locked 2006.229.23:33:35.86/vblo/02,634.99,yes,locked 2006.229.23:33:35.86/vblo/03,649.99,yes,locked 2006.229.23:33:35.86/vblo/04,679.99,yes,locked 2006.229.23:33:35.86/vblo/05,709.99,yes,locked 2006.229.23:33:35.86/vblo/06,719.99,yes,locked 2006.229.23:33:35.86/vblo/07,734.99,yes,locked 2006.229.23:33:35.86/vblo/08,744.99,yes,locked 2006.229.23:33:36.01/vabw/8 2006.229.23:33:36.16/vbbw/8 2006.229.23:33:36.25/xfe/off,on,12.2 2006.229.23:33:36.64/ifatt/23,28,28,28 2006.229.23:33:37.07/fmout-gps/S +4.57E-07 2006.229.23:33:37.11:!2006.229.23:34:43 2006.229.23:34:43.00:data_valid=off 2006.229.23:34:43.00:"et 2006.229.23:34:43.00:!+3s 2006.229.23:34:46.01:"tape 2006.229.23:34:46.01:postob 2006.229.23:34:46.17/cable/+6.4091E-03 2006.229.23:34:46.17/wx/29.95,1002.6,81 2006.229.23:34:47.08/fmout-gps/S +4.58E-07 2006.229.23:34:47.08:scan_name=229-2336,jd0608,100 2006.229.23:34:47.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.229.23:34:48.14#flagr#flagr/antenna,new-source 2006.229.23:34:48.14:checkk5 2006.229.23:34:48.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:34:48.89/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:34:49.30/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:34:49.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:34:50.10/chk_obsdata//k5ts1/T2292333??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.23:34:50.50/chk_obsdata//k5ts2/T2292333??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.23:34:50.90/chk_obsdata//k5ts3/T2292333??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.23:34:51.30/chk_obsdata//k5ts4/T2292333??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.229.23:34:52.04/k5log//k5ts1_log_newline 2006.229.23:34:52.75/k5log//k5ts2_log_newline 2006.229.23:34:53.45/k5log//k5ts3_log_newline 2006.229.23:34:54.16/k5log//k5ts4_log_newline 2006.229.23:34:54.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:34:54.19:setupk4=1 2006.229.23:34:54.19$setupk4/echo=on 2006.229.23:34:54.19$setupk4/pcalon 2006.229.23:34:54.19$pcalon/"no phase cal control is implemented here 2006.229.23:34:54.19$setupk4/"tpicd=stop 2006.229.23:34:54.19$setupk4/"rec=synch_on 2006.229.23:34:54.19$setupk4/"rec_mode=128 2006.229.23:34:54.19$setupk4/!* 2006.229.23:34:54.19$setupk4/recpk4 2006.229.23:34:54.19$recpk4/recpatch= 2006.229.23:34:54.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:34:54.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:34:54.20$setupk4/vck44 2006.229.23:34:54.20$vck44/valo=1,524.99 2006.229.23:34:54.20#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.23:34:54.20#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.23:34:54.20#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:54.20#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:54.20#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:54.20#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:54.20#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:34:54.20#ibcon#first serial, iclass 26, count 0 2006.229.23:34:54.20#ibcon#enter sib2, iclass 26, count 0 2006.229.23:34:54.20#ibcon#flushed, iclass 26, count 0 2006.229.23:34:54.20#ibcon#about to write, iclass 26, count 0 2006.229.23:34:54.20#ibcon#wrote, iclass 26, count 0 2006.229.23:34:54.20#ibcon#about to read 3, iclass 26, count 0 2006.229.23:34:54.22#ibcon#read 3, iclass 26, count 0 2006.229.23:34:54.22#ibcon#about to read 4, iclass 26, count 0 2006.229.23:34:54.22#ibcon#read 4, iclass 26, count 0 2006.229.23:34:54.22#ibcon#about to read 5, iclass 26, count 0 2006.229.23:34:54.22#ibcon#read 5, iclass 26, count 0 2006.229.23:34:54.22#ibcon#about to read 6, iclass 26, count 0 2006.229.23:34:54.22#ibcon#read 6, iclass 26, count 0 2006.229.23:34:54.22#ibcon#end of sib2, iclass 26, count 0 2006.229.23:34:54.22#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:34:54.22#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:34:54.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:34:54.22#ibcon#*before write, iclass 26, count 0 2006.229.23:34:54.22#ibcon#enter sib2, iclass 26, count 0 2006.229.23:34:54.22#ibcon#flushed, iclass 26, count 0 2006.229.23:34:54.22#ibcon#about to write, iclass 26, count 0 2006.229.23:34:54.22#ibcon#wrote, iclass 26, count 0 2006.229.23:34:54.22#ibcon#about to read 3, iclass 26, count 0 2006.229.23:34:54.27#ibcon#read 3, iclass 26, count 0 2006.229.23:34:54.27#ibcon#about to read 4, iclass 26, count 0 2006.229.23:34:54.27#ibcon#read 4, iclass 26, count 0 2006.229.23:34:54.27#ibcon#about to read 5, iclass 26, count 0 2006.229.23:34:54.27#ibcon#read 5, iclass 26, count 0 2006.229.23:34:54.27#ibcon#about to read 6, iclass 26, count 0 2006.229.23:34:54.27#ibcon#read 6, iclass 26, count 0 2006.229.23:34:54.27#ibcon#end of sib2, iclass 26, count 0 2006.229.23:34:54.27#ibcon#*after write, iclass 26, count 0 2006.229.23:34:54.27#ibcon#*before return 0, iclass 26, count 0 2006.229.23:34:54.27#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:54.27#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:54.27#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:34:54.27#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:34:54.27$vck44/va=1,8 2006.229.23:34:54.27#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.23:34:54.27#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.23:34:54.27#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:54.27#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:54.27#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:54.27#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:54.27#ibcon#enter wrdev, iclass 28, count 2 2006.229.23:34:54.27#ibcon#first serial, iclass 28, count 2 2006.229.23:34:54.27#ibcon#enter sib2, iclass 28, count 2 2006.229.23:34:54.27#ibcon#flushed, iclass 28, count 2 2006.229.23:34:54.27#ibcon#about to write, iclass 28, count 2 2006.229.23:34:54.27#ibcon#wrote, iclass 28, count 2 2006.229.23:34:54.27#ibcon#about to read 3, iclass 28, count 2 2006.229.23:34:54.29#ibcon#read 3, iclass 28, count 2 2006.229.23:34:54.29#ibcon#about to read 4, iclass 28, count 2 2006.229.23:34:54.29#ibcon#read 4, iclass 28, count 2 2006.229.23:34:54.29#ibcon#about to read 5, iclass 28, count 2 2006.229.23:34:54.29#ibcon#read 5, iclass 28, count 2 2006.229.23:34:54.29#ibcon#about to read 6, iclass 28, count 2 2006.229.23:34:54.29#ibcon#read 6, iclass 28, count 2 2006.229.23:34:54.29#ibcon#end of sib2, iclass 28, count 2 2006.229.23:34:54.29#ibcon#*mode == 0, iclass 28, count 2 2006.229.23:34:54.29#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.23:34:54.29#ibcon#[25=AT01-08\r\n] 2006.229.23:34:54.29#ibcon#*before write, iclass 28, count 2 2006.229.23:34:54.29#ibcon#enter sib2, iclass 28, count 2 2006.229.23:34:54.29#ibcon#flushed, iclass 28, count 2 2006.229.23:34:54.29#ibcon#about to write, iclass 28, count 2 2006.229.23:34:54.29#ibcon#wrote, iclass 28, count 2 2006.229.23:34:54.29#ibcon#about to read 3, iclass 28, count 2 2006.229.23:34:54.32#ibcon#read 3, iclass 28, count 2 2006.229.23:34:54.32#ibcon#about to read 4, iclass 28, count 2 2006.229.23:34:54.32#ibcon#read 4, iclass 28, count 2 2006.229.23:34:54.32#ibcon#about to read 5, iclass 28, count 2 2006.229.23:34:54.32#ibcon#read 5, iclass 28, count 2 2006.229.23:34:54.32#ibcon#about to read 6, iclass 28, count 2 2006.229.23:34:54.32#ibcon#read 6, iclass 28, count 2 2006.229.23:34:54.32#ibcon#end of sib2, iclass 28, count 2 2006.229.23:34:54.32#ibcon#*after write, iclass 28, count 2 2006.229.23:34:54.32#ibcon#*before return 0, iclass 28, count 2 2006.229.23:34:54.32#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:54.32#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:54.32#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.23:34:54.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:54.32#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:54.44#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:54.44#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:54.44#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:34:54.44#ibcon#first serial, iclass 28, count 0 2006.229.23:34:54.44#ibcon#enter sib2, iclass 28, count 0 2006.229.23:34:54.44#ibcon#flushed, iclass 28, count 0 2006.229.23:34:54.44#ibcon#about to write, iclass 28, count 0 2006.229.23:34:54.44#ibcon#wrote, iclass 28, count 0 2006.229.23:34:54.44#ibcon#about to read 3, iclass 28, count 0 2006.229.23:34:54.46#ibcon#read 3, iclass 28, count 0 2006.229.23:34:54.46#ibcon#about to read 4, iclass 28, count 0 2006.229.23:34:54.46#ibcon#read 4, iclass 28, count 0 2006.229.23:34:54.46#ibcon#about to read 5, iclass 28, count 0 2006.229.23:34:54.46#ibcon#read 5, iclass 28, count 0 2006.229.23:34:54.46#ibcon#about to read 6, iclass 28, count 0 2006.229.23:34:54.46#ibcon#read 6, iclass 28, count 0 2006.229.23:34:54.46#ibcon#end of sib2, iclass 28, count 0 2006.229.23:34:54.46#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:34:54.46#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:34:54.46#ibcon#[25=USB\r\n] 2006.229.23:34:54.46#ibcon#*before write, iclass 28, count 0 2006.229.23:34:54.46#ibcon#enter sib2, iclass 28, count 0 2006.229.23:34:54.46#ibcon#flushed, iclass 28, count 0 2006.229.23:34:54.46#ibcon#about to write, iclass 28, count 0 2006.229.23:34:54.46#ibcon#wrote, iclass 28, count 0 2006.229.23:34:54.46#ibcon#about to read 3, iclass 28, count 0 2006.229.23:34:54.49#ibcon#read 3, iclass 28, count 0 2006.229.23:34:54.49#ibcon#about to read 4, iclass 28, count 0 2006.229.23:34:54.49#ibcon#read 4, iclass 28, count 0 2006.229.23:34:54.49#ibcon#about to read 5, iclass 28, count 0 2006.229.23:34:54.49#ibcon#read 5, iclass 28, count 0 2006.229.23:34:54.49#ibcon#about to read 6, iclass 28, count 0 2006.229.23:34:54.49#ibcon#read 6, iclass 28, count 0 2006.229.23:34:54.49#ibcon#end of sib2, iclass 28, count 0 2006.229.23:34:54.49#ibcon#*after write, iclass 28, count 0 2006.229.23:34:54.49#ibcon#*before return 0, iclass 28, count 0 2006.229.23:34:54.49#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:54.49#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:54.49#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:34:54.49#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:34:54.49$vck44/valo=2,534.99 2006.229.23:34:54.49#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.23:34:54.49#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.23:34:54.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:54.49#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:54.49#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:54.49#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:54.49#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:34:54.49#ibcon#first serial, iclass 30, count 0 2006.229.23:34:54.49#ibcon#enter sib2, iclass 30, count 0 2006.229.23:34:54.49#ibcon#flushed, iclass 30, count 0 2006.229.23:34:54.49#ibcon#about to write, iclass 30, count 0 2006.229.23:34:54.49#ibcon#wrote, iclass 30, count 0 2006.229.23:34:54.49#ibcon#about to read 3, iclass 30, count 0 2006.229.23:34:54.51#ibcon#read 3, iclass 30, count 0 2006.229.23:34:54.51#ibcon#about to read 4, iclass 30, count 0 2006.229.23:34:54.51#ibcon#read 4, iclass 30, count 0 2006.229.23:34:54.51#ibcon#about to read 5, iclass 30, count 0 2006.229.23:34:54.51#ibcon#read 5, iclass 30, count 0 2006.229.23:34:54.51#ibcon#about to read 6, iclass 30, count 0 2006.229.23:34:54.51#ibcon#read 6, iclass 30, count 0 2006.229.23:34:54.51#ibcon#end of sib2, iclass 30, count 0 2006.229.23:34:54.51#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:34:54.51#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:34:54.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:34:54.51#ibcon#*before write, iclass 30, count 0 2006.229.23:34:54.51#ibcon#enter sib2, iclass 30, count 0 2006.229.23:34:54.51#ibcon#flushed, iclass 30, count 0 2006.229.23:34:54.51#ibcon#about to write, iclass 30, count 0 2006.229.23:34:54.51#ibcon#wrote, iclass 30, count 0 2006.229.23:34:54.51#ibcon#about to read 3, iclass 30, count 0 2006.229.23:34:54.55#ibcon#read 3, iclass 30, count 0 2006.229.23:34:54.55#ibcon#about to read 4, iclass 30, count 0 2006.229.23:34:54.55#ibcon#read 4, iclass 30, count 0 2006.229.23:34:54.55#ibcon#about to read 5, iclass 30, count 0 2006.229.23:34:54.55#ibcon#read 5, iclass 30, count 0 2006.229.23:34:54.55#ibcon#about to read 6, iclass 30, count 0 2006.229.23:34:54.55#ibcon#read 6, iclass 30, count 0 2006.229.23:34:54.55#ibcon#end of sib2, iclass 30, count 0 2006.229.23:34:54.55#ibcon#*after write, iclass 30, count 0 2006.229.23:34:54.55#ibcon#*before return 0, iclass 30, count 0 2006.229.23:34:54.55#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:54.55#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:54.55#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:34:54.55#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:34:54.55$vck44/va=2,7 2006.229.23:34:54.55#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.23:34:54.55#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.23:34:54.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:54.55#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:54.61#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:54.61#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:54.61#ibcon#enter wrdev, iclass 32, count 2 2006.229.23:34:54.61#ibcon#first serial, iclass 32, count 2 2006.229.23:34:54.61#ibcon#enter sib2, iclass 32, count 2 2006.229.23:34:54.61#ibcon#flushed, iclass 32, count 2 2006.229.23:34:54.61#ibcon#about to write, iclass 32, count 2 2006.229.23:34:54.61#ibcon#wrote, iclass 32, count 2 2006.229.23:34:54.61#ibcon#about to read 3, iclass 32, count 2 2006.229.23:34:54.63#ibcon#read 3, iclass 32, count 2 2006.229.23:34:54.63#ibcon#about to read 4, iclass 32, count 2 2006.229.23:34:54.63#ibcon#read 4, iclass 32, count 2 2006.229.23:34:54.63#ibcon#about to read 5, iclass 32, count 2 2006.229.23:34:54.63#ibcon#read 5, iclass 32, count 2 2006.229.23:34:54.63#ibcon#about to read 6, iclass 32, count 2 2006.229.23:34:54.63#ibcon#read 6, iclass 32, count 2 2006.229.23:34:54.63#ibcon#end of sib2, iclass 32, count 2 2006.229.23:34:54.63#ibcon#*mode == 0, iclass 32, count 2 2006.229.23:34:54.63#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.23:34:54.63#ibcon#[25=AT02-07\r\n] 2006.229.23:34:54.63#ibcon#*before write, iclass 32, count 2 2006.229.23:34:54.63#ibcon#enter sib2, iclass 32, count 2 2006.229.23:34:54.63#ibcon#flushed, iclass 32, count 2 2006.229.23:34:54.63#ibcon#about to write, iclass 32, count 2 2006.229.23:34:54.63#ibcon#wrote, iclass 32, count 2 2006.229.23:34:54.63#ibcon#about to read 3, iclass 32, count 2 2006.229.23:34:54.66#ibcon#read 3, iclass 32, count 2 2006.229.23:34:54.66#ibcon#about to read 4, iclass 32, count 2 2006.229.23:34:54.66#ibcon#read 4, iclass 32, count 2 2006.229.23:34:54.66#ibcon#about to read 5, iclass 32, count 2 2006.229.23:34:54.66#ibcon#read 5, iclass 32, count 2 2006.229.23:34:54.66#ibcon#about to read 6, iclass 32, count 2 2006.229.23:34:54.66#ibcon#read 6, iclass 32, count 2 2006.229.23:34:54.66#ibcon#end of sib2, iclass 32, count 2 2006.229.23:34:54.66#ibcon#*after write, iclass 32, count 2 2006.229.23:34:54.66#ibcon#*before return 0, iclass 32, count 2 2006.229.23:34:54.66#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:54.66#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:54.66#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.23:34:54.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:54.66#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:54.78#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:54.78#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:54.78#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:34:54.78#ibcon#first serial, iclass 32, count 0 2006.229.23:34:54.78#ibcon#enter sib2, iclass 32, count 0 2006.229.23:34:54.78#ibcon#flushed, iclass 32, count 0 2006.229.23:34:54.78#ibcon#about to write, iclass 32, count 0 2006.229.23:34:54.78#ibcon#wrote, iclass 32, count 0 2006.229.23:34:54.78#ibcon#about to read 3, iclass 32, count 0 2006.229.23:34:54.80#ibcon#read 3, iclass 32, count 0 2006.229.23:34:54.80#ibcon#about to read 4, iclass 32, count 0 2006.229.23:34:54.80#ibcon#read 4, iclass 32, count 0 2006.229.23:34:54.80#ibcon#about to read 5, iclass 32, count 0 2006.229.23:34:54.80#ibcon#read 5, iclass 32, count 0 2006.229.23:34:54.80#ibcon#about to read 6, iclass 32, count 0 2006.229.23:34:54.80#ibcon#read 6, iclass 32, count 0 2006.229.23:34:54.80#ibcon#end of sib2, iclass 32, count 0 2006.229.23:34:54.80#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:34:54.80#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:34:54.80#ibcon#[25=USB\r\n] 2006.229.23:34:54.80#ibcon#*before write, iclass 32, count 0 2006.229.23:34:54.80#ibcon#enter sib2, iclass 32, count 0 2006.229.23:34:54.80#ibcon#flushed, iclass 32, count 0 2006.229.23:34:54.80#ibcon#about to write, iclass 32, count 0 2006.229.23:34:54.80#ibcon#wrote, iclass 32, count 0 2006.229.23:34:54.80#ibcon#about to read 3, iclass 32, count 0 2006.229.23:34:54.83#ibcon#read 3, iclass 32, count 0 2006.229.23:34:54.83#ibcon#about to read 4, iclass 32, count 0 2006.229.23:34:54.83#ibcon#read 4, iclass 32, count 0 2006.229.23:34:54.83#ibcon#about to read 5, iclass 32, count 0 2006.229.23:34:54.83#ibcon#read 5, iclass 32, count 0 2006.229.23:34:54.83#ibcon#about to read 6, iclass 32, count 0 2006.229.23:34:54.83#ibcon#read 6, iclass 32, count 0 2006.229.23:34:54.83#ibcon#end of sib2, iclass 32, count 0 2006.229.23:34:54.83#ibcon#*after write, iclass 32, count 0 2006.229.23:34:54.83#ibcon#*before return 0, iclass 32, count 0 2006.229.23:34:54.83#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:54.83#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:54.83#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:34:54.83#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:34:54.83$vck44/valo=3,564.99 2006.229.23:34:54.83#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.23:34:54.83#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.23:34:54.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:54.83#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:54.83#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:54.83#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:54.83#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:34:54.83#ibcon#first serial, iclass 34, count 0 2006.229.23:34:54.83#ibcon#enter sib2, iclass 34, count 0 2006.229.23:34:54.83#ibcon#flushed, iclass 34, count 0 2006.229.23:34:54.83#ibcon#about to write, iclass 34, count 0 2006.229.23:34:54.83#ibcon#wrote, iclass 34, count 0 2006.229.23:34:54.83#ibcon#about to read 3, iclass 34, count 0 2006.229.23:34:54.85#ibcon#read 3, iclass 34, count 0 2006.229.23:34:54.85#ibcon#about to read 4, iclass 34, count 0 2006.229.23:34:54.85#ibcon#read 4, iclass 34, count 0 2006.229.23:34:54.85#ibcon#about to read 5, iclass 34, count 0 2006.229.23:34:54.85#ibcon#read 5, iclass 34, count 0 2006.229.23:34:54.85#ibcon#about to read 6, iclass 34, count 0 2006.229.23:34:54.85#ibcon#read 6, iclass 34, count 0 2006.229.23:34:54.85#ibcon#end of sib2, iclass 34, count 0 2006.229.23:34:54.85#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:34:54.85#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:34:54.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:34:54.85#ibcon#*before write, iclass 34, count 0 2006.229.23:34:54.85#ibcon#enter sib2, iclass 34, count 0 2006.229.23:34:54.85#ibcon#flushed, iclass 34, count 0 2006.229.23:34:54.85#ibcon#about to write, iclass 34, count 0 2006.229.23:34:54.85#ibcon#wrote, iclass 34, count 0 2006.229.23:34:54.85#ibcon#about to read 3, iclass 34, count 0 2006.229.23:34:54.89#ibcon#read 3, iclass 34, count 0 2006.229.23:34:54.89#ibcon#about to read 4, iclass 34, count 0 2006.229.23:34:54.89#ibcon#read 4, iclass 34, count 0 2006.229.23:34:54.89#ibcon#about to read 5, iclass 34, count 0 2006.229.23:34:54.89#ibcon#read 5, iclass 34, count 0 2006.229.23:34:54.89#ibcon#about to read 6, iclass 34, count 0 2006.229.23:34:54.89#ibcon#read 6, iclass 34, count 0 2006.229.23:34:54.89#ibcon#end of sib2, iclass 34, count 0 2006.229.23:34:54.89#ibcon#*after write, iclass 34, count 0 2006.229.23:34:54.89#ibcon#*before return 0, iclass 34, count 0 2006.229.23:34:54.89#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:54.89#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:54.89#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:34:54.89#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:34:54.89$vck44/va=3,6 2006.229.23:34:54.89#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.23:34:54.89#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.23:34:54.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:54.89#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:54.95#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:54.95#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:54.95#ibcon#enter wrdev, iclass 36, count 2 2006.229.23:34:54.95#ibcon#first serial, iclass 36, count 2 2006.229.23:34:54.95#ibcon#enter sib2, iclass 36, count 2 2006.229.23:34:54.95#ibcon#flushed, iclass 36, count 2 2006.229.23:34:54.95#ibcon#about to write, iclass 36, count 2 2006.229.23:34:54.95#ibcon#wrote, iclass 36, count 2 2006.229.23:34:54.95#ibcon#about to read 3, iclass 36, count 2 2006.229.23:34:54.97#ibcon#read 3, iclass 36, count 2 2006.229.23:34:54.97#ibcon#about to read 4, iclass 36, count 2 2006.229.23:34:54.97#ibcon#read 4, iclass 36, count 2 2006.229.23:34:54.97#ibcon#about to read 5, iclass 36, count 2 2006.229.23:34:54.97#ibcon#read 5, iclass 36, count 2 2006.229.23:34:54.97#ibcon#about to read 6, iclass 36, count 2 2006.229.23:34:54.97#ibcon#read 6, iclass 36, count 2 2006.229.23:34:54.97#ibcon#end of sib2, iclass 36, count 2 2006.229.23:34:54.97#ibcon#*mode == 0, iclass 36, count 2 2006.229.23:34:54.97#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.23:34:54.97#ibcon#[25=AT03-06\r\n] 2006.229.23:34:54.97#ibcon#*before write, iclass 36, count 2 2006.229.23:34:54.97#ibcon#enter sib2, iclass 36, count 2 2006.229.23:34:54.97#ibcon#flushed, iclass 36, count 2 2006.229.23:34:54.97#ibcon#about to write, iclass 36, count 2 2006.229.23:34:54.97#ibcon#wrote, iclass 36, count 2 2006.229.23:34:54.97#ibcon#about to read 3, iclass 36, count 2 2006.229.23:34:55.00#ibcon#read 3, iclass 36, count 2 2006.229.23:34:55.00#ibcon#about to read 4, iclass 36, count 2 2006.229.23:34:55.00#ibcon#read 4, iclass 36, count 2 2006.229.23:34:55.00#ibcon#about to read 5, iclass 36, count 2 2006.229.23:34:55.00#ibcon#read 5, iclass 36, count 2 2006.229.23:34:55.00#ibcon#about to read 6, iclass 36, count 2 2006.229.23:34:55.00#ibcon#read 6, iclass 36, count 2 2006.229.23:34:55.00#ibcon#end of sib2, iclass 36, count 2 2006.229.23:34:55.00#ibcon#*after write, iclass 36, count 2 2006.229.23:34:55.00#ibcon#*before return 0, iclass 36, count 2 2006.229.23:34:55.00#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:55.00#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:55.00#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.23:34:55.00#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:55.00#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:55.12#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:55.12#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:55.12#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:34:55.12#ibcon#first serial, iclass 36, count 0 2006.229.23:34:55.12#ibcon#enter sib2, iclass 36, count 0 2006.229.23:34:55.12#ibcon#flushed, iclass 36, count 0 2006.229.23:34:55.12#ibcon#about to write, iclass 36, count 0 2006.229.23:34:55.12#ibcon#wrote, iclass 36, count 0 2006.229.23:34:55.12#ibcon#about to read 3, iclass 36, count 0 2006.229.23:34:55.14#ibcon#read 3, iclass 36, count 0 2006.229.23:34:55.14#ibcon#about to read 4, iclass 36, count 0 2006.229.23:34:55.14#ibcon#read 4, iclass 36, count 0 2006.229.23:34:55.14#ibcon#about to read 5, iclass 36, count 0 2006.229.23:34:55.14#ibcon#read 5, iclass 36, count 0 2006.229.23:34:55.14#ibcon#about to read 6, iclass 36, count 0 2006.229.23:34:55.14#ibcon#read 6, iclass 36, count 0 2006.229.23:34:55.14#ibcon#end of sib2, iclass 36, count 0 2006.229.23:34:55.14#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:34:55.14#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:34:55.14#ibcon#[25=USB\r\n] 2006.229.23:34:55.14#ibcon#*before write, iclass 36, count 0 2006.229.23:34:55.14#ibcon#enter sib2, iclass 36, count 0 2006.229.23:34:55.14#ibcon#flushed, iclass 36, count 0 2006.229.23:34:55.14#ibcon#about to write, iclass 36, count 0 2006.229.23:34:55.14#ibcon#wrote, iclass 36, count 0 2006.229.23:34:55.14#ibcon#about to read 3, iclass 36, count 0 2006.229.23:34:55.17#ibcon#read 3, iclass 36, count 0 2006.229.23:34:55.17#ibcon#about to read 4, iclass 36, count 0 2006.229.23:34:55.17#ibcon#read 4, iclass 36, count 0 2006.229.23:34:55.17#ibcon#about to read 5, iclass 36, count 0 2006.229.23:34:55.17#ibcon#read 5, iclass 36, count 0 2006.229.23:34:55.17#ibcon#about to read 6, iclass 36, count 0 2006.229.23:34:55.17#ibcon#read 6, iclass 36, count 0 2006.229.23:34:55.17#ibcon#end of sib2, iclass 36, count 0 2006.229.23:34:55.17#ibcon#*after write, iclass 36, count 0 2006.229.23:34:55.17#ibcon#*before return 0, iclass 36, count 0 2006.229.23:34:55.17#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:55.17#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:55.17#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:34:55.17#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:34:55.17$vck44/valo=4,624.99 2006.229.23:34:55.17#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.23:34:55.17#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.23:34:55.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:55.17#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:55.17#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:55.17#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:55.17#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:34:55.17#ibcon#first serial, iclass 38, count 0 2006.229.23:34:55.17#ibcon#enter sib2, iclass 38, count 0 2006.229.23:34:55.17#ibcon#flushed, iclass 38, count 0 2006.229.23:34:55.17#ibcon#about to write, iclass 38, count 0 2006.229.23:34:55.17#ibcon#wrote, iclass 38, count 0 2006.229.23:34:55.17#ibcon#about to read 3, iclass 38, count 0 2006.229.23:34:55.19#ibcon#read 3, iclass 38, count 0 2006.229.23:34:55.19#ibcon#about to read 4, iclass 38, count 0 2006.229.23:34:55.19#ibcon#read 4, iclass 38, count 0 2006.229.23:34:55.19#ibcon#about to read 5, iclass 38, count 0 2006.229.23:34:55.19#ibcon#read 5, iclass 38, count 0 2006.229.23:34:55.19#ibcon#about to read 6, iclass 38, count 0 2006.229.23:34:55.19#ibcon#read 6, iclass 38, count 0 2006.229.23:34:55.19#ibcon#end of sib2, iclass 38, count 0 2006.229.23:34:55.19#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:34:55.19#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:34:55.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:34:55.19#ibcon#*before write, iclass 38, count 0 2006.229.23:34:55.19#ibcon#enter sib2, iclass 38, count 0 2006.229.23:34:55.19#ibcon#flushed, iclass 38, count 0 2006.229.23:34:55.19#ibcon#about to write, iclass 38, count 0 2006.229.23:34:55.19#ibcon#wrote, iclass 38, count 0 2006.229.23:34:55.19#ibcon#about to read 3, iclass 38, count 0 2006.229.23:34:55.23#ibcon#read 3, iclass 38, count 0 2006.229.23:34:55.23#ibcon#about to read 4, iclass 38, count 0 2006.229.23:34:55.23#ibcon#read 4, iclass 38, count 0 2006.229.23:34:55.23#ibcon#about to read 5, iclass 38, count 0 2006.229.23:34:55.23#ibcon#read 5, iclass 38, count 0 2006.229.23:34:55.23#ibcon#about to read 6, iclass 38, count 0 2006.229.23:34:55.23#ibcon#read 6, iclass 38, count 0 2006.229.23:34:55.23#ibcon#end of sib2, iclass 38, count 0 2006.229.23:34:55.23#ibcon#*after write, iclass 38, count 0 2006.229.23:34:55.23#ibcon#*before return 0, iclass 38, count 0 2006.229.23:34:55.23#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:55.23#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:55.23#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:34:55.23#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:34:55.23$vck44/va=4,7 2006.229.23:34:55.23#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.23:34:55.23#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.23:34:55.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:55.23#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:55.29#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:55.29#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:55.29#ibcon#enter wrdev, iclass 40, count 2 2006.229.23:34:55.29#ibcon#first serial, iclass 40, count 2 2006.229.23:34:55.29#ibcon#enter sib2, iclass 40, count 2 2006.229.23:34:55.29#ibcon#flushed, iclass 40, count 2 2006.229.23:34:55.29#ibcon#about to write, iclass 40, count 2 2006.229.23:34:55.29#ibcon#wrote, iclass 40, count 2 2006.229.23:34:55.29#ibcon#about to read 3, iclass 40, count 2 2006.229.23:34:55.31#ibcon#read 3, iclass 40, count 2 2006.229.23:34:55.31#ibcon#about to read 4, iclass 40, count 2 2006.229.23:34:55.31#ibcon#read 4, iclass 40, count 2 2006.229.23:34:55.31#ibcon#about to read 5, iclass 40, count 2 2006.229.23:34:55.31#ibcon#read 5, iclass 40, count 2 2006.229.23:34:55.31#ibcon#about to read 6, iclass 40, count 2 2006.229.23:34:55.31#ibcon#read 6, iclass 40, count 2 2006.229.23:34:55.31#ibcon#end of sib2, iclass 40, count 2 2006.229.23:34:55.31#ibcon#*mode == 0, iclass 40, count 2 2006.229.23:34:55.31#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.23:34:55.31#ibcon#[25=AT04-07\r\n] 2006.229.23:34:55.31#ibcon#*before write, iclass 40, count 2 2006.229.23:34:55.31#ibcon#enter sib2, iclass 40, count 2 2006.229.23:34:55.31#ibcon#flushed, iclass 40, count 2 2006.229.23:34:55.31#ibcon#about to write, iclass 40, count 2 2006.229.23:34:55.31#ibcon#wrote, iclass 40, count 2 2006.229.23:34:55.31#ibcon#about to read 3, iclass 40, count 2 2006.229.23:34:55.34#ibcon#read 3, iclass 40, count 2 2006.229.23:34:55.34#ibcon#about to read 4, iclass 40, count 2 2006.229.23:34:55.34#ibcon#read 4, iclass 40, count 2 2006.229.23:34:55.34#ibcon#about to read 5, iclass 40, count 2 2006.229.23:34:55.34#ibcon#read 5, iclass 40, count 2 2006.229.23:34:55.34#ibcon#about to read 6, iclass 40, count 2 2006.229.23:34:55.34#ibcon#read 6, iclass 40, count 2 2006.229.23:34:55.34#ibcon#end of sib2, iclass 40, count 2 2006.229.23:34:55.34#ibcon#*after write, iclass 40, count 2 2006.229.23:34:55.34#ibcon#*before return 0, iclass 40, count 2 2006.229.23:34:55.34#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:55.34#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:55.34#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.23:34:55.34#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:55.34#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:55.46#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:55.46#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:55.46#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:34:55.46#ibcon#first serial, iclass 40, count 0 2006.229.23:34:55.46#ibcon#enter sib2, iclass 40, count 0 2006.229.23:34:55.46#ibcon#flushed, iclass 40, count 0 2006.229.23:34:55.46#ibcon#about to write, iclass 40, count 0 2006.229.23:34:55.46#ibcon#wrote, iclass 40, count 0 2006.229.23:34:55.46#ibcon#about to read 3, iclass 40, count 0 2006.229.23:34:55.48#ibcon#read 3, iclass 40, count 0 2006.229.23:34:55.48#ibcon#about to read 4, iclass 40, count 0 2006.229.23:34:55.48#ibcon#read 4, iclass 40, count 0 2006.229.23:34:55.48#ibcon#about to read 5, iclass 40, count 0 2006.229.23:34:55.48#ibcon#read 5, iclass 40, count 0 2006.229.23:34:55.48#ibcon#about to read 6, iclass 40, count 0 2006.229.23:34:55.48#ibcon#read 6, iclass 40, count 0 2006.229.23:34:55.48#ibcon#end of sib2, iclass 40, count 0 2006.229.23:34:55.48#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:34:55.48#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:34:55.48#ibcon#[25=USB\r\n] 2006.229.23:34:55.48#ibcon#*before write, iclass 40, count 0 2006.229.23:34:55.48#ibcon#enter sib2, iclass 40, count 0 2006.229.23:34:55.48#ibcon#flushed, iclass 40, count 0 2006.229.23:34:55.48#ibcon#about to write, iclass 40, count 0 2006.229.23:34:55.48#ibcon#wrote, iclass 40, count 0 2006.229.23:34:55.48#ibcon#about to read 3, iclass 40, count 0 2006.229.23:34:55.51#ibcon#read 3, iclass 40, count 0 2006.229.23:34:55.51#ibcon#about to read 4, iclass 40, count 0 2006.229.23:34:55.51#ibcon#read 4, iclass 40, count 0 2006.229.23:34:55.51#ibcon#about to read 5, iclass 40, count 0 2006.229.23:34:55.51#ibcon#read 5, iclass 40, count 0 2006.229.23:34:55.51#ibcon#about to read 6, iclass 40, count 0 2006.229.23:34:55.51#ibcon#read 6, iclass 40, count 0 2006.229.23:34:55.51#ibcon#end of sib2, iclass 40, count 0 2006.229.23:34:55.51#ibcon#*after write, iclass 40, count 0 2006.229.23:34:55.51#ibcon#*before return 0, iclass 40, count 0 2006.229.23:34:55.51#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:55.51#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:55.51#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:34:55.51#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:34:55.51$vck44/valo=5,734.99 2006.229.23:34:55.51#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.23:34:55.51#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.23:34:55.51#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:55.51#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:55.51#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:55.51#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:55.51#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:34:55.51#ibcon#first serial, iclass 4, count 0 2006.229.23:34:55.51#ibcon#enter sib2, iclass 4, count 0 2006.229.23:34:55.51#ibcon#flushed, iclass 4, count 0 2006.229.23:34:55.51#ibcon#about to write, iclass 4, count 0 2006.229.23:34:55.51#ibcon#wrote, iclass 4, count 0 2006.229.23:34:55.51#ibcon#about to read 3, iclass 4, count 0 2006.229.23:34:55.53#ibcon#read 3, iclass 4, count 0 2006.229.23:34:55.53#ibcon#about to read 4, iclass 4, count 0 2006.229.23:34:55.53#ibcon#read 4, iclass 4, count 0 2006.229.23:34:55.53#ibcon#about to read 5, iclass 4, count 0 2006.229.23:34:55.53#ibcon#read 5, iclass 4, count 0 2006.229.23:34:55.53#ibcon#about to read 6, iclass 4, count 0 2006.229.23:34:55.53#ibcon#read 6, iclass 4, count 0 2006.229.23:34:55.53#ibcon#end of sib2, iclass 4, count 0 2006.229.23:34:55.53#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:34:55.53#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:34:55.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:34:55.53#ibcon#*before write, iclass 4, count 0 2006.229.23:34:55.53#ibcon#enter sib2, iclass 4, count 0 2006.229.23:34:55.53#ibcon#flushed, iclass 4, count 0 2006.229.23:34:55.53#ibcon#about to write, iclass 4, count 0 2006.229.23:34:55.53#ibcon#wrote, iclass 4, count 0 2006.229.23:34:55.53#ibcon#about to read 3, iclass 4, count 0 2006.229.23:34:55.57#ibcon#read 3, iclass 4, count 0 2006.229.23:34:55.57#ibcon#about to read 4, iclass 4, count 0 2006.229.23:34:55.57#ibcon#read 4, iclass 4, count 0 2006.229.23:34:55.57#ibcon#about to read 5, iclass 4, count 0 2006.229.23:34:55.57#ibcon#read 5, iclass 4, count 0 2006.229.23:34:55.57#ibcon#about to read 6, iclass 4, count 0 2006.229.23:34:55.57#ibcon#read 6, iclass 4, count 0 2006.229.23:34:55.57#ibcon#end of sib2, iclass 4, count 0 2006.229.23:34:55.57#ibcon#*after write, iclass 4, count 0 2006.229.23:34:55.57#ibcon#*before return 0, iclass 4, count 0 2006.229.23:34:55.57#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:55.57#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:55.57#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:34:55.57#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:34:55.57$vck44/va=5,4 2006.229.23:34:55.57#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.23:34:55.57#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.23:34:55.57#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:55.57#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:55.63#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:55.63#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:55.63#ibcon#enter wrdev, iclass 6, count 2 2006.229.23:34:55.63#ibcon#first serial, iclass 6, count 2 2006.229.23:34:55.63#ibcon#enter sib2, iclass 6, count 2 2006.229.23:34:55.63#ibcon#flushed, iclass 6, count 2 2006.229.23:34:55.63#ibcon#about to write, iclass 6, count 2 2006.229.23:34:55.63#ibcon#wrote, iclass 6, count 2 2006.229.23:34:55.63#ibcon#about to read 3, iclass 6, count 2 2006.229.23:34:55.65#ibcon#read 3, iclass 6, count 2 2006.229.23:34:55.65#ibcon#about to read 4, iclass 6, count 2 2006.229.23:34:55.65#ibcon#read 4, iclass 6, count 2 2006.229.23:34:55.65#ibcon#about to read 5, iclass 6, count 2 2006.229.23:34:55.65#ibcon#read 5, iclass 6, count 2 2006.229.23:34:55.65#ibcon#about to read 6, iclass 6, count 2 2006.229.23:34:55.65#ibcon#read 6, iclass 6, count 2 2006.229.23:34:55.65#ibcon#end of sib2, iclass 6, count 2 2006.229.23:34:55.65#ibcon#*mode == 0, iclass 6, count 2 2006.229.23:34:55.65#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.23:34:55.65#ibcon#[25=AT05-04\r\n] 2006.229.23:34:55.65#ibcon#*before write, iclass 6, count 2 2006.229.23:34:55.65#ibcon#enter sib2, iclass 6, count 2 2006.229.23:34:55.65#ibcon#flushed, iclass 6, count 2 2006.229.23:34:55.65#ibcon#about to write, iclass 6, count 2 2006.229.23:34:55.65#ibcon#wrote, iclass 6, count 2 2006.229.23:34:55.65#ibcon#about to read 3, iclass 6, count 2 2006.229.23:34:55.68#ibcon#read 3, iclass 6, count 2 2006.229.23:34:55.68#ibcon#about to read 4, iclass 6, count 2 2006.229.23:34:55.68#ibcon#read 4, iclass 6, count 2 2006.229.23:34:55.68#ibcon#about to read 5, iclass 6, count 2 2006.229.23:34:55.68#ibcon#read 5, iclass 6, count 2 2006.229.23:34:55.68#ibcon#about to read 6, iclass 6, count 2 2006.229.23:34:55.68#ibcon#read 6, iclass 6, count 2 2006.229.23:34:55.68#ibcon#end of sib2, iclass 6, count 2 2006.229.23:34:55.68#ibcon#*after write, iclass 6, count 2 2006.229.23:34:55.68#ibcon#*before return 0, iclass 6, count 2 2006.229.23:34:55.68#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:55.68#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:55.68#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.23:34:55.68#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:55.68#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:55.80#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:55.80#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:55.80#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:34:55.80#ibcon#first serial, iclass 6, count 0 2006.229.23:34:55.80#ibcon#enter sib2, iclass 6, count 0 2006.229.23:34:55.80#ibcon#flushed, iclass 6, count 0 2006.229.23:34:55.80#ibcon#about to write, iclass 6, count 0 2006.229.23:34:55.80#ibcon#wrote, iclass 6, count 0 2006.229.23:34:55.80#ibcon#about to read 3, iclass 6, count 0 2006.229.23:34:55.82#ibcon#read 3, iclass 6, count 0 2006.229.23:34:55.82#ibcon#about to read 4, iclass 6, count 0 2006.229.23:34:55.82#ibcon#read 4, iclass 6, count 0 2006.229.23:34:55.82#ibcon#about to read 5, iclass 6, count 0 2006.229.23:34:55.82#ibcon#read 5, iclass 6, count 0 2006.229.23:34:55.82#ibcon#about to read 6, iclass 6, count 0 2006.229.23:34:55.82#ibcon#read 6, iclass 6, count 0 2006.229.23:34:55.82#ibcon#end of sib2, iclass 6, count 0 2006.229.23:34:55.82#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:34:55.82#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:34:55.82#ibcon#[25=USB\r\n] 2006.229.23:34:55.82#ibcon#*before write, iclass 6, count 0 2006.229.23:34:55.82#ibcon#enter sib2, iclass 6, count 0 2006.229.23:34:55.82#ibcon#flushed, iclass 6, count 0 2006.229.23:34:55.82#ibcon#about to write, iclass 6, count 0 2006.229.23:34:55.82#ibcon#wrote, iclass 6, count 0 2006.229.23:34:55.82#ibcon#about to read 3, iclass 6, count 0 2006.229.23:34:55.85#ibcon#read 3, iclass 6, count 0 2006.229.23:34:55.85#ibcon#about to read 4, iclass 6, count 0 2006.229.23:34:55.85#ibcon#read 4, iclass 6, count 0 2006.229.23:34:55.85#ibcon#about to read 5, iclass 6, count 0 2006.229.23:34:55.85#ibcon#read 5, iclass 6, count 0 2006.229.23:34:55.85#ibcon#about to read 6, iclass 6, count 0 2006.229.23:34:55.85#ibcon#read 6, iclass 6, count 0 2006.229.23:34:55.85#ibcon#end of sib2, iclass 6, count 0 2006.229.23:34:55.85#ibcon#*after write, iclass 6, count 0 2006.229.23:34:55.85#ibcon#*before return 0, iclass 6, count 0 2006.229.23:34:55.85#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:55.85#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:55.85#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:34:55.85#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:34:55.85$vck44/valo=6,814.99 2006.229.23:34:55.85#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.23:34:55.85#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.23:34:55.85#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:55.85#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:55.85#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:55.85#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:55.85#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:34:55.85#ibcon#first serial, iclass 10, count 0 2006.229.23:34:55.85#ibcon#enter sib2, iclass 10, count 0 2006.229.23:34:55.85#ibcon#flushed, iclass 10, count 0 2006.229.23:34:55.85#ibcon#about to write, iclass 10, count 0 2006.229.23:34:55.85#ibcon#wrote, iclass 10, count 0 2006.229.23:34:55.85#ibcon#about to read 3, iclass 10, count 0 2006.229.23:34:55.87#ibcon#read 3, iclass 10, count 0 2006.229.23:34:55.87#ibcon#about to read 4, iclass 10, count 0 2006.229.23:34:55.87#ibcon#read 4, iclass 10, count 0 2006.229.23:34:55.87#ibcon#about to read 5, iclass 10, count 0 2006.229.23:34:55.87#ibcon#read 5, iclass 10, count 0 2006.229.23:34:55.87#ibcon#about to read 6, iclass 10, count 0 2006.229.23:34:55.87#ibcon#read 6, iclass 10, count 0 2006.229.23:34:55.87#ibcon#end of sib2, iclass 10, count 0 2006.229.23:34:55.87#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:34:55.87#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:34:55.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:34:55.87#ibcon#*before write, iclass 10, count 0 2006.229.23:34:55.87#ibcon#enter sib2, iclass 10, count 0 2006.229.23:34:55.87#ibcon#flushed, iclass 10, count 0 2006.229.23:34:55.87#ibcon#about to write, iclass 10, count 0 2006.229.23:34:55.87#ibcon#wrote, iclass 10, count 0 2006.229.23:34:55.87#ibcon#about to read 3, iclass 10, count 0 2006.229.23:34:55.91#ibcon#read 3, iclass 10, count 0 2006.229.23:34:55.91#ibcon#about to read 4, iclass 10, count 0 2006.229.23:34:55.91#ibcon#read 4, iclass 10, count 0 2006.229.23:34:55.91#ibcon#about to read 5, iclass 10, count 0 2006.229.23:34:55.91#ibcon#read 5, iclass 10, count 0 2006.229.23:34:55.91#ibcon#about to read 6, iclass 10, count 0 2006.229.23:34:55.91#ibcon#read 6, iclass 10, count 0 2006.229.23:34:55.91#ibcon#end of sib2, iclass 10, count 0 2006.229.23:34:55.91#ibcon#*after write, iclass 10, count 0 2006.229.23:34:55.91#ibcon#*before return 0, iclass 10, count 0 2006.229.23:34:55.91#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:55.91#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:55.91#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:34:55.91#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:34:55.91$vck44/va=6,4 2006.229.23:34:55.91#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.23:34:55.91#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.23:34:55.91#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:55.91#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:55.97#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:55.97#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:55.97#ibcon#enter wrdev, iclass 12, count 2 2006.229.23:34:55.97#ibcon#first serial, iclass 12, count 2 2006.229.23:34:55.97#ibcon#enter sib2, iclass 12, count 2 2006.229.23:34:55.97#ibcon#flushed, iclass 12, count 2 2006.229.23:34:55.97#ibcon#about to write, iclass 12, count 2 2006.229.23:34:55.97#ibcon#wrote, iclass 12, count 2 2006.229.23:34:55.97#ibcon#about to read 3, iclass 12, count 2 2006.229.23:34:55.99#ibcon#read 3, iclass 12, count 2 2006.229.23:34:55.99#ibcon#about to read 4, iclass 12, count 2 2006.229.23:34:55.99#ibcon#read 4, iclass 12, count 2 2006.229.23:34:55.99#ibcon#about to read 5, iclass 12, count 2 2006.229.23:34:55.99#ibcon#read 5, iclass 12, count 2 2006.229.23:34:55.99#ibcon#about to read 6, iclass 12, count 2 2006.229.23:34:55.99#ibcon#read 6, iclass 12, count 2 2006.229.23:34:55.99#ibcon#end of sib2, iclass 12, count 2 2006.229.23:34:55.99#ibcon#*mode == 0, iclass 12, count 2 2006.229.23:34:55.99#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.23:34:55.99#ibcon#[25=AT06-04\r\n] 2006.229.23:34:55.99#ibcon#*before write, iclass 12, count 2 2006.229.23:34:55.99#ibcon#enter sib2, iclass 12, count 2 2006.229.23:34:55.99#ibcon#flushed, iclass 12, count 2 2006.229.23:34:55.99#ibcon#about to write, iclass 12, count 2 2006.229.23:34:55.99#ibcon#wrote, iclass 12, count 2 2006.229.23:34:55.99#ibcon#about to read 3, iclass 12, count 2 2006.229.23:34:56.02#ibcon#read 3, iclass 12, count 2 2006.229.23:34:56.02#ibcon#about to read 4, iclass 12, count 2 2006.229.23:34:56.02#ibcon#read 4, iclass 12, count 2 2006.229.23:34:56.02#ibcon#about to read 5, iclass 12, count 2 2006.229.23:34:56.02#ibcon#read 5, iclass 12, count 2 2006.229.23:34:56.02#ibcon#about to read 6, iclass 12, count 2 2006.229.23:34:56.02#ibcon#read 6, iclass 12, count 2 2006.229.23:34:56.02#ibcon#end of sib2, iclass 12, count 2 2006.229.23:34:56.02#ibcon#*after write, iclass 12, count 2 2006.229.23:34:56.02#ibcon#*before return 0, iclass 12, count 2 2006.229.23:34:56.02#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:56.02#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:56.02#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.23:34:56.02#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:56.02#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:56.14#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:56.14#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:56.14#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:34:56.14#ibcon#first serial, iclass 12, count 0 2006.229.23:34:56.14#ibcon#enter sib2, iclass 12, count 0 2006.229.23:34:56.14#ibcon#flushed, iclass 12, count 0 2006.229.23:34:56.14#ibcon#about to write, iclass 12, count 0 2006.229.23:34:56.14#ibcon#wrote, iclass 12, count 0 2006.229.23:34:56.14#ibcon#about to read 3, iclass 12, count 0 2006.229.23:34:56.16#ibcon#read 3, iclass 12, count 0 2006.229.23:34:56.16#ibcon#about to read 4, iclass 12, count 0 2006.229.23:34:56.16#ibcon#read 4, iclass 12, count 0 2006.229.23:34:56.16#ibcon#about to read 5, iclass 12, count 0 2006.229.23:34:56.16#ibcon#read 5, iclass 12, count 0 2006.229.23:34:56.16#ibcon#about to read 6, iclass 12, count 0 2006.229.23:34:56.16#ibcon#read 6, iclass 12, count 0 2006.229.23:34:56.16#ibcon#end of sib2, iclass 12, count 0 2006.229.23:34:56.16#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:34:56.16#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:34:56.16#ibcon#[25=USB\r\n] 2006.229.23:34:56.16#ibcon#*before write, iclass 12, count 0 2006.229.23:34:56.16#ibcon#enter sib2, iclass 12, count 0 2006.229.23:34:56.16#ibcon#flushed, iclass 12, count 0 2006.229.23:34:56.16#ibcon#about to write, iclass 12, count 0 2006.229.23:34:56.16#ibcon#wrote, iclass 12, count 0 2006.229.23:34:56.16#ibcon#about to read 3, iclass 12, count 0 2006.229.23:34:56.19#ibcon#read 3, iclass 12, count 0 2006.229.23:34:56.19#ibcon#about to read 4, iclass 12, count 0 2006.229.23:34:56.19#ibcon#read 4, iclass 12, count 0 2006.229.23:34:56.19#ibcon#about to read 5, iclass 12, count 0 2006.229.23:34:56.19#ibcon#read 5, iclass 12, count 0 2006.229.23:34:56.19#ibcon#about to read 6, iclass 12, count 0 2006.229.23:34:56.19#ibcon#read 6, iclass 12, count 0 2006.229.23:34:56.19#ibcon#end of sib2, iclass 12, count 0 2006.229.23:34:56.19#ibcon#*after write, iclass 12, count 0 2006.229.23:34:56.19#ibcon#*before return 0, iclass 12, count 0 2006.229.23:34:56.19#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:56.19#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:56.19#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:34:56.19#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:34:56.19$vck44/valo=7,864.99 2006.229.23:34:56.19#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.23:34:56.19#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.23:34:56.19#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:56.19#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:56.19#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:56.19#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:56.19#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:34:56.19#ibcon#first serial, iclass 14, count 0 2006.229.23:34:56.19#ibcon#enter sib2, iclass 14, count 0 2006.229.23:34:56.19#ibcon#flushed, iclass 14, count 0 2006.229.23:34:56.19#ibcon#about to write, iclass 14, count 0 2006.229.23:34:56.19#ibcon#wrote, iclass 14, count 0 2006.229.23:34:56.19#ibcon#about to read 3, iclass 14, count 0 2006.229.23:34:56.21#ibcon#read 3, iclass 14, count 0 2006.229.23:34:56.21#ibcon#about to read 4, iclass 14, count 0 2006.229.23:34:56.21#ibcon#read 4, iclass 14, count 0 2006.229.23:34:56.21#ibcon#about to read 5, iclass 14, count 0 2006.229.23:34:56.21#ibcon#read 5, iclass 14, count 0 2006.229.23:34:56.21#ibcon#about to read 6, iclass 14, count 0 2006.229.23:34:56.21#ibcon#read 6, iclass 14, count 0 2006.229.23:34:56.21#ibcon#end of sib2, iclass 14, count 0 2006.229.23:34:56.21#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:34:56.21#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:34:56.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:34:56.21#ibcon#*before write, iclass 14, count 0 2006.229.23:34:56.21#ibcon#enter sib2, iclass 14, count 0 2006.229.23:34:56.21#ibcon#flushed, iclass 14, count 0 2006.229.23:34:56.21#ibcon#about to write, iclass 14, count 0 2006.229.23:34:56.21#ibcon#wrote, iclass 14, count 0 2006.229.23:34:56.21#ibcon#about to read 3, iclass 14, count 0 2006.229.23:34:56.25#ibcon#read 3, iclass 14, count 0 2006.229.23:34:56.25#ibcon#about to read 4, iclass 14, count 0 2006.229.23:34:56.25#ibcon#read 4, iclass 14, count 0 2006.229.23:34:56.25#ibcon#about to read 5, iclass 14, count 0 2006.229.23:34:56.25#ibcon#read 5, iclass 14, count 0 2006.229.23:34:56.25#ibcon#about to read 6, iclass 14, count 0 2006.229.23:34:56.25#ibcon#read 6, iclass 14, count 0 2006.229.23:34:56.25#ibcon#end of sib2, iclass 14, count 0 2006.229.23:34:56.25#ibcon#*after write, iclass 14, count 0 2006.229.23:34:56.25#ibcon#*before return 0, iclass 14, count 0 2006.229.23:34:56.25#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:56.25#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:56.25#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:34:56.25#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:34:56.25$vck44/va=7,5 2006.229.23:34:56.25#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.23:34:56.25#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.23:34:56.25#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:56.25#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:56.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:56.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:56.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.23:34:56.31#ibcon#first serial, iclass 16, count 2 2006.229.23:34:56.31#ibcon#enter sib2, iclass 16, count 2 2006.229.23:34:56.31#ibcon#flushed, iclass 16, count 2 2006.229.23:34:56.31#ibcon#about to write, iclass 16, count 2 2006.229.23:34:56.31#ibcon#wrote, iclass 16, count 2 2006.229.23:34:56.31#ibcon#about to read 3, iclass 16, count 2 2006.229.23:34:56.33#ibcon#read 3, iclass 16, count 2 2006.229.23:34:56.33#ibcon#about to read 4, iclass 16, count 2 2006.229.23:34:56.33#ibcon#read 4, iclass 16, count 2 2006.229.23:34:56.33#ibcon#about to read 5, iclass 16, count 2 2006.229.23:34:56.33#ibcon#read 5, iclass 16, count 2 2006.229.23:34:56.33#ibcon#about to read 6, iclass 16, count 2 2006.229.23:34:56.33#ibcon#read 6, iclass 16, count 2 2006.229.23:34:56.33#ibcon#end of sib2, iclass 16, count 2 2006.229.23:34:56.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.23:34:56.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.23:34:56.33#ibcon#[25=AT07-05\r\n] 2006.229.23:34:56.33#ibcon#*before write, iclass 16, count 2 2006.229.23:34:56.33#ibcon#enter sib2, iclass 16, count 2 2006.229.23:34:56.33#ibcon#flushed, iclass 16, count 2 2006.229.23:34:56.33#ibcon#about to write, iclass 16, count 2 2006.229.23:34:56.33#ibcon#wrote, iclass 16, count 2 2006.229.23:34:56.33#ibcon#about to read 3, iclass 16, count 2 2006.229.23:34:56.36#ibcon#read 3, iclass 16, count 2 2006.229.23:34:56.36#ibcon#about to read 4, iclass 16, count 2 2006.229.23:34:56.36#ibcon#read 4, iclass 16, count 2 2006.229.23:34:56.36#ibcon#about to read 5, iclass 16, count 2 2006.229.23:34:56.36#ibcon#read 5, iclass 16, count 2 2006.229.23:34:56.36#ibcon#about to read 6, iclass 16, count 2 2006.229.23:34:56.36#ibcon#read 6, iclass 16, count 2 2006.229.23:34:56.36#ibcon#end of sib2, iclass 16, count 2 2006.229.23:34:56.36#ibcon#*after write, iclass 16, count 2 2006.229.23:34:56.36#ibcon#*before return 0, iclass 16, count 2 2006.229.23:34:56.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:56.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:56.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.23:34:56.36#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:56.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:56.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:56.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:56.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:34:56.48#ibcon#first serial, iclass 16, count 0 2006.229.23:34:56.48#ibcon#enter sib2, iclass 16, count 0 2006.229.23:34:56.48#ibcon#flushed, iclass 16, count 0 2006.229.23:34:56.48#ibcon#about to write, iclass 16, count 0 2006.229.23:34:56.48#ibcon#wrote, iclass 16, count 0 2006.229.23:34:56.48#ibcon#about to read 3, iclass 16, count 0 2006.229.23:34:56.50#ibcon#read 3, iclass 16, count 0 2006.229.23:34:56.50#ibcon#about to read 4, iclass 16, count 0 2006.229.23:34:56.50#ibcon#read 4, iclass 16, count 0 2006.229.23:34:56.50#ibcon#about to read 5, iclass 16, count 0 2006.229.23:34:56.50#ibcon#read 5, iclass 16, count 0 2006.229.23:34:56.50#ibcon#about to read 6, iclass 16, count 0 2006.229.23:34:56.50#ibcon#read 6, iclass 16, count 0 2006.229.23:34:56.50#ibcon#end of sib2, iclass 16, count 0 2006.229.23:34:56.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:34:56.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:34:56.50#ibcon#[25=USB\r\n] 2006.229.23:34:56.50#ibcon#*before write, iclass 16, count 0 2006.229.23:34:56.50#ibcon#enter sib2, iclass 16, count 0 2006.229.23:34:56.50#ibcon#flushed, iclass 16, count 0 2006.229.23:34:56.50#ibcon#about to write, iclass 16, count 0 2006.229.23:34:56.50#ibcon#wrote, iclass 16, count 0 2006.229.23:34:56.50#ibcon#about to read 3, iclass 16, count 0 2006.229.23:34:56.53#ibcon#read 3, iclass 16, count 0 2006.229.23:34:56.53#ibcon#about to read 4, iclass 16, count 0 2006.229.23:34:56.53#ibcon#read 4, iclass 16, count 0 2006.229.23:34:56.53#ibcon#about to read 5, iclass 16, count 0 2006.229.23:34:56.53#ibcon#read 5, iclass 16, count 0 2006.229.23:34:56.53#ibcon#about to read 6, iclass 16, count 0 2006.229.23:34:56.53#ibcon#read 6, iclass 16, count 0 2006.229.23:34:56.53#ibcon#end of sib2, iclass 16, count 0 2006.229.23:34:56.53#ibcon#*after write, iclass 16, count 0 2006.229.23:34:56.53#ibcon#*before return 0, iclass 16, count 0 2006.229.23:34:56.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:56.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:56.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:34:56.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:34:56.53$vck44/valo=8,884.99 2006.229.23:34:56.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.23:34:56.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.23:34:56.53#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:56.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:56.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:56.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:56.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:34:56.53#ibcon#first serial, iclass 18, count 0 2006.229.23:34:56.53#ibcon#enter sib2, iclass 18, count 0 2006.229.23:34:56.53#ibcon#flushed, iclass 18, count 0 2006.229.23:34:56.53#ibcon#about to write, iclass 18, count 0 2006.229.23:34:56.53#ibcon#wrote, iclass 18, count 0 2006.229.23:34:56.53#ibcon#about to read 3, iclass 18, count 0 2006.229.23:34:56.55#ibcon#read 3, iclass 18, count 0 2006.229.23:34:56.55#ibcon#about to read 4, iclass 18, count 0 2006.229.23:34:56.55#ibcon#read 4, iclass 18, count 0 2006.229.23:34:56.55#ibcon#about to read 5, iclass 18, count 0 2006.229.23:34:56.55#ibcon#read 5, iclass 18, count 0 2006.229.23:34:56.55#ibcon#about to read 6, iclass 18, count 0 2006.229.23:34:56.55#ibcon#read 6, iclass 18, count 0 2006.229.23:34:56.55#ibcon#end of sib2, iclass 18, count 0 2006.229.23:34:56.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:34:56.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:34:56.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:34:56.55#ibcon#*before write, iclass 18, count 0 2006.229.23:34:56.55#ibcon#enter sib2, iclass 18, count 0 2006.229.23:34:56.55#ibcon#flushed, iclass 18, count 0 2006.229.23:34:56.55#ibcon#about to write, iclass 18, count 0 2006.229.23:34:56.55#ibcon#wrote, iclass 18, count 0 2006.229.23:34:56.55#ibcon#about to read 3, iclass 18, count 0 2006.229.23:34:56.59#ibcon#read 3, iclass 18, count 0 2006.229.23:34:56.59#ibcon#about to read 4, iclass 18, count 0 2006.229.23:34:56.59#ibcon#read 4, iclass 18, count 0 2006.229.23:34:56.59#ibcon#about to read 5, iclass 18, count 0 2006.229.23:34:56.59#ibcon#read 5, iclass 18, count 0 2006.229.23:34:56.59#ibcon#about to read 6, iclass 18, count 0 2006.229.23:34:56.59#ibcon#read 6, iclass 18, count 0 2006.229.23:34:56.59#ibcon#end of sib2, iclass 18, count 0 2006.229.23:34:56.59#ibcon#*after write, iclass 18, count 0 2006.229.23:34:56.59#ibcon#*before return 0, iclass 18, count 0 2006.229.23:34:56.59#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:56.59#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:56.59#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:34:56.59#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:34:56.59$vck44/va=8,6 2006.229.23:34:56.59#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.23:34:56.59#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.23:34:56.59#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:56.59#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:34:56.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:34:56.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:34:56.65#ibcon#enter wrdev, iclass 20, count 2 2006.229.23:34:56.65#ibcon#first serial, iclass 20, count 2 2006.229.23:34:56.65#ibcon#enter sib2, iclass 20, count 2 2006.229.23:34:56.65#ibcon#flushed, iclass 20, count 2 2006.229.23:34:56.65#ibcon#about to write, iclass 20, count 2 2006.229.23:34:56.65#ibcon#wrote, iclass 20, count 2 2006.229.23:34:56.65#ibcon#about to read 3, iclass 20, count 2 2006.229.23:34:56.67#ibcon#read 3, iclass 20, count 2 2006.229.23:34:56.67#ibcon#about to read 4, iclass 20, count 2 2006.229.23:34:56.67#ibcon#read 4, iclass 20, count 2 2006.229.23:34:56.67#ibcon#about to read 5, iclass 20, count 2 2006.229.23:34:56.67#ibcon#read 5, iclass 20, count 2 2006.229.23:34:56.67#ibcon#about to read 6, iclass 20, count 2 2006.229.23:34:56.67#ibcon#read 6, iclass 20, count 2 2006.229.23:34:56.67#ibcon#end of sib2, iclass 20, count 2 2006.229.23:34:56.67#ibcon#*mode == 0, iclass 20, count 2 2006.229.23:34:56.67#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.23:34:56.67#ibcon#[25=AT08-06\r\n] 2006.229.23:34:56.67#ibcon#*before write, iclass 20, count 2 2006.229.23:34:56.67#ibcon#enter sib2, iclass 20, count 2 2006.229.23:34:56.67#ibcon#flushed, iclass 20, count 2 2006.229.23:34:56.67#ibcon#about to write, iclass 20, count 2 2006.229.23:34:56.67#ibcon#wrote, iclass 20, count 2 2006.229.23:34:56.67#ibcon#about to read 3, iclass 20, count 2 2006.229.23:34:56.70#ibcon#read 3, iclass 20, count 2 2006.229.23:34:56.70#ibcon#about to read 4, iclass 20, count 2 2006.229.23:34:56.70#ibcon#read 4, iclass 20, count 2 2006.229.23:34:56.70#ibcon#about to read 5, iclass 20, count 2 2006.229.23:34:56.70#ibcon#read 5, iclass 20, count 2 2006.229.23:34:56.70#ibcon#about to read 6, iclass 20, count 2 2006.229.23:34:56.70#ibcon#read 6, iclass 20, count 2 2006.229.23:34:56.70#ibcon#end of sib2, iclass 20, count 2 2006.229.23:34:56.70#ibcon#*after write, iclass 20, count 2 2006.229.23:34:56.70#ibcon#*before return 0, iclass 20, count 2 2006.229.23:34:56.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:34:56.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:34:56.70#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.23:34:56.70#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:56.70#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:34:56.82#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:34:56.82#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:34:56.82#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:34:56.82#ibcon#first serial, iclass 20, count 0 2006.229.23:34:56.82#ibcon#enter sib2, iclass 20, count 0 2006.229.23:34:56.82#ibcon#flushed, iclass 20, count 0 2006.229.23:34:56.82#ibcon#about to write, iclass 20, count 0 2006.229.23:34:56.82#ibcon#wrote, iclass 20, count 0 2006.229.23:34:56.82#ibcon#about to read 3, iclass 20, count 0 2006.229.23:34:56.84#ibcon#read 3, iclass 20, count 0 2006.229.23:34:56.84#ibcon#about to read 4, iclass 20, count 0 2006.229.23:34:56.84#ibcon#read 4, iclass 20, count 0 2006.229.23:34:56.84#ibcon#about to read 5, iclass 20, count 0 2006.229.23:34:56.84#ibcon#read 5, iclass 20, count 0 2006.229.23:34:56.84#ibcon#about to read 6, iclass 20, count 0 2006.229.23:34:56.84#ibcon#read 6, iclass 20, count 0 2006.229.23:34:56.84#ibcon#end of sib2, iclass 20, count 0 2006.229.23:34:56.84#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:34:56.84#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:34:56.84#ibcon#[25=USB\r\n] 2006.229.23:34:56.84#ibcon#*before write, iclass 20, count 0 2006.229.23:34:56.84#ibcon#enter sib2, iclass 20, count 0 2006.229.23:34:56.84#ibcon#flushed, iclass 20, count 0 2006.229.23:34:56.84#ibcon#about to write, iclass 20, count 0 2006.229.23:34:56.84#ibcon#wrote, iclass 20, count 0 2006.229.23:34:56.84#ibcon#about to read 3, iclass 20, count 0 2006.229.23:34:56.87#ibcon#read 3, iclass 20, count 0 2006.229.23:34:56.87#ibcon#about to read 4, iclass 20, count 0 2006.229.23:34:56.87#ibcon#read 4, iclass 20, count 0 2006.229.23:34:56.87#ibcon#about to read 5, iclass 20, count 0 2006.229.23:34:56.87#ibcon#read 5, iclass 20, count 0 2006.229.23:34:56.87#ibcon#about to read 6, iclass 20, count 0 2006.229.23:34:56.87#ibcon#read 6, iclass 20, count 0 2006.229.23:34:56.87#ibcon#end of sib2, iclass 20, count 0 2006.229.23:34:56.87#ibcon#*after write, iclass 20, count 0 2006.229.23:34:56.87#ibcon#*before return 0, iclass 20, count 0 2006.229.23:34:56.87#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:34:56.87#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:34:56.87#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:34:56.87#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:34:56.87$vck44/vblo=1,629.99 2006.229.23:34:56.87#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.23:34:56.87#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.23:34:56.87#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:56.87#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:34:56.87#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:34:56.87#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:34:56.87#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:34:56.87#ibcon#first serial, iclass 22, count 0 2006.229.23:34:56.87#ibcon#enter sib2, iclass 22, count 0 2006.229.23:34:56.87#ibcon#flushed, iclass 22, count 0 2006.229.23:34:56.87#ibcon#about to write, iclass 22, count 0 2006.229.23:34:56.87#ibcon#wrote, iclass 22, count 0 2006.229.23:34:56.87#ibcon#about to read 3, iclass 22, count 0 2006.229.23:34:56.89#ibcon#read 3, iclass 22, count 0 2006.229.23:34:56.89#ibcon#about to read 4, iclass 22, count 0 2006.229.23:34:56.89#ibcon#read 4, iclass 22, count 0 2006.229.23:34:56.89#ibcon#about to read 5, iclass 22, count 0 2006.229.23:34:56.89#ibcon#read 5, iclass 22, count 0 2006.229.23:34:56.89#ibcon#about to read 6, iclass 22, count 0 2006.229.23:34:56.89#ibcon#read 6, iclass 22, count 0 2006.229.23:34:56.89#ibcon#end of sib2, iclass 22, count 0 2006.229.23:34:56.89#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:34:56.89#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:34:56.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:34:56.89#ibcon#*before write, iclass 22, count 0 2006.229.23:34:56.89#ibcon#enter sib2, iclass 22, count 0 2006.229.23:34:56.89#ibcon#flushed, iclass 22, count 0 2006.229.23:34:56.89#ibcon#about to write, iclass 22, count 0 2006.229.23:34:56.89#ibcon#wrote, iclass 22, count 0 2006.229.23:34:56.89#ibcon#about to read 3, iclass 22, count 0 2006.229.23:34:56.93#ibcon#read 3, iclass 22, count 0 2006.229.23:34:56.93#ibcon#about to read 4, iclass 22, count 0 2006.229.23:34:56.93#ibcon#read 4, iclass 22, count 0 2006.229.23:34:56.93#ibcon#about to read 5, iclass 22, count 0 2006.229.23:34:56.93#ibcon#read 5, iclass 22, count 0 2006.229.23:34:56.93#ibcon#about to read 6, iclass 22, count 0 2006.229.23:34:56.93#ibcon#read 6, iclass 22, count 0 2006.229.23:34:56.93#ibcon#end of sib2, iclass 22, count 0 2006.229.23:34:56.93#ibcon#*after write, iclass 22, count 0 2006.229.23:34:56.93#ibcon#*before return 0, iclass 22, count 0 2006.229.23:34:56.93#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:34:56.93#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:34:56.93#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:34:56.93#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:34:56.93$vck44/vb=1,4 2006.229.23:34:56.93#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.23:34:56.93#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.23:34:56.93#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:56.93#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:34:56.93#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:34:56.93#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:34:56.93#ibcon#enter wrdev, iclass 24, count 2 2006.229.23:34:56.93#ibcon#first serial, iclass 24, count 2 2006.229.23:34:56.93#ibcon#enter sib2, iclass 24, count 2 2006.229.23:34:56.93#ibcon#flushed, iclass 24, count 2 2006.229.23:34:56.93#ibcon#about to write, iclass 24, count 2 2006.229.23:34:56.93#ibcon#wrote, iclass 24, count 2 2006.229.23:34:56.93#ibcon#about to read 3, iclass 24, count 2 2006.229.23:34:56.95#ibcon#read 3, iclass 24, count 2 2006.229.23:34:56.95#ibcon#about to read 4, iclass 24, count 2 2006.229.23:34:56.95#ibcon#read 4, iclass 24, count 2 2006.229.23:34:56.95#ibcon#about to read 5, iclass 24, count 2 2006.229.23:34:56.95#ibcon#read 5, iclass 24, count 2 2006.229.23:34:56.95#ibcon#about to read 6, iclass 24, count 2 2006.229.23:34:56.95#ibcon#read 6, iclass 24, count 2 2006.229.23:34:56.95#ibcon#end of sib2, iclass 24, count 2 2006.229.23:34:56.95#ibcon#*mode == 0, iclass 24, count 2 2006.229.23:34:56.95#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.23:34:56.95#ibcon#[27=AT01-04\r\n] 2006.229.23:34:56.95#ibcon#*before write, iclass 24, count 2 2006.229.23:34:56.95#ibcon#enter sib2, iclass 24, count 2 2006.229.23:34:56.95#ibcon#flushed, iclass 24, count 2 2006.229.23:34:56.95#ibcon#about to write, iclass 24, count 2 2006.229.23:34:56.95#ibcon#wrote, iclass 24, count 2 2006.229.23:34:56.95#ibcon#about to read 3, iclass 24, count 2 2006.229.23:34:56.98#ibcon#read 3, iclass 24, count 2 2006.229.23:34:56.98#ibcon#about to read 4, iclass 24, count 2 2006.229.23:34:56.98#ibcon#read 4, iclass 24, count 2 2006.229.23:34:56.98#ibcon#about to read 5, iclass 24, count 2 2006.229.23:34:56.98#ibcon#read 5, iclass 24, count 2 2006.229.23:34:56.98#ibcon#about to read 6, iclass 24, count 2 2006.229.23:34:56.98#ibcon#read 6, iclass 24, count 2 2006.229.23:34:56.98#ibcon#end of sib2, iclass 24, count 2 2006.229.23:34:56.98#ibcon#*after write, iclass 24, count 2 2006.229.23:34:56.98#ibcon#*before return 0, iclass 24, count 2 2006.229.23:34:56.98#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:34:56.98#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:34:56.98#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.23:34:56.98#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:56.98#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:34:57.10#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:34:57.10#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:34:57.10#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:34:57.10#ibcon#first serial, iclass 24, count 0 2006.229.23:34:57.10#ibcon#enter sib2, iclass 24, count 0 2006.229.23:34:57.10#ibcon#flushed, iclass 24, count 0 2006.229.23:34:57.10#ibcon#about to write, iclass 24, count 0 2006.229.23:34:57.10#ibcon#wrote, iclass 24, count 0 2006.229.23:34:57.10#ibcon#about to read 3, iclass 24, count 0 2006.229.23:34:57.12#ibcon#read 3, iclass 24, count 0 2006.229.23:34:57.12#ibcon#about to read 4, iclass 24, count 0 2006.229.23:34:57.12#ibcon#read 4, iclass 24, count 0 2006.229.23:34:57.12#ibcon#about to read 5, iclass 24, count 0 2006.229.23:34:57.12#ibcon#read 5, iclass 24, count 0 2006.229.23:34:57.12#ibcon#about to read 6, iclass 24, count 0 2006.229.23:34:57.12#ibcon#read 6, iclass 24, count 0 2006.229.23:34:57.12#ibcon#end of sib2, iclass 24, count 0 2006.229.23:34:57.12#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:34:57.12#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:34:57.12#ibcon#[27=USB\r\n] 2006.229.23:34:57.12#ibcon#*before write, iclass 24, count 0 2006.229.23:34:57.12#ibcon#enter sib2, iclass 24, count 0 2006.229.23:34:57.12#ibcon#flushed, iclass 24, count 0 2006.229.23:34:57.12#ibcon#about to write, iclass 24, count 0 2006.229.23:34:57.12#ibcon#wrote, iclass 24, count 0 2006.229.23:34:57.12#ibcon#about to read 3, iclass 24, count 0 2006.229.23:34:57.15#ibcon#read 3, iclass 24, count 0 2006.229.23:34:57.15#ibcon#about to read 4, iclass 24, count 0 2006.229.23:34:57.15#ibcon#read 4, iclass 24, count 0 2006.229.23:34:57.15#ibcon#about to read 5, iclass 24, count 0 2006.229.23:34:57.15#ibcon#read 5, iclass 24, count 0 2006.229.23:34:57.15#ibcon#about to read 6, iclass 24, count 0 2006.229.23:34:57.15#ibcon#read 6, iclass 24, count 0 2006.229.23:34:57.15#ibcon#end of sib2, iclass 24, count 0 2006.229.23:34:57.15#ibcon#*after write, iclass 24, count 0 2006.229.23:34:57.15#ibcon#*before return 0, iclass 24, count 0 2006.229.23:34:57.15#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:34:57.15#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:34:57.15#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:34:57.15#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:34:57.15$vck44/vblo=2,634.99 2006.229.23:34:57.15#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.23:34:57.15#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.23:34:57.15#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:57.15#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:57.15#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:57.15#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:57.15#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:34:57.15#ibcon#first serial, iclass 26, count 0 2006.229.23:34:57.15#ibcon#enter sib2, iclass 26, count 0 2006.229.23:34:57.15#ibcon#flushed, iclass 26, count 0 2006.229.23:34:57.15#ibcon#about to write, iclass 26, count 0 2006.229.23:34:57.15#ibcon#wrote, iclass 26, count 0 2006.229.23:34:57.15#ibcon#about to read 3, iclass 26, count 0 2006.229.23:34:57.17#ibcon#read 3, iclass 26, count 0 2006.229.23:34:57.17#ibcon#about to read 4, iclass 26, count 0 2006.229.23:34:57.17#ibcon#read 4, iclass 26, count 0 2006.229.23:34:57.17#ibcon#about to read 5, iclass 26, count 0 2006.229.23:34:57.17#ibcon#read 5, iclass 26, count 0 2006.229.23:34:57.17#ibcon#about to read 6, iclass 26, count 0 2006.229.23:34:57.17#ibcon#read 6, iclass 26, count 0 2006.229.23:34:57.17#ibcon#end of sib2, iclass 26, count 0 2006.229.23:34:57.17#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:34:57.17#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:34:57.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:34:57.17#ibcon#*before write, iclass 26, count 0 2006.229.23:34:57.17#ibcon#enter sib2, iclass 26, count 0 2006.229.23:34:57.17#ibcon#flushed, iclass 26, count 0 2006.229.23:34:57.17#ibcon#about to write, iclass 26, count 0 2006.229.23:34:57.17#ibcon#wrote, iclass 26, count 0 2006.229.23:34:57.17#ibcon#about to read 3, iclass 26, count 0 2006.229.23:34:57.21#ibcon#read 3, iclass 26, count 0 2006.229.23:34:57.21#ibcon#about to read 4, iclass 26, count 0 2006.229.23:34:57.21#ibcon#read 4, iclass 26, count 0 2006.229.23:34:57.21#ibcon#about to read 5, iclass 26, count 0 2006.229.23:34:57.21#ibcon#read 5, iclass 26, count 0 2006.229.23:34:57.21#ibcon#about to read 6, iclass 26, count 0 2006.229.23:34:57.21#ibcon#read 6, iclass 26, count 0 2006.229.23:34:57.21#ibcon#end of sib2, iclass 26, count 0 2006.229.23:34:57.21#ibcon#*after write, iclass 26, count 0 2006.229.23:34:57.21#ibcon#*before return 0, iclass 26, count 0 2006.229.23:34:57.21#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:57.21#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:34:57.21#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:34:57.21#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:34:57.21$vck44/vb=2,4 2006.229.23:34:57.21#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.23:34:57.21#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.23:34:57.21#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:57.21#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:57.27#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:57.27#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:57.27#ibcon#enter wrdev, iclass 28, count 2 2006.229.23:34:57.27#ibcon#first serial, iclass 28, count 2 2006.229.23:34:57.27#ibcon#enter sib2, iclass 28, count 2 2006.229.23:34:57.27#ibcon#flushed, iclass 28, count 2 2006.229.23:34:57.27#ibcon#about to write, iclass 28, count 2 2006.229.23:34:57.27#ibcon#wrote, iclass 28, count 2 2006.229.23:34:57.27#ibcon#about to read 3, iclass 28, count 2 2006.229.23:34:57.29#ibcon#read 3, iclass 28, count 2 2006.229.23:34:57.29#ibcon#about to read 4, iclass 28, count 2 2006.229.23:34:57.29#ibcon#read 4, iclass 28, count 2 2006.229.23:34:57.29#ibcon#about to read 5, iclass 28, count 2 2006.229.23:34:57.29#ibcon#read 5, iclass 28, count 2 2006.229.23:34:57.29#ibcon#about to read 6, iclass 28, count 2 2006.229.23:34:57.29#ibcon#read 6, iclass 28, count 2 2006.229.23:34:57.29#ibcon#end of sib2, iclass 28, count 2 2006.229.23:34:57.29#ibcon#*mode == 0, iclass 28, count 2 2006.229.23:34:57.29#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.23:34:57.29#ibcon#[27=AT02-04\r\n] 2006.229.23:34:57.29#ibcon#*before write, iclass 28, count 2 2006.229.23:34:57.29#ibcon#enter sib2, iclass 28, count 2 2006.229.23:34:57.29#ibcon#flushed, iclass 28, count 2 2006.229.23:34:57.29#ibcon#about to write, iclass 28, count 2 2006.229.23:34:57.29#ibcon#wrote, iclass 28, count 2 2006.229.23:34:57.29#ibcon#about to read 3, iclass 28, count 2 2006.229.23:34:57.32#ibcon#read 3, iclass 28, count 2 2006.229.23:34:57.32#ibcon#about to read 4, iclass 28, count 2 2006.229.23:34:57.32#ibcon#read 4, iclass 28, count 2 2006.229.23:34:57.32#ibcon#about to read 5, iclass 28, count 2 2006.229.23:34:57.32#ibcon#read 5, iclass 28, count 2 2006.229.23:34:57.32#ibcon#about to read 6, iclass 28, count 2 2006.229.23:34:57.32#ibcon#read 6, iclass 28, count 2 2006.229.23:34:57.32#ibcon#end of sib2, iclass 28, count 2 2006.229.23:34:57.32#ibcon#*after write, iclass 28, count 2 2006.229.23:34:57.32#ibcon#*before return 0, iclass 28, count 2 2006.229.23:34:57.32#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:57.32#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:34:57.32#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.23:34:57.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:57.32#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:57.44#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:57.44#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:57.44#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:34:57.44#ibcon#first serial, iclass 28, count 0 2006.229.23:34:57.44#ibcon#enter sib2, iclass 28, count 0 2006.229.23:34:57.44#ibcon#flushed, iclass 28, count 0 2006.229.23:34:57.44#ibcon#about to write, iclass 28, count 0 2006.229.23:34:57.44#ibcon#wrote, iclass 28, count 0 2006.229.23:34:57.44#ibcon#about to read 3, iclass 28, count 0 2006.229.23:34:57.46#ibcon#read 3, iclass 28, count 0 2006.229.23:34:57.46#ibcon#about to read 4, iclass 28, count 0 2006.229.23:34:57.46#ibcon#read 4, iclass 28, count 0 2006.229.23:34:57.46#ibcon#about to read 5, iclass 28, count 0 2006.229.23:34:57.46#ibcon#read 5, iclass 28, count 0 2006.229.23:34:57.46#ibcon#about to read 6, iclass 28, count 0 2006.229.23:34:57.46#ibcon#read 6, iclass 28, count 0 2006.229.23:34:57.46#ibcon#end of sib2, iclass 28, count 0 2006.229.23:34:57.46#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:34:57.46#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:34:57.46#ibcon#[27=USB\r\n] 2006.229.23:34:57.46#ibcon#*before write, iclass 28, count 0 2006.229.23:34:57.46#ibcon#enter sib2, iclass 28, count 0 2006.229.23:34:57.46#ibcon#flushed, iclass 28, count 0 2006.229.23:34:57.46#ibcon#about to write, iclass 28, count 0 2006.229.23:34:57.46#ibcon#wrote, iclass 28, count 0 2006.229.23:34:57.46#ibcon#about to read 3, iclass 28, count 0 2006.229.23:34:57.49#ibcon#read 3, iclass 28, count 0 2006.229.23:34:57.49#ibcon#about to read 4, iclass 28, count 0 2006.229.23:34:57.49#ibcon#read 4, iclass 28, count 0 2006.229.23:34:57.49#ibcon#about to read 5, iclass 28, count 0 2006.229.23:34:57.49#ibcon#read 5, iclass 28, count 0 2006.229.23:34:57.49#ibcon#about to read 6, iclass 28, count 0 2006.229.23:34:57.49#ibcon#read 6, iclass 28, count 0 2006.229.23:34:57.49#ibcon#end of sib2, iclass 28, count 0 2006.229.23:34:57.49#ibcon#*after write, iclass 28, count 0 2006.229.23:34:57.49#ibcon#*before return 0, iclass 28, count 0 2006.229.23:34:57.49#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:57.49#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:34:57.49#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:34:57.49#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:34:57.49$vck44/vblo=3,649.99 2006.229.23:34:57.49#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.23:34:57.49#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.23:34:57.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:57.49#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:57.49#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:57.49#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:57.49#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:34:57.49#ibcon#first serial, iclass 30, count 0 2006.229.23:34:57.49#ibcon#enter sib2, iclass 30, count 0 2006.229.23:34:57.49#ibcon#flushed, iclass 30, count 0 2006.229.23:34:57.49#ibcon#about to write, iclass 30, count 0 2006.229.23:34:57.49#ibcon#wrote, iclass 30, count 0 2006.229.23:34:57.49#ibcon#about to read 3, iclass 30, count 0 2006.229.23:34:57.51#ibcon#read 3, iclass 30, count 0 2006.229.23:34:57.51#ibcon#about to read 4, iclass 30, count 0 2006.229.23:34:57.51#ibcon#read 4, iclass 30, count 0 2006.229.23:34:57.51#ibcon#about to read 5, iclass 30, count 0 2006.229.23:34:57.51#ibcon#read 5, iclass 30, count 0 2006.229.23:34:57.51#ibcon#about to read 6, iclass 30, count 0 2006.229.23:34:57.51#ibcon#read 6, iclass 30, count 0 2006.229.23:34:57.51#ibcon#end of sib2, iclass 30, count 0 2006.229.23:34:57.51#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:34:57.51#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:34:57.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:34:57.51#ibcon#*before write, iclass 30, count 0 2006.229.23:34:57.51#ibcon#enter sib2, iclass 30, count 0 2006.229.23:34:57.51#ibcon#flushed, iclass 30, count 0 2006.229.23:34:57.51#ibcon#about to write, iclass 30, count 0 2006.229.23:34:57.51#ibcon#wrote, iclass 30, count 0 2006.229.23:34:57.51#ibcon#about to read 3, iclass 30, count 0 2006.229.23:34:57.55#ibcon#read 3, iclass 30, count 0 2006.229.23:34:57.55#ibcon#about to read 4, iclass 30, count 0 2006.229.23:34:57.55#ibcon#read 4, iclass 30, count 0 2006.229.23:34:57.55#ibcon#about to read 5, iclass 30, count 0 2006.229.23:34:57.55#ibcon#read 5, iclass 30, count 0 2006.229.23:34:57.55#ibcon#about to read 6, iclass 30, count 0 2006.229.23:34:57.55#ibcon#read 6, iclass 30, count 0 2006.229.23:34:57.55#ibcon#end of sib2, iclass 30, count 0 2006.229.23:34:57.55#ibcon#*after write, iclass 30, count 0 2006.229.23:34:57.55#ibcon#*before return 0, iclass 30, count 0 2006.229.23:34:57.55#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:57.55#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:34:57.55#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:34:57.55#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:34:57.55$vck44/vb=3,4 2006.229.23:34:57.55#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.23:34:57.55#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.23:34:57.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:57.55#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:57.61#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:57.61#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:57.61#ibcon#enter wrdev, iclass 32, count 2 2006.229.23:34:57.61#ibcon#first serial, iclass 32, count 2 2006.229.23:34:57.61#ibcon#enter sib2, iclass 32, count 2 2006.229.23:34:57.61#ibcon#flushed, iclass 32, count 2 2006.229.23:34:57.61#ibcon#about to write, iclass 32, count 2 2006.229.23:34:57.61#ibcon#wrote, iclass 32, count 2 2006.229.23:34:57.61#ibcon#about to read 3, iclass 32, count 2 2006.229.23:34:57.63#ibcon#read 3, iclass 32, count 2 2006.229.23:34:57.63#ibcon#about to read 4, iclass 32, count 2 2006.229.23:34:57.63#ibcon#read 4, iclass 32, count 2 2006.229.23:34:57.63#ibcon#about to read 5, iclass 32, count 2 2006.229.23:34:57.63#ibcon#read 5, iclass 32, count 2 2006.229.23:34:57.63#ibcon#about to read 6, iclass 32, count 2 2006.229.23:34:57.63#ibcon#read 6, iclass 32, count 2 2006.229.23:34:57.63#ibcon#end of sib2, iclass 32, count 2 2006.229.23:34:57.63#ibcon#*mode == 0, iclass 32, count 2 2006.229.23:34:57.63#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.23:34:57.63#ibcon#[27=AT03-04\r\n] 2006.229.23:34:57.63#ibcon#*before write, iclass 32, count 2 2006.229.23:34:57.63#ibcon#enter sib2, iclass 32, count 2 2006.229.23:34:57.63#ibcon#flushed, iclass 32, count 2 2006.229.23:34:57.63#ibcon#about to write, iclass 32, count 2 2006.229.23:34:57.63#ibcon#wrote, iclass 32, count 2 2006.229.23:34:57.63#ibcon#about to read 3, iclass 32, count 2 2006.229.23:34:57.66#ibcon#read 3, iclass 32, count 2 2006.229.23:34:57.66#ibcon#about to read 4, iclass 32, count 2 2006.229.23:34:57.66#ibcon#read 4, iclass 32, count 2 2006.229.23:34:57.66#ibcon#about to read 5, iclass 32, count 2 2006.229.23:34:57.66#ibcon#read 5, iclass 32, count 2 2006.229.23:34:57.66#ibcon#about to read 6, iclass 32, count 2 2006.229.23:34:57.66#ibcon#read 6, iclass 32, count 2 2006.229.23:34:57.66#ibcon#end of sib2, iclass 32, count 2 2006.229.23:34:57.66#ibcon#*after write, iclass 32, count 2 2006.229.23:34:57.66#ibcon#*before return 0, iclass 32, count 2 2006.229.23:34:57.66#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:57.66#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:34:57.66#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.23:34:57.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:57.66#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:57.78#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:57.78#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:57.78#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:34:57.78#ibcon#first serial, iclass 32, count 0 2006.229.23:34:57.78#ibcon#enter sib2, iclass 32, count 0 2006.229.23:34:57.78#ibcon#flushed, iclass 32, count 0 2006.229.23:34:57.78#ibcon#about to write, iclass 32, count 0 2006.229.23:34:57.78#ibcon#wrote, iclass 32, count 0 2006.229.23:34:57.78#ibcon#about to read 3, iclass 32, count 0 2006.229.23:34:57.80#ibcon#read 3, iclass 32, count 0 2006.229.23:34:57.80#ibcon#about to read 4, iclass 32, count 0 2006.229.23:34:57.80#ibcon#read 4, iclass 32, count 0 2006.229.23:34:57.80#ibcon#about to read 5, iclass 32, count 0 2006.229.23:34:57.80#ibcon#read 5, iclass 32, count 0 2006.229.23:34:57.80#ibcon#about to read 6, iclass 32, count 0 2006.229.23:34:57.80#ibcon#read 6, iclass 32, count 0 2006.229.23:34:57.80#ibcon#end of sib2, iclass 32, count 0 2006.229.23:34:57.80#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:34:57.80#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:34:57.80#ibcon#[27=USB\r\n] 2006.229.23:34:57.80#ibcon#*before write, iclass 32, count 0 2006.229.23:34:57.80#ibcon#enter sib2, iclass 32, count 0 2006.229.23:34:57.80#ibcon#flushed, iclass 32, count 0 2006.229.23:34:57.80#ibcon#about to write, iclass 32, count 0 2006.229.23:34:57.80#ibcon#wrote, iclass 32, count 0 2006.229.23:34:57.80#ibcon#about to read 3, iclass 32, count 0 2006.229.23:34:57.83#ibcon#read 3, iclass 32, count 0 2006.229.23:34:57.83#ibcon#about to read 4, iclass 32, count 0 2006.229.23:34:57.83#ibcon#read 4, iclass 32, count 0 2006.229.23:34:57.83#ibcon#about to read 5, iclass 32, count 0 2006.229.23:34:57.83#ibcon#read 5, iclass 32, count 0 2006.229.23:34:57.83#ibcon#about to read 6, iclass 32, count 0 2006.229.23:34:57.83#ibcon#read 6, iclass 32, count 0 2006.229.23:34:57.83#ibcon#end of sib2, iclass 32, count 0 2006.229.23:34:57.83#ibcon#*after write, iclass 32, count 0 2006.229.23:34:57.83#ibcon#*before return 0, iclass 32, count 0 2006.229.23:34:57.83#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:57.83#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:34:57.83#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:34:57.83#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:34:57.83$vck44/vblo=4,679.99 2006.229.23:34:57.83#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.23:34:57.83#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.23:34:57.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:57.83#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:57.83#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:57.83#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:57.83#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:34:57.83#ibcon#first serial, iclass 34, count 0 2006.229.23:34:57.83#ibcon#enter sib2, iclass 34, count 0 2006.229.23:34:57.83#ibcon#flushed, iclass 34, count 0 2006.229.23:34:57.83#ibcon#about to write, iclass 34, count 0 2006.229.23:34:57.83#ibcon#wrote, iclass 34, count 0 2006.229.23:34:57.83#ibcon#about to read 3, iclass 34, count 0 2006.229.23:34:57.85#ibcon#read 3, iclass 34, count 0 2006.229.23:34:57.85#ibcon#about to read 4, iclass 34, count 0 2006.229.23:34:57.85#ibcon#read 4, iclass 34, count 0 2006.229.23:34:57.85#ibcon#about to read 5, iclass 34, count 0 2006.229.23:34:57.85#ibcon#read 5, iclass 34, count 0 2006.229.23:34:57.85#ibcon#about to read 6, iclass 34, count 0 2006.229.23:34:57.85#ibcon#read 6, iclass 34, count 0 2006.229.23:34:57.85#ibcon#end of sib2, iclass 34, count 0 2006.229.23:34:57.85#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:34:57.85#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:34:57.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:34:57.85#ibcon#*before write, iclass 34, count 0 2006.229.23:34:57.85#ibcon#enter sib2, iclass 34, count 0 2006.229.23:34:57.85#ibcon#flushed, iclass 34, count 0 2006.229.23:34:57.85#ibcon#about to write, iclass 34, count 0 2006.229.23:34:57.85#ibcon#wrote, iclass 34, count 0 2006.229.23:34:57.85#ibcon#about to read 3, iclass 34, count 0 2006.229.23:34:57.89#ibcon#read 3, iclass 34, count 0 2006.229.23:34:57.89#ibcon#about to read 4, iclass 34, count 0 2006.229.23:34:57.89#ibcon#read 4, iclass 34, count 0 2006.229.23:34:57.89#ibcon#about to read 5, iclass 34, count 0 2006.229.23:34:57.89#ibcon#read 5, iclass 34, count 0 2006.229.23:34:57.89#ibcon#about to read 6, iclass 34, count 0 2006.229.23:34:57.89#ibcon#read 6, iclass 34, count 0 2006.229.23:34:57.89#ibcon#end of sib2, iclass 34, count 0 2006.229.23:34:57.89#ibcon#*after write, iclass 34, count 0 2006.229.23:34:57.89#ibcon#*before return 0, iclass 34, count 0 2006.229.23:34:57.89#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:57.89#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:34:57.89#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:34:57.89#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:34:57.89$vck44/vb=4,4 2006.229.23:34:57.89#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.23:34:57.89#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.23:34:57.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:57.89#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:57.95#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:57.95#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:57.95#ibcon#enter wrdev, iclass 36, count 2 2006.229.23:34:57.95#ibcon#first serial, iclass 36, count 2 2006.229.23:34:57.95#ibcon#enter sib2, iclass 36, count 2 2006.229.23:34:57.95#ibcon#flushed, iclass 36, count 2 2006.229.23:34:57.95#ibcon#about to write, iclass 36, count 2 2006.229.23:34:57.95#ibcon#wrote, iclass 36, count 2 2006.229.23:34:57.95#ibcon#about to read 3, iclass 36, count 2 2006.229.23:34:57.97#ibcon#read 3, iclass 36, count 2 2006.229.23:34:57.97#ibcon#about to read 4, iclass 36, count 2 2006.229.23:34:57.97#ibcon#read 4, iclass 36, count 2 2006.229.23:34:57.97#ibcon#about to read 5, iclass 36, count 2 2006.229.23:34:57.97#ibcon#read 5, iclass 36, count 2 2006.229.23:34:57.97#ibcon#about to read 6, iclass 36, count 2 2006.229.23:34:57.97#ibcon#read 6, iclass 36, count 2 2006.229.23:34:57.97#ibcon#end of sib2, iclass 36, count 2 2006.229.23:34:57.97#ibcon#*mode == 0, iclass 36, count 2 2006.229.23:34:57.97#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.23:34:57.97#ibcon#[27=AT04-04\r\n] 2006.229.23:34:57.97#ibcon#*before write, iclass 36, count 2 2006.229.23:34:57.97#ibcon#enter sib2, iclass 36, count 2 2006.229.23:34:57.97#ibcon#flushed, iclass 36, count 2 2006.229.23:34:57.97#ibcon#about to write, iclass 36, count 2 2006.229.23:34:57.97#ibcon#wrote, iclass 36, count 2 2006.229.23:34:57.97#ibcon#about to read 3, iclass 36, count 2 2006.229.23:34:58.00#ibcon#read 3, iclass 36, count 2 2006.229.23:34:58.00#ibcon#about to read 4, iclass 36, count 2 2006.229.23:34:58.00#ibcon#read 4, iclass 36, count 2 2006.229.23:34:58.00#ibcon#about to read 5, iclass 36, count 2 2006.229.23:34:58.00#ibcon#read 5, iclass 36, count 2 2006.229.23:34:58.00#ibcon#about to read 6, iclass 36, count 2 2006.229.23:34:58.00#ibcon#read 6, iclass 36, count 2 2006.229.23:34:58.00#ibcon#end of sib2, iclass 36, count 2 2006.229.23:34:58.00#ibcon#*after write, iclass 36, count 2 2006.229.23:34:58.00#ibcon#*before return 0, iclass 36, count 2 2006.229.23:34:58.00#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:58.00#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:34:58.00#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.23:34:58.00#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:58.00#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:58.12#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:58.12#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:58.12#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:34:58.12#ibcon#first serial, iclass 36, count 0 2006.229.23:34:58.12#ibcon#enter sib2, iclass 36, count 0 2006.229.23:34:58.12#ibcon#flushed, iclass 36, count 0 2006.229.23:34:58.12#ibcon#about to write, iclass 36, count 0 2006.229.23:34:58.12#ibcon#wrote, iclass 36, count 0 2006.229.23:34:58.12#ibcon#about to read 3, iclass 36, count 0 2006.229.23:34:58.14#ibcon#read 3, iclass 36, count 0 2006.229.23:34:58.14#ibcon#about to read 4, iclass 36, count 0 2006.229.23:34:58.14#ibcon#read 4, iclass 36, count 0 2006.229.23:34:58.14#ibcon#about to read 5, iclass 36, count 0 2006.229.23:34:58.14#ibcon#read 5, iclass 36, count 0 2006.229.23:34:58.14#ibcon#about to read 6, iclass 36, count 0 2006.229.23:34:58.14#ibcon#read 6, iclass 36, count 0 2006.229.23:34:58.14#ibcon#end of sib2, iclass 36, count 0 2006.229.23:34:58.14#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:34:58.14#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:34:58.14#ibcon#[27=USB\r\n] 2006.229.23:34:58.14#ibcon#*before write, iclass 36, count 0 2006.229.23:34:58.14#ibcon#enter sib2, iclass 36, count 0 2006.229.23:34:58.14#ibcon#flushed, iclass 36, count 0 2006.229.23:34:58.14#ibcon#about to write, iclass 36, count 0 2006.229.23:34:58.14#ibcon#wrote, iclass 36, count 0 2006.229.23:34:58.14#ibcon#about to read 3, iclass 36, count 0 2006.229.23:34:58.17#ibcon#read 3, iclass 36, count 0 2006.229.23:34:58.17#ibcon#about to read 4, iclass 36, count 0 2006.229.23:34:58.17#ibcon#read 4, iclass 36, count 0 2006.229.23:34:58.17#ibcon#about to read 5, iclass 36, count 0 2006.229.23:34:58.17#ibcon#read 5, iclass 36, count 0 2006.229.23:34:58.17#ibcon#about to read 6, iclass 36, count 0 2006.229.23:34:58.17#ibcon#read 6, iclass 36, count 0 2006.229.23:34:58.17#ibcon#end of sib2, iclass 36, count 0 2006.229.23:34:58.17#ibcon#*after write, iclass 36, count 0 2006.229.23:34:58.17#ibcon#*before return 0, iclass 36, count 0 2006.229.23:34:58.17#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:58.17#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:34:58.17#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:34:58.17#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:34:58.17$vck44/vblo=5,709.99 2006.229.23:34:58.17#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.23:34:58.17#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.23:34:58.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:58.17#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:58.17#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:58.17#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:58.17#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:34:58.17#ibcon#first serial, iclass 38, count 0 2006.229.23:34:58.17#ibcon#enter sib2, iclass 38, count 0 2006.229.23:34:58.17#ibcon#flushed, iclass 38, count 0 2006.229.23:34:58.17#ibcon#about to write, iclass 38, count 0 2006.229.23:34:58.17#ibcon#wrote, iclass 38, count 0 2006.229.23:34:58.17#ibcon#about to read 3, iclass 38, count 0 2006.229.23:34:58.19#ibcon#read 3, iclass 38, count 0 2006.229.23:34:58.19#ibcon#about to read 4, iclass 38, count 0 2006.229.23:34:58.19#ibcon#read 4, iclass 38, count 0 2006.229.23:34:58.19#ibcon#about to read 5, iclass 38, count 0 2006.229.23:34:58.19#ibcon#read 5, iclass 38, count 0 2006.229.23:34:58.19#ibcon#about to read 6, iclass 38, count 0 2006.229.23:34:58.19#ibcon#read 6, iclass 38, count 0 2006.229.23:34:58.19#ibcon#end of sib2, iclass 38, count 0 2006.229.23:34:58.19#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:34:58.19#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:34:58.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:34:58.19#ibcon#*before write, iclass 38, count 0 2006.229.23:34:58.19#ibcon#enter sib2, iclass 38, count 0 2006.229.23:34:58.19#ibcon#flushed, iclass 38, count 0 2006.229.23:34:58.19#ibcon#about to write, iclass 38, count 0 2006.229.23:34:58.19#ibcon#wrote, iclass 38, count 0 2006.229.23:34:58.19#ibcon#about to read 3, iclass 38, count 0 2006.229.23:34:58.23#ibcon#read 3, iclass 38, count 0 2006.229.23:34:58.23#ibcon#about to read 4, iclass 38, count 0 2006.229.23:34:58.23#ibcon#read 4, iclass 38, count 0 2006.229.23:34:58.23#ibcon#about to read 5, iclass 38, count 0 2006.229.23:34:58.23#ibcon#read 5, iclass 38, count 0 2006.229.23:34:58.23#ibcon#about to read 6, iclass 38, count 0 2006.229.23:34:58.23#ibcon#read 6, iclass 38, count 0 2006.229.23:34:58.23#ibcon#end of sib2, iclass 38, count 0 2006.229.23:34:58.23#ibcon#*after write, iclass 38, count 0 2006.229.23:34:58.23#ibcon#*before return 0, iclass 38, count 0 2006.229.23:34:58.23#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:58.23#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:34:58.23#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:34:58.23#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:34:58.23$vck44/vb=5,4 2006.229.23:34:58.23#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.23:34:58.23#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.23:34:58.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:58.23#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:58.29#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:58.29#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:58.29#ibcon#enter wrdev, iclass 40, count 2 2006.229.23:34:58.29#ibcon#first serial, iclass 40, count 2 2006.229.23:34:58.29#ibcon#enter sib2, iclass 40, count 2 2006.229.23:34:58.29#ibcon#flushed, iclass 40, count 2 2006.229.23:34:58.29#ibcon#about to write, iclass 40, count 2 2006.229.23:34:58.29#ibcon#wrote, iclass 40, count 2 2006.229.23:34:58.29#ibcon#about to read 3, iclass 40, count 2 2006.229.23:34:58.31#ibcon#read 3, iclass 40, count 2 2006.229.23:34:58.31#ibcon#about to read 4, iclass 40, count 2 2006.229.23:34:58.31#ibcon#read 4, iclass 40, count 2 2006.229.23:34:58.31#ibcon#about to read 5, iclass 40, count 2 2006.229.23:34:58.31#ibcon#read 5, iclass 40, count 2 2006.229.23:34:58.31#ibcon#about to read 6, iclass 40, count 2 2006.229.23:34:58.31#ibcon#read 6, iclass 40, count 2 2006.229.23:34:58.31#ibcon#end of sib2, iclass 40, count 2 2006.229.23:34:58.31#ibcon#*mode == 0, iclass 40, count 2 2006.229.23:34:58.31#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.23:34:58.31#ibcon#[27=AT05-04\r\n] 2006.229.23:34:58.31#ibcon#*before write, iclass 40, count 2 2006.229.23:34:58.31#ibcon#enter sib2, iclass 40, count 2 2006.229.23:34:58.31#ibcon#flushed, iclass 40, count 2 2006.229.23:34:58.31#ibcon#about to write, iclass 40, count 2 2006.229.23:34:58.31#ibcon#wrote, iclass 40, count 2 2006.229.23:34:58.31#ibcon#about to read 3, iclass 40, count 2 2006.229.23:34:58.34#ibcon#read 3, iclass 40, count 2 2006.229.23:34:58.34#ibcon#about to read 4, iclass 40, count 2 2006.229.23:34:58.34#ibcon#read 4, iclass 40, count 2 2006.229.23:34:58.34#ibcon#about to read 5, iclass 40, count 2 2006.229.23:34:58.34#ibcon#read 5, iclass 40, count 2 2006.229.23:34:58.34#ibcon#about to read 6, iclass 40, count 2 2006.229.23:34:58.34#ibcon#read 6, iclass 40, count 2 2006.229.23:34:58.34#ibcon#end of sib2, iclass 40, count 2 2006.229.23:34:58.34#ibcon#*after write, iclass 40, count 2 2006.229.23:34:58.34#ibcon#*before return 0, iclass 40, count 2 2006.229.23:34:58.34#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:58.34#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:34:58.34#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.23:34:58.34#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:58.34#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:58.46#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:58.46#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:58.46#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:34:58.46#ibcon#first serial, iclass 40, count 0 2006.229.23:34:58.46#ibcon#enter sib2, iclass 40, count 0 2006.229.23:34:58.46#ibcon#flushed, iclass 40, count 0 2006.229.23:34:58.46#ibcon#about to write, iclass 40, count 0 2006.229.23:34:58.46#ibcon#wrote, iclass 40, count 0 2006.229.23:34:58.46#ibcon#about to read 3, iclass 40, count 0 2006.229.23:34:58.48#ibcon#read 3, iclass 40, count 0 2006.229.23:34:58.48#ibcon#about to read 4, iclass 40, count 0 2006.229.23:34:58.48#ibcon#read 4, iclass 40, count 0 2006.229.23:34:58.48#ibcon#about to read 5, iclass 40, count 0 2006.229.23:34:58.48#ibcon#read 5, iclass 40, count 0 2006.229.23:34:58.48#ibcon#about to read 6, iclass 40, count 0 2006.229.23:34:58.48#ibcon#read 6, iclass 40, count 0 2006.229.23:34:58.48#ibcon#end of sib2, iclass 40, count 0 2006.229.23:34:58.48#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:34:58.48#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:34:58.48#ibcon#[27=USB\r\n] 2006.229.23:34:58.48#ibcon#*before write, iclass 40, count 0 2006.229.23:34:58.48#ibcon#enter sib2, iclass 40, count 0 2006.229.23:34:58.48#ibcon#flushed, iclass 40, count 0 2006.229.23:34:58.48#ibcon#about to write, iclass 40, count 0 2006.229.23:34:58.48#ibcon#wrote, iclass 40, count 0 2006.229.23:34:58.48#ibcon#about to read 3, iclass 40, count 0 2006.229.23:34:58.51#ibcon#read 3, iclass 40, count 0 2006.229.23:34:58.51#ibcon#about to read 4, iclass 40, count 0 2006.229.23:34:58.51#ibcon#read 4, iclass 40, count 0 2006.229.23:34:58.51#ibcon#about to read 5, iclass 40, count 0 2006.229.23:34:58.51#ibcon#read 5, iclass 40, count 0 2006.229.23:34:58.51#ibcon#about to read 6, iclass 40, count 0 2006.229.23:34:58.51#ibcon#read 6, iclass 40, count 0 2006.229.23:34:58.51#ibcon#end of sib2, iclass 40, count 0 2006.229.23:34:58.51#ibcon#*after write, iclass 40, count 0 2006.229.23:34:58.51#ibcon#*before return 0, iclass 40, count 0 2006.229.23:34:58.51#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:58.51#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:34:58.51#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:34:58.51#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:34:58.51$vck44/vblo=6,719.99 2006.229.23:34:58.51#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.23:34:58.51#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.23:34:58.51#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:58.51#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:58.51#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:58.51#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:58.51#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:34:58.51#ibcon#first serial, iclass 4, count 0 2006.229.23:34:58.51#ibcon#enter sib2, iclass 4, count 0 2006.229.23:34:58.51#ibcon#flushed, iclass 4, count 0 2006.229.23:34:58.51#ibcon#about to write, iclass 4, count 0 2006.229.23:34:58.51#ibcon#wrote, iclass 4, count 0 2006.229.23:34:58.51#ibcon#about to read 3, iclass 4, count 0 2006.229.23:34:58.53#ibcon#read 3, iclass 4, count 0 2006.229.23:34:58.53#ibcon#about to read 4, iclass 4, count 0 2006.229.23:34:58.53#ibcon#read 4, iclass 4, count 0 2006.229.23:34:58.53#ibcon#about to read 5, iclass 4, count 0 2006.229.23:34:58.53#ibcon#read 5, iclass 4, count 0 2006.229.23:34:58.53#ibcon#about to read 6, iclass 4, count 0 2006.229.23:34:58.53#ibcon#read 6, iclass 4, count 0 2006.229.23:34:58.53#ibcon#end of sib2, iclass 4, count 0 2006.229.23:34:58.53#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:34:58.53#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:34:58.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:34:58.53#ibcon#*before write, iclass 4, count 0 2006.229.23:34:58.53#ibcon#enter sib2, iclass 4, count 0 2006.229.23:34:58.53#ibcon#flushed, iclass 4, count 0 2006.229.23:34:58.53#ibcon#about to write, iclass 4, count 0 2006.229.23:34:58.53#ibcon#wrote, iclass 4, count 0 2006.229.23:34:58.53#ibcon#about to read 3, iclass 4, count 0 2006.229.23:34:58.57#ibcon#read 3, iclass 4, count 0 2006.229.23:34:58.57#ibcon#about to read 4, iclass 4, count 0 2006.229.23:34:58.57#ibcon#read 4, iclass 4, count 0 2006.229.23:34:58.57#ibcon#about to read 5, iclass 4, count 0 2006.229.23:34:58.57#ibcon#read 5, iclass 4, count 0 2006.229.23:34:58.57#ibcon#about to read 6, iclass 4, count 0 2006.229.23:34:58.57#ibcon#read 6, iclass 4, count 0 2006.229.23:34:58.57#ibcon#end of sib2, iclass 4, count 0 2006.229.23:34:58.57#ibcon#*after write, iclass 4, count 0 2006.229.23:34:58.57#ibcon#*before return 0, iclass 4, count 0 2006.229.23:34:58.57#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:58.57#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:34:58.57#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:34:58.57#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:34:58.57$vck44/vb=6,4 2006.229.23:34:58.57#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.23:34:58.57#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.23:34:58.57#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:58.57#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:58.63#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:58.63#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:58.63#ibcon#enter wrdev, iclass 6, count 2 2006.229.23:34:58.63#ibcon#first serial, iclass 6, count 2 2006.229.23:34:58.63#ibcon#enter sib2, iclass 6, count 2 2006.229.23:34:58.63#ibcon#flushed, iclass 6, count 2 2006.229.23:34:58.63#ibcon#about to write, iclass 6, count 2 2006.229.23:34:58.63#ibcon#wrote, iclass 6, count 2 2006.229.23:34:58.63#ibcon#about to read 3, iclass 6, count 2 2006.229.23:34:58.65#ibcon#read 3, iclass 6, count 2 2006.229.23:34:58.65#ibcon#about to read 4, iclass 6, count 2 2006.229.23:34:58.65#ibcon#read 4, iclass 6, count 2 2006.229.23:34:58.65#ibcon#about to read 5, iclass 6, count 2 2006.229.23:34:58.65#ibcon#read 5, iclass 6, count 2 2006.229.23:34:58.65#ibcon#about to read 6, iclass 6, count 2 2006.229.23:34:58.65#ibcon#read 6, iclass 6, count 2 2006.229.23:34:58.65#ibcon#end of sib2, iclass 6, count 2 2006.229.23:34:58.65#ibcon#*mode == 0, iclass 6, count 2 2006.229.23:34:58.65#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.23:34:58.65#ibcon#[27=AT06-04\r\n] 2006.229.23:34:58.65#ibcon#*before write, iclass 6, count 2 2006.229.23:34:58.65#ibcon#enter sib2, iclass 6, count 2 2006.229.23:34:58.65#ibcon#flushed, iclass 6, count 2 2006.229.23:34:58.65#ibcon#about to write, iclass 6, count 2 2006.229.23:34:58.65#ibcon#wrote, iclass 6, count 2 2006.229.23:34:58.65#ibcon#about to read 3, iclass 6, count 2 2006.229.23:34:58.68#ibcon#read 3, iclass 6, count 2 2006.229.23:34:58.68#ibcon#about to read 4, iclass 6, count 2 2006.229.23:34:58.68#ibcon#read 4, iclass 6, count 2 2006.229.23:34:58.68#ibcon#about to read 5, iclass 6, count 2 2006.229.23:34:58.68#ibcon#read 5, iclass 6, count 2 2006.229.23:34:58.68#ibcon#about to read 6, iclass 6, count 2 2006.229.23:34:58.68#ibcon#read 6, iclass 6, count 2 2006.229.23:34:58.68#ibcon#end of sib2, iclass 6, count 2 2006.229.23:34:58.68#ibcon#*after write, iclass 6, count 2 2006.229.23:34:58.68#ibcon#*before return 0, iclass 6, count 2 2006.229.23:34:58.68#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:58.68#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:34:58.68#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.23:34:58.68#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:58.68#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:58.80#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:58.80#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:58.80#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:34:58.80#ibcon#first serial, iclass 6, count 0 2006.229.23:34:58.80#ibcon#enter sib2, iclass 6, count 0 2006.229.23:34:58.80#ibcon#flushed, iclass 6, count 0 2006.229.23:34:58.80#ibcon#about to write, iclass 6, count 0 2006.229.23:34:58.80#ibcon#wrote, iclass 6, count 0 2006.229.23:34:58.80#ibcon#about to read 3, iclass 6, count 0 2006.229.23:34:58.82#ibcon#read 3, iclass 6, count 0 2006.229.23:34:58.82#ibcon#about to read 4, iclass 6, count 0 2006.229.23:34:58.82#ibcon#read 4, iclass 6, count 0 2006.229.23:34:58.82#ibcon#about to read 5, iclass 6, count 0 2006.229.23:34:58.82#ibcon#read 5, iclass 6, count 0 2006.229.23:34:58.82#ibcon#about to read 6, iclass 6, count 0 2006.229.23:34:58.82#ibcon#read 6, iclass 6, count 0 2006.229.23:34:58.82#ibcon#end of sib2, iclass 6, count 0 2006.229.23:34:58.82#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:34:58.82#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:34:58.82#ibcon#[27=USB\r\n] 2006.229.23:34:58.82#ibcon#*before write, iclass 6, count 0 2006.229.23:34:58.82#ibcon#enter sib2, iclass 6, count 0 2006.229.23:34:58.82#ibcon#flushed, iclass 6, count 0 2006.229.23:34:58.82#ibcon#about to write, iclass 6, count 0 2006.229.23:34:58.82#ibcon#wrote, iclass 6, count 0 2006.229.23:34:58.82#ibcon#about to read 3, iclass 6, count 0 2006.229.23:34:58.85#ibcon#read 3, iclass 6, count 0 2006.229.23:34:58.85#ibcon#about to read 4, iclass 6, count 0 2006.229.23:34:58.85#ibcon#read 4, iclass 6, count 0 2006.229.23:34:58.85#ibcon#about to read 5, iclass 6, count 0 2006.229.23:34:58.85#ibcon#read 5, iclass 6, count 0 2006.229.23:34:58.85#ibcon#about to read 6, iclass 6, count 0 2006.229.23:34:58.85#ibcon#read 6, iclass 6, count 0 2006.229.23:34:58.85#ibcon#end of sib2, iclass 6, count 0 2006.229.23:34:58.85#ibcon#*after write, iclass 6, count 0 2006.229.23:34:58.85#ibcon#*before return 0, iclass 6, count 0 2006.229.23:34:58.85#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:58.85#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:34:58.85#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:34:58.85#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:34:58.85$vck44/vblo=7,734.99 2006.229.23:34:58.85#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.23:34:58.85#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.23:34:58.85#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:58.85#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:58.85#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:58.85#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:58.85#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:34:58.85#ibcon#first serial, iclass 10, count 0 2006.229.23:34:58.85#ibcon#enter sib2, iclass 10, count 0 2006.229.23:34:58.85#ibcon#flushed, iclass 10, count 0 2006.229.23:34:58.85#ibcon#about to write, iclass 10, count 0 2006.229.23:34:58.85#ibcon#wrote, iclass 10, count 0 2006.229.23:34:58.85#ibcon#about to read 3, iclass 10, count 0 2006.229.23:34:58.87#ibcon#read 3, iclass 10, count 0 2006.229.23:34:58.87#ibcon#about to read 4, iclass 10, count 0 2006.229.23:34:58.87#ibcon#read 4, iclass 10, count 0 2006.229.23:34:58.87#ibcon#about to read 5, iclass 10, count 0 2006.229.23:34:58.87#ibcon#read 5, iclass 10, count 0 2006.229.23:34:58.87#ibcon#about to read 6, iclass 10, count 0 2006.229.23:34:58.87#ibcon#read 6, iclass 10, count 0 2006.229.23:34:58.87#ibcon#end of sib2, iclass 10, count 0 2006.229.23:34:58.87#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:34:58.87#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:34:58.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:34:58.87#ibcon#*before write, iclass 10, count 0 2006.229.23:34:58.87#ibcon#enter sib2, iclass 10, count 0 2006.229.23:34:58.87#ibcon#flushed, iclass 10, count 0 2006.229.23:34:58.87#ibcon#about to write, iclass 10, count 0 2006.229.23:34:58.87#ibcon#wrote, iclass 10, count 0 2006.229.23:34:58.87#ibcon#about to read 3, iclass 10, count 0 2006.229.23:34:58.91#ibcon#read 3, iclass 10, count 0 2006.229.23:34:58.91#ibcon#about to read 4, iclass 10, count 0 2006.229.23:34:58.91#ibcon#read 4, iclass 10, count 0 2006.229.23:34:58.91#ibcon#about to read 5, iclass 10, count 0 2006.229.23:34:58.91#ibcon#read 5, iclass 10, count 0 2006.229.23:34:58.91#ibcon#about to read 6, iclass 10, count 0 2006.229.23:34:58.91#ibcon#read 6, iclass 10, count 0 2006.229.23:34:58.91#ibcon#end of sib2, iclass 10, count 0 2006.229.23:34:58.91#ibcon#*after write, iclass 10, count 0 2006.229.23:34:58.91#ibcon#*before return 0, iclass 10, count 0 2006.229.23:34:58.91#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:58.91#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:34:58.91#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:34:58.91#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:34:58.91$vck44/vb=7,4 2006.229.23:34:58.91#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.23:34:58.91#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.23:34:58.91#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:58.91#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:58.97#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:58.97#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:58.97#ibcon#enter wrdev, iclass 12, count 2 2006.229.23:34:58.97#ibcon#first serial, iclass 12, count 2 2006.229.23:34:58.97#ibcon#enter sib2, iclass 12, count 2 2006.229.23:34:58.97#ibcon#flushed, iclass 12, count 2 2006.229.23:34:58.97#ibcon#about to write, iclass 12, count 2 2006.229.23:34:58.97#ibcon#wrote, iclass 12, count 2 2006.229.23:34:58.97#ibcon#about to read 3, iclass 12, count 2 2006.229.23:34:58.99#ibcon#read 3, iclass 12, count 2 2006.229.23:34:58.99#ibcon#about to read 4, iclass 12, count 2 2006.229.23:34:58.99#ibcon#read 4, iclass 12, count 2 2006.229.23:34:58.99#ibcon#about to read 5, iclass 12, count 2 2006.229.23:34:58.99#ibcon#read 5, iclass 12, count 2 2006.229.23:34:58.99#ibcon#about to read 6, iclass 12, count 2 2006.229.23:34:58.99#ibcon#read 6, iclass 12, count 2 2006.229.23:34:58.99#ibcon#end of sib2, iclass 12, count 2 2006.229.23:34:58.99#ibcon#*mode == 0, iclass 12, count 2 2006.229.23:34:58.99#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.23:34:58.99#ibcon#[27=AT07-04\r\n] 2006.229.23:34:58.99#ibcon#*before write, iclass 12, count 2 2006.229.23:34:58.99#ibcon#enter sib2, iclass 12, count 2 2006.229.23:34:58.99#ibcon#flushed, iclass 12, count 2 2006.229.23:34:58.99#ibcon#about to write, iclass 12, count 2 2006.229.23:34:58.99#ibcon#wrote, iclass 12, count 2 2006.229.23:34:58.99#ibcon#about to read 3, iclass 12, count 2 2006.229.23:34:59.02#ibcon#read 3, iclass 12, count 2 2006.229.23:34:59.02#ibcon#about to read 4, iclass 12, count 2 2006.229.23:34:59.02#ibcon#read 4, iclass 12, count 2 2006.229.23:34:59.02#ibcon#about to read 5, iclass 12, count 2 2006.229.23:34:59.02#ibcon#read 5, iclass 12, count 2 2006.229.23:34:59.02#ibcon#about to read 6, iclass 12, count 2 2006.229.23:34:59.02#ibcon#read 6, iclass 12, count 2 2006.229.23:34:59.02#ibcon#end of sib2, iclass 12, count 2 2006.229.23:34:59.02#ibcon#*after write, iclass 12, count 2 2006.229.23:34:59.02#ibcon#*before return 0, iclass 12, count 2 2006.229.23:34:59.02#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:59.02#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:34:59.02#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.23:34:59.02#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:59.02#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:59.14#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:59.14#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:59.14#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:34:59.14#ibcon#first serial, iclass 12, count 0 2006.229.23:34:59.14#ibcon#enter sib2, iclass 12, count 0 2006.229.23:34:59.14#ibcon#flushed, iclass 12, count 0 2006.229.23:34:59.14#ibcon#about to write, iclass 12, count 0 2006.229.23:34:59.14#ibcon#wrote, iclass 12, count 0 2006.229.23:34:59.14#ibcon#about to read 3, iclass 12, count 0 2006.229.23:34:59.16#ibcon#read 3, iclass 12, count 0 2006.229.23:34:59.16#ibcon#about to read 4, iclass 12, count 0 2006.229.23:34:59.16#ibcon#read 4, iclass 12, count 0 2006.229.23:34:59.16#ibcon#about to read 5, iclass 12, count 0 2006.229.23:34:59.16#ibcon#read 5, iclass 12, count 0 2006.229.23:34:59.16#ibcon#about to read 6, iclass 12, count 0 2006.229.23:34:59.16#ibcon#read 6, iclass 12, count 0 2006.229.23:34:59.16#ibcon#end of sib2, iclass 12, count 0 2006.229.23:34:59.16#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:34:59.16#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:34:59.16#ibcon#[27=USB\r\n] 2006.229.23:34:59.16#ibcon#*before write, iclass 12, count 0 2006.229.23:34:59.16#ibcon#enter sib2, iclass 12, count 0 2006.229.23:34:59.16#ibcon#flushed, iclass 12, count 0 2006.229.23:34:59.16#ibcon#about to write, iclass 12, count 0 2006.229.23:34:59.16#ibcon#wrote, iclass 12, count 0 2006.229.23:34:59.16#ibcon#about to read 3, iclass 12, count 0 2006.229.23:34:59.19#ibcon#read 3, iclass 12, count 0 2006.229.23:34:59.19#ibcon#about to read 4, iclass 12, count 0 2006.229.23:34:59.19#ibcon#read 4, iclass 12, count 0 2006.229.23:34:59.19#ibcon#about to read 5, iclass 12, count 0 2006.229.23:34:59.19#ibcon#read 5, iclass 12, count 0 2006.229.23:34:59.19#ibcon#about to read 6, iclass 12, count 0 2006.229.23:34:59.19#ibcon#read 6, iclass 12, count 0 2006.229.23:34:59.19#ibcon#end of sib2, iclass 12, count 0 2006.229.23:34:59.19#ibcon#*after write, iclass 12, count 0 2006.229.23:34:59.19#ibcon#*before return 0, iclass 12, count 0 2006.229.23:34:59.19#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:59.19#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:34:59.19#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:34:59.19#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:34:59.19$vck44/vblo=8,744.99 2006.229.23:34:59.19#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.23:34:59.19#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.23:34:59.19#ibcon#ireg 17 cls_cnt 0 2006.229.23:34:59.19#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:59.19#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:59.19#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:59.19#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:34:59.19#ibcon#first serial, iclass 14, count 0 2006.229.23:34:59.19#ibcon#enter sib2, iclass 14, count 0 2006.229.23:34:59.19#ibcon#flushed, iclass 14, count 0 2006.229.23:34:59.19#ibcon#about to write, iclass 14, count 0 2006.229.23:34:59.19#ibcon#wrote, iclass 14, count 0 2006.229.23:34:59.19#ibcon#about to read 3, iclass 14, count 0 2006.229.23:34:59.21#ibcon#read 3, iclass 14, count 0 2006.229.23:34:59.21#ibcon#about to read 4, iclass 14, count 0 2006.229.23:34:59.21#ibcon#read 4, iclass 14, count 0 2006.229.23:34:59.21#ibcon#about to read 5, iclass 14, count 0 2006.229.23:34:59.21#ibcon#read 5, iclass 14, count 0 2006.229.23:34:59.21#ibcon#about to read 6, iclass 14, count 0 2006.229.23:34:59.21#ibcon#read 6, iclass 14, count 0 2006.229.23:34:59.21#ibcon#end of sib2, iclass 14, count 0 2006.229.23:34:59.21#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:34:59.21#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:34:59.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:34:59.21#ibcon#*before write, iclass 14, count 0 2006.229.23:34:59.21#ibcon#enter sib2, iclass 14, count 0 2006.229.23:34:59.21#ibcon#flushed, iclass 14, count 0 2006.229.23:34:59.21#ibcon#about to write, iclass 14, count 0 2006.229.23:34:59.21#ibcon#wrote, iclass 14, count 0 2006.229.23:34:59.21#ibcon#about to read 3, iclass 14, count 0 2006.229.23:34:59.25#ibcon#read 3, iclass 14, count 0 2006.229.23:34:59.25#ibcon#about to read 4, iclass 14, count 0 2006.229.23:34:59.25#ibcon#read 4, iclass 14, count 0 2006.229.23:34:59.25#ibcon#about to read 5, iclass 14, count 0 2006.229.23:34:59.25#ibcon#read 5, iclass 14, count 0 2006.229.23:34:59.25#ibcon#about to read 6, iclass 14, count 0 2006.229.23:34:59.25#ibcon#read 6, iclass 14, count 0 2006.229.23:34:59.25#ibcon#end of sib2, iclass 14, count 0 2006.229.23:34:59.25#ibcon#*after write, iclass 14, count 0 2006.229.23:34:59.25#ibcon#*before return 0, iclass 14, count 0 2006.229.23:34:59.25#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:59.25#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:34:59.25#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:34:59.25#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:34:59.25$vck44/vb=8,4 2006.229.23:34:59.25#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.23:34:59.25#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.23:34:59.25#ibcon#ireg 11 cls_cnt 2 2006.229.23:34:59.25#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:59.31#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:59.31#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:59.31#ibcon#enter wrdev, iclass 16, count 2 2006.229.23:34:59.31#ibcon#first serial, iclass 16, count 2 2006.229.23:34:59.31#ibcon#enter sib2, iclass 16, count 2 2006.229.23:34:59.31#ibcon#flushed, iclass 16, count 2 2006.229.23:34:59.31#ibcon#about to write, iclass 16, count 2 2006.229.23:34:59.31#ibcon#wrote, iclass 16, count 2 2006.229.23:34:59.31#ibcon#about to read 3, iclass 16, count 2 2006.229.23:34:59.33#ibcon#read 3, iclass 16, count 2 2006.229.23:34:59.33#ibcon#about to read 4, iclass 16, count 2 2006.229.23:34:59.33#ibcon#read 4, iclass 16, count 2 2006.229.23:34:59.33#ibcon#about to read 5, iclass 16, count 2 2006.229.23:34:59.33#ibcon#read 5, iclass 16, count 2 2006.229.23:34:59.33#ibcon#about to read 6, iclass 16, count 2 2006.229.23:34:59.33#ibcon#read 6, iclass 16, count 2 2006.229.23:34:59.33#ibcon#end of sib2, iclass 16, count 2 2006.229.23:34:59.33#ibcon#*mode == 0, iclass 16, count 2 2006.229.23:34:59.33#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.23:34:59.33#ibcon#[27=AT08-04\r\n] 2006.229.23:34:59.33#ibcon#*before write, iclass 16, count 2 2006.229.23:34:59.33#ibcon#enter sib2, iclass 16, count 2 2006.229.23:34:59.33#ibcon#flushed, iclass 16, count 2 2006.229.23:34:59.33#ibcon#about to write, iclass 16, count 2 2006.229.23:34:59.33#ibcon#wrote, iclass 16, count 2 2006.229.23:34:59.33#ibcon#about to read 3, iclass 16, count 2 2006.229.23:34:59.36#ibcon#read 3, iclass 16, count 2 2006.229.23:34:59.36#ibcon#about to read 4, iclass 16, count 2 2006.229.23:34:59.36#ibcon#read 4, iclass 16, count 2 2006.229.23:34:59.36#ibcon#about to read 5, iclass 16, count 2 2006.229.23:34:59.36#ibcon#read 5, iclass 16, count 2 2006.229.23:34:59.36#ibcon#about to read 6, iclass 16, count 2 2006.229.23:34:59.36#ibcon#read 6, iclass 16, count 2 2006.229.23:34:59.36#ibcon#end of sib2, iclass 16, count 2 2006.229.23:34:59.36#ibcon#*after write, iclass 16, count 2 2006.229.23:34:59.36#ibcon#*before return 0, iclass 16, count 2 2006.229.23:34:59.36#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:59.36#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:34:59.36#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.23:34:59.36#ibcon#ireg 7 cls_cnt 0 2006.229.23:34:59.36#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:59.48#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:59.48#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:59.48#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:34:59.48#ibcon#first serial, iclass 16, count 0 2006.229.23:34:59.48#ibcon#enter sib2, iclass 16, count 0 2006.229.23:34:59.48#ibcon#flushed, iclass 16, count 0 2006.229.23:34:59.48#ibcon#about to write, iclass 16, count 0 2006.229.23:34:59.48#ibcon#wrote, iclass 16, count 0 2006.229.23:34:59.48#ibcon#about to read 3, iclass 16, count 0 2006.229.23:34:59.50#ibcon#read 3, iclass 16, count 0 2006.229.23:34:59.50#ibcon#about to read 4, iclass 16, count 0 2006.229.23:34:59.50#ibcon#read 4, iclass 16, count 0 2006.229.23:34:59.50#ibcon#about to read 5, iclass 16, count 0 2006.229.23:34:59.50#ibcon#read 5, iclass 16, count 0 2006.229.23:34:59.50#ibcon#about to read 6, iclass 16, count 0 2006.229.23:34:59.50#ibcon#read 6, iclass 16, count 0 2006.229.23:34:59.50#ibcon#end of sib2, iclass 16, count 0 2006.229.23:34:59.50#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:34:59.50#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:34:59.50#ibcon#[27=USB\r\n] 2006.229.23:34:59.50#ibcon#*before write, iclass 16, count 0 2006.229.23:34:59.50#ibcon#enter sib2, iclass 16, count 0 2006.229.23:34:59.50#ibcon#flushed, iclass 16, count 0 2006.229.23:34:59.50#ibcon#about to write, iclass 16, count 0 2006.229.23:34:59.50#ibcon#wrote, iclass 16, count 0 2006.229.23:34:59.50#ibcon#about to read 3, iclass 16, count 0 2006.229.23:34:59.53#ibcon#read 3, iclass 16, count 0 2006.229.23:34:59.53#ibcon#about to read 4, iclass 16, count 0 2006.229.23:34:59.53#ibcon#read 4, iclass 16, count 0 2006.229.23:34:59.53#ibcon#about to read 5, iclass 16, count 0 2006.229.23:34:59.53#ibcon#read 5, iclass 16, count 0 2006.229.23:34:59.53#ibcon#about to read 6, iclass 16, count 0 2006.229.23:34:59.53#ibcon#read 6, iclass 16, count 0 2006.229.23:34:59.53#ibcon#end of sib2, iclass 16, count 0 2006.229.23:34:59.53#ibcon#*after write, iclass 16, count 0 2006.229.23:34:59.53#ibcon#*before return 0, iclass 16, count 0 2006.229.23:34:59.53#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:59.53#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:34:59.53#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:34:59.53#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:34:59.53$vck44/vabw=wide 2006.229.23:34:59.53#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.23:34:59.53#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.23:34:59.53#ibcon#ireg 8 cls_cnt 0 2006.229.23:34:59.53#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:59.53#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:59.53#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:59.53#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:34:59.53#ibcon#first serial, iclass 18, count 0 2006.229.23:34:59.53#ibcon#enter sib2, iclass 18, count 0 2006.229.23:34:59.53#ibcon#flushed, iclass 18, count 0 2006.229.23:34:59.53#ibcon#about to write, iclass 18, count 0 2006.229.23:34:59.53#ibcon#wrote, iclass 18, count 0 2006.229.23:34:59.53#ibcon#about to read 3, iclass 18, count 0 2006.229.23:34:59.55#ibcon#read 3, iclass 18, count 0 2006.229.23:34:59.55#ibcon#about to read 4, iclass 18, count 0 2006.229.23:34:59.55#ibcon#read 4, iclass 18, count 0 2006.229.23:34:59.55#ibcon#about to read 5, iclass 18, count 0 2006.229.23:34:59.55#ibcon#read 5, iclass 18, count 0 2006.229.23:34:59.55#ibcon#about to read 6, iclass 18, count 0 2006.229.23:34:59.55#ibcon#read 6, iclass 18, count 0 2006.229.23:34:59.55#ibcon#end of sib2, iclass 18, count 0 2006.229.23:34:59.55#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:34:59.55#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:34:59.55#ibcon#[25=BW32\r\n] 2006.229.23:34:59.55#ibcon#*before write, iclass 18, count 0 2006.229.23:34:59.55#ibcon#enter sib2, iclass 18, count 0 2006.229.23:34:59.55#ibcon#flushed, iclass 18, count 0 2006.229.23:34:59.55#ibcon#about to write, iclass 18, count 0 2006.229.23:34:59.55#ibcon#wrote, iclass 18, count 0 2006.229.23:34:59.55#ibcon#about to read 3, iclass 18, count 0 2006.229.23:34:59.58#ibcon#read 3, iclass 18, count 0 2006.229.23:34:59.58#ibcon#about to read 4, iclass 18, count 0 2006.229.23:34:59.58#ibcon#read 4, iclass 18, count 0 2006.229.23:34:59.58#ibcon#about to read 5, iclass 18, count 0 2006.229.23:34:59.58#ibcon#read 5, iclass 18, count 0 2006.229.23:34:59.58#ibcon#about to read 6, iclass 18, count 0 2006.229.23:34:59.58#ibcon#read 6, iclass 18, count 0 2006.229.23:34:59.58#ibcon#end of sib2, iclass 18, count 0 2006.229.23:34:59.58#ibcon#*after write, iclass 18, count 0 2006.229.23:34:59.58#ibcon#*before return 0, iclass 18, count 0 2006.229.23:34:59.58#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:59.58#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:34:59.58#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:34:59.58#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:34:59.58$vck44/vbbw=wide 2006.229.23:34:59.58#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.23:34:59.58#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.23:34:59.58#ibcon#ireg 8 cls_cnt 0 2006.229.23:34:59.58#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:34:59.65#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:34:59.65#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:34:59.65#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:34:59.65#ibcon#first serial, iclass 20, count 0 2006.229.23:34:59.65#ibcon#enter sib2, iclass 20, count 0 2006.229.23:34:59.65#ibcon#flushed, iclass 20, count 0 2006.229.23:34:59.65#ibcon#about to write, iclass 20, count 0 2006.229.23:34:59.65#ibcon#wrote, iclass 20, count 0 2006.229.23:34:59.65#ibcon#about to read 3, iclass 20, count 0 2006.229.23:34:59.67#ibcon#read 3, iclass 20, count 0 2006.229.23:34:59.67#ibcon#about to read 4, iclass 20, count 0 2006.229.23:34:59.67#ibcon#read 4, iclass 20, count 0 2006.229.23:34:59.67#ibcon#about to read 5, iclass 20, count 0 2006.229.23:34:59.67#ibcon#read 5, iclass 20, count 0 2006.229.23:34:59.67#ibcon#about to read 6, iclass 20, count 0 2006.229.23:34:59.67#ibcon#read 6, iclass 20, count 0 2006.229.23:34:59.67#ibcon#end of sib2, iclass 20, count 0 2006.229.23:34:59.67#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:34:59.67#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:34:59.67#ibcon#[27=BW32\r\n] 2006.229.23:34:59.67#ibcon#*before write, iclass 20, count 0 2006.229.23:34:59.67#ibcon#enter sib2, iclass 20, count 0 2006.229.23:34:59.67#ibcon#flushed, iclass 20, count 0 2006.229.23:34:59.67#ibcon#about to write, iclass 20, count 0 2006.229.23:34:59.67#ibcon#wrote, iclass 20, count 0 2006.229.23:34:59.67#ibcon#about to read 3, iclass 20, count 0 2006.229.23:34:59.70#ibcon#read 3, iclass 20, count 0 2006.229.23:34:59.70#ibcon#about to read 4, iclass 20, count 0 2006.229.23:34:59.70#ibcon#read 4, iclass 20, count 0 2006.229.23:34:59.70#ibcon#about to read 5, iclass 20, count 0 2006.229.23:34:59.70#ibcon#read 5, iclass 20, count 0 2006.229.23:34:59.70#ibcon#about to read 6, iclass 20, count 0 2006.229.23:34:59.70#ibcon#read 6, iclass 20, count 0 2006.229.23:34:59.70#ibcon#end of sib2, iclass 20, count 0 2006.229.23:34:59.70#ibcon#*after write, iclass 20, count 0 2006.229.23:34:59.70#ibcon#*before return 0, iclass 20, count 0 2006.229.23:34:59.70#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:34:59.70#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:34:59.70#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:34:59.70#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:34:59.70$setupk4/ifdk4 2006.229.23:34:59.70$ifdk4/lo= 2006.229.23:34:59.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:34:59.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:34:59.70$ifdk4/patch= 2006.229.23:34:59.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:34:59.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:34:59.70$setupk4/!*+20s 2006.229.23:35:02.17#abcon#<5=/08 1.5 5.0 29.96 831002.6\r\n> 2006.229.23:35:02.19#abcon#{5=INTERFACE CLEAR} 2006.229.23:35:02.25#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:35:12.34#abcon#<5=/08 1.5 5.0 29.96 841002.6\r\n> 2006.229.23:35:12.36#abcon#{5=INTERFACE CLEAR} 2006.229.23:35:12.42#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:35:14.20$setupk4/"tpicd 2006.229.23:35:14.20$setupk4/echo=off 2006.229.23:35:14.20$setupk4/xlog=off 2006.229.23:35:14.20:!2006.229.23:36:34 2006.229.23:35:15.14#trakl#Source acquired 2006.229.23:35:16.14#flagr#flagr/antenna,acquired 2006.229.23:36:34.00:preob 2006.229.23:36:35.13/onsource/TRACKING 2006.229.23:36:35.13:!2006.229.23:36:44 2006.229.23:36:44.00:"tape 2006.229.23:36:44.00:"st=record 2006.229.23:36:44.00:data_valid=on 2006.229.23:36:44.00:midob 2006.229.23:36:44.13/onsource/TRACKING 2006.229.23:36:44.13/wx/30.05,1002.6,82 2006.229.23:36:44.18/cable/+6.4102E-03 2006.229.23:36:45.27/va/01,08,usb,yes,28,31 2006.229.23:36:45.27/va/02,07,usb,yes,31,31 2006.229.23:36:45.27/va/03,06,usb,yes,38,41 2006.229.23:36:45.27/va/04,07,usb,yes,32,33 2006.229.23:36:45.27/va/05,04,usb,yes,28,29 2006.229.23:36:45.27/va/06,04,usb,yes,32,32 2006.229.23:36:45.27/va/07,05,usb,yes,28,29 2006.229.23:36:45.27/va/08,06,usb,yes,20,25 2006.229.23:36:45.50/valo/01,524.99,yes,locked 2006.229.23:36:45.50/valo/02,534.99,yes,locked 2006.229.23:36:45.50/valo/03,564.99,yes,locked 2006.229.23:36:45.50/valo/04,624.99,yes,locked 2006.229.23:36:45.50/valo/05,734.99,yes,locked 2006.229.23:36:45.50/valo/06,814.99,yes,locked 2006.229.23:36:45.50/valo/07,864.99,yes,locked 2006.229.23:36:45.50/valo/08,884.99,yes,locked 2006.229.23:36:46.59/vb/01,04,usb,yes,30,28 2006.229.23:36:46.59/vb/02,04,usb,yes,33,33 2006.229.23:36:46.59/vb/03,04,usb,yes,30,33 2006.229.23:36:46.59/vb/04,04,usb,yes,34,33 2006.229.23:36:46.59/vb/05,04,usb,yes,27,29 2006.229.23:36:46.59/vb/06,04,usb,yes,31,27 2006.229.23:36:46.59/vb/07,04,usb,yes,31,31 2006.229.23:36:46.59/vb/08,04,usb,yes,28,32 2006.229.23:36:46.83/vblo/01,629.99,yes,locked 2006.229.23:36:46.83/vblo/02,634.99,yes,locked 2006.229.23:36:46.83/vblo/03,649.99,yes,locked 2006.229.23:36:46.83/vblo/04,679.99,yes,locked 2006.229.23:36:46.83/vblo/05,709.99,yes,locked 2006.229.23:36:46.83/vblo/06,719.99,yes,locked 2006.229.23:36:46.83/vblo/07,734.99,yes,locked 2006.229.23:36:46.83/vblo/08,744.99,yes,locked 2006.229.23:36:46.98/vabw/8 2006.229.23:36:47.13/vbbw/8 2006.229.23:36:47.22/xfe/off,on,12.0 2006.229.23:36:47.59/ifatt/23,28,28,28 2006.229.23:36:48.08/fmout-gps/S +4.57E-07 2006.229.23:36:48.12:!2006.229.23:38:24 2006.229.23:38:24.00:data_valid=off 2006.229.23:38:24.00:"et 2006.229.23:38:24.00:!+3s 2006.229.23:38:27.01:"tape 2006.229.23:38:27.01:postob 2006.229.23:38:27.17/cable/+6.4087E-03 2006.229.23:38:27.17/wx/30.12,1002.6,83 2006.229.23:38:28.08/fmout-gps/S +4.56E-07 2006.229.23:38:28.08:scan_name=229-2340,jd0608,160 2006.229.23:38:28.08:source=0059+581,010245.76,582411.1,2000.0,cw 2006.229.23:38:29.14#flagr#flagr/antenna,new-source 2006.229.23:38:29.14:checkk5 2006.229.23:38:29.54/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:38:29.96/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:38:30.36/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:38:30.76/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:38:31.15/chk_obsdata//k5ts1/T2292336??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.23:38:31.55/chk_obsdata//k5ts2/T2292336??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.23:38:31.95/chk_obsdata//k5ts3/T2292336??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.23:38:32.36/chk_obsdata//k5ts4/T2292336??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.229.23:38:33.11/k5log//k5ts1_log_newline 2006.229.23:38:33.84/k5log//k5ts2_log_newline 2006.229.23:38:34.57/k5log//k5ts3_log_newline 2006.229.23:38:35.33/k5log//k5ts4_log_newline 2006.229.23:38:35.35/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:38:35.35:setupk4=1 2006.229.23:38:35.35$setupk4/echo=on 2006.229.23:38:35.35$setupk4/pcalon 2006.229.23:38:35.35$pcalon/"no phase cal control is implemented here 2006.229.23:38:35.35$setupk4/"tpicd=stop 2006.229.23:38:35.35$setupk4/"rec=synch_on 2006.229.23:38:35.35$setupk4/"rec_mode=128 2006.229.23:38:35.35$setupk4/!* 2006.229.23:38:35.35$setupk4/recpk4 2006.229.23:38:35.35$recpk4/recpatch= 2006.229.23:38:35.35$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:38:35.35$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:38:35.35$setupk4/vck44 2006.229.23:38:35.35$vck44/valo=1,524.99 2006.229.23:38:35.35#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.23:38:35.35#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.23:38:35.35#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:35.35#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:35.35#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:35.35#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:35.35#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:38:35.35#ibcon#first serial, iclass 37, count 0 2006.229.23:38:35.35#ibcon#enter sib2, iclass 37, count 0 2006.229.23:38:35.35#ibcon#flushed, iclass 37, count 0 2006.229.23:38:35.35#ibcon#about to write, iclass 37, count 0 2006.229.23:38:35.35#ibcon#wrote, iclass 37, count 0 2006.229.23:38:35.35#ibcon#about to read 3, iclass 37, count 0 2006.229.23:38:35.37#ibcon#read 3, iclass 37, count 0 2006.229.23:38:35.37#ibcon#about to read 4, iclass 37, count 0 2006.229.23:38:35.37#ibcon#read 4, iclass 37, count 0 2006.229.23:38:35.37#ibcon#about to read 5, iclass 37, count 0 2006.229.23:38:35.37#ibcon#read 5, iclass 37, count 0 2006.229.23:38:35.37#ibcon#about to read 6, iclass 37, count 0 2006.229.23:38:35.37#ibcon#read 6, iclass 37, count 0 2006.229.23:38:35.37#ibcon#end of sib2, iclass 37, count 0 2006.229.23:38:35.37#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:38:35.37#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:38:35.37#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:38:35.37#ibcon#*before write, iclass 37, count 0 2006.229.23:38:35.37#ibcon#enter sib2, iclass 37, count 0 2006.229.23:38:35.37#ibcon#flushed, iclass 37, count 0 2006.229.23:38:35.37#ibcon#about to write, iclass 37, count 0 2006.229.23:38:35.37#ibcon#wrote, iclass 37, count 0 2006.229.23:38:35.37#ibcon#about to read 3, iclass 37, count 0 2006.229.23:38:35.42#ibcon#read 3, iclass 37, count 0 2006.229.23:38:35.42#ibcon#about to read 4, iclass 37, count 0 2006.229.23:38:35.42#ibcon#read 4, iclass 37, count 0 2006.229.23:38:35.42#ibcon#about to read 5, iclass 37, count 0 2006.229.23:38:35.42#ibcon#read 5, iclass 37, count 0 2006.229.23:38:35.42#ibcon#about to read 6, iclass 37, count 0 2006.229.23:38:35.42#ibcon#read 6, iclass 37, count 0 2006.229.23:38:35.42#ibcon#end of sib2, iclass 37, count 0 2006.229.23:38:35.42#ibcon#*after write, iclass 37, count 0 2006.229.23:38:35.42#ibcon#*before return 0, iclass 37, count 0 2006.229.23:38:35.42#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:35.42#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:35.42#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:38:35.42#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:38:35.42$vck44/va=1,8 2006.229.23:38:35.42#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.23:38:35.42#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.23:38:35.42#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:35.42#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:35.42#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:35.42#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:35.42#ibcon#enter wrdev, iclass 39, count 2 2006.229.23:38:35.42#ibcon#first serial, iclass 39, count 2 2006.229.23:38:35.42#ibcon#enter sib2, iclass 39, count 2 2006.229.23:38:35.42#ibcon#flushed, iclass 39, count 2 2006.229.23:38:35.42#ibcon#about to write, iclass 39, count 2 2006.229.23:38:35.42#ibcon#wrote, iclass 39, count 2 2006.229.23:38:35.42#ibcon#about to read 3, iclass 39, count 2 2006.229.23:38:35.44#ibcon#read 3, iclass 39, count 2 2006.229.23:38:35.44#ibcon#about to read 4, iclass 39, count 2 2006.229.23:38:35.44#ibcon#read 4, iclass 39, count 2 2006.229.23:38:35.44#ibcon#about to read 5, iclass 39, count 2 2006.229.23:38:35.44#ibcon#read 5, iclass 39, count 2 2006.229.23:38:35.44#ibcon#about to read 6, iclass 39, count 2 2006.229.23:38:35.44#ibcon#read 6, iclass 39, count 2 2006.229.23:38:35.44#ibcon#end of sib2, iclass 39, count 2 2006.229.23:38:35.44#ibcon#*mode == 0, iclass 39, count 2 2006.229.23:38:35.44#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.23:38:35.44#ibcon#[25=AT01-08\r\n] 2006.229.23:38:35.44#ibcon#*before write, iclass 39, count 2 2006.229.23:38:35.44#ibcon#enter sib2, iclass 39, count 2 2006.229.23:38:35.44#ibcon#flushed, iclass 39, count 2 2006.229.23:38:35.44#ibcon#about to write, iclass 39, count 2 2006.229.23:38:35.44#ibcon#wrote, iclass 39, count 2 2006.229.23:38:35.44#ibcon#about to read 3, iclass 39, count 2 2006.229.23:38:35.47#ibcon#read 3, iclass 39, count 2 2006.229.23:38:35.47#ibcon#about to read 4, iclass 39, count 2 2006.229.23:38:35.47#ibcon#read 4, iclass 39, count 2 2006.229.23:38:35.47#ibcon#about to read 5, iclass 39, count 2 2006.229.23:38:35.47#ibcon#read 5, iclass 39, count 2 2006.229.23:38:35.47#ibcon#about to read 6, iclass 39, count 2 2006.229.23:38:35.47#ibcon#read 6, iclass 39, count 2 2006.229.23:38:35.47#ibcon#end of sib2, iclass 39, count 2 2006.229.23:38:35.47#ibcon#*after write, iclass 39, count 2 2006.229.23:38:35.47#ibcon#*before return 0, iclass 39, count 2 2006.229.23:38:35.47#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:35.47#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:35.47#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.23:38:35.47#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:35.47#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:35.59#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:35.59#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:35.59#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:38:35.59#ibcon#first serial, iclass 39, count 0 2006.229.23:38:35.59#ibcon#enter sib2, iclass 39, count 0 2006.229.23:38:35.59#ibcon#flushed, iclass 39, count 0 2006.229.23:38:35.59#ibcon#about to write, iclass 39, count 0 2006.229.23:38:35.59#ibcon#wrote, iclass 39, count 0 2006.229.23:38:35.59#ibcon#about to read 3, iclass 39, count 0 2006.229.23:38:35.61#ibcon#read 3, iclass 39, count 0 2006.229.23:38:35.61#ibcon#about to read 4, iclass 39, count 0 2006.229.23:38:35.61#ibcon#read 4, iclass 39, count 0 2006.229.23:38:35.61#ibcon#about to read 5, iclass 39, count 0 2006.229.23:38:35.61#ibcon#read 5, iclass 39, count 0 2006.229.23:38:35.61#ibcon#about to read 6, iclass 39, count 0 2006.229.23:38:35.61#ibcon#read 6, iclass 39, count 0 2006.229.23:38:35.61#ibcon#end of sib2, iclass 39, count 0 2006.229.23:38:35.61#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:38:35.61#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:38:35.61#ibcon#[25=USB\r\n] 2006.229.23:38:35.61#ibcon#*before write, iclass 39, count 0 2006.229.23:38:35.61#ibcon#enter sib2, iclass 39, count 0 2006.229.23:38:35.61#ibcon#flushed, iclass 39, count 0 2006.229.23:38:35.61#ibcon#about to write, iclass 39, count 0 2006.229.23:38:35.61#ibcon#wrote, iclass 39, count 0 2006.229.23:38:35.61#ibcon#about to read 3, iclass 39, count 0 2006.229.23:38:35.64#ibcon#read 3, iclass 39, count 0 2006.229.23:38:35.64#ibcon#about to read 4, iclass 39, count 0 2006.229.23:38:35.64#ibcon#read 4, iclass 39, count 0 2006.229.23:38:35.64#ibcon#about to read 5, iclass 39, count 0 2006.229.23:38:35.64#ibcon#read 5, iclass 39, count 0 2006.229.23:38:35.64#ibcon#about to read 6, iclass 39, count 0 2006.229.23:38:35.64#ibcon#read 6, iclass 39, count 0 2006.229.23:38:35.64#ibcon#end of sib2, iclass 39, count 0 2006.229.23:38:35.64#ibcon#*after write, iclass 39, count 0 2006.229.23:38:35.64#ibcon#*before return 0, iclass 39, count 0 2006.229.23:38:35.64#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:35.64#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:35.64#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:38:35.64#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:38:35.64$vck44/valo=2,534.99 2006.229.23:38:35.64#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.23:38:35.64#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.23:38:35.64#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:35.64#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:35.64#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:35.64#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:35.64#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:38:35.64#ibcon#first serial, iclass 3, count 0 2006.229.23:38:35.64#ibcon#enter sib2, iclass 3, count 0 2006.229.23:38:35.64#ibcon#flushed, iclass 3, count 0 2006.229.23:38:35.64#ibcon#about to write, iclass 3, count 0 2006.229.23:38:35.64#ibcon#wrote, iclass 3, count 0 2006.229.23:38:35.64#ibcon#about to read 3, iclass 3, count 0 2006.229.23:38:35.66#ibcon#read 3, iclass 3, count 0 2006.229.23:38:35.66#ibcon#about to read 4, iclass 3, count 0 2006.229.23:38:35.66#ibcon#read 4, iclass 3, count 0 2006.229.23:38:35.66#ibcon#about to read 5, iclass 3, count 0 2006.229.23:38:35.66#ibcon#read 5, iclass 3, count 0 2006.229.23:38:35.66#ibcon#about to read 6, iclass 3, count 0 2006.229.23:38:35.66#ibcon#read 6, iclass 3, count 0 2006.229.23:38:35.66#ibcon#end of sib2, iclass 3, count 0 2006.229.23:38:35.66#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:38:35.66#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:38:35.66#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:38:35.66#ibcon#*before write, iclass 3, count 0 2006.229.23:38:35.66#ibcon#enter sib2, iclass 3, count 0 2006.229.23:38:35.66#ibcon#flushed, iclass 3, count 0 2006.229.23:38:35.66#ibcon#about to write, iclass 3, count 0 2006.229.23:38:35.66#ibcon#wrote, iclass 3, count 0 2006.229.23:38:35.66#ibcon#about to read 3, iclass 3, count 0 2006.229.23:38:35.70#ibcon#read 3, iclass 3, count 0 2006.229.23:38:35.70#ibcon#about to read 4, iclass 3, count 0 2006.229.23:38:35.70#ibcon#read 4, iclass 3, count 0 2006.229.23:38:35.70#ibcon#about to read 5, iclass 3, count 0 2006.229.23:38:35.70#ibcon#read 5, iclass 3, count 0 2006.229.23:38:35.70#ibcon#about to read 6, iclass 3, count 0 2006.229.23:38:35.70#ibcon#read 6, iclass 3, count 0 2006.229.23:38:35.70#ibcon#end of sib2, iclass 3, count 0 2006.229.23:38:35.70#ibcon#*after write, iclass 3, count 0 2006.229.23:38:35.70#ibcon#*before return 0, iclass 3, count 0 2006.229.23:38:35.70#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:35.70#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:35.70#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:38:35.70#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:38:35.70$vck44/va=2,7 2006.229.23:38:35.70#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.23:38:35.70#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.23:38:35.70#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:35.70#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:35.76#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:35.76#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:35.76#ibcon#enter wrdev, iclass 5, count 2 2006.229.23:38:35.76#ibcon#first serial, iclass 5, count 2 2006.229.23:38:35.76#ibcon#enter sib2, iclass 5, count 2 2006.229.23:38:35.76#ibcon#flushed, iclass 5, count 2 2006.229.23:38:35.76#ibcon#about to write, iclass 5, count 2 2006.229.23:38:35.76#ibcon#wrote, iclass 5, count 2 2006.229.23:38:35.76#ibcon#about to read 3, iclass 5, count 2 2006.229.23:38:35.78#ibcon#read 3, iclass 5, count 2 2006.229.23:38:35.78#ibcon#about to read 4, iclass 5, count 2 2006.229.23:38:35.78#ibcon#read 4, iclass 5, count 2 2006.229.23:38:35.78#ibcon#about to read 5, iclass 5, count 2 2006.229.23:38:35.78#ibcon#read 5, iclass 5, count 2 2006.229.23:38:35.78#ibcon#about to read 6, iclass 5, count 2 2006.229.23:38:35.78#ibcon#read 6, iclass 5, count 2 2006.229.23:38:35.78#ibcon#end of sib2, iclass 5, count 2 2006.229.23:38:35.78#ibcon#*mode == 0, iclass 5, count 2 2006.229.23:38:35.78#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.23:38:35.78#ibcon#[25=AT02-07\r\n] 2006.229.23:38:35.78#ibcon#*before write, iclass 5, count 2 2006.229.23:38:35.78#ibcon#enter sib2, iclass 5, count 2 2006.229.23:38:35.78#ibcon#flushed, iclass 5, count 2 2006.229.23:38:35.78#ibcon#about to write, iclass 5, count 2 2006.229.23:38:35.78#ibcon#wrote, iclass 5, count 2 2006.229.23:38:35.78#ibcon#about to read 3, iclass 5, count 2 2006.229.23:38:35.79#abcon#<5=/08 1.8 5.5 30.12 831002.6\r\n> 2006.229.23:38:35.81#abcon#{5=INTERFACE CLEAR} 2006.229.23:38:35.81#ibcon#read 3, iclass 5, count 2 2006.229.23:38:35.81#ibcon#about to read 4, iclass 5, count 2 2006.229.23:38:35.81#ibcon#read 4, iclass 5, count 2 2006.229.23:38:35.81#ibcon#about to read 5, iclass 5, count 2 2006.229.23:38:35.81#ibcon#read 5, iclass 5, count 2 2006.229.23:38:35.81#ibcon#about to read 6, iclass 5, count 2 2006.229.23:38:35.81#ibcon#read 6, iclass 5, count 2 2006.229.23:38:35.81#ibcon#end of sib2, iclass 5, count 2 2006.229.23:38:35.81#ibcon#*after write, iclass 5, count 2 2006.229.23:38:35.81#ibcon#*before return 0, iclass 5, count 2 2006.229.23:38:35.81#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:35.81#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:35.81#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.23:38:35.81#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:35.81#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:35.87#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:38:35.93#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:35.93#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:35.93#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:38:35.93#ibcon#first serial, iclass 5, count 0 2006.229.23:38:35.93#ibcon#enter sib2, iclass 5, count 0 2006.229.23:38:35.93#ibcon#flushed, iclass 5, count 0 2006.229.23:38:35.93#ibcon#about to write, iclass 5, count 0 2006.229.23:38:35.93#ibcon#wrote, iclass 5, count 0 2006.229.23:38:35.93#ibcon#about to read 3, iclass 5, count 0 2006.229.23:38:35.95#ibcon#read 3, iclass 5, count 0 2006.229.23:38:35.95#ibcon#about to read 4, iclass 5, count 0 2006.229.23:38:35.95#ibcon#read 4, iclass 5, count 0 2006.229.23:38:35.95#ibcon#about to read 5, iclass 5, count 0 2006.229.23:38:35.95#ibcon#read 5, iclass 5, count 0 2006.229.23:38:35.95#ibcon#about to read 6, iclass 5, count 0 2006.229.23:38:35.95#ibcon#read 6, iclass 5, count 0 2006.229.23:38:35.95#ibcon#end of sib2, iclass 5, count 0 2006.229.23:38:35.95#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:38:35.95#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:38:35.95#ibcon#[25=USB\r\n] 2006.229.23:38:35.95#ibcon#*before write, iclass 5, count 0 2006.229.23:38:35.95#ibcon#enter sib2, iclass 5, count 0 2006.229.23:38:35.95#ibcon#flushed, iclass 5, count 0 2006.229.23:38:35.95#ibcon#about to write, iclass 5, count 0 2006.229.23:38:35.95#ibcon#wrote, iclass 5, count 0 2006.229.23:38:35.95#ibcon#about to read 3, iclass 5, count 0 2006.229.23:38:35.98#ibcon#read 3, iclass 5, count 0 2006.229.23:38:35.98#ibcon#about to read 4, iclass 5, count 0 2006.229.23:38:35.98#ibcon#read 4, iclass 5, count 0 2006.229.23:38:35.98#ibcon#about to read 5, iclass 5, count 0 2006.229.23:38:35.98#ibcon#read 5, iclass 5, count 0 2006.229.23:38:35.98#ibcon#about to read 6, iclass 5, count 0 2006.229.23:38:35.98#ibcon#read 6, iclass 5, count 0 2006.229.23:38:35.98#ibcon#end of sib2, iclass 5, count 0 2006.229.23:38:35.98#ibcon#*after write, iclass 5, count 0 2006.229.23:38:35.98#ibcon#*before return 0, iclass 5, count 0 2006.229.23:38:35.98#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:35.98#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:35.98#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:38:35.98#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:38:35.98$vck44/valo=3,564.99 2006.229.23:38:35.98#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.23:38:35.98#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.23:38:35.98#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:35.98#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:35.98#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:35.98#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:35.98#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:38:35.98#ibcon#first serial, iclass 13, count 0 2006.229.23:38:35.98#ibcon#enter sib2, iclass 13, count 0 2006.229.23:38:35.98#ibcon#flushed, iclass 13, count 0 2006.229.23:38:35.98#ibcon#about to write, iclass 13, count 0 2006.229.23:38:35.98#ibcon#wrote, iclass 13, count 0 2006.229.23:38:35.98#ibcon#about to read 3, iclass 13, count 0 2006.229.23:38:36.00#ibcon#read 3, iclass 13, count 0 2006.229.23:38:36.00#ibcon#about to read 4, iclass 13, count 0 2006.229.23:38:36.00#ibcon#read 4, iclass 13, count 0 2006.229.23:38:36.00#ibcon#about to read 5, iclass 13, count 0 2006.229.23:38:36.00#ibcon#read 5, iclass 13, count 0 2006.229.23:38:36.00#ibcon#about to read 6, iclass 13, count 0 2006.229.23:38:36.00#ibcon#read 6, iclass 13, count 0 2006.229.23:38:36.00#ibcon#end of sib2, iclass 13, count 0 2006.229.23:38:36.00#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:38:36.00#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:38:36.00#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:38:36.00#ibcon#*before write, iclass 13, count 0 2006.229.23:38:36.00#ibcon#enter sib2, iclass 13, count 0 2006.229.23:38:36.00#ibcon#flushed, iclass 13, count 0 2006.229.23:38:36.00#ibcon#about to write, iclass 13, count 0 2006.229.23:38:36.00#ibcon#wrote, iclass 13, count 0 2006.229.23:38:36.00#ibcon#about to read 3, iclass 13, count 0 2006.229.23:38:36.04#ibcon#read 3, iclass 13, count 0 2006.229.23:38:36.04#ibcon#about to read 4, iclass 13, count 0 2006.229.23:38:36.04#ibcon#read 4, iclass 13, count 0 2006.229.23:38:36.04#ibcon#about to read 5, iclass 13, count 0 2006.229.23:38:36.04#ibcon#read 5, iclass 13, count 0 2006.229.23:38:36.04#ibcon#about to read 6, iclass 13, count 0 2006.229.23:38:36.04#ibcon#read 6, iclass 13, count 0 2006.229.23:38:36.04#ibcon#end of sib2, iclass 13, count 0 2006.229.23:38:36.04#ibcon#*after write, iclass 13, count 0 2006.229.23:38:36.04#ibcon#*before return 0, iclass 13, count 0 2006.229.23:38:36.04#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:36.04#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:36.04#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:38:36.04#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:38:36.04$vck44/va=3,6 2006.229.23:38:36.04#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.23:38:36.04#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.23:38:36.04#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:36.04#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:36.10#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:36.10#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:36.10#ibcon#enter wrdev, iclass 15, count 2 2006.229.23:38:36.10#ibcon#first serial, iclass 15, count 2 2006.229.23:38:36.10#ibcon#enter sib2, iclass 15, count 2 2006.229.23:38:36.10#ibcon#flushed, iclass 15, count 2 2006.229.23:38:36.10#ibcon#about to write, iclass 15, count 2 2006.229.23:38:36.10#ibcon#wrote, iclass 15, count 2 2006.229.23:38:36.10#ibcon#about to read 3, iclass 15, count 2 2006.229.23:38:36.12#ibcon#read 3, iclass 15, count 2 2006.229.23:38:36.12#ibcon#about to read 4, iclass 15, count 2 2006.229.23:38:36.12#ibcon#read 4, iclass 15, count 2 2006.229.23:38:36.12#ibcon#about to read 5, iclass 15, count 2 2006.229.23:38:36.12#ibcon#read 5, iclass 15, count 2 2006.229.23:38:36.12#ibcon#about to read 6, iclass 15, count 2 2006.229.23:38:36.12#ibcon#read 6, iclass 15, count 2 2006.229.23:38:36.12#ibcon#end of sib2, iclass 15, count 2 2006.229.23:38:36.12#ibcon#*mode == 0, iclass 15, count 2 2006.229.23:38:36.12#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.23:38:36.12#ibcon#[25=AT03-06\r\n] 2006.229.23:38:36.12#ibcon#*before write, iclass 15, count 2 2006.229.23:38:36.12#ibcon#enter sib2, iclass 15, count 2 2006.229.23:38:36.12#ibcon#flushed, iclass 15, count 2 2006.229.23:38:36.12#ibcon#about to write, iclass 15, count 2 2006.229.23:38:36.12#ibcon#wrote, iclass 15, count 2 2006.229.23:38:36.12#ibcon#about to read 3, iclass 15, count 2 2006.229.23:38:36.15#ibcon#read 3, iclass 15, count 2 2006.229.23:38:36.15#ibcon#about to read 4, iclass 15, count 2 2006.229.23:38:36.15#ibcon#read 4, iclass 15, count 2 2006.229.23:38:36.15#ibcon#about to read 5, iclass 15, count 2 2006.229.23:38:36.15#ibcon#read 5, iclass 15, count 2 2006.229.23:38:36.15#ibcon#about to read 6, iclass 15, count 2 2006.229.23:38:36.15#ibcon#read 6, iclass 15, count 2 2006.229.23:38:36.15#ibcon#end of sib2, iclass 15, count 2 2006.229.23:38:36.15#ibcon#*after write, iclass 15, count 2 2006.229.23:38:36.15#ibcon#*before return 0, iclass 15, count 2 2006.229.23:38:36.15#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:36.15#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:36.15#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.23:38:36.15#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:36.15#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:36.27#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:36.27#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:36.27#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:38:36.27#ibcon#first serial, iclass 15, count 0 2006.229.23:38:36.27#ibcon#enter sib2, iclass 15, count 0 2006.229.23:38:36.27#ibcon#flushed, iclass 15, count 0 2006.229.23:38:36.27#ibcon#about to write, iclass 15, count 0 2006.229.23:38:36.27#ibcon#wrote, iclass 15, count 0 2006.229.23:38:36.27#ibcon#about to read 3, iclass 15, count 0 2006.229.23:38:36.29#ibcon#read 3, iclass 15, count 0 2006.229.23:38:36.29#ibcon#about to read 4, iclass 15, count 0 2006.229.23:38:36.29#ibcon#read 4, iclass 15, count 0 2006.229.23:38:36.29#ibcon#about to read 5, iclass 15, count 0 2006.229.23:38:36.29#ibcon#read 5, iclass 15, count 0 2006.229.23:38:36.29#ibcon#about to read 6, iclass 15, count 0 2006.229.23:38:36.29#ibcon#read 6, iclass 15, count 0 2006.229.23:38:36.29#ibcon#end of sib2, iclass 15, count 0 2006.229.23:38:36.29#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:38:36.29#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:38:36.29#ibcon#[25=USB\r\n] 2006.229.23:38:36.29#ibcon#*before write, iclass 15, count 0 2006.229.23:38:36.29#ibcon#enter sib2, iclass 15, count 0 2006.229.23:38:36.29#ibcon#flushed, iclass 15, count 0 2006.229.23:38:36.29#ibcon#about to write, iclass 15, count 0 2006.229.23:38:36.29#ibcon#wrote, iclass 15, count 0 2006.229.23:38:36.29#ibcon#about to read 3, iclass 15, count 0 2006.229.23:38:36.32#ibcon#read 3, iclass 15, count 0 2006.229.23:38:36.32#ibcon#about to read 4, iclass 15, count 0 2006.229.23:38:36.32#ibcon#read 4, iclass 15, count 0 2006.229.23:38:36.32#ibcon#about to read 5, iclass 15, count 0 2006.229.23:38:36.32#ibcon#read 5, iclass 15, count 0 2006.229.23:38:36.32#ibcon#about to read 6, iclass 15, count 0 2006.229.23:38:36.32#ibcon#read 6, iclass 15, count 0 2006.229.23:38:36.32#ibcon#end of sib2, iclass 15, count 0 2006.229.23:38:36.32#ibcon#*after write, iclass 15, count 0 2006.229.23:38:36.32#ibcon#*before return 0, iclass 15, count 0 2006.229.23:38:36.32#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:36.32#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:36.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:38:36.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:38:36.32$vck44/valo=4,624.99 2006.229.23:38:36.32#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.23:38:36.32#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.23:38:36.32#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:36.32#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:36.32#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:36.32#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:36.32#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:38:36.32#ibcon#first serial, iclass 17, count 0 2006.229.23:38:36.32#ibcon#enter sib2, iclass 17, count 0 2006.229.23:38:36.32#ibcon#flushed, iclass 17, count 0 2006.229.23:38:36.32#ibcon#about to write, iclass 17, count 0 2006.229.23:38:36.32#ibcon#wrote, iclass 17, count 0 2006.229.23:38:36.32#ibcon#about to read 3, iclass 17, count 0 2006.229.23:38:36.34#ibcon#read 3, iclass 17, count 0 2006.229.23:38:36.34#ibcon#about to read 4, iclass 17, count 0 2006.229.23:38:36.34#ibcon#read 4, iclass 17, count 0 2006.229.23:38:36.34#ibcon#about to read 5, iclass 17, count 0 2006.229.23:38:36.34#ibcon#read 5, iclass 17, count 0 2006.229.23:38:36.34#ibcon#about to read 6, iclass 17, count 0 2006.229.23:38:36.34#ibcon#read 6, iclass 17, count 0 2006.229.23:38:36.34#ibcon#end of sib2, iclass 17, count 0 2006.229.23:38:36.34#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:38:36.34#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:38:36.34#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:38:36.34#ibcon#*before write, iclass 17, count 0 2006.229.23:38:36.34#ibcon#enter sib2, iclass 17, count 0 2006.229.23:38:36.34#ibcon#flushed, iclass 17, count 0 2006.229.23:38:36.34#ibcon#about to write, iclass 17, count 0 2006.229.23:38:36.34#ibcon#wrote, iclass 17, count 0 2006.229.23:38:36.34#ibcon#about to read 3, iclass 17, count 0 2006.229.23:38:36.38#ibcon#read 3, iclass 17, count 0 2006.229.23:38:36.38#ibcon#about to read 4, iclass 17, count 0 2006.229.23:38:36.38#ibcon#read 4, iclass 17, count 0 2006.229.23:38:36.38#ibcon#about to read 5, iclass 17, count 0 2006.229.23:38:36.38#ibcon#read 5, iclass 17, count 0 2006.229.23:38:36.38#ibcon#about to read 6, iclass 17, count 0 2006.229.23:38:36.38#ibcon#read 6, iclass 17, count 0 2006.229.23:38:36.38#ibcon#end of sib2, iclass 17, count 0 2006.229.23:38:36.38#ibcon#*after write, iclass 17, count 0 2006.229.23:38:36.38#ibcon#*before return 0, iclass 17, count 0 2006.229.23:38:36.38#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:36.38#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:36.38#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:38:36.38#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:38:36.38$vck44/va=4,7 2006.229.23:38:36.38#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.23:38:36.38#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.23:38:36.38#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:36.38#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:36.44#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:36.44#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:36.44#ibcon#enter wrdev, iclass 19, count 2 2006.229.23:38:36.44#ibcon#first serial, iclass 19, count 2 2006.229.23:38:36.44#ibcon#enter sib2, iclass 19, count 2 2006.229.23:38:36.44#ibcon#flushed, iclass 19, count 2 2006.229.23:38:36.44#ibcon#about to write, iclass 19, count 2 2006.229.23:38:36.44#ibcon#wrote, iclass 19, count 2 2006.229.23:38:36.44#ibcon#about to read 3, iclass 19, count 2 2006.229.23:38:36.46#ibcon#read 3, iclass 19, count 2 2006.229.23:38:36.46#ibcon#about to read 4, iclass 19, count 2 2006.229.23:38:36.46#ibcon#read 4, iclass 19, count 2 2006.229.23:38:36.46#ibcon#about to read 5, iclass 19, count 2 2006.229.23:38:36.46#ibcon#read 5, iclass 19, count 2 2006.229.23:38:36.46#ibcon#about to read 6, iclass 19, count 2 2006.229.23:38:36.46#ibcon#read 6, iclass 19, count 2 2006.229.23:38:36.46#ibcon#end of sib2, iclass 19, count 2 2006.229.23:38:36.46#ibcon#*mode == 0, iclass 19, count 2 2006.229.23:38:36.46#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.23:38:36.46#ibcon#[25=AT04-07\r\n] 2006.229.23:38:36.46#ibcon#*before write, iclass 19, count 2 2006.229.23:38:36.46#ibcon#enter sib2, iclass 19, count 2 2006.229.23:38:36.46#ibcon#flushed, iclass 19, count 2 2006.229.23:38:36.46#ibcon#about to write, iclass 19, count 2 2006.229.23:38:36.46#ibcon#wrote, iclass 19, count 2 2006.229.23:38:36.46#ibcon#about to read 3, iclass 19, count 2 2006.229.23:38:36.49#ibcon#read 3, iclass 19, count 2 2006.229.23:38:36.49#ibcon#about to read 4, iclass 19, count 2 2006.229.23:38:36.49#ibcon#read 4, iclass 19, count 2 2006.229.23:38:36.49#ibcon#about to read 5, iclass 19, count 2 2006.229.23:38:36.49#ibcon#read 5, iclass 19, count 2 2006.229.23:38:36.49#ibcon#about to read 6, iclass 19, count 2 2006.229.23:38:36.49#ibcon#read 6, iclass 19, count 2 2006.229.23:38:36.49#ibcon#end of sib2, iclass 19, count 2 2006.229.23:38:36.49#ibcon#*after write, iclass 19, count 2 2006.229.23:38:36.49#ibcon#*before return 0, iclass 19, count 2 2006.229.23:38:36.49#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:36.49#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:36.49#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.23:38:36.49#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:36.49#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:36.61#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:36.61#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:36.61#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:38:36.61#ibcon#first serial, iclass 19, count 0 2006.229.23:38:36.61#ibcon#enter sib2, iclass 19, count 0 2006.229.23:38:36.61#ibcon#flushed, iclass 19, count 0 2006.229.23:38:36.61#ibcon#about to write, iclass 19, count 0 2006.229.23:38:36.61#ibcon#wrote, iclass 19, count 0 2006.229.23:38:36.61#ibcon#about to read 3, iclass 19, count 0 2006.229.23:38:36.63#ibcon#read 3, iclass 19, count 0 2006.229.23:38:36.63#ibcon#about to read 4, iclass 19, count 0 2006.229.23:38:36.63#ibcon#read 4, iclass 19, count 0 2006.229.23:38:36.63#ibcon#about to read 5, iclass 19, count 0 2006.229.23:38:36.63#ibcon#read 5, iclass 19, count 0 2006.229.23:38:36.63#ibcon#about to read 6, iclass 19, count 0 2006.229.23:38:36.63#ibcon#read 6, iclass 19, count 0 2006.229.23:38:36.63#ibcon#end of sib2, iclass 19, count 0 2006.229.23:38:36.63#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:38:36.63#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:38:36.63#ibcon#[25=USB\r\n] 2006.229.23:38:36.63#ibcon#*before write, iclass 19, count 0 2006.229.23:38:36.63#ibcon#enter sib2, iclass 19, count 0 2006.229.23:38:36.63#ibcon#flushed, iclass 19, count 0 2006.229.23:38:36.63#ibcon#about to write, iclass 19, count 0 2006.229.23:38:36.63#ibcon#wrote, iclass 19, count 0 2006.229.23:38:36.63#ibcon#about to read 3, iclass 19, count 0 2006.229.23:38:36.66#ibcon#read 3, iclass 19, count 0 2006.229.23:38:36.66#ibcon#about to read 4, iclass 19, count 0 2006.229.23:38:36.66#ibcon#read 4, iclass 19, count 0 2006.229.23:38:36.66#ibcon#about to read 5, iclass 19, count 0 2006.229.23:38:36.66#ibcon#read 5, iclass 19, count 0 2006.229.23:38:36.66#ibcon#about to read 6, iclass 19, count 0 2006.229.23:38:36.66#ibcon#read 6, iclass 19, count 0 2006.229.23:38:36.66#ibcon#end of sib2, iclass 19, count 0 2006.229.23:38:36.66#ibcon#*after write, iclass 19, count 0 2006.229.23:38:36.66#ibcon#*before return 0, iclass 19, count 0 2006.229.23:38:36.66#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:36.66#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:36.66#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:38:36.66#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:38:36.66$vck44/valo=5,734.99 2006.229.23:38:36.66#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.23:38:36.66#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.23:38:36.66#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:36.66#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:36.66#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:36.66#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:36.66#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:38:36.66#ibcon#first serial, iclass 21, count 0 2006.229.23:38:36.66#ibcon#enter sib2, iclass 21, count 0 2006.229.23:38:36.66#ibcon#flushed, iclass 21, count 0 2006.229.23:38:36.66#ibcon#about to write, iclass 21, count 0 2006.229.23:38:36.66#ibcon#wrote, iclass 21, count 0 2006.229.23:38:36.66#ibcon#about to read 3, iclass 21, count 0 2006.229.23:38:36.68#ibcon#read 3, iclass 21, count 0 2006.229.23:38:36.68#ibcon#about to read 4, iclass 21, count 0 2006.229.23:38:36.68#ibcon#read 4, iclass 21, count 0 2006.229.23:38:36.68#ibcon#about to read 5, iclass 21, count 0 2006.229.23:38:36.68#ibcon#read 5, iclass 21, count 0 2006.229.23:38:36.68#ibcon#about to read 6, iclass 21, count 0 2006.229.23:38:36.68#ibcon#read 6, iclass 21, count 0 2006.229.23:38:36.68#ibcon#end of sib2, iclass 21, count 0 2006.229.23:38:36.68#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:38:36.68#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:38:36.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:38:36.68#ibcon#*before write, iclass 21, count 0 2006.229.23:38:36.68#ibcon#enter sib2, iclass 21, count 0 2006.229.23:38:36.68#ibcon#flushed, iclass 21, count 0 2006.229.23:38:36.68#ibcon#about to write, iclass 21, count 0 2006.229.23:38:36.68#ibcon#wrote, iclass 21, count 0 2006.229.23:38:36.68#ibcon#about to read 3, iclass 21, count 0 2006.229.23:38:36.72#ibcon#read 3, iclass 21, count 0 2006.229.23:38:36.72#ibcon#about to read 4, iclass 21, count 0 2006.229.23:38:36.72#ibcon#read 4, iclass 21, count 0 2006.229.23:38:36.72#ibcon#about to read 5, iclass 21, count 0 2006.229.23:38:36.72#ibcon#read 5, iclass 21, count 0 2006.229.23:38:36.72#ibcon#about to read 6, iclass 21, count 0 2006.229.23:38:36.72#ibcon#read 6, iclass 21, count 0 2006.229.23:38:36.72#ibcon#end of sib2, iclass 21, count 0 2006.229.23:38:36.72#ibcon#*after write, iclass 21, count 0 2006.229.23:38:36.72#ibcon#*before return 0, iclass 21, count 0 2006.229.23:38:36.72#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:36.72#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:36.72#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:38:36.72#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:38:36.72$vck44/va=5,4 2006.229.23:38:36.72#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.23:38:36.72#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.23:38:36.72#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:36.72#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:36.78#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:36.78#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:36.78#ibcon#enter wrdev, iclass 23, count 2 2006.229.23:38:36.78#ibcon#first serial, iclass 23, count 2 2006.229.23:38:36.78#ibcon#enter sib2, iclass 23, count 2 2006.229.23:38:36.78#ibcon#flushed, iclass 23, count 2 2006.229.23:38:36.78#ibcon#about to write, iclass 23, count 2 2006.229.23:38:36.78#ibcon#wrote, iclass 23, count 2 2006.229.23:38:36.78#ibcon#about to read 3, iclass 23, count 2 2006.229.23:38:36.80#ibcon#read 3, iclass 23, count 2 2006.229.23:38:36.80#ibcon#about to read 4, iclass 23, count 2 2006.229.23:38:36.80#ibcon#read 4, iclass 23, count 2 2006.229.23:38:36.80#ibcon#about to read 5, iclass 23, count 2 2006.229.23:38:36.80#ibcon#read 5, iclass 23, count 2 2006.229.23:38:36.80#ibcon#about to read 6, iclass 23, count 2 2006.229.23:38:36.80#ibcon#read 6, iclass 23, count 2 2006.229.23:38:36.80#ibcon#end of sib2, iclass 23, count 2 2006.229.23:38:36.80#ibcon#*mode == 0, iclass 23, count 2 2006.229.23:38:36.80#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.23:38:36.80#ibcon#[25=AT05-04\r\n] 2006.229.23:38:36.80#ibcon#*before write, iclass 23, count 2 2006.229.23:38:36.80#ibcon#enter sib2, iclass 23, count 2 2006.229.23:38:36.80#ibcon#flushed, iclass 23, count 2 2006.229.23:38:36.80#ibcon#about to write, iclass 23, count 2 2006.229.23:38:36.80#ibcon#wrote, iclass 23, count 2 2006.229.23:38:36.80#ibcon#about to read 3, iclass 23, count 2 2006.229.23:38:36.83#ibcon#read 3, iclass 23, count 2 2006.229.23:38:36.83#ibcon#about to read 4, iclass 23, count 2 2006.229.23:38:36.83#ibcon#read 4, iclass 23, count 2 2006.229.23:38:36.83#ibcon#about to read 5, iclass 23, count 2 2006.229.23:38:36.83#ibcon#read 5, iclass 23, count 2 2006.229.23:38:36.83#ibcon#about to read 6, iclass 23, count 2 2006.229.23:38:36.83#ibcon#read 6, iclass 23, count 2 2006.229.23:38:36.83#ibcon#end of sib2, iclass 23, count 2 2006.229.23:38:36.83#ibcon#*after write, iclass 23, count 2 2006.229.23:38:36.83#ibcon#*before return 0, iclass 23, count 2 2006.229.23:38:36.83#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:36.83#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:36.83#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.23:38:36.83#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:36.83#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:36.95#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:36.95#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:36.95#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:38:36.95#ibcon#first serial, iclass 23, count 0 2006.229.23:38:36.95#ibcon#enter sib2, iclass 23, count 0 2006.229.23:38:36.95#ibcon#flushed, iclass 23, count 0 2006.229.23:38:36.95#ibcon#about to write, iclass 23, count 0 2006.229.23:38:36.95#ibcon#wrote, iclass 23, count 0 2006.229.23:38:36.95#ibcon#about to read 3, iclass 23, count 0 2006.229.23:38:36.97#ibcon#read 3, iclass 23, count 0 2006.229.23:38:36.97#ibcon#about to read 4, iclass 23, count 0 2006.229.23:38:36.97#ibcon#read 4, iclass 23, count 0 2006.229.23:38:36.97#ibcon#about to read 5, iclass 23, count 0 2006.229.23:38:36.97#ibcon#read 5, iclass 23, count 0 2006.229.23:38:36.97#ibcon#about to read 6, iclass 23, count 0 2006.229.23:38:36.97#ibcon#read 6, iclass 23, count 0 2006.229.23:38:36.97#ibcon#end of sib2, iclass 23, count 0 2006.229.23:38:36.97#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:38:36.97#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:38:36.97#ibcon#[25=USB\r\n] 2006.229.23:38:36.97#ibcon#*before write, iclass 23, count 0 2006.229.23:38:36.97#ibcon#enter sib2, iclass 23, count 0 2006.229.23:38:36.97#ibcon#flushed, iclass 23, count 0 2006.229.23:38:36.97#ibcon#about to write, iclass 23, count 0 2006.229.23:38:36.97#ibcon#wrote, iclass 23, count 0 2006.229.23:38:36.97#ibcon#about to read 3, iclass 23, count 0 2006.229.23:38:37.00#ibcon#read 3, iclass 23, count 0 2006.229.23:38:37.00#ibcon#about to read 4, iclass 23, count 0 2006.229.23:38:37.00#ibcon#read 4, iclass 23, count 0 2006.229.23:38:37.00#ibcon#about to read 5, iclass 23, count 0 2006.229.23:38:37.00#ibcon#read 5, iclass 23, count 0 2006.229.23:38:37.00#ibcon#about to read 6, iclass 23, count 0 2006.229.23:38:37.00#ibcon#read 6, iclass 23, count 0 2006.229.23:38:37.00#ibcon#end of sib2, iclass 23, count 0 2006.229.23:38:37.00#ibcon#*after write, iclass 23, count 0 2006.229.23:38:37.00#ibcon#*before return 0, iclass 23, count 0 2006.229.23:38:37.00#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:37.00#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:37.00#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:38:37.00#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:38:37.00$vck44/valo=6,814.99 2006.229.23:38:37.00#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.23:38:37.00#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.23:38:37.00#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:37.00#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:37.00#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:37.00#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:37.00#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:38:37.00#ibcon#first serial, iclass 25, count 0 2006.229.23:38:37.00#ibcon#enter sib2, iclass 25, count 0 2006.229.23:38:37.00#ibcon#flushed, iclass 25, count 0 2006.229.23:38:37.00#ibcon#about to write, iclass 25, count 0 2006.229.23:38:37.00#ibcon#wrote, iclass 25, count 0 2006.229.23:38:37.00#ibcon#about to read 3, iclass 25, count 0 2006.229.23:38:37.02#ibcon#read 3, iclass 25, count 0 2006.229.23:38:37.02#ibcon#about to read 4, iclass 25, count 0 2006.229.23:38:37.02#ibcon#read 4, iclass 25, count 0 2006.229.23:38:37.02#ibcon#about to read 5, iclass 25, count 0 2006.229.23:38:37.02#ibcon#read 5, iclass 25, count 0 2006.229.23:38:37.02#ibcon#about to read 6, iclass 25, count 0 2006.229.23:38:37.02#ibcon#read 6, iclass 25, count 0 2006.229.23:38:37.02#ibcon#end of sib2, iclass 25, count 0 2006.229.23:38:37.02#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:38:37.02#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:38:37.02#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:38:37.02#ibcon#*before write, iclass 25, count 0 2006.229.23:38:37.02#ibcon#enter sib2, iclass 25, count 0 2006.229.23:38:37.02#ibcon#flushed, iclass 25, count 0 2006.229.23:38:37.02#ibcon#about to write, iclass 25, count 0 2006.229.23:38:37.02#ibcon#wrote, iclass 25, count 0 2006.229.23:38:37.02#ibcon#about to read 3, iclass 25, count 0 2006.229.23:38:37.06#ibcon#read 3, iclass 25, count 0 2006.229.23:38:37.06#ibcon#about to read 4, iclass 25, count 0 2006.229.23:38:37.06#ibcon#read 4, iclass 25, count 0 2006.229.23:38:37.06#ibcon#about to read 5, iclass 25, count 0 2006.229.23:38:37.06#ibcon#read 5, iclass 25, count 0 2006.229.23:38:37.06#ibcon#about to read 6, iclass 25, count 0 2006.229.23:38:37.06#ibcon#read 6, iclass 25, count 0 2006.229.23:38:37.06#ibcon#end of sib2, iclass 25, count 0 2006.229.23:38:37.06#ibcon#*after write, iclass 25, count 0 2006.229.23:38:37.06#ibcon#*before return 0, iclass 25, count 0 2006.229.23:38:37.06#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:37.06#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:37.06#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:38:37.06#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:38:37.06$vck44/va=6,4 2006.229.23:38:37.06#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.23:38:37.06#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.23:38:37.06#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:37.06#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:37.12#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:37.12#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:37.12#ibcon#enter wrdev, iclass 27, count 2 2006.229.23:38:37.12#ibcon#first serial, iclass 27, count 2 2006.229.23:38:37.12#ibcon#enter sib2, iclass 27, count 2 2006.229.23:38:37.12#ibcon#flushed, iclass 27, count 2 2006.229.23:38:37.12#ibcon#about to write, iclass 27, count 2 2006.229.23:38:37.12#ibcon#wrote, iclass 27, count 2 2006.229.23:38:37.12#ibcon#about to read 3, iclass 27, count 2 2006.229.23:38:37.14#ibcon#read 3, iclass 27, count 2 2006.229.23:38:37.14#ibcon#about to read 4, iclass 27, count 2 2006.229.23:38:37.14#ibcon#read 4, iclass 27, count 2 2006.229.23:38:37.14#ibcon#about to read 5, iclass 27, count 2 2006.229.23:38:37.14#ibcon#read 5, iclass 27, count 2 2006.229.23:38:37.14#ibcon#about to read 6, iclass 27, count 2 2006.229.23:38:37.14#ibcon#read 6, iclass 27, count 2 2006.229.23:38:37.14#ibcon#end of sib2, iclass 27, count 2 2006.229.23:38:37.14#ibcon#*mode == 0, iclass 27, count 2 2006.229.23:38:37.14#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.23:38:37.14#ibcon#[25=AT06-04\r\n] 2006.229.23:38:37.14#ibcon#*before write, iclass 27, count 2 2006.229.23:38:37.14#ibcon#enter sib2, iclass 27, count 2 2006.229.23:38:37.14#ibcon#flushed, iclass 27, count 2 2006.229.23:38:37.14#ibcon#about to write, iclass 27, count 2 2006.229.23:38:37.14#ibcon#wrote, iclass 27, count 2 2006.229.23:38:37.14#ibcon#about to read 3, iclass 27, count 2 2006.229.23:38:37.17#ibcon#read 3, iclass 27, count 2 2006.229.23:38:37.17#ibcon#about to read 4, iclass 27, count 2 2006.229.23:38:37.17#ibcon#read 4, iclass 27, count 2 2006.229.23:38:37.17#ibcon#about to read 5, iclass 27, count 2 2006.229.23:38:37.17#ibcon#read 5, iclass 27, count 2 2006.229.23:38:37.17#ibcon#about to read 6, iclass 27, count 2 2006.229.23:38:37.17#ibcon#read 6, iclass 27, count 2 2006.229.23:38:37.17#ibcon#end of sib2, iclass 27, count 2 2006.229.23:38:37.17#ibcon#*after write, iclass 27, count 2 2006.229.23:38:37.17#ibcon#*before return 0, iclass 27, count 2 2006.229.23:38:37.17#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:37.17#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:37.17#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.23:38:37.17#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:37.17#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:37.29#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:37.29#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:37.29#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:38:37.29#ibcon#first serial, iclass 27, count 0 2006.229.23:38:37.29#ibcon#enter sib2, iclass 27, count 0 2006.229.23:38:37.29#ibcon#flushed, iclass 27, count 0 2006.229.23:38:37.29#ibcon#about to write, iclass 27, count 0 2006.229.23:38:37.29#ibcon#wrote, iclass 27, count 0 2006.229.23:38:37.29#ibcon#about to read 3, iclass 27, count 0 2006.229.23:38:37.31#ibcon#read 3, iclass 27, count 0 2006.229.23:38:37.31#ibcon#about to read 4, iclass 27, count 0 2006.229.23:38:37.31#ibcon#read 4, iclass 27, count 0 2006.229.23:38:37.31#ibcon#about to read 5, iclass 27, count 0 2006.229.23:38:37.31#ibcon#read 5, iclass 27, count 0 2006.229.23:38:37.31#ibcon#about to read 6, iclass 27, count 0 2006.229.23:38:37.31#ibcon#read 6, iclass 27, count 0 2006.229.23:38:37.31#ibcon#end of sib2, iclass 27, count 0 2006.229.23:38:37.31#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:38:37.31#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:38:37.31#ibcon#[25=USB\r\n] 2006.229.23:38:37.31#ibcon#*before write, iclass 27, count 0 2006.229.23:38:37.31#ibcon#enter sib2, iclass 27, count 0 2006.229.23:38:37.31#ibcon#flushed, iclass 27, count 0 2006.229.23:38:37.31#ibcon#about to write, iclass 27, count 0 2006.229.23:38:37.31#ibcon#wrote, iclass 27, count 0 2006.229.23:38:37.31#ibcon#about to read 3, iclass 27, count 0 2006.229.23:38:37.34#ibcon#read 3, iclass 27, count 0 2006.229.23:38:37.34#ibcon#about to read 4, iclass 27, count 0 2006.229.23:38:37.34#ibcon#read 4, iclass 27, count 0 2006.229.23:38:37.34#ibcon#about to read 5, iclass 27, count 0 2006.229.23:38:37.34#ibcon#read 5, iclass 27, count 0 2006.229.23:38:37.34#ibcon#about to read 6, iclass 27, count 0 2006.229.23:38:37.34#ibcon#read 6, iclass 27, count 0 2006.229.23:38:37.34#ibcon#end of sib2, iclass 27, count 0 2006.229.23:38:37.34#ibcon#*after write, iclass 27, count 0 2006.229.23:38:37.34#ibcon#*before return 0, iclass 27, count 0 2006.229.23:38:37.34#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:37.34#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:37.34#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:38:37.34#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:38:37.34$vck44/valo=7,864.99 2006.229.23:38:37.34#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.23:38:37.34#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.23:38:37.34#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:37.34#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:37.34#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:37.34#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:37.34#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:38:37.34#ibcon#first serial, iclass 29, count 0 2006.229.23:38:37.34#ibcon#enter sib2, iclass 29, count 0 2006.229.23:38:37.34#ibcon#flushed, iclass 29, count 0 2006.229.23:38:37.34#ibcon#about to write, iclass 29, count 0 2006.229.23:38:37.34#ibcon#wrote, iclass 29, count 0 2006.229.23:38:37.34#ibcon#about to read 3, iclass 29, count 0 2006.229.23:38:37.36#ibcon#read 3, iclass 29, count 0 2006.229.23:38:37.36#ibcon#about to read 4, iclass 29, count 0 2006.229.23:38:37.36#ibcon#read 4, iclass 29, count 0 2006.229.23:38:37.36#ibcon#about to read 5, iclass 29, count 0 2006.229.23:38:37.36#ibcon#read 5, iclass 29, count 0 2006.229.23:38:37.36#ibcon#about to read 6, iclass 29, count 0 2006.229.23:38:37.36#ibcon#read 6, iclass 29, count 0 2006.229.23:38:37.36#ibcon#end of sib2, iclass 29, count 0 2006.229.23:38:37.36#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:38:37.36#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:38:37.36#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:38:37.36#ibcon#*before write, iclass 29, count 0 2006.229.23:38:37.36#ibcon#enter sib2, iclass 29, count 0 2006.229.23:38:37.36#ibcon#flushed, iclass 29, count 0 2006.229.23:38:37.36#ibcon#about to write, iclass 29, count 0 2006.229.23:38:37.36#ibcon#wrote, iclass 29, count 0 2006.229.23:38:37.36#ibcon#about to read 3, iclass 29, count 0 2006.229.23:38:37.40#ibcon#read 3, iclass 29, count 0 2006.229.23:38:37.40#ibcon#about to read 4, iclass 29, count 0 2006.229.23:38:37.40#ibcon#read 4, iclass 29, count 0 2006.229.23:38:37.40#ibcon#about to read 5, iclass 29, count 0 2006.229.23:38:37.40#ibcon#read 5, iclass 29, count 0 2006.229.23:38:37.40#ibcon#about to read 6, iclass 29, count 0 2006.229.23:38:37.40#ibcon#read 6, iclass 29, count 0 2006.229.23:38:37.40#ibcon#end of sib2, iclass 29, count 0 2006.229.23:38:37.40#ibcon#*after write, iclass 29, count 0 2006.229.23:38:37.40#ibcon#*before return 0, iclass 29, count 0 2006.229.23:38:37.40#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:37.40#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:37.40#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:38:37.40#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:38:37.40$vck44/va=7,5 2006.229.23:38:37.40#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.23:38:37.40#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.23:38:37.40#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:37.40#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:37.46#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:37.46#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:37.46#ibcon#enter wrdev, iclass 31, count 2 2006.229.23:38:37.46#ibcon#first serial, iclass 31, count 2 2006.229.23:38:37.46#ibcon#enter sib2, iclass 31, count 2 2006.229.23:38:37.46#ibcon#flushed, iclass 31, count 2 2006.229.23:38:37.46#ibcon#about to write, iclass 31, count 2 2006.229.23:38:37.46#ibcon#wrote, iclass 31, count 2 2006.229.23:38:37.46#ibcon#about to read 3, iclass 31, count 2 2006.229.23:38:37.48#ibcon#read 3, iclass 31, count 2 2006.229.23:38:37.48#ibcon#about to read 4, iclass 31, count 2 2006.229.23:38:37.48#ibcon#read 4, iclass 31, count 2 2006.229.23:38:37.48#ibcon#about to read 5, iclass 31, count 2 2006.229.23:38:37.48#ibcon#read 5, iclass 31, count 2 2006.229.23:38:37.48#ibcon#about to read 6, iclass 31, count 2 2006.229.23:38:37.48#ibcon#read 6, iclass 31, count 2 2006.229.23:38:37.48#ibcon#end of sib2, iclass 31, count 2 2006.229.23:38:37.48#ibcon#*mode == 0, iclass 31, count 2 2006.229.23:38:37.48#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.23:38:37.48#ibcon#[25=AT07-05\r\n] 2006.229.23:38:37.48#ibcon#*before write, iclass 31, count 2 2006.229.23:38:37.48#ibcon#enter sib2, iclass 31, count 2 2006.229.23:38:37.48#ibcon#flushed, iclass 31, count 2 2006.229.23:38:37.48#ibcon#about to write, iclass 31, count 2 2006.229.23:38:37.48#ibcon#wrote, iclass 31, count 2 2006.229.23:38:37.48#ibcon#about to read 3, iclass 31, count 2 2006.229.23:38:37.51#ibcon#read 3, iclass 31, count 2 2006.229.23:38:37.51#ibcon#about to read 4, iclass 31, count 2 2006.229.23:38:37.51#ibcon#read 4, iclass 31, count 2 2006.229.23:38:37.51#ibcon#about to read 5, iclass 31, count 2 2006.229.23:38:37.51#ibcon#read 5, iclass 31, count 2 2006.229.23:38:37.51#ibcon#about to read 6, iclass 31, count 2 2006.229.23:38:37.51#ibcon#read 6, iclass 31, count 2 2006.229.23:38:37.51#ibcon#end of sib2, iclass 31, count 2 2006.229.23:38:37.51#ibcon#*after write, iclass 31, count 2 2006.229.23:38:37.51#ibcon#*before return 0, iclass 31, count 2 2006.229.23:38:37.51#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:37.51#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:37.51#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.23:38:37.51#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:37.51#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:37.63#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:37.63#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:37.63#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:38:37.63#ibcon#first serial, iclass 31, count 0 2006.229.23:38:37.63#ibcon#enter sib2, iclass 31, count 0 2006.229.23:38:37.63#ibcon#flushed, iclass 31, count 0 2006.229.23:38:37.63#ibcon#about to write, iclass 31, count 0 2006.229.23:38:37.63#ibcon#wrote, iclass 31, count 0 2006.229.23:38:37.63#ibcon#about to read 3, iclass 31, count 0 2006.229.23:38:37.65#ibcon#read 3, iclass 31, count 0 2006.229.23:38:37.65#ibcon#about to read 4, iclass 31, count 0 2006.229.23:38:37.65#ibcon#read 4, iclass 31, count 0 2006.229.23:38:37.65#ibcon#about to read 5, iclass 31, count 0 2006.229.23:38:37.65#ibcon#read 5, iclass 31, count 0 2006.229.23:38:37.65#ibcon#about to read 6, iclass 31, count 0 2006.229.23:38:37.65#ibcon#read 6, iclass 31, count 0 2006.229.23:38:37.65#ibcon#end of sib2, iclass 31, count 0 2006.229.23:38:37.65#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:38:37.65#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:38:37.65#ibcon#[25=USB\r\n] 2006.229.23:38:37.65#ibcon#*before write, iclass 31, count 0 2006.229.23:38:37.65#ibcon#enter sib2, iclass 31, count 0 2006.229.23:38:37.65#ibcon#flushed, iclass 31, count 0 2006.229.23:38:37.65#ibcon#about to write, iclass 31, count 0 2006.229.23:38:37.65#ibcon#wrote, iclass 31, count 0 2006.229.23:38:37.65#ibcon#about to read 3, iclass 31, count 0 2006.229.23:38:37.68#ibcon#read 3, iclass 31, count 0 2006.229.23:38:37.68#ibcon#about to read 4, iclass 31, count 0 2006.229.23:38:37.68#ibcon#read 4, iclass 31, count 0 2006.229.23:38:37.68#ibcon#about to read 5, iclass 31, count 0 2006.229.23:38:37.68#ibcon#read 5, iclass 31, count 0 2006.229.23:38:37.68#ibcon#about to read 6, iclass 31, count 0 2006.229.23:38:37.68#ibcon#read 6, iclass 31, count 0 2006.229.23:38:37.68#ibcon#end of sib2, iclass 31, count 0 2006.229.23:38:37.68#ibcon#*after write, iclass 31, count 0 2006.229.23:38:37.68#ibcon#*before return 0, iclass 31, count 0 2006.229.23:38:37.68#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:37.68#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:37.68#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:38:37.68#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:38:37.68$vck44/valo=8,884.99 2006.229.23:38:37.68#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.23:38:37.68#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.23:38:37.68#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:37.68#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:37.68#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:37.68#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:37.68#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:38:37.68#ibcon#first serial, iclass 33, count 0 2006.229.23:38:37.68#ibcon#enter sib2, iclass 33, count 0 2006.229.23:38:37.68#ibcon#flushed, iclass 33, count 0 2006.229.23:38:37.68#ibcon#about to write, iclass 33, count 0 2006.229.23:38:37.68#ibcon#wrote, iclass 33, count 0 2006.229.23:38:37.68#ibcon#about to read 3, iclass 33, count 0 2006.229.23:38:37.70#ibcon#read 3, iclass 33, count 0 2006.229.23:38:37.70#ibcon#about to read 4, iclass 33, count 0 2006.229.23:38:37.70#ibcon#read 4, iclass 33, count 0 2006.229.23:38:37.70#ibcon#about to read 5, iclass 33, count 0 2006.229.23:38:37.70#ibcon#read 5, iclass 33, count 0 2006.229.23:38:37.70#ibcon#about to read 6, iclass 33, count 0 2006.229.23:38:37.70#ibcon#read 6, iclass 33, count 0 2006.229.23:38:37.70#ibcon#end of sib2, iclass 33, count 0 2006.229.23:38:37.70#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:38:37.70#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:38:37.70#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:38:37.70#ibcon#*before write, iclass 33, count 0 2006.229.23:38:37.70#ibcon#enter sib2, iclass 33, count 0 2006.229.23:38:37.70#ibcon#flushed, iclass 33, count 0 2006.229.23:38:37.70#ibcon#about to write, iclass 33, count 0 2006.229.23:38:37.70#ibcon#wrote, iclass 33, count 0 2006.229.23:38:37.70#ibcon#about to read 3, iclass 33, count 0 2006.229.23:38:37.74#ibcon#read 3, iclass 33, count 0 2006.229.23:38:37.74#ibcon#about to read 4, iclass 33, count 0 2006.229.23:38:37.74#ibcon#read 4, iclass 33, count 0 2006.229.23:38:37.74#ibcon#about to read 5, iclass 33, count 0 2006.229.23:38:37.74#ibcon#read 5, iclass 33, count 0 2006.229.23:38:37.74#ibcon#about to read 6, iclass 33, count 0 2006.229.23:38:37.74#ibcon#read 6, iclass 33, count 0 2006.229.23:38:37.74#ibcon#end of sib2, iclass 33, count 0 2006.229.23:38:37.74#ibcon#*after write, iclass 33, count 0 2006.229.23:38:37.74#ibcon#*before return 0, iclass 33, count 0 2006.229.23:38:37.74#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:37.74#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:37.74#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:38:37.74#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:38:37.74$vck44/va=8,6 2006.229.23:38:37.74#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.229.23:38:37.74#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.229.23:38:37.74#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:37.74#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:38:37.80#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:38:37.80#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:38:37.80#ibcon#enter wrdev, iclass 35, count 2 2006.229.23:38:37.80#ibcon#first serial, iclass 35, count 2 2006.229.23:38:37.80#ibcon#enter sib2, iclass 35, count 2 2006.229.23:38:37.80#ibcon#flushed, iclass 35, count 2 2006.229.23:38:37.80#ibcon#about to write, iclass 35, count 2 2006.229.23:38:37.80#ibcon#wrote, iclass 35, count 2 2006.229.23:38:37.80#ibcon#about to read 3, iclass 35, count 2 2006.229.23:38:37.82#ibcon#read 3, iclass 35, count 2 2006.229.23:38:37.82#ibcon#about to read 4, iclass 35, count 2 2006.229.23:38:37.82#ibcon#read 4, iclass 35, count 2 2006.229.23:38:37.82#ibcon#about to read 5, iclass 35, count 2 2006.229.23:38:37.82#ibcon#read 5, iclass 35, count 2 2006.229.23:38:37.82#ibcon#about to read 6, iclass 35, count 2 2006.229.23:38:37.82#ibcon#read 6, iclass 35, count 2 2006.229.23:38:37.82#ibcon#end of sib2, iclass 35, count 2 2006.229.23:38:37.82#ibcon#*mode == 0, iclass 35, count 2 2006.229.23:38:37.82#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.229.23:38:37.82#ibcon#[25=AT08-06\r\n] 2006.229.23:38:37.82#ibcon#*before write, iclass 35, count 2 2006.229.23:38:37.82#ibcon#enter sib2, iclass 35, count 2 2006.229.23:38:37.82#ibcon#flushed, iclass 35, count 2 2006.229.23:38:37.82#ibcon#about to write, iclass 35, count 2 2006.229.23:38:37.82#ibcon#wrote, iclass 35, count 2 2006.229.23:38:37.82#ibcon#about to read 3, iclass 35, count 2 2006.229.23:38:37.85#ibcon#read 3, iclass 35, count 2 2006.229.23:38:37.85#ibcon#about to read 4, iclass 35, count 2 2006.229.23:38:37.85#ibcon#read 4, iclass 35, count 2 2006.229.23:38:37.85#ibcon#about to read 5, iclass 35, count 2 2006.229.23:38:37.85#ibcon#read 5, iclass 35, count 2 2006.229.23:38:37.85#ibcon#about to read 6, iclass 35, count 2 2006.229.23:38:37.85#ibcon#read 6, iclass 35, count 2 2006.229.23:38:37.85#ibcon#end of sib2, iclass 35, count 2 2006.229.23:38:37.85#ibcon#*after write, iclass 35, count 2 2006.229.23:38:37.85#ibcon#*before return 0, iclass 35, count 2 2006.229.23:38:37.85#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:38:37.85#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.229.23:38:37.85#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.229.23:38:37.85#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:37.85#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:38:37.97#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:38:37.97#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:38:37.97#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:38:37.97#ibcon#first serial, iclass 35, count 0 2006.229.23:38:37.97#ibcon#enter sib2, iclass 35, count 0 2006.229.23:38:37.97#ibcon#flushed, iclass 35, count 0 2006.229.23:38:37.97#ibcon#about to write, iclass 35, count 0 2006.229.23:38:37.97#ibcon#wrote, iclass 35, count 0 2006.229.23:38:37.97#ibcon#about to read 3, iclass 35, count 0 2006.229.23:38:37.99#ibcon#read 3, iclass 35, count 0 2006.229.23:38:37.99#ibcon#about to read 4, iclass 35, count 0 2006.229.23:38:37.99#ibcon#read 4, iclass 35, count 0 2006.229.23:38:37.99#ibcon#about to read 5, iclass 35, count 0 2006.229.23:38:37.99#ibcon#read 5, iclass 35, count 0 2006.229.23:38:37.99#ibcon#about to read 6, iclass 35, count 0 2006.229.23:38:37.99#ibcon#read 6, iclass 35, count 0 2006.229.23:38:37.99#ibcon#end of sib2, iclass 35, count 0 2006.229.23:38:37.99#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:38:37.99#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:38:37.99#ibcon#[25=USB\r\n] 2006.229.23:38:37.99#ibcon#*before write, iclass 35, count 0 2006.229.23:38:37.99#ibcon#enter sib2, iclass 35, count 0 2006.229.23:38:37.99#ibcon#flushed, iclass 35, count 0 2006.229.23:38:37.99#ibcon#about to write, iclass 35, count 0 2006.229.23:38:37.99#ibcon#wrote, iclass 35, count 0 2006.229.23:38:37.99#ibcon#about to read 3, iclass 35, count 0 2006.229.23:38:38.02#ibcon#read 3, iclass 35, count 0 2006.229.23:38:38.02#ibcon#about to read 4, iclass 35, count 0 2006.229.23:38:38.02#ibcon#read 4, iclass 35, count 0 2006.229.23:38:38.02#ibcon#about to read 5, iclass 35, count 0 2006.229.23:38:38.02#ibcon#read 5, iclass 35, count 0 2006.229.23:38:38.02#ibcon#about to read 6, iclass 35, count 0 2006.229.23:38:38.02#ibcon#read 6, iclass 35, count 0 2006.229.23:38:38.02#ibcon#end of sib2, iclass 35, count 0 2006.229.23:38:38.02#ibcon#*after write, iclass 35, count 0 2006.229.23:38:38.02#ibcon#*before return 0, iclass 35, count 0 2006.229.23:38:38.02#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:38:38.02#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.229.23:38:38.02#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:38:38.02#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:38:38.02$vck44/vblo=1,629.99 2006.229.23:38:38.02#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.229.23:38:38.02#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.229.23:38:38.02#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:38.02#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:38.02#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:38.02#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:38.02#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:38:38.02#ibcon#first serial, iclass 37, count 0 2006.229.23:38:38.02#ibcon#enter sib2, iclass 37, count 0 2006.229.23:38:38.02#ibcon#flushed, iclass 37, count 0 2006.229.23:38:38.02#ibcon#about to write, iclass 37, count 0 2006.229.23:38:38.02#ibcon#wrote, iclass 37, count 0 2006.229.23:38:38.02#ibcon#about to read 3, iclass 37, count 0 2006.229.23:38:38.04#ibcon#read 3, iclass 37, count 0 2006.229.23:38:38.04#ibcon#about to read 4, iclass 37, count 0 2006.229.23:38:38.04#ibcon#read 4, iclass 37, count 0 2006.229.23:38:38.04#ibcon#about to read 5, iclass 37, count 0 2006.229.23:38:38.04#ibcon#read 5, iclass 37, count 0 2006.229.23:38:38.04#ibcon#about to read 6, iclass 37, count 0 2006.229.23:38:38.04#ibcon#read 6, iclass 37, count 0 2006.229.23:38:38.04#ibcon#end of sib2, iclass 37, count 0 2006.229.23:38:38.04#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:38:38.04#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:38:38.04#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:38:38.04#ibcon#*before write, iclass 37, count 0 2006.229.23:38:38.04#ibcon#enter sib2, iclass 37, count 0 2006.229.23:38:38.04#ibcon#flushed, iclass 37, count 0 2006.229.23:38:38.04#ibcon#about to write, iclass 37, count 0 2006.229.23:38:38.04#ibcon#wrote, iclass 37, count 0 2006.229.23:38:38.04#ibcon#about to read 3, iclass 37, count 0 2006.229.23:38:38.08#ibcon#read 3, iclass 37, count 0 2006.229.23:38:38.08#ibcon#about to read 4, iclass 37, count 0 2006.229.23:38:38.08#ibcon#read 4, iclass 37, count 0 2006.229.23:38:38.08#ibcon#about to read 5, iclass 37, count 0 2006.229.23:38:38.08#ibcon#read 5, iclass 37, count 0 2006.229.23:38:38.08#ibcon#about to read 6, iclass 37, count 0 2006.229.23:38:38.08#ibcon#read 6, iclass 37, count 0 2006.229.23:38:38.08#ibcon#end of sib2, iclass 37, count 0 2006.229.23:38:38.08#ibcon#*after write, iclass 37, count 0 2006.229.23:38:38.08#ibcon#*before return 0, iclass 37, count 0 2006.229.23:38:38.08#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:38.08#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.229.23:38:38.08#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:38:38.08#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:38:38.08$vck44/vb=1,4 2006.229.23:38:38.08#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.229.23:38:38.08#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.229.23:38:38.08#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:38.08#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:38.08#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:38.08#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:38.08#ibcon#enter wrdev, iclass 39, count 2 2006.229.23:38:38.08#ibcon#first serial, iclass 39, count 2 2006.229.23:38:38.08#ibcon#enter sib2, iclass 39, count 2 2006.229.23:38:38.08#ibcon#flushed, iclass 39, count 2 2006.229.23:38:38.08#ibcon#about to write, iclass 39, count 2 2006.229.23:38:38.08#ibcon#wrote, iclass 39, count 2 2006.229.23:38:38.08#ibcon#about to read 3, iclass 39, count 2 2006.229.23:38:38.10#ibcon#read 3, iclass 39, count 2 2006.229.23:38:38.10#ibcon#about to read 4, iclass 39, count 2 2006.229.23:38:38.10#ibcon#read 4, iclass 39, count 2 2006.229.23:38:38.10#ibcon#about to read 5, iclass 39, count 2 2006.229.23:38:38.10#ibcon#read 5, iclass 39, count 2 2006.229.23:38:38.10#ibcon#about to read 6, iclass 39, count 2 2006.229.23:38:38.10#ibcon#read 6, iclass 39, count 2 2006.229.23:38:38.10#ibcon#end of sib2, iclass 39, count 2 2006.229.23:38:38.10#ibcon#*mode == 0, iclass 39, count 2 2006.229.23:38:38.10#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.229.23:38:38.10#ibcon#[27=AT01-04\r\n] 2006.229.23:38:38.10#ibcon#*before write, iclass 39, count 2 2006.229.23:38:38.10#ibcon#enter sib2, iclass 39, count 2 2006.229.23:38:38.10#ibcon#flushed, iclass 39, count 2 2006.229.23:38:38.10#ibcon#about to write, iclass 39, count 2 2006.229.23:38:38.10#ibcon#wrote, iclass 39, count 2 2006.229.23:38:38.10#ibcon#about to read 3, iclass 39, count 2 2006.229.23:38:38.13#ibcon#read 3, iclass 39, count 2 2006.229.23:38:38.13#ibcon#about to read 4, iclass 39, count 2 2006.229.23:38:38.13#ibcon#read 4, iclass 39, count 2 2006.229.23:38:38.13#ibcon#about to read 5, iclass 39, count 2 2006.229.23:38:38.13#ibcon#read 5, iclass 39, count 2 2006.229.23:38:38.13#ibcon#about to read 6, iclass 39, count 2 2006.229.23:38:38.13#ibcon#read 6, iclass 39, count 2 2006.229.23:38:38.13#ibcon#end of sib2, iclass 39, count 2 2006.229.23:38:38.13#ibcon#*after write, iclass 39, count 2 2006.229.23:38:38.13#ibcon#*before return 0, iclass 39, count 2 2006.229.23:38:38.13#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:38.13#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.229.23:38:38.13#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.229.23:38:38.13#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:38.13#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:38.25#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:38.25#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:38.25#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:38:38.25#ibcon#first serial, iclass 39, count 0 2006.229.23:38:38.25#ibcon#enter sib2, iclass 39, count 0 2006.229.23:38:38.25#ibcon#flushed, iclass 39, count 0 2006.229.23:38:38.25#ibcon#about to write, iclass 39, count 0 2006.229.23:38:38.25#ibcon#wrote, iclass 39, count 0 2006.229.23:38:38.25#ibcon#about to read 3, iclass 39, count 0 2006.229.23:38:38.27#ibcon#read 3, iclass 39, count 0 2006.229.23:38:38.27#ibcon#about to read 4, iclass 39, count 0 2006.229.23:38:38.27#ibcon#read 4, iclass 39, count 0 2006.229.23:38:38.27#ibcon#about to read 5, iclass 39, count 0 2006.229.23:38:38.27#ibcon#read 5, iclass 39, count 0 2006.229.23:38:38.27#ibcon#about to read 6, iclass 39, count 0 2006.229.23:38:38.27#ibcon#read 6, iclass 39, count 0 2006.229.23:38:38.27#ibcon#end of sib2, iclass 39, count 0 2006.229.23:38:38.27#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:38:38.27#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:38:38.27#ibcon#[27=USB\r\n] 2006.229.23:38:38.27#ibcon#*before write, iclass 39, count 0 2006.229.23:38:38.27#ibcon#enter sib2, iclass 39, count 0 2006.229.23:38:38.27#ibcon#flushed, iclass 39, count 0 2006.229.23:38:38.27#ibcon#about to write, iclass 39, count 0 2006.229.23:38:38.27#ibcon#wrote, iclass 39, count 0 2006.229.23:38:38.27#ibcon#about to read 3, iclass 39, count 0 2006.229.23:38:38.30#ibcon#read 3, iclass 39, count 0 2006.229.23:38:38.30#ibcon#about to read 4, iclass 39, count 0 2006.229.23:38:38.30#ibcon#read 4, iclass 39, count 0 2006.229.23:38:38.30#ibcon#about to read 5, iclass 39, count 0 2006.229.23:38:38.30#ibcon#read 5, iclass 39, count 0 2006.229.23:38:38.30#ibcon#about to read 6, iclass 39, count 0 2006.229.23:38:38.30#ibcon#read 6, iclass 39, count 0 2006.229.23:38:38.30#ibcon#end of sib2, iclass 39, count 0 2006.229.23:38:38.30#ibcon#*after write, iclass 39, count 0 2006.229.23:38:38.30#ibcon#*before return 0, iclass 39, count 0 2006.229.23:38:38.30#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:38.30#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.229.23:38:38.30#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:38:38.30#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:38:38.30$vck44/vblo=2,634.99 2006.229.23:38:38.30#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.229.23:38:38.30#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.229.23:38:38.30#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:38.30#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:38.30#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:38.30#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:38.30#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:38:38.30#ibcon#first serial, iclass 3, count 0 2006.229.23:38:38.30#ibcon#enter sib2, iclass 3, count 0 2006.229.23:38:38.30#ibcon#flushed, iclass 3, count 0 2006.229.23:38:38.30#ibcon#about to write, iclass 3, count 0 2006.229.23:38:38.30#ibcon#wrote, iclass 3, count 0 2006.229.23:38:38.30#ibcon#about to read 3, iclass 3, count 0 2006.229.23:38:38.32#ibcon#read 3, iclass 3, count 0 2006.229.23:38:38.32#ibcon#about to read 4, iclass 3, count 0 2006.229.23:38:38.32#ibcon#read 4, iclass 3, count 0 2006.229.23:38:38.32#ibcon#about to read 5, iclass 3, count 0 2006.229.23:38:38.32#ibcon#read 5, iclass 3, count 0 2006.229.23:38:38.32#ibcon#about to read 6, iclass 3, count 0 2006.229.23:38:38.32#ibcon#read 6, iclass 3, count 0 2006.229.23:38:38.32#ibcon#end of sib2, iclass 3, count 0 2006.229.23:38:38.32#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:38:38.32#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:38:38.32#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:38:38.32#ibcon#*before write, iclass 3, count 0 2006.229.23:38:38.32#ibcon#enter sib2, iclass 3, count 0 2006.229.23:38:38.32#ibcon#flushed, iclass 3, count 0 2006.229.23:38:38.32#ibcon#about to write, iclass 3, count 0 2006.229.23:38:38.32#ibcon#wrote, iclass 3, count 0 2006.229.23:38:38.32#ibcon#about to read 3, iclass 3, count 0 2006.229.23:38:38.36#ibcon#read 3, iclass 3, count 0 2006.229.23:38:38.36#ibcon#about to read 4, iclass 3, count 0 2006.229.23:38:38.36#ibcon#read 4, iclass 3, count 0 2006.229.23:38:38.36#ibcon#about to read 5, iclass 3, count 0 2006.229.23:38:38.36#ibcon#read 5, iclass 3, count 0 2006.229.23:38:38.36#ibcon#about to read 6, iclass 3, count 0 2006.229.23:38:38.36#ibcon#read 6, iclass 3, count 0 2006.229.23:38:38.36#ibcon#end of sib2, iclass 3, count 0 2006.229.23:38:38.36#ibcon#*after write, iclass 3, count 0 2006.229.23:38:38.36#ibcon#*before return 0, iclass 3, count 0 2006.229.23:38:38.36#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:38.36#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.229.23:38:38.36#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:38:38.36#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:38:38.36$vck44/vb=2,4 2006.229.23:38:38.36#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.229.23:38:38.36#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.229.23:38:38.36#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:38.36#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:38.42#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:38.42#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:38.42#ibcon#enter wrdev, iclass 5, count 2 2006.229.23:38:38.42#ibcon#first serial, iclass 5, count 2 2006.229.23:38:38.42#ibcon#enter sib2, iclass 5, count 2 2006.229.23:38:38.42#ibcon#flushed, iclass 5, count 2 2006.229.23:38:38.42#ibcon#about to write, iclass 5, count 2 2006.229.23:38:38.42#ibcon#wrote, iclass 5, count 2 2006.229.23:38:38.42#ibcon#about to read 3, iclass 5, count 2 2006.229.23:38:38.44#ibcon#read 3, iclass 5, count 2 2006.229.23:38:38.44#ibcon#about to read 4, iclass 5, count 2 2006.229.23:38:38.44#ibcon#read 4, iclass 5, count 2 2006.229.23:38:38.44#ibcon#about to read 5, iclass 5, count 2 2006.229.23:38:38.44#ibcon#read 5, iclass 5, count 2 2006.229.23:38:38.44#ibcon#about to read 6, iclass 5, count 2 2006.229.23:38:38.44#ibcon#read 6, iclass 5, count 2 2006.229.23:38:38.44#ibcon#end of sib2, iclass 5, count 2 2006.229.23:38:38.44#ibcon#*mode == 0, iclass 5, count 2 2006.229.23:38:38.44#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.229.23:38:38.44#ibcon#[27=AT02-04\r\n] 2006.229.23:38:38.44#ibcon#*before write, iclass 5, count 2 2006.229.23:38:38.44#ibcon#enter sib2, iclass 5, count 2 2006.229.23:38:38.44#ibcon#flushed, iclass 5, count 2 2006.229.23:38:38.44#ibcon#about to write, iclass 5, count 2 2006.229.23:38:38.44#ibcon#wrote, iclass 5, count 2 2006.229.23:38:38.44#ibcon#about to read 3, iclass 5, count 2 2006.229.23:38:38.47#ibcon#read 3, iclass 5, count 2 2006.229.23:38:38.47#ibcon#about to read 4, iclass 5, count 2 2006.229.23:38:38.47#ibcon#read 4, iclass 5, count 2 2006.229.23:38:38.47#ibcon#about to read 5, iclass 5, count 2 2006.229.23:38:38.47#ibcon#read 5, iclass 5, count 2 2006.229.23:38:38.47#ibcon#about to read 6, iclass 5, count 2 2006.229.23:38:38.47#ibcon#read 6, iclass 5, count 2 2006.229.23:38:38.47#ibcon#end of sib2, iclass 5, count 2 2006.229.23:38:38.47#ibcon#*after write, iclass 5, count 2 2006.229.23:38:38.47#ibcon#*before return 0, iclass 5, count 2 2006.229.23:38:38.47#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:38.47#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.229.23:38:38.47#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.229.23:38:38.47#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:38.47#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:38.59#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:38.59#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:38.59#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:38:38.59#ibcon#first serial, iclass 5, count 0 2006.229.23:38:38.59#ibcon#enter sib2, iclass 5, count 0 2006.229.23:38:38.59#ibcon#flushed, iclass 5, count 0 2006.229.23:38:38.59#ibcon#about to write, iclass 5, count 0 2006.229.23:38:38.59#ibcon#wrote, iclass 5, count 0 2006.229.23:38:38.59#ibcon#about to read 3, iclass 5, count 0 2006.229.23:38:38.61#ibcon#read 3, iclass 5, count 0 2006.229.23:38:38.61#ibcon#about to read 4, iclass 5, count 0 2006.229.23:38:38.61#ibcon#read 4, iclass 5, count 0 2006.229.23:38:38.61#ibcon#about to read 5, iclass 5, count 0 2006.229.23:38:38.61#ibcon#read 5, iclass 5, count 0 2006.229.23:38:38.61#ibcon#about to read 6, iclass 5, count 0 2006.229.23:38:38.61#ibcon#read 6, iclass 5, count 0 2006.229.23:38:38.61#ibcon#end of sib2, iclass 5, count 0 2006.229.23:38:38.61#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:38:38.61#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:38:38.61#ibcon#[27=USB\r\n] 2006.229.23:38:38.61#ibcon#*before write, iclass 5, count 0 2006.229.23:38:38.61#ibcon#enter sib2, iclass 5, count 0 2006.229.23:38:38.61#ibcon#flushed, iclass 5, count 0 2006.229.23:38:38.61#ibcon#about to write, iclass 5, count 0 2006.229.23:38:38.61#ibcon#wrote, iclass 5, count 0 2006.229.23:38:38.61#ibcon#about to read 3, iclass 5, count 0 2006.229.23:38:38.64#ibcon#read 3, iclass 5, count 0 2006.229.23:38:38.64#ibcon#about to read 4, iclass 5, count 0 2006.229.23:38:38.64#ibcon#read 4, iclass 5, count 0 2006.229.23:38:38.64#ibcon#about to read 5, iclass 5, count 0 2006.229.23:38:38.64#ibcon#read 5, iclass 5, count 0 2006.229.23:38:38.64#ibcon#about to read 6, iclass 5, count 0 2006.229.23:38:38.64#ibcon#read 6, iclass 5, count 0 2006.229.23:38:38.64#ibcon#end of sib2, iclass 5, count 0 2006.229.23:38:38.64#ibcon#*after write, iclass 5, count 0 2006.229.23:38:38.64#ibcon#*before return 0, iclass 5, count 0 2006.229.23:38:38.64#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:38.64#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.229.23:38:38.64#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:38:38.64#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:38:38.64$vck44/vblo=3,649.99 2006.229.23:38:38.64#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.229.23:38:38.64#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.229.23:38:38.64#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:38.64#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:38:38.64#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:38:38.64#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:38:38.64#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:38:38.64#ibcon#first serial, iclass 7, count 0 2006.229.23:38:38.64#ibcon#enter sib2, iclass 7, count 0 2006.229.23:38:38.64#ibcon#flushed, iclass 7, count 0 2006.229.23:38:38.64#ibcon#about to write, iclass 7, count 0 2006.229.23:38:38.64#ibcon#wrote, iclass 7, count 0 2006.229.23:38:38.64#ibcon#about to read 3, iclass 7, count 0 2006.229.23:38:38.66#ibcon#read 3, iclass 7, count 0 2006.229.23:38:38.66#ibcon#about to read 4, iclass 7, count 0 2006.229.23:38:38.66#ibcon#read 4, iclass 7, count 0 2006.229.23:38:38.66#ibcon#about to read 5, iclass 7, count 0 2006.229.23:38:38.66#ibcon#read 5, iclass 7, count 0 2006.229.23:38:38.66#ibcon#about to read 6, iclass 7, count 0 2006.229.23:38:38.66#ibcon#read 6, iclass 7, count 0 2006.229.23:38:38.66#ibcon#end of sib2, iclass 7, count 0 2006.229.23:38:38.66#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:38:38.66#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:38:38.66#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:38:38.66#ibcon#*before write, iclass 7, count 0 2006.229.23:38:38.66#ibcon#enter sib2, iclass 7, count 0 2006.229.23:38:38.66#ibcon#flushed, iclass 7, count 0 2006.229.23:38:38.66#ibcon#about to write, iclass 7, count 0 2006.229.23:38:38.66#ibcon#wrote, iclass 7, count 0 2006.229.23:38:38.66#ibcon#about to read 3, iclass 7, count 0 2006.229.23:38:38.70#ibcon#read 3, iclass 7, count 0 2006.229.23:38:38.70#ibcon#about to read 4, iclass 7, count 0 2006.229.23:38:38.70#ibcon#read 4, iclass 7, count 0 2006.229.23:38:38.70#ibcon#about to read 5, iclass 7, count 0 2006.229.23:38:38.70#ibcon#read 5, iclass 7, count 0 2006.229.23:38:38.70#ibcon#about to read 6, iclass 7, count 0 2006.229.23:38:38.70#ibcon#read 6, iclass 7, count 0 2006.229.23:38:38.70#ibcon#end of sib2, iclass 7, count 0 2006.229.23:38:38.70#ibcon#*after write, iclass 7, count 0 2006.229.23:38:38.70#ibcon#*before return 0, iclass 7, count 0 2006.229.23:38:38.70#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:38:38.70#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.229.23:38:38.70#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:38:38.70#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:38:38.70$vck44/vb=3,4 2006.229.23:38:38.70#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.229.23:38:38.70#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.229.23:38:38.70#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:38.70#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:38:38.76#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:38:38.76#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:38:38.76#ibcon#enter wrdev, iclass 11, count 2 2006.229.23:38:38.76#ibcon#first serial, iclass 11, count 2 2006.229.23:38:38.76#ibcon#enter sib2, iclass 11, count 2 2006.229.23:38:38.76#ibcon#flushed, iclass 11, count 2 2006.229.23:38:38.76#ibcon#about to write, iclass 11, count 2 2006.229.23:38:38.76#ibcon#wrote, iclass 11, count 2 2006.229.23:38:38.76#ibcon#about to read 3, iclass 11, count 2 2006.229.23:38:38.78#ibcon#read 3, iclass 11, count 2 2006.229.23:38:38.78#ibcon#about to read 4, iclass 11, count 2 2006.229.23:38:38.78#ibcon#read 4, iclass 11, count 2 2006.229.23:38:38.78#ibcon#about to read 5, iclass 11, count 2 2006.229.23:38:38.78#ibcon#read 5, iclass 11, count 2 2006.229.23:38:38.78#ibcon#about to read 6, iclass 11, count 2 2006.229.23:38:38.78#ibcon#read 6, iclass 11, count 2 2006.229.23:38:38.78#ibcon#end of sib2, iclass 11, count 2 2006.229.23:38:38.78#ibcon#*mode == 0, iclass 11, count 2 2006.229.23:38:38.78#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.229.23:38:38.78#ibcon#[27=AT03-04\r\n] 2006.229.23:38:38.78#ibcon#*before write, iclass 11, count 2 2006.229.23:38:38.78#ibcon#enter sib2, iclass 11, count 2 2006.229.23:38:38.78#ibcon#flushed, iclass 11, count 2 2006.229.23:38:38.78#ibcon#about to write, iclass 11, count 2 2006.229.23:38:38.78#ibcon#wrote, iclass 11, count 2 2006.229.23:38:38.78#ibcon#about to read 3, iclass 11, count 2 2006.229.23:38:38.81#ibcon#read 3, iclass 11, count 2 2006.229.23:38:38.81#ibcon#about to read 4, iclass 11, count 2 2006.229.23:38:38.81#ibcon#read 4, iclass 11, count 2 2006.229.23:38:38.81#ibcon#about to read 5, iclass 11, count 2 2006.229.23:38:38.81#ibcon#read 5, iclass 11, count 2 2006.229.23:38:38.81#ibcon#about to read 6, iclass 11, count 2 2006.229.23:38:38.81#ibcon#read 6, iclass 11, count 2 2006.229.23:38:38.81#ibcon#end of sib2, iclass 11, count 2 2006.229.23:38:38.81#ibcon#*after write, iclass 11, count 2 2006.229.23:38:38.81#ibcon#*before return 0, iclass 11, count 2 2006.229.23:38:38.81#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:38:38.81#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.229.23:38:38.81#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.229.23:38:38.81#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:38.81#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:38:38.93#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:38:38.93#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:38:38.93#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:38:38.93#ibcon#first serial, iclass 11, count 0 2006.229.23:38:38.93#ibcon#enter sib2, iclass 11, count 0 2006.229.23:38:38.93#ibcon#flushed, iclass 11, count 0 2006.229.23:38:38.93#ibcon#about to write, iclass 11, count 0 2006.229.23:38:38.93#ibcon#wrote, iclass 11, count 0 2006.229.23:38:38.93#ibcon#about to read 3, iclass 11, count 0 2006.229.23:38:38.95#ibcon#read 3, iclass 11, count 0 2006.229.23:38:38.95#ibcon#about to read 4, iclass 11, count 0 2006.229.23:38:38.95#ibcon#read 4, iclass 11, count 0 2006.229.23:38:38.95#ibcon#about to read 5, iclass 11, count 0 2006.229.23:38:38.95#ibcon#read 5, iclass 11, count 0 2006.229.23:38:38.95#ibcon#about to read 6, iclass 11, count 0 2006.229.23:38:38.95#ibcon#read 6, iclass 11, count 0 2006.229.23:38:38.95#ibcon#end of sib2, iclass 11, count 0 2006.229.23:38:38.95#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:38:38.95#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:38:38.95#ibcon#[27=USB\r\n] 2006.229.23:38:38.95#ibcon#*before write, iclass 11, count 0 2006.229.23:38:38.95#ibcon#enter sib2, iclass 11, count 0 2006.229.23:38:38.95#ibcon#flushed, iclass 11, count 0 2006.229.23:38:38.95#ibcon#about to write, iclass 11, count 0 2006.229.23:38:38.95#ibcon#wrote, iclass 11, count 0 2006.229.23:38:38.95#ibcon#about to read 3, iclass 11, count 0 2006.229.23:38:38.98#ibcon#read 3, iclass 11, count 0 2006.229.23:38:38.98#ibcon#about to read 4, iclass 11, count 0 2006.229.23:38:38.98#ibcon#read 4, iclass 11, count 0 2006.229.23:38:38.98#ibcon#about to read 5, iclass 11, count 0 2006.229.23:38:38.98#ibcon#read 5, iclass 11, count 0 2006.229.23:38:38.98#ibcon#about to read 6, iclass 11, count 0 2006.229.23:38:38.98#ibcon#read 6, iclass 11, count 0 2006.229.23:38:38.98#ibcon#end of sib2, iclass 11, count 0 2006.229.23:38:38.98#ibcon#*after write, iclass 11, count 0 2006.229.23:38:38.98#ibcon#*before return 0, iclass 11, count 0 2006.229.23:38:38.98#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:38:38.98#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.229.23:38:38.98#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:38:38.98#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:38:38.98$vck44/vblo=4,679.99 2006.229.23:38:38.98#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.23:38:38.98#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.23:38:38.98#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:38.98#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:38.98#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:38.98#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:38.98#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:38:38.98#ibcon#first serial, iclass 13, count 0 2006.229.23:38:38.98#ibcon#enter sib2, iclass 13, count 0 2006.229.23:38:38.98#ibcon#flushed, iclass 13, count 0 2006.229.23:38:38.98#ibcon#about to write, iclass 13, count 0 2006.229.23:38:38.98#ibcon#wrote, iclass 13, count 0 2006.229.23:38:38.98#ibcon#about to read 3, iclass 13, count 0 2006.229.23:38:39.00#ibcon#read 3, iclass 13, count 0 2006.229.23:38:39.00#ibcon#about to read 4, iclass 13, count 0 2006.229.23:38:39.00#ibcon#read 4, iclass 13, count 0 2006.229.23:38:39.00#ibcon#about to read 5, iclass 13, count 0 2006.229.23:38:39.00#ibcon#read 5, iclass 13, count 0 2006.229.23:38:39.00#ibcon#about to read 6, iclass 13, count 0 2006.229.23:38:39.00#ibcon#read 6, iclass 13, count 0 2006.229.23:38:39.00#ibcon#end of sib2, iclass 13, count 0 2006.229.23:38:39.00#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:38:39.00#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:38:39.00#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:38:39.00#ibcon#*before write, iclass 13, count 0 2006.229.23:38:39.00#ibcon#enter sib2, iclass 13, count 0 2006.229.23:38:39.00#ibcon#flushed, iclass 13, count 0 2006.229.23:38:39.00#ibcon#about to write, iclass 13, count 0 2006.229.23:38:39.00#ibcon#wrote, iclass 13, count 0 2006.229.23:38:39.00#ibcon#about to read 3, iclass 13, count 0 2006.229.23:38:39.04#ibcon#read 3, iclass 13, count 0 2006.229.23:38:39.04#ibcon#about to read 4, iclass 13, count 0 2006.229.23:38:39.04#ibcon#read 4, iclass 13, count 0 2006.229.23:38:39.04#ibcon#about to read 5, iclass 13, count 0 2006.229.23:38:39.04#ibcon#read 5, iclass 13, count 0 2006.229.23:38:39.04#ibcon#about to read 6, iclass 13, count 0 2006.229.23:38:39.04#ibcon#read 6, iclass 13, count 0 2006.229.23:38:39.04#ibcon#end of sib2, iclass 13, count 0 2006.229.23:38:39.04#ibcon#*after write, iclass 13, count 0 2006.229.23:38:39.04#ibcon#*before return 0, iclass 13, count 0 2006.229.23:38:39.04#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:39.04#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:38:39.04#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:38:39.04#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:38:39.04$vck44/vb=4,4 2006.229.23:38:39.04#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.229.23:38:39.04#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.229.23:38:39.04#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:39.04#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:39.10#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:39.10#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:39.10#ibcon#enter wrdev, iclass 15, count 2 2006.229.23:38:39.10#ibcon#first serial, iclass 15, count 2 2006.229.23:38:39.10#ibcon#enter sib2, iclass 15, count 2 2006.229.23:38:39.10#ibcon#flushed, iclass 15, count 2 2006.229.23:38:39.10#ibcon#about to write, iclass 15, count 2 2006.229.23:38:39.10#ibcon#wrote, iclass 15, count 2 2006.229.23:38:39.10#ibcon#about to read 3, iclass 15, count 2 2006.229.23:38:39.12#ibcon#read 3, iclass 15, count 2 2006.229.23:38:39.12#ibcon#about to read 4, iclass 15, count 2 2006.229.23:38:39.12#ibcon#read 4, iclass 15, count 2 2006.229.23:38:39.12#ibcon#about to read 5, iclass 15, count 2 2006.229.23:38:39.12#ibcon#read 5, iclass 15, count 2 2006.229.23:38:39.12#ibcon#about to read 6, iclass 15, count 2 2006.229.23:38:39.12#ibcon#read 6, iclass 15, count 2 2006.229.23:38:39.12#ibcon#end of sib2, iclass 15, count 2 2006.229.23:38:39.12#ibcon#*mode == 0, iclass 15, count 2 2006.229.23:38:39.12#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.229.23:38:39.12#ibcon#[27=AT04-04\r\n] 2006.229.23:38:39.12#ibcon#*before write, iclass 15, count 2 2006.229.23:38:39.12#ibcon#enter sib2, iclass 15, count 2 2006.229.23:38:39.12#ibcon#flushed, iclass 15, count 2 2006.229.23:38:39.12#ibcon#about to write, iclass 15, count 2 2006.229.23:38:39.12#ibcon#wrote, iclass 15, count 2 2006.229.23:38:39.12#ibcon#about to read 3, iclass 15, count 2 2006.229.23:38:39.15#ibcon#read 3, iclass 15, count 2 2006.229.23:38:39.15#ibcon#about to read 4, iclass 15, count 2 2006.229.23:38:39.15#ibcon#read 4, iclass 15, count 2 2006.229.23:38:39.15#ibcon#about to read 5, iclass 15, count 2 2006.229.23:38:39.15#ibcon#read 5, iclass 15, count 2 2006.229.23:38:39.15#ibcon#about to read 6, iclass 15, count 2 2006.229.23:38:39.15#ibcon#read 6, iclass 15, count 2 2006.229.23:38:39.15#ibcon#end of sib2, iclass 15, count 2 2006.229.23:38:39.15#ibcon#*after write, iclass 15, count 2 2006.229.23:38:39.15#ibcon#*before return 0, iclass 15, count 2 2006.229.23:38:39.15#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:39.15#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.229.23:38:39.15#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.229.23:38:39.15#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:39.15#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:39.27#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:39.27#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:39.27#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:38:39.27#ibcon#first serial, iclass 15, count 0 2006.229.23:38:39.27#ibcon#enter sib2, iclass 15, count 0 2006.229.23:38:39.27#ibcon#flushed, iclass 15, count 0 2006.229.23:38:39.27#ibcon#about to write, iclass 15, count 0 2006.229.23:38:39.27#ibcon#wrote, iclass 15, count 0 2006.229.23:38:39.27#ibcon#about to read 3, iclass 15, count 0 2006.229.23:38:39.29#ibcon#read 3, iclass 15, count 0 2006.229.23:38:39.29#ibcon#about to read 4, iclass 15, count 0 2006.229.23:38:39.29#ibcon#read 4, iclass 15, count 0 2006.229.23:38:39.29#ibcon#about to read 5, iclass 15, count 0 2006.229.23:38:39.29#ibcon#read 5, iclass 15, count 0 2006.229.23:38:39.29#ibcon#about to read 6, iclass 15, count 0 2006.229.23:38:39.29#ibcon#read 6, iclass 15, count 0 2006.229.23:38:39.29#ibcon#end of sib2, iclass 15, count 0 2006.229.23:38:39.29#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:38:39.29#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:38:39.29#ibcon#[27=USB\r\n] 2006.229.23:38:39.29#ibcon#*before write, iclass 15, count 0 2006.229.23:38:39.29#ibcon#enter sib2, iclass 15, count 0 2006.229.23:38:39.29#ibcon#flushed, iclass 15, count 0 2006.229.23:38:39.29#ibcon#about to write, iclass 15, count 0 2006.229.23:38:39.29#ibcon#wrote, iclass 15, count 0 2006.229.23:38:39.29#ibcon#about to read 3, iclass 15, count 0 2006.229.23:38:39.32#ibcon#read 3, iclass 15, count 0 2006.229.23:38:39.32#ibcon#about to read 4, iclass 15, count 0 2006.229.23:38:39.32#ibcon#read 4, iclass 15, count 0 2006.229.23:38:39.32#ibcon#about to read 5, iclass 15, count 0 2006.229.23:38:39.32#ibcon#read 5, iclass 15, count 0 2006.229.23:38:39.32#ibcon#about to read 6, iclass 15, count 0 2006.229.23:38:39.32#ibcon#read 6, iclass 15, count 0 2006.229.23:38:39.32#ibcon#end of sib2, iclass 15, count 0 2006.229.23:38:39.32#ibcon#*after write, iclass 15, count 0 2006.229.23:38:39.32#ibcon#*before return 0, iclass 15, count 0 2006.229.23:38:39.32#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:39.32#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.229.23:38:39.32#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:38:39.32#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:38:39.32$vck44/vblo=5,709.99 2006.229.23:38:39.32#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.229.23:38:39.32#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.229.23:38:39.32#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:39.32#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:39.32#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:39.32#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:39.32#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:38:39.32#ibcon#first serial, iclass 17, count 0 2006.229.23:38:39.32#ibcon#enter sib2, iclass 17, count 0 2006.229.23:38:39.32#ibcon#flushed, iclass 17, count 0 2006.229.23:38:39.32#ibcon#about to write, iclass 17, count 0 2006.229.23:38:39.32#ibcon#wrote, iclass 17, count 0 2006.229.23:38:39.32#ibcon#about to read 3, iclass 17, count 0 2006.229.23:38:39.34#ibcon#read 3, iclass 17, count 0 2006.229.23:38:39.34#ibcon#about to read 4, iclass 17, count 0 2006.229.23:38:39.34#ibcon#read 4, iclass 17, count 0 2006.229.23:38:39.34#ibcon#about to read 5, iclass 17, count 0 2006.229.23:38:39.34#ibcon#read 5, iclass 17, count 0 2006.229.23:38:39.34#ibcon#about to read 6, iclass 17, count 0 2006.229.23:38:39.34#ibcon#read 6, iclass 17, count 0 2006.229.23:38:39.34#ibcon#end of sib2, iclass 17, count 0 2006.229.23:38:39.34#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:38:39.34#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:38:39.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:38:39.34#ibcon#*before write, iclass 17, count 0 2006.229.23:38:39.34#ibcon#enter sib2, iclass 17, count 0 2006.229.23:38:39.34#ibcon#flushed, iclass 17, count 0 2006.229.23:38:39.34#ibcon#about to write, iclass 17, count 0 2006.229.23:38:39.34#ibcon#wrote, iclass 17, count 0 2006.229.23:38:39.34#ibcon#about to read 3, iclass 17, count 0 2006.229.23:38:39.38#ibcon#read 3, iclass 17, count 0 2006.229.23:38:39.38#ibcon#about to read 4, iclass 17, count 0 2006.229.23:38:39.38#ibcon#read 4, iclass 17, count 0 2006.229.23:38:39.38#ibcon#about to read 5, iclass 17, count 0 2006.229.23:38:39.38#ibcon#read 5, iclass 17, count 0 2006.229.23:38:39.38#ibcon#about to read 6, iclass 17, count 0 2006.229.23:38:39.38#ibcon#read 6, iclass 17, count 0 2006.229.23:38:39.38#ibcon#end of sib2, iclass 17, count 0 2006.229.23:38:39.38#ibcon#*after write, iclass 17, count 0 2006.229.23:38:39.38#ibcon#*before return 0, iclass 17, count 0 2006.229.23:38:39.38#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:39.38#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.229.23:38:39.38#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:38:39.38#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:38:39.38$vck44/vb=5,4 2006.229.23:38:39.38#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.229.23:38:39.38#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.229.23:38:39.38#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:39.38#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:39.44#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:39.44#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:39.44#ibcon#enter wrdev, iclass 19, count 2 2006.229.23:38:39.44#ibcon#first serial, iclass 19, count 2 2006.229.23:38:39.44#ibcon#enter sib2, iclass 19, count 2 2006.229.23:38:39.44#ibcon#flushed, iclass 19, count 2 2006.229.23:38:39.44#ibcon#about to write, iclass 19, count 2 2006.229.23:38:39.44#ibcon#wrote, iclass 19, count 2 2006.229.23:38:39.44#ibcon#about to read 3, iclass 19, count 2 2006.229.23:38:39.46#ibcon#read 3, iclass 19, count 2 2006.229.23:38:39.46#ibcon#about to read 4, iclass 19, count 2 2006.229.23:38:39.46#ibcon#read 4, iclass 19, count 2 2006.229.23:38:39.46#ibcon#about to read 5, iclass 19, count 2 2006.229.23:38:39.46#ibcon#read 5, iclass 19, count 2 2006.229.23:38:39.46#ibcon#about to read 6, iclass 19, count 2 2006.229.23:38:39.46#ibcon#read 6, iclass 19, count 2 2006.229.23:38:39.46#ibcon#end of sib2, iclass 19, count 2 2006.229.23:38:39.46#ibcon#*mode == 0, iclass 19, count 2 2006.229.23:38:39.46#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.229.23:38:39.46#ibcon#[27=AT05-04\r\n] 2006.229.23:38:39.46#ibcon#*before write, iclass 19, count 2 2006.229.23:38:39.46#ibcon#enter sib2, iclass 19, count 2 2006.229.23:38:39.46#ibcon#flushed, iclass 19, count 2 2006.229.23:38:39.46#ibcon#about to write, iclass 19, count 2 2006.229.23:38:39.46#ibcon#wrote, iclass 19, count 2 2006.229.23:38:39.46#ibcon#about to read 3, iclass 19, count 2 2006.229.23:38:39.49#ibcon#read 3, iclass 19, count 2 2006.229.23:38:39.49#ibcon#about to read 4, iclass 19, count 2 2006.229.23:38:39.49#ibcon#read 4, iclass 19, count 2 2006.229.23:38:39.49#ibcon#about to read 5, iclass 19, count 2 2006.229.23:38:39.49#ibcon#read 5, iclass 19, count 2 2006.229.23:38:39.49#ibcon#about to read 6, iclass 19, count 2 2006.229.23:38:39.49#ibcon#read 6, iclass 19, count 2 2006.229.23:38:39.49#ibcon#end of sib2, iclass 19, count 2 2006.229.23:38:39.49#ibcon#*after write, iclass 19, count 2 2006.229.23:38:39.49#ibcon#*before return 0, iclass 19, count 2 2006.229.23:38:39.49#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:39.49#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.229.23:38:39.49#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.229.23:38:39.49#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:39.49#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:39.61#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:39.61#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:39.61#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:38:39.61#ibcon#first serial, iclass 19, count 0 2006.229.23:38:39.61#ibcon#enter sib2, iclass 19, count 0 2006.229.23:38:39.61#ibcon#flushed, iclass 19, count 0 2006.229.23:38:39.61#ibcon#about to write, iclass 19, count 0 2006.229.23:38:39.61#ibcon#wrote, iclass 19, count 0 2006.229.23:38:39.61#ibcon#about to read 3, iclass 19, count 0 2006.229.23:38:39.63#ibcon#read 3, iclass 19, count 0 2006.229.23:38:39.63#ibcon#about to read 4, iclass 19, count 0 2006.229.23:38:39.63#ibcon#read 4, iclass 19, count 0 2006.229.23:38:39.63#ibcon#about to read 5, iclass 19, count 0 2006.229.23:38:39.63#ibcon#read 5, iclass 19, count 0 2006.229.23:38:39.63#ibcon#about to read 6, iclass 19, count 0 2006.229.23:38:39.63#ibcon#read 6, iclass 19, count 0 2006.229.23:38:39.63#ibcon#end of sib2, iclass 19, count 0 2006.229.23:38:39.63#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:38:39.63#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:38:39.63#ibcon#[27=USB\r\n] 2006.229.23:38:39.63#ibcon#*before write, iclass 19, count 0 2006.229.23:38:39.63#ibcon#enter sib2, iclass 19, count 0 2006.229.23:38:39.63#ibcon#flushed, iclass 19, count 0 2006.229.23:38:39.63#ibcon#about to write, iclass 19, count 0 2006.229.23:38:39.63#ibcon#wrote, iclass 19, count 0 2006.229.23:38:39.63#ibcon#about to read 3, iclass 19, count 0 2006.229.23:38:39.66#ibcon#read 3, iclass 19, count 0 2006.229.23:38:39.66#ibcon#about to read 4, iclass 19, count 0 2006.229.23:38:39.66#ibcon#read 4, iclass 19, count 0 2006.229.23:38:39.66#ibcon#about to read 5, iclass 19, count 0 2006.229.23:38:39.66#ibcon#read 5, iclass 19, count 0 2006.229.23:38:39.66#ibcon#about to read 6, iclass 19, count 0 2006.229.23:38:39.66#ibcon#read 6, iclass 19, count 0 2006.229.23:38:39.66#ibcon#end of sib2, iclass 19, count 0 2006.229.23:38:39.66#ibcon#*after write, iclass 19, count 0 2006.229.23:38:39.66#ibcon#*before return 0, iclass 19, count 0 2006.229.23:38:39.66#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:39.66#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.229.23:38:39.66#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:38:39.66#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:38:39.66$vck44/vblo=6,719.99 2006.229.23:38:39.66#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.229.23:38:39.66#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.229.23:38:39.66#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:39.66#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:39.66#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:39.66#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:39.66#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:38:39.66#ibcon#first serial, iclass 21, count 0 2006.229.23:38:39.66#ibcon#enter sib2, iclass 21, count 0 2006.229.23:38:39.66#ibcon#flushed, iclass 21, count 0 2006.229.23:38:39.66#ibcon#about to write, iclass 21, count 0 2006.229.23:38:39.66#ibcon#wrote, iclass 21, count 0 2006.229.23:38:39.66#ibcon#about to read 3, iclass 21, count 0 2006.229.23:38:39.68#ibcon#read 3, iclass 21, count 0 2006.229.23:38:39.68#ibcon#about to read 4, iclass 21, count 0 2006.229.23:38:39.68#ibcon#read 4, iclass 21, count 0 2006.229.23:38:39.68#ibcon#about to read 5, iclass 21, count 0 2006.229.23:38:39.68#ibcon#read 5, iclass 21, count 0 2006.229.23:38:39.68#ibcon#about to read 6, iclass 21, count 0 2006.229.23:38:39.68#ibcon#read 6, iclass 21, count 0 2006.229.23:38:39.68#ibcon#end of sib2, iclass 21, count 0 2006.229.23:38:39.68#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:38:39.68#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:38:39.68#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:38:39.68#ibcon#*before write, iclass 21, count 0 2006.229.23:38:39.68#ibcon#enter sib2, iclass 21, count 0 2006.229.23:38:39.68#ibcon#flushed, iclass 21, count 0 2006.229.23:38:39.68#ibcon#about to write, iclass 21, count 0 2006.229.23:38:39.68#ibcon#wrote, iclass 21, count 0 2006.229.23:38:39.68#ibcon#about to read 3, iclass 21, count 0 2006.229.23:38:39.72#ibcon#read 3, iclass 21, count 0 2006.229.23:38:39.72#ibcon#about to read 4, iclass 21, count 0 2006.229.23:38:39.72#ibcon#read 4, iclass 21, count 0 2006.229.23:38:39.72#ibcon#about to read 5, iclass 21, count 0 2006.229.23:38:39.72#ibcon#read 5, iclass 21, count 0 2006.229.23:38:39.72#ibcon#about to read 6, iclass 21, count 0 2006.229.23:38:39.72#ibcon#read 6, iclass 21, count 0 2006.229.23:38:39.72#ibcon#end of sib2, iclass 21, count 0 2006.229.23:38:39.72#ibcon#*after write, iclass 21, count 0 2006.229.23:38:39.72#ibcon#*before return 0, iclass 21, count 0 2006.229.23:38:39.72#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:39.72#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.229.23:38:39.72#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:38:39.72#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:38:39.72$vck44/vb=6,4 2006.229.23:38:39.72#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.229.23:38:39.72#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.229.23:38:39.72#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:39.72#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:39.78#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:39.78#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:39.78#ibcon#enter wrdev, iclass 23, count 2 2006.229.23:38:39.78#ibcon#first serial, iclass 23, count 2 2006.229.23:38:39.78#ibcon#enter sib2, iclass 23, count 2 2006.229.23:38:39.78#ibcon#flushed, iclass 23, count 2 2006.229.23:38:39.78#ibcon#about to write, iclass 23, count 2 2006.229.23:38:39.78#ibcon#wrote, iclass 23, count 2 2006.229.23:38:39.78#ibcon#about to read 3, iclass 23, count 2 2006.229.23:38:39.80#ibcon#read 3, iclass 23, count 2 2006.229.23:38:39.80#ibcon#about to read 4, iclass 23, count 2 2006.229.23:38:39.80#ibcon#read 4, iclass 23, count 2 2006.229.23:38:39.80#ibcon#about to read 5, iclass 23, count 2 2006.229.23:38:39.80#ibcon#read 5, iclass 23, count 2 2006.229.23:38:39.80#ibcon#about to read 6, iclass 23, count 2 2006.229.23:38:39.80#ibcon#read 6, iclass 23, count 2 2006.229.23:38:39.80#ibcon#end of sib2, iclass 23, count 2 2006.229.23:38:39.80#ibcon#*mode == 0, iclass 23, count 2 2006.229.23:38:39.80#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.229.23:38:39.80#ibcon#[27=AT06-04\r\n] 2006.229.23:38:39.80#ibcon#*before write, iclass 23, count 2 2006.229.23:38:39.80#ibcon#enter sib2, iclass 23, count 2 2006.229.23:38:39.80#ibcon#flushed, iclass 23, count 2 2006.229.23:38:39.80#ibcon#about to write, iclass 23, count 2 2006.229.23:38:39.80#ibcon#wrote, iclass 23, count 2 2006.229.23:38:39.80#ibcon#about to read 3, iclass 23, count 2 2006.229.23:38:39.83#ibcon#read 3, iclass 23, count 2 2006.229.23:38:39.83#ibcon#about to read 4, iclass 23, count 2 2006.229.23:38:39.83#ibcon#read 4, iclass 23, count 2 2006.229.23:38:39.83#ibcon#about to read 5, iclass 23, count 2 2006.229.23:38:39.83#ibcon#read 5, iclass 23, count 2 2006.229.23:38:39.83#ibcon#about to read 6, iclass 23, count 2 2006.229.23:38:39.83#ibcon#read 6, iclass 23, count 2 2006.229.23:38:39.83#ibcon#end of sib2, iclass 23, count 2 2006.229.23:38:39.83#ibcon#*after write, iclass 23, count 2 2006.229.23:38:39.83#ibcon#*before return 0, iclass 23, count 2 2006.229.23:38:39.83#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:39.83#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.229.23:38:39.83#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.229.23:38:39.83#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:39.83#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:39.95#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:39.95#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:39.95#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:38:39.95#ibcon#first serial, iclass 23, count 0 2006.229.23:38:39.95#ibcon#enter sib2, iclass 23, count 0 2006.229.23:38:39.95#ibcon#flushed, iclass 23, count 0 2006.229.23:38:39.95#ibcon#about to write, iclass 23, count 0 2006.229.23:38:39.95#ibcon#wrote, iclass 23, count 0 2006.229.23:38:39.95#ibcon#about to read 3, iclass 23, count 0 2006.229.23:38:39.97#ibcon#read 3, iclass 23, count 0 2006.229.23:38:39.97#ibcon#about to read 4, iclass 23, count 0 2006.229.23:38:39.97#ibcon#read 4, iclass 23, count 0 2006.229.23:38:39.97#ibcon#about to read 5, iclass 23, count 0 2006.229.23:38:39.97#ibcon#read 5, iclass 23, count 0 2006.229.23:38:39.97#ibcon#about to read 6, iclass 23, count 0 2006.229.23:38:39.97#ibcon#read 6, iclass 23, count 0 2006.229.23:38:39.97#ibcon#end of sib2, iclass 23, count 0 2006.229.23:38:39.97#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:38:39.97#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:38:39.97#ibcon#[27=USB\r\n] 2006.229.23:38:39.97#ibcon#*before write, iclass 23, count 0 2006.229.23:38:39.97#ibcon#enter sib2, iclass 23, count 0 2006.229.23:38:39.97#ibcon#flushed, iclass 23, count 0 2006.229.23:38:39.97#ibcon#about to write, iclass 23, count 0 2006.229.23:38:39.97#ibcon#wrote, iclass 23, count 0 2006.229.23:38:39.97#ibcon#about to read 3, iclass 23, count 0 2006.229.23:38:40.00#ibcon#read 3, iclass 23, count 0 2006.229.23:38:40.00#ibcon#about to read 4, iclass 23, count 0 2006.229.23:38:40.00#ibcon#read 4, iclass 23, count 0 2006.229.23:38:40.00#ibcon#about to read 5, iclass 23, count 0 2006.229.23:38:40.00#ibcon#read 5, iclass 23, count 0 2006.229.23:38:40.00#ibcon#about to read 6, iclass 23, count 0 2006.229.23:38:40.00#ibcon#read 6, iclass 23, count 0 2006.229.23:38:40.00#ibcon#end of sib2, iclass 23, count 0 2006.229.23:38:40.00#ibcon#*after write, iclass 23, count 0 2006.229.23:38:40.00#ibcon#*before return 0, iclass 23, count 0 2006.229.23:38:40.00#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:40.00#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.229.23:38:40.00#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:38:40.00#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:38:40.00$vck44/vblo=7,734.99 2006.229.23:38:40.00#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.229.23:38:40.00#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.229.23:38:40.00#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:40.00#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:40.00#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:40.00#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:40.00#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:38:40.00#ibcon#first serial, iclass 25, count 0 2006.229.23:38:40.00#ibcon#enter sib2, iclass 25, count 0 2006.229.23:38:40.00#ibcon#flushed, iclass 25, count 0 2006.229.23:38:40.00#ibcon#about to write, iclass 25, count 0 2006.229.23:38:40.00#ibcon#wrote, iclass 25, count 0 2006.229.23:38:40.00#ibcon#about to read 3, iclass 25, count 0 2006.229.23:38:40.02#ibcon#read 3, iclass 25, count 0 2006.229.23:38:40.02#ibcon#about to read 4, iclass 25, count 0 2006.229.23:38:40.02#ibcon#read 4, iclass 25, count 0 2006.229.23:38:40.02#ibcon#about to read 5, iclass 25, count 0 2006.229.23:38:40.02#ibcon#read 5, iclass 25, count 0 2006.229.23:38:40.02#ibcon#about to read 6, iclass 25, count 0 2006.229.23:38:40.02#ibcon#read 6, iclass 25, count 0 2006.229.23:38:40.02#ibcon#end of sib2, iclass 25, count 0 2006.229.23:38:40.02#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:38:40.02#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:38:40.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:38:40.02#ibcon#*before write, iclass 25, count 0 2006.229.23:38:40.02#ibcon#enter sib2, iclass 25, count 0 2006.229.23:38:40.02#ibcon#flushed, iclass 25, count 0 2006.229.23:38:40.02#ibcon#about to write, iclass 25, count 0 2006.229.23:38:40.02#ibcon#wrote, iclass 25, count 0 2006.229.23:38:40.02#ibcon#about to read 3, iclass 25, count 0 2006.229.23:38:40.06#ibcon#read 3, iclass 25, count 0 2006.229.23:38:40.06#ibcon#about to read 4, iclass 25, count 0 2006.229.23:38:40.06#ibcon#read 4, iclass 25, count 0 2006.229.23:38:40.06#ibcon#about to read 5, iclass 25, count 0 2006.229.23:38:40.06#ibcon#read 5, iclass 25, count 0 2006.229.23:38:40.06#ibcon#about to read 6, iclass 25, count 0 2006.229.23:38:40.06#ibcon#read 6, iclass 25, count 0 2006.229.23:38:40.06#ibcon#end of sib2, iclass 25, count 0 2006.229.23:38:40.06#ibcon#*after write, iclass 25, count 0 2006.229.23:38:40.06#ibcon#*before return 0, iclass 25, count 0 2006.229.23:38:40.06#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:40.06#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.229.23:38:40.06#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:38:40.06#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:38:40.06$vck44/vb=7,4 2006.229.23:38:40.06#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.229.23:38:40.06#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.229.23:38:40.06#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:40.06#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:40.12#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:40.12#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:40.12#ibcon#enter wrdev, iclass 27, count 2 2006.229.23:38:40.12#ibcon#first serial, iclass 27, count 2 2006.229.23:38:40.12#ibcon#enter sib2, iclass 27, count 2 2006.229.23:38:40.12#ibcon#flushed, iclass 27, count 2 2006.229.23:38:40.12#ibcon#about to write, iclass 27, count 2 2006.229.23:38:40.12#ibcon#wrote, iclass 27, count 2 2006.229.23:38:40.12#ibcon#about to read 3, iclass 27, count 2 2006.229.23:38:40.14#ibcon#read 3, iclass 27, count 2 2006.229.23:38:40.14#ibcon#about to read 4, iclass 27, count 2 2006.229.23:38:40.14#ibcon#read 4, iclass 27, count 2 2006.229.23:38:40.14#ibcon#about to read 5, iclass 27, count 2 2006.229.23:38:40.14#ibcon#read 5, iclass 27, count 2 2006.229.23:38:40.14#ibcon#about to read 6, iclass 27, count 2 2006.229.23:38:40.14#ibcon#read 6, iclass 27, count 2 2006.229.23:38:40.14#ibcon#end of sib2, iclass 27, count 2 2006.229.23:38:40.14#ibcon#*mode == 0, iclass 27, count 2 2006.229.23:38:40.14#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.229.23:38:40.14#ibcon#[27=AT07-04\r\n] 2006.229.23:38:40.14#ibcon#*before write, iclass 27, count 2 2006.229.23:38:40.14#ibcon#enter sib2, iclass 27, count 2 2006.229.23:38:40.14#ibcon#flushed, iclass 27, count 2 2006.229.23:38:40.14#ibcon#about to write, iclass 27, count 2 2006.229.23:38:40.14#ibcon#wrote, iclass 27, count 2 2006.229.23:38:40.14#ibcon#about to read 3, iclass 27, count 2 2006.229.23:38:40.17#ibcon#read 3, iclass 27, count 2 2006.229.23:38:40.17#ibcon#about to read 4, iclass 27, count 2 2006.229.23:38:40.17#ibcon#read 4, iclass 27, count 2 2006.229.23:38:40.17#ibcon#about to read 5, iclass 27, count 2 2006.229.23:38:40.17#ibcon#read 5, iclass 27, count 2 2006.229.23:38:40.17#ibcon#about to read 6, iclass 27, count 2 2006.229.23:38:40.17#ibcon#read 6, iclass 27, count 2 2006.229.23:38:40.17#ibcon#end of sib2, iclass 27, count 2 2006.229.23:38:40.17#ibcon#*after write, iclass 27, count 2 2006.229.23:38:40.17#ibcon#*before return 0, iclass 27, count 2 2006.229.23:38:40.17#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:40.17#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.229.23:38:40.17#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.229.23:38:40.17#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:40.17#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:40.29#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:40.29#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:40.29#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:38:40.29#ibcon#first serial, iclass 27, count 0 2006.229.23:38:40.29#ibcon#enter sib2, iclass 27, count 0 2006.229.23:38:40.29#ibcon#flushed, iclass 27, count 0 2006.229.23:38:40.29#ibcon#about to write, iclass 27, count 0 2006.229.23:38:40.29#ibcon#wrote, iclass 27, count 0 2006.229.23:38:40.29#ibcon#about to read 3, iclass 27, count 0 2006.229.23:38:40.31#ibcon#read 3, iclass 27, count 0 2006.229.23:38:40.31#ibcon#about to read 4, iclass 27, count 0 2006.229.23:38:40.31#ibcon#read 4, iclass 27, count 0 2006.229.23:38:40.31#ibcon#about to read 5, iclass 27, count 0 2006.229.23:38:40.31#ibcon#read 5, iclass 27, count 0 2006.229.23:38:40.31#ibcon#about to read 6, iclass 27, count 0 2006.229.23:38:40.31#ibcon#read 6, iclass 27, count 0 2006.229.23:38:40.31#ibcon#end of sib2, iclass 27, count 0 2006.229.23:38:40.31#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:38:40.31#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:38:40.31#ibcon#[27=USB\r\n] 2006.229.23:38:40.31#ibcon#*before write, iclass 27, count 0 2006.229.23:38:40.31#ibcon#enter sib2, iclass 27, count 0 2006.229.23:38:40.31#ibcon#flushed, iclass 27, count 0 2006.229.23:38:40.31#ibcon#about to write, iclass 27, count 0 2006.229.23:38:40.31#ibcon#wrote, iclass 27, count 0 2006.229.23:38:40.31#ibcon#about to read 3, iclass 27, count 0 2006.229.23:38:40.34#ibcon#read 3, iclass 27, count 0 2006.229.23:38:40.34#ibcon#about to read 4, iclass 27, count 0 2006.229.23:38:40.34#ibcon#read 4, iclass 27, count 0 2006.229.23:38:40.34#ibcon#about to read 5, iclass 27, count 0 2006.229.23:38:40.34#ibcon#read 5, iclass 27, count 0 2006.229.23:38:40.34#ibcon#about to read 6, iclass 27, count 0 2006.229.23:38:40.34#ibcon#read 6, iclass 27, count 0 2006.229.23:38:40.34#ibcon#end of sib2, iclass 27, count 0 2006.229.23:38:40.34#ibcon#*after write, iclass 27, count 0 2006.229.23:38:40.34#ibcon#*before return 0, iclass 27, count 0 2006.229.23:38:40.34#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:40.34#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.229.23:38:40.34#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:38:40.34#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:38:40.34$vck44/vblo=8,744.99 2006.229.23:38:40.34#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.23:38:40.34#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.23:38:40.34#ibcon#ireg 17 cls_cnt 0 2006.229.23:38:40.34#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:40.34#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:40.34#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:40.34#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:38:40.34#ibcon#first serial, iclass 29, count 0 2006.229.23:38:40.34#ibcon#enter sib2, iclass 29, count 0 2006.229.23:38:40.34#ibcon#flushed, iclass 29, count 0 2006.229.23:38:40.34#ibcon#about to write, iclass 29, count 0 2006.229.23:38:40.34#ibcon#wrote, iclass 29, count 0 2006.229.23:38:40.34#ibcon#about to read 3, iclass 29, count 0 2006.229.23:38:40.36#ibcon#read 3, iclass 29, count 0 2006.229.23:38:40.36#ibcon#about to read 4, iclass 29, count 0 2006.229.23:38:40.36#ibcon#read 4, iclass 29, count 0 2006.229.23:38:40.36#ibcon#about to read 5, iclass 29, count 0 2006.229.23:38:40.36#ibcon#read 5, iclass 29, count 0 2006.229.23:38:40.36#ibcon#about to read 6, iclass 29, count 0 2006.229.23:38:40.36#ibcon#read 6, iclass 29, count 0 2006.229.23:38:40.36#ibcon#end of sib2, iclass 29, count 0 2006.229.23:38:40.36#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:38:40.36#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:38:40.36#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:38:40.36#ibcon#*before write, iclass 29, count 0 2006.229.23:38:40.36#ibcon#enter sib2, iclass 29, count 0 2006.229.23:38:40.36#ibcon#flushed, iclass 29, count 0 2006.229.23:38:40.36#ibcon#about to write, iclass 29, count 0 2006.229.23:38:40.36#ibcon#wrote, iclass 29, count 0 2006.229.23:38:40.36#ibcon#about to read 3, iclass 29, count 0 2006.229.23:38:40.40#ibcon#read 3, iclass 29, count 0 2006.229.23:38:40.40#ibcon#about to read 4, iclass 29, count 0 2006.229.23:38:40.40#ibcon#read 4, iclass 29, count 0 2006.229.23:38:40.40#ibcon#about to read 5, iclass 29, count 0 2006.229.23:38:40.40#ibcon#read 5, iclass 29, count 0 2006.229.23:38:40.40#ibcon#about to read 6, iclass 29, count 0 2006.229.23:38:40.40#ibcon#read 6, iclass 29, count 0 2006.229.23:38:40.40#ibcon#end of sib2, iclass 29, count 0 2006.229.23:38:40.40#ibcon#*after write, iclass 29, count 0 2006.229.23:38:40.40#ibcon#*before return 0, iclass 29, count 0 2006.229.23:38:40.40#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:40.40#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:38:40.40#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:38:40.40#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:38:40.40$vck44/vb=8,4 2006.229.23:38:40.40#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.229.23:38:40.40#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.229.23:38:40.40#ibcon#ireg 11 cls_cnt 2 2006.229.23:38:40.40#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:40.46#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:40.46#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:40.46#ibcon#enter wrdev, iclass 31, count 2 2006.229.23:38:40.46#ibcon#first serial, iclass 31, count 2 2006.229.23:38:40.46#ibcon#enter sib2, iclass 31, count 2 2006.229.23:38:40.46#ibcon#flushed, iclass 31, count 2 2006.229.23:38:40.46#ibcon#about to write, iclass 31, count 2 2006.229.23:38:40.46#ibcon#wrote, iclass 31, count 2 2006.229.23:38:40.46#ibcon#about to read 3, iclass 31, count 2 2006.229.23:38:40.48#ibcon#read 3, iclass 31, count 2 2006.229.23:38:40.48#ibcon#about to read 4, iclass 31, count 2 2006.229.23:38:40.48#ibcon#read 4, iclass 31, count 2 2006.229.23:38:40.48#ibcon#about to read 5, iclass 31, count 2 2006.229.23:38:40.48#ibcon#read 5, iclass 31, count 2 2006.229.23:38:40.48#ibcon#about to read 6, iclass 31, count 2 2006.229.23:38:40.48#ibcon#read 6, iclass 31, count 2 2006.229.23:38:40.48#ibcon#end of sib2, iclass 31, count 2 2006.229.23:38:40.48#ibcon#*mode == 0, iclass 31, count 2 2006.229.23:38:40.48#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.229.23:38:40.48#ibcon#[27=AT08-04\r\n] 2006.229.23:38:40.48#ibcon#*before write, iclass 31, count 2 2006.229.23:38:40.48#ibcon#enter sib2, iclass 31, count 2 2006.229.23:38:40.48#ibcon#flushed, iclass 31, count 2 2006.229.23:38:40.48#ibcon#about to write, iclass 31, count 2 2006.229.23:38:40.48#ibcon#wrote, iclass 31, count 2 2006.229.23:38:40.48#ibcon#about to read 3, iclass 31, count 2 2006.229.23:38:40.51#ibcon#read 3, iclass 31, count 2 2006.229.23:38:40.51#ibcon#about to read 4, iclass 31, count 2 2006.229.23:38:40.51#ibcon#read 4, iclass 31, count 2 2006.229.23:38:40.51#ibcon#about to read 5, iclass 31, count 2 2006.229.23:38:40.51#ibcon#read 5, iclass 31, count 2 2006.229.23:38:40.51#ibcon#about to read 6, iclass 31, count 2 2006.229.23:38:40.51#ibcon#read 6, iclass 31, count 2 2006.229.23:38:40.51#ibcon#end of sib2, iclass 31, count 2 2006.229.23:38:40.51#ibcon#*after write, iclass 31, count 2 2006.229.23:38:40.51#ibcon#*before return 0, iclass 31, count 2 2006.229.23:38:40.51#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:40.51#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.229.23:38:40.51#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.229.23:38:40.51#ibcon#ireg 7 cls_cnt 0 2006.229.23:38:40.51#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:40.63#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:40.63#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:40.63#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:38:40.63#ibcon#first serial, iclass 31, count 0 2006.229.23:38:40.63#ibcon#enter sib2, iclass 31, count 0 2006.229.23:38:40.63#ibcon#flushed, iclass 31, count 0 2006.229.23:38:40.63#ibcon#about to write, iclass 31, count 0 2006.229.23:38:40.63#ibcon#wrote, iclass 31, count 0 2006.229.23:38:40.63#ibcon#about to read 3, iclass 31, count 0 2006.229.23:38:40.65#ibcon#read 3, iclass 31, count 0 2006.229.23:38:40.65#ibcon#about to read 4, iclass 31, count 0 2006.229.23:38:40.65#ibcon#read 4, iclass 31, count 0 2006.229.23:38:40.65#ibcon#about to read 5, iclass 31, count 0 2006.229.23:38:40.65#ibcon#read 5, iclass 31, count 0 2006.229.23:38:40.65#ibcon#about to read 6, iclass 31, count 0 2006.229.23:38:40.65#ibcon#read 6, iclass 31, count 0 2006.229.23:38:40.65#ibcon#end of sib2, iclass 31, count 0 2006.229.23:38:40.65#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:38:40.65#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:38:40.65#ibcon#[27=USB\r\n] 2006.229.23:38:40.65#ibcon#*before write, iclass 31, count 0 2006.229.23:38:40.65#ibcon#enter sib2, iclass 31, count 0 2006.229.23:38:40.65#ibcon#flushed, iclass 31, count 0 2006.229.23:38:40.65#ibcon#about to write, iclass 31, count 0 2006.229.23:38:40.65#ibcon#wrote, iclass 31, count 0 2006.229.23:38:40.65#ibcon#about to read 3, iclass 31, count 0 2006.229.23:38:40.68#ibcon#read 3, iclass 31, count 0 2006.229.23:38:40.68#ibcon#about to read 4, iclass 31, count 0 2006.229.23:38:40.68#ibcon#read 4, iclass 31, count 0 2006.229.23:38:40.68#ibcon#about to read 5, iclass 31, count 0 2006.229.23:38:40.68#ibcon#read 5, iclass 31, count 0 2006.229.23:38:40.68#ibcon#about to read 6, iclass 31, count 0 2006.229.23:38:40.68#ibcon#read 6, iclass 31, count 0 2006.229.23:38:40.68#ibcon#end of sib2, iclass 31, count 0 2006.229.23:38:40.68#ibcon#*after write, iclass 31, count 0 2006.229.23:38:40.68#ibcon#*before return 0, iclass 31, count 0 2006.229.23:38:40.68#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:40.68#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.229.23:38:40.68#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:38:40.68#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:38:40.68$vck44/vabw=wide 2006.229.23:38:40.68#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.229.23:38:40.68#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.229.23:38:40.68#ibcon#ireg 8 cls_cnt 0 2006.229.23:38:40.68#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:40.68#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:40.68#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:40.68#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:38:40.68#ibcon#first serial, iclass 33, count 0 2006.229.23:38:40.68#ibcon#enter sib2, iclass 33, count 0 2006.229.23:38:40.68#ibcon#flushed, iclass 33, count 0 2006.229.23:38:40.68#ibcon#about to write, iclass 33, count 0 2006.229.23:38:40.68#ibcon#wrote, iclass 33, count 0 2006.229.23:38:40.68#ibcon#about to read 3, iclass 33, count 0 2006.229.23:38:40.70#ibcon#read 3, iclass 33, count 0 2006.229.23:38:40.70#ibcon#about to read 4, iclass 33, count 0 2006.229.23:38:40.70#ibcon#read 4, iclass 33, count 0 2006.229.23:38:40.70#ibcon#about to read 5, iclass 33, count 0 2006.229.23:38:40.70#ibcon#read 5, iclass 33, count 0 2006.229.23:38:40.70#ibcon#about to read 6, iclass 33, count 0 2006.229.23:38:40.70#ibcon#read 6, iclass 33, count 0 2006.229.23:38:40.70#ibcon#end of sib2, iclass 33, count 0 2006.229.23:38:40.70#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:38:40.70#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:38:40.70#ibcon#[25=BW32\r\n] 2006.229.23:38:40.70#ibcon#*before write, iclass 33, count 0 2006.229.23:38:40.70#ibcon#enter sib2, iclass 33, count 0 2006.229.23:38:40.70#ibcon#flushed, iclass 33, count 0 2006.229.23:38:40.70#ibcon#about to write, iclass 33, count 0 2006.229.23:38:40.70#ibcon#wrote, iclass 33, count 0 2006.229.23:38:40.70#ibcon#about to read 3, iclass 33, count 0 2006.229.23:38:40.73#ibcon#read 3, iclass 33, count 0 2006.229.23:38:40.73#ibcon#about to read 4, iclass 33, count 0 2006.229.23:38:40.73#ibcon#read 4, iclass 33, count 0 2006.229.23:38:40.73#ibcon#about to read 5, iclass 33, count 0 2006.229.23:38:40.73#ibcon#read 5, iclass 33, count 0 2006.229.23:38:40.73#ibcon#about to read 6, iclass 33, count 0 2006.229.23:38:40.73#ibcon#read 6, iclass 33, count 0 2006.229.23:38:40.73#ibcon#end of sib2, iclass 33, count 0 2006.229.23:38:40.73#ibcon#*after write, iclass 33, count 0 2006.229.23:38:40.73#ibcon#*before return 0, iclass 33, count 0 2006.229.23:38:40.73#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:40.73#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.229.23:38:40.73#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:38:40.73#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:38:40.73$vck44/vbbw=wide 2006.229.23:38:40.73#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:38:40.73#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:38:40.73#ibcon#ireg 8 cls_cnt 0 2006.229.23:38:40.73#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:38:40.80#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:38:40.80#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:38:40.80#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:38:40.80#ibcon#first serial, iclass 35, count 0 2006.229.23:38:40.80#ibcon#enter sib2, iclass 35, count 0 2006.229.23:38:40.80#ibcon#flushed, iclass 35, count 0 2006.229.23:38:40.80#ibcon#about to write, iclass 35, count 0 2006.229.23:38:40.80#ibcon#wrote, iclass 35, count 0 2006.229.23:38:40.80#ibcon#about to read 3, iclass 35, count 0 2006.229.23:38:40.82#ibcon#read 3, iclass 35, count 0 2006.229.23:38:40.82#ibcon#about to read 4, iclass 35, count 0 2006.229.23:38:40.82#ibcon#read 4, iclass 35, count 0 2006.229.23:38:40.82#ibcon#about to read 5, iclass 35, count 0 2006.229.23:38:40.82#ibcon#read 5, iclass 35, count 0 2006.229.23:38:40.82#ibcon#about to read 6, iclass 35, count 0 2006.229.23:38:40.82#ibcon#read 6, iclass 35, count 0 2006.229.23:38:40.82#ibcon#end of sib2, iclass 35, count 0 2006.229.23:38:40.82#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:38:40.82#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:38:40.82#ibcon#[27=BW32\r\n] 2006.229.23:38:40.82#ibcon#*before write, iclass 35, count 0 2006.229.23:38:40.82#ibcon#enter sib2, iclass 35, count 0 2006.229.23:38:40.82#ibcon#flushed, iclass 35, count 0 2006.229.23:38:40.82#ibcon#about to write, iclass 35, count 0 2006.229.23:38:40.82#ibcon#wrote, iclass 35, count 0 2006.229.23:38:40.82#ibcon#about to read 3, iclass 35, count 0 2006.229.23:38:40.85#ibcon#read 3, iclass 35, count 0 2006.229.23:38:40.85#ibcon#about to read 4, iclass 35, count 0 2006.229.23:38:40.85#ibcon#read 4, iclass 35, count 0 2006.229.23:38:40.85#ibcon#about to read 5, iclass 35, count 0 2006.229.23:38:40.85#ibcon#read 5, iclass 35, count 0 2006.229.23:38:40.85#ibcon#about to read 6, iclass 35, count 0 2006.229.23:38:40.85#ibcon#read 6, iclass 35, count 0 2006.229.23:38:40.85#ibcon#end of sib2, iclass 35, count 0 2006.229.23:38:40.85#ibcon#*after write, iclass 35, count 0 2006.229.23:38:40.85#ibcon#*before return 0, iclass 35, count 0 2006.229.23:38:40.85#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:38:40.85#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:38:40.85#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:38:40.85#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:38:40.85$setupk4/ifdk4 2006.229.23:38:40.85$ifdk4/lo= 2006.229.23:38:40.85$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:38:40.85$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:38:40.85$ifdk4/patch= 2006.229.23:38:40.85$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:38:40.85$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:38:40.85$setupk4/!*+20s 2006.229.23:38:45.96#abcon#<5=/08 1.7 5.5 30.12 831002.6\r\n> 2006.229.23:38:45.98#abcon#{5=INTERFACE CLEAR} 2006.229.23:38:46.04#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:38:55.36$setupk4/"tpicd 2006.229.23:38:55.36$setupk4/echo=off 2006.229.23:38:55.36$setupk4/xlog=off 2006.229.23:38:55.36:!2006.229.23:40:24 2006.229.23:39:12.14#trakl#Source acquired 2006.229.23:39:12.14#flagr#flagr/antenna,acquired 2006.229.23:40:24.00:preob 2006.229.23:40:25.14/onsource/TRACKING 2006.229.23:40:25.14:!2006.229.23:40:34 2006.229.23:40:34.00:"tape 2006.229.23:40:34.00:"st=record 2006.229.23:40:34.00:data_valid=on 2006.229.23:40:34.00:midob 2006.229.23:40:34.14/onsource/TRACKING 2006.229.23:40:34.14/wx/30.14,1002.6,85 2006.229.23:40:34.23/cable/+6.4097E-03 2006.229.23:40:35.32/va/01,08,usb,yes,30,32 2006.229.23:40:35.32/va/02,07,usb,yes,32,33 2006.229.23:40:35.32/va/03,06,usb,yes,40,42 2006.229.23:40:35.32/va/04,07,usb,yes,33,35 2006.229.23:40:35.32/va/05,04,usb,yes,29,30 2006.229.23:40:35.32/va/06,04,usb,yes,33,33 2006.229.23:40:35.32/va/07,05,usb,yes,29,30 2006.229.23:40:35.32/va/08,06,usb,yes,21,26 2006.229.23:40:35.55/valo/01,524.99,yes,locked 2006.229.23:40:35.55/valo/02,534.99,yes,locked 2006.229.23:40:35.55/valo/03,564.99,yes,locked 2006.229.23:40:35.55/valo/04,624.99,yes,locked 2006.229.23:40:35.55/valo/05,734.99,yes,locked 2006.229.23:40:35.55/valo/06,814.99,yes,locked 2006.229.23:40:35.55/valo/07,864.99,yes,locked 2006.229.23:40:35.55/valo/08,884.99,yes,locked 2006.229.23:40:36.64/vb/01,04,usb,yes,32,29 2006.229.23:40:36.64/vb/02,04,usb,yes,34,34 2006.229.23:40:36.64/vb/03,04,usb,yes,30,34 2006.229.23:40:36.64/vb/04,04,usb,yes,35,34 2006.229.23:40:36.64/vb/05,04,usb,yes,27,30 2006.229.23:40:36.64/vb/06,04,usb,yes,32,28 2006.229.23:40:36.64/vb/07,04,usb,yes,32,31 2006.229.23:40:36.64/vb/08,04,usb,yes,29,32 2006.229.23:40:36.88/vblo/01,629.99,yes,locked 2006.229.23:40:36.88/vblo/02,634.99,yes,locked 2006.229.23:40:36.88/vblo/03,649.99,yes,locked 2006.229.23:40:36.88/vblo/04,679.99,yes,locked 2006.229.23:40:36.88/vblo/05,709.99,yes,locked 2006.229.23:40:36.88/vblo/06,719.99,yes,locked 2006.229.23:40:36.88/vblo/07,734.99,yes,locked 2006.229.23:40:36.88/vblo/08,744.99,yes,locked 2006.229.23:40:37.03/vabw/8 2006.229.23:40:37.18/vbbw/8 2006.229.23:40:37.27/xfe/off,on,12.2 2006.229.23:40:37.65/ifatt/23,28,28,28 2006.229.23:40:38.08/fmout-gps/S +4.54E-07 2006.229.23:40:38.12:!2006.229.23:43:14 2006.229.23:43:14.01:data_valid=off 2006.229.23:43:14.01:"et 2006.229.23:43:14.02:!+3s 2006.229.23:43:17.03:"tape 2006.229.23:43:17.03:postob 2006.229.23:43:17.23/cable/+6.4095E-03 2006.229.23:43:17.23/wx/30.14,1002.6,83 2006.229.23:43:17.29/fmout-gps/S +4.52E-07 2006.229.23:43:17.29:scan_name=229-2345,jd0608,50 2006.229.23:43:17.29:source=0552+398,055530.81,394849.2,2000.0,cw 2006.229.23:43:19.14#flagr#flagr/antenna,new-source 2006.229.23:43:19.14:checkk5 2006.229.23:43:19.53/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:43:19.93/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:43:20.33/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:43:20.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:43:21.09/chk_obsdata//k5ts1/T2292340??a.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.23:43:21.48/chk_obsdata//k5ts2/T2292340??b.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.23:43:21.88/chk_obsdata//k5ts3/T2292340??c.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.23:43:22.30/chk_obsdata//k5ts4/T2292340??d.dat file size is correct (nominal:640MB, actual:636MB). 2006.229.23:43:23.01/k5log//k5ts1_log_newline 2006.229.23:43:23.72/k5log//k5ts2_log_newline 2006.229.23:43:24.42/k5log//k5ts3_log_newline 2006.229.23:43:25.12/k5log//k5ts4_log_newline 2006.229.23:43:25.14/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:43:25.15:setupk4=1 2006.229.23:43:25.15$setupk4/echo=on 2006.229.23:43:25.15$setupk4/pcalon 2006.229.23:43:25.15$pcalon/"no phase cal control is implemented here 2006.229.23:43:25.15$setupk4/"tpicd=stop 2006.229.23:43:25.15$setupk4/"rec=synch_on 2006.229.23:43:25.15$setupk4/"rec_mode=128 2006.229.23:43:25.15$setupk4/!* 2006.229.23:43:25.15$setupk4/recpk4 2006.229.23:43:25.15$recpk4/recpatch= 2006.229.23:43:25.15$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:43:25.15$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:43:25.15$setupk4/vck44 2006.229.23:43:25.15$vck44/valo=1,524.99 2006.229.23:43:25.15#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.23:43:25.15#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.23:43:25.15#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:25.15#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:25.15#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:25.15#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:25.15#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:43:25.15#ibcon#first serial, iclass 6, count 0 2006.229.23:43:25.15#ibcon#enter sib2, iclass 6, count 0 2006.229.23:43:25.15#ibcon#flushed, iclass 6, count 0 2006.229.23:43:25.15#ibcon#about to write, iclass 6, count 0 2006.229.23:43:25.15#ibcon#wrote, iclass 6, count 0 2006.229.23:43:25.15#ibcon#about to read 3, iclass 6, count 0 2006.229.23:43:25.17#ibcon#read 3, iclass 6, count 0 2006.229.23:43:25.17#ibcon#about to read 4, iclass 6, count 0 2006.229.23:43:25.17#ibcon#read 4, iclass 6, count 0 2006.229.23:43:25.17#ibcon#about to read 5, iclass 6, count 0 2006.229.23:43:25.17#ibcon#read 5, iclass 6, count 0 2006.229.23:43:25.17#ibcon#about to read 6, iclass 6, count 0 2006.229.23:43:25.17#ibcon#read 6, iclass 6, count 0 2006.229.23:43:25.17#ibcon#end of sib2, iclass 6, count 0 2006.229.23:43:25.17#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:43:25.17#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:43:25.17#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:43:25.17#ibcon#*before write, iclass 6, count 0 2006.229.23:43:25.17#ibcon#enter sib2, iclass 6, count 0 2006.229.23:43:25.17#ibcon#flushed, iclass 6, count 0 2006.229.23:43:25.17#ibcon#about to write, iclass 6, count 0 2006.229.23:43:25.17#ibcon#wrote, iclass 6, count 0 2006.229.23:43:25.17#ibcon#about to read 3, iclass 6, count 0 2006.229.23:43:25.22#ibcon#read 3, iclass 6, count 0 2006.229.23:43:25.22#ibcon#about to read 4, iclass 6, count 0 2006.229.23:43:25.22#ibcon#read 4, iclass 6, count 0 2006.229.23:43:25.22#ibcon#about to read 5, iclass 6, count 0 2006.229.23:43:25.22#ibcon#read 5, iclass 6, count 0 2006.229.23:43:25.22#ibcon#about to read 6, iclass 6, count 0 2006.229.23:43:25.22#ibcon#read 6, iclass 6, count 0 2006.229.23:43:25.22#ibcon#end of sib2, iclass 6, count 0 2006.229.23:43:25.22#ibcon#*after write, iclass 6, count 0 2006.229.23:43:25.22#ibcon#*before return 0, iclass 6, count 0 2006.229.23:43:25.22#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:25.22#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:25.22#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:43:25.22#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:43:25.22$vck44/va=1,8 2006.229.23:43:25.22#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.23:43:25.22#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.23:43:25.22#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:25.22#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:25.22#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:25.22#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:25.22#ibcon#enter wrdev, iclass 10, count 2 2006.229.23:43:25.22#ibcon#first serial, iclass 10, count 2 2006.229.23:43:25.22#ibcon#enter sib2, iclass 10, count 2 2006.229.23:43:25.22#ibcon#flushed, iclass 10, count 2 2006.229.23:43:25.22#ibcon#about to write, iclass 10, count 2 2006.229.23:43:25.22#ibcon#wrote, iclass 10, count 2 2006.229.23:43:25.22#ibcon#about to read 3, iclass 10, count 2 2006.229.23:43:25.24#ibcon#read 3, iclass 10, count 2 2006.229.23:43:25.24#ibcon#about to read 4, iclass 10, count 2 2006.229.23:43:25.24#ibcon#read 4, iclass 10, count 2 2006.229.23:43:25.24#ibcon#about to read 5, iclass 10, count 2 2006.229.23:43:25.24#ibcon#read 5, iclass 10, count 2 2006.229.23:43:25.24#ibcon#about to read 6, iclass 10, count 2 2006.229.23:43:25.24#ibcon#read 6, iclass 10, count 2 2006.229.23:43:25.24#ibcon#end of sib2, iclass 10, count 2 2006.229.23:43:25.24#ibcon#*mode == 0, iclass 10, count 2 2006.229.23:43:25.24#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.23:43:25.24#ibcon#[25=AT01-08\r\n] 2006.229.23:43:25.24#ibcon#*before write, iclass 10, count 2 2006.229.23:43:25.24#ibcon#enter sib2, iclass 10, count 2 2006.229.23:43:25.24#ibcon#flushed, iclass 10, count 2 2006.229.23:43:25.24#ibcon#about to write, iclass 10, count 2 2006.229.23:43:25.24#ibcon#wrote, iclass 10, count 2 2006.229.23:43:25.24#ibcon#about to read 3, iclass 10, count 2 2006.229.23:43:25.27#ibcon#read 3, iclass 10, count 2 2006.229.23:43:25.27#ibcon#about to read 4, iclass 10, count 2 2006.229.23:43:25.27#ibcon#read 4, iclass 10, count 2 2006.229.23:43:25.27#ibcon#about to read 5, iclass 10, count 2 2006.229.23:43:25.27#ibcon#read 5, iclass 10, count 2 2006.229.23:43:25.27#ibcon#about to read 6, iclass 10, count 2 2006.229.23:43:25.27#ibcon#read 6, iclass 10, count 2 2006.229.23:43:25.27#ibcon#end of sib2, iclass 10, count 2 2006.229.23:43:25.27#ibcon#*after write, iclass 10, count 2 2006.229.23:43:25.27#ibcon#*before return 0, iclass 10, count 2 2006.229.23:43:25.27#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:25.27#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:25.27#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.23:43:25.27#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:25.27#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:25.39#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:25.39#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:25.39#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:43:25.39#ibcon#first serial, iclass 10, count 0 2006.229.23:43:25.39#ibcon#enter sib2, iclass 10, count 0 2006.229.23:43:25.39#ibcon#flushed, iclass 10, count 0 2006.229.23:43:25.39#ibcon#about to write, iclass 10, count 0 2006.229.23:43:25.39#ibcon#wrote, iclass 10, count 0 2006.229.23:43:25.39#ibcon#about to read 3, iclass 10, count 0 2006.229.23:43:25.41#ibcon#read 3, iclass 10, count 0 2006.229.23:43:25.41#ibcon#about to read 4, iclass 10, count 0 2006.229.23:43:25.41#ibcon#read 4, iclass 10, count 0 2006.229.23:43:25.41#ibcon#about to read 5, iclass 10, count 0 2006.229.23:43:25.41#ibcon#read 5, iclass 10, count 0 2006.229.23:43:25.41#ibcon#about to read 6, iclass 10, count 0 2006.229.23:43:25.41#ibcon#read 6, iclass 10, count 0 2006.229.23:43:25.41#ibcon#end of sib2, iclass 10, count 0 2006.229.23:43:25.41#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:43:25.41#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:43:25.41#ibcon#[25=USB\r\n] 2006.229.23:43:25.41#ibcon#*before write, iclass 10, count 0 2006.229.23:43:25.41#ibcon#enter sib2, iclass 10, count 0 2006.229.23:43:25.41#ibcon#flushed, iclass 10, count 0 2006.229.23:43:25.41#ibcon#about to write, iclass 10, count 0 2006.229.23:43:25.41#ibcon#wrote, iclass 10, count 0 2006.229.23:43:25.41#ibcon#about to read 3, iclass 10, count 0 2006.229.23:43:25.44#ibcon#read 3, iclass 10, count 0 2006.229.23:43:25.44#ibcon#about to read 4, iclass 10, count 0 2006.229.23:43:25.44#ibcon#read 4, iclass 10, count 0 2006.229.23:43:25.44#ibcon#about to read 5, iclass 10, count 0 2006.229.23:43:25.44#ibcon#read 5, iclass 10, count 0 2006.229.23:43:25.44#ibcon#about to read 6, iclass 10, count 0 2006.229.23:43:25.44#ibcon#read 6, iclass 10, count 0 2006.229.23:43:25.44#ibcon#end of sib2, iclass 10, count 0 2006.229.23:43:25.44#ibcon#*after write, iclass 10, count 0 2006.229.23:43:25.44#ibcon#*before return 0, iclass 10, count 0 2006.229.23:43:25.44#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:25.44#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:25.44#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:43:25.44#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:43:25.44$vck44/valo=2,534.99 2006.229.23:43:25.44#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.23:43:25.44#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.23:43:25.44#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:25.44#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:25.44#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:25.44#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:25.44#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:43:25.44#ibcon#first serial, iclass 12, count 0 2006.229.23:43:25.44#ibcon#enter sib2, iclass 12, count 0 2006.229.23:43:25.44#ibcon#flushed, iclass 12, count 0 2006.229.23:43:25.44#ibcon#about to write, iclass 12, count 0 2006.229.23:43:25.44#ibcon#wrote, iclass 12, count 0 2006.229.23:43:25.44#ibcon#about to read 3, iclass 12, count 0 2006.229.23:43:25.46#ibcon#read 3, iclass 12, count 0 2006.229.23:43:25.46#ibcon#about to read 4, iclass 12, count 0 2006.229.23:43:25.46#ibcon#read 4, iclass 12, count 0 2006.229.23:43:25.46#ibcon#about to read 5, iclass 12, count 0 2006.229.23:43:25.46#ibcon#read 5, iclass 12, count 0 2006.229.23:43:25.46#ibcon#about to read 6, iclass 12, count 0 2006.229.23:43:25.46#ibcon#read 6, iclass 12, count 0 2006.229.23:43:25.46#ibcon#end of sib2, iclass 12, count 0 2006.229.23:43:25.46#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:43:25.46#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:43:25.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:43:25.46#ibcon#*before write, iclass 12, count 0 2006.229.23:43:25.46#ibcon#enter sib2, iclass 12, count 0 2006.229.23:43:25.46#ibcon#flushed, iclass 12, count 0 2006.229.23:43:25.46#ibcon#about to write, iclass 12, count 0 2006.229.23:43:25.46#ibcon#wrote, iclass 12, count 0 2006.229.23:43:25.46#ibcon#about to read 3, iclass 12, count 0 2006.229.23:43:25.50#ibcon#read 3, iclass 12, count 0 2006.229.23:43:25.50#ibcon#about to read 4, iclass 12, count 0 2006.229.23:43:25.50#ibcon#read 4, iclass 12, count 0 2006.229.23:43:25.50#ibcon#about to read 5, iclass 12, count 0 2006.229.23:43:25.50#ibcon#read 5, iclass 12, count 0 2006.229.23:43:25.50#ibcon#about to read 6, iclass 12, count 0 2006.229.23:43:25.50#ibcon#read 6, iclass 12, count 0 2006.229.23:43:25.50#ibcon#end of sib2, iclass 12, count 0 2006.229.23:43:25.50#ibcon#*after write, iclass 12, count 0 2006.229.23:43:25.50#ibcon#*before return 0, iclass 12, count 0 2006.229.23:43:25.50#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:25.50#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:25.50#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:43:25.50#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:43:25.50$vck44/va=2,7 2006.229.23:43:25.50#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.23:43:25.50#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.23:43:25.50#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:25.50#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:25.56#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:25.56#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:25.56#ibcon#enter wrdev, iclass 14, count 2 2006.229.23:43:25.56#ibcon#first serial, iclass 14, count 2 2006.229.23:43:25.56#ibcon#enter sib2, iclass 14, count 2 2006.229.23:43:25.56#ibcon#flushed, iclass 14, count 2 2006.229.23:43:25.56#ibcon#about to write, iclass 14, count 2 2006.229.23:43:25.56#ibcon#wrote, iclass 14, count 2 2006.229.23:43:25.56#ibcon#about to read 3, iclass 14, count 2 2006.229.23:43:25.58#ibcon#read 3, iclass 14, count 2 2006.229.23:43:25.58#ibcon#about to read 4, iclass 14, count 2 2006.229.23:43:25.58#ibcon#read 4, iclass 14, count 2 2006.229.23:43:25.58#ibcon#about to read 5, iclass 14, count 2 2006.229.23:43:25.58#ibcon#read 5, iclass 14, count 2 2006.229.23:43:25.58#ibcon#about to read 6, iclass 14, count 2 2006.229.23:43:25.58#ibcon#read 6, iclass 14, count 2 2006.229.23:43:25.58#ibcon#end of sib2, iclass 14, count 2 2006.229.23:43:25.58#ibcon#*mode == 0, iclass 14, count 2 2006.229.23:43:25.58#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.23:43:25.58#ibcon#[25=AT02-07\r\n] 2006.229.23:43:25.58#ibcon#*before write, iclass 14, count 2 2006.229.23:43:25.58#ibcon#enter sib2, iclass 14, count 2 2006.229.23:43:25.58#ibcon#flushed, iclass 14, count 2 2006.229.23:43:25.58#ibcon#about to write, iclass 14, count 2 2006.229.23:43:25.58#ibcon#wrote, iclass 14, count 2 2006.229.23:43:25.58#ibcon#about to read 3, iclass 14, count 2 2006.229.23:43:25.61#ibcon#read 3, iclass 14, count 2 2006.229.23:43:25.61#ibcon#about to read 4, iclass 14, count 2 2006.229.23:43:25.61#ibcon#read 4, iclass 14, count 2 2006.229.23:43:25.61#ibcon#about to read 5, iclass 14, count 2 2006.229.23:43:25.61#ibcon#read 5, iclass 14, count 2 2006.229.23:43:25.61#ibcon#about to read 6, iclass 14, count 2 2006.229.23:43:25.61#ibcon#read 6, iclass 14, count 2 2006.229.23:43:25.61#ibcon#end of sib2, iclass 14, count 2 2006.229.23:43:25.61#ibcon#*after write, iclass 14, count 2 2006.229.23:43:25.61#ibcon#*before return 0, iclass 14, count 2 2006.229.23:43:25.61#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:25.61#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:25.61#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.23:43:25.61#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:25.61#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:25.73#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:25.73#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:25.73#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:43:25.73#ibcon#first serial, iclass 14, count 0 2006.229.23:43:25.73#ibcon#enter sib2, iclass 14, count 0 2006.229.23:43:25.73#ibcon#flushed, iclass 14, count 0 2006.229.23:43:25.73#ibcon#about to write, iclass 14, count 0 2006.229.23:43:25.73#ibcon#wrote, iclass 14, count 0 2006.229.23:43:25.73#ibcon#about to read 3, iclass 14, count 0 2006.229.23:43:25.75#ibcon#read 3, iclass 14, count 0 2006.229.23:43:25.75#ibcon#about to read 4, iclass 14, count 0 2006.229.23:43:25.75#ibcon#read 4, iclass 14, count 0 2006.229.23:43:25.75#ibcon#about to read 5, iclass 14, count 0 2006.229.23:43:25.75#ibcon#read 5, iclass 14, count 0 2006.229.23:43:25.75#ibcon#about to read 6, iclass 14, count 0 2006.229.23:43:25.75#ibcon#read 6, iclass 14, count 0 2006.229.23:43:25.75#ibcon#end of sib2, iclass 14, count 0 2006.229.23:43:25.75#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:43:25.75#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:43:25.75#ibcon#[25=USB\r\n] 2006.229.23:43:25.75#ibcon#*before write, iclass 14, count 0 2006.229.23:43:25.75#ibcon#enter sib2, iclass 14, count 0 2006.229.23:43:25.75#ibcon#flushed, iclass 14, count 0 2006.229.23:43:25.75#ibcon#about to write, iclass 14, count 0 2006.229.23:43:25.75#ibcon#wrote, iclass 14, count 0 2006.229.23:43:25.75#ibcon#about to read 3, iclass 14, count 0 2006.229.23:43:25.78#ibcon#read 3, iclass 14, count 0 2006.229.23:43:25.78#ibcon#about to read 4, iclass 14, count 0 2006.229.23:43:25.78#ibcon#read 4, iclass 14, count 0 2006.229.23:43:25.78#ibcon#about to read 5, iclass 14, count 0 2006.229.23:43:25.78#ibcon#read 5, iclass 14, count 0 2006.229.23:43:25.78#ibcon#about to read 6, iclass 14, count 0 2006.229.23:43:25.78#ibcon#read 6, iclass 14, count 0 2006.229.23:43:25.78#ibcon#end of sib2, iclass 14, count 0 2006.229.23:43:25.78#ibcon#*after write, iclass 14, count 0 2006.229.23:43:25.78#ibcon#*before return 0, iclass 14, count 0 2006.229.23:43:25.78#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:25.78#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:25.78#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:43:25.78#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:43:25.78$vck44/valo=3,564.99 2006.229.23:43:25.78#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.23:43:25.78#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.23:43:25.78#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:25.78#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:25.78#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:25.78#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:25.78#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:43:25.78#ibcon#first serial, iclass 16, count 0 2006.229.23:43:25.78#ibcon#enter sib2, iclass 16, count 0 2006.229.23:43:25.78#ibcon#flushed, iclass 16, count 0 2006.229.23:43:25.78#ibcon#about to write, iclass 16, count 0 2006.229.23:43:25.78#ibcon#wrote, iclass 16, count 0 2006.229.23:43:25.78#ibcon#about to read 3, iclass 16, count 0 2006.229.23:43:25.80#ibcon#read 3, iclass 16, count 0 2006.229.23:43:25.80#ibcon#about to read 4, iclass 16, count 0 2006.229.23:43:25.80#ibcon#read 4, iclass 16, count 0 2006.229.23:43:25.80#ibcon#about to read 5, iclass 16, count 0 2006.229.23:43:25.80#ibcon#read 5, iclass 16, count 0 2006.229.23:43:25.80#ibcon#about to read 6, iclass 16, count 0 2006.229.23:43:25.80#ibcon#read 6, iclass 16, count 0 2006.229.23:43:25.80#ibcon#end of sib2, iclass 16, count 0 2006.229.23:43:25.80#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:43:25.80#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:43:25.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:43:25.80#ibcon#*before write, iclass 16, count 0 2006.229.23:43:25.80#ibcon#enter sib2, iclass 16, count 0 2006.229.23:43:25.80#ibcon#flushed, iclass 16, count 0 2006.229.23:43:25.80#ibcon#about to write, iclass 16, count 0 2006.229.23:43:25.80#ibcon#wrote, iclass 16, count 0 2006.229.23:43:25.80#ibcon#about to read 3, iclass 16, count 0 2006.229.23:43:25.84#ibcon#read 3, iclass 16, count 0 2006.229.23:43:25.84#ibcon#about to read 4, iclass 16, count 0 2006.229.23:43:25.84#ibcon#read 4, iclass 16, count 0 2006.229.23:43:25.84#ibcon#about to read 5, iclass 16, count 0 2006.229.23:43:25.84#ibcon#read 5, iclass 16, count 0 2006.229.23:43:25.84#ibcon#about to read 6, iclass 16, count 0 2006.229.23:43:25.84#ibcon#read 6, iclass 16, count 0 2006.229.23:43:25.84#ibcon#end of sib2, iclass 16, count 0 2006.229.23:43:25.84#ibcon#*after write, iclass 16, count 0 2006.229.23:43:25.84#ibcon#*before return 0, iclass 16, count 0 2006.229.23:43:25.84#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:25.84#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:25.84#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:43:25.84#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:43:25.84$vck44/va=3,6 2006.229.23:43:25.84#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.23:43:25.84#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.23:43:25.84#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:25.84#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:25.90#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:25.90#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:25.90#ibcon#enter wrdev, iclass 18, count 2 2006.229.23:43:25.90#ibcon#first serial, iclass 18, count 2 2006.229.23:43:25.90#ibcon#enter sib2, iclass 18, count 2 2006.229.23:43:25.90#ibcon#flushed, iclass 18, count 2 2006.229.23:43:25.90#ibcon#about to write, iclass 18, count 2 2006.229.23:43:25.90#ibcon#wrote, iclass 18, count 2 2006.229.23:43:25.90#ibcon#about to read 3, iclass 18, count 2 2006.229.23:43:25.92#ibcon#read 3, iclass 18, count 2 2006.229.23:43:25.92#ibcon#about to read 4, iclass 18, count 2 2006.229.23:43:25.92#ibcon#read 4, iclass 18, count 2 2006.229.23:43:25.92#ibcon#about to read 5, iclass 18, count 2 2006.229.23:43:25.92#ibcon#read 5, iclass 18, count 2 2006.229.23:43:25.92#ibcon#about to read 6, iclass 18, count 2 2006.229.23:43:25.92#ibcon#read 6, iclass 18, count 2 2006.229.23:43:25.92#ibcon#end of sib2, iclass 18, count 2 2006.229.23:43:25.92#ibcon#*mode == 0, iclass 18, count 2 2006.229.23:43:25.92#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.23:43:25.92#ibcon#[25=AT03-06\r\n] 2006.229.23:43:25.92#ibcon#*before write, iclass 18, count 2 2006.229.23:43:25.92#ibcon#enter sib2, iclass 18, count 2 2006.229.23:43:25.92#ibcon#flushed, iclass 18, count 2 2006.229.23:43:25.92#ibcon#about to write, iclass 18, count 2 2006.229.23:43:25.92#ibcon#wrote, iclass 18, count 2 2006.229.23:43:25.92#ibcon#about to read 3, iclass 18, count 2 2006.229.23:43:25.95#ibcon#read 3, iclass 18, count 2 2006.229.23:43:25.95#ibcon#about to read 4, iclass 18, count 2 2006.229.23:43:25.95#ibcon#read 4, iclass 18, count 2 2006.229.23:43:25.95#ibcon#about to read 5, iclass 18, count 2 2006.229.23:43:25.95#ibcon#read 5, iclass 18, count 2 2006.229.23:43:25.95#ibcon#about to read 6, iclass 18, count 2 2006.229.23:43:25.95#ibcon#read 6, iclass 18, count 2 2006.229.23:43:25.95#ibcon#end of sib2, iclass 18, count 2 2006.229.23:43:25.95#ibcon#*after write, iclass 18, count 2 2006.229.23:43:25.95#ibcon#*before return 0, iclass 18, count 2 2006.229.23:43:25.95#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:25.95#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:25.95#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.23:43:25.95#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:25.95#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:26.07#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:26.07#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:26.07#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:43:26.07#ibcon#first serial, iclass 18, count 0 2006.229.23:43:26.07#ibcon#enter sib2, iclass 18, count 0 2006.229.23:43:26.07#ibcon#flushed, iclass 18, count 0 2006.229.23:43:26.07#ibcon#about to write, iclass 18, count 0 2006.229.23:43:26.07#ibcon#wrote, iclass 18, count 0 2006.229.23:43:26.07#ibcon#about to read 3, iclass 18, count 0 2006.229.23:43:26.09#ibcon#read 3, iclass 18, count 0 2006.229.23:43:26.09#ibcon#about to read 4, iclass 18, count 0 2006.229.23:43:26.09#ibcon#read 4, iclass 18, count 0 2006.229.23:43:26.09#ibcon#about to read 5, iclass 18, count 0 2006.229.23:43:26.09#ibcon#read 5, iclass 18, count 0 2006.229.23:43:26.09#ibcon#about to read 6, iclass 18, count 0 2006.229.23:43:26.09#ibcon#read 6, iclass 18, count 0 2006.229.23:43:26.09#ibcon#end of sib2, iclass 18, count 0 2006.229.23:43:26.09#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:43:26.09#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:43:26.09#ibcon#[25=USB\r\n] 2006.229.23:43:26.09#ibcon#*before write, iclass 18, count 0 2006.229.23:43:26.09#ibcon#enter sib2, iclass 18, count 0 2006.229.23:43:26.09#ibcon#flushed, iclass 18, count 0 2006.229.23:43:26.09#ibcon#about to write, iclass 18, count 0 2006.229.23:43:26.09#ibcon#wrote, iclass 18, count 0 2006.229.23:43:26.09#ibcon#about to read 3, iclass 18, count 0 2006.229.23:43:26.12#ibcon#read 3, iclass 18, count 0 2006.229.23:43:26.12#ibcon#about to read 4, iclass 18, count 0 2006.229.23:43:26.12#ibcon#read 4, iclass 18, count 0 2006.229.23:43:26.12#ibcon#about to read 5, iclass 18, count 0 2006.229.23:43:26.12#ibcon#read 5, iclass 18, count 0 2006.229.23:43:26.12#ibcon#about to read 6, iclass 18, count 0 2006.229.23:43:26.12#ibcon#read 6, iclass 18, count 0 2006.229.23:43:26.12#ibcon#end of sib2, iclass 18, count 0 2006.229.23:43:26.12#ibcon#*after write, iclass 18, count 0 2006.229.23:43:26.12#ibcon#*before return 0, iclass 18, count 0 2006.229.23:43:26.12#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:26.12#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:26.12#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:43:26.12#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:43:26.12$vck44/valo=4,624.99 2006.229.23:43:26.12#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.23:43:26.12#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.23:43:26.12#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:26.12#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:26.12#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:26.12#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:26.12#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:43:26.12#ibcon#first serial, iclass 20, count 0 2006.229.23:43:26.12#ibcon#enter sib2, iclass 20, count 0 2006.229.23:43:26.12#ibcon#flushed, iclass 20, count 0 2006.229.23:43:26.12#ibcon#about to write, iclass 20, count 0 2006.229.23:43:26.12#ibcon#wrote, iclass 20, count 0 2006.229.23:43:26.12#ibcon#about to read 3, iclass 20, count 0 2006.229.23:43:26.14#ibcon#read 3, iclass 20, count 0 2006.229.23:43:26.14#ibcon#about to read 4, iclass 20, count 0 2006.229.23:43:26.14#ibcon#read 4, iclass 20, count 0 2006.229.23:43:26.14#ibcon#about to read 5, iclass 20, count 0 2006.229.23:43:26.14#ibcon#read 5, iclass 20, count 0 2006.229.23:43:26.14#ibcon#about to read 6, iclass 20, count 0 2006.229.23:43:26.14#ibcon#read 6, iclass 20, count 0 2006.229.23:43:26.14#ibcon#end of sib2, iclass 20, count 0 2006.229.23:43:26.14#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:43:26.14#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:43:26.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:43:26.14#ibcon#*before write, iclass 20, count 0 2006.229.23:43:26.14#ibcon#enter sib2, iclass 20, count 0 2006.229.23:43:26.14#ibcon#flushed, iclass 20, count 0 2006.229.23:43:26.14#ibcon#about to write, iclass 20, count 0 2006.229.23:43:26.14#ibcon#wrote, iclass 20, count 0 2006.229.23:43:26.14#ibcon#about to read 3, iclass 20, count 0 2006.229.23:43:26.18#ibcon#read 3, iclass 20, count 0 2006.229.23:43:26.18#ibcon#about to read 4, iclass 20, count 0 2006.229.23:43:26.18#ibcon#read 4, iclass 20, count 0 2006.229.23:43:26.18#ibcon#about to read 5, iclass 20, count 0 2006.229.23:43:26.18#ibcon#read 5, iclass 20, count 0 2006.229.23:43:26.18#ibcon#about to read 6, iclass 20, count 0 2006.229.23:43:26.18#ibcon#read 6, iclass 20, count 0 2006.229.23:43:26.18#ibcon#end of sib2, iclass 20, count 0 2006.229.23:43:26.18#ibcon#*after write, iclass 20, count 0 2006.229.23:43:26.18#ibcon#*before return 0, iclass 20, count 0 2006.229.23:43:26.18#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:26.18#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:26.18#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:43:26.18#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:43:26.18$vck44/va=4,7 2006.229.23:43:26.18#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.23:43:26.18#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.23:43:26.18#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:26.18#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:26.24#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:26.24#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:26.24#ibcon#enter wrdev, iclass 22, count 2 2006.229.23:43:26.24#ibcon#first serial, iclass 22, count 2 2006.229.23:43:26.24#ibcon#enter sib2, iclass 22, count 2 2006.229.23:43:26.24#ibcon#flushed, iclass 22, count 2 2006.229.23:43:26.24#ibcon#about to write, iclass 22, count 2 2006.229.23:43:26.24#ibcon#wrote, iclass 22, count 2 2006.229.23:43:26.24#ibcon#about to read 3, iclass 22, count 2 2006.229.23:43:26.26#ibcon#read 3, iclass 22, count 2 2006.229.23:43:26.26#ibcon#about to read 4, iclass 22, count 2 2006.229.23:43:26.26#ibcon#read 4, iclass 22, count 2 2006.229.23:43:26.26#ibcon#about to read 5, iclass 22, count 2 2006.229.23:43:26.26#ibcon#read 5, iclass 22, count 2 2006.229.23:43:26.26#ibcon#about to read 6, iclass 22, count 2 2006.229.23:43:26.26#ibcon#read 6, iclass 22, count 2 2006.229.23:43:26.26#ibcon#end of sib2, iclass 22, count 2 2006.229.23:43:26.26#ibcon#*mode == 0, iclass 22, count 2 2006.229.23:43:26.26#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.23:43:26.26#ibcon#[25=AT04-07\r\n] 2006.229.23:43:26.26#ibcon#*before write, iclass 22, count 2 2006.229.23:43:26.26#ibcon#enter sib2, iclass 22, count 2 2006.229.23:43:26.26#ibcon#flushed, iclass 22, count 2 2006.229.23:43:26.26#ibcon#about to write, iclass 22, count 2 2006.229.23:43:26.26#ibcon#wrote, iclass 22, count 2 2006.229.23:43:26.26#ibcon#about to read 3, iclass 22, count 2 2006.229.23:43:26.29#ibcon#read 3, iclass 22, count 2 2006.229.23:43:26.29#ibcon#about to read 4, iclass 22, count 2 2006.229.23:43:26.29#ibcon#read 4, iclass 22, count 2 2006.229.23:43:26.29#ibcon#about to read 5, iclass 22, count 2 2006.229.23:43:26.29#ibcon#read 5, iclass 22, count 2 2006.229.23:43:26.29#ibcon#about to read 6, iclass 22, count 2 2006.229.23:43:26.29#ibcon#read 6, iclass 22, count 2 2006.229.23:43:26.29#ibcon#end of sib2, iclass 22, count 2 2006.229.23:43:26.29#ibcon#*after write, iclass 22, count 2 2006.229.23:43:26.29#ibcon#*before return 0, iclass 22, count 2 2006.229.23:43:26.29#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:26.29#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:26.29#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.23:43:26.29#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:26.29#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:26.41#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:26.41#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:26.41#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:43:26.41#ibcon#first serial, iclass 22, count 0 2006.229.23:43:26.41#ibcon#enter sib2, iclass 22, count 0 2006.229.23:43:26.41#ibcon#flushed, iclass 22, count 0 2006.229.23:43:26.41#ibcon#about to write, iclass 22, count 0 2006.229.23:43:26.41#ibcon#wrote, iclass 22, count 0 2006.229.23:43:26.41#ibcon#about to read 3, iclass 22, count 0 2006.229.23:43:26.43#ibcon#read 3, iclass 22, count 0 2006.229.23:43:26.43#ibcon#about to read 4, iclass 22, count 0 2006.229.23:43:26.43#ibcon#read 4, iclass 22, count 0 2006.229.23:43:26.43#ibcon#about to read 5, iclass 22, count 0 2006.229.23:43:26.43#ibcon#read 5, iclass 22, count 0 2006.229.23:43:26.43#ibcon#about to read 6, iclass 22, count 0 2006.229.23:43:26.43#ibcon#read 6, iclass 22, count 0 2006.229.23:43:26.43#ibcon#end of sib2, iclass 22, count 0 2006.229.23:43:26.43#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:43:26.43#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:43:26.43#ibcon#[25=USB\r\n] 2006.229.23:43:26.43#ibcon#*before write, iclass 22, count 0 2006.229.23:43:26.43#ibcon#enter sib2, iclass 22, count 0 2006.229.23:43:26.43#ibcon#flushed, iclass 22, count 0 2006.229.23:43:26.43#ibcon#about to write, iclass 22, count 0 2006.229.23:43:26.43#ibcon#wrote, iclass 22, count 0 2006.229.23:43:26.43#ibcon#about to read 3, iclass 22, count 0 2006.229.23:43:26.46#ibcon#read 3, iclass 22, count 0 2006.229.23:43:26.46#ibcon#about to read 4, iclass 22, count 0 2006.229.23:43:26.46#ibcon#read 4, iclass 22, count 0 2006.229.23:43:26.46#ibcon#about to read 5, iclass 22, count 0 2006.229.23:43:26.46#ibcon#read 5, iclass 22, count 0 2006.229.23:43:26.46#ibcon#about to read 6, iclass 22, count 0 2006.229.23:43:26.46#ibcon#read 6, iclass 22, count 0 2006.229.23:43:26.46#ibcon#end of sib2, iclass 22, count 0 2006.229.23:43:26.46#ibcon#*after write, iclass 22, count 0 2006.229.23:43:26.46#ibcon#*before return 0, iclass 22, count 0 2006.229.23:43:26.46#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:26.46#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:26.46#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:43:26.46#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:43:26.46$vck44/valo=5,734.99 2006.229.23:43:26.46#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.23:43:26.46#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.23:43:26.46#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:26.46#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:26.46#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:26.46#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:26.46#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:43:26.46#ibcon#first serial, iclass 24, count 0 2006.229.23:43:26.46#ibcon#enter sib2, iclass 24, count 0 2006.229.23:43:26.46#ibcon#flushed, iclass 24, count 0 2006.229.23:43:26.46#ibcon#about to write, iclass 24, count 0 2006.229.23:43:26.46#ibcon#wrote, iclass 24, count 0 2006.229.23:43:26.46#ibcon#about to read 3, iclass 24, count 0 2006.229.23:43:26.48#ibcon#read 3, iclass 24, count 0 2006.229.23:43:26.48#ibcon#about to read 4, iclass 24, count 0 2006.229.23:43:26.48#ibcon#read 4, iclass 24, count 0 2006.229.23:43:26.48#ibcon#about to read 5, iclass 24, count 0 2006.229.23:43:26.48#ibcon#read 5, iclass 24, count 0 2006.229.23:43:26.48#ibcon#about to read 6, iclass 24, count 0 2006.229.23:43:26.48#ibcon#read 6, iclass 24, count 0 2006.229.23:43:26.48#ibcon#end of sib2, iclass 24, count 0 2006.229.23:43:26.48#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:43:26.48#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:43:26.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:43:26.48#ibcon#*before write, iclass 24, count 0 2006.229.23:43:26.48#ibcon#enter sib2, iclass 24, count 0 2006.229.23:43:26.48#ibcon#flushed, iclass 24, count 0 2006.229.23:43:26.48#ibcon#about to write, iclass 24, count 0 2006.229.23:43:26.48#ibcon#wrote, iclass 24, count 0 2006.229.23:43:26.48#ibcon#about to read 3, iclass 24, count 0 2006.229.23:43:26.52#ibcon#read 3, iclass 24, count 0 2006.229.23:43:26.52#ibcon#about to read 4, iclass 24, count 0 2006.229.23:43:26.52#ibcon#read 4, iclass 24, count 0 2006.229.23:43:26.52#ibcon#about to read 5, iclass 24, count 0 2006.229.23:43:26.52#ibcon#read 5, iclass 24, count 0 2006.229.23:43:26.52#ibcon#about to read 6, iclass 24, count 0 2006.229.23:43:26.52#ibcon#read 6, iclass 24, count 0 2006.229.23:43:26.52#ibcon#end of sib2, iclass 24, count 0 2006.229.23:43:26.52#ibcon#*after write, iclass 24, count 0 2006.229.23:43:26.52#ibcon#*before return 0, iclass 24, count 0 2006.229.23:43:26.52#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:26.52#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:26.52#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:43:26.52#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:43:26.52$vck44/va=5,4 2006.229.23:43:26.52#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.23:43:26.52#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.23:43:26.52#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:26.52#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:26.58#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:26.58#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:26.58#ibcon#enter wrdev, iclass 26, count 2 2006.229.23:43:26.58#ibcon#first serial, iclass 26, count 2 2006.229.23:43:26.58#ibcon#enter sib2, iclass 26, count 2 2006.229.23:43:26.58#ibcon#flushed, iclass 26, count 2 2006.229.23:43:26.58#ibcon#about to write, iclass 26, count 2 2006.229.23:43:26.58#ibcon#wrote, iclass 26, count 2 2006.229.23:43:26.58#ibcon#about to read 3, iclass 26, count 2 2006.229.23:43:26.60#ibcon#read 3, iclass 26, count 2 2006.229.23:43:26.60#ibcon#about to read 4, iclass 26, count 2 2006.229.23:43:26.60#ibcon#read 4, iclass 26, count 2 2006.229.23:43:26.60#ibcon#about to read 5, iclass 26, count 2 2006.229.23:43:26.60#ibcon#read 5, iclass 26, count 2 2006.229.23:43:26.60#ibcon#about to read 6, iclass 26, count 2 2006.229.23:43:26.60#ibcon#read 6, iclass 26, count 2 2006.229.23:43:26.60#ibcon#end of sib2, iclass 26, count 2 2006.229.23:43:26.60#ibcon#*mode == 0, iclass 26, count 2 2006.229.23:43:26.60#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.23:43:26.60#ibcon#[25=AT05-04\r\n] 2006.229.23:43:26.60#ibcon#*before write, iclass 26, count 2 2006.229.23:43:26.60#ibcon#enter sib2, iclass 26, count 2 2006.229.23:43:26.60#ibcon#flushed, iclass 26, count 2 2006.229.23:43:26.60#ibcon#about to write, iclass 26, count 2 2006.229.23:43:26.60#ibcon#wrote, iclass 26, count 2 2006.229.23:43:26.60#ibcon#about to read 3, iclass 26, count 2 2006.229.23:43:26.63#ibcon#read 3, iclass 26, count 2 2006.229.23:43:26.63#ibcon#about to read 4, iclass 26, count 2 2006.229.23:43:26.63#ibcon#read 4, iclass 26, count 2 2006.229.23:43:26.63#ibcon#about to read 5, iclass 26, count 2 2006.229.23:43:26.63#ibcon#read 5, iclass 26, count 2 2006.229.23:43:26.63#ibcon#about to read 6, iclass 26, count 2 2006.229.23:43:26.63#ibcon#read 6, iclass 26, count 2 2006.229.23:43:26.63#ibcon#end of sib2, iclass 26, count 2 2006.229.23:43:26.63#ibcon#*after write, iclass 26, count 2 2006.229.23:43:26.63#ibcon#*before return 0, iclass 26, count 2 2006.229.23:43:26.63#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:26.63#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:26.63#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.23:43:26.63#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:26.63#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:26.75#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:26.75#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:26.75#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:43:26.75#ibcon#first serial, iclass 26, count 0 2006.229.23:43:26.75#ibcon#enter sib2, iclass 26, count 0 2006.229.23:43:26.75#ibcon#flushed, iclass 26, count 0 2006.229.23:43:26.75#ibcon#about to write, iclass 26, count 0 2006.229.23:43:26.75#ibcon#wrote, iclass 26, count 0 2006.229.23:43:26.75#ibcon#about to read 3, iclass 26, count 0 2006.229.23:43:26.77#ibcon#read 3, iclass 26, count 0 2006.229.23:43:26.77#ibcon#about to read 4, iclass 26, count 0 2006.229.23:43:26.77#ibcon#read 4, iclass 26, count 0 2006.229.23:43:26.77#ibcon#about to read 5, iclass 26, count 0 2006.229.23:43:26.77#ibcon#read 5, iclass 26, count 0 2006.229.23:43:26.77#ibcon#about to read 6, iclass 26, count 0 2006.229.23:43:26.77#ibcon#read 6, iclass 26, count 0 2006.229.23:43:26.77#ibcon#end of sib2, iclass 26, count 0 2006.229.23:43:26.77#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:43:26.77#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:43:26.77#ibcon#[25=USB\r\n] 2006.229.23:43:26.77#ibcon#*before write, iclass 26, count 0 2006.229.23:43:26.77#ibcon#enter sib2, iclass 26, count 0 2006.229.23:43:26.77#ibcon#flushed, iclass 26, count 0 2006.229.23:43:26.77#ibcon#about to write, iclass 26, count 0 2006.229.23:43:26.77#ibcon#wrote, iclass 26, count 0 2006.229.23:43:26.77#ibcon#about to read 3, iclass 26, count 0 2006.229.23:43:26.80#ibcon#read 3, iclass 26, count 0 2006.229.23:43:26.80#ibcon#about to read 4, iclass 26, count 0 2006.229.23:43:26.80#ibcon#read 4, iclass 26, count 0 2006.229.23:43:26.80#ibcon#about to read 5, iclass 26, count 0 2006.229.23:43:26.80#ibcon#read 5, iclass 26, count 0 2006.229.23:43:26.80#ibcon#about to read 6, iclass 26, count 0 2006.229.23:43:26.80#ibcon#read 6, iclass 26, count 0 2006.229.23:43:26.80#ibcon#end of sib2, iclass 26, count 0 2006.229.23:43:26.80#ibcon#*after write, iclass 26, count 0 2006.229.23:43:26.80#ibcon#*before return 0, iclass 26, count 0 2006.229.23:43:26.80#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:26.80#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:26.80#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:43:26.80#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:43:26.80$vck44/valo=6,814.99 2006.229.23:43:26.80#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.23:43:26.80#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.23:43:26.80#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:26.80#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:26.80#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:26.80#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:26.80#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:43:26.80#ibcon#first serial, iclass 28, count 0 2006.229.23:43:26.80#ibcon#enter sib2, iclass 28, count 0 2006.229.23:43:26.80#ibcon#flushed, iclass 28, count 0 2006.229.23:43:26.80#ibcon#about to write, iclass 28, count 0 2006.229.23:43:26.80#ibcon#wrote, iclass 28, count 0 2006.229.23:43:26.80#ibcon#about to read 3, iclass 28, count 0 2006.229.23:43:26.82#ibcon#read 3, iclass 28, count 0 2006.229.23:43:26.82#ibcon#about to read 4, iclass 28, count 0 2006.229.23:43:26.82#ibcon#read 4, iclass 28, count 0 2006.229.23:43:26.82#ibcon#about to read 5, iclass 28, count 0 2006.229.23:43:26.82#ibcon#read 5, iclass 28, count 0 2006.229.23:43:26.82#ibcon#about to read 6, iclass 28, count 0 2006.229.23:43:26.82#ibcon#read 6, iclass 28, count 0 2006.229.23:43:26.82#ibcon#end of sib2, iclass 28, count 0 2006.229.23:43:26.82#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:43:26.82#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:43:26.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:43:26.82#ibcon#*before write, iclass 28, count 0 2006.229.23:43:26.82#ibcon#enter sib2, iclass 28, count 0 2006.229.23:43:26.82#ibcon#flushed, iclass 28, count 0 2006.229.23:43:26.82#ibcon#about to write, iclass 28, count 0 2006.229.23:43:26.82#ibcon#wrote, iclass 28, count 0 2006.229.23:43:26.82#ibcon#about to read 3, iclass 28, count 0 2006.229.23:43:26.86#ibcon#read 3, iclass 28, count 0 2006.229.23:43:26.86#ibcon#about to read 4, iclass 28, count 0 2006.229.23:43:26.86#ibcon#read 4, iclass 28, count 0 2006.229.23:43:26.86#ibcon#about to read 5, iclass 28, count 0 2006.229.23:43:26.86#ibcon#read 5, iclass 28, count 0 2006.229.23:43:26.86#ibcon#about to read 6, iclass 28, count 0 2006.229.23:43:26.86#ibcon#read 6, iclass 28, count 0 2006.229.23:43:26.86#ibcon#end of sib2, iclass 28, count 0 2006.229.23:43:26.86#ibcon#*after write, iclass 28, count 0 2006.229.23:43:26.86#ibcon#*before return 0, iclass 28, count 0 2006.229.23:43:26.86#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:26.86#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:26.86#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:43:26.86#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:43:26.86$vck44/va=6,4 2006.229.23:43:26.86#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.23:43:26.86#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.23:43:26.86#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:26.86#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:26.92#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:26.92#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:26.92#ibcon#enter wrdev, iclass 30, count 2 2006.229.23:43:26.92#ibcon#first serial, iclass 30, count 2 2006.229.23:43:26.92#ibcon#enter sib2, iclass 30, count 2 2006.229.23:43:26.92#ibcon#flushed, iclass 30, count 2 2006.229.23:43:26.92#ibcon#about to write, iclass 30, count 2 2006.229.23:43:26.92#ibcon#wrote, iclass 30, count 2 2006.229.23:43:26.92#ibcon#about to read 3, iclass 30, count 2 2006.229.23:43:26.94#ibcon#read 3, iclass 30, count 2 2006.229.23:43:26.94#ibcon#about to read 4, iclass 30, count 2 2006.229.23:43:26.94#ibcon#read 4, iclass 30, count 2 2006.229.23:43:26.94#ibcon#about to read 5, iclass 30, count 2 2006.229.23:43:26.94#ibcon#read 5, iclass 30, count 2 2006.229.23:43:26.94#ibcon#about to read 6, iclass 30, count 2 2006.229.23:43:26.94#ibcon#read 6, iclass 30, count 2 2006.229.23:43:26.94#ibcon#end of sib2, iclass 30, count 2 2006.229.23:43:26.94#ibcon#*mode == 0, iclass 30, count 2 2006.229.23:43:26.94#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.23:43:26.94#ibcon#[25=AT06-04\r\n] 2006.229.23:43:26.94#ibcon#*before write, iclass 30, count 2 2006.229.23:43:26.94#ibcon#enter sib2, iclass 30, count 2 2006.229.23:43:26.94#ibcon#flushed, iclass 30, count 2 2006.229.23:43:26.94#ibcon#about to write, iclass 30, count 2 2006.229.23:43:26.94#ibcon#wrote, iclass 30, count 2 2006.229.23:43:26.94#ibcon#about to read 3, iclass 30, count 2 2006.229.23:43:26.97#ibcon#read 3, iclass 30, count 2 2006.229.23:43:26.97#ibcon#about to read 4, iclass 30, count 2 2006.229.23:43:26.97#ibcon#read 4, iclass 30, count 2 2006.229.23:43:26.97#ibcon#about to read 5, iclass 30, count 2 2006.229.23:43:26.97#ibcon#read 5, iclass 30, count 2 2006.229.23:43:26.97#ibcon#about to read 6, iclass 30, count 2 2006.229.23:43:26.97#ibcon#read 6, iclass 30, count 2 2006.229.23:43:26.97#ibcon#end of sib2, iclass 30, count 2 2006.229.23:43:26.97#ibcon#*after write, iclass 30, count 2 2006.229.23:43:26.97#ibcon#*before return 0, iclass 30, count 2 2006.229.23:43:26.97#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:26.97#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:26.97#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.23:43:26.97#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:26.97#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:27.09#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:27.09#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:27.09#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:43:27.09#ibcon#first serial, iclass 30, count 0 2006.229.23:43:27.09#ibcon#enter sib2, iclass 30, count 0 2006.229.23:43:27.09#ibcon#flushed, iclass 30, count 0 2006.229.23:43:27.09#ibcon#about to write, iclass 30, count 0 2006.229.23:43:27.09#ibcon#wrote, iclass 30, count 0 2006.229.23:43:27.09#ibcon#about to read 3, iclass 30, count 0 2006.229.23:43:27.11#ibcon#read 3, iclass 30, count 0 2006.229.23:43:27.11#ibcon#about to read 4, iclass 30, count 0 2006.229.23:43:27.11#ibcon#read 4, iclass 30, count 0 2006.229.23:43:27.11#ibcon#about to read 5, iclass 30, count 0 2006.229.23:43:27.11#ibcon#read 5, iclass 30, count 0 2006.229.23:43:27.11#ibcon#about to read 6, iclass 30, count 0 2006.229.23:43:27.11#ibcon#read 6, iclass 30, count 0 2006.229.23:43:27.11#ibcon#end of sib2, iclass 30, count 0 2006.229.23:43:27.11#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:43:27.11#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:43:27.11#ibcon#[25=USB\r\n] 2006.229.23:43:27.11#ibcon#*before write, iclass 30, count 0 2006.229.23:43:27.11#ibcon#enter sib2, iclass 30, count 0 2006.229.23:43:27.11#ibcon#flushed, iclass 30, count 0 2006.229.23:43:27.11#ibcon#about to write, iclass 30, count 0 2006.229.23:43:27.11#ibcon#wrote, iclass 30, count 0 2006.229.23:43:27.11#ibcon#about to read 3, iclass 30, count 0 2006.229.23:43:27.14#ibcon#read 3, iclass 30, count 0 2006.229.23:43:27.14#ibcon#about to read 4, iclass 30, count 0 2006.229.23:43:27.14#ibcon#read 4, iclass 30, count 0 2006.229.23:43:27.14#ibcon#about to read 5, iclass 30, count 0 2006.229.23:43:27.14#ibcon#read 5, iclass 30, count 0 2006.229.23:43:27.14#ibcon#about to read 6, iclass 30, count 0 2006.229.23:43:27.14#ibcon#read 6, iclass 30, count 0 2006.229.23:43:27.14#ibcon#end of sib2, iclass 30, count 0 2006.229.23:43:27.14#ibcon#*after write, iclass 30, count 0 2006.229.23:43:27.14#ibcon#*before return 0, iclass 30, count 0 2006.229.23:43:27.14#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:27.14#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:27.14#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:43:27.14#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:43:27.14$vck44/valo=7,864.99 2006.229.23:43:27.14#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.23:43:27.14#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.23:43:27.14#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:27.14#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:27.14#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:27.14#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:27.14#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:43:27.14#ibcon#first serial, iclass 32, count 0 2006.229.23:43:27.14#ibcon#enter sib2, iclass 32, count 0 2006.229.23:43:27.14#ibcon#flushed, iclass 32, count 0 2006.229.23:43:27.14#ibcon#about to write, iclass 32, count 0 2006.229.23:43:27.14#ibcon#wrote, iclass 32, count 0 2006.229.23:43:27.14#ibcon#about to read 3, iclass 32, count 0 2006.229.23:43:27.16#ibcon#read 3, iclass 32, count 0 2006.229.23:43:27.16#ibcon#about to read 4, iclass 32, count 0 2006.229.23:43:27.16#ibcon#read 4, iclass 32, count 0 2006.229.23:43:27.16#ibcon#about to read 5, iclass 32, count 0 2006.229.23:43:27.16#ibcon#read 5, iclass 32, count 0 2006.229.23:43:27.16#ibcon#about to read 6, iclass 32, count 0 2006.229.23:43:27.16#ibcon#read 6, iclass 32, count 0 2006.229.23:43:27.16#ibcon#end of sib2, iclass 32, count 0 2006.229.23:43:27.16#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:43:27.16#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:43:27.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:43:27.16#ibcon#*before write, iclass 32, count 0 2006.229.23:43:27.16#ibcon#enter sib2, iclass 32, count 0 2006.229.23:43:27.16#ibcon#flushed, iclass 32, count 0 2006.229.23:43:27.16#ibcon#about to write, iclass 32, count 0 2006.229.23:43:27.16#ibcon#wrote, iclass 32, count 0 2006.229.23:43:27.16#ibcon#about to read 3, iclass 32, count 0 2006.229.23:43:27.20#ibcon#read 3, iclass 32, count 0 2006.229.23:43:27.20#ibcon#about to read 4, iclass 32, count 0 2006.229.23:43:27.20#ibcon#read 4, iclass 32, count 0 2006.229.23:43:27.20#ibcon#about to read 5, iclass 32, count 0 2006.229.23:43:27.20#ibcon#read 5, iclass 32, count 0 2006.229.23:43:27.20#ibcon#about to read 6, iclass 32, count 0 2006.229.23:43:27.20#ibcon#read 6, iclass 32, count 0 2006.229.23:43:27.20#ibcon#end of sib2, iclass 32, count 0 2006.229.23:43:27.20#ibcon#*after write, iclass 32, count 0 2006.229.23:43:27.20#ibcon#*before return 0, iclass 32, count 0 2006.229.23:43:27.20#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:27.20#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:27.20#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:43:27.20#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:43:27.20$vck44/va=7,5 2006.229.23:43:27.20#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.23:43:27.20#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.23:43:27.20#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:27.20#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:27.26#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:27.26#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:27.26#ibcon#enter wrdev, iclass 34, count 2 2006.229.23:43:27.26#ibcon#first serial, iclass 34, count 2 2006.229.23:43:27.26#ibcon#enter sib2, iclass 34, count 2 2006.229.23:43:27.26#ibcon#flushed, iclass 34, count 2 2006.229.23:43:27.26#ibcon#about to write, iclass 34, count 2 2006.229.23:43:27.26#ibcon#wrote, iclass 34, count 2 2006.229.23:43:27.26#ibcon#about to read 3, iclass 34, count 2 2006.229.23:43:27.28#ibcon#read 3, iclass 34, count 2 2006.229.23:43:27.28#ibcon#about to read 4, iclass 34, count 2 2006.229.23:43:27.28#ibcon#read 4, iclass 34, count 2 2006.229.23:43:27.28#ibcon#about to read 5, iclass 34, count 2 2006.229.23:43:27.28#ibcon#read 5, iclass 34, count 2 2006.229.23:43:27.28#ibcon#about to read 6, iclass 34, count 2 2006.229.23:43:27.28#ibcon#read 6, iclass 34, count 2 2006.229.23:43:27.28#ibcon#end of sib2, iclass 34, count 2 2006.229.23:43:27.28#ibcon#*mode == 0, iclass 34, count 2 2006.229.23:43:27.28#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.23:43:27.28#ibcon#[25=AT07-05\r\n] 2006.229.23:43:27.28#ibcon#*before write, iclass 34, count 2 2006.229.23:43:27.28#ibcon#enter sib2, iclass 34, count 2 2006.229.23:43:27.28#ibcon#flushed, iclass 34, count 2 2006.229.23:43:27.28#ibcon#about to write, iclass 34, count 2 2006.229.23:43:27.28#ibcon#wrote, iclass 34, count 2 2006.229.23:43:27.28#ibcon#about to read 3, iclass 34, count 2 2006.229.23:43:27.31#ibcon#read 3, iclass 34, count 2 2006.229.23:43:27.31#ibcon#about to read 4, iclass 34, count 2 2006.229.23:43:27.31#ibcon#read 4, iclass 34, count 2 2006.229.23:43:27.31#ibcon#about to read 5, iclass 34, count 2 2006.229.23:43:27.31#ibcon#read 5, iclass 34, count 2 2006.229.23:43:27.31#ibcon#about to read 6, iclass 34, count 2 2006.229.23:43:27.31#ibcon#read 6, iclass 34, count 2 2006.229.23:43:27.31#ibcon#end of sib2, iclass 34, count 2 2006.229.23:43:27.31#ibcon#*after write, iclass 34, count 2 2006.229.23:43:27.31#ibcon#*before return 0, iclass 34, count 2 2006.229.23:43:27.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:27.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:27.31#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.23:43:27.31#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:27.31#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:27.43#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:27.43#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:27.43#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:43:27.43#ibcon#first serial, iclass 34, count 0 2006.229.23:43:27.43#ibcon#enter sib2, iclass 34, count 0 2006.229.23:43:27.43#ibcon#flushed, iclass 34, count 0 2006.229.23:43:27.43#ibcon#about to write, iclass 34, count 0 2006.229.23:43:27.43#ibcon#wrote, iclass 34, count 0 2006.229.23:43:27.43#ibcon#about to read 3, iclass 34, count 0 2006.229.23:43:27.45#ibcon#read 3, iclass 34, count 0 2006.229.23:43:27.45#ibcon#about to read 4, iclass 34, count 0 2006.229.23:43:27.45#ibcon#read 4, iclass 34, count 0 2006.229.23:43:27.45#ibcon#about to read 5, iclass 34, count 0 2006.229.23:43:27.45#ibcon#read 5, iclass 34, count 0 2006.229.23:43:27.45#ibcon#about to read 6, iclass 34, count 0 2006.229.23:43:27.45#ibcon#read 6, iclass 34, count 0 2006.229.23:43:27.45#ibcon#end of sib2, iclass 34, count 0 2006.229.23:43:27.45#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:43:27.45#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:43:27.45#ibcon#[25=USB\r\n] 2006.229.23:43:27.45#ibcon#*before write, iclass 34, count 0 2006.229.23:43:27.45#ibcon#enter sib2, iclass 34, count 0 2006.229.23:43:27.45#ibcon#flushed, iclass 34, count 0 2006.229.23:43:27.45#ibcon#about to write, iclass 34, count 0 2006.229.23:43:27.45#ibcon#wrote, iclass 34, count 0 2006.229.23:43:27.45#ibcon#about to read 3, iclass 34, count 0 2006.229.23:43:27.48#ibcon#read 3, iclass 34, count 0 2006.229.23:43:27.48#ibcon#about to read 4, iclass 34, count 0 2006.229.23:43:27.48#ibcon#read 4, iclass 34, count 0 2006.229.23:43:27.48#ibcon#about to read 5, iclass 34, count 0 2006.229.23:43:27.48#ibcon#read 5, iclass 34, count 0 2006.229.23:43:27.48#ibcon#about to read 6, iclass 34, count 0 2006.229.23:43:27.48#ibcon#read 6, iclass 34, count 0 2006.229.23:43:27.48#ibcon#end of sib2, iclass 34, count 0 2006.229.23:43:27.48#ibcon#*after write, iclass 34, count 0 2006.229.23:43:27.48#ibcon#*before return 0, iclass 34, count 0 2006.229.23:43:27.48#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:27.48#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:27.48#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:43:27.48#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:43:27.48$vck44/valo=8,884.99 2006.229.23:43:27.48#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.23:43:27.48#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.23:43:27.48#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:27.48#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:27.48#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:27.48#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:27.48#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:43:27.48#ibcon#first serial, iclass 36, count 0 2006.229.23:43:27.48#ibcon#enter sib2, iclass 36, count 0 2006.229.23:43:27.48#ibcon#flushed, iclass 36, count 0 2006.229.23:43:27.48#ibcon#about to write, iclass 36, count 0 2006.229.23:43:27.48#ibcon#wrote, iclass 36, count 0 2006.229.23:43:27.48#ibcon#about to read 3, iclass 36, count 0 2006.229.23:43:27.50#ibcon#read 3, iclass 36, count 0 2006.229.23:43:27.50#ibcon#about to read 4, iclass 36, count 0 2006.229.23:43:27.50#ibcon#read 4, iclass 36, count 0 2006.229.23:43:27.50#ibcon#about to read 5, iclass 36, count 0 2006.229.23:43:27.50#ibcon#read 5, iclass 36, count 0 2006.229.23:43:27.50#ibcon#about to read 6, iclass 36, count 0 2006.229.23:43:27.50#ibcon#read 6, iclass 36, count 0 2006.229.23:43:27.50#ibcon#end of sib2, iclass 36, count 0 2006.229.23:43:27.50#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:43:27.50#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:43:27.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:43:27.50#ibcon#*before write, iclass 36, count 0 2006.229.23:43:27.50#ibcon#enter sib2, iclass 36, count 0 2006.229.23:43:27.50#ibcon#flushed, iclass 36, count 0 2006.229.23:43:27.50#ibcon#about to write, iclass 36, count 0 2006.229.23:43:27.50#ibcon#wrote, iclass 36, count 0 2006.229.23:43:27.50#ibcon#about to read 3, iclass 36, count 0 2006.229.23:43:27.54#ibcon#read 3, iclass 36, count 0 2006.229.23:43:27.54#ibcon#about to read 4, iclass 36, count 0 2006.229.23:43:27.54#ibcon#read 4, iclass 36, count 0 2006.229.23:43:27.54#ibcon#about to read 5, iclass 36, count 0 2006.229.23:43:27.54#ibcon#read 5, iclass 36, count 0 2006.229.23:43:27.54#ibcon#about to read 6, iclass 36, count 0 2006.229.23:43:27.54#ibcon#read 6, iclass 36, count 0 2006.229.23:43:27.54#ibcon#end of sib2, iclass 36, count 0 2006.229.23:43:27.54#ibcon#*after write, iclass 36, count 0 2006.229.23:43:27.54#ibcon#*before return 0, iclass 36, count 0 2006.229.23:43:27.54#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:27.54#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:27.54#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:43:27.54#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:43:27.54$vck44/va=8,6 2006.229.23:43:27.54#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.229.23:43:27.54#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.229.23:43:27.54#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:27.54#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:43:27.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:43:27.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:43:27.60#ibcon#enter wrdev, iclass 38, count 2 2006.229.23:43:27.60#ibcon#first serial, iclass 38, count 2 2006.229.23:43:27.60#ibcon#enter sib2, iclass 38, count 2 2006.229.23:43:27.60#ibcon#flushed, iclass 38, count 2 2006.229.23:43:27.60#ibcon#about to write, iclass 38, count 2 2006.229.23:43:27.60#ibcon#wrote, iclass 38, count 2 2006.229.23:43:27.60#ibcon#about to read 3, iclass 38, count 2 2006.229.23:43:27.62#ibcon#read 3, iclass 38, count 2 2006.229.23:43:27.62#ibcon#about to read 4, iclass 38, count 2 2006.229.23:43:27.62#ibcon#read 4, iclass 38, count 2 2006.229.23:43:27.62#ibcon#about to read 5, iclass 38, count 2 2006.229.23:43:27.62#ibcon#read 5, iclass 38, count 2 2006.229.23:43:27.62#ibcon#about to read 6, iclass 38, count 2 2006.229.23:43:27.62#ibcon#read 6, iclass 38, count 2 2006.229.23:43:27.62#ibcon#end of sib2, iclass 38, count 2 2006.229.23:43:27.62#ibcon#*mode == 0, iclass 38, count 2 2006.229.23:43:27.62#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.229.23:43:27.62#ibcon#[25=AT08-06\r\n] 2006.229.23:43:27.62#ibcon#*before write, iclass 38, count 2 2006.229.23:43:27.62#ibcon#enter sib2, iclass 38, count 2 2006.229.23:43:27.62#ibcon#flushed, iclass 38, count 2 2006.229.23:43:27.62#ibcon#about to write, iclass 38, count 2 2006.229.23:43:27.62#ibcon#wrote, iclass 38, count 2 2006.229.23:43:27.62#ibcon#about to read 3, iclass 38, count 2 2006.229.23:43:27.65#ibcon#read 3, iclass 38, count 2 2006.229.23:43:27.65#ibcon#about to read 4, iclass 38, count 2 2006.229.23:43:27.65#ibcon#read 4, iclass 38, count 2 2006.229.23:43:27.65#ibcon#about to read 5, iclass 38, count 2 2006.229.23:43:27.65#ibcon#read 5, iclass 38, count 2 2006.229.23:43:27.65#ibcon#about to read 6, iclass 38, count 2 2006.229.23:43:27.65#ibcon#read 6, iclass 38, count 2 2006.229.23:43:27.65#ibcon#end of sib2, iclass 38, count 2 2006.229.23:43:27.65#ibcon#*after write, iclass 38, count 2 2006.229.23:43:27.65#ibcon#*before return 0, iclass 38, count 2 2006.229.23:43:27.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:43:27.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.229.23:43:27.65#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.229.23:43:27.65#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:27.65#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:43:27.77#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:43:27.77#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:43:27.77#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:43:27.77#ibcon#first serial, iclass 38, count 0 2006.229.23:43:27.77#ibcon#enter sib2, iclass 38, count 0 2006.229.23:43:27.77#ibcon#flushed, iclass 38, count 0 2006.229.23:43:27.77#ibcon#about to write, iclass 38, count 0 2006.229.23:43:27.77#ibcon#wrote, iclass 38, count 0 2006.229.23:43:27.77#ibcon#about to read 3, iclass 38, count 0 2006.229.23:43:27.79#ibcon#read 3, iclass 38, count 0 2006.229.23:43:27.79#ibcon#about to read 4, iclass 38, count 0 2006.229.23:43:27.79#ibcon#read 4, iclass 38, count 0 2006.229.23:43:27.79#ibcon#about to read 5, iclass 38, count 0 2006.229.23:43:27.79#ibcon#read 5, iclass 38, count 0 2006.229.23:43:27.79#ibcon#about to read 6, iclass 38, count 0 2006.229.23:43:27.79#ibcon#read 6, iclass 38, count 0 2006.229.23:43:27.79#ibcon#end of sib2, iclass 38, count 0 2006.229.23:43:27.79#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:43:27.79#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:43:27.79#ibcon#[25=USB\r\n] 2006.229.23:43:27.79#ibcon#*before write, iclass 38, count 0 2006.229.23:43:27.79#ibcon#enter sib2, iclass 38, count 0 2006.229.23:43:27.79#ibcon#flushed, iclass 38, count 0 2006.229.23:43:27.79#ibcon#about to write, iclass 38, count 0 2006.229.23:43:27.79#ibcon#wrote, iclass 38, count 0 2006.229.23:43:27.79#ibcon#about to read 3, iclass 38, count 0 2006.229.23:43:27.82#ibcon#read 3, iclass 38, count 0 2006.229.23:43:27.82#ibcon#about to read 4, iclass 38, count 0 2006.229.23:43:27.82#ibcon#read 4, iclass 38, count 0 2006.229.23:43:27.82#ibcon#about to read 5, iclass 38, count 0 2006.229.23:43:27.82#ibcon#read 5, iclass 38, count 0 2006.229.23:43:27.82#ibcon#about to read 6, iclass 38, count 0 2006.229.23:43:27.82#ibcon#read 6, iclass 38, count 0 2006.229.23:43:27.82#ibcon#end of sib2, iclass 38, count 0 2006.229.23:43:27.82#ibcon#*after write, iclass 38, count 0 2006.229.23:43:27.82#ibcon#*before return 0, iclass 38, count 0 2006.229.23:43:27.82#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:43:27.82#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.229.23:43:27.82#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:43:27.82#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:43:27.82$vck44/vblo=1,629.99 2006.229.23:43:27.82#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.229.23:43:27.82#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.229.23:43:27.82#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:27.82#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:43:27.82#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:43:27.82#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:43:27.82#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:43:27.82#ibcon#first serial, iclass 40, count 0 2006.229.23:43:27.82#ibcon#enter sib2, iclass 40, count 0 2006.229.23:43:27.82#ibcon#flushed, iclass 40, count 0 2006.229.23:43:27.82#ibcon#about to write, iclass 40, count 0 2006.229.23:43:27.82#ibcon#wrote, iclass 40, count 0 2006.229.23:43:27.82#ibcon#about to read 3, iclass 40, count 0 2006.229.23:43:27.84#ibcon#read 3, iclass 40, count 0 2006.229.23:43:27.84#ibcon#about to read 4, iclass 40, count 0 2006.229.23:43:27.84#ibcon#read 4, iclass 40, count 0 2006.229.23:43:27.84#ibcon#about to read 5, iclass 40, count 0 2006.229.23:43:27.84#ibcon#read 5, iclass 40, count 0 2006.229.23:43:27.84#ibcon#about to read 6, iclass 40, count 0 2006.229.23:43:27.84#ibcon#read 6, iclass 40, count 0 2006.229.23:43:27.84#ibcon#end of sib2, iclass 40, count 0 2006.229.23:43:27.84#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:43:27.84#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:43:27.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:43:27.84#ibcon#*before write, iclass 40, count 0 2006.229.23:43:27.84#ibcon#enter sib2, iclass 40, count 0 2006.229.23:43:27.84#ibcon#flushed, iclass 40, count 0 2006.229.23:43:27.84#ibcon#about to write, iclass 40, count 0 2006.229.23:43:27.84#ibcon#wrote, iclass 40, count 0 2006.229.23:43:27.84#ibcon#about to read 3, iclass 40, count 0 2006.229.23:43:27.88#ibcon#read 3, iclass 40, count 0 2006.229.23:43:27.88#ibcon#about to read 4, iclass 40, count 0 2006.229.23:43:27.88#ibcon#read 4, iclass 40, count 0 2006.229.23:43:27.88#ibcon#about to read 5, iclass 40, count 0 2006.229.23:43:27.88#ibcon#read 5, iclass 40, count 0 2006.229.23:43:27.88#ibcon#about to read 6, iclass 40, count 0 2006.229.23:43:27.88#ibcon#read 6, iclass 40, count 0 2006.229.23:43:27.88#ibcon#end of sib2, iclass 40, count 0 2006.229.23:43:27.88#ibcon#*after write, iclass 40, count 0 2006.229.23:43:27.88#ibcon#*before return 0, iclass 40, count 0 2006.229.23:43:27.88#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:43:27.88#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.229.23:43:27.88#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:43:27.88#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:43:27.88$vck44/vb=1,4 2006.229.23:43:27.88#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.229.23:43:27.88#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.229.23:43:27.88#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:27.88#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:43:27.88#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:43:27.88#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:43:27.88#ibcon#enter wrdev, iclass 4, count 2 2006.229.23:43:27.88#ibcon#first serial, iclass 4, count 2 2006.229.23:43:27.88#ibcon#enter sib2, iclass 4, count 2 2006.229.23:43:27.88#ibcon#flushed, iclass 4, count 2 2006.229.23:43:27.88#ibcon#about to write, iclass 4, count 2 2006.229.23:43:27.88#ibcon#wrote, iclass 4, count 2 2006.229.23:43:27.88#ibcon#about to read 3, iclass 4, count 2 2006.229.23:43:27.90#ibcon#read 3, iclass 4, count 2 2006.229.23:43:27.90#ibcon#about to read 4, iclass 4, count 2 2006.229.23:43:27.90#ibcon#read 4, iclass 4, count 2 2006.229.23:43:27.90#ibcon#about to read 5, iclass 4, count 2 2006.229.23:43:27.90#ibcon#read 5, iclass 4, count 2 2006.229.23:43:27.90#ibcon#about to read 6, iclass 4, count 2 2006.229.23:43:27.90#ibcon#read 6, iclass 4, count 2 2006.229.23:43:27.90#ibcon#end of sib2, iclass 4, count 2 2006.229.23:43:27.90#ibcon#*mode == 0, iclass 4, count 2 2006.229.23:43:27.90#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.229.23:43:27.90#ibcon#[27=AT01-04\r\n] 2006.229.23:43:27.90#ibcon#*before write, iclass 4, count 2 2006.229.23:43:27.90#ibcon#enter sib2, iclass 4, count 2 2006.229.23:43:27.90#ibcon#flushed, iclass 4, count 2 2006.229.23:43:27.90#ibcon#about to write, iclass 4, count 2 2006.229.23:43:27.90#ibcon#wrote, iclass 4, count 2 2006.229.23:43:27.90#ibcon#about to read 3, iclass 4, count 2 2006.229.23:43:27.93#ibcon#read 3, iclass 4, count 2 2006.229.23:43:27.93#ibcon#about to read 4, iclass 4, count 2 2006.229.23:43:27.93#ibcon#read 4, iclass 4, count 2 2006.229.23:43:27.93#ibcon#about to read 5, iclass 4, count 2 2006.229.23:43:27.93#ibcon#read 5, iclass 4, count 2 2006.229.23:43:27.93#ibcon#about to read 6, iclass 4, count 2 2006.229.23:43:27.93#ibcon#read 6, iclass 4, count 2 2006.229.23:43:27.93#ibcon#end of sib2, iclass 4, count 2 2006.229.23:43:27.93#ibcon#*after write, iclass 4, count 2 2006.229.23:43:27.93#ibcon#*before return 0, iclass 4, count 2 2006.229.23:43:27.93#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:43:27.93#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.229.23:43:27.93#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.229.23:43:27.93#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:27.93#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:43:28.05#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:43:28.05#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:43:28.05#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:43:28.05#ibcon#first serial, iclass 4, count 0 2006.229.23:43:28.05#ibcon#enter sib2, iclass 4, count 0 2006.229.23:43:28.05#ibcon#flushed, iclass 4, count 0 2006.229.23:43:28.05#ibcon#about to write, iclass 4, count 0 2006.229.23:43:28.05#ibcon#wrote, iclass 4, count 0 2006.229.23:43:28.05#ibcon#about to read 3, iclass 4, count 0 2006.229.23:43:28.07#ibcon#read 3, iclass 4, count 0 2006.229.23:43:28.07#ibcon#about to read 4, iclass 4, count 0 2006.229.23:43:28.07#ibcon#read 4, iclass 4, count 0 2006.229.23:43:28.07#ibcon#about to read 5, iclass 4, count 0 2006.229.23:43:28.07#ibcon#read 5, iclass 4, count 0 2006.229.23:43:28.07#ibcon#about to read 6, iclass 4, count 0 2006.229.23:43:28.07#ibcon#read 6, iclass 4, count 0 2006.229.23:43:28.07#ibcon#end of sib2, iclass 4, count 0 2006.229.23:43:28.07#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:43:28.07#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:43:28.07#ibcon#[27=USB\r\n] 2006.229.23:43:28.07#ibcon#*before write, iclass 4, count 0 2006.229.23:43:28.07#ibcon#enter sib2, iclass 4, count 0 2006.229.23:43:28.07#ibcon#flushed, iclass 4, count 0 2006.229.23:43:28.07#ibcon#about to write, iclass 4, count 0 2006.229.23:43:28.07#ibcon#wrote, iclass 4, count 0 2006.229.23:43:28.07#ibcon#about to read 3, iclass 4, count 0 2006.229.23:43:28.10#ibcon#read 3, iclass 4, count 0 2006.229.23:43:28.10#ibcon#about to read 4, iclass 4, count 0 2006.229.23:43:28.10#ibcon#read 4, iclass 4, count 0 2006.229.23:43:28.10#ibcon#about to read 5, iclass 4, count 0 2006.229.23:43:28.10#ibcon#read 5, iclass 4, count 0 2006.229.23:43:28.10#ibcon#about to read 6, iclass 4, count 0 2006.229.23:43:28.10#ibcon#read 6, iclass 4, count 0 2006.229.23:43:28.10#ibcon#end of sib2, iclass 4, count 0 2006.229.23:43:28.10#ibcon#*after write, iclass 4, count 0 2006.229.23:43:28.10#ibcon#*before return 0, iclass 4, count 0 2006.229.23:43:28.10#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:43:28.10#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.229.23:43:28.10#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:43:28.10#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:43:28.10$vck44/vblo=2,634.99 2006.229.23:43:28.10#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.229.23:43:28.10#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.229.23:43:28.10#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:28.10#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:28.10#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:28.10#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:28.10#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:43:28.10#ibcon#first serial, iclass 6, count 0 2006.229.23:43:28.10#ibcon#enter sib2, iclass 6, count 0 2006.229.23:43:28.10#ibcon#flushed, iclass 6, count 0 2006.229.23:43:28.10#ibcon#about to write, iclass 6, count 0 2006.229.23:43:28.10#ibcon#wrote, iclass 6, count 0 2006.229.23:43:28.10#ibcon#about to read 3, iclass 6, count 0 2006.229.23:43:28.12#ibcon#read 3, iclass 6, count 0 2006.229.23:43:28.12#ibcon#about to read 4, iclass 6, count 0 2006.229.23:43:28.12#ibcon#read 4, iclass 6, count 0 2006.229.23:43:28.12#ibcon#about to read 5, iclass 6, count 0 2006.229.23:43:28.12#ibcon#read 5, iclass 6, count 0 2006.229.23:43:28.12#ibcon#about to read 6, iclass 6, count 0 2006.229.23:43:28.12#ibcon#read 6, iclass 6, count 0 2006.229.23:43:28.12#ibcon#end of sib2, iclass 6, count 0 2006.229.23:43:28.12#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:43:28.12#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:43:28.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:43:28.12#ibcon#*before write, iclass 6, count 0 2006.229.23:43:28.12#ibcon#enter sib2, iclass 6, count 0 2006.229.23:43:28.12#ibcon#flushed, iclass 6, count 0 2006.229.23:43:28.12#ibcon#about to write, iclass 6, count 0 2006.229.23:43:28.12#ibcon#wrote, iclass 6, count 0 2006.229.23:43:28.12#ibcon#about to read 3, iclass 6, count 0 2006.229.23:43:28.16#ibcon#read 3, iclass 6, count 0 2006.229.23:43:28.16#ibcon#about to read 4, iclass 6, count 0 2006.229.23:43:28.16#ibcon#read 4, iclass 6, count 0 2006.229.23:43:28.16#ibcon#about to read 5, iclass 6, count 0 2006.229.23:43:28.16#ibcon#read 5, iclass 6, count 0 2006.229.23:43:28.16#ibcon#about to read 6, iclass 6, count 0 2006.229.23:43:28.16#ibcon#read 6, iclass 6, count 0 2006.229.23:43:28.16#ibcon#end of sib2, iclass 6, count 0 2006.229.23:43:28.16#ibcon#*after write, iclass 6, count 0 2006.229.23:43:28.16#ibcon#*before return 0, iclass 6, count 0 2006.229.23:43:28.16#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:28.16#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.229.23:43:28.16#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:43:28.16#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:43:28.16$vck44/vb=2,4 2006.229.23:43:28.16#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.23:43:28.16#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.23:43:28.16#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:28.16#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:28.22#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:28.22#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:28.22#ibcon#enter wrdev, iclass 10, count 2 2006.229.23:43:28.22#ibcon#first serial, iclass 10, count 2 2006.229.23:43:28.22#ibcon#enter sib2, iclass 10, count 2 2006.229.23:43:28.22#ibcon#flushed, iclass 10, count 2 2006.229.23:43:28.22#ibcon#about to write, iclass 10, count 2 2006.229.23:43:28.22#ibcon#wrote, iclass 10, count 2 2006.229.23:43:28.22#ibcon#about to read 3, iclass 10, count 2 2006.229.23:43:28.24#ibcon#read 3, iclass 10, count 2 2006.229.23:43:28.24#ibcon#about to read 4, iclass 10, count 2 2006.229.23:43:28.24#ibcon#read 4, iclass 10, count 2 2006.229.23:43:28.24#ibcon#about to read 5, iclass 10, count 2 2006.229.23:43:28.24#ibcon#read 5, iclass 10, count 2 2006.229.23:43:28.24#ibcon#about to read 6, iclass 10, count 2 2006.229.23:43:28.24#ibcon#read 6, iclass 10, count 2 2006.229.23:43:28.24#ibcon#end of sib2, iclass 10, count 2 2006.229.23:43:28.24#ibcon#*mode == 0, iclass 10, count 2 2006.229.23:43:28.24#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.23:43:28.24#ibcon#[27=AT02-04\r\n] 2006.229.23:43:28.24#ibcon#*before write, iclass 10, count 2 2006.229.23:43:28.24#ibcon#enter sib2, iclass 10, count 2 2006.229.23:43:28.24#ibcon#flushed, iclass 10, count 2 2006.229.23:43:28.24#ibcon#about to write, iclass 10, count 2 2006.229.23:43:28.24#ibcon#wrote, iclass 10, count 2 2006.229.23:43:28.24#ibcon#about to read 3, iclass 10, count 2 2006.229.23:43:28.27#ibcon#read 3, iclass 10, count 2 2006.229.23:43:28.27#ibcon#about to read 4, iclass 10, count 2 2006.229.23:43:28.27#ibcon#read 4, iclass 10, count 2 2006.229.23:43:28.27#ibcon#about to read 5, iclass 10, count 2 2006.229.23:43:28.27#ibcon#read 5, iclass 10, count 2 2006.229.23:43:28.27#ibcon#about to read 6, iclass 10, count 2 2006.229.23:43:28.27#ibcon#read 6, iclass 10, count 2 2006.229.23:43:28.27#ibcon#end of sib2, iclass 10, count 2 2006.229.23:43:28.27#ibcon#*after write, iclass 10, count 2 2006.229.23:43:28.27#ibcon#*before return 0, iclass 10, count 2 2006.229.23:43:28.27#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:28.27#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:43:28.27#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.23:43:28.27#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:28.27#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:28.39#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:28.39#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:28.39#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:43:28.39#ibcon#first serial, iclass 10, count 0 2006.229.23:43:28.39#ibcon#enter sib2, iclass 10, count 0 2006.229.23:43:28.39#ibcon#flushed, iclass 10, count 0 2006.229.23:43:28.39#ibcon#about to write, iclass 10, count 0 2006.229.23:43:28.39#ibcon#wrote, iclass 10, count 0 2006.229.23:43:28.39#ibcon#about to read 3, iclass 10, count 0 2006.229.23:43:28.41#ibcon#read 3, iclass 10, count 0 2006.229.23:43:28.41#ibcon#about to read 4, iclass 10, count 0 2006.229.23:43:28.41#ibcon#read 4, iclass 10, count 0 2006.229.23:43:28.41#ibcon#about to read 5, iclass 10, count 0 2006.229.23:43:28.41#ibcon#read 5, iclass 10, count 0 2006.229.23:43:28.41#ibcon#about to read 6, iclass 10, count 0 2006.229.23:43:28.41#ibcon#read 6, iclass 10, count 0 2006.229.23:43:28.41#ibcon#end of sib2, iclass 10, count 0 2006.229.23:43:28.41#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:43:28.41#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:43:28.41#ibcon#[27=USB\r\n] 2006.229.23:43:28.41#ibcon#*before write, iclass 10, count 0 2006.229.23:43:28.41#ibcon#enter sib2, iclass 10, count 0 2006.229.23:43:28.41#ibcon#flushed, iclass 10, count 0 2006.229.23:43:28.41#ibcon#about to write, iclass 10, count 0 2006.229.23:43:28.41#ibcon#wrote, iclass 10, count 0 2006.229.23:43:28.41#ibcon#about to read 3, iclass 10, count 0 2006.229.23:43:28.44#ibcon#read 3, iclass 10, count 0 2006.229.23:43:28.44#ibcon#about to read 4, iclass 10, count 0 2006.229.23:43:28.44#ibcon#read 4, iclass 10, count 0 2006.229.23:43:28.44#ibcon#about to read 5, iclass 10, count 0 2006.229.23:43:28.44#ibcon#read 5, iclass 10, count 0 2006.229.23:43:28.44#ibcon#about to read 6, iclass 10, count 0 2006.229.23:43:28.44#ibcon#read 6, iclass 10, count 0 2006.229.23:43:28.44#ibcon#end of sib2, iclass 10, count 0 2006.229.23:43:28.44#ibcon#*after write, iclass 10, count 0 2006.229.23:43:28.44#ibcon#*before return 0, iclass 10, count 0 2006.229.23:43:28.44#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:28.44#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:43:28.44#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:43:28.44#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:43:28.44$vck44/vblo=3,649.99 2006.229.23:43:28.44#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.229.23:43:28.44#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.229.23:43:28.44#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:28.44#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:28.44#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:28.44#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:28.44#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:43:28.44#ibcon#first serial, iclass 12, count 0 2006.229.23:43:28.44#ibcon#enter sib2, iclass 12, count 0 2006.229.23:43:28.44#ibcon#flushed, iclass 12, count 0 2006.229.23:43:28.44#ibcon#about to write, iclass 12, count 0 2006.229.23:43:28.44#ibcon#wrote, iclass 12, count 0 2006.229.23:43:28.44#ibcon#about to read 3, iclass 12, count 0 2006.229.23:43:28.46#ibcon#read 3, iclass 12, count 0 2006.229.23:43:28.46#ibcon#about to read 4, iclass 12, count 0 2006.229.23:43:28.46#ibcon#read 4, iclass 12, count 0 2006.229.23:43:28.46#ibcon#about to read 5, iclass 12, count 0 2006.229.23:43:28.46#ibcon#read 5, iclass 12, count 0 2006.229.23:43:28.46#ibcon#about to read 6, iclass 12, count 0 2006.229.23:43:28.46#ibcon#read 6, iclass 12, count 0 2006.229.23:43:28.46#ibcon#end of sib2, iclass 12, count 0 2006.229.23:43:28.46#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:43:28.46#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:43:28.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:43:28.46#ibcon#*before write, iclass 12, count 0 2006.229.23:43:28.46#ibcon#enter sib2, iclass 12, count 0 2006.229.23:43:28.46#ibcon#flushed, iclass 12, count 0 2006.229.23:43:28.46#ibcon#about to write, iclass 12, count 0 2006.229.23:43:28.46#ibcon#wrote, iclass 12, count 0 2006.229.23:43:28.46#ibcon#about to read 3, iclass 12, count 0 2006.229.23:43:28.50#ibcon#read 3, iclass 12, count 0 2006.229.23:43:28.50#ibcon#about to read 4, iclass 12, count 0 2006.229.23:43:28.50#ibcon#read 4, iclass 12, count 0 2006.229.23:43:28.50#ibcon#about to read 5, iclass 12, count 0 2006.229.23:43:28.50#ibcon#read 5, iclass 12, count 0 2006.229.23:43:28.50#ibcon#about to read 6, iclass 12, count 0 2006.229.23:43:28.50#ibcon#read 6, iclass 12, count 0 2006.229.23:43:28.50#ibcon#end of sib2, iclass 12, count 0 2006.229.23:43:28.50#ibcon#*after write, iclass 12, count 0 2006.229.23:43:28.50#ibcon#*before return 0, iclass 12, count 0 2006.229.23:43:28.50#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:28.50#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.229.23:43:28.50#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:43:28.50#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:43:28.50$vck44/vb=3,4 2006.229.23:43:28.50#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.229.23:43:28.50#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.229.23:43:28.50#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:28.50#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:28.56#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:28.56#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:28.56#ibcon#enter wrdev, iclass 14, count 2 2006.229.23:43:28.56#ibcon#first serial, iclass 14, count 2 2006.229.23:43:28.56#ibcon#enter sib2, iclass 14, count 2 2006.229.23:43:28.56#ibcon#flushed, iclass 14, count 2 2006.229.23:43:28.56#ibcon#about to write, iclass 14, count 2 2006.229.23:43:28.56#ibcon#wrote, iclass 14, count 2 2006.229.23:43:28.56#ibcon#about to read 3, iclass 14, count 2 2006.229.23:43:28.58#ibcon#read 3, iclass 14, count 2 2006.229.23:43:28.58#ibcon#about to read 4, iclass 14, count 2 2006.229.23:43:28.58#ibcon#read 4, iclass 14, count 2 2006.229.23:43:28.58#ibcon#about to read 5, iclass 14, count 2 2006.229.23:43:28.58#ibcon#read 5, iclass 14, count 2 2006.229.23:43:28.58#ibcon#about to read 6, iclass 14, count 2 2006.229.23:43:28.58#ibcon#read 6, iclass 14, count 2 2006.229.23:43:28.58#ibcon#end of sib2, iclass 14, count 2 2006.229.23:43:28.58#ibcon#*mode == 0, iclass 14, count 2 2006.229.23:43:28.58#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.229.23:43:28.58#ibcon#[27=AT03-04\r\n] 2006.229.23:43:28.58#ibcon#*before write, iclass 14, count 2 2006.229.23:43:28.58#ibcon#enter sib2, iclass 14, count 2 2006.229.23:43:28.58#ibcon#flushed, iclass 14, count 2 2006.229.23:43:28.58#ibcon#about to write, iclass 14, count 2 2006.229.23:43:28.58#ibcon#wrote, iclass 14, count 2 2006.229.23:43:28.58#ibcon#about to read 3, iclass 14, count 2 2006.229.23:43:28.61#ibcon#read 3, iclass 14, count 2 2006.229.23:43:28.61#ibcon#about to read 4, iclass 14, count 2 2006.229.23:43:28.61#ibcon#read 4, iclass 14, count 2 2006.229.23:43:28.61#ibcon#about to read 5, iclass 14, count 2 2006.229.23:43:28.61#ibcon#read 5, iclass 14, count 2 2006.229.23:43:28.61#ibcon#about to read 6, iclass 14, count 2 2006.229.23:43:28.61#ibcon#read 6, iclass 14, count 2 2006.229.23:43:28.61#ibcon#end of sib2, iclass 14, count 2 2006.229.23:43:28.61#ibcon#*after write, iclass 14, count 2 2006.229.23:43:28.61#ibcon#*before return 0, iclass 14, count 2 2006.229.23:43:28.61#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:28.61#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.229.23:43:28.61#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.229.23:43:28.61#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:28.61#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:28.73#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:28.73#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:28.73#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:43:28.73#ibcon#first serial, iclass 14, count 0 2006.229.23:43:28.73#ibcon#enter sib2, iclass 14, count 0 2006.229.23:43:28.73#ibcon#flushed, iclass 14, count 0 2006.229.23:43:28.73#ibcon#about to write, iclass 14, count 0 2006.229.23:43:28.73#ibcon#wrote, iclass 14, count 0 2006.229.23:43:28.73#ibcon#about to read 3, iclass 14, count 0 2006.229.23:43:28.75#ibcon#read 3, iclass 14, count 0 2006.229.23:43:28.75#ibcon#about to read 4, iclass 14, count 0 2006.229.23:43:28.75#ibcon#read 4, iclass 14, count 0 2006.229.23:43:28.75#ibcon#about to read 5, iclass 14, count 0 2006.229.23:43:28.75#ibcon#read 5, iclass 14, count 0 2006.229.23:43:28.75#ibcon#about to read 6, iclass 14, count 0 2006.229.23:43:28.75#ibcon#read 6, iclass 14, count 0 2006.229.23:43:28.75#ibcon#end of sib2, iclass 14, count 0 2006.229.23:43:28.75#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:43:28.75#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:43:28.75#ibcon#[27=USB\r\n] 2006.229.23:43:28.75#ibcon#*before write, iclass 14, count 0 2006.229.23:43:28.75#ibcon#enter sib2, iclass 14, count 0 2006.229.23:43:28.75#ibcon#flushed, iclass 14, count 0 2006.229.23:43:28.75#ibcon#about to write, iclass 14, count 0 2006.229.23:43:28.75#ibcon#wrote, iclass 14, count 0 2006.229.23:43:28.75#ibcon#about to read 3, iclass 14, count 0 2006.229.23:43:28.78#ibcon#read 3, iclass 14, count 0 2006.229.23:43:28.78#ibcon#about to read 4, iclass 14, count 0 2006.229.23:43:28.78#ibcon#read 4, iclass 14, count 0 2006.229.23:43:28.78#ibcon#about to read 5, iclass 14, count 0 2006.229.23:43:28.78#ibcon#read 5, iclass 14, count 0 2006.229.23:43:28.78#ibcon#about to read 6, iclass 14, count 0 2006.229.23:43:28.78#ibcon#read 6, iclass 14, count 0 2006.229.23:43:28.78#ibcon#end of sib2, iclass 14, count 0 2006.229.23:43:28.78#ibcon#*after write, iclass 14, count 0 2006.229.23:43:28.78#ibcon#*before return 0, iclass 14, count 0 2006.229.23:43:28.78#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:28.78#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.229.23:43:28.78#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:43:28.78#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:43:28.78$vck44/vblo=4,679.99 2006.229.23:43:28.78#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.229.23:43:28.78#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.229.23:43:28.78#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:28.78#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:28.78#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:28.78#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:28.78#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:43:28.78#ibcon#first serial, iclass 16, count 0 2006.229.23:43:28.78#ibcon#enter sib2, iclass 16, count 0 2006.229.23:43:28.78#ibcon#flushed, iclass 16, count 0 2006.229.23:43:28.78#ibcon#about to write, iclass 16, count 0 2006.229.23:43:28.78#ibcon#wrote, iclass 16, count 0 2006.229.23:43:28.78#ibcon#about to read 3, iclass 16, count 0 2006.229.23:43:28.80#ibcon#read 3, iclass 16, count 0 2006.229.23:43:28.80#ibcon#about to read 4, iclass 16, count 0 2006.229.23:43:28.80#ibcon#read 4, iclass 16, count 0 2006.229.23:43:28.80#ibcon#about to read 5, iclass 16, count 0 2006.229.23:43:28.80#ibcon#read 5, iclass 16, count 0 2006.229.23:43:28.80#ibcon#about to read 6, iclass 16, count 0 2006.229.23:43:28.80#ibcon#read 6, iclass 16, count 0 2006.229.23:43:28.80#ibcon#end of sib2, iclass 16, count 0 2006.229.23:43:28.80#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:43:28.80#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:43:28.80#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:43:28.80#ibcon#*before write, iclass 16, count 0 2006.229.23:43:28.80#ibcon#enter sib2, iclass 16, count 0 2006.229.23:43:28.80#ibcon#flushed, iclass 16, count 0 2006.229.23:43:28.80#ibcon#about to write, iclass 16, count 0 2006.229.23:43:28.80#ibcon#wrote, iclass 16, count 0 2006.229.23:43:28.80#ibcon#about to read 3, iclass 16, count 0 2006.229.23:43:28.84#ibcon#read 3, iclass 16, count 0 2006.229.23:43:28.84#ibcon#about to read 4, iclass 16, count 0 2006.229.23:43:28.84#ibcon#read 4, iclass 16, count 0 2006.229.23:43:28.84#ibcon#about to read 5, iclass 16, count 0 2006.229.23:43:28.84#ibcon#read 5, iclass 16, count 0 2006.229.23:43:28.84#ibcon#about to read 6, iclass 16, count 0 2006.229.23:43:28.84#ibcon#read 6, iclass 16, count 0 2006.229.23:43:28.84#ibcon#end of sib2, iclass 16, count 0 2006.229.23:43:28.84#ibcon#*after write, iclass 16, count 0 2006.229.23:43:28.84#ibcon#*before return 0, iclass 16, count 0 2006.229.23:43:28.84#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:28.84#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.229.23:43:28.84#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:43:28.84#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:43:28.84$vck44/vb=4,4 2006.229.23:43:28.84#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.229.23:43:28.84#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.229.23:43:28.84#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:28.84#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:28.90#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:28.90#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:28.90#ibcon#enter wrdev, iclass 18, count 2 2006.229.23:43:28.90#ibcon#first serial, iclass 18, count 2 2006.229.23:43:28.90#ibcon#enter sib2, iclass 18, count 2 2006.229.23:43:28.90#ibcon#flushed, iclass 18, count 2 2006.229.23:43:28.90#ibcon#about to write, iclass 18, count 2 2006.229.23:43:28.90#ibcon#wrote, iclass 18, count 2 2006.229.23:43:28.90#ibcon#about to read 3, iclass 18, count 2 2006.229.23:43:28.92#ibcon#read 3, iclass 18, count 2 2006.229.23:43:28.92#ibcon#about to read 4, iclass 18, count 2 2006.229.23:43:28.92#ibcon#read 4, iclass 18, count 2 2006.229.23:43:28.92#ibcon#about to read 5, iclass 18, count 2 2006.229.23:43:28.92#ibcon#read 5, iclass 18, count 2 2006.229.23:43:28.92#ibcon#about to read 6, iclass 18, count 2 2006.229.23:43:28.92#ibcon#read 6, iclass 18, count 2 2006.229.23:43:28.92#ibcon#end of sib2, iclass 18, count 2 2006.229.23:43:28.92#ibcon#*mode == 0, iclass 18, count 2 2006.229.23:43:28.92#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.229.23:43:28.92#ibcon#[27=AT04-04\r\n] 2006.229.23:43:28.92#ibcon#*before write, iclass 18, count 2 2006.229.23:43:28.92#ibcon#enter sib2, iclass 18, count 2 2006.229.23:43:28.92#ibcon#flushed, iclass 18, count 2 2006.229.23:43:28.92#ibcon#about to write, iclass 18, count 2 2006.229.23:43:28.92#ibcon#wrote, iclass 18, count 2 2006.229.23:43:28.92#ibcon#about to read 3, iclass 18, count 2 2006.229.23:43:28.95#ibcon#read 3, iclass 18, count 2 2006.229.23:43:28.95#ibcon#about to read 4, iclass 18, count 2 2006.229.23:43:28.95#ibcon#read 4, iclass 18, count 2 2006.229.23:43:28.95#ibcon#about to read 5, iclass 18, count 2 2006.229.23:43:28.95#ibcon#read 5, iclass 18, count 2 2006.229.23:43:28.95#ibcon#about to read 6, iclass 18, count 2 2006.229.23:43:28.95#ibcon#read 6, iclass 18, count 2 2006.229.23:43:28.95#ibcon#end of sib2, iclass 18, count 2 2006.229.23:43:28.95#ibcon#*after write, iclass 18, count 2 2006.229.23:43:28.95#ibcon#*before return 0, iclass 18, count 2 2006.229.23:43:28.95#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:28.95#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.229.23:43:28.95#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.229.23:43:28.95#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:28.95#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:29.07#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:29.07#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:29.07#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:43:29.07#ibcon#first serial, iclass 18, count 0 2006.229.23:43:29.07#ibcon#enter sib2, iclass 18, count 0 2006.229.23:43:29.07#ibcon#flushed, iclass 18, count 0 2006.229.23:43:29.07#ibcon#about to write, iclass 18, count 0 2006.229.23:43:29.07#ibcon#wrote, iclass 18, count 0 2006.229.23:43:29.07#ibcon#about to read 3, iclass 18, count 0 2006.229.23:43:29.09#ibcon#read 3, iclass 18, count 0 2006.229.23:43:29.09#ibcon#about to read 4, iclass 18, count 0 2006.229.23:43:29.09#ibcon#read 4, iclass 18, count 0 2006.229.23:43:29.09#ibcon#about to read 5, iclass 18, count 0 2006.229.23:43:29.09#ibcon#read 5, iclass 18, count 0 2006.229.23:43:29.09#ibcon#about to read 6, iclass 18, count 0 2006.229.23:43:29.09#ibcon#read 6, iclass 18, count 0 2006.229.23:43:29.09#ibcon#end of sib2, iclass 18, count 0 2006.229.23:43:29.09#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:43:29.09#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:43:29.09#ibcon#[27=USB\r\n] 2006.229.23:43:29.09#ibcon#*before write, iclass 18, count 0 2006.229.23:43:29.09#ibcon#enter sib2, iclass 18, count 0 2006.229.23:43:29.09#ibcon#flushed, iclass 18, count 0 2006.229.23:43:29.09#ibcon#about to write, iclass 18, count 0 2006.229.23:43:29.09#ibcon#wrote, iclass 18, count 0 2006.229.23:43:29.09#ibcon#about to read 3, iclass 18, count 0 2006.229.23:43:29.12#ibcon#read 3, iclass 18, count 0 2006.229.23:43:29.12#ibcon#about to read 4, iclass 18, count 0 2006.229.23:43:29.12#ibcon#read 4, iclass 18, count 0 2006.229.23:43:29.12#ibcon#about to read 5, iclass 18, count 0 2006.229.23:43:29.12#ibcon#read 5, iclass 18, count 0 2006.229.23:43:29.12#ibcon#about to read 6, iclass 18, count 0 2006.229.23:43:29.12#ibcon#read 6, iclass 18, count 0 2006.229.23:43:29.12#ibcon#end of sib2, iclass 18, count 0 2006.229.23:43:29.12#ibcon#*after write, iclass 18, count 0 2006.229.23:43:29.12#ibcon#*before return 0, iclass 18, count 0 2006.229.23:43:29.12#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:29.12#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.229.23:43:29.12#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:43:29.12#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:43:29.12$vck44/vblo=5,709.99 2006.229.23:43:29.12#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.229.23:43:29.12#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.229.23:43:29.12#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:29.12#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:29.12#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:29.12#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:29.12#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:43:29.12#ibcon#first serial, iclass 20, count 0 2006.229.23:43:29.12#ibcon#enter sib2, iclass 20, count 0 2006.229.23:43:29.12#ibcon#flushed, iclass 20, count 0 2006.229.23:43:29.12#ibcon#about to write, iclass 20, count 0 2006.229.23:43:29.12#ibcon#wrote, iclass 20, count 0 2006.229.23:43:29.12#ibcon#about to read 3, iclass 20, count 0 2006.229.23:43:29.14#ibcon#read 3, iclass 20, count 0 2006.229.23:43:29.14#ibcon#about to read 4, iclass 20, count 0 2006.229.23:43:29.14#ibcon#read 4, iclass 20, count 0 2006.229.23:43:29.14#ibcon#about to read 5, iclass 20, count 0 2006.229.23:43:29.14#ibcon#read 5, iclass 20, count 0 2006.229.23:43:29.14#ibcon#about to read 6, iclass 20, count 0 2006.229.23:43:29.14#ibcon#read 6, iclass 20, count 0 2006.229.23:43:29.14#ibcon#end of sib2, iclass 20, count 0 2006.229.23:43:29.14#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:43:29.14#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:43:29.14#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:43:29.14#ibcon#*before write, iclass 20, count 0 2006.229.23:43:29.14#ibcon#enter sib2, iclass 20, count 0 2006.229.23:43:29.14#ibcon#flushed, iclass 20, count 0 2006.229.23:43:29.14#ibcon#about to write, iclass 20, count 0 2006.229.23:43:29.14#ibcon#wrote, iclass 20, count 0 2006.229.23:43:29.14#ibcon#about to read 3, iclass 20, count 0 2006.229.23:43:29.18#ibcon#read 3, iclass 20, count 0 2006.229.23:43:29.18#ibcon#about to read 4, iclass 20, count 0 2006.229.23:43:29.18#ibcon#read 4, iclass 20, count 0 2006.229.23:43:29.18#ibcon#about to read 5, iclass 20, count 0 2006.229.23:43:29.18#ibcon#read 5, iclass 20, count 0 2006.229.23:43:29.18#ibcon#about to read 6, iclass 20, count 0 2006.229.23:43:29.18#ibcon#read 6, iclass 20, count 0 2006.229.23:43:29.18#ibcon#end of sib2, iclass 20, count 0 2006.229.23:43:29.18#ibcon#*after write, iclass 20, count 0 2006.229.23:43:29.18#ibcon#*before return 0, iclass 20, count 0 2006.229.23:43:29.18#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:29.18#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.229.23:43:29.18#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:43:29.18#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:43:29.18$vck44/vb=5,4 2006.229.23:43:29.18#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.229.23:43:29.18#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.229.23:43:29.18#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:29.18#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:29.24#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:29.24#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:29.24#ibcon#enter wrdev, iclass 22, count 2 2006.229.23:43:29.24#ibcon#first serial, iclass 22, count 2 2006.229.23:43:29.24#ibcon#enter sib2, iclass 22, count 2 2006.229.23:43:29.24#ibcon#flushed, iclass 22, count 2 2006.229.23:43:29.24#ibcon#about to write, iclass 22, count 2 2006.229.23:43:29.24#ibcon#wrote, iclass 22, count 2 2006.229.23:43:29.24#ibcon#about to read 3, iclass 22, count 2 2006.229.23:43:29.26#ibcon#read 3, iclass 22, count 2 2006.229.23:43:29.26#ibcon#about to read 4, iclass 22, count 2 2006.229.23:43:29.26#ibcon#read 4, iclass 22, count 2 2006.229.23:43:29.26#ibcon#about to read 5, iclass 22, count 2 2006.229.23:43:29.26#ibcon#read 5, iclass 22, count 2 2006.229.23:43:29.26#ibcon#about to read 6, iclass 22, count 2 2006.229.23:43:29.26#ibcon#read 6, iclass 22, count 2 2006.229.23:43:29.26#ibcon#end of sib2, iclass 22, count 2 2006.229.23:43:29.26#ibcon#*mode == 0, iclass 22, count 2 2006.229.23:43:29.26#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.229.23:43:29.26#ibcon#[27=AT05-04\r\n] 2006.229.23:43:29.26#ibcon#*before write, iclass 22, count 2 2006.229.23:43:29.26#ibcon#enter sib2, iclass 22, count 2 2006.229.23:43:29.26#ibcon#flushed, iclass 22, count 2 2006.229.23:43:29.26#ibcon#about to write, iclass 22, count 2 2006.229.23:43:29.26#ibcon#wrote, iclass 22, count 2 2006.229.23:43:29.26#ibcon#about to read 3, iclass 22, count 2 2006.229.23:43:29.29#ibcon#read 3, iclass 22, count 2 2006.229.23:43:29.29#ibcon#about to read 4, iclass 22, count 2 2006.229.23:43:29.29#ibcon#read 4, iclass 22, count 2 2006.229.23:43:29.29#ibcon#about to read 5, iclass 22, count 2 2006.229.23:43:29.29#ibcon#read 5, iclass 22, count 2 2006.229.23:43:29.29#ibcon#about to read 6, iclass 22, count 2 2006.229.23:43:29.29#ibcon#read 6, iclass 22, count 2 2006.229.23:43:29.29#ibcon#end of sib2, iclass 22, count 2 2006.229.23:43:29.29#ibcon#*after write, iclass 22, count 2 2006.229.23:43:29.29#ibcon#*before return 0, iclass 22, count 2 2006.229.23:43:29.29#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:29.29#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.229.23:43:29.29#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.229.23:43:29.29#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:29.29#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:29.41#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:29.41#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:29.41#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:43:29.41#ibcon#first serial, iclass 22, count 0 2006.229.23:43:29.41#ibcon#enter sib2, iclass 22, count 0 2006.229.23:43:29.41#ibcon#flushed, iclass 22, count 0 2006.229.23:43:29.41#ibcon#about to write, iclass 22, count 0 2006.229.23:43:29.41#ibcon#wrote, iclass 22, count 0 2006.229.23:43:29.41#ibcon#about to read 3, iclass 22, count 0 2006.229.23:43:29.43#ibcon#read 3, iclass 22, count 0 2006.229.23:43:29.43#ibcon#about to read 4, iclass 22, count 0 2006.229.23:43:29.43#ibcon#read 4, iclass 22, count 0 2006.229.23:43:29.43#ibcon#about to read 5, iclass 22, count 0 2006.229.23:43:29.43#ibcon#read 5, iclass 22, count 0 2006.229.23:43:29.43#ibcon#about to read 6, iclass 22, count 0 2006.229.23:43:29.43#ibcon#read 6, iclass 22, count 0 2006.229.23:43:29.43#ibcon#end of sib2, iclass 22, count 0 2006.229.23:43:29.43#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:43:29.43#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:43:29.43#ibcon#[27=USB\r\n] 2006.229.23:43:29.43#ibcon#*before write, iclass 22, count 0 2006.229.23:43:29.43#ibcon#enter sib2, iclass 22, count 0 2006.229.23:43:29.43#ibcon#flushed, iclass 22, count 0 2006.229.23:43:29.43#ibcon#about to write, iclass 22, count 0 2006.229.23:43:29.43#ibcon#wrote, iclass 22, count 0 2006.229.23:43:29.43#ibcon#about to read 3, iclass 22, count 0 2006.229.23:43:29.46#ibcon#read 3, iclass 22, count 0 2006.229.23:43:29.46#ibcon#about to read 4, iclass 22, count 0 2006.229.23:43:29.46#ibcon#read 4, iclass 22, count 0 2006.229.23:43:29.46#ibcon#about to read 5, iclass 22, count 0 2006.229.23:43:29.46#ibcon#read 5, iclass 22, count 0 2006.229.23:43:29.46#ibcon#about to read 6, iclass 22, count 0 2006.229.23:43:29.46#ibcon#read 6, iclass 22, count 0 2006.229.23:43:29.46#ibcon#end of sib2, iclass 22, count 0 2006.229.23:43:29.46#ibcon#*after write, iclass 22, count 0 2006.229.23:43:29.46#ibcon#*before return 0, iclass 22, count 0 2006.229.23:43:29.46#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:29.46#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.229.23:43:29.46#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:43:29.46#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:43:29.46$vck44/vblo=6,719.99 2006.229.23:43:29.46#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.23:43:29.46#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.23:43:29.46#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:29.46#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:29.46#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:29.46#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:29.46#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:43:29.46#ibcon#first serial, iclass 24, count 0 2006.229.23:43:29.46#ibcon#enter sib2, iclass 24, count 0 2006.229.23:43:29.46#ibcon#flushed, iclass 24, count 0 2006.229.23:43:29.46#ibcon#about to write, iclass 24, count 0 2006.229.23:43:29.46#ibcon#wrote, iclass 24, count 0 2006.229.23:43:29.46#ibcon#about to read 3, iclass 24, count 0 2006.229.23:43:29.48#ibcon#read 3, iclass 24, count 0 2006.229.23:43:29.48#ibcon#about to read 4, iclass 24, count 0 2006.229.23:43:29.48#ibcon#read 4, iclass 24, count 0 2006.229.23:43:29.48#ibcon#about to read 5, iclass 24, count 0 2006.229.23:43:29.48#ibcon#read 5, iclass 24, count 0 2006.229.23:43:29.48#ibcon#about to read 6, iclass 24, count 0 2006.229.23:43:29.48#ibcon#read 6, iclass 24, count 0 2006.229.23:43:29.48#ibcon#end of sib2, iclass 24, count 0 2006.229.23:43:29.48#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:43:29.48#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:43:29.48#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:43:29.48#ibcon#*before write, iclass 24, count 0 2006.229.23:43:29.48#ibcon#enter sib2, iclass 24, count 0 2006.229.23:43:29.48#ibcon#flushed, iclass 24, count 0 2006.229.23:43:29.48#ibcon#about to write, iclass 24, count 0 2006.229.23:43:29.48#ibcon#wrote, iclass 24, count 0 2006.229.23:43:29.48#ibcon#about to read 3, iclass 24, count 0 2006.229.23:43:29.52#ibcon#read 3, iclass 24, count 0 2006.229.23:43:29.52#ibcon#about to read 4, iclass 24, count 0 2006.229.23:43:29.52#ibcon#read 4, iclass 24, count 0 2006.229.23:43:29.52#ibcon#about to read 5, iclass 24, count 0 2006.229.23:43:29.52#ibcon#read 5, iclass 24, count 0 2006.229.23:43:29.52#ibcon#about to read 6, iclass 24, count 0 2006.229.23:43:29.52#ibcon#read 6, iclass 24, count 0 2006.229.23:43:29.52#ibcon#end of sib2, iclass 24, count 0 2006.229.23:43:29.52#ibcon#*after write, iclass 24, count 0 2006.229.23:43:29.52#ibcon#*before return 0, iclass 24, count 0 2006.229.23:43:29.52#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:29.52#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:43:29.52#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:43:29.52#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:43:29.52$vck44/vb=6,4 2006.229.23:43:29.52#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.229.23:43:29.52#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.229.23:43:29.52#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:29.52#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:29.58#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:29.58#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:29.58#ibcon#enter wrdev, iclass 26, count 2 2006.229.23:43:29.58#ibcon#first serial, iclass 26, count 2 2006.229.23:43:29.58#ibcon#enter sib2, iclass 26, count 2 2006.229.23:43:29.58#ibcon#flushed, iclass 26, count 2 2006.229.23:43:29.58#ibcon#about to write, iclass 26, count 2 2006.229.23:43:29.58#ibcon#wrote, iclass 26, count 2 2006.229.23:43:29.58#ibcon#about to read 3, iclass 26, count 2 2006.229.23:43:29.60#ibcon#read 3, iclass 26, count 2 2006.229.23:43:29.60#ibcon#about to read 4, iclass 26, count 2 2006.229.23:43:29.60#ibcon#read 4, iclass 26, count 2 2006.229.23:43:29.60#ibcon#about to read 5, iclass 26, count 2 2006.229.23:43:29.60#ibcon#read 5, iclass 26, count 2 2006.229.23:43:29.60#ibcon#about to read 6, iclass 26, count 2 2006.229.23:43:29.60#ibcon#read 6, iclass 26, count 2 2006.229.23:43:29.60#ibcon#end of sib2, iclass 26, count 2 2006.229.23:43:29.60#ibcon#*mode == 0, iclass 26, count 2 2006.229.23:43:29.60#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.229.23:43:29.60#ibcon#[27=AT06-04\r\n] 2006.229.23:43:29.60#ibcon#*before write, iclass 26, count 2 2006.229.23:43:29.60#ibcon#enter sib2, iclass 26, count 2 2006.229.23:43:29.60#ibcon#flushed, iclass 26, count 2 2006.229.23:43:29.60#ibcon#about to write, iclass 26, count 2 2006.229.23:43:29.60#ibcon#wrote, iclass 26, count 2 2006.229.23:43:29.60#ibcon#about to read 3, iclass 26, count 2 2006.229.23:43:29.63#ibcon#read 3, iclass 26, count 2 2006.229.23:43:29.63#ibcon#about to read 4, iclass 26, count 2 2006.229.23:43:29.63#ibcon#read 4, iclass 26, count 2 2006.229.23:43:29.63#ibcon#about to read 5, iclass 26, count 2 2006.229.23:43:29.63#ibcon#read 5, iclass 26, count 2 2006.229.23:43:29.63#ibcon#about to read 6, iclass 26, count 2 2006.229.23:43:29.63#ibcon#read 6, iclass 26, count 2 2006.229.23:43:29.63#ibcon#end of sib2, iclass 26, count 2 2006.229.23:43:29.63#ibcon#*after write, iclass 26, count 2 2006.229.23:43:29.63#ibcon#*before return 0, iclass 26, count 2 2006.229.23:43:29.63#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:29.63#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.229.23:43:29.63#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.229.23:43:29.63#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:29.63#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:29.75#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:29.75#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:29.75#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:43:29.75#ibcon#first serial, iclass 26, count 0 2006.229.23:43:29.75#ibcon#enter sib2, iclass 26, count 0 2006.229.23:43:29.75#ibcon#flushed, iclass 26, count 0 2006.229.23:43:29.75#ibcon#about to write, iclass 26, count 0 2006.229.23:43:29.75#ibcon#wrote, iclass 26, count 0 2006.229.23:43:29.75#ibcon#about to read 3, iclass 26, count 0 2006.229.23:43:29.77#ibcon#read 3, iclass 26, count 0 2006.229.23:43:29.77#ibcon#about to read 4, iclass 26, count 0 2006.229.23:43:29.77#ibcon#read 4, iclass 26, count 0 2006.229.23:43:29.77#ibcon#about to read 5, iclass 26, count 0 2006.229.23:43:29.77#ibcon#read 5, iclass 26, count 0 2006.229.23:43:29.77#ibcon#about to read 6, iclass 26, count 0 2006.229.23:43:29.77#ibcon#read 6, iclass 26, count 0 2006.229.23:43:29.77#ibcon#end of sib2, iclass 26, count 0 2006.229.23:43:29.77#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:43:29.77#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:43:29.77#ibcon#[27=USB\r\n] 2006.229.23:43:29.77#ibcon#*before write, iclass 26, count 0 2006.229.23:43:29.77#ibcon#enter sib2, iclass 26, count 0 2006.229.23:43:29.77#ibcon#flushed, iclass 26, count 0 2006.229.23:43:29.77#ibcon#about to write, iclass 26, count 0 2006.229.23:43:29.77#ibcon#wrote, iclass 26, count 0 2006.229.23:43:29.77#ibcon#about to read 3, iclass 26, count 0 2006.229.23:43:29.80#ibcon#read 3, iclass 26, count 0 2006.229.23:43:29.80#ibcon#about to read 4, iclass 26, count 0 2006.229.23:43:29.80#ibcon#read 4, iclass 26, count 0 2006.229.23:43:29.80#ibcon#about to read 5, iclass 26, count 0 2006.229.23:43:29.80#ibcon#read 5, iclass 26, count 0 2006.229.23:43:29.80#ibcon#about to read 6, iclass 26, count 0 2006.229.23:43:29.80#ibcon#read 6, iclass 26, count 0 2006.229.23:43:29.80#ibcon#end of sib2, iclass 26, count 0 2006.229.23:43:29.80#ibcon#*after write, iclass 26, count 0 2006.229.23:43:29.80#ibcon#*before return 0, iclass 26, count 0 2006.229.23:43:29.80#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:29.80#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.229.23:43:29.80#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:43:29.80#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:43:29.80$vck44/vblo=7,734.99 2006.229.23:43:29.80#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.229.23:43:29.80#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.229.23:43:29.80#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:29.80#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:29.80#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:29.80#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:29.80#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:43:29.80#ibcon#first serial, iclass 28, count 0 2006.229.23:43:29.80#ibcon#enter sib2, iclass 28, count 0 2006.229.23:43:29.80#ibcon#flushed, iclass 28, count 0 2006.229.23:43:29.80#ibcon#about to write, iclass 28, count 0 2006.229.23:43:29.80#ibcon#wrote, iclass 28, count 0 2006.229.23:43:29.80#ibcon#about to read 3, iclass 28, count 0 2006.229.23:43:29.82#ibcon#read 3, iclass 28, count 0 2006.229.23:43:29.82#ibcon#about to read 4, iclass 28, count 0 2006.229.23:43:29.82#ibcon#read 4, iclass 28, count 0 2006.229.23:43:29.82#ibcon#about to read 5, iclass 28, count 0 2006.229.23:43:29.82#ibcon#read 5, iclass 28, count 0 2006.229.23:43:29.82#ibcon#about to read 6, iclass 28, count 0 2006.229.23:43:29.82#ibcon#read 6, iclass 28, count 0 2006.229.23:43:29.82#ibcon#end of sib2, iclass 28, count 0 2006.229.23:43:29.82#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:43:29.82#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:43:29.82#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:43:29.82#ibcon#*before write, iclass 28, count 0 2006.229.23:43:29.82#ibcon#enter sib2, iclass 28, count 0 2006.229.23:43:29.82#ibcon#flushed, iclass 28, count 0 2006.229.23:43:29.82#ibcon#about to write, iclass 28, count 0 2006.229.23:43:29.82#ibcon#wrote, iclass 28, count 0 2006.229.23:43:29.82#ibcon#about to read 3, iclass 28, count 0 2006.229.23:43:29.86#ibcon#read 3, iclass 28, count 0 2006.229.23:43:29.86#ibcon#about to read 4, iclass 28, count 0 2006.229.23:43:29.86#ibcon#read 4, iclass 28, count 0 2006.229.23:43:29.86#ibcon#about to read 5, iclass 28, count 0 2006.229.23:43:29.86#ibcon#read 5, iclass 28, count 0 2006.229.23:43:29.86#ibcon#about to read 6, iclass 28, count 0 2006.229.23:43:29.86#ibcon#read 6, iclass 28, count 0 2006.229.23:43:29.86#ibcon#end of sib2, iclass 28, count 0 2006.229.23:43:29.86#ibcon#*after write, iclass 28, count 0 2006.229.23:43:29.86#ibcon#*before return 0, iclass 28, count 0 2006.229.23:43:29.86#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:29.86#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.229.23:43:29.86#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:43:29.86#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:43:29.86$vck44/vb=7,4 2006.229.23:43:29.86#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.229.23:43:29.86#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.229.23:43:29.86#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:29.86#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:29.92#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:29.92#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:29.92#ibcon#enter wrdev, iclass 30, count 2 2006.229.23:43:29.92#ibcon#first serial, iclass 30, count 2 2006.229.23:43:29.92#ibcon#enter sib2, iclass 30, count 2 2006.229.23:43:29.92#ibcon#flushed, iclass 30, count 2 2006.229.23:43:29.92#ibcon#about to write, iclass 30, count 2 2006.229.23:43:29.92#ibcon#wrote, iclass 30, count 2 2006.229.23:43:29.92#ibcon#about to read 3, iclass 30, count 2 2006.229.23:43:29.94#ibcon#read 3, iclass 30, count 2 2006.229.23:43:29.94#ibcon#about to read 4, iclass 30, count 2 2006.229.23:43:29.94#ibcon#read 4, iclass 30, count 2 2006.229.23:43:29.94#ibcon#about to read 5, iclass 30, count 2 2006.229.23:43:29.94#ibcon#read 5, iclass 30, count 2 2006.229.23:43:29.94#ibcon#about to read 6, iclass 30, count 2 2006.229.23:43:29.94#ibcon#read 6, iclass 30, count 2 2006.229.23:43:29.94#ibcon#end of sib2, iclass 30, count 2 2006.229.23:43:29.94#ibcon#*mode == 0, iclass 30, count 2 2006.229.23:43:29.94#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.229.23:43:29.94#ibcon#[27=AT07-04\r\n] 2006.229.23:43:29.94#ibcon#*before write, iclass 30, count 2 2006.229.23:43:29.94#ibcon#enter sib2, iclass 30, count 2 2006.229.23:43:29.94#ibcon#flushed, iclass 30, count 2 2006.229.23:43:29.94#ibcon#about to write, iclass 30, count 2 2006.229.23:43:29.94#ibcon#wrote, iclass 30, count 2 2006.229.23:43:29.94#ibcon#about to read 3, iclass 30, count 2 2006.229.23:43:29.97#ibcon#read 3, iclass 30, count 2 2006.229.23:43:29.97#ibcon#about to read 4, iclass 30, count 2 2006.229.23:43:29.97#ibcon#read 4, iclass 30, count 2 2006.229.23:43:29.97#ibcon#about to read 5, iclass 30, count 2 2006.229.23:43:29.97#ibcon#read 5, iclass 30, count 2 2006.229.23:43:29.97#ibcon#about to read 6, iclass 30, count 2 2006.229.23:43:29.97#ibcon#read 6, iclass 30, count 2 2006.229.23:43:29.97#ibcon#end of sib2, iclass 30, count 2 2006.229.23:43:29.97#ibcon#*after write, iclass 30, count 2 2006.229.23:43:29.97#ibcon#*before return 0, iclass 30, count 2 2006.229.23:43:29.97#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:29.97#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.229.23:43:29.97#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.229.23:43:29.97#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:29.97#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:30.09#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:30.09#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:30.09#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:43:30.09#ibcon#first serial, iclass 30, count 0 2006.229.23:43:30.09#ibcon#enter sib2, iclass 30, count 0 2006.229.23:43:30.09#ibcon#flushed, iclass 30, count 0 2006.229.23:43:30.09#ibcon#about to write, iclass 30, count 0 2006.229.23:43:30.09#ibcon#wrote, iclass 30, count 0 2006.229.23:43:30.09#ibcon#about to read 3, iclass 30, count 0 2006.229.23:43:30.11#ibcon#read 3, iclass 30, count 0 2006.229.23:43:30.11#ibcon#about to read 4, iclass 30, count 0 2006.229.23:43:30.11#ibcon#read 4, iclass 30, count 0 2006.229.23:43:30.11#ibcon#about to read 5, iclass 30, count 0 2006.229.23:43:30.11#ibcon#read 5, iclass 30, count 0 2006.229.23:43:30.11#ibcon#about to read 6, iclass 30, count 0 2006.229.23:43:30.11#ibcon#read 6, iclass 30, count 0 2006.229.23:43:30.11#ibcon#end of sib2, iclass 30, count 0 2006.229.23:43:30.11#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:43:30.11#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:43:30.11#ibcon#[27=USB\r\n] 2006.229.23:43:30.11#ibcon#*before write, iclass 30, count 0 2006.229.23:43:30.11#ibcon#enter sib2, iclass 30, count 0 2006.229.23:43:30.11#ibcon#flushed, iclass 30, count 0 2006.229.23:43:30.11#ibcon#about to write, iclass 30, count 0 2006.229.23:43:30.11#ibcon#wrote, iclass 30, count 0 2006.229.23:43:30.11#ibcon#about to read 3, iclass 30, count 0 2006.229.23:43:30.14#ibcon#read 3, iclass 30, count 0 2006.229.23:43:30.14#ibcon#about to read 4, iclass 30, count 0 2006.229.23:43:30.14#ibcon#read 4, iclass 30, count 0 2006.229.23:43:30.14#ibcon#about to read 5, iclass 30, count 0 2006.229.23:43:30.14#ibcon#read 5, iclass 30, count 0 2006.229.23:43:30.14#ibcon#about to read 6, iclass 30, count 0 2006.229.23:43:30.14#ibcon#read 6, iclass 30, count 0 2006.229.23:43:30.14#ibcon#end of sib2, iclass 30, count 0 2006.229.23:43:30.14#ibcon#*after write, iclass 30, count 0 2006.229.23:43:30.14#ibcon#*before return 0, iclass 30, count 0 2006.229.23:43:30.14#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:30.14#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.229.23:43:30.14#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:43:30.14#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:43:30.14$vck44/vblo=8,744.99 2006.229.23:43:30.14#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.229.23:43:30.14#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.229.23:43:30.14#ibcon#ireg 17 cls_cnt 0 2006.229.23:43:30.14#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:30.14#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:30.14#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:30.14#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:43:30.14#ibcon#first serial, iclass 32, count 0 2006.229.23:43:30.14#ibcon#enter sib2, iclass 32, count 0 2006.229.23:43:30.14#ibcon#flushed, iclass 32, count 0 2006.229.23:43:30.14#ibcon#about to write, iclass 32, count 0 2006.229.23:43:30.14#ibcon#wrote, iclass 32, count 0 2006.229.23:43:30.14#ibcon#about to read 3, iclass 32, count 0 2006.229.23:43:30.16#ibcon#read 3, iclass 32, count 0 2006.229.23:43:30.16#ibcon#about to read 4, iclass 32, count 0 2006.229.23:43:30.16#ibcon#read 4, iclass 32, count 0 2006.229.23:43:30.16#ibcon#about to read 5, iclass 32, count 0 2006.229.23:43:30.16#ibcon#read 5, iclass 32, count 0 2006.229.23:43:30.16#ibcon#about to read 6, iclass 32, count 0 2006.229.23:43:30.16#ibcon#read 6, iclass 32, count 0 2006.229.23:43:30.16#ibcon#end of sib2, iclass 32, count 0 2006.229.23:43:30.16#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:43:30.16#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:43:30.16#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:43:30.16#ibcon#*before write, iclass 32, count 0 2006.229.23:43:30.16#ibcon#enter sib2, iclass 32, count 0 2006.229.23:43:30.16#ibcon#flushed, iclass 32, count 0 2006.229.23:43:30.16#ibcon#about to write, iclass 32, count 0 2006.229.23:43:30.16#ibcon#wrote, iclass 32, count 0 2006.229.23:43:30.16#ibcon#about to read 3, iclass 32, count 0 2006.229.23:43:30.20#ibcon#read 3, iclass 32, count 0 2006.229.23:43:30.20#ibcon#about to read 4, iclass 32, count 0 2006.229.23:43:30.20#ibcon#read 4, iclass 32, count 0 2006.229.23:43:30.20#ibcon#about to read 5, iclass 32, count 0 2006.229.23:43:30.20#ibcon#read 5, iclass 32, count 0 2006.229.23:43:30.20#ibcon#about to read 6, iclass 32, count 0 2006.229.23:43:30.20#ibcon#read 6, iclass 32, count 0 2006.229.23:43:30.20#ibcon#end of sib2, iclass 32, count 0 2006.229.23:43:30.20#ibcon#*after write, iclass 32, count 0 2006.229.23:43:30.20#ibcon#*before return 0, iclass 32, count 0 2006.229.23:43:30.20#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:30.20#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.229.23:43:30.20#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:43:30.20#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:43:30.20$vck44/vb=8,4 2006.229.23:43:30.20#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.229.23:43:30.20#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.229.23:43:30.20#ibcon#ireg 11 cls_cnt 2 2006.229.23:43:30.20#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:30.26#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:30.26#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:30.26#ibcon#enter wrdev, iclass 34, count 2 2006.229.23:43:30.26#ibcon#first serial, iclass 34, count 2 2006.229.23:43:30.26#ibcon#enter sib2, iclass 34, count 2 2006.229.23:43:30.26#ibcon#flushed, iclass 34, count 2 2006.229.23:43:30.26#ibcon#about to write, iclass 34, count 2 2006.229.23:43:30.26#ibcon#wrote, iclass 34, count 2 2006.229.23:43:30.26#ibcon#about to read 3, iclass 34, count 2 2006.229.23:43:30.28#ibcon#read 3, iclass 34, count 2 2006.229.23:43:30.28#ibcon#about to read 4, iclass 34, count 2 2006.229.23:43:30.28#ibcon#read 4, iclass 34, count 2 2006.229.23:43:30.28#ibcon#about to read 5, iclass 34, count 2 2006.229.23:43:30.28#ibcon#read 5, iclass 34, count 2 2006.229.23:43:30.28#ibcon#about to read 6, iclass 34, count 2 2006.229.23:43:30.28#ibcon#read 6, iclass 34, count 2 2006.229.23:43:30.28#ibcon#end of sib2, iclass 34, count 2 2006.229.23:43:30.28#ibcon#*mode == 0, iclass 34, count 2 2006.229.23:43:30.28#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.229.23:43:30.28#ibcon#[27=AT08-04\r\n] 2006.229.23:43:30.28#ibcon#*before write, iclass 34, count 2 2006.229.23:43:30.28#ibcon#enter sib2, iclass 34, count 2 2006.229.23:43:30.28#ibcon#flushed, iclass 34, count 2 2006.229.23:43:30.28#ibcon#about to write, iclass 34, count 2 2006.229.23:43:30.28#ibcon#wrote, iclass 34, count 2 2006.229.23:43:30.28#ibcon#about to read 3, iclass 34, count 2 2006.229.23:43:30.31#ibcon#read 3, iclass 34, count 2 2006.229.23:43:30.31#ibcon#about to read 4, iclass 34, count 2 2006.229.23:43:30.31#ibcon#read 4, iclass 34, count 2 2006.229.23:43:30.31#ibcon#about to read 5, iclass 34, count 2 2006.229.23:43:30.31#ibcon#read 5, iclass 34, count 2 2006.229.23:43:30.31#ibcon#about to read 6, iclass 34, count 2 2006.229.23:43:30.31#ibcon#read 6, iclass 34, count 2 2006.229.23:43:30.31#ibcon#end of sib2, iclass 34, count 2 2006.229.23:43:30.31#ibcon#*after write, iclass 34, count 2 2006.229.23:43:30.31#ibcon#*before return 0, iclass 34, count 2 2006.229.23:43:30.31#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:30.31#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.229.23:43:30.31#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.229.23:43:30.31#ibcon#ireg 7 cls_cnt 0 2006.229.23:43:30.31#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:30.43#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:30.43#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:30.43#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:43:30.43#ibcon#first serial, iclass 34, count 0 2006.229.23:43:30.43#ibcon#enter sib2, iclass 34, count 0 2006.229.23:43:30.43#ibcon#flushed, iclass 34, count 0 2006.229.23:43:30.43#ibcon#about to write, iclass 34, count 0 2006.229.23:43:30.43#ibcon#wrote, iclass 34, count 0 2006.229.23:43:30.43#ibcon#about to read 3, iclass 34, count 0 2006.229.23:43:30.45#ibcon#read 3, iclass 34, count 0 2006.229.23:43:30.45#ibcon#about to read 4, iclass 34, count 0 2006.229.23:43:30.45#ibcon#read 4, iclass 34, count 0 2006.229.23:43:30.45#ibcon#about to read 5, iclass 34, count 0 2006.229.23:43:30.45#ibcon#read 5, iclass 34, count 0 2006.229.23:43:30.45#ibcon#about to read 6, iclass 34, count 0 2006.229.23:43:30.45#ibcon#read 6, iclass 34, count 0 2006.229.23:43:30.45#ibcon#end of sib2, iclass 34, count 0 2006.229.23:43:30.45#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:43:30.45#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:43:30.45#ibcon#[27=USB\r\n] 2006.229.23:43:30.45#ibcon#*before write, iclass 34, count 0 2006.229.23:43:30.45#ibcon#enter sib2, iclass 34, count 0 2006.229.23:43:30.45#ibcon#flushed, iclass 34, count 0 2006.229.23:43:30.45#ibcon#about to write, iclass 34, count 0 2006.229.23:43:30.45#ibcon#wrote, iclass 34, count 0 2006.229.23:43:30.45#ibcon#about to read 3, iclass 34, count 0 2006.229.23:43:30.48#ibcon#read 3, iclass 34, count 0 2006.229.23:43:30.48#ibcon#about to read 4, iclass 34, count 0 2006.229.23:43:30.48#ibcon#read 4, iclass 34, count 0 2006.229.23:43:30.48#ibcon#about to read 5, iclass 34, count 0 2006.229.23:43:30.48#ibcon#read 5, iclass 34, count 0 2006.229.23:43:30.48#ibcon#about to read 6, iclass 34, count 0 2006.229.23:43:30.48#ibcon#read 6, iclass 34, count 0 2006.229.23:43:30.48#ibcon#end of sib2, iclass 34, count 0 2006.229.23:43:30.48#ibcon#*after write, iclass 34, count 0 2006.229.23:43:30.48#ibcon#*before return 0, iclass 34, count 0 2006.229.23:43:30.48#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:30.48#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.229.23:43:30.48#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:43:30.48#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:43:30.48$vck44/vabw=wide 2006.229.23:43:30.48#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.229.23:43:30.48#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.229.23:43:30.48#ibcon#ireg 8 cls_cnt 0 2006.229.23:43:30.48#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:30.48#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:30.48#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:30.48#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:43:30.48#ibcon#first serial, iclass 36, count 0 2006.229.23:43:30.48#ibcon#enter sib2, iclass 36, count 0 2006.229.23:43:30.48#ibcon#flushed, iclass 36, count 0 2006.229.23:43:30.48#ibcon#about to write, iclass 36, count 0 2006.229.23:43:30.48#ibcon#wrote, iclass 36, count 0 2006.229.23:43:30.48#ibcon#about to read 3, iclass 36, count 0 2006.229.23:43:30.50#ibcon#read 3, iclass 36, count 0 2006.229.23:43:30.50#ibcon#about to read 4, iclass 36, count 0 2006.229.23:43:30.50#ibcon#read 4, iclass 36, count 0 2006.229.23:43:30.50#ibcon#about to read 5, iclass 36, count 0 2006.229.23:43:30.50#ibcon#read 5, iclass 36, count 0 2006.229.23:43:30.50#ibcon#about to read 6, iclass 36, count 0 2006.229.23:43:30.50#ibcon#read 6, iclass 36, count 0 2006.229.23:43:30.50#ibcon#end of sib2, iclass 36, count 0 2006.229.23:43:30.50#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:43:30.50#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:43:30.50#ibcon#[25=BW32\r\n] 2006.229.23:43:30.50#ibcon#*before write, iclass 36, count 0 2006.229.23:43:30.50#ibcon#enter sib2, iclass 36, count 0 2006.229.23:43:30.50#ibcon#flushed, iclass 36, count 0 2006.229.23:43:30.50#ibcon#about to write, iclass 36, count 0 2006.229.23:43:30.50#ibcon#wrote, iclass 36, count 0 2006.229.23:43:30.50#ibcon#about to read 3, iclass 36, count 0 2006.229.23:43:30.53#ibcon#read 3, iclass 36, count 0 2006.229.23:43:30.53#ibcon#about to read 4, iclass 36, count 0 2006.229.23:43:30.53#ibcon#read 4, iclass 36, count 0 2006.229.23:43:30.53#ibcon#about to read 5, iclass 36, count 0 2006.229.23:43:30.53#ibcon#read 5, iclass 36, count 0 2006.229.23:43:30.53#ibcon#about to read 6, iclass 36, count 0 2006.229.23:43:30.53#ibcon#read 6, iclass 36, count 0 2006.229.23:43:30.53#ibcon#end of sib2, iclass 36, count 0 2006.229.23:43:30.53#ibcon#*after write, iclass 36, count 0 2006.229.23:43:30.53#ibcon#*before return 0, iclass 36, count 0 2006.229.23:43:30.53#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:30.53#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.229.23:43:30.53#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:43:30.53#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:43:30.53$vck44/vbbw=wide 2006.229.23:43:30.53#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.23:43:30.53#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.23:43:30.53#ibcon#ireg 8 cls_cnt 0 2006.229.23:43:30.53#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:43:30.60#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:43:30.60#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:43:30.60#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:43:30.60#ibcon#first serial, iclass 38, count 0 2006.229.23:43:30.60#ibcon#enter sib2, iclass 38, count 0 2006.229.23:43:30.60#ibcon#flushed, iclass 38, count 0 2006.229.23:43:30.60#ibcon#about to write, iclass 38, count 0 2006.229.23:43:30.60#ibcon#wrote, iclass 38, count 0 2006.229.23:43:30.60#ibcon#about to read 3, iclass 38, count 0 2006.229.23:43:30.62#ibcon#read 3, iclass 38, count 0 2006.229.23:43:30.62#ibcon#about to read 4, iclass 38, count 0 2006.229.23:43:30.62#ibcon#read 4, iclass 38, count 0 2006.229.23:43:30.62#ibcon#about to read 5, iclass 38, count 0 2006.229.23:43:30.62#ibcon#read 5, iclass 38, count 0 2006.229.23:43:30.62#ibcon#about to read 6, iclass 38, count 0 2006.229.23:43:30.62#ibcon#read 6, iclass 38, count 0 2006.229.23:43:30.62#ibcon#end of sib2, iclass 38, count 0 2006.229.23:43:30.62#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:43:30.62#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:43:30.62#ibcon#[27=BW32\r\n] 2006.229.23:43:30.62#ibcon#*before write, iclass 38, count 0 2006.229.23:43:30.62#ibcon#enter sib2, iclass 38, count 0 2006.229.23:43:30.62#ibcon#flushed, iclass 38, count 0 2006.229.23:43:30.62#ibcon#about to write, iclass 38, count 0 2006.229.23:43:30.62#ibcon#wrote, iclass 38, count 0 2006.229.23:43:30.62#ibcon#about to read 3, iclass 38, count 0 2006.229.23:43:30.65#ibcon#read 3, iclass 38, count 0 2006.229.23:43:30.65#ibcon#about to read 4, iclass 38, count 0 2006.229.23:43:30.65#ibcon#read 4, iclass 38, count 0 2006.229.23:43:30.65#ibcon#about to read 5, iclass 38, count 0 2006.229.23:43:30.65#ibcon#read 5, iclass 38, count 0 2006.229.23:43:30.65#ibcon#about to read 6, iclass 38, count 0 2006.229.23:43:30.65#ibcon#read 6, iclass 38, count 0 2006.229.23:43:30.65#ibcon#end of sib2, iclass 38, count 0 2006.229.23:43:30.65#ibcon#*after write, iclass 38, count 0 2006.229.23:43:30.65#ibcon#*before return 0, iclass 38, count 0 2006.229.23:43:30.65#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:43:30.65#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:43:30.65#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:43:30.65#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:43:30.65$setupk4/ifdk4 2006.229.23:43:30.65$ifdk4/lo= 2006.229.23:43:30.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:43:30.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:43:30.65$ifdk4/patch= 2006.229.23:43:30.65$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:43:30.65$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:43:30.65$setupk4/!*+20s 2006.229.23:43:30.91#abcon#<5=/08 2.0 5.5 30.14 831002.6\r\n> 2006.229.23:43:30.93#abcon#{5=INTERFACE CLEAR} 2006.229.23:43:30.99#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:43:41.08#abcon#<5=/08 2.0 5.5 30.13 841002.6\r\n> 2006.229.23:43:41.10#abcon#{5=INTERFACE CLEAR} 2006.229.23:43:41.16#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:43:45.16$setupk4/"tpicd 2006.229.23:43:45.16$setupk4/echo=off 2006.229.23:43:45.16$setupk4/xlog=off 2006.229.23:43:45.16:!2006.229.23:45:41 2006.229.23:43:46.14#trakl#Source acquired 2006.229.23:43:47.14#flagr#flagr/antenna,acquired 2006.229.23:45:41.00:preob 2006.229.23:45:42.13/onsource/TRACKING 2006.229.23:45:42.13:!2006.229.23:45:51 2006.229.23:45:51.00:"tape 2006.229.23:45:51.00:"st=record 2006.229.23:45:51.00:data_valid=on 2006.229.23:45:51.00:midob 2006.229.23:45:51.13/onsource/TRACKING 2006.229.23:45:51.13/wx/30.22,1002.6,82 2006.229.23:45:51.30/cable/+6.4079E-03 2006.229.23:45:52.39/va/01,08,usb,yes,28,31 2006.229.23:45:52.39/va/02,07,usb,yes,31,31 2006.229.23:45:52.39/va/03,06,usb,yes,38,41 2006.229.23:45:52.39/va/04,07,usb,yes,32,33 2006.229.23:45:52.39/va/05,04,usb,yes,28,29 2006.229.23:45:52.39/va/06,04,usb,yes,32,32 2006.229.23:45:52.39/va/07,05,usb,yes,28,29 2006.229.23:45:52.39/va/08,06,usb,yes,20,25 2006.229.23:45:52.62/valo/01,524.99,yes,locked 2006.229.23:45:52.62/valo/02,534.99,yes,locked 2006.229.23:45:52.62/valo/03,564.99,yes,locked 2006.229.23:45:52.62/valo/04,624.99,yes,locked 2006.229.23:45:52.62/valo/05,734.99,yes,locked 2006.229.23:45:52.62/valo/06,814.99,yes,locked 2006.229.23:45:52.62/valo/07,864.99,yes,locked 2006.229.23:45:52.62/valo/08,884.99,yes,locked 2006.229.23:45:53.71/vb/01,04,usb,yes,30,28 2006.229.23:45:53.71/vb/02,04,usb,yes,33,33 2006.229.23:45:53.71/vb/03,04,usb,yes,30,33 2006.229.23:45:53.71/vb/04,04,usb,yes,34,33 2006.229.23:45:53.71/vb/05,04,usb,yes,27,29 2006.229.23:45:53.71/vb/06,04,usb,yes,31,27 2006.229.23:45:53.71/vb/07,04,usb,yes,31,31 2006.229.23:45:53.71/vb/08,04,usb,yes,28,32 2006.229.23:45:53.94/vblo/01,629.99,yes,locked 2006.229.23:45:53.94/vblo/02,634.99,yes,locked 2006.229.23:45:53.94/vblo/03,649.99,yes,locked 2006.229.23:45:53.94/vblo/04,679.99,yes,locked 2006.229.23:45:53.94/vblo/05,709.99,yes,locked 2006.229.23:45:53.94/vblo/06,719.99,yes,locked 2006.229.23:45:53.94/vblo/07,734.99,yes,locked 2006.229.23:45:53.94/vblo/08,744.99,yes,locked 2006.229.23:45:54.09/vabw/8 2006.229.23:45:54.24/vbbw/8 2006.229.23:45:54.33/xfe/off,on,12.2 2006.229.23:45:54.70/ifatt/23,28,28,28 2006.229.23:45:55.08/fmout-gps/S +4.52E-07 2006.229.23:45:55.12:!2006.229.23:46:41 2006.229.23:46:41.00:data_valid=off 2006.229.23:46:41.00:"et 2006.229.23:46:41.00:!+3s 2006.229.23:46:44.01:"tape 2006.229.23:46:44.01:postob 2006.229.23:46:44.19/cable/+6.4086E-03 2006.229.23:46:44.19/wx/30.27,1002.6,80 2006.229.23:46:45.08/fmout-gps/S +4.51E-07 2006.229.23:46:45.08:scan_name=229-2349,jd0608,40 2006.229.23:46:45.08:source=0537-441,053850.36,-440508.9,2000.0,cw 2006.229.23:46:46.14#flagr#flagr/antenna,new-source 2006.229.23:46:46.14:checkk5 2006.229.23:46:46.50/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:46:46.90/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:46:47.32/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:46:47.71/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:46:48.10/chk_obsdata//k5ts1/T2292345??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:46:48.49/chk_obsdata//k5ts2/T2292345??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:46:48.88/chk_obsdata//k5ts3/T2292345??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:46:49.28/chk_obsdata//k5ts4/T2292345??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.229.23:46:50.01/k5log//k5ts1_log_newline 2006.229.23:46:50.72/k5log//k5ts2_log_newline 2006.229.23:46:51.43/k5log//k5ts3_log_newline 2006.229.23:46:52.14/k5log//k5ts4_log_newline 2006.229.23:46:52.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:46:52.16:setupk4=1 2006.229.23:46:52.16$setupk4/echo=on 2006.229.23:46:52.16$setupk4/pcalon 2006.229.23:46:52.16$pcalon/"no phase cal control is implemented here 2006.229.23:46:52.16$setupk4/"tpicd=stop 2006.229.23:46:52.16$setupk4/"rec=synch_on 2006.229.23:46:52.16$setupk4/"rec_mode=128 2006.229.23:46:52.16$setupk4/!* 2006.229.23:46:52.17$setupk4/recpk4 2006.229.23:46:52.17$recpk4/recpatch= 2006.229.23:46:52.17$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:46:52.17$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:46:52.17$setupk4/vck44 2006.229.23:46:52.17$vck44/valo=1,524.99 2006.229.23:46:52.17#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.23:46:52.17#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.23:46:52.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:52.17#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:52.17#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:52.17#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:52.17#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:46:52.17#ibcon#first serial, iclass 15, count 0 2006.229.23:46:52.17#ibcon#enter sib2, iclass 15, count 0 2006.229.23:46:52.17#ibcon#flushed, iclass 15, count 0 2006.229.23:46:52.17#ibcon#about to write, iclass 15, count 0 2006.229.23:46:52.17#ibcon#wrote, iclass 15, count 0 2006.229.23:46:52.17#ibcon#about to read 3, iclass 15, count 0 2006.229.23:46:52.19#ibcon#read 3, iclass 15, count 0 2006.229.23:46:52.19#ibcon#about to read 4, iclass 15, count 0 2006.229.23:46:52.19#ibcon#read 4, iclass 15, count 0 2006.229.23:46:52.19#ibcon#about to read 5, iclass 15, count 0 2006.229.23:46:52.19#ibcon#read 5, iclass 15, count 0 2006.229.23:46:52.19#ibcon#about to read 6, iclass 15, count 0 2006.229.23:46:52.19#ibcon#read 6, iclass 15, count 0 2006.229.23:46:52.19#ibcon#end of sib2, iclass 15, count 0 2006.229.23:46:52.19#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:46:52.19#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:46:52.19#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:46:52.19#ibcon#*before write, iclass 15, count 0 2006.229.23:46:52.19#ibcon#enter sib2, iclass 15, count 0 2006.229.23:46:52.19#ibcon#flushed, iclass 15, count 0 2006.229.23:46:52.19#ibcon#about to write, iclass 15, count 0 2006.229.23:46:52.19#ibcon#wrote, iclass 15, count 0 2006.229.23:46:52.19#ibcon#about to read 3, iclass 15, count 0 2006.229.23:46:52.24#ibcon#read 3, iclass 15, count 0 2006.229.23:46:52.24#ibcon#about to read 4, iclass 15, count 0 2006.229.23:46:52.24#ibcon#read 4, iclass 15, count 0 2006.229.23:46:52.24#ibcon#about to read 5, iclass 15, count 0 2006.229.23:46:52.24#ibcon#read 5, iclass 15, count 0 2006.229.23:46:52.24#ibcon#about to read 6, iclass 15, count 0 2006.229.23:46:52.24#ibcon#read 6, iclass 15, count 0 2006.229.23:46:52.24#ibcon#end of sib2, iclass 15, count 0 2006.229.23:46:52.24#ibcon#*after write, iclass 15, count 0 2006.229.23:46:52.24#ibcon#*before return 0, iclass 15, count 0 2006.229.23:46:52.24#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:52.24#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:52.24#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:46:52.24#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:46:52.24$vck44/va=1,8 2006.229.23:46:52.24#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.23:46:52.24#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.23:46:52.24#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:52.24#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:52.24#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:52.24#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:52.24#ibcon#enter wrdev, iclass 17, count 2 2006.229.23:46:52.24#ibcon#first serial, iclass 17, count 2 2006.229.23:46:52.24#ibcon#enter sib2, iclass 17, count 2 2006.229.23:46:52.24#ibcon#flushed, iclass 17, count 2 2006.229.23:46:52.24#ibcon#about to write, iclass 17, count 2 2006.229.23:46:52.24#ibcon#wrote, iclass 17, count 2 2006.229.23:46:52.24#ibcon#about to read 3, iclass 17, count 2 2006.229.23:46:52.26#ibcon#read 3, iclass 17, count 2 2006.229.23:46:52.26#ibcon#about to read 4, iclass 17, count 2 2006.229.23:46:52.26#ibcon#read 4, iclass 17, count 2 2006.229.23:46:52.26#ibcon#about to read 5, iclass 17, count 2 2006.229.23:46:52.26#ibcon#read 5, iclass 17, count 2 2006.229.23:46:52.26#ibcon#about to read 6, iclass 17, count 2 2006.229.23:46:52.26#ibcon#read 6, iclass 17, count 2 2006.229.23:46:52.26#ibcon#end of sib2, iclass 17, count 2 2006.229.23:46:52.26#ibcon#*mode == 0, iclass 17, count 2 2006.229.23:46:52.26#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.23:46:52.26#ibcon#[25=AT01-08\r\n] 2006.229.23:46:52.26#ibcon#*before write, iclass 17, count 2 2006.229.23:46:52.26#ibcon#enter sib2, iclass 17, count 2 2006.229.23:46:52.26#ibcon#flushed, iclass 17, count 2 2006.229.23:46:52.26#ibcon#about to write, iclass 17, count 2 2006.229.23:46:52.26#ibcon#wrote, iclass 17, count 2 2006.229.23:46:52.26#ibcon#about to read 3, iclass 17, count 2 2006.229.23:46:52.29#ibcon#read 3, iclass 17, count 2 2006.229.23:46:52.29#ibcon#about to read 4, iclass 17, count 2 2006.229.23:46:52.29#ibcon#read 4, iclass 17, count 2 2006.229.23:46:52.29#ibcon#about to read 5, iclass 17, count 2 2006.229.23:46:52.29#ibcon#read 5, iclass 17, count 2 2006.229.23:46:52.29#ibcon#about to read 6, iclass 17, count 2 2006.229.23:46:52.29#ibcon#read 6, iclass 17, count 2 2006.229.23:46:52.29#ibcon#end of sib2, iclass 17, count 2 2006.229.23:46:52.29#ibcon#*after write, iclass 17, count 2 2006.229.23:46:52.29#ibcon#*before return 0, iclass 17, count 2 2006.229.23:46:52.29#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:52.29#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:52.29#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.23:46:52.29#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:52.29#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:52.41#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:52.41#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:52.41#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:46:52.41#ibcon#first serial, iclass 17, count 0 2006.229.23:46:52.41#ibcon#enter sib2, iclass 17, count 0 2006.229.23:46:52.41#ibcon#flushed, iclass 17, count 0 2006.229.23:46:52.41#ibcon#about to write, iclass 17, count 0 2006.229.23:46:52.41#ibcon#wrote, iclass 17, count 0 2006.229.23:46:52.41#ibcon#about to read 3, iclass 17, count 0 2006.229.23:46:52.43#ibcon#read 3, iclass 17, count 0 2006.229.23:46:52.43#ibcon#about to read 4, iclass 17, count 0 2006.229.23:46:52.43#ibcon#read 4, iclass 17, count 0 2006.229.23:46:52.43#ibcon#about to read 5, iclass 17, count 0 2006.229.23:46:52.43#ibcon#read 5, iclass 17, count 0 2006.229.23:46:52.43#ibcon#about to read 6, iclass 17, count 0 2006.229.23:46:52.43#ibcon#read 6, iclass 17, count 0 2006.229.23:46:52.43#ibcon#end of sib2, iclass 17, count 0 2006.229.23:46:52.43#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:46:52.43#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:46:52.43#ibcon#[25=USB\r\n] 2006.229.23:46:52.43#ibcon#*before write, iclass 17, count 0 2006.229.23:46:52.43#ibcon#enter sib2, iclass 17, count 0 2006.229.23:46:52.43#ibcon#flushed, iclass 17, count 0 2006.229.23:46:52.43#ibcon#about to write, iclass 17, count 0 2006.229.23:46:52.43#ibcon#wrote, iclass 17, count 0 2006.229.23:46:52.43#ibcon#about to read 3, iclass 17, count 0 2006.229.23:46:52.46#ibcon#read 3, iclass 17, count 0 2006.229.23:46:52.46#ibcon#about to read 4, iclass 17, count 0 2006.229.23:46:52.46#ibcon#read 4, iclass 17, count 0 2006.229.23:46:52.46#ibcon#about to read 5, iclass 17, count 0 2006.229.23:46:52.46#ibcon#read 5, iclass 17, count 0 2006.229.23:46:52.46#ibcon#about to read 6, iclass 17, count 0 2006.229.23:46:52.46#ibcon#read 6, iclass 17, count 0 2006.229.23:46:52.46#ibcon#end of sib2, iclass 17, count 0 2006.229.23:46:52.46#ibcon#*after write, iclass 17, count 0 2006.229.23:46:52.46#ibcon#*before return 0, iclass 17, count 0 2006.229.23:46:52.46#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:52.46#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:52.46#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:46:52.46#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:46:52.46$vck44/valo=2,534.99 2006.229.23:46:52.46#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.23:46:52.46#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.23:46:52.46#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:52.46#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:52.46#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:52.46#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:52.46#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:46:52.46#ibcon#first serial, iclass 19, count 0 2006.229.23:46:52.46#ibcon#enter sib2, iclass 19, count 0 2006.229.23:46:52.46#ibcon#flushed, iclass 19, count 0 2006.229.23:46:52.46#ibcon#about to write, iclass 19, count 0 2006.229.23:46:52.46#ibcon#wrote, iclass 19, count 0 2006.229.23:46:52.46#ibcon#about to read 3, iclass 19, count 0 2006.229.23:46:52.48#ibcon#read 3, iclass 19, count 0 2006.229.23:46:52.48#ibcon#about to read 4, iclass 19, count 0 2006.229.23:46:52.48#ibcon#read 4, iclass 19, count 0 2006.229.23:46:52.48#ibcon#about to read 5, iclass 19, count 0 2006.229.23:46:52.48#ibcon#read 5, iclass 19, count 0 2006.229.23:46:52.48#ibcon#about to read 6, iclass 19, count 0 2006.229.23:46:52.48#ibcon#read 6, iclass 19, count 0 2006.229.23:46:52.48#ibcon#end of sib2, iclass 19, count 0 2006.229.23:46:52.48#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:46:52.48#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:46:52.48#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:46:52.48#ibcon#*before write, iclass 19, count 0 2006.229.23:46:52.48#ibcon#enter sib2, iclass 19, count 0 2006.229.23:46:52.48#ibcon#flushed, iclass 19, count 0 2006.229.23:46:52.48#ibcon#about to write, iclass 19, count 0 2006.229.23:46:52.48#ibcon#wrote, iclass 19, count 0 2006.229.23:46:52.48#ibcon#about to read 3, iclass 19, count 0 2006.229.23:46:52.52#ibcon#read 3, iclass 19, count 0 2006.229.23:46:52.52#ibcon#about to read 4, iclass 19, count 0 2006.229.23:46:52.52#ibcon#read 4, iclass 19, count 0 2006.229.23:46:52.52#ibcon#about to read 5, iclass 19, count 0 2006.229.23:46:52.52#ibcon#read 5, iclass 19, count 0 2006.229.23:46:52.52#ibcon#about to read 6, iclass 19, count 0 2006.229.23:46:52.52#ibcon#read 6, iclass 19, count 0 2006.229.23:46:52.52#ibcon#end of sib2, iclass 19, count 0 2006.229.23:46:52.52#ibcon#*after write, iclass 19, count 0 2006.229.23:46:52.52#ibcon#*before return 0, iclass 19, count 0 2006.229.23:46:52.52#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:52.52#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:52.52#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:46:52.52#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:46:52.52$vck44/va=2,7 2006.229.23:46:52.52#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.23:46:52.52#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.23:46:52.52#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:52.52#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:52.58#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:52.58#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:52.58#ibcon#enter wrdev, iclass 21, count 2 2006.229.23:46:52.58#ibcon#first serial, iclass 21, count 2 2006.229.23:46:52.58#ibcon#enter sib2, iclass 21, count 2 2006.229.23:46:52.58#ibcon#flushed, iclass 21, count 2 2006.229.23:46:52.58#ibcon#about to write, iclass 21, count 2 2006.229.23:46:52.58#ibcon#wrote, iclass 21, count 2 2006.229.23:46:52.58#ibcon#about to read 3, iclass 21, count 2 2006.229.23:46:52.60#ibcon#read 3, iclass 21, count 2 2006.229.23:46:52.60#ibcon#about to read 4, iclass 21, count 2 2006.229.23:46:52.60#ibcon#read 4, iclass 21, count 2 2006.229.23:46:52.60#ibcon#about to read 5, iclass 21, count 2 2006.229.23:46:52.60#ibcon#read 5, iclass 21, count 2 2006.229.23:46:52.60#ibcon#about to read 6, iclass 21, count 2 2006.229.23:46:52.60#ibcon#read 6, iclass 21, count 2 2006.229.23:46:52.60#ibcon#end of sib2, iclass 21, count 2 2006.229.23:46:52.60#ibcon#*mode == 0, iclass 21, count 2 2006.229.23:46:52.60#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.23:46:52.60#ibcon#[25=AT02-07\r\n] 2006.229.23:46:52.60#ibcon#*before write, iclass 21, count 2 2006.229.23:46:52.60#ibcon#enter sib2, iclass 21, count 2 2006.229.23:46:52.60#ibcon#flushed, iclass 21, count 2 2006.229.23:46:52.60#ibcon#about to write, iclass 21, count 2 2006.229.23:46:52.60#ibcon#wrote, iclass 21, count 2 2006.229.23:46:52.60#ibcon#about to read 3, iclass 21, count 2 2006.229.23:46:52.63#ibcon#read 3, iclass 21, count 2 2006.229.23:46:52.63#ibcon#about to read 4, iclass 21, count 2 2006.229.23:46:52.63#ibcon#read 4, iclass 21, count 2 2006.229.23:46:52.63#ibcon#about to read 5, iclass 21, count 2 2006.229.23:46:52.63#ibcon#read 5, iclass 21, count 2 2006.229.23:46:52.63#ibcon#about to read 6, iclass 21, count 2 2006.229.23:46:52.63#ibcon#read 6, iclass 21, count 2 2006.229.23:46:52.63#ibcon#end of sib2, iclass 21, count 2 2006.229.23:46:52.63#ibcon#*after write, iclass 21, count 2 2006.229.23:46:52.63#ibcon#*before return 0, iclass 21, count 2 2006.229.23:46:52.63#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:52.63#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:52.63#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.23:46:52.63#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:52.63#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:52.75#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:52.75#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:52.75#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:46:52.75#ibcon#first serial, iclass 21, count 0 2006.229.23:46:52.75#ibcon#enter sib2, iclass 21, count 0 2006.229.23:46:52.75#ibcon#flushed, iclass 21, count 0 2006.229.23:46:52.75#ibcon#about to write, iclass 21, count 0 2006.229.23:46:52.75#ibcon#wrote, iclass 21, count 0 2006.229.23:46:52.75#ibcon#about to read 3, iclass 21, count 0 2006.229.23:46:52.77#ibcon#read 3, iclass 21, count 0 2006.229.23:46:52.77#ibcon#about to read 4, iclass 21, count 0 2006.229.23:46:52.77#ibcon#read 4, iclass 21, count 0 2006.229.23:46:52.77#ibcon#about to read 5, iclass 21, count 0 2006.229.23:46:52.77#ibcon#read 5, iclass 21, count 0 2006.229.23:46:52.77#ibcon#about to read 6, iclass 21, count 0 2006.229.23:46:52.77#ibcon#read 6, iclass 21, count 0 2006.229.23:46:52.77#ibcon#end of sib2, iclass 21, count 0 2006.229.23:46:52.77#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:46:52.77#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:46:52.77#ibcon#[25=USB\r\n] 2006.229.23:46:52.77#ibcon#*before write, iclass 21, count 0 2006.229.23:46:52.77#ibcon#enter sib2, iclass 21, count 0 2006.229.23:46:52.77#ibcon#flushed, iclass 21, count 0 2006.229.23:46:52.77#ibcon#about to write, iclass 21, count 0 2006.229.23:46:52.77#ibcon#wrote, iclass 21, count 0 2006.229.23:46:52.77#ibcon#about to read 3, iclass 21, count 0 2006.229.23:46:52.80#ibcon#read 3, iclass 21, count 0 2006.229.23:46:52.80#ibcon#about to read 4, iclass 21, count 0 2006.229.23:46:52.80#ibcon#read 4, iclass 21, count 0 2006.229.23:46:52.80#ibcon#about to read 5, iclass 21, count 0 2006.229.23:46:52.80#ibcon#read 5, iclass 21, count 0 2006.229.23:46:52.80#ibcon#about to read 6, iclass 21, count 0 2006.229.23:46:52.80#ibcon#read 6, iclass 21, count 0 2006.229.23:46:52.80#ibcon#end of sib2, iclass 21, count 0 2006.229.23:46:52.80#ibcon#*after write, iclass 21, count 0 2006.229.23:46:52.80#ibcon#*before return 0, iclass 21, count 0 2006.229.23:46:52.80#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:52.80#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:52.80#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:46:52.80#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:46:52.80$vck44/valo=3,564.99 2006.229.23:46:52.80#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.23:46:52.80#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.23:46:52.80#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:52.80#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:52.80#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:52.80#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:52.80#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:46:52.80#ibcon#first serial, iclass 23, count 0 2006.229.23:46:52.80#ibcon#enter sib2, iclass 23, count 0 2006.229.23:46:52.80#ibcon#flushed, iclass 23, count 0 2006.229.23:46:52.80#ibcon#about to write, iclass 23, count 0 2006.229.23:46:52.80#ibcon#wrote, iclass 23, count 0 2006.229.23:46:52.80#ibcon#about to read 3, iclass 23, count 0 2006.229.23:46:52.82#ibcon#read 3, iclass 23, count 0 2006.229.23:46:52.82#ibcon#about to read 4, iclass 23, count 0 2006.229.23:46:52.82#ibcon#read 4, iclass 23, count 0 2006.229.23:46:52.82#ibcon#about to read 5, iclass 23, count 0 2006.229.23:46:52.82#ibcon#read 5, iclass 23, count 0 2006.229.23:46:52.82#ibcon#about to read 6, iclass 23, count 0 2006.229.23:46:52.82#ibcon#read 6, iclass 23, count 0 2006.229.23:46:52.82#ibcon#end of sib2, iclass 23, count 0 2006.229.23:46:52.82#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:46:52.82#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:46:52.82#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:46:52.82#ibcon#*before write, iclass 23, count 0 2006.229.23:46:52.82#ibcon#enter sib2, iclass 23, count 0 2006.229.23:46:52.82#ibcon#flushed, iclass 23, count 0 2006.229.23:46:52.82#ibcon#about to write, iclass 23, count 0 2006.229.23:46:52.82#ibcon#wrote, iclass 23, count 0 2006.229.23:46:52.82#ibcon#about to read 3, iclass 23, count 0 2006.229.23:46:52.86#ibcon#read 3, iclass 23, count 0 2006.229.23:46:52.86#ibcon#about to read 4, iclass 23, count 0 2006.229.23:46:52.86#ibcon#read 4, iclass 23, count 0 2006.229.23:46:52.86#ibcon#about to read 5, iclass 23, count 0 2006.229.23:46:52.86#ibcon#read 5, iclass 23, count 0 2006.229.23:46:52.86#ibcon#about to read 6, iclass 23, count 0 2006.229.23:46:52.86#ibcon#read 6, iclass 23, count 0 2006.229.23:46:52.86#ibcon#end of sib2, iclass 23, count 0 2006.229.23:46:52.86#ibcon#*after write, iclass 23, count 0 2006.229.23:46:52.86#ibcon#*before return 0, iclass 23, count 0 2006.229.23:46:52.86#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:52.86#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:52.86#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:46:52.86#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:46:52.86$vck44/va=3,6 2006.229.23:46:52.86#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.23:46:52.86#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.23:46:52.86#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:52.86#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:52.92#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:52.92#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:52.92#ibcon#enter wrdev, iclass 25, count 2 2006.229.23:46:52.92#ibcon#first serial, iclass 25, count 2 2006.229.23:46:52.92#ibcon#enter sib2, iclass 25, count 2 2006.229.23:46:52.92#ibcon#flushed, iclass 25, count 2 2006.229.23:46:52.92#ibcon#about to write, iclass 25, count 2 2006.229.23:46:52.92#ibcon#wrote, iclass 25, count 2 2006.229.23:46:52.92#ibcon#about to read 3, iclass 25, count 2 2006.229.23:46:52.94#ibcon#read 3, iclass 25, count 2 2006.229.23:46:52.94#ibcon#about to read 4, iclass 25, count 2 2006.229.23:46:52.94#ibcon#read 4, iclass 25, count 2 2006.229.23:46:52.94#ibcon#about to read 5, iclass 25, count 2 2006.229.23:46:52.94#ibcon#read 5, iclass 25, count 2 2006.229.23:46:52.94#ibcon#about to read 6, iclass 25, count 2 2006.229.23:46:52.94#ibcon#read 6, iclass 25, count 2 2006.229.23:46:52.94#ibcon#end of sib2, iclass 25, count 2 2006.229.23:46:52.94#ibcon#*mode == 0, iclass 25, count 2 2006.229.23:46:52.94#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.23:46:52.94#ibcon#[25=AT03-06\r\n] 2006.229.23:46:52.94#ibcon#*before write, iclass 25, count 2 2006.229.23:46:52.94#ibcon#enter sib2, iclass 25, count 2 2006.229.23:46:52.94#ibcon#flushed, iclass 25, count 2 2006.229.23:46:52.94#ibcon#about to write, iclass 25, count 2 2006.229.23:46:52.94#ibcon#wrote, iclass 25, count 2 2006.229.23:46:52.94#ibcon#about to read 3, iclass 25, count 2 2006.229.23:46:52.97#ibcon#read 3, iclass 25, count 2 2006.229.23:46:52.97#ibcon#about to read 4, iclass 25, count 2 2006.229.23:46:52.97#ibcon#read 4, iclass 25, count 2 2006.229.23:46:52.97#ibcon#about to read 5, iclass 25, count 2 2006.229.23:46:52.97#ibcon#read 5, iclass 25, count 2 2006.229.23:46:52.97#ibcon#about to read 6, iclass 25, count 2 2006.229.23:46:52.97#ibcon#read 6, iclass 25, count 2 2006.229.23:46:52.97#ibcon#end of sib2, iclass 25, count 2 2006.229.23:46:52.97#ibcon#*after write, iclass 25, count 2 2006.229.23:46:52.97#ibcon#*before return 0, iclass 25, count 2 2006.229.23:46:52.97#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:52.97#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:52.97#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.23:46:52.97#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:52.97#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:53.09#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:53.09#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:53.09#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:46:53.09#ibcon#first serial, iclass 25, count 0 2006.229.23:46:53.09#ibcon#enter sib2, iclass 25, count 0 2006.229.23:46:53.09#ibcon#flushed, iclass 25, count 0 2006.229.23:46:53.09#ibcon#about to write, iclass 25, count 0 2006.229.23:46:53.09#ibcon#wrote, iclass 25, count 0 2006.229.23:46:53.09#ibcon#about to read 3, iclass 25, count 0 2006.229.23:46:53.11#ibcon#read 3, iclass 25, count 0 2006.229.23:46:53.11#ibcon#about to read 4, iclass 25, count 0 2006.229.23:46:53.11#ibcon#read 4, iclass 25, count 0 2006.229.23:46:53.11#ibcon#about to read 5, iclass 25, count 0 2006.229.23:46:53.11#ibcon#read 5, iclass 25, count 0 2006.229.23:46:53.11#ibcon#about to read 6, iclass 25, count 0 2006.229.23:46:53.11#ibcon#read 6, iclass 25, count 0 2006.229.23:46:53.11#ibcon#end of sib2, iclass 25, count 0 2006.229.23:46:53.11#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:46:53.11#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:46:53.11#ibcon#[25=USB\r\n] 2006.229.23:46:53.11#ibcon#*before write, iclass 25, count 0 2006.229.23:46:53.11#ibcon#enter sib2, iclass 25, count 0 2006.229.23:46:53.11#ibcon#flushed, iclass 25, count 0 2006.229.23:46:53.11#ibcon#about to write, iclass 25, count 0 2006.229.23:46:53.11#ibcon#wrote, iclass 25, count 0 2006.229.23:46:53.11#ibcon#about to read 3, iclass 25, count 0 2006.229.23:46:53.14#ibcon#read 3, iclass 25, count 0 2006.229.23:46:53.14#ibcon#about to read 4, iclass 25, count 0 2006.229.23:46:53.14#ibcon#read 4, iclass 25, count 0 2006.229.23:46:53.14#ibcon#about to read 5, iclass 25, count 0 2006.229.23:46:53.14#ibcon#read 5, iclass 25, count 0 2006.229.23:46:53.14#ibcon#about to read 6, iclass 25, count 0 2006.229.23:46:53.14#ibcon#read 6, iclass 25, count 0 2006.229.23:46:53.14#ibcon#end of sib2, iclass 25, count 0 2006.229.23:46:53.14#ibcon#*after write, iclass 25, count 0 2006.229.23:46:53.14#ibcon#*before return 0, iclass 25, count 0 2006.229.23:46:53.14#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:53.14#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:53.14#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:46:53.14#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:46:53.14$vck44/valo=4,624.99 2006.229.23:46:53.14#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.23:46:53.14#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.23:46:53.14#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:53.14#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:53.14#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:53.14#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:53.14#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:46:53.14#ibcon#first serial, iclass 27, count 0 2006.229.23:46:53.14#ibcon#enter sib2, iclass 27, count 0 2006.229.23:46:53.14#ibcon#flushed, iclass 27, count 0 2006.229.23:46:53.14#ibcon#about to write, iclass 27, count 0 2006.229.23:46:53.14#ibcon#wrote, iclass 27, count 0 2006.229.23:46:53.14#ibcon#about to read 3, iclass 27, count 0 2006.229.23:46:53.16#ibcon#read 3, iclass 27, count 0 2006.229.23:46:53.16#ibcon#about to read 4, iclass 27, count 0 2006.229.23:46:53.16#ibcon#read 4, iclass 27, count 0 2006.229.23:46:53.16#ibcon#about to read 5, iclass 27, count 0 2006.229.23:46:53.16#ibcon#read 5, iclass 27, count 0 2006.229.23:46:53.16#ibcon#about to read 6, iclass 27, count 0 2006.229.23:46:53.16#ibcon#read 6, iclass 27, count 0 2006.229.23:46:53.16#ibcon#end of sib2, iclass 27, count 0 2006.229.23:46:53.16#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:46:53.16#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:46:53.16#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:46:53.16#ibcon#*before write, iclass 27, count 0 2006.229.23:46:53.16#ibcon#enter sib2, iclass 27, count 0 2006.229.23:46:53.16#ibcon#flushed, iclass 27, count 0 2006.229.23:46:53.16#ibcon#about to write, iclass 27, count 0 2006.229.23:46:53.16#ibcon#wrote, iclass 27, count 0 2006.229.23:46:53.16#ibcon#about to read 3, iclass 27, count 0 2006.229.23:46:53.20#ibcon#read 3, iclass 27, count 0 2006.229.23:46:53.20#ibcon#about to read 4, iclass 27, count 0 2006.229.23:46:53.20#ibcon#read 4, iclass 27, count 0 2006.229.23:46:53.20#ibcon#about to read 5, iclass 27, count 0 2006.229.23:46:53.20#ibcon#read 5, iclass 27, count 0 2006.229.23:46:53.20#ibcon#about to read 6, iclass 27, count 0 2006.229.23:46:53.20#ibcon#read 6, iclass 27, count 0 2006.229.23:46:53.20#ibcon#end of sib2, iclass 27, count 0 2006.229.23:46:53.20#ibcon#*after write, iclass 27, count 0 2006.229.23:46:53.20#ibcon#*before return 0, iclass 27, count 0 2006.229.23:46:53.20#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:53.20#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:53.20#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:46:53.20#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:46:53.20$vck44/va=4,7 2006.229.23:46:53.20#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.23:46:53.20#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.23:46:53.20#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:53.20#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:53.26#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:53.26#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:53.26#ibcon#enter wrdev, iclass 29, count 2 2006.229.23:46:53.26#ibcon#first serial, iclass 29, count 2 2006.229.23:46:53.26#ibcon#enter sib2, iclass 29, count 2 2006.229.23:46:53.26#ibcon#flushed, iclass 29, count 2 2006.229.23:46:53.26#ibcon#about to write, iclass 29, count 2 2006.229.23:46:53.26#ibcon#wrote, iclass 29, count 2 2006.229.23:46:53.26#ibcon#about to read 3, iclass 29, count 2 2006.229.23:46:53.28#ibcon#read 3, iclass 29, count 2 2006.229.23:46:53.28#ibcon#about to read 4, iclass 29, count 2 2006.229.23:46:53.28#ibcon#read 4, iclass 29, count 2 2006.229.23:46:53.28#ibcon#about to read 5, iclass 29, count 2 2006.229.23:46:53.28#ibcon#read 5, iclass 29, count 2 2006.229.23:46:53.28#ibcon#about to read 6, iclass 29, count 2 2006.229.23:46:53.28#ibcon#read 6, iclass 29, count 2 2006.229.23:46:53.28#ibcon#end of sib2, iclass 29, count 2 2006.229.23:46:53.28#ibcon#*mode == 0, iclass 29, count 2 2006.229.23:46:53.28#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.23:46:53.28#ibcon#[25=AT04-07\r\n] 2006.229.23:46:53.28#ibcon#*before write, iclass 29, count 2 2006.229.23:46:53.28#ibcon#enter sib2, iclass 29, count 2 2006.229.23:46:53.28#ibcon#flushed, iclass 29, count 2 2006.229.23:46:53.28#ibcon#about to write, iclass 29, count 2 2006.229.23:46:53.28#ibcon#wrote, iclass 29, count 2 2006.229.23:46:53.28#ibcon#about to read 3, iclass 29, count 2 2006.229.23:46:53.31#ibcon#read 3, iclass 29, count 2 2006.229.23:46:53.31#ibcon#about to read 4, iclass 29, count 2 2006.229.23:46:53.32#ibcon#read 4, iclass 29, count 2 2006.229.23:46:53.32#ibcon#about to read 5, iclass 29, count 2 2006.229.23:46:53.32#ibcon#read 5, iclass 29, count 2 2006.229.23:46:53.32#ibcon#about to read 6, iclass 29, count 2 2006.229.23:46:53.32#ibcon#read 6, iclass 29, count 2 2006.229.23:46:53.32#ibcon#end of sib2, iclass 29, count 2 2006.229.23:46:53.32#ibcon#*after write, iclass 29, count 2 2006.229.23:46:53.32#ibcon#*before return 0, iclass 29, count 2 2006.229.23:46:53.32#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:53.32#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:53.32#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.23:46:53.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:53.32#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:53.44#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:53.44#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:53.44#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:46:53.44#ibcon#first serial, iclass 29, count 0 2006.229.23:46:53.44#ibcon#enter sib2, iclass 29, count 0 2006.229.23:46:53.44#ibcon#flushed, iclass 29, count 0 2006.229.23:46:53.44#ibcon#about to write, iclass 29, count 0 2006.229.23:46:53.44#ibcon#wrote, iclass 29, count 0 2006.229.23:46:53.44#ibcon#about to read 3, iclass 29, count 0 2006.229.23:46:53.46#ibcon#read 3, iclass 29, count 0 2006.229.23:46:53.46#ibcon#about to read 4, iclass 29, count 0 2006.229.23:46:53.46#ibcon#read 4, iclass 29, count 0 2006.229.23:46:53.46#ibcon#about to read 5, iclass 29, count 0 2006.229.23:46:53.46#ibcon#read 5, iclass 29, count 0 2006.229.23:46:53.46#ibcon#about to read 6, iclass 29, count 0 2006.229.23:46:53.46#ibcon#read 6, iclass 29, count 0 2006.229.23:46:53.46#ibcon#end of sib2, iclass 29, count 0 2006.229.23:46:53.46#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:46:53.46#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:46:53.46#ibcon#[25=USB\r\n] 2006.229.23:46:53.46#ibcon#*before write, iclass 29, count 0 2006.229.23:46:53.46#ibcon#enter sib2, iclass 29, count 0 2006.229.23:46:53.46#ibcon#flushed, iclass 29, count 0 2006.229.23:46:53.46#ibcon#about to write, iclass 29, count 0 2006.229.23:46:53.46#ibcon#wrote, iclass 29, count 0 2006.229.23:46:53.46#ibcon#about to read 3, iclass 29, count 0 2006.229.23:46:53.49#ibcon#read 3, iclass 29, count 0 2006.229.23:46:53.49#ibcon#about to read 4, iclass 29, count 0 2006.229.23:46:53.49#ibcon#read 4, iclass 29, count 0 2006.229.23:46:53.49#ibcon#about to read 5, iclass 29, count 0 2006.229.23:46:53.49#ibcon#read 5, iclass 29, count 0 2006.229.23:46:53.49#ibcon#about to read 6, iclass 29, count 0 2006.229.23:46:53.49#ibcon#read 6, iclass 29, count 0 2006.229.23:46:53.49#ibcon#end of sib2, iclass 29, count 0 2006.229.23:46:53.49#ibcon#*after write, iclass 29, count 0 2006.229.23:46:53.49#ibcon#*before return 0, iclass 29, count 0 2006.229.23:46:53.49#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:53.49#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:53.49#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:46:53.49#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:46:53.49$vck44/valo=5,734.99 2006.229.23:46:53.49#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:46:53.49#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:46:53.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:53.49#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:53.49#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:53.49#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:53.49#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:46:53.49#ibcon#first serial, iclass 31, count 0 2006.229.23:46:53.49#ibcon#enter sib2, iclass 31, count 0 2006.229.23:46:53.49#ibcon#flushed, iclass 31, count 0 2006.229.23:46:53.49#ibcon#about to write, iclass 31, count 0 2006.229.23:46:53.49#ibcon#wrote, iclass 31, count 0 2006.229.23:46:53.49#ibcon#about to read 3, iclass 31, count 0 2006.229.23:46:53.51#ibcon#read 3, iclass 31, count 0 2006.229.23:46:53.51#ibcon#about to read 4, iclass 31, count 0 2006.229.23:46:53.51#ibcon#read 4, iclass 31, count 0 2006.229.23:46:53.51#ibcon#about to read 5, iclass 31, count 0 2006.229.23:46:53.51#ibcon#read 5, iclass 31, count 0 2006.229.23:46:53.51#ibcon#about to read 6, iclass 31, count 0 2006.229.23:46:53.51#ibcon#read 6, iclass 31, count 0 2006.229.23:46:53.51#ibcon#end of sib2, iclass 31, count 0 2006.229.23:46:53.51#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:46:53.51#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:46:53.51#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:46:53.51#ibcon#*before write, iclass 31, count 0 2006.229.23:46:53.51#ibcon#enter sib2, iclass 31, count 0 2006.229.23:46:53.51#ibcon#flushed, iclass 31, count 0 2006.229.23:46:53.51#ibcon#about to write, iclass 31, count 0 2006.229.23:46:53.51#ibcon#wrote, iclass 31, count 0 2006.229.23:46:53.51#ibcon#about to read 3, iclass 31, count 0 2006.229.23:46:53.55#ibcon#read 3, iclass 31, count 0 2006.229.23:46:53.55#ibcon#about to read 4, iclass 31, count 0 2006.229.23:46:53.55#ibcon#read 4, iclass 31, count 0 2006.229.23:46:53.55#ibcon#about to read 5, iclass 31, count 0 2006.229.23:46:53.55#ibcon#read 5, iclass 31, count 0 2006.229.23:46:53.55#ibcon#about to read 6, iclass 31, count 0 2006.229.23:46:53.55#ibcon#read 6, iclass 31, count 0 2006.229.23:46:53.55#ibcon#end of sib2, iclass 31, count 0 2006.229.23:46:53.55#ibcon#*after write, iclass 31, count 0 2006.229.23:46:53.55#ibcon#*before return 0, iclass 31, count 0 2006.229.23:46:53.55#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:53.55#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:53.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:46:53.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:46:53.55$vck44/va=5,4 2006.229.23:46:53.55#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.23:46:53.55#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.23:46:53.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:53.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:53.61#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:53.61#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:53.61#ibcon#enter wrdev, iclass 33, count 2 2006.229.23:46:53.61#ibcon#first serial, iclass 33, count 2 2006.229.23:46:53.61#ibcon#enter sib2, iclass 33, count 2 2006.229.23:46:53.61#ibcon#flushed, iclass 33, count 2 2006.229.23:46:53.61#ibcon#about to write, iclass 33, count 2 2006.229.23:46:53.61#ibcon#wrote, iclass 33, count 2 2006.229.23:46:53.61#ibcon#about to read 3, iclass 33, count 2 2006.229.23:46:53.63#ibcon#read 3, iclass 33, count 2 2006.229.23:46:53.63#ibcon#about to read 4, iclass 33, count 2 2006.229.23:46:53.63#ibcon#read 4, iclass 33, count 2 2006.229.23:46:53.63#ibcon#about to read 5, iclass 33, count 2 2006.229.23:46:53.63#ibcon#read 5, iclass 33, count 2 2006.229.23:46:53.63#ibcon#about to read 6, iclass 33, count 2 2006.229.23:46:53.63#ibcon#read 6, iclass 33, count 2 2006.229.23:46:53.63#ibcon#end of sib2, iclass 33, count 2 2006.229.23:46:53.63#ibcon#*mode == 0, iclass 33, count 2 2006.229.23:46:53.63#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.23:46:53.63#ibcon#[25=AT05-04\r\n] 2006.229.23:46:53.63#ibcon#*before write, iclass 33, count 2 2006.229.23:46:53.63#ibcon#enter sib2, iclass 33, count 2 2006.229.23:46:53.63#ibcon#flushed, iclass 33, count 2 2006.229.23:46:53.63#ibcon#about to write, iclass 33, count 2 2006.229.23:46:53.63#ibcon#wrote, iclass 33, count 2 2006.229.23:46:53.63#ibcon#about to read 3, iclass 33, count 2 2006.229.23:46:53.66#ibcon#read 3, iclass 33, count 2 2006.229.23:46:53.66#ibcon#about to read 4, iclass 33, count 2 2006.229.23:46:53.66#ibcon#read 4, iclass 33, count 2 2006.229.23:46:53.66#ibcon#about to read 5, iclass 33, count 2 2006.229.23:46:53.66#ibcon#read 5, iclass 33, count 2 2006.229.23:46:53.66#ibcon#about to read 6, iclass 33, count 2 2006.229.23:46:53.66#ibcon#read 6, iclass 33, count 2 2006.229.23:46:53.66#ibcon#end of sib2, iclass 33, count 2 2006.229.23:46:53.66#ibcon#*after write, iclass 33, count 2 2006.229.23:46:53.66#ibcon#*before return 0, iclass 33, count 2 2006.229.23:46:53.66#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:53.66#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:53.66#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.23:46:53.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:53.66#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:53.78#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:53.78#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:53.78#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:46:53.78#ibcon#first serial, iclass 33, count 0 2006.229.23:46:53.78#ibcon#enter sib2, iclass 33, count 0 2006.229.23:46:53.78#ibcon#flushed, iclass 33, count 0 2006.229.23:46:53.78#ibcon#about to write, iclass 33, count 0 2006.229.23:46:53.78#ibcon#wrote, iclass 33, count 0 2006.229.23:46:53.78#ibcon#about to read 3, iclass 33, count 0 2006.229.23:46:53.80#ibcon#read 3, iclass 33, count 0 2006.229.23:46:53.80#ibcon#about to read 4, iclass 33, count 0 2006.229.23:46:53.80#ibcon#read 4, iclass 33, count 0 2006.229.23:46:53.80#ibcon#about to read 5, iclass 33, count 0 2006.229.23:46:53.80#ibcon#read 5, iclass 33, count 0 2006.229.23:46:53.80#ibcon#about to read 6, iclass 33, count 0 2006.229.23:46:53.80#ibcon#read 6, iclass 33, count 0 2006.229.23:46:53.80#ibcon#end of sib2, iclass 33, count 0 2006.229.23:46:53.80#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:46:53.80#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:46:53.80#ibcon#[25=USB\r\n] 2006.229.23:46:53.80#ibcon#*before write, iclass 33, count 0 2006.229.23:46:53.80#ibcon#enter sib2, iclass 33, count 0 2006.229.23:46:53.80#ibcon#flushed, iclass 33, count 0 2006.229.23:46:53.80#ibcon#about to write, iclass 33, count 0 2006.229.23:46:53.80#ibcon#wrote, iclass 33, count 0 2006.229.23:46:53.80#ibcon#about to read 3, iclass 33, count 0 2006.229.23:46:53.83#ibcon#read 3, iclass 33, count 0 2006.229.23:46:53.83#ibcon#about to read 4, iclass 33, count 0 2006.229.23:46:53.83#ibcon#read 4, iclass 33, count 0 2006.229.23:46:53.83#ibcon#about to read 5, iclass 33, count 0 2006.229.23:46:53.83#ibcon#read 5, iclass 33, count 0 2006.229.23:46:53.83#ibcon#about to read 6, iclass 33, count 0 2006.229.23:46:53.83#ibcon#read 6, iclass 33, count 0 2006.229.23:46:53.83#ibcon#end of sib2, iclass 33, count 0 2006.229.23:46:53.83#ibcon#*after write, iclass 33, count 0 2006.229.23:46:53.83#ibcon#*before return 0, iclass 33, count 0 2006.229.23:46:53.83#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:53.83#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:53.83#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:46:53.83#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:46:53.83$vck44/valo=6,814.99 2006.229.23:46:53.83#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:46:53.83#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:46:53.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:53.83#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:53.83#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:53.83#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:53.83#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:46:53.83#ibcon#first serial, iclass 35, count 0 2006.229.23:46:53.83#ibcon#enter sib2, iclass 35, count 0 2006.229.23:46:53.83#ibcon#flushed, iclass 35, count 0 2006.229.23:46:53.83#ibcon#about to write, iclass 35, count 0 2006.229.23:46:53.83#ibcon#wrote, iclass 35, count 0 2006.229.23:46:53.83#ibcon#about to read 3, iclass 35, count 0 2006.229.23:46:53.85#ibcon#read 3, iclass 35, count 0 2006.229.23:46:53.85#ibcon#about to read 4, iclass 35, count 0 2006.229.23:46:53.85#ibcon#read 4, iclass 35, count 0 2006.229.23:46:53.85#ibcon#about to read 5, iclass 35, count 0 2006.229.23:46:53.85#ibcon#read 5, iclass 35, count 0 2006.229.23:46:53.85#ibcon#about to read 6, iclass 35, count 0 2006.229.23:46:53.85#ibcon#read 6, iclass 35, count 0 2006.229.23:46:53.85#ibcon#end of sib2, iclass 35, count 0 2006.229.23:46:53.85#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:46:53.85#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:46:53.85#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:46:53.85#ibcon#*before write, iclass 35, count 0 2006.229.23:46:53.85#ibcon#enter sib2, iclass 35, count 0 2006.229.23:46:53.85#ibcon#flushed, iclass 35, count 0 2006.229.23:46:53.85#ibcon#about to write, iclass 35, count 0 2006.229.23:46:53.85#ibcon#wrote, iclass 35, count 0 2006.229.23:46:53.85#ibcon#about to read 3, iclass 35, count 0 2006.229.23:46:53.89#ibcon#read 3, iclass 35, count 0 2006.229.23:46:53.89#ibcon#about to read 4, iclass 35, count 0 2006.229.23:46:53.89#ibcon#read 4, iclass 35, count 0 2006.229.23:46:53.89#ibcon#about to read 5, iclass 35, count 0 2006.229.23:46:53.89#ibcon#read 5, iclass 35, count 0 2006.229.23:46:53.89#ibcon#about to read 6, iclass 35, count 0 2006.229.23:46:53.89#ibcon#read 6, iclass 35, count 0 2006.229.23:46:53.89#ibcon#end of sib2, iclass 35, count 0 2006.229.23:46:53.89#ibcon#*after write, iclass 35, count 0 2006.229.23:46:53.89#ibcon#*before return 0, iclass 35, count 0 2006.229.23:46:53.89#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:53.89#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:53.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:46:53.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:46:53.89$vck44/va=6,4 2006.229.23:46:53.89#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.23:46:53.89#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.23:46:53.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:53.89#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:53.95#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:53.95#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:53.95#ibcon#enter wrdev, iclass 37, count 2 2006.229.23:46:53.95#ibcon#first serial, iclass 37, count 2 2006.229.23:46:53.95#ibcon#enter sib2, iclass 37, count 2 2006.229.23:46:53.95#ibcon#flushed, iclass 37, count 2 2006.229.23:46:53.95#ibcon#about to write, iclass 37, count 2 2006.229.23:46:53.95#ibcon#wrote, iclass 37, count 2 2006.229.23:46:53.95#ibcon#about to read 3, iclass 37, count 2 2006.229.23:46:53.97#ibcon#read 3, iclass 37, count 2 2006.229.23:46:53.97#ibcon#about to read 4, iclass 37, count 2 2006.229.23:46:53.97#ibcon#read 4, iclass 37, count 2 2006.229.23:46:53.97#ibcon#about to read 5, iclass 37, count 2 2006.229.23:46:53.97#ibcon#read 5, iclass 37, count 2 2006.229.23:46:53.97#ibcon#about to read 6, iclass 37, count 2 2006.229.23:46:53.97#ibcon#read 6, iclass 37, count 2 2006.229.23:46:53.97#ibcon#end of sib2, iclass 37, count 2 2006.229.23:46:53.97#ibcon#*mode == 0, iclass 37, count 2 2006.229.23:46:53.97#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.23:46:53.97#ibcon#[25=AT06-04\r\n] 2006.229.23:46:53.97#ibcon#*before write, iclass 37, count 2 2006.229.23:46:53.97#ibcon#enter sib2, iclass 37, count 2 2006.229.23:46:53.97#ibcon#flushed, iclass 37, count 2 2006.229.23:46:53.97#ibcon#about to write, iclass 37, count 2 2006.229.23:46:53.97#ibcon#wrote, iclass 37, count 2 2006.229.23:46:53.97#ibcon#about to read 3, iclass 37, count 2 2006.229.23:46:54.00#ibcon#read 3, iclass 37, count 2 2006.229.23:46:54.00#ibcon#about to read 4, iclass 37, count 2 2006.229.23:46:54.00#ibcon#read 4, iclass 37, count 2 2006.229.23:46:54.00#ibcon#about to read 5, iclass 37, count 2 2006.229.23:46:54.00#ibcon#read 5, iclass 37, count 2 2006.229.23:46:54.00#ibcon#about to read 6, iclass 37, count 2 2006.229.23:46:54.00#ibcon#read 6, iclass 37, count 2 2006.229.23:46:54.00#ibcon#end of sib2, iclass 37, count 2 2006.229.23:46:54.00#ibcon#*after write, iclass 37, count 2 2006.229.23:46:54.00#ibcon#*before return 0, iclass 37, count 2 2006.229.23:46:54.00#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:54.00#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:54.00#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.23:46:54.00#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:54.00#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:54.12#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:54.12#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:54.12#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:46:54.12#ibcon#first serial, iclass 37, count 0 2006.229.23:46:54.12#ibcon#enter sib2, iclass 37, count 0 2006.229.23:46:54.12#ibcon#flushed, iclass 37, count 0 2006.229.23:46:54.12#ibcon#about to write, iclass 37, count 0 2006.229.23:46:54.12#ibcon#wrote, iclass 37, count 0 2006.229.23:46:54.12#ibcon#about to read 3, iclass 37, count 0 2006.229.23:46:54.14#ibcon#read 3, iclass 37, count 0 2006.229.23:46:54.14#ibcon#about to read 4, iclass 37, count 0 2006.229.23:46:54.14#ibcon#read 4, iclass 37, count 0 2006.229.23:46:54.14#ibcon#about to read 5, iclass 37, count 0 2006.229.23:46:54.14#ibcon#read 5, iclass 37, count 0 2006.229.23:46:54.14#ibcon#about to read 6, iclass 37, count 0 2006.229.23:46:54.14#ibcon#read 6, iclass 37, count 0 2006.229.23:46:54.14#ibcon#end of sib2, iclass 37, count 0 2006.229.23:46:54.14#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:46:54.14#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:46:54.14#ibcon#[25=USB\r\n] 2006.229.23:46:54.14#ibcon#*before write, iclass 37, count 0 2006.229.23:46:54.14#ibcon#enter sib2, iclass 37, count 0 2006.229.23:46:54.14#ibcon#flushed, iclass 37, count 0 2006.229.23:46:54.14#ibcon#about to write, iclass 37, count 0 2006.229.23:46:54.14#ibcon#wrote, iclass 37, count 0 2006.229.23:46:54.14#ibcon#about to read 3, iclass 37, count 0 2006.229.23:46:54.17#ibcon#read 3, iclass 37, count 0 2006.229.23:46:54.17#ibcon#about to read 4, iclass 37, count 0 2006.229.23:46:54.17#ibcon#read 4, iclass 37, count 0 2006.229.23:46:54.17#ibcon#about to read 5, iclass 37, count 0 2006.229.23:46:54.17#ibcon#read 5, iclass 37, count 0 2006.229.23:46:54.17#ibcon#about to read 6, iclass 37, count 0 2006.229.23:46:54.17#ibcon#read 6, iclass 37, count 0 2006.229.23:46:54.17#ibcon#end of sib2, iclass 37, count 0 2006.229.23:46:54.17#ibcon#*after write, iclass 37, count 0 2006.229.23:46:54.17#ibcon#*before return 0, iclass 37, count 0 2006.229.23:46:54.17#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:54.17#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:54.17#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:46:54.17#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:46:54.17$vck44/valo=7,864.99 2006.229.23:46:54.17#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.23:46:54.17#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.23:46:54.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:54.17#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:54.17#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:54.17#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:54.17#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:46:54.17#ibcon#first serial, iclass 39, count 0 2006.229.23:46:54.17#ibcon#enter sib2, iclass 39, count 0 2006.229.23:46:54.17#ibcon#flushed, iclass 39, count 0 2006.229.23:46:54.17#ibcon#about to write, iclass 39, count 0 2006.229.23:46:54.17#ibcon#wrote, iclass 39, count 0 2006.229.23:46:54.17#ibcon#about to read 3, iclass 39, count 0 2006.229.23:46:54.19#ibcon#read 3, iclass 39, count 0 2006.229.23:46:54.19#ibcon#about to read 4, iclass 39, count 0 2006.229.23:46:54.19#ibcon#read 4, iclass 39, count 0 2006.229.23:46:54.19#ibcon#about to read 5, iclass 39, count 0 2006.229.23:46:54.19#ibcon#read 5, iclass 39, count 0 2006.229.23:46:54.19#ibcon#about to read 6, iclass 39, count 0 2006.229.23:46:54.19#ibcon#read 6, iclass 39, count 0 2006.229.23:46:54.19#ibcon#end of sib2, iclass 39, count 0 2006.229.23:46:54.19#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:46:54.19#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:46:54.19#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:46:54.19#ibcon#*before write, iclass 39, count 0 2006.229.23:46:54.19#ibcon#enter sib2, iclass 39, count 0 2006.229.23:46:54.19#ibcon#flushed, iclass 39, count 0 2006.229.23:46:54.19#ibcon#about to write, iclass 39, count 0 2006.229.23:46:54.19#ibcon#wrote, iclass 39, count 0 2006.229.23:46:54.19#ibcon#about to read 3, iclass 39, count 0 2006.229.23:46:54.23#ibcon#read 3, iclass 39, count 0 2006.229.23:46:54.23#ibcon#about to read 4, iclass 39, count 0 2006.229.23:46:54.23#ibcon#read 4, iclass 39, count 0 2006.229.23:46:54.23#ibcon#about to read 5, iclass 39, count 0 2006.229.23:46:54.23#ibcon#read 5, iclass 39, count 0 2006.229.23:46:54.23#ibcon#about to read 6, iclass 39, count 0 2006.229.23:46:54.23#ibcon#read 6, iclass 39, count 0 2006.229.23:46:54.23#ibcon#end of sib2, iclass 39, count 0 2006.229.23:46:54.23#ibcon#*after write, iclass 39, count 0 2006.229.23:46:54.23#ibcon#*before return 0, iclass 39, count 0 2006.229.23:46:54.23#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:54.23#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:54.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:46:54.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:46:54.23$vck44/va=7,5 2006.229.23:46:54.23#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.23:46:54.23#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.23:46:54.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:54.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:54.29#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:54.29#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:54.29#ibcon#enter wrdev, iclass 3, count 2 2006.229.23:46:54.29#ibcon#first serial, iclass 3, count 2 2006.229.23:46:54.29#ibcon#enter sib2, iclass 3, count 2 2006.229.23:46:54.29#ibcon#flushed, iclass 3, count 2 2006.229.23:46:54.29#ibcon#about to write, iclass 3, count 2 2006.229.23:46:54.29#ibcon#wrote, iclass 3, count 2 2006.229.23:46:54.29#ibcon#about to read 3, iclass 3, count 2 2006.229.23:46:54.31#ibcon#read 3, iclass 3, count 2 2006.229.23:46:54.31#ibcon#about to read 4, iclass 3, count 2 2006.229.23:46:54.31#ibcon#read 4, iclass 3, count 2 2006.229.23:46:54.31#ibcon#about to read 5, iclass 3, count 2 2006.229.23:46:54.31#ibcon#read 5, iclass 3, count 2 2006.229.23:46:54.31#ibcon#about to read 6, iclass 3, count 2 2006.229.23:46:54.31#ibcon#read 6, iclass 3, count 2 2006.229.23:46:54.31#ibcon#end of sib2, iclass 3, count 2 2006.229.23:46:54.31#ibcon#*mode == 0, iclass 3, count 2 2006.229.23:46:54.31#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.23:46:54.31#ibcon#[25=AT07-05\r\n] 2006.229.23:46:54.31#ibcon#*before write, iclass 3, count 2 2006.229.23:46:54.31#ibcon#enter sib2, iclass 3, count 2 2006.229.23:46:54.31#ibcon#flushed, iclass 3, count 2 2006.229.23:46:54.31#ibcon#about to write, iclass 3, count 2 2006.229.23:46:54.31#ibcon#wrote, iclass 3, count 2 2006.229.23:46:54.31#ibcon#about to read 3, iclass 3, count 2 2006.229.23:46:54.34#ibcon#read 3, iclass 3, count 2 2006.229.23:46:54.34#ibcon#about to read 4, iclass 3, count 2 2006.229.23:46:54.34#ibcon#read 4, iclass 3, count 2 2006.229.23:46:54.34#ibcon#about to read 5, iclass 3, count 2 2006.229.23:46:54.34#ibcon#read 5, iclass 3, count 2 2006.229.23:46:54.34#ibcon#about to read 6, iclass 3, count 2 2006.229.23:46:54.34#ibcon#read 6, iclass 3, count 2 2006.229.23:46:54.34#ibcon#end of sib2, iclass 3, count 2 2006.229.23:46:54.34#ibcon#*after write, iclass 3, count 2 2006.229.23:46:54.34#ibcon#*before return 0, iclass 3, count 2 2006.229.23:46:54.34#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:54.34#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:54.34#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.23:46:54.34#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:54.34#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:54.46#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:54.46#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:54.46#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:46:54.46#ibcon#first serial, iclass 3, count 0 2006.229.23:46:54.46#ibcon#enter sib2, iclass 3, count 0 2006.229.23:46:54.46#ibcon#flushed, iclass 3, count 0 2006.229.23:46:54.46#ibcon#about to write, iclass 3, count 0 2006.229.23:46:54.46#ibcon#wrote, iclass 3, count 0 2006.229.23:46:54.46#ibcon#about to read 3, iclass 3, count 0 2006.229.23:46:54.48#ibcon#read 3, iclass 3, count 0 2006.229.23:46:54.48#ibcon#about to read 4, iclass 3, count 0 2006.229.23:46:54.48#ibcon#read 4, iclass 3, count 0 2006.229.23:46:54.48#ibcon#about to read 5, iclass 3, count 0 2006.229.23:46:54.48#ibcon#read 5, iclass 3, count 0 2006.229.23:46:54.48#ibcon#about to read 6, iclass 3, count 0 2006.229.23:46:54.48#ibcon#read 6, iclass 3, count 0 2006.229.23:46:54.48#ibcon#end of sib2, iclass 3, count 0 2006.229.23:46:54.48#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:46:54.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:46:54.48#ibcon#[25=USB\r\n] 2006.229.23:46:54.48#ibcon#*before write, iclass 3, count 0 2006.229.23:46:54.48#ibcon#enter sib2, iclass 3, count 0 2006.229.23:46:54.48#ibcon#flushed, iclass 3, count 0 2006.229.23:46:54.48#ibcon#about to write, iclass 3, count 0 2006.229.23:46:54.48#ibcon#wrote, iclass 3, count 0 2006.229.23:46:54.48#ibcon#about to read 3, iclass 3, count 0 2006.229.23:46:54.51#ibcon#read 3, iclass 3, count 0 2006.229.23:46:54.51#ibcon#about to read 4, iclass 3, count 0 2006.229.23:46:54.51#ibcon#read 4, iclass 3, count 0 2006.229.23:46:54.51#ibcon#about to read 5, iclass 3, count 0 2006.229.23:46:54.51#ibcon#read 5, iclass 3, count 0 2006.229.23:46:54.51#ibcon#about to read 6, iclass 3, count 0 2006.229.23:46:54.51#ibcon#read 6, iclass 3, count 0 2006.229.23:46:54.51#ibcon#end of sib2, iclass 3, count 0 2006.229.23:46:54.51#ibcon#*after write, iclass 3, count 0 2006.229.23:46:54.51#ibcon#*before return 0, iclass 3, count 0 2006.229.23:46:54.51#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:54.51#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:54.51#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:46:54.51#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:46:54.51$vck44/valo=8,884.99 2006.229.23:46:54.51#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.23:46:54.51#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.23:46:54.51#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:54.51#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:54.51#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:54.51#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:54.51#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:46:54.51#ibcon#first serial, iclass 5, count 0 2006.229.23:46:54.51#ibcon#enter sib2, iclass 5, count 0 2006.229.23:46:54.51#ibcon#flushed, iclass 5, count 0 2006.229.23:46:54.51#ibcon#about to write, iclass 5, count 0 2006.229.23:46:54.51#ibcon#wrote, iclass 5, count 0 2006.229.23:46:54.51#ibcon#about to read 3, iclass 5, count 0 2006.229.23:46:54.53#ibcon#read 3, iclass 5, count 0 2006.229.23:46:54.53#ibcon#about to read 4, iclass 5, count 0 2006.229.23:46:54.53#ibcon#read 4, iclass 5, count 0 2006.229.23:46:54.53#ibcon#about to read 5, iclass 5, count 0 2006.229.23:46:54.53#ibcon#read 5, iclass 5, count 0 2006.229.23:46:54.53#ibcon#about to read 6, iclass 5, count 0 2006.229.23:46:54.53#ibcon#read 6, iclass 5, count 0 2006.229.23:46:54.53#ibcon#end of sib2, iclass 5, count 0 2006.229.23:46:54.53#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:46:54.53#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:46:54.53#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:46:54.53#ibcon#*before write, iclass 5, count 0 2006.229.23:46:54.53#ibcon#enter sib2, iclass 5, count 0 2006.229.23:46:54.53#ibcon#flushed, iclass 5, count 0 2006.229.23:46:54.53#ibcon#about to write, iclass 5, count 0 2006.229.23:46:54.53#ibcon#wrote, iclass 5, count 0 2006.229.23:46:54.53#ibcon#about to read 3, iclass 5, count 0 2006.229.23:46:54.57#ibcon#read 3, iclass 5, count 0 2006.229.23:46:54.57#ibcon#about to read 4, iclass 5, count 0 2006.229.23:46:54.57#ibcon#read 4, iclass 5, count 0 2006.229.23:46:54.57#ibcon#about to read 5, iclass 5, count 0 2006.229.23:46:54.57#ibcon#read 5, iclass 5, count 0 2006.229.23:46:54.57#ibcon#about to read 6, iclass 5, count 0 2006.229.23:46:54.57#ibcon#read 6, iclass 5, count 0 2006.229.23:46:54.57#ibcon#end of sib2, iclass 5, count 0 2006.229.23:46:54.57#ibcon#*after write, iclass 5, count 0 2006.229.23:46:54.57#ibcon#*before return 0, iclass 5, count 0 2006.229.23:46:54.57#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:54.57#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:54.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:46:54.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:46:54.57$vck44/va=8,6 2006.229.23:46:54.57#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.229.23:46:54.57#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.229.23:46:54.57#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:54.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:46:54.59#abcon#<5=/08 2.0 6.4 30.28 801002.6\r\n> 2006.229.23:46:54.61#abcon#{5=INTERFACE CLEAR} 2006.229.23:46:54.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:46:54.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:46:54.63#ibcon#enter wrdev, iclass 10, count 2 2006.229.23:46:54.63#ibcon#first serial, iclass 10, count 2 2006.229.23:46:54.63#ibcon#enter sib2, iclass 10, count 2 2006.229.23:46:54.63#ibcon#flushed, iclass 10, count 2 2006.229.23:46:54.63#ibcon#about to write, iclass 10, count 2 2006.229.23:46:54.63#ibcon#wrote, iclass 10, count 2 2006.229.23:46:54.63#ibcon#about to read 3, iclass 10, count 2 2006.229.23:46:54.65#ibcon#read 3, iclass 10, count 2 2006.229.23:46:54.65#ibcon#about to read 4, iclass 10, count 2 2006.229.23:46:54.65#ibcon#read 4, iclass 10, count 2 2006.229.23:46:54.65#ibcon#about to read 5, iclass 10, count 2 2006.229.23:46:54.65#ibcon#read 5, iclass 10, count 2 2006.229.23:46:54.65#ibcon#about to read 6, iclass 10, count 2 2006.229.23:46:54.65#ibcon#read 6, iclass 10, count 2 2006.229.23:46:54.65#ibcon#end of sib2, iclass 10, count 2 2006.229.23:46:54.65#ibcon#*mode == 0, iclass 10, count 2 2006.229.23:46:54.65#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.229.23:46:54.65#ibcon#[25=AT08-06\r\n] 2006.229.23:46:54.65#ibcon#*before write, iclass 10, count 2 2006.229.23:46:54.65#ibcon#enter sib2, iclass 10, count 2 2006.229.23:46:54.65#ibcon#flushed, iclass 10, count 2 2006.229.23:46:54.65#ibcon#about to write, iclass 10, count 2 2006.229.23:46:54.65#ibcon#wrote, iclass 10, count 2 2006.229.23:46:54.65#ibcon#about to read 3, iclass 10, count 2 2006.229.23:46:54.67#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:46:54.68#ibcon#read 3, iclass 10, count 2 2006.229.23:46:54.68#ibcon#about to read 4, iclass 10, count 2 2006.229.23:46:54.68#ibcon#read 4, iclass 10, count 2 2006.229.23:46:54.68#ibcon#about to read 5, iclass 10, count 2 2006.229.23:46:54.68#ibcon#read 5, iclass 10, count 2 2006.229.23:46:54.68#ibcon#about to read 6, iclass 10, count 2 2006.229.23:46:54.68#ibcon#read 6, iclass 10, count 2 2006.229.23:46:54.68#ibcon#end of sib2, iclass 10, count 2 2006.229.23:46:54.68#ibcon#*after write, iclass 10, count 2 2006.229.23:46:54.68#ibcon#*before return 0, iclass 10, count 2 2006.229.23:46:54.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:46:54.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.229.23:46:54.68#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.229.23:46:54.68#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:54.68#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:46:54.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:46:54.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:46:54.80#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:46:54.80#ibcon#first serial, iclass 10, count 0 2006.229.23:46:54.80#ibcon#enter sib2, iclass 10, count 0 2006.229.23:46:54.80#ibcon#flushed, iclass 10, count 0 2006.229.23:46:54.80#ibcon#about to write, iclass 10, count 0 2006.229.23:46:54.80#ibcon#wrote, iclass 10, count 0 2006.229.23:46:54.80#ibcon#about to read 3, iclass 10, count 0 2006.229.23:46:54.82#ibcon#read 3, iclass 10, count 0 2006.229.23:46:54.82#ibcon#about to read 4, iclass 10, count 0 2006.229.23:46:54.82#ibcon#read 4, iclass 10, count 0 2006.229.23:46:54.82#ibcon#about to read 5, iclass 10, count 0 2006.229.23:46:54.82#ibcon#read 5, iclass 10, count 0 2006.229.23:46:54.82#ibcon#about to read 6, iclass 10, count 0 2006.229.23:46:54.82#ibcon#read 6, iclass 10, count 0 2006.229.23:46:54.82#ibcon#end of sib2, iclass 10, count 0 2006.229.23:46:54.82#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:46:54.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:46:54.82#ibcon#[25=USB\r\n] 2006.229.23:46:54.82#ibcon#*before write, iclass 10, count 0 2006.229.23:46:54.82#ibcon#enter sib2, iclass 10, count 0 2006.229.23:46:54.82#ibcon#flushed, iclass 10, count 0 2006.229.23:46:54.82#ibcon#about to write, iclass 10, count 0 2006.229.23:46:54.82#ibcon#wrote, iclass 10, count 0 2006.229.23:46:54.82#ibcon#about to read 3, iclass 10, count 0 2006.229.23:46:54.85#ibcon#read 3, iclass 10, count 0 2006.229.23:46:54.85#ibcon#about to read 4, iclass 10, count 0 2006.229.23:46:54.85#ibcon#read 4, iclass 10, count 0 2006.229.23:46:54.85#ibcon#about to read 5, iclass 10, count 0 2006.229.23:46:54.85#ibcon#read 5, iclass 10, count 0 2006.229.23:46:54.85#ibcon#about to read 6, iclass 10, count 0 2006.229.23:46:54.85#ibcon#read 6, iclass 10, count 0 2006.229.23:46:54.85#ibcon#end of sib2, iclass 10, count 0 2006.229.23:46:54.85#ibcon#*after write, iclass 10, count 0 2006.229.23:46:54.85#ibcon#*before return 0, iclass 10, count 0 2006.229.23:46:54.85#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:46:54.85#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.229.23:46:54.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:46:54.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:46:54.85$vck44/vblo=1,629.99 2006.229.23:46:54.85#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.229.23:46:54.85#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.229.23:46:54.85#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:54.85#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:54.85#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:54.85#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:54.85#ibcon#enter wrdev, iclass 15, count 0 2006.229.23:46:54.85#ibcon#first serial, iclass 15, count 0 2006.229.23:46:54.85#ibcon#enter sib2, iclass 15, count 0 2006.229.23:46:54.85#ibcon#flushed, iclass 15, count 0 2006.229.23:46:54.85#ibcon#about to write, iclass 15, count 0 2006.229.23:46:54.85#ibcon#wrote, iclass 15, count 0 2006.229.23:46:54.85#ibcon#about to read 3, iclass 15, count 0 2006.229.23:46:54.87#ibcon#read 3, iclass 15, count 0 2006.229.23:46:54.87#ibcon#about to read 4, iclass 15, count 0 2006.229.23:46:54.87#ibcon#read 4, iclass 15, count 0 2006.229.23:46:54.87#ibcon#about to read 5, iclass 15, count 0 2006.229.23:46:54.87#ibcon#read 5, iclass 15, count 0 2006.229.23:46:54.87#ibcon#about to read 6, iclass 15, count 0 2006.229.23:46:54.87#ibcon#read 6, iclass 15, count 0 2006.229.23:46:54.87#ibcon#end of sib2, iclass 15, count 0 2006.229.23:46:54.87#ibcon#*mode == 0, iclass 15, count 0 2006.229.23:46:54.87#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.229.23:46:54.87#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:46:54.87#ibcon#*before write, iclass 15, count 0 2006.229.23:46:54.87#ibcon#enter sib2, iclass 15, count 0 2006.229.23:46:54.87#ibcon#flushed, iclass 15, count 0 2006.229.23:46:54.87#ibcon#about to write, iclass 15, count 0 2006.229.23:46:54.87#ibcon#wrote, iclass 15, count 0 2006.229.23:46:54.87#ibcon#about to read 3, iclass 15, count 0 2006.229.23:46:54.91#ibcon#read 3, iclass 15, count 0 2006.229.23:46:54.91#ibcon#about to read 4, iclass 15, count 0 2006.229.23:46:54.91#ibcon#read 4, iclass 15, count 0 2006.229.23:46:54.91#ibcon#about to read 5, iclass 15, count 0 2006.229.23:46:54.91#ibcon#read 5, iclass 15, count 0 2006.229.23:46:54.91#ibcon#about to read 6, iclass 15, count 0 2006.229.23:46:54.91#ibcon#read 6, iclass 15, count 0 2006.229.23:46:54.91#ibcon#end of sib2, iclass 15, count 0 2006.229.23:46:54.91#ibcon#*after write, iclass 15, count 0 2006.229.23:46:54.91#ibcon#*before return 0, iclass 15, count 0 2006.229.23:46:54.91#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:54.91#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.229.23:46:54.91#ibcon#about to clear, iclass 15 cls_cnt 0 2006.229.23:46:54.91#ibcon#cleared, iclass 15 cls_cnt 0 2006.229.23:46:54.91$vck44/vb=1,4 2006.229.23:46:54.91#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.229.23:46:54.91#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.229.23:46:54.91#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:54.91#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:54.91#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:54.91#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:54.91#ibcon#enter wrdev, iclass 17, count 2 2006.229.23:46:54.91#ibcon#first serial, iclass 17, count 2 2006.229.23:46:54.91#ibcon#enter sib2, iclass 17, count 2 2006.229.23:46:54.91#ibcon#flushed, iclass 17, count 2 2006.229.23:46:54.91#ibcon#about to write, iclass 17, count 2 2006.229.23:46:54.91#ibcon#wrote, iclass 17, count 2 2006.229.23:46:54.91#ibcon#about to read 3, iclass 17, count 2 2006.229.23:46:54.93#ibcon#read 3, iclass 17, count 2 2006.229.23:46:54.93#ibcon#about to read 4, iclass 17, count 2 2006.229.23:46:54.93#ibcon#read 4, iclass 17, count 2 2006.229.23:46:54.93#ibcon#about to read 5, iclass 17, count 2 2006.229.23:46:54.93#ibcon#read 5, iclass 17, count 2 2006.229.23:46:54.93#ibcon#about to read 6, iclass 17, count 2 2006.229.23:46:54.93#ibcon#read 6, iclass 17, count 2 2006.229.23:46:54.93#ibcon#end of sib2, iclass 17, count 2 2006.229.23:46:54.93#ibcon#*mode == 0, iclass 17, count 2 2006.229.23:46:54.93#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.229.23:46:54.93#ibcon#[27=AT01-04\r\n] 2006.229.23:46:54.93#ibcon#*before write, iclass 17, count 2 2006.229.23:46:54.93#ibcon#enter sib2, iclass 17, count 2 2006.229.23:46:54.93#ibcon#flushed, iclass 17, count 2 2006.229.23:46:54.93#ibcon#about to write, iclass 17, count 2 2006.229.23:46:54.93#ibcon#wrote, iclass 17, count 2 2006.229.23:46:54.93#ibcon#about to read 3, iclass 17, count 2 2006.229.23:46:54.96#ibcon#read 3, iclass 17, count 2 2006.229.23:46:54.96#ibcon#about to read 4, iclass 17, count 2 2006.229.23:46:54.96#ibcon#read 4, iclass 17, count 2 2006.229.23:46:54.96#ibcon#about to read 5, iclass 17, count 2 2006.229.23:46:54.96#ibcon#read 5, iclass 17, count 2 2006.229.23:46:54.96#ibcon#about to read 6, iclass 17, count 2 2006.229.23:46:54.96#ibcon#read 6, iclass 17, count 2 2006.229.23:46:54.96#ibcon#end of sib2, iclass 17, count 2 2006.229.23:46:54.96#ibcon#*after write, iclass 17, count 2 2006.229.23:46:54.96#ibcon#*before return 0, iclass 17, count 2 2006.229.23:46:54.96#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:54.96#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.229.23:46:54.96#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.229.23:46:54.96#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:54.96#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:55.08#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:55.08#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:55.08#ibcon#enter wrdev, iclass 17, count 0 2006.229.23:46:55.08#ibcon#first serial, iclass 17, count 0 2006.229.23:46:55.08#ibcon#enter sib2, iclass 17, count 0 2006.229.23:46:55.08#ibcon#flushed, iclass 17, count 0 2006.229.23:46:55.08#ibcon#about to write, iclass 17, count 0 2006.229.23:46:55.08#ibcon#wrote, iclass 17, count 0 2006.229.23:46:55.08#ibcon#about to read 3, iclass 17, count 0 2006.229.23:46:55.10#ibcon#read 3, iclass 17, count 0 2006.229.23:46:55.10#ibcon#about to read 4, iclass 17, count 0 2006.229.23:46:55.10#ibcon#read 4, iclass 17, count 0 2006.229.23:46:55.10#ibcon#about to read 5, iclass 17, count 0 2006.229.23:46:55.10#ibcon#read 5, iclass 17, count 0 2006.229.23:46:55.10#ibcon#about to read 6, iclass 17, count 0 2006.229.23:46:55.10#ibcon#read 6, iclass 17, count 0 2006.229.23:46:55.10#ibcon#end of sib2, iclass 17, count 0 2006.229.23:46:55.10#ibcon#*mode == 0, iclass 17, count 0 2006.229.23:46:55.10#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.229.23:46:55.10#ibcon#[27=USB\r\n] 2006.229.23:46:55.10#ibcon#*before write, iclass 17, count 0 2006.229.23:46:55.10#ibcon#enter sib2, iclass 17, count 0 2006.229.23:46:55.10#ibcon#flushed, iclass 17, count 0 2006.229.23:46:55.10#ibcon#about to write, iclass 17, count 0 2006.229.23:46:55.10#ibcon#wrote, iclass 17, count 0 2006.229.23:46:55.10#ibcon#about to read 3, iclass 17, count 0 2006.229.23:46:55.13#ibcon#read 3, iclass 17, count 0 2006.229.23:46:55.13#ibcon#about to read 4, iclass 17, count 0 2006.229.23:46:55.13#ibcon#read 4, iclass 17, count 0 2006.229.23:46:55.13#ibcon#about to read 5, iclass 17, count 0 2006.229.23:46:55.13#ibcon#read 5, iclass 17, count 0 2006.229.23:46:55.13#ibcon#about to read 6, iclass 17, count 0 2006.229.23:46:55.13#ibcon#read 6, iclass 17, count 0 2006.229.23:46:55.13#ibcon#end of sib2, iclass 17, count 0 2006.229.23:46:55.13#ibcon#*after write, iclass 17, count 0 2006.229.23:46:55.13#ibcon#*before return 0, iclass 17, count 0 2006.229.23:46:55.13#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:55.13#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.229.23:46:55.13#ibcon#about to clear, iclass 17 cls_cnt 0 2006.229.23:46:55.13#ibcon#cleared, iclass 17 cls_cnt 0 2006.229.23:46:55.13$vck44/vblo=2,634.99 2006.229.23:46:55.13#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.229.23:46:55.13#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.229.23:46:55.13#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:55.13#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:55.13#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:55.13#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:55.13#ibcon#enter wrdev, iclass 19, count 0 2006.229.23:46:55.13#ibcon#first serial, iclass 19, count 0 2006.229.23:46:55.13#ibcon#enter sib2, iclass 19, count 0 2006.229.23:46:55.13#ibcon#flushed, iclass 19, count 0 2006.229.23:46:55.13#ibcon#about to write, iclass 19, count 0 2006.229.23:46:55.13#ibcon#wrote, iclass 19, count 0 2006.229.23:46:55.13#ibcon#about to read 3, iclass 19, count 0 2006.229.23:46:55.15#ibcon#read 3, iclass 19, count 0 2006.229.23:46:55.15#ibcon#about to read 4, iclass 19, count 0 2006.229.23:46:55.15#ibcon#read 4, iclass 19, count 0 2006.229.23:46:55.15#ibcon#about to read 5, iclass 19, count 0 2006.229.23:46:55.15#ibcon#read 5, iclass 19, count 0 2006.229.23:46:55.15#ibcon#about to read 6, iclass 19, count 0 2006.229.23:46:55.15#ibcon#read 6, iclass 19, count 0 2006.229.23:46:55.15#ibcon#end of sib2, iclass 19, count 0 2006.229.23:46:55.15#ibcon#*mode == 0, iclass 19, count 0 2006.229.23:46:55.15#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.229.23:46:55.15#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:46:55.15#ibcon#*before write, iclass 19, count 0 2006.229.23:46:55.15#ibcon#enter sib2, iclass 19, count 0 2006.229.23:46:55.15#ibcon#flushed, iclass 19, count 0 2006.229.23:46:55.15#ibcon#about to write, iclass 19, count 0 2006.229.23:46:55.15#ibcon#wrote, iclass 19, count 0 2006.229.23:46:55.15#ibcon#about to read 3, iclass 19, count 0 2006.229.23:46:55.19#ibcon#read 3, iclass 19, count 0 2006.229.23:46:55.19#ibcon#about to read 4, iclass 19, count 0 2006.229.23:46:55.19#ibcon#read 4, iclass 19, count 0 2006.229.23:46:55.19#ibcon#about to read 5, iclass 19, count 0 2006.229.23:46:55.19#ibcon#read 5, iclass 19, count 0 2006.229.23:46:55.19#ibcon#about to read 6, iclass 19, count 0 2006.229.23:46:55.19#ibcon#read 6, iclass 19, count 0 2006.229.23:46:55.19#ibcon#end of sib2, iclass 19, count 0 2006.229.23:46:55.19#ibcon#*after write, iclass 19, count 0 2006.229.23:46:55.19#ibcon#*before return 0, iclass 19, count 0 2006.229.23:46:55.19#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:55.19#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.229.23:46:55.19#ibcon#about to clear, iclass 19 cls_cnt 0 2006.229.23:46:55.19#ibcon#cleared, iclass 19 cls_cnt 0 2006.229.23:46:55.19$vck44/vb=2,4 2006.229.23:46:55.19#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.229.23:46:55.19#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.229.23:46:55.19#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:55.19#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:55.25#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:55.25#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:55.25#ibcon#enter wrdev, iclass 21, count 2 2006.229.23:46:55.25#ibcon#first serial, iclass 21, count 2 2006.229.23:46:55.25#ibcon#enter sib2, iclass 21, count 2 2006.229.23:46:55.25#ibcon#flushed, iclass 21, count 2 2006.229.23:46:55.25#ibcon#about to write, iclass 21, count 2 2006.229.23:46:55.25#ibcon#wrote, iclass 21, count 2 2006.229.23:46:55.25#ibcon#about to read 3, iclass 21, count 2 2006.229.23:46:55.27#ibcon#read 3, iclass 21, count 2 2006.229.23:46:55.27#ibcon#about to read 4, iclass 21, count 2 2006.229.23:46:55.27#ibcon#read 4, iclass 21, count 2 2006.229.23:46:55.27#ibcon#about to read 5, iclass 21, count 2 2006.229.23:46:55.27#ibcon#read 5, iclass 21, count 2 2006.229.23:46:55.27#ibcon#about to read 6, iclass 21, count 2 2006.229.23:46:55.27#ibcon#read 6, iclass 21, count 2 2006.229.23:46:55.27#ibcon#end of sib2, iclass 21, count 2 2006.229.23:46:55.27#ibcon#*mode == 0, iclass 21, count 2 2006.229.23:46:55.27#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.229.23:46:55.27#ibcon#[27=AT02-04\r\n] 2006.229.23:46:55.27#ibcon#*before write, iclass 21, count 2 2006.229.23:46:55.27#ibcon#enter sib2, iclass 21, count 2 2006.229.23:46:55.27#ibcon#flushed, iclass 21, count 2 2006.229.23:46:55.27#ibcon#about to write, iclass 21, count 2 2006.229.23:46:55.27#ibcon#wrote, iclass 21, count 2 2006.229.23:46:55.27#ibcon#about to read 3, iclass 21, count 2 2006.229.23:46:55.30#ibcon#read 3, iclass 21, count 2 2006.229.23:46:55.30#ibcon#about to read 4, iclass 21, count 2 2006.229.23:46:55.30#ibcon#read 4, iclass 21, count 2 2006.229.23:46:55.30#ibcon#about to read 5, iclass 21, count 2 2006.229.23:46:55.30#ibcon#read 5, iclass 21, count 2 2006.229.23:46:55.30#ibcon#about to read 6, iclass 21, count 2 2006.229.23:46:55.30#ibcon#read 6, iclass 21, count 2 2006.229.23:46:55.30#ibcon#end of sib2, iclass 21, count 2 2006.229.23:46:55.30#ibcon#*after write, iclass 21, count 2 2006.229.23:46:55.30#ibcon#*before return 0, iclass 21, count 2 2006.229.23:46:55.30#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:55.30#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.229.23:46:55.30#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.229.23:46:55.30#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:55.30#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:55.42#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:55.42#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:55.42#ibcon#enter wrdev, iclass 21, count 0 2006.229.23:46:55.42#ibcon#first serial, iclass 21, count 0 2006.229.23:46:55.42#ibcon#enter sib2, iclass 21, count 0 2006.229.23:46:55.42#ibcon#flushed, iclass 21, count 0 2006.229.23:46:55.42#ibcon#about to write, iclass 21, count 0 2006.229.23:46:55.42#ibcon#wrote, iclass 21, count 0 2006.229.23:46:55.42#ibcon#about to read 3, iclass 21, count 0 2006.229.23:46:55.44#ibcon#read 3, iclass 21, count 0 2006.229.23:46:55.44#ibcon#about to read 4, iclass 21, count 0 2006.229.23:46:55.44#ibcon#read 4, iclass 21, count 0 2006.229.23:46:55.44#ibcon#about to read 5, iclass 21, count 0 2006.229.23:46:55.44#ibcon#read 5, iclass 21, count 0 2006.229.23:46:55.44#ibcon#about to read 6, iclass 21, count 0 2006.229.23:46:55.44#ibcon#read 6, iclass 21, count 0 2006.229.23:46:55.44#ibcon#end of sib2, iclass 21, count 0 2006.229.23:46:55.44#ibcon#*mode == 0, iclass 21, count 0 2006.229.23:46:55.44#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.229.23:46:55.44#ibcon#[27=USB\r\n] 2006.229.23:46:55.44#ibcon#*before write, iclass 21, count 0 2006.229.23:46:55.44#ibcon#enter sib2, iclass 21, count 0 2006.229.23:46:55.44#ibcon#flushed, iclass 21, count 0 2006.229.23:46:55.44#ibcon#about to write, iclass 21, count 0 2006.229.23:46:55.44#ibcon#wrote, iclass 21, count 0 2006.229.23:46:55.44#ibcon#about to read 3, iclass 21, count 0 2006.229.23:46:55.47#ibcon#read 3, iclass 21, count 0 2006.229.23:46:55.47#ibcon#about to read 4, iclass 21, count 0 2006.229.23:46:55.47#ibcon#read 4, iclass 21, count 0 2006.229.23:46:55.47#ibcon#about to read 5, iclass 21, count 0 2006.229.23:46:55.47#ibcon#read 5, iclass 21, count 0 2006.229.23:46:55.47#ibcon#about to read 6, iclass 21, count 0 2006.229.23:46:55.47#ibcon#read 6, iclass 21, count 0 2006.229.23:46:55.47#ibcon#end of sib2, iclass 21, count 0 2006.229.23:46:55.47#ibcon#*after write, iclass 21, count 0 2006.229.23:46:55.47#ibcon#*before return 0, iclass 21, count 0 2006.229.23:46:55.47#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:55.47#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.229.23:46:55.47#ibcon#about to clear, iclass 21 cls_cnt 0 2006.229.23:46:55.47#ibcon#cleared, iclass 21 cls_cnt 0 2006.229.23:46:55.47$vck44/vblo=3,649.99 2006.229.23:46:55.47#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.229.23:46:55.47#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.229.23:46:55.47#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:55.47#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:55.47#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:55.47#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:55.47#ibcon#enter wrdev, iclass 23, count 0 2006.229.23:46:55.47#ibcon#first serial, iclass 23, count 0 2006.229.23:46:55.47#ibcon#enter sib2, iclass 23, count 0 2006.229.23:46:55.47#ibcon#flushed, iclass 23, count 0 2006.229.23:46:55.47#ibcon#about to write, iclass 23, count 0 2006.229.23:46:55.47#ibcon#wrote, iclass 23, count 0 2006.229.23:46:55.47#ibcon#about to read 3, iclass 23, count 0 2006.229.23:46:55.49#ibcon#read 3, iclass 23, count 0 2006.229.23:46:55.49#ibcon#about to read 4, iclass 23, count 0 2006.229.23:46:55.49#ibcon#read 4, iclass 23, count 0 2006.229.23:46:55.49#ibcon#about to read 5, iclass 23, count 0 2006.229.23:46:55.49#ibcon#read 5, iclass 23, count 0 2006.229.23:46:55.49#ibcon#about to read 6, iclass 23, count 0 2006.229.23:46:55.49#ibcon#read 6, iclass 23, count 0 2006.229.23:46:55.49#ibcon#end of sib2, iclass 23, count 0 2006.229.23:46:55.49#ibcon#*mode == 0, iclass 23, count 0 2006.229.23:46:55.49#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.229.23:46:55.49#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:46:55.49#ibcon#*before write, iclass 23, count 0 2006.229.23:46:55.49#ibcon#enter sib2, iclass 23, count 0 2006.229.23:46:55.49#ibcon#flushed, iclass 23, count 0 2006.229.23:46:55.49#ibcon#about to write, iclass 23, count 0 2006.229.23:46:55.49#ibcon#wrote, iclass 23, count 0 2006.229.23:46:55.49#ibcon#about to read 3, iclass 23, count 0 2006.229.23:46:55.53#ibcon#read 3, iclass 23, count 0 2006.229.23:46:55.53#ibcon#about to read 4, iclass 23, count 0 2006.229.23:46:55.53#ibcon#read 4, iclass 23, count 0 2006.229.23:46:55.53#ibcon#about to read 5, iclass 23, count 0 2006.229.23:46:55.53#ibcon#read 5, iclass 23, count 0 2006.229.23:46:55.53#ibcon#about to read 6, iclass 23, count 0 2006.229.23:46:55.53#ibcon#read 6, iclass 23, count 0 2006.229.23:46:55.53#ibcon#end of sib2, iclass 23, count 0 2006.229.23:46:55.53#ibcon#*after write, iclass 23, count 0 2006.229.23:46:55.53#ibcon#*before return 0, iclass 23, count 0 2006.229.23:46:55.53#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:55.53#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.229.23:46:55.53#ibcon#about to clear, iclass 23 cls_cnt 0 2006.229.23:46:55.53#ibcon#cleared, iclass 23 cls_cnt 0 2006.229.23:46:55.53$vck44/vb=3,4 2006.229.23:46:55.53#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.229.23:46:55.53#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.229.23:46:55.53#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:55.53#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:55.59#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:55.59#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:55.59#ibcon#enter wrdev, iclass 25, count 2 2006.229.23:46:55.59#ibcon#first serial, iclass 25, count 2 2006.229.23:46:55.59#ibcon#enter sib2, iclass 25, count 2 2006.229.23:46:55.59#ibcon#flushed, iclass 25, count 2 2006.229.23:46:55.59#ibcon#about to write, iclass 25, count 2 2006.229.23:46:55.59#ibcon#wrote, iclass 25, count 2 2006.229.23:46:55.59#ibcon#about to read 3, iclass 25, count 2 2006.229.23:46:55.61#ibcon#read 3, iclass 25, count 2 2006.229.23:46:55.61#ibcon#about to read 4, iclass 25, count 2 2006.229.23:46:55.61#ibcon#read 4, iclass 25, count 2 2006.229.23:46:55.61#ibcon#about to read 5, iclass 25, count 2 2006.229.23:46:55.61#ibcon#read 5, iclass 25, count 2 2006.229.23:46:55.61#ibcon#about to read 6, iclass 25, count 2 2006.229.23:46:55.61#ibcon#read 6, iclass 25, count 2 2006.229.23:46:55.61#ibcon#end of sib2, iclass 25, count 2 2006.229.23:46:55.61#ibcon#*mode == 0, iclass 25, count 2 2006.229.23:46:55.61#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.229.23:46:55.61#ibcon#[27=AT03-04\r\n] 2006.229.23:46:55.61#ibcon#*before write, iclass 25, count 2 2006.229.23:46:55.61#ibcon#enter sib2, iclass 25, count 2 2006.229.23:46:55.61#ibcon#flushed, iclass 25, count 2 2006.229.23:46:55.61#ibcon#about to write, iclass 25, count 2 2006.229.23:46:55.61#ibcon#wrote, iclass 25, count 2 2006.229.23:46:55.61#ibcon#about to read 3, iclass 25, count 2 2006.229.23:46:55.64#ibcon#read 3, iclass 25, count 2 2006.229.23:46:55.64#ibcon#about to read 4, iclass 25, count 2 2006.229.23:46:55.64#ibcon#read 4, iclass 25, count 2 2006.229.23:46:55.64#ibcon#about to read 5, iclass 25, count 2 2006.229.23:46:55.64#ibcon#read 5, iclass 25, count 2 2006.229.23:46:55.64#ibcon#about to read 6, iclass 25, count 2 2006.229.23:46:55.64#ibcon#read 6, iclass 25, count 2 2006.229.23:46:55.64#ibcon#end of sib2, iclass 25, count 2 2006.229.23:46:55.64#ibcon#*after write, iclass 25, count 2 2006.229.23:46:55.64#ibcon#*before return 0, iclass 25, count 2 2006.229.23:46:55.64#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:55.64#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.229.23:46:55.64#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.229.23:46:55.64#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:55.64#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:55.76#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:55.76#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:55.76#ibcon#enter wrdev, iclass 25, count 0 2006.229.23:46:55.76#ibcon#first serial, iclass 25, count 0 2006.229.23:46:55.76#ibcon#enter sib2, iclass 25, count 0 2006.229.23:46:55.76#ibcon#flushed, iclass 25, count 0 2006.229.23:46:55.76#ibcon#about to write, iclass 25, count 0 2006.229.23:46:55.76#ibcon#wrote, iclass 25, count 0 2006.229.23:46:55.76#ibcon#about to read 3, iclass 25, count 0 2006.229.23:46:55.78#ibcon#read 3, iclass 25, count 0 2006.229.23:46:55.78#ibcon#about to read 4, iclass 25, count 0 2006.229.23:46:55.78#ibcon#read 4, iclass 25, count 0 2006.229.23:46:55.78#ibcon#about to read 5, iclass 25, count 0 2006.229.23:46:55.78#ibcon#read 5, iclass 25, count 0 2006.229.23:46:55.78#ibcon#about to read 6, iclass 25, count 0 2006.229.23:46:55.78#ibcon#read 6, iclass 25, count 0 2006.229.23:46:55.78#ibcon#end of sib2, iclass 25, count 0 2006.229.23:46:55.78#ibcon#*mode == 0, iclass 25, count 0 2006.229.23:46:55.78#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.229.23:46:55.78#ibcon#[27=USB\r\n] 2006.229.23:46:55.78#ibcon#*before write, iclass 25, count 0 2006.229.23:46:55.78#ibcon#enter sib2, iclass 25, count 0 2006.229.23:46:55.78#ibcon#flushed, iclass 25, count 0 2006.229.23:46:55.78#ibcon#about to write, iclass 25, count 0 2006.229.23:46:55.78#ibcon#wrote, iclass 25, count 0 2006.229.23:46:55.78#ibcon#about to read 3, iclass 25, count 0 2006.229.23:46:55.81#ibcon#read 3, iclass 25, count 0 2006.229.23:46:55.81#ibcon#about to read 4, iclass 25, count 0 2006.229.23:46:55.81#ibcon#read 4, iclass 25, count 0 2006.229.23:46:55.81#ibcon#about to read 5, iclass 25, count 0 2006.229.23:46:55.81#ibcon#read 5, iclass 25, count 0 2006.229.23:46:55.81#ibcon#about to read 6, iclass 25, count 0 2006.229.23:46:55.81#ibcon#read 6, iclass 25, count 0 2006.229.23:46:55.81#ibcon#end of sib2, iclass 25, count 0 2006.229.23:46:55.81#ibcon#*after write, iclass 25, count 0 2006.229.23:46:55.81#ibcon#*before return 0, iclass 25, count 0 2006.229.23:46:55.81#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:55.81#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.229.23:46:55.81#ibcon#about to clear, iclass 25 cls_cnt 0 2006.229.23:46:55.81#ibcon#cleared, iclass 25 cls_cnt 0 2006.229.23:46:55.81$vck44/vblo=4,679.99 2006.229.23:46:55.81#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.229.23:46:55.81#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.229.23:46:55.81#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:55.81#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:55.81#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:55.81#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:55.81#ibcon#enter wrdev, iclass 27, count 0 2006.229.23:46:55.81#ibcon#first serial, iclass 27, count 0 2006.229.23:46:55.81#ibcon#enter sib2, iclass 27, count 0 2006.229.23:46:55.81#ibcon#flushed, iclass 27, count 0 2006.229.23:46:55.81#ibcon#about to write, iclass 27, count 0 2006.229.23:46:55.81#ibcon#wrote, iclass 27, count 0 2006.229.23:46:55.81#ibcon#about to read 3, iclass 27, count 0 2006.229.23:46:55.83#ibcon#read 3, iclass 27, count 0 2006.229.23:46:55.83#ibcon#about to read 4, iclass 27, count 0 2006.229.23:46:55.83#ibcon#read 4, iclass 27, count 0 2006.229.23:46:55.83#ibcon#about to read 5, iclass 27, count 0 2006.229.23:46:55.83#ibcon#read 5, iclass 27, count 0 2006.229.23:46:55.83#ibcon#about to read 6, iclass 27, count 0 2006.229.23:46:55.83#ibcon#read 6, iclass 27, count 0 2006.229.23:46:55.83#ibcon#end of sib2, iclass 27, count 0 2006.229.23:46:55.83#ibcon#*mode == 0, iclass 27, count 0 2006.229.23:46:55.83#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.229.23:46:55.83#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:46:55.83#ibcon#*before write, iclass 27, count 0 2006.229.23:46:55.83#ibcon#enter sib2, iclass 27, count 0 2006.229.23:46:55.83#ibcon#flushed, iclass 27, count 0 2006.229.23:46:55.83#ibcon#about to write, iclass 27, count 0 2006.229.23:46:55.83#ibcon#wrote, iclass 27, count 0 2006.229.23:46:55.83#ibcon#about to read 3, iclass 27, count 0 2006.229.23:46:55.87#ibcon#read 3, iclass 27, count 0 2006.229.23:46:55.87#ibcon#about to read 4, iclass 27, count 0 2006.229.23:46:55.87#ibcon#read 4, iclass 27, count 0 2006.229.23:46:55.87#ibcon#about to read 5, iclass 27, count 0 2006.229.23:46:55.87#ibcon#read 5, iclass 27, count 0 2006.229.23:46:55.87#ibcon#about to read 6, iclass 27, count 0 2006.229.23:46:55.87#ibcon#read 6, iclass 27, count 0 2006.229.23:46:55.87#ibcon#end of sib2, iclass 27, count 0 2006.229.23:46:55.87#ibcon#*after write, iclass 27, count 0 2006.229.23:46:55.87#ibcon#*before return 0, iclass 27, count 0 2006.229.23:46:55.87#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:55.87#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.229.23:46:55.87#ibcon#about to clear, iclass 27 cls_cnt 0 2006.229.23:46:55.87#ibcon#cleared, iclass 27 cls_cnt 0 2006.229.23:46:55.87$vck44/vb=4,4 2006.229.23:46:55.87#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.229.23:46:55.87#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.229.23:46:55.87#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:55.87#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:55.93#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:55.93#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:55.93#ibcon#enter wrdev, iclass 29, count 2 2006.229.23:46:55.93#ibcon#first serial, iclass 29, count 2 2006.229.23:46:55.93#ibcon#enter sib2, iclass 29, count 2 2006.229.23:46:55.93#ibcon#flushed, iclass 29, count 2 2006.229.23:46:55.93#ibcon#about to write, iclass 29, count 2 2006.229.23:46:55.93#ibcon#wrote, iclass 29, count 2 2006.229.23:46:55.93#ibcon#about to read 3, iclass 29, count 2 2006.229.23:46:55.95#ibcon#read 3, iclass 29, count 2 2006.229.23:46:55.95#ibcon#about to read 4, iclass 29, count 2 2006.229.23:46:55.95#ibcon#read 4, iclass 29, count 2 2006.229.23:46:55.95#ibcon#about to read 5, iclass 29, count 2 2006.229.23:46:55.95#ibcon#read 5, iclass 29, count 2 2006.229.23:46:55.95#ibcon#about to read 6, iclass 29, count 2 2006.229.23:46:55.95#ibcon#read 6, iclass 29, count 2 2006.229.23:46:55.95#ibcon#end of sib2, iclass 29, count 2 2006.229.23:46:55.95#ibcon#*mode == 0, iclass 29, count 2 2006.229.23:46:55.95#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.229.23:46:55.95#ibcon#[27=AT04-04\r\n] 2006.229.23:46:55.95#ibcon#*before write, iclass 29, count 2 2006.229.23:46:55.95#ibcon#enter sib2, iclass 29, count 2 2006.229.23:46:55.95#ibcon#flushed, iclass 29, count 2 2006.229.23:46:55.95#ibcon#about to write, iclass 29, count 2 2006.229.23:46:55.95#ibcon#wrote, iclass 29, count 2 2006.229.23:46:55.95#ibcon#about to read 3, iclass 29, count 2 2006.229.23:46:55.98#ibcon#read 3, iclass 29, count 2 2006.229.23:46:55.98#ibcon#about to read 4, iclass 29, count 2 2006.229.23:46:55.98#ibcon#read 4, iclass 29, count 2 2006.229.23:46:55.98#ibcon#about to read 5, iclass 29, count 2 2006.229.23:46:55.98#ibcon#read 5, iclass 29, count 2 2006.229.23:46:55.98#ibcon#about to read 6, iclass 29, count 2 2006.229.23:46:55.98#ibcon#read 6, iclass 29, count 2 2006.229.23:46:55.98#ibcon#end of sib2, iclass 29, count 2 2006.229.23:46:55.98#ibcon#*after write, iclass 29, count 2 2006.229.23:46:55.98#ibcon#*before return 0, iclass 29, count 2 2006.229.23:46:55.98#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:55.98#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.229.23:46:55.98#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.229.23:46:55.98#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:55.98#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:56.10#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:56.10#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:56.10#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:46:56.10#ibcon#first serial, iclass 29, count 0 2006.229.23:46:56.10#ibcon#enter sib2, iclass 29, count 0 2006.229.23:46:56.10#ibcon#flushed, iclass 29, count 0 2006.229.23:46:56.10#ibcon#about to write, iclass 29, count 0 2006.229.23:46:56.10#ibcon#wrote, iclass 29, count 0 2006.229.23:46:56.10#ibcon#about to read 3, iclass 29, count 0 2006.229.23:46:56.12#ibcon#read 3, iclass 29, count 0 2006.229.23:46:56.12#ibcon#about to read 4, iclass 29, count 0 2006.229.23:46:56.12#ibcon#read 4, iclass 29, count 0 2006.229.23:46:56.12#ibcon#about to read 5, iclass 29, count 0 2006.229.23:46:56.12#ibcon#read 5, iclass 29, count 0 2006.229.23:46:56.12#ibcon#about to read 6, iclass 29, count 0 2006.229.23:46:56.12#ibcon#read 6, iclass 29, count 0 2006.229.23:46:56.12#ibcon#end of sib2, iclass 29, count 0 2006.229.23:46:56.12#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:46:56.12#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:46:56.12#ibcon#[27=USB\r\n] 2006.229.23:46:56.12#ibcon#*before write, iclass 29, count 0 2006.229.23:46:56.12#ibcon#enter sib2, iclass 29, count 0 2006.229.23:46:56.12#ibcon#flushed, iclass 29, count 0 2006.229.23:46:56.12#ibcon#about to write, iclass 29, count 0 2006.229.23:46:56.12#ibcon#wrote, iclass 29, count 0 2006.229.23:46:56.12#ibcon#about to read 3, iclass 29, count 0 2006.229.23:46:56.15#ibcon#read 3, iclass 29, count 0 2006.229.23:46:56.15#ibcon#about to read 4, iclass 29, count 0 2006.229.23:46:56.15#ibcon#read 4, iclass 29, count 0 2006.229.23:46:56.15#ibcon#about to read 5, iclass 29, count 0 2006.229.23:46:56.15#ibcon#read 5, iclass 29, count 0 2006.229.23:46:56.15#ibcon#about to read 6, iclass 29, count 0 2006.229.23:46:56.15#ibcon#read 6, iclass 29, count 0 2006.229.23:46:56.15#ibcon#end of sib2, iclass 29, count 0 2006.229.23:46:56.15#ibcon#*after write, iclass 29, count 0 2006.229.23:46:56.15#ibcon#*before return 0, iclass 29, count 0 2006.229.23:46:56.15#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:56.15#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.229.23:46:56.15#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:46:56.15#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:46:56.15$vck44/vblo=5,709.99 2006.229.23:46:56.15#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.229.23:46:56.15#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.229.23:46:56.15#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:56.15#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:56.15#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:56.15#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:56.15#ibcon#enter wrdev, iclass 31, count 0 2006.229.23:46:56.15#ibcon#first serial, iclass 31, count 0 2006.229.23:46:56.15#ibcon#enter sib2, iclass 31, count 0 2006.229.23:46:56.15#ibcon#flushed, iclass 31, count 0 2006.229.23:46:56.15#ibcon#about to write, iclass 31, count 0 2006.229.23:46:56.15#ibcon#wrote, iclass 31, count 0 2006.229.23:46:56.15#ibcon#about to read 3, iclass 31, count 0 2006.229.23:46:56.17#ibcon#read 3, iclass 31, count 0 2006.229.23:46:56.17#ibcon#about to read 4, iclass 31, count 0 2006.229.23:46:56.17#ibcon#read 4, iclass 31, count 0 2006.229.23:46:56.17#ibcon#about to read 5, iclass 31, count 0 2006.229.23:46:56.17#ibcon#read 5, iclass 31, count 0 2006.229.23:46:56.17#ibcon#about to read 6, iclass 31, count 0 2006.229.23:46:56.17#ibcon#read 6, iclass 31, count 0 2006.229.23:46:56.17#ibcon#end of sib2, iclass 31, count 0 2006.229.23:46:56.17#ibcon#*mode == 0, iclass 31, count 0 2006.229.23:46:56.17#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.229.23:46:56.17#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:46:56.17#ibcon#*before write, iclass 31, count 0 2006.229.23:46:56.17#ibcon#enter sib2, iclass 31, count 0 2006.229.23:46:56.17#ibcon#flushed, iclass 31, count 0 2006.229.23:46:56.17#ibcon#about to write, iclass 31, count 0 2006.229.23:46:56.17#ibcon#wrote, iclass 31, count 0 2006.229.23:46:56.17#ibcon#about to read 3, iclass 31, count 0 2006.229.23:46:56.21#ibcon#read 3, iclass 31, count 0 2006.229.23:46:56.21#ibcon#about to read 4, iclass 31, count 0 2006.229.23:46:56.21#ibcon#read 4, iclass 31, count 0 2006.229.23:46:56.21#ibcon#about to read 5, iclass 31, count 0 2006.229.23:46:56.21#ibcon#read 5, iclass 31, count 0 2006.229.23:46:56.21#ibcon#about to read 6, iclass 31, count 0 2006.229.23:46:56.21#ibcon#read 6, iclass 31, count 0 2006.229.23:46:56.21#ibcon#end of sib2, iclass 31, count 0 2006.229.23:46:56.21#ibcon#*after write, iclass 31, count 0 2006.229.23:46:56.21#ibcon#*before return 0, iclass 31, count 0 2006.229.23:46:56.21#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:56.21#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.229.23:46:56.21#ibcon#about to clear, iclass 31 cls_cnt 0 2006.229.23:46:56.21#ibcon#cleared, iclass 31 cls_cnt 0 2006.229.23:46:56.21$vck44/vb=5,4 2006.229.23:46:56.21#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.229.23:46:56.21#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.229.23:46:56.21#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:56.21#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:56.27#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:56.27#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:56.27#ibcon#enter wrdev, iclass 33, count 2 2006.229.23:46:56.27#ibcon#first serial, iclass 33, count 2 2006.229.23:46:56.27#ibcon#enter sib2, iclass 33, count 2 2006.229.23:46:56.27#ibcon#flushed, iclass 33, count 2 2006.229.23:46:56.27#ibcon#about to write, iclass 33, count 2 2006.229.23:46:56.27#ibcon#wrote, iclass 33, count 2 2006.229.23:46:56.27#ibcon#about to read 3, iclass 33, count 2 2006.229.23:46:56.29#ibcon#read 3, iclass 33, count 2 2006.229.23:46:56.29#ibcon#about to read 4, iclass 33, count 2 2006.229.23:46:56.29#ibcon#read 4, iclass 33, count 2 2006.229.23:46:56.29#ibcon#about to read 5, iclass 33, count 2 2006.229.23:46:56.29#ibcon#read 5, iclass 33, count 2 2006.229.23:46:56.29#ibcon#about to read 6, iclass 33, count 2 2006.229.23:46:56.29#ibcon#read 6, iclass 33, count 2 2006.229.23:46:56.29#ibcon#end of sib2, iclass 33, count 2 2006.229.23:46:56.29#ibcon#*mode == 0, iclass 33, count 2 2006.229.23:46:56.29#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.229.23:46:56.29#ibcon#[27=AT05-04\r\n] 2006.229.23:46:56.29#ibcon#*before write, iclass 33, count 2 2006.229.23:46:56.29#ibcon#enter sib2, iclass 33, count 2 2006.229.23:46:56.29#ibcon#flushed, iclass 33, count 2 2006.229.23:46:56.29#ibcon#about to write, iclass 33, count 2 2006.229.23:46:56.29#ibcon#wrote, iclass 33, count 2 2006.229.23:46:56.29#ibcon#about to read 3, iclass 33, count 2 2006.229.23:46:56.32#ibcon#read 3, iclass 33, count 2 2006.229.23:46:56.32#ibcon#about to read 4, iclass 33, count 2 2006.229.23:46:56.32#ibcon#read 4, iclass 33, count 2 2006.229.23:46:56.32#ibcon#about to read 5, iclass 33, count 2 2006.229.23:46:56.32#ibcon#read 5, iclass 33, count 2 2006.229.23:46:56.32#ibcon#about to read 6, iclass 33, count 2 2006.229.23:46:56.32#ibcon#read 6, iclass 33, count 2 2006.229.23:46:56.32#ibcon#end of sib2, iclass 33, count 2 2006.229.23:46:56.32#ibcon#*after write, iclass 33, count 2 2006.229.23:46:56.32#ibcon#*before return 0, iclass 33, count 2 2006.229.23:46:56.32#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:56.32#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.229.23:46:56.32#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.229.23:46:56.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:56.32#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:56.44#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:56.44#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:56.44#ibcon#enter wrdev, iclass 33, count 0 2006.229.23:46:56.44#ibcon#first serial, iclass 33, count 0 2006.229.23:46:56.44#ibcon#enter sib2, iclass 33, count 0 2006.229.23:46:56.44#ibcon#flushed, iclass 33, count 0 2006.229.23:46:56.44#ibcon#about to write, iclass 33, count 0 2006.229.23:46:56.44#ibcon#wrote, iclass 33, count 0 2006.229.23:46:56.44#ibcon#about to read 3, iclass 33, count 0 2006.229.23:46:56.46#ibcon#read 3, iclass 33, count 0 2006.229.23:46:56.46#ibcon#about to read 4, iclass 33, count 0 2006.229.23:46:56.46#ibcon#read 4, iclass 33, count 0 2006.229.23:46:56.46#ibcon#about to read 5, iclass 33, count 0 2006.229.23:46:56.46#ibcon#read 5, iclass 33, count 0 2006.229.23:46:56.46#ibcon#about to read 6, iclass 33, count 0 2006.229.23:46:56.46#ibcon#read 6, iclass 33, count 0 2006.229.23:46:56.46#ibcon#end of sib2, iclass 33, count 0 2006.229.23:46:56.46#ibcon#*mode == 0, iclass 33, count 0 2006.229.23:46:56.46#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.229.23:46:56.46#ibcon#[27=USB\r\n] 2006.229.23:46:56.46#ibcon#*before write, iclass 33, count 0 2006.229.23:46:56.46#ibcon#enter sib2, iclass 33, count 0 2006.229.23:46:56.46#ibcon#flushed, iclass 33, count 0 2006.229.23:46:56.46#ibcon#about to write, iclass 33, count 0 2006.229.23:46:56.46#ibcon#wrote, iclass 33, count 0 2006.229.23:46:56.46#ibcon#about to read 3, iclass 33, count 0 2006.229.23:46:56.49#ibcon#read 3, iclass 33, count 0 2006.229.23:46:56.49#ibcon#about to read 4, iclass 33, count 0 2006.229.23:46:56.49#ibcon#read 4, iclass 33, count 0 2006.229.23:46:56.49#ibcon#about to read 5, iclass 33, count 0 2006.229.23:46:56.49#ibcon#read 5, iclass 33, count 0 2006.229.23:46:56.49#ibcon#about to read 6, iclass 33, count 0 2006.229.23:46:56.49#ibcon#read 6, iclass 33, count 0 2006.229.23:46:56.49#ibcon#end of sib2, iclass 33, count 0 2006.229.23:46:56.49#ibcon#*after write, iclass 33, count 0 2006.229.23:46:56.49#ibcon#*before return 0, iclass 33, count 0 2006.229.23:46:56.49#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:56.49#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.229.23:46:56.49#ibcon#about to clear, iclass 33 cls_cnt 0 2006.229.23:46:56.49#ibcon#cleared, iclass 33 cls_cnt 0 2006.229.23:46:56.49$vck44/vblo=6,719.99 2006.229.23:46:56.49#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.229.23:46:56.49#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.229.23:46:56.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:56.49#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:56.49#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:56.49#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:56.49#ibcon#enter wrdev, iclass 35, count 0 2006.229.23:46:56.49#ibcon#first serial, iclass 35, count 0 2006.229.23:46:56.49#ibcon#enter sib2, iclass 35, count 0 2006.229.23:46:56.49#ibcon#flushed, iclass 35, count 0 2006.229.23:46:56.49#ibcon#about to write, iclass 35, count 0 2006.229.23:46:56.49#ibcon#wrote, iclass 35, count 0 2006.229.23:46:56.49#ibcon#about to read 3, iclass 35, count 0 2006.229.23:46:56.51#ibcon#read 3, iclass 35, count 0 2006.229.23:46:56.51#ibcon#about to read 4, iclass 35, count 0 2006.229.23:46:56.51#ibcon#read 4, iclass 35, count 0 2006.229.23:46:56.51#ibcon#about to read 5, iclass 35, count 0 2006.229.23:46:56.51#ibcon#read 5, iclass 35, count 0 2006.229.23:46:56.51#ibcon#about to read 6, iclass 35, count 0 2006.229.23:46:56.51#ibcon#read 6, iclass 35, count 0 2006.229.23:46:56.51#ibcon#end of sib2, iclass 35, count 0 2006.229.23:46:56.51#ibcon#*mode == 0, iclass 35, count 0 2006.229.23:46:56.51#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.229.23:46:56.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:46:56.51#ibcon#*before write, iclass 35, count 0 2006.229.23:46:56.51#ibcon#enter sib2, iclass 35, count 0 2006.229.23:46:56.51#ibcon#flushed, iclass 35, count 0 2006.229.23:46:56.51#ibcon#about to write, iclass 35, count 0 2006.229.23:46:56.51#ibcon#wrote, iclass 35, count 0 2006.229.23:46:56.51#ibcon#about to read 3, iclass 35, count 0 2006.229.23:46:56.55#ibcon#read 3, iclass 35, count 0 2006.229.23:46:56.55#ibcon#about to read 4, iclass 35, count 0 2006.229.23:46:56.55#ibcon#read 4, iclass 35, count 0 2006.229.23:46:56.55#ibcon#about to read 5, iclass 35, count 0 2006.229.23:46:56.55#ibcon#read 5, iclass 35, count 0 2006.229.23:46:56.55#ibcon#about to read 6, iclass 35, count 0 2006.229.23:46:56.55#ibcon#read 6, iclass 35, count 0 2006.229.23:46:56.55#ibcon#end of sib2, iclass 35, count 0 2006.229.23:46:56.55#ibcon#*after write, iclass 35, count 0 2006.229.23:46:56.55#ibcon#*before return 0, iclass 35, count 0 2006.229.23:46:56.55#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:56.55#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.229.23:46:56.55#ibcon#about to clear, iclass 35 cls_cnt 0 2006.229.23:46:56.55#ibcon#cleared, iclass 35 cls_cnt 0 2006.229.23:46:56.55$vck44/vb=6,4 2006.229.23:46:56.55#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.229.23:46:56.55#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.229.23:46:56.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:56.55#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:56.61#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:56.61#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:56.61#ibcon#enter wrdev, iclass 37, count 2 2006.229.23:46:56.61#ibcon#first serial, iclass 37, count 2 2006.229.23:46:56.61#ibcon#enter sib2, iclass 37, count 2 2006.229.23:46:56.61#ibcon#flushed, iclass 37, count 2 2006.229.23:46:56.61#ibcon#about to write, iclass 37, count 2 2006.229.23:46:56.61#ibcon#wrote, iclass 37, count 2 2006.229.23:46:56.61#ibcon#about to read 3, iclass 37, count 2 2006.229.23:46:56.63#ibcon#read 3, iclass 37, count 2 2006.229.23:46:56.63#ibcon#about to read 4, iclass 37, count 2 2006.229.23:46:56.63#ibcon#read 4, iclass 37, count 2 2006.229.23:46:56.63#ibcon#about to read 5, iclass 37, count 2 2006.229.23:46:56.63#ibcon#read 5, iclass 37, count 2 2006.229.23:46:56.63#ibcon#about to read 6, iclass 37, count 2 2006.229.23:46:56.63#ibcon#read 6, iclass 37, count 2 2006.229.23:46:56.63#ibcon#end of sib2, iclass 37, count 2 2006.229.23:46:56.63#ibcon#*mode == 0, iclass 37, count 2 2006.229.23:46:56.63#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.229.23:46:56.63#ibcon#[27=AT06-04\r\n] 2006.229.23:46:56.63#ibcon#*before write, iclass 37, count 2 2006.229.23:46:56.63#ibcon#enter sib2, iclass 37, count 2 2006.229.23:46:56.63#ibcon#flushed, iclass 37, count 2 2006.229.23:46:56.63#ibcon#about to write, iclass 37, count 2 2006.229.23:46:56.63#ibcon#wrote, iclass 37, count 2 2006.229.23:46:56.63#ibcon#about to read 3, iclass 37, count 2 2006.229.23:46:56.66#ibcon#read 3, iclass 37, count 2 2006.229.23:46:56.66#ibcon#about to read 4, iclass 37, count 2 2006.229.23:46:56.66#ibcon#read 4, iclass 37, count 2 2006.229.23:46:56.66#ibcon#about to read 5, iclass 37, count 2 2006.229.23:46:56.66#ibcon#read 5, iclass 37, count 2 2006.229.23:46:56.66#ibcon#about to read 6, iclass 37, count 2 2006.229.23:46:56.66#ibcon#read 6, iclass 37, count 2 2006.229.23:46:56.66#ibcon#end of sib2, iclass 37, count 2 2006.229.23:46:56.66#ibcon#*after write, iclass 37, count 2 2006.229.23:46:56.66#ibcon#*before return 0, iclass 37, count 2 2006.229.23:46:56.66#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:56.66#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.229.23:46:56.66#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.229.23:46:56.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:56.66#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:56.78#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:56.78#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:56.78#ibcon#enter wrdev, iclass 37, count 0 2006.229.23:46:56.78#ibcon#first serial, iclass 37, count 0 2006.229.23:46:56.78#ibcon#enter sib2, iclass 37, count 0 2006.229.23:46:56.78#ibcon#flushed, iclass 37, count 0 2006.229.23:46:56.78#ibcon#about to write, iclass 37, count 0 2006.229.23:46:56.78#ibcon#wrote, iclass 37, count 0 2006.229.23:46:56.78#ibcon#about to read 3, iclass 37, count 0 2006.229.23:46:56.80#ibcon#read 3, iclass 37, count 0 2006.229.23:46:56.80#ibcon#about to read 4, iclass 37, count 0 2006.229.23:46:56.80#ibcon#read 4, iclass 37, count 0 2006.229.23:46:56.80#ibcon#about to read 5, iclass 37, count 0 2006.229.23:46:56.80#ibcon#read 5, iclass 37, count 0 2006.229.23:46:56.80#ibcon#about to read 6, iclass 37, count 0 2006.229.23:46:56.80#ibcon#read 6, iclass 37, count 0 2006.229.23:46:56.80#ibcon#end of sib2, iclass 37, count 0 2006.229.23:46:56.80#ibcon#*mode == 0, iclass 37, count 0 2006.229.23:46:56.80#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.229.23:46:56.80#ibcon#[27=USB\r\n] 2006.229.23:46:56.80#ibcon#*before write, iclass 37, count 0 2006.229.23:46:56.80#ibcon#enter sib2, iclass 37, count 0 2006.229.23:46:56.80#ibcon#flushed, iclass 37, count 0 2006.229.23:46:56.80#ibcon#about to write, iclass 37, count 0 2006.229.23:46:56.80#ibcon#wrote, iclass 37, count 0 2006.229.23:46:56.80#ibcon#about to read 3, iclass 37, count 0 2006.229.23:46:56.83#ibcon#read 3, iclass 37, count 0 2006.229.23:46:56.83#ibcon#about to read 4, iclass 37, count 0 2006.229.23:46:56.83#ibcon#read 4, iclass 37, count 0 2006.229.23:46:56.83#ibcon#about to read 5, iclass 37, count 0 2006.229.23:46:56.83#ibcon#read 5, iclass 37, count 0 2006.229.23:46:56.83#ibcon#about to read 6, iclass 37, count 0 2006.229.23:46:56.83#ibcon#read 6, iclass 37, count 0 2006.229.23:46:56.83#ibcon#end of sib2, iclass 37, count 0 2006.229.23:46:56.83#ibcon#*after write, iclass 37, count 0 2006.229.23:46:56.83#ibcon#*before return 0, iclass 37, count 0 2006.229.23:46:56.83#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:56.83#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.229.23:46:56.83#ibcon#about to clear, iclass 37 cls_cnt 0 2006.229.23:46:56.83#ibcon#cleared, iclass 37 cls_cnt 0 2006.229.23:46:56.83$vck44/vblo=7,734.99 2006.229.23:46:56.83#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.229.23:46:56.83#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.229.23:46:56.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:56.83#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:56.83#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:56.83#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:56.83#ibcon#enter wrdev, iclass 39, count 0 2006.229.23:46:56.83#ibcon#first serial, iclass 39, count 0 2006.229.23:46:56.83#ibcon#enter sib2, iclass 39, count 0 2006.229.23:46:56.83#ibcon#flushed, iclass 39, count 0 2006.229.23:46:56.83#ibcon#about to write, iclass 39, count 0 2006.229.23:46:56.83#ibcon#wrote, iclass 39, count 0 2006.229.23:46:56.83#ibcon#about to read 3, iclass 39, count 0 2006.229.23:46:56.85#ibcon#read 3, iclass 39, count 0 2006.229.23:46:56.85#ibcon#about to read 4, iclass 39, count 0 2006.229.23:46:56.85#ibcon#read 4, iclass 39, count 0 2006.229.23:46:56.85#ibcon#about to read 5, iclass 39, count 0 2006.229.23:46:56.85#ibcon#read 5, iclass 39, count 0 2006.229.23:46:56.85#ibcon#about to read 6, iclass 39, count 0 2006.229.23:46:56.85#ibcon#read 6, iclass 39, count 0 2006.229.23:46:56.85#ibcon#end of sib2, iclass 39, count 0 2006.229.23:46:56.85#ibcon#*mode == 0, iclass 39, count 0 2006.229.23:46:56.85#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.229.23:46:56.85#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:46:56.85#ibcon#*before write, iclass 39, count 0 2006.229.23:46:56.85#ibcon#enter sib2, iclass 39, count 0 2006.229.23:46:56.85#ibcon#flushed, iclass 39, count 0 2006.229.23:46:56.85#ibcon#about to write, iclass 39, count 0 2006.229.23:46:56.85#ibcon#wrote, iclass 39, count 0 2006.229.23:46:56.85#ibcon#about to read 3, iclass 39, count 0 2006.229.23:46:56.89#ibcon#read 3, iclass 39, count 0 2006.229.23:46:56.89#ibcon#about to read 4, iclass 39, count 0 2006.229.23:46:56.89#ibcon#read 4, iclass 39, count 0 2006.229.23:46:56.89#ibcon#about to read 5, iclass 39, count 0 2006.229.23:46:56.89#ibcon#read 5, iclass 39, count 0 2006.229.23:46:56.89#ibcon#about to read 6, iclass 39, count 0 2006.229.23:46:56.89#ibcon#read 6, iclass 39, count 0 2006.229.23:46:56.89#ibcon#end of sib2, iclass 39, count 0 2006.229.23:46:56.89#ibcon#*after write, iclass 39, count 0 2006.229.23:46:56.89#ibcon#*before return 0, iclass 39, count 0 2006.229.23:46:56.89#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:56.89#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.229.23:46:56.89#ibcon#about to clear, iclass 39 cls_cnt 0 2006.229.23:46:56.89#ibcon#cleared, iclass 39 cls_cnt 0 2006.229.23:46:56.89$vck44/vb=7,4 2006.229.23:46:56.89#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.229.23:46:56.89#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.229.23:46:56.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:56.89#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:56.95#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:56.95#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:56.95#ibcon#enter wrdev, iclass 3, count 2 2006.229.23:46:56.95#ibcon#first serial, iclass 3, count 2 2006.229.23:46:56.95#ibcon#enter sib2, iclass 3, count 2 2006.229.23:46:56.95#ibcon#flushed, iclass 3, count 2 2006.229.23:46:56.95#ibcon#about to write, iclass 3, count 2 2006.229.23:46:56.95#ibcon#wrote, iclass 3, count 2 2006.229.23:46:56.95#ibcon#about to read 3, iclass 3, count 2 2006.229.23:46:56.97#ibcon#read 3, iclass 3, count 2 2006.229.23:46:56.97#ibcon#about to read 4, iclass 3, count 2 2006.229.23:46:56.97#ibcon#read 4, iclass 3, count 2 2006.229.23:46:56.97#ibcon#about to read 5, iclass 3, count 2 2006.229.23:46:56.97#ibcon#read 5, iclass 3, count 2 2006.229.23:46:56.97#ibcon#about to read 6, iclass 3, count 2 2006.229.23:46:56.97#ibcon#read 6, iclass 3, count 2 2006.229.23:46:56.97#ibcon#end of sib2, iclass 3, count 2 2006.229.23:46:56.97#ibcon#*mode == 0, iclass 3, count 2 2006.229.23:46:56.97#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.229.23:46:56.97#ibcon#[27=AT07-04\r\n] 2006.229.23:46:56.97#ibcon#*before write, iclass 3, count 2 2006.229.23:46:56.97#ibcon#enter sib2, iclass 3, count 2 2006.229.23:46:56.97#ibcon#flushed, iclass 3, count 2 2006.229.23:46:56.97#ibcon#about to write, iclass 3, count 2 2006.229.23:46:56.97#ibcon#wrote, iclass 3, count 2 2006.229.23:46:56.97#ibcon#about to read 3, iclass 3, count 2 2006.229.23:46:57.00#ibcon#read 3, iclass 3, count 2 2006.229.23:46:57.00#ibcon#about to read 4, iclass 3, count 2 2006.229.23:46:57.00#ibcon#read 4, iclass 3, count 2 2006.229.23:46:57.00#ibcon#about to read 5, iclass 3, count 2 2006.229.23:46:57.00#ibcon#read 5, iclass 3, count 2 2006.229.23:46:57.00#ibcon#about to read 6, iclass 3, count 2 2006.229.23:46:57.00#ibcon#read 6, iclass 3, count 2 2006.229.23:46:57.00#ibcon#end of sib2, iclass 3, count 2 2006.229.23:46:57.00#ibcon#*after write, iclass 3, count 2 2006.229.23:46:57.00#ibcon#*before return 0, iclass 3, count 2 2006.229.23:46:57.00#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:57.00#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.229.23:46:57.00#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.229.23:46:57.00#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:57.00#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:57.12#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:57.12#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:57.12#ibcon#enter wrdev, iclass 3, count 0 2006.229.23:46:57.12#ibcon#first serial, iclass 3, count 0 2006.229.23:46:57.12#ibcon#enter sib2, iclass 3, count 0 2006.229.23:46:57.12#ibcon#flushed, iclass 3, count 0 2006.229.23:46:57.12#ibcon#about to write, iclass 3, count 0 2006.229.23:46:57.12#ibcon#wrote, iclass 3, count 0 2006.229.23:46:57.12#ibcon#about to read 3, iclass 3, count 0 2006.229.23:46:57.14#ibcon#read 3, iclass 3, count 0 2006.229.23:46:57.14#ibcon#about to read 4, iclass 3, count 0 2006.229.23:46:57.14#ibcon#read 4, iclass 3, count 0 2006.229.23:46:57.14#ibcon#about to read 5, iclass 3, count 0 2006.229.23:46:57.14#ibcon#read 5, iclass 3, count 0 2006.229.23:46:57.14#ibcon#about to read 6, iclass 3, count 0 2006.229.23:46:57.14#ibcon#read 6, iclass 3, count 0 2006.229.23:46:57.14#ibcon#end of sib2, iclass 3, count 0 2006.229.23:46:57.14#ibcon#*mode == 0, iclass 3, count 0 2006.229.23:46:57.14#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.229.23:46:57.14#ibcon#[27=USB\r\n] 2006.229.23:46:57.14#ibcon#*before write, iclass 3, count 0 2006.229.23:46:57.14#ibcon#enter sib2, iclass 3, count 0 2006.229.23:46:57.14#ibcon#flushed, iclass 3, count 0 2006.229.23:46:57.14#ibcon#about to write, iclass 3, count 0 2006.229.23:46:57.14#ibcon#wrote, iclass 3, count 0 2006.229.23:46:57.14#ibcon#about to read 3, iclass 3, count 0 2006.229.23:46:57.17#ibcon#read 3, iclass 3, count 0 2006.229.23:46:57.17#ibcon#about to read 4, iclass 3, count 0 2006.229.23:46:57.17#ibcon#read 4, iclass 3, count 0 2006.229.23:46:57.17#ibcon#about to read 5, iclass 3, count 0 2006.229.23:46:57.17#ibcon#read 5, iclass 3, count 0 2006.229.23:46:57.17#ibcon#about to read 6, iclass 3, count 0 2006.229.23:46:57.17#ibcon#read 6, iclass 3, count 0 2006.229.23:46:57.17#ibcon#end of sib2, iclass 3, count 0 2006.229.23:46:57.17#ibcon#*after write, iclass 3, count 0 2006.229.23:46:57.17#ibcon#*before return 0, iclass 3, count 0 2006.229.23:46:57.17#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:57.17#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.229.23:46:57.17#ibcon#about to clear, iclass 3 cls_cnt 0 2006.229.23:46:57.17#ibcon#cleared, iclass 3 cls_cnt 0 2006.229.23:46:57.17$vck44/vblo=8,744.99 2006.229.23:46:57.17#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.229.23:46:57.17#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.229.23:46:57.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:46:57.17#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:57.17#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:57.17#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:57.17#ibcon#enter wrdev, iclass 5, count 0 2006.229.23:46:57.17#ibcon#first serial, iclass 5, count 0 2006.229.23:46:57.17#ibcon#enter sib2, iclass 5, count 0 2006.229.23:46:57.17#ibcon#flushed, iclass 5, count 0 2006.229.23:46:57.17#ibcon#about to write, iclass 5, count 0 2006.229.23:46:57.17#ibcon#wrote, iclass 5, count 0 2006.229.23:46:57.17#ibcon#about to read 3, iclass 5, count 0 2006.229.23:46:57.19#ibcon#read 3, iclass 5, count 0 2006.229.23:46:57.19#ibcon#about to read 4, iclass 5, count 0 2006.229.23:46:57.19#ibcon#read 4, iclass 5, count 0 2006.229.23:46:57.19#ibcon#about to read 5, iclass 5, count 0 2006.229.23:46:57.19#ibcon#read 5, iclass 5, count 0 2006.229.23:46:57.19#ibcon#about to read 6, iclass 5, count 0 2006.229.23:46:57.19#ibcon#read 6, iclass 5, count 0 2006.229.23:46:57.19#ibcon#end of sib2, iclass 5, count 0 2006.229.23:46:57.19#ibcon#*mode == 0, iclass 5, count 0 2006.229.23:46:57.19#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.229.23:46:57.19#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:46:57.19#ibcon#*before write, iclass 5, count 0 2006.229.23:46:57.19#ibcon#enter sib2, iclass 5, count 0 2006.229.23:46:57.19#ibcon#flushed, iclass 5, count 0 2006.229.23:46:57.19#ibcon#about to write, iclass 5, count 0 2006.229.23:46:57.19#ibcon#wrote, iclass 5, count 0 2006.229.23:46:57.19#ibcon#about to read 3, iclass 5, count 0 2006.229.23:46:57.23#ibcon#read 3, iclass 5, count 0 2006.229.23:46:57.23#ibcon#about to read 4, iclass 5, count 0 2006.229.23:46:57.23#ibcon#read 4, iclass 5, count 0 2006.229.23:46:57.23#ibcon#about to read 5, iclass 5, count 0 2006.229.23:46:57.23#ibcon#read 5, iclass 5, count 0 2006.229.23:46:57.23#ibcon#about to read 6, iclass 5, count 0 2006.229.23:46:57.23#ibcon#read 6, iclass 5, count 0 2006.229.23:46:57.23#ibcon#end of sib2, iclass 5, count 0 2006.229.23:46:57.23#ibcon#*after write, iclass 5, count 0 2006.229.23:46:57.23#ibcon#*before return 0, iclass 5, count 0 2006.229.23:46:57.23#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:57.23#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.229.23:46:57.23#ibcon#about to clear, iclass 5 cls_cnt 0 2006.229.23:46:57.23#ibcon#cleared, iclass 5 cls_cnt 0 2006.229.23:46:57.23$vck44/vb=8,4 2006.229.23:46:57.23#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.229.23:46:57.23#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.229.23:46:57.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:46:57.23#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:46:57.29#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:46:57.29#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:46:57.29#ibcon#enter wrdev, iclass 7, count 2 2006.229.23:46:57.29#ibcon#first serial, iclass 7, count 2 2006.229.23:46:57.29#ibcon#enter sib2, iclass 7, count 2 2006.229.23:46:57.29#ibcon#flushed, iclass 7, count 2 2006.229.23:46:57.29#ibcon#about to write, iclass 7, count 2 2006.229.23:46:57.29#ibcon#wrote, iclass 7, count 2 2006.229.23:46:57.29#ibcon#about to read 3, iclass 7, count 2 2006.229.23:46:57.31#ibcon#read 3, iclass 7, count 2 2006.229.23:46:57.31#ibcon#about to read 4, iclass 7, count 2 2006.229.23:46:57.31#ibcon#read 4, iclass 7, count 2 2006.229.23:46:57.31#ibcon#about to read 5, iclass 7, count 2 2006.229.23:46:57.31#ibcon#read 5, iclass 7, count 2 2006.229.23:46:57.31#ibcon#about to read 6, iclass 7, count 2 2006.229.23:46:57.31#ibcon#read 6, iclass 7, count 2 2006.229.23:46:57.31#ibcon#end of sib2, iclass 7, count 2 2006.229.23:46:57.31#ibcon#*mode == 0, iclass 7, count 2 2006.229.23:46:57.31#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.229.23:46:57.31#ibcon#[27=AT08-04\r\n] 2006.229.23:46:57.31#ibcon#*before write, iclass 7, count 2 2006.229.23:46:57.31#ibcon#enter sib2, iclass 7, count 2 2006.229.23:46:57.31#ibcon#flushed, iclass 7, count 2 2006.229.23:46:57.31#ibcon#about to write, iclass 7, count 2 2006.229.23:46:57.31#ibcon#wrote, iclass 7, count 2 2006.229.23:46:57.31#ibcon#about to read 3, iclass 7, count 2 2006.229.23:46:57.34#ibcon#read 3, iclass 7, count 2 2006.229.23:46:57.34#ibcon#about to read 4, iclass 7, count 2 2006.229.23:46:57.34#ibcon#read 4, iclass 7, count 2 2006.229.23:46:57.34#ibcon#about to read 5, iclass 7, count 2 2006.229.23:46:57.34#ibcon#read 5, iclass 7, count 2 2006.229.23:46:57.34#ibcon#about to read 6, iclass 7, count 2 2006.229.23:46:57.34#ibcon#read 6, iclass 7, count 2 2006.229.23:46:57.34#ibcon#end of sib2, iclass 7, count 2 2006.229.23:46:57.34#ibcon#*after write, iclass 7, count 2 2006.229.23:46:57.34#ibcon#*before return 0, iclass 7, count 2 2006.229.23:46:57.34#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:46:57.34#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.229.23:46:57.34#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.229.23:46:57.34#ibcon#ireg 7 cls_cnt 0 2006.229.23:46:57.34#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:46:57.46#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:46:57.46#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:46:57.46#ibcon#enter wrdev, iclass 7, count 0 2006.229.23:46:57.46#ibcon#first serial, iclass 7, count 0 2006.229.23:46:57.46#ibcon#enter sib2, iclass 7, count 0 2006.229.23:46:57.46#ibcon#flushed, iclass 7, count 0 2006.229.23:46:57.46#ibcon#about to write, iclass 7, count 0 2006.229.23:46:57.46#ibcon#wrote, iclass 7, count 0 2006.229.23:46:57.46#ibcon#about to read 3, iclass 7, count 0 2006.229.23:46:57.48#ibcon#read 3, iclass 7, count 0 2006.229.23:46:57.48#ibcon#about to read 4, iclass 7, count 0 2006.229.23:46:57.48#ibcon#read 4, iclass 7, count 0 2006.229.23:46:57.48#ibcon#about to read 5, iclass 7, count 0 2006.229.23:46:57.48#ibcon#read 5, iclass 7, count 0 2006.229.23:46:57.48#ibcon#about to read 6, iclass 7, count 0 2006.229.23:46:57.48#ibcon#read 6, iclass 7, count 0 2006.229.23:46:57.48#ibcon#end of sib2, iclass 7, count 0 2006.229.23:46:57.48#ibcon#*mode == 0, iclass 7, count 0 2006.229.23:46:57.48#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.229.23:46:57.48#ibcon#[27=USB\r\n] 2006.229.23:46:57.48#ibcon#*before write, iclass 7, count 0 2006.229.23:46:57.48#ibcon#enter sib2, iclass 7, count 0 2006.229.23:46:57.48#ibcon#flushed, iclass 7, count 0 2006.229.23:46:57.48#ibcon#about to write, iclass 7, count 0 2006.229.23:46:57.48#ibcon#wrote, iclass 7, count 0 2006.229.23:46:57.48#ibcon#about to read 3, iclass 7, count 0 2006.229.23:46:57.51#ibcon#read 3, iclass 7, count 0 2006.229.23:46:57.51#ibcon#about to read 4, iclass 7, count 0 2006.229.23:46:57.51#ibcon#read 4, iclass 7, count 0 2006.229.23:46:57.51#ibcon#about to read 5, iclass 7, count 0 2006.229.23:46:57.51#ibcon#read 5, iclass 7, count 0 2006.229.23:46:57.51#ibcon#about to read 6, iclass 7, count 0 2006.229.23:46:57.51#ibcon#read 6, iclass 7, count 0 2006.229.23:46:57.51#ibcon#end of sib2, iclass 7, count 0 2006.229.23:46:57.51#ibcon#*after write, iclass 7, count 0 2006.229.23:46:57.51#ibcon#*before return 0, iclass 7, count 0 2006.229.23:46:57.51#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:46:57.51#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.229.23:46:57.51#ibcon#about to clear, iclass 7 cls_cnt 0 2006.229.23:46:57.51#ibcon#cleared, iclass 7 cls_cnt 0 2006.229.23:46:57.51$vck44/vabw=wide 2006.229.23:46:57.51#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.229.23:46:57.51#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.229.23:46:57.51#ibcon#ireg 8 cls_cnt 0 2006.229.23:46:57.51#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:46:57.51#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:46:57.51#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:46:57.51#ibcon#enter wrdev, iclass 11, count 0 2006.229.23:46:57.51#ibcon#first serial, iclass 11, count 0 2006.229.23:46:57.51#ibcon#enter sib2, iclass 11, count 0 2006.229.23:46:57.51#ibcon#flushed, iclass 11, count 0 2006.229.23:46:57.51#ibcon#about to write, iclass 11, count 0 2006.229.23:46:57.51#ibcon#wrote, iclass 11, count 0 2006.229.23:46:57.51#ibcon#about to read 3, iclass 11, count 0 2006.229.23:46:57.53#ibcon#read 3, iclass 11, count 0 2006.229.23:46:57.53#ibcon#about to read 4, iclass 11, count 0 2006.229.23:46:57.53#ibcon#read 4, iclass 11, count 0 2006.229.23:46:57.53#ibcon#about to read 5, iclass 11, count 0 2006.229.23:46:57.53#ibcon#read 5, iclass 11, count 0 2006.229.23:46:57.53#ibcon#about to read 6, iclass 11, count 0 2006.229.23:46:57.53#ibcon#read 6, iclass 11, count 0 2006.229.23:46:57.53#ibcon#end of sib2, iclass 11, count 0 2006.229.23:46:57.53#ibcon#*mode == 0, iclass 11, count 0 2006.229.23:46:57.53#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.229.23:46:57.53#ibcon#[25=BW32\r\n] 2006.229.23:46:57.53#ibcon#*before write, iclass 11, count 0 2006.229.23:46:57.53#ibcon#enter sib2, iclass 11, count 0 2006.229.23:46:57.53#ibcon#flushed, iclass 11, count 0 2006.229.23:46:57.53#ibcon#about to write, iclass 11, count 0 2006.229.23:46:57.53#ibcon#wrote, iclass 11, count 0 2006.229.23:46:57.53#ibcon#about to read 3, iclass 11, count 0 2006.229.23:46:57.56#ibcon#read 3, iclass 11, count 0 2006.229.23:46:57.56#ibcon#about to read 4, iclass 11, count 0 2006.229.23:46:57.56#ibcon#read 4, iclass 11, count 0 2006.229.23:46:57.56#ibcon#about to read 5, iclass 11, count 0 2006.229.23:46:57.56#ibcon#read 5, iclass 11, count 0 2006.229.23:46:57.56#ibcon#about to read 6, iclass 11, count 0 2006.229.23:46:57.56#ibcon#read 6, iclass 11, count 0 2006.229.23:46:57.56#ibcon#end of sib2, iclass 11, count 0 2006.229.23:46:57.56#ibcon#*after write, iclass 11, count 0 2006.229.23:46:57.56#ibcon#*before return 0, iclass 11, count 0 2006.229.23:46:57.56#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:46:57.56#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.229.23:46:57.56#ibcon#about to clear, iclass 11 cls_cnt 0 2006.229.23:46:57.56#ibcon#cleared, iclass 11 cls_cnt 0 2006.229.23:46:57.56$vck44/vbbw=wide 2006.229.23:46:57.56#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.229.23:46:57.56#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.229.23:46:57.56#ibcon#ireg 8 cls_cnt 0 2006.229.23:46:57.56#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:46:57.63#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:46:57.63#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:46:57.63#ibcon#enter wrdev, iclass 13, count 0 2006.229.23:46:57.63#ibcon#first serial, iclass 13, count 0 2006.229.23:46:57.63#ibcon#enter sib2, iclass 13, count 0 2006.229.23:46:57.63#ibcon#flushed, iclass 13, count 0 2006.229.23:46:57.63#ibcon#about to write, iclass 13, count 0 2006.229.23:46:57.63#ibcon#wrote, iclass 13, count 0 2006.229.23:46:57.63#ibcon#about to read 3, iclass 13, count 0 2006.229.23:46:57.65#ibcon#read 3, iclass 13, count 0 2006.229.23:46:57.65#ibcon#about to read 4, iclass 13, count 0 2006.229.23:46:57.65#ibcon#read 4, iclass 13, count 0 2006.229.23:46:57.65#ibcon#about to read 5, iclass 13, count 0 2006.229.23:46:57.65#ibcon#read 5, iclass 13, count 0 2006.229.23:46:57.65#ibcon#about to read 6, iclass 13, count 0 2006.229.23:46:57.65#ibcon#read 6, iclass 13, count 0 2006.229.23:46:57.65#ibcon#end of sib2, iclass 13, count 0 2006.229.23:46:57.65#ibcon#*mode == 0, iclass 13, count 0 2006.229.23:46:57.65#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.229.23:46:57.65#ibcon#[27=BW32\r\n] 2006.229.23:46:57.65#ibcon#*before write, iclass 13, count 0 2006.229.23:46:57.65#ibcon#enter sib2, iclass 13, count 0 2006.229.23:46:57.65#ibcon#flushed, iclass 13, count 0 2006.229.23:46:57.65#ibcon#about to write, iclass 13, count 0 2006.229.23:46:57.65#ibcon#wrote, iclass 13, count 0 2006.229.23:46:57.65#ibcon#about to read 3, iclass 13, count 0 2006.229.23:46:57.68#ibcon#read 3, iclass 13, count 0 2006.229.23:46:57.68#ibcon#about to read 4, iclass 13, count 0 2006.229.23:46:57.68#ibcon#read 4, iclass 13, count 0 2006.229.23:46:57.68#ibcon#about to read 5, iclass 13, count 0 2006.229.23:46:57.68#ibcon#read 5, iclass 13, count 0 2006.229.23:46:57.68#ibcon#about to read 6, iclass 13, count 0 2006.229.23:46:57.68#ibcon#read 6, iclass 13, count 0 2006.229.23:46:57.68#ibcon#end of sib2, iclass 13, count 0 2006.229.23:46:57.68#ibcon#*after write, iclass 13, count 0 2006.229.23:46:57.68#ibcon#*before return 0, iclass 13, count 0 2006.229.23:46:57.68#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:46:57.68#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.229.23:46:57.68#ibcon#about to clear, iclass 13 cls_cnt 0 2006.229.23:46:57.68#ibcon#cleared, iclass 13 cls_cnt 0 2006.229.23:46:57.68$setupk4/ifdk4 2006.229.23:46:57.68$ifdk4/lo= 2006.229.23:46:57.68$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:46:57.68$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:46:57.68$ifdk4/patch= 2006.229.23:46:57.68$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:46:57.68$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:46:57.68$setupk4/!*+20s 2006.229.23:47:04.76#abcon#<5=/08 2.1 6.4 30.29 811002.6\r\n> 2006.229.23:47:04.78#abcon#{5=INTERFACE CLEAR} 2006.229.23:47:04.84#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:47:12.17$setupk4/"tpicd 2006.229.23:47:12.17$setupk4/echo=off 2006.229.23:47:12.17$setupk4/xlog=off 2006.229.23:47:12.17:!2006.229.23:49:27 2006.229.23:47:26.14#trakl#Source acquired 2006.229.23:47:27.14#flagr#flagr/antenna,acquired 2006.229.23:49:27.00:preob 2006.229.23:49:28.14/onsource/TRACKING 2006.229.23:49:28.14:!2006.229.23:49:37 2006.229.23:49:37.00:"tape 2006.229.23:49:37.00:"st=record 2006.229.23:49:37.00:data_valid=on 2006.229.23:49:37.00:midob 2006.229.23:49:37.14/onsource/TRACKING 2006.229.23:49:37.14/wx/30.38,1002.6,82 2006.229.23:49:37.35/cable/+6.4079E-03 2006.229.23:49:38.44/va/01,08,usb,yes,36,39 2006.229.23:49:38.44/va/02,07,usb,yes,39,40 2006.229.23:49:38.44/va/03,06,usb,yes,48,51 2006.229.23:49:38.44/va/04,07,usb,yes,40,42 2006.229.23:49:38.44/va/05,04,usb,yes,36,37 2006.229.23:49:38.44/va/06,04,usb,yes,40,40 2006.229.23:49:38.44/va/07,05,usb,yes,36,37 2006.229.23:49:38.44/va/08,06,usb,yes,26,32 2006.229.23:49:38.67/valo/01,524.99,yes,locked 2006.229.23:49:38.67/valo/02,534.99,yes,locked 2006.229.23:49:38.67/valo/03,564.99,yes,locked 2006.229.23:49:38.67/valo/04,624.99,yes,locked 2006.229.23:49:38.67/valo/05,734.99,yes,locked 2006.229.23:49:38.67/valo/06,814.99,yes,locked 2006.229.23:49:38.67/valo/07,864.99,yes,locked 2006.229.23:49:38.67/valo/08,884.99,yes,locked 2006.229.23:49:39.76/vb/01,04,usb,yes,35,33 2006.229.23:49:39.76/vb/02,04,usb,yes,38,38 2006.229.23:49:39.76/vb/03,04,usb,yes,35,38 2006.229.23:49:39.76/vb/04,04,usb,yes,40,38 2006.229.23:49:39.76/vb/05,04,usb,yes,32,34 2006.229.23:49:39.76/vb/06,04,usb,yes,36,33 2006.229.23:49:39.76/vb/07,04,usb,yes,36,36 2006.229.23:49:39.76/vb/08,04,usb,yes,33,37 2006.229.23:49:39.99/vblo/01,629.99,yes,locked 2006.229.23:49:39.99/vblo/02,634.99,yes,locked 2006.229.23:49:39.99/vblo/03,649.99,yes,locked 2006.229.23:49:39.99/vblo/04,679.99,yes,locked 2006.229.23:49:39.99/vblo/05,709.99,yes,locked 2006.229.23:49:39.99/vblo/06,719.99,yes,locked 2006.229.23:49:39.99/vblo/07,734.99,yes,locked 2006.229.23:49:39.99/vblo/08,744.99,yes,locked 2006.229.23:49:40.14/vabw/8 2006.229.23:49:40.29/vbbw/8 2006.229.23:49:40.38/xfe/off,on,12.5 2006.229.23:49:40.76/ifatt/23,28,28,28 2006.229.23:49:41.08/fmout-gps/S +4.51E-07 2006.229.23:49:41.12:!2006.229.23:50:17 2006.229.23:50:17.00:data_valid=off 2006.229.23:50:17.00:"et 2006.229.23:50:17.00:!+3s 2006.229.23:50:20.01:"tape 2006.229.23:50:20.01:postob 2006.229.23:50:20.18/cable/+6.4070E-03 2006.229.23:50:20.18/wx/30.41,1002.7,83 2006.229.23:50:21.08/fmout-gps/S +4.50E-07 2006.229.23:50:21.08:scan_name=229-2357,jd0608,220 2006.229.23:50:21.08:source=1044+719,104827.62,714335.9,2000.0,cw 2006.229.23:50:22.14#flagr#flagr/antenna,new-source 2006.229.23:50:22.14:checkk5 2006.229.23:50:22.56/chk_autoobs//k5ts1/ autoobs is running! 2006.229.23:50:22.95/chk_autoobs//k5ts2/ autoobs is running! 2006.229.23:50:23.34/chk_autoobs//k5ts3/ autoobs is running! 2006.229.23:50:23.73/chk_autoobs//k5ts4/ autoobs is running! 2006.229.23:50:24.13/chk_obsdata//k5ts1/T2292349??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.23:50:24.52/chk_obsdata//k5ts2/T2292349??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.23:50:24.91/chk_obsdata//k5ts3/T2292349??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.23:50:25.33/chk_obsdata//k5ts4/T2292349??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.229.23:50:26.04/k5log//k5ts1_log_newline 2006.229.23:50:26.74/k5log//k5ts2_log_newline 2006.229.23:50:27.45/k5log//k5ts3_log_newline 2006.229.23:50:28.16/k5log//k5ts4_log_newline 2006.229.23:50:28.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.229.23:50:28.19:setupk4=1 2006.229.23:50:28.19$setupk4/echo=on 2006.229.23:50:28.19$setupk4/pcalon 2006.229.23:50:28.19$pcalon/"no phase cal control is implemented here 2006.229.23:50:28.19$setupk4/"tpicd=stop 2006.229.23:50:28.19$setupk4/"rec=synch_on 2006.229.23:50:28.19$setupk4/"rec_mode=128 2006.229.23:50:28.19$setupk4/!* 2006.229.23:50:28.19$setupk4/recpk4 2006.229.23:50:28.19$recpk4/recpatch= 2006.229.23:50:28.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.229.23:50:28.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.229.23:50:28.20$setupk4/vck44 2006.229.23:50:28.20$vck44/valo=1,524.99 2006.229.23:50:28.20#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.229.23:50:28.20#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.229.23:50:28.20#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:28.20#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:50:28.20#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:50:28.20#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:50:28.20#ibcon#enter wrdev, iclass 29, count 0 2006.229.23:50:28.20#ibcon#first serial, iclass 29, count 0 2006.229.23:50:28.20#ibcon#enter sib2, iclass 29, count 0 2006.229.23:50:28.20#ibcon#flushed, iclass 29, count 0 2006.229.23:50:28.20#ibcon#about to write, iclass 29, count 0 2006.229.23:50:28.20#ibcon#wrote, iclass 29, count 0 2006.229.23:50:28.20#ibcon#about to read 3, iclass 29, count 0 2006.229.23:50:28.22#ibcon#read 3, iclass 29, count 0 2006.229.23:50:28.22#ibcon#about to read 4, iclass 29, count 0 2006.229.23:50:28.22#ibcon#read 4, iclass 29, count 0 2006.229.23:50:28.22#ibcon#about to read 5, iclass 29, count 0 2006.229.23:50:28.22#ibcon#read 5, iclass 29, count 0 2006.229.23:50:28.22#ibcon#about to read 6, iclass 29, count 0 2006.229.23:50:28.22#ibcon#read 6, iclass 29, count 0 2006.229.23:50:28.22#ibcon#end of sib2, iclass 29, count 0 2006.229.23:50:28.22#ibcon#*mode == 0, iclass 29, count 0 2006.229.23:50:28.22#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.229.23:50:28.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.229.23:50:28.22#ibcon#*before write, iclass 29, count 0 2006.229.23:50:28.22#ibcon#enter sib2, iclass 29, count 0 2006.229.23:50:28.22#ibcon#flushed, iclass 29, count 0 2006.229.23:50:28.22#ibcon#about to write, iclass 29, count 0 2006.229.23:50:28.22#ibcon#wrote, iclass 29, count 0 2006.229.23:50:28.22#ibcon#about to read 3, iclass 29, count 0 2006.229.23:50:28.24#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:50:28.27#ibcon#read 3, iclass 29, count 0 2006.229.23:50:28.27#ibcon#about to read 4, iclass 29, count 0 2006.229.23:50:28.27#ibcon#read 4, iclass 29, count 0 2006.229.23:50:28.27#ibcon#about to read 5, iclass 29, count 0 2006.229.23:50:28.27#ibcon#read 5, iclass 29, count 0 2006.229.23:50:28.27#ibcon#about to read 6, iclass 29, count 0 2006.229.23:50:28.27#ibcon#read 6, iclass 29, count 0 2006.229.23:50:28.27#ibcon#end of sib2, iclass 29, count 0 2006.229.23:50:28.27#ibcon#*after write, iclass 29, count 0 2006.229.23:50:28.27#ibcon#*before return 0, iclass 29, count 0 2006.229.23:50:28.27#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:50:28.27#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.229.23:50:28.27#ibcon#about to clear, iclass 29 cls_cnt 0 2006.229.23:50:28.27#ibcon#cleared, iclass 29 cls_cnt 0 2006.229.23:50:28.27$vck44/va=1,8 2006.229.23:50:28.27#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.23:50:28.27#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.23:50:28.27#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:28.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:28.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:28.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:28.27#ibcon#enter wrdev, iclass 32, count 2 2006.229.23:50:28.27#ibcon#first serial, iclass 32, count 2 2006.229.23:50:28.27#ibcon#enter sib2, iclass 32, count 2 2006.229.23:50:28.27#ibcon#flushed, iclass 32, count 2 2006.229.23:50:28.27#ibcon#about to write, iclass 32, count 2 2006.229.23:50:28.27#ibcon#wrote, iclass 32, count 2 2006.229.23:50:28.27#ibcon#about to read 3, iclass 32, count 2 2006.229.23:50:28.29#ibcon#read 3, iclass 32, count 2 2006.229.23:50:28.29#ibcon#about to read 4, iclass 32, count 2 2006.229.23:50:28.29#ibcon#read 4, iclass 32, count 2 2006.229.23:50:28.29#ibcon#about to read 5, iclass 32, count 2 2006.229.23:50:28.29#ibcon#read 5, iclass 32, count 2 2006.229.23:50:28.29#ibcon#about to read 6, iclass 32, count 2 2006.229.23:50:28.29#ibcon#read 6, iclass 32, count 2 2006.229.23:50:28.29#ibcon#end of sib2, iclass 32, count 2 2006.229.23:50:28.29#ibcon#*mode == 0, iclass 32, count 2 2006.229.23:50:28.29#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.23:50:28.29#ibcon#[25=AT01-08\r\n] 2006.229.23:50:28.29#ibcon#*before write, iclass 32, count 2 2006.229.23:50:28.29#ibcon#enter sib2, iclass 32, count 2 2006.229.23:50:28.29#ibcon#flushed, iclass 32, count 2 2006.229.23:50:28.29#ibcon#about to write, iclass 32, count 2 2006.229.23:50:28.29#ibcon#wrote, iclass 32, count 2 2006.229.23:50:28.29#ibcon#about to read 3, iclass 32, count 2 2006.229.23:50:28.32#ibcon#read 3, iclass 32, count 2 2006.229.23:50:28.32#ibcon#about to read 4, iclass 32, count 2 2006.229.23:50:28.32#ibcon#read 4, iclass 32, count 2 2006.229.23:50:28.32#ibcon#about to read 5, iclass 32, count 2 2006.229.23:50:28.32#ibcon#read 5, iclass 32, count 2 2006.229.23:50:28.32#ibcon#about to read 6, iclass 32, count 2 2006.229.23:50:28.32#ibcon#read 6, iclass 32, count 2 2006.229.23:50:28.32#ibcon#end of sib2, iclass 32, count 2 2006.229.23:50:28.32#ibcon#*after write, iclass 32, count 2 2006.229.23:50:28.32#ibcon#*before return 0, iclass 32, count 2 2006.229.23:50:28.32#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:28.32#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:28.32#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.23:50:28.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:28.32#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:28.44#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:28.44#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:28.44#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:50:28.44#ibcon#first serial, iclass 32, count 0 2006.229.23:50:28.44#ibcon#enter sib2, iclass 32, count 0 2006.229.23:50:28.44#ibcon#flushed, iclass 32, count 0 2006.229.23:50:28.44#ibcon#about to write, iclass 32, count 0 2006.229.23:50:28.44#ibcon#wrote, iclass 32, count 0 2006.229.23:50:28.44#ibcon#about to read 3, iclass 32, count 0 2006.229.23:50:28.46#ibcon#read 3, iclass 32, count 0 2006.229.23:50:28.46#ibcon#about to read 4, iclass 32, count 0 2006.229.23:50:28.46#ibcon#read 4, iclass 32, count 0 2006.229.23:50:28.46#ibcon#about to read 5, iclass 32, count 0 2006.229.23:50:28.46#ibcon#read 5, iclass 32, count 0 2006.229.23:50:28.46#ibcon#about to read 6, iclass 32, count 0 2006.229.23:50:28.46#ibcon#read 6, iclass 32, count 0 2006.229.23:50:28.46#ibcon#end of sib2, iclass 32, count 0 2006.229.23:50:28.46#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:50:28.46#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:50:28.46#ibcon#[25=USB\r\n] 2006.229.23:50:28.46#ibcon#*before write, iclass 32, count 0 2006.229.23:50:28.46#ibcon#enter sib2, iclass 32, count 0 2006.229.23:50:28.46#ibcon#flushed, iclass 32, count 0 2006.229.23:50:28.46#ibcon#about to write, iclass 32, count 0 2006.229.23:50:28.46#ibcon#wrote, iclass 32, count 0 2006.229.23:50:28.46#ibcon#about to read 3, iclass 32, count 0 2006.229.23:50:28.49#ibcon#read 3, iclass 32, count 0 2006.229.23:50:28.49#ibcon#about to read 4, iclass 32, count 0 2006.229.23:50:28.49#ibcon#read 4, iclass 32, count 0 2006.229.23:50:28.49#ibcon#about to read 5, iclass 32, count 0 2006.229.23:50:28.49#ibcon#read 5, iclass 32, count 0 2006.229.23:50:28.49#ibcon#about to read 6, iclass 32, count 0 2006.229.23:50:28.49#ibcon#read 6, iclass 32, count 0 2006.229.23:50:28.49#ibcon#end of sib2, iclass 32, count 0 2006.229.23:50:28.49#ibcon#*after write, iclass 32, count 0 2006.229.23:50:28.49#ibcon#*before return 0, iclass 32, count 0 2006.229.23:50:28.49#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:28.49#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:28.49#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:50:28.49#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:50:28.49$vck44/valo=2,534.99 2006.229.23:50:28.49#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.23:50:28.49#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.23:50:28.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:28.49#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:28.49#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:28.49#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:28.49#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:50:28.49#ibcon#first serial, iclass 34, count 0 2006.229.23:50:28.49#ibcon#enter sib2, iclass 34, count 0 2006.229.23:50:28.49#ibcon#flushed, iclass 34, count 0 2006.229.23:50:28.49#ibcon#about to write, iclass 34, count 0 2006.229.23:50:28.49#ibcon#wrote, iclass 34, count 0 2006.229.23:50:28.49#ibcon#about to read 3, iclass 34, count 0 2006.229.23:50:28.51#ibcon#read 3, iclass 34, count 0 2006.229.23:50:28.51#ibcon#about to read 4, iclass 34, count 0 2006.229.23:50:28.51#ibcon#read 4, iclass 34, count 0 2006.229.23:50:28.51#ibcon#about to read 5, iclass 34, count 0 2006.229.23:50:28.51#ibcon#read 5, iclass 34, count 0 2006.229.23:50:28.51#ibcon#about to read 6, iclass 34, count 0 2006.229.23:50:28.51#ibcon#read 6, iclass 34, count 0 2006.229.23:50:28.51#ibcon#end of sib2, iclass 34, count 0 2006.229.23:50:28.51#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:50:28.51#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:50:28.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.229.23:50:28.51#ibcon#*before write, iclass 34, count 0 2006.229.23:50:28.51#ibcon#enter sib2, iclass 34, count 0 2006.229.23:50:28.51#ibcon#flushed, iclass 34, count 0 2006.229.23:50:28.51#ibcon#about to write, iclass 34, count 0 2006.229.23:50:28.51#ibcon#wrote, iclass 34, count 0 2006.229.23:50:28.51#ibcon#about to read 3, iclass 34, count 0 2006.229.23:50:28.55#ibcon#read 3, iclass 34, count 0 2006.229.23:50:28.55#ibcon#about to read 4, iclass 34, count 0 2006.229.23:50:28.55#ibcon#read 4, iclass 34, count 0 2006.229.23:50:28.55#ibcon#about to read 5, iclass 34, count 0 2006.229.23:50:28.55#ibcon#read 5, iclass 34, count 0 2006.229.23:50:28.55#ibcon#about to read 6, iclass 34, count 0 2006.229.23:50:28.55#ibcon#read 6, iclass 34, count 0 2006.229.23:50:28.55#ibcon#end of sib2, iclass 34, count 0 2006.229.23:50:28.55#ibcon#*after write, iclass 34, count 0 2006.229.23:50:28.55#ibcon#*before return 0, iclass 34, count 0 2006.229.23:50:28.55#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:28.55#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:28.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:50:28.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:50:28.55$vck44/va=2,7 2006.229.23:50:28.55#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.23:50:28.55#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.23:50:28.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:28.55#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:28.61#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:28.61#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:28.61#ibcon#enter wrdev, iclass 36, count 2 2006.229.23:50:28.61#ibcon#first serial, iclass 36, count 2 2006.229.23:50:28.61#ibcon#enter sib2, iclass 36, count 2 2006.229.23:50:28.61#ibcon#flushed, iclass 36, count 2 2006.229.23:50:28.61#ibcon#about to write, iclass 36, count 2 2006.229.23:50:28.61#ibcon#wrote, iclass 36, count 2 2006.229.23:50:28.61#ibcon#about to read 3, iclass 36, count 2 2006.229.23:50:28.63#ibcon#read 3, iclass 36, count 2 2006.229.23:50:28.63#ibcon#about to read 4, iclass 36, count 2 2006.229.23:50:28.63#ibcon#read 4, iclass 36, count 2 2006.229.23:50:28.63#ibcon#about to read 5, iclass 36, count 2 2006.229.23:50:28.63#ibcon#read 5, iclass 36, count 2 2006.229.23:50:28.63#ibcon#about to read 6, iclass 36, count 2 2006.229.23:50:28.63#ibcon#read 6, iclass 36, count 2 2006.229.23:50:28.63#ibcon#end of sib2, iclass 36, count 2 2006.229.23:50:28.63#ibcon#*mode == 0, iclass 36, count 2 2006.229.23:50:28.63#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.23:50:28.63#ibcon#[25=AT02-07\r\n] 2006.229.23:50:28.63#ibcon#*before write, iclass 36, count 2 2006.229.23:50:28.63#ibcon#enter sib2, iclass 36, count 2 2006.229.23:50:28.63#ibcon#flushed, iclass 36, count 2 2006.229.23:50:28.63#ibcon#about to write, iclass 36, count 2 2006.229.23:50:28.63#ibcon#wrote, iclass 36, count 2 2006.229.23:50:28.63#ibcon#about to read 3, iclass 36, count 2 2006.229.23:50:28.66#ibcon#read 3, iclass 36, count 2 2006.229.23:50:28.66#ibcon#about to read 4, iclass 36, count 2 2006.229.23:50:28.66#ibcon#read 4, iclass 36, count 2 2006.229.23:50:28.66#ibcon#about to read 5, iclass 36, count 2 2006.229.23:50:28.66#ibcon#read 5, iclass 36, count 2 2006.229.23:50:28.66#ibcon#about to read 6, iclass 36, count 2 2006.229.23:50:28.66#ibcon#read 6, iclass 36, count 2 2006.229.23:50:28.66#ibcon#end of sib2, iclass 36, count 2 2006.229.23:50:28.66#ibcon#*after write, iclass 36, count 2 2006.229.23:50:28.66#ibcon#*before return 0, iclass 36, count 2 2006.229.23:50:28.66#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:28.66#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:28.66#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.23:50:28.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:28.66#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:28.78#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:28.78#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:28.78#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:50:28.78#ibcon#first serial, iclass 36, count 0 2006.229.23:50:28.78#ibcon#enter sib2, iclass 36, count 0 2006.229.23:50:28.78#ibcon#flushed, iclass 36, count 0 2006.229.23:50:28.78#ibcon#about to write, iclass 36, count 0 2006.229.23:50:28.78#ibcon#wrote, iclass 36, count 0 2006.229.23:50:28.78#ibcon#about to read 3, iclass 36, count 0 2006.229.23:50:28.80#ibcon#read 3, iclass 36, count 0 2006.229.23:50:28.80#ibcon#about to read 4, iclass 36, count 0 2006.229.23:50:28.80#ibcon#read 4, iclass 36, count 0 2006.229.23:50:28.80#ibcon#about to read 5, iclass 36, count 0 2006.229.23:50:28.80#ibcon#read 5, iclass 36, count 0 2006.229.23:50:28.80#ibcon#about to read 6, iclass 36, count 0 2006.229.23:50:28.80#ibcon#read 6, iclass 36, count 0 2006.229.23:50:28.80#ibcon#end of sib2, iclass 36, count 0 2006.229.23:50:28.80#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:50:28.80#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:50:28.80#ibcon#[25=USB\r\n] 2006.229.23:50:28.80#ibcon#*before write, iclass 36, count 0 2006.229.23:50:28.80#ibcon#enter sib2, iclass 36, count 0 2006.229.23:50:28.80#ibcon#flushed, iclass 36, count 0 2006.229.23:50:28.80#ibcon#about to write, iclass 36, count 0 2006.229.23:50:28.80#ibcon#wrote, iclass 36, count 0 2006.229.23:50:28.80#ibcon#about to read 3, iclass 36, count 0 2006.229.23:50:28.83#ibcon#read 3, iclass 36, count 0 2006.229.23:50:28.83#ibcon#about to read 4, iclass 36, count 0 2006.229.23:50:28.83#ibcon#read 4, iclass 36, count 0 2006.229.23:50:28.83#ibcon#about to read 5, iclass 36, count 0 2006.229.23:50:28.83#ibcon#read 5, iclass 36, count 0 2006.229.23:50:28.83#ibcon#about to read 6, iclass 36, count 0 2006.229.23:50:28.83#ibcon#read 6, iclass 36, count 0 2006.229.23:50:28.83#ibcon#end of sib2, iclass 36, count 0 2006.229.23:50:28.83#ibcon#*after write, iclass 36, count 0 2006.229.23:50:28.83#ibcon#*before return 0, iclass 36, count 0 2006.229.23:50:28.83#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:28.83#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:28.83#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:50:28.83#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:50:28.83$vck44/valo=3,564.99 2006.229.23:50:28.83#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.23:50:28.83#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.23:50:28.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:28.83#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:28.83#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:28.83#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:28.83#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:50:28.83#ibcon#first serial, iclass 38, count 0 2006.229.23:50:28.83#ibcon#enter sib2, iclass 38, count 0 2006.229.23:50:28.83#ibcon#flushed, iclass 38, count 0 2006.229.23:50:28.83#ibcon#about to write, iclass 38, count 0 2006.229.23:50:28.83#ibcon#wrote, iclass 38, count 0 2006.229.23:50:28.83#ibcon#about to read 3, iclass 38, count 0 2006.229.23:50:28.85#ibcon#read 3, iclass 38, count 0 2006.229.23:50:28.85#ibcon#about to read 4, iclass 38, count 0 2006.229.23:50:28.85#ibcon#read 4, iclass 38, count 0 2006.229.23:50:28.85#ibcon#about to read 5, iclass 38, count 0 2006.229.23:50:28.85#ibcon#read 5, iclass 38, count 0 2006.229.23:50:28.85#ibcon#about to read 6, iclass 38, count 0 2006.229.23:50:28.85#ibcon#read 6, iclass 38, count 0 2006.229.23:50:28.85#ibcon#end of sib2, iclass 38, count 0 2006.229.23:50:28.85#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:50:28.85#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:50:28.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.229.23:50:28.85#ibcon#*before write, iclass 38, count 0 2006.229.23:50:28.85#ibcon#enter sib2, iclass 38, count 0 2006.229.23:50:28.85#ibcon#flushed, iclass 38, count 0 2006.229.23:50:28.85#ibcon#about to write, iclass 38, count 0 2006.229.23:50:28.85#ibcon#wrote, iclass 38, count 0 2006.229.23:50:28.85#ibcon#about to read 3, iclass 38, count 0 2006.229.23:50:28.89#ibcon#read 3, iclass 38, count 0 2006.229.23:50:28.89#ibcon#about to read 4, iclass 38, count 0 2006.229.23:50:28.89#ibcon#read 4, iclass 38, count 0 2006.229.23:50:28.89#ibcon#about to read 5, iclass 38, count 0 2006.229.23:50:28.89#ibcon#read 5, iclass 38, count 0 2006.229.23:50:28.89#ibcon#about to read 6, iclass 38, count 0 2006.229.23:50:28.89#ibcon#read 6, iclass 38, count 0 2006.229.23:50:28.89#ibcon#end of sib2, iclass 38, count 0 2006.229.23:50:28.89#ibcon#*after write, iclass 38, count 0 2006.229.23:50:28.89#ibcon#*before return 0, iclass 38, count 0 2006.229.23:50:28.89#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:28.89#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:28.89#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:50:28.89#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:50:28.89$vck44/va=3,6 2006.229.23:50:28.89#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.23:50:28.89#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.23:50:28.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:28.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:28.95#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:28.95#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:28.95#ibcon#enter wrdev, iclass 40, count 2 2006.229.23:50:28.95#ibcon#first serial, iclass 40, count 2 2006.229.23:50:28.95#ibcon#enter sib2, iclass 40, count 2 2006.229.23:50:28.95#ibcon#flushed, iclass 40, count 2 2006.229.23:50:28.95#ibcon#about to write, iclass 40, count 2 2006.229.23:50:28.95#ibcon#wrote, iclass 40, count 2 2006.229.23:50:28.95#ibcon#about to read 3, iclass 40, count 2 2006.229.23:50:28.97#ibcon#read 3, iclass 40, count 2 2006.229.23:50:28.97#ibcon#about to read 4, iclass 40, count 2 2006.229.23:50:28.97#ibcon#read 4, iclass 40, count 2 2006.229.23:50:28.97#ibcon#about to read 5, iclass 40, count 2 2006.229.23:50:28.97#ibcon#read 5, iclass 40, count 2 2006.229.23:50:28.97#ibcon#about to read 6, iclass 40, count 2 2006.229.23:50:28.97#ibcon#read 6, iclass 40, count 2 2006.229.23:50:28.97#ibcon#end of sib2, iclass 40, count 2 2006.229.23:50:28.97#ibcon#*mode == 0, iclass 40, count 2 2006.229.23:50:28.97#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.23:50:28.97#ibcon#[25=AT03-06\r\n] 2006.229.23:50:28.97#ibcon#*before write, iclass 40, count 2 2006.229.23:50:28.97#ibcon#enter sib2, iclass 40, count 2 2006.229.23:50:28.97#ibcon#flushed, iclass 40, count 2 2006.229.23:50:28.97#ibcon#about to write, iclass 40, count 2 2006.229.23:50:28.97#ibcon#wrote, iclass 40, count 2 2006.229.23:50:28.97#ibcon#about to read 3, iclass 40, count 2 2006.229.23:50:29.00#ibcon#read 3, iclass 40, count 2 2006.229.23:50:29.00#ibcon#about to read 4, iclass 40, count 2 2006.229.23:50:29.00#ibcon#read 4, iclass 40, count 2 2006.229.23:50:29.00#ibcon#about to read 5, iclass 40, count 2 2006.229.23:50:29.00#ibcon#read 5, iclass 40, count 2 2006.229.23:50:29.00#ibcon#about to read 6, iclass 40, count 2 2006.229.23:50:29.00#ibcon#read 6, iclass 40, count 2 2006.229.23:50:29.00#ibcon#end of sib2, iclass 40, count 2 2006.229.23:50:29.00#ibcon#*after write, iclass 40, count 2 2006.229.23:50:29.00#ibcon#*before return 0, iclass 40, count 2 2006.229.23:50:29.00#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:29.00#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:29.00#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.23:50:29.00#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:29.00#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:29.12#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:29.12#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:29.12#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:50:29.12#ibcon#first serial, iclass 40, count 0 2006.229.23:50:29.12#ibcon#enter sib2, iclass 40, count 0 2006.229.23:50:29.12#ibcon#flushed, iclass 40, count 0 2006.229.23:50:29.12#ibcon#about to write, iclass 40, count 0 2006.229.23:50:29.12#ibcon#wrote, iclass 40, count 0 2006.229.23:50:29.12#ibcon#about to read 3, iclass 40, count 0 2006.229.23:50:29.14#ibcon#read 3, iclass 40, count 0 2006.229.23:50:29.14#ibcon#about to read 4, iclass 40, count 0 2006.229.23:50:29.14#ibcon#read 4, iclass 40, count 0 2006.229.23:50:29.14#ibcon#about to read 5, iclass 40, count 0 2006.229.23:50:29.14#ibcon#read 5, iclass 40, count 0 2006.229.23:50:29.14#ibcon#about to read 6, iclass 40, count 0 2006.229.23:50:29.14#ibcon#read 6, iclass 40, count 0 2006.229.23:50:29.14#ibcon#end of sib2, iclass 40, count 0 2006.229.23:50:29.14#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:50:29.14#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:50:29.14#ibcon#[25=USB\r\n] 2006.229.23:50:29.14#ibcon#*before write, iclass 40, count 0 2006.229.23:50:29.14#ibcon#enter sib2, iclass 40, count 0 2006.229.23:50:29.14#ibcon#flushed, iclass 40, count 0 2006.229.23:50:29.14#ibcon#about to write, iclass 40, count 0 2006.229.23:50:29.14#ibcon#wrote, iclass 40, count 0 2006.229.23:50:29.14#ibcon#about to read 3, iclass 40, count 0 2006.229.23:50:29.17#ibcon#read 3, iclass 40, count 0 2006.229.23:50:29.17#ibcon#about to read 4, iclass 40, count 0 2006.229.23:50:29.17#ibcon#read 4, iclass 40, count 0 2006.229.23:50:29.17#ibcon#about to read 5, iclass 40, count 0 2006.229.23:50:29.17#ibcon#read 5, iclass 40, count 0 2006.229.23:50:29.17#ibcon#about to read 6, iclass 40, count 0 2006.229.23:50:29.17#ibcon#read 6, iclass 40, count 0 2006.229.23:50:29.17#ibcon#end of sib2, iclass 40, count 0 2006.229.23:50:29.17#ibcon#*after write, iclass 40, count 0 2006.229.23:50:29.17#ibcon#*before return 0, iclass 40, count 0 2006.229.23:50:29.17#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:29.17#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:29.17#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:50:29.17#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:50:29.17$vck44/valo=4,624.99 2006.229.23:50:29.17#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.23:50:29.17#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.23:50:29.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:29.17#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:29.17#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:29.17#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:29.17#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:50:29.17#ibcon#first serial, iclass 4, count 0 2006.229.23:50:29.17#ibcon#enter sib2, iclass 4, count 0 2006.229.23:50:29.17#ibcon#flushed, iclass 4, count 0 2006.229.23:50:29.17#ibcon#about to write, iclass 4, count 0 2006.229.23:50:29.17#ibcon#wrote, iclass 4, count 0 2006.229.23:50:29.17#ibcon#about to read 3, iclass 4, count 0 2006.229.23:50:29.19#ibcon#read 3, iclass 4, count 0 2006.229.23:50:29.19#ibcon#about to read 4, iclass 4, count 0 2006.229.23:50:29.19#ibcon#read 4, iclass 4, count 0 2006.229.23:50:29.19#ibcon#about to read 5, iclass 4, count 0 2006.229.23:50:29.19#ibcon#read 5, iclass 4, count 0 2006.229.23:50:29.19#ibcon#about to read 6, iclass 4, count 0 2006.229.23:50:29.19#ibcon#read 6, iclass 4, count 0 2006.229.23:50:29.19#ibcon#end of sib2, iclass 4, count 0 2006.229.23:50:29.19#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:50:29.19#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:50:29.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.229.23:50:29.19#ibcon#*before write, iclass 4, count 0 2006.229.23:50:29.19#ibcon#enter sib2, iclass 4, count 0 2006.229.23:50:29.19#ibcon#flushed, iclass 4, count 0 2006.229.23:50:29.19#ibcon#about to write, iclass 4, count 0 2006.229.23:50:29.19#ibcon#wrote, iclass 4, count 0 2006.229.23:50:29.19#ibcon#about to read 3, iclass 4, count 0 2006.229.23:50:29.23#ibcon#read 3, iclass 4, count 0 2006.229.23:50:29.23#ibcon#about to read 4, iclass 4, count 0 2006.229.23:50:29.23#ibcon#read 4, iclass 4, count 0 2006.229.23:50:29.23#ibcon#about to read 5, iclass 4, count 0 2006.229.23:50:29.23#ibcon#read 5, iclass 4, count 0 2006.229.23:50:29.23#ibcon#about to read 6, iclass 4, count 0 2006.229.23:50:29.23#ibcon#read 6, iclass 4, count 0 2006.229.23:50:29.23#ibcon#end of sib2, iclass 4, count 0 2006.229.23:50:29.23#ibcon#*after write, iclass 4, count 0 2006.229.23:50:29.23#ibcon#*before return 0, iclass 4, count 0 2006.229.23:50:29.23#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:29.23#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:29.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:50:29.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:50:29.23$vck44/va=4,7 2006.229.23:50:29.23#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.23:50:29.23#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.23:50:29.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:29.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:29.29#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:29.29#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:29.29#ibcon#enter wrdev, iclass 6, count 2 2006.229.23:50:29.29#ibcon#first serial, iclass 6, count 2 2006.229.23:50:29.29#ibcon#enter sib2, iclass 6, count 2 2006.229.23:50:29.29#ibcon#flushed, iclass 6, count 2 2006.229.23:50:29.29#ibcon#about to write, iclass 6, count 2 2006.229.23:50:29.29#ibcon#wrote, iclass 6, count 2 2006.229.23:50:29.29#ibcon#about to read 3, iclass 6, count 2 2006.229.23:50:29.31#ibcon#read 3, iclass 6, count 2 2006.229.23:50:29.31#ibcon#about to read 4, iclass 6, count 2 2006.229.23:50:29.31#ibcon#read 4, iclass 6, count 2 2006.229.23:50:29.31#ibcon#about to read 5, iclass 6, count 2 2006.229.23:50:29.31#ibcon#read 5, iclass 6, count 2 2006.229.23:50:29.31#ibcon#about to read 6, iclass 6, count 2 2006.229.23:50:29.31#ibcon#read 6, iclass 6, count 2 2006.229.23:50:29.31#ibcon#end of sib2, iclass 6, count 2 2006.229.23:50:29.31#ibcon#*mode == 0, iclass 6, count 2 2006.229.23:50:29.31#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.23:50:29.31#ibcon#[25=AT04-07\r\n] 2006.229.23:50:29.31#ibcon#*before write, iclass 6, count 2 2006.229.23:50:29.31#ibcon#enter sib2, iclass 6, count 2 2006.229.23:50:29.31#ibcon#flushed, iclass 6, count 2 2006.229.23:50:29.31#ibcon#about to write, iclass 6, count 2 2006.229.23:50:29.31#ibcon#wrote, iclass 6, count 2 2006.229.23:50:29.31#ibcon#about to read 3, iclass 6, count 2 2006.229.23:50:29.34#ibcon#read 3, iclass 6, count 2 2006.229.23:50:29.34#ibcon#about to read 4, iclass 6, count 2 2006.229.23:50:29.34#ibcon#read 4, iclass 6, count 2 2006.229.23:50:29.34#ibcon#about to read 5, iclass 6, count 2 2006.229.23:50:29.34#ibcon#read 5, iclass 6, count 2 2006.229.23:50:29.34#ibcon#about to read 6, iclass 6, count 2 2006.229.23:50:29.34#ibcon#read 6, iclass 6, count 2 2006.229.23:50:29.34#ibcon#end of sib2, iclass 6, count 2 2006.229.23:50:29.34#ibcon#*after write, iclass 6, count 2 2006.229.23:50:29.34#ibcon#*before return 0, iclass 6, count 2 2006.229.23:50:29.34#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:29.34#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:29.34#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.23:50:29.34#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:29.34#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:29.46#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:29.46#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:29.46#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:50:29.46#ibcon#first serial, iclass 6, count 0 2006.229.23:50:29.46#ibcon#enter sib2, iclass 6, count 0 2006.229.23:50:29.46#ibcon#flushed, iclass 6, count 0 2006.229.23:50:29.46#ibcon#about to write, iclass 6, count 0 2006.229.23:50:29.46#ibcon#wrote, iclass 6, count 0 2006.229.23:50:29.46#ibcon#about to read 3, iclass 6, count 0 2006.229.23:50:29.48#ibcon#read 3, iclass 6, count 0 2006.229.23:50:29.48#ibcon#about to read 4, iclass 6, count 0 2006.229.23:50:29.48#ibcon#read 4, iclass 6, count 0 2006.229.23:50:29.48#ibcon#about to read 5, iclass 6, count 0 2006.229.23:50:29.48#ibcon#read 5, iclass 6, count 0 2006.229.23:50:29.48#ibcon#about to read 6, iclass 6, count 0 2006.229.23:50:29.48#ibcon#read 6, iclass 6, count 0 2006.229.23:50:29.48#ibcon#end of sib2, iclass 6, count 0 2006.229.23:50:29.48#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:50:29.48#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:50:29.48#ibcon#[25=USB\r\n] 2006.229.23:50:29.48#ibcon#*before write, iclass 6, count 0 2006.229.23:50:29.48#ibcon#enter sib2, iclass 6, count 0 2006.229.23:50:29.48#ibcon#flushed, iclass 6, count 0 2006.229.23:50:29.48#ibcon#about to write, iclass 6, count 0 2006.229.23:50:29.48#ibcon#wrote, iclass 6, count 0 2006.229.23:50:29.48#ibcon#about to read 3, iclass 6, count 0 2006.229.23:50:29.51#ibcon#read 3, iclass 6, count 0 2006.229.23:50:29.51#ibcon#about to read 4, iclass 6, count 0 2006.229.23:50:29.51#ibcon#read 4, iclass 6, count 0 2006.229.23:50:29.51#ibcon#about to read 5, iclass 6, count 0 2006.229.23:50:29.51#ibcon#read 5, iclass 6, count 0 2006.229.23:50:29.51#ibcon#about to read 6, iclass 6, count 0 2006.229.23:50:29.51#ibcon#read 6, iclass 6, count 0 2006.229.23:50:29.51#ibcon#end of sib2, iclass 6, count 0 2006.229.23:50:29.51#ibcon#*after write, iclass 6, count 0 2006.229.23:50:29.51#ibcon#*before return 0, iclass 6, count 0 2006.229.23:50:29.51#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:29.51#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:29.51#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:50:29.51#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:50:29.51$vck44/valo=5,734.99 2006.229.23:50:29.51#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.23:50:29.51#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.23:50:29.51#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:29.51#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:29.51#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:29.51#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:29.51#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:50:29.51#ibcon#first serial, iclass 10, count 0 2006.229.23:50:29.51#ibcon#enter sib2, iclass 10, count 0 2006.229.23:50:29.51#ibcon#flushed, iclass 10, count 0 2006.229.23:50:29.51#ibcon#about to write, iclass 10, count 0 2006.229.23:50:29.51#ibcon#wrote, iclass 10, count 0 2006.229.23:50:29.51#ibcon#about to read 3, iclass 10, count 0 2006.229.23:50:29.53#ibcon#read 3, iclass 10, count 0 2006.229.23:50:29.53#ibcon#about to read 4, iclass 10, count 0 2006.229.23:50:29.53#ibcon#read 4, iclass 10, count 0 2006.229.23:50:29.53#ibcon#about to read 5, iclass 10, count 0 2006.229.23:50:29.53#ibcon#read 5, iclass 10, count 0 2006.229.23:50:29.53#ibcon#about to read 6, iclass 10, count 0 2006.229.23:50:29.53#ibcon#read 6, iclass 10, count 0 2006.229.23:50:29.53#ibcon#end of sib2, iclass 10, count 0 2006.229.23:50:29.53#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:50:29.53#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:50:29.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.229.23:50:29.53#ibcon#*before write, iclass 10, count 0 2006.229.23:50:29.53#ibcon#enter sib2, iclass 10, count 0 2006.229.23:50:29.53#ibcon#flushed, iclass 10, count 0 2006.229.23:50:29.53#ibcon#about to write, iclass 10, count 0 2006.229.23:50:29.53#ibcon#wrote, iclass 10, count 0 2006.229.23:50:29.53#ibcon#about to read 3, iclass 10, count 0 2006.229.23:50:29.57#ibcon#read 3, iclass 10, count 0 2006.229.23:50:29.57#ibcon#about to read 4, iclass 10, count 0 2006.229.23:50:29.57#ibcon#read 4, iclass 10, count 0 2006.229.23:50:29.57#ibcon#about to read 5, iclass 10, count 0 2006.229.23:50:29.57#ibcon#read 5, iclass 10, count 0 2006.229.23:50:29.57#ibcon#about to read 6, iclass 10, count 0 2006.229.23:50:29.57#ibcon#read 6, iclass 10, count 0 2006.229.23:50:29.57#ibcon#end of sib2, iclass 10, count 0 2006.229.23:50:29.57#ibcon#*after write, iclass 10, count 0 2006.229.23:50:29.57#ibcon#*before return 0, iclass 10, count 0 2006.229.23:50:29.57#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:29.57#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:29.57#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:50:29.57#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:50:29.57$vck44/va=5,4 2006.229.23:50:29.57#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.23:50:29.57#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.23:50:29.57#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:29.57#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:29.63#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:29.63#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:29.63#ibcon#enter wrdev, iclass 12, count 2 2006.229.23:50:29.63#ibcon#first serial, iclass 12, count 2 2006.229.23:50:29.63#ibcon#enter sib2, iclass 12, count 2 2006.229.23:50:29.63#ibcon#flushed, iclass 12, count 2 2006.229.23:50:29.63#ibcon#about to write, iclass 12, count 2 2006.229.23:50:29.63#ibcon#wrote, iclass 12, count 2 2006.229.23:50:29.63#ibcon#about to read 3, iclass 12, count 2 2006.229.23:50:29.65#ibcon#read 3, iclass 12, count 2 2006.229.23:50:29.65#ibcon#about to read 4, iclass 12, count 2 2006.229.23:50:29.65#ibcon#read 4, iclass 12, count 2 2006.229.23:50:29.65#ibcon#about to read 5, iclass 12, count 2 2006.229.23:50:29.65#ibcon#read 5, iclass 12, count 2 2006.229.23:50:29.65#ibcon#about to read 6, iclass 12, count 2 2006.229.23:50:29.65#ibcon#read 6, iclass 12, count 2 2006.229.23:50:29.65#ibcon#end of sib2, iclass 12, count 2 2006.229.23:50:29.65#ibcon#*mode == 0, iclass 12, count 2 2006.229.23:50:29.65#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.23:50:29.65#ibcon#[25=AT05-04\r\n] 2006.229.23:50:29.65#ibcon#*before write, iclass 12, count 2 2006.229.23:50:29.65#ibcon#enter sib2, iclass 12, count 2 2006.229.23:50:29.65#ibcon#flushed, iclass 12, count 2 2006.229.23:50:29.65#ibcon#about to write, iclass 12, count 2 2006.229.23:50:29.65#ibcon#wrote, iclass 12, count 2 2006.229.23:50:29.65#ibcon#about to read 3, iclass 12, count 2 2006.229.23:50:29.68#ibcon#read 3, iclass 12, count 2 2006.229.23:50:29.68#ibcon#about to read 4, iclass 12, count 2 2006.229.23:50:29.68#ibcon#read 4, iclass 12, count 2 2006.229.23:50:29.68#ibcon#about to read 5, iclass 12, count 2 2006.229.23:50:29.68#ibcon#read 5, iclass 12, count 2 2006.229.23:50:29.68#ibcon#about to read 6, iclass 12, count 2 2006.229.23:50:29.68#ibcon#read 6, iclass 12, count 2 2006.229.23:50:29.68#ibcon#end of sib2, iclass 12, count 2 2006.229.23:50:29.68#ibcon#*after write, iclass 12, count 2 2006.229.23:50:29.68#ibcon#*before return 0, iclass 12, count 2 2006.229.23:50:29.68#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:29.68#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:29.68#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.23:50:29.68#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:29.68#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:29.80#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:29.80#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:29.80#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:50:29.80#ibcon#first serial, iclass 12, count 0 2006.229.23:50:29.80#ibcon#enter sib2, iclass 12, count 0 2006.229.23:50:29.80#ibcon#flushed, iclass 12, count 0 2006.229.23:50:29.80#ibcon#about to write, iclass 12, count 0 2006.229.23:50:29.80#ibcon#wrote, iclass 12, count 0 2006.229.23:50:29.80#ibcon#about to read 3, iclass 12, count 0 2006.229.23:50:29.82#ibcon#read 3, iclass 12, count 0 2006.229.23:50:29.82#ibcon#about to read 4, iclass 12, count 0 2006.229.23:50:29.82#ibcon#read 4, iclass 12, count 0 2006.229.23:50:29.82#ibcon#about to read 5, iclass 12, count 0 2006.229.23:50:29.82#ibcon#read 5, iclass 12, count 0 2006.229.23:50:29.82#ibcon#about to read 6, iclass 12, count 0 2006.229.23:50:29.82#ibcon#read 6, iclass 12, count 0 2006.229.23:50:29.82#ibcon#end of sib2, iclass 12, count 0 2006.229.23:50:29.82#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:50:29.82#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:50:29.82#ibcon#[25=USB\r\n] 2006.229.23:50:29.82#ibcon#*before write, iclass 12, count 0 2006.229.23:50:29.82#ibcon#enter sib2, iclass 12, count 0 2006.229.23:50:29.82#ibcon#flushed, iclass 12, count 0 2006.229.23:50:29.82#ibcon#about to write, iclass 12, count 0 2006.229.23:50:29.82#ibcon#wrote, iclass 12, count 0 2006.229.23:50:29.82#ibcon#about to read 3, iclass 12, count 0 2006.229.23:50:29.85#ibcon#read 3, iclass 12, count 0 2006.229.23:50:29.85#ibcon#about to read 4, iclass 12, count 0 2006.229.23:50:29.85#ibcon#read 4, iclass 12, count 0 2006.229.23:50:29.85#ibcon#about to read 5, iclass 12, count 0 2006.229.23:50:29.85#ibcon#read 5, iclass 12, count 0 2006.229.23:50:29.85#ibcon#about to read 6, iclass 12, count 0 2006.229.23:50:29.85#ibcon#read 6, iclass 12, count 0 2006.229.23:50:29.85#ibcon#end of sib2, iclass 12, count 0 2006.229.23:50:29.85#ibcon#*after write, iclass 12, count 0 2006.229.23:50:29.85#ibcon#*before return 0, iclass 12, count 0 2006.229.23:50:29.85#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:29.85#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:29.85#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:50:29.85#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:50:29.85$vck44/valo=6,814.99 2006.229.23:50:29.85#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.23:50:29.85#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.23:50:29.85#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:29.85#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:29.85#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:29.85#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:29.85#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:50:29.85#ibcon#first serial, iclass 14, count 0 2006.229.23:50:29.85#ibcon#enter sib2, iclass 14, count 0 2006.229.23:50:29.85#ibcon#flushed, iclass 14, count 0 2006.229.23:50:29.85#ibcon#about to write, iclass 14, count 0 2006.229.23:50:29.85#ibcon#wrote, iclass 14, count 0 2006.229.23:50:29.85#ibcon#about to read 3, iclass 14, count 0 2006.229.23:50:29.87#ibcon#read 3, iclass 14, count 0 2006.229.23:50:29.87#ibcon#about to read 4, iclass 14, count 0 2006.229.23:50:29.87#ibcon#read 4, iclass 14, count 0 2006.229.23:50:29.87#ibcon#about to read 5, iclass 14, count 0 2006.229.23:50:29.87#ibcon#read 5, iclass 14, count 0 2006.229.23:50:29.87#ibcon#about to read 6, iclass 14, count 0 2006.229.23:50:29.87#ibcon#read 6, iclass 14, count 0 2006.229.23:50:29.87#ibcon#end of sib2, iclass 14, count 0 2006.229.23:50:29.87#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:50:29.87#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:50:29.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.229.23:50:29.87#ibcon#*before write, iclass 14, count 0 2006.229.23:50:29.87#ibcon#enter sib2, iclass 14, count 0 2006.229.23:50:29.87#ibcon#flushed, iclass 14, count 0 2006.229.23:50:29.87#ibcon#about to write, iclass 14, count 0 2006.229.23:50:29.87#ibcon#wrote, iclass 14, count 0 2006.229.23:50:29.87#ibcon#about to read 3, iclass 14, count 0 2006.229.23:50:29.91#ibcon#read 3, iclass 14, count 0 2006.229.23:50:29.91#ibcon#about to read 4, iclass 14, count 0 2006.229.23:50:29.91#ibcon#read 4, iclass 14, count 0 2006.229.23:50:29.91#ibcon#about to read 5, iclass 14, count 0 2006.229.23:50:29.91#ibcon#read 5, iclass 14, count 0 2006.229.23:50:29.91#ibcon#about to read 6, iclass 14, count 0 2006.229.23:50:29.91#ibcon#read 6, iclass 14, count 0 2006.229.23:50:29.91#ibcon#end of sib2, iclass 14, count 0 2006.229.23:50:29.91#ibcon#*after write, iclass 14, count 0 2006.229.23:50:29.91#ibcon#*before return 0, iclass 14, count 0 2006.229.23:50:29.91#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:29.91#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:29.91#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:50:29.91#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:50:29.91$vck44/va=6,4 2006.229.23:50:29.91#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.23:50:29.91#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.23:50:29.91#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:29.91#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:29.97#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:29.97#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:29.97#ibcon#enter wrdev, iclass 16, count 2 2006.229.23:50:29.97#ibcon#first serial, iclass 16, count 2 2006.229.23:50:29.97#ibcon#enter sib2, iclass 16, count 2 2006.229.23:50:29.97#ibcon#flushed, iclass 16, count 2 2006.229.23:50:29.97#ibcon#about to write, iclass 16, count 2 2006.229.23:50:29.97#ibcon#wrote, iclass 16, count 2 2006.229.23:50:29.97#ibcon#about to read 3, iclass 16, count 2 2006.229.23:50:29.99#ibcon#read 3, iclass 16, count 2 2006.229.23:50:29.99#ibcon#about to read 4, iclass 16, count 2 2006.229.23:50:29.99#ibcon#read 4, iclass 16, count 2 2006.229.23:50:29.99#ibcon#about to read 5, iclass 16, count 2 2006.229.23:50:29.99#ibcon#read 5, iclass 16, count 2 2006.229.23:50:29.99#ibcon#about to read 6, iclass 16, count 2 2006.229.23:50:29.99#ibcon#read 6, iclass 16, count 2 2006.229.23:50:29.99#ibcon#end of sib2, iclass 16, count 2 2006.229.23:50:29.99#ibcon#*mode == 0, iclass 16, count 2 2006.229.23:50:29.99#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.23:50:29.99#ibcon#[25=AT06-04\r\n] 2006.229.23:50:29.99#ibcon#*before write, iclass 16, count 2 2006.229.23:50:29.99#ibcon#enter sib2, iclass 16, count 2 2006.229.23:50:29.99#ibcon#flushed, iclass 16, count 2 2006.229.23:50:29.99#ibcon#about to write, iclass 16, count 2 2006.229.23:50:29.99#ibcon#wrote, iclass 16, count 2 2006.229.23:50:29.99#ibcon#about to read 3, iclass 16, count 2 2006.229.23:50:30.02#ibcon#read 3, iclass 16, count 2 2006.229.23:50:30.02#ibcon#about to read 4, iclass 16, count 2 2006.229.23:50:30.02#ibcon#read 4, iclass 16, count 2 2006.229.23:50:30.02#ibcon#about to read 5, iclass 16, count 2 2006.229.23:50:30.02#ibcon#read 5, iclass 16, count 2 2006.229.23:50:30.02#ibcon#about to read 6, iclass 16, count 2 2006.229.23:50:30.02#ibcon#read 6, iclass 16, count 2 2006.229.23:50:30.02#ibcon#end of sib2, iclass 16, count 2 2006.229.23:50:30.02#ibcon#*after write, iclass 16, count 2 2006.229.23:50:30.02#ibcon#*before return 0, iclass 16, count 2 2006.229.23:50:30.02#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:30.02#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:30.02#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.23:50:30.02#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:30.02#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:30.14#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:30.14#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:30.14#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:50:30.14#ibcon#first serial, iclass 16, count 0 2006.229.23:50:30.14#ibcon#enter sib2, iclass 16, count 0 2006.229.23:50:30.14#ibcon#flushed, iclass 16, count 0 2006.229.23:50:30.14#ibcon#about to write, iclass 16, count 0 2006.229.23:50:30.14#ibcon#wrote, iclass 16, count 0 2006.229.23:50:30.14#ibcon#about to read 3, iclass 16, count 0 2006.229.23:50:30.16#ibcon#read 3, iclass 16, count 0 2006.229.23:50:30.16#ibcon#about to read 4, iclass 16, count 0 2006.229.23:50:30.16#ibcon#read 4, iclass 16, count 0 2006.229.23:50:30.16#ibcon#about to read 5, iclass 16, count 0 2006.229.23:50:30.16#ibcon#read 5, iclass 16, count 0 2006.229.23:50:30.16#ibcon#about to read 6, iclass 16, count 0 2006.229.23:50:30.16#ibcon#read 6, iclass 16, count 0 2006.229.23:50:30.16#ibcon#end of sib2, iclass 16, count 0 2006.229.23:50:30.16#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:50:30.16#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:50:30.16#ibcon#[25=USB\r\n] 2006.229.23:50:30.16#ibcon#*before write, iclass 16, count 0 2006.229.23:50:30.16#ibcon#enter sib2, iclass 16, count 0 2006.229.23:50:30.16#ibcon#flushed, iclass 16, count 0 2006.229.23:50:30.16#ibcon#about to write, iclass 16, count 0 2006.229.23:50:30.16#ibcon#wrote, iclass 16, count 0 2006.229.23:50:30.16#ibcon#about to read 3, iclass 16, count 0 2006.229.23:50:30.19#ibcon#read 3, iclass 16, count 0 2006.229.23:50:30.19#ibcon#about to read 4, iclass 16, count 0 2006.229.23:50:30.19#ibcon#read 4, iclass 16, count 0 2006.229.23:50:30.19#ibcon#about to read 5, iclass 16, count 0 2006.229.23:50:30.19#ibcon#read 5, iclass 16, count 0 2006.229.23:50:30.19#ibcon#about to read 6, iclass 16, count 0 2006.229.23:50:30.19#ibcon#read 6, iclass 16, count 0 2006.229.23:50:30.19#ibcon#end of sib2, iclass 16, count 0 2006.229.23:50:30.19#ibcon#*after write, iclass 16, count 0 2006.229.23:50:30.19#ibcon#*before return 0, iclass 16, count 0 2006.229.23:50:30.19#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:30.19#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:30.19#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:50:30.19#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:50:30.19$vck44/valo=7,864.99 2006.229.23:50:30.19#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.23:50:30.19#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.23:50:30.19#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:30.19#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:30.19#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:30.19#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:30.19#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:50:30.19#ibcon#first serial, iclass 18, count 0 2006.229.23:50:30.19#ibcon#enter sib2, iclass 18, count 0 2006.229.23:50:30.19#ibcon#flushed, iclass 18, count 0 2006.229.23:50:30.19#ibcon#about to write, iclass 18, count 0 2006.229.23:50:30.19#ibcon#wrote, iclass 18, count 0 2006.229.23:50:30.19#ibcon#about to read 3, iclass 18, count 0 2006.229.23:50:30.21#ibcon#read 3, iclass 18, count 0 2006.229.23:50:30.21#ibcon#about to read 4, iclass 18, count 0 2006.229.23:50:30.21#ibcon#read 4, iclass 18, count 0 2006.229.23:50:30.21#ibcon#about to read 5, iclass 18, count 0 2006.229.23:50:30.21#ibcon#read 5, iclass 18, count 0 2006.229.23:50:30.21#ibcon#about to read 6, iclass 18, count 0 2006.229.23:50:30.21#ibcon#read 6, iclass 18, count 0 2006.229.23:50:30.21#ibcon#end of sib2, iclass 18, count 0 2006.229.23:50:30.21#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:50:30.21#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:50:30.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.229.23:50:30.21#ibcon#*before write, iclass 18, count 0 2006.229.23:50:30.21#ibcon#enter sib2, iclass 18, count 0 2006.229.23:50:30.21#ibcon#flushed, iclass 18, count 0 2006.229.23:50:30.21#ibcon#about to write, iclass 18, count 0 2006.229.23:50:30.21#ibcon#wrote, iclass 18, count 0 2006.229.23:50:30.21#ibcon#about to read 3, iclass 18, count 0 2006.229.23:50:30.25#ibcon#read 3, iclass 18, count 0 2006.229.23:50:30.25#ibcon#about to read 4, iclass 18, count 0 2006.229.23:50:30.25#ibcon#read 4, iclass 18, count 0 2006.229.23:50:30.25#ibcon#about to read 5, iclass 18, count 0 2006.229.23:50:30.25#ibcon#read 5, iclass 18, count 0 2006.229.23:50:30.25#ibcon#about to read 6, iclass 18, count 0 2006.229.23:50:30.25#ibcon#read 6, iclass 18, count 0 2006.229.23:50:30.25#ibcon#end of sib2, iclass 18, count 0 2006.229.23:50:30.25#ibcon#*after write, iclass 18, count 0 2006.229.23:50:30.25#ibcon#*before return 0, iclass 18, count 0 2006.229.23:50:30.25#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:30.25#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:30.25#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:50:30.25#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:50:30.25$vck44/va=7,5 2006.229.23:50:30.25#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.23:50:30.25#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.23:50:30.25#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:30.25#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:30.31#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:30.31#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:30.31#ibcon#enter wrdev, iclass 20, count 2 2006.229.23:50:30.31#ibcon#first serial, iclass 20, count 2 2006.229.23:50:30.31#ibcon#enter sib2, iclass 20, count 2 2006.229.23:50:30.31#ibcon#flushed, iclass 20, count 2 2006.229.23:50:30.31#ibcon#about to write, iclass 20, count 2 2006.229.23:50:30.31#ibcon#wrote, iclass 20, count 2 2006.229.23:50:30.31#ibcon#about to read 3, iclass 20, count 2 2006.229.23:50:30.33#ibcon#read 3, iclass 20, count 2 2006.229.23:50:30.33#ibcon#about to read 4, iclass 20, count 2 2006.229.23:50:30.33#ibcon#read 4, iclass 20, count 2 2006.229.23:50:30.33#ibcon#about to read 5, iclass 20, count 2 2006.229.23:50:30.33#ibcon#read 5, iclass 20, count 2 2006.229.23:50:30.33#ibcon#about to read 6, iclass 20, count 2 2006.229.23:50:30.33#ibcon#read 6, iclass 20, count 2 2006.229.23:50:30.33#ibcon#end of sib2, iclass 20, count 2 2006.229.23:50:30.33#ibcon#*mode == 0, iclass 20, count 2 2006.229.23:50:30.33#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.23:50:30.33#ibcon#[25=AT07-05\r\n] 2006.229.23:50:30.33#ibcon#*before write, iclass 20, count 2 2006.229.23:50:30.33#ibcon#enter sib2, iclass 20, count 2 2006.229.23:50:30.33#ibcon#flushed, iclass 20, count 2 2006.229.23:50:30.33#ibcon#about to write, iclass 20, count 2 2006.229.23:50:30.33#ibcon#wrote, iclass 20, count 2 2006.229.23:50:30.33#ibcon#about to read 3, iclass 20, count 2 2006.229.23:50:30.36#ibcon#read 3, iclass 20, count 2 2006.229.23:50:30.36#ibcon#about to read 4, iclass 20, count 2 2006.229.23:50:30.36#ibcon#read 4, iclass 20, count 2 2006.229.23:50:30.36#ibcon#about to read 5, iclass 20, count 2 2006.229.23:50:30.36#ibcon#read 5, iclass 20, count 2 2006.229.23:50:30.36#ibcon#about to read 6, iclass 20, count 2 2006.229.23:50:30.36#ibcon#read 6, iclass 20, count 2 2006.229.23:50:30.36#ibcon#end of sib2, iclass 20, count 2 2006.229.23:50:30.36#ibcon#*after write, iclass 20, count 2 2006.229.23:50:30.36#ibcon#*before return 0, iclass 20, count 2 2006.229.23:50:30.36#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:30.36#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:30.36#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.23:50:30.36#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:30.36#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:30.48#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:30.48#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:30.48#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:50:30.48#ibcon#first serial, iclass 20, count 0 2006.229.23:50:30.48#ibcon#enter sib2, iclass 20, count 0 2006.229.23:50:30.48#ibcon#flushed, iclass 20, count 0 2006.229.23:50:30.48#ibcon#about to write, iclass 20, count 0 2006.229.23:50:30.48#ibcon#wrote, iclass 20, count 0 2006.229.23:50:30.48#ibcon#about to read 3, iclass 20, count 0 2006.229.23:50:30.50#ibcon#read 3, iclass 20, count 0 2006.229.23:50:30.50#ibcon#about to read 4, iclass 20, count 0 2006.229.23:50:30.50#ibcon#read 4, iclass 20, count 0 2006.229.23:50:30.50#ibcon#about to read 5, iclass 20, count 0 2006.229.23:50:30.50#ibcon#read 5, iclass 20, count 0 2006.229.23:50:30.50#ibcon#about to read 6, iclass 20, count 0 2006.229.23:50:30.50#ibcon#read 6, iclass 20, count 0 2006.229.23:50:30.50#ibcon#end of sib2, iclass 20, count 0 2006.229.23:50:30.50#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:50:30.50#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:50:30.50#ibcon#[25=USB\r\n] 2006.229.23:50:30.50#ibcon#*before write, iclass 20, count 0 2006.229.23:50:30.50#ibcon#enter sib2, iclass 20, count 0 2006.229.23:50:30.50#ibcon#flushed, iclass 20, count 0 2006.229.23:50:30.50#ibcon#about to write, iclass 20, count 0 2006.229.23:50:30.50#ibcon#wrote, iclass 20, count 0 2006.229.23:50:30.50#ibcon#about to read 3, iclass 20, count 0 2006.229.23:50:30.53#ibcon#read 3, iclass 20, count 0 2006.229.23:50:30.53#ibcon#about to read 4, iclass 20, count 0 2006.229.23:50:30.53#ibcon#read 4, iclass 20, count 0 2006.229.23:50:30.53#ibcon#about to read 5, iclass 20, count 0 2006.229.23:50:30.53#ibcon#read 5, iclass 20, count 0 2006.229.23:50:30.53#ibcon#about to read 6, iclass 20, count 0 2006.229.23:50:30.53#ibcon#read 6, iclass 20, count 0 2006.229.23:50:30.53#ibcon#end of sib2, iclass 20, count 0 2006.229.23:50:30.53#ibcon#*after write, iclass 20, count 0 2006.229.23:50:30.53#ibcon#*before return 0, iclass 20, count 0 2006.229.23:50:30.53#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:30.53#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:30.53#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:50:30.53#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:50:30.53$vck44/valo=8,884.99 2006.229.23:50:30.53#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.23:50:30.53#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.23:50:30.53#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:30.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:30.53#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:30.53#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:30.53#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:50:30.53#ibcon#first serial, iclass 22, count 0 2006.229.23:50:30.53#ibcon#enter sib2, iclass 22, count 0 2006.229.23:50:30.53#ibcon#flushed, iclass 22, count 0 2006.229.23:50:30.53#ibcon#about to write, iclass 22, count 0 2006.229.23:50:30.53#ibcon#wrote, iclass 22, count 0 2006.229.23:50:30.53#ibcon#about to read 3, iclass 22, count 0 2006.229.23:50:30.55#ibcon#read 3, iclass 22, count 0 2006.229.23:50:30.55#ibcon#about to read 4, iclass 22, count 0 2006.229.23:50:30.55#ibcon#read 4, iclass 22, count 0 2006.229.23:50:30.55#ibcon#about to read 5, iclass 22, count 0 2006.229.23:50:30.55#ibcon#read 5, iclass 22, count 0 2006.229.23:50:30.55#ibcon#about to read 6, iclass 22, count 0 2006.229.23:50:30.55#ibcon#read 6, iclass 22, count 0 2006.229.23:50:30.55#ibcon#end of sib2, iclass 22, count 0 2006.229.23:50:30.55#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:50:30.55#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:50:30.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.229.23:50:30.55#ibcon#*before write, iclass 22, count 0 2006.229.23:50:30.55#ibcon#enter sib2, iclass 22, count 0 2006.229.23:50:30.55#ibcon#flushed, iclass 22, count 0 2006.229.23:50:30.55#ibcon#about to write, iclass 22, count 0 2006.229.23:50:30.55#ibcon#wrote, iclass 22, count 0 2006.229.23:50:30.55#ibcon#about to read 3, iclass 22, count 0 2006.229.23:50:30.59#ibcon#read 3, iclass 22, count 0 2006.229.23:50:30.59#ibcon#about to read 4, iclass 22, count 0 2006.229.23:50:30.59#ibcon#read 4, iclass 22, count 0 2006.229.23:50:30.59#ibcon#about to read 5, iclass 22, count 0 2006.229.23:50:30.59#ibcon#read 5, iclass 22, count 0 2006.229.23:50:30.59#ibcon#about to read 6, iclass 22, count 0 2006.229.23:50:30.59#ibcon#read 6, iclass 22, count 0 2006.229.23:50:30.59#ibcon#end of sib2, iclass 22, count 0 2006.229.23:50:30.59#ibcon#*after write, iclass 22, count 0 2006.229.23:50:30.59#ibcon#*before return 0, iclass 22, count 0 2006.229.23:50:30.59#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:30.59#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:30.59#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:50:30.59#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:50:30.59$vck44/va=8,6 2006.229.23:50:30.59#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.229.23:50:30.59#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.229.23:50:30.59#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:30.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:50:30.65#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:50:30.65#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:50:30.65#ibcon#enter wrdev, iclass 24, count 2 2006.229.23:50:30.65#ibcon#first serial, iclass 24, count 2 2006.229.23:50:30.65#ibcon#enter sib2, iclass 24, count 2 2006.229.23:50:30.65#ibcon#flushed, iclass 24, count 2 2006.229.23:50:30.65#ibcon#about to write, iclass 24, count 2 2006.229.23:50:30.65#ibcon#wrote, iclass 24, count 2 2006.229.23:50:30.65#ibcon#about to read 3, iclass 24, count 2 2006.229.23:50:30.67#ibcon#read 3, iclass 24, count 2 2006.229.23:50:30.67#ibcon#about to read 4, iclass 24, count 2 2006.229.23:50:30.67#ibcon#read 4, iclass 24, count 2 2006.229.23:50:30.67#ibcon#about to read 5, iclass 24, count 2 2006.229.23:50:30.67#ibcon#read 5, iclass 24, count 2 2006.229.23:50:30.67#ibcon#about to read 6, iclass 24, count 2 2006.229.23:50:30.67#ibcon#read 6, iclass 24, count 2 2006.229.23:50:30.67#ibcon#end of sib2, iclass 24, count 2 2006.229.23:50:30.67#ibcon#*mode == 0, iclass 24, count 2 2006.229.23:50:30.67#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.229.23:50:30.67#ibcon#[25=AT08-06\r\n] 2006.229.23:50:30.67#ibcon#*before write, iclass 24, count 2 2006.229.23:50:30.67#ibcon#enter sib2, iclass 24, count 2 2006.229.23:50:30.67#ibcon#flushed, iclass 24, count 2 2006.229.23:50:30.67#ibcon#about to write, iclass 24, count 2 2006.229.23:50:30.67#ibcon#wrote, iclass 24, count 2 2006.229.23:50:30.67#ibcon#about to read 3, iclass 24, count 2 2006.229.23:50:30.70#ibcon#read 3, iclass 24, count 2 2006.229.23:50:30.70#ibcon#about to read 4, iclass 24, count 2 2006.229.23:50:30.70#ibcon#read 4, iclass 24, count 2 2006.229.23:50:30.70#ibcon#about to read 5, iclass 24, count 2 2006.229.23:50:30.70#ibcon#read 5, iclass 24, count 2 2006.229.23:50:30.70#ibcon#about to read 6, iclass 24, count 2 2006.229.23:50:30.70#ibcon#read 6, iclass 24, count 2 2006.229.23:50:30.70#ibcon#end of sib2, iclass 24, count 2 2006.229.23:50:30.70#ibcon#*after write, iclass 24, count 2 2006.229.23:50:30.70#ibcon#*before return 0, iclass 24, count 2 2006.229.23:50:30.70#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:50:30.70#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.229.23:50:30.70#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.229.23:50:30.70#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:30.70#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:50:30.82#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:50:30.82#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:50:30.82#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:50:30.82#ibcon#first serial, iclass 24, count 0 2006.229.23:50:30.82#ibcon#enter sib2, iclass 24, count 0 2006.229.23:50:30.82#ibcon#flushed, iclass 24, count 0 2006.229.23:50:30.82#ibcon#about to write, iclass 24, count 0 2006.229.23:50:30.82#ibcon#wrote, iclass 24, count 0 2006.229.23:50:30.82#ibcon#about to read 3, iclass 24, count 0 2006.229.23:50:30.84#ibcon#read 3, iclass 24, count 0 2006.229.23:50:30.84#ibcon#about to read 4, iclass 24, count 0 2006.229.23:50:30.84#ibcon#read 4, iclass 24, count 0 2006.229.23:50:30.84#ibcon#about to read 5, iclass 24, count 0 2006.229.23:50:30.84#ibcon#read 5, iclass 24, count 0 2006.229.23:50:30.84#ibcon#about to read 6, iclass 24, count 0 2006.229.23:50:30.84#ibcon#read 6, iclass 24, count 0 2006.229.23:50:30.84#ibcon#end of sib2, iclass 24, count 0 2006.229.23:50:30.84#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:50:30.84#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:50:30.84#ibcon#[25=USB\r\n] 2006.229.23:50:30.84#ibcon#*before write, iclass 24, count 0 2006.229.23:50:30.84#ibcon#enter sib2, iclass 24, count 0 2006.229.23:50:30.84#ibcon#flushed, iclass 24, count 0 2006.229.23:50:30.84#ibcon#about to write, iclass 24, count 0 2006.229.23:50:30.84#ibcon#wrote, iclass 24, count 0 2006.229.23:50:30.84#ibcon#about to read 3, iclass 24, count 0 2006.229.23:50:30.87#ibcon#read 3, iclass 24, count 0 2006.229.23:50:30.87#ibcon#about to read 4, iclass 24, count 0 2006.229.23:50:30.87#ibcon#read 4, iclass 24, count 0 2006.229.23:50:30.87#ibcon#about to read 5, iclass 24, count 0 2006.229.23:50:30.87#ibcon#read 5, iclass 24, count 0 2006.229.23:50:30.87#ibcon#about to read 6, iclass 24, count 0 2006.229.23:50:30.87#ibcon#read 6, iclass 24, count 0 2006.229.23:50:30.87#ibcon#end of sib2, iclass 24, count 0 2006.229.23:50:30.87#ibcon#*after write, iclass 24, count 0 2006.229.23:50:30.87#ibcon#*before return 0, iclass 24, count 0 2006.229.23:50:30.87#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:50:30.87#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.229.23:50:30.87#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:50:30.87#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:50:30.87$vck44/vblo=1,629.99 2006.229.23:50:30.87#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.229.23:50:30.87#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.229.23:50:30.87#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:30.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:50:30.87#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:50:30.87#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:50:30.87#ibcon#enter wrdev, iclass 26, count 0 2006.229.23:50:30.87#ibcon#first serial, iclass 26, count 0 2006.229.23:50:30.87#ibcon#enter sib2, iclass 26, count 0 2006.229.23:50:30.87#ibcon#flushed, iclass 26, count 0 2006.229.23:50:30.87#ibcon#about to write, iclass 26, count 0 2006.229.23:50:30.87#ibcon#wrote, iclass 26, count 0 2006.229.23:50:30.87#ibcon#about to read 3, iclass 26, count 0 2006.229.23:50:30.89#ibcon#read 3, iclass 26, count 0 2006.229.23:50:30.89#ibcon#about to read 4, iclass 26, count 0 2006.229.23:50:30.89#ibcon#read 4, iclass 26, count 0 2006.229.23:50:30.89#ibcon#about to read 5, iclass 26, count 0 2006.229.23:50:30.89#ibcon#read 5, iclass 26, count 0 2006.229.23:50:30.89#ibcon#about to read 6, iclass 26, count 0 2006.229.23:50:30.89#ibcon#read 6, iclass 26, count 0 2006.229.23:50:30.89#ibcon#end of sib2, iclass 26, count 0 2006.229.23:50:30.89#ibcon#*mode == 0, iclass 26, count 0 2006.229.23:50:30.89#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.229.23:50:30.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.229.23:50:30.89#ibcon#*before write, iclass 26, count 0 2006.229.23:50:30.89#ibcon#enter sib2, iclass 26, count 0 2006.229.23:50:30.89#ibcon#flushed, iclass 26, count 0 2006.229.23:50:30.89#ibcon#about to write, iclass 26, count 0 2006.229.23:50:30.89#ibcon#wrote, iclass 26, count 0 2006.229.23:50:30.89#ibcon#about to read 3, iclass 26, count 0 2006.229.23:50:30.93#ibcon#read 3, iclass 26, count 0 2006.229.23:50:30.93#ibcon#about to read 4, iclass 26, count 0 2006.229.23:50:30.93#ibcon#read 4, iclass 26, count 0 2006.229.23:50:30.93#ibcon#about to read 5, iclass 26, count 0 2006.229.23:50:30.93#ibcon#read 5, iclass 26, count 0 2006.229.23:50:30.93#ibcon#about to read 6, iclass 26, count 0 2006.229.23:50:30.93#ibcon#read 6, iclass 26, count 0 2006.229.23:50:30.93#ibcon#end of sib2, iclass 26, count 0 2006.229.23:50:30.93#ibcon#*after write, iclass 26, count 0 2006.229.23:50:30.93#ibcon#*before return 0, iclass 26, count 0 2006.229.23:50:30.93#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:50:30.93#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.229.23:50:30.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.229.23:50:30.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.229.23:50:30.93$vck44/vb=1,4 2006.229.23:50:30.93#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.229.23:50:30.93#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.229.23:50:30.93#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:30.93#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:50:30.93#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:50:30.93#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:50:30.93#ibcon#enter wrdev, iclass 28, count 2 2006.229.23:50:30.93#ibcon#first serial, iclass 28, count 2 2006.229.23:50:30.93#ibcon#enter sib2, iclass 28, count 2 2006.229.23:50:30.93#ibcon#flushed, iclass 28, count 2 2006.229.23:50:30.93#ibcon#about to write, iclass 28, count 2 2006.229.23:50:30.93#ibcon#wrote, iclass 28, count 2 2006.229.23:50:30.93#ibcon#about to read 3, iclass 28, count 2 2006.229.23:50:30.95#ibcon#read 3, iclass 28, count 2 2006.229.23:50:30.95#ibcon#about to read 4, iclass 28, count 2 2006.229.23:50:30.95#ibcon#read 4, iclass 28, count 2 2006.229.23:50:30.95#ibcon#about to read 5, iclass 28, count 2 2006.229.23:50:30.95#ibcon#read 5, iclass 28, count 2 2006.229.23:50:30.95#ibcon#about to read 6, iclass 28, count 2 2006.229.23:50:30.95#ibcon#read 6, iclass 28, count 2 2006.229.23:50:30.95#ibcon#end of sib2, iclass 28, count 2 2006.229.23:50:30.95#ibcon#*mode == 0, iclass 28, count 2 2006.229.23:50:30.95#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.229.23:50:30.95#ibcon#[27=AT01-04\r\n] 2006.229.23:50:30.95#ibcon#*before write, iclass 28, count 2 2006.229.23:50:30.95#ibcon#enter sib2, iclass 28, count 2 2006.229.23:50:30.95#ibcon#flushed, iclass 28, count 2 2006.229.23:50:30.95#ibcon#about to write, iclass 28, count 2 2006.229.23:50:30.95#ibcon#wrote, iclass 28, count 2 2006.229.23:50:30.95#ibcon#about to read 3, iclass 28, count 2 2006.229.23:50:30.98#ibcon#read 3, iclass 28, count 2 2006.229.23:50:30.98#ibcon#about to read 4, iclass 28, count 2 2006.229.23:50:30.98#ibcon#read 4, iclass 28, count 2 2006.229.23:50:30.98#ibcon#about to read 5, iclass 28, count 2 2006.229.23:50:30.98#ibcon#read 5, iclass 28, count 2 2006.229.23:50:30.98#ibcon#about to read 6, iclass 28, count 2 2006.229.23:50:30.98#ibcon#read 6, iclass 28, count 2 2006.229.23:50:30.98#ibcon#end of sib2, iclass 28, count 2 2006.229.23:50:30.98#ibcon#*after write, iclass 28, count 2 2006.229.23:50:30.98#ibcon#*before return 0, iclass 28, count 2 2006.229.23:50:30.98#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:50:30.98#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.229.23:50:30.98#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.229.23:50:30.98#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:30.98#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:50:31.10#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:50:31.10#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:50:31.10#ibcon#enter wrdev, iclass 28, count 0 2006.229.23:50:31.10#ibcon#first serial, iclass 28, count 0 2006.229.23:50:31.10#ibcon#enter sib2, iclass 28, count 0 2006.229.23:50:31.10#ibcon#flushed, iclass 28, count 0 2006.229.23:50:31.10#ibcon#about to write, iclass 28, count 0 2006.229.23:50:31.10#ibcon#wrote, iclass 28, count 0 2006.229.23:50:31.10#ibcon#about to read 3, iclass 28, count 0 2006.229.23:50:31.12#ibcon#read 3, iclass 28, count 0 2006.229.23:50:31.12#ibcon#about to read 4, iclass 28, count 0 2006.229.23:50:31.12#ibcon#read 4, iclass 28, count 0 2006.229.23:50:31.12#ibcon#about to read 5, iclass 28, count 0 2006.229.23:50:31.12#ibcon#read 5, iclass 28, count 0 2006.229.23:50:31.12#ibcon#about to read 6, iclass 28, count 0 2006.229.23:50:31.12#ibcon#read 6, iclass 28, count 0 2006.229.23:50:31.12#ibcon#end of sib2, iclass 28, count 0 2006.229.23:50:31.12#ibcon#*mode == 0, iclass 28, count 0 2006.229.23:50:31.12#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.229.23:50:31.12#ibcon#[27=USB\r\n] 2006.229.23:50:31.12#ibcon#*before write, iclass 28, count 0 2006.229.23:50:31.12#ibcon#enter sib2, iclass 28, count 0 2006.229.23:50:31.12#ibcon#flushed, iclass 28, count 0 2006.229.23:50:31.12#ibcon#about to write, iclass 28, count 0 2006.229.23:50:31.12#ibcon#wrote, iclass 28, count 0 2006.229.23:50:31.12#ibcon#about to read 3, iclass 28, count 0 2006.229.23:50:31.15#ibcon#read 3, iclass 28, count 0 2006.229.23:50:31.15#ibcon#about to read 4, iclass 28, count 0 2006.229.23:50:31.15#ibcon#read 4, iclass 28, count 0 2006.229.23:50:31.15#ibcon#about to read 5, iclass 28, count 0 2006.229.23:50:31.15#ibcon#read 5, iclass 28, count 0 2006.229.23:50:31.15#ibcon#about to read 6, iclass 28, count 0 2006.229.23:50:31.15#ibcon#read 6, iclass 28, count 0 2006.229.23:50:31.15#ibcon#end of sib2, iclass 28, count 0 2006.229.23:50:31.15#ibcon#*after write, iclass 28, count 0 2006.229.23:50:31.15#ibcon#*before return 0, iclass 28, count 0 2006.229.23:50:31.15#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:50:31.15#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.229.23:50:31.15#ibcon#about to clear, iclass 28 cls_cnt 0 2006.229.23:50:31.15#ibcon#cleared, iclass 28 cls_cnt 0 2006.229.23:50:31.15$vck44/vblo=2,634.99 2006.229.23:50:31.15#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.229.23:50:31.15#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.229.23:50:31.15#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:31.15#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:50:31.15#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:50:31.15#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:50:31.15#ibcon#enter wrdev, iclass 30, count 0 2006.229.23:50:31.15#ibcon#first serial, iclass 30, count 0 2006.229.23:50:31.15#ibcon#enter sib2, iclass 30, count 0 2006.229.23:50:31.15#ibcon#flushed, iclass 30, count 0 2006.229.23:50:31.15#ibcon#about to write, iclass 30, count 0 2006.229.23:50:31.15#ibcon#wrote, iclass 30, count 0 2006.229.23:50:31.15#ibcon#about to read 3, iclass 30, count 0 2006.229.23:50:31.17#ibcon#read 3, iclass 30, count 0 2006.229.23:50:31.17#ibcon#about to read 4, iclass 30, count 0 2006.229.23:50:31.17#ibcon#read 4, iclass 30, count 0 2006.229.23:50:31.17#ibcon#about to read 5, iclass 30, count 0 2006.229.23:50:31.17#ibcon#read 5, iclass 30, count 0 2006.229.23:50:31.17#ibcon#about to read 6, iclass 30, count 0 2006.229.23:50:31.17#ibcon#read 6, iclass 30, count 0 2006.229.23:50:31.17#ibcon#end of sib2, iclass 30, count 0 2006.229.23:50:31.17#ibcon#*mode == 0, iclass 30, count 0 2006.229.23:50:31.17#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.229.23:50:31.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.229.23:50:31.17#ibcon#*before write, iclass 30, count 0 2006.229.23:50:31.17#ibcon#enter sib2, iclass 30, count 0 2006.229.23:50:31.17#ibcon#flushed, iclass 30, count 0 2006.229.23:50:31.17#ibcon#about to write, iclass 30, count 0 2006.229.23:50:31.17#ibcon#wrote, iclass 30, count 0 2006.229.23:50:31.17#ibcon#about to read 3, iclass 30, count 0 2006.229.23:50:31.21#ibcon#read 3, iclass 30, count 0 2006.229.23:50:31.21#ibcon#about to read 4, iclass 30, count 0 2006.229.23:50:31.21#ibcon#read 4, iclass 30, count 0 2006.229.23:50:31.21#ibcon#about to read 5, iclass 30, count 0 2006.229.23:50:31.21#ibcon#read 5, iclass 30, count 0 2006.229.23:50:31.21#ibcon#about to read 6, iclass 30, count 0 2006.229.23:50:31.21#ibcon#read 6, iclass 30, count 0 2006.229.23:50:31.21#ibcon#end of sib2, iclass 30, count 0 2006.229.23:50:31.21#ibcon#*after write, iclass 30, count 0 2006.229.23:50:31.21#ibcon#*before return 0, iclass 30, count 0 2006.229.23:50:31.21#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:50:31.21#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.229.23:50:31.21#ibcon#about to clear, iclass 30 cls_cnt 0 2006.229.23:50:31.21#ibcon#cleared, iclass 30 cls_cnt 0 2006.229.23:50:31.21$vck44/vb=2,4 2006.229.23:50:31.21#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.229.23:50:31.21#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.229.23:50:31.21#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:31.21#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:31.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:31.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:31.27#ibcon#enter wrdev, iclass 32, count 2 2006.229.23:50:31.27#ibcon#first serial, iclass 32, count 2 2006.229.23:50:31.27#ibcon#enter sib2, iclass 32, count 2 2006.229.23:50:31.27#ibcon#flushed, iclass 32, count 2 2006.229.23:50:31.27#ibcon#about to write, iclass 32, count 2 2006.229.23:50:31.27#ibcon#wrote, iclass 32, count 2 2006.229.23:50:31.27#ibcon#about to read 3, iclass 32, count 2 2006.229.23:50:31.29#ibcon#read 3, iclass 32, count 2 2006.229.23:50:31.29#ibcon#about to read 4, iclass 32, count 2 2006.229.23:50:31.29#ibcon#read 4, iclass 32, count 2 2006.229.23:50:31.29#ibcon#about to read 5, iclass 32, count 2 2006.229.23:50:31.29#ibcon#read 5, iclass 32, count 2 2006.229.23:50:31.29#ibcon#about to read 6, iclass 32, count 2 2006.229.23:50:31.29#ibcon#read 6, iclass 32, count 2 2006.229.23:50:31.29#ibcon#end of sib2, iclass 32, count 2 2006.229.23:50:31.29#ibcon#*mode == 0, iclass 32, count 2 2006.229.23:50:31.29#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.229.23:50:31.29#ibcon#[27=AT02-04\r\n] 2006.229.23:50:31.29#ibcon#*before write, iclass 32, count 2 2006.229.23:50:31.29#ibcon#enter sib2, iclass 32, count 2 2006.229.23:50:31.29#ibcon#flushed, iclass 32, count 2 2006.229.23:50:31.29#ibcon#about to write, iclass 32, count 2 2006.229.23:50:31.29#ibcon#wrote, iclass 32, count 2 2006.229.23:50:31.29#ibcon#about to read 3, iclass 32, count 2 2006.229.23:50:31.32#ibcon#read 3, iclass 32, count 2 2006.229.23:50:31.32#ibcon#about to read 4, iclass 32, count 2 2006.229.23:50:31.32#ibcon#read 4, iclass 32, count 2 2006.229.23:50:31.32#ibcon#about to read 5, iclass 32, count 2 2006.229.23:50:31.32#ibcon#read 5, iclass 32, count 2 2006.229.23:50:31.32#ibcon#about to read 6, iclass 32, count 2 2006.229.23:50:31.32#ibcon#read 6, iclass 32, count 2 2006.229.23:50:31.32#ibcon#end of sib2, iclass 32, count 2 2006.229.23:50:31.32#ibcon#*after write, iclass 32, count 2 2006.229.23:50:31.32#ibcon#*before return 0, iclass 32, count 2 2006.229.23:50:31.32#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:31.32#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.229.23:50:31.32#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.229.23:50:31.32#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:31.32#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:31.44#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:31.44#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:31.44#ibcon#enter wrdev, iclass 32, count 0 2006.229.23:50:31.44#ibcon#first serial, iclass 32, count 0 2006.229.23:50:31.44#ibcon#enter sib2, iclass 32, count 0 2006.229.23:50:31.44#ibcon#flushed, iclass 32, count 0 2006.229.23:50:31.44#ibcon#about to write, iclass 32, count 0 2006.229.23:50:31.44#ibcon#wrote, iclass 32, count 0 2006.229.23:50:31.44#ibcon#about to read 3, iclass 32, count 0 2006.229.23:50:31.46#ibcon#read 3, iclass 32, count 0 2006.229.23:50:31.46#ibcon#about to read 4, iclass 32, count 0 2006.229.23:50:31.46#ibcon#read 4, iclass 32, count 0 2006.229.23:50:31.46#ibcon#about to read 5, iclass 32, count 0 2006.229.23:50:31.46#ibcon#read 5, iclass 32, count 0 2006.229.23:50:31.46#ibcon#about to read 6, iclass 32, count 0 2006.229.23:50:31.46#ibcon#read 6, iclass 32, count 0 2006.229.23:50:31.46#ibcon#end of sib2, iclass 32, count 0 2006.229.23:50:31.46#ibcon#*mode == 0, iclass 32, count 0 2006.229.23:50:31.46#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.229.23:50:31.46#ibcon#[27=USB\r\n] 2006.229.23:50:31.46#ibcon#*before write, iclass 32, count 0 2006.229.23:50:31.46#ibcon#enter sib2, iclass 32, count 0 2006.229.23:50:31.46#ibcon#flushed, iclass 32, count 0 2006.229.23:50:31.46#ibcon#about to write, iclass 32, count 0 2006.229.23:50:31.46#ibcon#wrote, iclass 32, count 0 2006.229.23:50:31.46#ibcon#about to read 3, iclass 32, count 0 2006.229.23:50:31.49#ibcon#read 3, iclass 32, count 0 2006.229.23:50:31.49#ibcon#about to read 4, iclass 32, count 0 2006.229.23:50:31.49#ibcon#read 4, iclass 32, count 0 2006.229.23:50:31.49#ibcon#about to read 5, iclass 32, count 0 2006.229.23:50:31.49#ibcon#read 5, iclass 32, count 0 2006.229.23:50:31.49#ibcon#about to read 6, iclass 32, count 0 2006.229.23:50:31.49#ibcon#read 6, iclass 32, count 0 2006.229.23:50:31.49#ibcon#end of sib2, iclass 32, count 0 2006.229.23:50:31.49#ibcon#*after write, iclass 32, count 0 2006.229.23:50:31.49#ibcon#*before return 0, iclass 32, count 0 2006.229.23:50:31.49#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:31.49#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.229.23:50:31.49#ibcon#about to clear, iclass 32 cls_cnt 0 2006.229.23:50:31.49#ibcon#cleared, iclass 32 cls_cnt 0 2006.229.23:50:31.49$vck44/vblo=3,649.99 2006.229.23:50:31.49#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.229.23:50:31.49#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.229.23:50:31.49#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:31.49#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:31.49#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:31.49#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:31.49#ibcon#enter wrdev, iclass 34, count 0 2006.229.23:50:31.49#ibcon#first serial, iclass 34, count 0 2006.229.23:50:31.49#ibcon#enter sib2, iclass 34, count 0 2006.229.23:50:31.49#ibcon#flushed, iclass 34, count 0 2006.229.23:50:31.49#ibcon#about to write, iclass 34, count 0 2006.229.23:50:31.49#ibcon#wrote, iclass 34, count 0 2006.229.23:50:31.49#ibcon#about to read 3, iclass 34, count 0 2006.229.23:50:31.51#ibcon#read 3, iclass 34, count 0 2006.229.23:50:31.51#ibcon#about to read 4, iclass 34, count 0 2006.229.23:50:31.51#ibcon#read 4, iclass 34, count 0 2006.229.23:50:31.51#ibcon#about to read 5, iclass 34, count 0 2006.229.23:50:31.51#ibcon#read 5, iclass 34, count 0 2006.229.23:50:31.51#ibcon#about to read 6, iclass 34, count 0 2006.229.23:50:31.51#ibcon#read 6, iclass 34, count 0 2006.229.23:50:31.51#ibcon#end of sib2, iclass 34, count 0 2006.229.23:50:31.51#ibcon#*mode == 0, iclass 34, count 0 2006.229.23:50:31.51#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.229.23:50:31.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.229.23:50:31.51#ibcon#*before write, iclass 34, count 0 2006.229.23:50:31.51#ibcon#enter sib2, iclass 34, count 0 2006.229.23:50:31.51#ibcon#flushed, iclass 34, count 0 2006.229.23:50:31.51#ibcon#about to write, iclass 34, count 0 2006.229.23:50:31.51#ibcon#wrote, iclass 34, count 0 2006.229.23:50:31.51#ibcon#about to read 3, iclass 34, count 0 2006.229.23:50:31.55#ibcon#read 3, iclass 34, count 0 2006.229.23:50:31.55#ibcon#about to read 4, iclass 34, count 0 2006.229.23:50:31.55#ibcon#read 4, iclass 34, count 0 2006.229.23:50:31.55#ibcon#about to read 5, iclass 34, count 0 2006.229.23:50:31.55#ibcon#read 5, iclass 34, count 0 2006.229.23:50:31.55#ibcon#about to read 6, iclass 34, count 0 2006.229.23:50:31.55#ibcon#read 6, iclass 34, count 0 2006.229.23:50:31.55#ibcon#end of sib2, iclass 34, count 0 2006.229.23:50:31.55#ibcon#*after write, iclass 34, count 0 2006.229.23:50:31.55#ibcon#*before return 0, iclass 34, count 0 2006.229.23:50:31.55#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:31.55#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.229.23:50:31.55#ibcon#about to clear, iclass 34 cls_cnt 0 2006.229.23:50:31.55#ibcon#cleared, iclass 34 cls_cnt 0 2006.229.23:50:31.55$vck44/vb=3,4 2006.229.23:50:31.55#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.229.23:50:31.55#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.229.23:50:31.55#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:31.55#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:31.61#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:31.61#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:31.61#ibcon#enter wrdev, iclass 36, count 2 2006.229.23:50:31.61#ibcon#first serial, iclass 36, count 2 2006.229.23:50:31.61#ibcon#enter sib2, iclass 36, count 2 2006.229.23:50:31.61#ibcon#flushed, iclass 36, count 2 2006.229.23:50:31.61#ibcon#about to write, iclass 36, count 2 2006.229.23:50:31.61#ibcon#wrote, iclass 36, count 2 2006.229.23:50:31.61#ibcon#about to read 3, iclass 36, count 2 2006.229.23:50:31.63#ibcon#read 3, iclass 36, count 2 2006.229.23:50:31.63#ibcon#about to read 4, iclass 36, count 2 2006.229.23:50:31.63#ibcon#read 4, iclass 36, count 2 2006.229.23:50:31.63#ibcon#about to read 5, iclass 36, count 2 2006.229.23:50:31.63#ibcon#read 5, iclass 36, count 2 2006.229.23:50:31.63#ibcon#about to read 6, iclass 36, count 2 2006.229.23:50:31.63#ibcon#read 6, iclass 36, count 2 2006.229.23:50:31.63#ibcon#end of sib2, iclass 36, count 2 2006.229.23:50:31.63#ibcon#*mode == 0, iclass 36, count 2 2006.229.23:50:31.63#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.229.23:50:31.63#ibcon#[27=AT03-04\r\n] 2006.229.23:50:31.63#ibcon#*before write, iclass 36, count 2 2006.229.23:50:31.63#ibcon#enter sib2, iclass 36, count 2 2006.229.23:50:31.63#ibcon#flushed, iclass 36, count 2 2006.229.23:50:31.63#ibcon#about to write, iclass 36, count 2 2006.229.23:50:31.63#ibcon#wrote, iclass 36, count 2 2006.229.23:50:31.63#ibcon#about to read 3, iclass 36, count 2 2006.229.23:50:31.66#ibcon#read 3, iclass 36, count 2 2006.229.23:50:31.66#ibcon#about to read 4, iclass 36, count 2 2006.229.23:50:31.66#ibcon#read 4, iclass 36, count 2 2006.229.23:50:31.66#ibcon#about to read 5, iclass 36, count 2 2006.229.23:50:31.66#ibcon#read 5, iclass 36, count 2 2006.229.23:50:31.66#ibcon#about to read 6, iclass 36, count 2 2006.229.23:50:31.66#ibcon#read 6, iclass 36, count 2 2006.229.23:50:31.66#ibcon#end of sib2, iclass 36, count 2 2006.229.23:50:31.66#ibcon#*after write, iclass 36, count 2 2006.229.23:50:31.66#ibcon#*before return 0, iclass 36, count 2 2006.229.23:50:31.66#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:31.66#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.229.23:50:31.66#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.229.23:50:31.66#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:31.66#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:31.78#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:31.78#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:31.78#ibcon#enter wrdev, iclass 36, count 0 2006.229.23:50:31.78#ibcon#first serial, iclass 36, count 0 2006.229.23:50:31.78#ibcon#enter sib2, iclass 36, count 0 2006.229.23:50:31.78#ibcon#flushed, iclass 36, count 0 2006.229.23:50:31.78#ibcon#about to write, iclass 36, count 0 2006.229.23:50:31.78#ibcon#wrote, iclass 36, count 0 2006.229.23:50:31.78#ibcon#about to read 3, iclass 36, count 0 2006.229.23:50:31.80#ibcon#read 3, iclass 36, count 0 2006.229.23:50:31.80#ibcon#about to read 4, iclass 36, count 0 2006.229.23:50:31.80#ibcon#read 4, iclass 36, count 0 2006.229.23:50:31.80#ibcon#about to read 5, iclass 36, count 0 2006.229.23:50:31.80#ibcon#read 5, iclass 36, count 0 2006.229.23:50:31.80#ibcon#about to read 6, iclass 36, count 0 2006.229.23:50:31.80#ibcon#read 6, iclass 36, count 0 2006.229.23:50:31.80#ibcon#end of sib2, iclass 36, count 0 2006.229.23:50:31.80#ibcon#*mode == 0, iclass 36, count 0 2006.229.23:50:31.80#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.229.23:50:31.80#ibcon#[27=USB\r\n] 2006.229.23:50:31.80#ibcon#*before write, iclass 36, count 0 2006.229.23:50:31.80#ibcon#enter sib2, iclass 36, count 0 2006.229.23:50:31.80#ibcon#flushed, iclass 36, count 0 2006.229.23:50:31.80#ibcon#about to write, iclass 36, count 0 2006.229.23:50:31.80#ibcon#wrote, iclass 36, count 0 2006.229.23:50:31.80#ibcon#about to read 3, iclass 36, count 0 2006.229.23:50:31.83#ibcon#read 3, iclass 36, count 0 2006.229.23:50:31.83#ibcon#about to read 4, iclass 36, count 0 2006.229.23:50:31.83#ibcon#read 4, iclass 36, count 0 2006.229.23:50:31.83#ibcon#about to read 5, iclass 36, count 0 2006.229.23:50:31.83#ibcon#read 5, iclass 36, count 0 2006.229.23:50:31.83#ibcon#about to read 6, iclass 36, count 0 2006.229.23:50:31.83#ibcon#read 6, iclass 36, count 0 2006.229.23:50:31.83#ibcon#end of sib2, iclass 36, count 0 2006.229.23:50:31.83#ibcon#*after write, iclass 36, count 0 2006.229.23:50:31.83#ibcon#*before return 0, iclass 36, count 0 2006.229.23:50:31.83#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:31.83#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.229.23:50:31.83#ibcon#about to clear, iclass 36 cls_cnt 0 2006.229.23:50:31.83#ibcon#cleared, iclass 36 cls_cnt 0 2006.229.23:50:31.83$vck44/vblo=4,679.99 2006.229.23:50:31.83#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.229.23:50:31.83#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.229.23:50:31.83#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:31.83#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:31.83#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:31.83#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:31.83#ibcon#enter wrdev, iclass 38, count 0 2006.229.23:50:31.83#ibcon#first serial, iclass 38, count 0 2006.229.23:50:31.83#ibcon#enter sib2, iclass 38, count 0 2006.229.23:50:31.83#ibcon#flushed, iclass 38, count 0 2006.229.23:50:31.83#ibcon#about to write, iclass 38, count 0 2006.229.23:50:31.83#ibcon#wrote, iclass 38, count 0 2006.229.23:50:31.83#ibcon#about to read 3, iclass 38, count 0 2006.229.23:50:31.85#ibcon#read 3, iclass 38, count 0 2006.229.23:50:31.85#ibcon#about to read 4, iclass 38, count 0 2006.229.23:50:31.85#ibcon#read 4, iclass 38, count 0 2006.229.23:50:31.85#ibcon#about to read 5, iclass 38, count 0 2006.229.23:50:31.85#ibcon#read 5, iclass 38, count 0 2006.229.23:50:31.85#ibcon#about to read 6, iclass 38, count 0 2006.229.23:50:31.85#ibcon#read 6, iclass 38, count 0 2006.229.23:50:31.85#ibcon#end of sib2, iclass 38, count 0 2006.229.23:50:31.85#ibcon#*mode == 0, iclass 38, count 0 2006.229.23:50:31.85#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.229.23:50:31.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.229.23:50:31.85#ibcon#*before write, iclass 38, count 0 2006.229.23:50:31.85#ibcon#enter sib2, iclass 38, count 0 2006.229.23:50:31.85#ibcon#flushed, iclass 38, count 0 2006.229.23:50:31.85#ibcon#about to write, iclass 38, count 0 2006.229.23:50:31.85#ibcon#wrote, iclass 38, count 0 2006.229.23:50:31.85#ibcon#about to read 3, iclass 38, count 0 2006.229.23:50:31.89#ibcon#read 3, iclass 38, count 0 2006.229.23:50:31.89#ibcon#about to read 4, iclass 38, count 0 2006.229.23:50:31.89#ibcon#read 4, iclass 38, count 0 2006.229.23:50:31.89#ibcon#about to read 5, iclass 38, count 0 2006.229.23:50:31.89#ibcon#read 5, iclass 38, count 0 2006.229.23:50:31.89#ibcon#about to read 6, iclass 38, count 0 2006.229.23:50:31.89#ibcon#read 6, iclass 38, count 0 2006.229.23:50:31.89#ibcon#end of sib2, iclass 38, count 0 2006.229.23:50:31.89#ibcon#*after write, iclass 38, count 0 2006.229.23:50:31.89#ibcon#*before return 0, iclass 38, count 0 2006.229.23:50:31.89#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:31.89#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.229.23:50:31.89#ibcon#about to clear, iclass 38 cls_cnt 0 2006.229.23:50:31.89#ibcon#cleared, iclass 38 cls_cnt 0 2006.229.23:50:31.89$vck44/vb=4,4 2006.229.23:50:31.89#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.229.23:50:31.89#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.229.23:50:31.89#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:31.89#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:31.95#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:31.95#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:31.95#ibcon#enter wrdev, iclass 40, count 2 2006.229.23:50:31.95#ibcon#first serial, iclass 40, count 2 2006.229.23:50:31.95#ibcon#enter sib2, iclass 40, count 2 2006.229.23:50:31.95#ibcon#flushed, iclass 40, count 2 2006.229.23:50:31.95#ibcon#about to write, iclass 40, count 2 2006.229.23:50:31.95#ibcon#wrote, iclass 40, count 2 2006.229.23:50:31.95#ibcon#about to read 3, iclass 40, count 2 2006.229.23:50:31.97#ibcon#read 3, iclass 40, count 2 2006.229.23:50:31.97#ibcon#about to read 4, iclass 40, count 2 2006.229.23:50:31.97#ibcon#read 4, iclass 40, count 2 2006.229.23:50:31.97#ibcon#about to read 5, iclass 40, count 2 2006.229.23:50:31.97#ibcon#read 5, iclass 40, count 2 2006.229.23:50:31.97#ibcon#about to read 6, iclass 40, count 2 2006.229.23:50:31.97#ibcon#read 6, iclass 40, count 2 2006.229.23:50:31.97#ibcon#end of sib2, iclass 40, count 2 2006.229.23:50:31.97#ibcon#*mode == 0, iclass 40, count 2 2006.229.23:50:31.97#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.229.23:50:31.97#ibcon#[27=AT04-04\r\n] 2006.229.23:50:31.97#ibcon#*before write, iclass 40, count 2 2006.229.23:50:31.97#ibcon#enter sib2, iclass 40, count 2 2006.229.23:50:31.97#ibcon#flushed, iclass 40, count 2 2006.229.23:50:31.97#ibcon#about to write, iclass 40, count 2 2006.229.23:50:31.97#ibcon#wrote, iclass 40, count 2 2006.229.23:50:31.97#ibcon#about to read 3, iclass 40, count 2 2006.229.23:50:32.00#ibcon#read 3, iclass 40, count 2 2006.229.23:50:32.00#ibcon#about to read 4, iclass 40, count 2 2006.229.23:50:32.00#ibcon#read 4, iclass 40, count 2 2006.229.23:50:32.00#ibcon#about to read 5, iclass 40, count 2 2006.229.23:50:32.00#ibcon#read 5, iclass 40, count 2 2006.229.23:50:32.00#ibcon#about to read 6, iclass 40, count 2 2006.229.23:50:32.00#ibcon#read 6, iclass 40, count 2 2006.229.23:50:32.00#ibcon#end of sib2, iclass 40, count 2 2006.229.23:50:32.00#ibcon#*after write, iclass 40, count 2 2006.229.23:50:32.00#ibcon#*before return 0, iclass 40, count 2 2006.229.23:50:32.00#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:32.00#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.229.23:50:32.00#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.229.23:50:32.00#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:32.00#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:32.12#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:32.12#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:32.12#ibcon#enter wrdev, iclass 40, count 0 2006.229.23:50:32.12#ibcon#first serial, iclass 40, count 0 2006.229.23:50:32.12#ibcon#enter sib2, iclass 40, count 0 2006.229.23:50:32.12#ibcon#flushed, iclass 40, count 0 2006.229.23:50:32.12#ibcon#about to write, iclass 40, count 0 2006.229.23:50:32.12#ibcon#wrote, iclass 40, count 0 2006.229.23:50:32.12#ibcon#about to read 3, iclass 40, count 0 2006.229.23:50:32.14#ibcon#read 3, iclass 40, count 0 2006.229.23:50:32.14#ibcon#about to read 4, iclass 40, count 0 2006.229.23:50:32.14#ibcon#read 4, iclass 40, count 0 2006.229.23:50:32.14#ibcon#about to read 5, iclass 40, count 0 2006.229.23:50:32.14#ibcon#read 5, iclass 40, count 0 2006.229.23:50:32.14#ibcon#about to read 6, iclass 40, count 0 2006.229.23:50:32.14#ibcon#read 6, iclass 40, count 0 2006.229.23:50:32.14#ibcon#end of sib2, iclass 40, count 0 2006.229.23:50:32.14#ibcon#*mode == 0, iclass 40, count 0 2006.229.23:50:32.14#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.229.23:50:32.14#ibcon#[27=USB\r\n] 2006.229.23:50:32.14#ibcon#*before write, iclass 40, count 0 2006.229.23:50:32.14#ibcon#enter sib2, iclass 40, count 0 2006.229.23:50:32.14#ibcon#flushed, iclass 40, count 0 2006.229.23:50:32.14#ibcon#about to write, iclass 40, count 0 2006.229.23:50:32.14#ibcon#wrote, iclass 40, count 0 2006.229.23:50:32.14#ibcon#about to read 3, iclass 40, count 0 2006.229.23:50:32.17#ibcon#read 3, iclass 40, count 0 2006.229.23:50:32.17#ibcon#about to read 4, iclass 40, count 0 2006.229.23:50:32.17#ibcon#read 4, iclass 40, count 0 2006.229.23:50:32.17#ibcon#about to read 5, iclass 40, count 0 2006.229.23:50:32.17#ibcon#read 5, iclass 40, count 0 2006.229.23:50:32.17#ibcon#about to read 6, iclass 40, count 0 2006.229.23:50:32.17#ibcon#read 6, iclass 40, count 0 2006.229.23:50:32.17#ibcon#end of sib2, iclass 40, count 0 2006.229.23:50:32.17#ibcon#*after write, iclass 40, count 0 2006.229.23:50:32.17#ibcon#*before return 0, iclass 40, count 0 2006.229.23:50:32.17#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:32.17#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.229.23:50:32.17#ibcon#about to clear, iclass 40 cls_cnt 0 2006.229.23:50:32.17#ibcon#cleared, iclass 40 cls_cnt 0 2006.229.23:50:32.17$vck44/vblo=5,709.99 2006.229.23:50:32.17#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.229.23:50:32.17#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.229.23:50:32.17#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:32.17#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:32.17#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:32.17#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:32.17#ibcon#enter wrdev, iclass 4, count 0 2006.229.23:50:32.17#ibcon#first serial, iclass 4, count 0 2006.229.23:50:32.17#ibcon#enter sib2, iclass 4, count 0 2006.229.23:50:32.17#ibcon#flushed, iclass 4, count 0 2006.229.23:50:32.17#ibcon#about to write, iclass 4, count 0 2006.229.23:50:32.17#ibcon#wrote, iclass 4, count 0 2006.229.23:50:32.17#ibcon#about to read 3, iclass 4, count 0 2006.229.23:50:32.19#ibcon#read 3, iclass 4, count 0 2006.229.23:50:32.19#ibcon#about to read 4, iclass 4, count 0 2006.229.23:50:32.19#ibcon#read 4, iclass 4, count 0 2006.229.23:50:32.19#ibcon#about to read 5, iclass 4, count 0 2006.229.23:50:32.19#ibcon#read 5, iclass 4, count 0 2006.229.23:50:32.19#ibcon#about to read 6, iclass 4, count 0 2006.229.23:50:32.19#ibcon#read 6, iclass 4, count 0 2006.229.23:50:32.19#ibcon#end of sib2, iclass 4, count 0 2006.229.23:50:32.19#ibcon#*mode == 0, iclass 4, count 0 2006.229.23:50:32.19#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.229.23:50:32.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.229.23:50:32.19#ibcon#*before write, iclass 4, count 0 2006.229.23:50:32.19#ibcon#enter sib2, iclass 4, count 0 2006.229.23:50:32.19#ibcon#flushed, iclass 4, count 0 2006.229.23:50:32.19#ibcon#about to write, iclass 4, count 0 2006.229.23:50:32.19#ibcon#wrote, iclass 4, count 0 2006.229.23:50:32.19#ibcon#about to read 3, iclass 4, count 0 2006.229.23:50:32.23#ibcon#read 3, iclass 4, count 0 2006.229.23:50:32.23#ibcon#about to read 4, iclass 4, count 0 2006.229.23:50:32.23#ibcon#read 4, iclass 4, count 0 2006.229.23:50:32.23#ibcon#about to read 5, iclass 4, count 0 2006.229.23:50:32.23#ibcon#read 5, iclass 4, count 0 2006.229.23:50:32.23#ibcon#about to read 6, iclass 4, count 0 2006.229.23:50:32.23#ibcon#read 6, iclass 4, count 0 2006.229.23:50:32.23#ibcon#end of sib2, iclass 4, count 0 2006.229.23:50:32.23#ibcon#*after write, iclass 4, count 0 2006.229.23:50:32.23#ibcon#*before return 0, iclass 4, count 0 2006.229.23:50:32.23#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:32.23#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.229.23:50:32.23#ibcon#about to clear, iclass 4 cls_cnt 0 2006.229.23:50:32.23#ibcon#cleared, iclass 4 cls_cnt 0 2006.229.23:50:32.23$vck44/vb=5,4 2006.229.23:50:32.23#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.229.23:50:32.23#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.229.23:50:32.23#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:32.23#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:32.29#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:32.29#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:32.29#ibcon#enter wrdev, iclass 6, count 2 2006.229.23:50:32.29#ibcon#first serial, iclass 6, count 2 2006.229.23:50:32.29#ibcon#enter sib2, iclass 6, count 2 2006.229.23:50:32.29#ibcon#flushed, iclass 6, count 2 2006.229.23:50:32.29#ibcon#about to write, iclass 6, count 2 2006.229.23:50:32.29#ibcon#wrote, iclass 6, count 2 2006.229.23:50:32.29#ibcon#about to read 3, iclass 6, count 2 2006.229.23:50:32.31#ibcon#read 3, iclass 6, count 2 2006.229.23:50:32.31#ibcon#about to read 4, iclass 6, count 2 2006.229.23:50:32.31#ibcon#read 4, iclass 6, count 2 2006.229.23:50:32.31#ibcon#about to read 5, iclass 6, count 2 2006.229.23:50:32.31#ibcon#read 5, iclass 6, count 2 2006.229.23:50:32.31#ibcon#about to read 6, iclass 6, count 2 2006.229.23:50:32.31#ibcon#read 6, iclass 6, count 2 2006.229.23:50:32.31#ibcon#end of sib2, iclass 6, count 2 2006.229.23:50:32.31#ibcon#*mode == 0, iclass 6, count 2 2006.229.23:50:32.31#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.229.23:50:32.31#ibcon#[27=AT05-04\r\n] 2006.229.23:50:32.31#ibcon#*before write, iclass 6, count 2 2006.229.23:50:32.31#ibcon#enter sib2, iclass 6, count 2 2006.229.23:50:32.31#ibcon#flushed, iclass 6, count 2 2006.229.23:50:32.31#ibcon#about to write, iclass 6, count 2 2006.229.23:50:32.31#ibcon#wrote, iclass 6, count 2 2006.229.23:50:32.31#ibcon#about to read 3, iclass 6, count 2 2006.229.23:50:32.34#ibcon#read 3, iclass 6, count 2 2006.229.23:50:32.34#ibcon#about to read 4, iclass 6, count 2 2006.229.23:50:32.34#ibcon#read 4, iclass 6, count 2 2006.229.23:50:32.34#ibcon#about to read 5, iclass 6, count 2 2006.229.23:50:32.34#ibcon#read 5, iclass 6, count 2 2006.229.23:50:32.34#ibcon#about to read 6, iclass 6, count 2 2006.229.23:50:32.34#ibcon#read 6, iclass 6, count 2 2006.229.23:50:32.34#ibcon#end of sib2, iclass 6, count 2 2006.229.23:50:32.34#ibcon#*after write, iclass 6, count 2 2006.229.23:50:32.34#ibcon#*before return 0, iclass 6, count 2 2006.229.23:50:32.34#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:32.34#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.229.23:50:32.34#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.229.23:50:32.34#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:32.34#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:32.46#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:32.46#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:32.46#ibcon#enter wrdev, iclass 6, count 0 2006.229.23:50:32.46#ibcon#first serial, iclass 6, count 0 2006.229.23:50:32.46#ibcon#enter sib2, iclass 6, count 0 2006.229.23:50:32.46#ibcon#flushed, iclass 6, count 0 2006.229.23:50:32.46#ibcon#about to write, iclass 6, count 0 2006.229.23:50:32.46#ibcon#wrote, iclass 6, count 0 2006.229.23:50:32.46#ibcon#about to read 3, iclass 6, count 0 2006.229.23:50:32.48#ibcon#read 3, iclass 6, count 0 2006.229.23:50:32.48#ibcon#about to read 4, iclass 6, count 0 2006.229.23:50:32.48#ibcon#read 4, iclass 6, count 0 2006.229.23:50:32.48#ibcon#about to read 5, iclass 6, count 0 2006.229.23:50:32.48#ibcon#read 5, iclass 6, count 0 2006.229.23:50:32.48#ibcon#about to read 6, iclass 6, count 0 2006.229.23:50:32.48#ibcon#read 6, iclass 6, count 0 2006.229.23:50:32.48#ibcon#end of sib2, iclass 6, count 0 2006.229.23:50:32.48#ibcon#*mode == 0, iclass 6, count 0 2006.229.23:50:32.48#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.229.23:50:32.48#ibcon#[27=USB\r\n] 2006.229.23:50:32.48#ibcon#*before write, iclass 6, count 0 2006.229.23:50:32.48#ibcon#enter sib2, iclass 6, count 0 2006.229.23:50:32.48#ibcon#flushed, iclass 6, count 0 2006.229.23:50:32.48#ibcon#about to write, iclass 6, count 0 2006.229.23:50:32.48#ibcon#wrote, iclass 6, count 0 2006.229.23:50:32.48#ibcon#about to read 3, iclass 6, count 0 2006.229.23:50:32.51#ibcon#read 3, iclass 6, count 0 2006.229.23:50:32.51#ibcon#about to read 4, iclass 6, count 0 2006.229.23:50:32.51#ibcon#read 4, iclass 6, count 0 2006.229.23:50:32.51#ibcon#about to read 5, iclass 6, count 0 2006.229.23:50:32.51#ibcon#read 5, iclass 6, count 0 2006.229.23:50:32.51#ibcon#about to read 6, iclass 6, count 0 2006.229.23:50:32.51#ibcon#read 6, iclass 6, count 0 2006.229.23:50:32.51#ibcon#end of sib2, iclass 6, count 0 2006.229.23:50:32.51#ibcon#*after write, iclass 6, count 0 2006.229.23:50:32.51#ibcon#*before return 0, iclass 6, count 0 2006.229.23:50:32.51#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:32.51#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.229.23:50:32.51#ibcon#about to clear, iclass 6 cls_cnt 0 2006.229.23:50:32.51#ibcon#cleared, iclass 6 cls_cnt 0 2006.229.23:50:32.51$vck44/vblo=6,719.99 2006.229.23:50:32.51#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.229.23:50:32.51#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.229.23:50:32.51#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:32.51#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:32.51#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:32.51#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:32.51#ibcon#enter wrdev, iclass 10, count 0 2006.229.23:50:32.51#ibcon#first serial, iclass 10, count 0 2006.229.23:50:32.51#ibcon#enter sib2, iclass 10, count 0 2006.229.23:50:32.51#ibcon#flushed, iclass 10, count 0 2006.229.23:50:32.51#ibcon#about to write, iclass 10, count 0 2006.229.23:50:32.51#ibcon#wrote, iclass 10, count 0 2006.229.23:50:32.51#ibcon#about to read 3, iclass 10, count 0 2006.229.23:50:32.53#ibcon#read 3, iclass 10, count 0 2006.229.23:50:32.53#ibcon#about to read 4, iclass 10, count 0 2006.229.23:50:32.53#ibcon#read 4, iclass 10, count 0 2006.229.23:50:32.53#ibcon#about to read 5, iclass 10, count 0 2006.229.23:50:32.53#ibcon#read 5, iclass 10, count 0 2006.229.23:50:32.53#ibcon#about to read 6, iclass 10, count 0 2006.229.23:50:32.53#ibcon#read 6, iclass 10, count 0 2006.229.23:50:32.53#ibcon#end of sib2, iclass 10, count 0 2006.229.23:50:32.53#ibcon#*mode == 0, iclass 10, count 0 2006.229.23:50:32.53#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.229.23:50:32.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.229.23:50:32.53#ibcon#*before write, iclass 10, count 0 2006.229.23:50:32.53#ibcon#enter sib2, iclass 10, count 0 2006.229.23:50:32.53#ibcon#flushed, iclass 10, count 0 2006.229.23:50:32.53#ibcon#about to write, iclass 10, count 0 2006.229.23:50:32.53#ibcon#wrote, iclass 10, count 0 2006.229.23:50:32.53#ibcon#about to read 3, iclass 10, count 0 2006.229.23:50:32.57#ibcon#read 3, iclass 10, count 0 2006.229.23:50:32.57#ibcon#about to read 4, iclass 10, count 0 2006.229.23:50:32.57#ibcon#read 4, iclass 10, count 0 2006.229.23:50:32.57#ibcon#about to read 5, iclass 10, count 0 2006.229.23:50:32.57#ibcon#read 5, iclass 10, count 0 2006.229.23:50:32.57#ibcon#about to read 6, iclass 10, count 0 2006.229.23:50:32.57#ibcon#read 6, iclass 10, count 0 2006.229.23:50:32.57#ibcon#end of sib2, iclass 10, count 0 2006.229.23:50:32.57#ibcon#*after write, iclass 10, count 0 2006.229.23:50:32.57#ibcon#*before return 0, iclass 10, count 0 2006.229.23:50:32.57#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:32.57#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.229.23:50:32.57#ibcon#about to clear, iclass 10 cls_cnt 0 2006.229.23:50:32.57#ibcon#cleared, iclass 10 cls_cnt 0 2006.229.23:50:32.57$vck44/vb=6,4 2006.229.23:50:32.57#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.229.23:50:32.57#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.229.23:50:32.57#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:32.57#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:32.63#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:32.63#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:32.63#ibcon#enter wrdev, iclass 12, count 2 2006.229.23:50:32.63#ibcon#first serial, iclass 12, count 2 2006.229.23:50:32.63#ibcon#enter sib2, iclass 12, count 2 2006.229.23:50:32.63#ibcon#flushed, iclass 12, count 2 2006.229.23:50:32.63#ibcon#about to write, iclass 12, count 2 2006.229.23:50:32.63#ibcon#wrote, iclass 12, count 2 2006.229.23:50:32.63#ibcon#about to read 3, iclass 12, count 2 2006.229.23:50:32.65#ibcon#read 3, iclass 12, count 2 2006.229.23:50:32.65#ibcon#about to read 4, iclass 12, count 2 2006.229.23:50:32.65#ibcon#read 4, iclass 12, count 2 2006.229.23:50:32.65#ibcon#about to read 5, iclass 12, count 2 2006.229.23:50:32.65#ibcon#read 5, iclass 12, count 2 2006.229.23:50:32.65#ibcon#about to read 6, iclass 12, count 2 2006.229.23:50:32.65#ibcon#read 6, iclass 12, count 2 2006.229.23:50:32.65#ibcon#end of sib2, iclass 12, count 2 2006.229.23:50:32.65#ibcon#*mode == 0, iclass 12, count 2 2006.229.23:50:32.65#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.229.23:50:32.65#ibcon#[27=AT06-04\r\n] 2006.229.23:50:32.65#ibcon#*before write, iclass 12, count 2 2006.229.23:50:32.65#ibcon#enter sib2, iclass 12, count 2 2006.229.23:50:32.65#ibcon#flushed, iclass 12, count 2 2006.229.23:50:32.65#ibcon#about to write, iclass 12, count 2 2006.229.23:50:32.65#ibcon#wrote, iclass 12, count 2 2006.229.23:50:32.65#ibcon#about to read 3, iclass 12, count 2 2006.229.23:50:32.68#ibcon#read 3, iclass 12, count 2 2006.229.23:50:32.68#ibcon#about to read 4, iclass 12, count 2 2006.229.23:50:32.68#ibcon#read 4, iclass 12, count 2 2006.229.23:50:32.68#ibcon#about to read 5, iclass 12, count 2 2006.229.23:50:32.68#ibcon#read 5, iclass 12, count 2 2006.229.23:50:32.68#ibcon#about to read 6, iclass 12, count 2 2006.229.23:50:32.68#ibcon#read 6, iclass 12, count 2 2006.229.23:50:32.68#ibcon#end of sib2, iclass 12, count 2 2006.229.23:50:32.68#ibcon#*after write, iclass 12, count 2 2006.229.23:50:32.68#ibcon#*before return 0, iclass 12, count 2 2006.229.23:50:32.68#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:32.68#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.229.23:50:32.68#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.229.23:50:32.68#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:32.68#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:32.80#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:32.80#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:32.80#ibcon#enter wrdev, iclass 12, count 0 2006.229.23:50:32.80#ibcon#first serial, iclass 12, count 0 2006.229.23:50:32.80#ibcon#enter sib2, iclass 12, count 0 2006.229.23:50:32.80#ibcon#flushed, iclass 12, count 0 2006.229.23:50:32.80#ibcon#about to write, iclass 12, count 0 2006.229.23:50:32.80#ibcon#wrote, iclass 12, count 0 2006.229.23:50:32.80#ibcon#about to read 3, iclass 12, count 0 2006.229.23:50:32.82#ibcon#read 3, iclass 12, count 0 2006.229.23:50:32.82#ibcon#about to read 4, iclass 12, count 0 2006.229.23:50:32.82#ibcon#read 4, iclass 12, count 0 2006.229.23:50:32.82#ibcon#about to read 5, iclass 12, count 0 2006.229.23:50:32.82#ibcon#read 5, iclass 12, count 0 2006.229.23:50:32.82#ibcon#about to read 6, iclass 12, count 0 2006.229.23:50:32.82#ibcon#read 6, iclass 12, count 0 2006.229.23:50:32.82#ibcon#end of sib2, iclass 12, count 0 2006.229.23:50:32.82#ibcon#*mode == 0, iclass 12, count 0 2006.229.23:50:32.82#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.229.23:50:32.82#ibcon#[27=USB\r\n] 2006.229.23:50:32.82#ibcon#*before write, iclass 12, count 0 2006.229.23:50:32.82#ibcon#enter sib2, iclass 12, count 0 2006.229.23:50:32.82#ibcon#flushed, iclass 12, count 0 2006.229.23:50:32.82#ibcon#about to write, iclass 12, count 0 2006.229.23:50:32.82#ibcon#wrote, iclass 12, count 0 2006.229.23:50:32.82#ibcon#about to read 3, iclass 12, count 0 2006.229.23:50:32.85#ibcon#read 3, iclass 12, count 0 2006.229.23:50:32.85#ibcon#about to read 4, iclass 12, count 0 2006.229.23:50:32.85#ibcon#read 4, iclass 12, count 0 2006.229.23:50:32.85#ibcon#about to read 5, iclass 12, count 0 2006.229.23:50:32.85#ibcon#read 5, iclass 12, count 0 2006.229.23:50:32.85#ibcon#about to read 6, iclass 12, count 0 2006.229.23:50:32.85#ibcon#read 6, iclass 12, count 0 2006.229.23:50:32.85#ibcon#end of sib2, iclass 12, count 0 2006.229.23:50:32.85#ibcon#*after write, iclass 12, count 0 2006.229.23:50:32.85#ibcon#*before return 0, iclass 12, count 0 2006.229.23:50:32.85#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:32.85#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.229.23:50:32.85#ibcon#about to clear, iclass 12 cls_cnt 0 2006.229.23:50:32.85#ibcon#cleared, iclass 12 cls_cnt 0 2006.229.23:50:32.85$vck44/vblo=7,734.99 2006.229.23:50:32.85#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.229.23:50:32.85#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.229.23:50:32.85#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:32.85#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:32.85#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:32.85#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:32.85#ibcon#enter wrdev, iclass 14, count 0 2006.229.23:50:32.85#ibcon#first serial, iclass 14, count 0 2006.229.23:50:32.85#ibcon#enter sib2, iclass 14, count 0 2006.229.23:50:32.85#ibcon#flushed, iclass 14, count 0 2006.229.23:50:32.85#ibcon#about to write, iclass 14, count 0 2006.229.23:50:32.85#ibcon#wrote, iclass 14, count 0 2006.229.23:50:32.85#ibcon#about to read 3, iclass 14, count 0 2006.229.23:50:32.87#ibcon#read 3, iclass 14, count 0 2006.229.23:50:32.87#ibcon#about to read 4, iclass 14, count 0 2006.229.23:50:32.87#ibcon#read 4, iclass 14, count 0 2006.229.23:50:32.87#ibcon#about to read 5, iclass 14, count 0 2006.229.23:50:32.87#ibcon#read 5, iclass 14, count 0 2006.229.23:50:32.87#ibcon#about to read 6, iclass 14, count 0 2006.229.23:50:32.87#ibcon#read 6, iclass 14, count 0 2006.229.23:50:32.87#ibcon#end of sib2, iclass 14, count 0 2006.229.23:50:32.87#ibcon#*mode == 0, iclass 14, count 0 2006.229.23:50:32.87#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.229.23:50:32.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.229.23:50:32.87#ibcon#*before write, iclass 14, count 0 2006.229.23:50:32.87#ibcon#enter sib2, iclass 14, count 0 2006.229.23:50:32.87#ibcon#flushed, iclass 14, count 0 2006.229.23:50:32.87#ibcon#about to write, iclass 14, count 0 2006.229.23:50:32.87#ibcon#wrote, iclass 14, count 0 2006.229.23:50:32.87#ibcon#about to read 3, iclass 14, count 0 2006.229.23:50:32.91#ibcon#read 3, iclass 14, count 0 2006.229.23:50:32.91#ibcon#about to read 4, iclass 14, count 0 2006.229.23:50:32.91#ibcon#read 4, iclass 14, count 0 2006.229.23:50:32.91#ibcon#about to read 5, iclass 14, count 0 2006.229.23:50:32.91#ibcon#read 5, iclass 14, count 0 2006.229.23:50:32.91#ibcon#about to read 6, iclass 14, count 0 2006.229.23:50:32.91#ibcon#read 6, iclass 14, count 0 2006.229.23:50:32.91#ibcon#end of sib2, iclass 14, count 0 2006.229.23:50:32.91#ibcon#*after write, iclass 14, count 0 2006.229.23:50:32.91#ibcon#*before return 0, iclass 14, count 0 2006.229.23:50:32.91#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:32.91#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.229.23:50:32.91#ibcon#about to clear, iclass 14 cls_cnt 0 2006.229.23:50:32.91#ibcon#cleared, iclass 14 cls_cnt 0 2006.229.23:50:32.91$vck44/vb=7,4 2006.229.23:50:32.91#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.229.23:50:32.91#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.229.23:50:32.91#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:32.91#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:32.97#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:32.97#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:32.97#ibcon#enter wrdev, iclass 16, count 2 2006.229.23:50:32.97#ibcon#first serial, iclass 16, count 2 2006.229.23:50:32.97#ibcon#enter sib2, iclass 16, count 2 2006.229.23:50:32.97#ibcon#flushed, iclass 16, count 2 2006.229.23:50:32.97#ibcon#about to write, iclass 16, count 2 2006.229.23:50:32.97#ibcon#wrote, iclass 16, count 2 2006.229.23:50:32.97#ibcon#about to read 3, iclass 16, count 2 2006.229.23:50:32.99#ibcon#read 3, iclass 16, count 2 2006.229.23:50:32.99#ibcon#about to read 4, iclass 16, count 2 2006.229.23:50:32.99#ibcon#read 4, iclass 16, count 2 2006.229.23:50:32.99#ibcon#about to read 5, iclass 16, count 2 2006.229.23:50:32.99#ibcon#read 5, iclass 16, count 2 2006.229.23:50:32.99#ibcon#about to read 6, iclass 16, count 2 2006.229.23:50:32.99#ibcon#read 6, iclass 16, count 2 2006.229.23:50:32.99#ibcon#end of sib2, iclass 16, count 2 2006.229.23:50:32.99#ibcon#*mode == 0, iclass 16, count 2 2006.229.23:50:32.99#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.229.23:50:32.99#ibcon#[27=AT07-04\r\n] 2006.229.23:50:32.99#ibcon#*before write, iclass 16, count 2 2006.229.23:50:32.99#ibcon#enter sib2, iclass 16, count 2 2006.229.23:50:32.99#ibcon#flushed, iclass 16, count 2 2006.229.23:50:32.99#ibcon#about to write, iclass 16, count 2 2006.229.23:50:32.99#ibcon#wrote, iclass 16, count 2 2006.229.23:50:32.99#ibcon#about to read 3, iclass 16, count 2 2006.229.23:50:33.02#ibcon#read 3, iclass 16, count 2 2006.229.23:50:33.02#ibcon#about to read 4, iclass 16, count 2 2006.229.23:50:33.02#ibcon#read 4, iclass 16, count 2 2006.229.23:50:33.02#ibcon#about to read 5, iclass 16, count 2 2006.229.23:50:33.02#ibcon#read 5, iclass 16, count 2 2006.229.23:50:33.02#ibcon#about to read 6, iclass 16, count 2 2006.229.23:50:33.02#ibcon#read 6, iclass 16, count 2 2006.229.23:50:33.02#ibcon#end of sib2, iclass 16, count 2 2006.229.23:50:33.02#ibcon#*after write, iclass 16, count 2 2006.229.23:50:33.02#ibcon#*before return 0, iclass 16, count 2 2006.229.23:50:33.02#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:33.02#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.229.23:50:33.02#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.229.23:50:33.02#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:33.02#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:33.14#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:33.14#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:33.14#ibcon#enter wrdev, iclass 16, count 0 2006.229.23:50:33.14#ibcon#first serial, iclass 16, count 0 2006.229.23:50:33.14#ibcon#enter sib2, iclass 16, count 0 2006.229.23:50:33.14#ibcon#flushed, iclass 16, count 0 2006.229.23:50:33.14#ibcon#about to write, iclass 16, count 0 2006.229.23:50:33.14#ibcon#wrote, iclass 16, count 0 2006.229.23:50:33.14#ibcon#about to read 3, iclass 16, count 0 2006.229.23:50:33.16#ibcon#read 3, iclass 16, count 0 2006.229.23:50:33.16#ibcon#about to read 4, iclass 16, count 0 2006.229.23:50:33.16#ibcon#read 4, iclass 16, count 0 2006.229.23:50:33.16#ibcon#about to read 5, iclass 16, count 0 2006.229.23:50:33.16#ibcon#read 5, iclass 16, count 0 2006.229.23:50:33.16#ibcon#about to read 6, iclass 16, count 0 2006.229.23:50:33.16#ibcon#read 6, iclass 16, count 0 2006.229.23:50:33.16#ibcon#end of sib2, iclass 16, count 0 2006.229.23:50:33.16#ibcon#*mode == 0, iclass 16, count 0 2006.229.23:50:33.16#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.229.23:50:33.16#ibcon#[27=USB\r\n] 2006.229.23:50:33.16#ibcon#*before write, iclass 16, count 0 2006.229.23:50:33.16#ibcon#enter sib2, iclass 16, count 0 2006.229.23:50:33.16#ibcon#flushed, iclass 16, count 0 2006.229.23:50:33.16#ibcon#about to write, iclass 16, count 0 2006.229.23:50:33.16#ibcon#wrote, iclass 16, count 0 2006.229.23:50:33.16#ibcon#about to read 3, iclass 16, count 0 2006.229.23:50:33.19#ibcon#read 3, iclass 16, count 0 2006.229.23:50:33.19#ibcon#about to read 4, iclass 16, count 0 2006.229.23:50:33.19#ibcon#read 4, iclass 16, count 0 2006.229.23:50:33.19#ibcon#about to read 5, iclass 16, count 0 2006.229.23:50:33.19#ibcon#read 5, iclass 16, count 0 2006.229.23:50:33.19#ibcon#about to read 6, iclass 16, count 0 2006.229.23:50:33.19#ibcon#read 6, iclass 16, count 0 2006.229.23:50:33.19#ibcon#end of sib2, iclass 16, count 0 2006.229.23:50:33.19#ibcon#*after write, iclass 16, count 0 2006.229.23:50:33.19#ibcon#*before return 0, iclass 16, count 0 2006.229.23:50:33.19#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:33.19#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.229.23:50:33.19#ibcon#about to clear, iclass 16 cls_cnt 0 2006.229.23:50:33.19#ibcon#cleared, iclass 16 cls_cnt 0 2006.229.23:50:33.19$vck44/vblo=8,744.99 2006.229.23:50:33.19#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.229.23:50:33.19#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.229.23:50:33.19#ibcon#ireg 17 cls_cnt 0 2006.229.23:50:33.19#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:33.19#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:33.19#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:33.19#ibcon#enter wrdev, iclass 18, count 0 2006.229.23:50:33.19#ibcon#first serial, iclass 18, count 0 2006.229.23:50:33.19#ibcon#enter sib2, iclass 18, count 0 2006.229.23:50:33.19#ibcon#flushed, iclass 18, count 0 2006.229.23:50:33.19#ibcon#about to write, iclass 18, count 0 2006.229.23:50:33.19#ibcon#wrote, iclass 18, count 0 2006.229.23:50:33.19#ibcon#about to read 3, iclass 18, count 0 2006.229.23:50:33.21#ibcon#read 3, iclass 18, count 0 2006.229.23:50:33.21#ibcon#about to read 4, iclass 18, count 0 2006.229.23:50:33.21#ibcon#read 4, iclass 18, count 0 2006.229.23:50:33.21#ibcon#about to read 5, iclass 18, count 0 2006.229.23:50:33.21#ibcon#read 5, iclass 18, count 0 2006.229.23:50:33.21#ibcon#about to read 6, iclass 18, count 0 2006.229.23:50:33.21#ibcon#read 6, iclass 18, count 0 2006.229.23:50:33.21#ibcon#end of sib2, iclass 18, count 0 2006.229.23:50:33.21#ibcon#*mode == 0, iclass 18, count 0 2006.229.23:50:33.21#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.229.23:50:33.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.229.23:50:33.21#ibcon#*before write, iclass 18, count 0 2006.229.23:50:33.21#ibcon#enter sib2, iclass 18, count 0 2006.229.23:50:33.21#ibcon#flushed, iclass 18, count 0 2006.229.23:50:33.21#ibcon#about to write, iclass 18, count 0 2006.229.23:50:33.21#ibcon#wrote, iclass 18, count 0 2006.229.23:50:33.21#ibcon#about to read 3, iclass 18, count 0 2006.229.23:50:33.25#ibcon#read 3, iclass 18, count 0 2006.229.23:50:33.25#ibcon#about to read 4, iclass 18, count 0 2006.229.23:50:33.25#ibcon#read 4, iclass 18, count 0 2006.229.23:50:33.25#ibcon#about to read 5, iclass 18, count 0 2006.229.23:50:33.25#ibcon#read 5, iclass 18, count 0 2006.229.23:50:33.25#ibcon#about to read 6, iclass 18, count 0 2006.229.23:50:33.25#ibcon#read 6, iclass 18, count 0 2006.229.23:50:33.25#ibcon#end of sib2, iclass 18, count 0 2006.229.23:50:33.25#ibcon#*after write, iclass 18, count 0 2006.229.23:50:33.25#ibcon#*before return 0, iclass 18, count 0 2006.229.23:50:33.25#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:33.25#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.229.23:50:33.25#ibcon#about to clear, iclass 18 cls_cnt 0 2006.229.23:50:33.25#ibcon#cleared, iclass 18 cls_cnt 0 2006.229.23:50:33.25$vck44/vb=8,4 2006.229.23:50:33.25#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.229.23:50:33.25#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.229.23:50:33.25#ibcon#ireg 11 cls_cnt 2 2006.229.23:50:33.25#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:33.31#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:33.31#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:33.31#ibcon#enter wrdev, iclass 20, count 2 2006.229.23:50:33.31#ibcon#first serial, iclass 20, count 2 2006.229.23:50:33.31#ibcon#enter sib2, iclass 20, count 2 2006.229.23:50:33.31#ibcon#flushed, iclass 20, count 2 2006.229.23:50:33.31#ibcon#about to write, iclass 20, count 2 2006.229.23:50:33.31#ibcon#wrote, iclass 20, count 2 2006.229.23:50:33.31#ibcon#about to read 3, iclass 20, count 2 2006.229.23:50:33.33#ibcon#read 3, iclass 20, count 2 2006.229.23:50:33.33#ibcon#about to read 4, iclass 20, count 2 2006.229.23:50:33.33#ibcon#read 4, iclass 20, count 2 2006.229.23:50:33.33#ibcon#about to read 5, iclass 20, count 2 2006.229.23:50:33.33#ibcon#read 5, iclass 20, count 2 2006.229.23:50:33.33#ibcon#about to read 6, iclass 20, count 2 2006.229.23:50:33.33#ibcon#read 6, iclass 20, count 2 2006.229.23:50:33.33#ibcon#end of sib2, iclass 20, count 2 2006.229.23:50:33.33#ibcon#*mode == 0, iclass 20, count 2 2006.229.23:50:33.33#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.229.23:50:33.33#ibcon#[27=AT08-04\r\n] 2006.229.23:50:33.33#ibcon#*before write, iclass 20, count 2 2006.229.23:50:33.33#ibcon#enter sib2, iclass 20, count 2 2006.229.23:50:33.33#ibcon#flushed, iclass 20, count 2 2006.229.23:50:33.33#ibcon#about to write, iclass 20, count 2 2006.229.23:50:33.33#ibcon#wrote, iclass 20, count 2 2006.229.23:50:33.33#ibcon#about to read 3, iclass 20, count 2 2006.229.23:50:33.36#ibcon#read 3, iclass 20, count 2 2006.229.23:50:33.36#ibcon#about to read 4, iclass 20, count 2 2006.229.23:50:33.36#ibcon#read 4, iclass 20, count 2 2006.229.23:50:33.36#ibcon#about to read 5, iclass 20, count 2 2006.229.23:50:33.36#ibcon#read 5, iclass 20, count 2 2006.229.23:50:33.36#ibcon#about to read 6, iclass 20, count 2 2006.229.23:50:33.36#ibcon#read 6, iclass 20, count 2 2006.229.23:50:33.36#ibcon#end of sib2, iclass 20, count 2 2006.229.23:50:33.36#ibcon#*after write, iclass 20, count 2 2006.229.23:50:33.36#ibcon#*before return 0, iclass 20, count 2 2006.229.23:50:33.36#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:33.36#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.229.23:50:33.36#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.229.23:50:33.36#ibcon#ireg 7 cls_cnt 0 2006.229.23:50:33.36#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:33.48#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:33.48#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:33.48#ibcon#enter wrdev, iclass 20, count 0 2006.229.23:50:33.48#ibcon#first serial, iclass 20, count 0 2006.229.23:50:33.48#ibcon#enter sib2, iclass 20, count 0 2006.229.23:50:33.48#ibcon#flushed, iclass 20, count 0 2006.229.23:50:33.48#ibcon#about to write, iclass 20, count 0 2006.229.23:50:33.48#ibcon#wrote, iclass 20, count 0 2006.229.23:50:33.48#ibcon#about to read 3, iclass 20, count 0 2006.229.23:50:33.50#ibcon#read 3, iclass 20, count 0 2006.229.23:50:33.50#ibcon#about to read 4, iclass 20, count 0 2006.229.23:50:33.50#ibcon#read 4, iclass 20, count 0 2006.229.23:50:33.50#ibcon#about to read 5, iclass 20, count 0 2006.229.23:50:33.50#ibcon#read 5, iclass 20, count 0 2006.229.23:50:33.50#ibcon#about to read 6, iclass 20, count 0 2006.229.23:50:33.50#ibcon#read 6, iclass 20, count 0 2006.229.23:50:33.50#ibcon#end of sib2, iclass 20, count 0 2006.229.23:50:33.50#ibcon#*mode == 0, iclass 20, count 0 2006.229.23:50:33.50#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.229.23:50:33.50#ibcon#[27=USB\r\n] 2006.229.23:50:33.50#ibcon#*before write, iclass 20, count 0 2006.229.23:50:33.50#ibcon#enter sib2, iclass 20, count 0 2006.229.23:50:33.50#ibcon#flushed, iclass 20, count 0 2006.229.23:50:33.50#ibcon#about to write, iclass 20, count 0 2006.229.23:50:33.50#ibcon#wrote, iclass 20, count 0 2006.229.23:50:33.50#ibcon#about to read 3, iclass 20, count 0 2006.229.23:50:33.53#ibcon#read 3, iclass 20, count 0 2006.229.23:50:33.53#ibcon#about to read 4, iclass 20, count 0 2006.229.23:50:33.53#ibcon#read 4, iclass 20, count 0 2006.229.23:50:33.53#ibcon#about to read 5, iclass 20, count 0 2006.229.23:50:33.53#ibcon#read 5, iclass 20, count 0 2006.229.23:50:33.53#ibcon#about to read 6, iclass 20, count 0 2006.229.23:50:33.53#ibcon#read 6, iclass 20, count 0 2006.229.23:50:33.53#ibcon#end of sib2, iclass 20, count 0 2006.229.23:50:33.53#ibcon#*after write, iclass 20, count 0 2006.229.23:50:33.53#ibcon#*before return 0, iclass 20, count 0 2006.229.23:50:33.53#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:33.53#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.229.23:50:33.53#ibcon#about to clear, iclass 20 cls_cnt 0 2006.229.23:50:33.53#ibcon#cleared, iclass 20 cls_cnt 0 2006.229.23:50:33.53$vck44/vabw=wide 2006.229.23:50:33.53#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.229.23:50:33.53#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.229.23:50:33.53#ibcon#ireg 8 cls_cnt 0 2006.229.23:50:33.53#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:33.53#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:33.53#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:33.53#ibcon#enter wrdev, iclass 22, count 0 2006.229.23:50:33.53#ibcon#first serial, iclass 22, count 0 2006.229.23:50:33.53#ibcon#enter sib2, iclass 22, count 0 2006.229.23:50:33.53#ibcon#flushed, iclass 22, count 0 2006.229.23:50:33.53#ibcon#about to write, iclass 22, count 0 2006.229.23:50:33.53#ibcon#wrote, iclass 22, count 0 2006.229.23:50:33.53#ibcon#about to read 3, iclass 22, count 0 2006.229.23:50:33.55#ibcon#read 3, iclass 22, count 0 2006.229.23:50:33.55#ibcon#about to read 4, iclass 22, count 0 2006.229.23:50:33.55#ibcon#read 4, iclass 22, count 0 2006.229.23:50:33.55#ibcon#about to read 5, iclass 22, count 0 2006.229.23:50:33.55#ibcon#read 5, iclass 22, count 0 2006.229.23:50:33.55#ibcon#about to read 6, iclass 22, count 0 2006.229.23:50:33.55#ibcon#read 6, iclass 22, count 0 2006.229.23:50:33.55#ibcon#end of sib2, iclass 22, count 0 2006.229.23:50:33.55#ibcon#*mode == 0, iclass 22, count 0 2006.229.23:50:33.55#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.229.23:50:33.55#ibcon#[25=BW32\r\n] 2006.229.23:50:33.55#ibcon#*before write, iclass 22, count 0 2006.229.23:50:33.55#ibcon#enter sib2, iclass 22, count 0 2006.229.23:50:33.55#ibcon#flushed, iclass 22, count 0 2006.229.23:50:33.55#ibcon#about to write, iclass 22, count 0 2006.229.23:50:33.55#ibcon#wrote, iclass 22, count 0 2006.229.23:50:33.55#ibcon#about to read 3, iclass 22, count 0 2006.229.23:50:33.58#ibcon#read 3, iclass 22, count 0 2006.229.23:50:33.58#ibcon#about to read 4, iclass 22, count 0 2006.229.23:50:33.58#ibcon#read 4, iclass 22, count 0 2006.229.23:50:33.58#ibcon#about to read 5, iclass 22, count 0 2006.229.23:50:33.58#ibcon#read 5, iclass 22, count 0 2006.229.23:50:33.58#ibcon#about to read 6, iclass 22, count 0 2006.229.23:50:33.58#ibcon#read 6, iclass 22, count 0 2006.229.23:50:33.58#ibcon#end of sib2, iclass 22, count 0 2006.229.23:50:33.58#ibcon#*after write, iclass 22, count 0 2006.229.23:50:33.58#ibcon#*before return 0, iclass 22, count 0 2006.229.23:50:33.58#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:33.58#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.229.23:50:33.58#ibcon#about to clear, iclass 22 cls_cnt 0 2006.229.23:50:33.58#ibcon#cleared, iclass 22 cls_cnt 0 2006.229.23:50:33.58$vck44/vbbw=wide 2006.229.23:50:33.58#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.229.23:50:33.58#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.229.23:50:33.58#ibcon#ireg 8 cls_cnt 0 2006.229.23:50:33.58#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:50:33.65#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:50:33.65#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:50:33.65#ibcon#enter wrdev, iclass 24, count 0 2006.229.23:50:33.65#ibcon#first serial, iclass 24, count 0 2006.229.23:50:33.65#ibcon#enter sib2, iclass 24, count 0 2006.229.23:50:33.65#ibcon#flushed, iclass 24, count 0 2006.229.23:50:33.65#ibcon#about to write, iclass 24, count 0 2006.229.23:50:33.65#ibcon#wrote, iclass 24, count 0 2006.229.23:50:33.65#ibcon#about to read 3, iclass 24, count 0 2006.229.23:50:33.67#ibcon#read 3, iclass 24, count 0 2006.229.23:50:33.67#ibcon#about to read 4, iclass 24, count 0 2006.229.23:50:33.67#ibcon#read 4, iclass 24, count 0 2006.229.23:50:33.67#ibcon#about to read 5, iclass 24, count 0 2006.229.23:50:33.67#ibcon#read 5, iclass 24, count 0 2006.229.23:50:33.67#ibcon#about to read 6, iclass 24, count 0 2006.229.23:50:33.67#ibcon#read 6, iclass 24, count 0 2006.229.23:50:33.67#ibcon#end of sib2, iclass 24, count 0 2006.229.23:50:33.67#ibcon#*mode == 0, iclass 24, count 0 2006.229.23:50:33.67#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.229.23:50:33.67#ibcon#[27=BW32\r\n] 2006.229.23:50:33.67#ibcon#*before write, iclass 24, count 0 2006.229.23:50:33.67#ibcon#enter sib2, iclass 24, count 0 2006.229.23:50:33.67#ibcon#flushed, iclass 24, count 0 2006.229.23:50:33.67#ibcon#about to write, iclass 24, count 0 2006.229.23:50:33.67#ibcon#wrote, iclass 24, count 0 2006.229.23:50:33.67#ibcon#about to read 3, iclass 24, count 0 2006.229.23:50:33.70#ibcon#read 3, iclass 24, count 0 2006.229.23:50:33.70#ibcon#about to read 4, iclass 24, count 0 2006.229.23:50:33.70#ibcon#read 4, iclass 24, count 0 2006.229.23:50:33.70#ibcon#about to read 5, iclass 24, count 0 2006.229.23:50:33.70#ibcon#read 5, iclass 24, count 0 2006.229.23:50:33.70#ibcon#about to read 6, iclass 24, count 0 2006.229.23:50:33.70#ibcon#read 6, iclass 24, count 0 2006.229.23:50:33.70#ibcon#end of sib2, iclass 24, count 0 2006.229.23:50:33.70#ibcon#*after write, iclass 24, count 0 2006.229.23:50:33.70#ibcon#*before return 0, iclass 24, count 0 2006.229.23:50:33.70#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:50:33.70#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.229.23:50:33.70#ibcon#about to clear, iclass 24 cls_cnt 0 2006.229.23:50:33.70#ibcon#cleared, iclass 24 cls_cnt 0 2006.229.23:50:33.70$setupk4/ifdk4 2006.229.23:50:33.70$ifdk4/lo= 2006.229.23:50:33.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.229.23:50:33.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.229.23:50:33.70$ifdk4/patch= 2006.229.23:50:33.70$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.229.23:50:33.70$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.229.23:50:33.70$setupk4/!*+20s 2006.229.23:50:38.33#abcon#<5=/07 2.4 6.4 30.42 831002.7\r\n> 2006.229.23:50:38.35#abcon#{5=INTERFACE CLEAR} 2006.229.23:50:38.41#abcon#[5=S1D000X0/0*\r\n] 2006.229.23:50:48.20$setupk4/"tpicd 2006.229.23:50:48.20$setupk4/echo=off 2006.229.23:50:48.20$setupk4/xlog=off 2006.229.23:50:48.20:!2006.229.23:57:43 2006.229.23:51:24.14#trakl#Source acquired 2006.229.23:51:26.14#flagr#flagr/antenna,acquired 2006.229.23:57:43.00:preob 2006.229.23:57:43.14/onsource/TRACKING 2006.229.23:57:43.14:!2006.229.23:57:53 2006.229.23:57:53.00:"tape 2006.229.23:57:53.00:"st=record 2006.229.23:57:53.00:data_valid=on 2006.229.23:57:53.00:midob 2006.229.23:57:53.14/onsource/TRACKING 2006.229.23:57:53.14/wx/30.77,1002.7,77 2006.229.23:57:53.33/cable/+6.4071E-03 2006.229.23:57:54.42/va/01,08,usb,yes,29,31 2006.229.23:57:54.42/va/02,07,usb,yes,31,32 2006.229.23:57:54.42/va/03,06,usb,yes,39,41 2006.229.23:57:54.42/va/04,07,usb,yes,32,34 2006.229.23:57:54.42/va/05,04,usb,yes,29,29 2006.229.23:57:54.42/va/06,04,usb,yes,32,32 2006.229.23:57:54.42/va/07,05,usb,yes,28,29 2006.229.23:57:54.42/va/08,06,usb,yes,20,26 2006.229.23:57:54.65/valo/01,524.99,yes,locked 2006.229.23:57:54.65/valo/02,534.99,yes,locked 2006.229.23:57:54.65/valo/03,564.99,yes,locked 2006.229.23:57:54.65/valo/04,624.99,yes,locked 2006.229.23:57:54.65/valo/05,734.99,yes,locked 2006.229.23:57:54.65/valo/06,814.99,yes,locked 2006.229.23:57:54.65/valo/07,864.99,yes,locked 2006.229.23:57:54.65/valo/08,884.99,yes,locked 2006.229.23:57:55.74/vb/01,04,usb,yes,31,29 2006.229.23:57:55.74/vb/02,04,usb,yes,33,33 2006.229.23:57:55.74/vb/03,04,usb,yes,30,33 2006.229.23:57:55.74/vb/04,04,usb,yes,35,33 2006.229.23:57:55.74/vb/05,04,usb,yes,27,29 2006.229.23:57:55.74/vb/06,04,usb,yes,31,28 2006.229.23:57:55.74/vb/07,04,usb,yes,31,31 2006.229.23:57:55.74/vb/08,04,usb,yes,29,32 2006.229.23:57:55.97/vblo/01,629.99,yes,locked 2006.229.23:57:55.97/vblo/02,634.99,yes,locked 2006.229.23:57:55.97/vblo/03,649.99,yes,locked 2006.229.23:57:55.97/vblo/04,679.99,yes,locked 2006.229.23:57:55.97/vblo/05,709.99,yes,locked 2006.229.23:57:55.97/vblo/06,719.99,yes,locked 2006.229.23:57:55.97/vblo/07,734.99,yes,locked 2006.229.23:57:55.97/vblo/08,744.99,yes,locked 2006.229.23:57:56.12/vabw/8 2006.229.23:57:56.27/vbbw/8 2006.229.23:57:56.40/xfe/off,on,12.2 2006.229.23:57:56.79/ifatt/23,28,28,28 2006.229.23:57:57.07/fmout-gps/S +4.53E-07 2006.229.23:57:57.11:!2006.230.00:01:33 2006.230.00:01:33.01:data_valid=off 2006.230.00:01:33.01:"et 2006.230.00:01:33.01:!+3s 2006.230.00:01:36.02:"tape 2006.230.00:01:36.02:postob 2006.230.00:01:36.18/cable/+6.4071E-03 2006.230.00:01:36.18/wx/30.92,1002.7,78 2006.230.00:01:36.24/fmout-gps/S +4.54E-07 2006.230.00:01:36.24:scan_name=230-0006,jd0608,320 2006.230.00:01:36.24:source=nrao150,035929.75,505750.2,2000.0,ccw 2006.230.00:01:38.13:checkk5 2006.230.00:01:38.13#flagr#flagr/antenna,new-source 2006.230.00:01:38.55/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:01:38.93/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:01:39.34/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:01:39.72/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:01:40.11/chk_obsdata//k5ts1/T2292357??a.dat file size is correct (nominal:880MB, actual:876MB). 2006.230.00:01:40.51/chk_obsdata//k5ts2/T2292357??b.dat file size is correct (nominal:880MB, actual:876MB). 2006.230.00:01:40.91/chk_obsdata//k5ts3/T2292357??c.dat file size is correct (nominal:880MB, actual:876MB). 2006.230.00:01:41.30/chk_obsdata//k5ts4/T2292357??d.dat file size is correct (nominal:880MB, actual:876MB). 2006.230.00:01:42.02/k5log//k5ts1_log_newline 2006.230.00:01:42.70/k5log//k5ts2_log_newline 2006.230.00:01:43.41/k5log//k5ts3_log_newline 2006.230.00:01:44.13/k5log//k5ts4_log_newline 2006.230.00:01:44.16/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:01:44.16:setupk4=1 2006.230.00:01:44.16$setupk4/echo=on 2006.230.00:01:44.16$setupk4/pcalon 2006.230.00:01:44.16$pcalon/"no phase cal control is implemented here 2006.230.00:01:44.16$setupk4/"tpicd=stop 2006.230.00:01:44.16$setupk4/"rec=synch_on 2006.230.00:01:44.16$setupk4/"rec_mode=128 2006.230.00:01:44.16$setupk4/!* 2006.230.00:01:44.16$setupk4/recpk4 2006.230.00:01:44.16$recpk4/recpatch= 2006.230.00:01:44.16$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:01:44.16$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:01:44.16$setupk4/vck44 2006.230.00:01:44.16$vck44/valo=1,524.99 2006.230.00:01:44.16#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.00:01:44.16#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.00:01:44.16#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:44.16#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:44.16#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:44.16#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:44.16#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:01:44.16#ibcon#first serial, iclass 3, count 0 2006.230.00:01:44.16#ibcon#enter sib2, iclass 3, count 0 2006.230.00:01:44.16#ibcon#flushed, iclass 3, count 0 2006.230.00:01:44.16#ibcon#about to write, iclass 3, count 0 2006.230.00:01:44.16#ibcon#wrote, iclass 3, count 0 2006.230.00:01:44.16#ibcon#about to read 3, iclass 3, count 0 2006.230.00:01:44.17#ibcon#read 3, iclass 3, count 0 2006.230.00:01:44.17#ibcon#about to read 4, iclass 3, count 0 2006.230.00:01:44.17#ibcon#read 4, iclass 3, count 0 2006.230.00:01:44.17#ibcon#about to read 5, iclass 3, count 0 2006.230.00:01:44.17#ibcon#read 5, iclass 3, count 0 2006.230.00:01:44.17#ibcon#about to read 6, iclass 3, count 0 2006.230.00:01:44.17#ibcon#read 6, iclass 3, count 0 2006.230.00:01:44.17#ibcon#end of sib2, iclass 3, count 0 2006.230.00:01:44.17#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:01:44.17#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:01:44.17#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:01:44.17#ibcon#*before write, iclass 3, count 0 2006.230.00:01:44.17#ibcon#enter sib2, iclass 3, count 0 2006.230.00:01:44.17#ibcon#flushed, iclass 3, count 0 2006.230.00:01:44.17#ibcon#about to write, iclass 3, count 0 2006.230.00:01:44.17#ibcon#wrote, iclass 3, count 0 2006.230.00:01:44.17#ibcon#about to read 3, iclass 3, count 0 2006.230.00:01:44.22#ibcon#read 3, iclass 3, count 0 2006.230.00:01:44.22#ibcon#about to read 4, iclass 3, count 0 2006.230.00:01:44.22#ibcon#read 4, iclass 3, count 0 2006.230.00:01:44.22#ibcon#about to read 5, iclass 3, count 0 2006.230.00:01:44.22#ibcon#read 5, iclass 3, count 0 2006.230.00:01:44.22#ibcon#about to read 6, iclass 3, count 0 2006.230.00:01:44.22#ibcon#read 6, iclass 3, count 0 2006.230.00:01:44.22#ibcon#end of sib2, iclass 3, count 0 2006.230.00:01:44.22#ibcon#*after write, iclass 3, count 0 2006.230.00:01:44.22#ibcon#*before return 0, iclass 3, count 0 2006.230.00:01:44.22#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:44.22#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:44.22#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:01:44.22#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:01:44.22$vck44/va=1,8 2006.230.00:01:44.22#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.00:01:44.22#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.00:01:44.22#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:44.22#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:44.22#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:44.22#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:44.22#ibcon#enter wrdev, iclass 5, count 2 2006.230.00:01:44.22#ibcon#first serial, iclass 5, count 2 2006.230.00:01:44.22#ibcon#enter sib2, iclass 5, count 2 2006.230.00:01:44.22#ibcon#flushed, iclass 5, count 2 2006.230.00:01:44.22#ibcon#about to write, iclass 5, count 2 2006.230.00:01:44.22#ibcon#wrote, iclass 5, count 2 2006.230.00:01:44.22#ibcon#about to read 3, iclass 5, count 2 2006.230.00:01:44.24#ibcon#read 3, iclass 5, count 2 2006.230.00:01:44.24#ibcon#about to read 4, iclass 5, count 2 2006.230.00:01:44.24#ibcon#read 4, iclass 5, count 2 2006.230.00:01:44.24#ibcon#about to read 5, iclass 5, count 2 2006.230.00:01:44.24#ibcon#read 5, iclass 5, count 2 2006.230.00:01:44.24#ibcon#about to read 6, iclass 5, count 2 2006.230.00:01:44.24#ibcon#read 6, iclass 5, count 2 2006.230.00:01:44.24#ibcon#end of sib2, iclass 5, count 2 2006.230.00:01:44.24#ibcon#*mode == 0, iclass 5, count 2 2006.230.00:01:44.24#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.00:01:44.24#ibcon#[25=AT01-08\r\n] 2006.230.00:01:44.24#ibcon#*before write, iclass 5, count 2 2006.230.00:01:44.24#ibcon#enter sib2, iclass 5, count 2 2006.230.00:01:44.24#ibcon#flushed, iclass 5, count 2 2006.230.00:01:44.24#ibcon#about to write, iclass 5, count 2 2006.230.00:01:44.24#ibcon#wrote, iclass 5, count 2 2006.230.00:01:44.24#ibcon#about to read 3, iclass 5, count 2 2006.230.00:01:44.27#ibcon#read 3, iclass 5, count 2 2006.230.00:01:44.27#ibcon#about to read 4, iclass 5, count 2 2006.230.00:01:44.27#ibcon#read 4, iclass 5, count 2 2006.230.00:01:44.27#ibcon#about to read 5, iclass 5, count 2 2006.230.00:01:44.27#ibcon#read 5, iclass 5, count 2 2006.230.00:01:44.27#ibcon#about to read 6, iclass 5, count 2 2006.230.00:01:44.27#ibcon#read 6, iclass 5, count 2 2006.230.00:01:44.27#ibcon#end of sib2, iclass 5, count 2 2006.230.00:01:44.27#ibcon#*after write, iclass 5, count 2 2006.230.00:01:44.27#ibcon#*before return 0, iclass 5, count 2 2006.230.00:01:44.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:44.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:44.27#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.00:01:44.27#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:44.27#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:44.39#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:44.39#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:44.39#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:01:44.39#ibcon#first serial, iclass 5, count 0 2006.230.00:01:44.39#ibcon#enter sib2, iclass 5, count 0 2006.230.00:01:44.39#ibcon#flushed, iclass 5, count 0 2006.230.00:01:44.39#ibcon#about to write, iclass 5, count 0 2006.230.00:01:44.39#ibcon#wrote, iclass 5, count 0 2006.230.00:01:44.39#ibcon#about to read 3, iclass 5, count 0 2006.230.00:01:44.41#ibcon#read 3, iclass 5, count 0 2006.230.00:01:44.41#ibcon#about to read 4, iclass 5, count 0 2006.230.00:01:44.41#ibcon#read 4, iclass 5, count 0 2006.230.00:01:44.41#ibcon#about to read 5, iclass 5, count 0 2006.230.00:01:44.41#ibcon#read 5, iclass 5, count 0 2006.230.00:01:44.41#ibcon#about to read 6, iclass 5, count 0 2006.230.00:01:44.41#ibcon#read 6, iclass 5, count 0 2006.230.00:01:44.41#ibcon#end of sib2, iclass 5, count 0 2006.230.00:01:44.41#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:01:44.41#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:01:44.41#ibcon#[25=USB\r\n] 2006.230.00:01:44.41#ibcon#*before write, iclass 5, count 0 2006.230.00:01:44.41#ibcon#enter sib2, iclass 5, count 0 2006.230.00:01:44.41#ibcon#flushed, iclass 5, count 0 2006.230.00:01:44.41#ibcon#about to write, iclass 5, count 0 2006.230.00:01:44.41#ibcon#wrote, iclass 5, count 0 2006.230.00:01:44.41#ibcon#about to read 3, iclass 5, count 0 2006.230.00:01:44.44#ibcon#read 3, iclass 5, count 0 2006.230.00:01:44.44#ibcon#about to read 4, iclass 5, count 0 2006.230.00:01:44.44#ibcon#read 4, iclass 5, count 0 2006.230.00:01:44.44#ibcon#about to read 5, iclass 5, count 0 2006.230.00:01:44.44#ibcon#read 5, iclass 5, count 0 2006.230.00:01:44.44#ibcon#about to read 6, iclass 5, count 0 2006.230.00:01:44.44#ibcon#read 6, iclass 5, count 0 2006.230.00:01:44.44#ibcon#end of sib2, iclass 5, count 0 2006.230.00:01:44.44#ibcon#*after write, iclass 5, count 0 2006.230.00:01:44.44#ibcon#*before return 0, iclass 5, count 0 2006.230.00:01:44.44#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:44.44#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:44.44#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:01:44.44#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:01:44.44$vck44/valo=2,534.99 2006.230.00:01:44.44#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.00:01:44.44#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.00:01:44.44#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:44.44#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:44.44#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:44.44#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:44.44#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:01:44.44#ibcon#first serial, iclass 7, count 0 2006.230.00:01:44.44#ibcon#enter sib2, iclass 7, count 0 2006.230.00:01:44.44#ibcon#flushed, iclass 7, count 0 2006.230.00:01:44.44#ibcon#about to write, iclass 7, count 0 2006.230.00:01:44.44#ibcon#wrote, iclass 7, count 0 2006.230.00:01:44.44#ibcon#about to read 3, iclass 7, count 0 2006.230.00:01:44.46#ibcon#read 3, iclass 7, count 0 2006.230.00:01:44.46#ibcon#about to read 4, iclass 7, count 0 2006.230.00:01:44.46#ibcon#read 4, iclass 7, count 0 2006.230.00:01:44.46#ibcon#about to read 5, iclass 7, count 0 2006.230.00:01:44.46#ibcon#read 5, iclass 7, count 0 2006.230.00:01:44.46#ibcon#about to read 6, iclass 7, count 0 2006.230.00:01:44.46#ibcon#read 6, iclass 7, count 0 2006.230.00:01:44.46#ibcon#end of sib2, iclass 7, count 0 2006.230.00:01:44.46#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:01:44.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:01:44.46#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:01:44.46#ibcon#*before write, iclass 7, count 0 2006.230.00:01:44.46#ibcon#enter sib2, iclass 7, count 0 2006.230.00:01:44.46#ibcon#flushed, iclass 7, count 0 2006.230.00:01:44.46#ibcon#about to write, iclass 7, count 0 2006.230.00:01:44.46#ibcon#wrote, iclass 7, count 0 2006.230.00:01:44.46#ibcon#about to read 3, iclass 7, count 0 2006.230.00:01:44.50#ibcon#read 3, iclass 7, count 0 2006.230.00:01:44.50#ibcon#about to read 4, iclass 7, count 0 2006.230.00:01:44.50#ibcon#read 4, iclass 7, count 0 2006.230.00:01:44.50#ibcon#about to read 5, iclass 7, count 0 2006.230.00:01:44.50#ibcon#read 5, iclass 7, count 0 2006.230.00:01:44.50#ibcon#about to read 6, iclass 7, count 0 2006.230.00:01:44.50#ibcon#read 6, iclass 7, count 0 2006.230.00:01:44.50#ibcon#end of sib2, iclass 7, count 0 2006.230.00:01:44.50#ibcon#*after write, iclass 7, count 0 2006.230.00:01:44.50#ibcon#*before return 0, iclass 7, count 0 2006.230.00:01:44.50#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:44.50#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:44.50#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:01:44.50#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:01:44.50$vck44/va=2,7 2006.230.00:01:44.50#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.00:01:44.50#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.00:01:44.50#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:44.50#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:44.56#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:44.56#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:44.56#ibcon#enter wrdev, iclass 11, count 2 2006.230.00:01:44.56#ibcon#first serial, iclass 11, count 2 2006.230.00:01:44.56#ibcon#enter sib2, iclass 11, count 2 2006.230.00:01:44.56#ibcon#flushed, iclass 11, count 2 2006.230.00:01:44.56#ibcon#about to write, iclass 11, count 2 2006.230.00:01:44.56#ibcon#wrote, iclass 11, count 2 2006.230.00:01:44.56#ibcon#about to read 3, iclass 11, count 2 2006.230.00:01:44.58#ibcon#read 3, iclass 11, count 2 2006.230.00:01:44.58#ibcon#about to read 4, iclass 11, count 2 2006.230.00:01:44.58#ibcon#read 4, iclass 11, count 2 2006.230.00:01:44.58#ibcon#about to read 5, iclass 11, count 2 2006.230.00:01:44.58#ibcon#read 5, iclass 11, count 2 2006.230.00:01:44.58#ibcon#about to read 6, iclass 11, count 2 2006.230.00:01:44.58#ibcon#read 6, iclass 11, count 2 2006.230.00:01:44.58#ibcon#end of sib2, iclass 11, count 2 2006.230.00:01:44.58#ibcon#*mode == 0, iclass 11, count 2 2006.230.00:01:44.58#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.00:01:44.58#ibcon#[25=AT02-07\r\n] 2006.230.00:01:44.58#ibcon#*before write, iclass 11, count 2 2006.230.00:01:44.58#ibcon#enter sib2, iclass 11, count 2 2006.230.00:01:44.58#ibcon#flushed, iclass 11, count 2 2006.230.00:01:44.58#ibcon#about to write, iclass 11, count 2 2006.230.00:01:44.58#ibcon#wrote, iclass 11, count 2 2006.230.00:01:44.58#ibcon#about to read 3, iclass 11, count 2 2006.230.00:01:44.61#ibcon#read 3, iclass 11, count 2 2006.230.00:01:44.61#ibcon#about to read 4, iclass 11, count 2 2006.230.00:01:44.61#ibcon#read 4, iclass 11, count 2 2006.230.00:01:44.61#ibcon#about to read 5, iclass 11, count 2 2006.230.00:01:44.61#ibcon#read 5, iclass 11, count 2 2006.230.00:01:44.61#ibcon#about to read 6, iclass 11, count 2 2006.230.00:01:44.61#ibcon#read 6, iclass 11, count 2 2006.230.00:01:44.61#ibcon#end of sib2, iclass 11, count 2 2006.230.00:01:44.61#ibcon#*after write, iclass 11, count 2 2006.230.00:01:44.61#ibcon#*before return 0, iclass 11, count 2 2006.230.00:01:44.61#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:44.61#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:44.61#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.00:01:44.61#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:44.61#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:44.73#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:44.73#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:44.73#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:01:44.73#ibcon#first serial, iclass 11, count 0 2006.230.00:01:44.73#ibcon#enter sib2, iclass 11, count 0 2006.230.00:01:44.73#ibcon#flushed, iclass 11, count 0 2006.230.00:01:44.73#ibcon#about to write, iclass 11, count 0 2006.230.00:01:44.73#ibcon#wrote, iclass 11, count 0 2006.230.00:01:44.73#ibcon#about to read 3, iclass 11, count 0 2006.230.00:01:44.75#ibcon#read 3, iclass 11, count 0 2006.230.00:01:44.75#ibcon#about to read 4, iclass 11, count 0 2006.230.00:01:44.75#ibcon#read 4, iclass 11, count 0 2006.230.00:01:44.75#ibcon#about to read 5, iclass 11, count 0 2006.230.00:01:44.75#ibcon#read 5, iclass 11, count 0 2006.230.00:01:44.75#ibcon#about to read 6, iclass 11, count 0 2006.230.00:01:44.75#ibcon#read 6, iclass 11, count 0 2006.230.00:01:44.75#ibcon#end of sib2, iclass 11, count 0 2006.230.00:01:44.75#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:01:44.75#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:01:44.75#ibcon#[25=USB\r\n] 2006.230.00:01:44.75#ibcon#*before write, iclass 11, count 0 2006.230.00:01:44.75#ibcon#enter sib2, iclass 11, count 0 2006.230.00:01:44.75#ibcon#flushed, iclass 11, count 0 2006.230.00:01:44.75#ibcon#about to write, iclass 11, count 0 2006.230.00:01:44.75#ibcon#wrote, iclass 11, count 0 2006.230.00:01:44.75#ibcon#about to read 3, iclass 11, count 0 2006.230.00:01:44.78#ibcon#read 3, iclass 11, count 0 2006.230.00:01:44.78#ibcon#about to read 4, iclass 11, count 0 2006.230.00:01:44.78#ibcon#read 4, iclass 11, count 0 2006.230.00:01:44.78#ibcon#about to read 5, iclass 11, count 0 2006.230.00:01:44.78#ibcon#read 5, iclass 11, count 0 2006.230.00:01:44.78#ibcon#about to read 6, iclass 11, count 0 2006.230.00:01:44.78#ibcon#read 6, iclass 11, count 0 2006.230.00:01:44.78#ibcon#end of sib2, iclass 11, count 0 2006.230.00:01:44.78#ibcon#*after write, iclass 11, count 0 2006.230.00:01:44.78#ibcon#*before return 0, iclass 11, count 0 2006.230.00:01:44.78#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:44.78#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:44.78#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:01:44.78#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:01:44.78$vck44/valo=3,564.99 2006.230.00:01:44.78#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.00:01:44.78#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.00:01:44.78#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:44.78#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:44.78#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:44.78#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:44.78#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:01:44.78#ibcon#first serial, iclass 13, count 0 2006.230.00:01:44.78#ibcon#enter sib2, iclass 13, count 0 2006.230.00:01:44.78#ibcon#flushed, iclass 13, count 0 2006.230.00:01:44.78#ibcon#about to write, iclass 13, count 0 2006.230.00:01:44.78#ibcon#wrote, iclass 13, count 0 2006.230.00:01:44.78#ibcon#about to read 3, iclass 13, count 0 2006.230.00:01:44.80#ibcon#read 3, iclass 13, count 0 2006.230.00:01:44.80#ibcon#about to read 4, iclass 13, count 0 2006.230.00:01:44.80#ibcon#read 4, iclass 13, count 0 2006.230.00:01:44.80#ibcon#about to read 5, iclass 13, count 0 2006.230.00:01:44.80#ibcon#read 5, iclass 13, count 0 2006.230.00:01:44.80#ibcon#about to read 6, iclass 13, count 0 2006.230.00:01:44.80#ibcon#read 6, iclass 13, count 0 2006.230.00:01:44.80#ibcon#end of sib2, iclass 13, count 0 2006.230.00:01:44.80#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:01:44.80#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:01:44.80#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:01:44.80#ibcon#*before write, iclass 13, count 0 2006.230.00:01:44.80#ibcon#enter sib2, iclass 13, count 0 2006.230.00:01:44.80#ibcon#flushed, iclass 13, count 0 2006.230.00:01:44.80#ibcon#about to write, iclass 13, count 0 2006.230.00:01:44.80#ibcon#wrote, iclass 13, count 0 2006.230.00:01:44.80#ibcon#about to read 3, iclass 13, count 0 2006.230.00:01:44.84#ibcon#read 3, iclass 13, count 0 2006.230.00:01:44.84#ibcon#about to read 4, iclass 13, count 0 2006.230.00:01:44.84#ibcon#read 4, iclass 13, count 0 2006.230.00:01:44.84#ibcon#about to read 5, iclass 13, count 0 2006.230.00:01:44.84#ibcon#read 5, iclass 13, count 0 2006.230.00:01:44.84#ibcon#about to read 6, iclass 13, count 0 2006.230.00:01:44.84#ibcon#read 6, iclass 13, count 0 2006.230.00:01:44.84#ibcon#end of sib2, iclass 13, count 0 2006.230.00:01:44.84#ibcon#*after write, iclass 13, count 0 2006.230.00:01:44.84#ibcon#*before return 0, iclass 13, count 0 2006.230.00:01:44.84#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:44.84#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:44.84#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:01:44.84#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:01:44.84$vck44/va=3,6 2006.230.00:01:44.84#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.00:01:44.84#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.00:01:44.84#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:44.84#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:44.90#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:44.90#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:44.90#ibcon#enter wrdev, iclass 15, count 2 2006.230.00:01:44.90#ibcon#first serial, iclass 15, count 2 2006.230.00:01:44.90#ibcon#enter sib2, iclass 15, count 2 2006.230.00:01:44.90#ibcon#flushed, iclass 15, count 2 2006.230.00:01:44.90#ibcon#about to write, iclass 15, count 2 2006.230.00:01:44.90#ibcon#wrote, iclass 15, count 2 2006.230.00:01:44.90#ibcon#about to read 3, iclass 15, count 2 2006.230.00:01:44.92#ibcon#read 3, iclass 15, count 2 2006.230.00:01:44.92#ibcon#about to read 4, iclass 15, count 2 2006.230.00:01:44.92#ibcon#read 4, iclass 15, count 2 2006.230.00:01:44.92#ibcon#about to read 5, iclass 15, count 2 2006.230.00:01:44.92#ibcon#read 5, iclass 15, count 2 2006.230.00:01:44.92#ibcon#about to read 6, iclass 15, count 2 2006.230.00:01:44.92#ibcon#read 6, iclass 15, count 2 2006.230.00:01:44.92#ibcon#end of sib2, iclass 15, count 2 2006.230.00:01:44.92#ibcon#*mode == 0, iclass 15, count 2 2006.230.00:01:44.92#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.00:01:44.92#ibcon#[25=AT03-06\r\n] 2006.230.00:01:44.92#ibcon#*before write, iclass 15, count 2 2006.230.00:01:44.92#ibcon#enter sib2, iclass 15, count 2 2006.230.00:01:44.92#ibcon#flushed, iclass 15, count 2 2006.230.00:01:44.92#ibcon#about to write, iclass 15, count 2 2006.230.00:01:44.92#ibcon#wrote, iclass 15, count 2 2006.230.00:01:44.92#ibcon#about to read 3, iclass 15, count 2 2006.230.00:01:44.95#ibcon#read 3, iclass 15, count 2 2006.230.00:01:44.95#ibcon#about to read 4, iclass 15, count 2 2006.230.00:01:44.95#ibcon#read 4, iclass 15, count 2 2006.230.00:01:44.95#ibcon#about to read 5, iclass 15, count 2 2006.230.00:01:44.95#ibcon#read 5, iclass 15, count 2 2006.230.00:01:44.95#ibcon#about to read 6, iclass 15, count 2 2006.230.00:01:44.95#ibcon#read 6, iclass 15, count 2 2006.230.00:01:44.95#ibcon#end of sib2, iclass 15, count 2 2006.230.00:01:44.95#ibcon#*after write, iclass 15, count 2 2006.230.00:01:44.95#ibcon#*before return 0, iclass 15, count 2 2006.230.00:01:44.95#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:44.95#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:44.95#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.00:01:44.95#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:44.95#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:45.07#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:45.07#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:45.07#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:01:45.07#ibcon#first serial, iclass 15, count 0 2006.230.00:01:45.07#ibcon#enter sib2, iclass 15, count 0 2006.230.00:01:45.07#ibcon#flushed, iclass 15, count 0 2006.230.00:01:45.07#ibcon#about to write, iclass 15, count 0 2006.230.00:01:45.07#ibcon#wrote, iclass 15, count 0 2006.230.00:01:45.07#ibcon#about to read 3, iclass 15, count 0 2006.230.00:01:45.09#ibcon#read 3, iclass 15, count 0 2006.230.00:01:45.09#ibcon#about to read 4, iclass 15, count 0 2006.230.00:01:45.09#ibcon#read 4, iclass 15, count 0 2006.230.00:01:45.09#ibcon#about to read 5, iclass 15, count 0 2006.230.00:01:45.09#ibcon#read 5, iclass 15, count 0 2006.230.00:01:45.09#ibcon#about to read 6, iclass 15, count 0 2006.230.00:01:45.09#ibcon#read 6, iclass 15, count 0 2006.230.00:01:45.09#ibcon#end of sib2, iclass 15, count 0 2006.230.00:01:45.09#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:01:45.09#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:01:45.09#ibcon#[25=USB\r\n] 2006.230.00:01:45.09#ibcon#*before write, iclass 15, count 0 2006.230.00:01:45.09#ibcon#enter sib2, iclass 15, count 0 2006.230.00:01:45.09#ibcon#flushed, iclass 15, count 0 2006.230.00:01:45.09#ibcon#about to write, iclass 15, count 0 2006.230.00:01:45.09#ibcon#wrote, iclass 15, count 0 2006.230.00:01:45.09#ibcon#about to read 3, iclass 15, count 0 2006.230.00:01:45.12#ibcon#read 3, iclass 15, count 0 2006.230.00:01:45.12#ibcon#about to read 4, iclass 15, count 0 2006.230.00:01:45.12#ibcon#read 4, iclass 15, count 0 2006.230.00:01:45.12#ibcon#about to read 5, iclass 15, count 0 2006.230.00:01:45.12#ibcon#read 5, iclass 15, count 0 2006.230.00:01:45.12#ibcon#about to read 6, iclass 15, count 0 2006.230.00:01:45.12#ibcon#read 6, iclass 15, count 0 2006.230.00:01:45.12#ibcon#end of sib2, iclass 15, count 0 2006.230.00:01:45.12#ibcon#*after write, iclass 15, count 0 2006.230.00:01:45.12#ibcon#*before return 0, iclass 15, count 0 2006.230.00:01:45.12#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:45.12#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:45.12#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:01:45.12#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:01:45.12$vck44/valo=4,624.99 2006.230.00:01:45.12#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:01:45.12#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:01:45.12#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:45.12#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:45.12#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:45.12#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:45.12#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:01:45.12#ibcon#first serial, iclass 17, count 0 2006.230.00:01:45.12#ibcon#enter sib2, iclass 17, count 0 2006.230.00:01:45.12#ibcon#flushed, iclass 17, count 0 2006.230.00:01:45.12#ibcon#about to write, iclass 17, count 0 2006.230.00:01:45.12#ibcon#wrote, iclass 17, count 0 2006.230.00:01:45.12#ibcon#about to read 3, iclass 17, count 0 2006.230.00:01:45.14#ibcon#read 3, iclass 17, count 0 2006.230.00:01:45.14#ibcon#about to read 4, iclass 17, count 0 2006.230.00:01:45.14#ibcon#read 4, iclass 17, count 0 2006.230.00:01:45.14#ibcon#about to read 5, iclass 17, count 0 2006.230.00:01:45.14#ibcon#read 5, iclass 17, count 0 2006.230.00:01:45.14#ibcon#about to read 6, iclass 17, count 0 2006.230.00:01:45.14#ibcon#read 6, iclass 17, count 0 2006.230.00:01:45.14#ibcon#end of sib2, iclass 17, count 0 2006.230.00:01:45.14#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:01:45.14#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:01:45.14#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:01:45.14#ibcon#*before write, iclass 17, count 0 2006.230.00:01:45.14#ibcon#enter sib2, iclass 17, count 0 2006.230.00:01:45.14#ibcon#flushed, iclass 17, count 0 2006.230.00:01:45.14#ibcon#about to write, iclass 17, count 0 2006.230.00:01:45.14#ibcon#wrote, iclass 17, count 0 2006.230.00:01:45.14#ibcon#about to read 3, iclass 17, count 0 2006.230.00:01:45.18#ibcon#read 3, iclass 17, count 0 2006.230.00:01:45.18#ibcon#about to read 4, iclass 17, count 0 2006.230.00:01:45.18#ibcon#read 4, iclass 17, count 0 2006.230.00:01:45.18#ibcon#about to read 5, iclass 17, count 0 2006.230.00:01:45.18#ibcon#read 5, iclass 17, count 0 2006.230.00:01:45.18#ibcon#about to read 6, iclass 17, count 0 2006.230.00:01:45.18#ibcon#read 6, iclass 17, count 0 2006.230.00:01:45.18#ibcon#end of sib2, iclass 17, count 0 2006.230.00:01:45.18#ibcon#*after write, iclass 17, count 0 2006.230.00:01:45.18#ibcon#*before return 0, iclass 17, count 0 2006.230.00:01:45.18#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:45.18#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:45.18#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:01:45.18#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:01:45.18$vck44/va=4,7 2006.230.00:01:45.18#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.00:01:45.18#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.00:01:45.18#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:45.18#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:45.24#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:45.24#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:45.24#ibcon#enter wrdev, iclass 19, count 2 2006.230.00:01:45.24#ibcon#first serial, iclass 19, count 2 2006.230.00:01:45.24#ibcon#enter sib2, iclass 19, count 2 2006.230.00:01:45.24#ibcon#flushed, iclass 19, count 2 2006.230.00:01:45.24#ibcon#about to write, iclass 19, count 2 2006.230.00:01:45.24#ibcon#wrote, iclass 19, count 2 2006.230.00:01:45.24#ibcon#about to read 3, iclass 19, count 2 2006.230.00:01:45.26#ibcon#read 3, iclass 19, count 2 2006.230.00:01:45.26#ibcon#about to read 4, iclass 19, count 2 2006.230.00:01:45.26#ibcon#read 4, iclass 19, count 2 2006.230.00:01:45.26#ibcon#about to read 5, iclass 19, count 2 2006.230.00:01:45.26#ibcon#read 5, iclass 19, count 2 2006.230.00:01:45.26#ibcon#about to read 6, iclass 19, count 2 2006.230.00:01:45.26#ibcon#read 6, iclass 19, count 2 2006.230.00:01:45.26#ibcon#end of sib2, iclass 19, count 2 2006.230.00:01:45.26#ibcon#*mode == 0, iclass 19, count 2 2006.230.00:01:45.26#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.00:01:45.26#ibcon#[25=AT04-07\r\n] 2006.230.00:01:45.26#ibcon#*before write, iclass 19, count 2 2006.230.00:01:45.26#ibcon#enter sib2, iclass 19, count 2 2006.230.00:01:45.26#ibcon#flushed, iclass 19, count 2 2006.230.00:01:45.26#ibcon#about to write, iclass 19, count 2 2006.230.00:01:45.26#ibcon#wrote, iclass 19, count 2 2006.230.00:01:45.26#ibcon#about to read 3, iclass 19, count 2 2006.230.00:01:45.29#ibcon#read 3, iclass 19, count 2 2006.230.00:01:45.29#ibcon#about to read 4, iclass 19, count 2 2006.230.00:01:45.29#ibcon#read 4, iclass 19, count 2 2006.230.00:01:45.29#ibcon#about to read 5, iclass 19, count 2 2006.230.00:01:45.29#ibcon#read 5, iclass 19, count 2 2006.230.00:01:45.29#ibcon#about to read 6, iclass 19, count 2 2006.230.00:01:45.29#ibcon#read 6, iclass 19, count 2 2006.230.00:01:45.29#ibcon#end of sib2, iclass 19, count 2 2006.230.00:01:45.29#ibcon#*after write, iclass 19, count 2 2006.230.00:01:45.29#ibcon#*before return 0, iclass 19, count 2 2006.230.00:01:45.29#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:45.29#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:45.29#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.00:01:45.29#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:45.29#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:45.41#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:45.41#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:45.41#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:01:45.41#ibcon#first serial, iclass 19, count 0 2006.230.00:01:45.41#ibcon#enter sib2, iclass 19, count 0 2006.230.00:01:45.41#ibcon#flushed, iclass 19, count 0 2006.230.00:01:45.41#ibcon#about to write, iclass 19, count 0 2006.230.00:01:45.41#ibcon#wrote, iclass 19, count 0 2006.230.00:01:45.41#ibcon#about to read 3, iclass 19, count 0 2006.230.00:01:45.43#ibcon#read 3, iclass 19, count 0 2006.230.00:01:45.43#ibcon#about to read 4, iclass 19, count 0 2006.230.00:01:45.43#ibcon#read 4, iclass 19, count 0 2006.230.00:01:45.43#ibcon#about to read 5, iclass 19, count 0 2006.230.00:01:45.43#ibcon#read 5, iclass 19, count 0 2006.230.00:01:45.43#ibcon#about to read 6, iclass 19, count 0 2006.230.00:01:45.43#ibcon#read 6, iclass 19, count 0 2006.230.00:01:45.43#ibcon#end of sib2, iclass 19, count 0 2006.230.00:01:45.43#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:01:45.43#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:01:45.43#ibcon#[25=USB\r\n] 2006.230.00:01:45.43#ibcon#*before write, iclass 19, count 0 2006.230.00:01:45.43#ibcon#enter sib2, iclass 19, count 0 2006.230.00:01:45.43#ibcon#flushed, iclass 19, count 0 2006.230.00:01:45.43#ibcon#about to write, iclass 19, count 0 2006.230.00:01:45.43#ibcon#wrote, iclass 19, count 0 2006.230.00:01:45.43#ibcon#about to read 3, iclass 19, count 0 2006.230.00:01:45.46#ibcon#read 3, iclass 19, count 0 2006.230.00:01:45.46#ibcon#about to read 4, iclass 19, count 0 2006.230.00:01:45.46#ibcon#read 4, iclass 19, count 0 2006.230.00:01:45.46#ibcon#about to read 5, iclass 19, count 0 2006.230.00:01:45.46#ibcon#read 5, iclass 19, count 0 2006.230.00:01:45.46#ibcon#about to read 6, iclass 19, count 0 2006.230.00:01:45.46#ibcon#read 6, iclass 19, count 0 2006.230.00:01:45.46#ibcon#end of sib2, iclass 19, count 0 2006.230.00:01:45.46#ibcon#*after write, iclass 19, count 0 2006.230.00:01:45.46#ibcon#*before return 0, iclass 19, count 0 2006.230.00:01:45.46#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:45.46#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:45.46#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:01:45.46#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:01:45.46$vck44/valo=5,734.99 2006.230.00:01:45.46#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.00:01:45.46#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.00:01:45.46#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:45.46#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:45.46#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:45.46#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:45.46#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:01:45.46#ibcon#first serial, iclass 21, count 0 2006.230.00:01:45.46#ibcon#enter sib2, iclass 21, count 0 2006.230.00:01:45.46#ibcon#flushed, iclass 21, count 0 2006.230.00:01:45.46#ibcon#about to write, iclass 21, count 0 2006.230.00:01:45.46#ibcon#wrote, iclass 21, count 0 2006.230.00:01:45.46#ibcon#about to read 3, iclass 21, count 0 2006.230.00:01:45.48#ibcon#read 3, iclass 21, count 0 2006.230.00:01:45.48#ibcon#about to read 4, iclass 21, count 0 2006.230.00:01:45.48#ibcon#read 4, iclass 21, count 0 2006.230.00:01:45.48#ibcon#about to read 5, iclass 21, count 0 2006.230.00:01:45.48#ibcon#read 5, iclass 21, count 0 2006.230.00:01:45.48#ibcon#about to read 6, iclass 21, count 0 2006.230.00:01:45.48#ibcon#read 6, iclass 21, count 0 2006.230.00:01:45.48#ibcon#end of sib2, iclass 21, count 0 2006.230.00:01:45.48#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:01:45.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:01:45.48#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:01:45.48#ibcon#*before write, iclass 21, count 0 2006.230.00:01:45.48#ibcon#enter sib2, iclass 21, count 0 2006.230.00:01:45.48#ibcon#flushed, iclass 21, count 0 2006.230.00:01:45.48#ibcon#about to write, iclass 21, count 0 2006.230.00:01:45.48#ibcon#wrote, iclass 21, count 0 2006.230.00:01:45.48#ibcon#about to read 3, iclass 21, count 0 2006.230.00:01:45.52#ibcon#read 3, iclass 21, count 0 2006.230.00:01:45.52#ibcon#about to read 4, iclass 21, count 0 2006.230.00:01:45.52#ibcon#read 4, iclass 21, count 0 2006.230.00:01:45.52#ibcon#about to read 5, iclass 21, count 0 2006.230.00:01:45.52#ibcon#read 5, iclass 21, count 0 2006.230.00:01:45.52#ibcon#about to read 6, iclass 21, count 0 2006.230.00:01:45.52#ibcon#read 6, iclass 21, count 0 2006.230.00:01:45.52#ibcon#end of sib2, iclass 21, count 0 2006.230.00:01:45.52#ibcon#*after write, iclass 21, count 0 2006.230.00:01:45.52#ibcon#*before return 0, iclass 21, count 0 2006.230.00:01:45.52#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:45.52#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:45.52#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:01:45.52#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:01:45.52$vck44/va=5,4 2006.230.00:01:45.52#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.00:01:45.52#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.00:01:45.52#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:45.52#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:45.58#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:45.58#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:45.58#ibcon#enter wrdev, iclass 23, count 2 2006.230.00:01:45.58#ibcon#first serial, iclass 23, count 2 2006.230.00:01:45.58#ibcon#enter sib2, iclass 23, count 2 2006.230.00:01:45.58#ibcon#flushed, iclass 23, count 2 2006.230.00:01:45.58#ibcon#about to write, iclass 23, count 2 2006.230.00:01:45.58#ibcon#wrote, iclass 23, count 2 2006.230.00:01:45.58#ibcon#about to read 3, iclass 23, count 2 2006.230.00:01:45.60#ibcon#read 3, iclass 23, count 2 2006.230.00:01:45.60#ibcon#about to read 4, iclass 23, count 2 2006.230.00:01:45.60#ibcon#read 4, iclass 23, count 2 2006.230.00:01:45.60#ibcon#about to read 5, iclass 23, count 2 2006.230.00:01:45.60#ibcon#read 5, iclass 23, count 2 2006.230.00:01:45.60#ibcon#about to read 6, iclass 23, count 2 2006.230.00:01:45.60#ibcon#read 6, iclass 23, count 2 2006.230.00:01:45.60#ibcon#end of sib2, iclass 23, count 2 2006.230.00:01:45.60#ibcon#*mode == 0, iclass 23, count 2 2006.230.00:01:45.60#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.00:01:45.60#ibcon#[25=AT05-04\r\n] 2006.230.00:01:45.60#ibcon#*before write, iclass 23, count 2 2006.230.00:01:45.60#ibcon#enter sib2, iclass 23, count 2 2006.230.00:01:45.60#ibcon#flushed, iclass 23, count 2 2006.230.00:01:45.60#ibcon#about to write, iclass 23, count 2 2006.230.00:01:45.60#ibcon#wrote, iclass 23, count 2 2006.230.00:01:45.60#ibcon#about to read 3, iclass 23, count 2 2006.230.00:01:45.63#ibcon#read 3, iclass 23, count 2 2006.230.00:01:45.63#ibcon#about to read 4, iclass 23, count 2 2006.230.00:01:45.63#ibcon#read 4, iclass 23, count 2 2006.230.00:01:45.63#ibcon#about to read 5, iclass 23, count 2 2006.230.00:01:45.63#ibcon#read 5, iclass 23, count 2 2006.230.00:01:45.63#ibcon#about to read 6, iclass 23, count 2 2006.230.00:01:45.63#ibcon#read 6, iclass 23, count 2 2006.230.00:01:45.63#ibcon#end of sib2, iclass 23, count 2 2006.230.00:01:45.63#ibcon#*after write, iclass 23, count 2 2006.230.00:01:45.63#ibcon#*before return 0, iclass 23, count 2 2006.230.00:01:45.63#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:45.63#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:45.63#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.00:01:45.63#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:45.63#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:45.75#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:45.75#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:45.75#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:01:45.75#ibcon#first serial, iclass 23, count 0 2006.230.00:01:45.75#ibcon#enter sib2, iclass 23, count 0 2006.230.00:01:45.75#ibcon#flushed, iclass 23, count 0 2006.230.00:01:45.75#ibcon#about to write, iclass 23, count 0 2006.230.00:01:45.75#ibcon#wrote, iclass 23, count 0 2006.230.00:01:45.75#ibcon#about to read 3, iclass 23, count 0 2006.230.00:01:45.77#ibcon#read 3, iclass 23, count 0 2006.230.00:01:45.77#ibcon#about to read 4, iclass 23, count 0 2006.230.00:01:45.77#ibcon#read 4, iclass 23, count 0 2006.230.00:01:45.77#ibcon#about to read 5, iclass 23, count 0 2006.230.00:01:45.77#ibcon#read 5, iclass 23, count 0 2006.230.00:01:45.77#ibcon#about to read 6, iclass 23, count 0 2006.230.00:01:45.77#ibcon#read 6, iclass 23, count 0 2006.230.00:01:45.77#ibcon#end of sib2, iclass 23, count 0 2006.230.00:01:45.77#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:01:45.77#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:01:45.77#ibcon#[25=USB\r\n] 2006.230.00:01:45.77#ibcon#*before write, iclass 23, count 0 2006.230.00:01:45.77#ibcon#enter sib2, iclass 23, count 0 2006.230.00:01:45.77#ibcon#flushed, iclass 23, count 0 2006.230.00:01:45.77#ibcon#about to write, iclass 23, count 0 2006.230.00:01:45.77#ibcon#wrote, iclass 23, count 0 2006.230.00:01:45.77#ibcon#about to read 3, iclass 23, count 0 2006.230.00:01:45.80#ibcon#read 3, iclass 23, count 0 2006.230.00:01:45.80#ibcon#about to read 4, iclass 23, count 0 2006.230.00:01:45.80#ibcon#read 4, iclass 23, count 0 2006.230.00:01:45.80#ibcon#about to read 5, iclass 23, count 0 2006.230.00:01:45.80#ibcon#read 5, iclass 23, count 0 2006.230.00:01:45.80#ibcon#about to read 6, iclass 23, count 0 2006.230.00:01:45.80#ibcon#read 6, iclass 23, count 0 2006.230.00:01:45.80#ibcon#end of sib2, iclass 23, count 0 2006.230.00:01:45.80#ibcon#*after write, iclass 23, count 0 2006.230.00:01:45.80#ibcon#*before return 0, iclass 23, count 0 2006.230.00:01:45.80#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:45.80#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:45.80#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:01:45.80#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:01:45.80$vck44/valo=6,814.99 2006.230.00:01:45.80#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.00:01:45.80#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.00:01:45.80#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:45.80#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:45.80#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:45.80#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:45.80#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:01:45.80#ibcon#first serial, iclass 25, count 0 2006.230.00:01:45.80#ibcon#enter sib2, iclass 25, count 0 2006.230.00:01:45.80#ibcon#flushed, iclass 25, count 0 2006.230.00:01:45.80#ibcon#about to write, iclass 25, count 0 2006.230.00:01:45.80#ibcon#wrote, iclass 25, count 0 2006.230.00:01:45.80#ibcon#about to read 3, iclass 25, count 0 2006.230.00:01:45.82#ibcon#read 3, iclass 25, count 0 2006.230.00:01:45.82#ibcon#about to read 4, iclass 25, count 0 2006.230.00:01:45.82#ibcon#read 4, iclass 25, count 0 2006.230.00:01:45.82#ibcon#about to read 5, iclass 25, count 0 2006.230.00:01:45.82#ibcon#read 5, iclass 25, count 0 2006.230.00:01:45.82#ibcon#about to read 6, iclass 25, count 0 2006.230.00:01:45.82#ibcon#read 6, iclass 25, count 0 2006.230.00:01:45.82#ibcon#end of sib2, iclass 25, count 0 2006.230.00:01:45.82#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:01:45.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:01:45.82#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:01:45.82#ibcon#*before write, iclass 25, count 0 2006.230.00:01:45.82#ibcon#enter sib2, iclass 25, count 0 2006.230.00:01:45.82#ibcon#flushed, iclass 25, count 0 2006.230.00:01:45.82#ibcon#about to write, iclass 25, count 0 2006.230.00:01:45.82#ibcon#wrote, iclass 25, count 0 2006.230.00:01:45.82#ibcon#about to read 3, iclass 25, count 0 2006.230.00:01:45.86#ibcon#read 3, iclass 25, count 0 2006.230.00:01:45.86#ibcon#about to read 4, iclass 25, count 0 2006.230.00:01:45.86#ibcon#read 4, iclass 25, count 0 2006.230.00:01:45.86#ibcon#about to read 5, iclass 25, count 0 2006.230.00:01:45.86#ibcon#read 5, iclass 25, count 0 2006.230.00:01:45.86#ibcon#about to read 6, iclass 25, count 0 2006.230.00:01:45.86#ibcon#read 6, iclass 25, count 0 2006.230.00:01:45.86#ibcon#end of sib2, iclass 25, count 0 2006.230.00:01:45.86#ibcon#*after write, iclass 25, count 0 2006.230.00:01:45.86#ibcon#*before return 0, iclass 25, count 0 2006.230.00:01:45.86#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:45.86#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:45.86#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:01:45.86#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:01:45.86$vck44/va=6,4 2006.230.00:01:45.86#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.00:01:45.86#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.00:01:45.86#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:45.86#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:45.92#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:45.92#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:45.92#ibcon#enter wrdev, iclass 27, count 2 2006.230.00:01:45.92#ibcon#first serial, iclass 27, count 2 2006.230.00:01:45.92#ibcon#enter sib2, iclass 27, count 2 2006.230.00:01:45.92#ibcon#flushed, iclass 27, count 2 2006.230.00:01:45.92#ibcon#about to write, iclass 27, count 2 2006.230.00:01:45.92#ibcon#wrote, iclass 27, count 2 2006.230.00:01:45.92#ibcon#about to read 3, iclass 27, count 2 2006.230.00:01:45.94#ibcon#read 3, iclass 27, count 2 2006.230.00:01:45.94#ibcon#about to read 4, iclass 27, count 2 2006.230.00:01:45.94#ibcon#read 4, iclass 27, count 2 2006.230.00:01:45.94#ibcon#about to read 5, iclass 27, count 2 2006.230.00:01:45.94#ibcon#read 5, iclass 27, count 2 2006.230.00:01:45.94#ibcon#about to read 6, iclass 27, count 2 2006.230.00:01:45.94#ibcon#read 6, iclass 27, count 2 2006.230.00:01:45.94#ibcon#end of sib2, iclass 27, count 2 2006.230.00:01:45.94#ibcon#*mode == 0, iclass 27, count 2 2006.230.00:01:45.94#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.00:01:45.94#ibcon#[25=AT06-04\r\n] 2006.230.00:01:45.94#ibcon#*before write, iclass 27, count 2 2006.230.00:01:45.94#ibcon#enter sib2, iclass 27, count 2 2006.230.00:01:45.94#ibcon#flushed, iclass 27, count 2 2006.230.00:01:45.94#ibcon#about to write, iclass 27, count 2 2006.230.00:01:45.94#ibcon#wrote, iclass 27, count 2 2006.230.00:01:45.94#ibcon#about to read 3, iclass 27, count 2 2006.230.00:01:45.97#ibcon#read 3, iclass 27, count 2 2006.230.00:01:45.97#ibcon#about to read 4, iclass 27, count 2 2006.230.00:01:45.97#ibcon#read 4, iclass 27, count 2 2006.230.00:01:45.97#ibcon#about to read 5, iclass 27, count 2 2006.230.00:01:45.97#ibcon#read 5, iclass 27, count 2 2006.230.00:01:45.97#ibcon#about to read 6, iclass 27, count 2 2006.230.00:01:45.97#ibcon#read 6, iclass 27, count 2 2006.230.00:01:45.97#ibcon#end of sib2, iclass 27, count 2 2006.230.00:01:45.97#ibcon#*after write, iclass 27, count 2 2006.230.00:01:45.97#ibcon#*before return 0, iclass 27, count 2 2006.230.00:01:45.97#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:45.97#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:45.97#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.00:01:45.97#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:45.97#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:46.09#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:46.09#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:46.09#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:01:46.09#ibcon#first serial, iclass 27, count 0 2006.230.00:01:46.09#ibcon#enter sib2, iclass 27, count 0 2006.230.00:01:46.09#ibcon#flushed, iclass 27, count 0 2006.230.00:01:46.09#ibcon#about to write, iclass 27, count 0 2006.230.00:01:46.09#ibcon#wrote, iclass 27, count 0 2006.230.00:01:46.09#ibcon#about to read 3, iclass 27, count 0 2006.230.00:01:46.11#ibcon#read 3, iclass 27, count 0 2006.230.00:01:46.11#ibcon#about to read 4, iclass 27, count 0 2006.230.00:01:46.11#ibcon#read 4, iclass 27, count 0 2006.230.00:01:46.11#ibcon#about to read 5, iclass 27, count 0 2006.230.00:01:46.11#ibcon#read 5, iclass 27, count 0 2006.230.00:01:46.11#ibcon#about to read 6, iclass 27, count 0 2006.230.00:01:46.11#ibcon#read 6, iclass 27, count 0 2006.230.00:01:46.11#ibcon#end of sib2, iclass 27, count 0 2006.230.00:01:46.11#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:01:46.11#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:01:46.11#ibcon#[25=USB\r\n] 2006.230.00:01:46.11#ibcon#*before write, iclass 27, count 0 2006.230.00:01:46.11#ibcon#enter sib2, iclass 27, count 0 2006.230.00:01:46.11#ibcon#flushed, iclass 27, count 0 2006.230.00:01:46.11#ibcon#about to write, iclass 27, count 0 2006.230.00:01:46.11#ibcon#wrote, iclass 27, count 0 2006.230.00:01:46.11#ibcon#about to read 3, iclass 27, count 0 2006.230.00:01:46.14#ibcon#read 3, iclass 27, count 0 2006.230.00:01:46.14#ibcon#about to read 4, iclass 27, count 0 2006.230.00:01:46.14#ibcon#read 4, iclass 27, count 0 2006.230.00:01:46.14#ibcon#about to read 5, iclass 27, count 0 2006.230.00:01:46.14#ibcon#read 5, iclass 27, count 0 2006.230.00:01:46.14#ibcon#about to read 6, iclass 27, count 0 2006.230.00:01:46.14#ibcon#read 6, iclass 27, count 0 2006.230.00:01:46.14#ibcon#end of sib2, iclass 27, count 0 2006.230.00:01:46.14#ibcon#*after write, iclass 27, count 0 2006.230.00:01:46.14#ibcon#*before return 0, iclass 27, count 0 2006.230.00:01:46.14#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:46.14#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:46.14#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:01:46.14#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:01:46.14$vck44/valo=7,864.99 2006.230.00:01:46.14#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.00:01:46.14#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.00:01:46.14#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:46.14#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:46.14#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:46.14#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:46.14#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:01:46.14#ibcon#first serial, iclass 29, count 0 2006.230.00:01:46.14#ibcon#enter sib2, iclass 29, count 0 2006.230.00:01:46.14#ibcon#flushed, iclass 29, count 0 2006.230.00:01:46.14#ibcon#about to write, iclass 29, count 0 2006.230.00:01:46.14#ibcon#wrote, iclass 29, count 0 2006.230.00:01:46.14#ibcon#about to read 3, iclass 29, count 0 2006.230.00:01:46.16#ibcon#read 3, iclass 29, count 0 2006.230.00:01:46.16#ibcon#about to read 4, iclass 29, count 0 2006.230.00:01:46.16#ibcon#read 4, iclass 29, count 0 2006.230.00:01:46.16#ibcon#about to read 5, iclass 29, count 0 2006.230.00:01:46.16#ibcon#read 5, iclass 29, count 0 2006.230.00:01:46.16#ibcon#about to read 6, iclass 29, count 0 2006.230.00:01:46.16#ibcon#read 6, iclass 29, count 0 2006.230.00:01:46.16#ibcon#end of sib2, iclass 29, count 0 2006.230.00:01:46.16#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:01:46.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:01:46.16#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:01:46.16#ibcon#*before write, iclass 29, count 0 2006.230.00:01:46.16#ibcon#enter sib2, iclass 29, count 0 2006.230.00:01:46.16#ibcon#flushed, iclass 29, count 0 2006.230.00:01:46.16#ibcon#about to write, iclass 29, count 0 2006.230.00:01:46.16#ibcon#wrote, iclass 29, count 0 2006.230.00:01:46.16#ibcon#about to read 3, iclass 29, count 0 2006.230.00:01:46.20#ibcon#read 3, iclass 29, count 0 2006.230.00:01:46.20#ibcon#about to read 4, iclass 29, count 0 2006.230.00:01:46.20#ibcon#read 4, iclass 29, count 0 2006.230.00:01:46.20#ibcon#about to read 5, iclass 29, count 0 2006.230.00:01:46.20#ibcon#read 5, iclass 29, count 0 2006.230.00:01:46.20#ibcon#about to read 6, iclass 29, count 0 2006.230.00:01:46.20#ibcon#read 6, iclass 29, count 0 2006.230.00:01:46.20#ibcon#end of sib2, iclass 29, count 0 2006.230.00:01:46.20#ibcon#*after write, iclass 29, count 0 2006.230.00:01:46.20#ibcon#*before return 0, iclass 29, count 0 2006.230.00:01:46.20#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:46.20#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:46.20#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:01:46.20#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:01:46.20$vck44/va=7,5 2006.230.00:01:46.20#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.00:01:46.20#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.00:01:46.20#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:46.20#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:46.26#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:46.26#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:46.26#ibcon#enter wrdev, iclass 31, count 2 2006.230.00:01:46.26#ibcon#first serial, iclass 31, count 2 2006.230.00:01:46.26#ibcon#enter sib2, iclass 31, count 2 2006.230.00:01:46.26#ibcon#flushed, iclass 31, count 2 2006.230.00:01:46.26#ibcon#about to write, iclass 31, count 2 2006.230.00:01:46.26#ibcon#wrote, iclass 31, count 2 2006.230.00:01:46.26#ibcon#about to read 3, iclass 31, count 2 2006.230.00:01:46.28#ibcon#read 3, iclass 31, count 2 2006.230.00:01:46.28#ibcon#about to read 4, iclass 31, count 2 2006.230.00:01:46.28#ibcon#read 4, iclass 31, count 2 2006.230.00:01:46.28#ibcon#about to read 5, iclass 31, count 2 2006.230.00:01:46.28#ibcon#read 5, iclass 31, count 2 2006.230.00:01:46.28#ibcon#about to read 6, iclass 31, count 2 2006.230.00:01:46.28#ibcon#read 6, iclass 31, count 2 2006.230.00:01:46.28#ibcon#end of sib2, iclass 31, count 2 2006.230.00:01:46.28#ibcon#*mode == 0, iclass 31, count 2 2006.230.00:01:46.28#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.00:01:46.28#ibcon#[25=AT07-05\r\n] 2006.230.00:01:46.28#ibcon#*before write, iclass 31, count 2 2006.230.00:01:46.28#ibcon#enter sib2, iclass 31, count 2 2006.230.00:01:46.28#ibcon#flushed, iclass 31, count 2 2006.230.00:01:46.28#ibcon#about to write, iclass 31, count 2 2006.230.00:01:46.28#ibcon#wrote, iclass 31, count 2 2006.230.00:01:46.28#ibcon#about to read 3, iclass 31, count 2 2006.230.00:01:46.31#ibcon#read 3, iclass 31, count 2 2006.230.00:01:46.31#ibcon#about to read 4, iclass 31, count 2 2006.230.00:01:46.31#ibcon#read 4, iclass 31, count 2 2006.230.00:01:46.31#ibcon#about to read 5, iclass 31, count 2 2006.230.00:01:46.31#ibcon#read 5, iclass 31, count 2 2006.230.00:01:46.31#ibcon#about to read 6, iclass 31, count 2 2006.230.00:01:46.31#ibcon#read 6, iclass 31, count 2 2006.230.00:01:46.31#ibcon#end of sib2, iclass 31, count 2 2006.230.00:01:46.31#ibcon#*after write, iclass 31, count 2 2006.230.00:01:46.31#ibcon#*before return 0, iclass 31, count 2 2006.230.00:01:46.31#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:46.31#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:46.31#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.00:01:46.31#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:46.31#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:46.43#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:46.43#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:46.43#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:01:46.43#ibcon#first serial, iclass 31, count 0 2006.230.00:01:46.43#ibcon#enter sib2, iclass 31, count 0 2006.230.00:01:46.43#ibcon#flushed, iclass 31, count 0 2006.230.00:01:46.43#ibcon#about to write, iclass 31, count 0 2006.230.00:01:46.43#ibcon#wrote, iclass 31, count 0 2006.230.00:01:46.43#ibcon#about to read 3, iclass 31, count 0 2006.230.00:01:46.45#ibcon#read 3, iclass 31, count 0 2006.230.00:01:46.45#ibcon#about to read 4, iclass 31, count 0 2006.230.00:01:46.45#ibcon#read 4, iclass 31, count 0 2006.230.00:01:46.45#ibcon#about to read 5, iclass 31, count 0 2006.230.00:01:46.45#ibcon#read 5, iclass 31, count 0 2006.230.00:01:46.45#ibcon#about to read 6, iclass 31, count 0 2006.230.00:01:46.45#ibcon#read 6, iclass 31, count 0 2006.230.00:01:46.45#ibcon#end of sib2, iclass 31, count 0 2006.230.00:01:46.45#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:01:46.45#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:01:46.45#ibcon#[25=USB\r\n] 2006.230.00:01:46.45#ibcon#*before write, iclass 31, count 0 2006.230.00:01:46.45#ibcon#enter sib2, iclass 31, count 0 2006.230.00:01:46.45#ibcon#flushed, iclass 31, count 0 2006.230.00:01:46.45#ibcon#about to write, iclass 31, count 0 2006.230.00:01:46.45#ibcon#wrote, iclass 31, count 0 2006.230.00:01:46.45#ibcon#about to read 3, iclass 31, count 0 2006.230.00:01:46.48#ibcon#read 3, iclass 31, count 0 2006.230.00:01:46.48#ibcon#about to read 4, iclass 31, count 0 2006.230.00:01:46.48#ibcon#read 4, iclass 31, count 0 2006.230.00:01:46.48#ibcon#about to read 5, iclass 31, count 0 2006.230.00:01:46.48#ibcon#read 5, iclass 31, count 0 2006.230.00:01:46.48#ibcon#about to read 6, iclass 31, count 0 2006.230.00:01:46.48#ibcon#read 6, iclass 31, count 0 2006.230.00:01:46.48#ibcon#end of sib2, iclass 31, count 0 2006.230.00:01:46.48#ibcon#*after write, iclass 31, count 0 2006.230.00:01:46.48#ibcon#*before return 0, iclass 31, count 0 2006.230.00:01:46.48#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:46.48#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:46.48#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:01:46.48#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:01:46.48$vck44/valo=8,884.99 2006.230.00:01:46.48#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.00:01:46.48#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.00:01:46.48#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:46.48#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:46.48#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:46.48#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:46.48#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:01:46.48#ibcon#first serial, iclass 33, count 0 2006.230.00:01:46.48#ibcon#enter sib2, iclass 33, count 0 2006.230.00:01:46.48#ibcon#flushed, iclass 33, count 0 2006.230.00:01:46.48#ibcon#about to write, iclass 33, count 0 2006.230.00:01:46.48#ibcon#wrote, iclass 33, count 0 2006.230.00:01:46.48#ibcon#about to read 3, iclass 33, count 0 2006.230.00:01:46.50#ibcon#read 3, iclass 33, count 0 2006.230.00:01:46.50#ibcon#about to read 4, iclass 33, count 0 2006.230.00:01:46.50#ibcon#read 4, iclass 33, count 0 2006.230.00:01:46.50#ibcon#about to read 5, iclass 33, count 0 2006.230.00:01:46.50#ibcon#read 5, iclass 33, count 0 2006.230.00:01:46.50#ibcon#about to read 6, iclass 33, count 0 2006.230.00:01:46.50#ibcon#read 6, iclass 33, count 0 2006.230.00:01:46.50#ibcon#end of sib2, iclass 33, count 0 2006.230.00:01:46.50#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:01:46.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:01:46.50#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:01:46.50#ibcon#*before write, iclass 33, count 0 2006.230.00:01:46.50#ibcon#enter sib2, iclass 33, count 0 2006.230.00:01:46.50#ibcon#flushed, iclass 33, count 0 2006.230.00:01:46.50#ibcon#about to write, iclass 33, count 0 2006.230.00:01:46.50#ibcon#wrote, iclass 33, count 0 2006.230.00:01:46.50#ibcon#about to read 3, iclass 33, count 0 2006.230.00:01:46.54#ibcon#read 3, iclass 33, count 0 2006.230.00:01:46.54#ibcon#about to read 4, iclass 33, count 0 2006.230.00:01:46.54#ibcon#read 4, iclass 33, count 0 2006.230.00:01:46.54#ibcon#about to read 5, iclass 33, count 0 2006.230.00:01:46.54#ibcon#read 5, iclass 33, count 0 2006.230.00:01:46.54#ibcon#about to read 6, iclass 33, count 0 2006.230.00:01:46.54#ibcon#read 6, iclass 33, count 0 2006.230.00:01:46.54#ibcon#end of sib2, iclass 33, count 0 2006.230.00:01:46.54#ibcon#*after write, iclass 33, count 0 2006.230.00:01:46.54#ibcon#*before return 0, iclass 33, count 0 2006.230.00:01:46.54#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:46.54#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:46.54#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:01:46.54#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:01:46.54$vck44/va=8,6 2006.230.00:01:46.54#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.230.00:01:46.54#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.230.00:01:46.54#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:46.54#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:01:46.60#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:01:46.60#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:01:46.60#ibcon#enter wrdev, iclass 35, count 2 2006.230.00:01:46.60#ibcon#first serial, iclass 35, count 2 2006.230.00:01:46.60#ibcon#enter sib2, iclass 35, count 2 2006.230.00:01:46.60#ibcon#flushed, iclass 35, count 2 2006.230.00:01:46.60#ibcon#about to write, iclass 35, count 2 2006.230.00:01:46.60#ibcon#wrote, iclass 35, count 2 2006.230.00:01:46.60#ibcon#about to read 3, iclass 35, count 2 2006.230.00:01:46.62#ibcon#read 3, iclass 35, count 2 2006.230.00:01:46.62#ibcon#about to read 4, iclass 35, count 2 2006.230.00:01:46.62#ibcon#read 4, iclass 35, count 2 2006.230.00:01:46.62#ibcon#about to read 5, iclass 35, count 2 2006.230.00:01:46.62#ibcon#read 5, iclass 35, count 2 2006.230.00:01:46.62#ibcon#about to read 6, iclass 35, count 2 2006.230.00:01:46.62#ibcon#read 6, iclass 35, count 2 2006.230.00:01:46.62#ibcon#end of sib2, iclass 35, count 2 2006.230.00:01:46.62#ibcon#*mode == 0, iclass 35, count 2 2006.230.00:01:46.62#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.230.00:01:46.62#ibcon#[25=AT08-06\r\n] 2006.230.00:01:46.62#ibcon#*before write, iclass 35, count 2 2006.230.00:01:46.62#ibcon#enter sib2, iclass 35, count 2 2006.230.00:01:46.62#ibcon#flushed, iclass 35, count 2 2006.230.00:01:46.62#ibcon#about to write, iclass 35, count 2 2006.230.00:01:46.62#ibcon#wrote, iclass 35, count 2 2006.230.00:01:46.62#ibcon#about to read 3, iclass 35, count 2 2006.230.00:01:46.65#ibcon#read 3, iclass 35, count 2 2006.230.00:01:46.65#ibcon#about to read 4, iclass 35, count 2 2006.230.00:01:46.65#ibcon#read 4, iclass 35, count 2 2006.230.00:01:46.65#ibcon#about to read 5, iclass 35, count 2 2006.230.00:01:46.65#ibcon#read 5, iclass 35, count 2 2006.230.00:01:46.65#ibcon#about to read 6, iclass 35, count 2 2006.230.00:01:46.65#ibcon#read 6, iclass 35, count 2 2006.230.00:01:46.65#ibcon#end of sib2, iclass 35, count 2 2006.230.00:01:46.65#ibcon#*after write, iclass 35, count 2 2006.230.00:01:46.65#ibcon#*before return 0, iclass 35, count 2 2006.230.00:01:46.65#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:01:46.65#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:01:46.65#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.230.00:01:46.65#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:46.65#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:01:46.77#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:01:46.77#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:01:46.77#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:01:46.77#ibcon#first serial, iclass 35, count 0 2006.230.00:01:46.77#ibcon#enter sib2, iclass 35, count 0 2006.230.00:01:46.77#ibcon#flushed, iclass 35, count 0 2006.230.00:01:46.77#ibcon#about to write, iclass 35, count 0 2006.230.00:01:46.77#ibcon#wrote, iclass 35, count 0 2006.230.00:01:46.77#ibcon#about to read 3, iclass 35, count 0 2006.230.00:01:46.79#ibcon#read 3, iclass 35, count 0 2006.230.00:01:46.79#ibcon#about to read 4, iclass 35, count 0 2006.230.00:01:46.79#ibcon#read 4, iclass 35, count 0 2006.230.00:01:46.79#ibcon#about to read 5, iclass 35, count 0 2006.230.00:01:46.79#ibcon#read 5, iclass 35, count 0 2006.230.00:01:46.79#ibcon#about to read 6, iclass 35, count 0 2006.230.00:01:46.79#ibcon#read 6, iclass 35, count 0 2006.230.00:01:46.79#ibcon#end of sib2, iclass 35, count 0 2006.230.00:01:46.79#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:01:46.79#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:01:46.79#ibcon#[25=USB\r\n] 2006.230.00:01:46.79#ibcon#*before write, iclass 35, count 0 2006.230.00:01:46.79#ibcon#enter sib2, iclass 35, count 0 2006.230.00:01:46.79#ibcon#flushed, iclass 35, count 0 2006.230.00:01:46.79#ibcon#about to write, iclass 35, count 0 2006.230.00:01:46.79#ibcon#wrote, iclass 35, count 0 2006.230.00:01:46.79#ibcon#about to read 3, iclass 35, count 0 2006.230.00:01:46.82#ibcon#read 3, iclass 35, count 0 2006.230.00:01:46.82#ibcon#about to read 4, iclass 35, count 0 2006.230.00:01:46.82#ibcon#read 4, iclass 35, count 0 2006.230.00:01:46.82#ibcon#about to read 5, iclass 35, count 0 2006.230.00:01:46.82#ibcon#read 5, iclass 35, count 0 2006.230.00:01:46.82#ibcon#about to read 6, iclass 35, count 0 2006.230.00:01:46.82#ibcon#read 6, iclass 35, count 0 2006.230.00:01:46.82#ibcon#end of sib2, iclass 35, count 0 2006.230.00:01:46.82#ibcon#*after write, iclass 35, count 0 2006.230.00:01:46.82#ibcon#*before return 0, iclass 35, count 0 2006.230.00:01:46.82#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:01:46.82#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:01:46.82#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:01:46.82#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:01:46.82$vck44/vblo=1,629.99 2006.230.00:01:46.82#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.00:01:46.82#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.00:01:46.82#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:46.82#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:01:46.82#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:01:46.82#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:01:46.82#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:01:46.82#ibcon#first serial, iclass 37, count 0 2006.230.00:01:46.82#ibcon#enter sib2, iclass 37, count 0 2006.230.00:01:46.82#ibcon#flushed, iclass 37, count 0 2006.230.00:01:46.82#ibcon#about to write, iclass 37, count 0 2006.230.00:01:46.82#ibcon#wrote, iclass 37, count 0 2006.230.00:01:46.82#ibcon#about to read 3, iclass 37, count 0 2006.230.00:01:46.84#ibcon#read 3, iclass 37, count 0 2006.230.00:01:46.84#ibcon#about to read 4, iclass 37, count 0 2006.230.00:01:46.84#ibcon#read 4, iclass 37, count 0 2006.230.00:01:46.84#ibcon#about to read 5, iclass 37, count 0 2006.230.00:01:46.84#ibcon#read 5, iclass 37, count 0 2006.230.00:01:46.84#ibcon#about to read 6, iclass 37, count 0 2006.230.00:01:46.84#ibcon#read 6, iclass 37, count 0 2006.230.00:01:46.84#ibcon#end of sib2, iclass 37, count 0 2006.230.00:01:46.84#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:01:46.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:01:46.84#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:01:46.84#ibcon#*before write, iclass 37, count 0 2006.230.00:01:46.84#ibcon#enter sib2, iclass 37, count 0 2006.230.00:01:46.84#ibcon#flushed, iclass 37, count 0 2006.230.00:01:46.84#ibcon#about to write, iclass 37, count 0 2006.230.00:01:46.84#ibcon#wrote, iclass 37, count 0 2006.230.00:01:46.84#ibcon#about to read 3, iclass 37, count 0 2006.230.00:01:46.88#ibcon#read 3, iclass 37, count 0 2006.230.00:01:46.88#ibcon#about to read 4, iclass 37, count 0 2006.230.00:01:46.88#ibcon#read 4, iclass 37, count 0 2006.230.00:01:46.88#ibcon#about to read 5, iclass 37, count 0 2006.230.00:01:46.88#ibcon#read 5, iclass 37, count 0 2006.230.00:01:46.88#ibcon#about to read 6, iclass 37, count 0 2006.230.00:01:46.88#ibcon#read 6, iclass 37, count 0 2006.230.00:01:46.88#ibcon#end of sib2, iclass 37, count 0 2006.230.00:01:46.88#ibcon#*after write, iclass 37, count 0 2006.230.00:01:46.88#ibcon#*before return 0, iclass 37, count 0 2006.230.00:01:46.88#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:01:46.88#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:01:46.88#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:01:46.88#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:01:46.88$vck44/vb=1,4 2006.230.00:01:46.88#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.230.00:01:46.88#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.230.00:01:46.88#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:46.88#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:01:46.88#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:01:46.88#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:01:46.88#ibcon#enter wrdev, iclass 39, count 2 2006.230.00:01:46.88#ibcon#first serial, iclass 39, count 2 2006.230.00:01:46.88#ibcon#enter sib2, iclass 39, count 2 2006.230.00:01:46.88#ibcon#flushed, iclass 39, count 2 2006.230.00:01:46.88#ibcon#about to write, iclass 39, count 2 2006.230.00:01:46.88#ibcon#wrote, iclass 39, count 2 2006.230.00:01:46.88#ibcon#about to read 3, iclass 39, count 2 2006.230.00:01:46.90#ibcon#read 3, iclass 39, count 2 2006.230.00:01:46.90#ibcon#about to read 4, iclass 39, count 2 2006.230.00:01:46.90#ibcon#read 4, iclass 39, count 2 2006.230.00:01:46.90#ibcon#about to read 5, iclass 39, count 2 2006.230.00:01:46.90#ibcon#read 5, iclass 39, count 2 2006.230.00:01:46.90#ibcon#about to read 6, iclass 39, count 2 2006.230.00:01:46.90#ibcon#read 6, iclass 39, count 2 2006.230.00:01:46.90#ibcon#end of sib2, iclass 39, count 2 2006.230.00:01:46.90#ibcon#*mode == 0, iclass 39, count 2 2006.230.00:01:46.90#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.230.00:01:46.90#ibcon#[27=AT01-04\r\n] 2006.230.00:01:46.90#ibcon#*before write, iclass 39, count 2 2006.230.00:01:46.90#ibcon#enter sib2, iclass 39, count 2 2006.230.00:01:46.90#ibcon#flushed, iclass 39, count 2 2006.230.00:01:46.90#ibcon#about to write, iclass 39, count 2 2006.230.00:01:46.90#ibcon#wrote, iclass 39, count 2 2006.230.00:01:46.90#ibcon#about to read 3, iclass 39, count 2 2006.230.00:01:46.93#ibcon#read 3, iclass 39, count 2 2006.230.00:01:46.93#ibcon#about to read 4, iclass 39, count 2 2006.230.00:01:46.93#ibcon#read 4, iclass 39, count 2 2006.230.00:01:46.93#ibcon#about to read 5, iclass 39, count 2 2006.230.00:01:46.93#ibcon#read 5, iclass 39, count 2 2006.230.00:01:46.93#ibcon#about to read 6, iclass 39, count 2 2006.230.00:01:46.93#ibcon#read 6, iclass 39, count 2 2006.230.00:01:46.93#ibcon#end of sib2, iclass 39, count 2 2006.230.00:01:46.93#ibcon#*after write, iclass 39, count 2 2006.230.00:01:46.93#ibcon#*before return 0, iclass 39, count 2 2006.230.00:01:46.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:01:46.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:01:46.93#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.230.00:01:46.93#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:46.93#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:01:47.05#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:01:47.05#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:01:47.05#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:01:47.05#ibcon#first serial, iclass 39, count 0 2006.230.00:01:47.05#ibcon#enter sib2, iclass 39, count 0 2006.230.00:01:47.05#ibcon#flushed, iclass 39, count 0 2006.230.00:01:47.05#ibcon#about to write, iclass 39, count 0 2006.230.00:01:47.05#ibcon#wrote, iclass 39, count 0 2006.230.00:01:47.05#ibcon#about to read 3, iclass 39, count 0 2006.230.00:01:47.07#ibcon#read 3, iclass 39, count 0 2006.230.00:01:47.07#ibcon#about to read 4, iclass 39, count 0 2006.230.00:01:47.07#ibcon#read 4, iclass 39, count 0 2006.230.00:01:47.07#ibcon#about to read 5, iclass 39, count 0 2006.230.00:01:47.07#ibcon#read 5, iclass 39, count 0 2006.230.00:01:47.07#ibcon#about to read 6, iclass 39, count 0 2006.230.00:01:47.07#ibcon#read 6, iclass 39, count 0 2006.230.00:01:47.07#ibcon#end of sib2, iclass 39, count 0 2006.230.00:01:47.07#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:01:47.07#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:01:47.07#ibcon#[27=USB\r\n] 2006.230.00:01:47.07#ibcon#*before write, iclass 39, count 0 2006.230.00:01:47.07#ibcon#enter sib2, iclass 39, count 0 2006.230.00:01:47.07#ibcon#flushed, iclass 39, count 0 2006.230.00:01:47.07#ibcon#about to write, iclass 39, count 0 2006.230.00:01:47.07#ibcon#wrote, iclass 39, count 0 2006.230.00:01:47.07#ibcon#about to read 3, iclass 39, count 0 2006.230.00:01:47.10#ibcon#read 3, iclass 39, count 0 2006.230.00:01:47.10#ibcon#about to read 4, iclass 39, count 0 2006.230.00:01:47.10#ibcon#read 4, iclass 39, count 0 2006.230.00:01:47.10#ibcon#about to read 5, iclass 39, count 0 2006.230.00:01:47.10#ibcon#read 5, iclass 39, count 0 2006.230.00:01:47.10#ibcon#about to read 6, iclass 39, count 0 2006.230.00:01:47.10#ibcon#read 6, iclass 39, count 0 2006.230.00:01:47.10#ibcon#end of sib2, iclass 39, count 0 2006.230.00:01:47.10#ibcon#*after write, iclass 39, count 0 2006.230.00:01:47.10#ibcon#*before return 0, iclass 39, count 0 2006.230.00:01:47.10#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:01:47.10#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:01:47.10#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:01:47.10#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:01:47.10$vck44/vblo=2,634.99 2006.230.00:01:47.10#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.00:01:47.10#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.00:01:47.10#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:47.10#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:47.10#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:47.10#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:47.10#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:01:47.10#ibcon#first serial, iclass 3, count 0 2006.230.00:01:47.10#ibcon#enter sib2, iclass 3, count 0 2006.230.00:01:47.10#ibcon#flushed, iclass 3, count 0 2006.230.00:01:47.10#ibcon#about to write, iclass 3, count 0 2006.230.00:01:47.10#ibcon#wrote, iclass 3, count 0 2006.230.00:01:47.10#ibcon#about to read 3, iclass 3, count 0 2006.230.00:01:47.12#ibcon#read 3, iclass 3, count 0 2006.230.00:01:47.12#ibcon#about to read 4, iclass 3, count 0 2006.230.00:01:47.12#ibcon#read 4, iclass 3, count 0 2006.230.00:01:47.12#ibcon#about to read 5, iclass 3, count 0 2006.230.00:01:47.12#ibcon#read 5, iclass 3, count 0 2006.230.00:01:47.12#ibcon#about to read 6, iclass 3, count 0 2006.230.00:01:47.12#ibcon#read 6, iclass 3, count 0 2006.230.00:01:47.12#ibcon#end of sib2, iclass 3, count 0 2006.230.00:01:47.12#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:01:47.12#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:01:47.12#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:01:47.12#ibcon#*before write, iclass 3, count 0 2006.230.00:01:47.12#ibcon#enter sib2, iclass 3, count 0 2006.230.00:01:47.12#ibcon#flushed, iclass 3, count 0 2006.230.00:01:47.12#ibcon#about to write, iclass 3, count 0 2006.230.00:01:47.12#ibcon#wrote, iclass 3, count 0 2006.230.00:01:47.12#ibcon#about to read 3, iclass 3, count 0 2006.230.00:01:47.16#ibcon#read 3, iclass 3, count 0 2006.230.00:01:47.16#ibcon#about to read 4, iclass 3, count 0 2006.230.00:01:47.16#ibcon#read 4, iclass 3, count 0 2006.230.00:01:47.16#ibcon#about to read 5, iclass 3, count 0 2006.230.00:01:47.16#ibcon#read 5, iclass 3, count 0 2006.230.00:01:47.16#ibcon#about to read 6, iclass 3, count 0 2006.230.00:01:47.16#ibcon#read 6, iclass 3, count 0 2006.230.00:01:47.16#ibcon#end of sib2, iclass 3, count 0 2006.230.00:01:47.16#ibcon#*after write, iclass 3, count 0 2006.230.00:01:47.16#ibcon#*before return 0, iclass 3, count 0 2006.230.00:01:47.16#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:47.16#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:01:47.16#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:01:47.16#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:01:47.16$vck44/vb=2,4 2006.230.00:01:47.16#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.00:01:47.16#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.00:01:47.16#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:47.16#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:47.22#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:47.22#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:47.22#ibcon#enter wrdev, iclass 5, count 2 2006.230.00:01:47.22#ibcon#first serial, iclass 5, count 2 2006.230.00:01:47.22#ibcon#enter sib2, iclass 5, count 2 2006.230.00:01:47.22#ibcon#flushed, iclass 5, count 2 2006.230.00:01:47.22#ibcon#about to write, iclass 5, count 2 2006.230.00:01:47.22#ibcon#wrote, iclass 5, count 2 2006.230.00:01:47.22#ibcon#about to read 3, iclass 5, count 2 2006.230.00:01:47.24#ibcon#read 3, iclass 5, count 2 2006.230.00:01:47.24#ibcon#about to read 4, iclass 5, count 2 2006.230.00:01:47.24#ibcon#read 4, iclass 5, count 2 2006.230.00:01:47.24#ibcon#about to read 5, iclass 5, count 2 2006.230.00:01:47.24#ibcon#read 5, iclass 5, count 2 2006.230.00:01:47.24#ibcon#about to read 6, iclass 5, count 2 2006.230.00:01:47.24#ibcon#read 6, iclass 5, count 2 2006.230.00:01:47.24#ibcon#end of sib2, iclass 5, count 2 2006.230.00:01:47.24#ibcon#*mode == 0, iclass 5, count 2 2006.230.00:01:47.24#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.00:01:47.24#ibcon#[27=AT02-04\r\n] 2006.230.00:01:47.24#ibcon#*before write, iclass 5, count 2 2006.230.00:01:47.24#ibcon#enter sib2, iclass 5, count 2 2006.230.00:01:47.24#ibcon#flushed, iclass 5, count 2 2006.230.00:01:47.24#ibcon#about to write, iclass 5, count 2 2006.230.00:01:47.24#ibcon#wrote, iclass 5, count 2 2006.230.00:01:47.24#ibcon#about to read 3, iclass 5, count 2 2006.230.00:01:47.27#ibcon#read 3, iclass 5, count 2 2006.230.00:01:47.27#ibcon#about to read 4, iclass 5, count 2 2006.230.00:01:47.27#ibcon#read 4, iclass 5, count 2 2006.230.00:01:47.27#ibcon#about to read 5, iclass 5, count 2 2006.230.00:01:47.27#ibcon#read 5, iclass 5, count 2 2006.230.00:01:47.27#ibcon#about to read 6, iclass 5, count 2 2006.230.00:01:47.27#ibcon#read 6, iclass 5, count 2 2006.230.00:01:47.27#ibcon#end of sib2, iclass 5, count 2 2006.230.00:01:47.27#ibcon#*after write, iclass 5, count 2 2006.230.00:01:47.27#ibcon#*before return 0, iclass 5, count 2 2006.230.00:01:47.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:47.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:01:47.27#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.00:01:47.27#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:47.27#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:47.39#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:47.39#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:47.39#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:01:47.39#ibcon#first serial, iclass 5, count 0 2006.230.00:01:47.39#ibcon#enter sib2, iclass 5, count 0 2006.230.00:01:47.39#ibcon#flushed, iclass 5, count 0 2006.230.00:01:47.39#ibcon#about to write, iclass 5, count 0 2006.230.00:01:47.39#ibcon#wrote, iclass 5, count 0 2006.230.00:01:47.39#ibcon#about to read 3, iclass 5, count 0 2006.230.00:01:47.41#ibcon#read 3, iclass 5, count 0 2006.230.00:01:47.41#ibcon#about to read 4, iclass 5, count 0 2006.230.00:01:47.41#ibcon#read 4, iclass 5, count 0 2006.230.00:01:47.41#ibcon#about to read 5, iclass 5, count 0 2006.230.00:01:47.41#ibcon#read 5, iclass 5, count 0 2006.230.00:01:47.41#ibcon#about to read 6, iclass 5, count 0 2006.230.00:01:47.41#ibcon#read 6, iclass 5, count 0 2006.230.00:01:47.41#ibcon#end of sib2, iclass 5, count 0 2006.230.00:01:47.41#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:01:47.41#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:01:47.41#ibcon#[27=USB\r\n] 2006.230.00:01:47.41#ibcon#*before write, iclass 5, count 0 2006.230.00:01:47.41#ibcon#enter sib2, iclass 5, count 0 2006.230.00:01:47.41#ibcon#flushed, iclass 5, count 0 2006.230.00:01:47.41#ibcon#about to write, iclass 5, count 0 2006.230.00:01:47.41#ibcon#wrote, iclass 5, count 0 2006.230.00:01:47.41#ibcon#about to read 3, iclass 5, count 0 2006.230.00:01:47.44#ibcon#read 3, iclass 5, count 0 2006.230.00:01:47.44#ibcon#about to read 4, iclass 5, count 0 2006.230.00:01:47.44#ibcon#read 4, iclass 5, count 0 2006.230.00:01:47.44#ibcon#about to read 5, iclass 5, count 0 2006.230.00:01:47.44#ibcon#read 5, iclass 5, count 0 2006.230.00:01:47.44#ibcon#about to read 6, iclass 5, count 0 2006.230.00:01:47.44#ibcon#read 6, iclass 5, count 0 2006.230.00:01:47.44#ibcon#end of sib2, iclass 5, count 0 2006.230.00:01:47.44#ibcon#*after write, iclass 5, count 0 2006.230.00:01:47.44#ibcon#*before return 0, iclass 5, count 0 2006.230.00:01:47.44#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:47.44#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:01:47.44#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:01:47.44#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:01:47.44$vck44/vblo=3,649.99 2006.230.00:01:47.44#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.00:01:47.44#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.00:01:47.44#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:47.44#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:47.44#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:47.44#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:47.44#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:01:47.44#ibcon#first serial, iclass 7, count 0 2006.230.00:01:47.44#ibcon#enter sib2, iclass 7, count 0 2006.230.00:01:47.44#ibcon#flushed, iclass 7, count 0 2006.230.00:01:47.44#ibcon#about to write, iclass 7, count 0 2006.230.00:01:47.44#ibcon#wrote, iclass 7, count 0 2006.230.00:01:47.44#ibcon#about to read 3, iclass 7, count 0 2006.230.00:01:47.46#ibcon#read 3, iclass 7, count 0 2006.230.00:01:47.46#ibcon#about to read 4, iclass 7, count 0 2006.230.00:01:47.46#ibcon#read 4, iclass 7, count 0 2006.230.00:01:47.46#ibcon#about to read 5, iclass 7, count 0 2006.230.00:01:47.46#ibcon#read 5, iclass 7, count 0 2006.230.00:01:47.46#ibcon#about to read 6, iclass 7, count 0 2006.230.00:01:47.46#ibcon#read 6, iclass 7, count 0 2006.230.00:01:47.46#ibcon#end of sib2, iclass 7, count 0 2006.230.00:01:47.46#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:01:47.46#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:01:47.46#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:01:47.46#ibcon#*before write, iclass 7, count 0 2006.230.00:01:47.46#ibcon#enter sib2, iclass 7, count 0 2006.230.00:01:47.46#ibcon#flushed, iclass 7, count 0 2006.230.00:01:47.46#ibcon#about to write, iclass 7, count 0 2006.230.00:01:47.46#ibcon#wrote, iclass 7, count 0 2006.230.00:01:47.46#ibcon#about to read 3, iclass 7, count 0 2006.230.00:01:47.50#ibcon#read 3, iclass 7, count 0 2006.230.00:01:47.50#ibcon#about to read 4, iclass 7, count 0 2006.230.00:01:47.50#ibcon#read 4, iclass 7, count 0 2006.230.00:01:47.50#ibcon#about to read 5, iclass 7, count 0 2006.230.00:01:47.50#ibcon#read 5, iclass 7, count 0 2006.230.00:01:47.50#ibcon#about to read 6, iclass 7, count 0 2006.230.00:01:47.50#ibcon#read 6, iclass 7, count 0 2006.230.00:01:47.50#ibcon#end of sib2, iclass 7, count 0 2006.230.00:01:47.50#ibcon#*after write, iclass 7, count 0 2006.230.00:01:47.50#ibcon#*before return 0, iclass 7, count 0 2006.230.00:01:47.50#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:47.50#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:01:47.50#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:01:47.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:01:47.52$vck44/vb=3,4 2006.230.00:01:47.53#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.00:01:47.53#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.00:01:47.53#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:47.53#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:47.55#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:47.55#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:47.55#ibcon#enter wrdev, iclass 11, count 2 2006.230.00:01:47.55#ibcon#first serial, iclass 11, count 2 2006.230.00:01:47.55#ibcon#enter sib2, iclass 11, count 2 2006.230.00:01:47.55#ibcon#flushed, iclass 11, count 2 2006.230.00:01:47.55#ibcon#about to write, iclass 11, count 2 2006.230.00:01:47.55#ibcon#wrote, iclass 11, count 2 2006.230.00:01:47.55#ibcon#about to read 3, iclass 11, count 2 2006.230.00:01:47.57#ibcon#read 3, iclass 11, count 2 2006.230.00:01:47.57#ibcon#about to read 4, iclass 11, count 2 2006.230.00:01:47.57#ibcon#read 4, iclass 11, count 2 2006.230.00:01:47.57#ibcon#about to read 5, iclass 11, count 2 2006.230.00:01:47.57#ibcon#read 5, iclass 11, count 2 2006.230.00:01:47.57#ibcon#about to read 6, iclass 11, count 2 2006.230.00:01:47.57#ibcon#read 6, iclass 11, count 2 2006.230.00:01:47.57#ibcon#end of sib2, iclass 11, count 2 2006.230.00:01:47.57#ibcon#*mode == 0, iclass 11, count 2 2006.230.00:01:47.57#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.00:01:47.57#ibcon#[27=AT03-04\r\n] 2006.230.00:01:47.57#ibcon#*before write, iclass 11, count 2 2006.230.00:01:47.57#ibcon#enter sib2, iclass 11, count 2 2006.230.00:01:47.57#ibcon#flushed, iclass 11, count 2 2006.230.00:01:47.57#ibcon#about to write, iclass 11, count 2 2006.230.00:01:47.57#ibcon#wrote, iclass 11, count 2 2006.230.00:01:47.57#ibcon#about to read 3, iclass 11, count 2 2006.230.00:01:47.60#ibcon#read 3, iclass 11, count 2 2006.230.00:01:47.60#ibcon#about to read 4, iclass 11, count 2 2006.230.00:01:47.60#ibcon#read 4, iclass 11, count 2 2006.230.00:01:47.60#ibcon#about to read 5, iclass 11, count 2 2006.230.00:01:47.60#ibcon#read 5, iclass 11, count 2 2006.230.00:01:47.60#ibcon#about to read 6, iclass 11, count 2 2006.230.00:01:47.60#ibcon#read 6, iclass 11, count 2 2006.230.00:01:47.60#ibcon#end of sib2, iclass 11, count 2 2006.230.00:01:47.60#ibcon#*after write, iclass 11, count 2 2006.230.00:01:47.60#ibcon#*before return 0, iclass 11, count 2 2006.230.00:01:47.60#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:47.60#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:01:47.60#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.00:01:47.60#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:47.60#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:47.72#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:47.72#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:47.72#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:01:47.72#ibcon#first serial, iclass 11, count 0 2006.230.00:01:47.72#ibcon#enter sib2, iclass 11, count 0 2006.230.00:01:47.72#ibcon#flushed, iclass 11, count 0 2006.230.00:01:47.72#ibcon#about to write, iclass 11, count 0 2006.230.00:01:47.72#ibcon#wrote, iclass 11, count 0 2006.230.00:01:47.72#ibcon#about to read 3, iclass 11, count 0 2006.230.00:01:47.74#ibcon#read 3, iclass 11, count 0 2006.230.00:01:47.74#ibcon#about to read 4, iclass 11, count 0 2006.230.00:01:47.74#ibcon#read 4, iclass 11, count 0 2006.230.00:01:47.74#ibcon#about to read 5, iclass 11, count 0 2006.230.00:01:47.74#ibcon#read 5, iclass 11, count 0 2006.230.00:01:47.74#ibcon#about to read 6, iclass 11, count 0 2006.230.00:01:47.74#ibcon#read 6, iclass 11, count 0 2006.230.00:01:47.74#ibcon#end of sib2, iclass 11, count 0 2006.230.00:01:47.74#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:01:47.74#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:01:47.74#ibcon#[27=USB\r\n] 2006.230.00:01:47.74#ibcon#*before write, iclass 11, count 0 2006.230.00:01:47.74#ibcon#enter sib2, iclass 11, count 0 2006.230.00:01:47.74#ibcon#flushed, iclass 11, count 0 2006.230.00:01:47.74#ibcon#about to write, iclass 11, count 0 2006.230.00:01:47.74#ibcon#wrote, iclass 11, count 0 2006.230.00:01:47.74#ibcon#about to read 3, iclass 11, count 0 2006.230.00:01:47.77#ibcon#read 3, iclass 11, count 0 2006.230.00:01:47.77#ibcon#about to read 4, iclass 11, count 0 2006.230.00:01:47.77#ibcon#read 4, iclass 11, count 0 2006.230.00:01:47.77#ibcon#about to read 5, iclass 11, count 0 2006.230.00:01:47.77#ibcon#read 5, iclass 11, count 0 2006.230.00:01:47.77#ibcon#about to read 6, iclass 11, count 0 2006.230.00:01:47.77#ibcon#read 6, iclass 11, count 0 2006.230.00:01:47.77#ibcon#end of sib2, iclass 11, count 0 2006.230.00:01:47.77#ibcon#*after write, iclass 11, count 0 2006.230.00:01:47.77#ibcon#*before return 0, iclass 11, count 0 2006.230.00:01:47.77#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:47.77#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:01:47.77#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:01:47.77#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:01:47.77$vck44/vblo=4,679.99 2006.230.00:01:47.77#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.00:01:47.77#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.00:01:47.77#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:47.77#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:47.77#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:47.77#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:47.77#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:01:47.77#ibcon#first serial, iclass 13, count 0 2006.230.00:01:47.77#ibcon#enter sib2, iclass 13, count 0 2006.230.00:01:47.77#ibcon#flushed, iclass 13, count 0 2006.230.00:01:47.77#ibcon#about to write, iclass 13, count 0 2006.230.00:01:47.77#ibcon#wrote, iclass 13, count 0 2006.230.00:01:47.77#ibcon#about to read 3, iclass 13, count 0 2006.230.00:01:47.79#ibcon#read 3, iclass 13, count 0 2006.230.00:01:47.79#ibcon#about to read 4, iclass 13, count 0 2006.230.00:01:47.79#ibcon#read 4, iclass 13, count 0 2006.230.00:01:47.79#ibcon#about to read 5, iclass 13, count 0 2006.230.00:01:47.79#ibcon#read 5, iclass 13, count 0 2006.230.00:01:47.79#ibcon#about to read 6, iclass 13, count 0 2006.230.00:01:47.79#ibcon#read 6, iclass 13, count 0 2006.230.00:01:47.79#ibcon#end of sib2, iclass 13, count 0 2006.230.00:01:47.79#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:01:47.79#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:01:47.79#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:01:47.79#ibcon#*before write, iclass 13, count 0 2006.230.00:01:47.79#ibcon#enter sib2, iclass 13, count 0 2006.230.00:01:47.79#ibcon#flushed, iclass 13, count 0 2006.230.00:01:47.79#ibcon#about to write, iclass 13, count 0 2006.230.00:01:47.79#ibcon#wrote, iclass 13, count 0 2006.230.00:01:47.79#ibcon#about to read 3, iclass 13, count 0 2006.230.00:01:47.83#ibcon#read 3, iclass 13, count 0 2006.230.00:01:47.83#ibcon#about to read 4, iclass 13, count 0 2006.230.00:01:47.83#ibcon#read 4, iclass 13, count 0 2006.230.00:01:47.83#ibcon#about to read 5, iclass 13, count 0 2006.230.00:01:47.83#ibcon#read 5, iclass 13, count 0 2006.230.00:01:47.83#ibcon#about to read 6, iclass 13, count 0 2006.230.00:01:47.83#ibcon#read 6, iclass 13, count 0 2006.230.00:01:47.83#ibcon#end of sib2, iclass 13, count 0 2006.230.00:01:47.83#ibcon#*after write, iclass 13, count 0 2006.230.00:01:47.83#ibcon#*before return 0, iclass 13, count 0 2006.230.00:01:47.83#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:47.83#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:01:47.83#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:01:47.83#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:01:47.83$vck44/vb=4,4 2006.230.00:01:47.83#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.00:01:47.83#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.00:01:47.83#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:47.83#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:47.89#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:47.89#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:47.89#ibcon#enter wrdev, iclass 15, count 2 2006.230.00:01:47.89#ibcon#first serial, iclass 15, count 2 2006.230.00:01:47.89#ibcon#enter sib2, iclass 15, count 2 2006.230.00:01:47.89#ibcon#flushed, iclass 15, count 2 2006.230.00:01:47.89#ibcon#about to write, iclass 15, count 2 2006.230.00:01:47.89#ibcon#wrote, iclass 15, count 2 2006.230.00:01:47.89#ibcon#about to read 3, iclass 15, count 2 2006.230.00:01:47.91#ibcon#read 3, iclass 15, count 2 2006.230.00:01:47.91#ibcon#about to read 4, iclass 15, count 2 2006.230.00:01:47.91#ibcon#read 4, iclass 15, count 2 2006.230.00:01:47.91#ibcon#about to read 5, iclass 15, count 2 2006.230.00:01:47.91#ibcon#read 5, iclass 15, count 2 2006.230.00:01:47.91#ibcon#about to read 6, iclass 15, count 2 2006.230.00:01:47.91#ibcon#read 6, iclass 15, count 2 2006.230.00:01:47.91#ibcon#end of sib2, iclass 15, count 2 2006.230.00:01:47.91#ibcon#*mode == 0, iclass 15, count 2 2006.230.00:01:47.91#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.00:01:47.91#ibcon#[27=AT04-04\r\n] 2006.230.00:01:47.91#ibcon#*before write, iclass 15, count 2 2006.230.00:01:47.91#ibcon#enter sib2, iclass 15, count 2 2006.230.00:01:47.91#ibcon#flushed, iclass 15, count 2 2006.230.00:01:47.91#ibcon#about to write, iclass 15, count 2 2006.230.00:01:47.91#ibcon#wrote, iclass 15, count 2 2006.230.00:01:47.91#ibcon#about to read 3, iclass 15, count 2 2006.230.00:01:47.94#ibcon#read 3, iclass 15, count 2 2006.230.00:01:47.94#ibcon#about to read 4, iclass 15, count 2 2006.230.00:01:47.94#ibcon#read 4, iclass 15, count 2 2006.230.00:01:47.94#ibcon#about to read 5, iclass 15, count 2 2006.230.00:01:47.94#ibcon#read 5, iclass 15, count 2 2006.230.00:01:47.94#ibcon#about to read 6, iclass 15, count 2 2006.230.00:01:47.94#ibcon#read 6, iclass 15, count 2 2006.230.00:01:47.94#ibcon#end of sib2, iclass 15, count 2 2006.230.00:01:47.94#ibcon#*after write, iclass 15, count 2 2006.230.00:01:47.94#ibcon#*before return 0, iclass 15, count 2 2006.230.00:01:47.94#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:47.94#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:01:47.94#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.00:01:47.94#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:47.94#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:48.06#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:48.06#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:48.06#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:01:48.06#ibcon#first serial, iclass 15, count 0 2006.230.00:01:48.06#ibcon#enter sib2, iclass 15, count 0 2006.230.00:01:48.06#ibcon#flushed, iclass 15, count 0 2006.230.00:01:48.06#ibcon#about to write, iclass 15, count 0 2006.230.00:01:48.06#ibcon#wrote, iclass 15, count 0 2006.230.00:01:48.06#ibcon#about to read 3, iclass 15, count 0 2006.230.00:01:48.08#ibcon#read 3, iclass 15, count 0 2006.230.00:01:48.08#ibcon#about to read 4, iclass 15, count 0 2006.230.00:01:48.08#ibcon#read 4, iclass 15, count 0 2006.230.00:01:48.08#ibcon#about to read 5, iclass 15, count 0 2006.230.00:01:48.08#ibcon#read 5, iclass 15, count 0 2006.230.00:01:48.08#ibcon#about to read 6, iclass 15, count 0 2006.230.00:01:48.08#ibcon#read 6, iclass 15, count 0 2006.230.00:01:48.08#ibcon#end of sib2, iclass 15, count 0 2006.230.00:01:48.08#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:01:48.08#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:01:48.08#ibcon#[27=USB\r\n] 2006.230.00:01:48.08#ibcon#*before write, iclass 15, count 0 2006.230.00:01:48.08#ibcon#enter sib2, iclass 15, count 0 2006.230.00:01:48.08#ibcon#flushed, iclass 15, count 0 2006.230.00:01:48.08#ibcon#about to write, iclass 15, count 0 2006.230.00:01:48.08#ibcon#wrote, iclass 15, count 0 2006.230.00:01:48.08#ibcon#about to read 3, iclass 15, count 0 2006.230.00:01:48.11#ibcon#read 3, iclass 15, count 0 2006.230.00:01:48.11#ibcon#about to read 4, iclass 15, count 0 2006.230.00:01:48.11#ibcon#read 4, iclass 15, count 0 2006.230.00:01:48.11#ibcon#about to read 5, iclass 15, count 0 2006.230.00:01:48.11#ibcon#read 5, iclass 15, count 0 2006.230.00:01:48.11#ibcon#about to read 6, iclass 15, count 0 2006.230.00:01:48.11#ibcon#read 6, iclass 15, count 0 2006.230.00:01:48.11#ibcon#end of sib2, iclass 15, count 0 2006.230.00:01:48.11#ibcon#*after write, iclass 15, count 0 2006.230.00:01:48.11#ibcon#*before return 0, iclass 15, count 0 2006.230.00:01:48.11#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:48.11#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:01:48.11#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:01:48.11#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:01:48.11$vck44/vblo=5,709.99 2006.230.00:01:48.11#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:01:48.11#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:01:48.11#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:48.11#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:48.11#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:48.11#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:48.11#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:01:48.11#ibcon#first serial, iclass 17, count 0 2006.230.00:01:48.11#ibcon#enter sib2, iclass 17, count 0 2006.230.00:01:48.11#ibcon#flushed, iclass 17, count 0 2006.230.00:01:48.11#ibcon#about to write, iclass 17, count 0 2006.230.00:01:48.11#ibcon#wrote, iclass 17, count 0 2006.230.00:01:48.11#ibcon#about to read 3, iclass 17, count 0 2006.230.00:01:48.13#ibcon#read 3, iclass 17, count 0 2006.230.00:01:48.13#ibcon#about to read 4, iclass 17, count 0 2006.230.00:01:48.13#ibcon#read 4, iclass 17, count 0 2006.230.00:01:48.13#ibcon#about to read 5, iclass 17, count 0 2006.230.00:01:48.13#ibcon#read 5, iclass 17, count 0 2006.230.00:01:48.13#ibcon#about to read 6, iclass 17, count 0 2006.230.00:01:48.13#ibcon#read 6, iclass 17, count 0 2006.230.00:01:48.13#ibcon#end of sib2, iclass 17, count 0 2006.230.00:01:48.13#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:01:48.13#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:01:48.13#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:01:48.13#ibcon#*before write, iclass 17, count 0 2006.230.00:01:48.13#ibcon#enter sib2, iclass 17, count 0 2006.230.00:01:48.13#ibcon#flushed, iclass 17, count 0 2006.230.00:01:48.13#ibcon#about to write, iclass 17, count 0 2006.230.00:01:48.13#ibcon#wrote, iclass 17, count 0 2006.230.00:01:48.13#ibcon#about to read 3, iclass 17, count 0 2006.230.00:01:48.17#ibcon#read 3, iclass 17, count 0 2006.230.00:01:48.17#ibcon#about to read 4, iclass 17, count 0 2006.230.00:01:48.17#ibcon#read 4, iclass 17, count 0 2006.230.00:01:48.17#ibcon#about to read 5, iclass 17, count 0 2006.230.00:01:48.17#ibcon#read 5, iclass 17, count 0 2006.230.00:01:48.17#ibcon#about to read 6, iclass 17, count 0 2006.230.00:01:48.17#ibcon#read 6, iclass 17, count 0 2006.230.00:01:48.17#ibcon#end of sib2, iclass 17, count 0 2006.230.00:01:48.17#ibcon#*after write, iclass 17, count 0 2006.230.00:01:48.17#ibcon#*before return 0, iclass 17, count 0 2006.230.00:01:48.17#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:48.17#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:01:48.17#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:01:48.17#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:01:48.17$vck44/vb=5,4 2006.230.00:01:48.17#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.00:01:48.17#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.00:01:48.17#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:48.17#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:48.23#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:48.23#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:48.23#ibcon#enter wrdev, iclass 19, count 2 2006.230.00:01:48.23#ibcon#first serial, iclass 19, count 2 2006.230.00:01:48.23#ibcon#enter sib2, iclass 19, count 2 2006.230.00:01:48.23#ibcon#flushed, iclass 19, count 2 2006.230.00:01:48.23#ibcon#about to write, iclass 19, count 2 2006.230.00:01:48.23#ibcon#wrote, iclass 19, count 2 2006.230.00:01:48.23#ibcon#about to read 3, iclass 19, count 2 2006.230.00:01:48.25#ibcon#read 3, iclass 19, count 2 2006.230.00:01:48.25#ibcon#about to read 4, iclass 19, count 2 2006.230.00:01:48.25#ibcon#read 4, iclass 19, count 2 2006.230.00:01:48.25#ibcon#about to read 5, iclass 19, count 2 2006.230.00:01:48.25#ibcon#read 5, iclass 19, count 2 2006.230.00:01:48.25#ibcon#about to read 6, iclass 19, count 2 2006.230.00:01:48.25#ibcon#read 6, iclass 19, count 2 2006.230.00:01:48.25#ibcon#end of sib2, iclass 19, count 2 2006.230.00:01:48.25#ibcon#*mode == 0, iclass 19, count 2 2006.230.00:01:48.25#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.00:01:48.25#ibcon#[27=AT05-04\r\n] 2006.230.00:01:48.25#ibcon#*before write, iclass 19, count 2 2006.230.00:01:48.25#ibcon#enter sib2, iclass 19, count 2 2006.230.00:01:48.25#ibcon#flushed, iclass 19, count 2 2006.230.00:01:48.25#ibcon#about to write, iclass 19, count 2 2006.230.00:01:48.25#ibcon#wrote, iclass 19, count 2 2006.230.00:01:48.25#ibcon#about to read 3, iclass 19, count 2 2006.230.00:01:48.28#ibcon#read 3, iclass 19, count 2 2006.230.00:01:48.28#ibcon#about to read 4, iclass 19, count 2 2006.230.00:01:48.28#ibcon#read 4, iclass 19, count 2 2006.230.00:01:48.28#ibcon#about to read 5, iclass 19, count 2 2006.230.00:01:48.28#ibcon#read 5, iclass 19, count 2 2006.230.00:01:48.28#ibcon#about to read 6, iclass 19, count 2 2006.230.00:01:48.28#ibcon#read 6, iclass 19, count 2 2006.230.00:01:48.28#ibcon#end of sib2, iclass 19, count 2 2006.230.00:01:48.28#ibcon#*after write, iclass 19, count 2 2006.230.00:01:48.28#ibcon#*before return 0, iclass 19, count 2 2006.230.00:01:48.28#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:48.28#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:01:48.28#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.00:01:48.28#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:48.28#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:48.40#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:48.40#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:48.40#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:01:48.40#ibcon#first serial, iclass 19, count 0 2006.230.00:01:48.40#ibcon#enter sib2, iclass 19, count 0 2006.230.00:01:48.40#ibcon#flushed, iclass 19, count 0 2006.230.00:01:48.40#ibcon#about to write, iclass 19, count 0 2006.230.00:01:48.40#ibcon#wrote, iclass 19, count 0 2006.230.00:01:48.40#ibcon#about to read 3, iclass 19, count 0 2006.230.00:01:48.42#ibcon#read 3, iclass 19, count 0 2006.230.00:01:48.42#ibcon#about to read 4, iclass 19, count 0 2006.230.00:01:48.42#ibcon#read 4, iclass 19, count 0 2006.230.00:01:48.42#ibcon#about to read 5, iclass 19, count 0 2006.230.00:01:48.42#ibcon#read 5, iclass 19, count 0 2006.230.00:01:48.42#ibcon#about to read 6, iclass 19, count 0 2006.230.00:01:48.42#ibcon#read 6, iclass 19, count 0 2006.230.00:01:48.42#ibcon#end of sib2, iclass 19, count 0 2006.230.00:01:48.42#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:01:48.42#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:01:48.42#ibcon#[27=USB\r\n] 2006.230.00:01:48.42#ibcon#*before write, iclass 19, count 0 2006.230.00:01:48.42#ibcon#enter sib2, iclass 19, count 0 2006.230.00:01:48.42#ibcon#flushed, iclass 19, count 0 2006.230.00:01:48.42#ibcon#about to write, iclass 19, count 0 2006.230.00:01:48.42#ibcon#wrote, iclass 19, count 0 2006.230.00:01:48.42#ibcon#about to read 3, iclass 19, count 0 2006.230.00:01:48.45#ibcon#read 3, iclass 19, count 0 2006.230.00:01:48.45#ibcon#about to read 4, iclass 19, count 0 2006.230.00:01:48.45#ibcon#read 4, iclass 19, count 0 2006.230.00:01:48.45#ibcon#about to read 5, iclass 19, count 0 2006.230.00:01:48.45#ibcon#read 5, iclass 19, count 0 2006.230.00:01:48.45#ibcon#about to read 6, iclass 19, count 0 2006.230.00:01:48.45#ibcon#read 6, iclass 19, count 0 2006.230.00:01:48.45#ibcon#end of sib2, iclass 19, count 0 2006.230.00:01:48.45#ibcon#*after write, iclass 19, count 0 2006.230.00:01:48.45#ibcon#*before return 0, iclass 19, count 0 2006.230.00:01:48.45#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:48.45#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:01:48.45#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:01:48.45#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:01:48.45$vck44/vblo=6,719.99 2006.230.00:01:48.45#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.00:01:48.45#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.00:01:48.45#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:48.45#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:48.45#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:48.45#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:48.45#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:01:48.45#ibcon#first serial, iclass 21, count 0 2006.230.00:01:48.45#ibcon#enter sib2, iclass 21, count 0 2006.230.00:01:48.45#ibcon#flushed, iclass 21, count 0 2006.230.00:01:48.45#ibcon#about to write, iclass 21, count 0 2006.230.00:01:48.45#ibcon#wrote, iclass 21, count 0 2006.230.00:01:48.45#ibcon#about to read 3, iclass 21, count 0 2006.230.00:01:48.47#ibcon#read 3, iclass 21, count 0 2006.230.00:01:48.47#ibcon#about to read 4, iclass 21, count 0 2006.230.00:01:48.47#ibcon#read 4, iclass 21, count 0 2006.230.00:01:48.47#ibcon#about to read 5, iclass 21, count 0 2006.230.00:01:48.47#ibcon#read 5, iclass 21, count 0 2006.230.00:01:48.47#ibcon#about to read 6, iclass 21, count 0 2006.230.00:01:48.47#ibcon#read 6, iclass 21, count 0 2006.230.00:01:48.47#ibcon#end of sib2, iclass 21, count 0 2006.230.00:01:48.47#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:01:48.47#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:01:48.47#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:01:48.47#ibcon#*before write, iclass 21, count 0 2006.230.00:01:48.47#ibcon#enter sib2, iclass 21, count 0 2006.230.00:01:48.47#ibcon#flushed, iclass 21, count 0 2006.230.00:01:48.47#ibcon#about to write, iclass 21, count 0 2006.230.00:01:48.47#ibcon#wrote, iclass 21, count 0 2006.230.00:01:48.47#ibcon#about to read 3, iclass 21, count 0 2006.230.00:01:48.51#ibcon#read 3, iclass 21, count 0 2006.230.00:01:48.51#ibcon#about to read 4, iclass 21, count 0 2006.230.00:01:48.51#ibcon#read 4, iclass 21, count 0 2006.230.00:01:48.51#ibcon#about to read 5, iclass 21, count 0 2006.230.00:01:48.51#ibcon#read 5, iclass 21, count 0 2006.230.00:01:48.51#ibcon#about to read 6, iclass 21, count 0 2006.230.00:01:48.51#ibcon#read 6, iclass 21, count 0 2006.230.00:01:48.51#ibcon#end of sib2, iclass 21, count 0 2006.230.00:01:48.51#ibcon#*after write, iclass 21, count 0 2006.230.00:01:48.51#ibcon#*before return 0, iclass 21, count 0 2006.230.00:01:48.51#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:48.51#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:01:48.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:01:48.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:01:48.51$vck44/vb=6,4 2006.230.00:01:48.51#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.00:01:48.51#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.00:01:48.51#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:48.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:48.57#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:48.57#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:48.57#ibcon#enter wrdev, iclass 23, count 2 2006.230.00:01:48.57#ibcon#first serial, iclass 23, count 2 2006.230.00:01:48.57#ibcon#enter sib2, iclass 23, count 2 2006.230.00:01:48.57#ibcon#flushed, iclass 23, count 2 2006.230.00:01:48.57#ibcon#about to write, iclass 23, count 2 2006.230.00:01:48.57#ibcon#wrote, iclass 23, count 2 2006.230.00:01:48.57#ibcon#about to read 3, iclass 23, count 2 2006.230.00:01:48.59#ibcon#read 3, iclass 23, count 2 2006.230.00:01:48.59#ibcon#about to read 4, iclass 23, count 2 2006.230.00:01:48.59#ibcon#read 4, iclass 23, count 2 2006.230.00:01:48.59#ibcon#about to read 5, iclass 23, count 2 2006.230.00:01:48.59#ibcon#read 5, iclass 23, count 2 2006.230.00:01:48.59#ibcon#about to read 6, iclass 23, count 2 2006.230.00:01:48.59#ibcon#read 6, iclass 23, count 2 2006.230.00:01:48.59#ibcon#end of sib2, iclass 23, count 2 2006.230.00:01:48.59#ibcon#*mode == 0, iclass 23, count 2 2006.230.00:01:48.59#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.00:01:48.59#ibcon#[27=AT06-04\r\n] 2006.230.00:01:48.59#ibcon#*before write, iclass 23, count 2 2006.230.00:01:48.59#ibcon#enter sib2, iclass 23, count 2 2006.230.00:01:48.59#ibcon#flushed, iclass 23, count 2 2006.230.00:01:48.59#ibcon#about to write, iclass 23, count 2 2006.230.00:01:48.59#ibcon#wrote, iclass 23, count 2 2006.230.00:01:48.59#ibcon#about to read 3, iclass 23, count 2 2006.230.00:01:48.62#ibcon#read 3, iclass 23, count 2 2006.230.00:01:48.62#ibcon#about to read 4, iclass 23, count 2 2006.230.00:01:48.62#ibcon#read 4, iclass 23, count 2 2006.230.00:01:48.62#ibcon#about to read 5, iclass 23, count 2 2006.230.00:01:48.62#ibcon#read 5, iclass 23, count 2 2006.230.00:01:48.62#ibcon#about to read 6, iclass 23, count 2 2006.230.00:01:48.62#ibcon#read 6, iclass 23, count 2 2006.230.00:01:48.62#ibcon#end of sib2, iclass 23, count 2 2006.230.00:01:48.62#ibcon#*after write, iclass 23, count 2 2006.230.00:01:48.62#ibcon#*before return 0, iclass 23, count 2 2006.230.00:01:48.62#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:48.62#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:01:48.62#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.00:01:48.62#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:48.62#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:48.74#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:48.74#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:48.74#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:01:48.74#ibcon#first serial, iclass 23, count 0 2006.230.00:01:48.74#ibcon#enter sib2, iclass 23, count 0 2006.230.00:01:48.74#ibcon#flushed, iclass 23, count 0 2006.230.00:01:48.74#ibcon#about to write, iclass 23, count 0 2006.230.00:01:48.74#ibcon#wrote, iclass 23, count 0 2006.230.00:01:48.74#ibcon#about to read 3, iclass 23, count 0 2006.230.00:01:48.76#ibcon#read 3, iclass 23, count 0 2006.230.00:01:48.76#ibcon#about to read 4, iclass 23, count 0 2006.230.00:01:48.76#ibcon#read 4, iclass 23, count 0 2006.230.00:01:48.76#ibcon#about to read 5, iclass 23, count 0 2006.230.00:01:48.76#ibcon#read 5, iclass 23, count 0 2006.230.00:01:48.76#ibcon#about to read 6, iclass 23, count 0 2006.230.00:01:48.76#ibcon#read 6, iclass 23, count 0 2006.230.00:01:48.76#ibcon#end of sib2, iclass 23, count 0 2006.230.00:01:48.76#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:01:48.76#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:01:48.76#ibcon#[27=USB\r\n] 2006.230.00:01:48.76#ibcon#*before write, iclass 23, count 0 2006.230.00:01:48.76#ibcon#enter sib2, iclass 23, count 0 2006.230.00:01:48.76#ibcon#flushed, iclass 23, count 0 2006.230.00:01:48.76#ibcon#about to write, iclass 23, count 0 2006.230.00:01:48.76#ibcon#wrote, iclass 23, count 0 2006.230.00:01:48.76#ibcon#about to read 3, iclass 23, count 0 2006.230.00:01:48.79#ibcon#read 3, iclass 23, count 0 2006.230.00:01:48.79#ibcon#about to read 4, iclass 23, count 0 2006.230.00:01:48.79#ibcon#read 4, iclass 23, count 0 2006.230.00:01:48.79#ibcon#about to read 5, iclass 23, count 0 2006.230.00:01:48.79#ibcon#read 5, iclass 23, count 0 2006.230.00:01:48.79#ibcon#about to read 6, iclass 23, count 0 2006.230.00:01:48.79#ibcon#read 6, iclass 23, count 0 2006.230.00:01:48.79#ibcon#end of sib2, iclass 23, count 0 2006.230.00:01:48.79#ibcon#*after write, iclass 23, count 0 2006.230.00:01:48.79#ibcon#*before return 0, iclass 23, count 0 2006.230.00:01:48.79#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:48.79#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:01:48.79#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:01:48.79#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:01:48.79$vck44/vblo=7,734.99 2006.230.00:01:48.79#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.00:01:48.79#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.00:01:48.79#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:48.79#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:48.79#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:48.79#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:48.79#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:01:48.79#ibcon#first serial, iclass 25, count 0 2006.230.00:01:48.79#ibcon#enter sib2, iclass 25, count 0 2006.230.00:01:48.79#ibcon#flushed, iclass 25, count 0 2006.230.00:01:48.79#ibcon#about to write, iclass 25, count 0 2006.230.00:01:48.79#ibcon#wrote, iclass 25, count 0 2006.230.00:01:48.79#ibcon#about to read 3, iclass 25, count 0 2006.230.00:01:48.81#ibcon#read 3, iclass 25, count 0 2006.230.00:01:48.81#ibcon#about to read 4, iclass 25, count 0 2006.230.00:01:48.81#ibcon#read 4, iclass 25, count 0 2006.230.00:01:48.81#ibcon#about to read 5, iclass 25, count 0 2006.230.00:01:48.81#ibcon#read 5, iclass 25, count 0 2006.230.00:01:48.81#ibcon#about to read 6, iclass 25, count 0 2006.230.00:01:48.81#ibcon#read 6, iclass 25, count 0 2006.230.00:01:48.81#ibcon#end of sib2, iclass 25, count 0 2006.230.00:01:48.81#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:01:48.81#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:01:48.81#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:01:48.81#ibcon#*before write, iclass 25, count 0 2006.230.00:01:48.81#ibcon#enter sib2, iclass 25, count 0 2006.230.00:01:48.81#ibcon#flushed, iclass 25, count 0 2006.230.00:01:48.81#ibcon#about to write, iclass 25, count 0 2006.230.00:01:48.81#ibcon#wrote, iclass 25, count 0 2006.230.00:01:48.81#ibcon#about to read 3, iclass 25, count 0 2006.230.00:01:48.85#ibcon#read 3, iclass 25, count 0 2006.230.00:01:48.85#ibcon#about to read 4, iclass 25, count 0 2006.230.00:01:48.85#ibcon#read 4, iclass 25, count 0 2006.230.00:01:48.85#ibcon#about to read 5, iclass 25, count 0 2006.230.00:01:48.85#ibcon#read 5, iclass 25, count 0 2006.230.00:01:48.85#ibcon#about to read 6, iclass 25, count 0 2006.230.00:01:48.85#ibcon#read 6, iclass 25, count 0 2006.230.00:01:48.85#ibcon#end of sib2, iclass 25, count 0 2006.230.00:01:48.85#ibcon#*after write, iclass 25, count 0 2006.230.00:01:48.85#ibcon#*before return 0, iclass 25, count 0 2006.230.00:01:48.85#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:48.85#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:01:48.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:01:48.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:01:48.85$vck44/vb=7,4 2006.230.00:01:48.85#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.00:01:48.85#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.00:01:48.85#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:48.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:48.91#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:48.91#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:48.91#ibcon#enter wrdev, iclass 27, count 2 2006.230.00:01:48.91#ibcon#first serial, iclass 27, count 2 2006.230.00:01:48.91#ibcon#enter sib2, iclass 27, count 2 2006.230.00:01:48.91#ibcon#flushed, iclass 27, count 2 2006.230.00:01:48.91#ibcon#about to write, iclass 27, count 2 2006.230.00:01:48.91#ibcon#wrote, iclass 27, count 2 2006.230.00:01:48.91#ibcon#about to read 3, iclass 27, count 2 2006.230.00:01:48.93#ibcon#read 3, iclass 27, count 2 2006.230.00:01:48.93#ibcon#about to read 4, iclass 27, count 2 2006.230.00:01:48.93#ibcon#read 4, iclass 27, count 2 2006.230.00:01:48.93#ibcon#about to read 5, iclass 27, count 2 2006.230.00:01:48.93#ibcon#read 5, iclass 27, count 2 2006.230.00:01:48.93#ibcon#about to read 6, iclass 27, count 2 2006.230.00:01:48.93#ibcon#read 6, iclass 27, count 2 2006.230.00:01:48.93#ibcon#end of sib2, iclass 27, count 2 2006.230.00:01:48.93#ibcon#*mode == 0, iclass 27, count 2 2006.230.00:01:48.93#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.00:01:48.93#ibcon#[27=AT07-04\r\n] 2006.230.00:01:48.93#ibcon#*before write, iclass 27, count 2 2006.230.00:01:48.93#ibcon#enter sib2, iclass 27, count 2 2006.230.00:01:48.93#ibcon#flushed, iclass 27, count 2 2006.230.00:01:48.93#ibcon#about to write, iclass 27, count 2 2006.230.00:01:48.93#ibcon#wrote, iclass 27, count 2 2006.230.00:01:48.93#ibcon#about to read 3, iclass 27, count 2 2006.230.00:01:48.96#ibcon#read 3, iclass 27, count 2 2006.230.00:01:48.96#ibcon#about to read 4, iclass 27, count 2 2006.230.00:01:48.96#ibcon#read 4, iclass 27, count 2 2006.230.00:01:48.96#ibcon#about to read 5, iclass 27, count 2 2006.230.00:01:48.96#ibcon#read 5, iclass 27, count 2 2006.230.00:01:48.96#ibcon#about to read 6, iclass 27, count 2 2006.230.00:01:48.96#ibcon#read 6, iclass 27, count 2 2006.230.00:01:48.96#ibcon#end of sib2, iclass 27, count 2 2006.230.00:01:48.96#ibcon#*after write, iclass 27, count 2 2006.230.00:01:48.96#ibcon#*before return 0, iclass 27, count 2 2006.230.00:01:48.96#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:48.96#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:01:48.96#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.00:01:48.96#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:48.96#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:49.08#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:49.08#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:49.08#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:01:49.08#ibcon#first serial, iclass 27, count 0 2006.230.00:01:49.08#ibcon#enter sib2, iclass 27, count 0 2006.230.00:01:49.08#ibcon#flushed, iclass 27, count 0 2006.230.00:01:49.08#ibcon#about to write, iclass 27, count 0 2006.230.00:01:49.08#ibcon#wrote, iclass 27, count 0 2006.230.00:01:49.08#ibcon#about to read 3, iclass 27, count 0 2006.230.00:01:49.10#ibcon#read 3, iclass 27, count 0 2006.230.00:01:49.10#ibcon#about to read 4, iclass 27, count 0 2006.230.00:01:49.10#ibcon#read 4, iclass 27, count 0 2006.230.00:01:49.10#ibcon#about to read 5, iclass 27, count 0 2006.230.00:01:49.10#ibcon#read 5, iclass 27, count 0 2006.230.00:01:49.10#ibcon#about to read 6, iclass 27, count 0 2006.230.00:01:49.10#ibcon#read 6, iclass 27, count 0 2006.230.00:01:49.10#ibcon#end of sib2, iclass 27, count 0 2006.230.00:01:49.10#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:01:49.10#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:01:49.10#ibcon#[27=USB\r\n] 2006.230.00:01:49.10#ibcon#*before write, iclass 27, count 0 2006.230.00:01:49.10#ibcon#enter sib2, iclass 27, count 0 2006.230.00:01:49.10#ibcon#flushed, iclass 27, count 0 2006.230.00:01:49.10#ibcon#about to write, iclass 27, count 0 2006.230.00:01:49.10#ibcon#wrote, iclass 27, count 0 2006.230.00:01:49.10#ibcon#about to read 3, iclass 27, count 0 2006.230.00:01:49.13#ibcon#read 3, iclass 27, count 0 2006.230.00:01:49.13#ibcon#about to read 4, iclass 27, count 0 2006.230.00:01:49.13#ibcon#read 4, iclass 27, count 0 2006.230.00:01:49.13#ibcon#about to read 5, iclass 27, count 0 2006.230.00:01:49.13#ibcon#read 5, iclass 27, count 0 2006.230.00:01:49.13#ibcon#about to read 6, iclass 27, count 0 2006.230.00:01:49.13#ibcon#read 6, iclass 27, count 0 2006.230.00:01:49.13#ibcon#end of sib2, iclass 27, count 0 2006.230.00:01:49.13#ibcon#*after write, iclass 27, count 0 2006.230.00:01:49.13#ibcon#*before return 0, iclass 27, count 0 2006.230.00:01:49.13#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:49.13#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:01:49.13#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:01:49.13#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:01:49.13$vck44/vblo=8,744.99 2006.230.00:01:49.13#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.00:01:49.13#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.00:01:49.13#ibcon#ireg 17 cls_cnt 0 2006.230.00:01:49.13#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:49.13#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:49.13#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:49.13#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:01:49.13#ibcon#first serial, iclass 29, count 0 2006.230.00:01:49.13#ibcon#enter sib2, iclass 29, count 0 2006.230.00:01:49.13#ibcon#flushed, iclass 29, count 0 2006.230.00:01:49.13#ibcon#about to write, iclass 29, count 0 2006.230.00:01:49.13#ibcon#wrote, iclass 29, count 0 2006.230.00:01:49.13#ibcon#about to read 3, iclass 29, count 0 2006.230.00:01:49.15#ibcon#read 3, iclass 29, count 0 2006.230.00:01:49.15#ibcon#about to read 4, iclass 29, count 0 2006.230.00:01:49.15#ibcon#read 4, iclass 29, count 0 2006.230.00:01:49.15#ibcon#about to read 5, iclass 29, count 0 2006.230.00:01:49.15#ibcon#read 5, iclass 29, count 0 2006.230.00:01:49.15#ibcon#about to read 6, iclass 29, count 0 2006.230.00:01:49.15#ibcon#read 6, iclass 29, count 0 2006.230.00:01:49.15#ibcon#end of sib2, iclass 29, count 0 2006.230.00:01:49.15#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:01:49.15#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:01:49.15#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:01:49.15#ibcon#*before write, iclass 29, count 0 2006.230.00:01:49.15#ibcon#enter sib2, iclass 29, count 0 2006.230.00:01:49.15#ibcon#flushed, iclass 29, count 0 2006.230.00:01:49.15#ibcon#about to write, iclass 29, count 0 2006.230.00:01:49.15#ibcon#wrote, iclass 29, count 0 2006.230.00:01:49.15#ibcon#about to read 3, iclass 29, count 0 2006.230.00:01:49.19#ibcon#read 3, iclass 29, count 0 2006.230.00:01:49.19#ibcon#about to read 4, iclass 29, count 0 2006.230.00:01:49.19#ibcon#read 4, iclass 29, count 0 2006.230.00:01:49.19#ibcon#about to read 5, iclass 29, count 0 2006.230.00:01:49.19#ibcon#read 5, iclass 29, count 0 2006.230.00:01:49.19#ibcon#about to read 6, iclass 29, count 0 2006.230.00:01:49.19#ibcon#read 6, iclass 29, count 0 2006.230.00:01:49.19#ibcon#end of sib2, iclass 29, count 0 2006.230.00:01:49.19#ibcon#*after write, iclass 29, count 0 2006.230.00:01:49.19#ibcon#*before return 0, iclass 29, count 0 2006.230.00:01:49.19#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:49.19#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:01:49.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:01:49.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:01:49.19$vck44/vb=8,4 2006.230.00:01:49.19#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.00:01:49.19#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.00:01:49.19#ibcon#ireg 11 cls_cnt 2 2006.230.00:01:49.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:49.25#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:49.25#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:49.25#ibcon#enter wrdev, iclass 31, count 2 2006.230.00:01:49.25#ibcon#first serial, iclass 31, count 2 2006.230.00:01:49.25#ibcon#enter sib2, iclass 31, count 2 2006.230.00:01:49.25#ibcon#flushed, iclass 31, count 2 2006.230.00:01:49.25#ibcon#about to write, iclass 31, count 2 2006.230.00:01:49.25#ibcon#wrote, iclass 31, count 2 2006.230.00:01:49.25#ibcon#about to read 3, iclass 31, count 2 2006.230.00:01:49.27#ibcon#read 3, iclass 31, count 2 2006.230.00:01:49.27#ibcon#about to read 4, iclass 31, count 2 2006.230.00:01:49.27#ibcon#read 4, iclass 31, count 2 2006.230.00:01:49.27#ibcon#about to read 5, iclass 31, count 2 2006.230.00:01:49.27#ibcon#read 5, iclass 31, count 2 2006.230.00:01:49.27#ibcon#about to read 6, iclass 31, count 2 2006.230.00:01:49.27#ibcon#read 6, iclass 31, count 2 2006.230.00:01:49.27#ibcon#end of sib2, iclass 31, count 2 2006.230.00:01:49.27#ibcon#*mode == 0, iclass 31, count 2 2006.230.00:01:49.27#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.00:01:49.27#ibcon#[27=AT08-04\r\n] 2006.230.00:01:49.27#ibcon#*before write, iclass 31, count 2 2006.230.00:01:49.27#ibcon#enter sib2, iclass 31, count 2 2006.230.00:01:49.27#ibcon#flushed, iclass 31, count 2 2006.230.00:01:49.27#ibcon#about to write, iclass 31, count 2 2006.230.00:01:49.27#ibcon#wrote, iclass 31, count 2 2006.230.00:01:49.27#ibcon#about to read 3, iclass 31, count 2 2006.230.00:01:49.30#ibcon#read 3, iclass 31, count 2 2006.230.00:01:49.30#ibcon#about to read 4, iclass 31, count 2 2006.230.00:01:49.30#ibcon#read 4, iclass 31, count 2 2006.230.00:01:49.30#ibcon#about to read 5, iclass 31, count 2 2006.230.00:01:49.30#ibcon#read 5, iclass 31, count 2 2006.230.00:01:49.30#ibcon#about to read 6, iclass 31, count 2 2006.230.00:01:49.30#ibcon#read 6, iclass 31, count 2 2006.230.00:01:49.30#ibcon#end of sib2, iclass 31, count 2 2006.230.00:01:49.30#ibcon#*after write, iclass 31, count 2 2006.230.00:01:49.30#ibcon#*before return 0, iclass 31, count 2 2006.230.00:01:49.30#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:49.30#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:01:49.30#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.00:01:49.30#ibcon#ireg 7 cls_cnt 0 2006.230.00:01:49.30#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:49.42#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:49.42#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:49.42#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:01:49.42#ibcon#first serial, iclass 31, count 0 2006.230.00:01:49.42#ibcon#enter sib2, iclass 31, count 0 2006.230.00:01:49.42#ibcon#flushed, iclass 31, count 0 2006.230.00:01:49.42#ibcon#about to write, iclass 31, count 0 2006.230.00:01:49.42#ibcon#wrote, iclass 31, count 0 2006.230.00:01:49.42#ibcon#about to read 3, iclass 31, count 0 2006.230.00:01:49.44#ibcon#read 3, iclass 31, count 0 2006.230.00:01:49.44#ibcon#about to read 4, iclass 31, count 0 2006.230.00:01:49.44#ibcon#read 4, iclass 31, count 0 2006.230.00:01:49.44#ibcon#about to read 5, iclass 31, count 0 2006.230.00:01:49.44#ibcon#read 5, iclass 31, count 0 2006.230.00:01:49.44#ibcon#about to read 6, iclass 31, count 0 2006.230.00:01:49.44#ibcon#read 6, iclass 31, count 0 2006.230.00:01:49.44#ibcon#end of sib2, iclass 31, count 0 2006.230.00:01:49.44#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:01:49.44#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:01:49.44#ibcon#[27=USB\r\n] 2006.230.00:01:49.44#ibcon#*before write, iclass 31, count 0 2006.230.00:01:49.44#ibcon#enter sib2, iclass 31, count 0 2006.230.00:01:49.44#ibcon#flushed, iclass 31, count 0 2006.230.00:01:49.44#ibcon#about to write, iclass 31, count 0 2006.230.00:01:49.44#ibcon#wrote, iclass 31, count 0 2006.230.00:01:49.44#ibcon#about to read 3, iclass 31, count 0 2006.230.00:01:49.47#ibcon#read 3, iclass 31, count 0 2006.230.00:01:49.47#ibcon#about to read 4, iclass 31, count 0 2006.230.00:01:49.47#ibcon#read 4, iclass 31, count 0 2006.230.00:01:49.47#ibcon#about to read 5, iclass 31, count 0 2006.230.00:01:49.47#ibcon#read 5, iclass 31, count 0 2006.230.00:01:49.47#ibcon#about to read 6, iclass 31, count 0 2006.230.00:01:49.47#ibcon#read 6, iclass 31, count 0 2006.230.00:01:49.47#ibcon#end of sib2, iclass 31, count 0 2006.230.00:01:49.47#ibcon#*after write, iclass 31, count 0 2006.230.00:01:49.47#ibcon#*before return 0, iclass 31, count 0 2006.230.00:01:49.47#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:49.47#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:01:49.47#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:01:49.47#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:01:49.47$vck44/vabw=wide 2006.230.00:01:49.47#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.00:01:49.47#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.00:01:49.47#ibcon#ireg 8 cls_cnt 0 2006.230.00:01:49.47#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:49.47#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:49.47#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:49.47#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:01:49.47#ibcon#first serial, iclass 33, count 0 2006.230.00:01:49.47#ibcon#enter sib2, iclass 33, count 0 2006.230.00:01:49.47#ibcon#flushed, iclass 33, count 0 2006.230.00:01:49.47#ibcon#about to write, iclass 33, count 0 2006.230.00:01:49.47#ibcon#wrote, iclass 33, count 0 2006.230.00:01:49.47#ibcon#about to read 3, iclass 33, count 0 2006.230.00:01:49.49#ibcon#read 3, iclass 33, count 0 2006.230.00:01:49.49#ibcon#about to read 4, iclass 33, count 0 2006.230.00:01:49.49#ibcon#read 4, iclass 33, count 0 2006.230.00:01:49.49#ibcon#about to read 5, iclass 33, count 0 2006.230.00:01:49.49#ibcon#read 5, iclass 33, count 0 2006.230.00:01:49.49#ibcon#about to read 6, iclass 33, count 0 2006.230.00:01:49.49#ibcon#read 6, iclass 33, count 0 2006.230.00:01:49.49#ibcon#end of sib2, iclass 33, count 0 2006.230.00:01:49.49#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:01:49.49#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:01:49.49#ibcon#[25=BW32\r\n] 2006.230.00:01:49.49#ibcon#*before write, iclass 33, count 0 2006.230.00:01:49.49#ibcon#enter sib2, iclass 33, count 0 2006.230.00:01:49.49#ibcon#flushed, iclass 33, count 0 2006.230.00:01:49.49#ibcon#about to write, iclass 33, count 0 2006.230.00:01:49.49#ibcon#wrote, iclass 33, count 0 2006.230.00:01:49.49#ibcon#about to read 3, iclass 33, count 0 2006.230.00:01:49.52#ibcon#read 3, iclass 33, count 0 2006.230.00:01:49.52#ibcon#about to read 4, iclass 33, count 0 2006.230.00:01:49.52#ibcon#read 4, iclass 33, count 0 2006.230.00:01:49.52#ibcon#about to read 5, iclass 33, count 0 2006.230.00:01:49.52#ibcon#read 5, iclass 33, count 0 2006.230.00:01:49.52#ibcon#about to read 6, iclass 33, count 0 2006.230.00:01:49.52#ibcon#read 6, iclass 33, count 0 2006.230.00:01:49.52#ibcon#end of sib2, iclass 33, count 0 2006.230.00:01:49.52#ibcon#*after write, iclass 33, count 0 2006.230.00:01:49.52#ibcon#*before return 0, iclass 33, count 0 2006.230.00:01:49.52#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:49.52#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:01:49.52#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:01:49.52#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:01:49.52$vck44/vbbw=wide 2006.230.00:01:49.52#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.00:01:49.52#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.00:01:49.52#ibcon#ireg 8 cls_cnt 0 2006.230.00:01:49.52#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:01:49.59#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:01:49.59#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:01:49.59#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:01:49.59#ibcon#first serial, iclass 35, count 0 2006.230.00:01:49.59#ibcon#enter sib2, iclass 35, count 0 2006.230.00:01:49.59#ibcon#flushed, iclass 35, count 0 2006.230.00:01:49.59#ibcon#about to write, iclass 35, count 0 2006.230.00:01:49.59#ibcon#wrote, iclass 35, count 0 2006.230.00:01:49.59#ibcon#about to read 3, iclass 35, count 0 2006.230.00:01:49.61#ibcon#read 3, iclass 35, count 0 2006.230.00:01:49.61#ibcon#about to read 4, iclass 35, count 0 2006.230.00:01:49.61#ibcon#read 4, iclass 35, count 0 2006.230.00:01:49.61#ibcon#about to read 5, iclass 35, count 0 2006.230.00:01:49.61#ibcon#read 5, iclass 35, count 0 2006.230.00:01:49.61#ibcon#about to read 6, iclass 35, count 0 2006.230.00:01:49.61#ibcon#read 6, iclass 35, count 0 2006.230.00:01:49.61#ibcon#end of sib2, iclass 35, count 0 2006.230.00:01:49.61#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:01:49.61#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:01:49.61#ibcon#[27=BW32\r\n] 2006.230.00:01:49.61#ibcon#*before write, iclass 35, count 0 2006.230.00:01:49.61#ibcon#enter sib2, iclass 35, count 0 2006.230.00:01:49.61#ibcon#flushed, iclass 35, count 0 2006.230.00:01:49.61#ibcon#about to write, iclass 35, count 0 2006.230.00:01:49.61#ibcon#wrote, iclass 35, count 0 2006.230.00:01:49.61#ibcon#about to read 3, iclass 35, count 0 2006.230.00:01:49.64#ibcon#read 3, iclass 35, count 0 2006.230.00:01:49.64#ibcon#about to read 4, iclass 35, count 0 2006.230.00:01:49.64#ibcon#read 4, iclass 35, count 0 2006.230.00:01:49.64#ibcon#about to read 5, iclass 35, count 0 2006.230.00:01:49.64#ibcon#read 5, iclass 35, count 0 2006.230.00:01:49.64#ibcon#about to read 6, iclass 35, count 0 2006.230.00:01:49.64#ibcon#read 6, iclass 35, count 0 2006.230.00:01:49.64#ibcon#end of sib2, iclass 35, count 0 2006.230.00:01:49.64#ibcon#*after write, iclass 35, count 0 2006.230.00:01:49.64#ibcon#*before return 0, iclass 35, count 0 2006.230.00:01:49.64#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:01:49.64#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:01:49.64#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:01:49.64#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:01:49.64$setupk4/ifdk4 2006.230.00:01:49.64$ifdk4/lo= 2006.230.00:01:49.64$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:01:49.64$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:01:49.64$ifdk4/patch= 2006.230.00:01:49.64$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:01:49.64$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:01:49.64$setupk4/!*+20s 2006.230.00:01:49.79#abcon#<5=/07 2.0 5.8 30.94 771002.7\r\n> 2006.230.00:01:49.81#abcon#{5=INTERFACE CLEAR} 2006.230.00:01:49.87#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:01:59.96#abcon#<5=/08 2.0 5.8 30.94 781002.7\r\n> 2006.230.00:01:59.98#abcon#{5=INTERFACE CLEAR} 2006.230.00:02:00.04#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:02:04.17$setupk4/"tpicd 2006.230.00:02:04.17$setupk4/echo=off 2006.230.00:02:04.17$setupk4/xlog=off 2006.230.00:02:04.17:!2006.230.00:06:18 2006.230.00:02:10.13#trakl#Source acquired 2006.230.00:02:12.13#flagr#flagr/antenna,acquired 2006.230.00:06:18.00:preob 2006.230.00:06:19.14/onsource/TRACKING 2006.230.00:06:19.14:!2006.230.00:06:28 2006.230.00:06:28.00:"tape 2006.230.00:06:28.00:"st=record 2006.230.00:06:28.00:data_valid=on 2006.230.00:06:28.00:midob 2006.230.00:06:28.14/onsource/TRACKING 2006.230.00:06:28.14/wx/31.00,1002.8,77 2006.230.00:06:28.31/cable/+6.4060E-03 2006.230.00:06:29.40/va/01,08,usb,yes,29,31 2006.230.00:06:29.40/va/02,07,usb,yes,31,32 2006.230.00:06:29.40/va/03,06,usb,yes,39,41 2006.230.00:06:29.40/va/04,07,usb,yes,32,34 2006.230.00:06:29.40/va/05,04,usb,yes,29,29 2006.230.00:06:29.40/va/06,04,usb,yes,32,32 2006.230.00:06:29.40/va/07,05,usb,yes,29,29 2006.230.00:06:29.40/va/08,06,usb,yes,20,26 2006.230.00:06:29.63/valo/01,524.99,yes,locked 2006.230.00:06:29.63/valo/02,534.99,yes,locked 2006.230.00:06:29.63/valo/03,564.99,yes,locked 2006.230.00:06:29.63/valo/04,624.99,yes,locked 2006.230.00:06:29.63/valo/05,734.99,yes,locked 2006.230.00:06:29.63/valo/06,814.99,yes,locked 2006.230.00:06:29.63/valo/07,864.99,yes,locked 2006.230.00:06:29.63/valo/08,884.99,yes,locked 2006.230.00:06:30.72/vb/01,04,usb,yes,31,29 2006.230.00:06:30.72/vb/02,04,usb,yes,33,33 2006.230.00:06:30.72/vb/03,04,usb,yes,30,33 2006.230.00:06:30.72/vb/04,04,usb,yes,34,33 2006.230.00:06:30.72/vb/05,04,usb,yes,27,29 2006.230.00:06:30.72/vb/06,04,usb,yes,31,28 2006.230.00:06:30.72/vb/07,04,usb,yes,31,31 2006.230.00:06:30.72/vb/08,04,usb,yes,29,32 2006.230.00:06:30.96/vblo/01,629.99,yes,locked 2006.230.00:06:30.96/vblo/02,634.99,yes,locked 2006.230.00:06:30.96/vblo/03,649.99,yes,locked 2006.230.00:06:30.96/vblo/04,679.99,yes,locked 2006.230.00:06:30.96/vblo/05,709.99,yes,locked 2006.230.00:06:30.96/vblo/06,719.99,yes,locked 2006.230.00:06:30.96/vblo/07,734.99,yes,locked 2006.230.00:06:30.96/vblo/08,744.99,yes,locked 2006.230.00:06:31.11/vabw/8 2006.230.00:06:31.26/vbbw/8 2006.230.00:06:31.35/xfe/off,on,12.0 2006.230.00:06:31.74/ifatt/23,28,28,28 2006.230.00:06:32.08/fmout-gps/S +4.54E-07 2006.230.00:06:32.12:!2006.230.00:11:48 2006.230.00:11:48.00:data_valid=off 2006.230.00:11:48.00:"et 2006.230.00:11:48.01:!+3s 2006.230.00:11:51.02:"tape 2006.230.00:11:51.02:postob 2006.230.00:11:51.19/cable/+6.4047E-03 2006.230.00:11:51.19/wx/30.92,1002.8,77 2006.230.00:11:51.25/fmout-gps/S +4.57E-07 2006.230.00:11:51.25:scan_name=230-0016,jd0608,140 2006.230.00:11:51.25:source=3c274,123049.42,122328.0,2000.0,cw 2006.230.00:11:52.14#flagr#flagr/antenna,new-source 2006.230.00:11:52.14:checkk5 2006.230.00:11:52.56/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:11:52.97/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:11:53.38/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:11:53.84/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:11:54.25/chk_obsdata//k5ts1/T2300006??a.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:11:54.65/chk_obsdata//k5ts2/T2300006??b.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:11:55.06/chk_obsdata//k5ts3/T2300006??c.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:11:55.44/chk_obsdata//k5ts4/T2300006??d.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:11:56.16/k5log//k5ts1_log_newline 2006.230.00:11:56.87/k5log//k5ts2_log_newline 2006.230.00:11:57.56/k5log//k5ts3_log_newline 2006.230.00:11:58.30/k5log//k5ts4_log_newline 2006.230.00:11:58.32/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:11:58.32:setupk4=1 2006.230.00:11:58.32$setupk4/echo=on 2006.230.00:11:58.32$setupk4/pcalon 2006.230.00:11:58.32$pcalon/"no phase cal control is implemented here 2006.230.00:11:58.32$setupk4/"tpicd=stop 2006.230.00:11:58.32$setupk4/"rec=synch_on 2006.230.00:11:58.32$setupk4/"rec_mode=128 2006.230.00:11:58.32$setupk4/!* 2006.230.00:11:58.32$setupk4/recpk4 2006.230.00:11:58.32$recpk4/recpatch= 2006.230.00:11:58.32$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:11:58.32$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:11:58.32$setupk4/vck44 2006.230.00:11:58.32$vck44/valo=1,524.99 2006.230.00:11:58.32#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.00:11:58.32#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.00:11:58.32#ibcon#ireg 17 cls_cnt 0 2006.230.00:11:58.32#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:11:58.32#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:11:58.32#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:11:58.32#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:11:58.32#ibcon#first serial, iclass 28, count 0 2006.230.00:11:58.32#ibcon#enter sib2, iclass 28, count 0 2006.230.00:11:58.32#ibcon#flushed, iclass 28, count 0 2006.230.00:11:58.32#ibcon#about to write, iclass 28, count 0 2006.230.00:11:58.32#ibcon#wrote, iclass 28, count 0 2006.230.00:11:58.32#ibcon#about to read 3, iclass 28, count 0 2006.230.00:11:58.34#ibcon#read 3, iclass 28, count 0 2006.230.00:11:58.34#ibcon#about to read 4, iclass 28, count 0 2006.230.00:11:58.34#ibcon#read 4, iclass 28, count 0 2006.230.00:11:58.34#ibcon#about to read 5, iclass 28, count 0 2006.230.00:11:58.34#ibcon#read 5, iclass 28, count 0 2006.230.00:11:58.34#ibcon#about to read 6, iclass 28, count 0 2006.230.00:11:58.34#ibcon#read 6, iclass 28, count 0 2006.230.00:11:58.34#ibcon#end of sib2, iclass 28, count 0 2006.230.00:11:58.34#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:11:58.34#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:11:58.34#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:11:58.34#ibcon#*before write, iclass 28, count 0 2006.230.00:11:58.34#ibcon#enter sib2, iclass 28, count 0 2006.230.00:11:58.34#ibcon#flushed, iclass 28, count 0 2006.230.00:11:58.34#ibcon#about to write, iclass 28, count 0 2006.230.00:11:58.34#ibcon#wrote, iclass 28, count 0 2006.230.00:11:58.34#ibcon#about to read 3, iclass 28, count 0 2006.230.00:11:58.39#ibcon#read 3, iclass 28, count 0 2006.230.00:11:58.39#ibcon#about to read 4, iclass 28, count 0 2006.230.00:11:58.39#ibcon#read 4, iclass 28, count 0 2006.230.00:11:58.39#ibcon#about to read 5, iclass 28, count 0 2006.230.00:11:58.39#ibcon#read 5, iclass 28, count 0 2006.230.00:11:58.39#ibcon#about to read 6, iclass 28, count 0 2006.230.00:11:58.39#ibcon#read 6, iclass 28, count 0 2006.230.00:11:58.39#ibcon#end of sib2, iclass 28, count 0 2006.230.00:11:58.39#ibcon#*after write, iclass 28, count 0 2006.230.00:11:58.39#ibcon#*before return 0, iclass 28, count 0 2006.230.00:11:58.39#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:11:58.39#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:11:58.39#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:11:58.39#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:11:58.39$vck44/va=1,8 2006.230.00:11:58.39#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.00:11:58.39#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.00:11:58.39#ibcon#ireg 11 cls_cnt 2 2006.230.00:11:58.39#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:11:58.39#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:11:58.39#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:11:58.39#ibcon#enter wrdev, iclass 30, count 2 2006.230.00:11:58.39#ibcon#first serial, iclass 30, count 2 2006.230.00:11:58.39#ibcon#enter sib2, iclass 30, count 2 2006.230.00:11:58.39#ibcon#flushed, iclass 30, count 2 2006.230.00:11:58.39#ibcon#about to write, iclass 30, count 2 2006.230.00:11:58.39#ibcon#wrote, iclass 30, count 2 2006.230.00:11:58.39#ibcon#about to read 3, iclass 30, count 2 2006.230.00:11:58.41#ibcon#read 3, iclass 30, count 2 2006.230.00:11:58.41#ibcon#about to read 4, iclass 30, count 2 2006.230.00:11:58.41#ibcon#read 4, iclass 30, count 2 2006.230.00:11:58.41#ibcon#about to read 5, iclass 30, count 2 2006.230.00:11:58.41#ibcon#read 5, iclass 30, count 2 2006.230.00:11:58.41#ibcon#about to read 6, iclass 30, count 2 2006.230.00:11:58.41#ibcon#read 6, iclass 30, count 2 2006.230.00:11:58.41#ibcon#end of sib2, iclass 30, count 2 2006.230.00:11:58.41#ibcon#*mode == 0, iclass 30, count 2 2006.230.00:11:58.41#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.00:11:58.41#ibcon#[25=AT01-08\r\n] 2006.230.00:11:58.41#ibcon#*before write, iclass 30, count 2 2006.230.00:11:58.41#ibcon#enter sib2, iclass 30, count 2 2006.230.00:11:58.41#ibcon#flushed, iclass 30, count 2 2006.230.00:11:58.41#ibcon#about to write, iclass 30, count 2 2006.230.00:11:58.41#ibcon#wrote, iclass 30, count 2 2006.230.00:11:58.41#ibcon#about to read 3, iclass 30, count 2 2006.230.00:11:58.44#ibcon#read 3, iclass 30, count 2 2006.230.00:11:58.44#ibcon#about to read 4, iclass 30, count 2 2006.230.00:11:58.44#ibcon#read 4, iclass 30, count 2 2006.230.00:11:58.44#ibcon#about to read 5, iclass 30, count 2 2006.230.00:11:58.44#ibcon#read 5, iclass 30, count 2 2006.230.00:11:58.44#ibcon#about to read 6, iclass 30, count 2 2006.230.00:11:58.44#ibcon#read 6, iclass 30, count 2 2006.230.00:11:58.44#ibcon#end of sib2, iclass 30, count 2 2006.230.00:11:58.44#ibcon#*after write, iclass 30, count 2 2006.230.00:11:58.44#ibcon#*before return 0, iclass 30, count 2 2006.230.00:11:58.44#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:11:58.44#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:11:58.44#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.00:11:58.44#ibcon#ireg 7 cls_cnt 0 2006.230.00:11:58.44#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:11:58.56#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:11:58.56#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:11:58.56#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:11:58.56#ibcon#first serial, iclass 30, count 0 2006.230.00:11:58.56#ibcon#enter sib2, iclass 30, count 0 2006.230.00:11:58.56#ibcon#flushed, iclass 30, count 0 2006.230.00:11:58.56#ibcon#about to write, iclass 30, count 0 2006.230.00:11:58.56#ibcon#wrote, iclass 30, count 0 2006.230.00:11:58.56#ibcon#about to read 3, iclass 30, count 0 2006.230.00:11:58.58#ibcon#read 3, iclass 30, count 0 2006.230.00:11:58.58#ibcon#about to read 4, iclass 30, count 0 2006.230.00:11:58.58#ibcon#read 4, iclass 30, count 0 2006.230.00:11:58.58#ibcon#about to read 5, iclass 30, count 0 2006.230.00:11:58.58#ibcon#read 5, iclass 30, count 0 2006.230.00:11:58.58#ibcon#about to read 6, iclass 30, count 0 2006.230.00:11:58.58#ibcon#read 6, iclass 30, count 0 2006.230.00:11:58.58#ibcon#end of sib2, iclass 30, count 0 2006.230.00:11:58.58#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:11:58.58#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:11:58.58#ibcon#[25=USB\r\n] 2006.230.00:11:58.58#ibcon#*before write, iclass 30, count 0 2006.230.00:11:58.58#ibcon#enter sib2, iclass 30, count 0 2006.230.00:11:58.58#ibcon#flushed, iclass 30, count 0 2006.230.00:11:58.58#ibcon#about to write, iclass 30, count 0 2006.230.00:11:58.58#ibcon#wrote, iclass 30, count 0 2006.230.00:11:58.58#ibcon#about to read 3, iclass 30, count 0 2006.230.00:11:58.61#ibcon#read 3, iclass 30, count 0 2006.230.00:11:58.61#ibcon#about to read 4, iclass 30, count 0 2006.230.00:11:58.61#ibcon#read 4, iclass 30, count 0 2006.230.00:11:58.61#ibcon#about to read 5, iclass 30, count 0 2006.230.00:11:58.61#ibcon#read 5, iclass 30, count 0 2006.230.00:11:58.61#ibcon#about to read 6, iclass 30, count 0 2006.230.00:11:58.61#ibcon#read 6, iclass 30, count 0 2006.230.00:11:58.61#ibcon#end of sib2, iclass 30, count 0 2006.230.00:11:58.61#ibcon#*after write, iclass 30, count 0 2006.230.00:11:58.61#ibcon#*before return 0, iclass 30, count 0 2006.230.00:11:58.61#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:11:58.61#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:11:58.61#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:11:58.61#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:11:58.61$vck44/valo=2,534.99 2006.230.00:11:58.61#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.00:11:58.61#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.00:11:58.61#ibcon#ireg 17 cls_cnt 0 2006.230.00:11:58.61#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:11:58.61#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:11:58.61#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:11:58.61#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:11:58.61#ibcon#first serial, iclass 32, count 0 2006.230.00:11:58.61#ibcon#enter sib2, iclass 32, count 0 2006.230.00:11:58.61#ibcon#flushed, iclass 32, count 0 2006.230.00:11:58.61#ibcon#about to write, iclass 32, count 0 2006.230.00:11:58.61#ibcon#wrote, iclass 32, count 0 2006.230.00:11:58.61#ibcon#about to read 3, iclass 32, count 0 2006.230.00:11:58.63#ibcon#read 3, iclass 32, count 0 2006.230.00:11:58.63#ibcon#about to read 4, iclass 32, count 0 2006.230.00:11:58.63#ibcon#read 4, iclass 32, count 0 2006.230.00:11:58.63#ibcon#about to read 5, iclass 32, count 0 2006.230.00:11:58.63#ibcon#read 5, iclass 32, count 0 2006.230.00:11:58.63#ibcon#about to read 6, iclass 32, count 0 2006.230.00:11:58.63#ibcon#read 6, iclass 32, count 0 2006.230.00:11:58.63#ibcon#end of sib2, iclass 32, count 0 2006.230.00:11:58.63#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:11:58.63#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:11:58.63#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:11:58.63#ibcon#*before write, iclass 32, count 0 2006.230.00:11:58.63#ibcon#enter sib2, iclass 32, count 0 2006.230.00:11:58.63#ibcon#flushed, iclass 32, count 0 2006.230.00:11:58.63#ibcon#about to write, iclass 32, count 0 2006.230.00:11:58.63#ibcon#wrote, iclass 32, count 0 2006.230.00:11:58.63#ibcon#about to read 3, iclass 32, count 0 2006.230.00:11:58.67#ibcon#read 3, iclass 32, count 0 2006.230.00:11:58.67#ibcon#about to read 4, iclass 32, count 0 2006.230.00:11:58.67#ibcon#read 4, iclass 32, count 0 2006.230.00:11:58.67#ibcon#about to read 5, iclass 32, count 0 2006.230.00:11:58.67#ibcon#read 5, iclass 32, count 0 2006.230.00:11:58.67#ibcon#about to read 6, iclass 32, count 0 2006.230.00:11:58.67#ibcon#read 6, iclass 32, count 0 2006.230.00:11:58.67#ibcon#end of sib2, iclass 32, count 0 2006.230.00:11:58.67#ibcon#*after write, iclass 32, count 0 2006.230.00:11:58.67#ibcon#*before return 0, iclass 32, count 0 2006.230.00:11:58.67#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:11:58.67#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:11:58.67#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:11:58.67#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:11:58.67$vck44/va=2,7 2006.230.00:11:58.67#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.00:11:58.67#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.00:11:58.67#ibcon#ireg 11 cls_cnt 2 2006.230.00:11:58.67#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:11:58.73#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:11:58.73#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:11:58.73#ibcon#enter wrdev, iclass 34, count 2 2006.230.00:11:58.73#ibcon#first serial, iclass 34, count 2 2006.230.00:11:58.73#ibcon#enter sib2, iclass 34, count 2 2006.230.00:11:58.73#ibcon#flushed, iclass 34, count 2 2006.230.00:11:58.73#ibcon#about to write, iclass 34, count 2 2006.230.00:11:58.73#ibcon#wrote, iclass 34, count 2 2006.230.00:11:58.73#ibcon#about to read 3, iclass 34, count 2 2006.230.00:11:58.75#ibcon#read 3, iclass 34, count 2 2006.230.00:11:58.75#ibcon#about to read 4, iclass 34, count 2 2006.230.00:11:58.75#ibcon#read 4, iclass 34, count 2 2006.230.00:11:58.75#ibcon#about to read 5, iclass 34, count 2 2006.230.00:11:58.75#ibcon#read 5, iclass 34, count 2 2006.230.00:11:58.75#ibcon#about to read 6, iclass 34, count 2 2006.230.00:11:58.75#ibcon#read 6, iclass 34, count 2 2006.230.00:11:58.75#ibcon#end of sib2, iclass 34, count 2 2006.230.00:11:58.75#ibcon#*mode == 0, iclass 34, count 2 2006.230.00:11:58.75#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.00:11:58.75#ibcon#[25=AT02-07\r\n] 2006.230.00:11:58.75#ibcon#*before write, iclass 34, count 2 2006.230.00:11:58.75#ibcon#enter sib2, iclass 34, count 2 2006.230.00:11:58.75#ibcon#flushed, iclass 34, count 2 2006.230.00:11:58.75#ibcon#about to write, iclass 34, count 2 2006.230.00:11:58.75#ibcon#wrote, iclass 34, count 2 2006.230.00:11:58.75#ibcon#about to read 3, iclass 34, count 2 2006.230.00:11:58.78#ibcon#read 3, iclass 34, count 2 2006.230.00:11:58.78#ibcon#about to read 4, iclass 34, count 2 2006.230.00:11:58.78#ibcon#read 4, iclass 34, count 2 2006.230.00:11:58.78#ibcon#about to read 5, iclass 34, count 2 2006.230.00:11:58.78#ibcon#read 5, iclass 34, count 2 2006.230.00:11:58.78#ibcon#about to read 6, iclass 34, count 2 2006.230.00:11:58.78#ibcon#read 6, iclass 34, count 2 2006.230.00:11:58.78#ibcon#end of sib2, iclass 34, count 2 2006.230.00:11:58.78#ibcon#*after write, iclass 34, count 2 2006.230.00:11:58.78#ibcon#*before return 0, iclass 34, count 2 2006.230.00:11:58.78#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:11:58.78#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:11:58.78#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.00:11:58.78#ibcon#ireg 7 cls_cnt 0 2006.230.00:11:58.78#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:11:58.90#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:11:58.90#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:11:58.90#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:11:58.90#ibcon#first serial, iclass 34, count 0 2006.230.00:11:58.90#ibcon#enter sib2, iclass 34, count 0 2006.230.00:11:58.90#ibcon#flushed, iclass 34, count 0 2006.230.00:11:58.90#ibcon#about to write, iclass 34, count 0 2006.230.00:11:58.90#ibcon#wrote, iclass 34, count 0 2006.230.00:11:58.90#ibcon#about to read 3, iclass 34, count 0 2006.230.00:11:58.92#ibcon#read 3, iclass 34, count 0 2006.230.00:11:58.92#ibcon#about to read 4, iclass 34, count 0 2006.230.00:11:58.92#ibcon#read 4, iclass 34, count 0 2006.230.00:11:58.92#ibcon#about to read 5, iclass 34, count 0 2006.230.00:11:58.92#ibcon#read 5, iclass 34, count 0 2006.230.00:11:58.92#ibcon#about to read 6, iclass 34, count 0 2006.230.00:11:58.92#ibcon#read 6, iclass 34, count 0 2006.230.00:11:58.92#ibcon#end of sib2, iclass 34, count 0 2006.230.00:11:58.92#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:11:58.92#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:11:58.92#ibcon#[25=USB\r\n] 2006.230.00:11:58.92#ibcon#*before write, iclass 34, count 0 2006.230.00:11:58.92#ibcon#enter sib2, iclass 34, count 0 2006.230.00:11:58.92#ibcon#flushed, iclass 34, count 0 2006.230.00:11:58.92#ibcon#about to write, iclass 34, count 0 2006.230.00:11:58.92#ibcon#wrote, iclass 34, count 0 2006.230.00:11:58.92#ibcon#about to read 3, iclass 34, count 0 2006.230.00:11:58.95#ibcon#read 3, iclass 34, count 0 2006.230.00:11:58.95#ibcon#about to read 4, iclass 34, count 0 2006.230.00:11:58.95#ibcon#read 4, iclass 34, count 0 2006.230.00:11:58.95#ibcon#about to read 5, iclass 34, count 0 2006.230.00:11:58.95#ibcon#read 5, iclass 34, count 0 2006.230.00:11:58.95#ibcon#about to read 6, iclass 34, count 0 2006.230.00:11:58.95#ibcon#read 6, iclass 34, count 0 2006.230.00:11:58.95#ibcon#end of sib2, iclass 34, count 0 2006.230.00:11:58.95#ibcon#*after write, iclass 34, count 0 2006.230.00:11:58.95#ibcon#*before return 0, iclass 34, count 0 2006.230.00:11:58.95#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:11:58.95#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:11:58.95#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:11:58.95#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:11:58.95$vck44/valo=3,564.99 2006.230.00:11:58.95#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.00:11:58.95#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.00:11:58.95#ibcon#ireg 17 cls_cnt 0 2006.230.00:11:58.95#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:11:58.95#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:11:58.95#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:11:58.95#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:11:58.95#ibcon#first serial, iclass 36, count 0 2006.230.00:11:58.95#ibcon#enter sib2, iclass 36, count 0 2006.230.00:11:58.95#ibcon#flushed, iclass 36, count 0 2006.230.00:11:58.95#ibcon#about to write, iclass 36, count 0 2006.230.00:11:58.95#ibcon#wrote, iclass 36, count 0 2006.230.00:11:58.95#ibcon#about to read 3, iclass 36, count 0 2006.230.00:11:58.97#ibcon#read 3, iclass 36, count 0 2006.230.00:11:58.97#ibcon#about to read 4, iclass 36, count 0 2006.230.00:11:58.97#ibcon#read 4, iclass 36, count 0 2006.230.00:11:58.97#ibcon#about to read 5, iclass 36, count 0 2006.230.00:11:58.97#ibcon#read 5, iclass 36, count 0 2006.230.00:11:58.97#ibcon#about to read 6, iclass 36, count 0 2006.230.00:11:58.97#ibcon#read 6, iclass 36, count 0 2006.230.00:11:58.97#ibcon#end of sib2, iclass 36, count 0 2006.230.00:11:58.97#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:11:58.97#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:11:58.97#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:11:58.97#ibcon#*before write, iclass 36, count 0 2006.230.00:11:58.97#ibcon#enter sib2, iclass 36, count 0 2006.230.00:11:58.97#ibcon#flushed, iclass 36, count 0 2006.230.00:11:58.97#ibcon#about to write, iclass 36, count 0 2006.230.00:11:58.97#ibcon#wrote, iclass 36, count 0 2006.230.00:11:58.97#ibcon#about to read 3, iclass 36, count 0 2006.230.00:11:59.01#ibcon#read 3, iclass 36, count 0 2006.230.00:11:59.01#ibcon#about to read 4, iclass 36, count 0 2006.230.00:11:59.01#ibcon#read 4, iclass 36, count 0 2006.230.00:11:59.01#ibcon#about to read 5, iclass 36, count 0 2006.230.00:11:59.01#ibcon#read 5, iclass 36, count 0 2006.230.00:11:59.01#ibcon#about to read 6, iclass 36, count 0 2006.230.00:11:59.01#ibcon#read 6, iclass 36, count 0 2006.230.00:11:59.01#ibcon#end of sib2, iclass 36, count 0 2006.230.00:11:59.01#ibcon#*after write, iclass 36, count 0 2006.230.00:11:59.01#ibcon#*before return 0, iclass 36, count 0 2006.230.00:11:59.01#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:11:59.01#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:11:59.01#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:11:59.01#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:11:59.01$vck44/va=3,6 2006.230.00:11:59.01#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.00:11:59.01#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.00:11:59.01#ibcon#ireg 11 cls_cnt 2 2006.230.00:11:59.01#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:11:59.07#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:11:59.07#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:11:59.07#ibcon#enter wrdev, iclass 38, count 2 2006.230.00:11:59.07#ibcon#first serial, iclass 38, count 2 2006.230.00:11:59.07#ibcon#enter sib2, iclass 38, count 2 2006.230.00:11:59.07#ibcon#flushed, iclass 38, count 2 2006.230.00:11:59.07#ibcon#about to write, iclass 38, count 2 2006.230.00:11:59.07#ibcon#wrote, iclass 38, count 2 2006.230.00:11:59.07#ibcon#about to read 3, iclass 38, count 2 2006.230.00:11:59.09#ibcon#read 3, iclass 38, count 2 2006.230.00:11:59.09#ibcon#about to read 4, iclass 38, count 2 2006.230.00:11:59.09#ibcon#read 4, iclass 38, count 2 2006.230.00:11:59.09#ibcon#about to read 5, iclass 38, count 2 2006.230.00:11:59.09#ibcon#read 5, iclass 38, count 2 2006.230.00:11:59.09#ibcon#about to read 6, iclass 38, count 2 2006.230.00:11:59.09#ibcon#read 6, iclass 38, count 2 2006.230.00:11:59.09#ibcon#end of sib2, iclass 38, count 2 2006.230.00:11:59.09#ibcon#*mode == 0, iclass 38, count 2 2006.230.00:11:59.09#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.00:11:59.09#ibcon#[25=AT03-06\r\n] 2006.230.00:11:59.09#ibcon#*before write, iclass 38, count 2 2006.230.00:11:59.09#ibcon#enter sib2, iclass 38, count 2 2006.230.00:11:59.09#ibcon#flushed, iclass 38, count 2 2006.230.00:11:59.09#ibcon#about to write, iclass 38, count 2 2006.230.00:11:59.09#ibcon#wrote, iclass 38, count 2 2006.230.00:11:59.09#ibcon#about to read 3, iclass 38, count 2 2006.230.00:11:59.12#ibcon#read 3, iclass 38, count 2 2006.230.00:11:59.12#ibcon#about to read 4, iclass 38, count 2 2006.230.00:11:59.12#ibcon#read 4, iclass 38, count 2 2006.230.00:11:59.12#ibcon#about to read 5, iclass 38, count 2 2006.230.00:11:59.12#ibcon#read 5, iclass 38, count 2 2006.230.00:11:59.12#ibcon#about to read 6, iclass 38, count 2 2006.230.00:11:59.12#ibcon#read 6, iclass 38, count 2 2006.230.00:11:59.12#ibcon#end of sib2, iclass 38, count 2 2006.230.00:11:59.12#ibcon#*after write, iclass 38, count 2 2006.230.00:11:59.12#ibcon#*before return 0, iclass 38, count 2 2006.230.00:11:59.12#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:11:59.12#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:11:59.12#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.00:11:59.12#ibcon#ireg 7 cls_cnt 0 2006.230.00:11:59.12#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:11:59.24#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:11:59.24#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:11:59.24#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:11:59.24#ibcon#first serial, iclass 38, count 0 2006.230.00:11:59.24#ibcon#enter sib2, iclass 38, count 0 2006.230.00:11:59.24#ibcon#flushed, iclass 38, count 0 2006.230.00:11:59.24#ibcon#about to write, iclass 38, count 0 2006.230.00:11:59.24#ibcon#wrote, iclass 38, count 0 2006.230.00:11:59.24#ibcon#about to read 3, iclass 38, count 0 2006.230.00:11:59.26#ibcon#read 3, iclass 38, count 0 2006.230.00:11:59.26#ibcon#about to read 4, iclass 38, count 0 2006.230.00:11:59.26#ibcon#read 4, iclass 38, count 0 2006.230.00:11:59.26#ibcon#about to read 5, iclass 38, count 0 2006.230.00:11:59.26#ibcon#read 5, iclass 38, count 0 2006.230.00:11:59.26#ibcon#about to read 6, iclass 38, count 0 2006.230.00:11:59.26#ibcon#read 6, iclass 38, count 0 2006.230.00:11:59.26#ibcon#end of sib2, iclass 38, count 0 2006.230.00:11:59.26#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:11:59.26#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:11:59.26#ibcon#[25=USB\r\n] 2006.230.00:11:59.26#ibcon#*before write, iclass 38, count 0 2006.230.00:11:59.26#ibcon#enter sib2, iclass 38, count 0 2006.230.00:11:59.26#ibcon#flushed, iclass 38, count 0 2006.230.00:11:59.26#ibcon#about to write, iclass 38, count 0 2006.230.00:11:59.26#ibcon#wrote, iclass 38, count 0 2006.230.00:11:59.26#ibcon#about to read 3, iclass 38, count 0 2006.230.00:11:59.29#ibcon#read 3, iclass 38, count 0 2006.230.00:11:59.29#ibcon#about to read 4, iclass 38, count 0 2006.230.00:11:59.29#ibcon#read 4, iclass 38, count 0 2006.230.00:11:59.29#ibcon#about to read 5, iclass 38, count 0 2006.230.00:11:59.29#ibcon#read 5, iclass 38, count 0 2006.230.00:11:59.29#ibcon#about to read 6, iclass 38, count 0 2006.230.00:11:59.29#ibcon#read 6, iclass 38, count 0 2006.230.00:11:59.29#ibcon#end of sib2, iclass 38, count 0 2006.230.00:11:59.29#ibcon#*after write, iclass 38, count 0 2006.230.00:11:59.29#ibcon#*before return 0, iclass 38, count 0 2006.230.00:11:59.29#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:11:59.29#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:11:59.29#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:11:59.29#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:11:59.29$vck44/valo=4,624.99 2006.230.00:11:59.29#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.00:11:59.29#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.00:11:59.29#ibcon#ireg 17 cls_cnt 0 2006.230.00:11:59.29#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:11:59.29#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:11:59.29#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:11:59.29#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:11:59.29#ibcon#first serial, iclass 40, count 0 2006.230.00:11:59.29#ibcon#enter sib2, iclass 40, count 0 2006.230.00:11:59.29#ibcon#flushed, iclass 40, count 0 2006.230.00:11:59.29#ibcon#about to write, iclass 40, count 0 2006.230.00:11:59.29#ibcon#wrote, iclass 40, count 0 2006.230.00:11:59.29#ibcon#about to read 3, iclass 40, count 0 2006.230.00:11:59.31#ibcon#read 3, iclass 40, count 0 2006.230.00:11:59.31#ibcon#about to read 4, iclass 40, count 0 2006.230.00:11:59.31#ibcon#read 4, iclass 40, count 0 2006.230.00:11:59.31#ibcon#about to read 5, iclass 40, count 0 2006.230.00:11:59.31#ibcon#read 5, iclass 40, count 0 2006.230.00:11:59.31#ibcon#about to read 6, iclass 40, count 0 2006.230.00:11:59.31#ibcon#read 6, iclass 40, count 0 2006.230.00:11:59.31#ibcon#end of sib2, iclass 40, count 0 2006.230.00:11:59.31#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:11:59.31#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:11:59.31#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:11:59.31#ibcon#*before write, iclass 40, count 0 2006.230.00:11:59.31#ibcon#enter sib2, iclass 40, count 0 2006.230.00:11:59.31#ibcon#flushed, iclass 40, count 0 2006.230.00:11:59.31#ibcon#about to write, iclass 40, count 0 2006.230.00:11:59.31#ibcon#wrote, iclass 40, count 0 2006.230.00:11:59.31#ibcon#about to read 3, iclass 40, count 0 2006.230.00:11:59.35#ibcon#read 3, iclass 40, count 0 2006.230.00:11:59.35#ibcon#about to read 4, iclass 40, count 0 2006.230.00:11:59.35#ibcon#read 4, iclass 40, count 0 2006.230.00:11:59.35#ibcon#about to read 5, iclass 40, count 0 2006.230.00:11:59.35#ibcon#read 5, iclass 40, count 0 2006.230.00:11:59.35#ibcon#about to read 6, iclass 40, count 0 2006.230.00:11:59.35#ibcon#read 6, iclass 40, count 0 2006.230.00:11:59.35#ibcon#end of sib2, iclass 40, count 0 2006.230.00:11:59.35#ibcon#*after write, iclass 40, count 0 2006.230.00:11:59.35#ibcon#*before return 0, iclass 40, count 0 2006.230.00:11:59.35#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:11:59.35#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:11:59.35#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:11:59.35#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:11:59.35$vck44/va=4,7 2006.230.00:11:59.35#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.00:11:59.35#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.00:11:59.35#ibcon#ireg 11 cls_cnt 2 2006.230.00:11:59.35#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:11:59.41#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:11:59.41#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:11:59.41#ibcon#enter wrdev, iclass 4, count 2 2006.230.00:11:59.41#ibcon#first serial, iclass 4, count 2 2006.230.00:11:59.41#ibcon#enter sib2, iclass 4, count 2 2006.230.00:11:59.41#ibcon#flushed, iclass 4, count 2 2006.230.00:11:59.41#ibcon#about to write, iclass 4, count 2 2006.230.00:11:59.41#ibcon#wrote, iclass 4, count 2 2006.230.00:11:59.41#ibcon#about to read 3, iclass 4, count 2 2006.230.00:11:59.43#ibcon#read 3, iclass 4, count 2 2006.230.00:11:59.43#ibcon#about to read 4, iclass 4, count 2 2006.230.00:11:59.43#ibcon#read 4, iclass 4, count 2 2006.230.00:11:59.43#ibcon#about to read 5, iclass 4, count 2 2006.230.00:11:59.43#ibcon#read 5, iclass 4, count 2 2006.230.00:11:59.43#ibcon#about to read 6, iclass 4, count 2 2006.230.00:11:59.43#ibcon#read 6, iclass 4, count 2 2006.230.00:11:59.43#ibcon#end of sib2, iclass 4, count 2 2006.230.00:11:59.43#ibcon#*mode == 0, iclass 4, count 2 2006.230.00:11:59.43#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.00:11:59.43#ibcon#[25=AT04-07\r\n] 2006.230.00:11:59.43#ibcon#*before write, iclass 4, count 2 2006.230.00:11:59.43#ibcon#enter sib2, iclass 4, count 2 2006.230.00:11:59.43#ibcon#flushed, iclass 4, count 2 2006.230.00:11:59.43#ibcon#about to write, iclass 4, count 2 2006.230.00:11:59.43#ibcon#wrote, iclass 4, count 2 2006.230.00:11:59.43#ibcon#about to read 3, iclass 4, count 2 2006.230.00:11:59.46#ibcon#read 3, iclass 4, count 2 2006.230.00:11:59.46#ibcon#about to read 4, iclass 4, count 2 2006.230.00:11:59.46#ibcon#read 4, iclass 4, count 2 2006.230.00:11:59.46#ibcon#about to read 5, iclass 4, count 2 2006.230.00:11:59.46#ibcon#read 5, iclass 4, count 2 2006.230.00:11:59.46#ibcon#about to read 6, iclass 4, count 2 2006.230.00:11:59.46#ibcon#read 6, iclass 4, count 2 2006.230.00:11:59.46#ibcon#end of sib2, iclass 4, count 2 2006.230.00:11:59.46#ibcon#*after write, iclass 4, count 2 2006.230.00:11:59.46#ibcon#*before return 0, iclass 4, count 2 2006.230.00:11:59.46#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:11:59.50#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:11:59.50#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.00:11:59.50#ibcon#ireg 7 cls_cnt 0 2006.230.00:11:59.50#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:11:59.61#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:11:59.61#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:11:59.61#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:11:59.61#ibcon#first serial, iclass 4, count 0 2006.230.00:11:59.61#ibcon#enter sib2, iclass 4, count 0 2006.230.00:11:59.61#ibcon#flushed, iclass 4, count 0 2006.230.00:11:59.61#ibcon#about to write, iclass 4, count 0 2006.230.00:11:59.61#ibcon#wrote, iclass 4, count 0 2006.230.00:11:59.61#ibcon#about to read 3, iclass 4, count 0 2006.230.00:11:59.63#ibcon#read 3, iclass 4, count 0 2006.230.00:11:59.63#ibcon#about to read 4, iclass 4, count 0 2006.230.00:11:59.63#ibcon#read 4, iclass 4, count 0 2006.230.00:11:59.63#ibcon#about to read 5, iclass 4, count 0 2006.230.00:11:59.63#ibcon#read 5, iclass 4, count 0 2006.230.00:11:59.63#ibcon#about to read 6, iclass 4, count 0 2006.230.00:11:59.63#ibcon#read 6, iclass 4, count 0 2006.230.00:11:59.63#ibcon#end of sib2, iclass 4, count 0 2006.230.00:11:59.63#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:11:59.63#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:11:59.63#ibcon#[25=USB\r\n] 2006.230.00:11:59.63#ibcon#*before write, iclass 4, count 0 2006.230.00:11:59.63#ibcon#enter sib2, iclass 4, count 0 2006.230.00:11:59.63#ibcon#flushed, iclass 4, count 0 2006.230.00:11:59.63#ibcon#about to write, iclass 4, count 0 2006.230.00:11:59.63#ibcon#wrote, iclass 4, count 0 2006.230.00:11:59.63#ibcon#about to read 3, iclass 4, count 0 2006.230.00:11:59.66#ibcon#read 3, iclass 4, count 0 2006.230.00:11:59.66#ibcon#about to read 4, iclass 4, count 0 2006.230.00:11:59.66#ibcon#read 4, iclass 4, count 0 2006.230.00:11:59.66#ibcon#about to read 5, iclass 4, count 0 2006.230.00:11:59.66#ibcon#read 5, iclass 4, count 0 2006.230.00:11:59.66#ibcon#about to read 6, iclass 4, count 0 2006.230.00:11:59.66#ibcon#read 6, iclass 4, count 0 2006.230.00:11:59.66#ibcon#end of sib2, iclass 4, count 0 2006.230.00:11:59.66#ibcon#*after write, iclass 4, count 0 2006.230.00:11:59.66#ibcon#*before return 0, iclass 4, count 0 2006.230.00:11:59.66#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:11:59.66#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:11:59.66#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:11:59.66#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:11:59.66$vck44/valo=5,734.99 2006.230.00:11:59.66#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.00:11:59.66#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.00:11:59.66#ibcon#ireg 17 cls_cnt 0 2006.230.00:11:59.66#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:11:59.66#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:11:59.66#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:11:59.66#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:11:59.66#ibcon#first serial, iclass 6, count 0 2006.230.00:11:59.66#ibcon#enter sib2, iclass 6, count 0 2006.230.00:11:59.66#ibcon#flushed, iclass 6, count 0 2006.230.00:11:59.66#ibcon#about to write, iclass 6, count 0 2006.230.00:11:59.66#ibcon#wrote, iclass 6, count 0 2006.230.00:11:59.66#ibcon#about to read 3, iclass 6, count 0 2006.230.00:11:59.68#ibcon#read 3, iclass 6, count 0 2006.230.00:11:59.68#ibcon#about to read 4, iclass 6, count 0 2006.230.00:11:59.68#ibcon#read 4, iclass 6, count 0 2006.230.00:11:59.68#ibcon#about to read 5, iclass 6, count 0 2006.230.00:11:59.68#ibcon#read 5, iclass 6, count 0 2006.230.00:11:59.68#ibcon#about to read 6, iclass 6, count 0 2006.230.00:11:59.68#ibcon#read 6, iclass 6, count 0 2006.230.00:11:59.68#ibcon#end of sib2, iclass 6, count 0 2006.230.00:11:59.68#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:11:59.68#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:11:59.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:11:59.68#ibcon#*before write, iclass 6, count 0 2006.230.00:11:59.68#ibcon#enter sib2, iclass 6, count 0 2006.230.00:11:59.68#ibcon#flushed, iclass 6, count 0 2006.230.00:11:59.68#ibcon#about to write, iclass 6, count 0 2006.230.00:11:59.68#ibcon#wrote, iclass 6, count 0 2006.230.00:11:59.68#ibcon#about to read 3, iclass 6, count 0 2006.230.00:11:59.72#ibcon#read 3, iclass 6, count 0 2006.230.00:11:59.72#ibcon#about to read 4, iclass 6, count 0 2006.230.00:11:59.72#ibcon#read 4, iclass 6, count 0 2006.230.00:11:59.72#ibcon#about to read 5, iclass 6, count 0 2006.230.00:11:59.72#ibcon#read 5, iclass 6, count 0 2006.230.00:11:59.72#ibcon#about to read 6, iclass 6, count 0 2006.230.00:11:59.72#ibcon#read 6, iclass 6, count 0 2006.230.00:11:59.72#ibcon#end of sib2, iclass 6, count 0 2006.230.00:11:59.72#ibcon#*after write, iclass 6, count 0 2006.230.00:11:59.72#ibcon#*before return 0, iclass 6, count 0 2006.230.00:11:59.72#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:11:59.72#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:11:59.72#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:11:59.72#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:11:59.72$vck44/va=5,4 2006.230.00:11:59.72#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.00:11:59.72#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.00:11:59.72#ibcon#ireg 11 cls_cnt 2 2006.230.00:11:59.72#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:11:59.78#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:11:59.78#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:11:59.78#ibcon#enter wrdev, iclass 10, count 2 2006.230.00:11:59.78#ibcon#first serial, iclass 10, count 2 2006.230.00:11:59.78#ibcon#enter sib2, iclass 10, count 2 2006.230.00:11:59.78#ibcon#flushed, iclass 10, count 2 2006.230.00:11:59.78#ibcon#about to write, iclass 10, count 2 2006.230.00:11:59.78#ibcon#wrote, iclass 10, count 2 2006.230.00:11:59.78#ibcon#about to read 3, iclass 10, count 2 2006.230.00:11:59.80#ibcon#read 3, iclass 10, count 2 2006.230.00:11:59.80#ibcon#about to read 4, iclass 10, count 2 2006.230.00:11:59.80#ibcon#read 4, iclass 10, count 2 2006.230.00:11:59.80#ibcon#about to read 5, iclass 10, count 2 2006.230.00:11:59.80#ibcon#read 5, iclass 10, count 2 2006.230.00:11:59.80#ibcon#about to read 6, iclass 10, count 2 2006.230.00:11:59.80#ibcon#read 6, iclass 10, count 2 2006.230.00:11:59.80#ibcon#end of sib2, iclass 10, count 2 2006.230.00:11:59.80#ibcon#*mode == 0, iclass 10, count 2 2006.230.00:11:59.80#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.00:11:59.80#ibcon#[25=AT05-04\r\n] 2006.230.00:11:59.80#ibcon#*before write, iclass 10, count 2 2006.230.00:11:59.80#ibcon#enter sib2, iclass 10, count 2 2006.230.00:11:59.80#ibcon#flushed, iclass 10, count 2 2006.230.00:11:59.80#ibcon#about to write, iclass 10, count 2 2006.230.00:11:59.80#ibcon#wrote, iclass 10, count 2 2006.230.00:11:59.80#ibcon#about to read 3, iclass 10, count 2 2006.230.00:11:59.83#ibcon#read 3, iclass 10, count 2 2006.230.00:11:59.83#ibcon#about to read 4, iclass 10, count 2 2006.230.00:11:59.83#ibcon#read 4, iclass 10, count 2 2006.230.00:11:59.83#ibcon#about to read 5, iclass 10, count 2 2006.230.00:11:59.83#ibcon#read 5, iclass 10, count 2 2006.230.00:11:59.83#ibcon#about to read 6, iclass 10, count 2 2006.230.00:11:59.83#ibcon#read 6, iclass 10, count 2 2006.230.00:11:59.83#ibcon#end of sib2, iclass 10, count 2 2006.230.00:11:59.83#ibcon#*after write, iclass 10, count 2 2006.230.00:11:59.83#ibcon#*before return 0, iclass 10, count 2 2006.230.00:11:59.83#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:11:59.83#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:11:59.83#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.00:11:59.83#ibcon#ireg 7 cls_cnt 0 2006.230.00:11:59.83#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:11:59.95#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:11:59.95#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:11:59.95#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:11:59.95#ibcon#first serial, iclass 10, count 0 2006.230.00:11:59.95#ibcon#enter sib2, iclass 10, count 0 2006.230.00:11:59.95#ibcon#flushed, iclass 10, count 0 2006.230.00:11:59.95#ibcon#about to write, iclass 10, count 0 2006.230.00:11:59.95#ibcon#wrote, iclass 10, count 0 2006.230.00:11:59.95#ibcon#about to read 3, iclass 10, count 0 2006.230.00:11:59.97#ibcon#read 3, iclass 10, count 0 2006.230.00:11:59.97#ibcon#about to read 4, iclass 10, count 0 2006.230.00:11:59.97#ibcon#read 4, iclass 10, count 0 2006.230.00:11:59.97#ibcon#about to read 5, iclass 10, count 0 2006.230.00:11:59.97#ibcon#read 5, iclass 10, count 0 2006.230.00:11:59.97#ibcon#about to read 6, iclass 10, count 0 2006.230.00:11:59.97#ibcon#read 6, iclass 10, count 0 2006.230.00:11:59.97#ibcon#end of sib2, iclass 10, count 0 2006.230.00:11:59.97#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:11:59.97#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:11:59.97#ibcon#[25=USB\r\n] 2006.230.00:11:59.97#ibcon#*before write, iclass 10, count 0 2006.230.00:11:59.97#ibcon#enter sib2, iclass 10, count 0 2006.230.00:11:59.97#ibcon#flushed, iclass 10, count 0 2006.230.00:11:59.97#ibcon#about to write, iclass 10, count 0 2006.230.00:11:59.97#ibcon#wrote, iclass 10, count 0 2006.230.00:11:59.97#ibcon#about to read 3, iclass 10, count 0 2006.230.00:12:00.00#ibcon#read 3, iclass 10, count 0 2006.230.00:12:00.00#ibcon#about to read 4, iclass 10, count 0 2006.230.00:12:00.00#ibcon#read 4, iclass 10, count 0 2006.230.00:12:00.00#ibcon#about to read 5, iclass 10, count 0 2006.230.00:12:00.00#ibcon#read 5, iclass 10, count 0 2006.230.00:12:00.00#ibcon#about to read 6, iclass 10, count 0 2006.230.00:12:00.00#ibcon#read 6, iclass 10, count 0 2006.230.00:12:00.00#ibcon#end of sib2, iclass 10, count 0 2006.230.00:12:00.00#ibcon#*after write, iclass 10, count 0 2006.230.00:12:00.00#ibcon#*before return 0, iclass 10, count 0 2006.230.00:12:00.00#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:00.00#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:00.00#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:12:00.00#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:12:00.00$vck44/valo=6,814.99 2006.230.00:12:00.00#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.00:12:00.00#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.00:12:00.00#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:00.00#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:00.00#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:00.00#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:00.00#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:12:00.00#ibcon#first serial, iclass 12, count 0 2006.230.00:12:00.00#ibcon#enter sib2, iclass 12, count 0 2006.230.00:12:00.00#ibcon#flushed, iclass 12, count 0 2006.230.00:12:00.00#ibcon#about to write, iclass 12, count 0 2006.230.00:12:00.00#ibcon#wrote, iclass 12, count 0 2006.230.00:12:00.00#ibcon#about to read 3, iclass 12, count 0 2006.230.00:12:00.02#ibcon#read 3, iclass 12, count 0 2006.230.00:12:00.02#ibcon#about to read 4, iclass 12, count 0 2006.230.00:12:00.02#ibcon#read 4, iclass 12, count 0 2006.230.00:12:00.02#ibcon#about to read 5, iclass 12, count 0 2006.230.00:12:00.02#ibcon#read 5, iclass 12, count 0 2006.230.00:12:00.02#ibcon#about to read 6, iclass 12, count 0 2006.230.00:12:00.02#ibcon#read 6, iclass 12, count 0 2006.230.00:12:00.02#ibcon#end of sib2, iclass 12, count 0 2006.230.00:12:00.02#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:12:00.02#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:12:00.02#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:12:00.02#ibcon#*before write, iclass 12, count 0 2006.230.00:12:00.02#ibcon#enter sib2, iclass 12, count 0 2006.230.00:12:00.02#ibcon#flushed, iclass 12, count 0 2006.230.00:12:00.02#ibcon#about to write, iclass 12, count 0 2006.230.00:12:00.02#ibcon#wrote, iclass 12, count 0 2006.230.00:12:00.02#ibcon#about to read 3, iclass 12, count 0 2006.230.00:12:00.06#ibcon#read 3, iclass 12, count 0 2006.230.00:12:00.06#ibcon#about to read 4, iclass 12, count 0 2006.230.00:12:00.06#ibcon#read 4, iclass 12, count 0 2006.230.00:12:00.06#ibcon#about to read 5, iclass 12, count 0 2006.230.00:12:00.06#ibcon#read 5, iclass 12, count 0 2006.230.00:12:00.06#ibcon#about to read 6, iclass 12, count 0 2006.230.00:12:00.06#ibcon#read 6, iclass 12, count 0 2006.230.00:12:00.06#ibcon#end of sib2, iclass 12, count 0 2006.230.00:12:00.06#ibcon#*after write, iclass 12, count 0 2006.230.00:12:00.06#ibcon#*before return 0, iclass 12, count 0 2006.230.00:12:00.06#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:00.06#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:00.06#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:12:00.06#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:12:00.06$vck44/va=6,4 2006.230.00:12:00.06#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.00:12:00.06#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.00:12:00.06#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:00.06#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:00.12#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:00.12#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:00.12#ibcon#enter wrdev, iclass 14, count 2 2006.230.00:12:00.12#ibcon#first serial, iclass 14, count 2 2006.230.00:12:00.12#ibcon#enter sib2, iclass 14, count 2 2006.230.00:12:00.12#ibcon#flushed, iclass 14, count 2 2006.230.00:12:00.12#ibcon#about to write, iclass 14, count 2 2006.230.00:12:00.12#ibcon#wrote, iclass 14, count 2 2006.230.00:12:00.12#ibcon#about to read 3, iclass 14, count 2 2006.230.00:12:00.14#ibcon#read 3, iclass 14, count 2 2006.230.00:12:00.14#ibcon#about to read 4, iclass 14, count 2 2006.230.00:12:00.14#ibcon#read 4, iclass 14, count 2 2006.230.00:12:00.14#ibcon#about to read 5, iclass 14, count 2 2006.230.00:12:00.14#ibcon#read 5, iclass 14, count 2 2006.230.00:12:00.14#ibcon#about to read 6, iclass 14, count 2 2006.230.00:12:00.14#ibcon#read 6, iclass 14, count 2 2006.230.00:12:00.14#ibcon#end of sib2, iclass 14, count 2 2006.230.00:12:00.14#ibcon#*mode == 0, iclass 14, count 2 2006.230.00:12:00.14#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.00:12:00.14#ibcon#[25=AT06-04\r\n] 2006.230.00:12:00.14#ibcon#*before write, iclass 14, count 2 2006.230.00:12:00.14#ibcon#enter sib2, iclass 14, count 2 2006.230.00:12:00.14#ibcon#flushed, iclass 14, count 2 2006.230.00:12:00.14#ibcon#about to write, iclass 14, count 2 2006.230.00:12:00.14#ibcon#wrote, iclass 14, count 2 2006.230.00:12:00.14#ibcon#about to read 3, iclass 14, count 2 2006.230.00:12:00.17#ibcon#read 3, iclass 14, count 2 2006.230.00:12:00.17#ibcon#about to read 4, iclass 14, count 2 2006.230.00:12:00.17#ibcon#read 4, iclass 14, count 2 2006.230.00:12:00.17#ibcon#about to read 5, iclass 14, count 2 2006.230.00:12:00.17#ibcon#read 5, iclass 14, count 2 2006.230.00:12:00.17#ibcon#about to read 6, iclass 14, count 2 2006.230.00:12:00.17#ibcon#read 6, iclass 14, count 2 2006.230.00:12:00.17#ibcon#end of sib2, iclass 14, count 2 2006.230.00:12:00.17#ibcon#*after write, iclass 14, count 2 2006.230.00:12:00.17#ibcon#*before return 0, iclass 14, count 2 2006.230.00:12:00.17#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:00.17#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:00.17#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.00:12:00.17#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:00.17#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:00.20#abcon#<5=/09 1.8 5.4 30.92 781002.8\r\n> 2006.230.00:12:00.22#abcon#{5=INTERFACE CLEAR} 2006.230.00:12:00.28#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:12:00.29#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:00.29#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:00.29#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:12:00.29#ibcon#first serial, iclass 14, count 0 2006.230.00:12:00.29#ibcon#enter sib2, iclass 14, count 0 2006.230.00:12:00.29#ibcon#flushed, iclass 14, count 0 2006.230.00:12:00.29#ibcon#about to write, iclass 14, count 0 2006.230.00:12:00.29#ibcon#wrote, iclass 14, count 0 2006.230.00:12:00.29#ibcon#about to read 3, iclass 14, count 0 2006.230.00:12:00.31#ibcon#read 3, iclass 14, count 0 2006.230.00:12:00.31#ibcon#about to read 4, iclass 14, count 0 2006.230.00:12:00.31#ibcon#read 4, iclass 14, count 0 2006.230.00:12:00.31#ibcon#about to read 5, iclass 14, count 0 2006.230.00:12:00.31#ibcon#read 5, iclass 14, count 0 2006.230.00:12:00.31#ibcon#about to read 6, iclass 14, count 0 2006.230.00:12:00.31#ibcon#read 6, iclass 14, count 0 2006.230.00:12:00.31#ibcon#end of sib2, iclass 14, count 0 2006.230.00:12:00.31#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:12:00.31#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:12:00.31#ibcon#[25=USB\r\n] 2006.230.00:12:00.31#ibcon#*before write, iclass 14, count 0 2006.230.00:12:00.31#ibcon#enter sib2, iclass 14, count 0 2006.230.00:12:00.31#ibcon#flushed, iclass 14, count 0 2006.230.00:12:00.31#ibcon#about to write, iclass 14, count 0 2006.230.00:12:00.31#ibcon#wrote, iclass 14, count 0 2006.230.00:12:00.31#ibcon#about to read 3, iclass 14, count 0 2006.230.00:12:00.34#ibcon#read 3, iclass 14, count 0 2006.230.00:12:00.34#ibcon#about to read 4, iclass 14, count 0 2006.230.00:12:00.34#ibcon#read 4, iclass 14, count 0 2006.230.00:12:00.34#ibcon#about to read 5, iclass 14, count 0 2006.230.00:12:00.34#ibcon#read 5, iclass 14, count 0 2006.230.00:12:00.34#ibcon#about to read 6, iclass 14, count 0 2006.230.00:12:00.34#ibcon#read 6, iclass 14, count 0 2006.230.00:12:00.34#ibcon#end of sib2, iclass 14, count 0 2006.230.00:12:00.34#ibcon#*after write, iclass 14, count 0 2006.230.00:12:00.34#ibcon#*before return 0, iclass 14, count 0 2006.230.00:12:00.34#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:00.34#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:00.34#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:12:00.34#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:12:00.34$vck44/valo=7,864.99 2006.230.00:12:00.34#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.00:12:00.34#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.00:12:00.34#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:00.34#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:00.34#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:00.34#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:00.34#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:12:00.34#ibcon#first serial, iclass 20, count 0 2006.230.00:12:00.34#ibcon#enter sib2, iclass 20, count 0 2006.230.00:12:00.34#ibcon#flushed, iclass 20, count 0 2006.230.00:12:00.34#ibcon#about to write, iclass 20, count 0 2006.230.00:12:00.34#ibcon#wrote, iclass 20, count 0 2006.230.00:12:00.34#ibcon#about to read 3, iclass 20, count 0 2006.230.00:12:00.36#ibcon#read 3, iclass 20, count 0 2006.230.00:12:00.36#ibcon#about to read 4, iclass 20, count 0 2006.230.00:12:00.36#ibcon#read 4, iclass 20, count 0 2006.230.00:12:00.36#ibcon#about to read 5, iclass 20, count 0 2006.230.00:12:00.36#ibcon#read 5, iclass 20, count 0 2006.230.00:12:00.36#ibcon#about to read 6, iclass 20, count 0 2006.230.00:12:00.36#ibcon#read 6, iclass 20, count 0 2006.230.00:12:00.36#ibcon#end of sib2, iclass 20, count 0 2006.230.00:12:00.36#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:12:00.36#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:12:00.36#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:12:00.36#ibcon#*before write, iclass 20, count 0 2006.230.00:12:00.36#ibcon#enter sib2, iclass 20, count 0 2006.230.00:12:00.36#ibcon#flushed, iclass 20, count 0 2006.230.00:12:00.36#ibcon#about to write, iclass 20, count 0 2006.230.00:12:00.36#ibcon#wrote, iclass 20, count 0 2006.230.00:12:00.36#ibcon#about to read 3, iclass 20, count 0 2006.230.00:12:00.40#ibcon#read 3, iclass 20, count 0 2006.230.00:12:00.40#ibcon#about to read 4, iclass 20, count 0 2006.230.00:12:00.40#ibcon#read 4, iclass 20, count 0 2006.230.00:12:00.40#ibcon#about to read 5, iclass 20, count 0 2006.230.00:12:00.40#ibcon#read 5, iclass 20, count 0 2006.230.00:12:00.40#ibcon#about to read 6, iclass 20, count 0 2006.230.00:12:00.40#ibcon#read 6, iclass 20, count 0 2006.230.00:12:00.40#ibcon#end of sib2, iclass 20, count 0 2006.230.00:12:00.40#ibcon#*after write, iclass 20, count 0 2006.230.00:12:00.40#ibcon#*before return 0, iclass 20, count 0 2006.230.00:12:00.40#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:00.40#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:00.40#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:12:00.40#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:12:00.40$vck44/va=7,5 2006.230.00:12:00.40#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.00:12:00.40#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.00:12:00.40#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:00.40#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:00.46#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:00.46#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:00.46#ibcon#enter wrdev, iclass 22, count 2 2006.230.00:12:00.46#ibcon#first serial, iclass 22, count 2 2006.230.00:12:00.46#ibcon#enter sib2, iclass 22, count 2 2006.230.00:12:00.46#ibcon#flushed, iclass 22, count 2 2006.230.00:12:00.46#ibcon#about to write, iclass 22, count 2 2006.230.00:12:00.46#ibcon#wrote, iclass 22, count 2 2006.230.00:12:00.46#ibcon#about to read 3, iclass 22, count 2 2006.230.00:12:00.48#ibcon#read 3, iclass 22, count 2 2006.230.00:12:00.48#ibcon#about to read 4, iclass 22, count 2 2006.230.00:12:00.48#ibcon#read 4, iclass 22, count 2 2006.230.00:12:00.48#ibcon#about to read 5, iclass 22, count 2 2006.230.00:12:00.48#ibcon#read 5, iclass 22, count 2 2006.230.00:12:00.48#ibcon#about to read 6, iclass 22, count 2 2006.230.00:12:00.48#ibcon#read 6, iclass 22, count 2 2006.230.00:12:00.48#ibcon#end of sib2, iclass 22, count 2 2006.230.00:12:00.48#ibcon#*mode == 0, iclass 22, count 2 2006.230.00:12:00.48#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.00:12:00.48#ibcon#[25=AT07-05\r\n] 2006.230.00:12:00.48#ibcon#*before write, iclass 22, count 2 2006.230.00:12:00.48#ibcon#enter sib2, iclass 22, count 2 2006.230.00:12:00.48#ibcon#flushed, iclass 22, count 2 2006.230.00:12:00.48#ibcon#about to write, iclass 22, count 2 2006.230.00:12:00.48#ibcon#wrote, iclass 22, count 2 2006.230.00:12:00.48#ibcon#about to read 3, iclass 22, count 2 2006.230.00:12:00.51#ibcon#read 3, iclass 22, count 2 2006.230.00:12:00.51#ibcon#about to read 4, iclass 22, count 2 2006.230.00:12:00.51#ibcon#read 4, iclass 22, count 2 2006.230.00:12:00.51#ibcon#about to read 5, iclass 22, count 2 2006.230.00:12:00.51#ibcon#read 5, iclass 22, count 2 2006.230.00:12:00.51#ibcon#about to read 6, iclass 22, count 2 2006.230.00:12:00.51#ibcon#read 6, iclass 22, count 2 2006.230.00:12:00.51#ibcon#end of sib2, iclass 22, count 2 2006.230.00:12:00.51#ibcon#*after write, iclass 22, count 2 2006.230.00:12:00.51#ibcon#*before return 0, iclass 22, count 2 2006.230.00:12:00.51#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:00.51#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:00.51#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.00:12:00.51#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:00.51#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:00.63#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:00.63#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:00.63#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:12:00.63#ibcon#first serial, iclass 22, count 0 2006.230.00:12:00.63#ibcon#enter sib2, iclass 22, count 0 2006.230.00:12:00.63#ibcon#flushed, iclass 22, count 0 2006.230.00:12:00.63#ibcon#about to write, iclass 22, count 0 2006.230.00:12:00.63#ibcon#wrote, iclass 22, count 0 2006.230.00:12:00.63#ibcon#about to read 3, iclass 22, count 0 2006.230.00:12:00.65#ibcon#read 3, iclass 22, count 0 2006.230.00:12:00.65#ibcon#about to read 4, iclass 22, count 0 2006.230.00:12:00.65#ibcon#read 4, iclass 22, count 0 2006.230.00:12:00.65#ibcon#about to read 5, iclass 22, count 0 2006.230.00:12:00.65#ibcon#read 5, iclass 22, count 0 2006.230.00:12:00.65#ibcon#about to read 6, iclass 22, count 0 2006.230.00:12:00.65#ibcon#read 6, iclass 22, count 0 2006.230.00:12:00.65#ibcon#end of sib2, iclass 22, count 0 2006.230.00:12:00.65#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:12:00.65#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:12:00.65#ibcon#[25=USB\r\n] 2006.230.00:12:00.65#ibcon#*before write, iclass 22, count 0 2006.230.00:12:00.65#ibcon#enter sib2, iclass 22, count 0 2006.230.00:12:00.65#ibcon#flushed, iclass 22, count 0 2006.230.00:12:00.65#ibcon#about to write, iclass 22, count 0 2006.230.00:12:00.65#ibcon#wrote, iclass 22, count 0 2006.230.00:12:00.65#ibcon#about to read 3, iclass 22, count 0 2006.230.00:12:00.68#ibcon#read 3, iclass 22, count 0 2006.230.00:12:00.68#ibcon#about to read 4, iclass 22, count 0 2006.230.00:12:00.68#ibcon#read 4, iclass 22, count 0 2006.230.00:12:00.68#ibcon#about to read 5, iclass 22, count 0 2006.230.00:12:00.68#ibcon#read 5, iclass 22, count 0 2006.230.00:12:00.68#ibcon#about to read 6, iclass 22, count 0 2006.230.00:12:00.68#ibcon#read 6, iclass 22, count 0 2006.230.00:12:00.68#ibcon#end of sib2, iclass 22, count 0 2006.230.00:12:00.68#ibcon#*after write, iclass 22, count 0 2006.230.00:12:00.68#ibcon#*before return 0, iclass 22, count 0 2006.230.00:12:00.68#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:00.68#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:00.68#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:12:00.68#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:12:00.68$vck44/valo=8,884.99 2006.230.00:12:00.68#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.00:12:00.68#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.00:12:00.68#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:00.68#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:00.68#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:00.68#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:00.68#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:12:00.68#ibcon#first serial, iclass 24, count 0 2006.230.00:12:00.68#ibcon#enter sib2, iclass 24, count 0 2006.230.00:12:00.68#ibcon#flushed, iclass 24, count 0 2006.230.00:12:00.68#ibcon#about to write, iclass 24, count 0 2006.230.00:12:00.68#ibcon#wrote, iclass 24, count 0 2006.230.00:12:00.68#ibcon#about to read 3, iclass 24, count 0 2006.230.00:12:00.70#ibcon#read 3, iclass 24, count 0 2006.230.00:12:00.70#ibcon#about to read 4, iclass 24, count 0 2006.230.00:12:00.70#ibcon#read 4, iclass 24, count 0 2006.230.00:12:00.70#ibcon#about to read 5, iclass 24, count 0 2006.230.00:12:00.70#ibcon#read 5, iclass 24, count 0 2006.230.00:12:00.70#ibcon#about to read 6, iclass 24, count 0 2006.230.00:12:00.70#ibcon#read 6, iclass 24, count 0 2006.230.00:12:00.70#ibcon#end of sib2, iclass 24, count 0 2006.230.00:12:00.70#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:12:00.70#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:12:00.70#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:12:00.70#ibcon#*before write, iclass 24, count 0 2006.230.00:12:00.70#ibcon#enter sib2, iclass 24, count 0 2006.230.00:12:00.70#ibcon#flushed, iclass 24, count 0 2006.230.00:12:00.70#ibcon#about to write, iclass 24, count 0 2006.230.00:12:00.70#ibcon#wrote, iclass 24, count 0 2006.230.00:12:00.70#ibcon#about to read 3, iclass 24, count 0 2006.230.00:12:00.74#ibcon#read 3, iclass 24, count 0 2006.230.00:12:00.74#ibcon#about to read 4, iclass 24, count 0 2006.230.00:12:00.74#ibcon#read 4, iclass 24, count 0 2006.230.00:12:00.74#ibcon#about to read 5, iclass 24, count 0 2006.230.00:12:00.74#ibcon#read 5, iclass 24, count 0 2006.230.00:12:00.74#ibcon#about to read 6, iclass 24, count 0 2006.230.00:12:00.74#ibcon#read 6, iclass 24, count 0 2006.230.00:12:00.74#ibcon#end of sib2, iclass 24, count 0 2006.230.00:12:00.74#ibcon#*after write, iclass 24, count 0 2006.230.00:12:00.74#ibcon#*before return 0, iclass 24, count 0 2006.230.00:12:00.74#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:00.74#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:00.74#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:12:00.74#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:12:00.74$vck44/va=8,6 2006.230.00:12:00.74#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.00:12:00.74#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.00:12:00.74#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:00.74#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:12:00.80#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:12:00.80#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:12:00.80#ibcon#enter wrdev, iclass 26, count 2 2006.230.00:12:00.80#ibcon#first serial, iclass 26, count 2 2006.230.00:12:00.80#ibcon#enter sib2, iclass 26, count 2 2006.230.00:12:00.80#ibcon#flushed, iclass 26, count 2 2006.230.00:12:00.80#ibcon#about to write, iclass 26, count 2 2006.230.00:12:00.80#ibcon#wrote, iclass 26, count 2 2006.230.00:12:00.80#ibcon#about to read 3, iclass 26, count 2 2006.230.00:12:00.82#ibcon#read 3, iclass 26, count 2 2006.230.00:12:00.82#ibcon#about to read 4, iclass 26, count 2 2006.230.00:12:00.82#ibcon#read 4, iclass 26, count 2 2006.230.00:12:00.82#ibcon#about to read 5, iclass 26, count 2 2006.230.00:12:00.82#ibcon#read 5, iclass 26, count 2 2006.230.00:12:00.82#ibcon#about to read 6, iclass 26, count 2 2006.230.00:12:00.82#ibcon#read 6, iclass 26, count 2 2006.230.00:12:00.82#ibcon#end of sib2, iclass 26, count 2 2006.230.00:12:00.82#ibcon#*mode == 0, iclass 26, count 2 2006.230.00:12:00.82#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.00:12:00.82#ibcon#[25=AT08-06\r\n] 2006.230.00:12:00.82#ibcon#*before write, iclass 26, count 2 2006.230.00:12:00.82#ibcon#enter sib2, iclass 26, count 2 2006.230.00:12:00.82#ibcon#flushed, iclass 26, count 2 2006.230.00:12:00.82#ibcon#about to write, iclass 26, count 2 2006.230.00:12:00.82#ibcon#wrote, iclass 26, count 2 2006.230.00:12:00.82#ibcon#about to read 3, iclass 26, count 2 2006.230.00:12:00.85#ibcon#read 3, iclass 26, count 2 2006.230.00:12:00.85#ibcon#about to read 4, iclass 26, count 2 2006.230.00:12:00.85#ibcon#read 4, iclass 26, count 2 2006.230.00:12:00.85#ibcon#about to read 5, iclass 26, count 2 2006.230.00:12:00.85#ibcon#read 5, iclass 26, count 2 2006.230.00:12:00.85#ibcon#about to read 6, iclass 26, count 2 2006.230.00:12:00.85#ibcon#read 6, iclass 26, count 2 2006.230.00:12:00.85#ibcon#end of sib2, iclass 26, count 2 2006.230.00:12:00.85#ibcon#*after write, iclass 26, count 2 2006.230.00:12:00.85#ibcon#*before return 0, iclass 26, count 2 2006.230.00:12:00.85#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:12:00.85#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:12:00.85#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.00:12:00.85#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:00.85#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:12:00.97#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:12:00.97#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:12:00.97#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:12:00.97#ibcon#first serial, iclass 26, count 0 2006.230.00:12:00.97#ibcon#enter sib2, iclass 26, count 0 2006.230.00:12:00.97#ibcon#flushed, iclass 26, count 0 2006.230.00:12:00.97#ibcon#about to write, iclass 26, count 0 2006.230.00:12:00.97#ibcon#wrote, iclass 26, count 0 2006.230.00:12:00.97#ibcon#about to read 3, iclass 26, count 0 2006.230.00:12:00.99#ibcon#read 3, iclass 26, count 0 2006.230.00:12:00.99#ibcon#about to read 4, iclass 26, count 0 2006.230.00:12:00.99#ibcon#read 4, iclass 26, count 0 2006.230.00:12:00.99#ibcon#about to read 5, iclass 26, count 0 2006.230.00:12:00.99#ibcon#read 5, iclass 26, count 0 2006.230.00:12:00.99#ibcon#about to read 6, iclass 26, count 0 2006.230.00:12:00.99#ibcon#read 6, iclass 26, count 0 2006.230.00:12:00.99#ibcon#end of sib2, iclass 26, count 0 2006.230.00:12:00.99#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:12:00.99#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:12:00.99#ibcon#[25=USB\r\n] 2006.230.00:12:00.99#ibcon#*before write, iclass 26, count 0 2006.230.00:12:00.99#ibcon#enter sib2, iclass 26, count 0 2006.230.00:12:00.99#ibcon#flushed, iclass 26, count 0 2006.230.00:12:00.99#ibcon#about to write, iclass 26, count 0 2006.230.00:12:00.99#ibcon#wrote, iclass 26, count 0 2006.230.00:12:00.99#ibcon#about to read 3, iclass 26, count 0 2006.230.00:12:01.02#ibcon#read 3, iclass 26, count 0 2006.230.00:12:01.02#ibcon#about to read 4, iclass 26, count 0 2006.230.00:12:01.02#ibcon#read 4, iclass 26, count 0 2006.230.00:12:01.02#ibcon#about to read 5, iclass 26, count 0 2006.230.00:12:01.02#ibcon#read 5, iclass 26, count 0 2006.230.00:12:01.02#ibcon#about to read 6, iclass 26, count 0 2006.230.00:12:01.02#ibcon#read 6, iclass 26, count 0 2006.230.00:12:01.02#ibcon#end of sib2, iclass 26, count 0 2006.230.00:12:01.02#ibcon#*after write, iclass 26, count 0 2006.230.00:12:01.02#ibcon#*before return 0, iclass 26, count 0 2006.230.00:12:01.02#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:12:01.02#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:12:01.02#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:12:01.02#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:12:01.02$vck44/vblo=1,629.99 2006.230.00:12:01.02#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.00:12:01.02#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.00:12:01.02#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:01.02#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:12:01.02#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:12:01.02#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:12:01.02#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:12:01.02#ibcon#first serial, iclass 28, count 0 2006.230.00:12:01.02#ibcon#enter sib2, iclass 28, count 0 2006.230.00:12:01.02#ibcon#flushed, iclass 28, count 0 2006.230.00:12:01.02#ibcon#about to write, iclass 28, count 0 2006.230.00:12:01.02#ibcon#wrote, iclass 28, count 0 2006.230.00:12:01.02#ibcon#about to read 3, iclass 28, count 0 2006.230.00:12:01.04#ibcon#read 3, iclass 28, count 0 2006.230.00:12:01.04#ibcon#about to read 4, iclass 28, count 0 2006.230.00:12:01.04#ibcon#read 4, iclass 28, count 0 2006.230.00:12:01.04#ibcon#about to read 5, iclass 28, count 0 2006.230.00:12:01.04#ibcon#read 5, iclass 28, count 0 2006.230.00:12:01.04#ibcon#about to read 6, iclass 28, count 0 2006.230.00:12:01.04#ibcon#read 6, iclass 28, count 0 2006.230.00:12:01.04#ibcon#end of sib2, iclass 28, count 0 2006.230.00:12:01.04#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:12:01.04#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:12:01.04#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:12:01.04#ibcon#*before write, iclass 28, count 0 2006.230.00:12:01.04#ibcon#enter sib2, iclass 28, count 0 2006.230.00:12:01.04#ibcon#flushed, iclass 28, count 0 2006.230.00:12:01.04#ibcon#about to write, iclass 28, count 0 2006.230.00:12:01.04#ibcon#wrote, iclass 28, count 0 2006.230.00:12:01.04#ibcon#about to read 3, iclass 28, count 0 2006.230.00:12:01.08#ibcon#read 3, iclass 28, count 0 2006.230.00:12:01.08#ibcon#about to read 4, iclass 28, count 0 2006.230.00:12:01.08#ibcon#read 4, iclass 28, count 0 2006.230.00:12:01.08#ibcon#about to read 5, iclass 28, count 0 2006.230.00:12:01.08#ibcon#read 5, iclass 28, count 0 2006.230.00:12:01.08#ibcon#about to read 6, iclass 28, count 0 2006.230.00:12:01.08#ibcon#read 6, iclass 28, count 0 2006.230.00:12:01.08#ibcon#end of sib2, iclass 28, count 0 2006.230.00:12:01.08#ibcon#*after write, iclass 28, count 0 2006.230.00:12:01.08#ibcon#*before return 0, iclass 28, count 0 2006.230.00:12:01.08#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:12:01.08#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:12:01.08#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:12:01.08#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:12:01.08$vck44/vb=1,4 2006.230.00:12:01.08#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.00:12:01.08#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.00:12:01.08#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:01.08#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:12:01.08#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:12:01.08#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:12:01.08#ibcon#enter wrdev, iclass 30, count 2 2006.230.00:12:01.08#ibcon#first serial, iclass 30, count 2 2006.230.00:12:01.08#ibcon#enter sib2, iclass 30, count 2 2006.230.00:12:01.08#ibcon#flushed, iclass 30, count 2 2006.230.00:12:01.08#ibcon#about to write, iclass 30, count 2 2006.230.00:12:01.08#ibcon#wrote, iclass 30, count 2 2006.230.00:12:01.08#ibcon#about to read 3, iclass 30, count 2 2006.230.00:12:01.10#ibcon#read 3, iclass 30, count 2 2006.230.00:12:01.10#ibcon#about to read 4, iclass 30, count 2 2006.230.00:12:01.10#ibcon#read 4, iclass 30, count 2 2006.230.00:12:01.10#ibcon#about to read 5, iclass 30, count 2 2006.230.00:12:01.10#ibcon#read 5, iclass 30, count 2 2006.230.00:12:01.10#ibcon#about to read 6, iclass 30, count 2 2006.230.00:12:01.10#ibcon#read 6, iclass 30, count 2 2006.230.00:12:01.10#ibcon#end of sib2, iclass 30, count 2 2006.230.00:12:01.10#ibcon#*mode == 0, iclass 30, count 2 2006.230.00:12:01.10#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.00:12:01.10#ibcon#[27=AT01-04\r\n] 2006.230.00:12:01.10#ibcon#*before write, iclass 30, count 2 2006.230.00:12:01.10#ibcon#enter sib2, iclass 30, count 2 2006.230.00:12:01.10#ibcon#flushed, iclass 30, count 2 2006.230.00:12:01.10#ibcon#about to write, iclass 30, count 2 2006.230.00:12:01.10#ibcon#wrote, iclass 30, count 2 2006.230.00:12:01.10#ibcon#about to read 3, iclass 30, count 2 2006.230.00:12:01.13#ibcon#read 3, iclass 30, count 2 2006.230.00:12:01.13#ibcon#about to read 4, iclass 30, count 2 2006.230.00:12:01.13#ibcon#read 4, iclass 30, count 2 2006.230.00:12:01.13#ibcon#about to read 5, iclass 30, count 2 2006.230.00:12:01.13#ibcon#read 5, iclass 30, count 2 2006.230.00:12:01.13#ibcon#about to read 6, iclass 30, count 2 2006.230.00:12:01.13#ibcon#read 6, iclass 30, count 2 2006.230.00:12:01.13#ibcon#end of sib2, iclass 30, count 2 2006.230.00:12:01.13#ibcon#*after write, iclass 30, count 2 2006.230.00:12:01.13#ibcon#*before return 0, iclass 30, count 2 2006.230.00:12:01.13#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:12:01.13#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:12:01.13#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.00:12:01.13#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:01.13#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:12:01.25#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:12:01.25#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:12:01.25#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:12:01.25#ibcon#first serial, iclass 30, count 0 2006.230.00:12:01.25#ibcon#enter sib2, iclass 30, count 0 2006.230.00:12:01.25#ibcon#flushed, iclass 30, count 0 2006.230.00:12:01.25#ibcon#about to write, iclass 30, count 0 2006.230.00:12:01.25#ibcon#wrote, iclass 30, count 0 2006.230.00:12:01.25#ibcon#about to read 3, iclass 30, count 0 2006.230.00:12:01.27#ibcon#read 3, iclass 30, count 0 2006.230.00:12:01.27#ibcon#about to read 4, iclass 30, count 0 2006.230.00:12:01.27#ibcon#read 4, iclass 30, count 0 2006.230.00:12:01.27#ibcon#about to read 5, iclass 30, count 0 2006.230.00:12:01.27#ibcon#read 5, iclass 30, count 0 2006.230.00:12:01.27#ibcon#about to read 6, iclass 30, count 0 2006.230.00:12:01.27#ibcon#read 6, iclass 30, count 0 2006.230.00:12:01.27#ibcon#end of sib2, iclass 30, count 0 2006.230.00:12:01.27#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:12:01.27#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:12:01.27#ibcon#[27=USB\r\n] 2006.230.00:12:01.27#ibcon#*before write, iclass 30, count 0 2006.230.00:12:01.27#ibcon#enter sib2, iclass 30, count 0 2006.230.00:12:01.27#ibcon#flushed, iclass 30, count 0 2006.230.00:12:01.27#ibcon#about to write, iclass 30, count 0 2006.230.00:12:01.27#ibcon#wrote, iclass 30, count 0 2006.230.00:12:01.27#ibcon#about to read 3, iclass 30, count 0 2006.230.00:12:01.30#ibcon#read 3, iclass 30, count 0 2006.230.00:12:01.30#ibcon#about to read 4, iclass 30, count 0 2006.230.00:12:01.30#ibcon#read 4, iclass 30, count 0 2006.230.00:12:01.30#ibcon#about to read 5, iclass 30, count 0 2006.230.00:12:01.30#ibcon#read 5, iclass 30, count 0 2006.230.00:12:01.30#ibcon#about to read 6, iclass 30, count 0 2006.230.00:12:01.30#ibcon#read 6, iclass 30, count 0 2006.230.00:12:01.30#ibcon#end of sib2, iclass 30, count 0 2006.230.00:12:01.30#ibcon#*after write, iclass 30, count 0 2006.230.00:12:01.30#ibcon#*before return 0, iclass 30, count 0 2006.230.00:12:01.30#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:12:01.30#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:12:01.30#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:12:01.30#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:12:01.30$vck44/vblo=2,634.99 2006.230.00:12:01.30#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.00:12:01.30#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.00:12:01.30#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:01.30#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:12:01.30#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:12:01.30#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:12:01.30#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:12:01.30#ibcon#first serial, iclass 32, count 0 2006.230.00:12:01.30#ibcon#enter sib2, iclass 32, count 0 2006.230.00:12:01.30#ibcon#flushed, iclass 32, count 0 2006.230.00:12:01.30#ibcon#about to write, iclass 32, count 0 2006.230.00:12:01.30#ibcon#wrote, iclass 32, count 0 2006.230.00:12:01.30#ibcon#about to read 3, iclass 32, count 0 2006.230.00:12:01.32#ibcon#read 3, iclass 32, count 0 2006.230.00:12:01.32#ibcon#about to read 4, iclass 32, count 0 2006.230.00:12:01.32#ibcon#read 4, iclass 32, count 0 2006.230.00:12:01.32#ibcon#about to read 5, iclass 32, count 0 2006.230.00:12:01.32#ibcon#read 5, iclass 32, count 0 2006.230.00:12:01.32#ibcon#about to read 6, iclass 32, count 0 2006.230.00:12:01.32#ibcon#read 6, iclass 32, count 0 2006.230.00:12:01.32#ibcon#end of sib2, iclass 32, count 0 2006.230.00:12:01.32#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:12:01.32#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:12:01.32#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:12:01.32#ibcon#*before write, iclass 32, count 0 2006.230.00:12:01.32#ibcon#enter sib2, iclass 32, count 0 2006.230.00:12:01.32#ibcon#flushed, iclass 32, count 0 2006.230.00:12:01.32#ibcon#about to write, iclass 32, count 0 2006.230.00:12:01.32#ibcon#wrote, iclass 32, count 0 2006.230.00:12:01.32#ibcon#about to read 3, iclass 32, count 0 2006.230.00:12:01.36#ibcon#read 3, iclass 32, count 0 2006.230.00:12:01.36#ibcon#about to read 4, iclass 32, count 0 2006.230.00:12:01.36#ibcon#read 4, iclass 32, count 0 2006.230.00:12:01.36#ibcon#about to read 5, iclass 32, count 0 2006.230.00:12:01.36#ibcon#read 5, iclass 32, count 0 2006.230.00:12:01.36#ibcon#about to read 6, iclass 32, count 0 2006.230.00:12:01.36#ibcon#read 6, iclass 32, count 0 2006.230.00:12:01.36#ibcon#end of sib2, iclass 32, count 0 2006.230.00:12:01.36#ibcon#*after write, iclass 32, count 0 2006.230.00:12:01.36#ibcon#*before return 0, iclass 32, count 0 2006.230.00:12:01.36#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:12:01.36#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:12:01.36#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:12:01.36#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:12:01.36$vck44/vb=2,4 2006.230.00:12:01.36#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.00:12:01.36#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.00:12:01.36#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:01.36#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:12:01.42#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:12:01.42#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:12:01.42#ibcon#enter wrdev, iclass 34, count 2 2006.230.00:12:01.42#ibcon#first serial, iclass 34, count 2 2006.230.00:12:01.42#ibcon#enter sib2, iclass 34, count 2 2006.230.00:12:01.42#ibcon#flushed, iclass 34, count 2 2006.230.00:12:01.42#ibcon#about to write, iclass 34, count 2 2006.230.00:12:01.42#ibcon#wrote, iclass 34, count 2 2006.230.00:12:01.42#ibcon#about to read 3, iclass 34, count 2 2006.230.00:12:01.44#ibcon#read 3, iclass 34, count 2 2006.230.00:12:01.44#ibcon#about to read 4, iclass 34, count 2 2006.230.00:12:01.44#ibcon#read 4, iclass 34, count 2 2006.230.00:12:01.44#ibcon#about to read 5, iclass 34, count 2 2006.230.00:12:01.44#ibcon#read 5, iclass 34, count 2 2006.230.00:12:01.44#ibcon#about to read 6, iclass 34, count 2 2006.230.00:12:01.44#ibcon#read 6, iclass 34, count 2 2006.230.00:12:01.44#ibcon#end of sib2, iclass 34, count 2 2006.230.00:12:01.44#ibcon#*mode == 0, iclass 34, count 2 2006.230.00:12:01.44#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.00:12:01.44#ibcon#[27=AT02-04\r\n] 2006.230.00:12:01.44#ibcon#*before write, iclass 34, count 2 2006.230.00:12:01.44#ibcon#enter sib2, iclass 34, count 2 2006.230.00:12:01.44#ibcon#flushed, iclass 34, count 2 2006.230.00:12:01.44#ibcon#about to write, iclass 34, count 2 2006.230.00:12:01.44#ibcon#wrote, iclass 34, count 2 2006.230.00:12:01.44#ibcon#about to read 3, iclass 34, count 2 2006.230.00:12:01.47#ibcon#read 3, iclass 34, count 2 2006.230.00:12:01.47#ibcon#about to read 4, iclass 34, count 2 2006.230.00:12:01.47#ibcon#read 4, iclass 34, count 2 2006.230.00:12:01.47#ibcon#about to read 5, iclass 34, count 2 2006.230.00:12:01.47#ibcon#read 5, iclass 34, count 2 2006.230.00:12:01.47#ibcon#about to read 6, iclass 34, count 2 2006.230.00:12:01.47#ibcon#read 6, iclass 34, count 2 2006.230.00:12:01.47#ibcon#end of sib2, iclass 34, count 2 2006.230.00:12:01.47#ibcon#*after write, iclass 34, count 2 2006.230.00:12:01.47#ibcon#*before return 0, iclass 34, count 2 2006.230.00:12:01.47#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:12:01.47#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:12:01.47#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.00:12:01.47#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:01.47#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:12:01.59#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:12:01.59#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:12:01.59#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:12:01.59#ibcon#first serial, iclass 34, count 0 2006.230.00:12:01.59#ibcon#enter sib2, iclass 34, count 0 2006.230.00:12:01.59#ibcon#flushed, iclass 34, count 0 2006.230.00:12:01.59#ibcon#about to write, iclass 34, count 0 2006.230.00:12:01.59#ibcon#wrote, iclass 34, count 0 2006.230.00:12:01.59#ibcon#about to read 3, iclass 34, count 0 2006.230.00:12:01.61#ibcon#read 3, iclass 34, count 0 2006.230.00:12:01.61#ibcon#about to read 4, iclass 34, count 0 2006.230.00:12:01.61#ibcon#read 4, iclass 34, count 0 2006.230.00:12:01.61#ibcon#about to read 5, iclass 34, count 0 2006.230.00:12:01.61#ibcon#read 5, iclass 34, count 0 2006.230.00:12:01.61#ibcon#about to read 6, iclass 34, count 0 2006.230.00:12:01.61#ibcon#read 6, iclass 34, count 0 2006.230.00:12:01.61#ibcon#end of sib2, iclass 34, count 0 2006.230.00:12:01.61#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:12:01.61#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:12:01.61#ibcon#[27=USB\r\n] 2006.230.00:12:01.61#ibcon#*before write, iclass 34, count 0 2006.230.00:12:01.61#ibcon#enter sib2, iclass 34, count 0 2006.230.00:12:01.61#ibcon#flushed, iclass 34, count 0 2006.230.00:12:01.61#ibcon#about to write, iclass 34, count 0 2006.230.00:12:01.61#ibcon#wrote, iclass 34, count 0 2006.230.00:12:01.61#ibcon#about to read 3, iclass 34, count 0 2006.230.00:12:01.64#ibcon#read 3, iclass 34, count 0 2006.230.00:12:01.64#ibcon#about to read 4, iclass 34, count 0 2006.230.00:12:01.64#ibcon#read 4, iclass 34, count 0 2006.230.00:12:01.64#ibcon#about to read 5, iclass 34, count 0 2006.230.00:12:01.64#ibcon#read 5, iclass 34, count 0 2006.230.00:12:01.64#ibcon#about to read 6, iclass 34, count 0 2006.230.00:12:01.64#ibcon#read 6, iclass 34, count 0 2006.230.00:12:01.64#ibcon#end of sib2, iclass 34, count 0 2006.230.00:12:01.64#ibcon#*after write, iclass 34, count 0 2006.230.00:12:01.64#ibcon#*before return 0, iclass 34, count 0 2006.230.00:12:01.64#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:12:01.64#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:12:01.64#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:12:01.64#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:12:01.64$vck44/vblo=3,649.99 2006.230.00:12:01.64#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.00:12:01.64#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.00:12:01.64#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:01.64#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:12:01.64#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:12:01.64#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:12:01.64#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:12:01.64#ibcon#first serial, iclass 36, count 0 2006.230.00:12:01.64#ibcon#enter sib2, iclass 36, count 0 2006.230.00:12:01.64#ibcon#flushed, iclass 36, count 0 2006.230.00:12:01.64#ibcon#about to write, iclass 36, count 0 2006.230.00:12:01.64#ibcon#wrote, iclass 36, count 0 2006.230.00:12:01.64#ibcon#about to read 3, iclass 36, count 0 2006.230.00:12:01.66#ibcon#read 3, iclass 36, count 0 2006.230.00:12:01.66#ibcon#about to read 4, iclass 36, count 0 2006.230.00:12:01.66#ibcon#read 4, iclass 36, count 0 2006.230.00:12:01.66#ibcon#about to read 5, iclass 36, count 0 2006.230.00:12:01.66#ibcon#read 5, iclass 36, count 0 2006.230.00:12:01.66#ibcon#about to read 6, iclass 36, count 0 2006.230.00:12:01.66#ibcon#read 6, iclass 36, count 0 2006.230.00:12:01.66#ibcon#end of sib2, iclass 36, count 0 2006.230.00:12:01.66#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:12:01.66#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:12:01.66#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:12:01.66#ibcon#*before write, iclass 36, count 0 2006.230.00:12:01.66#ibcon#enter sib2, iclass 36, count 0 2006.230.00:12:01.66#ibcon#flushed, iclass 36, count 0 2006.230.00:12:01.66#ibcon#about to write, iclass 36, count 0 2006.230.00:12:01.66#ibcon#wrote, iclass 36, count 0 2006.230.00:12:01.66#ibcon#about to read 3, iclass 36, count 0 2006.230.00:12:01.70#ibcon#read 3, iclass 36, count 0 2006.230.00:12:01.70#ibcon#about to read 4, iclass 36, count 0 2006.230.00:12:01.70#ibcon#read 4, iclass 36, count 0 2006.230.00:12:01.70#ibcon#about to read 5, iclass 36, count 0 2006.230.00:12:01.70#ibcon#read 5, iclass 36, count 0 2006.230.00:12:01.70#ibcon#about to read 6, iclass 36, count 0 2006.230.00:12:01.70#ibcon#read 6, iclass 36, count 0 2006.230.00:12:01.70#ibcon#end of sib2, iclass 36, count 0 2006.230.00:12:01.70#ibcon#*after write, iclass 36, count 0 2006.230.00:12:01.70#ibcon#*before return 0, iclass 36, count 0 2006.230.00:12:01.70#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:12:01.70#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:12:01.70#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:12:01.70#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:12:01.70$vck44/vb=3,4 2006.230.00:12:01.70#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.00:12:01.70#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.00:12:01.70#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:01.70#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:12:01.76#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:12:01.76#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:12:01.76#ibcon#enter wrdev, iclass 38, count 2 2006.230.00:12:01.76#ibcon#first serial, iclass 38, count 2 2006.230.00:12:01.76#ibcon#enter sib2, iclass 38, count 2 2006.230.00:12:01.76#ibcon#flushed, iclass 38, count 2 2006.230.00:12:01.76#ibcon#about to write, iclass 38, count 2 2006.230.00:12:01.76#ibcon#wrote, iclass 38, count 2 2006.230.00:12:01.76#ibcon#about to read 3, iclass 38, count 2 2006.230.00:12:01.78#ibcon#read 3, iclass 38, count 2 2006.230.00:12:01.78#ibcon#about to read 4, iclass 38, count 2 2006.230.00:12:01.78#ibcon#read 4, iclass 38, count 2 2006.230.00:12:01.78#ibcon#about to read 5, iclass 38, count 2 2006.230.00:12:01.78#ibcon#read 5, iclass 38, count 2 2006.230.00:12:01.78#ibcon#about to read 6, iclass 38, count 2 2006.230.00:12:01.78#ibcon#read 6, iclass 38, count 2 2006.230.00:12:01.78#ibcon#end of sib2, iclass 38, count 2 2006.230.00:12:01.78#ibcon#*mode == 0, iclass 38, count 2 2006.230.00:12:01.78#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.00:12:01.78#ibcon#[27=AT03-04\r\n] 2006.230.00:12:01.78#ibcon#*before write, iclass 38, count 2 2006.230.00:12:01.78#ibcon#enter sib2, iclass 38, count 2 2006.230.00:12:01.78#ibcon#flushed, iclass 38, count 2 2006.230.00:12:01.78#ibcon#about to write, iclass 38, count 2 2006.230.00:12:01.78#ibcon#wrote, iclass 38, count 2 2006.230.00:12:01.78#ibcon#about to read 3, iclass 38, count 2 2006.230.00:12:01.81#ibcon#read 3, iclass 38, count 2 2006.230.00:12:01.81#ibcon#about to read 4, iclass 38, count 2 2006.230.00:12:01.81#ibcon#read 4, iclass 38, count 2 2006.230.00:12:01.81#ibcon#about to read 5, iclass 38, count 2 2006.230.00:12:01.81#ibcon#read 5, iclass 38, count 2 2006.230.00:12:01.81#ibcon#about to read 6, iclass 38, count 2 2006.230.00:12:01.81#ibcon#read 6, iclass 38, count 2 2006.230.00:12:01.81#ibcon#end of sib2, iclass 38, count 2 2006.230.00:12:01.81#ibcon#*after write, iclass 38, count 2 2006.230.00:12:01.81#ibcon#*before return 0, iclass 38, count 2 2006.230.00:12:01.81#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:12:01.81#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:12:01.81#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.00:12:01.81#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:01.81#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:12:01.93#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:12:01.93#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:12:01.93#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:12:01.93#ibcon#first serial, iclass 38, count 0 2006.230.00:12:01.93#ibcon#enter sib2, iclass 38, count 0 2006.230.00:12:01.93#ibcon#flushed, iclass 38, count 0 2006.230.00:12:01.93#ibcon#about to write, iclass 38, count 0 2006.230.00:12:01.93#ibcon#wrote, iclass 38, count 0 2006.230.00:12:01.93#ibcon#about to read 3, iclass 38, count 0 2006.230.00:12:01.95#ibcon#read 3, iclass 38, count 0 2006.230.00:12:01.95#ibcon#about to read 4, iclass 38, count 0 2006.230.00:12:01.95#ibcon#read 4, iclass 38, count 0 2006.230.00:12:01.95#ibcon#about to read 5, iclass 38, count 0 2006.230.00:12:01.95#ibcon#read 5, iclass 38, count 0 2006.230.00:12:01.95#ibcon#about to read 6, iclass 38, count 0 2006.230.00:12:01.95#ibcon#read 6, iclass 38, count 0 2006.230.00:12:01.95#ibcon#end of sib2, iclass 38, count 0 2006.230.00:12:01.95#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:12:01.95#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:12:01.95#ibcon#[27=USB\r\n] 2006.230.00:12:01.95#ibcon#*before write, iclass 38, count 0 2006.230.00:12:01.95#ibcon#enter sib2, iclass 38, count 0 2006.230.00:12:01.95#ibcon#flushed, iclass 38, count 0 2006.230.00:12:01.95#ibcon#about to write, iclass 38, count 0 2006.230.00:12:01.95#ibcon#wrote, iclass 38, count 0 2006.230.00:12:01.95#ibcon#about to read 3, iclass 38, count 0 2006.230.00:12:01.98#ibcon#read 3, iclass 38, count 0 2006.230.00:12:01.98#ibcon#about to read 4, iclass 38, count 0 2006.230.00:12:01.98#ibcon#read 4, iclass 38, count 0 2006.230.00:12:01.98#ibcon#about to read 5, iclass 38, count 0 2006.230.00:12:01.98#ibcon#read 5, iclass 38, count 0 2006.230.00:12:01.98#ibcon#about to read 6, iclass 38, count 0 2006.230.00:12:01.98#ibcon#read 6, iclass 38, count 0 2006.230.00:12:01.98#ibcon#end of sib2, iclass 38, count 0 2006.230.00:12:01.98#ibcon#*after write, iclass 38, count 0 2006.230.00:12:01.98#ibcon#*before return 0, iclass 38, count 0 2006.230.00:12:01.98#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:12:01.98#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:12:01.98#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:12:01.98#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:12:01.98$vck44/vblo=4,679.99 2006.230.00:12:01.98#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.00:12:01.98#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.00:12:01.98#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:01.98#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:12:01.98#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:12:01.98#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:12:01.98#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:12:01.98#ibcon#first serial, iclass 40, count 0 2006.230.00:12:01.98#ibcon#enter sib2, iclass 40, count 0 2006.230.00:12:01.98#ibcon#flushed, iclass 40, count 0 2006.230.00:12:01.98#ibcon#about to write, iclass 40, count 0 2006.230.00:12:01.98#ibcon#wrote, iclass 40, count 0 2006.230.00:12:01.98#ibcon#about to read 3, iclass 40, count 0 2006.230.00:12:02.00#ibcon#read 3, iclass 40, count 0 2006.230.00:12:02.00#ibcon#about to read 4, iclass 40, count 0 2006.230.00:12:02.00#ibcon#read 4, iclass 40, count 0 2006.230.00:12:02.00#ibcon#about to read 5, iclass 40, count 0 2006.230.00:12:02.00#ibcon#read 5, iclass 40, count 0 2006.230.00:12:02.00#ibcon#about to read 6, iclass 40, count 0 2006.230.00:12:02.00#ibcon#read 6, iclass 40, count 0 2006.230.00:12:02.00#ibcon#end of sib2, iclass 40, count 0 2006.230.00:12:02.00#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:12:02.00#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:12:02.00#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:12:02.00#ibcon#*before write, iclass 40, count 0 2006.230.00:12:02.00#ibcon#enter sib2, iclass 40, count 0 2006.230.00:12:02.00#ibcon#flushed, iclass 40, count 0 2006.230.00:12:02.00#ibcon#about to write, iclass 40, count 0 2006.230.00:12:02.00#ibcon#wrote, iclass 40, count 0 2006.230.00:12:02.00#ibcon#about to read 3, iclass 40, count 0 2006.230.00:12:02.04#ibcon#read 3, iclass 40, count 0 2006.230.00:12:02.04#ibcon#about to read 4, iclass 40, count 0 2006.230.00:12:02.04#ibcon#read 4, iclass 40, count 0 2006.230.00:12:02.04#ibcon#about to read 5, iclass 40, count 0 2006.230.00:12:02.04#ibcon#read 5, iclass 40, count 0 2006.230.00:12:02.04#ibcon#about to read 6, iclass 40, count 0 2006.230.00:12:02.04#ibcon#read 6, iclass 40, count 0 2006.230.00:12:02.04#ibcon#end of sib2, iclass 40, count 0 2006.230.00:12:02.04#ibcon#*after write, iclass 40, count 0 2006.230.00:12:02.04#ibcon#*before return 0, iclass 40, count 0 2006.230.00:12:02.04#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:12:02.04#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:12:02.04#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:12:02.04#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:12:02.04$vck44/vb=4,4 2006.230.00:12:02.04#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.00:12:02.04#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.00:12:02.04#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:02.04#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:12:02.10#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:12:02.10#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:12:02.10#ibcon#enter wrdev, iclass 4, count 2 2006.230.00:12:02.10#ibcon#first serial, iclass 4, count 2 2006.230.00:12:02.10#ibcon#enter sib2, iclass 4, count 2 2006.230.00:12:02.10#ibcon#flushed, iclass 4, count 2 2006.230.00:12:02.10#ibcon#about to write, iclass 4, count 2 2006.230.00:12:02.10#ibcon#wrote, iclass 4, count 2 2006.230.00:12:02.10#ibcon#about to read 3, iclass 4, count 2 2006.230.00:12:02.12#ibcon#read 3, iclass 4, count 2 2006.230.00:12:02.12#ibcon#about to read 4, iclass 4, count 2 2006.230.00:12:02.12#ibcon#read 4, iclass 4, count 2 2006.230.00:12:02.12#ibcon#about to read 5, iclass 4, count 2 2006.230.00:12:02.12#ibcon#read 5, iclass 4, count 2 2006.230.00:12:02.12#ibcon#about to read 6, iclass 4, count 2 2006.230.00:12:02.12#ibcon#read 6, iclass 4, count 2 2006.230.00:12:02.12#ibcon#end of sib2, iclass 4, count 2 2006.230.00:12:02.12#ibcon#*mode == 0, iclass 4, count 2 2006.230.00:12:02.12#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.00:12:02.12#ibcon#[27=AT04-04\r\n] 2006.230.00:12:02.12#ibcon#*before write, iclass 4, count 2 2006.230.00:12:02.12#ibcon#enter sib2, iclass 4, count 2 2006.230.00:12:02.12#ibcon#flushed, iclass 4, count 2 2006.230.00:12:02.12#ibcon#about to write, iclass 4, count 2 2006.230.00:12:02.12#ibcon#wrote, iclass 4, count 2 2006.230.00:12:02.12#ibcon#about to read 3, iclass 4, count 2 2006.230.00:12:02.15#ibcon#read 3, iclass 4, count 2 2006.230.00:12:02.15#ibcon#about to read 4, iclass 4, count 2 2006.230.00:12:02.15#ibcon#read 4, iclass 4, count 2 2006.230.00:12:02.15#ibcon#about to read 5, iclass 4, count 2 2006.230.00:12:02.15#ibcon#read 5, iclass 4, count 2 2006.230.00:12:02.15#ibcon#about to read 6, iclass 4, count 2 2006.230.00:12:02.15#ibcon#read 6, iclass 4, count 2 2006.230.00:12:02.15#ibcon#end of sib2, iclass 4, count 2 2006.230.00:12:02.15#ibcon#*after write, iclass 4, count 2 2006.230.00:12:02.15#ibcon#*before return 0, iclass 4, count 2 2006.230.00:12:02.15#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:12:02.15#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:12:02.15#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.00:12:02.15#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:02.15#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:12:02.27#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:12:02.27#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:12:02.27#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:12:02.27#ibcon#first serial, iclass 4, count 0 2006.230.00:12:02.27#ibcon#enter sib2, iclass 4, count 0 2006.230.00:12:02.27#ibcon#flushed, iclass 4, count 0 2006.230.00:12:02.27#ibcon#about to write, iclass 4, count 0 2006.230.00:12:02.27#ibcon#wrote, iclass 4, count 0 2006.230.00:12:02.27#ibcon#about to read 3, iclass 4, count 0 2006.230.00:12:02.29#ibcon#read 3, iclass 4, count 0 2006.230.00:12:02.29#ibcon#about to read 4, iclass 4, count 0 2006.230.00:12:02.29#ibcon#read 4, iclass 4, count 0 2006.230.00:12:02.29#ibcon#about to read 5, iclass 4, count 0 2006.230.00:12:02.29#ibcon#read 5, iclass 4, count 0 2006.230.00:12:02.29#ibcon#about to read 6, iclass 4, count 0 2006.230.00:12:02.29#ibcon#read 6, iclass 4, count 0 2006.230.00:12:02.29#ibcon#end of sib2, iclass 4, count 0 2006.230.00:12:02.29#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:12:02.29#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:12:02.29#ibcon#[27=USB\r\n] 2006.230.00:12:02.29#ibcon#*before write, iclass 4, count 0 2006.230.00:12:02.29#ibcon#enter sib2, iclass 4, count 0 2006.230.00:12:02.29#ibcon#flushed, iclass 4, count 0 2006.230.00:12:02.29#ibcon#about to write, iclass 4, count 0 2006.230.00:12:02.29#ibcon#wrote, iclass 4, count 0 2006.230.00:12:02.29#ibcon#about to read 3, iclass 4, count 0 2006.230.00:12:02.32#ibcon#read 3, iclass 4, count 0 2006.230.00:12:02.32#ibcon#about to read 4, iclass 4, count 0 2006.230.00:12:02.32#ibcon#read 4, iclass 4, count 0 2006.230.00:12:02.32#ibcon#about to read 5, iclass 4, count 0 2006.230.00:12:02.32#ibcon#read 5, iclass 4, count 0 2006.230.00:12:02.32#ibcon#about to read 6, iclass 4, count 0 2006.230.00:12:02.32#ibcon#read 6, iclass 4, count 0 2006.230.00:12:02.32#ibcon#end of sib2, iclass 4, count 0 2006.230.00:12:02.32#ibcon#*after write, iclass 4, count 0 2006.230.00:12:02.32#ibcon#*before return 0, iclass 4, count 0 2006.230.00:12:02.32#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:12:02.32#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:12:02.32#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:12:02.32#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:12:02.32$vck44/vblo=5,709.99 2006.230.00:12:02.32#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.00:12:02.32#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.00:12:02.32#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:02.32#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:12:02.32#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:12:02.32#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:12:02.32#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:12:02.32#ibcon#first serial, iclass 6, count 0 2006.230.00:12:02.32#ibcon#enter sib2, iclass 6, count 0 2006.230.00:12:02.32#ibcon#flushed, iclass 6, count 0 2006.230.00:12:02.32#ibcon#about to write, iclass 6, count 0 2006.230.00:12:02.32#ibcon#wrote, iclass 6, count 0 2006.230.00:12:02.32#ibcon#about to read 3, iclass 6, count 0 2006.230.00:12:02.34#ibcon#read 3, iclass 6, count 0 2006.230.00:12:02.34#ibcon#about to read 4, iclass 6, count 0 2006.230.00:12:02.34#ibcon#read 4, iclass 6, count 0 2006.230.00:12:02.34#ibcon#about to read 5, iclass 6, count 0 2006.230.00:12:02.34#ibcon#read 5, iclass 6, count 0 2006.230.00:12:02.34#ibcon#about to read 6, iclass 6, count 0 2006.230.00:12:02.34#ibcon#read 6, iclass 6, count 0 2006.230.00:12:02.34#ibcon#end of sib2, iclass 6, count 0 2006.230.00:12:02.34#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:12:02.34#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:12:02.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:12:02.34#ibcon#*before write, iclass 6, count 0 2006.230.00:12:02.34#ibcon#enter sib2, iclass 6, count 0 2006.230.00:12:02.34#ibcon#flushed, iclass 6, count 0 2006.230.00:12:02.34#ibcon#about to write, iclass 6, count 0 2006.230.00:12:02.34#ibcon#wrote, iclass 6, count 0 2006.230.00:12:02.34#ibcon#about to read 3, iclass 6, count 0 2006.230.00:12:02.38#ibcon#read 3, iclass 6, count 0 2006.230.00:12:02.38#ibcon#about to read 4, iclass 6, count 0 2006.230.00:12:02.38#ibcon#read 4, iclass 6, count 0 2006.230.00:12:02.38#ibcon#about to read 5, iclass 6, count 0 2006.230.00:12:02.38#ibcon#read 5, iclass 6, count 0 2006.230.00:12:02.38#ibcon#about to read 6, iclass 6, count 0 2006.230.00:12:02.38#ibcon#read 6, iclass 6, count 0 2006.230.00:12:02.38#ibcon#end of sib2, iclass 6, count 0 2006.230.00:12:02.38#ibcon#*after write, iclass 6, count 0 2006.230.00:12:02.38#ibcon#*before return 0, iclass 6, count 0 2006.230.00:12:02.38#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:12:02.38#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:12:02.38#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:12:02.38#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:12:02.38$vck44/vb=5,4 2006.230.00:12:02.38#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.00:12:02.38#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.00:12:02.38#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:02.38#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:12:02.44#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:12:02.44#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:12:02.44#ibcon#enter wrdev, iclass 10, count 2 2006.230.00:12:02.44#ibcon#first serial, iclass 10, count 2 2006.230.00:12:02.44#ibcon#enter sib2, iclass 10, count 2 2006.230.00:12:02.44#ibcon#flushed, iclass 10, count 2 2006.230.00:12:02.44#ibcon#about to write, iclass 10, count 2 2006.230.00:12:02.44#ibcon#wrote, iclass 10, count 2 2006.230.00:12:02.44#ibcon#about to read 3, iclass 10, count 2 2006.230.00:12:02.46#ibcon#read 3, iclass 10, count 2 2006.230.00:12:02.46#ibcon#about to read 4, iclass 10, count 2 2006.230.00:12:02.46#ibcon#read 4, iclass 10, count 2 2006.230.00:12:02.46#ibcon#about to read 5, iclass 10, count 2 2006.230.00:12:02.46#ibcon#read 5, iclass 10, count 2 2006.230.00:12:02.46#ibcon#about to read 6, iclass 10, count 2 2006.230.00:12:02.46#ibcon#read 6, iclass 10, count 2 2006.230.00:12:02.46#ibcon#end of sib2, iclass 10, count 2 2006.230.00:12:02.46#ibcon#*mode == 0, iclass 10, count 2 2006.230.00:12:02.46#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.00:12:02.46#ibcon#[27=AT05-04\r\n] 2006.230.00:12:02.46#ibcon#*before write, iclass 10, count 2 2006.230.00:12:02.46#ibcon#enter sib2, iclass 10, count 2 2006.230.00:12:02.46#ibcon#flushed, iclass 10, count 2 2006.230.00:12:02.46#ibcon#about to write, iclass 10, count 2 2006.230.00:12:02.46#ibcon#wrote, iclass 10, count 2 2006.230.00:12:02.46#ibcon#about to read 3, iclass 10, count 2 2006.230.00:12:02.49#ibcon#read 3, iclass 10, count 2 2006.230.00:12:02.49#ibcon#about to read 4, iclass 10, count 2 2006.230.00:12:02.49#ibcon#read 4, iclass 10, count 2 2006.230.00:12:02.49#ibcon#about to read 5, iclass 10, count 2 2006.230.00:12:02.49#ibcon#read 5, iclass 10, count 2 2006.230.00:12:02.49#ibcon#about to read 6, iclass 10, count 2 2006.230.00:12:02.49#ibcon#read 6, iclass 10, count 2 2006.230.00:12:02.49#ibcon#end of sib2, iclass 10, count 2 2006.230.00:12:02.49#ibcon#*after write, iclass 10, count 2 2006.230.00:12:02.49#ibcon#*before return 0, iclass 10, count 2 2006.230.00:12:02.49#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:12:02.49#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:12:02.49#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.00:12:02.49#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:02.49#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:02.61#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:02.61#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:02.61#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:12:02.61#ibcon#first serial, iclass 10, count 0 2006.230.00:12:02.61#ibcon#enter sib2, iclass 10, count 0 2006.230.00:12:02.61#ibcon#flushed, iclass 10, count 0 2006.230.00:12:02.61#ibcon#about to write, iclass 10, count 0 2006.230.00:12:02.61#ibcon#wrote, iclass 10, count 0 2006.230.00:12:02.61#ibcon#about to read 3, iclass 10, count 0 2006.230.00:12:02.63#ibcon#read 3, iclass 10, count 0 2006.230.00:12:02.63#ibcon#about to read 4, iclass 10, count 0 2006.230.00:12:02.63#ibcon#read 4, iclass 10, count 0 2006.230.00:12:02.63#ibcon#about to read 5, iclass 10, count 0 2006.230.00:12:02.63#ibcon#read 5, iclass 10, count 0 2006.230.00:12:02.63#ibcon#about to read 6, iclass 10, count 0 2006.230.00:12:02.63#ibcon#read 6, iclass 10, count 0 2006.230.00:12:02.63#ibcon#end of sib2, iclass 10, count 0 2006.230.00:12:02.63#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:12:02.63#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:12:02.63#ibcon#[27=USB\r\n] 2006.230.00:12:02.63#ibcon#*before write, iclass 10, count 0 2006.230.00:12:02.63#ibcon#enter sib2, iclass 10, count 0 2006.230.00:12:02.63#ibcon#flushed, iclass 10, count 0 2006.230.00:12:02.63#ibcon#about to write, iclass 10, count 0 2006.230.00:12:02.63#ibcon#wrote, iclass 10, count 0 2006.230.00:12:02.63#ibcon#about to read 3, iclass 10, count 0 2006.230.00:12:02.66#ibcon#read 3, iclass 10, count 0 2006.230.00:12:02.66#ibcon#about to read 4, iclass 10, count 0 2006.230.00:12:02.66#ibcon#read 4, iclass 10, count 0 2006.230.00:12:02.66#ibcon#about to read 5, iclass 10, count 0 2006.230.00:12:02.66#ibcon#read 5, iclass 10, count 0 2006.230.00:12:02.66#ibcon#about to read 6, iclass 10, count 0 2006.230.00:12:02.66#ibcon#read 6, iclass 10, count 0 2006.230.00:12:02.66#ibcon#end of sib2, iclass 10, count 0 2006.230.00:12:02.66#ibcon#*after write, iclass 10, count 0 2006.230.00:12:02.66#ibcon#*before return 0, iclass 10, count 0 2006.230.00:12:02.66#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:02.66#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:12:02.66#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:12:02.66#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:12:02.66$vck44/vblo=6,719.99 2006.230.00:12:02.66#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.00:12:02.66#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.00:12:02.66#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:02.66#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:02.66#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:02.66#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:02.66#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:12:02.66#ibcon#first serial, iclass 12, count 0 2006.230.00:12:02.66#ibcon#enter sib2, iclass 12, count 0 2006.230.00:12:02.66#ibcon#flushed, iclass 12, count 0 2006.230.00:12:02.66#ibcon#about to write, iclass 12, count 0 2006.230.00:12:02.66#ibcon#wrote, iclass 12, count 0 2006.230.00:12:02.66#ibcon#about to read 3, iclass 12, count 0 2006.230.00:12:02.68#ibcon#read 3, iclass 12, count 0 2006.230.00:12:02.68#ibcon#about to read 4, iclass 12, count 0 2006.230.00:12:02.68#ibcon#read 4, iclass 12, count 0 2006.230.00:12:02.68#ibcon#about to read 5, iclass 12, count 0 2006.230.00:12:02.68#ibcon#read 5, iclass 12, count 0 2006.230.00:12:02.68#ibcon#about to read 6, iclass 12, count 0 2006.230.00:12:02.68#ibcon#read 6, iclass 12, count 0 2006.230.00:12:02.68#ibcon#end of sib2, iclass 12, count 0 2006.230.00:12:02.68#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:12:02.68#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:12:02.68#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:12:02.68#ibcon#*before write, iclass 12, count 0 2006.230.00:12:02.68#ibcon#enter sib2, iclass 12, count 0 2006.230.00:12:02.68#ibcon#flushed, iclass 12, count 0 2006.230.00:12:02.68#ibcon#about to write, iclass 12, count 0 2006.230.00:12:02.68#ibcon#wrote, iclass 12, count 0 2006.230.00:12:02.68#ibcon#about to read 3, iclass 12, count 0 2006.230.00:12:02.72#ibcon#read 3, iclass 12, count 0 2006.230.00:12:02.72#ibcon#about to read 4, iclass 12, count 0 2006.230.00:12:02.72#ibcon#read 4, iclass 12, count 0 2006.230.00:12:02.72#ibcon#about to read 5, iclass 12, count 0 2006.230.00:12:02.72#ibcon#read 5, iclass 12, count 0 2006.230.00:12:02.72#ibcon#about to read 6, iclass 12, count 0 2006.230.00:12:02.72#ibcon#read 6, iclass 12, count 0 2006.230.00:12:02.72#ibcon#end of sib2, iclass 12, count 0 2006.230.00:12:02.72#ibcon#*after write, iclass 12, count 0 2006.230.00:12:02.72#ibcon#*before return 0, iclass 12, count 0 2006.230.00:12:02.72#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:02.72#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:12:02.72#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:12:02.72#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:12:02.72$vck44/vb=6,4 2006.230.00:12:02.72#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.00:12:02.72#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.00:12:02.72#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:02.72#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:02.78#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:02.78#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:02.78#ibcon#enter wrdev, iclass 14, count 2 2006.230.00:12:02.78#ibcon#first serial, iclass 14, count 2 2006.230.00:12:02.78#ibcon#enter sib2, iclass 14, count 2 2006.230.00:12:02.78#ibcon#flushed, iclass 14, count 2 2006.230.00:12:02.78#ibcon#about to write, iclass 14, count 2 2006.230.00:12:02.78#ibcon#wrote, iclass 14, count 2 2006.230.00:12:02.78#ibcon#about to read 3, iclass 14, count 2 2006.230.00:12:02.80#ibcon#read 3, iclass 14, count 2 2006.230.00:12:02.80#ibcon#about to read 4, iclass 14, count 2 2006.230.00:12:02.80#ibcon#read 4, iclass 14, count 2 2006.230.00:12:02.80#ibcon#about to read 5, iclass 14, count 2 2006.230.00:12:02.80#ibcon#read 5, iclass 14, count 2 2006.230.00:12:02.80#ibcon#about to read 6, iclass 14, count 2 2006.230.00:12:02.80#ibcon#read 6, iclass 14, count 2 2006.230.00:12:02.80#ibcon#end of sib2, iclass 14, count 2 2006.230.00:12:02.80#ibcon#*mode == 0, iclass 14, count 2 2006.230.00:12:02.80#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.00:12:02.80#ibcon#[27=AT06-04\r\n] 2006.230.00:12:02.80#ibcon#*before write, iclass 14, count 2 2006.230.00:12:02.80#ibcon#enter sib2, iclass 14, count 2 2006.230.00:12:02.80#ibcon#flushed, iclass 14, count 2 2006.230.00:12:02.80#ibcon#about to write, iclass 14, count 2 2006.230.00:12:02.80#ibcon#wrote, iclass 14, count 2 2006.230.00:12:02.80#ibcon#about to read 3, iclass 14, count 2 2006.230.00:12:02.83#ibcon#read 3, iclass 14, count 2 2006.230.00:12:02.83#ibcon#about to read 4, iclass 14, count 2 2006.230.00:12:02.83#ibcon#read 4, iclass 14, count 2 2006.230.00:12:02.83#ibcon#about to read 5, iclass 14, count 2 2006.230.00:12:02.83#ibcon#read 5, iclass 14, count 2 2006.230.00:12:02.83#ibcon#about to read 6, iclass 14, count 2 2006.230.00:12:02.83#ibcon#read 6, iclass 14, count 2 2006.230.00:12:02.83#ibcon#end of sib2, iclass 14, count 2 2006.230.00:12:02.83#ibcon#*after write, iclass 14, count 2 2006.230.00:12:02.83#ibcon#*before return 0, iclass 14, count 2 2006.230.00:12:02.83#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:02.83#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:12:02.83#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.00:12:02.83#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:02.83#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:02.95#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:02.95#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:02.95#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:12:02.95#ibcon#first serial, iclass 14, count 0 2006.230.00:12:02.95#ibcon#enter sib2, iclass 14, count 0 2006.230.00:12:02.95#ibcon#flushed, iclass 14, count 0 2006.230.00:12:02.95#ibcon#about to write, iclass 14, count 0 2006.230.00:12:02.95#ibcon#wrote, iclass 14, count 0 2006.230.00:12:02.95#ibcon#about to read 3, iclass 14, count 0 2006.230.00:12:02.97#ibcon#read 3, iclass 14, count 0 2006.230.00:12:02.97#ibcon#about to read 4, iclass 14, count 0 2006.230.00:12:02.97#ibcon#read 4, iclass 14, count 0 2006.230.00:12:02.97#ibcon#about to read 5, iclass 14, count 0 2006.230.00:12:02.97#ibcon#read 5, iclass 14, count 0 2006.230.00:12:02.97#ibcon#about to read 6, iclass 14, count 0 2006.230.00:12:02.97#ibcon#read 6, iclass 14, count 0 2006.230.00:12:02.97#ibcon#end of sib2, iclass 14, count 0 2006.230.00:12:02.97#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:12:02.97#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:12:02.97#ibcon#[27=USB\r\n] 2006.230.00:12:02.97#ibcon#*before write, iclass 14, count 0 2006.230.00:12:02.97#ibcon#enter sib2, iclass 14, count 0 2006.230.00:12:02.97#ibcon#flushed, iclass 14, count 0 2006.230.00:12:02.97#ibcon#about to write, iclass 14, count 0 2006.230.00:12:02.97#ibcon#wrote, iclass 14, count 0 2006.230.00:12:02.97#ibcon#about to read 3, iclass 14, count 0 2006.230.00:12:03.00#ibcon#read 3, iclass 14, count 0 2006.230.00:12:03.00#ibcon#about to read 4, iclass 14, count 0 2006.230.00:12:03.00#ibcon#read 4, iclass 14, count 0 2006.230.00:12:03.00#ibcon#about to read 5, iclass 14, count 0 2006.230.00:12:03.00#ibcon#read 5, iclass 14, count 0 2006.230.00:12:03.00#ibcon#about to read 6, iclass 14, count 0 2006.230.00:12:03.00#ibcon#read 6, iclass 14, count 0 2006.230.00:12:03.00#ibcon#end of sib2, iclass 14, count 0 2006.230.00:12:03.00#ibcon#*after write, iclass 14, count 0 2006.230.00:12:03.00#ibcon#*before return 0, iclass 14, count 0 2006.230.00:12:03.00#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:03.00#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:12:03.00#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:12:03.00#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:12:03.00$vck44/vblo=7,734.99 2006.230.00:12:03.00#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.00:12:03.00#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.00:12:03.00#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:03.00#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:12:03.00#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:12:03.00#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:12:03.00#ibcon#enter wrdev, iclass 16, count 0 2006.230.00:12:03.00#ibcon#first serial, iclass 16, count 0 2006.230.00:12:03.00#ibcon#enter sib2, iclass 16, count 0 2006.230.00:12:03.00#ibcon#flushed, iclass 16, count 0 2006.230.00:12:03.00#ibcon#about to write, iclass 16, count 0 2006.230.00:12:03.00#ibcon#wrote, iclass 16, count 0 2006.230.00:12:03.00#ibcon#about to read 3, iclass 16, count 0 2006.230.00:12:03.02#ibcon#read 3, iclass 16, count 0 2006.230.00:12:03.02#ibcon#about to read 4, iclass 16, count 0 2006.230.00:12:03.02#ibcon#read 4, iclass 16, count 0 2006.230.00:12:03.02#ibcon#about to read 5, iclass 16, count 0 2006.230.00:12:03.02#ibcon#read 5, iclass 16, count 0 2006.230.00:12:03.02#ibcon#about to read 6, iclass 16, count 0 2006.230.00:12:03.02#ibcon#read 6, iclass 16, count 0 2006.230.00:12:03.02#ibcon#end of sib2, iclass 16, count 0 2006.230.00:12:03.02#ibcon#*mode == 0, iclass 16, count 0 2006.230.00:12:03.02#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.00:12:03.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:12:03.02#ibcon#*before write, iclass 16, count 0 2006.230.00:12:03.02#ibcon#enter sib2, iclass 16, count 0 2006.230.00:12:03.02#ibcon#flushed, iclass 16, count 0 2006.230.00:12:03.02#ibcon#about to write, iclass 16, count 0 2006.230.00:12:03.02#ibcon#wrote, iclass 16, count 0 2006.230.00:12:03.02#ibcon#about to read 3, iclass 16, count 0 2006.230.00:12:03.06#ibcon#read 3, iclass 16, count 0 2006.230.00:12:03.06#ibcon#about to read 4, iclass 16, count 0 2006.230.00:12:03.06#ibcon#read 4, iclass 16, count 0 2006.230.00:12:03.06#ibcon#about to read 5, iclass 16, count 0 2006.230.00:12:03.06#ibcon#read 5, iclass 16, count 0 2006.230.00:12:03.06#ibcon#about to read 6, iclass 16, count 0 2006.230.00:12:03.06#ibcon#read 6, iclass 16, count 0 2006.230.00:12:03.06#ibcon#end of sib2, iclass 16, count 0 2006.230.00:12:03.06#ibcon#*after write, iclass 16, count 0 2006.230.00:12:03.06#ibcon#*before return 0, iclass 16, count 0 2006.230.00:12:03.06#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:12:03.06#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:12:03.06#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.00:12:03.06#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.00:12:03.06$vck44/vb=7,4 2006.230.00:12:03.06#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.230.00:12:03.06#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.230.00:12:03.06#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:03.06#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:12:03.12#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:12:03.12#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:12:03.12#ibcon#enter wrdev, iclass 18, count 2 2006.230.00:12:03.12#ibcon#first serial, iclass 18, count 2 2006.230.00:12:03.12#ibcon#enter sib2, iclass 18, count 2 2006.230.00:12:03.12#ibcon#flushed, iclass 18, count 2 2006.230.00:12:03.12#ibcon#about to write, iclass 18, count 2 2006.230.00:12:03.12#ibcon#wrote, iclass 18, count 2 2006.230.00:12:03.12#ibcon#about to read 3, iclass 18, count 2 2006.230.00:12:03.14#ibcon#read 3, iclass 18, count 2 2006.230.00:12:03.14#ibcon#about to read 4, iclass 18, count 2 2006.230.00:12:03.14#ibcon#read 4, iclass 18, count 2 2006.230.00:12:03.14#ibcon#about to read 5, iclass 18, count 2 2006.230.00:12:03.14#ibcon#read 5, iclass 18, count 2 2006.230.00:12:03.14#ibcon#about to read 6, iclass 18, count 2 2006.230.00:12:03.14#ibcon#read 6, iclass 18, count 2 2006.230.00:12:03.14#ibcon#end of sib2, iclass 18, count 2 2006.230.00:12:03.14#ibcon#*mode == 0, iclass 18, count 2 2006.230.00:12:03.14#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.230.00:12:03.14#ibcon#[27=AT07-04\r\n] 2006.230.00:12:03.14#ibcon#*before write, iclass 18, count 2 2006.230.00:12:03.14#ibcon#enter sib2, iclass 18, count 2 2006.230.00:12:03.14#ibcon#flushed, iclass 18, count 2 2006.230.00:12:03.14#ibcon#about to write, iclass 18, count 2 2006.230.00:12:03.14#ibcon#wrote, iclass 18, count 2 2006.230.00:12:03.14#ibcon#about to read 3, iclass 18, count 2 2006.230.00:12:03.17#ibcon#read 3, iclass 18, count 2 2006.230.00:12:03.17#ibcon#about to read 4, iclass 18, count 2 2006.230.00:12:03.17#ibcon#read 4, iclass 18, count 2 2006.230.00:12:03.17#ibcon#about to read 5, iclass 18, count 2 2006.230.00:12:03.17#ibcon#read 5, iclass 18, count 2 2006.230.00:12:03.17#ibcon#about to read 6, iclass 18, count 2 2006.230.00:12:03.17#ibcon#read 6, iclass 18, count 2 2006.230.00:12:03.17#ibcon#end of sib2, iclass 18, count 2 2006.230.00:12:03.17#ibcon#*after write, iclass 18, count 2 2006.230.00:12:03.17#ibcon#*before return 0, iclass 18, count 2 2006.230.00:12:03.17#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:12:03.17#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:12:03.17#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.230.00:12:03.17#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:03.17#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:12:03.29#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:12:03.29#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:12:03.29#ibcon#enter wrdev, iclass 18, count 0 2006.230.00:12:03.29#ibcon#first serial, iclass 18, count 0 2006.230.00:12:03.29#ibcon#enter sib2, iclass 18, count 0 2006.230.00:12:03.29#ibcon#flushed, iclass 18, count 0 2006.230.00:12:03.29#ibcon#about to write, iclass 18, count 0 2006.230.00:12:03.29#ibcon#wrote, iclass 18, count 0 2006.230.00:12:03.29#ibcon#about to read 3, iclass 18, count 0 2006.230.00:12:03.31#ibcon#read 3, iclass 18, count 0 2006.230.00:12:03.31#ibcon#about to read 4, iclass 18, count 0 2006.230.00:12:03.31#ibcon#read 4, iclass 18, count 0 2006.230.00:12:03.31#ibcon#about to read 5, iclass 18, count 0 2006.230.00:12:03.31#ibcon#read 5, iclass 18, count 0 2006.230.00:12:03.31#ibcon#about to read 6, iclass 18, count 0 2006.230.00:12:03.31#ibcon#read 6, iclass 18, count 0 2006.230.00:12:03.31#ibcon#end of sib2, iclass 18, count 0 2006.230.00:12:03.31#ibcon#*mode == 0, iclass 18, count 0 2006.230.00:12:03.31#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.00:12:03.31#ibcon#[27=USB\r\n] 2006.230.00:12:03.31#ibcon#*before write, iclass 18, count 0 2006.230.00:12:03.31#ibcon#enter sib2, iclass 18, count 0 2006.230.00:12:03.31#ibcon#flushed, iclass 18, count 0 2006.230.00:12:03.31#ibcon#about to write, iclass 18, count 0 2006.230.00:12:03.31#ibcon#wrote, iclass 18, count 0 2006.230.00:12:03.31#ibcon#about to read 3, iclass 18, count 0 2006.230.00:12:03.34#ibcon#read 3, iclass 18, count 0 2006.230.00:12:03.34#ibcon#about to read 4, iclass 18, count 0 2006.230.00:12:03.34#ibcon#read 4, iclass 18, count 0 2006.230.00:12:03.34#ibcon#about to read 5, iclass 18, count 0 2006.230.00:12:03.34#ibcon#read 5, iclass 18, count 0 2006.230.00:12:03.34#ibcon#about to read 6, iclass 18, count 0 2006.230.00:12:03.34#ibcon#read 6, iclass 18, count 0 2006.230.00:12:03.34#ibcon#end of sib2, iclass 18, count 0 2006.230.00:12:03.34#ibcon#*after write, iclass 18, count 0 2006.230.00:12:03.34#ibcon#*before return 0, iclass 18, count 0 2006.230.00:12:03.34#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:12:03.34#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:12:03.34#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.00:12:03.34#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.00:12:03.34$vck44/vblo=8,744.99 2006.230.00:12:03.34#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.00:12:03.34#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.00:12:03.34#ibcon#ireg 17 cls_cnt 0 2006.230.00:12:03.34#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:03.34#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:03.34#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:03.34#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:12:03.34#ibcon#first serial, iclass 20, count 0 2006.230.00:12:03.34#ibcon#enter sib2, iclass 20, count 0 2006.230.00:12:03.34#ibcon#flushed, iclass 20, count 0 2006.230.00:12:03.34#ibcon#about to write, iclass 20, count 0 2006.230.00:12:03.34#ibcon#wrote, iclass 20, count 0 2006.230.00:12:03.34#ibcon#about to read 3, iclass 20, count 0 2006.230.00:12:03.36#ibcon#read 3, iclass 20, count 0 2006.230.00:12:03.36#ibcon#about to read 4, iclass 20, count 0 2006.230.00:12:03.36#ibcon#read 4, iclass 20, count 0 2006.230.00:12:03.36#ibcon#about to read 5, iclass 20, count 0 2006.230.00:12:03.36#ibcon#read 5, iclass 20, count 0 2006.230.00:12:03.36#ibcon#about to read 6, iclass 20, count 0 2006.230.00:12:03.36#ibcon#read 6, iclass 20, count 0 2006.230.00:12:03.36#ibcon#end of sib2, iclass 20, count 0 2006.230.00:12:03.36#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:12:03.36#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:12:03.36#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:12:03.36#ibcon#*before write, iclass 20, count 0 2006.230.00:12:03.36#ibcon#enter sib2, iclass 20, count 0 2006.230.00:12:03.36#ibcon#flushed, iclass 20, count 0 2006.230.00:12:03.36#ibcon#about to write, iclass 20, count 0 2006.230.00:12:03.36#ibcon#wrote, iclass 20, count 0 2006.230.00:12:03.36#ibcon#about to read 3, iclass 20, count 0 2006.230.00:12:03.40#ibcon#read 3, iclass 20, count 0 2006.230.00:12:03.40#ibcon#about to read 4, iclass 20, count 0 2006.230.00:12:03.40#ibcon#read 4, iclass 20, count 0 2006.230.00:12:03.40#ibcon#about to read 5, iclass 20, count 0 2006.230.00:12:03.40#ibcon#read 5, iclass 20, count 0 2006.230.00:12:03.40#ibcon#about to read 6, iclass 20, count 0 2006.230.00:12:03.40#ibcon#read 6, iclass 20, count 0 2006.230.00:12:03.40#ibcon#end of sib2, iclass 20, count 0 2006.230.00:12:03.40#ibcon#*after write, iclass 20, count 0 2006.230.00:12:03.40#ibcon#*before return 0, iclass 20, count 0 2006.230.00:12:03.40#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:03.40#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:12:03.40#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:12:03.40#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:12:03.40$vck44/vb=8,4 2006.230.00:12:03.40#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.00:12:03.40#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.00:12:03.40#ibcon#ireg 11 cls_cnt 2 2006.230.00:12:03.40#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:03.46#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:03.46#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:03.46#ibcon#enter wrdev, iclass 22, count 2 2006.230.00:12:03.46#ibcon#first serial, iclass 22, count 2 2006.230.00:12:03.46#ibcon#enter sib2, iclass 22, count 2 2006.230.00:12:03.46#ibcon#flushed, iclass 22, count 2 2006.230.00:12:03.46#ibcon#about to write, iclass 22, count 2 2006.230.00:12:03.46#ibcon#wrote, iclass 22, count 2 2006.230.00:12:03.46#ibcon#about to read 3, iclass 22, count 2 2006.230.00:12:03.48#ibcon#read 3, iclass 22, count 2 2006.230.00:12:03.48#ibcon#about to read 4, iclass 22, count 2 2006.230.00:12:03.48#ibcon#read 4, iclass 22, count 2 2006.230.00:12:03.48#ibcon#about to read 5, iclass 22, count 2 2006.230.00:12:03.48#ibcon#read 5, iclass 22, count 2 2006.230.00:12:03.48#ibcon#about to read 6, iclass 22, count 2 2006.230.00:12:03.48#ibcon#read 6, iclass 22, count 2 2006.230.00:12:03.48#ibcon#end of sib2, iclass 22, count 2 2006.230.00:12:03.48#ibcon#*mode == 0, iclass 22, count 2 2006.230.00:12:03.48#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.00:12:03.48#ibcon#[27=AT08-04\r\n] 2006.230.00:12:03.48#ibcon#*before write, iclass 22, count 2 2006.230.00:12:03.48#ibcon#enter sib2, iclass 22, count 2 2006.230.00:12:03.48#ibcon#flushed, iclass 22, count 2 2006.230.00:12:03.48#ibcon#about to write, iclass 22, count 2 2006.230.00:12:03.48#ibcon#wrote, iclass 22, count 2 2006.230.00:12:03.48#ibcon#about to read 3, iclass 22, count 2 2006.230.00:12:03.51#ibcon#read 3, iclass 22, count 2 2006.230.00:12:03.51#ibcon#about to read 4, iclass 22, count 2 2006.230.00:12:03.51#ibcon#read 4, iclass 22, count 2 2006.230.00:12:03.51#ibcon#about to read 5, iclass 22, count 2 2006.230.00:12:03.51#ibcon#read 5, iclass 22, count 2 2006.230.00:12:03.51#ibcon#about to read 6, iclass 22, count 2 2006.230.00:12:03.51#ibcon#read 6, iclass 22, count 2 2006.230.00:12:03.51#ibcon#end of sib2, iclass 22, count 2 2006.230.00:12:03.51#ibcon#*after write, iclass 22, count 2 2006.230.00:12:03.51#ibcon#*before return 0, iclass 22, count 2 2006.230.00:12:03.51#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:03.51#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:12:03.51#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.00:12:03.51#ibcon#ireg 7 cls_cnt 0 2006.230.00:12:03.51#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:03.63#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:03.63#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:03.63#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:12:03.63#ibcon#first serial, iclass 22, count 0 2006.230.00:12:03.63#ibcon#enter sib2, iclass 22, count 0 2006.230.00:12:03.63#ibcon#flushed, iclass 22, count 0 2006.230.00:12:03.63#ibcon#about to write, iclass 22, count 0 2006.230.00:12:03.63#ibcon#wrote, iclass 22, count 0 2006.230.00:12:03.63#ibcon#about to read 3, iclass 22, count 0 2006.230.00:12:03.65#ibcon#read 3, iclass 22, count 0 2006.230.00:12:03.65#ibcon#about to read 4, iclass 22, count 0 2006.230.00:12:03.65#ibcon#read 4, iclass 22, count 0 2006.230.00:12:03.65#ibcon#about to read 5, iclass 22, count 0 2006.230.00:12:03.65#ibcon#read 5, iclass 22, count 0 2006.230.00:12:03.65#ibcon#about to read 6, iclass 22, count 0 2006.230.00:12:03.65#ibcon#read 6, iclass 22, count 0 2006.230.00:12:03.65#ibcon#end of sib2, iclass 22, count 0 2006.230.00:12:03.65#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:12:03.65#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:12:03.65#ibcon#[27=USB\r\n] 2006.230.00:12:03.65#ibcon#*before write, iclass 22, count 0 2006.230.00:12:03.65#ibcon#enter sib2, iclass 22, count 0 2006.230.00:12:03.65#ibcon#flushed, iclass 22, count 0 2006.230.00:12:03.65#ibcon#about to write, iclass 22, count 0 2006.230.00:12:03.65#ibcon#wrote, iclass 22, count 0 2006.230.00:12:03.65#ibcon#about to read 3, iclass 22, count 0 2006.230.00:12:03.68#ibcon#read 3, iclass 22, count 0 2006.230.00:12:03.68#ibcon#about to read 4, iclass 22, count 0 2006.230.00:12:03.68#ibcon#read 4, iclass 22, count 0 2006.230.00:12:03.68#ibcon#about to read 5, iclass 22, count 0 2006.230.00:12:03.68#ibcon#read 5, iclass 22, count 0 2006.230.00:12:03.68#ibcon#about to read 6, iclass 22, count 0 2006.230.00:12:03.68#ibcon#read 6, iclass 22, count 0 2006.230.00:12:03.68#ibcon#end of sib2, iclass 22, count 0 2006.230.00:12:03.68#ibcon#*after write, iclass 22, count 0 2006.230.00:12:03.68#ibcon#*before return 0, iclass 22, count 0 2006.230.00:12:03.68#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:03.68#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:12:03.68#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:12:03.68#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:12:03.68$vck44/vabw=wide 2006.230.00:12:03.68#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.00:12:03.68#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.00:12:03.68#ibcon#ireg 8 cls_cnt 0 2006.230.00:12:03.68#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:03.68#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:03.68#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:03.68#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:12:03.68#ibcon#first serial, iclass 24, count 0 2006.230.00:12:03.68#ibcon#enter sib2, iclass 24, count 0 2006.230.00:12:03.68#ibcon#flushed, iclass 24, count 0 2006.230.00:12:03.68#ibcon#about to write, iclass 24, count 0 2006.230.00:12:03.68#ibcon#wrote, iclass 24, count 0 2006.230.00:12:03.68#ibcon#about to read 3, iclass 24, count 0 2006.230.00:12:03.70#ibcon#read 3, iclass 24, count 0 2006.230.00:12:03.70#ibcon#about to read 4, iclass 24, count 0 2006.230.00:12:03.70#ibcon#read 4, iclass 24, count 0 2006.230.00:12:03.70#ibcon#about to read 5, iclass 24, count 0 2006.230.00:12:03.70#ibcon#read 5, iclass 24, count 0 2006.230.00:12:03.70#ibcon#about to read 6, iclass 24, count 0 2006.230.00:12:03.70#ibcon#read 6, iclass 24, count 0 2006.230.00:12:03.70#ibcon#end of sib2, iclass 24, count 0 2006.230.00:12:03.70#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:12:03.70#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:12:03.70#ibcon#[25=BW32\r\n] 2006.230.00:12:03.70#ibcon#*before write, iclass 24, count 0 2006.230.00:12:03.70#ibcon#enter sib2, iclass 24, count 0 2006.230.00:12:03.70#ibcon#flushed, iclass 24, count 0 2006.230.00:12:03.70#ibcon#about to write, iclass 24, count 0 2006.230.00:12:03.70#ibcon#wrote, iclass 24, count 0 2006.230.00:12:03.70#ibcon#about to read 3, iclass 24, count 0 2006.230.00:12:03.73#ibcon#read 3, iclass 24, count 0 2006.230.00:12:03.73#ibcon#about to read 4, iclass 24, count 0 2006.230.00:12:03.73#ibcon#read 4, iclass 24, count 0 2006.230.00:12:03.73#ibcon#about to read 5, iclass 24, count 0 2006.230.00:12:03.73#ibcon#read 5, iclass 24, count 0 2006.230.00:12:03.73#ibcon#about to read 6, iclass 24, count 0 2006.230.00:12:03.73#ibcon#read 6, iclass 24, count 0 2006.230.00:12:03.73#ibcon#end of sib2, iclass 24, count 0 2006.230.00:12:03.73#ibcon#*after write, iclass 24, count 0 2006.230.00:12:03.73#ibcon#*before return 0, iclass 24, count 0 2006.230.00:12:03.73#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:03.73#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:12:03.73#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:12:03.73#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:12:03.73$vck44/vbbw=wide 2006.230.00:12:03.73#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.00:12:03.73#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.00:12:03.73#ibcon#ireg 8 cls_cnt 0 2006.230.00:12:03.73#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:12:03.80#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:12:03.80#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:12:03.80#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:12:03.80#ibcon#first serial, iclass 26, count 0 2006.230.00:12:03.80#ibcon#enter sib2, iclass 26, count 0 2006.230.00:12:03.80#ibcon#flushed, iclass 26, count 0 2006.230.00:12:03.80#ibcon#about to write, iclass 26, count 0 2006.230.00:12:03.80#ibcon#wrote, iclass 26, count 0 2006.230.00:12:03.80#ibcon#about to read 3, iclass 26, count 0 2006.230.00:12:03.82#ibcon#read 3, iclass 26, count 0 2006.230.00:12:03.82#ibcon#about to read 4, iclass 26, count 0 2006.230.00:12:03.82#ibcon#read 4, iclass 26, count 0 2006.230.00:12:03.82#ibcon#about to read 5, iclass 26, count 0 2006.230.00:12:03.82#ibcon#read 5, iclass 26, count 0 2006.230.00:12:03.82#ibcon#about to read 6, iclass 26, count 0 2006.230.00:12:03.82#ibcon#read 6, iclass 26, count 0 2006.230.00:12:03.82#ibcon#end of sib2, iclass 26, count 0 2006.230.00:12:03.82#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:12:03.82#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:12:03.82#ibcon#[27=BW32\r\n] 2006.230.00:12:03.82#ibcon#*before write, iclass 26, count 0 2006.230.00:12:03.82#ibcon#enter sib2, iclass 26, count 0 2006.230.00:12:03.82#ibcon#flushed, iclass 26, count 0 2006.230.00:12:03.82#ibcon#about to write, iclass 26, count 0 2006.230.00:12:03.82#ibcon#wrote, iclass 26, count 0 2006.230.00:12:03.82#ibcon#about to read 3, iclass 26, count 0 2006.230.00:12:03.85#ibcon#read 3, iclass 26, count 0 2006.230.00:12:03.85#ibcon#about to read 4, iclass 26, count 0 2006.230.00:12:03.85#ibcon#read 4, iclass 26, count 0 2006.230.00:12:03.85#ibcon#about to read 5, iclass 26, count 0 2006.230.00:12:03.85#ibcon#read 5, iclass 26, count 0 2006.230.00:12:03.85#ibcon#about to read 6, iclass 26, count 0 2006.230.00:12:03.85#ibcon#read 6, iclass 26, count 0 2006.230.00:12:03.85#ibcon#end of sib2, iclass 26, count 0 2006.230.00:12:03.85#ibcon#*after write, iclass 26, count 0 2006.230.00:12:03.85#ibcon#*before return 0, iclass 26, count 0 2006.230.00:12:03.85#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:12:03.85#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:12:03.85#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:12:03.85#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:12:03.85$setupk4/ifdk4 2006.230.00:12:03.85$ifdk4/lo= 2006.230.00:12:03.85$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:12:03.85$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:12:03.85$ifdk4/patch= 2006.230.00:12:03.85$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:12:03.85$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:12:03.85$setupk4/!*+20s 2006.230.00:12:10.37#abcon#<5=/09 1.8 5.4 30.92 791002.8\r\n> 2006.230.00:12:10.39#abcon#{5=INTERFACE CLEAR} 2006.230.00:12:10.45#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:12:18.33$setupk4/"tpicd 2006.230.00:12:18.33$setupk4/echo=off 2006.230.00:12:18.33$setupk4/xlog=off 2006.230.00:12:18.33:!2006.230.00:16:38 2006.230.00:12:44.14#trakl#Source acquired 2006.230.00:12:44.14#flagr#flagr/antenna,acquired 2006.230.00:16:38.00:preob 2006.230.00:16:39.14/onsource/TRACKING 2006.230.00:16:39.14:!2006.230.00:16:48 2006.230.00:16:48.00:"tape 2006.230.00:16:48.00:"st=record 2006.230.00:16:48.00:data_valid=on 2006.230.00:16:48.00:midob 2006.230.00:16:48.14/onsource/TRACKING 2006.230.00:16:48.14/wx/30.97,1002.8,77 2006.230.00:16:48.26/cable/+6.4039E-03 2006.230.00:16:49.35/va/01,08,usb,yes,33,36 2006.230.00:16:49.35/va/02,07,usb,yes,36,36 2006.230.00:16:49.35/va/03,06,usb,yes,44,47 2006.230.00:16:49.35/va/04,07,usb,yes,37,39 2006.230.00:16:49.35/va/05,04,usb,yes,33,33 2006.230.00:16:49.35/va/06,04,usb,yes,37,36 2006.230.00:16:49.35/va/07,05,usb,yes,33,33 2006.230.00:16:49.35/va/08,06,usb,yes,24,29 2006.230.00:16:49.58/valo/01,524.99,yes,locked 2006.230.00:16:49.58/valo/02,534.99,yes,locked 2006.230.00:16:49.58/valo/03,564.99,yes,locked 2006.230.00:16:49.58/valo/04,624.99,yes,locked 2006.230.00:16:49.58/valo/05,734.99,yes,locked 2006.230.00:16:49.58/valo/06,814.99,yes,locked 2006.230.00:16:49.58/valo/07,864.99,yes,locked 2006.230.00:16:49.58/valo/08,884.99,yes,locked 2006.230.00:16:50.67/vb/01,04,usb,yes,39,36 2006.230.00:16:50.67/vb/02,04,usb,yes,42,42 2006.230.00:16:50.67/vb/03,04,usb,yes,39,43 2006.230.00:16:50.67/vb/04,04,usb,yes,44,43 2006.230.00:16:50.67/vb/05,04,usb,yes,35,38 2006.230.00:16:50.67/vb/06,04,usb,yes,40,36 2006.230.00:16:50.67/vb/07,04,usb,yes,40,40 2006.230.00:16:50.67/vb/08,04,usb,yes,36,41 2006.230.00:16:50.91/vblo/01,629.99,yes,locked 2006.230.00:16:50.91/vblo/02,634.99,yes,locked 2006.230.00:16:50.91/vblo/03,649.99,yes,locked 2006.230.00:16:50.91/vblo/04,679.99,yes,locked 2006.230.00:16:50.91/vblo/05,709.99,yes,locked 2006.230.00:16:50.91/vblo/06,719.99,yes,locked 2006.230.00:16:50.91/vblo/07,734.99,yes,locked 2006.230.00:16:50.91/vblo/08,744.99,yes,locked 2006.230.00:16:51.06/vabw/8 2006.230.00:16:51.21/vbbw/8 2006.230.00:16:51.39/xfe/off,on,12.0 2006.230.00:16:51.79/ifatt/23,28,28,28 2006.230.00:16:52.08/fmout-gps/S +4.56E-07 2006.230.00:16:52.12:!2006.230.00:19:08 2006.230.00:19:08.00:data_valid=off 2006.230.00:19:08.00:"et 2006.230.00:19:08.01:!+3s 2006.230.00:19:11.02:"tape 2006.230.00:19:11.02:postob 2006.230.00:19:11.22/cable/+6.4031E-03 2006.230.00:19:11.22/wx/31.06,1002.7,76 2006.230.00:19:12.08/fmout-gps/S +4.56E-07 2006.230.00:19:12.08:scan_name=230-0025,jd0608,60 2006.230.00:19:12.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.230.00:19:13.13#flagr#flagr/antenna,new-source 2006.230.00:19:13.13:checkk5 2006.230.00:19:13.55/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:19:13.94/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:19:14.34/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:19:14.73/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:19:15.11/chk_obsdata//k5ts1/T2300016??a.dat file size is correct (nominal:560MB, actual:560MB). 2006.230.00:19:15.51/chk_obsdata//k5ts2/T2300016??b.dat file size is correct (nominal:560MB, actual:560MB). 2006.230.00:19:15.91/chk_obsdata//k5ts3/T2300016??c.dat file size is correct (nominal:560MB, actual:560MB). 2006.230.00:19:16.31/chk_obsdata//k5ts4/T2300016??d.dat file size is correct (nominal:560MB, actual:560MB). 2006.230.00:19:17.04/k5log//k5ts1_log_newline 2006.230.00:19:17.75/k5log//k5ts2_log_newline 2006.230.00:19:18.48/k5log//k5ts3_log_newline 2006.230.00:19:19.19/k5log//k5ts4_log_newline 2006.230.00:19:19.22/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:19:19.22:setupk4=1 2006.230.00:19:19.22$setupk4/echo=on 2006.230.00:19:19.22$setupk4/pcalon 2006.230.00:19:19.22$pcalon/"no phase cal control is implemented here 2006.230.00:19:19.22$setupk4/"tpicd=stop 2006.230.00:19:19.22$setupk4/"rec=synch_on 2006.230.00:19:19.22$setupk4/"rec_mode=128 2006.230.00:19:19.22$setupk4/!* 2006.230.00:19:19.22$setupk4/recpk4 2006.230.00:19:19.22$recpk4/recpatch= 2006.230.00:19:19.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:19:19.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:19:19.22$setupk4/vck44 2006.230.00:19:19.22$vck44/valo=1,524.99 2006.230.00:19:19.22#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.00:19:19.22#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.00:19:19.22#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:19.22#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:19.22#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:19.22#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:19.22#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:19:19.22#ibcon#first serial, iclass 23, count 0 2006.230.00:19:19.22#ibcon#enter sib2, iclass 23, count 0 2006.230.00:19:19.22#ibcon#flushed, iclass 23, count 0 2006.230.00:19:19.22#ibcon#about to write, iclass 23, count 0 2006.230.00:19:19.22#ibcon#wrote, iclass 23, count 0 2006.230.00:19:19.22#ibcon#about to read 3, iclass 23, count 0 2006.230.00:19:19.24#ibcon#read 3, iclass 23, count 0 2006.230.00:19:19.24#ibcon#about to read 4, iclass 23, count 0 2006.230.00:19:19.24#ibcon#read 4, iclass 23, count 0 2006.230.00:19:19.24#ibcon#about to read 5, iclass 23, count 0 2006.230.00:19:19.24#ibcon#read 5, iclass 23, count 0 2006.230.00:19:19.24#ibcon#about to read 6, iclass 23, count 0 2006.230.00:19:19.24#ibcon#read 6, iclass 23, count 0 2006.230.00:19:19.24#ibcon#end of sib2, iclass 23, count 0 2006.230.00:19:19.24#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:19:19.24#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:19:19.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:19:19.24#ibcon#*before write, iclass 23, count 0 2006.230.00:19:19.24#ibcon#enter sib2, iclass 23, count 0 2006.230.00:19:19.24#ibcon#flushed, iclass 23, count 0 2006.230.00:19:19.24#ibcon#about to write, iclass 23, count 0 2006.230.00:19:19.24#ibcon#wrote, iclass 23, count 0 2006.230.00:19:19.24#ibcon#about to read 3, iclass 23, count 0 2006.230.00:19:19.29#ibcon#read 3, iclass 23, count 0 2006.230.00:19:19.29#ibcon#about to read 4, iclass 23, count 0 2006.230.00:19:19.29#ibcon#read 4, iclass 23, count 0 2006.230.00:19:19.29#ibcon#about to read 5, iclass 23, count 0 2006.230.00:19:19.29#ibcon#read 5, iclass 23, count 0 2006.230.00:19:19.29#ibcon#about to read 6, iclass 23, count 0 2006.230.00:19:19.29#ibcon#read 6, iclass 23, count 0 2006.230.00:19:19.29#ibcon#end of sib2, iclass 23, count 0 2006.230.00:19:19.29#ibcon#*after write, iclass 23, count 0 2006.230.00:19:19.29#ibcon#*before return 0, iclass 23, count 0 2006.230.00:19:19.29#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:19.29#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:19.29#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:19:19.29#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:19:19.29$vck44/va=1,8 2006.230.00:19:19.29#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.00:19:19.29#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.00:19:19.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:19.29#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:19.29#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:19.29#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:19.29#ibcon#enter wrdev, iclass 25, count 2 2006.230.00:19:19.29#ibcon#first serial, iclass 25, count 2 2006.230.00:19:19.29#ibcon#enter sib2, iclass 25, count 2 2006.230.00:19:19.29#ibcon#flushed, iclass 25, count 2 2006.230.00:19:19.29#ibcon#about to write, iclass 25, count 2 2006.230.00:19:19.29#ibcon#wrote, iclass 25, count 2 2006.230.00:19:19.29#ibcon#about to read 3, iclass 25, count 2 2006.230.00:19:19.31#ibcon#read 3, iclass 25, count 2 2006.230.00:19:19.31#ibcon#about to read 4, iclass 25, count 2 2006.230.00:19:19.31#ibcon#read 4, iclass 25, count 2 2006.230.00:19:19.31#ibcon#about to read 5, iclass 25, count 2 2006.230.00:19:19.31#ibcon#read 5, iclass 25, count 2 2006.230.00:19:19.31#ibcon#about to read 6, iclass 25, count 2 2006.230.00:19:19.31#ibcon#read 6, iclass 25, count 2 2006.230.00:19:19.31#ibcon#end of sib2, iclass 25, count 2 2006.230.00:19:19.31#ibcon#*mode == 0, iclass 25, count 2 2006.230.00:19:19.31#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.00:19:19.31#ibcon#[25=AT01-08\r\n] 2006.230.00:19:19.31#ibcon#*before write, iclass 25, count 2 2006.230.00:19:19.31#ibcon#enter sib2, iclass 25, count 2 2006.230.00:19:19.31#ibcon#flushed, iclass 25, count 2 2006.230.00:19:19.31#ibcon#about to write, iclass 25, count 2 2006.230.00:19:19.31#ibcon#wrote, iclass 25, count 2 2006.230.00:19:19.31#ibcon#about to read 3, iclass 25, count 2 2006.230.00:19:19.34#ibcon#read 3, iclass 25, count 2 2006.230.00:19:19.34#ibcon#about to read 4, iclass 25, count 2 2006.230.00:19:19.34#ibcon#read 4, iclass 25, count 2 2006.230.00:19:19.34#ibcon#about to read 5, iclass 25, count 2 2006.230.00:19:19.34#ibcon#read 5, iclass 25, count 2 2006.230.00:19:19.34#ibcon#about to read 6, iclass 25, count 2 2006.230.00:19:19.34#ibcon#read 6, iclass 25, count 2 2006.230.00:19:19.34#ibcon#end of sib2, iclass 25, count 2 2006.230.00:19:19.34#ibcon#*after write, iclass 25, count 2 2006.230.00:19:19.34#ibcon#*before return 0, iclass 25, count 2 2006.230.00:19:19.34#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:19.34#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:19.34#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.00:19:19.34#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:19.34#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:19.46#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:19.46#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:19.46#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:19:19.46#ibcon#first serial, iclass 25, count 0 2006.230.00:19:19.46#ibcon#enter sib2, iclass 25, count 0 2006.230.00:19:19.46#ibcon#flushed, iclass 25, count 0 2006.230.00:19:19.46#ibcon#about to write, iclass 25, count 0 2006.230.00:19:19.46#ibcon#wrote, iclass 25, count 0 2006.230.00:19:19.46#ibcon#about to read 3, iclass 25, count 0 2006.230.00:19:19.48#ibcon#read 3, iclass 25, count 0 2006.230.00:19:19.48#ibcon#about to read 4, iclass 25, count 0 2006.230.00:19:19.48#ibcon#read 4, iclass 25, count 0 2006.230.00:19:19.48#ibcon#about to read 5, iclass 25, count 0 2006.230.00:19:19.48#ibcon#read 5, iclass 25, count 0 2006.230.00:19:19.48#ibcon#about to read 6, iclass 25, count 0 2006.230.00:19:19.48#ibcon#read 6, iclass 25, count 0 2006.230.00:19:19.48#ibcon#end of sib2, iclass 25, count 0 2006.230.00:19:19.48#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:19:19.48#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:19:19.48#ibcon#[25=USB\r\n] 2006.230.00:19:19.48#ibcon#*before write, iclass 25, count 0 2006.230.00:19:19.48#ibcon#enter sib2, iclass 25, count 0 2006.230.00:19:19.48#ibcon#flushed, iclass 25, count 0 2006.230.00:19:19.48#ibcon#about to write, iclass 25, count 0 2006.230.00:19:19.48#ibcon#wrote, iclass 25, count 0 2006.230.00:19:19.48#ibcon#about to read 3, iclass 25, count 0 2006.230.00:19:19.51#ibcon#read 3, iclass 25, count 0 2006.230.00:19:19.51#ibcon#about to read 4, iclass 25, count 0 2006.230.00:19:19.51#ibcon#read 4, iclass 25, count 0 2006.230.00:19:19.51#ibcon#about to read 5, iclass 25, count 0 2006.230.00:19:19.51#ibcon#read 5, iclass 25, count 0 2006.230.00:19:19.51#ibcon#about to read 6, iclass 25, count 0 2006.230.00:19:19.51#ibcon#read 6, iclass 25, count 0 2006.230.00:19:19.51#ibcon#end of sib2, iclass 25, count 0 2006.230.00:19:19.51#ibcon#*after write, iclass 25, count 0 2006.230.00:19:19.51#ibcon#*before return 0, iclass 25, count 0 2006.230.00:19:19.51#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:19.51#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:19.51#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:19:19.51#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:19:19.51$vck44/valo=2,534.99 2006.230.00:19:19.51#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.00:19:19.51#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.00:19:19.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:19.51#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:19.51#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:19.51#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:19.51#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:19:19.51#ibcon#first serial, iclass 27, count 0 2006.230.00:19:19.51#ibcon#enter sib2, iclass 27, count 0 2006.230.00:19:19.51#ibcon#flushed, iclass 27, count 0 2006.230.00:19:19.51#ibcon#about to write, iclass 27, count 0 2006.230.00:19:19.51#ibcon#wrote, iclass 27, count 0 2006.230.00:19:19.51#ibcon#about to read 3, iclass 27, count 0 2006.230.00:19:19.53#ibcon#read 3, iclass 27, count 0 2006.230.00:19:19.53#ibcon#about to read 4, iclass 27, count 0 2006.230.00:19:19.53#ibcon#read 4, iclass 27, count 0 2006.230.00:19:19.53#ibcon#about to read 5, iclass 27, count 0 2006.230.00:19:19.53#ibcon#read 5, iclass 27, count 0 2006.230.00:19:19.53#ibcon#about to read 6, iclass 27, count 0 2006.230.00:19:19.53#ibcon#read 6, iclass 27, count 0 2006.230.00:19:19.53#ibcon#end of sib2, iclass 27, count 0 2006.230.00:19:19.53#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:19:19.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:19:19.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:19:19.53#ibcon#*before write, iclass 27, count 0 2006.230.00:19:19.53#ibcon#enter sib2, iclass 27, count 0 2006.230.00:19:19.53#ibcon#flushed, iclass 27, count 0 2006.230.00:19:19.53#ibcon#about to write, iclass 27, count 0 2006.230.00:19:19.53#ibcon#wrote, iclass 27, count 0 2006.230.00:19:19.53#ibcon#about to read 3, iclass 27, count 0 2006.230.00:19:19.57#ibcon#read 3, iclass 27, count 0 2006.230.00:19:19.57#ibcon#about to read 4, iclass 27, count 0 2006.230.00:19:19.57#ibcon#read 4, iclass 27, count 0 2006.230.00:19:19.57#ibcon#about to read 5, iclass 27, count 0 2006.230.00:19:19.57#ibcon#read 5, iclass 27, count 0 2006.230.00:19:19.57#ibcon#about to read 6, iclass 27, count 0 2006.230.00:19:19.57#ibcon#read 6, iclass 27, count 0 2006.230.00:19:19.57#ibcon#end of sib2, iclass 27, count 0 2006.230.00:19:19.57#ibcon#*after write, iclass 27, count 0 2006.230.00:19:19.57#ibcon#*before return 0, iclass 27, count 0 2006.230.00:19:19.57#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:19.57#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:19.57#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:19:19.57#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:19:19.57$vck44/va=2,7 2006.230.00:19:19.57#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.00:19:19.57#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.00:19:19.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:19.57#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:19.63#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:19.63#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:19.63#ibcon#enter wrdev, iclass 29, count 2 2006.230.00:19:19.63#ibcon#first serial, iclass 29, count 2 2006.230.00:19:19.63#ibcon#enter sib2, iclass 29, count 2 2006.230.00:19:19.63#ibcon#flushed, iclass 29, count 2 2006.230.00:19:19.63#ibcon#about to write, iclass 29, count 2 2006.230.00:19:19.63#ibcon#wrote, iclass 29, count 2 2006.230.00:19:19.63#ibcon#about to read 3, iclass 29, count 2 2006.230.00:19:19.65#ibcon#read 3, iclass 29, count 2 2006.230.00:19:19.65#ibcon#about to read 4, iclass 29, count 2 2006.230.00:19:19.65#ibcon#read 4, iclass 29, count 2 2006.230.00:19:19.65#ibcon#about to read 5, iclass 29, count 2 2006.230.00:19:19.65#ibcon#read 5, iclass 29, count 2 2006.230.00:19:19.65#ibcon#about to read 6, iclass 29, count 2 2006.230.00:19:19.65#ibcon#read 6, iclass 29, count 2 2006.230.00:19:19.65#ibcon#end of sib2, iclass 29, count 2 2006.230.00:19:19.65#ibcon#*mode == 0, iclass 29, count 2 2006.230.00:19:19.65#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.00:19:19.65#ibcon#[25=AT02-07\r\n] 2006.230.00:19:19.65#ibcon#*before write, iclass 29, count 2 2006.230.00:19:19.65#ibcon#enter sib2, iclass 29, count 2 2006.230.00:19:19.65#ibcon#flushed, iclass 29, count 2 2006.230.00:19:19.65#ibcon#about to write, iclass 29, count 2 2006.230.00:19:19.65#ibcon#wrote, iclass 29, count 2 2006.230.00:19:19.65#ibcon#about to read 3, iclass 29, count 2 2006.230.00:19:19.68#ibcon#read 3, iclass 29, count 2 2006.230.00:19:19.68#ibcon#about to read 4, iclass 29, count 2 2006.230.00:19:19.68#ibcon#read 4, iclass 29, count 2 2006.230.00:19:19.68#ibcon#about to read 5, iclass 29, count 2 2006.230.00:19:19.68#ibcon#read 5, iclass 29, count 2 2006.230.00:19:19.68#ibcon#about to read 6, iclass 29, count 2 2006.230.00:19:19.68#ibcon#read 6, iclass 29, count 2 2006.230.00:19:19.68#ibcon#end of sib2, iclass 29, count 2 2006.230.00:19:19.68#ibcon#*after write, iclass 29, count 2 2006.230.00:19:19.68#ibcon#*before return 0, iclass 29, count 2 2006.230.00:19:19.68#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:19.68#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:19.68#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.00:19:19.68#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:19.68#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:19.80#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:19.80#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:19.80#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:19:19.80#ibcon#first serial, iclass 29, count 0 2006.230.00:19:19.80#ibcon#enter sib2, iclass 29, count 0 2006.230.00:19:19.80#ibcon#flushed, iclass 29, count 0 2006.230.00:19:19.80#ibcon#about to write, iclass 29, count 0 2006.230.00:19:19.80#ibcon#wrote, iclass 29, count 0 2006.230.00:19:19.80#ibcon#about to read 3, iclass 29, count 0 2006.230.00:19:19.82#ibcon#read 3, iclass 29, count 0 2006.230.00:19:19.82#ibcon#about to read 4, iclass 29, count 0 2006.230.00:19:19.82#ibcon#read 4, iclass 29, count 0 2006.230.00:19:19.82#ibcon#about to read 5, iclass 29, count 0 2006.230.00:19:19.82#ibcon#read 5, iclass 29, count 0 2006.230.00:19:19.82#ibcon#about to read 6, iclass 29, count 0 2006.230.00:19:19.82#ibcon#read 6, iclass 29, count 0 2006.230.00:19:19.82#ibcon#end of sib2, iclass 29, count 0 2006.230.00:19:19.82#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:19:19.82#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:19:19.82#ibcon#[25=USB\r\n] 2006.230.00:19:19.82#ibcon#*before write, iclass 29, count 0 2006.230.00:19:19.82#ibcon#enter sib2, iclass 29, count 0 2006.230.00:19:19.82#ibcon#flushed, iclass 29, count 0 2006.230.00:19:19.82#ibcon#about to write, iclass 29, count 0 2006.230.00:19:19.82#ibcon#wrote, iclass 29, count 0 2006.230.00:19:19.82#ibcon#about to read 3, iclass 29, count 0 2006.230.00:19:19.85#ibcon#read 3, iclass 29, count 0 2006.230.00:19:19.85#ibcon#about to read 4, iclass 29, count 0 2006.230.00:19:19.85#ibcon#read 4, iclass 29, count 0 2006.230.00:19:19.85#ibcon#about to read 5, iclass 29, count 0 2006.230.00:19:19.85#ibcon#read 5, iclass 29, count 0 2006.230.00:19:19.85#ibcon#about to read 6, iclass 29, count 0 2006.230.00:19:19.85#ibcon#read 6, iclass 29, count 0 2006.230.00:19:19.85#ibcon#end of sib2, iclass 29, count 0 2006.230.00:19:19.85#ibcon#*after write, iclass 29, count 0 2006.230.00:19:19.85#ibcon#*before return 0, iclass 29, count 0 2006.230.00:19:19.85#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:19.85#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:19.85#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:19:19.85#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:19:19.85$vck44/valo=3,564.99 2006.230.00:19:19.85#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.00:19:19.85#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.00:19:19.85#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:19.85#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:19.85#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:19.85#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:19.85#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:19:19.85#ibcon#first serial, iclass 31, count 0 2006.230.00:19:19.85#ibcon#enter sib2, iclass 31, count 0 2006.230.00:19:19.85#ibcon#flushed, iclass 31, count 0 2006.230.00:19:19.85#ibcon#about to write, iclass 31, count 0 2006.230.00:19:19.85#ibcon#wrote, iclass 31, count 0 2006.230.00:19:19.85#ibcon#about to read 3, iclass 31, count 0 2006.230.00:19:19.87#ibcon#read 3, iclass 31, count 0 2006.230.00:19:19.87#ibcon#about to read 4, iclass 31, count 0 2006.230.00:19:19.87#ibcon#read 4, iclass 31, count 0 2006.230.00:19:19.87#ibcon#about to read 5, iclass 31, count 0 2006.230.00:19:19.87#ibcon#read 5, iclass 31, count 0 2006.230.00:19:19.87#ibcon#about to read 6, iclass 31, count 0 2006.230.00:19:19.87#ibcon#read 6, iclass 31, count 0 2006.230.00:19:19.87#ibcon#end of sib2, iclass 31, count 0 2006.230.00:19:19.87#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:19:19.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:19:19.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:19:19.87#ibcon#*before write, iclass 31, count 0 2006.230.00:19:19.87#ibcon#enter sib2, iclass 31, count 0 2006.230.00:19:19.87#ibcon#flushed, iclass 31, count 0 2006.230.00:19:19.87#ibcon#about to write, iclass 31, count 0 2006.230.00:19:19.87#ibcon#wrote, iclass 31, count 0 2006.230.00:19:19.87#ibcon#about to read 3, iclass 31, count 0 2006.230.00:19:19.91#ibcon#read 3, iclass 31, count 0 2006.230.00:19:19.91#ibcon#about to read 4, iclass 31, count 0 2006.230.00:19:19.91#ibcon#read 4, iclass 31, count 0 2006.230.00:19:19.91#ibcon#about to read 5, iclass 31, count 0 2006.230.00:19:19.91#ibcon#read 5, iclass 31, count 0 2006.230.00:19:19.91#ibcon#about to read 6, iclass 31, count 0 2006.230.00:19:19.91#ibcon#read 6, iclass 31, count 0 2006.230.00:19:19.91#ibcon#end of sib2, iclass 31, count 0 2006.230.00:19:19.91#ibcon#*after write, iclass 31, count 0 2006.230.00:19:19.91#ibcon#*before return 0, iclass 31, count 0 2006.230.00:19:19.91#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:19.91#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:19.91#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:19:19.91#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:19:19.91$vck44/va=3,6 2006.230.00:19:19.91#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.00:19:19.91#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.00:19:19.91#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:19.91#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:19.97#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:19.97#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:19.97#ibcon#enter wrdev, iclass 33, count 2 2006.230.00:19:19.97#ibcon#first serial, iclass 33, count 2 2006.230.00:19:19.97#ibcon#enter sib2, iclass 33, count 2 2006.230.00:19:19.97#ibcon#flushed, iclass 33, count 2 2006.230.00:19:19.97#ibcon#about to write, iclass 33, count 2 2006.230.00:19:19.97#ibcon#wrote, iclass 33, count 2 2006.230.00:19:19.97#ibcon#about to read 3, iclass 33, count 2 2006.230.00:19:19.99#ibcon#read 3, iclass 33, count 2 2006.230.00:19:19.99#ibcon#about to read 4, iclass 33, count 2 2006.230.00:19:19.99#ibcon#read 4, iclass 33, count 2 2006.230.00:19:19.99#ibcon#about to read 5, iclass 33, count 2 2006.230.00:19:19.99#ibcon#read 5, iclass 33, count 2 2006.230.00:19:19.99#ibcon#about to read 6, iclass 33, count 2 2006.230.00:19:19.99#ibcon#read 6, iclass 33, count 2 2006.230.00:19:19.99#ibcon#end of sib2, iclass 33, count 2 2006.230.00:19:19.99#ibcon#*mode == 0, iclass 33, count 2 2006.230.00:19:19.99#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.00:19:19.99#ibcon#[25=AT03-06\r\n] 2006.230.00:19:19.99#ibcon#*before write, iclass 33, count 2 2006.230.00:19:19.99#ibcon#enter sib2, iclass 33, count 2 2006.230.00:19:19.99#ibcon#flushed, iclass 33, count 2 2006.230.00:19:19.99#ibcon#about to write, iclass 33, count 2 2006.230.00:19:19.99#ibcon#wrote, iclass 33, count 2 2006.230.00:19:19.99#ibcon#about to read 3, iclass 33, count 2 2006.230.00:19:20.02#ibcon#read 3, iclass 33, count 2 2006.230.00:19:20.02#ibcon#about to read 4, iclass 33, count 2 2006.230.00:19:20.02#ibcon#read 4, iclass 33, count 2 2006.230.00:19:20.02#ibcon#about to read 5, iclass 33, count 2 2006.230.00:19:20.02#ibcon#read 5, iclass 33, count 2 2006.230.00:19:20.02#ibcon#about to read 6, iclass 33, count 2 2006.230.00:19:20.02#ibcon#read 6, iclass 33, count 2 2006.230.00:19:20.02#ibcon#end of sib2, iclass 33, count 2 2006.230.00:19:20.02#ibcon#*after write, iclass 33, count 2 2006.230.00:19:20.02#ibcon#*before return 0, iclass 33, count 2 2006.230.00:19:20.02#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:20.02#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:20.02#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.00:19:20.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:20.02#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:20.14#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:20.14#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:20.14#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:19:20.14#ibcon#first serial, iclass 33, count 0 2006.230.00:19:20.14#ibcon#enter sib2, iclass 33, count 0 2006.230.00:19:20.14#ibcon#flushed, iclass 33, count 0 2006.230.00:19:20.14#ibcon#about to write, iclass 33, count 0 2006.230.00:19:20.14#ibcon#wrote, iclass 33, count 0 2006.230.00:19:20.14#ibcon#about to read 3, iclass 33, count 0 2006.230.00:19:20.16#ibcon#read 3, iclass 33, count 0 2006.230.00:19:20.16#ibcon#about to read 4, iclass 33, count 0 2006.230.00:19:20.16#ibcon#read 4, iclass 33, count 0 2006.230.00:19:20.16#ibcon#about to read 5, iclass 33, count 0 2006.230.00:19:20.16#ibcon#read 5, iclass 33, count 0 2006.230.00:19:20.16#ibcon#about to read 6, iclass 33, count 0 2006.230.00:19:20.16#ibcon#read 6, iclass 33, count 0 2006.230.00:19:20.16#ibcon#end of sib2, iclass 33, count 0 2006.230.00:19:20.16#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:19:20.16#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:19:20.16#ibcon#[25=USB\r\n] 2006.230.00:19:20.16#ibcon#*before write, iclass 33, count 0 2006.230.00:19:20.16#ibcon#enter sib2, iclass 33, count 0 2006.230.00:19:20.16#ibcon#flushed, iclass 33, count 0 2006.230.00:19:20.16#ibcon#about to write, iclass 33, count 0 2006.230.00:19:20.16#ibcon#wrote, iclass 33, count 0 2006.230.00:19:20.16#ibcon#about to read 3, iclass 33, count 0 2006.230.00:19:20.19#ibcon#read 3, iclass 33, count 0 2006.230.00:19:20.19#ibcon#about to read 4, iclass 33, count 0 2006.230.00:19:20.19#ibcon#read 4, iclass 33, count 0 2006.230.00:19:20.19#ibcon#about to read 5, iclass 33, count 0 2006.230.00:19:20.19#ibcon#read 5, iclass 33, count 0 2006.230.00:19:20.19#ibcon#about to read 6, iclass 33, count 0 2006.230.00:19:20.19#ibcon#read 6, iclass 33, count 0 2006.230.00:19:20.19#ibcon#end of sib2, iclass 33, count 0 2006.230.00:19:20.19#ibcon#*after write, iclass 33, count 0 2006.230.00:19:20.19#ibcon#*before return 0, iclass 33, count 0 2006.230.00:19:20.19#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:20.19#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:20.19#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:19:20.19#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:19:20.19$vck44/valo=4,624.99 2006.230.00:19:20.19#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.00:19:20.19#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.00:19:20.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:20.19#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:20.19#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:20.19#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:20.19#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:19:20.19#ibcon#first serial, iclass 35, count 0 2006.230.00:19:20.19#ibcon#enter sib2, iclass 35, count 0 2006.230.00:19:20.19#ibcon#flushed, iclass 35, count 0 2006.230.00:19:20.19#ibcon#about to write, iclass 35, count 0 2006.230.00:19:20.19#ibcon#wrote, iclass 35, count 0 2006.230.00:19:20.19#ibcon#about to read 3, iclass 35, count 0 2006.230.00:19:20.21#ibcon#read 3, iclass 35, count 0 2006.230.00:19:20.21#ibcon#about to read 4, iclass 35, count 0 2006.230.00:19:20.21#ibcon#read 4, iclass 35, count 0 2006.230.00:19:20.21#ibcon#about to read 5, iclass 35, count 0 2006.230.00:19:20.21#ibcon#read 5, iclass 35, count 0 2006.230.00:19:20.21#ibcon#about to read 6, iclass 35, count 0 2006.230.00:19:20.21#ibcon#read 6, iclass 35, count 0 2006.230.00:19:20.21#ibcon#end of sib2, iclass 35, count 0 2006.230.00:19:20.21#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:19:20.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:19:20.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:19:20.21#ibcon#*before write, iclass 35, count 0 2006.230.00:19:20.21#ibcon#enter sib2, iclass 35, count 0 2006.230.00:19:20.21#ibcon#flushed, iclass 35, count 0 2006.230.00:19:20.21#ibcon#about to write, iclass 35, count 0 2006.230.00:19:20.21#ibcon#wrote, iclass 35, count 0 2006.230.00:19:20.21#ibcon#about to read 3, iclass 35, count 0 2006.230.00:19:20.25#ibcon#read 3, iclass 35, count 0 2006.230.00:19:20.25#ibcon#about to read 4, iclass 35, count 0 2006.230.00:19:20.25#ibcon#read 4, iclass 35, count 0 2006.230.00:19:20.25#ibcon#about to read 5, iclass 35, count 0 2006.230.00:19:20.25#ibcon#read 5, iclass 35, count 0 2006.230.00:19:20.25#ibcon#about to read 6, iclass 35, count 0 2006.230.00:19:20.25#ibcon#read 6, iclass 35, count 0 2006.230.00:19:20.25#ibcon#end of sib2, iclass 35, count 0 2006.230.00:19:20.25#ibcon#*after write, iclass 35, count 0 2006.230.00:19:20.25#ibcon#*before return 0, iclass 35, count 0 2006.230.00:19:20.25#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:20.25#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:20.25#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:19:20.25#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:19:20.25$vck44/va=4,7 2006.230.00:19:20.25#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.00:19:20.25#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.00:19:20.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:20.25#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:20.31#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:20.31#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:20.31#ibcon#enter wrdev, iclass 37, count 2 2006.230.00:19:20.31#ibcon#first serial, iclass 37, count 2 2006.230.00:19:20.31#ibcon#enter sib2, iclass 37, count 2 2006.230.00:19:20.31#ibcon#flushed, iclass 37, count 2 2006.230.00:19:20.31#ibcon#about to write, iclass 37, count 2 2006.230.00:19:20.31#ibcon#wrote, iclass 37, count 2 2006.230.00:19:20.31#ibcon#about to read 3, iclass 37, count 2 2006.230.00:19:20.33#ibcon#read 3, iclass 37, count 2 2006.230.00:19:20.33#ibcon#about to read 4, iclass 37, count 2 2006.230.00:19:20.33#ibcon#read 4, iclass 37, count 2 2006.230.00:19:20.33#ibcon#about to read 5, iclass 37, count 2 2006.230.00:19:20.33#ibcon#read 5, iclass 37, count 2 2006.230.00:19:20.33#ibcon#about to read 6, iclass 37, count 2 2006.230.00:19:20.33#ibcon#read 6, iclass 37, count 2 2006.230.00:19:20.33#ibcon#end of sib2, iclass 37, count 2 2006.230.00:19:20.33#ibcon#*mode == 0, iclass 37, count 2 2006.230.00:19:20.33#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.00:19:20.33#ibcon#[25=AT04-07\r\n] 2006.230.00:19:20.33#ibcon#*before write, iclass 37, count 2 2006.230.00:19:20.33#ibcon#enter sib2, iclass 37, count 2 2006.230.00:19:20.33#ibcon#flushed, iclass 37, count 2 2006.230.00:19:20.33#ibcon#about to write, iclass 37, count 2 2006.230.00:19:20.33#ibcon#wrote, iclass 37, count 2 2006.230.00:19:20.33#ibcon#about to read 3, iclass 37, count 2 2006.230.00:19:20.36#ibcon#read 3, iclass 37, count 2 2006.230.00:19:20.36#ibcon#about to read 4, iclass 37, count 2 2006.230.00:19:20.36#ibcon#read 4, iclass 37, count 2 2006.230.00:19:20.36#ibcon#about to read 5, iclass 37, count 2 2006.230.00:19:20.36#ibcon#read 5, iclass 37, count 2 2006.230.00:19:20.36#ibcon#about to read 6, iclass 37, count 2 2006.230.00:19:20.36#ibcon#read 6, iclass 37, count 2 2006.230.00:19:20.36#ibcon#end of sib2, iclass 37, count 2 2006.230.00:19:20.36#ibcon#*after write, iclass 37, count 2 2006.230.00:19:20.36#ibcon#*before return 0, iclass 37, count 2 2006.230.00:19:20.36#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:20.36#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:20.36#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.00:19:20.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:20.36#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:20.48#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:20.48#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:20.48#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:19:20.48#ibcon#first serial, iclass 37, count 0 2006.230.00:19:20.48#ibcon#enter sib2, iclass 37, count 0 2006.230.00:19:20.48#ibcon#flushed, iclass 37, count 0 2006.230.00:19:20.48#ibcon#about to write, iclass 37, count 0 2006.230.00:19:20.48#ibcon#wrote, iclass 37, count 0 2006.230.00:19:20.48#ibcon#about to read 3, iclass 37, count 0 2006.230.00:19:20.50#ibcon#read 3, iclass 37, count 0 2006.230.00:19:20.50#ibcon#about to read 4, iclass 37, count 0 2006.230.00:19:20.50#ibcon#read 4, iclass 37, count 0 2006.230.00:19:20.50#ibcon#about to read 5, iclass 37, count 0 2006.230.00:19:20.50#ibcon#read 5, iclass 37, count 0 2006.230.00:19:20.50#ibcon#about to read 6, iclass 37, count 0 2006.230.00:19:20.50#ibcon#read 6, iclass 37, count 0 2006.230.00:19:20.50#ibcon#end of sib2, iclass 37, count 0 2006.230.00:19:20.50#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:19:20.50#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:19:20.50#ibcon#[25=USB\r\n] 2006.230.00:19:20.50#ibcon#*before write, iclass 37, count 0 2006.230.00:19:20.50#ibcon#enter sib2, iclass 37, count 0 2006.230.00:19:20.50#ibcon#flushed, iclass 37, count 0 2006.230.00:19:20.50#ibcon#about to write, iclass 37, count 0 2006.230.00:19:20.50#ibcon#wrote, iclass 37, count 0 2006.230.00:19:20.50#ibcon#about to read 3, iclass 37, count 0 2006.230.00:19:20.53#ibcon#read 3, iclass 37, count 0 2006.230.00:19:20.53#ibcon#about to read 4, iclass 37, count 0 2006.230.00:19:20.53#ibcon#read 4, iclass 37, count 0 2006.230.00:19:20.53#ibcon#about to read 5, iclass 37, count 0 2006.230.00:19:20.53#ibcon#read 5, iclass 37, count 0 2006.230.00:19:20.53#ibcon#about to read 6, iclass 37, count 0 2006.230.00:19:20.53#ibcon#read 6, iclass 37, count 0 2006.230.00:19:20.53#ibcon#end of sib2, iclass 37, count 0 2006.230.00:19:20.53#ibcon#*after write, iclass 37, count 0 2006.230.00:19:20.53#ibcon#*before return 0, iclass 37, count 0 2006.230.00:19:20.53#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:20.53#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:20.53#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:19:20.53#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:19:20.53$vck44/valo=5,734.99 2006.230.00:19:20.53#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.00:19:20.53#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.00:19:20.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:20.53#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:20.53#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:20.53#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:20.53#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:19:20.53#ibcon#first serial, iclass 39, count 0 2006.230.00:19:20.53#ibcon#enter sib2, iclass 39, count 0 2006.230.00:19:20.53#ibcon#flushed, iclass 39, count 0 2006.230.00:19:20.53#ibcon#about to write, iclass 39, count 0 2006.230.00:19:20.53#ibcon#wrote, iclass 39, count 0 2006.230.00:19:20.53#ibcon#about to read 3, iclass 39, count 0 2006.230.00:19:20.55#ibcon#read 3, iclass 39, count 0 2006.230.00:19:20.55#ibcon#about to read 4, iclass 39, count 0 2006.230.00:19:20.55#ibcon#read 4, iclass 39, count 0 2006.230.00:19:20.55#ibcon#about to read 5, iclass 39, count 0 2006.230.00:19:20.55#ibcon#read 5, iclass 39, count 0 2006.230.00:19:20.55#ibcon#about to read 6, iclass 39, count 0 2006.230.00:19:20.55#ibcon#read 6, iclass 39, count 0 2006.230.00:19:20.55#ibcon#end of sib2, iclass 39, count 0 2006.230.00:19:20.55#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:19:20.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:19:20.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:19:20.55#ibcon#*before write, iclass 39, count 0 2006.230.00:19:20.55#ibcon#enter sib2, iclass 39, count 0 2006.230.00:19:20.55#ibcon#flushed, iclass 39, count 0 2006.230.00:19:20.55#ibcon#about to write, iclass 39, count 0 2006.230.00:19:20.55#ibcon#wrote, iclass 39, count 0 2006.230.00:19:20.55#ibcon#about to read 3, iclass 39, count 0 2006.230.00:19:20.59#ibcon#read 3, iclass 39, count 0 2006.230.00:19:20.59#ibcon#about to read 4, iclass 39, count 0 2006.230.00:19:20.59#ibcon#read 4, iclass 39, count 0 2006.230.00:19:20.59#ibcon#about to read 5, iclass 39, count 0 2006.230.00:19:20.59#ibcon#read 5, iclass 39, count 0 2006.230.00:19:20.59#ibcon#about to read 6, iclass 39, count 0 2006.230.00:19:20.59#ibcon#read 6, iclass 39, count 0 2006.230.00:19:20.59#ibcon#end of sib2, iclass 39, count 0 2006.230.00:19:20.59#ibcon#*after write, iclass 39, count 0 2006.230.00:19:20.59#ibcon#*before return 0, iclass 39, count 0 2006.230.00:19:20.59#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:20.59#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:20.59#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:19:20.59#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:19:20.59$vck44/va=5,4 2006.230.00:19:20.59#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.00:19:20.59#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.00:19:20.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:20.59#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:20.65#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:20.65#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:20.65#ibcon#enter wrdev, iclass 3, count 2 2006.230.00:19:20.65#ibcon#first serial, iclass 3, count 2 2006.230.00:19:20.65#ibcon#enter sib2, iclass 3, count 2 2006.230.00:19:20.65#ibcon#flushed, iclass 3, count 2 2006.230.00:19:20.65#ibcon#about to write, iclass 3, count 2 2006.230.00:19:20.65#ibcon#wrote, iclass 3, count 2 2006.230.00:19:20.65#ibcon#about to read 3, iclass 3, count 2 2006.230.00:19:20.67#ibcon#read 3, iclass 3, count 2 2006.230.00:19:20.67#ibcon#about to read 4, iclass 3, count 2 2006.230.00:19:20.67#ibcon#read 4, iclass 3, count 2 2006.230.00:19:20.67#ibcon#about to read 5, iclass 3, count 2 2006.230.00:19:20.67#ibcon#read 5, iclass 3, count 2 2006.230.00:19:20.67#ibcon#about to read 6, iclass 3, count 2 2006.230.00:19:20.67#ibcon#read 6, iclass 3, count 2 2006.230.00:19:20.67#ibcon#end of sib2, iclass 3, count 2 2006.230.00:19:20.67#ibcon#*mode == 0, iclass 3, count 2 2006.230.00:19:20.67#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.00:19:20.67#ibcon#[25=AT05-04\r\n] 2006.230.00:19:20.67#ibcon#*before write, iclass 3, count 2 2006.230.00:19:20.67#ibcon#enter sib2, iclass 3, count 2 2006.230.00:19:20.67#ibcon#flushed, iclass 3, count 2 2006.230.00:19:20.67#ibcon#about to write, iclass 3, count 2 2006.230.00:19:20.67#ibcon#wrote, iclass 3, count 2 2006.230.00:19:20.67#ibcon#about to read 3, iclass 3, count 2 2006.230.00:19:20.70#ibcon#read 3, iclass 3, count 2 2006.230.00:19:20.70#ibcon#about to read 4, iclass 3, count 2 2006.230.00:19:20.70#ibcon#read 4, iclass 3, count 2 2006.230.00:19:20.70#ibcon#about to read 5, iclass 3, count 2 2006.230.00:19:20.70#ibcon#read 5, iclass 3, count 2 2006.230.00:19:20.70#ibcon#about to read 6, iclass 3, count 2 2006.230.00:19:20.70#ibcon#read 6, iclass 3, count 2 2006.230.00:19:20.70#ibcon#end of sib2, iclass 3, count 2 2006.230.00:19:20.70#ibcon#*after write, iclass 3, count 2 2006.230.00:19:20.70#ibcon#*before return 0, iclass 3, count 2 2006.230.00:19:20.70#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:20.70#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:20.70#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.00:19:20.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:20.70#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:20.82#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:20.82#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:20.82#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:19:20.82#ibcon#first serial, iclass 3, count 0 2006.230.00:19:20.82#ibcon#enter sib2, iclass 3, count 0 2006.230.00:19:20.82#ibcon#flushed, iclass 3, count 0 2006.230.00:19:20.82#ibcon#about to write, iclass 3, count 0 2006.230.00:19:20.82#ibcon#wrote, iclass 3, count 0 2006.230.00:19:20.82#ibcon#about to read 3, iclass 3, count 0 2006.230.00:19:20.84#ibcon#read 3, iclass 3, count 0 2006.230.00:19:20.84#ibcon#about to read 4, iclass 3, count 0 2006.230.00:19:20.84#ibcon#read 4, iclass 3, count 0 2006.230.00:19:20.84#ibcon#about to read 5, iclass 3, count 0 2006.230.00:19:20.84#ibcon#read 5, iclass 3, count 0 2006.230.00:19:20.84#ibcon#about to read 6, iclass 3, count 0 2006.230.00:19:20.84#ibcon#read 6, iclass 3, count 0 2006.230.00:19:20.84#ibcon#end of sib2, iclass 3, count 0 2006.230.00:19:20.84#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:19:20.84#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:19:20.84#ibcon#[25=USB\r\n] 2006.230.00:19:20.84#ibcon#*before write, iclass 3, count 0 2006.230.00:19:20.84#ibcon#enter sib2, iclass 3, count 0 2006.230.00:19:20.84#ibcon#flushed, iclass 3, count 0 2006.230.00:19:20.84#ibcon#about to write, iclass 3, count 0 2006.230.00:19:20.84#ibcon#wrote, iclass 3, count 0 2006.230.00:19:20.84#ibcon#about to read 3, iclass 3, count 0 2006.230.00:19:20.87#ibcon#read 3, iclass 3, count 0 2006.230.00:19:20.87#ibcon#about to read 4, iclass 3, count 0 2006.230.00:19:20.87#ibcon#read 4, iclass 3, count 0 2006.230.00:19:20.87#ibcon#about to read 5, iclass 3, count 0 2006.230.00:19:20.87#ibcon#read 5, iclass 3, count 0 2006.230.00:19:20.87#ibcon#about to read 6, iclass 3, count 0 2006.230.00:19:20.87#ibcon#read 6, iclass 3, count 0 2006.230.00:19:20.87#ibcon#end of sib2, iclass 3, count 0 2006.230.00:19:20.87#ibcon#*after write, iclass 3, count 0 2006.230.00:19:20.87#ibcon#*before return 0, iclass 3, count 0 2006.230.00:19:20.87#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:20.87#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:20.87#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:19:20.87#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:19:20.87$vck44/valo=6,814.99 2006.230.00:19:20.87#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.00:19:20.87#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.00:19:20.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:20.87#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:20.87#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:20.87#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:20.87#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:19:20.87#ibcon#first serial, iclass 5, count 0 2006.230.00:19:20.87#ibcon#enter sib2, iclass 5, count 0 2006.230.00:19:20.87#ibcon#flushed, iclass 5, count 0 2006.230.00:19:20.87#ibcon#about to write, iclass 5, count 0 2006.230.00:19:20.87#ibcon#wrote, iclass 5, count 0 2006.230.00:19:20.87#ibcon#about to read 3, iclass 5, count 0 2006.230.00:19:20.89#ibcon#read 3, iclass 5, count 0 2006.230.00:19:20.89#ibcon#about to read 4, iclass 5, count 0 2006.230.00:19:20.89#ibcon#read 4, iclass 5, count 0 2006.230.00:19:20.89#ibcon#about to read 5, iclass 5, count 0 2006.230.00:19:20.89#ibcon#read 5, iclass 5, count 0 2006.230.00:19:20.89#ibcon#about to read 6, iclass 5, count 0 2006.230.00:19:20.89#ibcon#read 6, iclass 5, count 0 2006.230.00:19:20.89#ibcon#end of sib2, iclass 5, count 0 2006.230.00:19:20.89#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:19:20.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:19:20.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:19:20.89#ibcon#*before write, iclass 5, count 0 2006.230.00:19:20.89#ibcon#enter sib2, iclass 5, count 0 2006.230.00:19:20.89#ibcon#flushed, iclass 5, count 0 2006.230.00:19:20.89#ibcon#about to write, iclass 5, count 0 2006.230.00:19:20.89#ibcon#wrote, iclass 5, count 0 2006.230.00:19:20.89#ibcon#about to read 3, iclass 5, count 0 2006.230.00:19:20.93#ibcon#read 3, iclass 5, count 0 2006.230.00:19:20.93#ibcon#about to read 4, iclass 5, count 0 2006.230.00:19:20.93#ibcon#read 4, iclass 5, count 0 2006.230.00:19:20.93#ibcon#about to read 5, iclass 5, count 0 2006.230.00:19:20.93#ibcon#read 5, iclass 5, count 0 2006.230.00:19:20.93#ibcon#about to read 6, iclass 5, count 0 2006.230.00:19:20.93#ibcon#read 6, iclass 5, count 0 2006.230.00:19:20.93#ibcon#end of sib2, iclass 5, count 0 2006.230.00:19:20.93#ibcon#*after write, iclass 5, count 0 2006.230.00:19:20.93#ibcon#*before return 0, iclass 5, count 0 2006.230.00:19:20.93#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:20.93#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:20.93#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:19:20.93#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:19:20.93$vck44/va=6,4 2006.230.00:19:20.93#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.00:19:20.93#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.00:19:20.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:20.93#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:20.99#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:20.99#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:20.99#ibcon#enter wrdev, iclass 7, count 2 2006.230.00:19:20.99#ibcon#first serial, iclass 7, count 2 2006.230.00:19:20.99#ibcon#enter sib2, iclass 7, count 2 2006.230.00:19:20.99#ibcon#flushed, iclass 7, count 2 2006.230.00:19:20.99#ibcon#about to write, iclass 7, count 2 2006.230.00:19:20.99#ibcon#wrote, iclass 7, count 2 2006.230.00:19:20.99#ibcon#about to read 3, iclass 7, count 2 2006.230.00:19:21.01#ibcon#read 3, iclass 7, count 2 2006.230.00:19:21.01#ibcon#about to read 4, iclass 7, count 2 2006.230.00:19:21.01#ibcon#read 4, iclass 7, count 2 2006.230.00:19:21.01#ibcon#about to read 5, iclass 7, count 2 2006.230.00:19:21.01#ibcon#read 5, iclass 7, count 2 2006.230.00:19:21.01#ibcon#about to read 6, iclass 7, count 2 2006.230.00:19:21.01#ibcon#read 6, iclass 7, count 2 2006.230.00:19:21.01#ibcon#end of sib2, iclass 7, count 2 2006.230.00:19:21.01#ibcon#*mode == 0, iclass 7, count 2 2006.230.00:19:21.01#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.00:19:21.01#ibcon#[25=AT06-04\r\n] 2006.230.00:19:21.01#ibcon#*before write, iclass 7, count 2 2006.230.00:19:21.01#ibcon#enter sib2, iclass 7, count 2 2006.230.00:19:21.01#ibcon#flushed, iclass 7, count 2 2006.230.00:19:21.01#ibcon#about to write, iclass 7, count 2 2006.230.00:19:21.01#ibcon#wrote, iclass 7, count 2 2006.230.00:19:21.01#ibcon#about to read 3, iclass 7, count 2 2006.230.00:19:21.04#ibcon#read 3, iclass 7, count 2 2006.230.00:19:21.04#ibcon#about to read 4, iclass 7, count 2 2006.230.00:19:21.04#ibcon#read 4, iclass 7, count 2 2006.230.00:19:21.04#ibcon#about to read 5, iclass 7, count 2 2006.230.00:19:21.04#ibcon#read 5, iclass 7, count 2 2006.230.00:19:21.04#ibcon#about to read 6, iclass 7, count 2 2006.230.00:19:21.04#ibcon#read 6, iclass 7, count 2 2006.230.00:19:21.04#ibcon#end of sib2, iclass 7, count 2 2006.230.00:19:21.04#ibcon#*after write, iclass 7, count 2 2006.230.00:19:21.04#ibcon#*before return 0, iclass 7, count 2 2006.230.00:19:21.04#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:21.04#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:21.04#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.00:19:21.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:21.04#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:21.16#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:21.16#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:21.16#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:19:21.16#ibcon#first serial, iclass 7, count 0 2006.230.00:19:21.16#ibcon#enter sib2, iclass 7, count 0 2006.230.00:19:21.16#ibcon#flushed, iclass 7, count 0 2006.230.00:19:21.16#ibcon#about to write, iclass 7, count 0 2006.230.00:19:21.16#ibcon#wrote, iclass 7, count 0 2006.230.00:19:21.16#ibcon#about to read 3, iclass 7, count 0 2006.230.00:19:21.18#ibcon#read 3, iclass 7, count 0 2006.230.00:19:21.18#ibcon#about to read 4, iclass 7, count 0 2006.230.00:19:21.18#ibcon#read 4, iclass 7, count 0 2006.230.00:19:21.18#ibcon#about to read 5, iclass 7, count 0 2006.230.00:19:21.18#ibcon#read 5, iclass 7, count 0 2006.230.00:19:21.18#ibcon#about to read 6, iclass 7, count 0 2006.230.00:19:21.18#ibcon#read 6, iclass 7, count 0 2006.230.00:19:21.18#ibcon#end of sib2, iclass 7, count 0 2006.230.00:19:21.18#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:19:21.18#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:19:21.18#ibcon#[25=USB\r\n] 2006.230.00:19:21.18#ibcon#*before write, iclass 7, count 0 2006.230.00:19:21.18#ibcon#enter sib2, iclass 7, count 0 2006.230.00:19:21.18#ibcon#flushed, iclass 7, count 0 2006.230.00:19:21.18#ibcon#about to write, iclass 7, count 0 2006.230.00:19:21.18#ibcon#wrote, iclass 7, count 0 2006.230.00:19:21.18#ibcon#about to read 3, iclass 7, count 0 2006.230.00:19:21.21#ibcon#read 3, iclass 7, count 0 2006.230.00:19:21.21#ibcon#about to read 4, iclass 7, count 0 2006.230.00:19:21.21#ibcon#read 4, iclass 7, count 0 2006.230.00:19:21.21#ibcon#about to read 5, iclass 7, count 0 2006.230.00:19:21.21#ibcon#read 5, iclass 7, count 0 2006.230.00:19:21.21#ibcon#about to read 6, iclass 7, count 0 2006.230.00:19:21.21#ibcon#read 6, iclass 7, count 0 2006.230.00:19:21.21#ibcon#end of sib2, iclass 7, count 0 2006.230.00:19:21.21#ibcon#*after write, iclass 7, count 0 2006.230.00:19:21.21#ibcon#*before return 0, iclass 7, count 0 2006.230.00:19:21.21#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:21.21#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:21.21#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:19:21.21#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:19:21.21$vck44/valo=7,864.99 2006.230.00:19:21.21#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.00:19:21.21#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.00:19:21.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:21.21#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:21.21#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:21.21#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:21.21#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:19:21.21#ibcon#first serial, iclass 11, count 0 2006.230.00:19:21.21#ibcon#enter sib2, iclass 11, count 0 2006.230.00:19:21.21#ibcon#flushed, iclass 11, count 0 2006.230.00:19:21.21#ibcon#about to write, iclass 11, count 0 2006.230.00:19:21.21#ibcon#wrote, iclass 11, count 0 2006.230.00:19:21.21#ibcon#about to read 3, iclass 11, count 0 2006.230.00:19:21.23#ibcon#read 3, iclass 11, count 0 2006.230.00:19:21.23#ibcon#about to read 4, iclass 11, count 0 2006.230.00:19:21.23#ibcon#read 4, iclass 11, count 0 2006.230.00:19:21.23#ibcon#about to read 5, iclass 11, count 0 2006.230.00:19:21.23#ibcon#read 5, iclass 11, count 0 2006.230.00:19:21.23#ibcon#about to read 6, iclass 11, count 0 2006.230.00:19:21.23#ibcon#read 6, iclass 11, count 0 2006.230.00:19:21.23#ibcon#end of sib2, iclass 11, count 0 2006.230.00:19:21.23#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:19:21.23#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:19:21.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:19:21.23#ibcon#*before write, iclass 11, count 0 2006.230.00:19:21.23#ibcon#enter sib2, iclass 11, count 0 2006.230.00:19:21.23#ibcon#flushed, iclass 11, count 0 2006.230.00:19:21.23#ibcon#about to write, iclass 11, count 0 2006.230.00:19:21.23#ibcon#wrote, iclass 11, count 0 2006.230.00:19:21.23#ibcon#about to read 3, iclass 11, count 0 2006.230.00:19:21.27#ibcon#read 3, iclass 11, count 0 2006.230.00:19:21.27#ibcon#about to read 4, iclass 11, count 0 2006.230.00:19:21.27#ibcon#read 4, iclass 11, count 0 2006.230.00:19:21.27#ibcon#about to read 5, iclass 11, count 0 2006.230.00:19:21.27#ibcon#read 5, iclass 11, count 0 2006.230.00:19:21.27#ibcon#about to read 6, iclass 11, count 0 2006.230.00:19:21.27#ibcon#read 6, iclass 11, count 0 2006.230.00:19:21.27#ibcon#end of sib2, iclass 11, count 0 2006.230.00:19:21.27#ibcon#*after write, iclass 11, count 0 2006.230.00:19:21.27#ibcon#*before return 0, iclass 11, count 0 2006.230.00:19:21.27#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:21.27#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:21.27#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:19:21.27#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:19:21.27$vck44/va=7,5 2006.230.00:19:21.27#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.00:19:21.27#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.00:19:21.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:21.27#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:21.33#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:21.33#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:21.33#ibcon#enter wrdev, iclass 13, count 2 2006.230.00:19:21.33#ibcon#first serial, iclass 13, count 2 2006.230.00:19:21.33#ibcon#enter sib2, iclass 13, count 2 2006.230.00:19:21.33#ibcon#flushed, iclass 13, count 2 2006.230.00:19:21.33#ibcon#about to write, iclass 13, count 2 2006.230.00:19:21.33#ibcon#wrote, iclass 13, count 2 2006.230.00:19:21.33#ibcon#about to read 3, iclass 13, count 2 2006.230.00:19:21.35#ibcon#read 3, iclass 13, count 2 2006.230.00:19:21.35#ibcon#about to read 4, iclass 13, count 2 2006.230.00:19:21.35#ibcon#read 4, iclass 13, count 2 2006.230.00:19:21.35#ibcon#about to read 5, iclass 13, count 2 2006.230.00:19:21.35#ibcon#read 5, iclass 13, count 2 2006.230.00:19:21.35#ibcon#about to read 6, iclass 13, count 2 2006.230.00:19:21.35#ibcon#read 6, iclass 13, count 2 2006.230.00:19:21.35#ibcon#end of sib2, iclass 13, count 2 2006.230.00:19:21.35#ibcon#*mode == 0, iclass 13, count 2 2006.230.00:19:21.35#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.00:19:21.35#ibcon#[25=AT07-05\r\n] 2006.230.00:19:21.35#ibcon#*before write, iclass 13, count 2 2006.230.00:19:21.35#ibcon#enter sib2, iclass 13, count 2 2006.230.00:19:21.35#ibcon#flushed, iclass 13, count 2 2006.230.00:19:21.35#ibcon#about to write, iclass 13, count 2 2006.230.00:19:21.35#ibcon#wrote, iclass 13, count 2 2006.230.00:19:21.35#ibcon#about to read 3, iclass 13, count 2 2006.230.00:19:21.38#ibcon#read 3, iclass 13, count 2 2006.230.00:19:21.38#ibcon#about to read 4, iclass 13, count 2 2006.230.00:19:21.38#ibcon#read 4, iclass 13, count 2 2006.230.00:19:21.38#ibcon#about to read 5, iclass 13, count 2 2006.230.00:19:21.38#ibcon#read 5, iclass 13, count 2 2006.230.00:19:21.38#ibcon#about to read 6, iclass 13, count 2 2006.230.00:19:21.38#ibcon#read 6, iclass 13, count 2 2006.230.00:19:21.38#ibcon#end of sib2, iclass 13, count 2 2006.230.00:19:21.38#ibcon#*after write, iclass 13, count 2 2006.230.00:19:21.38#ibcon#*before return 0, iclass 13, count 2 2006.230.00:19:21.38#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:21.38#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:21.38#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.00:19:21.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:21.38#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:21.50#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:21.50#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:21.50#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:19:21.50#ibcon#first serial, iclass 13, count 0 2006.230.00:19:21.50#ibcon#enter sib2, iclass 13, count 0 2006.230.00:19:21.50#ibcon#flushed, iclass 13, count 0 2006.230.00:19:21.50#ibcon#about to write, iclass 13, count 0 2006.230.00:19:21.50#ibcon#wrote, iclass 13, count 0 2006.230.00:19:21.50#ibcon#about to read 3, iclass 13, count 0 2006.230.00:19:21.52#ibcon#read 3, iclass 13, count 0 2006.230.00:19:21.52#ibcon#about to read 4, iclass 13, count 0 2006.230.00:19:21.52#ibcon#read 4, iclass 13, count 0 2006.230.00:19:21.52#ibcon#about to read 5, iclass 13, count 0 2006.230.00:19:21.52#ibcon#read 5, iclass 13, count 0 2006.230.00:19:21.52#ibcon#about to read 6, iclass 13, count 0 2006.230.00:19:21.52#ibcon#read 6, iclass 13, count 0 2006.230.00:19:21.52#ibcon#end of sib2, iclass 13, count 0 2006.230.00:19:21.52#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:19:21.52#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:19:21.52#ibcon#[25=USB\r\n] 2006.230.00:19:21.52#ibcon#*before write, iclass 13, count 0 2006.230.00:19:21.52#ibcon#enter sib2, iclass 13, count 0 2006.230.00:19:21.52#ibcon#flushed, iclass 13, count 0 2006.230.00:19:21.52#ibcon#about to write, iclass 13, count 0 2006.230.00:19:21.52#ibcon#wrote, iclass 13, count 0 2006.230.00:19:21.52#ibcon#about to read 3, iclass 13, count 0 2006.230.00:19:21.55#ibcon#read 3, iclass 13, count 0 2006.230.00:19:21.55#ibcon#about to read 4, iclass 13, count 0 2006.230.00:19:21.55#ibcon#read 4, iclass 13, count 0 2006.230.00:19:21.55#ibcon#about to read 5, iclass 13, count 0 2006.230.00:19:21.55#ibcon#read 5, iclass 13, count 0 2006.230.00:19:21.55#ibcon#about to read 6, iclass 13, count 0 2006.230.00:19:21.55#ibcon#read 6, iclass 13, count 0 2006.230.00:19:21.55#ibcon#end of sib2, iclass 13, count 0 2006.230.00:19:21.55#ibcon#*after write, iclass 13, count 0 2006.230.00:19:21.55#ibcon#*before return 0, iclass 13, count 0 2006.230.00:19:21.55#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:21.55#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:21.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:19:21.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:19:21.55$vck44/valo=8,884.99 2006.230.00:19:21.55#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.00:19:21.55#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.00:19:21.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:21.55#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:21.55#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:21.55#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:21.55#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:19:21.55#ibcon#first serial, iclass 15, count 0 2006.230.00:19:21.55#ibcon#enter sib2, iclass 15, count 0 2006.230.00:19:21.55#ibcon#flushed, iclass 15, count 0 2006.230.00:19:21.55#ibcon#about to write, iclass 15, count 0 2006.230.00:19:21.55#ibcon#wrote, iclass 15, count 0 2006.230.00:19:21.55#ibcon#about to read 3, iclass 15, count 0 2006.230.00:19:21.57#ibcon#read 3, iclass 15, count 0 2006.230.00:19:21.57#ibcon#about to read 4, iclass 15, count 0 2006.230.00:19:21.57#ibcon#read 4, iclass 15, count 0 2006.230.00:19:21.57#ibcon#about to read 5, iclass 15, count 0 2006.230.00:19:21.57#ibcon#read 5, iclass 15, count 0 2006.230.00:19:21.57#ibcon#about to read 6, iclass 15, count 0 2006.230.00:19:21.57#ibcon#read 6, iclass 15, count 0 2006.230.00:19:21.57#ibcon#end of sib2, iclass 15, count 0 2006.230.00:19:21.57#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:19:21.57#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:19:21.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:19:21.57#ibcon#*before write, iclass 15, count 0 2006.230.00:19:21.57#ibcon#enter sib2, iclass 15, count 0 2006.230.00:19:21.57#ibcon#flushed, iclass 15, count 0 2006.230.00:19:21.57#ibcon#about to write, iclass 15, count 0 2006.230.00:19:21.57#ibcon#wrote, iclass 15, count 0 2006.230.00:19:21.57#ibcon#about to read 3, iclass 15, count 0 2006.230.00:19:21.61#ibcon#read 3, iclass 15, count 0 2006.230.00:19:21.61#ibcon#about to read 4, iclass 15, count 0 2006.230.00:19:21.61#ibcon#read 4, iclass 15, count 0 2006.230.00:19:21.61#ibcon#about to read 5, iclass 15, count 0 2006.230.00:19:21.61#ibcon#read 5, iclass 15, count 0 2006.230.00:19:21.61#ibcon#about to read 6, iclass 15, count 0 2006.230.00:19:21.61#ibcon#read 6, iclass 15, count 0 2006.230.00:19:21.61#ibcon#end of sib2, iclass 15, count 0 2006.230.00:19:21.61#ibcon#*after write, iclass 15, count 0 2006.230.00:19:21.61#ibcon#*before return 0, iclass 15, count 0 2006.230.00:19:21.61#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:21.61#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:21.61#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:19:21.61#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:19:21.61$vck44/va=8,6 2006.230.00:19:21.61#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.230.00:19:21.61#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.230.00:19:21.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:21.61#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:19:21.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:19:21.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:19:21.67#ibcon#enter wrdev, iclass 17, count 2 2006.230.00:19:21.67#ibcon#first serial, iclass 17, count 2 2006.230.00:19:21.67#ibcon#enter sib2, iclass 17, count 2 2006.230.00:19:21.67#ibcon#flushed, iclass 17, count 2 2006.230.00:19:21.67#ibcon#about to write, iclass 17, count 2 2006.230.00:19:21.67#ibcon#wrote, iclass 17, count 2 2006.230.00:19:21.67#ibcon#about to read 3, iclass 17, count 2 2006.230.00:19:21.69#ibcon#read 3, iclass 17, count 2 2006.230.00:19:21.69#ibcon#about to read 4, iclass 17, count 2 2006.230.00:19:21.69#ibcon#read 4, iclass 17, count 2 2006.230.00:19:21.69#ibcon#about to read 5, iclass 17, count 2 2006.230.00:19:21.69#ibcon#read 5, iclass 17, count 2 2006.230.00:19:21.69#ibcon#about to read 6, iclass 17, count 2 2006.230.00:19:21.69#ibcon#read 6, iclass 17, count 2 2006.230.00:19:21.69#ibcon#end of sib2, iclass 17, count 2 2006.230.00:19:21.69#ibcon#*mode == 0, iclass 17, count 2 2006.230.00:19:21.69#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.230.00:19:21.69#ibcon#[25=AT08-06\r\n] 2006.230.00:19:21.69#ibcon#*before write, iclass 17, count 2 2006.230.00:19:21.69#ibcon#enter sib2, iclass 17, count 2 2006.230.00:19:21.69#ibcon#flushed, iclass 17, count 2 2006.230.00:19:21.69#ibcon#about to write, iclass 17, count 2 2006.230.00:19:21.69#ibcon#wrote, iclass 17, count 2 2006.230.00:19:21.69#ibcon#about to read 3, iclass 17, count 2 2006.230.00:19:21.72#ibcon#read 3, iclass 17, count 2 2006.230.00:19:21.72#ibcon#about to read 4, iclass 17, count 2 2006.230.00:19:21.72#ibcon#read 4, iclass 17, count 2 2006.230.00:19:21.72#ibcon#about to read 5, iclass 17, count 2 2006.230.00:19:21.72#ibcon#read 5, iclass 17, count 2 2006.230.00:19:21.72#ibcon#about to read 6, iclass 17, count 2 2006.230.00:19:21.72#ibcon#read 6, iclass 17, count 2 2006.230.00:19:21.72#ibcon#end of sib2, iclass 17, count 2 2006.230.00:19:21.72#ibcon#*after write, iclass 17, count 2 2006.230.00:19:21.72#ibcon#*before return 0, iclass 17, count 2 2006.230.00:19:21.72#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:19:21.72#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:19:21.72#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.230.00:19:21.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:21.72#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:19:21.84#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:19:21.84#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:19:21.84#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:19:21.84#ibcon#first serial, iclass 17, count 0 2006.230.00:19:21.84#ibcon#enter sib2, iclass 17, count 0 2006.230.00:19:21.84#ibcon#flushed, iclass 17, count 0 2006.230.00:19:21.84#ibcon#about to write, iclass 17, count 0 2006.230.00:19:21.84#ibcon#wrote, iclass 17, count 0 2006.230.00:19:21.84#ibcon#about to read 3, iclass 17, count 0 2006.230.00:19:21.86#ibcon#read 3, iclass 17, count 0 2006.230.00:19:21.86#ibcon#about to read 4, iclass 17, count 0 2006.230.00:19:21.86#ibcon#read 4, iclass 17, count 0 2006.230.00:19:21.86#ibcon#about to read 5, iclass 17, count 0 2006.230.00:19:21.86#ibcon#read 5, iclass 17, count 0 2006.230.00:19:21.86#ibcon#about to read 6, iclass 17, count 0 2006.230.00:19:21.86#ibcon#read 6, iclass 17, count 0 2006.230.00:19:21.86#ibcon#end of sib2, iclass 17, count 0 2006.230.00:19:21.86#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:19:21.86#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:19:21.86#ibcon#[25=USB\r\n] 2006.230.00:19:21.86#ibcon#*before write, iclass 17, count 0 2006.230.00:19:21.86#ibcon#enter sib2, iclass 17, count 0 2006.230.00:19:21.86#ibcon#flushed, iclass 17, count 0 2006.230.00:19:21.86#ibcon#about to write, iclass 17, count 0 2006.230.00:19:21.86#ibcon#wrote, iclass 17, count 0 2006.230.00:19:21.86#ibcon#about to read 3, iclass 17, count 0 2006.230.00:19:21.89#ibcon#read 3, iclass 17, count 0 2006.230.00:19:21.89#ibcon#about to read 4, iclass 17, count 0 2006.230.00:19:21.89#ibcon#read 4, iclass 17, count 0 2006.230.00:19:21.89#ibcon#about to read 5, iclass 17, count 0 2006.230.00:19:21.89#ibcon#read 5, iclass 17, count 0 2006.230.00:19:21.89#ibcon#about to read 6, iclass 17, count 0 2006.230.00:19:21.89#ibcon#read 6, iclass 17, count 0 2006.230.00:19:21.89#ibcon#end of sib2, iclass 17, count 0 2006.230.00:19:21.89#ibcon#*after write, iclass 17, count 0 2006.230.00:19:21.89#ibcon#*before return 0, iclass 17, count 0 2006.230.00:19:21.89#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:19:21.89#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:19:21.89#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:19:21.89#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:19:21.89$vck44/vblo=1,629.99 2006.230.00:19:21.89#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.00:19:21.89#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.00:19:21.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:21.89#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:19:21.89#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:19:21.89#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:19:21.89#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:19:21.89#ibcon#first serial, iclass 19, count 0 2006.230.00:19:21.89#ibcon#enter sib2, iclass 19, count 0 2006.230.00:19:21.89#ibcon#flushed, iclass 19, count 0 2006.230.00:19:21.89#ibcon#about to write, iclass 19, count 0 2006.230.00:19:21.89#ibcon#wrote, iclass 19, count 0 2006.230.00:19:21.89#ibcon#about to read 3, iclass 19, count 0 2006.230.00:19:21.91#ibcon#read 3, iclass 19, count 0 2006.230.00:19:21.91#ibcon#about to read 4, iclass 19, count 0 2006.230.00:19:21.91#ibcon#read 4, iclass 19, count 0 2006.230.00:19:21.91#ibcon#about to read 5, iclass 19, count 0 2006.230.00:19:21.91#ibcon#read 5, iclass 19, count 0 2006.230.00:19:21.91#ibcon#about to read 6, iclass 19, count 0 2006.230.00:19:21.91#ibcon#read 6, iclass 19, count 0 2006.230.00:19:21.91#ibcon#end of sib2, iclass 19, count 0 2006.230.00:19:21.91#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:19:21.91#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:19:21.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:19:21.91#ibcon#*before write, iclass 19, count 0 2006.230.00:19:21.91#ibcon#enter sib2, iclass 19, count 0 2006.230.00:19:21.91#ibcon#flushed, iclass 19, count 0 2006.230.00:19:21.91#ibcon#about to write, iclass 19, count 0 2006.230.00:19:21.91#ibcon#wrote, iclass 19, count 0 2006.230.00:19:21.91#ibcon#about to read 3, iclass 19, count 0 2006.230.00:19:21.95#ibcon#read 3, iclass 19, count 0 2006.230.00:19:21.95#ibcon#about to read 4, iclass 19, count 0 2006.230.00:19:21.95#ibcon#read 4, iclass 19, count 0 2006.230.00:19:21.95#ibcon#about to read 5, iclass 19, count 0 2006.230.00:19:21.95#ibcon#read 5, iclass 19, count 0 2006.230.00:19:21.95#ibcon#about to read 6, iclass 19, count 0 2006.230.00:19:21.95#ibcon#read 6, iclass 19, count 0 2006.230.00:19:21.95#ibcon#end of sib2, iclass 19, count 0 2006.230.00:19:21.95#ibcon#*after write, iclass 19, count 0 2006.230.00:19:21.95#ibcon#*before return 0, iclass 19, count 0 2006.230.00:19:21.95#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:19:21.95#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:19:21.95#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:19:21.95#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:19:21.95$vck44/vb=1,4 2006.230.00:19:21.95#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.230.00:19:21.95#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.230.00:19:21.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:21.95#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:19:21.95#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:19:21.95#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:19:21.95#ibcon#enter wrdev, iclass 21, count 2 2006.230.00:19:21.95#ibcon#first serial, iclass 21, count 2 2006.230.00:19:21.95#ibcon#enter sib2, iclass 21, count 2 2006.230.00:19:21.95#ibcon#flushed, iclass 21, count 2 2006.230.00:19:21.95#ibcon#about to write, iclass 21, count 2 2006.230.00:19:21.95#ibcon#wrote, iclass 21, count 2 2006.230.00:19:21.95#ibcon#about to read 3, iclass 21, count 2 2006.230.00:19:21.97#ibcon#read 3, iclass 21, count 2 2006.230.00:19:21.97#ibcon#about to read 4, iclass 21, count 2 2006.230.00:19:21.97#ibcon#read 4, iclass 21, count 2 2006.230.00:19:21.97#ibcon#about to read 5, iclass 21, count 2 2006.230.00:19:21.97#ibcon#read 5, iclass 21, count 2 2006.230.00:19:21.97#ibcon#about to read 6, iclass 21, count 2 2006.230.00:19:21.97#ibcon#read 6, iclass 21, count 2 2006.230.00:19:21.97#ibcon#end of sib2, iclass 21, count 2 2006.230.00:19:21.97#ibcon#*mode == 0, iclass 21, count 2 2006.230.00:19:21.97#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.230.00:19:21.97#ibcon#[27=AT01-04\r\n] 2006.230.00:19:21.97#ibcon#*before write, iclass 21, count 2 2006.230.00:19:21.97#ibcon#enter sib2, iclass 21, count 2 2006.230.00:19:21.97#ibcon#flushed, iclass 21, count 2 2006.230.00:19:21.97#ibcon#about to write, iclass 21, count 2 2006.230.00:19:21.97#ibcon#wrote, iclass 21, count 2 2006.230.00:19:21.97#ibcon#about to read 3, iclass 21, count 2 2006.230.00:19:22.00#ibcon#read 3, iclass 21, count 2 2006.230.00:19:22.00#ibcon#about to read 4, iclass 21, count 2 2006.230.00:19:22.00#ibcon#read 4, iclass 21, count 2 2006.230.00:19:22.00#ibcon#about to read 5, iclass 21, count 2 2006.230.00:19:22.00#ibcon#read 5, iclass 21, count 2 2006.230.00:19:22.00#ibcon#about to read 6, iclass 21, count 2 2006.230.00:19:22.00#ibcon#read 6, iclass 21, count 2 2006.230.00:19:22.00#ibcon#end of sib2, iclass 21, count 2 2006.230.00:19:22.00#ibcon#*after write, iclass 21, count 2 2006.230.00:19:22.00#ibcon#*before return 0, iclass 21, count 2 2006.230.00:19:22.00#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:19:22.00#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:19:22.00#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.230.00:19:22.00#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:22.00#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:19:22.12#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:19:22.12#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:19:22.12#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:19:22.12#ibcon#first serial, iclass 21, count 0 2006.230.00:19:22.12#ibcon#enter sib2, iclass 21, count 0 2006.230.00:19:22.12#ibcon#flushed, iclass 21, count 0 2006.230.00:19:22.12#ibcon#about to write, iclass 21, count 0 2006.230.00:19:22.12#ibcon#wrote, iclass 21, count 0 2006.230.00:19:22.12#ibcon#about to read 3, iclass 21, count 0 2006.230.00:19:22.14#ibcon#read 3, iclass 21, count 0 2006.230.00:19:22.14#ibcon#about to read 4, iclass 21, count 0 2006.230.00:19:22.14#ibcon#read 4, iclass 21, count 0 2006.230.00:19:22.14#ibcon#about to read 5, iclass 21, count 0 2006.230.00:19:22.14#ibcon#read 5, iclass 21, count 0 2006.230.00:19:22.14#ibcon#about to read 6, iclass 21, count 0 2006.230.00:19:22.14#ibcon#read 6, iclass 21, count 0 2006.230.00:19:22.14#ibcon#end of sib2, iclass 21, count 0 2006.230.00:19:22.14#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:19:22.14#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:19:22.14#ibcon#[27=USB\r\n] 2006.230.00:19:22.14#ibcon#*before write, iclass 21, count 0 2006.230.00:19:22.14#ibcon#enter sib2, iclass 21, count 0 2006.230.00:19:22.14#ibcon#flushed, iclass 21, count 0 2006.230.00:19:22.14#ibcon#about to write, iclass 21, count 0 2006.230.00:19:22.14#ibcon#wrote, iclass 21, count 0 2006.230.00:19:22.14#ibcon#about to read 3, iclass 21, count 0 2006.230.00:19:22.17#ibcon#read 3, iclass 21, count 0 2006.230.00:19:22.17#ibcon#about to read 4, iclass 21, count 0 2006.230.00:19:22.17#ibcon#read 4, iclass 21, count 0 2006.230.00:19:22.17#ibcon#about to read 5, iclass 21, count 0 2006.230.00:19:22.17#ibcon#read 5, iclass 21, count 0 2006.230.00:19:22.17#ibcon#about to read 6, iclass 21, count 0 2006.230.00:19:22.17#ibcon#read 6, iclass 21, count 0 2006.230.00:19:22.17#ibcon#end of sib2, iclass 21, count 0 2006.230.00:19:22.17#ibcon#*after write, iclass 21, count 0 2006.230.00:19:22.17#ibcon#*before return 0, iclass 21, count 0 2006.230.00:19:22.17#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:19:22.17#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:19:22.17#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:19:22.17#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:19:22.17$vck44/vblo=2,634.99 2006.230.00:19:22.17#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.00:19:22.17#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.00:19:22.17#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:22.17#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:22.17#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:22.17#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:22.17#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:19:22.17#ibcon#first serial, iclass 23, count 0 2006.230.00:19:22.17#ibcon#enter sib2, iclass 23, count 0 2006.230.00:19:22.17#ibcon#flushed, iclass 23, count 0 2006.230.00:19:22.17#ibcon#about to write, iclass 23, count 0 2006.230.00:19:22.17#ibcon#wrote, iclass 23, count 0 2006.230.00:19:22.17#ibcon#about to read 3, iclass 23, count 0 2006.230.00:19:22.19#ibcon#read 3, iclass 23, count 0 2006.230.00:19:22.19#ibcon#about to read 4, iclass 23, count 0 2006.230.00:19:22.19#ibcon#read 4, iclass 23, count 0 2006.230.00:19:22.19#ibcon#about to read 5, iclass 23, count 0 2006.230.00:19:22.19#ibcon#read 5, iclass 23, count 0 2006.230.00:19:22.19#ibcon#about to read 6, iclass 23, count 0 2006.230.00:19:22.19#ibcon#read 6, iclass 23, count 0 2006.230.00:19:22.19#ibcon#end of sib2, iclass 23, count 0 2006.230.00:19:22.19#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:19:22.19#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:19:22.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:19:22.19#ibcon#*before write, iclass 23, count 0 2006.230.00:19:22.19#ibcon#enter sib2, iclass 23, count 0 2006.230.00:19:22.19#ibcon#flushed, iclass 23, count 0 2006.230.00:19:22.19#ibcon#about to write, iclass 23, count 0 2006.230.00:19:22.19#ibcon#wrote, iclass 23, count 0 2006.230.00:19:22.19#ibcon#about to read 3, iclass 23, count 0 2006.230.00:19:22.23#ibcon#read 3, iclass 23, count 0 2006.230.00:19:22.23#ibcon#about to read 4, iclass 23, count 0 2006.230.00:19:22.23#ibcon#read 4, iclass 23, count 0 2006.230.00:19:22.23#ibcon#about to read 5, iclass 23, count 0 2006.230.00:19:22.23#ibcon#read 5, iclass 23, count 0 2006.230.00:19:22.23#ibcon#about to read 6, iclass 23, count 0 2006.230.00:19:22.23#ibcon#read 6, iclass 23, count 0 2006.230.00:19:22.23#ibcon#end of sib2, iclass 23, count 0 2006.230.00:19:22.23#ibcon#*after write, iclass 23, count 0 2006.230.00:19:22.23#ibcon#*before return 0, iclass 23, count 0 2006.230.00:19:22.23#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:22.23#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:19:22.23#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:19:22.23#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:19:22.23$vck44/vb=2,4 2006.230.00:19:22.23#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.00:19:22.23#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.00:19:22.23#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:22.23#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:22.29#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:22.29#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:22.29#ibcon#enter wrdev, iclass 25, count 2 2006.230.00:19:22.29#ibcon#first serial, iclass 25, count 2 2006.230.00:19:22.29#ibcon#enter sib2, iclass 25, count 2 2006.230.00:19:22.29#ibcon#flushed, iclass 25, count 2 2006.230.00:19:22.29#ibcon#about to write, iclass 25, count 2 2006.230.00:19:22.29#ibcon#wrote, iclass 25, count 2 2006.230.00:19:22.29#ibcon#about to read 3, iclass 25, count 2 2006.230.00:19:22.31#ibcon#read 3, iclass 25, count 2 2006.230.00:19:22.31#ibcon#about to read 4, iclass 25, count 2 2006.230.00:19:22.31#ibcon#read 4, iclass 25, count 2 2006.230.00:19:22.31#ibcon#about to read 5, iclass 25, count 2 2006.230.00:19:22.31#ibcon#read 5, iclass 25, count 2 2006.230.00:19:22.31#ibcon#about to read 6, iclass 25, count 2 2006.230.00:19:22.31#ibcon#read 6, iclass 25, count 2 2006.230.00:19:22.31#ibcon#end of sib2, iclass 25, count 2 2006.230.00:19:22.31#ibcon#*mode == 0, iclass 25, count 2 2006.230.00:19:22.31#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.00:19:22.31#ibcon#[27=AT02-04\r\n] 2006.230.00:19:22.31#ibcon#*before write, iclass 25, count 2 2006.230.00:19:22.31#ibcon#enter sib2, iclass 25, count 2 2006.230.00:19:22.31#ibcon#flushed, iclass 25, count 2 2006.230.00:19:22.31#ibcon#about to write, iclass 25, count 2 2006.230.00:19:22.31#ibcon#wrote, iclass 25, count 2 2006.230.00:19:22.31#ibcon#about to read 3, iclass 25, count 2 2006.230.00:19:22.34#ibcon#read 3, iclass 25, count 2 2006.230.00:19:22.34#ibcon#about to read 4, iclass 25, count 2 2006.230.00:19:22.34#ibcon#read 4, iclass 25, count 2 2006.230.00:19:22.34#ibcon#about to read 5, iclass 25, count 2 2006.230.00:19:22.34#ibcon#read 5, iclass 25, count 2 2006.230.00:19:22.34#ibcon#about to read 6, iclass 25, count 2 2006.230.00:19:22.34#ibcon#read 6, iclass 25, count 2 2006.230.00:19:22.34#ibcon#end of sib2, iclass 25, count 2 2006.230.00:19:22.34#ibcon#*after write, iclass 25, count 2 2006.230.00:19:22.34#ibcon#*before return 0, iclass 25, count 2 2006.230.00:19:22.34#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:22.34#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:19:22.34#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.00:19:22.34#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:22.34#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:22.46#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:22.46#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:22.46#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:19:22.46#ibcon#first serial, iclass 25, count 0 2006.230.00:19:22.46#ibcon#enter sib2, iclass 25, count 0 2006.230.00:19:22.46#ibcon#flushed, iclass 25, count 0 2006.230.00:19:22.46#ibcon#about to write, iclass 25, count 0 2006.230.00:19:22.46#ibcon#wrote, iclass 25, count 0 2006.230.00:19:22.46#ibcon#about to read 3, iclass 25, count 0 2006.230.00:19:22.48#ibcon#read 3, iclass 25, count 0 2006.230.00:19:22.48#ibcon#about to read 4, iclass 25, count 0 2006.230.00:19:22.48#ibcon#read 4, iclass 25, count 0 2006.230.00:19:22.48#ibcon#about to read 5, iclass 25, count 0 2006.230.00:19:22.48#ibcon#read 5, iclass 25, count 0 2006.230.00:19:22.48#ibcon#about to read 6, iclass 25, count 0 2006.230.00:19:22.48#ibcon#read 6, iclass 25, count 0 2006.230.00:19:22.48#ibcon#end of sib2, iclass 25, count 0 2006.230.00:19:22.48#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:19:22.48#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:19:22.48#ibcon#[27=USB\r\n] 2006.230.00:19:22.48#ibcon#*before write, iclass 25, count 0 2006.230.00:19:22.48#ibcon#enter sib2, iclass 25, count 0 2006.230.00:19:22.48#ibcon#flushed, iclass 25, count 0 2006.230.00:19:22.48#ibcon#about to write, iclass 25, count 0 2006.230.00:19:22.48#ibcon#wrote, iclass 25, count 0 2006.230.00:19:22.48#ibcon#about to read 3, iclass 25, count 0 2006.230.00:19:22.51#ibcon#read 3, iclass 25, count 0 2006.230.00:19:22.51#ibcon#about to read 4, iclass 25, count 0 2006.230.00:19:22.51#ibcon#read 4, iclass 25, count 0 2006.230.00:19:22.51#ibcon#about to read 5, iclass 25, count 0 2006.230.00:19:22.51#ibcon#read 5, iclass 25, count 0 2006.230.00:19:22.51#ibcon#about to read 6, iclass 25, count 0 2006.230.00:19:22.51#ibcon#read 6, iclass 25, count 0 2006.230.00:19:22.51#ibcon#end of sib2, iclass 25, count 0 2006.230.00:19:22.51#ibcon#*after write, iclass 25, count 0 2006.230.00:19:22.51#ibcon#*before return 0, iclass 25, count 0 2006.230.00:19:22.51#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:22.51#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:19:22.51#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:19:22.51#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:19:22.51$vck44/vblo=3,649.99 2006.230.00:19:22.51#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.00:19:22.51#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.00:19:22.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:22.51#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:22.51#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:22.51#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:22.51#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:19:22.51#ibcon#first serial, iclass 27, count 0 2006.230.00:19:22.51#ibcon#enter sib2, iclass 27, count 0 2006.230.00:19:22.51#ibcon#flushed, iclass 27, count 0 2006.230.00:19:22.51#ibcon#about to write, iclass 27, count 0 2006.230.00:19:22.51#ibcon#wrote, iclass 27, count 0 2006.230.00:19:22.51#ibcon#about to read 3, iclass 27, count 0 2006.230.00:19:22.53#ibcon#read 3, iclass 27, count 0 2006.230.00:19:22.53#ibcon#about to read 4, iclass 27, count 0 2006.230.00:19:22.53#ibcon#read 4, iclass 27, count 0 2006.230.00:19:22.53#ibcon#about to read 5, iclass 27, count 0 2006.230.00:19:22.53#ibcon#read 5, iclass 27, count 0 2006.230.00:19:22.53#ibcon#about to read 6, iclass 27, count 0 2006.230.00:19:22.53#ibcon#read 6, iclass 27, count 0 2006.230.00:19:22.53#ibcon#end of sib2, iclass 27, count 0 2006.230.00:19:22.53#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:19:22.53#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:19:22.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:19:22.53#ibcon#*before write, iclass 27, count 0 2006.230.00:19:22.53#ibcon#enter sib2, iclass 27, count 0 2006.230.00:19:22.53#ibcon#flushed, iclass 27, count 0 2006.230.00:19:22.53#ibcon#about to write, iclass 27, count 0 2006.230.00:19:22.53#ibcon#wrote, iclass 27, count 0 2006.230.00:19:22.53#ibcon#about to read 3, iclass 27, count 0 2006.230.00:19:22.57#ibcon#read 3, iclass 27, count 0 2006.230.00:19:22.57#ibcon#about to read 4, iclass 27, count 0 2006.230.00:19:22.57#ibcon#read 4, iclass 27, count 0 2006.230.00:19:22.57#ibcon#about to read 5, iclass 27, count 0 2006.230.00:19:22.57#ibcon#read 5, iclass 27, count 0 2006.230.00:19:22.57#ibcon#about to read 6, iclass 27, count 0 2006.230.00:19:22.57#ibcon#read 6, iclass 27, count 0 2006.230.00:19:22.57#ibcon#end of sib2, iclass 27, count 0 2006.230.00:19:22.57#ibcon#*after write, iclass 27, count 0 2006.230.00:19:22.57#ibcon#*before return 0, iclass 27, count 0 2006.230.00:19:22.57#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:22.57#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:19:22.57#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:19:22.57#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:19:22.57$vck44/vb=3,4 2006.230.00:19:22.57#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.00:19:22.57#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.00:19:22.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:22.57#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:22.63#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:22.63#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:22.63#ibcon#enter wrdev, iclass 29, count 2 2006.230.00:19:22.63#ibcon#first serial, iclass 29, count 2 2006.230.00:19:22.63#ibcon#enter sib2, iclass 29, count 2 2006.230.00:19:22.63#ibcon#flushed, iclass 29, count 2 2006.230.00:19:22.63#ibcon#about to write, iclass 29, count 2 2006.230.00:19:22.63#ibcon#wrote, iclass 29, count 2 2006.230.00:19:22.63#ibcon#about to read 3, iclass 29, count 2 2006.230.00:19:22.65#ibcon#read 3, iclass 29, count 2 2006.230.00:19:22.65#ibcon#about to read 4, iclass 29, count 2 2006.230.00:19:22.65#ibcon#read 4, iclass 29, count 2 2006.230.00:19:22.65#ibcon#about to read 5, iclass 29, count 2 2006.230.00:19:22.65#ibcon#read 5, iclass 29, count 2 2006.230.00:19:22.65#ibcon#about to read 6, iclass 29, count 2 2006.230.00:19:22.65#ibcon#read 6, iclass 29, count 2 2006.230.00:19:22.65#ibcon#end of sib2, iclass 29, count 2 2006.230.00:19:22.65#ibcon#*mode == 0, iclass 29, count 2 2006.230.00:19:22.65#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.00:19:22.65#ibcon#[27=AT03-04\r\n] 2006.230.00:19:22.65#ibcon#*before write, iclass 29, count 2 2006.230.00:19:22.65#ibcon#enter sib2, iclass 29, count 2 2006.230.00:19:22.65#ibcon#flushed, iclass 29, count 2 2006.230.00:19:22.65#ibcon#about to write, iclass 29, count 2 2006.230.00:19:22.65#ibcon#wrote, iclass 29, count 2 2006.230.00:19:22.65#ibcon#about to read 3, iclass 29, count 2 2006.230.00:19:22.68#ibcon#read 3, iclass 29, count 2 2006.230.00:19:22.68#ibcon#about to read 4, iclass 29, count 2 2006.230.00:19:22.68#ibcon#read 4, iclass 29, count 2 2006.230.00:19:22.68#ibcon#about to read 5, iclass 29, count 2 2006.230.00:19:22.68#ibcon#read 5, iclass 29, count 2 2006.230.00:19:22.68#ibcon#about to read 6, iclass 29, count 2 2006.230.00:19:22.68#ibcon#read 6, iclass 29, count 2 2006.230.00:19:22.68#ibcon#end of sib2, iclass 29, count 2 2006.230.00:19:22.68#ibcon#*after write, iclass 29, count 2 2006.230.00:19:22.68#ibcon#*before return 0, iclass 29, count 2 2006.230.00:19:22.68#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:22.68#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:19:22.68#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.00:19:22.68#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:22.68#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:22.80#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:22.80#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:22.80#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:19:22.80#ibcon#first serial, iclass 29, count 0 2006.230.00:19:22.80#ibcon#enter sib2, iclass 29, count 0 2006.230.00:19:22.80#ibcon#flushed, iclass 29, count 0 2006.230.00:19:22.80#ibcon#about to write, iclass 29, count 0 2006.230.00:19:22.80#ibcon#wrote, iclass 29, count 0 2006.230.00:19:22.80#ibcon#about to read 3, iclass 29, count 0 2006.230.00:19:22.82#ibcon#read 3, iclass 29, count 0 2006.230.00:19:22.82#ibcon#about to read 4, iclass 29, count 0 2006.230.00:19:22.82#ibcon#read 4, iclass 29, count 0 2006.230.00:19:22.82#ibcon#about to read 5, iclass 29, count 0 2006.230.00:19:22.82#ibcon#read 5, iclass 29, count 0 2006.230.00:19:22.82#ibcon#about to read 6, iclass 29, count 0 2006.230.00:19:22.82#ibcon#read 6, iclass 29, count 0 2006.230.00:19:22.82#ibcon#end of sib2, iclass 29, count 0 2006.230.00:19:22.82#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:19:22.82#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:19:22.82#ibcon#[27=USB\r\n] 2006.230.00:19:22.82#ibcon#*before write, iclass 29, count 0 2006.230.00:19:22.82#ibcon#enter sib2, iclass 29, count 0 2006.230.00:19:22.82#ibcon#flushed, iclass 29, count 0 2006.230.00:19:22.82#ibcon#about to write, iclass 29, count 0 2006.230.00:19:22.82#ibcon#wrote, iclass 29, count 0 2006.230.00:19:22.82#ibcon#about to read 3, iclass 29, count 0 2006.230.00:19:22.85#ibcon#read 3, iclass 29, count 0 2006.230.00:19:22.85#ibcon#about to read 4, iclass 29, count 0 2006.230.00:19:22.85#ibcon#read 4, iclass 29, count 0 2006.230.00:19:22.85#ibcon#about to read 5, iclass 29, count 0 2006.230.00:19:22.85#ibcon#read 5, iclass 29, count 0 2006.230.00:19:22.85#ibcon#about to read 6, iclass 29, count 0 2006.230.00:19:22.85#ibcon#read 6, iclass 29, count 0 2006.230.00:19:22.85#ibcon#end of sib2, iclass 29, count 0 2006.230.00:19:22.85#ibcon#*after write, iclass 29, count 0 2006.230.00:19:22.85#ibcon#*before return 0, iclass 29, count 0 2006.230.00:19:22.85#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:22.85#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:19:22.85#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:19:22.85#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:19:22.85$vck44/vblo=4,679.99 2006.230.00:19:22.85#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.00:19:22.85#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.00:19:22.85#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:22.85#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:22.85#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:22.85#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:22.85#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:19:22.85#ibcon#first serial, iclass 31, count 0 2006.230.00:19:22.85#ibcon#enter sib2, iclass 31, count 0 2006.230.00:19:22.85#ibcon#flushed, iclass 31, count 0 2006.230.00:19:22.85#ibcon#about to write, iclass 31, count 0 2006.230.00:19:22.85#ibcon#wrote, iclass 31, count 0 2006.230.00:19:22.85#ibcon#about to read 3, iclass 31, count 0 2006.230.00:19:22.87#ibcon#read 3, iclass 31, count 0 2006.230.00:19:22.87#ibcon#about to read 4, iclass 31, count 0 2006.230.00:19:22.87#ibcon#read 4, iclass 31, count 0 2006.230.00:19:22.87#ibcon#about to read 5, iclass 31, count 0 2006.230.00:19:22.87#ibcon#read 5, iclass 31, count 0 2006.230.00:19:22.87#ibcon#about to read 6, iclass 31, count 0 2006.230.00:19:22.87#ibcon#read 6, iclass 31, count 0 2006.230.00:19:22.87#ibcon#end of sib2, iclass 31, count 0 2006.230.00:19:22.87#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:19:22.87#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:19:22.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:19:22.87#ibcon#*before write, iclass 31, count 0 2006.230.00:19:22.87#ibcon#enter sib2, iclass 31, count 0 2006.230.00:19:22.87#ibcon#flushed, iclass 31, count 0 2006.230.00:19:22.87#ibcon#about to write, iclass 31, count 0 2006.230.00:19:22.87#ibcon#wrote, iclass 31, count 0 2006.230.00:19:22.87#ibcon#about to read 3, iclass 31, count 0 2006.230.00:19:22.91#ibcon#read 3, iclass 31, count 0 2006.230.00:19:22.91#ibcon#about to read 4, iclass 31, count 0 2006.230.00:19:22.91#ibcon#read 4, iclass 31, count 0 2006.230.00:19:22.91#ibcon#about to read 5, iclass 31, count 0 2006.230.00:19:22.91#ibcon#read 5, iclass 31, count 0 2006.230.00:19:22.91#ibcon#about to read 6, iclass 31, count 0 2006.230.00:19:22.91#ibcon#read 6, iclass 31, count 0 2006.230.00:19:22.91#ibcon#end of sib2, iclass 31, count 0 2006.230.00:19:22.91#ibcon#*after write, iclass 31, count 0 2006.230.00:19:22.91#ibcon#*before return 0, iclass 31, count 0 2006.230.00:19:22.91#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:22.91#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:19:22.91#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:19:22.91#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:19:22.91$vck44/vb=4,4 2006.230.00:19:22.91#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.00:19:22.91#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.00:19:22.91#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:22.91#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:22.97#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:22.97#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:22.97#ibcon#enter wrdev, iclass 33, count 2 2006.230.00:19:22.97#ibcon#first serial, iclass 33, count 2 2006.230.00:19:22.97#ibcon#enter sib2, iclass 33, count 2 2006.230.00:19:22.97#ibcon#flushed, iclass 33, count 2 2006.230.00:19:22.97#ibcon#about to write, iclass 33, count 2 2006.230.00:19:22.97#ibcon#wrote, iclass 33, count 2 2006.230.00:19:22.97#ibcon#about to read 3, iclass 33, count 2 2006.230.00:19:22.99#ibcon#read 3, iclass 33, count 2 2006.230.00:19:22.99#ibcon#about to read 4, iclass 33, count 2 2006.230.00:19:22.99#ibcon#read 4, iclass 33, count 2 2006.230.00:19:22.99#ibcon#about to read 5, iclass 33, count 2 2006.230.00:19:22.99#ibcon#read 5, iclass 33, count 2 2006.230.00:19:22.99#ibcon#about to read 6, iclass 33, count 2 2006.230.00:19:22.99#ibcon#read 6, iclass 33, count 2 2006.230.00:19:22.99#ibcon#end of sib2, iclass 33, count 2 2006.230.00:19:22.99#ibcon#*mode == 0, iclass 33, count 2 2006.230.00:19:22.99#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.00:19:22.99#ibcon#[27=AT04-04\r\n] 2006.230.00:19:22.99#ibcon#*before write, iclass 33, count 2 2006.230.00:19:22.99#ibcon#enter sib2, iclass 33, count 2 2006.230.00:19:22.99#ibcon#flushed, iclass 33, count 2 2006.230.00:19:22.99#ibcon#about to write, iclass 33, count 2 2006.230.00:19:22.99#ibcon#wrote, iclass 33, count 2 2006.230.00:19:22.99#ibcon#about to read 3, iclass 33, count 2 2006.230.00:19:23.02#ibcon#read 3, iclass 33, count 2 2006.230.00:19:23.02#ibcon#about to read 4, iclass 33, count 2 2006.230.00:19:23.02#ibcon#read 4, iclass 33, count 2 2006.230.00:19:23.02#ibcon#about to read 5, iclass 33, count 2 2006.230.00:19:23.02#ibcon#read 5, iclass 33, count 2 2006.230.00:19:23.02#ibcon#about to read 6, iclass 33, count 2 2006.230.00:19:23.02#ibcon#read 6, iclass 33, count 2 2006.230.00:19:23.02#ibcon#end of sib2, iclass 33, count 2 2006.230.00:19:23.02#ibcon#*after write, iclass 33, count 2 2006.230.00:19:23.02#ibcon#*before return 0, iclass 33, count 2 2006.230.00:19:23.02#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:23.02#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:19:23.02#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.00:19:23.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:23.02#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:23.14#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:23.14#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:23.14#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:19:23.14#ibcon#first serial, iclass 33, count 0 2006.230.00:19:23.14#ibcon#enter sib2, iclass 33, count 0 2006.230.00:19:23.14#ibcon#flushed, iclass 33, count 0 2006.230.00:19:23.14#ibcon#about to write, iclass 33, count 0 2006.230.00:19:23.14#ibcon#wrote, iclass 33, count 0 2006.230.00:19:23.14#ibcon#about to read 3, iclass 33, count 0 2006.230.00:19:23.16#ibcon#read 3, iclass 33, count 0 2006.230.00:19:23.16#ibcon#about to read 4, iclass 33, count 0 2006.230.00:19:23.16#ibcon#read 4, iclass 33, count 0 2006.230.00:19:23.16#ibcon#about to read 5, iclass 33, count 0 2006.230.00:19:23.16#ibcon#read 5, iclass 33, count 0 2006.230.00:19:23.16#ibcon#about to read 6, iclass 33, count 0 2006.230.00:19:23.16#ibcon#read 6, iclass 33, count 0 2006.230.00:19:23.16#ibcon#end of sib2, iclass 33, count 0 2006.230.00:19:23.16#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:19:23.16#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:19:23.16#ibcon#[27=USB\r\n] 2006.230.00:19:23.16#ibcon#*before write, iclass 33, count 0 2006.230.00:19:23.16#ibcon#enter sib2, iclass 33, count 0 2006.230.00:19:23.16#ibcon#flushed, iclass 33, count 0 2006.230.00:19:23.16#ibcon#about to write, iclass 33, count 0 2006.230.00:19:23.16#ibcon#wrote, iclass 33, count 0 2006.230.00:19:23.16#ibcon#about to read 3, iclass 33, count 0 2006.230.00:19:23.19#ibcon#read 3, iclass 33, count 0 2006.230.00:19:23.19#ibcon#about to read 4, iclass 33, count 0 2006.230.00:19:23.19#ibcon#read 4, iclass 33, count 0 2006.230.00:19:23.19#ibcon#about to read 5, iclass 33, count 0 2006.230.00:19:23.19#ibcon#read 5, iclass 33, count 0 2006.230.00:19:23.19#ibcon#about to read 6, iclass 33, count 0 2006.230.00:19:23.19#ibcon#read 6, iclass 33, count 0 2006.230.00:19:23.19#ibcon#end of sib2, iclass 33, count 0 2006.230.00:19:23.19#ibcon#*after write, iclass 33, count 0 2006.230.00:19:23.19#ibcon#*before return 0, iclass 33, count 0 2006.230.00:19:23.19#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:23.19#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:19:23.19#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:19:23.19#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:19:23.19$vck44/vblo=5,709.99 2006.230.00:19:23.19#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.00:19:23.19#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.00:19:23.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:23.19#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:23.19#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:23.19#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:23.19#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:19:23.19#ibcon#first serial, iclass 35, count 0 2006.230.00:19:23.19#ibcon#enter sib2, iclass 35, count 0 2006.230.00:19:23.19#ibcon#flushed, iclass 35, count 0 2006.230.00:19:23.19#ibcon#about to write, iclass 35, count 0 2006.230.00:19:23.19#ibcon#wrote, iclass 35, count 0 2006.230.00:19:23.19#ibcon#about to read 3, iclass 35, count 0 2006.230.00:19:23.21#ibcon#read 3, iclass 35, count 0 2006.230.00:19:23.21#ibcon#about to read 4, iclass 35, count 0 2006.230.00:19:23.21#ibcon#read 4, iclass 35, count 0 2006.230.00:19:23.21#ibcon#about to read 5, iclass 35, count 0 2006.230.00:19:23.21#ibcon#read 5, iclass 35, count 0 2006.230.00:19:23.21#ibcon#about to read 6, iclass 35, count 0 2006.230.00:19:23.21#ibcon#read 6, iclass 35, count 0 2006.230.00:19:23.21#ibcon#end of sib2, iclass 35, count 0 2006.230.00:19:23.21#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:19:23.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:19:23.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:19:23.21#ibcon#*before write, iclass 35, count 0 2006.230.00:19:23.21#ibcon#enter sib2, iclass 35, count 0 2006.230.00:19:23.21#ibcon#flushed, iclass 35, count 0 2006.230.00:19:23.21#ibcon#about to write, iclass 35, count 0 2006.230.00:19:23.21#ibcon#wrote, iclass 35, count 0 2006.230.00:19:23.21#ibcon#about to read 3, iclass 35, count 0 2006.230.00:19:23.25#ibcon#read 3, iclass 35, count 0 2006.230.00:19:23.25#ibcon#about to read 4, iclass 35, count 0 2006.230.00:19:23.25#ibcon#read 4, iclass 35, count 0 2006.230.00:19:23.25#ibcon#about to read 5, iclass 35, count 0 2006.230.00:19:23.25#ibcon#read 5, iclass 35, count 0 2006.230.00:19:23.25#ibcon#about to read 6, iclass 35, count 0 2006.230.00:19:23.25#ibcon#read 6, iclass 35, count 0 2006.230.00:19:23.25#ibcon#end of sib2, iclass 35, count 0 2006.230.00:19:23.25#ibcon#*after write, iclass 35, count 0 2006.230.00:19:23.25#ibcon#*before return 0, iclass 35, count 0 2006.230.00:19:23.25#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:23.25#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:19:23.25#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:19:23.25#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:19:23.25$vck44/vb=5,4 2006.230.00:19:23.25#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.00:19:23.25#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.00:19:23.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:23.25#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:23.31#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:23.31#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:23.31#ibcon#enter wrdev, iclass 37, count 2 2006.230.00:19:23.31#ibcon#first serial, iclass 37, count 2 2006.230.00:19:23.31#ibcon#enter sib2, iclass 37, count 2 2006.230.00:19:23.31#ibcon#flushed, iclass 37, count 2 2006.230.00:19:23.31#ibcon#about to write, iclass 37, count 2 2006.230.00:19:23.31#ibcon#wrote, iclass 37, count 2 2006.230.00:19:23.31#ibcon#about to read 3, iclass 37, count 2 2006.230.00:19:23.33#ibcon#read 3, iclass 37, count 2 2006.230.00:19:23.33#ibcon#about to read 4, iclass 37, count 2 2006.230.00:19:23.33#ibcon#read 4, iclass 37, count 2 2006.230.00:19:23.33#ibcon#about to read 5, iclass 37, count 2 2006.230.00:19:23.33#ibcon#read 5, iclass 37, count 2 2006.230.00:19:23.33#ibcon#about to read 6, iclass 37, count 2 2006.230.00:19:23.33#ibcon#read 6, iclass 37, count 2 2006.230.00:19:23.33#ibcon#end of sib2, iclass 37, count 2 2006.230.00:19:23.33#ibcon#*mode == 0, iclass 37, count 2 2006.230.00:19:23.33#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.00:19:23.33#ibcon#[27=AT05-04\r\n] 2006.230.00:19:23.33#ibcon#*before write, iclass 37, count 2 2006.230.00:19:23.33#ibcon#enter sib2, iclass 37, count 2 2006.230.00:19:23.33#ibcon#flushed, iclass 37, count 2 2006.230.00:19:23.33#ibcon#about to write, iclass 37, count 2 2006.230.00:19:23.33#ibcon#wrote, iclass 37, count 2 2006.230.00:19:23.33#ibcon#about to read 3, iclass 37, count 2 2006.230.00:19:23.36#ibcon#read 3, iclass 37, count 2 2006.230.00:19:23.36#ibcon#about to read 4, iclass 37, count 2 2006.230.00:19:23.36#ibcon#read 4, iclass 37, count 2 2006.230.00:19:23.36#ibcon#about to read 5, iclass 37, count 2 2006.230.00:19:23.36#ibcon#read 5, iclass 37, count 2 2006.230.00:19:23.36#ibcon#about to read 6, iclass 37, count 2 2006.230.00:19:23.36#ibcon#read 6, iclass 37, count 2 2006.230.00:19:23.36#ibcon#end of sib2, iclass 37, count 2 2006.230.00:19:23.36#ibcon#*after write, iclass 37, count 2 2006.230.00:19:23.36#ibcon#*before return 0, iclass 37, count 2 2006.230.00:19:23.36#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:23.36#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:19:23.36#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.00:19:23.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:23.36#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:23.48#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:23.48#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:23.48#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:19:23.48#ibcon#first serial, iclass 37, count 0 2006.230.00:19:23.48#ibcon#enter sib2, iclass 37, count 0 2006.230.00:19:23.48#ibcon#flushed, iclass 37, count 0 2006.230.00:19:23.48#ibcon#about to write, iclass 37, count 0 2006.230.00:19:23.48#ibcon#wrote, iclass 37, count 0 2006.230.00:19:23.48#ibcon#about to read 3, iclass 37, count 0 2006.230.00:19:23.50#ibcon#read 3, iclass 37, count 0 2006.230.00:19:23.50#ibcon#about to read 4, iclass 37, count 0 2006.230.00:19:23.50#ibcon#read 4, iclass 37, count 0 2006.230.00:19:23.50#ibcon#about to read 5, iclass 37, count 0 2006.230.00:19:23.50#ibcon#read 5, iclass 37, count 0 2006.230.00:19:23.50#ibcon#about to read 6, iclass 37, count 0 2006.230.00:19:23.50#ibcon#read 6, iclass 37, count 0 2006.230.00:19:23.50#ibcon#end of sib2, iclass 37, count 0 2006.230.00:19:23.50#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:19:23.50#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:19:23.50#ibcon#[27=USB\r\n] 2006.230.00:19:23.50#ibcon#*before write, iclass 37, count 0 2006.230.00:19:23.50#ibcon#enter sib2, iclass 37, count 0 2006.230.00:19:23.50#ibcon#flushed, iclass 37, count 0 2006.230.00:19:23.50#ibcon#about to write, iclass 37, count 0 2006.230.00:19:23.50#ibcon#wrote, iclass 37, count 0 2006.230.00:19:23.50#ibcon#about to read 3, iclass 37, count 0 2006.230.00:19:23.53#ibcon#read 3, iclass 37, count 0 2006.230.00:19:23.53#ibcon#about to read 4, iclass 37, count 0 2006.230.00:19:23.53#ibcon#read 4, iclass 37, count 0 2006.230.00:19:23.53#ibcon#about to read 5, iclass 37, count 0 2006.230.00:19:23.53#ibcon#read 5, iclass 37, count 0 2006.230.00:19:23.53#ibcon#about to read 6, iclass 37, count 0 2006.230.00:19:23.53#ibcon#read 6, iclass 37, count 0 2006.230.00:19:23.53#ibcon#end of sib2, iclass 37, count 0 2006.230.00:19:23.53#ibcon#*after write, iclass 37, count 0 2006.230.00:19:23.53#ibcon#*before return 0, iclass 37, count 0 2006.230.00:19:23.53#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:23.53#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:19:23.53#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:19:23.53#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:19:23.53$vck44/vblo=6,719.99 2006.230.00:19:23.53#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.00:19:23.53#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.00:19:23.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:23.53#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:23.53#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:23.53#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:23.53#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:19:23.53#ibcon#first serial, iclass 39, count 0 2006.230.00:19:23.53#ibcon#enter sib2, iclass 39, count 0 2006.230.00:19:23.53#ibcon#flushed, iclass 39, count 0 2006.230.00:19:23.53#ibcon#about to write, iclass 39, count 0 2006.230.00:19:23.53#ibcon#wrote, iclass 39, count 0 2006.230.00:19:23.53#ibcon#about to read 3, iclass 39, count 0 2006.230.00:19:23.55#ibcon#read 3, iclass 39, count 0 2006.230.00:19:23.55#ibcon#about to read 4, iclass 39, count 0 2006.230.00:19:23.55#ibcon#read 4, iclass 39, count 0 2006.230.00:19:23.55#ibcon#about to read 5, iclass 39, count 0 2006.230.00:19:23.55#ibcon#read 5, iclass 39, count 0 2006.230.00:19:23.55#ibcon#about to read 6, iclass 39, count 0 2006.230.00:19:23.55#ibcon#read 6, iclass 39, count 0 2006.230.00:19:23.55#ibcon#end of sib2, iclass 39, count 0 2006.230.00:19:23.55#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:19:23.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:19:23.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:19:23.55#ibcon#*before write, iclass 39, count 0 2006.230.00:19:23.55#ibcon#enter sib2, iclass 39, count 0 2006.230.00:19:23.55#ibcon#flushed, iclass 39, count 0 2006.230.00:19:23.55#ibcon#about to write, iclass 39, count 0 2006.230.00:19:23.55#ibcon#wrote, iclass 39, count 0 2006.230.00:19:23.55#ibcon#about to read 3, iclass 39, count 0 2006.230.00:19:23.59#ibcon#read 3, iclass 39, count 0 2006.230.00:19:23.59#ibcon#about to read 4, iclass 39, count 0 2006.230.00:19:23.59#ibcon#read 4, iclass 39, count 0 2006.230.00:19:23.59#ibcon#about to read 5, iclass 39, count 0 2006.230.00:19:23.59#ibcon#read 5, iclass 39, count 0 2006.230.00:19:23.59#ibcon#about to read 6, iclass 39, count 0 2006.230.00:19:23.59#ibcon#read 6, iclass 39, count 0 2006.230.00:19:23.59#ibcon#end of sib2, iclass 39, count 0 2006.230.00:19:23.59#ibcon#*after write, iclass 39, count 0 2006.230.00:19:23.59#ibcon#*before return 0, iclass 39, count 0 2006.230.00:19:23.59#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:23.59#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:19:23.59#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:19:23.59#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:19:23.59$vck44/vb=6,4 2006.230.00:19:23.59#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.00:19:23.59#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.00:19:23.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:23.59#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:23.65#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:23.65#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:23.65#ibcon#enter wrdev, iclass 3, count 2 2006.230.00:19:23.65#ibcon#first serial, iclass 3, count 2 2006.230.00:19:23.65#ibcon#enter sib2, iclass 3, count 2 2006.230.00:19:23.65#ibcon#flushed, iclass 3, count 2 2006.230.00:19:23.65#ibcon#about to write, iclass 3, count 2 2006.230.00:19:23.65#ibcon#wrote, iclass 3, count 2 2006.230.00:19:23.65#ibcon#about to read 3, iclass 3, count 2 2006.230.00:19:23.67#ibcon#read 3, iclass 3, count 2 2006.230.00:19:23.67#ibcon#about to read 4, iclass 3, count 2 2006.230.00:19:23.67#ibcon#read 4, iclass 3, count 2 2006.230.00:19:23.67#ibcon#about to read 5, iclass 3, count 2 2006.230.00:19:23.67#ibcon#read 5, iclass 3, count 2 2006.230.00:19:23.67#ibcon#about to read 6, iclass 3, count 2 2006.230.00:19:23.67#ibcon#read 6, iclass 3, count 2 2006.230.00:19:23.67#ibcon#end of sib2, iclass 3, count 2 2006.230.00:19:23.67#ibcon#*mode == 0, iclass 3, count 2 2006.230.00:19:23.67#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.00:19:23.67#ibcon#[27=AT06-04\r\n] 2006.230.00:19:23.67#ibcon#*before write, iclass 3, count 2 2006.230.00:19:23.67#ibcon#enter sib2, iclass 3, count 2 2006.230.00:19:23.67#ibcon#flushed, iclass 3, count 2 2006.230.00:19:23.67#ibcon#about to write, iclass 3, count 2 2006.230.00:19:23.67#ibcon#wrote, iclass 3, count 2 2006.230.00:19:23.67#ibcon#about to read 3, iclass 3, count 2 2006.230.00:19:23.70#ibcon#read 3, iclass 3, count 2 2006.230.00:19:23.70#ibcon#about to read 4, iclass 3, count 2 2006.230.00:19:23.70#ibcon#read 4, iclass 3, count 2 2006.230.00:19:23.70#ibcon#about to read 5, iclass 3, count 2 2006.230.00:19:23.70#ibcon#read 5, iclass 3, count 2 2006.230.00:19:23.70#ibcon#about to read 6, iclass 3, count 2 2006.230.00:19:23.70#ibcon#read 6, iclass 3, count 2 2006.230.00:19:23.70#ibcon#end of sib2, iclass 3, count 2 2006.230.00:19:23.70#ibcon#*after write, iclass 3, count 2 2006.230.00:19:23.70#ibcon#*before return 0, iclass 3, count 2 2006.230.00:19:23.70#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:23.70#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:19:23.70#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.00:19:23.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:23.70#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:23.82#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:23.82#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:23.82#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:19:23.82#ibcon#first serial, iclass 3, count 0 2006.230.00:19:23.82#ibcon#enter sib2, iclass 3, count 0 2006.230.00:19:23.82#ibcon#flushed, iclass 3, count 0 2006.230.00:19:23.82#ibcon#about to write, iclass 3, count 0 2006.230.00:19:23.82#ibcon#wrote, iclass 3, count 0 2006.230.00:19:23.82#ibcon#about to read 3, iclass 3, count 0 2006.230.00:19:23.84#ibcon#read 3, iclass 3, count 0 2006.230.00:19:23.84#ibcon#about to read 4, iclass 3, count 0 2006.230.00:19:23.84#ibcon#read 4, iclass 3, count 0 2006.230.00:19:23.84#ibcon#about to read 5, iclass 3, count 0 2006.230.00:19:23.84#ibcon#read 5, iclass 3, count 0 2006.230.00:19:23.84#ibcon#about to read 6, iclass 3, count 0 2006.230.00:19:23.84#ibcon#read 6, iclass 3, count 0 2006.230.00:19:23.84#ibcon#end of sib2, iclass 3, count 0 2006.230.00:19:23.84#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:19:23.84#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:19:23.84#ibcon#[27=USB\r\n] 2006.230.00:19:23.84#ibcon#*before write, iclass 3, count 0 2006.230.00:19:23.84#ibcon#enter sib2, iclass 3, count 0 2006.230.00:19:23.84#ibcon#flushed, iclass 3, count 0 2006.230.00:19:23.84#ibcon#about to write, iclass 3, count 0 2006.230.00:19:23.84#ibcon#wrote, iclass 3, count 0 2006.230.00:19:23.84#ibcon#about to read 3, iclass 3, count 0 2006.230.00:19:23.87#ibcon#read 3, iclass 3, count 0 2006.230.00:19:23.87#ibcon#about to read 4, iclass 3, count 0 2006.230.00:19:23.87#ibcon#read 4, iclass 3, count 0 2006.230.00:19:23.87#ibcon#about to read 5, iclass 3, count 0 2006.230.00:19:23.87#ibcon#read 5, iclass 3, count 0 2006.230.00:19:23.87#ibcon#about to read 6, iclass 3, count 0 2006.230.00:19:23.87#ibcon#read 6, iclass 3, count 0 2006.230.00:19:23.87#ibcon#end of sib2, iclass 3, count 0 2006.230.00:19:23.87#ibcon#*after write, iclass 3, count 0 2006.230.00:19:23.87#ibcon#*before return 0, iclass 3, count 0 2006.230.00:19:23.87#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:23.87#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:19:23.87#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:19:23.87#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:19:23.87$vck44/vblo=7,734.99 2006.230.00:19:23.87#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.00:19:23.87#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.00:19:23.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:23.87#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:23.87#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:23.87#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:23.87#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:19:23.87#ibcon#first serial, iclass 5, count 0 2006.230.00:19:23.87#ibcon#enter sib2, iclass 5, count 0 2006.230.00:19:23.87#ibcon#flushed, iclass 5, count 0 2006.230.00:19:23.87#ibcon#about to write, iclass 5, count 0 2006.230.00:19:23.87#ibcon#wrote, iclass 5, count 0 2006.230.00:19:23.87#ibcon#about to read 3, iclass 5, count 0 2006.230.00:19:23.89#ibcon#read 3, iclass 5, count 0 2006.230.00:19:23.89#ibcon#about to read 4, iclass 5, count 0 2006.230.00:19:23.89#ibcon#read 4, iclass 5, count 0 2006.230.00:19:23.89#ibcon#about to read 5, iclass 5, count 0 2006.230.00:19:23.89#ibcon#read 5, iclass 5, count 0 2006.230.00:19:23.89#ibcon#about to read 6, iclass 5, count 0 2006.230.00:19:23.89#ibcon#read 6, iclass 5, count 0 2006.230.00:19:23.89#ibcon#end of sib2, iclass 5, count 0 2006.230.00:19:23.89#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:19:23.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:19:23.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:19:23.89#ibcon#*before write, iclass 5, count 0 2006.230.00:19:23.89#ibcon#enter sib2, iclass 5, count 0 2006.230.00:19:23.89#ibcon#flushed, iclass 5, count 0 2006.230.00:19:23.89#ibcon#about to write, iclass 5, count 0 2006.230.00:19:23.89#ibcon#wrote, iclass 5, count 0 2006.230.00:19:23.89#ibcon#about to read 3, iclass 5, count 0 2006.230.00:19:23.93#ibcon#read 3, iclass 5, count 0 2006.230.00:19:23.93#ibcon#about to read 4, iclass 5, count 0 2006.230.00:19:23.93#ibcon#read 4, iclass 5, count 0 2006.230.00:19:23.93#ibcon#about to read 5, iclass 5, count 0 2006.230.00:19:23.93#ibcon#read 5, iclass 5, count 0 2006.230.00:19:23.93#ibcon#about to read 6, iclass 5, count 0 2006.230.00:19:23.93#ibcon#read 6, iclass 5, count 0 2006.230.00:19:23.93#ibcon#end of sib2, iclass 5, count 0 2006.230.00:19:23.93#ibcon#*after write, iclass 5, count 0 2006.230.00:19:23.93#ibcon#*before return 0, iclass 5, count 0 2006.230.00:19:23.93#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:23.93#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:19:23.93#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:19:23.93#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:19:23.93$vck44/vb=7,4 2006.230.00:19:23.93#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.00:19:23.93#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.00:19:23.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:23.93#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:23.99#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:23.99#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:23.99#ibcon#enter wrdev, iclass 7, count 2 2006.230.00:19:23.99#ibcon#first serial, iclass 7, count 2 2006.230.00:19:23.99#ibcon#enter sib2, iclass 7, count 2 2006.230.00:19:23.99#ibcon#flushed, iclass 7, count 2 2006.230.00:19:23.99#ibcon#about to write, iclass 7, count 2 2006.230.00:19:23.99#ibcon#wrote, iclass 7, count 2 2006.230.00:19:23.99#ibcon#about to read 3, iclass 7, count 2 2006.230.00:19:24.01#ibcon#read 3, iclass 7, count 2 2006.230.00:19:24.01#ibcon#about to read 4, iclass 7, count 2 2006.230.00:19:24.01#ibcon#read 4, iclass 7, count 2 2006.230.00:19:24.01#ibcon#about to read 5, iclass 7, count 2 2006.230.00:19:24.01#ibcon#read 5, iclass 7, count 2 2006.230.00:19:24.01#ibcon#about to read 6, iclass 7, count 2 2006.230.00:19:24.01#ibcon#read 6, iclass 7, count 2 2006.230.00:19:24.01#ibcon#end of sib2, iclass 7, count 2 2006.230.00:19:24.01#ibcon#*mode == 0, iclass 7, count 2 2006.230.00:19:24.01#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.00:19:24.01#ibcon#[27=AT07-04\r\n] 2006.230.00:19:24.01#ibcon#*before write, iclass 7, count 2 2006.230.00:19:24.01#ibcon#enter sib2, iclass 7, count 2 2006.230.00:19:24.01#ibcon#flushed, iclass 7, count 2 2006.230.00:19:24.01#ibcon#about to write, iclass 7, count 2 2006.230.00:19:24.01#ibcon#wrote, iclass 7, count 2 2006.230.00:19:24.01#ibcon#about to read 3, iclass 7, count 2 2006.230.00:19:24.04#ibcon#read 3, iclass 7, count 2 2006.230.00:19:24.04#ibcon#about to read 4, iclass 7, count 2 2006.230.00:19:24.04#ibcon#read 4, iclass 7, count 2 2006.230.00:19:24.04#ibcon#about to read 5, iclass 7, count 2 2006.230.00:19:24.04#ibcon#read 5, iclass 7, count 2 2006.230.00:19:24.04#ibcon#about to read 6, iclass 7, count 2 2006.230.00:19:24.04#ibcon#read 6, iclass 7, count 2 2006.230.00:19:24.04#ibcon#end of sib2, iclass 7, count 2 2006.230.00:19:24.04#ibcon#*after write, iclass 7, count 2 2006.230.00:19:24.04#ibcon#*before return 0, iclass 7, count 2 2006.230.00:19:24.04#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:24.04#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:19:24.04#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.00:19:24.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:24.04#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:24.16#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:24.16#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:24.16#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:19:24.16#ibcon#first serial, iclass 7, count 0 2006.230.00:19:24.16#ibcon#enter sib2, iclass 7, count 0 2006.230.00:19:24.16#ibcon#flushed, iclass 7, count 0 2006.230.00:19:24.16#ibcon#about to write, iclass 7, count 0 2006.230.00:19:24.16#ibcon#wrote, iclass 7, count 0 2006.230.00:19:24.16#ibcon#about to read 3, iclass 7, count 0 2006.230.00:19:24.18#ibcon#read 3, iclass 7, count 0 2006.230.00:19:24.18#ibcon#about to read 4, iclass 7, count 0 2006.230.00:19:24.18#ibcon#read 4, iclass 7, count 0 2006.230.00:19:24.18#ibcon#about to read 5, iclass 7, count 0 2006.230.00:19:24.18#ibcon#read 5, iclass 7, count 0 2006.230.00:19:24.18#ibcon#about to read 6, iclass 7, count 0 2006.230.00:19:24.18#ibcon#read 6, iclass 7, count 0 2006.230.00:19:24.18#ibcon#end of sib2, iclass 7, count 0 2006.230.00:19:24.18#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:19:24.18#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:19:24.18#ibcon#[27=USB\r\n] 2006.230.00:19:24.18#ibcon#*before write, iclass 7, count 0 2006.230.00:19:24.18#ibcon#enter sib2, iclass 7, count 0 2006.230.00:19:24.18#ibcon#flushed, iclass 7, count 0 2006.230.00:19:24.18#ibcon#about to write, iclass 7, count 0 2006.230.00:19:24.18#ibcon#wrote, iclass 7, count 0 2006.230.00:19:24.18#ibcon#about to read 3, iclass 7, count 0 2006.230.00:19:24.21#ibcon#read 3, iclass 7, count 0 2006.230.00:19:24.21#ibcon#about to read 4, iclass 7, count 0 2006.230.00:19:24.21#ibcon#read 4, iclass 7, count 0 2006.230.00:19:24.21#ibcon#about to read 5, iclass 7, count 0 2006.230.00:19:24.21#ibcon#read 5, iclass 7, count 0 2006.230.00:19:24.21#ibcon#about to read 6, iclass 7, count 0 2006.230.00:19:24.21#ibcon#read 6, iclass 7, count 0 2006.230.00:19:24.21#ibcon#end of sib2, iclass 7, count 0 2006.230.00:19:24.21#ibcon#*after write, iclass 7, count 0 2006.230.00:19:24.21#ibcon#*before return 0, iclass 7, count 0 2006.230.00:19:24.21#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:24.21#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:19:24.21#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:19:24.21#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:19:24.21$vck44/vblo=8,744.99 2006.230.00:19:24.21#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.00:19:24.21#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.00:19:24.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:19:24.21#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:24.21#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:24.21#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:24.21#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:19:24.21#ibcon#first serial, iclass 11, count 0 2006.230.00:19:24.21#ibcon#enter sib2, iclass 11, count 0 2006.230.00:19:24.21#ibcon#flushed, iclass 11, count 0 2006.230.00:19:24.21#ibcon#about to write, iclass 11, count 0 2006.230.00:19:24.21#ibcon#wrote, iclass 11, count 0 2006.230.00:19:24.21#ibcon#about to read 3, iclass 11, count 0 2006.230.00:19:24.23#ibcon#read 3, iclass 11, count 0 2006.230.00:19:24.23#ibcon#about to read 4, iclass 11, count 0 2006.230.00:19:24.23#ibcon#read 4, iclass 11, count 0 2006.230.00:19:24.23#ibcon#about to read 5, iclass 11, count 0 2006.230.00:19:24.23#ibcon#read 5, iclass 11, count 0 2006.230.00:19:24.23#ibcon#about to read 6, iclass 11, count 0 2006.230.00:19:24.23#ibcon#read 6, iclass 11, count 0 2006.230.00:19:24.23#ibcon#end of sib2, iclass 11, count 0 2006.230.00:19:24.23#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:19:24.23#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:19:24.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:19:24.23#ibcon#*before write, iclass 11, count 0 2006.230.00:19:24.23#ibcon#enter sib2, iclass 11, count 0 2006.230.00:19:24.23#ibcon#flushed, iclass 11, count 0 2006.230.00:19:24.23#ibcon#about to write, iclass 11, count 0 2006.230.00:19:24.23#ibcon#wrote, iclass 11, count 0 2006.230.00:19:24.23#ibcon#about to read 3, iclass 11, count 0 2006.230.00:19:24.27#ibcon#read 3, iclass 11, count 0 2006.230.00:19:24.27#ibcon#about to read 4, iclass 11, count 0 2006.230.00:19:24.27#ibcon#read 4, iclass 11, count 0 2006.230.00:19:24.27#ibcon#about to read 5, iclass 11, count 0 2006.230.00:19:24.27#ibcon#read 5, iclass 11, count 0 2006.230.00:19:24.27#ibcon#about to read 6, iclass 11, count 0 2006.230.00:19:24.27#ibcon#read 6, iclass 11, count 0 2006.230.00:19:24.27#ibcon#end of sib2, iclass 11, count 0 2006.230.00:19:24.27#ibcon#*after write, iclass 11, count 0 2006.230.00:19:24.27#ibcon#*before return 0, iclass 11, count 0 2006.230.00:19:24.27#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:24.27#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:19:24.27#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:19:24.27#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:19:24.27$vck44/vb=8,4 2006.230.00:19:24.27#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.00:19:24.27#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.00:19:24.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:19:24.27#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:24.33#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:24.33#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:24.33#ibcon#enter wrdev, iclass 13, count 2 2006.230.00:19:24.33#ibcon#first serial, iclass 13, count 2 2006.230.00:19:24.33#ibcon#enter sib2, iclass 13, count 2 2006.230.00:19:24.33#ibcon#flushed, iclass 13, count 2 2006.230.00:19:24.33#ibcon#about to write, iclass 13, count 2 2006.230.00:19:24.33#ibcon#wrote, iclass 13, count 2 2006.230.00:19:24.33#ibcon#about to read 3, iclass 13, count 2 2006.230.00:19:24.35#ibcon#read 3, iclass 13, count 2 2006.230.00:19:24.35#ibcon#about to read 4, iclass 13, count 2 2006.230.00:19:24.35#ibcon#read 4, iclass 13, count 2 2006.230.00:19:24.35#ibcon#about to read 5, iclass 13, count 2 2006.230.00:19:24.35#ibcon#read 5, iclass 13, count 2 2006.230.00:19:24.35#ibcon#about to read 6, iclass 13, count 2 2006.230.00:19:24.35#ibcon#read 6, iclass 13, count 2 2006.230.00:19:24.35#ibcon#end of sib2, iclass 13, count 2 2006.230.00:19:24.35#ibcon#*mode == 0, iclass 13, count 2 2006.230.00:19:24.35#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.00:19:24.35#ibcon#[27=AT08-04\r\n] 2006.230.00:19:24.35#ibcon#*before write, iclass 13, count 2 2006.230.00:19:24.35#ibcon#enter sib2, iclass 13, count 2 2006.230.00:19:24.35#ibcon#flushed, iclass 13, count 2 2006.230.00:19:24.35#ibcon#about to write, iclass 13, count 2 2006.230.00:19:24.35#ibcon#wrote, iclass 13, count 2 2006.230.00:19:24.35#ibcon#about to read 3, iclass 13, count 2 2006.230.00:19:24.38#ibcon#read 3, iclass 13, count 2 2006.230.00:19:24.38#ibcon#about to read 4, iclass 13, count 2 2006.230.00:19:24.38#ibcon#read 4, iclass 13, count 2 2006.230.00:19:24.38#ibcon#about to read 5, iclass 13, count 2 2006.230.00:19:24.38#ibcon#read 5, iclass 13, count 2 2006.230.00:19:24.38#ibcon#about to read 6, iclass 13, count 2 2006.230.00:19:24.38#ibcon#read 6, iclass 13, count 2 2006.230.00:19:24.38#ibcon#end of sib2, iclass 13, count 2 2006.230.00:19:24.38#ibcon#*after write, iclass 13, count 2 2006.230.00:19:24.38#ibcon#*before return 0, iclass 13, count 2 2006.230.00:19:24.38#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:24.38#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:19:24.38#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.00:19:24.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:19:24.38#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:24.50#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:24.50#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:24.50#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:19:24.50#ibcon#first serial, iclass 13, count 0 2006.230.00:19:24.50#ibcon#enter sib2, iclass 13, count 0 2006.230.00:19:24.50#ibcon#flushed, iclass 13, count 0 2006.230.00:19:24.50#ibcon#about to write, iclass 13, count 0 2006.230.00:19:24.50#ibcon#wrote, iclass 13, count 0 2006.230.00:19:24.50#ibcon#about to read 3, iclass 13, count 0 2006.230.00:19:24.52#ibcon#read 3, iclass 13, count 0 2006.230.00:19:24.52#ibcon#about to read 4, iclass 13, count 0 2006.230.00:19:24.52#ibcon#read 4, iclass 13, count 0 2006.230.00:19:24.52#ibcon#about to read 5, iclass 13, count 0 2006.230.00:19:24.52#ibcon#read 5, iclass 13, count 0 2006.230.00:19:24.52#ibcon#about to read 6, iclass 13, count 0 2006.230.00:19:24.52#ibcon#read 6, iclass 13, count 0 2006.230.00:19:24.52#ibcon#end of sib2, iclass 13, count 0 2006.230.00:19:24.52#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:19:24.52#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:19:24.52#ibcon#[27=USB\r\n] 2006.230.00:19:24.52#ibcon#*before write, iclass 13, count 0 2006.230.00:19:24.52#ibcon#enter sib2, iclass 13, count 0 2006.230.00:19:24.52#ibcon#flushed, iclass 13, count 0 2006.230.00:19:24.52#ibcon#about to write, iclass 13, count 0 2006.230.00:19:24.52#ibcon#wrote, iclass 13, count 0 2006.230.00:19:24.52#ibcon#about to read 3, iclass 13, count 0 2006.230.00:19:24.55#ibcon#read 3, iclass 13, count 0 2006.230.00:19:24.55#ibcon#about to read 4, iclass 13, count 0 2006.230.00:19:24.55#ibcon#read 4, iclass 13, count 0 2006.230.00:19:24.55#ibcon#about to read 5, iclass 13, count 0 2006.230.00:19:24.55#ibcon#read 5, iclass 13, count 0 2006.230.00:19:24.55#ibcon#about to read 6, iclass 13, count 0 2006.230.00:19:24.55#ibcon#read 6, iclass 13, count 0 2006.230.00:19:24.55#ibcon#end of sib2, iclass 13, count 0 2006.230.00:19:24.55#ibcon#*after write, iclass 13, count 0 2006.230.00:19:24.55#ibcon#*before return 0, iclass 13, count 0 2006.230.00:19:24.55#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:24.55#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:19:24.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:19:24.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:19:24.55$vck44/vabw=wide 2006.230.00:19:24.55#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.00:19:24.55#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.00:19:24.55#ibcon#ireg 8 cls_cnt 0 2006.230.00:19:24.55#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:24.55#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:24.55#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:24.55#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:19:24.55#ibcon#first serial, iclass 15, count 0 2006.230.00:19:24.55#ibcon#enter sib2, iclass 15, count 0 2006.230.00:19:24.55#ibcon#flushed, iclass 15, count 0 2006.230.00:19:24.55#ibcon#about to write, iclass 15, count 0 2006.230.00:19:24.55#ibcon#wrote, iclass 15, count 0 2006.230.00:19:24.55#ibcon#about to read 3, iclass 15, count 0 2006.230.00:19:24.57#ibcon#read 3, iclass 15, count 0 2006.230.00:19:24.57#ibcon#about to read 4, iclass 15, count 0 2006.230.00:19:24.57#ibcon#read 4, iclass 15, count 0 2006.230.00:19:24.57#ibcon#about to read 5, iclass 15, count 0 2006.230.00:19:24.57#ibcon#read 5, iclass 15, count 0 2006.230.00:19:24.57#ibcon#about to read 6, iclass 15, count 0 2006.230.00:19:24.57#ibcon#read 6, iclass 15, count 0 2006.230.00:19:24.57#ibcon#end of sib2, iclass 15, count 0 2006.230.00:19:24.57#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:19:24.57#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:19:24.57#ibcon#[25=BW32\r\n] 2006.230.00:19:24.57#ibcon#*before write, iclass 15, count 0 2006.230.00:19:24.57#ibcon#enter sib2, iclass 15, count 0 2006.230.00:19:24.57#ibcon#flushed, iclass 15, count 0 2006.230.00:19:24.57#ibcon#about to write, iclass 15, count 0 2006.230.00:19:24.57#ibcon#wrote, iclass 15, count 0 2006.230.00:19:24.57#ibcon#about to read 3, iclass 15, count 0 2006.230.00:19:24.60#ibcon#read 3, iclass 15, count 0 2006.230.00:19:24.60#ibcon#about to read 4, iclass 15, count 0 2006.230.00:19:24.60#ibcon#read 4, iclass 15, count 0 2006.230.00:19:24.60#ibcon#about to read 5, iclass 15, count 0 2006.230.00:19:24.60#ibcon#read 5, iclass 15, count 0 2006.230.00:19:24.60#ibcon#about to read 6, iclass 15, count 0 2006.230.00:19:24.60#ibcon#read 6, iclass 15, count 0 2006.230.00:19:24.60#ibcon#end of sib2, iclass 15, count 0 2006.230.00:19:24.60#ibcon#*after write, iclass 15, count 0 2006.230.00:19:24.60#ibcon#*before return 0, iclass 15, count 0 2006.230.00:19:24.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:24.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:19:24.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:19:24.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:19:24.60$vck44/vbbw=wide 2006.230.00:19:24.60#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:19:24.60#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:19:24.60#ibcon#ireg 8 cls_cnt 0 2006.230.00:19:24.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:19:24.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:19:24.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:19:24.67#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:19:24.67#ibcon#first serial, iclass 17, count 0 2006.230.00:19:24.67#ibcon#enter sib2, iclass 17, count 0 2006.230.00:19:24.67#ibcon#flushed, iclass 17, count 0 2006.230.00:19:24.67#ibcon#about to write, iclass 17, count 0 2006.230.00:19:24.67#ibcon#wrote, iclass 17, count 0 2006.230.00:19:24.67#ibcon#about to read 3, iclass 17, count 0 2006.230.00:19:24.69#ibcon#read 3, iclass 17, count 0 2006.230.00:19:24.69#ibcon#about to read 4, iclass 17, count 0 2006.230.00:19:24.69#ibcon#read 4, iclass 17, count 0 2006.230.00:19:24.69#ibcon#about to read 5, iclass 17, count 0 2006.230.00:19:24.69#ibcon#read 5, iclass 17, count 0 2006.230.00:19:24.69#ibcon#about to read 6, iclass 17, count 0 2006.230.00:19:24.69#ibcon#read 6, iclass 17, count 0 2006.230.00:19:24.69#ibcon#end of sib2, iclass 17, count 0 2006.230.00:19:24.69#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:19:24.69#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:19:24.69#ibcon#[27=BW32\r\n] 2006.230.00:19:24.69#ibcon#*before write, iclass 17, count 0 2006.230.00:19:24.69#ibcon#enter sib2, iclass 17, count 0 2006.230.00:19:24.69#ibcon#flushed, iclass 17, count 0 2006.230.00:19:24.69#ibcon#about to write, iclass 17, count 0 2006.230.00:19:24.69#ibcon#wrote, iclass 17, count 0 2006.230.00:19:24.69#ibcon#about to read 3, iclass 17, count 0 2006.230.00:19:24.72#ibcon#read 3, iclass 17, count 0 2006.230.00:19:24.72#ibcon#about to read 4, iclass 17, count 0 2006.230.00:19:24.72#ibcon#read 4, iclass 17, count 0 2006.230.00:19:24.72#ibcon#about to read 5, iclass 17, count 0 2006.230.00:19:24.72#ibcon#read 5, iclass 17, count 0 2006.230.00:19:24.72#ibcon#about to read 6, iclass 17, count 0 2006.230.00:19:24.72#ibcon#read 6, iclass 17, count 0 2006.230.00:19:24.72#ibcon#end of sib2, iclass 17, count 0 2006.230.00:19:24.72#ibcon#*after write, iclass 17, count 0 2006.230.00:19:24.72#ibcon#*before return 0, iclass 17, count 0 2006.230.00:19:24.72#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:19:24.72#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:19:24.72#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:19:24.72#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:19:24.72$setupk4/ifdk4 2006.230.00:19:24.72$ifdk4/lo= 2006.230.00:19:24.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:19:24.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:19:24.72$ifdk4/patch= 2006.230.00:19:24.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:19:24.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:19:24.72$setupk4/!*+20s 2006.230.00:19:27.83#abcon#<5=/09 1.8 6.3 31.08 751002.7\r\n> 2006.230.00:19:27.85#abcon#{5=INTERFACE CLEAR} 2006.230.00:19:27.91#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:19:38.00#abcon#<5=/09 1.8 6.3 31.08 751002.7\r\n> 2006.230.00:19:38.02#abcon#{5=INTERFACE CLEAR} 2006.230.00:19:38.08#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:19:39.23$setupk4/"tpicd 2006.230.00:19:39.23$setupk4/echo=off 2006.230.00:19:39.23$setupk4/xlog=off 2006.230.00:19:39.23:!2006.230.00:24:57 2006.230.00:19:50.13#trakl#Source acquired 2006.230.00:19:51.13#flagr#flagr/antenna,acquired 2006.230.00:24:57.00:preob 2006.230.00:24:58.14/onsource/TRACKING 2006.230.00:24:58.14:!2006.230.00:25:07 2006.230.00:25:07.00:"tape 2006.230.00:25:07.00:"st=record 2006.230.00:25:07.00:data_valid=on 2006.230.00:25:07.01:midob 2006.230.00:25:08.14/onsource/TRACKING 2006.230.00:25:08.14/wx/31.33,1002.8,74 2006.230.00:25:08.29/cable/+6.4046E-03 2006.230.00:25:09.38/va/01,08,usb,yes,29,31 2006.230.00:25:09.38/va/02,07,usb,yes,32,32 2006.230.00:25:09.38/va/03,06,usb,yes,39,41 2006.230.00:25:09.38/va/04,07,usb,yes,32,34 2006.230.00:25:09.38/va/05,04,usb,yes,29,29 2006.230.00:25:09.38/va/06,04,usb,yes,33,32 2006.230.00:25:09.38/va/07,05,usb,yes,29,29 2006.230.00:25:09.38/va/08,06,usb,yes,21,26 2006.230.00:25:09.61/valo/01,524.99,yes,locked 2006.230.00:25:09.61/valo/02,534.99,yes,locked 2006.230.00:25:09.61/valo/03,564.99,yes,locked 2006.230.00:25:09.61/valo/04,624.99,yes,locked 2006.230.00:25:09.61/valo/05,734.99,yes,locked 2006.230.00:25:09.61/valo/06,814.99,yes,locked 2006.230.00:25:09.61/valo/07,864.99,yes,locked 2006.230.00:25:09.61/valo/08,884.99,yes,locked 2006.230.00:25:10.70/vb/01,04,usb,yes,31,29 2006.230.00:25:10.70/vb/02,04,usb,yes,33,33 2006.230.00:25:10.70/vb/03,04,usb,yes,30,33 2006.230.00:25:10.70/vb/04,04,usb,yes,35,34 2006.230.00:25:10.70/vb/05,04,usb,yes,27,29 2006.230.00:25:10.70/vb/06,04,usb,yes,31,27 2006.230.00:25:10.70/vb/07,04,usb,yes,31,31 2006.230.00:25:10.70/vb/08,04,usb,yes,29,32 2006.230.00:25:10.93/vblo/01,629.99,yes,locked 2006.230.00:25:10.93/vblo/02,634.99,yes,locked 2006.230.00:25:10.93/vblo/03,649.99,yes,locked 2006.230.00:25:10.93/vblo/04,679.99,yes,locked 2006.230.00:25:10.93/vblo/05,709.99,yes,locked 2006.230.00:25:10.93/vblo/06,719.99,yes,locked 2006.230.00:25:10.93/vblo/07,734.99,yes,locked 2006.230.00:25:10.93/vblo/08,744.99,yes,locked 2006.230.00:25:11.08/vabw/8 2006.230.00:25:11.23/vbbw/8 2006.230.00:25:11.32/xfe/off,on,12.0 2006.230.00:25:11.70/ifatt/23,28,28,28 2006.230.00:25:12.08/fmout-gps/S +4.57E-07 2006.230.00:25:12.12:!2006.230.00:26:07 2006.230.00:26:07.00:data_valid=off 2006.230.00:26:07.00:"et 2006.230.00:26:07.00:!+3s 2006.230.00:26:10.02:"tape 2006.230.00:26:10.02:postob 2006.230.00:26:10.22/cable/+6.4029E-03 2006.230.00:26:10.22/wx/31.39,1002.8,73 2006.230.00:26:11.08/fmout-gps/S +4.57E-07 2006.230.00:26:11.08:scan_name=230-0028,jd0608,100 2006.230.00:26:11.08:source=0528+134,053056.42,133155.1,2000.0,cw 2006.230.00:26:12.14#flagr#flagr/antenna,new-source 2006.230.00:26:12.14:checkk5 2006.230.00:26:12.55/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:26:12.95/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:26:13.35/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:26:13.75/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:26:14.15/chk_obsdata//k5ts1/T2300025??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.00:26:14.54/chk_obsdata//k5ts2/T2300025??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.00:26:14.96/chk_obsdata//k5ts3/T2300025??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.00:26:15.38/chk_obsdata//k5ts4/T2300025??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.00:26:16.09/k5log//k5ts1_log_newline 2006.230.00:26:16.79/k5log//k5ts2_log_newline 2006.230.00:26:17.50/k5log//k5ts3_log_newline 2006.230.00:26:18.22/k5log//k5ts4_log_newline 2006.230.00:26:18.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:26:18.24:setupk4=1 2006.230.00:26:18.24$setupk4/echo=on 2006.230.00:26:18.24$setupk4/pcalon 2006.230.00:26:18.24$pcalon/"no phase cal control is implemented here 2006.230.00:26:18.24$setupk4/"tpicd=stop 2006.230.00:26:18.24$setupk4/"rec=synch_on 2006.230.00:26:18.24$setupk4/"rec_mode=128 2006.230.00:26:18.24$setupk4/!* 2006.230.00:26:18.24$setupk4/recpk4 2006.230.00:26:18.24$recpk4/recpatch= 2006.230.00:26:18.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:26:18.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:26:18.25$setupk4/vck44 2006.230.00:26:18.25$vck44/valo=1,524.99 2006.230.00:26:18.25#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.00:26:18.25#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.00:26:18.25#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:18.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:18.25#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:18.25#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:18.25#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:26:18.25#ibcon#first serial, iclass 4, count 0 2006.230.00:26:18.25#ibcon#enter sib2, iclass 4, count 0 2006.230.00:26:18.25#ibcon#flushed, iclass 4, count 0 2006.230.00:26:18.25#ibcon#about to write, iclass 4, count 0 2006.230.00:26:18.25#ibcon#wrote, iclass 4, count 0 2006.230.00:26:18.25#ibcon#about to read 3, iclass 4, count 0 2006.230.00:26:18.27#ibcon#read 3, iclass 4, count 0 2006.230.00:26:18.27#ibcon#about to read 4, iclass 4, count 0 2006.230.00:26:18.27#ibcon#read 4, iclass 4, count 0 2006.230.00:26:18.27#ibcon#about to read 5, iclass 4, count 0 2006.230.00:26:18.27#ibcon#read 5, iclass 4, count 0 2006.230.00:26:18.27#ibcon#about to read 6, iclass 4, count 0 2006.230.00:26:18.27#ibcon#read 6, iclass 4, count 0 2006.230.00:26:18.27#ibcon#end of sib2, iclass 4, count 0 2006.230.00:26:18.27#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:26:18.27#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:26:18.27#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:26:18.27#ibcon#*before write, iclass 4, count 0 2006.230.00:26:18.27#ibcon#enter sib2, iclass 4, count 0 2006.230.00:26:18.27#ibcon#flushed, iclass 4, count 0 2006.230.00:26:18.27#ibcon#about to write, iclass 4, count 0 2006.230.00:26:18.27#ibcon#wrote, iclass 4, count 0 2006.230.00:26:18.27#ibcon#about to read 3, iclass 4, count 0 2006.230.00:26:18.32#ibcon#read 3, iclass 4, count 0 2006.230.00:26:18.32#ibcon#about to read 4, iclass 4, count 0 2006.230.00:26:18.32#ibcon#read 4, iclass 4, count 0 2006.230.00:26:18.32#ibcon#about to read 5, iclass 4, count 0 2006.230.00:26:18.32#ibcon#read 5, iclass 4, count 0 2006.230.00:26:18.32#ibcon#about to read 6, iclass 4, count 0 2006.230.00:26:18.32#ibcon#read 6, iclass 4, count 0 2006.230.00:26:18.32#ibcon#end of sib2, iclass 4, count 0 2006.230.00:26:18.32#ibcon#*after write, iclass 4, count 0 2006.230.00:26:18.32#ibcon#*before return 0, iclass 4, count 0 2006.230.00:26:18.32#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:18.32#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:18.32#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:26:18.32#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:26:18.32$vck44/va=1,8 2006.230.00:26:18.32#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.00:26:18.32#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.00:26:18.32#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:18.32#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:18.32#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:18.32#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:18.32#ibcon#enter wrdev, iclass 6, count 2 2006.230.00:26:18.32#ibcon#first serial, iclass 6, count 2 2006.230.00:26:18.32#ibcon#enter sib2, iclass 6, count 2 2006.230.00:26:18.32#ibcon#flushed, iclass 6, count 2 2006.230.00:26:18.32#ibcon#about to write, iclass 6, count 2 2006.230.00:26:18.32#ibcon#wrote, iclass 6, count 2 2006.230.00:26:18.32#ibcon#about to read 3, iclass 6, count 2 2006.230.00:26:18.34#ibcon#read 3, iclass 6, count 2 2006.230.00:26:18.34#ibcon#about to read 4, iclass 6, count 2 2006.230.00:26:18.34#ibcon#read 4, iclass 6, count 2 2006.230.00:26:18.34#ibcon#about to read 5, iclass 6, count 2 2006.230.00:26:18.34#ibcon#read 5, iclass 6, count 2 2006.230.00:26:18.34#ibcon#about to read 6, iclass 6, count 2 2006.230.00:26:18.34#ibcon#read 6, iclass 6, count 2 2006.230.00:26:18.34#ibcon#end of sib2, iclass 6, count 2 2006.230.00:26:18.34#ibcon#*mode == 0, iclass 6, count 2 2006.230.00:26:18.34#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.00:26:18.34#ibcon#[25=AT01-08\r\n] 2006.230.00:26:18.34#ibcon#*before write, iclass 6, count 2 2006.230.00:26:18.34#ibcon#enter sib2, iclass 6, count 2 2006.230.00:26:18.34#ibcon#flushed, iclass 6, count 2 2006.230.00:26:18.34#ibcon#about to write, iclass 6, count 2 2006.230.00:26:18.34#ibcon#wrote, iclass 6, count 2 2006.230.00:26:18.34#ibcon#about to read 3, iclass 6, count 2 2006.230.00:26:18.37#ibcon#read 3, iclass 6, count 2 2006.230.00:26:18.37#ibcon#about to read 4, iclass 6, count 2 2006.230.00:26:18.37#ibcon#read 4, iclass 6, count 2 2006.230.00:26:18.37#ibcon#about to read 5, iclass 6, count 2 2006.230.00:26:18.37#ibcon#read 5, iclass 6, count 2 2006.230.00:26:18.37#ibcon#about to read 6, iclass 6, count 2 2006.230.00:26:18.37#ibcon#read 6, iclass 6, count 2 2006.230.00:26:18.37#ibcon#end of sib2, iclass 6, count 2 2006.230.00:26:18.37#ibcon#*after write, iclass 6, count 2 2006.230.00:26:18.37#ibcon#*before return 0, iclass 6, count 2 2006.230.00:26:18.37#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:18.37#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:18.37#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.00:26:18.37#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:18.37#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:18.49#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:18.49#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:18.49#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:26:18.49#ibcon#first serial, iclass 6, count 0 2006.230.00:26:18.49#ibcon#enter sib2, iclass 6, count 0 2006.230.00:26:18.49#ibcon#flushed, iclass 6, count 0 2006.230.00:26:18.49#ibcon#about to write, iclass 6, count 0 2006.230.00:26:18.49#ibcon#wrote, iclass 6, count 0 2006.230.00:26:18.49#ibcon#about to read 3, iclass 6, count 0 2006.230.00:26:18.51#ibcon#read 3, iclass 6, count 0 2006.230.00:26:18.51#ibcon#about to read 4, iclass 6, count 0 2006.230.00:26:18.51#ibcon#read 4, iclass 6, count 0 2006.230.00:26:18.51#ibcon#about to read 5, iclass 6, count 0 2006.230.00:26:18.51#ibcon#read 5, iclass 6, count 0 2006.230.00:26:18.51#ibcon#about to read 6, iclass 6, count 0 2006.230.00:26:18.51#ibcon#read 6, iclass 6, count 0 2006.230.00:26:18.51#ibcon#end of sib2, iclass 6, count 0 2006.230.00:26:18.51#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:26:18.51#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:26:18.51#ibcon#[25=USB\r\n] 2006.230.00:26:18.51#ibcon#*before write, iclass 6, count 0 2006.230.00:26:18.51#ibcon#enter sib2, iclass 6, count 0 2006.230.00:26:18.51#ibcon#flushed, iclass 6, count 0 2006.230.00:26:18.51#ibcon#about to write, iclass 6, count 0 2006.230.00:26:18.51#ibcon#wrote, iclass 6, count 0 2006.230.00:26:18.51#ibcon#about to read 3, iclass 6, count 0 2006.230.00:26:18.54#ibcon#read 3, iclass 6, count 0 2006.230.00:26:18.54#ibcon#about to read 4, iclass 6, count 0 2006.230.00:26:18.54#ibcon#read 4, iclass 6, count 0 2006.230.00:26:18.54#ibcon#about to read 5, iclass 6, count 0 2006.230.00:26:18.54#ibcon#read 5, iclass 6, count 0 2006.230.00:26:18.54#ibcon#about to read 6, iclass 6, count 0 2006.230.00:26:18.54#ibcon#read 6, iclass 6, count 0 2006.230.00:26:18.54#ibcon#end of sib2, iclass 6, count 0 2006.230.00:26:18.54#ibcon#*after write, iclass 6, count 0 2006.230.00:26:18.54#ibcon#*before return 0, iclass 6, count 0 2006.230.00:26:18.54#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:18.54#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:18.54#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:26:18.54#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:26:18.54$vck44/valo=2,534.99 2006.230.00:26:18.54#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.00:26:18.54#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.00:26:18.54#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:18.54#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:18.54#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:18.54#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:18.54#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:26:18.54#ibcon#first serial, iclass 10, count 0 2006.230.00:26:18.54#ibcon#enter sib2, iclass 10, count 0 2006.230.00:26:18.54#ibcon#flushed, iclass 10, count 0 2006.230.00:26:18.54#ibcon#about to write, iclass 10, count 0 2006.230.00:26:18.54#ibcon#wrote, iclass 10, count 0 2006.230.00:26:18.54#ibcon#about to read 3, iclass 10, count 0 2006.230.00:26:18.56#ibcon#read 3, iclass 10, count 0 2006.230.00:26:18.56#ibcon#about to read 4, iclass 10, count 0 2006.230.00:26:18.56#ibcon#read 4, iclass 10, count 0 2006.230.00:26:18.56#ibcon#about to read 5, iclass 10, count 0 2006.230.00:26:18.56#ibcon#read 5, iclass 10, count 0 2006.230.00:26:18.56#ibcon#about to read 6, iclass 10, count 0 2006.230.00:26:18.56#ibcon#read 6, iclass 10, count 0 2006.230.00:26:18.56#ibcon#end of sib2, iclass 10, count 0 2006.230.00:26:18.56#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:26:18.56#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:26:18.56#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:26:18.56#ibcon#*before write, iclass 10, count 0 2006.230.00:26:18.56#ibcon#enter sib2, iclass 10, count 0 2006.230.00:26:18.56#ibcon#flushed, iclass 10, count 0 2006.230.00:26:18.56#ibcon#about to write, iclass 10, count 0 2006.230.00:26:18.56#ibcon#wrote, iclass 10, count 0 2006.230.00:26:18.56#ibcon#about to read 3, iclass 10, count 0 2006.230.00:26:18.60#ibcon#read 3, iclass 10, count 0 2006.230.00:26:18.60#ibcon#about to read 4, iclass 10, count 0 2006.230.00:26:18.60#ibcon#read 4, iclass 10, count 0 2006.230.00:26:18.60#ibcon#about to read 5, iclass 10, count 0 2006.230.00:26:18.60#ibcon#read 5, iclass 10, count 0 2006.230.00:26:18.60#ibcon#about to read 6, iclass 10, count 0 2006.230.00:26:18.60#ibcon#read 6, iclass 10, count 0 2006.230.00:26:18.60#ibcon#end of sib2, iclass 10, count 0 2006.230.00:26:18.60#ibcon#*after write, iclass 10, count 0 2006.230.00:26:18.60#ibcon#*before return 0, iclass 10, count 0 2006.230.00:26:18.60#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:18.60#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:18.60#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:26:18.60#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:26:18.60$vck44/va=2,7 2006.230.00:26:18.60#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.00:26:18.60#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.00:26:18.60#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:18.60#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:18.66#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:18.66#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:18.66#ibcon#enter wrdev, iclass 12, count 2 2006.230.00:26:18.66#ibcon#first serial, iclass 12, count 2 2006.230.00:26:18.66#ibcon#enter sib2, iclass 12, count 2 2006.230.00:26:18.66#ibcon#flushed, iclass 12, count 2 2006.230.00:26:18.66#ibcon#about to write, iclass 12, count 2 2006.230.00:26:18.66#ibcon#wrote, iclass 12, count 2 2006.230.00:26:18.66#ibcon#about to read 3, iclass 12, count 2 2006.230.00:26:18.68#ibcon#read 3, iclass 12, count 2 2006.230.00:26:18.68#ibcon#about to read 4, iclass 12, count 2 2006.230.00:26:18.68#ibcon#read 4, iclass 12, count 2 2006.230.00:26:18.68#ibcon#about to read 5, iclass 12, count 2 2006.230.00:26:18.68#ibcon#read 5, iclass 12, count 2 2006.230.00:26:18.68#ibcon#about to read 6, iclass 12, count 2 2006.230.00:26:18.68#ibcon#read 6, iclass 12, count 2 2006.230.00:26:18.68#ibcon#end of sib2, iclass 12, count 2 2006.230.00:26:18.68#ibcon#*mode == 0, iclass 12, count 2 2006.230.00:26:18.68#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.00:26:18.68#ibcon#[25=AT02-07\r\n] 2006.230.00:26:18.68#ibcon#*before write, iclass 12, count 2 2006.230.00:26:18.68#ibcon#enter sib2, iclass 12, count 2 2006.230.00:26:18.68#ibcon#flushed, iclass 12, count 2 2006.230.00:26:18.68#ibcon#about to write, iclass 12, count 2 2006.230.00:26:18.68#ibcon#wrote, iclass 12, count 2 2006.230.00:26:18.68#ibcon#about to read 3, iclass 12, count 2 2006.230.00:26:18.71#ibcon#read 3, iclass 12, count 2 2006.230.00:26:18.71#ibcon#about to read 4, iclass 12, count 2 2006.230.00:26:18.71#ibcon#read 4, iclass 12, count 2 2006.230.00:26:18.71#ibcon#about to read 5, iclass 12, count 2 2006.230.00:26:18.71#ibcon#read 5, iclass 12, count 2 2006.230.00:26:18.71#ibcon#about to read 6, iclass 12, count 2 2006.230.00:26:18.71#ibcon#read 6, iclass 12, count 2 2006.230.00:26:18.71#ibcon#end of sib2, iclass 12, count 2 2006.230.00:26:18.71#ibcon#*after write, iclass 12, count 2 2006.230.00:26:18.71#ibcon#*before return 0, iclass 12, count 2 2006.230.00:26:18.71#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:18.71#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:18.71#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.00:26:18.71#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:18.71#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:18.83#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:18.83#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:18.83#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:26:18.83#ibcon#first serial, iclass 12, count 0 2006.230.00:26:18.83#ibcon#enter sib2, iclass 12, count 0 2006.230.00:26:18.83#ibcon#flushed, iclass 12, count 0 2006.230.00:26:18.83#ibcon#about to write, iclass 12, count 0 2006.230.00:26:18.83#ibcon#wrote, iclass 12, count 0 2006.230.00:26:18.83#ibcon#about to read 3, iclass 12, count 0 2006.230.00:26:18.85#ibcon#read 3, iclass 12, count 0 2006.230.00:26:18.85#ibcon#about to read 4, iclass 12, count 0 2006.230.00:26:18.85#ibcon#read 4, iclass 12, count 0 2006.230.00:26:18.85#ibcon#about to read 5, iclass 12, count 0 2006.230.00:26:18.85#ibcon#read 5, iclass 12, count 0 2006.230.00:26:18.85#ibcon#about to read 6, iclass 12, count 0 2006.230.00:26:18.85#ibcon#read 6, iclass 12, count 0 2006.230.00:26:18.85#ibcon#end of sib2, iclass 12, count 0 2006.230.00:26:18.85#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:26:18.85#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:26:18.85#ibcon#[25=USB\r\n] 2006.230.00:26:18.85#ibcon#*before write, iclass 12, count 0 2006.230.00:26:18.85#ibcon#enter sib2, iclass 12, count 0 2006.230.00:26:18.85#ibcon#flushed, iclass 12, count 0 2006.230.00:26:18.85#ibcon#about to write, iclass 12, count 0 2006.230.00:26:18.85#ibcon#wrote, iclass 12, count 0 2006.230.00:26:18.85#ibcon#about to read 3, iclass 12, count 0 2006.230.00:26:18.88#ibcon#read 3, iclass 12, count 0 2006.230.00:26:18.88#ibcon#about to read 4, iclass 12, count 0 2006.230.00:26:18.88#ibcon#read 4, iclass 12, count 0 2006.230.00:26:18.88#ibcon#about to read 5, iclass 12, count 0 2006.230.00:26:18.88#ibcon#read 5, iclass 12, count 0 2006.230.00:26:18.88#ibcon#about to read 6, iclass 12, count 0 2006.230.00:26:18.88#ibcon#read 6, iclass 12, count 0 2006.230.00:26:18.88#ibcon#end of sib2, iclass 12, count 0 2006.230.00:26:18.88#ibcon#*after write, iclass 12, count 0 2006.230.00:26:18.88#ibcon#*before return 0, iclass 12, count 0 2006.230.00:26:18.88#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:18.88#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:18.88#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:26:18.88#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:26:18.88$vck44/valo=3,564.99 2006.230.00:26:18.88#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.00:26:18.88#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.00:26:18.88#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:18.88#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:18.88#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:18.88#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:18.88#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:26:18.88#ibcon#first serial, iclass 14, count 0 2006.230.00:26:18.88#ibcon#enter sib2, iclass 14, count 0 2006.230.00:26:18.88#ibcon#flushed, iclass 14, count 0 2006.230.00:26:18.88#ibcon#about to write, iclass 14, count 0 2006.230.00:26:18.88#ibcon#wrote, iclass 14, count 0 2006.230.00:26:18.88#ibcon#about to read 3, iclass 14, count 0 2006.230.00:26:18.90#ibcon#read 3, iclass 14, count 0 2006.230.00:26:18.90#ibcon#about to read 4, iclass 14, count 0 2006.230.00:26:18.90#ibcon#read 4, iclass 14, count 0 2006.230.00:26:18.90#ibcon#about to read 5, iclass 14, count 0 2006.230.00:26:18.90#ibcon#read 5, iclass 14, count 0 2006.230.00:26:18.90#ibcon#about to read 6, iclass 14, count 0 2006.230.00:26:18.90#ibcon#read 6, iclass 14, count 0 2006.230.00:26:18.90#ibcon#end of sib2, iclass 14, count 0 2006.230.00:26:18.90#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:26:18.90#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:26:18.90#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:26:18.90#ibcon#*before write, iclass 14, count 0 2006.230.00:26:18.90#ibcon#enter sib2, iclass 14, count 0 2006.230.00:26:18.90#ibcon#flushed, iclass 14, count 0 2006.230.00:26:18.90#ibcon#about to write, iclass 14, count 0 2006.230.00:26:18.90#ibcon#wrote, iclass 14, count 0 2006.230.00:26:18.90#ibcon#about to read 3, iclass 14, count 0 2006.230.00:26:18.94#ibcon#read 3, iclass 14, count 0 2006.230.00:26:18.94#ibcon#about to read 4, iclass 14, count 0 2006.230.00:26:18.94#ibcon#read 4, iclass 14, count 0 2006.230.00:26:18.94#ibcon#about to read 5, iclass 14, count 0 2006.230.00:26:18.94#ibcon#read 5, iclass 14, count 0 2006.230.00:26:18.94#ibcon#about to read 6, iclass 14, count 0 2006.230.00:26:18.94#ibcon#read 6, iclass 14, count 0 2006.230.00:26:18.94#ibcon#end of sib2, iclass 14, count 0 2006.230.00:26:18.94#ibcon#*after write, iclass 14, count 0 2006.230.00:26:18.94#ibcon#*before return 0, iclass 14, count 0 2006.230.00:26:18.94#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:18.94#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:18.94#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:26:18.94#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:26:18.94$vck44/va=3,6 2006.230.00:26:18.94#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.00:26:18.94#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.00:26:18.94#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:18.94#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:19.00#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:19.00#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:19.00#ibcon#enter wrdev, iclass 16, count 2 2006.230.00:26:19.00#ibcon#first serial, iclass 16, count 2 2006.230.00:26:19.00#ibcon#enter sib2, iclass 16, count 2 2006.230.00:26:19.00#ibcon#flushed, iclass 16, count 2 2006.230.00:26:19.00#ibcon#about to write, iclass 16, count 2 2006.230.00:26:19.00#ibcon#wrote, iclass 16, count 2 2006.230.00:26:19.00#ibcon#about to read 3, iclass 16, count 2 2006.230.00:26:19.02#ibcon#read 3, iclass 16, count 2 2006.230.00:26:19.02#ibcon#about to read 4, iclass 16, count 2 2006.230.00:26:19.02#ibcon#read 4, iclass 16, count 2 2006.230.00:26:19.02#ibcon#about to read 5, iclass 16, count 2 2006.230.00:26:19.02#ibcon#read 5, iclass 16, count 2 2006.230.00:26:19.02#ibcon#about to read 6, iclass 16, count 2 2006.230.00:26:19.02#ibcon#read 6, iclass 16, count 2 2006.230.00:26:19.02#ibcon#end of sib2, iclass 16, count 2 2006.230.00:26:19.02#ibcon#*mode == 0, iclass 16, count 2 2006.230.00:26:19.02#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.00:26:19.02#ibcon#[25=AT03-06\r\n] 2006.230.00:26:19.02#ibcon#*before write, iclass 16, count 2 2006.230.00:26:19.02#ibcon#enter sib2, iclass 16, count 2 2006.230.00:26:19.02#ibcon#flushed, iclass 16, count 2 2006.230.00:26:19.02#ibcon#about to write, iclass 16, count 2 2006.230.00:26:19.02#ibcon#wrote, iclass 16, count 2 2006.230.00:26:19.02#ibcon#about to read 3, iclass 16, count 2 2006.230.00:26:19.05#ibcon#read 3, iclass 16, count 2 2006.230.00:26:19.05#ibcon#about to read 4, iclass 16, count 2 2006.230.00:26:19.05#ibcon#read 4, iclass 16, count 2 2006.230.00:26:19.05#ibcon#about to read 5, iclass 16, count 2 2006.230.00:26:19.05#ibcon#read 5, iclass 16, count 2 2006.230.00:26:19.05#ibcon#about to read 6, iclass 16, count 2 2006.230.00:26:19.05#ibcon#read 6, iclass 16, count 2 2006.230.00:26:19.05#ibcon#end of sib2, iclass 16, count 2 2006.230.00:26:19.05#ibcon#*after write, iclass 16, count 2 2006.230.00:26:19.05#ibcon#*before return 0, iclass 16, count 2 2006.230.00:26:19.05#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:19.05#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:19.05#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.00:26:19.05#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:19.05#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:19.17#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:19.17#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:19.17#ibcon#enter wrdev, iclass 16, count 0 2006.230.00:26:19.17#ibcon#first serial, iclass 16, count 0 2006.230.00:26:19.17#ibcon#enter sib2, iclass 16, count 0 2006.230.00:26:19.17#ibcon#flushed, iclass 16, count 0 2006.230.00:26:19.17#ibcon#about to write, iclass 16, count 0 2006.230.00:26:19.17#ibcon#wrote, iclass 16, count 0 2006.230.00:26:19.17#ibcon#about to read 3, iclass 16, count 0 2006.230.00:26:19.19#ibcon#read 3, iclass 16, count 0 2006.230.00:26:19.19#ibcon#about to read 4, iclass 16, count 0 2006.230.00:26:19.19#ibcon#read 4, iclass 16, count 0 2006.230.00:26:19.19#ibcon#about to read 5, iclass 16, count 0 2006.230.00:26:19.19#ibcon#read 5, iclass 16, count 0 2006.230.00:26:19.19#ibcon#about to read 6, iclass 16, count 0 2006.230.00:26:19.19#ibcon#read 6, iclass 16, count 0 2006.230.00:26:19.19#ibcon#end of sib2, iclass 16, count 0 2006.230.00:26:19.19#ibcon#*mode == 0, iclass 16, count 0 2006.230.00:26:19.19#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.00:26:19.19#ibcon#[25=USB\r\n] 2006.230.00:26:19.19#ibcon#*before write, iclass 16, count 0 2006.230.00:26:19.19#ibcon#enter sib2, iclass 16, count 0 2006.230.00:26:19.19#ibcon#flushed, iclass 16, count 0 2006.230.00:26:19.19#ibcon#about to write, iclass 16, count 0 2006.230.00:26:19.19#ibcon#wrote, iclass 16, count 0 2006.230.00:26:19.19#ibcon#about to read 3, iclass 16, count 0 2006.230.00:26:19.22#ibcon#read 3, iclass 16, count 0 2006.230.00:26:19.22#ibcon#about to read 4, iclass 16, count 0 2006.230.00:26:19.22#ibcon#read 4, iclass 16, count 0 2006.230.00:26:19.22#ibcon#about to read 5, iclass 16, count 0 2006.230.00:26:19.22#ibcon#read 5, iclass 16, count 0 2006.230.00:26:19.22#ibcon#about to read 6, iclass 16, count 0 2006.230.00:26:19.22#ibcon#read 6, iclass 16, count 0 2006.230.00:26:19.22#ibcon#end of sib2, iclass 16, count 0 2006.230.00:26:19.22#ibcon#*after write, iclass 16, count 0 2006.230.00:26:19.22#ibcon#*before return 0, iclass 16, count 0 2006.230.00:26:19.22#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:19.22#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:19.22#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.00:26:19.22#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.00:26:19.22$vck44/valo=4,624.99 2006.230.00:26:19.22#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.00:26:19.22#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.00:26:19.22#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:19.22#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:19.22#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:19.22#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:19.22#ibcon#enter wrdev, iclass 18, count 0 2006.230.00:26:19.22#ibcon#first serial, iclass 18, count 0 2006.230.00:26:19.22#ibcon#enter sib2, iclass 18, count 0 2006.230.00:26:19.22#ibcon#flushed, iclass 18, count 0 2006.230.00:26:19.22#ibcon#about to write, iclass 18, count 0 2006.230.00:26:19.22#ibcon#wrote, iclass 18, count 0 2006.230.00:26:19.22#ibcon#about to read 3, iclass 18, count 0 2006.230.00:26:19.24#ibcon#read 3, iclass 18, count 0 2006.230.00:26:19.24#ibcon#about to read 4, iclass 18, count 0 2006.230.00:26:19.24#ibcon#read 4, iclass 18, count 0 2006.230.00:26:19.24#ibcon#about to read 5, iclass 18, count 0 2006.230.00:26:19.24#ibcon#read 5, iclass 18, count 0 2006.230.00:26:19.24#ibcon#about to read 6, iclass 18, count 0 2006.230.00:26:19.24#ibcon#read 6, iclass 18, count 0 2006.230.00:26:19.24#ibcon#end of sib2, iclass 18, count 0 2006.230.00:26:19.24#ibcon#*mode == 0, iclass 18, count 0 2006.230.00:26:19.24#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.00:26:19.24#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:26:19.24#ibcon#*before write, iclass 18, count 0 2006.230.00:26:19.24#ibcon#enter sib2, iclass 18, count 0 2006.230.00:26:19.24#ibcon#flushed, iclass 18, count 0 2006.230.00:26:19.24#ibcon#about to write, iclass 18, count 0 2006.230.00:26:19.24#ibcon#wrote, iclass 18, count 0 2006.230.00:26:19.24#ibcon#about to read 3, iclass 18, count 0 2006.230.00:26:19.28#ibcon#read 3, iclass 18, count 0 2006.230.00:26:19.28#ibcon#about to read 4, iclass 18, count 0 2006.230.00:26:19.28#ibcon#read 4, iclass 18, count 0 2006.230.00:26:19.28#ibcon#about to read 5, iclass 18, count 0 2006.230.00:26:19.28#ibcon#read 5, iclass 18, count 0 2006.230.00:26:19.28#ibcon#about to read 6, iclass 18, count 0 2006.230.00:26:19.28#ibcon#read 6, iclass 18, count 0 2006.230.00:26:19.28#ibcon#end of sib2, iclass 18, count 0 2006.230.00:26:19.28#ibcon#*after write, iclass 18, count 0 2006.230.00:26:19.28#ibcon#*before return 0, iclass 18, count 0 2006.230.00:26:19.28#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:19.28#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:19.28#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.00:26:19.28#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.00:26:19.28$vck44/va=4,7 2006.230.00:26:19.28#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.00:26:19.28#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.00:26:19.28#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:19.28#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:19.34#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:19.34#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:19.34#ibcon#enter wrdev, iclass 20, count 2 2006.230.00:26:19.34#ibcon#first serial, iclass 20, count 2 2006.230.00:26:19.34#ibcon#enter sib2, iclass 20, count 2 2006.230.00:26:19.34#ibcon#flushed, iclass 20, count 2 2006.230.00:26:19.34#ibcon#about to write, iclass 20, count 2 2006.230.00:26:19.34#ibcon#wrote, iclass 20, count 2 2006.230.00:26:19.34#ibcon#about to read 3, iclass 20, count 2 2006.230.00:26:19.36#ibcon#read 3, iclass 20, count 2 2006.230.00:26:19.36#ibcon#about to read 4, iclass 20, count 2 2006.230.00:26:19.36#ibcon#read 4, iclass 20, count 2 2006.230.00:26:19.36#ibcon#about to read 5, iclass 20, count 2 2006.230.00:26:19.36#ibcon#read 5, iclass 20, count 2 2006.230.00:26:19.36#ibcon#about to read 6, iclass 20, count 2 2006.230.00:26:19.36#ibcon#read 6, iclass 20, count 2 2006.230.00:26:19.36#ibcon#end of sib2, iclass 20, count 2 2006.230.00:26:19.36#ibcon#*mode == 0, iclass 20, count 2 2006.230.00:26:19.36#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.00:26:19.36#ibcon#[25=AT04-07\r\n] 2006.230.00:26:19.36#ibcon#*before write, iclass 20, count 2 2006.230.00:26:19.36#ibcon#enter sib2, iclass 20, count 2 2006.230.00:26:19.36#ibcon#flushed, iclass 20, count 2 2006.230.00:26:19.36#ibcon#about to write, iclass 20, count 2 2006.230.00:26:19.36#ibcon#wrote, iclass 20, count 2 2006.230.00:26:19.36#ibcon#about to read 3, iclass 20, count 2 2006.230.00:26:19.39#ibcon#read 3, iclass 20, count 2 2006.230.00:26:19.39#ibcon#about to read 4, iclass 20, count 2 2006.230.00:26:19.39#ibcon#read 4, iclass 20, count 2 2006.230.00:26:19.39#ibcon#about to read 5, iclass 20, count 2 2006.230.00:26:19.39#ibcon#read 5, iclass 20, count 2 2006.230.00:26:19.39#ibcon#about to read 6, iclass 20, count 2 2006.230.00:26:19.39#ibcon#read 6, iclass 20, count 2 2006.230.00:26:19.39#ibcon#end of sib2, iclass 20, count 2 2006.230.00:26:19.39#ibcon#*after write, iclass 20, count 2 2006.230.00:26:19.40#ibcon#*before return 0, iclass 20, count 2 2006.230.00:26:19.40#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:19.40#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:19.40#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.00:26:19.40#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:19.40#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:19.52#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:19.52#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:19.52#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:26:19.52#ibcon#first serial, iclass 20, count 0 2006.230.00:26:19.52#ibcon#enter sib2, iclass 20, count 0 2006.230.00:26:19.52#ibcon#flushed, iclass 20, count 0 2006.230.00:26:19.52#ibcon#about to write, iclass 20, count 0 2006.230.00:26:19.52#ibcon#wrote, iclass 20, count 0 2006.230.00:26:19.52#ibcon#about to read 3, iclass 20, count 0 2006.230.00:26:19.54#ibcon#read 3, iclass 20, count 0 2006.230.00:26:19.54#ibcon#about to read 4, iclass 20, count 0 2006.230.00:26:19.54#ibcon#read 4, iclass 20, count 0 2006.230.00:26:19.54#ibcon#about to read 5, iclass 20, count 0 2006.230.00:26:19.54#ibcon#read 5, iclass 20, count 0 2006.230.00:26:19.54#ibcon#about to read 6, iclass 20, count 0 2006.230.00:26:19.54#ibcon#read 6, iclass 20, count 0 2006.230.00:26:19.54#ibcon#end of sib2, iclass 20, count 0 2006.230.00:26:19.54#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:26:19.54#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:26:19.54#ibcon#[25=USB\r\n] 2006.230.00:26:19.54#ibcon#*before write, iclass 20, count 0 2006.230.00:26:19.54#ibcon#enter sib2, iclass 20, count 0 2006.230.00:26:19.54#ibcon#flushed, iclass 20, count 0 2006.230.00:26:19.54#ibcon#about to write, iclass 20, count 0 2006.230.00:26:19.54#ibcon#wrote, iclass 20, count 0 2006.230.00:26:19.54#ibcon#about to read 3, iclass 20, count 0 2006.230.00:26:19.57#ibcon#read 3, iclass 20, count 0 2006.230.00:26:19.57#ibcon#about to read 4, iclass 20, count 0 2006.230.00:26:19.57#ibcon#read 4, iclass 20, count 0 2006.230.00:26:19.57#ibcon#about to read 5, iclass 20, count 0 2006.230.00:26:19.57#ibcon#read 5, iclass 20, count 0 2006.230.00:26:19.57#ibcon#about to read 6, iclass 20, count 0 2006.230.00:26:19.57#ibcon#read 6, iclass 20, count 0 2006.230.00:26:19.57#ibcon#end of sib2, iclass 20, count 0 2006.230.00:26:19.57#ibcon#*after write, iclass 20, count 0 2006.230.00:26:19.57#ibcon#*before return 0, iclass 20, count 0 2006.230.00:26:19.57#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:19.57#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:19.57#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:26:19.57#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:26:19.57$vck44/valo=5,734.99 2006.230.00:26:19.57#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.00:26:19.57#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.00:26:19.57#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:19.57#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:19.57#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:19.57#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:19.57#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:26:19.57#ibcon#first serial, iclass 22, count 0 2006.230.00:26:19.57#ibcon#enter sib2, iclass 22, count 0 2006.230.00:26:19.57#ibcon#flushed, iclass 22, count 0 2006.230.00:26:19.57#ibcon#about to write, iclass 22, count 0 2006.230.00:26:19.57#ibcon#wrote, iclass 22, count 0 2006.230.00:26:19.57#ibcon#about to read 3, iclass 22, count 0 2006.230.00:26:19.59#ibcon#read 3, iclass 22, count 0 2006.230.00:26:19.59#ibcon#about to read 4, iclass 22, count 0 2006.230.00:26:19.59#ibcon#read 4, iclass 22, count 0 2006.230.00:26:19.59#ibcon#about to read 5, iclass 22, count 0 2006.230.00:26:19.59#ibcon#read 5, iclass 22, count 0 2006.230.00:26:19.59#ibcon#about to read 6, iclass 22, count 0 2006.230.00:26:19.59#ibcon#read 6, iclass 22, count 0 2006.230.00:26:19.59#ibcon#end of sib2, iclass 22, count 0 2006.230.00:26:19.59#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:26:19.59#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:26:19.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:26:19.59#ibcon#*before write, iclass 22, count 0 2006.230.00:26:19.59#ibcon#enter sib2, iclass 22, count 0 2006.230.00:26:19.59#ibcon#flushed, iclass 22, count 0 2006.230.00:26:19.59#ibcon#about to write, iclass 22, count 0 2006.230.00:26:19.59#ibcon#wrote, iclass 22, count 0 2006.230.00:26:19.59#ibcon#about to read 3, iclass 22, count 0 2006.230.00:26:19.63#ibcon#read 3, iclass 22, count 0 2006.230.00:26:19.63#ibcon#about to read 4, iclass 22, count 0 2006.230.00:26:19.63#ibcon#read 4, iclass 22, count 0 2006.230.00:26:19.63#ibcon#about to read 5, iclass 22, count 0 2006.230.00:26:19.63#ibcon#read 5, iclass 22, count 0 2006.230.00:26:19.63#ibcon#about to read 6, iclass 22, count 0 2006.230.00:26:19.63#ibcon#read 6, iclass 22, count 0 2006.230.00:26:19.63#ibcon#end of sib2, iclass 22, count 0 2006.230.00:26:19.63#ibcon#*after write, iclass 22, count 0 2006.230.00:26:19.63#ibcon#*before return 0, iclass 22, count 0 2006.230.00:26:19.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:19.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:19.63#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:26:19.63#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:26:19.63$vck44/va=5,4 2006.230.00:26:19.63#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.00:26:19.63#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.00:26:19.63#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:19.63#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:19.69#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:19.69#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:19.69#ibcon#enter wrdev, iclass 24, count 2 2006.230.00:26:19.69#ibcon#first serial, iclass 24, count 2 2006.230.00:26:19.69#ibcon#enter sib2, iclass 24, count 2 2006.230.00:26:19.69#ibcon#flushed, iclass 24, count 2 2006.230.00:26:19.69#ibcon#about to write, iclass 24, count 2 2006.230.00:26:19.69#ibcon#wrote, iclass 24, count 2 2006.230.00:26:19.69#ibcon#about to read 3, iclass 24, count 2 2006.230.00:26:19.71#ibcon#read 3, iclass 24, count 2 2006.230.00:26:19.71#ibcon#about to read 4, iclass 24, count 2 2006.230.00:26:19.71#ibcon#read 4, iclass 24, count 2 2006.230.00:26:19.71#ibcon#about to read 5, iclass 24, count 2 2006.230.00:26:19.71#ibcon#read 5, iclass 24, count 2 2006.230.00:26:19.71#ibcon#about to read 6, iclass 24, count 2 2006.230.00:26:19.71#ibcon#read 6, iclass 24, count 2 2006.230.00:26:19.71#ibcon#end of sib2, iclass 24, count 2 2006.230.00:26:19.71#ibcon#*mode == 0, iclass 24, count 2 2006.230.00:26:19.71#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.00:26:19.71#ibcon#[25=AT05-04\r\n] 2006.230.00:26:19.71#ibcon#*before write, iclass 24, count 2 2006.230.00:26:19.71#ibcon#enter sib2, iclass 24, count 2 2006.230.00:26:19.71#ibcon#flushed, iclass 24, count 2 2006.230.00:26:19.71#ibcon#about to write, iclass 24, count 2 2006.230.00:26:19.71#ibcon#wrote, iclass 24, count 2 2006.230.00:26:19.71#ibcon#about to read 3, iclass 24, count 2 2006.230.00:26:19.74#ibcon#read 3, iclass 24, count 2 2006.230.00:26:19.74#ibcon#about to read 4, iclass 24, count 2 2006.230.00:26:19.74#ibcon#read 4, iclass 24, count 2 2006.230.00:26:19.74#ibcon#about to read 5, iclass 24, count 2 2006.230.00:26:19.74#ibcon#read 5, iclass 24, count 2 2006.230.00:26:19.74#ibcon#about to read 6, iclass 24, count 2 2006.230.00:26:19.74#ibcon#read 6, iclass 24, count 2 2006.230.00:26:19.74#ibcon#end of sib2, iclass 24, count 2 2006.230.00:26:19.74#ibcon#*after write, iclass 24, count 2 2006.230.00:26:19.74#ibcon#*before return 0, iclass 24, count 2 2006.230.00:26:19.74#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:19.74#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:19.74#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.00:26:19.74#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:19.74#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:19.86#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:19.86#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:19.86#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:26:19.86#ibcon#first serial, iclass 24, count 0 2006.230.00:26:19.86#ibcon#enter sib2, iclass 24, count 0 2006.230.00:26:19.86#ibcon#flushed, iclass 24, count 0 2006.230.00:26:19.86#ibcon#about to write, iclass 24, count 0 2006.230.00:26:19.86#ibcon#wrote, iclass 24, count 0 2006.230.00:26:19.86#ibcon#about to read 3, iclass 24, count 0 2006.230.00:26:19.88#ibcon#read 3, iclass 24, count 0 2006.230.00:26:19.88#ibcon#about to read 4, iclass 24, count 0 2006.230.00:26:19.88#ibcon#read 4, iclass 24, count 0 2006.230.00:26:19.88#ibcon#about to read 5, iclass 24, count 0 2006.230.00:26:19.88#ibcon#read 5, iclass 24, count 0 2006.230.00:26:19.88#ibcon#about to read 6, iclass 24, count 0 2006.230.00:26:19.88#ibcon#read 6, iclass 24, count 0 2006.230.00:26:19.88#ibcon#end of sib2, iclass 24, count 0 2006.230.00:26:19.88#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:26:19.88#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:26:19.88#ibcon#[25=USB\r\n] 2006.230.00:26:19.88#ibcon#*before write, iclass 24, count 0 2006.230.00:26:19.88#ibcon#enter sib2, iclass 24, count 0 2006.230.00:26:19.88#ibcon#flushed, iclass 24, count 0 2006.230.00:26:19.88#ibcon#about to write, iclass 24, count 0 2006.230.00:26:19.88#ibcon#wrote, iclass 24, count 0 2006.230.00:26:19.88#ibcon#about to read 3, iclass 24, count 0 2006.230.00:26:19.91#ibcon#read 3, iclass 24, count 0 2006.230.00:26:19.91#ibcon#about to read 4, iclass 24, count 0 2006.230.00:26:19.91#ibcon#read 4, iclass 24, count 0 2006.230.00:26:19.91#ibcon#about to read 5, iclass 24, count 0 2006.230.00:26:19.91#ibcon#read 5, iclass 24, count 0 2006.230.00:26:19.91#ibcon#about to read 6, iclass 24, count 0 2006.230.00:26:19.91#ibcon#read 6, iclass 24, count 0 2006.230.00:26:19.91#ibcon#end of sib2, iclass 24, count 0 2006.230.00:26:19.91#ibcon#*after write, iclass 24, count 0 2006.230.00:26:19.91#ibcon#*before return 0, iclass 24, count 0 2006.230.00:26:19.91#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:19.91#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:19.91#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:26:19.91#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:26:19.91$vck44/valo=6,814.99 2006.230.00:26:19.91#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.00:26:19.91#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.00:26:19.91#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:19.91#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:19.91#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:19.91#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:19.91#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:26:19.91#ibcon#first serial, iclass 26, count 0 2006.230.00:26:19.91#ibcon#enter sib2, iclass 26, count 0 2006.230.00:26:19.91#ibcon#flushed, iclass 26, count 0 2006.230.00:26:19.91#ibcon#about to write, iclass 26, count 0 2006.230.00:26:19.91#ibcon#wrote, iclass 26, count 0 2006.230.00:26:19.91#ibcon#about to read 3, iclass 26, count 0 2006.230.00:26:19.93#ibcon#read 3, iclass 26, count 0 2006.230.00:26:19.93#ibcon#about to read 4, iclass 26, count 0 2006.230.00:26:19.93#ibcon#read 4, iclass 26, count 0 2006.230.00:26:19.93#ibcon#about to read 5, iclass 26, count 0 2006.230.00:26:19.93#ibcon#read 5, iclass 26, count 0 2006.230.00:26:19.93#ibcon#about to read 6, iclass 26, count 0 2006.230.00:26:19.93#ibcon#read 6, iclass 26, count 0 2006.230.00:26:19.93#ibcon#end of sib2, iclass 26, count 0 2006.230.00:26:19.93#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:26:19.93#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:26:19.93#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:26:19.93#ibcon#*before write, iclass 26, count 0 2006.230.00:26:19.93#ibcon#enter sib2, iclass 26, count 0 2006.230.00:26:19.93#ibcon#flushed, iclass 26, count 0 2006.230.00:26:19.93#ibcon#about to write, iclass 26, count 0 2006.230.00:26:19.93#ibcon#wrote, iclass 26, count 0 2006.230.00:26:19.93#ibcon#about to read 3, iclass 26, count 0 2006.230.00:26:19.97#ibcon#read 3, iclass 26, count 0 2006.230.00:26:19.97#ibcon#about to read 4, iclass 26, count 0 2006.230.00:26:19.97#ibcon#read 4, iclass 26, count 0 2006.230.00:26:19.97#ibcon#about to read 5, iclass 26, count 0 2006.230.00:26:19.97#ibcon#read 5, iclass 26, count 0 2006.230.00:26:19.97#ibcon#about to read 6, iclass 26, count 0 2006.230.00:26:19.97#ibcon#read 6, iclass 26, count 0 2006.230.00:26:19.97#ibcon#end of sib2, iclass 26, count 0 2006.230.00:26:19.97#ibcon#*after write, iclass 26, count 0 2006.230.00:26:19.97#ibcon#*before return 0, iclass 26, count 0 2006.230.00:26:19.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:19.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:19.97#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:26:19.97#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:26:19.97$vck44/va=6,4 2006.230.00:26:19.97#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.00:26:19.97#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.00:26:19.97#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:19.97#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:20.03#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:20.03#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:20.03#ibcon#enter wrdev, iclass 28, count 2 2006.230.00:26:20.03#ibcon#first serial, iclass 28, count 2 2006.230.00:26:20.03#ibcon#enter sib2, iclass 28, count 2 2006.230.00:26:20.03#ibcon#flushed, iclass 28, count 2 2006.230.00:26:20.03#ibcon#about to write, iclass 28, count 2 2006.230.00:26:20.03#ibcon#wrote, iclass 28, count 2 2006.230.00:26:20.03#ibcon#about to read 3, iclass 28, count 2 2006.230.00:26:20.05#ibcon#read 3, iclass 28, count 2 2006.230.00:26:20.05#ibcon#about to read 4, iclass 28, count 2 2006.230.00:26:20.05#ibcon#read 4, iclass 28, count 2 2006.230.00:26:20.05#ibcon#about to read 5, iclass 28, count 2 2006.230.00:26:20.05#ibcon#read 5, iclass 28, count 2 2006.230.00:26:20.05#ibcon#about to read 6, iclass 28, count 2 2006.230.00:26:20.05#ibcon#read 6, iclass 28, count 2 2006.230.00:26:20.05#ibcon#end of sib2, iclass 28, count 2 2006.230.00:26:20.05#ibcon#*mode == 0, iclass 28, count 2 2006.230.00:26:20.05#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.00:26:20.05#ibcon#[25=AT06-04\r\n] 2006.230.00:26:20.05#ibcon#*before write, iclass 28, count 2 2006.230.00:26:20.05#ibcon#enter sib2, iclass 28, count 2 2006.230.00:26:20.05#ibcon#flushed, iclass 28, count 2 2006.230.00:26:20.05#ibcon#about to write, iclass 28, count 2 2006.230.00:26:20.05#ibcon#wrote, iclass 28, count 2 2006.230.00:26:20.05#ibcon#about to read 3, iclass 28, count 2 2006.230.00:26:20.08#ibcon#read 3, iclass 28, count 2 2006.230.00:26:20.08#ibcon#about to read 4, iclass 28, count 2 2006.230.00:26:20.08#ibcon#read 4, iclass 28, count 2 2006.230.00:26:20.08#ibcon#about to read 5, iclass 28, count 2 2006.230.00:26:20.08#ibcon#read 5, iclass 28, count 2 2006.230.00:26:20.08#ibcon#about to read 6, iclass 28, count 2 2006.230.00:26:20.08#ibcon#read 6, iclass 28, count 2 2006.230.00:26:20.08#ibcon#end of sib2, iclass 28, count 2 2006.230.00:26:20.08#ibcon#*after write, iclass 28, count 2 2006.230.00:26:20.08#ibcon#*before return 0, iclass 28, count 2 2006.230.00:26:20.08#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:20.08#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:20.08#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.00:26:20.08#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:20.08#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:20.20#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:20.20#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:20.20#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:26:20.20#ibcon#first serial, iclass 28, count 0 2006.230.00:26:20.20#ibcon#enter sib2, iclass 28, count 0 2006.230.00:26:20.20#ibcon#flushed, iclass 28, count 0 2006.230.00:26:20.20#ibcon#about to write, iclass 28, count 0 2006.230.00:26:20.20#ibcon#wrote, iclass 28, count 0 2006.230.00:26:20.20#ibcon#about to read 3, iclass 28, count 0 2006.230.00:26:20.22#ibcon#read 3, iclass 28, count 0 2006.230.00:26:20.22#ibcon#about to read 4, iclass 28, count 0 2006.230.00:26:20.22#ibcon#read 4, iclass 28, count 0 2006.230.00:26:20.22#ibcon#about to read 5, iclass 28, count 0 2006.230.00:26:20.22#ibcon#read 5, iclass 28, count 0 2006.230.00:26:20.22#ibcon#about to read 6, iclass 28, count 0 2006.230.00:26:20.22#ibcon#read 6, iclass 28, count 0 2006.230.00:26:20.22#ibcon#end of sib2, iclass 28, count 0 2006.230.00:26:20.22#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:26:20.22#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:26:20.22#ibcon#[25=USB\r\n] 2006.230.00:26:20.22#ibcon#*before write, iclass 28, count 0 2006.230.00:26:20.22#ibcon#enter sib2, iclass 28, count 0 2006.230.00:26:20.22#ibcon#flushed, iclass 28, count 0 2006.230.00:26:20.22#ibcon#about to write, iclass 28, count 0 2006.230.00:26:20.22#ibcon#wrote, iclass 28, count 0 2006.230.00:26:20.22#ibcon#about to read 3, iclass 28, count 0 2006.230.00:26:20.25#ibcon#read 3, iclass 28, count 0 2006.230.00:26:20.25#ibcon#about to read 4, iclass 28, count 0 2006.230.00:26:20.25#ibcon#read 4, iclass 28, count 0 2006.230.00:26:20.25#ibcon#about to read 5, iclass 28, count 0 2006.230.00:26:20.25#ibcon#read 5, iclass 28, count 0 2006.230.00:26:20.25#ibcon#about to read 6, iclass 28, count 0 2006.230.00:26:20.25#ibcon#read 6, iclass 28, count 0 2006.230.00:26:20.25#ibcon#end of sib2, iclass 28, count 0 2006.230.00:26:20.25#ibcon#*after write, iclass 28, count 0 2006.230.00:26:20.25#ibcon#*before return 0, iclass 28, count 0 2006.230.00:26:20.25#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:20.25#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:20.25#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:26:20.25#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:26:20.25$vck44/valo=7,864.99 2006.230.00:26:20.25#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.00:26:20.25#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.00:26:20.25#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:20.25#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:20.25#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:20.25#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:20.25#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:26:20.25#ibcon#first serial, iclass 30, count 0 2006.230.00:26:20.25#ibcon#enter sib2, iclass 30, count 0 2006.230.00:26:20.25#ibcon#flushed, iclass 30, count 0 2006.230.00:26:20.25#ibcon#about to write, iclass 30, count 0 2006.230.00:26:20.25#ibcon#wrote, iclass 30, count 0 2006.230.00:26:20.25#ibcon#about to read 3, iclass 30, count 0 2006.230.00:26:20.27#ibcon#read 3, iclass 30, count 0 2006.230.00:26:20.27#ibcon#about to read 4, iclass 30, count 0 2006.230.00:26:20.27#ibcon#read 4, iclass 30, count 0 2006.230.00:26:20.27#ibcon#about to read 5, iclass 30, count 0 2006.230.00:26:20.27#ibcon#read 5, iclass 30, count 0 2006.230.00:26:20.27#ibcon#about to read 6, iclass 30, count 0 2006.230.00:26:20.27#ibcon#read 6, iclass 30, count 0 2006.230.00:26:20.27#ibcon#end of sib2, iclass 30, count 0 2006.230.00:26:20.27#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:26:20.27#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:26:20.27#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:26:20.27#ibcon#*before write, iclass 30, count 0 2006.230.00:26:20.27#ibcon#enter sib2, iclass 30, count 0 2006.230.00:26:20.27#ibcon#flushed, iclass 30, count 0 2006.230.00:26:20.27#ibcon#about to write, iclass 30, count 0 2006.230.00:26:20.27#ibcon#wrote, iclass 30, count 0 2006.230.00:26:20.27#ibcon#about to read 3, iclass 30, count 0 2006.230.00:26:20.31#ibcon#read 3, iclass 30, count 0 2006.230.00:26:20.31#ibcon#about to read 4, iclass 30, count 0 2006.230.00:26:20.31#ibcon#read 4, iclass 30, count 0 2006.230.00:26:20.31#ibcon#about to read 5, iclass 30, count 0 2006.230.00:26:20.31#ibcon#read 5, iclass 30, count 0 2006.230.00:26:20.31#ibcon#about to read 6, iclass 30, count 0 2006.230.00:26:20.31#ibcon#read 6, iclass 30, count 0 2006.230.00:26:20.31#ibcon#end of sib2, iclass 30, count 0 2006.230.00:26:20.31#ibcon#*after write, iclass 30, count 0 2006.230.00:26:20.31#ibcon#*before return 0, iclass 30, count 0 2006.230.00:26:20.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:20.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:20.31#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:26:20.31#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:26:20.31$vck44/va=7,5 2006.230.00:26:20.31#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.00:26:20.31#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.00:26:20.31#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:20.31#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:20.37#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:20.37#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:20.37#ibcon#enter wrdev, iclass 32, count 2 2006.230.00:26:20.37#ibcon#first serial, iclass 32, count 2 2006.230.00:26:20.37#ibcon#enter sib2, iclass 32, count 2 2006.230.00:26:20.37#ibcon#flushed, iclass 32, count 2 2006.230.00:26:20.37#ibcon#about to write, iclass 32, count 2 2006.230.00:26:20.37#ibcon#wrote, iclass 32, count 2 2006.230.00:26:20.37#ibcon#about to read 3, iclass 32, count 2 2006.230.00:26:20.39#ibcon#read 3, iclass 32, count 2 2006.230.00:26:20.39#ibcon#about to read 4, iclass 32, count 2 2006.230.00:26:20.39#ibcon#read 4, iclass 32, count 2 2006.230.00:26:20.39#ibcon#about to read 5, iclass 32, count 2 2006.230.00:26:20.39#ibcon#read 5, iclass 32, count 2 2006.230.00:26:20.39#ibcon#about to read 6, iclass 32, count 2 2006.230.00:26:20.39#ibcon#read 6, iclass 32, count 2 2006.230.00:26:20.39#ibcon#end of sib2, iclass 32, count 2 2006.230.00:26:20.39#ibcon#*mode == 0, iclass 32, count 2 2006.230.00:26:20.39#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.00:26:20.39#ibcon#[25=AT07-05\r\n] 2006.230.00:26:20.39#ibcon#*before write, iclass 32, count 2 2006.230.00:26:20.39#ibcon#enter sib2, iclass 32, count 2 2006.230.00:26:20.39#ibcon#flushed, iclass 32, count 2 2006.230.00:26:20.39#ibcon#about to write, iclass 32, count 2 2006.230.00:26:20.39#ibcon#wrote, iclass 32, count 2 2006.230.00:26:20.39#ibcon#about to read 3, iclass 32, count 2 2006.230.00:26:20.42#ibcon#read 3, iclass 32, count 2 2006.230.00:26:20.42#ibcon#about to read 4, iclass 32, count 2 2006.230.00:26:20.42#ibcon#read 4, iclass 32, count 2 2006.230.00:26:20.42#ibcon#about to read 5, iclass 32, count 2 2006.230.00:26:20.42#ibcon#read 5, iclass 32, count 2 2006.230.00:26:20.42#ibcon#about to read 6, iclass 32, count 2 2006.230.00:26:20.42#ibcon#read 6, iclass 32, count 2 2006.230.00:26:20.42#ibcon#end of sib2, iclass 32, count 2 2006.230.00:26:20.42#ibcon#*after write, iclass 32, count 2 2006.230.00:26:20.42#ibcon#*before return 0, iclass 32, count 2 2006.230.00:26:20.42#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:20.42#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:20.42#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.00:26:20.42#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:20.42#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:20.54#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:20.54#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:20.54#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:26:20.54#ibcon#first serial, iclass 32, count 0 2006.230.00:26:20.54#ibcon#enter sib2, iclass 32, count 0 2006.230.00:26:20.54#ibcon#flushed, iclass 32, count 0 2006.230.00:26:20.54#ibcon#about to write, iclass 32, count 0 2006.230.00:26:20.54#ibcon#wrote, iclass 32, count 0 2006.230.00:26:20.54#ibcon#about to read 3, iclass 32, count 0 2006.230.00:26:20.56#ibcon#read 3, iclass 32, count 0 2006.230.00:26:20.56#ibcon#about to read 4, iclass 32, count 0 2006.230.00:26:20.56#ibcon#read 4, iclass 32, count 0 2006.230.00:26:20.56#ibcon#about to read 5, iclass 32, count 0 2006.230.00:26:20.56#ibcon#read 5, iclass 32, count 0 2006.230.00:26:20.56#ibcon#about to read 6, iclass 32, count 0 2006.230.00:26:20.56#ibcon#read 6, iclass 32, count 0 2006.230.00:26:20.56#ibcon#end of sib2, iclass 32, count 0 2006.230.00:26:20.56#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:26:20.56#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:26:20.56#ibcon#[25=USB\r\n] 2006.230.00:26:20.56#ibcon#*before write, iclass 32, count 0 2006.230.00:26:20.56#ibcon#enter sib2, iclass 32, count 0 2006.230.00:26:20.56#ibcon#flushed, iclass 32, count 0 2006.230.00:26:20.56#ibcon#about to write, iclass 32, count 0 2006.230.00:26:20.56#ibcon#wrote, iclass 32, count 0 2006.230.00:26:20.56#ibcon#about to read 3, iclass 32, count 0 2006.230.00:26:20.59#ibcon#read 3, iclass 32, count 0 2006.230.00:26:20.59#ibcon#about to read 4, iclass 32, count 0 2006.230.00:26:20.59#ibcon#read 4, iclass 32, count 0 2006.230.00:26:20.59#ibcon#about to read 5, iclass 32, count 0 2006.230.00:26:20.59#ibcon#read 5, iclass 32, count 0 2006.230.00:26:20.59#ibcon#about to read 6, iclass 32, count 0 2006.230.00:26:20.59#ibcon#read 6, iclass 32, count 0 2006.230.00:26:20.59#ibcon#end of sib2, iclass 32, count 0 2006.230.00:26:20.59#ibcon#*after write, iclass 32, count 0 2006.230.00:26:20.59#ibcon#*before return 0, iclass 32, count 0 2006.230.00:26:20.59#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:20.59#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:20.59#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:26:20.59#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:26:20.59$vck44/valo=8,884.99 2006.230.00:26:20.59#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.00:26:20.59#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.00:26:20.59#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:20.59#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:20.59#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:20.59#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:20.59#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:26:20.59#ibcon#first serial, iclass 34, count 0 2006.230.00:26:20.59#ibcon#enter sib2, iclass 34, count 0 2006.230.00:26:20.59#ibcon#flushed, iclass 34, count 0 2006.230.00:26:20.59#ibcon#about to write, iclass 34, count 0 2006.230.00:26:20.59#ibcon#wrote, iclass 34, count 0 2006.230.00:26:20.59#ibcon#about to read 3, iclass 34, count 0 2006.230.00:26:20.61#ibcon#read 3, iclass 34, count 0 2006.230.00:26:20.61#ibcon#about to read 4, iclass 34, count 0 2006.230.00:26:20.61#ibcon#read 4, iclass 34, count 0 2006.230.00:26:20.61#ibcon#about to read 5, iclass 34, count 0 2006.230.00:26:20.61#ibcon#read 5, iclass 34, count 0 2006.230.00:26:20.61#ibcon#about to read 6, iclass 34, count 0 2006.230.00:26:20.61#ibcon#read 6, iclass 34, count 0 2006.230.00:26:20.61#ibcon#end of sib2, iclass 34, count 0 2006.230.00:26:20.61#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:26:20.61#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:26:20.61#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:26:20.61#ibcon#*before write, iclass 34, count 0 2006.230.00:26:20.61#ibcon#enter sib2, iclass 34, count 0 2006.230.00:26:20.61#ibcon#flushed, iclass 34, count 0 2006.230.00:26:20.61#ibcon#about to write, iclass 34, count 0 2006.230.00:26:20.61#ibcon#wrote, iclass 34, count 0 2006.230.00:26:20.61#ibcon#about to read 3, iclass 34, count 0 2006.230.00:26:20.65#ibcon#read 3, iclass 34, count 0 2006.230.00:26:20.65#ibcon#about to read 4, iclass 34, count 0 2006.230.00:26:20.65#ibcon#read 4, iclass 34, count 0 2006.230.00:26:20.65#ibcon#about to read 5, iclass 34, count 0 2006.230.00:26:20.65#ibcon#read 5, iclass 34, count 0 2006.230.00:26:20.65#ibcon#about to read 6, iclass 34, count 0 2006.230.00:26:20.65#ibcon#read 6, iclass 34, count 0 2006.230.00:26:20.65#ibcon#end of sib2, iclass 34, count 0 2006.230.00:26:20.65#ibcon#*after write, iclass 34, count 0 2006.230.00:26:20.65#ibcon#*before return 0, iclass 34, count 0 2006.230.00:26:20.65#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:20.65#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:20.65#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:26:20.65#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:26:20.65$vck44/va=8,6 2006.230.00:26:20.65#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.00:26:20.65#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.00:26:20.65#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:20.65#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:26:20.71#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:26:20.71#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:26:20.71#ibcon#enter wrdev, iclass 36, count 2 2006.230.00:26:20.71#ibcon#first serial, iclass 36, count 2 2006.230.00:26:20.71#ibcon#enter sib2, iclass 36, count 2 2006.230.00:26:20.71#ibcon#flushed, iclass 36, count 2 2006.230.00:26:20.71#ibcon#about to write, iclass 36, count 2 2006.230.00:26:20.71#ibcon#wrote, iclass 36, count 2 2006.230.00:26:20.71#ibcon#about to read 3, iclass 36, count 2 2006.230.00:26:20.73#ibcon#read 3, iclass 36, count 2 2006.230.00:26:20.73#ibcon#about to read 4, iclass 36, count 2 2006.230.00:26:20.73#ibcon#read 4, iclass 36, count 2 2006.230.00:26:20.73#ibcon#about to read 5, iclass 36, count 2 2006.230.00:26:20.73#ibcon#read 5, iclass 36, count 2 2006.230.00:26:20.73#ibcon#about to read 6, iclass 36, count 2 2006.230.00:26:20.73#ibcon#read 6, iclass 36, count 2 2006.230.00:26:20.73#ibcon#end of sib2, iclass 36, count 2 2006.230.00:26:20.73#ibcon#*mode == 0, iclass 36, count 2 2006.230.00:26:20.73#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.00:26:20.73#ibcon#[25=AT08-06\r\n] 2006.230.00:26:20.73#ibcon#*before write, iclass 36, count 2 2006.230.00:26:20.73#ibcon#enter sib2, iclass 36, count 2 2006.230.00:26:20.73#ibcon#flushed, iclass 36, count 2 2006.230.00:26:20.73#ibcon#about to write, iclass 36, count 2 2006.230.00:26:20.73#ibcon#wrote, iclass 36, count 2 2006.230.00:26:20.73#ibcon#about to read 3, iclass 36, count 2 2006.230.00:26:20.76#ibcon#read 3, iclass 36, count 2 2006.230.00:26:20.76#ibcon#about to read 4, iclass 36, count 2 2006.230.00:26:20.76#ibcon#read 4, iclass 36, count 2 2006.230.00:26:20.76#ibcon#about to read 5, iclass 36, count 2 2006.230.00:26:20.76#ibcon#read 5, iclass 36, count 2 2006.230.00:26:20.76#ibcon#about to read 6, iclass 36, count 2 2006.230.00:26:20.76#ibcon#read 6, iclass 36, count 2 2006.230.00:26:20.76#ibcon#end of sib2, iclass 36, count 2 2006.230.00:26:20.76#ibcon#*after write, iclass 36, count 2 2006.230.00:26:20.76#ibcon#*before return 0, iclass 36, count 2 2006.230.00:26:20.76#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:26:20.76#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:26:20.76#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.00:26:20.76#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:20.76#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:26:20.88#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:26:20.88#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:26:20.88#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:26:20.88#ibcon#first serial, iclass 36, count 0 2006.230.00:26:20.88#ibcon#enter sib2, iclass 36, count 0 2006.230.00:26:20.88#ibcon#flushed, iclass 36, count 0 2006.230.00:26:20.88#ibcon#about to write, iclass 36, count 0 2006.230.00:26:20.88#ibcon#wrote, iclass 36, count 0 2006.230.00:26:20.88#ibcon#about to read 3, iclass 36, count 0 2006.230.00:26:20.90#ibcon#read 3, iclass 36, count 0 2006.230.00:26:20.90#ibcon#about to read 4, iclass 36, count 0 2006.230.00:26:20.90#ibcon#read 4, iclass 36, count 0 2006.230.00:26:20.90#ibcon#about to read 5, iclass 36, count 0 2006.230.00:26:20.90#ibcon#read 5, iclass 36, count 0 2006.230.00:26:20.90#ibcon#about to read 6, iclass 36, count 0 2006.230.00:26:20.90#ibcon#read 6, iclass 36, count 0 2006.230.00:26:20.90#ibcon#end of sib2, iclass 36, count 0 2006.230.00:26:20.90#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:26:20.90#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:26:20.90#ibcon#[25=USB\r\n] 2006.230.00:26:20.90#ibcon#*before write, iclass 36, count 0 2006.230.00:26:20.90#ibcon#enter sib2, iclass 36, count 0 2006.230.00:26:20.90#ibcon#flushed, iclass 36, count 0 2006.230.00:26:20.90#ibcon#about to write, iclass 36, count 0 2006.230.00:26:20.90#ibcon#wrote, iclass 36, count 0 2006.230.00:26:20.90#ibcon#about to read 3, iclass 36, count 0 2006.230.00:26:20.93#ibcon#read 3, iclass 36, count 0 2006.230.00:26:20.93#ibcon#about to read 4, iclass 36, count 0 2006.230.00:26:20.93#ibcon#read 4, iclass 36, count 0 2006.230.00:26:20.93#ibcon#about to read 5, iclass 36, count 0 2006.230.00:26:20.93#ibcon#read 5, iclass 36, count 0 2006.230.00:26:20.93#ibcon#about to read 6, iclass 36, count 0 2006.230.00:26:20.93#ibcon#read 6, iclass 36, count 0 2006.230.00:26:20.93#ibcon#end of sib2, iclass 36, count 0 2006.230.00:26:20.93#ibcon#*after write, iclass 36, count 0 2006.230.00:26:20.93#ibcon#*before return 0, iclass 36, count 0 2006.230.00:26:20.93#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:26:20.93#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:26:20.93#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:26:20.93#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:26:20.93$vck44/vblo=1,629.99 2006.230.00:26:20.93#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.00:26:20.93#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.00:26:20.93#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:20.93#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:26:20.93#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:26:20.93#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:26:20.93#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:26:20.93#ibcon#first serial, iclass 38, count 0 2006.230.00:26:20.93#ibcon#enter sib2, iclass 38, count 0 2006.230.00:26:20.93#ibcon#flushed, iclass 38, count 0 2006.230.00:26:20.93#ibcon#about to write, iclass 38, count 0 2006.230.00:26:20.93#ibcon#wrote, iclass 38, count 0 2006.230.00:26:20.93#ibcon#about to read 3, iclass 38, count 0 2006.230.00:26:20.95#ibcon#read 3, iclass 38, count 0 2006.230.00:26:20.95#ibcon#about to read 4, iclass 38, count 0 2006.230.00:26:20.95#ibcon#read 4, iclass 38, count 0 2006.230.00:26:20.95#ibcon#about to read 5, iclass 38, count 0 2006.230.00:26:20.95#ibcon#read 5, iclass 38, count 0 2006.230.00:26:20.95#ibcon#about to read 6, iclass 38, count 0 2006.230.00:26:20.95#ibcon#read 6, iclass 38, count 0 2006.230.00:26:20.95#ibcon#end of sib2, iclass 38, count 0 2006.230.00:26:20.95#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:26:20.95#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:26:20.95#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:26:20.95#ibcon#*before write, iclass 38, count 0 2006.230.00:26:20.95#ibcon#enter sib2, iclass 38, count 0 2006.230.00:26:20.95#ibcon#flushed, iclass 38, count 0 2006.230.00:26:20.95#ibcon#about to write, iclass 38, count 0 2006.230.00:26:20.95#ibcon#wrote, iclass 38, count 0 2006.230.00:26:20.95#ibcon#about to read 3, iclass 38, count 0 2006.230.00:26:20.99#ibcon#read 3, iclass 38, count 0 2006.230.00:26:20.99#ibcon#about to read 4, iclass 38, count 0 2006.230.00:26:20.99#ibcon#read 4, iclass 38, count 0 2006.230.00:26:20.99#ibcon#about to read 5, iclass 38, count 0 2006.230.00:26:20.99#ibcon#read 5, iclass 38, count 0 2006.230.00:26:20.99#ibcon#about to read 6, iclass 38, count 0 2006.230.00:26:20.99#ibcon#read 6, iclass 38, count 0 2006.230.00:26:20.99#ibcon#end of sib2, iclass 38, count 0 2006.230.00:26:20.99#ibcon#*after write, iclass 38, count 0 2006.230.00:26:20.99#ibcon#*before return 0, iclass 38, count 0 2006.230.00:26:20.99#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:26:20.99#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:26:20.99#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:26:20.99#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:26:20.99$vck44/vb=1,4 2006.230.00:26:20.99#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.00:26:20.99#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.00:26:20.99#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:20.99#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:26:20.99#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:26:20.99#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:26:20.99#ibcon#enter wrdev, iclass 40, count 2 2006.230.00:26:20.99#ibcon#first serial, iclass 40, count 2 2006.230.00:26:20.99#ibcon#enter sib2, iclass 40, count 2 2006.230.00:26:20.99#ibcon#flushed, iclass 40, count 2 2006.230.00:26:20.99#ibcon#about to write, iclass 40, count 2 2006.230.00:26:20.99#ibcon#wrote, iclass 40, count 2 2006.230.00:26:20.99#ibcon#about to read 3, iclass 40, count 2 2006.230.00:26:21.01#ibcon#read 3, iclass 40, count 2 2006.230.00:26:21.01#ibcon#about to read 4, iclass 40, count 2 2006.230.00:26:21.01#ibcon#read 4, iclass 40, count 2 2006.230.00:26:21.01#ibcon#about to read 5, iclass 40, count 2 2006.230.00:26:21.01#ibcon#read 5, iclass 40, count 2 2006.230.00:26:21.01#ibcon#about to read 6, iclass 40, count 2 2006.230.00:26:21.01#ibcon#read 6, iclass 40, count 2 2006.230.00:26:21.01#ibcon#end of sib2, iclass 40, count 2 2006.230.00:26:21.01#ibcon#*mode == 0, iclass 40, count 2 2006.230.00:26:21.01#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.00:26:21.01#ibcon#[27=AT01-04\r\n] 2006.230.00:26:21.01#ibcon#*before write, iclass 40, count 2 2006.230.00:26:21.01#ibcon#enter sib2, iclass 40, count 2 2006.230.00:26:21.01#ibcon#flushed, iclass 40, count 2 2006.230.00:26:21.01#ibcon#about to write, iclass 40, count 2 2006.230.00:26:21.01#ibcon#wrote, iclass 40, count 2 2006.230.00:26:21.01#ibcon#about to read 3, iclass 40, count 2 2006.230.00:26:21.04#ibcon#read 3, iclass 40, count 2 2006.230.00:26:21.04#ibcon#about to read 4, iclass 40, count 2 2006.230.00:26:21.04#ibcon#read 4, iclass 40, count 2 2006.230.00:26:21.04#ibcon#about to read 5, iclass 40, count 2 2006.230.00:26:21.04#ibcon#read 5, iclass 40, count 2 2006.230.00:26:21.04#ibcon#about to read 6, iclass 40, count 2 2006.230.00:26:21.04#ibcon#read 6, iclass 40, count 2 2006.230.00:26:21.04#ibcon#end of sib2, iclass 40, count 2 2006.230.00:26:21.04#ibcon#*after write, iclass 40, count 2 2006.230.00:26:21.04#ibcon#*before return 0, iclass 40, count 2 2006.230.00:26:21.04#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:26:21.04#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:26:21.04#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.00:26:21.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:21.04#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:26:21.16#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:26:21.16#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:26:21.16#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:26:21.16#ibcon#first serial, iclass 40, count 0 2006.230.00:26:21.16#ibcon#enter sib2, iclass 40, count 0 2006.230.00:26:21.16#ibcon#flushed, iclass 40, count 0 2006.230.00:26:21.16#ibcon#about to write, iclass 40, count 0 2006.230.00:26:21.16#ibcon#wrote, iclass 40, count 0 2006.230.00:26:21.16#ibcon#about to read 3, iclass 40, count 0 2006.230.00:26:21.18#ibcon#read 3, iclass 40, count 0 2006.230.00:26:21.18#ibcon#about to read 4, iclass 40, count 0 2006.230.00:26:21.18#ibcon#read 4, iclass 40, count 0 2006.230.00:26:21.18#ibcon#about to read 5, iclass 40, count 0 2006.230.00:26:21.18#ibcon#read 5, iclass 40, count 0 2006.230.00:26:21.18#ibcon#about to read 6, iclass 40, count 0 2006.230.00:26:21.18#ibcon#read 6, iclass 40, count 0 2006.230.00:26:21.18#ibcon#end of sib2, iclass 40, count 0 2006.230.00:26:21.18#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:26:21.18#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:26:21.18#ibcon#[27=USB\r\n] 2006.230.00:26:21.18#ibcon#*before write, iclass 40, count 0 2006.230.00:26:21.18#ibcon#enter sib2, iclass 40, count 0 2006.230.00:26:21.18#ibcon#flushed, iclass 40, count 0 2006.230.00:26:21.18#ibcon#about to write, iclass 40, count 0 2006.230.00:26:21.18#ibcon#wrote, iclass 40, count 0 2006.230.00:26:21.18#ibcon#about to read 3, iclass 40, count 0 2006.230.00:26:21.21#ibcon#read 3, iclass 40, count 0 2006.230.00:26:21.21#ibcon#about to read 4, iclass 40, count 0 2006.230.00:26:21.21#ibcon#read 4, iclass 40, count 0 2006.230.00:26:21.21#ibcon#about to read 5, iclass 40, count 0 2006.230.00:26:21.21#ibcon#read 5, iclass 40, count 0 2006.230.00:26:21.21#ibcon#about to read 6, iclass 40, count 0 2006.230.00:26:21.21#ibcon#read 6, iclass 40, count 0 2006.230.00:26:21.21#ibcon#end of sib2, iclass 40, count 0 2006.230.00:26:21.21#ibcon#*after write, iclass 40, count 0 2006.230.00:26:21.21#ibcon#*before return 0, iclass 40, count 0 2006.230.00:26:21.21#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:26:21.21#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:26:21.21#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:26:21.21#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:26:21.21$vck44/vblo=2,634.99 2006.230.00:26:21.21#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.00:26:21.21#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.00:26:21.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:21.21#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:21.21#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:21.21#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:21.21#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:26:21.21#ibcon#first serial, iclass 4, count 0 2006.230.00:26:21.21#ibcon#enter sib2, iclass 4, count 0 2006.230.00:26:21.21#ibcon#flushed, iclass 4, count 0 2006.230.00:26:21.21#ibcon#about to write, iclass 4, count 0 2006.230.00:26:21.21#ibcon#wrote, iclass 4, count 0 2006.230.00:26:21.21#ibcon#about to read 3, iclass 4, count 0 2006.230.00:26:21.23#ibcon#read 3, iclass 4, count 0 2006.230.00:26:21.23#ibcon#about to read 4, iclass 4, count 0 2006.230.00:26:21.23#ibcon#read 4, iclass 4, count 0 2006.230.00:26:21.23#ibcon#about to read 5, iclass 4, count 0 2006.230.00:26:21.23#ibcon#read 5, iclass 4, count 0 2006.230.00:26:21.23#ibcon#about to read 6, iclass 4, count 0 2006.230.00:26:21.23#ibcon#read 6, iclass 4, count 0 2006.230.00:26:21.23#ibcon#end of sib2, iclass 4, count 0 2006.230.00:26:21.23#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:26:21.23#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:26:21.23#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:26:21.23#ibcon#*before write, iclass 4, count 0 2006.230.00:26:21.23#ibcon#enter sib2, iclass 4, count 0 2006.230.00:26:21.23#ibcon#flushed, iclass 4, count 0 2006.230.00:26:21.23#ibcon#about to write, iclass 4, count 0 2006.230.00:26:21.23#ibcon#wrote, iclass 4, count 0 2006.230.00:26:21.23#ibcon#about to read 3, iclass 4, count 0 2006.230.00:26:21.27#ibcon#read 3, iclass 4, count 0 2006.230.00:26:21.27#ibcon#about to read 4, iclass 4, count 0 2006.230.00:26:21.27#ibcon#read 4, iclass 4, count 0 2006.230.00:26:21.27#ibcon#about to read 5, iclass 4, count 0 2006.230.00:26:21.27#ibcon#read 5, iclass 4, count 0 2006.230.00:26:21.27#ibcon#about to read 6, iclass 4, count 0 2006.230.00:26:21.27#ibcon#read 6, iclass 4, count 0 2006.230.00:26:21.27#ibcon#end of sib2, iclass 4, count 0 2006.230.00:26:21.27#ibcon#*after write, iclass 4, count 0 2006.230.00:26:21.27#ibcon#*before return 0, iclass 4, count 0 2006.230.00:26:21.27#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:21.27#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:26:21.27#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:26:21.27#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:26:21.27$vck44/vb=2,4 2006.230.00:26:21.27#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.00:26:21.27#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.00:26:21.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:21.27#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:21.33#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:21.33#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:21.33#ibcon#enter wrdev, iclass 6, count 2 2006.230.00:26:21.33#ibcon#first serial, iclass 6, count 2 2006.230.00:26:21.33#ibcon#enter sib2, iclass 6, count 2 2006.230.00:26:21.33#ibcon#flushed, iclass 6, count 2 2006.230.00:26:21.33#ibcon#about to write, iclass 6, count 2 2006.230.00:26:21.33#ibcon#wrote, iclass 6, count 2 2006.230.00:26:21.33#ibcon#about to read 3, iclass 6, count 2 2006.230.00:26:21.35#ibcon#read 3, iclass 6, count 2 2006.230.00:26:21.35#ibcon#about to read 4, iclass 6, count 2 2006.230.00:26:21.35#ibcon#read 4, iclass 6, count 2 2006.230.00:26:21.35#ibcon#about to read 5, iclass 6, count 2 2006.230.00:26:21.35#ibcon#read 5, iclass 6, count 2 2006.230.00:26:21.35#ibcon#about to read 6, iclass 6, count 2 2006.230.00:26:21.35#ibcon#read 6, iclass 6, count 2 2006.230.00:26:21.35#ibcon#end of sib2, iclass 6, count 2 2006.230.00:26:21.35#ibcon#*mode == 0, iclass 6, count 2 2006.230.00:26:21.35#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.00:26:21.35#ibcon#[27=AT02-04\r\n] 2006.230.00:26:21.35#ibcon#*before write, iclass 6, count 2 2006.230.00:26:21.35#ibcon#enter sib2, iclass 6, count 2 2006.230.00:26:21.35#ibcon#flushed, iclass 6, count 2 2006.230.00:26:21.35#ibcon#about to write, iclass 6, count 2 2006.230.00:26:21.35#ibcon#wrote, iclass 6, count 2 2006.230.00:26:21.35#ibcon#about to read 3, iclass 6, count 2 2006.230.00:26:21.38#ibcon#read 3, iclass 6, count 2 2006.230.00:26:21.38#ibcon#about to read 4, iclass 6, count 2 2006.230.00:26:21.38#ibcon#read 4, iclass 6, count 2 2006.230.00:26:21.38#ibcon#about to read 5, iclass 6, count 2 2006.230.00:26:21.38#ibcon#read 5, iclass 6, count 2 2006.230.00:26:21.38#ibcon#about to read 6, iclass 6, count 2 2006.230.00:26:21.38#ibcon#read 6, iclass 6, count 2 2006.230.00:26:21.38#ibcon#end of sib2, iclass 6, count 2 2006.230.00:26:21.38#ibcon#*after write, iclass 6, count 2 2006.230.00:26:21.38#ibcon#*before return 0, iclass 6, count 2 2006.230.00:26:21.38#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:21.38#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:26:21.38#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.00:26:21.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:21.38#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:21.50#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:21.50#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:21.50#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:26:21.50#ibcon#first serial, iclass 6, count 0 2006.230.00:26:21.50#ibcon#enter sib2, iclass 6, count 0 2006.230.00:26:21.50#ibcon#flushed, iclass 6, count 0 2006.230.00:26:21.50#ibcon#about to write, iclass 6, count 0 2006.230.00:26:21.50#ibcon#wrote, iclass 6, count 0 2006.230.00:26:21.50#ibcon#about to read 3, iclass 6, count 0 2006.230.00:26:21.52#ibcon#read 3, iclass 6, count 0 2006.230.00:26:21.52#ibcon#about to read 4, iclass 6, count 0 2006.230.00:26:21.52#ibcon#read 4, iclass 6, count 0 2006.230.00:26:21.52#ibcon#about to read 5, iclass 6, count 0 2006.230.00:26:21.52#ibcon#read 5, iclass 6, count 0 2006.230.00:26:21.52#ibcon#about to read 6, iclass 6, count 0 2006.230.00:26:21.52#ibcon#read 6, iclass 6, count 0 2006.230.00:26:21.52#ibcon#end of sib2, iclass 6, count 0 2006.230.00:26:21.52#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:26:21.52#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:26:21.52#ibcon#[27=USB\r\n] 2006.230.00:26:21.52#ibcon#*before write, iclass 6, count 0 2006.230.00:26:21.52#ibcon#enter sib2, iclass 6, count 0 2006.230.00:26:21.52#ibcon#flushed, iclass 6, count 0 2006.230.00:26:21.52#ibcon#about to write, iclass 6, count 0 2006.230.00:26:21.52#ibcon#wrote, iclass 6, count 0 2006.230.00:26:21.52#ibcon#about to read 3, iclass 6, count 0 2006.230.00:26:21.55#ibcon#read 3, iclass 6, count 0 2006.230.00:26:21.55#ibcon#about to read 4, iclass 6, count 0 2006.230.00:26:21.55#ibcon#read 4, iclass 6, count 0 2006.230.00:26:21.55#ibcon#about to read 5, iclass 6, count 0 2006.230.00:26:21.55#ibcon#read 5, iclass 6, count 0 2006.230.00:26:21.55#ibcon#about to read 6, iclass 6, count 0 2006.230.00:26:21.55#ibcon#read 6, iclass 6, count 0 2006.230.00:26:21.55#ibcon#end of sib2, iclass 6, count 0 2006.230.00:26:21.55#ibcon#*after write, iclass 6, count 0 2006.230.00:26:21.55#ibcon#*before return 0, iclass 6, count 0 2006.230.00:26:21.55#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:21.55#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:26:21.55#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:26:21.55#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:26:21.55$vck44/vblo=3,649.99 2006.230.00:26:21.55#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.00:26:21.55#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.00:26:21.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:21.55#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:21.55#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:21.55#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:21.55#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:26:21.55#ibcon#first serial, iclass 10, count 0 2006.230.00:26:21.55#ibcon#enter sib2, iclass 10, count 0 2006.230.00:26:21.55#ibcon#flushed, iclass 10, count 0 2006.230.00:26:21.55#ibcon#about to write, iclass 10, count 0 2006.230.00:26:21.55#ibcon#wrote, iclass 10, count 0 2006.230.00:26:21.55#ibcon#about to read 3, iclass 10, count 0 2006.230.00:26:21.57#ibcon#read 3, iclass 10, count 0 2006.230.00:26:21.57#ibcon#about to read 4, iclass 10, count 0 2006.230.00:26:21.57#ibcon#read 4, iclass 10, count 0 2006.230.00:26:21.57#ibcon#about to read 5, iclass 10, count 0 2006.230.00:26:21.57#ibcon#read 5, iclass 10, count 0 2006.230.00:26:21.57#ibcon#about to read 6, iclass 10, count 0 2006.230.00:26:21.57#ibcon#read 6, iclass 10, count 0 2006.230.00:26:21.57#ibcon#end of sib2, iclass 10, count 0 2006.230.00:26:21.57#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:26:21.57#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:26:21.57#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:26:21.57#ibcon#*before write, iclass 10, count 0 2006.230.00:26:21.57#ibcon#enter sib2, iclass 10, count 0 2006.230.00:26:21.57#ibcon#flushed, iclass 10, count 0 2006.230.00:26:21.57#ibcon#about to write, iclass 10, count 0 2006.230.00:26:21.57#ibcon#wrote, iclass 10, count 0 2006.230.00:26:21.57#ibcon#about to read 3, iclass 10, count 0 2006.230.00:26:21.61#ibcon#read 3, iclass 10, count 0 2006.230.00:26:21.61#ibcon#about to read 4, iclass 10, count 0 2006.230.00:26:21.61#ibcon#read 4, iclass 10, count 0 2006.230.00:26:21.61#ibcon#about to read 5, iclass 10, count 0 2006.230.00:26:21.61#ibcon#read 5, iclass 10, count 0 2006.230.00:26:21.61#ibcon#about to read 6, iclass 10, count 0 2006.230.00:26:21.61#ibcon#read 6, iclass 10, count 0 2006.230.00:26:21.61#ibcon#end of sib2, iclass 10, count 0 2006.230.00:26:21.61#ibcon#*after write, iclass 10, count 0 2006.230.00:26:21.61#ibcon#*before return 0, iclass 10, count 0 2006.230.00:26:21.61#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:21.61#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:26:21.61#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:26:21.61#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:26:21.61$vck44/vb=3,4 2006.230.00:26:21.61#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.00:26:21.61#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.00:26:21.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:21.61#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:21.67#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:21.67#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:21.67#ibcon#enter wrdev, iclass 12, count 2 2006.230.00:26:21.67#ibcon#first serial, iclass 12, count 2 2006.230.00:26:21.67#ibcon#enter sib2, iclass 12, count 2 2006.230.00:26:21.67#ibcon#flushed, iclass 12, count 2 2006.230.00:26:21.67#ibcon#about to write, iclass 12, count 2 2006.230.00:26:21.67#ibcon#wrote, iclass 12, count 2 2006.230.00:26:21.67#ibcon#about to read 3, iclass 12, count 2 2006.230.00:26:21.69#ibcon#read 3, iclass 12, count 2 2006.230.00:26:21.69#ibcon#about to read 4, iclass 12, count 2 2006.230.00:26:21.69#ibcon#read 4, iclass 12, count 2 2006.230.00:26:21.69#ibcon#about to read 5, iclass 12, count 2 2006.230.00:26:21.69#ibcon#read 5, iclass 12, count 2 2006.230.00:26:21.69#ibcon#about to read 6, iclass 12, count 2 2006.230.00:26:21.69#ibcon#read 6, iclass 12, count 2 2006.230.00:26:21.69#ibcon#end of sib2, iclass 12, count 2 2006.230.00:26:21.69#ibcon#*mode == 0, iclass 12, count 2 2006.230.00:26:21.69#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.00:26:21.69#ibcon#[27=AT03-04\r\n] 2006.230.00:26:21.69#ibcon#*before write, iclass 12, count 2 2006.230.00:26:21.69#ibcon#enter sib2, iclass 12, count 2 2006.230.00:26:21.69#ibcon#flushed, iclass 12, count 2 2006.230.00:26:21.69#ibcon#about to write, iclass 12, count 2 2006.230.00:26:21.69#ibcon#wrote, iclass 12, count 2 2006.230.00:26:21.69#ibcon#about to read 3, iclass 12, count 2 2006.230.00:26:21.72#ibcon#read 3, iclass 12, count 2 2006.230.00:26:21.72#ibcon#about to read 4, iclass 12, count 2 2006.230.00:26:21.72#ibcon#read 4, iclass 12, count 2 2006.230.00:26:21.72#ibcon#about to read 5, iclass 12, count 2 2006.230.00:26:21.72#ibcon#read 5, iclass 12, count 2 2006.230.00:26:21.72#ibcon#about to read 6, iclass 12, count 2 2006.230.00:26:21.72#ibcon#read 6, iclass 12, count 2 2006.230.00:26:21.72#ibcon#end of sib2, iclass 12, count 2 2006.230.00:26:21.72#ibcon#*after write, iclass 12, count 2 2006.230.00:26:21.72#ibcon#*before return 0, iclass 12, count 2 2006.230.00:26:21.72#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:21.72#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:26:21.72#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.00:26:21.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:21.72#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:21.84#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:21.84#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:21.84#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:26:21.84#ibcon#first serial, iclass 12, count 0 2006.230.00:26:21.84#ibcon#enter sib2, iclass 12, count 0 2006.230.00:26:21.84#ibcon#flushed, iclass 12, count 0 2006.230.00:26:21.84#ibcon#about to write, iclass 12, count 0 2006.230.00:26:21.84#ibcon#wrote, iclass 12, count 0 2006.230.00:26:21.84#ibcon#about to read 3, iclass 12, count 0 2006.230.00:26:21.86#ibcon#read 3, iclass 12, count 0 2006.230.00:26:21.86#ibcon#about to read 4, iclass 12, count 0 2006.230.00:26:21.86#ibcon#read 4, iclass 12, count 0 2006.230.00:26:21.86#ibcon#about to read 5, iclass 12, count 0 2006.230.00:26:21.86#ibcon#read 5, iclass 12, count 0 2006.230.00:26:21.86#ibcon#about to read 6, iclass 12, count 0 2006.230.00:26:21.86#ibcon#read 6, iclass 12, count 0 2006.230.00:26:21.86#ibcon#end of sib2, iclass 12, count 0 2006.230.00:26:21.86#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:26:21.86#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:26:21.86#ibcon#[27=USB\r\n] 2006.230.00:26:21.86#ibcon#*before write, iclass 12, count 0 2006.230.00:26:21.86#ibcon#enter sib2, iclass 12, count 0 2006.230.00:26:21.86#ibcon#flushed, iclass 12, count 0 2006.230.00:26:21.86#ibcon#about to write, iclass 12, count 0 2006.230.00:26:21.86#ibcon#wrote, iclass 12, count 0 2006.230.00:26:21.86#ibcon#about to read 3, iclass 12, count 0 2006.230.00:26:21.89#ibcon#read 3, iclass 12, count 0 2006.230.00:26:21.89#ibcon#about to read 4, iclass 12, count 0 2006.230.00:26:21.89#ibcon#read 4, iclass 12, count 0 2006.230.00:26:21.89#ibcon#about to read 5, iclass 12, count 0 2006.230.00:26:21.89#ibcon#read 5, iclass 12, count 0 2006.230.00:26:21.89#ibcon#about to read 6, iclass 12, count 0 2006.230.00:26:21.89#ibcon#read 6, iclass 12, count 0 2006.230.00:26:21.89#ibcon#end of sib2, iclass 12, count 0 2006.230.00:26:21.89#ibcon#*after write, iclass 12, count 0 2006.230.00:26:21.89#ibcon#*before return 0, iclass 12, count 0 2006.230.00:26:21.89#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:21.89#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:26:21.89#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:26:21.89#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:26:21.89$vck44/vblo=4,679.99 2006.230.00:26:21.89#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.00:26:21.89#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.00:26:21.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:21.89#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:21.89#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:21.89#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:21.89#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:26:21.89#ibcon#first serial, iclass 14, count 0 2006.230.00:26:21.89#ibcon#enter sib2, iclass 14, count 0 2006.230.00:26:21.89#ibcon#flushed, iclass 14, count 0 2006.230.00:26:21.89#ibcon#about to write, iclass 14, count 0 2006.230.00:26:21.89#ibcon#wrote, iclass 14, count 0 2006.230.00:26:21.89#ibcon#about to read 3, iclass 14, count 0 2006.230.00:26:21.91#ibcon#read 3, iclass 14, count 0 2006.230.00:26:21.91#ibcon#about to read 4, iclass 14, count 0 2006.230.00:26:21.91#ibcon#read 4, iclass 14, count 0 2006.230.00:26:21.91#ibcon#about to read 5, iclass 14, count 0 2006.230.00:26:21.91#ibcon#read 5, iclass 14, count 0 2006.230.00:26:21.91#ibcon#about to read 6, iclass 14, count 0 2006.230.00:26:21.91#ibcon#read 6, iclass 14, count 0 2006.230.00:26:21.91#ibcon#end of sib2, iclass 14, count 0 2006.230.00:26:21.91#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:26:21.91#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:26:21.91#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:26:21.91#ibcon#*before write, iclass 14, count 0 2006.230.00:26:21.91#ibcon#enter sib2, iclass 14, count 0 2006.230.00:26:21.91#ibcon#flushed, iclass 14, count 0 2006.230.00:26:21.91#ibcon#about to write, iclass 14, count 0 2006.230.00:26:21.91#ibcon#wrote, iclass 14, count 0 2006.230.00:26:21.91#ibcon#about to read 3, iclass 14, count 0 2006.230.00:26:21.95#ibcon#read 3, iclass 14, count 0 2006.230.00:26:21.95#ibcon#about to read 4, iclass 14, count 0 2006.230.00:26:21.95#ibcon#read 4, iclass 14, count 0 2006.230.00:26:21.95#ibcon#about to read 5, iclass 14, count 0 2006.230.00:26:21.95#ibcon#read 5, iclass 14, count 0 2006.230.00:26:21.95#ibcon#about to read 6, iclass 14, count 0 2006.230.00:26:21.95#ibcon#read 6, iclass 14, count 0 2006.230.00:26:21.95#ibcon#end of sib2, iclass 14, count 0 2006.230.00:26:21.95#ibcon#*after write, iclass 14, count 0 2006.230.00:26:21.95#ibcon#*before return 0, iclass 14, count 0 2006.230.00:26:21.95#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:21.95#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:26:21.95#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:26:21.95#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:26:21.95$vck44/vb=4,4 2006.230.00:26:21.95#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.00:26:21.95#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.00:26:21.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:21.95#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:22.01#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:22.01#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:22.01#ibcon#enter wrdev, iclass 16, count 2 2006.230.00:26:22.01#ibcon#first serial, iclass 16, count 2 2006.230.00:26:22.01#ibcon#enter sib2, iclass 16, count 2 2006.230.00:26:22.01#ibcon#flushed, iclass 16, count 2 2006.230.00:26:22.01#ibcon#about to write, iclass 16, count 2 2006.230.00:26:22.01#ibcon#wrote, iclass 16, count 2 2006.230.00:26:22.01#ibcon#about to read 3, iclass 16, count 2 2006.230.00:26:22.03#ibcon#read 3, iclass 16, count 2 2006.230.00:26:22.03#ibcon#about to read 4, iclass 16, count 2 2006.230.00:26:22.03#ibcon#read 4, iclass 16, count 2 2006.230.00:26:22.03#ibcon#about to read 5, iclass 16, count 2 2006.230.00:26:22.03#ibcon#read 5, iclass 16, count 2 2006.230.00:26:22.03#ibcon#about to read 6, iclass 16, count 2 2006.230.00:26:22.03#ibcon#read 6, iclass 16, count 2 2006.230.00:26:22.03#ibcon#end of sib2, iclass 16, count 2 2006.230.00:26:22.03#ibcon#*mode == 0, iclass 16, count 2 2006.230.00:26:22.03#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.00:26:22.03#ibcon#[27=AT04-04\r\n] 2006.230.00:26:22.03#ibcon#*before write, iclass 16, count 2 2006.230.00:26:22.03#ibcon#enter sib2, iclass 16, count 2 2006.230.00:26:22.03#ibcon#flushed, iclass 16, count 2 2006.230.00:26:22.03#ibcon#about to write, iclass 16, count 2 2006.230.00:26:22.03#ibcon#wrote, iclass 16, count 2 2006.230.00:26:22.03#ibcon#about to read 3, iclass 16, count 2 2006.230.00:26:22.06#ibcon#read 3, iclass 16, count 2 2006.230.00:26:22.06#ibcon#about to read 4, iclass 16, count 2 2006.230.00:26:22.06#ibcon#read 4, iclass 16, count 2 2006.230.00:26:22.06#ibcon#about to read 5, iclass 16, count 2 2006.230.00:26:22.06#ibcon#read 5, iclass 16, count 2 2006.230.00:26:22.06#ibcon#about to read 6, iclass 16, count 2 2006.230.00:26:22.06#ibcon#read 6, iclass 16, count 2 2006.230.00:26:22.06#ibcon#end of sib2, iclass 16, count 2 2006.230.00:26:22.06#ibcon#*after write, iclass 16, count 2 2006.230.00:26:22.06#ibcon#*before return 0, iclass 16, count 2 2006.230.00:26:22.06#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:22.06#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:26:22.06#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.00:26:22.06#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:22.06#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:22.18#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:22.18#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:22.18#ibcon#enter wrdev, iclass 16, count 0 2006.230.00:26:22.18#ibcon#first serial, iclass 16, count 0 2006.230.00:26:22.18#ibcon#enter sib2, iclass 16, count 0 2006.230.00:26:22.18#ibcon#flushed, iclass 16, count 0 2006.230.00:26:22.18#ibcon#about to write, iclass 16, count 0 2006.230.00:26:22.18#ibcon#wrote, iclass 16, count 0 2006.230.00:26:22.18#ibcon#about to read 3, iclass 16, count 0 2006.230.00:26:22.20#ibcon#read 3, iclass 16, count 0 2006.230.00:26:22.20#ibcon#about to read 4, iclass 16, count 0 2006.230.00:26:22.20#ibcon#read 4, iclass 16, count 0 2006.230.00:26:22.20#ibcon#about to read 5, iclass 16, count 0 2006.230.00:26:22.20#ibcon#read 5, iclass 16, count 0 2006.230.00:26:22.20#ibcon#about to read 6, iclass 16, count 0 2006.230.00:26:22.20#ibcon#read 6, iclass 16, count 0 2006.230.00:26:22.20#ibcon#end of sib2, iclass 16, count 0 2006.230.00:26:22.20#ibcon#*mode == 0, iclass 16, count 0 2006.230.00:26:22.20#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.00:26:22.20#ibcon#[27=USB\r\n] 2006.230.00:26:22.20#ibcon#*before write, iclass 16, count 0 2006.230.00:26:22.20#ibcon#enter sib2, iclass 16, count 0 2006.230.00:26:22.20#ibcon#flushed, iclass 16, count 0 2006.230.00:26:22.20#ibcon#about to write, iclass 16, count 0 2006.230.00:26:22.20#ibcon#wrote, iclass 16, count 0 2006.230.00:26:22.20#ibcon#about to read 3, iclass 16, count 0 2006.230.00:26:22.23#ibcon#read 3, iclass 16, count 0 2006.230.00:26:22.23#ibcon#about to read 4, iclass 16, count 0 2006.230.00:26:22.23#ibcon#read 4, iclass 16, count 0 2006.230.00:26:22.23#ibcon#about to read 5, iclass 16, count 0 2006.230.00:26:22.23#ibcon#read 5, iclass 16, count 0 2006.230.00:26:22.23#ibcon#about to read 6, iclass 16, count 0 2006.230.00:26:22.23#ibcon#read 6, iclass 16, count 0 2006.230.00:26:22.23#ibcon#end of sib2, iclass 16, count 0 2006.230.00:26:22.23#ibcon#*after write, iclass 16, count 0 2006.230.00:26:22.23#ibcon#*before return 0, iclass 16, count 0 2006.230.00:26:22.23#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:22.23#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:26:22.23#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.00:26:22.23#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.00:26:22.23$vck44/vblo=5,709.99 2006.230.00:26:22.23#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.00:26:22.23#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.00:26:22.23#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:22.23#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:22.23#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:22.23#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:22.23#ibcon#enter wrdev, iclass 18, count 0 2006.230.00:26:22.23#ibcon#first serial, iclass 18, count 0 2006.230.00:26:22.23#ibcon#enter sib2, iclass 18, count 0 2006.230.00:26:22.23#ibcon#flushed, iclass 18, count 0 2006.230.00:26:22.23#ibcon#about to write, iclass 18, count 0 2006.230.00:26:22.23#ibcon#wrote, iclass 18, count 0 2006.230.00:26:22.23#ibcon#about to read 3, iclass 18, count 0 2006.230.00:26:22.25#ibcon#read 3, iclass 18, count 0 2006.230.00:26:22.25#ibcon#about to read 4, iclass 18, count 0 2006.230.00:26:22.25#ibcon#read 4, iclass 18, count 0 2006.230.00:26:22.25#ibcon#about to read 5, iclass 18, count 0 2006.230.00:26:22.25#ibcon#read 5, iclass 18, count 0 2006.230.00:26:22.25#ibcon#about to read 6, iclass 18, count 0 2006.230.00:26:22.25#ibcon#read 6, iclass 18, count 0 2006.230.00:26:22.25#ibcon#end of sib2, iclass 18, count 0 2006.230.00:26:22.25#ibcon#*mode == 0, iclass 18, count 0 2006.230.00:26:22.25#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.00:26:22.25#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:26:22.25#ibcon#*before write, iclass 18, count 0 2006.230.00:26:22.25#ibcon#enter sib2, iclass 18, count 0 2006.230.00:26:22.25#ibcon#flushed, iclass 18, count 0 2006.230.00:26:22.25#ibcon#about to write, iclass 18, count 0 2006.230.00:26:22.25#ibcon#wrote, iclass 18, count 0 2006.230.00:26:22.25#ibcon#about to read 3, iclass 18, count 0 2006.230.00:26:22.29#ibcon#read 3, iclass 18, count 0 2006.230.00:26:22.29#ibcon#about to read 4, iclass 18, count 0 2006.230.00:26:22.29#ibcon#read 4, iclass 18, count 0 2006.230.00:26:22.29#ibcon#about to read 5, iclass 18, count 0 2006.230.00:26:22.29#ibcon#read 5, iclass 18, count 0 2006.230.00:26:22.29#ibcon#about to read 6, iclass 18, count 0 2006.230.00:26:22.29#ibcon#read 6, iclass 18, count 0 2006.230.00:26:22.29#ibcon#end of sib2, iclass 18, count 0 2006.230.00:26:22.29#ibcon#*after write, iclass 18, count 0 2006.230.00:26:22.29#ibcon#*before return 0, iclass 18, count 0 2006.230.00:26:22.29#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:22.29#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:26:22.29#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.00:26:22.29#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.00:26:22.29$vck44/vb=5,4 2006.230.00:26:22.29#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.00:26:22.29#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.00:26:22.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:22.29#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:22.35#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:22.35#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:22.35#ibcon#enter wrdev, iclass 20, count 2 2006.230.00:26:22.35#ibcon#first serial, iclass 20, count 2 2006.230.00:26:22.35#ibcon#enter sib2, iclass 20, count 2 2006.230.00:26:22.35#ibcon#flushed, iclass 20, count 2 2006.230.00:26:22.35#ibcon#about to write, iclass 20, count 2 2006.230.00:26:22.35#ibcon#wrote, iclass 20, count 2 2006.230.00:26:22.35#ibcon#about to read 3, iclass 20, count 2 2006.230.00:26:22.37#ibcon#read 3, iclass 20, count 2 2006.230.00:26:22.37#ibcon#about to read 4, iclass 20, count 2 2006.230.00:26:22.37#ibcon#read 4, iclass 20, count 2 2006.230.00:26:22.37#ibcon#about to read 5, iclass 20, count 2 2006.230.00:26:22.37#ibcon#read 5, iclass 20, count 2 2006.230.00:26:22.37#ibcon#about to read 6, iclass 20, count 2 2006.230.00:26:22.37#ibcon#read 6, iclass 20, count 2 2006.230.00:26:22.37#ibcon#end of sib2, iclass 20, count 2 2006.230.00:26:22.37#ibcon#*mode == 0, iclass 20, count 2 2006.230.00:26:22.37#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.00:26:22.37#ibcon#[27=AT05-04\r\n] 2006.230.00:26:22.37#ibcon#*before write, iclass 20, count 2 2006.230.00:26:22.37#ibcon#enter sib2, iclass 20, count 2 2006.230.00:26:22.37#ibcon#flushed, iclass 20, count 2 2006.230.00:26:22.37#ibcon#about to write, iclass 20, count 2 2006.230.00:26:22.37#ibcon#wrote, iclass 20, count 2 2006.230.00:26:22.37#ibcon#about to read 3, iclass 20, count 2 2006.230.00:26:22.40#ibcon#read 3, iclass 20, count 2 2006.230.00:26:22.40#ibcon#about to read 4, iclass 20, count 2 2006.230.00:26:22.40#ibcon#read 4, iclass 20, count 2 2006.230.00:26:22.40#ibcon#about to read 5, iclass 20, count 2 2006.230.00:26:22.40#ibcon#read 5, iclass 20, count 2 2006.230.00:26:22.40#ibcon#about to read 6, iclass 20, count 2 2006.230.00:26:22.40#ibcon#read 6, iclass 20, count 2 2006.230.00:26:22.40#ibcon#end of sib2, iclass 20, count 2 2006.230.00:26:22.40#ibcon#*after write, iclass 20, count 2 2006.230.00:26:22.40#ibcon#*before return 0, iclass 20, count 2 2006.230.00:26:22.40#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:22.40#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:26:22.40#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.00:26:22.40#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:22.40#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:22.52#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:22.52#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:22.52#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:26:22.52#ibcon#first serial, iclass 20, count 0 2006.230.00:26:22.52#ibcon#enter sib2, iclass 20, count 0 2006.230.00:26:22.52#ibcon#flushed, iclass 20, count 0 2006.230.00:26:22.52#ibcon#about to write, iclass 20, count 0 2006.230.00:26:22.52#ibcon#wrote, iclass 20, count 0 2006.230.00:26:22.52#ibcon#about to read 3, iclass 20, count 0 2006.230.00:26:22.54#ibcon#read 3, iclass 20, count 0 2006.230.00:26:22.54#ibcon#about to read 4, iclass 20, count 0 2006.230.00:26:22.54#ibcon#read 4, iclass 20, count 0 2006.230.00:26:22.54#ibcon#about to read 5, iclass 20, count 0 2006.230.00:26:22.54#ibcon#read 5, iclass 20, count 0 2006.230.00:26:22.54#ibcon#about to read 6, iclass 20, count 0 2006.230.00:26:22.54#ibcon#read 6, iclass 20, count 0 2006.230.00:26:22.54#ibcon#end of sib2, iclass 20, count 0 2006.230.00:26:22.54#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:26:22.54#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:26:22.54#ibcon#[27=USB\r\n] 2006.230.00:26:22.54#ibcon#*before write, iclass 20, count 0 2006.230.00:26:22.54#ibcon#enter sib2, iclass 20, count 0 2006.230.00:26:22.54#ibcon#flushed, iclass 20, count 0 2006.230.00:26:22.54#ibcon#about to write, iclass 20, count 0 2006.230.00:26:22.54#ibcon#wrote, iclass 20, count 0 2006.230.00:26:22.54#ibcon#about to read 3, iclass 20, count 0 2006.230.00:26:22.57#ibcon#read 3, iclass 20, count 0 2006.230.00:26:22.57#ibcon#about to read 4, iclass 20, count 0 2006.230.00:26:22.57#ibcon#read 4, iclass 20, count 0 2006.230.00:26:22.57#ibcon#about to read 5, iclass 20, count 0 2006.230.00:26:22.57#ibcon#read 5, iclass 20, count 0 2006.230.00:26:22.57#ibcon#about to read 6, iclass 20, count 0 2006.230.00:26:22.57#ibcon#read 6, iclass 20, count 0 2006.230.00:26:22.57#ibcon#end of sib2, iclass 20, count 0 2006.230.00:26:22.57#ibcon#*after write, iclass 20, count 0 2006.230.00:26:22.57#ibcon#*before return 0, iclass 20, count 0 2006.230.00:26:22.57#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:22.57#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:26:22.57#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:26:22.57#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:26:22.57$vck44/vblo=6,719.99 2006.230.00:26:22.57#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.00:26:22.57#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.00:26:22.57#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:22.57#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:22.57#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:22.57#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:22.57#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:26:22.57#ibcon#first serial, iclass 22, count 0 2006.230.00:26:22.57#ibcon#enter sib2, iclass 22, count 0 2006.230.00:26:22.57#ibcon#flushed, iclass 22, count 0 2006.230.00:26:22.57#ibcon#about to write, iclass 22, count 0 2006.230.00:26:22.57#ibcon#wrote, iclass 22, count 0 2006.230.00:26:22.57#ibcon#about to read 3, iclass 22, count 0 2006.230.00:26:22.59#ibcon#read 3, iclass 22, count 0 2006.230.00:26:22.59#ibcon#about to read 4, iclass 22, count 0 2006.230.00:26:22.59#ibcon#read 4, iclass 22, count 0 2006.230.00:26:22.59#ibcon#about to read 5, iclass 22, count 0 2006.230.00:26:22.59#ibcon#read 5, iclass 22, count 0 2006.230.00:26:22.59#ibcon#about to read 6, iclass 22, count 0 2006.230.00:26:22.59#ibcon#read 6, iclass 22, count 0 2006.230.00:26:22.59#ibcon#end of sib2, iclass 22, count 0 2006.230.00:26:22.59#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:26:22.59#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:26:22.59#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:26:22.59#ibcon#*before write, iclass 22, count 0 2006.230.00:26:22.59#ibcon#enter sib2, iclass 22, count 0 2006.230.00:26:22.59#ibcon#flushed, iclass 22, count 0 2006.230.00:26:22.59#ibcon#about to write, iclass 22, count 0 2006.230.00:26:22.59#ibcon#wrote, iclass 22, count 0 2006.230.00:26:22.59#ibcon#about to read 3, iclass 22, count 0 2006.230.00:26:22.63#ibcon#read 3, iclass 22, count 0 2006.230.00:26:22.63#ibcon#about to read 4, iclass 22, count 0 2006.230.00:26:22.63#ibcon#read 4, iclass 22, count 0 2006.230.00:26:22.63#ibcon#about to read 5, iclass 22, count 0 2006.230.00:26:22.63#ibcon#read 5, iclass 22, count 0 2006.230.00:26:22.63#ibcon#about to read 6, iclass 22, count 0 2006.230.00:26:22.63#ibcon#read 6, iclass 22, count 0 2006.230.00:26:22.63#ibcon#end of sib2, iclass 22, count 0 2006.230.00:26:22.63#ibcon#*after write, iclass 22, count 0 2006.230.00:26:22.63#ibcon#*before return 0, iclass 22, count 0 2006.230.00:26:22.63#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:22.63#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:26:22.63#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:26:22.63#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:26:22.63$vck44/vb=6,4 2006.230.00:26:22.63#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.00:26:22.63#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.00:26:22.63#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:22.63#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:22.69#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:22.69#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:22.69#ibcon#enter wrdev, iclass 24, count 2 2006.230.00:26:22.69#ibcon#first serial, iclass 24, count 2 2006.230.00:26:22.69#ibcon#enter sib2, iclass 24, count 2 2006.230.00:26:22.69#ibcon#flushed, iclass 24, count 2 2006.230.00:26:22.69#ibcon#about to write, iclass 24, count 2 2006.230.00:26:22.69#ibcon#wrote, iclass 24, count 2 2006.230.00:26:22.69#ibcon#about to read 3, iclass 24, count 2 2006.230.00:26:22.71#ibcon#read 3, iclass 24, count 2 2006.230.00:26:22.71#ibcon#about to read 4, iclass 24, count 2 2006.230.00:26:22.71#ibcon#read 4, iclass 24, count 2 2006.230.00:26:22.71#ibcon#about to read 5, iclass 24, count 2 2006.230.00:26:22.71#ibcon#read 5, iclass 24, count 2 2006.230.00:26:22.71#ibcon#about to read 6, iclass 24, count 2 2006.230.00:26:22.71#ibcon#read 6, iclass 24, count 2 2006.230.00:26:22.71#ibcon#end of sib2, iclass 24, count 2 2006.230.00:26:22.71#ibcon#*mode == 0, iclass 24, count 2 2006.230.00:26:22.71#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.00:26:22.71#ibcon#[27=AT06-04\r\n] 2006.230.00:26:22.71#ibcon#*before write, iclass 24, count 2 2006.230.00:26:22.71#ibcon#enter sib2, iclass 24, count 2 2006.230.00:26:22.71#ibcon#flushed, iclass 24, count 2 2006.230.00:26:22.71#ibcon#about to write, iclass 24, count 2 2006.230.00:26:22.71#ibcon#wrote, iclass 24, count 2 2006.230.00:26:22.71#ibcon#about to read 3, iclass 24, count 2 2006.230.00:26:22.74#ibcon#read 3, iclass 24, count 2 2006.230.00:26:22.74#ibcon#about to read 4, iclass 24, count 2 2006.230.00:26:22.74#ibcon#read 4, iclass 24, count 2 2006.230.00:26:22.74#ibcon#about to read 5, iclass 24, count 2 2006.230.00:26:22.74#ibcon#read 5, iclass 24, count 2 2006.230.00:26:22.74#ibcon#about to read 6, iclass 24, count 2 2006.230.00:26:22.74#ibcon#read 6, iclass 24, count 2 2006.230.00:26:22.74#ibcon#end of sib2, iclass 24, count 2 2006.230.00:26:22.74#ibcon#*after write, iclass 24, count 2 2006.230.00:26:22.74#ibcon#*before return 0, iclass 24, count 2 2006.230.00:26:22.74#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:22.74#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:26:22.74#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.00:26:22.74#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:22.74#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:22.86#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:22.86#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:22.86#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:26:22.86#ibcon#first serial, iclass 24, count 0 2006.230.00:26:22.86#ibcon#enter sib2, iclass 24, count 0 2006.230.00:26:22.86#ibcon#flushed, iclass 24, count 0 2006.230.00:26:22.86#ibcon#about to write, iclass 24, count 0 2006.230.00:26:22.86#ibcon#wrote, iclass 24, count 0 2006.230.00:26:22.86#ibcon#about to read 3, iclass 24, count 0 2006.230.00:26:22.88#ibcon#read 3, iclass 24, count 0 2006.230.00:26:22.88#ibcon#about to read 4, iclass 24, count 0 2006.230.00:26:22.88#ibcon#read 4, iclass 24, count 0 2006.230.00:26:22.88#ibcon#about to read 5, iclass 24, count 0 2006.230.00:26:22.88#ibcon#read 5, iclass 24, count 0 2006.230.00:26:22.88#ibcon#about to read 6, iclass 24, count 0 2006.230.00:26:22.88#ibcon#read 6, iclass 24, count 0 2006.230.00:26:22.88#ibcon#end of sib2, iclass 24, count 0 2006.230.00:26:22.88#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:26:22.88#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:26:22.88#ibcon#[27=USB\r\n] 2006.230.00:26:22.88#ibcon#*before write, iclass 24, count 0 2006.230.00:26:22.88#ibcon#enter sib2, iclass 24, count 0 2006.230.00:26:22.88#ibcon#flushed, iclass 24, count 0 2006.230.00:26:22.88#ibcon#about to write, iclass 24, count 0 2006.230.00:26:22.88#ibcon#wrote, iclass 24, count 0 2006.230.00:26:22.88#ibcon#about to read 3, iclass 24, count 0 2006.230.00:26:22.91#ibcon#read 3, iclass 24, count 0 2006.230.00:26:22.91#ibcon#about to read 4, iclass 24, count 0 2006.230.00:26:22.91#ibcon#read 4, iclass 24, count 0 2006.230.00:26:22.91#ibcon#about to read 5, iclass 24, count 0 2006.230.00:26:22.91#ibcon#read 5, iclass 24, count 0 2006.230.00:26:22.91#ibcon#about to read 6, iclass 24, count 0 2006.230.00:26:22.91#ibcon#read 6, iclass 24, count 0 2006.230.00:26:22.91#ibcon#end of sib2, iclass 24, count 0 2006.230.00:26:22.91#ibcon#*after write, iclass 24, count 0 2006.230.00:26:22.91#ibcon#*before return 0, iclass 24, count 0 2006.230.00:26:22.91#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:22.91#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:26:22.91#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:26:22.91#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:26:22.91$vck44/vblo=7,734.99 2006.230.00:26:22.91#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.00:26:22.91#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.00:26:22.91#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:22.91#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:22.91#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:22.91#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:22.91#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:26:22.91#ibcon#first serial, iclass 26, count 0 2006.230.00:26:22.91#ibcon#enter sib2, iclass 26, count 0 2006.230.00:26:22.91#ibcon#flushed, iclass 26, count 0 2006.230.00:26:22.91#ibcon#about to write, iclass 26, count 0 2006.230.00:26:22.91#ibcon#wrote, iclass 26, count 0 2006.230.00:26:22.91#ibcon#about to read 3, iclass 26, count 0 2006.230.00:26:22.93#ibcon#read 3, iclass 26, count 0 2006.230.00:26:22.93#ibcon#about to read 4, iclass 26, count 0 2006.230.00:26:22.93#ibcon#read 4, iclass 26, count 0 2006.230.00:26:22.93#ibcon#about to read 5, iclass 26, count 0 2006.230.00:26:22.93#ibcon#read 5, iclass 26, count 0 2006.230.00:26:22.93#ibcon#about to read 6, iclass 26, count 0 2006.230.00:26:22.93#ibcon#read 6, iclass 26, count 0 2006.230.00:26:22.93#ibcon#end of sib2, iclass 26, count 0 2006.230.00:26:22.93#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:26:22.93#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:26:22.93#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:26:22.93#ibcon#*before write, iclass 26, count 0 2006.230.00:26:22.93#ibcon#enter sib2, iclass 26, count 0 2006.230.00:26:22.93#ibcon#flushed, iclass 26, count 0 2006.230.00:26:22.93#ibcon#about to write, iclass 26, count 0 2006.230.00:26:22.93#ibcon#wrote, iclass 26, count 0 2006.230.00:26:22.93#ibcon#about to read 3, iclass 26, count 0 2006.230.00:26:22.97#ibcon#read 3, iclass 26, count 0 2006.230.00:26:22.97#ibcon#about to read 4, iclass 26, count 0 2006.230.00:26:22.97#ibcon#read 4, iclass 26, count 0 2006.230.00:26:22.97#ibcon#about to read 5, iclass 26, count 0 2006.230.00:26:22.97#ibcon#read 5, iclass 26, count 0 2006.230.00:26:22.97#ibcon#about to read 6, iclass 26, count 0 2006.230.00:26:22.97#ibcon#read 6, iclass 26, count 0 2006.230.00:26:22.97#ibcon#end of sib2, iclass 26, count 0 2006.230.00:26:22.97#ibcon#*after write, iclass 26, count 0 2006.230.00:26:22.97#ibcon#*before return 0, iclass 26, count 0 2006.230.00:26:22.97#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:22.97#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:26:22.97#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:26:22.97#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:26:22.97$vck44/vb=7,4 2006.230.00:26:22.97#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.00:26:22.97#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.00:26:22.97#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:22.97#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:23.03#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:23.03#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:23.03#ibcon#enter wrdev, iclass 28, count 2 2006.230.00:26:23.03#ibcon#first serial, iclass 28, count 2 2006.230.00:26:23.03#ibcon#enter sib2, iclass 28, count 2 2006.230.00:26:23.03#ibcon#flushed, iclass 28, count 2 2006.230.00:26:23.03#ibcon#about to write, iclass 28, count 2 2006.230.00:26:23.03#ibcon#wrote, iclass 28, count 2 2006.230.00:26:23.03#ibcon#about to read 3, iclass 28, count 2 2006.230.00:26:23.05#ibcon#read 3, iclass 28, count 2 2006.230.00:26:23.05#ibcon#about to read 4, iclass 28, count 2 2006.230.00:26:23.05#ibcon#read 4, iclass 28, count 2 2006.230.00:26:23.05#ibcon#about to read 5, iclass 28, count 2 2006.230.00:26:23.05#ibcon#read 5, iclass 28, count 2 2006.230.00:26:23.05#ibcon#about to read 6, iclass 28, count 2 2006.230.00:26:23.05#ibcon#read 6, iclass 28, count 2 2006.230.00:26:23.05#ibcon#end of sib2, iclass 28, count 2 2006.230.00:26:23.05#ibcon#*mode == 0, iclass 28, count 2 2006.230.00:26:23.05#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.00:26:23.05#ibcon#[27=AT07-04\r\n] 2006.230.00:26:23.05#ibcon#*before write, iclass 28, count 2 2006.230.00:26:23.05#ibcon#enter sib2, iclass 28, count 2 2006.230.00:26:23.05#ibcon#flushed, iclass 28, count 2 2006.230.00:26:23.05#ibcon#about to write, iclass 28, count 2 2006.230.00:26:23.05#ibcon#wrote, iclass 28, count 2 2006.230.00:26:23.05#ibcon#about to read 3, iclass 28, count 2 2006.230.00:26:23.08#ibcon#read 3, iclass 28, count 2 2006.230.00:26:23.08#ibcon#about to read 4, iclass 28, count 2 2006.230.00:26:23.08#ibcon#read 4, iclass 28, count 2 2006.230.00:26:23.08#ibcon#about to read 5, iclass 28, count 2 2006.230.00:26:23.08#ibcon#read 5, iclass 28, count 2 2006.230.00:26:23.08#ibcon#about to read 6, iclass 28, count 2 2006.230.00:26:23.08#ibcon#read 6, iclass 28, count 2 2006.230.00:26:23.08#ibcon#end of sib2, iclass 28, count 2 2006.230.00:26:23.08#ibcon#*after write, iclass 28, count 2 2006.230.00:26:23.08#ibcon#*before return 0, iclass 28, count 2 2006.230.00:26:23.08#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:23.08#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:26:23.08#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.00:26:23.08#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:23.08#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:23.20#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:23.20#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:23.20#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:26:23.20#ibcon#first serial, iclass 28, count 0 2006.230.00:26:23.20#ibcon#enter sib2, iclass 28, count 0 2006.230.00:26:23.20#ibcon#flushed, iclass 28, count 0 2006.230.00:26:23.20#ibcon#about to write, iclass 28, count 0 2006.230.00:26:23.20#ibcon#wrote, iclass 28, count 0 2006.230.00:26:23.20#ibcon#about to read 3, iclass 28, count 0 2006.230.00:26:23.22#ibcon#read 3, iclass 28, count 0 2006.230.00:26:23.22#ibcon#about to read 4, iclass 28, count 0 2006.230.00:26:23.22#ibcon#read 4, iclass 28, count 0 2006.230.00:26:23.22#ibcon#about to read 5, iclass 28, count 0 2006.230.00:26:23.22#ibcon#read 5, iclass 28, count 0 2006.230.00:26:23.22#ibcon#about to read 6, iclass 28, count 0 2006.230.00:26:23.22#ibcon#read 6, iclass 28, count 0 2006.230.00:26:23.22#ibcon#end of sib2, iclass 28, count 0 2006.230.00:26:23.22#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:26:23.22#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:26:23.22#ibcon#[27=USB\r\n] 2006.230.00:26:23.22#ibcon#*before write, iclass 28, count 0 2006.230.00:26:23.22#ibcon#enter sib2, iclass 28, count 0 2006.230.00:26:23.22#ibcon#flushed, iclass 28, count 0 2006.230.00:26:23.22#ibcon#about to write, iclass 28, count 0 2006.230.00:26:23.22#ibcon#wrote, iclass 28, count 0 2006.230.00:26:23.22#ibcon#about to read 3, iclass 28, count 0 2006.230.00:26:23.25#ibcon#read 3, iclass 28, count 0 2006.230.00:26:23.25#ibcon#about to read 4, iclass 28, count 0 2006.230.00:26:23.25#ibcon#read 4, iclass 28, count 0 2006.230.00:26:23.25#ibcon#about to read 5, iclass 28, count 0 2006.230.00:26:23.25#ibcon#read 5, iclass 28, count 0 2006.230.00:26:23.25#ibcon#about to read 6, iclass 28, count 0 2006.230.00:26:23.25#ibcon#read 6, iclass 28, count 0 2006.230.00:26:23.25#ibcon#end of sib2, iclass 28, count 0 2006.230.00:26:23.25#ibcon#*after write, iclass 28, count 0 2006.230.00:26:23.25#ibcon#*before return 0, iclass 28, count 0 2006.230.00:26:23.25#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:23.25#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:26:23.25#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:26:23.25#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:26:23.25$vck44/vblo=8,744.99 2006.230.00:26:23.25#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.00:26:23.25#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.00:26:23.25#ibcon#ireg 17 cls_cnt 0 2006.230.00:26:23.25#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:23.25#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:23.25#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:23.25#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:26:23.25#ibcon#first serial, iclass 30, count 0 2006.230.00:26:23.25#ibcon#enter sib2, iclass 30, count 0 2006.230.00:26:23.25#ibcon#flushed, iclass 30, count 0 2006.230.00:26:23.25#ibcon#about to write, iclass 30, count 0 2006.230.00:26:23.25#ibcon#wrote, iclass 30, count 0 2006.230.00:26:23.25#ibcon#about to read 3, iclass 30, count 0 2006.230.00:26:23.27#ibcon#read 3, iclass 30, count 0 2006.230.00:26:23.27#ibcon#about to read 4, iclass 30, count 0 2006.230.00:26:23.27#ibcon#read 4, iclass 30, count 0 2006.230.00:26:23.27#ibcon#about to read 5, iclass 30, count 0 2006.230.00:26:23.27#ibcon#read 5, iclass 30, count 0 2006.230.00:26:23.27#ibcon#about to read 6, iclass 30, count 0 2006.230.00:26:23.27#ibcon#read 6, iclass 30, count 0 2006.230.00:26:23.27#ibcon#end of sib2, iclass 30, count 0 2006.230.00:26:23.27#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:26:23.27#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:26:23.27#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:26:23.27#ibcon#*before write, iclass 30, count 0 2006.230.00:26:23.27#ibcon#enter sib2, iclass 30, count 0 2006.230.00:26:23.27#ibcon#flushed, iclass 30, count 0 2006.230.00:26:23.27#ibcon#about to write, iclass 30, count 0 2006.230.00:26:23.27#ibcon#wrote, iclass 30, count 0 2006.230.00:26:23.27#ibcon#about to read 3, iclass 30, count 0 2006.230.00:26:23.31#ibcon#read 3, iclass 30, count 0 2006.230.00:26:23.31#ibcon#about to read 4, iclass 30, count 0 2006.230.00:26:23.31#ibcon#read 4, iclass 30, count 0 2006.230.00:26:23.31#ibcon#about to read 5, iclass 30, count 0 2006.230.00:26:23.31#ibcon#read 5, iclass 30, count 0 2006.230.00:26:23.31#ibcon#about to read 6, iclass 30, count 0 2006.230.00:26:23.31#ibcon#read 6, iclass 30, count 0 2006.230.00:26:23.31#ibcon#end of sib2, iclass 30, count 0 2006.230.00:26:23.31#ibcon#*after write, iclass 30, count 0 2006.230.00:26:23.31#ibcon#*before return 0, iclass 30, count 0 2006.230.00:26:23.31#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:23.31#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:26:23.31#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:26:23.31#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:26:23.31$vck44/vb=8,4 2006.230.00:26:23.31#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.00:26:23.31#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.00:26:23.31#ibcon#ireg 11 cls_cnt 2 2006.230.00:26:23.31#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:23.37#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:23.37#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:23.37#ibcon#enter wrdev, iclass 32, count 2 2006.230.00:26:23.37#ibcon#first serial, iclass 32, count 2 2006.230.00:26:23.37#ibcon#enter sib2, iclass 32, count 2 2006.230.00:26:23.37#ibcon#flushed, iclass 32, count 2 2006.230.00:26:23.37#ibcon#about to write, iclass 32, count 2 2006.230.00:26:23.37#ibcon#wrote, iclass 32, count 2 2006.230.00:26:23.37#ibcon#about to read 3, iclass 32, count 2 2006.230.00:26:23.39#ibcon#read 3, iclass 32, count 2 2006.230.00:26:23.39#ibcon#about to read 4, iclass 32, count 2 2006.230.00:26:23.39#ibcon#read 4, iclass 32, count 2 2006.230.00:26:23.39#ibcon#about to read 5, iclass 32, count 2 2006.230.00:26:23.39#ibcon#read 5, iclass 32, count 2 2006.230.00:26:23.39#ibcon#about to read 6, iclass 32, count 2 2006.230.00:26:23.39#ibcon#read 6, iclass 32, count 2 2006.230.00:26:23.39#ibcon#end of sib2, iclass 32, count 2 2006.230.00:26:23.39#ibcon#*mode == 0, iclass 32, count 2 2006.230.00:26:23.39#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.00:26:23.39#ibcon#[27=AT08-04\r\n] 2006.230.00:26:23.39#ibcon#*before write, iclass 32, count 2 2006.230.00:26:23.39#ibcon#enter sib2, iclass 32, count 2 2006.230.00:26:23.39#ibcon#flushed, iclass 32, count 2 2006.230.00:26:23.39#ibcon#about to write, iclass 32, count 2 2006.230.00:26:23.39#ibcon#wrote, iclass 32, count 2 2006.230.00:26:23.39#ibcon#about to read 3, iclass 32, count 2 2006.230.00:26:23.42#ibcon#read 3, iclass 32, count 2 2006.230.00:26:23.42#ibcon#about to read 4, iclass 32, count 2 2006.230.00:26:23.42#ibcon#read 4, iclass 32, count 2 2006.230.00:26:23.42#ibcon#about to read 5, iclass 32, count 2 2006.230.00:26:23.42#ibcon#read 5, iclass 32, count 2 2006.230.00:26:23.42#ibcon#about to read 6, iclass 32, count 2 2006.230.00:26:23.42#ibcon#read 6, iclass 32, count 2 2006.230.00:26:23.42#ibcon#end of sib2, iclass 32, count 2 2006.230.00:26:23.42#ibcon#*after write, iclass 32, count 2 2006.230.00:26:23.42#ibcon#*before return 0, iclass 32, count 2 2006.230.00:26:23.42#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:23.42#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:26:23.42#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.00:26:23.42#ibcon#ireg 7 cls_cnt 0 2006.230.00:26:23.42#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:23.54#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:23.54#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:23.54#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:26:23.54#ibcon#first serial, iclass 32, count 0 2006.230.00:26:23.54#ibcon#enter sib2, iclass 32, count 0 2006.230.00:26:23.54#ibcon#flushed, iclass 32, count 0 2006.230.00:26:23.54#ibcon#about to write, iclass 32, count 0 2006.230.00:26:23.54#ibcon#wrote, iclass 32, count 0 2006.230.00:26:23.54#ibcon#about to read 3, iclass 32, count 0 2006.230.00:26:23.56#ibcon#read 3, iclass 32, count 0 2006.230.00:26:23.56#ibcon#about to read 4, iclass 32, count 0 2006.230.00:26:23.56#ibcon#read 4, iclass 32, count 0 2006.230.00:26:23.56#ibcon#about to read 5, iclass 32, count 0 2006.230.00:26:23.56#ibcon#read 5, iclass 32, count 0 2006.230.00:26:23.56#ibcon#about to read 6, iclass 32, count 0 2006.230.00:26:23.56#ibcon#read 6, iclass 32, count 0 2006.230.00:26:23.56#ibcon#end of sib2, iclass 32, count 0 2006.230.00:26:23.56#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:26:23.56#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:26:23.56#ibcon#[27=USB\r\n] 2006.230.00:26:23.56#ibcon#*before write, iclass 32, count 0 2006.230.00:26:23.56#ibcon#enter sib2, iclass 32, count 0 2006.230.00:26:23.56#ibcon#flushed, iclass 32, count 0 2006.230.00:26:23.56#ibcon#about to write, iclass 32, count 0 2006.230.00:26:23.56#ibcon#wrote, iclass 32, count 0 2006.230.00:26:23.56#ibcon#about to read 3, iclass 32, count 0 2006.230.00:26:23.59#ibcon#read 3, iclass 32, count 0 2006.230.00:26:23.59#ibcon#about to read 4, iclass 32, count 0 2006.230.00:26:23.59#ibcon#read 4, iclass 32, count 0 2006.230.00:26:23.59#ibcon#about to read 5, iclass 32, count 0 2006.230.00:26:23.59#ibcon#read 5, iclass 32, count 0 2006.230.00:26:23.59#ibcon#about to read 6, iclass 32, count 0 2006.230.00:26:23.59#ibcon#read 6, iclass 32, count 0 2006.230.00:26:23.59#ibcon#end of sib2, iclass 32, count 0 2006.230.00:26:23.59#ibcon#*after write, iclass 32, count 0 2006.230.00:26:23.59#ibcon#*before return 0, iclass 32, count 0 2006.230.00:26:23.59#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:23.59#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:26:23.59#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:26:23.59#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:26:23.59$vck44/vabw=wide 2006.230.00:26:23.59#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.00:26:23.59#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.00:26:23.59#ibcon#ireg 8 cls_cnt 0 2006.230.00:26:23.59#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:23.59#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:23.59#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:23.59#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:26:23.59#ibcon#first serial, iclass 34, count 0 2006.230.00:26:23.59#ibcon#enter sib2, iclass 34, count 0 2006.230.00:26:23.59#ibcon#flushed, iclass 34, count 0 2006.230.00:26:23.59#ibcon#about to write, iclass 34, count 0 2006.230.00:26:23.59#ibcon#wrote, iclass 34, count 0 2006.230.00:26:23.59#ibcon#about to read 3, iclass 34, count 0 2006.230.00:26:23.61#ibcon#read 3, iclass 34, count 0 2006.230.00:26:23.61#ibcon#about to read 4, iclass 34, count 0 2006.230.00:26:23.61#ibcon#read 4, iclass 34, count 0 2006.230.00:26:23.61#ibcon#about to read 5, iclass 34, count 0 2006.230.00:26:23.61#ibcon#read 5, iclass 34, count 0 2006.230.00:26:23.61#ibcon#about to read 6, iclass 34, count 0 2006.230.00:26:23.61#ibcon#read 6, iclass 34, count 0 2006.230.00:26:23.61#ibcon#end of sib2, iclass 34, count 0 2006.230.00:26:23.61#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:26:23.61#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:26:23.61#ibcon#[25=BW32\r\n] 2006.230.00:26:23.61#ibcon#*before write, iclass 34, count 0 2006.230.00:26:23.61#ibcon#enter sib2, iclass 34, count 0 2006.230.00:26:23.61#ibcon#flushed, iclass 34, count 0 2006.230.00:26:23.61#ibcon#about to write, iclass 34, count 0 2006.230.00:26:23.61#ibcon#wrote, iclass 34, count 0 2006.230.00:26:23.61#ibcon#about to read 3, iclass 34, count 0 2006.230.00:26:23.64#ibcon#read 3, iclass 34, count 0 2006.230.00:26:23.64#ibcon#about to read 4, iclass 34, count 0 2006.230.00:26:23.64#ibcon#read 4, iclass 34, count 0 2006.230.00:26:23.64#ibcon#about to read 5, iclass 34, count 0 2006.230.00:26:23.64#ibcon#read 5, iclass 34, count 0 2006.230.00:26:23.64#ibcon#about to read 6, iclass 34, count 0 2006.230.00:26:23.64#ibcon#read 6, iclass 34, count 0 2006.230.00:26:23.64#ibcon#end of sib2, iclass 34, count 0 2006.230.00:26:23.64#ibcon#*after write, iclass 34, count 0 2006.230.00:26:23.64#ibcon#*before return 0, iclass 34, count 0 2006.230.00:26:23.64#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:23.64#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:26:23.64#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:26:23.64#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:26:23.64$vck44/vbbw=wide 2006.230.00:26:23.64#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.00:26:23.64#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.00:26:23.64#ibcon#ireg 8 cls_cnt 0 2006.230.00:26:23.64#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:26:23.71#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:26:23.71#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:26:23.71#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:26:23.71#ibcon#first serial, iclass 36, count 0 2006.230.00:26:23.71#ibcon#enter sib2, iclass 36, count 0 2006.230.00:26:23.71#ibcon#flushed, iclass 36, count 0 2006.230.00:26:23.71#ibcon#about to write, iclass 36, count 0 2006.230.00:26:23.71#ibcon#wrote, iclass 36, count 0 2006.230.00:26:23.71#ibcon#about to read 3, iclass 36, count 0 2006.230.00:26:23.73#ibcon#read 3, iclass 36, count 0 2006.230.00:26:23.73#ibcon#about to read 4, iclass 36, count 0 2006.230.00:26:23.73#ibcon#read 4, iclass 36, count 0 2006.230.00:26:23.73#ibcon#about to read 5, iclass 36, count 0 2006.230.00:26:23.73#ibcon#read 5, iclass 36, count 0 2006.230.00:26:23.73#ibcon#about to read 6, iclass 36, count 0 2006.230.00:26:23.73#ibcon#read 6, iclass 36, count 0 2006.230.00:26:23.73#ibcon#end of sib2, iclass 36, count 0 2006.230.00:26:23.73#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:26:23.73#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:26:23.73#ibcon#[27=BW32\r\n] 2006.230.00:26:23.73#ibcon#*before write, iclass 36, count 0 2006.230.00:26:23.73#ibcon#enter sib2, iclass 36, count 0 2006.230.00:26:23.73#ibcon#flushed, iclass 36, count 0 2006.230.00:26:23.73#ibcon#about to write, iclass 36, count 0 2006.230.00:26:23.73#ibcon#wrote, iclass 36, count 0 2006.230.00:26:23.73#ibcon#about to read 3, iclass 36, count 0 2006.230.00:26:23.76#ibcon#read 3, iclass 36, count 0 2006.230.00:26:23.76#ibcon#about to read 4, iclass 36, count 0 2006.230.00:26:23.76#ibcon#read 4, iclass 36, count 0 2006.230.00:26:23.76#ibcon#about to read 5, iclass 36, count 0 2006.230.00:26:23.76#ibcon#read 5, iclass 36, count 0 2006.230.00:26:23.76#ibcon#about to read 6, iclass 36, count 0 2006.230.00:26:23.76#ibcon#read 6, iclass 36, count 0 2006.230.00:26:23.76#ibcon#end of sib2, iclass 36, count 0 2006.230.00:26:23.76#ibcon#*after write, iclass 36, count 0 2006.230.00:26:23.76#ibcon#*before return 0, iclass 36, count 0 2006.230.00:26:23.76#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:26:23.76#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:26:23.76#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:26:23.76#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:26:23.76$setupk4/ifdk4 2006.230.00:26:23.76$ifdk4/lo= 2006.230.00:26:23.76$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:26:23.76$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:26:23.76$ifdk4/patch= 2006.230.00:26:23.76$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:26:23.76$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:26:23.76$setupk4/!*+20s 2006.230.00:26:24.93#abcon#<5=/08 2.0 6.3 31.40 731002.8\r\n> 2006.230.00:26:24.95#abcon#{5=INTERFACE CLEAR} 2006.230.00:26:25.01#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:26:35.10#abcon#<5=/09 2.1 6.3 31.41 731002.8\r\n> 2006.230.00:26:35.12#abcon#{5=INTERFACE CLEAR} 2006.230.00:26:35.18#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:26:38.25$setupk4/"tpicd 2006.230.00:26:38.25$setupk4/echo=off 2006.230.00:26:38.25$setupk4/xlog=off 2006.230.00:26:38.25:!2006.230.00:28:06 2006.230.00:26:39.13#trakl#Source acquired 2006.230.00:26:41.13#flagr#flagr/antenna,acquired 2006.230.00:28:06.00:preob 2006.230.00:28:06.13/onsource/TRACKING 2006.230.00:28:06.13:!2006.230.00:28:16 2006.230.00:28:16.02:"tape 2006.230.00:28:16.02:"st=record 2006.230.00:28:16.02:data_valid=on 2006.230.00:28:16.02:midob 2006.230.00:28:17.13/onsource/TRACKING 2006.230.00:28:17.13/wx/31.45,1002.8,74 2006.230.00:28:17.30/cable/+6.4030E-03 2006.230.00:28:18.38/va/01,08,usb,yes,29,31 2006.230.00:28:18.38/va/02,07,usb,yes,31,31 2006.230.00:28:18.38/va/03,06,usb,yes,38,41 2006.230.00:28:18.38/va/04,07,usb,yes,32,33 2006.230.00:28:18.38/va/05,04,usb,yes,28,29 2006.230.00:28:18.38/va/06,04,usb,yes,32,32 2006.230.00:28:18.38/va/07,05,usb,yes,28,29 2006.230.00:28:18.38/va/08,06,usb,yes,20,25 2006.230.00:28:18.61/valo/01,524.99,yes,locked 2006.230.00:28:18.61/valo/02,534.99,yes,locked 2006.230.00:28:18.61/valo/03,564.99,yes,locked 2006.230.00:28:18.61/valo/04,624.99,yes,locked 2006.230.00:28:18.61/valo/05,734.99,yes,locked 2006.230.00:28:18.61/valo/06,814.99,yes,locked 2006.230.00:28:18.61/valo/07,864.99,yes,locked 2006.230.00:28:18.61/valo/08,884.99,yes,locked 2006.230.00:28:19.70/vb/01,04,usb,yes,30,28 2006.230.00:28:19.70/vb/02,04,usb,yes,33,32 2006.230.00:28:19.70/vb/03,04,usb,yes,30,33 2006.230.00:28:19.70/vb/04,04,usb,yes,34,33 2006.230.00:28:19.70/vb/05,04,usb,yes,27,29 2006.230.00:28:19.70/vb/06,04,usb,yes,31,27 2006.230.00:28:19.70/vb/07,04,usb,yes,31,31 2006.230.00:28:19.70/vb/08,04,usb,yes,28,32 2006.230.00:28:19.93/vblo/01,629.99,yes,locked 2006.230.00:28:19.93/vblo/02,634.99,yes,locked 2006.230.00:28:19.93/vblo/03,649.99,yes,locked 2006.230.00:28:19.93/vblo/04,679.99,yes,locked 2006.230.00:28:19.93/vblo/05,709.99,yes,locked 2006.230.00:28:19.93/vblo/06,719.99,yes,locked 2006.230.00:28:19.93/vblo/07,734.99,yes,locked 2006.230.00:28:19.93/vblo/08,744.99,yes,locked 2006.230.00:28:20.08/vabw/8 2006.230.00:28:20.23/vbbw/8 2006.230.00:28:20.32/xfe/off,on,12.0 2006.230.00:28:20.70/ifatt/23,28,28,28 2006.230.00:28:21.08/fmout-gps/S +4.57E-07 2006.230.00:28:21.12:!2006.230.00:29:56 2006.230.00:29:56.02:data_valid=off 2006.230.00:29:56.02:"et 2006.230.00:29:56.02:!+3s 2006.230.00:29:59.05:"tape 2006.230.00:29:59.06:postob 2006.230.00:29:59.25/cable/+6.4026E-03 2006.230.00:29:59.26/wx/31.48,1002.8,77 2006.230.00:29:59.31/fmout-gps/S +4.56E-07 2006.230.00:29:59.32:scan_name=230-0031,jd0608,50 2006.230.00:29:59.32:source=0552+398,055530.81,394849.2,2000.0,cw 2006.230.00:30:01.15#flagr#flagr/antenna,new-source 2006.230.00:30:01.15:checkk5 2006.230.00:30:01.56/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:30:01.96/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:30:02.36/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:30:02.75/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:30:03.14/chk_obsdata//k5ts1/T2300028??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.00:30:03.54/chk_obsdata//k5ts2/T2300028??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.00:30:03.94/chk_obsdata//k5ts3/T2300028??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.00:30:04.34/chk_obsdata//k5ts4/T2300028??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.00:30:05.08/k5log//k5ts1_log_newline 2006.230.00:30:05.79/k5log//k5ts2_log_newline 2006.230.00:30:06.51/k5log//k5ts3_log_newline 2006.230.00:30:07.22/k5log//k5ts4_log_newline 2006.230.00:30:07.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:30:07.24:setupk4=1 2006.230.00:30:07.24$setupk4/echo=on 2006.230.00:30:07.24$setupk4/pcalon 2006.230.00:30:07.24$pcalon/"no phase cal control is implemented here 2006.230.00:30:07.24$setupk4/"tpicd=stop 2006.230.00:30:07.24$setupk4/"rec=synch_on 2006.230.00:30:07.24$setupk4/"rec_mode=128 2006.230.00:30:07.24$setupk4/!* 2006.230.00:30:07.24$setupk4/recpk4 2006.230.00:30:07.24$recpk4/recpatch= 2006.230.00:30:07.25$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:30:07.25$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:30:07.25$setupk4/vck44 2006.230.00:30:07.25$vck44/valo=1,524.99 2006.230.00:30:07.25#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.00:30:07.25#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.00:30:07.25#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:07.25#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:07.25#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:07.25#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:07.25#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:30:07.25#ibcon#first serial, iclass 21, count 0 2006.230.00:30:07.25#ibcon#enter sib2, iclass 21, count 0 2006.230.00:30:07.25#ibcon#flushed, iclass 21, count 0 2006.230.00:30:07.25#ibcon#about to write, iclass 21, count 0 2006.230.00:30:07.25#ibcon#wrote, iclass 21, count 0 2006.230.00:30:07.25#ibcon#about to read 3, iclass 21, count 0 2006.230.00:30:07.26#ibcon#read 3, iclass 21, count 0 2006.230.00:30:07.26#ibcon#about to read 4, iclass 21, count 0 2006.230.00:30:07.26#ibcon#read 4, iclass 21, count 0 2006.230.00:30:07.26#ibcon#about to read 5, iclass 21, count 0 2006.230.00:30:07.26#ibcon#read 5, iclass 21, count 0 2006.230.00:30:07.26#ibcon#about to read 6, iclass 21, count 0 2006.230.00:30:07.26#ibcon#read 6, iclass 21, count 0 2006.230.00:30:07.26#ibcon#end of sib2, iclass 21, count 0 2006.230.00:30:07.26#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:30:07.26#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:30:07.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:30:07.26#ibcon#*before write, iclass 21, count 0 2006.230.00:30:07.26#ibcon#enter sib2, iclass 21, count 0 2006.230.00:30:07.26#ibcon#flushed, iclass 21, count 0 2006.230.00:30:07.26#ibcon#about to write, iclass 21, count 0 2006.230.00:30:07.26#ibcon#wrote, iclass 21, count 0 2006.230.00:30:07.26#ibcon#about to read 3, iclass 21, count 0 2006.230.00:30:07.31#ibcon#read 3, iclass 21, count 0 2006.230.00:30:07.31#ibcon#about to read 4, iclass 21, count 0 2006.230.00:30:07.31#ibcon#read 4, iclass 21, count 0 2006.230.00:30:07.31#ibcon#about to read 5, iclass 21, count 0 2006.230.00:30:07.31#ibcon#read 5, iclass 21, count 0 2006.230.00:30:07.31#ibcon#about to read 6, iclass 21, count 0 2006.230.00:30:07.31#ibcon#read 6, iclass 21, count 0 2006.230.00:30:07.31#ibcon#end of sib2, iclass 21, count 0 2006.230.00:30:07.31#ibcon#*after write, iclass 21, count 0 2006.230.00:30:07.31#ibcon#*before return 0, iclass 21, count 0 2006.230.00:30:07.31#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:07.31#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:07.31#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:30:07.31#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:30:07.32$vck44/va=1,8 2006.230.00:30:07.32#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.00:30:07.32#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.00:30:07.32#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:07.32#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:07.32#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:07.32#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:07.32#ibcon#enter wrdev, iclass 23, count 2 2006.230.00:30:07.32#ibcon#first serial, iclass 23, count 2 2006.230.00:30:07.32#ibcon#enter sib2, iclass 23, count 2 2006.230.00:30:07.32#ibcon#flushed, iclass 23, count 2 2006.230.00:30:07.32#ibcon#about to write, iclass 23, count 2 2006.230.00:30:07.32#ibcon#wrote, iclass 23, count 2 2006.230.00:30:07.32#ibcon#about to read 3, iclass 23, count 2 2006.230.00:30:07.33#ibcon#read 3, iclass 23, count 2 2006.230.00:30:07.33#ibcon#about to read 4, iclass 23, count 2 2006.230.00:30:07.33#ibcon#read 4, iclass 23, count 2 2006.230.00:30:07.33#ibcon#about to read 5, iclass 23, count 2 2006.230.00:30:07.33#ibcon#read 5, iclass 23, count 2 2006.230.00:30:07.33#ibcon#about to read 6, iclass 23, count 2 2006.230.00:30:07.33#ibcon#read 6, iclass 23, count 2 2006.230.00:30:07.33#ibcon#end of sib2, iclass 23, count 2 2006.230.00:30:07.33#ibcon#*mode == 0, iclass 23, count 2 2006.230.00:30:07.33#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.00:30:07.33#ibcon#[25=AT01-08\r\n] 2006.230.00:30:07.33#ibcon#*before write, iclass 23, count 2 2006.230.00:30:07.33#ibcon#enter sib2, iclass 23, count 2 2006.230.00:30:07.33#ibcon#flushed, iclass 23, count 2 2006.230.00:30:07.33#ibcon#about to write, iclass 23, count 2 2006.230.00:30:07.33#ibcon#wrote, iclass 23, count 2 2006.230.00:30:07.33#ibcon#about to read 3, iclass 23, count 2 2006.230.00:30:07.36#ibcon#read 3, iclass 23, count 2 2006.230.00:30:07.36#ibcon#about to read 4, iclass 23, count 2 2006.230.00:30:07.36#ibcon#read 4, iclass 23, count 2 2006.230.00:30:07.36#ibcon#about to read 5, iclass 23, count 2 2006.230.00:30:07.36#ibcon#read 5, iclass 23, count 2 2006.230.00:30:07.36#ibcon#about to read 6, iclass 23, count 2 2006.230.00:30:07.36#ibcon#read 6, iclass 23, count 2 2006.230.00:30:07.36#ibcon#end of sib2, iclass 23, count 2 2006.230.00:30:07.36#ibcon#*after write, iclass 23, count 2 2006.230.00:30:07.36#ibcon#*before return 0, iclass 23, count 2 2006.230.00:30:07.36#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:07.36#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:07.36#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.00:30:07.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:07.36#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:07.48#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:07.48#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:07.48#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:30:07.48#ibcon#first serial, iclass 23, count 0 2006.230.00:30:07.48#ibcon#enter sib2, iclass 23, count 0 2006.230.00:30:07.48#ibcon#flushed, iclass 23, count 0 2006.230.00:30:07.48#ibcon#about to write, iclass 23, count 0 2006.230.00:30:07.48#ibcon#wrote, iclass 23, count 0 2006.230.00:30:07.48#ibcon#about to read 3, iclass 23, count 0 2006.230.00:30:07.50#ibcon#read 3, iclass 23, count 0 2006.230.00:30:07.50#ibcon#about to read 4, iclass 23, count 0 2006.230.00:30:07.50#ibcon#read 4, iclass 23, count 0 2006.230.00:30:07.50#ibcon#about to read 5, iclass 23, count 0 2006.230.00:30:07.50#ibcon#read 5, iclass 23, count 0 2006.230.00:30:07.50#ibcon#about to read 6, iclass 23, count 0 2006.230.00:30:07.50#ibcon#read 6, iclass 23, count 0 2006.230.00:30:07.50#ibcon#end of sib2, iclass 23, count 0 2006.230.00:30:07.50#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:30:07.50#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:30:07.50#ibcon#[25=USB\r\n] 2006.230.00:30:07.50#ibcon#*before write, iclass 23, count 0 2006.230.00:30:07.50#ibcon#enter sib2, iclass 23, count 0 2006.230.00:30:07.50#ibcon#flushed, iclass 23, count 0 2006.230.00:30:07.50#ibcon#about to write, iclass 23, count 0 2006.230.00:30:07.50#ibcon#wrote, iclass 23, count 0 2006.230.00:30:07.50#ibcon#about to read 3, iclass 23, count 0 2006.230.00:30:07.53#ibcon#read 3, iclass 23, count 0 2006.230.00:30:07.53#ibcon#about to read 4, iclass 23, count 0 2006.230.00:30:07.53#ibcon#read 4, iclass 23, count 0 2006.230.00:30:07.53#ibcon#about to read 5, iclass 23, count 0 2006.230.00:30:07.53#ibcon#read 5, iclass 23, count 0 2006.230.00:30:07.53#ibcon#about to read 6, iclass 23, count 0 2006.230.00:30:07.53#ibcon#read 6, iclass 23, count 0 2006.230.00:30:07.53#ibcon#end of sib2, iclass 23, count 0 2006.230.00:30:07.53#ibcon#*after write, iclass 23, count 0 2006.230.00:30:07.53#ibcon#*before return 0, iclass 23, count 0 2006.230.00:30:07.53#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:07.53#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:07.53#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:30:07.53#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:30:07.54$vck44/valo=2,534.99 2006.230.00:30:07.54#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.00:30:07.54#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.00:30:07.54#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:07.54#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:07.54#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:07.54#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:07.54#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:30:07.54#ibcon#first serial, iclass 25, count 0 2006.230.00:30:07.54#ibcon#enter sib2, iclass 25, count 0 2006.230.00:30:07.54#ibcon#flushed, iclass 25, count 0 2006.230.00:30:07.54#ibcon#about to write, iclass 25, count 0 2006.230.00:30:07.54#ibcon#wrote, iclass 25, count 0 2006.230.00:30:07.54#ibcon#about to read 3, iclass 25, count 0 2006.230.00:30:07.55#ibcon#read 3, iclass 25, count 0 2006.230.00:30:07.55#ibcon#about to read 4, iclass 25, count 0 2006.230.00:30:07.55#ibcon#read 4, iclass 25, count 0 2006.230.00:30:07.55#ibcon#about to read 5, iclass 25, count 0 2006.230.00:30:07.55#ibcon#read 5, iclass 25, count 0 2006.230.00:30:07.55#ibcon#about to read 6, iclass 25, count 0 2006.230.00:30:07.55#ibcon#read 6, iclass 25, count 0 2006.230.00:30:07.55#ibcon#end of sib2, iclass 25, count 0 2006.230.00:30:07.55#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:30:07.55#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:30:07.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:30:07.55#ibcon#*before write, iclass 25, count 0 2006.230.00:30:07.55#ibcon#enter sib2, iclass 25, count 0 2006.230.00:30:07.55#ibcon#flushed, iclass 25, count 0 2006.230.00:30:07.55#ibcon#about to write, iclass 25, count 0 2006.230.00:30:07.55#ibcon#wrote, iclass 25, count 0 2006.230.00:30:07.55#ibcon#about to read 3, iclass 25, count 0 2006.230.00:30:07.59#ibcon#read 3, iclass 25, count 0 2006.230.00:30:07.59#ibcon#about to read 4, iclass 25, count 0 2006.230.00:30:07.59#ibcon#read 4, iclass 25, count 0 2006.230.00:30:07.59#ibcon#about to read 5, iclass 25, count 0 2006.230.00:30:07.59#ibcon#read 5, iclass 25, count 0 2006.230.00:30:07.59#ibcon#about to read 6, iclass 25, count 0 2006.230.00:30:07.59#ibcon#read 6, iclass 25, count 0 2006.230.00:30:07.59#ibcon#end of sib2, iclass 25, count 0 2006.230.00:30:07.59#ibcon#*after write, iclass 25, count 0 2006.230.00:30:07.59#ibcon#*before return 0, iclass 25, count 0 2006.230.00:30:07.59#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:07.59#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:07.59#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:30:07.59#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:30:07.60$vck44/va=2,7 2006.230.00:30:07.60#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.00:30:07.60#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.00:30:07.60#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:07.60#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:07.64#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:07.64#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:07.64#ibcon#enter wrdev, iclass 27, count 2 2006.230.00:30:07.64#ibcon#first serial, iclass 27, count 2 2006.230.00:30:07.64#ibcon#enter sib2, iclass 27, count 2 2006.230.00:30:07.64#ibcon#flushed, iclass 27, count 2 2006.230.00:30:07.64#ibcon#about to write, iclass 27, count 2 2006.230.00:30:07.64#ibcon#wrote, iclass 27, count 2 2006.230.00:30:07.64#ibcon#about to read 3, iclass 27, count 2 2006.230.00:30:07.66#ibcon#read 3, iclass 27, count 2 2006.230.00:30:07.66#ibcon#about to read 4, iclass 27, count 2 2006.230.00:30:07.66#ibcon#read 4, iclass 27, count 2 2006.230.00:30:07.66#ibcon#about to read 5, iclass 27, count 2 2006.230.00:30:07.66#ibcon#read 5, iclass 27, count 2 2006.230.00:30:07.66#ibcon#about to read 6, iclass 27, count 2 2006.230.00:30:07.66#ibcon#read 6, iclass 27, count 2 2006.230.00:30:07.66#ibcon#end of sib2, iclass 27, count 2 2006.230.00:30:07.66#ibcon#*mode == 0, iclass 27, count 2 2006.230.00:30:07.66#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.00:30:07.66#ibcon#[25=AT02-07\r\n] 2006.230.00:30:07.66#ibcon#*before write, iclass 27, count 2 2006.230.00:30:07.66#ibcon#enter sib2, iclass 27, count 2 2006.230.00:30:07.66#ibcon#flushed, iclass 27, count 2 2006.230.00:30:07.66#ibcon#about to write, iclass 27, count 2 2006.230.00:30:07.66#ibcon#wrote, iclass 27, count 2 2006.230.00:30:07.66#ibcon#about to read 3, iclass 27, count 2 2006.230.00:30:07.69#ibcon#read 3, iclass 27, count 2 2006.230.00:30:07.69#ibcon#about to read 4, iclass 27, count 2 2006.230.00:30:07.69#ibcon#read 4, iclass 27, count 2 2006.230.00:30:07.69#ibcon#about to read 5, iclass 27, count 2 2006.230.00:30:07.69#ibcon#read 5, iclass 27, count 2 2006.230.00:30:07.69#ibcon#about to read 6, iclass 27, count 2 2006.230.00:30:07.69#ibcon#read 6, iclass 27, count 2 2006.230.00:30:07.69#ibcon#end of sib2, iclass 27, count 2 2006.230.00:30:07.69#ibcon#*after write, iclass 27, count 2 2006.230.00:30:07.69#ibcon#*before return 0, iclass 27, count 2 2006.230.00:30:07.69#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:07.69#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:07.69#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.00:30:07.69#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:07.69#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:07.81#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:07.81#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:07.81#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:30:07.81#ibcon#first serial, iclass 27, count 0 2006.230.00:30:07.81#ibcon#enter sib2, iclass 27, count 0 2006.230.00:30:07.81#ibcon#flushed, iclass 27, count 0 2006.230.00:30:07.81#ibcon#about to write, iclass 27, count 0 2006.230.00:30:07.81#ibcon#wrote, iclass 27, count 0 2006.230.00:30:07.81#ibcon#about to read 3, iclass 27, count 0 2006.230.00:30:07.83#ibcon#read 3, iclass 27, count 0 2006.230.00:30:07.83#ibcon#about to read 4, iclass 27, count 0 2006.230.00:30:07.83#ibcon#read 4, iclass 27, count 0 2006.230.00:30:07.83#ibcon#about to read 5, iclass 27, count 0 2006.230.00:30:07.83#ibcon#read 5, iclass 27, count 0 2006.230.00:30:07.83#ibcon#about to read 6, iclass 27, count 0 2006.230.00:30:07.83#ibcon#read 6, iclass 27, count 0 2006.230.00:30:07.83#ibcon#end of sib2, iclass 27, count 0 2006.230.00:30:07.83#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:30:07.83#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:30:07.83#ibcon#[25=USB\r\n] 2006.230.00:30:07.83#ibcon#*before write, iclass 27, count 0 2006.230.00:30:07.83#ibcon#enter sib2, iclass 27, count 0 2006.230.00:30:07.83#ibcon#flushed, iclass 27, count 0 2006.230.00:30:07.83#ibcon#about to write, iclass 27, count 0 2006.230.00:30:07.83#ibcon#wrote, iclass 27, count 0 2006.230.00:30:07.83#ibcon#about to read 3, iclass 27, count 0 2006.230.00:30:07.86#ibcon#read 3, iclass 27, count 0 2006.230.00:30:07.86#ibcon#about to read 4, iclass 27, count 0 2006.230.00:30:07.86#ibcon#read 4, iclass 27, count 0 2006.230.00:30:07.86#ibcon#about to read 5, iclass 27, count 0 2006.230.00:30:07.86#ibcon#read 5, iclass 27, count 0 2006.230.00:30:07.86#ibcon#about to read 6, iclass 27, count 0 2006.230.00:30:07.86#ibcon#read 6, iclass 27, count 0 2006.230.00:30:07.86#ibcon#end of sib2, iclass 27, count 0 2006.230.00:30:07.86#ibcon#*after write, iclass 27, count 0 2006.230.00:30:07.86#ibcon#*before return 0, iclass 27, count 0 2006.230.00:30:07.86#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:07.86#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:07.86#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:30:07.86#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:30:07.86$vck44/valo=3,564.99 2006.230.00:30:07.87#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.00:30:07.87#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.00:30:07.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:07.87#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:07.87#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:07.87#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:07.87#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:30:07.87#ibcon#first serial, iclass 29, count 0 2006.230.00:30:07.87#ibcon#enter sib2, iclass 29, count 0 2006.230.00:30:07.87#ibcon#flushed, iclass 29, count 0 2006.230.00:30:07.87#ibcon#about to write, iclass 29, count 0 2006.230.00:30:07.87#ibcon#wrote, iclass 29, count 0 2006.230.00:30:07.87#ibcon#about to read 3, iclass 29, count 0 2006.230.00:30:07.88#ibcon#read 3, iclass 29, count 0 2006.230.00:30:07.88#ibcon#about to read 4, iclass 29, count 0 2006.230.00:30:07.88#ibcon#read 4, iclass 29, count 0 2006.230.00:30:07.88#ibcon#about to read 5, iclass 29, count 0 2006.230.00:30:07.88#ibcon#read 5, iclass 29, count 0 2006.230.00:30:07.88#ibcon#about to read 6, iclass 29, count 0 2006.230.00:30:07.88#ibcon#read 6, iclass 29, count 0 2006.230.00:30:07.88#ibcon#end of sib2, iclass 29, count 0 2006.230.00:30:07.88#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:30:07.88#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:30:07.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:30:07.88#ibcon#*before write, iclass 29, count 0 2006.230.00:30:07.88#ibcon#enter sib2, iclass 29, count 0 2006.230.00:30:07.88#ibcon#flushed, iclass 29, count 0 2006.230.00:30:07.88#ibcon#about to write, iclass 29, count 0 2006.230.00:30:07.88#ibcon#wrote, iclass 29, count 0 2006.230.00:30:07.88#ibcon#about to read 3, iclass 29, count 0 2006.230.00:30:07.92#ibcon#read 3, iclass 29, count 0 2006.230.00:30:07.92#ibcon#about to read 4, iclass 29, count 0 2006.230.00:30:07.92#ibcon#read 4, iclass 29, count 0 2006.230.00:30:07.92#ibcon#about to read 5, iclass 29, count 0 2006.230.00:30:07.92#ibcon#read 5, iclass 29, count 0 2006.230.00:30:07.92#ibcon#about to read 6, iclass 29, count 0 2006.230.00:30:07.92#ibcon#read 6, iclass 29, count 0 2006.230.00:30:07.92#ibcon#end of sib2, iclass 29, count 0 2006.230.00:30:07.92#ibcon#*after write, iclass 29, count 0 2006.230.00:30:07.92#ibcon#*before return 0, iclass 29, count 0 2006.230.00:30:07.92#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:07.92#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:07.92#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:30:07.92#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:30:07.93$vck44/va=3,6 2006.230.00:30:07.93#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.00:30:07.93#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.00:30:07.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:07.93#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:07.97#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:07.97#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:07.97#ibcon#enter wrdev, iclass 31, count 2 2006.230.00:30:07.97#ibcon#first serial, iclass 31, count 2 2006.230.00:30:07.97#ibcon#enter sib2, iclass 31, count 2 2006.230.00:30:07.97#ibcon#flushed, iclass 31, count 2 2006.230.00:30:07.97#ibcon#about to write, iclass 31, count 2 2006.230.00:30:07.97#ibcon#wrote, iclass 31, count 2 2006.230.00:30:07.97#ibcon#about to read 3, iclass 31, count 2 2006.230.00:30:07.99#ibcon#read 3, iclass 31, count 2 2006.230.00:30:07.99#ibcon#about to read 4, iclass 31, count 2 2006.230.00:30:07.99#ibcon#read 4, iclass 31, count 2 2006.230.00:30:07.99#ibcon#about to read 5, iclass 31, count 2 2006.230.00:30:07.99#ibcon#read 5, iclass 31, count 2 2006.230.00:30:07.99#ibcon#about to read 6, iclass 31, count 2 2006.230.00:30:07.99#ibcon#read 6, iclass 31, count 2 2006.230.00:30:07.99#ibcon#end of sib2, iclass 31, count 2 2006.230.00:30:07.99#ibcon#*mode == 0, iclass 31, count 2 2006.230.00:30:07.99#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.00:30:07.99#ibcon#[25=AT03-06\r\n] 2006.230.00:30:07.99#ibcon#*before write, iclass 31, count 2 2006.230.00:30:07.99#ibcon#enter sib2, iclass 31, count 2 2006.230.00:30:07.99#ibcon#flushed, iclass 31, count 2 2006.230.00:30:07.99#ibcon#about to write, iclass 31, count 2 2006.230.00:30:07.99#ibcon#wrote, iclass 31, count 2 2006.230.00:30:07.99#ibcon#about to read 3, iclass 31, count 2 2006.230.00:30:08.02#ibcon#read 3, iclass 31, count 2 2006.230.00:30:08.02#ibcon#about to read 4, iclass 31, count 2 2006.230.00:30:08.02#ibcon#read 4, iclass 31, count 2 2006.230.00:30:08.02#ibcon#about to read 5, iclass 31, count 2 2006.230.00:30:08.02#ibcon#read 5, iclass 31, count 2 2006.230.00:30:08.02#ibcon#about to read 6, iclass 31, count 2 2006.230.00:30:08.02#ibcon#read 6, iclass 31, count 2 2006.230.00:30:08.02#ibcon#end of sib2, iclass 31, count 2 2006.230.00:30:08.02#ibcon#*after write, iclass 31, count 2 2006.230.00:30:08.02#ibcon#*before return 0, iclass 31, count 2 2006.230.00:30:08.02#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:08.02#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:08.02#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.00:30:08.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:08.02#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:08.15#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:08.15#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:08.15#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:30:08.15#ibcon#first serial, iclass 31, count 0 2006.230.00:30:08.15#ibcon#enter sib2, iclass 31, count 0 2006.230.00:30:08.15#ibcon#flushed, iclass 31, count 0 2006.230.00:30:08.15#ibcon#about to write, iclass 31, count 0 2006.230.00:30:08.15#ibcon#wrote, iclass 31, count 0 2006.230.00:30:08.15#ibcon#about to read 3, iclass 31, count 0 2006.230.00:30:08.16#ibcon#read 3, iclass 31, count 0 2006.230.00:30:08.16#ibcon#about to read 4, iclass 31, count 0 2006.230.00:30:08.16#ibcon#read 4, iclass 31, count 0 2006.230.00:30:08.16#ibcon#about to read 5, iclass 31, count 0 2006.230.00:30:08.16#ibcon#read 5, iclass 31, count 0 2006.230.00:30:08.16#ibcon#about to read 6, iclass 31, count 0 2006.230.00:30:08.16#ibcon#read 6, iclass 31, count 0 2006.230.00:30:08.16#ibcon#end of sib2, iclass 31, count 0 2006.230.00:30:08.16#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:30:08.16#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:30:08.16#ibcon#[25=USB\r\n] 2006.230.00:30:08.16#ibcon#*before write, iclass 31, count 0 2006.230.00:30:08.16#ibcon#enter sib2, iclass 31, count 0 2006.230.00:30:08.16#ibcon#flushed, iclass 31, count 0 2006.230.00:30:08.16#ibcon#about to write, iclass 31, count 0 2006.230.00:30:08.16#ibcon#wrote, iclass 31, count 0 2006.230.00:30:08.16#ibcon#about to read 3, iclass 31, count 0 2006.230.00:30:08.19#ibcon#read 3, iclass 31, count 0 2006.230.00:30:08.19#ibcon#about to read 4, iclass 31, count 0 2006.230.00:30:08.19#ibcon#read 4, iclass 31, count 0 2006.230.00:30:08.19#ibcon#about to read 5, iclass 31, count 0 2006.230.00:30:08.19#ibcon#read 5, iclass 31, count 0 2006.230.00:30:08.19#ibcon#about to read 6, iclass 31, count 0 2006.230.00:30:08.19#ibcon#read 6, iclass 31, count 0 2006.230.00:30:08.19#ibcon#end of sib2, iclass 31, count 0 2006.230.00:30:08.19#ibcon#*after write, iclass 31, count 0 2006.230.00:30:08.19#ibcon#*before return 0, iclass 31, count 0 2006.230.00:30:08.19#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:08.19#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:08.19#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:30:08.19#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:30:08.20$vck44/valo=4,624.99 2006.230.00:30:08.20#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.00:30:08.20#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.00:30:08.20#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:08.20#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:08.20#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:08.20#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:08.20#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:30:08.20#ibcon#first serial, iclass 33, count 0 2006.230.00:30:08.20#ibcon#enter sib2, iclass 33, count 0 2006.230.00:30:08.20#ibcon#flushed, iclass 33, count 0 2006.230.00:30:08.20#ibcon#about to write, iclass 33, count 0 2006.230.00:30:08.20#ibcon#wrote, iclass 33, count 0 2006.230.00:30:08.20#ibcon#about to read 3, iclass 33, count 0 2006.230.00:30:08.21#ibcon#read 3, iclass 33, count 0 2006.230.00:30:08.21#ibcon#about to read 4, iclass 33, count 0 2006.230.00:30:08.21#ibcon#read 4, iclass 33, count 0 2006.230.00:30:08.21#ibcon#about to read 5, iclass 33, count 0 2006.230.00:30:08.21#ibcon#read 5, iclass 33, count 0 2006.230.00:30:08.21#ibcon#about to read 6, iclass 33, count 0 2006.230.00:30:08.21#ibcon#read 6, iclass 33, count 0 2006.230.00:30:08.21#ibcon#end of sib2, iclass 33, count 0 2006.230.00:30:08.21#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:30:08.21#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:30:08.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:30:08.21#ibcon#*before write, iclass 33, count 0 2006.230.00:30:08.21#ibcon#enter sib2, iclass 33, count 0 2006.230.00:30:08.21#ibcon#flushed, iclass 33, count 0 2006.230.00:30:08.21#ibcon#about to write, iclass 33, count 0 2006.230.00:30:08.21#ibcon#wrote, iclass 33, count 0 2006.230.00:30:08.21#ibcon#about to read 3, iclass 33, count 0 2006.230.00:30:08.25#ibcon#read 3, iclass 33, count 0 2006.230.00:30:08.25#ibcon#about to read 4, iclass 33, count 0 2006.230.00:30:08.25#ibcon#read 4, iclass 33, count 0 2006.230.00:30:08.25#ibcon#about to read 5, iclass 33, count 0 2006.230.00:30:08.25#ibcon#read 5, iclass 33, count 0 2006.230.00:30:08.25#ibcon#about to read 6, iclass 33, count 0 2006.230.00:30:08.25#ibcon#read 6, iclass 33, count 0 2006.230.00:30:08.25#ibcon#end of sib2, iclass 33, count 0 2006.230.00:30:08.25#ibcon#*after write, iclass 33, count 0 2006.230.00:30:08.25#ibcon#*before return 0, iclass 33, count 0 2006.230.00:30:08.25#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:08.25#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:08.25#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:30:08.25#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:30:08.26$vck44/va=4,7 2006.230.00:30:08.26#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.230.00:30:08.26#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.230.00:30:08.26#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:08.26#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:08.30#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:08.30#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:08.30#ibcon#enter wrdev, iclass 35, count 2 2006.230.00:30:08.30#ibcon#first serial, iclass 35, count 2 2006.230.00:30:08.30#ibcon#enter sib2, iclass 35, count 2 2006.230.00:30:08.30#ibcon#flushed, iclass 35, count 2 2006.230.00:30:08.30#ibcon#about to write, iclass 35, count 2 2006.230.00:30:08.30#ibcon#wrote, iclass 35, count 2 2006.230.00:30:08.30#ibcon#about to read 3, iclass 35, count 2 2006.230.00:30:08.32#ibcon#read 3, iclass 35, count 2 2006.230.00:30:08.32#ibcon#about to read 4, iclass 35, count 2 2006.230.00:30:08.32#ibcon#read 4, iclass 35, count 2 2006.230.00:30:08.32#ibcon#about to read 5, iclass 35, count 2 2006.230.00:30:08.32#ibcon#read 5, iclass 35, count 2 2006.230.00:30:08.32#ibcon#about to read 6, iclass 35, count 2 2006.230.00:30:08.32#ibcon#read 6, iclass 35, count 2 2006.230.00:30:08.32#ibcon#end of sib2, iclass 35, count 2 2006.230.00:30:08.32#ibcon#*mode == 0, iclass 35, count 2 2006.230.00:30:08.32#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.230.00:30:08.32#ibcon#[25=AT04-07\r\n] 2006.230.00:30:08.32#ibcon#*before write, iclass 35, count 2 2006.230.00:30:08.32#ibcon#enter sib2, iclass 35, count 2 2006.230.00:30:08.32#ibcon#flushed, iclass 35, count 2 2006.230.00:30:08.32#ibcon#about to write, iclass 35, count 2 2006.230.00:30:08.32#ibcon#wrote, iclass 35, count 2 2006.230.00:30:08.32#ibcon#about to read 3, iclass 35, count 2 2006.230.00:30:08.35#ibcon#read 3, iclass 35, count 2 2006.230.00:30:08.35#ibcon#about to read 4, iclass 35, count 2 2006.230.00:30:08.35#ibcon#read 4, iclass 35, count 2 2006.230.00:30:08.35#ibcon#about to read 5, iclass 35, count 2 2006.230.00:30:08.35#ibcon#read 5, iclass 35, count 2 2006.230.00:30:08.35#ibcon#about to read 6, iclass 35, count 2 2006.230.00:30:08.35#ibcon#read 6, iclass 35, count 2 2006.230.00:30:08.35#ibcon#end of sib2, iclass 35, count 2 2006.230.00:30:08.35#ibcon#*after write, iclass 35, count 2 2006.230.00:30:08.41#ibcon#*before return 0, iclass 35, count 2 2006.230.00:30:08.41#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:08.41#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:08.41#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.230.00:30:08.41#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:08.41#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:08.52#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:08.52#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:08.52#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:30:08.52#ibcon#first serial, iclass 35, count 0 2006.230.00:30:08.52#ibcon#enter sib2, iclass 35, count 0 2006.230.00:30:08.52#ibcon#flushed, iclass 35, count 0 2006.230.00:30:08.52#ibcon#about to write, iclass 35, count 0 2006.230.00:30:08.52#ibcon#wrote, iclass 35, count 0 2006.230.00:30:08.52#ibcon#about to read 3, iclass 35, count 0 2006.230.00:30:08.54#ibcon#read 3, iclass 35, count 0 2006.230.00:30:08.54#ibcon#about to read 4, iclass 35, count 0 2006.230.00:30:08.54#ibcon#read 4, iclass 35, count 0 2006.230.00:30:08.54#ibcon#about to read 5, iclass 35, count 0 2006.230.00:30:08.54#ibcon#read 5, iclass 35, count 0 2006.230.00:30:08.54#ibcon#about to read 6, iclass 35, count 0 2006.230.00:30:08.54#ibcon#read 6, iclass 35, count 0 2006.230.00:30:08.54#ibcon#end of sib2, iclass 35, count 0 2006.230.00:30:08.54#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:30:08.54#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:30:08.54#ibcon#[25=USB\r\n] 2006.230.00:30:08.54#ibcon#*before write, iclass 35, count 0 2006.230.00:30:08.54#ibcon#enter sib2, iclass 35, count 0 2006.230.00:30:08.54#ibcon#flushed, iclass 35, count 0 2006.230.00:30:08.54#ibcon#about to write, iclass 35, count 0 2006.230.00:30:08.54#ibcon#wrote, iclass 35, count 0 2006.230.00:30:08.54#ibcon#about to read 3, iclass 35, count 0 2006.230.00:30:08.57#ibcon#read 3, iclass 35, count 0 2006.230.00:30:08.57#ibcon#about to read 4, iclass 35, count 0 2006.230.00:30:08.57#ibcon#read 4, iclass 35, count 0 2006.230.00:30:08.57#ibcon#about to read 5, iclass 35, count 0 2006.230.00:30:08.57#ibcon#read 5, iclass 35, count 0 2006.230.00:30:08.57#ibcon#about to read 6, iclass 35, count 0 2006.230.00:30:08.57#ibcon#read 6, iclass 35, count 0 2006.230.00:30:08.57#ibcon#end of sib2, iclass 35, count 0 2006.230.00:30:08.57#ibcon#*after write, iclass 35, count 0 2006.230.00:30:08.57#ibcon#*before return 0, iclass 35, count 0 2006.230.00:30:08.57#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:08.57#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:08.57#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:30:08.57#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:30:08.58$vck44/valo=5,734.99 2006.230.00:30:08.58#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.00:30:08.58#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.00:30:08.58#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:08.58#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:08.58#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:08.58#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:08.58#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:30:08.58#ibcon#first serial, iclass 37, count 0 2006.230.00:30:08.58#ibcon#enter sib2, iclass 37, count 0 2006.230.00:30:08.58#ibcon#flushed, iclass 37, count 0 2006.230.00:30:08.58#ibcon#about to write, iclass 37, count 0 2006.230.00:30:08.58#ibcon#wrote, iclass 37, count 0 2006.230.00:30:08.58#ibcon#about to read 3, iclass 37, count 0 2006.230.00:30:08.59#ibcon#read 3, iclass 37, count 0 2006.230.00:30:08.59#ibcon#about to read 4, iclass 37, count 0 2006.230.00:30:08.59#ibcon#read 4, iclass 37, count 0 2006.230.00:30:08.59#ibcon#about to read 5, iclass 37, count 0 2006.230.00:30:08.59#ibcon#read 5, iclass 37, count 0 2006.230.00:30:08.59#ibcon#about to read 6, iclass 37, count 0 2006.230.00:30:08.59#ibcon#read 6, iclass 37, count 0 2006.230.00:30:08.59#ibcon#end of sib2, iclass 37, count 0 2006.230.00:30:08.59#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:30:08.59#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:30:08.59#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:30:08.59#ibcon#*before write, iclass 37, count 0 2006.230.00:30:08.59#ibcon#enter sib2, iclass 37, count 0 2006.230.00:30:08.59#ibcon#flushed, iclass 37, count 0 2006.230.00:30:08.59#ibcon#about to write, iclass 37, count 0 2006.230.00:30:08.59#ibcon#wrote, iclass 37, count 0 2006.230.00:30:08.59#ibcon#about to read 3, iclass 37, count 0 2006.230.00:30:08.63#ibcon#read 3, iclass 37, count 0 2006.230.00:30:08.63#ibcon#about to read 4, iclass 37, count 0 2006.230.00:30:08.63#ibcon#read 4, iclass 37, count 0 2006.230.00:30:08.63#ibcon#about to read 5, iclass 37, count 0 2006.230.00:30:08.63#ibcon#read 5, iclass 37, count 0 2006.230.00:30:08.63#ibcon#about to read 6, iclass 37, count 0 2006.230.00:30:08.63#ibcon#read 6, iclass 37, count 0 2006.230.00:30:08.63#ibcon#end of sib2, iclass 37, count 0 2006.230.00:30:08.63#ibcon#*after write, iclass 37, count 0 2006.230.00:30:08.63#ibcon#*before return 0, iclass 37, count 0 2006.230.00:30:08.63#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:08.63#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:08.63#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:30:08.63#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:30:08.64$vck44/va=5,4 2006.230.00:30:08.64#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.00:30:08.64#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.00:30:08.64#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:08.64#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:30:08.66#abcon#<5=/08 2.3 7.2 31.48 771002.8\r\n> 2006.230.00:30:08.68#abcon#{5=INTERFACE CLEAR} 2006.230.00:30:08.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:30:08.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:30:08.68#ibcon#enter wrdev, iclass 40, count 2 2006.230.00:30:08.68#ibcon#first serial, iclass 40, count 2 2006.230.00:30:08.68#ibcon#enter sib2, iclass 40, count 2 2006.230.00:30:08.68#ibcon#flushed, iclass 40, count 2 2006.230.00:30:08.68#ibcon#about to write, iclass 40, count 2 2006.230.00:30:08.68#ibcon#wrote, iclass 40, count 2 2006.230.00:30:08.68#ibcon#about to read 3, iclass 40, count 2 2006.230.00:30:08.70#ibcon#read 3, iclass 40, count 2 2006.230.00:30:08.70#ibcon#about to read 4, iclass 40, count 2 2006.230.00:30:08.70#ibcon#read 4, iclass 40, count 2 2006.230.00:30:08.70#ibcon#about to read 5, iclass 40, count 2 2006.230.00:30:08.70#ibcon#read 5, iclass 40, count 2 2006.230.00:30:08.70#ibcon#about to read 6, iclass 40, count 2 2006.230.00:30:08.70#ibcon#read 6, iclass 40, count 2 2006.230.00:30:08.70#ibcon#end of sib2, iclass 40, count 2 2006.230.00:30:08.70#ibcon#*mode == 0, iclass 40, count 2 2006.230.00:30:08.70#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.00:30:08.70#ibcon#[25=AT05-04\r\n] 2006.230.00:30:08.70#ibcon#*before write, iclass 40, count 2 2006.230.00:30:08.70#ibcon#enter sib2, iclass 40, count 2 2006.230.00:30:08.70#ibcon#flushed, iclass 40, count 2 2006.230.00:30:08.70#ibcon#about to write, iclass 40, count 2 2006.230.00:30:08.70#ibcon#wrote, iclass 40, count 2 2006.230.00:30:08.70#ibcon#about to read 3, iclass 40, count 2 2006.230.00:30:08.73#ibcon#read 3, iclass 40, count 2 2006.230.00:30:08.73#ibcon#about to read 4, iclass 40, count 2 2006.230.00:30:08.73#ibcon#read 4, iclass 40, count 2 2006.230.00:30:08.73#ibcon#about to read 5, iclass 40, count 2 2006.230.00:30:08.73#ibcon#read 5, iclass 40, count 2 2006.230.00:30:08.73#ibcon#about to read 6, iclass 40, count 2 2006.230.00:30:08.73#ibcon#read 6, iclass 40, count 2 2006.230.00:30:08.73#ibcon#end of sib2, iclass 40, count 2 2006.230.00:30:08.73#ibcon#*after write, iclass 40, count 2 2006.230.00:30:08.73#ibcon#*before return 0, iclass 40, count 2 2006.230.00:30:08.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:30:08.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:30:08.73#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.00:30:08.73#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:08.73#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:30:08.74#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:30:08.85#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:30:08.85#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:30:08.85#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:30:08.85#ibcon#first serial, iclass 40, count 0 2006.230.00:30:08.85#ibcon#enter sib2, iclass 40, count 0 2006.230.00:30:08.85#ibcon#flushed, iclass 40, count 0 2006.230.00:30:08.85#ibcon#about to write, iclass 40, count 0 2006.230.00:30:08.85#ibcon#wrote, iclass 40, count 0 2006.230.00:30:08.85#ibcon#about to read 3, iclass 40, count 0 2006.230.00:30:08.87#ibcon#read 3, iclass 40, count 0 2006.230.00:30:08.87#ibcon#about to read 4, iclass 40, count 0 2006.230.00:30:08.87#ibcon#read 4, iclass 40, count 0 2006.230.00:30:08.87#ibcon#about to read 5, iclass 40, count 0 2006.230.00:30:08.87#ibcon#read 5, iclass 40, count 0 2006.230.00:30:08.87#ibcon#about to read 6, iclass 40, count 0 2006.230.00:30:08.87#ibcon#read 6, iclass 40, count 0 2006.230.00:30:08.87#ibcon#end of sib2, iclass 40, count 0 2006.230.00:30:08.87#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:30:08.87#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:30:08.87#ibcon#[25=USB\r\n] 2006.230.00:30:08.87#ibcon#*before write, iclass 40, count 0 2006.230.00:30:08.87#ibcon#enter sib2, iclass 40, count 0 2006.230.00:30:08.87#ibcon#flushed, iclass 40, count 0 2006.230.00:30:08.87#ibcon#about to write, iclass 40, count 0 2006.230.00:30:08.87#ibcon#wrote, iclass 40, count 0 2006.230.00:30:08.87#ibcon#about to read 3, iclass 40, count 0 2006.230.00:30:08.90#ibcon#read 3, iclass 40, count 0 2006.230.00:30:08.90#ibcon#about to read 4, iclass 40, count 0 2006.230.00:30:08.90#ibcon#read 4, iclass 40, count 0 2006.230.00:30:08.90#ibcon#about to read 5, iclass 40, count 0 2006.230.00:30:08.90#ibcon#read 5, iclass 40, count 0 2006.230.00:30:08.90#ibcon#about to read 6, iclass 40, count 0 2006.230.00:30:08.90#ibcon#read 6, iclass 40, count 0 2006.230.00:30:08.90#ibcon#end of sib2, iclass 40, count 0 2006.230.00:30:08.90#ibcon#*after write, iclass 40, count 0 2006.230.00:30:08.90#ibcon#*before return 0, iclass 40, count 0 2006.230.00:30:08.90#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:30:08.90#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:30:08.90#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:30:08.90#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:30:08.91$vck44/valo=6,814.99 2006.230.00:30:08.91#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.00:30:08.91#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.00:30:08.91#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:08.91#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:08.91#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:08.91#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:08.91#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:30:08.91#ibcon#first serial, iclass 7, count 0 2006.230.00:30:08.91#ibcon#enter sib2, iclass 7, count 0 2006.230.00:30:08.91#ibcon#flushed, iclass 7, count 0 2006.230.00:30:08.91#ibcon#about to write, iclass 7, count 0 2006.230.00:30:08.91#ibcon#wrote, iclass 7, count 0 2006.230.00:30:08.91#ibcon#about to read 3, iclass 7, count 0 2006.230.00:30:08.92#ibcon#read 3, iclass 7, count 0 2006.230.00:30:08.92#ibcon#about to read 4, iclass 7, count 0 2006.230.00:30:08.92#ibcon#read 4, iclass 7, count 0 2006.230.00:30:08.92#ibcon#about to read 5, iclass 7, count 0 2006.230.00:30:08.92#ibcon#read 5, iclass 7, count 0 2006.230.00:30:08.92#ibcon#about to read 6, iclass 7, count 0 2006.230.00:30:08.92#ibcon#read 6, iclass 7, count 0 2006.230.00:30:08.92#ibcon#end of sib2, iclass 7, count 0 2006.230.00:30:08.92#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:30:08.92#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:30:08.92#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:30:08.92#ibcon#*before write, iclass 7, count 0 2006.230.00:30:08.92#ibcon#enter sib2, iclass 7, count 0 2006.230.00:30:08.92#ibcon#flushed, iclass 7, count 0 2006.230.00:30:08.92#ibcon#about to write, iclass 7, count 0 2006.230.00:30:08.92#ibcon#wrote, iclass 7, count 0 2006.230.00:30:08.92#ibcon#about to read 3, iclass 7, count 0 2006.230.00:30:08.96#ibcon#read 3, iclass 7, count 0 2006.230.00:30:08.96#ibcon#about to read 4, iclass 7, count 0 2006.230.00:30:08.96#ibcon#read 4, iclass 7, count 0 2006.230.00:30:08.96#ibcon#about to read 5, iclass 7, count 0 2006.230.00:30:08.96#ibcon#read 5, iclass 7, count 0 2006.230.00:30:08.96#ibcon#about to read 6, iclass 7, count 0 2006.230.00:30:08.96#ibcon#read 6, iclass 7, count 0 2006.230.00:30:08.96#ibcon#end of sib2, iclass 7, count 0 2006.230.00:30:08.96#ibcon#*after write, iclass 7, count 0 2006.230.00:30:08.96#ibcon#*before return 0, iclass 7, count 0 2006.230.00:30:08.96#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:08.96#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:08.96#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:30:08.96#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:30:08.96$vck44/va=6,4 2006.230.00:30:08.97#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.00:30:08.97#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.00:30:08.97#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:08.97#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:09.02#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:09.02#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:09.02#ibcon#enter wrdev, iclass 11, count 2 2006.230.00:30:09.02#ibcon#first serial, iclass 11, count 2 2006.230.00:30:09.02#ibcon#enter sib2, iclass 11, count 2 2006.230.00:30:09.02#ibcon#flushed, iclass 11, count 2 2006.230.00:30:09.02#ibcon#about to write, iclass 11, count 2 2006.230.00:30:09.02#ibcon#wrote, iclass 11, count 2 2006.230.00:30:09.02#ibcon#about to read 3, iclass 11, count 2 2006.230.00:30:09.03#ibcon#read 3, iclass 11, count 2 2006.230.00:30:09.03#ibcon#about to read 4, iclass 11, count 2 2006.230.00:30:09.03#ibcon#read 4, iclass 11, count 2 2006.230.00:30:09.03#ibcon#about to read 5, iclass 11, count 2 2006.230.00:30:09.03#ibcon#read 5, iclass 11, count 2 2006.230.00:30:09.03#ibcon#about to read 6, iclass 11, count 2 2006.230.00:30:09.03#ibcon#read 6, iclass 11, count 2 2006.230.00:30:09.03#ibcon#end of sib2, iclass 11, count 2 2006.230.00:30:09.03#ibcon#*mode == 0, iclass 11, count 2 2006.230.00:30:09.03#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.00:30:09.03#ibcon#[25=AT06-04\r\n] 2006.230.00:30:09.03#ibcon#*before write, iclass 11, count 2 2006.230.00:30:09.03#ibcon#enter sib2, iclass 11, count 2 2006.230.00:30:09.03#ibcon#flushed, iclass 11, count 2 2006.230.00:30:09.03#ibcon#about to write, iclass 11, count 2 2006.230.00:30:09.03#ibcon#wrote, iclass 11, count 2 2006.230.00:30:09.03#ibcon#about to read 3, iclass 11, count 2 2006.230.00:30:09.06#ibcon#read 3, iclass 11, count 2 2006.230.00:30:09.06#ibcon#about to read 4, iclass 11, count 2 2006.230.00:30:09.06#ibcon#read 4, iclass 11, count 2 2006.230.00:30:09.06#ibcon#about to read 5, iclass 11, count 2 2006.230.00:30:09.06#ibcon#read 5, iclass 11, count 2 2006.230.00:30:09.06#ibcon#about to read 6, iclass 11, count 2 2006.230.00:30:09.06#ibcon#read 6, iclass 11, count 2 2006.230.00:30:09.06#ibcon#end of sib2, iclass 11, count 2 2006.230.00:30:09.06#ibcon#*after write, iclass 11, count 2 2006.230.00:30:09.06#ibcon#*before return 0, iclass 11, count 2 2006.230.00:30:09.06#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:09.06#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:09.06#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.00:30:09.06#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:09.06#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:09.18#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:09.18#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:09.18#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:30:09.18#ibcon#first serial, iclass 11, count 0 2006.230.00:30:09.18#ibcon#enter sib2, iclass 11, count 0 2006.230.00:30:09.18#ibcon#flushed, iclass 11, count 0 2006.230.00:30:09.18#ibcon#about to write, iclass 11, count 0 2006.230.00:30:09.18#ibcon#wrote, iclass 11, count 0 2006.230.00:30:09.18#ibcon#about to read 3, iclass 11, count 0 2006.230.00:30:09.20#ibcon#read 3, iclass 11, count 0 2006.230.00:30:09.20#ibcon#about to read 4, iclass 11, count 0 2006.230.00:30:09.20#ibcon#read 4, iclass 11, count 0 2006.230.00:30:09.20#ibcon#about to read 5, iclass 11, count 0 2006.230.00:30:09.20#ibcon#read 5, iclass 11, count 0 2006.230.00:30:09.20#ibcon#about to read 6, iclass 11, count 0 2006.230.00:30:09.20#ibcon#read 6, iclass 11, count 0 2006.230.00:30:09.20#ibcon#end of sib2, iclass 11, count 0 2006.230.00:30:09.20#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:30:09.20#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:30:09.20#ibcon#[25=USB\r\n] 2006.230.00:30:09.20#ibcon#*before write, iclass 11, count 0 2006.230.00:30:09.20#ibcon#enter sib2, iclass 11, count 0 2006.230.00:30:09.20#ibcon#flushed, iclass 11, count 0 2006.230.00:30:09.20#ibcon#about to write, iclass 11, count 0 2006.230.00:30:09.20#ibcon#wrote, iclass 11, count 0 2006.230.00:30:09.20#ibcon#about to read 3, iclass 11, count 0 2006.230.00:30:09.23#ibcon#read 3, iclass 11, count 0 2006.230.00:30:09.23#ibcon#about to read 4, iclass 11, count 0 2006.230.00:30:09.23#ibcon#read 4, iclass 11, count 0 2006.230.00:30:09.23#ibcon#about to read 5, iclass 11, count 0 2006.230.00:30:09.23#ibcon#read 5, iclass 11, count 0 2006.230.00:30:09.23#ibcon#about to read 6, iclass 11, count 0 2006.230.00:30:09.23#ibcon#read 6, iclass 11, count 0 2006.230.00:30:09.23#ibcon#end of sib2, iclass 11, count 0 2006.230.00:30:09.23#ibcon#*after write, iclass 11, count 0 2006.230.00:30:09.23#ibcon#*before return 0, iclass 11, count 0 2006.230.00:30:09.23#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:09.23#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:09.23#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:30:09.23#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:30:09.24$vck44/valo=7,864.99 2006.230.00:30:09.24#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.00:30:09.24#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.00:30:09.24#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:09.24#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:09.24#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:09.24#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:09.24#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:30:09.24#ibcon#first serial, iclass 13, count 0 2006.230.00:30:09.24#ibcon#enter sib2, iclass 13, count 0 2006.230.00:30:09.24#ibcon#flushed, iclass 13, count 0 2006.230.00:30:09.24#ibcon#about to write, iclass 13, count 0 2006.230.00:30:09.24#ibcon#wrote, iclass 13, count 0 2006.230.00:30:09.24#ibcon#about to read 3, iclass 13, count 0 2006.230.00:30:09.25#ibcon#read 3, iclass 13, count 0 2006.230.00:30:09.25#ibcon#about to read 4, iclass 13, count 0 2006.230.00:30:09.25#ibcon#read 4, iclass 13, count 0 2006.230.00:30:09.25#ibcon#about to read 5, iclass 13, count 0 2006.230.00:30:09.25#ibcon#read 5, iclass 13, count 0 2006.230.00:30:09.25#ibcon#about to read 6, iclass 13, count 0 2006.230.00:30:09.25#ibcon#read 6, iclass 13, count 0 2006.230.00:30:09.25#ibcon#end of sib2, iclass 13, count 0 2006.230.00:30:09.25#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:30:09.25#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:30:09.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:30:09.25#ibcon#*before write, iclass 13, count 0 2006.230.00:30:09.25#ibcon#enter sib2, iclass 13, count 0 2006.230.00:30:09.25#ibcon#flushed, iclass 13, count 0 2006.230.00:30:09.25#ibcon#about to write, iclass 13, count 0 2006.230.00:30:09.25#ibcon#wrote, iclass 13, count 0 2006.230.00:30:09.25#ibcon#about to read 3, iclass 13, count 0 2006.230.00:30:09.29#ibcon#read 3, iclass 13, count 0 2006.230.00:30:09.29#ibcon#about to read 4, iclass 13, count 0 2006.230.00:30:09.29#ibcon#read 4, iclass 13, count 0 2006.230.00:30:09.29#ibcon#about to read 5, iclass 13, count 0 2006.230.00:30:09.29#ibcon#read 5, iclass 13, count 0 2006.230.00:30:09.29#ibcon#about to read 6, iclass 13, count 0 2006.230.00:30:09.29#ibcon#read 6, iclass 13, count 0 2006.230.00:30:09.29#ibcon#end of sib2, iclass 13, count 0 2006.230.00:30:09.29#ibcon#*after write, iclass 13, count 0 2006.230.00:30:09.29#ibcon#*before return 0, iclass 13, count 0 2006.230.00:30:09.29#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:09.29#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:09.29#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:30:09.29#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:30:09.30$vck44/va=7,5 2006.230.00:30:09.30#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.00:30:09.30#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.00:30:09.30#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:09.30#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:09.34#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:09.34#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:09.34#ibcon#enter wrdev, iclass 15, count 2 2006.230.00:30:09.34#ibcon#first serial, iclass 15, count 2 2006.230.00:30:09.34#ibcon#enter sib2, iclass 15, count 2 2006.230.00:30:09.34#ibcon#flushed, iclass 15, count 2 2006.230.00:30:09.34#ibcon#about to write, iclass 15, count 2 2006.230.00:30:09.34#ibcon#wrote, iclass 15, count 2 2006.230.00:30:09.34#ibcon#about to read 3, iclass 15, count 2 2006.230.00:30:09.36#ibcon#read 3, iclass 15, count 2 2006.230.00:30:09.36#ibcon#about to read 4, iclass 15, count 2 2006.230.00:30:09.36#ibcon#read 4, iclass 15, count 2 2006.230.00:30:09.36#ibcon#about to read 5, iclass 15, count 2 2006.230.00:30:09.36#ibcon#read 5, iclass 15, count 2 2006.230.00:30:09.36#ibcon#about to read 6, iclass 15, count 2 2006.230.00:30:09.36#ibcon#read 6, iclass 15, count 2 2006.230.00:30:09.36#ibcon#end of sib2, iclass 15, count 2 2006.230.00:30:09.36#ibcon#*mode == 0, iclass 15, count 2 2006.230.00:30:09.36#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.00:30:09.36#ibcon#[25=AT07-05\r\n] 2006.230.00:30:09.36#ibcon#*before write, iclass 15, count 2 2006.230.00:30:09.36#ibcon#enter sib2, iclass 15, count 2 2006.230.00:30:09.36#ibcon#flushed, iclass 15, count 2 2006.230.00:30:09.36#ibcon#about to write, iclass 15, count 2 2006.230.00:30:09.36#ibcon#wrote, iclass 15, count 2 2006.230.00:30:09.36#ibcon#about to read 3, iclass 15, count 2 2006.230.00:30:09.39#ibcon#read 3, iclass 15, count 2 2006.230.00:30:09.39#ibcon#about to read 4, iclass 15, count 2 2006.230.00:30:09.39#ibcon#read 4, iclass 15, count 2 2006.230.00:30:09.39#ibcon#about to read 5, iclass 15, count 2 2006.230.00:30:09.39#ibcon#read 5, iclass 15, count 2 2006.230.00:30:09.39#ibcon#about to read 6, iclass 15, count 2 2006.230.00:30:09.39#ibcon#read 6, iclass 15, count 2 2006.230.00:30:09.39#ibcon#end of sib2, iclass 15, count 2 2006.230.00:30:09.39#ibcon#*after write, iclass 15, count 2 2006.230.00:30:09.39#ibcon#*before return 0, iclass 15, count 2 2006.230.00:30:09.39#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:09.39#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:09.39#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.00:30:09.39#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:09.39#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:09.51#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:09.51#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:09.51#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:30:09.51#ibcon#first serial, iclass 15, count 0 2006.230.00:30:09.51#ibcon#enter sib2, iclass 15, count 0 2006.230.00:30:09.51#ibcon#flushed, iclass 15, count 0 2006.230.00:30:09.51#ibcon#about to write, iclass 15, count 0 2006.230.00:30:09.51#ibcon#wrote, iclass 15, count 0 2006.230.00:30:09.51#ibcon#about to read 3, iclass 15, count 0 2006.230.00:30:09.53#ibcon#read 3, iclass 15, count 0 2006.230.00:30:09.53#ibcon#about to read 4, iclass 15, count 0 2006.230.00:30:09.53#ibcon#read 4, iclass 15, count 0 2006.230.00:30:09.53#ibcon#about to read 5, iclass 15, count 0 2006.230.00:30:09.53#ibcon#read 5, iclass 15, count 0 2006.230.00:30:09.53#ibcon#about to read 6, iclass 15, count 0 2006.230.00:30:09.53#ibcon#read 6, iclass 15, count 0 2006.230.00:30:09.53#ibcon#end of sib2, iclass 15, count 0 2006.230.00:30:09.53#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:30:09.53#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:30:09.53#ibcon#[25=USB\r\n] 2006.230.00:30:09.53#ibcon#*before write, iclass 15, count 0 2006.230.00:30:09.53#ibcon#enter sib2, iclass 15, count 0 2006.230.00:30:09.53#ibcon#flushed, iclass 15, count 0 2006.230.00:30:09.53#ibcon#about to write, iclass 15, count 0 2006.230.00:30:09.53#ibcon#wrote, iclass 15, count 0 2006.230.00:30:09.53#ibcon#about to read 3, iclass 15, count 0 2006.230.00:30:09.56#ibcon#read 3, iclass 15, count 0 2006.230.00:30:09.56#ibcon#about to read 4, iclass 15, count 0 2006.230.00:30:09.56#ibcon#read 4, iclass 15, count 0 2006.230.00:30:09.56#ibcon#about to read 5, iclass 15, count 0 2006.230.00:30:09.56#ibcon#read 5, iclass 15, count 0 2006.230.00:30:09.56#ibcon#about to read 6, iclass 15, count 0 2006.230.00:30:09.56#ibcon#read 6, iclass 15, count 0 2006.230.00:30:09.56#ibcon#end of sib2, iclass 15, count 0 2006.230.00:30:09.56#ibcon#*after write, iclass 15, count 0 2006.230.00:30:09.56#ibcon#*before return 0, iclass 15, count 0 2006.230.00:30:09.56#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:09.56#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:09.56#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:30:09.56#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:30:09.57$vck44/valo=8,884.99 2006.230.00:30:09.57#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:30:09.57#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:30:09.57#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:09.57#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:09.57#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:09.57#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:09.57#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:30:09.57#ibcon#first serial, iclass 17, count 0 2006.230.00:30:09.57#ibcon#enter sib2, iclass 17, count 0 2006.230.00:30:09.57#ibcon#flushed, iclass 17, count 0 2006.230.00:30:09.57#ibcon#about to write, iclass 17, count 0 2006.230.00:30:09.57#ibcon#wrote, iclass 17, count 0 2006.230.00:30:09.57#ibcon#about to read 3, iclass 17, count 0 2006.230.00:30:09.58#ibcon#read 3, iclass 17, count 0 2006.230.00:30:09.58#ibcon#about to read 4, iclass 17, count 0 2006.230.00:30:09.58#ibcon#read 4, iclass 17, count 0 2006.230.00:30:09.58#ibcon#about to read 5, iclass 17, count 0 2006.230.00:30:09.58#ibcon#read 5, iclass 17, count 0 2006.230.00:30:09.58#ibcon#about to read 6, iclass 17, count 0 2006.230.00:30:09.58#ibcon#read 6, iclass 17, count 0 2006.230.00:30:09.58#ibcon#end of sib2, iclass 17, count 0 2006.230.00:30:09.58#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:30:09.58#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:30:09.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:30:09.58#ibcon#*before write, iclass 17, count 0 2006.230.00:30:09.58#ibcon#enter sib2, iclass 17, count 0 2006.230.00:30:09.58#ibcon#flushed, iclass 17, count 0 2006.230.00:30:09.58#ibcon#about to write, iclass 17, count 0 2006.230.00:30:09.58#ibcon#wrote, iclass 17, count 0 2006.230.00:30:09.58#ibcon#about to read 3, iclass 17, count 0 2006.230.00:30:09.62#ibcon#read 3, iclass 17, count 0 2006.230.00:30:09.62#ibcon#about to read 4, iclass 17, count 0 2006.230.00:30:09.62#ibcon#read 4, iclass 17, count 0 2006.230.00:30:09.62#ibcon#about to read 5, iclass 17, count 0 2006.230.00:30:09.62#ibcon#read 5, iclass 17, count 0 2006.230.00:30:09.62#ibcon#about to read 6, iclass 17, count 0 2006.230.00:30:09.62#ibcon#read 6, iclass 17, count 0 2006.230.00:30:09.62#ibcon#end of sib2, iclass 17, count 0 2006.230.00:30:09.62#ibcon#*after write, iclass 17, count 0 2006.230.00:30:09.62#ibcon#*before return 0, iclass 17, count 0 2006.230.00:30:09.62#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:09.62#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:09.62#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:30:09.62#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:30:09.63$vck44/va=8,6 2006.230.00:30:09.63#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.00:30:09.63#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.00:30:09.63#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:09.63#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:30:09.67#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:30:09.67#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:30:09.67#ibcon#enter wrdev, iclass 19, count 2 2006.230.00:30:09.67#ibcon#first serial, iclass 19, count 2 2006.230.00:30:09.67#ibcon#enter sib2, iclass 19, count 2 2006.230.00:30:09.67#ibcon#flushed, iclass 19, count 2 2006.230.00:30:09.67#ibcon#about to write, iclass 19, count 2 2006.230.00:30:09.67#ibcon#wrote, iclass 19, count 2 2006.230.00:30:09.67#ibcon#about to read 3, iclass 19, count 2 2006.230.00:30:09.69#ibcon#read 3, iclass 19, count 2 2006.230.00:30:09.69#ibcon#about to read 4, iclass 19, count 2 2006.230.00:30:09.69#ibcon#read 4, iclass 19, count 2 2006.230.00:30:09.69#ibcon#about to read 5, iclass 19, count 2 2006.230.00:30:09.69#ibcon#read 5, iclass 19, count 2 2006.230.00:30:09.69#ibcon#about to read 6, iclass 19, count 2 2006.230.00:30:09.69#ibcon#read 6, iclass 19, count 2 2006.230.00:30:09.69#ibcon#end of sib2, iclass 19, count 2 2006.230.00:30:09.69#ibcon#*mode == 0, iclass 19, count 2 2006.230.00:30:09.69#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.00:30:09.69#ibcon#[25=AT08-06\r\n] 2006.230.00:30:09.69#ibcon#*before write, iclass 19, count 2 2006.230.00:30:09.69#ibcon#enter sib2, iclass 19, count 2 2006.230.00:30:09.69#ibcon#flushed, iclass 19, count 2 2006.230.00:30:09.69#ibcon#about to write, iclass 19, count 2 2006.230.00:30:09.69#ibcon#wrote, iclass 19, count 2 2006.230.00:30:09.69#ibcon#about to read 3, iclass 19, count 2 2006.230.00:30:09.72#ibcon#read 3, iclass 19, count 2 2006.230.00:30:09.72#ibcon#about to read 4, iclass 19, count 2 2006.230.00:30:09.72#ibcon#read 4, iclass 19, count 2 2006.230.00:30:09.72#ibcon#about to read 5, iclass 19, count 2 2006.230.00:30:09.72#ibcon#read 5, iclass 19, count 2 2006.230.00:30:09.72#ibcon#about to read 6, iclass 19, count 2 2006.230.00:30:09.72#ibcon#read 6, iclass 19, count 2 2006.230.00:30:09.72#ibcon#end of sib2, iclass 19, count 2 2006.230.00:30:09.72#ibcon#*after write, iclass 19, count 2 2006.230.00:30:09.72#ibcon#*before return 0, iclass 19, count 2 2006.230.00:30:09.72#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:30:09.72#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:30:09.72#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.00:30:09.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:09.72#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:30:09.84#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:30:09.84#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:30:09.84#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:30:09.84#ibcon#first serial, iclass 19, count 0 2006.230.00:30:09.84#ibcon#enter sib2, iclass 19, count 0 2006.230.00:30:09.84#ibcon#flushed, iclass 19, count 0 2006.230.00:30:09.84#ibcon#about to write, iclass 19, count 0 2006.230.00:30:09.84#ibcon#wrote, iclass 19, count 0 2006.230.00:30:09.84#ibcon#about to read 3, iclass 19, count 0 2006.230.00:30:09.86#ibcon#read 3, iclass 19, count 0 2006.230.00:30:09.86#ibcon#about to read 4, iclass 19, count 0 2006.230.00:30:09.86#ibcon#read 4, iclass 19, count 0 2006.230.00:30:09.86#ibcon#about to read 5, iclass 19, count 0 2006.230.00:30:09.86#ibcon#read 5, iclass 19, count 0 2006.230.00:30:09.86#ibcon#about to read 6, iclass 19, count 0 2006.230.00:30:09.86#ibcon#read 6, iclass 19, count 0 2006.230.00:30:09.86#ibcon#end of sib2, iclass 19, count 0 2006.230.00:30:09.86#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:30:09.86#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:30:09.86#ibcon#[25=USB\r\n] 2006.230.00:30:09.86#ibcon#*before write, iclass 19, count 0 2006.230.00:30:09.86#ibcon#enter sib2, iclass 19, count 0 2006.230.00:30:09.86#ibcon#flushed, iclass 19, count 0 2006.230.00:30:09.86#ibcon#about to write, iclass 19, count 0 2006.230.00:30:09.86#ibcon#wrote, iclass 19, count 0 2006.230.00:30:09.86#ibcon#about to read 3, iclass 19, count 0 2006.230.00:30:09.89#ibcon#read 3, iclass 19, count 0 2006.230.00:30:09.89#ibcon#about to read 4, iclass 19, count 0 2006.230.00:30:09.89#ibcon#read 4, iclass 19, count 0 2006.230.00:30:09.89#ibcon#about to read 5, iclass 19, count 0 2006.230.00:30:09.89#ibcon#read 5, iclass 19, count 0 2006.230.00:30:09.89#ibcon#about to read 6, iclass 19, count 0 2006.230.00:30:09.89#ibcon#read 6, iclass 19, count 0 2006.230.00:30:09.89#ibcon#end of sib2, iclass 19, count 0 2006.230.00:30:09.89#ibcon#*after write, iclass 19, count 0 2006.230.00:30:09.89#ibcon#*before return 0, iclass 19, count 0 2006.230.00:30:09.89#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:30:09.89#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:30:09.89#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:30:09.89#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:30:09.90$vck44/vblo=1,629.99 2006.230.00:30:09.90#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.00:30:09.90#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.00:30:09.90#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:09.90#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:09.90#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:09.90#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:09.90#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:30:09.90#ibcon#first serial, iclass 21, count 0 2006.230.00:30:09.90#ibcon#enter sib2, iclass 21, count 0 2006.230.00:30:09.90#ibcon#flushed, iclass 21, count 0 2006.230.00:30:09.90#ibcon#about to write, iclass 21, count 0 2006.230.00:30:09.90#ibcon#wrote, iclass 21, count 0 2006.230.00:30:09.90#ibcon#about to read 3, iclass 21, count 0 2006.230.00:30:09.91#ibcon#read 3, iclass 21, count 0 2006.230.00:30:09.91#ibcon#about to read 4, iclass 21, count 0 2006.230.00:30:09.91#ibcon#read 4, iclass 21, count 0 2006.230.00:30:09.91#ibcon#about to read 5, iclass 21, count 0 2006.230.00:30:09.91#ibcon#read 5, iclass 21, count 0 2006.230.00:30:09.91#ibcon#about to read 6, iclass 21, count 0 2006.230.00:30:09.91#ibcon#read 6, iclass 21, count 0 2006.230.00:30:09.91#ibcon#end of sib2, iclass 21, count 0 2006.230.00:30:09.91#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:30:09.91#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:30:09.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:30:09.91#ibcon#*before write, iclass 21, count 0 2006.230.00:30:09.91#ibcon#enter sib2, iclass 21, count 0 2006.230.00:30:09.91#ibcon#flushed, iclass 21, count 0 2006.230.00:30:09.91#ibcon#about to write, iclass 21, count 0 2006.230.00:30:09.91#ibcon#wrote, iclass 21, count 0 2006.230.00:30:09.91#ibcon#about to read 3, iclass 21, count 0 2006.230.00:30:09.95#ibcon#read 3, iclass 21, count 0 2006.230.00:30:09.95#ibcon#about to read 4, iclass 21, count 0 2006.230.00:30:09.95#ibcon#read 4, iclass 21, count 0 2006.230.00:30:09.95#ibcon#about to read 5, iclass 21, count 0 2006.230.00:30:09.95#ibcon#read 5, iclass 21, count 0 2006.230.00:30:09.95#ibcon#about to read 6, iclass 21, count 0 2006.230.00:30:09.95#ibcon#read 6, iclass 21, count 0 2006.230.00:30:09.95#ibcon#end of sib2, iclass 21, count 0 2006.230.00:30:09.95#ibcon#*after write, iclass 21, count 0 2006.230.00:30:09.95#ibcon#*before return 0, iclass 21, count 0 2006.230.00:30:09.95#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:09.95#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:30:09.95#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:30:09.95#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:30:09.96$vck44/vb=1,4 2006.230.00:30:09.96#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.00:30:09.96#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.00:30:09.96#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:09.96#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:09.96#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:09.96#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:09.96#ibcon#enter wrdev, iclass 23, count 2 2006.230.00:30:09.96#ibcon#first serial, iclass 23, count 2 2006.230.00:30:09.96#ibcon#enter sib2, iclass 23, count 2 2006.230.00:30:09.96#ibcon#flushed, iclass 23, count 2 2006.230.00:30:09.96#ibcon#about to write, iclass 23, count 2 2006.230.00:30:09.96#ibcon#wrote, iclass 23, count 2 2006.230.00:30:09.96#ibcon#about to read 3, iclass 23, count 2 2006.230.00:30:09.97#ibcon#read 3, iclass 23, count 2 2006.230.00:30:09.97#ibcon#about to read 4, iclass 23, count 2 2006.230.00:30:09.97#ibcon#read 4, iclass 23, count 2 2006.230.00:30:09.97#ibcon#about to read 5, iclass 23, count 2 2006.230.00:30:09.97#ibcon#read 5, iclass 23, count 2 2006.230.00:30:09.97#ibcon#about to read 6, iclass 23, count 2 2006.230.00:30:09.97#ibcon#read 6, iclass 23, count 2 2006.230.00:30:09.97#ibcon#end of sib2, iclass 23, count 2 2006.230.00:30:09.97#ibcon#*mode == 0, iclass 23, count 2 2006.230.00:30:09.97#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.00:30:09.97#ibcon#[27=AT01-04\r\n] 2006.230.00:30:09.97#ibcon#*before write, iclass 23, count 2 2006.230.00:30:09.97#ibcon#enter sib2, iclass 23, count 2 2006.230.00:30:09.97#ibcon#flushed, iclass 23, count 2 2006.230.00:30:09.97#ibcon#about to write, iclass 23, count 2 2006.230.00:30:09.97#ibcon#wrote, iclass 23, count 2 2006.230.00:30:09.97#ibcon#about to read 3, iclass 23, count 2 2006.230.00:30:10.00#ibcon#read 3, iclass 23, count 2 2006.230.00:30:10.00#ibcon#about to read 4, iclass 23, count 2 2006.230.00:30:10.00#ibcon#read 4, iclass 23, count 2 2006.230.00:30:10.00#ibcon#about to read 5, iclass 23, count 2 2006.230.00:30:10.00#ibcon#read 5, iclass 23, count 2 2006.230.00:30:10.00#ibcon#about to read 6, iclass 23, count 2 2006.230.00:30:10.00#ibcon#read 6, iclass 23, count 2 2006.230.00:30:10.00#ibcon#end of sib2, iclass 23, count 2 2006.230.00:30:10.00#ibcon#*after write, iclass 23, count 2 2006.230.00:30:10.00#ibcon#*before return 0, iclass 23, count 2 2006.230.00:30:10.00#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:10.00#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:30:10.00#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.00:30:10.00#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:10.00#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:10.12#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:10.12#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:10.12#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:30:10.12#ibcon#first serial, iclass 23, count 0 2006.230.00:30:10.12#ibcon#enter sib2, iclass 23, count 0 2006.230.00:30:10.12#ibcon#flushed, iclass 23, count 0 2006.230.00:30:10.12#ibcon#about to write, iclass 23, count 0 2006.230.00:30:10.12#ibcon#wrote, iclass 23, count 0 2006.230.00:30:10.12#ibcon#about to read 3, iclass 23, count 0 2006.230.00:30:10.14#ibcon#read 3, iclass 23, count 0 2006.230.00:30:10.14#ibcon#about to read 4, iclass 23, count 0 2006.230.00:30:10.14#ibcon#read 4, iclass 23, count 0 2006.230.00:30:10.14#ibcon#about to read 5, iclass 23, count 0 2006.230.00:30:10.14#ibcon#read 5, iclass 23, count 0 2006.230.00:30:10.14#ibcon#about to read 6, iclass 23, count 0 2006.230.00:30:10.14#ibcon#read 6, iclass 23, count 0 2006.230.00:30:10.14#ibcon#end of sib2, iclass 23, count 0 2006.230.00:30:10.14#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:30:10.14#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:30:10.14#ibcon#[27=USB\r\n] 2006.230.00:30:10.14#ibcon#*before write, iclass 23, count 0 2006.230.00:30:10.14#ibcon#enter sib2, iclass 23, count 0 2006.230.00:30:10.14#ibcon#flushed, iclass 23, count 0 2006.230.00:30:10.14#ibcon#about to write, iclass 23, count 0 2006.230.00:30:10.14#ibcon#wrote, iclass 23, count 0 2006.230.00:30:10.14#ibcon#about to read 3, iclass 23, count 0 2006.230.00:30:10.17#ibcon#read 3, iclass 23, count 0 2006.230.00:30:10.17#ibcon#about to read 4, iclass 23, count 0 2006.230.00:30:10.17#ibcon#read 4, iclass 23, count 0 2006.230.00:30:10.17#ibcon#about to read 5, iclass 23, count 0 2006.230.00:30:10.17#ibcon#read 5, iclass 23, count 0 2006.230.00:30:10.17#ibcon#about to read 6, iclass 23, count 0 2006.230.00:30:10.17#ibcon#read 6, iclass 23, count 0 2006.230.00:30:10.17#ibcon#end of sib2, iclass 23, count 0 2006.230.00:30:10.17#ibcon#*after write, iclass 23, count 0 2006.230.00:30:10.17#ibcon#*before return 0, iclass 23, count 0 2006.230.00:30:10.17#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:10.17#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:30:10.17#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:30:10.17#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:30:10.18$vck44/vblo=2,634.99 2006.230.00:30:10.18#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.00:30:10.18#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.00:30:10.18#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:10.18#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:10.18#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:10.18#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:10.18#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:30:10.18#ibcon#first serial, iclass 25, count 0 2006.230.00:30:10.18#ibcon#enter sib2, iclass 25, count 0 2006.230.00:30:10.18#ibcon#flushed, iclass 25, count 0 2006.230.00:30:10.18#ibcon#about to write, iclass 25, count 0 2006.230.00:30:10.18#ibcon#wrote, iclass 25, count 0 2006.230.00:30:10.18#ibcon#about to read 3, iclass 25, count 0 2006.230.00:30:10.19#ibcon#read 3, iclass 25, count 0 2006.230.00:30:10.19#ibcon#about to read 4, iclass 25, count 0 2006.230.00:30:10.19#ibcon#read 4, iclass 25, count 0 2006.230.00:30:10.19#ibcon#about to read 5, iclass 25, count 0 2006.230.00:30:10.19#ibcon#read 5, iclass 25, count 0 2006.230.00:30:10.19#ibcon#about to read 6, iclass 25, count 0 2006.230.00:30:10.19#ibcon#read 6, iclass 25, count 0 2006.230.00:30:10.19#ibcon#end of sib2, iclass 25, count 0 2006.230.00:30:10.19#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:30:10.19#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:30:10.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:30:10.19#ibcon#*before write, iclass 25, count 0 2006.230.00:30:10.19#ibcon#enter sib2, iclass 25, count 0 2006.230.00:30:10.19#ibcon#flushed, iclass 25, count 0 2006.230.00:30:10.19#ibcon#about to write, iclass 25, count 0 2006.230.00:30:10.19#ibcon#wrote, iclass 25, count 0 2006.230.00:30:10.19#ibcon#about to read 3, iclass 25, count 0 2006.230.00:30:10.23#ibcon#read 3, iclass 25, count 0 2006.230.00:30:10.23#ibcon#about to read 4, iclass 25, count 0 2006.230.00:30:10.23#ibcon#read 4, iclass 25, count 0 2006.230.00:30:10.23#ibcon#about to read 5, iclass 25, count 0 2006.230.00:30:10.23#ibcon#read 5, iclass 25, count 0 2006.230.00:30:10.23#ibcon#about to read 6, iclass 25, count 0 2006.230.00:30:10.23#ibcon#read 6, iclass 25, count 0 2006.230.00:30:10.23#ibcon#end of sib2, iclass 25, count 0 2006.230.00:30:10.23#ibcon#*after write, iclass 25, count 0 2006.230.00:30:10.23#ibcon#*before return 0, iclass 25, count 0 2006.230.00:30:10.23#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:10.23#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:30:10.23#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:30:10.23#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:30:10.24$vck44/vb=2,4 2006.230.00:30:10.24#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.00:30:10.24#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.00:30:10.24#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:10.24#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:10.28#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:10.28#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:10.28#ibcon#enter wrdev, iclass 27, count 2 2006.230.00:30:10.28#ibcon#first serial, iclass 27, count 2 2006.230.00:30:10.28#ibcon#enter sib2, iclass 27, count 2 2006.230.00:30:10.28#ibcon#flushed, iclass 27, count 2 2006.230.00:30:10.28#ibcon#about to write, iclass 27, count 2 2006.230.00:30:10.28#ibcon#wrote, iclass 27, count 2 2006.230.00:30:10.28#ibcon#about to read 3, iclass 27, count 2 2006.230.00:30:10.30#ibcon#read 3, iclass 27, count 2 2006.230.00:30:10.30#ibcon#about to read 4, iclass 27, count 2 2006.230.00:30:10.30#ibcon#read 4, iclass 27, count 2 2006.230.00:30:10.30#ibcon#about to read 5, iclass 27, count 2 2006.230.00:30:10.30#ibcon#read 5, iclass 27, count 2 2006.230.00:30:10.30#ibcon#about to read 6, iclass 27, count 2 2006.230.00:30:10.30#ibcon#read 6, iclass 27, count 2 2006.230.00:30:10.30#ibcon#end of sib2, iclass 27, count 2 2006.230.00:30:10.30#ibcon#*mode == 0, iclass 27, count 2 2006.230.00:30:10.30#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.00:30:10.30#ibcon#[27=AT02-04\r\n] 2006.230.00:30:10.30#ibcon#*before write, iclass 27, count 2 2006.230.00:30:10.30#ibcon#enter sib2, iclass 27, count 2 2006.230.00:30:10.30#ibcon#flushed, iclass 27, count 2 2006.230.00:30:10.30#ibcon#about to write, iclass 27, count 2 2006.230.00:30:10.30#ibcon#wrote, iclass 27, count 2 2006.230.00:30:10.30#ibcon#about to read 3, iclass 27, count 2 2006.230.00:30:10.33#ibcon#read 3, iclass 27, count 2 2006.230.00:30:10.33#ibcon#about to read 4, iclass 27, count 2 2006.230.00:30:10.33#ibcon#read 4, iclass 27, count 2 2006.230.00:30:10.33#ibcon#about to read 5, iclass 27, count 2 2006.230.00:30:10.33#ibcon#read 5, iclass 27, count 2 2006.230.00:30:10.33#ibcon#about to read 6, iclass 27, count 2 2006.230.00:30:10.33#ibcon#read 6, iclass 27, count 2 2006.230.00:30:10.33#ibcon#end of sib2, iclass 27, count 2 2006.230.00:30:10.33#ibcon#*after write, iclass 27, count 2 2006.230.00:30:10.33#ibcon#*before return 0, iclass 27, count 2 2006.230.00:30:10.33#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:10.33#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:30:10.33#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.00:30:10.33#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:10.33#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:10.45#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:10.45#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:10.45#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:30:10.45#ibcon#first serial, iclass 27, count 0 2006.230.00:30:10.45#ibcon#enter sib2, iclass 27, count 0 2006.230.00:30:10.45#ibcon#flushed, iclass 27, count 0 2006.230.00:30:10.45#ibcon#about to write, iclass 27, count 0 2006.230.00:30:10.45#ibcon#wrote, iclass 27, count 0 2006.230.00:30:10.45#ibcon#about to read 3, iclass 27, count 0 2006.230.00:30:10.47#ibcon#read 3, iclass 27, count 0 2006.230.00:30:10.47#ibcon#about to read 4, iclass 27, count 0 2006.230.00:30:10.47#ibcon#read 4, iclass 27, count 0 2006.230.00:30:10.47#ibcon#about to read 5, iclass 27, count 0 2006.230.00:30:10.47#ibcon#read 5, iclass 27, count 0 2006.230.00:30:10.47#ibcon#about to read 6, iclass 27, count 0 2006.230.00:30:10.47#ibcon#read 6, iclass 27, count 0 2006.230.00:30:10.47#ibcon#end of sib2, iclass 27, count 0 2006.230.00:30:10.47#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:30:10.47#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:30:10.47#ibcon#[27=USB\r\n] 2006.230.00:30:10.47#ibcon#*before write, iclass 27, count 0 2006.230.00:30:10.47#ibcon#enter sib2, iclass 27, count 0 2006.230.00:30:10.47#ibcon#flushed, iclass 27, count 0 2006.230.00:30:10.47#ibcon#about to write, iclass 27, count 0 2006.230.00:30:10.47#ibcon#wrote, iclass 27, count 0 2006.230.00:30:10.47#ibcon#about to read 3, iclass 27, count 0 2006.230.00:30:10.50#ibcon#read 3, iclass 27, count 0 2006.230.00:30:10.50#ibcon#about to read 4, iclass 27, count 0 2006.230.00:30:10.50#ibcon#read 4, iclass 27, count 0 2006.230.00:30:10.50#ibcon#about to read 5, iclass 27, count 0 2006.230.00:30:10.50#ibcon#read 5, iclass 27, count 0 2006.230.00:30:10.50#ibcon#about to read 6, iclass 27, count 0 2006.230.00:30:10.50#ibcon#read 6, iclass 27, count 0 2006.230.00:30:10.50#ibcon#end of sib2, iclass 27, count 0 2006.230.00:30:10.50#ibcon#*after write, iclass 27, count 0 2006.230.00:30:10.50#ibcon#*before return 0, iclass 27, count 0 2006.230.00:30:10.50#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:10.50#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:30:10.50#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:30:10.50#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:30:10.51$vck44/vblo=3,649.99 2006.230.00:30:10.51#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.00:30:10.51#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.00:30:10.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:10.51#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:10.51#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:10.51#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:10.51#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:30:10.51#ibcon#first serial, iclass 29, count 0 2006.230.00:30:10.51#ibcon#enter sib2, iclass 29, count 0 2006.230.00:30:10.51#ibcon#flushed, iclass 29, count 0 2006.230.00:30:10.51#ibcon#about to write, iclass 29, count 0 2006.230.00:30:10.51#ibcon#wrote, iclass 29, count 0 2006.230.00:30:10.51#ibcon#about to read 3, iclass 29, count 0 2006.230.00:30:10.52#ibcon#read 3, iclass 29, count 0 2006.230.00:30:10.52#ibcon#about to read 4, iclass 29, count 0 2006.230.00:30:10.52#ibcon#read 4, iclass 29, count 0 2006.230.00:30:10.52#ibcon#about to read 5, iclass 29, count 0 2006.230.00:30:10.52#ibcon#read 5, iclass 29, count 0 2006.230.00:30:10.52#ibcon#about to read 6, iclass 29, count 0 2006.230.00:30:10.52#ibcon#read 6, iclass 29, count 0 2006.230.00:30:10.52#ibcon#end of sib2, iclass 29, count 0 2006.230.00:30:10.52#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:30:10.52#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:30:10.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:30:10.52#ibcon#*before write, iclass 29, count 0 2006.230.00:30:10.52#ibcon#enter sib2, iclass 29, count 0 2006.230.00:30:10.52#ibcon#flushed, iclass 29, count 0 2006.230.00:30:10.52#ibcon#about to write, iclass 29, count 0 2006.230.00:30:10.52#ibcon#wrote, iclass 29, count 0 2006.230.00:30:10.52#ibcon#about to read 3, iclass 29, count 0 2006.230.00:30:10.56#ibcon#read 3, iclass 29, count 0 2006.230.00:30:10.56#ibcon#about to read 4, iclass 29, count 0 2006.230.00:30:10.56#ibcon#read 4, iclass 29, count 0 2006.230.00:30:10.56#ibcon#about to read 5, iclass 29, count 0 2006.230.00:30:10.56#ibcon#read 5, iclass 29, count 0 2006.230.00:30:10.56#ibcon#about to read 6, iclass 29, count 0 2006.230.00:30:10.56#ibcon#read 6, iclass 29, count 0 2006.230.00:30:10.56#ibcon#end of sib2, iclass 29, count 0 2006.230.00:30:10.56#ibcon#*after write, iclass 29, count 0 2006.230.00:30:10.56#ibcon#*before return 0, iclass 29, count 0 2006.230.00:30:10.56#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:10.56#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:30:10.56#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:30:10.56#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:30:10.57$vck44/vb=3,4 2006.230.00:30:10.57#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.00:30:10.57#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.00:30:10.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:10.57#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:10.61#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:10.61#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:10.61#ibcon#enter wrdev, iclass 31, count 2 2006.230.00:30:10.61#ibcon#first serial, iclass 31, count 2 2006.230.00:30:10.61#ibcon#enter sib2, iclass 31, count 2 2006.230.00:30:10.61#ibcon#flushed, iclass 31, count 2 2006.230.00:30:10.61#ibcon#about to write, iclass 31, count 2 2006.230.00:30:10.61#ibcon#wrote, iclass 31, count 2 2006.230.00:30:10.61#ibcon#about to read 3, iclass 31, count 2 2006.230.00:30:10.63#ibcon#read 3, iclass 31, count 2 2006.230.00:30:10.63#ibcon#about to read 4, iclass 31, count 2 2006.230.00:30:10.63#ibcon#read 4, iclass 31, count 2 2006.230.00:30:10.63#ibcon#about to read 5, iclass 31, count 2 2006.230.00:30:10.63#ibcon#read 5, iclass 31, count 2 2006.230.00:30:10.63#ibcon#about to read 6, iclass 31, count 2 2006.230.00:30:10.63#ibcon#read 6, iclass 31, count 2 2006.230.00:30:10.63#ibcon#end of sib2, iclass 31, count 2 2006.230.00:30:10.63#ibcon#*mode == 0, iclass 31, count 2 2006.230.00:30:10.63#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.00:30:10.63#ibcon#[27=AT03-04\r\n] 2006.230.00:30:10.63#ibcon#*before write, iclass 31, count 2 2006.230.00:30:10.63#ibcon#enter sib2, iclass 31, count 2 2006.230.00:30:10.63#ibcon#flushed, iclass 31, count 2 2006.230.00:30:10.63#ibcon#about to write, iclass 31, count 2 2006.230.00:30:10.63#ibcon#wrote, iclass 31, count 2 2006.230.00:30:10.63#ibcon#about to read 3, iclass 31, count 2 2006.230.00:30:10.66#ibcon#read 3, iclass 31, count 2 2006.230.00:30:10.66#ibcon#about to read 4, iclass 31, count 2 2006.230.00:30:10.66#ibcon#read 4, iclass 31, count 2 2006.230.00:30:10.66#ibcon#about to read 5, iclass 31, count 2 2006.230.00:30:10.66#ibcon#read 5, iclass 31, count 2 2006.230.00:30:10.66#ibcon#about to read 6, iclass 31, count 2 2006.230.00:30:10.66#ibcon#read 6, iclass 31, count 2 2006.230.00:30:10.66#ibcon#end of sib2, iclass 31, count 2 2006.230.00:30:10.66#ibcon#*after write, iclass 31, count 2 2006.230.00:30:10.66#ibcon#*before return 0, iclass 31, count 2 2006.230.00:30:10.66#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:10.66#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:30:10.66#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.00:30:10.66#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:10.66#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:10.78#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:10.78#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:10.78#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:30:10.78#ibcon#first serial, iclass 31, count 0 2006.230.00:30:10.78#ibcon#enter sib2, iclass 31, count 0 2006.230.00:30:10.78#ibcon#flushed, iclass 31, count 0 2006.230.00:30:10.78#ibcon#about to write, iclass 31, count 0 2006.230.00:30:10.78#ibcon#wrote, iclass 31, count 0 2006.230.00:30:10.78#ibcon#about to read 3, iclass 31, count 0 2006.230.00:30:10.80#ibcon#read 3, iclass 31, count 0 2006.230.00:30:10.80#ibcon#about to read 4, iclass 31, count 0 2006.230.00:30:10.80#ibcon#read 4, iclass 31, count 0 2006.230.00:30:10.80#ibcon#about to read 5, iclass 31, count 0 2006.230.00:30:10.80#ibcon#read 5, iclass 31, count 0 2006.230.00:30:10.80#ibcon#about to read 6, iclass 31, count 0 2006.230.00:30:10.80#ibcon#read 6, iclass 31, count 0 2006.230.00:30:10.80#ibcon#end of sib2, iclass 31, count 0 2006.230.00:30:10.80#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:30:10.80#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:30:10.80#ibcon#[27=USB\r\n] 2006.230.00:30:10.80#ibcon#*before write, iclass 31, count 0 2006.230.00:30:10.80#ibcon#enter sib2, iclass 31, count 0 2006.230.00:30:10.80#ibcon#flushed, iclass 31, count 0 2006.230.00:30:10.80#ibcon#about to write, iclass 31, count 0 2006.230.00:30:10.80#ibcon#wrote, iclass 31, count 0 2006.230.00:30:10.80#ibcon#about to read 3, iclass 31, count 0 2006.230.00:30:10.83#ibcon#read 3, iclass 31, count 0 2006.230.00:30:10.83#ibcon#about to read 4, iclass 31, count 0 2006.230.00:30:10.83#ibcon#read 4, iclass 31, count 0 2006.230.00:30:10.83#ibcon#about to read 5, iclass 31, count 0 2006.230.00:30:10.83#ibcon#read 5, iclass 31, count 0 2006.230.00:30:10.83#ibcon#about to read 6, iclass 31, count 0 2006.230.00:30:10.83#ibcon#read 6, iclass 31, count 0 2006.230.00:30:10.83#ibcon#end of sib2, iclass 31, count 0 2006.230.00:30:10.83#ibcon#*after write, iclass 31, count 0 2006.230.00:30:10.83#ibcon#*before return 0, iclass 31, count 0 2006.230.00:30:10.83#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:10.83#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:30:10.83#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:30:10.83#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:30:10.84$vck44/vblo=4,679.99 2006.230.00:30:10.84#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.00:30:10.84#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.00:30:10.84#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:10.84#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:10.84#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:10.84#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:10.84#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:30:10.84#ibcon#first serial, iclass 33, count 0 2006.230.00:30:10.84#ibcon#enter sib2, iclass 33, count 0 2006.230.00:30:10.84#ibcon#flushed, iclass 33, count 0 2006.230.00:30:10.84#ibcon#about to write, iclass 33, count 0 2006.230.00:30:10.84#ibcon#wrote, iclass 33, count 0 2006.230.00:30:10.84#ibcon#about to read 3, iclass 33, count 0 2006.230.00:30:10.85#ibcon#read 3, iclass 33, count 0 2006.230.00:30:10.85#ibcon#about to read 4, iclass 33, count 0 2006.230.00:30:10.85#ibcon#read 4, iclass 33, count 0 2006.230.00:30:10.85#ibcon#about to read 5, iclass 33, count 0 2006.230.00:30:10.85#ibcon#read 5, iclass 33, count 0 2006.230.00:30:10.85#ibcon#about to read 6, iclass 33, count 0 2006.230.00:30:10.85#ibcon#read 6, iclass 33, count 0 2006.230.00:30:10.85#ibcon#end of sib2, iclass 33, count 0 2006.230.00:30:10.85#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:30:10.85#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:30:10.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:30:10.85#ibcon#*before write, iclass 33, count 0 2006.230.00:30:10.85#ibcon#enter sib2, iclass 33, count 0 2006.230.00:30:10.85#ibcon#flushed, iclass 33, count 0 2006.230.00:30:10.85#ibcon#about to write, iclass 33, count 0 2006.230.00:30:10.85#ibcon#wrote, iclass 33, count 0 2006.230.00:30:10.85#ibcon#about to read 3, iclass 33, count 0 2006.230.00:30:10.89#ibcon#read 3, iclass 33, count 0 2006.230.00:30:10.89#ibcon#about to read 4, iclass 33, count 0 2006.230.00:30:10.89#ibcon#read 4, iclass 33, count 0 2006.230.00:30:10.89#ibcon#about to read 5, iclass 33, count 0 2006.230.00:30:10.89#ibcon#read 5, iclass 33, count 0 2006.230.00:30:10.89#ibcon#about to read 6, iclass 33, count 0 2006.230.00:30:10.89#ibcon#read 6, iclass 33, count 0 2006.230.00:30:10.89#ibcon#end of sib2, iclass 33, count 0 2006.230.00:30:10.89#ibcon#*after write, iclass 33, count 0 2006.230.00:30:10.89#ibcon#*before return 0, iclass 33, count 0 2006.230.00:30:10.89#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:10.89#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:30:10.89#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:30:10.89#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:30:10.90$vck44/vb=4,4 2006.230.00:30:10.90#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.230.00:30:10.90#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.230.00:30:10.90#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:10.90#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:10.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:10.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:10.94#ibcon#enter wrdev, iclass 35, count 2 2006.230.00:30:10.94#ibcon#first serial, iclass 35, count 2 2006.230.00:30:10.94#ibcon#enter sib2, iclass 35, count 2 2006.230.00:30:10.94#ibcon#flushed, iclass 35, count 2 2006.230.00:30:10.94#ibcon#about to write, iclass 35, count 2 2006.230.00:30:10.94#ibcon#wrote, iclass 35, count 2 2006.230.00:30:10.94#ibcon#about to read 3, iclass 35, count 2 2006.230.00:30:10.96#ibcon#read 3, iclass 35, count 2 2006.230.00:30:10.96#ibcon#about to read 4, iclass 35, count 2 2006.230.00:30:10.96#ibcon#read 4, iclass 35, count 2 2006.230.00:30:10.96#ibcon#about to read 5, iclass 35, count 2 2006.230.00:30:10.96#ibcon#read 5, iclass 35, count 2 2006.230.00:30:10.96#ibcon#about to read 6, iclass 35, count 2 2006.230.00:30:10.96#ibcon#read 6, iclass 35, count 2 2006.230.00:30:10.96#ibcon#end of sib2, iclass 35, count 2 2006.230.00:30:10.96#ibcon#*mode == 0, iclass 35, count 2 2006.230.00:30:10.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.230.00:30:10.96#ibcon#[27=AT04-04\r\n] 2006.230.00:30:10.96#ibcon#*before write, iclass 35, count 2 2006.230.00:30:10.96#ibcon#enter sib2, iclass 35, count 2 2006.230.00:30:10.96#ibcon#flushed, iclass 35, count 2 2006.230.00:30:10.96#ibcon#about to write, iclass 35, count 2 2006.230.00:30:10.96#ibcon#wrote, iclass 35, count 2 2006.230.00:30:10.96#ibcon#about to read 3, iclass 35, count 2 2006.230.00:30:10.99#ibcon#read 3, iclass 35, count 2 2006.230.00:30:10.99#ibcon#about to read 4, iclass 35, count 2 2006.230.00:30:10.99#ibcon#read 4, iclass 35, count 2 2006.230.00:30:10.99#ibcon#about to read 5, iclass 35, count 2 2006.230.00:30:10.99#ibcon#read 5, iclass 35, count 2 2006.230.00:30:10.99#ibcon#about to read 6, iclass 35, count 2 2006.230.00:30:10.99#ibcon#read 6, iclass 35, count 2 2006.230.00:30:10.99#ibcon#end of sib2, iclass 35, count 2 2006.230.00:30:10.99#ibcon#*after write, iclass 35, count 2 2006.230.00:30:10.99#ibcon#*before return 0, iclass 35, count 2 2006.230.00:30:10.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:10.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:30:10.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.230.00:30:10.99#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:10.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:11.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:11.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:11.11#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:30:11.11#ibcon#first serial, iclass 35, count 0 2006.230.00:30:11.11#ibcon#enter sib2, iclass 35, count 0 2006.230.00:30:11.11#ibcon#flushed, iclass 35, count 0 2006.230.00:30:11.11#ibcon#about to write, iclass 35, count 0 2006.230.00:30:11.11#ibcon#wrote, iclass 35, count 0 2006.230.00:30:11.11#ibcon#about to read 3, iclass 35, count 0 2006.230.00:30:11.13#ibcon#read 3, iclass 35, count 0 2006.230.00:30:11.13#ibcon#about to read 4, iclass 35, count 0 2006.230.00:30:11.13#ibcon#read 4, iclass 35, count 0 2006.230.00:30:11.13#ibcon#about to read 5, iclass 35, count 0 2006.230.00:30:11.13#ibcon#read 5, iclass 35, count 0 2006.230.00:30:11.13#ibcon#about to read 6, iclass 35, count 0 2006.230.00:30:11.13#ibcon#read 6, iclass 35, count 0 2006.230.00:30:11.13#ibcon#end of sib2, iclass 35, count 0 2006.230.00:30:11.13#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:30:11.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:30:11.13#ibcon#[27=USB\r\n] 2006.230.00:30:11.13#ibcon#*before write, iclass 35, count 0 2006.230.00:30:11.13#ibcon#enter sib2, iclass 35, count 0 2006.230.00:30:11.13#ibcon#flushed, iclass 35, count 0 2006.230.00:30:11.13#ibcon#about to write, iclass 35, count 0 2006.230.00:30:11.13#ibcon#wrote, iclass 35, count 0 2006.230.00:30:11.13#ibcon#about to read 3, iclass 35, count 0 2006.230.00:30:11.16#ibcon#read 3, iclass 35, count 0 2006.230.00:30:11.16#ibcon#about to read 4, iclass 35, count 0 2006.230.00:30:11.16#ibcon#read 4, iclass 35, count 0 2006.230.00:30:11.16#ibcon#about to read 5, iclass 35, count 0 2006.230.00:30:11.16#ibcon#read 5, iclass 35, count 0 2006.230.00:30:11.16#ibcon#about to read 6, iclass 35, count 0 2006.230.00:30:11.16#ibcon#read 6, iclass 35, count 0 2006.230.00:30:11.16#ibcon#end of sib2, iclass 35, count 0 2006.230.00:30:11.16#ibcon#*after write, iclass 35, count 0 2006.230.00:30:11.16#ibcon#*before return 0, iclass 35, count 0 2006.230.00:30:11.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:11.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:30:11.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:30:11.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:30:11.17$vck44/vblo=5,709.99 2006.230.00:30:11.17#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.00:30:11.17#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.00:30:11.17#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:11.17#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:11.17#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:11.17#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:11.17#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:30:11.17#ibcon#first serial, iclass 37, count 0 2006.230.00:30:11.17#ibcon#enter sib2, iclass 37, count 0 2006.230.00:30:11.17#ibcon#flushed, iclass 37, count 0 2006.230.00:30:11.17#ibcon#about to write, iclass 37, count 0 2006.230.00:30:11.17#ibcon#wrote, iclass 37, count 0 2006.230.00:30:11.17#ibcon#about to read 3, iclass 37, count 0 2006.230.00:30:11.18#ibcon#read 3, iclass 37, count 0 2006.230.00:30:11.18#ibcon#about to read 4, iclass 37, count 0 2006.230.00:30:11.18#ibcon#read 4, iclass 37, count 0 2006.230.00:30:11.18#ibcon#about to read 5, iclass 37, count 0 2006.230.00:30:11.18#ibcon#read 5, iclass 37, count 0 2006.230.00:30:11.18#ibcon#about to read 6, iclass 37, count 0 2006.230.00:30:11.18#ibcon#read 6, iclass 37, count 0 2006.230.00:30:11.18#ibcon#end of sib2, iclass 37, count 0 2006.230.00:30:11.18#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:30:11.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:30:11.18#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:30:11.18#ibcon#*before write, iclass 37, count 0 2006.230.00:30:11.18#ibcon#enter sib2, iclass 37, count 0 2006.230.00:30:11.18#ibcon#flushed, iclass 37, count 0 2006.230.00:30:11.18#ibcon#about to write, iclass 37, count 0 2006.230.00:30:11.18#ibcon#wrote, iclass 37, count 0 2006.230.00:30:11.18#ibcon#about to read 3, iclass 37, count 0 2006.230.00:30:11.22#ibcon#read 3, iclass 37, count 0 2006.230.00:30:11.22#ibcon#about to read 4, iclass 37, count 0 2006.230.00:30:11.22#ibcon#read 4, iclass 37, count 0 2006.230.00:30:11.22#ibcon#about to read 5, iclass 37, count 0 2006.230.00:30:11.22#ibcon#read 5, iclass 37, count 0 2006.230.00:30:11.22#ibcon#about to read 6, iclass 37, count 0 2006.230.00:30:11.22#ibcon#read 6, iclass 37, count 0 2006.230.00:30:11.22#ibcon#end of sib2, iclass 37, count 0 2006.230.00:30:11.22#ibcon#*after write, iclass 37, count 0 2006.230.00:30:11.22#ibcon#*before return 0, iclass 37, count 0 2006.230.00:30:11.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:11.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:30:11.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:30:11.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:30:11.23$vck44/vb=5,4 2006.230.00:30:11.23#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.230.00:30:11.23#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.230.00:30:11.23#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:11.23#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:30:11.27#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:30:11.27#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:30:11.27#ibcon#enter wrdev, iclass 39, count 2 2006.230.00:30:11.27#ibcon#first serial, iclass 39, count 2 2006.230.00:30:11.27#ibcon#enter sib2, iclass 39, count 2 2006.230.00:30:11.27#ibcon#flushed, iclass 39, count 2 2006.230.00:30:11.27#ibcon#about to write, iclass 39, count 2 2006.230.00:30:11.27#ibcon#wrote, iclass 39, count 2 2006.230.00:30:11.27#ibcon#about to read 3, iclass 39, count 2 2006.230.00:30:11.29#ibcon#read 3, iclass 39, count 2 2006.230.00:30:11.29#ibcon#about to read 4, iclass 39, count 2 2006.230.00:30:11.29#ibcon#read 4, iclass 39, count 2 2006.230.00:30:11.29#ibcon#about to read 5, iclass 39, count 2 2006.230.00:30:11.29#ibcon#read 5, iclass 39, count 2 2006.230.00:30:11.29#ibcon#about to read 6, iclass 39, count 2 2006.230.00:30:11.29#ibcon#read 6, iclass 39, count 2 2006.230.00:30:11.29#ibcon#end of sib2, iclass 39, count 2 2006.230.00:30:11.29#ibcon#*mode == 0, iclass 39, count 2 2006.230.00:30:11.29#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.230.00:30:11.29#ibcon#[27=AT05-04\r\n] 2006.230.00:30:11.29#ibcon#*before write, iclass 39, count 2 2006.230.00:30:11.29#ibcon#enter sib2, iclass 39, count 2 2006.230.00:30:11.29#ibcon#flushed, iclass 39, count 2 2006.230.00:30:11.29#ibcon#about to write, iclass 39, count 2 2006.230.00:30:11.29#ibcon#wrote, iclass 39, count 2 2006.230.00:30:11.29#ibcon#about to read 3, iclass 39, count 2 2006.230.00:30:11.32#ibcon#read 3, iclass 39, count 2 2006.230.00:30:11.32#ibcon#about to read 4, iclass 39, count 2 2006.230.00:30:11.32#ibcon#read 4, iclass 39, count 2 2006.230.00:30:11.32#ibcon#about to read 5, iclass 39, count 2 2006.230.00:30:11.32#ibcon#read 5, iclass 39, count 2 2006.230.00:30:11.32#ibcon#about to read 6, iclass 39, count 2 2006.230.00:30:11.32#ibcon#read 6, iclass 39, count 2 2006.230.00:30:11.32#ibcon#end of sib2, iclass 39, count 2 2006.230.00:30:11.32#ibcon#*after write, iclass 39, count 2 2006.230.00:30:11.32#ibcon#*before return 0, iclass 39, count 2 2006.230.00:30:11.32#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:30:11.32#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:30:11.32#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.230.00:30:11.32#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:11.32#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:30:11.44#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:30:11.44#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:30:11.44#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:30:11.44#ibcon#first serial, iclass 39, count 0 2006.230.00:30:11.44#ibcon#enter sib2, iclass 39, count 0 2006.230.00:30:11.44#ibcon#flushed, iclass 39, count 0 2006.230.00:30:11.44#ibcon#about to write, iclass 39, count 0 2006.230.00:30:11.44#ibcon#wrote, iclass 39, count 0 2006.230.00:30:11.44#ibcon#about to read 3, iclass 39, count 0 2006.230.00:30:11.46#ibcon#read 3, iclass 39, count 0 2006.230.00:30:11.46#ibcon#about to read 4, iclass 39, count 0 2006.230.00:30:11.46#ibcon#read 4, iclass 39, count 0 2006.230.00:30:11.46#ibcon#about to read 5, iclass 39, count 0 2006.230.00:30:11.46#ibcon#read 5, iclass 39, count 0 2006.230.00:30:11.46#ibcon#about to read 6, iclass 39, count 0 2006.230.00:30:11.46#ibcon#read 6, iclass 39, count 0 2006.230.00:30:11.46#ibcon#end of sib2, iclass 39, count 0 2006.230.00:30:11.46#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:30:11.46#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:30:11.46#ibcon#[27=USB\r\n] 2006.230.00:30:11.46#ibcon#*before write, iclass 39, count 0 2006.230.00:30:11.46#ibcon#enter sib2, iclass 39, count 0 2006.230.00:30:11.46#ibcon#flushed, iclass 39, count 0 2006.230.00:30:11.46#ibcon#about to write, iclass 39, count 0 2006.230.00:30:11.46#ibcon#wrote, iclass 39, count 0 2006.230.00:30:11.46#ibcon#about to read 3, iclass 39, count 0 2006.230.00:30:11.49#ibcon#read 3, iclass 39, count 0 2006.230.00:30:11.49#ibcon#about to read 4, iclass 39, count 0 2006.230.00:30:11.49#ibcon#read 4, iclass 39, count 0 2006.230.00:30:11.49#ibcon#about to read 5, iclass 39, count 0 2006.230.00:30:11.49#ibcon#read 5, iclass 39, count 0 2006.230.00:30:11.49#ibcon#about to read 6, iclass 39, count 0 2006.230.00:30:11.49#ibcon#read 6, iclass 39, count 0 2006.230.00:30:11.49#ibcon#end of sib2, iclass 39, count 0 2006.230.00:30:11.49#ibcon#*after write, iclass 39, count 0 2006.230.00:30:11.49#ibcon#*before return 0, iclass 39, count 0 2006.230.00:30:11.49#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:30:11.49#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:30:11.49#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:30:11.49#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:30:11.50$vck44/vblo=6,719.99 2006.230.00:30:11.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.00:30:11.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.00:30:11.50#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:11.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:30:11.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:30:11.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:30:11.50#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:30:11.50#ibcon#first serial, iclass 3, count 0 2006.230.00:30:11.50#ibcon#enter sib2, iclass 3, count 0 2006.230.00:30:11.50#ibcon#flushed, iclass 3, count 0 2006.230.00:30:11.50#ibcon#about to write, iclass 3, count 0 2006.230.00:30:11.50#ibcon#wrote, iclass 3, count 0 2006.230.00:30:11.50#ibcon#about to read 3, iclass 3, count 0 2006.230.00:30:11.51#ibcon#read 3, iclass 3, count 0 2006.230.00:30:11.51#ibcon#about to read 4, iclass 3, count 0 2006.230.00:30:11.51#ibcon#read 4, iclass 3, count 0 2006.230.00:30:11.51#ibcon#about to read 5, iclass 3, count 0 2006.230.00:30:11.51#ibcon#read 5, iclass 3, count 0 2006.230.00:30:11.51#ibcon#about to read 6, iclass 3, count 0 2006.230.00:30:11.51#ibcon#read 6, iclass 3, count 0 2006.230.00:30:11.51#ibcon#end of sib2, iclass 3, count 0 2006.230.00:30:11.51#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:30:11.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:30:11.51#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:30:11.51#ibcon#*before write, iclass 3, count 0 2006.230.00:30:11.51#ibcon#enter sib2, iclass 3, count 0 2006.230.00:30:11.51#ibcon#flushed, iclass 3, count 0 2006.230.00:30:11.51#ibcon#about to write, iclass 3, count 0 2006.230.00:30:11.51#ibcon#wrote, iclass 3, count 0 2006.230.00:30:11.51#ibcon#about to read 3, iclass 3, count 0 2006.230.00:30:11.55#ibcon#read 3, iclass 3, count 0 2006.230.00:30:11.55#ibcon#about to read 4, iclass 3, count 0 2006.230.00:30:11.55#ibcon#read 4, iclass 3, count 0 2006.230.00:30:11.55#ibcon#about to read 5, iclass 3, count 0 2006.230.00:30:11.55#ibcon#read 5, iclass 3, count 0 2006.230.00:30:11.55#ibcon#about to read 6, iclass 3, count 0 2006.230.00:30:11.55#ibcon#read 6, iclass 3, count 0 2006.230.00:30:11.55#ibcon#end of sib2, iclass 3, count 0 2006.230.00:30:11.55#ibcon#*after write, iclass 3, count 0 2006.230.00:30:11.55#ibcon#*before return 0, iclass 3, count 0 2006.230.00:30:11.55#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:30:11.55#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:30:11.55#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:30:11.55#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:30:11.56$vck44/vb=6,4 2006.230.00:30:11.56#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.00:30:11.56#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.00:30:11.56#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:11.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:30:11.60#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:30:11.60#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:30:11.60#ibcon#enter wrdev, iclass 5, count 2 2006.230.00:30:11.60#ibcon#first serial, iclass 5, count 2 2006.230.00:30:11.60#ibcon#enter sib2, iclass 5, count 2 2006.230.00:30:11.60#ibcon#flushed, iclass 5, count 2 2006.230.00:30:11.60#ibcon#about to write, iclass 5, count 2 2006.230.00:30:11.60#ibcon#wrote, iclass 5, count 2 2006.230.00:30:11.60#ibcon#about to read 3, iclass 5, count 2 2006.230.00:30:11.62#ibcon#read 3, iclass 5, count 2 2006.230.00:30:11.62#ibcon#about to read 4, iclass 5, count 2 2006.230.00:30:11.62#ibcon#read 4, iclass 5, count 2 2006.230.00:30:11.62#ibcon#about to read 5, iclass 5, count 2 2006.230.00:30:11.62#ibcon#read 5, iclass 5, count 2 2006.230.00:30:11.62#ibcon#about to read 6, iclass 5, count 2 2006.230.00:30:11.62#ibcon#read 6, iclass 5, count 2 2006.230.00:30:11.62#ibcon#end of sib2, iclass 5, count 2 2006.230.00:30:11.62#ibcon#*mode == 0, iclass 5, count 2 2006.230.00:30:11.62#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.00:30:11.62#ibcon#[27=AT06-04\r\n] 2006.230.00:30:11.62#ibcon#*before write, iclass 5, count 2 2006.230.00:30:11.62#ibcon#enter sib2, iclass 5, count 2 2006.230.00:30:11.62#ibcon#flushed, iclass 5, count 2 2006.230.00:30:11.62#ibcon#about to write, iclass 5, count 2 2006.230.00:30:11.62#ibcon#wrote, iclass 5, count 2 2006.230.00:30:11.62#ibcon#about to read 3, iclass 5, count 2 2006.230.00:30:11.65#ibcon#read 3, iclass 5, count 2 2006.230.00:30:11.65#ibcon#about to read 4, iclass 5, count 2 2006.230.00:30:11.65#ibcon#read 4, iclass 5, count 2 2006.230.00:30:11.65#ibcon#about to read 5, iclass 5, count 2 2006.230.00:30:11.65#ibcon#read 5, iclass 5, count 2 2006.230.00:30:11.65#ibcon#about to read 6, iclass 5, count 2 2006.230.00:30:11.65#ibcon#read 6, iclass 5, count 2 2006.230.00:30:11.65#ibcon#end of sib2, iclass 5, count 2 2006.230.00:30:11.65#ibcon#*after write, iclass 5, count 2 2006.230.00:30:11.65#ibcon#*before return 0, iclass 5, count 2 2006.230.00:30:11.65#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:30:11.65#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:30:11.65#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.00:30:11.65#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:11.65#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:30:11.77#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:30:11.77#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:30:11.77#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:30:11.77#ibcon#first serial, iclass 5, count 0 2006.230.00:30:11.77#ibcon#enter sib2, iclass 5, count 0 2006.230.00:30:11.77#ibcon#flushed, iclass 5, count 0 2006.230.00:30:11.77#ibcon#about to write, iclass 5, count 0 2006.230.00:30:11.77#ibcon#wrote, iclass 5, count 0 2006.230.00:30:11.77#ibcon#about to read 3, iclass 5, count 0 2006.230.00:30:11.79#ibcon#read 3, iclass 5, count 0 2006.230.00:30:11.79#ibcon#about to read 4, iclass 5, count 0 2006.230.00:30:11.79#ibcon#read 4, iclass 5, count 0 2006.230.00:30:11.79#ibcon#about to read 5, iclass 5, count 0 2006.230.00:30:11.79#ibcon#read 5, iclass 5, count 0 2006.230.00:30:11.79#ibcon#about to read 6, iclass 5, count 0 2006.230.00:30:11.79#ibcon#read 6, iclass 5, count 0 2006.230.00:30:11.79#ibcon#end of sib2, iclass 5, count 0 2006.230.00:30:11.79#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:30:11.79#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:30:11.79#ibcon#[27=USB\r\n] 2006.230.00:30:11.79#ibcon#*before write, iclass 5, count 0 2006.230.00:30:11.79#ibcon#enter sib2, iclass 5, count 0 2006.230.00:30:11.79#ibcon#flushed, iclass 5, count 0 2006.230.00:30:11.79#ibcon#about to write, iclass 5, count 0 2006.230.00:30:11.79#ibcon#wrote, iclass 5, count 0 2006.230.00:30:11.79#ibcon#about to read 3, iclass 5, count 0 2006.230.00:30:11.82#ibcon#read 3, iclass 5, count 0 2006.230.00:30:11.82#ibcon#about to read 4, iclass 5, count 0 2006.230.00:30:11.82#ibcon#read 4, iclass 5, count 0 2006.230.00:30:11.82#ibcon#about to read 5, iclass 5, count 0 2006.230.00:30:11.82#ibcon#read 5, iclass 5, count 0 2006.230.00:30:11.82#ibcon#about to read 6, iclass 5, count 0 2006.230.00:30:11.82#ibcon#read 6, iclass 5, count 0 2006.230.00:30:11.82#ibcon#end of sib2, iclass 5, count 0 2006.230.00:30:11.82#ibcon#*after write, iclass 5, count 0 2006.230.00:30:11.82#ibcon#*before return 0, iclass 5, count 0 2006.230.00:30:11.82#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:30:11.82#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:30:11.82#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:30:11.82#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:30:11.83$vck44/vblo=7,734.99 2006.230.00:30:11.83#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.00:30:11.83#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.00:30:11.83#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:11.83#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:11.83#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:11.83#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:11.83#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:30:11.83#ibcon#first serial, iclass 7, count 0 2006.230.00:30:11.83#ibcon#enter sib2, iclass 7, count 0 2006.230.00:30:11.83#ibcon#flushed, iclass 7, count 0 2006.230.00:30:11.83#ibcon#about to write, iclass 7, count 0 2006.230.00:30:11.83#ibcon#wrote, iclass 7, count 0 2006.230.00:30:11.83#ibcon#about to read 3, iclass 7, count 0 2006.230.00:30:11.84#ibcon#read 3, iclass 7, count 0 2006.230.00:30:11.84#ibcon#about to read 4, iclass 7, count 0 2006.230.00:30:11.84#ibcon#read 4, iclass 7, count 0 2006.230.00:30:11.84#ibcon#about to read 5, iclass 7, count 0 2006.230.00:30:11.84#ibcon#read 5, iclass 7, count 0 2006.230.00:30:11.84#ibcon#about to read 6, iclass 7, count 0 2006.230.00:30:11.84#ibcon#read 6, iclass 7, count 0 2006.230.00:30:11.84#ibcon#end of sib2, iclass 7, count 0 2006.230.00:30:11.84#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:30:11.84#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:30:11.84#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:30:11.84#ibcon#*before write, iclass 7, count 0 2006.230.00:30:11.84#ibcon#enter sib2, iclass 7, count 0 2006.230.00:30:11.84#ibcon#flushed, iclass 7, count 0 2006.230.00:30:11.84#ibcon#about to write, iclass 7, count 0 2006.230.00:30:11.84#ibcon#wrote, iclass 7, count 0 2006.230.00:30:11.84#ibcon#about to read 3, iclass 7, count 0 2006.230.00:30:11.88#ibcon#read 3, iclass 7, count 0 2006.230.00:30:11.88#ibcon#about to read 4, iclass 7, count 0 2006.230.00:30:11.88#ibcon#read 4, iclass 7, count 0 2006.230.00:30:11.88#ibcon#about to read 5, iclass 7, count 0 2006.230.00:30:11.88#ibcon#read 5, iclass 7, count 0 2006.230.00:30:11.88#ibcon#about to read 6, iclass 7, count 0 2006.230.00:30:11.88#ibcon#read 6, iclass 7, count 0 2006.230.00:30:11.88#ibcon#end of sib2, iclass 7, count 0 2006.230.00:30:11.88#ibcon#*after write, iclass 7, count 0 2006.230.00:30:11.88#ibcon#*before return 0, iclass 7, count 0 2006.230.00:30:11.88#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:11.88#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:30:11.88#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:30:11.88#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:30:11.88$vck44/vb=7,4 2006.230.00:30:11.89#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.00:30:11.89#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.00:30:11.89#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:11.89#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:11.93#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:11.93#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:11.93#ibcon#enter wrdev, iclass 11, count 2 2006.230.00:30:11.93#ibcon#first serial, iclass 11, count 2 2006.230.00:30:11.93#ibcon#enter sib2, iclass 11, count 2 2006.230.00:30:11.93#ibcon#flushed, iclass 11, count 2 2006.230.00:30:11.93#ibcon#about to write, iclass 11, count 2 2006.230.00:30:11.93#ibcon#wrote, iclass 11, count 2 2006.230.00:30:11.93#ibcon#about to read 3, iclass 11, count 2 2006.230.00:30:11.95#ibcon#read 3, iclass 11, count 2 2006.230.00:30:11.95#ibcon#about to read 4, iclass 11, count 2 2006.230.00:30:11.95#ibcon#read 4, iclass 11, count 2 2006.230.00:30:11.95#ibcon#about to read 5, iclass 11, count 2 2006.230.00:30:11.95#ibcon#read 5, iclass 11, count 2 2006.230.00:30:11.95#ibcon#about to read 6, iclass 11, count 2 2006.230.00:30:11.95#ibcon#read 6, iclass 11, count 2 2006.230.00:30:11.95#ibcon#end of sib2, iclass 11, count 2 2006.230.00:30:11.95#ibcon#*mode == 0, iclass 11, count 2 2006.230.00:30:11.95#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.00:30:11.95#ibcon#[27=AT07-04\r\n] 2006.230.00:30:11.95#ibcon#*before write, iclass 11, count 2 2006.230.00:30:11.95#ibcon#enter sib2, iclass 11, count 2 2006.230.00:30:11.95#ibcon#flushed, iclass 11, count 2 2006.230.00:30:11.95#ibcon#about to write, iclass 11, count 2 2006.230.00:30:11.95#ibcon#wrote, iclass 11, count 2 2006.230.00:30:11.95#ibcon#about to read 3, iclass 11, count 2 2006.230.00:30:11.98#ibcon#read 3, iclass 11, count 2 2006.230.00:30:11.98#ibcon#about to read 4, iclass 11, count 2 2006.230.00:30:11.98#ibcon#read 4, iclass 11, count 2 2006.230.00:30:11.98#ibcon#about to read 5, iclass 11, count 2 2006.230.00:30:11.98#ibcon#read 5, iclass 11, count 2 2006.230.00:30:11.98#ibcon#about to read 6, iclass 11, count 2 2006.230.00:30:11.98#ibcon#read 6, iclass 11, count 2 2006.230.00:30:11.98#ibcon#end of sib2, iclass 11, count 2 2006.230.00:30:11.98#ibcon#*after write, iclass 11, count 2 2006.230.00:30:11.98#ibcon#*before return 0, iclass 11, count 2 2006.230.00:30:11.98#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:11.98#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:30:11.98#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.00:30:11.98#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:11.98#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:12.10#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:12.10#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:12.10#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:30:12.10#ibcon#first serial, iclass 11, count 0 2006.230.00:30:12.10#ibcon#enter sib2, iclass 11, count 0 2006.230.00:30:12.10#ibcon#flushed, iclass 11, count 0 2006.230.00:30:12.10#ibcon#about to write, iclass 11, count 0 2006.230.00:30:12.10#ibcon#wrote, iclass 11, count 0 2006.230.00:30:12.10#ibcon#about to read 3, iclass 11, count 0 2006.230.00:30:12.12#ibcon#read 3, iclass 11, count 0 2006.230.00:30:12.12#ibcon#about to read 4, iclass 11, count 0 2006.230.00:30:12.12#ibcon#read 4, iclass 11, count 0 2006.230.00:30:12.12#ibcon#about to read 5, iclass 11, count 0 2006.230.00:30:12.12#ibcon#read 5, iclass 11, count 0 2006.230.00:30:12.12#ibcon#about to read 6, iclass 11, count 0 2006.230.00:30:12.12#ibcon#read 6, iclass 11, count 0 2006.230.00:30:12.12#ibcon#end of sib2, iclass 11, count 0 2006.230.00:30:12.12#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:30:12.12#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:30:12.12#ibcon#[27=USB\r\n] 2006.230.00:30:12.12#ibcon#*before write, iclass 11, count 0 2006.230.00:30:12.12#ibcon#enter sib2, iclass 11, count 0 2006.230.00:30:12.12#ibcon#flushed, iclass 11, count 0 2006.230.00:30:12.12#ibcon#about to write, iclass 11, count 0 2006.230.00:30:12.12#ibcon#wrote, iclass 11, count 0 2006.230.00:30:12.12#ibcon#about to read 3, iclass 11, count 0 2006.230.00:30:12.15#ibcon#read 3, iclass 11, count 0 2006.230.00:30:12.15#ibcon#about to read 4, iclass 11, count 0 2006.230.00:30:12.15#ibcon#read 4, iclass 11, count 0 2006.230.00:30:12.15#ibcon#about to read 5, iclass 11, count 0 2006.230.00:30:12.15#ibcon#read 5, iclass 11, count 0 2006.230.00:30:12.15#ibcon#about to read 6, iclass 11, count 0 2006.230.00:30:12.15#ibcon#read 6, iclass 11, count 0 2006.230.00:30:12.15#ibcon#end of sib2, iclass 11, count 0 2006.230.00:30:12.15#ibcon#*after write, iclass 11, count 0 2006.230.00:30:12.15#ibcon#*before return 0, iclass 11, count 0 2006.230.00:30:12.15#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:12.15#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:30:12.15#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:30:12.15#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:30:12.16$vck44/vblo=8,744.99 2006.230.00:30:12.16#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.00:30:12.16#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.00:30:12.16#ibcon#ireg 17 cls_cnt 0 2006.230.00:30:12.16#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:12.16#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:12.16#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:12.16#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:30:12.16#ibcon#first serial, iclass 13, count 0 2006.230.00:30:12.16#ibcon#enter sib2, iclass 13, count 0 2006.230.00:30:12.16#ibcon#flushed, iclass 13, count 0 2006.230.00:30:12.16#ibcon#about to write, iclass 13, count 0 2006.230.00:30:12.16#ibcon#wrote, iclass 13, count 0 2006.230.00:30:12.16#ibcon#about to read 3, iclass 13, count 0 2006.230.00:30:12.17#ibcon#read 3, iclass 13, count 0 2006.230.00:30:12.17#ibcon#about to read 4, iclass 13, count 0 2006.230.00:30:12.17#ibcon#read 4, iclass 13, count 0 2006.230.00:30:12.17#ibcon#about to read 5, iclass 13, count 0 2006.230.00:30:12.17#ibcon#read 5, iclass 13, count 0 2006.230.00:30:12.17#ibcon#about to read 6, iclass 13, count 0 2006.230.00:30:12.17#ibcon#read 6, iclass 13, count 0 2006.230.00:30:12.17#ibcon#end of sib2, iclass 13, count 0 2006.230.00:30:12.17#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:30:12.17#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:30:12.17#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:30:12.17#ibcon#*before write, iclass 13, count 0 2006.230.00:30:12.17#ibcon#enter sib2, iclass 13, count 0 2006.230.00:30:12.17#ibcon#flushed, iclass 13, count 0 2006.230.00:30:12.17#ibcon#about to write, iclass 13, count 0 2006.230.00:30:12.17#ibcon#wrote, iclass 13, count 0 2006.230.00:30:12.17#ibcon#about to read 3, iclass 13, count 0 2006.230.00:30:12.21#ibcon#read 3, iclass 13, count 0 2006.230.00:30:12.21#ibcon#about to read 4, iclass 13, count 0 2006.230.00:30:12.21#ibcon#read 4, iclass 13, count 0 2006.230.00:30:12.21#ibcon#about to read 5, iclass 13, count 0 2006.230.00:30:12.21#ibcon#read 5, iclass 13, count 0 2006.230.00:30:12.21#ibcon#about to read 6, iclass 13, count 0 2006.230.00:30:12.21#ibcon#read 6, iclass 13, count 0 2006.230.00:30:12.21#ibcon#end of sib2, iclass 13, count 0 2006.230.00:30:12.21#ibcon#*after write, iclass 13, count 0 2006.230.00:30:12.21#ibcon#*before return 0, iclass 13, count 0 2006.230.00:30:12.21#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:12.21#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:30:12.21#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:30:12.21#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:30:12.22$vck44/vb=8,4 2006.230.00:30:12.22#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.00:30:12.22#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.00:30:12.22#ibcon#ireg 11 cls_cnt 2 2006.230.00:30:12.22#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:12.26#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:12.26#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:12.26#ibcon#enter wrdev, iclass 15, count 2 2006.230.00:30:12.26#ibcon#first serial, iclass 15, count 2 2006.230.00:30:12.26#ibcon#enter sib2, iclass 15, count 2 2006.230.00:30:12.26#ibcon#flushed, iclass 15, count 2 2006.230.00:30:12.26#ibcon#about to write, iclass 15, count 2 2006.230.00:30:12.26#ibcon#wrote, iclass 15, count 2 2006.230.00:30:12.26#ibcon#about to read 3, iclass 15, count 2 2006.230.00:30:12.28#ibcon#read 3, iclass 15, count 2 2006.230.00:30:12.28#ibcon#about to read 4, iclass 15, count 2 2006.230.00:30:12.28#ibcon#read 4, iclass 15, count 2 2006.230.00:30:12.28#ibcon#about to read 5, iclass 15, count 2 2006.230.00:30:12.28#ibcon#read 5, iclass 15, count 2 2006.230.00:30:12.28#ibcon#about to read 6, iclass 15, count 2 2006.230.00:30:12.28#ibcon#read 6, iclass 15, count 2 2006.230.00:30:12.28#ibcon#end of sib2, iclass 15, count 2 2006.230.00:30:12.28#ibcon#*mode == 0, iclass 15, count 2 2006.230.00:30:12.28#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.00:30:12.28#ibcon#[27=AT08-04\r\n] 2006.230.00:30:12.28#ibcon#*before write, iclass 15, count 2 2006.230.00:30:12.28#ibcon#enter sib2, iclass 15, count 2 2006.230.00:30:12.28#ibcon#flushed, iclass 15, count 2 2006.230.00:30:12.28#ibcon#about to write, iclass 15, count 2 2006.230.00:30:12.28#ibcon#wrote, iclass 15, count 2 2006.230.00:30:12.28#ibcon#about to read 3, iclass 15, count 2 2006.230.00:30:12.31#ibcon#read 3, iclass 15, count 2 2006.230.00:30:12.31#ibcon#about to read 4, iclass 15, count 2 2006.230.00:30:12.31#ibcon#read 4, iclass 15, count 2 2006.230.00:30:12.31#ibcon#about to read 5, iclass 15, count 2 2006.230.00:30:12.31#ibcon#read 5, iclass 15, count 2 2006.230.00:30:12.31#ibcon#about to read 6, iclass 15, count 2 2006.230.00:30:12.31#ibcon#read 6, iclass 15, count 2 2006.230.00:30:12.31#ibcon#end of sib2, iclass 15, count 2 2006.230.00:30:12.31#ibcon#*after write, iclass 15, count 2 2006.230.00:30:12.31#ibcon#*before return 0, iclass 15, count 2 2006.230.00:30:12.31#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:12.31#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:30:12.31#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.00:30:12.31#ibcon#ireg 7 cls_cnt 0 2006.230.00:30:12.31#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:12.43#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:12.43#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:12.43#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:30:12.43#ibcon#first serial, iclass 15, count 0 2006.230.00:30:12.43#ibcon#enter sib2, iclass 15, count 0 2006.230.00:30:12.43#ibcon#flushed, iclass 15, count 0 2006.230.00:30:12.43#ibcon#about to write, iclass 15, count 0 2006.230.00:30:12.43#ibcon#wrote, iclass 15, count 0 2006.230.00:30:12.43#ibcon#about to read 3, iclass 15, count 0 2006.230.00:30:12.45#ibcon#read 3, iclass 15, count 0 2006.230.00:30:12.45#ibcon#about to read 4, iclass 15, count 0 2006.230.00:30:12.45#ibcon#read 4, iclass 15, count 0 2006.230.00:30:12.45#ibcon#about to read 5, iclass 15, count 0 2006.230.00:30:12.45#ibcon#read 5, iclass 15, count 0 2006.230.00:30:12.45#ibcon#about to read 6, iclass 15, count 0 2006.230.00:30:12.45#ibcon#read 6, iclass 15, count 0 2006.230.00:30:12.45#ibcon#end of sib2, iclass 15, count 0 2006.230.00:30:12.45#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:30:12.45#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:30:12.45#ibcon#[27=USB\r\n] 2006.230.00:30:12.45#ibcon#*before write, iclass 15, count 0 2006.230.00:30:12.45#ibcon#enter sib2, iclass 15, count 0 2006.230.00:30:12.45#ibcon#flushed, iclass 15, count 0 2006.230.00:30:12.45#ibcon#about to write, iclass 15, count 0 2006.230.00:30:12.45#ibcon#wrote, iclass 15, count 0 2006.230.00:30:12.45#ibcon#about to read 3, iclass 15, count 0 2006.230.00:30:12.48#ibcon#read 3, iclass 15, count 0 2006.230.00:30:12.48#ibcon#about to read 4, iclass 15, count 0 2006.230.00:30:12.48#ibcon#read 4, iclass 15, count 0 2006.230.00:30:12.48#ibcon#about to read 5, iclass 15, count 0 2006.230.00:30:12.48#ibcon#read 5, iclass 15, count 0 2006.230.00:30:12.48#ibcon#about to read 6, iclass 15, count 0 2006.230.00:30:12.48#ibcon#read 6, iclass 15, count 0 2006.230.00:30:12.48#ibcon#end of sib2, iclass 15, count 0 2006.230.00:30:12.48#ibcon#*after write, iclass 15, count 0 2006.230.00:30:12.48#ibcon#*before return 0, iclass 15, count 0 2006.230.00:30:12.48#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:12.48#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:30:12.48#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:30:12.48#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:30:12.49$vck44/vabw=wide 2006.230.00:30:12.49#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:30:12.49#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:30:12.49#ibcon#ireg 8 cls_cnt 0 2006.230.00:30:12.49#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:12.49#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:12.49#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:12.49#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:30:12.49#ibcon#first serial, iclass 17, count 0 2006.230.00:30:12.49#ibcon#enter sib2, iclass 17, count 0 2006.230.00:30:12.49#ibcon#flushed, iclass 17, count 0 2006.230.00:30:12.49#ibcon#about to write, iclass 17, count 0 2006.230.00:30:12.49#ibcon#wrote, iclass 17, count 0 2006.230.00:30:12.49#ibcon#about to read 3, iclass 17, count 0 2006.230.00:30:12.50#ibcon#read 3, iclass 17, count 0 2006.230.00:30:12.50#ibcon#about to read 4, iclass 17, count 0 2006.230.00:30:12.50#ibcon#read 4, iclass 17, count 0 2006.230.00:30:12.50#ibcon#about to read 5, iclass 17, count 0 2006.230.00:30:12.50#ibcon#read 5, iclass 17, count 0 2006.230.00:30:12.50#ibcon#about to read 6, iclass 17, count 0 2006.230.00:30:12.50#ibcon#read 6, iclass 17, count 0 2006.230.00:30:12.50#ibcon#end of sib2, iclass 17, count 0 2006.230.00:30:12.50#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:30:12.50#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:30:12.50#ibcon#[25=BW32\r\n] 2006.230.00:30:12.50#ibcon#*before write, iclass 17, count 0 2006.230.00:30:12.50#ibcon#enter sib2, iclass 17, count 0 2006.230.00:30:12.50#ibcon#flushed, iclass 17, count 0 2006.230.00:30:12.50#ibcon#about to write, iclass 17, count 0 2006.230.00:30:12.50#ibcon#wrote, iclass 17, count 0 2006.230.00:30:12.50#ibcon#about to read 3, iclass 17, count 0 2006.230.00:30:12.53#ibcon#read 3, iclass 17, count 0 2006.230.00:30:12.53#ibcon#about to read 4, iclass 17, count 0 2006.230.00:30:12.53#ibcon#read 4, iclass 17, count 0 2006.230.00:30:12.53#ibcon#about to read 5, iclass 17, count 0 2006.230.00:30:12.53#ibcon#read 5, iclass 17, count 0 2006.230.00:30:12.53#ibcon#about to read 6, iclass 17, count 0 2006.230.00:30:12.53#ibcon#read 6, iclass 17, count 0 2006.230.00:30:12.53#ibcon#end of sib2, iclass 17, count 0 2006.230.00:30:12.53#ibcon#*after write, iclass 17, count 0 2006.230.00:30:12.53#ibcon#*before return 0, iclass 17, count 0 2006.230.00:30:12.53#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:12.53#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:30:12.53#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:30:12.53#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:30:12.54$vck44/vbbw=wide 2006.230.00:30:12.54#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.00:30:12.54#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.00:30:12.54#ibcon#ireg 8 cls_cnt 0 2006.230.00:30:12.54#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:30:12.59#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:30:12.59#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:30:12.59#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:30:12.59#ibcon#first serial, iclass 19, count 0 2006.230.00:30:12.59#ibcon#enter sib2, iclass 19, count 0 2006.230.00:30:12.59#ibcon#flushed, iclass 19, count 0 2006.230.00:30:12.59#ibcon#about to write, iclass 19, count 0 2006.230.00:30:12.59#ibcon#wrote, iclass 19, count 0 2006.230.00:30:12.59#ibcon#about to read 3, iclass 19, count 0 2006.230.00:30:12.61#ibcon#read 3, iclass 19, count 0 2006.230.00:30:12.61#ibcon#about to read 4, iclass 19, count 0 2006.230.00:30:12.61#ibcon#read 4, iclass 19, count 0 2006.230.00:30:12.61#ibcon#about to read 5, iclass 19, count 0 2006.230.00:30:12.61#ibcon#read 5, iclass 19, count 0 2006.230.00:30:12.61#ibcon#about to read 6, iclass 19, count 0 2006.230.00:30:12.61#ibcon#read 6, iclass 19, count 0 2006.230.00:30:12.61#ibcon#end of sib2, iclass 19, count 0 2006.230.00:30:12.61#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:30:12.61#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:30:12.61#ibcon#[27=BW32\r\n] 2006.230.00:30:12.61#ibcon#*before write, iclass 19, count 0 2006.230.00:30:12.61#ibcon#enter sib2, iclass 19, count 0 2006.230.00:30:12.61#ibcon#flushed, iclass 19, count 0 2006.230.00:30:12.61#ibcon#about to write, iclass 19, count 0 2006.230.00:30:12.61#ibcon#wrote, iclass 19, count 0 2006.230.00:30:12.61#ibcon#about to read 3, iclass 19, count 0 2006.230.00:30:12.64#ibcon#read 3, iclass 19, count 0 2006.230.00:30:12.64#ibcon#about to read 4, iclass 19, count 0 2006.230.00:30:12.64#ibcon#read 4, iclass 19, count 0 2006.230.00:30:12.64#ibcon#about to read 5, iclass 19, count 0 2006.230.00:30:12.64#ibcon#read 5, iclass 19, count 0 2006.230.00:30:12.64#ibcon#about to read 6, iclass 19, count 0 2006.230.00:30:12.64#ibcon#read 6, iclass 19, count 0 2006.230.00:30:12.64#ibcon#end of sib2, iclass 19, count 0 2006.230.00:30:12.64#ibcon#*after write, iclass 19, count 0 2006.230.00:30:12.64#ibcon#*before return 0, iclass 19, count 0 2006.230.00:30:12.64#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:30:12.64#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:30:12.64#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:30:12.64#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:30:12.65$setupk4/ifdk4 2006.230.00:30:12.65$ifdk4/lo= 2006.230.00:30:12.65$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:30:12.65$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:30:12.65$ifdk4/patch= 2006.230.00:30:12.65$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:30:12.65$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:30:12.65$setupk4/!*+20s 2006.230.00:30:18.83#abcon#<5=/09 2.2 7.2 31.49 771002.8\r\n> 2006.230.00:30:18.85#abcon#{5=INTERFACE CLEAR} 2006.230.00:30:18.91#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:30:26.14#trakl#Source acquired 2006.230.00:30:26.15#flagr#flagr/antenna,acquired 2006.230.00:30:27.26$setupk4/"tpicd 2006.230.00:30:27.26$setupk4/echo=off 2006.230.00:30:27.26$setupk4/xlog=off 2006.230.00:30:27.26:!2006.230.00:31:37 2006.230.00:31:37.00:preob 2006.230.00:31:37.14/onsource/TRACKING 2006.230.00:31:37.15:!2006.230.00:31:47 2006.230.00:31:47.01:"tape 2006.230.00:31:47.01:"st=record 2006.230.00:31:47.01:data_valid=on 2006.230.00:31:47.02:midob 2006.230.00:31:48.14/onsource/TRACKING 2006.230.00:31:48.15/wx/31.53,1002.8,78 2006.230.00:31:48.32/cable/+6.4030E-03 2006.230.00:31:49.41/va/01,08,usb,yes,28,31 2006.230.00:31:49.41/va/02,07,usb,yes,31,31 2006.230.00:31:49.41/va/03,06,usb,yes,38,41 2006.230.00:31:49.41/va/04,07,usb,yes,32,33 2006.230.00:31:49.41/va/05,04,usb,yes,28,29 2006.230.00:31:49.41/va/06,04,usb,yes,32,32 2006.230.00:31:49.41/va/07,05,usb,yes,28,29 2006.230.00:31:49.41/va/08,06,usb,yes,20,25 2006.230.00:31:49.64/valo/01,524.99,yes,locked 2006.230.00:31:49.64/valo/02,534.99,yes,locked 2006.230.00:31:49.64/valo/03,564.99,yes,locked 2006.230.00:31:49.64/valo/04,624.99,yes,locked 2006.230.00:31:49.64/valo/05,734.99,yes,locked 2006.230.00:31:49.64/valo/06,814.99,yes,locked 2006.230.00:31:49.64/valo/07,864.99,yes,locked 2006.230.00:31:49.64/valo/08,884.99,yes,locked 2006.230.00:31:50.73/vb/01,04,usb,yes,30,28 2006.230.00:31:50.73/vb/02,04,usb,yes,33,33 2006.230.00:31:50.73/vb/03,04,usb,yes,30,33 2006.230.00:31:50.73/vb/04,04,usb,yes,34,33 2006.230.00:31:50.73/vb/05,04,usb,yes,27,29 2006.230.00:31:50.73/vb/06,04,usb,yes,31,27 2006.230.00:31:50.73/vb/07,04,usb,yes,31,31 2006.230.00:31:50.73/vb/08,04,usb,yes,28,32 2006.230.00:31:50.96/vblo/01,629.99,yes,locked 2006.230.00:31:50.96/vblo/02,634.99,yes,locked 2006.230.00:31:50.96/vblo/03,649.99,yes,locked 2006.230.00:31:50.96/vblo/04,679.99,yes,locked 2006.230.00:31:50.96/vblo/05,709.99,yes,locked 2006.230.00:31:50.96/vblo/06,719.99,yes,locked 2006.230.00:31:50.96/vblo/07,734.99,yes,locked 2006.230.00:31:50.96/vblo/08,744.99,yes,locked 2006.230.00:31:51.11/vabw/8 2006.230.00:31:51.26/vbbw/8 2006.230.00:31:51.35/xfe/off,on,12.0 2006.230.00:31:51.74/ifatt/23,28,28,28 2006.230.00:31:52.07/fmout-gps/S +4.55E-07 2006.230.00:31:52.12:!2006.230.00:32:37 2006.230.00:32:37.01:data_valid=off 2006.230.00:32:37.02:"et 2006.230.00:32:37.02:!+3s 2006.230.00:32:40.04:"tape 2006.230.00:32:40.04:postob 2006.230.00:32:40.22/cable/+6.4021E-03 2006.230.00:32:40.22/wx/31.55,1002.8,76 2006.230.00:32:40.28/fmout-gps/S +4.54E-07 2006.230.00:32:40.28:scan_name=230-0035,jd0608,40 2006.230.00:32:40.29:source=0537-441,053850.36,-440508.9,2000.0,cw 2006.230.00:32:42.14#flagr#flagr/antenna,new-source 2006.230.00:32:42.15:checkk5 2006.230.00:32:42.52/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:32:42.93/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:32:43.34/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:32:43.75/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:32:44.14/chk_obsdata//k5ts1/T2300031??a.dat file size is correct (nominal:200MB, actual:196MB). 2006.230.00:32:44.53/chk_obsdata//k5ts2/T2300031??b.dat file size is correct (nominal:200MB, actual:196MB). 2006.230.00:32:44.92/chk_obsdata//k5ts3/T2300031??c.dat file size is correct (nominal:200MB, actual:196MB). 2006.230.00:32:45.32/chk_obsdata//k5ts4/T2300031??d.dat file size is correct (nominal:200MB, actual:196MB). 2006.230.00:32:46.05/k5log//k5ts1_log_newline 2006.230.00:32:46.75/k5log//k5ts2_log_newline 2006.230.00:32:47.47/k5log//k5ts3_log_newline 2006.230.00:32:48.17/k5log//k5ts4_log_newline 2006.230.00:32:48.19/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:32:48.19:setupk4=1 2006.230.00:32:48.19$setupk4/echo=on 2006.230.00:32:48.19$setupk4/pcalon 2006.230.00:32:48.19$pcalon/"no phase cal control is implemented here 2006.230.00:32:48.19$setupk4/"tpicd=stop 2006.230.00:32:48.19$setupk4/"rec=synch_on 2006.230.00:32:48.19$setupk4/"rec_mode=128 2006.230.00:32:48.19$setupk4/!* 2006.230.00:32:48.19$setupk4/recpk4 2006.230.00:32:48.19$recpk4/recpatch= 2006.230.00:32:48.20$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:32:48.20$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:32:48.20$setupk4/vck44 2006.230.00:32:48.20$vck44/valo=1,524.99 2006.230.00:32:48.20#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.00:32:48.20#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.00:32:48.20#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:48.20#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:48.20#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:48.20#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:48.20#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:32:48.20#ibcon#first serial, iclass 12, count 0 2006.230.00:32:48.20#ibcon#enter sib2, iclass 12, count 0 2006.230.00:32:48.20#ibcon#flushed, iclass 12, count 0 2006.230.00:32:48.20#ibcon#about to write, iclass 12, count 0 2006.230.00:32:48.20#ibcon#wrote, iclass 12, count 0 2006.230.00:32:48.20#ibcon#about to read 3, iclass 12, count 0 2006.230.00:32:48.22#ibcon#read 3, iclass 12, count 0 2006.230.00:32:48.22#ibcon#about to read 4, iclass 12, count 0 2006.230.00:32:48.22#ibcon#read 4, iclass 12, count 0 2006.230.00:32:48.22#ibcon#about to read 5, iclass 12, count 0 2006.230.00:32:48.22#ibcon#read 5, iclass 12, count 0 2006.230.00:32:48.22#ibcon#about to read 6, iclass 12, count 0 2006.230.00:32:48.22#ibcon#read 6, iclass 12, count 0 2006.230.00:32:48.22#ibcon#end of sib2, iclass 12, count 0 2006.230.00:32:48.22#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:32:48.22#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:32:48.22#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:32:48.22#ibcon#*before write, iclass 12, count 0 2006.230.00:32:48.22#ibcon#enter sib2, iclass 12, count 0 2006.230.00:32:48.22#ibcon#flushed, iclass 12, count 0 2006.230.00:32:48.22#ibcon#about to write, iclass 12, count 0 2006.230.00:32:48.22#ibcon#wrote, iclass 12, count 0 2006.230.00:32:48.22#ibcon#about to read 3, iclass 12, count 0 2006.230.00:32:48.27#ibcon#read 3, iclass 12, count 0 2006.230.00:32:48.27#ibcon#about to read 4, iclass 12, count 0 2006.230.00:32:48.27#ibcon#read 4, iclass 12, count 0 2006.230.00:32:48.27#ibcon#about to read 5, iclass 12, count 0 2006.230.00:32:48.27#ibcon#read 5, iclass 12, count 0 2006.230.00:32:48.27#ibcon#about to read 6, iclass 12, count 0 2006.230.00:32:48.27#ibcon#read 6, iclass 12, count 0 2006.230.00:32:48.27#ibcon#end of sib2, iclass 12, count 0 2006.230.00:32:48.27#ibcon#*after write, iclass 12, count 0 2006.230.00:32:48.27#ibcon#*before return 0, iclass 12, count 0 2006.230.00:32:48.27#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:48.27#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:48.27#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:32:48.27#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:32:48.27$vck44/va=1,8 2006.230.00:32:48.28#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.00:32:48.28#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.00:32:48.28#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:48.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:48.28#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:48.28#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:48.28#ibcon#enter wrdev, iclass 14, count 2 2006.230.00:32:48.28#ibcon#first serial, iclass 14, count 2 2006.230.00:32:48.28#ibcon#enter sib2, iclass 14, count 2 2006.230.00:32:48.28#ibcon#flushed, iclass 14, count 2 2006.230.00:32:48.28#ibcon#about to write, iclass 14, count 2 2006.230.00:32:48.28#ibcon#wrote, iclass 14, count 2 2006.230.00:32:48.28#ibcon#about to read 3, iclass 14, count 2 2006.230.00:32:48.29#ibcon#read 3, iclass 14, count 2 2006.230.00:32:48.29#ibcon#about to read 4, iclass 14, count 2 2006.230.00:32:48.29#ibcon#read 4, iclass 14, count 2 2006.230.00:32:48.29#ibcon#about to read 5, iclass 14, count 2 2006.230.00:32:48.29#ibcon#read 5, iclass 14, count 2 2006.230.00:32:48.29#ibcon#about to read 6, iclass 14, count 2 2006.230.00:32:48.29#ibcon#read 6, iclass 14, count 2 2006.230.00:32:48.29#ibcon#end of sib2, iclass 14, count 2 2006.230.00:32:48.29#ibcon#*mode == 0, iclass 14, count 2 2006.230.00:32:48.29#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.00:32:48.29#ibcon#[25=AT01-08\r\n] 2006.230.00:32:48.29#ibcon#*before write, iclass 14, count 2 2006.230.00:32:48.29#ibcon#enter sib2, iclass 14, count 2 2006.230.00:32:48.29#ibcon#flushed, iclass 14, count 2 2006.230.00:32:48.29#ibcon#about to write, iclass 14, count 2 2006.230.00:32:48.29#ibcon#wrote, iclass 14, count 2 2006.230.00:32:48.29#ibcon#about to read 3, iclass 14, count 2 2006.230.00:32:48.32#ibcon#read 3, iclass 14, count 2 2006.230.00:32:48.32#ibcon#about to read 4, iclass 14, count 2 2006.230.00:32:48.32#ibcon#read 4, iclass 14, count 2 2006.230.00:32:48.32#ibcon#about to read 5, iclass 14, count 2 2006.230.00:32:48.32#ibcon#read 5, iclass 14, count 2 2006.230.00:32:48.32#ibcon#about to read 6, iclass 14, count 2 2006.230.00:32:48.32#ibcon#read 6, iclass 14, count 2 2006.230.00:32:48.32#ibcon#end of sib2, iclass 14, count 2 2006.230.00:32:48.32#ibcon#*after write, iclass 14, count 2 2006.230.00:32:48.32#ibcon#*before return 0, iclass 14, count 2 2006.230.00:32:48.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:48.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:48.32#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.00:32:48.32#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:48.32#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:48.44#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:48.44#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:48.44#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:32:48.44#ibcon#first serial, iclass 14, count 0 2006.230.00:32:48.44#ibcon#enter sib2, iclass 14, count 0 2006.230.00:32:48.44#ibcon#flushed, iclass 14, count 0 2006.230.00:32:48.44#ibcon#about to write, iclass 14, count 0 2006.230.00:32:48.44#ibcon#wrote, iclass 14, count 0 2006.230.00:32:48.44#ibcon#about to read 3, iclass 14, count 0 2006.230.00:32:48.46#ibcon#read 3, iclass 14, count 0 2006.230.00:32:48.46#ibcon#about to read 4, iclass 14, count 0 2006.230.00:32:48.46#ibcon#read 4, iclass 14, count 0 2006.230.00:32:48.46#ibcon#about to read 5, iclass 14, count 0 2006.230.00:32:48.46#ibcon#read 5, iclass 14, count 0 2006.230.00:32:48.46#ibcon#about to read 6, iclass 14, count 0 2006.230.00:32:48.46#ibcon#read 6, iclass 14, count 0 2006.230.00:32:48.46#ibcon#end of sib2, iclass 14, count 0 2006.230.00:32:48.46#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:32:48.46#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:32:48.46#ibcon#[25=USB\r\n] 2006.230.00:32:48.46#ibcon#*before write, iclass 14, count 0 2006.230.00:32:48.46#ibcon#enter sib2, iclass 14, count 0 2006.230.00:32:48.46#ibcon#flushed, iclass 14, count 0 2006.230.00:32:48.46#ibcon#about to write, iclass 14, count 0 2006.230.00:32:48.46#ibcon#wrote, iclass 14, count 0 2006.230.00:32:48.46#ibcon#about to read 3, iclass 14, count 0 2006.230.00:32:48.49#ibcon#read 3, iclass 14, count 0 2006.230.00:32:48.49#ibcon#about to read 4, iclass 14, count 0 2006.230.00:32:48.49#ibcon#read 4, iclass 14, count 0 2006.230.00:32:48.49#ibcon#about to read 5, iclass 14, count 0 2006.230.00:32:48.49#ibcon#read 5, iclass 14, count 0 2006.230.00:32:48.49#ibcon#about to read 6, iclass 14, count 0 2006.230.00:32:48.49#ibcon#read 6, iclass 14, count 0 2006.230.00:32:48.49#ibcon#end of sib2, iclass 14, count 0 2006.230.00:32:48.49#ibcon#*after write, iclass 14, count 0 2006.230.00:32:48.49#ibcon#*before return 0, iclass 14, count 0 2006.230.00:32:48.49#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:48.49#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:48.49#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:32:48.49#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:32:48.49$vck44/valo=2,534.99 2006.230.00:32:48.49#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.00:32:48.49#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.00:32:48.49#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:48.49#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:32:48.49#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:32:48.49#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:32:48.49#ibcon#enter wrdev, iclass 16, count 0 2006.230.00:32:48.49#ibcon#first serial, iclass 16, count 0 2006.230.00:32:48.49#ibcon#enter sib2, iclass 16, count 0 2006.230.00:32:48.49#ibcon#flushed, iclass 16, count 0 2006.230.00:32:48.49#ibcon#about to write, iclass 16, count 0 2006.230.00:32:48.49#ibcon#wrote, iclass 16, count 0 2006.230.00:32:48.49#ibcon#about to read 3, iclass 16, count 0 2006.230.00:32:48.51#ibcon#read 3, iclass 16, count 0 2006.230.00:32:48.51#ibcon#about to read 4, iclass 16, count 0 2006.230.00:32:48.51#ibcon#read 4, iclass 16, count 0 2006.230.00:32:48.51#ibcon#about to read 5, iclass 16, count 0 2006.230.00:32:48.51#ibcon#read 5, iclass 16, count 0 2006.230.00:32:48.51#ibcon#about to read 6, iclass 16, count 0 2006.230.00:32:48.51#ibcon#read 6, iclass 16, count 0 2006.230.00:32:48.51#ibcon#end of sib2, iclass 16, count 0 2006.230.00:32:48.51#ibcon#*mode == 0, iclass 16, count 0 2006.230.00:32:48.51#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.00:32:48.51#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:32:48.51#ibcon#*before write, iclass 16, count 0 2006.230.00:32:48.51#ibcon#enter sib2, iclass 16, count 0 2006.230.00:32:48.51#ibcon#flushed, iclass 16, count 0 2006.230.00:32:48.51#ibcon#about to write, iclass 16, count 0 2006.230.00:32:48.51#ibcon#wrote, iclass 16, count 0 2006.230.00:32:48.51#ibcon#about to read 3, iclass 16, count 0 2006.230.00:32:48.55#ibcon#read 3, iclass 16, count 0 2006.230.00:32:48.55#ibcon#about to read 4, iclass 16, count 0 2006.230.00:32:48.55#ibcon#read 4, iclass 16, count 0 2006.230.00:32:48.55#ibcon#about to read 5, iclass 16, count 0 2006.230.00:32:48.55#ibcon#read 5, iclass 16, count 0 2006.230.00:32:48.55#ibcon#about to read 6, iclass 16, count 0 2006.230.00:32:48.55#ibcon#read 6, iclass 16, count 0 2006.230.00:32:48.55#ibcon#end of sib2, iclass 16, count 0 2006.230.00:32:48.55#ibcon#*after write, iclass 16, count 0 2006.230.00:32:48.55#ibcon#*before return 0, iclass 16, count 0 2006.230.00:32:48.55#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:32:48.55#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.00:32:48.55#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.00:32:48.55#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.00:32:48.55$vck44/va=2,7 2006.230.00:32:48.55#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.230.00:32:48.55#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.230.00:32:48.55#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:48.55#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:32:48.61#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:32:48.61#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:32:48.61#ibcon#enter wrdev, iclass 18, count 2 2006.230.00:32:48.61#ibcon#first serial, iclass 18, count 2 2006.230.00:32:48.61#ibcon#enter sib2, iclass 18, count 2 2006.230.00:32:48.61#ibcon#flushed, iclass 18, count 2 2006.230.00:32:48.61#ibcon#about to write, iclass 18, count 2 2006.230.00:32:48.61#ibcon#wrote, iclass 18, count 2 2006.230.00:32:48.61#ibcon#about to read 3, iclass 18, count 2 2006.230.00:32:48.63#ibcon#read 3, iclass 18, count 2 2006.230.00:32:48.63#ibcon#about to read 4, iclass 18, count 2 2006.230.00:32:48.63#ibcon#read 4, iclass 18, count 2 2006.230.00:32:48.63#ibcon#about to read 5, iclass 18, count 2 2006.230.00:32:48.63#ibcon#read 5, iclass 18, count 2 2006.230.00:32:48.63#ibcon#about to read 6, iclass 18, count 2 2006.230.00:32:48.63#ibcon#read 6, iclass 18, count 2 2006.230.00:32:48.63#ibcon#end of sib2, iclass 18, count 2 2006.230.00:32:48.63#ibcon#*mode == 0, iclass 18, count 2 2006.230.00:32:48.63#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.230.00:32:48.63#ibcon#[25=AT02-07\r\n] 2006.230.00:32:48.63#ibcon#*before write, iclass 18, count 2 2006.230.00:32:48.63#ibcon#enter sib2, iclass 18, count 2 2006.230.00:32:48.63#ibcon#flushed, iclass 18, count 2 2006.230.00:32:48.63#ibcon#about to write, iclass 18, count 2 2006.230.00:32:48.63#ibcon#wrote, iclass 18, count 2 2006.230.00:32:48.63#ibcon#about to read 3, iclass 18, count 2 2006.230.00:32:48.66#ibcon#read 3, iclass 18, count 2 2006.230.00:32:48.66#ibcon#about to read 4, iclass 18, count 2 2006.230.00:32:48.66#ibcon#read 4, iclass 18, count 2 2006.230.00:32:48.66#ibcon#about to read 5, iclass 18, count 2 2006.230.00:32:48.66#ibcon#read 5, iclass 18, count 2 2006.230.00:32:48.66#ibcon#about to read 6, iclass 18, count 2 2006.230.00:32:48.66#ibcon#read 6, iclass 18, count 2 2006.230.00:32:48.66#ibcon#end of sib2, iclass 18, count 2 2006.230.00:32:48.66#ibcon#*after write, iclass 18, count 2 2006.230.00:32:48.66#ibcon#*before return 0, iclass 18, count 2 2006.230.00:32:48.66#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:32:48.66#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.230.00:32:48.66#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.230.00:32:48.66#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:48.66#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:32:48.78#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:32:48.78#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:32:48.78#ibcon#enter wrdev, iclass 18, count 0 2006.230.00:32:48.78#ibcon#first serial, iclass 18, count 0 2006.230.00:32:48.78#ibcon#enter sib2, iclass 18, count 0 2006.230.00:32:48.78#ibcon#flushed, iclass 18, count 0 2006.230.00:32:48.78#ibcon#about to write, iclass 18, count 0 2006.230.00:32:48.78#ibcon#wrote, iclass 18, count 0 2006.230.00:32:48.78#ibcon#about to read 3, iclass 18, count 0 2006.230.00:32:48.80#ibcon#read 3, iclass 18, count 0 2006.230.00:32:48.80#ibcon#about to read 4, iclass 18, count 0 2006.230.00:32:48.80#ibcon#read 4, iclass 18, count 0 2006.230.00:32:48.80#ibcon#about to read 5, iclass 18, count 0 2006.230.00:32:48.80#ibcon#read 5, iclass 18, count 0 2006.230.00:32:48.80#ibcon#about to read 6, iclass 18, count 0 2006.230.00:32:48.80#ibcon#read 6, iclass 18, count 0 2006.230.00:32:48.80#ibcon#end of sib2, iclass 18, count 0 2006.230.00:32:48.80#ibcon#*mode == 0, iclass 18, count 0 2006.230.00:32:48.80#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.00:32:48.80#ibcon#[25=USB\r\n] 2006.230.00:32:48.80#ibcon#*before write, iclass 18, count 0 2006.230.00:32:48.80#ibcon#enter sib2, iclass 18, count 0 2006.230.00:32:48.80#ibcon#flushed, iclass 18, count 0 2006.230.00:32:48.80#ibcon#about to write, iclass 18, count 0 2006.230.00:32:48.80#ibcon#wrote, iclass 18, count 0 2006.230.00:32:48.80#ibcon#about to read 3, iclass 18, count 0 2006.230.00:32:48.83#ibcon#read 3, iclass 18, count 0 2006.230.00:32:48.83#ibcon#about to read 4, iclass 18, count 0 2006.230.00:32:48.83#ibcon#read 4, iclass 18, count 0 2006.230.00:32:48.83#ibcon#about to read 5, iclass 18, count 0 2006.230.00:32:48.83#ibcon#read 5, iclass 18, count 0 2006.230.00:32:48.83#ibcon#about to read 6, iclass 18, count 0 2006.230.00:32:48.83#ibcon#read 6, iclass 18, count 0 2006.230.00:32:48.83#ibcon#end of sib2, iclass 18, count 0 2006.230.00:32:48.83#ibcon#*after write, iclass 18, count 0 2006.230.00:32:48.83#ibcon#*before return 0, iclass 18, count 0 2006.230.00:32:48.83#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:32:48.83#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.230.00:32:48.83#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.00:32:48.83#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.00:32:48.83$vck44/valo=3,564.99 2006.230.00:32:48.83#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.00:32:48.83#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.00:32:48.83#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:48.83#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:48.83#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:48.83#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:48.83#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:32:48.83#ibcon#first serial, iclass 20, count 0 2006.230.00:32:48.83#ibcon#enter sib2, iclass 20, count 0 2006.230.00:32:48.83#ibcon#flushed, iclass 20, count 0 2006.230.00:32:48.83#ibcon#about to write, iclass 20, count 0 2006.230.00:32:48.83#ibcon#wrote, iclass 20, count 0 2006.230.00:32:48.83#ibcon#about to read 3, iclass 20, count 0 2006.230.00:32:48.85#ibcon#read 3, iclass 20, count 0 2006.230.00:32:48.85#ibcon#about to read 4, iclass 20, count 0 2006.230.00:32:48.85#ibcon#read 4, iclass 20, count 0 2006.230.00:32:48.85#ibcon#about to read 5, iclass 20, count 0 2006.230.00:32:48.85#ibcon#read 5, iclass 20, count 0 2006.230.00:32:48.85#ibcon#about to read 6, iclass 20, count 0 2006.230.00:32:48.85#ibcon#read 6, iclass 20, count 0 2006.230.00:32:48.85#ibcon#end of sib2, iclass 20, count 0 2006.230.00:32:48.85#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:32:48.85#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:32:48.85#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:32:48.85#ibcon#*before write, iclass 20, count 0 2006.230.00:32:48.85#ibcon#enter sib2, iclass 20, count 0 2006.230.00:32:48.85#ibcon#flushed, iclass 20, count 0 2006.230.00:32:48.85#ibcon#about to write, iclass 20, count 0 2006.230.00:32:48.85#ibcon#wrote, iclass 20, count 0 2006.230.00:32:48.85#ibcon#about to read 3, iclass 20, count 0 2006.230.00:32:48.89#ibcon#read 3, iclass 20, count 0 2006.230.00:32:48.89#ibcon#about to read 4, iclass 20, count 0 2006.230.00:32:48.89#ibcon#read 4, iclass 20, count 0 2006.230.00:32:48.89#ibcon#about to read 5, iclass 20, count 0 2006.230.00:32:48.89#ibcon#read 5, iclass 20, count 0 2006.230.00:32:48.89#ibcon#about to read 6, iclass 20, count 0 2006.230.00:32:48.89#ibcon#read 6, iclass 20, count 0 2006.230.00:32:48.89#ibcon#end of sib2, iclass 20, count 0 2006.230.00:32:48.89#ibcon#*after write, iclass 20, count 0 2006.230.00:32:48.89#ibcon#*before return 0, iclass 20, count 0 2006.230.00:32:48.89#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:48.89#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:48.89#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:32:48.89#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:32:48.89$vck44/va=3,6 2006.230.00:32:48.89#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.00:32:48.89#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.00:32:48.89#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:48.89#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:48.95#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:48.95#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:48.95#ibcon#enter wrdev, iclass 22, count 2 2006.230.00:32:48.95#ibcon#first serial, iclass 22, count 2 2006.230.00:32:48.95#ibcon#enter sib2, iclass 22, count 2 2006.230.00:32:48.95#ibcon#flushed, iclass 22, count 2 2006.230.00:32:48.95#ibcon#about to write, iclass 22, count 2 2006.230.00:32:48.95#ibcon#wrote, iclass 22, count 2 2006.230.00:32:48.95#ibcon#about to read 3, iclass 22, count 2 2006.230.00:32:48.97#ibcon#read 3, iclass 22, count 2 2006.230.00:32:48.97#ibcon#about to read 4, iclass 22, count 2 2006.230.00:32:48.97#ibcon#read 4, iclass 22, count 2 2006.230.00:32:48.97#ibcon#about to read 5, iclass 22, count 2 2006.230.00:32:48.97#ibcon#read 5, iclass 22, count 2 2006.230.00:32:48.97#ibcon#about to read 6, iclass 22, count 2 2006.230.00:32:48.97#ibcon#read 6, iclass 22, count 2 2006.230.00:32:48.97#ibcon#end of sib2, iclass 22, count 2 2006.230.00:32:48.97#ibcon#*mode == 0, iclass 22, count 2 2006.230.00:32:48.97#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.00:32:48.97#ibcon#[25=AT03-06\r\n] 2006.230.00:32:48.97#ibcon#*before write, iclass 22, count 2 2006.230.00:32:48.97#ibcon#enter sib2, iclass 22, count 2 2006.230.00:32:48.97#ibcon#flushed, iclass 22, count 2 2006.230.00:32:48.97#ibcon#about to write, iclass 22, count 2 2006.230.00:32:48.97#ibcon#wrote, iclass 22, count 2 2006.230.00:32:48.97#ibcon#about to read 3, iclass 22, count 2 2006.230.00:32:49.00#ibcon#read 3, iclass 22, count 2 2006.230.00:32:49.00#ibcon#about to read 4, iclass 22, count 2 2006.230.00:32:49.00#ibcon#read 4, iclass 22, count 2 2006.230.00:32:49.00#ibcon#about to read 5, iclass 22, count 2 2006.230.00:32:49.00#ibcon#read 5, iclass 22, count 2 2006.230.00:32:49.00#ibcon#about to read 6, iclass 22, count 2 2006.230.00:32:49.00#ibcon#read 6, iclass 22, count 2 2006.230.00:32:49.00#ibcon#end of sib2, iclass 22, count 2 2006.230.00:32:49.00#ibcon#*after write, iclass 22, count 2 2006.230.00:32:49.00#ibcon#*before return 0, iclass 22, count 2 2006.230.00:32:49.00#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:49.00#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:49.00#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.00:32:49.00#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:49.00#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:49.12#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:49.12#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:49.12#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:32:49.12#ibcon#first serial, iclass 22, count 0 2006.230.00:32:49.12#ibcon#enter sib2, iclass 22, count 0 2006.230.00:32:49.12#ibcon#flushed, iclass 22, count 0 2006.230.00:32:49.12#ibcon#about to write, iclass 22, count 0 2006.230.00:32:49.12#ibcon#wrote, iclass 22, count 0 2006.230.00:32:49.12#ibcon#about to read 3, iclass 22, count 0 2006.230.00:32:49.14#ibcon#read 3, iclass 22, count 0 2006.230.00:32:49.14#ibcon#about to read 4, iclass 22, count 0 2006.230.00:32:49.14#ibcon#read 4, iclass 22, count 0 2006.230.00:32:49.14#ibcon#about to read 5, iclass 22, count 0 2006.230.00:32:49.14#ibcon#read 5, iclass 22, count 0 2006.230.00:32:49.14#ibcon#about to read 6, iclass 22, count 0 2006.230.00:32:49.14#ibcon#read 6, iclass 22, count 0 2006.230.00:32:49.14#ibcon#end of sib2, iclass 22, count 0 2006.230.00:32:49.14#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:32:49.14#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:32:49.14#ibcon#[25=USB\r\n] 2006.230.00:32:49.14#ibcon#*before write, iclass 22, count 0 2006.230.00:32:49.14#ibcon#enter sib2, iclass 22, count 0 2006.230.00:32:49.14#ibcon#flushed, iclass 22, count 0 2006.230.00:32:49.14#ibcon#about to write, iclass 22, count 0 2006.230.00:32:49.14#ibcon#wrote, iclass 22, count 0 2006.230.00:32:49.14#ibcon#about to read 3, iclass 22, count 0 2006.230.00:32:49.17#ibcon#read 3, iclass 22, count 0 2006.230.00:32:49.17#ibcon#about to read 4, iclass 22, count 0 2006.230.00:32:49.17#ibcon#read 4, iclass 22, count 0 2006.230.00:32:49.17#ibcon#about to read 5, iclass 22, count 0 2006.230.00:32:49.17#ibcon#read 5, iclass 22, count 0 2006.230.00:32:49.17#ibcon#about to read 6, iclass 22, count 0 2006.230.00:32:49.17#ibcon#read 6, iclass 22, count 0 2006.230.00:32:49.17#ibcon#end of sib2, iclass 22, count 0 2006.230.00:32:49.17#ibcon#*after write, iclass 22, count 0 2006.230.00:32:49.17#ibcon#*before return 0, iclass 22, count 0 2006.230.00:32:49.17#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:49.17#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:49.17#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:32:49.17#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:32:49.17$vck44/valo=4,624.99 2006.230.00:32:49.17#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.00:32:49.17#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.00:32:49.17#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:49.17#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:49.17#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:49.17#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:49.17#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:32:49.17#ibcon#first serial, iclass 24, count 0 2006.230.00:32:49.17#ibcon#enter sib2, iclass 24, count 0 2006.230.00:32:49.17#ibcon#flushed, iclass 24, count 0 2006.230.00:32:49.17#ibcon#about to write, iclass 24, count 0 2006.230.00:32:49.17#ibcon#wrote, iclass 24, count 0 2006.230.00:32:49.17#ibcon#about to read 3, iclass 24, count 0 2006.230.00:32:49.19#ibcon#read 3, iclass 24, count 0 2006.230.00:32:49.19#ibcon#about to read 4, iclass 24, count 0 2006.230.00:32:49.19#ibcon#read 4, iclass 24, count 0 2006.230.00:32:49.19#ibcon#about to read 5, iclass 24, count 0 2006.230.00:32:49.19#ibcon#read 5, iclass 24, count 0 2006.230.00:32:49.19#ibcon#about to read 6, iclass 24, count 0 2006.230.00:32:49.19#ibcon#read 6, iclass 24, count 0 2006.230.00:32:49.19#ibcon#end of sib2, iclass 24, count 0 2006.230.00:32:49.19#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:32:49.19#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:32:49.19#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:32:49.19#ibcon#*before write, iclass 24, count 0 2006.230.00:32:49.19#ibcon#enter sib2, iclass 24, count 0 2006.230.00:32:49.19#ibcon#flushed, iclass 24, count 0 2006.230.00:32:49.19#ibcon#about to write, iclass 24, count 0 2006.230.00:32:49.19#ibcon#wrote, iclass 24, count 0 2006.230.00:32:49.19#ibcon#about to read 3, iclass 24, count 0 2006.230.00:32:49.23#ibcon#read 3, iclass 24, count 0 2006.230.00:32:49.23#ibcon#about to read 4, iclass 24, count 0 2006.230.00:32:49.23#ibcon#read 4, iclass 24, count 0 2006.230.00:32:49.23#ibcon#about to read 5, iclass 24, count 0 2006.230.00:32:49.23#ibcon#read 5, iclass 24, count 0 2006.230.00:32:49.23#ibcon#about to read 6, iclass 24, count 0 2006.230.00:32:49.23#ibcon#read 6, iclass 24, count 0 2006.230.00:32:49.23#ibcon#end of sib2, iclass 24, count 0 2006.230.00:32:49.23#ibcon#*after write, iclass 24, count 0 2006.230.00:32:49.23#ibcon#*before return 0, iclass 24, count 0 2006.230.00:32:49.23#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:49.23#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:49.23#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:32:49.23#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:32:49.23$vck44/va=4,7 2006.230.00:32:49.23#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.00:32:49.23#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.00:32:49.23#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:49.23#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:49.29#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:49.29#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:49.29#ibcon#enter wrdev, iclass 26, count 2 2006.230.00:32:49.29#ibcon#first serial, iclass 26, count 2 2006.230.00:32:49.29#ibcon#enter sib2, iclass 26, count 2 2006.230.00:32:49.29#ibcon#flushed, iclass 26, count 2 2006.230.00:32:49.29#ibcon#about to write, iclass 26, count 2 2006.230.00:32:49.29#ibcon#wrote, iclass 26, count 2 2006.230.00:32:49.29#ibcon#about to read 3, iclass 26, count 2 2006.230.00:32:49.31#ibcon#read 3, iclass 26, count 2 2006.230.00:32:49.31#ibcon#about to read 4, iclass 26, count 2 2006.230.00:32:49.31#ibcon#read 4, iclass 26, count 2 2006.230.00:32:49.31#ibcon#about to read 5, iclass 26, count 2 2006.230.00:32:49.31#ibcon#read 5, iclass 26, count 2 2006.230.00:32:49.31#ibcon#about to read 6, iclass 26, count 2 2006.230.00:32:49.31#ibcon#read 6, iclass 26, count 2 2006.230.00:32:49.31#ibcon#end of sib2, iclass 26, count 2 2006.230.00:32:49.31#ibcon#*mode == 0, iclass 26, count 2 2006.230.00:32:49.31#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.00:32:49.31#ibcon#[25=AT04-07\r\n] 2006.230.00:32:49.31#ibcon#*before write, iclass 26, count 2 2006.230.00:32:49.31#ibcon#enter sib2, iclass 26, count 2 2006.230.00:32:49.31#ibcon#flushed, iclass 26, count 2 2006.230.00:32:49.31#ibcon#about to write, iclass 26, count 2 2006.230.00:32:49.31#ibcon#wrote, iclass 26, count 2 2006.230.00:32:49.31#ibcon#about to read 3, iclass 26, count 2 2006.230.00:32:49.34#ibcon#read 3, iclass 26, count 2 2006.230.00:32:49.34#ibcon#about to read 4, iclass 26, count 2 2006.230.00:32:49.34#ibcon#read 4, iclass 26, count 2 2006.230.00:32:49.34#ibcon#about to read 5, iclass 26, count 2 2006.230.00:32:49.34#ibcon#read 5, iclass 26, count 2 2006.230.00:32:49.34#ibcon#about to read 6, iclass 26, count 2 2006.230.00:32:49.34#ibcon#read 6, iclass 26, count 2 2006.230.00:32:49.34#ibcon#end of sib2, iclass 26, count 2 2006.230.00:32:49.34#ibcon#*after write, iclass 26, count 2 2006.230.00:32:49.34#ibcon#*before return 0, iclass 26, count 2 2006.230.00:32:49.34#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:49.34#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:49.34#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.00:32:49.34#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:49.34#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:49.46#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:49.46#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:49.46#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:32:49.46#ibcon#first serial, iclass 26, count 0 2006.230.00:32:49.46#ibcon#enter sib2, iclass 26, count 0 2006.230.00:32:49.46#ibcon#flushed, iclass 26, count 0 2006.230.00:32:49.46#ibcon#about to write, iclass 26, count 0 2006.230.00:32:49.46#ibcon#wrote, iclass 26, count 0 2006.230.00:32:49.46#ibcon#about to read 3, iclass 26, count 0 2006.230.00:32:49.48#ibcon#read 3, iclass 26, count 0 2006.230.00:32:49.48#ibcon#about to read 4, iclass 26, count 0 2006.230.00:32:49.48#ibcon#read 4, iclass 26, count 0 2006.230.00:32:49.48#ibcon#about to read 5, iclass 26, count 0 2006.230.00:32:49.48#ibcon#read 5, iclass 26, count 0 2006.230.00:32:49.48#ibcon#about to read 6, iclass 26, count 0 2006.230.00:32:49.48#ibcon#read 6, iclass 26, count 0 2006.230.00:32:49.48#ibcon#end of sib2, iclass 26, count 0 2006.230.00:32:49.48#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:32:49.48#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:32:49.48#ibcon#[25=USB\r\n] 2006.230.00:32:49.48#ibcon#*before write, iclass 26, count 0 2006.230.00:32:49.48#ibcon#enter sib2, iclass 26, count 0 2006.230.00:32:49.48#ibcon#flushed, iclass 26, count 0 2006.230.00:32:49.48#ibcon#about to write, iclass 26, count 0 2006.230.00:32:49.48#ibcon#wrote, iclass 26, count 0 2006.230.00:32:49.48#ibcon#about to read 3, iclass 26, count 0 2006.230.00:32:49.51#ibcon#read 3, iclass 26, count 0 2006.230.00:32:49.51#ibcon#about to read 4, iclass 26, count 0 2006.230.00:32:49.51#ibcon#read 4, iclass 26, count 0 2006.230.00:32:49.51#ibcon#about to read 5, iclass 26, count 0 2006.230.00:32:49.51#ibcon#read 5, iclass 26, count 0 2006.230.00:32:49.51#ibcon#about to read 6, iclass 26, count 0 2006.230.00:32:49.51#ibcon#read 6, iclass 26, count 0 2006.230.00:32:49.51#ibcon#end of sib2, iclass 26, count 0 2006.230.00:32:49.51#ibcon#*after write, iclass 26, count 0 2006.230.00:32:49.51#ibcon#*before return 0, iclass 26, count 0 2006.230.00:32:49.51#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:49.51#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:49.51#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:32:49.51#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:32:49.51$vck44/valo=5,734.99 2006.230.00:32:49.51#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.00:32:49.51#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.00:32:49.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:49.51#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:49.51#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:49.51#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:49.51#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:32:49.51#ibcon#first serial, iclass 28, count 0 2006.230.00:32:49.51#ibcon#enter sib2, iclass 28, count 0 2006.230.00:32:49.51#ibcon#flushed, iclass 28, count 0 2006.230.00:32:49.51#ibcon#about to write, iclass 28, count 0 2006.230.00:32:49.51#ibcon#wrote, iclass 28, count 0 2006.230.00:32:49.51#ibcon#about to read 3, iclass 28, count 0 2006.230.00:32:49.53#ibcon#read 3, iclass 28, count 0 2006.230.00:32:49.53#ibcon#about to read 4, iclass 28, count 0 2006.230.00:32:49.53#ibcon#read 4, iclass 28, count 0 2006.230.00:32:49.53#ibcon#about to read 5, iclass 28, count 0 2006.230.00:32:49.53#ibcon#read 5, iclass 28, count 0 2006.230.00:32:49.53#ibcon#about to read 6, iclass 28, count 0 2006.230.00:32:49.53#ibcon#read 6, iclass 28, count 0 2006.230.00:32:49.53#ibcon#end of sib2, iclass 28, count 0 2006.230.00:32:49.53#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:32:49.53#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:32:49.53#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:32:49.53#ibcon#*before write, iclass 28, count 0 2006.230.00:32:49.53#ibcon#enter sib2, iclass 28, count 0 2006.230.00:32:49.53#ibcon#flushed, iclass 28, count 0 2006.230.00:32:49.53#ibcon#about to write, iclass 28, count 0 2006.230.00:32:49.53#ibcon#wrote, iclass 28, count 0 2006.230.00:32:49.53#ibcon#about to read 3, iclass 28, count 0 2006.230.00:32:49.57#ibcon#read 3, iclass 28, count 0 2006.230.00:32:49.57#ibcon#about to read 4, iclass 28, count 0 2006.230.00:32:49.57#ibcon#read 4, iclass 28, count 0 2006.230.00:32:49.57#ibcon#about to read 5, iclass 28, count 0 2006.230.00:32:49.57#ibcon#read 5, iclass 28, count 0 2006.230.00:32:49.57#ibcon#about to read 6, iclass 28, count 0 2006.230.00:32:49.57#ibcon#read 6, iclass 28, count 0 2006.230.00:32:49.57#ibcon#end of sib2, iclass 28, count 0 2006.230.00:32:49.57#ibcon#*after write, iclass 28, count 0 2006.230.00:32:49.57#ibcon#*before return 0, iclass 28, count 0 2006.230.00:32:49.57#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:49.57#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:49.57#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:32:49.57#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:32:49.57$vck44/va=5,4 2006.230.00:32:49.57#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.00:32:49.57#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.00:32:49.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:49.57#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:49.63#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:49.63#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:49.63#ibcon#enter wrdev, iclass 30, count 2 2006.230.00:32:49.63#ibcon#first serial, iclass 30, count 2 2006.230.00:32:49.63#ibcon#enter sib2, iclass 30, count 2 2006.230.00:32:49.63#ibcon#flushed, iclass 30, count 2 2006.230.00:32:49.63#ibcon#about to write, iclass 30, count 2 2006.230.00:32:49.63#ibcon#wrote, iclass 30, count 2 2006.230.00:32:49.63#ibcon#about to read 3, iclass 30, count 2 2006.230.00:32:49.65#ibcon#read 3, iclass 30, count 2 2006.230.00:32:49.65#ibcon#about to read 4, iclass 30, count 2 2006.230.00:32:49.65#ibcon#read 4, iclass 30, count 2 2006.230.00:32:49.65#ibcon#about to read 5, iclass 30, count 2 2006.230.00:32:49.65#ibcon#read 5, iclass 30, count 2 2006.230.00:32:49.65#ibcon#about to read 6, iclass 30, count 2 2006.230.00:32:49.65#ibcon#read 6, iclass 30, count 2 2006.230.00:32:49.65#ibcon#end of sib2, iclass 30, count 2 2006.230.00:32:49.65#ibcon#*mode == 0, iclass 30, count 2 2006.230.00:32:49.65#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.00:32:49.65#ibcon#[25=AT05-04\r\n] 2006.230.00:32:49.65#ibcon#*before write, iclass 30, count 2 2006.230.00:32:49.65#ibcon#enter sib2, iclass 30, count 2 2006.230.00:32:49.65#ibcon#flushed, iclass 30, count 2 2006.230.00:32:49.65#ibcon#about to write, iclass 30, count 2 2006.230.00:32:49.65#ibcon#wrote, iclass 30, count 2 2006.230.00:32:49.65#ibcon#about to read 3, iclass 30, count 2 2006.230.00:32:49.68#ibcon#read 3, iclass 30, count 2 2006.230.00:32:49.68#ibcon#about to read 4, iclass 30, count 2 2006.230.00:32:49.68#ibcon#read 4, iclass 30, count 2 2006.230.00:32:49.68#ibcon#about to read 5, iclass 30, count 2 2006.230.00:32:49.68#ibcon#read 5, iclass 30, count 2 2006.230.00:32:49.68#ibcon#about to read 6, iclass 30, count 2 2006.230.00:32:49.68#ibcon#read 6, iclass 30, count 2 2006.230.00:32:49.68#ibcon#end of sib2, iclass 30, count 2 2006.230.00:32:49.68#ibcon#*after write, iclass 30, count 2 2006.230.00:32:49.68#ibcon#*before return 0, iclass 30, count 2 2006.230.00:32:49.68#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:49.68#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:49.68#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.00:32:49.68#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:49.68#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:49.80#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:49.80#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:49.80#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:32:49.80#ibcon#first serial, iclass 30, count 0 2006.230.00:32:49.80#ibcon#enter sib2, iclass 30, count 0 2006.230.00:32:49.80#ibcon#flushed, iclass 30, count 0 2006.230.00:32:49.80#ibcon#about to write, iclass 30, count 0 2006.230.00:32:49.80#ibcon#wrote, iclass 30, count 0 2006.230.00:32:49.80#ibcon#about to read 3, iclass 30, count 0 2006.230.00:32:49.82#ibcon#read 3, iclass 30, count 0 2006.230.00:32:49.82#ibcon#about to read 4, iclass 30, count 0 2006.230.00:32:49.82#ibcon#read 4, iclass 30, count 0 2006.230.00:32:49.82#ibcon#about to read 5, iclass 30, count 0 2006.230.00:32:49.82#ibcon#read 5, iclass 30, count 0 2006.230.00:32:49.82#ibcon#about to read 6, iclass 30, count 0 2006.230.00:32:49.82#ibcon#read 6, iclass 30, count 0 2006.230.00:32:49.82#ibcon#end of sib2, iclass 30, count 0 2006.230.00:32:49.82#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:32:49.82#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:32:49.82#ibcon#[25=USB\r\n] 2006.230.00:32:49.82#ibcon#*before write, iclass 30, count 0 2006.230.00:32:49.82#ibcon#enter sib2, iclass 30, count 0 2006.230.00:32:49.82#ibcon#flushed, iclass 30, count 0 2006.230.00:32:49.82#ibcon#about to write, iclass 30, count 0 2006.230.00:32:49.82#ibcon#wrote, iclass 30, count 0 2006.230.00:32:49.82#ibcon#about to read 3, iclass 30, count 0 2006.230.00:32:49.85#ibcon#read 3, iclass 30, count 0 2006.230.00:32:49.85#ibcon#about to read 4, iclass 30, count 0 2006.230.00:32:49.85#ibcon#read 4, iclass 30, count 0 2006.230.00:32:49.85#ibcon#about to read 5, iclass 30, count 0 2006.230.00:32:49.85#ibcon#read 5, iclass 30, count 0 2006.230.00:32:49.85#ibcon#about to read 6, iclass 30, count 0 2006.230.00:32:49.85#ibcon#read 6, iclass 30, count 0 2006.230.00:32:49.85#ibcon#end of sib2, iclass 30, count 0 2006.230.00:32:49.85#ibcon#*after write, iclass 30, count 0 2006.230.00:32:49.85#ibcon#*before return 0, iclass 30, count 0 2006.230.00:32:49.85#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:49.85#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:49.85#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:32:49.85#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:32:49.85$vck44/valo=6,814.99 2006.230.00:32:49.85#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.00:32:49.85#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.00:32:49.85#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:49.85#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:49.85#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:49.85#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:49.85#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:32:49.85#ibcon#first serial, iclass 32, count 0 2006.230.00:32:49.85#ibcon#enter sib2, iclass 32, count 0 2006.230.00:32:49.85#ibcon#flushed, iclass 32, count 0 2006.230.00:32:49.85#ibcon#about to write, iclass 32, count 0 2006.230.00:32:49.85#ibcon#wrote, iclass 32, count 0 2006.230.00:32:49.85#ibcon#about to read 3, iclass 32, count 0 2006.230.00:32:49.87#ibcon#read 3, iclass 32, count 0 2006.230.00:32:49.87#ibcon#about to read 4, iclass 32, count 0 2006.230.00:32:49.87#ibcon#read 4, iclass 32, count 0 2006.230.00:32:49.87#ibcon#about to read 5, iclass 32, count 0 2006.230.00:32:49.87#ibcon#read 5, iclass 32, count 0 2006.230.00:32:49.87#ibcon#about to read 6, iclass 32, count 0 2006.230.00:32:49.87#ibcon#read 6, iclass 32, count 0 2006.230.00:32:49.87#ibcon#end of sib2, iclass 32, count 0 2006.230.00:32:49.87#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:32:49.87#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:32:49.87#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:32:49.87#ibcon#*before write, iclass 32, count 0 2006.230.00:32:49.87#ibcon#enter sib2, iclass 32, count 0 2006.230.00:32:49.87#ibcon#flushed, iclass 32, count 0 2006.230.00:32:49.87#ibcon#about to write, iclass 32, count 0 2006.230.00:32:49.87#ibcon#wrote, iclass 32, count 0 2006.230.00:32:49.87#ibcon#about to read 3, iclass 32, count 0 2006.230.00:32:49.91#ibcon#read 3, iclass 32, count 0 2006.230.00:32:49.91#ibcon#about to read 4, iclass 32, count 0 2006.230.00:32:49.91#ibcon#read 4, iclass 32, count 0 2006.230.00:32:49.91#ibcon#about to read 5, iclass 32, count 0 2006.230.00:32:49.91#ibcon#read 5, iclass 32, count 0 2006.230.00:32:49.91#ibcon#about to read 6, iclass 32, count 0 2006.230.00:32:49.91#ibcon#read 6, iclass 32, count 0 2006.230.00:32:49.91#ibcon#end of sib2, iclass 32, count 0 2006.230.00:32:49.91#ibcon#*after write, iclass 32, count 0 2006.230.00:32:49.91#ibcon#*before return 0, iclass 32, count 0 2006.230.00:32:49.91#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:49.91#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:49.91#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:32:49.91#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:32:49.91$vck44/va=6,4 2006.230.00:32:49.91#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.00:32:49.91#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.00:32:49.91#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:49.91#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:49.97#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:49.97#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:49.97#ibcon#enter wrdev, iclass 34, count 2 2006.230.00:32:49.97#ibcon#first serial, iclass 34, count 2 2006.230.00:32:49.97#ibcon#enter sib2, iclass 34, count 2 2006.230.00:32:49.97#ibcon#flushed, iclass 34, count 2 2006.230.00:32:49.97#ibcon#about to write, iclass 34, count 2 2006.230.00:32:49.97#ibcon#wrote, iclass 34, count 2 2006.230.00:32:49.97#ibcon#about to read 3, iclass 34, count 2 2006.230.00:32:49.99#ibcon#read 3, iclass 34, count 2 2006.230.00:32:49.99#ibcon#about to read 4, iclass 34, count 2 2006.230.00:32:49.99#ibcon#read 4, iclass 34, count 2 2006.230.00:32:49.99#ibcon#about to read 5, iclass 34, count 2 2006.230.00:32:49.99#ibcon#read 5, iclass 34, count 2 2006.230.00:32:49.99#ibcon#about to read 6, iclass 34, count 2 2006.230.00:32:49.99#ibcon#read 6, iclass 34, count 2 2006.230.00:32:49.99#ibcon#end of sib2, iclass 34, count 2 2006.230.00:32:49.99#ibcon#*mode == 0, iclass 34, count 2 2006.230.00:32:49.99#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.00:32:49.99#ibcon#[25=AT06-04\r\n] 2006.230.00:32:49.99#ibcon#*before write, iclass 34, count 2 2006.230.00:32:49.99#ibcon#enter sib2, iclass 34, count 2 2006.230.00:32:49.99#ibcon#flushed, iclass 34, count 2 2006.230.00:32:49.99#ibcon#about to write, iclass 34, count 2 2006.230.00:32:49.99#ibcon#wrote, iclass 34, count 2 2006.230.00:32:49.99#ibcon#about to read 3, iclass 34, count 2 2006.230.00:32:50.02#ibcon#read 3, iclass 34, count 2 2006.230.00:32:50.02#ibcon#about to read 4, iclass 34, count 2 2006.230.00:32:50.02#ibcon#read 4, iclass 34, count 2 2006.230.00:32:50.02#ibcon#about to read 5, iclass 34, count 2 2006.230.00:32:50.02#ibcon#read 5, iclass 34, count 2 2006.230.00:32:50.02#ibcon#about to read 6, iclass 34, count 2 2006.230.00:32:50.02#ibcon#read 6, iclass 34, count 2 2006.230.00:32:50.02#ibcon#end of sib2, iclass 34, count 2 2006.230.00:32:50.02#ibcon#*after write, iclass 34, count 2 2006.230.00:32:50.02#ibcon#*before return 0, iclass 34, count 2 2006.230.00:32:50.02#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:50.02#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:50.02#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.00:32:50.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:50.02#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:50.14#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:50.14#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:50.14#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:32:50.14#ibcon#first serial, iclass 34, count 0 2006.230.00:32:50.14#ibcon#enter sib2, iclass 34, count 0 2006.230.00:32:50.14#ibcon#flushed, iclass 34, count 0 2006.230.00:32:50.14#ibcon#about to write, iclass 34, count 0 2006.230.00:32:50.14#ibcon#wrote, iclass 34, count 0 2006.230.00:32:50.14#ibcon#about to read 3, iclass 34, count 0 2006.230.00:32:50.16#ibcon#read 3, iclass 34, count 0 2006.230.00:32:50.16#ibcon#about to read 4, iclass 34, count 0 2006.230.00:32:50.16#ibcon#read 4, iclass 34, count 0 2006.230.00:32:50.16#ibcon#about to read 5, iclass 34, count 0 2006.230.00:32:50.16#ibcon#read 5, iclass 34, count 0 2006.230.00:32:50.16#ibcon#about to read 6, iclass 34, count 0 2006.230.00:32:50.16#ibcon#read 6, iclass 34, count 0 2006.230.00:32:50.16#ibcon#end of sib2, iclass 34, count 0 2006.230.00:32:50.16#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:32:50.16#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:32:50.16#ibcon#[25=USB\r\n] 2006.230.00:32:50.16#ibcon#*before write, iclass 34, count 0 2006.230.00:32:50.16#ibcon#enter sib2, iclass 34, count 0 2006.230.00:32:50.16#ibcon#flushed, iclass 34, count 0 2006.230.00:32:50.16#ibcon#about to write, iclass 34, count 0 2006.230.00:32:50.16#ibcon#wrote, iclass 34, count 0 2006.230.00:32:50.16#ibcon#about to read 3, iclass 34, count 0 2006.230.00:32:50.19#ibcon#read 3, iclass 34, count 0 2006.230.00:32:50.19#ibcon#about to read 4, iclass 34, count 0 2006.230.00:32:50.19#ibcon#read 4, iclass 34, count 0 2006.230.00:32:50.19#ibcon#about to read 5, iclass 34, count 0 2006.230.00:32:50.19#ibcon#read 5, iclass 34, count 0 2006.230.00:32:50.19#ibcon#about to read 6, iclass 34, count 0 2006.230.00:32:50.19#ibcon#read 6, iclass 34, count 0 2006.230.00:32:50.19#ibcon#end of sib2, iclass 34, count 0 2006.230.00:32:50.19#ibcon#*after write, iclass 34, count 0 2006.230.00:32:50.19#ibcon#*before return 0, iclass 34, count 0 2006.230.00:32:50.19#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:50.19#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:50.19#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:32:50.19#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:32:50.19$vck44/valo=7,864.99 2006.230.00:32:50.19#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.00:32:50.19#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.00:32:50.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:50.19#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:50.19#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:50.19#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:50.19#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:32:50.19#ibcon#first serial, iclass 36, count 0 2006.230.00:32:50.19#ibcon#enter sib2, iclass 36, count 0 2006.230.00:32:50.19#ibcon#flushed, iclass 36, count 0 2006.230.00:32:50.19#ibcon#about to write, iclass 36, count 0 2006.230.00:32:50.19#ibcon#wrote, iclass 36, count 0 2006.230.00:32:50.19#ibcon#about to read 3, iclass 36, count 0 2006.230.00:32:50.21#ibcon#read 3, iclass 36, count 0 2006.230.00:32:50.21#ibcon#about to read 4, iclass 36, count 0 2006.230.00:32:50.21#ibcon#read 4, iclass 36, count 0 2006.230.00:32:50.21#ibcon#about to read 5, iclass 36, count 0 2006.230.00:32:50.21#ibcon#read 5, iclass 36, count 0 2006.230.00:32:50.21#ibcon#about to read 6, iclass 36, count 0 2006.230.00:32:50.21#ibcon#read 6, iclass 36, count 0 2006.230.00:32:50.21#ibcon#end of sib2, iclass 36, count 0 2006.230.00:32:50.21#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:32:50.21#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:32:50.21#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:32:50.21#ibcon#*before write, iclass 36, count 0 2006.230.00:32:50.21#ibcon#enter sib2, iclass 36, count 0 2006.230.00:32:50.21#ibcon#flushed, iclass 36, count 0 2006.230.00:32:50.21#ibcon#about to write, iclass 36, count 0 2006.230.00:32:50.21#ibcon#wrote, iclass 36, count 0 2006.230.00:32:50.21#ibcon#about to read 3, iclass 36, count 0 2006.230.00:32:50.25#ibcon#read 3, iclass 36, count 0 2006.230.00:32:50.25#ibcon#about to read 4, iclass 36, count 0 2006.230.00:32:50.25#ibcon#read 4, iclass 36, count 0 2006.230.00:32:50.25#ibcon#about to read 5, iclass 36, count 0 2006.230.00:32:50.25#ibcon#read 5, iclass 36, count 0 2006.230.00:32:50.25#ibcon#about to read 6, iclass 36, count 0 2006.230.00:32:50.25#ibcon#read 6, iclass 36, count 0 2006.230.00:32:50.25#ibcon#end of sib2, iclass 36, count 0 2006.230.00:32:50.25#ibcon#*after write, iclass 36, count 0 2006.230.00:32:50.25#ibcon#*before return 0, iclass 36, count 0 2006.230.00:32:50.25#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:50.25#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:50.25#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:32:50.25#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:32:50.25$vck44/va=7,5 2006.230.00:32:50.25#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.00:32:50.25#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.00:32:50.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:50.25#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:50.31#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:50.31#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:50.31#ibcon#enter wrdev, iclass 38, count 2 2006.230.00:32:50.31#ibcon#first serial, iclass 38, count 2 2006.230.00:32:50.31#ibcon#enter sib2, iclass 38, count 2 2006.230.00:32:50.31#ibcon#flushed, iclass 38, count 2 2006.230.00:32:50.31#ibcon#about to write, iclass 38, count 2 2006.230.00:32:50.31#ibcon#wrote, iclass 38, count 2 2006.230.00:32:50.31#ibcon#about to read 3, iclass 38, count 2 2006.230.00:32:50.33#ibcon#read 3, iclass 38, count 2 2006.230.00:32:50.33#ibcon#about to read 4, iclass 38, count 2 2006.230.00:32:50.33#ibcon#read 4, iclass 38, count 2 2006.230.00:32:50.33#ibcon#about to read 5, iclass 38, count 2 2006.230.00:32:50.33#ibcon#read 5, iclass 38, count 2 2006.230.00:32:50.33#ibcon#about to read 6, iclass 38, count 2 2006.230.00:32:50.33#ibcon#read 6, iclass 38, count 2 2006.230.00:32:50.33#ibcon#end of sib2, iclass 38, count 2 2006.230.00:32:50.33#ibcon#*mode == 0, iclass 38, count 2 2006.230.00:32:50.33#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.00:32:50.33#ibcon#[25=AT07-05\r\n] 2006.230.00:32:50.33#ibcon#*before write, iclass 38, count 2 2006.230.00:32:50.33#ibcon#enter sib2, iclass 38, count 2 2006.230.00:32:50.33#ibcon#flushed, iclass 38, count 2 2006.230.00:32:50.33#ibcon#about to write, iclass 38, count 2 2006.230.00:32:50.33#ibcon#wrote, iclass 38, count 2 2006.230.00:32:50.33#ibcon#about to read 3, iclass 38, count 2 2006.230.00:32:50.36#ibcon#read 3, iclass 38, count 2 2006.230.00:32:50.36#ibcon#about to read 4, iclass 38, count 2 2006.230.00:32:50.36#ibcon#read 4, iclass 38, count 2 2006.230.00:32:50.36#ibcon#about to read 5, iclass 38, count 2 2006.230.00:32:50.36#ibcon#read 5, iclass 38, count 2 2006.230.00:32:50.36#ibcon#about to read 6, iclass 38, count 2 2006.230.00:32:50.36#ibcon#read 6, iclass 38, count 2 2006.230.00:32:50.36#ibcon#end of sib2, iclass 38, count 2 2006.230.00:32:50.36#ibcon#*after write, iclass 38, count 2 2006.230.00:32:50.36#ibcon#*before return 0, iclass 38, count 2 2006.230.00:32:50.36#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:50.36#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:50.36#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.00:32:50.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:50.36#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:50.48#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:50.48#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:50.48#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:32:50.48#ibcon#first serial, iclass 38, count 0 2006.230.00:32:50.48#ibcon#enter sib2, iclass 38, count 0 2006.230.00:32:50.48#ibcon#flushed, iclass 38, count 0 2006.230.00:32:50.48#ibcon#about to write, iclass 38, count 0 2006.230.00:32:50.48#ibcon#wrote, iclass 38, count 0 2006.230.00:32:50.48#ibcon#about to read 3, iclass 38, count 0 2006.230.00:32:50.50#ibcon#read 3, iclass 38, count 0 2006.230.00:32:50.50#ibcon#about to read 4, iclass 38, count 0 2006.230.00:32:50.50#ibcon#read 4, iclass 38, count 0 2006.230.00:32:50.50#ibcon#about to read 5, iclass 38, count 0 2006.230.00:32:50.50#ibcon#read 5, iclass 38, count 0 2006.230.00:32:50.50#ibcon#about to read 6, iclass 38, count 0 2006.230.00:32:50.50#ibcon#read 6, iclass 38, count 0 2006.230.00:32:50.50#ibcon#end of sib2, iclass 38, count 0 2006.230.00:32:50.50#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:32:50.50#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:32:50.50#ibcon#[25=USB\r\n] 2006.230.00:32:50.50#ibcon#*before write, iclass 38, count 0 2006.230.00:32:50.50#ibcon#enter sib2, iclass 38, count 0 2006.230.00:32:50.50#ibcon#flushed, iclass 38, count 0 2006.230.00:32:50.50#ibcon#about to write, iclass 38, count 0 2006.230.00:32:50.50#ibcon#wrote, iclass 38, count 0 2006.230.00:32:50.50#ibcon#about to read 3, iclass 38, count 0 2006.230.00:32:50.53#ibcon#read 3, iclass 38, count 0 2006.230.00:32:50.53#ibcon#about to read 4, iclass 38, count 0 2006.230.00:32:50.53#ibcon#read 4, iclass 38, count 0 2006.230.00:32:50.53#ibcon#about to read 5, iclass 38, count 0 2006.230.00:32:50.53#ibcon#read 5, iclass 38, count 0 2006.230.00:32:50.53#ibcon#about to read 6, iclass 38, count 0 2006.230.00:32:50.53#ibcon#read 6, iclass 38, count 0 2006.230.00:32:50.53#ibcon#end of sib2, iclass 38, count 0 2006.230.00:32:50.53#ibcon#*after write, iclass 38, count 0 2006.230.00:32:50.53#ibcon#*before return 0, iclass 38, count 0 2006.230.00:32:50.53#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:50.53#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:50.53#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:32:50.53#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:32:50.53$vck44/valo=8,884.99 2006.230.00:32:50.53#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.00:32:50.53#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.00:32:50.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:50.53#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:50.53#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:50.53#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:50.53#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:32:50.53#ibcon#first serial, iclass 40, count 0 2006.230.00:32:50.53#ibcon#enter sib2, iclass 40, count 0 2006.230.00:32:50.53#ibcon#flushed, iclass 40, count 0 2006.230.00:32:50.53#ibcon#about to write, iclass 40, count 0 2006.230.00:32:50.53#ibcon#wrote, iclass 40, count 0 2006.230.00:32:50.53#ibcon#about to read 3, iclass 40, count 0 2006.230.00:32:50.55#ibcon#read 3, iclass 40, count 0 2006.230.00:32:50.55#ibcon#about to read 4, iclass 40, count 0 2006.230.00:32:50.55#ibcon#read 4, iclass 40, count 0 2006.230.00:32:50.55#ibcon#about to read 5, iclass 40, count 0 2006.230.00:32:50.55#ibcon#read 5, iclass 40, count 0 2006.230.00:32:50.55#ibcon#about to read 6, iclass 40, count 0 2006.230.00:32:50.55#ibcon#read 6, iclass 40, count 0 2006.230.00:32:50.55#ibcon#end of sib2, iclass 40, count 0 2006.230.00:32:50.55#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:32:50.55#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:32:50.55#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:32:50.55#ibcon#*before write, iclass 40, count 0 2006.230.00:32:50.55#ibcon#enter sib2, iclass 40, count 0 2006.230.00:32:50.55#ibcon#flushed, iclass 40, count 0 2006.230.00:32:50.55#ibcon#about to write, iclass 40, count 0 2006.230.00:32:50.55#ibcon#wrote, iclass 40, count 0 2006.230.00:32:50.55#ibcon#about to read 3, iclass 40, count 0 2006.230.00:32:50.59#ibcon#read 3, iclass 40, count 0 2006.230.00:32:50.59#ibcon#about to read 4, iclass 40, count 0 2006.230.00:32:50.59#ibcon#read 4, iclass 40, count 0 2006.230.00:32:50.59#ibcon#about to read 5, iclass 40, count 0 2006.230.00:32:50.59#ibcon#read 5, iclass 40, count 0 2006.230.00:32:50.59#ibcon#about to read 6, iclass 40, count 0 2006.230.00:32:50.59#ibcon#read 6, iclass 40, count 0 2006.230.00:32:50.59#ibcon#end of sib2, iclass 40, count 0 2006.230.00:32:50.59#ibcon#*after write, iclass 40, count 0 2006.230.00:32:50.59#ibcon#*before return 0, iclass 40, count 0 2006.230.00:32:50.59#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:50.59#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:50.59#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:32:50.59#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:32:50.59$vck44/va=8,6 2006.230.00:32:50.59#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.00:32:50.59#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.00:32:50.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:50.59#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:50.65#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:50.65#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:50.65#ibcon#enter wrdev, iclass 4, count 2 2006.230.00:32:50.65#ibcon#first serial, iclass 4, count 2 2006.230.00:32:50.65#ibcon#enter sib2, iclass 4, count 2 2006.230.00:32:50.65#ibcon#flushed, iclass 4, count 2 2006.230.00:32:50.65#ibcon#about to write, iclass 4, count 2 2006.230.00:32:50.65#ibcon#wrote, iclass 4, count 2 2006.230.00:32:50.65#ibcon#about to read 3, iclass 4, count 2 2006.230.00:32:50.67#ibcon#read 3, iclass 4, count 2 2006.230.00:32:50.67#ibcon#about to read 4, iclass 4, count 2 2006.230.00:32:50.67#ibcon#read 4, iclass 4, count 2 2006.230.00:32:50.67#ibcon#about to read 5, iclass 4, count 2 2006.230.00:32:50.67#ibcon#read 5, iclass 4, count 2 2006.230.00:32:50.67#ibcon#about to read 6, iclass 4, count 2 2006.230.00:32:50.67#ibcon#read 6, iclass 4, count 2 2006.230.00:32:50.67#ibcon#end of sib2, iclass 4, count 2 2006.230.00:32:50.67#ibcon#*mode == 0, iclass 4, count 2 2006.230.00:32:50.67#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.00:32:50.67#ibcon#[25=AT08-06\r\n] 2006.230.00:32:50.67#ibcon#*before write, iclass 4, count 2 2006.230.00:32:50.67#ibcon#enter sib2, iclass 4, count 2 2006.230.00:32:50.67#ibcon#flushed, iclass 4, count 2 2006.230.00:32:50.67#ibcon#about to write, iclass 4, count 2 2006.230.00:32:50.67#ibcon#wrote, iclass 4, count 2 2006.230.00:32:50.67#ibcon#about to read 3, iclass 4, count 2 2006.230.00:32:50.70#ibcon#read 3, iclass 4, count 2 2006.230.00:32:50.70#ibcon#about to read 4, iclass 4, count 2 2006.230.00:32:50.70#ibcon#read 4, iclass 4, count 2 2006.230.00:32:50.70#ibcon#about to read 5, iclass 4, count 2 2006.230.00:32:50.70#ibcon#read 5, iclass 4, count 2 2006.230.00:32:50.70#ibcon#about to read 6, iclass 4, count 2 2006.230.00:32:50.70#ibcon#read 6, iclass 4, count 2 2006.230.00:32:50.70#ibcon#end of sib2, iclass 4, count 2 2006.230.00:32:50.70#ibcon#*after write, iclass 4, count 2 2006.230.00:32:50.70#ibcon#*before return 0, iclass 4, count 2 2006.230.00:32:50.70#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:50.70#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:50.70#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.00:32:50.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:50.70#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:50.82#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:50.82#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:50.82#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:32:50.82#ibcon#first serial, iclass 4, count 0 2006.230.00:32:50.82#ibcon#enter sib2, iclass 4, count 0 2006.230.00:32:50.82#ibcon#flushed, iclass 4, count 0 2006.230.00:32:50.82#ibcon#about to write, iclass 4, count 0 2006.230.00:32:50.82#ibcon#wrote, iclass 4, count 0 2006.230.00:32:50.82#ibcon#about to read 3, iclass 4, count 0 2006.230.00:32:50.84#ibcon#read 3, iclass 4, count 0 2006.230.00:32:50.84#ibcon#about to read 4, iclass 4, count 0 2006.230.00:32:50.84#ibcon#read 4, iclass 4, count 0 2006.230.00:32:50.84#ibcon#about to read 5, iclass 4, count 0 2006.230.00:32:50.84#ibcon#read 5, iclass 4, count 0 2006.230.00:32:50.84#ibcon#about to read 6, iclass 4, count 0 2006.230.00:32:50.84#ibcon#read 6, iclass 4, count 0 2006.230.00:32:50.84#ibcon#end of sib2, iclass 4, count 0 2006.230.00:32:50.84#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:32:50.84#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:32:50.84#ibcon#[25=USB\r\n] 2006.230.00:32:50.84#ibcon#*before write, iclass 4, count 0 2006.230.00:32:50.84#ibcon#enter sib2, iclass 4, count 0 2006.230.00:32:50.84#ibcon#flushed, iclass 4, count 0 2006.230.00:32:50.84#ibcon#about to write, iclass 4, count 0 2006.230.00:32:50.84#ibcon#wrote, iclass 4, count 0 2006.230.00:32:50.84#ibcon#about to read 3, iclass 4, count 0 2006.230.00:32:50.87#ibcon#read 3, iclass 4, count 0 2006.230.00:32:50.87#ibcon#about to read 4, iclass 4, count 0 2006.230.00:32:50.87#ibcon#read 4, iclass 4, count 0 2006.230.00:32:50.87#ibcon#about to read 5, iclass 4, count 0 2006.230.00:32:50.87#ibcon#read 5, iclass 4, count 0 2006.230.00:32:50.87#ibcon#about to read 6, iclass 4, count 0 2006.230.00:32:50.87#ibcon#read 6, iclass 4, count 0 2006.230.00:32:50.87#ibcon#end of sib2, iclass 4, count 0 2006.230.00:32:50.87#ibcon#*after write, iclass 4, count 0 2006.230.00:32:50.87#ibcon#*before return 0, iclass 4, count 0 2006.230.00:32:50.87#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:50.87#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:50.87#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:32:50.87#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:32:50.87$vck44/vblo=1,629.99 2006.230.00:32:50.87#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.00:32:50.87#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.00:32:50.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:50.87#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:50.87#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:50.87#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:50.87#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:32:50.87#ibcon#first serial, iclass 6, count 0 2006.230.00:32:50.87#ibcon#enter sib2, iclass 6, count 0 2006.230.00:32:50.87#ibcon#flushed, iclass 6, count 0 2006.230.00:32:50.87#ibcon#about to write, iclass 6, count 0 2006.230.00:32:50.87#ibcon#wrote, iclass 6, count 0 2006.230.00:32:50.87#ibcon#about to read 3, iclass 6, count 0 2006.230.00:32:50.89#ibcon#read 3, iclass 6, count 0 2006.230.00:32:50.89#ibcon#about to read 4, iclass 6, count 0 2006.230.00:32:50.89#ibcon#read 4, iclass 6, count 0 2006.230.00:32:50.89#ibcon#about to read 5, iclass 6, count 0 2006.230.00:32:50.89#ibcon#read 5, iclass 6, count 0 2006.230.00:32:50.89#ibcon#about to read 6, iclass 6, count 0 2006.230.00:32:50.89#ibcon#read 6, iclass 6, count 0 2006.230.00:32:50.89#ibcon#end of sib2, iclass 6, count 0 2006.230.00:32:50.89#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:32:50.89#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:32:50.89#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:32:50.89#ibcon#*before write, iclass 6, count 0 2006.230.00:32:50.89#ibcon#enter sib2, iclass 6, count 0 2006.230.00:32:50.89#ibcon#flushed, iclass 6, count 0 2006.230.00:32:50.89#ibcon#about to write, iclass 6, count 0 2006.230.00:32:50.89#ibcon#wrote, iclass 6, count 0 2006.230.00:32:50.89#ibcon#about to read 3, iclass 6, count 0 2006.230.00:32:50.93#ibcon#read 3, iclass 6, count 0 2006.230.00:32:50.93#ibcon#about to read 4, iclass 6, count 0 2006.230.00:32:50.93#ibcon#read 4, iclass 6, count 0 2006.230.00:32:50.93#ibcon#about to read 5, iclass 6, count 0 2006.230.00:32:50.93#ibcon#read 5, iclass 6, count 0 2006.230.00:32:50.93#ibcon#about to read 6, iclass 6, count 0 2006.230.00:32:50.93#ibcon#read 6, iclass 6, count 0 2006.230.00:32:50.93#ibcon#end of sib2, iclass 6, count 0 2006.230.00:32:50.93#ibcon#*after write, iclass 6, count 0 2006.230.00:32:50.93#ibcon#*before return 0, iclass 6, count 0 2006.230.00:32:50.93#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:50.93#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:50.93#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:32:50.93#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:32:50.93$vck44/vb=1,4 2006.230.00:32:50.93#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.00:32:50.93#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.00:32:50.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:50.93#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:32:50.93#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:32:50.93#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:32:50.93#ibcon#enter wrdev, iclass 10, count 2 2006.230.00:32:50.93#ibcon#first serial, iclass 10, count 2 2006.230.00:32:50.93#ibcon#enter sib2, iclass 10, count 2 2006.230.00:32:50.93#ibcon#flushed, iclass 10, count 2 2006.230.00:32:50.93#ibcon#about to write, iclass 10, count 2 2006.230.00:32:50.93#ibcon#wrote, iclass 10, count 2 2006.230.00:32:50.93#ibcon#about to read 3, iclass 10, count 2 2006.230.00:32:50.95#ibcon#read 3, iclass 10, count 2 2006.230.00:32:50.95#ibcon#about to read 4, iclass 10, count 2 2006.230.00:32:50.95#ibcon#read 4, iclass 10, count 2 2006.230.00:32:50.95#ibcon#about to read 5, iclass 10, count 2 2006.230.00:32:50.95#ibcon#read 5, iclass 10, count 2 2006.230.00:32:50.95#ibcon#about to read 6, iclass 10, count 2 2006.230.00:32:50.95#ibcon#read 6, iclass 10, count 2 2006.230.00:32:50.95#ibcon#end of sib2, iclass 10, count 2 2006.230.00:32:50.95#ibcon#*mode == 0, iclass 10, count 2 2006.230.00:32:50.95#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.00:32:50.95#ibcon#[27=AT01-04\r\n] 2006.230.00:32:50.95#ibcon#*before write, iclass 10, count 2 2006.230.00:32:50.95#ibcon#enter sib2, iclass 10, count 2 2006.230.00:32:50.95#ibcon#flushed, iclass 10, count 2 2006.230.00:32:50.95#ibcon#about to write, iclass 10, count 2 2006.230.00:32:50.95#ibcon#wrote, iclass 10, count 2 2006.230.00:32:50.95#ibcon#about to read 3, iclass 10, count 2 2006.230.00:32:50.98#ibcon#read 3, iclass 10, count 2 2006.230.00:32:50.98#ibcon#about to read 4, iclass 10, count 2 2006.230.00:32:50.98#ibcon#read 4, iclass 10, count 2 2006.230.00:32:50.98#ibcon#about to read 5, iclass 10, count 2 2006.230.00:32:50.98#ibcon#read 5, iclass 10, count 2 2006.230.00:32:50.98#ibcon#about to read 6, iclass 10, count 2 2006.230.00:32:50.98#ibcon#read 6, iclass 10, count 2 2006.230.00:32:50.98#ibcon#end of sib2, iclass 10, count 2 2006.230.00:32:50.98#ibcon#*after write, iclass 10, count 2 2006.230.00:32:50.98#ibcon#*before return 0, iclass 10, count 2 2006.230.00:32:50.98#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:32:50.98#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.00:32:50.98#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.00:32:50.98#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:50.98#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:32:51.10#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:32:51.10#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:32:51.10#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:32:51.10#ibcon#first serial, iclass 10, count 0 2006.230.00:32:51.10#ibcon#enter sib2, iclass 10, count 0 2006.230.00:32:51.10#ibcon#flushed, iclass 10, count 0 2006.230.00:32:51.10#ibcon#about to write, iclass 10, count 0 2006.230.00:32:51.10#ibcon#wrote, iclass 10, count 0 2006.230.00:32:51.10#ibcon#about to read 3, iclass 10, count 0 2006.230.00:32:51.12#ibcon#read 3, iclass 10, count 0 2006.230.00:32:51.12#ibcon#about to read 4, iclass 10, count 0 2006.230.00:32:51.12#ibcon#read 4, iclass 10, count 0 2006.230.00:32:51.12#ibcon#about to read 5, iclass 10, count 0 2006.230.00:32:51.12#ibcon#read 5, iclass 10, count 0 2006.230.00:32:51.12#ibcon#about to read 6, iclass 10, count 0 2006.230.00:32:51.12#ibcon#read 6, iclass 10, count 0 2006.230.00:32:51.12#ibcon#end of sib2, iclass 10, count 0 2006.230.00:32:51.12#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:32:51.12#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:32:51.12#ibcon#[27=USB\r\n] 2006.230.00:32:51.12#ibcon#*before write, iclass 10, count 0 2006.230.00:32:51.12#ibcon#enter sib2, iclass 10, count 0 2006.230.00:32:51.12#ibcon#flushed, iclass 10, count 0 2006.230.00:32:51.12#ibcon#about to write, iclass 10, count 0 2006.230.00:32:51.12#ibcon#wrote, iclass 10, count 0 2006.230.00:32:51.12#ibcon#about to read 3, iclass 10, count 0 2006.230.00:32:51.15#ibcon#read 3, iclass 10, count 0 2006.230.00:32:51.15#ibcon#about to read 4, iclass 10, count 0 2006.230.00:32:51.15#ibcon#read 4, iclass 10, count 0 2006.230.00:32:51.15#ibcon#about to read 5, iclass 10, count 0 2006.230.00:32:51.15#ibcon#read 5, iclass 10, count 0 2006.230.00:32:51.15#ibcon#about to read 6, iclass 10, count 0 2006.230.00:32:51.15#ibcon#read 6, iclass 10, count 0 2006.230.00:32:51.15#ibcon#end of sib2, iclass 10, count 0 2006.230.00:32:51.15#ibcon#*after write, iclass 10, count 0 2006.230.00:32:51.15#ibcon#*before return 0, iclass 10, count 0 2006.230.00:32:51.15#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:32:51.15#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.00:32:51.15#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:32:51.15#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:32:51.15$vck44/vblo=2,634.99 2006.230.00:32:51.15#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.00:32:51.15#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.00:32:51.15#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:51.15#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:51.15#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:51.15#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:51.15#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:32:51.15#ibcon#first serial, iclass 12, count 0 2006.230.00:32:51.15#ibcon#enter sib2, iclass 12, count 0 2006.230.00:32:51.15#ibcon#flushed, iclass 12, count 0 2006.230.00:32:51.15#ibcon#about to write, iclass 12, count 0 2006.230.00:32:51.15#ibcon#wrote, iclass 12, count 0 2006.230.00:32:51.15#ibcon#about to read 3, iclass 12, count 0 2006.230.00:32:51.17#ibcon#read 3, iclass 12, count 0 2006.230.00:32:51.17#ibcon#about to read 4, iclass 12, count 0 2006.230.00:32:51.17#ibcon#read 4, iclass 12, count 0 2006.230.00:32:51.17#ibcon#about to read 5, iclass 12, count 0 2006.230.00:32:51.17#ibcon#read 5, iclass 12, count 0 2006.230.00:32:51.17#ibcon#about to read 6, iclass 12, count 0 2006.230.00:32:51.17#ibcon#read 6, iclass 12, count 0 2006.230.00:32:51.17#ibcon#end of sib2, iclass 12, count 0 2006.230.00:32:51.17#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:32:51.17#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:32:51.17#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:32:51.17#ibcon#*before write, iclass 12, count 0 2006.230.00:32:51.17#ibcon#enter sib2, iclass 12, count 0 2006.230.00:32:51.17#ibcon#flushed, iclass 12, count 0 2006.230.00:32:51.17#ibcon#about to write, iclass 12, count 0 2006.230.00:32:51.17#ibcon#wrote, iclass 12, count 0 2006.230.00:32:51.17#ibcon#about to read 3, iclass 12, count 0 2006.230.00:32:51.21#ibcon#read 3, iclass 12, count 0 2006.230.00:32:51.21#ibcon#about to read 4, iclass 12, count 0 2006.230.00:32:51.21#ibcon#read 4, iclass 12, count 0 2006.230.00:32:51.21#ibcon#about to read 5, iclass 12, count 0 2006.230.00:32:51.21#ibcon#read 5, iclass 12, count 0 2006.230.00:32:51.21#ibcon#about to read 6, iclass 12, count 0 2006.230.00:32:51.21#ibcon#read 6, iclass 12, count 0 2006.230.00:32:51.21#ibcon#end of sib2, iclass 12, count 0 2006.230.00:32:51.21#ibcon#*after write, iclass 12, count 0 2006.230.00:32:51.21#ibcon#*before return 0, iclass 12, count 0 2006.230.00:32:51.21#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:51.21#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.00:32:51.21#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:32:51.21#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:32:51.21$vck44/vb=2,4 2006.230.00:32:51.21#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.00:32:51.21#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.00:32:51.21#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:51.21#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:51.27#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:51.27#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:51.27#ibcon#enter wrdev, iclass 14, count 2 2006.230.00:32:51.27#ibcon#first serial, iclass 14, count 2 2006.230.00:32:51.27#ibcon#enter sib2, iclass 14, count 2 2006.230.00:32:51.27#ibcon#flushed, iclass 14, count 2 2006.230.00:32:51.27#ibcon#about to write, iclass 14, count 2 2006.230.00:32:51.27#ibcon#wrote, iclass 14, count 2 2006.230.00:32:51.27#ibcon#about to read 3, iclass 14, count 2 2006.230.00:32:51.29#ibcon#read 3, iclass 14, count 2 2006.230.00:32:51.29#ibcon#about to read 4, iclass 14, count 2 2006.230.00:32:51.29#ibcon#read 4, iclass 14, count 2 2006.230.00:32:51.29#ibcon#about to read 5, iclass 14, count 2 2006.230.00:32:51.29#ibcon#read 5, iclass 14, count 2 2006.230.00:32:51.29#ibcon#about to read 6, iclass 14, count 2 2006.230.00:32:51.29#ibcon#read 6, iclass 14, count 2 2006.230.00:32:51.29#ibcon#end of sib2, iclass 14, count 2 2006.230.00:32:51.29#ibcon#*mode == 0, iclass 14, count 2 2006.230.00:32:51.29#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.00:32:51.29#ibcon#[27=AT02-04\r\n] 2006.230.00:32:51.29#ibcon#*before write, iclass 14, count 2 2006.230.00:32:51.29#ibcon#enter sib2, iclass 14, count 2 2006.230.00:32:51.29#ibcon#flushed, iclass 14, count 2 2006.230.00:32:51.29#ibcon#about to write, iclass 14, count 2 2006.230.00:32:51.29#ibcon#wrote, iclass 14, count 2 2006.230.00:32:51.29#ibcon#about to read 3, iclass 14, count 2 2006.230.00:32:51.32#ibcon#read 3, iclass 14, count 2 2006.230.00:32:51.32#ibcon#about to read 4, iclass 14, count 2 2006.230.00:32:51.32#ibcon#read 4, iclass 14, count 2 2006.230.00:32:51.32#ibcon#about to read 5, iclass 14, count 2 2006.230.00:32:51.32#ibcon#read 5, iclass 14, count 2 2006.230.00:32:51.32#ibcon#about to read 6, iclass 14, count 2 2006.230.00:32:51.32#ibcon#read 6, iclass 14, count 2 2006.230.00:32:51.32#ibcon#end of sib2, iclass 14, count 2 2006.230.00:32:51.32#ibcon#*after write, iclass 14, count 2 2006.230.00:32:51.32#ibcon#*before return 0, iclass 14, count 2 2006.230.00:32:51.32#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:51.32#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.00:32:51.32#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.00:32:51.32#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:51.32#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:51.38#abcon#<5=/09 2.3 7.2 31.56 751002.8\r\n> 2006.230.00:32:51.40#abcon#{5=INTERFACE CLEAR} 2006.230.00:32:51.44#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:51.44#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:51.44#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:32:51.44#ibcon#first serial, iclass 14, count 0 2006.230.00:32:51.44#ibcon#enter sib2, iclass 14, count 0 2006.230.00:32:51.44#ibcon#flushed, iclass 14, count 0 2006.230.00:32:51.44#ibcon#about to write, iclass 14, count 0 2006.230.00:32:51.44#ibcon#wrote, iclass 14, count 0 2006.230.00:32:51.44#ibcon#about to read 3, iclass 14, count 0 2006.230.00:32:51.46#ibcon#read 3, iclass 14, count 0 2006.230.00:32:51.46#ibcon#about to read 4, iclass 14, count 0 2006.230.00:32:51.46#ibcon#read 4, iclass 14, count 0 2006.230.00:32:51.46#ibcon#about to read 5, iclass 14, count 0 2006.230.00:32:51.46#ibcon#read 5, iclass 14, count 0 2006.230.00:32:51.46#ibcon#about to read 6, iclass 14, count 0 2006.230.00:32:51.46#ibcon#read 6, iclass 14, count 0 2006.230.00:32:51.46#ibcon#end of sib2, iclass 14, count 0 2006.230.00:32:51.46#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:32:51.46#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:32:51.46#ibcon#[27=USB\r\n] 2006.230.00:32:51.46#ibcon#*before write, iclass 14, count 0 2006.230.00:32:51.46#ibcon#enter sib2, iclass 14, count 0 2006.230.00:32:51.46#ibcon#flushed, iclass 14, count 0 2006.230.00:32:51.46#ibcon#about to write, iclass 14, count 0 2006.230.00:32:51.46#ibcon#wrote, iclass 14, count 0 2006.230.00:32:51.46#ibcon#about to read 3, iclass 14, count 0 2006.230.00:32:51.46#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:32:51.49#ibcon#read 3, iclass 14, count 0 2006.230.00:32:51.49#ibcon#about to read 4, iclass 14, count 0 2006.230.00:32:51.49#ibcon#read 4, iclass 14, count 0 2006.230.00:32:51.49#ibcon#about to read 5, iclass 14, count 0 2006.230.00:32:51.49#ibcon#read 5, iclass 14, count 0 2006.230.00:32:51.49#ibcon#about to read 6, iclass 14, count 0 2006.230.00:32:51.49#ibcon#read 6, iclass 14, count 0 2006.230.00:32:51.49#ibcon#end of sib2, iclass 14, count 0 2006.230.00:32:51.49#ibcon#*after write, iclass 14, count 0 2006.230.00:32:51.49#ibcon#*before return 0, iclass 14, count 0 2006.230.00:32:51.49#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:51.49#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.00:32:51.49#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:32:51.49#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:32:51.49$vck44/vblo=3,649.99 2006.230.00:32:51.49#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.00:32:51.49#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.00:32:51.49#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:51.49#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:51.49#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:51.49#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:51.49#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:32:51.49#ibcon#first serial, iclass 20, count 0 2006.230.00:32:51.49#ibcon#enter sib2, iclass 20, count 0 2006.230.00:32:51.49#ibcon#flushed, iclass 20, count 0 2006.230.00:32:51.49#ibcon#about to write, iclass 20, count 0 2006.230.00:32:51.49#ibcon#wrote, iclass 20, count 0 2006.230.00:32:51.49#ibcon#about to read 3, iclass 20, count 0 2006.230.00:32:51.51#ibcon#read 3, iclass 20, count 0 2006.230.00:32:51.51#ibcon#about to read 4, iclass 20, count 0 2006.230.00:32:51.51#ibcon#read 4, iclass 20, count 0 2006.230.00:32:51.51#ibcon#about to read 5, iclass 20, count 0 2006.230.00:32:51.51#ibcon#read 5, iclass 20, count 0 2006.230.00:32:51.51#ibcon#about to read 6, iclass 20, count 0 2006.230.00:32:51.51#ibcon#read 6, iclass 20, count 0 2006.230.00:32:51.51#ibcon#end of sib2, iclass 20, count 0 2006.230.00:32:51.51#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:32:51.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:32:51.51#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:32:51.51#ibcon#*before write, iclass 20, count 0 2006.230.00:32:51.51#ibcon#enter sib2, iclass 20, count 0 2006.230.00:32:51.51#ibcon#flushed, iclass 20, count 0 2006.230.00:32:51.51#ibcon#about to write, iclass 20, count 0 2006.230.00:32:51.51#ibcon#wrote, iclass 20, count 0 2006.230.00:32:51.51#ibcon#about to read 3, iclass 20, count 0 2006.230.00:32:51.55#ibcon#read 3, iclass 20, count 0 2006.230.00:32:51.55#ibcon#about to read 4, iclass 20, count 0 2006.230.00:32:51.55#ibcon#read 4, iclass 20, count 0 2006.230.00:32:51.55#ibcon#about to read 5, iclass 20, count 0 2006.230.00:32:51.55#ibcon#read 5, iclass 20, count 0 2006.230.00:32:51.55#ibcon#about to read 6, iclass 20, count 0 2006.230.00:32:51.55#ibcon#read 6, iclass 20, count 0 2006.230.00:32:51.55#ibcon#end of sib2, iclass 20, count 0 2006.230.00:32:51.55#ibcon#*after write, iclass 20, count 0 2006.230.00:32:51.55#ibcon#*before return 0, iclass 20, count 0 2006.230.00:32:51.55#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:51.55#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:32:51.55#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:32:51.55#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:32:51.55$vck44/vb=3,4 2006.230.00:32:51.55#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.00:32:51.55#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.00:32:51.55#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:51.55#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:51.61#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:51.61#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:51.61#ibcon#enter wrdev, iclass 22, count 2 2006.230.00:32:51.61#ibcon#first serial, iclass 22, count 2 2006.230.00:32:51.61#ibcon#enter sib2, iclass 22, count 2 2006.230.00:32:51.61#ibcon#flushed, iclass 22, count 2 2006.230.00:32:51.61#ibcon#about to write, iclass 22, count 2 2006.230.00:32:51.61#ibcon#wrote, iclass 22, count 2 2006.230.00:32:51.61#ibcon#about to read 3, iclass 22, count 2 2006.230.00:32:51.63#ibcon#read 3, iclass 22, count 2 2006.230.00:32:51.63#ibcon#about to read 4, iclass 22, count 2 2006.230.00:32:51.63#ibcon#read 4, iclass 22, count 2 2006.230.00:32:51.63#ibcon#about to read 5, iclass 22, count 2 2006.230.00:32:51.63#ibcon#read 5, iclass 22, count 2 2006.230.00:32:51.63#ibcon#about to read 6, iclass 22, count 2 2006.230.00:32:51.63#ibcon#read 6, iclass 22, count 2 2006.230.00:32:51.63#ibcon#end of sib2, iclass 22, count 2 2006.230.00:32:51.63#ibcon#*mode == 0, iclass 22, count 2 2006.230.00:32:51.63#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.00:32:51.63#ibcon#[27=AT03-04\r\n] 2006.230.00:32:51.63#ibcon#*before write, iclass 22, count 2 2006.230.00:32:51.63#ibcon#enter sib2, iclass 22, count 2 2006.230.00:32:51.63#ibcon#flushed, iclass 22, count 2 2006.230.00:32:51.63#ibcon#about to write, iclass 22, count 2 2006.230.00:32:51.63#ibcon#wrote, iclass 22, count 2 2006.230.00:32:51.63#ibcon#about to read 3, iclass 22, count 2 2006.230.00:32:51.66#ibcon#read 3, iclass 22, count 2 2006.230.00:32:51.66#ibcon#about to read 4, iclass 22, count 2 2006.230.00:32:51.66#ibcon#read 4, iclass 22, count 2 2006.230.00:32:51.66#ibcon#about to read 5, iclass 22, count 2 2006.230.00:32:51.66#ibcon#read 5, iclass 22, count 2 2006.230.00:32:51.66#ibcon#about to read 6, iclass 22, count 2 2006.230.00:32:51.66#ibcon#read 6, iclass 22, count 2 2006.230.00:32:51.66#ibcon#end of sib2, iclass 22, count 2 2006.230.00:32:51.66#ibcon#*after write, iclass 22, count 2 2006.230.00:32:51.66#ibcon#*before return 0, iclass 22, count 2 2006.230.00:32:51.66#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:51.66#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.00:32:51.66#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.00:32:51.66#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:51.66#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:51.78#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:51.78#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:51.78#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:32:51.78#ibcon#first serial, iclass 22, count 0 2006.230.00:32:51.78#ibcon#enter sib2, iclass 22, count 0 2006.230.00:32:51.78#ibcon#flushed, iclass 22, count 0 2006.230.00:32:51.78#ibcon#about to write, iclass 22, count 0 2006.230.00:32:51.78#ibcon#wrote, iclass 22, count 0 2006.230.00:32:51.78#ibcon#about to read 3, iclass 22, count 0 2006.230.00:32:51.80#ibcon#read 3, iclass 22, count 0 2006.230.00:32:51.80#ibcon#about to read 4, iclass 22, count 0 2006.230.00:32:51.80#ibcon#read 4, iclass 22, count 0 2006.230.00:32:51.80#ibcon#about to read 5, iclass 22, count 0 2006.230.00:32:51.80#ibcon#read 5, iclass 22, count 0 2006.230.00:32:51.80#ibcon#about to read 6, iclass 22, count 0 2006.230.00:32:51.80#ibcon#read 6, iclass 22, count 0 2006.230.00:32:51.80#ibcon#end of sib2, iclass 22, count 0 2006.230.00:32:51.80#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:32:51.80#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:32:51.80#ibcon#[27=USB\r\n] 2006.230.00:32:51.80#ibcon#*before write, iclass 22, count 0 2006.230.00:32:51.80#ibcon#enter sib2, iclass 22, count 0 2006.230.00:32:51.80#ibcon#flushed, iclass 22, count 0 2006.230.00:32:51.80#ibcon#about to write, iclass 22, count 0 2006.230.00:32:51.80#ibcon#wrote, iclass 22, count 0 2006.230.00:32:51.80#ibcon#about to read 3, iclass 22, count 0 2006.230.00:32:51.83#ibcon#read 3, iclass 22, count 0 2006.230.00:32:51.83#ibcon#about to read 4, iclass 22, count 0 2006.230.00:32:51.83#ibcon#read 4, iclass 22, count 0 2006.230.00:32:51.83#ibcon#about to read 5, iclass 22, count 0 2006.230.00:32:51.83#ibcon#read 5, iclass 22, count 0 2006.230.00:32:51.83#ibcon#about to read 6, iclass 22, count 0 2006.230.00:32:51.83#ibcon#read 6, iclass 22, count 0 2006.230.00:32:51.83#ibcon#end of sib2, iclass 22, count 0 2006.230.00:32:51.83#ibcon#*after write, iclass 22, count 0 2006.230.00:32:51.83#ibcon#*before return 0, iclass 22, count 0 2006.230.00:32:51.83#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:51.83#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.00:32:51.83#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:32:51.83#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:32:51.83$vck44/vblo=4,679.99 2006.230.00:32:51.83#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.00:32:51.83#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.00:32:51.83#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:51.83#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:51.83#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:51.83#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:51.83#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:32:51.83#ibcon#first serial, iclass 24, count 0 2006.230.00:32:51.83#ibcon#enter sib2, iclass 24, count 0 2006.230.00:32:51.83#ibcon#flushed, iclass 24, count 0 2006.230.00:32:51.83#ibcon#about to write, iclass 24, count 0 2006.230.00:32:51.83#ibcon#wrote, iclass 24, count 0 2006.230.00:32:51.83#ibcon#about to read 3, iclass 24, count 0 2006.230.00:32:51.85#ibcon#read 3, iclass 24, count 0 2006.230.00:32:51.85#ibcon#about to read 4, iclass 24, count 0 2006.230.00:32:51.85#ibcon#read 4, iclass 24, count 0 2006.230.00:32:51.85#ibcon#about to read 5, iclass 24, count 0 2006.230.00:32:51.85#ibcon#read 5, iclass 24, count 0 2006.230.00:32:51.85#ibcon#about to read 6, iclass 24, count 0 2006.230.00:32:51.85#ibcon#read 6, iclass 24, count 0 2006.230.00:32:51.85#ibcon#end of sib2, iclass 24, count 0 2006.230.00:32:51.85#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:32:51.85#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:32:51.85#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:32:51.85#ibcon#*before write, iclass 24, count 0 2006.230.00:32:51.85#ibcon#enter sib2, iclass 24, count 0 2006.230.00:32:51.85#ibcon#flushed, iclass 24, count 0 2006.230.00:32:51.85#ibcon#about to write, iclass 24, count 0 2006.230.00:32:51.85#ibcon#wrote, iclass 24, count 0 2006.230.00:32:51.85#ibcon#about to read 3, iclass 24, count 0 2006.230.00:32:51.89#ibcon#read 3, iclass 24, count 0 2006.230.00:32:51.89#ibcon#about to read 4, iclass 24, count 0 2006.230.00:32:51.89#ibcon#read 4, iclass 24, count 0 2006.230.00:32:51.89#ibcon#about to read 5, iclass 24, count 0 2006.230.00:32:51.89#ibcon#read 5, iclass 24, count 0 2006.230.00:32:51.89#ibcon#about to read 6, iclass 24, count 0 2006.230.00:32:51.89#ibcon#read 6, iclass 24, count 0 2006.230.00:32:51.89#ibcon#end of sib2, iclass 24, count 0 2006.230.00:32:51.89#ibcon#*after write, iclass 24, count 0 2006.230.00:32:51.89#ibcon#*before return 0, iclass 24, count 0 2006.230.00:32:51.89#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:51.89#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.00:32:51.89#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:32:51.89#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:32:51.89$vck44/vb=4,4 2006.230.00:32:51.89#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.00:32:51.89#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.00:32:51.89#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:51.89#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:51.95#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:51.95#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:51.95#ibcon#enter wrdev, iclass 26, count 2 2006.230.00:32:51.95#ibcon#first serial, iclass 26, count 2 2006.230.00:32:51.95#ibcon#enter sib2, iclass 26, count 2 2006.230.00:32:51.95#ibcon#flushed, iclass 26, count 2 2006.230.00:32:51.95#ibcon#about to write, iclass 26, count 2 2006.230.00:32:51.95#ibcon#wrote, iclass 26, count 2 2006.230.00:32:51.95#ibcon#about to read 3, iclass 26, count 2 2006.230.00:32:51.97#ibcon#read 3, iclass 26, count 2 2006.230.00:32:51.97#ibcon#about to read 4, iclass 26, count 2 2006.230.00:32:51.97#ibcon#read 4, iclass 26, count 2 2006.230.00:32:51.97#ibcon#about to read 5, iclass 26, count 2 2006.230.00:32:51.97#ibcon#read 5, iclass 26, count 2 2006.230.00:32:51.97#ibcon#about to read 6, iclass 26, count 2 2006.230.00:32:51.97#ibcon#read 6, iclass 26, count 2 2006.230.00:32:51.97#ibcon#end of sib2, iclass 26, count 2 2006.230.00:32:51.97#ibcon#*mode == 0, iclass 26, count 2 2006.230.00:32:51.97#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.00:32:51.97#ibcon#[27=AT04-04\r\n] 2006.230.00:32:51.97#ibcon#*before write, iclass 26, count 2 2006.230.00:32:51.97#ibcon#enter sib2, iclass 26, count 2 2006.230.00:32:51.97#ibcon#flushed, iclass 26, count 2 2006.230.00:32:51.97#ibcon#about to write, iclass 26, count 2 2006.230.00:32:51.97#ibcon#wrote, iclass 26, count 2 2006.230.00:32:51.97#ibcon#about to read 3, iclass 26, count 2 2006.230.00:32:52.00#ibcon#read 3, iclass 26, count 2 2006.230.00:32:52.00#ibcon#about to read 4, iclass 26, count 2 2006.230.00:32:52.00#ibcon#read 4, iclass 26, count 2 2006.230.00:32:52.00#ibcon#about to read 5, iclass 26, count 2 2006.230.00:32:52.00#ibcon#read 5, iclass 26, count 2 2006.230.00:32:52.00#ibcon#about to read 6, iclass 26, count 2 2006.230.00:32:52.00#ibcon#read 6, iclass 26, count 2 2006.230.00:32:52.00#ibcon#end of sib2, iclass 26, count 2 2006.230.00:32:52.00#ibcon#*after write, iclass 26, count 2 2006.230.00:32:52.00#ibcon#*before return 0, iclass 26, count 2 2006.230.00:32:52.00#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:52.00#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.00:32:52.00#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.00:32:52.00#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:52.00#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:52.12#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:52.12#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:52.12#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:32:52.12#ibcon#first serial, iclass 26, count 0 2006.230.00:32:52.12#ibcon#enter sib2, iclass 26, count 0 2006.230.00:32:52.12#ibcon#flushed, iclass 26, count 0 2006.230.00:32:52.12#ibcon#about to write, iclass 26, count 0 2006.230.00:32:52.12#ibcon#wrote, iclass 26, count 0 2006.230.00:32:52.12#ibcon#about to read 3, iclass 26, count 0 2006.230.00:32:52.14#ibcon#read 3, iclass 26, count 0 2006.230.00:32:52.14#ibcon#about to read 4, iclass 26, count 0 2006.230.00:32:52.14#ibcon#read 4, iclass 26, count 0 2006.230.00:32:52.14#ibcon#about to read 5, iclass 26, count 0 2006.230.00:32:52.14#ibcon#read 5, iclass 26, count 0 2006.230.00:32:52.14#ibcon#about to read 6, iclass 26, count 0 2006.230.00:32:52.14#ibcon#read 6, iclass 26, count 0 2006.230.00:32:52.14#ibcon#end of sib2, iclass 26, count 0 2006.230.00:32:52.14#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:32:52.14#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:32:52.14#ibcon#[27=USB\r\n] 2006.230.00:32:52.14#ibcon#*before write, iclass 26, count 0 2006.230.00:32:52.14#ibcon#enter sib2, iclass 26, count 0 2006.230.00:32:52.14#ibcon#flushed, iclass 26, count 0 2006.230.00:32:52.14#ibcon#about to write, iclass 26, count 0 2006.230.00:32:52.14#ibcon#wrote, iclass 26, count 0 2006.230.00:32:52.14#ibcon#about to read 3, iclass 26, count 0 2006.230.00:32:52.17#ibcon#read 3, iclass 26, count 0 2006.230.00:32:52.17#ibcon#about to read 4, iclass 26, count 0 2006.230.00:32:52.17#ibcon#read 4, iclass 26, count 0 2006.230.00:32:52.17#ibcon#about to read 5, iclass 26, count 0 2006.230.00:32:52.17#ibcon#read 5, iclass 26, count 0 2006.230.00:32:52.17#ibcon#about to read 6, iclass 26, count 0 2006.230.00:32:52.17#ibcon#read 6, iclass 26, count 0 2006.230.00:32:52.17#ibcon#end of sib2, iclass 26, count 0 2006.230.00:32:52.17#ibcon#*after write, iclass 26, count 0 2006.230.00:32:52.17#ibcon#*before return 0, iclass 26, count 0 2006.230.00:32:52.17#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:52.17#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.00:32:52.17#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:32:52.17#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:32:52.17$vck44/vblo=5,709.99 2006.230.00:32:52.17#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.00:32:52.17#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.00:32:52.17#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:52.17#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:52.17#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:52.17#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:52.17#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:32:52.17#ibcon#first serial, iclass 28, count 0 2006.230.00:32:52.17#ibcon#enter sib2, iclass 28, count 0 2006.230.00:32:52.17#ibcon#flushed, iclass 28, count 0 2006.230.00:32:52.17#ibcon#about to write, iclass 28, count 0 2006.230.00:32:52.17#ibcon#wrote, iclass 28, count 0 2006.230.00:32:52.17#ibcon#about to read 3, iclass 28, count 0 2006.230.00:32:52.19#ibcon#read 3, iclass 28, count 0 2006.230.00:32:52.19#ibcon#about to read 4, iclass 28, count 0 2006.230.00:32:52.19#ibcon#read 4, iclass 28, count 0 2006.230.00:32:52.19#ibcon#about to read 5, iclass 28, count 0 2006.230.00:32:52.19#ibcon#read 5, iclass 28, count 0 2006.230.00:32:52.19#ibcon#about to read 6, iclass 28, count 0 2006.230.00:32:52.19#ibcon#read 6, iclass 28, count 0 2006.230.00:32:52.19#ibcon#end of sib2, iclass 28, count 0 2006.230.00:32:52.19#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:32:52.19#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:32:52.19#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:32:52.19#ibcon#*before write, iclass 28, count 0 2006.230.00:32:52.19#ibcon#enter sib2, iclass 28, count 0 2006.230.00:32:52.19#ibcon#flushed, iclass 28, count 0 2006.230.00:32:52.19#ibcon#about to write, iclass 28, count 0 2006.230.00:32:52.19#ibcon#wrote, iclass 28, count 0 2006.230.00:32:52.19#ibcon#about to read 3, iclass 28, count 0 2006.230.00:32:52.23#ibcon#read 3, iclass 28, count 0 2006.230.00:32:52.23#ibcon#about to read 4, iclass 28, count 0 2006.230.00:32:52.23#ibcon#read 4, iclass 28, count 0 2006.230.00:32:52.23#ibcon#about to read 5, iclass 28, count 0 2006.230.00:32:52.23#ibcon#read 5, iclass 28, count 0 2006.230.00:32:52.23#ibcon#about to read 6, iclass 28, count 0 2006.230.00:32:52.23#ibcon#read 6, iclass 28, count 0 2006.230.00:32:52.23#ibcon#end of sib2, iclass 28, count 0 2006.230.00:32:52.23#ibcon#*after write, iclass 28, count 0 2006.230.00:32:52.23#ibcon#*before return 0, iclass 28, count 0 2006.230.00:32:52.23#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:52.23#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.00:32:52.23#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:32:52.23#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:32:52.23$vck44/vb=5,4 2006.230.00:32:52.23#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.00:32:52.23#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.00:32:52.23#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:52.23#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:52.29#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:52.29#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:52.29#ibcon#enter wrdev, iclass 30, count 2 2006.230.00:32:52.29#ibcon#first serial, iclass 30, count 2 2006.230.00:32:52.29#ibcon#enter sib2, iclass 30, count 2 2006.230.00:32:52.29#ibcon#flushed, iclass 30, count 2 2006.230.00:32:52.29#ibcon#about to write, iclass 30, count 2 2006.230.00:32:52.29#ibcon#wrote, iclass 30, count 2 2006.230.00:32:52.29#ibcon#about to read 3, iclass 30, count 2 2006.230.00:32:52.31#ibcon#read 3, iclass 30, count 2 2006.230.00:32:52.31#ibcon#about to read 4, iclass 30, count 2 2006.230.00:32:52.31#ibcon#read 4, iclass 30, count 2 2006.230.00:32:52.31#ibcon#about to read 5, iclass 30, count 2 2006.230.00:32:52.31#ibcon#read 5, iclass 30, count 2 2006.230.00:32:52.31#ibcon#about to read 6, iclass 30, count 2 2006.230.00:32:52.31#ibcon#read 6, iclass 30, count 2 2006.230.00:32:52.31#ibcon#end of sib2, iclass 30, count 2 2006.230.00:32:52.31#ibcon#*mode == 0, iclass 30, count 2 2006.230.00:32:52.31#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.00:32:52.31#ibcon#[27=AT05-04\r\n] 2006.230.00:32:52.31#ibcon#*before write, iclass 30, count 2 2006.230.00:32:52.31#ibcon#enter sib2, iclass 30, count 2 2006.230.00:32:52.31#ibcon#flushed, iclass 30, count 2 2006.230.00:32:52.31#ibcon#about to write, iclass 30, count 2 2006.230.00:32:52.31#ibcon#wrote, iclass 30, count 2 2006.230.00:32:52.31#ibcon#about to read 3, iclass 30, count 2 2006.230.00:32:52.34#ibcon#read 3, iclass 30, count 2 2006.230.00:32:52.34#ibcon#about to read 4, iclass 30, count 2 2006.230.00:32:52.34#ibcon#read 4, iclass 30, count 2 2006.230.00:32:52.34#ibcon#about to read 5, iclass 30, count 2 2006.230.00:32:52.34#ibcon#read 5, iclass 30, count 2 2006.230.00:32:52.34#ibcon#about to read 6, iclass 30, count 2 2006.230.00:32:52.34#ibcon#read 6, iclass 30, count 2 2006.230.00:32:52.34#ibcon#end of sib2, iclass 30, count 2 2006.230.00:32:52.34#ibcon#*after write, iclass 30, count 2 2006.230.00:32:52.34#ibcon#*before return 0, iclass 30, count 2 2006.230.00:32:52.34#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:52.34#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:32:52.34#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.00:32:52.34#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:52.34#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:52.46#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:52.46#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:52.46#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:32:52.46#ibcon#first serial, iclass 30, count 0 2006.230.00:32:52.46#ibcon#enter sib2, iclass 30, count 0 2006.230.00:32:52.46#ibcon#flushed, iclass 30, count 0 2006.230.00:32:52.46#ibcon#about to write, iclass 30, count 0 2006.230.00:32:52.46#ibcon#wrote, iclass 30, count 0 2006.230.00:32:52.46#ibcon#about to read 3, iclass 30, count 0 2006.230.00:32:52.48#ibcon#read 3, iclass 30, count 0 2006.230.00:32:52.48#ibcon#about to read 4, iclass 30, count 0 2006.230.00:32:52.48#ibcon#read 4, iclass 30, count 0 2006.230.00:32:52.48#ibcon#about to read 5, iclass 30, count 0 2006.230.00:32:52.48#ibcon#read 5, iclass 30, count 0 2006.230.00:32:52.48#ibcon#about to read 6, iclass 30, count 0 2006.230.00:32:52.48#ibcon#read 6, iclass 30, count 0 2006.230.00:32:52.48#ibcon#end of sib2, iclass 30, count 0 2006.230.00:32:52.48#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:32:52.48#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:32:52.48#ibcon#[27=USB\r\n] 2006.230.00:32:52.48#ibcon#*before write, iclass 30, count 0 2006.230.00:32:52.48#ibcon#enter sib2, iclass 30, count 0 2006.230.00:32:52.48#ibcon#flushed, iclass 30, count 0 2006.230.00:32:52.48#ibcon#about to write, iclass 30, count 0 2006.230.00:32:52.48#ibcon#wrote, iclass 30, count 0 2006.230.00:32:52.48#ibcon#about to read 3, iclass 30, count 0 2006.230.00:32:52.51#ibcon#read 3, iclass 30, count 0 2006.230.00:32:52.51#ibcon#about to read 4, iclass 30, count 0 2006.230.00:32:52.51#ibcon#read 4, iclass 30, count 0 2006.230.00:32:52.51#ibcon#about to read 5, iclass 30, count 0 2006.230.00:32:52.51#ibcon#read 5, iclass 30, count 0 2006.230.00:32:52.51#ibcon#about to read 6, iclass 30, count 0 2006.230.00:32:52.51#ibcon#read 6, iclass 30, count 0 2006.230.00:32:52.51#ibcon#end of sib2, iclass 30, count 0 2006.230.00:32:52.51#ibcon#*after write, iclass 30, count 0 2006.230.00:32:52.51#ibcon#*before return 0, iclass 30, count 0 2006.230.00:32:52.51#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:52.51#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:32:52.51#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:32:52.51#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:32:52.51$vck44/vblo=6,719.99 2006.230.00:32:52.51#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.00:32:52.51#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.00:32:52.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:52.51#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:52.51#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:52.51#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:52.51#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:32:52.51#ibcon#first serial, iclass 32, count 0 2006.230.00:32:52.51#ibcon#enter sib2, iclass 32, count 0 2006.230.00:32:52.51#ibcon#flushed, iclass 32, count 0 2006.230.00:32:52.51#ibcon#about to write, iclass 32, count 0 2006.230.00:32:52.51#ibcon#wrote, iclass 32, count 0 2006.230.00:32:52.51#ibcon#about to read 3, iclass 32, count 0 2006.230.00:32:52.53#ibcon#read 3, iclass 32, count 0 2006.230.00:32:52.53#ibcon#about to read 4, iclass 32, count 0 2006.230.00:32:52.53#ibcon#read 4, iclass 32, count 0 2006.230.00:32:52.53#ibcon#about to read 5, iclass 32, count 0 2006.230.00:32:52.53#ibcon#read 5, iclass 32, count 0 2006.230.00:32:52.53#ibcon#about to read 6, iclass 32, count 0 2006.230.00:32:52.53#ibcon#read 6, iclass 32, count 0 2006.230.00:32:52.53#ibcon#end of sib2, iclass 32, count 0 2006.230.00:32:52.53#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:32:52.53#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:32:52.53#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:32:52.53#ibcon#*before write, iclass 32, count 0 2006.230.00:32:52.53#ibcon#enter sib2, iclass 32, count 0 2006.230.00:32:52.53#ibcon#flushed, iclass 32, count 0 2006.230.00:32:52.53#ibcon#about to write, iclass 32, count 0 2006.230.00:32:52.53#ibcon#wrote, iclass 32, count 0 2006.230.00:32:52.53#ibcon#about to read 3, iclass 32, count 0 2006.230.00:32:52.57#ibcon#read 3, iclass 32, count 0 2006.230.00:32:52.57#ibcon#about to read 4, iclass 32, count 0 2006.230.00:32:52.57#ibcon#read 4, iclass 32, count 0 2006.230.00:32:52.57#ibcon#about to read 5, iclass 32, count 0 2006.230.00:32:52.57#ibcon#read 5, iclass 32, count 0 2006.230.00:32:52.57#ibcon#about to read 6, iclass 32, count 0 2006.230.00:32:52.57#ibcon#read 6, iclass 32, count 0 2006.230.00:32:52.57#ibcon#end of sib2, iclass 32, count 0 2006.230.00:32:52.57#ibcon#*after write, iclass 32, count 0 2006.230.00:32:52.57#ibcon#*before return 0, iclass 32, count 0 2006.230.00:32:52.57#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:52.57#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.00:32:52.57#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:32:52.57#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:32:52.57$vck44/vb=6,4 2006.230.00:32:52.57#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.00:32:52.57#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.00:32:52.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:52.57#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:52.63#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:52.63#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:52.63#ibcon#enter wrdev, iclass 34, count 2 2006.230.00:32:52.63#ibcon#first serial, iclass 34, count 2 2006.230.00:32:52.63#ibcon#enter sib2, iclass 34, count 2 2006.230.00:32:52.63#ibcon#flushed, iclass 34, count 2 2006.230.00:32:52.63#ibcon#about to write, iclass 34, count 2 2006.230.00:32:52.63#ibcon#wrote, iclass 34, count 2 2006.230.00:32:52.63#ibcon#about to read 3, iclass 34, count 2 2006.230.00:32:52.65#ibcon#read 3, iclass 34, count 2 2006.230.00:32:52.65#ibcon#about to read 4, iclass 34, count 2 2006.230.00:32:52.65#ibcon#read 4, iclass 34, count 2 2006.230.00:32:52.65#ibcon#about to read 5, iclass 34, count 2 2006.230.00:32:52.65#ibcon#read 5, iclass 34, count 2 2006.230.00:32:52.65#ibcon#about to read 6, iclass 34, count 2 2006.230.00:32:52.65#ibcon#read 6, iclass 34, count 2 2006.230.00:32:52.65#ibcon#end of sib2, iclass 34, count 2 2006.230.00:32:52.65#ibcon#*mode == 0, iclass 34, count 2 2006.230.00:32:52.65#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.00:32:52.65#ibcon#[27=AT06-04\r\n] 2006.230.00:32:52.65#ibcon#*before write, iclass 34, count 2 2006.230.00:32:52.65#ibcon#enter sib2, iclass 34, count 2 2006.230.00:32:52.65#ibcon#flushed, iclass 34, count 2 2006.230.00:32:52.65#ibcon#about to write, iclass 34, count 2 2006.230.00:32:52.65#ibcon#wrote, iclass 34, count 2 2006.230.00:32:52.65#ibcon#about to read 3, iclass 34, count 2 2006.230.00:32:52.68#ibcon#read 3, iclass 34, count 2 2006.230.00:32:52.68#ibcon#about to read 4, iclass 34, count 2 2006.230.00:32:52.68#ibcon#read 4, iclass 34, count 2 2006.230.00:32:52.68#ibcon#about to read 5, iclass 34, count 2 2006.230.00:32:52.68#ibcon#read 5, iclass 34, count 2 2006.230.00:32:52.68#ibcon#about to read 6, iclass 34, count 2 2006.230.00:32:52.68#ibcon#read 6, iclass 34, count 2 2006.230.00:32:52.68#ibcon#end of sib2, iclass 34, count 2 2006.230.00:32:52.68#ibcon#*after write, iclass 34, count 2 2006.230.00:32:52.68#ibcon#*before return 0, iclass 34, count 2 2006.230.00:32:52.68#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:52.68#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.00:32:52.68#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.00:32:52.68#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:52.68#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:52.80#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:52.80#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:52.80#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:32:52.80#ibcon#first serial, iclass 34, count 0 2006.230.00:32:52.80#ibcon#enter sib2, iclass 34, count 0 2006.230.00:32:52.80#ibcon#flushed, iclass 34, count 0 2006.230.00:32:52.80#ibcon#about to write, iclass 34, count 0 2006.230.00:32:52.80#ibcon#wrote, iclass 34, count 0 2006.230.00:32:52.80#ibcon#about to read 3, iclass 34, count 0 2006.230.00:32:52.82#ibcon#read 3, iclass 34, count 0 2006.230.00:32:52.82#ibcon#about to read 4, iclass 34, count 0 2006.230.00:32:52.82#ibcon#read 4, iclass 34, count 0 2006.230.00:32:52.82#ibcon#about to read 5, iclass 34, count 0 2006.230.00:32:52.82#ibcon#read 5, iclass 34, count 0 2006.230.00:32:52.82#ibcon#about to read 6, iclass 34, count 0 2006.230.00:32:52.82#ibcon#read 6, iclass 34, count 0 2006.230.00:32:52.82#ibcon#end of sib2, iclass 34, count 0 2006.230.00:32:52.82#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:32:52.82#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:32:52.82#ibcon#[27=USB\r\n] 2006.230.00:32:52.82#ibcon#*before write, iclass 34, count 0 2006.230.00:32:52.82#ibcon#enter sib2, iclass 34, count 0 2006.230.00:32:52.82#ibcon#flushed, iclass 34, count 0 2006.230.00:32:52.82#ibcon#about to write, iclass 34, count 0 2006.230.00:32:52.82#ibcon#wrote, iclass 34, count 0 2006.230.00:32:52.82#ibcon#about to read 3, iclass 34, count 0 2006.230.00:32:52.85#ibcon#read 3, iclass 34, count 0 2006.230.00:32:52.85#ibcon#about to read 4, iclass 34, count 0 2006.230.00:32:52.85#ibcon#read 4, iclass 34, count 0 2006.230.00:32:52.85#ibcon#about to read 5, iclass 34, count 0 2006.230.00:32:52.85#ibcon#read 5, iclass 34, count 0 2006.230.00:32:52.85#ibcon#about to read 6, iclass 34, count 0 2006.230.00:32:52.85#ibcon#read 6, iclass 34, count 0 2006.230.00:32:52.85#ibcon#end of sib2, iclass 34, count 0 2006.230.00:32:52.85#ibcon#*after write, iclass 34, count 0 2006.230.00:32:52.85#ibcon#*before return 0, iclass 34, count 0 2006.230.00:32:52.85#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:52.85#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.00:32:52.85#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:32:52.85#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:32:52.85$vck44/vblo=7,734.99 2006.230.00:32:52.85#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.00:32:52.85#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.00:32:52.85#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:52.85#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:52.85#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:52.85#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:52.85#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:32:52.85#ibcon#first serial, iclass 36, count 0 2006.230.00:32:52.85#ibcon#enter sib2, iclass 36, count 0 2006.230.00:32:52.85#ibcon#flushed, iclass 36, count 0 2006.230.00:32:52.85#ibcon#about to write, iclass 36, count 0 2006.230.00:32:52.85#ibcon#wrote, iclass 36, count 0 2006.230.00:32:52.85#ibcon#about to read 3, iclass 36, count 0 2006.230.00:32:52.87#ibcon#read 3, iclass 36, count 0 2006.230.00:32:52.87#ibcon#about to read 4, iclass 36, count 0 2006.230.00:32:52.87#ibcon#read 4, iclass 36, count 0 2006.230.00:32:52.87#ibcon#about to read 5, iclass 36, count 0 2006.230.00:32:52.87#ibcon#read 5, iclass 36, count 0 2006.230.00:32:52.87#ibcon#about to read 6, iclass 36, count 0 2006.230.00:32:52.87#ibcon#read 6, iclass 36, count 0 2006.230.00:32:52.87#ibcon#end of sib2, iclass 36, count 0 2006.230.00:32:52.87#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:32:52.87#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:32:52.87#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:32:52.87#ibcon#*before write, iclass 36, count 0 2006.230.00:32:52.87#ibcon#enter sib2, iclass 36, count 0 2006.230.00:32:52.87#ibcon#flushed, iclass 36, count 0 2006.230.00:32:52.87#ibcon#about to write, iclass 36, count 0 2006.230.00:32:52.87#ibcon#wrote, iclass 36, count 0 2006.230.00:32:52.87#ibcon#about to read 3, iclass 36, count 0 2006.230.00:32:52.91#ibcon#read 3, iclass 36, count 0 2006.230.00:32:52.91#ibcon#about to read 4, iclass 36, count 0 2006.230.00:32:52.91#ibcon#read 4, iclass 36, count 0 2006.230.00:32:52.91#ibcon#about to read 5, iclass 36, count 0 2006.230.00:32:52.91#ibcon#read 5, iclass 36, count 0 2006.230.00:32:52.91#ibcon#about to read 6, iclass 36, count 0 2006.230.00:32:52.91#ibcon#read 6, iclass 36, count 0 2006.230.00:32:52.91#ibcon#end of sib2, iclass 36, count 0 2006.230.00:32:52.91#ibcon#*after write, iclass 36, count 0 2006.230.00:32:52.91#ibcon#*before return 0, iclass 36, count 0 2006.230.00:32:52.91#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:52.91#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.00:32:52.91#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:32:52.91#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:32:52.91$vck44/vb=7,4 2006.230.00:32:52.91#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.00:32:52.91#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.00:32:52.91#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:52.91#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:52.97#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:52.97#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:52.97#ibcon#enter wrdev, iclass 38, count 2 2006.230.00:32:52.97#ibcon#first serial, iclass 38, count 2 2006.230.00:32:52.97#ibcon#enter sib2, iclass 38, count 2 2006.230.00:32:52.97#ibcon#flushed, iclass 38, count 2 2006.230.00:32:52.97#ibcon#about to write, iclass 38, count 2 2006.230.00:32:52.97#ibcon#wrote, iclass 38, count 2 2006.230.00:32:52.97#ibcon#about to read 3, iclass 38, count 2 2006.230.00:32:52.99#ibcon#read 3, iclass 38, count 2 2006.230.00:32:52.99#ibcon#about to read 4, iclass 38, count 2 2006.230.00:32:52.99#ibcon#read 4, iclass 38, count 2 2006.230.00:32:52.99#ibcon#about to read 5, iclass 38, count 2 2006.230.00:32:52.99#ibcon#read 5, iclass 38, count 2 2006.230.00:32:52.99#ibcon#about to read 6, iclass 38, count 2 2006.230.00:32:52.99#ibcon#read 6, iclass 38, count 2 2006.230.00:32:52.99#ibcon#end of sib2, iclass 38, count 2 2006.230.00:32:52.99#ibcon#*mode == 0, iclass 38, count 2 2006.230.00:32:52.99#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.00:32:52.99#ibcon#[27=AT07-04\r\n] 2006.230.00:32:52.99#ibcon#*before write, iclass 38, count 2 2006.230.00:32:52.99#ibcon#enter sib2, iclass 38, count 2 2006.230.00:32:52.99#ibcon#flushed, iclass 38, count 2 2006.230.00:32:52.99#ibcon#about to write, iclass 38, count 2 2006.230.00:32:52.99#ibcon#wrote, iclass 38, count 2 2006.230.00:32:52.99#ibcon#about to read 3, iclass 38, count 2 2006.230.00:32:53.02#ibcon#read 3, iclass 38, count 2 2006.230.00:32:53.02#ibcon#about to read 4, iclass 38, count 2 2006.230.00:32:53.02#ibcon#read 4, iclass 38, count 2 2006.230.00:32:53.02#ibcon#about to read 5, iclass 38, count 2 2006.230.00:32:53.02#ibcon#read 5, iclass 38, count 2 2006.230.00:32:53.02#ibcon#about to read 6, iclass 38, count 2 2006.230.00:32:53.02#ibcon#read 6, iclass 38, count 2 2006.230.00:32:53.02#ibcon#end of sib2, iclass 38, count 2 2006.230.00:32:53.02#ibcon#*after write, iclass 38, count 2 2006.230.00:32:53.02#ibcon#*before return 0, iclass 38, count 2 2006.230.00:32:53.02#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:53.02#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.00:32:53.02#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.00:32:53.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:53.02#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:53.14#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:53.14#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:53.14#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:32:53.14#ibcon#first serial, iclass 38, count 0 2006.230.00:32:53.14#ibcon#enter sib2, iclass 38, count 0 2006.230.00:32:53.14#ibcon#flushed, iclass 38, count 0 2006.230.00:32:53.14#ibcon#about to write, iclass 38, count 0 2006.230.00:32:53.14#ibcon#wrote, iclass 38, count 0 2006.230.00:32:53.14#ibcon#about to read 3, iclass 38, count 0 2006.230.00:32:53.16#ibcon#read 3, iclass 38, count 0 2006.230.00:32:53.16#ibcon#about to read 4, iclass 38, count 0 2006.230.00:32:53.16#ibcon#read 4, iclass 38, count 0 2006.230.00:32:53.16#ibcon#about to read 5, iclass 38, count 0 2006.230.00:32:53.16#ibcon#read 5, iclass 38, count 0 2006.230.00:32:53.16#ibcon#about to read 6, iclass 38, count 0 2006.230.00:32:53.16#ibcon#read 6, iclass 38, count 0 2006.230.00:32:53.16#ibcon#end of sib2, iclass 38, count 0 2006.230.00:32:53.16#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:32:53.16#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:32:53.16#ibcon#[27=USB\r\n] 2006.230.00:32:53.16#ibcon#*before write, iclass 38, count 0 2006.230.00:32:53.16#ibcon#enter sib2, iclass 38, count 0 2006.230.00:32:53.16#ibcon#flushed, iclass 38, count 0 2006.230.00:32:53.16#ibcon#about to write, iclass 38, count 0 2006.230.00:32:53.16#ibcon#wrote, iclass 38, count 0 2006.230.00:32:53.16#ibcon#about to read 3, iclass 38, count 0 2006.230.00:32:53.19#ibcon#read 3, iclass 38, count 0 2006.230.00:32:53.19#ibcon#about to read 4, iclass 38, count 0 2006.230.00:32:53.19#ibcon#read 4, iclass 38, count 0 2006.230.00:32:53.19#ibcon#about to read 5, iclass 38, count 0 2006.230.00:32:53.19#ibcon#read 5, iclass 38, count 0 2006.230.00:32:53.19#ibcon#about to read 6, iclass 38, count 0 2006.230.00:32:53.19#ibcon#read 6, iclass 38, count 0 2006.230.00:32:53.19#ibcon#end of sib2, iclass 38, count 0 2006.230.00:32:53.19#ibcon#*after write, iclass 38, count 0 2006.230.00:32:53.19#ibcon#*before return 0, iclass 38, count 0 2006.230.00:32:53.19#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:53.19#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.00:32:53.19#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:32:53.19#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:32:53.19$vck44/vblo=8,744.99 2006.230.00:32:53.19#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.00:32:53.19#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.00:32:53.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:32:53.19#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:53.19#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:53.19#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:53.19#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:32:53.19#ibcon#first serial, iclass 40, count 0 2006.230.00:32:53.19#ibcon#enter sib2, iclass 40, count 0 2006.230.00:32:53.19#ibcon#flushed, iclass 40, count 0 2006.230.00:32:53.19#ibcon#about to write, iclass 40, count 0 2006.230.00:32:53.19#ibcon#wrote, iclass 40, count 0 2006.230.00:32:53.19#ibcon#about to read 3, iclass 40, count 0 2006.230.00:32:53.21#ibcon#read 3, iclass 40, count 0 2006.230.00:32:53.21#ibcon#about to read 4, iclass 40, count 0 2006.230.00:32:53.21#ibcon#read 4, iclass 40, count 0 2006.230.00:32:53.21#ibcon#about to read 5, iclass 40, count 0 2006.230.00:32:53.21#ibcon#read 5, iclass 40, count 0 2006.230.00:32:53.21#ibcon#about to read 6, iclass 40, count 0 2006.230.00:32:53.21#ibcon#read 6, iclass 40, count 0 2006.230.00:32:53.21#ibcon#end of sib2, iclass 40, count 0 2006.230.00:32:53.21#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:32:53.21#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:32:53.21#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:32:53.21#ibcon#*before write, iclass 40, count 0 2006.230.00:32:53.21#ibcon#enter sib2, iclass 40, count 0 2006.230.00:32:53.21#ibcon#flushed, iclass 40, count 0 2006.230.00:32:53.21#ibcon#about to write, iclass 40, count 0 2006.230.00:32:53.21#ibcon#wrote, iclass 40, count 0 2006.230.00:32:53.21#ibcon#about to read 3, iclass 40, count 0 2006.230.00:32:53.25#ibcon#read 3, iclass 40, count 0 2006.230.00:32:53.25#ibcon#about to read 4, iclass 40, count 0 2006.230.00:32:53.25#ibcon#read 4, iclass 40, count 0 2006.230.00:32:53.25#ibcon#about to read 5, iclass 40, count 0 2006.230.00:32:53.25#ibcon#read 5, iclass 40, count 0 2006.230.00:32:53.25#ibcon#about to read 6, iclass 40, count 0 2006.230.00:32:53.25#ibcon#read 6, iclass 40, count 0 2006.230.00:32:53.25#ibcon#end of sib2, iclass 40, count 0 2006.230.00:32:53.25#ibcon#*after write, iclass 40, count 0 2006.230.00:32:53.25#ibcon#*before return 0, iclass 40, count 0 2006.230.00:32:53.25#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:53.25#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.00:32:53.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:32:53.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:32:53.25$vck44/vb=8,4 2006.230.00:32:53.25#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.00:32:53.25#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.00:32:53.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:32:53.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:53.31#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:53.31#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:53.31#ibcon#enter wrdev, iclass 4, count 2 2006.230.00:32:53.31#ibcon#first serial, iclass 4, count 2 2006.230.00:32:53.31#ibcon#enter sib2, iclass 4, count 2 2006.230.00:32:53.31#ibcon#flushed, iclass 4, count 2 2006.230.00:32:53.31#ibcon#about to write, iclass 4, count 2 2006.230.00:32:53.31#ibcon#wrote, iclass 4, count 2 2006.230.00:32:53.31#ibcon#about to read 3, iclass 4, count 2 2006.230.00:32:53.33#ibcon#read 3, iclass 4, count 2 2006.230.00:32:53.33#ibcon#about to read 4, iclass 4, count 2 2006.230.00:32:53.33#ibcon#read 4, iclass 4, count 2 2006.230.00:32:53.33#ibcon#about to read 5, iclass 4, count 2 2006.230.00:32:53.33#ibcon#read 5, iclass 4, count 2 2006.230.00:32:53.33#ibcon#about to read 6, iclass 4, count 2 2006.230.00:32:53.33#ibcon#read 6, iclass 4, count 2 2006.230.00:32:53.33#ibcon#end of sib2, iclass 4, count 2 2006.230.00:32:53.33#ibcon#*mode == 0, iclass 4, count 2 2006.230.00:32:53.33#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.00:32:53.33#ibcon#[27=AT08-04\r\n] 2006.230.00:32:53.33#ibcon#*before write, iclass 4, count 2 2006.230.00:32:53.33#ibcon#enter sib2, iclass 4, count 2 2006.230.00:32:53.33#ibcon#flushed, iclass 4, count 2 2006.230.00:32:53.33#ibcon#about to write, iclass 4, count 2 2006.230.00:32:53.33#ibcon#wrote, iclass 4, count 2 2006.230.00:32:53.33#ibcon#about to read 3, iclass 4, count 2 2006.230.00:32:53.36#ibcon#read 3, iclass 4, count 2 2006.230.00:32:53.36#ibcon#about to read 4, iclass 4, count 2 2006.230.00:32:53.36#ibcon#read 4, iclass 4, count 2 2006.230.00:32:53.36#ibcon#about to read 5, iclass 4, count 2 2006.230.00:32:53.36#ibcon#read 5, iclass 4, count 2 2006.230.00:32:53.36#ibcon#about to read 6, iclass 4, count 2 2006.230.00:32:53.36#ibcon#read 6, iclass 4, count 2 2006.230.00:32:53.36#ibcon#end of sib2, iclass 4, count 2 2006.230.00:32:53.36#ibcon#*after write, iclass 4, count 2 2006.230.00:32:53.36#ibcon#*before return 0, iclass 4, count 2 2006.230.00:32:53.36#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:53.36#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.00:32:53.36#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.00:32:53.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:32:53.36#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:53.48#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:53.48#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:53.48#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:32:53.48#ibcon#first serial, iclass 4, count 0 2006.230.00:32:53.48#ibcon#enter sib2, iclass 4, count 0 2006.230.00:32:53.48#ibcon#flushed, iclass 4, count 0 2006.230.00:32:53.48#ibcon#about to write, iclass 4, count 0 2006.230.00:32:53.48#ibcon#wrote, iclass 4, count 0 2006.230.00:32:53.48#ibcon#about to read 3, iclass 4, count 0 2006.230.00:32:53.50#ibcon#read 3, iclass 4, count 0 2006.230.00:32:53.50#ibcon#about to read 4, iclass 4, count 0 2006.230.00:32:53.50#ibcon#read 4, iclass 4, count 0 2006.230.00:32:53.50#ibcon#about to read 5, iclass 4, count 0 2006.230.00:32:53.50#ibcon#read 5, iclass 4, count 0 2006.230.00:32:53.50#ibcon#about to read 6, iclass 4, count 0 2006.230.00:32:53.50#ibcon#read 6, iclass 4, count 0 2006.230.00:32:53.50#ibcon#end of sib2, iclass 4, count 0 2006.230.00:32:53.50#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:32:53.50#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:32:53.50#ibcon#[27=USB\r\n] 2006.230.00:32:53.50#ibcon#*before write, iclass 4, count 0 2006.230.00:32:53.50#ibcon#enter sib2, iclass 4, count 0 2006.230.00:32:53.50#ibcon#flushed, iclass 4, count 0 2006.230.00:32:53.50#ibcon#about to write, iclass 4, count 0 2006.230.00:32:53.50#ibcon#wrote, iclass 4, count 0 2006.230.00:32:53.50#ibcon#about to read 3, iclass 4, count 0 2006.230.00:32:53.53#ibcon#read 3, iclass 4, count 0 2006.230.00:32:53.53#ibcon#about to read 4, iclass 4, count 0 2006.230.00:32:53.53#ibcon#read 4, iclass 4, count 0 2006.230.00:32:53.53#ibcon#about to read 5, iclass 4, count 0 2006.230.00:32:53.53#ibcon#read 5, iclass 4, count 0 2006.230.00:32:53.53#ibcon#about to read 6, iclass 4, count 0 2006.230.00:32:53.53#ibcon#read 6, iclass 4, count 0 2006.230.00:32:53.53#ibcon#end of sib2, iclass 4, count 0 2006.230.00:32:53.53#ibcon#*after write, iclass 4, count 0 2006.230.00:32:53.53#ibcon#*before return 0, iclass 4, count 0 2006.230.00:32:53.53#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:53.53#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.00:32:53.53#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:32:53.53#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:32:53.53$vck44/vabw=wide 2006.230.00:32:53.53#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.00:32:53.53#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.00:32:53.53#ibcon#ireg 8 cls_cnt 0 2006.230.00:32:53.53#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:53.53#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:53.53#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:53.53#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:32:53.53#ibcon#first serial, iclass 6, count 0 2006.230.00:32:53.53#ibcon#enter sib2, iclass 6, count 0 2006.230.00:32:53.53#ibcon#flushed, iclass 6, count 0 2006.230.00:32:53.53#ibcon#about to write, iclass 6, count 0 2006.230.00:32:53.53#ibcon#wrote, iclass 6, count 0 2006.230.00:32:53.53#ibcon#about to read 3, iclass 6, count 0 2006.230.00:32:53.55#ibcon#read 3, iclass 6, count 0 2006.230.00:32:53.55#ibcon#about to read 4, iclass 6, count 0 2006.230.00:32:53.55#ibcon#read 4, iclass 6, count 0 2006.230.00:32:53.55#ibcon#about to read 5, iclass 6, count 0 2006.230.00:32:53.55#ibcon#read 5, iclass 6, count 0 2006.230.00:32:53.55#ibcon#about to read 6, iclass 6, count 0 2006.230.00:32:53.55#ibcon#read 6, iclass 6, count 0 2006.230.00:32:53.55#ibcon#end of sib2, iclass 6, count 0 2006.230.00:32:53.55#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:32:53.55#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:32:53.55#ibcon#[25=BW32\r\n] 2006.230.00:32:53.55#ibcon#*before write, iclass 6, count 0 2006.230.00:32:53.55#ibcon#enter sib2, iclass 6, count 0 2006.230.00:32:53.55#ibcon#flushed, iclass 6, count 0 2006.230.00:32:53.55#ibcon#about to write, iclass 6, count 0 2006.230.00:32:53.55#ibcon#wrote, iclass 6, count 0 2006.230.00:32:53.55#ibcon#about to read 3, iclass 6, count 0 2006.230.00:32:53.58#ibcon#read 3, iclass 6, count 0 2006.230.00:32:53.58#ibcon#about to read 4, iclass 6, count 0 2006.230.00:32:53.58#ibcon#read 4, iclass 6, count 0 2006.230.00:32:53.58#ibcon#about to read 5, iclass 6, count 0 2006.230.00:32:53.58#ibcon#read 5, iclass 6, count 0 2006.230.00:32:53.58#ibcon#about to read 6, iclass 6, count 0 2006.230.00:32:53.58#ibcon#read 6, iclass 6, count 0 2006.230.00:32:53.58#ibcon#end of sib2, iclass 6, count 0 2006.230.00:32:53.58#ibcon#*after write, iclass 6, count 0 2006.230.00:32:53.58#ibcon#*before return 0, iclass 6, count 0 2006.230.00:32:53.58#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:53.58#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.00:32:53.58#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:32:53.58#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:32:53.58$vck44/vbbw=wide 2006.230.00:32:53.58#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.00:32:53.58#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.00:32:53.58#ibcon#ireg 8 cls_cnt 0 2006.230.00:32:53.58#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:32:53.65#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:32:53.65#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:32:53.65#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:32:53.65#ibcon#first serial, iclass 10, count 0 2006.230.00:32:53.65#ibcon#enter sib2, iclass 10, count 0 2006.230.00:32:53.65#ibcon#flushed, iclass 10, count 0 2006.230.00:32:53.65#ibcon#about to write, iclass 10, count 0 2006.230.00:32:53.65#ibcon#wrote, iclass 10, count 0 2006.230.00:32:53.65#ibcon#about to read 3, iclass 10, count 0 2006.230.00:32:53.67#ibcon#read 3, iclass 10, count 0 2006.230.00:32:53.67#ibcon#about to read 4, iclass 10, count 0 2006.230.00:32:53.67#ibcon#read 4, iclass 10, count 0 2006.230.00:32:53.67#ibcon#about to read 5, iclass 10, count 0 2006.230.00:32:53.67#ibcon#read 5, iclass 10, count 0 2006.230.00:32:53.67#ibcon#about to read 6, iclass 10, count 0 2006.230.00:32:53.67#ibcon#read 6, iclass 10, count 0 2006.230.00:32:53.67#ibcon#end of sib2, iclass 10, count 0 2006.230.00:32:53.67#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:32:53.67#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:32:53.67#ibcon#[27=BW32\r\n] 2006.230.00:32:53.67#ibcon#*before write, iclass 10, count 0 2006.230.00:32:53.67#ibcon#enter sib2, iclass 10, count 0 2006.230.00:32:53.67#ibcon#flushed, iclass 10, count 0 2006.230.00:32:53.67#ibcon#about to write, iclass 10, count 0 2006.230.00:32:53.67#ibcon#wrote, iclass 10, count 0 2006.230.00:32:53.67#ibcon#about to read 3, iclass 10, count 0 2006.230.00:32:53.70#ibcon#read 3, iclass 10, count 0 2006.230.00:32:53.70#ibcon#about to read 4, iclass 10, count 0 2006.230.00:32:53.70#ibcon#read 4, iclass 10, count 0 2006.230.00:32:53.70#ibcon#about to read 5, iclass 10, count 0 2006.230.00:32:53.70#ibcon#read 5, iclass 10, count 0 2006.230.00:32:53.70#ibcon#about to read 6, iclass 10, count 0 2006.230.00:32:53.70#ibcon#read 6, iclass 10, count 0 2006.230.00:32:53.70#ibcon#end of sib2, iclass 10, count 0 2006.230.00:32:53.70#ibcon#*after write, iclass 10, count 0 2006.230.00:32:53.70#ibcon#*before return 0, iclass 10, count 0 2006.230.00:32:53.70#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:32:53.70#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:32:53.70#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:32:53.70#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:32:53.70$setupk4/ifdk4 2006.230.00:32:53.70$ifdk4/lo= 2006.230.00:32:53.70$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:32:53.70$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:32:53.70$ifdk4/patch= 2006.230.00:32:53.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:32:53.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:32:53.71$setupk4/!*+20s 2006.230.00:33:01.55#abcon#<5=/09 2.3 7.2 31.56 741002.8\r\n> 2006.230.00:33:01.57#abcon#{5=INTERFACE CLEAR} 2006.230.00:33:01.63#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:33:08.21$setupk4/"tpicd 2006.230.00:33:08.21$setupk4/echo=off 2006.230.00:33:08.21$setupk4/xlog=off 2006.230.00:33:08.21:!2006.230.00:35:10 2006.230.00:33:21.14#trakl#Source acquired 2006.230.00:33:22.14#flagr#flagr/antenna,acquired 2006.230.00:35:10.00:preob 2006.230.00:35:11.13/onsource/TRACKING 2006.230.00:35:11.13:!2006.230.00:35:20 2006.230.00:35:20.00:"tape 2006.230.00:35:20.00:"st=record 2006.230.00:35:20.00:data_valid=on 2006.230.00:35:20.00:midob 2006.230.00:35:20.13/onsource/TRACKING 2006.230.00:35:20.13/wx/31.63,1002.7,74 2006.230.00:35:20.18/cable/+6.4011E-03 2006.230.00:35:21.27/va/01,08,usb,yes,43,46 2006.230.00:35:21.27/va/02,07,usb,yes,46,47 2006.230.00:35:21.27/va/03,06,usb,yes,56,59 2006.230.00:35:21.27/va/04,07,usb,yes,47,49 2006.230.00:35:21.27/va/05,04,usb,yes,42,43 2006.230.00:35:21.27/va/06,04,usb,yes,47,47 2006.230.00:35:21.27/va/07,05,usb,yes,42,43 2006.230.00:35:21.27/va/08,06,usb,yes,31,38 2006.230.00:35:21.50/valo/01,524.99,yes,locked 2006.230.00:35:21.50/valo/02,534.99,yes,locked 2006.230.00:35:21.50/valo/03,564.99,yes,locked 2006.230.00:35:21.50/valo/04,624.99,yes,locked 2006.230.00:35:21.50/valo/05,734.99,yes,locked 2006.230.00:35:21.50/valo/06,814.99,yes,locked 2006.230.00:35:21.50/valo/07,864.99,yes,locked 2006.230.00:35:21.50/valo/08,884.99,yes,locked 2006.230.00:35:22.59/vb/01,04,usb,yes,38,35 2006.230.00:35:22.59/vb/02,04,usb,yes,41,41 2006.230.00:35:22.59/vb/03,04,usb,yes,38,41 2006.230.00:35:22.59/vb/04,04,usb,yes,43,42 2006.230.00:35:22.59/vb/05,04,usb,yes,35,37 2006.230.00:35:22.59/vb/06,04,usb,yes,40,35 2006.230.00:35:22.59/vb/07,04,usb,yes,39,39 2006.230.00:35:22.59/vb/08,04,usb,yes,36,40 2006.230.00:35:22.82/vblo/01,629.99,yes,locked 2006.230.00:35:22.82/vblo/02,634.99,yes,locked 2006.230.00:35:22.82/vblo/03,649.99,yes,locked 2006.230.00:35:22.82/vblo/04,679.99,yes,locked 2006.230.00:35:22.82/vblo/05,709.99,yes,locked 2006.230.00:35:22.82/vblo/06,719.99,yes,locked 2006.230.00:35:22.82/vblo/07,734.99,yes,locked 2006.230.00:35:22.82/vblo/08,744.99,yes,locked 2006.230.00:35:22.97/vabw/8 2006.230.00:35:23.12/vbbw/8 2006.230.00:35:23.21/xfe/off,on,11.7 2006.230.00:35:23.59/ifatt/23,28,28,28 2006.230.00:35:24.07/fmout-gps/S +4.52E-07 2006.230.00:35:24.12:!2006.230.00:36:00 2006.230.00:36:00.01:data_valid=off 2006.230.00:36:00.01:"et 2006.230.00:36:00.01:!+3s 2006.230.00:36:03.02:"tape 2006.230.00:36:03.02:postob 2006.230.00:36:03.14/cable/+6.4023E-03 2006.230.00:36:03.14/wx/31.64,1002.7,75 2006.230.00:36:03.20/fmout-gps/S +4.52E-07 2006.230.00:36:03.20:scan_name=230-0044,jd0608,160 2006.230.00:36:03.20:source=0059+581,010245.76,582411.1,2000.0,cw 2006.230.00:36:05.13#flagr#flagr/antenna,new-source 2006.230.00:36:05.13:checkk5 2006.230.00:36:05.53/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:36:05.93/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:36:06.33/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:36:06.71/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:36:07.12/chk_obsdata//k5ts1/T2300035??a.dat file size is correct (nominal:160MB, actual:156MB). 2006.230.00:36:07.50/chk_obsdata//k5ts2/T2300035??b.dat file size is correct (nominal:160MB, actual:156MB). 2006.230.00:36:07.91/chk_obsdata//k5ts3/T2300035??c.dat file size is correct (nominal:160MB, actual:156MB). 2006.230.00:36:08.33/chk_obsdata//k5ts4/T2300035??d.dat file size is correct (nominal:160MB, actual:156MB). 2006.230.00:36:09.06/k5log//k5ts1_log_newline 2006.230.00:36:09.78/k5log//k5ts2_log_newline 2006.230.00:36:10.48/k5log//k5ts3_log_newline 2006.230.00:36:11.19/k5log//k5ts4_log_newline 2006.230.00:36:11.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:36:11.21:setupk4=1 2006.230.00:36:11.21$setupk4/echo=on 2006.230.00:36:11.21$setupk4/pcalon 2006.230.00:36:11.21$pcalon/"no phase cal control is implemented here 2006.230.00:36:11.21$setupk4/"tpicd=stop 2006.230.00:36:11.21$setupk4/"rec=synch_on 2006.230.00:36:11.21$setupk4/"rec_mode=128 2006.230.00:36:11.21$setupk4/!* 2006.230.00:36:11.21$setupk4/recpk4 2006.230.00:36:11.21$recpk4/recpatch= 2006.230.00:36:11.22$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:36:11.22$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:36:11.22$setupk4/vck44 2006.230.00:36:11.22$vck44/valo=1,524.99 2006.230.00:36:11.22#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.00:36:11.22#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.00:36:11.22#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:11.22#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:11.22#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:11.22#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:11.22#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:36:11.22#ibcon#first serial, iclass 19, count 0 2006.230.00:36:11.22#ibcon#enter sib2, iclass 19, count 0 2006.230.00:36:11.22#ibcon#flushed, iclass 19, count 0 2006.230.00:36:11.22#ibcon#about to write, iclass 19, count 0 2006.230.00:36:11.22#ibcon#wrote, iclass 19, count 0 2006.230.00:36:11.22#ibcon#about to read 3, iclass 19, count 0 2006.230.00:36:11.24#ibcon#read 3, iclass 19, count 0 2006.230.00:36:11.24#ibcon#about to read 4, iclass 19, count 0 2006.230.00:36:11.24#ibcon#read 4, iclass 19, count 0 2006.230.00:36:11.24#ibcon#about to read 5, iclass 19, count 0 2006.230.00:36:11.24#ibcon#read 5, iclass 19, count 0 2006.230.00:36:11.24#ibcon#about to read 6, iclass 19, count 0 2006.230.00:36:11.24#ibcon#read 6, iclass 19, count 0 2006.230.00:36:11.24#ibcon#end of sib2, iclass 19, count 0 2006.230.00:36:11.24#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:36:11.24#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:36:11.24#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:36:11.24#ibcon#*before write, iclass 19, count 0 2006.230.00:36:11.24#ibcon#enter sib2, iclass 19, count 0 2006.230.00:36:11.24#ibcon#flushed, iclass 19, count 0 2006.230.00:36:11.24#ibcon#about to write, iclass 19, count 0 2006.230.00:36:11.24#ibcon#wrote, iclass 19, count 0 2006.230.00:36:11.24#ibcon#about to read 3, iclass 19, count 0 2006.230.00:36:11.29#ibcon#read 3, iclass 19, count 0 2006.230.00:36:11.29#ibcon#about to read 4, iclass 19, count 0 2006.230.00:36:11.29#ibcon#read 4, iclass 19, count 0 2006.230.00:36:11.29#ibcon#about to read 5, iclass 19, count 0 2006.230.00:36:11.29#ibcon#read 5, iclass 19, count 0 2006.230.00:36:11.29#ibcon#about to read 6, iclass 19, count 0 2006.230.00:36:11.29#ibcon#read 6, iclass 19, count 0 2006.230.00:36:11.29#ibcon#end of sib2, iclass 19, count 0 2006.230.00:36:11.29#ibcon#*after write, iclass 19, count 0 2006.230.00:36:11.29#ibcon#*before return 0, iclass 19, count 0 2006.230.00:36:11.29#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:11.29#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:11.29#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:36:11.29#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:36:11.29$vck44/va=1,8 2006.230.00:36:11.29#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.230.00:36:11.29#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.230.00:36:11.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:11.29#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:11.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:11.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:11.29#ibcon#enter wrdev, iclass 21, count 2 2006.230.00:36:11.29#ibcon#first serial, iclass 21, count 2 2006.230.00:36:11.29#ibcon#enter sib2, iclass 21, count 2 2006.230.00:36:11.29#ibcon#flushed, iclass 21, count 2 2006.230.00:36:11.29#ibcon#about to write, iclass 21, count 2 2006.230.00:36:11.29#ibcon#wrote, iclass 21, count 2 2006.230.00:36:11.29#ibcon#about to read 3, iclass 21, count 2 2006.230.00:36:11.31#ibcon#read 3, iclass 21, count 2 2006.230.00:36:11.31#ibcon#about to read 4, iclass 21, count 2 2006.230.00:36:11.31#ibcon#read 4, iclass 21, count 2 2006.230.00:36:11.31#ibcon#about to read 5, iclass 21, count 2 2006.230.00:36:11.31#ibcon#read 5, iclass 21, count 2 2006.230.00:36:11.31#ibcon#about to read 6, iclass 21, count 2 2006.230.00:36:11.31#ibcon#read 6, iclass 21, count 2 2006.230.00:36:11.31#ibcon#end of sib2, iclass 21, count 2 2006.230.00:36:11.31#ibcon#*mode == 0, iclass 21, count 2 2006.230.00:36:11.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.230.00:36:11.31#ibcon#[25=AT01-08\r\n] 2006.230.00:36:11.31#ibcon#*before write, iclass 21, count 2 2006.230.00:36:11.31#ibcon#enter sib2, iclass 21, count 2 2006.230.00:36:11.31#ibcon#flushed, iclass 21, count 2 2006.230.00:36:11.31#ibcon#about to write, iclass 21, count 2 2006.230.00:36:11.31#ibcon#wrote, iclass 21, count 2 2006.230.00:36:11.31#ibcon#about to read 3, iclass 21, count 2 2006.230.00:36:11.34#ibcon#read 3, iclass 21, count 2 2006.230.00:36:11.34#ibcon#about to read 4, iclass 21, count 2 2006.230.00:36:11.34#ibcon#read 4, iclass 21, count 2 2006.230.00:36:11.34#ibcon#about to read 5, iclass 21, count 2 2006.230.00:36:11.34#ibcon#read 5, iclass 21, count 2 2006.230.00:36:11.34#ibcon#about to read 6, iclass 21, count 2 2006.230.00:36:11.34#ibcon#read 6, iclass 21, count 2 2006.230.00:36:11.34#ibcon#end of sib2, iclass 21, count 2 2006.230.00:36:11.34#ibcon#*after write, iclass 21, count 2 2006.230.00:36:11.34#ibcon#*before return 0, iclass 21, count 2 2006.230.00:36:11.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:11.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:11.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.230.00:36:11.34#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:11.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:11.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:11.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:11.46#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:36:11.46#ibcon#first serial, iclass 21, count 0 2006.230.00:36:11.46#ibcon#enter sib2, iclass 21, count 0 2006.230.00:36:11.46#ibcon#flushed, iclass 21, count 0 2006.230.00:36:11.46#ibcon#about to write, iclass 21, count 0 2006.230.00:36:11.46#ibcon#wrote, iclass 21, count 0 2006.230.00:36:11.46#ibcon#about to read 3, iclass 21, count 0 2006.230.00:36:11.48#ibcon#read 3, iclass 21, count 0 2006.230.00:36:11.48#ibcon#about to read 4, iclass 21, count 0 2006.230.00:36:11.48#ibcon#read 4, iclass 21, count 0 2006.230.00:36:11.48#ibcon#about to read 5, iclass 21, count 0 2006.230.00:36:11.48#ibcon#read 5, iclass 21, count 0 2006.230.00:36:11.48#ibcon#about to read 6, iclass 21, count 0 2006.230.00:36:11.48#ibcon#read 6, iclass 21, count 0 2006.230.00:36:11.48#ibcon#end of sib2, iclass 21, count 0 2006.230.00:36:11.48#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:36:11.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:36:11.48#ibcon#[25=USB\r\n] 2006.230.00:36:11.48#ibcon#*before write, iclass 21, count 0 2006.230.00:36:11.48#ibcon#enter sib2, iclass 21, count 0 2006.230.00:36:11.48#ibcon#flushed, iclass 21, count 0 2006.230.00:36:11.48#ibcon#about to write, iclass 21, count 0 2006.230.00:36:11.48#ibcon#wrote, iclass 21, count 0 2006.230.00:36:11.48#ibcon#about to read 3, iclass 21, count 0 2006.230.00:36:11.51#ibcon#read 3, iclass 21, count 0 2006.230.00:36:11.51#ibcon#about to read 4, iclass 21, count 0 2006.230.00:36:11.51#ibcon#read 4, iclass 21, count 0 2006.230.00:36:11.51#ibcon#about to read 5, iclass 21, count 0 2006.230.00:36:11.51#ibcon#read 5, iclass 21, count 0 2006.230.00:36:11.51#ibcon#about to read 6, iclass 21, count 0 2006.230.00:36:11.51#ibcon#read 6, iclass 21, count 0 2006.230.00:36:11.51#ibcon#end of sib2, iclass 21, count 0 2006.230.00:36:11.51#ibcon#*after write, iclass 21, count 0 2006.230.00:36:11.51#ibcon#*before return 0, iclass 21, count 0 2006.230.00:36:11.51#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:11.51#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:11.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:36:11.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:36:11.51$vck44/valo=2,534.99 2006.230.00:36:11.51#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.00:36:11.51#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.00:36:11.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:11.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:11.51#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:11.51#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:11.51#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:36:11.51#ibcon#first serial, iclass 23, count 0 2006.230.00:36:11.51#ibcon#enter sib2, iclass 23, count 0 2006.230.00:36:11.51#ibcon#flushed, iclass 23, count 0 2006.230.00:36:11.51#ibcon#about to write, iclass 23, count 0 2006.230.00:36:11.51#ibcon#wrote, iclass 23, count 0 2006.230.00:36:11.51#ibcon#about to read 3, iclass 23, count 0 2006.230.00:36:11.53#ibcon#read 3, iclass 23, count 0 2006.230.00:36:11.53#ibcon#about to read 4, iclass 23, count 0 2006.230.00:36:11.53#ibcon#read 4, iclass 23, count 0 2006.230.00:36:11.53#ibcon#about to read 5, iclass 23, count 0 2006.230.00:36:11.53#ibcon#read 5, iclass 23, count 0 2006.230.00:36:11.53#ibcon#about to read 6, iclass 23, count 0 2006.230.00:36:11.53#ibcon#read 6, iclass 23, count 0 2006.230.00:36:11.53#ibcon#end of sib2, iclass 23, count 0 2006.230.00:36:11.53#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:36:11.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:36:11.53#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:36:11.53#ibcon#*before write, iclass 23, count 0 2006.230.00:36:11.53#ibcon#enter sib2, iclass 23, count 0 2006.230.00:36:11.53#ibcon#flushed, iclass 23, count 0 2006.230.00:36:11.53#ibcon#about to write, iclass 23, count 0 2006.230.00:36:11.53#ibcon#wrote, iclass 23, count 0 2006.230.00:36:11.53#ibcon#about to read 3, iclass 23, count 0 2006.230.00:36:11.57#ibcon#read 3, iclass 23, count 0 2006.230.00:36:11.57#ibcon#about to read 4, iclass 23, count 0 2006.230.00:36:11.57#ibcon#read 4, iclass 23, count 0 2006.230.00:36:11.57#ibcon#about to read 5, iclass 23, count 0 2006.230.00:36:11.57#ibcon#read 5, iclass 23, count 0 2006.230.00:36:11.57#ibcon#about to read 6, iclass 23, count 0 2006.230.00:36:11.57#ibcon#read 6, iclass 23, count 0 2006.230.00:36:11.57#ibcon#end of sib2, iclass 23, count 0 2006.230.00:36:11.57#ibcon#*after write, iclass 23, count 0 2006.230.00:36:11.57#ibcon#*before return 0, iclass 23, count 0 2006.230.00:36:11.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:11.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:11.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:36:11.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:36:11.57$vck44/va=2,7 2006.230.00:36:11.57#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.00:36:11.57#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.00:36:11.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:11.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:11.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:11.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:11.63#ibcon#enter wrdev, iclass 25, count 2 2006.230.00:36:11.63#ibcon#first serial, iclass 25, count 2 2006.230.00:36:11.63#ibcon#enter sib2, iclass 25, count 2 2006.230.00:36:11.63#ibcon#flushed, iclass 25, count 2 2006.230.00:36:11.63#ibcon#about to write, iclass 25, count 2 2006.230.00:36:11.63#ibcon#wrote, iclass 25, count 2 2006.230.00:36:11.63#ibcon#about to read 3, iclass 25, count 2 2006.230.00:36:11.65#ibcon#read 3, iclass 25, count 2 2006.230.00:36:11.65#ibcon#about to read 4, iclass 25, count 2 2006.230.00:36:11.65#ibcon#read 4, iclass 25, count 2 2006.230.00:36:11.65#ibcon#about to read 5, iclass 25, count 2 2006.230.00:36:11.65#ibcon#read 5, iclass 25, count 2 2006.230.00:36:11.65#ibcon#about to read 6, iclass 25, count 2 2006.230.00:36:11.65#ibcon#read 6, iclass 25, count 2 2006.230.00:36:11.65#ibcon#end of sib2, iclass 25, count 2 2006.230.00:36:11.65#ibcon#*mode == 0, iclass 25, count 2 2006.230.00:36:11.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.00:36:11.65#ibcon#[25=AT02-07\r\n] 2006.230.00:36:11.65#ibcon#*before write, iclass 25, count 2 2006.230.00:36:11.65#ibcon#enter sib2, iclass 25, count 2 2006.230.00:36:11.65#ibcon#flushed, iclass 25, count 2 2006.230.00:36:11.65#ibcon#about to write, iclass 25, count 2 2006.230.00:36:11.65#ibcon#wrote, iclass 25, count 2 2006.230.00:36:11.65#ibcon#about to read 3, iclass 25, count 2 2006.230.00:36:11.68#ibcon#read 3, iclass 25, count 2 2006.230.00:36:11.68#ibcon#about to read 4, iclass 25, count 2 2006.230.00:36:11.68#ibcon#read 4, iclass 25, count 2 2006.230.00:36:11.68#ibcon#about to read 5, iclass 25, count 2 2006.230.00:36:11.68#ibcon#read 5, iclass 25, count 2 2006.230.00:36:11.68#ibcon#about to read 6, iclass 25, count 2 2006.230.00:36:11.68#ibcon#read 6, iclass 25, count 2 2006.230.00:36:11.68#ibcon#end of sib2, iclass 25, count 2 2006.230.00:36:11.68#ibcon#*after write, iclass 25, count 2 2006.230.00:36:11.68#ibcon#*before return 0, iclass 25, count 2 2006.230.00:36:11.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:11.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:11.68#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.00:36:11.68#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:11.68#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:11.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:11.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:11.80#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:36:11.80#ibcon#first serial, iclass 25, count 0 2006.230.00:36:11.80#ibcon#enter sib2, iclass 25, count 0 2006.230.00:36:11.80#ibcon#flushed, iclass 25, count 0 2006.230.00:36:11.80#ibcon#about to write, iclass 25, count 0 2006.230.00:36:11.80#ibcon#wrote, iclass 25, count 0 2006.230.00:36:11.80#ibcon#about to read 3, iclass 25, count 0 2006.230.00:36:11.82#ibcon#read 3, iclass 25, count 0 2006.230.00:36:11.82#ibcon#about to read 4, iclass 25, count 0 2006.230.00:36:11.82#ibcon#read 4, iclass 25, count 0 2006.230.00:36:11.82#ibcon#about to read 5, iclass 25, count 0 2006.230.00:36:11.82#ibcon#read 5, iclass 25, count 0 2006.230.00:36:11.82#ibcon#about to read 6, iclass 25, count 0 2006.230.00:36:11.82#ibcon#read 6, iclass 25, count 0 2006.230.00:36:11.82#ibcon#end of sib2, iclass 25, count 0 2006.230.00:36:11.82#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:36:11.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:36:11.82#ibcon#[25=USB\r\n] 2006.230.00:36:11.82#ibcon#*before write, iclass 25, count 0 2006.230.00:36:11.82#ibcon#enter sib2, iclass 25, count 0 2006.230.00:36:11.82#ibcon#flushed, iclass 25, count 0 2006.230.00:36:11.82#ibcon#about to write, iclass 25, count 0 2006.230.00:36:11.82#ibcon#wrote, iclass 25, count 0 2006.230.00:36:11.82#ibcon#about to read 3, iclass 25, count 0 2006.230.00:36:11.85#ibcon#read 3, iclass 25, count 0 2006.230.00:36:11.85#ibcon#about to read 4, iclass 25, count 0 2006.230.00:36:11.85#ibcon#read 4, iclass 25, count 0 2006.230.00:36:11.85#ibcon#about to read 5, iclass 25, count 0 2006.230.00:36:11.85#ibcon#read 5, iclass 25, count 0 2006.230.00:36:11.85#ibcon#about to read 6, iclass 25, count 0 2006.230.00:36:11.85#ibcon#read 6, iclass 25, count 0 2006.230.00:36:11.85#ibcon#end of sib2, iclass 25, count 0 2006.230.00:36:11.85#ibcon#*after write, iclass 25, count 0 2006.230.00:36:11.85#ibcon#*before return 0, iclass 25, count 0 2006.230.00:36:11.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:11.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:11.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:36:11.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:36:11.85$vck44/valo=3,564.99 2006.230.00:36:11.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.00:36:11.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.00:36:11.85#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:11.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:11.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:11.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:11.85#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:36:11.85#ibcon#first serial, iclass 27, count 0 2006.230.00:36:11.85#ibcon#enter sib2, iclass 27, count 0 2006.230.00:36:11.85#ibcon#flushed, iclass 27, count 0 2006.230.00:36:11.85#ibcon#about to write, iclass 27, count 0 2006.230.00:36:11.85#ibcon#wrote, iclass 27, count 0 2006.230.00:36:11.85#ibcon#about to read 3, iclass 27, count 0 2006.230.00:36:11.87#ibcon#read 3, iclass 27, count 0 2006.230.00:36:11.87#ibcon#about to read 4, iclass 27, count 0 2006.230.00:36:11.87#ibcon#read 4, iclass 27, count 0 2006.230.00:36:11.87#ibcon#about to read 5, iclass 27, count 0 2006.230.00:36:11.87#ibcon#read 5, iclass 27, count 0 2006.230.00:36:11.87#ibcon#about to read 6, iclass 27, count 0 2006.230.00:36:11.87#ibcon#read 6, iclass 27, count 0 2006.230.00:36:11.87#ibcon#end of sib2, iclass 27, count 0 2006.230.00:36:11.87#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:36:11.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:36:11.87#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:36:11.87#ibcon#*before write, iclass 27, count 0 2006.230.00:36:11.87#ibcon#enter sib2, iclass 27, count 0 2006.230.00:36:11.87#ibcon#flushed, iclass 27, count 0 2006.230.00:36:11.87#ibcon#about to write, iclass 27, count 0 2006.230.00:36:11.87#ibcon#wrote, iclass 27, count 0 2006.230.00:36:11.87#ibcon#about to read 3, iclass 27, count 0 2006.230.00:36:11.91#ibcon#read 3, iclass 27, count 0 2006.230.00:36:11.91#ibcon#about to read 4, iclass 27, count 0 2006.230.00:36:11.91#ibcon#read 4, iclass 27, count 0 2006.230.00:36:11.91#ibcon#about to read 5, iclass 27, count 0 2006.230.00:36:11.91#ibcon#read 5, iclass 27, count 0 2006.230.00:36:11.91#ibcon#about to read 6, iclass 27, count 0 2006.230.00:36:11.91#ibcon#read 6, iclass 27, count 0 2006.230.00:36:11.91#ibcon#end of sib2, iclass 27, count 0 2006.230.00:36:11.91#ibcon#*after write, iclass 27, count 0 2006.230.00:36:11.91#ibcon#*before return 0, iclass 27, count 0 2006.230.00:36:11.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:11.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:11.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:36:11.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:36:11.91$vck44/va=3,6 2006.230.00:36:11.91#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.00:36:11.91#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.00:36:11.91#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:11.91#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:36:11.97#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:36:11.97#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:36:11.97#ibcon#enter wrdev, iclass 29, count 2 2006.230.00:36:11.97#ibcon#first serial, iclass 29, count 2 2006.230.00:36:11.97#ibcon#enter sib2, iclass 29, count 2 2006.230.00:36:11.97#ibcon#flushed, iclass 29, count 2 2006.230.00:36:11.97#ibcon#about to write, iclass 29, count 2 2006.230.00:36:11.97#ibcon#wrote, iclass 29, count 2 2006.230.00:36:11.97#ibcon#about to read 3, iclass 29, count 2 2006.230.00:36:11.99#ibcon#read 3, iclass 29, count 2 2006.230.00:36:11.99#ibcon#about to read 4, iclass 29, count 2 2006.230.00:36:11.99#ibcon#read 4, iclass 29, count 2 2006.230.00:36:11.99#ibcon#about to read 5, iclass 29, count 2 2006.230.00:36:11.99#ibcon#read 5, iclass 29, count 2 2006.230.00:36:11.99#ibcon#about to read 6, iclass 29, count 2 2006.230.00:36:11.99#ibcon#read 6, iclass 29, count 2 2006.230.00:36:11.99#ibcon#end of sib2, iclass 29, count 2 2006.230.00:36:11.99#ibcon#*mode == 0, iclass 29, count 2 2006.230.00:36:11.99#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.00:36:11.99#ibcon#[25=AT03-06\r\n] 2006.230.00:36:11.99#ibcon#*before write, iclass 29, count 2 2006.230.00:36:11.99#ibcon#enter sib2, iclass 29, count 2 2006.230.00:36:11.99#ibcon#flushed, iclass 29, count 2 2006.230.00:36:11.99#ibcon#about to write, iclass 29, count 2 2006.230.00:36:11.99#ibcon#wrote, iclass 29, count 2 2006.230.00:36:11.99#ibcon#about to read 3, iclass 29, count 2 2006.230.00:36:12.02#ibcon#read 3, iclass 29, count 2 2006.230.00:36:12.02#ibcon#about to read 4, iclass 29, count 2 2006.230.00:36:12.02#ibcon#read 4, iclass 29, count 2 2006.230.00:36:12.02#ibcon#about to read 5, iclass 29, count 2 2006.230.00:36:12.02#ibcon#read 5, iclass 29, count 2 2006.230.00:36:12.02#ibcon#about to read 6, iclass 29, count 2 2006.230.00:36:12.02#ibcon#read 6, iclass 29, count 2 2006.230.00:36:12.02#ibcon#end of sib2, iclass 29, count 2 2006.230.00:36:12.02#ibcon#*after write, iclass 29, count 2 2006.230.00:36:12.02#ibcon#*before return 0, iclass 29, count 2 2006.230.00:36:12.02#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:36:12.02#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.00:36:12.02#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.00:36:12.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:12.02#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:36:12.14#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:36:12.14#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:36:12.14#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:36:12.14#ibcon#first serial, iclass 29, count 0 2006.230.00:36:12.14#ibcon#enter sib2, iclass 29, count 0 2006.230.00:36:12.14#ibcon#flushed, iclass 29, count 0 2006.230.00:36:12.14#ibcon#about to write, iclass 29, count 0 2006.230.00:36:12.14#ibcon#wrote, iclass 29, count 0 2006.230.00:36:12.14#ibcon#about to read 3, iclass 29, count 0 2006.230.00:36:12.16#ibcon#read 3, iclass 29, count 0 2006.230.00:36:12.16#ibcon#about to read 4, iclass 29, count 0 2006.230.00:36:12.16#ibcon#read 4, iclass 29, count 0 2006.230.00:36:12.16#ibcon#about to read 5, iclass 29, count 0 2006.230.00:36:12.16#ibcon#read 5, iclass 29, count 0 2006.230.00:36:12.16#ibcon#about to read 6, iclass 29, count 0 2006.230.00:36:12.16#ibcon#read 6, iclass 29, count 0 2006.230.00:36:12.16#ibcon#end of sib2, iclass 29, count 0 2006.230.00:36:12.16#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:36:12.16#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:36:12.16#ibcon#[25=USB\r\n] 2006.230.00:36:12.16#ibcon#*before write, iclass 29, count 0 2006.230.00:36:12.16#ibcon#enter sib2, iclass 29, count 0 2006.230.00:36:12.16#ibcon#flushed, iclass 29, count 0 2006.230.00:36:12.16#ibcon#about to write, iclass 29, count 0 2006.230.00:36:12.16#ibcon#wrote, iclass 29, count 0 2006.230.00:36:12.16#ibcon#about to read 3, iclass 29, count 0 2006.230.00:36:12.19#ibcon#read 3, iclass 29, count 0 2006.230.00:36:12.19#ibcon#about to read 4, iclass 29, count 0 2006.230.00:36:12.19#ibcon#read 4, iclass 29, count 0 2006.230.00:36:12.19#ibcon#about to read 5, iclass 29, count 0 2006.230.00:36:12.19#ibcon#read 5, iclass 29, count 0 2006.230.00:36:12.19#ibcon#about to read 6, iclass 29, count 0 2006.230.00:36:12.19#ibcon#read 6, iclass 29, count 0 2006.230.00:36:12.19#ibcon#end of sib2, iclass 29, count 0 2006.230.00:36:12.19#ibcon#*after write, iclass 29, count 0 2006.230.00:36:12.19#ibcon#*before return 0, iclass 29, count 0 2006.230.00:36:12.19#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:36:12.19#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.00:36:12.19#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:36:12.19#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:36:12.19$vck44/valo=4,624.99 2006.230.00:36:12.19#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.00:36:12.19#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.00:36:12.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:12.19#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:36:12.19#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:36:12.19#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:36:12.19#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:36:12.19#ibcon#first serial, iclass 31, count 0 2006.230.00:36:12.19#ibcon#enter sib2, iclass 31, count 0 2006.230.00:36:12.19#ibcon#flushed, iclass 31, count 0 2006.230.00:36:12.19#ibcon#about to write, iclass 31, count 0 2006.230.00:36:12.19#ibcon#wrote, iclass 31, count 0 2006.230.00:36:12.19#ibcon#about to read 3, iclass 31, count 0 2006.230.00:36:12.21#ibcon#read 3, iclass 31, count 0 2006.230.00:36:12.21#ibcon#about to read 4, iclass 31, count 0 2006.230.00:36:12.21#ibcon#read 4, iclass 31, count 0 2006.230.00:36:12.21#ibcon#about to read 5, iclass 31, count 0 2006.230.00:36:12.21#ibcon#read 5, iclass 31, count 0 2006.230.00:36:12.21#ibcon#about to read 6, iclass 31, count 0 2006.230.00:36:12.21#ibcon#read 6, iclass 31, count 0 2006.230.00:36:12.21#ibcon#end of sib2, iclass 31, count 0 2006.230.00:36:12.21#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:36:12.21#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:36:12.21#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:36:12.21#ibcon#*before write, iclass 31, count 0 2006.230.00:36:12.21#ibcon#enter sib2, iclass 31, count 0 2006.230.00:36:12.21#ibcon#flushed, iclass 31, count 0 2006.230.00:36:12.21#ibcon#about to write, iclass 31, count 0 2006.230.00:36:12.21#ibcon#wrote, iclass 31, count 0 2006.230.00:36:12.21#ibcon#about to read 3, iclass 31, count 0 2006.230.00:36:12.25#ibcon#read 3, iclass 31, count 0 2006.230.00:36:12.25#ibcon#about to read 4, iclass 31, count 0 2006.230.00:36:12.25#ibcon#read 4, iclass 31, count 0 2006.230.00:36:12.25#ibcon#about to read 5, iclass 31, count 0 2006.230.00:36:12.25#ibcon#read 5, iclass 31, count 0 2006.230.00:36:12.25#ibcon#about to read 6, iclass 31, count 0 2006.230.00:36:12.25#ibcon#read 6, iclass 31, count 0 2006.230.00:36:12.25#ibcon#end of sib2, iclass 31, count 0 2006.230.00:36:12.25#ibcon#*after write, iclass 31, count 0 2006.230.00:36:12.25#ibcon#*before return 0, iclass 31, count 0 2006.230.00:36:12.25#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:36:12.25#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.00:36:12.25#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:36:12.25#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:36:12.25$vck44/va=4,7 2006.230.00:36:12.25#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.00:36:12.25#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.00:36:12.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:12.25#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:36:12.31#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:36:12.31#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:36:12.31#ibcon#enter wrdev, iclass 33, count 2 2006.230.00:36:12.31#ibcon#first serial, iclass 33, count 2 2006.230.00:36:12.31#ibcon#enter sib2, iclass 33, count 2 2006.230.00:36:12.31#ibcon#flushed, iclass 33, count 2 2006.230.00:36:12.31#ibcon#about to write, iclass 33, count 2 2006.230.00:36:12.31#ibcon#wrote, iclass 33, count 2 2006.230.00:36:12.31#ibcon#about to read 3, iclass 33, count 2 2006.230.00:36:12.33#ibcon#read 3, iclass 33, count 2 2006.230.00:36:12.33#ibcon#about to read 4, iclass 33, count 2 2006.230.00:36:12.33#ibcon#read 4, iclass 33, count 2 2006.230.00:36:12.33#ibcon#about to read 5, iclass 33, count 2 2006.230.00:36:12.33#ibcon#read 5, iclass 33, count 2 2006.230.00:36:12.33#ibcon#about to read 6, iclass 33, count 2 2006.230.00:36:12.33#ibcon#read 6, iclass 33, count 2 2006.230.00:36:12.33#ibcon#end of sib2, iclass 33, count 2 2006.230.00:36:12.33#ibcon#*mode == 0, iclass 33, count 2 2006.230.00:36:12.33#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.00:36:12.33#ibcon#[25=AT04-07\r\n] 2006.230.00:36:12.33#ibcon#*before write, iclass 33, count 2 2006.230.00:36:12.33#ibcon#enter sib2, iclass 33, count 2 2006.230.00:36:12.33#ibcon#flushed, iclass 33, count 2 2006.230.00:36:12.33#ibcon#about to write, iclass 33, count 2 2006.230.00:36:12.33#ibcon#wrote, iclass 33, count 2 2006.230.00:36:12.33#ibcon#about to read 3, iclass 33, count 2 2006.230.00:36:12.36#ibcon#read 3, iclass 33, count 2 2006.230.00:36:12.36#ibcon#about to read 4, iclass 33, count 2 2006.230.00:36:12.36#ibcon#read 4, iclass 33, count 2 2006.230.00:36:12.36#ibcon#about to read 5, iclass 33, count 2 2006.230.00:36:12.36#ibcon#read 5, iclass 33, count 2 2006.230.00:36:12.36#ibcon#about to read 6, iclass 33, count 2 2006.230.00:36:12.36#ibcon#read 6, iclass 33, count 2 2006.230.00:36:12.36#ibcon#end of sib2, iclass 33, count 2 2006.230.00:36:12.36#ibcon#*after write, iclass 33, count 2 2006.230.00:36:12.36#ibcon#*before return 0, iclass 33, count 2 2006.230.00:36:12.36#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:36:12.36#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.00:36:12.36#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.00:36:12.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:12.36#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:36:12.48#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:36:12.48#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:36:12.48#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:36:12.48#ibcon#first serial, iclass 33, count 0 2006.230.00:36:12.48#ibcon#enter sib2, iclass 33, count 0 2006.230.00:36:12.48#ibcon#flushed, iclass 33, count 0 2006.230.00:36:12.48#ibcon#about to write, iclass 33, count 0 2006.230.00:36:12.48#ibcon#wrote, iclass 33, count 0 2006.230.00:36:12.48#ibcon#about to read 3, iclass 33, count 0 2006.230.00:36:12.50#ibcon#read 3, iclass 33, count 0 2006.230.00:36:12.50#ibcon#about to read 4, iclass 33, count 0 2006.230.00:36:12.50#ibcon#read 4, iclass 33, count 0 2006.230.00:36:12.50#ibcon#about to read 5, iclass 33, count 0 2006.230.00:36:12.50#ibcon#read 5, iclass 33, count 0 2006.230.00:36:12.50#ibcon#about to read 6, iclass 33, count 0 2006.230.00:36:12.50#ibcon#read 6, iclass 33, count 0 2006.230.00:36:12.50#ibcon#end of sib2, iclass 33, count 0 2006.230.00:36:12.50#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:36:12.50#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:36:12.50#ibcon#[25=USB\r\n] 2006.230.00:36:12.50#ibcon#*before write, iclass 33, count 0 2006.230.00:36:12.50#ibcon#enter sib2, iclass 33, count 0 2006.230.00:36:12.50#ibcon#flushed, iclass 33, count 0 2006.230.00:36:12.50#ibcon#about to write, iclass 33, count 0 2006.230.00:36:12.50#ibcon#wrote, iclass 33, count 0 2006.230.00:36:12.50#ibcon#about to read 3, iclass 33, count 0 2006.230.00:36:12.53#ibcon#read 3, iclass 33, count 0 2006.230.00:36:12.53#ibcon#about to read 4, iclass 33, count 0 2006.230.00:36:12.53#ibcon#read 4, iclass 33, count 0 2006.230.00:36:12.53#ibcon#about to read 5, iclass 33, count 0 2006.230.00:36:12.53#ibcon#read 5, iclass 33, count 0 2006.230.00:36:12.53#ibcon#about to read 6, iclass 33, count 0 2006.230.00:36:12.53#ibcon#read 6, iclass 33, count 0 2006.230.00:36:12.53#ibcon#end of sib2, iclass 33, count 0 2006.230.00:36:12.53#ibcon#*after write, iclass 33, count 0 2006.230.00:36:12.53#ibcon#*before return 0, iclass 33, count 0 2006.230.00:36:12.53#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:36:12.53#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.00:36:12.53#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:36:12.53#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:36:12.53$vck44/valo=5,734.99 2006.230.00:36:12.53#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.00:36:12.53#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.00:36:12.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:12.53#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:12.53#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:12.53#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:12.53#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:36:12.53#ibcon#first serial, iclass 35, count 0 2006.230.00:36:12.53#ibcon#enter sib2, iclass 35, count 0 2006.230.00:36:12.53#ibcon#flushed, iclass 35, count 0 2006.230.00:36:12.53#ibcon#about to write, iclass 35, count 0 2006.230.00:36:12.53#ibcon#wrote, iclass 35, count 0 2006.230.00:36:12.53#ibcon#about to read 3, iclass 35, count 0 2006.230.00:36:12.55#ibcon#read 3, iclass 35, count 0 2006.230.00:36:12.55#ibcon#about to read 4, iclass 35, count 0 2006.230.00:36:12.55#ibcon#read 4, iclass 35, count 0 2006.230.00:36:12.55#ibcon#about to read 5, iclass 35, count 0 2006.230.00:36:12.55#ibcon#read 5, iclass 35, count 0 2006.230.00:36:12.55#ibcon#about to read 6, iclass 35, count 0 2006.230.00:36:12.55#ibcon#read 6, iclass 35, count 0 2006.230.00:36:12.55#ibcon#end of sib2, iclass 35, count 0 2006.230.00:36:12.55#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:36:12.55#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:36:12.55#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:36:12.55#ibcon#*before write, iclass 35, count 0 2006.230.00:36:12.55#ibcon#enter sib2, iclass 35, count 0 2006.230.00:36:12.55#ibcon#flushed, iclass 35, count 0 2006.230.00:36:12.55#ibcon#about to write, iclass 35, count 0 2006.230.00:36:12.55#ibcon#wrote, iclass 35, count 0 2006.230.00:36:12.55#ibcon#about to read 3, iclass 35, count 0 2006.230.00:36:12.59#ibcon#read 3, iclass 35, count 0 2006.230.00:36:12.59#ibcon#about to read 4, iclass 35, count 0 2006.230.00:36:12.59#ibcon#read 4, iclass 35, count 0 2006.230.00:36:12.59#ibcon#about to read 5, iclass 35, count 0 2006.230.00:36:12.59#ibcon#read 5, iclass 35, count 0 2006.230.00:36:12.59#ibcon#about to read 6, iclass 35, count 0 2006.230.00:36:12.59#ibcon#read 6, iclass 35, count 0 2006.230.00:36:12.59#ibcon#end of sib2, iclass 35, count 0 2006.230.00:36:12.59#ibcon#*after write, iclass 35, count 0 2006.230.00:36:12.59#ibcon#*before return 0, iclass 35, count 0 2006.230.00:36:12.59#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:12.59#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:12.59#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:36:12.59#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:36:12.59$vck44/va=5,4 2006.230.00:36:12.59#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.00:36:12.59#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.00:36:12.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:12.59#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:12.65#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:12.65#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:12.65#ibcon#enter wrdev, iclass 37, count 2 2006.230.00:36:12.65#ibcon#first serial, iclass 37, count 2 2006.230.00:36:12.65#ibcon#enter sib2, iclass 37, count 2 2006.230.00:36:12.65#ibcon#flushed, iclass 37, count 2 2006.230.00:36:12.65#ibcon#about to write, iclass 37, count 2 2006.230.00:36:12.65#ibcon#wrote, iclass 37, count 2 2006.230.00:36:12.65#ibcon#about to read 3, iclass 37, count 2 2006.230.00:36:12.67#ibcon#read 3, iclass 37, count 2 2006.230.00:36:12.67#ibcon#about to read 4, iclass 37, count 2 2006.230.00:36:12.67#ibcon#read 4, iclass 37, count 2 2006.230.00:36:12.67#ibcon#about to read 5, iclass 37, count 2 2006.230.00:36:12.67#ibcon#read 5, iclass 37, count 2 2006.230.00:36:12.67#ibcon#about to read 6, iclass 37, count 2 2006.230.00:36:12.67#ibcon#read 6, iclass 37, count 2 2006.230.00:36:12.67#ibcon#end of sib2, iclass 37, count 2 2006.230.00:36:12.67#ibcon#*mode == 0, iclass 37, count 2 2006.230.00:36:12.67#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.00:36:12.67#ibcon#[25=AT05-04\r\n] 2006.230.00:36:12.67#ibcon#*before write, iclass 37, count 2 2006.230.00:36:12.67#ibcon#enter sib2, iclass 37, count 2 2006.230.00:36:12.67#ibcon#flushed, iclass 37, count 2 2006.230.00:36:12.67#ibcon#about to write, iclass 37, count 2 2006.230.00:36:12.67#ibcon#wrote, iclass 37, count 2 2006.230.00:36:12.67#ibcon#about to read 3, iclass 37, count 2 2006.230.00:36:12.70#ibcon#read 3, iclass 37, count 2 2006.230.00:36:12.70#ibcon#about to read 4, iclass 37, count 2 2006.230.00:36:12.70#ibcon#read 4, iclass 37, count 2 2006.230.00:36:12.70#ibcon#about to read 5, iclass 37, count 2 2006.230.00:36:12.70#ibcon#read 5, iclass 37, count 2 2006.230.00:36:12.70#ibcon#about to read 6, iclass 37, count 2 2006.230.00:36:12.70#ibcon#read 6, iclass 37, count 2 2006.230.00:36:12.70#ibcon#end of sib2, iclass 37, count 2 2006.230.00:36:12.70#ibcon#*after write, iclass 37, count 2 2006.230.00:36:12.70#ibcon#*before return 0, iclass 37, count 2 2006.230.00:36:12.70#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:12.70#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:12.70#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.00:36:12.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:12.70#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:12.82#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:12.82#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:12.82#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:36:12.82#ibcon#first serial, iclass 37, count 0 2006.230.00:36:12.82#ibcon#enter sib2, iclass 37, count 0 2006.230.00:36:12.82#ibcon#flushed, iclass 37, count 0 2006.230.00:36:12.82#ibcon#about to write, iclass 37, count 0 2006.230.00:36:12.82#ibcon#wrote, iclass 37, count 0 2006.230.00:36:12.82#ibcon#about to read 3, iclass 37, count 0 2006.230.00:36:12.84#ibcon#read 3, iclass 37, count 0 2006.230.00:36:12.84#ibcon#about to read 4, iclass 37, count 0 2006.230.00:36:12.84#ibcon#read 4, iclass 37, count 0 2006.230.00:36:12.84#ibcon#about to read 5, iclass 37, count 0 2006.230.00:36:12.84#ibcon#read 5, iclass 37, count 0 2006.230.00:36:12.84#ibcon#about to read 6, iclass 37, count 0 2006.230.00:36:12.84#ibcon#read 6, iclass 37, count 0 2006.230.00:36:12.84#ibcon#end of sib2, iclass 37, count 0 2006.230.00:36:12.84#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:36:12.84#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:36:12.84#ibcon#[25=USB\r\n] 2006.230.00:36:12.84#ibcon#*before write, iclass 37, count 0 2006.230.00:36:12.84#ibcon#enter sib2, iclass 37, count 0 2006.230.00:36:12.84#ibcon#flushed, iclass 37, count 0 2006.230.00:36:12.84#ibcon#about to write, iclass 37, count 0 2006.230.00:36:12.84#ibcon#wrote, iclass 37, count 0 2006.230.00:36:12.84#ibcon#about to read 3, iclass 37, count 0 2006.230.00:36:12.87#ibcon#read 3, iclass 37, count 0 2006.230.00:36:12.87#ibcon#about to read 4, iclass 37, count 0 2006.230.00:36:12.87#ibcon#read 4, iclass 37, count 0 2006.230.00:36:12.87#ibcon#about to read 5, iclass 37, count 0 2006.230.00:36:12.87#ibcon#read 5, iclass 37, count 0 2006.230.00:36:12.87#ibcon#about to read 6, iclass 37, count 0 2006.230.00:36:12.87#ibcon#read 6, iclass 37, count 0 2006.230.00:36:12.87#ibcon#end of sib2, iclass 37, count 0 2006.230.00:36:12.87#ibcon#*after write, iclass 37, count 0 2006.230.00:36:12.87#ibcon#*before return 0, iclass 37, count 0 2006.230.00:36:12.87#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:12.87#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:12.87#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:36:12.87#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:36:12.87$vck44/valo=6,814.99 2006.230.00:36:12.87#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.00:36:12.87#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.00:36:12.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:12.87#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:12.87#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:12.87#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:12.87#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:36:12.87#ibcon#first serial, iclass 39, count 0 2006.230.00:36:12.87#ibcon#enter sib2, iclass 39, count 0 2006.230.00:36:12.87#ibcon#flushed, iclass 39, count 0 2006.230.00:36:12.87#ibcon#about to write, iclass 39, count 0 2006.230.00:36:12.87#ibcon#wrote, iclass 39, count 0 2006.230.00:36:12.87#ibcon#about to read 3, iclass 39, count 0 2006.230.00:36:12.89#ibcon#read 3, iclass 39, count 0 2006.230.00:36:12.89#ibcon#about to read 4, iclass 39, count 0 2006.230.00:36:12.89#ibcon#read 4, iclass 39, count 0 2006.230.00:36:12.89#ibcon#about to read 5, iclass 39, count 0 2006.230.00:36:12.89#ibcon#read 5, iclass 39, count 0 2006.230.00:36:12.89#ibcon#about to read 6, iclass 39, count 0 2006.230.00:36:12.89#ibcon#read 6, iclass 39, count 0 2006.230.00:36:12.89#ibcon#end of sib2, iclass 39, count 0 2006.230.00:36:12.89#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:36:12.89#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:36:12.89#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:36:12.89#ibcon#*before write, iclass 39, count 0 2006.230.00:36:12.89#ibcon#enter sib2, iclass 39, count 0 2006.230.00:36:12.89#ibcon#flushed, iclass 39, count 0 2006.230.00:36:12.89#ibcon#about to write, iclass 39, count 0 2006.230.00:36:12.89#ibcon#wrote, iclass 39, count 0 2006.230.00:36:12.89#ibcon#about to read 3, iclass 39, count 0 2006.230.00:36:12.93#ibcon#read 3, iclass 39, count 0 2006.230.00:36:12.93#ibcon#about to read 4, iclass 39, count 0 2006.230.00:36:12.93#ibcon#read 4, iclass 39, count 0 2006.230.00:36:12.93#ibcon#about to read 5, iclass 39, count 0 2006.230.00:36:12.93#ibcon#read 5, iclass 39, count 0 2006.230.00:36:12.93#ibcon#about to read 6, iclass 39, count 0 2006.230.00:36:12.93#ibcon#read 6, iclass 39, count 0 2006.230.00:36:12.93#ibcon#end of sib2, iclass 39, count 0 2006.230.00:36:12.93#ibcon#*after write, iclass 39, count 0 2006.230.00:36:12.93#ibcon#*before return 0, iclass 39, count 0 2006.230.00:36:12.93#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:12.93#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:12.93#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:36:12.93#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:36:12.93$vck44/va=6,4 2006.230.00:36:12.93#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.00:36:12.93#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.00:36:12.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:12.93#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:12.99#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:12.99#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:12.99#ibcon#enter wrdev, iclass 3, count 2 2006.230.00:36:12.99#ibcon#first serial, iclass 3, count 2 2006.230.00:36:12.99#ibcon#enter sib2, iclass 3, count 2 2006.230.00:36:12.99#ibcon#flushed, iclass 3, count 2 2006.230.00:36:12.99#ibcon#about to write, iclass 3, count 2 2006.230.00:36:12.99#ibcon#wrote, iclass 3, count 2 2006.230.00:36:12.99#ibcon#about to read 3, iclass 3, count 2 2006.230.00:36:13.01#ibcon#read 3, iclass 3, count 2 2006.230.00:36:13.01#ibcon#about to read 4, iclass 3, count 2 2006.230.00:36:13.01#ibcon#read 4, iclass 3, count 2 2006.230.00:36:13.01#ibcon#about to read 5, iclass 3, count 2 2006.230.00:36:13.01#ibcon#read 5, iclass 3, count 2 2006.230.00:36:13.01#ibcon#about to read 6, iclass 3, count 2 2006.230.00:36:13.01#ibcon#read 6, iclass 3, count 2 2006.230.00:36:13.01#ibcon#end of sib2, iclass 3, count 2 2006.230.00:36:13.01#ibcon#*mode == 0, iclass 3, count 2 2006.230.00:36:13.01#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.00:36:13.01#ibcon#[25=AT06-04\r\n] 2006.230.00:36:13.01#ibcon#*before write, iclass 3, count 2 2006.230.00:36:13.01#ibcon#enter sib2, iclass 3, count 2 2006.230.00:36:13.01#ibcon#flushed, iclass 3, count 2 2006.230.00:36:13.01#ibcon#about to write, iclass 3, count 2 2006.230.00:36:13.01#ibcon#wrote, iclass 3, count 2 2006.230.00:36:13.01#ibcon#about to read 3, iclass 3, count 2 2006.230.00:36:13.04#ibcon#read 3, iclass 3, count 2 2006.230.00:36:13.04#ibcon#about to read 4, iclass 3, count 2 2006.230.00:36:13.04#ibcon#read 4, iclass 3, count 2 2006.230.00:36:13.04#ibcon#about to read 5, iclass 3, count 2 2006.230.00:36:13.04#ibcon#read 5, iclass 3, count 2 2006.230.00:36:13.04#ibcon#about to read 6, iclass 3, count 2 2006.230.00:36:13.04#ibcon#read 6, iclass 3, count 2 2006.230.00:36:13.04#ibcon#end of sib2, iclass 3, count 2 2006.230.00:36:13.04#ibcon#*after write, iclass 3, count 2 2006.230.00:36:13.04#ibcon#*before return 0, iclass 3, count 2 2006.230.00:36:13.04#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:13.04#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:13.04#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.00:36:13.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:13.04#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:13.16#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:13.16#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:13.16#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:36:13.16#ibcon#first serial, iclass 3, count 0 2006.230.00:36:13.16#ibcon#enter sib2, iclass 3, count 0 2006.230.00:36:13.16#ibcon#flushed, iclass 3, count 0 2006.230.00:36:13.16#ibcon#about to write, iclass 3, count 0 2006.230.00:36:13.16#ibcon#wrote, iclass 3, count 0 2006.230.00:36:13.16#ibcon#about to read 3, iclass 3, count 0 2006.230.00:36:13.18#ibcon#read 3, iclass 3, count 0 2006.230.00:36:13.18#ibcon#about to read 4, iclass 3, count 0 2006.230.00:36:13.18#ibcon#read 4, iclass 3, count 0 2006.230.00:36:13.18#ibcon#about to read 5, iclass 3, count 0 2006.230.00:36:13.18#ibcon#read 5, iclass 3, count 0 2006.230.00:36:13.18#ibcon#about to read 6, iclass 3, count 0 2006.230.00:36:13.18#ibcon#read 6, iclass 3, count 0 2006.230.00:36:13.18#ibcon#end of sib2, iclass 3, count 0 2006.230.00:36:13.18#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:36:13.18#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:36:13.18#ibcon#[25=USB\r\n] 2006.230.00:36:13.18#ibcon#*before write, iclass 3, count 0 2006.230.00:36:13.18#ibcon#enter sib2, iclass 3, count 0 2006.230.00:36:13.18#ibcon#flushed, iclass 3, count 0 2006.230.00:36:13.18#ibcon#about to write, iclass 3, count 0 2006.230.00:36:13.18#ibcon#wrote, iclass 3, count 0 2006.230.00:36:13.18#ibcon#about to read 3, iclass 3, count 0 2006.230.00:36:13.21#ibcon#read 3, iclass 3, count 0 2006.230.00:36:13.21#ibcon#about to read 4, iclass 3, count 0 2006.230.00:36:13.21#ibcon#read 4, iclass 3, count 0 2006.230.00:36:13.21#ibcon#about to read 5, iclass 3, count 0 2006.230.00:36:13.21#ibcon#read 5, iclass 3, count 0 2006.230.00:36:13.21#ibcon#about to read 6, iclass 3, count 0 2006.230.00:36:13.21#ibcon#read 6, iclass 3, count 0 2006.230.00:36:13.21#ibcon#end of sib2, iclass 3, count 0 2006.230.00:36:13.21#ibcon#*after write, iclass 3, count 0 2006.230.00:36:13.21#ibcon#*before return 0, iclass 3, count 0 2006.230.00:36:13.21#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:13.21#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:13.21#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:36:13.21#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:36:13.21$vck44/valo=7,864.99 2006.230.00:36:13.21#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.00:36:13.21#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.00:36:13.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:13.21#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:13.21#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:13.21#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:13.21#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:36:13.21#ibcon#first serial, iclass 5, count 0 2006.230.00:36:13.21#ibcon#enter sib2, iclass 5, count 0 2006.230.00:36:13.21#ibcon#flushed, iclass 5, count 0 2006.230.00:36:13.21#ibcon#about to write, iclass 5, count 0 2006.230.00:36:13.21#ibcon#wrote, iclass 5, count 0 2006.230.00:36:13.21#ibcon#about to read 3, iclass 5, count 0 2006.230.00:36:13.23#ibcon#read 3, iclass 5, count 0 2006.230.00:36:13.23#ibcon#about to read 4, iclass 5, count 0 2006.230.00:36:13.23#ibcon#read 4, iclass 5, count 0 2006.230.00:36:13.23#ibcon#about to read 5, iclass 5, count 0 2006.230.00:36:13.23#ibcon#read 5, iclass 5, count 0 2006.230.00:36:13.23#ibcon#about to read 6, iclass 5, count 0 2006.230.00:36:13.23#ibcon#read 6, iclass 5, count 0 2006.230.00:36:13.23#ibcon#end of sib2, iclass 5, count 0 2006.230.00:36:13.23#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:36:13.23#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:36:13.23#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:36:13.23#ibcon#*before write, iclass 5, count 0 2006.230.00:36:13.23#ibcon#enter sib2, iclass 5, count 0 2006.230.00:36:13.23#ibcon#flushed, iclass 5, count 0 2006.230.00:36:13.23#ibcon#about to write, iclass 5, count 0 2006.230.00:36:13.23#ibcon#wrote, iclass 5, count 0 2006.230.00:36:13.23#ibcon#about to read 3, iclass 5, count 0 2006.230.00:36:13.27#ibcon#read 3, iclass 5, count 0 2006.230.00:36:13.27#ibcon#about to read 4, iclass 5, count 0 2006.230.00:36:13.27#ibcon#read 4, iclass 5, count 0 2006.230.00:36:13.27#ibcon#about to read 5, iclass 5, count 0 2006.230.00:36:13.27#ibcon#read 5, iclass 5, count 0 2006.230.00:36:13.27#ibcon#about to read 6, iclass 5, count 0 2006.230.00:36:13.27#ibcon#read 6, iclass 5, count 0 2006.230.00:36:13.27#ibcon#end of sib2, iclass 5, count 0 2006.230.00:36:13.27#ibcon#*after write, iclass 5, count 0 2006.230.00:36:13.27#ibcon#*before return 0, iclass 5, count 0 2006.230.00:36:13.27#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:13.27#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:13.27#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:36:13.27#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:36:13.27$vck44/va=7,5 2006.230.00:36:13.27#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.00:36:13.27#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.00:36:13.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:13.27#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:13.33#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:13.33#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:13.33#ibcon#enter wrdev, iclass 7, count 2 2006.230.00:36:13.33#ibcon#first serial, iclass 7, count 2 2006.230.00:36:13.33#ibcon#enter sib2, iclass 7, count 2 2006.230.00:36:13.33#ibcon#flushed, iclass 7, count 2 2006.230.00:36:13.33#ibcon#about to write, iclass 7, count 2 2006.230.00:36:13.33#ibcon#wrote, iclass 7, count 2 2006.230.00:36:13.33#ibcon#about to read 3, iclass 7, count 2 2006.230.00:36:13.35#ibcon#read 3, iclass 7, count 2 2006.230.00:36:13.35#ibcon#about to read 4, iclass 7, count 2 2006.230.00:36:13.35#ibcon#read 4, iclass 7, count 2 2006.230.00:36:13.35#ibcon#about to read 5, iclass 7, count 2 2006.230.00:36:13.35#ibcon#read 5, iclass 7, count 2 2006.230.00:36:13.35#ibcon#about to read 6, iclass 7, count 2 2006.230.00:36:13.35#ibcon#read 6, iclass 7, count 2 2006.230.00:36:13.35#ibcon#end of sib2, iclass 7, count 2 2006.230.00:36:13.35#ibcon#*mode == 0, iclass 7, count 2 2006.230.00:36:13.35#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.00:36:13.35#ibcon#[25=AT07-05\r\n] 2006.230.00:36:13.35#ibcon#*before write, iclass 7, count 2 2006.230.00:36:13.35#ibcon#enter sib2, iclass 7, count 2 2006.230.00:36:13.35#ibcon#flushed, iclass 7, count 2 2006.230.00:36:13.35#ibcon#about to write, iclass 7, count 2 2006.230.00:36:13.35#ibcon#wrote, iclass 7, count 2 2006.230.00:36:13.35#ibcon#about to read 3, iclass 7, count 2 2006.230.00:36:13.38#ibcon#read 3, iclass 7, count 2 2006.230.00:36:13.38#ibcon#about to read 4, iclass 7, count 2 2006.230.00:36:13.38#ibcon#read 4, iclass 7, count 2 2006.230.00:36:13.38#ibcon#about to read 5, iclass 7, count 2 2006.230.00:36:13.38#ibcon#read 5, iclass 7, count 2 2006.230.00:36:13.38#ibcon#about to read 6, iclass 7, count 2 2006.230.00:36:13.38#ibcon#read 6, iclass 7, count 2 2006.230.00:36:13.38#ibcon#end of sib2, iclass 7, count 2 2006.230.00:36:13.38#ibcon#*after write, iclass 7, count 2 2006.230.00:36:13.38#ibcon#*before return 0, iclass 7, count 2 2006.230.00:36:13.38#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:13.38#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:13.38#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.00:36:13.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:13.38#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:13.50#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:13.50#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:13.50#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:36:13.50#ibcon#first serial, iclass 7, count 0 2006.230.00:36:13.50#ibcon#enter sib2, iclass 7, count 0 2006.230.00:36:13.50#ibcon#flushed, iclass 7, count 0 2006.230.00:36:13.50#ibcon#about to write, iclass 7, count 0 2006.230.00:36:13.50#ibcon#wrote, iclass 7, count 0 2006.230.00:36:13.50#ibcon#about to read 3, iclass 7, count 0 2006.230.00:36:13.52#ibcon#read 3, iclass 7, count 0 2006.230.00:36:13.52#ibcon#about to read 4, iclass 7, count 0 2006.230.00:36:13.52#ibcon#read 4, iclass 7, count 0 2006.230.00:36:13.52#ibcon#about to read 5, iclass 7, count 0 2006.230.00:36:13.52#ibcon#read 5, iclass 7, count 0 2006.230.00:36:13.52#ibcon#about to read 6, iclass 7, count 0 2006.230.00:36:13.52#ibcon#read 6, iclass 7, count 0 2006.230.00:36:13.52#ibcon#end of sib2, iclass 7, count 0 2006.230.00:36:13.52#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:36:13.52#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:36:13.52#ibcon#[25=USB\r\n] 2006.230.00:36:13.52#ibcon#*before write, iclass 7, count 0 2006.230.00:36:13.52#ibcon#enter sib2, iclass 7, count 0 2006.230.00:36:13.52#ibcon#flushed, iclass 7, count 0 2006.230.00:36:13.52#ibcon#about to write, iclass 7, count 0 2006.230.00:36:13.52#ibcon#wrote, iclass 7, count 0 2006.230.00:36:13.52#ibcon#about to read 3, iclass 7, count 0 2006.230.00:36:13.55#ibcon#read 3, iclass 7, count 0 2006.230.00:36:13.55#ibcon#about to read 4, iclass 7, count 0 2006.230.00:36:13.55#ibcon#read 4, iclass 7, count 0 2006.230.00:36:13.55#ibcon#about to read 5, iclass 7, count 0 2006.230.00:36:13.55#ibcon#read 5, iclass 7, count 0 2006.230.00:36:13.55#ibcon#about to read 6, iclass 7, count 0 2006.230.00:36:13.55#ibcon#read 6, iclass 7, count 0 2006.230.00:36:13.55#ibcon#end of sib2, iclass 7, count 0 2006.230.00:36:13.55#ibcon#*after write, iclass 7, count 0 2006.230.00:36:13.55#ibcon#*before return 0, iclass 7, count 0 2006.230.00:36:13.55#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:13.55#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:13.55#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:36:13.55#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:36:13.55$vck44/valo=8,884.99 2006.230.00:36:13.55#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.00:36:13.55#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.00:36:13.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:13.55#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:13.55#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:13.55#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:13.55#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:36:13.55#ibcon#first serial, iclass 11, count 0 2006.230.00:36:13.55#ibcon#enter sib2, iclass 11, count 0 2006.230.00:36:13.55#ibcon#flushed, iclass 11, count 0 2006.230.00:36:13.55#ibcon#about to write, iclass 11, count 0 2006.230.00:36:13.55#ibcon#wrote, iclass 11, count 0 2006.230.00:36:13.55#ibcon#about to read 3, iclass 11, count 0 2006.230.00:36:13.57#ibcon#read 3, iclass 11, count 0 2006.230.00:36:13.57#ibcon#about to read 4, iclass 11, count 0 2006.230.00:36:13.57#ibcon#read 4, iclass 11, count 0 2006.230.00:36:13.57#ibcon#about to read 5, iclass 11, count 0 2006.230.00:36:13.57#ibcon#read 5, iclass 11, count 0 2006.230.00:36:13.57#ibcon#about to read 6, iclass 11, count 0 2006.230.00:36:13.57#ibcon#read 6, iclass 11, count 0 2006.230.00:36:13.57#ibcon#end of sib2, iclass 11, count 0 2006.230.00:36:13.57#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:36:13.57#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:36:13.57#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:36:13.57#ibcon#*before write, iclass 11, count 0 2006.230.00:36:13.57#ibcon#enter sib2, iclass 11, count 0 2006.230.00:36:13.57#ibcon#flushed, iclass 11, count 0 2006.230.00:36:13.57#ibcon#about to write, iclass 11, count 0 2006.230.00:36:13.57#ibcon#wrote, iclass 11, count 0 2006.230.00:36:13.57#ibcon#about to read 3, iclass 11, count 0 2006.230.00:36:13.61#ibcon#read 3, iclass 11, count 0 2006.230.00:36:13.61#ibcon#about to read 4, iclass 11, count 0 2006.230.00:36:13.61#ibcon#read 4, iclass 11, count 0 2006.230.00:36:13.61#ibcon#about to read 5, iclass 11, count 0 2006.230.00:36:13.61#ibcon#read 5, iclass 11, count 0 2006.230.00:36:13.61#ibcon#about to read 6, iclass 11, count 0 2006.230.00:36:13.61#ibcon#read 6, iclass 11, count 0 2006.230.00:36:13.61#ibcon#end of sib2, iclass 11, count 0 2006.230.00:36:13.61#ibcon#*after write, iclass 11, count 0 2006.230.00:36:13.61#ibcon#*before return 0, iclass 11, count 0 2006.230.00:36:13.61#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:13.61#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:13.61#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:36:13.61#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:36:13.61$vck44/va=8,6 2006.230.00:36:13.61#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.00:36:13.61#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.00:36:13.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:13.61#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:13.67#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:13.67#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:13.67#ibcon#enter wrdev, iclass 13, count 2 2006.230.00:36:13.67#ibcon#first serial, iclass 13, count 2 2006.230.00:36:13.67#ibcon#enter sib2, iclass 13, count 2 2006.230.00:36:13.67#ibcon#flushed, iclass 13, count 2 2006.230.00:36:13.67#ibcon#about to write, iclass 13, count 2 2006.230.00:36:13.67#ibcon#wrote, iclass 13, count 2 2006.230.00:36:13.67#ibcon#about to read 3, iclass 13, count 2 2006.230.00:36:13.69#ibcon#read 3, iclass 13, count 2 2006.230.00:36:13.69#ibcon#about to read 4, iclass 13, count 2 2006.230.00:36:13.69#ibcon#read 4, iclass 13, count 2 2006.230.00:36:13.69#ibcon#about to read 5, iclass 13, count 2 2006.230.00:36:13.69#ibcon#read 5, iclass 13, count 2 2006.230.00:36:13.69#ibcon#about to read 6, iclass 13, count 2 2006.230.00:36:13.69#ibcon#read 6, iclass 13, count 2 2006.230.00:36:13.69#ibcon#end of sib2, iclass 13, count 2 2006.230.00:36:13.69#ibcon#*mode == 0, iclass 13, count 2 2006.230.00:36:13.69#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.00:36:13.69#ibcon#[25=AT08-06\r\n] 2006.230.00:36:13.69#ibcon#*before write, iclass 13, count 2 2006.230.00:36:13.69#ibcon#enter sib2, iclass 13, count 2 2006.230.00:36:13.69#ibcon#flushed, iclass 13, count 2 2006.230.00:36:13.69#ibcon#about to write, iclass 13, count 2 2006.230.00:36:13.69#ibcon#wrote, iclass 13, count 2 2006.230.00:36:13.69#ibcon#about to read 3, iclass 13, count 2 2006.230.00:36:13.72#ibcon#read 3, iclass 13, count 2 2006.230.00:36:13.72#ibcon#about to read 4, iclass 13, count 2 2006.230.00:36:13.72#ibcon#read 4, iclass 13, count 2 2006.230.00:36:13.72#ibcon#about to read 5, iclass 13, count 2 2006.230.00:36:13.72#ibcon#read 5, iclass 13, count 2 2006.230.00:36:13.72#ibcon#about to read 6, iclass 13, count 2 2006.230.00:36:13.72#ibcon#read 6, iclass 13, count 2 2006.230.00:36:13.72#ibcon#end of sib2, iclass 13, count 2 2006.230.00:36:13.72#ibcon#*after write, iclass 13, count 2 2006.230.00:36:13.72#ibcon#*before return 0, iclass 13, count 2 2006.230.00:36:13.72#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:13.72#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:13.72#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.00:36:13.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:13.72#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:13.84#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:13.84#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:13.84#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:36:13.84#ibcon#first serial, iclass 13, count 0 2006.230.00:36:13.84#ibcon#enter sib2, iclass 13, count 0 2006.230.00:36:13.84#ibcon#flushed, iclass 13, count 0 2006.230.00:36:13.84#ibcon#about to write, iclass 13, count 0 2006.230.00:36:13.84#ibcon#wrote, iclass 13, count 0 2006.230.00:36:13.84#ibcon#about to read 3, iclass 13, count 0 2006.230.00:36:13.86#ibcon#read 3, iclass 13, count 0 2006.230.00:36:13.86#ibcon#about to read 4, iclass 13, count 0 2006.230.00:36:13.86#ibcon#read 4, iclass 13, count 0 2006.230.00:36:13.86#ibcon#about to read 5, iclass 13, count 0 2006.230.00:36:13.86#ibcon#read 5, iclass 13, count 0 2006.230.00:36:13.86#ibcon#about to read 6, iclass 13, count 0 2006.230.00:36:13.86#ibcon#read 6, iclass 13, count 0 2006.230.00:36:13.86#ibcon#end of sib2, iclass 13, count 0 2006.230.00:36:13.86#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:36:13.86#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:36:13.86#ibcon#[25=USB\r\n] 2006.230.00:36:13.86#ibcon#*before write, iclass 13, count 0 2006.230.00:36:13.86#ibcon#enter sib2, iclass 13, count 0 2006.230.00:36:13.86#ibcon#flushed, iclass 13, count 0 2006.230.00:36:13.86#ibcon#about to write, iclass 13, count 0 2006.230.00:36:13.86#ibcon#wrote, iclass 13, count 0 2006.230.00:36:13.86#ibcon#about to read 3, iclass 13, count 0 2006.230.00:36:13.89#ibcon#read 3, iclass 13, count 0 2006.230.00:36:13.89#ibcon#about to read 4, iclass 13, count 0 2006.230.00:36:13.89#ibcon#read 4, iclass 13, count 0 2006.230.00:36:13.89#ibcon#about to read 5, iclass 13, count 0 2006.230.00:36:13.89#ibcon#read 5, iclass 13, count 0 2006.230.00:36:13.89#ibcon#about to read 6, iclass 13, count 0 2006.230.00:36:13.89#ibcon#read 6, iclass 13, count 0 2006.230.00:36:13.89#ibcon#end of sib2, iclass 13, count 0 2006.230.00:36:13.89#ibcon#*after write, iclass 13, count 0 2006.230.00:36:13.89#ibcon#*before return 0, iclass 13, count 0 2006.230.00:36:13.89#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:13.89#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:13.89#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:36:13.89#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:36:13.89$vck44/vblo=1,629.99 2006.230.00:36:13.89#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.00:36:13.89#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.00:36:13.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:13.89#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:13.89#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:13.89#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:13.89#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:36:13.89#ibcon#first serial, iclass 15, count 0 2006.230.00:36:13.89#ibcon#enter sib2, iclass 15, count 0 2006.230.00:36:13.89#ibcon#flushed, iclass 15, count 0 2006.230.00:36:13.89#ibcon#about to write, iclass 15, count 0 2006.230.00:36:13.89#ibcon#wrote, iclass 15, count 0 2006.230.00:36:13.89#ibcon#about to read 3, iclass 15, count 0 2006.230.00:36:13.91#ibcon#read 3, iclass 15, count 0 2006.230.00:36:13.91#ibcon#about to read 4, iclass 15, count 0 2006.230.00:36:13.91#ibcon#read 4, iclass 15, count 0 2006.230.00:36:13.91#ibcon#about to read 5, iclass 15, count 0 2006.230.00:36:13.91#ibcon#read 5, iclass 15, count 0 2006.230.00:36:13.91#ibcon#about to read 6, iclass 15, count 0 2006.230.00:36:13.91#ibcon#read 6, iclass 15, count 0 2006.230.00:36:13.91#ibcon#end of sib2, iclass 15, count 0 2006.230.00:36:13.91#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:36:13.91#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:36:13.91#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:36:13.91#ibcon#*before write, iclass 15, count 0 2006.230.00:36:13.91#ibcon#enter sib2, iclass 15, count 0 2006.230.00:36:13.91#ibcon#flushed, iclass 15, count 0 2006.230.00:36:13.91#ibcon#about to write, iclass 15, count 0 2006.230.00:36:13.91#ibcon#wrote, iclass 15, count 0 2006.230.00:36:13.91#ibcon#about to read 3, iclass 15, count 0 2006.230.00:36:13.95#ibcon#read 3, iclass 15, count 0 2006.230.00:36:13.95#ibcon#about to read 4, iclass 15, count 0 2006.230.00:36:13.95#ibcon#read 4, iclass 15, count 0 2006.230.00:36:13.95#ibcon#about to read 5, iclass 15, count 0 2006.230.00:36:13.95#ibcon#read 5, iclass 15, count 0 2006.230.00:36:13.95#ibcon#about to read 6, iclass 15, count 0 2006.230.00:36:13.95#ibcon#read 6, iclass 15, count 0 2006.230.00:36:13.95#ibcon#end of sib2, iclass 15, count 0 2006.230.00:36:13.95#ibcon#*after write, iclass 15, count 0 2006.230.00:36:13.95#ibcon#*before return 0, iclass 15, count 0 2006.230.00:36:13.95#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:13.95#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:13.95#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:36:13.95#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:36:13.95$vck44/vb=1,4 2006.230.00:36:13.95#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.230.00:36:13.95#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.230.00:36:13.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:13.95#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:36:13.95#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:36:13.95#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:36:13.95#ibcon#enter wrdev, iclass 17, count 2 2006.230.00:36:13.95#ibcon#first serial, iclass 17, count 2 2006.230.00:36:13.95#ibcon#enter sib2, iclass 17, count 2 2006.230.00:36:13.95#ibcon#flushed, iclass 17, count 2 2006.230.00:36:13.95#ibcon#about to write, iclass 17, count 2 2006.230.00:36:13.95#ibcon#wrote, iclass 17, count 2 2006.230.00:36:13.95#ibcon#about to read 3, iclass 17, count 2 2006.230.00:36:13.97#ibcon#read 3, iclass 17, count 2 2006.230.00:36:13.97#ibcon#about to read 4, iclass 17, count 2 2006.230.00:36:13.97#ibcon#read 4, iclass 17, count 2 2006.230.00:36:13.97#ibcon#about to read 5, iclass 17, count 2 2006.230.00:36:13.97#ibcon#read 5, iclass 17, count 2 2006.230.00:36:13.97#ibcon#about to read 6, iclass 17, count 2 2006.230.00:36:13.97#ibcon#read 6, iclass 17, count 2 2006.230.00:36:13.97#ibcon#end of sib2, iclass 17, count 2 2006.230.00:36:13.97#ibcon#*mode == 0, iclass 17, count 2 2006.230.00:36:13.97#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.230.00:36:13.97#ibcon#[27=AT01-04\r\n] 2006.230.00:36:13.97#ibcon#*before write, iclass 17, count 2 2006.230.00:36:13.97#ibcon#enter sib2, iclass 17, count 2 2006.230.00:36:13.97#ibcon#flushed, iclass 17, count 2 2006.230.00:36:13.97#ibcon#about to write, iclass 17, count 2 2006.230.00:36:13.97#ibcon#wrote, iclass 17, count 2 2006.230.00:36:13.97#ibcon#about to read 3, iclass 17, count 2 2006.230.00:36:14.00#ibcon#read 3, iclass 17, count 2 2006.230.00:36:14.00#ibcon#about to read 4, iclass 17, count 2 2006.230.00:36:14.00#ibcon#read 4, iclass 17, count 2 2006.230.00:36:14.00#ibcon#about to read 5, iclass 17, count 2 2006.230.00:36:14.00#ibcon#read 5, iclass 17, count 2 2006.230.00:36:14.00#ibcon#about to read 6, iclass 17, count 2 2006.230.00:36:14.00#ibcon#read 6, iclass 17, count 2 2006.230.00:36:14.00#ibcon#end of sib2, iclass 17, count 2 2006.230.00:36:14.00#ibcon#*after write, iclass 17, count 2 2006.230.00:36:14.00#ibcon#*before return 0, iclass 17, count 2 2006.230.00:36:14.00#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:36:14.00#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.230.00:36:14.00#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.230.00:36:14.00#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:14.00#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:36:14.12#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:36:14.12#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:36:14.12#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:36:14.12#ibcon#first serial, iclass 17, count 0 2006.230.00:36:14.12#ibcon#enter sib2, iclass 17, count 0 2006.230.00:36:14.12#ibcon#flushed, iclass 17, count 0 2006.230.00:36:14.12#ibcon#about to write, iclass 17, count 0 2006.230.00:36:14.12#ibcon#wrote, iclass 17, count 0 2006.230.00:36:14.12#ibcon#about to read 3, iclass 17, count 0 2006.230.00:36:14.14#ibcon#read 3, iclass 17, count 0 2006.230.00:36:14.14#ibcon#about to read 4, iclass 17, count 0 2006.230.00:36:14.14#ibcon#read 4, iclass 17, count 0 2006.230.00:36:14.14#ibcon#about to read 5, iclass 17, count 0 2006.230.00:36:14.14#ibcon#read 5, iclass 17, count 0 2006.230.00:36:14.14#ibcon#about to read 6, iclass 17, count 0 2006.230.00:36:14.14#ibcon#read 6, iclass 17, count 0 2006.230.00:36:14.14#ibcon#end of sib2, iclass 17, count 0 2006.230.00:36:14.14#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:36:14.14#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:36:14.14#ibcon#[27=USB\r\n] 2006.230.00:36:14.14#ibcon#*before write, iclass 17, count 0 2006.230.00:36:14.14#ibcon#enter sib2, iclass 17, count 0 2006.230.00:36:14.14#ibcon#flushed, iclass 17, count 0 2006.230.00:36:14.14#ibcon#about to write, iclass 17, count 0 2006.230.00:36:14.14#ibcon#wrote, iclass 17, count 0 2006.230.00:36:14.14#ibcon#about to read 3, iclass 17, count 0 2006.230.00:36:14.17#ibcon#read 3, iclass 17, count 0 2006.230.00:36:14.17#ibcon#about to read 4, iclass 17, count 0 2006.230.00:36:14.17#ibcon#read 4, iclass 17, count 0 2006.230.00:36:14.17#ibcon#about to read 5, iclass 17, count 0 2006.230.00:36:14.17#ibcon#read 5, iclass 17, count 0 2006.230.00:36:14.17#ibcon#about to read 6, iclass 17, count 0 2006.230.00:36:14.17#ibcon#read 6, iclass 17, count 0 2006.230.00:36:14.17#ibcon#end of sib2, iclass 17, count 0 2006.230.00:36:14.17#ibcon#*after write, iclass 17, count 0 2006.230.00:36:14.17#ibcon#*before return 0, iclass 17, count 0 2006.230.00:36:14.17#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:36:14.17#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.230.00:36:14.17#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:36:14.17#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:36:14.17$vck44/vblo=2,634.99 2006.230.00:36:14.17#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.00:36:14.17#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.00:36:14.17#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:14.17#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:14.17#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:14.17#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:14.17#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:36:14.17#ibcon#first serial, iclass 19, count 0 2006.230.00:36:14.17#ibcon#enter sib2, iclass 19, count 0 2006.230.00:36:14.17#ibcon#flushed, iclass 19, count 0 2006.230.00:36:14.17#ibcon#about to write, iclass 19, count 0 2006.230.00:36:14.17#ibcon#wrote, iclass 19, count 0 2006.230.00:36:14.17#ibcon#about to read 3, iclass 19, count 0 2006.230.00:36:14.19#ibcon#read 3, iclass 19, count 0 2006.230.00:36:14.19#ibcon#about to read 4, iclass 19, count 0 2006.230.00:36:14.19#ibcon#read 4, iclass 19, count 0 2006.230.00:36:14.19#ibcon#about to read 5, iclass 19, count 0 2006.230.00:36:14.19#ibcon#read 5, iclass 19, count 0 2006.230.00:36:14.19#ibcon#about to read 6, iclass 19, count 0 2006.230.00:36:14.19#ibcon#read 6, iclass 19, count 0 2006.230.00:36:14.19#ibcon#end of sib2, iclass 19, count 0 2006.230.00:36:14.19#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:36:14.19#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:36:14.19#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:36:14.19#ibcon#*before write, iclass 19, count 0 2006.230.00:36:14.19#ibcon#enter sib2, iclass 19, count 0 2006.230.00:36:14.19#ibcon#flushed, iclass 19, count 0 2006.230.00:36:14.19#ibcon#about to write, iclass 19, count 0 2006.230.00:36:14.19#ibcon#wrote, iclass 19, count 0 2006.230.00:36:14.19#ibcon#about to read 3, iclass 19, count 0 2006.230.00:36:14.23#ibcon#read 3, iclass 19, count 0 2006.230.00:36:14.23#ibcon#about to read 4, iclass 19, count 0 2006.230.00:36:14.23#ibcon#read 4, iclass 19, count 0 2006.230.00:36:14.23#ibcon#about to read 5, iclass 19, count 0 2006.230.00:36:14.23#ibcon#read 5, iclass 19, count 0 2006.230.00:36:14.23#ibcon#about to read 6, iclass 19, count 0 2006.230.00:36:14.23#ibcon#read 6, iclass 19, count 0 2006.230.00:36:14.23#ibcon#end of sib2, iclass 19, count 0 2006.230.00:36:14.23#ibcon#*after write, iclass 19, count 0 2006.230.00:36:14.23#ibcon#*before return 0, iclass 19, count 0 2006.230.00:36:14.23#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:14.23#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.00:36:14.23#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:36:14.23#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:36:14.23$vck44/vb=2,4 2006.230.00:36:14.23#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.230.00:36:14.23#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.230.00:36:14.23#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:14.23#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:14.29#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:14.29#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:14.29#ibcon#enter wrdev, iclass 21, count 2 2006.230.00:36:14.29#ibcon#first serial, iclass 21, count 2 2006.230.00:36:14.29#ibcon#enter sib2, iclass 21, count 2 2006.230.00:36:14.29#ibcon#flushed, iclass 21, count 2 2006.230.00:36:14.29#ibcon#about to write, iclass 21, count 2 2006.230.00:36:14.29#ibcon#wrote, iclass 21, count 2 2006.230.00:36:14.29#ibcon#about to read 3, iclass 21, count 2 2006.230.00:36:14.31#ibcon#read 3, iclass 21, count 2 2006.230.00:36:14.31#ibcon#about to read 4, iclass 21, count 2 2006.230.00:36:14.31#ibcon#read 4, iclass 21, count 2 2006.230.00:36:14.31#ibcon#about to read 5, iclass 21, count 2 2006.230.00:36:14.31#ibcon#read 5, iclass 21, count 2 2006.230.00:36:14.31#ibcon#about to read 6, iclass 21, count 2 2006.230.00:36:14.31#ibcon#read 6, iclass 21, count 2 2006.230.00:36:14.31#ibcon#end of sib2, iclass 21, count 2 2006.230.00:36:14.31#ibcon#*mode == 0, iclass 21, count 2 2006.230.00:36:14.31#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.230.00:36:14.31#ibcon#[27=AT02-04\r\n] 2006.230.00:36:14.31#ibcon#*before write, iclass 21, count 2 2006.230.00:36:14.31#ibcon#enter sib2, iclass 21, count 2 2006.230.00:36:14.31#ibcon#flushed, iclass 21, count 2 2006.230.00:36:14.31#ibcon#about to write, iclass 21, count 2 2006.230.00:36:14.31#ibcon#wrote, iclass 21, count 2 2006.230.00:36:14.31#ibcon#about to read 3, iclass 21, count 2 2006.230.00:36:14.34#ibcon#read 3, iclass 21, count 2 2006.230.00:36:14.34#ibcon#about to read 4, iclass 21, count 2 2006.230.00:36:14.34#ibcon#read 4, iclass 21, count 2 2006.230.00:36:14.34#ibcon#about to read 5, iclass 21, count 2 2006.230.00:36:14.34#ibcon#read 5, iclass 21, count 2 2006.230.00:36:14.34#ibcon#about to read 6, iclass 21, count 2 2006.230.00:36:14.34#ibcon#read 6, iclass 21, count 2 2006.230.00:36:14.34#ibcon#end of sib2, iclass 21, count 2 2006.230.00:36:14.34#ibcon#*after write, iclass 21, count 2 2006.230.00:36:14.34#ibcon#*before return 0, iclass 21, count 2 2006.230.00:36:14.34#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:14.34#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.230.00:36:14.34#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.230.00:36:14.34#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:14.34#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:14.46#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:14.46#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:14.46#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:36:14.46#ibcon#first serial, iclass 21, count 0 2006.230.00:36:14.46#ibcon#enter sib2, iclass 21, count 0 2006.230.00:36:14.46#ibcon#flushed, iclass 21, count 0 2006.230.00:36:14.46#ibcon#about to write, iclass 21, count 0 2006.230.00:36:14.46#ibcon#wrote, iclass 21, count 0 2006.230.00:36:14.46#ibcon#about to read 3, iclass 21, count 0 2006.230.00:36:14.48#ibcon#read 3, iclass 21, count 0 2006.230.00:36:14.48#ibcon#about to read 4, iclass 21, count 0 2006.230.00:36:14.48#ibcon#read 4, iclass 21, count 0 2006.230.00:36:14.48#ibcon#about to read 5, iclass 21, count 0 2006.230.00:36:14.48#ibcon#read 5, iclass 21, count 0 2006.230.00:36:14.48#ibcon#about to read 6, iclass 21, count 0 2006.230.00:36:14.48#ibcon#read 6, iclass 21, count 0 2006.230.00:36:14.48#ibcon#end of sib2, iclass 21, count 0 2006.230.00:36:14.48#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:36:14.48#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:36:14.48#ibcon#[27=USB\r\n] 2006.230.00:36:14.48#ibcon#*before write, iclass 21, count 0 2006.230.00:36:14.48#ibcon#enter sib2, iclass 21, count 0 2006.230.00:36:14.48#ibcon#flushed, iclass 21, count 0 2006.230.00:36:14.48#ibcon#about to write, iclass 21, count 0 2006.230.00:36:14.48#ibcon#wrote, iclass 21, count 0 2006.230.00:36:14.48#ibcon#about to read 3, iclass 21, count 0 2006.230.00:36:14.51#ibcon#read 3, iclass 21, count 0 2006.230.00:36:14.51#ibcon#about to read 4, iclass 21, count 0 2006.230.00:36:14.51#ibcon#read 4, iclass 21, count 0 2006.230.00:36:14.51#ibcon#about to read 5, iclass 21, count 0 2006.230.00:36:14.51#ibcon#read 5, iclass 21, count 0 2006.230.00:36:14.51#ibcon#about to read 6, iclass 21, count 0 2006.230.00:36:14.51#ibcon#read 6, iclass 21, count 0 2006.230.00:36:14.51#ibcon#end of sib2, iclass 21, count 0 2006.230.00:36:14.51#ibcon#*after write, iclass 21, count 0 2006.230.00:36:14.51#ibcon#*before return 0, iclass 21, count 0 2006.230.00:36:14.51#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:14.51#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.230.00:36:14.51#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:36:14.51#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:36:14.51$vck44/vblo=3,649.99 2006.230.00:36:14.51#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.00:36:14.51#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.00:36:14.51#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:14.51#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:14.51#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:14.51#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:14.51#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:36:14.51#ibcon#first serial, iclass 23, count 0 2006.230.00:36:14.51#ibcon#enter sib2, iclass 23, count 0 2006.230.00:36:14.51#ibcon#flushed, iclass 23, count 0 2006.230.00:36:14.51#ibcon#about to write, iclass 23, count 0 2006.230.00:36:14.51#ibcon#wrote, iclass 23, count 0 2006.230.00:36:14.51#ibcon#about to read 3, iclass 23, count 0 2006.230.00:36:14.53#ibcon#read 3, iclass 23, count 0 2006.230.00:36:14.53#ibcon#about to read 4, iclass 23, count 0 2006.230.00:36:14.53#ibcon#read 4, iclass 23, count 0 2006.230.00:36:14.53#ibcon#about to read 5, iclass 23, count 0 2006.230.00:36:14.53#ibcon#read 5, iclass 23, count 0 2006.230.00:36:14.53#ibcon#about to read 6, iclass 23, count 0 2006.230.00:36:14.53#ibcon#read 6, iclass 23, count 0 2006.230.00:36:14.53#ibcon#end of sib2, iclass 23, count 0 2006.230.00:36:14.53#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:36:14.53#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:36:14.53#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:36:14.53#ibcon#*before write, iclass 23, count 0 2006.230.00:36:14.53#ibcon#enter sib2, iclass 23, count 0 2006.230.00:36:14.53#ibcon#flushed, iclass 23, count 0 2006.230.00:36:14.53#ibcon#about to write, iclass 23, count 0 2006.230.00:36:14.53#ibcon#wrote, iclass 23, count 0 2006.230.00:36:14.53#ibcon#about to read 3, iclass 23, count 0 2006.230.00:36:14.57#ibcon#read 3, iclass 23, count 0 2006.230.00:36:14.57#ibcon#about to read 4, iclass 23, count 0 2006.230.00:36:14.57#ibcon#read 4, iclass 23, count 0 2006.230.00:36:14.57#ibcon#about to read 5, iclass 23, count 0 2006.230.00:36:14.57#ibcon#read 5, iclass 23, count 0 2006.230.00:36:14.57#ibcon#about to read 6, iclass 23, count 0 2006.230.00:36:14.57#ibcon#read 6, iclass 23, count 0 2006.230.00:36:14.57#ibcon#end of sib2, iclass 23, count 0 2006.230.00:36:14.57#ibcon#*after write, iclass 23, count 0 2006.230.00:36:14.57#ibcon#*before return 0, iclass 23, count 0 2006.230.00:36:14.57#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:14.57#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.00:36:14.57#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:36:14.57#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:36:14.57$vck44/vb=3,4 2006.230.00:36:14.57#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.00:36:14.57#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.00:36:14.57#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:14.57#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:14.63#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:14.63#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:14.63#ibcon#enter wrdev, iclass 25, count 2 2006.230.00:36:14.63#ibcon#first serial, iclass 25, count 2 2006.230.00:36:14.63#ibcon#enter sib2, iclass 25, count 2 2006.230.00:36:14.63#ibcon#flushed, iclass 25, count 2 2006.230.00:36:14.63#ibcon#about to write, iclass 25, count 2 2006.230.00:36:14.63#ibcon#wrote, iclass 25, count 2 2006.230.00:36:14.63#ibcon#about to read 3, iclass 25, count 2 2006.230.00:36:14.65#ibcon#read 3, iclass 25, count 2 2006.230.00:36:14.65#ibcon#about to read 4, iclass 25, count 2 2006.230.00:36:14.65#ibcon#read 4, iclass 25, count 2 2006.230.00:36:14.65#ibcon#about to read 5, iclass 25, count 2 2006.230.00:36:14.65#ibcon#read 5, iclass 25, count 2 2006.230.00:36:14.65#ibcon#about to read 6, iclass 25, count 2 2006.230.00:36:14.65#ibcon#read 6, iclass 25, count 2 2006.230.00:36:14.65#ibcon#end of sib2, iclass 25, count 2 2006.230.00:36:14.65#ibcon#*mode == 0, iclass 25, count 2 2006.230.00:36:14.65#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.00:36:14.65#ibcon#[27=AT03-04\r\n] 2006.230.00:36:14.65#ibcon#*before write, iclass 25, count 2 2006.230.00:36:14.65#ibcon#enter sib2, iclass 25, count 2 2006.230.00:36:14.65#ibcon#flushed, iclass 25, count 2 2006.230.00:36:14.65#ibcon#about to write, iclass 25, count 2 2006.230.00:36:14.65#ibcon#wrote, iclass 25, count 2 2006.230.00:36:14.65#ibcon#about to read 3, iclass 25, count 2 2006.230.00:36:14.68#ibcon#read 3, iclass 25, count 2 2006.230.00:36:14.68#ibcon#about to read 4, iclass 25, count 2 2006.230.00:36:14.68#ibcon#read 4, iclass 25, count 2 2006.230.00:36:14.68#ibcon#about to read 5, iclass 25, count 2 2006.230.00:36:14.68#ibcon#read 5, iclass 25, count 2 2006.230.00:36:14.68#ibcon#about to read 6, iclass 25, count 2 2006.230.00:36:14.68#ibcon#read 6, iclass 25, count 2 2006.230.00:36:14.68#ibcon#end of sib2, iclass 25, count 2 2006.230.00:36:14.68#ibcon#*after write, iclass 25, count 2 2006.230.00:36:14.68#ibcon#*before return 0, iclass 25, count 2 2006.230.00:36:14.68#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:14.68#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.00:36:14.68#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.00:36:14.68#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:14.68#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:14.80#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:14.80#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:14.80#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:36:14.80#ibcon#first serial, iclass 25, count 0 2006.230.00:36:14.80#ibcon#enter sib2, iclass 25, count 0 2006.230.00:36:14.80#ibcon#flushed, iclass 25, count 0 2006.230.00:36:14.80#ibcon#about to write, iclass 25, count 0 2006.230.00:36:14.80#ibcon#wrote, iclass 25, count 0 2006.230.00:36:14.80#ibcon#about to read 3, iclass 25, count 0 2006.230.00:36:14.82#ibcon#read 3, iclass 25, count 0 2006.230.00:36:14.82#ibcon#about to read 4, iclass 25, count 0 2006.230.00:36:14.82#ibcon#read 4, iclass 25, count 0 2006.230.00:36:14.82#ibcon#about to read 5, iclass 25, count 0 2006.230.00:36:14.82#ibcon#read 5, iclass 25, count 0 2006.230.00:36:14.82#ibcon#about to read 6, iclass 25, count 0 2006.230.00:36:14.82#ibcon#read 6, iclass 25, count 0 2006.230.00:36:14.82#ibcon#end of sib2, iclass 25, count 0 2006.230.00:36:14.82#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:36:14.82#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:36:14.82#ibcon#[27=USB\r\n] 2006.230.00:36:14.82#ibcon#*before write, iclass 25, count 0 2006.230.00:36:14.82#ibcon#enter sib2, iclass 25, count 0 2006.230.00:36:14.82#ibcon#flushed, iclass 25, count 0 2006.230.00:36:14.82#ibcon#about to write, iclass 25, count 0 2006.230.00:36:14.82#ibcon#wrote, iclass 25, count 0 2006.230.00:36:14.82#ibcon#about to read 3, iclass 25, count 0 2006.230.00:36:14.85#ibcon#read 3, iclass 25, count 0 2006.230.00:36:14.85#ibcon#about to read 4, iclass 25, count 0 2006.230.00:36:14.85#ibcon#read 4, iclass 25, count 0 2006.230.00:36:14.85#ibcon#about to read 5, iclass 25, count 0 2006.230.00:36:14.85#ibcon#read 5, iclass 25, count 0 2006.230.00:36:14.85#ibcon#about to read 6, iclass 25, count 0 2006.230.00:36:14.85#ibcon#read 6, iclass 25, count 0 2006.230.00:36:14.85#ibcon#end of sib2, iclass 25, count 0 2006.230.00:36:14.85#ibcon#*after write, iclass 25, count 0 2006.230.00:36:14.85#ibcon#*before return 0, iclass 25, count 0 2006.230.00:36:14.85#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:14.85#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.00:36:14.85#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:36:14.85#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:36:14.85$vck44/vblo=4,679.99 2006.230.00:36:14.85#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.00:36:14.85#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.00:36:14.85#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:14.85#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:14.85#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:14.85#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:14.85#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:36:14.85#ibcon#first serial, iclass 27, count 0 2006.230.00:36:14.85#ibcon#enter sib2, iclass 27, count 0 2006.230.00:36:14.85#ibcon#flushed, iclass 27, count 0 2006.230.00:36:14.85#ibcon#about to write, iclass 27, count 0 2006.230.00:36:14.85#ibcon#wrote, iclass 27, count 0 2006.230.00:36:14.85#ibcon#about to read 3, iclass 27, count 0 2006.230.00:36:14.87#ibcon#read 3, iclass 27, count 0 2006.230.00:36:14.87#ibcon#about to read 4, iclass 27, count 0 2006.230.00:36:14.87#ibcon#read 4, iclass 27, count 0 2006.230.00:36:14.87#ibcon#about to read 5, iclass 27, count 0 2006.230.00:36:14.87#ibcon#read 5, iclass 27, count 0 2006.230.00:36:14.87#ibcon#about to read 6, iclass 27, count 0 2006.230.00:36:14.87#ibcon#read 6, iclass 27, count 0 2006.230.00:36:14.87#ibcon#end of sib2, iclass 27, count 0 2006.230.00:36:14.87#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:36:14.87#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:36:14.87#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:36:14.87#ibcon#*before write, iclass 27, count 0 2006.230.00:36:14.87#ibcon#enter sib2, iclass 27, count 0 2006.230.00:36:14.87#ibcon#flushed, iclass 27, count 0 2006.230.00:36:14.87#ibcon#about to write, iclass 27, count 0 2006.230.00:36:14.87#ibcon#wrote, iclass 27, count 0 2006.230.00:36:14.87#ibcon#about to read 3, iclass 27, count 0 2006.230.00:36:14.91#ibcon#read 3, iclass 27, count 0 2006.230.00:36:14.91#ibcon#about to read 4, iclass 27, count 0 2006.230.00:36:14.91#ibcon#read 4, iclass 27, count 0 2006.230.00:36:14.91#ibcon#about to read 5, iclass 27, count 0 2006.230.00:36:14.91#ibcon#read 5, iclass 27, count 0 2006.230.00:36:14.91#ibcon#about to read 6, iclass 27, count 0 2006.230.00:36:14.91#ibcon#read 6, iclass 27, count 0 2006.230.00:36:14.91#ibcon#end of sib2, iclass 27, count 0 2006.230.00:36:14.91#ibcon#*after write, iclass 27, count 0 2006.230.00:36:14.91#ibcon#*before return 0, iclass 27, count 0 2006.230.00:36:14.91#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:14.91#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.00:36:14.91#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:36:14.91#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:36:14.91$vck44/vb=4,4 2006.230.00:36:14.91#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.00:36:14.91#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.00:36:14.91#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:14.91#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:36:14.94#abcon#<5=/09 2.6 7.2 31.66 761002.7\r\n> 2006.230.00:36:14.96#abcon#{5=INTERFACE CLEAR} 2006.230.00:36:14.97#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:36:14.97#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:36:14.97#ibcon#enter wrdev, iclass 30, count 2 2006.230.00:36:14.97#ibcon#first serial, iclass 30, count 2 2006.230.00:36:14.97#ibcon#enter sib2, iclass 30, count 2 2006.230.00:36:14.97#ibcon#flushed, iclass 30, count 2 2006.230.00:36:14.97#ibcon#about to write, iclass 30, count 2 2006.230.00:36:14.97#ibcon#wrote, iclass 30, count 2 2006.230.00:36:14.97#ibcon#about to read 3, iclass 30, count 2 2006.230.00:36:14.99#ibcon#read 3, iclass 30, count 2 2006.230.00:36:14.99#ibcon#about to read 4, iclass 30, count 2 2006.230.00:36:14.99#ibcon#read 4, iclass 30, count 2 2006.230.00:36:14.99#ibcon#about to read 5, iclass 30, count 2 2006.230.00:36:14.99#ibcon#read 5, iclass 30, count 2 2006.230.00:36:14.99#ibcon#about to read 6, iclass 30, count 2 2006.230.00:36:14.99#ibcon#read 6, iclass 30, count 2 2006.230.00:36:14.99#ibcon#end of sib2, iclass 30, count 2 2006.230.00:36:14.99#ibcon#*mode == 0, iclass 30, count 2 2006.230.00:36:14.99#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.00:36:14.99#ibcon#[27=AT04-04\r\n] 2006.230.00:36:14.99#ibcon#*before write, iclass 30, count 2 2006.230.00:36:14.99#ibcon#enter sib2, iclass 30, count 2 2006.230.00:36:14.99#ibcon#flushed, iclass 30, count 2 2006.230.00:36:14.99#ibcon#about to write, iclass 30, count 2 2006.230.00:36:14.99#ibcon#wrote, iclass 30, count 2 2006.230.00:36:14.99#ibcon#about to read 3, iclass 30, count 2 2006.230.00:36:15.02#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:36:15.02#ibcon#read 3, iclass 30, count 2 2006.230.00:36:15.02#ibcon#about to read 4, iclass 30, count 2 2006.230.00:36:15.02#ibcon#read 4, iclass 30, count 2 2006.230.00:36:15.02#ibcon#about to read 5, iclass 30, count 2 2006.230.00:36:15.02#ibcon#read 5, iclass 30, count 2 2006.230.00:36:15.02#ibcon#about to read 6, iclass 30, count 2 2006.230.00:36:15.02#ibcon#read 6, iclass 30, count 2 2006.230.00:36:15.02#ibcon#end of sib2, iclass 30, count 2 2006.230.00:36:15.02#ibcon#*after write, iclass 30, count 2 2006.230.00:36:15.02#ibcon#*before return 0, iclass 30, count 2 2006.230.00:36:15.02#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:36:15.02#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.00:36:15.02#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.00:36:15.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:15.02#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:36:15.14#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:36:15.14#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:36:15.14#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:36:15.14#ibcon#first serial, iclass 30, count 0 2006.230.00:36:15.14#ibcon#enter sib2, iclass 30, count 0 2006.230.00:36:15.14#ibcon#flushed, iclass 30, count 0 2006.230.00:36:15.14#ibcon#about to write, iclass 30, count 0 2006.230.00:36:15.14#ibcon#wrote, iclass 30, count 0 2006.230.00:36:15.14#ibcon#about to read 3, iclass 30, count 0 2006.230.00:36:15.16#ibcon#read 3, iclass 30, count 0 2006.230.00:36:15.16#ibcon#about to read 4, iclass 30, count 0 2006.230.00:36:15.16#ibcon#read 4, iclass 30, count 0 2006.230.00:36:15.16#ibcon#about to read 5, iclass 30, count 0 2006.230.00:36:15.16#ibcon#read 5, iclass 30, count 0 2006.230.00:36:15.16#ibcon#about to read 6, iclass 30, count 0 2006.230.00:36:15.16#ibcon#read 6, iclass 30, count 0 2006.230.00:36:15.16#ibcon#end of sib2, iclass 30, count 0 2006.230.00:36:15.16#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:36:15.16#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:36:15.16#ibcon#[27=USB\r\n] 2006.230.00:36:15.16#ibcon#*before write, iclass 30, count 0 2006.230.00:36:15.16#ibcon#enter sib2, iclass 30, count 0 2006.230.00:36:15.16#ibcon#flushed, iclass 30, count 0 2006.230.00:36:15.16#ibcon#about to write, iclass 30, count 0 2006.230.00:36:15.16#ibcon#wrote, iclass 30, count 0 2006.230.00:36:15.16#ibcon#about to read 3, iclass 30, count 0 2006.230.00:36:15.19#ibcon#read 3, iclass 30, count 0 2006.230.00:36:15.19#ibcon#about to read 4, iclass 30, count 0 2006.230.00:36:15.19#ibcon#read 4, iclass 30, count 0 2006.230.00:36:15.19#ibcon#about to read 5, iclass 30, count 0 2006.230.00:36:15.19#ibcon#read 5, iclass 30, count 0 2006.230.00:36:15.19#ibcon#about to read 6, iclass 30, count 0 2006.230.00:36:15.19#ibcon#read 6, iclass 30, count 0 2006.230.00:36:15.19#ibcon#end of sib2, iclass 30, count 0 2006.230.00:36:15.19#ibcon#*after write, iclass 30, count 0 2006.230.00:36:15.19#ibcon#*before return 0, iclass 30, count 0 2006.230.00:36:15.19#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:36:15.19#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.00:36:15.19#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:36:15.19#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:36:15.19$vck44/vblo=5,709.99 2006.230.00:36:15.19#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.00:36:15.19#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.00:36:15.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:15.19#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:15.19#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:15.19#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:15.19#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:36:15.19#ibcon#first serial, iclass 35, count 0 2006.230.00:36:15.19#ibcon#enter sib2, iclass 35, count 0 2006.230.00:36:15.19#ibcon#flushed, iclass 35, count 0 2006.230.00:36:15.19#ibcon#about to write, iclass 35, count 0 2006.230.00:36:15.19#ibcon#wrote, iclass 35, count 0 2006.230.00:36:15.19#ibcon#about to read 3, iclass 35, count 0 2006.230.00:36:15.21#ibcon#read 3, iclass 35, count 0 2006.230.00:36:15.21#ibcon#about to read 4, iclass 35, count 0 2006.230.00:36:15.21#ibcon#read 4, iclass 35, count 0 2006.230.00:36:15.21#ibcon#about to read 5, iclass 35, count 0 2006.230.00:36:15.21#ibcon#read 5, iclass 35, count 0 2006.230.00:36:15.21#ibcon#about to read 6, iclass 35, count 0 2006.230.00:36:15.21#ibcon#read 6, iclass 35, count 0 2006.230.00:36:15.21#ibcon#end of sib2, iclass 35, count 0 2006.230.00:36:15.21#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:36:15.21#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:36:15.21#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:36:15.21#ibcon#*before write, iclass 35, count 0 2006.230.00:36:15.21#ibcon#enter sib2, iclass 35, count 0 2006.230.00:36:15.21#ibcon#flushed, iclass 35, count 0 2006.230.00:36:15.21#ibcon#about to write, iclass 35, count 0 2006.230.00:36:15.21#ibcon#wrote, iclass 35, count 0 2006.230.00:36:15.21#ibcon#about to read 3, iclass 35, count 0 2006.230.00:36:15.25#ibcon#read 3, iclass 35, count 0 2006.230.00:36:15.25#ibcon#about to read 4, iclass 35, count 0 2006.230.00:36:15.25#ibcon#read 4, iclass 35, count 0 2006.230.00:36:15.25#ibcon#about to read 5, iclass 35, count 0 2006.230.00:36:15.25#ibcon#read 5, iclass 35, count 0 2006.230.00:36:15.25#ibcon#about to read 6, iclass 35, count 0 2006.230.00:36:15.25#ibcon#read 6, iclass 35, count 0 2006.230.00:36:15.25#ibcon#end of sib2, iclass 35, count 0 2006.230.00:36:15.25#ibcon#*after write, iclass 35, count 0 2006.230.00:36:15.25#ibcon#*before return 0, iclass 35, count 0 2006.230.00:36:15.25#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:15.25#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.00:36:15.25#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:36:15.25#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:36:15.25$vck44/vb=5,4 2006.230.00:36:15.25#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.00:36:15.25#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.00:36:15.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:15.25#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:15.31#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:15.31#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:15.31#ibcon#enter wrdev, iclass 37, count 2 2006.230.00:36:15.31#ibcon#first serial, iclass 37, count 2 2006.230.00:36:15.31#ibcon#enter sib2, iclass 37, count 2 2006.230.00:36:15.31#ibcon#flushed, iclass 37, count 2 2006.230.00:36:15.31#ibcon#about to write, iclass 37, count 2 2006.230.00:36:15.31#ibcon#wrote, iclass 37, count 2 2006.230.00:36:15.31#ibcon#about to read 3, iclass 37, count 2 2006.230.00:36:15.33#ibcon#read 3, iclass 37, count 2 2006.230.00:36:15.33#ibcon#about to read 4, iclass 37, count 2 2006.230.00:36:15.33#ibcon#read 4, iclass 37, count 2 2006.230.00:36:15.33#ibcon#about to read 5, iclass 37, count 2 2006.230.00:36:15.33#ibcon#read 5, iclass 37, count 2 2006.230.00:36:15.33#ibcon#about to read 6, iclass 37, count 2 2006.230.00:36:15.33#ibcon#read 6, iclass 37, count 2 2006.230.00:36:15.33#ibcon#end of sib2, iclass 37, count 2 2006.230.00:36:15.33#ibcon#*mode == 0, iclass 37, count 2 2006.230.00:36:15.33#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.00:36:15.33#ibcon#[27=AT05-04\r\n] 2006.230.00:36:15.33#ibcon#*before write, iclass 37, count 2 2006.230.00:36:15.33#ibcon#enter sib2, iclass 37, count 2 2006.230.00:36:15.33#ibcon#flushed, iclass 37, count 2 2006.230.00:36:15.33#ibcon#about to write, iclass 37, count 2 2006.230.00:36:15.33#ibcon#wrote, iclass 37, count 2 2006.230.00:36:15.33#ibcon#about to read 3, iclass 37, count 2 2006.230.00:36:15.36#ibcon#read 3, iclass 37, count 2 2006.230.00:36:15.36#ibcon#about to read 4, iclass 37, count 2 2006.230.00:36:15.36#ibcon#read 4, iclass 37, count 2 2006.230.00:36:15.36#ibcon#about to read 5, iclass 37, count 2 2006.230.00:36:15.36#ibcon#read 5, iclass 37, count 2 2006.230.00:36:15.36#ibcon#about to read 6, iclass 37, count 2 2006.230.00:36:15.36#ibcon#read 6, iclass 37, count 2 2006.230.00:36:15.36#ibcon#end of sib2, iclass 37, count 2 2006.230.00:36:15.36#ibcon#*after write, iclass 37, count 2 2006.230.00:36:15.36#ibcon#*before return 0, iclass 37, count 2 2006.230.00:36:15.36#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:15.36#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.00:36:15.36#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.00:36:15.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:15.36#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:15.48#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:15.48#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:15.48#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:36:15.48#ibcon#first serial, iclass 37, count 0 2006.230.00:36:15.48#ibcon#enter sib2, iclass 37, count 0 2006.230.00:36:15.48#ibcon#flushed, iclass 37, count 0 2006.230.00:36:15.48#ibcon#about to write, iclass 37, count 0 2006.230.00:36:15.48#ibcon#wrote, iclass 37, count 0 2006.230.00:36:15.48#ibcon#about to read 3, iclass 37, count 0 2006.230.00:36:15.50#ibcon#read 3, iclass 37, count 0 2006.230.00:36:15.50#ibcon#about to read 4, iclass 37, count 0 2006.230.00:36:15.50#ibcon#read 4, iclass 37, count 0 2006.230.00:36:15.50#ibcon#about to read 5, iclass 37, count 0 2006.230.00:36:15.50#ibcon#read 5, iclass 37, count 0 2006.230.00:36:15.50#ibcon#about to read 6, iclass 37, count 0 2006.230.00:36:15.50#ibcon#read 6, iclass 37, count 0 2006.230.00:36:15.50#ibcon#end of sib2, iclass 37, count 0 2006.230.00:36:15.50#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:36:15.50#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:36:15.50#ibcon#[27=USB\r\n] 2006.230.00:36:15.50#ibcon#*before write, iclass 37, count 0 2006.230.00:36:15.50#ibcon#enter sib2, iclass 37, count 0 2006.230.00:36:15.50#ibcon#flushed, iclass 37, count 0 2006.230.00:36:15.50#ibcon#about to write, iclass 37, count 0 2006.230.00:36:15.50#ibcon#wrote, iclass 37, count 0 2006.230.00:36:15.50#ibcon#about to read 3, iclass 37, count 0 2006.230.00:36:15.53#ibcon#read 3, iclass 37, count 0 2006.230.00:36:15.53#ibcon#about to read 4, iclass 37, count 0 2006.230.00:36:15.53#ibcon#read 4, iclass 37, count 0 2006.230.00:36:15.53#ibcon#about to read 5, iclass 37, count 0 2006.230.00:36:15.53#ibcon#read 5, iclass 37, count 0 2006.230.00:36:15.53#ibcon#about to read 6, iclass 37, count 0 2006.230.00:36:15.53#ibcon#read 6, iclass 37, count 0 2006.230.00:36:15.53#ibcon#end of sib2, iclass 37, count 0 2006.230.00:36:15.53#ibcon#*after write, iclass 37, count 0 2006.230.00:36:15.53#ibcon#*before return 0, iclass 37, count 0 2006.230.00:36:15.53#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:15.53#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.00:36:15.53#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:36:15.53#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:36:15.53$vck44/vblo=6,719.99 2006.230.00:36:15.53#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.00:36:15.53#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.00:36:15.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:15.53#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:15.53#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:15.53#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:15.53#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:36:15.53#ibcon#first serial, iclass 39, count 0 2006.230.00:36:15.53#ibcon#enter sib2, iclass 39, count 0 2006.230.00:36:15.53#ibcon#flushed, iclass 39, count 0 2006.230.00:36:15.53#ibcon#about to write, iclass 39, count 0 2006.230.00:36:15.53#ibcon#wrote, iclass 39, count 0 2006.230.00:36:15.53#ibcon#about to read 3, iclass 39, count 0 2006.230.00:36:15.55#ibcon#read 3, iclass 39, count 0 2006.230.00:36:15.55#ibcon#about to read 4, iclass 39, count 0 2006.230.00:36:15.55#ibcon#read 4, iclass 39, count 0 2006.230.00:36:15.55#ibcon#about to read 5, iclass 39, count 0 2006.230.00:36:15.55#ibcon#read 5, iclass 39, count 0 2006.230.00:36:15.55#ibcon#about to read 6, iclass 39, count 0 2006.230.00:36:15.55#ibcon#read 6, iclass 39, count 0 2006.230.00:36:15.55#ibcon#end of sib2, iclass 39, count 0 2006.230.00:36:15.55#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:36:15.55#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:36:15.55#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:36:15.55#ibcon#*before write, iclass 39, count 0 2006.230.00:36:15.55#ibcon#enter sib2, iclass 39, count 0 2006.230.00:36:15.55#ibcon#flushed, iclass 39, count 0 2006.230.00:36:15.55#ibcon#about to write, iclass 39, count 0 2006.230.00:36:15.55#ibcon#wrote, iclass 39, count 0 2006.230.00:36:15.55#ibcon#about to read 3, iclass 39, count 0 2006.230.00:36:15.59#ibcon#read 3, iclass 39, count 0 2006.230.00:36:15.59#ibcon#about to read 4, iclass 39, count 0 2006.230.00:36:15.59#ibcon#read 4, iclass 39, count 0 2006.230.00:36:15.59#ibcon#about to read 5, iclass 39, count 0 2006.230.00:36:15.59#ibcon#read 5, iclass 39, count 0 2006.230.00:36:15.59#ibcon#about to read 6, iclass 39, count 0 2006.230.00:36:15.59#ibcon#read 6, iclass 39, count 0 2006.230.00:36:15.59#ibcon#end of sib2, iclass 39, count 0 2006.230.00:36:15.59#ibcon#*after write, iclass 39, count 0 2006.230.00:36:15.59#ibcon#*before return 0, iclass 39, count 0 2006.230.00:36:15.59#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:15.59#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.00:36:15.59#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:36:15.59#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:36:15.59$vck44/vb=6,4 2006.230.00:36:15.59#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.00:36:15.59#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.00:36:15.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:15.59#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:15.65#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:15.65#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:15.65#ibcon#enter wrdev, iclass 3, count 2 2006.230.00:36:15.65#ibcon#first serial, iclass 3, count 2 2006.230.00:36:15.65#ibcon#enter sib2, iclass 3, count 2 2006.230.00:36:15.65#ibcon#flushed, iclass 3, count 2 2006.230.00:36:15.65#ibcon#about to write, iclass 3, count 2 2006.230.00:36:15.65#ibcon#wrote, iclass 3, count 2 2006.230.00:36:15.65#ibcon#about to read 3, iclass 3, count 2 2006.230.00:36:15.67#ibcon#read 3, iclass 3, count 2 2006.230.00:36:15.67#ibcon#about to read 4, iclass 3, count 2 2006.230.00:36:15.67#ibcon#read 4, iclass 3, count 2 2006.230.00:36:15.67#ibcon#about to read 5, iclass 3, count 2 2006.230.00:36:15.67#ibcon#read 5, iclass 3, count 2 2006.230.00:36:15.67#ibcon#about to read 6, iclass 3, count 2 2006.230.00:36:15.67#ibcon#read 6, iclass 3, count 2 2006.230.00:36:15.67#ibcon#end of sib2, iclass 3, count 2 2006.230.00:36:15.67#ibcon#*mode == 0, iclass 3, count 2 2006.230.00:36:15.67#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.00:36:15.67#ibcon#[27=AT06-04\r\n] 2006.230.00:36:15.67#ibcon#*before write, iclass 3, count 2 2006.230.00:36:15.67#ibcon#enter sib2, iclass 3, count 2 2006.230.00:36:15.67#ibcon#flushed, iclass 3, count 2 2006.230.00:36:15.67#ibcon#about to write, iclass 3, count 2 2006.230.00:36:15.67#ibcon#wrote, iclass 3, count 2 2006.230.00:36:15.67#ibcon#about to read 3, iclass 3, count 2 2006.230.00:36:15.70#ibcon#read 3, iclass 3, count 2 2006.230.00:36:15.70#ibcon#about to read 4, iclass 3, count 2 2006.230.00:36:15.70#ibcon#read 4, iclass 3, count 2 2006.230.00:36:15.70#ibcon#about to read 5, iclass 3, count 2 2006.230.00:36:15.70#ibcon#read 5, iclass 3, count 2 2006.230.00:36:15.70#ibcon#about to read 6, iclass 3, count 2 2006.230.00:36:15.70#ibcon#read 6, iclass 3, count 2 2006.230.00:36:15.70#ibcon#end of sib2, iclass 3, count 2 2006.230.00:36:15.70#ibcon#*after write, iclass 3, count 2 2006.230.00:36:15.70#ibcon#*before return 0, iclass 3, count 2 2006.230.00:36:15.70#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:15.70#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.00:36:15.70#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.00:36:15.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:15.70#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:15.82#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:15.82#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:15.82#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:36:15.82#ibcon#first serial, iclass 3, count 0 2006.230.00:36:15.82#ibcon#enter sib2, iclass 3, count 0 2006.230.00:36:15.82#ibcon#flushed, iclass 3, count 0 2006.230.00:36:15.82#ibcon#about to write, iclass 3, count 0 2006.230.00:36:15.82#ibcon#wrote, iclass 3, count 0 2006.230.00:36:15.82#ibcon#about to read 3, iclass 3, count 0 2006.230.00:36:15.84#ibcon#read 3, iclass 3, count 0 2006.230.00:36:15.84#ibcon#about to read 4, iclass 3, count 0 2006.230.00:36:15.84#ibcon#read 4, iclass 3, count 0 2006.230.00:36:15.84#ibcon#about to read 5, iclass 3, count 0 2006.230.00:36:15.84#ibcon#read 5, iclass 3, count 0 2006.230.00:36:15.84#ibcon#about to read 6, iclass 3, count 0 2006.230.00:36:15.84#ibcon#read 6, iclass 3, count 0 2006.230.00:36:15.84#ibcon#end of sib2, iclass 3, count 0 2006.230.00:36:15.84#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:36:15.84#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:36:15.84#ibcon#[27=USB\r\n] 2006.230.00:36:15.84#ibcon#*before write, iclass 3, count 0 2006.230.00:36:15.84#ibcon#enter sib2, iclass 3, count 0 2006.230.00:36:15.84#ibcon#flushed, iclass 3, count 0 2006.230.00:36:15.84#ibcon#about to write, iclass 3, count 0 2006.230.00:36:15.84#ibcon#wrote, iclass 3, count 0 2006.230.00:36:15.84#ibcon#about to read 3, iclass 3, count 0 2006.230.00:36:15.87#ibcon#read 3, iclass 3, count 0 2006.230.00:36:15.87#ibcon#about to read 4, iclass 3, count 0 2006.230.00:36:15.87#ibcon#read 4, iclass 3, count 0 2006.230.00:36:15.87#ibcon#about to read 5, iclass 3, count 0 2006.230.00:36:15.87#ibcon#read 5, iclass 3, count 0 2006.230.00:36:15.87#ibcon#about to read 6, iclass 3, count 0 2006.230.00:36:15.87#ibcon#read 6, iclass 3, count 0 2006.230.00:36:15.87#ibcon#end of sib2, iclass 3, count 0 2006.230.00:36:15.87#ibcon#*after write, iclass 3, count 0 2006.230.00:36:15.87#ibcon#*before return 0, iclass 3, count 0 2006.230.00:36:15.87#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:15.87#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.00:36:15.87#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:36:15.87#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:36:15.87$vck44/vblo=7,734.99 2006.230.00:36:15.87#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.00:36:15.87#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.00:36:15.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:15.87#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:15.87#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:15.87#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:15.87#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:36:15.87#ibcon#first serial, iclass 5, count 0 2006.230.00:36:15.87#ibcon#enter sib2, iclass 5, count 0 2006.230.00:36:15.87#ibcon#flushed, iclass 5, count 0 2006.230.00:36:15.87#ibcon#about to write, iclass 5, count 0 2006.230.00:36:15.87#ibcon#wrote, iclass 5, count 0 2006.230.00:36:15.87#ibcon#about to read 3, iclass 5, count 0 2006.230.00:36:15.89#ibcon#read 3, iclass 5, count 0 2006.230.00:36:15.89#ibcon#about to read 4, iclass 5, count 0 2006.230.00:36:15.89#ibcon#read 4, iclass 5, count 0 2006.230.00:36:15.89#ibcon#about to read 5, iclass 5, count 0 2006.230.00:36:15.89#ibcon#read 5, iclass 5, count 0 2006.230.00:36:15.89#ibcon#about to read 6, iclass 5, count 0 2006.230.00:36:15.89#ibcon#read 6, iclass 5, count 0 2006.230.00:36:15.89#ibcon#end of sib2, iclass 5, count 0 2006.230.00:36:15.89#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:36:15.89#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:36:15.89#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:36:15.89#ibcon#*before write, iclass 5, count 0 2006.230.00:36:15.89#ibcon#enter sib2, iclass 5, count 0 2006.230.00:36:15.89#ibcon#flushed, iclass 5, count 0 2006.230.00:36:15.89#ibcon#about to write, iclass 5, count 0 2006.230.00:36:15.89#ibcon#wrote, iclass 5, count 0 2006.230.00:36:15.89#ibcon#about to read 3, iclass 5, count 0 2006.230.00:36:15.93#ibcon#read 3, iclass 5, count 0 2006.230.00:36:15.93#ibcon#about to read 4, iclass 5, count 0 2006.230.00:36:15.93#ibcon#read 4, iclass 5, count 0 2006.230.00:36:15.93#ibcon#about to read 5, iclass 5, count 0 2006.230.00:36:15.93#ibcon#read 5, iclass 5, count 0 2006.230.00:36:15.93#ibcon#about to read 6, iclass 5, count 0 2006.230.00:36:15.93#ibcon#read 6, iclass 5, count 0 2006.230.00:36:15.93#ibcon#end of sib2, iclass 5, count 0 2006.230.00:36:15.93#ibcon#*after write, iclass 5, count 0 2006.230.00:36:15.93#ibcon#*before return 0, iclass 5, count 0 2006.230.00:36:15.93#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:15.93#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.00:36:15.93#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:36:15.93#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:36:15.93$vck44/vb=7,4 2006.230.00:36:15.93#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.00:36:15.93#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.00:36:15.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:15.93#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:15.99#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:15.99#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:15.99#ibcon#enter wrdev, iclass 7, count 2 2006.230.00:36:15.99#ibcon#first serial, iclass 7, count 2 2006.230.00:36:15.99#ibcon#enter sib2, iclass 7, count 2 2006.230.00:36:15.99#ibcon#flushed, iclass 7, count 2 2006.230.00:36:15.99#ibcon#about to write, iclass 7, count 2 2006.230.00:36:15.99#ibcon#wrote, iclass 7, count 2 2006.230.00:36:15.99#ibcon#about to read 3, iclass 7, count 2 2006.230.00:36:16.01#ibcon#read 3, iclass 7, count 2 2006.230.00:36:16.01#ibcon#about to read 4, iclass 7, count 2 2006.230.00:36:16.01#ibcon#read 4, iclass 7, count 2 2006.230.00:36:16.01#ibcon#about to read 5, iclass 7, count 2 2006.230.00:36:16.01#ibcon#read 5, iclass 7, count 2 2006.230.00:36:16.01#ibcon#about to read 6, iclass 7, count 2 2006.230.00:36:16.01#ibcon#read 6, iclass 7, count 2 2006.230.00:36:16.01#ibcon#end of sib2, iclass 7, count 2 2006.230.00:36:16.01#ibcon#*mode == 0, iclass 7, count 2 2006.230.00:36:16.01#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.00:36:16.01#ibcon#[27=AT07-04\r\n] 2006.230.00:36:16.01#ibcon#*before write, iclass 7, count 2 2006.230.00:36:16.01#ibcon#enter sib2, iclass 7, count 2 2006.230.00:36:16.01#ibcon#flushed, iclass 7, count 2 2006.230.00:36:16.01#ibcon#about to write, iclass 7, count 2 2006.230.00:36:16.01#ibcon#wrote, iclass 7, count 2 2006.230.00:36:16.01#ibcon#about to read 3, iclass 7, count 2 2006.230.00:36:16.04#ibcon#read 3, iclass 7, count 2 2006.230.00:36:16.04#ibcon#about to read 4, iclass 7, count 2 2006.230.00:36:16.04#ibcon#read 4, iclass 7, count 2 2006.230.00:36:16.04#ibcon#about to read 5, iclass 7, count 2 2006.230.00:36:16.04#ibcon#read 5, iclass 7, count 2 2006.230.00:36:16.04#ibcon#about to read 6, iclass 7, count 2 2006.230.00:36:16.04#ibcon#read 6, iclass 7, count 2 2006.230.00:36:16.04#ibcon#end of sib2, iclass 7, count 2 2006.230.00:36:16.04#ibcon#*after write, iclass 7, count 2 2006.230.00:36:16.04#ibcon#*before return 0, iclass 7, count 2 2006.230.00:36:16.04#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:16.04#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.00:36:16.04#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.00:36:16.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:16.04#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:16.16#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:16.16#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:16.16#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:36:16.16#ibcon#first serial, iclass 7, count 0 2006.230.00:36:16.16#ibcon#enter sib2, iclass 7, count 0 2006.230.00:36:16.16#ibcon#flushed, iclass 7, count 0 2006.230.00:36:16.16#ibcon#about to write, iclass 7, count 0 2006.230.00:36:16.16#ibcon#wrote, iclass 7, count 0 2006.230.00:36:16.16#ibcon#about to read 3, iclass 7, count 0 2006.230.00:36:16.18#ibcon#read 3, iclass 7, count 0 2006.230.00:36:16.18#ibcon#about to read 4, iclass 7, count 0 2006.230.00:36:16.18#ibcon#read 4, iclass 7, count 0 2006.230.00:36:16.18#ibcon#about to read 5, iclass 7, count 0 2006.230.00:36:16.18#ibcon#read 5, iclass 7, count 0 2006.230.00:36:16.18#ibcon#about to read 6, iclass 7, count 0 2006.230.00:36:16.18#ibcon#read 6, iclass 7, count 0 2006.230.00:36:16.18#ibcon#end of sib2, iclass 7, count 0 2006.230.00:36:16.18#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:36:16.18#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:36:16.18#ibcon#[27=USB\r\n] 2006.230.00:36:16.18#ibcon#*before write, iclass 7, count 0 2006.230.00:36:16.18#ibcon#enter sib2, iclass 7, count 0 2006.230.00:36:16.18#ibcon#flushed, iclass 7, count 0 2006.230.00:36:16.18#ibcon#about to write, iclass 7, count 0 2006.230.00:36:16.18#ibcon#wrote, iclass 7, count 0 2006.230.00:36:16.18#ibcon#about to read 3, iclass 7, count 0 2006.230.00:36:16.21#ibcon#read 3, iclass 7, count 0 2006.230.00:36:16.21#ibcon#about to read 4, iclass 7, count 0 2006.230.00:36:16.21#ibcon#read 4, iclass 7, count 0 2006.230.00:36:16.21#ibcon#about to read 5, iclass 7, count 0 2006.230.00:36:16.21#ibcon#read 5, iclass 7, count 0 2006.230.00:36:16.21#ibcon#about to read 6, iclass 7, count 0 2006.230.00:36:16.21#ibcon#read 6, iclass 7, count 0 2006.230.00:36:16.21#ibcon#end of sib2, iclass 7, count 0 2006.230.00:36:16.21#ibcon#*after write, iclass 7, count 0 2006.230.00:36:16.21#ibcon#*before return 0, iclass 7, count 0 2006.230.00:36:16.21#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:16.21#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.00:36:16.21#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:36:16.21#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:36:16.21$vck44/vblo=8,744.99 2006.230.00:36:16.21#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.00:36:16.21#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.00:36:16.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:36:16.21#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:16.21#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:16.21#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:16.21#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:36:16.21#ibcon#first serial, iclass 11, count 0 2006.230.00:36:16.21#ibcon#enter sib2, iclass 11, count 0 2006.230.00:36:16.21#ibcon#flushed, iclass 11, count 0 2006.230.00:36:16.21#ibcon#about to write, iclass 11, count 0 2006.230.00:36:16.21#ibcon#wrote, iclass 11, count 0 2006.230.00:36:16.21#ibcon#about to read 3, iclass 11, count 0 2006.230.00:36:16.23#ibcon#read 3, iclass 11, count 0 2006.230.00:36:16.23#ibcon#about to read 4, iclass 11, count 0 2006.230.00:36:16.23#ibcon#read 4, iclass 11, count 0 2006.230.00:36:16.23#ibcon#about to read 5, iclass 11, count 0 2006.230.00:36:16.23#ibcon#read 5, iclass 11, count 0 2006.230.00:36:16.23#ibcon#about to read 6, iclass 11, count 0 2006.230.00:36:16.23#ibcon#read 6, iclass 11, count 0 2006.230.00:36:16.23#ibcon#end of sib2, iclass 11, count 0 2006.230.00:36:16.23#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:36:16.23#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:36:16.23#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:36:16.23#ibcon#*before write, iclass 11, count 0 2006.230.00:36:16.23#ibcon#enter sib2, iclass 11, count 0 2006.230.00:36:16.23#ibcon#flushed, iclass 11, count 0 2006.230.00:36:16.23#ibcon#about to write, iclass 11, count 0 2006.230.00:36:16.23#ibcon#wrote, iclass 11, count 0 2006.230.00:36:16.23#ibcon#about to read 3, iclass 11, count 0 2006.230.00:36:16.27#ibcon#read 3, iclass 11, count 0 2006.230.00:36:16.27#ibcon#about to read 4, iclass 11, count 0 2006.230.00:36:16.27#ibcon#read 4, iclass 11, count 0 2006.230.00:36:16.27#ibcon#about to read 5, iclass 11, count 0 2006.230.00:36:16.27#ibcon#read 5, iclass 11, count 0 2006.230.00:36:16.27#ibcon#about to read 6, iclass 11, count 0 2006.230.00:36:16.27#ibcon#read 6, iclass 11, count 0 2006.230.00:36:16.27#ibcon#end of sib2, iclass 11, count 0 2006.230.00:36:16.27#ibcon#*after write, iclass 11, count 0 2006.230.00:36:16.27#ibcon#*before return 0, iclass 11, count 0 2006.230.00:36:16.27#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:16.27#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:36:16.27#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:36:16.27#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:36:16.27$vck44/vb=8,4 2006.230.00:36:16.27#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.00:36:16.27#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.00:36:16.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:36:16.27#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:16.33#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:16.33#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:16.33#ibcon#enter wrdev, iclass 13, count 2 2006.230.00:36:16.33#ibcon#first serial, iclass 13, count 2 2006.230.00:36:16.33#ibcon#enter sib2, iclass 13, count 2 2006.230.00:36:16.33#ibcon#flushed, iclass 13, count 2 2006.230.00:36:16.33#ibcon#about to write, iclass 13, count 2 2006.230.00:36:16.33#ibcon#wrote, iclass 13, count 2 2006.230.00:36:16.33#ibcon#about to read 3, iclass 13, count 2 2006.230.00:36:16.35#ibcon#read 3, iclass 13, count 2 2006.230.00:36:16.35#ibcon#about to read 4, iclass 13, count 2 2006.230.00:36:16.35#ibcon#read 4, iclass 13, count 2 2006.230.00:36:16.35#ibcon#about to read 5, iclass 13, count 2 2006.230.00:36:16.35#ibcon#read 5, iclass 13, count 2 2006.230.00:36:16.35#ibcon#about to read 6, iclass 13, count 2 2006.230.00:36:16.35#ibcon#read 6, iclass 13, count 2 2006.230.00:36:16.35#ibcon#end of sib2, iclass 13, count 2 2006.230.00:36:16.35#ibcon#*mode == 0, iclass 13, count 2 2006.230.00:36:16.35#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.00:36:16.35#ibcon#[27=AT08-04\r\n] 2006.230.00:36:16.35#ibcon#*before write, iclass 13, count 2 2006.230.00:36:16.35#ibcon#enter sib2, iclass 13, count 2 2006.230.00:36:16.35#ibcon#flushed, iclass 13, count 2 2006.230.00:36:16.35#ibcon#about to write, iclass 13, count 2 2006.230.00:36:16.35#ibcon#wrote, iclass 13, count 2 2006.230.00:36:16.35#ibcon#about to read 3, iclass 13, count 2 2006.230.00:36:16.38#ibcon#read 3, iclass 13, count 2 2006.230.00:36:16.38#ibcon#about to read 4, iclass 13, count 2 2006.230.00:36:16.38#ibcon#read 4, iclass 13, count 2 2006.230.00:36:16.38#ibcon#about to read 5, iclass 13, count 2 2006.230.00:36:16.38#ibcon#read 5, iclass 13, count 2 2006.230.00:36:16.38#ibcon#about to read 6, iclass 13, count 2 2006.230.00:36:16.38#ibcon#read 6, iclass 13, count 2 2006.230.00:36:16.38#ibcon#end of sib2, iclass 13, count 2 2006.230.00:36:16.38#ibcon#*after write, iclass 13, count 2 2006.230.00:36:16.38#ibcon#*before return 0, iclass 13, count 2 2006.230.00:36:16.38#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:16.38#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.00:36:16.38#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.00:36:16.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:36:16.38#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:16.50#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:16.50#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:16.50#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:36:16.50#ibcon#first serial, iclass 13, count 0 2006.230.00:36:16.50#ibcon#enter sib2, iclass 13, count 0 2006.230.00:36:16.50#ibcon#flushed, iclass 13, count 0 2006.230.00:36:16.50#ibcon#about to write, iclass 13, count 0 2006.230.00:36:16.50#ibcon#wrote, iclass 13, count 0 2006.230.00:36:16.50#ibcon#about to read 3, iclass 13, count 0 2006.230.00:36:16.52#ibcon#read 3, iclass 13, count 0 2006.230.00:36:16.52#ibcon#about to read 4, iclass 13, count 0 2006.230.00:36:16.52#ibcon#read 4, iclass 13, count 0 2006.230.00:36:16.52#ibcon#about to read 5, iclass 13, count 0 2006.230.00:36:16.52#ibcon#read 5, iclass 13, count 0 2006.230.00:36:16.52#ibcon#about to read 6, iclass 13, count 0 2006.230.00:36:16.52#ibcon#read 6, iclass 13, count 0 2006.230.00:36:16.52#ibcon#end of sib2, iclass 13, count 0 2006.230.00:36:16.52#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:36:16.52#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:36:16.52#ibcon#[27=USB\r\n] 2006.230.00:36:16.52#ibcon#*before write, iclass 13, count 0 2006.230.00:36:16.52#ibcon#enter sib2, iclass 13, count 0 2006.230.00:36:16.52#ibcon#flushed, iclass 13, count 0 2006.230.00:36:16.52#ibcon#about to write, iclass 13, count 0 2006.230.00:36:16.52#ibcon#wrote, iclass 13, count 0 2006.230.00:36:16.52#ibcon#about to read 3, iclass 13, count 0 2006.230.00:36:16.55#ibcon#read 3, iclass 13, count 0 2006.230.00:36:16.55#ibcon#about to read 4, iclass 13, count 0 2006.230.00:36:16.55#ibcon#read 4, iclass 13, count 0 2006.230.00:36:16.55#ibcon#about to read 5, iclass 13, count 0 2006.230.00:36:16.55#ibcon#read 5, iclass 13, count 0 2006.230.00:36:16.55#ibcon#about to read 6, iclass 13, count 0 2006.230.00:36:16.55#ibcon#read 6, iclass 13, count 0 2006.230.00:36:16.55#ibcon#end of sib2, iclass 13, count 0 2006.230.00:36:16.55#ibcon#*after write, iclass 13, count 0 2006.230.00:36:16.55#ibcon#*before return 0, iclass 13, count 0 2006.230.00:36:16.55#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:16.55#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.00:36:16.55#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:36:16.55#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:36:16.55$vck44/vabw=wide 2006.230.00:36:16.55#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.00:36:16.55#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.00:36:16.55#ibcon#ireg 8 cls_cnt 0 2006.230.00:36:16.55#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:16.55#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:16.55#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:16.55#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:36:16.55#ibcon#first serial, iclass 15, count 0 2006.230.00:36:16.55#ibcon#enter sib2, iclass 15, count 0 2006.230.00:36:16.55#ibcon#flushed, iclass 15, count 0 2006.230.00:36:16.55#ibcon#about to write, iclass 15, count 0 2006.230.00:36:16.55#ibcon#wrote, iclass 15, count 0 2006.230.00:36:16.55#ibcon#about to read 3, iclass 15, count 0 2006.230.00:36:16.57#ibcon#read 3, iclass 15, count 0 2006.230.00:36:16.57#ibcon#about to read 4, iclass 15, count 0 2006.230.00:36:16.57#ibcon#read 4, iclass 15, count 0 2006.230.00:36:16.57#ibcon#about to read 5, iclass 15, count 0 2006.230.00:36:16.57#ibcon#read 5, iclass 15, count 0 2006.230.00:36:16.57#ibcon#about to read 6, iclass 15, count 0 2006.230.00:36:16.57#ibcon#read 6, iclass 15, count 0 2006.230.00:36:16.57#ibcon#end of sib2, iclass 15, count 0 2006.230.00:36:16.57#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:36:16.57#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:36:16.57#ibcon#[25=BW32\r\n] 2006.230.00:36:16.57#ibcon#*before write, iclass 15, count 0 2006.230.00:36:16.57#ibcon#enter sib2, iclass 15, count 0 2006.230.00:36:16.57#ibcon#flushed, iclass 15, count 0 2006.230.00:36:16.57#ibcon#about to write, iclass 15, count 0 2006.230.00:36:16.57#ibcon#wrote, iclass 15, count 0 2006.230.00:36:16.57#ibcon#about to read 3, iclass 15, count 0 2006.230.00:36:16.60#ibcon#read 3, iclass 15, count 0 2006.230.00:36:16.60#ibcon#about to read 4, iclass 15, count 0 2006.230.00:36:16.60#ibcon#read 4, iclass 15, count 0 2006.230.00:36:16.60#ibcon#about to read 5, iclass 15, count 0 2006.230.00:36:16.60#ibcon#read 5, iclass 15, count 0 2006.230.00:36:16.60#ibcon#about to read 6, iclass 15, count 0 2006.230.00:36:16.60#ibcon#read 6, iclass 15, count 0 2006.230.00:36:16.60#ibcon#end of sib2, iclass 15, count 0 2006.230.00:36:16.60#ibcon#*after write, iclass 15, count 0 2006.230.00:36:16.60#ibcon#*before return 0, iclass 15, count 0 2006.230.00:36:16.60#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:16.60#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.00:36:16.60#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:36:16.60#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:36:16.60$vck44/vbbw=wide 2006.230.00:36:16.60#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:36:16.60#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:36:16.60#ibcon#ireg 8 cls_cnt 0 2006.230.00:36:16.60#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:36:16.67#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:36:16.67#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:36:16.67#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:36:16.67#ibcon#first serial, iclass 17, count 0 2006.230.00:36:16.67#ibcon#enter sib2, iclass 17, count 0 2006.230.00:36:16.67#ibcon#flushed, iclass 17, count 0 2006.230.00:36:16.67#ibcon#about to write, iclass 17, count 0 2006.230.00:36:16.67#ibcon#wrote, iclass 17, count 0 2006.230.00:36:16.67#ibcon#about to read 3, iclass 17, count 0 2006.230.00:36:16.69#ibcon#read 3, iclass 17, count 0 2006.230.00:36:16.69#ibcon#about to read 4, iclass 17, count 0 2006.230.00:36:16.69#ibcon#read 4, iclass 17, count 0 2006.230.00:36:16.69#ibcon#about to read 5, iclass 17, count 0 2006.230.00:36:16.69#ibcon#read 5, iclass 17, count 0 2006.230.00:36:16.69#ibcon#about to read 6, iclass 17, count 0 2006.230.00:36:16.69#ibcon#read 6, iclass 17, count 0 2006.230.00:36:16.69#ibcon#end of sib2, iclass 17, count 0 2006.230.00:36:16.69#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:36:16.69#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:36:16.69#ibcon#[27=BW32\r\n] 2006.230.00:36:16.69#ibcon#*before write, iclass 17, count 0 2006.230.00:36:16.69#ibcon#enter sib2, iclass 17, count 0 2006.230.00:36:16.69#ibcon#flushed, iclass 17, count 0 2006.230.00:36:16.69#ibcon#about to write, iclass 17, count 0 2006.230.00:36:16.69#ibcon#wrote, iclass 17, count 0 2006.230.00:36:16.69#ibcon#about to read 3, iclass 17, count 0 2006.230.00:36:16.72#ibcon#read 3, iclass 17, count 0 2006.230.00:36:16.72#ibcon#about to read 4, iclass 17, count 0 2006.230.00:36:16.72#ibcon#read 4, iclass 17, count 0 2006.230.00:36:16.72#ibcon#about to read 5, iclass 17, count 0 2006.230.00:36:16.72#ibcon#read 5, iclass 17, count 0 2006.230.00:36:16.72#ibcon#about to read 6, iclass 17, count 0 2006.230.00:36:16.72#ibcon#read 6, iclass 17, count 0 2006.230.00:36:16.72#ibcon#end of sib2, iclass 17, count 0 2006.230.00:36:16.72#ibcon#*after write, iclass 17, count 0 2006.230.00:36:16.72#ibcon#*before return 0, iclass 17, count 0 2006.230.00:36:16.72#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:36:16.72#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:36:16.72#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:36:16.72#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:36:16.72$setupk4/ifdk4 2006.230.00:36:16.72$ifdk4/lo= 2006.230.00:36:16.72$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:36:16.72$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:36:16.72$ifdk4/patch= 2006.230.00:36:16.72$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:36:16.72$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:36:16.72$setupk4/!*+20s 2006.230.00:36:25.11#abcon#<5=/09 2.5 7.2 31.66 751002.7\r\n> 2006.230.00:36:25.13#abcon#{5=INTERFACE CLEAR} 2006.230.00:36:25.19#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:36:31.22$setupk4/"tpicd 2006.230.00:36:31.22$setupk4/echo=off 2006.230.00:36:31.22$setupk4/xlog=off 2006.230.00:36:31.22:!2006.230.00:44:09 2006.230.00:36:53.13#trakl#Source acquired 2006.230.00:36:54.13#flagr#flagr/antenna,acquired 2006.230.00:44:09.00:preob 2006.230.00:44:10.13/onsource/TRACKING 2006.230.00:44:10.13:!2006.230.00:44:19 2006.230.00:44:19.00:"tape 2006.230.00:44:19.00:"st=record 2006.230.00:44:19.00:data_valid=on 2006.230.00:44:19.00:midob 2006.230.00:44:19.13/onsource/TRACKING 2006.230.00:44:19.13/wx/31.97,1002.8,75 2006.230.00:44:19.26/cable/+6.3996E-03 2006.230.00:44:20.35/va/01,08,usb,yes,30,33 2006.230.00:44:20.35/va/02,07,usb,yes,33,33 2006.230.00:44:20.35/va/03,06,usb,yes,40,43 2006.230.00:44:20.35/va/04,07,usb,yes,34,35 2006.230.00:44:20.35/va/05,04,usb,yes,30,31 2006.230.00:44:20.35/va/06,04,usb,yes,34,33 2006.230.00:44:20.35/va/07,05,usb,yes,30,30 2006.230.00:44:20.35/va/08,06,usb,yes,22,27 2006.230.00:44:20.58/valo/01,524.99,yes,locked 2006.230.00:44:20.58/valo/02,534.99,yes,locked 2006.230.00:44:20.58/valo/03,564.99,yes,locked 2006.230.00:44:20.58/valo/04,624.99,yes,locked 2006.230.00:44:20.58/valo/05,734.99,yes,locked 2006.230.00:44:20.58/valo/06,814.99,yes,locked 2006.230.00:44:20.58/valo/07,864.99,yes,locked 2006.230.00:44:20.58/valo/08,884.99,yes,locked 2006.230.00:44:21.67/vb/01,04,usb,yes,32,29 2006.230.00:44:21.67/vb/02,04,usb,yes,34,34 2006.230.00:44:21.67/vb/03,04,usb,yes,31,34 2006.230.00:44:21.67/vb/04,04,usb,yes,35,34 2006.230.00:44:21.67/vb/05,04,usb,yes,28,30 2006.230.00:44:21.67/vb/06,04,usb,yes,32,28 2006.230.00:44:21.67/vb/07,04,usb,yes,32,32 2006.230.00:44:21.67/vb/08,04,usb,yes,29,33 2006.230.00:44:21.91/vblo/01,629.99,yes,locked 2006.230.00:44:21.91/vblo/02,634.99,yes,locked 2006.230.00:44:21.91/vblo/03,649.99,yes,locked 2006.230.00:44:21.91/vblo/04,679.99,yes,locked 2006.230.00:44:21.91/vblo/05,709.99,yes,locked 2006.230.00:44:21.91/vblo/06,719.99,yes,locked 2006.230.00:44:21.91/vblo/07,734.99,yes,locked 2006.230.00:44:21.91/vblo/08,744.99,yes,locked 2006.230.00:44:22.06/vabw/8 2006.230.00:44:22.21/vbbw/8 2006.230.00:44:22.39/xfe/off,on,12.5 2006.230.00:44:22.78/ifatt/23,28,28,28 2006.230.00:44:23.07/fmout-gps/S +4.50E-07 2006.230.00:44:23.11:!2006.230.00:46:59 2006.230.00:46:59.01:data_valid=off 2006.230.00:46:59.01:"et 2006.230.00:46:59.01:!+3s 2006.230.00:47:02.02:"tape 2006.230.00:47:02.02:postob 2006.230.00:47:02.10/cable/+6.4001E-03 2006.230.00:47:02.10/wx/31.99,1002.8,71 2006.230.00:47:03.08/fmout-gps/S +4.51E-07 2006.230.00:47:03.08:scan_name=230-0050,jd0608,320 2006.230.00:47:03.08:source=nrao150,035929.75,505750.2,2000.0,cw 2006.230.00:47:04.14#flagr#flagr/antenna,new-source 2006.230.00:47:04.14:checkk5 2006.230.00:47:04.55/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:47:04.96/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:47:05.37/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:47:05.78/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:47:06.17/chk_obsdata//k5ts1/T2300044??a.dat file size is correct (nominal:640MB, actual:636MB). 2006.230.00:47:06.57/chk_obsdata//k5ts2/T2300044??b.dat file size is correct (nominal:640MB, actual:636MB). 2006.230.00:47:06.96/chk_obsdata//k5ts3/T2300044??c.dat file size is correct (nominal:640MB, actual:636MB). 2006.230.00:47:07.35/chk_obsdata//k5ts4/T2300044??d.dat file size is correct (nominal:640MB, actual:636MB). 2006.230.00:47:08.06/k5log//k5ts1_log_newline 2006.230.00:47:08.78/k5log//k5ts2_log_newline 2006.230.00:47:09.51/k5log//k5ts3_log_newline 2006.230.00:47:10.22/k5log//k5ts4_log_newline 2006.230.00:47:10.24/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:47:10.24:setupk4=1 2006.230.00:47:10.24$setupk4/echo=on 2006.230.00:47:10.24$setupk4/pcalon 2006.230.00:47:10.24$pcalon/"no phase cal control is implemented here 2006.230.00:47:10.24$setupk4/"tpicd=stop 2006.230.00:47:10.24$setupk4/"rec=synch_on 2006.230.00:47:10.24$setupk4/"rec_mode=128 2006.230.00:47:10.24$setupk4/!* 2006.230.00:47:10.24$setupk4/recpk4 2006.230.00:47:10.24$recpk4/recpatch= 2006.230.00:47:10.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:47:10.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:47:10.25$setupk4/vck44 2006.230.00:47:10.25$vck44/valo=1,524.99 2006.230.00:47:10.25#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.00:47:10.25#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.00:47:10.25#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:10.25#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:10.25#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:10.25#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:10.25#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:47:10.25#ibcon#first serial, iclass 26, count 0 2006.230.00:47:10.25#ibcon#enter sib2, iclass 26, count 0 2006.230.00:47:10.25#ibcon#flushed, iclass 26, count 0 2006.230.00:47:10.25#ibcon#about to write, iclass 26, count 0 2006.230.00:47:10.25#ibcon#wrote, iclass 26, count 0 2006.230.00:47:10.25#ibcon#about to read 3, iclass 26, count 0 2006.230.00:47:10.26#ibcon#read 3, iclass 26, count 0 2006.230.00:47:10.26#ibcon#about to read 4, iclass 26, count 0 2006.230.00:47:10.26#ibcon#read 4, iclass 26, count 0 2006.230.00:47:10.26#ibcon#about to read 5, iclass 26, count 0 2006.230.00:47:10.26#ibcon#read 5, iclass 26, count 0 2006.230.00:47:10.26#ibcon#about to read 6, iclass 26, count 0 2006.230.00:47:10.26#ibcon#read 6, iclass 26, count 0 2006.230.00:47:10.26#ibcon#end of sib2, iclass 26, count 0 2006.230.00:47:10.26#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:47:10.26#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:47:10.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:47:10.26#ibcon#*before write, iclass 26, count 0 2006.230.00:47:10.26#ibcon#enter sib2, iclass 26, count 0 2006.230.00:47:10.26#ibcon#flushed, iclass 26, count 0 2006.230.00:47:10.26#ibcon#about to write, iclass 26, count 0 2006.230.00:47:10.26#ibcon#wrote, iclass 26, count 0 2006.230.00:47:10.26#ibcon#about to read 3, iclass 26, count 0 2006.230.00:47:10.31#ibcon#read 3, iclass 26, count 0 2006.230.00:47:10.31#ibcon#about to read 4, iclass 26, count 0 2006.230.00:47:10.31#ibcon#read 4, iclass 26, count 0 2006.230.00:47:10.31#ibcon#about to read 5, iclass 26, count 0 2006.230.00:47:10.31#ibcon#read 5, iclass 26, count 0 2006.230.00:47:10.31#ibcon#about to read 6, iclass 26, count 0 2006.230.00:47:10.31#ibcon#read 6, iclass 26, count 0 2006.230.00:47:10.31#ibcon#end of sib2, iclass 26, count 0 2006.230.00:47:10.31#ibcon#*after write, iclass 26, count 0 2006.230.00:47:10.31#ibcon#*before return 0, iclass 26, count 0 2006.230.00:47:10.31#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:10.31#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:10.31#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:47:10.31#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:47:10.31$vck44/va=1,8 2006.230.00:47:10.31#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.00:47:10.31#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.00:47:10.31#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:10.31#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:10.31#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:10.31#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:10.31#ibcon#enter wrdev, iclass 28, count 2 2006.230.00:47:10.31#ibcon#first serial, iclass 28, count 2 2006.230.00:47:10.31#ibcon#enter sib2, iclass 28, count 2 2006.230.00:47:10.31#ibcon#flushed, iclass 28, count 2 2006.230.00:47:10.31#ibcon#about to write, iclass 28, count 2 2006.230.00:47:10.31#ibcon#wrote, iclass 28, count 2 2006.230.00:47:10.31#ibcon#about to read 3, iclass 28, count 2 2006.230.00:47:10.33#ibcon#read 3, iclass 28, count 2 2006.230.00:47:10.33#ibcon#about to read 4, iclass 28, count 2 2006.230.00:47:10.33#ibcon#read 4, iclass 28, count 2 2006.230.00:47:10.33#ibcon#about to read 5, iclass 28, count 2 2006.230.00:47:10.33#ibcon#read 5, iclass 28, count 2 2006.230.00:47:10.33#ibcon#about to read 6, iclass 28, count 2 2006.230.00:47:10.33#ibcon#read 6, iclass 28, count 2 2006.230.00:47:10.33#ibcon#end of sib2, iclass 28, count 2 2006.230.00:47:10.33#ibcon#*mode == 0, iclass 28, count 2 2006.230.00:47:10.33#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.00:47:10.33#ibcon#[25=AT01-08\r\n] 2006.230.00:47:10.33#ibcon#*before write, iclass 28, count 2 2006.230.00:47:10.33#ibcon#enter sib2, iclass 28, count 2 2006.230.00:47:10.33#ibcon#flushed, iclass 28, count 2 2006.230.00:47:10.33#ibcon#about to write, iclass 28, count 2 2006.230.00:47:10.33#ibcon#wrote, iclass 28, count 2 2006.230.00:47:10.33#ibcon#about to read 3, iclass 28, count 2 2006.230.00:47:10.36#ibcon#read 3, iclass 28, count 2 2006.230.00:47:10.36#ibcon#about to read 4, iclass 28, count 2 2006.230.00:47:10.36#ibcon#read 4, iclass 28, count 2 2006.230.00:47:10.36#ibcon#about to read 5, iclass 28, count 2 2006.230.00:47:10.36#ibcon#read 5, iclass 28, count 2 2006.230.00:47:10.36#ibcon#about to read 6, iclass 28, count 2 2006.230.00:47:10.36#ibcon#read 6, iclass 28, count 2 2006.230.00:47:10.36#ibcon#end of sib2, iclass 28, count 2 2006.230.00:47:10.36#ibcon#*after write, iclass 28, count 2 2006.230.00:47:10.36#ibcon#*before return 0, iclass 28, count 2 2006.230.00:47:10.36#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:10.36#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:10.36#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.00:47:10.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:10.36#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:10.48#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:10.48#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:10.48#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:47:10.48#ibcon#first serial, iclass 28, count 0 2006.230.00:47:10.48#ibcon#enter sib2, iclass 28, count 0 2006.230.00:47:10.48#ibcon#flushed, iclass 28, count 0 2006.230.00:47:10.48#ibcon#about to write, iclass 28, count 0 2006.230.00:47:10.48#ibcon#wrote, iclass 28, count 0 2006.230.00:47:10.48#ibcon#about to read 3, iclass 28, count 0 2006.230.00:47:10.50#ibcon#read 3, iclass 28, count 0 2006.230.00:47:10.50#ibcon#about to read 4, iclass 28, count 0 2006.230.00:47:10.50#ibcon#read 4, iclass 28, count 0 2006.230.00:47:10.50#ibcon#about to read 5, iclass 28, count 0 2006.230.00:47:10.50#ibcon#read 5, iclass 28, count 0 2006.230.00:47:10.50#ibcon#about to read 6, iclass 28, count 0 2006.230.00:47:10.50#ibcon#read 6, iclass 28, count 0 2006.230.00:47:10.50#ibcon#end of sib2, iclass 28, count 0 2006.230.00:47:10.50#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:47:10.50#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:47:10.50#ibcon#[25=USB\r\n] 2006.230.00:47:10.50#ibcon#*before write, iclass 28, count 0 2006.230.00:47:10.50#ibcon#enter sib2, iclass 28, count 0 2006.230.00:47:10.50#ibcon#flushed, iclass 28, count 0 2006.230.00:47:10.50#ibcon#about to write, iclass 28, count 0 2006.230.00:47:10.50#ibcon#wrote, iclass 28, count 0 2006.230.00:47:10.50#ibcon#about to read 3, iclass 28, count 0 2006.230.00:47:10.53#ibcon#read 3, iclass 28, count 0 2006.230.00:47:10.53#ibcon#about to read 4, iclass 28, count 0 2006.230.00:47:10.53#ibcon#read 4, iclass 28, count 0 2006.230.00:47:10.53#ibcon#about to read 5, iclass 28, count 0 2006.230.00:47:10.53#ibcon#read 5, iclass 28, count 0 2006.230.00:47:10.53#ibcon#about to read 6, iclass 28, count 0 2006.230.00:47:10.53#ibcon#read 6, iclass 28, count 0 2006.230.00:47:10.53#ibcon#end of sib2, iclass 28, count 0 2006.230.00:47:10.53#ibcon#*after write, iclass 28, count 0 2006.230.00:47:10.53#ibcon#*before return 0, iclass 28, count 0 2006.230.00:47:10.53#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:10.53#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:10.53#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:47:10.53#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:47:10.53$vck44/valo=2,534.99 2006.230.00:47:10.53#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.00:47:10.53#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.00:47:10.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:10.53#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:10.53#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:10.53#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:10.53#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:47:10.53#ibcon#first serial, iclass 30, count 0 2006.230.00:47:10.53#ibcon#enter sib2, iclass 30, count 0 2006.230.00:47:10.53#ibcon#flushed, iclass 30, count 0 2006.230.00:47:10.53#ibcon#about to write, iclass 30, count 0 2006.230.00:47:10.53#ibcon#wrote, iclass 30, count 0 2006.230.00:47:10.53#ibcon#about to read 3, iclass 30, count 0 2006.230.00:47:10.55#ibcon#read 3, iclass 30, count 0 2006.230.00:47:10.55#ibcon#about to read 4, iclass 30, count 0 2006.230.00:47:10.55#ibcon#read 4, iclass 30, count 0 2006.230.00:47:10.55#ibcon#about to read 5, iclass 30, count 0 2006.230.00:47:10.55#ibcon#read 5, iclass 30, count 0 2006.230.00:47:10.55#ibcon#about to read 6, iclass 30, count 0 2006.230.00:47:10.55#ibcon#read 6, iclass 30, count 0 2006.230.00:47:10.55#ibcon#end of sib2, iclass 30, count 0 2006.230.00:47:10.55#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:47:10.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:47:10.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:47:10.55#ibcon#*before write, iclass 30, count 0 2006.230.00:47:10.55#ibcon#enter sib2, iclass 30, count 0 2006.230.00:47:10.55#ibcon#flushed, iclass 30, count 0 2006.230.00:47:10.55#ibcon#about to write, iclass 30, count 0 2006.230.00:47:10.55#ibcon#wrote, iclass 30, count 0 2006.230.00:47:10.55#ibcon#about to read 3, iclass 30, count 0 2006.230.00:47:10.59#ibcon#read 3, iclass 30, count 0 2006.230.00:47:10.59#ibcon#about to read 4, iclass 30, count 0 2006.230.00:47:10.59#ibcon#read 4, iclass 30, count 0 2006.230.00:47:10.59#ibcon#about to read 5, iclass 30, count 0 2006.230.00:47:10.59#ibcon#read 5, iclass 30, count 0 2006.230.00:47:10.59#ibcon#about to read 6, iclass 30, count 0 2006.230.00:47:10.59#ibcon#read 6, iclass 30, count 0 2006.230.00:47:10.59#ibcon#end of sib2, iclass 30, count 0 2006.230.00:47:10.59#ibcon#*after write, iclass 30, count 0 2006.230.00:47:10.59#ibcon#*before return 0, iclass 30, count 0 2006.230.00:47:10.59#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:10.59#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:10.59#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:47:10.59#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:47:10.59$vck44/va=2,7 2006.230.00:47:10.59#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.00:47:10.59#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.00:47:10.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:10.59#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:10.65#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:10.65#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:10.65#ibcon#enter wrdev, iclass 32, count 2 2006.230.00:47:10.65#ibcon#first serial, iclass 32, count 2 2006.230.00:47:10.65#ibcon#enter sib2, iclass 32, count 2 2006.230.00:47:10.65#ibcon#flushed, iclass 32, count 2 2006.230.00:47:10.65#ibcon#about to write, iclass 32, count 2 2006.230.00:47:10.65#ibcon#wrote, iclass 32, count 2 2006.230.00:47:10.65#ibcon#about to read 3, iclass 32, count 2 2006.230.00:47:10.67#ibcon#read 3, iclass 32, count 2 2006.230.00:47:10.67#ibcon#about to read 4, iclass 32, count 2 2006.230.00:47:10.67#ibcon#read 4, iclass 32, count 2 2006.230.00:47:10.67#ibcon#about to read 5, iclass 32, count 2 2006.230.00:47:10.67#ibcon#read 5, iclass 32, count 2 2006.230.00:47:10.67#ibcon#about to read 6, iclass 32, count 2 2006.230.00:47:10.67#ibcon#read 6, iclass 32, count 2 2006.230.00:47:10.67#ibcon#end of sib2, iclass 32, count 2 2006.230.00:47:10.67#ibcon#*mode == 0, iclass 32, count 2 2006.230.00:47:10.67#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.00:47:10.67#ibcon#[25=AT02-07\r\n] 2006.230.00:47:10.67#ibcon#*before write, iclass 32, count 2 2006.230.00:47:10.67#ibcon#enter sib2, iclass 32, count 2 2006.230.00:47:10.67#ibcon#flushed, iclass 32, count 2 2006.230.00:47:10.67#ibcon#about to write, iclass 32, count 2 2006.230.00:47:10.67#ibcon#wrote, iclass 32, count 2 2006.230.00:47:10.67#ibcon#about to read 3, iclass 32, count 2 2006.230.00:47:10.70#ibcon#read 3, iclass 32, count 2 2006.230.00:47:10.70#ibcon#about to read 4, iclass 32, count 2 2006.230.00:47:10.70#ibcon#read 4, iclass 32, count 2 2006.230.00:47:10.70#ibcon#about to read 5, iclass 32, count 2 2006.230.00:47:10.70#ibcon#read 5, iclass 32, count 2 2006.230.00:47:10.70#ibcon#about to read 6, iclass 32, count 2 2006.230.00:47:10.70#ibcon#read 6, iclass 32, count 2 2006.230.00:47:10.70#ibcon#end of sib2, iclass 32, count 2 2006.230.00:47:10.70#ibcon#*after write, iclass 32, count 2 2006.230.00:47:10.70#ibcon#*before return 0, iclass 32, count 2 2006.230.00:47:10.70#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:10.70#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:10.70#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.00:47:10.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:10.70#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:10.82#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:10.82#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:10.82#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:47:10.82#ibcon#first serial, iclass 32, count 0 2006.230.00:47:10.82#ibcon#enter sib2, iclass 32, count 0 2006.230.00:47:10.82#ibcon#flushed, iclass 32, count 0 2006.230.00:47:10.82#ibcon#about to write, iclass 32, count 0 2006.230.00:47:10.82#ibcon#wrote, iclass 32, count 0 2006.230.00:47:10.82#ibcon#about to read 3, iclass 32, count 0 2006.230.00:47:10.84#ibcon#read 3, iclass 32, count 0 2006.230.00:47:10.84#ibcon#about to read 4, iclass 32, count 0 2006.230.00:47:10.84#ibcon#read 4, iclass 32, count 0 2006.230.00:47:10.84#ibcon#about to read 5, iclass 32, count 0 2006.230.00:47:10.84#ibcon#read 5, iclass 32, count 0 2006.230.00:47:10.84#ibcon#about to read 6, iclass 32, count 0 2006.230.00:47:10.84#ibcon#read 6, iclass 32, count 0 2006.230.00:47:10.84#ibcon#end of sib2, iclass 32, count 0 2006.230.00:47:10.84#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:47:10.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:47:10.84#ibcon#[25=USB\r\n] 2006.230.00:47:10.84#ibcon#*before write, iclass 32, count 0 2006.230.00:47:10.84#ibcon#enter sib2, iclass 32, count 0 2006.230.00:47:10.84#ibcon#flushed, iclass 32, count 0 2006.230.00:47:10.84#ibcon#about to write, iclass 32, count 0 2006.230.00:47:10.84#ibcon#wrote, iclass 32, count 0 2006.230.00:47:10.84#ibcon#about to read 3, iclass 32, count 0 2006.230.00:47:10.87#ibcon#read 3, iclass 32, count 0 2006.230.00:47:10.87#ibcon#about to read 4, iclass 32, count 0 2006.230.00:47:10.87#ibcon#read 4, iclass 32, count 0 2006.230.00:47:10.87#ibcon#about to read 5, iclass 32, count 0 2006.230.00:47:10.87#ibcon#read 5, iclass 32, count 0 2006.230.00:47:10.87#ibcon#about to read 6, iclass 32, count 0 2006.230.00:47:10.87#ibcon#read 6, iclass 32, count 0 2006.230.00:47:10.87#ibcon#end of sib2, iclass 32, count 0 2006.230.00:47:10.87#ibcon#*after write, iclass 32, count 0 2006.230.00:47:10.87#ibcon#*before return 0, iclass 32, count 0 2006.230.00:47:10.87#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:10.87#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:10.87#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:47:10.87#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:47:10.87$vck44/valo=3,564.99 2006.230.00:47:10.87#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.00:47:10.87#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.00:47:10.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:10.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:10.87#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:10.87#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:10.87#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:47:10.87#ibcon#first serial, iclass 34, count 0 2006.230.00:47:10.87#ibcon#enter sib2, iclass 34, count 0 2006.230.00:47:10.87#ibcon#flushed, iclass 34, count 0 2006.230.00:47:10.87#ibcon#about to write, iclass 34, count 0 2006.230.00:47:10.87#ibcon#wrote, iclass 34, count 0 2006.230.00:47:10.87#ibcon#about to read 3, iclass 34, count 0 2006.230.00:47:10.89#ibcon#read 3, iclass 34, count 0 2006.230.00:47:10.89#ibcon#about to read 4, iclass 34, count 0 2006.230.00:47:10.89#ibcon#read 4, iclass 34, count 0 2006.230.00:47:10.89#ibcon#about to read 5, iclass 34, count 0 2006.230.00:47:10.89#ibcon#read 5, iclass 34, count 0 2006.230.00:47:10.89#ibcon#about to read 6, iclass 34, count 0 2006.230.00:47:10.89#ibcon#read 6, iclass 34, count 0 2006.230.00:47:10.89#ibcon#end of sib2, iclass 34, count 0 2006.230.00:47:10.89#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:47:10.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:47:10.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:47:10.89#ibcon#*before write, iclass 34, count 0 2006.230.00:47:10.89#ibcon#enter sib2, iclass 34, count 0 2006.230.00:47:10.89#ibcon#flushed, iclass 34, count 0 2006.230.00:47:10.89#ibcon#about to write, iclass 34, count 0 2006.230.00:47:10.89#ibcon#wrote, iclass 34, count 0 2006.230.00:47:10.89#ibcon#about to read 3, iclass 34, count 0 2006.230.00:47:10.93#ibcon#read 3, iclass 34, count 0 2006.230.00:47:10.93#ibcon#about to read 4, iclass 34, count 0 2006.230.00:47:10.93#ibcon#read 4, iclass 34, count 0 2006.230.00:47:10.93#ibcon#about to read 5, iclass 34, count 0 2006.230.00:47:10.93#ibcon#read 5, iclass 34, count 0 2006.230.00:47:10.93#ibcon#about to read 6, iclass 34, count 0 2006.230.00:47:10.93#ibcon#read 6, iclass 34, count 0 2006.230.00:47:10.93#ibcon#end of sib2, iclass 34, count 0 2006.230.00:47:10.93#ibcon#*after write, iclass 34, count 0 2006.230.00:47:10.93#ibcon#*before return 0, iclass 34, count 0 2006.230.00:47:10.93#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:10.93#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:10.93#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:47:10.93#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:47:10.93$vck44/va=3,6 2006.230.00:47:10.93#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.00:47:10.93#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.00:47:10.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:10.93#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:10.99#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:10.99#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:10.99#ibcon#enter wrdev, iclass 36, count 2 2006.230.00:47:10.99#ibcon#first serial, iclass 36, count 2 2006.230.00:47:10.99#ibcon#enter sib2, iclass 36, count 2 2006.230.00:47:10.99#ibcon#flushed, iclass 36, count 2 2006.230.00:47:10.99#ibcon#about to write, iclass 36, count 2 2006.230.00:47:10.99#ibcon#wrote, iclass 36, count 2 2006.230.00:47:10.99#ibcon#about to read 3, iclass 36, count 2 2006.230.00:47:11.01#ibcon#read 3, iclass 36, count 2 2006.230.00:47:11.01#ibcon#about to read 4, iclass 36, count 2 2006.230.00:47:11.01#ibcon#read 4, iclass 36, count 2 2006.230.00:47:11.01#ibcon#about to read 5, iclass 36, count 2 2006.230.00:47:11.01#ibcon#read 5, iclass 36, count 2 2006.230.00:47:11.01#ibcon#about to read 6, iclass 36, count 2 2006.230.00:47:11.01#ibcon#read 6, iclass 36, count 2 2006.230.00:47:11.01#ibcon#end of sib2, iclass 36, count 2 2006.230.00:47:11.01#ibcon#*mode == 0, iclass 36, count 2 2006.230.00:47:11.01#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.00:47:11.01#ibcon#[25=AT03-06\r\n] 2006.230.00:47:11.01#ibcon#*before write, iclass 36, count 2 2006.230.00:47:11.01#ibcon#enter sib2, iclass 36, count 2 2006.230.00:47:11.01#ibcon#flushed, iclass 36, count 2 2006.230.00:47:11.01#ibcon#about to write, iclass 36, count 2 2006.230.00:47:11.01#ibcon#wrote, iclass 36, count 2 2006.230.00:47:11.01#ibcon#about to read 3, iclass 36, count 2 2006.230.00:47:11.04#ibcon#read 3, iclass 36, count 2 2006.230.00:47:11.04#ibcon#about to read 4, iclass 36, count 2 2006.230.00:47:11.04#ibcon#read 4, iclass 36, count 2 2006.230.00:47:11.04#ibcon#about to read 5, iclass 36, count 2 2006.230.00:47:11.04#ibcon#read 5, iclass 36, count 2 2006.230.00:47:11.04#ibcon#about to read 6, iclass 36, count 2 2006.230.00:47:11.04#ibcon#read 6, iclass 36, count 2 2006.230.00:47:11.04#ibcon#end of sib2, iclass 36, count 2 2006.230.00:47:11.04#ibcon#*after write, iclass 36, count 2 2006.230.00:47:11.04#ibcon#*before return 0, iclass 36, count 2 2006.230.00:47:11.04#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:11.04#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:11.04#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.00:47:11.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:11.04#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:11.16#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:11.16#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:11.16#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:47:11.16#ibcon#first serial, iclass 36, count 0 2006.230.00:47:11.16#ibcon#enter sib2, iclass 36, count 0 2006.230.00:47:11.16#ibcon#flushed, iclass 36, count 0 2006.230.00:47:11.16#ibcon#about to write, iclass 36, count 0 2006.230.00:47:11.16#ibcon#wrote, iclass 36, count 0 2006.230.00:47:11.16#ibcon#about to read 3, iclass 36, count 0 2006.230.00:47:11.18#ibcon#read 3, iclass 36, count 0 2006.230.00:47:11.18#ibcon#about to read 4, iclass 36, count 0 2006.230.00:47:11.18#ibcon#read 4, iclass 36, count 0 2006.230.00:47:11.18#ibcon#about to read 5, iclass 36, count 0 2006.230.00:47:11.18#ibcon#read 5, iclass 36, count 0 2006.230.00:47:11.18#ibcon#about to read 6, iclass 36, count 0 2006.230.00:47:11.18#ibcon#read 6, iclass 36, count 0 2006.230.00:47:11.18#ibcon#end of sib2, iclass 36, count 0 2006.230.00:47:11.18#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:47:11.18#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:47:11.18#ibcon#[25=USB\r\n] 2006.230.00:47:11.18#ibcon#*before write, iclass 36, count 0 2006.230.00:47:11.18#ibcon#enter sib2, iclass 36, count 0 2006.230.00:47:11.18#ibcon#flushed, iclass 36, count 0 2006.230.00:47:11.18#ibcon#about to write, iclass 36, count 0 2006.230.00:47:11.18#ibcon#wrote, iclass 36, count 0 2006.230.00:47:11.18#ibcon#about to read 3, iclass 36, count 0 2006.230.00:47:11.21#ibcon#read 3, iclass 36, count 0 2006.230.00:47:11.21#ibcon#about to read 4, iclass 36, count 0 2006.230.00:47:11.21#ibcon#read 4, iclass 36, count 0 2006.230.00:47:11.21#ibcon#about to read 5, iclass 36, count 0 2006.230.00:47:11.21#ibcon#read 5, iclass 36, count 0 2006.230.00:47:11.21#ibcon#about to read 6, iclass 36, count 0 2006.230.00:47:11.21#ibcon#read 6, iclass 36, count 0 2006.230.00:47:11.21#ibcon#end of sib2, iclass 36, count 0 2006.230.00:47:11.21#ibcon#*after write, iclass 36, count 0 2006.230.00:47:11.21#ibcon#*before return 0, iclass 36, count 0 2006.230.00:47:11.21#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:11.21#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:11.21#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:47:11.21#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:47:11.21$vck44/valo=4,624.99 2006.230.00:47:11.21#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.00:47:11.21#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.00:47:11.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:11.21#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:11.21#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:11.21#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:11.21#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:47:11.21#ibcon#first serial, iclass 38, count 0 2006.230.00:47:11.21#ibcon#enter sib2, iclass 38, count 0 2006.230.00:47:11.21#ibcon#flushed, iclass 38, count 0 2006.230.00:47:11.21#ibcon#about to write, iclass 38, count 0 2006.230.00:47:11.21#ibcon#wrote, iclass 38, count 0 2006.230.00:47:11.21#ibcon#about to read 3, iclass 38, count 0 2006.230.00:47:11.23#ibcon#read 3, iclass 38, count 0 2006.230.00:47:11.23#ibcon#about to read 4, iclass 38, count 0 2006.230.00:47:11.23#ibcon#read 4, iclass 38, count 0 2006.230.00:47:11.23#ibcon#about to read 5, iclass 38, count 0 2006.230.00:47:11.23#ibcon#read 5, iclass 38, count 0 2006.230.00:47:11.23#ibcon#about to read 6, iclass 38, count 0 2006.230.00:47:11.23#ibcon#read 6, iclass 38, count 0 2006.230.00:47:11.23#ibcon#end of sib2, iclass 38, count 0 2006.230.00:47:11.23#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:47:11.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:47:11.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:47:11.23#ibcon#*before write, iclass 38, count 0 2006.230.00:47:11.23#ibcon#enter sib2, iclass 38, count 0 2006.230.00:47:11.23#ibcon#flushed, iclass 38, count 0 2006.230.00:47:11.23#ibcon#about to write, iclass 38, count 0 2006.230.00:47:11.23#ibcon#wrote, iclass 38, count 0 2006.230.00:47:11.23#ibcon#about to read 3, iclass 38, count 0 2006.230.00:47:11.27#ibcon#read 3, iclass 38, count 0 2006.230.00:47:11.27#ibcon#about to read 4, iclass 38, count 0 2006.230.00:47:11.27#ibcon#read 4, iclass 38, count 0 2006.230.00:47:11.27#ibcon#about to read 5, iclass 38, count 0 2006.230.00:47:11.27#ibcon#read 5, iclass 38, count 0 2006.230.00:47:11.27#ibcon#about to read 6, iclass 38, count 0 2006.230.00:47:11.27#ibcon#read 6, iclass 38, count 0 2006.230.00:47:11.27#ibcon#end of sib2, iclass 38, count 0 2006.230.00:47:11.27#ibcon#*after write, iclass 38, count 0 2006.230.00:47:11.27#ibcon#*before return 0, iclass 38, count 0 2006.230.00:47:11.27#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:11.27#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:11.27#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:47:11.27#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:47:11.27$vck44/va=4,7 2006.230.00:47:11.27#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.00:47:11.27#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.00:47:11.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:11.27#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:11.33#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:11.33#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:11.33#ibcon#enter wrdev, iclass 40, count 2 2006.230.00:47:11.33#ibcon#first serial, iclass 40, count 2 2006.230.00:47:11.33#ibcon#enter sib2, iclass 40, count 2 2006.230.00:47:11.33#ibcon#flushed, iclass 40, count 2 2006.230.00:47:11.33#ibcon#about to write, iclass 40, count 2 2006.230.00:47:11.33#ibcon#wrote, iclass 40, count 2 2006.230.00:47:11.33#ibcon#about to read 3, iclass 40, count 2 2006.230.00:47:11.35#ibcon#read 3, iclass 40, count 2 2006.230.00:47:11.35#ibcon#about to read 4, iclass 40, count 2 2006.230.00:47:11.35#ibcon#read 4, iclass 40, count 2 2006.230.00:47:11.35#ibcon#about to read 5, iclass 40, count 2 2006.230.00:47:11.35#ibcon#read 5, iclass 40, count 2 2006.230.00:47:11.35#ibcon#about to read 6, iclass 40, count 2 2006.230.00:47:11.35#ibcon#read 6, iclass 40, count 2 2006.230.00:47:11.35#ibcon#end of sib2, iclass 40, count 2 2006.230.00:47:11.35#ibcon#*mode == 0, iclass 40, count 2 2006.230.00:47:11.35#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.00:47:11.35#ibcon#[25=AT04-07\r\n] 2006.230.00:47:11.35#ibcon#*before write, iclass 40, count 2 2006.230.00:47:11.35#ibcon#enter sib2, iclass 40, count 2 2006.230.00:47:11.35#ibcon#flushed, iclass 40, count 2 2006.230.00:47:11.35#ibcon#about to write, iclass 40, count 2 2006.230.00:47:11.35#ibcon#wrote, iclass 40, count 2 2006.230.00:47:11.35#ibcon#about to read 3, iclass 40, count 2 2006.230.00:47:11.38#ibcon#read 3, iclass 40, count 2 2006.230.00:47:11.38#ibcon#about to read 4, iclass 40, count 2 2006.230.00:47:11.38#ibcon#read 4, iclass 40, count 2 2006.230.00:47:11.38#ibcon#about to read 5, iclass 40, count 2 2006.230.00:47:11.38#ibcon#read 5, iclass 40, count 2 2006.230.00:47:11.38#ibcon#about to read 6, iclass 40, count 2 2006.230.00:47:11.38#ibcon#read 6, iclass 40, count 2 2006.230.00:47:11.38#ibcon#end of sib2, iclass 40, count 2 2006.230.00:47:11.38#ibcon#*after write, iclass 40, count 2 2006.230.00:47:11.38#ibcon#*before return 0, iclass 40, count 2 2006.230.00:47:11.38#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:11.38#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:11.38#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.00:47:11.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:11.38#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:11.50#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:11.50#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:11.50#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:47:11.50#ibcon#first serial, iclass 40, count 0 2006.230.00:47:11.50#ibcon#enter sib2, iclass 40, count 0 2006.230.00:47:11.50#ibcon#flushed, iclass 40, count 0 2006.230.00:47:11.50#ibcon#about to write, iclass 40, count 0 2006.230.00:47:11.50#ibcon#wrote, iclass 40, count 0 2006.230.00:47:11.50#ibcon#about to read 3, iclass 40, count 0 2006.230.00:47:11.52#ibcon#read 3, iclass 40, count 0 2006.230.00:47:11.52#ibcon#about to read 4, iclass 40, count 0 2006.230.00:47:11.52#ibcon#read 4, iclass 40, count 0 2006.230.00:47:11.52#ibcon#about to read 5, iclass 40, count 0 2006.230.00:47:11.52#ibcon#read 5, iclass 40, count 0 2006.230.00:47:11.52#ibcon#about to read 6, iclass 40, count 0 2006.230.00:47:11.52#ibcon#read 6, iclass 40, count 0 2006.230.00:47:11.52#ibcon#end of sib2, iclass 40, count 0 2006.230.00:47:11.52#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:47:11.52#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:47:11.52#ibcon#[25=USB\r\n] 2006.230.00:47:11.52#ibcon#*before write, iclass 40, count 0 2006.230.00:47:11.52#ibcon#enter sib2, iclass 40, count 0 2006.230.00:47:11.52#ibcon#flushed, iclass 40, count 0 2006.230.00:47:11.52#ibcon#about to write, iclass 40, count 0 2006.230.00:47:11.52#ibcon#wrote, iclass 40, count 0 2006.230.00:47:11.52#ibcon#about to read 3, iclass 40, count 0 2006.230.00:47:11.55#ibcon#read 3, iclass 40, count 0 2006.230.00:47:11.55#ibcon#about to read 4, iclass 40, count 0 2006.230.00:47:11.55#ibcon#read 4, iclass 40, count 0 2006.230.00:47:11.55#ibcon#about to read 5, iclass 40, count 0 2006.230.00:47:11.55#ibcon#read 5, iclass 40, count 0 2006.230.00:47:11.55#ibcon#about to read 6, iclass 40, count 0 2006.230.00:47:11.55#ibcon#read 6, iclass 40, count 0 2006.230.00:47:11.55#ibcon#end of sib2, iclass 40, count 0 2006.230.00:47:11.55#ibcon#*after write, iclass 40, count 0 2006.230.00:47:11.55#ibcon#*before return 0, iclass 40, count 0 2006.230.00:47:11.55#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:11.55#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:11.55#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:47:11.55#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:47:11.55$vck44/valo=5,734.99 2006.230.00:47:11.55#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.00:47:11.55#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.00:47:11.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:11.55#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:11.55#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:11.55#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:11.55#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:47:11.55#ibcon#first serial, iclass 4, count 0 2006.230.00:47:11.55#ibcon#enter sib2, iclass 4, count 0 2006.230.00:47:11.55#ibcon#flushed, iclass 4, count 0 2006.230.00:47:11.55#ibcon#about to write, iclass 4, count 0 2006.230.00:47:11.55#ibcon#wrote, iclass 4, count 0 2006.230.00:47:11.55#ibcon#about to read 3, iclass 4, count 0 2006.230.00:47:11.57#ibcon#read 3, iclass 4, count 0 2006.230.00:47:11.57#ibcon#about to read 4, iclass 4, count 0 2006.230.00:47:11.57#ibcon#read 4, iclass 4, count 0 2006.230.00:47:11.57#ibcon#about to read 5, iclass 4, count 0 2006.230.00:47:11.57#ibcon#read 5, iclass 4, count 0 2006.230.00:47:11.57#ibcon#about to read 6, iclass 4, count 0 2006.230.00:47:11.57#ibcon#read 6, iclass 4, count 0 2006.230.00:47:11.57#ibcon#end of sib2, iclass 4, count 0 2006.230.00:47:11.57#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:47:11.57#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:47:11.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:47:11.57#ibcon#*before write, iclass 4, count 0 2006.230.00:47:11.57#ibcon#enter sib2, iclass 4, count 0 2006.230.00:47:11.57#ibcon#flushed, iclass 4, count 0 2006.230.00:47:11.57#ibcon#about to write, iclass 4, count 0 2006.230.00:47:11.57#ibcon#wrote, iclass 4, count 0 2006.230.00:47:11.57#ibcon#about to read 3, iclass 4, count 0 2006.230.00:47:11.61#ibcon#read 3, iclass 4, count 0 2006.230.00:47:11.61#ibcon#about to read 4, iclass 4, count 0 2006.230.00:47:11.61#ibcon#read 4, iclass 4, count 0 2006.230.00:47:11.61#ibcon#about to read 5, iclass 4, count 0 2006.230.00:47:11.61#ibcon#read 5, iclass 4, count 0 2006.230.00:47:11.61#ibcon#about to read 6, iclass 4, count 0 2006.230.00:47:11.61#ibcon#read 6, iclass 4, count 0 2006.230.00:47:11.61#ibcon#end of sib2, iclass 4, count 0 2006.230.00:47:11.61#ibcon#*after write, iclass 4, count 0 2006.230.00:47:11.61#ibcon#*before return 0, iclass 4, count 0 2006.230.00:47:11.61#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:11.61#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:11.61#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:47:11.61#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:47:11.61$vck44/va=5,4 2006.230.00:47:11.61#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.00:47:11.61#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.00:47:11.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:11.61#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:11.67#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:11.67#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:11.67#ibcon#enter wrdev, iclass 6, count 2 2006.230.00:47:11.67#ibcon#first serial, iclass 6, count 2 2006.230.00:47:11.67#ibcon#enter sib2, iclass 6, count 2 2006.230.00:47:11.67#ibcon#flushed, iclass 6, count 2 2006.230.00:47:11.67#ibcon#about to write, iclass 6, count 2 2006.230.00:47:11.67#ibcon#wrote, iclass 6, count 2 2006.230.00:47:11.67#ibcon#about to read 3, iclass 6, count 2 2006.230.00:47:11.69#ibcon#read 3, iclass 6, count 2 2006.230.00:47:11.69#ibcon#about to read 4, iclass 6, count 2 2006.230.00:47:11.69#ibcon#read 4, iclass 6, count 2 2006.230.00:47:11.69#ibcon#about to read 5, iclass 6, count 2 2006.230.00:47:11.69#ibcon#read 5, iclass 6, count 2 2006.230.00:47:11.69#ibcon#about to read 6, iclass 6, count 2 2006.230.00:47:11.69#ibcon#read 6, iclass 6, count 2 2006.230.00:47:11.69#ibcon#end of sib2, iclass 6, count 2 2006.230.00:47:11.69#ibcon#*mode == 0, iclass 6, count 2 2006.230.00:47:11.69#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.00:47:11.69#ibcon#[25=AT05-04\r\n] 2006.230.00:47:11.69#ibcon#*before write, iclass 6, count 2 2006.230.00:47:11.69#ibcon#enter sib2, iclass 6, count 2 2006.230.00:47:11.69#ibcon#flushed, iclass 6, count 2 2006.230.00:47:11.69#ibcon#about to write, iclass 6, count 2 2006.230.00:47:11.69#ibcon#wrote, iclass 6, count 2 2006.230.00:47:11.69#ibcon#about to read 3, iclass 6, count 2 2006.230.00:47:11.72#ibcon#read 3, iclass 6, count 2 2006.230.00:47:11.72#ibcon#about to read 4, iclass 6, count 2 2006.230.00:47:11.72#ibcon#read 4, iclass 6, count 2 2006.230.00:47:11.72#ibcon#about to read 5, iclass 6, count 2 2006.230.00:47:11.72#ibcon#read 5, iclass 6, count 2 2006.230.00:47:11.72#ibcon#about to read 6, iclass 6, count 2 2006.230.00:47:11.72#ibcon#read 6, iclass 6, count 2 2006.230.00:47:11.72#ibcon#end of sib2, iclass 6, count 2 2006.230.00:47:11.72#ibcon#*after write, iclass 6, count 2 2006.230.00:47:11.72#ibcon#*before return 0, iclass 6, count 2 2006.230.00:47:11.72#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:11.72#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:11.72#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.00:47:11.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:11.72#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:11.84#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:11.84#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:11.84#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:47:11.84#ibcon#first serial, iclass 6, count 0 2006.230.00:47:11.84#ibcon#enter sib2, iclass 6, count 0 2006.230.00:47:11.84#ibcon#flushed, iclass 6, count 0 2006.230.00:47:11.84#ibcon#about to write, iclass 6, count 0 2006.230.00:47:11.84#ibcon#wrote, iclass 6, count 0 2006.230.00:47:11.84#ibcon#about to read 3, iclass 6, count 0 2006.230.00:47:11.86#ibcon#read 3, iclass 6, count 0 2006.230.00:47:11.86#ibcon#about to read 4, iclass 6, count 0 2006.230.00:47:11.86#ibcon#read 4, iclass 6, count 0 2006.230.00:47:11.86#ibcon#about to read 5, iclass 6, count 0 2006.230.00:47:11.86#ibcon#read 5, iclass 6, count 0 2006.230.00:47:11.86#ibcon#about to read 6, iclass 6, count 0 2006.230.00:47:11.86#ibcon#read 6, iclass 6, count 0 2006.230.00:47:11.86#ibcon#end of sib2, iclass 6, count 0 2006.230.00:47:11.86#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:47:11.86#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:47:11.86#ibcon#[25=USB\r\n] 2006.230.00:47:11.86#ibcon#*before write, iclass 6, count 0 2006.230.00:47:11.86#ibcon#enter sib2, iclass 6, count 0 2006.230.00:47:11.86#ibcon#flushed, iclass 6, count 0 2006.230.00:47:11.86#ibcon#about to write, iclass 6, count 0 2006.230.00:47:11.86#ibcon#wrote, iclass 6, count 0 2006.230.00:47:11.86#ibcon#about to read 3, iclass 6, count 0 2006.230.00:47:11.89#ibcon#read 3, iclass 6, count 0 2006.230.00:47:11.89#ibcon#about to read 4, iclass 6, count 0 2006.230.00:47:11.89#ibcon#read 4, iclass 6, count 0 2006.230.00:47:11.89#ibcon#about to read 5, iclass 6, count 0 2006.230.00:47:11.89#ibcon#read 5, iclass 6, count 0 2006.230.00:47:11.89#ibcon#about to read 6, iclass 6, count 0 2006.230.00:47:11.89#ibcon#read 6, iclass 6, count 0 2006.230.00:47:11.89#ibcon#end of sib2, iclass 6, count 0 2006.230.00:47:11.89#ibcon#*after write, iclass 6, count 0 2006.230.00:47:11.89#ibcon#*before return 0, iclass 6, count 0 2006.230.00:47:11.89#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:11.89#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:11.89#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:47:11.89#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:47:11.89$vck44/valo=6,814.99 2006.230.00:47:11.89#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.00:47:11.89#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.00:47:11.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:11.89#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:11.89#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:11.89#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:11.89#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:47:11.89#ibcon#first serial, iclass 10, count 0 2006.230.00:47:11.89#ibcon#enter sib2, iclass 10, count 0 2006.230.00:47:11.89#ibcon#flushed, iclass 10, count 0 2006.230.00:47:11.89#ibcon#about to write, iclass 10, count 0 2006.230.00:47:11.89#ibcon#wrote, iclass 10, count 0 2006.230.00:47:11.89#ibcon#about to read 3, iclass 10, count 0 2006.230.00:47:11.91#ibcon#read 3, iclass 10, count 0 2006.230.00:47:11.91#ibcon#about to read 4, iclass 10, count 0 2006.230.00:47:11.91#ibcon#read 4, iclass 10, count 0 2006.230.00:47:11.91#ibcon#about to read 5, iclass 10, count 0 2006.230.00:47:11.91#ibcon#read 5, iclass 10, count 0 2006.230.00:47:11.91#ibcon#about to read 6, iclass 10, count 0 2006.230.00:47:11.91#ibcon#read 6, iclass 10, count 0 2006.230.00:47:11.91#ibcon#end of sib2, iclass 10, count 0 2006.230.00:47:11.91#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:47:11.91#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:47:11.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:47:11.91#ibcon#*before write, iclass 10, count 0 2006.230.00:47:11.91#ibcon#enter sib2, iclass 10, count 0 2006.230.00:47:11.91#ibcon#flushed, iclass 10, count 0 2006.230.00:47:11.91#ibcon#about to write, iclass 10, count 0 2006.230.00:47:11.91#ibcon#wrote, iclass 10, count 0 2006.230.00:47:11.91#ibcon#about to read 3, iclass 10, count 0 2006.230.00:47:11.95#ibcon#read 3, iclass 10, count 0 2006.230.00:47:11.95#ibcon#about to read 4, iclass 10, count 0 2006.230.00:47:11.95#ibcon#read 4, iclass 10, count 0 2006.230.00:47:11.95#ibcon#about to read 5, iclass 10, count 0 2006.230.00:47:11.95#ibcon#read 5, iclass 10, count 0 2006.230.00:47:11.95#ibcon#about to read 6, iclass 10, count 0 2006.230.00:47:11.95#ibcon#read 6, iclass 10, count 0 2006.230.00:47:11.95#ibcon#end of sib2, iclass 10, count 0 2006.230.00:47:11.95#ibcon#*after write, iclass 10, count 0 2006.230.00:47:11.95#ibcon#*before return 0, iclass 10, count 0 2006.230.00:47:11.95#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:11.95#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:11.95#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:47:11.95#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:47:11.95$vck44/va=6,4 2006.230.00:47:11.95#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.00:47:11.95#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.00:47:11.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:11.95#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:12.01#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:12.01#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:12.01#ibcon#enter wrdev, iclass 12, count 2 2006.230.00:47:12.01#ibcon#first serial, iclass 12, count 2 2006.230.00:47:12.01#ibcon#enter sib2, iclass 12, count 2 2006.230.00:47:12.01#ibcon#flushed, iclass 12, count 2 2006.230.00:47:12.01#ibcon#about to write, iclass 12, count 2 2006.230.00:47:12.01#ibcon#wrote, iclass 12, count 2 2006.230.00:47:12.01#ibcon#about to read 3, iclass 12, count 2 2006.230.00:47:12.03#ibcon#read 3, iclass 12, count 2 2006.230.00:47:12.03#ibcon#about to read 4, iclass 12, count 2 2006.230.00:47:12.03#ibcon#read 4, iclass 12, count 2 2006.230.00:47:12.03#ibcon#about to read 5, iclass 12, count 2 2006.230.00:47:12.03#ibcon#read 5, iclass 12, count 2 2006.230.00:47:12.03#ibcon#about to read 6, iclass 12, count 2 2006.230.00:47:12.03#ibcon#read 6, iclass 12, count 2 2006.230.00:47:12.03#ibcon#end of sib2, iclass 12, count 2 2006.230.00:47:12.03#ibcon#*mode == 0, iclass 12, count 2 2006.230.00:47:12.03#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.00:47:12.03#ibcon#[25=AT06-04\r\n] 2006.230.00:47:12.03#ibcon#*before write, iclass 12, count 2 2006.230.00:47:12.03#ibcon#enter sib2, iclass 12, count 2 2006.230.00:47:12.03#ibcon#flushed, iclass 12, count 2 2006.230.00:47:12.03#ibcon#about to write, iclass 12, count 2 2006.230.00:47:12.03#ibcon#wrote, iclass 12, count 2 2006.230.00:47:12.03#ibcon#about to read 3, iclass 12, count 2 2006.230.00:47:12.06#ibcon#read 3, iclass 12, count 2 2006.230.00:47:12.06#ibcon#about to read 4, iclass 12, count 2 2006.230.00:47:12.06#ibcon#read 4, iclass 12, count 2 2006.230.00:47:12.06#ibcon#about to read 5, iclass 12, count 2 2006.230.00:47:12.06#ibcon#read 5, iclass 12, count 2 2006.230.00:47:12.06#ibcon#about to read 6, iclass 12, count 2 2006.230.00:47:12.06#ibcon#read 6, iclass 12, count 2 2006.230.00:47:12.06#ibcon#end of sib2, iclass 12, count 2 2006.230.00:47:12.06#ibcon#*after write, iclass 12, count 2 2006.230.00:47:12.06#ibcon#*before return 0, iclass 12, count 2 2006.230.00:47:12.06#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:12.06#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:12.06#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.00:47:12.06#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:12.06#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:12.18#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:12.18#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:12.18#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:47:12.18#ibcon#first serial, iclass 12, count 0 2006.230.00:47:12.18#ibcon#enter sib2, iclass 12, count 0 2006.230.00:47:12.18#ibcon#flushed, iclass 12, count 0 2006.230.00:47:12.18#ibcon#about to write, iclass 12, count 0 2006.230.00:47:12.18#ibcon#wrote, iclass 12, count 0 2006.230.00:47:12.18#ibcon#about to read 3, iclass 12, count 0 2006.230.00:47:12.20#ibcon#read 3, iclass 12, count 0 2006.230.00:47:12.20#ibcon#about to read 4, iclass 12, count 0 2006.230.00:47:12.20#ibcon#read 4, iclass 12, count 0 2006.230.00:47:12.20#ibcon#about to read 5, iclass 12, count 0 2006.230.00:47:12.20#ibcon#read 5, iclass 12, count 0 2006.230.00:47:12.20#ibcon#about to read 6, iclass 12, count 0 2006.230.00:47:12.20#ibcon#read 6, iclass 12, count 0 2006.230.00:47:12.20#ibcon#end of sib2, iclass 12, count 0 2006.230.00:47:12.20#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:47:12.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:47:12.20#ibcon#[25=USB\r\n] 2006.230.00:47:12.20#ibcon#*before write, iclass 12, count 0 2006.230.00:47:12.20#ibcon#enter sib2, iclass 12, count 0 2006.230.00:47:12.20#ibcon#flushed, iclass 12, count 0 2006.230.00:47:12.20#ibcon#about to write, iclass 12, count 0 2006.230.00:47:12.20#ibcon#wrote, iclass 12, count 0 2006.230.00:47:12.20#ibcon#about to read 3, iclass 12, count 0 2006.230.00:47:12.23#ibcon#read 3, iclass 12, count 0 2006.230.00:47:12.23#ibcon#about to read 4, iclass 12, count 0 2006.230.00:47:12.23#ibcon#read 4, iclass 12, count 0 2006.230.00:47:12.23#ibcon#about to read 5, iclass 12, count 0 2006.230.00:47:12.23#ibcon#read 5, iclass 12, count 0 2006.230.00:47:12.23#ibcon#about to read 6, iclass 12, count 0 2006.230.00:47:12.23#ibcon#read 6, iclass 12, count 0 2006.230.00:47:12.23#ibcon#end of sib2, iclass 12, count 0 2006.230.00:47:12.23#ibcon#*after write, iclass 12, count 0 2006.230.00:47:12.23#ibcon#*before return 0, iclass 12, count 0 2006.230.00:47:12.23#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:12.23#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:12.23#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:47:12.23#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:47:12.23$vck44/valo=7,864.99 2006.230.00:47:12.23#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.00:47:12.23#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.00:47:12.23#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:12.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:12.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:12.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:12.23#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:47:12.23#ibcon#first serial, iclass 14, count 0 2006.230.00:47:12.23#ibcon#enter sib2, iclass 14, count 0 2006.230.00:47:12.23#ibcon#flushed, iclass 14, count 0 2006.230.00:47:12.23#ibcon#about to write, iclass 14, count 0 2006.230.00:47:12.23#ibcon#wrote, iclass 14, count 0 2006.230.00:47:12.23#ibcon#about to read 3, iclass 14, count 0 2006.230.00:47:12.25#ibcon#read 3, iclass 14, count 0 2006.230.00:47:12.25#ibcon#about to read 4, iclass 14, count 0 2006.230.00:47:12.25#ibcon#read 4, iclass 14, count 0 2006.230.00:47:12.25#ibcon#about to read 5, iclass 14, count 0 2006.230.00:47:12.25#ibcon#read 5, iclass 14, count 0 2006.230.00:47:12.25#ibcon#about to read 6, iclass 14, count 0 2006.230.00:47:12.25#ibcon#read 6, iclass 14, count 0 2006.230.00:47:12.25#ibcon#end of sib2, iclass 14, count 0 2006.230.00:47:12.25#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:47:12.25#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:47:12.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:47:12.25#ibcon#*before write, iclass 14, count 0 2006.230.00:47:12.25#ibcon#enter sib2, iclass 14, count 0 2006.230.00:47:12.25#ibcon#flushed, iclass 14, count 0 2006.230.00:47:12.25#ibcon#about to write, iclass 14, count 0 2006.230.00:47:12.25#ibcon#wrote, iclass 14, count 0 2006.230.00:47:12.25#ibcon#about to read 3, iclass 14, count 0 2006.230.00:47:12.29#ibcon#read 3, iclass 14, count 0 2006.230.00:47:12.29#ibcon#about to read 4, iclass 14, count 0 2006.230.00:47:12.29#ibcon#read 4, iclass 14, count 0 2006.230.00:47:12.29#ibcon#about to read 5, iclass 14, count 0 2006.230.00:47:12.29#ibcon#read 5, iclass 14, count 0 2006.230.00:47:12.29#ibcon#about to read 6, iclass 14, count 0 2006.230.00:47:12.29#ibcon#read 6, iclass 14, count 0 2006.230.00:47:12.29#ibcon#end of sib2, iclass 14, count 0 2006.230.00:47:12.29#ibcon#*after write, iclass 14, count 0 2006.230.00:47:12.29#ibcon#*before return 0, iclass 14, count 0 2006.230.00:47:12.29#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:12.29#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:12.29#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:47:12.29#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:47:12.29$vck44/va=7,5 2006.230.00:47:12.29#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.00:47:12.29#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.00:47:12.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:12.29#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:12.35#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:12.35#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:12.35#ibcon#enter wrdev, iclass 16, count 2 2006.230.00:47:12.35#ibcon#first serial, iclass 16, count 2 2006.230.00:47:12.35#ibcon#enter sib2, iclass 16, count 2 2006.230.00:47:12.35#ibcon#flushed, iclass 16, count 2 2006.230.00:47:12.35#ibcon#about to write, iclass 16, count 2 2006.230.00:47:12.35#ibcon#wrote, iclass 16, count 2 2006.230.00:47:12.35#ibcon#about to read 3, iclass 16, count 2 2006.230.00:47:12.37#ibcon#read 3, iclass 16, count 2 2006.230.00:47:12.37#ibcon#about to read 4, iclass 16, count 2 2006.230.00:47:12.37#ibcon#read 4, iclass 16, count 2 2006.230.00:47:12.37#ibcon#about to read 5, iclass 16, count 2 2006.230.00:47:12.37#ibcon#read 5, iclass 16, count 2 2006.230.00:47:12.37#ibcon#about to read 6, iclass 16, count 2 2006.230.00:47:12.37#ibcon#read 6, iclass 16, count 2 2006.230.00:47:12.37#ibcon#end of sib2, iclass 16, count 2 2006.230.00:47:12.37#ibcon#*mode == 0, iclass 16, count 2 2006.230.00:47:12.37#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.00:47:12.37#ibcon#[25=AT07-05\r\n] 2006.230.00:47:12.37#ibcon#*before write, iclass 16, count 2 2006.230.00:47:12.37#ibcon#enter sib2, iclass 16, count 2 2006.230.00:47:12.37#ibcon#flushed, iclass 16, count 2 2006.230.00:47:12.37#ibcon#about to write, iclass 16, count 2 2006.230.00:47:12.37#ibcon#wrote, iclass 16, count 2 2006.230.00:47:12.37#ibcon#about to read 3, iclass 16, count 2 2006.230.00:47:12.40#ibcon#read 3, iclass 16, count 2 2006.230.00:47:12.40#ibcon#about to read 4, iclass 16, count 2 2006.230.00:47:12.40#ibcon#read 4, iclass 16, count 2 2006.230.00:47:12.40#ibcon#about to read 5, iclass 16, count 2 2006.230.00:47:12.40#ibcon#read 5, iclass 16, count 2 2006.230.00:47:12.40#ibcon#about to read 6, iclass 16, count 2 2006.230.00:47:12.40#ibcon#read 6, iclass 16, count 2 2006.230.00:47:12.40#ibcon#end of sib2, iclass 16, count 2 2006.230.00:47:12.40#ibcon#*after write, iclass 16, count 2 2006.230.00:47:12.40#ibcon#*before return 0, iclass 16, count 2 2006.230.00:47:12.40#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:12.40#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:12.40#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.00:47:12.40#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:12.40#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:12.52#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:12.52#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:12.52#ibcon#enter wrdev, iclass 16, count 0 2006.230.00:47:12.52#ibcon#first serial, iclass 16, count 0 2006.230.00:47:12.52#ibcon#enter sib2, iclass 16, count 0 2006.230.00:47:12.52#ibcon#flushed, iclass 16, count 0 2006.230.00:47:12.52#ibcon#about to write, iclass 16, count 0 2006.230.00:47:12.52#ibcon#wrote, iclass 16, count 0 2006.230.00:47:12.52#ibcon#about to read 3, iclass 16, count 0 2006.230.00:47:12.54#ibcon#read 3, iclass 16, count 0 2006.230.00:47:12.54#ibcon#about to read 4, iclass 16, count 0 2006.230.00:47:12.54#ibcon#read 4, iclass 16, count 0 2006.230.00:47:12.54#ibcon#about to read 5, iclass 16, count 0 2006.230.00:47:12.54#ibcon#read 5, iclass 16, count 0 2006.230.00:47:12.54#ibcon#about to read 6, iclass 16, count 0 2006.230.00:47:12.54#ibcon#read 6, iclass 16, count 0 2006.230.00:47:12.54#ibcon#end of sib2, iclass 16, count 0 2006.230.00:47:12.54#ibcon#*mode == 0, iclass 16, count 0 2006.230.00:47:12.54#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.00:47:12.54#ibcon#[25=USB\r\n] 2006.230.00:47:12.54#ibcon#*before write, iclass 16, count 0 2006.230.00:47:12.54#ibcon#enter sib2, iclass 16, count 0 2006.230.00:47:12.54#ibcon#flushed, iclass 16, count 0 2006.230.00:47:12.54#ibcon#about to write, iclass 16, count 0 2006.230.00:47:12.54#ibcon#wrote, iclass 16, count 0 2006.230.00:47:12.54#ibcon#about to read 3, iclass 16, count 0 2006.230.00:47:12.57#ibcon#read 3, iclass 16, count 0 2006.230.00:47:12.57#ibcon#about to read 4, iclass 16, count 0 2006.230.00:47:12.57#ibcon#read 4, iclass 16, count 0 2006.230.00:47:12.57#ibcon#about to read 5, iclass 16, count 0 2006.230.00:47:12.57#ibcon#read 5, iclass 16, count 0 2006.230.00:47:12.57#ibcon#about to read 6, iclass 16, count 0 2006.230.00:47:12.57#ibcon#read 6, iclass 16, count 0 2006.230.00:47:12.57#ibcon#end of sib2, iclass 16, count 0 2006.230.00:47:12.57#ibcon#*after write, iclass 16, count 0 2006.230.00:47:12.57#ibcon#*before return 0, iclass 16, count 0 2006.230.00:47:12.57#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:12.57#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:12.57#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.00:47:12.57#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.00:47:12.57$vck44/valo=8,884.99 2006.230.00:47:12.57#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.00:47:12.57#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.00:47:12.57#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:12.57#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:12.57#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:12.57#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:12.57#ibcon#enter wrdev, iclass 18, count 0 2006.230.00:47:12.57#ibcon#first serial, iclass 18, count 0 2006.230.00:47:12.57#ibcon#enter sib2, iclass 18, count 0 2006.230.00:47:12.57#ibcon#flushed, iclass 18, count 0 2006.230.00:47:12.57#ibcon#about to write, iclass 18, count 0 2006.230.00:47:12.57#ibcon#wrote, iclass 18, count 0 2006.230.00:47:12.57#ibcon#about to read 3, iclass 18, count 0 2006.230.00:47:12.59#ibcon#read 3, iclass 18, count 0 2006.230.00:47:12.59#ibcon#about to read 4, iclass 18, count 0 2006.230.00:47:12.59#ibcon#read 4, iclass 18, count 0 2006.230.00:47:12.59#ibcon#about to read 5, iclass 18, count 0 2006.230.00:47:12.59#ibcon#read 5, iclass 18, count 0 2006.230.00:47:12.59#ibcon#about to read 6, iclass 18, count 0 2006.230.00:47:12.59#ibcon#read 6, iclass 18, count 0 2006.230.00:47:12.59#ibcon#end of sib2, iclass 18, count 0 2006.230.00:47:12.59#ibcon#*mode == 0, iclass 18, count 0 2006.230.00:47:12.59#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.00:47:12.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:47:12.59#ibcon#*before write, iclass 18, count 0 2006.230.00:47:12.59#ibcon#enter sib2, iclass 18, count 0 2006.230.00:47:12.59#ibcon#flushed, iclass 18, count 0 2006.230.00:47:12.59#ibcon#about to write, iclass 18, count 0 2006.230.00:47:12.59#ibcon#wrote, iclass 18, count 0 2006.230.00:47:12.59#ibcon#about to read 3, iclass 18, count 0 2006.230.00:47:12.63#ibcon#read 3, iclass 18, count 0 2006.230.00:47:12.63#ibcon#about to read 4, iclass 18, count 0 2006.230.00:47:12.63#ibcon#read 4, iclass 18, count 0 2006.230.00:47:12.63#ibcon#about to read 5, iclass 18, count 0 2006.230.00:47:12.63#ibcon#read 5, iclass 18, count 0 2006.230.00:47:12.63#ibcon#about to read 6, iclass 18, count 0 2006.230.00:47:12.63#ibcon#read 6, iclass 18, count 0 2006.230.00:47:12.63#ibcon#end of sib2, iclass 18, count 0 2006.230.00:47:12.63#ibcon#*after write, iclass 18, count 0 2006.230.00:47:12.63#ibcon#*before return 0, iclass 18, count 0 2006.230.00:47:12.63#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:12.63#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:12.63#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.00:47:12.63#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.00:47:12.63$vck44/va=8,6 2006.230.00:47:12.63#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.00:47:12.63#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.00:47:12.63#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:12.63#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:47:12.69#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:47:12.69#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:47:12.69#ibcon#enter wrdev, iclass 20, count 2 2006.230.00:47:12.69#ibcon#first serial, iclass 20, count 2 2006.230.00:47:12.69#ibcon#enter sib2, iclass 20, count 2 2006.230.00:47:12.69#ibcon#flushed, iclass 20, count 2 2006.230.00:47:12.69#ibcon#about to write, iclass 20, count 2 2006.230.00:47:12.69#ibcon#wrote, iclass 20, count 2 2006.230.00:47:12.69#ibcon#about to read 3, iclass 20, count 2 2006.230.00:47:12.71#ibcon#read 3, iclass 20, count 2 2006.230.00:47:12.71#ibcon#about to read 4, iclass 20, count 2 2006.230.00:47:12.71#ibcon#read 4, iclass 20, count 2 2006.230.00:47:12.71#ibcon#about to read 5, iclass 20, count 2 2006.230.00:47:12.71#ibcon#read 5, iclass 20, count 2 2006.230.00:47:12.71#ibcon#about to read 6, iclass 20, count 2 2006.230.00:47:12.71#ibcon#read 6, iclass 20, count 2 2006.230.00:47:12.71#ibcon#end of sib2, iclass 20, count 2 2006.230.00:47:12.71#ibcon#*mode == 0, iclass 20, count 2 2006.230.00:47:12.71#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.00:47:12.71#ibcon#[25=AT08-06\r\n] 2006.230.00:47:12.71#ibcon#*before write, iclass 20, count 2 2006.230.00:47:12.71#ibcon#enter sib2, iclass 20, count 2 2006.230.00:47:12.71#ibcon#flushed, iclass 20, count 2 2006.230.00:47:12.71#ibcon#about to write, iclass 20, count 2 2006.230.00:47:12.71#ibcon#wrote, iclass 20, count 2 2006.230.00:47:12.71#ibcon#about to read 3, iclass 20, count 2 2006.230.00:47:12.74#ibcon#read 3, iclass 20, count 2 2006.230.00:47:12.74#ibcon#about to read 4, iclass 20, count 2 2006.230.00:47:12.74#ibcon#read 4, iclass 20, count 2 2006.230.00:47:12.74#ibcon#about to read 5, iclass 20, count 2 2006.230.00:47:12.74#ibcon#read 5, iclass 20, count 2 2006.230.00:47:12.74#ibcon#about to read 6, iclass 20, count 2 2006.230.00:47:12.74#ibcon#read 6, iclass 20, count 2 2006.230.00:47:12.74#ibcon#end of sib2, iclass 20, count 2 2006.230.00:47:12.74#ibcon#*after write, iclass 20, count 2 2006.230.00:47:12.74#ibcon#*before return 0, iclass 20, count 2 2006.230.00:47:12.74#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:47:12.74#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.00:47:12.74#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.00:47:12.74#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:12.74#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:47:12.86#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:47:12.86#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:47:12.86#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:47:12.86#ibcon#first serial, iclass 20, count 0 2006.230.00:47:12.86#ibcon#enter sib2, iclass 20, count 0 2006.230.00:47:12.86#ibcon#flushed, iclass 20, count 0 2006.230.00:47:12.86#ibcon#about to write, iclass 20, count 0 2006.230.00:47:12.86#ibcon#wrote, iclass 20, count 0 2006.230.00:47:12.86#ibcon#about to read 3, iclass 20, count 0 2006.230.00:47:12.88#ibcon#read 3, iclass 20, count 0 2006.230.00:47:12.88#ibcon#about to read 4, iclass 20, count 0 2006.230.00:47:12.88#ibcon#read 4, iclass 20, count 0 2006.230.00:47:12.88#ibcon#about to read 5, iclass 20, count 0 2006.230.00:47:12.88#ibcon#read 5, iclass 20, count 0 2006.230.00:47:12.88#ibcon#about to read 6, iclass 20, count 0 2006.230.00:47:12.88#ibcon#read 6, iclass 20, count 0 2006.230.00:47:12.88#ibcon#end of sib2, iclass 20, count 0 2006.230.00:47:12.88#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:47:12.88#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:47:12.88#ibcon#[25=USB\r\n] 2006.230.00:47:12.88#ibcon#*before write, iclass 20, count 0 2006.230.00:47:12.88#ibcon#enter sib2, iclass 20, count 0 2006.230.00:47:12.88#ibcon#flushed, iclass 20, count 0 2006.230.00:47:12.88#ibcon#about to write, iclass 20, count 0 2006.230.00:47:12.88#ibcon#wrote, iclass 20, count 0 2006.230.00:47:12.88#ibcon#about to read 3, iclass 20, count 0 2006.230.00:47:12.91#ibcon#read 3, iclass 20, count 0 2006.230.00:47:12.91#ibcon#about to read 4, iclass 20, count 0 2006.230.00:47:12.91#ibcon#read 4, iclass 20, count 0 2006.230.00:47:12.91#ibcon#about to read 5, iclass 20, count 0 2006.230.00:47:12.91#ibcon#read 5, iclass 20, count 0 2006.230.00:47:12.91#ibcon#about to read 6, iclass 20, count 0 2006.230.00:47:12.91#ibcon#read 6, iclass 20, count 0 2006.230.00:47:12.91#ibcon#end of sib2, iclass 20, count 0 2006.230.00:47:12.91#ibcon#*after write, iclass 20, count 0 2006.230.00:47:12.91#ibcon#*before return 0, iclass 20, count 0 2006.230.00:47:12.91#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:47:12.91#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.00:47:12.91#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:47:12.91#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:47:12.91$vck44/vblo=1,629.99 2006.230.00:47:12.91#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.00:47:12.91#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.00:47:12.91#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:12.91#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:47:12.91#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:47:12.91#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:47:12.91#ibcon#enter wrdev, iclass 22, count 0 2006.230.00:47:12.91#ibcon#first serial, iclass 22, count 0 2006.230.00:47:12.91#ibcon#enter sib2, iclass 22, count 0 2006.230.00:47:12.91#ibcon#flushed, iclass 22, count 0 2006.230.00:47:12.91#ibcon#about to write, iclass 22, count 0 2006.230.00:47:12.91#ibcon#wrote, iclass 22, count 0 2006.230.00:47:12.91#ibcon#about to read 3, iclass 22, count 0 2006.230.00:47:12.93#ibcon#read 3, iclass 22, count 0 2006.230.00:47:12.93#ibcon#about to read 4, iclass 22, count 0 2006.230.00:47:12.93#ibcon#read 4, iclass 22, count 0 2006.230.00:47:12.93#ibcon#about to read 5, iclass 22, count 0 2006.230.00:47:12.93#ibcon#read 5, iclass 22, count 0 2006.230.00:47:12.93#ibcon#about to read 6, iclass 22, count 0 2006.230.00:47:12.93#ibcon#read 6, iclass 22, count 0 2006.230.00:47:12.93#ibcon#end of sib2, iclass 22, count 0 2006.230.00:47:12.93#ibcon#*mode == 0, iclass 22, count 0 2006.230.00:47:12.93#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.00:47:12.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:47:12.93#ibcon#*before write, iclass 22, count 0 2006.230.00:47:12.93#ibcon#enter sib2, iclass 22, count 0 2006.230.00:47:12.93#ibcon#flushed, iclass 22, count 0 2006.230.00:47:12.93#ibcon#about to write, iclass 22, count 0 2006.230.00:47:12.93#ibcon#wrote, iclass 22, count 0 2006.230.00:47:12.93#ibcon#about to read 3, iclass 22, count 0 2006.230.00:47:12.97#ibcon#read 3, iclass 22, count 0 2006.230.00:47:12.97#ibcon#about to read 4, iclass 22, count 0 2006.230.00:47:12.97#ibcon#read 4, iclass 22, count 0 2006.230.00:47:12.97#ibcon#about to read 5, iclass 22, count 0 2006.230.00:47:12.97#ibcon#read 5, iclass 22, count 0 2006.230.00:47:12.97#ibcon#about to read 6, iclass 22, count 0 2006.230.00:47:12.97#ibcon#read 6, iclass 22, count 0 2006.230.00:47:12.97#ibcon#end of sib2, iclass 22, count 0 2006.230.00:47:12.97#ibcon#*after write, iclass 22, count 0 2006.230.00:47:12.97#ibcon#*before return 0, iclass 22, count 0 2006.230.00:47:12.97#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:47:12.97#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.00:47:12.97#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.00:47:12.97#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.00:47:12.97$vck44/vb=1,4 2006.230.00:47:12.97#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.00:47:12.97#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.00:47:12.97#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:12.97#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:47:12.97#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:47:12.97#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:47:12.97#ibcon#enter wrdev, iclass 24, count 2 2006.230.00:47:12.97#ibcon#first serial, iclass 24, count 2 2006.230.00:47:12.97#ibcon#enter sib2, iclass 24, count 2 2006.230.00:47:12.97#ibcon#flushed, iclass 24, count 2 2006.230.00:47:12.97#ibcon#about to write, iclass 24, count 2 2006.230.00:47:12.97#ibcon#wrote, iclass 24, count 2 2006.230.00:47:12.97#ibcon#about to read 3, iclass 24, count 2 2006.230.00:47:12.99#ibcon#read 3, iclass 24, count 2 2006.230.00:47:12.99#ibcon#about to read 4, iclass 24, count 2 2006.230.00:47:12.99#ibcon#read 4, iclass 24, count 2 2006.230.00:47:12.99#ibcon#about to read 5, iclass 24, count 2 2006.230.00:47:12.99#ibcon#read 5, iclass 24, count 2 2006.230.00:47:12.99#ibcon#about to read 6, iclass 24, count 2 2006.230.00:47:12.99#ibcon#read 6, iclass 24, count 2 2006.230.00:47:12.99#ibcon#end of sib2, iclass 24, count 2 2006.230.00:47:12.99#ibcon#*mode == 0, iclass 24, count 2 2006.230.00:47:12.99#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.00:47:12.99#ibcon#[27=AT01-04\r\n] 2006.230.00:47:12.99#ibcon#*before write, iclass 24, count 2 2006.230.00:47:12.99#ibcon#enter sib2, iclass 24, count 2 2006.230.00:47:12.99#ibcon#flushed, iclass 24, count 2 2006.230.00:47:12.99#ibcon#about to write, iclass 24, count 2 2006.230.00:47:12.99#ibcon#wrote, iclass 24, count 2 2006.230.00:47:12.99#ibcon#about to read 3, iclass 24, count 2 2006.230.00:47:13.02#ibcon#read 3, iclass 24, count 2 2006.230.00:47:13.02#ibcon#about to read 4, iclass 24, count 2 2006.230.00:47:13.02#ibcon#read 4, iclass 24, count 2 2006.230.00:47:13.02#ibcon#about to read 5, iclass 24, count 2 2006.230.00:47:13.02#ibcon#read 5, iclass 24, count 2 2006.230.00:47:13.02#ibcon#about to read 6, iclass 24, count 2 2006.230.00:47:13.02#ibcon#read 6, iclass 24, count 2 2006.230.00:47:13.02#ibcon#end of sib2, iclass 24, count 2 2006.230.00:47:13.02#ibcon#*after write, iclass 24, count 2 2006.230.00:47:13.02#ibcon#*before return 0, iclass 24, count 2 2006.230.00:47:13.02#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:47:13.02#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.00:47:13.02#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.00:47:13.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:13.02#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:47:13.14#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:47:13.14#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:47:13.14#ibcon#enter wrdev, iclass 24, count 0 2006.230.00:47:13.14#ibcon#first serial, iclass 24, count 0 2006.230.00:47:13.14#ibcon#enter sib2, iclass 24, count 0 2006.230.00:47:13.14#ibcon#flushed, iclass 24, count 0 2006.230.00:47:13.14#ibcon#about to write, iclass 24, count 0 2006.230.00:47:13.14#ibcon#wrote, iclass 24, count 0 2006.230.00:47:13.14#ibcon#about to read 3, iclass 24, count 0 2006.230.00:47:13.16#ibcon#read 3, iclass 24, count 0 2006.230.00:47:13.16#ibcon#about to read 4, iclass 24, count 0 2006.230.00:47:13.16#ibcon#read 4, iclass 24, count 0 2006.230.00:47:13.16#ibcon#about to read 5, iclass 24, count 0 2006.230.00:47:13.16#ibcon#read 5, iclass 24, count 0 2006.230.00:47:13.16#ibcon#about to read 6, iclass 24, count 0 2006.230.00:47:13.16#ibcon#read 6, iclass 24, count 0 2006.230.00:47:13.16#ibcon#end of sib2, iclass 24, count 0 2006.230.00:47:13.16#ibcon#*mode == 0, iclass 24, count 0 2006.230.00:47:13.16#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.00:47:13.16#ibcon#[27=USB\r\n] 2006.230.00:47:13.16#ibcon#*before write, iclass 24, count 0 2006.230.00:47:13.16#ibcon#enter sib2, iclass 24, count 0 2006.230.00:47:13.16#ibcon#flushed, iclass 24, count 0 2006.230.00:47:13.16#ibcon#about to write, iclass 24, count 0 2006.230.00:47:13.16#ibcon#wrote, iclass 24, count 0 2006.230.00:47:13.16#ibcon#about to read 3, iclass 24, count 0 2006.230.00:47:13.19#ibcon#read 3, iclass 24, count 0 2006.230.00:47:13.19#ibcon#about to read 4, iclass 24, count 0 2006.230.00:47:13.19#ibcon#read 4, iclass 24, count 0 2006.230.00:47:13.19#ibcon#about to read 5, iclass 24, count 0 2006.230.00:47:13.19#ibcon#read 5, iclass 24, count 0 2006.230.00:47:13.19#ibcon#about to read 6, iclass 24, count 0 2006.230.00:47:13.19#ibcon#read 6, iclass 24, count 0 2006.230.00:47:13.19#ibcon#end of sib2, iclass 24, count 0 2006.230.00:47:13.19#ibcon#*after write, iclass 24, count 0 2006.230.00:47:13.19#ibcon#*before return 0, iclass 24, count 0 2006.230.00:47:13.19#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:47:13.19#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.00:47:13.19#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.00:47:13.19#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.00:47:13.19$vck44/vblo=2,634.99 2006.230.00:47:13.19#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.00:47:13.19#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.00:47:13.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:13.19#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:13.19#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:13.19#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:13.19#ibcon#enter wrdev, iclass 26, count 0 2006.230.00:47:13.19#ibcon#first serial, iclass 26, count 0 2006.230.00:47:13.19#ibcon#enter sib2, iclass 26, count 0 2006.230.00:47:13.19#ibcon#flushed, iclass 26, count 0 2006.230.00:47:13.19#ibcon#about to write, iclass 26, count 0 2006.230.00:47:13.19#ibcon#wrote, iclass 26, count 0 2006.230.00:47:13.19#ibcon#about to read 3, iclass 26, count 0 2006.230.00:47:13.21#ibcon#read 3, iclass 26, count 0 2006.230.00:47:13.21#ibcon#about to read 4, iclass 26, count 0 2006.230.00:47:13.21#ibcon#read 4, iclass 26, count 0 2006.230.00:47:13.21#ibcon#about to read 5, iclass 26, count 0 2006.230.00:47:13.21#ibcon#read 5, iclass 26, count 0 2006.230.00:47:13.21#ibcon#about to read 6, iclass 26, count 0 2006.230.00:47:13.21#ibcon#read 6, iclass 26, count 0 2006.230.00:47:13.21#ibcon#end of sib2, iclass 26, count 0 2006.230.00:47:13.21#ibcon#*mode == 0, iclass 26, count 0 2006.230.00:47:13.21#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.00:47:13.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:47:13.21#ibcon#*before write, iclass 26, count 0 2006.230.00:47:13.21#ibcon#enter sib2, iclass 26, count 0 2006.230.00:47:13.21#ibcon#flushed, iclass 26, count 0 2006.230.00:47:13.21#ibcon#about to write, iclass 26, count 0 2006.230.00:47:13.21#ibcon#wrote, iclass 26, count 0 2006.230.00:47:13.21#ibcon#about to read 3, iclass 26, count 0 2006.230.00:47:13.25#ibcon#read 3, iclass 26, count 0 2006.230.00:47:13.25#ibcon#about to read 4, iclass 26, count 0 2006.230.00:47:13.25#ibcon#read 4, iclass 26, count 0 2006.230.00:47:13.25#ibcon#about to read 5, iclass 26, count 0 2006.230.00:47:13.25#ibcon#read 5, iclass 26, count 0 2006.230.00:47:13.25#ibcon#about to read 6, iclass 26, count 0 2006.230.00:47:13.25#ibcon#read 6, iclass 26, count 0 2006.230.00:47:13.25#ibcon#end of sib2, iclass 26, count 0 2006.230.00:47:13.25#ibcon#*after write, iclass 26, count 0 2006.230.00:47:13.25#ibcon#*before return 0, iclass 26, count 0 2006.230.00:47:13.25#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:13.25#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.00:47:13.25#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.00:47:13.25#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.00:47:13.25$vck44/vb=2,4 2006.230.00:47:13.25#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.00:47:13.25#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.00:47:13.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:13.25#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:13.31#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:13.31#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:13.31#ibcon#enter wrdev, iclass 28, count 2 2006.230.00:47:13.31#ibcon#first serial, iclass 28, count 2 2006.230.00:47:13.31#ibcon#enter sib2, iclass 28, count 2 2006.230.00:47:13.31#ibcon#flushed, iclass 28, count 2 2006.230.00:47:13.31#ibcon#about to write, iclass 28, count 2 2006.230.00:47:13.31#ibcon#wrote, iclass 28, count 2 2006.230.00:47:13.31#ibcon#about to read 3, iclass 28, count 2 2006.230.00:47:13.33#ibcon#read 3, iclass 28, count 2 2006.230.00:47:13.33#ibcon#about to read 4, iclass 28, count 2 2006.230.00:47:13.33#ibcon#read 4, iclass 28, count 2 2006.230.00:47:13.33#ibcon#about to read 5, iclass 28, count 2 2006.230.00:47:13.33#ibcon#read 5, iclass 28, count 2 2006.230.00:47:13.33#ibcon#about to read 6, iclass 28, count 2 2006.230.00:47:13.33#ibcon#read 6, iclass 28, count 2 2006.230.00:47:13.33#ibcon#end of sib2, iclass 28, count 2 2006.230.00:47:13.33#ibcon#*mode == 0, iclass 28, count 2 2006.230.00:47:13.33#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.00:47:13.33#ibcon#[27=AT02-04\r\n] 2006.230.00:47:13.33#ibcon#*before write, iclass 28, count 2 2006.230.00:47:13.33#ibcon#enter sib2, iclass 28, count 2 2006.230.00:47:13.33#ibcon#flushed, iclass 28, count 2 2006.230.00:47:13.33#ibcon#about to write, iclass 28, count 2 2006.230.00:47:13.33#ibcon#wrote, iclass 28, count 2 2006.230.00:47:13.33#ibcon#about to read 3, iclass 28, count 2 2006.230.00:47:13.36#ibcon#read 3, iclass 28, count 2 2006.230.00:47:13.36#ibcon#about to read 4, iclass 28, count 2 2006.230.00:47:13.36#ibcon#read 4, iclass 28, count 2 2006.230.00:47:13.36#ibcon#about to read 5, iclass 28, count 2 2006.230.00:47:13.36#ibcon#read 5, iclass 28, count 2 2006.230.00:47:13.36#ibcon#about to read 6, iclass 28, count 2 2006.230.00:47:13.36#ibcon#read 6, iclass 28, count 2 2006.230.00:47:13.36#ibcon#end of sib2, iclass 28, count 2 2006.230.00:47:13.36#ibcon#*after write, iclass 28, count 2 2006.230.00:47:13.36#ibcon#*before return 0, iclass 28, count 2 2006.230.00:47:13.36#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:13.36#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.00:47:13.36#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.00:47:13.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:13.36#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:13.48#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:13.48#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:13.48#ibcon#enter wrdev, iclass 28, count 0 2006.230.00:47:13.48#ibcon#first serial, iclass 28, count 0 2006.230.00:47:13.48#ibcon#enter sib2, iclass 28, count 0 2006.230.00:47:13.48#ibcon#flushed, iclass 28, count 0 2006.230.00:47:13.48#ibcon#about to write, iclass 28, count 0 2006.230.00:47:13.48#ibcon#wrote, iclass 28, count 0 2006.230.00:47:13.48#ibcon#about to read 3, iclass 28, count 0 2006.230.00:47:13.50#ibcon#read 3, iclass 28, count 0 2006.230.00:47:13.50#ibcon#about to read 4, iclass 28, count 0 2006.230.00:47:13.50#ibcon#read 4, iclass 28, count 0 2006.230.00:47:13.50#ibcon#about to read 5, iclass 28, count 0 2006.230.00:47:13.50#ibcon#read 5, iclass 28, count 0 2006.230.00:47:13.50#ibcon#about to read 6, iclass 28, count 0 2006.230.00:47:13.50#ibcon#read 6, iclass 28, count 0 2006.230.00:47:13.50#ibcon#end of sib2, iclass 28, count 0 2006.230.00:47:13.50#ibcon#*mode == 0, iclass 28, count 0 2006.230.00:47:13.50#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.00:47:13.50#ibcon#[27=USB\r\n] 2006.230.00:47:13.50#ibcon#*before write, iclass 28, count 0 2006.230.00:47:13.50#ibcon#enter sib2, iclass 28, count 0 2006.230.00:47:13.50#ibcon#flushed, iclass 28, count 0 2006.230.00:47:13.50#ibcon#about to write, iclass 28, count 0 2006.230.00:47:13.50#ibcon#wrote, iclass 28, count 0 2006.230.00:47:13.50#ibcon#about to read 3, iclass 28, count 0 2006.230.00:47:13.53#ibcon#read 3, iclass 28, count 0 2006.230.00:47:13.53#ibcon#about to read 4, iclass 28, count 0 2006.230.00:47:13.53#ibcon#read 4, iclass 28, count 0 2006.230.00:47:13.53#ibcon#about to read 5, iclass 28, count 0 2006.230.00:47:13.53#ibcon#read 5, iclass 28, count 0 2006.230.00:47:13.53#ibcon#about to read 6, iclass 28, count 0 2006.230.00:47:13.53#ibcon#read 6, iclass 28, count 0 2006.230.00:47:13.53#ibcon#end of sib2, iclass 28, count 0 2006.230.00:47:13.53#ibcon#*after write, iclass 28, count 0 2006.230.00:47:13.53#ibcon#*before return 0, iclass 28, count 0 2006.230.00:47:13.53#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:13.53#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.00:47:13.53#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.00:47:13.53#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.00:47:13.53$vck44/vblo=3,649.99 2006.230.00:47:13.53#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.00:47:13.53#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.00:47:13.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:13.53#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:13.53#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:13.53#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:13.53#ibcon#enter wrdev, iclass 30, count 0 2006.230.00:47:13.53#ibcon#first serial, iclass 30, count 0 2006.230.00:47:13.53#ibcon#enter sib2, iclass 30, count 0 2006.230.00:47:13.53#ibcon#flushed, iclass 30, count 0 2006.230.00:47:13.53#ibcon#about to write, iclass 30, count 0 2006.230.00:47:13.53#ibcon#wrote, iclass 30, count 0 2006.230.00:47:13.53#ibcon#about to read 3, iclass 30, count 0 2006.230.00:47:13.55#ibcon#read 3, iclass 30, count 0 2006.230.00:47:13.55#ibcon#about to read 4, iclass 30, count 0 2006.230.00:47:13.55#ibcon#read 4, iclass 30, count 0 2006.230.00:47:13.55#ibcon#about to read 5, iclass 30, count 0 2006.230.00:47:13.55#ibcon#read 5, iclass 30, count 0 2006.230.00:47:13.55#ibcon#about to read 6, iclass 30, count 0 2006.230.00:47:13.55#ibcon#read 6, iclass 30, count 0 2006.230.00:47:13.55#ibcon#end of sib2, iclass 30, count 0 2006.230.00:47:13.55#ibcon#*mode == 0, iclass 30, count 0 2006.230.00:47:13.55#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.00:47:13.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:47:13.55#ibcon#*before write, iclass 30, count 0 2006.230.00:47:13.55#ibcon#enter sib2, iclass 30, count 0 2006.230.00:47:13.55#ibcon#flushed, iclass 30, count 0 2006.230.00:47:13.55#ibcon#about to write, iclass 30, count 0 2006.230.00:47:13.55#ibcon#wrote, iclass 30, count 0 2006.230.00:47:13.55#ibcon#about to read 3, iclass 30, count 0 2006.230.00:47:13.59#ibcon#read 3, iclass 30, count 0 2006.230.00:47:13.59#ibcon#about to read 4, iclass 30, count 0 2006.230.00:47:13.59#ibcon#read 4, iclass 30, count 0 2006.230.00:47:13.59#ibcon#about to read 5, iclass 30, count 0 2006.230.00:47:13.59#ibcon#read 5, iclass 30, count 0 2006.230.00:47:13.59#ibcon#about to read 6, iclass 30, count 0 2006.230.00:47:13.59#ibcon#read 6, iclass 30, count 0 2006.230.00:47:13.59#ibcon#end of sib2, iclass 30, count 0 2006.230.00:47:13.59#ibcon#*after write, iclass 30, count 0 2006.230.00:47:13.59#ibcon#*before return 0, iclass 30, count 0 2006.230.00:47:13.59#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:13.59#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.00:47:13.59#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.00:47:13.59#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.00:47:13.59$vck44/vb=3,4 2006.230.00:47:13.59#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.00:47:13.59#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.00:47:13.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:13.59#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:13.65#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:13.65#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:13.65#ibcon#enter wrdev, iclass 32, count 2 2006.230.00:47:13.65#ibcon#first serial, iclass 32, count 2 2006.230.00:47:13.65#ibcon#enter sib2, iclass 32, count 2 2006.230.00:47:13.65#ibcon#flushed, iclass 32, count 2 2006.230.00:47:13.65#ibcon#about to write, iclass 32, count 2 2006.230.00:47:13.65#ibcon#wrote, iclass 32, count 2 2006.230.00:47:13.65#ibcon#about to read 3, iclass 32, count 2 2006.230.00:47:13.67#ibcon#read 3, iclass 32, count 2 2006.230.00:47:13.67#ibcon#about to read 4, iclass 32, count 2 2006.230.00:47:13.67#ibcon#read 4, iclass 32, count 2 2006.230.00:47:13.67#ibcon#about to read 5, iclass 32, count 2 2006.230.00:47:13.67#ibcon#read 5, iclass 32, count 2 2006.230.00:47:13.67#ibcon#about to read 6, iclass 32, count 2 2006.230.00:47:13.67#ibcon#read 6, iclass 32, count 2 2006.230.00:47:13.67#ibcon#end of sib2, iclass 32, count 2 2006.230.00:47:13.67#ibcon#*mode == 0, iclass 32, count 2 2006.230.00:47:13.67#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.00:47:13.67#ibcon#[27=AT03-04\r\n] 2006.230.00:47:13.67#ibcon#*before write, iclass 32, count 2 2006.230.00:47:13.67#ibcon#enter sib2, iclass 32, count 2 2006.230.00:47:13.67#ibcon#flushed, iclass 32, count 2 2006.230.00:47:13.67#ibcon#about to write, iclass 32, count 2 2006.230.00:47:13.67#ibcon#wrote, iclass 32, count 2 2006.230.00:47:13.67#ibcon#about to read 3, iclass 32, count 2 2006.230.00:47:13.70#ibcon#read 3, iclass 32, count 2 2006.230.00:47:13.70#ibcon#about to read 4, iclass 32, count 2 2006.230.00:47:13.70#ibcon#read 4, iclass 32, count 2 2006.230.00:47:13.70#ibcon#about to read 5, iclass 32, count 2 2006.230.00:47:13.70#ibcon#read 5, iclass 32, count 2 2006.230.00:47:13.70#ibcon#about to read 6, iclass 32, count 2 2006.230.00:47:13.70#ibcon#read 6, iclass 32, count 2 2006.230.00:47:13.70#ibcon#end of sib2, iclass 32, count 2 2006.230.00:47:13.70#ibcon#*after write, iclass 32, count 2 2006.230.00:47:13.70#ibcon#*before return 0, iclass 32, count 2 2006.230.00:47:13.70#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:13.70#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.00:47:13.70#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.00:47:13.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:13.70#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:13.82#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:13.82#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:13.82#ibcon#enter wrdev, iclass 32, count 0 2006.230.00:47:13.82#ibcon#first serial, iclass 32, count 0 2006.230.00:47:13.82#ibcon#enter sib2, iclass 32, count 0 2006.230.00:47:13.82#ibcon#flushed, iclass 32, count 0 2006.230.00:47:13.82#ibcon#about to write, iclass 32, count 0 2006.230.00:47:13.82#ibcon#wrote, iclass 32, count 0 2006.230.00:47:13.82#ibcon#about to read 3, iclass 32, count 0 2006.230.00:47:13.84#ibcon#read 3, iclass 32, count 0 2006.230.00:47:13.84#ibcon#about to read 4, iclass 32, count 0 2006.230.00:47:13.84#ibcon#read 4, iclass 32, count 0 2006.230.00:47:13.84#ibcon#about to read 5, iclass 32, count 0 2006.230.00:47:13.84#ibcon#read 5, iclass 32, count 0 2006.230.00:47:13.84#ibcon#about to read 6, iclass 32, count 0 2006.230.00:47:13.84#ibcon#read 6, iclass 32, count 0 2006.230.00:47:13.84#ibcon#end of sib2, iclass 32, count 0 2006.230.00:47:13.84#ibcon#*mode == 0, iclass 32, count 0 2006.230.00:47:13.84#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.00:47:13.84#ibcon#[27=USB\r\n] 2006.230.00:47:13.84#ibcon#*before write, iclass 32, count 0 2006.230.00:47:13.84#ibcon#enter sib2, iclass 32, count 0 2006.230.00:47:13.84#ibcon#flushed, iclass 32, count 0 2006.230.00:47:13.84#ibcon#about to write, iclass 32, count 0 2006.230.00:47:13.84#ibcon#wrote, iclass 32, count 0 2006.230.00:47:13.84#ibcon#about to read 3, iclass 32, count 0 2006.230.00:47:13.87#ibcon#read 3, iclass 32, count 0 2006.230.00:47:13.87#ibcon#about to read 4, iclass 32, count 0 2006.230.00:47:13.87#ibcon#read 4, iclass 32, count 0 2006.230.00:47:13.87#ibcon#about to read 5, iclass 32, count 0 2006.230.00:47:13.87#ibcon#read 5, iclass 32, count 0 2006.230.00:47:13.87#ibcon#about to read 6, iclass 32, count 0 2006.230.00:47:13.87#ibcon#read 6, iclass 32, count 0 2006.230.00:47:13.87#ibcon#end of sib2, iclass 32, count 0 2006.230.00:47:13.87#ibcon#*after write, iclass 32, count 0 2006.230.00:47:13.87#ibcon#*before return 0, iclass 32, count 0 2006.230.00:47:13.87#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:13.87#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.00:47:13.87#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.00:47:13.87#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.00:47:13.87$vck44/vblo=4,679.99 2006.230.00:47:13.87#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.00:47:13.87#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.00:47:13.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:13.87#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:13.87#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:13.87#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:13.87#ibcon#enter wrdev, iclass 34, count 0 2006.230.00:47:13.87#ibcon#first serial, iclass 34, count 0 2006.230.00:47:13.87#ibcon#enter sib2, iclass 34, count 0 2006.230.00:47:13.87#ibcon#flushed, iclass 34, count 0 2006.230.00:47:13.87#ibcon#about to write, iclass 34, count 0 2006.230.00:47:13.87#ibcon#wrote, iclass 34, count 0 2006.230.00:47:13.87#ibcon#about to read 3, iclass 34, count 0 2006.230.00:47:13.89#ibcon#read 3, iclass 34, count 0 2006.230.00:47:13.89#ibcon#about to read 4, iclass 34, count 0 2006.230.00:47:13.89#ibcon#read 4, iclass 34, count 0 2006.230.00:47:13.89#ibcon#about to read 5, iclass 34, count 0 2006.230.00:47:13.89#ibcon#read 5, iclass 34, count 0 2006.230.00:47:13.89#ibcon#about to read 6, iclass 34, count 0 2006.230.00:47:13.89#ibcon#read 6, iclass 34, count 0 2006.230.00:47:13.89#ibcon#end of sib2, iclass 34, count 0 2006.230.00:47:13.89#ibcon#*mode == 0, iclass 34, count 0 2006.230.00:47:13.89#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.00:47:13.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:47:13.89#ibcon#*before write, iclass 34, count 0 2006.230.00:47:13.89#ibcon#enter sib2, iclass 34, count 0 2006.230.00:47:13.89#ibcon#flushed, iclass 34, count 0 2006.230.00:47:13.89#ibcon#about to write, iclass 34, count 0 2006.230.00:47:13.89#ibcon#wrote, iclass 34, count 0 2006.230.00:47:13.89#ibcon#about to read 3, iclass 34, count 0 2006.230.00:47:13.93#ibcon#read 3, iclass 34, count 0 2006.230.00:47:13.93#ibcon#about to read 4, iclass 34, count 0 2006.230.00:47:13.93#ibcon#read 4, iclass 34, count 0 2006.230.00:47:13.93#ibcon#about to read 5, iclass 34, count 0 2006.230.00:47:13.93#ibcon#read 5, iclass 34, count 0 2006.230.00:47:13.93#ibcon#about to read 6, iclass 34, count 0 2006.230.00:47:13.93#ibcon#read 6, iclass 34, count 0 2006.230.00:47:13.93#ibcon#end of sib2, iclass 34, count 0 2006.230.00:47:13.93#ibcon#*after write, iclass 34, count 0 2006.230.00:47:13.93#ibcon#*before return 0, iclass 34, count 0 2006.230.00:47:13.93#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:13.93#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.00:47:13.93#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.00:47:13.93#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.00:47:13.93$vck44/vb=4,4 2006.230.00:47:13.93#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.00:47:13.93#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.00:47:13.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:13.93#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:13.99#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:13.99#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:13.99#ibcon#enter wrdev, iclass 36, count 2 2006.230.00:47:13.99#ibcon#first serial, iclass 36, count 2 2006.230.00:47:13.99#ibcon#enter sib2, iclass 36, count 2 2006.230.00:47:13.99#ibcon#flushed, iclass 36, count 2 2006.230.00:47:13.99#ibcon#about to write, iclass 36, count 2 2006.230.00:47:13.99#ibcon#wrote, iclass 36, count 2 2006.230.00:47:13.99#ibcon#about to read 3, iclass 36, count 2 2006.230.00:47:14.01#ibcon#read 3, iclass 36, count 2 2006.230.00:47:14.01#ibcon#about to read 4, iclass 36, count 2 2006.230.00:47:14.01#ibcon#read 4, iclass 36, count 2 2006.230.00:47:14.01#ibcon#about to read 5, iclass 36, count 2 2006.230.00:47:14.01#ibcon#read 5, iclass 36, count 2 2006.230.00:47:14.01#ibcon#about to read 6, iclass 36, count 2 2006.230.00:47:14.01#ibcon#read 6, iclass 36, count 2 2006.230.00:47:14.01#ibcon#end of sib2, iclass 36, count 2 2006.230.00:47:14.01#ibcon#*mode == 0, iclass 36, count 2 2006.230.00:47:14.01#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.00:47:14.01#ibcon#[27=AT04-04\r\n] 2006.230.00:47:14.01#ibcon#*before write, iclass 36, count 2 2006.230.00:47:14.01#ibcon#enter sib2, iclass 36, count 2 2006.230.00:47:14.01#ibcon#flushed, iclass 36, count 2 2006.230.00:47:14.01#ibcon#about to write, iclass 36, count 2 2006.230.00:47:14.01#ibcon#wrote, iclass 36, count 2 2006.230.00:47:14.01#ibcon#about to read 3, iclass 36, count 2 2006.230.00:47:14.04#ibcon#read 3, iclass 36, count 2 2006.230.00:47:14.04#ibcon#about to read 4, iclass 36, count 2 2006.230.00:47:14.04#ibcon#read 4, iclass 36, count 2 2006.230.00:47:14.04#ibcon#about to read 5, iclass 36, count 2 2006.230.00:47:14.04#ibcon#read 5, iclass 36, count 2 2006.230.00:47:14.04#ibcon#about to read 6, iclass 36, count 2 2006.230.00:47:14.04#ibcon#read 6, iclass 36, count 2 2006.230.00:47:14.04#ibcon#end of sib2, iclass 36, count 2 2006.230.00:47:14.04#ibcon#*after write, iclass 36, count 2 2006.230.00:47:14.04#ibcon#*before return 0, iclass 36, count 2 2006.230.00:47:14.04#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:14.04#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.00:47:14.04#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.00:47:14.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:14.04#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:14.16#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:14.16#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:14.16#ibcon#enter wrdev, iclass 36, count 0 2006.230.00:47:14.16#ibcon#first serial, iclass 36, count 0 2006.230.00:47:14.16#ibcon#enter sib2, iclass 36, count 0 2006.230.00:47:14.16#ibcon#flushed, iclass 36, count 0 2006.230.00:47:14.16#ibcon#about to write, iclass 36, count 0 2006.230.00:47:14.16#ibcon#wrote, iclass 36, count 0 2006.230.00:47:14.16#ibcon#about to read 3, iclass 36, count 0 2006.230.00:47:14.18#ibcon#read 3, iclass 36, count 0 2006.230.00:47:14.18#ibcon#about to read 4, iclass 36, count 0 2006.230.00:47:14.18#ibcon#read 4, iclass 36, count 0 2006.230.00:47:14.18#ibcon#about to read 5, iclass 36, count 0 2006.230.00:47:14.18#ibcon#read 5, iclass 36, count 0 2006.230.00:47:14.18#ibcon#about to read 6, iclass 36, count 0 2006.230.00:47:14.18#ibcon#read 6, iclass 36, count 0 2006.230.00:47:14.18#ibcon#end of sib2, iclass 36, count 0 2006.230.00:47:14.18#ibcon#*mode == 0, iclass 36, count 0 2006.230.00:47:14.18#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.00:47:14.18#ibcon#[27=USB\r\n] 2006.230.00:47:14.18#ibcon#*before write, iclass 36, count 0 2006.230.00:47:14.18#ibcon#enter sib2, iclass 36, count 0 2006.230.00:47:14.18#ibcon#flushed, iclass 36, count 0 2006.230.00:47:14.18#ibcon#about to write, iclass 36, count 0 2006.230.00:47:14.18#ibcon#wrote, iclass 36, count 0 2006.230.00:47:14.18#ibcon#about to read 3, iclass 36, count 0 2006.230.00:47:14.21#ibcon#read 3, iclass 36, count 0 2006.230.00:47:14.21#ibcon#about to read 4, iclass 36, count 0 2006.230.00:47:14.21#ibcon#read 4, iclass 36, count 0 2006.230.00:47:14.21#ibcon#about to read 5, iclass 36, count 0 2006.230.00:47:14.21#ibcon#read 5, iclass 36, count 0 2006.230.00:47:14.21#ibcon#about to read 6, iclass 36, count 0 2006.230.00:47:14.21#ibcon#read 6, iclass 36, count 0 2006.230.00:47:14.21#ibcon#end of sib2, iclass 36, count 0 2006.230.00:47:14.21#ibcon#*after write, iclass 36, count 0 2006.230.00:47:14.21#ibcon#*before return 0, iclass 36, count 0 2006.230.00:47:14.21#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:14.21#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.00:47:14.21#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.00:47:14.21#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.00:47:14.21$vck44/vblo=5,709.99 2006.230.00:47:14.21#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.00:47:14.21#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.00:47:14.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:14.21#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:14.21#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:14.21#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:14.21#ibcon#enter wrdev, iclass 38, count 0 2006.230.00:47:14.21#ibcon#first serial, iclass 38, count 0 2006.230.00:47:14.21#ibcon#enter sib2, iclass 38, count 0 2006.230.00:47:14.21#ibcon#flushed, iclass 38, count 0 2006.230.00:47:14.21#ibcon#about to write, iclass 38, count 0 2006.230.00:47:14.21#ibcon#wrote, iclass 38, count 0 2006.230.00:47:14.21#ibcon#about to read 3, iclass 38, count 0 2006.230.00:47:14.23#ibcon#read 3, iclass 38, count 0 2006.230.00:47:14.23#ibcon#about to read 4, iclass 38, count 0 2006.230.00:47:14.23#ibcon#read 4, iclass 38, count 0 2006.230.00:47:14.23#ibcon#about to read 5, iclass 38, count 0 2006.230.00:47:14.23#ibcon#read 5, iclass 38, count 0 2006.230.00:47:14.23#ibcon#about to read 6, iclass 38, count 0 2006.230.00:47:14.23#ibcon#read 6, iclass 38, count 0 2006.230.00:47:14.23#ibcon#end of sib2, iclass 38, count 0 2006.230.00:47:14.23#ibcon#*mode == 0, iclass 38, count 0 2006.230.00:47:14.23#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.00:47:14.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:47:14.23#ibcon#*before write, iclass 38, count 0 2006.230.00:47:14.23#ibcon#enter sib2, iclass 38, count 0 2006.230.00:47:14.23#ibcon#flushed, iclass 38, count 0 2006.230.00:47:14.23#ibcon#about to write, iclass 38, count 0 2006.230.00:47:14.23#ibcon#wrote, iclass 38, count 0 2006.230.00:47:14.23#ibcon#about to read 3, iclass 38, count 0 2006.230.00:47:14.27#ibcon#read 3, iclass 38, count 0 2006.230.00:47:14.27#ibcon#about to read 4, iclass 38, count 0 2006.230.00:47:14.27#ibcon#read 4, iclass 38, count 0 2006.230.00:47:14.27#ibcon#about to read 5, iclass 38, count 0 2006.230.00:47:14.27#ibcon#read 5, iclass 38, count 0 2006.230.00:47:14.27#ibcon#about to read 6, iclass 38, count 0 2006.230.00:47:14.27#ibcon#read 6, iclass 38, count 0 2006.230.00:47:14.27#ibcon#end of sib2, iclass 38, count 0 2006.230.00:47:14.27#ibcon#*after write, iclass 38, count 0 2006.230.00:47:14.27#ibcon#*before return 0, iclass 38, count 0 2006.230.00:47:14.27#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:14.27#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.00:47:14.27#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.00:47:14.27#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.00:47:14.27$vck44/vb=5,4 2006.230.00:47:14.27#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.00:47:14.27#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.00:47:14.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:14.27#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:14.33#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:14.33#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:14.33#ibcon#enter wrdev, iclass 40, count 2 2006.230.00:47:14.33#ibcon#first serial, iclass 40, count 2 2006.230.00:47:14.33#ibcon#enter sib2, iclass 40, count 2 2006.230.00:47:14.33#ibcon#flushed, iclass 40, count 2 2006.230.00:47:14.33#ibcon#about to write, iclass 40, count 2 2006.230.00:47:14.33#ibcon#wrote, iclass 40, count 2 2006.230.00:47:14.33#ibcon#about to read 3, iclass 40, count 2 2006.230.00:47:14.35#ibcon#read 3, iclass 40, count 2 2006.230.00:47:14.35#ibcon#about to read 4, iclass 40, count 2 2006.230.00:47:14.35#ibcon#read 4, iclass 40, count 2 2006.230.00:47:14.35#ibcon#about to read 5, iclass 40, count 2 2006.230.00:47:14.35#ibcon#read 5, iclass 40, count 2 2006.230.00:47:14.35#ibcon#about to read 6, iclass 40, count 2 2006.230.00:47:14.35#ibcon#read 6, iclass 40, count 2 2006.230.00:47:14.35#ibcon#end of sib2, iclass 40, count 2 2006.230.00:47:14.35#ibcon#*mode == 0, iclass 40, count 2 2006.230.00:47:14.35#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.00:47:14.35#ibcon#[27=AT05-04\r\n] 2006.230.00:47:14.35#ibcon#*before write, iclass 40, count 2 2006.230.00:47:14.35#ibcon#enter sib2, iclass 40, count 2 2006.230.00:47:14.35#ibcon#flushed, iclass 40, count 2 2006.230.00:47:14.35#ibcon#about to write, iclass 40, count 2 2006.230.00:47:14.35#ibcon#wrote, iclass 40, count 2 2006.230.00:47:14.35#ibcon#about to read 3, iclass 40, count 2 2006.230.00:47:14.38#ibcon#read 3, iclass 40, count 2 2006.230.00:47:14.38#ibcon#about to read 4, iclass 40, count 2 2006.230.00:47:14.38#ibcon#read 4, iclass 40, count 2 2006.230.00:47:14.38#ibcon#about to read 5, iclass 40, count 2 2006.230.00:47:14.38#ibcon#read 5, iclass 40, count 2 2006.230.00:47:14.38#ibcon#about to read 6, iclass 40, count 2 2006.230.00:47:14.38#ibcon#read 6, iclass 40, count 2 2006.230.00:47:14.38#ibcon#end of sib2, iclass 40, count 2 2006.230.00:47:14.38#ibcon#*after write, iclass 40, count 2 2006.230.00:47:14.38#ibcon#*before return 0, iclass 40, count 2 2006.230.00:47:14.38#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:14.38#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.00:47:14.38#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.00:47:14.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:14.38#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:14.50#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:14.50#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:14.50#ibcon#enter wrdev, iclass 40, count 0 2006.230.00:47:14.50#ibcon#first serial, iclass 40, count 0 2006.230.00:47:14.50#ibcon#enter sib2, iclass 40, count 0 2006.230.00:47:14.50#ibcon#flushed, iclass 40, count 0 2006.230.00:47:14.50#ibcon#about to write, iclass 40, count 0 2006.230.00:47:14.50#ibcon#wrote, iclass 40, count 0 2006.230.00:47:14.50#ibcon#about to read 3, iclass 40, count 0 2006.230.00:47:14.52#ibcon#read 3, iclass 40, count 0 2006.230.00:47:14.52#ibcon#about to read 4, iclass 40, count 0 2006.230.00:47:14.52#ibcon#read 4, iclass 40, count 0 2006.230.00:47:14.52#ibcon#about to read 5, iclass 40, count 0 2006.230.00:47:14.52#ibcon#read 5, iclass 40, count 0 2006.230.00:47:14.52#ibcon#about to read 6, iclass 40, count 0 2006.230.00:47:14.52#ibcon#read 6, iclass 40, count 0 2006.230.00:47:14.52#ibcon#end of sib2, iclass 40, count 0 2006.230.00:47:14.52#ibcon#*mode == 0, iclass 40, count 0 2006.230.00:47:14.52#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.00:47:14.52#ibcon#[27=USB\r\n] 2006.230.00:47:14.52#ibcon#*before write, iclass 40, count 0 2006.230.00:47:14.52#ibcon#enter sib2, iclass 40, count 0 2006.230.00:47:14.52#ibcon#flushed, iclass 40, count 0 2006.230.00:47:14.52#ibcon#about to write, iclass 40, count 0 2006.230.00:47:14.52#ibcon#wrote, iclass 40, count 0 2006.230.00:47:14.52#ibcon#about to read 3, iclass 40, count 0 2006.230.00:47:14.55#ibcon#read 3, iclass 40, count 0 2006.230.00:47:14.55#ibcon#about to read 4, iclass 40, count 0 2006.230.00:47:14.55#ibcon#read 4, iclass 40, count 0 2006.230.00:47:14.55#ibcon#about to read 5, iclass 40, count 0 2006.230.00:47:14.55#ibcon#read 5, iclass 40, count 0 2006.230.00:47:14.55#ibcon#about to read 6, iclass 40, count 0 2006.230.00:47:14.55#ibcon#read 6, iclass 40, count 0 2006.230.00:47:14.55#ibcon#end of sib2, iclass 40, count 0 2006.230.00:47:14.55#ibcon#*after write, iclass 40, count 0 2006.230.00:47:14.55#ibcon#*before return 0, iclass 40, count 0 2006.230.00:47:14.55#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:14.55#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.00:47:14.55#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.00:47:14.55#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.00:47:14.55$vck44/vblo=6,719.99 2006.230.00:47:14.55#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.00:47:14.55#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.00:47:14.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:14.55#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:14.55#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:14.55#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:14.55#ibcon#enter wrdev, iclass 4, count 0 2006.230.00:47:14.55#ibcon#first serial, iclass 4, count 0 2006.230.00:47:14.55#ibcon#enter sib2, iclass 4, count 0 2006.230.00:47:14.55#ibcon#flushed, iclass 4, count 0 2006.230.00:47:14.55#ibcon#about to write, iclass 4, count 0 2006.230.00:47:14.55#ibcon#wrote, iclass 4, count 0 2006.230.00:47:14.55#ibcon#about to read 3, iclass 4, count 0 2006.230.00:47:14.57#ibcon#read 3, iclass 4, count 0 2006.230.00:47:14.57#ibcon#about to read 4, iclass 4, count 0 2006.230.00:47:14.57#ibcon#read 4, iclass 4, count 0 2006.230.00:47:14.57#ibcon#about to read 5, iclass 4, count 0 2006.230.00:47:14.57#ibcon#read 5, iclass 4, count 0 2006.230.00:47:14.57#ibcon#about to read 6, iclass 4, count 0 2006.230.00:47:14.57#ibcon#read 6, iclass 4, count 0 2006.230.00:47:14.57#ibcon#end of sib2, iclass 4, count 0 2006.230.00:47:14.57#ibcon#*mode == 0, iclass 4, count 0 2006.230.00:47:14.57#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.00:47:14.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:47:14.57#ibcon#*before write, iclass 4, count 0 2006.230.00:47:14.57#ibcon#enter sib2, iclass 4, count 0 2006.230.00:47:14.57#ibcon#flushed, iclass 4, count 0 2006.230.00:47:14.57#ibcon#about to write, iclass 4, count 0 2006.230.00:47:14.57#ibcon#wrote, iclass 4, count 0 2006.230.00:47:14.57#ibcon#about to read 3, iclass 4, count 0 2006.230.00:47:14.61#ibcon#read 3, iclass 4, count 0 2006.230.00:47:14.61#ibcon#about to read 4, iclass 4, count 0 2006.230.00:47:14.61#ibcon#read 4, iclass 4, count 0 2006.230.00:47:14.61#ibcon#about to read 5, iclass 4, count 0 2006.230.00:47:14.61#ibcon#read 5, iclass 4, count 0 2006.230.00:47:14.61#ibcon#about to read 6, iclass 4, count 0 2006.230.00:47:14.61#ibcon#read 6, iclass 4, count 0 2006.230.00:47:14.61#ibcon#end of sib2, iclass 4, count 0 2006.230.00:47:14.61#ibcon#*after write, iclass 4, count 0 2006.230.00:47:14.61#ibcon#*before return 0, iclass 4, count 0 2006.230.00:47:14.61#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:14.61#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.00:47:14.61#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.00:47:14.61#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.00:47:14.61$vck44/vb=6,4 2006.230.00:47:14.61#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.00:47:14.61#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.00:47:14.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:14.61#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:14.67#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:14.67#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:14.67#ibcon#enter wrdev, iclass 6, count 2 2006.230.00:47:14.67#ibcon#first serial, iclass 6, count 2 2006.230.00:47:14.67#ibcon#enter sib2, iclass 6, count 2 2006.230.00:47:14.67#ibcon#flushed, iclass 6, count 2 2006.230.00:47:14.67#ibcon#about to write, iclass 6, count 2 2006.230.00:47:14.67#ibcon#wrote, iclass 6, count 2 2006.230.00:47:14.67#ibcon#about to read 3, iclass 6, count 2 2006.230.00:47:14.69#ibcon#read 3, iclass 6, count 2 2006.230.00:47:14.69#ibcon#about to read 4, iclass 6, count 2 2006.230.00:47:14.69#ibcon#read 4, iclass 6, count 2 2006.230.00:47:14.69#ibcon#about to read 5, iclass 6, count 2 2006.230.00:47:14.69#ibcon#read 5, iclass 6, count 2 2006.230.00:47:14.69#ibcon#about to read 6, iclass 6, count 2 2006.230.00:47:14.69#ibcon#read 6, iclass 6, count 2 2006.230.00:47:14.69#ibcon#end of sib2, iclass 6, count 2 2006.230.00:47:14.69#ibcon#*mode == 0, iclass 6, count 2 2006.230.00:47:14.69#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.00:47:14.69#ibcon#[27=AT06-04\r\n] 2006.230.00:47:14.69#ibcon#*before write, iclass 6, count 2 2006.230.00:47:14.69#ibcon#enter sib2, iclass 6, count 2 2006.230.00:47:14.69#ibcon#flushed, iclass 6, count 2 2006.230.00:47:14.69#ibcon#about to write, iclass 6, count 2 2006.230.00:47:14.69#ibcon#wrote, iclass 6, count 2 2006.230.00:47:14.69#ibcon#about to read 3, iclass 6, count 2 2006.230.00:47:14.72#ibcon#read 3, iclass 6, count 2 2006.230.00:47:14.72#ibcon#about to read 4, iclass 6, count 2 2006.230.00:47:14.72#ibcon#read 4, iclass 6, count 2 2006.230.00:47:14.72#ibcon#about to read 5, iclass 6, count 2 2006.230.00:47:14.72#ibcon#read 5, iclass 6, count 2 2006.230.00:47:14.72#ibcon#about to read 6, iclass 6, count 2 2006.230.00:47:14.72#ibcon#read 6, iclass 6, count 2 2006.230.00:47:14.72#ibcon#end of sib2, iclass 6, count 2 2006.230.00:47:14.72#ibcon#*after write, iclass 6, count 2 2006.230.00:47:14.72#ibcon#*before return 0, iclass 6, count 2 2006.230.00:47:14.72#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:14.72#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.00:47:14.72#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.00:47:14.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:14.72#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:14.84#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:14.84#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:14.84#ibcon#enter wrdev, iclass 6, count 0 2006.230.00:47:14.84#ibcon#first serial, iclass 6, count 0 2006.230.00:47:14.84#ibcon#enter sib2, iclass 6, count 0 2006.230.00:47:14.84#ibcon#flushed, iclass 6, count 0 2006.230.00:47:14.84#ibcon#about to write, iclass 6, count 0 2006.230.00:47:14.84#ibcon#wrote, iclass 6, count 0 2006.230.00:47:14.84#ibcon#about to read 3, iclass 6, count 0 2006.230.00:47:14.86#ibcon#read 3, iclass 6, count 0 2006.230.00:47:14.86#ibcon#about to read 4, iclass 6, count 0 2006.230.00:47:14.86#ibcon#read 4, iclass 6, count 0 2006.230.00:47:14.86#ibcon#about to read 5, iclass 6, count 0 2006.230.00:47:14.86#ibcon#read 5, iclass 6, count 0 2006.230.00:47:14.86#ibcon#about to read 6, iclass 6, count 0 2006.230.00:47:14.86#ibcon#read 6, iclass 6, count 0 2006.230.00:47:14.86#ibcon#end of sib2, iclass 6, count 0 2006.230.00:47:14.86#ibcon#*mode == 0, iclass 6, count 0 2006.230.00:47:14.86#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.00:47:14.86#ibcon#[27=USB\r\n] 2006.230.00:47:14.86#ibcon#*before write, iclass 6, count 0 2006.230.00:47:14.86#ibcon#enter sib2, iclass 6, count 0 2006.230.00:47:14.86#ibcon#flushed, iclass 6, count 0 2006.230.00:47:14.86#ibcon#about to write, iclass 6, count 0 2006.230.00:47:14.86#ibcon#wrote, iclass 6, count 0 2006.230.00:47:14.86#ibcon#about to read 3, iclass 6, count 0 2006.230.00:47:14.89#ibcon#read 3, iclass 6, count 0 2006.230.00:47:14.89#ibcon#about to read 4, iclass 6, count 0 2006.230.00:47:14.89#ibcon#read 4, iclass 6, count 0 2006.230.00:47:14.89#ibcon#about to read 5, iclass 6, count 0 2006.230.00:47:14.89#ibcon#read 5, iclass 6, count 0 2006.230.00:47:14.89#ibcon#about to read 6, iclass 6, count 0 2006.230.00:47:14.89#ibcon#read 6, iclass 6, count 0 2006.230.00:47:14.89#ibcon#end of sib2, iclass 6, count 0 2006.230.00:47:14.89#ibcon#*after write, iclass 6, count 0 2006.230.00:47:14.89#ibcon#*before return 0, iclass 6, count 0 2006.230.00:47:14.89#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:14.89#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.00:47:14.89#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.00:47:14.89#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.00:47:14.89$vck44/vblo=7,734.99 2006.230.00:47:14.89#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.00:47:14.89#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.00:47:14.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:14.89#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:14.89#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:14.89#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:14.89#ibcon#enter wrdev, iclass 10, count 0 2006.230.00:47:14.89#ibcon#first serial, iclass 10, count 0 2006.230.00:47:14.89#ibcon#enter sib2, iclass 10, count 0 2006.230.00:47:14.89#ibcon#flushed, iclass 10, count 0 2006.230.00:47:14.89#ibcon#about to write, iclass 10, count 0 2006.230.00:47:14.89#ibcon#wrote, iclass 10, count 0 2006.230.00:47:14.89#ibcon#about to read 3, iclass 10, count 0 2006.230.00:47:14.91#ibcon#read 3, iclass 10, count 0 2006.230.00:47:14.91#ibcon#about to read 4, iclass 10, count 0 2006.230.00:47:14.91#ibcon#read 4, iclass 10, count 0 2006.230.00:47:14.91#ibcon#about to read 5, iclass 10, count 0 2006.230.00:47:14.91#ibcon#read 5, iclass 10, count 0 2006.230.00:47:14.91#ibcon#about to read 6, iclass 10, count 0 2006.230.00:47:14.91#ibcon#read 6, iclass 10, count 0 2006.230.00:47:14.91#ibcon#end of sib2, iclass 10, count 0 2006.230.00:47:14.91#ibcon#*mode == 0, iclass 10, count 0 2006.230.00:47:14.91#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.00:47:14.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:47:14.91#ibcon#*before write, iclass 10, count 0 2006.230.00:47:14.91#ibcon#enter sib2, iclass 10, count 0 2006.230.00:47:14.91#ibcon#flushed, iclass 10, count 0 2006.230.00:47:14.91#ibcon#about to write, iclass 10, count 0 2006.230.00:47:14.91#ibcon#wrote, iclass 10, count 0 2006.230.00:47:14.91#ibcon#about to read 3, iclass 10, count 0 2006.230.00:47:14.95#ibcon#read 3, iclass 10, count 0 2006.230.00:47:14.95#ibcon#about to read 4, iclass 10, count 0 2006.230.00:47:14.95#ibcon#read 4, iclass 10, count 0 2006.230.00:47:14.95#ibcon#about to read 5, iclass 10, count 0 2006.230.00:47:14.95#ibcon#read 5, iclass 10, count 0 2006.230.00:47:14.95#ibcon#about to read 6, iclass 10, count 0 2006.230.00:47:14.95#ibcon#read 6, iclass 10, count 0 2006.230.00:47:14.95#ibcon#end of sib2, iclass 10, count 0 2006.230.00:47:14.95#ibcon#*after write, iclass 10, count 0 2006.230.00:47:14.95#ibcon#*before return 0, iclass 10, count 0 2006.230.00:47:14.95#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:14.95#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.00:47:14.95#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.00:47:14.95#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.00:47:14.95$vck44/vb=7,4 2006.230.00:47:14.95#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.00:47:14.95#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.00:47:14.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:14.95#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:15.01#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:15.01#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:15.01#ibcon#enter wrdev, iclass 12, count 2 2006.230.00:47:15.01#ibcon#first serial, iclass 12, count 2 2006.230.00:47:15.01#ibcon#enter sib2, iclass 12, count 2 2006.230.00:47:15.01#ibcon#flushed, iclass 12, count 2 2006.230.00:47:15.01#ibcon#about to write, iclass 12, count 2 2006.230.00:47:15.01#ibcon#wrote, iclass 12, count 2 2006.230.00:47:15.01#ibcon#about to read 3, iclass 12, count 2 2006.230.00:47:15.03#ibcon#read 3, iclass 12, count 2 2006.230.00:47:15.03#ibcon#about to read 4, iclass 12, count 2 2006.230.00:47:15.03#ibcon#read 4, iclass 12, count 2 2006.230.00:47:15.03#ibcon#about to read 5, iclass 12, count 2 2006.230.00:47:15.03#ibcon#read 5, iclass 12, count 2 2006.230.00:47:15.03#ibcon#about to read 6, iclass 12, count 2 2006.230.00:47:15.03#ibcon#read 6, iclass 12, count 2 2006.230.00:47:15.03#ibcon#end of sib2, iclass 12, count 2 2006.230.00:47:15.03#ibcon#*mode == 0, iclass 12, count 2 2006.230.00:47:15.03#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.00:47:15.03#ibcon#[27=AT07-04\r\n] 2006.230.00:47:15.03#ibcon#*before write, iclass 12, count 2 2006.230.00:47:15.03#ibcon#enter sib2, iclass 12, count 2 2006.230.00:47:15.03#ibcon#flushed, iclass 12, count 2 2006.230.00:47:15.03#ibcon#about to write, iclass 12, count 2 2006.230.00:47:15.03#ibcon#wrote, iclass 12, count 2 2006.230.00:47:15.03#ibcon#about to read 3, iclass 12, count 2 2006.230.00:47:15.06#ibcon#read 3, iclass 12, count 2 2006.230.00:47:15.06#ibcon#about to read 4, iclass 12, count 2 2006.230.00:47:15.06#ibcon#read 4, iclass 12, count 2 2006.230.00:47:15.06#ibcon#about to read 5, iclass 12, count 2 2006.230.00:47:15.06#ibcon#read 5, iclass 12, count 2 2006.230.00:47:15.06#ibcon#about to read 6, iclass 12, count 2 2006.230.00:47:15.06#ibcon#read 6, iclass 12, count 2 2006.230.00:47:15.06#ibcon#end of sib2, iclass 12, count 2 2006.230.00:47:15.06#ibcon#*after write, iclass 12, count 2 2006.230.00:47:15.06#ibcon#*before return 0, iclass 12, count 2 2006.230.00:47:15.06#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:15.06#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.00:47:15.06#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.00:47:15.06#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:15.06#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:15.18#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:15.18#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:15.18#ibcon#enter wrdev, iclass 12, count 0 2006.230.00:47:15.18#ibcon#first serial, iclass 12, count 0 2006.230.00:47:15.18#ibcon#enter sib2, iclass 12, count 0 2006.230.00:47:15.18#ibcon#flushed, iclass 12, count 0 2006.230.00:47:15.18#ibcon#about to write, iclass 12, count 0 2006.230.00:47:15.18#ibcon#wrote, iclass 12, count 0 2006.230.00:47:15.18#ibcon#about to read 3, iclass 12, count 0 2006.230.00:47:15.20#ibcon#read 3, iclass 12, count 0 2006.230.00:47:15.20#ibcon#about to read 4, iclass 12, count 0 2006.230.00:47:15.20#ibcon#read 4, iclass 12, count 0 2006.230.00:47:15.20#ibcon#about to read 5, iclass 12, count 0 2006.230.00:47:15.20#ibcon#read 5, iclass 12, count 0 2006.230.00:47:15.20#ibcon#about to read 6, iclass 12, count 0 2006.230.00:47:15.20#ibcon#read 6, iclass 12, count 0 2006.230.00:47:15.20#ibcon#end of sib2, iclass 12, count 0 2006.230.00:47:15.20#ibcon#*mode == 0, iclass 12, count 0 2006.230.00:47:15.20#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.00:47:15.20#ibcon#[27=USB\r\n] 2006.230.00:47:15.20#ibcon#*before write, iclass 12, count 0 2006.230.00:47:15.20#ibcon#enter sib2, iclass 12, count 0 2006.230.00:47:15.20#ibcon#flushed, iclass 12, count 0 2006.230.00:47:15.20#ibcon#about to write, iclass 12, count 0 2006.230.00:47:15.20#ibcon#wrote, iclass 12, count 0 2006.230.00:47:15.20#ibcon#about to read 3, iclass 12, count 0 2006.230.00:47:15.23#ibcon#read 3, iclass 12, count 0 2006.230.00:47:15.23#ibcon#about to read 4, iclass 12, count 0 2006.230.00:47:15.23#ibcon#read 4, iclass 12, count 0 2006.230.00:47:15.23#ibcon#about to read 5, iclass 12, count 0 2006.230.00:47:15.23#ibcon#read 5, iclass 12, count 0 2006.230.00:47:15.23#ibcon#about to read 6, iclass 12, count 0 2006.230.00:47:15.23#ibcon#read 6, iclass 12, count 0 2006.230.00:47:15.23#ibcon#end of sib2, iclass 12, count 0 2006.230.00:47:15.23#ibcon#*after write, iclass 12, count 0 2006.230.00:47:15.23#ibcon#*before return 0, iclass 12, count 0 2006.230.00:47:15.23#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:15.23#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.00:47:15.23#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.00:47:15.23#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.00:47:15.23$vck44/vblo=8,744.99 2006.230.00:47:15.23#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.00:47:15.23#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.00:47:15.23#ibcon#ireg 17 cls_cnt 0 2006.230.00:47:15.23#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:15.23#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:15.23#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:15.23#ibcon#enter wrdev, iclass 14, count 0 2006.230.00:47:15.23#ibcon#first serial, iclass 14, count 0 2006.230.00:47:15.23#ibcon#enter sib2, iclass 14, count 0 2006.230.00:47:15.23#ibcon#flushed, iclass 14, count 0 2006.230.00:47:15.23#ibcon#about to write, iclass 14, count 0 2006.230.00:47:15.23#ibcon#wrote, iclass 14, count 0 2006.230.00:47:15.23#ibcon#about to read 3, iclass 14, count 0 2006.230.00:47:15.25#ibcon#read 3, iclass 14, count 0 2006.230.00:47:15.25#ibcon#about to read 4, iclass 14, count 0 2006.230.00:47:15.25#ibcon#read 4, iclass 14, count 0 2006.230.00:47:15.25#ibcon#about to read 5, iclass 14, count 0 2006.230.00:47:15.25#ibcon#read 5, iclass 14, count 0 2006.230.00:47:15.25#ibcon#about to read 6, iclass 14, count 0 2006.230.00:47:15.25#ibcon#read 6, iclass 14, count 0 2006.230.00:47:15.25#ibcon#end of sib2, iclass 14, count 0 2006.230.00:47:15.25#ibcon#*mode == 0, iclass 14, count 0 2006.230.00:47:15.25#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.00:47:15.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:47:15.25#ibcon#*before write, iclass 14, count 0 2006.230.00:47:15.25#ibcon#enter sib2, iclass 14, count 0 2006.230.00:47:15.25#ibcon#flushed, iclass 14, count 0 2006.230.00:47:15.25#ibcon#about to write, iclass 14, count 0 2006.230.00:47:15.25#ibcon#wrote, iclass 14, count 0 2006.230.00:47:15.25#ibcon#about to read 3, iclass 14, count 0 2006.230.00:47:15.29#ibcon#read 3, iclass 14, count 0 2006.230.00:47:15.29#ibcon#about to read 4, iclass 14, count 0 2006.230.00:47:15.29#ibcon#read 4, iclass 14, count 0 2006.230.00:47:15.29#ibcon#about to read 5, iclass 14, count 0 2006.230.00:47:15.29#ibcon#read 5, iclass 14, count 0 2006.230.00:47:15.29#ibcon#about to read 6, iclass 14, count 0 2006.230.00:47:15.29#ibcon#read 6, iclass 14, count 0 2006.230.00:47:15.29#ibcon#end of sib2, iclass 14, count 0 2006.230.00:47:15.29#ibcon#*after write, iclass 14, count 0 2006.230.00:47:15.29#ibcon#*before return 0, iclass 14, count 0 2006.230.00:47:15.29#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:15.29#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.00:47:15.29#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.00:47:15.29#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.00:47:15.29$vck44/vb=8,4 2006.230.00:47:15.29#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.00:47:15.29#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.00:47:15.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:47:15.29#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:15.35#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:15.35#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:15.35#ibcon#enter wrdev, iclass 16, count 2 2006.230.00:47:15.35#ibcon#first serial, iclass 16, count 2 2006.230.00:47:15.35#ibcon#enter sib2, iclass 16, count 2 2006.230.00:47:15.35#ibcon#flushed, iclass 16, count 2 2006.230.00:47:15.35#ibcon#about to write, iclass 16, count 2 2006.230.00:47:15.35#ibcon#wrote, iclass 16, count 2 2006.230.00:47:15.35#ibcon#about to read 3, iclass 16, count 2 2006.230.00:47:15.37#ibcon#read 3, iclass 16, count 2 2006.230.00:47:15.37#ibcon#about to read 4, iclass 16, count 2 2006.230.00:47:15.37#ibcon#read 4, iclass 16, count 2 2006.230.00:47:15.37#ibcon#about to read 5, iclass 16, count 2 2006.230.00:47:15.37#ibcon#read 5, iclass 16, count 2 2006.230.00:47:15.37#ibcon#about to read 6, iclass 16, count 2 2006.230.00:47:15.37#ibcon#read 6, iclass 16, count 2 2006.230.00:47:15.37#ibcon#end of sib2, iclass 16, count 2 2006.230.00:47:15.37#ibcon#*mode == 0, iclass 16, count 2 2006.230.00:47:15.37#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.00:47:15.37#ibcon#[27=AT08-04\r\n] 2006.230.00:47:15.37#ibcon#*before write, iclass 16, count 2 2006.230.00:47:15.37#ibcon#enter sib2, iclass 16, count 2 2006.230.00:47:15.37#ibcon#flushed, iclass 16, count 2 2006.230.00:47:15.37#ibcon#about to write, iclass 16, count 2 2006.230.00:47:15.37#ibcon#wrote, iclass 16, count 2 2006.230.00:47:15.37#ibcon#about to read 3, iclass 16, count 2 2006.230.00:47:15.40#ibcon#read 3, iclass 16, count 2 2006.230.00:47:15.40#ibcon#about to read 4, iclass 16, count 2 2006.230.00:47:15.40#ibcon#read 4, iclass 16, count 2 2006.230.00:47:15.40#ibcon#about to read 5, iclass 16, count 2 2006.230.00:47:15.40#ibcon#read 5, iclass 16, count 2 2006.230.00:47:15.40#ibcon#about to read 6, iclass 16, count 2 2006.230.00:47:15.40#ibcon#read 6, iclass 16, count 2 2006.230.00:47:15.40#ibcon#end of sib2, iclass 16, count 2 2006.230.00:47:15.40#ibcon#*after write, iclass 16, count 2 2006.230.00:47:15.40#ibcon#*before return 0, iclass 16, count 2 2006.230.00:47:15.40#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:15.40#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.00:47:15.40#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.00:47:15.40#ibcon#ireg 7 cls_cnt 0 2006.230.00:47:15.40#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:15.52#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:15.52#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:15.52#ibcon#enter wrdev, iclass 16, count 0 2006.230.00:47:15.52#ibcon#first serial, iclass 16, count 0 2006.230.00:47:15.52#ibcon#enter sib2, iclass 16, count 0 2006.230.00:47:15.52#ibcon#flushed, iclass 16, count 0 2006.230.00:47:15.52#ibcon#about to write, iclass 16, count 0 2006.230.00:47:15.52#ibcon#wrote, iclass 16, count 0 2006.230.00:47:15.52#ibcon#about to read 3, iclass 16, count 0 2006.230.00:47:15.54#ibcon#read 3, iclass 16, count 0 2006.230.00:47:15.54#ibcon#about to read 4, iclass 16, count 0 2006.230.00:47:15.54#ibcon#read 4, iclass 16, count 0 2006.230.00:47:15.54#ibcon#about to read 5, iclass 16, count 0 2006.230.00:47:15.54#ibcon#read 5, iclass 16, count 0 2006.230.00:47:15.54#ibcon#about to read 6, iclass 16, count 0 2006.230.00:47:15.54#ibcon#read 6, iclass 16, count 0 2006.230.00:47:15.54#ibcon#end of sib2, iclass 16, count 0 2006.230.00:47:15.54#ibcon#*mode == 0, iclass 16, count 0 2006.230.00:47:15.54#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.00:47:15.54#ibcon#[27=USB\r\n] 2006.230.00:47:15.54#ibcon#*before write, iclass 16, count 0 2006.230.00:47:15.54#ibcon#enter sib2, iclass 16, count 0 2006.230.00:47:15.54#ibcon#flushed, iclass 16, count 0 2006.230.00:47:15.54#ibcon#about to write, iclass 16, count 0 2006.230.00:47:15.54#ibcon#wrote, iclass 16, count 0 2006.230.00:47:15.54#ibcon#about to read 3, iclass 16, count 0 2006.230.00:47:15.57#ibcon#read 3, iclass 16, count 0 2006.230.00:47:15.57#ibcon#about to read 4, iclass 16, count 0 2006.230.00:47:15.57#ibcon#read 4, iclass 16, count 0 2006.230.00:47:15.57#ibcon#about to read 5, iclass 16, count 0 2006.230.00:47:15.57#ibcon#read 5, iclass 16, count 0 2006.230.00:47:15.57#ibcon#about to read 6, iclass 16, count 0 2006.230.00:47:15.57#ibcon#read 6, iclass 16, count 0 2006.230.00:47:15.57#ibcon#end of sib2, iclass 16, count 0 2006.230.00:47:15.57#ibcon#*after write, iclass 16, count 0 2006.230.00:47:15.57#ibcon#*before return 0, iclass 16, count 0 2006.230.00:47:15.57#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:15.57#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.00:47:15.57#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.00:47:15.57#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.00:47:15.57$vck44/vabw=wide 2006.230.00:47:15.57#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.00:47:15.57#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.00:47:15.57#ibcon#ireg 8 cls_cnt 0 2006.230.00:47:15.57#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:15.57#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:15.57#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:15.57#ibcon#enter wrdev, iclass 18, count 0 2006.230.00:47:15.57#ibcon#first serial, iclass 18, count 0 2006.230.00:47:15.57#ibcon#enter sib2, iclass 18, count 0 2006.230.00:47:15.57#ibcon#flushed, iclass 18, count 0 2006.230.00:47:15.57#ibcon#about to write, iclass 18, count 0 2006.230.00:47:15.57#ibcon#wrote, iclass 18, count 0 2006.230.00:47:15.57#ibcon#about to read 3, iclass 18, count 0 2006.230.00:47:15.59#ibcon#read 3, iclass 18, count 0 2006.230.00:47:15.59#ibcon#about to read 4, iclass 18, count 0 2006.230.00:47:15.59#ibcon#read 4, iclass 18, count 0 2006.230.00:47:15.59#ibcon#about to read 5, iclass 18, count 0 2006.230.00:47:15.59#ibcon#read 5, iclass 18, count 0 2006.230.00:47:15.59#ibcon#about to read 6, iclass 18, count 0 2006.230.00:47:15.59#ibcon#read 6, iclass 18, count 0 2006.230.00:47:15.59#ibcon#end of sib2, iclass 18, count 0 2006.230.00:47:15.59#ibcon#*mode == 0, iclass 18, count 0 2006.230.00:47:15.59#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.00:47:15.59#ibcon#[25=BW32\r\n] 2006.230.00:47:15.59#ibcon#*before write, iclass 18, count 0 2006.230.00:47:15.59#ibcon#enter sib2, iclass 18, count 0 2006.230.00:47:15.59#ibcon#flushed, iclass 18, count 0 2006.230.00:47:15.59#ibcon#about to write, iclass 18, count 0 2006.230.00:47:15.59#ibcon#wrote, iclass 18, count 0 2006.230.00:47:15.59#ibcon#about to read 3, iclass 18, count 0 2006.230.00:47:15.62#ibcon#read 3, iclass 18, count 0 2006.230.00:47:15.62#ibcon#about to read 4, iclass 18, count 0 2006.230.00:47:15.62#ibcon#read 4, iclass 18, count 0 2006.230.00:47:15.62#ibcon#about to read 5, iclass 18, count 0 2006.230.00:47:15.62#ibcon#read 5, iclass 18, count 0 2006.230.00:47:15.62#ibcon#about to read 6, iclass 18, count 0 2006.230.00:47:15.62#ibcon#read 6, iclass 18, count 0 2006.230.00:47:15.62#ibcon#end of sib2, iclass 18, count 0 2006.230.00:47:15.62#ibcon#*after write, iclass 18, count 0 2006.230.00:47:15.62#ibcon#*before return 0, iclass 18, count 0 2006.230.00:47:15.62#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:15.62#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.00:47:15.62#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.00:47:15.62#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.00:47:15.62$vck44/vbbw=wide 2006.230.00:47:15.62#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.00:47:15.62#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.00:47:15.62#ibcon#ireg 8 cls_cnt 0 2006.230.00:47:15.62#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:47:15.69#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:47:15.69#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:47:15.69#ibcon#enter wrdev, iclass 20, count 0 2006.230.00:47:15.69#ibcon#first serial, iclass 20, count 0 2006.230.00:47:15.69#ibcon#enter sib2, iclass 20, count 0 2006.230.00:47:15.69#ibcon#flushed, iclass 20, count 0 2006.230.00:47:15.69#ibcon#about to write, iclass 20, count 0 2006.230.00:47:15.69#ibcon#wrote, iclass 20, count 0 2006.230.00:47:15.69#ibcon#about to read 3, iclass 20, count 0 2006.230.00:47:15.71#ibcon#read 3, iclass 20, count 0 2006.230.00:47:15.71#ibcon#about to read 4, iclass 20, count 0 2006.230.00:47:15.71#ibcon#read 4, iclass 20, count 0 2006.230.00:47:15.71#ibcon#about to read 5, iclass 20, count 0 2006.230.00:47:15.71#ibcon#read 5, iclass 20, count 0 2006.230.00:47:15.71#ibcon#about to read 6, iclass 20, count 0 2006.230.00:47:15.71#ibcon#read 6, iclass 20, count 0 2006.230.00:47:15.71#ibcon#end of sib2, iclass 20, count 0 2006.230.00:47:15.71#ibcon#*mode == 0, iclass 20, count 0 2006.230.00:47:15.71#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.00:47:15.71#ibcon#[27=BW32\r\n] 2006.230.00:47:15.71#ibcon#*before write, iclass 20, count 0 2006.230.00:47:15.71#ibcon#enter sib2, iclass 20, count 0 2006.230.00:47:15.71#ibcon#flushed, iclass 20, count 0 2006.230.00:47:15.71#ibcon#about to write, iclass 20, count 0 2006.230.00:47:15.71#ibcon#wrote, iclass 20, count 0 2006.230.00:47:15.71#ibcon#about to read 3, iclass 20, count 0 2006.230.00:47:15.74#ibcon#read 3, iclass 20, count 0 2006.230.00:47:15.74#ibcon#about to read 4, iclass 20, count 0 2006.230.00:47:15.74#ibcon#read 4, iclass 20, count 0 2006.230.00:47:15.74#ibcon#about to read 5, iclass 20, count 0 2006.230.00:47:15.74#ibcon#read 5, iclass 20, count 0 2006.230.00:47:15.74#ibcon#about to read 6, iclass 20, count 0 2006.230.00:47:15.74#ibcon#read 6, iclass 20, count 0 2006.230.00:47:15.74#ibcon#end of sib2, iclass 20, count 0 2006.230.00:47:15.74#ibcon#*after write, iclass 20, count 0 2006.230.00:47:15.74#ibcon#*before return 0, iclass 20, count 0 2006.230.00:47:15.74#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:47:15.74#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.00:47:15.74#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.00:47:15.74#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.00:47:15.74$setupk4/ifdk4 2006.230.00:47:15.74$ifdk4/lo= 2006.230.00:47:15.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:47:15.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:47:15.74$ifdk4/patch= 2006.230.00:47:15.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:47:15.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:47:15.74$setupk4/!*+20s 2006.230.00:47:16.31#abcon#<5=/08 1.8 5.0 32.00 711002.8\r\n> 2006.230.00:47:16.33#abcon#{5=INTERFACE CLEAR} 2006.230.00:47:16.39#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:47:22.14#trakl#Source acquired 2006.230.00:47:23.14#flagr#flagr/antenna,acquired 2006.230.00:47:26.48#abcon#<5=/08 1.8 5.0 32.00 731002.8\r\n> 2006.230.00:47:26.50#abcon#{5=INTERFACE CLEAR} 2006.230.00:47:26.56#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:47:30.25$setupk4/"tpicd 2006.230.00:47:30.25$setupk4/echo=off 2006.230.00:47:30.25$setupk4/xlog=off 2006.230.00:47:30.25:!2006.230.00:50:16 2006.230.00:50:16.00:preob 2006.230.00:50:16.14/onsource/TRACKING 2006.230.00:50:16.14:!2006.230.00:50:26 2006.230.00:50:26.00:"tape 2006.230.00:50:26.00:"st=record 2006.230.00:50:26.00:data_valid=on 2006.230.00:50:26.00:midob 2006.230.00:50:26.14/onsource/TRACKING 2006.230.00:50:26.14/wx/32.09,1002.9,72 2006.230.00:50:26.35/cable/+6.3992E-03 2006.230.00:50:27.44/va/01,08,usb,yes,29,31 2006.230.00:50:27.44/va/02,07,usb,yes,32,32 2006.230.00:50:27.44/va/03,06,usb,yes,39,42 2006.230.00:50:27.44/va/04,07,usb,yes,32,34 2006.230.00:50:27.44/va/05,04,usb,yes,29,29 2006.230.00:50:27.44/va/06,04,usb,yes,33,32 2006.230.00:50:27.44/va/07,05,usb,yes,29,29 2006.230.00:50:27.44/va/08,06,usb,yes,21,26 2006.230.00:50:27.67/valo/01,524.99,yes,locked 2006.230.00:50:27.67/valo/02,534.99,yes,locked 2006.230.00:50:27.67/valo/03,564.99,yes,locked 2006.230.00:50:27.67/valo/04,624.99,yes,locked 2006.230.00:50:27.67/valo/05,734.99,yes,locked 2006.230.00:50:27.67/valo/06,814.99,yes,locked 2006.230.00:50:27.67/valo/07,864.99,yes,locked 2006.230.00:50:27.67/valo/08,884.99,yes,locked 2006.230.00:50:28.76/vb/01,04,usb,yes,31,28 2006.230.00:50:28.76/vb/02,04,usb,yes,33,33 2006.230.00:50:28.76/vb/03,04,usb,yes,30,33 2006.230.00:50:28.76/vb/04,04,usb,yes,34,33 2006.230.00:50:28.76/vb/05,04,usb,yes,27,29 2006.230.00:50:28.76/vb/06,04,usb,yes,31,27 2006.230.00:50:28.76/vb/07,04,usb,yes,31,31 2006.230.00:50:28.76/vb/08,04,usb,yes,29,32 2006.230.00:50:28.99/vblo/01,629.99,yes,locked 2006.230.00:50:28.99/vblo/02,634.99,yes,locked 2006.230.00:50:28.99/vblo/03,649.99,yes,locked 2006.230.00:50:28.99/vblo/04,679.99,yes,locked 2006.230.00:50:28.99/vblo/05,709.99,yes,locked 2006.230.00:50:28.99/vblo/06,719.99,yes,locked 2006.230.00:50:28.99/vblo/07,734.99,yes,locked 2006.230.00:50:28.99/vblo/08,744.99,yes,locked 2006.230.00:50:29.14/vabw/8 2006.230.00:50:29.29/vbbw/8 2006.230.00:50:29.38/xfe/off,on,12.0 2006.230.00:50:29.76/ifatt/23,28,28,28 2006.230.00:50:30.08/fmout-gps/S +4.51E-07 2006.230.00:50:30.12:!2006.230.00:55:46 2006.230.00:55:46.00:data_valid=off 2006.230.00:55:46.00:"et 2006.230.00:55:46.00:!+3s 2006.230.00:55:49.01:"tape 2006.230.00:55:49.01:postob 2006.230.00:55:49.10/cable/+6.3997E-03 2006.230.00:55:49.10/wx/32.07,1002.9,72 2006.230.00:55:50.08/fmout-gps/S +4.50E-07 2006.230.00:55:50.08:scan_name=230-0101,jd0608,130 2006.230.00:55:50.08:source=3c274,123049.42,122328.0,2000.0,cw 2006.230.00:55:51.14#flagr#flagr/antenna,new-source 2006.230.00:55:51.14:checkk5 2006.230.00:55:51.54/chk_autoobs//k5ts1/ autoobs is running! 2006.230.00:55:51.95/chk_autoobs//k5ts2/ autoobs is running! 2006.230.00:55:52.38/chk_autoobs//k5ts3/ autoobs is running! 2006.230.00:55:52.79/chk_autoobs//k5ts4/ autoobs is running! 2006.230.00:55:53.18/chk_obsdata//k5ts1/T2300050??a.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:55:53.58/chk_obsdata//k5ts2/T2300050??b.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:55:53.97/chk_obsdata//k5ts3/T2300050??c.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:55:54.36/chk_obsdata//k5ts4/T2300050??d.dat file size is correct (nominal:1280MB, actual:1276MB). 2006.230.00:55:55.09/k5log//k5ts1_log_newline 2006.230.00:55:55.80/k5log//k5ts2_log_newline 2006.230.00:55:56.50/k5log//k5ts3_log_newline 2006.230.00:55:57.21/k5log//k5ts4_log_newline 2006.230.00:55:57.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.00:55:57.23:setupk4=1 2006.230.00:55:57.23$setupk4/echo=on 2006.230.00:55:57.23$setupk4/pcalon 2006.230.00:55:57.23$pcalon/"no phase cal control is implemented here 2006.230.00:55:57.23$setupk4/"tpicd=stop 2006.230.00:55:57.23$setupk4/"rec=synch_on 2006.230.00:55:57.23$setupk4/"rec_mode=128 2006.230.00:55:57.23$setupk4/!* 2006.230.00:55:57.23$setupk4/recpk4 2006.230.00:55:57.23$recpk4/recpatch= 2006.230.00:55:57.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.00:55:57.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.00:55:57.24$setupk4/vck44 2006.230.00:55:57.24$vck44/valo=1,524.99 2006.230.00:55:57.24#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:55:57.24#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:55:57.24#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:57.24#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:55:57.24#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:55:57.24#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:55:57.24#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:55:57.24#ibcon#first serial, iclass 17, count 0 2006.230.00:55:57.24#ibcon#enter sib2, iclass 17, count 0 2006.230.00:55:57.24#ibcon#flushed, iclass 17, count 0 2006.230.00:55:57.24#ibcon#about to write, iclass 17, count 0 2006.230.00:55:57.24#ibcon#wrote, iclass 17, count 0 2006.230.00:55:57.24#ibcon#about to read 3, iclass 17, count 0 2006.230.00:55:57.26#ibcon#read 3, iclass 17, count 0 2006.230.00:55:57.26#ibcon#about to read 4, iclass 17, count 0 2006.230.00:55:57.26#ibcon#read 4, iclass 17, count 0 2006.230.00:55:57.26#ibcon#about to read 5, iclass 17, count 0 2006.230.00:55:57.26#ibcon#read 5, iclass 17, count 0 2006.230.00:55:57.26#ibcon#about to read 6, iclass 17, count 0 2006.230.00:55:57.26#ibcon#read 6, iclass 17, count 0 2006.230.00:55:57.26#ibcon#end of sib2, iclass 17, count 0 2006.230.00:55:57.26#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:55:57.26#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:55:57.26#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.00:55:57.26#ibcon#*before write, iclass 17, count 0 2006.230.00:55:57.26#ibcon#enter sib2, iclass 17, count 0 2006.230.00:55:57.26#ibcon#flushed, iclass 17, count 0 2006.230.00:55:57.26#ibcon#about to write, iclass 17, count 0 2006.230.00:55:57.26#ibcon#wrote, iclass 17, count 0 2006.230.00:55:57.26#ibcon#about to read 3, iclass 17, count 0 2006.230.00:55:57.31#ibcon#read 3, iclass 17, count 0 2006.230.00:55:57.31#ibcon#about to read 4, iclass 17, count 0 2006.230.00:55:57.31#ibcon#read 4, iclass 17, count 0 2006.230.00:55:57.31#ibcon#about to read 5, iclass 17, count 0 2006.230.00:55:57.31#ibcon#read 5, iclass 17, count 0 2006.230.00:55:57.31#ibcon#about to read 6, iclass 17, count 0 2006.230.00:55:57.31#ibcon#read 6, iclass 17, count 0 2006.230.00:55:57.31#ibcon#end of sib2, iclass 17, count 0 2006.230.00:55:57.31#ibcon#*after write, iclass 17, count 0 2006.230.00:55:57.31#ibcon#*before return 0, iclass 17, count 0 2006.230.00:55:57.31#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:55:57.31#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:55:57.31#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:55:57.31#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:55:57.31$vck44/va=1,8 2006.230.00:55:57.31#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.00:55:57.31#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.00:55:57.31#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:57.31#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:55:57.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:55:57.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:55:57.31#ibcon#enter wrdev, iclass 19, count 2 2006.230.00:55:57.31#ibcon#first serial, iclass 19, count 2 2006.230.00:55:57.31#ibcon#enter sib2, iclass 19, count 2 2006.230.00:55:57.31#ibcon#flushed, iclass 19, count 2 2006.230.00:55:57.31#ibcon#about to write, iclass 19, count 2 2006.230.00:55:57.31#ibcon#wrote, iclass 19, count 2 2006.230.00:55:57.31#ibcon#about to read 3, iclass 19, count 2 2006.230.00:55:57.33#ibcon#read 3, iclass 19, count 2 2006.230.00:55:57.33#ibcon#about to read 4, iclass 19, count 2 2006.230.00:55:57.33#ibcon#read 4, iclass 19, count 2 2006.230.00:55:57.33#ibcon#about to read 5, iclass 19, count 2 2006.230.00:55:57.33#ibcon#read 5, iclass 19, count 2 2006.230.00:55:57.33#ibcon#about to read 6, iclass 19, count 2 2006.230.00:55:57.33#ibcon#read 6, iclass 19, count 2 2006.230.00:55:57.33#ibcon#end of sib2, iclass 19, count 2 2006.230.00:55:57.33#ibcon#*mode == 0, iclass 19, count 2 2006.230.00:55:57.33#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.00:55:57.33#ibcon#[25=AT01-08\r\n] 2006.230.00:55:57.33#ibcon#*before write, iclass 19, count 2 2006.230.00:55:57.33#ibcon#enter sib2, iclass 19, count 2 2006.230.00:55:57.33#ibcon#flushed, iclass 19, count 2 2006.230.00:55:57.33#ibcon#about to write, iclass 19, count 2 2006.230.00:55:57.33#ibcon#wrote, iclass 19, count 2 2006.230.00:55:57.33#ibcon#about to read 3, iclass 19, count 2 2006.230.00:55:57.36#ibcon#read 3, iclass 19, count 2 2006.230.00:55:57.36#ibcon#about to read 4, iclass 19, count 2 2006.230.00:55:57.36#ibcon#read 4, iclass 19, count 2 2006.230.00:55:57.36#ibcon#about to read 5, iclass 19, count 2 2006.230.00:55:57.36#ibcon#read 5, iclass 19, count 2 2006.230.00:55:57.36#ibcon#about to read 6, iclass 19, count 2 2006.230.00:55:57.36#ibcon#read 6, iclass 19, count 2 2006.230.00:55:57.36#ibcon#end of sib2, iclass 19, count 2 2006.230.00:55:57.36#ibcon#*after write, iclass 19, count 2 2006.230.00:55:57.36#ibcon#*before return 0, iclass 19, count 2 2006.230.00:55:57.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:55:57.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:55:57.36#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.00:55:57.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:57.36#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:55:57.48#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:55:57.48#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:55:57.48#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:55:57.48#ibcon#first serial, iclass 19, count 0 2006.230.00:55:57.48#ibcon#enter sib2, iclass 19, count 0 2006.230.00:55:57.48#ibcon#flushed, iclass 19, count 0 2006.230.00:55:57.48#ibcon#about to write, iclass 19, count 0 2006.230.00:55:57.48#ibcon#wrote, iclass 19, count 0 2006.230.00:55:57.48#ibcon#about to read 3, iclass 19, count 0 2006.230.00:55:57.50#ibcon#read 3, iclass 19, count 0 2006.230.00:55:57.50#ibcon#about to read 4, iclass 19, count 0 2006.230.00:55:57.50#ibcon#read 4, iclass 19, count 0 2006.230.00:55:57.50#ibcon#about to read 5, iclass 19, count 0 2006.230.00:55:57.50#ibcon#read 5, iclass 19, count 0 2006.230.00:55:57.50#ibcon#about to read 6, iclass 19, count 0 2006.230.00:55:57.50#ibcon#read 6, iclass 19, count 0 2006.230.00:55:57.50#ibcon#end of sib2, iclass 19, count 0 2006.230.00:55:57.50#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:55:57.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:55:57.50#ibcon#[25=USB\r\n] 2006.230.00:55:57.50#ibcon#*before write, iclass 19, count 0 2006.230.00:55:57.50#ibcon#enter sib2, iclass 19, count 0 2006.230.00:55:57.50#ibcon#flushed, iclass 19, count 0 2006.230.00:55:57.50#ibcon#about to write, iclass 19, count 0 2006.230.00:55:57.50#ibcon#wrote, iclass 19, count 0 2006.230.00:55:57.50#ibcon#about to read 3, iclass 19, count 0 2006.230.00:55:57.53#ibcon#read 3, iclass 19, count 0 2006.230.00:55:57.53#ibcon#about to read 4, iclass 19, count 0 2006.230.00:55:57.53#ibcon#read 4, iclass 19, count 0 2006.230.00:55:57.53#ibcon#about to read 5, iclass 19, count 0 2006.230.00:55:57.53#ibcon#read 5, iclass 19, count 0 2006.230.00:55:57.53#ibcon#about to read 6, iclass 19, count 0 2006.230.00:55:57.53#ibcon#read 6, iclass 19, count 0 2006.230.00:55:57.53#ibcon#end of sib2, iclass 19, count 0 2006.230.00:55:57.53#ibcon#*after write, iclass 19, count 0 2006.230.00:55:57.53#ibcon#*before return 0, iclass 19, count 0 2006.230.00:55:57.53#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:55:57.53#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:55:57.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:55:57.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:55:57.53$vck44/valo=2,534.99 2006.230.00:55:57.53#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.00:55:57.53#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.00:55:57.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:57.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:55:57.53#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:55:57.53#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:55:57.53#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:55:57.53#ibcon#first serial, iclass 21, count 0 2006.230.00:55:57.53#ibcon#enter sib2, iclass 21, count 0 2006.230.00:55:57.53#ibcon#flushed, iclass 21, count 0 2006.230.00:55:57.53#ibcon#about to write, iclass 21, count 0 2006.230.00:55:57.53#ibcon#wrote, iclass 21, count 0 2006.230.00:55:57.53#ibcon#about to read 3, iclass 21, count 0 2006.230.00:55:57.55#ibcon#read 3, iclass 21, count 0 2006.230.00:55:57.55#ibcon#about to read 4, iclass 21, count 0 2006.230.00:55:57.55#ibcon#read 4, iclass 21, count 0 2006.230.00:55:57.55#ibcon#about to read 5, iclass 21, count 0 2006.230.00:55:57.55#ibcon#read 5, iclass 21, count 0 2006.230.00:55:57.55#ibcon#about to read 6, iclass 21, count 0 2006.230.00:55:57.55#ibcon#read 6, iclass 21, count 0 2006.230.00:55:57.55#ibcon#end of sib2, iclass 21, count 0 2006.230.00:55:57.55#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:55:57.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:55:57.55#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.00:55:57.55#ibcon#*before write, iclass 21, count 0 2006.230.00:55:57.55#ibcon#enter sib2, iclass 21, count 0 2006.230.00:55:57.55#ibcon#flushed, iclass 21, count 0 2006.230.00:55:57.55#ibcon#about to write, iclass 21, count 0 2006.230.00:55:57.55#ibcon#wrote, iclass 21, count 0 2006.230.00:55:57.55#ibcon#about to read 3, iclass 21, count 0 2006.230.00:55:57.59#ibcon#read 3, iclass 21, count 0 2006.230.00:55:57.59#ibcon#about to read 4, iclass 21, count 0 2006.230.00:55:57.59#ibcon#read 4, iclass 21, count 0 2006.230.00:55:57.59#ibcon#about to read 5, iclass 21, count 0 2006.230.00:55:57.59#ibcon#read 5, iclass 21, count 0 2006.230.00:55:57.59#ibcon#about to read 6, iclass 21, count 0 2006.230.00:55:57.59#ibcon#read 6, iclass 21, count 0 2006.230.00:55:57.59#ibcon#end of sib2, iclass 21, count 0 2006.230.00:55:57.59#ibcon#*after write, iclass 21, count 0 2006.230.00:55:57.59#ibcon#*before return 0, iclass 21, count 0 2006.230.00:55:57.59#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:55:57.59#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:55:57.59#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:55:57.59#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:55:57.59$vck44/va=2,7 2006.230.00:55:57.59#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.00:55:57.59#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.00:55:57.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:57.59#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:55:57.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:55:57.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:55:57.65#ibcon#enter wrdev, iclass 23, count 2 2006.230.00:55:57.65#ibcon#first serial, iclass 23, count 2 2006.230.00:55:57.65#ibcon#enter sib2, iclass 23, count 2 2006.230.00:55:57.65#ibcon#flushed, iclass 23, count 2 2006.230.00:55:57.65#ibcon#about to write, iclass 23, count 2 2006.230.00:55:57.65#ibcon#wrote, iclass 23, count 2 2006.230.00:55:57.65#ibcon#about to read 3, iclass 23, count 2 2006.230.00:55:57.67#ibcon#read 3, iclass 23, count 2 2006.230.00:55:57.67#ibcon#about to read 4, iclass 23, count 2 2006.230.00:55:57.67#ibcon#read 4, iclass 23, count 2 2006.230.00:55:57.67#ibcon#about to read 5, iclass 23, count 2 2006.230.00:55:57.67#ibcon#read 5, iclass 23, count 2 2006.230.00:55:57.67#ibcon#about to read 6, iclass 23, count 2 2006.230.00:55:57.67#ibcon#read 6, iclass 23, count 2 2006.230.00:55:57.67#ibcon#end of sib2, iclass 23, count 2 2006.230.00:55:57.67#ibcon#*mode == 0, iclass 23, count 2 2006.230.00:55:57.67#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.00:55:57.67#ibcon#[25=AT02-07\r\n] 2006.230.00:55:57.67#ibcon#*before write, iclass 23, count 2 2006.230.00:55:57.67#ibcon#enter sib2, iclass 23, count 2 2006.230.00:55:57.67#ibcon#flushed, iclass 23, count 2 2006.230.00:55:57.67#ibcon#about to write, iclass 23, count 2 2006.230.00:55:57.67#ibcon#wrote, iclass 23, count 2 2006.230.00:55:57.67#ibcon#about to read 3, iclass 23, count 2 2006.230.00:55:57.70#ibcon#read 3, iclass 23, count 2 2006.230.00:55:57.70#ibcon#about to read 4, iclass 23, count 2 2006.230.00:55:57.70#ibcon#read 4, iclass 23, count 2 2006.230.00:55:57.70#ibcon#about to read 5, iclass 23, count 2 2006.230.00:55:57.70#ibcon#read 5, iclass 23, count 2 2006.230.00:55:57.70#ibcon#about to read 6, iclass 23, count 2 2006.230.00:55:57.70#ibcon#read 6, iclass 23, count 2 2006.230.00:55:57.70#ibcon#end of sib2, iclass 23, count 2 2006.230.00:55:57.70#ibcon#*after write, iclass 23, count 2 2006.230.00:55:57.70#ibcon#*before return 0, iclass 23, count 2 2006.230.00:55:57.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:55:57.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:55:57.70#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.00:55:57.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:57.70#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:55:57.82#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:55:57.82#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:55:57.82#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:55:57.82#ibcon#first serial, iclass 23, count 0 2006.230.00:55:57.82#ibcon#enter sib2, iclass 23, count 0 2006.230.00:55:57.82#ibcon#flushed, iclass 23, count 0 2006.230.00:55:57.82#ibcon#about to write, iclass 23, count 0 2006.230.00:55:57.82#ibcon#wrote, iclass 23, count 0 2006.230.00:55:57.82#ibcon#about to read 3, iclass 23, count 0 2006.230.00:55:57.84#ibcon#read 3, iclass 23, count 0 2006.230.00:55:57.84#ibcon#about to read 4, iclass 23, count 0 2006.230.00:55:57.84#ibcon#read 4, iclass 23, count 0 2006.230.00:55:57.84#ibcon#about to read 5, iclass 23, count 0 2006.230.00:55:57.84#ibcon#read 5, iclass 23, count 0 2006.230.00:55:57.84#ibcon#about to read 6, iclass 23, count 0 2006.230.00:55:57.84#ibcon#read 6, iclass 23, count 0 2006.230.00:55:57.84#ibcon#end of sib2, iclass 23, count 0 2006.230.00:55:57.84#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:55:57.84#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:55:57.84#ibcon#[25=USB\r\n] 2006.230.00:55:57.84#ibcon#*before write, iclass 23, count 0 2006.230.00:55:57.84#ibcon#enter sib2, iclass 23, count 0 2006.230.00:55:57.84#ibcon#flushed, iclass 23, count 0 2006.230.00:55:57.84#ibcon#about to write, iclass 23, count 0 2006.230.00:55:57.84#ibcon#wrote, iclass 23, count 0 2006.230.00:55:57.84#ibcon#about to read 3, iclass 23, count 0 2006.230.00:55:57.87#ibcon#read 3, iclass 23, count 0 2006.230.00:55:57.87#ibcon#about to read 4, iclass 23, count 0 2006.230.00:55:57.87#ibcon#read 4, iclass 23, count 0 2006.230.00:55:57.87#ibcon#about to read 5, iclass 23, count 0 2006.230.00:55:57.87#ibcon#read 5, iclass 23, count 0 2006.230.00:55:57.87#ibcon#about to read 6, iclass 23, count 0 2006.230.00:55:57.87#ibcon#read 6, iclass 23, count 0 2006.230.00:55:57.87#ibcon#end of sib2, iclass 23, count 0 2006.230.00:55:57.87#ibcon#*after write, iclass 23, count 0 2006.230.00:55:57.87#ibcon#*before return 0, iclass 23, count 0 2006.230.00:55:57.87#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:55:57.87#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:55:57.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:55:57.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:55:57.87$vck44/valo=3,564.99 2006.230.00:55:57.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.00:55:57.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.00:55:57.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:57.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:55:57.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:55:57.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:55:57.87#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:55:57.87#ibcon#first serial, iclass 25, count 0 2006.230.00:55:57.87#ibcon#enter sib2, iclass 25, count 0 2006.230.00:55:57.87#ibcon#flushed, iclass 25, count 0 2006.230.00:55:57.87#ibcon#about to write, iclass 25, count 0 2006.230.00:55:57.87#ibcon#wrote, iclass 25, count 0 2006.230.00:55:57.87#ibcon#about to read 3, iclass 25, count 0 2006.230.00:55:57.89#ibcon#read 3, iclass 25, count 0 2006.230.00:55:57.89#ibcon#about to read 4, iclass 25, count 0 2006.230.00:55:57.89#ibcon#read 4, iclass 25, count 0 2006.230.00:55:57.89#ibcon#about to read 5, iclass 25, count 0 2006.230.00:55:57.89#ibcon#read 5, iclass 25, count 0 2006.230.00:55:57.89#ibcon#about to read 6, iclass 25, count 0 2006.230.00:55:57.89#ibcon#read 6, iclass 25, count 0 2006.230.00:55:57.89#ibcon#end of sib2, iclass 25, count 0 2006.230.00:55:57.89#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:55:57.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:55:57.89#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.00:55:57.89#ibcon#*before write, iclass 25, count 0 2006.230.00:55:57.89#ibcon#enter sib2, iclass 25, count 0 2006.230.00:55:57.89#ibcon#flushed, iclass 25, count 0 2006.230.00:55:57.89#ibcon#about to write, iclass 25, count 0 2006.230.00:55:57.89#ibcon#wrote, iclass 25, count 0 2006.230.00:55:57.89#ibcon#about to read 3, iclass 25, count 0 2006.230.00:55:57.93#ibcon#read 3, iclass 25, count 0 2006.230.00:55:57.93#ibcon#about to read 4, iclass 25, count 0 2006.230.00:55:57.93#ibcon#read 4, iclass 25, count 0 2006.230.00:55:57.93#ibcon#about to read 5, iclass 25, count 0 2006.230.00:55:57.93#ibcon#read 5, iclass 25, count 0 2006.230.00:55:57.93#ibcon#about to read 6, iclass 25, count 0 2006.230.00:55:57.93#ibcon#read 6, iclass 25, count 0 2006.230.00:55:57.93#ibcon#end of sib2, iclass 25, count 0 2006.230.00:55:57.93#ibcon#*after write, iclass 25, count 0 2006.230.00:55:57.93#ibcon#*before return 0, iclass 25, count 0 2006.230.00:55:57.93#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:55:57.93#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:55:57.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:55:57.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:55:57.93$vck44/va=3,6 2006.230.00:55:57.93#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.00:55:57.93#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.00:55:57.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:57.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:55:57.99#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:55:57.99#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:55:57.99#ibcon#enter wrdev, iclass 27, count 2 2006.230.00:55:57.99#ibcon#first serial, iclass 27, count 2 2006.230.00:55:57.99#ibcon#enter sib2, iclass 27, count 2 2006.230.00:55:57.99#ibcon#flushed, iclass 27, count 2 2006.230.00:55:57.99#ibcon#about to write, iclass 27, count 2 2006.230.00:55:57.99#ibcon#wrote, iclass 27, count 2 2006.230.00:55:57.99#ibcon#about to read 3, iclass 27, count 2 2006.230.00:55:58.01#ibcon#read 3, iclass 27, count 2 2006.230.00:55:58.01#ibcon#about to read 4, iclass 27, count 2 2006.230.00:55:58.01#ibcon#read 4, iclass 27, count 2 2006.230.00:55:58.01#ibcon#about to read 5, iclass 27, count 2 2006.230.00:55:58.01#ibcon#read 5, iclass 27, count 2 2006.230.00:55:58.01#ibcon#about to read 6, iclass 27, count 2 2006.230.00:55:58.01#ibcon#read 6, iclass 27, count 2 2006.230.00:55:58.01#ibcon#end of sib2, iclass 27, count 2 2006.230.00:55:58.01#ibcon#*mode == 0, iclass 27, count 2 2006.230.00:55:58.01#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.00:55:58.01#ibcon#[25=AT03-06\r\n] 2006.230.00:55:58.01#ibcon#*before write, iclass 27, count 2 2006.230.00:55:58.01#ibcon#enter sib2, iclass 27, count 2 2006.230.00:55:58.01#ibcon#flushed, iclass 27, count 2 2006.230.00:55:58.01#ibcon#about to write, iclass 27, count 2 2006.230.00:55:58.01#ibcon#wrote, iclass 27, count 2 2006.230.00:55:58.01#ibcon#about to read 3, iclass 27, count 2 2006.230.00:55:58.04#ibcon#read 3, iclass 27, count 2 2006.230.00:55:58.04#ibcon#about to read 4, iclass 27, count 2 2006.230.00:55:58.04#ibcon#read 4, iclass 27, count 2 2006.230.00:55:58.04#ibcon#about to read 5, iclass 27, count 2 2006.230.00:55:58.04#ibcon#read 5, iclass 27, count 2 2006.230.00:55:58.04#ibcon#about to read 6, iclass 27, count 2 2006.230.00:55:58.04#ibcon#read 6, iclass 27, count 2 2006.230.00:55:58.04#ibcon#end of sib2, iclass 27, count 2 2006.230.00:55:58.04#ibcon#*after write, iclass 27, count 2 2006.230.00:55:58.04#ibcon#*before return 0, iclass 27, count 2 2006.230.00:55:58.04#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:55:58.04#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:55:58.04#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.00:55:58.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:58.04#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:55:58.16#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:55:58.16#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:55:58.16#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:55:58.16#ibcon#first serial, iclass 27, count 0 2006.230.00:55:58.16#ibcon#enter sib2, iclass 27, count 0 2006.230.00:55:58.16#ibcon#flushed, iclass 27, count 0 2006.230.00:55:58.16#ibcon#about to write, iclass 27, count 0 2006.230.00:55:58.16#ibcon#wrote, iclass 27, count 0 2006.230.00:55:58.16#ibcon#about to read 3, iclass 27, count 0 2006.230.00:55:58.18#ibcon#read 3, iclass 27, count 0 2006.230.00:55:58.18#ibcon#about to read 4, iclass 27, count 0 2006.230.00:55:58.18#ibcon#read 4, iclass 27, count 0 2006.230.00:55:58.18#ibcon#about to read 5, iclass 27, count 0 2006.230.00:55:58.18#ibcon#read 5, iclass 27, count 0 2006.230.00:55:58.18#ibcon#about to read 6, iclass 27, count 0 2006.230.00:55:58.18#ibcon#read 6, iclass 27, count 0 2006.230.00:55:58.18#ibcon#end of sib2, iclass 27, count 0 2006.230.00:55:58.18#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:55:58.18#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:55:58.18#ibcon#[25=USB\r\n] 2006.230.00:55:58.18#ibcon#*before write, iclass 27, count 0 2006.230.00:55:58.18#ibcon#enter sib2, iclass 27, count 0 2006.230.00:55:58.18#ibcon#flushed, iclass 27, count 0 2006.230.00:55:58.18#ibcon#about to write, iclass 27, count 0 2006.230.00:55:58.18#ibcon#wrote, iclass 27, count 0 2006.230.00:55:58.18#ibcon#about to read 3, iclass 27, count 0 2006.230.00:55:58.21#ibcon#read 3, iclass 27, count 0 2006.230.00:55:58.21#ibcon#about to read 4, iclass 27, count 0 2006.230.00:55:58.21#ibcon#read 4, iclass 27, count 0 2006.230.00:55:58.21#ibcon#about to read 5, iclass 27, count 0 2006.230.00:55:58.21#ibcon#read 5, iclass 27, count 0 2006.230.00:55:58.21#ibcon#about to read 6, iclass 27, count 0 2006.230.00:55:58.21#ibcon#read 6, iclass 27, count 0 2006.230.00:55:58.21#ibcon#end of sib2, iclass 27, count 0 2006.230.00:55:58.21#ibcon#*after write, iclass 27, count 0 2006.230.00:55:58.21#ibcon#*before return 0, iclass 27, count 0 2006.230.00:55:58.21#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:55:58.21#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:55:58.21#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:55:58.21#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:55:58.21$vck44/valo=4,624.99 2006.230.00:55:58.21#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.00:55:58.21#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.00:55:58.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:58.21#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:55:58.21#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:55:58.21#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:55:58.21#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:55:58.21#ibcon#first serial, iclass 29, count 0 2006.230.00:55:58.21#ibcon#enter sib2, iclass 29, count 0 2006.230.00:55:58.21#ibcon#flushed, iclass 29, count 0 2006.230.00:55:58.21#ibcon#about to write, iclass 29, count 0 2006.230.00:55:58.21#ibcon#wrote, iclass 29, count 0 2006.230.00:55:58.21#ibcon#about to read 3, iclass 29, count 0 2006.230.00:55:58.23#ibcon#read 3, iclass 29, count 0 2006.230.00:55:58.23#ibcon#about to read 4, iclass 29, count 0 2006.230.00:55:58.23#ibcon#read 4, iclass 29, count 0 2006.230.00:55:58.23#ibcon#about to read 5, iclass 29, count 0 2006.230.00:55:58.23#ibcon#read 5, iclass 29, count 0 2006.230.00:55:58.23#ibcon#about to read 6, iclass 29, count 0 2006.230.00:55:58.23#ibcon#read 6, iclass 29, count 0 2006.230.00:55:58.23#ibcon#end of sib2, iclass 29, count 0 2006.230.00:55:58.23#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:55:58.23#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:55:58.23#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.00:55:58.23#ibcon#*before write, iclass 29, count 0 2006.230.00:55:58.23#ibcon#enter sib2, iclass 29, count 0 2006.230.00:55:58.23#ibcon#flushed, iclass 29, count 0 2006.230.00:55:58.23#ibcon#about to write, iclass 29, count 0 2006.230.00:55:58.23#ibcon#wrote, iclass 29, count 0 2006.230.00:55:58.23#ibcon#about to read 3, iclass 29, count 0 2006.230.00:55:58.27#ibcon#read 3, iclass 29, count 0 2006.230.00:55:58.27#ibcon#about to read 4, iclass 29, count 0 2006.230.00:55:58.27#ibcon#read 4, iclass 29, count 0 2006.230.00:55:58.27#ibcon#about to read 5, iclass 29, count 0 2006.230.00:55:58.27#ibcon#read 5, iclass 29, count 0 2006.230.00:55:58.27#ibcon#about to read 6, iclass 29, count 0 2006.230.00:55:58.27#ibcon#read 6, iclass 29, count 0 2006.230.00:55:58.27#ibcon#end of sib2, iclass 29, count 0 2006.230.00:55:58.27#ibcon#*after write, iclass 29, count 0 2006.230.00:55:58.27#ibcon#*before return 0, iclass 29, count 0 2006.230.00:55:58.27#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:55:58.27#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:55:58.27#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:55:58.27#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:55:58.27$vck44/va=4,7 2006.230.00:55:58.27#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.00:55:58.27#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.00:55:58.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:58.27#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:55:58.33#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:55:58.33#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:55:58.33#ibcon#enter wrdev, iclass 31, count 2 2006.230.00:55:58.33#ibcon#first serial, iclass 31, count 2 2006.230.00:55:58.33#ibcon#enter sib2, iclass 31, count 2 2006.230.00:55:58.33#ibcon#flushed, iclass 31, count 2 2006.230.00:55:58.33#ibcon#about to write, iclass 31, count 2 2006.230.00:55:58.33#ibcon#wrote, iclass 31, count 2 2006.230.00:55:58.33#ibcon#about to read 3, iclass 31, count 2 2006.230.00:55:58.35#ibcon#read 3, iclass 31, count 2 2006.230.00:55:58.35#ibcon#about to read 4, iclass 31, count 2 2006.230.00:55:58.35#ibcon#read 4, iclass 31, count 2 2006.230.00:55:58.35#ibcon#about to read 5, iclass 31, count 2 2006.230.00:55:58.35#ibcon#read 5, iclass 31, count 2 2006.230.00:55:58.35#ibcon#about to read 6, iclass 31, count 2 2006.230.00:55:58.35#ibcon#read 6, iclass 31, count 2 2006.230.00:55:58.35#ibcon#end of sib2, iclass 31, count 2 2006.230.00:55:58.35#ibcon#*mode == 0, iclass 31, count 2 2006.230.00:55:58.35#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.00:55:58.35#ibcon#[25=AT04-07\r\n] 2006.230.00:55:58.35#ibcon#*before write, iclass 31, count 2 2006.230.00:55:58.35#ibcon#enter sib2, iclass 31, count 2 2006.230.00:55:58.35#ibcon#flushed, iclass 31, count 2 2006.230.00:55:58.35#ibcon#about to write, iclass 31, count 2 2006.230.00:55:58.35#ibcon#wrote, iclass 31, count 2 2006.230.00:55:58.35#ibcon#about to read 3, iclass 31, count 2 2006.230.00:55:58.38#ibcon#read 3, iclass 31, count 2 2006.230.00:55:58.38#ibcon#about to read 4, iclass 31, count 2 2006.230.00:55:58.38#ibcon#read 4, iclass 31, count 2 2006.230.00:55:58.38#ibcon#about to read 5, iclass 31, count 2 2006.230.00:55:58.38#ibcon#read 5, iclass 31, count 2 2006.230.00:55:58.38#ibcon#about to read 6, iclass 31, count 2 2006.230.00:55:58.38#ibcon#read 6, iclass 31, count 2 2006.230.00:55:58.38#ibcon#end of sib2, iclass 31, count 2 2006.230.00:55:58.38#ibcon#*after write, iclass 31, count 2 2006.230.00:55:58.38#ibcon#*before return 0, iclass 31, count 2 2006.230.00:55:58.38#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:55:58.38#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:55:58.38#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.00:55:58.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:58.38#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:55:58.50#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:55:58.50#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:55:58.50#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:55:58.50#ibcon#first serial, iclass 31, count 0 2006.230.00:55:58.50#ibcon#enter sib2, iclass 31, count 0 2006.230.00:55:58.50#ibcon#flushed, iclass 31, count 0 2006.230.00:55:58.50#ibcon#about to write, iclass 31, count 0 2006.230.00:55:58.50#ibcon#wrote, iclass 31, count 0 2006.230.00:55:58.50#ibcon#about to read 3, iclass 31, count 0 2006.230.00:55:58.52#ibcon#read 3, iclass 31, count 0 2006.230.00:55:58.52#ibcon#about to read 4, iclass 31, count 0 2006.230.00:55:58.52#ibcon#read 4, iclass 31, count 0 2006.230.00:55:58.52#ibcon#about to read 5, iclass 31, count 0 2006.230.00:55:58.52#ibcon#read 5, iclass 31, count 0 2006.230.00:55:58.52#ibcon#about to read 6, iclass 31, count 0 2006.230.00:55:58.52#ibcon#read 6, iclass 31, count 0 2006.230.00:55:58.52#ibcon#end of sib2, iclass 31, count 0 2006.230.00:55:58.52#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:55:58.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:55:58.52#ibcon#[25=USB\r\n] 2006.230.00:55:58.52#ibcon#*before write, iclass 31, count 0 2006.230.00:55:58.52#ibcon#enter sib2, iclass 31, count 0 2006.230.00:55:58.52#ibcon#flushed, iclass 31, count 0 2006.230.00:55:58.52#ibcon#about to write, iclass 31, count 0 2006.230.00:55:58.52#ibcon#wrote, iclass 31, count 0 2006.230.00:55:58.52#ibcon#about to read 3, iclass 31, count 0 2006.230.00:55:58.55#ibcon#read 3, iclass 31, count 0 2006.230.00:55:58.55#ibcon#about to read 4, iclass 31, count 0 2006.230.00:55:58.55#ibcon#read 4, iclass 31, count 0 2006.230.00:55:58.55#ibcon#about to read 5, iclass 31, count 0 2006.230.00:55:58.55#ibcon#read 5, iclass 31, count 0 2006.230.00:55:58.55#ibcon#about to read 6, iclass 31, count 0 2006.230.00:55:58.55#ibcon#read 6, iclass 31, count 0 2006.230.00:55:58.55#ibcon#end of sib2, iclass 31, count 0 2006.230.00:55:58.55#ibcon#*after write, iclass 31, count 0 2006.230.00:55:58.55#ibcon#*before return 0, iclass 31, count 0 2006.230.00:55:58.55#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:55:58.55#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:55:58.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:55:58.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:55:58.55$vck44/valo=5,734.99 2006.230.00:55:58.55#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.00:55:58.55#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.00:55:58.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:58.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:55:58.55#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:55:58.55#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:55:58.55#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:55:58.55#ibcon#first serial, iclass 33, count 0 2006.230.00:55:58.55#ibcon#enter sib2, iclass 33, count 0 2006.230.00:55:58.55#ibcon#flushed, iclass 33, count 0 2006.230.00:55:58.55#ibcon#about to write, iclass 33, count 0 2006.230.00:55:58.55#ibcon#wrote, iclass 33, count 0 2006.230.00:55:58.55#ibcon#about to read 3, iclass 33, count 0 2006.230.00:55:58.57#ibcon#read 3, iclass 33, count 0 2006.230.00:55:58.57#ibcon#about to read 4, iclass 33, count 0 2006.230.00:55:58.57#ibcon#read 4, iclass 33, count 0 2006.230.00:55:58.57#ibcon#about to read 5, iclass 33, count 0 2006.230.00:55:58.57#ibcon#read 5, iclass 33, count 0 2006.230.00:55:58.57#ibcon#about to read 6, iclass 33, count 0 2006.230.00:55:58.57#ibcon#read 6, iclass 33, count 0 2006.230.00:55:58.57#ibcon#end of sib2, iclass 33, count 0 2006.230.00:55:58.57#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:55:58.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:55:58.57#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.00:55:58.57#ibcon#*before write, iclass 33, count 0 2006.230.00:55:58.57#ibcon#enter sib2, iclass 33, count 0 2006.230.00:55:58.57#ibcon#flushed, iclass 33, count 0 2006.230.00:55:58.57#ibcon#about to write, iclass 33, count 0 2006.230.00:55:58.57#ibcon#wrote, iclass 33, count 0 2006.230.00:55:58.57#ibcon#about to read 3, iclass 33, count 0 2006.230.00:55:58.61#ibcon#read 3, iclass 33, count 0 2006.230.00:55:58.61#ibcon#about to read 4, iclass 33, count 0 2006.230.00:55:58.61#ibcon#read 4, iclass 33, count 0 2006.230.00:55:58.61#ibcon#about to read 5, iclass 33, count 0 2006.230.00:55:58.61#ibcon#read 5, iclass 33, count 0 2006.230.00:55:58.61#ibcon#about to read 6, iclass 33, count 0 2006.230.00:55:58.61#ibcon#read 6, iclass 33, count 0 2006.230.00:55:58.61#ibcon#end of sib2, iclass 33, count 0 2006.230.00:55:58.61#ibcon#*after write, iclass 33, count 0 2006.230.00:55:58.61#ibcon#*before return 0, iclass 33, count 0 2006.230.00:55:58.61#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:55:58.61#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:55:58.61#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:55:58.61#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:55:58.61$vck44/va=5,4 2006.230.00:55:58.61#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.230.00:55:58.61#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.230.00:55:58.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:58.61#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:55:58.67#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:55:58.67#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:55:58.67#ibcon#enter wrdev, iclass 35, count 2 2006.230.00:55:58.67#ibcon#first serial, iclass 35, count 2 2006.230.00:55:58.67#ibcon#enter sib2, iclass 35, count 2 2006.230.00:55:58.67#ibcon#flushed, iclass 35, count 2 2006.230.00:55:58.67#ibcon#about to write, iclass 35, count 2 2006.230.00:55:58.67#ibcon#wrote, iclass 35, count 2 2006.230.00:55:58.67#ibcon#about to read 3, iclass 35, count 2 2006.230.00:55:58.69#ibcon#read 3, iclass 35, count 2 2006.230.00:55:58.69#ibcon#about to read 4, iclass 35, count 2 2006.230.00:55:58.69#ibcon#read 4, iclass 35, count 2 2006.230.00:55:58.69#ibcon#about to read 5, iclass 35, count 2 2006.230.00:55:58.69#ibcon#read 5, iclass 35, count 2 2006.230.00:55:58.69#ibcon#about to read 6, iclass 35, count 2 2006.230.00:55:58.69#ibcon#read 6, iclass 35, count 2 2006.230.00:55:58.69#ibcon#end of sib2, iclass 35, count 2 2006.230.00:55:58.69#ibcon#*mode == 0, iclass 35, count 2 2006.230.00:55:58.69#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.230.00:55:58.69#ibcon#[25=AT05-04\r\n] 2006.230.00:55:58.69#ibcon#*before write, iclass 35, count 2 2006.230.00:55:58.69#ibcon#enter sib2, iclass 35, count 2 2006.230.00:55:58.69#ibcon#flushed, iclass 35, count 2 2006.230.00:55:58.69#ibcon#about to write, iclass 35, count 2 2006.230.00:55:58.69#ibcon#wrote, iclass 35, count 2 2006.230.00:55:58.69#ibcon#about to read 3, iclass 35, count 2 2006.230.00:55:58.72#ibcon#read 3, iclass 35, count 2 2006.230.00:55:58.72#ibcon#about to read 4, iclass 35, count 2 2006.230.00:55:58.72#ibcon#read 4, iclass 35, count 2 2006.230.00:55:58.72#ibcon#about to read 5, iclass 35, count 2 2006.230.00:55:58.72#ibcon#read 5, iclass 35, count 2 2006.230.00:55:58.72#ibcon#about to read 6, iclass 35, count 2 2006.230.00:55:58.72#ibcon#read 6, iclass 35, count 2 2006.230.00:55:58.72#ibcon#end of sib2, iclass 35, count 2 2006.230.00:55:58.72#ibcon#*after write, iclass 35, count 2 2006.230.00:55:58.72#ibcon#*before return 0, iclass 35, count 2 2006.230.00:55:58.72#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:55:58.72#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:55:58.72#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.230.00:55:58.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:58.72#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:55:58.84#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:55:58.84#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:55:58.84#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:55:58.84#ibcon#first serial, iclass 35, count 0 2006.230.00:55:58.84#ibcon#enter sib2, iclass 35, count 0 2006.230.00:55:58.84#ibcon#flushed, iclass 35, count 0 2006.230.00:55:58.84#ibcon#about to write, iclass 35, count 0 2006.230.00:55:58.84#ibcon#wrote, iclass 35, count 0 2006.230.00:55:58.84#ibcon#about to read 3, iclass 35, count 0 2006.230.00:55:58.86#ibcon#read 3, iclass 35, count 0 2006.230.00:55:58.86#ibcon#about to read 4, iclass 35, count 0 2006.230.00:55:58.86#ibcon#read 4, iclass 35, count 0 2006.230.00:55:58.86#ibcon#about to read 5, iclass 35, count 0 2006.230.00:55:58.86#ibcon#read 5, iclass 35, count 0 2006.230.00:55:58.86#ibcon#about to read 6, iclass 35, count 0 2006.230.00:55:58.86#ibcon#read 6, iclass 35, count 0 2006.230.00:55:58.86#ibcon#end of sib2, iclass 35, count 0 2006.230.00:55:58.86#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:55:58.86#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:55:58.86#ibcon#[25=USB\r\n] 2006.230.00:55:58.86#ibcon#*before write, iclass 35, count 0 2006.230.00:55:58.86#ibcon#enter sib2, iclass 35, count 0 2006.230.00:55:58.86#ibcon#flushed, iclass 35, count 0 2006.230.00:55:58.86#ibcon#about to write, iclass 35, count 0 2006.230.00:55:58.86#ibcon#wrote, iclass 35, count 0 2006.230.00:55:58.86#ibcon#about to read 3, iclass 35, count 0 2006.230.00:55:58.89#ibcon#read 3, iclass 35, count 0 2006.230.00:55:58.89#ibcon#about to read 4, iclass 35, count 0 2006.230.00:55:58.89#ibcon#read 4, iclass 35, count 0 2006.230.00:55:58.89#ibcon#about to read 5, iclass 35, count 0 2006.230.00:55:58.89#ibcon#read 5, iclass 35, count 0 2006.230.00:55:58.89#ibcon#about to read 6, iclass 35, count 0 2006.230.00:55:58.89#ibcon#read 6, iclass 35, count 0 2006.230.00:55:58.89#ibcon#end of sib2, iclass 35, count 0 2006.230.00:55:58.89#ibcon#*after write, iclass 35, count 0 2006.230.00:55:58.89#ibcon#*before return 0, iclass 35, count 0 2006.230.00:55:58.89#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:55:58.89#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:55:58.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:55:58.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:55:58.89$vck44/valo=6,814.99 2006.230.00:55:58.89#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.00:55:58.89#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.00:55:58.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:58.89#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:55:58.89#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:55:58.89#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:55:58.89#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:55:58.89#ibcon#first serial, iclass 37, count 0 2006.230.00:55:58.89#ibcon#enter sib2, iclass 37, count 0 2006.230.00:55:58.89#ibcon#flushed, iclass 37, count 0 2006.230.00:55:58.89#ibcon#about to write, iclass 37, count 0 2006.230.00:55:58.89#ibcon#wrote, iclass 37, count 0 2006.230.00:55:58.89#ibcon#about to read 3, iclass 37, count 0 2006.230.00:55:58.91#ibcon#read 3, iclass 37, count 0 2006.230.00:55:58.91#ibcon#about to read 4, iclass 37, count 0 2006.230.00:55:58.91#ibcon#read 4, iclass 37, count 0 2006.230.00:55:58.91#ibcon#about to read 5, iclass 37, count 0 2006.230.00:55:58.91#ibcon#read 5, iclass 37, count 0 2006.230.00:55:58.91#ibcon#about to read 6, iclass 37, count 0 2006.230.00:55:58.91#ibcon#read 6, iclass 37, count 0 2006.230.00:55:58.91#ibcon#end of sib2, iclass 37, count 0 2006.230.00:55:58.91#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:55:58.91#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:55:58.91#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.00:55:58.91#ibcon#*before write, iclass 37, count 0 2006.230.00:55:58.91#ibcon#enter sib2, iclass 37, count 0 2006.230.00:55:58.91#ibcon#flushed, iclass 37, count 0 2006.230.00:55:58.91#ibcon#about to write, iclass 37, count 0 2006.230.00:55:58.91#ibcon#wrote, iclass 37, count 0 2006.230.00:55:58.91#ibcon#about to read 3, iclass 37, count 0 2006.230.00:55:58.95#ibcon#read 3, iclass 37, count 0 2006.230.00:55:58.95#ibcon#about to read 4, iclass 37, count 0 2006.230.00:55:58.95#ibcon#read 4, iclass 37, count 0 2006.230.00:55:58.95#ibcon#about to read 5, iclass 37, count 0 2006.230.00:55:58.95#ibcon#read 5, iclass 37, count 0 2006.230.00:55:58.95#ibcon#about to read 6, iclass 37, count 0 2006.230.00:55:58.95#ibcon#read 6, iclass 37, count 0 2006.230.00:55:58.95#ibcon#end of sib2, iclass 37, count 0 2006.230.00:55:58.95#ibcon#*after write, iclass 37, count 0 2006.230.00:55:58.95#ibcon#*before return 0, iclass 37, count 0 2006.230.00:55:58.95#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:55:58.95#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:55:58.95#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:55:58.95#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:55:58.95$vck44/va=6,4 2006.230.00:55:58.95#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.230.00:55:58.95#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.230.00:55:58.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:58.95#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:55:59.01#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:55:59.01#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:55:59.01#ibcon#enter wrdev, iclass 39, count 2 2006.230.00:55:59.01#ibcon#first serial, iclass 39, count 2 2006.230.00:55:59.01#ibcon#enter sib2, iclass 39, count 2 2006.230.00:55:59.01#ibcon#flushed, iclass 39, count 2 2006.230.00:55:59.01#ibcon#about to write, iclass 39, count 2 2006.230.00:55:59.01#ibcon#wrote, iclass 39, count 2 2006.230.00:55:59.01#ibcon#about to read 3, iclass 39, count 2 2006.230.00:55:59.03#ibcon#read 3, iclass 39, count 2 2006.230.00:55:59.03#ibcon#about to read 4, iclass 39, count 2 2006.230.00:55:59.03#ibcon#read 4, iclass 39, count 2 2006.230.00:55:59.03#ibcon#about to read 5, iclass 39, count 2 2006.230.00:55:59.03#ibcon#read 5, iclass 39, count 2 2006.230.00:55:59.03#ibcon#about to read 6, iclass 39, count 2 2006.230.00:55:59.03#ibcon#read 6, iclass 39, count 2 2006.230.00:55:59.03#ibcon#end of sib2, iclass 39, count 2 2006.230.00:55:59.03#ibcon#*mode == 0, iclass 39, count 2 2006.230.00:55:59.03#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.230.00:55:59.03#ibcon#[25=AT06-04\r\n] 2006.230.00:55:59.03#ibcon#*before write, iclass 39, count 2 2006.230.00:55:59.03#ibcon#enter sib2, iclass 39, count 2 2006.230.00:55:59.03#ibcon#flushed, iclass 39, count 2 2006.230.00:55:59.03#ibcon#about to write, iclass 39, count 2 2006.230.00:55:59.03#ibcon#wrote, iclass 39, count 2 2006.230.00:55:59.03#ibcon#about to read 3, iclass 39, count 2 2006.230.00:55:59.06#ibcon#read 3, iclass 39, count 2 2006.230.00:55:59.06#ibcon#about to read 4, iclass 39, count 2 2006.230.00:55:59.06#ibcon#read 4, iclass 39, count 2 2006.230.00:55:59.06#ibcon#about to read 5, iclass 39, count 2 2006.230.00:55:59.06#ibcon#read 5, iclass 39, count 2 2006.230.00:55:59.06#ibcon#about to read 6, iclass 39, count 2 2006.230.00:55:59.06#ibcon#read 6, iclass 39, count 2 2006.230.00:55:59.06#ibcon#end of sib2, iclass 39, count 2 2006.230.00:55:59.06#ibcon#*after write, iclass 39, count 2 2006.230.00:55:59.06#ibcon#*before return 0, iclass 39, count 2 2006.230.00:55:59.06#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:55:59.06#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:55:59.06#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.230.00:55:59.06#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:59.06#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:55:59.18#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:55:59.18#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:55:59.18#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:55:59.18#ibcon#first serial, iclass 39, count 0 2006.230.00:55:59.18#ibcon#enter sib2, iclass 39, count 0 2006.230.00:55:59.18#ibcon#flushed, iclass 39, count 0 2006.230.00:55:59.18#ibcon#about to write, iclass 39, count 0 2006.230.00:55:59.18#ibcon#wrote, iclass 39, count 0 2006.230.00:55:59.18#ibcon#about to read 3, iclass 39, count 0 2006.230.00:55:59.20#ibcon#read 3, iclass 39, count 0 2006.230.00:55:59.20#ibcon#about to read 4, iclass 39, count 0 2006.230.00:55:59.20#ibcon#read 4, iclass 39, count 0 2006.230.00:55:59.20#ibcon#about to read 5, iclass 39, count 0 2006.230.00:55:59.20#ibcon#read 5, iclass 39, count 0 2006.230.00:55:59.20#ibcon#about to read 6, iclass 39, count 0 2006.230.00:55:59.20#ibcon#read 6, iclass 39, count 0 2006.230.00:55:59.20#ibcon#end of sib2, iclass 39, count 0 2006.230.00:55:59.20#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:55:59.20#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:55:59.20#ibcon#[25=USB\r\n] 2006.230.00:55:59.20#ibcon#*before write, iclass 39, count 0 2006.230.00:55:59.20#ibcon#enter sib2, iclass 39, count 0 2006.230.00:55:59.20#ibcon#flushed, iclass 39, count 0 2006.230.00:55:59.20#ibcon#about to write, iclass 39, count 0 2006.230.00:55:59.20#ibcon#wrote, iclass 39, count 0 2006.230.00:55:59.20#ibcon#about to read 3, iclass 39, count 0 2006.230.00:55:59.23#ibcon#read 3, iclass 39, count 0 2006.230.00:55:59.23#ibcon#about to read 4, iclass 39, count 0 2006.230.00:55:59.23#ibcon#read 4, iclass 39, count 0 2006.230.00:55:59.23#ibcon#about to read 5, iclass 39, count 0 2006.230.00:55:59.23#ibcon#read 5, iclass 39, count 0 2006.230.00:55:59.23#ibcon#about to read 6, iclass 39, count 0 2006.230.00:55:59.23#ibcon#read 6, iclass 39, count 0 2006.230.00:55:59.23#ibcon#end of sib2, iclass 39, count 0 2006.230.00:55:59.23#ibcon#*after write, iclass 39, count 0 2006.230.00:55:59.23#ibcon#*before return 0, iclass 39, count 0 2006.230.00:55:59.23#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:55:59.23#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:55:59.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:55:59.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:55:59.23$vck44/valo=7,864.99 2006.230.00:55:59.23#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.00:55:59.23#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.00:55:59.23#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:59.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:55:59.23#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:55:59.23#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:55:59.23#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:55:59.23#ibcon#first serial, iclass 3, count 0 2006.230.00:55:59.23#ibcon#enter sib2, iclass 3, count 0 2006.230.00:55:59.23#ibcon#flushed, iclass 3, count 0 2006.230.00:55:59.23#ibcon#about to write, iclass 3, count 0 2006.230.00:55:59.23#ibcon#wrote, iclass 3, count 0 2006.230.00:55:59.23#ibcon#about to read 3, iclass 3, count 0 2006.230.00:55:59.25#ibcon#read 3, iclass 3, count 0 2006.230.00:55:59.25#ibcon#about to read 4, iclass 3, count 0 2006.230.00:55:59.25#ibcon#read 4, iclass 3, count 0 2006.230.00:55:59.25#ibcon#about to read 5, iclass 3, count 0 2006.230.00:55:59.25#ibcon#read 5, iclass 3, count 0 2006.230.00:55:59.25#ibcon#about to read 6, iclass 3, count 0 2006.230.00:55:59.25#ibcon#read 6, iclass 3, count 0 2006.230.00:55:59.25#ibcon#end of sib2, iclass 3, count 0 2006.230.00:55:59.25#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:55:59.25#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:55:59.25#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.00:55:59.25#ibcon#*before write, iclass 3, count 0 2006.230.00:55:59.25#ibcon#enter sib2, iclass 3, count 0 2006.230.00:55:59.25#ibcon#flushed, iclass 3, count 0 2006.230.00:55:59.25#ibcon#about to write, iclass 3, count 0 2006.230.00:55:59.25#ibcon#wrote, iclass 3, count 0 2006.230.00:55:59.25#ibcon#about to read 3, iclass 3, count 0 2006.230.00:55:59.29#ibcon#read 3, iclass 3, count 0 2006.230.00:55:59.29#ibcon#about to read 4, iclass 3, count 0 2006.230.00:55:59.29#ibcon#read 4, iclass 3, count 0 2006.230.00:55:59.29#ibcon#about to read 5, iclass 3, count 0 2006.230.00:55:59.29#ibcon#read 5, iclass 3, count 0 2006.230.00:55:59.29#ibcon#about to read 6, iclass 3, count 0 2006.230.00:55:59.29#ibcon#read 6, iclass 3, count 0 2006.230.00:55:59.29#ibcon#end of sib2, iclass 3, count 0 2006.230.00:55:59.29#ibcon#*after write, iclass 3, count 0 2006.230.00:55:59.29#ibcon#*before return 0, iclass 3, count 0 2006.230.00:55:59.29#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:55:59.29#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:55:59.29#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:55:59.29#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:55:59.29$vck44/va=7,5 2006.230.00:55:59.29#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.00:55:59.29#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.00:55:59.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:59.29#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:55:59.35#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:55:59.35#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:55:59.35#ibcon#enter wrdev, iclass 5, count 2 2006.230.00:55:59.35#ibcon#first serial, iclass 5, count 2 2006.230.00:55:59.35#ibcon#enter sib2, iclass 5, count 2 2006.230.00:55:59.35#ibcon#flushed, iclass 5, count 2 2006.230.00:55:59.35#ibcon#about to write, iclass 5, count 2 2006.230.00:55:59.35#ibcon#wrote, iclass 5, count 2 2006.230.00:55:59.35#ibcon#about to read 3, iclass 5, count 2 2006.230.00:55:59.37#ibcon#read 3, iclass 5, count 2 2006.230.00:55:59.37#ibcon#about to read 4, iclass 5, count 2 2006.230.00:55:59.37#ibcon#read 4, iclass 5, count 2 2006.230.00:55:59.37#ibcon#about to read 5, iclass 5, count 2 2006.230.00:55:59.37#ibcon#read 5, iclass 5, count 2 2006.230.00:55:59.37#ibcon#about to read 6, iclass 5, count 2 2006.230.00:55:59.37#ibcon#read 6, iclass 5, count 2 2006.230.00:55:59.37#ibcon#end of sib2, iclass 5, count 2 2006.230.00:55:59.37#ibcon#*mode == 0, iclass 5, count 2 2006.230.00:55:59.37#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.00:55:59.37#ibcon#[25=AT07-05\r\n] 2006.230.00:55:59.37#ibcon#*before write, iclass 5, count 2 2006.230.00:55:59.37#ibcon#enter sib2, iclass 5, count 2 2006.230.00:55:59.37#ibcon#flushed, iclass 5, count 2 2006.230.00:55:59.37#ibcon#about to write, iclass 5, count 2 2006.230.00:55:59.37#ibcon#wrote, iclass 5, count 2 2006.230.00:55:59.37#ibcon#about to read 3, iclass 5, count 2 2006.230.00:55:59.40#ibcon#read 3, iclass 5, count 2 2006.230.00:55:59.40#ibcon#about to read 4, iclass 5, count 2 2006.230.00:55:59.40#ibcon#read 4, iclass 5, count 2 2006.230.00:55:59.40#ibcon#about to read 5, iclass 5, count 2 2006.230.00:55:59.40#ibcon#read 5, iclass 5, count 2 2006.230.00:55:59.40#ibcon#about to read 6, iclass 5, count 2 2006.230.00:55:59.40#ibcon#read 6, iclass 5, count 2 2006.230.00:55:59.40#ibcon#end of sib2, iclass 5, count 2 2006.230.00:55:59.40#ibcon#*after write, iclass 5, count 2 2006.230.00:55:59.40#ibcon#*before return 0, iclass 5, count 2 2006.230.00:55:59.40#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:55:59.40#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:55:59.40#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.00:55:59.40#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:59.40#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:55:59.52#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:55:59.52#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:55:59.52#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:55:59.52#ibcon#first serial, iclass 5, count 0 2006.230.00:55:59.52#ibcon#enter sib2, iclass 5, count 0 2006.230.00:55:59.52#ibcon#flushed, iclass 5, count 0 2006.230.00:55:59.52#ibcon#about to write, iclass 5, count 0 2006.230.00:55:59.52#ibcon#wrote, iclass 5, count 0 2006.230.00:55:59.52#ibcon#about to read 3, iclass 5, count 0 2006.230.00:55:59.54#ibcon#read 3, iclass 5, count 0 2006.230.00:55:59.54#ibcon#about to read 4, iclass 5, count 0 2006.230.00:55:59.54#ibcon#read 4, iclass 5, count 0 2006.230.00:55:59.54#ibcon#about to read 5, iclass 5, count 0 2006.230.00:55:59.54#ibcon#read 5, iclass 5, count 0 2006.230.00:55:59.54#ibcon#about to read 6, iclass 5, count 0 2006.230.00:55:59.54#ibcon#read 6, iclass 5, count 0 2006.230.00:55:59.54#ibcon#end of sib2, iclass 5, count 0 2006.230.00:55:59.54#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:55:59.54#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:55:59.54#ibcon#[25=USB\r\n] 2006.230.00:55:59.54#ibcon#*before write, iclass 5, count 0 2006.230.00:55:59.54#ibcon#enter sib2, iclass 5, count 0 2006.230.00:55:59.54#ibcon#flushed, iclass 5, count 0 2006.230.00:55:59.54#ibcon#about to write, iclass 5, count 0 2006.230.00:55:59.54#ibcon#wrote, iclass 5, count 0 2006.230.00:55:59.54#ibcon#about to read 3, iclass 5, count 0 2006.230.00:55:59.57#ibcon#read 3, iclass 5, count 0 2006.230.00:55:59.57#ibcon#about to read 4, iclass 5, count 0 2006.230.00:55:59.57#ibcon#read 4, iclass 5, count 0 2006.230.00:55:59.57#ibcon#about to read 5, iclass 5, count 0 2006.230.00:55:59.57#ibcon#read 5, iclass 5, count 0 2006.230.00:55:59.57#ibcon#about to read 6, iclass 5, count 0 2006.230.00:55:59.57#ibcon#read 6, iclass 5, count 0 2006.230.00:55:59.57#ibcon#end of sib2, iclass 5, count 0 2006.230.00:55:59.57#ibcon#*after write, iclass 5, count 0 2006.230.00:55:59.57#ibcon#*before return 0, iclass 5, count 0 2006.230.00:55:59.57#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:55:59.57#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:55:59.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:55:59.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:55:59.57$vck44/valo=8,884.99 2006.230.00:55:59.57#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.00:55:59.57#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.00:55:59.57#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:59.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:55:59.57#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:55:59.57#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:55:59.57#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:55:59.57#ibcon#first serial, iclass 7, count 0 2006.230.00:55:59.57#ibcon#enter sib2, iclass 7, count 0 2006.230.00:55:59.57#ibcon#flushed, iclass 7, count 0 2006.230.00:55:59.57#ibcon#about to write, iclass 7, count 0 2006.230.00:55:59.57#ibcon#wrote, iclass 7, count 0 2006.230.00:55:59.57#ibcon#about to read 3, iclass 7, count 0 2006.230.00:55:59.59#ibcon#read 3, iclass 7, count 0 2006.230.00:55:59.59#ibcon#about to read 4, iclass 7, count 0 2006.230.00:55:59.59#ibcon#read 4, iclass 7, count 0 2006.230.00:55:59.59#ibcon#about to read 5, iclass 7, count 0 2006.230.00:55:59.59#ibcon#read 5, iclass 7, count 0 2006.230.00:55:59.59#ibcon#about to read 6, iclass 7, count 0 2006.230.00:55:59.59#ibcon#read 6, iclass 7, count 0 2006.230.00:55:59.59#ibcon#end of sib2, iclass 7, count 0 2006.230.00:55:59.59#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:55:59.59#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:55:59.59#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.00:55:59.59#ibcon#*before write, iclass 7, count 0 2006.230.00:55:59.59#ibcon#enter sib2, iclass 7, count 0 2006.230.00:55:59.59#ibcon#flushed, iclass 7, count 0 2006.230.00:55:59.59#ibcon#about to write, iclass 7, count 0 2006.230.00:55:59.59#ibcon#wrote, iclass 7, count 0 2006.230.00:55:59.59#ibcon#about to read 3, iclass 7, count 0 2006.230.00:55:59.63#ibcon#read 3, iclass 7, count 0 2006.230.00:55:59.63#ibcon#about to read 4, iclass 7, count 0 2006.230.00:55:59.63#ibcon#read 4, iclass 7, count 0 2006.230.00:55:59.63#ibcon#about to read 5, iclass 7, count 0 2006.230.00:55:59.63#ibcon#read 5, iclass 7, count 0 2006.230.00:55:59.63#ibcon#about to read 6, iclass 7, count 0 2006.230.00:55:59.63#ibcon#read 6, iclass 7, count 0 2006.230.00:55:59.63#ibcon#end of sib2, iclass 7, count 0 2006.230.00:55:59.63#ibcon#*after write, iclass 7, count 0 2006.230.00:55:59.63#ibcon#*before return 0, iclass 7, count 0 2006.230.00:55:59.63#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:55:59.63#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:55:59.63#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:55:59.63#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:55:59.63$vck44/va=8,6 2006.230.00:55:59.63#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.00:55:59.63#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.00:55:59.63#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:59.63#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:55:59.69#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:55:59.69#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:55:59.69#ibcon#enter wrdev, iclass 11, count 2 2006.230.00:55:59.69#ibcon#first serial, iclass 11, count 2 2006.230.00:55:59.69#ibcon#enter sib2, iclass 11, count 2 2006.230.00:55:59.69#ibcon#flushed, iclass 11, count 2 2006.230.00:55:59.69#ibcon#about to write, iclass 11, count 2 2006.230.00:55:59.69#ibcon#wrote, iclass 11, count 2 2006.230.00:55:59.69#ibcon#about to read 3, iclass 11, count 2 2006.230.00:55:59.71#ibcon#read 3, iclass 11, count 2 2006.230.00:55:59.71#ibcon#about to read 4, iclass 11, count 2 2006.230.00:55:59.71#ibcon#read 4, iclass 11, count 2 2006.230.00:55:59.71#ibcon#about to read 5, iclass 11, count 2 2006.230.00:55:59.71#ibcon#read 5, iclass 11, count 2 2006.230.00:55:59.71#ibcon#about to read 6, iclass 11, count 2 2006.230.00:55:59.71#ibcon#read 6, iclass 11, count 2 2006.230.00:55:59.71#ibcon#end of sib2, iclass 11, count 2 2006.230.00:55:59.71#ibcon#*mode == 0, iclass 11, count 2 2006.230.00:55:59.71#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.00:55:59.71#ibcon#[25=AT08-06\r\n] 2006.230.00:55:59.71#ibcon#*before write, iclass 11, count 2 2006.230.00:55:59.71#ibcon#enter sib2, iclass 11, count 2 2006.230.00:55:59.71#ibcon#flushed, iclass 11, count 2 2006.230.00:55:59.71#ibcon#about to write, iclass 11, count 2 2006.230.00:55:59.71#ibcon#wrote, iclass 11, count 2 2006.230.00:55:59.71#ibcon#about to read 3, iclass 11, count 2 2006.230.00:55:59.74#ibcon#read 3, iclass 11, count 2 2006.230.00:55:59.74#ibcon#about to read 4, iclass 11, count 2 2006.230.00:55:59.74#ibcon#read 4, iclass 11, count 2 2006.230.00:55:59.74#ibcon#about to read 5, iclass 11, count 2 2006.230.00:55:59.74#ibcon#read 5, iclass 11, count 2 2006.230.00:55:59.74#ibcon#about to read 6, iclass 11, count 2 2006.230.00:55:59.74#ibcon#read 6, iclass 11, count 2 2006.230.00:55:59.74#ibcon#end of sib2, iclass 11, count 2 2006.230.00:55:59.74#ibcon#*after write, iclass 11, count 2 2006.230.00:55:59.74#ibcon#*before return 0, iclass 11, count 2 2006.230.00:55:59.74#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:55:59.74#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.00:55:59.74#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.00:55:59.74#ibcon#ireg 7 cls_cnt 0 2006.230.00:55:59.74#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:55:59.86#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:55:59.86#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:55:59.86#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:55:59.86#ibcon#first serial, iclass 11, count 0 2006.230.00:55:59.86#ibcon#enter sib2, iclass 11, count 0 2006.230.00:55:59.86#ibcon#flushed, iclass 11, count 0 2006.230.00:55:59.86#ibcon#about to write, iclass 11, count 0 2006.230.00:55:59.86#ibcon#wrote, iclass 11, count 0 2006.230.00:55:59.86#ibcon#about to read 3, iclass 11, count 0 2006.230.00:55:59.88#ibcon#read 3, iclass 11, count 0 2006.230.00:55:59.88#ibcon#about to read 4, iclass 11, count 0 2006.230.00:55:59.88#ibcon#read 4, iclass 11, count 0 2006.230.00:55:59.88#ibcon#about to read 5, iclass 11, count 0 2006.230.00:55:59.88#ibcon#read 5, iclass 11, count 0 2006.230.00:55:59.88#ibcon#about to read 6, iclass 11, count 0 2006.230.00:55:59.88#ibcon#read 6, iclass 11, count 0 2006.230.00:55:59.88#ibcon#end of sib2, iclass 11, count 0 2006.230.00:55:59.88#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:55:59.88#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:55:59.88#ibcon#[25=USB\r\n] 2006.230.00:55:59.88#ibcon#*before write, iclass 11, count 0 2006.230.00:55:59.88#ibcon#enter sib2, iclass 11, count 0 2006.230.00:55:59.88#ibcon#flushed, iclass 11, count 0 2006.230.00:55:59.88#ibcon#about to write, iclass 11, count 0 2006.230.00:55:59.88#ibcon#wrote, iclass 11, count 0 2006.230.00:55:59.88#ibcon#about to read 3, iclass 11, count 0 2006.230.00:55:59.91#ibcon#read 3, iclass 11, count 0 2006.230.00:55:59.91#ibcon#about to read 4, iclass 11, count 0 2006.230.00:55:59.91#ibcon#read 4, iclass 11, count 0 2006.230.00:55:59.91#ibcon#about to read 5, iclass 11, count 0 2006.230.00:55:59.91#ibcon#read 5, iclass 11, count 0 2006.230.00:55:59.91#ibcon#about to read 6, iclass 11, count 0 2006.230.00:55:59.91#ibcon#read 6, iclass 11, count 0 2006.230.00:55:59.91#ibcon#end of sib2, iclass 11, count 0 2006.230.00:55:59.91#ibcon#*after write, iclass 11, count 0 2006.230.00:55:59.91#ibcon#*before return 0, iclass 11, count 0 2006.230.00:55:59.91#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:55:59.91#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.00:55:59.91#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:55:59.91#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:55:59.91$vck44/vblo=1,629.99 2006.230.00:55:59.91#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.00:55:59.91#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.00:55:59.91#ibcon#ireg 17 cls_cnt 0 2006.230.00:55:59.91#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:55:59.91#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:55:59.91#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:55:59.91#ibcon#enter wrdev, iclass 13, count 0 2006.230.00:55:59.91#ibcon#first serial, iclass 13, count 0 2006.230.00:55:59.91#ibcon#enter sib2, iclass 13, count 0 2006.230.00:55:59.91#ibcon#flushed, iclass 13, count 0 2006.230.00:55:59.91#ibcon#about to write, iclass 13, count 0 2006.230.00:55:59.91#ibcon#wrote, iclass 13, count 0 2006.230.00:55:59.91#ibcon#about to read 3, iclass 13, count 0 2006.230.00:55:59.93#ibcon#read 3, iclass 13, count 0 2006.230.00:55:59.93#ibcon#about to read 4, iclass 13, count 0 2006.230.00:55:59.93#ibcon#read 4, iclass 13, count 0 2006.230.00:55:59.93#ibcon#about to read 5, iclass 13, count 0 2006.230.00:55:59.93#ibcon#read 5, iclass 13, count 0 2006.230.00:55:59.93#ibcon#about to read 6, iclass 13, count 0 2006.230.00:55:59.93#ibcon#read 6, iclass 13, count 0 2006.230.00:55:59.93#ibcon#end of sib2, iclass 13, count 0 2006.230.00:55:59.93#ibcon#*mode == 0, iclass 13, count 0 2006.230.00:55:59.93#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.00:55:59.93#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.00:55:59.93#ibcon#*before write, iclass 13, count 0 2006.230.00:55:59.93#ibcon#enter sib2, iclass 13, count 0 2006.230.00:55:59.93#ibcon#flushed, iclass 13, count 0 2006.230.00:55:59.93#ibcon#about to write, iclass 13, count 0 2006.230.00:55:59.93#ibcon#wrote, iclass 13, count 0 2006.230.00:55:59.93#ibcon#about to read 3, iclass 13, count 0 2006.230.00:55:59.97#ibcon#read 3, iclass 13, count 0 2006.230.00:55:59.97#ibcon#about to read 4, iclass 13, count 0 2006.230.00:55:59.97#ibcon#read 4, iclass 13, count 0 2006.230.00:55:59.97#ibcon#about to read 5, iclass 13, count 0 2006.230.00:55:59.97#ibcon#read 5, iclass 13, count 0 2006.230.00:55:59.97#ibcon#about to read 6, iclass 13, count 0 2006.230.00:55:59.97#ibcon#read 6, iclass 13, count 0 2006.230.00:55:59.97#ibcon#end of sib2, iclass 13, count 0 2006.230.00:55:59.97#ibcon#*after write, iclass 13, count 0 2006.230.00:55:59.97#ibcon#*before return 0, iclass 13, count 0 2006.230.00:55:59.97#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:55:59.97#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.00:55:59.97#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.00:55:59.97#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.00:55:59.97$vck44/vb=1,4 2006.230.00:55:59.97#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.00:55:59.97#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.00:55:59.97#ibcon#ireg 11 cls_cnt 2 2006.230.00:55:59.97#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:55:59.97#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:55:59.97#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:55:59.97#ibcon#enter wrdev, iclass 15, count 2 2006.230.00:55:59.97#ibcon#first serial, iclass 15, count 2 2006.230.00:55:59.97#ibcon#enter sib2, iclass 15, count 2 2006.230.00:55:59.97#ibcon#flushed, iclass 15, count 2 2006.230.00:55:59.97#ibcon#about to write, iclass 15, count 2 2006.230.00:55:59.97#ibcon#wrote, iclass 15, count 2 2006.230.00:55:59.97#ibcon#about to read 3, iclass 15, count 2 2006.230.00:55:59.99#ibcon#read 3, iclass 15, count 2 2006.230.00:55:59.99#ibcon#about to read 4, iclass 15, count 2 2006.230.00:55:59.99#ibcon#read 4, iclass 15, count 2 2006.230.00:55:59.99#ibcon#about to read 5, iclass 15, count 2 2006.230.00:55:59.99#ibcon#read 5, iclass 15, count 2 2006.230.00:55:59.99#ibcon#about to read 6, iclass 15, count 2 2006.230.00:55:59.99#ibcon#read 6, iclass 15, count 2 2006.230.00:55:59.99#ibcon#end of sib2, iclass 15, count 2 2006.230.00:55:59.99#ibcon#*mode == 0, iclass 15, count 2 2006.230.00:55:59.99#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.00:55:59.99#ibcon#[27=AT01-04\r\n] 2006.230.00:55:59.99#ibcon#*before write, iclass 15, count 2 2006.230.00:55:59.99#ibcon#enter sib2, iclass 15, count 2 2006.230.00:55:59.99#ibcon#flushed, iclass 15, count 2 2006.230.00:55:59.99#ibcon#about to write, iclass 15, count 2 2006.230.00:55:59.99#ibcon#wrote, iclass 15, count 2 2006.230.00:55:59.99#ibcon#about to read 3, iclass 15, count 2 2006.230.00:56:00.02#ibcon#read 3, iclass 15, count 2 2006.230.00:56:00.02#ibcon#about to read 4, iclass 15, count 2 2006.230.00:56:00.02#ibcon#read 4, iclass 15, count 2 2006.230.00:56:00.02#ibcon#about to read 5, iclass 15, count 2 2006.230.00:56:00.02#ibcon#read 5, iclass 15, count 2 2006.230.00:56:00.02#ibcon#about to read 6, iclass 15, count 2 2006.230.00:56:00.02#ibcon#read 6, iclass 15, count 2 2006.230.00:56:00.02#ibcon#end of sib2, iclass 15, count 2 2006.230.00:56:00.02#ibcon#*after write, iclass 15, count 2 2006.230.00:56:00.02#ibcon#*before return 0, iclass 15, count 2 2006.230.00:56:00.02#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:56:00.02#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.00:56:00.02#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.00:56:00.02#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:00.02#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:56:00.14#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:56:00.14#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:56:00.14#ibcon#enter wrdev, iclass 15, count 0 2006.230.00:56:00.14#ibcon#first serial, iclass 15, count 0 2006.230.00:56:00.14#ibcon#enter sib2, iclass 15, count 0 2006.230.00:56:00.14#ibcon#flushed, iclass 15, count 0 2006.230.00:56:00.14#ibcon#about to write, iclass 15, count 0 2006.230.00:56:00.14#ibcon#wrote, iclass 15, count 0 2006.230.00:56:00.14#ibcon#about to read 3, iclass 15, count 0 2006.230.00:56:00.16#ibcon#read 3, iclass 15, count 0 2006.230.00:56:00.16#ibcon#about to read 4, iclass 15, count 0 2006.230.00:56:00.16#ibcon#read 4, iclass 15, count 0 2006.230.00:56:00.16#ibcon#about to read 5, iclass 15, count 0 2006.230.00:56:00.16#ibcon#read 5, iclass 15, count 0 2006.230.00:56:00.16#ibcon#about to read 6, iclass 15, count 0 2006.230.00:56:00.16#ibcon#read 6, iclass 15, count 0 2006.230.00:56:00.16#ibcon#end of sib2, iclass 15, count 0 2006.230.00:56:00.16#ibcon#*mode == 0, iclass 15, count 0 2006.230.00:56:00.16#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.00:56:00.16#ibcon#[27=USB\r\n] 2006.230.00:56:00.16#ibcon#*before write, iclass 15, count 0 2006.230.00:56:00.16#ibcon#enter sib2, iclass 15, count 0 2006.230.00:56:00.16#ibcon#flushed, iclass 15, count 0 2006.230.00:56:00.16#ibcon#about to write, iclass 15, count 0 2006.230.00:56:00.16#ibcon#wrote, iclass 15, count 0 2006.230.00:56:00.16#ibcon#about to read 3, iclass 15, count 0 2006.230.00:56:00.19#ibcon#read 3, iclass 15, count 0 2006.230.00:56:00.19#ibcon#about to read 4, iclass 15, count 0 2006.230.00:56:00.19#ibcon#read 4, iclass 15, count 0 2006.230.00:56:00.19#ibcon#about to read 5, iclass 15, count 0 2006.230.00:56:00.19#ibcon#read 5, iclass 15, count 0 2006.230.00:56:00.19#ibcon#about to read 6, iclass 15, count 0 2006.230.00:56:00.19#ibcon#read 6, iclass 15, count 0 2006.230.00:56:00.19#ibcon#end of sib2, iclass 15, count 0 2006.230.00:56:00.19#ibcon#*after write, iclass 15, count 0 2006.230.00:56:00.19#ibcon#*before return 0, iclass 15, count 0 2006.230.00:56:00.19#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:56:00.19#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.00:56:00.19#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.00:56:00.19#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.00:56:00.19$vck44/vblo=2,634.99 2006.230.00:56:00.19#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.00:56:00.19#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.00:56:00.19#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:00.19#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:56:00.19#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:56:00.19#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:56:00.19#ibcon#enter wrdev, iclass 17, count 0 2006.230.00:56:00.19#ibcon#first serial, iclass 17, count 0 2006.230.00:56:00.19#ibcon#enter sib2, iclass 17, count 0 2006.230.00:56:00.19#ibcon#flushed, iclass 17, count 0 2006.230.00:56:00.19#ibcon#about to write, iclass 17, count 0 2006.230.00:56:00.19#ibcon#wrote, iclass 17, count 0 2006.230.00:56:00.19#ibcon#about to read 3, iclass 17, count 0 2006.230.00:56:00.21#ibcon#read 3, iclass 17, count 0 2006.230.00:56:00.21#ibcon#about to read 4, iclass 17, count 0 2006.230.00:56:00.21#ibcon#read 4, iclass 17, count 0 2006.230.00:56:00.21#ibcon#about to read 5, iclass 17, count 0 2006.230.00:56:00.21#ibcon#read 5, iclass 17, count 0 2006.230.00:56:00.21#ibcon#about to read 6, iclass 17, count 0 2006.230.00:56:00.21#ibcon#read 6, iclass 17, count 0 2006.230.00:56:00.21#ibcon#end of sib2, iclass 17, count 0 2006.230.00:56:00.21#ibcon#*mode == 0, iclass 17, count 0 2006.230.00:56:00.21#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.00:56:00.21#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.00:56:00.21#ibcon#*before write, iclass 17, count 0 2006.230.00:56:00.21#ibcon#enter sib2, iclass 17, count 0 2006.230.00:56:00.21#ibcon#flushed, iclass 17, count 0 2006.230.00:56:00.21#ibcon#about to write, iclass 17, count 0 2006.230.00:56:00.21#ibcon#wrote, iclass 17, count 0 2006.230.00:56:00.21#ibcon#about to read 3, iclass 17, count 0 2006.230.00:56:00.25#ibcon#read 3, iclass 17, count 0 2006.230.00:56:00.25#ibcon#about to read 4, iclass 17, count 0 2006.230.00:56:00.25#ibcon#read 4, iclass 17, count 0 2006.230.00:56:00.25#ibcon#about to read 5, iclass 17, count 0 2006.230.00:56:00.25#ibcon#read 5, iclass 17, count 0 2006.230.00:56:00.25#ibcon#about to read 6, iclass 17, count 0 2006.230.00:56:00.25#ibcon#read 6, iclass 17, count 0 2006.230.00:56:00.25#ibcon#end of sib2, iclass 17, count 0 2006.230.00:56:00.25#ibcon#*after write, iclass 17, count 0 2006.230.00:56:00.25#ibcon#*before return 0, iclass 17, count 0 2006.230.00:56:00.25#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:56:00.25#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.00:56:00.25#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.00:56:00.25#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.00:56:00.25$vck44/vb=2,4 2006.230.00:56:00.25#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.00:56:00.25#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.00:56:00.25#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:00.25#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:56:00.31#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:56:00.31#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:56:00.31#ibcon#enter wrdev, iclass 19, count 2 2006.230.00:56:00.31#ibcon#first serial, iclass 19, count 2 2006.230.00:56:00.31#ibcon#enter sib2, iclass 19, count 2 2006.230.00:56:00.31#ibcon#flushed, iclass 19, count 2 2006.230.00:56:00.31#ibcon#about to write, iclass 19, count 2 2006.230.00:56:00.31#ibcon#wrote, iclass 19, count 2 2006.230.00:56:00.31#ibcon#about to read 3, iclass 19, count 2 2006.230.00:56:00.33#ibcon#read 3, iclass 19, count 2 2006.230.00:56:00.33#ibcon#about to read 4, iclass 19, count 2 2006.230.00:56:00.33#ibcon#read 4, iclass 19, count 2 2006.230.00:56:00.33#ibcon#about to read 5, iclass 19, count 2 2006.230.00:56:00.33#ibcon#read 5, iclass 19, count 2 2006.230.00:56:00.33#ibcon#about to read 6, iclass 19, count 2 2006.230.00:56:00.33#ibcon#read 6, iclass 19, count 2 2006.230.00:56:00.33#ibcon#end of sib2, iclass 19, count 2 2006.230.00:56:00.33#ibcon#*mode == 0, iclass 19, count 2 2006.230.00:56:00.33#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.00:56:00.33#ibcon#[27=AT02-04\r\n] 2006.230.00:56:00.33#ibcon#*before write, iclass 19, count 2 2006.230.00:56:00.33#ibcon#enter sib2, iclass 19, count 2 2006.230.00:56:00.33#ibcon#flushed, iclass 19, count 2 2006.230.00:56:00.33#ibcon#about to write, iclass 19, count 2 2006.230.00:56:00.33#ibcon#wrote, iclass 19, count 2 2006.230.00:56:00.33#ibcon#about to read 3, iclass 19, count 2 2006.230.00:56:00.36#ibcon#read 3, iclass 19, count 2 2006.230.00:56:00.36#ibcon#about to read 4, iclass 19, count 2 2006.230.00:56:00.36#ibcon#read 4, iclass 19, count 2 2006.230.00:56:00.36#ibcon#about to read 5, iclass 19, count 2 2006.230.00:56:00.36#ibcon#read 5, iclass 19, count 2 2006.230.00:56:00.36#ibcon#about to read 6, iclass 19, count 2 2006.230.00:56:00.36#ibcon#read 6, iclass 19, count 2 2006.230.00:56:00.36#ibcon#end of sib2, iclass 19, count 2 2006.230.00:56:00.36#ibcon#*after write, iclass 19, count 2 2006.230.00:56:00.36#ibcon#*before return 0, iclass 19, count 2 2006.230.00:56:00.36#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:56:00.36#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.00:56:00.36#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.00:56:00.36#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:00.36#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:56:00.48#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:56:00.48#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:56:00.48#ibcon#enter wrdev, iclass 19, count 0 2006.230.00:56:00.48#ibcon#first serial, iclass 19, count 0 2006.230.00:56:00.48#ibcon#enter sib2, iclass 19, count 0 2006.230.00:56:00.48#ibcon#flushed, iclass 19, count 0 2006.230.00:56:00.48#ibcon#about to write, iclass 19, count 0 2006.230.00:56:00.48#ibcon#wrote, iclass 19, count 0 2006.230.00:56:00.48#ibcon#about to read 3, iclass 19, count 0 2006.230.00:56:00.50#ibcon#read 3, iclass 19, count 0 2006.230.00:56:00.50#ibcon#about to read 4, iclass 19, count 0 2006.230.00:56:00.50#ibcon#read 4, iclass 19, count 0 2006.230.00:56:00.50#ibcon#about to read 5, iclass 19, count 0 2006.230.00:56:00.50#ibcon#read 5, iclass 19, count 0 2006.230.00:56:00.50#ibcon#about to read 6, iclass 19, count 0 2006.230.00:56:00.50#ibcon#read 6, iclass 19, count 0 2006.230.00:56:00.50#ibcon#end of sib2, iclass 19, count 0 2006.230.00:56:00.50#ibcon#*mode == 0, iclass 19, count 0 2006.230.00:56:00.50#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.00:56:00.50#ibcon#[27=USB\r\n] 2006.230.00:56:00.50#ibcon#*before write, iclass 19, count 0 2006.230.00:56:00.50#ibcon#enter sib2, iclass 19, count 0 2006.230.00:56:00.50#ibcon#flushed, iclass 19, count 0 2006.230.00:56:00.50#ibcon#about to write, iclass 19, count 0 2006.230.00:56:00.50#ibcon#wrote, iclass 19, count 0 2006.230.00:56:00.50#ibcon#about to read 3, iclass 19, count 0 2006.230.00:56:00.53#ibcon#read 3, iclass 19, count 0 2006.230.00:56:00.53#ibcon#about to read 4, iclass 19, count 0 2006.230.00:56:00.53#ibcon#read 4, iclass 19, count 0 2006.230.00:56:00.53#ibcon#about to read 5, iclass 19, count 0 2006.230.00:56:00.53#ibcon#read 5, iclass 19, count 0 2006.230.00:56:00.53#ibcon#about to read 6, iclass 19, count 0 2006.230.00:56:00.53#ibcon#read 6, iclass 19, count 0 2006.230.00:56:00.53#ibcon#end of sib2, iclass 19, count 0 2006.230.00:56:00.53#ibcon#*after write, iclass 19, count 0 2006.230.00:56:00.53#ibcon#*before return 0, iclass 19, count 0 2006.230.00:56:00.53#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:56:00.53#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.00:56:00.53#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.00:56:00.53#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.00:56:00.53$vck44/vblo=3,649.99 2006.230.00:56:00.53#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.00:56:00.53#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.00:56:00.53#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:00.53#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:56:00.53#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:56:00.53#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:56:00.53#ibcon#enter wrdev, iclass 21, count 0 2006.230.00:56:00.53#ibcon#first serial, iclass 21, count 0 2006.230.00:56:00.53#ibcon#enter sib2, iclass 21, count 0 2006.230.00:56:00.53#ibcon#flushed, iclass 21, count 0 2006.230.00:56:00.53#ibcon#about to write, iclass 21, count 0 2006.230.00:56:00.53#ibcon#wrote, iclass 21, count 0 2006.230.00:56:00.53#ibcon#about to read 3, iclass 21, count 0 2006.230.00:56:00.55#ibcon#read 3, iclass 21, count 0 2006.230.00:56:00.55#ibcon#about to read 4, iclass 21, count 0 2006.230.00:56:00.55#ibcon#read 4, iclass 21, count 0 2006.230.00:56:00.55#ibcon#about to read 5, iclass 21, count 0 2006.230.00:56:00.55#ibcon#read 5, iclass 21, count 0 2006.230.00:56:00.55#ibcon#about to read 6, iclass 21, count 0 2006.230.00:56:00.55#ibcon#read 6, iclass 21, count 0 2006.230.00:56:00.55#ibcon#end of sib2, iclass 21, count 0 2006.230.00:56:00.55#ibcon#*mode == 0, iclass 21, count 0 2006.230.00:56:00.55#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.00:56:00.55#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.00:56:00.55#ibcon#*before write, iclass 21, count 0 2006.230.00:56:00.55#ibcon#enter sib2, iclass 21, count 0 2006.230.00:56:00.55#ibcon#flushed, iclass 21, count 0 2006.230.00:56:00.55#ibcon#about to write, iclass 21, count 0 2006.230.00:56:00.55#ibcon#wrote, iclass 21, count 0 2006.230.00:56:00.55#ibcon#about to read 3, iclass 21, count 0 2006.230.00:56:00.59#ibcon#read 3, iclass 21, count 0 2006.230.00:56:00.59#ibcon#about to read 4, iclass 21, count 0 2006.230.00:56:00.59#ibcon#read 4, iclass 21, count 0 2006.230.00:56:00.59#ibcon#about to read 5, iclass 21, count 0 2006.230.00:56:00.59#ibcon#read 5, iclass 21, count 0 2006.230.00:56:00.59#ibcon#about to read 6, iclass 21, count 0 2006.230.00:56:00.59#ibcon#read 6, iclass 21, count 0 2006.230.00:56:00.59#ibcon#end of sib2, iclass 21, count 0 2006.230.00:56:00.59#ibcon#*after write, iclass 21, count 0 2006.230.00:56:00.59#ibcon#*before return 0, iclass 21, count 0 2006.230.00:56:00.59#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:56:00.59#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.00:56:00.59#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.00:56:00.59#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.00:56:00.59$vck44/vb=3,4 2006.230.00:56:00.59#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.00:56:00.59#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.00:56:00.59#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:00.59#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:56:00.65#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:56:00.65#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:56:00.65#ibcon#enter wrdev, iclass 23, count 2 2006.230.00:56:00.65#ibcon#first serial, iclass 23, count 2 2006.230.00:56:00.65#ibcon#enter sib2, iclass 23, count 2 2006.230.00:56:00.65#ibcon#flushed, iclass 23, count 2 2006.230.00:56:00.65#ibcon#about to write, iclass 23, count 2 2006.230.00:56:00.65#ibcon#wrote, iclass 23, count 2 2006.230.00:56:00.65#ibcon#about to read 3, iclass 23, count 2 2006.230.00:56:00.67#ibcon#read 3, iclass 23, count 2 2006.230.00:56:00.67#ibcon#about to read 4, iclass 23, count 2 2006.230.00:56:00.67#ibcon#read 4, iclass 23, count 2 2006.230.00:56:00.67#ibcon#about to read 5, iclass 23, count 2 2006.230.00:56:00.67#ibcon#read 5, iclass 23, count 2 2006.230.00:56:00.67#ibcon#about to read 6, iclass 23, count 2 2006.230.00:56:00.67#ibcon#read 6, iclass 23, count 2 2006.230.00:56:00.67#ibcon#end of sib2, iclass 23, count 2 2006.230.00:56:00.67#ibcon#*mode == 0, iclass 23, count 2 2006.230.00:56:00.67#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.00:56:00.67#ibcon#[27=AT03-04\r\n] 2006.230.00:56:00.67#ibcon#*before write, iclass 23, count 2 2006.230.00:56:00.67#ibcon#enter sib2, iclass 23, count 2 2006.230.00:56:00.67#ibcon#flushed, iclass 23, count 2 2006.230.00:56:00.67#ibcon#about to write, iclass 23, count 2 2006.230.00:56:00.67#ibcon#wrote, iclass 23, count 2 2006.230.00:56:00.67#ibcon#about to read 3, iclass 23, count 2 2006.230.00:56:00.70#ibcon#read 3, iclass 23, count 2 2006.230.00:56:00.70#ibcon#about to read 4, iclass 23, count 2 2006.230.00:56:00.70#ibcon#read 4, iclass 23, count 2 2006.230.00:56:00.70#ibcon#about to read 5, iclass 23, count 2 2006.230.00:56:00.70#ibcon#read 5, iclass 23, count 2 2006.230.00:56:00.70#ibcon#about to read 6, iclass 23, count 2 2006.230.00:56:00.70#ibcon#read 6, iclass 23, count 2 2006.230.00:56:00.70#ibcon#end of sib2, iclass 23, count 2 2006.230.00:56:00.70#ibcon#*after write, iclass 23, count 2 2006.230.00:56:00.70#ibcon#*before return 0, iclass 23, count 2 2006.230.00:56:00.70#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:56:00.70#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.00:56:00.70#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.00:56:00.70#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:00.70#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:56:00.82#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:56:00.82#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:56:00.82#ibcon#enter wrdev, iclass 23, count 0 2006.230.00:56:00.82#ibcon#first serial, iclass 23, count 0 2006.230.00:56:00.82#ibcon#enter sib2, iclass 23, count 0 2006.230.00:56:00.82#ibcon#flushed, iclass 23, count 0 2006.230.00:56:00.82#ibcon#about to write, iclass 23, count 0 2006.230.00:56:00.82#ibcon#wrote, iclass 23, count 0 2006.230.00:56:00.82#ibcon#about to read 3, iclass 23, count 0 2006.230.00:56:00.84#ibcon#read 3, iclass 23, count 0 2006.230.00:56:00.84#ibcon#about to read 4, iclass 23, count 0 2006.230.00:56:00.84#ibcon#read 4, iclass 23, count 0 2006.230.00:56:00.84#ibcon#about to read 5, iclass 23, count 0 2006.230.00:56:00.84#ibcon#read 5, iclass 23, count 0 2006.230.00:56:00.84#ibcon#about to read 6, iclass 23, count 0 2006.230.00:56:00.84#ibcon#read 6, iclass 23, count 0 2006.230.00:56:00.84#ibcon#end of sib2, iclass 23, count 0 2006.230.00:56:00.84#ibcon#*mode == 0, iclass 23, count 0 2006.230.00:56:00.84#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.00:56:00.84#ibcon#[27=USB\r\n] 2006.230.00:56:00.84#ibcon#*before write, iclass 23, count 0 2006.230.00:56:00.84#ibcon#enter sib2, iclass 23, count 0 2006.230.00:56:00.84#ibcon#flushed, iclass 23, count 0 2006.230.00:56:00.84#ibcon#about to write, iclass 23, count 0 2006.230.00:56:00.84#ibcon#wrote, iclass 23, count 0 2006.230.00:56:00.84#ibcon#about to read 3, iclass 23, count 0 2006.230.00:56:00.87#ibcon#read 3, iclass 23, count 0 2006.230.00:56:00.87#ibcon#about to read 4, iclass 23, count 0 2006.230.00:56:00.87#ibcon#read 4, iclass 23, count 0 2006.230.00:56:00.87#ibcon#about to read 5, iclass 23, count 0 2006.230.00:56:00.87#ibcon#read 5, iclass 23, count 0 2006.230.00:56:00.87#ibcon#about to read 6, iclass 23, count 0 2006.230.00:56:00.87#ibcon#read 6, iclass 23, count 0 2006.230.00:56:00.87#ibcon#end of sib2, iclass 23, count 0 2006.230.00:56:00.87#ibcon#*after write, iclass 23, count 0 2006.230.00:56:00.87#ibcon#*before return 0, iclass 23, count 0 2006.230.00:56:00.87#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:56:00.87#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.00:56:00.87#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.00:56:00.87#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.00:56:00.87$vck44/vblo=4,679.99 2006.230.00:56:00.87#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.00:56:00.87#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.00:56:00.87#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:00.87#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:56:00.87#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:56:00.87#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:56:00.87#ibcon#enter wrdev, iclass 25, count 0 2006.230.00:56:00.87#ibcon#first serial, iclass 25, count 0 2006.230.00:56:00.87#ibcon#enter sib2, iclass 25, count 0 2006.230.00:56:00.87#ibcon#flushed, iclass 25, count 0 2006.230.00:56:00.87#ibcon#about to write, iclass 25, count 0 2006.230.00:56:00.87#ibcon#wrote, iclass 25, count 0 2006.230.00:56:00.87#ibcon#about to read 3, iclass 25, count 0 2006.230.00:56:00.89#ibcon#read 3, iclass 25, count 0 2006.230.00:56:00.89#ibcon#about to read 4, iclass 25, count 0 2006.230.00:56:00.89#ibcon#read 4, iclass 25, count 0 2006.230.00:56:00.89#ibcon#about to read 5, iclass 25, count 0 2006.230.00:56:00.89#ibcon#read 5, iclass 25, count 0 2006.230.00:56:00.89#ibcon#about to read 6, iclass 25, count 0 2006.230.00:56:00.89#ibcon#read 6, iclass 25, count 0 2006.230.00:56:00.89#ibcon#end of sib2, iclass 25, count 0 2006.230.00:56:00.89#ibcon#*mode == 0, iclass 25, count 0 2006.230.00:56:00.89#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.00:56:00.89#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.00:56:00.89#ibcon#*before write, iclass 25, count 0 2006.230.00:56:00.89#ibcon#enter sib2, iclass 25, count 0 2006.230.00:56:00.89#ibcon#flushed, iclass 25, count 0 2006.230.00:56:00.89#ibcon#about to write, iclass 25, count 0 2006.230.00:56:00.89#ibcon#wrote, iclass 25, count 0 2006.230.00:56:00.89#ibcon#about to read 3, iclass 25, count 0 2006.230.00:56:00.93#ibcon#read 3, iclass 25, count 0 2006.230.00:56:00.93#ibcon#about to read 4, iclass 25, count 0 2006.230.00:56:00.93#ibcon#read 4, iclass 25, count 0 2006.230.00:56:00.93#ibcon#about to read 5, iclass 25, count 0 2006.230.00:56:00.93#ibcon#read 5, iclass 25, count 0 2006.230.00:56:00.93#ibcon#about to read 6, iclass 25, count 0 2006.230.00:56:00.93#ibcon#read 6, iclass 25, count 0 2006.230.00:56:00.93#ibcon#end of sib2, iclass 25, count 0 2006.230.00:56:00.93#ibcon#*after write, iclass 25, count 0 2006.230.00:56:00.93#ibcon#*before return 0, iclass 25, count 0 2006.230.00:56:00.93#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:56:00.93#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.00:56:00.93#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.00:56:00.93#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.00:56:00.93$vck44/vb=4,4 2006.230.00:56:00.93#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.00:56:00.93#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.00:56:00.93#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:00.93#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:56:00.99#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:56:00.99#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:56:00.99#ibcon#enter wrdev, iclass 27, count 2 2006.230.00:56:00.99#ibcon#first serial, iclass 27, count 2 2006.230.00:56:00.99#ibcon#enter sib2, iclass 27, count 2 2006.230.00:56:00.99#ibcon#flushed, iclass 27, count 2 2006.230.00:56:00.99#ibcon#about to write, iclass 27, count 2 2006.230.00:56:00.99#ibcon#wrote, iclass 27, count 2 2006.230.00:56:00.99#ibcon#about to read 3, iclass 27, count 2 2006.230.00:56:01.01#ibcon#read 3, iclass 27, count 2 2006.230.00:56:01.01#ibcon#about to read 4, iclass 27, count 2 2006.230.00:56:01.01#ibcon#read 4, iclass 27, count 2 2006.230.00:56:01.01#ibcon#about to read 5, iclass 27, count 2 2006.230.00:56:01.01#ibcon#read 5, iclass 27, count 2 2006.230.00:56:01.01#ibcon#about to read 6, iclass 27, count 2 2006.230.00:56:01.01#ibcon#read 6, iclass 27, count 2 2006.230.00:56:01.01#ibcon#end of sib2, iclass 27, count 2 2006.230.00:56:01.01#ibcon#*mode == 0, iclass 27, count 2 2006.230.00:56:01.01#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.00:56:01.01#ibcon#[27=AT04-04\r\n] 2006.230.00:56:01.01#ibcon#*before write, iclass 27, count 2 2006.230.00:56:01.01#ibcon#enter sib2, iclass 27, count 2 2006.230.00:56:01.01#ibcon#flushed, iclass 27, count 2 2006.230.00:56:01.01#ibcon#about to write, iclass 27, count 2 2006.230.00:56:01.01#ibcon#wrote, iclass 27, count 2 2006.230.00:56:01.01#ibcon#about to read 3, iclass 27, count 2 2006.230.00:56:01.04#ibcon#read 3, iclass 27, count 2 2006.230.00:56:01.04#ibcon#about to read 4, iclass 27, count 2 2006.230.00:56:01.04#ibcon#read 4, iclass 27, count 2 2006.230.00:56:01.04#ibcon#about to read 5, iclass 27, count 2 2006.230.00:56:01.04#ibcon#read 5, iclass 27, count 2 2006.230.00:56:01.04#ibcon#about to read 6, iclass 27, count 2 2006.230.00:56:01.04#ibcon#read 6, iclass 27, count 2 2006.230.00:56:01.04#ibcon#end of sib2, iclass 27, count 2 2006.230.00:56:01.04#ibcon#*after write, iclass 27, count 2 2006.230.00:56:01.04#ibcon#*before return 0, iclass 27, count 2 2006.230.00:56:01.04#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:56:01.04#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.00:56:01.04#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.00:56:01.04#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:01.04#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:56:01.16#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:56:01.16#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:56:01.16#ibcon#enter wrdev, iclass 27, count 0 2006.230.00:56:01.16#ibcon#first serial, iclass 27, count 0 2006.230.00:56:01.16#ibcon#enter sib2, iclass 27, count 0 2006.230.00:56:01.16#ibcon#flushed, iclass 27, count 0 2006.230.00:56:01.16#ibcon#about to write, iclass 27, count 0 2006.230.00:56:01.16#ibcon#wrote, iclass 27, count 0 2006.230.00:56:01.16#ibcon#about to read 3, iclass 27, count 0 2006.230.00:56:01.18#ibcon#read 3, iclass 27, count 0 2006.230.00:56:01.18#ibcon#about to read 4, iclass 27, count 0 2006.230.00:56:01.18#ibcon#read 4, iclass 27, count 0 2006.230.00:56:01.18#ibcon#about to read 5, iclass 27, count 0 2006.230.00:56:01.18#ibcon#read 5, iclass 27, count 0 2006.230.00:56:01.18#ibcon#about to read 6, iclass 27, count 0 2006.230.00:56:01.18#ibcon#read 6, iclass 27, count 0 2006.230.00:56:01.18#ibcon#end of sib2, iclass 27, count 0 2006.230.00:56:01.18#ibcon#*mode == 0, iclass 27, count 0 2006.230.00:56:01.18#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.00:56:01.18#ibcon#[27=USB\r\n] 2006.230.00:56:01.18#ibcon#*before write, iclass 27, count 0 2006.230.00:56:01.18#ibcon#enter sib2, iclass 27, count 0 2006.230.00:56:01.18#ibcon#flushed, iclass 27, count 0 2006.230.00:56:01.18#ibcon#about to write, iclass 27, count 0 2006.230.00:56:01.18#ibcon#wrote, iclass 27, count 0 2006.230.00:56:01.18#ibcon#about to read 3, iclass 27, count 0 2006.230.00:56:01.21#ibcon#read 3, iclass 27, count 0 2006.230.00:56:01.21#ibcon#about to read 4, iclass 27, count 0 2006.230.00:56:01.21#ibcon#read 4, iclass 27, count 0 2006.230.00:56:01.21#ibcon#about to read 5, iclass 27, count 0 2006.230.00:56:01.21#ibcon#read 5, iclass 27, count 0 2006.230.00:56:01.21#ibcon#about to read 6, iclass 27, count 0 2006.230.00:56:01.21#ibcon#read 6, iclass 27, count 0 2006.230.00:56:01.21#ibcon#end of sib2, iclass 27, count 0 2006.230.00:56:01.21#ibcon#*after write, iclass 27, count 0 2006.230.00:56:01.21#ibcon#*before return 0, iclass 27, count 0 2006.230.00:56:01.21#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:56:01.21#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.00:56:01.21#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.00:56:01.21#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.00:56:01.21$vck44/vblo=5,709.99 2006.230.00:56:01.21#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.00:56:01.21#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.00:56:01.21#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:01.21#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:56:01.21#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:56:01.21#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:56:01.21#ibcon#enter wrdev, iclass 29, count 0 2006.230.00:56:01.21#ibcon#first serial, iclass 29, count 0 2006.230.00:56:01.21#ibcon#enter sib2, iclass 29, count 0 2006.230.00:56:01.21#ibcon#flushed, iclass 29, count 0 2006.230.00:56:01.21#ibcon#about to write, iclass 29, count 0 2006.230.00:56:01.21#ibcon#wrote, iclass 29, count 0 2006.230.00:56:01.21#ibcon#about to read 3, iclass 29, count 0 2006.230.00:56:01.23#ibcon#read 3, iclass 29, count 0 2006.230.00:56:01.23#ibcon#about to read 4, iclass 29, count 0 2006.230.00:56:01.23#ibcon#read 4, iclass 29, count 0 2006.230.00:56:01.23#ibcon#about to read 5, iclass 29, count 0 2006.230.00:56:01.23#ibcon#read 5, iclass 29, count 0 2006.230.00:56:01.23#ibcon#about to read 6, iclass 29, count 0 2006.230.00:56:01.23#ibcon#read 6, iclass 29, count 0 2006.230.00:56:01.23#ibcon#end of sib2, iclass 29, count 0 2006.230.00:56:01.23#ibcon#*mode == 0, iclass 29, count 0 2006.230.00:56:01.23#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.00:56:01.23#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.00:56:01.23#ibcon#*before write, iclass 29, count 0 2006.230.00:56:01.23#ibcon#enter sib2, iclass 29, count 0 2006.230.00:56:01.23#ibcon#flushed, iclass 29, count 0 2006.230.00:56:01.23#ibcon#about to write, iclass 29, count 0 2006.230.00:56:01.23#ibcon#wrote, iclass 29, count 0 2006.230.00:56:01.23#ibcon#about to read 3, iclass 29, count 0 2006.230.00:56:01.27#ibcon#read 3, iclass 29, count 0 2006.230.00:56:01.27#ibcon#about to read 4, iclass 29, count 0 2006.230.00:56:01.27#ibcon#read 4, iclass 29, count 0 2006.230.00:56:01.27#ibcon#about to read 5, iclass 29, count 0 2006.230.00:56:01.27#ibcon#read 5, iclass 29, count 0 2006.230.00:56:01.27#ibcon#about to read 6, iclass 29, count 0 2006.230.00:56:01.27#ibcon#read 6, iclass 29, count 0 2006.230.00:56:01.27#ibcon#end of sib2, iclass 29, count 0 2006.230.00:56:01.27#ibcon#*after write, iclass 29, count 0 2006.230.00:56:01.27#ibcon#*before return 0, iclass 29, count 0 2006.230.00:56:01.27#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:56:01.27#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.00:56:01.27#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.00:56:01.27#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.00:56:01.27$vck44/vb=5,4 2006.230.00:56:01.27#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.00:56:01.27#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.00:56:01.27#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:01.27#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:56:01.33#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:56:01.33#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:56:01.33#ibcon#enter wrdev, iclass 31, count 2 2006.230.00:56:01.33#ibcon#first serial, iclass 31, count 2 2006.230.00:56:01.33#ibcon#enter sib2, iclass 31, count 2 2006.230.00:56:01.33#ibcon#flushed, iclass 31, count 2 2006.230.00:56:01.33#ibcon#about to write, iclass 31, count 2 2006.230.00:56:01.33#ibcon#wrote, iclass 31, count 2 2006.230.00:56:01.33#ibcon#about to read 3, iclass 31, count 2 2006.230.00:56:01.35#ibcon#read 3, iclass 31, count 2 2006.230.00:56:01.35#ibcon#about to read 4, iclass 31, count 2 2006.230.00:56:01.35#ibcon#read 4, iclass 31, count 2 2006.230.00:56:01.35#ibcon#about to read 5, iclass 31, count 2 2006.230.00:56:01.35#ibcon#read 5, iclass 31, count 2 2006.230.00:56:01.35#ibcon#about to read 6, iclass 31, count 2 2006.230.00:56:01.35#ibcon#read 6, iclass 31, count 2 2006.230.00:56:01.35#ibcon#end of sib2, iclass 31, count 2 2006.230.00:56:01.35#ibcon#*mode == 0, iclass 31, count 2 2006.230.00:56:01.35#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.00:56:01.35#ibcon#[27=AT05-04\r\n] 2006.230.00:56:01.35#ibcon#*before write, iclass 31, count 2 2006.230.00:56:01.35#ibcon#enter sib2, iclass 31, count 2 2006.230.00:56:01.35#ibcon#flushed, iclass 31, count 2 2006.230.00:56:01.35#ibcon#about to write, iclass 31, count 2 2006.230.00:56:01.35#ibcon#wrote, iclass 31, count 2 2006.230.00:56:01.35#ibcon#about to read 3, iclass 31, count 2 2006.230.00:56:01.38#ibcon#read 3, iclass 31, count 2 2006.230.00:56:01.38#ibcon#about to read 4, iclass 31, count 2 2006.230.00:56:01.38#ibcon#read 4, iclass 31, count 2 2006.230.00:56:01.38#ibcon#about to read 5, iclass 31, count 2 2006.230.00:56:01.38#ibcon#read 5, iclass 31, count 2 2006.230.00:56:01.38#ibcon#about to read 6, iclass 31, count 2 2006.230.00:56:01.38#ibcon#read 6, iclass 31, count 2 2006.230.00:56:01.38#ibcon#end of sib2, iclass 31, count 2 2006.230.00:56:01.38#ibcon#*after write, iclass 31, count 2 2006.230.00:56:01.38#ibcon#*before return 0, iclass 31, count 2 2006.230.00:56:01.38#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:56:01.38#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.00:56:01.38#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.00:56:01.38#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:01.38#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:56:01.50#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:56:01.50#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:56:01.50#ibcon#enter wrdev, iclass 31, count 0 2006.230.00:56:01.50#ibcon#first serial, iclass 31, count 0 2006.230.00:56:01.50#ibcon#enter sib2, iclass 31, count 0 2006.230.00:56:01.50#ibcon#flushed, iclass 31, count 0 2006.230.00:56:01.50#ibcon#about to write, iclass 31, count 0 2006.230.00:56:01.50#ibcon#wrote, iclass 31, count 0 2006.230.00:56:01.50#ibcon#about to read 3, iclass 31, count 0 2006.230.00:56:01.52#ibcon#read 3, iclass 31, count 0 2006.230.00:56:01.52#ibcon#about to read 4, iclass 31, count 0 2006.230.00:56:01.52#ibcon#read 4, iclass 31, count 0 2006.230.00:56:01.52#ibcon#about to read 5, iclass 31, count 0 2006.230.00:56:01.52#ibcon#read 5, iclass 31, count 0 2006.230.00:56:01.52#ibcon#about to read 6, iclass 31, count 0 2006.230.00:56:01.52#ibcon#read 6, iclass 31, count 0 2006.230.00:56:01.52#ibcon#end of sib2, iclass 31, count 0 2006.230.00:56:01.52#ibcon#*mode == 0, iclass 31, count 0 2006.230.00:56:01.52#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.00:56:01.52#ibcon#[27=USB\r\n] 2006.230.00:56:01.52#ibcon#*before write, iclass 31, count 0 2006.230.00:56:01.52#ibcon#enter sib2, iclass 31, count 0 2006.230.00:56:01.52#ibcon#flushed, iclass 31, count 0 2006.230.00:56:01.52#ibcon#about to write, iclass 31, count 0 2006.230.00:56:01.52#ibcon#wrote, iclass 31, count 0 2006.230.00:56:01.52#ibcon#about to read 3, iclass 31, count 0 2006.230.00:56:01.55#ibcon#read 3, iclass 31, count 0 2006.230.00:56:01.55#ibcon#about to read 4, iclass 31, count 0 2006.230.00:56:01.55#ibcon#read 4, iclass 31, count 0 2006.230.00:56:01.55#ibcon#about to read 5, iclass 31, count 0 2006.230.00:56:01.55#ibcon#read 5, iclass 31, count 0 2006.230.00:56:01.55#ibcon#about to read 6, iclass 31, count 0 2006.230.00:56:01.55#ibcon#read 6, iclass 31, count 0 2006.230.00:56:01.55#ibcon#end of sib2, iclass 31, count 0 2006.230.00:56:01.55#ibcon#*after write, iclass 31, count 0 2006.230.00:56:01.55#ibcon#*before return 0, iclass 31, count 0 2006.230.00:56:01.55#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:56:01.55#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.00:56:01.55#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.00:56:01.55#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.00:56:01.55$vck44/vblo=6,719.99 2006.230.00:56:01.55#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.00:56:01.55#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.00:56:01.55#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:01.55#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:56:01.55#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:56:01.55#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:56:01.55#ibcon#enter wrdev, iclass 33, count 0 2006.230.00:56:01.55#ibcon#first serial, iclass 33, count 0 2006.230.00:56:01.55#ibcon#enter sib2, iclass 33, count 0 2006.230.00:56:01.55#ibcon#flushed, iclass 33, count 0 2006.230.00:56:01.55#ibcon#about to write, iclass 33, count 0 2006.230.00:56:01.55#ibcon#wrote, iclass 33, count 0 2006.230.00:56:01.55#ibcon#about to read 3, iclass 33, count 0 2006.230.00:56:01.57#ibcon#read 3, iclass 33, count 0 2006.230.00:56:01.57#ibcon#about to read 4, iclass 33, count 0 2006.230.00:56:01.57#ibcon#read 4, iclass 33, count 0 2006.230.00:56:01.57#ibcon#about to read 5, iclass 33, count 0 2006.230.00:56:01.57#ibcon#read 5, iclass 33, count 0 2006.230.00:56:01.57#ibcon#about to read 6, iclass 33, count 0 2006.230.00:56:01.57#ibcon#read 6, iclass 33, count 0 2006.230.00:56:01.57#ibcon#end of sib2, iclass 33, count 0 2006.230.00:56:01.57#ibcon#*mode == 0, iclass 33, count 0 2006.230.00:56:01.57#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.00:56:01.57#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.00:56:01.57#ibcon#*before write, iclass 33, count 0 2006.230.00:56:01.57#ibcon#enter sib2, iclass 33, count 0 2006.230.00:56:01.57#ibcon#flushed, iclass 33, count 0 2006.230.00:56:01.57#ibcon#about to write, iclass 33, count 0 2006.230.00:56:01.57#ibcon#wrote, iclass 33, count 0 2006.230.00:56:01.57#ibcon#about to read 3, iclass 33, count 0 2006.230.00:56:01.61#ibcon#read 3, iclass 33, count 0 2006.230.00:56:01.61#ibcon#about to read 4, iclass 33, count 0 2006.230.00:56:01.61#ibcon#read 4, iclass 33, count 0 2006.230.00:56:01.61#ibcon#about to read 5, iclass 33, count 0 2006.230.00:56:01.61#ibcon#read 5, iclass 33, count 0 2006.230.00:56:01.61#ibcon#about to read 6, iclass 33, count 0 2006.230.00:56:01.61#ibcon#read 6, iclass 33, count 0 2006.230.00:56:01.61#ibcon#end of sib2, iclass 33, count 0 2006.230.00:56:01.61#ibcon#*after write, iclass 33, count 0 2006.230.00:56:01.61#ibcon#*before return 0, iclass 33, count 0 2006.230.00:56:01.61#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:56:01.61#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.00:56:01.61#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.00:56:01.61#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.00:56:01.61$vck44/vb=6,4 2006.230.00:56:01.61#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.230.00:56:01.61#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.230.00:56:01.61#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:01.61#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:56:01.67#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:56:01.67#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:56:01.67#ibcon#enter wrdev, iclass 35, count 2 2006.230.00:56:01.67#ibcon#first serial, iclass 35, count 2 2006.230.00:56:01.67#ibcon#enter sib2, iclass 35, count 2 2006.230.00:56:01.67#ibcon#flushed, iclass 35, count 2 2006.230.00:56:01.67#ibcon#about to write, iclass 35, count 2 2006.230.00:56:01.67#ibcon#wrote, iclass 35, count 2 2006.230.00:56:01.67#ibcon#about to read 3, iclass 35, count 2 2006.230.00:56:01.69#ibcon#read 3, iclass 35, count 2 2006.230.00:56:01.69#ibcon#about to read 4, iclass 35, count 2 2006.230.00:56:01.69#ibcon#read 4, iclass 35, count 2 2006.230.00:56:01.69#ibcon#about to read 5, iclass 35, count 2 2006.230.00:56:01.69#ibcon#read 5, iclass 35, count 2 2006.230.00:56:01.69#ibcon#about to read 6, iclass 35, count 2 2006.230.00:56:01.69#ibcon#read 6, iclass 35, count 2 2006.230.00:56:01.69#ibcon#end of sib2, iclass 35, count 2 2006.230.00:56:01.69#ibcon#*mode == 0, iclass 35, count 2 2006.230.00:56:01.69#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.230.00:56:01.69#ibcon#[27=AT06-04\r\n] 2006.230.00:56:01.69#ibcon#*before write, iclass 35, count 2 2006.230.00:56:01.69#ibcon#enter sib2, iclass 35, count 2 2006.230.00:56:01.69#ibcon#flushed, iclass 35, count 2 2006.230.00:56:01.69#ibcon#about to write, iclass 35, count 2 2006.230.00:56:01.69#ibcon#wrote, iclass 35, count 2 2006.230.00:56:01.69#ibcon#about to read 3, iclass 35, count 2 2006.230.00:56:01.72#ibcon#read 3, iclass 35, count 2 2006.230.00:56:01.72#ibcon#about to read 4, iclass 35, count 2 2006.230.00:56:01.72#ibcon#read 4, iclass 35, count 2 2006.230.00:56:01.72#ibcon#about to read 5, iclass 35, count 2 2006.230.00:56:01.72#ibcon#read 5, iclass 35, count 2 2006.230.00:56:01.72#ibcon#about to read 6, iclass 35, count 2 2006.230.00:56:01.72#ibcon#read 6, iclass 35, count 2 2006.230.00:56:01.72#ibcon#end of sib2, iclass 35, count 2 2006.230.00:56:01.72#ibcon#*after write, iclass 35, count 2 2006.230.00:56:01.72#ibcon#*before return 0, iclass 35, count 2 2006.230.00:56:01.72#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:56:01.72#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.230.00:56:01.72#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.230.00:56:01.72#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:01.72#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:56:01.84#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:56:01.84#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:56:01.84#ibcon#enter wrdev, iclass 35, count 0 2006.230.00:56:01.84#ibcon#first serial, iclass 35, count 0 2006.230.00:56:01.84#ibcon#enter sib2, iclass 35, count 0 2006.230.00:56:01.84#ibcon#flushed, iclass 35, count 0 2006.230.00:56:01.84#ibcon#about to write, iclass 35, count 0 2006.230.00:56:01.84#ibcon#wrote, iclass 35, count 0 2006.230.00:56:01.84#ibcon#about to read 3, iclass 35, count 0 2006.230.00:56:01.86#ibcon#read 3, iclass 35, count 0 2006.230.00:56:01.86#ibcon#about to read 4, iclass 35, count 0 2006.230.00:56:01.86#ibcon#read 4, iclass 35, count 0 2006.230.00:56:01.86#ibcon#about to read 5, iclass 35, count 0 2006.230.00:56:01.86#ibcon#read 5, iclass 35, count 0 2006.230.00:56:01.86#ibcon#about to read 6, iclass 35, count 0 2006.230.00:56:01.86#ibcon#read 6, iclass 35, count 0 2006.230.00:56:01.86#ibcon#end of sib2, iclass 35, count 0 2006.230.00:56:01.86#ibcon#*mode == 0, iclass 35, count 0 2006.230.00:56:01.86#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.00:56:01.86#ibcon#[27=USB\r\n] 2006.230.00:56:01.86#ibcon#*before write, iclass 35, count 0 2006.230.00:56:01.86#ibcon#enter sib2, iclass 35, count 0 2006.230.00:56:01.86#ibcon#flushed, iclass 35, count 0 2006.230.00:56:01.86#ibcon#about to write, iclass 35, count 0 2006.230.00:56:01.86#ibcon#wrote, iclass 35, count 0 2006.230.00:56:01.86#ibcon#about to read 3, iclass 35, count 0 2006.230.00:56:01.89#ibcon#read 3, iclass 35, count 0 2006.230.00:56:01.89#ibcon#about to read 4, iclass 35, count 0 2006.230.00:56:01.89#ibcon#read 4, iclass 35, count 0 2006.230.00:56:01.89#ibcon#about to read 5, iclass 35, count 0 2006.230.00:56:01.89#ibcon#read 5, iclass 35, count 0 2006.230.00:56:01.89#ibcon#about to read 6, iclass 35, count 0 2006.230.00:56:01.89#ibcon#read 6, iclass 35, count 0 2006.230.00:56:01.89#ibcon#end of sib2, iclass 35, count 0 2006.230.00:56:01.89#ibcon#*after write, iclass 35, count 0 2006.230.00:56:01.89#ibcon#*before return 0, iclass 35, count 0 2006.230.00:56:01.89#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:56:01.89#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.230.00:56:01.89#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.00:56:01.89#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.00:56:01.89$vck44/vblo=7,734.99 2006.230.00:56:01.89#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.00:56:01.89#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.00:56:01.89#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:01.89#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:56:01.89#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:56:01.89#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:56:01.89#ibcon#enter wrdev, iclass 37, count 0 2006.230.00:56:01.89#ibcon#first serial, iclass 37, count 0 2006.230.00:56:01.89#ibcon#enter sib2, iclass 37, count 0 2006.230.00:56:01.89#ibcon#flushed, iclass 37, count 0 2006.230.00:56:01.89#ibcon#about to write, iclass 37, count 0 2006.230.00:56:01.89#ibcon#wrote, iclass 37, count 0 2006.230.00:56:01.89#ibcon#about to read 3, iclass 37, count 0 2006.230.00:56:01.91#ibcon#read 3, iclass 37, count 0 2006.230.00:56:01.91#ibcon#about to read 4, iclass 37, count 0 2006.230.00:56:01.91#ibcon#read 4, iclass 37, count 0 2006.230.00:56:01.91#ibcon#about to read 5, iclass 37, count 0 2006.230.00:56:01.91#ibcon#read 5, iclass 37, count 0 2006.230.00:56:01.91#ibcon#about to read 6, iclass 37, count 0 2006.230.00:56:01.91#ibcon#read 6, iclass 37, count 0 2006.230.00:56:01.91#ibcon#end of sib2, iclass 37, count 0 2006.230.00:56:01.91#ibcon#*mode == 0, iclass 37, count 0 2006.230.00:56:01.91#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.00:56:01.91#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.00:56:01.91#ibcon#*before write, iclass 37, count 0 2006.230.00:56:01.91#ibcon#enter sib2, iclass 37, count 0 2006.230.00:56:01.91#ibcon#flushed, iclass 37, count 0 2006.230.00:56:01.91#ibcon#about to write, iclass 37, count 0 2006.230.00:56:01.91#ibcon#wrote, iclass 37, count 0 2006.230.00:56:01.91#ibcon#about to read 3, iclass 37, count 0 2006.230.00:56:01.95#ibcon#read 3, iclass 37, count 0 2006.230.00:56:01.95#ibcon#about to read 4, iclass 37, count 0 2006.230.00:56:01.95#ibcon#read 4, iclass 37, count 0 2006.230.00:56:01.95#ibcon#about to read 5, iclass 37, count 0 2006.230.00:56:01.95#ibcon#read 5, iclass 37, count 0 2006.230.00:56:01.95#ibcon#about to read 6, iclass 37, count 0 2006.230.00:56:01.95#ibcon#read 6, iclass 37, count 0 2006.230.00:56:01.95#ibcon#end of sib2, iclass 37, count 0 2006.230.00:56:01.95#ibcon#*after write, iclass 37, count 0 2006.230.00:56:01.95#ibcon#*before return 0, iclass 37, count 0 2006.230.00:56:01.95#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:56:01.95#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.00:56:01.95#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.00:56:01.95#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.00:56:01.95$vck44/vb=7,4 2006.230.00:56:01.95#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.230.00:56:01.95#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.230.00:56:01.95#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:01.95#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:56:02.01#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:56:02.01#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:56:02.01#ibcon#enter wrdev, iclass 39, count 2 2006.230.00:56:02.01#ibcon#first serial, iclass 39, count 2 2006.230.00:56:02.01#ibcon#enter sib2, iclass 39, count 2 2006.230.00:56:02.01#ibcon#flushed, iclass 39, count 2 2006.230.00:56:02.01#ibcon#about to write, iclass 39, count 2 2006.230.00:56:02.01#ibcon#wrote, iclass 39, count 2 2006.230.00:56:02.01#ibcon#about to read 3, iclass 39, count 2 2006.230.00:56:02.03#ibcon#read 3, iclass 39, count 2 2006.230.00:56:02.03#ibcon#about to read 4, iclass 39, count 2 2006.230.00:56:02.03#ibcon#read 4, iclass 39, count 2 2006.230.00:56:02.03#ibcon#about to read 5, iclass 39, count 2 2006.230.00:56:02.03#ibcon#read 5, iclass 39, count 2 2006.230.00:56:02.03#ibcon#about to read 6, iclass 39, count 2 2006.230.00:56:02.03#ibcon#read 6, iclass 39, count 2 2006.230.00:56:02.03#ibcon#end of sib2, iclass 39, count 2 2006.230.00:56:02.03#ibcon#*mode == 0, iclass 39, count 2 2006.230.00:56:02.03#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.230.00:56:02.03#ibcon#[27=AT07-04\r\n] 2006.230.00:56:02.03#ibcon#*before write, iclass 39, count 2 2006.230.00:56:02.03#ibcon#enter sib2, iclass 39, count 2 2006.230.00:56:02.03#ibcon#flushed, iclass 39, count 2 2006.230.00:56:02.03#ibcon#about to write, iclass 39, count 2 2006.230.00:56:02.03#ibcon#wrote, iclass 39, count 2 2006.230.00:56:02.03#ibcon#about to read 3, iclass 39, count 2 2006.230.00:56:02.06#ibcon#read 3, iclass 39, count 2 2006.230.00:56:02.06#ibcon#about to read 4, iclass 39, count 2 2006.230.00:56:02.06#ibcon#read 4, iclass 39, count 2 2006.230.00:56:02.06#ibcon#about to read 5, iclass 39, count 2 2006.230.00:56:02.06#ibcon#read 5, iclass 39, count 2 2006.230.00:56:02.06#ibcon#about to read 6, iclass 39, count 2 2006.230.00:56:02.06#ibcon#read 6, iclass 39, count 2 2006.230.00:56:02.06#ibcon#end of sib2, iclass 39, count 2 2006.230.00:56:02.06#ibcon#*after write, iclass 39, count 2 2006.230.00:56:02.06#ibcon#*before return 0, iclass 39, count 2 2006.230.00:56:02.06#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:56:02.06#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.230.00:56:02.06#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.230.00:56:02.06#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:02.06#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:56:02.18#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:56:02.18#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:56:02.18#ibcon#enter wrdev, iclass 39, count 0 2006.230.00:56:02.18#ibcon#first serial, iclass 39, count 0 2006.230.00:56:02.18#ibcon#enter sib2, iclass 39, count 0 2006.230.00:56:02.18#ibcon#flushed, iclass 39, count 0 2006.230.00:56:02.18#ibcon#about to write, iclass 39, count 0 2006.230.00:56:02.18#ibcon#wrote, iclass 39, count 0 2006.230.00:56:02.18#ibcon#about to read 3, iclass 39, count 0 2006.230.00:56:02.20#ibcon#read 3, iclass 39, count 0 2006.230.00:56:02.20#ibcon#about to read 4, iclass 39, count 0 2006.230.00:56:02.20#ibcon#read 4, iclass 39, count 0 2006.230.00:56:02.20#ibcon#about to read 5, iclass 39, count 0 2006.230.00:56:02.20#ibcon#read 5, iclass 39, count 0 2006.230.00:56:02.20#ibcon#about to read 6, iclass 39, count 0 2006.230.00:56:02.20#ibcon#read 6, iclass 39, count 0 2006.230.00:56:02.20#ibcon#end of sib2, iclass 39, count 0 2006.230.00:56:02.20#ibcon#*mode == 0, iclass 39, count 0 2006.230.00:56:02.20#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.00:56:02.20#ibcon#[27=USB\r\n] 2006.230.00:56:02.20#ibcon#*before write, iclass 39, count 0 2006.230.00:56:02.20#ibcon#enter sib2, iclass 39, count 0 2006.230.00:56:02.20#ibcon#flushed, iclass 39, count 0 2006.230.00:56:02.20#ibcon#about to write, iclass 39, count 0 2006.230.00:56:02.20#ibcon#wrote, iclass 39, count 0 2006.230.00:56:02.20#ibcon#about to read 3, iclass 39, count 0 2006.230.00:56:02.23#ibcon#read 3, iclass 39, count 0 2006.230.00:56:02.23#ibcon#about to read 4, iclass 39, count 0 2006.230.00:56:02.23#ibcon#read 4, iclass 39, count 0 2006.230.00:56:02.23#ibcon#about to read 5, iclass 39, count 0 2006.230.00:56:02.23#ibcon#read 5, iclass 39, count 0 2006.230.00:56:02.23#ibcon#about to read 6, iclass 39, count 0 2006.230.00:56:02.23#ibcon#read 6, iclass 39, count 0 2006.230.00:56:02.23#ibcon#end of sib2, iclass 39, count 0 2006.230.00:56:02.23#ibcon#*after write, iclass 39, count 0 2006.230.00:56:02.23#ibcon#*before return 0, iclass 39, count 0 2006.230.00:56:02.23#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:56:02.23#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.230.00:56:02.23#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.00:56:02.23#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.00:56:02.23$vck44/vblo=8,744.99 2006.230.00:56:02.23#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.00:56:02.23#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.00:56:02.23#ibcon#ireg 17 cls_cnt 0 2006.230.00:56:02.23#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:56:02.23#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:56:02.23#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:56:02.23#ibcon#enter wrdev, iclass 3, count 0 2006.230.00:56:02.23#ibcon#first serial, iclass 3, count 0 2006.230.00:56:02.23#ibcon#enter sib2, iclass 3, count 0 2006.230.00:56:02.23#ibcon#flushed, iclass 3, count 0 2006.230.00:56:02.23#ibcon#about to write, iclass 3, count 0 2006.230.00:56:02.23#ibcon#wrote, iclass 3, count 0 2006.230.00:56:02.23#ibcon#about to read 3, iclass 3, count 0 2006.230.00:56:02.25#ibcon#read 3, iclass 3, count 0 2006.230.00:56:02.25#ibcon#about to read 4, iclass 3, count 0 2006.230.00:56:02.25#ibcon#read 4, iclass 3, count 0 2006.230.00:56:02.25#ibcon#about to read 5, iclass 3, count 0 2006.230.00:56:02.25#ibcon#read 5, iclass 3, count 0 2006.230.00:56:02.25#ibcon#about to read 6, iclass 3, count 0 2006.230.00:56:02.25#ibcon#read 6, iclass 3, count 0 2006.230.00:56:02.25#ibcon#end of sib2, iclass 3, count 0 2006.230.00:56:02.25#ibcon#*mode == 0, iclass 3, count 0 2006.230.00:56:02.25#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.00:56:02.25#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.00:56:02.25#ibcon#*before write, iclass 3, count 0 2006.230.00:56:02.25#ibcon#enter sib2, iclass 3, count 0 2006.230.00:56:02.25#ibcon#flushed, iclass 3, count 0 2006.230.00:56:02.25#ibcon#about to write, iclass 3, count 0 2006.230.00:56:02.25#ibcon#wrote, iclass 3, count 0 2006.230.00:56:02.25#ibcon#about to read 3, iclass 3, count 0 2006.230.00:56:02.29#ibcon#read 3, iclass 3, count 0 2006.230.00:56:02.29#ibcon#about to read 4, iclass 3, count 0 2006.230.00:56:02.29#ibcon#read 4, iclass 3, count 0 2006.230.00:56:02.29#ibcon#about to read 5, iclass 3, count 0 2006.230.00:56:02.29#ibcon#read 5, iclass 3, count 0 2006.230.00:56:02.29#ibcon#about to read 6, iclass 3, count 0 2006.230.00:56:02.29#ibcon#read 6, iclass 3, count 0 2006.230.00:56:02.29#ibcon#end of sib2, iclass 3, count 0 2006.230.00:56:02.29#ibcon#*after write, iclass 3, count 0 2006.230.00:56:02.29#ibcon#*before return 0, iclass 3, count 0 2006.230.00:56:02.29#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:56:02.29#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.00:56:02.29#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.00:56:02.29#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.00:56:02.29$vck44/vb=8,4 2006.230.00:56:02.29#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.00:56:02.29#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.00:56:02.29#ibcon#ireg 11 cls_cnt 2 2006.230.00:56:02.29#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:56:02.35#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:56:02.35#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:56:02.35#ibcon#enter wrdev, iclass 5, count 2 2006.230.00:56:02.35#ibcon#first serial, iclass 5, count 2 2006.230.00:56:02.35#ibcon#enter sib2, iclass 5, count 2 2006.230.00:56:02.35#ibcon#flushed, iclass 5, count 2 2006.230.00:56:02.35#ibcon#about to write, iclass 5, count 2 2006.230.00:56:02.35#ibcon#wrote, iclass 5, count 2 2006.230.00:56:02.35#ibcon#about to read 3, iclass 5, count 2 2006.230.00:56:02.37#ibcon#read 3, iclass 5, count 2 2006.230.00:56:02.37#ibcon#about to read 4, iclass 5, count 2 2006.230.00:56:02.37#ibcon#read 4, iclass 5, count 2 2006.230.00:56:02.37#ibcon#about to read 5, iclass 5, count 2 2006.230.00:56:02.37#ibcon#read 5, iclass 5, count 2 2006.230.00:56:02.37#ibcon#about to read 6, iclass 5, count 2 2006.230.00:56:02.37#ibcon#read 6, iclass 5, count 2 2006.230.00:56:02.37#ibcon#end of sib2, iclass 5, count 2 2006.230.00:56:02.37#ibcon#*mode == 0, iclass 5, count 2 2006.230.00:56:02.37#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.00:56:02.37#ibcon#[27=AT08-04\r\n] 2006.230.00:56:02.37#ibcon#*before write, iclass 5, count 2 2006.230.00:56:02.37#ibcon#enter sib2, iclass 5, count 2 2006.230.00:56:02.37#ibcon#flushed, iclass 5, count 2 2006.230.00:56:02.37#ibcon#about to write, iclass 5, count 2 2006.230.00:56:02.37#ibcon#wrote, iclass 5, count 2 2006.230.00:56:02.37#ibcon#about to read 3, iclass 5, count 2 2006.230.00:56:02.40#ibcon#read 3, iclass 5, count 2 2006.230.00:56:02.40#ibcon#about to read 4, iclass 5, count 2 2006.230.00:56:02.40#ibcon#read 4, iclass 5, count 2 2006.230.00:56:02.40#ibcon#about to read 5, iclass 5, count 2 2006.230.00:56:02.40#ibcon#read 5, iclass 5, count 2 2006.230.00:56:02.40#ibcon#about to read 6, iclass 5, count 2 2006.230.00:56:02.40#ibcon#read 6, iclass 5, count 2 2006.230.00:56:02.40#ibcon#end of sib2, iclass 5, count 2 2006.230.00:56:02.40#ibcon#*after write, iclass 5, count 2 2006.230.00:56:02.40#ibcon#*before return 0, iclass 5, count 2 2006.230.00:56:02.40#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:56:02.40#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.00:56:02.40#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.00:56:02.40#ibcon#ireg 7 cls_cnt 0 2006.230.00:56:02.40#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:56:02.52#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:56:02.52#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:56:02.52#ibcon#enter wrdev, iclass 5, count 0 2006.230.00:56:02.52#ibcon#first serial, iclass 5, count 0 2006.230.00:56:02.52#ibcon#enter sib2, iclass 5, count 0 2006.230.00:56:02.52#ibcon#flushed, iclass 5, count 0 2006.230.00:56:02.52#ibcon#about to write, iclass 5, count 0 2006.230.00:56:02.52#ibcon#wrote, iclass 5, count 0 2006.230.00:56:02.52#ibcon#about to read 3, iclass 5, count 0 2006.230.00:56:02.54#ibcon#read 3, iclass 5, count 0 2006.230.00:56:02.54#ibcon#about to read 4, iclass 5, count 0 2006.230.00:56:02.54#ibcon#read 4, iclass 5, count 0 2006.230.00:56:02.54#ibcon#about to read 5, iclass 5, count 0 2006.230.00:56:02.54#ibcon#read 5, iclass 5, count 0 2006.230.00:56:02.54#ibcon#about to read 6, iclass 5, count 0 2006.230.00:56:02.54#ibcon#read 6, iclass 5, count 0 2006.230.00:56:02.54#ibcon#end of sib2, iclass 5, count 0 2006.230.00:56:02.54#ibcon#*mode == 0, iclass 5, count 0 2006.230.00:56:02.54#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.00:56:02.54#ibcon#[27=USB\r\n] 2006.230.00:56:02.54#ibcon#*before write, iclass 5, count 0 2006.230.00:56:02.54#ibcon#enter sib2, iclass 5, count 0 2006.230.00:56:02.54#ibcon#flushed, iclass 5, count 0 2006.230.00:56:02.54#ibcon#about to write, iclass 5, count 0 2006.230.00:56:02.54#ibcon#wrote, iclass 5, count 0 2006.230.00:56:02.54#ibcon#about to read 3, iclass 5, count 0 2006.230.00:56:02.57#ibcon#read 3, iclass 5, count 0 2006.230.00:56:02.57#ibcon#about to read 4, iclass 5, count 0 2006.230.00:56:02.57#ibcon#read 4, iclass 5, count 0 2006.230.00:56:02.57#ibcon#about to read 5, iclass 5, count 0 2006.230.00:56:02.57#ibcon#read 5, iclass 5, count 0 2006.230.00:56:02.57#ibcon#about to read 6, iclass 5, count 0 2006.230.00:56:02.57#ibcon#read 6, iclass 5, count 0 2006.230.00:56:02.57#ibcon#end of sib2, iclass 5, count 0 2006.230.00:56:02.57#ibcon#*after write, iclass 5, count 0 2006.230.00:56:02.57#ibcon#*before return 0, iclass 5, count 0 2006.230.00:56:02.57#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:56:02.57#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.00:56:02.57#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.00:56:02.57#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.00:56:02.57$vck44/vabw=wide 2006.230.00:56:02.57#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.00:56:02.57#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.00:56:02.57#ibcon#ireg 8 cls_cnt 0 2006.230.00:56:02.57#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:56:02.57#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:56:02.57#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:56:02.57#ibcon#enter wrdev, iclass 7, count 0 2006.230.00:56:02.57#ibcon#first serial, iclass 7, count 0 2006.230.00:56:02.57#ibcon#enter sib2, iclass 7, count 0 2006.230.00:56:02.57#ibcon#flushed, iclass 7, count 0 2006.230.00:56:02.57#ibcon#about to write, iclass 7, count 0 2006.230.00:56:02.57#ibcon#wrote, iclass 7, count 0 2006.230.00:56:02.57#ibcon#about to read 3, iclass 7, count 0 2006.230.00:56:02.59#ibcon#read 3, iclass 7, count 0 2006.230.00:56:02.59#ibcon#about to read 4, iclass 7, count 0 2006.230.00:56:02.59#ibcon#read 4, iclass 7, count 0 2006.230.00:56:02.59#ibcon#about to read 5, iclass 7, count 0 2006.230.00:56:02.59#ibcon#read 5, iclass 7, count 0 2006.230.00:56:02.59#ibcon#about to read 6, iclass 7, count 0 2006.230.00:56:02.59#ibcon#read 6, iclass 7, count 0 2006.230.00:56:02.59#ibcon#end of sib2, iclass 7, count 0 2006.230.00:56:02.59#ibcon#*mode == 0, iclass 7, count 0 2006.230.00:56:02.59#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.00:56:02.59#ibcon#[25=BW32\r\n] 2006.230.00:56:02.59#ibcon#*before write, iclass 7, count 0 2006.230.00:56:02.59#ibcon#enter sib2, iclass 7, count 0 2006.230.00:56:02.59#ibcon#flushed, iclass 7, count 0 2006.230.00:56:02.59#ibcon#about to write, iclass 7, count 0 2006.230.00:56:02.59#ibcon#wrote, iclass 7, count 0 2006.230.00:56:02.59#ibcon#about to read 3, iclass 7, count 0 2006.230.00:56:02.62#ibcon#read 3, iclass 7, count 0 2006.230.00:56:02.62#ibcon#about to read 4, iclass 7, count 0 2006.230.00:56:02.62#ibcon#read 4, iclass 7, count 0 2006.230.00:56:02.62#ibcon#about to read 5, iclass 7, count 0 2006.230.00:56:02.62#ibcon#read 5, iclass 7, count 0 2006.230.00:56:02.62#ibcon#about to read 6, iclass 7, count 0 2006.230.00:56:02.62#ibcon#read 6, iclass 7, count 0 2006.230.00:56:02.62#ibcon#end of sib2, iclass 7, count 0 2006.230.00:56:02.62#ibcon#*after write, iclass 7, count 0 2006.230.00:56:02.62#ibcon#*before return 0, iclass 7, count 0 2006.230.00:56:02.62#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:56:02.62#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.00:56:02.62#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.00:56:02.62#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.00:56:02.62$vck44/vbbw=wide 2006.230.00:56:02.62#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.00:56:02.62#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.00:56:02.62#ibcon#ireg 8 cls_cnt 0 2006.230.00:56:02.62#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:56:02.69#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:56:02.69#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:56:02.69#ibcon#enter wrdev, iclass 11, count 0 2006.230.00:56:02.69#ibcon#first serial, iclass 11, count 0 2006.230.00:56:02.69#ibcon#enter sib2, iclass 11, count 0 2006.230.00:56:02.69#ibcon#flushed, iclass 11, count 0 2006.230.00:56:02.69#ibcon#about to write, iclass 11, count 0 2006.230.00:56:02.69#ibcon#wrote, iclass 11, count 0 2006.230.00:56:02.69#ibcon#about to read 3, iclass 11, count 0 2006.230.00:56:02.71#ibcon#read 3, iclass 11, count 0 2006.230.00:56:02.71#ibcon#about to read 4, iclass 11, count 0 2006.230.00:56:02.71#ibcon#read 4, iclass 11, count 0 2006.230.00:56:02.71#ibcon#about to read 5, iclass 11, count 0 2006.230.00:56:02.71#ibcon#read 5, iclass 11, count 0 2006.230.00:56:02.71#ibcon#about to read 6, iclass 11, count 0 2006.230.00:56:02.71#ibcon#read 6, iclass 11, count 0 2006.230.00:56:02.71#ibcon#end of sib2, iclass 11, count 0 2006.230.00:56:02.71#ibcon#*mode == 0, iclass 11, count 0 2006.230.00:56:02.71#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.00:56:02.71#ibcon#[27=BW32\r\n] 2006.230.00:56:02.71#ibcon#*before write, iclass 11, count 0 2006.230.00:56:02.71#ibcon#enter sib2, iclass 11, count 0 2006.230.00:56:02.71#ibcon#flushed, iclass 11, count 0 2006.230.00:56:02.71#ibcon#about to write, iclass 11, count 0 2006.230.00:56:02.71#ibcon#wrote, iclass 11, count 0 2006.230.00:56:02.71#ibcon#about to read 3, iclass 11, count 0 2006.230.00:56:02.74#ibcon#read 3, iclass 11, count 0 2006.230.00:56:02.74#ibcon#about to read 4, iclass 11, count 0 2006.230.00:56:02.74#ibcon#read 4, iclass 11, count 0 2006.230.00:56:02.74#ibcon#about to read 5, iclass 11, count 0 2006.230.00:56:02.74#ibcon#read 5, iclass 11, count 0 2006.230.00:56:02.74#ibcon#about to read 6, iclass 11, count 0 2006.230.00:56:02.74#ibcon#read 6, iclass 11, count 0 2006.230.00:56:02.74#ibcon#end of sib2, iclass 11, count 0 2006.230.00:56:02.74#ibcon#*after write, iclass 11, count 0 2006.230.00:56:02.74#ibcon#*before return 0, iclass 11, count 0 2006.230.00:56:02.74#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:56:02.74#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.00:56:02.74#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.00:56:02.74#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.00:56:02.74$setupk4/ifdk4 2006.230.00:56:02.74$ifdk4/lo= 2006.230.00:56:02.74$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.00:56:02.74$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.00:56:02.74$ifdk4/patch= 2006.230.00:56:02.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.00:56:02.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.00:56:02.74$setupk4/!*+20s 2006.230.00:56:05.61#abcon#<5=/09 2.2 6.3 32.07 711002.9\r\n> 2006.230.00:56:05.63#abcon#{5=INTERFACE CLEAR} 2006.230.00:56:05.69#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:56:15.78#abcon#<5=/09 2.2 6.3 32.07 721002.8\r\n> 2006.230.00:56:15.80#abcon#{5=INTERFACE CLEAR} 2006.230.00:56:15.86#abcon#[5=S1D000X0/0*\r\n] 2006.230.00:56:17.24$setupk4/"tpicd 2006.230.00:56:17.24$setupk4/echo=off 2006.230.00:56:17.24$setupk4/xlog=off 2006.230.00:56:17.24:!2006.230.01:01:18 2006.230.00:57:09.14#trakl#Source acquired 2006.230.00:57:11.14#flagr#flagr/antenna,acquired 2006.230.01:01:18.00:preob 2006.230.01:01:18.13/onsource/TRACKING 2006.230.01:01:18.13:!2006.230.01:01:28 2006.230.01:01:28.00:"tape 2006.230.01:01:28.00:"st=record 2006.230.01:01:28.00:data_valid=on 2006.230.01:01:28.00:midob 2006.230.01:01:29.13/onsource/TRACKING 2006.230.01:01:29.13/wx/32.23,1002.8,75 2006.230.01:01:29.18/cable/+6.3977E-03 2006.230.01:01:30.27/va/01,08,usb,yes,32,35 2006.230.01:01:30.27/va/02,07,usb,yes,35,35 2006.230.01:01:30.27/va/03,06,usb,yes,43,46 2006.230.01:01:30.27/va/04,07,usb,yes,36,38 2006.230.01:01:30.27/va/05,04,usb,yes,32,33 2006.230.01:01:30.27/va/06,04,usb,yes,36,35 2006.230.01:01:30.27/va/07,05,usb,yes,32,32 2006.230.01:01:30.27/va/08,06,usb,yes,23,28 2006.230.01:01:30.50/valo/01,524.99,yes,locked 2006.230.01:01:30.50/valo/02,534.99,yes,locked 2006.230.01:01:30.50/valo/03,564.99,yes,locked 2006.230.01:01:30.50/valo/04,624.99,yes,locked 2006.230.01:01:30.50/valo/05,734.99,yes,locked 2006.230.01:01:30.50/valo/06,814.99,yes,locked 2006.230.01:01:30.50/valo/07,864.99,yes,locked 2006.230.01:01:30.50/valo/08,884.99,yes,locked 2006.230.01:01:31.59/vb/01,04,usb,yes,39,36 2006.230.01:01:31.59/vb/02,04,usb,yes,42,41 2006.230.01:01:31.59/vb/03,04,usb,yes,38,42 2006.230.01:01:31.59/vb/04,04,usb,yes,43,42 2006.230.01:01:31.59/vb/05,04,usb,yes,34,37 2006.230.01:01:31.59/vb/06,04,usb,yes,39,35 2006.230.01:01:31.59/vb/07,04,usb,yes,39,39 2006.230.01:01:31.59/vb/08,04,usb,yes,36,40 2006.230.01:01:31.83/vblo/01,629.99,yes,locked 2006.230.01:01:31.83/vblo/02,634.99,yes,locked 2006.230.01:01:31.83/vblo/03,649.99,yes,locked 2006.230.01:01:31.83/vblo/04,679.99,yes,locked 2006.230.01:01:31.83/vblo/05,709.99,yes,locked 2006.230.01:01:31.83/vblo/06,719.99,yes,locked 2006.230.01:01:31.83/vblo/07,734.99,yes,locked 2006.230.01:01:31.83/vblo/08,744.99,yes,locked 2006.230.01:01:31.98/vabw/8 2006.230.01:01:32.13/vbbw/8 2006.230.01:01:32.31/xfe/off,on,12.2 2006.230.01:01:32.70/ifatt/23,28,28,28 2006.230.01:01:33.08/fmout-gps/S +4.52E-07 2006.230.01:01:33.12:!2006.230.01:03:38 2006.230.01:03:38.00:data_valid=off 2006.230.01:03:38.00:"et 2006.230.01:03:38.00:!+3s 2006.230.01:03:41.01:"tape 2006.230.01:03:41.01:postob 2006.230.01:03:41.11/cable/+6.3973E-03 2006.230.01:03:41.11/wx/32.33,1002.8,75 2006.230.01:03:42.08/fmout-gps/S +4.53E-07 2006.230.01:03:42.08:scan_name=230-0107,jd0608,60 2006.230.01:03:42.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.230.01:03:43.14#flagr#flagr/antenna,new-source 2006.230.01:03:43.14:checkk5 2006.230.01:03:43.50/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:03:43.91/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:03:44.34/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:03:44.76/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:03:45.14/chk_obsdata//k5ts1/T2300101??a.dat file size is correct (nominal:520MB, actual:516MB). 2006.230.01:03:45.55/chk_obsdata//k5ts2/T2300101??b.dat file size is correct (nominal:520MB, actual:516MB). 2006.230.01:03:45.95/chk_obsdata//k5ts3/T2300101??c.dat file size is correct (nominal:520MB, actual:516MB). 2006.230.01:03:46.36/chk_obsdata//k5ts4/T2300101??d.dat file size is correct (nominal:520MB, actual:516MB). 2006.230.01:03:47.09/k5log//k5ts1_log_newline 2006.230.01:03:47.82/k5log//k5ts2_log_newline 2006.230.01:03:48.54/k5log//k5ts3_log_newline 2006.230.01:03:49.25/k5log//k5ts4_log_newline 2006.230.01:03:49.28/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:03:49.28:setupk4=1 2006.230.01:03:49.28$setupk4/echo=on 2006.230.01:03:49.28$setupk4/pcalon 2006.230.01:03:49.28$pcalon/"no phase cal control is implemented here 2006.230.01:03:49.28$setupk4/"tpicd=stop 2006.230.01:03:49.28$setupk4/"rec=synch_on 2006.230.01:03:49.28$setupk4/"rec_mode=128 2006.230.01:03:49.28$setupk4/!* 2006.230.01:03:49.28$setupk4/recpk4 2006.230.01:03:49.28$recpk4/recpatch= 2006.230.01:03:49.28$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:03:49.28$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:03:49.28$setupk4/vck44 2006.230.01:03:49.28$vck44/valo=1,524.99 2006.230.01:03:49.28#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.01:03:49.28#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.01:03:49.28#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:49.28#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:49.28#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:49.28#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:49.28#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:03:49.28#ibcon#first serial, iclass 20, count 0 2006.230.01:03:49.28#ibcon#enter sib2, iclass 20, count 0 2006.230.01:03:49.28#ibcon#flushed, iclass 20, count 0 2006.230.01:03:49.28#ibcon#about to write, iclass 20, count 0 2006.230.01:03:49.28#ibcon#wrote, iclass 20, count 0 2006.230.01:03:49.28#ibcon#about to read 3, iclass 20, count 0 2006.230.01:03:49.30#ibcon#read 3, iclass 20, count 0 2006.230.01:03:49.30#ibcon#about to read 4, iclass 20, count 0 2006.230.01:03:49.30#ibcon#read 4, iclass 20, count 0 2006.230.01:03:49.30#ibcon#about to read 5, iclass 20, count 0 2006.230.01:03:49.30#ibcon#read 5, iclass 20, count 0 2006.230.01:03:49.30#ibcon#about to read 6, iclass 20, count 0 2006.230.01:03:49.30#ibcon#read 6, iclass 20, count 0 2006.230.01:03:49.30#ibcon#end of sib2, iclass 20, count 0 2006.230.01:03:49.30#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:03:49.30#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:03:49.30#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:03:49.30#ibcon#*before write, iclass 20, count 0 2006.230.01:03:49.30#ibcon#enter sib2, iclass 20, count 0 2006.230.01:03:49.30#ibcon#flushed, iclass 20, count 0 2006.230.01:03:49.30#ibcon#about to write, iclass 20, count 0 2006.230.01:03:49.30#ibcon#wrote, iclass 20, count 0 2006.230.01:03:49.30#ibcon#about to read 3, iclass 20, count 0 2006.230.01:03:49.35#ibcon#read 3, iclass 20, count 0 2006.230.01:03:49.35#ibcon#about to read 4, iclass 20, count 0 2006.230.01:03:49.35#ibcon#read 4, iclass 20, count 0 2006.230.01:03:49.35#ibcon#about to read 5, iclass 20, count 0 2006.230.01:03:49.35#ibcon#read 5, iclass 20, count 0 2006.230.01:03:49.35#ibcon#about to read 6, iclass 20, count 0 2006.230.01:03:49.35#ibcon#read 6, iclass 20, count 0 2006.230.01:03:49.35#ibcon#end of sib2, iclass 20, count 0 2006.230.01:03:49.35#ibcon#*after write, iclass 20, count 0 2006.230.01:03:49.35#ibcon#*before return 0, iclass 20, count 0 2006.230.01:03:49.35#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:49.35#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:49.35#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:03:49.35#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:03:49.35$vck44/va=1,8 2006.230.01:03:49.35#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.01:03:49.35#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.01:03:49.35#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:49.35#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:49.35#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:49.35#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:49.35#ibcon#enter wrdev, iclass 22, count 2 2006.230.01:03:49.35#ibcon#first serial, iclass 22, count 2 2006.230.01:03:49.35#ibcon#enter sib2, iclass 22, count 2 2006.230.01:03:49.35#ibcon#flushed, iclass 22, count 2 2006.230.01:03:49.35#ibcon#about to write, iclass 22, count 2 2006.230.01:03:49.35#ibcon#wrote, iclass 22, count 2 2006.230.01:03:49.35#ibcon#about to read 3, iclass 22, count 2 2006.230.01:03:49.37#ibcon#read 3, iclass 22, count 2 2006.230.01:03:49.37#ibcon#about to read 4, iclass 22, count 2 2006.230.01:03:49.37#ibcon#read 4, iclass 22, count 2 2006.230.01:03:49.37#ibcon#about to read 5, iclass 22, count 2 2006.230.01:03:49.37#ibcon#read 5, iclass 22, count 2 2006.230.01:03:49.37#ibcon#about to read 6, iclass 22, count 2 2006.230.01:03:49.37#ibcon#read 6, iclass 22, count 2 2006.230.01:03:49.37#ibcon#end of sib2, iclass 22, count 2 2006.230.01:03:49.37#ibcon#*mode == 0, iclass 22, count 2 2006.230.01:03:49.37#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.01:03:49.37#ibcon#[25=AT01-08\r\n] 2006.230.01:03:49.37#ibcon#*before write, iclass 22, count 2 2006.230.01:03:49.37#ibcon#enter sib2, iclass 22, count 2 2006.230.01:03:49.37#ibcon#flushed, iclass 22, count 2 2006.230.01:03:49.37#ibcon#about to write, iclass 22, count 2 2006.230.01:03:49.37#ibcon#wrote, iclass 22, count 2 2006.230.01:03:49.37#ibcon#about to read 3, iclass 22, count 2 2006.230.01:03:49.40#ibcon#read 3, iclass 22, count 2 2006.230.01:03:49.40#ibcon#about to read 4, iclass 22, count 2 2006.230.01:03:49.40#ibcon#read 4, iclass 22, count 2 2006.230.01:03:49.40#ibcon#about to read 5, iclass 22, count 2 2006.230.01:03:49.40#ibcon#read 5, iclass 22, count 2 2006.230.01:03:49.40#ibcon#about to read 6, iclass 22, count 2 2006.230.01:03:49.40#ibcon#read 6, iclass 22, count 2 2006.230.01:03:49.40#ibcon#end of sib2, iclass 22, count 2 2006.230.01:03:49.40#ibcon#*after write, iclass 22, count 2 2006.230.01:03:49.40#ibcon#*before return 0, iclass 22, count 2 2006.230.01:03:49.40#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:49.40#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:49.40#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.01:03:49.40#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:49.40#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:49.52#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:49.52#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:49.52#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:03:49.52#ibcon#first serial, iclass 22, count 0 2006.230.01:03:49.52#ibcon#enter sib2, iclass 22, count 0 2006.230.01:03:49.52#ibcon#flushed, iclass 22, count 0 2006.230.01:03:49.52#ibcon#about to write, iclass 22, count 0 2006.230.01:03:49.52#ibcon#wrote, iclass 22, count 0 2006.230.01:03:49.52#ibcon#about to read 3, iclass 22, count 0 2006.230.01:03:49.54#ibcon#read 3, iclass 22, count 0 2006.230.01:03:49.54#ibcon#about to read 4, iclass 22, count 0 2006.230.01:03:49.54#ibcon#read 4, iclass 22, count 0 2006.230.01:03:49.54#ibcon#about to read 5, iclass 22, count 0 2006.230.01:03:49.54#ibcon#read 5, iclass 22, count 0 2006.230.01:03:49.54#ibcon#about to read 6, iclass 22, count 0 2006.230.01:03:49.54#ibcon#read 6, iclass 22, count 0 2006.230.01:03:49.54#ibcon#end of sib2, iclass 22, count 0 2006.230.01:03:49.54#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:03:49.54#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:03:49.54#ibcon#[25=USB\r\n] 2006.230.01:03:49.54#ibcon#*before write, iclass 22, count 0 2006.230.01:03:49.54#ibcon#enter sib2, iclass 22, count 0 2006.230.01:03:49.54#ibcon#flushed, iclass 22, count 0 2006.230.01:03:49.54#ibcon#about to write, iclass 22, count 0 2006.230.01:03:49.54#ibcon#wrote, iclass 22, count 0 2006.230.01:03:49.54#ibcon#about to read 3, iclass 22, count 0 2006.230.01:03:49.57#ibcon#read 3, iclass 22, count 0 2006.230.01:03:49.57#ibcon#about to read 4, iclass 22, count 0 2006.230.01:03:49.57#ibcon#read 4, iclass 22, count 0 2006.230.01:03:49.57#ibcon#about to read 5, iclass 22, count 0 2006.230.01:03:49.57#ibcon#read 5, iclass 22, count 0 2006.230.01:03:49.57#ibcon#about to read 6, iclass 22, count 0 2006.230.01:03:49.57#ibcon#read 6, iclass 22, count 0 2006.230.01:03:49.57#ibcon#end of sib2, iclass 22, count 0 2006.230.01:03:49.57#ibcon#*after write, iclass 22, count 0 2006.230.01:03:49.57#ibcon#*before return 0, iclass 22, count 0 2006.230.01:03:49.57#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:49.57#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:49.57#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:03:49.57#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:03:49.57$vck44/valo=2,534.99 2006.230.01:03:49.57#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.01:03:49.57#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.01:03:49.57#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:49.57#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:49.57#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:49.57#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:49.57#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:03:49.57#ibcon#first serial, iclass 24, count 0 2006.230.01:03:49.57#ibcon#enter sib2, iclass 24, count 0 2006.230.01:03:49.57#ibcon#flushed, iclass 24, count 0 2006.230.01:03:49.57#ibcon#about to write, iclass 24, count 0 2006.230.01:03:49.57#ibcon#wrote, iclass 24, count 0 2006.230.01:03:49.57#ibcon#about to read 3, iclass 24, count 0 2006.230.01:03:49.59#ibcon#read 3, iclass 24, count 0 2006.230.01:03:49.59#ibcon#about to read 4, iclass 24, count 0 2006.230.01:03:49.59#ibcon#read 4, iclass 24, count 0 2006.230.01:03:49.59#ibcon#about to read 5, iclass 24, count 0 2006.230.01:03:49.59#ibcon#read 5, iclass 24, count 0 2006.230.01:03:49.59#ibcon#about to read 6, iclass 24, count 0 2006.230.01:03:49.59#ibcon#read 6, iclass 24, count 0 2006.230.01:03:49.59#ibcon#end of sib2, iclass 24, count 0 2006.230.01:03:49.59#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:03:49.59#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:03:49.59#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:03:49.59#ibcon#*before write, iclass 24, count 0 2006.230.01:03:49.59#ibcon#enter sib2, iclass 24, count 0 2006.230.01:03:49.59#ibcon#flushed, iclass 24, count 0 2006.230.01:03:49.59#ibcon#about to write, iclass 24, count 0 2006.230.01:03:49.59#ibcon#wrote, iclass 24, count 0 2006.230.01:03:49.59#ibcon#about to read 3, iclass 24, count 0 2006.230.01:03:49.63#ibcon#read 3, iclass 24, count 0 2006.230.01:03:49.63#ibcon#about to read 4, iclass 24, count 0 2006.230.01:03:49.63#ibcon#read 4, iclass 24, count 0 2006.230.01:03:49.63#ibcon#about to read 5, iclass 24, count 0 2006.230.01:03:49.63#ibcon#read 5, iclass 24, count 0 2006.230.01:03:49.63#ibcon#about to read 6, iclass 24, count 0 2006.230.01:03:49.63#ibcon#read 6, iclass 24, count 0 2006.230.01:03:49.63#ibcon#end of sib2, iclass 24, count 0 2006.230.01:03:49.63#ibcon#*after write, iclass 24, count 0 2006.230.01:03:49.63#ibcon#*before return 0, iclass 24, count 0 2006.230.01:03:49.63#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:49.63#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:49.63#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:03:49.63#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:03:49.63$vck44/va=2,7 2006.230.01:03:49.63#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.01:03:49.63#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.01:03:49.63#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:49.63#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:49.69#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:49.69#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:49.69#ibcon#enter wrdev, iclass 26, count 2 2006.230.01:03:49.69#ibcon#first serial, iclass 26, count 2 2006.230.01:03:49.69#ibcon#enter sib2, iclass 26, count 2 2006.230.01:03:49.69#ibcon#flushed, iclass 26, count 2 2006.230.01:03:49.69#ibcon#about to write, iclass 26, count 2 2006.230.01:03:49.69#ibcon#wrote, iclass 26, count 2 2006.230.01:03:49.69#ibcon#about to read 3, iclass 26, count 2 2006.230.01:03:49.71#ibcon#read 3, iclass 26, count 2 2006.230.01:03:49.71#ibcon#about to read 4, iclass 26, count 2 2006.230.01:03:49.71#ibcon#read 4, iclass 26, count 2 2006.230.01:03:49.71#ibcon#about to read 5, iclass 26, count 2 2006.230.01:03:49.71#ibcon#read 5, iclass 26, count 2 2006.230.01:03:49.71#ibcon#about to read 6, iclass 26, count 2 2006.230.01:03:49.71#ibcon#read 6, iclass 26, count 2 2006.230.01:03:49.71#ibcon#end of sib2, iclass 26, count 2 2006.230.01:03:49.71#ibcon#*mode == 0, iclass 26, count 2 2006.230.01:03:49.71#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.01:03:49.71#ibcon#[25=AT02-07\r\n] 2006.230.01:03:49.71#ibcon#*before write, iclass 26, count 2 2006.230.01:03:49.71#ibcon#enter sib2, iclass 26, count 2 2006.230.01:03:49.71#ibcon#flushed, iclass 26, count 2 2006.230.01:03:49.71#ibcon#about to write, iclass 26, count 2 2006.230.01:03:49.71#ibcon#wrote, iclass 26, count 2 2006.230.01:03:49.71#ibcon#about to read 3, iclass 26, count 2 2006.230.01:03:49.74#ibcon#read 3, iclass 26, count 2 2006.230.01:03:49.74#ibcon#about to read 4, iclass 26, count 2 2006.230.01:03:49.74#ibcon#read 4, iclass 26, count 2 2006.230.01:03:49.74#ibcon#about to read 5, iclass 26, count 2 2006.230.01:03:49.74#ibcon#read 5, iclass 26, count 2 2006.230.01:03:49.74#ibcon#about to read 6, iclass 26, count 2 2006.230.01:03:49.74#ibcon#read 6, iclass 26, count 2 2006.230.01:03:49.74#ibcon#end of sib2, iclass 26, count 2 2006.230.01:03:49.74#ibcon#*after write, iclass 26, count 2 2006.230.01:03:49.74#ibcon#*before return 0, iclass 26, count 2 2006.230.01:03:49.74#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:49.74#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:49.74#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.01:03:49.74#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:49.74#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:49.86#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:49.86#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:49.86#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:03:49.86#ibcon#first serial, iclass 26, count 0 2006.230.01:03:49.86#ibcon#enter sib2, iclass 26, count 0 2006.230.01:03:49.86#ibcon#flushed, iclass 26, count 0 2006.230.01:03:49.86#ibcon#about to write, iclass 26, count 0 2006.230.01:03:49.86#ibcon#wrote, iclass 26, count 0 2006.230.01:03:49.86#ibcon#about to read 3, iclass 26, count 0 2006.230.01:03:49.88#ibcon#read 3, iclass 26, count 0 2006.230.01:03:49.88#ibcon#about to read 4, iclass 26, count 0 2006.230.01:03:49.88#ibcon#read 4, iclass 26, count 0 2006.230.01:03:49.88#ibcon#about to read 5, iclass 26, count 0 2006.230.01:03:49.88#ibcon#read 5, iclass 26, count 0 2006.230.01:03:49.88#ibcon#about to read 6, iclass 26, count 0 2006.230.01:03:49.88#ibcon#read 6, iclass 26, count 0 2006.230.01:03:49.88#ibcon#end of sib2, iclass 26, count 0 2006.230.01:03:49.88#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:03:49.88#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:03:49.88#ibcon#[25=USB\r\n] 2006.230.01:03:49.88#ibcon#*before write, iclass 26, count 0 2006.230.01:03:49.88#ibcon#enter sib2, iclass 26, count 0 2006.230.01:03:49.88#ibcon#flushed, iclass 26, count 0 2006.230.01:03:49.88#ibcon#about to write, iclass 26, count 0 2006.230.01:03:49.88#ibcon#wrote, iclass 26, count 0 2006.230.01:03:49.88#ibcon#about to read 3, iclass 26, count 0 2006.230.01:03:49.91#ibcon#read 3, iclass 26, count 0 2006.230.01:03:49.91#ibcon#about to read 4, iclass 26, count 0 2006.230.01:03:49.91#ibcon#read 4, iclass 26, count 0 2006.230.01:03:49.91#ibcon#about to read 5, iclass 26, count 0 2006.230.01:03:49.91#ibcon#read 5, iclass 26, count 0 2006.230.01:03:49.91#ibcon#about to read 6, iclass 26, count 0 2006.230.01:03:49.91#ibcon#read 6, iclass 26, count 0 2006.230.01:03:49.91#ibcon#end of sib2, iclass 26, count 0 2006.230.01:03:49.91#ibcon#*after write, iclass 26, count 0 2006.230.01:03:49.91#ibcon#*before return 0, iclass 26, count 0 2006.230.01:03:49.91#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:49.91#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:49.91#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:03:49.91#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:03:49.91$vck44/valo=3,564.99 2006.230.01:03:49.91#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.01:03:49.91#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.01:03:49.91#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:49.91#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:49.91#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:49.91#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:49.91#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:03:49.91#ibcon#first serial, iclass 28, count 0 2006.230.01:03:49.91#ibcon#enter sib2, iclass 28, count 0 2006.230.01:03:49.91#ibcon#flushed, iclass 28, count 0 2006.230.01:03:49.91#ibcon#about to write, iclass 28, count 0 2006.230.01:03:49.91#ibcon#wrote, iclass 28, count 0 2006.230.01:03:49.91#ibcon#about to read 3, iclass 28, count 0 2006.230.01:03:49.93#ibcon#read 3, iclass 28, count 0 2006.230.01:03:49.93#ibcon#about to read 4, iclass 28, count 0 2006.230.01:03:49.93#ibcon#read 4, iclass 28, count 0 2006.230.01:03:49.93#ibcon#about to read 5, iclass 28, count 0 2006.230.01:03:49.93#ibcon#read 5, iclass 28, count 0 2006.230.01:03:49.93#ibcon#about to read 6, iclass 28, count 0 2006.230.01:03:49.93#ibcon#read 6, iclass 28, count 0 2006.230.01:03:49.93#ibcon#end of sib2, iclass 28, count 0 2006.230.01:03:49.93#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:03:49.93#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:03:49.93#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:03:49.93#ibcon#*before write, iclass 28, count 0 2006.230.01:03:49.93#ibcon#enter sib2, iclass 28, count 0 2006.230.01:03:49.93#ibcon#flushed, iclass 28, count 0 2006.230.01:03:49.93#ibcon#about to write, iclass 28, count 0 2006.230.01:03:49.93#ibcon#wrote, iclass 28, count 0 2006.230.01:03:49.93#ibcon#about to read 3, iclass 28, count 0 2006.230.01:03:49.97#ibcon#read 3, iclass 28, count 0 2006.230.01:03:49.97#ibcon#about to read 4, iclass 28, count 0 2006.230.01:03:49.97#ibcon#read 4, iclass 28, count 0 2006.230.01:03:49.97#ibcon#about to read 5, iclass 28, count 0 2006.230.01:03:49.97#ibcon#read 5, iclass 28, count 0 2006.230.01:03:49.97#ibcon#about to read 6, iclass 28, count 0 2006.230.01:03:49.97#ibcon#read 6, iclass 28, count 0 2006.230.01:03:49.97#ibcon#end of sib2, iclass 28, count 0 2006.230.01:03:49.97#ibcon#*after write, iclass 28, count 0 2006.230.01:03:49.97#ibcon#*before return 0, iclass 28, count 0 2006.230.01:03:49.97#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:49.97#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:49.97#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:03:49.97#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:03:49.97$vck44/va=3,6 2006.230.01:03:49.97#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.01:03:49.97#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.01:03:49.97#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:49.97#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:50.03#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:50.03#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:50.03#ibcon#enter wrdev, iclass 30, count 2 2006.230.01:03:50.03#ibcon#first serial, iclass 30, count 2 2006.230.01:03:50.03#ibcon#enter sib2, iclass 30, count 2 2006.230.01:03:50.03#ibcon#flushed, iclass 30, count 2 2006.230.01:03:50.03#ibcon#about to write, iclass 30, count 2 2006.230.01:03:50.03#ibcon#wrote, iclass 30, count 2 2006.230.01:03:50.03#ibcon#about to read 3, iclass 30, count 2 2006.230.01:03:50.05#ibcon#read 3, iclass 30, count 2 2006.230.01:03:50.05#ibcon#about to read 4, iclass 30, count 2 2006.230.01:03:50.05#ibcon#read 4, iclass 30, count 2 2006.230.01:03:50.05#ibcon#about to read 5, iclass 30, count 2 2006.230.01:03:50.05#ibcon#read 5, iclass 30, count 2 2006.230.01:03:50.05#ibcon#about to read 6, iclass 30, count 2 2006.230.01:03:50.05#ibcon#read 6, iclass 30, count 2 2006.230.01:03:50.05#ibcon#end of sib2, iclass 30, count 2 2006.230.01:03:50.05#ibcon#*mode == 0, iclass 30, count 2 2006.230.01:03:50.05#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.01:03:50.05#ibcon#[25=AT03-06\r\n] 2006.230.01:03:50.05#ibcon#*before write, iclass 30, count 2 2006.230.01:03:50.05#ibcon#enter sib2, iclass 30, count 2 2006.230.01:03:50.05#ibcon#flushed, iclass 30, count 2 2006.230.01:03:50.05#ibcon#about to write, iclass 30, count 2 2006.230.01:03:50.05#ibcon#wrote, iclass 30, count 2 2006.230.01:03:50.05#ibcon#about to read 3, iclass 30, count 2 2006.230.01:03:50.08#ibcon#read 3, iclass 30, count 2 2006.230.01:03:50.08#ibcon#about to read 4, iclass 30, count 2 2006.230.01:03:50.08#ibcon#read 4, iclass 30, count 2 2006.230.01:03:50.08#ibcon#about to read 5, iclass 30, count 2 2006.230.01:03:50.08#ibcon#read 5, iclass 30, count 2 2006.230.01:03:50.08#ibcon#about to read 6, iclass 30, count 2 2006.230.01:03:50.08#ibcon#read 6, iclass 30, count 2 2006.230.01:03:50.08#ibcon#end of sib2, iclass 30, count 2 2006.230.01:03:50.08#ibcon#*after write, iclass 30, count 2 2006.230.01:03:50.08#ibcon#*before return 0, iclass 30, count 2 2006.230.01:03:50.08#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:50.08#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:50.08#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.01:03:50.08#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:50.08#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:50.20#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:50.20#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:50.20#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:03:50.20#ibcon#first serial, iclass 30, count 0 2006.230.01:03:50.20#ibcon#enter sib2, iclass 30, count 0 2006.230.01:03:50.20#ibcon#flushed, iclass 30, count 0 2006.230.01:03:50.20#ibcon#about to write, iclass 30, count 0 2006.230.01:03:50.20#ibcon#wrote, iclass 30, count 0 2006.230.01:03:50.20#ibcon#about to read 3, iclass 30, count 0 2006.230.01:03:50.22#ibcon#read 3, iclass 30, count 0 2006.230.01:03:50.22#ibcon#about to read 4, iclass 30, count 0 2006.230.01:03:50.22#ibcon#read 4, iclass 30, count 0 2006.230.01:03:50.22#ibcon#about to read 5, iclass 30, count 0 2006.230.01:03:50.22#ibcon#read 5, iclass 30, count 0 2006.230.01:03:50.22#ibcon#about to read 6, iclass 30, count 0 2006.230.01:03:50.22#ibcon#read 6, iclass 30, count 0 2006.230.01:03:50.22#ibcon#end of sib2, iclass 30, count 0 2006.230.01:03:50.22#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:03:50.22#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:03:50.22#ibcon#[25=USB\r\n] 2006.230.01:03:50.22#ibcon#*before write, iclass 30, count 0 2006.230.01:03:50.22#ibcon#enter sib2, iclass 30, count 0 2006.230.01:03:50.22#ibcon#flushed, iclass 30, count 0 2006.230.01:03:50.22#ibcon#about to write, iclass 30, count 0 2006.230.01:03:50.22#ibcon#wrote, iclass 30, count 0 2006.230.01:03:50.22#ibcon#about to read 3, iclass 30, count 0 2006.230.01:03:50.25#ibcon#read 3, iclass 30, count 0 2006.230.01:03:50.25#ibcon#about to read 4, iclass 30, count 0 2006.230.01:03:50.25#ibcon#read 4, iclass 30, count 0 2006.230.01:03:50.25#ibcon#about to read 5, iclass 30, count 0 2006.230.01:03:50.25#ibcon#read 5, iclass 30, count 0 2006.230.01:03:50.25#ibcon#about to read 6, iclass 30, count 0 2006.230.01:03:50.25#ibcon#read 6, iclass 30, count 0 2006.230.01:03:50.25#ibcon#end of sib2, iclass 30, count 0 2006.230.01:03:50.25#ibcon#*after write, iclass 30, count 0 2006.230.01:03:50.25#ibcon#*before return 0, iclass 30, count 0 2006.230.01:03:50.25#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:50.25#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:50.25#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:03:50.25#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:03:50.25$vck44/valo=4,624.99 2006.230.01:03:50.25#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.01:03:50.25#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.01:03:50.25#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:50.25#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:50.25#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:50.25#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:50.25#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:03:50.25#ibcon#first serial, iclass 32, count 0 2006.230.01:03:50.25#ibcon#enter sib2, iclass 32, count 0 2006.230.01:03:50.25#ibcon#flushed, iclass 32, count 0 2006.230.01:03:50.25#ibcon#about to write, iclass 32, count 0 2006.230.01:03:50.25#ibcon#wrote, iclass 32, count 0 2006.230.01:03:50.25#ibcon#about to read 3, iclass 32, count 0 2006.230.01:03:50.27#ibcon#read 3, iclass 32, count 0 2006.230.01:03:50.27#ibcon#about to read 4, iclass 32, count 0 2006.230.01:03:50.27#ibcon#read 4, iclass 32, count 0 2006.230.01:03:50.27#ibcon#about to read 5, iclass 32, count 0 2006.230.01:03:50.27#ibcon#read 5, iclass 32, count 0 2006.230.01:03:50.27#ibcon#about to read 6, iclass 32, count 0 2006.230.01:03:50.27#ibcon#read 6, iclass 32, count 0 2006.230.01:03:50.27#ibcon#end of sib2, iclass 32, count 0 2006.230.01:03:50.27#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:03:50.27#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:03:50.27#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:03:50.27#ibcon#*before write, iclass 32, count 0 2006.230.01:03:50.27#ibcon#enter sib2, iclass 32, count 0 2006.230.01:03:50.27#ibcon#flushed, iclass 32, count 0 2006.230.01:03:50.27#ibcon#about to write, iclass 32, count 0 2006.230.01:03:50.27#ibcon#wrote, iclass 32, count 0 2006.230.01:03:50.27#ibcon#about to read 3, iclass 32, count 0 2006.230.01:03:50.31#ibcon#read 3, iclass 32, count 0 2006.230.01:03:50.31#ibcon#about to read 4, iclass 32, count 0 2006.230.01:03:50.31#ibcon#read 4, iclass 32, count 0 2006.230.01:03:50.31#ibcon#about to read 5, iclass 32, count 0 2006.230.01:03:50.31#ibcon#read 5, iclass 32, count 0 2006.230.01:03:50.31#ibcon#about to read 6, iclass 32, count 0 2006.230.01:03:50.31#ibcon#read 6, iclass 32, count 0 2006.230.01:03:50.31#ibcon#end of sib2, iclass 32, count 0 2006.230.01:03:50.31#ibcon#*after write, iclass 32, count 0 2006.230.01:03:50.31#ibcon#*before return 0, iclass 32, count 0 2006.230.01:03:50.31#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:50.31#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:50.31#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:03:50.31#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:03:50.31$vck44/va=4,7 2006.230.01:03:50.31#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.01:03:50.31#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.01:03:50.31#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:50.31#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:50.37#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:50.37#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:50.37#ibcon#enter wrdev, iclass 34, count 2 2006.230.01:03:50.37#ibcon#first serial, iclass 34, count 2 2006.230.01:03:50.37#ibcon#enter sib2, iclass 34, count 2 2006.230.01:03:50.37#ibcon#flushed, iclass 34, count 2 2006.230.01:03:50.37#ibcon#about to write, iclass 34, count 2 2006.230.01:03:50.37#ibcon#wrote, iclass 34, count 2 2006.230.01:03:50.37#ibcon#about to read 3, iclass 34, count 2 2006.230.01:03:50.39#ibcon#read 3, iclass 34, count 2 2006.230.01:03:50.39#ibcon#about to read 4, iclass 34, count 2 2006.230.01:03:50.39#ibcon#read 4, iclass 34, count 2 2006.230.01:03:50.39#ibcon#about to read 5, iclass 34, count 2 2006.230.01:03:50.39#ibcon#read 5, iclass 34, count 2 2006.230.01:03:50.39#ibcon#about to read 6, iclass 34, count 2 2006.230.01:03:50.39#ibcon#read 6, iclass 34, count 2 2006.230.01:03:50.39#ibcon#end of sib2, iclass 34, count 2 2006.230.01:03:50.39#ibcon#*mode == 0, iclass 34, count 2 2006.230.01:03:50.39#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.01:03:50.39#ibcon#[25=AT04-07\r\n] 2006.230.01:03:50.39#ibcon#*before write, iclass 34, count 2 2006.230.01:03:50.39#ibcon#enter sib2, iclass 34, count 2 2006.230.01:03:50.39#ibcon#flushed, iclass 34, count 2 2006.230.01:03:50.39#ibcon#about to write, iclass 34, count 2 2006.230.01:03:50.39#ibcon#wrote, iclass 34, count 2 2006.230.01:03:50.39#ibcon#about to read 3, iclass 34, count 2 2006.230.01:03:50.42#ibcon#read 3, iclass 34, count 2 2006.230.01:03:50.42#ibcon#about to read 4, iclass 34, count 2 2006.230.01:03:50.42#ibcon#read 4, iclass 34, count 2 2006.230.01:03:50.42#ibcon#about to read 5, iclass 34, count 2 2006.230.01:03:50.42#ibcon#read 5, iclass 34, count 2 2006.230.01:03:50.42#ibcon#about to read 6, iclass 34, count 2 2006.230.01:03:50.42#ibcon#read 6, iclass 34, count 2 2006.230.01:03:50.42#ibcon#end of sib2, iclass 34, count 2 2006.230.01:03:50.42#ibcon#*after write, iclass 34, count 2 2006.230.01:03:50.44#ibcon#*before return 0, iclass 34, count 2 2006.230.01:03:50.44#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:50.44#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:50.44#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.01:03:50.44#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:50.44#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:50.56#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:50.56#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:50.56#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:03:50.56#ibcon#first serial, iclass 34, count 0 2006.230.01:03:50.56#ibcon#enter sib2, iclass 34, count 0 2006.230.01:03:50.56#ibcon#flushed, iclass 34, count 0 2006.230.01:03:50.56#ibcon#about to write, iclass 34, count 0 2006.230.01:03:50.56#ibcon#wrote, iclass 34, count 0 2006.230.01:03:50.56#ibcon#about to read 3, iclass 34, count 0 2006.230.01:03:50.58#ibcon#read 3, iclass 34, count 0 2006.230.01:03:50.58#ibcon#about to read 4, iclass 34, count 0 2006.230.01:03:50.58#ibcon#read 4, iclass 34, count 0 2006.230.01:03:50.58#ibcon#about to read 5, iclass 34, count 0 2006.230.01:03:50.58#ibcon#read 5, iclass 34, count 0 2006.230.01:03:50.58#ibcon#about to read 6, iclass 34, count 0 2006.230.01:03:50.58#ibcon#read 6, iclass 34, count 0 2006.230.01:03:50.58#ibcon#end of sib2, iclass 34, count 0 2006.230.01:03:50.58#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:03:50.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:03:50.58#ibcon#[25=USB\r\n] 2006.230.01:03:50.58#ibcon#*before write, iclass 34, count 0 2006.230.01:03:50.58#ibcon#enter sib2, iclass 34, count 0 2006.230.01:03:50.58#ibcon#flushed, iclass 34, count 0 2006.230.01:03:50.58#ibcon#about to write, iclass 34, count 0 2006.230.01:03:50.58#ibcon#wrote, iclass 34, count 0 2006.230.01:03:50.58#ibcon#about to read 3, iclass 34, count 0 2006.230.01:03:50.61#ibcon#read 3, iclass 34, count 0 2006.230.01:03:50.61#ibcon#about to read 4, iclass 34, count 0 2006.230.01:03:50.61#ibcon#read 4, iclass 34, count 0 2006.230.01:03:50.61#ibcon#about to read 5, iclass 34, count 0 2006.230.01:03:50.61#ibcon#read 5, iclass 34, count 0 2006.230.01:03:50.61#ibcon#about to read 6, iclass 34, count 0 2006.230.01:03:50.61#ibcon#read 6, iclass 34, count 0 2006.230.01:03:50.61#ibcon#end of sib2, iclass 34, count 0 2006.230.01:03:50.61#ibcon#*after write, iclass 34, count 0 2006.230.01:03:50.61#ibcon#*before return 0, iclass 34, count 0 2006.230.01:03:50.61#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:50.61#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:50.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:03:50.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:03:50.61$vck44/valo=5,734.99 2006.230.01:03:50.61#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.01:03:50.61#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.01:03:50.61#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:50.61#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:03:50.61#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:03:50.61#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:03:50.61#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:03:50.61#ibcon#first serial, iclass 36, count 0 2006.230.01:03:50.61#ibcon#enter sib2, iclass 36, count 0 2006.230.01:03:50.61#ibcon#flushed, iclass 36, count 0 2006.230.01:03:50.61#ibcon#about to write, iclass 36, count 0 2006.230.01:03:50.61#ibcon#wrote, iclass 36, count 0 2006.230.01:03:50.61#ibcon#about to read 3, iclass 36, count 0 2006.230.01:03:50.63#ibcon#read 3, iclass 36, count 0 2006.230.01:03:50.63#ibcon#about to read 4, iclass 36, count 0 2006.230.01:03:50.63#ibcon#read 4, iclass 36, count 0 2006.230.01:03:50.63#ibcon#about to read 5, iclass 36, count 0 2006.230.01:03:50.63#ibcon#read 5, iclass 36, count 0 2006.230.01:03:50.63#ibcon#about to read 6, iclass 36, count 0 2006.230.01:03:50.63#ibcon#read 6, iclass 36, count 0 2006.230.01:03:50.63#ibcon#end of sib2, iclass 36, count 0 2006.230.01:03:50.63#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:03:50.63#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:03:50.63#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:03:50.63#ibcon#*before write, iclass 36, count 0 2006.230.01:03:50.63#ibcon#enter sib2, iclass 36, count 0 2006.230.01:03:50.63#ibcon#flushed, iclass 36, count 0 2006.230.01:03:50.63#ibcon#about to write, iclass 36, count 0 2006.230.01:03:50.63#ibcon#wrote, iclass 36, count 0 2006.230.01:03:50.63#ibcon#about to read 3, iclass 36, count 0 2006.230.01:03:50.67#ibcon#read 3, iclass 36, count 0 2006.230.01:03:50.67#ibcon#about to read 4, iclass 36, count 0 2006.230.01:03:50.67#ibcon#read 4, iclass 36, count 0 2006.230.01:03:50.67#ibcon#about to read 5, iclass 36, count 0 2006.230.01:03:50.67#ibcon#read 5, iclass 36, count 0 2006.230.01:03:50.67#ibcon#about to read 6, iclass 36, count 0 2006.230.01:03:50.67#ibcon#read 6, iclass 36, count 0 2006.230.01:03:50.67#ibcon#end of sib2, iclass 36, count 0 2006.230.01:03:50.67#ibcon#*after write, iclass 36, count 0 2006.230.01:03:50.67#ibcon#*before return 0, iclass 36, count 0 2006.230.01:03:50.67#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:03:50.67#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:03:50.67#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:03:50.67#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:03:50.67$vck44/va=5,4 2006.230.01:03:50.67#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.01:03:50.67#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.01:03:50.67#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:50.67#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:03:50.73#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:03:50.73#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:03:50.73#ibcon#enter wrdev, iclass 38, count 2 2006.230.01:03:50.73#ibcon#first serial, iclass 38, count 2 2006.230.01:03:50.73#ibcon#enter sib2, iclass 38, count 2 2006.230.01:03:50.73#ibcon#flushed, iclass 38, count 2 2006.230.01:03:50.73#ibcon#about to write, iclass 38, count 2 2006.230.01:03:50.73#ibcon#wrote, iclass 38, count 2 2006.230.01:03:50.73#ibcon#about to read 3, iclass 38, count 2 2006.230.01:03:50.75#ibcon#read 3, iclass 38, count 2 2006.230.01:03:50.75#ibcon#about to read 4, iclass 38, count 2 2006.230.01:03:50.75#ibcon#read 4, iclass 38, count 2 2006.230.01:03:50.75#ibcon#about to read 5, iclass 38, count 2 2006.230.01:03:50.75#ibcon#read 5, iclass 38, count 2 2006.230.01:03:50.75#ibcon#about to read 6, iclass 38, count 2 2006.230.01:03:50.75#ibcon#read 6, iclass 38, count 2 2006.230.01:03:50.75#ibcon#end of sib2, iclass 38, count 2 2006.230.01:03:50.75#ibcon#*mode == 0, iclass 38, count 2 2006.230.01:03:50.75#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.01:03:50.75#ibcon#[25=AT05-04\r\n] 2006.230.01:03:50.75#ibcon#*before write, iclass 38, count 2 2006.230.01:03:50.75#ibcon#enter sib2, iclass 38, count 2 2006.230.01:03:50.75#ibcon#flushed, iclass 38, count 2 2006.230.01:03:50.75#ibcon#about to write, iclass 38, count 2 2006.230.01:03:50.75#ibcon#wrote, iclass 38, count 2 2006.230.01:03:50.75#ibcon#about to read 3, iclass 38, count 2 2006.230.01:03:50.78#ibcon#read 3, iclass 38, count 2 2006.230.01:03:50.78#ibcon#about to read 4, iclass 38, count 2 2006.230.01:03:50.78#ibcon#read 4, iclass 38, count 2 2006.230.01:03:50.78#ibcon#about to read 5, iclass 38, count 2 2006.230.01:03:50.78#ibcon#read 5, iclass 38, count 2 2006.230.01:03:50.78#ibcon#about to read 6, iclass 38, count 2 2006.230.01:03:50.78#ibcon#read 6, iclass 38, count 2 2006.230.01:03:50.78#ibcon#end of sib2, iclass 38, count 2 2006.230.01:03:50.78#ibcon#*after write, iclass 38, count 2 2006.230.01:03:50.78#ibcon#*before return 0, iclass 38, count 2 2006.230.01:03:50.78#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:03:50.78#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:03:50.78#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.01:03:50.78#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:50.78#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:03:50.90#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:03:50.90#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:03:50.90#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:03:50.90#ibcon#first serial, iclass 38, count 0 2006.230.01:03:50.90#ibcon#enter sib2, iclass 38, count 0 2006.230.01:03:50.90#ibcon#flushed, iclass 38, count 0 2006.230.01:03:50.90#ibcon#about to write, iclass 38, count 0 2006.230.01:03:50.90#ibcon#wrote, iclass 38, count 0 2006.230.01:03:50.90#ibcon#about to read 3, iclass 38, count 0 2006.230.01:03:50.92#ibcon#read 3, iclass 38, count 0 2006.230.01:03:50.92#ibcon#about to read 4, iclass 38, count 0 2006.230.01:03:50.92#ibcon#read 4, iclass 38, count 0 2006.230.01:03:50.92#ibcon#about to read 5, iclass 38, count 0 2006.230.01:03:50.92#ibcon#read 5, iclass 38, count 0 2006.230.01:03:50.92#ibcon#about to read 6, iclass 38, count 0 2006.230.01:03:50.92#ibcon#read 6, iclass 38, count 0 2006.230.01:03:50.92#ibcon#end of sib2, iclass 38, count 0 2006.230.01:03:50.92#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:03:50.92#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:03:50.92#ibcon#[25=USB\r\n] 2006.230.01:03:50.92#ibcon#*before write, iclass 38, count 0 2006.230.01:03:50.92#ibcon#enter sib2, iclass 38, count 0 2006.230.01:03:50.92#ibcon#flushed, iclass 38, count 0 2006.230.01:03:50.92#ibcon#about to write, iclass 38, count 0 2006.230.01:03:50.92#ibcon#wrote, iclass 38, count 0 2006.230.01:03:50.92#ibcon#about to read 3, iclass 38, count 0 2006.230.01:03:50.95#ibcon#read 3, iclass 38, count 0 2006.230.01:03:50.95#ibcon#about to read 4, iclass 38, count 0 2006.230.01:03:50.95#ibcon#read 4, iclass 38, count 0 2006.230.01:03:50.95#ibcon#about to read 5, iclass 38, count 0 2006.230.01:03:50.95#ibcon#read 5, iclass 38, count 0 2006.230.01:03:50.95#ibcon#about to read 6, iclass 38, count 0 2006.230.01:03:50.95#ibcon#read 6, iclass 38, count 0 2006.230.01:03:50.95#ibcon#end of sib2, iclass 38, count 0 2006.230.01:03:50.95#ibcon#*after write, iclass 38, count 0 2006.230.01:03:50.95#ibcon#*before return 0, iclass 38, count 0 2006.230.01:03:50.95#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:03:50.95#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:03:50.95#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:03:50.95#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:03:50.95$vck44/valo=6,814.99 2006.230.01:03:50.95#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:03:50.95#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:03:50.95#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:50.95#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:50.95#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:50.95#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:50.95#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:03:50.95#ibcon#first serial, iclass 40, count 0 2006.230.01:03:50.95#ibcon#enter sib2, iclass 40, count 0 2006.230.01:03:50.95#ibcon#flushed, iclass 40, count 0 2006.230.01:03:50.95#ibcon#about to write, iclass 40, count 0 2006.230.01:03:50.95#ibcon#wrote, iclass 40, count 0 2006.230.01:03:50.95#ibcon#about to read 3, iclass 40, count 0 2006.230.01:03:50.97#ibcon#read 3, iclass 40, count 0 2006.230.01:03:50.97#ibcon#about to read 4, iclass 40, count 0 2006.230.01:03:50.97#ibcon#read 4, iclass 40, count 0 2006.230.01:03:50.97#ibcon#about to read 5, iclass 40, count 0 2006.230.01:03:50.97#ibcon#read 5, iclass 40, count 0 2006.230.01:03:50.97#ibcon#about to read 6, iclass 40, count 0 2006.230.01:03:50.97#ibcon#read 6, iclass 40, count 0 2006.230.01:03:50.97#ibcon#end of sib2, iclass 40, count 0 2006.230.01:03:50.97#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:03:50.97#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:03:50.97#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:03:50.97#ibcon#*before write, iclass 40, count 0 2006.230.01:03:50.97#ibcon#enter sib2, iclass 40, count 0 2006.230.01:03:50.97#ibcon#flushed, iclass 40, count 0 2006.230.01:03:50.97#ibcon#about to write, iclass 40, count 0 2006.230.01:03:50.97#ibcon#wrote, iclass 40, count 0 2006.230.01:03:50.97#ibcon#about to read 3, iclass 40, count 0 2006.230.01:03:51.01#ibcon#read 3, iclass 40, count 0 2006.230.01:03:51.01#ibcon#about to read 4, iclass 40, count 0 2006.230.01:03:51.01#ibcon#read 4, iclass 40, count 0 2006.230.01:03:51.01#ibcon#about to read 5, iclass 40, count 0 2006.230.01:03:51.01#ibcon#read 5, iclass 40, count 0 2006.230.01:03:51.01#ibcon#about to read 6, iclass 40, count 0 2006.230.01:03:51.01#ibcon#read 6, iclass 40, count 0 2006.230.01:03:51.01#ibcon#end of sib2, iclass 40, count 0 2006.230.01:03:51.01#ibcon#*after write, iclass 40, count 0 2006.230.01:03:51.01#ibcon#*before return 0, iclass 40, count 0 2006.230.01:03:51.01#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:51.01#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:51.01#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:03:51.01#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:03:51.01$vck44/va=6,4 2006.230.01:03:51.01#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.01:03:51.01#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.01:03:51.01#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:51.01#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:51.07#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:51.07#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:51.07#ibcon#enter wrdev, iclass 4, count 2 2006.230.01:03:51.07#ibcon#first serial, iclass 4, count 2 2006.230.01:03:51.07#ibcon#enter sib2, iclass 4, count 2 2006.230.01:03:51.07#ibcon#flushed, iclass 4, count 2 2006.230.01:03:51.07#ibcon#about to write, iclass 4, count 2 2006.230.01:03:51.07#ibcon#wrote, iclass 4, count 2 2006.230.01:03:51.07#ibcon#about to read 3, iclass 4, count 2 2006.230.01:03:51.09#ibcon#read 3, iclass 4, count 2 2006.230.01:03:51.09#ibcon#about to read 4, iclass 4, count 2 2006.230.01:03:51.09#ibcon#read 4, iclass 4, count 2 2006.230.01:03:51.09#ibcon#about to read 5, iclass 4, count 2 2006.230.01:03:51.09#ibcon#read 5, iclass 4, count 2 2006.230.01:03:51.09#ibcon#about to read 6, iclass 4, count 2 2006.230.01:03:51.09#ibcon#read 6, iclass 4, count 2 2006.230.01:03:51.09#ibcon#end of sib2, iclass 4, count 2 2006.230.01:03:51.09#ibcon#*mode == 0, iclass 4, count 2 2006.230.01:03:51.09#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.01:03:51.09#ibcon#[25=AT06-04\r\n] 2006.230.01:03:51.09#ibcon#*before write, iclass 4, count 2 2006.230.01:03:51.09#ibcon#enter sib2, iclass 4, count 2 2006.230.01:03:51.09#ibcon#flushed, iclass 4, count 2 2006.230.01:03:51.09#ibcon#about to write, iclass 4, count 2 2006.230.01:03:51.09#ibcon#wrote, iclass 4, count 2 2006.230.01:03:51.09#ibcon#about to read 3, iclass 4, count 2 2006.230.01:03:51.12#ibcon#read 3, iclass 4, count 2 2006.230.01:03:51.12#ibcon#about to read 4, iclass 4, count 2 2006.230.01:03:51.12#ibcon#read 4, iclass 4, count 2 2006.230.01:03:51.12#ibcon#about to read 5, iclass 4, count 2 2006.230.01:03:51.12#ibcon#read 5, iclass 4, count 2 2006.230.01:03:51.12#ibcon#about to read 6, iclass 4, count 2 2006.230.01:03:51.12#ibcon#read 6, iclass 4, count 2 2006.230.01:03:51.12#ibcon#end of sib2, iclass 4, count 2 2006.230.01:03:51.12#ibcon#*after write, iclass 4, count 2 2006.230.01:03:51.12#ibcon#*before return 0, iclass 4, count 2 2006.230.01:03:51.12#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:51.12#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:51.12#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.01:03:51.12#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:51.12#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:51.24#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:51.24#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:51.24#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:03:51.24#ibcon#first serial, iclass 4, count 0 2006.230.01:03:51.24#ibcon#enter sib2, iclass 4, count 0 2006.230.01:03:51.24#ibcon#flushed, iclass 4, count 0 2006.230.01:03:51.24#ibcon#about to write, iclass 4, count 0 2006.230.01:03:51.24#ibcon#wrote, iclass 4, count 0 2006.230.01:03:51.24#ibcon#about to read 3, iclass 4, count 0 2006.230.01:03:51.26#ibcon#read 3, iclass 4, count 0 2006.230.01:03:51.26#ibcon#about to read 4, iclass 4, count 0 2006.230.01:03:51.26#ibcon#read 4, iclass 4, count 0 2006.230.01:03:51.26#ibcon#about to read 5, iclass 4, count 0 2006.230.01:03:51.26#ibcon#read 5, iclass 4, count 0 2006.230.01:03:51.26#ibcon#about to read 6, iclass 4, count 0 2006.230.01:03:51.26#ibcon#read 6, iclass 4, count 0 2006.230.01:03:51.26#ibcon#end of sib2, iclass 4, count 0 2006.230.01:03:51.26#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:03:51.26#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:03:51.26#ibcon#[25=USB\r\n] 2006.230.01:03:51.26#ibcon#*before write, iclass 4, count 0 2006.230.01:03:51.26#ibcon#enter sib2, iclass 4, count 0 2006.230.01:03:51.26#ibcon#flushed, iclass 4, count 0 2006.230.01:03:51.26#ibcon#about to write, iclass 4, count 0 2006.230.01:03:51.26#ibcon#wrote, iclass 4, count 0 2006.230.01:03:51.26#ibcon#about to read 3, iclass 4, count 0 2006.230.01:03:51.29#ibcon#read 3, iclass 4, count 0 2006.230.01:03:51.29#ibcon#about to read 4, iclass 4, count 0 2006.230.01:03:51.29#ibcon#read 4, iclass 4, count 0 2006.230.01:03:51.29#ibcon#about to read 5, iclass 4, count 0 2006.230.01:03:51.29#ibcon#read 5, iclass 4, count 0 2006.230.01:03:51.29#ibcon#about to read 6, iclass 4, count 0 2006.230.01:03:51.29#ibcon#read 6, iclass 4, count 0 2006.230.01:03:51.29#ibcon#end of sib2, iclass 4, count 0 2006.230.01:03:51.29#ibcon#*after write, iclass 4, count 0 2006.230.01:03:51.29#ibcon#*before return 0, iclass 4, count 0 2006.230.01:03:51.29#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:51.29#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:51.29#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:03:51.29#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:03:51.29$vck44/valo=7,864.99 2006.230.01:03:51.29#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:03:51.29#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:03:51.29#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:51.29#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:51.29#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:51.29#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:51.29#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:03:51.29#ibcon#first serial, iclass 6, count 0 2006.230.01:03:51.29#ibcon#enter sib2, iclass 6, count 0 2006.230.01:03:51.29#ibcon#flushed, iclass 6, count 0 2006.230.01:03:51.29#ibcon#about to write, iclass 6, count 0 2006.230.01:03:51.29#ibcon#wrote, iclass 6, count 0 2006.230.01:03:51.29#ibcon#about to read 3, iclass 6, count 0 2006.230.01:03:51.31#ibcon#read 3, iclass 6, count 0 2006.230.01:03:51.31#ibcon#about to read 4, iclass 6, count 0 2006.230.01:03:51.31#ibcon#read 4, iclass 6, count 0 2006.230.01:03:51.31#ibcon#about to read 5, iclass 6, count 0 2006.230.01:03:51.31#ibcon#read 5, iclass 6, count 0 2006.230.01:03:51.31#ibcon#about to read 6, iclass 6, count 0 2006.230.01:03:51.31#ibcon#read 6, iclass 6, count 0 2006.230.01:03:51.31#ibcon#end of sib2, iclass 6, count 0 2006.230.01:03:51.31#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:03:51.31#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:03:51.31#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:03:51.31#ibcon#*before write, iclass 6, count 0 2006.230.01:03:51.31#ibcon#enter sib2, iclass 6, count 0 2006.230.01:03:51.31#ibcon#flushed, iclass 6, count 0 2006.230.01:03:51.31#ibcon#about to write, iclass 6, count 0 2006.230.01:03:51.31#ibcon#wrote, iclass 6, count 0 2006.230.01:03:51.31#ibcon#about to read 3, iclass 6, count 0 2006.230.01:03:51.35#ibcon#read 3, iclass 6, count 0 2006.230.01:03:51.35#ibcon#about to read 4, iclass 6, count 0 2006.230.01:03:51.35#ibcon#read 4, iclass 6, count 0 2006.230.01:03:51.35#ibcon#about to read 5, iclass 6, count 0 2006.230.01:03:51.35#ibcon#read 5, iclass 6, count 0 2006.230.01:03:51.35#ibcon#about to read 6, iclass 6, count 0 2006.230.01:03:51.35#ibcon#read 6, iclass 6, count 0 2006.230.01:03:51.35#ibcon#end of sib2, iclass 6, count 0 2006.230.01:03:51.35#ibcon#*after write, iclass 6, count 0 2006.230.01:03:51.35#ibcon#*before return 0, iclass 6, count 0 2006.230.01:03:51.35#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:51.35#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:51.35#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:03:51.35#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:03:51.35$vck44/va=7,5 2006.230.01:03:51.35#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.01:03:51.35#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.01:03:51.35#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:51.35#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:51.41#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:51.41#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:51.41#ibcon#enter wrdev, iclass 10, count 2 2006.230.01:03:51.41#ibcon#first serial, iclass 10, count 2 2006.230.01:03:51.41#ibcon#enter sib2, iclass 10, count 2 2006.230.01:03:51.41#ibcon#flushed, iclass 10, count 2 2006.230.01:03:51.41#ibcon#about to write, iclass 10, count 2 2006.230.01:03:51.41#ibcon#wrote, iclass 10, count 2 2006.230.01:03:51.41#ibcon#about to read 3, iclass 10, count 2 2006.230.01:03:51.43#ibcon#read 3, iclass 10, count 2 2006.230.01:03:51.43#ibcon#about to read 4, iclass 10, count 2 2006.230.01:03:51.43#ibcon#read 4, iclass 10, count 2 2006.230.01:03:51.43#ibcon#about to read 5, iclass 10, count 2 2006.230.01:03:51.43#ibcon#read 5, iclass 10, count 2 2006.230.01:03:51.43#ibcon#about to read 6, iclass 10, count 2 2006.230.01:03:51.43#ibcon#read 6, iclass 10, count 2 2006.230.01:03:51.43#ibcon#end of sib2, iclass 10, count 2 2006.230.01:03:51.43#ibcon#*mode == 0, iclass 10, count 2 2006.230.01:03:51.43#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.01:03:51.43#ibcon#[25=AT07-05\r\n] 2006.230.01:03:51.43#ibcon#*before write, iclass 10, count 2 2006.230.01:03:51.43#ibcon#enter sib2, iclass 10, count 2 2006.230.01:03:51.43#ibcon#flushed, iclass 10, count 2 2006.230.01:03:51.43#ibcon#about to write, iclass 10, count 2 2006.230.01:03:51.43#ibcon#wrote, iclass 10, count 2 2006.230.01:03:51.43#ibcon#about to read 3, iclass 10, count 2 2006.230.01:03:51.46#ibcon#read 3, iclass 10, count 2 2006.230.01:03:51.46#ibcon#about to read 4, iclass 10, count 2 2006.230.01:03:51.46#ibcon#read 4, iclass 10, count 2 2006.230.01:03:51.46#ibcon#about to read 5, iclass 10, count 2 2006.230.01:03:51.46#ibcon#read 5, iclass 10, count 2 2006.230.01:03:51.46#ibcon#about to read 6, iclass 10, count 2 2006.230.01:03:51.46#ibcon#read 6, iclass 10, count 2 2006.230.01:03:51.46#ibcon#end of sib2, iclass 10, count 2 2006.230.01:03:51.46#ibcon#*after write, iclass 10, count 2 2006.230.01:03:51.46#ibcon#*before return 0, iclass 10, count 2 2006.230.01:03:51.46#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:51.46#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:51.46#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.01:03:51.46#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:51.46#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:51.58#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:51.58#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:51.58#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:03:51.58#ibcon#first serial, iclass 10, count 0 2006.230.01:03:51.58#ibcon#enter sib2, iclass 10, count 0 2006.230.01:03:51.58#ibcon#flushed, iclass 10, count 0 2006.230.01:03:51.58#ibcon#about to write, iclass 10, count 0 2006.230.01:03:51.58#ibcon#wrote, iclass 10, count 0 2006.230.01:03:51.58#ibcon#about to read 3, iclass 10, count 0 2006.230.01:03:51.60#ibcon#read 3, iclass 10, count 0 2006.230.01:03:51.60#ibcon#about to read 4, iclass 10, count 0 2006.230.01:03:51.60#ibcon#read 4, iclass 10, count 0 2006.230.01:03:51.60#ibcon#about to read 5, iclass 10, count 0 2006.230.01:03:51.60#ibcon#read 5, iclass 10, count 0 2006.230.01:03:51.60#ibcon#about to read 6, iclass 10, count 0 2006.230.01:03:51.60#ibcon#read 6, iclass 10, count 0 2006.230.01:03:51.60#ibcon#end of sib2, iclass 10, count 0 2006.230.01:03:51.60#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:03:51.60#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:03:51.60#ibcon#[25=USB\r\n] 2006.230.01:03:51.60#ibcon#*before write, iclass 10, count 0 2006.230.01:03:51.60#ibcon#enter sib2, iclass 10, count 0 2006.230.01:03:51.60#ibcon#flushed, iclass 10, count 0 2006.230.01:03:51.60#ibcon#about to write, iclass 10, count 0 2006.230.01:03:51.60#ibcon#wrote, iclass 10, count 0 2006.230.01:03:51.60#ibcon#about to read 3, iclass 10, count 0 2006.230.01:03:51.63#ibcon#read 3, iclass 10, count 0 2006.230.01:03:51.63#ibcon#about to read 4, iclass 10, count 0 2006.230.01:03:51.63#ibcon#read 4, iclass 10, count 0 2006.230.01:03:51.63#ibcon#about to read 5, iclass 10, count 0 2006.230.01:03:51.63#ibcon#read 5, iclass 10, count 0 2006.230.01:03:51.63#ibcon#about to read 6, iclass 10, count 0 2006.230.01:03:51.63#ibcon#read 6, iclass 10, count 0 2006.230.01:03:51.63#ibcon#end of sib2, iclass 10, count 0 2006.230.01:03:51.63#ibcon#*after write, iclass 10, count 0 2006.230.01:03:51.63#ibcon#*before return 0, iclass 10, count 0 2006.230.01:03:51.63#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:51.63#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:51.63#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:03:51.63#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:03:51.63$vck44/valo=8,884.99 2006.230.01:03:51.63#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.01:03:51.63#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.01:03:51.63#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:51.63#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:51.63#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:51.63#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:51.63#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:03:51.63#ibcon#first serial, iclass 12, count 0 2006.230.01:03:51.63#ibcon#enter sib2, iclass 12, count 0 2006.230.01:03:51.63#ibcon#flushed, iclass 12, count 0 2006.230.01:03:51.63#ibcon#about to write, iclass 12, count 0 2006.230.01:03:51.63#ibcon#wrote, iclass 12, count 0 2006.230.01:03:51.63#ibcon#about to read 3, iclass 12, count 0 2006.230.01:03:51.65#ibcon#read 3, iclass 12, count 0 2006.230.01:03:51.65#ibcon#about to read 4, iclass 12, count 0 2006.230.01:03:51.65#ibcon#read 4, iclass 12, count 0 2006.230.01:03:51.65#ibcon#about to read 5, iclass 12, count 0 2006.230.01:03:51.65#ibcon#read 5, iclass 12, count 0 2006.230.01:03:51.65#ibcon#about to read 6, iclass 12, count 0 2006.230.01:03:51.65#ibcon#read 6, iclass 12, count 0 2006.230.01:03:51.65#ibcon#end of sib2, iclass 12, count 0 2006.230.01:03:51.65#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:03:51.65#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:03:51.65#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:03:51.65#ibcon#*before write, iclass 12, count 0 2006.230.01:03:51.65#ibcon#enter sib2, iclass 12, count 0 2006.230.01:03:51.65#ibcon#flushed, iclass 12, count 0 2006.230.01:03:51.65#ibcon#about to write, iclass 12, count 0 2006.230.01:03:51.65#ibcon#wrote, iclass 12, count 0 2006.230.01:03:51.65#ibcon#about to read 3, iclass 12, count 0 2006.230.01:03:51.69#ibcon#read 3, iclass 12, count 0 2006.230.01:03:51.69#ibcon#about to read 4, iclass 12, count 0 2006.230.01:03:51.69#ibcon#read 4, iclass 12, count 0 2006.230.01:03:51.69#ibcon#about to read 5, iclass 12, count 0 2006.230.01:03:51.69#ibcon#read 5, iclass 12, count 0 2006.230.01:03:51.69#ibcon#about to read 6, iclass 12, count 0 2006.230.01:03:51.69#ibcon#read 6, iclass 12, count 0 2006.230.01:03:51.69#ibcon#end of sib2, iclass 12, count 0 2006.230.01:03:51.69#ibcon#*after write, iclass 12, count 0 2006.230.01:03:51.69#ibcon#*before return 0, iclass 12, count 0 2006.230.01:03:51.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:51.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:51.69#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:03:51.69#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:03:51.69$vck44/va=8,6 2006.230.01:03:51.69#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.01:03:51.69#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.01:03:51.69#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:51.69#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:51.75#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:51.75#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:51.75#ibcon#enter wrdev, iclass 14, count 2 2006.230.01:03:51.75#ibcon#first serial, iclass 14, count 2 2006.230.01:03:51.75#ibcon#enter sib2, iclass 14, count 2 2006.230.01:03:51.75#ibcon#flushed, iclass 14, count 2 2006.230.01:03:51.75#ibcon#about to write, iclass 14, count 2 2006.230.01:03:51.75#ibcon#wrote, iclass 14, count 2 2006.230.01:03:51.75#ibcon#about to read 3, iclass 14, count 2 2006.230.01:03:51.77#ibcon#read 3, iclass 14, count 2 2006.230.01:03:51.77#ibcon#about to read 4, iclass 14, count 2 2006.230.01:03:51.77#ibcon#read 4, iclass 14, count 2 2006.230.01:03:51.77#ibcon#about to read 5, iclass 14, count 2 2006.230.01:03:51.77#ibcon#read 5, iclass 14, count 2 2006.230.01:03:51.77#ibcon#about to read 6, iclass 14, count 2 2006.230.01:03:51.77#ibcon#read 6, iclass 14, count 2 2006.230.01:03:51.77#ibcon#end of sib2, iclass 14, count 2 2006.230.01:03:51.77#ibcon#*mode == 0, iclass 14, count 2 2006.230.01:03:51.77#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.01:03:51.77#ibcon#[25=AT08-06\r\n] 2006.230.01:03:51.77#ibcon#*before write, iclass 14, count 2 2006.230.01:03:51.77#ibcon#enter sib2, iclass 14, count 2 2006.230.01:03:51.77#ibcon#flushed, iclass 14, count 2 2006.230.01:03:51.77#ibcon#about to write, iclass 14, count 2 2006.230.01:03:51.77#ibcon#wrote, iclass 14, count 2 2006.230.01:03:51.77#ibcon#about to read 3, iclass 14, count 2 2006.230.01:03:51.80#ibcon#read 3, iclass 14, count 2 2006.230.01:03:51.80#ibcon#about to read 4, iclass 14, count 2 2006.230.01:03:51.80#ibcon#read 4, iclass 14, count 2 2006.230.01:03:51.80#ibcon#about to read 5, iclass 14, count 2 2006.230.01:03:51.80#ibcon#read 5, iclass 14, count 2 2006.230.01:03:51.80#ibcon#about to read 6, iclass 14, count 2 2006.230.01:03:51.80#ibcon#read 6, iclass 14, count 2 2006.230.01:03:51.80#ibcon#end of sib2, iclass 14, count 2 2006.230.01:03:51.80#ibcon#*after write, iclass 14, count 2 2006.230.01:03:51.80#ibcon#*before return 0, iclass 14, count 2 2006.230.01:03:51.80#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:51.80#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:51.80#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.01:03:51.80#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:51.80#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:51.92#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:51.92#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:51.92#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:03:51.92#ibcon#first serial, iclass 14, count 0 2006.230.01:03:51.92#ibcon#enter sib2, iclass 14, count 0 2006.230.01:03:51.92#ibcon#flushed, iclass 14, count 0 2006.230.01:03:51.92#ibcon#about to write, iclass 14, count 0 2006.230.01:03:51.92#ibcon#wrote, iclass 14, count 0 2006.230.01:03:51.92#ibcon#about to read 3, iclass 14, count 0 2006.230.01:03:51.94#ibcon#read 3, iclass 14, count 0 2006.230.01:03:51.94#ibcon#about to read 4, iclass 14, count 0 2006.230.01:03:51.94#ibcon#read 4, iclass 14, count 0 2006.230.01:03:51.94#ibcon#about to read 5, iclass 14, count 0 2006.230.01:03:51.94#ibcon#read 5, iclass 14, count 0 2006.230.01:03:51.94#ibcon#about to read 6, iclass 14, count 0 2006.230.01:03:51.94#ibcon#read 6, iclass 14, count 0 2006.230.01:03:51.94#ibcon#end of sib2, iclass 14, count 0 2006.230.01:03:51.94#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:03:51.94#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:03:51.94#ibcon#[25=USB\r\n] 2006.230.01:03:51.94#ibcon#*before write, iclass 14, count 0 2006.230.01:03:51.94#ibcon#enter sib2, iclass 14, count 0 2006.230.01:03:51.94#ibcon#flushed, iclass 14, count 0 2006.230.01:03:51.94#ibcon#about to write, iclass 14, count 0 2006.230.01:03:51.94#ibcon#wrote, iclass 14, count 0 2006.230.01:03:51.94#ibcon#about to read 3, iclass 14, count 0 2006.230.01:03:51.97#ibcon#read 3, iclass 14, count 0 2006.230.01:03:51.97#ibcon#about to read 4, iclass 14, count 0 2006.230.01:03:51.97#ibcon#read 4, iclass 14, count 0 2006.230.01:03:51.97#ibcon#about to read 5, iclass 14, count 0 2006.230.01:03:51.97#ibcon#read 5, iclass 14, count 0 2006.230.01:03:51.97#ibcon#about to read 6, iclass 14, count 0 2006.230.01:03:51.97#ibcon#read 6, iclass 14, count 0 2006.230.01:03:51.97#ibcon#end of sib2, iclass 14, count 0 2006.230.01:03:51.97#ibcon#*after write, iclass 14, count 0 2006.230.01:03:51.97#ibcon#*before return 0, iclass 14, count 0 2006.230.01:03:51.97#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:51.97#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:51.97#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:03:51.97#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:03:51.97$vck44/vblo=1,629.99 2006.230.01:03:51.97#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:03:51.97#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:03:51.97#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:51.97#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:51.97#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:51.97#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:51.97#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:03:51.97#ibcon#first serial, iclass 16, count 0 2006.230.01:03:51.97#ibcon#enter sib2, iclass 16, count 0 2006.230.01:03:51.97#ibcon#flushed, iclass 16, count 0 2006.230.01:03:51.97#ibcon#about to write, iclass 16, count 0 2006.230.01:03:51.97#ibcon#wrote, iclass 16, count 0 2006.230.01:03:51.97#ibcon#about to read 3, iclass 16, count 0 2006.230.01:03:51.99#ibcon#read 3, iclass 16, count 0 2006.230.01:03:51.99#ibcon#about to read 4, iclass 16, count 0 2006.230.01:03:51.99#ibcon#read 4, iclass 16, count 0 2006.230.01:03:51.99#ibcon#about to read 5, iclass 16, count 0 2006.230.01:03:51.99#ibcon#read 5, iclass 16, count 0 2006.230.01:03:51.99#ibcon#about to read 6, iclass 16, count 0 2006.230.01:03:51.99#ibcon#read 6, iclass 16, count 0 2006.230.01:03:51.99#ibcon#end of sib2, iclass 16, count 0 2006.230.01:03:51.99#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:03:51.99#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:03:51.99#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:03:51.99#ibcon#*before write, iclass 16, count 0 2006.230.01:03:51.99#ibcon#enter sib2, iclass 16, count 0 2006.230.01:03:51.99#ibcon#flushed, iclass 16, count 0 2006.230.01:03:51.99#ibcon#about to write, iclass 16, count 0 2006.230.01:03:51.99#ibcon#wrote, iclass 16, count 0 2006.230.01:03:51.99#ibcon#about to read 3, iclass 16, count 0 2006.230.01:03:52.03#ibcon#read 3, iclass 16, count 0 2006.230.01:03:52.03#ibcon#about to read 4, iclass 16, count 0 2006.230.01:03:52.03#ibcon#read 4, iclass 16, count 0 2006.230.01:03:52.03#ibcon#about to read 5, iclass 16, count 0 2006.230.01:03:52.03#ibcon#read 5, iclass 16, count 0 2006.230.01:03:52.03#ibcon#about to read 6, iclass 16, count 0 2006.230.01:03:52.03#ibcon#read 6, iclass 16, count 0 2006.230.01:03:52.03#ibcon#end of sib2, iclass 16, count 0 2006.230.01:03:52.03#ibcon#*after write, iclass 16, count 0 2006.230.01:03:52.03#ibcon#*before return 0, iclass 16, count 0 2006.230.01:03:52.03#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:52.03#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:52.03#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:03:52.03#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:03:52.03$vck44/vb=1,4 2006.230.01:03:52.03#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.230.01:03:52.03#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.230.01:03:52.03#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:52.03#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:03:52.03#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:03:52.03#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:03:52.03#ibcon#enter wrdev, iclass 18, count 2 2006.230.01:03:52.03#ibcon#first serial, iclass 18, count 2 2006.230.01:03:52.03#ibcon#enter sib2, iclass 18, count 2 2006.230.01:03:52.03#ibcon#flushed, iclass 18, count 2 2006.230.01:03:52.03#ibcon#about to write, iclass 18, count 2 2006.230.01:03:52.03#ibcon#wrote, iclass 18, count 2 2006.230.01:03:52.03#ibcon#about to read 3, iclass 18, count 2 2006.230.01:03:52.05#ibcon#read 3, iclass 18, count 2 2006.230.01:03:52.05#ibcon#about to read 4, iclass 18, count 2 2006.230.01:03:52.05#ibcon#read 4, iclass 18, count 2 2006.230.01:03:52.05#ibcon#about to read 5, iclass 18, count 2 2006.230.01:03:52.05#ibcon#read 5, iclass 18, count 2 2006.230.01:03:52.05#ibcon#about to read 6, iclass 18, count 2 2006.230.01:03:52.05#ibcon#read 6, iclass 18, count 2 2006.230.01:03:52.05#ibcon#end of sib2, iclass 18, count 2 2006.230.01:03:52.05#ibcon#*mode == 0, iclass 18, count 2 2006.230.01:03:52.05#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.230.01:03:52.05#ibcon#[27=AT01-04\r\n] 2006.230.01:03:52.05#ibcon#*before write, iclass 18, count 2 2006.230.01:03:52.05#ibcon#enter sib2, iclass 18, count 2 2006.230.01:03:52.05#ibcon#flushed, iclass 18, count 2 2006.230.01:03:52.05#ibcon#about to write, iclass 18, count 2 2006.230.01:03:52.05#ibcon#wrote, iclass 18, count 2 2006.230.01:03:52.05#ibcon#about to read 3, iclass 18, count 2 2006.230.01:03:52.08#ibcon#read 3, iclass 18, count 2 2006.230.01:03:52.08#ibcon#about to read 4, iclass 18, count 2 2006.230.01:03:52.08#ibcon#read 4, iclass 18, count 2 2006.230.01:03:52.08#ibcon#about to read 5, iclass 18, count 2 2006.230.01:03:52.08#ibcon#read 5, iclass 18, count 2 2006.230.01:03:52.08#ibcon#about to read 6, iclass 18, count 2 2006.230.01:03:52.08#ibcon#read 6, iclass 18, count 2 2006.230.01:03:52.08#ibcon#end of sib2, iclass 18, count 2 2006.230.01:03:52.08#ibcon#*after write, iclass 18, count 2 2006.230.01:03:52.08#ibcon#*before return 0, iclass 18, count 2 2006.230.01:03:52.08#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:03:52.08#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:03:52.08#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.230.01:03:52.08#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:52.08#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:03:52.20#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:03:52.20#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:03:52.20#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:03:52.20#ibcon#first serial, iclass 18, count 0 2006.230.01:03:52.20#ibcon#enter sib2, iclass 18, count 0 2006.230.01:03:52.20#ibcon#flushed, iclass 18, count 0 2006.230.01:03:52.20#ibcon#about to write, iclass 18, count 0 2006.230.01:03:52.20#ibcon#wrote, iclass 18, count 0 2006.230.01:03:52.20#ibcon#about to read 3, iclass 18, count 0 2006.230.01:03:52.22#ibcon#read 3, iclass 18, count 0 2006.230.01:03:52.22#ibcon#about to read 4, iclass 18, count 0 2006.230.01:03:52.22#ibcon#read 4, iclass 18, count 0 2006.230.01:03:52.22#ibcon#about to read 5, iclass 18, count 0 2006.230.01:03:52.22#ibcon#read 5, iclass 18, count 0 2006.230.01:03:52.22#ibcon#about to read 6, iclass 18, count 0 2006.230.01:03:52.22#ibcon#read 6, iclass 18, count 0 2006.230.01:03:52.22#ibcon#end of sib2, iclass 18, count 0 2006.230.01:03:52.22#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:03:52.22#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:03:52.22#ibcon#[27=USB\r\n] 2006.230.01:03:52.22#ibcon#*before write, iclass 18, count 0 2006.230.01:03:52.22#ibcon#enter sib2, iclass 18, count 0 2006.230.01:03:52.22#ibcon#flushed, iclass 18, count 0 2006.230.01:03:52.22#ibcon#about to write, iclass 18, count 0 2006.230.01:03:52.22#ibcon#wrote, iclass 18, count 0 2006.230.01:03:52.22#ibcon#about to read 3, iclass 18, count 0 2006.230.01:03:52.25#ibcon#read 3, iclass 18, count 0 2006.230.01:03:52.25#ibcon#about to read 4, iclass 18, count 0 2006.230.01:03:52.25#ibcon#read 4, iclass 18, count 0 2006.230.01:03:52.25#ibcon#about to read 5, iclass 18, count 0 2006.230.01:03:52.25#ibcon#read 5, iclass 18, count 0 2006.230.01:03:52.25#ibcon#about to read 6, iclass 18, count 0 2006.230.01:03:52.25#ibcon#read 6, iclass 18, count 0 2006.230.01:03:52.25#ibcon#end of sib2, iclass 18, count 0 2006.230.01:03:52.25#ibcon#*after write, iclass 18, count 0 2006.230.01:03:52.25#ibcon#*before return 0, iclass 18, count 0 2006.230.01:03:52.25#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:03:52.25#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:03:52.25#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:03:52.25#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:03:52.25$vck44/vblo=2,634.99 2006.230.01:03:52.25#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.01:03:52.25#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.01:03:52.25#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:52.25#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:52.25#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:52.25#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:52.25#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:03:52.25#ibcon#first serial, iclass 20, count 0 2006.230.01:03:52.25#ibcon#enter sib2, iclass 20, count 0 2006.230.01:03:52.25#ibcon#flushed, iclass 20, count 0 2006.230.01:03:52.25#ibcon#about to write, iclass 20, count 0 2006.230.01:03:52.25#ibcon#wrote, iclass 20, count 0 2006.230.01:03:52.25#ibcon#about to read 3, iclass 20, count 0 2006.230.01:03:52.27#ibcon#read 3, iclass 20, count 0 2006.230.01:03:52.27#ibcon#about to read 4, iclass 20, count 0 2006.230.01:03:52.27#ibcon#read 4, iclass 20, count 0 2006.230.01:03:52.27#ibcon#about to read 5, iclass 20, count 0 2006.230.01:03:52.27#ibcon#read 5, iclass 20, count 0 2006.230.01:03:52.27#ibcon#about to read 6, iclass 20, count 0 2006.230.01:03:52.27#ibcon#read 6, iclass 20, count 0 2006.230.01:03:52.27#ibcon#end of sib2, iclass 20, count 0 2006.230.01:03:52.27#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:03:52.27#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:03:52.27#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:03:52.27#ibcon#*before write, iclass 20, count 0 2006.230.01:03:52.27#ibcon#enter sib2, iclass 20, count 0 2006.230.01:03:52.27#ibcon#flushed, iclass 20, count 0 2006.230.01:03:52.27#ibcon#about to write, iclass 20, count 0 2006.230.01:03:52.27#ibcon#wrote, iclass 20, count 0 2006.230.01:03:52.27#ibcon#about to read 3, iclass 20, count 0 2006.230.01:03:52.31#ibcon#read 3, iclass 20, count 0 2006.230.01:03:52.31#ibcon#about to read 4, iclass 20, count 0 2006.230.01:03:52.31#ibcon#read 4, iclass 20, count 0 2006.230.01:03:52.31#ibcon#about to read 5, iclass 20, count 0 2006.230.01:03:52.31#ibcon#read 5, iclass 20, count 0 2006.230.01:03:52.31#ibcon#about to read 6, iclass 20, count 0 2006.230.01:03:52.31#ibcon#read 6, iclass 20, count 0 2006.230.01:03:52.31#ibcon#end of sib2, iclass 20, count 0 2006.230.01:03:52.31#ibcon#*after write, iclass 20, count 0 2006.230.01:03:52.31#ibcon#*before return 0, iclass 20, count 0 2006.230.01:03:52.31#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:52.31#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:03:52.31#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:03:52.31#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:03:52.31$vck44/vb=2,4 2006.230.01:03:52.31#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.01:03:52.31#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.01:03:52.31#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:52.31#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:52.37#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:52.37#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:52.37#ibcon#enter wrdev, iclass 22, count 2 2006.230.01:03:52.37#ibcon#first serial, iclass 22, count 2 2006.230.01:03:52.37#ibcon#enter sib2, iclass 22, count 2 2006.230.01:03:52.37#ibcon#flushed, iclass 22, count 2 2006.230.01:03:52.37#ibcon#about to write, iclass 22, count 2 2006.230.01:03:52.37#ibcon#wrote, iclass 22, count 2 2006.230.01:03:52.37#ibcon#about to read 3, iclass 22, count 2 2006.230.01:03:52.39#ibcon#read 3, iclass 22, count 2 2006.230.01:03:52.39#ibcon#about to read 4, iclass 22, count 2 2006.230.01:03:52.39#ibcon#read 4, iclass 22, count 2 2006.230.01:03:52.39#ibcon#about to read 5, iclass 22, count 2 2006.230.01:03:52.39#ibcon#read 5, iclass 22, count 2 2006.230.01:03:52.39#ibcon#about to read 6, iclass 22, count 2 2006.230.01:03:52.39#ibcon#read 6, iclass 22, count 2 2006.230.01:03:52.39#ibcon#end of sib2, iclass 22, count 2 2006.230.01:03:52.39#ibcon#*mode == 0, iclass 22, count 2 2006.230.01:03:52.39#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.01:03:52.39#ibcon#[27=AT02-04\r\n] 2006.230.01:03:52.39#ibcon#*before write, iclass 22, count 2 2006.230.01:03:52.39#ibcon#enter sib2, iclass 22, count 2 2006.230.01:03:52.39#ibcon#flushed, iclass 22, count 2 2006.230.01:03:52.39#ibcon#about to write, iclass 22, count 2 2006.230.01:03:52.39#ibcon#wrote, iclass 22, count 2 2006.230.01:03:52.39#ibcon#about to read 3, iclass 22, count 2 2006.230.01:03:52.42#ibcon#read 3, iclass 22, count 2 2006.230.01:03:52.42#ibcon#about to read 4, iclass 22, count 2 2006.230.01:03:52.42#ibcon#read 4, iclass 22, count 2 2006.230.01:03:52.42#ibcon#about to read 5, iclass 22, count 2 2006.230.01:03:52.42#ibcon#read 5, iclass 22, count 2 2006.230.01:03:52.42#ibcon#about to read 6, iclass 22, count 2 2006.230.01:03:52.42#ibcon#read 6, iclass 22, count 2 2006.230.01:03:52.42#ibcon#end of sib2, iclass 22, count 2 2006.230.01:03:52.42#ibcon#*after write, iclass 22, count 2 2006.230.01:03:52.42#ibcon#*before return 0, iclass 22, count 2 2006.230.01:03:52.42#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:52.42#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:03:52.42#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.01:03:52.42#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:52.42#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:52.54#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:52.54#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:52.54#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:03:52.54#ibcon#first serial, iclass 22, count 0 2006.230.01:03:52.54#ibcon#enter sib2, iclass 22, count 0 2006.230.01:03:52.54#ibcon#flushed, iclass 22, count 0 2006.230.01:03:52.54#ibcon#about to write, iclass 22, count 0 2006.230.01:03:52.54#ibcon#wrote, iclass 22, count 0 2006.230.01:03:52.54#ibcon#about to read 3, iclass 22, count 0 2006.230.01:03:52.56#ibcon#read 3, iclass 22, count 0 2006.230.01:03:52.56#ibcon#about to read 4, iclass 22, count 0 2006.230.01:03:52.56#ibcon#read 4, iclass 22, count 0 2006.230.01:03:52.56#ibcon#about to read 5, iclass 22, count 0 2006.230.01:03:52.56#ibcon#read 5, iclass 22, count 0 2006.230.01:03:52.56#ibcon#about to read 6, iclass 22, count 0 2006.230.01:03:52.56#ibcon#read 6, iclass 22, count 0 2006.230.01:03:52.56#ibcon#end of sib2, iclass 22, count 0 2006.230.01:03:52.56#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:03:52.56#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:03:52.56#ibcon#[27=USB\r\n] 2006.230.01:03:52.56#ibcon#*before write, iclass 22, count 0 2006.230.01:03:52.56#ibcon#enter sib2, iclass 22, count 0 2006.230.01:03:52.56#ibcon#flushed, iclass 22, count 0 2006.230.01:03:52.56#ibcon#about to write, iclass 22, count 0 2006.230.01:03:52.56#ibcon#wrote, iclass 22, count 0 2006.230.01:03:52.56#ibcon#about to read 3, iclass 22, count 0 2006.230.01:03:52.59#ibcon#read 3, iclass 22, count 0 2006.230.01:03:52.59#ibcon#about to read 4, iclass 22, count 0 2006.230.01:03:52.59#ibcon#read 4, iclass 22, count 0 2006.230.01:03:52.59#ibcon#about to read 5, iclass 22, count 0 2006.230.01:03:52.59#ibcon#read 5, iclass 22, count 0 2006.230.01:03:52.59#ibcon#about to read 6, iclass 22, count 0 2006.230.01:03:52.59#ibcon#read 6, iclass 22, count 0 2006.230.01:03:52.59#ibcon#end of sib2, iclass 22, count 0 2006.230.01:03:52.59#ibcon#*after write, iclass 22, count 0 2006.230.01:03:52.59#ibcon#*before return 0, iclass 22, count 0 2006.230.01:03:52.59#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:52.59#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:03:52.59#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:03:52.59#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:03:52.59$vck44/vblo=3,649.99 2006.230.01:03:52.59#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.01:03:52.59#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.01:03:52.59#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:52.59#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:52.59#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:52.59#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:52.59#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:03:52.59#ibcon#first serial, iclass 24, count 0 2006.230.01:03:52.59#ibcon#enter sib2, iclass 24, count 0 2006.230.01:03:52.59#ibcon#flushed, iclass 24, count 0 2006.230.01:03:52.59#ibcon#about to write, iclass 24, count 0 2006.230.01:03:52.59#ibcon#wrote, iclass 24, count 0 2006.230.01:03:52.59#ibcon#about to read 3, iclass 24, count 0 2006.230.01:03:52.61#ibcon#read 3, iclass 24, count 0 2006.230.01:03:52.61#ibcon#about to read 4, iclass 24, count 0 2006.230.01:03:52.61#ibcon#read 4, iclass 24, count 0 2006.230.01:03:52.61#ibcon#about to read 5, iclass 24, count 0 2006.230.01:03:52.61#ibcon#read 5, iclass 24, count 0 2006.230.01:03:52.61#ibcon#about to read 6, iclass 24, count 0 2006.230.01:03:52.61#ibcon#read 6, iclass 24, count 0 2006.230.01:03:52.61#ibcon#end of sib2, iclass 24, count 0 2006.230.01:03:52.61#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:03:52.61#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:03:52.61#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:03:52.61#ibcon#*before write, iclass 24, count 0 2006.230.01:03:52.61#ibcon#enter sib2, iclass 24, count 0 2006.230.01:03:52.61#ibcon#flushed, iclass 24, count 0 2006.230.01:03:52.61#ibcon#about to write, iclass 24, count 0 2006.230.01:03:52.61#ibcon#wrote, iclass 24, count 0 2006.230.01:03:52.61#ibcon#about to read 3, iclass 24, count 0 2006.230.01:03:52.65#ibcon#read 3, iclass 24, count 0 2006.230.01:03:52.65#ibcon#about to read 4, iclass 24, count 0 2006.230.01:03:52.65#ibcon#read 4, iclass 24, count 0 2006.230.01:03:52.65#ibcon#about to read 5, iclass 24, count 0 2006.230.01:03:52.65#ibcon#read 5, iclass 24, count 0 2006.230.01:03:52.65#ibcon#about to read 6, iclass 24, count 0 2006.230.01:03:52.65#ibcon#read 6, iclass 24, count 0 2006.230.01:03:52.65#ibcon#end of sib2, iclass 24, count 0 2006.230.01:03:52.65#ibcon#*after write, iclass 24, count 0 2006.230.01:03:52.65#ibcon#*before return 0, iclass 24, count 0 2006.230.01:03:52.65#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:52.65#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:03:52.65#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:03:52.65#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:03:52.65$vck44/vb=3,4 2006.230.01:03:52.65#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.01:03:52.65#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.01:03:52.65#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:52.65#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:52.71#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:52.71#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:52.71#ibcon#enter wrdev, iclass 26, count 2 2006.230.01:03:52.71#ibcon#first serial, iclass 26, count 2 2006.230.01:03:52.71#ibcon#enter sib2, iclass 26, count 2 2006.230.01:03:52.71#ibcon#flushed, iclass 26, count 2 2006.230.01:03:52.71#ibcon#about to write, iclass 26, count 2 2006.230.01:03:52.71#ibcon#wrote, iclass 26, count 2 2006.230.01:03:52.71#ibcon#about to read 3, iclass 26, count 2 2006.230.01:03:52.73#ibcon#read 3, iclass 26, count 2 2006.230.01:03:52.73#ibcon#about to read 4, iclass 26, count 2 2006.230.01:03:52.73#ibcon#read 4, iclass 26, count 2 2006.230.01:03:52.73#ibcon#about to read 5, iclass 26, count 2 2006.230.01:03:52.73#ibcon#read 5, iclass 26, count 2 2006.230.01:03:52.73#ibcon#about to read 6, iclass 26, count 2 2006.230.01:03:52.73#ibcon#read 6, iclass 26, count 2 2006.230.01:03:52.73#ibcon#end of sib2, iclass 26, count 2 2006.230.01:03:52.73#ibcon#*mode == 0, iclass 26, count 2 2006.230.01:03:52.73#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.01:03:52.73#ibcon#[27=AT03-04\r\n] 2006.230.01:03:52.73#ibcon#*before write, iclass 26, count 2 2006.230.01:03:52.73#ibcon#enter sib2, iclass 26, count 2 2006.230.01:03:52.73#ibcon#flushed, iclass 26, count 2 2006.230.01:03:52.73#ibcon#about to write, iclass 26, count 2 2006.230.01:03:52.73#ibcon#wrote, iclass 26, count 2 2006.230.01:03:52.73#ibcon#about to read 3, iclass 26, count 2 2006.230.01:03:52.76#ibcon#read 3, iclass 26, count 2 2006.230.01:03:52.76#ibcon#about to read 4, iclass 26, count 2 2006.230.01:03:52.76#ibcon#read 4, iclass 26, count 2 2006.230.01:03:52.76#ibcon#about to read 5, iclass 26, count 2 2006.230.01:03:52.76#ibcon#read 5, iclass 26, count 2 2006.230.01:03:52.76#ibcon#about to read 6, iclass 26, count 2 2006.230.01:03:52.76#ibcon#read 6, iclass 26, count 2 2006.230.01:03:52.76#ibcon#end of sib2, iclass 26, count 2 2006.230.01:03:52.76#ibcon#*after write, iclass 26, count 2 2006.230.01:03:52.76#ibcon#*before return 0, iclass 26, count 2 2006.230.01:03:52.76#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:52.76#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:03:52.76#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.01:03:52.76#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:52.76#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:52.88#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:52.88#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:52.88#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:03:52.88#ibcon#first serial, iclass 26, count 0 2006.230.01:03:52.88#ibcon#enter sib2, iclass 26, count 0 2006.230.01:03:52.88#ibcon#flushed, iclass 26, count 0 2006.230.01:03:52.88#ibcon#about to write, iclass 26, count 0 2006.230.01:03:52.88#ibcon#wrote, iclass 26, count 0 2006.230.01:03:52.88#ibcon#about to read 3, iclass 26, count 0 2006.230.01:03:52.90#ibcon#read 3, iclass 26, count 0 2006.230.01:03:52.90#ibcon#about to read 4, iclass 26, count 0 2006.230.01:03:52.90#ibcon#read 4, iclass 26, count 0 2006.230.01:03:52.90#ibcon#about to read 5, iclass 26, count 0 2006.230.01:03:52.90#ibcon#read 5, iclass 26, count 0 2006.230.01:03:52.90#ibcon#about to read 6, iclass 26, count 0 2006.230.01:03:52.90#ibcon#read 6, iclass 26, count 0 2006.230.01:03:52.90#ibcon#end of sib2, iclass 26, count 0 2006.230.01:03:52.90#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:03:52.90#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:03:52.90#ibcon#[27=USB\r\n] 2006.230.01:03:52.90#ibcon#*before write, iclass 26, count 0 2006.230.01:03:52.90#ibcon#enter sib2, iclass 26, count 0 2006.230.01:03:52.90#ibcon#flushed, iclass 26, count 0 2006.230.01:03:52.90#ibcon#about to write, iclass 26, count 0 2006.230.01:03:52.90#ibcon#wrote, iclass 26, count 0 2006.230.01:03:52.90#ibcon#about to read 3, iclass 26, count 0 2006.230.01:03:52.93#ibcon#read 3, iclass 26, count 0 2006.230.01:03:52.93#ibcon#about to read 4, iclass 26, count 0 2006.230.01:03:52.93#ibcon#read 4, iclass 26, count 0 2006.230.01:03:52.93#ibcon#about to read 5, iclass 26, count 0 2006.230.01:03:52.93#ibcon#read 5, iclass 26, count 0 2006.230.01:03:52.93#ibcon#about to read 6, iclass 26, count 0 2006.230.01:03:52.93#ibcon#read 6, iclass 26, count 0 2006.230.01:03:52.93#ibcon#end of sib2, iclass 26, count 0 2006.230.01:03:52.93#ibcon#*after write, iclass 26, count 0 2006.230.01:03:52.93#ibcon#*before return 0, iclass 26, count 0 2006.230.01:03:52.93#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:52.93#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:03:52.93#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:03:52.93#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:03:52.93$vck44/vblo=4,679.99 2006.230.01:03:52.93#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.01:03:52.93#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.01:03:52.93#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:52.93#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:52.93#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:52.93#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:52.93#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:03:52.93#ibcon#first serial, iclass 28, count 0 2006.230.01:03:52.93#ibcon#enter sib2, iclass 28, count 0 2006.230.01:03:52.93#ibcon#flushed, iclass 28, count 0 2006.230.01:03:52.93#ibcon#about to write, iclass 28, count 0 2006.230.01:03:52.93#ibcon#wrote, iclass 28, count 0 2006.230.01:03:52.93#ibcon#about to read 3, iclass 28, count 0 2006.230.01:03:52.95#ibcon#read 3, iclass 28, count 0 2006.230.01:03:52.95#ibcon#about to read 4, iclass 28, count 0 2006.230.01:03:52.95#ibcon#read 4, iclass 28, count 0 2006.230.01:03:52.95#ibcon#about to read 5, iclass 28, count 0 2006.230.01:03:52.95#ibcon#read 5, iclass 28, count 0 2006.230.01:03:52.95#ibcon#about to read 6, iclass 28, count 0 2006.230.01:03:52.95#ibcon#read 6, iclass 28, count 0 2006.230.01:03:52.95#ibcon#end of sib2, iclass 28, count 0 2006.230.01:03:52.95#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:03:52.95#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:03:52.95#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:03:52.95#ibcon#*before write, iclass 28, count 0 2006.230.01:03:52.95#ibcon#enter sib2, iclass 28, count 0 2006.230.01:03:52.95#ibcon#flushed, iclass 28, count 0 2006.230.01:03:52.95#ibcon#about to write, iclass 28, count 0 2006.230.01:03:52.95#ibcon#wrote, iclass 28, count 0 2006.230.01:03:52.95#ibcon#about to read 3, iclass 28, count 0 2006.230.01:03:52.99#ibcon#read 3, iclass 28, count 0 2006.230.01:03:52.99#ibcon#about to read 4, iclass 28, count 0 2006.230.01:03:52.99#ibcon#read 4, iclass 28, count 0 2006.230.01:03:52.99#ibcon#about to read 5, iclass 28, count 0 2006.230.01:03:52.99#ibcon#read 5, iclass 28, count 0 2006.230.01:03:52.99#ibcon#about to read 6, iclass 28, count 0 2006.230.01:03:52.99#ibcon#read 6, iclass 28, count 0 2006.230.01:03:52.99#ibcon#end of sib2, iclass 28, count 0 2006.230.01:03:52.99#ibcon#*after write, iclass 28, count 0 2006.230.01:03:52.99#ibcon#*before return 0, iclass 28, count 0 2006.230.01:03:52.99#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:52.99#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:03:52.99#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:03:52.99#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:03:52.99$vck44/vb=4,4 2006.230.01:03:52.99#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.01:03:52.99#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.01:03:52.99#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:52.99#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:53.05#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:53.05#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:53.05#ibcon#enter wrdev, iclass 30, count 2 2006.230.01:03:53.05#ibcon#first serial, iclass 30, count 2 2006.230.01:03:53.05#ibcon#enter sib2, iclass 30, count 2 2006.230.01:03:53.05#ibcon#flushed, iclass 30, count 2 2006.230.01:03:53.05#ibcon#about to write, iclass 30, count 2 2006.230.01:03:53.05#ibcon#wrote, iclass 30, count 2 2006.230.01:03:53.05#ibcon#about to read 3, iclass 30, count 2 2006.230.01:03:53.07#ibcon#read 3, iclass 30, count 2 2006.230.01:03:53.07#ibcon#about to read 4, iclass 30, count 2 2006.230.01:03:53.07#ibcon#read 4, iclass 30, count 2 2006.230.01:03:53.07#ibcon#about to read 5, iclass 30, count 2 2006.230.01:03:53.07#ibcon#read 5, iclass 30, count 2 2006.230.01:03:53.07#ibcon#about to read 6, iclass 30, count 2 2006.230.01:03:53.07#ibcon#read 6, iclass 30, count 2 2006.230.01:03:53.07#ibcon#end of sib2, iclass 30, count 2 2006.230.01:03:53.07#ibcon#*mode == 0, iclass 30, count 2 2006.230.01:03:53.07#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.01:03:53.07#ibcon#[27=AT04-04\r\n] 2006.230.01:03:53.07#ibcon#*before write, iclass 30, count 2 2006.230.01:03:53.07#ibcon#enter sib2, iclass 30, count 2 2006.230.01:03:53.07#ibcon#flushed, iclass 30, count 2 2006.230.01:03:53.07#ibcon#about to write, iclass 30, count 2 2006.230.01:03:53.07#ibcon#wrote, iclass 30, count 2 2006.230.01:03:53.07#ibcon#about to read 3, iclass 30, count 2 2006.230.01:03:53.10#ibcon#read 3, iclass 30, count 2 2006.230.01:03:53.10#ibcon#about to read 4, iclass 30, count 2 2006.230.01:03:53.10#ibcon#read 4, iclass 30, count 2 2006.230.01:03:53.10#ibcon#about to read 5, iclass 30, count 2 2006.230.01:03:53.10#ibcon#read 5, iclass 30, count 2 2006.230.01:03:53.10#ibcon#about to read 6, iclass 30, count 2 2006.230.01:03:53.10#ibcon#read 6, iclass 30, count 2 2006.230.01:03:53.10#ibcon#end of sib2, iclass 30, count 2 2006.230.01:03:53.10#ibcon#*after write, iclass 30, count 2 2006.230.01:03:53.10#ibcon#*before return 0, iclass 30, count 2 2006.230.01:03:53.10#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:53.10#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:03:53.10#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.01:03:53.10#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:53.10#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:53.22#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:53.22#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:53.22#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:03:53.22#ibcon#first serial, iclass 30, count 0 2006.230.01:03:53.22#ibcon#enter sib2, iclass 30, count 0 2006.230.01:03:53.22#ibcon#flushed, iclass 30, count 0 2006.230.01:03:53.22#ibcon#about to write, iclass 30, count 0 2006.230.01:03:53.22#ibcon#wrote, iclass 30, count 0 2006.230.01:03:53.22#ibcon#about to read 3, iclass 30, count 0 2006.230.01:03:53.24#ibcon#read 3, iclass 30, count 0 2006.230.01:03:53.24#ibcon#about to read 4, iclass 30, count 0 2006.230.01:03:53.24#ibcon#read 4, iclass 30, count 0 2006.230.01:03:53.24#ibcon#about to read 5, iclass 30, count 0 2006.230.01:03:53.24#ibcon#read 5, iclass 30, count 0 2006.230.01:03:53.24#ibcon#about to read 6, iclass 30, count 0 2006.230.01:03:53.24#ibcon#read 6, iclass 30, count 0 2006.230.01:03:53.24#ibcon#end of sib2, iclass 30, count 0 2006.230.01:03:53.24#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:03:53.24#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:03:53.24#ibcon#[27=USB\r\n] 2006.230.01:03:53.24#ibcon#*before write, iclass 30, count 0 2006.230.01:03:53.24#ibcon#enter sib2, iclass 30, count 0 2006.230.01:03:53.24#ibcon#flushed, iclass 30, count 0 2006.230.01:03:53.24#ibcon#about to write, iclass 30, count 0 2006.230.01:03:53.24#ibcon#wrote, iclass 30, count 0 2006.230.01:03:53.24#ibcon#about to read 3, iclass 30, count 0 2006.230.01:03:53.27#ibcon#read 3, iclass 30, count 0 2006.230.01:03:53.27#ibcon#about to read 4, iclass 30, count 0 2006.230.01:03:53.27#ibcon#read 4, iclass 30, count 0 2006.230.01:03:53.27#ibcon#about to read 5, iclass 30, count 0 2006.230.01:03:53.27#ibcon#read 5, iclass 30, count 0 2006.230.01:03:53.27#ibcon#about to read 6, iclass 30, count 0 2006.230.01:03:53.27#ibcon#read 6, iclass 30, count 0 2006.230.01:03:53.27#ibcon#end of sib2, iclass 30, count 0 2006.230.01:03:53.27#ibcon#*after write, iclass 30, count 0 2006.230.01:03:53.27#ibcon#*before return 0, iclass 30, count 0 2006.230.01:03:53.27#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:53.27#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:03:53.27#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:03:53.27#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:03:53.27$vck44/vblo=5,709.99 2006.230.01:03:53.27#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.01:03:53.27#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.01:03:53.27#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:53.27#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:53.27#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:53.27#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:53.27#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:03:53.27#ibcon#first serial, iclass 32, count 0 2006.230.01:03:53.27#ibcon#enter sib2, iclass 32, count 0 2006.230.01:03:53.27#ibcon#flushed, iclass 32, count 0 2006.230.01:03:53.27#ibcon#about to write, iclass 32, count 0 2006.230.01:03:53.27#ibcon#wrote, iclass 32, count 0 2006.230.01:03:53.27#ibcon#about to read 3, iclass 32, count 0 2006.230.01:03:53.29#ibcon#read 3, iclass 32, count 0 2006.230.01:03:53.29#ibcon#about to read 4, iclass 32, count 0 2006.230.01:03:53.29#ibcon#read 4, iclass 32, count 0 2006.230.01:03:53.29#ibcon#about to read 5, iclass 32, count 0 2006.230.01:03:53.29#ibcon#read 5, iclass 32, count 0 2006.230.01:03:53.29#ibcon#about to read 6, iclass 32, count 0 2006.230.01:03:53.29#ibcon#read 6, iclass 32, count 0 2006.230.01:03:53.29#ibcon#end of sib2, iclass 32, count 0 2006.230.01:03:53.29#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:03:53.29#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:03:53.29#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:03:53.29#ibcon#*before write, iclass 32, count 0 2006.230.01:03:53.29#ibcon#enter sib2, iclass 32, count 0 2006.230.01:03:53.29#ibcon#flushed, iclass 32, count 0 2006.230.01:03:53.29#ibcon#about to write, iclass 32, count 0 2006.230.01:03:53.29#ibcon#wrote, iclass 32, count 0 2006.230.01:03:53.29#ibcon#about to read 3, iclass 32, count 0 2006.230.01:03:53.33#ibcon#read 3, iclass 32, count 0 2006.230.01:03:53.33#ibcon#about to read 4, iclass 32, count 0 2006.230.01:03:53.33#ibcon#read 4, iclass 32, count 0 2006.230.01:03:53.33#ibcon#about to read 5, iclass 32, count 0 2006.230.01:03:53.33#ibcon#read 5, iclass 32, count 0 2006.230.01:03:53.33#ibcon#about to read 6, iclass 32, count 0 2006.230.01:03:53.33#ibcon#read 6, iclass 32, count 0 2006.230.01:03:53.33#ibcon#end of sib2, iclass 32, count 0 2006.230.01:03:53.33#ibcon#*after write, iclass 32, count 0 2006.230.01:03:53.33#ibcon#*before return 0, iclass 32, count 0 2006.230.01:03:53.33#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:53.33#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:03:53.33#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:03:53.33#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:03:53.33$vck44/vb=5,4 2006.230.01:03:53.33#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.01:03:53.33#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.01:03:53.33#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:53.33#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:53.39#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:53.39#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:53.39#ibcon#enter wrdev, iclass 34, count 2 2006.230.01:03:53.39#ibcon#first serial, iclass 34, count 2 2006.230.01:03:53.39#ibcon#enter sib2, iclass 34, count 2 2006.230.01:03:53.39#ibcon#flushed, iclass 34, count 2 2006.230.01:03:53.39#ibcon#about to write, iclass 34, count 2 2006.230.01:03:53.39#ibcon#wrote, iclass 34, count 2 2006.230.01:03:53.39#ibcon#about to read 3, iclass 34, count 2 2006.230.01:03:53.41#ibcon#read 3, iclass 34, count 2 2006.230.01:03:53.41#ibcon#about to read 4, iclass 34, count 2 2006.230.01:03:53.41#ibcon#read 4, iclass 34, count 2 2006.230.01:03:53.41#ibcon#about to read 5, iclass 34, count 2 2006.230.01:03:53.41#ibcon#read 5, iclass 34, count 2 2006.230.01:03:53.41#ibcon#about to read 6, iclass 34, count 2 2006.230.01:03:53.41#ibcon#read 6, iclass 34, count 2 2006.230.01:03:53.41#ibcon#end of sib2, iclass 34, count 2 2006.230.01:03:53.41#ibcon#*mode == 0, iclass 34, count 2 2006.230.01:03:53.41#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.01:03:53.41#ibcon#[27=AT05-04\r\n] 2006.230.01:03:53.41#ibcon#*before write, iclass 34, count 2 2006.230.01:03:53.41#ibcon#enter sib2, iclass 34, count 2 2006.230.01:03:53.41#ibcon#flushed, iclass 34, count 2 2006.230.01:03:53.41#ibcon#about to write, iclass 34, count 2 2006.230.01:03:53.41#ibcon#wrote, iclass 34, count 2 2006.230.01:03:53.41#ibcon#about to read 3, iclass 34, count 2 2006.230.01:03:53.43#abcon#<5=/08 1.9 6.2 32.35 721002.8\r\n> 2006.230.01:03:53.44#ibcon#read 3, iclass 34, count 2 2006.230.01:03:53.44#ibcon#about to read 4, iclass 34, count 2 2006.230.01:03:53.44#ibcon#read 4, iclass 34, count 2 2006.230.01:03:53.44#ibcon#about to read 5, iclass 34, count 2 2006.230.01:03:53.44#ibcon#read 5, iclass 34, count 2 2006.230.01:03:53.44#ibcon#about to read 6, iclass 34, count 2 2006.230.01:03:53.44#ibcon#read 6, iclass 34, count 2 2006.230.01:03:53.44#ibcon#end of sib2, iclass 34, count 2 2006.230.01:03:53.44#ibcon#*after write, iclass 34, count 2 2006.230.01:03:53.44#ibcon#*before return 0, iclass 34, count 2 2006.230.01:03:53.44#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:53.44#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:03:53.44#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.01:03:53.44#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:53.44#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:53.45#abcon#{5=INTERFACE CLEAR} 2006.230.01:03:53.51#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:03:53.56#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:53.56#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:53.56#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:03:53.56#ibcon#first serial, iclass 34, count 0 2006.230.01:03:53.56#ibcon#enter sib2, iclass 34, count 0 2006.230.01:03:53.56#ibcon#flushed, iclass 34, count 0 2006.230.01:03:53.56#ibcon#about to write, iclass 34, count 0 2006.230.01:03:53.56#ibcon#wrote, iclass 34, count 0 2006.230.01:03:53.56#ibcon#about to read 3, iclass 34, count 0 2006.230.01:03:53.58#ibcon#read 3, iclass 34, count 0 2006.230.01:03:53.58#ibcon#about to read 4, iclass 34, count 0 2006.230.01:03:53.58#ibcon#read 4, iclass 34, count 0 2006.230.01:03:53.58#ibcon#about to read 5, iclass 34, count 0 2006.230.01:03:53.58#ibcon#read 5, iclass 34, count 0 2006.230.01:03:53.58#ibcon#about to read 6, iclass 34, count 0 2006.230.01:03:53.58#ibcon#read 6, iclass 34, count 0 2006.230.01:03:53.58#ibcon#end of sib2, iclass 34, count 0 2006.230.01:03:53.58#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:03:53.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:03:53.58#ibcon#[27=USB\r\n] 2006.230.01:03:53.58#ibcon#*before write, iclass 34, count 0 2006.230.01:03:53.58#ibcon#enter sib2, iclass 34, count 0 2006.230.01:03:53.58#ibcon#flushed, iclass 34, count 0 2006.230.01:03:53.58#ibcon#about to write, iclass 34, count 0 2006.230.01:03:53.58#ibcon#wrote, iclass 34, count 0 2006.230.01:03:53.58#ibcon#about to read 3, iclass 34, count 0 2006.230.01:03:53.61#ibcon#read 3, iclass 34, count 0 2006.230.01:03:53.61#ibcon#about to read 4, iclass 34, count 0 2006.230.01:03:53.61#ibcon#read 4, iclass 34, count 0 2006.230.01:03:53.61#ibcon#about to read 5, iclass 34, count 0 2006.230.01:03:53.61#ibcon#read 5, iclass 34, count 0 2006.230.01:03:53.61#ibcon#about to read 6, iclass 34, count 0 2006.230.01:03:53.61#ibcon#read 6, iclass 34, count 0 2006.230.01:03:53.61#ibcon#end of sib2, iclass 34, count 0 2006.230.01:03:53.61#ibcon#*after write, iclass 34, count 0 2006.230.01:03:53.61#ibcon#*before return 0, iclass 34, count 0 2006.230.01:03:53.61#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:53.61#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:03:53.61#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:03:53.61#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:03:53.61$vck44/vblo=6,719.99 2006.230.01:03:53.61#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:03:53.61#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:03:53.61#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:53.61#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:53.61#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:53.61#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:53.61#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:03:53.61#ibcon#first serial, iclass 40, count 0 2006.230.01:03:53.61#ibcon#enter sib2, iclass 40, count 0 2006.230.01:03:53.61#ibcon#flushed, iclass 40, count 0 2006.230.01:03:53.61#ibcon#about to write, iclass 40, count 0 2006.230.01:03:53.61#ibcon#wrote, iclass 40, count 0 2006.230.01:03:53.61#ibcon#about to read 3, iclass 40, count 0 2006.230.01:03:53.63#ibcon#read 3, iclass 40, count 0 2006.230.01:03:53.63#ibcon#about to read 4, iclass 40, count 0 2006.230.01:03:53.63#ibcon#read 4, iclass 40, count 0 2006.230.01:03:53.63#ibcon#about to read 5, iclass 40, count 0 2006.230.01:03:53.63#ibcon#read 5, iclass 40, count 0 2006.230.01:03:53.63#ibcon#about to read 6, iclass 40, count 0 2006.230.01:03:53.63#ibcon#read 6, iclass 40, count 0 2006.230.01:03:53.63#ibcon#end of sib2, iclass 40, count 0 2006.230.01:03:53.63#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:03:53.63#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:03:53.63#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:03:53.63#ibcon#*before write, iclass 40, count 0 2006.230.01:03:53.63#ibcon#enter sib2, iclass 40, count 0 2006.230.01:03:53.63#ibcon#flushed, iclass 40, count 0 2006.230.01:03:53.63#ibcon#about to write, iclass 40, count 0 2006.230.01:03:53.63#ibcon#wrote, iclass 40, count 0 2006.230.01:03:53.63#ibcon#about to read 3, iclass 40, count 0 2006.230.01:03:53.67#ibcon#read 3, iclass 40, count 0 2006.230.01:03:53.67#ibcon#about to read 4, iclass 40, count 0 2006.230.01:03:53.67#ibcon#read 4, iclass 40, count 0 2006.230.01:03:53.67#ibcon#about to read 5, iclass 40, count 0 2006.230.01:03:53.67#ibcon#read 5, iclass 40, count 0 2006.230.01:03:53.67#ibcon#about to read 6, iclass 40, count 0 2006.230.01:03:53.67#ibcon#read 6, iclass 40, count 0 2006.230.01:03:53.67#ibcon#end of sib2, iclass 40, count 0 2006.230.01:03:53.67#ibcon#*after write, iclass 40, count 0 2006.230.01:03:53.67#ibcon#*before return 0, iclass 40, count 0 2006.230.01:03:53.67#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:53.67#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:03:53.67#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:03:53.67#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:03:53.67$vck44/vb=6,4 2006.230.01:03:53.67#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.01:03:53.67#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.01:03:53.67#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:53.67#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:53.73#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:53.73#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:53.73#ibcon#enter wrdev, iclass 4, count 2 2006.230.01:03:53.73#ibcon#first serial, iclass 4, count 2 2006.230.01:03:53.73#ibcon#enter sib2, iclass 4, count 2 2006.230.01:03:53.73#ibcon#flushed, iclass 4, count 2 2006.230.01:03:53.73#ibcon#about to write, iclass 4, count 2 2006.230.01:03:53.73#ibcon#wrote, iclass 4, count 2 2006.230.01:03:53.73#ibcon#about to read 3, iclass 4, count 2 2006.230.01:03:53.75#ibcon#read 3, iclass 4, count 2 2006.230.01:03:53.75#ibcon#about to read 4, iclass 4, count 2 2006.230.01:03:53.75#ibcon#read 4, iclass 4, count 2 2006.230.01:03:53.75#ibcon#about to read 5, iclass 4, count 2 2006.230.01:03:53.75#ibcon#read 5, iclass 4, count 2 2006.230.01:03:53.75#ibcon#about to read 6, iclass 4, count 2 2006.230.01:03:53.75#ibcon#read 6, iclass 4, count 2 2006.230.01:03:53.75#ibcon#end of sib2, iclass 4, count 2 2006.230.01:03:53.75#ibcon#*mode == 0, iclass 4, count 2 2006.230.01:03:53.75#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.01:03:53.75#ibcon#[27=AT06-04\r\n] 2006.230.01:03:53.75#ibcon#*before write, iclass 4, count 2 2006.230.01:03:53.75#ibcon#enter sib2, iclass 4, count 2 2006.230.01:03:53.75#ibcon#flushed, iclass 4, count 2 2006.230.01:03:53.75#ibcon#about to write, iclass 4, count 2 2006.230.01:03:53.75#ibcon#wrote, iclass 4, count 2 2006.230.01:03:53.75#ibcon#about to read 3, iclass 4, count 2 2006.230.01:03:53.78#ibcon#read 3, iclass 4, count 2 2006.230.01:03:53.78#ibcon#about to read 4, iclass 4, count 2 2006.230.01:03:53.78#ibcon#read 4, iclass 4, count 2 2006.230.01:03:53.78#ibcon#about to read 5, iclass 4, count 2 2006.230.01:03:53.78#ibcon#read 5, iclass 4, count 2 2006.230.01:03:53.78#ibcon#about to read 6, iclass 4, count 2 2006.230.01:03:53.78#ibcon#read 6, iclass 4, count 2 2006.230.01:03:53.78#ibcon#end of sib2, iclass 4, count 2 2006.230.01:03:53.78#ibcon#*after write, iclass 4, count 2 2006.230.01:03:53.78#ibcon#*before return 0, iclass 4, count 2 2006.230.01:03:53.78#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:53.78#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:03:53.78#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.01:03:53.78#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:53.78#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:53.90#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:53.90#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:53.90#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:03:53.90#ibcon#first serial, iclass 4, count 0 2006.230.01:03:53.90#ibcon#enter sib2, iclass 4, count 0 2006.230.01:03:53.90#ibcon#flushed, iclass 4, count 0 2006.230.01:03:53.90#ibcon#about to write, iclass 4, count 0 2006.230.01:03:53.90#ibcon#wrote, iclass 4, count 0 2006.230.01:03:53.90#ibcon#about to read 3, iclass 4, count 0 2006.230.01:03:53.92#ibcon#read 3, iclass 4, count 0 2006.230.01:03:53.92#ibcon#about to read 4, iclass 4, count 0 2006.230.01:03:53.92#ibcon#read 4, iclass 4, count 0 2006.230.01:03:53.92#ibcon#about to read 5, iclass 4, count 0 2006.230.01:03:53.92#ibcon#read 5, iclass 4, count 0 2006.230.01:03:53.92#ibcon#about to read 6, iclass 4, count 0 2006.230.01:03:53.92#ibcon#read 6, iclass 4, count 0 2006.230.01:03:53.92#ibcon#end of sib2, iclass 4, count 0 2006.230.01:03:53.92#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:03:53.92#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:03:53.92#ibcon#[27=USB\r\n] 2006.230.01:03:53.92#ibcon#*before write, iclass 4, count 0 2006.230.01:03:53.92#ibcon#enter sib2, iclass 4, count 0 2006.230.01:03:53.92#ibcon#flushed, iclass 4, count 0 2006.230.01:03:53.92#ibcon#about to write, iclass 4, count 0 2006.230.01:03:53.92#ibcon#wrote, iclass 4, count 0 2006.230.01:03:53.92#ibcon#about to read 3, iclass 4, count 0 2006.230.01:03:53.95#ibcon#read 3, iclass 4, count 0 2006.230.01:03:53.95#ibcon#about to read 4, iclass 4, count 0 2006.230.01:03:53.95#ibcon#read 4, iclass 4, count 0 2006.230.01:03:53.95#ibcon#about to read 5, iclass 4, count 0 2006.230.01:03:53.95#ibcon#read 5, iclass 4, count 0 2006.230.01:03:53.95#ibcon#about to read 6, iclass 4, count 0 2006.230.01:03:53.95#ibcon#read 6, iclass 4, count 0 2006.230.01:03:53.95#ibcon#end of sib2, iclass 4, count 0 2006.230.01:03:53.95#ibcon#*after write, iclass 4, count 0 2006.230.01:03:53.95#ibcon#*before return 0, iclass 4, count 0 2006.230.01:03:53.95#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:53.95#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:03:53.95#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:03:53.95#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:03:53.95$vck44/vblo=7,734.99 2006.230.01:03:53.95#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:03:53.95#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:03:53.95#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:53.95#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:53.95#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:53.95#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:53.95#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:03:53.95#ibcon#first serial, iclass 6, count 0 2006.230.01:03:53.95#ibcon#enter sib2, iclass 6, count 0 2006.230.01:03:53.95#ibcon#flushed, iclass 6, count 0 2006.230.01:03:53.95#ibcon#about to write, iclass 6, count 0 2006.230.01:03:53.95#ibcon#wrote, iclass 6, count 0 2006.230.01:03:53.95#ibcon#about to read 3, iclass 6, count 0 2006.230.01:03:53.97#ibcon#read 3, iclass 6, count 0 2006.230.01:03:53.97#ibcon#about to read 4, iclass 6, count 0 2006.230.01:03:53.97#ibcon#read 4, iclass 6, count 0 2006.230.01:03:53.97#ibcon#about to read 5, iclass 6, count 0 2006.230.01:03:53.97#ibcon#read 5, iclass 6, count 0 2006.230.01:03:53.97#ibcon#about to read 6, iclass 6, count 0 2006.230.01:03:53.97#ibcon#read 6, iclass 6, count 0 2006.230.01:03:53.97#ibcon#end of sib2, iclass 6, count 0 2006.230.01:03:53.97#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:03:53.97#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:03:53.97#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:03:53.97#ibcon#*before write, iclass 6, count 0 2006.230.01:03:53.97#ibcon#enter sib2, iclass 6, count 0 2006.230.01:03:53.97#ibcon#flushed, iclass 6, count 0 2006.230.01:03:53.97#ibcon#about to write, iclass 6, count 0 2006.230.01:03:53.97#ibcon#wrote, iclass 6, count 0 2006.230.01:03:53.97#ibcon#about to read 3, iclass 6, count 0 2006.230.01:03:54.01#ibcon#read 3, iclass 6, count 0 2006.230.01:03:54.01#ibcon#about to read 4, iclass 6, count 0 2006.230.01:03:54.01#ibcon#read 4, iclass 6, count 0 2006.230.01:03:54.01#ibcon#about to read 5, iclass 6, count 0 2006.230.01:03:54.01#ibcon#read 5, iclass 6, count 0 2006.230.01:03:54.01#ibcon#about to read 6, iclass 6, count 0 2006.230.01:03:54.01#ibcon#read 6, iclass 6, count 0 2006.230.01:03:54.01#ibcon#end of sib2, iclass 6, count 0 2006.230.01:03:54.01#ibcon#*after write, iclass 6, count 0 2006.230.01:03:54.01#ibcon#*before return 0, iclass 6, count 0 2006.230.01:03:54.01#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:54.01#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:03:54.01#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:03:54.01#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:03:54.01$vck44/vb=7,4 2006.230.01:03:54.01#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.01:03:54.01#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.01:03:54.01#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:54.01#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:54.07#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:54.07#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:54.07#ibcon#enter wrdev, iclass 10, count 2 2006.230.01:03:54.07#ibcon#first serial, iclass 10, count 2 2006.230.01:03:54.07#ibcon#enter sib2, iclass 10, count 2 2006.230.01:03:54.07#ibcon#flushed, iclass 10, count 2 2006.230.01:03:54.07#ibcon#about to write, iclass 10, count 2 2006.230.01:03:54.07#ibcon#wrote, iclass 10, count 2 2006.230.01:03:54.07#ibcon#about to read 3, iclass 10, count 2 2006.230.01:03:54.09#ibcon#read 3, iclass 10, count 2 2006.230.01:03:54.09#ibcon#about to read 4, iclass 10, count 2 2006.230.01:03:54.09#ibcon#read 4, iclass 10, count 2 2006.230.01:03:54.09#ibcon#about to read 5, iclass 10, count 2 2006.230.01:03:54.09#ibcon#read 5, iclass 10, count 2 2006.230.01:03:54.09#ibcon#about to read 6, iclass 10, count 2 2006.230.01:03:54.09#ibcon#read 6, iclass 10, count 2 2006.230.01:03:54.09#ibcon#end of sib2, iclass 10, count 2 2006.230.01:03:54.09#ibcon#*mode == 0, iclass 10, count 2 2006.230.01:03:54.09#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.01:03:54.09#ibcon#[27=AT07-04\r\n] 2006.230.01:03:54.09#ibcon#*before write, iclass 10, count 2 2006.230.01:03:54.09#ibcon#enter sib2, iclass 10, count 2 2006.230.01:03:54.09#ibcon#flushed, iclass 10, count 2 2006.230.01:03:54.09#ibcon#about to write, iclass 10, count 2 2006.230.01:03:54.09#ibcon#wrote, iclass 10, count 2 2006.230.01:03:54.09#ibcon#about to read 3, iclass 10, count 2 2006.230.01:03:54.12#ibcon#read 3, iclass 10, count 2 2006.230.01:03:54.12#ibcon#about to read 4, iclass 10, count 2 2006.230.01:03:54.12#ibcon#read 4, iclass 10, count 2 2006.230.01:03:54.12#ibcon#about to read 5, iclass 10, count 2 2006.230.01:03:54.12#ibcon#read 5, iclass 10, count 2 2006.230.01:03:54.12#ibcon#about to read 6, iclass 10, count 2 2006.230.01:03:54.12#ibcon#read 6, iclass 10, count 2 2006.230.01:03:54.12#ibcon#end of sib2, iclass 10, count 2 2006.230.01:03:54.12#ibcon#*after write, iclass 10, count 2 2006.230.01:03:54.12#ibcon#*before return 0, iclass 10, count 2 2006.230.01:03:54.12#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:54.12#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:03:54.12#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.01:03:54.12#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:54.12#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:54.24#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:54.24#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:54.24#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:03:54.24#ibcon#first serial, iclass 10, count 0 2006.230.01:03:54.24#ibcon#enter sib2, iclass 10, count 0 2006.230.01:03:54.24#ibcon#flushed, iclass 10, count 0 2006.230.01:03:54.24#ibcon#about to write, iclass 10, count 0 2006.230.01:03:54.24#ibcon#wrote, iclass 10, count 0 2006.230.01:03:54.24#ibcon#about to read 3, iclass 10, count 0 2006.230.01:03:54.26#ibcon#read 3, iclass 10, count 0 2006.230.01:03:54.26#ibcon#about to read 4, iclass 10, count 0 2006.230.01:03:54.26#ibcon#read 4, iclass 10, count 0 2006.230.01:03:54.26#ibcon#about to read 5, iclass 10, count 0 2006.230.01:03:54.26#ibcon#read 5, iclass 10, count 0 2006.230.01:03:54.26#ibcon#about to read 6, iclass 10, count 0 2006.230.01:03:54.26#ibcon#read 6, iclass 10, count 0 2006.230.01:03:54.26#ibcon#end of sib2, iclass 10, count 0 2006.230.01:03:54.26#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:03:54.26#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:03:54.26#ibcon#[27=USB\r\n] 2006.230.01:03:54.26#ibcon#*before write, iclass 10, count 0 2006.230.01:03:54.26#ibcon#enter sib2, iclass 10, count 0 2006.230.01:03:54.26#ibcon#flushed, iclass 10, count 0 2006.230.01:03:54.26#ibcon#about to write, iclass 10, count 0 2006.230.01:03:54.26#ibcon#wrote, iclass 10, count 0 2006.230.01:03:54.26#ibcon#about to read 3, iclass 10, count 0 2006.230.01:03:54.29#ibcon#read 3, iclass 10, count 0 2006.230.01:03:54.29#ibcon#about to read 4, iclass 10, count 0 2006.230.01:03:54.29#ibcon#read 4, iclass 10, count 0 2006.230.01:03:54.29#ibcon#about to read 5, iclass 10, count 0 2006.230.01:03:54.29#ibcon#read 5, iclass 10, count 0 2006.230.01:03:54.29#ibcon#about to read 6, iclass 10, count 0 2006.230.01:03:54.29#ibcon#read 6, iclass 10, count 0 2006.230.01:03:54.29#ibcon#end of sib2, iclass 10, count 0 2006.230.01:03:54.29#ibcon#*after write, iclass 10, count 0 2006.230.01:03:54.29#ibcon#*before return 0, iclass 10, count 0 2006.230.01:03:54.29#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:54.29#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:03:54.29#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:03:54.29#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:03:54.29$vck44/vblo=8,744.99 2006.230.01:03:54.29#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.01:03:54.29#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.01:03:54.29#ibcon#ireg 17 cls_cnt 0 2006.230.01:03:54.29#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:54.29#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:54.29#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:54.29#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:03:54.29#ibcon#first serial, iclass 12, count 0 2006.230.01:03:54.29#ibcon#enter sib2, iclass 12, count 0 2006.230.01:03:54.29#ibcon#flushed, iclass 12, count 0 2006.230.01:03:54.29#ibcon#about to write, iclass 12, count 0 2006.230.01:03:54.29#ibcon#wrote, iclass 12, count 0 2006.230.01:03:54.29#ibcon#about to read 3, iclass 12, count 0 2006.230.01:03:54.31#ibcon#read 3, iclass 12, count 0 2006.230.01:03:54.31#ibcon#about to read 4, iclass 12, count 0 2006.230.01:03:54.31#ibcon#read 4, iclass 12, count 0 2006.230.01:03:54.31#ibcon#about to read 5, iclass 12, count 0 2006.230.01:03:54.31#ibcon#read 5, iclass 12, count 0 2006.230.01:03:54.31#ibcon#about to read 6, iclass 12, count 0 2006.230.01:03:54.31#ibcon#read 6, iclass 12, count 0 2006.230.01:03:54.31#ibcon#end of sib2, iclass 12, count 0 2006.230.01:03:54.31#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:03:54.31#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:03:54.31#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:03:54.31#ibcon#*before write, iclass 12, count 0 2006.230.01:03:54.31#ibcon#enter sib2, iclass 12, count 0 2006.230.01:03:54.31#ibcon#flushed, iclass 12, count 0 2006.230.01:03:54.31#ibcon#about to write, iclass 12, count 0 2006.230.01:03:54.31#ibcon#wrote, iclass 12, count 0 2006.230.01:03:54.31#ibcon#about to read 3, iclass 12, count 0 2006.230.01:03:54.35#ibcon#read 3, iclass 12, count 0 2006.230.01:03:54.35#ibcon#about to read 4, iclass 12, count 0 2006.230.01:03:54.35#ibcon#read 4, iclass 12, count 0 2006.230.01:03:54.35#ibcon#about to read 5, iclass 12, count 0 2006.230.01:03:54.35#ibcon#read 5, iclass 12, count 0 2006.230.01:03:54.35#ibcon#about to read 6, iclass 12, count 0 2006.230.01:03:54.35#ibcon#read 6, iclass 12, count 0 2006.230.01:03:54.35#ibcon#end of sib2, iclass 12, count 0 2006.230.01:03:54.35#ibcon#*after write, iclass 12, count 0 2006.230.01:03:54.35#ibcon#*before return 0, iclass 12, count 0 2006.230.01:03:54.35#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:54.35#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:03:54.35#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:03:54.35#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:03:54.35$vck44/vb=8,4 2006.230.01:03:54.35#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.01:03:54.35#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.01:03:54.35#ibcon#ireg 11 cls_cnt 2 2006.230.01:03:54.35#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:54.41#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:54.41#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:54.41#ibcon#enter wrdev, iclass 14, count 2 2006.230.01:03:54.41#ibcon#first serial, iclass 14, count 2 2006.230.01:03:54.41#ibcon#enter sib2, iclass 14, count 2 2006.230.01:03:54.41#ibcon#flushed, iclass 14, count 2 2006.230.01:03:54.41#ibcon#about to write, iclass 14, count 2 2006.230.01:03:54.41#ibcon#wrote, iclass 14, count 2 2006.230.01:03:54.41#ibcon#about to read 3, iclass 14, count 2 2006.230.01:03:54.43#ibcon#read 3, iclass 14, count 2 2006.230.01:03:54.43#ibcon#about to read 4, iclass 14, count 2 2006.230.01:03:54.43#ibcon#read 4, iclass 14, count 2 2006.230.01:03:54.43#ibcon#about to read 5, iclass 14, count 2 2006.230.01:03:54.43#ibcon#read 5, iclass 14, count 2 2006.230.01:03:54.43#ibcon#about to read 6, iclass 14, count 2 2006.230.01:03:54.43#ibcon#read 6, iclass 14, count 2 2006.230.01:03:54.43#ibcon#end of sib2, iclass 14, count 2 2006.230.01:03:54.43#ibcon#*mode == 0, iclass 14, count 2 2006.230.01:03:54.43#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.01:03:54.43#ibcon#[27=AT08-04\r\n] 2006.230.01:03:54.43#ibcon#*before write, iclass 14, count 2 2006.230.01:03:54.43#ibcon#enter sib2, iclass 14, count 2 2006.230.01:03:54.43#ibcon#flushed, iclass 14, count 2 2006.230.01:03:54.43#ibcon#about to write, iclass 14, count 2 2006.230.01:03:54.43#ibcon#wrote, iclass 14, count 2 2006.230.01:03:54.43#ibcon#about to read 3, iclass 14, count 2 2006.230.01:03:54.46#ibcon#read 3, iclass 14, count 2 2006.230.01:03:54.46#ibcon#about to read 4, iclass 14, count 2 2006.230.01:03:54.46#ibcon#read 4, iclass 14, count 2 2006.230.01:03:54.46#ibcon#about to read 5, iclass 14, count 2 2006.230.01:03:54.46#ibcon#read 5, iclass 14, count 2 2006.230.01:03:54.46#ibcon#about to read 6, iclass 14, count 2 2006.230.01:03:54.46#ibcon#read 6, iclass 14, count 2 2006.230.01:03:54.46#ibcon#end of sib2, iclass 14, count 2 2006.230.01:03:54.46#ibcon#*after write, iclass 14, count 2 2006.230.01:03:54.46#ibcon#*before return 0, iclass 14, count 2 2006.230.01:03:54.46#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:54.46#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:03:54.46#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.01:03:54.46#ibcon#ireg 7 cls_cnt 0 2006.230.01:03:54.46#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:54.58#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:54.58#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:54.58#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:03:54.58#ibcon#first serial, iclass 14, count 0 2006.230.01:03:54.58#ibcon#enter sib2, iclass 14, count 0 2006.230.01:03:54.58#ibcon#flushed, iclass 14, count 0 2006.230.01:03:54.58#ibcon#about to write, iclass 14, count 0 2006.230.01:03:54.58#ibcon#wrote, iclass 14, count 0 2006.230.01:03:54.58#ibcon#about to read 3, iclass 14, count 0 2006.230.01:03:54.60#ibcon#read 3, iclass 14, count 0 2006.230.01:03:54.60#ibcon#about to read 4, iclass 14, count 0 2006.230.01:03:54.60#ibcon#read 4, iclass 14, count 0 2006.230.01:03:54.60#ibcon#about to read 5, iclass 14, count 0 2006.230.01:03:54.60#ibcon#read 5, iclass 14, count 0 2006.230.01:03:54.60#ibcon#about to read 6, iclass 14, count 0 2006.230.01:03:54.60#ibcon#read 6, iclass 14, count 0 2006.230.01:03:54.60#ibcon#end of sib2, iclass 14, count 0 2006.230.01:03:54.60#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:03:54.60#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:03:54.60#ibcon#[27=USB\r\n] 2006.230.01:03:54.60#ibcon#*before write, iclass 14, count 0 2006.230.01:03:54.60#ibcon#enter sib2, iclass 14, count 0 2006.230.01:03:54.60#ibcon#flushed, iclass 14, count 0 2006.230.01:03:54.60#ibcon#about to write, iclass 14, count 0 2006.230.01:03:54.60#ibcon#wrote, iclass 14, count 0 2006.230.01:03:54.60#ibcon#about to read 3, iclass 14, count 0 2006.230.01:03:54.63#ibcon#read 3, iclass 14, count 0 2006.230.01:03:54.63#ibcon#about to read 4, iclass 14, count 0 2006.230.01:03:54.63#ibcon#read 4, iclass 14, count 0 2006.230.01:03:54.63#ibcon#about to read 5, iclass 14, count 0 2006.230.01:03:54.63#ibcon#read 5, iclass 14, count 0 2006.230.01:03:54.63#ibcon#about to read 6, iclass 14, count 0 2006.230.01:03:54.63#ibcon#read 6, iclass 14, count 0 2006.230.01:03:54.63#ibcon#end of sib2, iclass 14, count 0 2006.230.01:03:54.63#ibcon#*after write, iclass 14, count 0 2006.230.01:03:54.63#ibcon#*before return 0, iclass 14, count 0 2006.230.01:03:54.63#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:54.63#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:03:54.63#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:03:54.63#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:03:54.63$vck44/vabw=wide 2006.230.01:03:54.63#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:03:54.63#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:03:54.63#ibcon#ireg 8 cls_cnt 0 2006.230.01:03:54.63#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:54.63#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:54.63#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:54.63#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:03:54.63#ibcon#first serial, iclass 16, count 0 2006.230.01:03:54.63#ibcon#enter sib2, iclass 16, count 0 2006.230.01:03:54.63#ibcon#flushed, iclass 16, count 0 2006.230.01:03:54.63#ibcon#about to write, iclass 16, count 0 2006.230.01:03:54.63#ibcon#wrote, iclass 16, count 0 2006.230.01:03:54.63#ibcon#about to read 3, iclass 16, count 0 2006.230.01:03:54.65#ibcon#read 3, iclass 16, count 0 2006.230.01:03:54.65#ibcon#about to read 4, iclass 16, count 0 2006.230.01:03:54.65#ibcon#read 4, iclass 16, count 0 2006.230.01:03:54.65#ibcon#about to read 5, iclass 16, count 0 2006.230.01:03:54.65#ibcon#read 5, iclass 16, count 0 2006.230.01:03:54.65#ibcon#about to read 6, iclass 16, count 0 2006.230.01:03:54.65#ibcon#read 6, iclass 16, count 0 2006.230.01:03:54.65#ibcon#end of sib2, iclass 16, count 0 2006.230.01:03:54.65#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:03:54.65#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:03:54.65#ibcon#[25=BW32\r\n] 2006.230.01:03:54.65#ibcon#*before write, iclass 16, count 0 2006.230.01:03:54.65#ibcon#enter sib2, iclass 16, count 0 2006.230.01:03:54.65#ibcon#flushed, iclass 16, count 0 2006.230.01:03:54.65#ibcon#about to write, iclass 16, count 0 2006.230.01:03:54.65#ibcon#wrote, iclass 16, count 0 2006.230.01:03:54.65#ibcon#about to read 3, iclass 16, count 0 2006.230.01:03:54.68#ibcon#read 3, iclass 16, count 0 2006.230.01:03:54.68#ibcon#about to read 4, iclass 16, count 0 2006.230.01:03:54.68#ibcon#read 4, iclass 16, count 0 2006.230.01:03:54.68#ibcon#about to read 5, iclass 16, count 0 2006.230.01:03:54.68#ibcon#read 5, iclass 16, count 0 2006.230.01:03:54.68#ibcon#about to read 6, iclass 16, count 0 2006.230.01:03:54.68#ibcon#read 6, iclass 16, count 0 2006.230.01:03:54.68#ibcon#end of sib2, iclass 16, count 0 2006.230.01:03:54.68#ibcon#*after write, iclass 16, count 0 2006.230.01:03:54.68#ibcon#*before return 0, iclass 16, count 0 2006.230.01:03:54.68#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:54.68#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:03:54.68#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:03:54.68#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:03:54.68$vck44/vbbw=wide 2006.230.01:03:54.68#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:03:54.68#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:03:54.68#ibcon#ireg 8 cls_cnt 0 2006.230.01:03:54.68#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:03:54.75#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:03:54.75#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:03:54.75#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:03:54.75#ibcon#first serial, iclass 18, count 0 2006.230.01:03:54.75#ibcon#enter sib2, iclass 18, count 0 2006.230.01:03:54.75#ibcon#flushed, iclass 18, count 0 2006.230.01:03:54.75#ibcon#about to write, iclass 18, count 0 2006.230.01:03:54.75#ibcon#wrote, iclass 18, count 0 2006.230.01:03:54.75#ibcon#about to read 3, iclass 18, count 0 2006.230.01:03:54.77#ibcon#read 3, iclass 18, count 0 2006.230.01:03:54.77#ibcon#about to read 4, iclass 18, count 0 2006.230.01:03:54.77#ibcon#read 4, iclass 18, count 0 2006.230.01:03:54.77#ibcon#about to read 5, iclass 18, count 0 2006.230.01:03:54.77#ibcon#read 5, iclass 18, count 0 2006.230.01:03:54.77#ibcon#about to read 6, iclass 18, count 0 2006.230.01:03:54.77#ibcon#read 6, iclass 18, count 0 2006.230.01:03:54.77#ibcon#end of sib2, iclass 18, count 0 2006.230.01:03:54.77#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:03:54.77#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:03:54.77#ibcon#[27=BW32\r\n] 2006.230.01:03:54.77#ibcon#*before write, iclass 18, count 0 2006.230.01:03:54.77#ibcon#enter sib2, iclass 18, count 0 2006.230.01:03:54.77#ibcon#flushed, iclass 18, count 0 2006.230.01:03:54.77#ibcon#about to write, iclass 18, count 0 2006.230.01:03:54.77#ibcon#wrote, iclass 18, count 0 2006.230.01:03:54.77#ibcon#about to read 3, iclass 18, count 0 2006.230.01:03:54.80#ibcon#read 3, iclass 18, count 0 2006.230.01:03:54.80#ibcon#about to read 4, iclass 18, count 0 2006.230.01:03:54.80#ibcon#read 4, iclass 18, count 0 2006.230.01:03:54.80#ibcon#about to read 5, iclass 18, count 0 2006.230.01:03:54.80#ibcon#read 5, iclass 18, count 0 2006.230.01:03:54.80#ibcon#about to read 6, iclass 18, count 0 2006.230.01:03:54.80#ibcon#read 6, iclass 18, count 0 2006.230.01:03:54.80#ibcon#end of sib2, iclass 18, count 0 2006.230.01:03:54.80#ibcon#*after write, iclass 18, count 0 2006.230.01:03:54.80#ibcon#*before return 0, iclass 18, count 0 2006.230.01:03:54.80#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:03:54.80#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:03:54.80#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:03:54.80#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:03:54.80$setupk4/ifdk4 2006.230.01:03:54.80$ifdk4/lo= 2006.230.01:03:54.80$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:03:54.80$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:03:54.80$ifdk4/patch= 2006.230.01:03:54.80$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:03:54.80$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:03:54.80$setupk4/!*+20s 2006.230.01:04:03.75#abcon#<5=/08 1.8 6.1 32.37 721002.8\r\n> 2006.230.01:04:03.77#abcon#{5=INTERFACE CLEAR} 2006.230.01:04:03.83#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:04:09.29$setupk4/"tpicd 2006.230.01:04:09.29$setupk4/echo=off 2006.230.01:04:09.29$setupk4/xlog=off 2006.230.01:04:09.29:!2006.230.01:07:21 2006.230.01:04:23.14#trakl#Source acquired 2006.230.01:04:23.14#flagr#flagr/antenna,acquired 2006.230.01:07:21.02:preob 2006.230.01:07:22.15/onsource/TRACKING 2006.230.01:07:22.15:!2006.230.01:07:31 2006.230.01:07:31.01:"tape 2006.230.01:07:31.02:"st=record 2006.230.01:07:31.02:data_valid=on 2006.230.01:07:31.02:midob 2006.230.01:07:32.14/onsource/TRACKING 2006.230.01:07:32.15/wx/32.48,1002.7,70 2006.230.01:07:32.25/cable/+6.3990E-03 2006.230.01:07:33.34/va/01,08,usb,yes,29,31 2006.230.01:07:33.34/va/02,07,usb,yes,32,32 2006.230.01:07:33.34/va/03,06,usb,yes,39,42 2006.230.01:07:33.34/va/04,07,usb,yes,32,34 2006.230.01:07:33.34/va/05,04,usb,yes,29,29 2006.230.01:07:33.34/va/06,04,usb,yes,33,32 2006.230.01:07:33.34/va/07,05,usb,yes,29,29 2006.230.01:07:33.34/va/08,06,usb,yes,21,26 2006.230.01:07:33.57/valo/01,524.99,yes,locked 2006.230.01:07:33.57/valo/02,534.99,yes,locked 2006.230.01:07:33.57/valo/03,564.99,yes,locked 2006.230.01:07:33.57/valo/04,624.99,yes,locked 2006.230.01:07:33.57/valo/05,734.99,yes,locked 2006.230.01:07:33.57/valo/06,814.99,yes,locked 2006.230.01:07:33.57/valo/07,864.99,yes,locked 2006.230.01:07:33.57/valo/08,884.99,yes,locked 2006.230.01:07:34.66/vb/01,04,usb,yes,31,29 2006.230.01:07:34.66/vb/02,04,usb,yes,33,33 2006.230.01:07:34.66/vb/03,04,usb,yes,30,33 2006.230.01:07:34.66/vb/04,04,usb,yes,35,34 2006.230.01:07:34.66/vb/05,04,usb,yes,27,29 2006.230.01:07:34.66/vb/06,04,usb,yes,31,27 2006.230.01:07:34.66/vb/07,04,usb,yes,31,31 2006.230.01:07:34.66/vb/08,04,usb,yes,29,32 2006.230.01:07:34.90/vblo/01,629.99,yes,locked 2006.230.01:07:34.90/vblo/02,634.99,yes,locked 2006.230.01:07:34.90/vblo/03,649.99,yes,locked 2006.230.01:07:34.90/vblo/04,679.99,yes,locked 2006.230.01:07:34.90/vblo/05,709.99,yes,locked 2006.230.01:07:34.90/vblo/06,719.99,yes,locked 2006.230.01:07:34.90/vblo/07,734.99,yes,locked 2006.230.01:07:34.90/vblo/08,744.99,yes,locked 2006.230.01:07:35.05/vabw/8 2006.230.01:07:35.20/vbbw/8 2006.230.01:07:35.29/xfe/off,on,12.0 2006.230.01:07:35.69/ifatt/23,28,28,28 2006.230.01:07:36.07/fmout-gps/S +4.51E-07 2006.230.01:07:36.12:!2006.230.01:08:31 2006.230.01:08:31.01:data_valid=off 2006.230.01:08:31.02:"et 2006.230.01:08:31.02:!+3s 2006.230.01:08:34.04:"tape 2006.230.01:08:34.04:postob 2006.230.01:08:34.18/cable/+6.3995E-03 2006.230.01:08:34.19/wx/32.49,1002.7,72 2006.230.01:08:34.24/fmout-gps/S +4.52E-07 2006.230.01:08:34.24:scan_name=230-0110,jd0608,100 2006.230.01:08:34.25:source=0528+134,053056.42,133155.1,2000.0,cw 2006.230.01:08:35.14#flagr#flagr/antenna,new-source 2006.230.01:08:35.15:checkk5 2006.230.01:08:35.55/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:08:35.94/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:08:36.36/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:08:36.75/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:08:37.14/chk_obsdata//k5ts1/T2300107??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:08:37.56/chk_obsdata//k5ts2/T2300107??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:08:37.97/chk_obsdata//k5ts3/T2300107??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:08:38.36/chk_obsdata//k5ts4/T2300107??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:08:39.07/k5log//k5ts1_log_newline 2006.230.01:08:39.78/k5log//k5ts2_log_newline 2006.230.01:08:40.49/k5log//k5ts3_log_newline 2006.230.01:08:41.20/k5log//k5ts4_log_newline 2006.230.01:08:41.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:08:41.23:setupk4=1 2006.230.01:08:41.23$setupk4/echo=on 2006.230.01:08:41.23$setupk4/pcalon 2006.230.01:08:41.23$pcalon/"no phase cal control is implemented here 2006.230.01:08:41.23$setupk4/"tpicd=stop 2006.230.01:08:41.23$setupk4/"rec=synch_on 2006.230.01:08:41.23$setupk4/"rec_mode=128 2006.230.01:08:41.23$setupk4/!* 2006.230.01:08:41.23$setupk4/recpk4 2006.230.01:08:41.23$recpk4/recpatch= 2006.230.01:08:41.24$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:08:41.24$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:08:41.24$setupk4/vck44 2006.230.01:08:41.24$vck44/valo=1,524.99 2006.230.01:08:41.24#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.01:08:41.24#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.01:08:41.24#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:41.24#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:41.24#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:41.24#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:41.24#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:08:41.24#ibcon#first serial, iclass 27, count 0 2006.230.01:08:41.24#ibcon#enter sib2, iclass 27, count 0 2006.230.01:08:41.24#ibcon#flushed, iclass 27, count 0 2006.230.01:08:41.24#ibcon#about to write, iclass 27, count 0 2006.230.01:08:41.24#ibcon#wrote, iclass 27, count 0 2006.230.01:08:41.24#ibcon#about to read 3, iclass 27, count 0 2006.230.01:08:41.25#ibcon#read 3, iclass 27, count 0 2006.230.01:08:41.25#ibcon#about to read 4, iclass 27, count 0 2006.230.01:08:41.25#ibcon#read 4, iclass 27, count 0 2006.230.01:08:41.25#ibcon#about to read 5, iclass 27, count 0 2006.230.01:08:41.25#ibcon#read 5, iclass 27, count 0 2006.230.01:08:41.25#ibcon#about to read 6, iclass 27, count 0 2006.230.01:08:41.25#ibcon#read 6, iclass 27, count 0 2006.230.01:08:41.25#ibcon#end of sib2, iclass 27, count 0 2006.230.01:08:41.25#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:08:41.25#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:08:41.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:08:41.25#ibcon#*before write, iclass 27, count 0 2006.230.01:08:41.25#ibcon#enter sib2, iclass 27, count 0 2006.230.01:08:41.25#ibcon#flushed, iclass 27, count 0 2006.230.01:08:41.25#ibcon#about to write, iclass 27, count 0 2006.230.01:08:41.25#ibcon#wrote, iclass 27, count 0 2006.230.01:08:41.25#ibcon#about to read 3, iclass 27, count 0 2006.230.01:08:41.30#ibcon#read 3, iclass 27, count 0 2006.230.01:08:41.30#ibcon#about to read 4, iclass 27, count 0 2006.230.01:08:41.30#ibcon#read 4, iclass 27, count 0 2006.230.01:08:41.30#ibcon#about to read 5, iclass 27, count 0 2006.230.01:08:41.30#ibcon#read 5, iclass 27, count 0 2006.230.01:08:41.30#ibcon#about to read 6, iclass 27, count 0 2006.230.01:08:41.30#ibcon#read 6, iclass 27, count 0 2006.230.01:08:41.30#ibcon#end of sib2, iclass 27, count 0 2006.230.01:08:41.30#ibcon#*after write, iclass 27, count 0 2006.230.01:08:41.30#ibcon#*before return 0, iclass 27, count 0 2006.230.01:08:41.30#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:41.30#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:41.30#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:08:41.30#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:08:41.30$vck44/va=1,8 2006.230.01:08:41.30#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.01:08:41.30#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.01:08:41.30#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:41.30#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:41.30#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:41.30#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:41.30#ibcon#enter wrdev, iclass 29, count 2 2006.230.01:08:41.30#ibcon#first serial, iclass 29, count 2 2006.230.01:08:41.30#ibcon#enter sib2, iclass 29, count 2 2006.230.01:08:41.30#ibcon#flushed, iclass 29, count 2 2006.230.01:08:41.30#ibcon#about to write, iclass 29, count 2 2006.230.01:08:41.30#ibcon#wrote, iclass 29, count 2 2006.230.01:08:41.30#ibcon#about to read 3, iclass 29, count 2 2006.230.01:08:41.32#ibcon#read 3, iclass 29, count 2 2006.230.01:08:41.32#ibcon#about to read 4, iclass 29, count 2 2006.230.01:08:41.32#ibcon#read 4, iclass 29, count 2 2006.230.01:08:41.32#ibcon#about to read 5, iclass 29, count 2 2006.230.01:08:41.32#ibcon#read 5, iclass 29, count 2 2006.230.01:08:41.32#ibcon#about to read 6, iclass 29, count 2 2006.230.01:08:41.32#ibcon#read 6, iclass 29, count 2 2006.230.01:08:41.32#ibcon#end of sib2, iclass 29, count 2 2006.230.01:08:41.32#ibcon#*mode == 0, iclass 29, count 2 2006.230.01:08:41.32#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.01:08:41.32#ibcon#[25=AT01-08\r\n] 2006.230.01:08:41.32#ibcon#*before write, iclass 29, count 2 2006.230.01:08:41.32#ibcon#enter sib2, iclass 29, count 2 2006.230.01:08:41.32#ibcon#flushed, iclass 29, count 2 2006.230.01:08:41.32#ibcon#about to write, iclass 29, count 2 2006.230.01:08:41.32#ibcon#wrote, iclass 29, count 2 2006.230.01:08:41.32#ibcon#about to read 3, iclass 29, count 2 2006.230.01:08:41.35#ibcon#read 3, iclass 29, count 2 2006.230.01:08:41.35#ibcon#about to read 4, iclass 29, count 2 2006.230.01:08:41.35#ibcon#read 4, iclass 29, count 2 2006.230.01:08:41.35#ibcon#about to read 5, iclass 29, count 2 2006.230.01:08:41.35#ibcon#read 5, iclass 29, count 2 2006.230.01:08:41.35#ibcon#about to read 6, iclass 29, count 2 2006.230.01:08:41.35#ibcon#read 6, iclass 29, count 2 2006.230.01:08:41.35#ibcon#end of sib2, iclass 29, count 2 2006.230.01:08:41.35#ibcon#*after write, iclass 29, count 2 2006.230.01:08:41.35#ibcon#*before return 0, iclass 29, count 2 2006.230.01:08:41.35#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:41.35#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:41.35#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.01:08:41.35#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:41.35#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:41.47#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:41.47#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:41.47#ibcon#enter wrdev, iclass 29, count 0 2006.230.01:08:41.47#ibcon#first serial, iclass 29, count 0 2006.230.01:08:41.47#ibcon#enter sib2, iclass 29, count 0 2006.230.01:08:41.47#ibcon#flushed, iclass 29, count 0 2006.230.01:08:41.47#ibcon#about to write, iclass 29, count 0 2006.230.01:08:41.47#ibcon#wrote, iclass 29, count 0 2006.230.01:08:41.47#ibcon#about to read 3, iclass 29, count 0 2006.230.01:08:41.49#ibcon#read 3, iclass 29, count 0 2006.230.01:08:41.49#ibcon#about to read 4, iclass 29, count 0 2006.230.01:08:41.49#ibcon#read 4, iclass 29, count 0 2006.230.01:08:41.49#ibcon#about to read 5, iclass 29, count 0 2006.230.01:08:41.49#ibcon#read 5, iclass 29, count 0 2006.230.01:08:41.49#ibcon#about to read 6, iclass 29, count 0 2006.230.01:08:41.49#ibcon#read 6, iclass 29, count 0 2006.230.01:08:41.49#ibcon#end of sib2, iclass 29, count 0 2006.230.01:08:41.49#ibcon#*mode == 0, iclass 29, count 0 2006.230.01:08:41.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.01:08:41.49#ibcon#[25=USB\r\n] 2006.230.01:08:41.49#ibcon#*before write, iclass 29, count 0 2006.230.01:08:41.49#ibcon#enter sib2, iclass 29, count 0 2006.230.01:08:41.49#ibcon#flushed, iclass 29, count 0 2006.230.01:08:41.49#ibcon#about to write, iclass 29, count 0 2006.230.01:08:41.49#ibcon#wrote, iclass 29, count 0 2006.230.01:08:41.49#ibcon#about to read 3, iclass 29, count 0 2006.230.01:08:41.52#ibcon#read 3, iclass 29, count 0 2006.230.01:08:41.52#ibcon#about to read 4, iclass 29, count 0 2006.230.01:08:41.52#ibcon#read 4, iclass 29, count 0 2006.230.01:08:41.52#ibcon#about to read 5, iclass 29, count 0 2006.230.01:08:41.52#ibcon#read 5, iclass 29, count 0 2006.230.01:08:41.52#ibcon#about to read 6, iclass 29, count 0 2006.230.01:08:41.52#ibcon#read 6, iclass 29, count 0 2006.230.01:08:41.52#ibcon#end of sib2, iclass 29, count 0 2006.230.01:08:41.52#ibcon#*after write, iclass 29, count 0 2006.230.01:08:41.52#ibcon#*before return 0, iclass 29, count 0 2006.230.01:08:41.52#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:41.52#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:41.52#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.01:08:41.52#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.01:08:41.52$vck44/valo=2,534.99 2006.230.01:08:41.52#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.01:08:41.52#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.01:08:41.52#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:41.52#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:41.52#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:41.52#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:41.52#ibcon#enter wrdev, iclass 31, count 0 2006.230.01:08:41.52#ibcon#first serial, iclass 31, count 0 2006.230.01:08:41.52#ibcon#enter sib2, iclass 31, count 0 2006.230.01:08:41.52#ibcon#flushed, iclass 31, count 0 2006.230.01:08:41.52#ibcon#about to write, iclass 31, count 0 2006.230.01:08:41.52#ibcon#wrote, iclass 31, count 0 2006.230.01:08:41.52#ibcon#about to read 3, iclass 31, count 0 2006.230.01:08:41.54#ibcon#read 3, iclass 31, count 0 2006.230.01:08:41.54#ibcon#about to read 4, iclass 31, count 0 2006.230.01:08:41.54#ibcon#read 4, iclass 31, count 0 2006.230.01:08:41.54#ibcon#about to read 5, iclass 31, count 0 2006.230.01:08:41.54#ibcon#read 5, iclass 31, count 0 2006.230.01:08:41.54#ibcon#about to read 6, iclass 31, count 0 2006.230.01:08:41.54#ibcon#read 6, iclass 31, count 0 2006.230.01:08:41.54#ibcon#end of sib2, iclass 31, count 0 2006.230.01:08:41.54#ibcon#*mode == 0, iclass 31, count 0 2006.230.01:08:41.54#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.01:08:41.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:08:41.54#ibcon#*before write, iclass 31, count 0 2006.230.01:08:41.54#ibcon#enter sib2, iclass 31, count 0 2006.230.01:08:41.54#ibcon#flushed, iclass 31, count 0 2006.230.01:08:41.54#ibcon#about to write, iclass 31, count 0 2006.230.01:08:41.54#ibcon#wrote, iclass 31, count 0 2006.230.01:08:41.54#ibcon#about to read 3, iclass 31, count 0 2006.230.01:08:41.58#ibcon#read 3, iclass 31, count 0 2006.230.01:08:41.58#ibcon#about to read 4, iclass 31, count 0 2006.230.01:08:41.58#ibcon#read 4, iclass 31, count 0 2006.230.01:08:41.58#ibcon#about to read 5, iclass 31, count 0 2006.230.01:08:41.58#ibcon#read 5, iclass 31, count 0 2006.230.01:08:41.58#ibcon#about to read 6, iclass 31, count 0 2006.230.01:08:41.58#ibcon#read 6, iclass 31, count 0 2006.230.01:08:41.58#ibcon#end of sib2, iclass 31, count 0 2006.230.01:08:41.58#ibcon#*after write, iclass 31, count 0 2006.230.01:08:41.58#ibcon#*before return 0, iclass 31, count 0 2006.230.01:08:41.58#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:41.58#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:41.58#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.01:08:41.58#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.01:08:41.58$vck44/va=2,7 2006.230.01:08:41.58#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.01:08:41.58#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.01:08:41.58#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:41.58#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:41.64#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:41.64#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:41.64#ibcon#enter wrdev, iclass 33, count 2 2006.230.01:08:41.64#ibcon#first serial, iclass 33, count 2 2006.230.01:08:41.64#ibcon#enter sib2, iclass 33, count 2 2006.230.01:08:41.64#ibcon#flushed, iclass 33, count 2 2006.230.01:08:41.64#ibcon#about to write, iclass 33, count 2 2006.230.01:08:41.64#ibcon#wrote, iclass 33, count 2 2006.230.01:08:41.64#ibcon#about to read 3, iclass 33, count 2 2006.230.01:08:41.66#ibcon#read 3, iclass 33, count 2 2006.230.01:08:41.66#ibcon#about to read 4, iclass 33, count 2 2006.230.01:08:41.66#ibcon#read 4, iclass 33, count 2 2006.230.01:08:41.66#ibcon#about to read 5, iclass 33, count 2 2006.230.01:08:41.66#ibcon#read 5, iclass 33, count 2 2006.230.01:08:41.66#ibcon#about to read 6, iclass 33, count 2 2006.230.01:08:41.66#ibcon#read 6, iclass 33, count 2 2006.230.01:08:41.66#ibcon#end of sib2, iclass 33, count 2 2006.230.01:08:41.66#ibcon#*mode == 0, iclass 33, count 2 2006.230.01:08:41.66#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.01:08:41.66#ibcon#[25=AT02-07\r\n] 2006.230.01:08:41.66#ibcon#*before write, iclass 33, count 2 2006.230.01:08:41.66#ibcon#enter sib2, iclass 33, count 2 2006.230.01:08:41.66#ibcon#flushed, iclass 33, count 2 2006.230.01:08:41.66#ibcon#about to write, iclass 33, count 2 2006.230.01:08:41.66#ibcon#wrote, iclass 33, count 2 2006.230.01:08:41.66#ibcon#about to read 3, iclass 33, count 2 2006.230.01:08:41.69#ibcon#read 3, iclass 33, count 2 2006.230.01:08:41.69#ibcon#about to read 4, iclass 33, count 2 2006.230.01:08:41.69#ibcon#read 4, iclass 33, count 2 2006.230.01:08:41.69#ibcon#about to read 5, iclass 33, count 2 2006.230.01:08:41.69#ibcon#read 5, iclass 33, count 2 2006.230.01:08:41.69#ibcon#about to read 6, iclass 33, count 2 2006.230.01:08:41.69#ibcon#read 6, iclass 33, count 2 2006.230.01:08:41.69#ibcon#end of sib2, iclass 33, count 2 2006.230.01:08:41.69#ibcon#*after write, iclass 33, count 2 2006.230.01:08:41.69#ibcon#*before return 0, iclass 33, count 2 2006.230.01:08:41.69#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:41.69#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:41.69#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.01:08:41.69#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:41.69#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:41.81#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:41.81#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:41.81#ibcon#enter wrdev, iclass 33, count 0 2006.230.01:08:41.81#ibcon#first serial, iclass 33, count 0 2006.230.01:08:41.81#ibcon#enter sib2, iclass 33, count 0 2006.230.01:08:41.81#ibcon#flushed, iclass 33, count 0 2006.230.01:08:41.81#ibcon#about to write, iclass 33, count 0 2006.230.01:08:41.81#ibcon#wrote, iclass 33, count 0 2006.230.01:08:41.81#ibcon#about to read 3, iclass 33, count 0 2006.230.01:08:41.83#ibcon#read 3, iclass 33, count 0 2006.230.01:08:41.83#ibcon#about to read 4, iclass 33, count 0 2006.230.01:08:41.83#ibcon#read 4, iclass 33, count 0 2006.230.01:08:41.83#ibcon#about to read 5, iclass 33, count 0 2006.230.01:08:41.83#ibcon#read 5, iclass 33, count 0 2006.230.01:08:41.83#ibcon#about to read 6, iclass 33, count 0 2006.230.01:08:41.83#ibcon#read 6, iclass 33, count 0 2006.230.01:08:41.83#ibcon#end of sib2, iclass 33, count 0 2006.230.01:08:41.83#ibcon#*mode == 0, iclass 33, count 0 2006.230.01:08:41.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.01:08:41.83#ibcon#[25=USB\r\n] 2006.230.01:08:41.83#ibcon#*before write, iclass 33, count 0 2006.230.01:08:41.83#ibcon#enter sib2, iclass 33, count 0 2006.230.01:08:41.83#ibcon#flushed, iclass 33, count 0 2006.230.01:08:41.83#ibcon#about to write, iclass 33, count 0 2006.230.01:08:41.83#ibcon#wrote, iclass 33, count 0 2006.230.01:08:41.83#ibcon#about to read 3, iclass 33, count 0 2006.230.01:08:41.86#ibcon#read 3, iclass 33, count 0 2006.230.01:08:41.86#ibcon#about to read 4, iclass 33, count 0 2006.230.01:08:41.86#ibcon#read 4, iclass 33, count 0 2006.230.01:08:41.86#ibcon#about to read 5, iclass 33, count 0 2006.230.01:08:41.86#ibcon#read 5, iclass 33, count 0 2006.230.01:08:41.86#ibcon#about to read 6, iclass 33, count 0 2006.230.01:08:41.86#ibcon#read 6, iclass 33, count 0 2006.230.01:08:41.86#ibcon#end of sib2, iclass 33, count 0 2006.230.01:08:41.86#ibcon#*after write, iclass 33, count 0 2006.230.01:08:41.86#ibcon#*before return 0, iclass 33, count 0 2006.230.01:08:41.86#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:41.86#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:41.86#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.01:08:41.86#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.01:08:41.86$vck44/valo=3,564.99 2006.230.01:08:41.86#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.01:08:41.86#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.01:08:41.86#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:41.86#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:41.86#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:41.86#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:41.86#ibcon#enter wrdev, iclass 35, count 0 2006.230.01:08:41.86#ibcon#first serial, iclass 35, count 0 2006.230.01:08:41.86#ibcon#enter sib2, iclass 35, count 0 2006.230.01:08:41.86#ibcon#flushed, iclass 35, count 0 2006.230.01:08:41.86#ibcon#about to write, iclass 35, count 0 2006.230.01:08:41.86#ibcon#wrote, iclass 35, count 0 2006.230.01:08:41.86#ibcon#about to read 3, iclass 35, count 0 2006.230.01:08:41.88#ibcon#read 3, iclass 35, count 0 2006.230.01:08:41.88#ibcon#about to read 4, iclass 35, count 0 2006.230.01:08:41.88#ibcon#read 4, iclass 35, count 0 2006.230.01:08:41.88#ibcon#about to read 5, iclass 35, count 0 2006.230.01:08:41.88#ibcon#read 5, iclass 35, count 0 2006.230.01:08:41.88#ibcon#about to read 6, iclass 35, count 0 2006.230.01:08:41.88#ibcon#read 6, iclass 35, count 0 2006.230.01:08:41.88#ibcon#end of sib2, iclass 35, count 0 2006.230.01:08:41.88#ibcon#*mode == 0, iclass 35, count 0 2006.230.01:08:41.88#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.01:08:41.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:08:41.88#ibcon#*before write, iclass 35, count 0 2006.230.01:08:41.88#ibcon#enter sib2, iclass 35, count 0 2006.230.01:08:41.88#ibcon#flushed, iclass 35, count 0 2006.230.01:08:41.88#ibcon#about to write, iclass 35, count 0 2006.230.01:08:41.88#ibcon#wrote, iclass 35, count 0 2006.230.01:08:41.88#ibcon#about to read 3, iclass 35, count 0 2006.230.01:08:41.92#ibcon#read 3, iclass 35, count 0 2006.230.01:08:41.92#ibcon#about to read 4, iclass 35, count 0 2006.230.01:08:41.92#ibcon#read 4, iclass 35, count 0 2006.230.01:08:41.92#ibcon#about to read 5, iclass 35, count 0 2006.230.01:08:41.92#ibcon#read 5, iclass 35, count 0 2006.230.01:08:41.92#ibcon#about to read 6, iclass 35, count 0 2006.230.01:08:41.92#ibcon#read 6, iclass 35, count 0 2006.230.01:08:41.92#ibcon#end of sib2, iclass 35, count 0 2006.230.01:08:41.92#ibcon#*after write, iclass 35, count 0 2006.230.01:08:41.92#ibcon#*before return 0, iclass 35, count 0 2006.230.01:08:41.92#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:41.92#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:41.92#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.01:08:41.92#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.01:08:41.92$vck44/va=3,6 2006.230.01:08:41.92#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.01:08:41.92#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.01:08:41.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:41.92#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:41.98#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:41.98#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:41.98#ibcon#enter wrdev, iclass 37, count 2 2006.230.01:08:41.98#ibcon#first serial, iclass 37, count 2 2006.230.01:08:41.98#ibcon#enter sib2, iclass 37, count 2 2006.230.01:08:41.98#ibcon#flushed, iclass 37, count 2 2006.230.01:08:41.98#ibcon#about to write, iclass 37, count 2 2006.230.01:08:41.98#ibcon#wrote, iclass 37, count 2 2006.230.01:08:41.98#ibcon#about to read 3, iclass 37, count 2 2006.230.01:08:42.00#ibcon#read 3, iclass 37, count 2 2006.230.01:08:42.00#ibcon#about to read 4, iclass 37, count 2 2006.230.01:08:42.00#ibcon#read 4, iclass 37, count 2 2006.230.01:08:42.00#ibcon#about to read 5, iclass 37, count 2 2006.230.01:08:42.00#ibcon#read 5, iclass 37, count 2 2006.230.01:08:42.00#ibcon#about to read 6, iclass 37, count 2 2006.230.01:08:42.00#ibcon#read 6, iclass 37, count 2 2006.230.01:08:42.00#ibcon#end of sib2, iclass 37, count 2 2006.230.01:08:42.00#ibcon#*mode == 0, iclass 37, count 2 2006.230.01:08:42.00#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.01:08:42.00#ibcon#[25=AT03-06\r\n] 2006.230.01:08:42.00#ibcon#*before write, iclass 37, count 2 2006.230.01:08:42.00#ibcon#enter sib2, iclass 37, count 2 2006.230.01:08:42.00#ibcon#flushed, iclass 37, count 2 2006.230.01:08:42.00#ibcon#about to write, iclass 37, count 2 2006.230.01:08:42.00#ibcon#wrote, iclass 37, count 2 2006.230.01:08:42.00#ibcon#about to read 3, iclass 37, count 2 2006.230.01:08:42.03#ibcon#read 3, iclass 37, count 2 2006.230.01:08:42.03#ibcon#about to read 4, iclass 37, count 2 2006.230.01:08:42.03#ibcon#read 4, iclass 37, count 2 2006.230.01:08:42.03#ibcon#about to read 5, iclass 37, count 2 2006.230.01:08:42.03#ibcon#read 5, iclass 37, count 2 2006.230.01:08:42.03#ibcon#about to read 6, iclass 37, count 2 2006.230.01:08:42.03#ibcon#read 6, iclass 37, count 2 2006.230.01:08:42.03#ibcon#end of sib2, iclass 37, count 2 2006.230.01:08:42.03#ibcon#*after write, iclass 37, count 2 2006.230.01:08:42.03#ibcon#*before return 0, iclass 37, count 2 2006.230.01:08:42.03#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:42.03#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:42.03#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.01:08:42.03#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:42.03#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:42.15#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:42.15#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:42.15#ibcon#enter wrdev, iclass 37, count 0 2006.230.01:08:42.15#ibcon#first serial, iclass 37, count 0 2006.230.01:08:42.15#ibcon#enter sib2, iclass 37, count 0 2006.230.01:08:42.15#ibcon#flushed, iclass 37, count 0 2006.230.01:08:42.15#ibcon#about to write, iclass 37, count 0 2006.230.01:08:42.15#ibcon#wrote, iclass 37, count 0 2006.230.01:08:42.15#ibcon#about to read 3, iclass 37, count 0 2006.230.01:08:42.17#ibcon#read 3, iclass 37, count 0 2006.230.01:08:42.17#ibcon#about to read 4, iclass 37, count 0 2006.230.01:08:42.17#ibcon#read 4, iclass 37, count 0 2006.230.01:08:42.17#ibcon#about to read 5, iclass 37, count 0 2006.230.01:08:42.17#ibcon#read 5, iclass 37, count 0 2006.230.01:08:42.17#ibcon#about to read 6, iclass 37, count 0 2006.230.01:08:42.17#ibcon#read 6, iclass 37, count 0 2006.230.01:08:42.17#ibcon#end of sib2, iclass 37, count 0 2006.230.01:08:42.17#ibcon#*mode == 0, iclass 37, count 0 2006.230.01:08:42.17#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.01:08:42.17#ibcon#[25=USB\r\n] 2006.230.01:08:42.17#ibcon#*before write, iclass 37, count 0 2006.230.01:08:42.17#ibcon#enter sib2, iclass 37, count 0 2006.230.01:08:42.17#ibcon#flushed, iclass 37, count 0 2006.230.01:08:42.17#ibcon#about to write, iclass 37, count 0 2006.230.01:08:42.17#ibcon#wrote, iclass 37, count 0 2006.230.01:08:42.17#ibcon#about to read 3, iclass 37, count 0 2006.230.01:08:42.20#ibcon#read 3, iclass 37, count 0 2006.230.01:08:42.20#ibcon#about to read 4, iclass 37, count 0 2006.230.01:08:42.20#ibcon#read 4, iclass 37, count 0 2006.230.01:08:42.20#ibcon#about to read 5, iclass 37, count 0 2006.230.01:08:42.20#ibcon#read 5, iclass 37, count 0 2006.230.01:08:42.20#ibcon#about to read 6, iclass 37, count 0 2006.230.01:08:42.20#ibcon#read 6, iclass 37, count 0 2006.230.01:08:42.20#ibcon#end of sib2, iclass 37, count 0 2006.230.01:08:42.20#ibcon#*after write, iclass 37, count 0 2006.230.01:08:42.20#ibcon#*before return 0, iclass 37, count 0 2006.230.01:08:42.20#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:42.20#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:42.20#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.01:08:42.20#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.01:08:42.20$vck44/valo=4,624.99 2006.230.01:08:42.20#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.01:08:42.20#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.01:08:42.20#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:42.20#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:42.20#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:42.20#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:42.20#ibcon#enter wrdev, iclass 39, count 0 2006.230.01:08:42.20#ibcon#first serial, iclass 39, count 0 2006.230.01:08:42.20#ibcon#enter sib2, iclass 39, count 0 2006.230.01:08:42.20#ibcon#flushed, iclass 39, count 0 2006.230.01:08:42.20#ibcon#about to write, iclass 39, count 0 2006.230.01:08:42.20#ibcon#wrote, iclass 39, count 0 2006.230.01:08:42.20#ibcon#about to read 3, iclass 39, count 0 2006.230.01:08:42.22#ibcon#read 3, iclass 39, count 0 2006.230.01:08:42.22#ibcon#about to read 4, iclass 39, count 0 2006.230.01:08:42.22#ibcon#read 4, iclass 39, count 0 2006.230.01:08:42.22#ibcon#about to read 5, iclass 39, count 0 2006.230.01:08:42.22#ibcon#read 5, iclass 39, count 0 2006.230.01:08:42.22#ibcon#about to read 6, iclass 39, count 0 2006.230.01:08:42.22#ibcon#read 6, iclass 39, count 0 2006.230.01:08:42.22#ibcon#end of sib2, iclass 39, count 0 2006.230.01:08:42.22#ibcon#*mode == 0, iclass 39, count 0 2006.230.01:08:42.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.01:08:42.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:08:42.22#ibcon#*before write, iclass 39, count 0 2006.230.01:08:42.22#ibcon#enter sib2, iclass 39, count 0 2006.230.01:08:42.22#ibcon#flushed, iclass 39, count 0 2006.230.01:08:42.22#ibcon#about to write, iclass 39, count 0 2006.230.01:08:42.22#ibcon#wrote, iclass 39, count 0 2006.230.01:08:42.22#ibcon#about to read 3, iclass 39, count 0 2006.230.01:08:42.26#ibcon#read 3, iclass 39, count 0 2006.230.01:08:42.26#ibcon#about to read 4, iclass 39, count 0 2006.230.01:08:42.26#ibcon#read 4, iclass 39, count 0 2006.230.01:08:42.26#ibcon#about to read 5, iclass 39, count 0 2006.230.01:08:42.26#ibcon#read 5, iclass 39, count 0 2006.230.01:08:42.26#ibcon#about to read 6, iclass 39, count 0 2006.230.01:08:42.26#ibcon#read 6, iclass 39, count 0 2006.230.01:08:42.26#ibcon#end of sib2, iclass 39, count 0 2006.230.01:08:42.26#ibcon#*after write, iclass 39, count 0 2006.230.01:08:42.26#ibcon#*before return 0, iclass 39, count 0 2006.230.01:08:42.26#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:42.26#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:42.26#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.01:08:42.26#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.01:08:42.26$vck44/va=4,7 2006.230.01:08:42.26#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.01:08:42.26#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.01:08:42.26#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:42.26#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:42.32#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:42.32#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:42.32#ibcon#enter wrdev, iclass 3, count 2 2006.230.01:08:42.32#ibcon#first serial, iclass 3, count 2 2006.230.01:08:42.32#ibcon#enter sib2, iclass 3, count 2 2006.230.01:08:42.32#ibcon#flushed, iclass 3, count 2 2006.230.01:08:42.32#ibcon#about to write, iclass 3, count 2 2006.230.01:08:42.32#ibcon#wrote, iclass 3, count 2 2006.230.01:08:42.32#ibcon#about to read 3, iclass 3, count 2 2006.230.01:08:42.34#ibcon#read 3, iclass 3, count 2 2006.230.01:08:42.34#ibcon#about to read 4, iclass 3, count 2 2006.230.01:08:42.34#ibcon#read 4, iclass 3, count 2 2006.230.01:08:42.34#ibcon#about to read 5, iclass 3, count 2 2006.230.01:08:42.34#ibcon#read 5, iclass 3, count 2 2006.230.01:08:42.34#ibcon#about to read 6, iclass 3, count 2 2006.230.01:08:42.34#ibcon#read 6, iclass 3, count 2 2006.230.01:08:42.34#ibcon#end of sib2, iclass 3, count 2 2006.230.01:08:42.34#ibcon#*mode == 0, iclass 3, count 2 2006.230.01:08:42.34#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.01:08:42.34#ibcon#[25=AT04-07\r\n] 2006.230.01:08:42.34#ibcon#*before write, iclass 3, count 2 2006.230.01:08:42.34#ibcon#enter sib2, iclass 3, count 2 2006.230.01:08:42.34#ibcon#flushed, iclass 3, count 2 2006.230.01:08:42.34#ibcon#about to write, iclass 3, count 2 2006.230.01:08:42.34#ibcon#wrote, iclass 3, count 2 2006.230.01:08:42.34#ibcon#about to read 3, iclass 3, count 2 2006.230.01:08:42.37#ibcon#read 3, iclass 3, count 2 2006.230.01:08:42.37#ibcon#about to read 4, iclass 3, count 2 2006.230.01:08:42.37#ibcon#read 4, iclass 3, count 2 2006.230.01:08:42.37#ibcon#about to read 5, iclass 3, count 2 2006.230.01:08:42.37#ibcon#read 5, iclass 3, count 2 2006.230.01:08:42.37#ibcon#about to read 6, iclass 3, count 2 2006.230.01:08:42.37#ibcon#read 6, iclass 3, count 2 2006.230.01:08:42.37#ibcon#end of sib2, iclass 3, count 2 2006.230.01:08:42.37#ibcon#*after write, iclass 3, count 2 2006.230.01:08:42.37#ibcon#*before return 0, iclass 3, count 2 2006.230.01:08:42.37#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:42.37#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:42.37#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.01:08:42.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:42.37#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:42.49#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:42.49#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:42.49#ibcon#enter wrdev, iclass 3, count 0 2006.230.01:08:42.49#ibcon#first serial, iclass 3, count 0 2006.230.01:08:42.49#ibcon#enter sib2, iclass 3, count 0 2006.230.01:08:42.49#ibcon#flushed, iclass 3, count 0 2006.230.01:08:42.49#ibcon#about to write, iclass 3, count 0 2006.230.01:08:42.49#ibcon#wrote, iclass 3, count 0 2006.230.01:08:42.49#ibcon#about to read 3, iclass 3, count 0 2006.230.01:08:42.51#ibcon#read 3, iclass 3, count 0 2006.230.01:08:42.51#ibcon#about to read 4, iclass 3, count 0 2006.230.01:08:42.51#ibcon#read 4, iclass 3, count 0 2006.230.01:08:42.51#ibcon#about to read 5, iclass 3, count 0 2006.230.01:08:42.51#ibcon#read 5, iclass 3, count 0 2006.230.01:08:42.51#ibcon#about to read 6, iclass 3, count 0 2006.230.01:08:42.51#ibcon#read 6, iclass 3, count 0 2006.230.01:08:42.51#ibcon#end of sib2, iclass 3, count 0 2006.230.01:08:42.51#ibcon#*mode == 0, iclass 3, count 0 2006.230.01:08:42.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.01:08:42.51#ibcon#[25=USB\r\n] 2006.230.01:08:42.51#ibcon#*before write, iclass 3, count 0 2006.230.01:08:42.51#ibcon#enter sib2, iclass 3, count 0 2006.230.01:08:42.51#ibcon#flushed, iclass 3, count 0 2006.230.01:08:42.51#ibcon#about to write, iclass 3, count 0 2006.230.01:08:42.51#ibcon#wrote, iclass 3, count 0 2006.230.01:08:42.51#ibcon#about to read 3, iclass 3, count 0 2006.230.01:08:42.54#ibcon#read 3, iclass 3, count 0 2006.230.01:08:42.54#ibcon#about to read 4, iclass 3, count 0 2006.230.01:08:42.54#ibcon#read 4, iclass 3, count 0 2006.230.01:08:42.54#ibcon#about to read 5, iclass 3, count 0 2006.230.01:08:42.54#ibcon#read 5, iclass 3, count 0 2006.230.01:08:42.54#ibcon#about to read 6, iclass 3, count 0 2006.230.01:08:42.54#ibcon#read 6, iclass 3, count 0 2006.230.01:08:42.54#ibcon#end of sib2, iclass 3, count 0 2006.230.01:08:42.54#ibcon#*after write, iclass 3, count 0 2006.230.01:08:42.54#ibcon#*before return 0, iclass 3, count 0 2006.230.01:08:42.54#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:42.54#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:42.54#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.01:08:42.54#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.01:08:42.54$vck44/valo=5,734.99 2006.230.01:08:42.54#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.01:08:42.54#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.01:08:42.54#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:42.54#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:42.54#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:42.54#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:42.54#ibcon#enter wrdev, iclass 5, count 0 2006.230.01:08:42.54#ibcon#first serial, iclass 5, count 0 2006.230.01:08:42.54#ibcon#enter sib2, iclass 5, count 0 2006.230.01:08:42.54#ibcon#flushed, iclass 5, count 0 2006.230.01:08:42.54#ibcon#about to write, iclass 5, count 0 2006.230.01:08:42.54#ibcon#wrote, iclass 5, count 0 2006.230.01:08:42.54#ibcon#about to read 3, iclass 5, count 0 2006.230.01:08:42.56#ibcon#read 3, iclass 5, count 0 2006.230.01:08:42.56#ibcon#about to read 4, iclass 5, count 0 2006.230.01:08:42.56#ibcon#read 4, iclass 5, count 0 2006.230.01:08:42.56#ibcon#about to read 5, iclass 5, count 0 2006.230.01:08:42.56#ibcon#read 5, iclass 5, count 0 2006.230.01:08:42.56#ibcon#about to read 6, iclass 5, count 0 2006.230.01:08:42.56#ibcon#read 6, iclass 5, count 0 2006.230.01:08:42.56#ibcon#end of sib2, iclass 5, count 0 2006.230.01:08:42.56#ibcon#*mode == 0, iclass 5, count 0 2006.230.01:08:42.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.01:08:42.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:08:42.56#ibcon#*before write, iclass 5, count 0 2006.230.01:08:42.56#ibcon#enter sib2, iclass 5, count 0 2006.230.01:08:42.56#ibcon#flushed, iclass 5, count 0 2006.230.01:08:42.56#ibcon#about to write, iclass 5, count 0 2006.230.01:08:42.56#ibcon#wrote, iclass 5, count 0 2006.230.01:08:42.56#ibcon#about to read 3, iclass 5, count 0 2006.230.01:08:42.60#ibcon#read 3, iclass 5, count 0 2006.230.01:08:42.60#ibcon#about to read 4, iclass 5, count 0 2006.230.01:08:42.60#ibcon#read 4, iclass 5, count 0 2006.230.01:08:42.60#ibcon#about to read 5, iclass 5, count 0 2006.230.01:08:42.60#ibcon#read 5, iclass 5, count 0 2006.230.01:08:42.60#ibcon#about to read 6, iclass 5, count 0 2006.230.01:08:42.60#ibcon#read 6, iclass 5, count 0 2006.230.01:08:42.60#ibcon#end of sib2, iclass 5, count 0 2006.230.01:08:42.60#ibcon#*after write, iclass 5, count 0 2006.230.01:08:42.60#ibcon#*before return 0, iclass 5, count 0 2006.230.01:08:42.60#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:42.60#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:42.60#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.01:08:42.60#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.01:08:42.60$vck44/va=5,4 2006.230.01:08:42.60#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.01:08:42.60#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.01:08:42.60#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:42.60#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:42.66#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:42.66#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:42.66#ibcon#enter wrdev, iclass 7, count 2 2006.230.01:08:42.66#ibcon#first serial, iclass 7, count 2 2006.230.01:08:42.66#ibcon#enter sib2, iclass 7, count 2 2006.230.01:08:42.66#ibcon#flushed, iclass 7, count 2 2006.230.01:08:42.66#ibcon#about to write, iclass 7, count 2 2006.230.01:08:42.66#ibcon#wrote, iclass 7, count 2 2006.230.01:08:42.66#ibcon#about to read 3, iclass 7, count 2 2006.230.01:08:42.68#ibcon#read 3, iclass 7, count 2 2006.230.01:08:42.68#ibcon#about to read 4, iclass 7, count 2 2006.230.01:08:42.68#ibcon#read 4, iclass 7, count 2 2006.230.01:08:42.68#ibcon#about to read 5, iclass 7, count 2 2006.230.01:08:42.68#ibcon#read 5, iclass 7, count 2 2006.230.01:08:42.68#ibcon#about to read 6, iclass 7, count 2 2006.230.01:08:42.68#ibcon#read 6, iclass 7, count 2 2006.230.01:08:42.68#ibcon#end of sib2, iclass 7, count 2 2006.230.01:08:42.68#ibcon#*mode == 0, iclass 7, count 2 2006.230.01:08:42.68#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.01:08:42.68#ibcon#[25=AT05-04\r\n] 2006.230.01:08:42.68#ibcon#*before write, iclass 7, count 2 2006.230.01:08:42.68#ibcon#enter sib2, iclass 7, count 2 2006.230.01:08:42.68#ibcon#flushed, iclass 7, count 2 2006.230.01:08:42.68#ibcon#about to write, iclass 7, count 2 2006.230.01:08:42.68#ibcon#wrote, iclass 7, count 2 2006.230.01:08:42.68#ibcon#about to read 3, iclass 7, count 2 2006.230.01:08:42.71#ibcon#read 3, iclass 7, count 2 2006.230.01:08:42.71#ibcon#about to read 4, iclass 7, count 2 2006.230.01:08:42.71#ibcon#read 4, iclass 7, count 2 2006.230.01:08:42.71#ibcon#about to read 5, iclass 7, count 2 2006.230.01:08:42.71#ibcon#read 5, iclass 7, count 2 2006.230.01:08:42.71#ibcon#about to read 6, iclass 7, count 2 2006.230.01:08:42.71#ibcon#read 6, iclass 7, count 2 2006.230.01:08:42.71#ibcon#end of sib2, iclass 7, count 2 2006.230.01:08:42.71#ibcon#*after write, iclass 7, count 2 2006.230.01:08:42.71#ibcon#*before return 0, iclass 7, count 2 2006.230.01:08:42.71#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:42.71#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:42.71#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.01:08:42.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:42.71#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:42.83#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:42.83#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:42.83#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:08:42.83#ibcon#first serial, iclass 7, count 0 2006.230.01:08:42.83#ibcon#enter sib2, iclass 7, count 0 2006.230.01:08:42.83#ibcon#flushed, iclass 7, count 0 2006.230.01:08:42.83#ibcon#about to write, iclass 7, count 0 2006.230.01:08:42.83#ibcon#wrote, iclass 7, count 0 2006.230.01:08:42.83#ibcon#about to read 3, iclass 7, count 0 2006.230.01:08:42.85#ibcon#read 3, iclass 7, count 0 2006.230.01:08:42.85#ibcon#about to read 4, iclass 7, count 0 2006.230.01:08:42.85#ibcon#read 4, iclass 7, count 0 2006.230.01:08:42.85#ibcon#about to read 5, iclass 7, count 0 2006.230.01:08:42.85#ibcon#read 5, iclass 7, count 0 2006.230.01:08:42.85#ibcon#about to read 6, iclass 7, count 0 2006.230.01:08:42.85#ibcon#read 6, iclass 7, count 0 2006.230.01:08:42.85#ibcon#end of sib2, iclass 7, count 0 2006.230.01:08:42.85#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:08:42.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:08:42.85#ibcon#[25=USB\r\n] 2006.230.01:08:42.85#ibcon#*before write, iclass 7, count 0 2006.230.01:08:42.85#ibcon#enter sib2, iclass 7, count 0 2006.230.01:08:42.85#ibcon#flushed, iclass 7, count 0 2006.230.01:08:42.85#ibcon#about to write, iclass 7, count 0 2006.230.01:08:42.85#ibcon#wrote, iclass 7, count 0 2006.230.01:08:42.85#ibcon#about to read 3, iclass 7, count 0 2006.230.01:08:42.88#ibcon#read 3, iclass 7, count 0 2006.230.01:08:42.88#ibcon#about to read 4, iclass 7, count 0 2006.230.01:08:42.88#ibcon#read 4, iclass 7, count 0 2006.230.01:08:42.88#ibcon#about to read 5, iclass 7, count 0 2006.230.01:08:42.88#ibcon#read 5, iclass 7, count 0 2006.230.01:08:42.88#ibcon#about to read 6, iclass 7, count 0 2006.230.01:08:42.88#ibcon#read 6, iclass 7, count 0 2006.230.01:08:42.88#ibcon#end of sib2, iclass 7, count 0 2006.230.01:08:42.88#ibcon#*after write, iclass 7, count 0 2006.230.01:08:42.88#ibcon#*before return 0, iclass 7, count 0 2006.230.01:08:42.88#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:42.88#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:42.88#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:08:42.88#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:08:42.88$vck44/valo=6,814.99 2006.230.01:08:42.88#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.01:08:42.88#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.01:08:42.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:42.88#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:42.88#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:42.88#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:42.88#ibcon#enter wrdev, iclass 11, count 0 2006.230.01:08:42.88#ibcon#first serial, iclass 11, count 0 2006.230.01:08:42.88#ibcon#enter sib2, iclass 11, count 0 2006.230.01:08:42.88#ibcon#flushed, iclass 11, count 0 2006.230.01:08:42.88#ibcon#about to write, iclass 11, count 0 2006.230.01:08:42.88#ibcon#wrote, iclass 11, count 0 2006.230.01:08:42.88#ibcon#about to read 3, iclass 11, count 0 2006.230.01:08:42.90#ibcon#read 3, iclass 11, count 0 2006.230.01:08:42.90#ibcon#about to read 4, iclass 11, count 0 2006.230.01:08:42.90#ibcon#read 4, iclass 11, count 0 2006.230.01:08:42.90#ibcon#about to read 5, iclass 11, count 0 2006.230.01:08:42.90#ibcon#read 5, iclass 11, count 0 2006.230.01:08:42.90#ibcon#about to read 6, iclass 11, count 0 2006.230.01:08:42.90#ibcon#read 6, iclass 11, count 0 2006.230.01:08:42.90#ibcon#end of sib2, iclass 11, count 0 2006.230.01:08:42.90#ibcon#*mode == 0, iclass 11, count 0 2006.230.01:08:42.90#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.01:08:42.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:08:42.90#ibcon#*before write, iclass 11, count 0 2006.230.01:08:42.90#ibcon#enter sib2, iclass 11, count 0 2006.230.01:08:42.90#ibcon#flushed, iclass 11, count 0 2006.230.01:08:42.90#ibcon#about to write, iclass 11, count 0 2006.230.01:08:42.90#ibcon#wrote, iclass 11, count 0 2006.230.01:08:42.90#ibcon#about to read 3, iclass 11, count 0 2006.230.01:08:42.94#ibcon#read 3, iclass 11, count 0 2006.230.01:08:42.94#ibcon#about to read 4, iclass 11, count 0 2006.230.01:08:42.94#ibcon#read 4, iclass 11, count 0 2006.230.01:08:42.94#ibcon#about to read 5, iclass 11, count 0 2006.230.01:08:42.94#ibcon#read 5, iclass 11, count 0 2006.230.01:08:42.94#ibcon#about to read 6, iclass 11, count 0 2006.230.01:08:42.94#ibcon#read 6, iclass 11, count 0 2006.230.01:08:42.94#ibcon#end of sib2, iclass 11, count 0 2006.230.01:08:42.94#ibcon#*after write, iclass 11, count 0 2006.230.01:08:42.94#ibcon#*before return 0, iclass 11, count 0 2006.230.01:08:42.94#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:42.94#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:42.94#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.01:08:42.94#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.01:08:42.94$vck44/va=6,4 2006.230.01:08:42.94#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.01:08:42.94#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.01:08:42.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:42.94#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:43.00#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:43.00#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:43.00#ibcon#enter wrdev, iclass 13, count 2 2006.230.01:08:43.00#ibcon#first serial, iclass 13, count 2 2006.230.01:08:43.00#ibcon#enter sib2, iclass 13, count 2 2006.230.01:08:43.00#ibcon#flushed, iclass 13, count 2 2006.230.01:08:43.00#ibcon#about to write, iclass 13, count 2 2006.230.01:08:43.00#ibcon#wrote, iclass 13, count 2 2006.230.01:08:43.00#ibcon#about to read 3, iclass 13, count 2 2006.230.01:08:43.02#ibcon#read 3, iclass 13, count 2 2006.230.01:08:43.02#ibcon#about to read 4, iclass 13, count 2 2006.230.01:08:43.02#ibcon#read 4, iclass 13, count 2 2006.230.01:08:43.02#ibcon#about to read 5, iclass 13, count 2 2006.230.01:08:43.02#ibcon#read 5, iclass 13, count 2 2006.230.01:08:43.02#ibcon#about to read 6, iclass 13, count 2 2006.230.01:08:43.02#ibcon#read 6, iclass 13, count 2 2006.230.01:08:43.02#ibcon#end of sib2, iclass 13, count 2 2006.230.01:08:43.02#ibcon#*mode == 0, iclass 13, count 2 2006.230.01:08:43.02#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.01:08:43.02#ibcon#[25=AT06-04\r\n] 2006.230.01:08:43.02#ibcon#*before write, iclass 13, count 2 2006.230.01:08:43.02#ibcon#enter sib2, iclass 13, count 2 2006.230.01:08:43.02#ibcon#flushed, iclass 13, count 2 2006.230.01:08:43.02#ibcon#about to write, iclass 13, count 2 2006.230.01:08:43.02#ibcon#wrote, iclass 13, count 2 2006.230.01:08:43.02#ibcon#about to read 3, iclass 13, count 2 2006.230.01:08:43.05#ibcon#read 3, iclass 13, count 2 2006.230.01:08:43.05#ibcon#about to read 4, iclass 13, count 2 2006.230.01:08:43.05#ibcon#read 4, iclass 13, count 2 2006.230.01:08:43.05#ibcon#about to read 5, iclass 13, count 2 2006.230.01:08:43.05#ibcon#read 5, iclass 13, count 2 2006.230.01:08:43.05#ibcon#about to read 6, iclass 13, count 2 2006.230.01:08:43.05#ibcon#read 6, iclass 13, count 2 2006.230.01:08:43.05#ibcon#end of sib2, iclass 13, count 2 2006.230.01:08:43.05#ibcon#*after write, iclass 13, count 2 2006.230.01:08:43.05#ibcon#*before return 0, iclass 13, count 2 2006.230.01:08:43.05#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:43.05#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:43.05#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.01:08:43.05#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:43.05#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:43.17#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:43.17#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:43.17#ibcon#enter wrdev, iclass 13, count 0 2006.230.01:08:43.17#ibcon#first serial, iclass 13, count 0 2006.230.01:08:43.17#ibcon#enter sib2, iclass 13, count 0 2006.230.01:08:43.17#ibcon#flushed, iclass 13, count 0 2006.230.01:08:43.17#ibcon#about to write, iclass 13, count 0 2006.230.01:08:43.17#ibcon#wrote, iclass 13, count 0 2006.230.01:08:43.17#ibcon#about to read 3, iclass 13, count 0 2006.230.01:08:43.19#ibcon#read 3, iclass 13, count 0 2006.230.01:08:43.19#ibcon#about to read 4, iclass 13, count 0 2006.230.01:08:43.19#ibcon#read 4, iclass 13, count 0 2006.230.01:08:43.19#ibcon#about to read 5, iclass 13, count 0 2006.230.01:08:43.19#ibcon#read 5, iclass 13, count 0 2006.230.01:08:43.19#ibcon#about to read 6, iclass 13, count 0 2006.230.01:08:43.19#ibcon#read 6, iclass 13, count 0 2006.230.01:08:43.19#ibcon#end of sib2, iclass 13, count 0 2006.230.01:08:43.19#ibcon#*mode == 0, iclass 13, count 0 2006.230.01:08:43.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.01:08:43.19#ibcon#[25=USB\r\n] 2006.230.01:08:43.19#ibcon#*before write, iclass 13, count 0 2006.230.01:08:43.19#ibcon#enter sib2, iclass 13, count 0 2006.230.01:08:43.19#ibcon#flushed, iclass 13, count 0 2006.230.01:08:43.19#ibcon#about to write, iclass 13, count 0 2006.230.01:08:43.19#ibcon#wrote, iclass 13, count 0 2006.230.01:08:43.19#ibcon#about to read 3, iclass 13, count 0 2006.230.01:08:43.22#ibcon#read 3, iclass 13, count 0 2006.230.01:08:43.22#ibcon#about to read 4, iclass 13, count 0 2006.230.01:08:43.22#ibcon#read 4, iclass 13, count 0 2006.230.01:08:43.22#ibcon#about to read 5, iclass 13, count 0 2006.230.01:08:43.22#ibcon#read 5, iclass 13, count 0 2006.230.01:08:43.22#ibcon#about to read 6, iclass 13, count 0 2006.230.01:08:43.22#ibcon#read 6, iclass 13, count 0 2006.230.01:08:43.22#ibcon#end of sib2, iclass 13, count 0 2006.230.01:08:43.22#ibcon#*after write, iclass 13, count 0 2006.230.01:08:43.22#ibcon#*before return 0, iclass 13, count 0 2006.230.01:08:43.22#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:43.22#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:43.22#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.01:08:43.22#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.01:08:43.22$vck44/valo=7,864.99 2006.230.01:08:43.22#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.01:08:43.22#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.01:08:43.22#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:43.22#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:43.22#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:43.22#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:43.22#ibcon#enter wrdev, iclass 15, count 0 2006.230.01:08:43.22#ibcon#first serial, iclass 15, count 0 2006.230.01:08:43.22#ibcon#enter sib2, iclass 15, count 0 2006.230.01:08:43.22#ibcon#flushed, iclass 15, count 0 2006.230.01:08:43.22#ibcon#about to write, iclass 15, count 0 2006.230.01:08:43.22#ibcon#wrote, iclass 15, count 0 2006.230.01:08:43.22#ibcon#about to read 3, iclass 15, count 0 2006.230.01:08:43.24#ibcon#read 3, iclass 15, count 0 2006.230.01:08:43.24#ibcon#about to read 4, iclass 15, count 0 2006.230.01:08:43.24#ibcon#read 4, iclass 15, count 0 2006.230.01:08:43.24#ibcon#about to read 5, iclass 15, count 0 2006.230.01:08:43.24#ibcon#read 5, iclass 15, count 0 2006.230.01:08:43.24#ibcon#about to read 6, iclass 15, count 0 2006.230.01:08:43.24#ibcon#read 6, iclass 15, count 0 2006.230.01:08:43.24#ibcon#end of sib2, iclass 15, count 0 2006.230.01:08:43.24#ibcon#*mode == 0, iclass 15, count 0 2006.230.01:08:43.24#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.01:08:43.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:08:43.24#ibcon#*before write, iclass 15, count 0 2006.230.01:08:43.24#ibcon#enter sib2, iclass 15, count 0 2006.230.01:08:43.24#ibcon#flushed, iclass 15, count 0 2006.230.01:08:43.24#ibcon#about to write, iclass 15, count 0 2006.230.01:08:43.24#ibcon#wrote, iclass 15, count 0 2006.230.01:08:43.24#ibcon#about to read 3, iclass 15, count 0 2006.230.01:08:43.28#ibcon#read 3, iclass 15, count 0 2006.230.01:08:43.28#ibcon#about to read 4, iclass 15, count 0 2006.230.01:08:43.28#ibcon#read 4, iclass 15, count 0 2006.230.01:08:43.28#ibcon#about to read 5, iclass 15, count 0 2006.230.01:08:43.28#ibcon#read 5, iclass 15, count 0 2006.230.01:08:43.28#ibcon#about to read 6, iclass 15, count 0 2006.230.01:08:43.28#ibcon#read 6, iclass 15, count 0 2006.230.01:08:43.28#ibcon#end of sib2, iclass 15, count 0 2006.230.01:08:43.28#ibcon#*after write, iclass 15, count 0 2006.230.01:08:43.28#ibcon#*before return 0, iclass 15, count 0 2006.230.01:08:43.28#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:43.28#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:43.28#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.01:08:43.28#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.01:08:43.28$vck44/va=7,5 2006.230.01:08:43.28#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.230.01:08:43.28#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.230.01:08:43.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:43.28#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:43.34#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:43.34#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:43.34#ibcon#enter wrdev, iclass 17, count 2 2006.230.01:08:43.34#ibcon#first serial, iclass 17, count 2 2006.230.01:08:43.34#ibcon#enter sib2, iclass 17, count 2 2006.230.01:08:43.34#ibcon#flushed, iclass 17, count 2 2006.230.01:08:43.34#ibcon#about to write, iclass 17, count 2 2006.230.01:08:43.34#ibcon#wrote, iclass 17, count 2 2006.230.01:08:43.34#ibcon#about to read 3, iclass 17, count 2 2006.230.01:08:43.36#ibcon#read 3, iclass 17, count 2 2006.230.01:08:43.36#ibcon#about to read 4, iclass 17, count 2 2006.230.01:08:43.36#ibcon#read 4, iclass 17, count 2 2006.230.01:08:43.36#ibcon#about to read 5, iclass 17, count 2 2006.230.01:08:43.36#ibcon#read 5, iclass 17, count 2 2006.230.01:08:43.36#ibcon#about to read 6, iclass 17, count 2 2006.230.01:08:43.36#ibcon#read 6, iclass 17, count 2 2006.230.01:08:43.36#ibcon#end of sib2, iclass 17, count 2 2006.230.01:08:43.36#ibcon#*mode == 0, iclass 17, count 2 2006.230.01:08:43.36#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.230.01:08:43.36#ibcon#[25=AT07-05\r\n] 2006.230.01:08:43.36#ibcon#*before write, iclass 17, count 2 2006.230.01:08:43.36#ibcon#enter sib2, iclass 17, count 2 2006.230.01:08:43.36#ibcon#flushed, iclass 17, count 2 2006.230.01:08:43.36#ibcon#about to write, iclass 17, count 2 2006.230.01:08:43.36#ibcon#wrote, iclass 17, count 2 2006.230.01:08:43.36#ibcon#about to read 3, iclass 17, count 2 2006.230.01:08:43.39#ibcon#read 3, iclass 17, count 2 2006.230.01:08:43.39#ibcon#about to read 4, iclass 17, count 2 2006.230.01:08:43.39#ibcon#read 4, iclass 17, count 2 2006.230.01:08:43.39#ibcon#about to read 5, iclass 17, count 2 2006.230.01:08:43.39#ibcon#read 5, iclass 17, count 2 2006.230.01:08:43.39#ibcon#about to read 6, iclass 17, count 2 2006.230.01:08:43.39#ibcon#read 6, iclass 17, count 2 2006.230.01:08:43.39#ibcon#end of sib2, iclass 17, count 2 2006.230.01:08:43.39#ibcon#*after write, iclass 17, count 2 2006.230.01:08:43.39#ibcon#*before return 0, iclass 17, count 2 2006.230.01:08:43.39#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:43.39#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:43.39#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.230.01:08:43.39#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:43.39#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:43.51#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:43.51#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:43.51#ibcon#enter wrdev, iclass 17, count 0 2006.230.01:08:43.51#ibcon#first serial, iclass 17, count 0 2006.230.01:08:43.51#ibcon#enter sib2, iclass 17, count 0 2006.230.01:08:43.51#ibcon#flushed, iclass 17, count 0 2006.230.01:08:43.51#ibcon#about to write, iclass 17, count 0 2006.230.01:08:43.51#ibcon#wrote, iclass 17, count 0 2006.230.01:08:43.51#ibcon#about to read 3, iclass 17, count 0 2006.230.01:08:43.53#ibcon#read 3, iclass 17, count 0 2006.230.01:08:43.53#ibcon#about to read 4, iclass 17, count 0 2006.230.01:08:43.53#ibcon#read 4, iclass 17, count 0 2006.230.01:08:43.53#ibcon#about to read 5, iclass 17, count 0 2006.230.01:08:43.53#ibcon#read 5, iclass 17, count 0 2006.230.01:08:43.53#ibcon#about to read 6, iclass 17, count 0 2006.230.01:08:43.53#ibcon#read 6, iclass 17, count 0 2006.230.01:08:43.53#ibcon#end of sib2, iclass 17, count 0 2006.230.01:08:43.53#ibcon#*mode == 0, iclass 17, count 0 2006.230.01:08:43.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.01:08:43.53#ibcon#[25=USB\r\n] 2006.230.01:08:43.53#ibcon#*before write, iclass 17, count 0 2006.230.01:08:43.53#ibcon#enter sib2, iclass 17, count 0 2006.230.01:08:43.53#ibcon#flushed, iclass 17, count 0 2006.230.01:08:43.53#ibcon#about to write, iclass 17, count 0 2006.230.01:08:43.53#ibcon#wrote, iclass 17, count 0 2006.230.01:08:43.53#ibcon#about to read 3, iclass 17, count 0 2006.230.01:08:43.56#ibcon#read 3, iclass 17, count 0 2006.230.01:08:43.56#ibcon#about to read 4, iclass 17, count 0 2006.230.01:08:43.56#ibcon#read 4, iclass 17, count 0 2006.230.01:08:43.56#ibcon#about to read 5, iclass 17, count 0 2006.230.01:08:43.56#ibcon#read 5, iclass 17, count 0 2006.230.01:08:43.56#ibcon#about to read 6, iclass 17, count 0 2006.230.01:08:43.56#ibcon#read 6, iclass 17, count 0 2006.230.01:08:43.56#ibcon#end of sib2, iclass 17, count 0 2006.230.01:08:43.56#ibcon#*after write, iclass 17, count 0 2006.230.01:08:43.56#ibcon#*before return 0, iclass 17, count 0 2006.230.01:08:43.56#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:43.56#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:43.56#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.01:08:43.56#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.01:08:43.57$vck44/valo=8,884.99 2006.230.01:08:43.57#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.01:08:43.57#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.01:08:43.57#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:43.57#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:43.57#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:43.57#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:43.57#ibcon#enter wrdev, iclass 19, count 0 2006.230.01:08:43.57#ibcon#first serial, iclass 19, count 0 2006.230.01:08:43.57#ibcon#enter sib2, iclass 19, count 0 2006.230.01:08:43.57#ibcon#flushed, iclass 19, count 0 2006.230.01:08:43.57#ibcon#about to write, iclass 19, count 0 2006.230.01:08:43.57#ibcon#wrote, iclass 19, count 0 2006.230.01:08:43.57#ibcon#about to read 3, iclass 19, count 0 2006.230.01:08:43.58#ibcon#read 3, iclass 19, count 0 2006.230.01:08:43.58#ibcon#about to read 4, iclass 19, count 0 2006.230.01:08:43.58#ibcon#read 4, iclass 19, count 0 2006.230.01:08:43.58#ibcon#about to read 5, iclass 19, count 0 2006.230.01:08:43.58#ibcon#read 5, iclass 19, count 0 2006.230.01:08:43.58#ibcon#about to read 6, iclass 19, count 0 2006.230.01:08:43.58#ibcon#read 6, iclass 19, count 0 2006.230.01:08:43.58#ibcon#end of sib2, iclass 19, count 0 2006.230.01:08:43.58#ibcon#*mode == 0, iclass 19, count 0 2006.230.01:08:43.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.01:08:43.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:08:43.58#ibcon#*before write, iclass 19, count 0 2006.230.01:08:43.58#ibcon#enter sib2, iclass 19, count 0 2006.230.01:08:43.58#ibcon#flushed, iclass 19, count 0 2006.230.01:08:43.58#ibcon#about to write, iclass 19, count 0 2006.230.01:08:43.58#ibcon#wrote, iclass 19, count 0 2006.230.01:08:43.58#ibcon#about to read 3, iclass 19, count 0 2006.230.01:08:43.62#ibcon#read 3, iclass 19, count 0 2006.230.01:08:43.62#ibcon#about to read 4, iclass 19, count 0 2006.230.01:08:43.62#ibcon#read 4, iclass 19, count 0 2006.230.01:08:43.62#ibcon#about to read 5, iclass 19, count 0 2006.230.01:08:43.62#ibcon#read 5, iclass 19, count 0 2006.230.01:08:43.62#ibcon#about to read 6, iclass 19, count 0 2006.230.01:08:43.62#ibcon#read 6, iclass 19, count 0 2006.230.01:08:43.62#ibcon#end of sib2, iclass 19, count 0 2006.230.01:08:43.62#ibcon#*after write, iclass 19, count 0 2006.230.01:08:43.62#ibcon#*before return 0, iclass 19, count 0 2006.230.01:08:43.62#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:43.62#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:43.62#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.01:08:43.62#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.01:08:43.62$vck44/va=8,6 2006.230.01:08:43.62#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.230.01:08:43.62#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.230.01:08:43.62#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:43.62#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:08:43.68#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:08:43.68#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:08:43.68#ibcon#enter wrdev, iclass 21, count 2 2006.230.01:08:43.68#ibcon#first serial, iclass 21, count 2 2006.230.01:08:43.68#ibcon#enter sib2, iclass 21, count 2 2006.230.01:08:43.68#ibcon#flushed, iclass 21, count 2 2006.230.01:08:43.68#ibcon#about to write, iclass 21, count 2 2006.230.01:08:43.68#ibcon#wrote, iclass 21, count 2 2006.230.01:08:43.68#ibcon#about to read 3, iclass 21, count 2 2006.230.01:08:43.70#ibcon#read 3, iclass 21, count 2 2006.230.01:08:43.70#ibcon#about to read 4, iclass 21, count 2 2006.230.01:08:43.70#ibcon#read 4, iclass 21, count 2 2006.230.01:08:43.70#ibcon#about to read 5, iclass 21, count 2 2006.230.01:08:43.70#ibcon#read 5, iclass 21, count 2 2006.230.01:08:43.70#ibcon#about to read 6, iclass 21, count 2 2006.230.01:08:43.70#ibcon#read 6, iclass 21, count 2 2006.230.01:08:43.70#ibcon#end of sib2, iclass 21, count 2 2006.230.01:08:43.70#ibcon#*mode == 0, iclass 21, count 2 2006.230.01:08:43.70#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.230.01:08:43.70#ibcon#[25=AT08-06\r\n] 2006.230.01:08:43.70#ibcon#*before write, iclass 21, count 2 2006.230.01:08:43.70#ibcon#enter sib2, iclass 21, count 2 2006.230.01:08:43.70#ibcon#flushed, iclass 21, count 2 2006.230.01:08:43.70#ibcon#about to write, iclass 21, count 2 2006.230.01:08:43.70#ibcon#wrote, iclass 21, count 2 2006.230.01:08:43.70#ibcon#about to read 3, iclass 21, count 2 2006.230.01:08:43.73#ibcon#read 3, iclass 21, count 2 2006.230.01:08:43.73#ibcon#about to read 4, iclass 21, count 2 2006.230.01:08:43.73#ibcon#read 4, iclass 21, count 2 2006.230.01:08:43.73#ibcon#about to read 5, iclass 21, count 2 2006.230.01:08:43.73#ibcon#read 5, iclass 21, count 2 2006.230.01:08:43.73#ibcon#about to read 6, iclass 21, count 2 2006.230.01:08:43.73#ibcon#read 6, iclass 21, count 2 2006.230.01:08:43.73#ibcon#end of sib2, iclass 21, count 2 2006.230.01:08:43.73#ibcon#*after write, iclass 21, count 2 2006.230.01:08:43.73#ibcon#*before return 0, iclass 21, count 2 2006.230.01:08:43.73#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:08:43.73#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:08:43.73#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.230.01:08:43.73#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:43.73#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:08:43.85#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:08:43.85#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:08:43.85#ibcon#enter wrdev, iclass 21, count 0 2006.230.01:08:43.85#ibcon#first serial, iclass 21, count 0 2006.230.01:08:43.85#ibcon#enter sib2, iclass 21, count 0 2006.230.01:08:43.85#ibcon#flushed, iclass 21, count 0 2006.230.01:08:43.85#ibcon#about to write, iclass 21, count 0 2006.230.01:08:43.85#ibcon#wrote, iclass 21, count 0 2006.230.01:08:43.85#ibcon#about to read 3, iclass 21, count 0 2006.230.01:08:43.87#ibcon#read 3, iclass 21, count 0 2006.230.01:08:43.87#ibcon#about to read 4, iclass 21, count 0 2006.230.01:08:43.87#ibcon#read 4, iclass 21, count 0 2006.230.01:08:43.87#ibcon#about to read 5, iclass 21, count 0 2006.230.01:08:43.87#ibcon#read 5, iclass 21, count 0 2006.230.01:08:43.87#ibcon#about to read 6, iclass 21, count 0 2006.230.01:08:43.87#ibcon#read 6, iclass 21, count 0 2006.230.01:08:43.87#ibcon#end of sib2, iclass 21, count 0 2006.230.01:08:43.87#ibcon#*mode == 0, iclass 21, count 0 2006.230.01:08:43.87#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.01:08:43.87#ibcon#[25=USB\r\n] 2006.230.01:08:43.87#ibcon#*before write, iclass 21, count 0 2006.230.01:08:43.87#ibcon#enter sib2, iclass 21, count 0 2006.230.01:08:43.87#ibcon#flushed, iclass 21, count 0 2006.230.01:08:43.87#ibcon#about to write, iclass 21, count 0 2006.230.01:08:43.87#ibcon#wrote, iclass 21, count 0 2006.230.01:08:43.87#ibcon#about to read 3, iclass 21, count 0 2006.230.01:08:43.90#ibcon#read 3, iclass 21, count 0 2006.230.01:08:43.90#ibcon#about to read 4, iclass 21, count 0 2006.230.01:08:43.90#ibcon#read 4, iclass 21, count 0 2006.230.01:08:43.90#ibcon#about to read 5, iclass 21, count 0 2006.230.01:08:43.90#ibcon#read 5, iclass 21, count 0 2006.230.01:08:43.90#ibcon#about to read 6, iclass 21, count 0 2006.230.01:08:43.90#ibcon#read 6, iclass 21, count 0 2006.230.01:08:43.90#ibcon#end of sib2, iclass 21, count 0 2006.230.01:08:43.90#ibcon#*after write, iclass 21, count 0 2006.230.01:08:43.90#ibcon#*before return 0, iclass 21, count 0 2006.230.01:08:43.90#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:08:43.90#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:08:43.90#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.01:08:43.90#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.01:08:43.90$vck44/vblo=1,629.99 2006.230.01:08:43.90#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.01:08:43.90#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.01:08:43.90#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:43.90#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:08:43.90#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:08:43.90#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:08:43.90#ibcon#enter wrdev, iclass 23, count 0 2006.230.01:08:43.90#ibcon#first serial, iclass 23, count 0 2006.230.01:08:43.90#ibcon#enter sib2, iclass 23, count 0 2006.230.01:08:43.90#ibcon#flushed, iclass 23, count 0 2006.230.01:08:43.90#ibcon#about to write, iclass 23, count 0 2006.230.01:08:43.90#ibcon#wrote, iclass 23, count 0 2006.230.01:08:43.90#ibcon#about to read 3, iclass 23, count 0 2006.230.01:08:43.92#ibcon#read 3, iclass 23, count 0 2006.230.01:08:43.92#ibcon#about to read 4, iclass 23, count 0 2006.230.01:08:43.92#ibcon#read 4, iclass 23, count 0 2006.230.01:08:43.92#ibcon#about to read 5, iclass 23, count 0 2006.230.01:08:43.92#ibcon#read 5, iclass 23, count 0 2006.230.01:08:43.92#ibcon#about to read 6, iclass 23, count 0 2006.230.01:08:43.92#ibcon#read 6, iclass 23, count 0 2006.230.01:08:43.92#ibcon#end of sib2, iclass 23, count 0 2006.230.01:08:43.92#ibcon#*mode == 0, iclass 23, count 0 2006.230.01:08:43.92#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.01:08:43.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:08:43.92#ibcon#*before write, iclass 23, count 0 2006.230.01:08:43.92#ibcon#enter sib2, iclass 23, count 0 2006.230.01:08:43.92#ibcon#flushed, iclass 23, count 0 2006.230.01:08:43.92#ibcon#about to write, iclass 23, count 0 2006.230.01:08:43.92#ibcon#wrote, iclass 23, count 0 2006.230.01:08:43.92#ibcon#about to read 3, iclass 23, count 0 2006.230.01:08:43.96#ibcon#read 3, iclass 23, count 0 2006.230.01:08:43.96#ibcon#about to read 4, iclass 23, count 0 2006.230.01:08:43.96#ibcon#read 4, iclass 23, count 0 2006.230.01:08:43.96#ibcon#about to read 5, iclass 23, count 0 2006.230.01:08:43.96#ibcon#read 5, iclass 23, count 0 2006.230.01:08:43.96#ibcon#about to read 6, iclass 23, count 0 2006.230.01:08:43.96#ibcon#read 6, iclass 23, count 0 2006.230.01:08:43.96#ibcon#end of sib2, iclass 23, count 0 2006.230.01:08:43.96#ibcon#*after write, iclass 23, count 0 2006.230.01:08:43.96#ibcon#*before return 0, iclass 23, count 0 2006.230.01:08:43.96#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:08:43.96#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:08:43.96#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.01:08:43.96#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.01:08:43.96$vck44/vb=1,4 2006.230.01:08:43.96#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.01:08:43.96#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.01:08:43.96#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:43.96#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:08:43.96#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:08:43.96#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:08:43.96#ibcon#enter wrdev, iclass 25, count 2 2006.230.01:08:43.96#ibcon#first serial, iclass 25, count 2 2006.230.01:08:43.96#ibcon#enter sib2, iclass 25, count 2 2006.230.01:08:43.96#ibcon#flushed, iclass 25, count 2 2006.230.01:08:43.96#ibcon#about to write, iclass 25, count 2 2006.230.01:08:43.96#ibcon#wrote, iclass 25, count 2 2006.230.01:08:43.96#ibcon#about to read 3, iclass 25, count 2 2006.230.01:08:43.98#ibcon#read 3, iclass 25, count 2 2006.230.01:08:43.98#ibcon#about to read 4, iclass 25, count 2 2006.230.01:08:43.98#ibcon#read 4, iclass 25, count 2 2006.230.01:08:43.98#ibcon#about to read 5, iclass 25, count 2 2006.230.01:08:43.98#ibcon#read 5, iclass 25, count 2 2006.230.01:08:43.98#ibcon#about to read 6, iclass 25, count 2 2006.230.01:08:43.98#ibcon#read 6, iclass 25, count 2 2006.230.01:08:43.98#ibcon#end of sib2, iclass 25, count 2 2006.230.01:08:43.98#ibcon#*mode == 0, iclass 25, count 2 2006.230.01:08:43.98#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.01:08:43.98#ibcon#[27=AT01-04\r\n] 2006.230.01:08:43.98#ibcon#*before write, iclass 25, count 2 2006.230.01:08:43.98#ibcon#enter sib2, iclass 25, count 2 2006.230.01:08:43.98#ibcon#flushed, iclass 25, count 2 2006.230.01:08:43.98#ibcon#about to write, iclass 25, count 2 2006.230.01:08:43.98#ibcon#wrote, iclass 25, count 2 2006.230.01:08:43.98#ibcon#about to read 3, iclass 25, count 2 2006.230.01:08:44.01#ibcon#read 3, iclass 25, count 2 2006.230.01:08:44.01#ibcon#about to read 4, iclass 25, count 2 2006.230.01:08:44.01#ibcon#read 4, iclass 25, count 2 2006.230.01:08:44.01#ibcon#about to read 5, iclass 25, count 2 2006.230.01:08:44.01#ibcon#read 5, iclass 25, count 2 2006.230.01:08:44.01#ibcon#about to read 6, iclass 25, count 2 2006.230.01:08:44.01#ibcon#read 6, iclass 25, count 2 2006.230.01:08:44.01#ibcon#end of sib2, iclass 25, count 2 2006.230.01:08:44.01#ibcon#*after write, iclass 25, count 2 2006.230.01:08:44.01#ibcon#*before return 0, iclass 25, count 2 2006.230.01:08:44.01#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:08:44.01#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:08:44.01#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.01:08:44.01#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:44.01#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:08:44.13#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:08:44.13#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:08:44.13#ibcon#enter wrdev, iclass 25, count 0 2006.230.01:08:44.13#ibcon#first serial, iclass 25, count 0 2006.230.01:08:44.13#ibcon#enter sib2, iclass 25, count 0 2006.230.01:08:44.13#ibcon#flushed, iclass 25, count 0 2006.230.01:08:44.13#ibcon#about to write, iclass 25, count 0 2006.230.01:08:44.13#ibcon#wrote, iclass 25, count 0 2006.230.01:08:44.13#ibcon#about to read 3, iclass 25, count 0 2006.230.01:08:44.15#ibcon#read 3, iclass 25, count 0 2006.230.01:08:44.15#ibcon#about to read 4, iclass 25, count 0 2006.230.01:08:44.15#ibcon#read 4, iclass 25, count 0 2006.230.01:08:44.15#ibcon#about to read 5, iclass 25, count 0 2006.230.01:08:44.15#ibcon#read 5, iclass 25, count 0 2006.230.01:08:44.15#ibcon#about to read 6, iclass 25, count 0 2006.230.01:08:44.15#ibcon#read 6, iclass 25, count 0 2006.230.01:08:44.15#ibcon#end of sib2, iclass 25, count 0 2006.230.01:08:44.15#ibcon#*mode == 0, iclass 25, count 0 2006.230.01:08:44.15#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.01:08:44.15#ibcon#[27=USB\r\n] 2006.230.01:08:44.15#ibcon#*before write, iclass 25, count 0 2006.230.01:08:44.15#ibcon#enter sib2, iclass 25, count 0 2006.230.01:08:44.15#ibcon#flushed, iclass 25, count 0 2006.230.01:08:44.15#ibcon#about to write, iclass 25, count 0 2006.230.01:08:44.15#ibcon#wrote, iclass 25, count 0 2006.230.01:08:44.15#ibcon#about to read 3, iclass 25, count 0 2006.230.01:08:44.18#ibcon#read 3, iclass 25, count 0 2006.230.01:08:44.18#ibcon#about to read 4, iclass 25, count 0 2006.230.01:08:44.18#ibcon#read 4, iclass 25, count 0 2006.230.01:08:44.18#ibcon#about to read 5, iclass 25, count 0 2006.230.01:08:44.18#ibcon#read 5, iclass 25, count 0 2006.230.01:08:44.18#ibcon#about to read 6, iclass 25, count 0 2006.230.01:08:44.18#ibcon#read 6, iclass 25, count 0 2006.230.01:08:44.18#ibcon#end of sib2, iclass 25, count 0 2006.230.01:08:44.18#ibcon#*after write, iclass 25, count 0 2006.230.01:08:44.18#ibcon#*before return 0, iclass 25, count 0 2006.230.01:08:44.18#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:08:44.18#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:08:44.18#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.01:08:44.18#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.01:08:44.18$vck44/vblo=2,634.99 2006.230.01:08:44.18#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.01:08:44.18#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.01:08:44.18#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:44.18#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:44.18#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:44.18#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:44.18#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:08:44.18#ibcon#first serial, iclass 27, count 0 2006.230.01:08:44.18#ibcon#enter sib2, iclass 27, count 0 2006.230.01:08:44.18#ibcon#flushed, iclass 27, count 0 2006.230.01:08:44.18#ibcon#about to write, iclass 27, count 0 2006.230.01:08:44.18#ibcon#wrote, iclass 27, count 0 2006.230.01:08:44.18#ibcon#about to read 3, iclass 27, count 0 2006.230.01:08:44.20#ibcon#read 3, iclass 27, count 0 2006.230.01:08:44.20#ibcon#about to read 4, iclass 27, count 0 2006.230.01:08:44.20#ibcon#read 4, iclass 27, count 0 2006.230.01:08:44.20#ibcon#about to read 5, iclass 27, count 0 2006.230.01:08:44.20#ibcon#read 5, iclass 27, count 0 2006.230.01:08:44.20#ibcon#about to read 6, iclass 27, count 0 2006.230.01:08:44.20#ibcon#read 6, iclass 27, count 0 2006.230.01:08:44.20#ibcon#end of sib2, iclass 27, count 0 2006.230.01:08:44.20#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:08:44.20#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:08:44.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:08:44.20#ibcon#*before write, iclass 27, count 0 2006.230.01:08:44.20#ibcon#enter sib2, iclass 27, count 0 2006.230.01:08:44.20#ibcon#flushed, iclass 27, count 0 2006.230.01:08:44.20#ibcon#about to write, iclass 27, count 0 2006.230.01:08:44.20#ibcon#wrote, iclass 27, count 0 2006.230.01:08:44.20#ibcon#about to read 3, iclass 27, count 0 2006.230.01:08:44.24#ibcon#read 3, iclass 27, count 0 2006.230.01:08:44.24#ibcon#about to read 4, iclass 27, count 0 2006.230.01:08:44.24#ibcon#read 4, iclass 27, count 0 2006.230.01:08:44.24#ibcon#about to read 5, iclass 27, count 0 2006.230.01:08:44.24#ibcon#read 5, iclass 27, count 0 2006.230.01:08:44.24#ibcon#about to read 6, iclass 27, count 0 2006.230.01:08:44.24#ibcon#read 6, iclass 27, count 0 2006.230.01:08:44.24#ibcon#end of sib2, iclass 27, count 0 2006.230.01:08:44.24#ibcon#*after write, iclass 27, count 0 2006.230.01:08:44.24#ibcon#*before return 0, iclass 27, count 0 2006.230.01:08:44.24#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:44.24#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:08:44.24#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:08:44.24#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:08:44.24$vck44/vb=2,4 2006.230.01:08:44.24#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.01:08:44.24#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.01:08:44.24#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:44.24#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:44.30#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:44.30#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:44.30#ibcon#enter wrdev, iclass 29, count 2 2006.230.01:08:44.30#ibcon#first serial, iclass 29, count 2 2006.230.01:08:44.30#ibcon#enter sib2, iclass 29, count 2 2006.230.01:08:44.30#ibcon#flushed, iclass 29, count 2 2006.230.01:08:44.30#ibcon#about to write, iclass 29, count 2 2006.230.01:08:44.30#ibcon#wrote, iclass 29, count 2 2006.230.01:08:44.30#ibcon#about to read 3, iclass 29, count 2 2006.230.01:08:44.32#ibcon#read 3, iclass 29, count 2 2006.230.01:08:44.32#ibcon#about to read 4, iclass 29, count 2 2006.230.01:08:44.32#ibcon#read 4, iclass 29, count 2 2006.230.01:08:44.32#ibcon#about to read 5, iclass 29, count 2 2006.230.01:08:44.32#ibcon#read 5, iclass 29, count 2 2006.230.01:08:44.32#ibcon#about to read 6, iclass 29, count 2 2006.230.01:08:44.32#ibcon#read 6, iclass 29, count 2 2006.230.01:08:44.32#ibcon#end of sib2, iclass 29, count 2 2006.230.01:08:44.32#ibcon#*mode == 0, iclass 29, count 2 2006.230.01:08:44.32#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.01:08:44.32#ibcon#[27=AT02-04\r\n] 2006.230.01:08:44.32#ibcon#*before write, iclass 29, count 2 2006.230.01:08:44.32#ibcon#enter sib2, iclass 29, count 2 2006.230.01:08:44.32#ibcon#flushed, iclass 29, count 2 2006.230.01:08:44.32#ibcon#about to write, iclass 29, count 2 2006.230.01:08:44.32#ibcon#wrote, iclass 29, count 2 2006.230.01:08:44.32#ibcon#about to read 3, iclass 29, count 2 2006.230.01:08:44.35#ibcon#read 3, iclass 29, count 2 2006.230.01:08:44.35#ibcon#about to read 4, iclass 29, count 2 2006.230.01:08:44.35#ibcon#read 4, iclass 29, count 2 2006.230.01:08:44.35#ibcon#about to read 5, iclass 29, count 2 2006.230.01:08:44.35#ibcon#read 5, iclass 29, count 2 2006.230.01:08:44.35#ibcon#about to read 6, iclass 29, count 2 2006.230.01:08:44.35#ibcon#read 6, iclass 29, count 2 2006.230.01:08:44.35#ibcon#end of sib2, iclass 29, count 2 2006.230.01:08:44.35#ibcon#*after write, iclass 29, count 2 2006.230.01:08:44.35#ibcon#*before return 0, iclass 29, count 2 2006.230.01:08:44.36#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:44.36#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:08:44.36#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.01:08:44.36#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:44.36#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:44.47#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:44.47#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:44.47#ibcon#enter wrdev, iclass 29, count 0 2006.230.01:08:44.47#ibcon#first serial, iclass 29, count 0 2006.230.01:08:44.47#ibcon#enter sib2, iclass 29, count 0 2006.230.01:08:44.47#ibcon#flushed, iclass 29, count 0 2006.230.01:08:44.47#ibcon#about to write, iclass 29, count 0 2006.230.01:08:44.47#ibcon#wrote, iclass 29, count 0 2006.230.01:08:44.47#ibcon#about to read 3, iclass 29, count 0 2006.230.01:08:44.49#ibcon#read 3, iclass 29, count 0 2006.230.01:08:44.49#ibcon#about to read 4, iclass 29, count 0 2006.230.01:08:44.49#ibcon#read 4, iclass 29, count 0 2006.230.01:08:44.49#ibcon#about to read 5, iclass 29, count 0 2006.230.01:08:44.49#ibcon#read 5, iclass 29, count 0 2006.230.01:08:44.49#ibcon#about to read 6, iclass 29, count 0 2006.230.01:08:44.49#ibcon#read 6, iclass 29, count 0 2006.230.01:08:44.49#ibcon#end of sib2, iclass 29, count 0 2006.230.01:08:44.49#ibcon#*mode == 0, iclass 29, count 0 2006.230.01:08:44.49#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.01:08:44.49#ibcon#[27=USB\r\n] 2006.230.01:08:44.49#ibcon#*before write, iclass 29, count 0 2006.230.01:08:44.49#ibcon#enter sib2, iclass 29, count 0 2006.230.01:08:44.49#ibcon#flushed, iclass 29, count 0 2006.230.01:08:44.49#ibcon#about to write, iclass 29, count 0 2006.230.01:08:44.49#ibcon#wrote, iclass 29, count 0 2006.230.01:08:44.49#ibcon#about to read 3, iclass 29, count 0 2006.230.01:08:44.52#ibcon#read 3, iclass 29, count 0 2006.230.01:08:44.52#ibcon#about to read 4, iclass 29, count 0 2006.230.01:08:44.52#ibcon#read 4, iclass 29, count 0 2006.230.01:08:44.52#ibcon#about to read 5, iclass 29, count 0 2006.230.01:08:44.52#ibcon#read 5, iclass 29, count 0 2006.230.01:08:44.52#ibcon#about to read 6, iclass 29, count 0 2006.230.01:08:44.52#ibcon#read 6, iclass 29, count 0 2006.230.01:08:44.52#ibcon#end of sib2, iclass 29, count 0 2006.230.01:08:44.52#ibcon#*after write, iclass 29, count 0 2006.230.01:08:44.52#ibcon#*before return 0, iclass 29, count 0 2006.230.01:08:44.52#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:44.52#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:08:44.52#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.01:08:44.52#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.01:08:44.52$vck44/vblo=3,649.99 2006.230.01:08:44.52#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.01:08:44.52#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.01:08:44.52#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:44.52#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:44.52#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:44.52#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:44.52#ibcon#enter wrdev, iclass 31, count 0 2006.230.01:08:44.52#ibcon#first serial, iclass 31, count 0 2006.230.01:08:44.52#ibcon#enter sib2, iclass 31, count 0 2006.230.01:08:44.52#ibcon#flushed, iclass 31, count 0 2006.230.01:08:44.52#ibcon#about to write, iclass 31, count 0 2006.230.01:08:44.52#ibcon#wrote, iclass 31, count 0 2006.230.01:08:44.52#ibcon#about to read 3, iclass 31, count 0 2006.230.01:08:44.54#ibcon#read 3, iclass 31, count 0 2006.230.01:08:44.54#ibcon#about to read 4, iclass 31, count 0 2006.230.01:08:44.54#ibcon#read 4, iclass 31, count 0 2006.230.01:08:44.54#ibcon#about to read 5, iclass 31, count 0 2006.230.01:08:44.54#ibcon#read 5, iclass 31, count 0 2006.230.01:08:44.54#ibcon#about to read 6, iclass 31, count 0 2006.230.01:08:44.54#ibcon#read 6, iclass 31, count 0 2006.230.01:08:44.54#ibcon#end of sib2, iclass 31, count 0 2006.230.01:08:44.54#ibcon#*mode == 0, iclass 31, count 0 2006.230.01:08:44.54#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.01:08:44.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:08:44.54#ibcon#*before write, iclass 31, count 0 2006.230.01:08:44.54#ibcon#enter sib2, iclass 31, count 0 2006.230.01:08:44.54#ibcon#flushed, iclass 31, count 0 2006.230.01:08:44.54#ibcon#about to write, iclass 31, count 0 2006.230.01:08:44.54#ibcon#wrote, iclass 31, count 0 2006.230.01:08:44.54#ibcon#about to read 3, iclass 31, count 0 2006.230.01:08:44.58#ibcon#read 3, iclass 31, count 0 2006.230.01:08:44.58#ibcon#about to read 4, iclass 31, count 0 2006.230.01:08:44.58#ibcon#read 4, iclass 31, count 0 2006.230.01:08:44.58#ibcon#about to read 5, iclass 31, count 0 2006.230.01:08:44.58#ibcon#read 5, iclass 31, count 0 2006.230.01:08:44.58#ibcon#about to read 6, iclass 31, count 0 2006.230.01:08:44.58#ibcon#read 6, iclass 31, count 0 2006.230.01:08:44.58#ibcon#end of sib2, iclass 31, count 0 2006.230.01:08:44.58#ibcon#*after write, iclass 31, count 0 2006.230.01:08:44.58#ibcon#*before return 0, iclass 31, count 0 2006.230.01:08:44.58#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:44.58#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:08:44.58#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.01:08:44.58#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.01:08:44.58$vck44/vb=3,4 2006.230.01:08:44.58#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.01:08:44.58#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.01:08:44.58#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:44.58#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:44.64#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:44.64#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:44.64#ibcon#enter wrdev, iclass 33, count 2 2006.230.01:08:44.64#ibcon#first serial, iclass 33, count 2 2006.230.01:08:44.64#ibcon#enter sib2, iclass 33, count 2 2006.230.01:08:44.64#ibcon#flushed, iclass 33, count 2 2006.230.01:08:44.64#ibcon#about to write, iclass 33, count 2 2006.230.01:08:44.64#ibcon#wrote, iclass 33, count 2 2006.230.01:08:44.64#ibcon#about to read 3, iclass 33, count 2 2006.230.01:08:44.66#ibcon#read 3, iclass 33, count 2 2006.230.01:08:44.66#ibcon#about to read 4, iclass 33, count 2 2006.230.01:08:44.66#ibcon#read 4, iclass 33, count 2 2006.230.01:08:44.66#ibcon#about to read 5, iclass 33, count 2 2006.230.01:08:44.66#ibcon#read 5, iclass 33, count 2 2006.230.01:08:44.66#ibcon#about to read 6, iclass 33, count 2 2006.230.01:08:44.66#ibcon#read 6, iclass 33, count 2 2006.230.01:08:44.66#ibcon#end of sib2, iclass 33, count 2 2006.230.01:08:44.66#ibcon#*mode == 0, iclass 33, count 2 2006.230.01:08:44.66#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.01:08:44.66#ibcon#[27=AT03-04\r\n] 2006.230.01:08:44.66#ibcon#*before write, iclass 33, count 2 2006.230.01:08:44.66#ibcon#enter sib2, iclass 33, count 2 2006.230.01:08:44.66#ibcon#flushed, iclass 33, count 2 2006.230.01:08:44.66#ibcon#about to write, iclass 33, count 2 2006.230.01:08:44.66#ibcon#wrote, iclass 33, count 2 2006.230.01:08:44.66#ibcon#about to read 3, iclass 33, count 2 2006.230.01:08:44.69#ibcon#read 3, iclass 33, count 2 2006.230.01:08:44.69#ibcon#about to read 4, iclass 33, count 2 2006.230.01:08:44.69#ibcon#read 4, iclass 33, count 2 2006.230.01:08:44.69#ibcon#about to read 5, iclass 33, count 2 2006.230.01:08:44.69#ibcon#read 5, iclass 33, count 2 2006.230.01:08:44.69#ibcon#about to read 6, iclass 33, count 2 2006.230.01:08:44.69#ibcon#read 6, iclass 33, count 2 2006.230.01:08:44.69#ibcon#end of sib2, iclass 33, count 2 2006.230.01:08:44.69#ibcon#*after write, iclass 33, count 2 2006.230.01:08:44.69#ibcon#*before return 0, iclass 33, count 2 2006.230.01:08:44.69#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:44.69#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:08:44.69#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.01:08:44.69#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:44.69#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:44.81#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:44.81#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:44.81#ibcon#enter wrdev, iclass 33, count 0 2006.230.01:08:44.81#ibcon#first serial, iclass 33, count 0 2006.230.01:08:44.81#ibcon#enter sib2, iclass 33, count 0 2006.230.01:08:44.81#ibcon#flushed, iclass 33, count 0 2006.230.01:08:44.81#ibcon#about to write, iclass 33, count 0 2006.230.01:08:44.81#ibcon#wrote, iclass 33, count 0 2006.230.01:08:44.81#ibcon#about to read 3, iclass 33, count 0 2006.230.01:08:44.83#ibcon#read 3, iclass 33, count 0 2006.230.01:08:44.83#ibcon#about to read 4, iclass 33, count 0 2006.230.01:08:44.83#ibcon#read 4, iclass 33, count 0 2006.230.01:08:44.83#ibcon#about to read 5, iclass 33, count 0 2006.230.01:08:44.83#ibcon#read 5, iclass 33, count 0 2006.230.01:08:44.83#ibcon#about to read 6, iclass 33, count 0 2006.230.01:08:44.83#ibcon#read 6, iclass 33, count 0 2006.230.01:08:44.83#ibcon#end of sib2, iclass 33, count 0 2006.230.01:08:44.83#ibcon#*mode == 0, iclass 33, count 0 2006.230.01:08:44.83#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.01:08:44.83#ibcon#[27=USB\r\n] 2006.230.01:08:44.83#ibcon#*before write, iclass 33, count 0 2006.230.01:08:44.83#ibcon#enter sib2, iclass 33, count 0 2006.230.01:08:44.83#ibcon#flushed, iclass 33, count 0 2006.230.01:08:44.83#ibcon#about to write, iclass 33, count 0 2006.230.01:08:44.83#ibcon#wrote, iclass 33, count 0 2006.230.01:08:44.83#ibcon#about to read 3, iclass 33, count 0 2006.230.01:08:44.86#ibcon#read 3, iclass 33, count 0 2006.230.01:08:44.86#ibcon#about to read 4, iclass 33, count 0 2006.230.01:08:44.86#ibcon#read 4, iclass 33, count 0 2006.230.01:08:44.86#ibcon#about to read 5, iclass 33, count 0 2006.230.01:08:44.86#ibcon#read 5, iclass 33, count 0 2006.230.01:08:44.86#ibcon#about to read 6, iclass 33, count 0 2006.230.01:08:44.86#ibcon#read 6, iclass 33, count 0 2006.230.01:08:44.86#ibcon#end of sib2, iclass 33, count 0 2006.230.01:08:44.86#ibcon#*after write, iclass 33, count 0 2006.230.01:08:44.86#ibcon#*before return 0, iclass 33, count 0 2006.230.01:08:44.86#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:44.86#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:08:44.86#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.01:08:44.86#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.01:08:44.86$vck44/vblo=4,679.99 2006.230.01:08:44.86#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.01:08:44.86#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.01:08:44.86#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:44.86#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:44.86#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:44.86#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:44.86#ibcon#enter wrdev, iclass 35, count 0 2006.230.01:08:44.86#ibcon#first serial, iclass 35, count 0 2006.230.01:08:44.86#ibcon#enter sib2, iclass 35, count 0 2006.230.01:08:44.86#ibcon#flushed, iclass 35, count 0 2006.230.01:08:44.86#ibcon#about to write, iclass 35, count 0 2006.230.01:08:44.86#ibcon#wrote, iclass 35, count 0 2006.230.01:08:44.86#ibcon#about to read 3, iclass 35, count 0 2006.230.01:08:44.88#ibcon#read 3, iclass 35, count 0 2006.230.01:08:44.88#ibcon#about to read 4, iclass 35, count 0 2006.230.01:08:44.88#ibcon#read 4, iclass 35, count 0 2006.230.01:08:44.88#ibcon#about to read 5, iclass 35, count 0 2006.230.01:08:44.88#ibcon#read 5, iclass 35, count 0 2006.230.01:08:44.88#ibcon#about to read 6, iclass 35, count 0 2006.230.01:08:44.88#ibcon#read 6, iclass 35, count 0 2006.230.01:08:44.88#ibcon#end of sib2, iclass 35, count 0 2006.230.01:08:44.88#ibcon#*mode == 0, iclass 35, count 0 2006.230.01:08:44.88#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.01:08:44.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:08:44.88#ibcon#*before write, iclass 35, count 0 2006.230.01:08:44.88#ibcon#enter sib2, iclass 35, count 0 2006.230.01:08:44.88#ibcon#flushed, iclass 35, count 0 2006.230.01:08:44.88#ibcon#about to write, iclass 35, count 0 2006.230.01:08:44.88#ibcon#wrote, iclass 35, count 0 2006.230.01:08:44.88#ibcon#about to read 3, iclass 35, count 0 2006.230.01:08:44.92#ibcon#read 3, iclass 35, count 0 2006.230.01:08:44.92#ibcon#about to read 4, iclass 35, count 0 2006.230.01:08:44.92#ibcon#read 4, iclass 35, count 0 2006.230.01:08:44.92#ibcon#about to read 5, iclass 35, count 0 2006.230.01:08:44.92#ibcon#read 5, iclass 35, count 0 2006.230.01:08:44.92#ibcon#about to read 6, iclass 35, count 0 2006.230.01:08:44.92#ibcon#read 6, iclass 35, count 0 2006.230.01:08:44.92#ibcon#end of sib2, iclass 35, count 0 2006.230.01:08:44.92#ibcon#*after write, iclass 35, count 0 2006.230.01:08:44.92#ibcon#*before return 0, iclass 35, count 0 2006.230.01:08:44.92#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:44.92#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:08:44.92#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.01:08:44.92#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.01:08:44.92$vck44/vb=4,4 2006.230.01:08:44.92#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.01:08:44.92#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.01:08:44.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:44.92#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:44.98#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:44.98#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:44.98#ibcon#enter wrdev, iclass 37, count 2 2006.230.01:08:44.98#ibcon#first serial, iclass 37, count 2 2006.230.01:08:44.98#ibcon#enter sib2, iclass 37, count 2 2006.230.01:08:44.98#ibcon#flushed, iclass 37, count 2 2006.230.01:08:44.98#ibcon#about to write, iclass 37, count 2 2006.230.01:08:44.98#ibcon#wrote, iclass 37, count 2 2006.230.01:08:44.98#ibcon#about to read 3, iclass 37, count 2 2006.230.01:08:45.00#ibcon#read 3, iclass 37, count 2 2006.230.01:08:45.00#ibcon#about to read 4, iclass 37, count 2 2006.230.01:08:45.00#ibcon#read 4, iclass 37, count 2 2006.230.01:08:45.00#ibcon#about to read 5, iclass 37, count 2 2006.230.01:08:45.00#ibcon#read 5, iclass 37, count 2 2006.230.01:08:45.00#ibcon#about to read 6, iclass 37, count 2 2006.230.01:08:45.00#ibcon#read 6, iclass 37, count 2 2006.230.01:08:45.00#ibcon#end of sib2, iclass 37, count 2 2006.230.01:08:45.00#ibcon#*mode == 0, iclass 37, count 2 2006.230.01:08:45.00#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.01:08:45.00#ibcon#[27=AT04-04\r\n] 2006.230.01:08:45.00#ibcon#*before write, iclass 37, count 2 2006.230.01:08:45.00#ibcon#enter sib2, iclass 37, count 2 2006.230.01:08:45.00#ibcon#flushed, iclass 37, count 2 2006.230.01:08:45.00#ibcon#about to write, iclass 37, count 2 2006.230.01:08:45.00#ibcon#wrote, iclass 37, count 2 2006.230.01:08:45.00#ibcon#about to read 3, iclass 37, count 2 2006.230.01:08:45.03#ibcon#read 3, iclass 37, count 2 2006.230.01:08:45.03#ibcon#about to read 4, iclass 37, count 2 2006.230.01:08:45.03#ibcon#read 4, iclass 37, count 2 2006.230.01:08:45.03#ibcon#about to read 5, iclass 37, count 2 2006.230.01:08:45.03#ibcon#read 5, iclass 37, count 2 2006.230.01:08:45.03#ibcon#about to read 6, iclass 37, count 2 2006.230.01:08:45.03#ibcon#read 6, iclass 37, count 2 2006.230.01:08:45.03#ibcon#end of sib2, iclass 37, count 2 2006.230.01:08:45.03#ibcon#*after write, iclass 37, count 2 2006.230.01:08:45.03#ibcon#*before return 0, iclass 37, count 2 2006.230.01:08:45.03#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:45.03#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:08:45.03#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.01:08:45.03#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:45.03#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:45.15#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:45.15#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:45.15#ibcon#enter wrdev, iclass 37, count 0 2006.230.01:08:45.15#ibcon#first serial, iclass 37, count 0 2006.230.01:08:45.15#ibcon#enter sib2, iclass 37, count 0 2006.230.01:08:45.15#ibcon#flushed, iclass 37, count 0 2006.230.01:08:45.15#ibcon#about to write, iclass 37, count 0 2006.230.01:08:45.15#ibcon#wrote, iclass 37, count 0 2006.230.01:08:45.15#ibcon#about to read 3, iclass 37, count 0 2006.230.01:08:45.17#ibcon#read 3, iclass 37, count 0 2006.230.01:08:45.17#ibcon#about to read 4, iclass 37, count 0 2006.230.01:08:45.17#ibcon#read 4, iclass 37, count 0 2006.230.01:08:45.17#ibcon#about to read 5, iclass 37, count 0 2006.230.01:08:45.17#ibcon#read 5, iclass 37, count 0 2006.230.01:08:45.17#ibcon#about to read 6, iclass 37, count 0 2006.230.01:08:45.17#ibcon#read 6, iclass 37, count 0 2006.230.01:08:45.17#ibcon#end of sib2, iclass 37, count 0 2006.230.01:08:45.17#ibcon#*mode == 0, iclass 37, count 0 2006.230.01:08:45.17#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.01:08:45.17#ibcon#[27=USB\r\n] 2006.230.01:08:45.17#ibcon#*before write, iclass 37, count 0 2006.230.01:08:45.17#ibcon#enter sib2, iclass 37, count 0 2006.230.01:08:45.17#ibcon#flushed, iclass 37, count 0 2006.230.01:08:45.17#ibcon#about to write, iclass 37, count 0 2006.230.01:08:45.17#ibcon#wrote, iclass 37, count 0 2006.230.01:08:45.17#ibcon#about to read 3, iclass 37, count 0 2006.230.01:08:45.20#ibcon#read 3, iclass 37, count 0 2006.230.01:08:45.20#ibcon#about to read 4, iclass 37, count 0 2006.230.01:08:45.20#ibcon#read 4, iclass 37, count 0 2006.230.01:08:45.20#ibcon#about to read 5, iclass 37, count 0 2006.230.01:08:45.20#ibcon#read 5, iclass 37, count 0 2006.230.01:08:45.20#ibcon#about to read 6, iclass 37, count 0 2006.230.01:08:45.20#ibcon#read 6, iclass 37, count 0 2006.230.01:08:45.20#ibcon#end of sib2, iclass 37, count 0 2006.230.01:08:45.20#ibcon#*after write, iclass 37, count 0 2006.230.01:08:45.20#ibcon#*before return 0, iclass 37, count 0 2006.230.01:08:45.20#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:45.20#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:08:45.20#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.01:08:45.20#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.01:08:45.20$vck44/vblo=5,709.99 2006.230.01:08:45.20#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.01:08:45.20#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.01:08:45.20#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:45.20#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:45.20#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:45.20#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:45.20#ibcon#enter wrdev, iclass 39, count 0 2006.230.01:08:45.20#ibcon#first serial, iclass 39, count 0 2006.230.01:08:45.20#ibcon#enter sib2, iclass 39, count 0 2006.230.01:08:45.20#ibcon#flushed, iclass 39, count 0 2006.230.01:08:45.20#ibcon#about to write, iclass 39, count 0 2006.230.01:08:45.20#ibcon#wrote, iclass 39, count 0 2006.230.01:08:45.20#ibcon#about to read 3, iclass 39, count 0 2006.230.01:08:45.22#ibcon#read 3, iclass 39, count 0 2006.230.01:08:45.22#ibcon#about to read 4, iclass 39, count 0 2006.230.01:08:45.22#ibcon#read 4, iclass 39, count 0 2006.230.01:08:45.22#ibcon#about to read 5, iclass 39, count 0 2006.230.01:08:45.22#ibcon#read 5, iclass 39, count 0 2006.230.01:08:45.22#ibcon#about to read 6, iclass 39, count 0 2006.230.01:08:45.22#ibcon#read 6, iclass 39, count 0 2006.230.01:08:45.22#ibcon#end of sib2, iclass 39, count 0 2006.230.01:08:45.22#ibcon#*mode == 0, iclass 39, count 0 2006.230.01:08:45.22#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.01:08:45.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:08:45.22#ibcon#*before write, iclass 39, count 0 2006.230.01:08:45.22#ibcon#enter sib2, iclass 39, count 0 2006.230.01:08:45.22#ibcon#flushed, iclass 39, count 0 2006.230.01:08:45.22#ibcon#about to write, iclass 39, count 0 2006.230.01:08:45.22#ibcon#wrote, iclass 39, count 0 2006.230.01:08:45.22#ibcon#about to read 3, iclass 39, count 0 2006.230.01:08:45.26#ibcon#read 3, iclass 39, count 0 2006.230.01:08:45.26#ibcon#about to read 4, iclass 39, count 0 2006.230.01:08:45.26#ibcon#read 4, iclass 39, count 0 2006.230.01:08:45.26#ibcon#about to read 5, iclass 39, count 0 2006.230.01:08:45.26#ibcon#read 5, iclass 39, count 0 2006.230.01:08:45.26#ibcon#about to read 6, iclass 39, count 0 2006.230.01:08:45.26#ibcon#read 6, iclass 39, count 0 2006.230.01:08:45.26#ibcon#end of sib2, iclass 39, count 0 2006.230.01:08:45.26#ibcon#*after write, iclass 39, count 0 2006.230.01:08:45.26#ibcon#*before return 0, iclass 39, count 0 2006.230.01:08:45.26#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:45.26#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:08:45.26#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.01:08:45.26#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.01:08:45.26$vck44/vb=5,4 2006.230.01:08:45.26#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.01:08:45.26#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.01:08:45.26#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:45.26#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:45.32#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:45.32#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:45.32#ibcon#enter wrdev, iclass 3, count 2 2006.230.01:08:45.32#ibcon#first serial, iclass 3, count 2 2006.230.01:08:45.32#ibcon#enter sib2, iclass 3, count 2 2006.230.01:08:45.32#ibcon#flushed, iclass 3, count 2 2006.230.01:08:45.32#ibcon#about to write, iclass 3, count 2 2006.230.01:08:45.32#ibcon#wrote, iclass 3, count 2 2006.230.01:08:45.32#ibcon#about to read 3, iclass 3, count 2 2006.230.01:08:45.34#ibcon#read 3, iclass 3, count 2 2006.230.01:08:45.34#ibcon#about to read 4, iclass 3, count 2 2006.230.01:08:45.34#ibcon#read 4, iclass 3, count 2 2006.230.01:08:45.34#ibcon#about to read 5, iclass 3, count 2 2006.230.01:08:45.34#ibcon#read 5, iclass 3, count 2 2006.230.01:08:45.34#ibcon#about to read 6, iclass 3, count 2 2006.230.01:08:45.34#ibcon#read 6, iclass 3, count 2 2006.230.01:08:45.34#ibcon#end of sib2, iclass 3, count 2 2006.230.01:08:45.34#ibcon#*mode == 0, iclass 3, count 2 2006.230.01:08:45.34#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.01:08:45.34#ibcon#[27=AT05-04\r\n] 2006.230.01:08:45.34#ibcon#*before write, iclass 3, count 2 2006.230.01:08:45.34#ibcon#enter sib2, iclass 3, count 2 2006.230.01:08:45.34#ibcon#flushed, iclass 3, count 2 2006.230.01:08:45.34#ibcon#about to write, iclass 3, count 2 2006.230.01:08:45.34#ibcon#wrote, iclass 3, count 2 2006.230.01:08:45.34#ibcon#about to read 3, iclass 3, count 2 2006.230.01:08:45.37#ibcon#read 3, iclass 3, count 2 2006.230.01:08:45.37#ibcon#about to read 4, iclass 3, count 2 2006.230.01:08:45.37#ibcon#read 4, iclass 3, count 2 2006.230.01:08:45.37#ibcon#about to read 5, iclass 3, count 2 2006.230.01:08:45.37#ibcon#read 5, iclass 3, count 2 2006.230.01:08:45.37#ibcon#about to read 6, iclass 3, count 2 2006.230.01:08:45.37#ibcon#read 6, iclass 3, count 2 2006.230.01:08:45.37#ibcon#end of sib2, iclass 3, count 2 2006.230.01:08:45.37#ibcon#*after write, iclass 3, count 2 2006.230.01:08:45.37#ibcon#*before return 0, iclass 3, count 2 2006.230.01:08:45.37#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:45.37#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:08:45.37#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.01:08:45.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:45.37#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:45.49#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:45.49#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:45.49#ibcon#enter wrdev, iclass 3, count 0 2006.230.01:08:45.49#ibcon#first serial, iclass 3, count 0 2006.230.01:08:45.49#ibcon#enter sib2, iclass 3, count 0 2006.230.01:08:45.49#ibcon#flushed, iclass 3, count 0 2006.230.01:08:45.49#ibcon#about to write, iclass 3, count 0 2006.230.01:08:45.49#ibcon#wrote, iclass 3, count 0 2006.230.01:08:45.49#ibcon#about to read 3, iclass 3, count 0 2006.230.01:08:45.51#ibcon#read 3, iclass 3, count 0 2006.230.01:08:45.51#ibcon#about to read 4, iclass 3, count 0 2006.230.01:08:45.51#ibcon#read 4, iclass 3, count 0 2006.230.01:08:45.51#ibcon#about to read 5, iclass 3, count 0 2006.230.01:08:45.51#ibcon#read 5, iclass 3, count 0 2006.230.01:08:45.51#ibcon#about to read 6, iclass 3, count 0 2006.230.01:08:45.51#ibcon#read 6, iclass 3, count 0 2006.230.01:08:45.51#ibcon#end of sib2, iclass 3, count 0 2006.230.01:08:45.51#ibcon#*mode == 0, iclass 3, count 0 2006.230.01:08:45.51#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.01:08:45.51#ibcon#[27=USB\r\n] 2006.230.01:08:45.51#ibcon#*before write, iclass 3, count 0 2006.230.01:08:45.51#ibcon#enter sib2, iclass 3, count 0 2006.230.01:08:45.51#ibcon#flushed, iclass 3, count 0 2006.230.01:08:45.51#ibcon#about to write, iclass 3, count 0 2006.230.01:08:45.51#ibcon#wrote, iclass 3, count 0 2006.230.01:08:45.51#ibcon#about to read 3, iclass 3, count 0 2006.230.01:08:45.54#ibcon#read 3, iclass 3, count 0 2006.230.01:08:45.54#ibcon#about to read 4, iclass 3, count 0 2006.230.01:08:45.54#ibcon#read 4, iclass 3, count 0 2006.230.01:08:45.54#ibcon#about to read 5, iclass 3, count 0 2006.230.01:08:45.54#ibcon#read 5, iclass 3, count 0 2006.230.01:08:45.54#ibcon#about to read 6, iclass 3, count 0 2006.230.01:08:45.54#ibcon#read 6, iclass 3, count 0 2006.230.01:08:45.54#ibcon#end of sib2, iclass 3, count 0 2006.230.01:08:45.54#ibcon#*after write, iclass 3, count 0 2006.230.01:08:45.54#ibcon#*before return 0, iclass 3, count 0 2006.230.01:08:45.54#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:45.54#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:08:45.54#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.01:08:45.54#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.01:08:45.54$vck44/vblo=6,719.99 2006.230.01:08:45.54#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.01:08:45.54#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.01:08:45.54#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:45.54#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:45.54#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:45.54#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:45.54#ibcon#enter wrdev, iclass 5, count 0 2006.230.01:08:45.54#ibcon#first serial, iclass 5, count 0 2006.230.01:08:45.54#ibcon#enter sib2, iclass 5, count 0 2006.230.01:08:45.54#ibcon#flushed, iclass 5, count 0 2006.230.01:08:45.54#ibcon#about to write, iclass 5, count 0 2006.230.01:08:45.54#ibcon#wrote, iclass 5, count 0 2006.230.01:08:45.54#ibcon#about to read 3, iclass 5, count 0 2006.230.01:08:45.56#ibcon#read 3, iclass 5, count 0 2006.230.01:08:45.56#ibcon#about to read 4, iclass 5, count 0 2006.230.01:08:45.56#ibcon#read 4, iclass 5, count 0 2006.230.01:08:45.56#ibcon#about to read 5, iclass 5, count 0 2006.230.01:08:45.56#ibcon#read 5, iclass 5, count 0 2006.230.01:08:45.56#ibcon#about to read 6, iclass 5, count 0 2006.230.01:08:45.56#ibcon#read 6, iclass 5, count 0 2006.230.01:08:45.56#ibcon#end of sib2, iclass 5, count 0 2006.230.01:08:45.56#ibcon#*mode == 0, iclass 5, count 0 2006.230.01:08:45.56#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.01:08:45.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:08:45.56#ibcon#*before write, iclass 5, count 0 2006.230.01:08:45.56#ibcon#enter sib2, iclass 5, count 0 2006.230.01:08:45.56#ibcon#flushed, iclass 5, count 0 2006.230.01:08:45.56#ibcon#about to write, iclass 5, count 0 2006.230.01:08:45.56#ibcon#wrote, iclass 5, count 0 2006.230.01:08:45.56#ibcon#about to read 3, iclass 5, count 0 2006.230.01:08:45.60#ibcon#read 3, iclass 5, count 0 2006.230.01:08:45.60#ibcon#about to read 4, iclass 5, count 0 2006.230.01:08:45.60#ibcon#read 4, iclass 5, count 0 2006.230.01:08:45.60#ibcon#about to read 5, iclass 5, count 0 2006.230.01:08:45.60#ibcon#read 5, iclass 5, count 0 2006.230.01:08:45.60#ibcon#about to read 6, iclass 5, count 0 2006.230.01:08:45.60#ibcon#read 6, iclass 5, count 0 2006.230.01:08:45.60#ibcon#end of sib2, iclass 5, count 0 2006.230.01:08:45.60#ibcon#*after write, iclass 5, count 0 2006.230.01:08:45.60#ibcon#*before return 0, iclass 5, count 0 2006.230.01:08:45.60#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:45.60#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:08:45.60#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.01:08:45.60#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.01:08:45.60$vck44/vb=6,4 2006.230.01:08:45.60#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.01:08:45.60#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.01:08:45.60#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:45.60#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:45.66#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:45.66#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:45.66#ibcon#enter wrdev, iclass 7, count 2 2006.230.01:08:45.66#ibcon#first serial, iclass 7, count 2 2006.230.01:08:45.66#ibcon#enter sib2, iclass 7, count 2 2006.230.01:08:45.66#ibcon#flushed, iclass 7, count 2 2006.230.01:08:45.66#ibcon#about to write, iclass 7, count 2 2006.230.01:08:45.66#ibcon#wrote, iclass 7, count 2 2006.230.01:08:45.66#ibcon#about to read 3, iclass 7, count 2 2006.230.01:08:45.68#ibcon#read 3, iclass 7, count 2 2006.230.01:08:45.68#ibcon#about to read 4, iclass 7, count 2 2006.230.01:08:45.68#ibcon#read 4, iclass 7, count 2 2006.230.01:08:45.68#ibcon#about to read 5, iclass 7, count 2 2006.230.01:08:45.68#ibcon#read 5, iclass 7, count 2 2006.230.01:08:45.68#ibcon#about to read 6, iclass 7, count 2 2006.230.01:08:45.68#ibcon#read 6, iclass 7, count 2 2006.230.01:08:45.68#ibcon#end of sib2, iclass 7, count 2 2006.230.01:08:45.68#ibcon#*mode == 0, iclass 7, count 2 2006.230.01:08:45.68#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.01:08:45.68#ibcon#[27=AT06-04\r\n] 2006.230.01:08:45.68#ibcon#*before write, iclass 7, count 2 2006.230.01:08:45.68#ibcon#enter sib2, iclass 7, count 2 2006.230.01:08:45.68#ibcon#flushed, iclass 7, count 2 2006.230.01:08:45.68#ibcon#about to write, iclass 7, count 2 2006.230.01:08:45.68#ibcon#wrote, iclass 7, count 2 2006.230.01:08:45.68#ibcon#about to read 3, iclass 7, count 2 2006.230.01:08:45.71#ibcon#read 3, iclass 7, count 2 2006.230.01:08:45.71#ibcon#about to read 4, iclass 7, count 2 2006.230.01:08:45.71#ibcon#read 4, iclass 7, count 2 2006.230.01:08:45.71#ibcon#about to read 5, iclass 7, count 2 2006.230.01:08:45.71#ibcon#read 5, iclass 7, count 2 2006.230.01:08:45.71#ibcon#about to read 6, iclass 7, count 2 2006.230.01:08:45.71#ibcon#read 6, iclass 7, count 2 2006.230.01:08:45.71#ibcon#end of sib2, iclass 7, count 2 2006.230.01:08:45.71#ibcon#*after write, iclass 7, count 2 2006.230.01:08:45.71#ibcon#*before return 0, iclass 7, count 2 2006.230.01:08:45.71#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:45.71#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:08:45.71#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.01:08:45.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:45.71#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:45.83#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:45.83#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:45.83#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:08:45.83#ibcon#first serial, iclass 7, count 0 2006.230.01:08:45.83#ibcon#enter sib2, iclass 7, count 0 2006.230.01:08:45.83#ibcon#flushed, iclass 7, count 0 2006.230.01:08:45.83#ibcon#about to write, iclass 7, count 0 2006.230.01:08:45.83#ibcon#wrote, iclass 7, count 0 2006.230.01:08:45.83#ibcon#about to read 3, iclass 7, count 0 2006.230.01:08:45.85#ibcon#read 3, iclass 7, count 0 2006.230.01:08:45.85#ibcon#about to read 4, iclass 7, count 0 2006.230.01:08:45.85#ibcon#read 4, iclass 7, count 0 2006.230.01:08:45.85#ibcon#about to read 5, iclass 7, count 0 2006.230.01:08:45.85#ibcon#read 5, iclass 7, count 0 2006.230.01:08:45.85#ibcon#about to read 6, iclass 7, count 0 2006.230.01:08:45.85#ibcon#read 6, iclass 7, count 0 2006.230.01:08:45.85#ibcon#end of sib2, iclass 7, count 0 2006.230.01:08:45.85#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:08:45.85#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:08:45.85#ibcon#[27=USB\r\n] 2006.230.01:08:45.85#ibcon#*before write, iclass 7, count 0 2006.230.01:08:45.85#ibcon#enter sib2, iclass 7, count 0 2006.230.01:08:45.85#ibcon#flushed, iclass 7, count 0 2006.230.01:08:45.85#ibcon#about to write, iclass 7, count 0 2006.230.01:08:45.85#ibcon#wrote, iclass 7, count 0 2006.230.01:08:45.85#ibcon#about to read 3, iclass 7, count 0 2006.230.01:08:45.88#ibcon#read 3, iclass 7, count 0 2006.230.01:08:45.88#ibcon#about to read 4, iclass 7, count 0 2006.230.01:08:45.88#ibcon#read 4, iclass 7, count 0 2006.230.01:08:45.88#ibcon#about to read 5, iclass 7, count 0 2006.230.01:08:45.88#ibcon#read 5, iclass 7, count 0 2006.230.01:08:45.88#ibcon#about to read 6, iclass 7, count 0 2006.230.01:08:45.88#ibcon#read 6, iclass 7, count 0 2006.230.01:08:45.88#ibcon#end of sib2, iclass 7, count 0 2006.230.01:08:45.88#ibcon#*after write, iclass 7, count 0 2006.230.01:08:45.88#ibcon#*before return 0, iclass 7, count 0 2006.230.01:08:45.88#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:45.88#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:08:45.88#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:08:45.88#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:08:45.88$vck44/vblo=7,734.99 2006.230.01:08:45.88#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.01:08:45.88#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.01:08:45.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:45.88#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:45.88#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:45.88#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:45.88#ibcon#enter wrdev, iclass 11, count 0 2006.230.01:08:45.88#ibcon#first serial, iclass 11, count 0 2006.230.01:08:45.88#ibcon#enter sib2, iclass 11, count 0 2006.230.01:08:45.88#ibcon#flushed, iclass 11, count 0 2006.230.01:08:45.88#ibcon#about to write, iclass 11, count 0 2006.230.01:08:45.88#ibcon#wrote, iclass 11, count 0 2006.230.01:08:45.88#ibcon#about to read 3, iclass 11, count 0 2006.230.01:08:45.90#ibcon#read 3, iclass 11, count 0 2006.230.01:08:45.90#ibcon#about to read 4, iclass 11, count 0 2006.230.01:08:45.90#ibcon#read 4, iclass 11, count 0 2006.230.01:08:45.90#ibcon#about to read 5, iclass 11, count 0 2006.230.01:08:45.90#ibcon#read 5, iclass 11, count 0 2006.230.01:08:45.90#ibcon#about to read 6, iclass 11, count 0 2006.230.01:08:45.90#ibcon#read 6, iclass 11, count 0 2006.230.01:08:45.90#ibcon#end of sib2, iclass 11, count 0 2006.230.01:08:45.90#ibcon#*mode == 0, iclass 11, count 0 2006.230.01:08:45.90#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.01:08:45.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:08:45.90#ibcon#*before write, iclass 11, count 0 2006.230.01:08:45.90#ibcon#enter sib2, iclass 11, count 0 2006.230.01:08:45.90#ibcon#flushed, iclass 11, count 0 2006.230.01:08:45.90#ibcon#about to write, iclass 11, count 0 2006.230.01:08:45.90#ibcon#wrote, iclass 11, count 0 2006.230.01:08:45.90#ibcon#about to read 3, iclass 11, count 0 2006.230.01:08:45.94#ibcon#read 3, iclass 11, count 0 2006.230.01:08:45.94#ibcon#about to read 4, iclass 11, count 0 2006.230.01:08:45.94#ibcon#read 4, iclass 11, count 0 2006.230.01:08:45.94#ibcon#about to read 5, iclass 11, count 0 2006.230.01:08:45.94#ibcon#read 5, iclass 11, count 0 2006.230.01:08:45.94#ibcon#about to read 6, iclass 11, count 0 2006.230.01:08:45.94#ibcon#read 6, iclass 11, count 0 2006.230.01:08:45.94#ibcon#end of sib2, iclass 11, count 0 2006.230.01:08:45.94#ibcon#*after write, iclass 11, count 0 2006.230.01:08:45.94#ibcon#*before return 0, iclass 11, count 0 2006.230.01:08:45.94#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:45.94#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:08:45.94#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.01:08:45.94#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.01:08:45.94$vck44/vb=7,4 2006.230.01:08:45.94#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.01:08:45.94#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.01:08:45.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:45.94#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:46.00#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:46.00#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:46.00#ibcon#enter wrdev, iclass 13, count 2 2006.230.01:08:46.00#ibcon#first serial, iclass 13, count 2 2006.230.01:08:46.00#ibcon#enter sib2, iclass 13, count 2 2006.230.01:08:46.00#ibcon#flushed, iclass 13, count 2 2006.230.01:08:46.00#ibcon#about to write, iclass 13, count 2 2006.230.01:08:46.00#ibcon#wrote, iclass 13, count 2 2006.230.01:08:46.00#ibcon#about to read 3, iclass 13, count 2 2006.230.01:08:46.02#ibcon#read 3, iclass 13, count 2 2006.230.01:08:46.02#ibcon#about to read 4, iclass 13, count 2 2006.230.01:08:46.02#ibcon#read 4, iclass 13, count 2 2006.230.01:08:46.02#ibcon#about to read 5, iclass 13, count 2 2006.230.01:08:46.02#ibcon#read 5, iclass 13, count 2 2006.230.01:08:46.02#ibcon#about to read 6, iclass 13, count 2 2006.230.01:08:46.02#ibcon#read 6, iclass 13, count 2 2006.230.01:08:46.02#ibcon#end of sib2, iclass 13, count 2 2006.230.01:08:46.02#ibcon#*mode == 0, iclass 13, count 2 2006.230.01:08:46.02#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.01:08:46.02#ibcon#[27=AT07-04\r\n] 2006.230.01:08:46.02#ibcon#*before write, iclass 13, count 2 2006.230.01:08:46.02#ibcon#enter sib2, iclass 13, count 2 2006.230.01:08:46.02#ibcon#flushed, iclass 13, count 2 2006.230.01:08:46.02#ibcon#about to write, iclass 13, count 2 2006.230.01:08:46.02#ibcon#wrote, iclass 13, count 2 2006.230.01:08:46.02#ibcon#about to read 3, iclass 13, count 2 2006.230.01:08:46.05#ibcon#read 3, iclass 13, count 2 2006.230.01:08:46.05#ibcon#about to read 4, iclass 13, count 2 2006.230.01:08:46.05#ibcon#read 4, iclass 13, count 2 2006.230.01:08:46.05#ibcon#about to read 5, iclass 13, count 2 2006.230.01:08:46.05#ibcon#read 5, iclass 13, count 2 2006.230.01:08:46.05#ibcon#about to read 6, iclass 13, count 2 2006.230.01:08:46.05#ibcon#read 6, iclass 13, count 2 2006.230.01:08:46.05#ibcon#end of sib2, iclass 13, count 2 2006.230.01:08:46.05#ibcon#*after write, iclass 13, count 2 2006.230.01:08:46.05#ibcon#*before return 0, iclass 13, count 2 2006.230.01:08:46.05#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:46.05#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:08:46.05#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.01:08:46.05#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:46.05#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:46.17#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:46.17#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:46.17#ibcon#enter wrdev, iclass 13, count 0 2006.230.01:08:46.17#ibcon#first serial, iclass 13, count 0 2006.230.01:08:46.17#ibcon#enter sib2, iclass 13, count 0 2006.230.01:08:46.17#ibcon#flushed, iclass 13, count 0 2006.230.01:08:46.17#ibcon#about to write, iclass 13, count 0 2006.230.01:08:46.17#ibcon#wrote, iclass 13, count 0 2006.230.01:08:46.17#ibcon#about to read 3, iclass 13, count 0 2006.230.01:08:46.19#ibcon#read 3, iclass 13, count 0 2006.230.01:08:46.19#ibcon#about to read 4, iclass 13, count 0 2006.230.01:08:46.19#ibcon#read 4, iclass 13, count 0 2006.230.01:08:46.19#ibcon#about to read 5, iclass 13, count 0 2006.230.01:08:46.19#ibcon#read 5, iclass 13, count 0 2006.230.01:08:46.19#ibcon#about to read 6, iclass 13, count 0 2006.230.01:08:46.19#ibcon#read 6, iclass 13, count 0 2006.230.01:08:46.19#ibcon#end of sib2, iclass 13, count 0 2006.230.01:08:46.19#ibcon#*mode == 0, iclass 13, count 0 2006.230.01:08:46.19#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.01:08:46.19#ibcon#[27=USB\r\n] 2006.230.01:08:46.19#ibcon#*before write, iclass 13, count 0 2006.230.01:08:46.19#ibcon#enter sib2, iclass 13, count 0 2006.230.01:08:46.19#ibcon#flushed, iclass 13, count 0 2006.230.01:08:46.19#ibcon#about to write, iclass 13, count 0 2006.230.01:08:46.19#ibcon#wrote, iclass 13, count 0 2006.230.01:08:46.19#ibcon#about to read 3, iclass 13, count 0 2006.230.01:08:46.22#ibcon#read 3, iclass 13, count 0 2006.230.01:08:46.22#ibcon#about to read 4, iclass 13, count 0 2006.230.01:08:46.22#ibcon#read 4, iclass 13, count 0 2006.230.01:08:46.22#ibcon#about to read 5, iclass 13, count 0 2006.230.01:08:46.22#ibcon#read 5, iclass 13, count 0 2006.230.01:08:46.22#ibcon#about to read 6, iclass 13, count 0 2006.230.01:08:46.22#ibcon#read 6, iclass 13, count 0 2006.230.01:08:46.22#ibcon#end of sib2, iclass 13, count 0 2006.230.01:08:46.22#ibcon#*after write, iclass 13, count 0 2006.230.01:08:46.22#ibcon#*before return 0, iclass 13, count 0 2006.230.01:08:46.22#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:46.22#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:08:46.22#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.01:08:46.22#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.01:08:46.22$vck44/vblo=8,744.99 2006.230.01:08:46.22#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.01:08:46.22#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.01:08:46.22#ibcon#ireg 17 cls_cnt 0 2006.230.01:08:46.22#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:46.22#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:46.22#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:46.22#ibcon#enter wrdev, iclass 15, count 0 2006.230.01:08:46.22#ibcon#first serial, iclass 15, count 0 2006.230.01:08:46.22#ibcon#enter sib2, iclass 15, count 0 2006.230.01:08:46.22#ibcon#flushed, iclass 15, count 0 2006.230.01:08:46.22#ibcon#about to write, iclass 15, count 0 2006.230.01:08:46.22#ibcon#wrote, iclass 15, count 0 2006.230.01:08:46.22#ibcon#about to read 3, iclass 15, count 0 2006.230.01:08:46.24#ibcon#read 3, iclass 15, count 0 2006.230.01:08:46.24#ibcon#about to read 4, iclass 15, count 0 2006.230.01:08:46.24#ibcon#read 4, iclass 15, count 0 2006.230.01:08:46.24#ibcon#about to read 5, iclass 15, count 0 2006.230.01:08:46.24#ibcon#read 5, iclass 15, count 0 2006.230.01:08:46.24#ibcon#about to read 6, iclass 15, count 0 2006.230.01:08:46.24#ibcon#read 6, iclass 15, count 0 2006.230.01:08:46.24#ibcon#end of sib2, iclass 15, count 0 2006.230.01:08:46.24#ibcon#*mode == 0, iclass 15, count 0 2006.230.01:08:46.24#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.01:08:46.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:08:46.24#ibcon#*before write, iclass 15, count 0 2006.230.01:08:46.24#ibcon#enter sib2, iclass 15, count 0 2006.230.01:08:46.24#ibcon#flushed, iclass 15, count 0 2006.230.01:08:46.24#ibcon#about to write, iclass 15, count 0 2006.230.01:08:46.24#ibcon#wrote, iclass 15, count 0 2006.230.01:08:46.24#ibcon#about to read 3, iclass 15, count 0 2006.230.01:08:46.28#ibcon#read 3, iclass 15, count 0 2006.230.01:08:46.28#ibcon#about to read 4, iclass 15, count 0 2006.230.01:08:46.28#ibcon#read 4, iclass 15, count 0 2006.230.01:08:46.28#ibcon#about to read 5, iclass 15, count 0 2006.230.01:08:46.28#ibcon#read 5, iclass 15, count 0 2006.230.01:08:46.28#ibcon#about to read 6, iclass 15, count 0 2006.230.01:08:46.28#ibcon#read 6, iclass 15, count 0 2006.230.01:08:46.28#ibcon#end of sib2, iclass 15, count 0 2006.230.01:08:46.28#ibcon#*after write, iclass 15, count 0 2006.230.01:08:46.28#ibcon#*before return 0, iclass 15, count 0 2006.230.01:08:46.28#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:46.28#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:08:46.28#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.01:08:46.28#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.01:08:46.28$vck44/vb=8,4 2006.230.01:08:46.28#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.230.01:08:46.28#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.230.01:08:46.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:08:46.28#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:46.34#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:46.34#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:46.34#ibcon#enter wrdev, iclass 17, count 2 2006.230.01:08:46.34#ibcon#first serial, iclass 17, count 2 2006.230.01:08:46.34#ibcon#enter sib2, iclass 17, count 2 2006.230.01:08:46.34#ibcon#flushed, iclass 17, count 2 2006.230.01:08:46.34#ibcon#about to write, iclass 17, count 2 2006.230.01:08:46.34#ibcon#wrote, iclass 17, count 2 2006.230.01:08:46.34#ibcon#about to read 3, iclass 17, count 2 2006.230.01:08:46.36#ibcon#read 3, iclass 17, count 2 2006.230.01:08:46.36#ibcon#about to read 4, iclass 17, count 2 2006.230.01:08:46.36#ibcon#read 4, iclass 17, count 2 2006.230.01:08:46.36#ibcon#about to read 5, iclass 17, count 2 2006.230.01:08:46.36#ibcon#read 5, iclass 17, count 2 2006.230.01:08:46.36#ibcon#about to read 6, iclass 17, count 2 2006.230.01:08:46.36#ibcon#read 6, iclass 17, count 2 2006.230.01:08:46.36#ibcon#end of sib2, iclass 17, count 2 2006.230.01:08:46.36#ibcon#*mode == 0, iclass 17, count 2 2006.230.01:08:46.36#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.230.01:08:46.36#ibcon#[27=AT08-04\r\n] 2006.230.01:08:46.36#ibcon#*before write, iclass 17, count 2 2006.230.01:08:46.36#ibcon#enter sib2, iclass 17, count 2 2006.230.01:08:46.36#ibcon#flushed, iclass 17, count 2 2006.230.01:08:46.36#ibcon#about to write, iclass 17, count 2 2006.230.01:08:46.36#ibcon#wrote, iclass 17, count 2 2006.230.01:08:46.36#ibcon#about to read 3, iclass 17, count 2 2006.230.01:08:46.39#ibcon#read 3, iclass 17, count 2 2006.230.01:08:46.39#ibcon#about to read 4, iclass 17, count 2 2006.230.01:08:46.39#ibcon#read 4, iclass 17, count 2 2006.230.01:08:46.39#ibcon#about to read 5, iclass 17, count 2 2006.230.01:08:46.39#ibcon#read 5, iclass 17, count 2 2006.230.01:08:46.39#ibcon#about to read 6, iclass 17, count 2 2006.230.01:08:46.39#ibcon#read 6, iclass 17, count 2 2006.230.01:08:46.39#ibcon#end of sib2, iclass 17, count 2 2006.230.01:08:46.39#ibcon#*after write, iclass 17, count 2 2006.230.01:08:46.39#ibcon#*before return 0, iclass 17, count 2 2006.230.01:08:46.39#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:46.39#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:08:46.39#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.230.01:08:46.39#ibcon#ireg 7 cls_cnt 0 2006.230.01:08:46.39#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:46.51#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:46.51#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:46.51#ibcon#enter wrdev, iclass 17, count 0 2006.230.01:08:46.51#ibcon#first serial, iclass 17, count 0 2006.230.01:08:46.51#ibcon#enter sib2, iclass 17, count 0 2006.230.01:08:46.51#ibcon#flushed, iclass 17, count 0 2006.230.01:08:46.51#ibcon#about to write, iclass 17, count 0 2006.230.01:08:46.51#ibcon#wrote, iclass 17, count 0 2006.230.01:08:46.51#ibcon#about to read 3, iclass 17, count 0 2006.230.01:08:46.53#ibcon#read 3, iclass 17, count 0 2006.230.01:08:46.53#ibcon#about to read 4, iclass 17, count 0 2006.230.01:08:46.53#ibcon#read 4, iclass 17, count 0 2006.230.01:08:46.53#ibcon#about to read 5, iclass 17, count 0 2006.230.01:08:46.53#ibcon#read 5, iclass 17, count 0 2006.230.01:08:46.53#ibcon#about to read 6, iclass 17, count 0 2006.230.01:08:46.53#ibcon#read 6, iclass 17, count 0 2006.230.01:08:46.53#ibcon#end of sib2, iclass 17, count 0 2006.230.01:08:46.53#ibcon#*mode == 0, iclass 17, count 0 2006.230.01:08:46.53#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.01:08:46.53#ibcon#[27=USB\r\n] 2006.230.01:08:46.53#ibcon#*before write, iclass 17, count 0 2006.230.01:08:46.53#ibcon#enter sib2, iclass 17, count 0 2006.230.01:08:46.53#ibcon#flushed, iclass 17, count 0 2006.230.01:08:46.53#ibcon#about to write, iclass 17, count 0 2006.230.01:08:46.53#ibcon#wrote, iclass 17, count 0 2006.230.01:08:46.53#ibcon#about to read 3, iclass 17, count 0 2006.230.01:08:46.56#ibcon#read 3, iclass 17, count 0 2006.230.01:08:46.56#ibcon#about to read 4, iclass 17, count 0 2006.230.01:08:46.56#ibcon#read 4, iclass 17, count 0 2006.230.01:08:46.56#ibcon#about to read 5, iclass 17, count 0 2006.230.01:08:46.56#ibcon#read 5, iclass 17, count 0 2006.230.01:08:46.56#ibcon#about to read 6, iclass 17, count 0 2006.230.01:08:46.56#ibcon#read 6, iclass 17, count 0 2006.230.01:08:46.56#ibcon#end of sib2, iclass 17, count 0 2006.230.01:08:46.56#ibcon#*after write, iclass 17, count 0 2006.230.01:08:46.56#ibcon#*before return 0, iclass 17, count 0 2006.230.01:08:46.56#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:46.56#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:08:46.56#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.01:08:46.56#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.01:08:46.56$vck44/vabw=wide 2006.230.01:08:46.56#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.01:08:46.56#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.01:08:46.56#ibcon#ireg 8 cls_cnt 0 2006.230.01:08:46.56#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:46.56#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:46.56#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:46.56#ibcon#enter wrdev, iclass 19, count 0 2006.230.01:08:46.56#ibcon#first serial, iclass 19, count 0 2006.230.01:08:46.56#ibcon#enter sib2, iclass 19, count 0 2006.230.01:08:46.56#ibcon#flushed, iclass 19, count 0 2006.230.01:08:46.56#ibcon#about to write, iclass 19, count 0 2006.230.01:08:46.56#ibcon#wrote, iclass 19, count 0 2006.230.01:08:46.56#ibcon#about to read 3, iclass 19, count 0 2006.230.01:08:46.58#ibcon#read 3, iclass 19, count 0 2006.230.01:08:46.58#ibcon#about to read 4, iclass 19, count 0 2006.230.01:08:46.58#ibcon#read 4, iclass 19, count 0 2006.230.01:08:46.58#ibcon#about to read 5, iclass 19, count 0 2006.230.01:08:46.58#ibcon#read 5, iclass 19, count 0 2006.230.01:08:46.58#ibcon#about to read 6, iclass 19, count 0 2006.230.01:08:46.58#ibcon#read 6, iclass 19, count 0 2006.230.01:08:46.58#ibcon#end of sib2, iclass 19, count 0 2006.230.01:08:46.58#ibcon#*mode == 0, iclass 19, count 0 2006.230.01:08:46.58#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.01:08:46.58#ibcon#[25=BW32\r\n] 2006.230.01:08:46.58#ibcon#*before write, iclass 19, count 0 2006.230.01:08:46.58#ibcon#enter sib2, iclass 19, count 0 2006.230.01:08:46.58#ibcon#flushed, iclass 19, count 0 2006.230.01:08:46.58#ibcon#about to write, iclass 19, count 0 2006.230.01:08:46.58#ibcon#wrote, iclass 19, count 0 2006.230.01:08:46.58#ibcon#about to read 3, iclass 19, count 0 2006.230.01:08:46.61#ibcon#read 3, iclass 19, count 0 2006.230.01:08:46.61#ibcon#about to read 4, iclass 19, count 0 2006.230.01:08:46.61#ibcon#read 4, iclass 19, count 0 2006.230.01:08:46.61#ibcon#about to read 5, iclass 19, count 0 2006.230.01:08:46.61#ibcon#read 5, iclass 19, count 0 2006.230.01:08:46.61#ibcon#about to read 6, iclass 19, count 0 2006.230.01:08:46.61#ibcon#read 6, iclass 19, count 0 2006.230.01:08:46.61#ibcon#end of sib2, iclass 19, count 0 2006.230.01:08:46.61#ibcon#*after write, iclass 19, count 0 2006.230.01:08:46.61#ibcon#*before return 0, iclass 19, count 0 2006.230.01:08:46.61#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:46.61#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:08:46.61#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.01:08:46.61#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.01:08:46.61$vck44/vbbw=wide 2006.230.01:08:46.61#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.01:08:46.61#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.01:08:46.61#ibcon#ireg 8 cls_cnt 0 2006.230.01:08:46.61#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:08:46.68#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:08:46.68#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:08:46.68#ibcon#enter wrdev, iclass 21, count 0 2006.230.01:08:46.68#ibcon#first serial, iclass 21, count 0 2006.230.01:08:46.68#ibcon#enter sib2, iclass 21, count 0 2006.230.01:08:46.68#ibcon#flushed, iclass 21, count 0 2006.230.01:08:46.68#ibcon#about to write, iclass 21, count 0 2006.230.01:08:46.68#ibcon#wrote, iclass 21, count 0 2006.230.01:08:46.68#ibcon#about to read 3, iclass 21, count 0 2006.230.01:08:46.70#ibcon#read 3, iclass 21, count 0 2006.230.01:08:46.70#ibcon#about to read 4, iclass 21, count 0 2006.230.01:08:46.70#ibcon#read 4, iclass 21, count 0 2006.230.01:08:46.70#ibcon#about to read 5, iclass 21, count 0 2006.230.01:08:46.70#ibcon#read 5, iclass 21, count 0 2006.230.01:08:46.70#ibcon#about to read 6, iclass 21, count 0 2006.230.01:08:46.70#ibcon#read 6, iclass 21, count 0 2006.230.01:08:46.70#ibcon#end of sib2, iclass 21, count 0 2006.230.01:08:46.70#ibcon#*mode == 0, iclass 21, count 0 2006.230.01:08:46.70#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.01:08:46.70#ibcon#[27=BW32\r\n] 2006.230.01:08:46.70#ibcon#*before write, iclass 21, count 0 2006.230.01:08:46.70#ibcon#enter sib2, iclass 21, count 0 2006.230.01:08:46.70#ibcon#flushed, iclass 21, count 0 2006.230.01:08:46.70#ibcon#about to write, iclass 21, count 0 2006.230.01:08:46.70#ibcon#wrote, iclass 21, count 0 2006.230.01:08:46.70#ibcon#about to read 3, iclass 21, count 0 2006.230.01:08:46.73#ibcon#read 3, iclass 21, count 0 2006.230.01:08:46.73#ibcon#about to read 4, iclass 21, count 0 2006.230.01:08:46.73#ibcon#read 4, iclass 21, count 0 2006.230.01:08:46.73#ibcon#about to read 5, iclass 21, count 0 2006.230.01:08:46.73#ibcon#read 5, iclass 21, count 0 2006.230.01:08:46.73#ibcon#about to read 6, iclass 21, count 0 2006.230.01:08:46.73#ibcon#read 6, iclass 21, count 0 2006.230.01:08:46.73#ibcon#end of sib2, iclass 21, count 0 2006.230.01:08:46.73#ibcon#*after write, iclass 21, count 0 2006.230.01:08:46.73#ibcon#*before return 0, iclass 21, count 0 2006.230.01:08:46.73#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:08:46.73#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:08:46.73#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.01:08:46.73#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.01:08:46.73$setupk4/ifdk4 2006.230.01:08:46.73$ifdk4/lo= 2006.230.01:08:46.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:08:46.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:08:46.74$ifdk4/patch= 2006.230.01:08:46.74$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:08:46.74$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:08:46.74$setupk4/!*+20s 2006.230.01:08:48.51#abcon#<5=/08 2.2 7.4 32.50 731002.7\r\n> 2006.230.01:08:48.53#abcon#{5=INTERFACE CLEAR} 2006.230.01:08:48.59#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:08:58.68#abcon#<5=/08 2.2 7.4 32.50 741002.7\r\n> 2006.230.01:08:58.70#abcon#{5=INTERFACE CLEAR} 2006.230.01:08:58.76#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:09:01.25$setupk4/"tpicd 2006.230.01:09:01.25$setupk4/echo=off 2006.230.01:09:01.25$setupk4/xlog=off 2006.230.01:09:01.25:!2006.230.01:10:28 2006.230.01:09:02.13#trakl#Source acquired 2006.230.01:09:03.13#flagr#flagr/antenna,acquired 2006.230.01:10:28.00:preob 2006.230.01:10:28.13/onsource/TRACKING 2006.230.01:10:28.13:!2006.230.01:10:38 2006.230.01:10:38.00:"tape 2006.230.01:10:38.00:"st=record 2006.230.01:10:38.00:data_valid=on 2006.230.01:10:38.00:midob 2006.230.01:10:39.13/onsource/TRACKING 2006.230.01:10:39.13/wx/32.51,1002.7,70 2006.230.01:10:39.26/cable/+6.3998E-03 2006.230.01:10:40.35/va/01,08,usb,yes,29,31 2006.230.01:10:40.35/va/02,07,usb,yes,31,32 2006.230.01:10:40.35/va/03,06,usb,yes,39,41 2006.230.01:10:40.35/va/04,07,usb,yes,32,34 2006.230.01:10:40.35/va/05,04,usb,yes,29,29 2006.230.01:10:40.35/va/06,04,usb,yes,32,32 2006.230.01:10:40.35/va/07,05,usb,yes,28,29 2006.230.01:10:40.35/va/08,06,usb,yes,20,26 2006.230.01:10:40.58/valo/01,524.99,yes,locked 2006.230.01:10:40.58/valo/02,534.99,yes,locked 2006.230.01:10:40.58/valo/03,564.99,yes,locked 2006.230.01:10:40.58/valo/04,624.99,yes,locked 2006.230.01:10:40.58/valo/05,734.99,yes,locked 2006.230.01:10:40.58/valo/06,814.99,yes,locked 2006.230.01:10:40.58/valo/07,864.99,yes,locked 2006.230.01:10:40.58/valo/08,884.99,yes,locked 2006.230.01:10:41.67/vb/01,04,usb,yes,31,28 2006.230.01:10:41.67/vb/02,04,usb,yes,33,33 2006.230.01:10:41.67/vb/03,04,usb,yes,30,33 2006.230.01:10:41.67/vb/04,04,usb,yes,34,33 2006.230.01:10:41.67/vb/05,04,usb,yes,27,29 2006.230.01:10:41.67/vb/06,04,usb,yes,31,27 2006.230.01:10:41.67/vb/07,04,usb,yes,31,31 2006.230.01:10:41.67/vb/08,04,usb,yes,29,32 2006.230.01:10:41.90/vblo/01,629.99,yes,locked 2006.230.01:10:41.90/vblo/02,634.99,yes,locked 2006.230.01:10:41.90/vblo/03,649.99,yes,locked 2006.230.01:10:41.90/vblo/04,679.99,yes,locked 2006.230.01:10:41.90/vblo/05,709.99,yes,locked 2006.230.01:10:41.90/vblo/06,719.99,yes,locked 2006.230.01:10:41.90/vblo/07,734.99,yes,locked 2006.230.01:10:41.90/vblo/08,744.99,yes,locked 2006.230.01:10:42.05/vabw/8 2006.230.01:10:42.20/vbbw/8 2006.230.01:10:42.29/xfe/off,on,12.0 2006.230.01:10:42.69/ifatt/23,28,28,28 2006.230.01:10:43.07/fmout-gps/S +4.50E-07 2006.230.01:10:43.11:!2006.230.01:12:18 2006.230.01:12:18.01:data_valid=off 2006.230.01:12:18.02:"et 2006.230.01:12:18.02:!+3s 2006.230.01:12:21.03:"tape 2006.230.01:12:21.04:postob 2006.230.01:12:21.14/cable/+6.3975E-03 2006.230.01:12:21.15/wx/32.49,1002.7,73 2006.230.01:12:21.20/fmout-gps/S +4.50E-07 2006.230.01:12:21.21:scan_name=230-0114,jd0608,50 2006.230.01:12:21.21:source=0552+398,055530.81,394849.2,2000.0,cw 2006.230.01:12:23.14#flagr#flagr/antenna,new-source 2006.230.01:12:23.15:checkk5 2006.230.01:12:23.57/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:12:23.95/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:12:24.35/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:12:24.73/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:12:25.14/chk_obsdata//k5ts1/T2300110??a.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.01:12:25.51/chk_obsdata//k5ts2/T2300110??b.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.01:12:25.92/chk_obsdata//k5ts3/T2300110??c.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.01:12:26.33/chk_obsdata//k5ts4/T2300110??d.dat file size is correct (nominal:400MB, actual:396MB). 2006.230.01:12:27.06/k5log//k5ts1_log_newline 2006.230.01:12:27.78/k5log//k5ts2_log_newline 2006.230.01:12:28.50/k5log//k5ts3_log_newline 2006.230.01:12:29.20/k5log//k5ts4_log_newline 2006.230.01:12:29.23/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:12:29.23:setupk4=1 2006.230.01:12:29.23$setupk4/echo=on 2006.230.01:12:29.23$setupk4/pcalon 2006.230.01:12:29.23$pcalon/"no phase cal control is implemented here 2006.230.01:12:29.23$setupk4/"tpicd=stop 2006.230.01:12:29.23$setupk4/"rec=synch_on 2006.230.01:12:29.23$setupk4/"rec_mode=128 2006.230.01:12:29.23$setupk4/!* 2006.230.01:12:29.23$setupk4/recpk4 2006.230.01:12:29.23$recpk4/recpatch= 2006.230.01:12:29.23$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:12:29.23$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:12:29.23$setupk4/vck44 2006.230.01:12:29.23$vck44/valo=1,524.99 2006.230.01:12:29.23#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.01:12:29.23#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.01:12:29.23#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:29.23#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:29.23#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:29.23#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:29.23#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:12:29.23#ibcon#first serial, iclass 4, count 0 2006.230.01:12:29.23#ibcon#enter sib2, iclass 4, count 0 2006.230.01:12:29.23#ibcon#flushed, iclass 4, count 0 2006.230.01:12:29.23#ibcon#about to write, iclass 4, count 0 2006.230.01:12:29.23#ibcon#wrote, iclass 4, count 0 2006.230.01:12:29.23#ibcon#about to read 3, iclass 4, count 0 2006.230.01:12:29.25#ibcon#read 3, iclass 4, count 0 2006.230.01:12:29.25#ibcon#about to read 4, iclass 4, count 0 2006.230.01:12:29.25#ibcon#read 4, iclass 4, count 0 2006.230.01:12:29.25#ibcon#about to read 5, iclass 4, count 0 2006.230.01:12:29.25#ibcon#read 5, iclass 4, count 0 2006.230.01:12:29.25#ibcon#about to read 6, iclass 4, count 0 2006.230.01:12:29.25#ibcon#read 6, iclass 4, count 0 2006.230.01:12:29.25#ibcon#end of sib2, iclass 4, count 0 2006.230.01:12:29.25#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:12:29.25#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:12:29.25#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:12:29.25#ibcon#*before write, iclass 4, count 0 2006.230.01:12:29.25#ibcon#enter sib2, iclass 4, count 0 2006.230.01:12:29.25#ibcon#flushed, iclass 4, count 0 2006.230.01:12:29.25#ibcon#about to write, iclass 4, count 0 2006.230.01:12:29.25#ibcon#wrote, iclass 4, count 0 2006.230.01:12:29.25#ibcon#about to read 3, iclass 4, count 0 2006.230.01:12:29.30#ibcon#read 3, iclass 4, count 0 2006.230.01:12:29.30#ibcon#about to read 4, iclass 4, count 0 2006.230.01:12:29.30#ibcon#read 4, iclass 4, count 0 2006.230.01:12:29.30#ibcon#about to read 5, iclass 4, count 0 2006.230.01:12:29.30#ibcon#read 5, iclass 4, count 0 2006.230.01:12:29.30#ibcon#about to read 6, iclass 4, count 0 2006.230.01:12:29.30#ibcon#read 6, iclass 4, count 0 2006.230.01:12:29.30#ibcon#end of sib2, iclass 4, count 0 2006.230.01:12:29.30#ibcon#*after write, iclass 4, count 0 2006.230.01:12:29.30#ibcon#*before return 0, iclass 4, count 0 2006.230.01:12:29.30#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:29.30#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:29.30#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:12:29.30#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:12:29.30$vck44/va=1,8 2006.230.01:12:29.30#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.01:12:29.30#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.01:12:29.30#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:29.30#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:12:29.30#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:12:29.30#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:12:29.30#ibcon#enter wrdev, iclass 6, count 2 2006.230.01:12:29.30#ibcon#first serial, iclass 6, count 2 2006.230.01:12:29.30#ibcon#enter sib2, iclass 6, count 2 2006.230.01:12:29.30#ibcon#flushed, iclass 6, count 2 2006.230.01:12:29.30#ibcon#about to write, iclass 6, count 2 2006.230.01:12:29.30#ibcon#wrote, iclass 6, count 2 2006.230.01:12:29.30#ibcon#about to read 3, iclass 6, count 2 2006.230.01:12:29.32#ibcon#read 3, iclass 6, count 2 2006.230.01:12:29.32#ibcon#about to read 4, iclass 6, count 2 2006.230.01:12:29.32#ibcon#read 4, iclass 6, count 2 2006.230.01:12:29.32#ibcon#about to read 5, iclass 6, count 2 2006.230.01:12:29.32#ibcon#read 5, iclass 6, count 2 2006.230.01:12:29.32#ibcon#about to read 6, iclass 6, count 2 2006.230.01:12:29.32#ibcon#read 6, iclass 6, count 2 2006.230.01:12:29.32#ibcon#end of sib2, iclass 6, count 2 2006.230.01:12:29.32#ibcon#*mode == 0, iclass 6, count 2 2006.230.01:12:29.32#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.01:12:29.32#ibcon#[25=AT01-08\r\n] 2006.230.01:12:29.32#ibcon#*before write, iclass 6, count 2 2006.230.01:12:29.32#ibcon#enter sib2, iclass 6, count 2 2006.230.01:12:29.32#ibcon#flushed, iclass 6, count 2 2006.230.01:12:29.32#ibcon#about to write, iclass 6, count 2 2006.230.01:12:29.32#ibcon#wrote, iclass 6, count 2 2006.230.01:12:29.32#ibcon#about to read 3, iclass 6, count 2 2006.230.01:12:29.35#ibcon#read 3, iclass 6, count 2 2006.230.01:12:29.35#ibcon#about to read 4, iclass 6, count 2 2006.230.01:12:29.35#ibcon#read 4, iclass 6, count 2 2006.230.01:12:29.35#ibcon#about to read 5, iclass 6, count 2 2006.230.01:12:29.35#ibcon#read 5, iclass 6, count 2 2006.230.01:12:29.35#ibcon#about to read 6, iclass 6, count 2 2006.230.01:12:29.35#ibcon#read 6, iclass 6, count 2 2006.230.01:12:29.35#ibcon#end of sib2, iclass 6, count 2 2006.230.01:12:29.35#ibcon#*after write, iclass 6, count 2 2006.230.01:12:29.35#ibcon#*before return 0, iclass 6, count 2 2006.230.01:12:29.35#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:12:29.35#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:12:29.35#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.01:12:29.35#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:29.35#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:12:29.47#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:12:29.47#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:12:29.47#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:12:29.47#ibcon#first serial, iclass 6, count 0 2006.230.01:12:29.47#ibcon#enter sib2, iclass 6, count 0 2006.230.01:12:29.47#ibcon#flushed, iclass 6, count 0 2006.230.01:12:29.47#ibcon#about to write, iclass 6, count 0 2006.230.01:12:29.47#ibcon#wrote, iclass 6, count 0 2006.230.01:12:29.47#ibcon#about to read 3, iclass 6, count 0 2006.230.01:12:29.49#ibcon#read 3, iclass 6, count 0 2006.230.01:12:29.49#ibcon#about to read 4, iclass 6, count 0 2006.230.01:12:29.49#ibcon#read 4, iclass 6, count 0 2006.230.01:12:29.49#ibcon#about to read 5, iclass 6, count 0 2006.230.01:12:29.49#ibcon#read 5, iclass 6, count 0 2006.230.01:12:29.49#ibcon#about to read 6, iclass 6, count 0 2006.230.01:12:29.49#ibcon#read 6, iclass 6, count 0 2006.230.01:12:29.49#ibcon#end of sib2, iclass 6, count 0 2006.230.01:12:29.49#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:12:29.49#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:12:29.49#ibcon#[25=USB\r\n] 2006.230.01:12:29.49#ibcon#*before write, iclass 6, count 0 2006.230.01:12:29.49#ibcon#enter sib2, iclass 6, count 0 2006.230.01:12:29.49#ibcon#flushed, iclass 6, count 0 2006.230.01:12:29.49#ibcon#about to write, iclass 6, count 0 2006.230.01:12:29.49#ibcon#wrote, iclass 6, count 0 2006.230.01:12:29.49#ibcon#about to read 3, iclass 6, count 0 2006.230.01:12:29.52#ibcon#read 3, iclass 6, count 0 2006.230.01:12:29.52#ibcon#about to read 4, iclass 6, count 0 2006.230.01:12:29.52#ibcon#read 4, iclass 6, count 0 2006.230.01:12:29.52#ibcon#about to read 5, iclass 6, count 0 2006.230.01:12:29.52#ibcon#read 5, iclass 6, count 0 2006.230.01:12:29.52#ibcon#about to read 6, iclass 6, count 0 2006.230.01:12:29.52#ibcon#read 6, iclass 6, count 0 2006.230.01:12:29.52#ibcon#end of sib2, iclass 6, count 0 2006.230.01:12:29.52#ibcon#*after write, iclass 6, count 0 2006.230.01:12:29.52#ibcon#*before return 0, iclass 6, count 0 2006.230.01:12:29.52#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:12:29.52#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:12:29.52#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:12:29.52#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:12:29.52$vck44/valo=2,534.99 2006.230.01:12:29.52#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.01:12:29.52#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.01:12:29.52#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:29.52#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:12:29.52#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:12:29.52#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:12:29.52#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:12:29.52#ibcon#first serial, iclass 10, count 0 2006.230.01:12:29.52#ibcon#enter sib2, iclass 10, count 0 2006.230.01:12:29.52#ibcon#flushed, iclass 10, count 0 2006.230.01:12:29.52#ibcon#about to write, iclass 10, count 0 2006.230.01:12:29.52#ibcon#wrote, iclass 10, count 0 2006.230.01:12:29.52#ibcon#about to read 3, iclass 10, count 0 2006.230.01:12:29.54#ibcon#read 3, iclass 10, count 0 2006.230.01:12:29.54#ibcon#about to read 4, iclass 10, count 0 2006.230.01:12:29.54#ibcon#read 4, iclass 10, count 0 2006.230.01:12:29.54#ibcon#about to read 5, iclass 10, count 0 2006.230.01:12:29.54#ibcon#read 5, iclass 10, count 0 2006.230.01:12:29.54#ibcon#about to read 6, iclass 10, count 0 2006.230.01:12:29.54#ibcon#read 6, iclass 10, count 0 2006.230.01:12:29.54#ibcon#end of sib2, iclass 10, count 0 2006.230.01:12:29.54#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:12:29.54#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:12:29.54#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:12:29.54#ibcon#*before write, iclass 10, count 0 2006.230.01:12:29.54#ibcon#enter sib2, iclass 10, count 0 2006.230.01:12:29.54#ibcon#flushed, iclass 10, count 0 2006.230.01:12:29.54#ibcon#about to write, iclass 10, count 0 2006.230.01:12:29.54#ibcon#wrote, iclass 10, count 0 2006.230.01:12:29.54#ibcon#about to read 3, iclass 10, count 0 2006.230.01:12:29.58#ibcon#read 3, iclass 10, count 0 2006.230.01:12:29.58#ibcon#about to read 4, iclass 10, count 0 2006.230.01:12:29.58#ibcon#read 4, iclass 10, count 0 2006.230.01:12:29.58#ibcon#about to read 5, iclass 10, count 0 2006.230.01:12:29.58#ibcon#read 5, iclass 10, count 0 2006.230.01:12:29.58#ibcon#about to read 6, iclass 10, count 0 2006.230.01:12:29.58#ibcon#read 6, iclass 10, count 0 2006.230.01:12:29.58#ibcon#end of sib2, iclass 10, count 0 2006.230.01:12:29.58#ibcon#*after write, iclass 10, count 0 2006.230.01:12:29.58#ibcon#*before return 0, iclass 10, count 0 2006.230.01:12:29.58#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:12:29.58#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:12:29.58#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:12:29.58#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:12:29.58$vck44/va=2,7 2006.230.01:12:29.58#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.01:12:29.58#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.01:12:29.58#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:29.58#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:12:29.64#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:12:29.64#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:12:29.64#ibcon#enter wrdev, iclass 12, count 2 2006.230.01:12:29.64#ibcon#first serial, iclass 12, count 2 2006.230.01:12:29.64#ibcon#enter sib2, iclass 12, count 2 2006.230.01:12:29.64#ibcon#flushed, iclass 12, count 2 2006.230.01:12:29.64#ibcon#about to write, iclass 12, count 2 2006.230.01:12:29.64#ibcon#wrote, iclass 12, count 2 2006.230.01:12:29.64#ibcon#about to read 3, iclass 12, count 2 2006.230.01:12:29.66#ibcon#read 3, iclass 12, count 2 2006.230.01:12:29.66#ibcon#about to read 4, iclass 12, count 2 2006.230.01:12:29.66#ibcon#read 4, iclass 12, count 2 2006.230.01:12:29.66#ibcon#about to read 5, iclass 12, count 2 2006.230.01:12:29.66#ibcon#read 5, iclass 12, count 2 2006.230.01:12:29.66#ibcon#about to read 6, iclass 12, count 2 2006.230.01:12:29.66#ibcon#read 6, iclass 12, count 2 2006.230.01:12:29.66#ibcon#end of sib2, iclass 12, count 2 2006.230.01:12:29.66#ibcon#*mode == 0, iclass 12, count 2 2006.230.01:12:29.66#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.01:12:29.66#ibcon#[25=AT02-07\r\n] 2006.230.01:12:29.66#ibcon#*before write, iclass 12, count 2 2006.230.01:12:29.66#ibcon#enter sib2, iclass 12, count 2 2006.230.01:12:29.66#ibcon#flushed, iclass 12, count 2 2006.230.01:12:29.66#ibcon#about to write, iclass 12, count 2 2006.230.01:12:29.66#ibcon#wrote, iclass 12, count 2 2006.230.01:12:29.66#ibcon#about to read 3, iclass 12, count 2 2006.230.01:12:29.69#ibcon#read 3, iclass 12, count 2 2006.230.01:12:29.69#ibcon#about to read 4, iclass 12, count 2 2006.230.01:12:29.69#ibcon#read 4, iclass 12, count 2 2006.230.01:12:29.69#ibcon#about to read 5, iclass 12, count 2 2006.230.01:12:29.69#ibcon#read 5, iclass 12, count 2 2006.230.01:12:29.69#ibcon#about to read 6, iclass 12, count 2 2006.230.01:12:29.69#ibcon#read 6, iclass 12, count 2 2006.230.01:12:29.69#ibcon#end of sib2, iclass 12, count 2 2006.230.01:12:29.69#ibcon#*after write, iclass 12, count 2 2006.230.01:12:29.69#ibcon#*before return 0, iclass 12, count 2 2006.230.01:12:29.69#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:12:29.69#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:12:29.69#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.01:12:29.69#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:29.69#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:12:29.81#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:12:29.81#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:12:29.81#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:12:29.81#ibcon#first serial, iclass 12, count 0 2006.230.01:12:29.81#ibcon#enter sib2, iclass 12, count 0 2006.230.01:12:29.81#ibcon#flushed, iclass 12, count 0 2006.230.01:12:29.81#ibcon#about to write, iclass 12, count 0 2006.230.01:12:29.81#ibcon#wrote, iclass 12, count 0 2006.230.01:12:29.81#ibcon#about to read 3, iclass 12, count 0 2006.230.01:12:29.83#ibcon#read 3, iclass 12, count 0 2006.230.01:12:29.83#ibcon#about to read 4, iclass 12, count 0 2006.230.01:12:29.83#ibcon#read 4, iclass 12, count 0 2006.230.01:12:29.83#ibcon#about to read 5, iclass 12, count 0 2006.230.01:12:29.83#ibcon#read 5, iclass 12, count 0 2006.230.01:12:29.83#ibcon#about to read 6, iclass 12, count 0 2006.230.01:12:29.83#ibcon#read 6, iclass 12, count 0 2006.230.01:12:29.83#ibcon#end of sib2, iclass 12, count 0 2006.230.01:12:29.83#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:12:29.83#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:12:29.83#ibcon#[25=USB\r\n] 2006.230.01:12:29.83#ibcon#*before write, iclass 12, count 0 2006.230.01:12:29.83#ibcon#enter sib2, iclass 12, count 0 2006.230.01:12:29.83#ibcon#flushed, iclass 12, count 0 2006.230.01:12:29.83#ibcon#about to write, iclass 12, count 0 2006.230.01:12:29.83#ibcon#wrote, iclass 12, count 0 2006.230.01:12:29.83#ibcon#about to read 3, iclass 12, count 0 2006.230.01:12:29.86#ibcon#read 3, iclass 12, count 0 2006.230.01:12:29.86#ibcon#about to read 4, iclass 12, count 0 2006.230.01:12:29.86#ibcon#read 4, iclass 12, count 0 2006.230.01:12:29.86#ibcon#about to read 5, iclass 12, count 0 2006.230.01:12:29.86#ibcon#read 5, iclass 12, count 0 2006.230.01:12:29.86#ibcon#about to read 6, iclass 12, count 0 2006.230.01:12:29.86#ibcon#read 6, iclass 12, count 0 2006.230.01:12:29.86#ibcon#end of sib2, iclass 12, count 0 2006.230.01:12:29.86#ibcon#*after write, iclass 12, count 0 2006.230.01:12:29.86#ibcon#*before return 0, iclass 12, count 0 2006.230.01:12:29.86#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:12:29.86#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:12:29.86#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:12:29.86#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:12:29.86$vck44/valo=3,564.99 2006.230.01:12:29.86#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:12:29.86#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:12:29.86#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:29.86#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:29.86#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:29.86#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:29.86#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:12:29.86#ibcon#first serial, iclass 14, count 0 2006.230.01:12:29.86#ibcon#enter sib2, iclass 14, count 0 2006.230.01:12:29.86#ibcon#flushed, iclass 14, count 0 2006.230.01:12:29.86#ibcon#about to write, iclass 14, count 0 2006.230.01:12:29.86#ibcon#wrote, iclass 14, count 0 2006.230.01:12:29.86#ibcon#about to read 3, iclass 14, count 0 2006.230.01:12:29.88#ibcon#read 3, iclass 14, count 0 2006.230.01:12:29.88#ibcon#about to read 4, iclass 14, count 0 2006.230.01:12:29.88#ibcon#read 4, iclass 14, count 0 2006.230.01:12:29.88#ibcon#about to read 5, iclass 14, count 0 2006.230.01:12:29.88#ibcon#read 5, iclass 14, count 0 2006.230.01:12:29.88#ibcon#about to read 6, iclass 14, count 0 2006.230.01:12:29.88#ibcon#read 6, iclass 14, count 0 2006.230.01:12:29.88#ibcon#end of sib2, iclass 14, count 0 2006.230.01:12:29.88#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:12:29.88#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:12:29.88#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:12:29.88#ibcon#*before write, iclass 14, count 0 2006.230.01:12:29.88#ibcon#enter sib2, iclass 14, count 0 2006.230.01:12:29.88#ibcon#flushed, iclass 14, count 0 2006.230.01:12:29.88#ibcon#about to write, iclass 14, count 0 2006.230.01:12:29.88#ibcon#wrote, iclass 14, count 0 2006.230.01:12:29.88#ibcon#about to read 3, iclass 14, count 0 2006.230.01:12:29.92#ibcon#read 3, iclass 14, count 0 2006.230.01:12:29.92#ibcon#about to read 4, iclass 14, count 0 2006.230.01:12:29.92#ibcon#read 4, iclass 14, count 0 2006.230.01:12:29.92#ibcon#about to read 5, iclass 14, count 0 2006.230.01:12:29.92#ibcon#read 5, iclass 14, count 0 2006.230.01:12:29.92#ibcon#about to read 6, iclass 14, count 0 2006.230.01:12:29.92#ibcon#read 6, iclass 14, count 0 2006.230.01:12:29.92#ibcon#end of sib2, iclass 14, count 0 2006.230.01:12:29.92#ibcon#*after write, iclass 14, count 0 2006.230.01:12:29.92#ibcon#*before return 0, iclass 14, count 0 2006.230.01:12:29.92#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:29.92#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:29.92#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:12:29.92#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:12:29.92$vck44/va=3,6 2006.230.01:12:29.92#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.01:12:29.92#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.01:12:29.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:29.92#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:29.98#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:29.98#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:29.98#ibcon#enter wrdev, iclass 16, count 2 2006.230.01:12:29.98#ibcon#first serial, iclass 16, count 2 2006.230.01:12:29.98#ibcon#enter sib2, iclass 16, count 2 2006.230.01:12:29.98#ibcon#flushed, iclass 16, count 2 2006.230.01:12:29.98#ibcon#about to write, iclass 16, count 2 2006.230.01:12:29.98#ibcon#wrote, iclass 16, count 2 2006.230.01:12:29.98#ibcon#about to read 3, iclass 16, count 2 2006.230.01:12:30.00#ibcon#read 3, iclass 16, count 2 2006.230.01:12:30.00#ibcon#about to read 4, iclass 16, count 2 2006.230.01:12:30.00#ibcon#read 4, iclass 16, count 2 2006.230.01:12:30.00#ibcon#about to read 5, iclass 16, count 2 2006.230.01:12:30.00#ibcon#read 5, iclass 16, count 2 2006.230.01:12:30.00#ibcon#about to read 6, iclass 16, count 2 2006.230.01:12:30.00#ibcon#read 6, iclass 16, count 2 2006.230.01:12:30.00#ibcon#end of sib2, iclass 16, count 2 2006.230.01:12:30.00#ibcon#*mode == 0, iclass 16, count 2 2006.230.01:12:30.00#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.01:12:30.00#ibcon#[25=AT03-06\r\n] 2006.230.01:12:30.00#ibcon#*before write, iclass 16, count 2 2006.230.01:12:30.00#ibcon#enter sib2, iclass 16, count 2 2006.230.01:12:30.00#ibcon#flushed, iclass 16, count 2 2006.230.01:12:30.00#ibcon#about to write, iclass 16, count 2 2006.230.01:12:30.00#ibcon#wrote, iclass 16, count 2 2006.230.01:12:30.00#ibcon#about to read 3, iclass 16, count 2 2006.230.01:12:30.03#ibcon#read 3, iclass 16, count 2 2006.230.01:12:30.03#ibcon#about to read 4, iclass 16, count 2 2006.230.01:12:30.03#ibcon#read 4, iclass 16, count 2 2006.230.01:12:30.03#ibcon#about to read 5, iclass 16, count 2 2006.230.01:12:30.03#ibcon#read 5, iclass 16, count 2 2006.230.01:12:30.03#ibcon#about to read 6, iclass 16, count 2 2006.230.01:12:30.03#ibcon#read 6, iclass 16, count 2 2006.230.01:12:30.03#ibcon#end of sib2, iclass 16, count 2 2006.230.01:12:30.03#ibcon#*after write, iclass 16, count 2 2006.230.01:12:30.03#ibcon#*before return 0, iclass 16, count 2 2006.230.01:12:30.03#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:30.03#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:30.03#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.01:12:30.03#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:30.03#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:30.15#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:30.15#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:30.15#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:12:30.15#ibcon#first serial, iclass 16, count 0 2006.230.01:12:30.15#ibcon#enter sib2, iclass 16, count 0 2006.230.01:12:30.15#ibcon#flushed, iclass 16, count 0 2006.230.01:12:30.15#ibcon#about to write, iclass 16, count 0 2006.230.01:12:30.15#ibcon#wrote, iclass 16, count 0 2006.230.01:12:30.15#ibcon#about to read 3, iclass 16, count 0 2006.230.01:12:30.17#ibcon#read 3, iclass 16, count 0 2006.230.01:12:30.17#ibcon#about to read 4, iclass 16, count 0 2006.230.01:12:30.17#ibcon#read 4, iclass 16, count 0 2006.230.01:12:30.17#ibcon#about to read 5, iclass 16, count 0 2006.230.01:12:30.17#ibcon#read 5, iclass 16, count 0 2006.230.01:12:30.17#ibcon#about to read 6, iclass 16, count 0 2006.230.01:12:30.17#ibcon#read 6, iclass 16, count 0 2006.230.01:12:30.17#ibcon#end of sib2, iclass 16, count 0 2006.230.01:12:30.17#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:12:30.17#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:12:30.17#ibcon#[25=USB\r\n] 2006.230.01:12:30.17#ibcon#*before write, iclass 16, count 0 2006.230.01:12:30.17#ibcon#enter sib2, iclass 16, count 0 2006.230.01:12:30.17#ibcon#flushed, iclass 16, count 0 2006.230.01:12:30.17#ibcon#about to write, iclass 16, count 0 2006.230.01:12:30.17#ibcon#wrote, iclass 16, count 0 2006.230.01:12:30.17#ibcon#about to read 3, iclass 16, count 0 2006.230.01:12:30.20#ibcon#read 3, iclass 16, count 0 2006.230.01:12:30.20#ibcon#about to read 4, iclass 16, count 0 2006.230.01:12:30.20#ibcon#read 4, iclass 16, count 0 2006.230.01:12:30.20#ibcon#about to read 5, iclass 16, count 0 2006.230.01:12:30.20#ibcon#read 5, iclass 16, count 0 2006.230.01:12:30.20#ibcon#about to read 6, iclass 16, count 0 2006.230.01:12:30.20#ibcon#read 6, iclass 16, count 0 2006.230.01:12:30.20#ibcon#end of sib2, iclass 16, count 0 2006.230.01:12:30.20#ibcon#*after write, iclass 16, count 0 2006.230.01:12:30.20#ibcon#*before return 0, iclass 16, count 0 2006.230.01:12:30.20#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:30.20#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:30.20#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:12:30.20#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:12:30.20$vck44/valo=4,624.99 2006.230.01:12:30.20#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:12:30.20#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:12:30.20#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:30.20#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:30.20#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:30.20#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:30.20#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:12:30.20#ibcon#first serial, iclass 18, count 0 2006.230.01:12:30.20#ibcon#enter sib2, iclass 18, count 0 2006.230.01:12:30.20#ibcon#flushed, iclass 18, count 0 2006.230.01:12:30.20#ibcon#about to write, iclass 18, count 0 2006.230.01:12:30.20#ibcon#wrote, iclass 18, count 0 2006.230.01:12:30.20#ibcon#about to read 3, iclass 18, count 0 2006.230.01:12:30.22#ibcon#read 3, iclass 18, count 0 2006.230.01:12:30.22#ibcon#about to read 4, iclass 18, count 0 2006.230.01:12:30.22#ibcon#read 4, iclass 18, count 0 2006.230.01:12:30.22#ibcon#about to read 5, iclass 18, count 0 2006.230.01:12:30.22#ibcon#read 5, iclass 18, count 0 2006.230.01:12:30.22#ibcon#about to read 6, iclass 18, count 0 2006.230.01:12:30.22#ibcon#read 6, iclass 18, count 0 2006.230.01:12:30.22#ibcon#end of sib2, iclass 18, count 0 2006.230.01:12:30.22#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:12:30.22#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:12:30.22#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:12:30.22#ibcon#*before write, iclass 18, count 0 2006.230.01:12:30.22#ibcon#enter sib2, iclass 18, count 0 2006.230.01:12:30.22#ibcon#flushed, iclass 18, count 0 2006.230.01:12:30.22#ibcon#about to write, iclass 18, count 0 2006.230.01:12:30.22#ibcon#wrote, iclass 18, count 0 2006.230.01:12:30.22#ibcon#about to read 3, iclass 18, count 0 2006.230.01:12:30.26#ibcon#read 3, iclass 18, count 0 2006.230.01:12:30.26#ibcon#about to read 4, iclass 18, count 0 2006.230.01:12:30.26#ibcon#read 4, iclass 18, count 0 2006.230.01:12:30.26#ibcon#about to read 5, iclass 18, count 0 2006.230.01:12:30.26#ibcon#read 5, iclass 18, count 0 2006.230.01:12:30.26#ibcon#about to read 6, iclass 18, count 0 2006.230.01:12:30.26#ibcon#read 6, iclass 18, count 0 2006.230.01:12:30.26#ibcon#end of sib2, iclass 18, count 0 2006.230.01:12:30.26#ibcon#*after write, iclass 18, count 0 2006.230.01:12:30.26#ibcon#*before return 0, iclass 18, count 0 2006.230.01:12:30.26#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:30.26#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:30.26#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:12:30.26#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:12:30.26$vck44/va=4,7 2006.230.01:12:30.26#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.01:12:30.26#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.01:12:30.26#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:30.26#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:30.32#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:30.32#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:30.32#ibcon#enter wrdev, iclass 20, count 2 2006.230.01:12:30.32#ibcon#first serial, iclass 20, count 2 2006.230.01:12:30.32#ibcon#enter sib2, iclass 20, count 2 2006.230.01:12:30.32#ibcon#flushed, iclass 20, count 2 2006.230.01:12:30.32#ibcon#about to write, iclass 20, count 2 2006.230.01:12:30.32#ibcon#wrote, iclass 20, count 2 2006.230.01:12:30.32#ibcon#about to read 3, iclass 20, count 2 2006.230.01:12:30.34#ibcon#read 3, iclass 20, count 2 2006.230.01:12:30.34#ibcon#about to read 4, iclass 20, count 2 2006.230.01:12:30.34#ibcon#read 4, iclass 20, count 2 2006.230.01:12:30.34#ibcon#about to read 5, iclass 20, count 2 2006.230.01:12:30.34#ibcon#read 5, iclass 20, count 2 2006.230.01:12:30.34#ibcon#about to read 6, iclass 20, count 2 2006.230.01:12:30.34#ibcon#read 6, iclass 20, count 2 2006.230.01:12:30.34#ibcon#end of sib2, iclass 20, count 2 2006.230.01:12:30.34#ibcon#*mode == 0, iclass 20, count 2 2006.230.01:12:30.34#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.01:12:30.34#ibcon#[25=AT04-07\r\n] 2006.230.01:12:30.34#ibcon#*before write, iclass 20, count 2 2006.230.01:12:30.34#ibcon#enter sib2, iclass 20, count 2 2006.230.01:12:30.34#ibcon#flushed, iclass 20, count 2 2006.230.01:12:30.34#ibcon#about to write, iclass 20, count 2 2006.230.01:12:30.34#ibcon#wrote, iclass 20, count 2 2006.230.01:12:30.34#ibcon#about to read 3, iclass 20, count 2 2006.230.01:12:30.37#ibcon#read 3, iclass 20, count 2 2006.230.01:12:30.37#ibcon#about to read 4, iclass 20, count 2 2006.230.01:12:30.37#ibcon#read 4, iclass 20, count 2 2006.230.01:12:30.37#ibcon#about to read 5, iclass 20, count 2 2006.230.01:12:30.37#ibcon#read 5, iclass 20, count 2 2006.230.01:12:30.37#ibcon#about to read 6, iclass 20, count 2 2006.230.01:12:30.37#ibcon#read 6, iclass 20, count 2 2006.230.01:12:30.37#ibcon#end of sib2, iclass 20, count 2 2006.230.01:12:30.37#ibcon#*after write, iclass 20, count 2 2006.230.01:12:30.37#ibcon#*before return 0, iclass 20, count 2 2006.230.01:12:30.37#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:30.37#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:30.37#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.01:12:30.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:30.37#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:30.49#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:30.49#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:30.49#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:12:30.49#ibcon#first serial, iclass 20, count 0 2006.230.01:12:30.49#ibcon#enter sib2, iclass 20, count 0 2006.230.01:12:30.49#ibcon#flushed, iclass 20, count 0 2006.230.01:12:30.49#ibcon#about to write, iclass 20, count 0 2006.230.01:12:30.49#ibcon#wrote, iclass 20, count 0 2006.230.01:12:30.49#ibcon#about to read 3, iclass 20, count 0 2006.230.01:12:30.51#ibcon#read 3, iclass 20, count 0 2006.230.01:12:30.51#ibcon#about to read 4, iclass 20, count 0 2006.230.01:12:30.51#ibcon#read 4, iclass 20, count 0 2006.230.01:12:30.51#ibcon#about to read 5, iclass 20, count 0 2006.230.01:12:30.51#ibcon#read 5, iclass 20, count 0 2006.230.01:12:30.51#ibcon#about to read 6, iclass 20, count 0 2006.230.01:12:30.51#ibcon#read 6, iclass 20, count 0 2006.230.01:12:30.51#ibcon#end of sib2, iclass 20, count 0 2006.230.01:12:30.51#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:12:30.51#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:12:30.51#ibcon#[25=USB\r\n] 2006.230.01:12:30.51#ibcon#*before write, iclass 20, count 0 2006.230.01:12:30.51#ibcon#enter sib2, iclass 20, count 0 2006.230.01:12:30.51#ibcon#flushed, iclass 20, count 0 2006.230.01:12:30.51#ibcon#about to write, iclass 20, count 0 2006.230.01:12:30.51#ibcon#wrote, iclass 20, count 0 2006.230.01:12:30.51#ibcon#about to read 3, iclass 20, count 0 2006.230.01:12:30.54#ibcon#read 3, iclass 20, count 0 2006.230.01:12:30.54#ibcon#about to read 4, iclass 20, count 0 2006.230.01:12:30.54#ibcon#read 4, iclass 20, count 0 2006.230.01:12:30.54#ibcon#about to read 5, iclass 20, count 0 2006.230.01:12:30.54#ibcon#read 5, iclass 20, count 0 2006.230.01:12:30.54#ibcon#about to read 6, iclass 20, count 0 2006.230.01:12:30.54#ibcon#read 6, iclass 20, count 0 2006.230.01:12:30.54#ibcon#end of sib2, iclass 20, count 0 2006.230.01:12:30.54#ibcon#*after write, iclass 20, count 0 2006.230.01:12:30.54#ibcon#*before return 0, iclass 20, count 0 2006.230.01:12:30.54#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:30.54#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:30.54#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:12:30.54#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:12:30.54$vck44/valo=5,734.99 2006.230.01:12:30.54#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.01:12:30.54#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.01:12:30.54#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:30.54#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:30.54#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:30.54#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:30.54#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:12:30.54#ibcon#first serial, iclass 22, count 0 2006.230.01:12:30.54#ibcon#enter sib2, iclass 22, count 0 2006.230.01:12:30.54#ibcon#flushed, iclass 22, count 0 2006.230.01:12:30.54#ibcon#about to write, iclass 22, count 0 2006.230.01:12:30.54#ibcon#wrote, iclass 22, count 0 2006.230.01:12:30.54#ibcon#about to read 3, iclass 22, count 0 2006.230.01:12:30.56#ibcon#read 3, iclass 22, count 0 2006.230.01:12:30.56#ibcon#about to read 4, iclass 22, count 0 2006.230.01:12:30.56#ibcon#read 4, iclass 22, count 0 2006.230.01:12:30.56#ibcon#about to read 5, iclass 22, count 0 2006.230.01:12:30.56#ibcon#read 5, iclass 22, count 0 2006.230.01:12:30.56#ibcon#about to read 6, iclass 22, count 0 2006.230.01:12:30.56#ibcon#read 6, iclass 22, count 0 2006.230.01:12:30.56#ibcon#end of sib2, iclass 22, count 0 2006.230.01:12:30.56#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:12:30.56#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:12:30.56#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:12:30.56#ibcon#*before write, iclass 22, count 0 2006.230.01:12:30.56#ibcon#enter sib2, iclass 22, count 0 2006.230.01:12:30.56#ibcon#flushed, iclass 22, count 0 2006.230.01:12:30.56#ibcon#about to write, iclass 22, count 0 2006.230.01:12:30.56#ibcon#wrote, iclass 22, count 0 2006.230.01:12:30.56#ibcon#about to read 3, iclass 22, count 0 2006.230.01:12:30.60#ibcon#read 3, iclass 22, count 0 2006.230.01:12:30.60#ibcon#about to read 4, iclass 22, count 0 2006.230.01:12:30.60#ibcon#read 4, iclass 22, count 0 2006.230.01:12:30.60#ibcon#about to read 5, iclass 22, count 0 2006.230.01:12:30.60#ibcon#read 5, iclass 22, count 0 2006.230.01:12:30.60#ibcon#about to read 6, iclass 22, count 0 2006.230.01:12:30.60#ibcon#read 6, iclass 22, count 0 2006.230.01:12:30.60#ibcon#end of sib2, iclass 22, count 0 2006.230.01:12:30.60#ibcon#*after write, iclass 22, count 0 2006.230.01:12:30.60#ibcon#*before return 0, iclass 22, count 0 2006.230.01:12:30.60#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:30.60#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:30.60#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:12:30.60#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:12:30.60$vck44/va=5,4 2006.230.01:12:30.60#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.01:12:30.60#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.01:12:30.60#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:30.60#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:30.66#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:30.66#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:30.66#ibcon#enter wrdev, iclass 24, count 2 2006.230.01:12:30.66#ibcon#first serial, iclass 24, count 2 2006.230.01:12:30.66#ibcon#enter sib2, iclass 24, count 2 2006.230.01:12:30.66#ibcon#flushed, iclass 24, count 2 2006.230.01:12:30.66#ibcon#about to write, iclass 24, count 2 2006.230.01:12:30.66#ibcon#wrote, iclass 24, count 2 2006.230.01:12:30.66#ibcon#about to read 3, iclass 24, count 2 2006.230.01:12:30.68#ibcon#read 3, iclass 24, count 2 2006.230.01:12:30.68#ibcon#about to read 4, iclass 24, count 2 2006.230.01:12:30.68#ibcon#read 4, iclass 24, count 2 2006.230.01:12:30.68#ibcon#about to read 5, iclass 24, count 2 2006.230.01:12:30.68#ibcon#read 5, iclass 24, count 2 2006.230.01:12:30.68#ibcon#about to read 6, iclass 24, count 2 2006.230.01:12:30.68#ibcon#read 6, iclass 24, count 2 2006.230.01:12:30.68#ibcon#end of sib2, iclass 24, count 2 2006.230.01:12:30.68#ibcon#*mode == 0, iclass 24, count 2 2006.230.01:12:30.68#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.01:12:30.68#ibcon#[25=AT05-04\r\n] 2006.230.01:12:30.68#ibcon#*before write, iclass 24, count 2 2006.230.01:12:30.68#ibcon#enter sib2, iclass 24, count 2 2006.230.01:12:30.68#ibcon#flushed, iclass 24, count 2 2006.230.01:12:30.68#ibcon#about to write, iclass 24, count 2 2006.230.01:12:30.68#ibcon#wrote, iclass 24, count 2 2006.230.01:12:30.68#ibcon#about to read 3, iclass 24, count 2 2006.230.01:12:30.71#ibcon#read 3, iclass 24, count 2 2006.230.01:12:30.71#ibcon#about to read 4, iclass 24, count 2 2006.230.01:12:30.71#ibcon#read 4, iclass 24, count 2 2006.230.01:12:30.71#ibcon#about to read 5, iclass 24, count 2 2006.230.01:12:30.71#ibcon#read 5, iclass 24, count 2 2006.230.01:12:30.71#ibcon#about to read 6, iclass 24, count 2 2006.230.01:12:30.71#ibcon#read 6, iclass 24, count 2 2006.230.01:12:30.71#ibcon#end of sib2, iclass 24, count 2 2006.230.01:12:30.71#ibcon#*after write, iclass 24, count 2 2006.230.01:12:30.71#ibcon#*before return 0, iclass 24, count 2 2006.230.01:12:30.71#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:30.71#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:30.71#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.01:12:30.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:30.71#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:30.83#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:30.83#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:30.83#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:12:30.83#ibcon#first serial, iclass 24, count 0 2006.230.01:12:30.83#ibcon#enter sib2, iclass 24, count 0 2006.230.01:12:30.83#ibcon#flushed, iclass 24, count 0 2006.230.01:12:30.83#ibcon#about to write, iclass 24, count 0 2006.230.01:12:30.83#ibcon#wrote, iclass 24, count 0 2006.230.01:12:30.83#ibcon#about to read 3, iclass 24, count 0 2006.230.01:12:30.85#ibcon#read 3, iclass 24, count 0 2006.230.01:12:30.85#ibcon#about to read 4, iclass 24, count 0 2006.230.01:12:30.85#ibcon#read 4, iclass 24, count 0 2006.230.01:12:30.85#ibcon#about to read 5, iclass 24, count 0 2006.230.01:12:30.85#ibcon#read 5, iclass 24, count 0 2006.230.01:12:30.85#ibcon#about to read 6, iclass 24, count 0 2006.230.01:12:30.85#ibcon#read 6, iclass 24, count 0 2006.230.01:12:30.85#ibcon#end of sib2, iclass 24, count 0 2006.230.01:12:30.85#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:12:30.85#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:12:30.85#ibcon#[25=USB\r\n] 2006.230.01:12:30.85#ibcon#*before write, iclass 24, count 0 2006.230.01:12:30.85#ibcon#enter sib2, iclass 24, count 0 2006.230.01:12:30.85#ibcon#flushed, iclass 24, count 0 2006.230.01:12:30.85#ibcon#about to write, iclass 24, count 0 2006.230.01:12:30.85#ibcon#wrote, iclass 24, count 0 2006.230.01:12:30.85#ibcon#about to read 3, iclass 24, count 0 2006.230.01:12:30.88#ibcon#read 3, iclass 24, count 0 2006.230.01:12:30.88#ibcon#about to read 4, iclass 24, count 0 2006.230.01:12:30.88#ibcon#read 4, iclass 24, count 0 2006.230.01:12:30.88#ibcon#about to read 5, iclass 24, count 0 2006.230.01:12:30.88#ibcon#read 5, iclass 24, count 0 2006.230.01:12:30.88#ibcon#about to read 6, iclass 24, count 0 2006.230.01:12:30.88#ibcon#read 6, iclass 24, count 0 2006.230.01:12:30.88#ibcon#end of sib2, iclass 24, count 0 2006.230.01:12:30.88#ibcon#*after write, iclass 24, count 0 2006.230.01:12:30.88#ibcon#*before return 0, iclass 24, count 0 2006.230.01:12:30.88#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:30.88#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:30.88#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:12:30.88#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:12:30.88$vck44/valo=6,814.99 2006.230.01:12:30.88#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.01:12:30.88#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.01:12:30.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:30.88#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:30.88#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:30.88#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:30.88#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:12:30.88#ibcon#first serial, iclass 26, count 0 2006.230.01:12:30.88#ibcon#enter sib2, iclass 26, count 0 2006.230.01:12:30.88#ibcon#flushed, iclass 26, count 0 2006.230.01:12:30.88#ibcon#about to write, iclass 26, count 0 2006.230.01:12:30.88#ibcon#wrote, iclass 26, count 0 2006.230.01:12:30.88#ibcon#about to read 3, iclass 26, count 0 2006.230.01:12:30.90#ibcon#read 3, iclass 26, count 0 2006.230.01:12:30.90#ibcon#about to read 4, iclass 26, count 0 2006.230.01:12:30.90#ibcon#read 4, iclass 26, count 0 2006.230.01:12:30.90#ibcon#about to read 5, iclass 26, count 0 2006.230.01:12:30.90#ibcon#read 5, iclass 26, count 0 2006.230.01:12:30.90#ibcon#about to read 6, iclass 26, count 0 2006.230.01:12:30.90#ibcon#read 6, iclass 26, count 0 2006.230.01:12:30.90#ibcon#end of sib2, iclass 26, count 0 2006.230.01:12:30.90#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:12:30.90#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:12:30.90#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:12:30.90#ibcon#*before write, iclass 26, count 0 2006.230.01:12:30.90#ibcon#enter sib2, iclass 26, count 0 2006.230.01:12:30.90#ibcon#flushed, iclass 26, count 0 2006.230.01:12:30.90#ibcon#about to write, iclass 26, count 0 2006.230.01:12:30.90#ibcon#wrote, iclass 26, count 0 2006.230.01:12:30.90#ibcon#about to read 3, iclass 26, count 0 2006.230.01:12:30.94#ibcon#read 3, iclass 26, count 0 2006.230.01:12:30.94#ibcon#about to read 4, iclass 26, count 0 2006.230.01:12:30.94#ibcon#read 4, iclass 26, count 0 2006.230.01:12:30.94#ibcon#about to read 5, iclass 26, count 0 2006.230.01:12:30.94#ibcon#read 5, iclass 26, count 0 2006.230.01:12:30.94#ibcon#about to read 6, iclass 26, count 0 2006.230.01:12:30.94#ibcon#read 6, iclass 26, count 0 2006.230.01:12:30.94#ibcon#end of sib2, iclass 26, count 0 2006.230.01:12:30.94#ibcon#*after write, iclass 26, count 0 2006.230.01:12:30.94#ibcon#*before return 0, iclass 26, count 0 2006.230.01:12:30.94#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:30.94#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:30.94#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:12:30.94#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:12:30.94$vck44/va=6,4 2006.230.01:12:30.94#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.01:12:30.94#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.01:12:30.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:30.94#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:31.00#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:31.00#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:31.00#ibcon#enter wrdev, iclass 28, count 2 2006.230.01:12:31.00#ibcon#first serial, iclass 28, count 2 2006.230.01:12:31.00#ibcon#enter sib2, iclass 28, count 2 2006.230.01:12:31.00#ibcon#flushed, iclass 28, count 2 2006.230.01:12:31.00#ibcon#about to write, iclass 28, count 2 2006.230.01:12:31.00#ibcon#wrote, iclass 28, count 2 2006.230.01:12:31.00#ibcon#about to read 3, iclass 28, count 2 2006.230.01:12:31.02#ibcon#read 3, iclass 28, count 2 2006.230.01:12:31.02#ibcon#about to read 4, iclass 28, count 2 2006.230.01:12:31.02#ibcon#read 4, iclass 28, count 2 2006.230.01:12:31.02#ibcon#about to read 5, iclass 28, count 2 2006.230.01:12:31.02#ibcon#read 5, iclass 28, count 2 2006.230.01:12:31.02#ibcon#about to read 6, iclass 28, count 2 2006.230.01:12:31.02#ibcon#read 6, iclass 28, count 2 2006.230.01:12:31.02#ibcon#end of sib2, iclass 28, count 2 2006.230.01:12:31.02#ibcon#*mode == 0, iclass 28, count 2 2006.230.01:12:31.02#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.01:12:31.02#ibcon#[25=AT06-04\r\n] 2006.230.01:12:31.02#ibcon#*before write, iclass 28, count 2 2006.230.01:12:31.02#ibcon#enter sib2, iclass 28, count 2 2006.230.01:12:31.02#ibcon#flushed, iclass 28, count 2 2006.230.01:12:31.02#ibcon#about to write, iclass 28, count 2 2006.230.01:12:31.02#ibcon#wrote, iclass 28, count 2 2006.230.01:12:31.02#ibcon#about to read 3, iclass 28, count 2 2006.230.01:12:31.05#ibcon#read 3, iclass 28, count 2 2006.230.01:12:31.05#ibcon#about to read 4, iclass 28, count 2 2006.230.01:12:31.05#ibcon#read 4, iclass 28, count 2 2006.230.01:12:31.05#ibcon#about to read 5, iclass 28, count 2 2006.230.01:12:31.05#ibcon#read 5, iclass 28, count 2 2006.230.01:12:31.05#ibcon#about to read 6, iclass 28, count 2 2006.230.01:12:31.05#ibcon#read 6, iclass 28, count 2 2006.230.01:12:31.05#ibcon#end of sib2, iclass 28, count 2 2006.230.01:12:31.05#ibcon#*after write, iclass 28, count 2 2006.230.01:12:31.05#ibcon#*before return 0, iclass 28, count 2 2006.230.01:12:31.05#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:31.05#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:31.05#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.01:12:31.05#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:31.05#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:31.17#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:31.17#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:31.17#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:12:31.17#ibcon#first serial, iclass 28, count 0 2006.230.01:12:31.17#ibcon#enter sib2, iclass 28, count 0 2006.230.01:12:31.17#ibcon#flushed, iclass 28, count 0 2006.230.01:12:31.17#ibcon#about to write, iclass 28, count 0 2006.230.01:12:31.17#ibcon#wrote, iclass 28, count 0 2006.230.01:12:31.17#ibcon#about to read 3, iclass 28, count 0 2006.230.01:12:31.19#ibcon#read 3, iclass 28, count 0 2006.230.01:12:31.19#ibcon#about to read 4, iclass 28, count 0 2006.230.01:12:31.19#ibcon#read 4, iclass 28, count 0 2006.230.01:12:31.19#ibcon#about to read 5, iclass 28, count 0 2006.230.01:12:31.19#ibcon#read 5, iclass 28, count 0 2006.230.01:12:31.19#ibcon#about to read 6, iclass 28, count 0 2006.230.01:12:31.19#ibcon#read 6, iclass 28, count 0 2006.230.01:12:31.19#ibcon#end of sib2, iclass 28, count 0 2006.230.01:12:31.19#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:12:31.19#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:12:31.19#ibcon#[25=USB\r\n] 2006.230.01:12:31.19#ibcon#*before write, iclass 28, count 0 2006.230.01:12:31.19#ibcon#enter sib2, iclass 28, count 0 2006.230.01:12:31.19#ibcon#flushed, iclass 28, count 0 2006.230.01:12:31.19#ibcon#about to write, iclass 28, count 0 2006.230.01:12:31.19#ibcon#wrote, iclass 28, count 0 2006.230.01:12:31.19#ibcon#about to read 3, iclass 28, count 0 2006.230.01:12:31.22#ibcon#read 3, iclass 28, count 0 2006.230.01:12:31.22#ibcon#about to read 4, iclass 28, count 0 2006.230.01:12:31.22#ibcon#read 4, iclass 28, count 0 2006.230.01:12:31.22#ibcon#about to read 5, iclass 28, count 0 2006.230.01:12:31.22#ibcon#read 5, iclass 28, count 0 2006.230.01:12:31.22#ibcon#about to read 6, iclass 28, count 0 2006.230.01:12:31.22#ibcon#read 6, iclass 28, count 0 2006.230.01:12:31.22#ibcon#end of sib2, iclass 28, count 0 2006.230.01:12:31.22#ibcon#*after write, iclass 28, count 0 2006.230.01:12:31.22#ibcon#*before return 0, iclass 28, count 0 2006.230.01:12:31.22#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:31.22#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:31.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:12:31.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:12:31.22$vck44/valo=7,864.99 2006.230.01:12:31.22#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.01:12:31.22#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.01:12:31.22#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:31.22#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:31.22#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:31.22#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:31.22#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:12:31.22#ibcon#first serial, iclass 30, count 0 2006.230.01:12:31.22#ibcon#enter sib2, iclass 30, count 0 2006.230.01:12:31.22#ibcon#flushed, iclass 30, count 0 2006.230.01:12:31.22#ibcon#about to write, iclass 30, count 0 2006.230.01:12:31.22#ibcon#wrote, iclass 30, count 0 2006.230.01:12:31.22#ibcon#about to read 3, iclass 30, count 0 2006.230.01:12:31.24#ibcon#read 3, iclass 30, count 0 2006.230.01:12:31.24#ibcon#about to read 4, iclass 30, count 0 2006.230.01:12:31.24#ibcon#read 4, iclass 30, count 0 2006.230.01:12:31.24#ibcon#about to read 5, iclass 30, count 0 2006.230.01:12:31.24#ibcon#read 5, iclass 30, count 0 2006.230.01:12:31.24#ibcon#about to read 6, iclass 30, count 0 2006.230.01:12:31.24#ibcon#read 6, iclass 30, count 0 2006.230.01:12:31.24#ibcon#end of sib2, iclass 30, count 0 2006.230.01:12:31.24#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:12:31.24#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:12:31.24#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:12:31.24#ibcon#*before write, iclass 30, count 0 2006.230.01:12:31.24#ibcon#enter sib2, iclass 30, count 0 2006.230.01:12:31.24#ibcon#flushed, iclass 30, count 0 2006.230.01:12:31.24#ibcon#about to write, iclass 30, count 0 2006.230.01:12:31.24#ibcon#wrote, iclass 30, count 0 2006.230.01:12:31.24#ibcon#about to read 3, iclass 30, count 0 2006.230.01:12:31.28#ibcon#read 3, iclass 30, count 0 2006.230.01:12:31.28#ibcon#about to read 4, iclass 30, count 0 2006.230.01:12:31.28#ibcon#read 4, iclass 30, count 0 2006.230.01:12:31.28#ibcon#about to read 5, iclass 30, count 0 2006.230.01:12:31.28#ibcon#read 5, iclass 30, count 0 2006.230.01:12:31.28#ibcon#about to read 6, iclass 30, count 0 2006.230.01:12:31.28#ibcon#read 6, iclass 30, count 0 2006.230.01:12:31.28#ibcon#end of sib2, iclass 30, count 0 2006.230.01:12:31.28#ibcon#*after write, iclass 30, count 0 2006.230.01:12:31.28#ibcon#*before return 0, iclass 30, count 0 2006.230.01:12:31.28#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:31.28#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:31.28#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:12:31.28#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:12:31.28$vck44/va=7,5 2006.230.01:12:31.28#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.01:12:31.28#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.01:12:31.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:31.28#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:31.34#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:31.34#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:31.34#ibcon#enter wrdev, iclass 32, count 2 2006.230.01:12:31.34#ibcon#first serial, iclass 32, count 2 2006.230.01:12:31.34#ibcon#enter sib2, iclass 32, count 2 2006.230.01:12:31.34#ibcon#flushed, iclass 32, count 2 2006.230.01:12:31.34#ibcon#about to write, iclass 32, count 2 2006.230.01:12:31.34#ibcon#wrote, iclass 32, count 2 2006.230.01:12:31.34#ibcon#about to read 3, iclass 32, count 2 2006.230.01:12:31.36#ibcon#read 3, iclass 32, count 2 2006.230.01:12:31.36#ibcon#about to read 4, iclass 32, count 2 2006.230.01:12:31.36#ibcon#read 4, iclass 32, count 2 2006.230.01:12:31.36#ibcon#about to read 5, iclass 32, count 2 2006.230.01:12:31.36#ibcon#read 5, iclass 32, count 2 2006.230.01:12:31.36#ibcon#about to read 6, iclass 32, count 2 2006.230.01:12:31.36#ibcon#read 6, iclass 32, count 2 2006.230.01:12:31.36#ibcon#end of sib2, iclass 32, count 2 2006.230.01:12:31.36#ibcon#*mode == 0, iclass 32, count 2 2006.230.01:12:31.36#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.01:12:31.36#ibcon#[25=AT07-05\r\n] 2006.230.01:12:31.36#ibcon#*before write, iclass 32, count 2 2006.230.01:12:31.36#ibcon#enter sib2, iclass 32, count 2 2006.230.01:12:31.36#ibcon#flushed, iclass 32, count 2 2006.230.01:12:31.36#ibcon#about to write, iclass 32, count 2 2006.230.01:12:31.36#ibcon#wrote, iclass 32, count 2 2006.230.01:12:31.36#ibcon#about to read 3, iclass 32, count 2 2006.230.01:12:31.39#ibcon#read 3, iclass 32, count 2 2006.230.01:12:31.39#ibcon#about to read 4, iclass 32, count 2 2006.230.01:12:31.39#ibcon#read 4, iclass 32, count 2 2006.230.01:12:31.39#ibcon#about to read 5, iclass 32, count 2 2006.230.01:12:31.39#ibcon#read 5, iclass 32, count 2 2006.230.01:12:31.39#ibcon#about to read 6, iclass 32, count 2 2006.230.01:12:31.39#ibcon#read 6, iclass 32, count 2 2006.230.01:12:31.39#ibcon#end of sib2, iclass 32, count 2 2006.230.01:12:31.39#ibcon#*after write, iclass 32, count 2 2006.230.01:12:31.39#ibcon#*before return 0, iclass 32, count 2 2006.230.01:12:31.39#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:31.39#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:31.39#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.01:12:31.39#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:31.39#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:31.51#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:31.51#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:31.51#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:12:31.51#ibcon#first serial, iclass 32, count 0 2006.230.01:12:31.51#ibcon#enter sib2, iclass 32, count 0 2006.230.01:12:31.51#ibcon#flushed, iclass 32, count 0 2006.230.01:12:31.51#ibcon#about to write, iclass 32, count 0 2006.230.01:12:31.51#ibcon#wrote, iclass 32, count 0 2006.230.01:12:31.51#ibcon#about to read 3, iclass 32, count 0 2006.230.01:12:31.53#ibcon#read 3, iclass 32, count 0 2006.230.01:12:31.53#ibcon#about to read 4, iclass 32, count 0 2006.230.01:12:31.53#ibcon#read 4, iclass 32, count 0 2006.230.01:12:31.53#ibcon#about to read 5, iclass 32, count 0 2006.230.01:12:31.53#ibcon#read 5, iclass 32, count 0 2006.230.01:12:31.53#ibcon#about to read 6, iclass 32, count 0 2006.230.01:12:31.53#ibcon#read 6, iclass 32, count 0 2006.230.01:12:31.53#ibcon#end of sib2, iclass 32, count 0 2006.230.01:12:31.53#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:12:31.53#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:12:31.53#ibcon#[25=USB\r\n] 2006.230.01:12:31.53#ibcon#*before write, iclass 32, count 0 2006.230.01:12:31.53#ibcon#enter sib2, iclass 32, count 0 2006.230.01:12:31.53#ibcon#flushed, iclass 32, count 0 2006.230.01:12:31.53#ibcon#about to write, iclass 32, count 0 2006.230.01:12:31.53#ibcon#wrote, iclass 32, count 0 2006.230.01:12:31.53#ibcon#about to read 3, iclass 32, count 0 2006.230.01:12:31.56#ibcon#read 3, iclass 32, count 0 2006.230.01:12:31.56#ibcon#about to read 4, iclass 32, count 0 2006.230.01:12:31.56#ibcon#read 4, iclass 32, count 0 2006.230.01:12:31.56#ibcon#about to read 5, iclass 32, count 0 2006.230.01:12:31.56#ibcon#read 5, iclass 32, count 0 2006.230.01:12:31.56#ibcon#about to read 6, iclass 32, count 0 2006.230.01:12:31.56#ibcon#read 6, iclass 32, count 0 2006.230.01:12:31.56#ibcon#end of sib2, iclass 32, count 0 2006.230.01:12:31.56#ibcon#*after write, iclass 32, count 0 2006.230.01:12:31.56#ibcon#*before return 0, iclass 32, count 0 2006.230.01:12:31.56#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:31.56#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:31.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:12:31.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:12:31.56$vck44/valo=8,884.99 2006.230.01:12:31.56#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:12:31.56#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:12:31.56#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:31.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:31.56#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:31.56#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:31.56#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:12:31.56#ibcon#first serial, iclass 34, count 0 2006.230.01:12:31.56#ibcon#enter sib2, iclass 34, count 0 2006.230.01:12:31.56#ibcon#flushed, iclass 34, count 0 2006.230.01:12:31.56#ibcon#about to write, iclass 34, count 0 2006.230.01:12:31.56#ibcon#wrote, iclass 34, count 0 2006.230.01:12:31.56#ibcon#about to read 3, iclass 34, count 0 2006.230.01:12:31.58#ibcon#read 3, iclass 34, count 0 2006.230.01:12:31.58#ibcon#about to read 4, iclass 34, count 0 2006.230.01:12:31.58#ibcon#read 4, iclass 34, count 0 2006.230.01:12:31.58#ibcon#about to read 5, iclass 34, count 0 2006.230.01:12:31.58#ibcon#read 5, iclass 34, count 0 2006.230.01:12:31.58#ibcon#about to read 6, iclass 34, count 0 2006.230.01:12:31.58#ibcon#read 6, iclass 34, count 0 2006.230.01:12:31.58#ibcon#end of sib2, iclass 34, count 0 2006.230.01:12:31.58#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:12:31.58#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:12:31.58#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:12:31.58#ibcon#*before write, iclass 34, count 0 2006.230.01:12:31.58#ibcon#enter sib2, iclass 34, count 0 2006.230.01:12:31.58#ibcon#flushed, iclass 34, count 0 2006.230.01:12:31.58#ibcon#about to write, iclass 34, count 0 2006.230.01:12:31.58#ibcon#wrote, iclass 34, count 0 2006.230.01:12:31.58#ibcon#about to read 3, iclass 34, count 0 2006.230.01:12:31.62#ibcon#read 3, iclass 34, count 0 2006.230.01:12:31.62#ibcon#about to read 4, iclass 34, count 0 2006.230.01:12:31.62#ibcon#read 4, iclass 34, count 0 2006.230.01:12:31.62#ibcon#about to read 5, iclass 34, count 0 2006.230.01:12:31.62#ibcon#read 5, iclass 34, count 0 2006.230.01:12:31.62#ibcon#about to read 6, iclass 34, count 0 2006.230.01:12:31.62#ibcon#read 6, iclass 34, count 0 2006.230.01:12:31.62#ibcon#end of sib2, iclass 34, count 0 2006.230.01:12:31.62#ibcon#*after write, iclass 34, count 0 2006.230.01:12:31.62#ibcon#*before return 0, iclass 34, count 0 2006.230.01:12:31.62#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:31.62#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:31.62#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:12:31.62#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:12:31.62$vck44/va=8,6 2006.230.01:12:31.62#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.01:12:31.62#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.01:12:31.62#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:31.62#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:31.68#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:31.68#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:31.68#ibcon#enter wrdev, iclass 36, count 2 2006.230.01:12:31.68#ibcon#first serial, iclass 36, count 2 2006.230.01:12:31.68#ibcon#enter sib2, iclass 36, count 2 2006.230.01:12:31.68#ibcon#flushed, iclass 36, count 2 2006.230.01:12:31.68#ibcon#about to write, iclass 36, count 2 2006.230.01:12:31.68#ibcon#wrote, iclass 36, count 2 2006.230.01:12:31.68#ibcon#about to read 3, iclass 36, count 2 2006.230.01:12:31.70#ibcon#read 3, iclass 36, count 2 2006.230.01:12:31.70#ibcon#about to read 4, iclass 36, count 2 2006.230.01:12:31.70#ibcon#read 4, iclass 36, count 2 2006.230.01:12:31.70#ibcon#about to read 5, iclass 36, count 2 2006.230.01:12:31.70#ibcon#read 5, iclass 36, count 2 2006.230.01:12:31.70#ibcon#about to read 6, iclass 36, count 2 2006.230.01:12:31.70#ibcon#read 6, iclass 36, count 2 2006.230.01:12:31.70#ibcon#end of sib2, iclass 36, count 2 2006.230.01:12:31.70#ibcon#*mode == 0, iclass 36, count 2 2006.230.01:12:31.70#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.01:12:31.70#ibcon#[25=AT08-06\r\n] 2006.230.01:12:31.70#ibcon#*before write, iclass 36, count 2 2006.230.01:12:31.70#ibcon#enter sib2, iclass 36, count 2 2006.230.01:12:31.70#ibcon#flushed, iclass 36, count 2 2006.230.01:12:31.70#ibcon#about to write, iclass 36, count 2 2006.230.01:12:31.70#ibcon#wrote, iclass 36, count 2 2006.230.01:12:31.70#ibcon#about to read 3, iclass 36, count 2 2006.230.01:12:31.73#ibcon#read 3, iclass 36, count 2 2006.230.01:12:31.73#ibcon#about to read 4, iclass 36, count 2 2006.230.01:12:31.73#ibcon#read 4, iclass 36, count 2 2006.230.01:12:31.73#ibcon#about to read 5, iclass 36, count 2 2006.230.01:12:31.73#ibcon#read 5, iclass 36, count 2 2006.230.01:12:31.73#ibcon#about to read 6, iclass 36, count 2 2006.230.01:12:31.73#ibcon#read 6, iclass 36, count 2 2006.230.01:12:31.73#ibcon#end of sib2, iclass 36, count 2 2006.230.01:12:31.73#ibcon#*after write, iclass 36, count 2 2006.230.01:12:31.73#ibcon#*before return 0, iclass 36, count 2 2006.230.01:12:31.73#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:31.73#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:31.73#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.01:12:31.73#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:31.73#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:31.85#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:31.85#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:31.85#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:12:31.85#ibcon#first serial, iclass 36, count 0 2006.230.01:12:31.85#ibcon#enter sib2, iclass 36, count 0 2006.230.01:12:31.85#ibcon#flushed, iclass 36, count 0 2006.230.01:12:31.85#ibcon#about to write, iclass 36, count 0 2006.230.01:12:31.85#ibcon#wrote, iclass 36, count 0 2006.230.01:12:31.85#ibcon#about to read 3, iclass 36, count 0 2006.230.01:12:31.87#ibcon#read 3, iclass 36, count 0 2006.230.01:12:31.87#ibcon#about to read 4, iclass 36, count 0 2006.230.01:12:31.87#ibcon#read 4, iclass 36, count 0 2006.230.01:12:31.87#ibcon#about to read 5, iclass 36, count 0 2006.230.01:12:31.87#ibcon#read 5, iclass 36, count 0 2006.230.01:12:31.87#ibcon#about to read 6, iclass 36, count 0 2006.230.01:12:31.87#ibcon#read 6, iclass 36, count 0 2006.230.01:12:31.87#ibcon#end of sib2, iclass 36, count 0 2006.230.01:12:31.87#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:12:31.87#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:12:31.87#ibcon#[25=USB\r\n] 2006.230.01:12:31.87#ibcon#*before write, iclass 36, count 0 2006.230.01:12:31.87#ibcon#enter sib2, iclass 36, count 0 2006.230.01:12:31.87#ibcon#flushed, iclass 36, count 0 2006.230.01:12:31.87#ibcon#about to write, iclass 36, count 0 2006.230.01:12:31.87#ibcon#wrote, iclass 36, count 0 2006.230.01:12:31.87#ibcon#about to read 3, iclass 36, count 0 2006.230.01:12:31.90#ibcon#read 3, iclass 36, count 0 2006.230.01:12:31.90#ibcon#about to read 4, iclass 36, count 0 2006.230.01:12:31.90#ibcon#read 4, iclass 36, count 0 2006.230.01:12:31.90#ibcon#about to read 5, iclass 36, count 0 2006.230.01:12:31.90#ibcon#read 5, iclass 36, count 0 2006.230.01:12:31.90#ibcon#about to read 6, iclass 36, count 0 2006.230.01:12:31.90#ibcon#read 6, iclass 36, count 0 2006.230.01:12:31.90#ibcon#end of sib2, iclass 36, count 0 2006.230.01:12:31.90#ibcon#*after write, iclass 36, count 0 2006.230.01:12:31.90#ibcon#*before return 0, iclass 36, count 0 2006.230.01:12:31.90#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:31.90#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:31.90#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:12:31.90#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:12:31.90$vck44/vblo=1,629.99 2006.230.01:12:31.90#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.01:12:31.90#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.01:12:31.90#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:31.90#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:31.90#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:31.90#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:31.90#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:12:31.90#ibcon#first serial, iclass 38, count 0 2006.230.01:12:31.90#ibcon#enter sib2, iclass 38, count 0 2006.230.01:12:31.90#ibcon#flushed, iclass 38, count 0 2006.230.01:12:31.90#ibcon#about to write, iclass 38, count 0 2006.230.01:12:31.90#ibcon#wrote, iclass 38, count 0 2006.230.01:12:31.90#ibcon#about to read 3, iclass 38, count 0 2006.230.01:12:31.92#ibcon#read 3, iclass 38, count 0 2006.230.01:12:31.92#ibcon#about to read 4, iclass 38, count 0 2006.230.01:12:31.92#ibcon#read 4, iclass 38, count 0 2006.230.01:12:31.92#ibcon#about to read 5, iclass 38, count 0 2006.230.01:12:31.92#ibcon#read 5, iclass 38, count 0 2006.230.01:12:31.92#ibcon#about to read 6, iclass 38, count 0 2006.230.01:12:31.92#ibcon#read 6, iclass 38, count 0 2006.230.01:12:31.92#ibcon#end of sib2, iclass 38, count 0 2006.230.01:12:31.92#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:12:31.92#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:12:31.92#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:12:31.92#ibcon#*before write, iclass 38, count 0 2006.230.01:12:31.92#ibcon#enter sib2, iclass 38, count 0 2006.230.01:12:31.92#ibcon#flushed, iclass 38, count 0 2006.230.01:12:31.92#ibcon#about to write, iclass 38, count 0 2006.230.01:12:31.92#ibcon#wrote, iclass 38, count 0 2006.230.01:12:31.92#ibcon#about to read 3, iclass 38, count 0 2006.230.01:12:31.96#ibcon#read 3, iclass 38, count 0 2006.230.01:12:31.96#ibcon#about to read 4, iclass 38, count 0 2006.230.01:12:31.96#ibcon#read 4, iclass 38, count 0 2006.230.01:12:31.96#ibcon#about to read 5, iclass 38, count 0 2006.230.01:12:31.96#ibcon#read 5, iclass 38, count 0 2006.230.01:12:31.96#ibcon#about to read 6, iclass 38, count 0 2006.230.01:12:31.96#ibcon#read 6, iclass 38, count 0 2006.230.01:12:31.96#ibcon#end of sib2, iclass 38, count 0 2006.230.01:12:31.96#ibcon#*after write, iclass 38, count 0 2006.230.01:12:31.96#ibcon#*before return 0, iclass 38, count 0 2006.230.01:12:31.96#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:31.96#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:31.96#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:12:31.96#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:12:31.96$vck44/vb=1,4 2006.230.01:12:31.96#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.01:12:31.96#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.01:12:31.96#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:31.96#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:12:31.96#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:12:31.96#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:12:31.96#ibcon#enter wrdev, iclass 40, count 2 2006.230.01:12:31.96#ibcon#first serial, iclass 40, count 2 2006.230.01:12:31.96#ibcon#enter sib2, iclass 40, count 2 2006.230.01:12:31.96#ibcon#flushed, iclass 40, count 2 2006.230.01:12:31.96#ibcon#about to write, iclass 40, count 2 2006.230.01:12:31.96#ibcon#wrote, iclass 40, count 2 2006.230.01:12:31.96#ibcon#about to read 3, iclass 40, count 2 2006.230.01:12:31.98#ibcon#read 3, iclass 40, count 2 2006.230.01:12:31.98#ibcon#about to read 4, iclass 40, count 2 2006.230.01:12:31.98#ibcon#read 4, iclass 40, count 2 2006.230.01:12:31.98#ibcon#about to read 5, iclass 40, count 2 2006.230.01:12:31.98#ibcon#read 5, iclass 40, count 2 2006.230.01:12:31.98#ibcon#about to read 6, iclass 40, count 2 2006.230.01:12:31.98#ibcon#read 6, iclass 40, count 2 2006.230.01:12:31.98#ibcon#end of sib2, iclass 40, count 2 2006.230.01:12:31.98#ibcon#*mode == 0, iclass 40, count 2 2006.230.01:12:31.98#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.01:12:31.98#ibcon#[27=AT01-04\r\n] 2006.230.01:12:31.98#ibcon#*before write, iclass 40, count 2 2006.230.01:12:31.98#ibcon#enter sib2, iclass 40, count 2 2006.230.01:12:31.98#ibcon#flushed, iclass 40, count 2 2006.230.01:12:31.98#ibcon#about to write, iclass 40, count 2 2006.230.01:12:31.98#ibcon#wrote, iclass 40, count 2 2006.230.01:12:31.98#ibcon#about to read 3, iclass 40, count 2 2006.230.01:12:32.01#ibcon#read 3, iclass 40, count 2 2006.230.01:12:32.01#ibcon#about to read 4, iclass 40, count 2 2006.230.01:12:32.01#ibcon#read 4, iclass 40, count 2 2006.230.01:12:32.01#ibcon#about to read 5, iclass 40, count 2 2006.230.01:12:32.01#ibcon#read 5, iclass 40, count 2 2006.230.01:12:32.01#ibcon#about to read 6, iclass 40, count 2 2006.230.01:12:32.01#ibcon#read 6, iclass 40, count 2 2006.230.01:12:32.01#ibcon#end of sib2, iclass 40, count 2 2006.230.01:12:32.01#ibcon#*after write, iclass 40, count 2 2006.230.01:12:32.01#ibcon#*before return 0, iclass 40, count 2 2006.230.01:12:32.01#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:12:32.01#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:12:32.01#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.01:12:32.01#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:32.01#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:12:32.13#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:12:32.13#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:12:32.13#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:12:32.13#ibcon#first serial, iclass 40, count 0 2006.230.01:12:32.13#ibcon#enter sib2, iclass 40, count 0 2006.230.01:12:32.13#ibcon#flushed, iclass 40, count 0 2006.230.01:12:32.13#ibcon#about to write, iclass 40, count 0 2006.230.01:12:32.13#ibcon#wrote, iclass 40, count 0 2006.230.01:12:32.13#ibcon#about to read 3, iclass 40, count 0 2006.230.01:12:32.15#ibcon#read 3, iclass 40, count 0 2006.230.01:12:32.15#ibcon#about to read 4, iclass 40, count 0 2006.230.01:12:32.15#ibcon#read 4, iclass 40, count 0 2006.230.01:12:32.15#ibcon#about to read 5, iclass 40, count 0 2006.230.01:12:32.15#ibcon#read 5, iclass 40, count 0 2006.230.01:12:32.15#ibcon#about to read 6, iclass 40, count 0 2006.230.01:12:32.15#ibcon#read 6, iclass 40, count 0 2006.230.01:12:32.15#ibcon#end of sib2, iclass 40, count 0 2006.230.01:12:32.15#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:12:32.15#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:12:32.15#ibcon#[27=USB\r\n] 2006.230.01:12:32.15#ibcon#*before write, iclass 40, count 0 2006.230.01:12:32.15#ibcon#enter sib2, iclass 40, count 0 2006.230.01:12:32.15#ibcon#flushed, iclass 40, count 0 2006.230.01:12:32.15#ibcon#about to write, iclass 40, count 0 2006.230.01:12:32.15#ibcon#wrote, iclass 40, count 0 2006.230.01:12:32.15#ibcon#about to read 3, iclass 40, count 0 2006.230.01:12:32.18#ibcon#read 3, iclass 40, count 0 2006.230.01:12:32.18#ibcon#about to read 4, iclass 40, count 0 2006.230.01:12:32.18#ibcon#read 4, iclass 40, count 0 2006.230.01:12:32.18#ibcon#about to read 5, iclass 40, count 0 2006.230.01:12:32.18#ibcon#read 5, iclass 40, count 0 2006.230.01:12:32.18#ibcon#about to read 6, iclass 40, count 0 2006.230.01:12:32.18#ibcon#read 6, iclass 40, count 0 2006.230.01:12:32.18#ibcon#end of sib2, iclass 40, count 0 2006.230.01:12:32.18#ibcon#*after write, iclass 40, count 0 2006.230.01:12:32.18#ibcon#*before return 0, iclass 40, count 0 2006.230.01:12:32.18#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:12:32.18#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:12:32.18#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:12:32.18#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:12:32.18$vck44/vblo=2,634.99 2006.230.01:12:32.18#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.01:12:32.18#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.01:12:32.18#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:32.18#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:32.18#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:32.18#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:32.18#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:12:32.18#ibcon#first serial, iclass 4, count 0 2006.230.01:12:32.18#ibcon#enter sib2, iclass 4, count 0 2006.230.01:12:32.18#ibcon#flushed, iclass 4, count 0 2006.230.01:12:32.18#ibcon#about to write, iclass 4, count 0 2006.230.01:12:32.18#ibcon#wrote, iclass 4, count 0 2006.230.01:12:32.18#ibcon#about to read 3, iclass 4, count 0 2006.230.01:12:32.20#ibcon#read 3, iclass 4, count 0 2006.230.01:12:32.20#ibcon#about to read 4, iclass 4, count 0 2006.230.01:12:32.20#ibcon#read 4, iclass 4, count 0 2006.230.01:12:32.20#ibcon#about to read 5, iclass 4, count 0 2006.230.01:12:32.20#ibcon#read 5, iclass 4, count 0 2006.230.01:12:32.20#ibcon#about to read 6, iclass 4, count 0 2006.230.01:12:32.20#ibcon#read 6, iclass 4, count 0 2006.230.01:12:32.20#ibcon#end of sib2, iclass 4, count 0 2006.230.01:12:32.20#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:12:32.20#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:12:32.20#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:12:32.20#ibcon#*before write, iclass 4, count 0 2006.230.01:12:32.20#ibcon#enter sib2, iclass 4, count 0 2006.230.01:12:32.20#ibcon#flushed, iclass 4, count 0 2006.230.01:12:32.20#ibcon#about to write, iclass 4, count 0 2006.230.01:12:32.20#ibcon#wrote, iclass 4, count 0 2006.230.01:12:32.20#ibcon#about to read 3, iclass 4, count 0 2006.230.01:12:32.24#ibcon#read 3, iclass 4, count 0 2006.230.01:12:32.24#ibcon#about to read 4, iclass 4, count 0 2006.230.01:12:32.24#ibcon#read 4, iclass 4, count 0 2006.230.01:12:32.24#ibcon#about to read 5, iclass 4, count 0 2006.230.01:12:32.24#ibcon#read 5, iclass 4, count 0 2006.230.01:12:32.24#ibcon#about to read 6, iclass 4, count 0 2006.230.01:12:32.24#ibcon#read 6, iclass 4, count 0 2006.230.01:12:32.24#ibcon#end of sib2, iclass 4, count 0 2006.230.01:12:32.24#ibcon#*after write, iclass 4, count 0 2006.230.01:12:32.24#ibcon#*before return 0, iclass 4, count 0 2006.230.01:12:32.24#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:32.24#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:12:32.24#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:12:32.24#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:12:32.24$vck44/vb=2,4 2006.230.01:12:32.24#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.01:12:32.24#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.01:12:32.24#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:32.24#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:12:32.25#abcon#<5=/08 2.5 7.4 32.49 721002.7\r\n> 2006.230.01:12:32.27#abcon#{5=INTERFACE CLEAR} 2006.230.01:12:32.30#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:12:32.30#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:12:32.30#ibcon#enter wrdev, iclass 7, count 2 2006.230.01:12:32.30#ibcon#first serial, iclass 7, count 2 2006.230.01:12:32.30#ibcon#enter sib2, iclass 7, count 2 2006.230.01:12:32.30#ibcon#flushed, iclass 7, count 2 2006.230.01:12:32.30#ibcon#about to write, iclass 7, count 2 2006.230.01:12:32.30#ibcon#wrote, iclass 7, count 2 2006.230.01:12:32.30#ibcon#about to read 3, iclass 7, count 2 2006.230.01:12:32.32#ibcon#read 3, iclass 7, count 2 2006.230.01:12:32.32#ibcon#about to read 4, iclass 7, count 2 2006.230.01:12:32.32#ibcon#read 4, iclass 7, count 2 2006.230.01:12:32.32#ibcon#about to read 5, iclass 7, count 2 2006.230.01:12:32.32#ibcon#read 5, iclass 7, count 2 2006.230.01:12:32.32#ibcon#about to read 6, iclass 7, count 2 2006.230.01:12:32.32#ibcon#read 6, iclass 7, count 2 2006.230.01:12:32.32#ibcon#end of sib2, iclass 7, count 2 2006.230.01:12:32.32#ibcon#*mode == 0, iclass 7, count 2 2006.230.01:12:32.32#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.01:12:32.32#ibcon#[27=AT02-04\r\n] 2006.230.01:12:32.32#ibcon#*before write, iclass 7, count 2 2006.230.01:12:32.32#ibcon#enter sib2, iclass 7, count 2 2006.230.01:12:32.32#ibcon#flushed, iclass 7, count 2 2006.230.01:12:32.32#ibcon#about to write, iclass 7, count 2 2006.230.01:12:32.32#ibcon#wrote, iclass 7, count 2 2006.230.01:12:32.32#ibcon#about to read 3, iclass 7, count 2 2006.230.01:12:32.33#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:12:32.35#ibcon#read 3, iclass 7, count 2 2006.230.01:12:32.35#ibcon#about to read 4, iclass 7, count 2 2006.230.01:12:32.35#ibcon#read 4, iclass 7, count 2 2006.230.01:12:32.35#ibcon#about to read 5, iclass 7, count 2 2006.230.01:12:32.35#ibcon#read 5, iclass 7, count 2 2006.230.01:12:32.35#ibcon#about to read 6, iclass 7, count 2 2006.230.01:12:32.35#ibcon#read 6, iclass 7, count 2 2006.230.01:12:32.35#ibcon#end of sib2, iclass 7, count 2 2006.230.01:12:32.35#ibcon#*after write, iclass 7, count 2 2006.230.01:12:32.35#ibcon#*before return 0, iclass 7, count 2 2006.230.01:12:32.35#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:12:32.35#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:12:32.35#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.01:12:32.35#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:32.35#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:12:32.47#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:12:32.47#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:12:32.47#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:12:32.47#ibcon#first serial, iclass 7, count 0 2006.230.01:12:32.47#ibcon#enter sib2, iclass 7, count 0 2006.230.01:12:32.47#ibcon#flushed, iclass 7, count 0 2006.230.01:12:32.47#ibcon#about to write, iclass 7, count 0 2006.230.01:12:32.47#ibcon#wrote, iclass 7, count 0 2006.230.01:12:32.47#ibcon#about to read 3, iclass 7, count 0 2006.230.01:12:32.49#ibcon#read 3, iclass 7, count 0 2006.230.01:12:32.49#ibcon#about to read 4, iclass 7, count 0 2006.230.01:12:32.49#ibcon#read 4, iclass 7, count 0 2006.230.01:12:32.49#ibcon#about to read 5, iclass 7, count 0 2006.230.01:12:32.49#ibcon#read 5, iclass 7, count 0 2006.230.01:12:32.49#ibcon#about to read 6, iclass 7, count 0 2006.230.01:12:32.49#ibcon#read 6, iclass 7, count 0 2006.230.01:12:32.49#ibcon#end of sib2, iclass 7, count 0 2006.230.01:12:32.49#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:12:32.49#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:12:32.49#ibcon#[27=USB\r\n] 2006.230.01:12:32.49#ibcon#*before write, iclass 7, count 0 2006.230.01:12:32.49#ibcon#enter sib2, iclass 7, count 0 2006.230.01:12:32.49#ibcon#flushed, iclass 7, count 0 2006.230.01:12:32.49#ibcon#about to write, iclass 7, count 0 2006.230.01:12:32.49#ibcon#wrote, iclass 7, count 0 2006.230.01:12:32.49#ibcon#about to read 3, iclass 7, count 0 2006.230.01:12:32.52#ibcon#read 3, iclass 7, count 0 2006.230.01:12:32.52#ibcon#about to read 4, iclass 7, count 0 2006.230.01:12:32.52#ibcon#read 4, iclass 7, count 0 2006.230.01:12:32.52#ibcon#about to read 5, iclass 7, count 0 2006.230.01:12:32.52#ibcon#read 5, iclass 7, count 0 2006.230.01:12:32.52#ibcon#about to read 6, iclass 7, count 0 2006.230.01:12:32.52#ibcon#read 6, iclass 7, count 0 2006.230.01:12:32.52#ibcon#end of sib2, iclass 7, count 0 2006.230.01:12:32.52#ibcon#*after write, iclass 7, count 0 2006.230.01:12:32.52#ibcon#*before return 0, iclass 7, count 0 2006.230.01:12:32.52#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:12:32.52#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:12:32.52#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:12:32.52#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:12:32.52$vck44/vblo=3,649.99 2006.230.01:12:32.52#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:12:32.52#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:12:32.52#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:32.52#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:32.52#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:32.52#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:32.52#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:12:32.52#ibcon#first serial, iclass 14, count 0 2006.230.01:12:32.52#ibcon#enter sib2, iclass 14, count 0 2006.230.01:12:32.52#ibcon#flushed, iclass 14, count 0 2006.230.01:12:32.52#ibcon#about to write, iclass 14, count 0 2006.230.01:12:32.52#ibcon#wrote, iclass 14, count 0 2006.230.01:12:32.52#ibcon#about to read 3, iclass 14, count 0 2006.230.01:12:32.54#ibcon#read 3, iclass 14, count 0 2006.230.01:12:32.54#ibcon#about to read 4, iclass 14, count 0 2006.230.01:12:32.54#ibcon#read 4, iclass 14, count 0 2006.230.01:12:32.54#ibcon#about to read 5, iclass 14, count 0 2006.230.01:12:32.54#ibcon#read 5, iclass 14, count 0 2006.230.01:12:32.54#ibcon#about to read 6, iclass 14, count 0 2006.230.01:12:32.54#ibcon#read 6, iclass 14, count 0 2006.230.01:12:32.54#ibcon#end of sib2, iclass 14, count 0 2006.230.01:12:32.54#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:12:32.54#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:12:32.54#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:12:32.54#ibcon#*before write, iclass 14, count 0 2006.230.01:12:32.54#ibcon#enter sib2, iclass 14, count 0 2006.230.01:12:32.54#ibcon#flushed, iclass 14, count 0 2006.230.01:12:32.54#ibcon#about to write, iclass 14, count 0 2006.230.01:12:32.54#ibcon#wrote, iclass 14, count 0 2006.230.01:12:32.54#ibcon#about to read 3, iclass 14, count 0 2006.230.01:12:32.58#ibcon#read 3, iclass 14, count 0 2006.230.01:12:32.58#ibcon#about to read 4, iclass 14, count 0 2006.230.01:12:32.58#ibcon#read 4, iclass 14, count 0 2006.230.01:12:32.58#ibcon#about to read 5, iclass 14, count 0 2006.230.01:12:32.58#ibcon#read 5, iclass 14, count 0 2006.230.01:12:32.58#ibcon#about to read 6, iclass 14, count 0 2006.230.01:12:32.58#ibcon#read 6, iclass 14, count 0 2006.230.01:12:32.58#ibcon#end of sib2, iclass 14, count 0 2006.230.01:12:32.58#ibcon#*after write, iclass 14, count 0 2006.230.01:12:32.58#ibcon#*before return 0, iclass 14, count 0 2006.230.01:12:32.58#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:32.58#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:12:32.58#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:12:32.58#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:12:32.58$vck44/vb=3,4 2006.230.01:12:32.58#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.01:12:32.58#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.01:12:32.58#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:32.58#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:32.64#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:32.64#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:32.64#ibcon#enter wrdev, iclass 16, count 2 2006.230.01:12:32.64#ibcon#first serial, iclass 16, count 2 2006.230.01:12:32.64#ibcon#enter sib2, iclass 16, count 2 2006.230.01:12:32.64#ibcon#flushed, iclass 16, count 2 2006.230.01:12:32.64#ibcon#about to write, iclass 16, count 2 2006.230.01:12:32.64#ibcon#wrote, iclass 16, count 2 2006.230.01:12:32.64#ibcon#about to read 3, iclass 16, count 2 2006.230.01:12:32.66#ibcon#read 3, iclass 16, count 2 2006.230.01:12:32.66#ibcon#about to read 4, iclass 16, count 2 2006.230.01:12:32.66#ibcon#read 4, iclass 16, count 2 2006.230.01:12:32.66#ibcon#about to read 5, iclass 16, count 2 2006.230.01:12:32.66#ibcon#read 5, iclass 16, count 2 2006.230.01:12:32.66#ibcon#about to read 6, iclass 16, count 2 2006.230.01:12:32.66#ibcon#read 6, iclass 16, count 2 2006.230.01:12:32.66#ibcon#end of sib2, iclass 16, count 2 2006.230.01:12:32.66#ibcon#*mode == 0, iclass 16, count 2 2006.230.01:12:32.66#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.01:12:32.66#ibcon#[27=AT03-04\r\n] 2006.230.01:12:32.66#ibcon#*before write, iclass 16, count 2 2006.230.01:12:32.66#ibcon#enter sib2, iclass 16, count 2 2006.230.01:12:32.66#ibcon#flushed, iclass 16, count 2 2006.230.01:12:32.66#ibcon#about to write, iclass 16, count 2 2006.230.01:12:32.66#ibcon#wrote, iclass 16, count 2 2006.230.01:12:32.66#ibcon#about to read 3, iclass 16, count 2 2006.230.01:12:32.69#ibcon#read 3, iclass 16, count 2 2006.230.01:12:32.69#ibcon#about to read 4, iclass 16, count 2 2006.230.01:12:32.69#ibcon#read 4, iclass 16, count 2 2006.230.01:12:32.69#ibcon#about to read 5, iclass 16, count 2 2006.230.01:12:32.69#ibcon#read 5, iclass 16, count 2 2006.230.01:12:32.69#ibcon#about to read 6, iclass 16, count 2 2006.230.01:12:32.69#ibcon#read 6, iclass 16, count 2 2006.230.01:12:32.69#ibcon#end of sib2, iclass 16, count 2 2006.230.01:12:32.69#ibcon#*after write, iclass 16, count 2 2006.230.01:12:32.69#ibcon#*before return 0, iclass 16, count 2 2006.230.01:12:32.69#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:32.69#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:12:32.69#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.01:12:32.69#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:32.69#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:32.81#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:32.81#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:32.81#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:12:32.81#ibcon#first serial, iclass 16, count 0 2006.230.01:12:32.81#ibcon#enter sib2, iclass 16, count 0 2006.230.01:12:32.81#ibcon#flushed, iclass 16, count 0 2006.230.01:12:32.81#ibcon#about to write, iclass 16, count 0 2006.230.01:12:32.81#ibcon#wrote, iclass 16, count 0 2006.230.01:12:32.81#ibcon#about to read 3, iclass 16, count 0 2006.230.01:12:32.83#ibcon#read 3, iclass 16, count 0 2006.230.01:12:32.83#ibcon#about to read 4, iclass 16, count 0 2006.230.01:12:32.83#ibcon#read 4, iclass 16, count 0 2006.230.01:12:32.83#ibcon#about to read 5, iclass 16, count 0 2006.230.01:12:32.83#ibcon#read 5, iclass 16, count 0 2006.230.01:12:32.83#ibcon#about to read 6, iclass 16, count 0 2006.230.01:12:32.83#ibcon#read 6, iclass 16, count 0 2006.230.01:12:32.83#ibcon#end of sib2, iclass 16, count 0 2006.230.01:12:32.83#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:12:32.83#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:12:32.83#ibcon#[27=USB\r\n] 2006.230.01:12:32.83#ibcon#*before write, iclass 16, count 0 2006.230.01:12:32.83#ibcon#enter sib2, iclass 16, count 0 2006.230.01:12:32.83#ibcon#flushed, iclass 16, count 0 2006.230.01:12:32.83#ibcon#about to write, iclass 16, count 0 2006.230.01:12:32.83#ibcon#wrote, iclass 16, count 0 2006.230.01:12:32.83#ibcon#about to read 3, iclass 16, count 0 2006.230.01:12:32.86#ibcon#read 3, iclass 16, count 0 2006.230.01:12:32.86#ibcon#about to read 4, iclass 16, count 0 2006.230.01:12:32.86#ibcon#read 4, iclass 16, count 0 2006.230.01:12:32.86#ibcon#about to read 5, iclass 16, count 0 2006.230.01:12:32.86#ibcon#read 5, iclass 16, count 0 2006.230.01:12:32.86#ibcon#about to read 6, iclass 16, count 0 2006.230.01:12:32.86#ibcon#read 6, iclass 16, count 0 2006.230.01:12:32.86#ibcon#end of sib2, iclass 16, count 0 2006.230.01:12:32.86#ibcon#*after write, iclass 16, count 0 2006.230.01:12:32.86#ibcon#*before return 0, iclass 16, count 0 2006.230.01:12:32.86#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:32.86#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:12:32.86#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:12:32.86#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:12:32.86$vck44/vblo=4,679.99 2006.230.01:12:32.86#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:12:32.86#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:12:32.86#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:32.86#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:32.86#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:32.86#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:32.86#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:12:32.86#ibcon#first serial, iclass 18, count 0 2006.230.01:12:32.86#ibcon#enter sib2, iclass 18, count 0 2006.230.01:12:32.86#ibcon#flushed, iclass 18, count 0 2006.230.01:12:32.86#ibcon#about to write, iclass 18, count 0 2006.230.01:12:32.86#ibcon#wrote, iclass 18, count 0 2006.230.01:12:32.86#ibcon#about to read 3, iclass 18, count 0 2006.230.01:12:32.88#ibcon#read 3, iclass 18, count 0 2006.230.01:12:32.88#ibcon#about to read 4, iclass 18, count 0 2006.230.01:12:32.88#ibcon#read 4, iclass 18, count 0 2006.230.01:12:32.88#ibcon#about to read 5, iclass 18, count 0 2006.230.01:12:32.88#ibcon#read 5, iclass 18, count 0 2006.230.01:12:32.88#ibcon#about to read 6, iclass 18, count 0 2006.230.01:12:32.88#ibcon#read 6, iclass 18, count 0 2006.230.01:12:32.88#ibcon#end of sib2, iclass 18, count 0 2006.230.01:12:32.88#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:12:32.88#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:12:32.88#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:12:32.88#ibcon#*before write, iclass 18, count 0 2006.230.01:12:32.88#ibcon#enter sib2, iclass 18, count 0 2006.230.01:12:32.88#ibcon#flushed, iclass 18, count 0 2006.230.01:12:32.88#ibcon#about to write, iclass 18, count 0 2006.230.01:12:32.88#ibcon#wrote, iclass 18, count 0 2006.230.01:12:32.88#ibcon#about to read 3, iclass 18, count 0 2006.230.01:12:32.92#ibcon#read 3, iclass 18, count 0 2006.230.01:12:32.92#ibcon#about to read 4, iclass 18, count 0 2006.230.01:12:32.92#ibcon#read 4, iclass 18, count 0 2006.230.01:12:32.92#ibcon#about to read 5, iclass 18, count 0 2006.230.01:12:32.92#ibcon#read 5, iclass 18, count 0 2006.230.01:12:32.92#ibcon#about to read 6, iclass 18, count 0 2006.230.01:12:32.92#ibcon#read 6, iclass 18, count 0 2006.230.01:12:32.92#ibcon#end of sib2, iclass 18, count 0 2006.230.01:12:32.92#ibcon#*after write, iclass 18, count 0 2006.230.01:12:32.92#ibcon#*before return 0, iclass 18, count 0 2006.230.01:12:32.92#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:32.92#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:12:32.92#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:12:32.92#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:12:32.92$vck44/vb=4,4 2006.230.01:12:32.92#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.01:12:32.92#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.01:12:32.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:32.92#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:32.98#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:32.98#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:32.98#ibcon#enter wrdev, iclass 20, count 2 2006.230.01:12:32.98#ibcon#first serial, iclass 20, count 2 2006.230.01:12:32.98#ibcon#enter sib2, iclass 20, count 2 2006.230.01:12:32.98#ibcon#flushed, iclass 20, count 2 2006.230.01:12:32.98#ibcon#about to write, iclass 20, count 2 2006.230.01:12:32.98#ibcon#wrote, iclass 20, count 2 2006.230.01:12:32.98#ibcon#about to read 3, iclass 20, count 2 2006.230.01:12:33.00#ibcon#read 3, iclass 20, count 2 2006.230.01:12:33.00#ibcon#about to read 4, iclass 20, count 2 2006.230.01:12:33.00#ibcon#read 4, iclass 20, count 2 2006.230.01:12:33.00#ibcon#about to read 5, iclass 20, count 2 2006.230.01:12:33.00#ibcon#read 5, iclass 20, count 2 2006.230.01:12:33.00#ibcon#about to read 6, iclass 20, count 2 2006.230.01:12:33.00#ibcon#read 6, iclass 20, count 2 2006.230.01:12:33.00#ibcon#end of sib2, iclass 20, count 2 2006.230.01:12:33.00#ibcon#*mode == 0, iclass 20, count 2 2006.230.01:12:33.00#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.01:12:33.00#ibcon#[27=AT04-04\r\n] 2006.230.01:12:33.00#ibcon#*before write, iclass 20, count 2 2006.230.01:12:33.00#ibcon#enter sib2, iclass 20, count 2 2006.230.01:12:33.00#ibcon#flushed, iclass 20, count 2 2006.230.01:12:33.00#ibcon#about to write, iclass 20, count 2 2006.230.01:12:33.00#ibcon#wrote, iclass 20, count 2 2006.230.01:12:33.00#ibcon#about to read 3, iclass 20, count 2 2006.230.01:12:33.03#ibcon#read 3, iclass 20, count 2 2006.230.01:12:33.03#ibcon#about to read 4, iclass 20, count 2 2006.230.01:12:33.03#ibcon#read 4, iclass 20, count 2 2006.230.01:12:33.03#ibcon#about to read 5, iclass 20, count 2 2006.230.01:12:33.03#ibcon#read 5, iclass 20, count 2 2006.230.01:12:33.03#ibcon#about to read 6, iclass 20, count 2 2006.230.01:12:33.03#ibcon#read 6, iclass 20, count 2 2006.230.01:12:33.03#ibcon#end of sib2, iclass 20, count 2 2006.230.01:12:33.03#ibcon#*after write, iclass 20, count 2 2006.230.01:12:33.03#ibcon#*before return 0, iclass 20, count 2 2006.230.01:12:33.03#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:33.03#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:12:33.03#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.01:12:33.03#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:33.03#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:33.15#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:33.15#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:33.15#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:12:33.15#ibcon#first serial, iclass 20, count 0 2006.230.01:12:33.15#ibcon#enter sib2, iclass 20, count 0 2006.230.01:12:33.15#ibcon#flushed, iclass 20, count 0 2006.230.01:12:33.15#ibcon#about to write, iclass 20, count 0 2006.230.01:12:33.15#ibcon#wrote, iclass 20, count 0 2006.230.01:12:33.15#ibcon#about to read 3, iclass 20, count 0 2006.230.01:12:33.17#ibcon#read 3, iclass 20, count 0 2006.230.01:12:33.17#ibcon#about to read 4, iclass 20, count 0 2006.230.01:12:33.17#ibcon#read 4, iclass 20, count 0 2006.230.01:12:33.17#ibcon#about to read 5, iclass 20, count 0 2006.230.01:12:33.17#ibcon#read 5, iclass 20, count 0 2006.230.01:12:33.17#ibcon#about to read 6, iclass 20, count 0 2006.230.01:12:33.17#ibcon#read 6, iclass 20, count 0 2006.230.01:12:33.17#ibcon#end of sib2, iclass 20, count 0 2006.230.01:12:33.17#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:12:33.17#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:12:33.17#ibcon#[27=USB\r\n] 2006.230.01:12:33.17#ibcon#*before write, iclass 20, count 0 2006.230.01:12:33.17#ibcon#enter sib2, iclass 20, count 0 2006.230.01:12:33.17#ibcon#flushed, iclass 20, count 0 2006.230.01:12:33.17#ibcon#about to write, iclass 20, count 0 2006.230.01:12:33.17#ibcon#wrote, iclass 20, count 0 2006.230.01:12:33.17#ibcon#about to read 3, iclass 20, count 0 2006.230.01:12:33.20#ibcon#read 3, iclass 20, count 0 2006.230.01:12:33.20#ibcon#about to read 4, iclass 20, count 0 2006.230.01:12:33.20#ibcon#read 4, iclass 20, count 0 2006.230.01:12:33.20#ibcon#about to read 5, iclass 20, count 0 2006.230.01:12:33.20#ibcon#read 5, iclass 20, count 0 2006.230.01:12:33.20#ibcon#about to read 6, iclass 20, count 0 2006.230.01:12:33.20#ibcon#read 6, iclass 20, count 0 2006.230.01:12:33.20#ibcon#end of sib2, iclass 20, count 0 2006.230.01:12:33.20#ibcon#*after write, iclass 20, count 0 2006.230.01:12:33.20#ibcon#*before return 0, iclass 20, count 0 2006.230.01:12:33.20#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:33.20#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:12:33.20#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:12:33.20#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:12:33.20$vck44/vblo=5,709.99 2006.230.01:12:33.20#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.01:12:33.20#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.01:12:33.20#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:33.20#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:33.20#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:33.20#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:33.20#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:12:33.20#ibcon#first serial, iclass 22, count 0 2006.230.01:12:33.20#ibcon#enter sib2, iclass 22, count 0 2006.230.01:12:33.20#ibcon#flushed, iclass 22, count 0 2006.230.01:12:33.20#ibcon#about to write, iclass 22, count 0 2006.230.01:12:33.20#ibcon#wrote, iclass 22, count 0 2006.230.01:12:33.20#ibcon#about to read 3, iclass 22, count 0 2006.230.01:12:33.22#ibcon#read 3, iclass 22, count 0 2006.230.01:12:33.22#ibcon#about to read 4, iclass 22, count 0 2006.230.01:12:33.22#ibcon#read 4, iclass 22, count 0 2006.230.01:12:33.22#ibcon#about to read 5, iclass 22, count 0 2006.230.01:12:33.22#ibcon#read 5, iclass 22, count 0 2006.230.01:12:33.22#ibcon#about to read 6, iclass 22, count 0 2006.230.01:12:33.22#ibcon#read 6, iclass 22, count 0 2006.230.01:12:33.22#ibcon#end of sib2, iclass 22, count 0 2006.230.01:12:33.22#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:12:33.22#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:12:33.22#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:12:33.22#ibcon#*before write, iclass 22, count 0 2006.230.01:12:33.22#ibcon#enter sib2, iclass 22, count 0 2006.230.01:12:33.22#ibcon#flushed, iclass 22, count 0 2006.230.01:12:33.22#ibcon#about to write, iclass 22, count 0 2006.230.01:12:33.22#ibcon#wrote, iclass 22, count 0 2006.230.01:12:33.22#ibcon#about to read 3, iclass 22, count 0 2006.230.01:12:33.26#ibcon#read 3, iclass 22, count 0 2006.230.01:12:33.26#ibcon#about to read 4, iclass 22, count 0 2006.230.01:12:33.26#ibcon#read 4, iclass 22, count 0 2006.230.01:12:33.26#ibcon#about to read 5, iclass 22, count 0 2006.230.01:12:33.26#ibcon#read 5, iclass 22, count 0 2006.230.01:12:33.26#ibcon#about to read 6, iclass 22, count 0 2006.230.01:12:33.26#ibcon#read 6, iclass 22, count 0 2006.230.01:12:33.26#ibcon#end of sib2, iclass 22, count 0 2006.230.01:12:33.26#ibcon#*after write, iclass 22, count 0 2006.230.01:12:33.26#ibcon#*before return 0, iclass 22, count 0 2006.230.01:12:33.26#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:33.26#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:12:33.26#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:12:33.26#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:12:33.26$vck44/vb=5,4 2006.230.01:12:33.26#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.01:12:33.26#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.01:12:33.26#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:33.26#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:33.32#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:33.32#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:33.32#ibcon#enter wrdev, iclass 24, count 2 2006.230.01:12:33.32#ibcon#first serial, iclass 24, count 2 2006.230.01:12:33.32#ibcon#enter sib2, iclass 24, count 2 2006.230.01:12:33.32#ibcon#flushed, iclass 24, count 2 2006.230.01:12:33.32#ibcon#about to write, iclass 24, count 2 2006.230.01:12:33.32#ibcon#wrote, iclass 24, count 2 2006.230.01:12:33.32#ibcon#about to read 3, iclass 24, count 2 2006.230.01:12:33.34#ibcon#read 3, iclass 24, count 2 2006.230.01:12:33.34#ibcon#about to read 4, iclass 24, count 2 2006.230.01:12:33.34#ibcon#read 4, iclass 24, count 2 2006.230.01:12:33.34#ibcon#about to read 5, iclass 24, count 2 2006.230.01:12:33.34#ibcon#read 5, iclass 24, count 2 2006.230.01:12:33.34#ibcon#about to read 6, iclass 24, count 2 2006.230.01:12:33.34#ibcon#read 6, iclass 24, count 2 2006.230.01:12:33.34#ibcon#end of sib2, iclass 24, count 2 2006.230.01:12:33.34#ibcon#*mode == 0, iclass 24, count 2 2006.230.01:12:33.34#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.01:12:33.34#ibcon#[27=AT05-04\r\n] 2006.230.01:12:33.34#ibcon#*before write, iclass 24, count 2 2006.230.01:12:33.34#ibcon#enter sib2, iclass 24, count 2 2006.230.01:12:33.34#ibcon#flushed, iclass 24, count 2 2006.230.01:12:33.34#ibcon#about to write, iclass 24, count 2 2006.230.01:12:33.34#ibcon#wrote, iclass 24, count 2 2006.230.01:12:33.34#ibcon#about to read 3, iclass 24, count 2 2006.230.01:12:33.37#ibcon#read 3, iclass 24, count 2 2006.230.01:12:33.37#ibcon#about to read 4, iclass 24, count 2 2006.230.01:12:33.37#ibcon#read 4, iclass 24, count 2 2006.230.01:12:33.37#ibcon#about to read 5, iclass 24, count 2 2006.230.01:12:33.37#ibcon#read 5, iclass 24, count 2 2006.230.01:12:33.37#ibcon#about to read 6, iclass 24, count 2 2006.230.01:12:33.37#ibcon#read 6, iclass 24, count 2 2006.230.01:12:33.37#ibcon#end of sib2, iclass 24, count 2 2006.230.01:12:33.37#ibcon#*after write, iclass 24, count 2 2006.230.01:12:33.37#ibcon#*before return 0, iclass 24, count 2 2006.230.01:12:33.37#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:33.37#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:12:33.37#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.01:12:33.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:33.37#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:33.49#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:33.49#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:33.49#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:12:33.49#ibcon#first serial, iclass 24, count 0 2006.230.01:12:33.49#ibcon#enter sib2, iclass 24, count 0 2006.230.01:12:33.49#ibcon#flushed, iclass 24, count 0 2006.230.01:12:33.49#ibcon#about to write, iclass 24, count 0 2006.230.01:12:33.49#ibcon#wrote, iclass 24, count 0 2006.230.01:12:33.49#ibcon#about to read 3, iclass 24, count 0 2006.230.01:12:33.51#ibcon#read 3, iclass 24, count 0 2006.230.01:12:33.51#ibcon#about to read 4, iclass 24, count 0 2006.230.01:12:33.51#ibcon#read 4, iclass 24, count 0 2006.230.01:12:33.51#ibcon#about to read 5, iclass 24, count 0 2006.230.01:12:33.51#ibcon#read 5, iclass 24, count 0 2006.230.01:12:33.51#ibcon#about to read 6, iclass 24, count 0 2006.230.01:12:33.51#ibcon#read 6, iclass 24, count 0 2006.230.01:12:33.51#ibcon#end of sib2, iclass 24, count 0 2006.230.01:12:33.51#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:12:33.51#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:12:33.51#ibcon#[27=USB\r\n] 2006.230.01:12:33.51#ibcon#*before write, iclass 24, count 0 2006.230.01:12:33.51#ibcon#enter sib2, iclass 24, count 0 2006.230.01:12:33.51#ibcon#flushed, iclass 24, count 0 2006.230.01:12:33.51#ibcon#about to write, iclass 24, count 0 2006.230.01:12:33.51#ibcon#wrote, iclass 24, count 0 2006.230.01:12:33.51#ibcon#about to read 3, iclass 24, count 0 2006.230.01:12:33.54#ibcon#read 3, iclass 24, count 0 2006.230.01:12:33.54#ibcon#about to read 4, iclass 24, count 0 2006.230.01:12:33.54#ibcon#read 4, iclass 24, count 0 2006.230.01:12:33.54#ibcon#about to read 5, iclass 24, count 0 2006.230.01:12:33.54#ibcon#read 5, iclass 24, count 0 2006.230.01:12:33.54#ibcon#about to read 6, iclass 24, count 0 2006.230.01:12:33.54#ibcon#read 6, iclass 24, count 0 2006.230.01:12:33.54#ibcon#end of sib2, iclass 24, count 0 2006.230.01:12:33.54#ibcon#*after write, iclass 24, count 0 2006.230.01:12:33.54#ibcon#*before return 0, iclass 24, count 0 2006.230.01:12:33.54#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:33.54#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:12:33.54#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:12:33.54#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:12:33.54$vck44/vblo=6,719.99 2006.230.01:12:33.54#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.01:12:33.54#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.01:12:33.54#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:33.54#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:33.54#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:33.54#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:33.54#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:12:33.54#ibcon#first serial, iclass 26, count 0 2006.230.01:12:33.54#ibcon#enter sib2, iclass 26, count 0 2006.230.01:12:33.54#ibcon#flushed, iclass 26, count 0 2006.230.01:12:33.54#ibcon#about to write, iclass 26, count 0 2006.230.01:12:33.54#ibcon#wrote, iclass 26, count 0 2006.230.01:12:33.54#ibcon#about to read 3, iclass 26, count 0 2006.230.01:12:33.56#ibcon#read 3, iclass 26, count 0 2006.230.01:12:33.56#ibcon#about to read 4, iclass 26, count 0 2006.230.01:12:33.56#ibcon#read 4, iclass 26, count 0 2006.230.01:12:33.56#ibcon#about to read 5, iclass 26, count 0 2006.230.01:12:33.56#ibcon#read 5, iclass 26, count 0 2006.230.01:12:33.56#ibcon#about to read 6, iclass 26, count 0 2006.230.01:12:33.56#ibcon#read 6, iclass 26, count 0 2006.230.01:12:33.56#ibcon#end of sib2, iclass 26, count 0 2006.230.01:12:33.56#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:12:33.56#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:12:33.56#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:12:33.56#ibcon#*before write, iclass 26, count 0 2006.230.01:12:33.56#ibcon#enter sib2, iclass 26, count 0 2006.230.01:12:33.56#ibcon#flushed, iclass 26, count 0 2006.230.01:12:33.56#ibcon#about to write, iclass 26, count 0 2006.230.01:12:33.56#ibcon#wrote, iclass 26, count 0 2006.230.01:12:33.56#ibcon#about to read 3, iclass 26, count 0 2006.230.01:12:33.60#ibcon#read 3, iclass 26, count 0 2006.230.01:12:33.60#ibcon#about to read 4, iclass 26, count 0 2006.230.01:12:33.60#ibcon#read 4, iclass 26, count 0 2006.230.01:12:33.60#ibcon#about to read 5, iclass 26, count 0 2006.230.01:12:33.60#ibcon#read 5, iclass 26, count 0 2006.230.01:12:33.60#ibcon#about to read 6, iclass 26, count 0 2006.230.01:12:33.60#ibcon#read 6, iclass 26, count 0 2006.230.01:12:33.60#ibcon#end of sib2, iclass 26, count 0 2006.230.01:12:33.60#ibcon#*after write, iclass 26, count 0 2006.230.01:12:33.60#ibcon#*before return 0, iclass 26, count 0 2006.230.01:12:33.60#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:33.60#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:12:33.60#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:12:33.60#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:12:33.60$vck44/vb=6,4 2006.230.01:12:33.60#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.01:12:33.60#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.01:12:33.60#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:33.60#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:33.66#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:33.66#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:33.66#ibcon#enter wrdev, iclass 28, count 2 2006.230.01:12:33.66#ibcon#first serial, iclass 28, count 2 2006.230.01:12:33.66#ibcon#enter sib2, iclass 28, count 2 2006.230.01:12:33.66#ibcon#flushed, iclass 28, count 2 2006.230.01:12:33.66#ibcon#about to write, iclass 28, count 2 2006.230.01:12:33.66#ibcon#wrote, iclass 28, count 2 2006.230.01:12:33.66#ibcon#about to read 3, iclass 28, count 2 2006.230.01:12:33.68#ibcon#read 3, iclass 28, count 2 2006.230.01:12:33.68#ibcon#about to read 4, iclass 28, count 2 2006.230.01:12:33.68#ibcon#read 4, iclass 28, count 2 2006.230.01:12:33.68#ibcon#about to read 5, iclass 28, count 2 2006.230.01:12:33.68#ibcon#read 5, iclass 28, count 2 2006.230.01:12:33.68#ibcon#about to read 6, iclass 28, count 2 2006.230.01:12:33.68#ibcon#read 6, iclass 28, count 2 2006.230.01:12:33.68#ibcon#end of sib2, iclass 28, count 2 2006.230.01:12:33.68#ibcon#*mode == 0, iclass 28, count 2 2006.230.01:12:33.68#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.01:12:33.68#ibcon#[27=AT06-04\r\n] 2006.230.01:12:33.68#ibcon#*before write, iclass 28, count 2 2006.230.01:12:33.68#ibcon#enter sib2, iclass 28, count 2 2006.230.01:12:33.68#ibcon#flushed, iclass 28, count 2 2006.230.01:12:33.68#ibcon#about to write, iclass 28, count 2 2006.230.01:12:33.68#ibcon#wrote, iclass 28, count 2 2006.230.01:12:33.68#ibcon#about to read 3, iclass 28, count 2 2006.230.01:12:33.71#ibcon#read 3, iclass 28, count 2 2006.230.01:12:33.71#ibcon#about to read 4, iclass 28, count 2 2006.230.01:12:33.71#ibcon#read 4, iclass 28, count 2 2006.230.01:12:33.71#ibcon#about to read 5, iclass 28, count 2 2006.230.01:12:33.71#ibcon#read 5, iclass 28, count 2 2006.230.01:12:33.71#ibcon#about to read 6, iclass 28, count 2 2006.230.01:12:33.71#ibcon#read 6, iclass 28, count 2 2006.230.01:12:33.71#ibcon#end of sib2, iclass 28, count 2 2006.230.01:12:33.71#ibcon#*after write, iclass 28, count 2 2006.230.01:12:33.71#ibcon#*before return 0, iclass 28, count 2 2006.230.01:12:33.71#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:33.71#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:12:33.71#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.01:12:33.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:33.71#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:33.83#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:33.83#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:33.83#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:12:33.83#ibcon#first serial, iclass 28, count 0 2006.230.01:12:33.83#ibcon#enter sib2, iclass 28, count 0 2006.230.01:12:33.83#ibcon#flushed, iclass 28, count 0 2006.230.01:12:33.83#ibcon#about to write, iclass 28, count 0 2006.230.01:12:33.83#ibcon#wrote, iclass 28, count 0 2006.230.01:12:33.83#ibcon#about to read 3, iclass 28, count 0 2006.230.01:12:33.85#ibcon#read 3, iclass 28, count 0 2006.230.01:12:33.85#ibcon#about to read 4, iclass 28, count 0 2006.230.01:12:33.85#ibcon#read 4, iclass 28, count 0 2006.230.01:12:33.85#ibcon#about to read 5, iclass 28, count 0 2006.230.01:12:33.85#ibcon#read 5, iclass 28, count 0 2006.230.01:12:33.85#ibcon#about to read 6, iclass 28, count 0 2006.230.01:12:33.85#ibcon#read 6, iclass 28, count 0 2006.230.01:12:33.85#ibcon#end of sib2, iclass 28, count 0 2006.230.01:12:33.85#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:12:33.85#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:12:33.85#ibcon#[27=USB\r\n] 2006.230.01:12:33.85#ibcon#*before write, iclass 28, count 0 2006.230.01:12:33.85#ibcon#enter sib2, iclass 28, count 0 2006.230.01:12:33.85#ibcon#flushed, iclass 28, count 0 2006.230.01:12:33.85#ibcon#about to write, iclass 28, count 0 2006.230.01:12:33.85#ibcon#wrote, iclass 28, count 0 2006.230.01:12:33.85#ibcon#about to read 3, iclass 28, count 0 2006.230.01:12:33.88#ibcon#read 3, iclass 28, count 0 2006.230.01:12:33.88#ibcon#about to read 4, iclass 28, count 0 2006.230.01:12:33.88#ibcon#read 4, iclass 28, count 0 2006.230.01:12:33.88#ibcon#about to read 5, iclass 28, count 0 2006.230.01:12:33.88#ibcon#read 5, iclass 28, count 0 2006.230.01:12:33.88#ibcon#about to read 6, iclass 28, count 0 2006.230.01:12:33.88#ibcon#read 6, iclass 28, count 0 2006.230.01:12:33.88#ibcon#end of sib2, iclass 28, count 0 2006.230.01:12:33.88#ibcon#*after write, iclass 28, count 0 2006.230.01:12:33.88#ibcon#*before return 0, iclass 28, count 0 2006.230.01:12:33.88#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:33.88#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:12:33.88#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:12:33.88#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:12:33.88$vck44/vblo=7,734.99 2006.230.01:12:33.88#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.01:12:33.88#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.01:12:33.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:33.88#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:33.88#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:33.88#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:33.88#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:12:33.88#ibcon#first serial, iclass 30, count 0 2006.230.01:12:33.88#ibcon#enter sib2, iclass 30, count 0 2006.230.01:12:33.88#ibcon#flushed, iclass 30, count 0 2006.230.01:12:33.88#ibcon#about to write, iclass 30, count 0 2006.230.01:12:33.88#ibcon#wrote, iclass 30, count 0 2006.230.01:12:33.88#ibcon#about to read 3, iclass 30, count 0 2006.230.01:12:33.90#ibcon#read 3, iclass 30, count 0 2006.230.01:12:33.90#ibcon#about to read 4, iclass 30, count 0 2006.230.01:12:33.90#ibcon#read 4, iclass 30, count 0 2006.230.01:12:33.90#ibcon#about to read 5, iclass 30, count 0 2006.230.01:12:33.90#ibcon#read 5, iclass 30, count 0 2006.230.01:12:33.90#ibcon#about to read 6, iclass 30, count 0 2006.230.01:12:33.90#ibcon#read 6, iclass 30, count 0 2006.230.01:12:33.90#ibcon#end of sib2, iclass 30, count 0 2006.230.01:12:33.90#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:12:33.90#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:12:33.90#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:12:33.90#ibcon#*before write, iclass 30, count 0 2006.230.01:12:33.90#ibcon#enter sib2, iclass 30, count 0 2006.230.01:12:33.90#ibcon#flushed, iclass 30, count 0 2006.230.01:12:33.90#ibcon#about to write, iclass 30, count 0 2006.230.01:12:33.90#ibcon#wrote, iclass 30, count 0 2006.230.01:12:33.90#ibcon#about to read 3, iclass 30, count 0 2006.230.01:12:33.94#ibcon#read 3, iclass 30, count 0 2006.230.01:12:33.94#ibcon#about to read 4, iclass 30, count 0 2006.230.01:12:33.94#ibcon#read 4, iclass 30, count 0 2006.230.01:12:33.94#ibcon#about to read 5, iclass 30, count 0 2006.230.01:12:33.94#ibcon#read 5, iclass 30, count 0 2006.230.01:12:33.94#ibcon#about to read 6, iclass 30, count 0 2006.230.01:12:33.94#ibcon#read 6, iclass 30, count 0 2006.230.01:12:33.94#ibcon#end of sib2, iclass 30, count 0 2006.230.01:12:33.94#ibcon#*after write, iclass 30, count 0 2006.230.01:12:33.94#ibcon#*before return 0, iclass 30, count 0 2006.230.01:12:33.94#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:33.94#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:12:33.94#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:12:33.94#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:12:33.94$vck44/vb=7,4 2006.230.01:12:33.94#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.01:12:33.94#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.01:12:33.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:33.94#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:34.00#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:34.00#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:34.00#ibcon#enter wrdev, iclass 32, count 2 2006.230.01:12:34.00#ibcon#first serial, iclass 32, count 2 2006.230.01:12:34.00#ibcon#enter sib2, iclass 32, count 2 2006.230.01:12:34.00#ibcon#flushed, iclass 32, count 2 2006.230.01:12:34.00#ibcon#about to write, iclass 32, count 2 2006.230.01:12:34.00#ibcon#wrote, iclass 32, count 2 2006.230.01:12:34.00#ibcon#about to read 3, iclass 32, count 2 2006.230.01:12:34.02#ibcon#read 3, iclass 32, count 2 2006.230.01:12:34.02#ibcon#about to read 4, iclass 32, count 2 2006.230.01:12:34.02#ibcon#read 4, iclass 32, count 2 2006.230.01:12:34.02#ibcon#about to read 5, iclass 32, count 2 2006.230.01:12:34.02#ibcon#read 5, iclass 32, count 2 2006.230.01:12:34.02#ibcon#about to read 6, iclass 32, count 2 2006.230.01:12:34.02#ibcon#read 6, iclass 32, count 2 2006.230.01:12:34.02#ibcon#end of sib2, iclass 32, count 2 2006.230.01:12:34.02#ibcon#*mode == 0, iclass 32, count 2 2006.230.01:12:34.02#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.01:12:34.02#ibcon#[27=AT07-04\r\n] 2006.230.01:12:34.02#ibcon#*before write, iclass 32, count 2 2006.230.01:12:34.02#ibcon#enter sib2, iclass 32, count 2 2006.230.01:12:34.02#ibcon#flushed, iclass 32, count 2 2006.230.01:12:34.02#ibcon#about to write, iclass 32, count 2 2006.230.01:12:34.02#ibcon#wrote, iclass 32, count 2 2006.230.01:12:34.02#ibcon#about to read 3, iclass 32, count 2 2006.230.01:12:34.05#ibcon#read 3, iclass 32, count 2 2006.230.01:12:34.05#ibcon#about to read 4, iclass 32, count 2 2006.230.01:12:34.05#ibcon#read 4, iclass 32, count 2 2006.230.01:12:34.05#ibcon#about to read 5, iclass 32, count 2 2006.230.01:12:34.05#ibcon#read 5, iclass 32, count 2 2006.230.01:12:34.05#ibcon#about to read 6, iclass 32, count 2 2006.230.01:12:34.05#ibcon#read 6, iclass 32, count 2 2006.230.01:12:34.05#ibcon#end of sib2, iclass 32, count 2 2006.230.01:12:34.05#ibcon#*after write, iclass 32, count 2 2006.230.01:12:34.05#ibcon#*before return 0, iclass 32, count 2 2006.230.01:12:34.05#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:34.05#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:12:34.05#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.01:12:34.05#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:34.05#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:34.17#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:34.17#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:34.17#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:12:34.17#ibcon#first serial, iclass 32, count 0 2006.230.01:12:34.17#ibcon#enter sib2, iclass 32, count 0 2006.230.01:12:34.17#ibcon#flushed, iclass 32, count 0 2006.230.01:12:34.17#ibcon#about to write, iclass 32, count 0 2006.230.01:12:34.17#ibcon#wrote, iclass 32, count 0 2006.230.01:12:34.17#ibcon#about to read 3, iclass 32, count 0 2006.230.01:12:34.19#ibcon#read 3, iclass 32, count 0 2006.230.01:12:34.19#ibcon#about to read 4, iclass 32, count 0 2006.230.01:12:34.19#ibcon#read 4, iclass 32, count 0 2006.230.01:12:34.19#ibcon#about to read 5, iclass 32, count 0 2006.230.01:12:34.19#ibcon#read 5, iclass 32, count 0 2006.230.01:12:34.19#ibcon#about to read 6, iclass 32, count 0 2006.230.01:12:34.19#ibcon#read 6, iclass 32, count 0 2006.230.01:12:34.19#ibcon#end of sib2, iclass 32, count 0 2006.230.01:12:34.19#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:12:34.19#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:12:34.19#ibcon#[27=USB\r\n] 2006.230.01:12:34.19#ibcon#*before write, iclass 32, count 0 2006.230.01:12:34.19#ibcon#enter sib2, iclass 32, count 0 2006.230.01:12:34.19#ibcon#flushed, iclass 32, count 0 2006.230.01:12:34.19#ibcon#about to write, iclass 32, count 0 2006.230.01:12:34.19#ibcon#wrote, iclass 32, count 0 2006.230.01:12:34.19#ibcon#about to read 3, iclass 32, count 0 2006.230.01:12:34.22#ibcon#read 3, iclass 32, count 0 2006.230.01:12:34.22#ibcon#about to read 4, iclass 32, count 0 2006.230.01:12:34.22#ibcon#read 4, iclass 32, count 0 2006.230.01:12:34.22#ibcon#about to read 5, iclass 32, count 0 2006.230.01:12:34.22#ibcon#read 5, iclass 32, count 0 2006.230.01:12:34.22#ibcon#about to read 6, iclass 32, count 0 2006.230.01:12:34.22#ibcon#read 6, iclass 32, count 0 2006.230.01:12:34.22#ibcon#end of sib2, iclass 32, count 0 2006.230.01:12:34.22#ibcon#*after write, iclass 32, count 0 2006.230.01:12:34.22#ibcon#*before return 0, iclass 32, count 0 2006.230.01:12:34.22#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:34.22#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:12:34.22#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:12:34.22#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:12:34.22$vck44/vblo=8,744.99 2006.230.01:12:34.22#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:12:34.22#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:12:34.22#ibcon#ireg 17 cls_cnt 0 2006.230.01:12:34.22#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:34.22#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:34.22#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:34.22#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:12:34.22#ibcon#first serial, iclass 34, count 0 2006.230.01:12:34.22#ibcon#enter sib2, iclass 34, count 0 2006.230.01:12:34.22#ibcon#flushed, iclass 34, count 0 2006.230.01:12:34.22#ibcon#about to write, iclass 34, count 0 2006.230.01:12:34.22#ibcon#wrote, iclass 34, count 0 2006.230.01:12:34.22#ibcon#about to read 3, iclass 34, count 0 2006.230.01:12:34.24#ibcon#read 3, iclass 34, count 0 2006.230.01:12:34.24#ibcon#about to read 4, iclass 34, count 0 2006.230.01:12:34.24#ibcon#read 4, iclass 34, count 0 2006.230.01:12:34.24#ibcon#about to read 5, iclass 34, count 0 2006.230.01:12:34.24#ibcon#read 5, iclass 34, count 0 2006.230.01:12:34.24#ibcon#about to read 6, iclass 34, count 0 2006.230.01:12:34.24#ibcon#read 6, iclass 34, count 0 2006.230.01:12:34.24#ibcon#end of sib2, iclass 34, count 0 2006.230.01:12:34.24#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:12:34.24#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:12:34.24#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:12:34.24#ibcon#*before write, iclass 34, count 0 2006.230.01:12:34.24#ibcon#enter sib2, iclass 34, count 0 2006.230.01:12:34.24#ibcon#flushed, iclass 34, count 0 2006.230.01:12:34.24#ibcon#about to write, iclass 34, count 0 2006.230.01:12:34.24#ibcon#wrote, iclass 34, count 0 2006.230.01:12:34.24#ibcon#about to read 3, iclass 34, count 0 2006.230.01:12:34.28#ibcon#read 3, iclass 34, count 0 2006.230.01:12:34.28#ibcon#about to read 4, iclass 34, count 0 2006.230.01:12:34.28#ibcon#read 4, iclass 34, count 0 2006.230.01:12:34.28#ibcon#about to read 5, iclass 34, count 0 2006.230.01:12:34.28#ibcon#read 5, iclass 34, count 0 2006.230.01:12:34.28#ibcon#about to read 6, iclass 34, count 0 2006.230.01:12:34.28#ibcon#read 6, iclass 34, count 0 2006.230.01:12:34.28#ibcon#end of sib2, iclass 34, count 0 2006.230.01:12:34.28#ibcon#*after write, iclass 34, count 0 2006.230.01:12:34.28#ibcon#*before return 0, iclass 34, count 0 2006.230.01:12:34.28#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:34.28#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:12:34.28#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:12:34.28#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:12:34.28$vck44/vb=8,4 2006.230.01:12:34.28#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.01:12:34.28#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.01:12:34.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:12:34.28#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:34.34#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:34.34#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:34.34#ibcon#enter wrdev, iclass 36, count 2 2006.230.01:12:34.34#ibcon#first serial, iclass 36, count 2 2006.230.01:12:34.34#ibcon#enter sib2, iclass 36, count 2 2006.230.01:12:34.34#ibcon#flushed, iclass 36, count 2 2006.230.01:12:34.34#ibcon#about to write, iclass 36, count 2 2006.230.01:12:34.34#ibcon#wrote, iclass 36, count 2 2006.230.01:12:34.34#ibcon#about to read 3, iclass 36, count 2 2006.230.01:12:34.36#ibcon#read 3, iclass 36, count 2 2006.230.01:12:34.36#ibcon#about to read 4, iclass 36, count 2 2006.230.01:12:34.36#ibcon#read 4, iclass 36, count 2 2006.230.01:12:34.36#ibcon#about to read 5, iclass 36, count 2 2006.230.01:12:34.36#ibcon#read 5, iclass 36, count 2 2006.230.01:12:34.36#ibcon#about to read 6, iclass 36, count 2 2006.230.01:12:34.36#ibcon#read 6, iclass 36, count 2 2006.230.01:12:34.36#ibcon#end of sib2, iclass 36, count 2 2006.230.01:12:34.36#ibcon#*mode == 0, iclass 36, count 2 2006.230.01:12:34.36#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.01:12:34.36#ibcon#[27=AT08-04\r\n] 2006.230.01:12:34.36#ibcon#*before write, iclass 36, count 2 2006.230.01:12:34.36#ibcon#enter sib2, iclass 36, count 2 2006.230.01:12:34.36#ibcon#flushed, iclass 36, count 2 2006.230.01:12:34.36#ibcon#about to write, iclass 36, count 2 2006.230.01:12:34.36#ibcon#wrote, iclass 36, count 2 2006.230.01:12:34.36#ibcon#about to read 3, iclass 36, count 2 2006.230.01:12:34.39#ibcon#read 3, iclass 36, count 2 2006.230.01:12:34.39#ibcon#about to read 4, iclass 36, count 2 2006.230.01:12:34.39#ibcon#read 4, iclass 36, count 2 2006.230.01:12:34.39#ibcon#about to read 5, iclass 36, count 2 2006.230.01:12:34.39#ibcon#read 5, iclass 36, count 2 2006.230.01:12:34.39#ibcon#about to read 6, iclass 36, count 2 2006.230.01:12:34.39#ibcon#read 6, iclass 36, count 2 2006.230.01:12:34.39#ibcon#end of sib2, iclass 36, count 2 2006.230.01:12:34.39#ibcon#*after write, iclass 36, count 2 2006.230.01:12:34.39#ibcon#*before return 0, iclass 36, count 2 2006.230.01:12:34.39#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:34.39#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:12:34.39#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.01:12:34.39#ibcon#ireg 7 cls_cnt 0 2006.230.01:12:34.39#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:34.51#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:34.51#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:34.51#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:12:34.51#ibcon#first serial, iclass 36, count 0 2006.230.01:12:34.51#ibcon#enter sib2, iclass 36, count 0 2006.230.01:12:34.51#ibcon#flushed, iclass 36, count 0 2006.230.01:12:34.51#ibcon#about to write, iclass 36, count 0 2006.230.01:12:34.51#ibcon#wrote, iclass 36, count 0 2006.230.01:12:34.51#ibcon#about to read 3, iclass 36, count 0 2006.230.01:12:34.53#ibcon#read 3, iclass 36, count 0 2006.230.01:12:34.53#ibcon#about to read 4, iclass 36, count 0 2006.230.01:12:34.53#ibcon#read 4, iclass 36, count 0 2006.230.01:12:34.53#ibcon#about to read 5, iclass 36, count 0 2006.230.01:12:34.53#ibcon#read 5, iclass 36, count 0 2006.230.01:12:34.53#ibcon#about to read 6, iclass 36, count 0 2006.230.01:12:34.53#ibcon#read 6, iclass 36, count 0 2006.230.01:12:34.53#ibcon#end of sib2, iclass 36, count 0 2006.230.01:12:34.53#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:12:34.53#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:12:34.53#ibcon#[27=USB\r\n] 2006.230.01:12:34.53#ibcon#*before write, iclass 36, count 0 2006.230.01:12:34.53#ibcon#enter sib2, iclass 36, count 0 2006.230.01:12:34.53#ibcon#flushed, iclass 36, count 0 2006.230.01:12:34.53#ibcon#about to write, iclass 36, count 0 2006.230.01:12:34.53#ibcon#wrote, iclass 36, count 0 2006.230.01:12:34.53#ibcon#about to read 3, iclass 36, count 0 2006.230.01:12:34.56#ibcon#read 3, iclass 36, count 0 2006.230.01:12:34.56#ibcon#about to read 4, iclass 36, count 0 2006.230.01:12:34.56#ibcon#read 4, iclass 36, count 0 2006.230.01:12:34.56#ibcon#about to read 5, iclass 36, count 0 2006.230.01:12:34.56#ibcon#read 5, iclass 36, count 0 2006.230.01:12:34.56#ibcon#about to read 6, iclass 36, count 0 2006.230.01:12:34.56#ibcon#read 6, iclass 36, count 0 2006.230.01:12:34.56#ibcon#end of sib2, iclass 36, count 0 2006.230.01:12:34.56#ibcon#*after write, iclass 36, count 0 2006.230.01:12:34.56#ibcon#*before return 0, iclass 36, count 0 2006.230.01:12:34.56#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:34.56#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:12:34.56#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:12:34.56#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:12:34.56$vck44/vabw=wide 2006.230.01:12:34.56#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.01:12:34.56#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.01:12:34.56#ibcon#ireg 8 cls_cnt 0 2006.230.01:12:34.56#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:34.56#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:34.56#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:34.56#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:12:34.56#ibcon#first serial, iclass 38, count 0 2006.230.01:12:34.56#ibcon#enter sib2, iclass 38, count 0 2006.230.01:12:34.56#ibcon#flushed, iclass 38, count 0 2006.230.01:12:34.56#ibcon#about to write, iclass 38, count 0 2006.230.01:12:34.56#ibcon#wrote, iclass 38, count 0 2006.230.01:12:34.56#ibcon#about to read 3, iclass 38, count 0 2006.230.01:12:34.58#ibcon#read 3, iclass 38, count 0 2006.230.01:12:34.58#ibcon#about to read 4, iclass 38, count 0 2006.230.01:12:34.58#ibcon#read 4, iclass 38, count 0 2006.230.01:12:34.58#ibcon#about to read 5, iclass 38, count 0 2006.230.01:12:34.58#ibcon#read 5, iclass 38, count 0 2006.230.01:12:34.58#ibcon#about to read 6, iclass 38, count 0 2006.230.01:12:34.58#ibcon#read 6, iclass 38, count 0 2006.230.01:12:34.58#ibcon#end of sib2, iclass 38, count 0 2006.230.01:12:34.58#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:12:34.58#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:12:34.58#ibcon#[25=BW32\r\n] 2006.230.01:12:34.58#ibcon#*before write, iclass 38, count 0 2006.230.01:12:34.58#ibcon#enter sib2, iclass 38, count 0 2006.230.01:12:34.58#ibcon#flushed, iclass 38, count 0 2006.230.01:12:34.58#ibcon#about to write, iclass 38, count 0 2006.230.01:12:34.58#ibcon#wrote, iclass 38, count 0 2006.230.01:12:34.58#ibcon#about to read 3, iclass 38, count 0 2006.230.01:12:34.61#ibcon#read 3, iclass 38, count 0 2006.230.01:12:34.61#ibcon#about to read 4, iclass 38, count 0 2006.230.01:12:34.61#ibcon#read 4, iclass 38, count 0 2006.230.01:12:34.61#ibcon#about to read 5, iclass 38, count 0 2006.230.01:12:34.61#ibcon#read 5, iclass 38, count 0 2006.230.01:12:34.61#ibcon#about to read 6, iclass 38, count 0 2006.230.01:12:34.61#ibcon#read 6, iclass 38, count 0 2006.230.01:12:34.61#ibcon#end of sib2, iclass 38, count 0 2006.230.01:12:34.61#ibcon#*after write, iclass 38, count 0 2006.230.01:12:34.61#ibcon#*before return 0, iclass 38, count 0 2006.230.01:12:34.61#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:34.61#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:12:34.61#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:12:34.61#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:12:34.61$vck44/vbbw=wide 2006.230.01:12:34.61#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:12:34.61#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:12:34.61#ibcon#ireg 8 cls_cnt 0 2006.230.01:12:34.61#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:12:34.68#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:12:34.68#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:12:34.68#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:12:34.68#ibcon#first serial, iclass 40, count 0 2006.230.01:12:34.68#ibcon#enter sib2, iclass 40, count 0 2006.230.01:12:34.68#ibcon#flushed, iclass 40, count 0 2006.230.01:12:34.68#ibcon#about to write, iclass 40, count 0 2006.230.01:12:34.68#ibcon#wrote, iclass 40, count 0 2006.230.01:12:34.68#ibcon#about to read 3, iclass 40, count 0 2006.230.01:12:34.70#ibcon#read 3, iclass 40, count 0 2006.230.01:12:34.70#ibcon#about to read 4, iclass 40, count 0 2006.230.01:12:34.70#ibcon#read 4, iclass 40, count 0 2006.230.01:12:34.70#ibcon#about to read 5, iclass 40, count 0 2006.230.01:12:34.70#ibcon#read 5, iclass 40, count 0 2006.230.01:12:34.70#ibcon#about to read 6, iclass 40, count 0 2006.230.01:12:34.70#ibcon#read 6, iclass 40, count 0 2006.230.01:12:34.70#ibcon#end of sib2, iclass 40, count 0 2006.230.01:12:34.70#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:12:34.70#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:12:34.70#ibcon#[27=BW32\r\n] 2006.230.01:12:34.70#ibcon#*before write, iclass 40, count 0 2006.230.01:12:34.70#ibcon#enter sib2, iclass 40, count 0 2006.230.01:12:34.70#ibcon#flushed, iclass 40, count 0 2006.230.01:12:34.70#ibcon#about to write, iclass 40, count 0 2006.230.01:12:34.70#ibcon#wrote, iclass 40, count 0 2006.230.01:12:34.70#ibcon#about to read 3, iclass 40, count 0 2006.230.01:12:34.73#ibcon#read 3, iclass 40, count 0 2006.230.01:12:34.73#ibcon#about to read 4, iclass 40, count 0 2006.230.01:12:34.73#ibcon#read 4, iclass 40, count 0 2006.230.01:12:34.73#ibcon#about to read 5, iclass 40, count 0 2006.230.01:12:34.73#ibcon#read 5, iclass 40, count 0 2006.230.01:12:34.73#ibcon#about to read 6, iclass 40, count 0 2006.230.01:12:34.73#ibcon#read 6, iclass 40, count 0 2006.230.01:12:34.73#ibcon#end of sib2, iclass 40, count 0 2006.230.01:12:34.73#ibcon#*after write, iclass 40, count 0 2006.230.01:12:34.73#ibcon#*before return 0, iclass 40, count 0 2006.230.01:12:34.73#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:12:34.73#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:12:34.73#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:12:34.73#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:12:34.73$setupk4/ifdk4 2006.230.01:12:34.73$ifdk4/lo= 2006.230.01:12:34.73$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:12:34.73$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:12:34.73$ifdk4/patch= 2006.230.01:12:34.73$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:12:34.73$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:12:34.73$setupk4/!*+20s 2006.230.01:12:42.42#abcon#<5=/08 2.5 7.4 32.49 741002.7\r\n> 2006.230.01:12:42.44#abcon#{5=INTERFACE CLEAR} 2006.230.01:12:42.50#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:12:45.14#trakl#Source acquired 2006.230.01:12:45.14#flagr#flagr/antenna,acquired 2006.230.01:12:49.24$setupk4/"tpicd 2006.230.01:12:49.24$setupk4/echo=off 2006.230.01:12:49.24$setupk4/xlog=off 2006.230.01:12:49.24:!2006.230.01:14:05 2006.230.01:14:05.00:preob 2006.230.01:14:05.14/onsource/TRACKING 2006.230.01:14:05.14:!2006.230.01:14:15 2006.230.01:14:15.00:"tape 2006.230.01:14:15.00:"st=record 2006.230.01:14:15.00:data_valid=on 2006.230.01:14:15.00:midob 2006.230.01:14:15.14/onsource/TRACKING 2006.230.01:14:15.14/wx/32.49,1002.7,74 2006.230.01:14:15.25/cable/+6.3970E-03 2006.230.01:14:16.34/va/01,08,usb,yes,28,31 2006.230.01:14:16.34/va/02,07,usb,yes,31,31 2006.230.01:14:16.34/va/03,06,usb,yes,38,41 2006.230.01:14:16.34/va/04,07,usb,yes,32,33 2006.230.01:14:16.34/va/05,04,usb,yes,28,29 2006.230.01:14:16.34/va/06,04,usb,yes,32,32 2006.230.01:14:16.34/va/07,05,usb,yes,28,29 2006.230.01:14:16.34/va/08,06,usb,yes,20,25 2006.230.01:14:16.57/valo/01,524.99,yes,locked 2006.230.01:14:16.57/valo/02,534.99,yes,locked 2006.230.01:14:16.57/valo/03,564.99,yes,locked 2006.230.01:14:16.57/valo/04,624.99,yes,locked 2006.230.01:14:16.57/valo/05,734.99,yes,locked 2006.230.01:14:16.57/valo/06,814.99,yes,locked 2006.230.01:14:16.57/valo/07,864.99,yes,locked 2006.230.01:14:16.57/valo/08,884.99,yes,locked 2006.230.01:14:17.66/vb/01,04,usb,yes,30,28 2006.230.01:14:17.66/vb/02,04,usb,yes,33,33 2006.230.01:14:17.66/vb/03,04,usb,yes,30,33 2006.230.01:14:17.66/vb/04,04,usb,yes,34,33 2006.230.01:14:17.66/vb/05,04,usb,yes,26,29 2006.230.01:14:17.66/vb/06,04,usb,yes,31,27 2006.230.01:14:17.66/vb/07,04,usb,yes,31,31 2006.230.01:14:17.66/vb/08,04,usb,yes,28,32 2006.230.01:14:17.89/vblo/01,629.99,yes,locked 2006.230.01:14:17.89/vblo/02,634.99,yes,locked 2006.230.01:14:17.89/vblo/03,649.99,yes,locked 2006.230.01:14:17.89/vblo/04,679.99,yes,locked 2006.230.01:14:17.89/vblo/05,709.99,yes,locked 2006.230.01:14:17.89/vblo/06,719.99,yes,locked 2006.230.01:14:17.89/vblo/07,734.99,yes,locked 2006.230.01:14:17.89/vblo/08,744.99,yes,locked 2006.230.01:14:18.04/vabw/8 2006.230.01:14:18.19/vbbw/8 2006.230.01:14:18.28/xfe/off,on,12.0 2006.230.01:14:18.65/ifatt/23,28,28,28 2006.230.01:14:19.07/fmout-gps/S +4.51E-07 2006.230.01:14:19.11:!2006.230.01:15:05 2006.230.01:15:05.00:data_valid=off 2006.230.01:15:05.00:"et 2006.230.01:15:05.00:!+3s 2006.230.01:15:08.01:"tape 2006.230.01:15:08.01:postob 2006.230.01:15:08.10/cable/+6.3955E-03 2006.230.01:15:08.10/wx/32.50,1002.7,73 2006.230.01:15:09.07/fmout-gps/S +4.50E-07 2006.230.01:15:09.07:scan_name=230-0118,jd0608,420 2006.230.01:15:09.07:source=0804+499,080839.67,495036.5,2000.0,neutral 2006.230.01:15:10.14#flagr#flagr/antenna,new-source 2006.230.01:15:10.14:checkk5 2006.230.01:15:10.52/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:15:10.91/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:15:11.34/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:15:11.73/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:15:12.12/chk_obsdata//k5ts1/T2300114??a.dat file size is correct (nominal:200MB, actual:200MB). 2006.230.01:15:12.53/chk_obsdata//k5ts2/T2300114??b.dat file size is correct (nominal:200MB, actual:200MB). 2006.230.01:15:12.93/chk_obsdata//k5ts3/T2300114??c.dat file size is correct (nominal:200MB, actual:200MB). 2006.230.01:15:13.33/chk_obsdata//k5ts4/T2300114??d.dat file size is correct (nominal:200MB, actual:200MB). 2006.230.01:15:14.06/k5log//k5ts1_log_newline 2006.230.01:15:14.77/k5log//k5ts2_log_newline 2006.230.01:15:15.48/k5log//k5ts3_log_newline 2006.230.01:15:16.18/k5log//k5ts4_log_newline 2006.230.01:15:16.21/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:15:16.21:setupk4=1 2006.230.01:15:16.21$setupk4/echo=on 2006.230.01:15:16.21$setupk4/pcalon 2006.230.01:15:16.21$pcalon/"no phase cal control is implemented here 2006.230.01:15:16.21$setupk4/"tpicd=stop 2006.230.01:15:16.21$setupk4/"rec=synch_on 2006.230.01:15:16.21$setupk4/"rec_mode=128 2006.230.01:15:16.21$setupk4/!* 2006.230.01:15:16.21$setupk4/recpk4 2006.230.01:15:16.21$recpk4/recpatch= 2006.230.01:15:16.21$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:15:16.21$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:15:16.21$setupk4/vck44 2006.230.01:15:16.21$vck44/valo=1,524.99 2006.230.01:15:16.21#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.01:15:16.21#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.01:15:16.21#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:16.21#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:16.21#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:16.21#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:16.21#ibcon#enter wrdev, iclass 37, count 0 2006.230.01:15:16.21#ibcon#first serial, iclass 37, count 0 2006.230.01:15:16.21#ibcon#enter sib2, iclass 37, count 0 2006.230.01:15:16.21#ibcon#flushed, iclass 37, count 0 2006.230.01:15:16.21#ibcon#about to write, iclass 37, count 0 2006.230.01:15:16.22#ibcon#wrote, iclass 37, count 0 2006.230.01:15:16.22#ibcon#about to read 3, iclass 37, count 0 2006.230.01:15:16.23#ibcon#read 3, iclass 37, count 0 2006.230.01:15:16.23#ibcon#about to read 4, iclass 37, count 0 2006.230.01:15:16.23#ibcon#read 4, iclass 37, count 0 2006.230.01:15:16.23#ibcon#about to read 5, iclass 37, count 0 2006.230.01:15:16.23#ibcon#read 5, iclass 37, count 0 2006.230.01:15:16.23#ibcon#about to read 6, iclass 37, count 0 2006.230.01:15:16.23#ibcon#read 6, iclass 37, count 0 2006.230.01:15:16.23#ibcon#end of sib2, iclass 37, count 0 2006.230.01:15:16.23#ibcon#*mode == 0, iclass 37, count 0 2006.230.01:15:16.23#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.01:15:16.23#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:15:16.23#ibcon#*before write, iclass 37, count 0 2006.230.01:15:16.23#ibcon#enter sib2, iclass 37, count 0 2006.230.01:15:16.23#ibcon#flushed, iclass 37, count 0 2006.230.01:15:16.23#ibcon#about to write, iclass 37, count 0 2006.230.01:15:16.23#ibcon#wrote, iclass 37, count 0 2006.230.01:15:16.23#ibcon#about to read 3, iclass 37, count 0 2006.230.01:15:16.28#ibcon#read 3, iclass 37, count 0 2006.230.01:15:16.28#ibcon#about to read 4, iclass 37, count 0 2006.230.01:15:16.28#ibcon#read 4, iclass 37, count 0 2006.230.01:15:16.28#ibcon#about to read 5, iclass 37, count 0 2006.230.01:15:16.28#ibcon#read 5, iclass 37, count 0 2006.230.01:15:16.28#ibcon#about to read 6, iclass 37, count 0 2006.230.01:15:16.28#ibcon#read 6, iclass 37, count 0 2006.230.01:15:16.28#ibcon#end of sib2, iclass 37, count 0 2006.230.01:15:16.28#ibcon#*after write, iclass 37, count 0 2006.230.01:15:16.28#ibcon#*before return 0, iclass 37, count 0 2006.230.01:15:16.28#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:16.28#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:16.28#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.01:15:16.28#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.01:15:16.28$vck44/va=1,8 2006.230.01:15:16.28#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.230.01:15:16.28#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.230.01:15:16.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:16.28#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:16.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:16.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:16.28#ibcon#enter wrdev, iclass 39, count 2 2006.230.01:15:16.28#ibcon#first serial, iclass 39, count 2 2006.230.01:15:16.28#ibcon#enter sib2, iclass 39, count 2 2006.230.01:15:16.28#ibcon#flushed, iclass 39, count 2 2006.230.01:15:16.28#ibcon#about to write, iclass 39, count 2 2006.230.01:15:16.28#ibcon#wrote, iclass 39, count 2 2006.230.01:15:16.28#ibcon#about to read 3, iclass 39, count 2 2006.230.01:15:16.30#ibcon#read 3, iclass 39, count 2 2006.230.01:15:16.30#ibcon#about to read 4, iclass 39, count 2 2006.230.01:15:16.30#ibcon#read 4, iclass 39, count 2 2006.230.01:15:16.30#ibcon#about to read 5, iclass 39, count 2 2006.230.01:15:16.30#ibcon#read 5, iclass 39, count 2 2006.230.01:15:16.30#ibcon#about to read 6, iclass 39, count 2 2006.230.01:15:16.30#ibcon#read 6, iclass 39, count 2 2006.230.01:15:16.30#ibcon#end of sib2, iclass 39, count 2 2006.230.01:15:16.30#ibcon#*mode == 0, iclass 39, count 2 2006.230.01:15:16.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.230.01:15:16.30#ibcon#[25=AT01-08\r\n] 2006.230.01:15:16.30#ibcon#*before write, iclass 39, count 2 2006.230.01:15:16.30#ibcon#enter sib2, iclass 39, count 2 2006.230.01:15:16.30#ibcon#flushed, iclass 39, count 2 2006.230.01:15:16.30#ibcon#about to write, iclass 39, count 2 2006.230.01:15:16.30#ibcon#wrote, iclass 39, count 2 2006.230.01:15:16.30#ibcon#about to read 3, iclass 39, count 2 2006.230.01:15:16.33#ibcon#read 3, iclass 39, count 2 2006.230.01:15:16.33#ibcon#about to read 4, iclass 39, count 2 2006.230.01:15:16.33#ibcon#read 4, iclass 39, count 2 2006.230.01:15:16.33#ibcon#about to read 5, iclass 39, count 2 2006.230.01:15:16.33#ibcon#read 5, iclass 39, count 2 2006.230.01:15:16.33#ibcon#about to read 6, iclass 39, count 2 2006.230.01:15:16.33#ibcon#read 6, iclass 39, count 2 2006.230.01:15:16.33#ibcon#end of sib2, iclass 39, count 2 2006.230.01:15:16.33#ibcon#*after write, iclass 39, count 2 2006.230.01:15:16.33#ibcon#*before return 0, iclass 39, count 2 2006.230.01:15:16.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:16.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:16.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.230.01:15:16.33#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:16.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:16.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:16.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:16.45#ibcon#enter wrdev, iclass 39, count 0 2006.230.01:15:16.45#ibcon#first serial, iclass 39, count 0 2006.230.01:15:16.45#ibcon#enter sib2, iclass 39, count 0 2006.230.01:15:16.45#ibcon#flushed, iclass 39, count 0 2006.230.01:15:16.45#ibcon#about to write, iclass 39, count 0 2006.230.01:15:16.45#ibcon#wrote, iclass 39, count 0 2006.230.01:15:16.45#ibcon#about to read 3, iclass 39, count 0 2006.230.01:15:16.47#ibcon#read 3, iclass 39, count 0 2006.230.01:15:16.47#ibcon#about to read 4, iclass 39, count 0 2006.230.01:15:16.47#ibcon#read 4, iclass 39, count 0 2006.230.01:15:16.47#ibcon#about to read 5, iclass 39, count 0 2006.230.01:15:16.47#ibcon#read 5, iclass 39, count 0 2006.230.01:15:16.47#ibcon#about to read 6, iclass 39, count 0 2006.230.01:15:16.47#ibcon#read 6, iclass 39, count 0 2006.230.01:15:16.47#ibcon#end of sib2, iclass 39, count 0 2006.230.01:15:16.47#ibcon#*mode == 0, iclass 39, count 0 2006.230.01:15:16.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.01:15:16.47#ibcon#[25=USB\r\n] 2006.230.01:15:16.47#ibcon#*before write, iclass 39, count 0 2006.230.01:15:16.47#ibcon#enter sib2, iclass 39, count 0 2006.230.01:15:16.47#ibcon#flushed, iclass 39, count 0 2006.230.01:15:16.47#ibcon#about to write, iclass 39, count 0 2006.230.01:15:16.47#ibcon#wrote, iclass 39, count 0 2006.230.01:15:16.47#ibcon#about to read 3, iclass 39, count 0 2006.230.01:15:16.50#ibcon#read 3, iclass 39, count 0 2006.230.01:15:16.50#ibcon#about to read 4, iclass 39, count 0 2006.230.01:15:16.50#ibcon#read 4, iclass 39, count 0 2006.230.01:15:16.50#ibcon#about to read 5, iclass 39, count 0 2006.230.01:15:16.50#ibcon#read 5, iclass 39, count 0 2006.230.01:15:16.50#ibcon#about to read 6, iclass 39, count 0 2006.230.01:15:16.50#ibcon#read 6, iclass 39, count 0 2006.230.01:15:16.50#ibcon#end of sib2, iclass 39, count 0 2006.230.01:15:16.50#ibcon#*after write, iclass 39, count 0 2006.230.01:15:16.50#ibcon#*before return 0, iclass 39, count 0 2006.230.01:15:16.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:16.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:16.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.01:15:16.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.01:15:16.50$vck44/valo=2,534.99 2006.230.01:15:16.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.01:15:16.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.01:15:16.50#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:16.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:16.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:16.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:16.50#ibcon#enter wrdev, iclass 3, count 0 2006.230.01:15:16.50#ibcon#first serial, iclass 3, count 0 2006.230.01:15:16.50#ibcon#enter sib2, iclass 3, count 0 2006.230.01:15:16.50#ibcon#flushed, iclass 3, count 0 2006.230.01:15:16.50#ibcon#about to write, iclass 3, count 0 2006.230.01:15:16.50#ibcon#wrote, iclass 3, count 0 2006.230.01:15:16.50#ibcon#about to read 3, iclass 3, count 0 2006.230.01:15:16.52#ibcon#read 3, iclass 3, count 0 2006.230.01:15:16.52#ibcon#about to read 4, iclass 3, count 0 2006.230.01:15:16.52#ibcon#read 4, iclass 3, count 0 2006.230.01:15:16.52#ibcon#about to read 5, iclass 3, count 0 2006.230.01:15:16.52#ibcon#read 5, iclass 3, count 0 2006.230.01:15:16.52#ibcon#about to read 6, iclass 3, count 0 2006.230.01:15:16.52#ibcon#read 6, iclass 3, count 0 2006.230.01:15:16.52#ibcon#end of sib2, iclass 3, count 0 2006.230.01:15:16.52#ibcon#*mode == 0, iclass 3, count 0 2006.230.01:15:16.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.01:15:16.52#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:15:16.52#ibcon#*before write, iclass 3, count 0 2006.230.01:15:16.52#ibcon#enter sib2, iclass 3, count 0 2006.230.01:15:16.52#ibcon#flushed, iclass 3, count 0 2006.230.01:15:16.52#ibcon#about to write, iclass 3, count 0 2006.230.01:15:16.52#ibcon#wrote, iclass 3, count 0 2006.230.01:15:16.52#ibcon#about to read 3, iclass 3, count 0 2006.230.01:15:16.56#ibcon#read 3, iclass 3, count 0 2006.230.01:15:16.56#ibcon#about to read 4, iclass 3, count 0 2006.230.01:15:16.56#ibcon#read 4, iclass 3, count 0 2006.230.01:15:16.56#ibcon#about to read 5, iclass 3, count 0 2006.230.01:15:16.56#ibcon#read 5, iclass 3, count 0 2006.230.01:15:16.56#ibcon#about to read 6, iclass 3, count 0 2006.230.01:15:16.56#ibcon#read 6, iclass 3, count 0 2006.230.01:15:16.56#ibcon#end of sib2, iclass 3, count 0 2006.230.01:15:16.56#ibcon#*after write, iclass 3, count 0 2006.230.01:15:16.56#ibcon#*before return 0, iclass 3, count 0 2006.230.01:15:16.56#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:16.56#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:16.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.01:15:16.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.01:15:16.56$vck44/va=2,7 2006.230.01:15:16.56#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.01:15:16.56#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.01:15:16.56#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:16.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:16.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:16.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:16.62#ibcon#enter wrdev, iclass 5, count 2 2006.230.01:15:16.62#ibcon#first serial, iclass 5, count 2 2006.230.01:15:16.62#ibcon#enter sib2, iclass 5, count 2 2006.230.01:15:16.62#ibcon#flushed, iclass 5, count 2 2006.230.01:15:16.62#ibcon#about to write, iclass 5, count 2 2006.230.01:15:16.62#ibcon#wrote, iclass 5, count 2 2006.230.01:15:16.62#ibcon#about to read 3, iclass 5, count 2 2006.230.01:15:16.64#ibcon#read 3, iclass 5, count 2 2006.230.01:15:16.64#ibcon#about to read 4, iclass 5, count 2 2006.230.01:15:16.64#ibcon#read 4, iclass 5, count 2 2006.230.01:15:16.64#ibcon#about to read 5, iclass 5, count 2 2006.230.01:15:16.64#ibcon#read 5, iclass 5, count 2 2006.230.01:15:16.64#ibcon#about to read 6, iclass 5, count 2 2006.230.01:15:16.64#ibcon#read 6, iclass 5, count 2 2006.230.01:15:16.64#ibcon#end of sib2, iclass 5, count 2 2006.230.01:15:16.64#ibcon#*mode == 0, iclass 5, count 2 2006.230.01:15:16.64#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.01:15:16.64#ibcon#[25=AT02-07\r\n] 2006.230.01:15:16.64#ibcon#*before write, iclass 5, count 2 2006.230.01:15:16.64#ibcon#enter sib2, iclass 5, count 2 2006.230.01:15:16.64#ibcon#flushed, iclass 5, count 2 2006.230.01:15:16.64#ibcon#about to write, iclass 5, count 2 2006.230.01:15:16.64#ibcon#wrote, iclass 5, count 2 2006.230.01:15:16.64#ibcon#about to read 3, iclass 5, count 2 2006.230.01:15:16.67#ibcon#read 3, iclass 5, count 2 2006.230.01:15:16.67#ibcon#about to read 4, iclass 5, count 2 2006.230.01:15:16.67#ibcon#read 4, iclass 5, count 2 2006.230.01:15:16.67#ibcon#about to read 5, iclass 5, count 2 2006.230.01:15:16.67#ibcon#read 5, iclass 5, count 2 2006.230.01:15:16.67#ibcon#about to read 6, iclass 5, count 2 2006.230.01:15:16.67#ibcon#read 6, iclass 5, count 2 2006.230.01:15:16.67#ibcon#end of sib2, iclass 5, count 2 2006.230.01:15:16.67#ibcon#*after write, iclass 5, count 2 2006.230.01:15:16.67#ibcon#*before return 0, iclass 5, count 2 2006.230.01:15:16.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:16.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:16.67#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.01:15:16.67#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:16.67#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:16.79#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:16.79#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:16.79#ibcon#enter wrdev, iclass 5, count 0 2006.230.01:15:16.79#ibcon#first serial, iclass 5, count 0 2006.230.01:15:16.79#ibcon#enter sib2, iclass 5, count 0 2006.230.01:15:16.79#ibcon#flushed, iclass 5, count 0 2006.230.01:15:16.79#ibcon#about to write, iclass 5, count 0 2006.230.01:15:16.79#ibcon#wrote, iclass 5, count 0 2006.230.01:15:16.79#ibcon#about to read 3, iclass 5, count 0 2006.230.01:15:16.81#ibcon#read 3, iclass 5, count 0 2006.230.01:15:16.81#ibcon#about to read 4, iclass 5, count 0 2006.230.01:15:16.81#ibcon#read 4, iclass 5, count 0 2006.230.01:15:16.81#ibcon#about to read 5, iclass 5, count 0 2006.230.01:15:16.81#ibcon#read 5, iclass 5, count 0 2006.230.01:15:16.81#ibcon#about to read 6, iclass 5, count 0 2006.230.01:15:16.81#ibcon#read 6, iclass 5, count 0 2006.230.01:15:16.81#ibcon#end of sib2, iclass 5, count 0 2006.230.01:15:16.81#ibcon#*mode == 0, iclass 5, count 0 2006.230.01:15:16.81#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.01:15:16.81#ibcon#[25=USB\r\n] 2006.230.01:15:16.81#ibcon#*before write, iclass 5, count 0 2006.230.01:15:16.81#ibcon#enter sib2, iclass 5, count 0 2006.230.01:15:16.81#ibcon#flushed, iclass 5, count 0 2006.230.01:15:16.81#ibcon#about to write, iclass 5, count 0 2006.230.01:15:16.81#ibcon#wrote, iclass 5, count 0 2006.230.01:15:16.81#ibcon#about to read 3, iclass 5, count 0 2006.230.01:15:16.84#ibcon#read 3, iclass 5, count 0 2006.230.01:15:16.84#ibcon#about to read 4, iclass 5, count 0 2006.230.01:15:16.84#ibcon#read 4, iclass 5, count 0 2006.230.01:15:16.84#ibcon#about to read 5, iclass 5, count 0 2006.230.01:15:16.84#ibcon#read 5, iclass 5, count 0 2006.230.01:15:16.84#ibcon#about to read 6, iclass 5, count 0 2006.230.01:15:16.84#ibcon#read 6, iclass 5, count 0 2006.230.01:15:16.84#ibcon#end of sib2, iclass 5, count 0 2006.230.01:15:16.84#ibcon#*after write, iclass 5, count 0 2006.230.01:15:16.84#ibcon#*before return 0, iclass 5, count 0 2006.230.01:15:16.84#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:16.84#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:16.84#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.01:15:16.84#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.01:15:16.84$vck44/valo=3,564.99 2006.230.01:15:16.84#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.01:15:16.84#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.01:15:16.84#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:16.84#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:16.84#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:16.84#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:16.84#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:15:16.84#ibcon#first serial, iclass 7, count 0 2006.230.01:15:16.84#ibcon#enter sib2, iclass 7, count 0 2006.230.01:15:16.84#ibcon#flushed, iclass 7, count 0 2006.230.01:15:16.84#ibcon#about to write, iclass 7, count 0 2006.230.01:15:16.84#ibcon#wrote, iclass 7, count 0 2006.230.01:15:16.84#ibcon#about to read 3, iclass 7, count 0 2006.230.01:15:16.86#ibcon#read 3, iclass 7, count 0 2006.230.01:15:16.86#ibcon#about to read 4, iclass 7, count 0 2006.230.01:15:16.86#ibcon#read 4, iclass 7, count 0 2006.230.01:15:16.86#ibcon#about to read 5, iclass 7, count 0 2006.230.01:15:16.86#ibcon#read 5, iclass 7, count 0 2006.230.01:15:16.86#ibcon#about to read 6, iclass 7, count 0 2006.230.01:15:16.86#ibcon#read 6, iclass 7, count 0 2006.230.01:15:16.86#ibcon#end of sib2, iclass 7, count 0 2006.230.01:15:16.86#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:15:16.86#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:15:16.86#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:15:16.86#ibcon#*before write, iclass 7, count 0 2006.230.01:15:16.86#ibcon#enter sib2, iclass 7, count 0 2006.230.01:15:16.86#ibcon#flushed, iclass 7, count 0 2006.230.01:15:16.86#ibcon#about to write, iclass 7, count 0 2006.230.01:15:16.86#ibcon#wrote, iclass 7, count 0 2006.230.01:15:16.86#ibcon#about to read 3, iclass 7, count 0 2006.230.01:15:16.90#ibcon#read 3, iclass 7, count 0 2006.230.01:15:16.90#ibcon#about to read 4, iclass 7, count 0 2006.230.01:15:16.90#ibcon#read 4, iclass 7, count 0 2006.230.01:15:16.90#ibcon#about to read 5, iclass 7, count 0 2006.230.01:15:16.90#ibcon#read 5, iclass 7, count 0 2006.230.01:15:16.90#ibcon#about to read 6, iclass 7, count 0 2006.230.01:15:16.90#ibcon#read 6, iclass 7, count 0 2006.230.01:15:16.90#ibcon#end of sib2, iclass 7, count 0 2006.230.01:15:16.90#ibcon#*after write, iclass 7, count 0 2006.230.01:15:16.90#ibcon#*before return 0, iclass 7, count 0 2006.230.01:15:16.90#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:16.90#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:16.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:15:16.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:15:16.90$vck44/va=3,6 2006.230.01:15:16.90#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.01:15:16.90#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.01:15:16.90#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:16.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:16.96#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:16.96#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:16.96#ibcon#enter wrdev, iclass 11, count 2 2006.230.01:15:16.96#ibcon#first serial, iclass 11, count 2 2006.230.01:15:16.96#ibcon#enter sib2, iclass 11, count 2 2006.230.01:15:16.96#ibcon#flushed, iclass 11, count 2 2006.230.01:15:16.96#ibcon#about to write, iclass 11, count 2 2006.230.01:15:16.96#ibcon#wrote, iclass 11, count 2 2006.230.01:15:16.96#ibcon#about to read 3, iclass 11, count 2 2006.230.01:15:16.98#ibcon#read 3, iclass 11, count 2 2006.230.01:15:16.98#ibcon#about to read 4, iclass 11, count 2 2006.230.01:15:16.98#ibcon#read 4, iclass 11, count 2 2006.230.01:15:16.98#ibcon#about to read 5, iclass 11, count 2 2006.230.01:15:16.98#ibcon#read 5, iclass 11, count 2 2006.230.01:15:16.98#ibcon#about to read 6, iclass 11, count 2 2006.230.01:15:16.98#ibcon#read 6, iclass 11, count 2 2006.230.01:15:16.98#ibcon#end of sib2, iclass 11, count 2 2006.230.01:15:16.98#ibcon#*mode == 0, iclass 11, count 2 2006.230.01:15:16.98#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.01:15:16.98#ibcon#[25=AT03-06\r\n] 2006.230.01:15:16.98#ibcon#*before write, iclass 11, count 2 2006.230.01:15:16.98#ibcon#enter sib2, iclass 11, count 2 2006.230.01:15:16.98#ibcon#flushed, iclass 11, count 2 2006.230.01:15:16.98#ibcon#about to write, iclass 11, count 2 2006.230.01:15:16.98#ibcon#wrote, iclass 11, count 2 2006.230.01:15:16.98#ibcon#about to read 3, iclass 11, count 2 2006.230.01:15:17.01#ibcon#read 3, iclass 11, count 2 2006.230.01:15:17.01#ibcon#about to read 4, iclass 11, count 2 2006.230.01:15:17.01#ibcon#read 4, iclass 11, count 2 2006.230.01:15:17.01#ibcon#about to read 5, iclass 11, count 2 2006.230.01:15:17.01#ibcon#read 5, iclass 11, count 2 2006.230.01:15:17.01#ibcon#about to read 6, iclass 11, count 2 2006.230.01:15:17.01#ibcon#read 6, iclass 11, count 2 2006.230.01:15:17.01#ibcon#end of sib2, iclass 11, count 2 2006.230.01:15:17.01#ibcon#*after write, iclass 11, count 2 2006.230.01:15:17.01#ibcon#*before return 0, iclass 11, count 2 2006.230.01:15:17.01#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:17.01#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:17.01#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.01:15:17.01#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:17.01#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:17.13#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:17.13#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:17.13#ibcon#enter wrdev, iclass 11, count 0 2006.230.01:15:17.13#ibcon#first serial, iclass 11, count 0 2006.230.01:15:17.13#ibcon#enter sib2, iclass 11, count 0 2006.230.01:15:17.13#ibcon#flushed, iclass 11, count 0 2006.230.01:15:17.13#ibcon#about to write, iclass 11, count 0 2006.230.01:15:17.13#ibcon#wrote, iclass 11, count 0 2006.230.01:15:17.13#ibcon#about to read 3, iclass 11, count 0 2006.230.01:15:17.15#ibcon#read 3, iclass 11, count 0 2006.230.01:15:17.15#ibcon#about to read 4, iclass 11, count 0 2006.230.01:15:17.15#ibcon#read 4, iclass 11, count 0 2006.230.01:15:17.15#ibcon#about to read 5, iclass 11, count 0 2006.230.01:15:17.15#ibcon#read 5, iclass 11, count 0 2006.230.01:15:17.15#ibcon#about to read 6, iclass 11, count 0 2006.230.01:15:17.15#ibcon#read 6, iclass 11, count 0 2006.230.01:15:17.15#ibcon#end of sib2, iclass 11, count 0 2006.230.01:15:17.15#ibcon#*mode == 0, iclass 11, count 0 2006.230.01:15:17.15#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.01:15:17.15#ibcon#[25=USB\r\n] 2006.230.01:15:17.15#ibcon#*before write, iclass 11, count 0 2006.230.01:15:17.15#ibcon#enter sib2, iclass 11, count 0 2006.230.01:15:17.15#ibcon#flushed, iclass 11, count 0 2006.230.01:15:17.15#ibcon#about to write, iclass 11, count 0 2006.230.01:15:17.15#ibcon#wrote, iclass 11, count 0 2006.230.01:15:17.15#ibcon#about to read 3, iclass 11, count 0 2006.230.01:15:17.18#ibcon#read 3, iclass 11, count 0 2006.230.01:15:17.18#ibcon#about to read 4, iclass 11, count 0 2006.230.01:15:17.18#ibcon#read 4, iclass 11, count 0 2006.230.01:15:17.18#ibcon#about to read 5, iclass 11, count 0 2006.230.01:15:17.18#ibcon#read 5, iclass 11, count 0 2006.230.01:15:17.18#ibcon#about to read 6, iclass 11, count 0 2006.230.01:15:17.18#ibcon#read 6, iclass 11, count 0 2006.230.01:15:17.18#ibcon#end of sib2, iclass 11, count 0 2006.230.01:15:17.18#ibcon#*after write, iclass 11, count 0 2006.230.01:15:17.18#ibcon#*before return 0, iclass 11, count 0 2006.230.01:15:17.18#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:17.18#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:17.18#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.01:15:17.18#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.01:15:17.18$vck44/valo=4,624.99 2006.230.01:15:17.18#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.01:15:17.18#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.01:15:17.18#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:17.18#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:17.18#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:17.18#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:17.18#ibcon#enter wrdev, iclass 13, count 0 2006.230.01:15:17.18#ibcon#first serial, iclass 13, count 0 2006.230.01:15:17.18#ibcon#enter sib2, iclass 13, count 0 2006.230.01:15:17.18#ibcon#flushed, iclass 13, count 0 2006.230.01:15:17.18#ibcon#about to write, iclass 13, count 0 2006.230.01:15:17.18#ibcon#wrote, iclass 13, count 0 2006.230.01:15:17.18#ibcon#about to read 3, iclass 13, count 0 2006.230.01:15:17.20#ibcon#read 3, iclass 13, count 0 2006.230.01:15:17.20#ibcon#about to read 4, iclass 13, count 0 2006.230.01:15:17.20#ibcon#read 4, iclass 13, count 0 2006.230.01:15:17.20#ibcon#about to read 5, iclass 13, count 0 2006.230.01:15:17.20#ibcon#read 5, iclass 13, count 0 2006.230.01:15:17.20#ibcon#about to read 6, iclass 13, count 0 2006.230.01:15:17.20#ibcon#read 6, iclass 13, count 0 2006.230.01:15:17.20#ibcon#end of sib2, iclass 13, count 0 2006.230.01:15:17.20#ibcon#*mode == 0, iclass 13, count 0 2006.230.01:15:17.20#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.01:15:17.20#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:15:17.20#ibcon#*before write, iclass 13, count 0 2006.230.01:15:17.20#ibcon#enter sib2, iclass 13, count 0 2006.230.01:15:17.20#ibcon#flushed, iclass 13, count 0 2006.230.01:15:17.20#ibcon#about to write, iclass 13, count 0 2006.230.01:15:17.20#ibcon#wrote, iclass 13, count 0 2006.230.01:15:17.20#ibcon#about to read 3, iclass 13, count 0 2006.230.01:15:17.24#ibcon#read 3, iclass 13, count 0 2006.230.01:15:17.24#ibcon#about to read 4, iclass 13, count 0 2006.230.01:15:17.24#ibcon#read 4, iclass 13, count 0 2006.230.01:15:17.24#ibcon#about to read 5, iclass 13, count 0 2006.230.01:15:17.24#ibcon#read 5, iclass 13, count 0 2006.230.01:15:17.24#ibcon#about to read 6, iclass 13, count 0 2006.230.01:15:17.24#ibcon#read 6, iclass 13, count 0 2006.230.01:15:17.24#ibcon#end of sib2, iclass 13, count 0 2006.230.01:15:17.24#ibcon#*after write, iclass 13, count 0 2006.230.01:15:17.24#ibcon#*before return 0, iclass 13, count 0 2006.230.01:15:17.24#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:17.24#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:17.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.01:15:17.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.01:15:17.24$vck44/va=4,7 2006.230.01:15:17.24#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.01:15:17.24#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.01:15:17.24#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:17.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:17.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:17.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:17.30#ibcon#enter wrdev, iclass 15, count 2 2006.230.01:15:17.30#ibcon#first serial, iclass 15, count 2 2006.230.01:15:17.30#ibcon#enter sib2, iclass 15, count 2 2006.230.01:15:17.30#ibcon#flushed, iclass 15, count 2 2006.230.01:15:17.30#ibcon#about to write, iclass 15, count 2 2006.230.01:15:17.30#ibcon#wrote, iclass 15, count 2 2006.230.01:15:17.30#ibcon#about to read 3, iclass 15, count 2 2006.230.01:15:17.32#ibcon#read 3, iclass 15, count 2 2006.230.01:15:17.32#ibcon#about to read 4, iclass 15, count 2 2006.230.01:15:17.32#ibcon#read 4, iclass 15, count 2 2006.230.01:15:17.32#ibcon#about to read 5, iclass 15, count 2 2006.230.01:15:17.32#ibcon#read 5, iclass 15, count 2 2006.230.01:15:17.32#ibcon#about to read 6, iclass 15, count 2 2006.230.01:15:17.32#ibcon#read 6, iclass 15, count 2 2006.230.01:15:17.32#ibcon#end of sib2, iclass 15, count 2 2006.230.01:15:17.32#ibcon#*mode == 0, iclass 15, count 2 2006.230.01:15:17.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.01:15:17.32#ibcon#[25=AT04-07\r\n] 2006.230.01:15:17.32#ibcon#*before write, iclass 15, count 2 2006.230.01:15:17.32#ibcon#enter sib2, iclass 15, count 2 2006.230.01:15:17.32#ibcon#flushed, iclass 15, count 2 2006.230.01:15:17.32#ibcon#about to write, iclass 15, count 2 2006.230.01:15:17.32#ibcon#wrote, iclass 15, count 2 2006.230.01:15:17.32#ibcon#about to read 3, iclass 15, count 2 2006.230.01:15:17.35#ibcon#read 3, iclass 15, count 2 2006.230.01:15:17.35#ibcon#about to read 4, iclass 15, count 2 2006.230.01:15:17.35#ibcon#read 4, iclass 15, count 2 2006.230.01:15:17.35#ibcon#about to read 5, iclass 15, count 2 2006.230.01:15:17.35#ibcon#read 5, iclass 15, count 2 2006.230.01:15:17.35#ibcon#about to read 6, iclass 15, count 2 2006.230.01:15:17.35#ibcon#read 6, iclass 15, count 2 2006.230.01:15:17.35#ibcon#end of sib2, iclass 15, count 2 2006.230.01:15:17.35#ibcon#*after write, iclass 15, count 2 2006.230.01:15:17.35#ibcon#*before return 0, iclass 15, count 2 2006.230.01:15:17.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:17.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:17.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.01:15:17.35#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:17.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:17.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:17.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:17.47#ibcon#enter wrdev, iclass 15, count 0 2006.230.01:15:17.47#ibcon#first serial, iclass 15, count 0 2006.230.01:15:17.47#ibcon#enter sib2, iclass 15, count 0 2006.230.01:15:17.47#ibcon#flushed, iclass 15, count 0 2006.230.01:15:17.47#ibcon#about to write, iclass 15, count 0 2006.230.01:15:17.47#ibcon#wrote, iclass 15, count 0 2006.230.01:15:17.47#ibcon#about to read 3, iclass 15, count 0 2006.230.01:15:17.49#ibcon#read 3, iclass 15, count 0 2006.230.01:15:17.49#ibcon#about to read 4, iclass 15, count 0 2006.230.01:15:17.49#ibcon#read 4, iclass 15, count 0 2006.230.01:15:17.49#ibcon#about to read 5, iclass 15, count 0 2006.230.01:15:17.49#ibcon#read 5, iclass 15, count 0 2006.230.01:15:17.49#ibcon#about to read 6, iclass 15, count 0 2006.230.01:15:17.49#ibcon#read 6, iclass 15, count 0 2006.230.01:15:17.49#ibcon#end of sib2, iclass 15, count 0 2006.230.01:15:17.49#ibcon#*mode == 0, iclass 15, count 0 2006.230.01:15:17.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.01:15:17.49#ibcon#[25=USB\r\n] 2006.230.01:15:17.49#ibcon#*before write, iclass 15, count 0 2006.230.01:15:17.49#ibcon#enter sib2, iclass 15, count 0 2006.230.01:15:17.49#ibcon#flushed, iclass 15, count 0 2006.230.01:15:17.49#ibcon#about to write, iclass 15, count 0 2006.230.01:15:17.49#ibcon#wrote, iclass 15, count 0 2006.230.01:15:17.49#ibcon#about to read 3, iclass 15, count 0 2006.230.01:15:17.52#ibcon#read 3, iclass 15, count 0 2006.230.01:15:17.52#ibcon#about to read 4, iclass 15, count 0 2006.230.01:15:17.52#ibcon#read 4, iclass 15, count 0 2006.230.01:15:17.52#ibcon#about to read 5, iclass 15, count 0 2006.230.01:15:17.52#ibcon#read 5, iclass 15, count 0 2006.230.01:15:17.52#ibcon#about to read 6, iclass 15, count 0 2006.230.01:15:17.52#ibcon#read 6, iclass 15, count 0 2006.230.01:15:17.52#ibcon#end of sib2, iclass 15, count 0 2006.230.01:15:17.52#ibcon#*after write, iclass 15, count 0 2006.230.01:15:17.52#ibcon#*before return 0, iclass 15, count 0 2006.230.01:15:17.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:17.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:17.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.01:15:17.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.01:15:17.52$vck44/valo=5,734.99 2006.230.01:15:17.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.01:15:17.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.01:15:17.52#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:17.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:17.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:17.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:17.52#ibcon#enter wrdev, iclass 17, count 0 2006.230.01:15:17.52#ibcon#first serial, iclass 17, count 0 2006.230.01:15:17.52#ibcon#enter sib2, iclass 17, count 0 2006.230.01:15:17.52#ibcon#flushed, iclass 17, count 0 2006.230.01:15:17.52#ibcon#about to write, iclass 17, count 0 2006.230.01:15:17.52#ibcon#wrote, iclass 17, count 0 2006.230.01:15:17.52#ibcon#about to read 3, iclass 17, count 0 2006.230.01:15:17.54#ibcon#read 3, iclass 17, count 0 2006.230.01:15:17.54#ibcon#about to read 4, iclass 17, count 0 2006.230.01:15:17.54#ibcon#read 4, iclass 17, count 0 2006.230.01:15:17.54#ibcon#about to read 5, iclass 17, count 0 2006.230.01:15:17.54#ibcon#read 5, iclass 17, count 0 2006.230.01:15:17.54#ibcon#about to read 6, iclass 17, count 0 2006.230.01:15:17.54#ibcon#read 6, iclass 17, count 0 2006.230.01:15:17.54#ibcon#end of sib2, iclass 17, count 0 2006.230.01:15:17.54#ibcon#*mode == 0, iclass 17, count 0 2006.230.01:15:17.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.01:15:17.54#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:15:17.54#ibcon#*before write, iclass 17, count 0 2006.230.01:15:17.54#ibcon#enter sib2, iclass 17, count 0 2006.230.01:15:17.54#ibcon#flushed, iclass 17, count 0 2006.230.01:15:17.54#ibcon#about to write, iclass 17, count 0 2006.230.01:15:17.54#ibcon#wrote, iclass 17, count 0 2006.230.01:15:17.54#ibcon#about to read 3, iclass 17, count 0 2006.230.01:15:17.58#ibcon#read 3, iclass 17, count 0 2006.230.01:15:17.58#ibcon#about to read 4, iclass 17, count 0 2006.230.01:15:17.58#ibcon#read 4, iclass 17, count 0 2006.230.01:15:17.58#ibcon#about to read 5, iclass 17, count 0 2006.230.01:15:17.58#ibcon#read 5, iclass 17, count 0 2006.230.01:15:17.58#ibcon#about to read 6, iclass 17, count 0 2006.230.01:15:17.58#ibcon#read 6, iclass 17, count 0 2006.230.01:15:17.58#ibcon#end of sib2, iclass 17, count 0 2006.230.01:15:17.58#ibcon#*after write, iclass 17, count 0 2006.230.01:15:17.58#ibcon#*before return 0, iclass 17, count 0 2006.230.01:15:17.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:17.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:17.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.01:15:17.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.01:15:17.58$vck44/va=5,4 2006.230.01:15:17.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.01:15:17.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.01:15:17.58#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:17.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:17.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:17.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:17.64#ibcon#enter wrdev, iclass 19, count 2 2006.230.01:15:17.64#ibcon#first serial, iclass 19, count 2 2006.230.01:15:17.64#ibcon#enter sib2, iclass 19, count 2 2006.230.01:15:17.64#ibcon#flushed, iclass 19, count 2 2006.230.01:15:17.64#ibcon#about to write, iclass 19, count 2 2006.230.01:15:17.64#ibcon#wrote, iclass 19, count 2 2006.230.01:15:17.64#ibcon#about to read 3, iclass 19, count 2 2006.230.01:15:17.66#ibcon#read 3, iclass 19, count 2 2006.230.01:15:17.66#ibcon#about to read 4, iclass 19, count 2 2006.230.01:15:17.66#ibcon#read 4, iclass 19, count 2 2006.230.01:15:17.66#ibcon#about to read 5, iclass 19, count 2 2006.230.01:15:17.66#ibcon#read 5, iclass 19, count 2 2006.230.01:15:17.66#ibcon#about to read 6, iclass 19, count 2 2006.230.01:15:17.66#ibcon#read 6, iclass 19, count 2 2006.230.01:15:17.66#ibcon#end of sib2, iclass 19, count 2 2006.230.01:15:17.66#ibcon#*mode == 0, iclass 19, count 2 2006.230.01:15:17.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.01:15:17.66#ibcon#[25=AT05-04\r\n] 2006.230.01:15:17.66#ibcon#*before write, iclass 19, count 2 2006.230.01:15:17.66#ibcon#enter sib2, iclass 19, count 2 2006.230.01:15:17.66#ibcon#flushed, iclass 19, count 2 2006.230.01:15:17.66#ibcon#about to write, iclass 19, count 2 2006.230.01:15:17.66#ibcon#wrote, iclass 19, count 2 2006.230.01:15:17.66#ibcon#about to read 3, iclass 19, count 2 2006.230.01:15:17.69#ibcon#read 3, iclass 19, count 2 2006.230.01:15:17.69#ibcon#about to read 4, iclass 19, count 2 2006.230.01:15:17.69#ibcon#read 4, iclass 19, count 2 2006.230.01:15:17.69#ibcon#about to read 5, iclass 19, count 2 2006.230.01:15:17.69#ibcon#read 5, iclass 19, count 2 2006.230.01:15:17.69#ibcon#about to read 6, iclass 19, count 2 2006.230.01:15:17.69#ibcon#read 6, iclass 19, count 2 2006.230.01:15:17.69#ibcon#end of sib2, iclass 19, count 2 2006.230.01:15:17.69#ibcon#*after write, iclass 19, count 2 2006.230.01:15:17.69#ibcon#*before return 0, iclass 19, count 2 2006.230.01:15:17.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:17.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:17.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.01:15:17.69#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:17.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:17.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:17.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:17.81#ibcon#enter wrdev, iclass 19, count 0 2006.230.01:15:17.81#ibcon#first serial, iclass 19, count 0 2006.230.01:15:17.81#ibcon#enter sib2, iclass 19, count 0 2006.230.01:15:17.81#ibcon#flushed, iclass 19, count 0 2006.230.01:15:17.81#ibcon#about to write, iclass 19, count 0 2006.230.01:15:17.81#ibcon#wrote, iclass 19, count 0 2006.230.01:15:17.81#ibcon#about to read 3, iclass 19, count 0 2006.230.01:15:17.83#ibcon#read 3, iclass 19, count 0 2006.230.01:15:17.83#ibcon#about to read 4, iclass 19, count 0 2006.230.01:15:17.83#ibcon#read 4, iclass 19, count 0 2006.230.01:15:17.83#ibcon#about to read 5, iclass 19, count 0 2006.230.01:15:17.83#ibcon#read 5, iclass 19, count 0 2006.230.01:15:17.83#ibcon#about to read 6, iclass 19, count 0 2006.230.01:15:17.83#ibcon#read 6, iclass 19, count 0 2006.230.01:15:17.83#ibcon#end of sib2, iclass 19, count 0 2006.230.01:15:17.83#ibcon#*mode == 0, iclass 19, count 0 2006.230.01:15:17.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.01:15:17.83#ibcon#[25=USB\r\n] 2006.230.01:15:17.83#ibcon#*before write, iclass 19, count 0 2006.230.01:15:17.83#ibcon#enter sib2, iclass 19, count 0 2006.230.01:15:17.83#ibcon#flushed, iclass 19, count 0 2006.230.01:15:17.83#ibcon#about to write, iclass 19, count 0 2006.230.01:15:17.83#ibcon#wrote, iclass 19, count 0 2006.230.01:15:17.83#ibcon#about to read 3, iclass 19, count 0 2006.230.01:15:17.86#ibcon#read 3, iclass 19, count 0 2006.230.01:15:17.86#ibcon#about to read 4, iclass 19, count 0 2006.230.01:15:17.86#ibcon#read 4, iclass 19, count 0 2006.230.01:15:17.86#ibcon#about to read 5, iclass 19, count 0 2006.230.01:15:17.86#ibcon#read 5, iclass 19, count 0 2006.230.01:15:17.86#ibcon#about to read 6, iclass 19, count 0 2006.230.01:15:17.86#ibcon#read 6, iclass 19, count 0 2006.230.01:15:17.86#ibcon#end of sib2, iclass 19, count 0 2006.230.01:15:17.86#ibcon#*after write, iclass 19, count 0 2006.230.01:15:17.86#ibcon#*before return 0, iclass 19, count 0 2006.230.01:15:17.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:17.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:17.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.01:15:17.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.01:15:17.86$vck44/valo=6,814.99 2006.230.01:15:17.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.01:15:17.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.01:15:17.86#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:17.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:17.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:17.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:17.86#ibcon#enter wrdev, iclass 21, count 0 2006.230.01:15:17.86#ibcon#first serial, iclass 21, count 0 2006.230.01:15:17.86#ibcon#enter sib2, iclass 21, count 0 2006.230.01:15:17.86#ibcon#flushed, iclass 21, count 0 2006.230.01:15:17.86#ibcon#about to write, iclass 21, count 0 2006.230.01:15:17.86#ibcon#wrote, iclass 21, count 0 2006.230.01:15:17.86#ibcon#about to read 3, iclass 21, count 0 2006.230.01:15:17.88#ibcon#read 3, iclass 21, count 0 2006.230.01:15:17.88#ibcon#about to read 4, iclass 21, count 0 2006.230.01:15:17.88#ibcon#read 4, iclass 21, count 0 2006.230.01:15:17.88#ibcon#about to read 5, iclass 21, count 0 2006.230.01:15:17.88#ibcon#read 5, iclass 21, count 0 2006.230.01:15:17.88#ibcon#about to read 6, iclass 21, count 0 2006.230.01:15:17.88#ibcon#read 6, iclass 21, count 0 2006.230.01:15:17.88#ibcon#end of sib2, iclass 21, count 0 2006.230.01:15:17.88#ibcon#*mode == 0, iclass 21, count 0 2006.230.01:15:17.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.01:15:17.88#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:15:17.88#ibcon#*before write, iclass 21, count 0 2006.230.01:15:17.88#ibcon#enter sib2, iclass 21, count 0 2006.230.01:15:17.88#ibcon#flushed, iclass 21, count 0 2006.230.01:15:17.88#ibcon#about to write, iclass 21, count 0 2006.230.01:15:17.88#ibcon#wrote, iclass 21, count 0 2006.230.01:15:17.88#ibcon#about to read 3, iclass 21, count 0 2006.230.01:15:17.92#ibcon#read 3, iclass 21, count 0 2006.230.01:15:17.92#ibcon#about to read 4, iclass 21, count 0 2006.230.01:15:17.92#ibcon#read 4, iclass 21, count 0 2006.230.01:15:17.92#ibcon#about to read 5, iclass 21, count 0 2006.230.01:15:17.92#ibcon#read 5, iclass 21, count 0 2006.230.01:15:17.92#ibcon#about to read 6, iclass 21, count 0 2006.230.01:15:17.92#ibcon#read 6, iclass 21, count 0 2006.230.01:15:17.92#ibcon#end of sib2, iclass 21, count 0 2006.230.01:15:17.92#ibcon#*after write, iclass 21, count 0 2006.230.01:15:17.92#ibcon#*before return 0, iclass 21, count 0 2006.230.01:15:17.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:17.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:17.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.01:15:17.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.01:15:17.92$vck44/va=6,4 2006.230.01:15:17.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.01:15:17.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.01:15:17.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:17.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:17.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:17.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:17.98#ibcon#enter wrdev, iclass 23, count 2 2006.230.01:15:17.98#ibcon#first serial, iclass 23, count 2 2006.230.01:15:17.98#ibcon#enter sib2, iclass 23, count 2 2006.230.01:15:17.98#ibcon#flushed, iclass 23, count 2 2006.230.01:15:17.98#ibcon#about to write, iclass 23, count 2 2006.230.01:15:17.98#ibcon#wrote, iclass 23, count 2 2006.230.01:15:17.98#ibcon#about to read 3, iclass 23, count 2 2006.230.01:15:18.00#ibcon#read 3, iclass 23, count 2 2006.230.01:15:18.00#ibcon#about to read 4, iclass 23, count 2 2006.230.01:15:18.00#ibcon#read 4, iclass 23, count 2 2006.230.01:15:18.00#ibcon#about to read 5, iclass 23, count 2 2006.230.01:15:18.00#ibcon#read 5, iclass 23, count 2 2006.230.01:15:18.00#ibcon#about to read 6, iclass 23, count 2 2006.230.01:15:18.00#ibcon#read 6, iclass 23, count 2 2006.230.01:15:18.00#ibcon#end of sib2, iclass 23, count 2 2006.230.01:15:18.00#ibcon#*mode == 0, iclass 23, count 2 2006.230.01:15:18.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.01:15:18.00#ibcon#[25=AT06-04\r\n] 2006.230.01:15:18.00#ibcon#*before write, iclass 23, count 2 2006.230.01:15:18.00#ibcon#enter sib2, iclass 23, count 2 2006.230.01:15:18.00#ibcon#flushed, iclass 23, count 2 2006.230.01:15:18.00#ibcon#about to write, iclass 23, count 2 2006.230.01:15:18.00#ibcon#wrote, iclass 23, count 2 2006.230.01:15:18.00#ibcon#about to read 3, iclass 23, count 2 2006.230.01:15:18.03#ibcon#read 3, iclass 23, count 2 2006.230.01:15:18.03#ibcon#about to read 4, iclass 23, count 2 2006.230.01:15:18.03#ibcon#read 4, iclass 23, count 2 2006.230.01:15:18.03#ibcon#about to read 5, iclass 23, count 2 2006.230.01:15:18.03#ibcon#read 5, iclass 23, count 2 2006.230.01:15:18.03#ibcon#about to read 6, iclass 23, count 2 2006.230.01:15:18.03#ibcon#read 6, iclass 23, count 2 2006.230.01:15:18.03#ibcon#end of sib2, iclass 23, count 2 2006.230.01:15:18.03#ibcon#*after write, iclass 23, count 2 2006.230.01:15:18.03#ibcon#*before return 0, iclass 23, count 2 2006.230.01:15:18.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:18.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:18.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.01:15:18.03#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:18.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:18.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:18.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:18.15#ibcon#enter wrdev, iclass 23, count 0 2006.230.01:15:18.15#ibcon#first serial, iclass 23, count 0 2006.230.01:15:18.15#ibcon#enter sib2, iclass 23, count 0 2006.230.01:15:18.15#ibcon#flushed, iclass 23, count 0 2006.230.01:15:18.15#ibcon#about to write, iclass 23, count 0 2006.230.01:15:18.15#ibcon#wrote, iclass 23, count 0 2006.230.01:15:18.15#ibcon#about to read 3, iclass 23, count 0 2006.230.01:15:18.17#ibcon#read 3, iclass 23, count 0 2006.230.01:15:18.17#ibcon#about to read 4, iclass 23, count 0 2006.230.01:15:18.17#ibcon#read 4, iclass 23, count 0 2006.230.01:15:18.17#ibcon#about to read 5, iclass 23, count 0 2006.230.01:15:18.17#ibcon#read 5, iclass 23, count 0 2006.230.01:15:18.17#ibcon#about to read 6, iclass 23, count 0 2006.230.01:15:18.17#ibcon#read 6, iclass 23, count 0 2006.230.01:15:18.17#ibcon#end of sib2, iclass 23, count 0 2006.230.01:15:18.17#ibcon#*mode == 0, iclass 23, count 0 2006.230.01:15:18.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.01:15:18.17#ibcon#[25=USB\r\n] 2006.230.01:15:18.17#ibcon#*before write, iclass 23, count 0 2006.230.01:15:18.17#ibcon#enter sib2, iclass 23, count 0 2006.230.01:15:18.17#ibcon#flushed, iclass 23, count 0 2006.230.01:15:18.17#ibcon#about to write, iclass 23, count 0 2006.230.01:15:18.17#ibcon#wrote, iclass 23, count 0 2006.230.01:15:18.17#ibcon#about to read 3, iclass 23, count 0 2006.230.01:15:18.20#ibcon#read 3, iclass 23, count 0 2006.230.01:15:18.20#ibcon#about to read 4, iclass 23, count 0 2006.230.01:15:18.20#ibcon#read 4, iclass 23, count 0 2006.230.01:15:18.20#ibcon#about to read 5, iclass 23, count 0 2006.230.01:15:18.20#ibcon#read 5, iclass 23, count 0 2006.230.01:15:18.20#ibcon#about to read 6, iclass 23, count 0 2006.230.01:15:18.20#ibcon#read 6, iclass 23, count 0 2006.230.01:15:18.20#ibcon#end of sib2, iclass 23, count 0 2006.230.01:15:18.20#ibcon#*after write, iclass 23, count 0 2006.230.01:15:18.20#ibcon#*before return 0, iclass 23, count 0 2006.230.01:15:18.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:18.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:18.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.01:15:18.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.01:15:18.20$vck44/valo=7,864.99 2006.230.01:15:18.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.01:15:18.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.01:15:18.20#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:18.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:18.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:18.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:18.20#ibcon#enter wrdev, iclass 25, count 0 2006.230.01:15:18.20#ibcon#first serial, iclass 25, count 0 2006.230.01:15:18.20#ibcon#enter sib2, iclass 25, count 0 2006.230.01:15:18.20#ibcon#flushed, iclass 25, count 0 2006.230.01:15:18.20#ibcon#about to write, iclass 25, count 0 2006.230.01:15:18.20#ibcon#wrote, iclass 25, count 0 2006.230.01:15:18.20#ibcon#about to read 3, iclass 25, count 0 2006.230.01:15:18.22#ibcon#read 3, iclass 25, count 0 2006.230.01:15:18.22#ibcon#about to read 4, iclass 25, count 0 2006.230.01:15:18.22#ibcon#read 4, iclass 25, count 0 2006.230.01:15:18.22#ibcon#about to read 5, iclass 25, count 0 2006.230.01:15:18.22#ibcon#read 5, iclass 25, count 0 2006.230.01:15:18.22#ibcon#about to read 6, iclass 25, count 0 2006.230.01:15:18.22#ibcon#read 6, iclass 25, count 0 2006.230.01:15:18.22#ibcon#end of sib2, iclass 25, count 0 2006.230.01:15:18.22#ibcon#*mode == 0, iclass 25, count 0 2006.230.01:15:18.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.01:15:18.22#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:15:18.22#ibcon#*before write, iclass 25, count 0 2006.230.01:15:18.22#ibcon#enter sib2, iclass 25, count 0 2006.230.01:15:18.22#ibcon#flushed, iclass 25, count 0 2006.230.01:15:18.22#ibcon#about to write, iclass 25, count 0 2006.230.01:15:18.22#ibcon#wrote, iclass 25, count 0 2006.230.01:15:18.22#ibcon#about to read 3, iclass 25, count 0 2006.230.01:15:18.26#ibcon#read 3, iclass 25, count 0 2006.230.01:15:18.26#ibcon#about to read 4, iclass 25, count 0 2006.230.01:15:18.26#ibcon#read 4, iclass 25, count 0 2006.230.01:15:18.26#ibcon#about to read 5, iclass 25, count 0 2006.230.01:15:18.26#ibcon#read 5, iclass 25, count 0 2006.230.01:15:18.26#ibcon#about to read 6, iclass 25, count 0 2006.230.01:15:18.26#ibcon#read 6, iclass 25, count 0 2006.230.01:15:18.26#ibcon#end of sib2, iclass 25, count 0 2006.230.01:15:18.26#ibcon#*after write, iclass 25, count 0 2006.230.01:15:18.26#ibcon#*before return 0, iclass 25, count 0 2006.230.01:15:18.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:18.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:18.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.01:15:18.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.01:15:18.26$vck44/va=7,5 2006.230.01:15:18.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.01:15:18.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.01:15:18.26#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:18.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:18.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:18.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:18.32#ibcon#enter wrdev, iclass 27, count 2 2006.230.01:15:18.32#ibcon#first serial, iclass 27, count 2 2006.230.01:15:18.32#ibcon#enter sib2, iclass 27, count 2 2006.230.01:15:18.32#ibcon#flushed, iclass 27, count 2 2006.230.01:15:18.32#ibcon#about to write, iclass 27, count 2 2006.230.01:15:18.32#ibcon#wrote, iclass 27, count 2 2006.230.01:15:18.32#ibcon#about to read 3, iclass 27, count 2 2006.230.01:15:18.34#ibcon#read 3, iclass 27, count 2 2006.230.01:15:18.34#ibcon#about to read 4, iclass 27, count 2 2006.230.01:15:18.34#ibcon#read 4, iclass 27, count 2 2006.230.01:15:18.34#ibcon#about to read 5, iclass 27, count 2 2006.230.01:15:18.34#ibcon#read 5, iclass 27, count 2 2006.230.01:15:18.34#ibcon#about to read 6, iclass 27, count 2 2006.230.01:15:18.34#ibcon#read 6, iclass 27, count 2 2006.230.01:15:18.34#ibcon#end of sib2, iclass 27, count 2 2006.230.01:15:18.34#ibcon#*mode == 0, iclass 27, count 2 2006.230.01:15:18.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.01:15:18.34#ibcon#[25=AT07-05\r\n] 2006.230.01:15:18.34#ibcon#*before write, iclass 27, count 2 2006.230.01:15:18.34#ibcon#enter sib2, iclass 27, count 2 2006.230.01:15:18.34#ibcon#flushed, iclass 27, count 2 2006.230.01:15:18.34#ibcon#about to write, iclass 27, count 2 2006.230.01:15:18.34#ibcon#wrote, iclass 27, count 2 2006.230.01:15:18.34#ibcon#about to read 3, iclass 27, count 2 2006.230.01:15:18.37#ibcon#read 3, iclass 27, count 2 2006.230.01:15:18.37#ibcon#about to read 4, iclass 27, count 2 2006.230.01:15:18.37#ibcon#read 4, iclass 27, count 2 2006.230.01:15:18.37#ibcon#about to read 5, iclass 27, count 2 2006.230.01:15:18.37#ibcon#read 5, iclass 27, count 2 2006.230.01:15:18.37#ibcon#about to read 6, iclass 27, count 2 2006.230.01:15:18.37#ibcon#read 6, iclass 27, count 2 2006.230.01:15:18.37#ibcon#end of sib2, iclass 27, count 2 2006.230.01:15:18.37#ibcon#*after write, iclass 27, count 2 2006.230.01:15:18.37#ibcon#*before return 0, iclass 27, count 2 2006.230.01:15:18.37#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:18.37#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:18.37#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.01:15:18.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:18.37#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:18.49#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:18.49#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:18.49#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:15:18.49#ibcon#first serial, iclass 27, count 0 2006.230.01:15:18.49#ibcon#enter sib2, iclass 27, count 0 2006.230.01:15:18.49#ibcon#flushed, iclass 27, count 0 2006.230.01:15:18.49#ibcon#about to write, iclass 27, count 0 2006.230.01:15:18.49#ibcon#wrote, iclass 27, count 0 2006.230.01:15:18.49#ibcon#about to read 3, iclass 27, count 0 2006.230.01:15:18.51#ibcon#read 3, iclass 27, count 0 2006.230.01:15:18.51#ibcon#about to read 4, iclass 27, count 0 2006.230.01:15:18.51#ibcon#read 4, iclass 27, count 0 2006.230.01:15:18.51#ibcon#about to read 5, iclass 27, count 0 2006.230.01:15:18.51#ibcon#read 5, iclass 27, count 0 2006.230.01:15:18.51#ibcon#about to read 6, iclass 27, count 0 2006.230.01:15:18.51#ibcon#read 6, iclass 27, count 0 2006.230.01:15:18.51#ibcon#end of sib2, iclass 27, count 0 2006.230.01:15:18.51#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:15:18.51#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:15:18.51#ibcon#[25=USB\r\n] 2006.230.01:15:18.51#ibcon#*before write, iclass 27, count 0 2006.230.01:15:18.51#ibcon#enter sib2, iclass 27, count 0 2006.230.01:15:18.51#ibcon#flushed, iclass 27, count 0 2006.230.01:15:18.51#ibcon#about to write, iclass 27, count 0 2006.230.01:15:18.51#ibcon#wrote, iclass 27, count 0 2006.230.01:15:18.51#ibcon#about to read 3, iclass 27, count 0 2006.230.01:15:18.54#ibcon#read 3, iclass 27, count 0 2006.230.01:15:18.54#ibcon#about to read 4, iclass 27, count 0 2006.230.01:15:18.54#ibcon#read 4, iclass 27, count 0 2006.230.01:15:18.54#ibcon#about to read 5, iclass 27, count 0 2006.230.01:15:18.54#ibcon#read 5, iclass 27, count 0 2006.230.01:15:18.54#ibcon#about to read 6, iclass 27, count 0 2006.230.01:15:18.54#ibcon#read 6, iclass 27, count 0 2006.230.01:15:18.54#ibcon#end of sib2, iclass 27, count 0 2006.230.01:15:18.54#ibcon#*after write, iclass 27, count 0 2006.230.01:15:18.54#ibcon#*before return 0, iclass 27, count 0 2006.230.01:15:18.54#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:18.54#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:18.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:15:18.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:15:18.54$vck44/valo=8,884.99 2006.230.01:15:18.54#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.01:15:18.54#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.01:15:18.54#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:18.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:18.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:18.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:18.54#ibcon#enter wrdev, iclass 29, count 0 2006.230.01:15:18.54#ibcon#first serial, iclass 29, count 0 2006.230.01:15:18.54#ibcon#enter sib2, iclass 29, count 0 2006.230.01:15:18.54#ibcon#flushed, iclass 29, count 0 2006.230.01:15:18.54#ibcon#about to write, iclass 29, count 0 2006.230.01:15:18.54#ibcon#wrote, iclass 29, count 0 2006.230.01:15:18.54#ibcon#about to read 3, iclass 29, count 0 2006.230.01:15:18.56#ibcon#read 3, iclass 29, count 0 2006.230.01:15:18.56#ibcon#about to read 4, iclass 29, count 0 2006.230.01:15:18.56#ibcon#read 4, iclass 29, count 0 2006.230.01:15:18.56#ibcon#about to read 5, iclass 29, count 0 2006.230.01:15:18.56#ibcon#read 5, iclass 29, count 0 2006.230.01:15:18.56#ibcon#about to read 6, iclass 29, count 0 2006.230.01:15:18.56#ibcon#read 6, iclass 29, count 0 2006.230.01:15:18.56#ibcon#end of sib2, iclass 29, count 0 2006.230.01:15:18.56#ibcon#*mode == 0, iclass 29, count 0 2006.230.01:15:18.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.01:15:18.56#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:15:18.56#ibcon#*before write, iclass 29, count 0 2006.230.01:15:18.56#ibcon#enter sib2, iclass 29, count 0 2006.230.01:15:18.56#ibcon#flushed, iclass 29, count 0 2006.230.01:15:18.56#ibcon#about to write, iclass 29, count 0 2006.230.01:15:18.56#ibcon#wrote, iclass 29, count 0 2006.230.01:15:18.56#ibcon#about to read 3, iclass 29, count 0 2006.230.01:15:18.60#ibcon#read 3, iclass 29, count 0 2006.230.01:15:18.60#ibcon#about to read 4, iclass 29, count 0 2006.230.01:15:18.60#ibcon#read 4, iclass 29, count 0 2006.230.01:15:18.60#ibcon#about to read 5, iclass 29, count 0 2006.230.01:15:18.60#ibcon#read 5, iclass 29, count 0 2006.230.01:15:18.60#ibcon#about to read 6, iclass 29, count 0 2006.230.01:15:18.60#ibcon#read 6, iclass 29, count 0 2006.230.01:15:18.60#ibcon#end of sib2, iclass 29, count 0 2006.230.01:15:18.60#ibcon#*after write, iclass 29, count 0 2006.230.01:15:18.60#ibcon#*before return 0, iclass 29, count 0 2006.230.01:15:18.60#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:18.60#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:18.60#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.01:15:18.60#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.01:15:18.60$vck44/va=8,6 2006.230.01:15:18.60#ibcon#iclass 31 nclrec 2 cls_cnt 3 2006.230.01:15:18.60#ibcon#iclass 31 iclrec 1 cls_cnt 3 2006.230.01:15:18.60#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:18.60#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.01:15:18.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 2 2006.230.01:15:18.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.01:15:18.66#ibcon#enter wrdev, iclass 31, count 2 2006.230.01:15:18.66#ibcon#first serial, iclass 31, count 2 2006.230.01:15:18.66#ibcon#enter sib2, iclass 31, count 2 2006.230.01:15:18.66#ibcon#flushed, iclass 31, count 2 2006.230.01:15:18.66#ibcon#about to write, iclass 31, count 2 2006.230.01:15:18.66#ibcon#wrote, iclass 31, count 2 2006.230.01:15:18.66#ibcon#about to read 3, iclass 31, count 2 2006.230.01:15:18.68#ibcon#read 3, iclass 31, count 2 2006.230.01:15:18.68#ibcon#about to read 4, iclass 31, count 2 2006.230.01:15:18.68#ibcon#read 4, iclass 31, count 2 2006.230.01:15:18.68#ibcon#about to read 5, iclass 31, count 2 2006.230.01:15:18.68#ibcon#read 5, iclass 31, count 2 2006.230.01:15:18.68#ibcon#about to read 6, iclass 31, count 2 2006.230.01:15:18.68#ibcon#read 6, iclass 31, count 2 2006.230.01:15:18.68#ibcon#end of sib2, iclass 31, count 2 2006.230.01:15:18.68#ibcon#*mode == 0, iclass 31, count 2 2006.230.01:15:18.68#ibcon#*mode == 0 && serial, iclass 31, count 2 2006.230.01:15:18.68#ibcon#[25=AT08-06\r\n] 2006.230.01:15:18.68#ibcon#*before write, iclass 31, count 2 2006.230.01:15:18.68#ibcon#enter sib2, iclass 31, count 2 2006.230.01:15:18.68#ibcon#flushed, iclass 31, count 2 2006.230.01:15:18.68#ibcon#about to write, iclass 31, count 2 2006.230.01:15:18.68#ibcon#wrote, iclass 31, count 2 2006.230.01:15:18.68#ibcon#about to read 3, iclass 31, count 2 2006.230.01:15:18.71#ibcon#read 3, iclass 31, count 2 2006.230.01:15:18.71#ibcon#about to read 4, iclass 31, count 2 2006.230.01:15:18.71#ibcon#read 4, iclass 31, count 2 2006.230.01:15:18.71#ibcon#about to read 5, iclass 31, count 2 2006.230.01:15:18.71#ibcon#read 5, iclass 31, count 2 2006.230.01:15:18.71#ibcon#about to read 6, iclass 31, count 2 2006.230.01:15:18.71#ibcon#read 6, iclass 31, count 2 2006.230.01:15:18.71#ibcon#end of sib2, iclass 31, count 2 2006.230.01:15:18.71#ibcon#*after write, iclass 31, count 2 2006.230.01:15:18.71#ibcon#*before return 0, iclass 31, count 2 2006.230.01:15:18.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 2 2006.230.01:15:18.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 2 2006.230.01:15:18.71#ibcon#iclass 31 iclrec 2 cls_cnt 2 2006.230.01:15:18.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:18.71#ibcon#before find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.01:15:18.83#ibcon#after find_delay mode 2, iclass 31 iclrec 2 cls_cnt 0 2006.230.01:15:18.83#ibcon#before mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.01:15:18.83#ibcon#enter wrdev, iclass 31, count 0 2006.230.01:15:18.83#ibcon#first serial, iclass 31, count 0 2006.230.01:15:18.83#ibcon#enter sib2, iclass 31, count 0 2006.230.01:15:18.83#ibcon#flushed, iclass 31, count 0 2006.230.01:15:18.83#ibcon#about to write, iclass 31, count 0 2006.230.01:15:18.83#ibcon#wrote, iclass 31, count 0 2006.230.01:15:18.83#ibcon#about to read 3, iclass 31, count 0 2006.230.01:15:18.85#ibcon#read 3, iclass 31, count 0 2006.230.01:15:18.85#ibcon#about to read 4, iclass 31, count 0 2006.230.01:15:18.85#ibcon#read 4, iclass 31, count 0 2006.230.01:15:18.85#ibcon#about to read 5, iclass 31, count 0 2006.230.01:15:18.85#ibcon#read 5, iclass 31, count 0 2006.230.01:15:18.85#ibcon#about to read 6, iclass 31, count 0 2006.230.01:15:18.85#ibcon#read 6, iclass 31, count 0 2006.230.01:15:18.85#ibcon#end of sib2, iclass 31, count 0 2006.230.01:15:18.85#ibcon#*mode == 0, iclass 31, count 0 2006.230.01:15:18.85#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.01:15:18.85#ibcon#[25=USB\r\n] 2006.230.01:15:18.85#ibcon#*before write, iclass 31, count 0 2006.230.01:15:18.85#ibcon#enter sib2, iclass 31, count 0 2006.230.01:15:18.85#ibcon#flushed, iclass 31, count 0 2006.230.01:15:18.85#ibcon#about to write, iclass 31, count 0 2006.230.01:15:18.85#ibcon#wrote, iclass 31, count 0 2006.230.01:15:18.85#ibcon#about to read 3, iclass 31, count 0 2006.230.01:15:18.88#ibcon#read 3, iclass 31, count 0 2006.230.01:15:18.88#ibcon#about to read 4, iclass 31, count 0 2006.230.01:15:18.88#ibcon#read 4, iclass 31, count 0 2006.230.01:15:18.88#ibcon#about to read 5, iclass 31, count 0 2006.230.01:15:18.88#ibcon#read 5, iclass 31, count 0 2006.230.01:15:18.88#ibcon#about to read 6, iclass 31, count 0 2006.230.01:15:18.88#ibcon#read 6, iclass 31, count 0 2006.230.01:15:18.88#ibcon#end of sib2, iclass 31, count 0 2006.230.01:15:18.88#ibcon#*after write, iclass 31, count 0 2006.230.01:15:18.88#ibcon#*before return 0, iclass 31, count 0 2006.230.01:15:18.88#ibcon#after mode 2 write, iclass 31 iclrec 2 cls_cnt 0 2006.230.01:15:18.88#ibcon#end of loop, iclass 31 iclrec 2 cls_cnt 0 2006.230.01:15:18.88#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.01:15:18.88#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.01:15:18.88$vck44/vblo=1,629.99 2006.230.01:15:18.88#ibcon#iclass 33 nclrec 1 cls_cnt 2 2006.230.01:15:18.88#ibcon#iclass 33 iclrec 1 cls_cnt 2 2006.230.01:15:18.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:18.88#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.01:15:18.88#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 0 2006.230.01:15:18.88#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.01:15:18.88#ibcon#enter wrdev, iclass 33, count 0 2006.230.01:15:18.88#ibcon#first serial, iclass 33, count 0 2006.230.01:15:18.88#ibcon#enter sib2, iclass 33, count 0 2006.230.01:15:18.88#ibcon#flushed, iclass 33, count 0 2006.230.01:15:18.88#ibcon#about to write, iclass 33, count 0 2006.230.01:15:18.88#ibcon#wrote, iclass 33, count 0 2006.230.01:15:18.88#ibcon#about to read 3, iclass 33, count 0 2006.230.01:15:18.90#ibcon#read 3, iclass 33, count 0 2006.230.01:15:18.90#ibcon#about to read 4, iclass 33, count 0 2006.230.01:15:18.90#ibcon#read 4, iclass 33, count 0 2006.230.01:15:18.90#ibcon#about to read 5, iclass 33, count 0 2006.230.01:15:18.90#ibcon#read 5, iclass 33, count 0 2006.230.01:15:18.90#ibcon#about to read 6, iclass 33, count 0 2006.230.01:15:18.90#ibcon#read 6, iclass 33, count 0 2006.230.01:15:18.90#ibcon#end of sib2, iclass 33, count 0 2006.230.01:15:18.90#ibcon#*mode == 0, iclass 33, count 0 2006.230.01:15:18.90#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.01:15:18.90#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:15:18.90#ibcon#*before write, iclass 33, count 0 2006.230.01:15:18.90#ibcon#enter sib2, iclass 33, count 0 2006.230.01:15:18.90#ibcon#flushed, iclass 33, count 0 2006.230.01:15:18.90#ibcon#about to write, iclass 33, count 0 2006.230.01:15:18.90#ibcon#wrote, iclass 33, count 0 2006.230.01:15:18.90#ibcon#about to read 3, iclass 33, count 0 2006.230.01:15:18.94#ibcon#read 3, iclass 33, count 0 2006.230.01:15:18.94#ibcon#about to read 4, iclass 33, count 0 2006.230.01:15:18.94#ibcon#read 4, iclass 33, count 0 2006.230.01:15:18.94#ibcon#about to read 5, iclass 33, count 0 2006.230.01:15:18.94#ibcon#read 5, iclass 33, count 0 2006.230.01:15:18.94#ibcon#about to read 6, iclass 33, count 0 2006.230.01:15:18.94#ibcon#read 6, iclass 33, count 0 2006.230.01:15:18.94#ibcon#end of sib2, iclass 33, count 0 2006.230.01:15:18.94#ibcon#*after write, iclass 33, count 0 2006.230.01:15:18.94#ibcon#*before return 0, iclass 33, count 0 2006.230.01:15:18.94#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 0 2006.230.01:15:18.94#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 0 2006.230.01:15:18.94#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.01:15:18.94#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.01:15:18.94$vck44/vb=1,4 2006.230.01:15:18.94#ibcon#iclass 35 nclrec 2 cls_cnt 3 2006.230.01:15:18.94#ibcon#iclass 35 iclrec 1 cls_cnt 3 2006.230.01:15:18.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:18.94#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.01:15:18.94#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 2 2006.230.01:15:18.94#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.01:15:18.94#ibcon#enter wrdev, iclass 35, count 2 2006.230.01:15:18.94#ibcon#first serial, iclass 35, count 2 2006.230.01:15:18.94#ibcon#enter sib2, iclass 35, count 2 2006.230.01:15:18.94#ibcon#flushed, iclass 35, count 2 2006.230.01:15:18.94#ibcon#about to write, iclass 35, count 2 2006.230.01:15:18.94#ibcon#wrote, iclass 35, count 2 2006.230.01:15:18.94#ibcon#about to read 3, iclass 35, count 2 2006.230.01:15:18.96#ibcon#read 3, iclass 35, count 2 2006.230.01:15:18.96#ibcon#about to read 4, iclass 35, count 2 2006.230.01:15:18.96#ibcon#read 4, iclass 35, count 2 2006.230.01:15:18.96#ibcon#about to read 5, iclass 35, count 2 2006.230.01:15:18.96#ibcon#read 5, iclass 35, count 2 2006.230.01:15:18.96#ibcon#about to read 6, iclass 35, count 2 2006.230.01:15:18.96#ibcon#read 6, iclass 35, count 2 2006.230.01:15:18.96#ibcon#end of sib2, iclass 35, count 2 2006.230.01:15:18.96#ibcon#*mode == 0, iclass 35, count 2 2006.230.01:15:18.96#ibcon#*mode == 0 && serial, iclass 35, count 2 2006.230.01:15:18.96#ibcon#[27=AT01-04\r\n] 2006.230.01:15:18.96#ibcon#*before write, iclass 35, count 2 2006.230.01:15:18.96#ibcon#enter sib2, iclass 35, count 2 2006.230.01:15:18.96#ibcon#flushed, iclass 35, count 2 2006.230.01:15:18.96#ibcon#about to write, iclass 35, count 2 2006.230.01:15:18.96#ibcon#wrote, iclass 35, count 2 2006.230.01:15:18.96#ibcon#about to read 3, iclass 35, count 2 2006.230.01:15:18.99#ibcon#read 3, iclass 35, count 2 2006.230.01:15:18.99#ibcon#about to read 4, iclass 35, count 2 2006.230.01:15:18.99#ibcon#read 4, iclass 35, count 2 2006.230.01:15:18.99#ibcon#about to read 5, iclass 35, count 2 2006.230.01:15:18.99#ibcon#read 5, iclass 35, count 2 2006.230.01:15:18.99#ibcon#about to read 6, iclass 35, count 2 2006.230.01:15:18.99#ibcon#read 6, iclass 35, count 2 2006.230.01:15:18.99#ibcon#end of sib2, iclass 35, count 2 2006.230.01:15:18.99#ibcon#*after write, iclass 35, count 2 2006.230.01:15:18.99#ibcon#*before return 0, iclass 35, count 2 2006.230.01:15:18.99#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 2 2006.230.01:15:18.99#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 2 2006.230.01:15:18.99#ibcon#iclass 35 iclrec 2 cls_cnt 2 2006.230.01:15:18.99#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:18.99#ibcon#before find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.01:15:19.11#ibcon#after find_delay mode 2, iclass 35 iclrec 2 cls_cnt 0 2006.230.01:15:19.11#ibcon#before mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.01:15:19.11#ibcon#enter wrdev, iclass 35, count 0 2006.230.01:15:19.11#ibcon#first serial, iclass 35, count 0 2006.230.01:15:19.11#ibcon#enter sib2, iclass 35, count 0 2006.230.01:15:19.11#ibcon#flushed, iclass 35, count 0 2006.230.01:15:19.11#ibcon#about to write, iclass 35, count 0 2006.230.01:15:19.11#ibcon#wrote, iclass 35, count 0 2006.230.01:15:19.11#ibcon#about to read 3, iclass 35, count 0 2006.230.01:15:19.13#ibcon#read 3, iclass 35, count 0 2006.230.01:15:19.13#ibcon#about to read 4, iclass 35, count 0 2006.230.01:15:19.13#ibcon#read 4, iclass 35, count 0 2006.230.01:15:19.13#ibcon#about to read 5, iclass 35, count 0 2006.230.01:15:19.13#ibcon#read 5, iclass 35, count 0 2006.230.01:15:19.13#ibcon#about to read 6, iclass 35, count 0 2006.230.01:15:19.13#ibcon#read 6, iclass 35, count 0 2006.230.01:15:19.13#ibcon#end of sib2, iclass 35, count 0 2006.230.01:15:19.13#ibcon#*mode == 0, iclass 35, count 0 2006.230.01:15:19.13#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.01:15:19.13#ibcon#[27=USB\r\n] 2006.230.01:15:19.13#ibcon#*before write, iclass 35, count 0 2006.230.01:15:19.13#ibcon#enter sib2, iclass 35, count 0 2006.230.01:15:19.13#ibcon#flushed, iclass 35, count 0 2006.230.01:15:19.13#ibcon#about to write, iclass 35, count 0 2006.230.01:15:19.13#ibcon#wrote, iclass 35, count 0 2006.230.01:15:19.13#ibcon#about to read 3, iclass 35, count 0 2006.230.01:15:19.16#ibcon#read 3, iclass 35, count 0 2006.230.01:15:19.16#ibcon#about to read 4, iclass 35, count 0 2006.230.01:15:19.16#ibcon#read 4, iclass 35, count 0 2006.230.01:15:19.16#ibcon#about to read 5, iclass 35, count 0 2006.230.01:15:19.16#ibcon#read 5, iclass 35, count 0 2006.230.01:15:19.16#ibcon#about to read 6, iclass 35, count 0 2006.230.01:15:19.16#ibcon#read 6, iclass 35, count 0 2006.230.01:15:19.16#ibcon#end of sib2, iclass 35, count 0 2006.230.01:15:19.16#ibcon#*after write, iclass 35, count 0 2006.230.01:15:19.16#ibcon#*before return 0, iclass 35, count 0 2006.230.01:15:19.16#ibcon#after mode 2 write, iclass 35 iclrec 2 cls_cnt 0 2006.230.01:15:19.16#ibcon#end of loop, iclass 35 iclrec 2 cls_cnt 0 2006.230.01:15:19.16#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.01:15:19.16#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.01:15:19.16$vck44/vblo=2,634.99 2006.230.01:15:19.16#ibcon#iclass 37 nclrec 1 cls_cnt 2 2006.230.01:15:19.16#ibcon#iclass 37 iclrec 1 cls_cnt 2 2006.230.01:15:19.16#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:19.16#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:19.16#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:19.16#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:19.16#ibcon#enter wrdev, iclass 37, count 0 2006.230.01:15:19.16#ibcon#first serial, iclass 37, count 0 2006.230.01:15:19.16#ibcon#enter sib2, iclass 37, count 0 2006.230.01:15:19.16#ibcon#flushed, iclass 37, count 0 2006.230.01:15:19.16#ibcon#about to write, iclass 37, count 0 2006.230.01:15:19.16#ibcon#wrote, iclass 37, count 0 2006.230.01:15:19.16#ibcon#about to read 3, iclass 37, count 0 2006.230.01:15:19.18#ibcon#read 3, iclass 37, count 0 2006.230.01:15:19.18#ibcon#about to read 4, iclass 37, count 0 2006.230.01:15:19.18#ibcon#read 4, iclass 37, count 0 2006.230.01:15:19.18#ibcon#about to read 5, iclass 37, count 0 2006.230.01:15:19.18#ibcon#read 5, iclass 37, count 0 2006.230.01:15:19.18#ibcon#about to read 6, iclass 37, count 0 2006.230.01:15:19.18#ibcon#read 6, iclass 37, count 0 2006.230.01:15:19.18#ibcon#end of sib2, iclass 37, count 0 2006.230.01:15:19.18#ibcon#*mode == 0, iclass 37, count 0 2006.230.01:15:19.18#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.01:15:19.18#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:15:19.18#ibcon#*before write, iclass 37, count 0 2006.230.01:15:19.18#ibcon#enter sib2, iclass 37, count 0 2006.230.01:15:19.18#ibcon#flushed, iclass 37, count 0 2006.230.01:15:19.18#ibcon#about to write, iclass 37, count 0 2006.230.01:15:19.18#ibcon#wrote, iclass 37, count 0 2006.230.01:15:19.18#ibcon#about to read 3, iclass 37, count 0 2006.230.01:15:19.22#ibcon#read 3, iclass 37, count 0 2006.230.01:15:19.22#ibcon#about to read 4, iclass 37, count 0 2006.230.01:15:19.22#ibcon#read 4, iclass 37, count 0 2006.230.01:15:19.22#ibcon#about to read 5, iclass 37, count 0 2006.230.01:15:19.22#ibcon#read 5, iclass 37, count 0 2006.230.01:15:19.22#ibcon#about to read 6, iclass 37, count 0 2006.230.01:15:19.22#ibcon#read 6, iclass 37, count 0 2006.230.01:15:19.22#ibcon#end of sib2, iclass 37, count 0 2006.230.01:15:19.22#ibcon#*after write, iclass 37, count 0 2006.230.01:15:19.22#ibcon#*before return 0, iclass 37, count 0 2006.230.01:15:19.22#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:19.22#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 0 2006.230.01:15:19.22#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.01:15:19.22#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.01:15:19.22$vck44/vb=2,4 2006.230.01:15:19.22#ibcon#iclass 39 nclrec 2 cls_cnt 3 2006.230.01:15:19.22#ibcon#iclass 39 iclrec 1 cls_cnt 3 2006.230.01:15:19.22#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:19.22#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:19.28#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:19.28#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:19.28#ibcon#enter wrdev, iclass 39, count 2 2006.230.01:15:19.28#ibcon#first serial, iclass 39, count 2 2006.230.01:15:19.28#ibcon#enter sib2, iclass 39, count 2 2006.230.01:15:19.28#ibcon#flushed, iclass 39, count 2 2006.230.01:15:19.28#ibcon#about to write, iclass 39, count 2 2006.230.01:15:19.28#ibcon#wrote, iclass 39, count 2 2006.230.01:15:19.28#ibcon#about to read 3, iclass 39, count 2 2006.230.01:15:19.30#ibcon#read 3, iclass 39, count 2 2006.230.01:15:19.30#ibcon#about to read 4, iclass 39, count 2 2006.230.01:15:19.30#ibcon#read 4, iclass 39, count 2 2006.230.01:15:19.30#ibcon#about to read 5, iclass 39, count 2 2006.230.01:15:19.30#ibcon#read 5, iclass 39, count 2 2006.230.01:15:19.30#ibcon#about to read 6, iclass 39, count 2 2006.230.01:15:19.30#ibcon#read 6, iclass 39, count 2 2006.230.01:15:19.30#ibcon#end of sib2, iclass 39, count 2 2006.230.01:15:19.30#ibcon#*mode == 0, iclass 39, count 2 2006.230.01:15:19.30#ibcon#*mode == 0 && serial, iclass 39, count 2 2006.230.01:15:19.30#ibcon#[27=AT02-04\r\n] 2006.230.01:15:19.30#ibcon#*before write, iclass 39, count 2 2006.230.01:15:19.30#ibcon#enter sib2, iclass 39, count 2 2006.230.01:15:19.30#ibcon#flushed, iclass 39, count 2 2006.230.01:15:19.30#ibcon#about to write, iclass 39, count 2 2006.230.01:15:19.30#ibcon#wrote, iclass 39, count 2 2006.230.01:15:19.30#ibcon#about to read 3, iclass 39, count 2 2006.230.01:15:19.33#ibcon#read 3, iclass 39, count 2 2006.230.01:15:19.33#ibcon#about to read 4, iclass 39, count 2 2006.230.01:15:19.33#ibcon#read 4, iclass 39, count 2 2006.230.01:15:19.33#ibcon#about to read 5, iclass 39, count 2 2006.230.01:15:19.33#ibcon#read 5, iclass 39, count 2 2006.230.01:15:19.33#ibcon#about to read 6, iclass 39, count 2 2006.230.01:15:19.33#ibcon#read 6, iclass 39, count 2 2006.230.01:15:19.33#ibcon#end of sib2, iclass 39, count 2 2006.230.01:15:19.33#ibcon#*after write, iclass 39, count 2 2006.230.01:15:19.33#ibcon#*before return 0, iclass 39, count 2 2006.230.01:15:19.33#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:19.33#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 2 2006.230.01:15:19.33#ibcon#iclass 39 iclrec 2 cls_cnt 2 2006.230.01:15:19.33#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:19.33#ibcon#before find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:19.45#ibcon#after find_delay mode 2, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:19.45#ibcon#before mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:19.45#ibcon#enter wrdev, iclass 39, count 0 2006.230.01:15:19.45#ibcon#first serial, iclass 39, count 0 2006.230.01:15:19.45#ibcon#enter sib2, iclass 39, count 0 2006.230.01:15:19.45#ibcon#flushed, iclass 39, count 0 2006.230.01:15:19.45#ibcon#about to write, iclass 39, count 0 2006.230.01:15:19.45#ibcon#wrote, iclass 39, count 0 2006.230.01:15:19.45#ibcon#about to read 3, iclass 39, count 0 2006.230.01:15:19.47#ibcon#read 3, iclass 39, count 0 2006.230.01:15:19.47#ibcon#about to read 4, iclass 39, count 0 2006.230.01:15:19.47#ibcon#read 4, iclass 39, count 0 2006.230.01:15:19.47#ibcon#about to read 5, iclass 39, count 0 2006.230.01:15:19.47#ibcon#read 5, iclass 39, count 0 2006.230.01:15:19.47#ibcon#about to read 6, iclass 39, count 0 2006.230.01:15:19.47#ibcon#read 6, iclass 39, count 0 2006.230.01:15:19.47#ibcon#end of sib2, iclass 39, count 0 2006.230.01:15:19.47#ibcon#*mode == 0, iclass 39, count 0 2006.230.01:15:19.47#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.01:15:19.47#ibcon#[27=USB\r\n] 2006.230.01:15:19.47#ibcon#*before write, iclass 39, count 0 2006.230.01:15:19.47#ibcon#enter sib2, iclass 39, count 0 2006.230.01:15:19.47#ibcon#flushed, iclass 39, count 0 2006.230.01:15:19.47#ibcon#about to write, iclass 39, count 0 2006.230.01:15:19.47#ibcon#wrote, iclass 39, count 0 2006.230.01:15:19.47#ibcon#about to read 3, iclass 39, count 0 2006.230.01:15:19.50#ibcon#read 3, iclass 39, count 0 2006.230.01:15:19.50#ibcon#about to read 4, iclass 39, count 0 2006.230.01:15:19.50#ibcon#read 4, iclass 39, count 0 2006.230.01:15:19.50#ibcon#about to read 5, iclass 39, count 0 2006.230.01:15:19.50#ibcon#read 5, iclass 39, count 0 2006.230.01:15:19.50#ibcon#about to read 6, iclass 39, count 0 2006.230.01:15:19.50#ibcon#read 6, iclass 39, count 0 2006.230.01:15:19.50#ibcon#end of sib2, iclass 39, count 0 2006.230.01:15:19.50#ibcon#*after write, iclass 39, count 0 2006.230.01:15:19.50#ibcon#*before return 0, iclass 39, count 0 2006.230.01:15:19.50#ibcon#after mode 2 write, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:19.50#ibcon#end of loop, iclass 39 iclrec 2 cls_cnt 0 2006.230.01:15:19.50#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.01:15:19.50#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.01:15:19.50$vck44/vblo=3,649.99 2006.230.01:15:19.50#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.01:15:19.50#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.01:15:19.50#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:19.50#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:19.50#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:19.50#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:19.50#ibcon#enter wrdev, iclass 3, count 0 2006.230.01:15:19.50#ibcon#first serial, iclass 3, count 0 2006.230.01:15:19.50#ibcon#enter sib2, iclass 3, count 0 2006.230.01:15:19.50#ibcon#flushed, iclass 3, count 0 2006.230.01:15:19.50#ibcon#about to write, iclass 3, count 0 2006.230.01:15:19.50#ibcon#wrote, iclass 3, count 0 2006.230.01:15:19.50#ibcon#about to read 3, iclass 3, count 0 2006.230.01:15:19.52#ibcon#read 3, iclass 3, count 0 2006.230.01:15:19.52#ibcon#about to read 4, iclass 3, count 0 2006.230.01:15:19.52#ibcon#read 4, iclass 3, count 0 2006.230.01:15:19.52#ibcon#about to read 5, iclass 3, count 0 2006.230.01:15:19.52#ibcon#read 5, iclass 3, count 0 2006.230.01:15:19.52#ibcon#about to read 6, iclass 3, count 0 2006.230.01:15:19.52#ibcon#read 6, iclass 3, count 0 2006.230.01:15:19.52#ibcon#end of sib2, iclass 3, count 0 2006.230.01:15:19.52#ibcon#*mode == 0, iclass 3, count 0 2006.230.01:15:19.52#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.01:15:19.52#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:15:19.52#ibcon#*before write, iclass 3, count 0 2006.230.01:15:19.52#ibcon#enter sib2, iclass 3, count 0 2006.230.01:15:19.52#ibcon#flushed, iclass 3, count 0 2006.230.01:15:19.52#ibcon#about to write, iclass 3, count 0 2006.230.01:15:19.52#ibcon#wrote, iclass 3, count 0 2006.230.01:15:19.52#ibcon#about to read 3, iclass 3, count 0 2006.230.01:15:19.56#ibcon#read 3, iclass 3, count 0 2006.230.01:15:19.56#ibcon#about to read 4, iclass 3, count 0 2006.230.01:15:19.56#ibcon#read 4, iclass 3, count 0 2006.230.01:15:19.56#ibcon#about to read 5, iclass 3, count 0 2006.230.01:15:19.56#ibcon#read 5, iclass 3, count 0 2006.230.01:15:19.56#ibcon#about to read 6, iclass 3, count 0 2006.230.01:15:19.56#ibcon#read 6, iclass 3, count 0 2006.230.01:15:19.56#ibcon#end of sib2, iclass 3, count 0 2006.230.01:15:19.56#ibcon#*after write, iclass 3, count 0 2006.230.01:15:19.56#ibcon#*before return 0, iclass 3, count 0 2006.230.01:15:19.56#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:19.56#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:15:19.56#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.01:15:19.56#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.01:15:19.56$vck44/vb=3,4 2006.230.01:15:19.56#ibcon#iclass 5 nclrec 2 cls_cnt 3 2006.230.01:15:19.56#ibcon#iclass 5 iclrec 1 cls_cnt 3 2006.230.01:15:19.56#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:19.56#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:19.62#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:19.62#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:19.62#ibcon#enter wrdev, iclass 5, count 2 2006.230.01:15:19.62#ibcon#first serial, iclass 5, count 2 2006.230.01:15:19.62#ibcon#enter sib2, iclass 5, count 2 2006.230.01:15:19.62#ibcon#flushed, iclass 5, count 2 2006.230.01:15:19.62#ibcon#about to write, iclass 5, count 2 2006.230.01:15:19.62#ibcon#wrote, iclass 5, count 2 2006.230.01:15:19.62#ibcon#about to read 3, iclass 5, count 2 2006.230.01:15:19.64#ibcon#read 3, iclass 5, count 2 2006.230.01:15:19.64#ibcon#about to read 4, iclass 5, count 2 2006.230.01:15:19.64#ibcon#read 4, iclass 5, count 2 2006.230.01:15:19.64#ibcon#about to read 5, iclass 5, count 2 2006.230.01:15:19.64#ibcon#read 5, iclass 5, count 2 2006.230.01:15:19.64#ibcon#about to read 6, iclass 5, count 2 2006.230.01:15:19.64#ibcon#read 6, iclass 5, count 2 2006.230.01:15:19.64#ibcon#end of sib2, iclass 5, count 2 2006.230.01:15:19.64#ibcon#*mode == 0, iclass 5, count 2 2006.230.01:15:19.64#ibcon#*mode == 0 && serial, iclass 5, count 2 2006.230.01:15:19.64#ibcon#[27=AT03-04\r\n] 2006.230.01:15:19.64#ibcon#*before write, iclass 5, count 2 2006.230.01:15:19.64#ibcon#enter sib2, iclass 5, count 2 2006.230.01:15:19.64#ibcon#flushed, iclass 5, count 2 2006.230.01:15:19.64#ibcon#about to write, iclass 5, count 2 2006.230.01:15:19.64#ibcon#wrote, iclass 5, count 2 2006.230.01:15:19.64#ibcon#about to read 3, iclass 5, count 2 2006.230.01:15:19.67#ibcon#read 3, iclass 5, count 2 2006.230.01:15:19.67#ibcon#about to read 4, iclass 5, count 2 2006.230.01:15:19.67#ibcon#read 4, iclass 5, count 2 2006.230.01:15:19.67#ibcon#about to read 5, iclass 5, count 2 2006.230.01:15:19.67#ibcon#read 5, iclass 5, count 2 2006.230.01:15:19.67#ibcon#about to read 6, iclass 5, count 2 2006.230.01:15:19.67#ibcon#read 6, iclass 5, count 2 2006.230.01:15:19.67#ibcon#end of sib2, iclass 5, count 2 2006.230.01:15:19.67#ibcon#*after write, iclass 5, count 2 2006.230.01:15:19.67#ibcon#*before return 0, iclass 5, count 2 2006.230.01:15:19.67#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:19.67#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 2 2006.230.01:15:19.67#ibcon#iclass 5 iclrec 2 cls_cnt 2 2006.230.01:15:19.67#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:19.67#ibcon#before find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:19.79#ibcon#after find_delay mode 2, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:19.79#ibcon#before mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:19.79#ibcon#enter wrdev, iclass 5, count 0 2006.230.01:15:19.79#ibcon#first serial, iclass 5, count 0 2006.230.01:15:19.79#ibcon#enter sib2, iclass 5, count 0 2006.230.01:15:19.79#ibcon#flushed, iclass 5, count 0 2006.230.01:15:19.79#ibcon#about to write, iclass 5, count 0 2006.230.01:15:19.79#ibcon#wrote, iclass 5, count 0 2006.230.01:15:19.79#ibcon#about to read 3, iclass 5, count 0 2006.230.01:15:19.81#ibcon#read 3, iclass 5, count 0 2006.230.01:15:19.81#ibcon#about to read 4, iclass 5, count 0 2006.230.01:15:19.81#ibcon#read 4, iclass 5, count 0 2006.230.01:15:19.81#ibcon#about to read 5, iclass 5, count 0 2006.230.01:15:19.81#ibcon#read 5, iclass 5, count 0 2006.230.01:15:19.81#ibcon#about to read 6, iclass 5, count 0 2006.230.01:15:19.81#ibcon#read 6, iclass 5, count 0 2006.230.01:15:19.81#ibcon#end of sib2, iclass 5, count 0 2006.230.01:15:19.81#ibcon#*mode == 0, iclass 5, count 0 2006.230.01:15:19.81#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.01:15:19.81#ibcon#[27=USB\r\n] 2006.230.01:15:19.81#ibcon#*before write, iclass 5, count 0 2006.230.01:15:19.81#ibcon#enter sib2, iclass 5, count 0 2006.230.01:15:19.81#ibcon#flushed, iclass 5, count 0 2006.230.01:15:19.81#ibcon#about to write, iclass 5, count 0 2006.230.01:15:19.81#ibcon#wrote, iclass 5, count 0 2006.230.01:15:19.81#ibcon#about to read 3, iclass 5, count 0 2006.230.01:15:19.84#ibcon#read 3, iclass 5, count 0 2006.230.01:15:19.84#ibcon#about to read 4, iclass 5, count 0 2006.230.01:15:19.84#ibcon#read 4, iclass 5, count 0 2006.230.01:15:19.84#ibcon#about to read 5, iclass 5, count 0 2006.230.01:15:19.84#ibcon#read 5, iclass 5, count 0 2006.230.01:15:19.84#ibcon#about to read 6, iclass 5, count 0 2006.230.01:15:19.84#ibcon#read 6, iclass 5, count 0 2006.230.01:15:19.84#ibcon#end of sib2, iclass 5, count 0 2006.230.01:15:19.84#ibcon#*after write, iclass 5, count 0 2006.230.01:15:19.84#ibcon#*before return 0, iclass 5, count 0 2006.230.01:15:19.84#ibcon#after mode 2 write, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:19.84#ibcon#end of loop, iclass 5 iclrec 2 cls_cnt 0 2006.230.01:15:19.84#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.01:15:19.84#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.01:15:19.84$vck44/vblo=4,679.99 2006.230.01:15:19.84#ibcon#iclass 7 nclrec 1 cls_cnt 2 2006.230.01:15:19.84#ibcon#iclass 7 iclrec 1 cls_cnt 2 2006.230.01:15:19.84#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:19.84#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:19.84#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:19.84#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:19.84#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:15:19.84#ibcon#first serial, iclass 7, count 0 2006.230.01:15:19.84#ibcon#enter sib2, iclass 7, count 0 2006.230.01:15:19.84#ibcon#flushed, iclass 7, count 0 2006.230.01:15:19.84#ibcon#about to write, iclass 7, count 0 2006.230.01:15:19.84#ibcon#wrote, iclass 7, count 0 2006.230.01:15:19.84#ibcon#about to read 3, iclass 7, count 0 2006.230.01:15:19.86#ibcon#read 3, iclass 7, count 0 2006.230.01:15:19.86#ibcon#about to read 4, iclass 7, count 0 2006.230.01:15:19.86#ibcon#read 4, iclass 7, count 0 2006.230.01:15:19.86#ibcon#about to read 5, iclass 7, count 0 2006.230.01:15:19.86#ibcon#read 5, iclass 7, count 0 2006.230.01:15:19.86#ibcon#about to read 6, iclass 7, count 0 2006.230.01:15:19.86#ibcon#read 6, iclass 7, count 0 2006.230.01:15:19.86#ibcon#end of sib2, iclass 7, count 0 2006.230.01:15:19.86#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:15:19.86#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:15:19.86#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:15:19.86#ibcon#*before write, iclass 7, count 0 2006.230.01:15:19.86#ibcon#enter sib2, iclass 7, count 0 2006.230.01:15:19.86#ibcon#flushed, iclass 7, count 0 2006.230.01:15:19.86#ibcon#about to write, iclass 7, count 0 2006.230.01:15:19.86#ibcon#wrote, iclass 7, count 0 2006.230.01:15:19.86#ibcon#about to read 3, iclass 7, count 0 2006.230.01:15:19.90#ibcon#read 3, iclass 7, count 0 2006.230.01:15:19.90#ibcon#about to read 4, iclass 7, count 0 2006.230.01:15:19.90#ibcon#read 4, iclass 7, count 0 2006.230.01:15:19.90#ibcon#about to read 5, iclass 7, count 0 2006.230.01:15:19.90#ibcon#read 5, iclass 7, count 0 2006.230.01:15:19.90#ibcon#about to read 6, iclass 7, count 0 2006.230.01:15:19.90#ibcon#read 6, iclass 7, count 0 2006.230.01:15:19.90#ibcon#end of sib2, iclass 7, count 0 2006.230.01:15:19.90#ibcon#*after write, iclass 7, count 0 2006.230.01:15:19.90#ibcon#*before return 0, iclass 7, count 0 2006.230.01:15:19.90#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:19.90#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 0 2006.230.01:15:19.90#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:15:19.90#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:15:19.90$vck44/vb=4,4 2006.230.01:15:19.90#ibcon#iclass 11 nclrec 2 cls_cnt 3 2006.230.01:15:19.90#ibcon#iclass 11 iclrec 1 cls_cnt 3 2006.230.01:15:19.90#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:19.90#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:19.96#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:19.96#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:19.96#ibcon#enter wrdev, iclass 11, count 2 2006.230.01:15:19.96#ibcon#first serial, iclass 11, count 2 2006.230.01:15:19.96#ibcon#enter sib2, iclass 11, count 2 2006.230.01:15:19.96#ibcon#flushed, iclass 11, count 2 2006.230.01:15:19.96#ibcon#about to write, iclass 11, count 2 2006.230.01:15:19.96#ibcon#wrote, iclass 11, count 2 2006.230.01:15:19.96#ibcon#about to read 3, iclass 11, count 2 2006.230.01:15:19.98#ibcon#read 3, iclass 11, count 2 2006.230.01:15:19.98#ibcon#about to read 4, iclass 11, count 2 2006.230.01:15:19.98#ibcon#read 4, iclass 11, count 2 2006.230.01:15:19.98#ibcon#about to read 5, iclass 11, count 2 2006.230.01:15:19.98#ibcon#read 5, iclass 11, count 2 2006.230.01:15:19.98#ibcon#about to read 6, iclass 11, count 2 2006.230.01:15:19.98#ibcon#read 6, iclass 11, count 2 2006.230.01:15:19.98#ibcon#end of sib2, iclass 11, count 2 2006.230.01:15:19.98#ibcon#*mode == 0, iclass 11, count 2 2006.230.01:15:19.98#ibcon#*mode == 0 && serial, iclass 11, count 2 2006.230.01:15:19.98#ibcon#[27=AT04-04\r\n] 2006.230.01:15:19.98#ibcon#*before write, iclass 11, count 2 2006.230.01:15:19.98#ibcon#enter sib2, iclass 11, count 2 2006.230.01:15:19.98#ibcon#flushed, iclass 11, count 2 2006.230.01:15:19.98#ibcon#about to write, iclass 11, count 2 2006.230.01:15:19.98#ibcon#wrote, iclass 11, count 2 2006.230.01:15:19.98#ibcon#about to read 3, iclass 11, count 2 2006.230.01:15:20.01#ibcon#read 3, iclass 11, count 2 2006.230.01:15:20.01#ibcon#about to read 4, iclass 11, count 2 2006.230.01:15:20.01#ibcon#read 4, iclass 11, count 2 2006.230.01:15:20.01#ibcon#about to read 5, iclass 11, count 2 2006.230.01:15:20.01#ibcon#read 5, iclass 11, count 2 2006.230.01:15:20.01#ibcon#about to read 6, iclass 11, count 2 2006.230.01:15:20.01#ibcon#read 6, iclass 11, count 2 2006.230.01:15:20.01#ibcon#end of sib2, iclass 11, count 2 2006.230.01:15:20.01#ibcon#*after write, iclass 11, count 2 2006.230.01:15:20.01#ibcon#*before return 0, iclass 11, count 2 2006.230.01:15:20.01#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:20.01#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 2 2006.230.01:15:20.01#ibcon#iclass 11 iclrec 2 cls_cnt 2 2006.230.01:15:20.01#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:20.01#ibcon#before find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:20.13#ibcon#after find_delay mode 2, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:20.13#ibcon#before mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:20.13#ibcon#enter wrdev, iclass 11, count 0 2006.230.01:15:20.13#ibcon#first serial, iclass 11, count 0 2006.230.01:15:20.13#ibcon#enter sib2, iclass 11, count 0 2006.230.01:15:20.13#ibcon#flushed, iclass 11, count 0 2006.230.01:15:20.13#ibcon#about to write, iclass 11, count 0 2006.230.01:15:20.13#ibcon#wrote, iclass 11, count 0 2006.230.01:15:20.13#ibcon#about to read 3, iclass 11, count 0 2006.230.01:15:20.15#ibcon#read 3, iclass 11, count 0 2006.230.01:15:20.15#ibcon#about to read 4, iclass 11, count 0 2006.230.01:15:20.15#ibcon#read 4, iclass 11, count 0 2006.230.01:15:20.15#ibcon#about to read 5, iclass 11, count 0 2006.230.01:15:20.15#ibcon#read 5, iclass 11, count 0 2006.230.01:15:20.15#ibcon#about to read 6, iclass 11, count 0 2006.230.01:15:20.15#ibcon#read 6, iclass 11, count 0 2006.230.01:15:20.15#ibcon#end of sib2, iclass 11, count 0 2006.230.01:15:20.15#ibcon#*mode == 0, iclass 11, count 0 2006.230.01:15:20.15#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.01:15:20.15#ibcon#[27=USB\r\n] 2006.230.01:15:20.15#ibcon#*before write, iclass 11, count 0 2006.230.01:15:20.15#ibcon#enter sib2, iclass 11, count 0 2006.230.01:15:20.15#ibcon#flushed, iclass 11, count 0 2006.230.01:15:20.15#ibcon#about to write, iclass 11, count 0 2006.230.01:15:20.15#ibcon#wrote, iclass 11, count 0 2006.230.01:15:20.15#ibcon#about to read 3, iclass 11, count 0 2006.230.01:15:20.18#ibcon#read 3, iclass 11, count 0 2006.230.01:15:20.18#ibcon#about to read 4, iclass 11, count 0 2006.230.01:15:20.18#ibcon#read 4, iclass 11, count 0 2006.230.01:15:20.18#ibcon#about to read 5, iclass 11, count 0 2006.230.01:15:20.18#ibcon#read 5, iclass 11, count 0 2006.230.01:15:20.18#ibcon#about to read 6, iclass 11, count 0 2006.230.01:15:20.18#ibcon#read 6, iclass 11, count 0 2006.230.01:15:20.18#ibcon#end of sib2, iclass 11, count 0 2006.230.01:15:20.18#ibcon#*after write, iclass 11, count 0 2006.230.01:15:20.18#ibcon#*before return 0, iclass 11, count 0 2006.230.01:15:20.18#ibcon#after mode 2 write, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:20.18#ibcon#end of loop, iclass 11 iclrec 2 cls_cnt 0 2006.230.01:15:20.18#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.01:15:20.18#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.01:15:20.18$vck44/vblo=5,709.99 2006.230.01:15:20.18#ibcon#iclass 13 nclrec 1 cls_cnt 2 2006.230.01:15:20.18#ibcon#iclass 13 iclrec 1 cls_cnt 2 2006.230.01:15:20.18#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:20.18#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:20.18#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:20.18#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:20.18#ibcon#enter wrdev, iclass 13, count 0 2006.230.01:15:20.18#ibcon#first serial, iclass 13, count 0 2006.230.01:15:20.18#ibcon#enter sib2, iclass 13, count 0 2006.230.01:15:20.18#ibcon#flushed, iclass 13, count 0 2006.230.01:15:20.18#ibcon#about to write, iclass 13, count 0 2006.230.01:15:20.18#ibcon#wrote, iclass 13, count 0 2006.230.01:15:20.18#ibcon#about to read 3, iclass 13, count 0 2006.230.01:15:20.20#ibcon#read 3, iclass 13, count 0 2006.230.01:15:20.20#ibcon#about to read 4, iclass 13, count 0 2006.230.01:15:20.20#ibcon#read 4, iclass 13, count 0 2006.230.01:15:20.20#ibcon#about to read 5, iclass 13, count 0 2006.230.01:15:20.20#ibcon#read 5, iclass 13, count 0 2006.230.01:15:20.20#ibcon#about to read 6, iclass 13, count 0 2006.230.01:15:20.20#ibcon#read 6, iclass 13, count 0 2006.230.01:15:20.20#ibcon#end of sib2, iclass 13, count 0 2006.230.01:15:20.20#ibcon#*mode == 0, iclass 13, count 0 2006.230.01:15:20.20#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.01:15:20.20#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:15:20.20#ibcon#*before write, iclass 13, count 0 2006.230.01:15:20.20#ibcon#enter sib2, iclass 13, count 0 2006.230.01:15:20.20#ibcon#flushed, iclass 13, count 0 2006.230.01:15:20.20#ibcon#about to write, iclass 13, count 0 2006.230.01:15:20.20#ibcon#wrote, iclass 13, count 0 2006.230.01:15:20.20#ibcon#about to read 3, iclass 13, count 0 2006.230.01:15:20.24#ibcon#read 3, iclass 13, count 0 2006.230.01:15:20.24#ibcon#about to read 4, iclass 13, count 0 2006.230.01:15:20.24#ibcon#read 4, iclass 13, count 0 2006.230.01:15:20.24#ibcon#about to read 5, iclass 13, count 0 2006.230.01:15:20.24#ibcon#read 5, iclass 13, count 0 2006.230.01:15:20.24#ibcon#about to read 6, iclass 13, count 0 2006.230.01:15:20.24#ibcon#read 6, iclass 13, count 0 2006.230.01:15:20.24#ibcon#end of sib2, iclass 13, count 0 2006.230.01:15:20.24#ibcon#*after write, iclass 13, count 0 2006.230.01:15:20.24#ibcon#*before return 0, iclass 13, count 0 2006.230.01:15:20.24#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:20.24#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 0 2006.230.01:15:20.24#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.01:15:20.24#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.01:15:20.24$vck44/vb=5,4 2006.230.01:15:20.24#ibcon#iclass 15 nclrec 2 cls_cnt 3 2006.230.01:15:20.24#ibcon#iclass 15 iclrec 1 cls_cnt 3 2006.230.01:15:20.24#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:20.24#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:20.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:20.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:20.30#ibcon#enter wrdev, iclass 15, count 2 2006.230.01:15:20.30#ibcon#first serial, iclass 15, count 2 2006.230.01:15:20.30#ibcon#enter sib2, iclass 15, count 2 2006.230.01:15:20.30#ibcon#flushed, iclass 15, count 2 2006.230.01:15:20.30#ibcon#about to write, iclass 15, count 2 2006.230.01:15:20.30#ibcon#wrote, iclass 15, count 2 2006.230.01:15:20.30#ibcon#about to read 3, iclass 15, count 2 2006.230.01:15:20.32#ibcon#read 3, iclass 15, count 2 2006.230.01:15:20.32#ibcon#about to read 4, iclass 15, count 2 2006.230.01:15:20.32#ibcon#read 4, iclass 15, count 2 2006.230.01:15:20.32#ibcon#about to read 5, iclass 15, count 2 2006.230.01:15:20.32#ibcon#read 5, iclass 15, count 2 2006.230.01:15:20.32#ibcon#about to read 6, iclass 15, count 2 2006.230.01:15:20.32#ibcon#read 6, iclass 15, count 2 2006.230.01:15:20.32#ibcon#end of sib2, iclass 15, count 2 2006.230.01:15:20.32#ibcon#*mode == 0, iclass 15, count 2 2006.230.01:15:20.32#ibcon#*mode == 0 && serial, iclass 15, count 2 2006.230.01:15:20.32#ibcon#[27=AT05-04\r\n] 2006.230.01:15:20.32#ibcon#*before write, iclass 15, count 2 2006.230.01:15:20.32#ibcon#enter sib2, iclass 15, count 2 2006.230.01:15:20.32#ibcon#flushed, iclass 15, count 2 2006.230.01:15:20.32#ibcon#about to write, iclass 15, count 2 2006.230.01:15:20.32#ibcon#wrote, iclass 15, count 2 2006.230.01:15:20.32#ibcon#about to read 3, iclass 15, count 2 2006.230.01:15:20.35#ibcon#read 3, iclass 15, count 2 2006.230.01:15:20.35#ibcon#about to read 4, iclass 15, count 2 2006.230.01:15:20.35#ibcon#read 4, iclass 15, count 2 2006.230.01:15:20.35#ibcon#about to read 5, iclass 15, count 2 2006.230.01:15:20.35#ibcon#read 5, iclass 15, count 2 2006.230.01:15:20.35#ibcon#about to read 6, iclass 15, count 2 2006.230.01:15:20.35#ibcon#read 6, iclass 15, count 2 2006.230.01:15:20.35#ibcon#end of sib2, iclass 15, count 2 2006.230.01:15:20.35#ibcon#*after write, iclass 15, count 2 2006.230.01:15:20.35#ibcon#*before return 0, iclass 15, count 2 2006.230.01:15:20.35#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:20.35#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 2 2006.230.01:15:20.35#ibcon#iclass 15 iclrec 2 cls_cnt 2 2006.230.01:15:20.35#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:20.35#ibcon#before find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:20.47#ibcon#after find_delay mode 2, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:20.47#ibcon#before mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:20.47#ibcon#enter wrdev, iclass 15, count 0 2006.230.01:15:20.47#ibcon#first serial, iclass 15, count 0 2006.230.01:15:20.47#ibcon#enter sib2, iclass 15, count 0 2006.230.01:15:20.47#ibcon#flushed, iclass 15, count 0 2006.230.01:15:20.47#ibcon#about to write, iclass 15, count 0 2006.230.01:15:20.47#ibcon#wrote, iclass 15, count 0 2006.230.01:15:20.47#ibcon#about to read 3, iclass 15, count 0 2006.230.01:15:20.49#ibcon#read 3, iclass 15, count 0 2006.230.01:15:20.49#ibcon#about to read 4, iclass 15, count 0 2006.230.01:15:20.49#ibcon#read 4, iclass 15, count 0 2006.230.01:15:20.49#ibcon#about to read 5, iclass 15, count 0 2006.230.01:15:20.49#ibcon#read 5, iclass 15, count 0 2006.230.01:15:20.49#ibcon#about to read 6, iclass 15, count 0 2006.230.01:15:20.49#ibcon#read 6, iclass 15, count 0 2006.230.01:15:20.49#ibcon#end of sib2, iclass 15, count 0 2006.230.01:15:20.49#ibcon#*mode == 0, iclass 15, count 0 2006.230.01:15:20.49#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.01:15:20.49#ibcon#[27=USB\r\n] 2006.230.01:15:20.49#ibcon#*before write, iclass 15, count 0 2006.230.01:15:20.49#ibcon#enter sib2, iclass 15, count 0 2006.230.01:15:20.49#ibcon#flushed, iclass 15, count 0 2006.230.01:15:20.49#ibcon#about to write, iclass 15, count 0 2006.230.01:15:20.49#ibcon#wrote, iclass 15, count 0 2006.230.01:15:20.49#ibcon#about to read 3, iclass 15, count 0 2006.230.01:15:20.52#ibcon#read 3, iclass 15, count 0 2006.230.01:15:20.52#ibcon#about to read 4, iclass 15, count 0 2006.230.01:15:20.52#ibcon#read 4, iclass 15, count 0 2006.230.01:15:20.52#ibcon#about to read 5, iclass 15, count 0 2006.230.01:15:20.52#ibcon#read 5, iclass 15, count 0 2006.230.01:15:20.52#ibcon#about to read 6, iclass 15, count 0 2006.230.01:15:20.52#ibcon#read 6, iclass 15, count 0 2006.230.01:15:20.52#ibcon#end of sib2, iclass 15, count 0 2006.230.01:15:20.52#ibcon#*after write, iclass 15, count 0 2006.230.01:15:20.52#ibcon#*before return 0, iclass 15, count 0 2006.230.01:15:20.52#ibcon#after mode 2 write, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:20.52#ibcon#end of loop, iclass 15 iclrec 2 cls_cnt 0 2006.230.01:15:20.52#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.01:15:20.52#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.01:15:20.52$vck44/vblo=6,719.99 2006.230.01:15:20.52#ibcon#iclass 17 nclrec 1 cls_cnt 2 2006.230.01:15:20.52#ibcon#iclass 17 iclrec 1 cls_cnt 2 2006.230.01:15:20.52#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:20.52#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:20.52#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:20.52#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:20.52#ibcon#enter wrdev, iclass 17, count 0 2006.230.01:15:20.52#ibcon#first serial, iclass 17, count 0 2006.230.01:15:20.52#ibcon#enter sib2, iclass 17, count 0 2006.230.01:15:20.52#ibcon#flushed, iclass 17, count 0 2006.230.01:15:20.52#ibcon#about to write, iclass 17, count 0 2006.230.01:15:20.52#ibcon#wrote, iclass 17, count 0 2006.230.01:15:20.52#ibcon#about to read 3, iclass 17, count 0 2006.230.01:15:20.54#ibcon#read 3, iclass 17, count 0 2006.230.01:15:20.54#ibcon#about to read 4, iclass 17, count 0 2006.230.01:15:20.54#ibcon#read 4, iclass 17, count 0 2006.230.01:15:20.54#ibcon#about to read 5, iclass 17, count 0 2006.230.01:15:20.54#ibcon#read 5, iclass 17, count 0 2006.230.01:15:20.54#ibcon#about to read 6, iclass 17, count 0 2006.230.01:15:20.54#ibcon#read 6, iclass 17, count 0 2006.230.01:15:20.54#ibcon#end of sib2, iclass 17, count 0 2006.230.01:15:20.54#ibcon#*mode == 0, iclass 17, count 0 2006.230.01:15:20.54#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.01:15:20.54#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:15:20.54#ibcon#*before write, iclass 17, count 0 2006.230.01:15:20.54#ibcon#enter sib2, iclass 17, count 0 2006.230.01:15:20.54#ibcon#flushed, iclass 17, count 0 2006.230.01:15:20.54#ibcon#about to write, iclass 17, count 0 2006.230.01:15:20.54#ibcon#wrote, iclass 17, count 0 2006.230.01:15:20.54#ibcon#about to read 3, iclass 17, count 0 2006.230.01:15:20.58#ibcon#read 3, iclass 17, count 0 2006.230.01:15:20.58#ibcon#about to read 4, iclass 17, count 0 2006.230.01:15:20.58#ibcon#read 4, iclass 17, count 0 2006.230.01:15:20.58#ibcon#about to read 5, iclass 17, count 0 2006.230.01:15:20.58#ibcon#read 5, iclass 17, count 0 2006.230.01:15:20.58#ibcon#about to read 6, iclass 17, count 0 2006.230.01:15:20.58#ibcon#read 6, iclass 17, count 0 2006.230.01:15:20.58#ibcon#end of sib2, iclass 17, count 0 2006.230.01:15:20.58#ibcon#*after write, iclass 17, count 0 2006.230.01:15:20.58#ibcon#*before return 0, iclass 17, count 0 2006.230.01:15:20.58#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:20.58#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 0 2006.230.01:15:20.58#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.01:15:20.58#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.01:15:20.58$vck44/vb=6,4 2006.230.01:15:20.58#ibcon#iclass 19 nclrec 2 cls_cnt 3 2006.230.01:15:20.58#ibcon#iclass 19 iclrec 1 cls_cnt 3 2006.230.01:15:20.58#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:20.58#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:20.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:20.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:20.64#ibcon#enter wrdev, iclass 19, count 2 2006.230.01:15:20.64#ibcon#first serial, iclass 19, count 2 2006.230.01:15:20.64#ibcon#enter sib2, iclass 19, count 2 2006.230.01:15:20.64#ibcon#flushed, iclass 19, count 2 2006.230.01:15:20.64#ibcon#about to write, iclass 19, count 2 2006.230.01:15:20.64#ibcon#wrote, iclass 19, count 2 2006.230.01:15:20.64#ibcon#about to read 3, iclass 19, count 2 2006.230.01:15:20.66#ibcon#read 3, iclass 19, count 2 2006.230.01:15:20.66#ibcon#about to read 4, iclass 19, count 2 2006.230.01:15:20.66#ibcon#read 4, iclass 19, count 2 2006.230.01:15:20.66#ibcon#about to read 5, iclass 19, count 2 2006.230.01:15:20.66#ibcon#read 5, iclass 19, count 2 2006.230.01:15:20.66#ibcon#about to read 6, iclass 19, count 2 2006.230.01:15:20.66#ibcon#read 6, iclass 19, count 2 2006.230.01:15:20.66#ibcon#end of sib2, iclass 19, count 2 2006.230.01:15:20.66#ibcon#*mode == 0, iclass 19, count 2 2006.230.01:15:20.66#ibcon#*mode == 0 && serial, iclass 19, count 2 2006.230.01:15:20.66#ibcon#[27=AT06-04\r\n] 2006.230.01:15:20.66#ibcon#*before write, iclass 19, count 2 2006.230.01:15:20.66#ibcon#enter sib2, iclass 19, count 2 2006.230.01:15:20.66#ibcon#flushed, iclass 19, count 2 2006.230.01:15:20.66#ibcon#about to write, iclass 19, count 2 2006.230.01:15:20.66#ibcon#wrote, iclass 19, count 2 2006.230.01:15:20.66#ibcon#about to read 3, iclass 19, count 2 2006.230.01:15:20.69#ibcon#read 3, iclass 19, count 2 2006.230.01:15:20.69#ibcon#about to read 4, iclass 19, count 2 2006.230.01:15:20.69#ibcon#read 4, iclass 19, count 2 2006.230.01:15:20.69#ibcon#about to read 5, iclass 19, count 2 2006.230.01:15:20.69#ibcon#read 5, iclass 19, count 2 2006.230.01:15:20.69#ibcon#about to read 6, iclass 19, count 2 2006.230.01:15:20.69#ibcon#read 6, iclass 19, count 2 2006.230.01:15:20.69#ibcon#end of sib2, iclass 19, count 2 2006.230.01:15:20.69#ibcon#*after write, iclass 19, count 2 2006.230.01:15:20.69#ibcon#*before return 0, iclass 19, count 2 2006.230.01:15:20.69#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:20.69#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 2 2006.230.01:15:20.69#ibcon#iclass 19 iclrec 2 cls_cnt 2 2006.230.01:15:20.69#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:20.69#ibcon#before find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:20.81#ibcon#after find_delay mode 2, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:20.81#ibcon#before mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:20.81#ibcon#enter wrdev, iclass 19, count 0 2006.230.01:15:20.81#ibcon#first serial, iclass 19, count 0 2006.230.01:15:20.81#ibcon#enter sib2, iclass 19, count 0 2006.230.01:15:20.81#ibcon#flushed, iclass 19, count 0 2006.230.01:15:20.81#ibcon#about to write, iclass 19, count 0 2006.230.01:15:20.81#ibcon#wrote, iclass 19, count 0 2006.230.01:15:20.81#ibcon#about to read 3, iclass 19, count 0 2006.230.01:15:20.83#ibcon#read 3, iclass 19, count 0 2006.230.01:15:20.83#ibcon#about to read 4, iclass 19, count 0 2006.230.01:15:20.83#ibcon#read 4, iclass 19, count 0 2006.230.01:15:20.83#ibcon#about to read 5, iclass 19, count 0 2006.230.01:15:20.83#ibcon#read 5, iclass 19, count 0 2006.230.01:15:20.83#ibcon#about to read 6, iclass 19, count 0 2006.230.01:15:20.83#ibcon#read 6, iclass 19, count 0 2006.230.01:15:20.83#ibcon#end of sib2, iclass 19, count 0 2006.230.01:15:20.83#ibcon#*mode == 0, iclass 19, count 0 2006.230.01:15:20.83#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.01:15:20.83#ibcon#[27=USB\r\n] 2006.230.01:15:20.83#ibcon#*before write, iclass 19, count 0 2006.230.01:15:20.83#ibcon#enter sib2, iclass 19, count 0 2006.230.01:15:20.83#ibcon#flushed, iclass 19, count 0 2006.230.01:15:20.83#ibcon#about to write, iclass 19, count 0 2006.230.01:15:20.83#ibcon#wrote, iclass 19, count 0 2006.230.01:15:20.83#ibcon#about to read 3, iclass 19, count 0 2006.230.01:15:20.86#ibcon#read 3, iclass 19, count 0 2006.230.01:15:20.86#ibcon#about to read 4, iclass 19, count 0 2006.230.01:15:20.86#ibcon#read 4, iclass 19, count 0 2006.230.01:15:20.86#ibcon#about to read 5, iclass 19, count 0 2006.230.01:15:20.86#ibcon#read 5, iclass 19, count 0 2006.230.01:15:20.86#ibcon#about to read 6, iclass 19, count 0 2006.230.01:15:20.86#ibcon#read 6, iclass 19, count 0 2006.230.01:15:20.86#ibcon#end of sib2, iclass 19, count 0 2006.230.01:15:20.86#ibcon#*after write, iclass 19, count 0 2006.230.01:15:20.86#ibcon#*before return 0, iclass 19, count 0 2006.230.01:15:20.86#ibcon#after mode 2 write, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:20.86#ibcon#end of loop, iclass 19 iclrec 2 cls_cnt 0 2006.230.01:15:20.86#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.01:15:20.86#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.01:15:20.86$vck44/vblo=7,734.99 2006.230.01:15:20.86#ibcon#iclass 21 nclrec 1 cls_cnt 2 2006.230.01:15:20.86#ibcon#iclass 21 iclrec 1 cls_cnt 2 2006.230.01:15:20.86#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:20.86#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:20.86#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:20.86#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:20.86#ibcon#enter wrdev, iclass 21, count 0 2006.230.01:15:20.86#ibcon#first serial, iclass 21, count 0 2006.230.01:15:20.86#ibcon#enter sib2, iclass 21, count 0 2006.230.01:15:20.86#ibcon#flushed, iclass 21, count 0 2006.230.01:15:20.86#ibcon#about to write, iclass 21, count 0 2006.230.01:15:20.86#ibcon#wrote, iclass 21, count 0 2006.230.01:15:20.86#ibcon#about to read 3, iclass 21, count 0 2006.230.01:15:20.88#ibcon#read 3, iclass 21, count 0 2006.230.01:15:20.88#ibcon#about to read 4, iclass 21, count 0 2006.230.01:15:20.88#ibcon#read 4, iclass 21, count 0 2006.230.01:15:20.88#ibcon#about to read 5, iclass 21, count 0 2006.230.01:15:20.88#ibcon#read 5, iclass 21, count 0 2006.230.01:15:20.88#ibcon#about to read 6, iclass 21, count 0 2006.230.01:15:20.88#ibcon#read 6, iclass 21, count 0 2006.230.01:15:20.88#ibcon#end of sib2, iclass 21, count 0 2006.230.01:15:20.88#ibcon#*mode == 0, iclass 21, count 0 2006.230.01:15:20.88#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.01:15:20.88#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:15:20.88#ibcon#*before write, iclass 21, count 0 2006.230.01:15:20.88#ibcon#enter sib2, iclass 21, count 0 2006.230.01:15:20.88#ibcon#flushed, iclass 21, count 0 2006.230.01:15:20.88#ibcon#about to write, iclass 21, count 0 2006.230.01:15:20.88#ibcon#wrote, iclass 21, count 0 2006.230.01:15:20.88#ibcon#about to read 3, iclass 21, count 0 2006.230.01:15:20.92#ibcon#read 3, iclass 21, count 0 2006.230.01:15:20.92#ibcon#about to read 4, iclass 21, count 0 2006.230.01:15:20.92#ibcon#read 4, iclass 21, count 0 2006.230.01:15:20.92#ibcon#about to read 5, iclass 21, count 0 2006.230.01:15:20.92#ibcon#read 5, iclass 21, count 0 2006.230.01:15:20.92#ibcon#about to read 6, iclass 21, count 0 2006.230.01:15:20.92#ibcon#read 6, iclass 21, count 0 2006.230.01:15:20.92#ibcon#end of sib2, iclass 21, count 0 2006.230.01:15:20.92#ibcon#*after write, iclass 21, count 0 2006.230.01:15:20.92#ibcon#*before return 0, iclass 21, count 0 2006.230.01:15:20.92#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:20.92#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 0 2006.230.01:15:20.92#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.01:15:20.92#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.01:15:20.92$vck44/vb=7,4 2006.230.01:15:20.92#ibcon#iclass 23 nclrec 2 cls_cnt 3 2006.230.01:15:20.92#ibcon#iclass 23 iclrec 1 cls_cnt 3 2006.230.01:15:20.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:20.92#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:20.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:20.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:20.98#ibcon#enter wrdev, iclass 23, count 2 2006.230.01:15:20.98#ibcon#first serial, iclass 23, count 2 2006.230.01:15:20.98#ibcon#enter sib2, iclass 23, count 2 2006.230.01:15:20.98#ibcon#flushed, iclass 23, count 2 2006.230.01:15:20.98#ibcon#about to write, iclass 23, count 2 2006.230.01:15:20.98#ibcon#wrote, iclass 23, count 2 2006.230.01:15:20.98#ibcon#about to read 3, iclass 23, count 2 2006.230.01:15:21.00#ibcon#read 3, iclass 23, count 2 2006.230.01:15:21.00#ibcon#about to read 4, iclass 23, count 2 2006.230.01:15:21.00#ibcon#read 4, iclass 23, count 2 2006.230.01:15:21.00#ibcon#about to read 5, iclass 23, count 2 2006.230.01:15:21.00#ibcon#read 5, iclass 23, count 2 2006.230.01:15:21.00#ibcon#about to read 6, iclass 23, count 2 2006.230.01:15:21.00#ibcon#read 6, iclass 23, count 2 2006.230.01:15:21.00#ibcon#end of sib2, iclass 23, count 2 2006.230.01:15:21.00#ibcon#*mode == 0, iclass 23, count 2 2006.230.01:15:21.00#ibcon#*mode == 0 && serial, iclass 23, count 2 2006.230.01:15:21.00#ibcon#[27=AT07-04\r\n] 2006.230.01:15:21.00#ibcon#*before write, iclass 23, count 2 2006.230.01:15:21.00#ibcon#enter sib2, iclass 23, count 2 2006.230.01:15:21.00#ibcon#flushed, iclass 23, count 2 2006.230.01:15:21.00#ibcon#about to write, iclass 23, count 2 2006.230.01:15:21.00#ibcon#wrote, iclass 23, count 2 2006.230.01:15:21.00#ibcon#about to read 3, iclass 23, count 2 2006.230.01:15:21.03#ibcon#read 3, iclass 23, count 2 2006.230.01:15:21.03#ibcon#about to read 4, iclass 23, count 2 2006.230.01:15:21.03#ibcon#read 4, iclass 23, count 2 2006.230.01:15:21.03#ibcon#about to read 5, iclass 23, count 2 2006.230.01:15:21.03#ibcon#read 5, iclass 23, count 2 2006.230.01:15:21.03#ibcon#about to read 6, iclass 23, count 2 2006.230.01:15:21.03#ibcon#read 6, iclass 23, count 2 2006.230.01:15:21.03#ibcon#end of sib2, iclass 23, count 2 2006.230.01:15:21.03#ibcon#*after write, iclass 23, count 2 2006.230.01:15:21.03#ibcon#*before return 0, iclass 23, count 2 2006.230.01:15:21.03#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:21.03#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 2 2006.230.01:15:21.03#ibcon#iclass 23 iclrec 2 cls_cnt 2 2006.230.01:15:21.03#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:21.03#ibcon#before find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:21.15#ibcon#after find_delay mode 2, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:21.15#ibcon#before mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:21.15#ibcon#enter wrdev, iclass 23, count 0 2006.230.01:15:21.15#ibcon#first serial, iclass 23, count 0 2006.230.01:15:21.15#ibcon#enter sib2, iclass 23, count 0 2006.230.01:15:21.15#ibcon#flushed, iclass 23, count 0 2006.230.01:15:21.15#ibcon#about to write, iclass 23, count 0 2006.230.01:15:21.15#ibcon#wrote, iclass 23, count 0 2006.230.01:15:21.15#ibcon#about to read 3, iclass 23, count 0 2006.230.01:15:21.17#ibcon#read 3, iclass 23, count 0 2006.230.01:15:21.17#ibcon#about to read 4, iclass 23, count 0 2006.230.01:15:21.17#ibcon#read 4, iclass 23, count 0 2006.230.01:15:21.17#ibcon#about to read 5, iclass 23, count 0 2006.230.01:15:21.17#ibcon#read 5, iclass 23, count 0 2006.230.01:15:21.17#ibcon#about to read 6, iclass 23, count 0 2006.230.01:15:21.17#ibcon#read 6, iclass 23, count 0 2006.230.01:15:21.17#ibcon#end of sib2, iclass 23, count 0 2006.230.01:15:21.17#ibcon#*mode == 0, iclass 23, count 0 2006.230.01:15:21.17#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.01:15:21.17#ibcon#[27=USB\r\n] 2006.230.01:15:21.17#ibcon#*before write, iclass 23, count 0 2006.230.01:15:21.17#ibcon#enter sib2, iclass 23, count 0 2006.230.01:15:21.17#ibcon#flushed, iclass 23, count 0 2006.230.01:15:21.17#ibcon#about to write, iclass 23, count 0 2006.230.01:15:21.17#ibcon#wrote, iclass 23, count 0 2006.230.01:15:21.17#ibcon#about to read 3, iclass 23, count 0 2006.230.01:15:21.20#ibcon#read 3, iclass 23, count 0 2006.230.01:15:21.20#ibcon#about to read 4, iclass 23, count 0 2006.230.01:15:21.20#ibcon#read 4, iclass 23, count 0 2006.230.01:15:21.20#ibcon#about to read 5, iclass 23, count 0 2006.230.01:15:21.20#ibcon#read 5, iclass 23, count 0 2006.230.01:15:21.20#ibcon#about to read 6, iclass 23, count 0 2006.230.01:15:21.20#ibcon#read 6, iclass 23, count 0 2006.230.01:15:21.20#ibcon#end of sib2, iclass 23, count 0 2006.230.01:15:21.20#ibcon#*after write, iclass 23, count 0 2006.230.01:15:21.20#ibcon#*before return 0, iclass 23, count 0 2006.230.01:15:21.20#ibcon#after mode 2 write, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:21.20#ibcon#end of loop, iclass 23 iclrec 2 cls_cnt 0 2006.230.01:15:21.20#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.01:15:21.20#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.01:15:21.20$vck44/vblo=8,744.99 2006.230.01:15:21.20#ibcon#iclass 25 nclrec 1 cls_cnt 2 2006.230.01:15:21.20#ibcon#iclass 25 iclrec 1 cls_cnt 2 2006.230.01:15:21.20#ibcon#ireg 17 cls_cnt 0 2006.230.01:15:21.20#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:21.20#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:21.20#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:21.20#ibcon#enter wrdev, iclass 25, count 0 2006.230.01:15:21.20#ibcon#first serial, iclass 25, count 0 2006.230.01:15:21.20#ibcon#enter sib2, iclass 25, count 0 2006.230.01:15:21.20#ibcon#flushed, iclass 25, count 0 2006.230.01:15:21.20#ibcon#about to write, iclass 25, count 0 2006.230.01:15:21.20#ibcon#wrote, iclass 25, count 0 2006.230.01:15:21.20#ibcon#about to read 3, iclass 25, count 0 2006.230.01:15:21.22#ibcon#read 3, iclass 25, count 0 2006.230.01:15:21.22#ibcon#about to read 4, iclass 25, count 0 2006.230.01:15:21.22#ibcon#read 4, iclass 25, count 0 2006.230.01:15:21.22#ibcon#about to read 5, iclass 25, count 0 2006.230.01:15:21.22#ibcon#read 5, iclass 25, count 0 2006.230.01:15:21.22#ibcon#about to read 6, iclass 25, count 0 2006.230.01:15:21.22#ibcon#read 6, iclass 25, count 0 2006.230.01:15:21.22#ibcon#end of sib2, iclass 25, count 0 2006.230.01:15:21.22#ibcon#*mode == 0, iclass 25, count 0 2006.230.01:15:21.22#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.01:15:21.22#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:15:21.22#ibcon#*before write, iclass 25, count 0 2006.230.01:15:21.22#ibcon#enter sib2, iclass 25, count 0 2006.230.01:15:21.22#ibcon#flushed, iclass 25, count 0 2006.230.01:15:21.22#ibcon#about to write, iclass 25, count 0 2006.230.01:15:21.22#ibcon#wrote, iclass 25, count 0 2006.230.01:15:21.22#ibcon#about to read 3, iclass 25, count 0 2006.230.01:15:21.26#ibcon#read 3, iclass 25, count 0 2006.230.01:15:21.26#ibcon#about to read 4, iclass 25, count 0 2006.230.01:15:21.26#ibcon#read 4, iclass 25, count 0 2006.230.01:15:21.26#ibcon#about to read 5, iclass 25, count 0 2006.230.01:15:21.26#ibcon#read 5, iclass 25, count 0 2006.230.01:15:21.26#ibcon#about to read 6, iclass 25, count 0 2006.230.01:15:21.26#ibcon#read 6, iclass 25, count 0 2006.230.01:15:21.26#ibcon#end of sib2, iclass 25, count 0 2006.230.01:15:21.26#ibcon#*after write, iclass 25, count 0 2006.230.01:15:21.26#ibcon#*before return 0, iclass 25, count 0 2006.230.01:15:21.26#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:21.26#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 0 2006.230.01:15:21.26#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.01:15:21.26#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.01:15:21.26$vck44/vb=8,4 2006.230.01:15:21.26#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.01:15:21.26#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.01:15:21.26#ibcon#ireg 11 cls_cnt 2 2006.230.01:15:21.26#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:21.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:21.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:21.32#ibcon#enter wrdev, iclass 27, count 2 2006.230.01:15:21.32#ibcon#first serial, iclass 27, count 2 2006.230.01:15:21.32#ibcon#enter sib2, iclass 27, count 2 2006.230.01:15:21.32#ibcon#flushed, iclass 27, count 2 2006.230.01:15:21.32#ibcon#about to write, iclass 27, count 2 2006.230.01:15:21.32#ibcon#wrote, iclass 27, count 2 2006.230.01:15:21.32#ibcon#about to read 3, iclass 27, count 2 2006.230.01:15:21.34#ibcon#read 3, iclass 27, count 2 2006.230.01:15:21.34#ibcon#about to read 4, iclass 27, count 2 2006.230.01:15:21.34#ibcon#read 4, iclass 27, count 2 2006.230.01:15:21.34#ibcon#about to read 5, iclass 27, count 2 2006.230.01:15:21.34#ibcon#read 5, iclass 27, count 2 2006.230.01:15:21.34#ibcon#about to read 6, iclass 27, count 2 2006.230.01:15:21.34#ibcon#read 6, iclass 27, count 2 2006.230.01:15:21.34#ibcon#end of sib2, iclass 27, count 2 2006.230.01:15:21.34#ibcon#*mode == 0, iclass 27, count 2 2006.230.01:15:21.34#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.01:15:21.34#ibcon#[27=AT08-04\r\n] 2006.230.01:15:21.34#ibcon#*before write, iclass 27, count 2 2006.230.01:15:21.34#ibcon#enter sib2, iclass 27, count 2 2006.230.01:15:21.34#ibcon#flushed, iclass 27, count 2 2006.230.01:15:21.34#ibcon#about to write, iclass 27, count 2 2006.230.01:15:21.34#ibcon#wrote, iclass 27, count 2 2006.230.01:15:21.34#ibcon#about to read 3, iclass 27, count 2 2006.230.01:15:21.37#ibcon#read 3, iclass 27, count 2 2006.230.01:15:21.37#ibcon#about to read 4, iclass 27, count 2 2006.230.01:15:21.37#ibcon#read 4, iclass 27, count 2 2006.230.01:15:21.37#ibcon#about to read 5, iclass 27, count 2 2006.230.01:15:21.37#ibcon#read 5, iclass 27, count 2 2006.230.01:15:21.37#ibcon#about to read 6, iclass 27, count 2 2006.230.01:15:21.37#ibcon#read 6, iclass 27, count 2 2006.230.01:15:21.37#ibcon#end of sib2, iclass 27, count 2 2006.230.01:15:21.37#ibcon#*after write, iclass 27, count 2 2006.230.01:15:21.37#ibcon#*before return 0, iclass 27, count 2 2006.230.01:15:21.37#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:21.37#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:15:21.37#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.01:15:21.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:15:21.37#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:21.49#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:21.49#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:21.49#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:15:21.49#ibcon#first serial, iclass 27, count 0 2006.230.01:15:21.49#ibcon#enter sib2, iclass 27, count 0 2006.230.01:15:21.49#ibcon#flushed, iclass 27, count 0 2006.230.01:15:21.49#ibcon#about to write, iclass 27, count 0 2006.230.01:15:21.49#ibcon#wrote, iclass 27, count 0 2006.230.01:15:21.49#ibcon#about to read 3, iclass 27, count 0 2006.230.01:15:21.51#ibcon#read 3, iclass 27, count 0 2006.230.01:15:21.51#ibcon#about to read 4, iclass 27, count 0 2006.230.01:15:21.51#ibcon#read 4, iclass 27, count 0 2006.230.01:15:21.51#ibcon#about to read 5, iclass 27, count 0 2006.230.01:15:21.51#ibcon#read 5, iclass 27, count 0 2006.230.01:15:21.51#ibcon#about to read 6, iclass 27, count 0 2006.230.01:15:21.51#ibcon#read 6, iclass 27, count 0 2006.230.01:15:21.51#ibcon#end of sib2, iclass 27, count 0 2006.230.01:15:21.51#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:15:21.51#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:15:21.51#ibcon#[27=USB\r\n] 2006.230.01:15:21.51#ibcon#*before write, iclass 27, count 0 2006.230.01:15:21.51#ibcon#enter sib2, iclass 27, count 0 2006.230.01:15:21.51#ibcon#flushed, iclass 27, count 0 2006.230.01:15:21.51#ibcon#about to write, iclass 27, count 0 2006.230.01:15:21.51#ibcon#wrote, iclass 27, count 0 2006.230.01:15:21.51#ibcon#about to read 3, iclass 27, count 0 2006.230.01:15:21.54#ibcon#read 3, iclass 27, count 0 2006.230.01:15:21.54#ibcon#about to read 4, iclass 27, count 0 2006.230.01:15:21.54#ibcon#read 4, iclass 27, count 0 2006.230.01:15:21.54#ibcon#about to read 5, iclass 27, count 0 2006.230.01:15:21.54#ibcon#read 5, iclass 27, count 0 2006.230.01:15:21.54#ibcon#about to read 6, iclass 27, count 0 2006.230.01:15:21.54#ibcon#read 6, iclass 27, count 0 2006.230.01:15:21.54#ibcon#end of sib2, iclass 27, count 0 2006.230.01:15:21.54#ibcon#*after write, iclass 27, count 0 2006.230.01:15:21.54#ibcon#*before return 0, iclass 27, count 0 2006.230.01:15:21.54#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:21.54#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:15:21.54#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:15:21.54#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:15:21.54$vck44/vabw=wide 2006.230.01:15:21.54#ibcon#iclass 29 nclrec 1 cls_cnt 2 2006.230.01:15:21.54#ibcon#iclass 29 iclrec 1 cls_cnt 2 2006.230.01:15:21.54#ibcon#ireg 8 cls_cnt 0 2006.230.01:15:21.54#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:21.54#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:21.54#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:21.54#ibcon#enter wrdev, iclass 29, count 0 2006.230.01:15:21.54#ibcon#first serial, iclass 29, count 0 2006.230.01:15:21.54#ibcon#enter sib2, iclass 29, count 0 2006.230.01:15:21.54#ibcon#flushed, iclass 29, count 0 2006.230.01:15:21.54#ibcon#about to write, iclass 29, count 0 2006.230.01:15:21.54#ibcon#wrote, iclass 29, count 0 2006.230.01:15:21.54#ibcon#about to read 3, iclass 29, count 0 2006.230.01:15:21.56#ibcon#read 3, iclass 29, count 0 2006.230.01:15:21.56#ibcon#about to read 4, iclass 29, count 0 2006.230.01:15:21.56#ibcon#read 4, iclass 29, count 0 2006.230.01:15:21.56#ibcon#about to read 5, iclass 29, count 0 2006.230.01:15:21.56#ibcon#read 5, iclass 29, count 0 2006.230.01:15:21.56#ibcon#about to read 6, iclass 29, count 0 2006.230.01:15:21.56#ibcon#read 6, iclass 29, count 0 2006.230.01:15:21.56#ibcon#end of sib2, iclass 29, count 0 2006.230.01:15:21.56#ibcon#*mode == 0, iclass 29, count 0 2006.230.01:15:21.56#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.01:15:21.56#ibcon#[25=BW32\r\n] 2006.230.01:15:21.56#ibcon#*before write, iclass 29, count 0 2006.230.01:15:21.56#ibcon#enter sib2, iclass 29, count 0 2006.230.01:15:21.56#ibcon#flushed, iclass 29, count 0 2006.230.01:15:21.56#ibcon#about to write, iclass 29, count 0 2006.230.01:15:21.56#ibcon#wrote, iclass 29, count 0 2006.230.01:15:21.56#ibcon#about to read 3, iclass 29, count 0 2006.230.01:15:21.59#ibcon#read 3, iclass 29, count 0 2006.230.01:15:21.59#ibcon#about to read 4, iclass 29, count 0 2006.230.01:15:21.59#ibcon#read 4, iclass 29, count 0 2006.230.01:15:21.59#ibcon#about to read 5, iclass 29, count 0 2006.230.01:15:21.59#ibcon#read 5, iclass 29, count 0 2006.230.01:15:21.59#ibcon#about to read 6, iclass 29, count 0 2006.230.01:15:21.59#ibcon#read 6, iclass 29, count 0 2006.230.01:15:21.59#ibcon#end of sib2, iclass 29, count 0 2006.230.01:15:21.59#ibcon#*after write, iclass 29, count 0 2006.230.01:15:21.59#ibcon#*before return 0, iclass 29, count 0 2006.230.01:15:21.59#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:21.59#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 0 2006.230.01:15:21.59#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.01:15:21.59#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.01:15:21.59$vck44/vbbw=wide 2006.230.01:15:21.59#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.01:15:21.59#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.01:15:21.59#ibcon#ireg 8 cls_cnt 0 2006.230.01:15:21.59#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:15:21.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:15:21.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:15:21.66#ibcon#enter wrdev, iclass 31, count 0 2006.230.01:15:21.66#ibcon#first serial, iclass 31, count 0 2006.230.01:15:21.66#ibcon#enter sib2, iclass 31, count 0 2006.230.01:15:21.66#ibcon#flushed, iclass 31, count 0 2006.230.01:15:21.66#ibcon#about to write, iclass 31, count 0 2006.230.01:15:21.66#ibcon#wrote, iclass 31, count 0 2006.230.01:15:21.66#ibcon#about to read 3, iclass 31, count 0 2006.230.01:15:21.68#ibcon#read 3, iclass 31, count 0 2006.230.01:15:21.68#ibcon#about to read 4, iclass 31, count 0 2006.230.01:15:21.68#ibcon#read 4, iclass 31, count 0 2006.230.01:15:21.68#ibcon#about to read 5, iclass 31, count 0 2006.230.01:15:21.68#ibcon#read 5, iclass 31, count 0 2006.230.01:15:21.68#ibcon#about to read 6, iclass 31, count 0 2006.230.01:15:21.68#ibcon#read 6, iclass 31, count 0 2006.230.01:15:21.68#ibcon#end of sib2, iclass 31, count 0 2006.230.01:15:21.68#ibcon#*mode == 0, iclass 31, count 0 2006.230.01:15:21.68#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.01:15:21.68#ibcon#[27=BW32\r\n] 2006.230.01:15:21.68#ibcon#*before write, iclass 31, count 0 2006.230.01:15:21.68#ibcon#enter sib2, iclass 31, count 0 2006.230.01:15:21.68#ibcon#flushed, iclass 31, count 0 2006.230.01:15:21.68#ibcon#about to write, iclass 31, count 0 2006.230.01:15:21.68#ibcon#wrote, iclass 31, count 0 2006.230.01:15:21.68#ibcon#about to read 3, iclass 31, count 0 2006.230.01:15:21.71#ibcon#read 3, iclass 31, count 0 2006.230.01:15:21.71#ibcon#about to read 4, iclass 31, count 0 2006.230.01:15:21.71#ibcon#read 4, iclass 31, count 0 2006.230.01:15:21.71#ibcon#about to read 5, iclass 31, count 0 2006.230.01:15:21.71#ibcon#read 5, iclass 31, count 0 2006.230.01:15:21.71#ibcon#about to read 6, iclass 31, count 0 2006.230.01:15:21.71#ibcon#read 6, iclass 31, count 0 2006.230.01:15:21.71#ibcon#end of sib2, iclass 31, count 0 2006.230.01:15:21.71#ibcon#*after write, iclass 31, count 0 2006.230.01:15:21.71#ibcon#*before return 0, iclass 31, count 0 2006.230.01:15:21.71#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:15:21.71#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:15:21.71#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.01:15:21.71#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.01:15:21.71$setupk4/ifdk4 2006.230.01:15:21.71$ifdk4/lo= 2006.230.01:15:21.71$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:15:21.71$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:15:21.71$ifdk4/patch= 2006.230.01:15:21.71$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:15:21.71$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:15:21.71$setupk4/!*+20s 2006.230.01:15:25.27#abcon#<5=/08 2.6 7.4 32.51 691002.7\r\n> 2006.230.01:15:25.29#abcon#{5=INTERFACE CLEAR} 2006.230.01:15:25.35#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:15:35.44#abcon#<5=/08 2.6 7.4 32.51 701002.7\r\n> 2006.230.01:15:35.46#abcon#{5=INTERFACE CLEAR} 2006.230.01:15:35.52#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:15:36.22$setupk4/"tpicd 2006.230.01:15:36.22$setupk4/echo=off 2006.230.01:15:36.22$setupk4/xlog=off 2006.230.01:15:36.22:!2006.230.01:18:45 2006.230.01:16:50.14#trakl#Source acquired 2006.230.01:16:51.14#flagr#flagr/antenna,acquired 2006.230.01:18:45.00:preob 2006.230.01:18:46.13/onsource/TRACKING 2006.230.01:18:46.13:!2006.230.01:18:55 2006.230.01:18:55.00:"tape 2006.230.01:18:55.00:"st=record 2006.230.01:18:55.00:data_valid=on 2006.230.01:18:55.00:midob 2006.230.01:18:55.13/onsource/TRACKING 2006.230.01:18:55.13/wx/32.53,1002.7,71 2006.230.01:18:55.34/cable/+6.3954E-03 2006.230.01:18:56.43/va/01,08,usb,yes,28,31 2006.230.01:18:56.43/va/02,07,usb,yes,31,31 2006.230.01:18:56.43/va/03,06,usb,yes,38,41 2006.230.01:18:56.43/va/04,07,usb,yes,32,33 2006.230.01:18:56.43/va/05,04,usb,yes,28,29 2006.230.01:18:56.43/va/06,04,usb,yes,32,31 2006.230.01:18:56.43/va/07,05,usb,yes,28,29 2006.230.01:18:56.43/va/08,06,usb,yes,20,25 2006.230.01:18:56.66/valo/01,524.99,yes,locked 2006.230.01:18:56.66/valo/02,534.99,yes,locked 2006.230.01:18:56.66/valo/03,564.99,yes,locked 2006.230.01:18:56.66/valo/04,624.99,yes,locked 2006.230.01:18:56.66/valo/05,734.99,yes,locked 2006.230.01:18:56.66/valo/06,814.99,yes,locked 2006.230.01:18:56.66/valo/07,864.99,yes,locked 2006.230.01:18:56.66/valo/08,884.99,yes,locked 2006.230.01:18:57.75/vb/01,04,usb,yes,30,28 2006.230.01:18:57.75/vb/02,04,usb,yes,33,32 2006.230.01:18:57.75/vb/03,04,usb,yes,30,33 2006.230.01:18:57.75/vb/04,04,usb,yes,34,33 2006.230.01:18:57.75/vb/05,04,usb,yes,26,29 2006.230.01:18:57.75/vb/06,04,usb,yes,31,27 2006.230.01:18:57.75/vb/07,04,usb,yes,31,31 2006.230.01:18:57.75/vb/08,04,usb,yes,28,32 2006.230.01:18:57.98/vblo/01,629.99,yes,locked 2006.230.01:18:57.98/vblo/02,634.99,yes,locked 2006.230.01:18:57.98/vblo/03,649.99,yes,locked 2006.230.01:18:57.98/vblo/04,679.99,yes,locked 2006.230.01:18:57.98/vblo/05,709.99,yes,locked 2006.230.01:18:57.98/vblo/06,719.99,yes,locked 2006.230.01:18:57.98/vblo/07,734.99,yes,locked 2006.230.01:18:57.98/vblo/08,744.99,yes,locked 2006.230.01:18:58.13/vabw/8 2006.230.01:18:58.28/vbbw/8 2006.230.01:18:58.37/xfe/off,on,12.0 2006.230.01:18:58.76/ifatt/23,28,28,28 2006.230.01:18:59.07/fmout-gps/S +4.50E-07 2006.230.01:18:59.11:!2006.230.01:25:55 2006.230.01:25:55.00:data_valid=off 2006.230.01:25:55.00:"et 2006.230.01:25:55.00:!+3s 2006.230.01:25:58.01:"tape 2006.230.01:25:58.01:postob 2006.230.01:25:58.21/cable/+6.3950E-03 2006.230.01:25:58.21/wx/32.67,1002.7,68 2006.230.01:25:59.08/fmout-gps/S +4.48E-07 2006.230.01:25:59.08:scan_name=230-0132,jd0608,290 2006.230.01:25:59.08:source=1803+784,180045.68,782804.0,2000.0,neutral 2006.230.01:25:59.13#flagr#flagr/antenna,new-source 2006.230.01:26:00.13:checkk5 2006.230.01:26:00.55/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:26:00.98/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:26:01.41/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:26:01.83/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:26:02.21/chk_obsdata//k5ts1/T2300118??a.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.230.01:26:02.61/chk_obsdata//k5ts2/T2300118??b.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.230.01:26:03.08/chk_obsdata//k5ts3/T2300118??c.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.230.01:26:03.52/chk_obsdata//k5ts4/T2300118??d.dat file size is correct (nominal:1680MB, actual:1676MB). 2006.230.01:26:04.30/k5log//k5ts1_log_newline 2006.230.01:26:04.99/k5log//k5ts2_log_newline 2006.230.01:26:05.74/k5log//k5ts3_log_newline 2006.230.01:26:06.55/k5log//k5ts4_log_newline 2006.230.01:26:06.57/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:26:06.57:setupk4=1 2006.230.01:26:06.57$setupk4/echo=on 2006.230.01:26:06.57$setupk4/pcalon 2006.230.01:26:06.57$pcalon/"no phase cal control is implemented here 2006.230.01:26:06.57$setupk4/"tpicd=stop 2006.230.01:26:06.57$setupk4/"rec=synch_on 2006.230.01:26:06.57$setupk4/"rec_mode=128 2006.230.01:26:06.57$setupk4/!* 2006.230.01:26:06.57$setupk4/recpk4 2006.230.01:26:06.57$recpk4/recpatch= 2006.230.01:26:06.58$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:26:06.58$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:26:06.58$setupk4/vck44 2006.230.01:26:06.58$vck44/valo=1,524.99 2006.230.01:26:06.58#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:26:06.58#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:26:06.58#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:06.58#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:06.58#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:06.58#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:06.58#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:26:06.58#ibcon#first serial, iclass 40, count 0 2006.230.01:26:06.58#ibcon#enter sib2, iclass 40, count 0 2006.230.01:26:06.58#ibcon#flushed, iclass 40, count 0 2006.230.01:26:06.58#ibcon#about to write, iclass 40, count 0 2006.230.01:26:06.58#ibcon#wrote, iclass 40, count 0 2006.230.01:26:06.58#ibcon#about to read 3, iclass 40, count 0 2006.230.01:26:06.62#ibcon#read 3, iclass 40, count 0 2006.230.01:26:06.62#ibcon#about to read 4, iclass 40, count 0 2006.230.01:26:06.62#ibcon#read 4, iclass 40, count 0 2006.230.01:26:06.62#ibcon#about to read 5, iclass 40, count 0 2006.230.01:26:06.62#ibcon#read 5, iclass 40, count 0 2006.230.01:26:06.62#ibcon#about to read 6, iclass 40, count 0 2006.230.01:26:06.62#ibcon#read 6, iclass 40, count 0 2006.230.01:26:06.62#ibcon#end of sib2, iclass 40, count 0 2006.230.01:26:06.62#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:26:06.62#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:26:06.62#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:26:06.62#ibcon#*before write, iclass 40, count 0 2006.230.01:26:06.62#ibcon#enter sib2, iclass 40, count 0 2006.230.01:26:06.62#ibcon#flushed, iclass 40, count 0 2006.230.01:26:06.62#ibcon#about to write, iclass 40, count 0 2006.230.01:26:06.62#ibcon#wrote, iclass 40, count 0 2006.230.01:26:06.62#ibcon#about to read 3, iclass 40, count 0 2006.230.01:26:06.66#ibcon#read 3, iclass 40, count 0 2006.230.01:26:06.66#ibcon#about to read 4, iclass 40, count 0 2006.230.01:26:06.66#ibcon#read 4, iclass 40, count 0 2006.230.01:26:06.66#ibcon#about to read 5, iclass 40, count 0 2006.230.01:26:06.66#ibcon#read 5, iclass 40, count 0 2006.230.01:26:06.66#ibcon#about to read 6, iclass 40, count 0 2006.230.01:26:06.66#ibcon#read 6, iclass 40, count 0 2006.230.01:26:06.66#ibcon#end of sib2, iclass 40, count 0 2006.230.01:26:06.66#ibcon#*after write, iclass 40, count 0 2006.230.01:26:06.66#ibcon#*before return 0, iclass 40, count 0 2006.230.01:26:06.66#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:06.66#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:06.66#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:26:06.66#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:26:06.66$vck44/va=1,8 2006.230.01:26:06.66#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.01:26:06.66#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.01:26:06.66#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:06.66#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:06.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:06.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:06.66#ibcon#enter wrdev, iclass 4, count 2 2006.230.01:26:06.66#ibcon#first serial, iclass 4, count 2 2006.230.01:26:06.66#ibcon#enter sib2, iclass 4, count 2 2006.230.01:26:06.66#ibcon#flushed, iclass 4, count 2 2006.230.01:26:06.66#ibcon#about to write, iclass 4, count 2 2006.230.01:26:06.66#ibcon#wrote, iclass 4, count 2 2006.230.01:26:06.66#ibcon#about to read 3, iclass 4, count 2 2006.230.01:26:06.68#ibcon#read 3, iclass 4, count 2 2006.230.01:26:06.68#ibcon#about to read 4, iclass 4, count 2 2006.230.01:26:06.68#ibcon#read 4, iclass 4, count 2 2006.230.01:26:06.68#ibcon#about to read 5, iclass 4, count 2 2006.230.01:26:06.68#ibcon#read 5, iclass 4, count 2 2006.230.01:26:06.68#ibcon#about to read 6, iclass 4, count 2 2006.230.01:26:06.68#ibcon#read 6, iclass 4, count 2 2006.230.01:26:06.68#ibcon#end of sib2, iclass 4, count 2 2006.230.01:26:06.68#ibcon#*mode == 0, iclass 4, count 2 2006.230.01:26:06.68#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.01:26:06.68#ibcon#[25=AT01-08\r\n] 2006.230.01:26:06.68#ibcon#*before write, iclass 4, count 2 2006.230.01:26:06.68#ibcon#enter sib2, iclass 4, count 2 2006.230.01:26:06.68#ibcon#flushed, iclass 4, count 2 2006.230.01:26:06.68#ibcon#about to write, iclass 4, count 2 2006.230.01:26:06.68#ibcon#wrote, iclass 4, count 2 2006.230.01:26:06.68#ibcon#about to read 3, iclass 4, count 2 2006.230.01:26:06.71#ibcon#read 3, iclass 4, count 2 2006.230.01:26:06.71#ibcon#about to read 4, iclass 4, count 2 2006.230.01:26:06.71#ibcon#read 4, iclass 4, count 2 2006.230.01:26:06.71#ibcon#about to read 5, iclass 4, count 2 2006.230.01:26:06.71#ibcon#read 5, iclass 4, count 2 2006.230.01:26:06.71#ibcon#about to read 6, iclass 4, count 2 2006.230.01:26:06.71#ibcon#read 6, iclass 4, count 2 2006.230.01:26:06.71#ibcon#end of sib2, iclass 4, count 2 2006.230.01:26:06.71#ibcon#*after write, iclass 4, count 2 2006.230.01:26:06.71#ibcon#*before return 0, iclass 4, count 2 2006.230.01:26:06.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:06.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:06.71#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.01:26:06.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:06.71#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:06.83#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:06.83#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:06.83#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:26:06.83#ibcon#first serial, iclass 4, count 0 2006.230.01:26:06.83#ibcon#enter sib2, iclass 4, count 0 2006.230.01:26:06.83#ibcon#flushed, iclass 4, count 0 2006.230.01:26:06.83#ibcon#about to write, iclass 4, count 0 2006.230.01:26:06.83#ibcon#wrote, iclass 4, count 0 2006.230.01:26:06.83#ibcon#about to read 3, iclass 4, count 0 2006.230.01:26:06.85#ibcon#read 3, iclass 4, count 0 2006.230.01:26:06.85#ibcon#about to read 4, iclass 4, count 0 2006.230.01:26:06.85#ibcon#read 4, iclass 4, count 0 2006.230.01:26:06.85#ibcon#about to read 5, iclass 4, count 0 2006.230.01:26:06.85#ibcon#read 5, iclass 4, count 0 2006.230.01:26:06.85#ibcon#about to read 6, iclass 4, count 0 2006.230.01:26:06.85#ibcon#read 6, iclass 4, count 0 2006.230.01:26:06.85#ibcon#end of sib2, iclass 4, count 0 2006.230.01:26:06.85#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:26:06.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:26:06.85#ibcon#[25=USB\r\n] 2006.230.01:26:06.85#ibcon#*before write, iclass 4, count 0 2006.230.01:26:06.85#ibcon#enter sib2, iclass 4, count 0 2006.230.01:26:06.85#ibcon#flushed, iclass 4, count 0 2006.230.01:26:06.85#ibcon#about to write, iclass 4, count 0 2006.230.01:26:06.85#ibcon#wrote, iclass 4, count 0 2006.230.01:26:06.85#ibcon#about to read 3, iclass 4, count 0 2006.230.01:26:06.88#ibcon#read 3, iclass 4, count 0 2006.230.01:26:06.88#ibcon#about to read 4, iclass 4, count 0 2006.230.01:26:06.88#ibcon#read 4, iclass 4, count 0 2006.230.01:26:06.88#ibcon#about to read 5, iclass 4, count 0 2006.230.01:26:06.88#ibcon#read 5, iclass 4, count 0 2006.230.01:26:06.88#ibcon#about to read 6, iclass 4, count 0 2006.230.01:26:06.88#ibcon#read 6, iclass 4, count 0 2006.230.01:26:06.88#ibcon#end of sib2, iclass 4, count 0 2006.230.01:26:06.88#ibcon#*after write, iclass 4, count 0 2006.230.01:26:06.88#ibcon#*before return 0, iclass 4, count 0 2006.230.01:26:06.88#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:06.88#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:06.88#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:26:06.88#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:26:06.88$vck44/valo=2,534.99 2006.230.01:26:06.88#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:26:06.88#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:26:06.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:06.88#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:06.88#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:06.88#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:06.88#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:26:06.88#ibcon#first serial, iclass 6, count 0 2006.230.01:26:06.88#ibcon#enter sib2, iclass 6, count 0 2006.230.01:26:06.88#ibcon#flushed, iclass 6, count 0 2006.230.01:26:06.88#ibcon#about to write, iclass 6, count 0 2006.230.01:26:06.88#ibcon#wrote, iclass 6, count 0 2006.230.01:26:06.88#ibcon#about to read 3, iclass 6, count 0 2006.230.01:26:06.90#ibcon#read 3, iclass 6, count 0 2006.230.01:26:06.90#ibcon#about to read 4, iclass 6, count 0 2006.230.01:26:06.90#ibcon#read 4, iclass 6, count 0 2006.230.01:26:06.90#ibcon#about to read 5, iclass 6, count 0 2006.230.01:26:06.90#ibcon#read 5, iclass 6, count 0 2006.230.01:26:06.90#ibcon#about to read 6, iclass 6, count 0 2006.230.01:26:06.90#ibcon#read 6, iclass 6, count 0 2006.230.01:26:06.90#ibcon#end of sib2, iclass 6, count 0 2006.230.01:26:06.90#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:26:06.90#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:26:06.90#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:26:06.90#ibcon#*before write, iclass 6, count 0 2006.230.01:26:06.90#ibcon#enter sib2, iclass 6, count 0 2006.230.01:26:06.90#ibcon#flushed, iclass 6, count 0 2006.230.01:26:06.90#ibcon#about to write, iclass 6, count 0 2006.230.01:26:06.90#ibcon#wrote, iclass 6, count 0 2006.230.01:26:06.90#ibcon#about to read 3, iclass 6, count 0 2006.230.01:26:06.94#ibcon#read 3, iclass 6, count 0 2006.230.01:26:06.94#ibcon#about to read 4, iclass 6, count 0 2006.230.01:26:06.94#ibcon#read 4, iclass 6, count 0 2006.230.01:26:06.94#ibcon#about to read 5, iclass 6, count 0 2006.230.01:26:06.94#ibcon#read 5, iclass 6, count 0 2006.230.01:26:06.94#ibcon#about to read 6, iclass 6, count 0 2006.230.01:26:06.94#ibcon#read 6, iclass 6, count 0 2006.230.01:26:06.94#ibcon#end of sib2, iclass 6, count 0 2006.230.01:26:06.94#ibcon#*after write, iclass 6, count 0 2006.230.01:26:06.94#ibcon#*before return 0, iclass 6, count 0 2006.230.01:26:06.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:06.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:06.94#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:26:06.94#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:26:06.94$vck44/va=2,7 2006.230.01:26:06.94#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.01:26:06.94#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.01:26:06.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:06.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:07.00#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:07.00#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:07.00#ibcon#enter wrdev, iclass 10, count 2 2006.230.01:26:07.00#ibcon#first serial, iclass 10, count 2 2006.230.01:26:07.00#ibcon#enter sib2, iclass 10, count 2 2006.230.01:26:07.00#ibcon#flushed, iclass 10, count 2 2006.230.01:26:07.00#ibcon#about to write, iclass 10, count 2 2006.230.01:26:07.00#ibcon#wrote, iclass 10, count 2 2006.230.01:26:07.00#ibcon#about to read 3, iclass 10, count 2 2006.230.01:26:07.02#ibcon#read 3, iclass 10, count 2 2006.230.01:26:07.02#ibcon#about to read 4, iclass 10, count 2 2006.230.01:26:07.02#ibcon#read 4, iclass 10, count 2 2006.230.01:26:07.02#ibcon#about to read 5, iclass 10, count 2 2006.230.01:26:07.02#ibcon#read 5, iclass 10, count 2 2006.230.01:26:07.02#ibcon#about to read 6, iclass 10, count 2 2006.230.01:26:07.02#ibcon#read 6, iclass 10, count 2 2006.230.01:26:07.02#ibcon#end of sib2, iclass 10, count 2 2006.230.01:26:07.02#ibcon#*mode == 0, iclass 10, count 2 2006.230.01:26:07.02#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.01:26:07.02#ibcon#[25=AT02-07\r\n] 2006.230.01:26:07.02#ibcon#*before write, iclass 10, count 2 2006.230.01:26:07.02#ibcon#enter sib2, iclass 10, count 2 2006.230.01:26:07.02#ibcon#flushed, iclass 10, count 2 2006.230.01:26:07.02#ibcon#about to write, iclass 10, count 2 2006.230.01:26:07.02#ibcon#wrote, iclass 10, count 2 2006.230.01:26:07.02#ibcon#about to read 3, iclass 10, count 2 2006.230.01:26:07.05#ibcon#read 3, iclass 10, count 2 2006.230.01:26:07.05#ibcon#about to read 4, iclass 10, count 2 2006.230.01:26:07.05#ibcon#read 4, iclass 10, count 2 2006.230.01:26:07.05#ibcon#about to read 5, iclass 10, count 2 2006.230.01:26:07.05#ibcon#read 5, iclass 10, count 2 2006.230.01:26:07.05#ibcon#about to read 6, iclass 10, count 2 2006.230.01:26:07.05#ibcon#read 6, iclass 10, count 2 2006.230.01:26:07.05#ibcon#end of sib2, iclass 10, count 2 2006.230.01:26:07.05#ibcon#*after write, iclass 10, count 2 2006.230.01:26:07.05#ibcon#*before return 0, iclass 10, count 2 2006.230.01:26:07.05#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:07.05#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:07.05#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.01:26:07.05#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:07.05#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:07.17#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:07.17#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:07.17#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:26:07.17#ibcon#first serial, iclass 10, count 0 2006.230.01:26:07.17#ibcon#enter sib2, iclass 10, count 0 2006.230.01:26:07.17#ibcon#flushed, iclass 10, count 0 2006.230.01:26:07.17#ibcon#about to write, iclass 10, count 0 2006.230.01:26:07.17#ibcon#wrote, iclass 10, count 0 2006.230.01:26:07.17#ibcon#about to read 3, iclass 10, count 0 2006.230.01:26:07.19#ibcon#read 3, iclass 10, count 0 2006.230.01:26:07.19#ibcon#about to read 4, iclass 10, count 0 2006.230.01:26:07.19#ibcon#read 4, iclass 10, count 0 2006.230.01:26:07.19#ibcon#about to read 5, iclass 10, count 0 2006.230.01:26:07.19#ibcon#read 5, iclass 10, count 0 2006.230.01:26:07.19#ibcon#about to read 6, iclass 10, count 0 2006.230.01:26:07.19#ibcon#read 6, iclass 10, count 0 2006.230.01:26:07.19#ibcon#end of sib2, iclass 10, count 0 2006.230.01:26:07.19#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:26:07.19#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:26:07.19#ibcon#[25=USB\r\n] 2006.230.01:26:07.19#ibcon#*before write, iclass 10, count 0 2006.230.01:26:07.19#ibcon#enter sib2, iclass 10, count 0 2006.230.01:26:07.19#ibcon#flushed, iclass 10, count 0 2006.230.01:26:07.19#ibcon#about to write, iclass 10, count 0 2006.230.01:26:07.19#ibcon#wrote, iclass 10, count 0 2006.230.01:26:07.19#ibcon#about to read 3, iclass 10, count 0 2006.230.01:26:07.22#ibcon#read 3, iclass 10, count 0 2006.230.01:26:07.22#ibcon#about to read 4, iclass 10, count 0 2006.230.01:26:07.22#ibcon#read 4, iclass 10, count 0 2006.230.01:26:07.22#ibcon#about to read 5, iclass 10, count 0 2006.230.01:26:07.22#ibcon#read 5, iclass 10, count 0 2006.230.01:26:07.22#ibcon#about to read 6, iclass 10, count 0 2006.230.01:26:07.22#ibcon#read 6, iclass 10, count 0 2006.230.01:26:07.22#ibcon#end of sib2, iclass 10, count 0 2006.230.01:26:07.22#ibcon#*after write, iclass 10, count 0 2006.230.01:26:07.22#ibcon#*before return 0, iclass 10, count 0 2006.230.01:26:07.22#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:07.22#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:07.22#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:26:07.22#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:26:07.22$vck44/valo=3,564.99 2006.230.01:26:07.22#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.01:26:07.22#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.01:26:07.22#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:07.22#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:07.22#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:07.22#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:07.22#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:26:07.22#ibcon#first serial, iclass 12, count 0 2006.230.01:26:07.22#ibcon#enter sib2, iclass 12, count 0 2006.230.01:26:07.22#ibcon#flushed, iclass 12, count 0 2006.230.01:26:07.22#ibcon#about to write, iclass 12, count 0 2006.230.01:26:07.22#ibcon#wrote, iclass 12, count 0 2006.230.01:26:07.22#ibcon#about to read 3, iclass 12, count 0 2006.230.01:26:07.24#ibcon#read 3, iclass 12, count 0 2006.230.01:26:07.24#ibcon#about to read 4, iclass 12, count 0 2006.230.01:26:07.24#ibcon#read 4, iclass 12, count 0 2006.230.01:26:07.24#ibcon#about to read 5, iclass 12, count 0 2006.230.01:26:07.24#ibcon#read 5, iclass 12, count 0 2006.230.01:26:07.24#ibcon#about to read 6, iclass 12, count 0 2006.230.01:26:07.24#ibcon#read 6, iclass 12, count 0 2006.230.01:26:07.24#ibcon#end of sib2, iclass 12, count 0 2006.230.01:26:07.24#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:26:07.24#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:26:07.24#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:26:07.24#ibcon#*before write, iclass 12, count 0 2006.230.01:26:07.24#ibcon#enter sib2, iclass 12, count 0 2006.230.01:26:07.24#ibcon#flushed, iclass 12, count 0 2006.230.01:26:07.24#ibcon#about to write, iclass 12, count 0 2006.230.01:26:07.24#ibcon#wrote, iclass 12, count 0 2006.230.01:26:07.24#ibcon#about to read 3, iclass 12, count 0 2006.230.01:26:07.28#ibcon#read 3, iclass 12, count 0 2006.230.01:26:07.28#ibcon#about to read 4, iclass 12, count 0 2006.230.01:26:07.28#ibcon#read 4, iclass 12, count 0 2006.230.01:26:07.28#ibcon#about to read 5, iclass 12, count 0 2006.230.01:26:07.28#ibcon#read 5, iclass 12, count 0 2006.230.01:26:07.28#ibcon#about to read 6, iclass 12, count 0 2006.230.01:26:07.28#ibcon#read 6, iclass 12, count 0 2006.230.01:26:07.28#ibcon#end of sib2, iclass 12, count 0 2006.230.01:26:07.28#ibcon#*after write, iclass 12, count 0 2006.230.01:26:07.28#ibcon#*before return 0, iclass 12, count 0 2006.230.01:26:07.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:07.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:07.28#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:26:07.28#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:26:07.28$vck44/va=3,6 2006.230.01:26:07.28#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.01:26:07.28#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.01:26:07.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:07.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:07.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:07.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:07.34#ibcon#enter wrdev, iclass 14, count 2 2006.230.01:26:07.34#ibcon#first serial, iclass 14, count 2 2006.230.01:26:07.34#ibcon#enter sib2, iclass 14, count 2 2006.230.01:26:07.34#ibcon#flushed, iclass 14, count 2 2006.230.01:26:07.34#ibcon#about to write, iclass 14, count 2 2006.230.01:26:07.34#ibcon#wrote, iclass 14, count 2 2006.230.01:26:07.34#ibcon#about to read 3, iclass 14, count 2 2006.230.01:26:07.36#ibcon#read 3, iclass 14, count 2 2006.230.01:26:07.36#ibcon#about to read 4, iclass 14, count 2 2006.230.01:26:07.36#ibcon#read 4, iclass 14, count 2 2006.230.01:26:07.36#ibcon#about to read 5, iclass 14, count 2 2006.230.01:26:07.36#ibcon#read 5, iclass 14, count 2 2006.230.01:26:07.36#ibcon#about to read 6, iclass 14, count 2 2006.230.01:26:07.36#ibcon#read 6, iclass 14, count 2 2006.230.01:26:07.36#ibcon#end of sib2, iclass 14, count 2 2006.230.01:26:07.36#ibcon#*mode == 0, iclass 14, count 2 2006.230.01:26:07.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.01:26:07.36#ibcon#[25=AT03-06\r\n] 2006.230.01:26:07.36#ibcon#*before write, iclass 14, count 2 2006.230.01:26:07.36#ibcon#enter sib2, iclass 14, count 2 2006.230.01:26:07.36#ibcon#flushed, iclass 14, count 2 2006.230.01:26:07.36#ibcon#about to write, iclass 14, count 2 2006.230.01:26:07.36#ibcon#wrote, iclass 14, count 2 2006.230.01:26:07.36#ibcon#about to read 3, iclass 14, count 2 2006.230.01:26:07.39#ibcon#read 3, iclass 14, count 2 2006.230.01:26:07.39#ibcon#about to read 4, iclass 14, count 2 2006.230.01:26:07.39#ibcon#read 4, iclass 14, count 2 2006.230.01:26:07.39#ibcon#about to read 5, iclass 14, count 2 2006.230.01:26:07.39#ibcon#read 5, iclass 14, count 2 2006.230.01:26:07.39#ibcon#about to read 6, iclass 14, count 2 2006.230.01:26:07.39#ibcon#read 6, iclass 14, count 2 2006.230.01:26:07.39#ibcon#end of sib2, iclass 14, count 2 2006.230.01:26:07.39#ibcon#*after write, iclass 14, count 2 2006.230.01:26:07.39#ibcon#*before return 0, iclass 14, count 2 2006.230.01:26:07.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:07.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:07.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.01:26:07.39#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:07.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:07.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:07.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:07.51#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:26:07.51#ibcon#first serial, iclass 14, count 0 2006.230.01:26:07.51#ibcon#enter sib2, iclass 14, count 0 2006.230.01:26:07.51#ibcon#flushed, iclass 14, count 0 2006.230.01:26:07.51#ibcon#about to write, iclass 14, count 0 2006.230.01:26:07.51#ibcon#wrote, iclass 14, count 0 2006.230.01:26:07.51#ibcon#about to read 3, iclass 14, count 0 2006.230.01:26:07.53#ibcon#read 3, iclass 14, count 0 2006.230.01:26:07.53#ibcon#about to read 4, iclass 14, count 0 2006.230.01:26:07.53#ibcon#read 4, iclass 14, count 0 2006.230.01:26:07.53#ibcon#about to read 5, iclass 14, count 0 2006.230.01:26:07.53#ibcon#read 5, iclass 14, count 0 2006.230.01:26:07.53#ibcon#about to read 6, iclass 14, count 0 2006.230.01:26:07.53#ibcon#read 6, iclass 14, count 0 2006.230.01:26:07.53#ibcon#end of sib2, iclass 14, count 0 2006.230.01:26:07.53#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:26:07.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:26:07.53#ibcon#[25=USB\r\n] 2006.230.01:26:07.53#ibcon#*before write, iclass 14, count 0 2006.230.01:26:07.53#ibcon#enter sib2, iclass 14, count 0 2006.230.01:26:07.53#ibcon#flushed, iclass 14, count 0 2006.230.01:26:07.53#ibcon#about to write, iclass 14, count 0 2006.230.01:26:07.53#ibcon#wrote, iclass 14, count 0 2006.230.01:26:07.53#ibcon#about to read 3, iclass 14, count 0 2006.230.01:26:07.56#ibcon#read 3, iclass 14, count 0 2006.230.01:26:07.56#ibcon#about to read 4, iclass 14, count 0 2006.230.01:26:07.56#ibcon#read 4, iclass 14, count 0 2006.230.01:26:07.56#ibcon#about to read 5, iclass 14, count 0 2006.230.01:26:07.56#ibcon#read 5, iclass 14, count 0 2006.230.01:26:07.56#ibcon#about to read 6, iclass 14, count 0 2006.230.01:26:07.56#ibcon#read 6, iclass 14, count 0 2006.230.01:26:07.56#ibcon#end of sib2, iclass 14, count 0 2006.230.01:26:07.56#ibcon#*after write, iclass 14, count 0 2006.230.01:26:07.56#ibcon#*before return 0, iclass 14, count 0 2006.230.01:26:07.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:07.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:07.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:26:07.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:26:07.56$vck44/valo=4,624.99 2006.230.01:26:07.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:26:07.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:26:07.56#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:07.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:07.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:07.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:07.56#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:26:07.56#ibcon#first serial, iclass 16, count 0 2006.230.01:26:07.56#ibcon#enter sib2, iclass 16, count 0 2006.230.01:26:07.56#ibcon#flushed, iclass 16, count 0 2006.230.01:26:07.56#ibcon#about to write, iclass 16, count 0 2006.230.01:26:07.56#ibcon#wrote, iclass 16, count 0 2006.230.01:26:07.56#ibcon#about to read 3, iclass 16, count 0 2006.230.01:26:07.58#ibcon#read 3, iclass 16, count 0 2006.230.01:26:07.58#ibcon#about to read 4, iclass 16, count 0 2006.230.01:26:07.58#ibcon#read 4, iclass 16, count 0 2006.230.01:26:07.58#ibcon#about to read 5, iclass 16, count 0 2006.230.01:26:07.58#ibcon#read 5, iclass 16, count 0 2006.230.01:26:07.58#ibcon#about to read 6, iclass 16, count 0 2006.230.01:26:07.58#ibcon#read 6, iclass 16, count 0 2006.230.01:26:07.58#ibcon#end of sib2, iclass 16, count 0 2006.230.01:26:07.58#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:26:07.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:26:07.58#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:26:07.58#ibcon#*before write, iclass 16, count 0 2006.230.01:26:07.58#ibcon#enter sib2, iclass 16, count 0 2006.230.01:26:07.58#ibcon#flushed, iclass 16, count 0 2006.230.01:26:07.58#ibcon#about to write, iclass 16, count 0 2006.230.01:26:07.58#ibcon#wrote, iclass 16, count 0 2006.230.01:26:07.58#ibcon#about to read 3, iclass 16, count 0 2006.230.01:26:07.62#ibcon#read 3, iclass 16, count 0 2006.230.01:26:07.62#ibcon#about to read 4, iclass 16, count 0 2006.230.01:26:07.62#ibcon#read 4, iclass 16, count 0 2006.230.01:26:07.62#ibcon#about to read 5, iclass 16, count 0 2006.230.01:26:07.62#ibcon#read 5, iclass 16, count 0 2006.230.01:26:07.62#ibcon#about to read 6, iclass 16, count 0 2006.230.01:26:07.62#ibcon#read 6, iclass 16, count 0 2006.230.01:26:07.62#ibcon#end of sib2, iclass 16, count 0 2006.230.01:26:07.62#ibcon#*after write, iclass 16, count 0 2006.230.01:26:07.62#ibcon#*before return 0, iclass 16, count 0 2006.230.01:26:07.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:07.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:07.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:26:07.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:26:07.62$vck44/va=4,7 2006.230.01:26:07.62#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.230.01:26:07.62#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.230.01:26:07.62#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:07.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:07.68#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:07.68#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:07.68#ibcon#enter wrdev, iclass 18, count 2 2006.230.01:26:07.68#ibcon#first serial, iclass 18, count 2 2006.230.01:26:07.68#ibcon#enter sib2, iclass 18, count 2 2006.230.01:26:07.68#ibcon#flushed, iclass 18, count 2 2006.230.01:26:07.68#ibcon#about to write, iclass 18, count 2 2006.230.01:26:07.68#ibcon#wrote, iclass 18, count 2 2006.230.01:26:07.68#ibcon#about to read 3, iclass 18, count 2 2006.230.01:26:07.70#ibcon#read 3, iclass 18, count 2 2006.230.01:26:07.70#ibcon#about to read 4, iclass 18, count 2 2006.230.01:26:07.70#ibcon#read 4, iclass 18, count 2 2006.230.01:26:07.70#ibcon#about to read 5, iclass 18, count 2 2006.230.01:26:07.70#ibcon#read 5, iclass 18, count 2 2006.230.01:26:07.70#ibcon#about to read 6, iclass 18, count 2 2006.230.01:26:07.70#ibcon#read 6, iclass 18, count 2 2006.230.01:26:07.70#ibcon#end of sib2, iclass 18, count 2 2006.230.01:26:07.70#ibcon#*mode == 0, iclass 18, count 2 2006.230.01:26:07.70#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.230.01:26:07.70#ibcon#[25=AT04-07\r\n] 2006.230.01:26:07.70#ibcon#*before write, iclass 18, count 2 2006.230.01:26:07.70#ibcon#enter sib2, iclass 18, count 2 2006.230.01:26:07.70#ibcon#flushed, iclass 18, count 2 2006.230.01:26:07.70#ibcon#about to write, iclass 18, count 2 2006.230.01:26:07.70#ibcon#wrote, iclass 18, count 2 2006.230.01:26:07.70#ibcon#about to read 3, iclass 18, count 2 2006.230.01:26:07.73#ibcon#read 3, iclass 18, count 2 2006.230.01:26:07.73#ibcon#about to read 4, iclass 18, count 2 2006.230.01:26:07.73#ibcon#read 4, iclass 18, count 2 2006.230.01:26:07.73#ibcon#about to read 5, iclass 18, count 2 2006.230.01:26:07.73#ibcon#read 5, iclass 18, count 2 2006.230.01:26:07.73#ibcon#about to read 6, iclass 18, count 2 2006.230.01:26:07.73#ibcon#read 6, iclass 18, count 2 2006.230.01:26:07.73#ibcon#end of sib2, iclass 18, count 2 2006.230.01:26:07.73#ibcon#*after write, iclass 18, count 2 2006.230.01:26:07.73#ibcon#*before return 0, iclass 18, count 2 2006.230.01:26:07.73#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:07.73#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:07.73#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.230.01:26:07.73#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:07.73#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:07.85#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:07.85#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:07.85#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:26:07.85#ibcon#first serial, iclass 18, count 0 2006.230.01:26:07.85#ibcon#enter sib2, iclass 18, count 0 2006.230.01:26:07.85#ibcon#flushed, iclass 18, count 0 2006.230.01:26:07.85#ibcon#about to write, iclass 18, count 0 2006.230.01:26:07.85#ibcon#wrote, iclass 18, count 0 2006.230.01:26:07.85#ibcon#about to read 3, iclass 18, count 0 2006.230.01:26:07.87#ibcon#read 3, iclass 18, count 0 2006.230.01:26:07.87#ibcon#about to read 4, iclass 18, count 0 2006.230.01:26:07.87#ibcon#read 4, iclass 18, count 0 2006.230.01:26:07.87#ibcon#about to read 5, iclass 18, count 0 2006.230.01:26:07.87#ibcon#read 5, iclass 18, count 0 2006.230.01:26:07.87#ibcon#about to read 6, iclass 18, count 0 2006.230.01:26:07.87#ibcon#read 6, iclass 18, count 0 2006.230.01:26:07.87#ibcon#end of sib2, iclass 18, count 0 2006.230.01:26:07.87#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:26:07.87#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:26:07.87#ibcon#[25=USB\r\n] 2006.230.01:26:07.87#ibcon#*before write, iclass 18, count 0 2006.230.01:26:07.87#ibcon#enter sib2, iclass 18, count 0 2006.230.01:26:07.87#ibcon#flushed, iclass 18, count 0 2006.230.01:26:07.87#ibcon#about to write, iclass 18, count 0 2006.230.01:26:07.87#ibcon#wrote, iclass 18, count 0 2006.230.01:26:07.87#ibcon#about to read 3, iclass 18, count 0 2006.230.01:26:07.90#ibcon#read 3, iclass 18, count 0 2006.230.01:26:07.90#ibcon#about to read 4, iclass 18, count 0 2006.230.01:26:07.90#ibcon#read 4, iclass 18, count 0 2006.230.01:26:07.90#ibcon#about to read 5, iclass 18, count 0 2006.230.01:26:07.90#ibcon#read 5, iclass 18, count 0 2006.230.01:26:07.90#ibcon#about to read 6, iclass 18, count 0 2006.230.01:26:07.90#ibcon#read 6, iclass 18, count 0 2006.230.01:26:07.90#ibcon#end of sib2, iclass 18, count 0 2006.230.01:26:07.90#ibcon#*after write, iclass 18, count 0 2006.230.01:26:07.90#ibcon#*before return 0, iclass 18, count 0 2006.230.01:26:07.90#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:07.90#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:07.90#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:26:07.90#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:26:07.90$vck44/valo=5,734.99 2006.230.01:26:07.90#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.01:26:07.90#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.01:26:07.90#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:07.90#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:07.90#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:07.90#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:07.90#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:26:07.90#ibcon#first serial, iclass 20, count 0 2006.230.01:26:07.90#ibcon#enter sib2, iclass 20, count 0 2006.230.01:26:07.90#ibcon#flushed, iclass 20, count 0 2006.230.01:26:07.90#ibcon#about to write, iclass 20, count 0 2006.230.01:26:07.90#ibcon#wrote, iclass 20, count 0 2006.230.01:26:07.90#ibcon#about to read 3, iclass 20, count 0 2006.230.01:26:07.92#ibcon#read 3, iclass 20, count 0 2006.230.01:26:07.92#ibcon#about to read 4, iclass 20, count 0 2006.230.01:26:07.92#ibcon#read 4, iclass 20, count 0 2006.230.01:26:07.92#ibcon#about to read 5, iclass 20, count 0 2006.230.01:26:07.92#ibcon#read 5, iclass 20, count 0 2006.230.01:26:07.92#ibcon#about to read 6, iclass 20, count 0 2006.230.01:26:07.92#ibcon#read 6, iclass 20, count 0 2006.230.01:26:07.92#ibcon#end of sib2, iclass 20, count 0 2006.230.01:26:07.92#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:26:07.92#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:26:07.92#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:26:07.92#ibcon#*before write, iclass 20, count 0 2006.230.01:26:07.92#ibcon#enter sib2, iclass 20, count 0 2006.230.01:26:07.92#ibcon#flushed, iclass 20, count 0 2006.230.01:26:07.92#ibcon#about to write, iclass 20, count 0 2006.230.01:26:07.92#ibcon#wrote, iclass 20, count 0 2006.230.01:26:07.92#ibcon#about to read 3, iclass 20, count 0 2006.230.01:26:07.96#ibcon#read 3, iclass 20, count 0 2006.230.01:26:07.96#ibcon#about to read 4, iclass 20, count 0 2006.230.01:26:07.96#ibcon#read 4, iclass 20, count 0 2006.230.01:26:07.96#ibcon#about to read 5, iclass 20, count 0 2006.230.01:26:07.96#ibcon#read 5, iclass 20, count 0 2006.230.01:26:07.96#ibcon#about to read 6, iclass 20, count 0 2006.230.01:26:07.96#ibcon#read 6, iclass 20, count 0 2006.230.01:26:07.96#ibcon#end of sib2, iclass 20, count 0 2006.230.01:26:07.96#ibcon#*after write, iclass 20, count 0 2006.230.01:26:07.96#ibcon#*before return 0, iclass 20, count 0 2006.230.01:26:07.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:07.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:07.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:26:07.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:26:07.96$vck44/va=5,4 2006.230.01:26:07.96#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.01:26:07.96#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.01:26:07.96#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:07.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:08.02#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:08.02#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:08.02#ibcon#enter wrdev, iclass 22, count 2 2006.230.01:26:08.02#ibcon#first serial, iclass 22, count 2 2006.230.01:26:08.02#ibcon#enter sib2, iclass 22, count 2 2006.230.01:26:08.02#ibcon#flushed, iclass 22, count 2 2006.230.01:26:08.02#ibcon#about to write, iclass 22, count 2 2006.230.01:26:08.02#ibcon#wrote, iclass 22, count 2 2006.230.01:26:08.02#ibcon#about to read 3, iclass 22, count 2 2006.230.01:26:08.04#ibcon#read 3, iclass 22, count 2 2006.230.01:26:08.04#ibcon#about to read 4, iclass 22, count 2 2006.230.01:26:08.04#ibcon#read 4, iclass 22, count 2 2006.230.01:26:08.04#ibcon#about to read 5, iclass 22, count 2 2006.230.01:26:08.04#ibcon#read 5, iclass 22, count 2 2006.230.01:26:08.04#ibcon#about to read 6, iclass 22, count 2 2006.230.01:26:08.04#ibcon#read 6, iclass 22, count 2 2006.230.01:26:08.04#ibcon#end of sib2, iclass 22, count 2 2006.230.01:26:08.04#ibcon#*mode == 0, iclass 22, count 2 2006.230.01:26:08.04#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.01:26:08.04#ibcon#[25=AT05-04\r\n] 2006.230.01:26:08.04#ibcon#*before write, iclass 22, count 2 2006.230.01:26:08.04#ibcon#enter sib2, iclass 22, count 2 2006.230.01:26:08.04#ibcon#flushed, iclass 22, count 2 2006.230.01:26:08.04#ibcon#about to write, iclass 22, count 2 2006.230.01:26:08.04#ibcon#wrote, iclass 22, count 2 2006.230.01:26:08.04#ibcon#about to read 3, iclass 22, count 2 2006.230.01:26:08.07#ibcon#read 3, iclass 22, count 2 2006.230.01:26:08.07#ibcon#about to read 4, iclass 22, count 2 2006.230.01:26:08.07#ibcon#read 4, iclass 22, count 2 2006.230.01:26:08.07#ibcon#about to read 5, iclass 22, count 2 2006.230.01:26:08.07#ibcon#read 5, iclass 22, count 2 2006.230.01:26:08.07#ibcon#about to read 6, iclass 22, count 2 2006.230.01:26:08.07#ibcon#read 6, iclass 22, count 2 2006.230.01:26:08.07#ibcon#end of sib2, iclass 22, count 2 2006.230.01:26:08.07#ibcon#*after write, iclass 22, count 2 2006.230.01:26:08.07#ibcon#*before return 0, iclass 22, count 2 2006.230.01:26:08.07#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:08.07#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:08.07#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.01:26:08.07#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:08.07#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:08.19#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:08.19#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:08.19#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:26:08.19#ibcon#first serial, iclass 22, count 0 2006.230.01:26:08.19#ibcon#enter sib2, iclass 22, count 0 2006.230.01:26:08.19#ibcon#flushed, iclass 22, count 0 2006.230.01:26:08.19#ibcon#about to write, iclass 22, count 0 2006.230.01:26:08.19#ibcon#wrote, iclass 22, count 0 2006.230.01:26:08.19#ibcon#about to read 3, iclass 22, count 0 2006.230.01:26:08.21#ibcon#read 3, iclass 22, count 0 2006.230.01:26:08.21#ibcon#about to read 4, iclass 22, count 0 2006.230.01:26:08.21#ibcon#read 4, iclass 22, count 0 2006.230.01:26:08.21#ibcon#about to read 5, iclass 22, count 0 2006.230.01:26:08.21#ibcon#read 5, iclass 22, count 0 2006.230.01:26:08.21#ibcon#about to read 6, iclass 22, count 0 2006.230.01:26:08.21#ibcon#read 6, iclass 22, count 0 2006.230.01:26:08.21#ibcon#end of sib2, iclass 22, count 0 2006.230.01:26:08.21#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:26:08.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:26:08.21#ibcon#[25=USB\r\n] 2006.230.01:26:08.21#ibcon#*before write, iclass 22, count 0 2006.230.01:26:08.21#ibcon#enter sib2, iclass 22, count 0 2006.230.01:26:08.21#ibcon#flushed, iclass 22, count 0 2006.230.01:26:08.21#ibcon#about to write, iclass 22, count 0 2006.230.01:26:08.21#ibcon#wrote, iclass 22, count 0 2006.230.01:26:08.21#ibcon#about to read 3, iclass 22, count 0 2006.230.01:26:08.24#ibcon#read 3, iclass 22, count 0 2006.230.01:26:08.24#ibcon#about to read 4, iclass 22, count 0 2006.230.01:26:08.24#ibcon#read 4, iclass 22, count 0 2006.230.01:26:08.24#ibcon#about to read 5, iclass 22, count 0 2006.230.01:26:08.24#ibcon#read 5, iclass 22, count 0 2006.230.01:26:08.24#ibcon#about to read 6, iclass 22, count 0 2006.230.01:26:08.24#ibcon#read 6, iclass 22, count 0 2006.230.01:26:08.24#ibcon#end of sib2, iclass 22, count 0 2006.230.01:26:08.24#ibcon#*after write, iclass 22, count 0 2006.230.01:26:08.24#ibcon#*before return 0, iclass 22, count 0 2006.230.01:26:08.24#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:08.24#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:08.24#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:26:08.24#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:26:08.24$vck44/valo=6,814.99 2006.230.01:26:08.24#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.01:26:08.24#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.01:26:08.24#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:08.24#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:08.24#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:08.24#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:08.24#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:26:08.24#ibcon#first serial, iclass 24, count 0 2006.230.01:26:08.24#ibcon#enter sib2, iclass 24, count 0 2006.230.01:26:08.24#ibcon#flushed, iclass 24, count 0 2006.230.01:26:08.24#ibcon#about to write, iclass 24, count 0 2006.230.01:26:08.24#ibcon#wrote, iclass 24, count 0 2006.230.01:26:08.24#ibcon#about to read 3, iclass 24, count 0 2006.230.01:26:08.26#ibcon#read 3, iclass 24, count 0 2006.230.01:26:08.26#ibcon#about to read 4, iclass 24, count 0 2006.230.01:26:08.26#ibcon#read 4, iclass 24, count 0 2006.230.01:26:08.26#ibcon#about to read 5, iclass 24, count 0 2006.230.01:26:08.26#ibcon#read 5, iclass 24, count 0 2006.230.01:26:08.26#ibcon#about to read 6, iclass 24, count 0 2006.230.01:26:08.26#ibcon#read 6, iclass 24, count 0 2006.230.01:26:08.26#ibcon#end of sib2, iclass 24, count 0 2006.230.01:26:08.26#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:26:08.26#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:26:08.26#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:26:08.26#ibcon#*before write, iclass 24, count 0 2006.230.01:26:08.26#ibcon#enter sib2, iclass 24, count 0 2006.230.01:26:08.26#ibcon#flushed, iclass 24, count 0 2006.230.01:26:08.26#ibcon#about to write, iclass 24, count 0 2006.230.01:26:08.26#ibcon#wrote, iclass 24, count 0 2006.230.01:26:08.26#ibcon#about to read 3, iclass 24, count 0 2006.230.01:26:08.30#ibcon#read 3, iclass 24, count 0 2006.230.01:26:08.30#ibcon#about to read 4, iclass 24, count 0 2006.230.01:26:08.30#ibcon#read 4, iclass 24, count 0 2006.230.01:26:08.30#ibcon#about to read 5, iclass 24, count 0 2006.230.01:26:08.30#ibcon#read 5, iclass 24, count 0 2006.230.01:26:08.30#ibcon#about to read 6, iclass 24, count 0 2006.230.01:26:08.30#ibcon#read 6, iclass 24, count 0 2006.230.01:26:08.30#ibcon#end of sib2, iclass 24, count 0 2006.230.01:26:08.30#ibcon#*after write, iclass 24, count 0 2006.230.01:26:08.30#ibcon#*before return 0, iclass 24, count 0 2006.230.01:26:08.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:08.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:08.30#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:26:08.30#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:26:08.30$vck44/va=6,4 2006.230.01:26:08.30#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.01:26:08.30#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.01:26:08.30#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:08.30#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:08.36#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:08.36#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:08.36#ibcon#enter wrdev, iclass 26, count 2 2006.230.01:26:08.36#ibcon#first serial, iclass 26, count 2 2006.230.01:26:08.36#ibcon#enter sib2, iclass 26, count 2 2006.230.01:26:08.36#ibcon#flushed, iclass 26, count 2 2006.230.01:26:08.36#ibcon#about to write, iclass 26, count 2 2006.230.01:26:08.36#ibcon#wrote, iclass 26, count 2 2006.230.01:26:08.36#ibcon#about to read 3, iclass 26, count 2 2006.230.01:26:08.38#ibcon#read 3, iclass 26, count 2 2006.230.01:26:08.38#ibcon#about to read 4, iclass 26, count 2 2006.230.01:26:08.38#ibcon#read 4, iclass 26, count 2 2006.230.01:26:08.38#ibcon#about to read 5, iclass 26, count 2 2006.230.01:26:08.38#ibcon#read 5, iclass 26, count 2 2006.230.01:26:08.38#ibcon#about to read 6, iclass 26, count 2 2006.230.01:26:08.38#ibcon#read 6, iclass 26, count 2 2006.230.01:26:08.38#ibcon#end of sib2, iclass 26, count 2 2006.230.01:26:08.38#ibcon#*mode == 0, iclass 26, count 2 2006.230.01:26:08.38#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.01:26:08.38#ibcon#[25=AT06-04\r\n] 2006.230.01:26:08.38#ibcon#*before write, iclass 26, count 2 2006.230.01:26:08.38#ibcon#enter sib2, iclass 26, count 2 2006.230.01:26:08.38#ibcon#flushed, iclass 26, count 2 2006.230.01:26:08.38#ibcon#about to write, iclass 26, count 2 2006.230.01:26:08.38#ibcon#wrote, iclass 26, count 2 2006.230.01:26:08.38#ibcon#about to read 3, iclass 26, count 2 2006.230.01:26:08.41#ibcon#read 3, iclass 26, count 2 2006.230.01:26:08.41#ibcon#about to read 4, iclass 26, count 2 2006.230.01:26:08.41#ibcon#read 4, iclass 26, count 2 2006.230.01:26:08.41#ibcon#about to read 5, iclass 26, count 2 2006.230.01:26:08.41#ibcon#read 5, iclass 26, count 2 2006.230.01:26:08.41#ibcon#about to read 6, iclass 26, count 2 2006.230.01:26:08.41#ibcon#read 6, iclass 26, count 2 2006.230.01:26:08.41#ibcon#end of sib2, iclass 26, count 2 2006.230.01:26:08.41#ibcon#*after write, iclass 26, count 2 2006.230.01:26:08.41#ibcon#*before return 0, iclass 26, count 2 2006.230.01:26:08.41#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:08.41#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:08.41#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.01:26:08.41#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:08.41#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:08.53#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:08.53#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:08.53#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:26:08.53#ibcon#first serial, iclass 26, count 0 2006.230.01:26:08.53#ibcon#enter sib2, iclass 26, count 0 2006.230.01:26:08.53#ibcon#flushed, iclass 26, count 0 2006.230.01:26:08.53#ibcon#about to write, iclass 26, count 0 2006.230.01:26:08.53#ibcon#wrote, iclass 26, count 0 2006.230.01:26:08.53#ibcon#about to read 3, iclass 26, count 0 2006.230.01:26:08.55#ibcon#read 3, iclass 26, count 0 2006.230.01:26:08.55#ibcon#about to read 4, iclass 26, count 0 2006.230.01:26:08.55#ibcon#read 4, iclass 26, count 0 2006.230.01:26:08.55#ibcon#about to read 5, iclass 26, count 0 2006.230.01:26:08.55#ibcon#read 5, iclass 26, count 0 2006.230.01:26:08.55#ibcon#about to read 6, iclass 26, count 0 2006.230.01:26:08.55#ibcon#read 6, iclass 26, count 0 2006.230.01:26:08.55#ibcon#end of sib2, iclass 26, count 0 2006.230.01:26:08.55#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:26:08.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:26:08.55#ibcon#[25=USB\r\n] 2006.230.01:26:08.55#ibcon#*before write, iclass 26, count 0 2006.230.01:26:08.55#ibcon#enter sib2, iclass 26, count 0 2006.230.01:26:08.55#ibcon#flushed, iclass 26, count 0 2006.230.01:26:08.55#ibcon#about to write, iclass 26, count 0 2006.230.01:26:08.55#ibcon#wrote, iclass 26, count 0 2006.230.01:26:08.55#ibcon#about to read 3, iclass 26, count 0 2006.230.01:26:08.58#ibcon#read 3, iclass 26, count 0 2006.230.01:26:08.58#ibcon#about to read 4, iclass 26, count 0 2006.230.01:26:08.58#ibcon#read 4, iclass 26, count 0 2006.230.01:26:08.58#ibcon#about to read 5, iclass 26, count 0 2006.230.01:26:08.58#ibcon#read 5, iclass 26, count 0 2006.230.01:26:08.58#ibcon#about to read 6, iclass 26, count 0 2006.230.01:26:08.58#ibcon#read 6, iclass 26, count 0 2006.230.01:26:08.58#ibcon#end of sib2, iclass 26, count 0 2006.230.01:26:08.58#ibcon#*after write, iclass 26, count 0 2006.230.01:26:08.58#ibcon#*before return 0, iclass 26, count 0 2006.230.01:26:08.58#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:08.58#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:08.58#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:26:08.58#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:26:08.58$vck44/valo=7,864.99 2006.230.01:26:08.58#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.01:26:08.58#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.01:26:08.58#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:08.58#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:08.58#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:08.58#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:08.58#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:26:08.58#ibcon#first serial, iclass 28, count 0 2006.230.01:26:08.58#ibcon#enter sib2, iclass 28, count 0 2006.230.01:26:08.58#ibcon#flushed, iclass 28, count 0 2006.230.01:26:08.58#ibcon#about to write, iclass 28, count 0 2006.230.01:26:08.58#ibcon#wrote, iclass 28, count 0 2006.230.01:26:08.58#ibcon#about to read 3, iclass 28, count 0 2006.230.01:26:08.60#ibcon#read 3, iclass 28, count 0 2006.230.01:26:08.60#ibcon#about to read 4, iclass 28, count 0 2006.230.01:26:08.60#ibcon#read 4, iclass 28, count 0 2006.230.01:26:08.60#ibcon#about to read 5, iclass 28, count 0 2006.230.01:26:08.60#ibcon#read 5, iclass 28, count 0 2006.230.01:26:08.60#ibcon#about to read 6, iclass 28, count 0 2006.230.01:26:08.60#ibcon#read 6, iclass 28, count 0 2006.230.01:26:08.60#ibcon#end of sib2, iclass 28, count 0 2006.230.01:26:08.60#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:26:08.60#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:26:08.60#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:26:08.60#ibcon#*before write, iclass 28, count 0 2006.230.01:26:08.60#ibcon#enter sib2, iclass 28, count 0 2006.230.01:26:08.60#ibcon#flushed, iclass 28, count 0 2006.230.01:26:08.60#ibcon#about to write, iclass 28, count 0 2006.230.01:26:08.60#ibcon#wrote, iclass 28, count 0 2006.230.01:26:08.60#ibcon#about to read 3, iclass 28, count 0 2006.230.01:26:08.64#ibcon#read 3, iclass 28, count 0 2006.230.01:26:08.64#ibcon#about to read 4, iclass 28, count 0 2006.230.01:26:08.64#ibcon#read 4, iclass 28, count 0 2006.230.01:26:08.64#ibcon#about to read 5, iclass 28, count 0 2006.230.01:26:08.64#ibcon#read 5, iclass 28, count 0 2006.230.01:26:08.64#ibcon#about to read 6, iclass 28, count 0 2006.230.01:26:08.64#ibcon#read 6, iclass 28, count 0 2006.230.01:26:08.64#ibcon#end of sib2, iclass 28, count 0 2006.230.01:26:08.64#ibcon#*after write, iclass 28, count 0 2006.230.01:26:08.64#ibcon#*before return 0, iclass 28, count 0 2006.230.01:26:08.64#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:08.64#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:08.64#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:26:08.64#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:26:08.64$vck44/va=7,5 2006.230.01:26:08.64#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.01:26:08.64#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.01:26:08.64#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:08.64#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:08.70#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:08.70#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:08.70#ibcon#enter wrdev, iclass 30, count 2 2006.230.01:26:08.70#ibcon#first serial, iclass 30, count 2 2006.230.01:26:08.70#ibcon#enter sib2, iclass 30, count 2 2006.230.01:26:08.70#ibcon#flushed, iclass 30, count 2 2006.230.01:26:08.70#ibcon#about to write, iclass 30, count 2 2006.230.01:26:08.70#ibcon#wrote, iclass 30, count 2 2006.230.01:26:08.70#ibcon#about to read 3, iclass 30, count 2 2006.230.01:26:08.72#ibcon#read 3, iclass 30, count 2 2006.230.01:26:08.72#ibcon#about to read 4, iclass 30, count 2 2006.230.01:26:08.72#ibcon#read 4, iclass 30, count 2 2006.230.01:26:08.72#ibcon#about to read 5, iclass 30, count 2 2006.230.01:26:08.72#ibcon#read 5, iclass 30, count 2 2006.230.01:26:08.72#ibcon#about to read 6, iclass 30, count 2 2006.230.01:26:08.72#ibcon#read 6, iclass 30, count 2 2006.230.01:26:08.72#ibcon#end of sib2, iclass 30, count 2 2006.230.01:26:08.72#ibcon#*mode == 0, iclass 30, count 2 2006.230.01:26:08.72#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.01:26:08.72#ibcon#[25=AT07-05\r\n] 2006.230.01:26:08.72#ibcon#*before write, iclass 30, count 2 2006.230.01:26:08.72#ibcon#enter sib2, iclass 30, count 2 2006.230.01:26:08.72#ibcon#flushed, iclass 30, count 2 2006.230.01:26:08.72#ibcon#about to write, iclass 30, count 2 2006.230.01:26:08.72#ibcon#wrote, iclass 30, count 2 2006.230.01:26:08.72#ibcon#about to read 3, iclass 30, count 2 2006.230.01:26:08.76#ibcon#read 3, iclass 30, count 2 2006.230.01:26:08.76#ibcon#about to read 4, iclass 30, count 2 2006.230.01:26:08.76#ibcon#read 4, iclass 30, count 2 2006.230.01:26:08.76#ibcon#about to read 5, iclass 30, count 2 2006.230.01:26:08.76#ibcon#read 5, iclass 30, count 2 2006.230.01:26:08.76#ibcon#about to read 6, iclass 30, count 2 2006.230.01:26:08.76#ibcon#read 6, iclass 30, count 2 2006.230.01:26:08.76#ibcon#end of sib2, iclass 30, count 2 2006.230.01:26:08.76#ibcon#*after write, iclass 30, count 2 2006.230.01:26:08.76#ibcon#*before return 0, iclass 30, count 2 2006.230.01:26:08.76#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:08.76#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:08.76#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.01:26:08.76#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:08.76#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:08.87#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:08.87#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:08.87#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:26:08.87#ibcon#first serial, iclass 30, count 0 2006.230.01:26:08.87#ibcon#enter sib2, iclass 30, count 0 2006.230.01:26:08.87#ibcon#flushed, iclass 30, count 0 2006.230.01:26:08.87#ibcon#about to write, iclass 30, count 0 2006.230.01:26:08.87#ibcon#wrote, iclass 30, count 0 2006.230.01:26:08.87#ibcon#about to read 3, iclass 30, count 0 2006.230.01:26:08.89#ibcon#read 3, iclass 30, count 0 2006.230.01:26:08.89#ibcon#about to read 4, iclass 30, count 0 2006.230.01:26:08.89#ibcon#read 4, iclass 30, count 0 2006.230.01:26:08.89#ibcon#about to read 5, iclass 30, count 0 2006.230.01:26:08.89#ibcon#read 5, iclass 30, count 0 2006.230.01:26:08.89#ibcon#about to read 6, iclass 30, count 0 2006.230.01:26:08.89#ibcon#read 6, iclass 30, count 0 2006.230.01:26:08.89#ibcon#end of sib2, iclass 30, count 0 2006.230.01:26:08.89#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:26:08.89#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:26:08.89#ibcon#[25=USB\r\n] 2006.230.01:26:08.89#ibcon#*before write, iclass 30, count 0 2006.230.01:26:08.89#ibcon#enter sib2, iclass 30, count 0 2006.230.01:26:08.89#ibcon#flushed, iclass 30, count 0 2006.230.01:26:08.89#ibcon#about to write, iclass 30, count 0 2006.230.01:26:08.89#ibcon#wrote, iclass 30, count 0 2006.230.01:26:08.89#ibcon#about to read 3, iclass 30, count 0 2006.230.01:26:08.92#ibcon#read 3, iclass 30, count 0 2006.230.01:26:08.92#ibcon#about to read 4, iclass 30, count 0 2006.230.01:26:08.92#ibcon#read 4, iclass 30, count 0 2006.230.01:26:08.92#ibcon#about to read 5, iclass 30, count 0 2006.230.01:26:08.92#ibcon#read 5, iclass 30, count 0 2006.230.01:26:08.92#ibcon#about to read 6, iclass 30, count 0 2006.230.01:26:08.92#ibcon#read 6, iclass 30, count 0 2006.230.01:26:08.92#ibcon#end of sib2, iclass 30, count 0 2006.230.01:26:08.92#ibcon#*after write, iclass 30, count 0 2006.230.01:26:08.92#ibcon#*before return 0, iclass 30, count 0 2006.230.01:26:08.92#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:08.92#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:08.92#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:26:08.92#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:26:08.92$vck44/valo=8,884.99 2006.230.01:26:08.92#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.01:26:08.92#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.01:26:08.92#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:08.92#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:08.92#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:08.92#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:08.92#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:26:08.92#ibcon#first serial, iclass 32, count 0 2006.230.01:26:08.92#ibcon#enter sib2, iclass 32, count 0 2006.230.01:26:08.92#ibcon#flushed, iclass 32, count 0 2006.230.01:26:08.92#ibcon#about to write, iclass 32, count 0 2006.230.01:26:08.92#ibcon#wrote, iclass 32, count 0 2006.230.01:26:08.92#ibcon#about to read 3, iclass 32, count 0 2006.230.01:26:08.94#ibcon#read 3, iclass 32, count 0 2006.230.01:26:08.94#ibcon#about to read 4, iclass 32, count 0 2006.230.01:26:08.94#ibcon#read 4, iclass 32, count 0 2006.230.01:26:08.94#ibcon#about to read 5, iclass 32, count 0 2006.230.01:26:08.94#ibcon#read 5, iclass 32, count 0 2006.230.01:26:08.94#ibcon#about to read 6, iclass 32, count 0 2006.230.01:26:08.94#ibcon#read 6, iclass 32, count 0 2006.230.01:26:08.94#ibcon#end of sib2, iclass 32, count 0 2006.230.01:26:08.94#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:26:08.94#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:26:08.94#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:26:08.94#ibcon#*before write, iclass 32, count 0 2006.230.01:26:08.94#ibcon#enter sib2, iclass 32, count 0 2006.230.01:26:08.94#ibcon#flushed, iclass 32, count 0 2006.230.01:26:08.94#ibcon#about to write, iclass 32, count 0 2006.230.01:26:08.94#ibcon#wrote, iclass 32, count 0 2006.230.01:26:08.94#ibcon#about to read 3, iclass 32, count 0 2006.230.01:26:08.98#ibcon#read 3, iclass 32, count 0 2006.230.01:26:08.98#ibcon#about to read 4, iclass 32, count 0 2006.230.01:26:08.98#ibcon#read 4, iclass 32, count 0 2006.230.01:26:08.98#ibcon#about to read 5, iclass 32, count 0 2006.230.01:26:08.98#ibcon#read 5, iclass 32, count 0 2006.230.01:26:08.98#ibcon#about to read 6, iclass 32, count 0 2006.230.01:26:08.98#ibcon#read 6, iclass 32, count 0 2006.230.01:26:08.98#ibcon#end of sib2, iclass 32, count 0 2006.230.01:26:08.98#ibcon#*after write, iclass 32, count 0 2006.230.01:26:08.98#ibcon#*before return 0, iclass 32, count 0 2006.230.01:26:08.98#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:08.98#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:08.98#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:26:08.98#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:26:08.98$vck44/va=8,6 2006.230.01:26:08.98#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.01:26:08.98#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.01:26:08.98#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:08.98#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:26:09.04#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:26:09.04#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:26:09.04#ibcon#enter wrdev, iclass 34, count 2 2006.230.01:26:09.04#ibcon#first serial, iclass 34, count 2 2006.230.01:26:09.04#ibcon#enter sib2, iclass 34, count 2 2006.230.01:26:09.04#ibcon#flushed, iclass 34, count 2 2006.230.01:26:09.04#ibcon#about to write, iclass 34, count 2 2006.230.01:26:09.04#ibcon#wrote, iclass 34, count 2 2006.230.01:26:09.04#ibcon#about to read 3, iclass 34, count 2 2006.230.01:26:09.06#ibcon#read 3, iclass 34, count 2 2006.230.01:26:09.06#ibcon#about to read 4, iclass 34, count 2 2006.230.01:26:09.06#ibcon#read 4, iclass 34, count 2 2006.230.01:26:09.06#ibcon#about to read 5, iclass 34, count 2 2006.230.01:26:09.06#ibcon#read 5, iclass 34, count 2 2006.230.01:26:09.06#ibcon#about to read 6, iclass 34, count 2 2006.230.01:26:09.06#ibcon#read 6, iclass 34, count 2 2006.230.01:26:09.06#ibcon#end of sib2, iclass 34, count 2 2006.230.01:26:09.06#ibcon#*mode == 0, iclass 34, count 2 2006.230.01:26:09.06#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.01:26:09.06#ibcon#[25=AT08-06\r\n] 2006.230.01:26:09.06#ibcon#*before write, iclass 34, count 2 2006.230.01:26:09.06#ibcon#enter sib2, iclass 34, count 2 2006.230.01:26:09.06#ibcon#flushed, iclass 34, count 2 2006.230.01:26:09.06#ibcon#about to write, iclass 34, count 2 2006.230.01:26:09.06#ibcon#wrote, iclass 34, count 2 2006.230.01:26:09.06#ibcon#about to read 3, iclass 34, count 2 2006.230.01:26:09.09#ibcon#read 3, iclass 34, count 2 2006.230.01:26:09.09#ibcon#about to read 4, iclass 34, count 2 2006.230.01:26:09.09#ibcon#read 4, iclass 34, count 2 2006.230.01:26:09.09#ibcon#about to read 5, iclass 34, count 2 2006.230.01:26:09.09#ibcon#read 5, iclass 34, count 2 2006.230.01:26:09.09#ibcon#about to read 6, iclass 34, count 2 2006.230.01:26:09.09#ibcon#read 6, iclass 34, count 2 2006.230.01:26:09.09#ibcon#end of sib2, iclass 34, count 2 2006.230.01:26:09.09#ibcon#*after write, iclass 34, count 2 2006.230.01:26:09.09#ibcon#*before return 0, iclass 34, count 2 2006.230.01:26:09.09#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:26:09.09#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:26:09.09#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.01:26:09.09#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:09.09#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:26:09.21#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:26:09.21#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:26:09.21#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:26:09.21#ibcon#first serial, iclass 34, count 0 2006.230.01:26:09.21#ibcon#enter sib2, iclass 34, count 0 2006.230.01:26:09.21#ibcon#flushed, iclass 34, count 0 2006.230.01:26:09.21#ibcon#about to write, iclass 34, count 0 2006.230.01:26:09.21#ibcon#wrote, iclass 34, count 0 2006.230.01:26:09.21#ibcon#about to read 3, iclass 34, count 0 2006.230.01:26:09.23#ibcon#read 3, iclass 34, count 0 2006.230.01:26:09.23#ibcon#about to read 4, iclass 34, count 0 2006.230.01:26:09.23#ibcon#read 4, iclass 34, count 0 2006.230.01:26:09.23#ibcon#about to read 5, iclass 34, count 0 2006.230.01:26:09.23#ibcon#read 5, iclass 34, count 0 2006.230.01:26:09.23#ibcon#about to read 6, iclass 34, count 0 2006.230.01:26:09.23#ibcon#read 6, iclass 34, count 0 2006.230.01:26:09.23#ibcon#end of sib2, iclass 34, count 0 2006.230.01:26:09.23#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:26:09.23#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:26:09.23#ibcon#[25=USB\r\n] 2006.230.01:26:09.23#ibcon#*before write, iclass 34, count 0 2006.230.01:26:09.23#ibcon#enter sib2, iclass 34, count 0 2006.230.01:26:09.23#ibcon#flushed, iclass 34, count 0 2006.230.01:26:09.23#ibcon#about to write, iclass 34, count 0 2006.230.01:26:09.23#ibcon#wrote, iclass 34, count 0 2006.230.01:26:09.23#ibcon#about to read 3, iclass 34, count 0 2006.230.01:26:09.26#ibcon#read 3, iclass 34, count 0 2006.230.01:26:09.26#ibcon#about to read 4, iclass 34, count 0 2006.230.01:26:09.26#ibcon#read 4, iclass 34, count 0 2006.230.01:26:09.26#ibcon#about to read 5, iclass 34, count 0 2006.230.01:26:09.26#ibcon#read 5, iclass 34, count 0 2006.230.01:26:09.26#ibcon#about to read 6, iclass 34, count 0 2006.230.01:26:09.26#ibcon#read 6, iclass 34, count 0 2006.230.01:26:09.26#ibcon#end of sib2, iclass 34, count 0 2006.230.01:26:09.26#ibcon#*after write, iclass 34, count 0 2006.230.01:26:09.26#ibcon#*before return 0, iclass 34, count 0 2006.230.01:26:09.26#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:26:09.26#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:26:09.26#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:26:09.26#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:26:09.26$vck44/vblo=1,629.99 2006.230.01:26:09.26#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.01:26:09.26#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.01:26:09.26#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:09.26#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:26:09.26#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:26:09.26#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:26:09.26#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:26:09.26#ibcon#first serial, iclass 36, count 0 2006.230.01:26:09.26#ibcon#enter sib2, iclass 36, count 0 2006.230.01:26:09.26#ibcon#flushed, iclass 36, count 0 2006.230.01:26:09.26#ibcon#about to write, iclass 36, count 0 2006.230.01:26:09.26#ibcon#wrote, iclass 36, count 0 2006.230.01:26:09.26#ibcon#about to read 3, iclass 36, count 0 2006.230.01:26:09.28#ibcon#read 3, iclass 36, count 0 2006.230.01:26:09.28#ibcon#about to read 4, iclass 36, count 0 2006.230.01:26:09.28#ibcon#read 4, iclass 36, count 0 2006.230.01:26:09.28#ibcon#about to read 5, iclass 36, count 0 2006.230.01:26:09.28#ibcon#read 5, iclass 36, count 0 2006.230.01:26:09.28#ibcon#about to read 6, iclass 36, count 0 2006.230.01:26:09.28#ibcon#read 6, iclass 36, count 0 2006.230.01:26:09.28#ibcon#end of sib2, iclass 36, count 0 2006.230.01:26:09.28#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:26:09.28#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:26:09.28#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:26:09.28#ibcon#*before write, iclass 36, count 0 2006.230.01:26:09.28#ibcon#enter sib2, iclass 36, count 0 2006.230.01:26:09.28#ibcon#flushed, iclass 36, count 0 2006.230.01:26:09.28#ibcon#about to write, iclass 36, count 0 2006.230.01:26:09.28#ibcon#wrote, iclass 36, count 0 2006.230.01:26:09.28#ibcon#about to read 3, iclass 36, count 0 2006.230.01:26:09.32#ibcon#read 3, iclass 36, count 0 2006.230.01:26:09.32#ibcon#about to read 4, iclass 36, count 0 2006.230.01:26:09.32#ibcon#read 4, iclass 36, count 0 2006.230.01:26:09.32#ibcon#about to read 5, iclass 36, count 0 2006.230.01:26:09.32#ibcon#read 5, iclass 36, count 0 2006.230.01:26:09.32#ibcon#about to read 6, iclass 36, count 0 2006.230.01:26:09.32#ibcon#read 6, iclass 36, count 0 2006.230.01:26:09.32#ibcon#end of sib2, iclass 36, count 0 2006.230.01:26:09.32#ibcon#*after write, iclass 36, count 0 2006.230.01:26:09.32#ibcon#*before return 0, iclass 36, count 0 2006.230.01:26:09.32#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:26:09.32#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:26:09.32#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:26:09.32#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:26:09.32$vck44/vb=1,4 2006.230.01:26:09.32#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.01:26:09.32#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.01:26:09.32#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:09.32#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:26:09.32#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:26:09.32#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:26:09.32#ibcon#enter wrdev, iclass 38, count 2 2006.230.01:26:09.32#ibcon#first serial, iclass 38, count 2 2006.230.01:26:09.32#ibcon#enter sib2, iclass 38, count 2 2006.230.01:26:09.32#ibcon#flushed, iclass 38, count 2 2006.230.01:26:09.32#ibcon#about to write, iclass 38, count 2 2006.230.01:26:09.32#ibcon#wrote, iclass 38, count 2 2006.230.01:26:09.32#ibcon#about to read 3, iclass 38, count 2 2006.230.01:26:09.34#ibcon#read 3, iclass 38, count 2 2006.230.01:26:09.34#ibcon#about to read 4, iclass 38, count 2 2006.230.01:26:09.34#ibcon#read 4, iclass 38, count 2 2006.230.01:26:09.34#ibcon#about to read 5, iclass 38, count 2 2006.230.01:26:09.34#ibcon#read 5, iclass 38, count 2 2006.230.01:26:09.34#ibcon#about to read 6, iclass 38, count 2 2006.230.01:26:09.34#ibcon#read 6, iclass 38, count 2 2006.230.01:26:09.34#ibcon#end of sib2, iclass 38, count 2 2006.230.01:26:09.34#ibcon#*mode == 0, iclass 38, count 2 2006.230.01:26:09.34#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.01:26:09.34#ibcon#[27=AT01-04\r\n] 2006.230.01:26:09.34#ibcon#*before write, iclass 38, count 2 2006.230.01:26:09.34#ibcon#enter sib2, iclass 38, count 2 2006.230.01:26:09.34#ibcon#flushed, iclass 38, count 2 2006.230.01:26:09.34#ibcon#about to write, iclass 38, count 2 2006.230.01:26:09.34#ibcon#wrote, iclass 38, count 2 2006.230.01:26:09.34#ibcon#about to read 3, iclass 38, count 2 2006.230.01:26:09.37#ibcon#read 3, iclass 38, count 2 2006.230.01:26:09.37#ibcon#about to read 4, iclass 38, count 2 2006.230.01:26:09.37#ibcon#read 4, iclass 38, count 2 2006.230.01:26:09.37#ibcon#about to read 5, iclass 38, count 2 2006.230.01:26:09.37#ibcon#read 5, iclass 38, count 2 2006.230.01:26:09.37#ibcon#about to read 6, iclass 38, count 2 2006.230.01:26:09.37#ibcon#read 6, iclass 38, count 2 2006.230.01:26:09.37#ibcon#end of sib2, iclass 38, count 2 2006.230.01:26:09.37#ibcon#*after write, iclass 38, count 2 2006.230.01:26:09.37#ibcon#*before return 0, iclass 38, count 2 2006.230.01:26:09.37#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:26:09.37#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:26:09.37#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.01:26:09.37#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:09.37#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:26:09.49#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:26:09.49#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:26:09.49#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:26:09.49#ibcon#first serial, iclass 38, count 0 2006.230.01:26:09.49#ibcon#enter sib2, iclass 38, count 0 2006.230.01:26:09.49#ibcon#flushed, iclass 38, count 0 2006.230.01:26:09.49#ibcon#about to write, iclass 38, count 0 2006.230.01:26:09.49#ibcon#wrote, iclass 38, count 0 2006.230.01:26:09.49#ibcon#about to read 3, iclass 38, count 0 2006.230.01:26:09.51#ibcon#read 3, iclass 38, count 0 2006.230.01:26:09.51#ibcon#about to read 4, iclass 38, count 0 2006.230.01:26:09.51#ibcon#read 4, iclass 38, count 0 2006.230.01:26:09.51#ibcon#about to read 5, iclass 38, count 0 2006.230.01:26:09.51#ibcon#read 5, iclass 38, count 0 2006.230.01:26:09.51#ibcon#about to read 6, iclass 38, count 0 2006.230.01:26:09.51#ibcon#read 6, iclass 38, count 0 2006.230.01:26:09.51#ibcon#end of sib2, iclass 38, count 0 2006.230.01:26:09.51#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:26:09.51#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:26:09.51#ibcon#[27=USB\r\n] 2006.230.01:26:09.51#ibcon#*before write, iclass 38, count 0 2006.230.01:26:09.51#ibcon#enter sib2, iclass 38, count 0 2006.230.01:26:09.51#ibcon#flushed, iclass 38, count 0 2006.230.01:26:09.51#ibcon#about to write, iclass 38, count 0 2006.230.01:26:09.51#ibcon#wrote, iclass 38, count 0 2006.230.01:26:09.51#ibcon#about to read 3, iclass 38, count 0 2006.230.01:26:09.54#ibcon#read 3, iclass 38, count 0 2006.230.01:26:09.54#ibcon#about to read 4, iclass 38, count 0 2006.230.01:26:09.54#ibcon#read 4, iclass 38, count 0 2006.230.01:26:09.54#ibcon#about to read 5, iclass 38, count 0 2006.230.01:26:09.54#ibcon#read 5, iclass 38, count 0 2006.230.01:26:09.54#ibcon#about to read 6, iclass 38, count 0 2006.230.01:26:09.54#ibcon#read 6, iclass 38, count 0 2006.230.01:26:09.54#ibcon#end of sib2, iclass 38, count 0 2006.230.01:26:09.54#ibcon#*after write, iclass 38, count 0 2006.230.01:26:09.54#ibcon#*before return 0, iclass 38, count 0 2006.230.01:26:09.54#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:26:09.54#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:26:09.54#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:26:09.54#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:26:09.54$vck44/vblo=2,634.99 2006.230.01:26:09.54#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:26:09.54#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:26:09.54#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:09.54#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:09.54#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:09.54#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:09.54#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:26:09.54#ibcon#first serial, iclass 40, count 0 2006.230.01:26:09.54#ibcon#enter sib2, iclass 40, count 0 2006.230.01:26:09.54#ibcon#flushed, iclass 40, count 0 2006.230.01:26:09.54#ibcon#about to write, iclass 40, count 0 2006.230.01:26:09.54#ibcon#wrote, iclass 40, count 0 2006.230.01:26:09.54#ibcon#about to read 3, iclass 40, count 0 2006.230.01:26:09.56#ibcon#read 3, iclass 40, count 0 2006.230.01:26:09.56#ibcon#about to read 4, iclass 40, count 0 2006.230.01:26:09.56#ibcon#read 4, iclass 40, count 0 2006.230.01:26:09.56#ibcon#about to read 5, iclass 40, count 0 2006.230.01:26:09.56#ibcon#read 5, iclass 40, count 0 2006.230.01:26:09.56#ibcon#about to read 6, iclass 40, count 0 2006.230.01:26:09.56#ibcon#read 6, iclass 40, count 0 2006.230.01:26:09.56#ibcon#end of sib2, iclass 40, count 0 2006.230.01:26:09.56#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:26:09.56#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:26:09.56#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:26:09.56#ibcon#*before write, iclass 40, count 0 2006.230.01:26:09.56#ibcon#enter sib2, iclass 40, count 0 2006.230.01:26:09.56#ibcon#flushed, iclass 40, count 0 2006.230.01:26:09.56#ibcon#about to write, iclass 40, count 0 2006.230.01:26:09.56#ibcon#wrote, iclass 40, count 0 2006.230.01:26:09.56#ibcon#about to read 3, iclass 40, count 0 2006.230.01:26:09.60#ibcon#read 3, iclass 40, count 0 2006.230.01:26:09.60#ibcon#about to read 4, iclass 40, count 0 2006.230.01:26:09.60#ibcon#read 4, iclass 40, count 0 2006.230.01:26:09.60#ibcon#about to read 5, iclass 40, count 0 2006.230.01:26:09.60#ibcon#read 5, iclass 40, count 0 2006.230.01:26:09.60#ibcon#about to read 6, iclass 40, count 0 2006.230.01:26:09.60#ibcon#read 6, iclass 40, count 0 2006.230.01:26:09.60#ibcon#end of sib2, iclass 40, count 0 2006.230.01:26:09.60#ibcon#*after write, iclass 40, count 0 2006.230.01:26:09.60#ibcon#*before return 0, iclass 40, count 0 2006.230.01:26:09.60#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:09.60#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:26:09.60#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:26:09.60#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:26:09.60$vck44/vb=2,4 2006.230.01:26:09.60#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.01:26:09.60#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.01:26:09.60#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:09.60#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:09.66#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:09.66#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:09.66#ibcon#enter wrdev, iclass 4, count 2 2006.230.01:26:09.66#ibcon#first serial, iclass 4, count 2 2006.230.01:26:09.66#ibcon#enter sib2, iclass 4, count 2 2006.230.01:26:09.66#ibcon#flushed, iclass 4, count 2 2006.230.01:26:09.66#ibcon#about to write, iclass 4, count 2 2006.230.01:26:09.66#ibcon#wrote, iclass 4, count 2 2006.230.01:26:09.66#ibcon#about to read 3, iclass 4, count 2 2006.230.01:26:09.68#ibcon#read 3, iclass 4, count 2 2006.230.01:26:09.68#ibcon#about to read 4, iclass 4, count 2 2006.230.01:26:09.68#ibcon#read 4, iclass 4, count 2 2006.230.01:26:09.68#ibcon#about to read 5, iclass 4, count 2 2006.230.01:26:09.68#ibcon#read 5, iclass 4, count 2 2006.230.01:26:09.68#ibcon#about to read 6, iclass 4, count 2 2006.230.01:26:09.68#ibcon#read 6, iclass 4, count 2 2006.230.01:26:09.68#ibcon#end of sib2, iclass 4, count 2 2006.230.01:26:09.68#ibcon#*mode == 0, iclass 4, count 2 2006.230.01:26:09.68#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.01:26:09.68#ibcon#[27=AT02-04\r\n] 2006.230.01:26:09.68#ibcon#*before write, iclass 4, count 2 2006.230.01:26:09.68#ibcon#enter sib2, iclass 4, count 2 2006.230.01:26:09.68#ibcon#flushed, iclass 4, count 2 2006.230.01:26:09.68#ibcon#about to write, iclass 4, count 2 2006.230.01:26:09.68#ibcon#wrote, iclass 4, count 2 2006.230.01:26:09.68#ibcon#about to read 3, iclass 4, count 2 2006.230.01:26:09.71#ibcon#read 3, iclass 4, count 2 2006.230.01:26:09.71#ibcon#about to read 4, iclass 4, count 2 2006.230.01:26:09.71#ibcon#read 4, iclass 4, count 2 2006.230.01:26:09.71#ibcon#about to read 5, iclass 4, count 2 2006.230.01:26:09.71#ibcon#read 5, iclass 4, count 2 2006.230.01:26:09.71#ibcon#about to read 6, iclass 4, count 2 2006.230.01:26:09.71#ibcon#read 6, iclass 4, count 2 2006.230.01:26:09.71#ibcon#end of sib2, iclass 4, count 2 2006.230.01:26:09.71#ibcon#*after write, iclass 4, count 2 2006.230.01:26:09.71#ibcon#*before return 0, iclass 4, count 2 2006.230.01:26:09.71#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:09.71#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:26:09.71#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.01:26:09.71#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:09.71#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:09.83#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:09.83#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:09.83#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:26:09.83#ibcon#first serial, iclass 4, count 0 2006.230.01:26:09.83#ibcon#enter sib2, iclass 4, count 0 2006.230.01:26:09.83#ibcon#flushed, iclass 4, count 0 2006.230.01:26:09.83#ibcon#about to write, iclass 4, count 0 2006.230.01:26:09.83#ibcon#wrote, iclass 4, count 0 2006.230.01:26:09.83#ibcon#about to read 3, iclass 4, count 0 2006.230.01:26:09.85#ibcon#read 3, iclass 4, count 0 2006.230.01:26:09.85#ibcon#about to read 4, iclass 4, count 0 2006.230.01:26:09.85#ibcon#read 4, iclass 4, count 0 2006.230.01:26:09.85#ibcon#about to read 5, iclass 4, count 0 2006.230.01:26:09.85#ibcon#read 5, iclass 4, count 0 2006.230.01:26:09.85#ibcon#about to read 6, iclass 4, count 0 2006.230.01:26:09.85#ibcon#read 6, iclass 4, count 0 2006.230.01:26:09.85#ibcon#end of sib2, iclass 4, count 0 2006.230.01:26:09.85#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:26:09.85#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:26:09.85#ibcon#[27=USB\r\n] 2006.230.01:26:09.85#ibcon#*before write, iclass 4, count 0 2006.230.01:26:09.85#ibcon#enter sib2, iclass 4, count 0 2006.230.01:26:09.85#ibcon#flushed, iclass 4, count 0 2006.230.01:26:09.85#ibcon#about to write, iclass 4, count 0 2006.230.01:26:09.85#ibcon#wrote, iclass 4, count 0 2006.230.01:26:09.85#ibcon#about to read 3, iclass 4, count 0 2006.230.01:26:09.88#ibcon#read 3, iclass 4, count 0 2006.230.01:26:09.88#ibcon#about to read 4, iclass 4, count 0 2006.230.01:26:09.88#ibcon#read 4, iclass 4, count 0 2006.230.01:26:09.88#ibcon#about to read 5, iclass 4, count 0 2006.230.01:26:09.88#ibcon#read 5, iclass 4, count 0 2006.230.01:26:09.88#ibcon#about to read 6, iclass 4, count 0 2006.230.01:26:09.88#ibcon#read 6, iclass 4, count 0 2006.230.01:26:09.88#ibcon#end of sib2, iclass 4, count 0 2006.230.01:26:09.88#ibcon#*after write, iclass 4, count 0 2006.230.01:26:09.88#ibcon#*before return 0, iclass 4, count 0 2006.230.01:26:09.88#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:09.88#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:26:09.88#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:26:09.88#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:26:09.88$vck44/vblo=3,649.99 2006.230.01:26:09.88#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:26:09.88#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:26:09.88#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:09.88#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:09.88#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:09.88#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:09.88#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:26:09.88#ibcon#first serial, iclass 6, count 0 2006.230.01:26:09.88#ibcon#enter sib2, iclass 6, count 0 2006.230.01:26:09.88#ibcon#flushed, iclass 6, count 0 2006.230.01:26:09.88#ibcon#about to write, iclass 6, count 0 2006.230.01:26:09.88#ibcon#wrote, iclass 6, count 0 2006.230.01:26:09.88#ibcon#about to read 3, iclass 6, count 0 2006.230.01:26:09.90#ibcon#read 3, iclass 6, count 0 2006.230.01:26:09.90#ibcon#about to read 4, iclass 6, count 0 2006.230.01:26:09.90#ibcon#read 4, iclass 6, count 0 2006.230.01:26:09.90#ibcon#about to read 5, iclass 6, count 0 2006.230.01:26:09.90#ibcon#read 5, iclass 6, count 0 2006.230.01:26:09.90#ibcon#about to read 6, iclass 6, count 0 2006.230.01:26:09.90#ibcon#read 6, iclass 6, count 0 2006.230.01:26:09.90#ibcon#end of sib2, iclass 6, count 0 2006.230.01:26:09.90#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:26:09.90#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:26:09.90#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:26:09.90#ibcon#*before write, iclass 6, count 0 2006.230.01:26:09.90#ibcon#enter sib2, iclass 6, count 0 2006.230.01:26:09.90#ibcon#flushed, iclass 6, count 0 2006.230.01:26:09.90#ibcon#about to write, iclass 6, count 0 2006.230.01:26:09.90#ibcon#wrote, iclass 6, count 0 2006.230.01:26:09.90#ibcon#about to read 3, iclass 6, count 0 2006.230.01:26:09.94#ibcon#read 3, iclass 6, count 0 2006.230.01:26:09.94#ibcon#about to read 4, iclass 6, count 0 2006.230.01:26:09.94#ibcon#read 4, iclass 6, count 0 2006.230.01:26:09.94#ibcon#about to read 5, iclass 6, count 0 2006.230.01:26:09.94#ibcon#read 5, iclass 6, count 0 2006.230.01:26:09.94#ibcon#about to read 6, iclass 6, count 0 2006.230.01:26:09.94#ibcon#read 6, iclass 6, count 0 2006.230.01:26:09.94#ibcon#end of sib2, iclass 6, count 0 2006.230.01:26:09.94#ibcon#*after write, iclass 6, count 0 2006.230.01:26:09.94#ibcon#*before return 0, iclass 6, count 0 2006.230.01:26:09.94#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:09.94#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:26:09.94#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:26:09.94#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:26:09.94$vck44/vb=3,4 2006.230.01:26:09.94#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.01:26:09.94#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.01:26:09.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:09.94#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:10.00#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:10.00#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:10.00#ibcon#enter wrdev, iclass 10, count 2 2006.230.01:26:10.00#ibcon#first serial, iclass 10, count 2 2006.230.01:26:10.00#ibcon#enter sib2, iclass 10, count 2 2006.230.01:26:10.00#ibcon#flushed, iclass 10, count 2 2006.230.01:26:10.00#ibcon#about to write, iclass 10, count 2 2006.230.01:26:10.00#ibcon#wrote, iclass 10, count 2 2006.230.01:26:10.00#ibcon#about to read 3, iclass 10, count 2 2006.230.01:26:10.02#ibcon#read 3, iclass 10, count 2 2006.230.01:26:10.02#ibcon#about to read 4, iclass 10, count 2 2006.230.01:26:10.02#ibcon#read 4, iclass 10, count 2 2006.230.01:26:10.02#ibcon#about to read 5, iclass 10, count 2 2006.230.01:26:10.02#ibcon#read 5, iclass 10, count 2 2006.230.01:26:10.02#ibcon#about to read 6, iclass 10, count 2 2006.230.01:26:10.02#ibcon#read 6, iclass 10, count 2 2006.230.01:26:10.02#ibcon#end of sib2, iclass 10, count 2 2006.230.01:26:10.02#ibcon#*mode == 0, iclass 10, count 2 2006.230.01:26:10.02#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.01:26:10.02#ibcon#[27=AT03-04\r\n] 2006.230.01:26:10.02#ibcon#*before write, iclass 10, count 2 2006.230.01:26:10.02#ibcon#enter sib2, iclass 10, count 2 2006.230.01:26:10.02#ibcon#flushed, iclass 10, count 2 2006.230.01:26:10.02#ibcon#about to write, iclass 10, count 2 2006.230.01:26:10.02#ibcon#wrote, iclass 10, count 2 2006.230.01:26:10.02#ibcon#about to read 3, iclass 10, count 2 2006.230.01:26:10.05#ibcon#read 3, iclass 10, count 2 2006.230.01:26:10.05#ibcon#about to read 4, iclass 10, count 2 2006.230.01:26:10.05#ibcon#read 4, iclass 10, count 2 2006.230.01:26:10.05#ibcon#about to read 5, iclass 10, count 2 2006.230.01:26:10.05#ibcon#read 5, iclass 10, count 2 2006.230.01:26:10.05#ibcon#about to read 6, iclass 10, count 2 2006.230.01:26:10.05#ibcon#read 6, iclass 10, count 2 2006.230.01:26:10.05#ibcon#end of sib2, iclass 10, count 2 2006.230.01:26:10.05#ibcon#*after write, iclass 10, count 2 2006.230.01:26:10.05#ibcon#*before return 0, iclass 10, count 2 2006.230.01:26:10.05#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:10.05#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:26:10.05#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.01:26:10.05#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:10.05#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:10.17#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:10.17#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:10.17#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:26:10.17#ibcon#first serial, iclass 10, count 0 2006.230.01:26:10.17#ibcon#enter sib2, iclass 10, count 0 2006.230.01:26:10.17#ibcon#flushed, iclass 10, count 0 2006.230.01:26:10.17#ibcon#about to write, iclass 10, count 0 2006.230.01:26:10.17#ibcon#wrote, iclass 10, count 0 2006.230.01:26:10.17#ibcon#about to read 3, iclass 10, count 0 2006.230.01:26:10.19#ibcon#read 3, iclass 10, count 0 2006.230.01:26:10.19#ibcon#about to read 4, iclass 10, count 0 2006.230.01:26:10.19#ibcon#read 4, iclass 10, count 0 2006.230.01:26:10.19#ibcon#about to read 5, iclass 10, count 0 2006.230.01:26:10.19#ibcon#read 5, iclass 10, count 0 2006.230.01:26:10.19#ibcon#about to read 6, iclass 10, count 0 2006.230.01:26:10.19#ibcon#read 6, iclass 10, count 0 2006.230.01:26:10.19#ibcon#end of sib2, iclass 10, count 0 2006.230.01:26:10.19#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:26:10.19#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:26:10.19#ibcon#[27=USB\r\n] 2006.230.01:26:10.19#ibcon#*before write, iclass 10, count 0 2006.230.01:26:10.19#ibcon#enter sib2, iclass 10, count 0 2006.230.01:26:10.19#ibcon#flushed, iclass 10, count 0 2006.230.01:26:10.19#ibcon#about to write, iclass 10, count 0 2006.230.01:26:10.19#ibcon#wrote, iclass 10, count 0 2006.230.01:26:10.19#ibcon#about to read 3, iclass 10, count 0 2006.230.01:26:10.22#ibcon#read 3, iclass 10, count 0 2006.230.01:26:10.22#ibcon#about to read 4, iclass 10, count 0 2006.230.01:26:10.22#ibcon#read 4, iclass 10, count 0 2006.230.01:26:10.22#ibcon#about to read 5, iclass 10, count 0 2006.230.01:26:10.22#ibcon#read 5, iclass 10, count 0 2006.230.01:26:10.22#ibcon#about to read 6, iclass 10, count 0 2006.230.01:26:10.22#ibcon#read 6, iclass 10, count 0 2006.230.01:26:10.22#ibcon#end of sib2, iclass 10, count 0 2006.230.01:26:10.22#ibcon#*after write, iclass 10, count 0 2006.230.01:26:10.22#ibcon#*before return 0, iclass 10, count 0 2006.230.01:26:10.22#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:10.22#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:26:10.22#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:26:10.22#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:26:10.22$vck44/vblo=4,679.99 2006.230.01:26:10.22#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.01:26:10.22#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.01:26:10.22#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:10.22#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:10.22#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:10.22#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:10.22#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:26:10.22#ibcon#first serial, iclass 12, count 0 2006.230.01:26:10.22#ibcon#enter sib2, iclass 12, count 0 2006.230.01:26:10.22#ibcon#flushed, iclass 12, count 0 2006.230.01:26:10.22#ibcon#about to write, iclass 12, count 0 2006.230.01:26:10.22#ibcon#wrote, iclass 12, count 0 2006.230.01:26:10.22#ibcon#about to read 3, iclass 12, count 0 2006.230.01:26:10.24#ibcon#read 3, iclass 12, count 0 2006.230.01:26:10.24#ibcon#about to read 4, iclass 12, count 0 2006.230.01:26:10.24#ibcon#read 4, iclass 12, count 0 2006.230.01:26:10.24#ibcon#about to read 5, iclass 12, count 0 2006.230.01:26:10.24#ibcon#read 5, iclass 12, count 0 2006.230.01:26:10.24#ibcon#about to read 6, iclass 12, count 0 2006.230.01:26:10.24#ibcon#read 6, iclass 12, count 0 2006.230.01:26:10.24#ibcon#end of sib2, iclass 12, count 0 2006.230.01:26:10.24#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:26:10.24#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:26:10.24#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:26:10.24#ibcon#*before write, iclass 12, count 0 2006.230.01:26:10.24#ibcon#enter sib2, iclass 12, count 0 2006.230.01:26:10.24#ibcon#flushed, iclass 12, count 0 2006.230.01:26:10.24#ibcon#about to write, iclass 12, count 0 2006.230.01:26:10.24#ibcon#wrote, iclass 12, count 0 2006.230.01:26:10.24#ibcon#about to read 3, iclass 12, count 0 2006.230.01:26:10.28#ibcon#read 3, iclass 12, count 0 2006.230.01:26:10.28#ibcon#about to read 4, iclass 12, count 0 2006.230.01:26:10.28#ibcon#read 4, iclass 12, count 0 2006.230.01:26:10.28#ibcon#about to read 5, iclass 12, count 0 2006.230.01:26:10.28#ibcon#read 5, iclass 12, count 0 2006.230.01:26:10.28#ibcon#about to read 6, iclass 12, count 0 2006.230.01:26:10.28#ibcon#read 6, iclass 12, count 0 2006.230.01:26:10.28#ibcon#end of sib2, iclass 12, count 0 2006.230.01:26:10.28#ibcon#*after write, iclass 12, count 0 2006.230.01:26:10.28#ibcon#*before return 0, iclass 12, count 0 2006.230.01:26:10.28#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:10.28#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:26:10.28#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:26:10.28#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:26:10.28$vck44/vb=4,4 2006.230.01:26:10.28#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.01:26:10.28#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.01:26:10.28#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:10.28#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:10.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:10.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:10.34#ibcon#enter wrdev, iclass 14, count 2 2006.230.01:26:10.34#ibcon#first serial, iclass 14, count 2 2006.230.01:26:10.34#ibcon#enter sib2, iclass 14, count 2 2006.230.01:26:10.34#ibcon#flushed, iclass 14, count 2 2006.230.01:26:10.34#ibcon#about to write, iclass 14, count 2 2006.230.01:26:10.34#ibcon#wrote, iclass 14, count 2 2006.230.01:26:10.34#ibcon#about to read 3, iclass 14, count 2 2006.230.01:26:10.36#ibcon#read 3, iclass 14, count 2 2006.230.01:26:10.36#ibcon#about to read 4, iclass 14, count 2 2006.230.01:26:10.36#ibcon#read 4, iclass 14, count 2 2006.230.01:26:10.36#ibcon#about to read 5, iclass 14, count 2 2006.230.01:26:10.36#ibcon#read 5, iclass 14, count 2 2006.230.01:26:10.36#ibcon#about to read 6, iclass 14, count 2 2006.230.01:26:10.36#ibcon#read 6, iclass 14, count 2 2006.230.01:26:10.36#ibcon#end of sib2, iclass 14, count 2 2006.230.01:26:10.36#ibcon#*mode == 0, iclass 14, count 2 2006.230.01:26:10.36#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.01:26:10.36#ibcon#[27=AT04-04\r\n] 2006.230.01:26:10.36#ibcon#*before write, iclass 14, count 2 2006.230.01:26:10.36#ibcon#enter sib2, iclass 14, count 2 2006.230.01:26:10.36#ibcon#flushed, iclass 14, count 2 2006.230.01:26:10.36#ibcon#about to write, iclass 14, count 2 2006.230.01:26:10.36#ibcon#wrote, iclass 14, count 2 2006.230.01:26:10.36#ibcon#about to read 3, iclass 14, count 2 2006.230.01:26:10.39#ibcon#read 3, iclass 14, count 2 2006.230.01:26:10.39#ibcon#about to read 4, iclass 14, count 2 2006.230.01:26:10.39#ibcon#read 4, iclass 14, count 2 2006.230.01:26:10.39#ibcon#about to read 5, iclass 14, count 2 2006.230.01:26:10.39#ibcon#read 5, iclass 14, count 2 2006.230.01:26:10.39#ibcon#about to read 6, iclass 14, count 2 2006.230.01:26:10.39#ibcon#read 6, iclass 14, count 2 2006.230.01:26:10.39#ibcon#end of sib2, iclass 14, count 2 2006.230.01:26:10.39#ibcon#*after write, iclass 14, count 2 2006.230.01:26:10.39#ibcon#*before return 0, iclass 14, count 2 2006.230.01:26:10.39#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:10.39#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:26:10.39#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.01:26:10.39#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:10.39#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:10.51#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:10.51#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:10.51#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:26:10.51#ibcon#first serial, iclass 14, count 0 2006.230.01:26:10.51#ibcon#enter sib2, iclass 14, count 0 2006.230.01:26:10.51#ibcon#flushed, iclass 14, count 0 2006.230.01:26:10.51#ibcon#about to write, iclass 14, count 0 2006.230.01:26:10.51#ibcon#wrote, iclass 14, count 0 2006.230.01:26:10.51#ibcon#about to read 3, iclass 14, count 0 2006.230.01:26:10.53#ibcon#read 3, iclass 14, count 0 2006.230.01:26:10.53#ibcon#about to read 4, iclass 14, count 0 2006.230.01:26:10.53#ibcon#read 4, iclass 14, count 0 2006.230.01:26:10.53#ibcon#about to read 5, iclass 14, count 0 2006.230.01:26:10.53#ibcon#read 5, iclass 14, count 0 2006.230.01:26:10.53#ibcon#about to read 6, iclass 14, count 0 2006.230.01:26:10.53#ibcon#read 6, iclass 14, count 0 2006.230.01:26:10.53#ibcon#end of sib2, iclass 14, count 0 2006.230.01:26:10.53#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:26:10.53#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:26:10.53#ibcon#[27=USB\r\n] 2006.230.01:26:10.53#ibcon#*before write, iclass 14, count 0 2006.230.01:26:10.53#ibcon#enter sib2, iclass 14, count 0 2006.230.01:26:10.53#ibcon#flushed, iclass 14, count 0 2006.230.01:26:10.53#ibcon#about to write, iclass 14, count 0 2006.230.01:26:10.53#ibcon#wrote, iclass 14, count 0 2006.230.01:26:10.53#ibcon#about to read 3, iclass 14, count 0 2006.230.01:26:10.56#ibcon#read 3, iclass 14, count 0 2006.230.01:26:10.56#ibcon#about to read 4, iclass 14, count 0 2006.230.01:26:10.56#ibcon#read 4, iclass 14, count 0 2006.230.01:26:10.56#ibcon#about to read 5, iclass 14, count 0 2006.230.01:26:10.56#ibcon#read 5, iclass 14, count 0 2006.230.01:26:10.56#ibcon#about to read 6, iclass 14, count 0 2006.230.01:26:10.56#ibcon#read 6, iclass 14, count 0 2006.230.01:26:10.56#ibcon#end of sib2, iclass 14, count 0 2006.230.01:26:10.56#ibcon#*after write, iclass 14, count 0 2006.230.01:26:10.56#ibcon#*before return 0, iclass 14, count 0 2006.230.01:26:10.56#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:10.56#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:26:10.56#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:26:10.56#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:26:10.56$vck44/vblo=5,709.99 2006.230.01:26:10.56#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:26:10.56#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:26:10.56#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:10.56#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:10.56#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:10.56#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:10.56#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:26:10.56#ibcon#first serial, iclass 16, count 0 2006.230.01:26:10.56#ibcon#enter sib2, iclass 16, count 0 2006.230.01:26:10.56#ibcon#flushed, iclass 16, count 0 2006.230.01:26:10.56#ibcon#about to write, iclass 16, count 0 2006.230.01:26:10.56#ibcon#wrote, iclass 16, count 0 2006.230.01:26:10.56#ibcon#about to read 3, iclass 16, count 0 2006.230.01:26:10.58#ibcon#read 3, iclass 16, count 0 2006.230.01:26:10.58#ibcon#about to read 4, iclass 16, count 0 2006.230.01:26:10.58#ibcon#read 4, iclass 16, count 0 2006.230.01:26:10.58#ibcon#about to read 5, iclass 16, count 0 2006.230.01:26:10.58#ibcon#read 5, iclass 16, count 0 2006.230.01:26:10.58#ibcon#about to read 6, iclass 16, count 0 2006.230.01:26:10.58#ibcon#read 6, iclass 16, count 0 2006.230.01:26:10.58#ibcon#end of sib2, iclass 16, count 0 2006.230.01:26:10.58#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:26:10.58#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:26:10.58#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:26:10.58#ibcon#*before write, iclass 16, count 0 2006.230.01:26:10.58#ibcon#enter sib2, iclass 16, count 0 2006.230.01:26:10.58#ibcon#flushed, iclass 16, count 0 2006.230.01:26:10.58#ibcon#about to write, iclass 16, count 0 2006.230.01:26:10.58#ibcon#wrote, iclass 16, count 0 2006.230.01:26:10.58#ibcon#about to read 3, iclass 16, count 0 2006.230.01:26:10.62#ibcon#read 3, iclass 16, count 0 2006.230.01:26:10.62#ibcon#about to read 4, iclass 16, count 0 2006.230.01:26:10.62#ibcon#read 4, iclass 16, count 0 2006.230.01:26:10.62#ibcon#about to read 5, iclass 16, count 0 2006.230.01:26:10.62#ibcon#read 5, iclass 16, count 0 2006.230.01:26:10.62#ibcon#about to read 6, iclass 16, count 0 2006.230.01:26:10.62#ibcon#read 6, iclass 16, count 0 2006.230.01:26:10.62#ibcon#end of sib2, iclass 16, count 0 2006.230.01:26:10.62#ibcon#*after write, iclass 16, count 0 2006.230.01:26:10.62#ibcon#*before return 0, iclass 16, count 0 2006.230.01:26:10.62#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:10.62#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:26:10.62#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:26:10.62#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:26:10.62$vck44/vb=5,4 2006.230.01:26:10.62#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.230.01:26:10.62#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.230.01:26:10.62#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:10.62#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:10.68#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:10.68#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:10.68#ibcon#enter wrdev, iclass 18, count 2 2006.230.01:26:10.68#ibcon#first serial, iclass 18, count 2 2006.230.01:26:10.68#ibcon#enter sib2, iclass 18, count 2 2006.230.01:26:10.68#ibcon#flushed, iclass 18, count 2 2006.230.01:26:10.68#ibcon#about to write, iclass 18, count 2 2006.230.01:26:10.68#ibcon#wrote, iclass 18, count 2 2006.230.01:26:10.68#ibcon#about to read 3, iclass 18, count 2 2006.230.01:26:10.70#ibcon#read 3, iclass 18, count 2 2006.230.01:26:10.70#ibcon#about to read 4, iclass 18, count 2 2006.230.01:26:10.70#ibcon#read 4, iclass 18, count 2 2006.230.01:26:10.70#ibcon#about to read 5, iclass 18, count 2 2006.230.01:26:10.70#ibcon#read 5, iclass 18, count 2 2006.230.01:26:10.70#ibcon#about to read 6, iclass 18, count 2 2006.230.01:26:10.70#ibcon#read 6, iclass 18, count 2 2006.230.01:26:10.70#ibcon#end of sib2, iclass 18, count 2 2006.230.01:26:10.70#ibcon#*mode == 0, iclass 18, count 2 2006.230.01:26:10.70#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.230.01:26:10.70#ibcon#[27=AT05-04\r\n] 2006.230.01:26:10.70#ibcon#*before write, iclass 18, count 2 2006.230.01:26:10.70#ibcon#enter sib2, iclass 18, count 2 2006.230.01:26:10.70#ibcon#flushed, iclass 18, count 2 2006.230.01:26:10.70#ibcon#about to write, iclass 18, count 2 2006.230.01:26:10.70#ibcon#wrote, iclass 18, count 2 2006.230.01:26:10.70#ibcon#about to read 3, iclass 18, count 2 2006.230.01:26:10.73#ibcon#read 3, iclass 18, count 2 2006.230.01:26:10.73#ibcon#about to read 4, iclass 18, count 2 2006.230.01:26:10.73#ibcon#read 4, iclass 18, count 2 2006.230.01:26:10.73#ibcon#about to read 5, iclass 18, count 2 2006.230.01:26:10.73#ibcon#read 5, iclass 18, count 2 2006.230.01:26:10.73#ibcon#about to read 6, iclass 18, count 2 2006.230.01:26:10.73#ibcon#read 6, iclass 18, count 2 2006.230.01:26:10.73#ibcon#end of sib2, iclass 18, count 2 2006.230.01:26:10.73#ibcon#*after write, iclass 18, count 2 2006.230.01:26:10.73#ibcon#*before return 0, iclass 18, count 2 2006.230.01:26:10.73#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:10.73#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:26:10.73#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.230.01:26:10.73#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:10.73#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:10.85#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:10.85#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:10.85#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:26:10.85#ibcon#first serial, iclass 18, count 0 2006.230.01:26:10.85#ibcon#enter sib2, iclass 18, count 0 2006.230.01:26:10.85#ibcon#flushed, iclass 18, count 0 2006.230.01:26:10.85#ibcon#about to write, iclass 18, count 0 2006.230.01:26:10.85#ibcon#wrote, iclass 18, count 0 2006.230.01:26:10.85#ibcon#about to read 3, iclass 18, count 0 2006.230.01:26:10.87#ibcon#read 3, iclass 18, count 0 2006.230.01:26:10.87#ibcon#about to read 4, iclass 18, count 0 2006.230.01:26:10.87#ibcon#read 4, iclass 18, count 0 2006.230.01:26:10.87#ibcon#about to read 5, iclass 18, count 0 2006.230.01:26:10.87#ibcon#read 5, iclass 18, count 0 2006.230.01:26:10.87#ibcon#about to read 6, iclass 18, count 0 2006.230.01:26:10.87#ibcon#read 6, iclass 18, count 0 2006.230.01:26:10.87#ibcon#end of sib2, iclass 18, count 0 2006.230.01:26:10.87#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:26:10.87#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:26:10.87#ibcon#[27=USB\r\n] 2006.230.01:26:10.87#ibcon#*before write, iclass 18, count 0 2006.230.01:26:10.87#ibcon#enter sib2, iclass 18, count 0 2006.230.01:26:10.87#ibcon#flushed, iclass 18, count 0 2006.230.01:26:10.87#ibcon#about to write, iclass 18, count 0 2006.230.01:26:10.87#ibcon#wrote, iclass 18, count 0 2006.230.01:26:10.87#ibcon#about to read 3, iclass 18, count 0 2006.230.01:26:10.90#ibcon#read 3, iclass 18, count 0 2006.230.01:26:10.90#ibcon#about to read 4, iclass 18, count 0 2006.230.01:26:10.90#ibcon#read 4, iclass 18, count 0 2006.230.01:26:10.90#ibcon#about to read 5, iclass 18, count 0 2006.230.01:26:10.90#ibcon#read 5, iclass 18, count 0 2006.230.01:26:10.90#ibcon#about to read 6, iclass 18, count 0 2006.230.01:26:10.90#ibcon#read 6, iclass 18, count 0 2006.230.01:26:10.90#ibcon#end of sib2, iclass 18, count 0 2006.230.01:26:10.90#ibcon#*after write, iclass 18, count 0 2006.230.01:26:10.90#ibcon#*before return 0, iclass 18, count 0 2006.230.01:26:10.90#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:10.90#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:26:10.90#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:26:10.90#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:26:10.90$vck44/vblo=6,719.99 2006.230.01:26:10.90#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.01:26:10.90#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.01:26:10.90#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:10.90#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:10.90#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:10.90#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:10.90#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:26:10.90#ibcon#first serial, iclass 20, count 0 2006.230.01:26:10.90#ibcon#enter sib2, iclass 20, count 0 2006.230.01:26:10.90#ibcon#flushed, iclass 20, count 0 2006.230.01:26:10.90#ibcon#about to write, iclass 20, count 0 2006.230.01:26:10.90#ibcon#wrote, iclass 20, count 0 2006.230.01:26:10.90#ibcon#about to read 3, iclass 20, count 0 2006.230.01:26:10.92#ibcon#read 3, iclass 20, count 0 2006.230.01:26:10.92#ibcon#about to read 4, iclass 20, count 0 2006.230.01:26:10.92#ibcon#read 4, iclass 20, count 0 2006.230.01:26:10.92#ibcon#about to read 5, iclass 20, count 0 2006.230.01:26:10.92#ibcon#read 5, iclass 20, count 0 2006.230.01:26:10.92#ibcon#about to read 6, iclass 20, count 0 2006.230.01:26:10.92#ibcon#read 6, iclass 20, count 0 2006.230.01:26:10.92#ibcon#end of sib2, iclass 20, count 0 2006.230.01:26:10.92#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:26:10.92#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:26:10.92#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:26:10.92#ibcon#*before write, iclass 20, count 0 2006.230.01:26:10.92#ibcon#enter sib2, iclass 20, count 0 2006.230.01:26:10.92#ibcon#flushed, iclass 20, count 0 2006.230.01:26:10.92#ibcon#about to write, iclass 20, count 0 2006.230.01:26:10.92#ibcon#wrote, iclass 20, count 0 2006.230.01:26:10.92#ibcon#about to read 3, iclass 20, count 0 2006.230.01:26:10.96#ibcon#read 3, iclass 20, count 0 2006.230.01:26:10.96#ibcon#about to read 4, iclass 20, count 0 2006.230.01:26:10.96#ibcon#read 4, iclass 20, count 0 2006.230.01:26:10.96#ibcon#about to read 5, iclass 20, count 0 2006.230.01:26:10.96#ibcon#read 5, iclass 20, count 0 2006.230.01:26:10.96#ibcon#about to read 6, iclass 20, count 0 2006.230.01:26:10.96#ibcon#read 6, iclass 20, count 0 2006.230.01:26:10.96#ibcon#end of sib2, iclass 20, count 0 2006.230.01:26:10.96#ibcon#*after write, iclass 20, count 0 2006.230.01:26:10.96#ibcon#*before return 0, iclass 20, count 0 2006.230.01:26:10.96#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:10.96#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:26:10.96#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:26:10.96#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:26:10.96$vck44/vb=6,4 2006.230.01:26:10.96#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.01:26:10.96#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.01:26:10.96#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:10.96#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:11.02#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:11.02#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:11.02#ibcon#enter wrdev, iclass 22, count 2 2006.230.01:26:11.02#ibcon#first serial, iclass 22, count 2 2006.230.01:26:11.02#ibcon#enter sib2, iclass 22, count 2 2006.230.01:26:11.02#ibcon#flushed, iclass 22, count 2 2006.230.01:26:11.02#ibcon#about to write, iclass 22, count 2 2006.230.01:26:11.02#ibcon#wrote, iclass 22, count 2 2006.230.01:26:11.02#ibcon#about to read 3, iclass 22, count 2 2006.230.01:26:11.04#ibcon#read 3, iclass 22, count 2 2006.230.01:26:11.04#ibcon#about to read 4, iclass 22, count 2 2006.230.01:26:11.04#ibcon#read 4, iclass 22, count 2 2006.230.01:26:11.04#ibcon#about to read 5, iclass 22, count 2 2006.230.01:26:11.04#ibcon#read 5, iclass 22, count 2 2006.230.01:26:11.04#ibcon#about to read 6, iclass 22, count 2 2006.230.01:26:11.04#ibcon#read 6, iclass 22, count 2 2006.230.01:26:11.04#ibcon#end of sib2, iclass 22, count 2 2006.230.01:26:11.04#ibcon#*mode == 0, iclass 22, count 2 2006.230.01:26:11.04#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.01:26:11.04#ibcon#[27=AT06-04\r\n] 2006.230.01:26:11.04#ibcon#*before write, iclass 22, count 2 2006.230.01:26:11.04#ibcon#enter sib2, iclass 22, count 2 2006.230.01:26:11.04#ibcon#flushed, iclass 22, count 2 2006.230.01:26:11.04#ibcon#about to write, iclass 22, count 2 2006.230.01:26:11.04#ibcon#wrote, iclass 22, count 2 2006.230.01:26:11.04#ibcon#about to read 3, iclass 22, count 2 2006.230.01:26:11.07#ibcon#read 3, iclass 22, count 2 2006.230.01:26:11.07#ibcon#about to read 4, iclass 22, count 2 2006.230.01:26:11.07#ibcon#read 4, iclass 22, count 2 2006.230.01:26:11.07#ibcon#about to read 5, iclass 22, count 2 2006.230.01:26:11.07#ibcon#read 5, iclass 22, count 2 2006.230.01:26:11.07#ibcon#about to read 6, iclass 22, count 2 2006.230.01:26:11.07#ibcon#read 6, iclass 22, count 2 2006.230.01:26:11.07#ibcon#end of sib2, iclass 22, count 2 2006.230.01:26:11.07#ibcon#*after write, iclass 22, count 2 2006.230.01:26:11.07#ibcon#*before return 0, iclass 22, count 2 2006.230.01:26:11.07#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:11.07#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:26:11.07#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.01:26:11.07#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:11.07#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:11.19#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:11.19#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:11.19#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:26:11.19#ibcon#first serial, iclass 22, count 0 2006.230.01:26:11.19#ibcon#enter sib2, iclass 22, count 0 2006.230.01:26:11.19#ibcon#flushed, iclass 22, count 0 2006.230.01:26:11.19#ibcon#about to write, iclass 22, count 0 2006.230.01:26:11.19#ibcon#wrote, iclass 22, count 0 2006.230.01:26:11.19#ibcon#about to read 3, iclass 22, count 0 2006.230.01:26:11.21#ibcon#read 3, iclass 22, count 0 2006.230.01:26:11.21#ibcon#about to read 4, iclass 22, count 0 2006.230.01:26:11.21#ibcon#read 4, iclass 22, count 0 2006.230.01:26:11.21#ibcon#about to read 5, iclass 22, count 0 2006.230.01:26:11.21#ibcon#read 5, iclass 22, count 0 2006.230.01:26:11.21#ibcon#about to read 6, iclass 22, count 0 2006.230.01:26:11.21#ibcon#read 6, iclass 22, count 0 2006.230.01:26:11.21#ibcon#end of sib2, iclass 22, count 0 2006.230.01:26:11.21#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:26:11.21#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:26:11.21#ibcon#[27=USB\r\n] 2006.230.01:26:11.21#ibcon#*before write, iclass 22, count 0 2006.230.01:26:11.21#ibcon#enter sib2, iclass 22, count 0 2006.230.01:26:11.21#ibcon#flushed, iclass 22, count 0 2006.230.01:26:11.21#ibcon#about to write, iclass 22, count 0 2006.230.01:26:11.21#ibcon#wrote, iclass 22, count 0 2006.230.01:26:11.21#ibcon#about to read 3, iclass 22, count 0 2006.230.01:26:11.24#ibcon#read 3, iclass 22, count 0 2006.230.01:26:11.24#ibcon#about to read 4, iclass 22, count 0 2006.230.01:26:11.24#ibcon#read 4, iclass 22, count 0 2006.230.01:26:11.24#ibcon#about to read 5, iclass 22, count 0 2006.230.01:26:11.24#ibcon#read 5, iclass 22, count 0 2006.230.01:26:11.24#ibcon#about to read 6, iclass 22, count 0 2006.230.01:26:11.24#ibcon#read 6, iclass 22, count 0 2006.230.01:26:11.24#ibcon#end of sib2, iclass 22, count 0 2006.230.01:26:11.24#ibcon#*after write, iclass 22, count 0 2006.230.01:26:11.24#ibcon#*before return 0, iclass 22, count 0 2006.230.01:26:11.24#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:11.24#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:26:11.24#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:26:11.24#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:26:11.24$vck44/vblo=7,734.99 2006.230.01:26:11.24#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.01:26:11.24#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.01:26:11.24#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:11.24#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:11.24#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:11.24#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:11.24#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:26:11.24#ibcon#first serial, iclass 24, count 0 2006.230.01:26:11.24#ibcon#enter sib2, iclass 24, count 0 2006.230.01:26:11.24#ibcon#flushed, iclass 24, count 0 2006.230.01:26:11.24#ibcon#about to write, iclass 24, count 0 2006.230.01:26:11.24#ibcon#wrote, iclass 24, count 0 2006.230.01:26:11.24#ibcon#about to read 3, iclass 24, count 0 2006.230.01:26:11.26#ibcon#read 3, iclass 24, count 0 2006.230.01:26:11.26#ibcon#about to read 4, iclass 24, count 0 2006.230.01:26:11.26#ibcon#read 4, iclass 24, count 0 2006.230.01:26:11.26#ibcon#about to read 5, iclass 24, count 0 2006.230.01:26:11.26#ibcon#read 5, iclass 24, count 0 2006.230.01:26:11.26#ibcon#about to read 6, iclass 24, count 0 2006.230.01:26:11.26#ibcon#read 6, iclass 24, count 0 2006.230.01:26:11.26#ibcon#end of sib2, iclass 24, count 0 2006.230.01:26:11.26#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:26:11.26#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:26:11.26#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:26:11.26#ibcon#*before write, iclass 24, count 0 2006.230.01:26:11.26#ibcon#enter sib2, iclass 24, count 0 2006.230.01:26:11.26#ibcon#flushed, iclass 24, count 0 2006.230.01:26:11.26#ibcon#about to write, iclass 24, count 0 2006.230.01:26:11.26#ibcon#wrote, iclass 24, count 0 2006.230.01:26:11.26#ibcon#about to read 3, iclass 24, count 0 2006.230.01:26:11.30#ibcon#read 3, iclass 24, count 0 2006.230.01:26:11.30#ibcon#about to read 4, iclass 24, count 0 2006.230.01:26:11.30#ibcon#read 4, iclass 24, count 0 2006.230.01:26:11.30#ibcon#about to read 5, iclass 24, count 0 2006.230.01:26:11.30#ibcon#read 5, iclass 24, count 0 2006.230.01:26:11.30#ibcon#about to read 6, iclass 24, count 0 2006.230.01:26:11.30#ibcon#read 6, iclass 24, count 0 2006.230.01:26:11.30#ibcon#end of sib2, iclass 24, count 0 2006.230.01:26:11.30#ibcon#*after write, iclass 24, count 0 2006.230.01:26:11.30#ibcon#*before return 0, iclass 24, count 0 2006.230.01:26:11.30#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:11.30#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:26:11.30#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:26:11.30#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:26:11.30$vck44/vb=7,4 2006.230.01:26:11.30#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.01:26:11.30#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.01:26:11.30#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:11.30#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:11.36#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:11.36#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:11.36#ibcon#enter wrdev, iclass 26, count 2 2006.230.01:26:11.36#ibcon#first serial, iclass 26, count 2 2006.230.01:26:11.36#ibcon#enter sib2, iclass 26, count 2 2006.230.01:26:11.36#ibcon#flushed, iclass 26, count 2 2006.230.01:26:11.36#ibcon#about to write, iclass 26, count 2 2006.230.01:26:11.36#ibcon#wrote, iclass 26, count 2 2006.230.01:26:11.36#ibcon#about to read 3, iclass 26, count 2 2006.230.01:26:11.38#ibcon#read 3, iclass 26, count 2 2006.230.01:26:11.38#ibcon#about to read 4, iclass 26, count 2 2006.230.01:26:11.38#ibcon#read 4, iclass 26, count 2 2006.230.01:26:11.38#ibcon#about to read 5, iclass 26, count 2 2006.230.01:26:11.38#ibcon#read 5, iclass 26, count 2 2006.230.01:26:11.38#ibcon#about to read 6, iclass 26, count 2 2006.230.01:26:11.38#ibcon#read 6, iclass 26, count 2 2006.230.01:26:11.38#ibcon#end of sib2, iclass 26, count 2 2006.230.01:26:11.38#ibcon#*mode == 0, iclass 26, count 2 2006.230.01:26:11.38#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.01:26:11.38#ibcon#[27=AT07-04\r\n] 2006.230.01:26:11.38#ibcon#*before write, iclass 26, count 2 2006.230.01:26:11.38#ibcon#enter sib2, iclass 26, count 2 2006.230.01:26:11.38#ibcon#flushed, iclass 26, count 2 2006.230.01:26:11.38#ibcon#about to write, iclass 26, count 2 2006.230.01:26:11.38#ibcon#wrote, iclass 26, count 2 2006.230.01:26:11.38#ibcon#about to read 3, iclass 26, count 2 2006.230.01:26:11.41#ibcon#read 3, iclass 26, count 2 2006.230.01:26:11.41#ibcon#about to read 4, iclass 26, count 2 2006.230.01:26:11.41#ibcon#read 4, iclass 26, count 2 2006.230.01:26:11.41#ibcon#about to read 5, iclass 26, count 2 2006.230.01:26:11.41#ibcon#read 5, iclass 26, count 2 2006.230.01:26:11.41#ibcon#about to read 6, iclass 26, count 2 2006.230.01:26:11.41#ibcon#read 6, iclass 26, count 2 2006.230.01:26:11.41#ibcon#end of sib2, iclass 26, count 2 2006.230.01:26:11.41#ibcon#*after write, iclass 26, count 2 2006.230.01:26:11.41#ibcon#*before return 0, iclass 26, count 2 2006.230.01:26:11.41#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:11.41#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:26:11.41#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.01:26:11.41#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:11.41#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:11.53#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:11.53#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:11.53#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:26:11.53#ibcon#first serial, iclass 26, count 0 2006.230.01:26:11.53#ibcon#enter sib2, iclass 26, count 0 2006.230.01:26:11.53#ibcon#flushed, iclass 26, count 0 2006.230.01:26:11.53#ibcon#about to write, iclass 26, count 0 2006.230.01:26:11.53#ibcon#wrote, iclass 26, count 0 2006.230.01:26:11.53#ibcon#about to read 3, iclass 26, count 0 2006.230.01:26:11.55#ibcon#read 3, iclass 26, count 0 2006.230.01:26:11.55#ibcon#about to read 4, iclass 26, count 0 2006.230.01:26:11.55#ibcon#read 4, iclass 26, count 0 2006.230.01:26:11.55#ibcon#about to read 5, iclass 26, count 0 2006.230.01:26:11.55#ibcon#read 5, iclass 26, count 0 2006.230.01:26:11.55#ibcon#about to read 6, iclass 26, count 0 2006.230.01:26:11.55#ibcon#read 6, iclass 26, count 0 2006.230.01:26:11.55#ibcon#end of sib2, iclass 26, count 0 2006.230.01:26:11.55#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:26:11.55#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:26:11.55#ibcon#[27=USB\r\n] 2006.230.01:26:11.55#ibcon#*before write, iclass 26, count 0 2006.230.01:26:11.55#ibcon#enter sib2, iclass 26, count 0 2006.230.01:26:11.55#ibcon#flushed, iclass 26, count 0 2006.230.01:26:11.55#ibcon#about to write, iclass 26, count 0 2006.230.01:26:11.55#ibcon#wrote, iclass 26, count 0 2006.230.01:26:11.55#ibcon#about to read 3, iclass 26, count 0 2006.230.01:26:11.58#ibcon#read 3, iclass 26, count 0 2006.230.01:26:11.58#ibcon#about to read 4, iclass 26, count 0 2006.230.01:26:11.58#ibcon#read 4, iclass 26, count 0 2006.230.01:26:11.58#ibcon#about to read 5, iclass 26, count 0 2006.230.01:26:11.58#ibcon#read 5, iclass 26, count 0 2006.230.01:26:11.58#ibcon#about to read 6, iclass 26, count 0 2006.230.01:26:11.58#ibcon#read 6, iclass 26, count 0 2006.230.01:26:11.58#ibcon#end of sib2, iclass 26, count 0 2006.230.01:26:11.58#ibcon#*after write, iclass 26, count 0 2006.230.01:26:11.58#ibcon#*before return 0, iclass 26, count 0 2006.230.01:26:11.58#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:11.58#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:26:11.58#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:26:11.58#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:26:11.58$vck44/vblo=8,744.99 2006.230.01:26:11.58#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.01:26:11.58#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.01:26:11.58#ibcon#ireg 17 cls_cnt 0 2006.230.01:26:11.58#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:11.58#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:11.58#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:11.58#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:26:11.58#ibcon#first serial, iclass 28, count 0 2006.230.01:26:11.58#ibcon#enter sib2, iclass 28, count 0 2006.230.01:26:11.58#ibcon#flushed, iclass 28, count 0 2006.230.01:26:11.58#ibcon#about to write, iclass 28, count 0 2006.230.01:26:11.58#ibcon#wrote, iclass 28, count 0 2006.230.01:26:11.58#ibcon#about to read 3, iclass 28, count 0 2006.230.01:26:11.60#ibcon#read 3, iclass 28, count 0 2006.230.01:26:11.60#ibcon#about to read 4, iclass 28, count 0 2006.230.01:26:11.60#ibcon#read 4, iclass 28, count 0 2006.230.01:26:11.60#ibcon#about to read 5, iclass 28, count 0 2006.230.01:26:11.60#ibcon#read 5, iclass 28, count 0 2006.230.01:26:11.60#ibcon#about to read 6, iclass 28, count 0 2006.230.01:26:11.60#ibcon#read 6, iclass 28, count 0 2006.230.01:26:11.60#ibcon#end of sib2, iclass 28, count 0 2006.230.01:26:11.60#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:26:11.60#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:26:11.60#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:26:11.60#ibcon#*before write, iclass 28, count 0 2006.230.01:26:11.60#ibcon#enter sib2, iclass 28, count 0 2006.230.01:26:11.60#ibcon#flushed, iclass 28, count 0 2006.230.01:26:11.60#ibcon#about to write, iclass 28, count 0 2006.230.01:26:11.60#ibcon#wrote, iclass 28, count 0 2006.230.01:26:11.60#ibcon#about to read 3, iclass 28, count 0 2006.230.01:26:11.64#ibcon#read 3, iclass 28, count 0 2006.230.01:26:11.64#ibcon#about to read 4, iclass 28, count 0 2006.230.01:26:11.64#ibcon#read 4, iclass 28, count 0 2006.230.01:26:11.64#ibcon#about to read 5, iclass 28, count 0 2006.230.01:26:11.64#ibcon#read 5, iclass 28, count 0 2006.230.01:26:11.64#ibcon#about to read 6, iclass 28, count 0 2006.230.01:26:11.64#ibcon#read 6, iclass 28, count 0 2006.230.01:26:11.64#ibcon#end of sib2, iclass 28, count 0 2006.230.01:26:11.64#ibcon#*after write, iclass 28, count 0 2006.230.01:26:11.64#ibcon#*before return 0, iclass 28, count 0 2006.230.01:26:11.64#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:11.64#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:26:11.64#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:26:11.64#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:26:11.64$vck44/vb=8,4 2006.230.01:26:11.64#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.01:26:11.64#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.01:26:11.64#ibcon#ireg 11 cls_cnt 2 2006.230.01:26:11.64#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:11.70#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:11.70#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:11.70#ibcon#enter wrdev, iclass 30, count 2 2006.230.01:26:11.70#ibcon#first serial, iclass 30, count 2 2006.230.01:26:11.70#ibcon#enter sib2, iclass 30, count 2 2006.230.01:26:11.70#ibcon#flushed, iclass 30, count 2 2006.230.01:26:11.70#ibcon#about to write, iclass 30, count 2 2006.230.01:26:11.70#ibcon#wrote, iclass 30, count 2 2006.230.01:26:11.70#ibcon#about to read 3, iclass 30, count 2 2006.230.01:26:11.72#ibcon#read 3, iclass 30, count 2 2006.230.01:26:11.72#ibcon#about to read 4, iclass 30, count 2 2006.230.01:26:11.72#ibcon#read 4, iclass 30, count 2 2006.230.01:26:11.72#ibcon#about to read 5, iclass 30, count 2 2006.230.01:26:11.72#ibcon#read 5, iclass 30, count 2 2006.230.01:26:11.72#ibcon#about to read 6, iclass 30, count 2 2006.230.01:26:11.72#ibcon#read 6, iclass 30, count 2 2006.230.01:26:11.72#ibcon#end of sib2, iclass 30, count 2 2006.230.01:26:11.72#ibcon#*mode == 0, iclass 30, count 2 2006.230.01:26:11.72#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.01:26:11.72#ibcon#[27=AT08-04\r\n] 2006.230.01:26:11.72#ibcon#*before write, iclass 30, count 2 2006.230.01:26:11.72#ibcon#enter sib2, iclass 30, count 2 2006.230.01:26:11.72#ibcon#flushed, iclass 30, count 2 2006.230.01:26:11.72#ibcon#about to write, iclass 30, count 2 2006.230.01:26:11.72#ibcon#wrote, iclass 30, count 2 2006.230.01:26:11.72#ibcon#about to read 3, iclass 30, count 2 2006.230.01:26:11.75#ibcon#read 3, iclass 30, count 2 2006.230.01:26:11.75#ibcon#about to read 4, iclass 30, count 2 2006.230.01:26:11.75#ibcon#read 4, iclass 30, count 2 2006.230.01:26:11.75#ibcon#about to read 5, iclass 30, count 2 2006.230.01:26:11.75#ibcon#read 5, iclass 30, count 2 2006.230.01:26:11.75#ibcon#about to read 6, iclass 30, count 2 2006.230.01:26:11.75#ibcon#read 6, iclass 30, count 2 2006.230.01:26:11.75#ibcon#end of sib2, iclass 30, count 2 2006.230.01:26:11.75#ibcon#*after write, iclass 30, count 2 2006.230.01:26:11.75#ibcon#*before return 0, iclass 30, count 2 2006.230.01:26:11.75#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:11.75#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:26:11.75#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.01:26:11.75#ibcon#ireg 7 cls_cnt 0 2006.230.01:26:11.75#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:11.87#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:11.87#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:11.87#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:26:11.87#ibcon#first serial, iclass 30, count 0 2006.230.01:26:11.87#ibcon#enter sib2, iclass 30, count 0 2006.230.01:26:11.87#ibcon#flushed, iclass 30, count 0 2006.230.01:26:11.87#ibcon#about to write, iclass 30, count 0 2006.230.01:26:11.87#ibcon#wrote, iclass 30, count 0 2006.230.01:26:11.87#ibcon#about to read 3, iclass 30, count 0 2006.230.01:26:11.89#ibcon#read 3, iclass 30, count 0 2006.230.01:26:11.89#ibcon#about to read 4, iclass 30, count 0 2006.230.01:26:11.89#ibcon#read 4, iclass 30, count 0 2006.230.01:26:11.89#ibcon#about to read 5, iclass 30, count 0 2006.230.01:26:11.89#ibcon#read 5, iclass 30, count 0 2006.230.01:26:11.89#ibcon#about to read 6, iclass 30, count 0 2006.230.01:26:11.89#ibcon#read 6, iclass 30, count 0 2006.230.01:26:11.89#ibcon#end of sib2, iclass 30, count 0 2006.230.01:26:11.89#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:26:11.89#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:26:11.89#ibcon#[27=USB\r\n] 2006.230.01:26:11.89#ibcon#*before write, iclass 30, count 0 2006.230.01:26:11.89#ibcon#enter sib2, iclass 30, count 0 2006.230.01:26:11.89#ibcon#flushed, iclass 30, count 0 2006.230.01:26:11.89#ibcon#about to write, iclass 30, count 0 2006.230.01:26:11.89#ibcon#wrote, iclass 30, count 0 2006.230.01:26:11.89#ibcon#about to read 3, iclass 30, count 0 2006.230.01:26:11.92#ibcon#read 3, iclass 30, count 0 2006.230.01:26:11.92#ibcon#about to read 4, iclass 30, count 0 2006.230.01:26:11.92#ibcon#read 4, iclass 30, count 0 2006.230.01:26:11.92#ibcon#about to read 5, iclass 30, count 0 2006.230.01:26:11.92#ibcon#read 5, iclass 30, count 0 2006.230.01:26:11.92#ibcon#about to read 6, iclass 30, count 0 2006.230.01:26:11.92#ibcon#read 6, iclass 30, count 0 2006.230.01:26:11.92#ibcon#end of sib2, iclass 30, count 0 2006.230.01:26:11.92#ibcon#*after write, iclass 30, count 0 2006.230.01:26:11.92#ibcon#*before return 0, iclass 30, count 0 2006.230.01:26:11.92#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:11.92#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:26:11.92#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:26:11.92#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:26:11.92$vck44/vabw=wide 2006.230.01:26:11.92#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.01:26:11.92#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.01:26:11.92#ibcon#ireg 8 cls_cnt 0 2006.230.01:26:11.92#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:11.92#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:11.92#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:11.92#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:26:11.92#ibcon#first serial, iclass 32, count 0 2006.230.01:26:11.92#ibcon#enter sib2, iclass 32, count 0 2006.230.01:26:11.92#ibcon#flushed, iclass 32, count 0 2006.230.01:26:11.92#ibcon#about to write, iclass 32, count 0 2006.230.01:26:11.92#ibcon#wrote, iclass 32, count 0 2006.230.01:26:11.92#ibcon#about to read 3, iclass 32, count 0 2006.230.01:26:11.94#ibcon#read 3, iclass 32, count 0 2006.230.01:26:11.94#ibcon#about to read 4, iclass 32, count 0 2006.230.01:26:11.94#ibcon#read 4, iclass 32, count 0 2006.230.01:26:11.94#ibcon#about to read 5, iclass 32, count 0 2006.230.01:26:11.94#ibcon#read 5, iclass 32, count 0 2006.230.01:26:11.94#ibcon#about to read 6, iclass 32, count 0 2006.230.01:26:11.94#ibcon#read 6, iclass 32, count 0 2006.230.01:26:11.94#ibcon#end of sib2, iclass 32, count 0 2006.230.01:26:11.94#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:26:11.94#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:26:11.94#ibcon#[25=BW32\r\n] 2006.230.01:26:11.94#ibcon#*before write, iclass 32, count 0 2006.230.01:26:11.94#ibcon#enter sib2, iclass 32, count 0 2006.230.01:26:11.94#ibcon#flushed, iclass 32, count 0 2006.230.01:26:11.94#ibcon#about to write, iclass 32, count 0 2006.230.01:26:11.94#ibcon#wrote, iclass 32, count 0 2006.230.01:26:11.94#ibcon#about to read 3, iclass 32, count 0 2006.230.01:26:11.97#ibcon#read 3, iclass 32, count 0 2006.230.01:26:11.97#ibcon#about to read 4, iclass 32, count 0 2006.230.01:26:11.97#ibcon#read 4, iclass 32, count 0 2006.230.01:26:11.97#ibcon#about to read 5, iclass 32, count 0 2006.230.01:26:11.97#ibcon#read 5, iclass 32, count 0 2006.230.01:26:11.97#ibcon#about to read 6, iclass 32, count 0 2006.230.01:26:11.97#ibcon#read 6, iclass 32, count 0 2006.230.01:26:11.97#ibcon#end of sib2, iclass 32, count 0 2006.230.01:26:11.97#ibcon#*after write, iclass 32, count 0 2006.230.01:26:11.97#ibcon#*before return 0, iclass 32, count 0 2006.230.01:26:11.97#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:11.97#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:26:11.97#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:26:11.97#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:26:11.97$vck44/vbbw=wide 2006.230.01:26:11.97#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:26:11.97#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:26:11.97#ibcon#ireg 8 cls_cnt 0 2006.230.01:26:11.97#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:26:12.04#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:26:12.04#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:26:12.04#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:26:12.04#ibcon#first serial, iclass 34, count 0 2006.230.01:26:12.04#ibcon#enter sib2, iclass 34, count 0 2006.230.01:26:12.04#ibcon#flushed, iclass 34, count 0 2006.230.01:26:12.04#ibcon#about to write, iclass 34, count 0 2006.230.01:26:12.04#ibcon#wrote, iclass 34, count 0 2006.230.01:26:12.04#ibcon#about to read 3, iclass 34, count 0 2006.230.01:26:12.06#ibcon#read 3, iclass 34, count 0 2006.230.01:26:12.06#ibcon#about to read 4, iclass 34, count 0 2006.230.01:26:12.06#ibcon#read 4, iclass 34, count 0 2006.230.01:26:12.06#ibcon#about to read 5, iclass 34, count 0 2006.230.01:26:12.06#ibcon#read 5, iclass 34, count 0 2006.230.01:26:12.06#ibcon#about to read 6, iclass 34, count 0 2006.230.01:26:12.06#ibcon#read 6, iclass 34, count 0 2006.230.01:26:12.06#ibcon#end of sib2, iclass 34, count 0 2006.230.01:26:12.06#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:26:12.06#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:26:12.06#ibcon#[27=BW32\r\n] 2006.230.01:26:12.06#ibcon#*before write, iclass 34, count 0 2006.230.01:26:12.06#ibcon#enter sib2, iclass 34, count 0 2006.230.01:26:12.06#ibcon#flushed, iclass 34, count 0 2006.230.01:26:12.06#ibcon#about to write, iclass 34, count 0 2006.230.01:26:12.06#ibcon#wrote, iclass 34, count 0 2006.230.01:26:12.06#ibcon#about to read 3, iclass 34, count 0 2006.230.01:26:12.09#ibcon#read 3, iclass 34, count 0 2006.230.01:26:12.09#ibcon#about to read 4, iclass 34, count 0 2006.230.01:26:12.09#ibcon#read 4, iclass 34, count 0 2006.230.01:26:12.09#ibcon#about to read 5, iclass 34, count 0 2006.230.01:26:12.09#ibcon#read 5, iclass 34, count 0 2006.230.01:26:12.09#ibcon#about to read 6, iclass 34, count 0 2006.230.01:26:12.09#ibcon#read 6, iclass 34, count 0 2006.230.01:26:12.09#ibcon#end of sib2, iclass 34, count 0 2006.230.01:26:12.09#ibcon#*after write, iclass 34, count 0 2006.230.01:26:12.09#ibcon#*before return 0, iclass 34, count 0 2006.230.01:26:12.09#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:26:12.09#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:26:12.09#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:26:12.09#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:26:12.09$setupk4/ifdk4 2006.230.01:26:12.09$ifdk4/lo= 2006.230.01:26:12.09$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:26:12.09$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:26:12.09$ifdk4/patch= 2006.230.01:26:12.09$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:26:12.09$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:26:12.09$setupk4/!*+20s 2006.230.01:26:16.38#abcon#<5=/08 1.7 6.9 32.67 731002.6\r\n> 2006.230.01:26:16.40#abcon#{5=INTERFACE CLEAR} 2006.230.01:26:16.46#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:26:26.55#abcon#<5=/08 1.7 6.9 32.67 721002.7\r\n> 2006.230.01:26:26.57#abcon#{5=INTERFACE CLEAR} 2006.230.01:26:26.58$setupk4/"tpicd 2006.230.01:26:26.58$setupk4/echo=off 2006.230.01:26:26.58$setupk4/xlog=off 2006.230.01:26:26.58:!2006.230.01:32:36 2006.230.01:26:28.13#trakl#Source acquired 2006.230.01:26:29.13#flagr#flagr/antenna,acquired 2006.230.01:32:36.00:preob 2006.230.01:32:36.14/onsource/TRACKING 2006.230.01:32:36.14:!2006.230.01:32:46 2006.230.01:32:46.00:"tape 2006.230.01:32:46.00:"st=record 2006.230.01:32:46.00:data_valid=on 2006.230.01:32:46.00:midob 2006.230.01:32:47.14/onsource/TRACKING 2006.230.01:32:47.14/wx/32.79,1002.7,67 2006.230.01:32:47.34/cable/+6.3942E-03 2006.230.01:32:48.43/va/01,08,usb,yes,30,32 2006.230.01:32:48.43/va/02,07,usb,yes,33,33 2006.230.01:32:48.43/va/03,06,usb,yes,40,43 2006.230.01:32:48.43/va/04,07,usb,yes,33,35 2006.230.01:32:48.43/va/05,04,usb,yes,30,30 2006.230.01:32:48.43/va/06,04,usb,yes,34,33 2006.230.01:32:48.43/va/07,05,usb,yes,30,30 2006.230.01:32:48.43/va/08,06,usb,yes,21,27 2006.230.01:32:48.66/valo/01,524.99,yes,locked 2006.230.01:32:48.66/valo/02,534.99,yes,locked 2006.230.01:32:48.66/valo/03,564.99,yes,locked 2006.230.01:32:48.66/valo/04,624.99,yes,locked 2006.230.01:32:48.66/valo/05,734.99,yes,locked 2006.230.01:32:48.66/valo/06,814.99,yes,locked 2006.230.01:32:48.66/valo/07,864.99,yes,locked 2006.230.01:32:48.66/valo/08,884.99,yes,locked 2006.230.01:32:49.75/vb/01,04,usb,yes,31,29 2006.230.01:32:49.75/vb/02,04,usb,yes,33,33 2006.230.01:32:49.75/vb/03,04,usb,yes,30,33 2006.230.01:32:49.75/vb/04,04,usb,yes,35,34 2006.230.01:32:49.75/vb/05,04,usb,yes,27,30 2006.230.01:32:49.75/vb/06,04,usb,yes,32,28 2006.230.01:32:49.75/vb/07,04,usb,yes,31,31 2006.230.01:32:49.75/vb/08,04,usb,yes,29,32 2006.230.01:32:49.98/vblo/01,629.99,yes,locked 2006.230.01:32:49.98/vblo/02,634.99,yes,locked 2006.230.01:32:49.98/vblo/03,649.99,yes,locked 2006.230.01:32:49.98/vblo/04,679.99,yes,locked 2006.230.01:32:49.98/vblo/05,709.99,yes,locked 2006.230.01:32:49.98/vblo/06,719.99,yes,locked 2006.230.01:32:49.98/vblo/07,734.99,yes,locked 2006.230.01:32:49.98/vblo/08,744.99,yes,locked 2006.230.01:32:50.13/vabw/8 2006.230.01:32:50.28/vbbw/8 2006.230.01:32:50.39/xfe/off,on,12.2 2006.230.01:32:50.76/ifatt/23,28,28,28 2006.230.01:32:51.08/fmout-gps/S +4.46E-07 2006.230.01:32:51.12:!2006.230.01:37:36 2006.230.01:37:36.01:data_valid=off 2006.230.01:37:36.01:"et 2006.230.01:37:36.01:!+3s 2006.230.01:37:39.03:"tape 2006.230.01:37:39.03:postob 2006.230.01:37:39.23/cable/+6.3934E-03 2006.230.01:37:39.23/wx/32.82,1002.7,66 2006.230.01:37:39.30/fmout-gps/S +4.46E-07 2006.230.01:37:39.30:scan_name=230-0146,jd0608,120 2006.230.01:37:39.30:source=3c274,123049.42,122328.0,2000.0,cw 2006.230.01:37:40.14#flagr#flagr/antenna,new-source 2006.230.01:37:40.14:checkk5 2006.230.01:37:40.56/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:37:41.00/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:37:41.83/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:37:42.28/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:37:42.74/chk_obsdata//k5ts1/T2300132??a.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.230.01:37:43.15/chk_obsdata//k5ts2/T2300132??b.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.230.01:37:43.58/chk_obsdata//k5ts3/T2300132??c.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.230.01:37:44.02/chk_obsdata//k5ts4/T2300132??d.dat file size is correct (nominal:1160MB, actual:1156MB). 2006.230.01:37:44.83/k5log//k5ts1_log_newline 2006.230.01:37:45.79/k5log//k5ts2_log_newline 2006.230.01:37:46.60/k5log//k5ts3_log_newline 2006.230.01:37:47.41/k5log//k5ts4_log_newline 2006.230.01:37:47.43/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:37:47.44:setupk4=1 2006.230.01:37:47.44$setupk4/echo=on 2006.230.01:37:47.44$setupk4/pcalon 2006.230.01:37:47.44$pcalon/"no phase cal control is implemented here 2006.230.01:37:47.44$setupk4/"tpicd=stop 2006.230.01:37:47.44$setupk4/"rec=synch_on 2006.230.01:37:47.44$setupk4/"rec_mode=128 2006.230.01:37:47.44$setupk4/!* 2006.230.01:37:47.44$setupk4/recpk4 2006.230.01:37:47.44$recpk4/recpatch= 2006.230.01:37:47.44$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:37:47.44$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:37:47.44$setupk4/vck44 2006.230.01:37:47.44$vck44/valo=1,524.99 2006.230.01:37:47.44#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:37:47.44#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:37:47.44#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:47.44#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:47.44#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:47.44#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:47.44#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:37:47.44#ibcon#first serial, iclass 18, count 0 2006.230.01:37:47.44#ibcon#enter sib2, iclass 18, count 0 2006.230.01:37:47.44#ibcon#flushed, iclass 18, count 0 2006.230.01:37:47.44#ibcon#about to write, iclass 18, count 0 2006.230.01:37:47.44#ibcon#wrote, iclass 18, count 0 2006.230.01:37:47.44#ibcon#about to read 3, iclass 18, count 0 2006.230.01:37:47.48#ibcon#read 3, iclass 18, count 0 2006.230.01:37:47.48#ibcon#about to read 4, iclass 18, count 0 2006.230.01:37:47.48#ibcon#read 4, iclass 18, count 0 2006.230.01:37:47.48#ibcon#about to read 5, iclass 18, count 0 2006.230.01:37:47.48#ibcon#read 5, iclass 18, count 0 2006.230.01:37:47.48#ibcon#about to read 6, iclass 18, count 0 2006.230.01:37:47.48#ibcon#read 6, iclass 18, count 0 2006.230.01:37:47.48#ibcon#end of sib2, iclass 18, count 0 2006.230.01:37:47.48#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:37:47.48#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:37:47.48#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:37:47.48#ibcon#*before write, iclass 18, count 0 2006.230.01:37:47.48#ibcon#enter sib2, iclass 18, count 0 2006.230.01:37:47.48#ibcon#flushed, iclass 18, count 0 2006.230.01:37:47.48#ibcon#about to write, iclass 18, count 0 2006.230.01:37:47.48#ibcon#wrote, iclass 18, count 0 2006.230.01:37:47.48#ibcon#about to read 3, iclass 18, count 0 2006.230.01:37:47.53#ibcon#read 3, iclass 18, count 0 2006.230.01:37:47.53#ibcon#about to read 4, iclass 18, count 0 2006.230.01:37:47.53#ibcon#read 4, iclass 18, count 0 2006.230.01:37:47.53#ibcon#about to read 5, iclass 18, count 0 2006.230.01:37:47.53#ibcon#read 5, iclass 18, count 0 2006.230.01:37:47.53#ibcon#about to read 6, iclass 18, count 0 2006.230.01:37:47.53#ibcon#read 6, iclass 18, count 0 2006.230.01:37:47.53#ibcon#end of sib2, iclass 18, count 0 2006.230.01:37:47.53#ibcon#*after write, iclass 18, count 0 2006.230.01:37:47.53#ibcon#*before return 0, iclass 18, count 0 2006.230.01:37:47.53#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:47.53#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:47.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:37:47.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:37:47.53$vck44/va=1,8 2006.230.01:37:47.53#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.01:37:47.53#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.01:37:47.53#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:47.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:47.53#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:47.53#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:47.53#ibcon#enter wrdev, iclass 20, count 2 2006.230.01:37:47.53#ibcon#first serial, iclass 20, count 2 2006.230.01:37:47.53#ibcon#enter sib2, iclass 20, count 2 2006.230.01:37:47.53#ibcon#flushed, iclass 20, count 2 2006.230.01:37:47.53#ibcon#about to write, iclass 20, count 2 2006.230.01:37:47.53#ibcon#wrote, iclass 20, count 2 2006.230.01:37:47.53#ibcon#about to read 3, iclass 20, count 2 2006.230.01:37:47.55#ibcon#read 3, iclass 20, count 2 2006.230.01:37:47.55#ibcon#about to read 4, iclass 20, count 2 2006.230.01:37:47.55#ibcon#read 4, iclass 20, count 2 2006.230.01:37:47.55#ibcon#about to read 5, iclass 20, count 2 2006.230.01:37:47.55#ibcon#read 5, iclass 20, count 2 2006.230.01:37:47.55#ibcon#about to read 6, iclass 20, count 2 2006.230.01:37:47.55#ibcon#read 6, iclass 20, count 2 2006.230.01:37:47.55#ibcon#end of sib2, iclass 20, count 2 2006.230.01:37:47.55#ibcon#*mode == 0, iclass 20, count 2 2006.230.01:37:47.55#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.01:37:47.55#ibcon#[25=AT01-08\r\n] 2006.230.01:37:47.55#ibcon#*before write, iclass 20, count 2 2006.230.01:37:47.55#ibcon#enter sib2, iclass 20, count 2 2006.230.01:37:47.55#ibcon#flushed, iclass 20, count 2 2006.230.01:37:47.55#ibcon#about to write, iclass 20, count 2 2006.230.01:37:47.55#ibcon#wrote, iclass 20, count 2 2006.230.01:37:47.55#ibcon#about to read 3, iclass 20, count 2 2006.230.01:37:47.58#ibcon#read 3, iclass 20, count 2 2006.230.01:37:47.58#ibcon#about to read 4, iclass 20, count 2 2006.230.01:37:47.58#ibcon#read 4, iclass 20, count 2 2006.230.01:37:47.58#ibcon#about to read 5, iclass 20, count 2 2006.230.01:37:47.58#ibcon#read 5, iclass 20, count 2 2006.230.01:37:47.58#ibcon#about to read 6, iclass 20, count 2 2006.230.01:37:47.58#ibcon#read 6, iclass 20, count 2 2006.230.01:37:47.58#ibcon#end of sib2, iclass 20, count 2 2006.230.01:37:47.58#ibcon#*after write, iclass 20, count 2 2006.230.01:37:47.58#ibcon#*before return 0, iclass 20, count 2 2006.230.01:37:47.58#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:47.58#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:47.58#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.01:37:47.58#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:47.58#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:47.70#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:47.70#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:47.70#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:37:47.70#ibcon#first serial, iclass 20, count 0 2006.230.01:37:47.70#ibcon#enter sib2, iclass 20, count 0 2006.230.01:37:47.70#ibcon#flushed, iclass 20, count 0 2006.230.01:37:47.70#ibcon#about to write, iclass 20, count 0 2006.230.01:37:47.70#ibcon#wrote, iclass 20, count 0 2006.230.01:37:47.70#ibcon#about to read 3, iclass 20, count 0 2006.230.01:37:47.72#ibcon#read 3, iclass 20, count 0 2006.230.01:37:47.72#ibcon#about to read 4, iclass 20, count 0 2006.230.01:37:47.72#ibcon#read 4, iclass 20, count 0 2006.230.01:37:47.72#ibcon#about to read 5, iclass 20, count 0 2006.230.01:37:47.72#ibcon#read 5, iclass 20, count 0 2006.230.01:37:47.72#ibcon#about to read 6, iclass 20, count 0 2006.230.01:37:47.72#ibcon#read 6, iclass 20, count 0 2006.230.01:37:47.72#ibcon#end of sib2, iclass 20, count 0 2006.230.01:37:47.72#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:37:47.72#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:37:47.72#ibcon#[25=USB\r\n] 2006.230.01:37:47.72#ibcon#*before write, iclass 20, count 0 2006.230.01:37:47.72#ibcon#enter sib2, iclass 20, count 0 2006.230.01:37:47.72#ibcon#flushed, iclass 20, count 0 2006.230.01:37:47.72#ibcon#about to write, iclass 20, count 0 2006.230.01:37:47.72#ibcon#wrote, iclass 20, count 0 2006.230.01:37:47.72#ibcon#about to read 3, iclass 20, count 0 2006.230.01:37:47.75#ibcon#read 3, iclass 20, count 0 2006.230.01:37:47.75#ibcon#about to read 4, iclass 20, count 0 2006.230.01:37:47.75#ibcon#read 4, iclass 20, count 0 2006.230.01:37:47.75#ibcon#about to read 5, iclass 20, count 0 2006.230.01:37:47.75#ibcon#read 5, iclass 20, count 0 2006.230.01:37:47.75#ibcon#about to read 6, iclass 20, count 0 2006.230.01:37:47.75#ibcon#read 6, iclass 20, count 0 2006.230.01:37:47.75#ibcon#end of sib2, iclass 20, count 0 2006.230.01:37:47.75#ibcon#*after write, iclass 20, count 0 2006.230.01:37:47.75#ibcon#*before return 0, iclass 20, count 0 2006.230.01:37:47.75#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:47.75#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:47.75#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:37:47.75#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:37:47.75$vck44/valo=2,534.99 2006.230.01:37:47.75#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.01:37:47.75#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.01:37:47.75#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:47.75#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:37:47.75#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:37:47.75#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:37:47.75#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:37:47.75#ibcon#first serial, iclass 22, count 0 2006.230.01:37:47.75#ibcon#enter sib2, iclass 22, count 0 2006.230.01:37:47.75#ibcon#flushed, iclass 22, count 0 2006.230.01:37:47.75#ibcon#about to write, iclass 22, count 0 2006.230.01:37:47.75#ibcon#wrote, iclass 22, count 0 2006.230.01:37:47.75#ibcon#about to read 3, iclass 22, count 0 2006.230.01:37:47.77#ibcon#read 3, iclass 22, count 0 2006.230.01:37:47.77#ibcon#about to read 4, iclass 22, count 0 2006.230.01:37:47.77#ibcon#read 4, iclass 22, count 0 2006.230.01:37:47.77#ibcon#about to read 5, iclass 22, count 0 2006.230.01:37:47.77#ibcon#read 5, iclass 22, count 0 2006.230.01:37:47.77#ibcon#about to read 6, iclass 22, count 0 2006.230.01:37:47.77#ibcon#read 6, iclass 22, count 0 2006.230.01:37:47.77#ibcon#end of sib2, iclass 22, count 0 2006.230.01:37:47.77#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:37:47.77#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:37:47.77#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:37:47.77#ibcon#*before write, iclass 22, count 0 2006.230.01:37:47.77#ibcon#enter sib2, iclass 22, count 0 2006.230.01:37:47.77#ibcon#flushed, iclass 22, count 0 2006.230.01:37:47.77#ibcon#about to write, iclass 22, count 0 2006.230.01:37:47.77#ibcon#wrote, iclass 22, count 0 2006.230.01:37:47.77#ibcon#about to read 3, iclass 22, count 0 2006.230.01:37:47.81#ibcon#read 3, iclass 22, count 0 2006.230.01:37:47.81#ibcon#about to read 4, iclass 22, count 0 2006.230.01:37:47.81#ibcon#read 4, iclass 22, count 0 2006.230.01:37:47.81#ibcon#about to read 5, iclass 22, count 0 2006.230.01:37:47.81#ibcon#read 5, iclass 22, count 0 2006.230.01:37:47.81#ibcon#about to read 6, iclass 22, count 0 2006.230.01:37:47.81#ibcon#read 6, iclass 22, count 0 2006.230.01:37:47.81#ibcon#end of sib2, iclass 22, count 0 2006.230.01:37:47.81#ibcon#*after write, iclass 22, count 0 2006.230.01:37:47.81#ibcon#*before return 0, iclass 22, count 0 2006.230.01:37:47.81#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:37:47.81#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:37:47.81#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:37:47.81#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:37:47.81$vck44/va=2,7 2006.230.01:37:47.81#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.01:37:47.81#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.01:37:47.81#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:47.81#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:37:47.87#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:37:47.87#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:37:47.87#ibcon#enter wrdev, iclass 24, count 2 2006.230.01:37:47.87#ibcon#first serial, iclass 24, count 2 2006.230.01:37:47.87#ibcon#enter sib2, iclass 24, count 2 2006.230.01:37:47.87#ibcon#flushed, iclass 24, count 2 2006.230.01:37:47.87#ibcon#about to write, iclass 24, count 2 2006.230.01:37:47.87#ibcon#wrote, iclass 24, count 2 2006.230.01:37:47.87#ibcon#about to read 3, iclass 24, count 2 2006.230.01:37:47.89#ibcon#read 3, iclass 24, count 2 2006.230.01:37:47.89#ibcon#about to read 4, iclass 24, count 2 2006.230.01:37:47.89#ibcon#read 4, iclass 24, count 2 2006.230.01:37:47.89#ibcon#about to read 5, iclass 24, count 2 2006.230.01:37:47.89#ibcon#read 5, iclass 24, count 2 2006.230.01:37:47.89#ibcon#about to read 6, iclass 24, count 2 2006.230.01:37:47.89#ibcon#read 6, iclass 24, count 2 2006.230.01:37:47.89#ibcon#end of sib2, iclass 24, count 2 2006.230.01:37:47.89#ibcon#*mode == 0, iclass 24, count 2 2006.230.01:37:47.89#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.01:37:47.89#ibcon#[25=AT02-07\r\n] 2006.230.01:37:47.89#ibcon#*before write, iclass 24, count 2 2006.230.01:37:47.89#ibcon#enter sib2, iclass 24, count 2 2006.230.01:37:47.89#ibcon#flushed, iclass 24, count 2 2006.230.01:37:47.89#ibcon#about to write, iclass 24, count 2 2006.230.01:37:47.89#ibcon#wrote, iclass 24, count 2 2006.230.01:37:47.89#ibcon#about to read 3, iclass 24, count 2 2006.230.01:37:47.92#ibcon#read 3, iclass 24, count 2 2006.230.01:37:47.92#ibcon#about to read 4, iclass 24, count 2 2006.230.01:37:47.92#ibcon#read 4, iclass 24, count 2 2006.230.01:37:47.92#ibcon#about to read 5, iclass 24, count 2 2006.230.01:37:47.92#ibcon#read 5, iclass 24, count 2 2006.230.01:37:47.92#ibcon#about to read 6, iclass 24, count 2 2006.230.01:37:47.92#ibcon#read 6, iclass 24, count 2 2006.230.01:37:47.92#ibcon#end of sib2, iclass 24, count 2 2006.230.01:37:47.92#ibcon#*after write, iclass 24, count 2 2006.230.01:37:47.92#ibcon#*before return 0, iclass 24, count 2 2006.230.01:37:47.92#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:37:47.92#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:37:47.92#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.01:37:47.92#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:47.92#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:37:48.04#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:37:48.04#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:37:48.04#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:37:48.04#ibcon#first serial, iclass 24, count 0 2006.230.01:37:48.04#ibcon#enter sib2, iclass 24, count 0 2006.230.01:37:48.04#ibcon#flushed, iclass 24, count 0 2006.230.01:37:48.04#ibcon#about to write, iclass 24, count 0 2006.230.01:37:48.04#ibcon#wrote, iclass 24, count 0 2006.230.01:37:48.04#ibcon#about to read 3, iclass 24, count 0 2006.230.01:37:48.06#ibcon#read 3, iclass 24, count 0 2006.230.01:37:48.06#ibcon#about to read 4, iclass 24, count 0 2006.230.01:37:48.06#ibcon#read 4, iclass 24, count 0 2006.230.01:37:48.06#ibcon#about to read 5, iclass 24, count 0 2006.230.01:37:48.06#ibcon#read 5, iclass 24, count 0 2006.230.01:37:48.06#ibcon#about to read 6, iclass 24, count 0 2006.230.01:37:48.06#ibcon#read 6, iclass 24, count 0 2006.230.01:37:48.06#ibcon#end of sib2, iclass 24, count 0 2006.230.01:37:48.06#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:37:48.06#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:37:48.06#ibcon#[25=USB\r\n] 2006.230.01:37:48.06#ibcon#*before write, iclass 24, count 0 2006.230.01:37:48.06#ibcon#enter sib2, iclass 24, count 0 2006.230.01:37:48.06#ibcon#flushed, iclass 24, count 0 2006.230.01:37:48.06#ibcon#about to write, iclass 24, count 0 2006.230.01:37:48.06#ibcon#wrote, iclass 24, count 0 2006.230.01:37:48.06#ibcon#about to read 3, iclass 24, count 0 2006.230.01:37:48.09#ibcon#read 3, iclass 24, count 0 2006.230.01:37:48.09#ibcon#about to read 4, iclass 24, count 0 2006.230.01:37:48.09#ibcon#read 4, iclass 24, count 0 2006.230.01:37:48.09#ibcon#about to read 5, iclass 24, count 0 2006.230.01:37:48.09#ibcon#read 5, iclass 24, count 0 2006.230.01:37:48.09#ibcon#about to read 6, iclass 24, count 0 2006.230.01:37:48.09#ibcon#read 6, iclass 24, count 0 2006.230.01:37:48.09#ibcon#end of sib2, iclass 24, count 0 2006.230.01:37:48.09#ibcon#*after write, iclass 24, count 0 2006.230.01:37:48.09#ibcon#*before return 0, iclass 24, count 0 2006.230.01:37:48.09#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:37:48.09#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:37:48.09#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:37:48.09#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:37:48.09$vck44/valo=3,564.99 2006.230.01:37:48.09#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.01:37:48.09#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.01:37:48.09#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:48.09#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:37:48.09#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:37:48.09#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:37:48.09#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:37:48.09#ibcon#first serial, iclass 26, count 0 2006.230.01:37:48.09#ibcon#enter sib2, iclass 26, count 0 2006.230.01:37:48.09#ibcon#flushed, iclass 26, count 0 2006.230.01:37:48.09#ibcon#about to write, iclass 26, count 0 2006.230.01:37:48.09#ibcon#wrote, iclass 26, count 0 2006.230.01:37:48.09#ibcon#about to read 3, iclass 26, count 0 2006.230.01:37:48.11#ibcon#read 3, iclass 26, count 0 2006.230.01:37:48.11#ibcon#about to read 4, iclass 26, count 0 2006.230.01:37:48.11#ibcon#read 4, iclass 26, count 0 2006.230.01:37:48.11#ibcon#about to read 5, iclass 26, count 0 2006.230.01:37:48.11#ibcon#read 5, iclass 26, count 0 2006.230.01:37:48.11#ibcon#about to read 6, iclass 26, count 0 2006.230.01:37:48.11#ibcon#read 6, iclass 26, count 0 2006.230.01:37:48.11#ibcon#end of sib2, iclass 26, count 0 2006.230.01:37:48.11#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:37:48.11#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:37:48.11#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:37:48.11#ibcon#*before write, iclass 26, count 0 2006.230.01:37:48.11#ibcon#enter sib2, iclass 26, count 0 2006.230.01:37:48.11#ibcon#flushed, iclass 26, count 0 2006.230.01:37:48.11#ibcon#about to write, iclass 26, count 0 2006.230.01:37:48.11#ibcon#wrote, iclass 26, count 0 2006.230.01:37:48.11#ibcon#about to read 3, iclass 26, count 0 2006.230.01:37:48.15#ibcon#read 3, iclass 26, count 0 2006.230.01:37:48.15#ibcon#about to read 4, iclass 26, count 0 2006.230.01:37:48.15#ibcon#read 4, iclass 26, count 0 2006.230.01:37:48.15#ibcon#about to read 5, iclass 26, count 0 2006.230.01:37:48.15#ibcon#read 5, iclass 26, count 0 2006.230.01:37:48.15#ibcon#about to read 6, iclass 26, count 0 2006.230.01:37:48.15#ibcon#read 6, iclass 26, count 0 2006.230.01:37:48.15#ibcon#end of sib2, iclass 26, count 0 2006.230.01:37:48.15#ibcon#*after write, iclass 26, count 0 2006.230.01:37:48.15#ibcon#*before return 0, iclass 26, count 0 2006.230.01:37:48.15#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:37:48.15#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:37:48.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:37:48.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:37:48.15$vck44/va=3,6 2006.230.01:37:48.15#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.01:37:48.15#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.01:37:48.15#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:48.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:37:48.21#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:37:48.21#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:37:48.21#ibcon#enter wrdev, iclass 28, count 2 2006.230.01:37:48.21#ibcon#first serial, iclass 28, count 2 2006.230.01:37:48.21#ibcon#enter sib2, iclass 28, count 2 2006.230.01:37:48.21#ibcon#flushed, iclass 28, count 2 2006.230.01:37:48.21#ibcon#about to write, iclass 28, count 2 2006.230.01:37:48.21#ibcon#wrote, iclass 28, count 2 2006.230.01:37:48.21#ibcon#about to read 3, iclass 28, count 2 2006.230.01:37:48.23#ibcon#read 3, iclass 28, count 2 2006.230.01:37:48.23#ibcon#about to read 4, iclass 28, count 2 2006.230.01:37:48.23#ibcon#read 4, iclass 28, count 2 2006.230.01:37:48.23#ibcon#about to read 5, iclass 28, count 2 2006.230.01:37:48.23#ibcon#read 5, iclass 28, count 2 2006.230.01:37:48.23#ibcon#about to read 6, iclass 28, count 2 2006.230.01:37:48.23#ibcon#read 6, iclass 28, count 2 2006.230.01:37:48.23#ibcon#end of sib2, iclass 28, count 2 2006.230.01:37:48.23#ibcon#*mode == 0, iclass 28, count 2 2006.230.01:37:48.23#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.01:37:48.23#ibcon#[25=AT03-06\r\n] 2006.230.01:37:48.23#ibcon#*before write, iclass 28, count 2 2006.230.01:37:48.23#ibcon#enter sib2, iclass 28, count 2 2006.230.01:37:48.23#ibcon#flushed, iclass 28, count 2 2006.230.01:37:48.23#ibcon#about to write, iclass 28, count 2 2006.230.01:37:48.23#ibcon#wrote, iclass 28, count 2 2006.230.01:37:48.23#ibcon#about to read 3, iclass 28, count 2 2006.230.01:37:48.26#ibcon#read 3, iclass 28, count 2 2006.230.01:37:48.26#ibcon#about to read 4, iclass 28, count 2 2006.230.01:37:48.26#ibcon#read 4, iclass 28, count 2 2006.230.01:37:48.26#ibcon#about to read 5, iclass 28, count 2 2006.230.01:37:48.26#ibcon#read 5, iclass 28, count 2 2006.230.01:37:48.26#ibcon#about to read 6, iclass 28, count 2 2006.230.01:37:48.26#ibcon#read 6, iclass 28, count 2 2006.230.01:37:48.26#ibcon#end of sib2, iclass 28, count 2 2006.230.01:37:48.26#ibcon#*after write, iclass 28, count 2 2006.230.01:37:48.26#ibcon#*before return 0, iclass 28, count 2 2006.230.01:37:48.26#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:37:48.26#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:37:48.26#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.01:37:48.26#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:48.26#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:37:48.38#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:37:48.38#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:37:48.38#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:37:48.38#ibcon#first serial, iclass 28, count 0 2006.230.01:37:48.38#ibcon#enter sib2, iclass 28, count 0 2006.230.01:37:48.38#ibcon#flushed, iclass 28, count 0 2006.230.01:37:48.38#ibcon#about to write, iclass 28, count 0 2006.230.01:37:48.38#ibcon#wrote, iclass 28, count 0 2006.230.01:37:48.38#ibcon#about to read 3, iclass 28, count 0 2006.230.01:37:48.40#ibcon#read 3, iclass 28, count 0 2006.230.01:37:48.40#ibcon#about to read 4, iclass 28, count 0 2006.230.01:37:48.40#ibcon#read 4, iclass 28, count 0 2006.230.01:37:48.40#ibcon#about to read 5, iclass 28, count 0 2006.230.01:37:48.40#ibcon#read 5, iclass 28, count 0 2006.230.01:37:48.40#ibcon#about to read 6, iclass 28, count 0 2006.230.01:37:48.40#ibcon#read 6, iclass 28, count 0 2006.230.01:37:48.40#ibcon#end of sib2, iclass 28, count 0 2006.230.01:37:48.40#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:37:48.40#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:37:48.40#ibcon#[25=USB\r\n] 2006.230.01:37:48.40#ibcon#*before write, iclass 28, count 0 2006.230.01:37:48.40#ibcon#enter sib2, iclass 28, count 0 2006.230.01:37:48.40#ibcon#flushed, iclass 28, count 0 2006.230.01:37:48.40#ibcon#about to write, iclass 28, count 0 2006.230.01:37:48.40#ibcon#wrote, iclass 28, count 0 2006.230.01:37:48.40#ibcon#about to read 3, iclass 28, count 0 2006.230.01:37:48.43#ibcon#read 3, iclass 28, count 0 2006.230.01:37:48.43#ibcon#about to read 4, iclass 28, count 0 2006.230.01:37:48.43#ibcon#read 4, iclass 28, count 0 2006.230.01:37:48.43#ibcon#about to read 5, iclass 28, count 0 2006.230.01:37:48.43#ibcon#read 5, iclass 28, count 0 2006.230.01:37:48.43#ibcon#about to read 6, iclass 28, count 0 2006.230.01:37:48.43#ibcon#read 6, iclass 28, count 0 2006.230.01:37:48.43#ibcon#end of sib2, iclass 28, count 0 2006.230.01:37:48.43#ibcon#*after write, iclass 28, count 0 2006.230.01:37:48.43#ibcon#*before return 0, iclass 28, count 0 2006.230.01:37:48.43#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:37:48.43#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:37:48.43#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:37:48.43#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:37:48.43$vck44/valo=4,624.99 2006.230.01:37:48.43#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.01:37:48.43#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.01:37:48.43#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:48.43#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:48.43#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:48.43#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:48.43#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:37:48.43#ibcon#first serial, iclass 30, count 0 2006.230.01:37:48.43#ibcon#enter sib2, iclass 30, count 0 2006.230.01:37:48.43#ibcon#flushed, iclass 30, count 0 2006.230.01:37:48.43#ibcon#about to write, iclass 30, count 0 2006.230.01:37:48.43#ibcon#wrote, iclass 30, count 0 2006.230.01:37:48.43#ibcon#about to read 3, iclass 30, count 0 2006.230.01:37:48.45#ibcon#read 3, iclass 30, count 0 2006.230.01:37:48.45#ibcon#about to read 4, iclass 30, count 0 2006.230.01:37:48.45#ibcon#read 4, iclass 30, count 0 2006.230.01:37:48.45#ibcon#about to read 5, iclass 30, count 0 2006.230.01:37:48.45#ibcon#read 5, iclass 30, count 0 2006.230.01:37:48.45#ibcon#about to read 6, iclass 30, count 0 2006.230.01:37:48.45#ibcon#read 6, iclass 30, count 0 2006.230.01:37:48.45#ibcon#end of sib2, iclass 30, count 0 2006.230.01:37:48.45#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:37:48.45#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:37:48.45#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:37:48.45#ibcon#*before write, iclass 30, count 0 2006.230.01:37:48.45#ibcon#enter sib2, iclass 30, count 0 2006.230.01:37:48.45#ibcon#flushed, iclass 30, count 0 2006.230.01:37:48.45#ibcon#about to write, iclass 30, count 0 2006.230.01:37:48.45#ibcon#wrote, iclass 30, count 0 2006.230.01:37:48.45#ibcon#about to read 3, iclass 30, count 0 2006.230.01:37:48.49#ibcon#read 3, iclass 30, count 0 2006.230.01:37:48.49#ibcon#about to read 4, iclass 30, count 0 2006.230.01:37:48.49#ibcon#read 4, iclass 30, count 0 2006.230.01:37:48.49#ibcon#about to read 5, iclass 30, count 0 2006.230.01:37:48.49#ibcon#read 5, iclass 30, count 0 2006.230.01:37:48.49#ibcon#about to read 6, iclass 30, count 0 2006.230.01:37:48.49#ibcon#read 6, iclass 30, count 0 2006.230.01:37:48.49#ibcon#end of sib2, iclass 30, count 0 2006.230.01:37:48.49#ibcon#*after write, iclass 30, count 0 2006.230.01:37:48.49#ibcon#*before return 0, iclass 30, count 0 2006.230.01:37:48.49#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:48.49#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:48.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:37:48.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:37:48.49$vck44/va=4,7 2006.230.01:37:48.49#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.01:37:48.49#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.01:37:48.49#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:48.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:48.55#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:48.55#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:48.55#ibcon#enter wrdev, iclass 32, count 2 2006.230.01:37:48.55#ibcon#first serial, iclass 32, count 2 2006.230.01:37:48.55#ibcon#enter sib2, iclass 32, count 2 2006.230.01:37:48.55#ibcon#flushed, iclass 32, count 2 2006.230.01:37:48.55#ibcon#about to write, iclass 32, count 2 2006.230.01:37:48.55#ibcon#wrote, iclass 32, count 2 2006.230.01:37:48.55#ibcon#about to read 3, iclass 32, count 2 2006.230.01:37:48.57#ibcon#read 3, iclass 32, count 2 2006.230.01:37:48.57#ibcon#about to read 4, iclass 32, count 2 2006.230.01:37:48.57#ibcon#read 4, iclass 32, count 2 2006.230.01:37:48.57#ibcon#about to read 5, iclass 32, count 2 2006.230.01:37:48.57#ibcon#read 5, iclass 32, count 2 2006.230.01:37:48.57#ibcon#about to read 6, iclass 32, count 2 2006.230.01:37:48.57#ibcon#read 6, iclass 32, count 2 2006.230.01:37:48.57#ibcon#end of sib2, iclass 32, count 2 2006.230.01:37:48.57#ibcon#*mode == 0, iclass 32, count 2 2006.230.01:37:48.57#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.01:37:48.57#ibcon#[25=AT04-07\r\n] 2006.230.01:37:48.57#ibcon#*before write, iclass 32, count 2 2006.230.01:37:48.57#ibcon#enter sib2, iclass 32, count 2 2006.230.01:37:48.57#ibcon#flushed, iclass 32, count 2 2006.230.01:37:48.57#ibcon#about to write, iclass 32, count 2 2006.230.01:37:48.57#ibcon#wrote, iclass 32, count 2 2006.230.01:37:48.57#ibcon#about to read 3, iclass 32, count 2 2006.230.01:37:48.60#ibcon#read 3, iclass 32, count 2 2006.230.01:37:48.60#ibcon#about to read 4, iclass 32, count 2 2006.230.01:37:48.60#ibcon#read 4, iclass 32, count 2 2006.230.01:37:48.60#ibcon#about to read 5, iclass 32, count 2 2006.230.01:37:48.60#ibcon#read 5, iclass 32, count 2 2006.230.01:37:48.60#ibcon#about to read 6, iclass 32, count 2 2006.230.01:37:48.60#ibcon#read 6, iclass 32, count 2 2006.230.01:37:48.60#ibcon#end of sib2, iclass 32, count 2 2006.230.01:37:48.60#ibcon#*after write, iclass 32, count 2 2006.230.01:37:48.60#ibcon#*before return 0, iclass 32, count 2 2006.230.01:37:48.60#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:48.60#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:48.60#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.01:37:48.60#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:48.60#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:48.72#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:48.72#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:48.72#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:37:48.72#ibcon#first serial, iclass 32, count 0 2006.230.01:37:48.72#ibcon#enter sib2, iclass 32, count 0 2006.230.01:37:48.72#ibcon#flushed, iclass 32, count 0 2006.230.01:37:48.72#ibcon#about to write, iclass 32, count 0 2006.230.01:37:48.72#ibcon#wrote, iclass 32, count 0 2006.230.01:37:48.72#ibcon#about to read 3, iclass 32, count 0 2006.230.01:37:48.74#ibcon#read 3, iclass 32, count 0 2006.230.01:37:48.74#ibcon#about to read 4, iclass 32, count 0 2006.230.01:37:48.74#ibcon#read 4, iclass 32, count 0 2006.230.01:37:48.74#ibcon#about to read 5, iclass 32, count 0 2006.230.01:37:48.74#ibcon#read 5, iclass 32, count 0 2006.230.01:37:48.74#ibcon#about to read 6, iclass 32, count 0 2006.230.01:37:48.74#ibcon#read 6, iclass 32, count 0 2006.230.01:37:48.74#ibcon#end of sib2, iclass 32, count 0 2006.230.01:37:48.74#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:37:48.74#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:37:48.74#ibcon#[25=USB\r\n] 2006.230.01:37:48.74#ibcon#*before write, iclass 32, count 0 2006.230.01:37:48.74#ibcon#enter sib2, iclass 32, count 0 2006.230.01:37:48.74#ibcon#flushed, iclass 32, count 0 2006.230.01:37:48.74#ibcon#about to write, iclass 32, count 0 2006.230.01:37:48.74#ibcon#wrote, iclass 32, count 0 2006.230.01:37:48.74#ibcon#about to read 3, iclass 32, count 0 2006.230.01:37:48.77#ibcon#read 3, iclass 32, count 0 2006.230.01:37:48.77#ibcon#about to read 4, iclass 32, count 0 2006.230.01:37:48.77#ibcon#read 4, iclass 32, count 0 2006.230.01:37:48.77#ibcon#about to read 5, iclass 32, count 0 2006.230.01:37:48.77#ibcon#read 5, iclass 32, count 0 2006.230.01:37:48.77#ibcon#about to read 6, iclass 32, count 0 2006.230.01:37:48.77#ibcon#read 6, iclass 32, count 0 2006.230.01:37:48.77#ibcon#end of sib2, iclass 32, count 0 2006.230.01:37:48.77#ibcon#*after write, iclass 32, count 0 2006.230.01:37:48.77#ibcon#*before return 0, iclass 32, count 0 2006.230.01:37:48.77#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:48.77#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:48.77#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:37:48.77#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:37:48.77$vck44/valo=5,734.99 2006.230.01:37:48.77#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:37:48.77#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:37:48.77#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:48.77#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:48.77#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:48.77#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:48.77#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:37:48.77#ibcon#first serial, iclass 34, count 0 2006.230.01:37:48.77#ibcon#enter sib2, iclass 34, count 0 2006.230.01:37:48.77#ibcon#flushed, iclass 34, count 0 2006.230.01:37:48.77#ibcon#about to write, iclass 34, count 0 2006.230.01:37:48.77#ibcon#wrote, iclass 34, count 0 2006.230.01:37:48.77#ibcon#about to read 3, iclass 34, count 0 2006.230.01:37:48.79#ibcon#read 3, iclass 34, count 0 2006.230.01:37:48.79#ibcon#about to read 4, iclass 34, count 0 2006.230.01:37:48.79#ibcon#read 4, iclass 34, count 0 2006.230.01:37:48.79#ibcon#about to read 5, iclass 34, count 0 2006.230.01:37:48.79#ibcon#read 5, iclass 34, count 0 2006.230.01:37:48.79#ibcon#about to read 6, iclass 34, count 0 2006.230.01:37:48.79#ibcon#read 6, iclass 34, count 0 2006.230.01:37:48.79#ibcon#end of sib2, iclass 34, count 0 2006.230.01:37:48.79#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:37:48.79#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:37:48.79#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:37:48.79#ibcon#*before write, iclass 34, count 0 2006.230.01:37:48.79#ibcon#enter sib2, iclass 34, count 0 2006.230.01:37:48.79#ibcon#flushed, iclass 34, count 0 2006.230.01:37:48.79#ibcon#about to write, iclass 34, count 0 2006.230.01:37:48.79#ibcon#wrote, iclass 34, count 0 2006.230.01:37:48.79#ibcon#about to read 3, iclass 34, count 0 2006.230.01:37:48.83#ibcon#read 3, iclass 34, count 0 2006.230.01:37:48.83#ibcon#about to read 4, iclass 34, count 0 2006.230.01:37:48.83#ibcon#read 4, iclass 34, count 0 2006.230.01:37:48.83#ibcon#about to read 5, iclass 34, count 0 2006.230.01:37:48.83#ibcon#read 5, iclass 34, count 0 2006.230.01:37:48.83#ibcon#about to read 6, iclass 34, count 0 2006.230.01:37:48.83#ibcon#read 6, iclass 34, count 0 2006.230.01:37:48.83#ibcon#end of sib2, iclass 34, count 0 2006.230.01:37:48.83#ibcon#*after write, iclass 34, count 0 2006.230.01:37:48.83#ibcon#*before return 0, iclass 34, count 0 2006.230.01:37:48.83#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:48.83#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:48.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:37:48.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:37:48.83$vck44/va=5,4 2006.230.01:37:48.83#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.01:37:48.83#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.01:37:48.83#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:48.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:48.89#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:48.89#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:48.89#ibcon#enter wrdev, iclass 36, count 2 2006.230.01:37:48.89#ibcon#first serial, iclass 36, count 2 2006.230.01:37:48.89#ibcon#enter sib2, iclass 36, count 2 2006.230.01:37:48.89#ibcon#flushed, iclass 36, count 2 2006.230.01:37:48.89#ibcon#about to write, iclass 36, count 2 2006.230.01:37:48.89#ibcon#wrote, iclass 36, count 2 2006.230.01:37:48.89#ibcon#about to read 3, iclass 36, count 2 2006.230.01:37:48.91#ibcon#read 3, iclass 36, count 2 2006.230.01:37:48.91#ibcon#about to read 4, iclass 36, count 2 2006.230.01:37:48.91#ibcon#read 4, iclass 36, count 2 2006.230.01:37:48.91#ibcon#about to read 5, iclass 36, count 2 2006.230.01:37:48.91#ibcon#read 5, iclass 36, count 2 2006.230.01:37:48.91#ibcon#about to read 6, iclass 36, count 2 2006.230.01:37:48.91#ibcon#read 6, iclass 36, count 2 2006.230.01:37:48.91#ibcon#end of sib2, iclass 36, count 2 2006.230.01:37:48.91#ibcon#*mode == 0, iclass 36, count 2 2006.230.01:37:48.91#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.01:37:48.91#ibcon#[25=AT05-04\r\n] 2006.230.01:37:48.91#ibcon#*before write, iclass 36, count 2 2006.230.01:37:48.91#ibcon#enter sib2, iclass 36, count 2 2006.230.01:37:48.91#ibcon#flushed, iclass 36, count 2 2006.230.01:37:48.91#ibcon#about to write, iclass 36, count 2 2006.230.01:37:48.91#ibcon#wrote, iclass 36, count 2 2006.230.01:37:48.91#ibcon#about to read 3, iclass 36, count 2 2006.230.01:37:48.94#ibcon#read 3, iclass 36, count 2 2006.230.01:37:48.94#ibcon#about to read 4, iclass 36, count 2 2006.230.01:37:48.94#ibcon#read 4, iclass 36, count 2 2006.230.01:37:48.94#ibcon#about to read 5, iclass 36, count 2 2006.230.01:37:48.94#ibcon#read 5, iclass 36, count 2 2006.230.01:37:48.94#ibcon#about to read 6, iclass 36, count 2 2006.230.01:37:48.94#ibcon#read 6, iclass 36, count 2 2006.230.01:37:48.94#ibcon#end of sib2, iclass 36, count 2 2006.230.01:37:48.94#ibcon#*after write, iclass 36, count 2 2006.230.01:37:48.94#ibcon#*before return 0, iclass 36, count 2 2006.230.01:37:48.94#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:48.94#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:48.94#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.01:37:48.94#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:48.94#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:49.06#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:49.06#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:49.06#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:37:49.06#ibcon#first serial, iclass 36, count 0 2006.230.01:37:49.06#ibcon#enter sib2, iclass 36, count 0 2006.230.01:37:49.06#ibcon#flushed, iclass 36, count 0 2006.230.01:37:49.06#ibcon#about to write, iclass 36, count 0 2006.230.01:37:49.06#ibcon#wrote, iclass 36, count 0 2006.230.01:37:49.06#ibcon#about to read 3, iclass 36, count 0 2006.230.01:37:49.08#ibcon#read 3, iclass 36, count 0 2006.230.01:37:49.08#ibcon#about to read 4, iclass 36, count 0 2006.230.01:37:49.08#ibcon#read 4, iclass 36, count 0 2006.230.01:37:49.08#ibcon#about to read 5, iclass 36, count 0 2006.230.01:37:49.08#ibcon#read 5, iclass 36, count 0 2006.230.01:37:49.08#ibcon#about to read 6, iclass 36, count 0 2006.230.01:37:49.08#ibcon#read 6, iclass 36, count 0 2006.230.01:37:49.08#ibcon#end of sib2, iclass 36, count 0 2006.230.01:37:49.08#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:37:49.08#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:37:49.08#ibcon#[25=USB\r\n] 2006.230.01:37:49.08#ibcon#*before write, iclass 36, count 0 2006.230.01:37:49.08#ibcon#enter sib2, iclass 36, count 0 2006.230.01:37:49.08#ibcon#flushed, iclass 36, count 0 2006.230.01:37:49.08#ibcon#about to write, iclass 36, count 0 2006.230.01:37:49.08#ibcon#wrote, iclass 36, count 0 2006.230.01:37:49.08#ibcon#about to read 3, iclass 36, count 0 2006.230.01:37:49.11#ibcon#read 3, iclass 36, count 0 2006.230.01:37:49.11#ibcon#about to read 4, iclass 36, count 0 2006.230.01:37:49.11#ibcon#read 4, iclass 36, count 0 2006.230.01:37:49.11#ibcon#about to read 5, iclass 36, count 0 2006.230.01:37:49.11#ibcon#read 5, iclass 36, count 0 2006.230.01:37:49.11#ibcon#about to read 6, iclass 36, count 0 2006.230.01:37:49.11#ibcon#read 6, iclass 36, count 0 2006.230.01:37:49.11#ibcon#end of sib2, iclass 36, count 0 2006.230.01:37:49.11#ibcon#*after write, iclass 36, count 0 2006.230.01:37:49.11#ibcon#*before return 0, iclass 36, count 0 2006.230.01:37:49.11#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:49.11#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:49.11#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:37:49.11#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:37:49.11$vck44/valo=6,814.99 2006.230.01:37:49.11#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.01:37:49.11#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.01:37:49.11#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:49.11#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:49.11#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:49.11#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:49.11#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:37:49.11#ibcon#first serial, iclass 38, count 0 2006.230.01:37:49.11#ibcon#enter sib2, iclass 38, count 0 2006.230.01:37:49.11#ibcon#flushed, iclass 38, count 0 2006.230.01:37:49.11#ibcon#about to write, iclass 38, count 0 2006.230.01:37:49.11#ibcon#wrote, iclass 38, count 0 2006.230.01:37:49.11#ibcon#about to read 3, iclass 38, count 0 2006.230.01:37:49.13#ibcon#read 3, iclass 38, count 0 2006.230.01:37:49.13#ibcon#about to read 4, iclass 38, count 0 2006.230.01:37:49.13#ibcon#read 4, iclass 38, count 0 2006.230.01:37:49.13#ibcon#about to read 5, iclass 38, count 0 2006.230.01:37:49.13#ibcon#read 5, iclass 38, count 0 2006.230.01:37:49.13#ibcon#about to read 6, iclass 38, count 0 2006.230.01:37:49.13#ibcon#read 6, iclass 38, count 0 2006.230.01:37:49.13#ibcon#end of sib2, iclass 38, count 0 2006.230.01:37:49.13#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:37:49.13#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:37:49.13#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:37:49.13#ibcon#*before write, iclass 38, count 0 2006.230.01:37:49.13#ibcon#enter sib2, iclass 38, count 0 2006.230.01:37:49.13#ibcon#flushed, iclass 38, count 0 2006.230.01:37:49.13#ibcon#about to write, iclass 38, count 0 2006.230.01:37:49.13#ibcon#wrote, iclass 38, count 0 2006.230.01:37:49.13#ibcon#about to read 3, iclass 38, count 0 2006.230.01:37:49.17#ibcon#read 3, iclass 38, count 0 2006.230.01:37:49.17#ibcon#about to read 4, iclass 38, count 0 2006.230.01:37:49.17#ibcon#read 4, iclass 38, count 0 2006.230.01:37:49.17#ibcon#about to read 5, iclass 38, count 0 2006.230.01:37:49.17#ibcon#read 5, iclass 38, count 0 2006.230.01:37:49.17#ibcon#about to read 6, iclass 38, count 0 2006.230.01:37:49.17#ibcon#read 6, iclass 38, count 0 2006.230.01:37:49.17#ibcon#end of sib2, iclass 38, count 0 2006.230.01:37:49.17#ibcon#*after write, iclass 38, count 0 2006.230.01:37:49.17#ibcon#*before return 0, iclass 38, count 0 2006.230.01:37:49.17#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:49.17#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:49.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:37:49.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:37:49.17$vck44/va=6,4 2006.230.01:37:49.17#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.01:37:49.17#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.01:37:49.17#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:49.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:49.23#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:49.23#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:49.23#ibcon#enter wrdev, iclass 40, count 2 2006.230.01:37:49.23#ibcon#first serial, iclass 40, count 2 2006.230.01:37:49.23#ibcon#enter sib2, iclass 40, count 2 2006.230.01:37:49.23#ibcon#flushed, iclass 40, count 2 2006.230.01:37:49.23#ibcon#about to write, iclass 40, count 2 2006.230.01:37:49.23#ibcon#wrote, iclass 40, count 2 2006.230.01:37:49.23#ibcon#about to read 3, iclass 40, count 2 2006.230.01:37:49.25#ibcon#read 3, iclass 40, count 2 2006.230.01:37:49.25#ibcon#about to read 4, iclass 40, count 2 2006.230.01:37:49.25#ibcon#read 4, iclass 40, count 2 2006.230.01:37:49.25#ibcon#about to read 5, iclass 40, count 2 2006.230.01:37:49.25#ibcon#read 5, iclass 40, count 2 2006.230.01:37:49.25#ibcon#about to read 6, iclass 40, count 2 2006.230.01:37:49.25#ibcon#read 6, iclass 40, count 2 2006.230.01:37:49.25#ibcon#end of sib2, iclass 40, count 2 2006.230.01:37:49.25#ibcon#*mode == 0, iclass 40, count 2 2006.230.01:37:49.25#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.01:37:49.25#ibcon#[25=AT06-04\r\n] 2006.230.01:37:49.25#ibcon#*before write, iclass 40, count 2 2006.230.01:37:49.25#ibcon#enter sib2, iclass 40, count 2 2006.230.01:37:49.25#ibcon#flushed, iclass 40, count 2 2006.230.01:37:49.25#ibcon#about to write, iclass 40, count 2 2006.230.01:37:49.25#ibcon#wrote, iclass 40, count 2 2006.230.01:37:49.25#ibcon#about to read 3, iclass 40, count 2 2006.230.01:37:49.28#ibcon#read 3, iclass 40, count 2 2006.230.01:37:49.28#ibcon#about to read 4, iclass 40, count 2 2006.230.01:37:49.28#ibcon#read 4, iclass 40, count 2 2006.230.01:37:49.28#ibcon#about to read 5, iclass 40, count 2 2006.230.01:37:49.28#ibcon#read 5, iclass 40, count 2 2006.230.01:37:49.28#ibcon#about to read 6, iclass 40, count 2 2006.230.01:37:49.28#ibcon#read 6, iclass 40, count 2 2006.230.01:37:49.28#ibcon#end of sib2, iclass 40, count 2 2006.230.01:37:49.28#ibcon#*after write, iclass 40, count 2 2006.230.01:37:49.28#ibcon#*before return 0, iclass 40, count 2 2006.230.01:37:49.28#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:49.28#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:49.28#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.01:37:49.28#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:49.28#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:49.40#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:49.40#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:49.40#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:37:49.40#ibcon#first serial, iclass 40, count 0 2006.230.01:37:49.40#ibcon#enter sib2, iclass 40, count 0 2006.230.01:37:49.40#ibcon#flushed, iclass 40, count 0 2006.230.01:37:49.40#ibcon#about to write, iclass 40, count 0 2006.230.01:37:49.40#ibcon#wrote, iclass 40, count 0 2006.230.01:37:49.40#ibcon#about to read 3, iclass 40, count 0 2006.230.01:37:49.42#ibcon#read 3, iclass 40, count 0 2006.230.01:37:49.42#ibcon#about to read 4, iclass 40, count 0 2006.230.01:37:49.42#ibcon#read 4, iclass 40, count 0 2006.230.01:37:49.42#ibcon#about to read 5, iclass 40, count 0 2006.230.01:37:49.42#ibcon#read 5, iclass 40, count 0 2006.230.01:37:49.42#ibcon#about to read 6, iclass 40, count 0 2006.230.01:37:49.42#ibcon#read 6, iclass 40, count 0 2006.230.01:37:49.42#ibcon#end of sib2, iclass 40, count 0 2006.230.01:37:49.42#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:37:49.42#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:37:49.42#ibcon#[25=USB\r\n] 2006.230.01:37:49.42#ibcon#*before write, iclass 40, count 0 2006.230.01:37:49.42#ibcon#enter sib2, iclass 40, count 0 2006.230.01:37:49.42#ibcon#flushed, iclass 40, count 0 2006.230.01:37:49.42#ibcon#about to write, iclass 40, count 0 2006.230.01:37:49.42#ibcon#wrote, iclass 40, count 0 2006.230.01:37:49.42#ibcon#about to read 3, iclass 40, count 0 2006.230.01:37:49.45#ibcon#read 3, iclass 40, count 0 2006.230.01:37:49.45#ibcon#about to read 4, iclass 40, count 0 2006.230.01:37:49.45#ibcon#read 4, iclass 40, count 0 2006.230.01:37:49.45#ibcon#about to read 5, iclass 40, count 0 2006.230.01:37:49.45#ibcon#read 5, iclass 40, count 0 2006.230.01:37:49.45#ibcon#about to read 6, iclass 40, count 0 2006.230.01:37:49.45#ibcon#read 6, iclass 40, count 0 2006.230.01:37:49.45#ibcon#end of sib2, iclass 40, count 0 2006.230.01:37:49.45#ibcon#*after write, iclass 40, count 0 2006.230.01:37:49.45#ibcon#*before return 0, iclass 40, count 0 2006.230.01:37:49.45#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:49.45#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:49.45#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:37:49.45#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:37:49.45$vck44/valo=7,864.99 2006.230.01:37:49.45#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.01:37:49.45#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.01:37:49.45#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:49.45#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:49.45#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:49.45#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:49.45#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:37:49.45#ibcon#first serial, iclass 4, count 0 2006.230.01:37:49.45#ibcon#enter sib2, iclass 4, count 0 2006.230.01:37:49.45#ibcon#flushed, iclass 4, count 0 2006.230.01:37:49.45#ibcon#about to write, iclass 4, count 0 2006.230.01:37:49.45#ibcon#wrote, iclass 4, count 0 2006.230.01:37:49.45#ibcon#about to read 3, iclass 4, count 0 2006.230.01:37:49.47#ibcon#read 3, iclass 4, count 0 2006.230.01:37:49.47#ibcon#about to read 4, iclass 4, count 0 2006.230.01:37:49.47#ibcon#read 4, iclass 4, count 0 2006.230.01:37:49.47#ibcon#about to read 5, iclass 4, count 0 2006.230.01:37:49.47#ibcon#read 5, iclass 4, count 0 2006.230.01:37:49.47#ibcon#about to read 6, iclass 4, count 0 2006.230.01:37:49.47#ibcon#read 6, iclass 4, count 0 2006.230.01:37:49.47#ibcon#end of sib2, iclass 4, count 0 2006.230.01:37:49.47#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:37:49.47#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:37:49.47#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:37:49.47#ibcon#*before write, iclass 4, count 0 2006.230.01:37:49.47#ibcon#enter sib2, iclass 4, count 0 2006.230.01:37:49.47#ibcon#flushed, iclass 4, count 0 2006.230.01:37:49.47#ibcon#about to write, iclass 4, count 0 2006.230.01:37:49.47#ibcon#wrote, iclass 4, count 0 2006.230.01:37:49.47#ibcon#about to read 3, iclass 4, count 0 2006.230.01:37:49.51#ibcon#read 3, iclass 4, count 0 2006.230.01:37:49.51#ibcon#about to read 4, iclass 4, count 0 2006.230.01:37:49.51#ibcon#read 4, iclass 4, count 0 2006.230.01:37:49.51#ibcon#about to read 5, iclass 4, count 0 2006.230.01:37:49.51#ibcon#read 5, iclass 4, count 0 2006.230.01:37:49.51#ibcon#about to read 6, iclass 4, count 0 2006.230.01:37:49.51#ibcon#read 6, iclass 4, count 0 2006.230.01:37:49.51#ibcon#end of sib2, iclass 4, count 0 2006.230.01:37:49.51#ibcon#*after write, iclass 4, count 0 2006.230.01:37:49.51#ibcon#*before return 0, iclass 4, count 0 2006.230.01:37:49.51#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:49.51#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:49.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:37:49.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:37:49.51$vck44/va=7,5 2006.230.01:37:49.51#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.01:37:49.51#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.01:37:49.51#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:49.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:49.57#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:49.57#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:49.57#ibcon#enter wrdev, iclass 6, count 2 2006.230.01:37:49.57#ibcon#first serial, iclass 6, count 2 2006.230.01:37:49.57#ibcon#enter sib2, iclass 6, count 2 2006.230.01:37:49.57#ibcon#flushed, iclass 6, count 2 2006.230.01:37:49.57#ibcon#about to write, iclass 6, count 2 2006.230.01:37:49.57#ibcon#wrote, iclass 6, count 2 2006.230.01:37:49.57#ibcon#about to read 3, iclass 6, count 2 2006.230.01:37:49.59#ibcon#read 3, iclass 6, count 2 2006.230.01:37:49.59#ibcon#about to read 4, iclass 6, count 2 2006.230.01:37:49.59#ibcon#read 4, iclass 6, count 2 2006.230.01:37:49.59#ibcon#about to read 5, iclass 6, count 2 2006.230.01:37:49.59#ibcon#read 5, iclass 6, count 2 2006.230.01:37:49.59#ibcon#about to read 6, iclass 6, count 2 2006.230.01:37:49.59#ibcon#read 6, iclass 6, count 2 2006.230.01:37:49.59#ibcon#end of sib2, iclass 6, count 2 2006.230.01:37:49.59#ibcon#*mode == 0, iclass 6, count 2 2006.230.01:37:49.59#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.01:37:49.59#ibcon#[25=AT07-05\r\n] 2006.230.01:37:49.59#ibcon#*before write, iclass 6, count 2 2006.230.01:37:49.59#ibcon#enter sib2, iclass 6, count 2 2006.230.01:37:49.59#ibcon#flushed, iclass 6, count 2 2006.230.01:37:49.59#ibcon#about to write, iclass 6, count 2 2006.230.01:37:49.59#ibcon#wrote, iclass 6, count 2 2006.230.01:37:49.59#ibcon#about to read 3, iclass 6, count 2 2006.230.01:37:49.64#ibcon#read 3, iclass 6, count 2 2006.230.01:37:49.64#ibcon#about to read 4, iclass 6, count 2 2006.230.01:37:49.64#ibcon#read 4, iclass 6, count 2 2006.230.01:37:49.64#ibcon#about to read 5, iclass 6, count 2 2006.230.01:37:49.64#ibcon#read 5, iclass 6, count 2 2006.230.01:37:49.64#ibcon#about to read 6, iclass 6, count 2 2006.230.01:37:49.64#ibcon#read 6, iclass 6, count 2 2006.230.01:37:49.64#ibcon#end of sib2, iclass 6, count 2 2006.230.01:37:49.64#ibcon#*after write, iclass 6, count 2 2006.230.01:37:49.64#ibcon#*before return 0, iclass 6, count 2 2006.230.01:37:49.64#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:49.64#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:49.64#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.01:37:49.64#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:49.64#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:49.75#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:49.75#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:49.75#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:37:49.75#ibcon#first serial, iclass 6, count 0 2006.230.01:37:49.75#ibcon#enter sib2, iclass 6, count 0 2006.230.01:37:49.75#ibcon#flushed, iclass 6, count 0 2006.230.01:37:49.75#ibcon#about to write, iclass 6, count 0 2006.230.01:37:49.75#ibcon#wrote, iclass 6, count 0 2006.230.01:37:49.75#ibcon#about to read 3, iclass 6, count 0 2006.230.01:37:49.77#ibcon#read 3, iclass 6, count 0 2006.230.01:37:49.77#ibcon#about to read 4, iclass 6, count 0 2006.230.01:37:49.77#ibcon#read 4, iclass 6, count 0 2006.230.01:37:49.77#ibcon#about to read 5, iclass 6, count 0 2006.230.01:37:49.77#ibcon#read 5, iclass 6, count 0 2006.230.01:37:49.77#ibcon#about to read 6, iclass 6, count 0 2006.230.01:37:49.77#ibcon#read 6, iclass 6, count 0 2006.230.01:37:49.77#ibcon#end of sib2, iclass 6, count 0 2006.230.01:37:49.77#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:37:49.77#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:37:49.77#ibcon#[25=USB\r\n] 2006.230.01:37:49.77#ibcon#*before write, iclass 6, count 0 2006.230.01:37:49.77#ibcon#enter sib2, iclass 6, count 0 2006.230.01:37:49.77#ibcon#flushed, iclass 6, count 0 2006.230.01:37:49.77#ibcon#about to write, iclass 6, count 0 2006.230.01:37:49.77#ibcon#wrote, iclass 6, count 0 2006.230.01:37:49.77#ibcon#about to read 3, iclass 6, count 0 2006.230.01:37:49.80#ibcon#read 3, iclass 6, count 0 2006.230.01:37:49.80#ibcon#about to read 4, iclass 6, count 0 2006.230.01:37:49.80#ibcon#read 4, iclass 6, count 0 2006.230.01:37:49.80#ibcon#about to read 5, iclass 6, count 0 2006.230.01:37:49.80#ibcon#read 5, iclass 6, count 0 2006.230.01:37:49.80#ibcon#about to read 6, iclass 6, count 0 2006.230.01:37:49.80#ibcon#read 6, iclass 6, count 0 2006.230.01:37:49.80#ibcon#end of sib2, iclass 6, count 0 2006.230.01:37:49.80#ibcon#*after write, iclass 6, count 0 2006.230.01:37:49.80#ibcon#*before return 0, iclass 6, count 0 2006.230.01:37:49.80#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:49.80#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:49.80#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:37:49.80#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:37:49.80$vck44/valo=8,884.99 2006.230.01:37:49.80#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.01:37:49.80#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.01:37:49.80#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:49.80#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:49.80#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:49.80#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:49.80#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:37:49.80#ibcon#first serial, iclass 10, count 0 2006.230.01:37:49.80#ibcon#enter sib2, iclass 10, count 0 2006.230.01:37:49.80#ibcon#flushed, iclass 10, count 0 2006.230.01:37:49.80#ibcon#about to write, iclass 10, count 0 2006.230.01:37:49.80#ibcon#wrote, iclass 10, count 0 2006.230.01:37:49.80#ibcon#about to read 3, iclass 10, count 0 2006.230.01:37:49.82#ibcon#read 3, iclass 10, count 0 2006.230.01:37:49.82#ibcon#about to read 4, iclass 10, count 0 2006.230.01:37:49.82#ibcon#read 4, iclass 10, count 0 2006.230.01:37:49.82#ibcon#about to read 5, iclass 10, count 0 2006.230.01:37:49.82#ibcon#read 5, iclass 10, count 0 2006.230.01:37:49.82#ibcon#about to read 6, iclass 10, count 0 2006.230.01:37:49.82#ibcon#read 6, iclass 10, count 0 2006.230.01:37:49.82#ibcon#end of sib2, iclass 10, count 0 2006.230.01:37:49.82#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:37:49.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:37:49.82#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:37:49.82#ibcon#*before write, iclass 10, count 0 2006.230.01:37:49.82#ibcon#enter sib2, iclass 10, count 0 2006.230.01:37:49.82#ibcon#flushed, iclass 10, count 0 2006.230.01:37:49.82#ibcon#about to write, iclass 10, count 0 2006.230.01:37:49.82#ibcon#wrote, iclass 10, count 0 2006.230.01:37:49.82#ibcon#about to read 3, iclass 10, count 0 2006.230.01:37:49.86#ibcon#read 3, iclass 10, count 0 2006.230.01:37:49.86#ibcon#about to read 4, iclass 10, count 0 2006.230.01:37:49.86#ibcon#read 4, iclass 10, count 0 2006.230.01:37:49.86#ibcon#about to read 5, iclass 10, count 0 2006.230.01:37:49.86#ibcon#read 5, iclass 10, count 0 2006.230.01:37:49.86#ibcon#about to read 6, iclass 10, count 0 2006.230.01:37:49.86#ibcon#read 6, iclass 10, count 0 2006.230.01:37:49.86#ibcon#end of sib2, iclass 10, count 0 2006.230.01:37:49.86#ibcon#*after write, iclass 10, count 0 2006.230.01:37:49.86#ibcon#*before return 0, iclass 10, count 0 2006.230.01:37:49.86#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:49.86#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:49.86#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:37:49.86#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:37:49.86$vck44/va=8,6 2006.230.01:37:49.86#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.01:37:49.86#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.01:37:49.86#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:49.86#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:49.92#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:49.92#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:49.92#ibcon#enter wrdev, iclass 12, count 2 2006.230.01:37:49.92#ibcon#first serial, iclass 12, count 2 2006.230.01:37:49.92#ibcon#enter sib2, iclass 12, count 2 2006.230.01:37:49.92#ibcon#flushed, iclass 12, count 2 2006.230.01:37:49.92#ibcon#about to write, iclass 12, count 2 2006.230.01:37:49.92#ibcon#wrote, iclass 12, count 2 2006.230.01:37:49.92#ibcon#about to read 3, iclass 12, count 2 2006.230.01:37:49.94#ibcon#read 3, iclass 12, count 2 2006.230.01:37:49.94#ibcon#about to read 4, iclass 12, count 2 2006.230.01:37:49.94#ibcon#read 4, iclass 12, count 2 2006.230.01:37:49.94#ibcon#about to read 5, iclass 12, count 2 2006.230.01:37:49.94#ibcon#read 5, iclass 12, count 2 2006.230.01:37:49.94#ibcon#about to read 6, iclass 12, count 2 2006.230.01:37:49.94#ibcon#read 6, iclass 12, count 2 2006.230.01:37:49.94#ibcon#end of sib2, iclass 12, count 2 2006.230.01:37:49.94#ibcon#*mode == 0, iclass 12, count 2 2006.230.01:37:49.94#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.01:37:49.94#ibcon#[25=AT08-06\r\n] 2006.230.01:37:49.94#ibcon#*before write, iclass 12, count 2 2006.230.01:37:49.94#ibcon#enter sib2, iclass 12, count 2 2006.230.01:37:49.94#ibcon#flushed, iclass 12, count 2 2006.230.01:37:49.94#ibcon#about to write, iclass 12, count 2 2006.230.01:37:49.94#ibcon#wrote, iclass 12, count 2 2006.230.01:37:49.94#ibcon#about to read 3, iclass 12, count 2 2006.230.01:37:49.97#ibcon#read 3, iclass 12, count 2 2006.230.01:37:49.97#ibcon#about to read 4, iclass 12, count 2 2006.230.01:37:49.97#ibcon#read 4, iclass 12, count 2 2006.230.01:37:49.97#ibcon#about to read 5, iclass 12, count 2 2006.230.01:37:49.97#ibcon#read 5, iclass 12, count 2 2006.230.01:37:49.97#ibcon#about to read 6, iclass 12, count 2 2006.230.01:37:49.97#ibcon#read 6, iclass 12, count 2 2006.230.01:37:49.97#ibcon#end of sib2, iclass 12, count 2 2006.230.01:37:49.97#ibcon#*after write, iclass 12, count 2 2006.230.01:37:49.97#ibcon#*before return 0, iclass 12, count 2 2006.230.01:37:49.97#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:49.97#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:49.97#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.01:37:49.97#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:49.97#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:50.09#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:50.09#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:50.09#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:37:50.09#ibcon#first serial, iclass 12, count 0 2006.230.01:37:50.09#ibcon#enter sib2, iclass 12, count 0 2006.230.01:37:50.09#ibcon#flushed, iclass 12, count 0 2006.230.01:37:50.09#ibcon#about to write, iclass 12, count 0 2006.230.01:37:50.09#ibcon#wrote, iclass 12, count 0 2006.230.01:37:50.09#ibcon#about to read 3, iclass 12, count 0 2006.230.01:37:50.11#ibcon#read 3, iclass 12, count 0 2006.230.01:37:50.11#ibcon#about to read 4, iclass 12, count 0 2006.230.01:37:50.11#ibcon#read 4, iclass 12, count 0 2006.230.01:37:50.11#ibcon#about to read 5, iclass 12, count 0 2006.230.01:37:50.11#ibcon#read 5, iclass 12, count 0 2006.230.01:37:50.11#ibcon#about to read 6, iclass 12, count 0 2006.230.01:37:50.11#ibcon#read 6, iclass 12, count 0 2006.230.01:37:50.11#ibcon#end of sib2, iclass 12, count 0 2006.230.01:37:50.11#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:37:50.11#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:37:50.11#ibcon#[25=USB\r\n] 2006.230.01:37:50.11#ibcon#*before write, iclass 12, count 0 2006.230.01:37:50.11#ibcon#enter sib2, iclass 12, count 0 2006.230.01:37:50.11#ibcon#flushed, iclass 12, count 0 2006.230.01:37:50.11#ibcon#about to write, iclass 12, count 0 2006.230.01:37:50.11#ibcon#wrote, iclass 12, count 0 2006.230.01:37:50.11#ibcon#about to read 3, iclass 12, count 0 2006.230.01:37:50.14#ibcon#read 3, iclass 12, count 0 2006.230.01:37:50.14#ibcon#about to read 4, iclass 12, count 0 2006.230.01:37:50.14#ibcon#read 4, iclass 12, count 0 2006.230.01:37:50.14#ibcon#about to read 5, iclass 12, count 0 2006.230.01:37:50.14#ibcon#read 5, iclass 12, count 0 2006.230.01:37:50.14#ibcon#about to read 6, iclass 12, count 0 2006.230.01:37:50.14#ibcon#read 6, iclass 12, count 0 2006.230.01:37:50.14#ibcon#end of sib2, iclass 12, count 0 2006.230.01:37:50.14#ibcon#*after write, iclass 12, count 0 2006.230.01:37:50.14#ibcon#*before return 0, iclass 12, count 0 2006.230.01:37:50.14#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:50.14#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:50.14#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:37:50.14#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:37:50.14$vck44/vblo=1,629.99 2006.230.01:37:50.14#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:37:50.14#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:37:50.14#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:50.14#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:50.14#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:50.14#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:50.14#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:37:50.14#ibcon#first serial, iclass 14, count 0 2006.230.01:37:50.14#ibcon#enter sib2, iclass 14, count 0 2006.230.01:37:50.14#ibcon#flushed, iclass 14, count 0 2006.230.01:37:50.14#ibcon#about to write, iclass 14, count 0 2006.230.01:37:50.14#ibcon#wrote, iclass 14, count 0 2006.230.01:37:50.14#ibcon#about to read 3, iclass 14, count 0 2006.230.01:37:50.16#ibcon#read 3, iclass 14, count 0 2006.230.01:37:50.16#ibcon#about to read 4, iclass 14, count 0 2006.230.01:37:50.16#ibcon#read 4, iclass 14, count 0 2006.230.01:37:50.16#ibcon#about to read 5, iclass 14, count 0 2006.230.01:37:50.16#ibcon#read 5, iclass 14, count 0 2006.230.01:37:50.16#ibcon#about to read 6, iclass 14, count 0 2006.230.01:37:50.16#ibcon#read 6, iclass 14, count 0 2006.230.01:37:50.16#ibcon#end of sib2, iclass 14, count 0 2006.230.01:37:50.16#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:37:50.16#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:37:50.16#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:37:50.16#ibcon#*before write, iclass 14, count 0 2006.230.01:37:50.16#ibcon#enter sib2, iclass 14, count 0 2006.230.01:37:50.16#ibcon#flushed, iclass 14, count 0 2006.230.01:37:50.16#ibcon#about to write, iclass 14, count 0 2006.230.01:37:50.16#ibcon#wrote, iclass 14, count 0 2006.230.01:37:50.16#ibcon#about to read 3, iclass 14, count 0 2006.230.01:37:50.20#ibcon#read 3, iclass 14, count 0 2006.230.01:37:50.20#ibcon#about to read 4, iclass 14, count 0 2006.230.01:37:50.20#ibcon#read 4, iclass 14, count 0 2006.230.01:37:50.20#ibcon#about to read 5, iclass 14, count 0 2006.230.01:37:50.20#ibcon#read 5, iclass 14, count 0 2006.230.01:37:50.20#ibcon#about to read 6, iclass 14, count 0 2006.230.01:37:50.20#ibcon#read 6, iclass 14, count 0 2006.230.01:37:50.20#ibcon#end of sib2, iclass 14, count 0 2006.230.01:37:50.20#ibcon#*after write, iclass 14, count 0 2006.230.01:37:50.20#ibcon#*before return 0, iclass 14, count 0 2006.230.01:37:50.20#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:50.20#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:50.20#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:37:50.20#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:37:50.20$vck44/vb=1,4 2006.230.01:37:50.20#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.01:37:50.20#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.01:37:50.20#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:50.20#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:37:50.20#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:37:50.20#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:37:50.20#ibcon#enter wrdev, iclass 16, count 2 2006.230.01:37:50.20#ibcon#first serial, iclass 16, count 2 2006.230.01:37:50.20#ibcon#enter sib2, iclass 16, count 2 2006.230.01:37:50.20#ibcon#flushed, iclass 16, count 2 2006.230.01:37:50.20#ibcon#about to write, iclass 16, count 2 2006.230.01:37:50.20#ibcon#wrote, iclass 16, count 2 2006.230.01:37:50.20#ibcon#about to read 3, iclass 16, count 2 2006.230.01:37:50.22#ibcon#read 3, iclass 16, count 2 2006.230.01:37:50.22#ibcon#about to read 4, iclass 16, count 2 2006.230.01:37:50.22#ibcon#read 4, iclass 16, count 2 2006.230.01:37:50.22#ibcon#about to read 5, iclass 16, count 2 2006.230.01:37:50.22#ibcon#read 5, iclass 16, count 2 2006.230.01:37:50.22#ibcon#about to read 6, iclass 16, count 2 2006.230.01:37:50.22#ibcon#read 6, iclass 16, count 2 2006.230.01:37:50.22#ibcon#end of sib2, iclass 16, count 2 2006.230.01:37:50.22#ibcon#*mode == 0, iclass 16, count 2 2006.230.01:37:50.22#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.01:37:50.22#ibcon#[27=AT01-04\r\n] 2006.230.01:37:50.22#ibcon#*before write, iclass 16, count 2 2006.230.01:37:50.22#ibcon#enter sib2, iclass 16, count 2 2006.230.01:37:50.22#ibcon#flushed, iclass 16, count 2 2006.230.01:37:50.22#ibcon#about to write, iclass 16, count 2 2006.230.01:37:50.22#ibcon#wrote, iclass 16, count 2 2006.230.01:37:50.22#ibcon#about to read 3, iclass 16, count 2 2006.230.01:37:50.25#ibcon#read 3, iclass 16, count 2 2006.230.01:37:50.25#ibcon#about to read 4, iclass 16, count 2 2006.230.01:37:50.25#ibcon#read 4, iclass 16, count 2 2006.230.01:37:50.25#ibcon#about to read 5, iclass 16, count 2 2006.230.01:37:50.25#ibcon#read 5, iclass 16, count 2 2006.230.01:37:50.25#ibcon#about to read 6, iclass 16, count 2 2006.230.01:37:50.25#ibcon#read 6, iclass 16, count 2 2006.230.01:37:50.25#ibcon#end of sib2, iclass 16, count 2 2006.230.01:37:50.25#ibcon#*after write, iclass 16, count 2 2006.230.01:37:50.25#ibcon#*before return 0, iclass 16, count 2 2006.230.01:37:50.25#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:37:50.25#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:37:50.25#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.01:37:50.25#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:50.25#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:37:50.37#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:37:50.37#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:37:50.37#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:37:50.37#ibcon#first serial, iclass 16, count 0 2006.230.01:37:50.37#ibcon#enter sib2, iclass 16, count 0 2006.230.01:37:50.37#ibcon#flushed, iclass 16, count 0 2006.230.01:37:50.37#ibcon#about to write, iclass 16, count 0 2006.230.01:37:50.37#ibcon#wrote, iclass 16, count 0 2006.230.01:37:50.37#ibcon#about to read 3, iclass 16, count 0 2006.230.01:37:50.39#ibcon#read 3, iclass 16, count 0 2006.230.01:37:50.39#ibcon#about to read 4, iclass 16, count 0 2006.230.01:37:50.39#ibcon#read 4, iclass 16, count 0 2006.230.01:37:50.39#ibcon#about to read 5, iclass 16, count 0 2006.230.01:37:50.39#ibcon#read 5, iclass 16, count 0 2006.230.01:37:50.39#ibcon#about to read 6, iclass 16, count 0 2006.230.01:37:50.39#ibcon#read 6, iclass 16, count 0 2006.230.01:37:50.39#ibcon#end of sib2, iclass 16, count 0 2006.230.01:37:50.39#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:37:50.39#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:37:50.39#ibcon#[27=USB\r\n] 2006.230.01:37:50.39#ibcon#*before write, iclass 16, count 0 2006.230.01:37:50.39#ibcon#enter sib2, iclass 16, count 0 2006.230.01:37:50.39#ibcon#flushed, iclass 16, count 0 2006.230.01:37:50.39#ibcon#about to write, iclass 16, count 0 2006.230.01:37:50.39#ibcon#wrote, iclass 16, count 0 2006.230.01:37:50.39#ibcon#about to read 3, iclass 16, count 0 2006.230.01:37:50.42#ibcon#read 3, iclass 16, count 0 2006.230.01:37:50.42#ibcon#about to read 4, iclass 16, count 0 2006.230.01:37:50.42#ibcon#read 4, iclass 16, count 0 2006.230.01:37:50.42#ibcon#about to read 5, iclass 16, count 0 2006.230.01:37:50.42#ibcon#read 5, iclass 16, count 0 2006.230.01:37:50.42#ibcon#about to read 6, iclass 16, count 0 2006.230.01:37:50.42#ibcon#read 6, iclass 16, count 0 2006.230.01:37:50.42#ibcon#end of sib2, iclass 16, count 0 2006.230.01:37:50.42#ibcon#*after write, iclass 16, count 0 2006.230.01:37:50.42#ibcon#*before return 0, iclass 16, count 0 2006.230.01:37:50.42#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:37:50.42#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:37:50.42#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:37:50.42#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:37:50.42$vck44/vblo=2,634.99 2006.230.01:37:50.42#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:37:50.42#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:37:50.42#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:50.42#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:50.42#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:50.42#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:50.42#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:37:50.42#ibcon#first serial, iclass 18, count 0 2006.230.01:37:50.42#ibcon#enter sib2, iclass 18, count 0 2006.230.01:37:50.42#ibcon#flushed, iclass 18, count 0 2006.230.01:37:50.42#ibcon#about to write, iclass 18, count 0 2006.230.01:37:50.42#ibcon#wrote, iclass 18, count 0 2006.230.01:37:50.42#ibcon#about to read 3, iclass 18, count 0 2006.230.01:37:50.44#ibcon#read 3, iclass 18, count 0 2006.230.01:37:50.44#ibcon#about to read 4, iclass 18, count 0 2006.230.01:37:50.44#ibcon#read 4, iclass 18, count 0 2006.230.01:37:50.44#ibcon#about to read 5, iclass 18, count 0 2006.230.01:37:50.44#ibcon#read 5, iclass 18, count 0 2006.230.01:37:50.44#ibcon#about to read 6, iclass 18, count 0 2006.230.01:37:50.44#ibcon#read 6, iclass 18, count 0 2006.230.01:37:50.44#ibcon#end of sib2, iclass 18, count 0 2006.230.01:37:50.44#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:37:50.44#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:37:50.44#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:37:50.44#ibcon#*before write, iclass 18, count 0 2006.230.01:37:50.44#ibcon#enter sib2, iclass 18, count 0 2006.230.01:37:50.44#ibcon#flushed, iclass 18, count 0 2006.230.01:37:50.44#ibcon#about to write, iclass 18, count 0 2006.230.01:37:50.44#ibcon#wrote, iclass 18, count 0 2006.230.01:37:50.44#ibcon#about to read 3, iclass 18, count 0 2006.230.01:37:50.48#ibcon#read 3, iclass 18, count 0 2006.230.01:37:50.48#ibcon#about to read 4, iclass 18, count 0 2006.230.01:37:50.48#ibcon#read 4, iclass 18, count 0 2006.230.01:37:50.48#ibcon#about to read 5, iclass 18, count 0 2006.230.01:37:50.48#ibcon#read 5, iclass 18, count 0 2006.230.01:37:50.48#ibcon#about to read 6, iclass 18, count 0 2006.230.01:37:50.48#ibcon#read 6, iclass 18, count 0 2006.230.01:37:50.48#ibcon#end of sib2, iclass 18, count 0 2006.230.01:37:50.48#ibcon#*after write, iclass 18, count 0 2006.230.01:37:50.48#ibcon#*before return 0, iclass 18, count 0 2006.230.01:37:50.48#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:50.48#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:37:50.48#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:37:50.48#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:37:50.48$vck44/vb=2,4 2006.230.01:37:50.48#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.01:37:50.48#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.01:37:50.48#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:50.48#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:50.54#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:50.54#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:50.54#ibcon#enter wrdev, iclass 20, count 2 2006.230.01:37:50.54#ibcon#first serial, iclass 20, count 2 2006.230.01:37:50.54#ibcon#enter sib2, iclass 20, count 2 2006.230.01:37:50.54#ibcon#flushed, iclass 20, count 2 2006.230.01:37:50.54#ibcon#about to write, iclass 20, count 2 2006.230.01:37:50.54#ibcon#wrote, iclass 20, count 2 2006.230.01:37:50.54#ibcon#about to read 3, iclass 20, count 2 2006.230.01:37:50.56#ibcon#read 3, iclass 20, count 2 2006.230.01:37:50.56#ibcon#about to read 4, iclass 20, count 2 2006.230.01:37:50.56#ibcon#read 4, iclass 20, count 2 2006.230.01:37:50.56#ibcon#about to read 5, iclass 20, count 2 2006.230.01:37:50.56#ibcon#read 5, iclass 20, count 2 2006.230.01:37:50.56#ibcon#about to read 6, iclass 20, count 2 2006.230.01:37:50.56#ibcon#read 6, iclass 20, count 2 2006.230.01:37:50.56#ibcon#end of sib2, iclass 20, count 2 2006.230.01:37:50.56#ibcon#*mode == 0, iclass 20, count 2 2006.230.01:37:50.56#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.01:37:50.56#ibcon#[27=AT02-04\r\n] 2006.230.01:37:50.56#ibcon#*before write, iclass 20, count 2 2006.230.01:37:50.56#ibcon#enter sib2, iclass 20, count 2 2006.230.01:37:50.56#ibcon#flushed, iclass 20, count 2 2006.230.01:37:50.56#ibcon#about to write, iclass 20, count 2 2006.230.01:37:50.56#ibcon#wrote, iclass 20, count 2 2006.230.01:37:50.56#ibcon#about to read 3, iclass 20, count 2 2006.230.01:37:50.59#ibcon#read 3, iclass 20, count 2 2006.230.01:37:50.59#ibcon#about to read 4, iclass 20, count 2 2006.230.01:37:50.59#ibcon#read 4, iclass 20, count 2 2006.230.01:37:50.59#ibcon#about to read 5, iclass 20, count 2 2006.230.01:37:50.59#ibcon#read 5, iclass 20, count 2 2006.230.01:37:50.59#ibcon#about to read 6, iclass 20, count 2 2006.230.01:37:50.59#ibcon#read 6, iclass 20, count 2 2006.230.01:37:50.59#ibcon#end of sib2, iclass 20, count 2 2006.230.01:37:50.59#ibcon#*after write, iclass 20, count 2 2006.230.01:37:50.59#ibcon#*before return 0, iclass 20, count 2 2006.230.01:37:50.59#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:50.59#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:37:50.59#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.01:37:50.59#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:50.59#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:50.71#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:50.71#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:50.71#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:37:50.71#ibcon#first serial, iclass 20, count 0 2006.230.01:37:50.71#ibcon#enter sib2, iclass 20, count 0 2006.230.01:37:50.71#ibcon#flushed, iclass 20, count 0 2006.230.01:37:50.71#ibcon#about to write, iclass 20, count 0 2006.230.01:37:50.71#ibcon#wrote, iclass 20, count 0 2006.230.01:37:50.71#ibcon#about to read 3, iclass 20, count 0 2006.230.01:37:50.73#ibcon#read 3, iclass 20, count 0 2006.230.01:37:50.73#ibcon#about to read 4, iclass 20, count 0 2006.230.01:37:50.73#ibcon#read 4, iclass 20, count 0 2006.230.01:37:50.73#ibcon#about to read 5, iclass 20, count 0 2006.230.01:37:50.73#ibcon#read 5, iclass 20, count 0 2006.230.01:37:50.73#ibcon#about to read 6, iclass 20, count 0 2006.230.01:37:50.73#ibcon#read 6, iclass 20, count 0 2006.230.01:37:50.73#ibcon#end of sib2, iclass 20, count 0 2006.230.01:37:50.73#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:37:50.73#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:37:50.73#ibcon#[27=USB\r\n] 2006.230.01:37:50.73#ibcon#*before write, iclass 20, count 0 2006.230.01:37:50.73#ibcon#enter sib2, iclass 20, count 0 2006.230.01:37:50.73#ibcon#flushed, iclass 20, count 0 2006.230.01:37:50.73#ibcon#about to write, iclass 20, count 0 2006.230.01:37:50.73#ibcon#wrote, iclass 20, count 0 2006.230.01:37:50.73#ibcon#about to read 3, iclass 20, count 0 2006.230.01:37:50.76#ibcon#read 3, iclass 20, count 0 2006.230.01:37:50.76#ibcon#about to read 4, iclass 20, count 0 2006.230.01:37:50.76#ibcon#read 4, iclass 20, count 0 2006.230.01:37:50.76#ibcon#about to read 5, iclass 20, count 0 2006.230.01:37:50.76#ibcon#read 5, iclass 20, count 0 2006.230.01:37:50.76#ibcon#about to read 6, iclass 20, count 0 2006.230.01:37:50.76#ibcon#read 6, iclass 20, count 0 2006.230.01:37:50.76#ibcon#end of sib2, iclass 20, count 0 2006.230.01:37:50.76#ibcon#*after write, iclass 20, count 0 2006.230.01:37:50.76#ibcon#*before return 0, iclass 20, count 0 2006.230.01:37:50.76#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:50.76#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:37:50.76#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:37:50.76#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:37:50.76$vck44/vblo=3,649.99 2006.230.01:37:50.76#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.01:37:50.76#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.01:37:50.76#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:50.76#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:37:50.76#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:37:50.76#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:37:50.76#ibcon#enter wrdev, iclass 23, count 0 2006.230.01:37:50.76#ibcon#first serial, iclass 23, count 0 2006.230.01:37:50.76#ibcon#enter sib2, iclass 23, count 0 2006.230.01:37:50.76#ibcon#flushed, iclass 23, count 0 2006.230.01:37:50.76#ibcon#about to write, iclass 23, count 0 2006.230.01:37:50.76#ibcon#wrote, iclass 23, count 0 2006.230.01:37:50.76#ibcon#about to read 3, iclass 23, count 0 2006.230.01:37:50.78#ibcon#read 3, iclass 23, count 0 2006.230.01:37:50.78#ibcon#about to read 4, iclass 23, count 0 2006.230.01:37:50.78#ibcon#read 4, iclass 23, count 0 2006.230.01:37:50.78#ibcon#about to read 5, iclass 23, count 0 2006.230.01:37:50.78#ibcon#read 5, iclass 23, count 0 2006.230.01:37:50.78#ibcon#about to read 6, iclass 23, count 0 2006.230.01:37:50.78#ibcon#read 6, iclass 23, count 0 2006.230.01:37:50.78#ibcon#end of sib2, iclass 23, count 0 2006.230.01:37:50.78#ibcon#*mode == 0, iclass 23, count 0 2006.230.01:37:50.78#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.01:37:50.78#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:37:50.78#ibcon#*before write, iclass 23, count 0 2006.230.01:37:50.78#ibcon#enter sib2, iclass 23, count 0 2006.230.01:37:50.78#ibcon#flushed, iclass 23, count 0 2006.230.01:37:50.78#ibcon#about to write, iclass 23, count 0 2006.230.01:37:50.78#ibcon#wrote, iclass 23, count 0 2006.230.01:37:50.78#ibcon#about to read 3, iclass 23, count 0 2006.230.01:37:50.79#abcon#<5=/09 2.3 6.1 32.82 691002.6\r\n> 2006.230.01:37:50.81#abcon#{5=INTERFACE CLEAR} 2006.230.01:37:50.82#ibcon#read 3, iclass 23, count 0 2006.230.01:37:50.82#ibcon#about to read 4, iclass 23, count 0 2006.230.01:37:50.82#ibcon#read 4, iclass 23, count 0 2006.230.01:37:50.82#ibcon#about to read 5, iclass 23, count 0 2006.230.01:37:50.82#ibcon#read 5, iclass 23, count 0 2006.230.01:37:50.82#ibcon#about to read 6, iclass 23, count 0 2006.230.01:37:50.82#ibcon#read 6, iclass 23, count 0 2006.230.01:37:50.82#ibcon#end of sib2, iclass 23, count 0 2006.230.01:37:50.82#ibcon#*after write, iclass 23, count 0 2006.230.01:37:50.82#ibcon#*before return 0, iclass 23, count 0 2006.230.01:37:50.82#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:37:50.82#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:37:50.82#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.01:37:50.82#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.01:37:50.82$vck44/vb=3,4 2006.230.01:37:50.82#ibcon#iclass 27 nclrec 2 cls_cnt 3 2006.230.01:37:50.82#ibcon#iclass 27 iclrec 1 cls_cnt 3 2006.230.01:37:50.82#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:50.82#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:37:50.87#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:37:50.88#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:37:50.88#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:37:50.88#ibcon#enter wrdev, iclass 27, count 2 2006.230.01:37:50.88#ibcon#first serial, iclass 27, count 2 2006.230.01:37:50.88#ibcon#enter sib2, iclass 27, count 2 2006.230.01:37:50.88#ibcon#flushed, iclass 27, count 2 2006.230.01:37:50.88#ibcon#about to write, iclass 27, count 2 2006.230.01:37:50.88#ibcon#wrote, iclass 27, count 2 2006.230.01:37:50.88#ibcon#about to read 3, iclass 27, count 2 2006.230.01:37:50.90#ibcon#read 3, iclass 27, count 2 2006.230.01:37:50.90#ibcon#about to read 4, iclass 27, count 2 2006.230.01:37:50.90#ibcon#read 4, iclass 27, count 2 2006.230.01:37:50.90#ibcon#about to read 5, iclass 27, count 2 2006.230.01:37:50.90#ibcon#read 5, iclass 27, count 2 2006.230.01:37:50.90#ibcon#about to read 6, iclass 27, count 2 2006.230.01:37:50.90#ibcon#read 6, iclass 27, count 2 2006.230.01:37:50.90#ibcon#end of sib2, iclass 27, count 2 2006.230.01:37:50.90#ibcon#*mode == 0, iclass 27, count 2 2006.230.01:37:50.90#ibcon#*mode == 0 && serial, iclass 27, count 2 2006.230.01:37:50.90#ibcon#[27=AT03-04\r\n] 2006.230.01:37:50.90#ibcon#*before write, iclass 27, count 2 2006.230.01:37:50.90#ibcon#enter sib2, iclass 27, count 2 2006.230.01:37:50.90#ibcon#flushed, iclass 27, count 2 2006.230.01:37:50.90#ibcon#about to write, iclass 27, count 2 2006.230.01:37:50.90#ibcon#wrote, iclass 27, count 2 2006.230.01:37:50.90#ibcon#about to read 3, iclass 27, count 2 2006.230.01:37:50.93#ibcon#read 3, iclass 27, count 2 2006.230.01:37:50.93#ibcon#about to read 4, iclass 27, count 2 2006.230.01:37:50.93#ibcon#read 4, iclass 27, count 2 2006.230.01:37:50.93#ibcon#about to read 5, iclass 27, count 2 2006.230.01:37:50.93#ibcon#read 5, iclass 27, count 2 2006.230.01:37:50.93#ibcon#about to read 6, iclass 27, count 2 2006.230.01:37:50.93#ibcon#read 6, iclass 27, count 2 2006.230.01:37:50.93#ibcon#end of sib2, iclass 27, count 2 2006.230.01:37:50.93#ibcon#*after write, iclass 27, count 2 2006.230.01:37:50.93#ibcon#*before return 0, iclass 27, count 2 2006.230.01:37:50.93#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:37:50.93#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 2 2006.230.01:37:50.93#ibcon#iclass 27 iclrec 2 cls_cnt 2 2006.230.01:37:50.93#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:50.93#ibcon#before find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:37:51.05#ibcon#after find_delay mode 2, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:37:51.05#ibcon#before mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:37:51.05#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:37:51.05#ibcon#first serial, iclass 27, count 0 2006.230.01:37:51.05#ibcon#enter sib2, iclass 27, count 0 2006.230.01:37:51.05#ibcon#flushed, iclass 27, count 0 2006.230.01:37:51.05#ibcon#about to write, iclass 27, count 0 2006.230.01:37:51.05#ibcon#wrote, iclass 27, count 0 2006.230.01:37:51.05#ibcon#about to read 3, iclass 27, count 0 2006.230.01:37:51.07#ibcon#read 3, iclass 27, count 0 2006.230.01:37:51.07#ibcon#about to read 4, iclass 27, count 0 2006.230.01:37:51.07#ibcon#read 4, iclass 27, count 0 2006.230.01:37:51.07#ibcon#about to read 5, iclass 27, count 0 2006.230.01:37:51.07#ibcon#read 5, iclass 27, count 0 2006.230.01:37:51.07#ibcon#about to read 6, iclass 27, count 0 2006.230.01:37:51.07#ibcon#read 6, iclass 27, count 0 2006.230.01:37:51.07#ibcon#end of sib2, iclass 27, count 0 2006.230.01:37:51.07#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:37:51.07#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:37:51.07#ibcon#[27=USB\r\n] 2006.230.01:37:51.07#ibcon#*before write, iclass 27, count 0 2006.230.01:37:51.07#ibcon#enter sib2, iclass 27, count 0 2006.230.01:37:51.07#ibcon#flushed, iclass 27, count 0 2006.230.01:37:51.07#ibcon#about to write, iclass 27, count 0 2006.230.01:37:51.07#ibcon#wrote, iclass 27, count 0 2006.230.01:37:51.07#ibcon#about to read 3, iclass 27, count 0 2006.230.01:37:51.10#ibcon#read 3, iclass 27, count 0 2006.230.01:37:51.10#ibcon#about to read 4, iclass 27, count 0 2006.230.01:37:51.10#ibcon#read 4, iclass 27, count 0 2006.230.01:37:51.10#ibcon#about to read 5, iclass 27, count 0 2006.230.01:37:51.10#ibcon#read 5, iclass 27, count 0 2006.230.01:37:51.10#ibcon#about to read 6, iclass 27, count 0 2006.230.01:37:51.10#ibcon#read 6, iclass 27, count 0 2006.230.01:37:51.10#ibcon#end of sib2, iclass 27, count 0 2006.230.01:37:51.10#ibcon#*after write, iclass 27, count 0 2006.230.01:37:51.10#ibcon#*before return 0, iclass 27, count 0 2006.230.01:37:51.10#ibcon#after mode 2 write, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:37:51.10#ibcon#end of loop, iclass 27 iclrec 2 cls_cnt 0 2006.230.01:37:51.10#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:37:51.10#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:37:51.10$vck44/vblo=4,679.99 2006.230.01:37:51.10#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.01:37:51.10#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.01:37:51.10#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:51.10#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:51.10#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:51.10#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:51.10#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:37:51.10#ibcon#first serial, iclass 30, count 0 2006.230.01:37:51.10#ibcon#enter sib2, iclass 30, count 0 2006.230.01:37:51.10#ibcon#flushed, iclass 30, count 0 2006.230.01:37:51.10#ibcon#about to write, iclass 30, count 0 2006.230.01:37:51.10#ibcon#wrote, iclass 30, count 0 2006.230.01:37:51.10#ibcon#about to read 3, iclass 30, count 0 2006.230.01:37:51.12#ibcon#read 3, iclass 30, count 0 2006.230.01:37:51.12#ibcon#about to read 4, iclass 30, count 0 2006.230.01:37:51.12#ibcon#read 4, iclass 30, count 0 2006.230.01:37:51.12#ibcon#about to read 5, iclass 30, count 0 2006.230.01:37:51.12#ibcon#read 5, iclass 30, count 0 2006.230.01:37:51.12#ibcon#about to read 6, iclass 30, count 0 2006.230.01:37:51.12#ibcon#read 6, iclass 30, count 0 2006.230.01:37:51.12#ibcon#end of sib2, iclass 30, count 0 2006.230.01:37:51.12#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:37:51.12#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:37:51.12#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:37:51.12#ibcon#*before write, iclass 30, count 0 2006.230.01:37:51.12#ibcon#enter sib2, iclass 30, count 0 2006.230.01:37:51.12#ibcon#flushed, iclass 30, count 0 2006.230.01:37:51.12#ibcon#about to write, iclass 30, count 0 2006.230.01:37:51.12#ibcon#wrote, iclass 30, count 0 2006.230.01:37:51.12#ibcon#about to read 3, iclass 30, count 0 2006.230.01:37:51.16#ibcon#read 3, iclass 30, count 0 2006.230.01:37:51.16#ibcon#about to read 4, iclass 30, count 0 2006.230.01:37:51.16#ibcon#read 4, iclass 30, count 0 2006.230.01:37:51.16#ibcon#about to read 5, iclass 30, count 0 2006.230.01:37:51.16#ibcon#read 5, iclass 30, count 0 2006.230.01:37:51.16#ibcon#about to read 6, iclass 30, count 0 2006.230.01:37:51.16#ibcon#read 6, iclass 30, count 0 2006.230.01:37:51.16#ibcon#end of sib2, iclass 30, count 0 2006.230.01:37:51.16#ibcon#*after write, iclass 30, count 0 2006.230.01:37:51.16#ibcon#*before return 0, iclass 30, count 0 2006.230.01:37:51.16#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:51.16#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:37:51.16#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:37:51.16#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:37:51.16$vck44/vb=4,4 2006.230.01:37:51.16#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.01:37:51.16#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.01:37:51.16#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:51.16#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:51.22#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:51.22#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:51.22#ibcon#enter wrdev, iclass 32, count 2 2006.230.01:37:51.22#ibcon#first serial, iclass 32, count 2 2006.230.01:37:51.22#ibcon#enter sib2, iclass 32, count 2 2006.230.01:37:51.22#ibcon#flushed, iclass 32, count 2 2006.230.01:37:51.22#ibcon#about to write, iclass 32, count 2 2006.230.01:37:51.22#ibcon#wrote, iclass 32, count 2 2006.230.01:37:51.22#ibcon#about to read 3, iclass 32, count 2 2006.230.01:37:51.24#ibcon#read 3, iclass 32, count 2 2006.230.01:37:51.24#ibcon#about to read 4, iclass 32, count 2 2006.230.01:37:51.24#ibcon#read 4, iclass 32, count 2 2006.230.01:37:51.24#ibcon#about to read 5, iclass 32, count 2 2006.230.01:37:51.24#ibcon#read 5, iclass 32, count 2 2006.230.01:37:51.24#ibcon#about to read 6, iclass 32, count 2 2006.230.01:37:51.24#ibcon#read 6, iclass 32, count 2 2006.230.01:37:51.24#ibcon#end of sib2, iclass 32, count 2 2006.230.01:37:51.24#ibcon#*mode == 0, iclass 32, count 2 2006.230.01:37:51.24#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.01:37:51.24#ibcon#[27=AT04-04\r\n] 2006.230.01:37:51.24#ibcon#*before write, iclass 32, count 2 2006.230.01:37:51.24#ibcon#enter sib2, iclass 32, count 2 2006.230.01:37:51.24#ibcon#flushed, iclass 32, count 2 2006.230.01:37:51.24#ibcon#about to write, iclass 32, count 2 2006.230.01:37:51.24#ibcon#wrote, iclass 32, count 2 2006.230.01:37:51.24#ibcon#about to read 3, iclass 32, count 2 2006.230.01:37:51.27#ibcon#read 3, iclass 32, count 2 2006.230.01:37:51.27#ibcon#about to read 4, iclass 32, count 2 2006.230.01:37:51.27#ibcon#read 4, iclass 32, count 2 2006.230.01:37:51.27#ibcon#about to read 5, iclass 32, count 2 2006.230.01:37:51.27#ibcon#read 5, iclass 32, count 2 2006.230.01:37:51.27#ibcon#about to read 6, iclass 32, count 2 2006.230.01:37:51.27#ibcon#read 6, iclass 32, count 2 2006.230.01:37:51.27#ibcon#end of sib2, iclass 32, count 2 2006.230.01:37:51.27#ibcon#*after write, iclass 32, count 2 2006.230.01:37:51.27#ibcon#*before return 0, iclass 32, count 2 2006.230.01:37:51.27#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:51.27#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:37:51.27#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.01:37:51.27#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:51.27#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:51.39#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:51.39#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:51.39#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:37:51.39#ibcon#first serial, iclass 32, count 0 2006.230.01:37:51.39#ibcon#enter sib2, iclass 32, count 0 2006.230.01:37:51.39#ibcon#flushed, iclass 32, count 0 2006.230.01:37:51.39#ibcon#about to write, iclass 32, count 0 2006.230.01:37:51.39#ibcon#wrote, iclass 32, count 0 2006.230.01:37:51.39#ibcon#about to read 3, iclass 32, count 0 2006.230.01:37:51.41#ibcon#read 3, iclass 32, count 0 2006.230.01:37:51.41#ibcon#about to read 4, iclass 32, count 0 2006.230.01:37:51.41#ibcon#read 4, iclass 32, count 0 2006.230.01:37:51.41#ibcon#about to read 5, iclass 32, count 0 2006.230.01:37:51.41#ibcon#read 5, iclass 32, count 0 2006.230.01:37:51.41#ibcon#about to read 6, iclass 32, count 0 2006.230.01:37:51.41#ibcon#read 6, iclass 32, count 0 2006.230.01:37:51.41#ibcon#end of sib2, iclass 32, count 0 2006.230.01:37:51.41#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:37:51.41#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:37:51.41#ibcon#[27=USB\r\n] 2006.230.01:37:51.41#ibcon#*before write, iclass 32, count 0 2006.230.01:37:51.41#ibcon#enter sib2, iclass 32, count 0 2006.230.01:37:51.41#ibcon#flushed, iclass 32, count 0 2006.230.01:37:51.41#ibcon#about to write, iclass 32, count 0 2006.230.01:37:51.41#ibcon#wrote, iclass 32, count 0 2006.230.01:37:51.41#ibcon#about to read 3, iclass 32, count 0 2006.230.01:37:51.44#ibcon#read 3, iclass 32, count 0 2006.230.01:37:51.44#ibcon#about to read 4, iclass 32, count 0 2006.230.01:37:51.44#ibcon#read 4, iclass 32, count 0 2006.230.01:37:51.44#ibcon#about to read 5, iclass 32, count 0 2006.230.01:37:51.44#ibcon#read 5, iclass 32, count 0 2006.230.01:37:51.44#ibcon#about to read 6, iclass 32, count 0 2006.230.01:37:51.44#ibcon#read 6, iclass 32, count 0 2006.230.01:37:51.44#ibcon#end of sib2, iclass 32, count 0 2006.230.01:37:51.44#ibcon#*after write, iclass 32, count 0 2006.230.01:37:51.44#ibcon#*before return 0, iclass 32, count 0 2006.230.01:37:51.44#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:51.44#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:37:51.44#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:37:51.44#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:37:51.44$vck44/vblo=5,709.99 2006.230.01:37:51.44#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:37:51.44#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:37:51.44#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:51.44#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:51.44#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:51.44#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:51.44#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:37:51.44#ibcon#first serial, iclass 34, count 0 2006.230.01:37:51.44#ibcon#enter sib2, iclass 34, count 0 2006.230.01:37:51.44#ibcon#flushed, iclass 34, count 0 2006.230.01:37:51.44#ibcon#about to write, iclass 34, count 0 2006.230.01:37:51.44#ibcon#wrote, iclass 34, count 0 2006.230.01:37:51.44#ibcon#about to read 3, iclass 34, count 0 2006.230.01:37:51.46#ibcon#read 3, iclass 34, count 0 2006.230.01:37:51.46#ibcon#about to read 4, iclass 34, count 0 2006.230.01:37:51.46#ibcon#read 4, iclass 34, count 0 2006.230.01:37:51.46#ibcon#about to read 5, iclass 34, count 0 2006.230.01:37:51.46#ibcon#read 5, iclass 34, count 0 2006.230.01:37:51.46#ibcon#about to read 6, iclass 34, count 0 2006.230.01:37:51.46#ibcon#read 6, iclass 34, count 0 2006.230.01:37:51.46#ibcon#end of sib2, iclass 34, count 0 2006.230.01:37:51.46#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:37:51.46#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:37:51.46#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:37:51.46#ibcon#*before write, iclass 34, count 0 2006.230.01:37:51.46#ibcon#enter sib2, iclass 34, count 0 2006.230.01:37:51.46#ibcon#flushed, iclass 34, count 0 2006.230.01:37:51.46#ibcon#about to write, iclass 34, count 0 2006.230.01:37:51.46#ibcon#wrote, iclass 34, count 0 2006.230.01:37:51.46#ibcon#about to read 3, iclass 34, count 0 2006.230.01:37:51.50#ibcon#read 3, iclass 34, count 0 2006.230.01:37:51.50#ibcon#about to read 4, iclass 34, count 0 2006.230.01:37:51.50#ibcon#read 4, iclass 34, count 0 2006.230.01:37:51.50#ibcon#about to read 5, iclass 34, count 0 2006.230.01:37:51.50#ibcon#read 5, iclass 34, count 0 2006.230.01:37:51.50#ibcon#about to read 6, iclass 34, count 0 2006.230.01:37:51.50#ibcon#read 6, iclass 34, count 0 2006.230.01:37:51.50#ibcon#end of sib2, iclass 34, count 0 2006.230.01:37:51.50#ibcon#*after write, iclass 34, count 0 2006.230.01:37:51.50#ibcon#*before return 0, iclass 34, count 0 2006.230.01:37:51.50#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:51.50#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:37:51.50#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:37:51.50#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:37:51.50$vck44/vb=5,4 2006.230.01:37:51.50#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.01:37:51.50#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.01:37:51.50#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:51.50#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:51.56#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:51.56#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:51.56#ibcon#enter wrdev, iclass 36, count 2 2006.230.01:37:51.56#ibcon#first serial, iclass 36, count 2 2006.230.01:37:51.56#ibcon#enter sib2, iclass 36, count 2 2006.230.01:37:51.56#ibcon#flushed, iclass 36, count 2 2006.230.01:37:51.56#ibcon#about to write, iclass 36, count 2 2006.230.01:37:51.56#ibcon#wrote, iclass 36, count 2 2006.230.01:37:51.56#ibcon#about to read 3, iclass 36, count 2 2006.230.01:37:51.58#ibcon#read 3, iclass 36, count 2 2006.230.01:37:51.58#ibcon#about to read 4, iclass 36, count 2 2006.230.01:37:51.58#ibcon#read 4, iclass 36, count 2 2006.230.01:37:51.58#ibcon#about to read 5, iclass 36, count 2 2006.230.01:37:51.58#ibcon#read 5, iclass 36, count 2 2006.230.01:37:51.58#ibcon#about to read 6, iclass 36, count 2 2006.230.01:37:51.58#ibcon#read 6, iclass 36, count 2 2006.230.01:37:51.58#ibcon#end of sib2, iclass 36, count 2 2006.230.01:37:51.58#ibcon#*mode == 0, iclass 36, count 2 2006.230.01:37:51.58#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.01:37:51.58#ibcon#[27=AT05-04\r\n] 2006.230.01:37:51.58#ibcon#*before write, iclass 36, count 2 2006.230.01:37:51.58#ibcon#enter sib2, iclass 36, count 2 2006.230.01:37:51.58#ibcon#flushed, iclass 36, count 2 2006.230.01:37:51.58#ibcon#about to write, iclass 36, count 2 2006.230.01:37:51.58#ibcon#wrote, iclass 36, count 2 2006.230.01:37:51.58#ibcon#about to read 3, iclass 36, count 2 2006.230.01:37:51.61#ibcon#read 3, iclass 36, count 2 2006.230.01:37:51.61#ibcon#about to read 4, iclass 36, count 2 2006.230.01:37:51.61#ibcon#read 4, iclass 36, count 2 2006.230.01:37:51.61#ibcon#about to read 5, iclass 36, count 2 2006.230.01:37:51.61#ibcon#read 5, iclass 36, count 2 2006.230.01:37:51.61#ibcon#about to read 6, iclass 36, count 2 2006.230.01:37:51.61#ibcon#read 6, iclass 36, count 2 2006.230.01:37:51.61#ibcon#end of sib2, iclass 36, count 2 2006.230.01:37:51.61#ibcon#*after write, iclass 36, count 2 2006.230.01:37:51.61#ibcon#*before return 0, iclass 36, count 2 2006.230.01:37:51.61#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:51.61#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:37:51.61#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.01:37:51.61#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:51.61#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:51.73#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:51.73#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:51.73#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:37:51.73#ibcon#first serial, iclass 36, count 0 2006.230.01:37:51.73#ibcon#enter sib2, iclass 36, count 0 2006.230.01:37:51.73#ibcon#flushed, iclass 36, count 0 2006.230.01:37:51.73#ibcon#about to write, iclass 36, count 0 2006.230.01:37:51.73#ibcon#wrote, iclass 36, count 0 2006.230.01:37:51.73#ibcon#about to read 3, iclass 36, count 0 2006.230.01:37:51.75#ibcon#read 3, iclass 36, count 0 2006.230.01:37:51.75#ibcon#about to read 4, iclass 36, count 0 2006.230.01:37:51.75#ibcon#read 4, iclass 36, count 0 2006.230.01:37:51.75#ibcon#about to read 5, iclass 36, count 0 2006.230.01:37:51.75#ibcon#read 5, iclass 36, count 0 2006.230.01:37:51.75#ibcon#about to read 6, iclass 36, count 0 2006.230.01:37:51.75#ibcon#read 6, iclass 36, count 0 2006.230.01:37:51.75#ibcon#end of sib2, iclass 36, count 0 2006.230.01:37:51.75#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:37:51.75#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:37:51.75#ibcon#[27=USB\r\n] 2006.230.01:37:51.75#ibcon#*before write, iclass 36, count 0 2006.230.01:37:51.75#ibcon#enter sib2, iclass 36, count 0 2006.230.01:37:51.75#ibcon#flushed, iclass 36, count 0 2006.230.01:37:51.75#ibcon#about to write, iclass 36, count 0 2006.230.01:37:51.75#ibcon#wrote, iclass 36, count 0 2006.230.01:37:51.75#ibcon#about to read 3, iclass 36, count 0 2006.230.01:37:51.78#ibcon#read 3, iclass 36, count 0 2006.230.01:37:51.78#ibcon#about to read 4, iclass 36, count 0 2006.230.01:37:51.78#ibcon#read 4, iclass 36, count 0 2006.230.01:37:51.78#ibcon#about to read 5, iclass 36, count 0 2006.230.01:37:51.78#ibcon#read 5, iclass 36, count 0 2006.230.01:37:51.78#ibcon#about to read 6, iclass 36, count 0 2006.230.01:37:51.78#ibcon#read 6, iclass 36, count 0 2006.230.01:37:51.78#ibcon#end of sib2, iclass 36, count 0 2006.230.01:37:51.78#ibcon#*after write, iclass 36, count 0 2006.230.01:37:51.78#ibcon#*before return 0, iclass 36, count 0 2006.230.01:37:51.78#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:51.78#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:37:51.78#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:37:51.78#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:37:51.78$vck44/vblo=6,719.99 2006.230.01:37:51.78#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.01:37:51.78#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.01:37:51.78#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:51.78#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:51.78#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:51.78#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:51.78#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:37:51.78#ibcon#first serial, iclass 38, count 0 2006.230.01:37:51.78#ibcon#enter sib2, iclass 38, count 0 2006.230.01:37:51.78#ibcon#flushed, iclass 38, count 0 2006.230.01:37:51.78#ibcon#about to write, iclass 38, count 0 2006.230.01:37:51.78#ibcon#wrote, iclass 38, count 0 2006.230.01:37:51.78#ibcon#about to read 3, iclass 38, count 0 2006.230.01:37:51.80#ibcon#read 3, iclass 38, count 0 2006.230.01:37:51.80#ibcon#about to read 4, iclass 38, count 0 2006.230.01:37:51.80#ibcon#read 4, iclass 38, count 0 2006.230.01:37:51.80#ibcon#about to read 5, iclass 38, count 0 2006.230.01:37:51.80#ibcon#read 5, iclass 38, count 0 2006.230.01:37:51.80#ibcon#about to read 6, iclass 38, count 0 2006.230.01:37:51.80#ibcon#read 6, iclass 38, count 0 2006.230.01:37:51.80#ibcon#end of sib2, iclass 38, count 0 2006.230.01:37:51.80#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:37:51.80#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:37:51.80#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:37:51.80#ibcon#*before write, iclass 38, count 0 2006.230.01:37:51.80#ibcon#enter sib2, iclass 38, count 0 2006.230.01:37:51.80#ibcon#flushed, iclass 38, count 0 2006.230.01:37:51.80#ibcon#about to write, iclass 38, count 0 2006.230.01:37:51.80#ibcon#wrote, iclass 38, count 0 2006.230.01:37:51.80#ibcon#about to read 3, iclass 38, count 0 2006.230.01:37:51.84#ibcon#read 3, iclass 38, count 0 2006.230.01:37:51.84#ibcon#about to read 4, iclass 38, count 0 2006.230.01:37:51.84#ibcon#read 4, iclass 38, count 0 2006.230.01:37:51.84#ibcon#about to read 5, iclass 38, count 0 2006.230.01:37:51.84#ibcon#read 5, iclass 38, count 0 2006.230.01:37:51.84#ibcon#about to read 6, iclass 38, count 0 2006.230.01:37:51.84#ibcon#read 6, iclass 38, count 0 2006.230.01:37:51.84#ibcon#end of sib2, iclass 38, count 0 2006.230.01:37:51.84#ibcon#*after write, iclass 38, count 0 2006.230.01:37:51.84#ibcon#*before return 0, iclass 38, count 0 2006.230.01:37:51.84#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:51.84#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:37:51.84#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:37:51.84#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:37:51.84$vck44/vb=6,4 2006.230.01:37:51.84#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.01:37:51.84#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.01:37:51.84#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:51.84#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:51.90#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:51.90#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:51.90#ibcon#enter wrdev, iclass 40, count 2 2006.230.01:37:51.90#ibcon#first serial, iclass 40, count 2 2006.230.01:37:51.90#ibcon#enter sib2, iclass 40, count 2 2006.230.01:37:51.90#ibcon#flushed, iclass 40, count 2 2006.230.01:37:51.90#ibcon#about to write, iclass 40, count 2 2006.230.01:37:51.90#ibcon#wrote, iclass 40, count 2 2006.230.01:37:51.90#ibcon#about to read 3, iclass 40, count 2 2006.230.01:37:51.92#ibcon#read 3, iclass 40, count 2 2006.230.01:37:51.92#ibcon#about to read 4, iclass 40, count 2 2006.230.01:37:51.92#ibcon#read 4, iclass 40, count 2 2006.230.01:37:51.92#ibcon#about to read 5, iclass 40, count 2 2006.230.01:37:51.92#ibcon#read 5, iclass 40, count 2 2006.230.01:37:51.92#ibcon#about to read 6, iclass 40, count 2 2006.230.01:37:51.92#ibcon#read 6, iclass 40, count 2 2006.230.01:37:51.92#ibcon#end of sib2, iclass 40, count 2 2006.230.01:37:51.92#ibcon#*mode == 0, iclass 40, count 2 2006.230.01:37:51.92#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.01:37:51.92#ibcon#[27=AT06-04\r\n] 2006.230.01:37:51.92#ibcon#*before write, iclass 40, count 2 2006.230.01:37:51.92#ibcon#enter sib2, iclass 40, count 2 2006.230.01:37:51.92#ibcon#flushed, iclass 40, count 2 2006.230.01:37:51.92#ibcon#about to write, iclass 40, count 2 2006.230.01:37:51.92#ibcon#wrote, iclass 40, count 2 2006.230.01:37:51.92#ibcon#about to read 3, iclass 40, count 2 2006.230.01:37:51.95#ibcon#read 3, iclass 40, count 2 2006.230.01:37:51.95#ibcon#about to read 4, iclass 40, count 2 2006.230.01:37:51.95#ibcon#read 4, iclass 40, count 2 2006.230.01:37:51.95#ibcon#about to read 5, iclass 40, count 2 2006.230.01:37:51.95#ibcon#read 5, iclass 40, count 2 2006.230.01:37:51.95#ibcon#about to read 6, iclass 40, count 2 2006.230.01:37:51.95#ibcon#read 6, iclass 40, count 2 2006.230.01:37:51.95#ibcon#end of sib2, iclass 40, count 2 2006.230.01:37:51.95#ibcon#*after write, iclass 40, count 2 2006.230.01:37:51.95#ibcon#*before return 0, iclass 40, count 2 2006.230.01:37:51.95#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:51.95#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:37:51.95#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.01:37:51.95#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:51.95#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:52.08#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:52.08#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:52.08#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:37:52.08#ibcon#first serial, iclass 40, count 0 2006.230.01:37:52.08#ibcon#enter sib2, iclass 40, count 0 2006.230.01:37:52.08#ibcon#flushed, iclass 40, count 0 2006.230.01:37:52.08#ibcon#about to write, iclass 40, count 0 2006.230.01:37:52.08#ibcon#wrote, iclass 40, count 0 2006.230.01:37:52.08#ibcon#about to read 3, iclass 40, count 0 2006.230.01:37:52.10#ibcon#read 3, iclass 40, count 0 2006.230.01:37:52.10#ibcon#about to read 4, iclass 40, count 0 2006.230.01:37:52.10#ibcon#read 4, iclass 40, count 0 2006.230.01:37:52.10#ibcon#about to read 5, iclass 40, count 0 2006.230.01:37:52.10#ibcon#read 5, iclass 40, count 0 2006.230.01:37:52.10#ibcon#about to read 6, iclass 40, count 0 2006.230.01:37:52.10#ibcon#read 6, iclass 40, count 0 2006.230.01:37:52.10#ibcon#end of sib2, iclass 40, count 0 2006.230.01:37:52.10#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:37:52.10#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:37:52.10#ibcon#[27=USB\r\n] 2006.230.01:37:52.10#ibcon#*before write, iclass 40, count 0 2006.230.01:37:52.10#ibcon#enter sib2, iclass 40, count 0 2006.230.01:37:52.10#ibcon#flushed, iclass 40, count 0 2006.230.01:37:52.10#ibcon#about to write, iclass 40, count 0 2006.230.01:37:52.10#ibcon#wrote, iclass 40, count 0 2006.230.01:37:52.10#ibcon#about to read 3, iclass 40, count 0 2006.230.01:37:52.13#ibcon#read 3, iclass 40, count 0 2006.230.01:37:52.13#ibcon#about to read 4, iclass 40, count 0 2006.230.01:37:52.13#ibcon#read 4, iclass 40, count 0 2006.230.01:37:52.13#ibcon#about to read 5, iclass 40, count 0 2006.230.01:37:52.13#ibcon#read 5, iclass 40, count 0 2006.230.01:37:52.13#ibcon#about to read 6, iclass 40, count 0 2006.230.01:37:52.13#ibcon#read 6, iclass 40, count 0 2006.230.01:37:52.13#ibcon#end of sib2, iclass 40, count 0 2006.230.01:37:52.13#ibcon#*after write, iclass 40, count 0 2006.230.01:37:52.13#ibcon#*before return 0, iclass 40, count 0 2006.230.01:37:52.13#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:52.13#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:37:52.13#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:37:52.13#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:37:52.13$vck44/vblo=7,734.99 2006.230.01:37:52.13#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.01:37:52.13#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.01:37:52.13#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:52.13#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:52.13#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:52.13#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:52.13#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:37:52.13#ibcon#first serial, iclass 4, count 0 2006.230.01:37:52.13#ibcon#enter sib2, iclass 4, count 0 2006.230.01:37:52.13#ibcon#flushed, iclass 4, count 0 2006.230.01:37:52.13#ibcon#about to write, iclass 4, count 0 2006.230.01:37:52.13#ibcon#wrote, iclass 4, count 0 2006.230.01:37:52.13#ibcon#about to read 3, iclass 4, count 0 2006.230.01:37:52.15#ibcon#read 3, iclass 4, count 0 2006.230.01:37:52.15#ibcon#about to read 4, iclass 4, count 0 2006.230.01:37:52.15#ibcon#read 4, iclass 4, count 0 2006.230.01:37:52.15#ibcon#about to read 5, iclass 4, count 0 2006.230.01:37:52.15#ibcon#read 5, iclass 4, count 0 2006.230.01:37:52.15#ibcon#about to read 6, iclass 4, count 0 2006.230.01:37:52.15#ibcon#read 6, iclass 4, count 0 2006.230.01:37:52.15#ibcon#end of sib2, iclass 4, count 0 2006.230.01:37:52.15#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:37:52.15#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:37:52.15#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:37:52.15#ibcon#*before write, iclass 4, count 0 2006.230.01:37:52.15#ibcon#enter sib2, iclass 4, count 0 2006.230.01:37:52.15#ibcon#flushed, iclass 4, count 0 2006.230.01:37:52.15#ibcon#about to write, iclass 4, count 0 2006.230.01:37:52.15#ibcon#wrote, iclass 4, count 0 2006.230.01:37:52.15#ibcon#about to read 3, iclass 4, count 0 2006.230.01:37:52.19#ibcon#read 3, iclass 4, count 0 2006.230.01:37:52.19#ibcon#about to read 4, iclass 4, count 0 2006.230.01:37:52.19#ibcon#read 4, iclass 4, count 0 2006.230.01:37:52.19#ibcon#about to read 5, iclass 4, count 0 2006.230.01:37:52.19#ibcon#read 5, iclass 4, count 0 2006.230.01:37:52.19#ibcon#about to read 6, iclass 4, count 0 2006.230.01:37:52.19#ibcon#read 6, iclass 4, count 0 2006.230.01:37:52.19#ibcon#end of sib2, iclass 4, count 0 2006.230.01:37:52.19#ibcon#*after write, iclass 4, count 0 2006.230.01:37:52.19#ibcon#*before return 0, iclass 4, count 0 2006.230.01:37:52.19#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:52.19#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:37:52.19#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:37:52.19#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:37:52.19$vck44/vb=7,4 2006.230.01:37:52.19#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.01:37:52.19#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.01:37:52.19#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:52.19#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:52.25#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:52.25#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:52.25#ibcon#enter wrdev, iclass 6, count 2 2006.230.01:37:52.25#ibcon#first serial, iclass 6, count 2 2006.230.01:37:52.25#ibcon#enter sib2, iclass 6, count 2 2006.230.01:37:52.25#ibcon#flushed, iclass 6, count 2 2006.230.01:37:52.25#ibcon#about to write, iclass 6, count 2 2006.230.01:37:52.25#ibcon#wrote, iclass 6, count 2 2006.230.01:37:52.25#ibcon#about to read 3, iclass 6, count 2 2006.230.01:37:52.27#ibcon#read 3, iclass 6, count 2 2006.230.01:37:52.27#ibcon#about to read 4, iclass 6, count 2 2006.230.01:37:52.27#ibcon#read 4, iclass 6, count 2 2006.230.01:37:52.27#ibcon#about to read 5, iclass 6, count 2 2006.230.01:37:52.27#ibcon#read 5, iclass 6, count 2 2006.230.01:37:52.27#ibcon#about to read 6, iclass 6, count 2 2006.230.01:37:52.27#ibcon#read 6, iclass 6, count 2 2006.230.01:37:52.27#ibcon#end of sib2, iclass 6, count 2 2006.230.01:37:52.27#ibcon#*mode == 0, iclass 6, count 2 2006.230.01:37:52.27#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.01:37:52.27#ibcon#[27=AT07-04\r\n] 2006.230.01:37:52.27#ibcon#*before write, iclass 6, count 2 2006.230.01:37:52.27#ibcon#enter sib2, iclass 6, count 2 2006.230.01:37:52.27#ibcon#flushed, iclass 6, count 2 2006.230.01:37:52.27#ibcon#about to write, iclass 6, count 2 2006.230.01:37:52.27#ibcon#wrote, iclass 6, count 2 2006.230.01:37:52.27#ibcon#about to read 3, iclass 6, count 2 2006.230.01:37:52.30#ibcon#read 3, iclass 6, count 2 2006.230.01:37:52.30#ibcon#about to read 4, iclass 6, count 2 2006.230.01:37:52.30#ibcon#read 4, iclass 6, count 2 2006.230.01:37:52.30#ibcon#about to read 5, iclass 6, count 2 2006.230.01:37:52.30#ibcon#read 5, iclass 6, count 2 2006.230.01:37:52.30#ibcon#about to read 6, iclass 6, count 2 2006.230.01:37:52.30#ibcon#read 6, iclass 6, count 2 2006.230.01:37:52.30#ibcon#end of sib2, iclass 6, count 2 2006.230.01:37:52.30#ibcon#*after write, iclass 6, count 2 2006.230.01:37:52.30#ibcon#*before return 0, iclass 6, count 2 2006.230.01:37:52.30#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:52.30#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:37:52.30#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.01:37:52.30#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:52.30#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:52.42#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:52.42#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:52.42#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:37:52.42#ibcon#first serial, iclass 6, count 0 2006.230.01:37:52.42#ibcon#enter sib2, iclass 6, count 0 2006.230.01:37:52.42#ibcon#flushed, iclass 6, count 0 2006.230.01:37:52.42#ibcon#about to write, iclass 6, count 0 2006.230.01:37:52.42#ibcon#wrote, iclass 6, count 0 2006.230.01:37:52.42#ibcon#about to read 3, iclass 6, count 0 2006.230.01:37:52.44#ibcon#read 3, iclass 6, count 0 2006.230.01:37:52.44#ibcon#about to read 4, iclass 6, count 0 2006.230.01:37:52.44#ibcon#read 4, iclass 6, count 0 2006.230.01:37:52.44#ibcon#about to read 5, iclass 6, count 0 2006.230.01:37:52.44#ibcon#read 5, iclass 6, count 0 2006.230.01:37:52.44#ibcon#about to read 6, iclass 6, count 0 2006.230.01:37:52.44#ibcon#read 6, iclass 6, count 0 2006.230.01:37:52.44#ibcon#end of sib2, iclass 6, count 0 2006.230.01:37:52.44#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:37:52.44#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:37:52.44#ibcon#[27=USB\r\n] 2006.230.01:37:52.44#ibcon#*before write, iclass 6, count 0 2006.230.01:37:52.44#ibcon#enter sib2, iclass 6, count 0 2006.230.01:37:52.44#ibcon#flushed, iclass 6, count 0 2006.230.01:37:52.44#ibcon#about to write, iclass 6, count 0 2006.230.01:37:52.44#ibcon#wrote, iclass 6, count 0 2006.230.01:37:52.44#ibcon#about to read 3, iclass 6, count 0 2006.230.01:37:52.47#ibcon#read 3, iclass 6, count 0 2006.230.01:37:52.47#ibcon#about to read 4, iclass 6, count 0 2006.230.01:37:52.47#ibcon#read 4, iclass 6, count 0 2006.230.01:37:52.47#ibcon#about to read 5, iclass 6, count 0 2006.230.01:37:52.47#ibcon#read 5, iclass 6, count 0 2006.230.01:37:52.47#ibcon#about to read 6, iclass 6, count 0 2006.230.01:37:52.47#ibcon#read 6, iclass 6, count 0 2006.230.01:37:52.47#ibcon#end of sib2, iclass 6, count 0 2006.230.01:37:52.47#ibcon#*after write, iclass 6, count 0 2006.230.01:37:52.47#ibcon#*before return 0, iclass 6, count 0 2006.230.01:37:52.47#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:52.47#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:37:52.47#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:37:52.47#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:37:52.47$vck44/vblo=8,744.99 2006.230.01:37:52.47#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.01:37:52.47#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.01:37:52.47#ibcon#ireg 17 cls_cnt 0 2006.230.01:37:52.47#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:52.47#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:52.47#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:52.47#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:37:52.47#ibcon#first serial, iclass 10, count 0 2006.230.01:37:52.47#ibcon#enter sib2, iclass 10, count 0 2006.230.01:37:52.47#ibcon#flushed, iclass 10, count 0 2006.230.01:37:52.47#ibcon#about to write, iclass 10, count 0 2006.230.01:37:52.47#ibcon#wrote, iclass 10, count 0 2006.230.01:37:52.47#ibcon#about to read 3, iclass 10, count 0 2006.230.01:37:52.49#ibcon#read 3, iclass 10, count 0 2006.230.01:37:52.49#ibcon#about to read 4, iclass 10, count 0 2006.230.01:37:52.49#ibcon#read 4, iclass 10, count 0 2006.230.01:37:52.49#ibcon#about to read 5, iclass 10, count 0 2006.230.01:37:52.49#ibcon#read 5, iclass 10, count 0 2006.230.01:37:52.49#ibcon#about to read 6, iclass 10, count 0 2006.230.01:37:52.49#ibcon#read 6, iclass 10, count 0 2006.230.01:37:52.49#ibcon#end of sib2, iclass 10, count 0 2006.230.01:37:52.49#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:37:52.49#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:37:52.49#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:37:52.49#ibcon#*before write, iclass 10, count 0 2006.230.01:37:52.49#ibcon#enter sib2, iclass 10, count 0 2006.230.01:37:52.49#ibcon#flushed, iclass 10, count 0 2006.230.01:37:52.49#ibcon#about to write, iclass 10, count 0 2006.230.01:37:52.49#ibcon#wrote, iclass 10, count 0 2006.230.01:37:52.49#ibcon#about to read 3, iclass 10, count 0 2006.230.01:37:52.53#ibcon#read 3, iclass 10, count 0 2006.230.01:37:52.53#ibcon#about to read 4, iclass 10, count 0 2006.230.01:37:52.53#ibcon#read 4, iclass 10, count 0 2006.230.01:37:52.53#ibcon#about to read 5, iclass 10, count 0 2006.230.01:37:52.53#ibcon#read 5, iclass 10, count 0 2006.230.01:37:52.53#ibcon#about to read 6, iclass 10, count 0 2006.230.01:37:52.53#ibcon#read 6, iclass 10, count 0 2006.230.01:37:52.53#ibcon#end of sib2, iclass 10, count 0 2006.230.01:37:52.53#ibcon#*after write, iclass 10, count 0 2006.230.01:37:52.53#ibcon#*before return 0, iclass 10, count 0 2006.230.01:37:52.53#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:52.53#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:37:52.53#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:37:52.53#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:37:52.53$vck44/vb=8,4 2006.230.01:37:52.53#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.01:37:52.53#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.01:37:52.53#ibcon#ireg 11 cls_cnt 2 2006.230.01:37:52.53#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:52.59#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:52.59#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:52.59#ibcon#enter wrdev, iclass 12, count 2 2006.230.01:37:52.59#ibcon#first serial, iclass 12, count 2 2006.230.01:37:52.59#ibcon#enter sib2, iclass 12, count 2 2006.230.01:37:52.59#ibcon#flushed, iclass 12, count 2 2006.230.01:37:52.59#ibcon#about to write, iclass 12, count 2 2006.230.01:37:52.59#ibcon#wrote, iclass 12, count 2 2006.230.01:37:52.59#ibcon#about to read 3, iclass 12, count 2 2006.230.01:37:52.61#ibcon#read 3, iclass 12, count 2 2006.230.01:37:52.61#ibcon#about to read 4, iclass 12, count 2 2006.230.01:37:52.61#ibcon#read 4, iclass 12, count 2 2006.230.01:37:52.61#ibcon#about to read 5, iclass 12, count 2 2006.230.01:37:52.61#ibcon#read 5, iclass 12, count 2 2006.230.01:37:52.61#ibcon#about to read 6, iclass 12, count 2 2006.230.01:37:52.61#ibcon#read 6, iclass 12, count 2 2006.230.01:37:52.61#ibcon#end of sib2, iclass 12, count 2 2006.230.01:37:52.61#ibcon#*mode == 0, iclass 12, count 2 2006.230.01:37:52.61#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.01:37:52.61#ibcon#[27=AT08-04\r\n] 2006.230.01:37:52.61#ibcon#*before write, iclass 12, count 2 2006.230.01:37:52.61#ibcon#enter sib2, iclass 12, count 2 2006.230.01:37:52.61#ibcon#flushed, iclass 12, count 2 2006.230.01:37:52.61#ibcon#about to write, iclass 12, count 2 2006.230.01:37:52.61#ibcon#wrote, iclass 12, count 2 2006.230.01:37:52.61#ibcon#about to read 3, iclass 12, count 2 2006.230.01:37:52.64#ibcon#read 3, iclass 12, count 2 2006.230.01:37:52.64#ibcon#about to read 4, iclass 12, count 2 2006.230.01:37:52.64#ibcon#read 4, iclass 12, count 2 2006.230.01:37:52.64#ibcon#about to read 5, iclass 12, count 2 2006.230.01:37:52.64#ibcon#read 5, iclass 12, count 2 2006.230.01:37:52.64#ibcon#about to read 6, iclass 12, count 2 2006.230.01:37:52.64#ibcon#read 6, iclass 12, count 2 2006.230.01:37:52.64#ibcon#end of sib2, iclass 12, count 2 2006.230.01:37:52.64#ibcon#*after write, iclass 12, count 2 2006.230.01:37:52.64#ibcon#*before return 0, iclass 12, count 2 2006.230.01:37:52.64#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:52.64#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:37:52.64#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.01:37:52.64#ibcon#ireg 7 cls_cnt 0 2006.230.01:37:52.64#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:52.76#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:52.76#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:52.76#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:37:52.76#ibcon#first serial, iclass 12, count 0 2006.230.01:37:52.76#ibcon#enter sib2, iclass 12, count 0 2006.230.01:37:52.76#ibcon#flushed, iclass 12, count 0 2006.230.01:37:52.76#ibcon#about to write, iclass 12, count 0 2006.230.01:37:52.76#ibcon#wrote, iclass 12, count 0 2006.230.01:37:52.76#ibcon#about to read 3, iclass 12, count 0 2006.230.01:37:52.78#ibcon#read 3, iclass 12, count 0 2006.230.01:37:52.78#ibcon#about to read 4, iclass 12, count 0 2006.230.01:37:52.78#ibcon#read 4, iclass 12, count 0 2006.230.01:37:52.78#ibcon#about to read 5, iclass 12, count 0 2006.230.01:37:52.78#ibcon#read 5, iclass 12, count 0 2006.230.01:37:52.78#ibcon#about to read 6, iclass 12, count 0 2006.230.01:37:52.78#ibcon#read 6, iclass 12, count 0 2006.230.01:37:52.78#ibcon#end of sib2, iclass 12, count 0 2006.230.01:37:52.78#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:37:52.78#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:37:52.78#ibcon#[27=USB\r\n] 2006.230.01:37:52.78#ibcon#*before write, iclass 12, count 0 2006.230.01:37:52.78#ibcon#enter sib2, iclass 12, count 0 2006.230.01:37:52.78#ibcon#flushed, iclass 12, count 0 2006.230.01:37:52.78#ibcon#about to write, iclass 12, count 0 2006.230.01:37:52.78#ibcon#wrote, iclass 12, count 0 2006.230.01:37:52.78#ibcon#about to read 3, iclass 12, count 0 2006.230.01:37:52.81#ibcon#read 3, iclass 12, count 0 2006.230.01:37:52.81#ibcon#about to read 4, iclass 12, count 0 2006.230.01:37:52.81#ibcon#read 4, iclass 12, count 0 2006.230.01:37:52.81#ibcon#about to read 5, iclass 12, count 0 2006.230.01:37:52.81#ibcon#read 5, iclass 12, count 0 2006.230.01:37:52.81#ibcon#about to read 6, iclass 12, count 0 2006.230.01:37:52.81#ibcon#read 6, iclass 12, count 0 2006.230.01:37:52.81#ibcon#end of sib2, iclass 12, count 0 2006.230.01:37:52.81#ibcon#*after write, iclass 12, count 0 2006.230.01:37:52.81#ibcon#*before return 0, iclass 12, count 0 2006.230.01:37:52.81#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:52.81#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:37:52.81#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:37:52.81#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:37:52.81$vck44/vabw=wide 2006.230.01:37:52.81#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:37:52.81#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:37:52.81#ibcon#ireg 8 cls_cnt 0 2006.230.01:37:52.81#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:52.81#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:52.81#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:52.81#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:37:52.81#ibcon#first serial, iclass 14, count 0 2006.230.01:37:52.81#ibcon#enter sib2, iclass 14, count 0 2006.230.01:37:52.81#ibcon#flushed, iclass 14, count 0 2006.230.01:37:52.81#ibcon#about to write, iclass 14, count 0 2006.230.01:37:52.81#ibcon#wrote, iclass 14, count 0 2006.230.01:37:52.81#ibcon#about to read 3, iclass 14, count 0 2006.230.01:37:52.83#ibcon#read 3, iclass 14, count 0 2006.230.01:37:52.83#ibcon#about to read 4, iclass 14, count 0 2006.230.01:37:52.83#ibcon#read 4, iclass 14, count 0 2006.230.01:37:52.83#ibcon#about to read 5, iclass 14, count 0 2006.230.01:37:52.83#ibcon#read 5, iclass 14, count 0 2006.230.01:37:52.83#ibcon#about to read 6, iclass 14, count 0 2006.230.01:37:52.83#ibcon#read 6, iclass 14, count 0 2006.230.01:37:52.83#ibcon#end of sib2, iclass 14, count 0 2006.230.01:37:52.83#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:37:52.83#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:37:52.83#ibcon#[25=BW32\r\n] 2006.230.01:37:52.83#ibcon#*before write, iclass 14, count 0 2006.230.01:37:52.83#ibcon#enter sib2, iclass 14, count 0 2006.230.01:37:52.83#ibcon#flushed, iclass 14, count 0 2006.230.01:37:52.83#ibcon#about to write, iclass 14, count 0 2006.230.01:37:52.83#ibcon#wrote, iclass 14, count 0 2006.230.01:37:52.83#ibcon#about to read 3, iclass 14, count 0 2006.230.01:37:52.86#ibcon#read 3, iclass 14, count 0 2006.230.01:37:52.86#ibcon#about to read 4, iclass 14, count 0 2006.230.01:37:52.86#ibcon#read 4, iclass 14, count 0 2006.230.01:37:52.86#ibcon#about to read 5, iclass 14, count 0 2006.230.01:37:52.86#ibcon#read 5, iclass 14, count 0 2006.230.01:37:52.86#ibcon#about to read 6, iclass 14, count 0 2006.230.01:37:52.86#ibcon#read 6, iclass 14, count 0 2006.230.01:37:52.86#ibcon#end of sib2, iclass 14, count 0 2006.230.01:37:52.86#ibcon#*after write, iclass 14, count 0 2006.230.01:37:52.86#ibcon#*before return 0, iclass 14, count 0 2006.230.01:37:52.86#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:52.86#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:37:52.86#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:37:52.86#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:37:52.86$vck44/vbbw=wide 2006.230.01:37:52.86#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:37:52.86#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:37:52.86#ibcon#ireg 8 cls_cnt 0 2006.230.01:37:52.86#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:37:52.93#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:37:52.93#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:37:52.93#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:37:52.93#ibcon#first serial, iclass 16, count 0 2006.230.01:37:52.93#ibcon#enter sib2, iclass 16, count 0 2006.230.01:37:52.93#ibcon#flushed, iclass 16, count 0 2006.230.01:37:52.93#ibcon#about to write, iclass 16, count 0 2006.230.01:37:52.93#ibcon#wrote, iclass 16, count 0 2006.230.01:37:52.93#ibcon#about to read 3, iclass 16, count 0 2006.230.01:37:52.95#ibcon#read 3, iclass 16, count 0 2006.230.01:37:52.95#ibcon#about to read 4, iclass 16, count 0 2006.230.01:37:52.95#ibcon#read 4, iclass 16, count 0 2006.230.01:37:52.95#ibcon#about to read 5, iclass 16, count 0 2006.230.01:37:52.95#ibcon#read 5, iclass 16, count 0 2006.230.01:37:52.95#ibcon#about to read 6, iclass 16, count 0 2006.230.01:37:52.95#ibcon#read 6, iclass 16, count 0 2006.230.01:37:52.95#ibcon#end of sib2, iclass 16, count 0 2006.230.01:37:52.95#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:37:52.95#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:37:52.95#ibcon#[27=BW32\r\n] 2006.230.01:37:52.95#ibcon#*before write, iclass 16, count 0 2006.230.01:37:52.95#ibcon#enter sib2, iclass 16, count 0 2006.230.01:37:52.95#ibcon#flushed, iclass 16, count 0 2006.230.01:37:52.95#ibcon#about to write, iclass 16, count 0 2006.230.01:37:52.95#ibcon#wrote, iclass 16, count 0 2006.230.01:37:52.95#ibcon#about to read 3, iclass 16, count 0 2006.230.01:37:52.98#ibcon#read 3, iclass 16, count 0 2006.230.01:37:52.98#ibcon#about to read 4, iclass 16, count 0 2006.230.01:37:52.98#ibcon#read 4, iclass 16, count 0 2006.230.01:37:52.98#ibcon#about to read 5, iclass 16, count 0 2006.230.01:37:52.98#ibcon#read 5, iclass 16, count 0 2006.230.01:37:52.98#ibcon#about to read 6, iclass 16, count 0 2006.230.01:37:52.98#ibcon#read 6, iclass 16, count 0 2006.230.01:37:52.98#ibcon#end of sib2, iclass 16, count 0 2006.230.01:37:52.98#ibcon#*after write, iclass 16, count 0 2006.230.01:37:52.98#ibcon#*before return 0, iclass 16, count 0 2006.230.01:37:52.98#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:37:52.98#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:37:52.98#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:37:52.98#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:37:52.98$setupk4/ifdk4 2006.230.01:37:52.98$ifdk4/lo= 2006.230.01:37:52.98$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:37:52.98$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:37:52.98$ifdk4/patch= 2006.230.01:37:52.98$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:37:52.98$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:37:52.98$setupk4/!*+20s 2006.230.01:38:00.96#abcon#<5=/09 2.3 6.1 32.82 671002.7\r\n> 2006.230.01:38:00.98#abcon#{5=INTERFACE CLEAR} 2006.230.01:38:01.04#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:38:07.45$setupk4/"tpicd 2006.230.01:38:07.45$setupk4/echo=off 2006.230.01:38:07.45$setupk4/xlog=off 2006.230.01:38:07.45:!2006.230.01:46:36 2006.230.01:38:18.14#trakl#Source acquired 2006.230.01:38:20.14#flagr#flagr/antenna,acquired 2006.230.01:46:36.00:preob 2006.230.01:46:36.14/onsource/TRACKING 2006.230.01:46:36.14:!2006.230.01:46:46 2006.230.01:46:46.00:"tape 2006.230.01:46:46.00:"st=record 2006.230.01:46:46.00:data_valid=on 2006.230.01:46:46.00:midob 2006.230.01:46:47.14/onsource/TRACKING 2006.230.01:46:47.14/wx/32.98,1002.7,68 2006.230.01:46:47.29/cable/+6.3923E-03 2006.230.01:46:48.38/va/01,08,usb,yes,32,34 2006.230.01:46:48.38/va/02,07,usb,yes,34,35 2006.230.01:46:48.38/va/03,06,usb,yes,42,45 2006.230.01:46:48.38/va/04,07,usb,yes,35,37 2006.230.01:46:48.38/va/05,04,usb,yes,31,32 2006.230.01:46:48.38/va/06,04,usb,yes,35,35 2006.230.01:46:48.38/va/07,05,usb,yes,31,32 2006.230.01:46:48.38/va/08,06,usb,yes,23,28 2006.230.01:46:48.61/valo/01,524.99,yes,locked 2006.230.01:46:48.61/valo/02,534.99,yes,locked 2006.230.01:46:48.61/valo/03,564.99,yes,locked 2006.230.01:46:48.61/valo/04,624.99,yes,locked 2006.230.01:46:48.61/valo/05,734.99,yes,locked 2006.230.01:46:48.61/valo/06,814.99,yes,locked 2006.230.01:46:48.61/valo/07,864.99,yes,locked 2006.230.01:46:48.61/valo/08,884.99,yes,locked 2006.230.01:46:49.70/vb/01,04,usb,yes,39,36 2006.230.01:46:49.70/vb/02,04,usb,yes,41,41 2006.230.01:46:49.70/vb/03,04,usb,yes,38,42 2006.230.01:46:49.70/vb/04,04,usb,yes,43,42 2006.230.01:46:49.70/vb/05,04,usb,yes,34,37 2006.230.01:46:49.70/vb/06,04,usb,yes,39,35 2006.230.01:46:49.70/vb/07,04,usb,yes,39,39 2006.230.01:46:49.70/vb/08,04,usb,yes,35,39 2006.230.01:46:49.94/vblo/01,629.99,yes,locked 2006.230.01:46:49.94/vblo/02,634.99,yes,locked 2006.230.01:46:49.94/vblo/03,649.99,yes,locked 2006.230.01:46:49.94/vblo/04,679.99,yes,locked 2006.230.01:46:49.94/vblo/05,709.99,yes,locked 2006.230.01:46:49.94/vblo/06,719.99,yes,locked 2006.230.01:46:49.94/vblo/07,734.99,yes,locked 2006.230.01:46:49.94/vblo/08,744.99,yes,locked 2006.230.01:46:50.09/vabw/8 2006.230.01:46:50.24/vbbw/8 2006.230.01:46:50.33/xfe/off,on,12.2 2006.230.01:46:50.72/ifatt/23,28,28,28 2006.230.01:46:51.07/fmout-gps/S +4.42E-07 2006.230.01:46:51.11:!2006.230.01:48:46 2006.230.01:48:46.01:data_valid=off 2006.230.01:48:46.02:"et 2006.230.01:48:46.02:!+3s 2006.230.01:48:49.03:"tape 2006.230.01:48:49.04:postob 2006.230.01:48:49.18/cable/+6.3921E-03 2006.230.01:48:49.19/wx/33.00,1002.7,70 2006.230.01:48:49.24/fmout-gps/S +4.41E-07 2006.230.01:48:49.25:scan_name=230-0150,jd0608,60 2006.230.01:48:49.25:source=3c345,164258.81,394837.0,2000.0,cw 2006.230.01:48:50.14#flagr#flagr/antenna,new-source 2006.230.01:48:50.15:checkk5 2006.230.01:48:50.56/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:48:50.99/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:48:51.41/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:48:51.82/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:48:52.23/chk_obsdata//k5ts1/T2300146??a.dat file size is correct (nominal:480MB, actual:476MB). 2006.230.01:48:52.66/chk_obsdata//k5ts2/T2300146??b.dat file size is correct (nominal:480MB, actual:476MB). 2006.230.01:48:53.06/chk_obsdata//k5ts3/T2300146??c.dat file size is correct (nominal:480MB, actual:476MB). 2006.230.01:48:53.49/chk_obsdata//k5ts4/T2300146??d.dat file size is correct (nominal:480MB, actual:476MB). 2006.230.01:48:54.27/k5log//k5ts1_log_newline 2006.230.01:48:55.32/k5log//k5ts2_log_newline 2006.230.01:48:56.11/k5log//k5ts3_log_newline 2006.230.01:48:56.83/k5log//k5ts4_log_newline 2006.230.01:48:56.86/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:48:56.86:setupk4=1 2006.230.01:48:56.86$setupk4/echo=on 2006.230.01:48:56.86$setupk4/pcalon 2006.230.01:48:56.86$pcalon/"no phase cal control is implemented here 2006.230.01:48:56.86$setupk4/"tpicd=stop 2006.230.01:48:56.86$setupk4/"rec=synch_on 2006.230.01:48:56.86$setupk4/"rec_mode=128 2006.230.01:48:56.86$setupk4/!* 2006.230.01:48:56.86$setupk4/recpk4 2006.230.01:48:56.86$recpk4/recpatch= 2006.230.01:48:56.87$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:48:56.87$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:48:56.87$setupk4/vck44 2006.230.01:48:56.87$vck44/valo=1,524.99 2006.230.01:48:56.87#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.01:48:56.87#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.01:48:56.87#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:56.87#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:56.87#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:56.87#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:56.87#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:48:56.87#ibcon#first serial, iclass 24, count 0 2006.230.01:48:56.87#ibcon#enter sib2, iclass 24, count 0 2006.230.01:48:56.87#ibcon#flushed, iclass 24, count 0 2006.230.01:48:56.87#ibcon#about to write, iclass 24, count 0 2006.230.01:48:56.87#ibcon#wrote, iclass 24, count 0 2006.230.01:48:56.87#ibcon#about to read 3, iclass 24, count 0 2006.230.01:48:56.90#ibcon#read 3, iclass 24, count 0 2006.230.01:48:56.90#ibcon#about to read 4, iclass 24, count 0 2006.230.01:48:56.90#ibcon#read 4, iclass 24, count 0 2006.230.01:48:56.90#ibcon#about to read 5, iclass 24, count 0 2006.230.01:48:56.90#ibcon#read 5, iclass 24, count 0 2006.230.01:48:56.90#ibcon#about to read 6, iclass 24, count 0 2006.230.01:48:56.90#ibcon#read 6, iclass 24, count 0 2006.230.01:48:56.90#ibcon#end of sib2, iclass 24, count 0 2006.230.01:48:56.90#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:48:56.90#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:48:56.90#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:48:56.90#ibcon#*before write, iclass 24, count 0 2006.230.01:48:56.90#ibcon#enter sib2, iclass 24, count 0 2006.230.01:48:56.90#ibcon#flushed, iclass 24, count 0 2006.230.01:48:56.90#ibcon#about to write, iclass 24, count 0 2006.230.01:48:56.90#ibcon#wrote, iclass 24, count 0 2006.230.01:48:56.90#ibcon#about to read 3, iclass 24, count 0 2006.230.01:48:56.94#ibcon#read 3, iclass 24, count 0 2006.230.01:48:56.94#ibcon#about to read 4, iclass 24, count 0 2006.230.01:48:56.94#ibcon#read 4, iclass 24, count 0 2006.230.01:48:56.94#ibcon#about to read 5, iclass 24, count 0 2006.230.01:48:56.94#ibcon#read 5, iclass 24, count 0 2006.230.01:48:56.94#ibcon#about to read 6, iclass 24, count 0 2006.230.01:48:56.94#ibcon#read 6, iclass 24, count 0 2006.230.01:48:56.94#ibcon#end of sib2, iclass 24, count 0 2006.230.01:48:56.94#ibcon#*after write, iclass 24, count 0 2006.230.01:48:56.94#ibcon#*before return 0, iclass 24, count 0 2006.230.01:48:56.94#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:56.94#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:56.94#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:48:56.94#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:48:56.94$vck44/va=1,8 2006.230.01:48:56.94#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.01:48:56.94#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.01:48:56.94#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:56.94#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:56.94#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:56.94#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:56.94#ibcon#enter wrdev, iclass 26, count 2 2006.230.01:48:56.94#ibcon#first serial, iclass 26, count 2 2006.230.01:48:56.94#ibcon#enter sib2, iclass 26, count 2 2006.230.01:48:56.94#ibcon#flushed, iclass 26, count 2 2006.230.01:48:56.94#ibcon#about to write, iclass 26, count 2 2006.230.01:48:56.94#ibcon#wrote, iclass 26, count 2 2006.230.01:48:56.94#ibcon#about to read 3, iclass 26, count 2 2006.230.01:48:56.96#ibcon#read 3, iclass 26, count 2 2006.230.01:48:56.96#ibcon#about to read 4, iclass 26, count 2 2006.230.01:48:56.96#ibcon#read 4, iclass 26, count 2 2006.230.01:48:56.96#ibcon#about to read 5, iclass 26, count 2 2006.230.01:48:56.96#ibcon#read 5, iclass 26, count 2 2006.230.01:48:56.96#ibcon#about to read 6, iclass 26, count 2 2006.230.01:48:56.96#ibcon#read 6, iclass 26, count 2 2006.230.01:48:56.96#ibcon#end of sib2, iclass 26, count 2 2006.230.01:48:56.96#ibcon#*mode == 0, iclass 26, count 2 2006.230.01:48:56.96#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.01:48:56.96#ibcon#[25=AT01-08\r\n] 2006.230.01:48:56.96#ibcon#*before write, iclass 26, count 2 2006.230.01:48:56.96#ibcon#enter sib2, iclass 26, count 2 2006.230.01:48:56.96#ibcon#flushed, iclass 26, count 2 2006.230.01:48:56.96#ibcon#about to write, iclass 26, count 2 2006.230.01:48:56.96#ibcon#wrote, iclass 26, count 2 2006.230.01:48:56.96#ibcon#about to read 3, iclass 26, count 2 2006.230.01:48:56.99#ibcon#read 3, iclass 26, count 2 2006.230.01:48:56.99#ibcon#about to read 4, iclass 26, count 2 2006.230.01:48:56.99#ibcon#read 4, iclass 26, count 2 2006.230.01:48:56.99#ibcon#about to read 5, iclass 26, count 2 2006.230.01:48:56.99#ibcon#read 5, iclass 26, count 2 2006.230.01:48:56.99#ibcon#about to read 6, iclass 26, count 2 2006.230.01:48:56.99#ibcon#read 6, iclass 26, count 2 2006.230.01:48:56.99#ibcon#end of sib2, iclass 26, count 2 2006.230.01:48:56.99#ibcon#*after write, iclass 26, count 2 2006.230.01:48:56.99#ibcon#*before return 0, iclass 26, count 2 2006.230.01:48:56.99#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:56.99#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:56.99#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.01:48:56.99#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:56.99#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:48:57.11#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:48:57.11#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:48:57.11#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:48:57.11#ibcon#first serial, iclass 26, count 0 2006.230.01:48:57.11#ibcon#enter sib2, iclass 26, count 0 2006.230.01:48:57.11#ibcon#flushed, iclass 26, count 0 2006.230.01:48:57.11#ibcon#about to write, iclass 26, count 0 2006.230.01:48:57.11#ibcon#wrote, iclass 26, count 0 2006.230.01:48:57.11#ibcon#about to read 3, iclass 26, count 0 2006.230.01:48:57.13#ibcon#read 3, iclass 26, count 0 2006.230.01:48:57.13#ibcon#about to read 4, iclass 26, count 0 2006.230.01:48:57.13#ibcon#read 4, iclass 26, count 0 2006.230.01:48:57.13#ibcon#about to read 5, iclass 26, count 0 2006.230.01:48:57.13#ibcon#read 5, iclass 26, count 0 2006.230.01:48:57.13#ibcon#about to read 6, iclass 26, count 0 2006.230.01:48:57.13#ibcon#read 6, iclass 26, count 0 2006.230.01:48:57.13#ibcon#end of sib2, iclass 26, count 0 2006.230.01:48:57.13#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:48:57.13#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:48:57.13#ibcon#[25=USB\r\n] 2006.230.01:48:57.13#ibcon#*before write, iclass 26, count 0 2006.230.01:48:57.13#ibcon#enter sib2, iclass 26, count 0 2006.230.01:48:57.13#ibcon#flushed, iclass 26, count 0 2006.230.01:48:57.13#ibcon#about to write, iclass 26, count 0 2006.230.01:48:57.13#ibcon#wrote, iclass 26, count 0 2006.230.01:48:57.13#ibcon#about to read 3, iclass 26, count 0 2006.230.01:48:57.16#ibcon#read 3, iclass 26, count 0 2006.230.01:48:57.16#ibcon#about to read 4, iclass 26, count 0 2006.230.01:48:57.16#ibcon#read 4, iclass 26, count 0 2006.230.01:48:57.16#ibcon#about to read 5, iclass 26, count 0 2006.230.01:48:57.16#ibcon#read 5, iclass 26, count 0 2006.230.01:48:57.16#ibcon#about to read 6, iclass 26, count 0 2006.230.01:48:57.16#ibcon#read 6, iclass 26, count 0 2006.230.01:48:57.16#ibcon#end of sib2, iclass 26, count 0 2006.230.01:48:57.16#ibcon#*after write, iclass 26, count 0 2006.230.01:48:57.16#ibcon#*before return 0, iclass 26, count 0 2006.230.01:48:57.16#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:48:57.16#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:48:57.16#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:48:57.16#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:48:57.16$vck44/valo=2,534.99 2006.230.01:48:57.16#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.01:48:57.16#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.01:48:57.16#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:57.16#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:48:57.16#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:48:57.16#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:48:57.16#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:48:57.16#ibcon#first serial, iclass 28, count 0 2006.230.01:48:57.16#ibcon#enter sib2, iclass 28, count 0 2006.230.01:48:57.16#ibcon#flushed, iclass 28, count 0 2006.230.01:48:57.16#ibcon#about to write, iclass 28, count 0 2006.230.01:48:57.16#ibcon#wrote, iclass 28, count 0 2006.230.01:48:57.16#ibcon#about to read 3, iclass 28, count 0 2006.230.01:48:57.18#ibcon#read 3, iclass 28, count 0 2006.230.01:48:57.18#ibcon#about to read 4, iclass 28, count 0 2006.230.01:48:57.18#ibcon#read 4, iclass 28, count 0 2006.230.01:48:57.18#ibcon#about to read 5, iclass 28, count 0 2006.230.01:48:57.18#ibcon#read 5, iclass 28, count 0 2006.230.01:48:57.18#ibcon#about to read 6, iclass 28, count 0 2006.230.01:48:57.18#ibcon#read 6, iclass 28, count 0 2006.230.01:48:57.18#ibcon#end of sib2, iclass 28, count 0 2006.230.01:48:57.18#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:48:57.18#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:48:57.18#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:48:57.18#ibcon#*before write, iclass 28, count 0 2006.230.01:48:57.18#ibcon#enter sib2, iclass 28, count 0 2006.230.01:48:57.18#ibcon#flushed, iclass 28, count 0 2006.230.01:48:57.18#ibcon#about to write, iclass 28, count 0 2006.230.01:48:57.18#ibcon#wrote, iclass 28, count 0 2006.230.01:48:57.18#ibcon#about to read 3, iclass 28, count 0 2006.230.01:48:57.22#ibcon#read 3, iclass 28, count 0 2006.230.01:48:57.22#ibcon#about to read 4, iclass 28, count 0 2006.230.01:48:57.22#ibcon#read 4, iclass 28, count 0 2006.230.01:48:57.22#ibcon#about to read 5, iclass 28, count 0 2006.230.01:48:57.22#ibcon#read 5, iclass 28, count 0 2006.230.01:48:57.22#ibcon#about to read 6, iclass 28, count 0 2006.230.01:48:57.22#ibcon#read 6, iclass 28, count 0 2006.230.01:48:57.22#ibcon#end of sib2, iclass 28, count 0 2006.230.01:48:57.22#ibcon#*after write, iclass 28, count 0 2006.230.01:48:57.22#ibcon#*before return 0, iclass 28, count 0 2006.230.01:48:57.22#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:48:57.22#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:48:57.22#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:48:57.22#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:48:57.22$vck44/va=2,7 2006.230.01:48:57.22#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.01:48:57.22#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.01:48:57.22#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:57.22#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:48:57.28#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:48:57.28#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:48:57.28#ibcon#enter wrdev, iclass 30, count 2 2006.230.01:48:57.28#ibcon#first serial, iclass 30, count 2 2006.230.01:48:57.28#ibcon#enter sib2, iclass 30, count 2 2006.230.01:48:57.28#ibcon#flushed, iclass 30, count 2 2006.230.01:48:57.28#ibcon#about to write, iclass 30, count 2 2006.230.01:48:57.28#ibcon#wrote, iclass 30, count 2 2006.230.01:48:57.28#ibcon#about to read 3, iclass 30, count 2 2006.230.01:48:57.30#ibcon#read 3, iclass 30, count 2 2006.230.01:48:57.30#ibcon#about to read 4, iclass 30, count 2 2006.230.01:48:57.30#ibcon#read 4, iclass 30, count 2 2006.230.01:48:57.30#ibcon#about to read 5, iclass 30, count 2 2006.230.01:48:57.30#ibcon#read 5, iclass 30, count 2 2006.230.01:48:57.30#ibcon#about to read 6, iclass 30, count 2 2006.230.01:48:57.30#ibcon#read 6, iclass 30, count 2 2006.230.01:48:57.30#ibcon#end of sib2, iclass 30, count 2 2006.230.01:48:57.30#ibcon#*mode == 0, iclass 30, count 2 2006.230.01:48:57.30#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.01:48:57.30#ibcon#[25=AT02-07\r\n] 2006.230.01:48:57.30#ibcon#*before write, iclass 30, count 2 2006.230.01:48:57.30#ibcon#enter sib2, iclass 30, count 2 2006.230.01:48:57.30#ibcon#flushed, iclass 30, count 2 2006.230.01:48:57.30#ibcon#about to write, iclass 30, count 2 2006.230.01:48:57.30#ibcon#wrote, iclass 30, count 2 2006.230.01:48:57.30#ibcon#about to read 3, iclass 30, count 2 2006.230.01:48:57.33#ibcon#read 3, iclass 30, count 2 2006.230.01:48:57.33#ibcon#about to read 4, iclass 30, count 2 2006.230.01:48:57.33#ibcon#read 4, iclass 30, count 2 2006.230.01:48:57.33#ibcon#about to read 5, iclass 30, count 2 2006.230.01:48:57.33#ibcon#read 5, iclass 30, count 2 2006.230.01:48:57.33#ibcon#about to read 6, iclass 30, count 2 2006.230.01:48:57.33#ibcon#read 6, iclass 30, count 2 2006.230.01:48:57.33#ibcon#end of sib2, iclass 30, count 2 2006.230.01:48:57.33#ibcon#*after write, iclass 30, count 2 2006.230.01:48:57.33#ibcon#*before return 0, iclass 30, count 2 2006.230.01:48:57.33#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:48:57.33#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:48:57.33#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.01:48:57.33#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:57.33#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:48:57.45#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:48:57.45#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:48:57.45#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:48:57.45#ibcon#first serial, iclass 30, count 0 2006.230.01:48:57.45#ibcon#enter sib2, iclass 30, count 0 2006.230.01:48:57.45#ibcon#flushed, iclass 30, count 0 2006.230.01:48:57.45#ibcon#about to write, iclass 30, count 0 2006.230.01:48:57.45#ibcon#wrote, iclass 30, count 0 2006.230.01:48:57.45#ibcon#about to read 3, iclass 30, count 0 2006.230.01:48:57.47#ibcon#read 3, iclass 30, count 0 2006.230.01:48:57.47#ibcon#about to read 4, iclass 30, count 0 2006.230.01:48:57.47#ibcon#read 4, iclass 30, count 0 2006.230.01:48:57.47#ibcon#about to read 5, iclass 30, count 0 2006.230.01:48:57.47#ibcon#read 5, iclass 30, count 0 2006.230.01:48:57.47#ibcon#about to read 6, iclass 30, count 0 2006.230.01:48:57.47#ibcon#read 6, iclass 30, count 0 2006.230.01:48:57.47#ibcon#end of sib2, iclass 30, count 0 2006.230.01:48:57.47#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:48:57.47#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:48:57.47#ibcon#[25=USB\r\n] 2006.230.01:48:57.47#ibcon#*before write, iclass 30, count 0 2006.230.01:48:57.47#ibcon#enter sib2, iclass 30, count 0 2006.230.01:48:57.47#ibcon#flushed, iclass 30, count 0 2006.230.01:48:57.47#ibcon#about to write, iclass 30, count 0 2006.230.01:48:57.47#ibcon#wrote, iclass 30, count 0 2006.230.01:48:57.47#ibcon#about to read 3, iclass 30, count 0 2006.230.01:48:57.50#ibcon#read 3, iclass 30, count 0 2006.230.01:48:57.50#ibcon#about to read 4, iclass 30, count 0 2006.230.01:48:57.50#ibcon#read 4, iclass 30, count 0 2006.230.01:48:57.50#ibcon#about to read 5, iclass 30, count 0 2006.230.01:48:57.50#ibcon#read 5, iclass 30, count 0 2006.230.01:48:57.50#ibcon#about to read 6, iclass 30, count 0 2006.230.01:48:57.50#ibcon#read 6, iclass 30, count 0 2006.230.01:48:57.50#ibcon#end of sib2, iclass 30, count 0 2006.230.01:48:57.50#ibcon#*after write, iclass 30, count 0 2006.230.01:48:57.50#ibcon#*before return 0, iclass 30, count 0 2006.230.01:48:57.50#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:48:57.50#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:48:57.50#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:48:57.50#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:48:57.50$vck44/valo=3,564.99 2006.230.01:48:57.50#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.01:48:57.50#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.01:48:57.50#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:57.50#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:48:57.50#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:48:57.50#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:48:57.50#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:48:57.50#ibcon#first serial, iclass 32, count 0 2006.230.01:48:57.50#ibcon#enter sib2, iclass 32, count 0 2006.230.01:48:57.50#ibcon#flushed, iclass 32, count 0 2006.230.01:48:57.50#ibcon#about to write, iclass 32, count 0 2006.230.01:48:57.50#ibcon#wrote, iclass 32, count 0 2006.230.01:48:57.50#ibcon#about to read 3, iclass 32, count 0 2006.230.01:48:57.52#ibcon#read 3, iclass 32, count 0 2006.230.01:48:57.52#ibcon#about to read 4, iclass 32, count 0 2006.230.01:48:57.52#ibcon#read 4, iclass 32, count 0 2006.230.01:48:57.52#ibcon#about to read 5, iclass 32, count 0 2006.230.01:48:57.52#ibcon#read 5, iclass 32, count 0 2006.230.01:48:57.52#ibcon#about to read 6, iclass 32, count 0 2006.230.01:48:57.52#ibcon#read 6, iclass 32, count 0 2006.230.01:48:57.52#ibcon#end of sib2, iclass 32, count 0 2006.230.01:48:57.52#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:48:57.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:48:57.52#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:48:57.52#ibcon#*before write, iclass 32, count 0 2006.230.01:48:57.52#ibcon#enter sib2, iclass 32, count 0 2006.230.01:48:57.52#ibcon#flushed, iclass 32, count 0 2006.230.01:48:57.52#ibcon#about to write, iclass 32, count 0 2006.230.01:48:57.52#ibcon#wrote, iclass 32, count 0 2006.230.01:48:57.52#ibcon#about to read 3, iclass 32, count 0 2006.230.01:48:57.56#ibcon#read 3, iclass 32, count 0 2006.230.01:48:57.56#ibcon#about to read 4, iclass 32, count 0 2006.230.01:48:57.56#ibcon#read 4, iclass 32, count 0 2006.230.01:48:57.56#ibcon#about to read 5, iclass 32, count 0 2006.230.01:48:57.56#ibcon#read 5, iclass 32, count 0 2006.230.01:48:57.56#ibcon#about to read 6, iclass 32, count 0 2006.230.01:48:57.56#ibcon#read 6, iclass 32, count 0 2006.230.01:48:57.56#ibcon#end of sib2, iclass 32, count 0 2006.230.01:48:57.56#ibcon#*after write, iclass 32, count 0 2006.230.01:48:57.56#ibcon#*before return 0, iclass 32, count 0 2006.230.01:48:57.56#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:48:57.56#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:48:57.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:48:57.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:48:57.56$vck44/va=3,6 2006.230.01:48:57.56#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.01:48:57.56#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.01:48:57.56#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:57.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:48:57.62#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:48:57.62#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:48:57.62#ibcon#enter wrdev, iclass 34, count 2 2006.230.01:48:57.62#ibcon#first serial, iclass 34, count 2 2006.230.01:48:57.62#ibcon#enter sib2, iclass 34, count 2 2006.230.01:48:57.62#ibcon#flushed, iclass 34, count 2 2006.230.01:48:57.62#ibcon#about to write, iclass 34, count 2 2006.230.01:48:57.62#ibcon#wrote, iclass 34, count 2 2006.230.01:48:57.62#ibcon#about to read 3, iclass 34, count 2 2006.230.01:48:57.64#ibcon#read 3, iclass 34, count 2 2006.230.01:48:57.64#ibcon#about to read 4, iclass 34, count 2 2006.230.01:48:57.64#ibcon#read 4, iclass 34, count 2 2006.230.01:48:57.64#ibcon#about to read 5, iclass 34, count 2 2006.230.01:48:57.64#ibcon#read 5, iclass 34, count 2 2006.230.01:48:57.64#ibcon#about to read 6, iclass 34, count 2 2006.230.01:48:57.64#ibcon#read 6, iclass 34, count 2 2006.230.01:48:57.64#ibcon#end of sib2, iclass 34, count 2 2006.230.01:48:57.64#ibcon#*mode == 0, iclass 34, count 2 2006.230.01:48:57.64#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.01:48:57.64#ibcon#[25=AT03-06\r\n] 2006.230.01:48:57.64#ibcon#*before write, iclass 34, count 2 2006.230.01:48:57.64#ibcon#enter sib2, iclass 34, count 2 2006.230.01:48:57.64#ibcon#flushed, iclass 34, count 2 2006.230.01:48:57.64#ibcon#about to write, iclass 34, count 2 2006.230.01:48:57.64#ibcon#wrote, iclass 34, count 2 2006.230.01:48:57.64#ibcon#about to read 3, iclass 34, count 2 2006.230.01:48:57.67#ibcon#read 3, iclass 34, count 2 2006.230.01:48:57.67#ibcon#about to read 4, iclass 34, count 2 2006.230.01:48:57.67#ibcon#read 4, iclass 34, count 2 2006.230.01:48:57.67#ibcon#about to read 5, iclass 34, count 2 2006.230.01:48:57.67#ibcon#read 5, iclass 34, count 2 2006.230.01:48:57.67#ibcon#about to read 6, iclass 34, count 2 2006.230.01:48:57.67#ibcon#read 6, iclass 34, count 2 2006.230.01:48:57.67#ibcon#end of sib2, iclass 34, count 2 2006.230.01:48:57.67#ibcon#*after write, iclass 34, count 2 2006.230.01:48:57.67#ibcon#*before return 0, iclass 34, count 2 2006.230.01:48:57.67#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:48:57.67#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:48:57.67#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.01:48:57.67#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:57.67#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:48:57.79#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:48:57.79#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:48:57.79#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:48:57.79#ibcon#first serial, iclass 34, count 0 2006.230.01:48:57.79#ibcon#enter sib2, iclass 34, count 0 2006.230.01:48:57.79#ibcon#flushed, iclass 34, count 0 2006.230.01:48:57.79#ibcon#about to write, iclass 34, count 0 2006.230.01:48:57.79#ibcon#wrote, iclass 34, count 0 2006.230.01:48:57.79#ibcon#about to read 3, iclass 34, count 0 2006.230.01:48:57.81#ibcon#read 3, iclass 34, count 0 2006.230.01:48:57.81#ibcon#about to read 4, iclass 34, count 0 2006.230.01:48:57.81#ibcon#read 4, iclass 34, count 0 2006.230.01:48:57.81#ibcon#about to read 5, iclass 34, count 0 2006.230.01:48:57.81#ibcon#read 5, iclass 34, count 0 2006.230.01:48:57.81#ibcon#about to read 6, iclass 34, count 0 2006.230.01:48:57.81#ibcon#read 6, iclass 34, count 0 2006.230.01:48:57.81#ibcon#end of sib2, iclass 34, count 0 2006.230.01:48:57.81#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:48:57.81#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:48:57.81#ibcon#[25=USB\r\n] 2006.230.01:48:57.81#ibcon#*before write, iclass 34, count 0 2006.230.01:48:57.81#ibcon#enter sib2, iclass 34, count 0 2006.230.01:48:57.81#ibcon#flushed, iclass 34, count 0 2006.230.01:48:57.81#ibcon#about to write, iclass 34, count 0 2006.230.01:48:57.81#ibcon#wrote, iclass 34, count 0 2006.230.01:48:57.81#ibcon#about to read 3, iclass 34, count 0 2006.230.01:48:57.84#ibcon#read 3, iclass 34, count 0 2006.230.01:48:57.84#ibcon#about to read 4, iclass 34, count 0 2006.230.01:48:57.84#ibcon#read 4, iclass 34, count 0 2006.230.01:48:57.84#ibcon#about to read 5, iclass 34, count 0 2006.230.01:48:57.84#ibcon#read 5, iclass 34, count 0 2006.230.01:48:57.84#ibcon#about to read 6, iclass 34, count 0 2006.230.01:48:57.84#ibcon#read 6, iclass 34, count 0 2006.230.01:48:57.84#ibcon#end of sib2, iclass 34, count 0 2006.230.01:48:57.84#ibcon#*after write, iclass 34, count 0 2006.230.01:48:57.84#ibcon#*before return 0, iclass 34, count 0 2006.230.01:48:57.84#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:48:57.84#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:48:57.84#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:48:57.84#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:48:57.84$vck44/valo=4,624.99 2006.230.01:48:57.84#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.01:48:57.84#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.01:48:57.84#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:57.84#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:48:57.84#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:48:57.84#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:48:57.84#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:48:57.84#ibcon#first serial, iclass 36, count 0 2006.230.01:48:57.84#ibcon#enter sib2, iclass 36, count 0 2006.230.01:48:57.84#ibcon#flushed, iclass 36, count 0 2006.230.01:48:57.84#ibcon#about to write, iclass 36, count 0 2006.230.01:48:57.84#ibcon#wrote, iclass 36, count 0 2006.230.01:48:57.84#ibcon#about to read 3, iclass 36, count 0 2006.230.01:48:57.86#ibcon#read 3, iclass 36, count 0 2006.230.01:48:57.86#ibcon#about to read 4, iclass 36, count 0 2006.230.01:48:57.86#ibcon#read 4, iclass 36, count 0 2006.230.01:48:57.86#ibcon#about to read 5, iclass 36, count 0 2006.230.01:48:57.86#ibcon#read 5, iclass 36, count 0 2006.230.01:48:57.86#ibcon#about to read 6, iclass 36, count 0 2006.230.01:48:57.86#ibcon#read 6, iclass 36, count 0 2006.230.01:48:57.86#ibcon#end of sib2, iclass 36, count 0 2006.230.01:48:57.86#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:48:57.86#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:48:57.86#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:48:57.86#ibcon#*before write, iclass 36, count 0 2006.230.01:48:57.86#ibcon#enter sib2, iclass 36, count 0 2006.230.01:48:57.86#ibcon#flushed, iclass 36, count 0 2006.230.01:48:57.86#ibcon#about to write, iclass 36, count 0 2006.230.01:48:57.86#ibcon#wrote, iclass 36, count 0 2006.230.01:48:57.86#ibcon#about to read 3, iclass 36, count 0 2006.230.01:48:57.90#ibcon#read 3, iclass 36, count 0 2006.230.01:48:57.90#ibcon#about to read 4, iclass 36, count 0 2006.230.01:48:57.90#ibcon#read 4, iclass 36, count 0 2006.230.01:48:57.90#ibcon#about to read 5, iclass 36, count 0 2006.230.01:48:57.90#ibcon#read 5, iclass 36, count 0 2006.230.01:48:57.90#ibcon#about to read 6, iclass 36, count 0 2006.230.01:48:57.90#ibcon#read 6, iclass 36, count 0 2006.230.01:48:57.90#ibcon#end of sib2, iclass 36, count 0 2006.230.01:48:57.90#ibcon#*after write, iclass 36, count 0 2006.230.01:48:57.90#ibcon#*before return 0, iclass 36, count 0 2006.230.01:48:57.90#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:48:57.90#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:48:57.90#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:48:57.90#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:48:57.90$vck44/va=4,7 2006.230.01:48:57.90#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.01:48:57.90#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.01:48:57.90#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:57.90#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:48:57.96#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:48:57.96#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:48:57.96#ibcon#enter wrdev, iclass 38, count 2 2006.230.01:48:57.96#ibcon#first serial, iclass 38, count 2 2006.230.01:48:57.96#ibcon#enter sib2, iclass 38, count 2 2006.230.01:48:57.96#ibcon#flushed, iclass 38, count 2 2006.230.01:48:57.96#ibcon#about to write, iclass 38, count 2 2006.230.01:48:57.96#ibcon#wrote, iclass 38, count 2 2006.230.01:48:57.96#ibcon#about to read 3, iclass 38, count 2 2006.230.01:48:57.98#ibcon#read 3, iclass 38, count 2 2006.230.01:48:57.98#ibcon#about to read 4, iclass 38, count 2 2006.230.01:48:57.98#ibcon#read 4, iclass 38, count 2 2006.230.01:48:57.98#ibcon#about to read 5, iclass 38, count 2 2006.230.01:48:57.98#ibcon#read 5, iclass 38, count 2 2006.230.01:48:57.98#ibcon#about to read 6, iclass 38, count 2 2006.230.01:48:57.98#ibcon#read 6, iclass 38, count 2 2006.230.01:48:57.98#ibcon#end of sib2, iclass 38, count 2 2006.230.01:48:57.98#ibcon#*mode == 0, iclass 38, count 2 2006.230.01:48:57.98#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.01:48:57.98#ibcon#[25=AT04-07\r\n] 2006.230.01:48:57.98#ibcon#*before write, iclass 38, count 2 2006.230.01:48:57.98#ibcon#enter sib2, iclass 38, count 2 2006.230.01:48:57.98#ibcon#flushed, iclass 38, count 2 2006.230.01:48:57.98#ibcon#about to write, iclass 38, count 2 2006.230.01:48:57.98#ibcon#wrote, iclass 38, count 2 2006.230.01:48:57.98#ibcon#about to read 3, iclass 38, count 2 2006.230.01:48:58.01#ibcon#read 3, iclass 38, count 2 2006.230.01:48:58.01#ibcon#about to read 4, iclass 38, count 2 2006.230.01:48:58.01#ibcon#read 4, iclass 38, count 2 2006.230.01:48:58.01#ibcon#about to read 5, iclass 38, count 2 2006.230.01:48:58.01#ibcon#read 5, iclass 38, count 2 2006.230.01:48:58.01#ibcon#about to read 6, iclass 38, count 2 2006.230.01:48:58.01#ibcon#read 6, iclass 38, count 2 2006.230.01:48:58.01#ibcon#end of sib2, iclass 38, count 2 2006.230.01:48:58.01#ibcon#*after write, iclass 38, count 2 2006.230.01:48:58.01#ibcon#*before return 0, iclass 38, count 2 2006.230.01:48:58.01#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:48:58.01#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:48:58.01#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.01:48:58.01#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:58.01#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:48:58.13#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:48:58.13#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:48:58.13#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:48:58.13#ibcon#first serial, iclass 38, count 0 2006.230.01:48:58.13#ibcon#enter sib2, iclass 38, count 0 2006.230.01:48:58.13#ibcon#flushed, iclass 38, count 0 2006.230.01:48:58.13#ibcon#about to write, iclass 38, count 0 2006.230.01:48:58.13#ibcon#wrote, iclass 38, count 0 2006.230.01:48:58.13#ibcon#about to read 3, iclass 38, count 0 2006.230.01:48:58.15#ibcon#read 3, iclass 38, count 0 2006.230.01:48:58.15#ibcon#about to read 4, iclass 38, count 0 2006.230.01:48:58.15#ibcon#read 4, iclass 38, count 0 2006.230.01:48:58.15#ibcon#about to read 5, iclass 38, count 0 2006.230.01:48:58.15#ibcon#read 5, iclass 38, count 0 2006.230.01:48:58.15#ibcon#about to read 6, iclass 38, count 0 2006.230.01:48:58.15#ibcon#read 6, iclass 38, count 0 2006.230.01:48:58.15#ibcon#end of sib2, iclass 38, count 0 2006.230.01:48:58.15#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:48:58.15#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:48:58.15#ibcon#[25=USB\r\n] 2006.230.01:48:58.15#ibcon#*before write, iclass 38, count 0 2006.230.01:48:58.15#ibcon#enter sib2, iclass 38, count 0 2006.230.01:48:58.15#ibcon#flushed, iclass 38, count 0 2006.230.01:48:58.15#ibcon#about to write, iclass 38, count 0 2006.230.01:48:58.15#ibcon#wrote, iclass 38, count 0 2006.230.01:48:58.15#ibcon#about to read 3, iclass 38, count 0 2006.230.01:48:58.18#ibcon#read 3, iclass 38, count 0 2006.230.01:48:58.18#ibcon#about to read 4, iclass 38, count 0 2006.230.01:48:58.18#ibcon#read 4, iclass 38, count 0 2006.230.01:48:58.18#ibcon#about to read 5, iclass 38, count 0 2006.230.01:48:58.18#ibcon#read 5, iclass 38, count 0 2006.230.01:48:58.18#ibcon#about to read 6, iclass 38, count 0 2006.230.01:48:58.18#ibcon#read 6, iclass 38, count 0 2006.230.01:48:58.18#ibcon#end of sib2, iclass 38, count 0 2006.230.01:48:58.18#ibcon#*after write, iclass 38, count 0 2006.230.01:48:58.18#ibcon#*before return 0, iclass 38, count 0 2006.230.01:48:58.18#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:48:58.18#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:48:58.18#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:48:58.18#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:48:58.18$vck44/valo=5,734.99 2006.230.01:48:58.18#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:48:58.18#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:48:58.18#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:58.18#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:48:58.18#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:48:58.18#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:48:58.18#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:48:58.18#ibcon#first serial, iclass 40, count 0 2006.230.01:48:58.18#ibcon#enter sib2, iclass 40, count 0 2006.230.01:48:58.18#ibcon#flushed, iclass 40, count 0 2006.230.01:48:58.18#ibcon#about to write, iclass 40, count 0 2006.230.01:48:58.18#ibcon#wrote, iclass 40, count 0 2006.230.01:48:58.18#ibcon#about to read 3, iclass 40, count 0 2006.230.01:48:58.20#ibcon#read 3, iclass 40, count 0 2006.230.01:48:58.20#ibcon#about to read 4, iclass 40, count 0 2006.230.01:48:58.20#ibcon#read 4, iclass 40, count 0 2006.230.01:48:58.20#ibcon#about to read 5, iclass 40, count 0 2006.230.01:48:58.20#ibcon#read 5, iclass 40, count 0 2006.230.01:48:58.20#ibcon#about to read 6, iclass 40, count 0 2006.230.01:48:58.20#ibcon#read 6, iclass 40, count 0 2006.230.01:48:58.20#ibcon#end of sib2, iclass 40, count 0 2006.230.01:48:58.20#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:48:58.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:48:58.20#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:48:58.20#ibcon#*before write, iclass 40, count 0 2006.230.01:48:58.20#ibcon#enter sib2, iclass 40, count 0 2006.230.01:48:58.20#ibcon#flushed, iclass 40, count 0 2006.230.01:48:58.20#ibcon#about to write, iclass 40, count 0 2006.230.01:48:58.20#ibcon#wrote, iclass 40, count 0 2006.230.01:48:58.20#ibcon#about to read 3, iclass 40, count 0 2006.230.01:48:58.25#ibcon#read 3, iclass 40, count 0 2006.230.01:48:58.25#ibcon#about to read 4, iclass 40, count 0 2006.230.01:48:58.25#ibcon#read 4, iclass 40, count 0 2006.230.01:48:58.25#ibcon#about to read 5, iclass 40, count 0 2006.230.01:48:58.25#ibcon#read 5, iclass 40, count 0 2006.230.01:48:58.25#ibcon#about to read 6, iclass 40, count 0 2006.230.01:48:58.25#ibcon#read 6, iclass 40, count 0 2006.230.01:48:58.25#ibcon#end of sib2, iclass 40, count 0 2006.230.01:48:58.25#ibcon#*after write, iclass 40, count 0 2006.230.01:48:58.25#ibcon#*before return 0, iclass 40, count 0 2006.230.01:48:58.25#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:48:58.25#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:48:58.25#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:48:58.25#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:48:58.25$vck44/va=5,4 2006.230.01:48:58.25#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.01:48:58.25#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.01:48:58.25#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:58.25#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:48:58.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:48:58.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:48:58.29#ibcon#enter wrdev, iclass 4, count 2 2006.230.01:48:58.29#ibcon#first serial, iclass 4, count 2 2006.230.01:48:58.29#ibcon#enter sib2, iclass 4, count 2 2006.230.01:48:58.29#ibcon#flushed, iclass 4, count 2 2006.230.01:48:58.29#ibcon#about to write, iclass 4, count 2 2006.230.01:48:58.29#ibcon#wrote, iclass 4, count 2 2006.230.01:48:58.29#ibcon#about to read 3, iclass 4, count 2 2006.230.01:48:58.31#ibcon#read 3, iclass 4, count 2 2006.230.01:48:58.31#ibcon#about to read 4, iclass 4, count 2 2006.230.01:48:58.31#ibcon#read 4, iclass 4, count 2 2006.230.01:48:58.31#ibcon#about to read 5, iclass 4, count 2 2006.230.01:48:58.31#ibcon#read 5, iclass 4, count 2 2006.230.01:48:58.31#ibcon#about to read 6, iclass 4, count 2 2006.230.01:48:58.31#ibcon#read 6, iclass 4, count 2 2006.230.01:48:58.31#ibcon#end of sib2, iclass 4, count 2 2006.230.01:48:58.31#ibcon#*mode == 0, iclass 4, count 2 2006.230.01:48:58.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.01:48:58.31#ibcon#[25=AT05-04\r\n] 2006.230.01:48:58.31#ibcon#*before write, iclass 4, count 2 2006.230.01:48:58.31#ibcon#enter sib2, iclass 4, count 2 2006.230.01:48:58.31#ibcon#flushed, iclass 4, count 2 2006.230.01:48:58.31#ibcon#about to write, iclass 4, count 2 2006.230.01:48:58.31#ibcon#wrote, iclass 4, count 2 2006.230.01:48:58.31#ibcon#about to read 3, iclass 4, count 2 2006.230.01:48:58.34#ibcon#read 3, iclass 4, count 2 2006.230.01:48:58.34#ibcon#about to read 4, iclass 4, count 2 2006.230.01:48:58.34#ibcon#read 4, iclass 4, count 2 2006.230.01:48:58.34#ibcon#about to read 5, iclass 4, count 2 2006.230.01:48:58.34#ibcon#read 5, iclass 4, count 2 2006.230.01:48:58.34#ibcon#about to read 6, iclass 4, count 2 2006.230.01:48:58.34#ibcon#read 6, iclass 4, count 2 2006.230.01:48:58.34#ibcon#end of sib2, iclass 4, count 2 2006.230.01:48:58.34#ibcon#*after write, iclass 4, count 2 2006.230.01:48:58.34#ibcon#*before return 0, iclass 4, count 2 2006.230.01:48:58.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:48:58.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:48:58.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.01:48:58.34#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:58.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:48:58.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:48:58.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:48:58.46#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:48:58.46#ibcon#first serial, iclass 4, count 0 2006.230.01:48:58.46#ibcon#enter sib2, iclass 4, count 0 2006.230.01:48:58.46#ibcon#flushed, iclass 4, count 0 2006.230.01:48:58.46#ibcon#about to write, iclass 4, count 0 2006.230.01:48:58.46#ibcon#wrote, iclass 4, count 0 2006.230.01:48:58.46#ibcon#about to read 3, iclass 4, count 0 2006.230.01:48:58.48#ibcon#read 3, iclass 4, count 0 2006.230.01:48:58.48#ibcon#about to read 4, iclass 4, count 0 2006.230.01:48:58.48#ibcon#read 4, iclass 4, count 0 2006.230.01:48:58.48#ibcon#about to read 5, iclass 4, count 0 2006.230.01:48:58.48#ibcon#read 5, iclass 4, count 0 2006.230.01:48:58.48#ibcon#about to read 6, iclass 4, count 0 2006.230.01:48:58.48#ibcon#read 6, iclass 4, count 0 2006.230.01:48:58.48#ibcon#end of sib2, iclass 4, count 0 2006.230.01:48:58.48#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:48:58.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:48:58.48#ibcon#[25=USB\r\n] 2006.230.01:48:58.48#ibcon#*before write, iclass 4, count 0 2006.230.01:48:58.48#ibcon#enter sib2, iclass 4, count 0 2006.230.01:48:58.48#ibcon#flushed, iclass 4, count 0 2006.230.01:48:58.48#ibcon#about to write, iclass 4, count 0 2006.230.01:48:58.48#ibcon#wrote, iclass 4, count 0 2006.230.01:48:58.48#ibcon#about to read 3, iclass 4, count 0 2006.230.01:48:58.51#ibcon#read 3, iclass 4, count 0 2006.230.01:48:58.51#ibcon#about to read 4, iclass 4, count 0 2006.230.01:48:58.51#ibcon#read 4, iclass 4, count 0 2006.230.01:48:58.51#ibcon#about to read 5, iclass 4, count 0 2006.230.01:48:58.51#ibcon#read 5, iclass 4, count 0 2006.230.01:48:58.51#ibcon#about to read 6, iclass 4, count 0 2006.230.01:48:58.51#ibcon#read 6, iclass 4, count 0 2006.230.01:48:58.51#ibcon#end of sib2, iclass 4, count 0 2006.230.01:48:58.51#ibcon#*after write, iclass 4, count 0 2006.230.01:48:58.51#ibcon#*before return 0, iclass 4, count 0 2006.230.01:48:58.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:48:58.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:48:58.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:48:58.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:48:58.51$vck44/valo=6,814.99 2006.230.01:48:58.51#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:48:58.51#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:48:58.51#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:58.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:48:58.51#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:48:58.51#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:48:58.51#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:48:58.51#ibcon#first serial, iclass 6, count 0 2006.230.01:48:58.51#ibcon#enter sib2, iclass 6, count 0 2006.230.01:48:58.51#ibcon#flushed, iclass 6, count 0 2006.230.01:48:58.51#ibcon#about to write, iclass 6, count 0 2006.230.01:48:58.51#ibcon#wrote, iclass 6, count 0 2006.230.01:48:58.51#ibcon#about to read 3, iclass 6, count 0 2006.230.01:48:58.53#ibcon#read 3, iclass 6, count 0 2006.230.01:48:58.53#ibcon#about to read 4, iclass 6, count 0 2006.230.01:48:58.53#ibcon#read 4, iclass 6, count 0 2006.230.01:48:58.53#ibcon#about to read 5, iclass 6, count 0 2006.230.01:48:58.53#ibcon#read 5, iclass 6, count 0 2006.230.01:48:58.53#ibcon#about to read 6, iclass 6, count 0 2006.230.01:48:58.53#ibcon#read 6, iclass 6, count 0 2006.230.01:48:58.53#ibcon#end of sib2, iclass 6, count 0 2006.230.01:48:58.53#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:48:58.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:48:58.53#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:48:58.53#ibcon#*before write, iclass 6, count 0 2006.230.01:48:58.53#ibcon#enter sib2, iclass 6, count 0 2006.230.01:48:58.53#ibcon#flushed, iclass 6, count 0 2006.230.01:48:58.53#ibcon#about to write, iclass 6, count 0 2006.230.01:48:58.53#ibcon#wrote, iclass 6, count 0 2006.230.01:48:58.53#ibcon#about to read 3, iclass 6, count 0 2006.230.01:48:58.57#ibcon#read 3, iclass 6, count 0 2006.230.01:48:58.57#ibcon#about to read 4, iclass 6, count 0 2006.230.01:48:58.57#ibcon#read 4, iclass 6, count 0 2006.230.01:48:58.57#ibcon#about to read 5, iclass 6, count 0 2006.230.01:48:58.57#ibcon#read 5, iclass 6, count 0 2006.230.01:48:58.57#ibcon#about to read 6, iclass 6, count 0 2006.230.01:48:58.57#ibcon#read 6, iclass 6, count 0 2006.230.01:48:58.57#ibcon#end of sib2, iclass 6, count 0 2006.230.01:48:58.57#ibcon#*after write, iclass 6, count 0 2006.230.01:48:58.57#ibcon#*before return 0, iclass 6, count 0 2006.230.01:48:58.57#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:48:58.57#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:48:58.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:48:58.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:48:58.57$vck44/va=6,4 2006.230.01:48:58.57#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.01:48:58.57#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.01:48:58.57#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:58.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:48:58.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:48:58.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:48:58.63#ibcon#enter wrdev, iclass 10, count 2 2006.230.01:48:58.63#ibcon#first serial, iclass 10, count 2 2006.230.01:48:58.63#ibcon#enter sib2, iclass 10, count 2 2006.230.01:48:58.63#ibcon#flushed, iclass 10, count 2 2006.230.01:48:58.63#ibcon#about to write, iclass 10, count 2 2006.230.01:48:58.63#ibcon#wrote, iclass 10, count 2 2006.230.01:48:58.63#ibcon#about to read 3, iclass 10, count 2 2006.230.01:48:58.65#ibcon#read 3, iclass 10, count 2 2006.230.01:48:58.65#ibcon#about to read 4, iclass 10, count 2 2006.230.01:48:58.65#ibcon#read 4, iclass 10, count 2 2006.230.01:48:58.65#ibcon#about to read 5, iclass 10, count 2 2006.230.01:48:58.65#ibcon#read 5, iclass 10, count 2 2006.230.01:48:58.65#ibcon#about to read 6, iclass 10, count 2 2006.230.01:48:58.65#ibcon#read 6, iclass 10, count 2 2006.230.01:48:58.65#ibcon#end of sib2, iclass 10, count 2 2006.230.01:48:58.65#ibcon#*mode == 0, iclass 10, count 2 2006.230.01:48:58.65#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.01:48:58.65#ibcon#[25=AT06-04\r\n] 2006.230.01:48:58.65#ibcon#*before write, iclass 10, count 2 2006.230.01:48:58.65#ibcon#enter sib2, iclass 10, count 2 2006.230.01:48:58.65#ibcon#flushed, iclass 10, count 2 2006.230.01:48:58.65#ibcon#about to write, iclass 10, count 2 2006.230.01:48:58.65#ibcon#wrote, iclass 10, count 2 2006.230.01:48:58.65#ibcon#about to read 3, iclass 10, count 2 2006.230.01:48:58.68#ibcon#read 3, iclass 10, count 2 2006.230.01:48:58.68#ibcon#about to read 4, iclass 10, count 2 2006.230.01:48:58.68#ibcon#read 4, iclass 10, count 2 2006.230.01:48:58.68#ibcon#about to read 5, iclass 10, count 2 2006.230.01:48:58.68#ibcon#read 5, iclass 10, count 2 2006.230.01:48:58.68#ibcon#about to read 6, iclass 10, count 2 2006.230.01:48:58.68#ibcon#read 6, iclass 10, count 2 2006.230.01:48:58.68#ibcon#end of sib2, iclass 10, count 2 2006.230.01:48:58.68#ibcon#*after write, iclass 10, count 2 2006.230.01:48:58.68#ibcon#*before return 0, iclass 10, count 2 2006.230.01:48:58.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:48:58.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:48:58.68#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.01:48:58.68#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:58.68#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:48:58.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:48:58.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:48:58.80#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:48:58.80#ibcon#first serial, iclass 10, count 0 2006.230.01:48:58.80#ibcon#enter sib2, iclass 10, count 0 2006.230.01:48:58.80#ibcon#flushed, iclass 10, count 0 2006.230.01:48:58.80#ibcon#about to write, iclass 10, count 0 2006.230.01:48:58.80#ibcon#wrote, iclass 10, count 0 2006.230.01:48:58.80#ibcon#about to read 3, iclass 10, count 0 2006.230.01:48:58.82#ibcon#read 3, iclass 10, count 0 2006.230.01:48:58.82#ibcon#about to read 4, iclass 10, count 0 2006.230.01:48:58.82#ibcon#read 4, iclass 10, count 0 2006.230.01:48:58.82#ibcon#about to read 5, iclass 10, count 0 2006.230.01:48:58.82#ibcon#read 5, iclass 10, count 0 2006.230.01:48:58.82#ibcon#about to read 6, iclass 10, count 0 2006.230.01:48:58.82#ibcon#read 6, iclass 10, count 0 2006.230.01:48:58.82#ibcon#end of sib2, iclass 10, count 0 2006.230.01:48:58.82#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:48:58.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:48:58.82#ibcon#[25=USB\r\n] 2006.230.01:48:58.82#ibcon#*before write, iclass 10, count 0 2006.230.01:48:58.82#ibcon#enter sib2, iclass 10, count 0 2006.230.01:48:58.82#ibcon#flushed, iclass 10, count 0 2006.230.01:48:58.82#ibcon#about to write, iclass 10, count 0 2006.230.01:48:58.82#ibcon#wrote, iclass 10, count 0 2006.230.01:48:58.82#ibcon#about to read 3, iclass 10, count 0 2006.230.01:48:58.85#ibcon#read 3, iclass 10, count 0 2006.230.01:48:58.85#ibcon#about to read 4, iclass 10, count 0 2006.230.01:48:58.85#ibcon#read 4, iclass 10, count 0 2006.230.01:48:58.85#ibcon#about to read 5, iclass 10, count 0 2006.230.01:48:58.85#ibcon#read 5, iclass 10, count 0 2006.230.01:48:58.85#ibcon#about to read 6, iclass 10, count 0 2006.230.01:48:58.85#ibcon#read 6, iclass 10, count 0 2006.230.01:48:58.85#ibcon#end of sib2, iclass 10, count 0 2006.230.01:48:58.85#ibcon#*after write, iclass 10, count 0 2006.230.01:48:58.85#ibcon#*before return 0, iclass 10, count 0 2006.230.01:48:58.85#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:48:58.85#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:48:58.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:48:58.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:48:58.85$vck44/valo=7,864.99 2006.230.01:48:58.85#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.01:48:58.85#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.01:48:58.85#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:58.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:48:58.85#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:48:58.85#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:48:58.85#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:48:58.85#ibcon#first serial, iclass 12, count 0 2006.230.01:48:58.85#ibcon#enter sib2, iclass 12, count 0 2006.230.01:48:58.85#ibcon#flushed, iclass 12, count 0 2006.230.01:48:58.85#ibcon#about to write, iclass 12, count 0 2006.230.01:48:58.85#ibcon#wrote, iclass 12, count 0 2006.230.01:48:58.85#ibcon#about to read 3, iclass 12, count 0 2006.230.01:48:58.87#ibcon#read 3, iclass 12, count 0 2006.230.01:48:58.87#ibcon#about to read 4, iclass 12, count 0 2006.230.01:48:58.87#ibcon#read 4, iclass 12, count 0 2006.230.01:48:58.87#ibcon#about to read 5, iclass 12, count 0 2006.230.01:48:58.87#ibcon#read 5, iclass 12, count 0 2006.230.01:48:58.87#ibcon#about to read 6, iclass 12, count 0 2006.230.01:48:58.87#ibcon#read 6, iclass 12, count 0 2006.230.01:48:58.87#ibcon#end of sib2, iclass 12, count 0 2006.230.01:48:58.87#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:48:58.87#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:48:58.87#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:48:58.87#ibcon#*before write, iclass 12, count 0 2006.230.01:48:58.87#ibcon#enter sib2, iclass 12, count 0 2006.230.01:48:58.87#ibcon#flushed, iclass 12, count 0 2006.230.01:48:58.87#ibcon#about to write, iclass 12, count 0 2006.230.01:48:58.87#ibcon#wrote, iclass 12, count 0 2006.230.01:48:58.87#ibcon#about to read 3, iclass 12, count 0 2006.230.01:48:58.91#ibcon#read 3, iclass 12, count 0 2006.230.01:48:58.91#ibcon#about to read 4, iclass 12, count 0 2006.230.01:48:58.91#ibcon#read 4, iclass 12, count 0 2006.230.01:48:58.91#ibcon#about to read 5, iclass 12, count 0 2006.230.01:48:58.91#ibcon#read 5, iclass 12, count 0 2006.230.01:48:58.91#ibcon#about to read 6, iclass 12, count 0 2006.230.01:48:58.91#ibcon#read 6, iclass 12, count 0 2006.230.01:48:58.91#ibcon#end of sib2, iclass 12, count 0 2006.230.01:48:58.91#ibcon#*after write, iclass 12, count 0 2006.230.01:48:58.91#ibcon#*before return 0, iclass 12, count 0 2006.230.01:48:58.91#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:48:58.91#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:48:58.91#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:48:58.91#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:48:58.91$vck44/va=7,5 2006.230.01:48:58.91#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.01:48:58.91#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.01:48:58.91#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:58.91#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:48:58.97#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:48:58.97#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:48:58.97#ibcon#enter wrdev, iclass 14, count 2 2006.230.01:48:58.97#ibcon#first serial, iclass 14, count 2 2006.230.01:48:58.97#ibcon#enter sib2, iclass 14, count 2 2006.230.01:48:58.97#ibcon#flushed, iclass 14, count 2 2006.230.01:48:58.97#ibcon#about to write, iclass 14, count 2 2006.230.01:48:58.97#ibcon#wrote, iclass 14, count 2 2006.230.01:48:58.97#ibcon#about to read 3, iclass 14, count 2 2006.230.01:48:58.99#ibcon#read 3, iclass 14, count 2 2006.230.01:48:58.99#ibcon#about to read 4, iclass 14, count 2 2006.230.01:48:58.99#ibcon#read 4, iclass 14, count 2 2006.230.01:48:58.99#ibcon#about to read 5, iclass 14, count 2 2006.230.01:48:58.99#ibcon#read 5, iclass 14, count 2 2006.230.01:48:58.99#ibcon#about to read 6, iclass 14, count 2 2006.230.01:48:58.99#ibcon#read 6, iclass 14, count 2 2006.230.01:48:58.99#ibcon#end of sib2, iclass 14, count 2 2006.230.01:48:58.99#ibcon#*mode == 0, iclass 14, count 2 2006.230.01:48:58.99#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.01:48:58.99#ibcon#[25=AT07-05\r\n] 2006.230.01:48:58.99#ibcon#*before write, iclass 14, count 2 2006.230.01:48:58.99#ibcon#enter sib2, iclass 14, count 2 2006.230.01:48:58.99#ibcon#flushed, iclass 14, count 2 2006.230.01:48:58.99#ibcon#about to write, iclass 14, count 2 2006.230.01:48:58.99#ibcon#wrote, iclass 14, count 2 2006.230.01:48:58.99#ibcon#about to read 3, iclass 14, count 2 2006.230.01:48:59.02#ibcon#read 3, iclass 14, count 2 2006.230.01:48:59.02#ibcon#about to read 4, iclass 14, count 2 2006.230.01:48:59.02#ibcon#read 4, iclass 14, count 2 2006.230.01:48:59.02#ibcon#about to read 5, iclass 14, count 2 2006.230.01:48:59.02#ibcon#read 5, iclass 14, count 2 2006.230.01:48:59.02#ibcon#about to read 6, iclass 14, count 2 2006.230.01:48:59.02#ibcon#read 6, iclass 14, count 2 2006.230.01:48:59.02#ibcon#end of sib2, iclass 14, count 2 2006.230.01:48:59.02#ibcon#*after write, iclass 14, count 2 2006.230.01:48:59.02#ibcon#*before return 0, iclass 14, count 2 2006.230.01:48:59.02#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:48:59.02#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:48:59.02#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.01:48:59.02#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:59.02#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:48:59.14#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:48:59.14#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:48:59.14#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:48:59.14#ibcon#first serial, iclass 14, count 0 2006.230.01:48:59.14#ibcon#enter sib2, iclass 14, count 0 2006.230.01:48:59.14#ibcon#flushed, iclass 14, count 0 2006.230.01:48:59.14#ibcon#about to write, iclass 14, count 0 2006.230.01:48:59.14#ibcon#wrote, iclass 14, count 0 2006.230.01:48:59.14#ibcon#about to read 3, iclass 14, count 0 2006.230.01:48:59.16#ibcon#read 3, iclass 14, count 0 2006.230.01:48:59.16#ibcon#about to read 4, iclass 14, count 0 2006.230.01:48:59.16#ibcon#read 4, iclass 14, count 0 2006.230.01:48:59.16#ibcon#about to read 5, iclass 14, count 0 2006.230.01:48:59.16#ibcon#read 5, iclass 14, count 0 2006.230.01:48:59.16#ibcon#about to read 6, iclass 14, count 0 2006.230.01:48:59.16#ibcon#read 6, iclass 14, count 0 2006.230.01:48:59.16#ibcon#end of sib2, iclass 14, count 0 2006.230.01:48:59.16#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:48:59.16#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:48:59.16#ibcon#[25=USB\r\n] 2006.230.01:48:59.16#ibcon#*before write, iclass 14, count 0 2006.230.01:48:59.16#ibcon#enter sib2, iclass 14, count 0 2006.230.01:48:59.16#ibcon#flushed, iclass 14, count 0 2006.230.01:48:59.16#ibcon#about to write, iclass 14, count 0 2006.230.01:48:59.16#ibcon#wrote, iclass 14, count 0 2006.230.01:48:59.16#ibcon#about to read 3, iclass 14, count 0 2006.230.01:48:59.19#ibcon#read 3, iclass 14, count 0 2006.230.01:48:59.19#ibcon#about to read 4, iclass 14, count 0 2006.230.01:48:59.19#ibcon#read 4, iclass 14, count 0 2006.230.01:48:59.19#ibcon#about to read 5, iclass 14, count 0 2006.230.01:48:59.19#ibcon#read 5, iclass 14, count 0 2006.230.01:48:59.19#ibcon#about to read 6, iclass 14, count 0 2006.230.01:48:59.19#ibcon#read 6, iclass 14, count 0 2006.230.01:48:59.19#ibcon#end of sib2, iclass 14, count 0 2006.230.01:48:59.19#ibcon#*after write, iclass 14, count 0 2006.230.01:48:59.19#ibcon#*before return 0, iclass 14, count 0 2006.230.01:48:59.19#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:48:59.19#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:48:59.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:48:59.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:48:59.19$vck44/valo=8,884.99 2006.230.01:48:59.19#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:48:59.19#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:48:59.19#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:59.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:48:59.19#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:48:59.19#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:48:59.19#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:48:59.19#ibcon#first serial, iclass 16, count 0 2006.230.01:48:59.19#ibcon#enter sib2, iclass 16, count 0 2006.230.01:48:59.19#ibcon#flushed, iclass 16, count 0 2006.230.01:48:59.19#ibcon#about to write, iclass 16, count 0 2006.230.01:48:59.19#ibcon#wrote, iclass 16, count 0 2006.230.01:48:59.19#ibcon#about to read 3, iclass 16, count 0 2006.230.01:48:59.21#ibcon#read 3, iclass 16, count 0 2006.230.01:48:59.21#ibcon#about to read 4, iclass 16, count 0 2006.230.01:48:59.21#ibcon#read 4, iclass 16, count 0 2006.230.01:48:59.21#ibcon#about to read 5, iclass 16, count 0 2006.230.01:48:59.21#ibcon#read 5, iclass 16, count 0 2006.230.01:48:59.21#ibcon#about to read 6, iclass 16, count 0 2006.230.01:48:59.21#ibcon#read 6, iclass 16, count 0 2006.230.01:48:59.21#ibcon#end of sib2, iclass 16, count 0 2006.230.01:48:59.21#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:48:59.21#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:48:59.21#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:48:59.21#ibcon#*before write, iclass 16, count 0 2006.230.01:48:59.21#ibcon#enter sib2, iclass 16, count 0 2006.230.01:48:59.21#ibcon#flushed, iclass 16, count 0 2006.230.01:48:59.21#ibcon#about to write, iclass 16, count 0 2006.230.01:48:59.21#ibcon#wrote, iclass 16, count 0 2006.230.01:48:59.21#ibcon#about to read 3, iclass 16, count 0 2006.230.01:48:59.25#ibcon#read 3, iclass 16, count 0 2006.230.01:48:59.25#ibcon#about to read 4, iclass 16, count 0 2006.230.01:48:59.25#ibcon#read 4, iclass 16, count 0 2006.230.01:48:59.25#ibcon#about to read 5, iclass 16, count 0 2006.230.01:48:59.25#ibcon#read 5, iclass 16, count 0 2006.230.01:48:59.25#ibcon#about to read 6, iclass 16, count 0 2006.230.01:48:59.25#ibcon#read 6, iclass 16, count 0 2006.230.01:48:59.25#ibcon#end of sib2, iclass 16, count 0 2006.230.01:48:59.25#ibcon#*after write, iclass 16, count 0 2006.230.01:48:59.25#ibcon#*before return 0, iclass 16, count 0 2006.230.01:48:59.25#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:48:59.25#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:48:59.25#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:48:59.25#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:48:59.25$vck44/va=8,6 2006.230.01:48:59.25#ibcon#iclass 18 nclrec 2 cls_cnt 3 2006.230.01:48:59.25#ibcon#iclass 18 iclrec 1 cls_cnt 3 2006.230.01:48:59.25#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:59.25#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:48:59.31#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:48:59.31#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:48:59.31#ibcon#enter wrdev, iclass 18, count 2 2006.230.01:48:59.31#ibcon#first serial, iclass 18, count 2 2006.230.01:48:59.31#ibcon#enter sib2, iclass 18, count 2 2006.230.01:48:59.31#ibcon#flushed, iclass 18, count 2 2006.230.01:48:59.31#ibcon#about to write, iclass 18, count 2 2006.230.01:48:59.31#ibcon#wrote, iclass 18, count 2 2006.230.01:48:59.31#ibcon#about to read 3, iclass 18, count 2 2006.230.01:48:59.33#ibcon#read 3, iclass 18, count 2 2006.230.01:48:59.33#ibcon#about to read 4, iclass 18, count 2 2006.230.01:48:59.33#ibcon#read 4, iclass 18, count 2 2006.230.01:48:59.33#ibcon#about to read 5, iclass 18, count 2 2006.230.01:48:59.33#ibcon#read 5, iclass 18, count 2 2006.230.01:48:59.33#ibcon#about to read 6, iclass 18, count 2 2006.230.01:48:59.33#ibcon#read 6, iclass 18, count 2 2006.230.01:48:59.33#ibcon#end of sib2, iclass 18, count 2 2006.230.01:48:59.33#ibcon#*mode == 0, iclass 18, count 2 2006.230.01:48:59.33#ibcon#*mode == 0 && serial, iclass 18, count 2 2006.230.01:48:59.33#ibcon#[25=AT08-06\r\n] 2006.230.01:48:59.33#ibcon#*before write, iclass 18, count 2 2006.230.01:48:59.33#ibcon#enter sib2, iclass 18, count 2 2006.230.01:48:59.33#ibcon#flushed, iclass 18, count 2 2006.230.01:48:59.33#ibcon#about to write, iclass 18, count 2 2006.230.01:48:59.33#ibcon#wrote, iclass 18, count 2 2006.230.01:48:59.33#ibcon#about to read 3, iclass 18, count 2 2006.230.01:48:59.36#ibcon#read 3, iclass 18, count 2 2006.230.01:48:59.36#ibcon#about to read 4, iclass 18, count 2 2006.230.01:48:59.36#ibcon#read 4, iclass 18, count 2 2006.230.01:48:59.36#ibcon#about to read 5, iclass 18, count 2 2006.230.01:48:59.36#ibcon#read 5, iclass 18, count 2 2006.230.01:48:59.36#ibcon#about to read 6, iclass 18, count 2 2006.230.01:48:59.36#ibcon#read 6, iclass 18, count 2 2006.230.01:48:59.36#ibcon#end of sib2, iclass 18, count 2 2006.230.01:48:59.36#ibcon#*after write, iclass 18, count 2 2006.230.01:48:59.36#ibcon#*before return 0, iclass 18, count 2 2006.230.01:48:59.36#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:48:59.36#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 2 2006.230.01:48:59.36#ibcon#iclass 18 iclrec 2 cls_cnt 2 2006.230.01:48:59.36#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:59.36#ibcon#before find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:48:59.48#ibcon#after find_delay mode 2, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:48:59.48#ibcon#before mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:48:59.48#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:48:59.48#ibcon#first serial, iclass 18, count 0 2006.230.01:48:59.48#ibcon#enter sib2, iclass 18, count 0 2006.230.01:48:59.48#ibcon#flushed, iclass 18, count 0 2006.230.01:48:59.48#ibcon#about to write, iclass 18, count 0 2006.230.01:48:59.48#ibcon#wrote, iclass 18, count 0 2006.230.01:48:59.48#ibcon#about to read 3, iclass 18, count 0 2006.230.01:48:59.50#ibcon#read 3, iclass 18, count 0 2006.230.01:48:59.50#ibcon#about to read 4, iclass 18, count 0 2006.230.01:48:59.50#ibcon#read 4, iclass 18, count 0 2006.230.01:48:59.50#ibcon#about to read 5, iclass 18, count 0 2006.230.01:48:59.50#ibcon#read 5, iclass 18, count 0 2006.230.01:48:59.50#ibcon#about to read 6, iclass 18, count 0 2006.230.01:48:59.50#ibcon#read 6, iclass 18, count 0 2006.230.01:48:59.50#ibcon#end of sib2, iclass 18, count 0 2006.230.01:48:59.50#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:48:59.50#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:48:59.50#ibcon#[25=USB\r\n] 2006.230.01:48:59.50#ibcon#*before write, iclass 18, count 0 2006.230.01:48:59.50#ibcon#enter sib2, iclass 18, count 0 2006.230.01:48:59.50#ibcon#flushed, iclass 18, count 0 2006.230.01:48:59.50#ibcon#about to write, iclass 18, count 0 2006.230.01:48:59.50#ibcon#wrote, iclass 18, count 0 2006.230.01:48:59.50#ibcon#about to read 3, iclass 18, count 0 2006.230.01:48:59.53#ibcon#read 3, iclass 18, count 0 2006.230.01:48:59.53#ibcon#about to read 4, iclass 18, count 0 2006.230.01:48:59.53#ibcon#read 4, iclass 18, count 0 2006.230.01:48:59.53#ibcon#about to read 5, iclass 18, count 0 2006.230.01:48:59.53#ibcon#read 5, iclass 18, count 0 2006.230.01:48:59.53#ibcon#about to read 6, iclass 18, count 0 2006.230.01:48:59.53#ibcon#read 6, iclass 18, count 0 2006.230.01:48:59.53#ibcon#end of sib2, iclass 18, count 0 2006.230.01:48:59.53#ibcon#*after write, iclass 18, count 0 2006.230.01:48:59.53#ibcon#*before return 0, iclass 18, count 0 2006.230.01:48:59.53#ibcon#after mode 2 write, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:48:59.53#ibcon#end of loop, iclass 18 iclrec 2 cls_cnt 0 2006.230.01:48:59.53#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:48:59.53#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:48:59.53$vck44/vblo=1,629.99 2006.230.01:48:59.53#ibcon#iclass 20 nclrec 1 cls_cnt 2 2006.230.01:48:59.53#ibcon#iclass 20 iclrec 1 cls_cnt 2 2006.230.01:48:59.53#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:59.53#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:48:59.53#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:48:59.53#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:48:59.53#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:48:59.53#ibcon#first serial, iclass 20, count 0 2006.230.01:48:59.53#ibcon#enter sib2, iclass 20, count 0 2006.230.01:48:59.53#ibcon#flushed, iclass 20, count 0 2006.230.01:48:59.53#ibcon#about to write, iclass 20, count 0 2006.230.01:48:59.53#ibcon#wrote, iclass 20, count 0 2006.230.01:48:59.53#ibcon#about to read 3, iclass 20, count 0 2006.230.01:48:59.55#ibcon#read 3, iclass 20, count 0 2006.230.01:48:59.55#ibcon#about to read 4, iclass 20, count 0 2006.230.01:48:59.55#ibcon#read 4, iclass 20, count 0 2006.230.01:48:59.55#ibcon#about to read 5, iclass 20, count 0 2006.230.01:48:59.55#ibcon#read 5, iclass 20, count 0 2006.230.01:48:59.55#ibcon#about to read 6, iclass 20, count 0 2006.230.01:48:59.55#ibcon#read 6, iclass 20, count 0 2006.230.01:48:59.55#ibcon#end of sib2, iclass 20, count 0 2006.230.01:48:59.55#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:48:59.55#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:48:59.55#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:48:59.55#ibcon#*before write, iclass 20, count 0 2006.230.01:48:59.55#ibcon#enter sib2, iclass 20, count 0 2006.230.01:48:59.55#ibcon#flushed, iclass 20, count 0 2006.230.01:48:59.55#ibcon#about to write, iclass 20, count 0 2006.230.01:48:59.55#ibcon#wrote, iclass 20, count 0 2006.230.01:48:59.55#ibcon#about to read 3, iclass 20, count 0 2006.230.01:48:59.59#ibcon#read 3, iclass 20, count 0 2006.230.01:48:59.59#ibcon#about to read 4, iclass 20, count 0 2006.230.01:48:59.59#ibcon#read 4, iclass 20, count 0 2006.230.01:48:59.59#ibcon#about to read 5, iclass 20, count 0 2006.230.01:48:59.59#ibcon#read 5, iclass 20, count 0 2006.230.01:48:59.59#ibcon#about to read 6, iclass 20, count 0 2006.230.01:48:59.59#ibcon#read 6, iclass 20, count 0 2006.230.01:48:59.59#ibcon#end of sib2, iclass 20, count 0 2006.230.01:48:59.59#ibcon#*after write, iclass 20, count 0 2006.230.01:48:59.59#ibcon#*before return 0, iclass 20, count 0 2006.230.01:48:59.59#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:48:59.59#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 0 2006.230.01:48:59.59#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:48:59.59#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:48:59.59$vck44/vb=1,4 2006.230.01:48:59.59#ibcon#iclass 22 nclrec 2 cls_cnt 3 2006.230.01:48:59.59#ibcon#iclass 22 iclrec 1 cls_cnt 3 2006.230.01:48:59.59#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:59.59#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:48:59.59#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:48:59.59#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:48:59.59#ibcon#enter wrdev, iclass 22, count 2 2006.230.01:48:59.59#ibcon#first serial, iclass 22, count 2 2006.230.01:48:59.59#ibcon#enter sib2, iclass 22, count 2 2006.230.01:48:59.59#ibcon#flushed, iclass 22, count 2 2006.230.01:48:59.59#ibcon#about to write, iclass 22, count 2 2006.230.01:48:59.59#ibcon#wrote, iclass 22, count 2 2006.230.01:48:59.59#ibcon#about to read 3, iclass 22, count 2 2006.230.01:48:59.61#ibcon#read 3, iclass 22, count 2 2006.230.01:48:59.61#ibcon#about to read 4, iclass 22, count 2 2006.230.01:48:59.61#ibcon#read 4, iclass 22, count 2 2006.230.01:48:59.61#ibcon#about to read 5, iclass 22, count 2 2006.230.01:48:59.61#ibcon#read 5, iclass 22, count 2 2006.230.01:48:59.61#ibcon#about to read 6, iclass 22, count 2 2006.230.01:48:59.61#ibcon#read 6, iclass 22, count 2 2006.230.01:48:59.61#ibcon#end of sib2, iclass 22, count 2 2006.230.01:48:59.61#ibcon#*mode == 0, iclass 22, count 2 2006.230.01:48:59.61#ibcon#*mode == 0 && serial, iclass 22, count 2 2006.230.01:48:59.61#ibcon#[27=AT01-04\r\n] 2006.230.01:48:59.61#ibcon#*before write, iclass 22, count 2 2006.230.01:48:59.61#ibcon#enter sib2, iclass 22, count 2 2006.230.01:48:59.61#ibcon#flushed, iclass 22, count 2 2006.230.01:48:59.61#ibcon#about to write, iclass 22, count 2 2006.230.01:48:59.61#ibcon#wrote, iclass 22, count 2 2006.230.01:48:59.61#ibcon#about to read 3, iclass 22, count 2 2006.230.01:48:59.64#ibcon#read 3, iclass 22, count 2 2006.230.01:48:59.64#ibcon#about to read 4, iclass 22, count 2 2006.230.01:48:59.64#ibcon#read 4, iclass 22, count 2 2006.230.01:48:59.64#ibcon#about to read 5, iclass 22, count 2 2006.230.01:48:59.64#ibcon#read 5, iclass 22, count 2 2006.230.01:48:59.64#ibcon#about to read 6, iclass 22, count 2 2006.230.01:48:59.64#ibcon#read 6, iclass 22, count 2 2006.230.01:48:59.64#ibcon#end of sib2, iclass 22, count 2 2006.230.01:48:59.64#ibcon#*after write, iclass 22, count 2 2006.230.01:48:59.64#ibcon#*before return 0, iclass 22, count 2 2006.230.01:48:59.64#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:48:59.64#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 2 2006.230.01:48:59.64#ibcon#iclass 22 iclrec 2 cls_cnt 2 2006.230.01:48:59.64#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:59.64#ibcon#before find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:48:59.76#ibcon#after find_delay mode 2, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:48:59.76#ibcon#before mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:48:59.76#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:48:59.76#ibcon#first serial, iclass 22, count 0 2006.230.01:48:59.76#ibcon#enter sib2, iclass 22, count 0 2006.230.01:48:59.76#ibcon#flushed, iclass 22, count 0 2006.230.01:48:59.76#ibcon#about to write, iclass 22, count 0 2006.230.01:48:59.76#ibcon#wrote, iclass 22, count 0 2006.230.01:48:59.76#ibcon#about to read 3, iclass 22, count 0 2006.230.01:48:59.78#ibcon#read 3, iclass 22, count 0 2006.230.01:48:59.78#ibcon#about to read 4, iclass 22, count 0 2006.230.01:48:59.78#ibcon#read 4, iclass 22, count 0 2006.230.01:48:59.78#ibcon#about to read 5, iclass 22, count 0 2006.230.01:48:59.78#ibcon#read 5, iclass 22, count 0 2006.230.01:48:59.78#ibcon#about to read 6, iclass 22, count 0 2006.230.01:48:59.78#ibcon#read 6, iclass 22, count 0 2006.230.01:48:59.78#ibcon#end of sib2, iclass 22, count 0 2006.230.01:48:59.78#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:48:59.78#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:48:59.78#ibcon#[27=USB\r\n] 2006.230.01:48:59.78#ibcon#*before write, iclass 22, count 0 2006.230.01:48:59.78#ibcon#enter sib2, iclass 22, count 0 2006.230.01:48:59.78#ibcon#flushed, iclass 22, count 0 2006.230.01:48:59.78#ibcon#about to write, iclass 22, count 0 2006.230.01:48:59.78#ibcon#wrote, iclass 22, count 0 2006.230.01:48:59.78#ibcon#about to read 3, iclass 22, count 0 2006.230.01:48:59.81#ibcon#read 3, iclass 22, count 0 2006.230.01:48:59.81#ibcon#about to read 4, iclass 22, count 0 2006.230.01:48:59.81#ibcon#read 4, iclass 22, count 0 2006.230.01:48:59.81#ibcon#about to read 5, iclass 22, count 0 2006.230.01:48:59.81#ibcon#read 5, iclass 22, count 0 2006.230.01:48:59.81#ibcon#about to read 6, iclass 22, count 0 2006.230.01:48:59.81#ibcon#read 6, iclass 22, count 0 2006.230.01:48:59.81#ibcon#end of sib2, iclass 22, count 0 2006.230.01:48:59.81#ibcon#*after write, iclass 22, count 0 2006.230.01:48:59.81#ibcon#*before return 0, iclass 22, count 0 2006.230.01:48:59.81#ibcon#after mode 2 write, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:48:59.81#ibcon#end of loop, iclass 22 iclrec 2 cls_cnt 0 2006.230.01:48:59.81#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:48:59.81#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:48:59.81$vck44/vblo=2,634.99 2006.230.01:48:59.81#ibcon#iclass 24 nclrec 1 cls_cnt 2 2006.230.01:48:59.81#ibcon#iclass 24 iclrec 1 cls_cnt 2 2006.230.01:48:59.81#ibcon#ireg 17 cls_cnt 0 2006.230.01:48:59.81#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:59.81#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:59.81#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:59.81#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:48:59.81#ibcon#first serial, iclass 24, count 0 2006.230.01:48:59.81#ibcon#enter sib2, iclass 24, count 0 2006.230.01:48:59.81#ibcon#flushed, iclass 24, count 0 2006.230.01:48:59.81#ibcon#about to write, iclass 24, count 0 2006.230.01:48:59.81#ibcon#wrote, iclass 24, count 0 2006.230.01:48:59.81#ibcon#about to read 3, iclass 24, count 0 2006.230.01:48:59.84#ibcon#read 3, iclass 24, count 0 2006.230.01:48:59.84#ibcon#about to read 4, iclass 24, count 0 2006.230.01:48:59.84#ibcon#read 4, iclass 24, count 0 2006.230.01:48:59.84#ibcon#about to read 5, iclass 24, count 0 2006.230.01:48:59.84#ibcon#read 5, iclass 24, count 0 2006.230.01:48:59.84#ibcon#about to read 6, iclass 24, count 0 2006.230.01:48:59.84#ibcon#read 6, iclass 24, count 0 2006.230.01:48:59.84#ibcon#end of sib2, iclass 24, count 0 2006.230.01:48:59.84#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:48:59.84#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:48:59.84#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:48:59.84#ibcon#*before write, iclass 24, count 0 2006.230.01:48:59.84#ibcon#enter sib2, iclass 24, count 0 2006.230.01:48:59.84#ibcon#flushed, iclass 24, count 0 2006.230.01:48:59.84#ibcon#about to write, iclass 24, count 0 2006.230.01:48:59.84#ibcon#wrote, iclass 24, count 0 2006.230.01:48:59.84#ibcon#about to read 3, iclass 24, count 0 2006.230.01:48:59.87#ibcon#read 3, iclass 24, count 0 2006.230.01:48:59.87#ibcon#about to read 4, iclass 24, count 0 2006.230.01:48:59.87#ibcon#read 4, iclass 24, count 0 2006.230.01:48:59.87#ibcon#about to read 5, iclass 24, count 0 2006.230.01:48:59.87#ibcon#read 5, iclass 24, count 0 2006.230.01:48:59.87#ibcon#about to read 6, iclass 24, count 0 2006.230.01:48:59.87#ibcon#read 6, iclass 24, count 0 2006.230.01:48:59.87#ibcon#end of sib2, iclass 24, count 0 2006.230.01:48:59.87#ibcon#*after write, iclass 24, count 0 2006.230.01:48:59.87#ibcon#*before return 0, iclass 24, count 0 2006.230.01:48:59.87#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:59.87#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 0 2006.230.01:48:59.87#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:48:59.87#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:48:59.87$vck44/vb=2,4 2006.230.01:48:59.87#ibcon#iclass 26 nclrec 2 cls_cnt 3 2006.230.01:48:59.87#ibcon#iclass 26 iclrec 1 cls_cnt 3 2006.230.01:48:59.87#ibcon#ireg 11 cls_cnt 2 2006.230.01:48:59.87#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:59.93#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:59.93#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:59.93#ibcon#enter wrdev, iclass 26, count 2 2006.230.01:48:59.93#ibcon#first serial, iclass 26, count 2 2006.230.01:48:59.93#ibcon#enter sib2, iclass 26, count 2 2006.230.01:48:59.93#ibcon#flushed, iclass 26, count 2 2006.230.01:48:59.93#ibcon#about to write, iclass 26, count 2 2006.230.01:48:59.93#ibcon#wrote, iclass 26, count 2 2006.230.01:48:59.93#ibcon#about to read 3, iclass 26, count 2 2006.230.01:48:59.95#ibcon#read 3, iclass 26, count 2 2006.230.01:48:59.95#ibcon#about to read 4, iclass 26, count 2 2006.230.01:48:59.95#ibcon#read 4, iclass 26, count 2 2006.230.01:48:59.95#ibcon#about to read 5, iclass 26, count 2 2006.230.01:48:59.95#ibcon#read 5, iclass 26, count 2 2006.230.01:48:59.95#ibcon#about to read 6, iclass 26, count 2 2006.230.01:48:59.95#ibcon#read 6, iclass 26, count 2 2006.230.01:48:59.95#ibcon#end of sib2, iclass 26, count 2 2006.230.01:48:59.95#ibcon#*mode == 0, iclass 26, count 2 2006.230.01:48:59.95#ibcon#*mode == 0 && serial, iclass 26, count 2 2006.230.01:48:59.95#ibcon#[27=AT02-04\r\n] 2006.230.01:48:59.95#ibcon#*before write, iclass 26, count 2 2006.230.01:48:59.95#ibcon#enter sib2, iclass 26, count 2 2006.230.01:48:59.95#ibcon#flushed, iclass 26, count 2 2006.230.01:48:59.95#ibcon#about to write, iclass 26, count 2 2006.230.01:48:59.95#ibcon#wrote, iclass 26, count 2 2006.230.01:48:59.95#ibcon#about to read 3, iclass 26, count 2 2006.230.01:48:59.98#ibcon#read 3, iclass 26, count 2 2006.230.01:48:59.98#ibcon#about to read 4, iclass 26, count 2 2006.230.01:48:59.98#ibcon#read 4, iclass 26, count 2 2006.230.01:48:59.98#ibcon#about to read 5, iclass 26, count 2 2006.230.01:48:59.98#ibcon#read 5, iclass 26, count 2 2006.230.01:48:59.98#ibcon#about to read 6, iclass 26, count 2 2006.230.01:48:59.98#ibcon#read 6, iclass 26, count 2 2006.230.01:48:59.98#ibcon#end of sib2, iclass 26, count 2 2006.230.01:48:59.98#ibcon#*after write, iclass 26, count 2 2006.230.01:48:59.98#ibcon#*before return 0, iclass 26, count 2 2006.230.01:48:59.98#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:59.98#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 2 2006.230.01:48:59.98#ibcon#iclass 26 iclrec 2 cls_cnt 2 2006.230.01:48:59.98#ibcon#ireg 7 cls_cnt 0 2006.230.01:48:59.98#ibcon#before find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:49:00.10#ibcon#after find_delay mode 2, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:49:00.10#ibcon#before mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:49:00.10#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:49:00.10#ibcon#first serial, iclass 26, count 0 2006.230.01:49:00.10#ibcon#enter sib2, iclass 26, count 0 2006.230.01:49:00.10#ibcon#flushed, iclass 26, count 0 2006.230.01:49:00.10#ibcon#about to write, iclass 26, count 0 2006.230.01:49:00.10#ibcon#wrote, iclass 26, count 0 2006.230.01:49:00.10#ibcon#about to read 3, iclass 26, count 0 2006.230.01:49:00.12#ibcon#read 3, iclass 26, count 0 2006.230.01:49:00.12#ibcon#about to read 4, iclass 26, count 0 2006.230.01:49:00.12#ibcon#read 4, iclass 26, count 0 2006.230.01:49:00.12#ibcon#about to read 5, iclass 26, count 0 2006.230.01:49:00.12#ibcon#read 5, iclass 26, count 0 2006.230.01:49:00.12#ibcon#about to read 6, iclass 26, count 0 2006.230.01:49:00.12#ibcon#read 6, iclass 26, count 0 2006.230.01:49:00.12#ibcon#end of sib2, iclass 26, count 0 2006.230.01:49:00.12#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:49:00.12#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:49:00.12#ibcon#[27=USB\r\n] 2006.230.01:49:00.12#ibcon#*before write, iclass 26, count 0 2006.230.01:49:00.12#ibcon#enter sib2, iclass 26, count 0 2006.230.01:49:00.12#ibcon#flushed, iclass 26, count 0 2006.230.01:49:00.12#ibcon#about to write, iclass 26, count 0 2006.230.01:49:00.12#ibcon#wrote, iclass 26, count 0 2006.230.01:49:00.12#ibcon#about to read 3, iclass 26, count 0 2006.230.01:49:00.15#ibcon#read 3, iclass 26, count 0 2006.230.01:49:00.15#ibcon#about to read 4, iclass 26, count 0 2006.230.01:49:00.15#ibcon#read 4, iclass 26, count 0 2006.230.01:49:00.15#ibcon#about to read 5, iclass 26, count 0 2006.230.01:49:00.15#ibcon#read 5, iclass 26, count 0 2006.230.01:49:00.15#ibcon#about to read 6, iclass 26, count 0 2006.230.01:49:00.15#ibcon#read 6, iclass 26, count 0 2006.230.01:49:00.15#ibcon#end of sib2, iclass 26, count 0 2006.230.01:49:00.15#ibcon#*after write, iclass 26, count 0 2006.230.01:49:00.15#ibcon#*before return 0, iclass 26, count 0 2006.230.01:49:00.15#ibcon#after mode 2 write, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:49:00.15#ibcon#end of loop, iclass 26 iclrec 2 cls_cnt 0 2006.230.01:49:00.15#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:49:00.15#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:49:00.15$vck44/vblo=3,649.99 2006.230.01:49:00.15#ibcon#iclass 28 nclrec 1 cls_cnt 2 2006.230.01:49:00.15#ibcon#iclass 28 iclrec 1 cls_cnt 2 2006.230.01:49:00.15#ibcon#ireg 17 cls_cnt 0 2006.230.01:49:00.15#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:49:00.15#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:49:00.15#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:49:00.15#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:49:00.15#ibcon#first serial, iclass 28, count 0 2006.230.01:49:00.15#ibcon#enter sib2, iclass 28, count 0 2006.230.01:49:00.15#ibcon#flushed, iclass 28, count 0 2006.230.01:49:00.15#ibcon#about to write, iclass 28, count 0 2006.230.01:49:00.15#ibcon#wrote, iclass 28, count 0 2006.230.01:49:00.15#ibcon#about to read 3, iclass 28, count 0 2006.230.01:49:00.17#ibcon#read 3, iclass 28, count 0 2006.230.01:49:00.17#ibcon#about to read 4, iclass 28, count 0 2006.230.01:49:00.17#ibcon#read 4, iclass 28, count 0 2006.230.01:49:00.17#ibcon#about to read 5, iclass 28, count 0 2006.230.01:49:00.17#ibcon#read 5, iclass 28, count 0 2006.230.01:49:00.17#ibcon#about to read 6, iclass 28, count 0 2006.230.01:49:00.17#ibcon#read 6, iclass 28, count 0 2006.230.01:49:00.17#ibcon#end of sib2, iclass 28, count 0 2006.230.01:49:00.17#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:49:00.17#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:49:00.17#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:49:00.17#ibcon#*before write, iclass 28, count 0 2006.230.01:49:00.17#ibcon#enter sib2, iclass 28, count 0 2006.230.01:49:00.17#ibcon#flushed, iclass 28, count 0 2006.230.01:49:00.17#ibcon#about to write, iclass 28, count 0 2006.230.01:49:00.17#ibcon#wrote, iclass 28, count 0 2006.230.01:49:00.17#ibcon#about to read 3, iclass 28, count 0 2006.230.01:49:00.21#ibcon#read 3, iclass 28, count 0 2006.230.01:49:00.21#ibcon#about to read 4, iclass 28, count 0 2006.230.01:49:00.21#ibcon#read 4, iclass 28, count 0 2006.230.01:49:00.21#ibcon#about to read 5, iclass 28, count 0 2006.230.01:49:00.21#ibcon#read 5, iclass 28, count 0 2006.230.01:49:00.21#ibcon#about to read 6, iclass 28, count 0 2006.230.01:49:00.21#ibcon#read 6, iclass 28, count 0 2006.230.01:49:00.21#ibcon#end of sib2, iclass 28, count 0 2006.230.01:49:00.21#ibcon#*after write, iclass 28, count 0 2006.230.01:49:00.21#ibcon#*before return 0, iclass 28, count 0 2006.230.01:49:00.21#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:49:00.21#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 0 2006.230.01:49:00.21#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:49:00.21#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:49:00.21$vck44/vb=3,4 2006.230.01:49:00.21#ibcon#iclass 30 nclrec 2 cls_cnt 3 2006.230.01:49:00.21#ibcon#iclass 30 iclrec 1 cls_cnt 3 2006.230.01:49:00.21#ibcon#ireg 11 cls_cnt 2 2006.230.01:49:00.21#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:49:00.27#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:49:00.27#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:49:00.27#ibcon#enter wrdev, iclass 30, count 2 2006.230.01:49:00.27#ibcon#first serial, iclass 30, count 2 2006.230.01:49:00.27#ibcon#enter sib2, iclass 30, count 2 2006.230.01:49:00.27#ibcon#flushed, iclass 30, count 2 2006.230.01:49:00.27#ibcon#about to write, iclass 30, count 2 2006.230.01:49:00.27#ibcon#wrote, iclass 30, count 2 2006.230.01:49:00.27#ibcon#about to read 3, iclass 30, count 2 2006.230.01:49:00.29#ibcon#read 3, iclass 30, count 2 2006.230.01:49:00.29#ibcon#about to read 4, iclass 30, count 2 2006.230.01:49:00.29#ibcon#read 4, iclass 30, count 2 2006.230.01:49:00.29#ibcon#about to read 5, iclass 30, count 2 2006.230.01:49:00.29#ibcon#read 5, iclass 30, count 2 2006.230.01:49:00.29#ibcon#about to read 6, iclass 30, count 2 2006.230.01:49:00.29#ibcon#read 6, iclass 30, count 2 2006.230.01:49:00.29#ibcon#end of sib2, iclass 30, count 2 2006.230.01:49:00.29#ibcon#*mode == 0, iclass 30, count 2 2006.230.01:49:00.29#ibcon#*mode == 0 && serial, iclass 30, count 2 2006.230.01:49:00.29#ibcon#[27=AT03-04\r\n] 2006.230.01:49:00.29#ibcon#*before write, iclass 30, count 2 2006.230.01:49:00.29#ibcon#enter sib2, iclass 30, count 2 2006.230.01:49:00.29#ibcon#flushed, iclass 30, count 2 2006.230.01:49:00.29#ibcon#about to write, iclass 30, count 2 2006.230.01:49:00.29#ibcon#wrote, iclass 30, count 2 2006.230.01:49:00.29#ibcon#about to read 3, iclass 30, count 2 2006.230.01:49:00.32#ibcon#read 3, iclass 30, count 2 2006.230.01:49:00.32#ibcon#about to read 4, iclass 30, count 2 2006.230.01:49:00.32#ibcon#read 4, iclass 30, count 2 2006.230.01:49:00.32#ibcon#about to read 5, iclass 30, count 2 2006.230.01:49:00.32#ibcon#read 5, iclass 30, count 2 2006.230.01:49:00.32#ibcon#about to read 6, iclass 30, count 2 2006.230.01:49:00.32#ibcon#read 6, iclass 30, count 2 2006.230.01:49:00.32#ibcon#end of sib2, iclass 30, count 2 2006.230.01:49:00.32#ibcon#*after write, iclass 30, count 2 2006.230.01:49:00.32#ibcon#*before return 0, iclass 30, count 2 2006.230.01:49:00.32#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:49:00.32#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 2 2006.230.01:49:00.32#ibcon#iclass 30 iclrec 2 cls_cnt 2 2006.230.01:49:00.32#ibcon#ireg 7 cls_cnt 0 2006.230.01:49:00.32#ibcon#before find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:49:00.44#ibcon#after find_delay mode 2, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:49:00.44#ibcon#before mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:49:00.44#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:49:00.44#ibcon#first serial, iclass 30, count 0 2006.230.01:49:00.44#ibcon#enter sib2, iclass 30, count 0 2006.230.01:49:00.44#ibcon#flushed, iclass 30, count 0 2006.230.01:49:00.44#ibcon#about to write, iclass 30, count 0 2006.230.01:49:00.44#ibcon#wrote, iclass 30, count 0 2006.230.01:49:00.44#ibcon#about to read 3, iclass 30, count 0 2006.230.01:49:00.46#ibcon#read 3, iclass 30, count 0 2006.230.01:49:00.46#ibcon#about to read 4, iclass 30, count 0 2006.230.01:49:00.46#ibcon#read 4, iclass 30, count 0 2006.230.01:49:00.46#ibcon#about to read 5, iclass 30, count 0 2006.230.01:49:00.46#ibcon#read 5, iclass 30, count 0 2006.230.01:49:00.46#ibcon#about to read 6, iclass 30, count 0 2006.230.01:49:00.46#ibcon#read 6, iclass 30, count 0 2006.230.01:49:00.46#ibcon#end of sib2, iclass 30, count 0 2006.230.01:49:00.46#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:49:00.46#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:49:00.46#ibcon#[27=USB\r\n] 2006.230.01:49:00.46#ibcon#*before write, iclass 30, count 0 2006.230.01:49:00.46#ibcon#enter sib2, iclass 30, count 0 2006.230.01:49:00.46#ibcon#flushed, iclass 30, count 0 2006.230.01:49:00.46#ibcon#about to write, iclass 30, count 0 2006.230.01:49:00.46#ibcon#wrote, iclass 30, count 0 2006.230.01:49:00.46#ibcon#about to read 3, iclass 30, count 0 2006.230.01:49:00.49#ibcon#read 3, iclass 30, count 0 2006.230.01:49:00.49#ibcon#about to read 4, iclass 30, count 0 2006.230.01:49:00.49#ibcon#read 4, iclass 30, count 0 2006.230.01:49:00.49#ibcon#about to read 5, iclass 30, count 0 2006.230.01:49:00.49#ibcon#read 5, iclass 30, count 0 2006.230.01:49:00.49#ibcon#about to read 6, iclass 30, count 0 2006.230.01:49:00.49#ibcon#read 6, iclass 30, count 0 2006.230.01:49:00.49#ibcon#end of sib2, iclass 30, count 0 2006.230.01:49:00.49#ibcon#*after write, iclass 30, count 0 2006.230.01:49:00.49#ibcon#*before return 0, iclass 30, count 0 2006.230.01:49:00.49#ibcon#after mode 2 write, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:49:00.49#ibcon#end of loop, iclass 30 iclrec 2 cls_cnt 0 2006.230.01:49:00.49#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:49:00.49#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:49:00.49$vck44/vblo=4,679.99 2006.230.01:49:00.49#ibcon#iclass 32 nclrec 1 cls_cnt 2 2006.230.01:49:00.49#ibcon#iclass 32 iclrec 1 cls_cnt 2 2006.230.01:49:00.49#ibcon#ireg 17 cls_cnt 0 2006.230.01:49:00.49#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:49:00.49#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:49:00.49#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:49:00.49#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:49:00.49#ibcon#first serial, iclass 32, count 0 2006.230.01:49:00.49#ibcon#enter sib2, iclass 32, count 0 2006.230.01:49:00.49#ibcon#flushed, iclass 32, count 0 2006.230.01:49:00.49#ibcon#about to write, iclass 32, count 0 2006.230.01:49:00.49#ibcon#wrote, iclass 32, count 0 2006.230.01:49:00.49#ibcon#about to read 3, iclass 32, count 0 2006.230.01:49:00.52#ibcon#read 3, iclass 32, count 0 2006.230.01:49:00.52#ibcon#about to read 4, iclass 32, count 0 2006.230.01:49:00.52#ibcon#read 4, iclass 32, count 0 2006.230.01:49:00.52#ibcon#about to read 5, iclass 32, count 0 2006.230.01:49:00.52#ibcon#read 5, iclass 32, count 0 2006.230.01:49:00.52#ibcon#about to read 6, iclass 32, count 0 2006.230.01:49:00.52#ibcon#read 6, iclass 32, count 0 2006.230.01:49:00.52#ibcon#end of sib2, iclass 32, count 0 2006.230.01:49:00.52#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:49:00.52#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:49:00.52#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:49:00.52#ibcon#*before write, iclass 32, count 0 2006.230.01:49:00.52#ibcon#enter sib2, iclass 32, count 0 2006.230.01:49:00.52#ibcon#flushed, iclass 32, count 0 2006.230.01:49:00.52#ibcon#about to write, iclass 32, count 0 2006.230.01:49:00.52#ibcon#wrote, iclass 32, count 0 2006.230.01:49:00.52#ibcon#about to read 3, iclass 32, count 0 2006.230.01:49:00.56#ibcon#read 3, iclass 32, count 0 2006.230.01:49:00.56#ibcon#about to read 4, iclass 32, count 0 2006.230.01:49:00.56#ibcon#read 4, iclass 32, count 0 2006.230.01:49:00.56#ibcon#about to read 5, iclass 32, count 0 2006.230.01:49:00.56#ibcon#read 5, iclass 32, count 0 2006.230.01:49:00.56#ibcon#about to read 6, iclass 32, count 0 2006.230.01:49:00.56#ibcon#read 6, iclass 32, count 0 2006.230.01:49:00.56#ibcon#end of sib2, iclass 32, count 0 2006.230.01:49:00.56#ibcon#*after write, iclass 32, count 0 2006.230.01:49:00.56#ibcon#*before return 0, iclass 32, count 0 2006.230.01:49:00.56#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:49:00.56#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 0 2006.230.01:49:00.56#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:49:00.56#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:49:00.56$vck44/vb=4,4 2006.230.01:49:00.56#ibcon#iclass 34 nclrec 2 cls_cnt 3 2006.230.01:49:00.56#ibcon#iclass 34 iclrec 1 cls_cnt 3 2006.230.01:49:00.56#ibcon#ireg 11 cls_cnt 2 2006.230.01:49:00.56#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:49:00.61#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:49:00.61#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:49:00.61#ibcon#enter wrdev, iclass 34, count 2 2006.230.01:49:00.61#ibcon#first serial, iclass 34, count 2 2006.230.01:49:00.61#ibcon#enter sib2, iclass 34, count 2 2006.230.01:49:00.61#ibcon#flushed, iclass 34, count 2 2006.230.01:49:00.61#ibcon#about to write, iclass 34, count 2 2006.230.01:49:00.61#ibcon#wrote, iclass 34, count 2 2006.230.01:49:00.61#ibcon#about to read 3, iclass 34, count 2 2006.230.01:49:00.63#ibcon#read 3, iclass 34, count 2 2006.230.01:49:00.63#ibcon#about to read 4, iclass 34, count 2 2006.230.01:49:00.63#ibcon#read 4, iclass 34, count 2 2006.230.01:49:00.63#ibcon#about to read 5, iclass 34, count 2 2006.230.01:49:00.63#ibcon#read 5, iclass 34, count 2 2006.230.01:49:00.63#ibcon#about to read 6, iclass 34, count 2 2006.230.01:49:00.63#ibcon#read 6, iclass 34, count 2 2006.230.01:49:00.63#ibcon#end of sib2, iclass 34, count 2 2006.230.01:49:00.63#ibcon#*mode == 0, iclass 34, count 2 2006.230.01:49:00.63#ibcon#*mode == 0 && serial, iclass 34, count 2 2006.230.01:49:00.63#ibcon#[27=AT04-04\r\n] 2006.230.01:49:00.63#ibcon#*before write, iclass 34, count 2 2006.230.01:49:00.63#ibcon#enter sib2, iclass 34, count 2 2006.230.01:49:00.63#ibcon#flushed, iclass 34, count 2 2006.230.01:49:00.63#ibcon#about to write, iclass 34, count 2 2006.230.01:49:00.63#ibcon#wrote, iclass 34, count 2 2006.230.01:49:00.63#ibcon#about to read 3, iclass 34, count 2 2006.230.01:49:00.66#ibcon#read 3, iclass 34, count 2 2006.230.01:49:00.66#ibcon#about to read 4, iclass 34, count 2 2006.230.01:49:00.66#ibcon#read 4, iclass 34, count 2 2006.230.01:49:00.66#ibcon#about to read 5, iclass 34, count 2 2006.230.01:49:00.66#ibcon#read 5, iclass 34, count 2 2006.230.01:49:00.66#ibcon#about to read 6, iclass 34, count 2 2006.230.01:49:00.66#ibcon#read 6, iclass 34, count 2 2006.230.01:49:00.66#ibcon#end of sib2, iclass 34, count 2 2006.230.01:49:00.66#ibcon#*after write, iclass 34, count 2 2006.230.01:49:00.66#ibcon#*before return 0, iclass 34, count 2 2006.230.01:49:00.66#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:49:00.66#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 2 2006.230.01:49:00.66#ibcon#iclass 34 iclrec 2 cls_cnt 2 2006.230.01:49:00.66#ibcon#ireg 7 cls_cnt 0 2006.230.01:49:00.66#ibcon#before find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:49:00.78#ibcon#after find_delay mode 2, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:49:00.78#ibcon#before mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:49:00.78#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:49:00.78#ibcon#first serial, iclass 34, count 0 2006.230.01:49:00.78#ibcon#enter sib2, iclass 34, count 0 2006.230.01:49:00.78#ibcon#flushed, iclass 34, count 0 2006.230.01:49:00.78#ibcon#about to write, iclass 34, count 0 2006.230.01:49:00.78#ibcon#wrote, iclass 34, count 0 2006.230.01:49:00.78#ibcon#about to read 3, iclass 34, count 0 2006.230.01:49:00.80#ibcon#read 3, iclass 34, count 0 2006.230.01:49:00.80#ibcon#about to read 4, iclass 34, count 0 2006.230.01:49:00.80#ibcon#read 4, iclass 34, count 0 2006.230.01:49:00.80#ibcon#about to read 5, iclass 34, count 0 2006.230.01:49:00.80#ibcon#read 5, iclass 34, count 0 2006.230.01:49:00.80#ibcon#about to read 6, iclass 34, count 0 2006.230.01:49:00.80#ibcon#read 6, iclass 34, count 0 2006.230.01:49:00.80#ibcon#end of sib2, iclass 34, count 0 2006.230.01:49:00.80#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:49:00.80#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:49:00.80#ibcon#[27=USB\r\n] 2006.230.01:49:00.80#ibcon#*before write, iclass 34, count 0 2006.230.01:49:00.80#ibcon#enter sib2, iclass 34, count 0 2006.230.01:49:00.80#ibcon#flushed, iclass 34, count 0 2006.230.01:49:00.80#ibcon#about to write, iclass 34, count 0 2006.230.01:49:00.80#ibcon#wrote, iclass 34, count 0 2006.230.01:49:00.80#ibcon#about to read 3, iclass 34, count 0 2006.230.01:49:00.83#ibcon#read 3, iclass 34, count 0 2006.230.01:49:00.83#ibcon#about to read 4, iclass 34, count 0 2006.230.01:49:00.83#ibcon#read 4, iclass 34, count 0 2006.230.01:49:00.83#ibcon#about to read 5, iclass 34, count 0 2006.230.01:49:00.83#ibcon#read 5, iclass 34, count 0 2006.230.01:49:00.83#ibcon#about to read 6, iclass 34, count 0 2006.230.01:49:00.83#ibcon#read 6, iclass 34, count 0 2006.230.01:49:00.83#ibcon#end of sib2, iclass 34, count 0 2006.230.01:49:00.83#ibcon#*after write, iclass 34, count 0 2006.230.01:49:00.83#ibcon#*before return 0, iclass 34, count 0 2006.230.01:49:00.83#ibcon#after mode 2 write, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:49:00.83#ibcon#end of loop, iclass 34 iclrec 2 cls_cnt 0 2006.230.01:49:00.83#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:49:00.83#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:49:00.83$vck44/vblo=5,709.99 2006.230.01:49:00.83#ibcon#iclass 36 nclrec 1 cls_cnt 2 2006.230.01:49:00.83#ibcon#iclass 36 iclrec 1 cls_cnt 2 2006.230.01:49:00.83#ibcon#ireg 17 cls_cnt 0 2006.230.01:49:00.83#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:49:00.83#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:49:00.83#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:49:00.83#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:49:00.83#ibcon#first serial, iclass 36, count 0 2006.230.01:49:00.83#ibcon#enter sib2, iclass 36, count 0 2006.230.01:49:00.83#ibcon#flushed, iclass 36, count 0 2006.230.01:49:00.83#ibcon#about to write, iclass 36, count 0 2006.230.01:49:00.83#ibcon#wrote, iclass 36, count 0 2006.230.01:49:00.83#ibcon#about to read 3, iclass 36, count 0 2006.230.01:49:00.85#ibcon#read 3, iclass 36, count 0 2006.230.01:49:00.85#ibcon#about to read 4, iclass 36, count 0 2006.230.01:49:00.85#ibcon#read 4, iclass 36, count 0 2006.230.01:49:00.85#ibcon#about to read 5, iclass 36, count 0 2006.230.01:49:00.85#ibcon#read 5, iclass 36, count 0 2006.230.01:49:00.85#ibcon#about to read 6, iclass 36, count 0 2006.230.01:49:00.85#ibcon#read 6, iclass 36, count 0 2006.230.01:49:00.85#ibcon#end of sib2, iclass 36, count 0 2006.230.01:49:00.85#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:49:00.85#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:49:00.85#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:49:00.85#ibcon#*before write, iclass 36, count 0 2006.230.01:49:00.85#ibcon#enter sib2, iclass 36, count 0 2006.230.01:49:00.85#ibcon#flushed, iclass 36, count 0 2006.230.01:49:00.85#ibcon#about to write, iclass 36, count 0 2006.230.01:49:00.85#ibcon#wrote, iclass 36, count 0 2006.230.01:49:00.85#ibcon#about to read 3, iclass 36, count 0 2006.230.01:49:00.89#ibcon#read 3, iclass 36, count 0 2006.230.01:49:00.89#ibcon#about to read 4, iclass 36, count 0 2006.230.01:49:00.89#ibcon#read 4, iclass 36, count 0 2006.230.01:49:00.89#ibcon#about to read 5, iclass 36, count 0 2006.230.01:49:00.89#ibcon#read 5, iclass 36, count 0 2006.230.01:49:00.89#ibcon#about to read 6, iclass 36, count 0 2006.230.01:49:00.89#ibcon#read 6, iclass 36, count 0 2006.230.01:49:00.89#ibcon#end of sib2, iclass 36, count 0 2006.230.01:49:00.89#ibcon#*after write, iclass 36, count 0 2006.230.01:49:00.89#ibcon#*before return 0, iclass 36, count 0 2006.230.01:49:00.89#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:49:00.89#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 0 2006.230.01:49:00.89#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:49:00.89#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:49:00.89$vck44/vb=5,4 2006.230.01:49:00.89#ibcon#iclass 38 nclrec 2 cls_cnt 3 2006.230.01:49:00.89#ibcon#iclass 38 iclrec 1 cls_cnt 3 2006.230.01:49:00.89#ibcon#ireg 11 cls_cnt 2 2006.230.01:49:00.89#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:49:00.95#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:49:00.95#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:49:00.95#ibcon#enter wrdev, iclass 38, count 2 2006.230.01:49:00.95#ibcon#first serial, iclass 38, count 2 2006.230.01:49:00.95#ibcon#enter sib2, iclass 38, count 2 2006.230.01:49:00.95#ibcon#flushed, iclass 38, count 2 2006.230.01:49:00.95#ibcon#about to write, iclass 38, count 2 2006.230.01:49:00.95#ibcon#wrote, iclass 38, count 2 2006.230.01:49:00.95#ibcon#about to read 3, iclass 38, count 2 2006.230.01:49:00.97#ibcon#read 3, iclass 38, count 2 2006.230.01:49:00.97#ibcon#about to read 4, iclass 38, count 2 2006.230.01:49:00.97#ibcon#read 4, iclass 38, count 2 2006.230.01:49:00.97#ibcon#about to read 5, iclass 38, count 2 2006.230.01:49:00.97#ibcon#read 5, iclass 38, count 2 2006.230.01:49:00.97#ibcon#about to read 6, iclass 38, count 2 2006.230.01:49:00.97#ibcon#read 6, iclass 38, count 2 2006.230.01:49:00.97#ibcon#end of sib2, iclass 38, count 2 2006.230.01:49:00.97#ibcon#*mode == 0, iclass 38, count 2 2006.230.01:49:00.97#ibcon#*mode == 0 && serial, iclass 38, count 2 2006.230.01:49:00.97#ibcon#[27=AT05-04\r\n] 2006.230.01:49:00.97#ibcon#*before write, iclass 38, count 2 2006.230.01:49:00.97#ibcon#enter sib2, iclass 38, count 2 2006.230.01:49:00.97#ibcon#flushed, iclass 38, count 2 2006.230.01:49:00.97#ibcon#about to write, iclass 38, count 2 2006.230.01:49:00.97#ibcon#wrote, iclass 38, count 2 2006.230.01:49:00.97#ibcon#about to read 3, iclass 38, count 2 2006.230.01:49:01.00#ibcon#read 3, iclass 38, count 2 2006.230.01:49:01.00#ibcon#about to read 4, iclass 38, count 2 2006.230.01:49:01.00#ibcon#read 4, iclass 38, count 2 2006.230.01:49:01.00#ibcon#about to read 5, iclass 38, count 2 2006.230.01:49:01.00#ibcon#read 5, iclass 38, count 2 2006.230.01:49:01.00#ibcon#about to read 6, iclass 38, count 2 2006.230.01:49:01.00#ibcon#read 6, iclass 38, count 2 2006.230.01:49:01.00#ibcon#end of sib2, iclass 38, count 2 2006.230.01:49:01.00#ibcon#*after write, iclass 38, count 2 2006.230.01:49:01.00#ibcon#*before return 0, iclass 38, count 2 2006.230.01:49:01.00#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:49:01.00#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 2 2006.230.01:49:01.00#ibcon#iclass 38 iclrec 2 cls_cnt 2 2006.230.01:49:01.00#ibcon#ireg 7 cls_cnt 0 2006.230.01:49:01.00#ibcon#before find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:49:01.12#ibcon#after find_delay mode 2, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:49:01.12#ibcon#before mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:49:01.12#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:49:01.12#ibcon#first serial, iclass 38, count 0 2006.230.01:49:01.12#ibcon#enter sib2, iclass 38, count 0 2006.230.01:49:01.12#ibcon#flushed, iclass 38, count 0 2006.230.01:49:01.12#ibcon#about to write, iclass 38, count 0 2006.230.01:49:01.12#ibcon#wrote, iclass 38, count 0 2006.230.01:49:01.12#ibcon#about to read 3, iclass 38, count 0 2006.230.01:49:01.14#ibcon#read 3, iclass 38, count 0 2006.230.01:49:01.14#ibcon#about to read 4, iclass 38, count 0 2006.230.01:49:01.14#ibcon#read 4, iclass 38, count 0 2006.230.01:49:01.14#ibcon#about to read 5, iclass 38, count 0 2006.230.01:49:01.14#ibcon#read 5, iclass 38, count 0 2006.230.01:49:01.14#ibcon#about to read 6, iclass 38, count 0 2006.230.01:49:01.14#ibcon#read 6, iclass 38, count 0 2006.230.01:49:01.14#ibcon#end of sib2, iclass 38, count 0 2006.230.01:49:01.14#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:49:01.14#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:49:01.14#ibcon#[27=USB\r\n] 2006.230.01:49:01.14#ibcon#*before write, iclass 38, count 0 2006.230.01:49:01.14#ibcon#enter sib2, iclass 38, count 0 2006.230.01:49:01.14#ibcon#flushed, iclass 38, count 0 2006.230.01:49:01.14#ibcon#about to write, iclass 38, count 0 2006.230.01:49:01.14#ibcon#wrote, iclass 38, count 0 2006.230.01:49:01.14#ibcon#about to read 3, iclass 38, count 0 2006.230.01:49:01.17#ibcon#read 3, iclass 38, count 0 2006.230.01:49:01.17#ibcon#about to read 4, iclass 38, count 0 2006.230.01:49:01.17#ibcon#read 4, iclass 38, count 0 2006.230.01:49:01.17#ibcon#about to read 5, iclass 38, count 0 2006.230.01:49:01.17#ibcon#read 5, iclass 38, count 0 2006.230.01:49:01.17#ibcon#about to read 6, iclass 38, count 0 2006.230.01:49:01.17#ibcon#read 6, iclass 38, count 0 2006.230.01:49:01.17#ibcon#end of sib2, iclass 38, count 0 2006.230.01:49:01.17#ibcon#*after write, iclass 38, count 0 2006.230.01:49:01.17#ibcon#*before return 0, iclass 38, count 0 2006.230.01:49:01.17#ibcon#after mode 2 write, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:49:01.17#ibcon#end of loop, iclass 38 iclrec 2 cls_cnt 0 2006.230.01:49:01.17#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:49:01.17#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:49:01.17$vck44/vblo=6,719.99 2006.230.01:49:01.17#ibcon#iclass 40 nclrec 1 cls_cnt 2 2006.230.01:49:01.17#ibcon#iclass 40 iclrec 1 cls_cnt 2 2006.230.01:49:01.17#ibcon#ireg 17 cls_cnt 0 2006.230.01:49:01.17#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:49:01.17#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:49:01.17#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:49:01.17#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:49:01.17#ibcon#first serial, iclass 40, count 0 2006.230.01:49:01.17#ibcon#enter sib2, iclass 40, count 0 2006.230.01:49:01.17#ibcon#flushed, iclass 40, count 0 2006.230.01:49:01.17#ibcon#about to write, iclass 40, count 0 2006.230.01:49:01.17#ibcon#wrote, iclass 40, count 0 2006.230.01:49:01.17#ibcon#about to read 3, iclass 40, count 0 2006.230.01:49:01.20#ibcon#read 3, iclass 40, count 0 2006.230.01:49:01.20#ibcon#about to read 4, iclass 40, count 0 2006.230.01:49:01.20#ibcon#read 4, iclass 40, count 0 2006.230.01:49:01.20#ibcon#about to read 5, iclass 40, count 0 2006.230.01:49:01.20#ibcon#read 5, iclass 40, count 0 2006.230.01:49:01.20#ibcon#about to read 6, iclass 40, count 0 2006.230.01:49:01.20#ibcon#read 6, iclass 40, count 0 2006.230.01:49:01.20#ibcon#end of sib2, iclass 40, count 0 2006.230.01:49:01.20#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:49:01.20#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:49:01.20#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:49:01.20#ibcon#*before write, iclass 40, count 0 2006.230.01:49:01.20#ibcon#enter sib2, iclass 40, count 0 2006.230.01:49:01.20#ibcon#flushed, iclass 40, count 0 2006.230.01:49:01.20#ibcon#about to write, iclass 40, count 0 2006.230.01:49:01.20#ibcon#wrote, iclass 40, count 0 2006.230.01:49:01.20#ibcon#about to read 3, iclass 40, count 0 2006.230.01:49:01.24#ibcon#read 3, iclass 40, count 0 2006.230.01:49:01.24#ibcon#about to read 4, iclass 40, count 0 2006.230.01:49:01.24#ibcon#read 4, iclass 40, count 0 2006.230.01:49:01.24#ibcon#about to read 5, iclass 40, count 0 2006.230.01:49:01.24#ibcon#read 5, iclass 40, count 0 2006.230.01:49:01.24#ibcon#about to read 6, iclass 40, count 0 2006.230.01:49:01.24#ibcon#read 6, iclass 40, count 0 2006.230.01:49:01.24#ibcon#end of sib2, iclass 40, count 0 2006.230.01:49:01.24#ibcon#*after write, iclass 40, count 0 2006.230.01:49:01.24#ibcon#*before return 0, iclass 40, count 0 2006.230.01:49:01.24#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:49:01.24#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 0 2006.230.01:49:01.24#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:49:01.24#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:49:01.24$vck44/vb=6,4 2006.230.01:49:01.24#ibcon#iclass 4 nclrec 2 cls_cnt 3 2006.230.01:49:01.24#ibcon#iclass 4 iclrec 1 cls_cnt 3 2006.230.01:49:01.24#ibcon#ireg 11 cls_cnt 2 2006.230.01:49:01.24#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:49:01.29#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:49:01.29#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:49:01.29#ibcon#enter wrdev, iclass 4, count 2 2006.230.01:49:01.29#ibcon#first serial, iclass 4, count 2 2006.230.01:49:01.29#ibcon#enter sib2, iclass 4, count 2 2006.230.01:49:01.29#ibcon#flushed, iclass 4, count 2 2006.230.01:49:01.30#ibcon#about to write, iclass 4, count 2 2006.230.01:49:01.30#ibcon#wrote, iclass 4, count 2 2006.230.01:49:01.30#ibcon#about to read 3, iclass 4, count 2 2006.230.01:49:01.31#ibcon#read 3, iclass 4, count 2 2006.230.01:49:01.31#ibcon#about to read 4, iclass 4, count 2 2006.230.01:49:01.31#ibcon#read 4, iclass 4, count 2 2006.230.01:49:01.31#ibcon#about to read 5, iclass 4, count 2 2006.230.01:49:01.31#ibcon#read 5, iclass 4, count 2 2006.230.01:49:01.31#ibcon#about to read 6, iclass 4, count 2 2006.230.01:49:01.31#ibcon#read 6, iclass 4, count 2 2006.230.01:49:01.31#ibcon#end of sib2, iclass 4, count 2 2006.230.01:49:01.31#ibcon#*mode == 0, iclass 4, count 2 2006.230.01:49:01.31#ibcon#*mode == 0 && serial, iclass 4, count 2 2006.230.01:49:01.31#ibcon#[27=AT06-04\r\n] 2006.230.01:49:01.31#ibcon#*before write, iclass 4, count 2 2006.230.01:49:01.31#ibcon#enter sib2, iclass 4, count 2 2006.230.01:49:01.31#ibcon#flushed, iclass 4, count 2 2006.230.01:49:01.31#ibcon#about to write, iclass 4, count 2 2006.230.01:49:01.31#ibcon#wrote, iclass 4, count 2 2006.230.01:49:01.31#ibcon#about to read 3, iclass 4, count 2 2006.230.01:49:01.34#ibcon#read 3, iclass 4, count 2 2006.230.01:49:01.34#ibcon#about to read 4, iclass 4, count 2 2006.230.01:49:01.34#ibcon#read 4, iclass 4, count 2 2006.230.01:49:01.34#ibcon#about to read 5, iclass 4, count 2 2006.230.01:49:01.34#ibcon#read 5, iclass 4, count 2 2006.230.01:49:01.34#ibcon#about to read 6, iclass 4, count 2 2006.230.01:49:01.34#ibcon#read 6, iclass 4, count 2 2006.230.01:49:01.34#ibcon#end of sib2, iclass 4, count 2 2006.230.01:49:01.34#ibcon#*after write, iclass 4, count 2 2006.230.01:49:01.34#ibcon#*before return 0, iclass 4, count 2 2006.230.01:49:01.34#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:49:01.34#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 2 2006.230.01:49:01.34#ibcon#iclass 4 iclrec 2 cls_cnt 2 2006.230.01:49:01.34#ibcon#ireg 7 cls_cnt 0 2006.230.01:49:01.34#ibcon#before find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:49:01.46#ibcon#after find_delay mode 2, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:49:01.46#ibcon#before mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:49:01.46#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:49:01.46#ibcon#first serial, iclass 4, count 0 2006.230.01:49:01.46#ibcon#enter sib2, iclass 4, count 0 2006.230.01:49:01.46#ibcon#flushed, iclass 4, count 0 2006.230.01:49:01.46#ibcon#about to write, iclass 4, count 0 2006.230.01:49:01.46#ibcon#wrote, iclass 4, count 0 2006.230.01:49:01.46#ibcon#about to read 3, iclass 4, count 0 2006.230.01:49:01.48#ibcon#read 3, iclass 4, count 0 2006.230.01:49:01.48#ibcon#about to read 4, iclass 4, count 0 2006.230.01:49:01.48#ibcon#read 4, iclass 4, count 0 2006.230.01:49:01.48#ibcon#about to read 5, iclass 4, count 0 2006.230.01:49:01.48#ibcon#read 5, iclass 4, count 0 2006.230.01:49:01.48#ibcon#about to read 6, iclass 4, count 0 2006.230.01:49:01.48#ibcon#read 6, iclass 4, count 0 2006.230.01:49:01.48#ibcon#end of sib2, iclass 4, count 0 2006.230.01:49:01.48#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:49:01.48#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:49:01.48#ibcon#[27=USB\r\n] 2006.230.01:49:01.48#ibcon#*before write, iclass 4, count 0 2006.230.01:49:01.48#ibcon#enter sib2, iclass 4, count 0 2006.230.01:49:01.48#ibcon#flushed, iclass 4, count 0 2006.230.01:49:01.48#ibcon#about to write, iclass 4, count 0 2006.230.01:49:01.48#ibcon#wrote, iclass 4, count 0 2006.230.01:49:01.48#ibcon#about to read 3, iclass 4, count 0 2006.230.01:49:01.51#ibcon#read 3, iclass 4, count 0 2006.230.01:49:01.51#ibcon#about to read 4, iclass 4, count 0 2006.230.01:49:01.51#ibcon#read 4, iclass 4, count 0 2006.230.01:49:01.51#ibcon#about to read 5, iclass 4, count 0 2006.230.01:49:01.51#ibcon#read 5, iclass 4, count 0 2006.230.01:49:01.51#ibcon#about to read 6, iclass 4, count 0 2006.230.01:49:01.51#ibcon#read 6, iclass 4, count 0 2006.230.01:49:01.51#ibcon#end of sib2, iclass 4, count 0 2006.230.01:49:01.51#ibcon#*after write, iclass 4, count 0 2006.230.01:49:01.51#ibcon#*before return 0, iclass 4, count 0 2006.230.01:49:01.51#ibcon#after mode 2 write, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:49:01.51#ibcon#end of loop, iclass 4 iclrec 2 cls_cnt 0 2006.230.01:49:01.51#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:49:01.51#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:49:01.51$vck44/vblo=7,734.99 2006.230.01:49:01.51#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:49:01.51#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:49:01.51#ibcon#ireg 17 cls_cnt 0 2006.230.01:49:01.51#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:49:01.51#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:49:01.51#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:49:01.51#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:49:01.51#ibcon#first serial, iclass 6, count 0 2006.230.01:49:01.51#ibcon#enter sib2, iclass 6, count 0 2006.230.01:49:01.51#ibcon#flushed, iclass 6, count 0 2006.230.01:49:01.51#ibcon#about to write, iclass 6, count 0 2006.230.01:49:01.51#ibcon#wrote, iclass 6, count 0 2006.230.01:49:01.51#ibcon#about to read 3, iclass 6, count 0 2006.230.01:49:01.53#ibcon#read 3, iclass 6, count 0 2006.230.01:49:01.53#ibcon#about to read 4, iclass 6, count 0 2006.230.01:49:01.53#ibcon#read 4, iclass 6, count 0 2006.230.01:49:01.53#ibcon#about to read 5, iclass 6, count 0 2006.230.01:49:01.53#ibcon#read 5, iclass 6, count 0 2006.230.01:49:01.53#ibcon#about to read 6, iclass 6, count 0 2006.230.01:49:01.53#ibcon#read 6, iclass 6, count 0 2006.230.01:49:01.53#ibcon#end of sib2, iclass 6, count 0 2006.230.01:49:01.53#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:49:01.53#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:49:01.53#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:49:01.53#ibcon#*before write, iclass 6, count 0 2006.230.01:49:01.53#ibcon#enter sib2, iclass 6, count 0 2006.230.01:49:01.53#ibcon#flushed, iclass 6, count 0 2006.230.01:49:01.53#ibcon#about to write, iclass 6, count 0 2006.230.01:49:01.53#ibcon#wrote, iclass 6, count 0 2006.230.01:49:01.53#ibcon#about to read 3, iclass 6, count 0 2006.230.01:49:01.57#ibcon#read 3, iclass 6, count 0 2006.230.01:49:01.57#ibcon#about to read 4, iclass 6, count 0 2006.230.01:49:01.57#ibcon#read 4, iclass 6, count 0 2006.230.01:49:01.57#ibcon#about to read 5, iclass 6, count 0 2006.230.01:49:01.57#ibcon#read 5, iclass 6, count 0 2006.230.01:49:01.57#ibcon#about to read 6, iclass 6, count 0 2006.230.01:49:01.57#ibcon#read 6, iclass 6, count 0 2006.230.01:49:01.57#ibcon#end of sib2, iclass 6, count 0 2006.230.01:49:01.57#ibcon#*after write, iclass 6, count 0 2006.230.01:49:01.57#ibcon#*before return 0, iclass 6, count 0 2006.230.01:49:01.57#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:49:01.57#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:49:01.57#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:49:01.57#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:49:01.57$vck44/vb=7,4 2006.230.01:49:01.57#ibcon#iclass 10 nclrec 2 cls_cnt 3 2006.230.01:49:01.57#ibcon#iclass 10 iclrec 1 cls_cnt 3 2006.230.01:49:01.57#ibcon#ireg 11 cls_cnt 2 2006.230.01:49:01.57#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:49:01.63#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:49:01.63#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:49:01.63#ibcon#enter wrdev, iclass 10, count 2 2006.230.01:49:01.63#ibcon#first serial, iclass 10, count 2 2006.230.01:49:01.63#ibcon#enter sib2, iclass 10, count 2 2006.230.01:49:01.63#ibcon#flushed, iclass 10, count 2 2006.230.01:49:01.63#ibcon#about to write, iclass 10, count 2 2006.230.01:49:01.63#ibcon#wrote, iclass 10, count 2 2006.230.01:49:01.63#ibcon#about to read 3, iclass 10, count 2 2006.230.01:49:01.65#ibcon#read 3, iclass 10, count 2 2006.230.01:49:01.65#ibcon#about to read 4, iclass 10, count 2 2006.230.01:49:01.65#ibcon#read 4, iclass 10, count 2 2006.230.01:49:01.65#ibcon#about to read 5, iclass 10, count 2 2006.230.01:49:01.65#ibcon#read 5, iclass 10, count 2 2006.230.01:49:01.65#ibcon#about to read 6, iclass 10, count 2 2006.230.01:49:01.65#ibcon#read 6, iclass 10, count 2 2006.230.01:49:01.65#ibcon#end of sib2, iclass 10, count 2 2006.230.01:49:01.65#ibcon#*mode == 0, iclass 10, count 2 2006.230.01:49:01.65#ibcon#*mode == 0 && serial, iclass 10, count 2 2006.230.01:49:01.65#ibcon#[27=AT07-04\r\n] 2006.230.01:49:01.65#ibcon#*before write, iclass 10, count 2 2006.230.01:49:01.65#ibcon#enter sib2, iclass 10, count 2 2006.230.01:49:01.65#ibcon#flushed, iclass 10, count 2 2006.230.01:49:01.65#ibcon#about to write, iclass 10, count 2 2006.230.01:49:01.65#ibcon#wrote, iclass 10, count 2 2006.230.01:49:01.65#ibcon#about to read 3, iclass 10, count 2 2006.230.01:49:01.68#ibcon#read 3, iclass 10, count 2 2006.230.01:49:01.68#ibcon#about to read 4, iclass 10, count 2 2006.230.01:49:01.68#ibcon#read 4, iclass 10, count 2 2006.230.01:49:01.68#ibcon#about to read 5, iclass 10, count 2 2006.230.01:49:01.68#ibcon#read 5, iclass 10, count 2 2006.230.01:49:01.68#ibcon#about to read 6, iclass 10, count 2 2006.230.01:49:01.68#ibcon#read 6, iclass 10, count 2 2006.230.01:49:01.68#ibcon#end of sib2, iclass 10, count 2 2006.230.01:49:01.68#ibcon#*after write, iclass 10, count 2 2006.230.01:49:01.68#ibcon#*before return 0, iclass 10, count 2 2006.230.01:49:01.68#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:49:01.68#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 2 2006.230.01:49:01.68#ibcon#iclass 10 iclrec 2 cls_cnt 2 2006.230.01:49:01.68#ibcon#ireg 7 cls_cnt 0 2006.230.01:49:01.68#ibcon#before find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:49:01.80#ibcon#after find_delay mode 2, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:49:01.80#ibcon#before mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:49:01.80#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:49:01.80#ibcon#first serial, iclass 10, count 0 2006.230.01:49:01.80#ibcon#enter sib2, iclass 10, count 0 2006.230.01:49:01.80#ibcon#flushed, iclass 10, count 0 2006.230.01:49:01.80#ibcon#about to write, iclass 10, count 0 2006.230.01:49:01.80#ibcon#wrote, iclass 10, count 0 2006.230.01:49:01.80#ibcon#about to read 3, iclass 10, count 0 2006.230.01:49:01.82#ibcon#read 3, iclass 10, count 0 2006.230.01:49:01.82#ibcon#about to read 4, iclass 10, count 0 2006.230.01:49:01.82#ibcon#read 4, iclass 10, count 0 2006.230.01:49:01.82#ibcon#about to read 5, iclass 10, count 0 2006.230.01:49:01.82#ibcon#read 5, iclass 10, count 0 2006.230.01:49:01.82#ibcon#about to read 6, iclass 10, count 0 2006.230.01:49:01.82#ibcon#read 6, iclass 10, count 0 2006.230.01:49:01.82#ibcon#end of sib2, iclass 10, count 0 2006.230.01:49:01.82#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:49:01.82#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:49:01.82#ibcon#[27=USB\r\n] 2006.230.01:49:01.82#ibcon#*before write, iclass 10, count 0 2006.230.01:49:01.82#ibcon#enter sib2, iclass 10, count 0 2006.230.01:49:01.82#ibcon#flushed, iclass 10, count 0 2006.230.01:49:01.82#ibcon#about to write, iclass 10, count 0 2006.230.01:49:01.82#ibcon#wrote, iclass 10, count 0 2006.230.01:49:01.82#ibcon#about to read 3, iclass 10, count 0 2006.230.01:49:01.85#ibcon#read 3, iclass 10, count 0 2006.230.01:49:01.85#ibcon#about to read 4, iclass 10, count 0 2006.230.01:49:01.85#ibcon#read 4, iclass 10, count 0 2006.230.01:49:01.85#ibcon#about to read 5, iclass 10, count 0 2006.230.01:49:01.85#ibcon#read 5, iclass 10, count 0 2006.230.01:49:01.85#ibcon#about to read 6, iclass 10, count 0 2006.230.01:49:01.85#ibcon#read 6, iclass 10, count 0 2006.230.01:49:01.85#ibcon#end of sib2, iclass 10, count 0 2006.230.01:49:01.85#ibcon#*after write, iclass 10, count 0 2006.230.01:49:01.85#ibcon#*before return 0, iclass 10, count 0 2006.230.01:49:01.85#ibcon#after mode 2 write, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:49:01.85#ibcon#end of loop, iclass 10 iclrec 2 cls_cnt 0 2006.230.01:49:01.85#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:49:01.85#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:49:01.85$vck44/vblo=8,744.99 2006.230.01:49:01.85#ibcon#iclass 12 nclrec 1 cls_cnt 2 2006.230.01:49:01.85#ibcon#iclass 12 iclrec 1 cls_cnt 2 2006.230.01:49:01.85#ibcon#ireg 17 cls_cnt 0 2006.230.01:49:01.85#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:49:01.85#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:49:01.85#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:49:01.85#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:49:01.85#ibcon#first serial, iclass 12, count 0 2006.230.01:49:01.85#ibcon#enter sib2, iclass 12, count 0 2006.230.01:49:01.85#ibcon#flushed, iclass 12, count 0 2006.230.01:49:01.85#ibcon#about to write, iclass 12, count 0 2006.230.01:49:01.85#ibcon#wrote, iclass 12, count 0 2006.230.01:49:01.85#ibcon#about to read 3, iclass 12, count 0 2006.230.01:49:01.88#ibcon#read 3, iclass 12, count 0 2006.230.01:49:01.88#ibcon#about to read 4, iclass 12, count 0 2006.230.01:49:01.88#ibcon#read 4, iclass 12, count 0 2006.230.01:49:01.88#ibcon#about to read 5, iclass 12, count 0 2006.230.01:49:01.88#ibcon#read 5, iclass 12, count 0 2006.230.01:49:01.88#ibcon#about to read 6, iclass 12, count 0 2006.230.01:49:01.88#ibcon#read 6, iclass 12, count 0 2006.230.01:49:01.88#ibcon#end of sib2, iclass 12, count 0 2006.230.01:49:01.88#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:49:01.88#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:49:01.88#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:49:01.88#ibcon#*before write, iclass 12, count 0 2006.230.01:49:01.88#ibcon#enter sib2, iclass 12, count 0 2006.230.01:49:01.88#ibcon#flushed, iclass 12, count 0 2006.230.01:49:01.88#ibcon#about to write, iclass 12, count 0 2006.230.01:49:01.88#ibcon#wrote, iclass 12, count 0 2006.230.01:49:01.88#ibcon#about to read 3, iclass 12, count 0 2006.230.01:49:01.92#ibcon#read 3, iclass 12, count 0 2006.230.01:49:01.92#ibcon#about to read 4, iclass 12, count 0 2006.230.01:49:01.92#ibcon#read 4, iclass 12, count 0 2006.230.01:49:01.92#ibcon#about to read 5, iclass 12, count 0 2006.230.01:49:01.92#ibcon#read 5, iclass 12, count 0 2006.230.01:49:01.92#ibcon#about to read 6, iclass 12, count 0 2006.230.01:49:01.92#ibcon#read 6, iclass 12, count 0 2006.230.01:49:01.92#ibcon#end of sib2, iclass 12, count 0 2006.230.01:49:01.92#ibcon#*after write, iclass 12, count 0 2006.230.01:49:01.92#ibcon#*before return 0, iclass 12, count 0 2006.230.01:49:01.92#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:49:01.92#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 0 2006.230.01:49:01.92#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:49:01.92#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:49:01.92$vck44/vb=8,4 2006.230.01:49:01.92#ibcon#iclass 14 nclrec 2 cls_cnt 3 2006.230.01:49:01.92#ibcon#iclass 14 iclrec 1 cls_cnt 3 2006.230.01:49:01.92#ibcon#ireg 11 cls_cnt 2 2006.230.01:49:01.92#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:49:01.97#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:49:01.97#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:49:01.97#ibcon#enter wrdev, iclass 14, count 2 2006.230.01:49:01.97#ibcon#first serial, iclass 14, count 2 2006.230.01:49:01.97#ibcon#enter sib2, iclass 14, count 2 2006.230.01:49:01.97#ibcon#flushed, iclass 14, count 2 2006.230.01:49:01.97#ibcon#about to write, iclass 14, count 2 2006.230.01:49:01.97#ibcon#wrote, iclass 14, count 2 2006.230.01:49:01.98#ibcon#about to read 3, iclass 14, count 2 2006.230.01:49:01.99#ibcon#read 3, iclass 14, count 2 2006.230.01:49:01.99#ibcon#about to read 4, iclass 14, count 2 2006.230.01:49:01.99#ibcon#read 4, iclass 14, count 2 2006.230.01:49:01.99#ibcon#about to read 5, iclass 14, count 2 2006.230.01:49:01.99#ibcon#read 5, iclass 14, count 2 2006.230.01:49:01.99#ibcon#about to read 6, iclass 14, count 2 2006.230.01:49:01.99#ibcon#read 6, iclass 14, count 2 2006.230.01:49:01.99#ibcon#end of sib2, iclass 14, count 2 2006.230.01:49:01.99#ibcon#*mode == 0, iclass 14, count 2 2006.230.01:49:01.99#ibcon#*mode == 0 && serial, iclass 14, count 2 2006.230.01:49:01.99#ibcon#[27=AT08-04\r\n] 2006.230.01:49:01.99#ibcon#*before write, iclass 14, count 2 2006.230.01:49:01.99#ibcon#enter sib2, iclass 14, count 2 2006.230.01:49:01.99#ibcon#flushed, iclass 14, count 2 2006.230.01:49:01.99#ibcon#about to write, iclass 14, count 2 2006.230.01:49:01.99#ibcon#wrote, iclass 14, count 2 2006.230.01:49:01.99#ibcon#about to read 3, iclass 14, count 2 2006.230.01:49:02.02#ibcon#read 3, iclass 14, count 2 2006.230.01:49:02.02#ibcon#about to read 4, iclass 14, count 2 2006.230.01:49:02.02#ibcon#read 4, iclass 14, count 2 2006.230.01:49:02.02#ibcon#about to read 5, iclass 14, count 2 2006.230.01:49:02.02#ibcon#read 5, iclass 14, count 2 2006.230.01:49:02.02#ibcon#about to read 6, iclass 14, count 2 2006.230.01:49:02.02#ibcon#read 6, iclass 14, count 2 2006.230.01:49:02.02#ibcon#end of sib2, iclass 14, count 2 2006.230.01:49:02.02#ibcon#*after write, iclass 14, count 2 2006.230.01:49:02.02#ibcon#*before return 0, iclass 14, count 2 2006.230.01:49:02.02#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:49:02.02#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 2 2006.230.01:49:02.02#ibcon#iclass 14 iclrec 2 cls_cnt 2 2006.230.01:49:02.02#ibcon#ireg 7 cls_cnt 0 2006.230.01:49:02.02#ibcon#before find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:49:02.14#ibcon#after find_delay mode 2, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:49:02.14#ibcon#before mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:49:02.14#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:49:02.14#ibcon#first serial, iclass 14, count 0 2006.230.01:49:02.14#ibcon#enter sib2, iclass 14, count 0 2006.230.01:49:02.14#ibcon#flushed, iclass 14, count 0 2006.230.01:49:02.14#ibcon#about to write, iclass 14, count 0 2006.230.01:49:02.14#ibcon#wrote, iclass 14, count 0 2006.230.01:49:02.14#ibcon#about to read 3, iclass 14, count 0 2006.230.01:49:02.16#ibcon#read 3, iclass 14, count 0 2006.230.01:49:02.16#ibcon#about to read 4, iclass 14, count 0 2006.230.01:49:02.16#ibcon#read 4, iclass 14, count 0 2006.230.01:49:02.16#ibcon#about to read 5, iclass 14, count 0 2006.230.01:49:02.16#ibcon#read 5, iclass 14, count 0 2006.230.01:49:02.16#ibcon#about to read 6, iclass 14, count 0 2006.230.01:49:02.16#ibcon#read 6, iclass 14, count 0 2006.230.01:49:02.16#ibcon#end of sib2, iclass 14, count 0 2006.230.01:49:02.16#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:49:02.16#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:49:02.16#ibcon#[27=USB\r\n] 2006.230.01:49:02.16#ibcon#*before write, iclass 14, count 0 2006.230.01:49:02.16#ibcon#enter sib2, iclass 14, count 0 2006.230.01:49:02.16#ibcon#flushed, iclass 14, count 0 2006.230.01:49:02.16#ibcon#about to write, iclass 14, count 0 2006.230.01:49:02.16#ibcon#wrote, iclass 14, count 0 2006.230.01:49:02.16#ibcon#about to read 3, iclass 14, count 0 2006.230.01:49:02.19#ibcon#read 3, iclass 14, count 0 2006.230.01:49:02.19#ibcon#about to read 4, iclass 14, count 0 2006.230.01:49:02.19#ibcon#read 4, iclass 14, count 0 2006.230.01:49:02.19#ibcon#about to read 5, iclass 14, count 0 2006.230.01:49:02.19#ibcon#read 5, iclass 14, count 0 2006.230.01:49:02.19#ibcon#about to read 6, iclass 14, count 0 2006.230.01:49:02.19#ibcon#read 6, iclass 14, count 0 2006.230.01:49:02.19#ibcon#end of sib2, iclass 14, count 0 2006.230.01:49:02.19#ibcon#*after write, iclass 14, count 0 2006.230.01:49:02.19#ibcon#*before return 0, iclass 14, count 0 2006.230.01:49:02.19#ibcon#after mode 2 write, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:49:02.19#ibcon#end of loop, iclass 14 iclrec 2 cls_cnt 0 2006.230.01:49:02.19#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:49:02.19#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:49:02.19$vck44/vabw=wide 2006.230.01:49:02.19#ibcon#iclass 16 nclrec 1 cls_cnt 2 2006.230.01:49:02.19#ibcon#iclass 16 iclrec 1 cls_cnt 2 2006.230.01:49:02.19#ibcon#ireg 8 cls_cnt 0 2006.230.01:49:02.19#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:49:02.19#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:49:02.19#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:49:02.19#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:49:02.19#ibcon#first serial, iclass 16, count 0 2006.230.01:49:02.19#ibcon#enter sib2, iclass 16, count 0 2006.230.01:49:02.19#ibcon#flushed, iclass 16, count 0 2006.230.01:49:02.19#ibcon#about to write, iclass 16, count 0 2006.230.01:49:02.19#ibcon#wrote, iclass 16, count 0 2006.230.01:49:02.19#ibcon#about to read 3, iclass 16, count 0 2006.230.01:49:02.22#ibcon#read 3, iclass 16, count 0 2006.230.01:49:02.22#ibcon#about to read 4, iclass 16, count 0 2006.230.01:49:02.22#ibcon#read 4, iclass 16, count 0 2006.230.01:49:02.22#ibcon#about to read 5, iclass 16, count 0 2006.230.01:49:02.22#ibcon#read 5, iclass 16, count 0 2006.230.01:49:02.22#ibcon#about to read 6, iclass 16, count 0 2006.230.01:49:02.22#ibcon#read 6, iclass 16, count 0 2006.230.01:49:02.22#ibcon#end of sib2, iclass 16, count 0 2006.230.01:49:02.22#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:49:02.22#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:49:02.22#ibcon#[25=BW32\r\n] 2006.230.01:49:02.22#ibcon#*before write, iclass 16, count 0 2006.230.01:49:02.22#ibcon#enter sib2, iclass 16, count 0 2006.230.01:49:02.22#ibcon#flushed, iclass 16, count 0 2006.230.01:49:02.22#ibcon#about to write, iclass 16, count 0 2006.230.01:49:02.22#ibcon#wrote, iclass 16, count 0 2006.230.01:49:02.22#ibcon#about to read 3, iclass 16, count 0 2006.230.01:49:02.24#ibcon#read 3, iclass 16, count 0 2006.230.01:49:02.24#ibcon#about to read 4, iclass 16, count 0 2006.230.01:49:02.24#ibcon#read 4, iclass 16, count 0 2006.230.01:49:02.24#ibcon#about to read 5, iclass 16, count 0 2006.230.01:49:02.24#ibcon#read 5, iclass 16, count 0 2006.230.01:49:02.24#ibcon#about to read 6, iclass 16, count 0 2006.230.01:49:02.24#ibcon#read 6, iclass 16, count 0 2006.230.01:49:02.24#ibcon#end of sib2, iclass 16, count 0 2006.230.01:49:02.24#ibcon#*after write, iclass 16, count 0 2006.230.01:49:02.24#ibcon#*before return 0, iclass 16, count 0 2006.230.01:49:02.24#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:49:02.24#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 0 2006.230.01:49:02.24#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:49:02.24#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:49:02.24$vck44/vbbw=wide 2006.230.01:49:02.24#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:49:02.24#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:49:02.24#ibcon#ireg 8 cls_cnt 0 2006.230.01:49:02.24#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:49:02.31#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:49:02.31#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:49:02.31#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:49:02.31#ibcon#first serial, iclass 18, count 0 2006.230.01:49:02.31#ibcon#enter sib2, iclass 18, count 0 2006.230.01:49:02.31#ibcon#flushed, iclass 18, count 0 2006.230.01:49:02.31#ibcon#about to write, iclass 18, count 0 2006.230.01:49:02.31#ibcon#wrote, iclass 18, count 0 2006.230.01:49:02.31#ibcon#about to read 3, iclass 18, count 0 2006.230.01:49:02.33#ibcon#read 3, iclass 18, count 0 2006.230.01:49:02.33#ibcon#about to read 4, iclass 18, count 0 2006.230.01:49:02.33#ibcon#read 4, iclass 18, count 0 2006.230.01:49:02.33#ibcon#about to read 5, iclass 18, count 0 2006.230.01:49:02.33#ibcon#read 5, iclass 18, count 0 2006.230.01:49:02.33#ibcon#about to read 6, iclass 18, count 0 2006.230.01:49:02.33#ibcon#read 6, iclass 18, count 0 2006.230.01:49:02.33#ibcon#end of sib2, iclass 18, count 0 2006.230.01:49:02.33#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:49:02.33#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:49:02.33#ibcon#[27=BW32\r\n] 2006.230.01:49:02.33#ibcon#*before write, iclass 18, count 0 2006.230.01:49:02.33#ibcon#enter sib2, iclass 18, count 0 2006.230.01:49:02.33#ibcon#flushed, iclass 18, count 0 2006.230.01:49:02.33#ibcon#about to write, iclass 18, count 0 2006.230.01:49:02.33#ibcon#wrote, iclass 18, count 0 2006.230.01:49:02.33#ibcon#about to read 3, iclass 18, count 0 2006.230.01:49:02.36#ibcon#read 3, iclass 18, count 0 2006.230.01:49:02.36#ibcon#about to read 4, iclass 18, count 0 2006.230.01:49:02.36#ibcon#read 4, iclass 18, count 0 2006.230.01:49:02.36#ibcon#about to read 5, iclass 18, count 0 2006.230.01:49:02.36#ibcon#read 5, iclass 18, count 0 2006.230.01:49:02.36#ibcon#about to read 6, iclass 18, count 0 2006.230.01:49:02.36#ibcon#read 6, iclass 18, count 0 2006.230.01:49:02.36#ibcon#end of sib2, iclass 18, count 0 2006.230.01:49:02.36#ibcon#*after write, iclass 18, count 0 2006.230.01:49:02.36#ibcon#*before return 0, iclass 18, count 0 2006.230.01:49:02.36#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:49:02.36#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:49:02.36#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:49:02.36#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:49:02.36$setupk4/ifdk4 2006.230.01:49:02.36$ifdk4/lo= 2006.230.01:49:02.36$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:49:02.36$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:49:02.36$ifdk4/patch= 2006.230.01:49:02.36$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:49:02.36$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:49:02.36$setupk4/!*+20s 2006.230.01:49:04.92#abcon#<5=/09 1.8 5.5 33.01 681002.6\r\n> 2006.230.01:49:04.94#abcon#{5=INTERFACE CLEAR} 2006.230.01:49:05.00#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:49:15.09#abcon#<5=/09 1.8 5.5 33.01 681002.6\r\n> 2006.230.01:49:15.11#abcon#{5=INTERFACE CLEAR} 2006.230.01:49:15.17#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:49:16.87$setupk4/"tpicd 2006.230.01:49:16.87$setupk4/echo=off 2006.230.01:49:16.87$setupk4/xlog=off 2006.230.01:49:16.87:!2006.230.01:50:05 2006.230.01:49:20.14#trakl#Source acquired 2006.230.01:49:22.14#flagr#flagr/antenna,acquired 2006.230.01:50:05.00:preob 2006.230.01:50:05.14/onsource/TRACKING 2006.230.01:50:05.14:!2006.230.01:50:15 2006.230.01:50:15.00:"tape 2006.230.01:50:15.00:"st=record 2006.230.01:50:15.00:data_valid=on 2006.230.01:50:15.00:midob 2006.230.01:50:16.14/onsource/TRACKING 2006.230.01:50:16.14/wx/33.04,1002.6,68 2006.230.01:50:16.30/cable/+6.3916E-03 2006.230.01:50:17.39/va/01,08,usb,yes,38,41 2006.230.01:50:17.39/va/02,07,usb,yes,41,42 2006.230.01:50:17.39/va/03,06,usb,yes,51,54 2006.230.01:50:17.39/va/04,07,usb,yes,43,45 2006.230.01:50:17.39/va/05,04,usb,yes,38,39 2006.230.01:50:17.39/va/06,04,usb,yes,43,42 2006.230.01:50:17.39/va/07,05,usb,yes,38,39 2006.230.01:50:17.39/va/08,06,usb,yes,28,34 2006.230.01:50:17.62/valo/01,524.99,yes,locked 2006.230.01:50:17.62/valo/02,534.99,yes,locked 2006.230.01:50:17.62/valo/03,564.99,yes,locked 2006.230.01:50:17.62/valo/04,624.99,yes,locked 2006.230.01:50:17.62/valo/05,734.99,yes,locked 2006.230.01:50:17.62/valo/06,814.99,yes,locked 2006.230.01:50:17.62/valo/07,864.99,yes,locked 2006.230.01:50:17.62/valo/08,884.99,yes,locked 2006.230.01:50:18.71/vb/01,04,usb,yes,37,34 2006.230.01:50:18.71/vb/02,04,usb,yes,40,39 2006.230.01:50:18.71/vb/03,04,usb,yes,36,40 2006.230.01:50:18.71/vb/04,04,usb,yes,42,40 2006.230.01:50:18.71/vb/05,04,usb,yes,33,36 2006.230.01:50:18.71/vb/06,04,usb,yes,38,34 2006.230.01:50:18.71/vb/07,04,usb,yes,38,38 2006.230.01:50:18.71/vb/08,04,usb,yes,35,39 2006.230.01:50:18.95/vblo/01,629.99,yes,locked 2006.230.01:50:18.95/vblo/02,634.99,yes,locked 2006.230.01:50:18.95/vblo/03,649.99,yes,locked 2006.230.01:50:18.95/vblo/04,679.99,yes,locked 2006.230.01:50:18.95/vblo/05,709.99,yes,locked 2006.230.01:50:18.95/vblo/06,719.99,yes,locked 2006.230.01:50:18.95/vblo/07,734.99,yes,locked 2006.230.01:50:18.95/vblo/08,744.99,yes,locked 2006.230.01:50:19.10/vabw/8 2006.230.01:50:19.25/vbbw/8 2006.230.01:50:19.34/xfe/off,on,12.2 2006.230.01:50:19.71/ifatt/23,28,28,28 2006.230.01:50:20.07/fmout-gps/S +4.42E-07 2006.230.01:50:20.11:!2006.230.01:51:15 2006.230.01:51:15.00:data_valid=off 2006.230.01:51:15.00:"et 2006.230.01:51:15.00:!+3s 2006.230.01:51:18.01:"tape 2006.230.01:51:18.01:postob 2006.230.01:51:18.10/cable/+6.3915E-03 2006.230.01:51:18.10/wx/33.05,1002.6,66 2006.230.01:51:19.08/fmout-gps/S +4.41E-07 2006.230.01:51:19.08:scan_name=230-0152,jd0608,40 2006.230.01:51:19.08:source=1334-127,133739.78,-125724.7,2000.0,cw 2006.230.01:51:19.13#flagr#flagr/antenna,new-source 2006.230.01:51:20.13:checkk5 2006.230.01:51:20.56/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:51:20.99/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:51:21.42/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:51:21.79/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:51:22.17/chk_obsdata//k5ts1/T2300150??a.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:51:22.60/chk_obsdata//k5ts2/T2300150??b.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:51:23.01/chk_obsdata//k5ts3/T2300150??c.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:51:23.43/chk_obsdata//k5ts4/T2300150??d.dat file size is correct (nominal:240MB, actual:236MB). 2006.230.01:51:24.39/k5log//k5ts1_log_newline 2006.230.01:51:25.18/k5log//k5ts2_log_newline 2006.230.01:51:25.99/k5log//k5ts3_log_newline 2006.230.01:51:26.96/k5log//k5ts4_log_newline 2006.230.01:51:26.98/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:51:26.98:setupk4=1 2006.230.01:51:26.98$setupk4/echo=on 2006.230.01:51:26.98$setupk4/pcalon 2006.230.01:51:26.98$pcalon/"no phase cal control is implemented here 2006.230.01:51:26.98$setupk4/"tpicd=stop 2006.230.01:51:26.98$setupk4/"rec=synch_on 2006.230.01:51:26.98$setupk4/"rec_mode=128 2006.230.01:51:26.98$setupk4/!* 2006.230.01:51:26.98$setupk4/recpk4 2006.230.01:51:26.98$recpk4/recpatch= 2006.230.01:51:26.98$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:51:26.98$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:51:26.99$setupk4/vck44 2006.230.01:51:26.99$vck44/valo=1,524.99 2006.230.01:51:26.99#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.01:51:26.99#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.01:51:26.99#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:26.99#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:26.99#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:26.99#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:26.99#ibcon#enter wrdev, iclass 5, count 0 2006.230.01:51:26.99#ibcon#first serial, iclass 5, count 0 2006.230.01:51:26.99#ibcon#enter sib2, iclass 5, count 0 2006.230.01:51:26.99#ibcon#flushed, iclass 5, count 0 2006.230.01:51:26.99#ibcon#about to write, iclass 5, count 0 2006.230.01:51:26.99#ibcon#wrote, iclass 5, count 0 2006.230.01:51:26.99#ibcon#about to read 3, iclass 5, count 0 2006.230.01:51:27.02#ibcon#read 3, iclass 5, count 0 2006.230.01:51:27.02#ibcon#about to read 4, iclass 5, count 0 2006.230.01:51:27.02#ibcon#read 4, iclass 5, count 0 2006.230.01:51:27.02#ibcon#about to read 5, iclass 5, count 0 2006.230.01:51:27.02#ibcon#read 5, iclass 5, count 0 2006.230.01:51:27.02#ibcon#about to read 6, iclass 5, count 0 2006.230.01:51:27.02#ibcon#read 6, iclass 5, count 0 2006.230.01:51:27.02#ibcon#end of sib2, iclass 5, count 0 2006.230.01:51:27.02#ibcon#*mode == 0, iclass 5, count 0 2006.230.01:51:27.02#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.01:51:27.02#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:51:27.02#ibcon#*before write, iclass 5, count 0 2006.230.01:51:27.02#ibcon#enter sib2, iclass 5, count 0 2006.230.01:51:27.02#ibcon#flushed, iclass 5, count 0 2006.230.01:51:27.02#ibcon#about to write, iclass 5, count 0 2006.230.01:51:27.02#ibcon#wrote, iclass 5, count 0 2006.230.01:51:27.02#ibcon#about to read 3, iclass 5, count 0 2006.230.01:51:27.07#ibcon#read 3, iclass 5, count 0 2006.230.01:51:27.07#ibcon#about to read 4, iclass 5, count 0 2006.230.01:51:27.07#ibcon#read 4, iclass 5, count 0 2006.230.01:51:27.07#ibcon#about to read 5, iclass 5, count 0 2006.230.01:51:27.07#ibcon#read 5, iclass 5, count 0 2006.230.01:51:27.07#ibcon#about to read 6, iclass 5, count 0 2006.230.01:51:27.07#ibcon#read 6, iclass 5, count 0 2006.230.01:51:27.07#ibcon#end of sib2, iclass 5, count 0 2006.230.01:51:27.07#ibcon#*after write, iclass 5, count 0 2006.230.01:51:27.07#ibcon#*before return 0, iclass 5, count 0 2006.230.01:51:27.07#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:27.07#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:27.07#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.01:51:27.07#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.01:51:27.07$vck44/va=1,8 2006.230.01:51:27.07#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.01:51:27.07#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.01:51:27.07#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:27.07#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:27.07#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:27.07#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:27.07#ibcon#enter wrdev, iclass 7, count 2 2006.230.01:51:27.07#ibcon#first serial, iclass 7, count 2 2006.230.01:51:27.07#ibcon#enter sib2, iclass 7, count 2 2006.230.01:51:27.07#ibcon#flushed, iclass 7, count 2 2006.230.01:51:27.07#ibcon#about to write, iclass 7, count 2 2006.230.01:51:27.07#ibcon#wrote, iclass 7, count 2 2006.230.01:51:27.07#ibcon#about to read 3, iclass 7, count 2 2006.230.01:51:27.10#ibcon#read 3, iclass 7, count 2 2006.230.01:51:27.10#ibcon#about to read 4, iclass 7, count 2 2006.230.01:51:27.10#ibcon#read 4, iclass 7, count 2 2006.230.01:51:27.10#ibcon#about to read 5, iclass 7, count 2 2006.230.01:51:27.10#ibcon#read 5, iclass 7, count 2 2006.230.01:51:27.10#ibcon#about to read 6, iclass 7, count 2 2006.230.01:51:27.10#ibcon#read 6, iclass 7, count 2 2006.230.01:51:27.10#ibcon#end of sib2, iclass 7, count 2 2006.230.01:51:27.10#ibcon#*mode == 0, iclass 7, count 2 2006.230.01:51:27.10#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.01:51:27.10#ibcon#[25=AT01-08\r\n] 2006.230.01:51:27.10#ibcon#*before write, iclass 7, count 2 2006.230.01:51:27.10#ibcon#enter sib2, iclass 7, count 2 2006.230.01:51:27.10#ibcon#flushed, iclass 7, count 2 2006.230.01:51:27.10#ibcon#about to write, iclass 7, count 2 2006.230.01:51:27.10#ibcon#wrote, iclass 7, count 2 2006.230.01:51:27.10#ibcon#about to read 3, iclass 7, count 2 2006.230.01:51:27.13#ibcon#read 3, iclass 7, count 2 2006.230.01:51:27.13#ibcon#about to read 4, iclass 7, count 2 2006.230.01:51:27.13#ibcon#read 4, iclass 7, count 2 2006.230.01:51:27.13#ibcon#about to read 5, iclass 7, count 2 2006.230.01:51:27.13#ibcon#read 5, iclass 7, count 2 2006.230.01:51:27.13#ibcon#about to read 6, iclass 7, count 2 2006.230.01:51:27.13#ibcon#read 6, iclass 7, count 2 2006.230.01:51:27.13#ibcon#end of sib2, iclass 7, count 2 2006.230.01:51:27.13#ibcon#*after write, iclass 7, count 2 2006.230.01:51:27.13#ibcon#*before return 0, iclass 7, count 2 2006.230.01:51:27.13#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:27.13#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:27.13#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.01:51:27.13#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:27.13#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:27.25#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:27.25#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:27.25#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:51:27.25#ibcon#first serial, iclass 7, count 0 2006.230.01:51:27.25#ibcon#enter sib2, iclass 7, count 0 2006.230.01:51:27.25#ibcon#flushed, iclass 7, count 0 2006.230.01:51:27.25#ibcon#about to write, iclass 7, count 0 2006.230.01:51:27.25#ibcon#wrote, iclass 7, count 0 2006.230.01:51:27.25#ibcon#about to read 3, iclass 7, count 0 2006.230.01:51:27.27#ibcon#read 3, iclass 7, count 0 2006.230.01:51:27.27#ibcon#about to read 4, iclass 7, count 0 2006.230.01:51:27.27#ibcon#read 4, iclass 7, count 0 2006.230.01:51:27.27#ibcon#about to read 5, iclass 7, count 0 2006.230.01:51:27.27#ibcon#read 5, iclass 7, count 0 2006.230.01:51:27.27#ibcon#about to read 6, iclass 7, count 0 2006.230.01:51:27.27#ibcon#read 6, iclass 7, count 0 2006.230.01:51:27.27#ibcon#end of sib2, iclass 7, count 0 2006.230.01:51:27.27#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:51:27.27#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:51:27.27#ibcon#[25=USB\r\n] 2006.230.01:51:27.27#ibcon#*before write, iclass 7, count 0 2006.230.01:51:27.27#ibcon#enter sib2, iclass 7, count 0 2006.230.01:51:27.27#ibcon#flushed, iclass 7, count 0 2006.230.01:51:27.27#ibcon#about to write, iclass 7, count 0 2006.230.01:51:27.27#ibcon#wrote, iclass 7, count 0 2006.230.01:51:27.27#ibcon#about to read 3, iclass 7, count 0 2006.230.01:51:27.30#abcon#<5=/08 1.9 6.8 33.05 651002.6\r\n> 2006.230.01:51:27.30#ibcon#read 3, iclass 7, count 0 2006.230.01:51:27.30#ibcon#about to read 4, iclass 7, count 0 2006.230.01:51:27.30#ibcon#read 4, iclass 7, count 0 2006.230.01:51:27.30#ibcon#about to read 5, iclass 7, count 0 2006.230.01:51:27.30#ibcon#read 5, iclass 7, count 0 2006.230.01:51:27.30#ibcon#about to read 6, iclass 7, count 0 2006.230.01:51:27.30#ibcon#read 6, iclass 7, count 0 2006.230.01:51:27.30#ibcon#end of sib2, iclass 7, count 0 2006.230.01:51:27.30#ibcon#*after write, iclass 7, count 0 2006.230.01:51:27.30#ibcon#*before return 0, iclass 7, count 0 2006.230.01:51:27.30#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:27.30#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:27.30#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:51:27.30#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:51:27.30$vck44/valo=2,534.99 2006.230.01:51:27.30#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:51:27.30#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:51:27.30#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:27.30#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:51:27.30#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:51:27.30#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:51:27.30#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:51:27.30#ibcon#first serial, iclass 14, count 0 2006.230.01:51:27.30#ibcon#enter sib2, iclass 14, count 0 2006.230.01:51:27.30#ibcon#flushed, iclass 14, count 0 2006.230.01:51:27.30#ibcon#about to write, iclass 14, count 0 2006.230.01:51:27.30#ibcon#wrote, iclass 14, count 0 2006.230.01:51:27.30#ibcon#about to read 3, iclass 14, count 0 2006.230.01:51:27.32#abcon#{5=INTERFACE CLEAR} 2006.230.01:51:27.32#ibcon#read 3, iclass 14, count 0 2006.230.01:51:27.32#ibcon#about to read 4, iclass 14, count 0 2006.230.01:51:27.32#ibcon#read 4, iclass 14, count 0 2006.230.01:51:27.32#ibcon#about to read 5, iclass 14, count 0 2006.230.01:51:27.32#ibcon#read 5, iclass 14, count 0 2006.230.01:51:27.32#ibcon#about to read 6, iclass 14, count 0 2006.230.01:51:27.32#ibcon#read 6, iclass 14, count 0 2006.230.01:51:27.32#ibcon#end of sib2, iclass 14, count 0 2006.230.01:51:27.32#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:51:27.32#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:51:27.32#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:51:27.32#ibcon#*before write, iclass 14, count 0 2006.230.01:51:27.32#ibcon#enter sib2, iclass 14, count 0 2006.230.01:51:27.32#ibcon#flushed, iclass 14, count 0 2006.230.01:51:27.32#ibcon#about to write, iclass 14, count 0 2006.230.01:51:27.32#ibcon#wrote, iclass 14, count 0 2006.230.01:51:27.32#ibcon#about to read 3, iclass 14, count 0 2006.230.01:51:27.36#ibcon#read 3, iclass 14, count 0 2006.230.01:51:27.36#ibcon#about to read 4, iclass 14, count 0 2006.230.01:51:27.36#ibcon#read 4, iclass 14, count 0 2006.230.01:51:27.36#ibcon#about to read 5, iclass 14, count 0 2006.230.01:51:27.36#ibcon#read 5, iclass 14, count 0 2006.230.01:51:27.36#ibcon#about to read 6, iclass 14, count 0 2006.230.01:51:27.36#ibcon#read 6, iclass 14, count 0 2006.230.01:51:27.36#ibcon#end of sib2, iclass 14, count 0 2006.230.01:51:27.36#ibcon#*after write, iclass 14, count 0 2006.230.01:51:27.36#ibcon#*before return 0, iclass 14, count 0 2006.230.01:51:27.36#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:51:27.36#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:51:27.36#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:51:27.36#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:51:27.36$vck44/va=2,7 2006.230.01:51:27.36#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.01:51:27.36#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.01:51:27.36#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:27.36#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:51:27.38#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:51:27.42#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:51:27.42#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:51:27.42#ibcon#enter wrdev, iclass 16, count 2 2006.230.01:51:27.42#ibcon#first serial, iclass 16, count 2 2006.230.01:51:27.42#ibcon#enter sib2, iclass 16, count 2 2006.230.01:51:27.42#ibcon#flushed, iclass 16, count 2 2006.230.01:51:27.42#ibcon#about to write, iclass 16, count 2 2006.230.01:51:27.42#ibcon#wrote, iclass 16, count 2 2006.230.01:51:27.42#ibcon#about to read 3, iclass 16, count 2 2006.230.01:51:27.44#ibcon#read 3, iclass 16, count 2 2006.230.01:51:27.44#ibcon#about to read 4, iclass 16, count 2 2006.230.01:51:27.44#ibcon#read 4, iclass 16, count 2 2006.230.01:51:27.44#ibcon#about to read 5, iclass 16, count 2 2006.230.01:51:27.44#ibcon#read 5, iclass 16, count 2 2006.230.01:51:27.44#ibcon#about to read 6, iclass 16, count 2 2006.230.01:51:27.44#ibcon#read 6, iclass 16, count 2 2006.230.01:51:27.44#ibcon#end of sib2, iclass 16, count 2 2006.230.01:51:27.44#ibcon#*mode == 0, iclass 16, count 2 2006.230.01:51:27.44#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.01:51:27.44#ibcon#[25=AT02-07\r\n] 2006.230.01:51:27.44#ibcon#*before write, iclass 16, count 2 2006.230.01:51:27.44#ibcon#enter sib2, iclass 16, count 2 2006.230.01:51:27.44#ibcon#flushed, iclass 16, count 2 2006.230.01:51:27.44#ibcon#about to write, iclass 16, count 2 2006.230.01:51:27.44#ibcon#wrote, iclass 16, count 2 2006.230.01:51:27.44#ibcon#about to read 3, iclass 16, count 2 2006.230.01:51:27.47#ibcon#read 3, iclass 16, count 2 2006.230.01:51:27.47#ibcon#about to read 4, iclass 16, count 2 2006.230.01:51:27.47#ibcon#read 4, iclass 16, count 2 2006.230.01:51:27.47#ibcon#about to read 5, iclass 16, count 2 2006.230.01:51:27.47#ibcon#read 5, iclass 16, count 2 2006.230.01:51:27.47#ibcon#about to read 6, iclass 16, count 2 2006.230.01:51:27.47#ibcon#read 6, iclass 16, count 2 2006.230.01:51:27.47#ibcon#end of sib2, iclass 16, count 2 2006.230.01:51:27.47#ibcon#*after write, iclass 16, count 2 2006.230.01:51:27.47#ibcon#*before return 0, iclass 16, count 2 2006.230.01:51:27.47#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:51:27.47#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:51:27.47#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.01:51:27.47#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:27.47#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:51:27.60#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:51:27.60#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:51:27.60#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:51:27.60#ibcon#first serial, iclass 16, count 0 2006.230.01:51:27.60#ibcon#enter sib2, iclass 16, count 0 2006.230.01:51:27.60#ibcon#flushed, iclass 16, count 0 2006.230.01:51:27.60#ibcon#about to write, iclass 16, count 0 2006.230.01:51:27.60#ibcon#wrote, iclass 16, count 0 2006.230.01:51:27.60#ibcon#about to read 3, iclass 16, count 0 2006.230.01:51:27.61#ibcon#read 3, iclass 16, count 0 2006.230.01:51:27.61#ibcon#about to read 4, iclass 16, count 0 2006.230.01:51:27.61#ibcon#read 4, iclass 16, count 0 2006.230.01:51:27.61#ibcon#about to read 5, iclass 16, count 0 2006.230.01:51:27.61#ibcon#read 5, iclass 16, count 0 2006.230.01:51:27.61#ibcon#about to read 6, iclass 16, count 0 2006.230.01:51:27.61#ibcon#read 6, iclass 16, count 0 2006.230.01:51:27.61#ibcon#end of sib2, iclass 16, count 0 2006.230.01:51:27.61#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:51:27.61#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:51:27.61#ibcon#[25=USB\r\n] 2006.230.01:51:27.61#ibcon#*before write, iclass 16, count 0 2006.230.01:51:27.61#ibcon#enter sib2, iclass 16, count 0 2006.230.01:51:27.61#ibcon#flushed, iclass 16, count 0 2006.230.01:51:27.61#ibcon#about to write, iclass 16, count 0 2006.230.01:51:27.61#ibcon#wrote, iclass 16, count 0 2006.230.01:51:27.61#ibcon#about to read 3, iclass 16, count 0 2006.230.01:51:27.64#ibcon#read 3, iclass 16, count 0 2006.230.01:51:27.64#ibcon#about to read 4, iclass 16, count 0 2006.230.01:51:27.64#ibcon#read 4, iclass 16, count 0 2006.230.01:51:27.64#ibcon#about to read 5, iclass 16, count 0 2006.230.01:51:27.64#ibcon#read 5, iclass 16, count 0 2006.230.01:51:27.64#ibcon#about to read 6, iclass 16, count 0 2006.230.01:51:27.64#ibcon#read 6, iclass 16, count 0 2006.230.01:51:27.64#ibcon#end of sib2, iclass 16, count 0 2006.230.01:51:27.64#ibcon#*after write, iclass 16, count 0 2006.230.01:51:27.64#ibcon#*before return 0, iclass 16, count 0 2006.230.01:51:27.64#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:51:27.64#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:51:27.64#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:51:27.64#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:51:27.64$vck44/valo=3,564.99 2006.230.01:51:27.64#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.01:51:27.64#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.01:51:27.64#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:27.64#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:27.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:27.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:27.64#ibcon#enter wrdev, iclass 19, count 0 2006.230.01:51:27.64#ibcon#first serial, iclass 19, count 0 2006.230.01:51:27.64#ibcon#enter sib2, iclass 19, count 0 2006.230.01:51:27.64#ibcon#flushed, iclass 19, count 0 2006.230.01:51:27.64#ibcon#about to write, iclass 19, count 0 2006.230.01:51:27.64#ibcon#wrote, iclass 19, count 0 2006.230.01:51:27.64#ibcon#about to read 3, iclass 19, count 0 2006.230.01:51:27.67#ibcon#read 3, iclass 19, count 0 2006.230.01:51:27.67#ibcon#about to read 4, iclass 19, count 0 2006.230.01:51:27.67#ibcon#read 4, iclass 19, count 0 2006.230.01:51:27.67#ibcon#about to read 5, iclass 19, count 0 2006.230.01:51:27.67#ibcon#read 5, iclass 19, count 0 2006.230.01:51:27.67#ibcon#about to read 6, iclass 19, count 0 2006.230.01:51:27.67#ibcon#read 6, iclass 19, count 0 2006.230.01:51:27.67#ibcon#end of sib2, iclass 19, count 0 2006.230.01:51:27.67#ibcon#*mode == 0, iclass 19, count 0 2006.230.01:51:27.67#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.01:51:27.67#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:51:27.67#ibcon#*before write, iclass 19, count 0 2006.230.01:51:27.67#ibcon#enter sib2, iclass 19, count 0 2006.230.01:51:27.67#ibcon#flushed, iclass 19, count 0 2006.230.01:51:27.67#ibcon#about to write, iclass 19, count 0 2006.230.01:51:27.67#ibcon#wrote, iclass 19, count 0 2006.230.01:51:27.67#ibcon#about to read 3, iclass 19, count 0 2006.230.01:51:27.71#ibcon#read 3, iclass 19, count 0 2006.230.01:51:27.71#ibcon#about to read 4, iclass 19, count 0 2006.230.01:51:27.71#ibcon#read 4, iclass 19, count 0 2006.230.01:51:27.71#ibcon#about to read 5, iclass 19, count 0 2006.230.01:51:27.71#ibcon#read 5, iclass 19, count 0 2006.230.01:51:27.71#ibcon#about to read 6, iclass 19, count 0 2006.230.01:51:27.71#ibcon#read 6, iclass 19, count 0 2006.230.01:51:27.71#ibcon#end of sib2, iclass 19, count 0 2006.230.01:51:27.71#ibcon#*after write, iclass 19, count 0 2006.230.01:51:27.71#ibcon#*before return 0, iclass 19, count 0 2006.230.01:51:27.71#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:27.71#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:27.71#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.01:51:27.71#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.01:51:27.71$vck44/va=3,6 2006.230.01:51:27.71#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.230.01:51:27.71#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.230.01:51:27.71#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:27.71#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:27.76#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:27.76#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:27.76#ibcon#enter wrdev, iclass 21, count 2 2006.230.01:51:27.76#ibcon#first serial, iclass 21, count 2 2006.230.01:51:27.76#ibcon#enter sib2, iclass 21, count 2 2006.230.01:51:27.76#ibcon#flushed, iclass 21, count 2 2006.230.01:51:27.76#ibcon#about to write, iclass 21, count 2 2006.230.01:51:27.76#ibcon#wrote, iclass 21, count 2 2006.230.01:51:27.76#ibcon#about to read 3, iclass 21, count 2 2006.230.01:51:27.78#ibcon#read 3, iclass 21, count 2 2006.230.01:51:27.78#ibcon#about to read 4, iclass 21, count 2 2006.230.01:51:27.78#ibcon#read 4, iclass 21, count 2 2006.230.01:51:27.78#ibcon#about to read 5, iclass 21, count 2 2006.230.01:51:27.78#ibcon#read 5, iclass 21, count 2 2006.230.01:51:27.78#ibcon#about to read 6, iclass 21, count 2 2006.230.01:51:27.78#ibcon#read 6, iclass 21, count 2 2006.230.01:51:27.78#ibcon#end of sib2, iclass 21, count 2 2006.230.01:51:27.78#ibcon#*mode == 0, iclass 21, count 2 2006.230.01:51:27.78#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.230.01:51:27.78#ibcon#[25=AT03-06\r\n] 2006.230.01:51:27.78#ibcon#*before write, iclass 21, count 2 2006.230.01:51:27.78#ibcon#enter sib2, iclass 21, count 2 2006.230.01:51:27.78#ibcon#flushed, iclass 21, count 2 2006.230.01:51:27.78#ibcon#about to write, iclass 21, count 2 2006.230.01:51:27.78#ibcon#wrote, iclass 21, count 2 2006.230.01:51:27.78#ibcon#about to read 3, iclass 21, count 2 2006.230.01:51:27.81#ibcon#read 3, iclass 21, count 2 2006.230.01:51:27.81#ibcon#about to read 4, iclass 21, count 2 2006.230.01:51:27.81#ibcon#read 4, iclass 21, count 2 2006.230.01:51:27.81#ibcon#about to read 5, iclass 21, count 2 2006.230.01:51:27.81#ibcon#read 5, iclass 21, count 2 2006.230.01:51:27.81#ibcon#about to read 6, iclass 21, count 2 2006.230.01:51:27.81#ibcon#read 6, iclass 21, count 2 2006.230.01:51:27.81#ibcon#end of sib2, iclass 21, count 2 2006.230.01:51:27.81#ibcon#*after write, iclass 21, count 2 2006.230.01:51:27.81#ibcon#*before return 0, iclass 21, count 2 2006.230.01:51:27.81#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:27.81#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:27.81#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.230.01:51:27.81#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:27.81#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:27.93#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:27.93#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:27.93#ibcon#enter wrdev, iclass 21, count 0 2006.230.01:51:27.93#ibcon#first serial, iclass 21, count 0 2006.230.01:51:27.93#ibcon#enter sib2, iclass 21, count 0 2006.230.01:51:27.93#ibcon#flushed, iclass 21, count 0 2006.230.01:51:27.93#ibcon#about to write, iclass 21, count 0 2006.230.01:51:27.93#ibcon#wrote, iclass 21, count 0 2006.230.01:51:27.93#ibcon#about to read 3, iclass 21, count 0 2006.230.01:51:27.95#ibcon#read 3, iclass 21, count 0 2006.230.01:51:27.95#ibcon#about to read 4, iclass 21, count 0 2006.230.01:51:27.95#ibcon#read 4, iclass 21, count 0 2006.230.01:51:27.95#ibcon#about to read 5, iclass 21, count 0 2006.230.01:51:27.95#ibcon#read 5, iclass 21, count 0 2006.230.01:51:27.95#ibcon#about to read 6, iclass 21, count 0 2006.230.01:51:27.95#ibcon#read 6, iclass 21, count 0 2006.230.01:51:27.95#ibcon#end of sib2, iclass 21, count 0 2006.230.01:51:27.95#ibcon#*mode == 0, iclass 21, count 0 2006.230.01:51:27.95#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.01:51:27.95#ibcon#[25=USB\r\n] 2006.230.01:51:27.95#ibcon#*before write, iclass 21, count 0 2006.230.01:51:27.95#ibcon#enter sib2, iclass 21, count 0 2006.230.01:51:27.95#ibcon#flushed, iclass 21, count 0 2006.230.01:51:27.95#ibcon#about to write, iclass 21, count 0 2006.230.01:51:27.95#ibcon#wrote, iclass 21, count 0 2006.230.01:51:27.95#ibcon#about to read 3, iclass 21, count 0 2006.230.01:51:27.98#ibcon#read 3, iclass 21, count 0 2006.230.01:51:27.98#ibcon#about to read 4, iclass 21, count 0 2006.230.01:51:27.98#ibcon#read 4, iclass 21, count 0 2006.230.01:51:27.98#ibcon#about to read 5, iclass 21, count 0 2006.230.01:51:27.98#ibcon#read 5, iclass 21, count 0 2006.230.01:51:27.98#ibcon#about to read 6, iclass 21, count 0 2006.230.01:51:27.98#ibcon#read 6, iclass 21, count 0 2006.230.01:51:27.98#ibcon#end of sib2, iclass 21, count 0 2006.230.01:51:27.98#ibcon#*after write, iclass 21, count 0 2006.230.01:51:27.98#ibcon#*before return 0, iclass 21, count 0 2006.230.01:51:27.98#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:27.98#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:27.98#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.01:51:27.98#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.01:51:27.98$vck44/valo=4,624.99 2006.230.01:51:27.98#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.01:51:27.98#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.01:51:27.98#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:27.98#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:27.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:27.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:27.98#ibcon#enter wrdev, iclass 23, count 0 2006.230.01:51:27.98#ibcon#first serial, iclass 23, count 0 2006.230.01:51:27.98#ibcon#enter sib2, iclass 23, count 0 2006.230.01:51:27.98#ibcon#flushed, iclass 23, count 0 2006.230.01:51:27.98#ibcon#about to write, iclass 23, count 0 2006.230.01:51:27.98#ibcon#wrote, iclass 23, count 0 2006.230.01:51:27.98#ibcon#about to read 3, iclass 23, count 0 2006.230.01:51:28.00#ibcon#read 3, iclass 23, count 0 2006.230.01:51:28.00#ibcon#about to read 4, iclass 23, count 0 2006.230.01:51:28.00#ibcon#read 4, iclass 23, count 0 2006.230.01:51:28.00#ibcon#about to read 5, iclass 23, count 0 2006.230.01:51:28.00#ibcon#read 5, iclass 23, count 0 2006.230.01:51:28.00#ibcon#about to read 6, iclass 23, count 0 2006.230.01:51:28.00#ibcon#read 6, iclass 23, count 0 2006.230.01:51:28.00#ibcon#end of sib2, iclass 23, count 0 2006.230.01:51:28.00#ibcon#*mode == 0, iclass 23, count 0 2006.230.01:51:28.00#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.01:51:28.00#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:51:28.00#ibcon#*before write, iclass 23, count 0 2006.230.01:51:28.00#ibcon#enter sib2, iclass 23, count 0 2006.230.01:51:28.00#ibcon#flushed, iclass 23, count 0 2006.230.01:51:28.00#ibcon#about to write, iclass 23, count 0 2006.230.01:51:28.00#ibcon#wrote, iclass 23, count 0 2006.230.01:51:28.00#ibcon#about to read 3, iclass 23, count 0 2006.230.01:51:28.04#ibcon#read 3, iclass 23, count 0 2006.230.01:51:28.04#ibcon#about to read 4, iclass 23, count 0 2006.230.01:51:28.04#ibcon#read 4, iclass 23, count 0 2006.230.01:51:28.04#ibcon#about to read 5, iclass 23, count 0 2006.230.01:51:28.04#ibcon#read 5, iclass 23, count 0 2006.230.01:51:28.04#ibcon#about to read 6, iclass 23, count 0 2006.230.01:51:28.04#ibcon#read 6, iclass 23, count 0 2006.230.01:51:28.04#ibcon#end of sib2, iclass 23, count 0 2006.230.01:51:28.04#ibcon#*after write, iclass 23, count 0 2006.230.01:51:28.04#ibcon#*before return 0, iclass 23, count 0 2006.230.01:51:28.04#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:28.04#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:28.04#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.01:51:28.04#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.01:51:28.04$vck44/va=4,7 2006.230.01:51:28.04#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.01:51:28.04#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.01:51:28.04#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:28.04#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:28.10#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:28.10#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:28.10#ibcon#enter wrdev, iclass 25, count 2 2006.230.01:51:28.10#ibcon#first serial, iclass 25, count 2 2006.230.01:51:28.10#ibcon#enter sib2, iclass 25, count 2 2006.230.01:51:28.10#ibcon#flushed, iclass 25, count 2 2006.230.01:51:28.10#ibcon#about to write, iclass 25, count 2 2006.230.01:51:28.10#ibcon#wrote, iclass 25, count 2 2006.230.01:51:28.10#ibcon#about to read 3, iclass 25, count 2 2006.230.01:51:28.12#ibcon#read 3, iclass 25, count 2 2006.230.01:51:28.12#ibcon#about to read 4, iclass 25, count 2 2006.230.01:51:28.12#ibcon#read 4, iclass 25, count 2 2006.230.01:51:28.12#ibcon#about to read 5, iclass 25, count 2 2006.230.01:51:28.12#ibcon#read 5, iclass 25, count 2 2006.230.01:51:28.12#ibcon#about to read 6, iclass 25, count 2 2006.230.01:51:28.12#ibcon#read 6, iclass 25, count 2 2006.230.01:51:28.12#ibcon#end of sib2, iclass 25, count 2 2006.230.01:51:28.12#ibcon#*mode == 0, iclass 25, count 2 2006.230.01:51:28.12#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.01:51:28.12#ibcon#[25=AT04-07\r\n] 2006.230.01:51:28.12#ibcon#*before write, iclass 25, count 2 2006.230.01:51:28.12#ibcon#enter sib2, iclass 25, count 2 2006.230.01:51:28.12#ibcon#flushed, iclass 25, count 2 2006.230.01:51:28.12#ibcon#about to write, iclass 25, count 2 2006.230.01:51:28.12#ibcon#wrote, iclass 25, count 2 2006.230.01:51:28.12#ibcon#about to read 3, iclass 25, count 2 2006.230.01:51:28.15#ibcon#read 3, iclass 25, count 2 2006.230.01:51:28.15#ibcon#about to read 4, iclass 25, count 2 2006.230.01:51:28.15#ibcon#read 4, iclass 25, count 2 2006.230.01:51:28.15#ibcon#about to read 5, iclass 25, count 2 2006.230.01:51:28.15#ibcon#read 5, iclass 25, count 2 2006.230.01:51:28.15#ibcon#about to read 6, iclass 25, count 2 2006.230.01:51:28.15#ibcon#read 6, iclass 25, count 2 2006.230.01:51:28.15#ibcon#end of sib2, iclass 25, count 2 2006.230.01:51:28.15#ibcon#*after write, iclass 25, count 2 2006.230.01:51:28.15#ibcon#*before return 0, iclass 25, count 2 2006.230.01:51:28.15#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:28.15#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:28.15#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.01:51:28.15#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:28.15#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:28.27#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:28.27#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:28.27#ibcon#enter wrdev, iclass 25, count 0 2006.230.01:51:28.27#ibcon#first serial, iclass 25, count 0 2006.230.01:51:28.27#ibcon#enter sib2, iclass 25, count 0 2006.230.01:51:28.27#ibcon#flushed, iclass 25, count 0 2006.230.01:51:28.27#ibcon#about to write, iclass 25, count 0 2006.230.01:51:28.27#ibcon#wrote, iclass 25, count 0 2006.230.01:51:28.27#ibcon#about to read 3, iclass 25, count 0 2006.230.01:51:28.29#ibcon#read 3, iclass 25, count 0 2006.230.01:51:28.29#ibcon#about to read 4, iclass 25, count 0 2006.230.01:51:28.29#ibcon#read 4, iclass 25, count 0 2006.230.01:51:28.29#ibcon#about to read 5, iclass 25, count 0 2006.230.01:51:28.29#ibcon#read 5, iclass 25, count 0 2006.230.01:51:28.29#ibcon#about to read 6, iclass 25, count 0 2006.230.01:51:28.29#ibcon#read 6, iclass 25, count 0 2006.230.01:51:28.29#ibcon#end of sib2, iclass 25, count 0 2006.230.01:51:28.29#ibcon#*mode == 0, iclass 25, count 0 2006.230.01:51:28.29#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.01:51:28.29#ibcon#[25=USB\r\n] 2006.230.01:51:28.29#ibcon#*before write, iclass 25, count 0 2006.230.01:51:28.29#ibcon#enter sib2, iclass 25, count 0 2006.230.01:51:28.29#ibcon#flushed, iclass 25, count 0 2006.230.01:51:28.29#ibcon#about to write, iclass 25, count 0 2006.230.01:51:28.29#ibcon#wrote, iclass 25, count 0 2006.230.01:51:28.29#ibcon#about to read 3, iclass 25, count 0 2006.230.01:51:28.32#ibcon#read 3, iclass 25, count 0 2006.230.01:51:28.32#ibcon#about to read 4, iclass 25, count 0 2006.230.01:51:28.32#ibcon#read 4, iclass 25, count 0 2006.230.01:51:28.32#ibcon#about to read 5, iclass 25, count 0 2006.230.01:51:28.32#ibcon#read 5, iclass 25, count 0 2006.230.01:51:28.32#ibcon#about to read 6, iclass 25, count 0 2006.230.01:51:28.32#ibcon#read 6, iclass 25, count 0 2006.230.01:51:28.32#ibcon#end of sib2, iclass 25, count 0 2006.230.01:51:28.32#ibcon#*after write, iclass 25, count 0 2006.230.01:51:28.32#ibcon#*before return 0, iclass 25, count 0 2006.230.01:51:28.32#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:28.32#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:28.32#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.01:51:28.32#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.01:51:28.32$vck44/valo=5,734.99 2006.230.01:51:28.32#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.01:51:28.32#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.01:51:28.32#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:28.32#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:28.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:28.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:28.32#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:51:28.32#ibcon#first serial, iclass 27, count 0 2006.230.01:51:28.32#ibcon#enter sib2, iclass 27, count 0 2006.230.01:51:28.32#ibcon#flushed, iclass 27, count 0 2006.230.01:51:28.32#ibcon#about to write, iclass 27, count 0 2006.230.01:51:28.32#ibcon#wrote, iclass 27, count 0 2006.230.01:51:28.32#ibcon#about to read 3, iclass 27, count 0 2006.230.01:51:28.35#ibcon#read 3, iclass 27, count 0 2006.230.01:51:28.35#ibcon#about to read 4, iclass 27, count 0 2006.230.01:51:28.35#ibcon#read 4, iclass 27, count 0 2006.230.01:51:28.35#ibcon#about to read 5, iclass 27, count 0 2006.230.01:51:28.35#ibcon#read 5, iclass 27, count 0 2006.230.01:51:28.35#ibcon#about to read 6, iclass 27, count 0 2006.230.01:51:28.35#ibcon#read 6, iclass 27, count 0 2006.230.01:51:28.35#ibcon#end of sib2, iclass 27, count 0 2006.230.01:51:28.35#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:51:28.35#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:51:28.35#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:51:28.35#ibcon#*before write, iclass 27, count 0 2006.230.01:51:28.35#ibcon#enter sib2, iclass 27, count 0 2006.230.01:51:28.35#ibcon#flushed, iclass 27, count 0 2006.230.01:51:28.35#ibcon#about to write, iclass 27, count 0 2006.230.01:51:28.35#ibcon#wrote, iclass 27, count 0 2006.230.01:51:28.35#ibcon#about to read 3, iclass 27, count 0 2006.230.01:51:28.39#ibcon#read 3, iclass 27, count 0 2006.230.01:51:28.39#ibcon#about to read 4, iclass 27, count 0 2006.230.01:51:28.39#ibcon#read 4, iclass 27, count 0 2006.230.01:51:28.39#ibcon#about to read 5, iclass 27, count 0 2006.230.01:51:28.39#ibcon#read 5, iclass 27, count 0 2006.230.01:51:28.39#ibcon#about to read 6, iclass 27, count 0 2006.230.01:51:28.39#ibcon#read 6, iclass 27, count 0 2006.230.01:51:28.39#ibcon#end of sib2, iclass 27, count 0 2006.230.01:51:28.39#ibcon#*after write, iclass 27, count 0 2006.230.01:51:28.39#ibcon#*before return 0, iclass 27, count 0 2006.230.01:51:28.39#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:28.39#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:28.39#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:51:28.39#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:51:28.39$vck44/va=5,4 2006.230.01:51:28.39#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.01:51:28.39#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.01:51:28.39#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:28.39#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:28.44#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:28.44#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:28.44#ibcon#enter wrdev, iclass 29, count 2 2006.230.01:51:28.44#ibcon#first serial, iclass 29, count 2 2006.230.01:51:28.44#ibcon#enter sib2, iclass 29, count 2 2006.230.01:51:28.44#ibcon#flushed, iclass 29, count 2 2006.230.01:51:28.44#ibcon#about to write, iclass 29, count 2 2006.230.01:51:28.44#ibcon#wrote, iclass 29, count 2 2006.230.01:51:28.44#ibcon#about to read 3, iclass 29, count 2 2006.230.01:51:28.46#ibcon#read 3, iclass 29, count 2 2006.230.01:51:28.46#ibcon#about to read 4, iclass 29, count 2 2006.230.01:51:28.46#ibcon#read 4, iclass 29, count 2 2006.230.01:51:28.46#ibcon#about to read 5, iclass 29, count 2 2006.230.01:51:28.46#ibcon#read 5, iclass 29, count 2 2006.230.01:51:28.46#ibcon#about to read 6, iclass 29, count 2 2006.230.01:51:28.46#ibcon#read 6, iclass 29, count 2 2006.230.01:51:28.46#ibcon#end of sib2, iclass 29, count 2 2006.230.01:51:28.46#ibcon#*mode == 0, iclass 29, count 2 2006.230.01:51:28.46#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.01:51:28.46#ibcon#[25=AT05-04\r\n] 2006.230.01:51:28.46#ibcon#*before write, iclass 29, count 2 2006.230.01:51:28.46#ibcon#enter sib2, iclass 29, count 2 2006.230.01:51:28.46#ibcon#flushed, iclass 29, count 2 2006.230.01:51:28.46#ibcon#about to write, iclass 29, count 2 2006.230.01:51:28.46#ibcon#wrote, iclass 29, count 2 2006.230.01:51:28.46#ibcon#about to read 3, iclass 29, count 2 2006.230.01:51:28.49#ibcon#read 3, iclass 29, count 2 2006.230.01:51:28.49#ibcon#about to read 4, iclass 29, count 2 2006.230.01:51:28.49#ibcon#read 4, iclass 29, count 2 2006.230.01:51:28.49#ibcon#about to read 5, iclass 29, count 2 2006.230.01:51:28.49#ibcon#read 5, iclass 29, count 2 2006.230.01:51:28.49#ibcon#about to read 6, iclass 29, count 2 2006.230.01:51:28.49#ibcon#read 6, iclass 29, count 2 2006.230.01:51:28.49#ibcon#end of sib2, iclass 29, count 2 2006.230.01:51:28.49#ibcon#*after write, iclass 29, count 2 2006.230.01:51:28.49#ibcon#*before return 0, iclass 29, count 2 2006.230.01:51:28.49#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:28.49#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:28.49#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.01:51:28.49#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:28.49#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:28.61#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:28.61#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:28.61#ibcon#enter wrdev, iclass 29, count 0 2006.230.01:51:28.61#ibcon#first serial, iclass 29, count 0 2006.230.01:51:28.61#ibcon#enter sib2, iclass 29, count 0 2006.230.01:51:28.61#ibcon#flushed, iclass 29, count 0 2006.230.01:51:28.61#ibcon#about to write, iclass 29, count 0 2006.230.01:51:28.61#ibcon#wrote, iclass 29, count 0 2006.230.01:51:28.61#ibcon#about to read 3, iclass 29, count 0 2006.230.01:51:28.63#ibcon#read 3, iclass 29, count 0 2006.230.01:51:28.63#ibcon#about to read 4, iclass 29, count 0 2006.230.01:51:28.63#ibcon#read 4, iclass 29, count 0 2006.230.01:51:28.63#ibcon#about to read 5, iclass 29, count 0 2006.230.01:51:28.63#ibcon#read 5, iclass 29, count 0 2006.230.01:51:28.63#ibcon#about to read 6, iclass 29, count 0 2006.230.01:51:28.63#ibcon#read 6, iclass 29, count 0 2006.230.01:51:28.63#ibcon#end of sib2, iclass 29, count 0 2006.230.01:51:28.63#ibcon#*mode == 0, iclass 29, count 0 2006.230.01:51:28.63#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.01:51:28.63#ibcon#[25=USB\r\n] 2006.230.01:51:28.63#ibcon#*before write, iclass 29, count 0 2006.230.01:51:28.63#ibcon#enter sib2, iclass 29, count 0 2006.230.01:51:28.63#ibcon#flushed, iclass 29, count 0 2006.230.01:51:28.63#ibcon#about to write, iclass 29, count 0 2006.230.01:51:28.63#ibcon#wrote, iclass 29, count 0 2006.230.01:51:28.63#ibcon#about to read 3, iclass 29, count 0 2006.230.01:51:28.66#ibcon#read 3, iclass 29, count 0 2006.230.01:51:28.66#ibcon#about to read 4, iclass 29, count 0 2006.230.01:51:28.66#ibcon#read 4, iclass 29, count 0 2006.230.01:51:28.66#ibcon#about to read 5, iclass 29, count 0 2006.230.01:51:28.66#ibcon#read 5, iclass 29, count 0 2006.230.01:51:28.66#ibcon#about to read 6, iclass 29, count 0 2006.230.01:51:28.66#ibcon#read 6, iclass 29, count 0 2006.230.01:51:28.66#ibcon#end of sib2, iclass 29, count 0 2006.230.01:51:28.66#ibcon#*after write, iclass 29, count 0 2006.230.01:51:28.66#ibcon#*before return 0, iclass 29, count 0 2006.230.01:51:28.66#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:28.66#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:28.66#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.01:51:28.66#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.01:51:28.66$vck44/valo=6,814.99 2006.230.01:51:28.66#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.01:51:28.66#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.01:51:28.66#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:28.66#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:28.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:28.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:28.66#ibcon#enter wrdev, iclass 31, count 0 2006.230.01:51:28.66#ibcon#first serial, iclass 31, count 0 2006.230.01:51:28.66#ibcon#enter sib2, iclass 31, count 0 2006.230.01:51:28.66#ibcon#flushed, iclass 31, count 0 2006.230.01:51:28.66#ibcon#about to write, iclass 31, count 0 2006.230.01:51:28.66#ibcon#wrote, iclass 31, count 0 2006.230.01:51:28.66#ibcon#about to read 3, iclass 31, count 0 2006.230.01:51:28.68#ibcon#read 3, iclass 31, count 0 2006.230.01:51:28.68#ibcon#about to read 4, iclass 31, count 0 2006.230.01:51:28.68#ibcon#read 4, iclass 31, count 0 2006.230.01:51:28.68#ibcon#about to read 5, iclass 31, count 0 2006.230.01:51:28.68#ibcon#read 5, iclass 31, count 0 2006.230.01:51:28.68#ibcon#about to read 6, iclass 31, count 0 2006.230.01:51:28.68#ibcon#read 6, iclass 31, count 0 2006.230.01:51:28.68#ibcon#end of sib2, iclass 31, count 0 2006.230.01:51:28.68#ibcon#*mode == 0, iclass 31, count 0 2006.230.01:51:28.68#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.01:51:28.68#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:51:28.68#ibcon#*before write, iclass 31, count 0 2006.230.01:51:28.68#ibcon#enter sib2, iclass 31, count 0 2006.230.01:51:28.68#ibcon#flushed, iclass 31, count 0 2006.230.01:51:28.68#ibcon#about to write, iclass 31, count 0 2006.230.01:51:28.68#ibcon#wrote, iclass 31, count 0 2006.230.01:51:28.68#ibcon#about to read 3, iclass 31, count 0 2006.230.01:51:28.72#ibcon#read 3, iclass 31, count 0 2006.230.01:51:28.72#ibcon#about to read 4, iclass 31, count 0 2006.230.01:51:28.72#ibcon#read 4, iclass 31, count 0 2006.230.01:51:28.72#ibcon#about to read 5, iclass 31, count 0 2006.230.01:51:28.72#ibcon#read 5, iclass 31, count 0 2006.230.01:51:28.72#ibcon#about to read 6, iclass 31, count 0 2006.230.01:51:28.72#ibcon#read 6, iclass 31, count 0 2006.230.01:51:28.72#ibcon#end of sib2, iclass 31, count 0 2006.230.01:51:28.72#ibcon#*after write, iclass 31, count 0 2006.230.01:51:28.72#ibcon#*before return 0, iclass 31, count 0 2006.230.01:51:28.72#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:28.72#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:28.72#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.01:51:28.72#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.01:51:28.72$vck44/va=6,4 2006.230.01:51:28.72#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.01:51:28.72#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.01:51:28.72#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:28.72#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:28.78#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:28.78#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:28.78#ibcon#enter wrdev, iclass 33, count 2 2006.230.01:51:28.78#ibcon#first serial, iclass 33, count 2 2006.230.01:51:28.78#ibcon#enter sib2, iclass 33, count 2 2006.230.01:51:28.78#ibcon#flushed, iclass 33, count 2 2006.230.01:51:28.78#ibcon#about to write, iclass 33, count 2 2006.230.01:51:28.78#ibcon#wrote, iclass 33, count 2 2006.230.01:51:28.78#ibcon#about to read 3, iclass 33, count 2 2006.230.01:51:28.80#ibcon#read 3, iclass 33, count 2 2006.230.01:51:28.80#ibcon#about to read 4, iclass 33, count 2 2006.230.01:51:28.80#ibcon#read 4, iclass 33, count 2 2006.230.01:51:28.80#ibcon#about to read 5, iclass 33, count 2 2006.230.01:51:28.80#ibcon#read 5, iclass 33, count 2 2006.230.01:51:28.80#ibcon#about to read 6, iclass 33, count 2 2006.230.01:51:28.80#ibcon#read 6, iclass 33, count 2 2006.230.01:51:28.80#ibcon#end of sib2, iclass 33, count 2 2006.230.01:51:28.80#ibcon#*mode == 0, iclass 33, count 2 2006.230.01:51:28.80#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.01:51:28.80#ibcon#[25=AT06-04\r\n] 2006.230.01:51:28.80#ibcon#*before write, iclass 33, count 2 2006.230.01:51:28.80#ibcon#enter sib2, iclass 33, count 2 2006.230.01:51:28.80#ibcon#flushed, iclass 33, count 2 2006.230.01:51:28.80#ibcon#about to write, iclass 33, count 2 2006.230.01:51:28.80#ibcon#wrote, iclass 33, count 2 2006.230.01:51:28.80#ibcon#about to read 3, iclass 33, count 2 2006.230.01:51:28.83#ibcon#read 3, iclass 33, count 2 2006.230.01:51:28.83#ibcon#about to read 4, iclass 33, count 2 2006.230.01:51:28.83#ibcon#read 4, iclass 33, count 2 2006.230.01:51:28.83#ibcon#about to read 5, iclass 33, count 2 2006.230.01:51:28.83#ibcon#read 5, iclass 33, count 2 2006.230.01:51:28.83#ibcon#about to read 6, iclass 33, count 2 2006.230.01:51:28.83#ibcon#read 6, iclass 33, count 2 2006.230.01:51:28.83#ibcon#end of sib2, iclass 33, count 2 2006.230.01:51:28.83#ibcon#*after write, iclass 33, count 2 2006.230.01:51:28.83#ibcon#*before return 0, iclass 33, count 2 2006.230.01:51:28.83#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:28.83#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:28.83#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.01:51:28.83#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:28.83#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:28.95#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:28.95#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:28.95#ibcon#enter wrdev, iclass 33, count 0 2006.230.01:51:28.95#ibcon#first serial, iclass 33, count 0 2006.230.01:51:28.95#ibcon#enter sib2, iclass 33, count 0 2006.230.01:51:28.95#ibcon#flushed, iclass 33, count 0 2006.230.01:51:28.95#ibcon#about to write, iclass 33, count 0 2006.230.01:51:28.95#ibcon#wrote, iclass 33, count 0 2006.230.01:51:28.95#ibcon#about to read 3, iclass 33, count 0 2006.230.01:51:28.97#ibcon#read 3, iclass 33, count 0 2006.230.01:51:28.97#ibcon#about to read 4, iclass 33, count 0 2006.230.01:51:28.97#ibcon#read 4, iclass 33, count 0 2006.230.01:51:28.97#ibcon#about to read 5, iclass 33, count 0 2006.230.01:51:28.97#ibcon#read 5, iclass 33, count 0 2006.230.01:51:28.97#ibcon#about to read 6, iclass 33, count 0 2006.230.01:51:28.97#ibcon#read 6, iclass 33, count 0 2006.230.01:51:28.97#ibcon#end of sib2, iclass 33, count 0 2006.230.01:51:28.97#ibcon#*mode == 0, iclass 33, count 0 2006.230.01:51:28.97#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.01:51:28.97#ibcon#[25=USB\r\n] 2006.230.01:51:28.97#ibcon#*before write, iclass 33, count 0 2006.230.01:51:28.97#ibcon#enter sib2, iclass 33, count 0 2006.230.01:51:28.97#ibcon#flushed, iclass 33, count 0 2006.230.01:51:28.97#ibcon#about to write, iclass 33, count 0 2006.230.01:51:28.97#ibcon#wrote, iclass 33, count 0 2006.230.01:51:28.97#ibcon#about to read 3, iclass 33, count 0 2006.230.01:51:29.00#ibcon#read 3, iclass 33, count 0 2006.230.01:51:29.00#ibcon#about to read 4, iclass 33, count 0 2006.230.01:51:29.00#ibcon#read 4, iclass 33, count 0 2006.230.01:51:29.00#ibcon#about to read 5, iclass 33, count 0 2006.230.01:51:29.00#ibcon#read 5, iclass 33, count 0 2006.230.01:51:29.00#ibcon#about to read 6, iclass 33, count 0 2006.230.01:51:29.00#ibcon#read 6, iclass 33, count 0 2006.230.01:51:29.00#ibcon#end of sib2, iclass 33, count 0 2006.230.01:51:29.00#ibcon#*after write, iclass 33, count 0 2006.230.01:51:29.00#ibcon#*before return 0, iclass 33, count 0 2006.230.01:51:29.00#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:29.00#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:29.00#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.01:51:29.00#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.01:51:29.00$vck44/valo=7,864.99 2006.230.01:51:29.00#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.01:51:29.00#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.01:51:29.00#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:29.00#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:29.00#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:29.00#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:29.00#ibcon#enter wrdev, iclass 35, count 0 2006.230.01:51:29.00#ibcon#first serial, iclass 35, count 0 2006.230.01:51:29.00#ibcon#enter sib2, iclass 35, count 0 2006.230.01:51:29.00#ibcon#flushed, iclass 35, count 0 2006.230.01:51:29.00#ibcon#about to write, iclass 35, count 0 2006.230.01:51:29.00#ibcon#wrote, iclass 35, count 0 2006.230.01:51:29.00#ibcon#about to read 3, iclass 35, count 0 2006.230.01:51:29.02#ibcon#read 3, iclass 35, count 0 2006.230.01:51:29.02#ibcon#about to read 4, iclass 35, count 0 2006.230.01:51:29.02#ibcon#read 4, iclass 35, count 0 2006.230.01:51:29.02#ibcon#about to read 5, iclass 35, count 0 2006.230.01:51:29.02#ibcon#read 5, iclass 35, count 0 2006.230.01:51:29.02#ibcon#about to read 6, iclass 35, count 0 2006.230.01:51:29.02#ibcon#read 6, iclass 35, count 0 2006.230.01:51:29.02#ibcon#end of sib2, iclass 35, count 0 2006.230.01:51:29.02#ibcon#*mode == 0, iclass 35, count 0 2006.230.01:51:29.02#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.01:51:29.02#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:51:29.02#ibcon#*before write, iclass 35, count 0 2006.230.01:51:29.02#ibcon#enter sib2, iclass 35, count 0 2006.230.01:51:29.02#ibcon#flushed, iclass 35, count 0 2006.230.01:51:29.02#ibcon#about to write, iclass 35, count 0 2006.230.01:51:29.02#ibcon#wrote, iclass 35, count 0 2006.230.01:51:29.02#ibcon#about to read 3, iclass 35, count 0 2006.230.01:51:29.06#ibcon#read 3, iclass 35, count 0 2006.230.01:51:29.06#ibcon#about to read 4, iclass 35, count 0 2006.230.01:51:29.06#ibcon#read 4, iclass 35, count 0 2006.230.01:51:29.06#ibcon#about to read 5, iclass 35, count 0 2006.230.01:51:29.06#ibcon#read 5, iclass 35, count 0 2006.230.01:51:29.06#ibcon#about to read 6, iclass 35, count 0 2006.230.01:51:29.06#ibcon#read 6, iclass 35, count 0 2006.230.01:51:29.06#ibcon#end of sib2, iclass 35, count 0 2006.230.01:51:29.06#ibcon#*after write, iclass 35, count 0 2006.230.01:51:29.06#ibcon#*before return 0, iclass 35, count 0 2006.230.01:51:29.06#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:29.06#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:29.06#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.01:51:29.06#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.01:51:29.06$vck44/va=7,5 2006.230.01:51:29.06#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.01:51:29.06#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.01:51:29.06#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:29.06#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:29.12#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:29.12#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:29.12#ibcon#enter wrdev, iclass 37, count 2 2006.230.01:51:29.12#ibcon#first serial, iclass 37, count 2 2006.230.01:51:29.12#ibcon#enter sib2, iclass 37, count 2 2006.230.01:51:29.12#ibcon#flushed, iclass 37, count 2 2006.230.01:51:29.12#ibcon#about to write, iclass 37, count 2 2006.230.01:51:29.12#ibcon#wrote, iclass 37, count 2 2006.230.01:51:29.12#ibcon#about to read 3, iclass 37, count 2 2006.230.01:51:29.14#ibcon#read 3, iclass 37, count 2 2006.230.01:51:29.14#ibcon#about to read 4, iclass 37, count 2 2006.230.01:51:29.14#ibcon#read 4, iclass 37, count 2 2006.230.01:51:29.14#ibcon#about to read 5, iclass 37, count 2 2006.230.01:51:29.14#ibcon#read 5, iclass 37, count 2 2006.230.01:51:29.14#ibcon#about to read 6, iclass 37, count 2 2006.230.01:51:29.14#ibcon#read 6, iclass 37, count 2 2006.230.01:51:29.14#ibcon#end of sib2, iclass 37, count 2 2006.230.01:51:29.14#ibcon#*mode == 0, iclass 37, count 2 2006.230.01:51:29.14#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.01:51:29.14#ibcon#[25=AT07-05\r\n] 2006.230.01:51:29.14#ibcon#*before write, iclass 37, count 2 2006.230.01:51:29.14#ibcon#enter sib2, iclass 37, count 2 2006.230.01:51:29.14#ibcon#flushed, iclass 37, count 2 2006.230.01:51:29.14#ibcon#about to write, iclass 37, count 2 2006.230.01:51:29.14#ibcon#wrote, iclass 37, count 2 2006.230.01:51:29.14#ibcon#about to read 3, iclass 37, count 2 2006.230.01:51:29.17#ibcon#read 3, iclass 37, count 2 2006.230.01:51:29.17#ibcon#about to read 4, iclass 37, count 2 2006.230.01:51:29.17#ibcon#read 4, iclass 37, count 2 2006.230.01:51:29.17#ibcon#about to read 5, iclass 37, count 2 2006.230.01:51:29.17#ibcon#read 5, iclass 37, count 2 2006.230.01:51:29.17#ibcon#about to read 6, iclass 37, count 2 2006.230.01:51:29.17#ibcon#read 6, iclass 37, count 2 2006.230.01:51:29.17#ibcon#end of sib2, iclass 37, count 2 2006.230.01:51:29.17#ibcon#*after write, iclass 37, count 2 2006.230.01:51:29.17#ibcon#*before return 0, iclass 37, count 2 2006.230.01:51:29.17#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:29.17#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:29.17#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.01:51:29.17#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:29.17#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:29.29#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:29.29#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:29.29#ibcon#enter wrdev, iclass 37, count 0 2006.230.01:51:29.29#ibcon#first serial, iclass 37, count 0 2006.230.01:51:29.29#ibcon#enter sib2, iclass 37, count 0 2006.230.01:51:29.29#ibcon#flushed, iclass 37, count 0 2006.230.01:51:29.29#ibcon#about to write, iclass 37, count 0 2006.230.01:51:29.29#ibcon#wrote, iclass 37, count 0 2006.230.01:51:29.29#ibcon#about to read 3, iclass 37, count 0 2006.230.01:51:29.31#ibcon#read 3, iclass 37, count 0 2006.230.01:51:29.31#ibcon#about to read 4, iclass 37, count 0 2006.230.01:51:29.31#ibcon#read 4, iclass 37, count 0 2006.230.01:51:29.31#ibcon#about to read 5, iclass 37, count 0 2006.230.01:51:29.31#ibcon#read 5, iclass 37, count 0 2006.230.01:51:29.31#ibcon#about to read 6, iclass 37, count 0 2006.230.01:51:29.31#ibcon#read 6, iclass 37, count 0 2006.230.01:51:29.31#ibcon#end of sib2, iclass 37, count 0 2006.230.01:51:29.31#ibcon#*mode == 0, iclass 37, count 0 2006.230.01:51:29.31#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.01:51:29.31#ibcon#[25=USB\r\n] 2006.230.01:51:29.31#ibcon#*before write, iclass 37, count 0 2006.230.01:51:29.31#ibcon#enter sib2, iclass 37, count 0 2006.230.01:51:29.31#ibcon#flushed, iclass 37, count 0 2006.230.01:51:29.31#ibcon#about to write, iclass 37, count 0 2006.230.01:51:29.31#ibcon#wrote, iclass 37, count 0 2006.230.01:51:29.31#ibcon#about to read 3, iclass 37, count 0 2006.230.01:51:29.34#ibcon#read 3, iclass 37, count 0 2006.230.01:51:29.34#ibcon#about to read 4, iclass 37, count 0 2006.230.01:51:29.34#ibcon#read 4, iclass 37, count 0 2006.230.01:51:29.34#ibcon#about to read 5, iclass 37, count 0 2006.230.01:51:29.34#ibcon#read 5, iclass 37, count 0 2006.230.01:51:29.34#ibcon#about to read 6, iclass 37, count 0 2006.230.01:51:29.34#ibcon#read 6, iclass 37, count 0 2006.230.01:51:29.34#ibcon#end of sib2, iclass 37, count 0 2006.230.01:51:29.34#ibcon#*after write, iclass 37, count 0 2006.230.01:51:29.34#ibcon#*before return 0, iclass 37, count 0 2006.230.01:51:29.34#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:29.34#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:29.34#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.01:51:29.34#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.01:51:29.34$vck44/valo=8,884.99 2006.230.01:51:29.34#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.01:51:29.34#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.01:51:29.34#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:29.34#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:29.34#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:29.34#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:29.34#ibcon#enter wrdev, iclass 39, count 0 2006.230.01:51:29.34#ibcon#first serial, iclass 39, count 0 2006.230.01:51:29.34#ibcon#enter sib2, iclass 39, count 0 2006.230.01:51:29.34#ibcon#flushed, iclass 39, count 0 2006.230.01:51:29.34#ibcon#about to write, iclass 39, count 0 2006.230.01:51:29.34#ibcon#wrote, iclass 39, count 0 2006.230.01:51:29.34#ibcon#about to read 3, iclass 39, count 0 2006.230.01:51:29.36#ibcon#read 3, iclass 39, count 0 2006.230.01:51:29.36#ibcon#about to read 4, iclass 39, count 0 2006.230.01:51:29.36#ibcon#read 4, iclass 39, count 0 2006.230.01:51:29.36#ibcon#about to read 5, iclass 39, count 0 2006.230.01:51:29.36#ibcon#read 5, iclass 39, count 0 2006.230.01:51:29.36#ibcon#about to read 6, iclass 39, count 0 2006.230.01:51:29.36#ibcon#read 6, iclass 39, count 0 2006.230.01:51:29.36#ibcon#end of sib2, iclass 39, count 0 2006.230.01:51:29.36#ibcon#*mode == 0, iclass 39, count 0 2006.230.01:51:29.36#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.01:51:29.36#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:51:29.36#ibcon#*before write, iclass 39, count 0 2006.230.01:51:29.36#ibcon#enter sib2, iclass 39, count 0 2006.230.01:51:29.36#ibcon#flushed, iclass 39, count 0 2006.230.01:51:29.36#ibcon#about to write, iclass 39, count 0 2006.230.01:51:29.36#ibcon#wrote, iclass 39, count 0 2006.230.01:51:29.36#ibcon#about to read 3, iclass 39, count 0 2006.230.01:51:29.40#ibcon#read 3, iclass 39, count 0 2006.230.01:51:29.40#ibcon#about to read 4, iclass 39, count 0 2006.230.01:51:29.40#ibcon#read 4, iclass 39, count 0 2006.230.01:51:29.40#ibcon#about to read 5, iclass 39, count 0 2006.230.01:51:29.40#ibcon#read 5, iclass 39, count 0 2006.230.01:51:29.40#ibcon#about to read 6, iclass 39, count 0 2006.230.01:51:29.40#ibcon#read 6, iclass 39, count 0 2006.230.01:51:29.40#ibcon#end of sib2, iclass 39, count 0 2006.230.01:51:29.40#ibcon#*after write, iclass 39, count 0 2006.230.01:51:29.40#ibcon#*before return 0, iclass 39, count 0 2006.230.01:51:29.40#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:29.40#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:29.40#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.01:51:29.40#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.01:51:29.40$vck44/va=8,6 2006.230.01:51:29.40#ibcon#iclass 3 nclrec 2 cls_cnt 3 2006.230.01:51:29.40#ibcon#iclass 3 iclrec 1 cls_cnt 3 2006.230.01:51:29.40#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:29.40#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:51:29.46#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:51:29.46#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:51:29.46#ibcon#enter wrdev, iclass 3, count 2 2006.230.01:51:29.46#ibcon#first serial, iclass 3, count 2 2006.230.01:51:29.46#ibcon#enter sib2, iclass 3, count 2 2006.230.01:51:29.46#ibcon#flushed, iclass 3, count 2 2006.230.01:51:29.46#ibcon#about to write, iclass 3, count 2 2006.230.01:51:29.46#ibcon#wrote, iclass 3, count 2 2006.230.01:51:29.46#ibcon#about to read 3, iclass 3, count 2 2006.230.01:51:29.48#ibcon#read 3, iclass 3, count 2 2006.230.01:51:29.48#ibcon#about to read 4, iclass 3, count 2 2006.230.01:51:29.48#ibcon#read 4, iclass 3, count 2 2006.230.01:51:29.48#ibcon#about to read 5, iclass 3, count 2 2006.230.01:51:29.48#ibcon#read 5, iclass 3, count 2 2006.230.01:51:29.48#ibcon#about to read 6, iclass 3, count 2 2006.230.01:51:29.48#ibcon#read 6, iclass 3, count 2 2006.230.01:51:29.48#ibcon#end of sib2, iclass 3, count 2 2006.230.01:51:29.48#ibcon#*mode == 0, iclass 3, count 2 2006.230.01:51:29.48#ibcon#*mode == 0 && serial, iclass 3, count 2 2006.230.01:51:29.48#ibcon#[25=AT08-06\r\n] 2006.230.01:51:29.48#ibcon#*before write, iclass 3, count 2 2006.230.01:51:29.48#ibcon#enter sib2, iclass 3, count 2 2006.230.01:51:29.48#ibcon#flushed, iclass 3, count 2 2006.230.01:51:29.48#ibcon#about to write, iclass 3, count 2 2006.230.01:51:29.48#ibcon#wrote, iclass 3, count 2 2006.230.01:51:29.48#ibcon#about to read 3, iclass 3, count 2 2006.230.01:51:29.51#ibcon#read 3, iclass 3, count 2 2006.230.01:51:29.51#ibcon#about to read 4, iclass 3, count 2 2006.230.01:51:29.51#ibcon#read 4, iclass 3, count 2 2006.230.01:51:29.51#ibcon#about to read 5, iclass 3, count 2 2006.230.01:51:29.51#ibcon#read 5, iclass 3, count 2 2006.230.01:51:29.51#ibcon#about to read 6, iclass 3, count 2 2006.230.01:51:29.51#ibcon#read 6, iclass 3, count 2 2006.230.01:51:29.51#ibcon#end of sib2, iclass 3, count 2 2006.230.01:51:29.51#ibcon#*after write, iclass 3, count 2 2006.230.01:51:29.51#ibcon#*before return 0, iclass 3, count 2 2006.230.01:51:29.51#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:51:29.51#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 2 2006.230.01:51:29.51#ibcon#iclass 3 iclrec 2 cls_cnt 2 2006.230.01:51:29.51#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:29.51#ibcon#before find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:51:29.63#ibcon#after find_delay mode 2, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:51:29.63#ibcon#before mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:51:29.63#ibcon#enter wrdev, iclass 3, count 0 2006.230.01:51:29.63#ibcon#first serial, iclass 3, count 0 2006.230.01:51:29.63#ibcon#enter sib2, iclass 3, count 0 2006.230.01:51:29.63#ibcon#flushed, iclass 3, count 0 2006.230.01:51:29.63#ibcon#about to write, iclass 3, count 0 2006.230.01:51:29.63#ibcon#wrote, iclass 3, count 0 2006.230.01:51:29.63#ibcon#about to read 3, iclass 3, count 0 2006.230.01:51:29.65#ibcon#read 3, iclass 3, count 0 2006.230.01:51:29.65#ibcon#about to read 4, iclass 3, count 0 2006.230.01:51:29.65#ibcon#read 4, iclass 3, count 0 2006.230.01:51:29.65#ibcon#about to read 5, iclass 3, count 0 2006.230.01:51:29.65#ibcon#read 5, iclass 3, count 0 2006.230.01:51:29.65#ibcon#about to read 6, iclass 3, count 0 2006.230.01:51:29.65#ibcon#read 6, iclass 3, count 0 2006.230.01:51:29.65#ibcon#end of sib2, iclass 3, count 0 2006.230.01:51:29.65#ibcon#*mode == 0, iclass 3, count 0 2006.230.01:51:29.65#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.01:51:29.65#ibcon#[25=USB\r\n] 2006.230.01:51:29.65#ibcon#*before write, iclass 3, count 0 2006.230.01:51:29.65#ibcon#enter sib2, iclass 3, count 0 2006.230.01:51:29.65#ibcon#flushed, iclass 3, count 0 2006.230.01:51:29.65#ibcon#about to write, iclass 3, count 0 2006.230.01:51:29.65#ibcon#wrote, iclass 3, count 0 2006.230.01:51:29.65#ibcon#about to read 3, iclass 3, count 0 2006.230.01:51:29.68#ibcon#read 3, iclass 3, count 0 2006.230.01:51:29.68#ibcon#about to read 4, iclass 3, count 0 2006.230.01:51:29.68#ibcon#read 4, iclass 3, count 0 2006.230.01:51:29.68#ibcon#about to read 5, iclass 3, count 0 2006.230.01:51:29.68#ibcon#read 5, iclass 3, count 0 2006.230.01:51:29.68#ibcon#about to read 6, iclass 3, count 0 2006.230.01:51:29.68#ibcon#read 6, iclass 3, count 0 2006.230.01:51:29.68#ibcon#end of sib2, iclass 3, count 0 2006.230.01:51:29.68#ibcon#*after write, iclass 3, count 0 2006.230.01:51:29.68#ibcon#*before return 0, iclass 3, count 0 2006.230.01:51:29.68#ibcon#after mode 2 write, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:51:29.68#ibcon#end of loop, iclass 3 iclrec 2 cls_cnt 0 2006.230.01:51:29.68#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.01:51:29.68#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.01:51:29.68$vck44/vblo=1,629.99 2006.230.01:51:29.68#ibcon#iclass 5 nclrec 1 cls_cnt 2 2006.230.01:51:29.68#ibcon#iclass 5 iclrec 1 cls_cnt 2 2006.230.01:51:29.68#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:29.68#ibcon#before find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:29.68#ibcon#after find_delay mode 2, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:29.68#ibcon#before mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:29.68#ibcon#enter wrdev, iclass 5, count 0 2006.230.01:51:29.68#ibcon#first serial, iclass 5, count 0 2006.230.01:51:29.68#ibcon#enter sib2, iclass 5, count 0 2006.230.01:51:29.68#ibcon#flushed, iclass 5, count 0 2006.230.01:51:29.68#ibcon#about to write, iclass 5, count 0 2006.230.01:51:29.68#ibcon#wrote, iclass 5, count 0 2006.230.01:51:29.68#ibcon#about to read 3, iclass 5, count 0 2006.230.01:51:29.70#ibcon#read 3, iclass 5, count 0 2006.230.01:51:29.70#ibcon#about to read 4, iclass 5, count 0 2006.230.01:51:29.70#ibcon#read 4, iclass 5, count 0 2006.230.01:51:29.70#ibcon#about to read 5, iclass 5, count 0 2006.230.01:51:29.70#ibcon#read 5, iclass 5, count 0 2006.230.01:51:29.70#ibcon#about to read 6, iclass 5, count 0 2006.230.01:51:29.70#ibcon#read 6, iclass 5, count 0 2006.230.01:51:29.70#ibcon#end of sib2, iclass 5, count 0 2006.230.01:51:29.70#ibcon#*mode == 0, iclass 5, count 0 2006.230.01:51:29.70#ibcon#*mode == 0 && serial, iclass 5, count 0 2006.230.01:51:29.70#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:51:29.70#ibcon#*before write, iclass 5, count 0 2006.230.01:51:29.70#ibcon#enter sib2, iclass 5, count 0 2006.230.01:51:29.70#ibcon#flushed, iclass 5, count 0 2006.230.01:51:29.70#ibcon#about to write, iclass 5, count 0 2006.230.01:51:29.70#ibcon#wrote, iclass 5, count 0 2006.230.01:51:29.70#ibcon#about to read 3, iclass 5, count 0 2006.230.01:51:29.74#ibcon#read 3, iclass 5, count 0 2006.230.01:51:29.74#ibcon#about to read 4, iclass 5, count 0 2006.230.01:51:29.74#ibcon#read 4, iclass 5, count 0 2006.230.01:51:29.74#ibcon#about to read 5, iclass 5, count 0 2006.230.01:51:29.74#ibcon#read 5, iclass 5, count 0 2006.230.01:51:29.74#ibcon#about to read 6, iclass 5, count 0 2006.230.01:51:29.74#ibcon#read 6, iclass 5, count 0 2006.230.01:51:29.74#ibcon#end of sib2, iclass 5, count 0 2006.230.01:51:29.74#ibcon#*after write, iclass 5, count 0 2006.230.01:51:29.74#ibcon#*before return 0, iclass 5, count 0 2006.230.01:51:29.74#ibcon#after mode 2 write, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:29.74#ibcon#end of loop, iclass 5 iclrec 1 cls_cnt 0 2006.230.01:51:29.74#ibcon#about to clear, iclass 5 cls_cnt 0 2006.230.01:51:29.74#ibcon#cleared, iclass 5 cls_cnt 0 2006.230.01:51:29.74$vck44/vb=1,4 2006.230.01:51:29.74#ibcon#iclass 7 nclrec 2 cls_cnt 3 2006.230.01:51:29.74#ibcon#iclass 7 iclrec 1 cls_cnt 3 2006.230.01:51:29.74#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:29.74#ibcon#before find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:29.74#ibcon#after find_delay mode 2, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:29.74#ibcon#before mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:29.74#ibcon#enter wrdev, iclass 7, count 2 2006.230.01:51:29.74#ibcon#first serial, iclass 7, count 2 2006.230.01:51:29.74#ibcon#enter sib2, iclass 7, count 2 2006.230.01:51:29.74#ibcon#flushed, iclass 7, count 2 2006.230.01:51:29.74#ibcon#about to write, iclass 7, count 2 2006.230.01:51:29.74#ibcon#wrote, iclass 7, count 2 2006.230.01:51:29.74#ibcon#about to read 3, iclass 7, count 2 2006.230.01:51:29.76#ibcon#read 3, iclass 7, count 2 2006.230.01:51:29.76#ibcon#about to read 4, iclass 7, count 2 2006.230.01:51:29.76#ibcon#read 4, iclass 7, count 2 2006.230.01:51:29.76#ibcon#about to read 5, iclass 7, count 2 2006.230.01:51:29.76#ibcon#read 5, iclass 7, count 2 2006.230.01:51:29.76#ibcon#about to read 6, iclass 7, count 2 2006.230.01:51:29.76#ibcon#read 6, iclass 7, count 2 2006.230.01:51:29.76#ibcon#end of sib2, iclass 7, count 2 2006.230.01:51:29.76#ibcon#*mode == 0, iclass 7, count 2 2006.230.01:51:29.76#ibcon#*mode == 0 && serial, iclass 7, count 2 2006.230.01:51:29.76#ibcon#[27=AT01-04\r\n] 2006.230.01:51:29.76#ibcon#*before write, iclass 7, count 2 2006.230.01:51:29.76#ibcon#enter sib2, iclass 7, count 2 2006.230.01:51:29.76#ibcon#flushed, iclass 7, count 2 2006.230.01:51:29.76#ibcon#about to write, iclass 7, count 2 2006.230.01:51:29.76#ibcon#wrote, iclass 7, count 2 2006.230.01:51:29.76#ibcon#about to read 3, iclass 7, count 2 2006.230.01:51:29.79#ibcon#read 3, iclass 7, count 2 2006.230.01:51:29.79#ibcon#about to read 4, iclass 7, count 2 2006.230.01:51:29.79#ibcon#read 4, iclass 7, count 2 2006.230.01:51:29.79#ibcon#about to read 5, iclass 7, count 2 2006.230.01:51:29.79#ibcon#read 5, iclass 7, count 2 2006.230.01:51:29.79#ibcon#about to read 6, iclass 7, count 2 2006.230.01:51:29.79#ibcon#read 6, iclass 7, count 2 2006.230.01:51:29.79#ibcon#end of sib2, iclass 7, count 2 2006.230.01:51:29.79#ibcon#*after write, iclass 7, count 2 2006.230.01:51:29.79#ibcon#*before return 0, iclass 7, count 2 2006.230.01:51:29.79#ibcon#after mode 2 write, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:29.79#ibcon#end of loop, iclass 7 iclrec 1 cls_cnt 2 2006.230.01:51:29.79#ibcon#iclass 7 iclrec 2 cls_cnt 2 2006.230.01:51:29.79#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:29.79#ibcon#before find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:29.91#ibcon#after find_delay mode 2, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:29.91#ibcon#before mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:29.91#ibcon#enter wrdev, iclass 7, count 0 2006.230.01:51:29.91#ibcon#first serial, iclass 7, count 0 2006.230.01:51:29.91#ibcon#enter sib2, iclass 7, count 0 2006.230.01:51:29.91#ibcon#flushed, iclass 7, count 0 2006.230.01:51:29.91#ibcon#about to write, iclass 7, count 0 2006.230.01:51:29.91#ibcon#wrote, iclass 7, count 0 2006.230.01:51:29.91#ibcon#about to read 3, iclass 7, count 0 2006.230.01:51:29.93#ibcon#read 3, iclass 7, count 0 2006.230.01:51:29.93#ibcon#about to read 4, iclass 7, count 0 2006.230.01:51:29.93#ibcon#read 4, iclass 7, count 0 2006.230.01:51:29.93#ibcon#about to read 5, iclass 7, count 0 2006.230.01:51:29.93#ibcon#read 5, iclass 7, count 0 2006.230.01:51:29.93#ibcon#about to read 6, iclass 7, count 0 2006.230.01:51:29.93#ibcon#read 6, iclass 7, count 0 2006.230.01:51:29.93#ibcon#end of sib2, iclass 7, count 0 2006.230.01:51:29.93#ibcon#*mode == 0, iclass 7, count 0 2006.230.01:51:29.93#ibcon#*mode == 0 && serial, iclass 7, count 0 2006.230.01:51:29.93#ibcon#[27=USB\r\n] 2006.230.01:51:29.93#ibcon#*before write, iclass 7, count 0 2006.230.01:51:29.93#ibcon#enter sib2, iclass 7, count 0 2006.230.01:51:29.93#ibcon#flushed, iclass 7, count 0 2006.230.01:51:29.93#ibcon#about to write, iclass 7, count 0 2006.230.01:51:29.93#ibcon#wrote, iclass 7, count 0 2006.230.01:51:29.93#ibcon#about to read 3, iclass 7, count 0 2006.230.01:51:29.96#ibcon#read 3, iclass 7, count 0 2006.230.01:51:29.96#ibcon#about to read 4, iclass 7, count 0 2006.230.01:51:29.96#ibcon#read 4, iclass 7, count 0 2006.230.01:51:29.96#ibcon#about to read 5, iclass 7, count 0 2006.230.01:51:29.96#ibcon#read 5, iclass 7, count 0 2006.230.01:51:29.96#ibcon#about to read 6, iclass 7, count 0 2006.230.01:51:29.96#ibcon#read 6, iclass 7, count 0 2006.230.01:51:29.96#ibcon#end of sib2, iclass 7, count 0 2006.230.01:51:29.96#ibcon#*after write, iclass 7, count 0 2006.230.01:51:29.96#ibcon#*before return 0, iclass 7, count 0 2006.230.01:51:29.96#ibcon#after mode 2 write, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:29.96#ibcon#end of loop, iclass 7 iclrec 2 cls_cnt 0 2006.230.01:51:29.96#ibcon#about to clear, iclass 7 cls_cnt 0 2006.230.01:51:29.96#ibcon#cleared, iclass 7 cls_cnt 0 2006.230.01:51:29.96$vck44/vblo=2,634.99 2006.230.01:51:29.96#ibcon#iclass 11 nclrec 1 cls_cnt 2 2006.230.01:51:29.96#ibcon#iclass 11 iclrec 1 cls_cnt 2 2006.230.01:51:29.96#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:29.96#ibcon#before find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:51:29.96#ibcon#after find_delay mode 2, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:51:29.96#ibcon#before mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:51:29.96#ibcon#enter wrdev, iclass 11, count 0 2006.230.01:51:29.96#ibcon#first serial, iclass 11, count 0 2006.230.01:51:29.96#ibcon#enter sib2, iclass 11, count 0 2006.230.01:51:29.96#ibcon#flushed, iclass 11, count 0 2006.230.01:51:29.96#ibcon#about to write, iclass 11, count 0 2006.230.01:51:29.96#ibcon#wrote, iclass 11, count 0 2006.230.01:51:29.96#ibcon#about to read 3, iclass 11, count 0 2006.230.01:51:29.98#ibcon#read 3, iclass 11, count 0 2006.230.01:51:29.98#ibcon#about to read 4, iclass 11, count 0 2006.230.01:51:29.98#ibcon#read 4, iclass 11, count 0 2006.230.01:51:29.98#ibcon#about to read 5, iclass 11, count 0 2006.230.01:51:29.98#ibcon#read 5, iclass 11, count 0 2006.230.01:51:29.98#ibcon#about to read 6, iclass 11, count 0 2006.230.01:51:29.98#ibcon#read 6, iclass 11, count 0 2006.230.01:51:29.98#ibcon#end of sib2, iclass 11, count 0 2006.230.01:51:29.98#ibcon#*mode == 0, iclass 11, count 0 2006.230.01:51:29.98#ibcon#*mode == 0 && serial, iclass 11, count 0 2006.230.01:51:29.98#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:51:29.98#ibcon#*before write, iclass 11, count 0 2006.230.01:51:29.98#ibcon#enter sib2, iclass 11, count 0 2006.230.01:51:29.98#ibcon#flushed, iclass 11, count 0 2006.230.01:51:29.98#ibcon#about to write, iclass 11, count 0 2006.230.01:51:29.98#ibcon#wrote, iclass 11, count 0 2006.230.01:51:29.98#ibcon#about to read 3, iclass 11, count 0 2006.230.01:51:30.02#ibcon#read 3, iclass 11, count 0 2006.230.01:51:30.02#ibcon#about to read 4, iclass 11, count 0 2006.230.01:51:30.02#ibcon#read 4, iclass 11, count 0 2006.230.01:51:30.02#ibcon#about to read 5, iclass 11, count 0 2006.230.01:51:30.02#ibcon#read 5, iclass 11, count 0 2006.230.01:51:30.02#ibcon#about to read 6, iclass 11, count 0 2006.230.01:51:30.02#ibcon#read 6, iclass 11, count 0 2006.230.01:51:30.02#ibcon#end of sib2, iclass 11, count 0 2006.230.01:51:30.02#ibcon#*after write, iclass 11, count 0 2006.230.01:51:30.02#ibcon#*before return 0, iclass 11, count 0 2006.230.01:51:30.02#ibcon#after mode 2 write, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:51:30.02#ibcon#end of loop, iclass 11 iclrec 1 cls_cnt 0 2006.230.01:51:30.02#ibcon#about to clear, iclass 11 cls_cnt 0 2006.230.01:51:30.02#ibcon#cleared, iclass 11 cls_cnt 0 2006.230.01:51:30.02$vck44/vb=2,4 2006.230.01:51:30.02#ibcon#iclass 13 nclrec 2 cls_cnt 3 2006.230.01:51:30.02#ibcon#iclass 13 iclrec 1 cls_cnt 3 2006.230.01:51:30.02#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:30.02#ibcon#before find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:51:30.08#ibcon#after find_delay mode 2, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:51:30.08#ibcon#before mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:51:30.08#ibcon#enter wrdev, iclass 13, count 2 2006.230.01:51:30.08#ibcon#first serial, iclass 13, count 2 2006.230.01:51:30.08#ibcon#enter sib2, iclass 13, count 2 2006.230.01:51:30.08#ibcon#flushed, iclass 13, count 2 2006.230.01:51:30.08#ibcon#about to write, iclass 13, count 2 2006.230.01:51:30.08#ibcon#wrote, iclass 13, count 2 2006.230.01:51:30.08#ibcon#about to read 3, iclass 13, count 2 2006.230.01:51:30.10#ibcon#read 3, iclass 13, count 2 2006.230.01:51:30.10#ibcon#about to read 4, iclass 13, count 2 2006.230.01:51:30.10#ibcon#read 4, iclass 13, count 2 2006.230.01:51:30.10#ibcon#about to read 5, iclass 13, count 2 2006.230.01:51:30.10#ibcon#read 5, iclass 13, count 2 2006.230.01:51:30.10#ibcon#about to read 6, iclass 13, count 2 2006.230.01:51:30.10#ibcon#read 6, iclass 13, count 2 2006.230.01:51:30.10#ibcon#end of sib2, iclass 13, count 2 2006.230.01:51:30.10#ibcon#*mode == 0, iclass 13, count 2 2006.230.01:51:30.10#ibcon#*mode == 0 && serial, iclass 13, count 2 2006.230.01:51:30.10#ibcon#[27=AT02-04\r\n] 2006.230.01:51:30.10#ibcon#*before write, iclass 13, count 2 2006.230.01:51:30.10#ibcon#enter sib2, iclass 13, count 2 2006.230.01:51:30.10#ibcon#flushed, iclass 13, count 2 2006.230.01:51:30.10#ibcon#about to write, iclass 13, count 2 2006.230.01:51:30.10#ibcon#wrote, iclass 13, count 2 2006.230.01:51:30.10#ibcon#about to read 3, iclass 13, count 2 2006.230.01:51:30.13#ibcon#read 3, iclass 13, count 2 2006.230.01:51:30.13#ibcon#about to read 4, iclass 13, count 2 2006.230.01:51:30.13#ibcon#read 4, iclass 13, count 2 2006.230.01:51:30.13#ibcon#about to read 5, iclass 13, count 2 2006.230.01:51:30.13#ibcon#read 5, iclass 13, count 2 2006.230.01:51:30.13#ibcon#about to read 6, iclass 13, count 2 2006.230.01:51:30.13#ibcon#read 6, iclass 13, count 2 2006.230.01:51:30.13#ibcon#end of sib2, iclass 13, count 2 2006.230.01:51:30.13#ibcon#*after write, iclass 13, count 2 2006.230.01:51:30.13#ibcon#*before return 0, iclass 13, count 2 2006.230.01:51:30.13#ibcon#after mode 2 write, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:51:30.13#ibcon#end of loop, iclass 13 iclrec 1 cls_cnt 2 2006.230.01:51:30.13#ibcon#iclass 13 iclrec 2 cls_cnt 2 2006.230.01:51:30.13#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:30.13#ibcon#before find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:51:30.25#ibcon#after find_delay mode 2, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:51:30.25#ibcon#before mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:51:30.25#ibcon#enter wrdev, iclass 13, count 0 2006.230.01:51:30.25#ibcon#first serial, iclass 13, count 0 2006.230.01:51:30.25#ibcon#enter sib2, iclass 13, count 0 2006.230.01:51:30.25#ibcon#flushed, iclass 13, count 0 2006.230.01:51:30.25#ibcon#about to write, iclass 13, count 0 2006.230.01:51:30.25#ibcon#wrote, iclass 13, count 0 2006.230.01:51:30.25#ibcon#about to read 3, iclass 13, count 0 2006.230.01:51:30.27#ibcon#read 3, iclass 13, count 0 2006.230.01:51:30.27#ibcon#about to read 4, iclass 13, count 0 2006.230.01:51:30.27#ibcon#read 4, iclass 13, count 0 2006.230.01:51:30.27#ibcon#about to read 5, iclass 13, count 0 2006.230.01:51:30.27#ibcon#read 5, iclass 13, count 0 2006.230.01:51:30.27#ibcon#about to read 6, iclass 13, count 0 2006.230.01:51:30.27#ibcon#read 6, iclass 13, count 0 2006.230.01:51:30.27#ibcon#end of sib2, iclass 13, count 0 2006.230.01:51:30.27#ibcon#*mode == 0, iclass 13, count 0 2006.230.01:51:30.27#ibcon#*mode == 0 && serial, iclass 13, count 0 2006.230.01:51:30.27#ibcon#[27=USB\r\n] 2006.230.01:51:30.27#ibcon#*before write, iclass 13, count 0 2006.230.01:51:30.27#ibcon#enter sib2, iclass 13, count 0 2006.230.01:51:30.27#ibcon#flushed, iclass 13, count 0 2006.230.01:51:30.27#ibcon#about to write, iclass 13, count 0 2006.230.01:51:30.27#ibcon#wrote, iclass 13, count 0 2006.230.01:51:30.27#ibcon#about to read 3, iclass 13, count 0 2006.230.01:51:30.30#ibcon#read 3, iclass 13, count 0 2006.230.01:51:30.30#ibcon#about to read 4, iclass 13, count 0 2006.230.01:51:30.30#ibcon#read 4, iclass 13, count 0 2006.230.01:51:30.30#ibcon#about to read 5, iclass 13, count 0 2006.230.01:51:30.30#ibcon#read 5, iclass 13, count 0 2006.230.01:51:30.30#ibcon#about to read 6, iclass 13, count 0 2006.230.01:51:30.30#ibcon#read 6, iclass 13, count 0 2006.230.01:51:30.30#ibcon#end of sib2, iclass 13, count 0 2006.230.01:51:30.30#ibcon#*after write, iclass 13, count 0 2006.230.01:51:30.30#ibcon#*before return 0, iclass 13, count 0 2006.230.01:51:30.30#ibcon#after mode 2 write, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:51:30.30#ibcon#end of loop, iclass 13 iclrec 2 cls_cnt 0 2006.230.01:51:30.30#ibcon#about to clear, iclass 13 cls_cnt 0 2006.230.01:51:30.30#ibcon#cleared, iclass 13 cls_cnt 0 2006.230.01:51:30.30$vck44/vblo=3,649.99 2006.230.01:51:30.30#ibcon#iclass 15 nclrec 1 cls_cnt 2 2006.230.01:51:30.30#ibcon#iclass 15 iclrec 1 cls_cnt 2 2006.230.01:51:30.30#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:30.30#ibcon#before find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:51:30.30#ibcon#after find_delay mode 2, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:51:30.30#ibcon#before mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:51:30.30#ibcon#enter wrdev, iclass 15, count 0 2006.230.01:51:30.30#ibcon#first serial, iclass 15, count 0 2006.230.01:51:30.30#ibcon#enter sib2, iclass 15, count 0 2006.230.01:51:30.30#ibcon#flushed, iclass 15, count 0 2006.230.01:51:30.30#ibcon#about to write, iclass 15, count 0 2006.230.01:51:30.30#ibcon#wrote, iclass 15, count 0 2006.230.01:51:30.30#ibcon#about to read 3, iclass 15, count 0 2006.230.01:51:30.32#ibcon#read 3, iclass 15, count 0 2006.230.01:51:30.32#ibcon#about to read 4, iclass 15, count 0 2006.230.01:51:30.32#ibcon#read 4, iclass 15, count 0 2006.230.01:51:30.32#ibcon#about to read 5, iclass 15, count 0 2006.230.01:51:30.32#ibcon#read 5, iclass 15, count 0 2006.230.01:51:30.32#ibcon#about to read 6, iclass 15, count 0 2006.230.01:51:30.32#ibcon#read 6, iclass 15, count 0 2006.230.01:51:30.32#ibcon#end of sib2, iclass 15, count 0 2006.230.01:51:30.32#ibcon#*mode == 0, iclass 15, count 0 2006.230.01:51:30.32#ibcon#*mode == 0 && serial, iclass 15, count 0 2006.230.01:51:30.32#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:51:30.32#ibcon#*before write, iclass 15, count 0 2006.230.01:51:30.32#ibcon#enter sib2, iclass 15, count 0 2006.230.01:51:30.32#ibcon#flushed, iclass 15, count 0 2006.230.01:51:30.32#ibcon#about to write, iclass 15, count 0 2006.230.01:51:30.32#ibcon#wrote, iclass 15, count 0 2006.230.01:51:30.32#ibcon#about to read 3, iclass 15, count 0 2006.230.01:51:30.36#ibcon#read 3, iclass 15, count 0 2006.230.01:51:30.36#ibcon#about to read 4, iclass 15, count 0 2006.230.01:51:30.36#ibcon#read 4, iclass 15, count 0 2006.230.01:51:30.36#ibcon#about to read 5, iclass 15, count 0 2006.230.01:51:30.36#ibcon#read 5, iclass 15, count 0 2006.230.01:51:30.36#ibcon#about to read 6, iclass 15, count 0 2006.230.01:51:30.36#ibcon#read 6, iclass 15, count 0 2006.230.01:51:30.36#ibcon#end of sib2, iclass 15, count 0 2006.230.01:51:30.36#ibcon#*after write, iclass 15, count 0 2006.230.01:51:30.36#ibcon#*before return 0, iclass 15, count 0 2006.230.01:51:30.36#ibcon#after mode 2 write, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:51:30.36#ibcon#end of loop, iclass 15 iclrec 1 cls_cnt 0 2006.230.01:51:30.36#ibcon#about to clear, iclass 15 cls_cnt 0 2006.230.01:51:30.36#ibcon#cleared, iclass 15 cls_cnt 0 2006.230.01:51:30.36$vck44/vb=3,4 2006.230.01:51:30.36#ibcon#iclass 17 nclrec 2 cls_cnt 3 2006.230.01:51:30.36#ibcon#iclass 17 iclrec 1 cls_cnt 3 2006.230.01:51:30.36#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:30.36#ibcon#before find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:51:30.42#ibcon#after find_delay mode 2, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:51:30.42#ibcon#before mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:51:30.42#ibcon#enter wrdev, iclass 17, count 2 2006.230.01:51:30.42#ibcon#first serial, iclass 17, count 2 2006.230.01:51:30.42#ibcon#enter sib2, iclass 17, count 2 2006.230.01:51:30.42#ibcon#flushed, iclass 17, count 2 2006.230.01:51:30.42#ibcon#about to write, iclass 17, count 2 2006.230.01:51:30.42#ibcon#wrote, iclass 17, count 2 2006.230.01:51:30.42#ibcon#about to read 3, iclass 17, count 2 2006.230.01:51:30.44#ibcon#read 3, iclass 17, count 2 2006.230.01:51:30.44#ibcon#about to read 4, iclass 17, count 2 2006.230.01:51:30.44#ibcon#read 4, iclass 17, count 2 2006.230.01:51:30.44#ibcon#about to read 5, iclass 17, count 2 2006.230.01:51:30.44#ibcon#read 5, iclass 17, count 2 2006.230.01:51:30.44#ibcon#about to read 6, iclass 17, count 2 2006.230.01:51:30.44#ibcon#read 6, iclass 17, count 2 2006.230.01:51:30.44#ibcon#end of sib2, iclass 17, count 2 2006.230.01:51:30.44#ibcon#*mode == 0, iclass 17, count 2 2006.230.01:51:30.44#ibcon#*mode == 0 && serial, iclass 17, count 2 2006.230.01:51:30.44#ibcon#[27=AT03-04\r\n] 2006.230.01:51:30.44#ibcon#*before write, iclass 17, count 2 2006.230.01:51:30.44#ibcon#enter sib2, iclass 17, count 2 2006.230.01:51:30.44#ibcon#flushed, iclass 17, count 2 2006.230.01:51:30.44#ibcon#about to write, iclass 17, count 2 2006.230.01:51:30.44#ibcon#wrote, iclass 17, count 2 2006.230.01:51:30.44#ibcon#about to read 3, iclass 17, count 2 2006.230.01:51:30.47#ibcon#read 3, iclass 17, count 2 2006.230.01:51:30.47#ibcon#about to read 4, iclass 17, count 2 2006.230.01:51:30.47#ibcon#read 4, iclass 17, count 2 2006.230.01:51:30.47#ibcon#about to read 5, iclass 17, count 2 2006.230.01:51:30.47#ibcon#read 5, iclass 17, count 2 2006.230.01:51:30.47#ibcon#about to read 6, iclass 17, count 2 2006.230.01:51:30.47#ibcon#read 6, iclass 17, count 2 2006.230.01:51:30.47#ibcon#end of sib2, iclass 17, count 2 2006.230.01:51:30.47#ibcon#*after write, iclass 17, count 2 2006.230.01:51:30.47#ibcon#*before return 0, iclass 17, count 2 2006.230.01:51:30.47#ibcon#after mode 2 write, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:51:30.47#ibcon#end of loop, iclass 17 iclrec 1 cls_cnt 2 2006.230.01:51:30.47#ibcon#iclass 17 iclrec 2 cls_cnt 2 2006.230.01:51:30.47#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:30.47#ibcon#before find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:51:30.59#ibcon#after find_delay mode 2, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:51:30.59#ibcon#before mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:51:30.59#ibcon#enter wrdev, iclass 17, count 0 2006.230.01:51:30.59#ibcon#first serial, iclass 17, count 0 2006.230.01:51:30.59#ibcon#enter sib2, iclass 17, count 0 2006.230.01:51:30.59#ibcon#flushed, iclass 17, count 0 2006.230.01:51:30.59#ibcon#about to write, iclass 17, count 0 2006.230.01:51:30.59#ibcon#wrote, iclass 17, count 0 2006.230.01:51:30.59#ibcon#about to read 3, iclass 17, count 0 2006.230.01:51:30.61#ibcon#read 3, iclass 17, count 0 2006.230.01:51:30.61#ibcon#about to read 4, iclass 17, count 0 2006.230.01:51:30.61#ibcon#read 4, iclass 17, count 0 2006.230.01:51:30.61#ibcon#about to read 5, iclass 17, count 0 2006.230.01:51:30.61#ibcon#read 5, iclass 17, count 0 2006.230.01:51:30.61#ibcon#about to read 6, iclass 17, count 0 2006.230.01:51:30.61#ibcon#read 6, iclass 17, count 0 2006.230.01:51:30.61#ibcon#end of sib2, iclass 17, count 0 2006.230.01:51:30.61#ibcon#*mode == 0, iclass 17, count 0 2006.230.01:51:30.61#ibcon#*mode == 0 && serial, iclass 17, count 0 2006.230.01:51:30.61#ibcon#[27=USB\r\n] 2006.230.01:51:30.61#ibcon#*before write, iclass 17, count 0 2006.230.01:51:30.61#ibcon#enter sib2, iclass 17, count 0 2006.230.01:51:30.61#ibcon#flushed, iclass 17, count 0 2006.230.01:51:30.61#ibcon#about to write, iclass 17, count 0 2006.230.01:51:30.61#ibcon#wrote, iclass 17, count 0 2006.230.01:51:30.61#ibcon#about to read 3, iclass 17, count 0 2006.230.01:51:30.64#ibcon#read 3, iclass 17, count 0 2006.230.01:51:30.64#ibcon#about to read 4, iclass 17, count 0 2006.230.01:51:30.64#ibcon#read 4, iclass 17, count 0 2006.230.01:51:30.64#ibcon#about to read 5, iclass 17, count 0 2006.230.01:51:30.64#ibcon#read 5, iclass 17, count 0 2006.230.01:51:30.64#ibcon#about to read 6, iclass 17, count 0 2006.230.01:51:30.64#ibcon#read 6, iclass 17, count 0 2006.230.01:51:30.64#ibcon#end of sib2, iclass 17, count 0 2006.230.01:51:30.64#ibcon#*after write, iclass 17, count 0 2006.230.01:51:30.64#ibcon#*before return 0, iclass 17, count 0 2006.230.01:51:30.64#ibcon#after mode 2 write, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:51:30.64#ibcon#end of loop, iclass 17 iclrec 2 cls_cnt 0 2006.230.01:51:30.64#ibcon#about to clear, iclass 17 cls_cnt 0 2006.230.01:51:30.64#ibcon#cleared, iclass 17 cls_cnt 0 2006.230.01:51:30.64$vck44/vblo=4,679.99 2006.230.01:51:30.64#ibcon#iclass 19 nclrec 1 cls_cnt 2 2006.230.01:51:30.64#ibcon#iclass 19 iclrec 1 cls_cnt 2 2006.230.01:51:30.64#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:30.64#ibcon#before find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:30.64#ibcon#after find_delay mode 2, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:30.64#ibcon#before mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:30.64#ibcon#enter wrdev, iclass 19, count 0 2006.230.01:51:30.64#ibcon#first serial, iclass 19, count 0 2006.230.01:51:30.64#ibcon#enter sib2, iclass 19, count 0 2006.230.01:51:30.64#ibcon#flushed, iclass 19, count 0 2006.230.01:51:30.64#ibcon#about to write, iclass 19, count 0 2006.230.01:51:30.64#ibcon#wrote, iclass 19, count 0 2006.230.01:51:30.64#ibcon#about to read 3, iclass 19, count 0 2006.230.01:51:30.66#ibcon#read 3, iclass 19, count 0 2006.230.01:51:30.66#ibcon#about to read 4, iclass 19, count 0 2006.230.01:51:30.66#ibcon#read 4, iclass 19, count 0 2006.230.01:51:30.66#ibcon#about to read 5, iclass 19, count 0 2006.230.01:51:30.66#ibcon#read 5, iclass 19, count 0 2006.230.01:51:30.66#ibcon#about to read 6, iclass 19, count 0 2006.230.01:51:30.66#ibcon#read 6, iclass 19, count 0 2006.230.01:51:30.66#ibcon#end of sib2, iclass 19, count 0 2006.230.01:51:30.66#ibcon#*mode == 0, iclass 19, count 0 2006.230.01:51:30.66#ibcon#*mode == 0 && serial, iclass 19, count 0 2006.230.01:51:30.66#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:51:30.66#ibcon#*before write, iclass 19, count 0 2006.230.01:51:30.66#ibcon#enter sib2, iclass 19, count 0 2006.230.01:51:30.66#ibcon#flushed, iclass 19, count 0 2006.230.01:51:30.66#ibcon#about to write, iclass 19, count 0 2006.230.01:51:30.66#ibcon#wrote, iclass 19, count 0 2006.230.01:51:30.66#ibcon#about to read 3, iclass 19, count 0 2006.230.01:51:30.70#ibcon#read 3, iclass 19, count 0 2006.230.01:51:30.70#ibcon#about to read 4, iclass 19, count 0 2006.230.01:51:30.70#ibcon#read 4, iclass 19, count 0 2006.230.01:51:30.70#ibcon#about to read 5, iclass 19, count 0 2006.230.01:51:30.70#ibcon#read 5, iclass 19, count 0 2006.230.01:51:30.70#ibcon#about to read 6, iclass 19, count 0 2006.230.01:51:30.70#ibcon#read 6, iclass 19, count 0 2006.230.01:51:30.70#ibcon#end of sib2, iclass 19, count 0 2006.230.01:51:30.70#ibcon#*after write, iclass 19, count 0 2006.230.01:51:30.70#ibcon#*before return 0, iclass 19, count 0 2006.230.01:51:30.70#ibcon#after mode 2 write, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:30.70#ibcon#end of loop, iclass 19 iclrec 1 cls_cnt 0 2006.230.01:51:30.70#ibcon#about to clear, iclass 19 cls_cnt 0 2006.230.01:51:30.70#ibcon#cleared, iclass 19 cls_cnt 0 2006.230.01:51:30.70$vck44/vb=4,4 2006.230.01:51:30.70#ibcon#iclass 21 nclrec 2 cls_cnt 3 2006.230.01:51:30.70#ibcon#iclass 21 iclrec 1 cls_cnt 3 2006.230.01:51:30.70#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:30.70#ibcon#before find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:30.76#ibcon#after find_delay mode 2, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:30.76#ibcon#before mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:30.76#ibcon#enter wrdev, iclass 21, count 2 2006.230.01:51:30.76#ibcon#first serial, iclass 21, count 2 2006.230.01:51:30.76#ibcon#enter sib2, iclass 21, count 2 2006.230.01:51:30.76#ibcon#flushed, iclass 21, count 2 2006.230.01:51:30.76#ibcon#about to write, iclass 21, count 2 2006.230.01:51:30.76#ibcon#wrote, iclass 21, count 2 2006.230.01:51:30.76#ibcon#about to read 3, iclass 21, count 2 2006.230.01:51:30.78#ibcon#read 3, iclass 21, count 2 2006.230.01:51:30.78#ibcon#about to read 4, iclass 21, count 2 2006.230.01:51:30.78#ibcon#read 4, iclass 21, count 2 2006.230.01:51:30.78#ibcon#about to read 5, iclass 21, count 2 2006.230.01:51:30.78#ibcon#read 5, iclass 21, count 2 2006.230.01:51:30.78#ibcon#about to read 6, iclass 21, count 2 2006.230.01:51:30.78#ibcon#read 6, iclass 21, count 2 2006.230.01:51:30.78#ibcon#end of sib2, iclass 21, count 2 2006.230.01:51:30.78#ibcon#*mode == 0, iclass 21, count 2 2006.230.01:51:30.78#ibcon#*mode == 0 && serial, iclass 21, count 2 2006.230.01:51:30.78#ibcon#[27=AT04-04\r\n] 2006.230.01:51:30.78#ibcon#*before write, iclass 21, count 2 2006.230.01:51:30.78#ibcon#enter sib2, iclass 21, count 2 2006.230.01:51:30.78#ibcon#flushed, iclass 21, count 2 2006.230.01:51:30.78#ibcon#about to write, iclass 21, count 2 2006.230.01:51:30.78#ibcon#wrote, iclass 21, count 2 2006.230.01:51:30.78#ibcon#about to read 3, iclass 21, count 2 2006.230.01:51:30.81#ibcon#read 3, iclass 21, count 2 2006.230.01:51:30.81#ibcon#about to read 4, iclass 21, count 2 2006.230.01:51:30.81#ibcon#read 4, iclass 21, count 2 2006.230.01:51:30.81#ibcon#about to read 5, iclass 21, count 2 2006.230.01:51:30.81#ibcon#read 5, iclass 21, count 2 2006.230.01:51:30.81#ibcon#about to read 6, iclass 21, count 2 2006.230.01:51:30.81#ibcon#read 6, iclass 21, count 2 2006.230.01:51:30.81#ibcon#end of sib2, iclass 21, count 2 2006.230.01:51:30.81#ibcon#*after write, iclass 21, count 2 2006.230.01:51:30.81#ibcon#*before return 0, iclass 21, count 2 2006.230.01:51:30.81#ibcon#after mode 2 write, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:30.81#ibcon#end of loop, iclass 21 iclrec 1 cls_cnt 2 2006.230.01:51:30.81#ibcon#iclass 21 iclrec 2 cls_cnt 2 2006.230.01:51:30.81#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:30.81#ibcon#before find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:30.94#ibcon#after find_delay mode 2, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:30.94#ibcon#before mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:30.94#ibcon#enter wrdev, iclass 21, count 0 2006.230.01:51:30.94#ibcon#first serial, iclass 21, count 0 2006.230.01:51:30.94#ibcon#enter sib2, iclass 21, count 0 2006.230.01:51:30.94#ibcon#flushed, iclass 21, count 0 2006.230.01:51:30.94#ibcon#about to write, iclass 21, count 0 2006.230.01:51:30.94#ibcon#wrote, iclass 21, count 0 2006.230.01:51:30.94#ibcon#about to read 3, iclass 21, count 0 2006.230.01:51:30.95#ibcon#read 3, iclass 21, count 0 2006.230.01:51:30.95#ibcon#about to read 4, iclass 21, count 0 2006.230.01:51:30.95#ibcon#read 4, iclass 21, count 0 2006.230.01:51:30.95#ibcon#about to read 5, iclass 21, count 0 2006.230.01:51:30.95#ibcon#read 5, iclass 21, count 0 2006.230.01:51:30.95#ibcon#about to read 6, iclass 21, count 0 2006.230.01:51:30.95#ibcon#read 6, iclass 21, count 0 2006.230.01:51:30.95#ibcon#end of sib2, iclass 21, count 0 2006.230.01:51:30.95#ibcon#*mode == 0, iclass 21, count 0 2006.230.01:51:30.95#ibcon#*mode == 0 && serial, iclass 21, count 0 2006.230.01:51:30.95#ibcon#[27=USB\r\n] 2006.230.01:51:30.95#ibcon#*before write, iclass 21, count 0 2006.230.01:51:30.95#ibcon#enter sib2, iclass 21, count 0 2006.230.01:51:30.95#ibcon#flushed, iclass 21, count 0 2006.230.01:51:30.95#ibcon#about to write, iclass 21, count 0 2006.230.01:51:30.95#ibcon#wrote, iclass 21, count 0 2006.230.01:51:30.95#ibcon#about to read 3, iclass 21, count 0 2006.230.01:51:30.98#ibcon#read 3, iclass 21, count 0 2006.230.01:51:30.98#ibcon#about to read 4, iclass 21, count 0 2006.230.01:51:30.98#ibcon#read 4, iclass 21, count 0 2006.230.01:51:30.98#ibcon#about to read 5, iclass 21, count 0 2006.230.01:51:30.98#ibcon#read 5, iclass 21, count 0 2006.230.01:51:30.98#ibcon#about to read 6, iclass 21, count 0 2006.230.01:51:30.98#ibcon#read 6, iclass 21, count 0 2006.230.01:51:30.98#ibcon#end of sib2, iclass 21, count 0 2006.230.01:51:30.98#ibcon#*after write, iclass 21, count 0 2006.230.01:51:30.98#ibcon#*before return 0, iclass 21, count 0 2006.230.01:51:30.98#ibcon#after mode 2 write, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:30.98#ibcon#end of loop, iclass 21 iclrec 2 cls_cnt 0 2006.230.01:51:30.98#ibcon#about to clear, iclass 21 cls_cnt 0 2006.230.01:51:30.98#ibcon#cleared, iclass 21 cls_cnt 0 2006.230.01:51:30.98$vck44/vblo=5,709.99 2006.230.01:51:30.98#ibcon#iclass 23 nclrec 1 cls_cnt 2 2006.230.01:51:30.98#ibcon#iclass 23 iclrec 1 cls_cnt 2 2006.230.01:51:30.98#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:30.98#ibcon#before find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:30.98#ibcon#after find_delay mode 2, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:30.98#ibcon#before mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:30.98#ibcon#enter wrdev, iclass 23, count 0 2006.230.01:51:30.98#ibcon#first serial, iclass 23, count 0 2006.230.01:51:30.98#ibcon#enter sib2, iclass 23, count 0 2006.230.01:51:30.98#ibcon#flushed, iclass 23, count 0 2006.230.01:51:30.98#ibcon#about to write, iclass 23, count 0 2006.230.01:51:30.98#ibcon#wrote, iclass 23, count 0 2006.230.01:51:30.98#ibcon#about to read 3, iclass 23, count 0 2006.230.01:51:31.00#ibcon#read 3, iclass 23, count 0 2006.230.01:51:31.00#ibcon#about to read 4, iclass 23, count 0 2006.230.01:51:31.00#ibcon#read 4, iclass 23, count 0 2006.230.01:51:31.00#ibcon#about to read 5, iclass 23, count 0 2006.230.01:51:31.00#ibcon#read 5, iclass 23, count 0 2006.230.01:51:31.00#ibcon#about to read 6, iclass 23, count 0 2006.230.01:51:31.00#ibcon#read 6, iclass 23, count 0 2006.230.01:51:31.00#ibcon#end of sib2, iclass 23, count 0 2006.230.01:51:31.00#ibcon#*mode == 0, iclass 23, count 0 2006.230.01:51:31.00#ibcon#*mode == 0 && serial, iclass 23, count 0 2006.230.01:51:31.00#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:51:31.00#ibcon#*before write, iclass 23, count 0 2006.230.01:51:31.00#ibcon#enter sib2, iclass 23, count 0 2006.230.01:51:31.00#ibcon#flushed, iclass 23, count 0 2006.230.01:51:31.00#ibcon#about to write, iclass 23, count 0 2006.230.01:51:31.00#ibcon#wrote, iclass 23, count 0 2006.230.01:51:31.00#ibcon#about to read 3, iclass 23, count 0 2006.230.01:51:31.04#ibcon#read 3, iclass 23, count 0 2006.230.01:51:31.04#ibcon#about to read 4, iclass 23, count 0 2006.230.01:51:31.04#ibcon#read 4, iclass 23, count 0 2006.230.01:51:31.04#ibcon#about to read 5, iclass 23, count 0 2006.230.01:51:31.04#ibcon#read 5, iclass 23, count 0 2006.230.01:51:31.04#ibcon#about to read 6, iclass 23, count 0 2006.230.01:51:31.04#ibcon#read 6, iclass 23, count 0 2006.230.01:51:31.04#ibcon#end of sib2, iclass 23, count 0 2006.230.01:51:31.04#ibcon#*after write, iclass 23, count 0 2006.230.01:51:31.04#ibcon#*before return 0, iclass 23, count 0 2006.230.01:51:31.04#ibcon#after mode 2 write, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:31.04#ibcon#end of loop, iclass 23 iclrec 1 cls_cnt 0 2006.230.01:51:31.04#ibcon#about to clear, iclass 23 cls_cnt 0 2006.230.01:51:31.04#ibcon#cleared, iclass 23 cls_cnt 0 2006.230.01:51:31.04$vck44/vb=5,4 2006.230.01:51:31.04#ibcon#iclass 25 nclrec 2 cls_cnt 3 2006.230.01:51:31.04#ibcon#iclass 25 iclrec 1 cls_cnt 3 2006.230.01:51:31.04#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:31.04#ibcon#before find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:31.10#ibcon#after find_delay mode 2, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:31.10#ibcon#before mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:31.10#ibcon#enter wrdev, iclass 25, count 2 2006.230.01:51:31.10#ibcon#first serial, iclass 25, count 2 2006.230.01:51:31.10#ibcon#enter sib2, iclass 25, count 2 2006.230.01:51:31.10#ibcon#flushed, iclass 25, count 2 2006.230.01:51:31.10#ibcon#about to write, iclass 25, count 2 2006.230.01:51:31.10#ibcon#wrote, iclass 25, count 2 2006.230.01:51:31.10#ibcon#about to read 3, iclass 25, count 2 2006.230.01:51:31.12#ibcon#read 3, iclass 25, count 2 2006.230.01:51:31.12#ibcon#about to read 4, iclass 25, count 2 2006.230.01:51:31.12#ibcon#read 4, iclass 25, count 2 2006.230.01:51:31.12#ibcon#about to read 5, iclass 25, count 2 2006.230.01:51:31.12#ibcon#read 5, iclass 25, count 2 2006.230.01:51:31.12#ibcon#about to read 6, iclass 25, count 2 2006.230.01:51:31.12#ibcon#read 6, iclass 25, count 2 2006.230.01:51:31.12#ibcon#end of sib2, iclass 25, count 2 2006.230.01:51:31.12#ibcon#*mode == 0, iclass 25, count 2 2006.230.01:51:31.12#ibcon#*mode == 0 && serial, iclass 25, count 2 2006.230.01:51:31.12#ibcon#[27=AT05-04\r\n] 2006.230.01:51:31.12#ibcon#*before write, iclass 25, count 2 2006.230.01:51:31.12#ibcon#enter sib2, iclass 25, count 2 2006.230.01:51:31.12#ibcon#flushed, iclass 25, count 2 2006.230.01:51:31.12#ibcon#about to write, iclass 25, count 2 2006.230.01:51:31.12#ibcon#wrote, iclass 25, count 2 2006.230.01:51:31.12#ibcon#about to read 3, iclass 25, count 2 2006.230.01:51:31.15#ibcon#read 3, iclass 25, count 2 2006.230.01:51:31.15#ibcon#about to read 4, iclass 25, count 2 2006.230.01:51:31.15#ibcon#read 4, iclass 25, count 2 2006.230.01:51:31.15#ibcon#about to read 5, iclass 25, count 2 2006.230.01:51:31.15#ibcon#read 5, iclass 25, count 2 2006.230.01:51:31.15#ibcon#about to read 6, iclass 25, count 2 2006.230.01:51:31.15#ibcon#read 6, iclass 25, count 2 2006.230.01:51:31.15#ibcon#end of sib2, iclass 25, count 2 2006.230.01:51:31.15#ibcon#*after write, iclass 25, count 2 2006.230.01:51:31.15#ibcon#*before return 0, iclass 25, count 2 2006.230.01:51:31.15#ibcon#after mode 2 write, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:31.15#ibcon#end of loop, iclass 25 iclrec 1 cls_cnt 2 2006.230.01:51:31.15#ibcon#iclass 25 iclrec 2 cls_cnt 2 2006.230.01:51:31.15#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:31.15#ibcon#before find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:31.27#ibcon#after find_delay mode 2, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:31.27#ibcon#before mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:31.27#ibcon#enter wrdev, iclass 25, count 0 2006.230.01:51:31.27#ibcon#first serial, iclass 25, count 0 2006.230.01:51:31.27#ibcon#enter sib2, iclass 25, count 0 2006.230.01:51:31.27#ibcon#flushed, iclass 25, count 0 2006.230.01:51:31.27#ibcon#about to write, iclass 25, count 0 2006.230.01:51:31.27#ibcon#wrote, iclass 25, count 0 2006.230.01:51:31.27#ibcon#about to read 3, iclass 25, count 0 2006.230.01:51:31.29#ibcon#read 3, iclass 25, count 0 2006.230.01:51:31.29#ibcon#about to read 4, iclass 25, count 0 2006.230.01:51:31.29#ibcon#read 4, iclass 25, count 0 2006.230.01:51:31.29#ibcon#about to read 5, iclass 25, count 0 2006.230.01:51:31.29#ibcon#read 5, iclass 25, count 0 2006.230.01:51:31.29#ibcon#about to read 6, iclass 25, count 0 2006.230.01:51:31.29#ibcon#read 6, iclass 25, count 0 2006.230.01:51:31.29#ibcon#end of sib2, iclass 25, count 0 2006.230.01:51:31.29#ibcon#*mode == 0, iclass 25, count 0 2006.230.01:51:31.29#ibcon#*mode == 0 && serial, iclass 25, count 0 2006.230.01:51:31.29#ibcon#[27=USB\r\n] 2006.230.01:51:31.29#ibcon#*before write, iclass 25, count 0 2006.230.01:51:31.29#ibcon#enter sib2, iclass 25, count 0 2006.230.01:51:31.29#ibcon#flushed, iclass 25, count 0 2006.230.01:51:31.29#ibcon#about to write, iclass 25, count 0 2006.230.01:51:31.29#ibcon#wrote, iclass 25, count 0 2006.230.01:51:31.29#ibcon#about to read 3, iclass 25, count 0 2006.230.01:51:31.32#ibcon#read 3, iclass 25, count 0 2006.230.01:51:31.32#ibcon#about to read 4, iclass 25, count 0 2006.230.01:51:31.32#ibcon#read 4, iclass 25, count 0 2006.230.01:51:31.32#ibcon#about to read 5, iclass 25, count 0 2006.230.01:51:31.32#ibcon#read 5, iclass 25, count 0 2006.230.01:51:31.32#ibcon#about to read 6, iclass 25, count 0 2006.230.01:51:31.32#ibcon#read 6, iclass 25, count 0 2006.230.01:51:31.32#ibcon#end of sib2, iclass 25, count 0 2006.230.01:51:31.32#ibcon#*after write, iclass 25, count 0 2006.230.01:51:31.32#ibcon#*before return 0, iclass 25, count 0 2006.230.01:51:31.32#ibcon#after mode 2 write, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:31.32#ibcon#end of loop, iclass 25 iclrec 2 cls_cnt 0 2006.230.01:51:31.32#ibcon#about to clear, iclass 25 cls_cnt 0 2006.230.01:51:31.32#ibcon#cleared, iclass 25 cls_cnt 0 2006.230.01:51:31.32$vck44/vblo=6,719.99 2006.230.01:51:31.32#ibcon#iclass 27 nclrec 1 cls_cnt 2 2006.230.01:51:31.32#ibcon#iclass 27 iclrec 1 cls_cnt 2 2006.230.01:51:31.32#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:31.32#ibcon#before find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:31.32#ibcon#after find_delay mode 2, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:31.32#ibcon#before mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:31.32#ibcon#enter wrdev, iclass 27, count 0 2006.230.01:51:31.32#ibcon#first serial, iclass 27, count 0 2006.230.01:51:31.32#ibcon#enter sib2, iclass 27, count 0 2006.230.01:51:31.32#ibcon#flushed, iclass 27, count 0 2006.230.01:51:31.32#ibcon#about to write, iclass 27, count 0 2006.230.01:51:31.32#ibcon#wrote, iclass 27, count 0 2006.230.01:51:31.32#ibcon#about to read 3, iclass 27, count 0 2006.230.01:51:31.34#ibcon#read 3, iclass 27, count 0 2006.230.01:51:31.34#ibcon#about to read 4, iclass 27, count 0 2006.230.01:51:31.34#ibcon#read 4, iclass 27, count 0 2006.230.01:51:31.34#ibcon#about to read 5, iclass 27, count 0 2006.230.01:51:31.34#ibcon#read 5, iclass 27, count 0 2006.230.01:51:31.34#ibcon#about to read 6, iclass 27, count 0 2006.230.01:51:31.34#ibcon#read 6, iclass 27, count 0 2006.230.01:51:31.34#ibcon#end of sib2, iclass 27, count 0 2006.230.01:51:31.34#ibcon#*mode == 0, iclass 27, count 0 2006.230.01:51:31.34#ibcon#*mode == 0 && serial, iclass 27, count 0 2006.230.01:51:31.34#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:51:31.34#ibcon#*before write, iclass 27, count 0 2006.230.01:51:31.34#ibcon#enter sib2, iclass 27, count 0 2006.230.01:51:31.34#ibcon#flushed, iclass 27, count 0 2006.230.01:51:31.34#ibcon#about to write, iclass 27, count 0 2006.230.01:51:31.34#ibcon#wrote, iclass 27, count 0 2006.230.01:51:31.34#ibcon#about to read 3, iclass 27, count 0 2006.230.01:51:31.38#ibcon#read 3, iclass 27, count 0 2006.230.01:51:31.38#ibcon#about to read 4, iclass 27, count 0 2006.230.01:51:31.38#ibcon#read 4, iclass 27, count 0 2006.230.01:51:31.38#ibcon#about to read 5, iclass 27, count 0 2006.230.01:51:31.38#ibcon#read 5, iclass 27, count 0 2006.230.01:51:31.38#ibcon#about to read 6, iclass 27, count 0 2006.230.01:51:31.38#ibcon#read 6, iclass 27, count 0 2006.230.01:51:31.38#ibcon#end of sib2, iclass 27, count 0 2006.230.01:51:31.38#ibcon#*after write, iclass 27, count 0 2006.230.01:51:31.38#ibcon#*before return 0, iclass 27, count 0 2006.230.01:51:31.38#ibcon#after mode 2 write, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:31.38#ibcon#end of loop, iclass 27 iclrec 1 cls_cnt 0 2006.230.01:51:31.38#ibcon#about to clear, iclass 27 cls_cnt 0 2006.230.01:51:31.38#ibcon#cleared, iclass 27 cls_cnt 0 2006.230.01:51:31.38$vck44/vb=6,4 2006.230.01:51:31.38#ibcon#iclass 29 nclrec 2 cls_cnt 3 2006.230.01:51:31.38#ibcon#iclass 29 iclrec 1 cls_cnt 3 2006.230.01:51:31.38#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:31.38#ibcon#before find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:31.44#ibcon#after find_delay mode 2, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:31.44#ibcon#before mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:31.44#ibcon#enter wrdev, iclass 29, count 2 2006.230.01:51:31.44#ibcon#first serial, iclass 29, count 2 2006.230.01:51:31.44#ibcon#enter sib2, iclass 29, count 2 2006.230.01:51:31.44#ibcon#flushed, iclass 29, count 2 2006.230.01:51:31.44#ibcon#about to write, iclass 29, count 2 2006.230.01:51:31.44#ibcon#wrote, iclass 29, count 2 2006.230.01:51:31.44#ibcon#about to read 3, iclass 29, count 2 2006.230.01:51:31.46#ibcon#read 3, iclass 29, count 2 2006.230.01:51:31.46#ibcon#about to read 4, iclass 29, count 2 2006.230.01:51:31.46#ibcon#read 4, iclass 29, count 2 2006.230.01:51:31.46#ibcon#about to read 5, iclass 29, count 2 2006.230.01:51:31.46#ibcon#read 5, iclass 29, count 2 2006.230.01:51:31.46#ibcon#about to read 6, iclass 29, count 2 2006.230.01:51:31.46#ibcon#read 6, iclass 29, count 2 2006.230.01:51:31.46#ibcon#end of sib2, iclass 29, count 2 2006.230.01:51:31.46#ibcon#*mode == 0, iclass 29, count 2 2006.230.01:51:31.46#ibcon#*mode == 0 && serial, iclass 29, count 2 2006.230.01:51:31.46#ibcon#[27=AT06-04\r\n] 2006.230.01:51:31.46#ibcon#*before write, iclass 29, count 2 2006.230.01:51:31.46#ibcon#enter sib2, iclass 29, count 2 2006.230.01:51:31.46#ibcon#flushed, iclass 29, count 2 2006.230.01:51:31.46#ibcon#about to write, iclass 29, count 2 2006.230.01:51:31.46#ibcon#wrote, iclass 29, count 2 2006.230.01:51:31.46#ibcon#about to read 3, iclass 29, count 2 2006.230.01:51:31.49#ibcon#read 3, iclass 29, count 2 2006.230.01:51:31.49#ibcon#about to read 4, iclass 29, count 2 2006.230.01:51:31.49#ibcon#read 4, iclass 29, count 2 2006.230.01:51:31.49#ibcon#about to read 5, iclass 29, count 2 2006.230.01:51:31.49#ibcon#read 5, iclass 29, count 2 2006.230.01:51:31.49#ibcon#about to read 6, iclass 29, count 2 2006.230.01:51:31.49#ibcon#read 6, iclass 29, count 2 2006.230.01:51:31.49#ibcon#end of sib2, iclass 29, count 2 2006.230.01:51:31.49#ibcon#*after write, iclass 29, count 2 2006.230.01:51:31.49#ibcon#*before return 0, iclass 29, count 2 2006.230.01:51:31.49#ibcon#after mode 2 write, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:31.49#ibcon#end of loop, iclass 29 iclrec 1 cls_cnt 2 2006.230.01:51:31.49#ibcon#iclass 29 iclrec 2 cls_cnt 2 2006.230.01:51:31.49#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:31.49#ibcon#before find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:31.62#ibcon#after find_delay mode 2, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:31.62#ibcon#before mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:31.62#ibcon#enter wrdev, iclass 29, count 0 2006.230.01:51:31.62#ibcon#first serial, iclass 29, count 0 2006.230.01:51:31.62#ibcon#enter sib2, iclass 29, count 0 2006.230.01:51:31.62#ibcon#flushed, iclass 29, count 0 2006.230.01:51:31.62#ibcon#about to write, iclass 29, count 0 2006.230.01:51:31.62#ibcon#wrote, iclass 29, count 0 2006.230.01:51:31.62#ibcon#about to read 3, iclass 29, count 0 2006.230.01:51:31.63#ibcon#read 3, iclass 29, count 0 2006.230.01:51:31.63#ibcon#about to read 4, iclass 29, count 0 2006.230.01:51:31.63#ibcon#read 4, iclass 29, count 0 2006.230.01:51:31.63#ibcon#about to read 5, iclass 29, count 0 2006.230.01:51:31.63#ibcon#read 5, iclass 29, count 0 2006.230.01:51:31.63#ibcon#about to read 6, iclass 29, count 0 2006.230.01:51:31.63#ibcon#read 6, iclass 29, count 0 2006.230.01:51:31.63#ibcon#end of sib2, iclass 29, count 0 2006.230.01:51:31.63#ibcon#*mode == 0, iclass 29, count 0 2006.230.01:51:31.63#ibcon#*mode == 0 && serial, iclass 29, count 0 2006.230.01:51:31.63#ibcon#[27=USB\r\n] 2006.230.01:51:31.63#ibcon#*before write, iclass 29, count 0 2006.230.01:51:31.63#ibcon#enter sib2, iclass 29, count 0 2006.230.01:51:31.63#ibcon#flushed, iclass 29, count 0 2006.230.01:51:31.63#ibcon#about to write, iclass 29, count 0 2006.230.01:51:31.63#ibcon#wrote, iclass 29, count 0 2006.230.01:51:31.63#ibcon#about to read 3, iclass 29, count 0 2006.230.01:51:31.66#ibcon#read 3, iclass 29, count 0 2006.230.01:51:31.66#ibcon#about to read 4, iclass 29, count 0 2006.230.01:51:31.66#ibcon#read 4, iclass 29, count 0 2006.230.01:51:31.66#ibcon#about to read 5, iclass 29, count 0 2006.230.01:51:31.66#ibcon#read 5, iclass 29, count 0 2006.230.01:51:31.66#ibcon#about to read 6, iclass 29, count 0 2006.230.01:51:31.66#ibcon#read 6, iclass 29, count 0 2006.230.01:51:31.66#ibcon#end of sib2, iclass 29, count 0 2006.230.01:51:31.66#ibcon#*after write, iclass 29, count 0 2006.230.01:51:31.66#ibcon#*before return 0, iclass 29, count 0 2006.230.01:51:31.66#ibcon#after mode 2 write, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:31.66#ibcon#end of loop, iclass 29 iclrec 2 cls_cnt 0 2006.230.01:51:31.66#ibcon#about to clear, iclass 29 cls_cnt 0 2006.230.01:51:31.66#ibcon#cleared, iclass 29 cls_cnt 0 2006.230.01:51:31.66$vck44/vblo=7,734.99 2006.230.01:51:31.66#ibcon#iclass 31 nclrec 1 cls_cnt 2 2006.230.01:51:31.66#ibcon#iclass 31 iclrec 1 cls_cnt 2 2006.230.01:51:31.66#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:31.66#ibcon#before find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:31.66#ibcon#after find_delay mode 2, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:31.66#ibcon#before mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:31.66#ibcon#enter wrdev, iclass 31, count 0 2006.230.01:51:31.66#ibcon#first serial, iclass 31, count 0 2006.230.01:51:31.66#ibcon#enter sib2, iclass 31, count 0 2006.230.01:51:31.66#ibcon#flushed, iclass 31, count 0 2006.230.01:51:31.66#ibcon#about to write, iclass 31, count 0 2006.230.01:51:31.66#ibcon#wrote, iclass 31, count 0 2006.230.01:51:31.66#ibcon#about to read 3, iclass 31, count 0 2006.230.01:51:31.68#ibcon#read 3, iclass 31, count 0 2006.230.01:51:31.68#ibcon#about to read 4, iclass 31, count 0 2006.230.01:51:31.68#ibcon#read 4, iclass 31, count 0 2006.230.01:51:31.68#ibcon#about to read 5, iclass 31, count 0 2006.230.01:51:31.68#ibcon#read 5, iclass 31, count 0 2006.230.01:51:31.68#ibcon#about to read 6, iclass 31, count 0 2006.230.01:51:31.68#ibcon#read 6, iclass 31, count 0 2006.230.01:51:31.68#ibcon#end of sib2, iclass 31, count 0 2006.230.01:51:31.68#ibcon#*mode == 0, iclass 31, count 0 2006.230.01:51:31.68#ibcon#*mode == 0 && serial, iclass 31, count 0 2006.230.01:51:31.68#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:51:31.68#ibcon#*before write, iclass 31, count 0 2006.230.01:51:31.68#ibcon#enter sib2, iclass 31, count 0 2006.230.01:51:31.68#ibcon#flushed, iclass 31, count 0 2006.230.01:51:31.68#ibcon#about to write, iclass 31, count 0 2006.230.01:51:31.68#ibcon#wrote, iclass 31, count 0 2006.230.01:51:31.68#ibcon#about to read 3, iclass 31, count 0 2006.230.01:51:31.72#ibcon#read 3, iclass 31, count 0 2006.230.01:51:31.72#ibcon#about to read 4, iclass 31, count 0 2006.230.01:51:31.72#ibcon#read 4, iclass 31, count 0 2006.230.01:51:31.72#ibcon#about to read 5, iclass 31, count 0 2006.230.01:51:31.72#ibcon#read 5, iclass 31, count 0 2006.230.01:51:31.72#ibcon#about to read 6, iclass 31, count 0 2006.230.01:51:31.72#ibcon#read 6, iclass 31, count 0 2006.230.01:51:31.72#ibcon#end of sib2, iclass 31, count 0 2006.230.01:51:31.72#ibcon#*after write, iclass 31, count 0 2006.230.01:51:31.72#ibcon#*before return 0, iclass 31, count 0 2006.230.01:51:31.72#ibcon#after mode 2 write, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:31.72#ibcon#end of loop, iclass 31 iclrec 1 cls_cnt 0 2006.230.01:51:31.72#ibcon#about to clear, iclass 31 cls_cnt 0 2006.230.01:51:31.72#ibcon#cleared, iclass 31 cls_cnt 0 2006.230.01:51:31.72$vck44/vb=7,4 2006.230.01:51:31.72#ibcon#iclass 33 nclrec 2 cls_cnt 3 2006.230.01:51:31.72#ibcon#iclass 33 iclrec 1 cls_cnt 3 2006.230.01:51:31.72#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:31.72#ibcon#before find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:31.78#ibcon#after find_delay mode 2, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:31.78#ibcon#before mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:31.78#ibcon#enter wrdev, iclass 33, count 2 2006.230.01:51:31.78#ibcon#first serial, iclass 33, count 2 2006.230.01:51:31.78#ibcon#enter sib2, iclass 33, count 2 2006.230.01:51:31.78#ibcon#flushed, iclass 33, count 2 2006.230.01:51:31.78#ibcon#about to write, iclass 33, count 2 2006.230.01:51:31.78#ibcon#wrote, iclass 33, count 2 2006.230.01:51:31.78#ibcon#about to read 3, iclass 33, count 2 2006.230.01:51:31.80#ibcon#read 3, iclass 33, count 2 2006.230.01:51:31.80#ibcon#about to read 4, iclass 33, count 2 2006.230.01:51:31.80#ibcon#read 4, iclass 33, count 2 2006.230.01:51:31.80#ibcon#about to read 5, iclass 33, count 2 2006.230.01:51:31.80#ibcon#read 5, iclass 33, count 2 2006.230.01:51:31.80#ibcon#about to read 6, iclass 33, count 2 2006.230.01:51:31.80#ibcon#read 6, iclass 33, count 2 2006.230.01:51:31.80#ibcon#end of sib2, iclass 33, count 2 2006.230.01:51:31.80#ibcon#*mode == 0, iclass 33, count 2 2006.230.01:51:31.80#ibcon#*mode == 0 && serial, iclass 33, count 2 2006.230.01:51:31.80#ibcon#[27=AT07-04\r\n] 2006.230.01:51:31.80#ibcon#*before write, iclass 33, count 2 2006.230.01:51:31.80#ibcon#enter sib2, iclass 33, count 2 2006.230.01:51:31.80#ibcon#flushed, iclass 33, count 2 2006.230.01:51:31.80#ibcon#about to write, iclass 33, count 2 2006.230.01:51:31.80#ibcon#wrote, iclass 33, count 2 2006.230.01:51:31.80#ibcon#about to read 3, iclass 33, count 2 2006.230.01:51:31.83#ibcon#read 3, iclass 33, count 2 2006.230.01:51:31.83#ibcon#about to read 4, iclass 33, count 2 2006.230.01:51:31.83#ibcon#read 4, iclass 33, count 2 2006.230.01:51:31.83#ibcon#about to read 5, iclass 33, count 2 2006.230.01:51:31.83#ibcon#read 5, iclass 33, count 2 2006.230.01:51:31.83#ibcon#about to read 6, iclass 33, count 2 2006.230.01:51:31.83#ibcon#read 6, iclass 33, count 2 2006.230.01:51:31.83#ibcon#end of sib2, iclass 33, count 2 2006.230.01:51:31.83#ibcon#*after write, iclass 33, count 2 2006.230.01:51:31.83#ibcon#*before return 0, iclass 33, count 2 2006.230.01:51:31.83#ibcon#after mode 2 write, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:31.83#ibcon#end of loop, iclass 33 iclrec 1 cls_cnt 2 2006.230.01:51:31.83#ibcon#iclass 33 iclrec 2 cls_cnt 2 2006.230.01:51:31.83#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:31.83#ibcon#before find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:31.95#ibcon#after find_delay mode 2, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:31.95#ibcon#before mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:31.95#ibcon#enter wrdev, iclass 33, count 0 2006.230.01:51:31.95#ibcon#first serial, iclass 33, count 0 2006.230.01:51:31.95#ibcon#enter sib2, iclass 33, count 0 2006.230.01:51:31.95#ibcon#flushed, iclass 33, count 0 2006.230.01:51:31.95#ibcon#about to write, iclass 33, count 0 2006.230.01:51:31.95#ibcon#wrote, iclass 33, count 0 2006.230.01:51:31.95#ibcon#about to read 3, iclass 33, count 0 2006.230.01:51:31.97#ibcon#read 3, iclass 33, count 0 2006.230.01:51:31.97#ibcon#about to read 4, iclass 33, count 0 2006.230.01:51:31.97#ibcon#read 4, iclass 33, count 0 2006.230.01:51:31.97#ibcon#about to read 5, iclass 33, count 0 2006.230.01:51:31.97#ibcon#read 5, iclass 33, count 0 2006.230.01:51:31.97#ibcon#about to read 6, iclass 33, count 0 2006.230.01:51:31.97#ibcon#read 6, iclass 33, count 0 2006.230.01:51:31.97#ibcon#end of sib2, iclass 33, count 0 2006.230.01:51:31.97#ibcon#*mode == 0, iclass 33, count 0 2006.230.01:51:31.97#ibcon#*mode == 0 && serial, iclass 33, count 0 2006.230.01:51:31.97#ibcon#[27=USB\r\n] 2006.230.01:51:31.97#ibcon#*before write, iclass 33, count 0 2006.230.01:51:31.97#ibcon#enter sib2, iclass 33, count 0 2006.230.01:51:31.97#ibcon#flushed, iclass 33, count 0 2006.230.01:51:31.97#ibcon#about to write, iclass 33, count 0 2006.230.01:51:31.97#ibcon#wrote, iclass 33, count 0 2006.230.01:51:31.97#ibcon#about to read 3, iclass 33, count 0 2006.230.01:51:32.00#ibcon#read 3, iclass 33, count 0 2006.230.01:51:32.00#ibcon#about to read 4, iclass 33, count 0 2006.230.01:51:32.00#ibcon#read 4, iclass 33, count 0 2006.230.01:51:32.00#ibcon#about to read 5, iclass 33, count 0 2006.230.01:51:32.00#ibcon#read 5, iclass 33, count 0 2006.230.01:51:32.00#ibcon#about to read 6, iclass 33, count 0 2006.230.01:51:32.00#ibcon#read 6, iclass 33, count 0 2006.230.01:51:32.00#ibcon#end of sib2, iclass 33, count 0 2006.230.01:51:32.00#ibcon#*after write, iclass 33, count 0 2006.230.01:51:32.00#ibcon#*before return 0, iclass 33, count 0 2006.230.01:51:32.00#ibcon#after mode 2 write, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:32.00#ibcon#end of loop, iclass 33 iclrec 2 cls_cnt 0 2006.230.01:51:32.00#ibcon#about to clear, iclass 33 cls_cnt 0 2006.230.01:51:32.00#ibcon#cleared, iclass 33 cls_cnt 0 2006.230.01:51:32.00$vck44/vblo=8,744.99 2006.230.01:51:32.00#ibcon#iclass 35 nclrec 1 cls_cnt 2 2006.230.01:51:32.00#ibcon#iclass 35 iclrec 1 cls_cnt 2 2006.230.01:51:32.00#ibcon#ireg 17 cls_cnt 0 2006.230.01:51:32.00#ibcon#before find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:32.00#ibcon#after find_delay mode 2, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:32.00#ibcon#before mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:32.00#ibcon#enter wrdev, iclass 35, count 0 2006.230.01:51:32.00#ibcon#first serial, iclass 35, count 0 2006.230.01:51:32.00#ibcon#enter sib2, iclass 35, count 0 2006.230.01:51:32.00#ibcon#flushed, iclass 35, count 0 2006.230.01:51:32.00#ibcon#about to write, iclass 35, count 0 2006.230.01:51:32.00#ibcon#wrote, iclass 35, count 0 2006.230.01:51:32.00#ibcon#about to read 3, iclass 35, count 0 2006.230.01:51:32.02#ibcon#read 3, iclass 35, count 0 2006.230.01:51:32.02#ibcon#about to read 4, iclass 35, count 0 2006.230.01:51:32.02#ibcon#read 4, iclass 35, count 0 2006.230.01:51:32.02#ibcon#about to read 5, iclass 35, count 0 2006.230.01:51:32.02#ibcon#read 5, iclass 35, count 0 2006.230.01:51:32.02#ibcon#about to read 6, iclass 35, count 0 2006.230.01:51:32.02#ibcon#read 6, iclass 35, count 0 2006.230.01:51:32.02#ibcon#end of sib2, iclass 35, count 0 2006.230.01:51:32.02#ibcon#*mode == 0, iclass 35, count 0 2006.230.01:51:32.02#ibcon#*mode == 0 && serial, iclass 35, count 0 2006.230.01:51:32.02#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:51:32.02#ibcon#*before write, iclass 35, count 0 2006.230.01:51:32.02#ibcon#enter sib2, iclass 35, count 0 2006.230.01:51:32.02#ibcon#flushed, iclass 35, count 0 2006.230.01:51:32.02#ibcon#about to write, iclass 35, count 0 2006.230.01:51:32.02#ibcon#wrote, iclass 35, count 0 2006.230.01:51:32.02#ibcon#about to read 3, iclass 35, count 0 2006.230.01:51:32.06#ibcon#read 3, iclass 35, count 0 2006.230.01:51:32.06#ibcon#about to read 4, iclass 35, count 0 2006.230.01:51:32.06#ibcon#read 4, iclass 35, count 0 2006.230.01:51:32.06#ibcon#about to read 5, iclass 35, count 0 2006.230.01:51:32.06#ibcon#read 5, iclass 35, count 0 2006.230.01:51:32.06#ibcon#about to read 6, iclass 35, count 0 2006.230.01:51:32.06#ibcon#read 6, iclass 35, count 0 2006.230.01:51:32.06#ibcon#end of sib2, iclass 35, count 0 2006.230.01:51:32.06#ibcon#*after write, iclass 35, count 0 2006.230.01:51:32.06#ibcon#*before return 0, iclass 35, count 0 2006.230.01:51:32.06#ibcon#after mode 2 write, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:32.06#ibcon#end of loop, iclass 35 iclrec 1 cls_cnt 0 2006.230.01:51:32.06#ibcon#about to clear, iclass 35 cls_cnt 0 2006.230.01:51:32.06#ibcon#cleared, iclass 35 cls_cnt 0 2006.230.01:51:32.06$vck44/vb=8,4 2006.230.01:51:32.06#ibcon#iclass 37 nclrec 2 cls_cnt 3 2006.230.01:51:32.06#ibcon#iclass 37 iclrec 1 cls_cnt 3 2006.230.01:51:32.06#ibcon#ireg 11 cls_cnt 2 2006.230.01:51:32.06#ibcon#before find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:32.12#ibcon#after find_delay mode 2, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:32.12#ibcon#before mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:32.12#ibcon#enter wrdev, iclass 37, count 2 2006.230.01:51:32.12#ibcon#first serial, iclass 37, count 2 2006.230.01:51:32.12#ibcon#enter sib2, iclass 37, count 2 2006.230.01:51:32.12#ibcon#flushed, iclass 37, count 2 2006.230.01:51:32.12#ibcon#about to write, iclass 37, count 2 2006.230.01:51:32.12#ibcon#wrote, iclass 37, count 2 2006.230.01:51:32.12#ibcon#about to read 3, iclass 37, count 2 2006.230.01:51:32.14#ibcon#read 3, iclass 37, count 2 2006.230.01:51:32.14#ibcon#about to read 4, iclass 37, count 2 2006.230.01:51:32.14#ibcon#read 4, iclass 37, count 2 2006.230.01:51:32.14#ibcon#about to read 5, iclass 37, count 2 2006.230.01:51:32.14#ibcon#read 5, iclass 37, count 2 2006.230.01:51:32.14#ibcon#about to read 6, iclass 37, count 2 2006.230.01:51:32.14#ibcon#read 6, iclass 37, count 2 2006.230.01:51:32.14#ibcon#end of sib2, iclass 37, count 2 2006.230.01:51:32.14#ibcon#*mode == 0, iclass 37, count 2 2006.230.01:51:32.14#ibcon#*mode == 0 && serial, iclass 37, count 2 2006.230.01:51:32.14#ibcon#[27=AT08-04\r\n] 2006.230.01:51:32.14#ibcon#*before write, iclass 37, count 2 2006.230.01:51:32.14#ibcon#enter sib2, iclass 37, count 2 2006.230.01:51:32.14#ibcon#flushed, iclass 37, count 2 2006.230.01:51:32.14#ibcon#about to write, iclass 37, count 2 2006.230.01:51:32.14#ibcon#wrote, iclass 37, count 2 2006.230.01:51:32.14#ibcon#about to read 3, iclass 37, count 2 2006.230.01:51:32.17#ibcon#read 3, iclass 37, count 2 2006.230.01:51:32.17#ibcon#about to read 4, iclass 37, count 2 2006.230.01:51:32.17#ibcon#read 4, iclass 37, count 2 2006.230.01:51:32.17#ibcon#about to read 5, iclass 37, count 2 2006.230.01:51:32.17#ibcon#read 5, iclass 37, count 2 2006.230.01:51:32.17#ibcon#about to read 6, iclass 37, count 2 2006.230.01:51:32.17#ibcon#read 6, iclass 37, count 2 2006.230.01:51:32.17#ibcon#end of sib2, iclass 37, count 2 2006.230.01:51:32.17#ibcon#*after write, iclass 37, count 2 2006.230.01:51:32.17#ibcon#*before return 0, iclass 37, count 2 2006.230.01:51:32.17#ibcon#after mode 2 write, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:32.17#ibcon#end of loop, iclass 37 iclrec 1 cls_cnt 2 2006.230.01:51:32.17#ibcon#iclass 37 iclrec 2 cls_cnt 2 2006.230.01:51:32.17#ibcon#ireg 7 cls_cnt 0 2006.230.01:51:32.17#ibcon#before find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:32.30#ibcon#after find_delay mode 2, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:32.30#ibcon#before mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:32.30#ibcon#enter wrdev, iclass 37, count 0 2006.230.01:51:32.30#ibcon#first serial, iclass 37, count 0 2006.230.01:51:32.30#ibcon#enter sib2, iclass 37, count 0 2006.230.01:51:32.30#ibcon#flushed, iclass 37, count 0 2006.230.01:51:32.30#ibcon#about to write, iclass 37, count 0 2006.230.01:51:32.30#ibcon#wrote, iclass 37, count 0 2006.230.01:51:32.30#ibcon#about to read 3, iclass 37, count 0 2006.230.01:51:32.31#ibcon#read 3, iclass 37, count 0 2006.230.01:51:32.31#ibcon#about to read 4, iclass 37, count 0 2006.230.01:51:32.31#ibcon#read 4, iclass 37, count 0 2006.230.01:51:32.31#ibcon#about to read 5, iclass 37, count 0 2006.230.01:51:32.31#ibcon#read 5, iclass 37, count 0 2006.230.01:51:32.31#ibcon#about to read 6, iclass 37, count 0 2006.230.01:51:32.31#ibcon#read 6, iclass 37, count 0 2006.230.01:51:32.31#ibcon#end of sib2, iclass 37, count 0 2006.230.01:51:32.31#ibcon#*mode == 0, iclass 37, count 0 2006.230.01:51:32.31#ibcon#*mode == 0 && serial, iclass 37, count 0 2006.230.01:51:32.31#ibcon#[27=USB\r\n] 2006.230.01:51:32.31#ibcon#*before write, iclass 37, count 0 2006.230.01:51:32.31#ibcon#enter sib2, iclass 37, count 0 2006.230.01:51:32.31#ibcon#flushed, iclass 37, count 0 2006.230.01:51:32.31#ibcon#about to write, iclass 37, count 0 2006.230.01:51:32.31#ibcon#wrote, iclass 37, count 0 2006.230.01:51:32.31#ibcon#about to read 3, iclass 37, count 0 2006.230.01:51:32.34#ibcon#read 3, iclass 37, count 0 2006.230.01:51:32.34#ibcon#about to read 4, iclass 37, count 0 2006.230.01:51:32.34#ibcon#read 4, iclass 37, count 0 2006.230.01:51:32.34#ibcon#about to read 5, iclass 37, count 0 2006.230.01:51:32.34#ibcon#read 5, iclass 37, count 0 2006.230.01:51:32.34#ibcon#about to read 6, iclass 37, count 0 2006.230.01:51:32.34#ibcon#read 6, iclass 37, count 0 2006.230.01:51:32.34#ibcon#end of sib2, iclass 37, count 0 2006.230.01:51:32.34#ibcon#*after write, iclass 37, count 0 2006.230.01:51:32.34#ibcon#*before return 0, iclass 37, count 0 2006.230.01:51:32.34#ibcon#after mode 2 write, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:32.34#ibcon#end of loop, iclass 37 iclrec 2 cls_cnt 0 2006.230.01:51:32.34#ibcon#about to clear, iclass 37 cls_cnt 0 2006.230.01:51:32.34#ibcon#cleared, iclass 37 cls_cnt 0 2006.230.01:51:32.34$vck44/vabw=wide 2006.230.01:51:32.34#ibcon#iclass 39 nclrec 1 cls_cnt 2 2006.230.01:51:32.34#ibcon#iclass 39 iclrec 1 cls_cnt 2 2006.230.01:51:32.34#ibcon#ireg 8 cls_cnt 0 2006.230.01:51:32.34#ibcon#before find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:32.34#ibcon#after find_delay mode 2, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:32.34#ibcon#before mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:32.34#ibcon#enter wrdev, iclass 39, count 0 2006.230.01:51:32.34#ibcon#first serial, iclass 39, count 0 2006.230.01:51:32.34#ibcon#enter sib2, iclass 39, count 0 2006.230.01:51:32.34#ibcon#flushed, iclass 39, count 0 2006.230.01:51:32.34#ibcon#about to write, iclass 39, count 0 2006.230.01:51:32.34#ibcon#wrote, iclass 39, count 0 2006.230.01:51:32.34#ibcon#about to read 3, iclass 39, count 0 2006.230.01:51:32.36#ibcon#read 3, iclass 39, count 0 2006.230.01:51:32.36#ibcon#about to read 4, iclass 39, count 0 2006.230.01:51:32.36#ibcon#read 4, iclass 39, count 0 2006.230.01:51:32.36#ibcon#about to read 5, iclass 39, count 0 2006.230.01:51:32.36#ibcon#read 5, iclass 39, count 0 2006.230.01:51:32.36#ibcon#about to read 6, iclass 39, count 0 2006.230.01:51:32.36#ibcon#read 6, iclass 39, count 0 2006.230.01:51:32.36#ibcon#end of sib2, iclass 39, count 0 2006.230.01:51:32.36#ibcon#*mode == 0, iclass 39, count 0 2006.230.01:51:32.36#ibcon#*mode == 0 && serial, iclass 39, count 0 2006.230.01:51:32.36#ibcon#[25=BW32\r\n] 2006.230.01:51:32.36#ibcon#*before write, iclass 39, count 0 2006.230.01:51:32.36#ibcon#enter sib2, iclass 39, count 0 2006.230.01:51:32.36#ibcon#flushed, iclass 39, count 0 2006.230.01:51:32.36#ibcon#about to write, iclass 39, count 0 2006.230.01:51:32.36#ibcon#wrote, iclass 39, count 0 2006.230.01:51:32.36#ibcon#about to read 3, iclass 39, count 0 2006.230.01:51:32.39#ibcon#read 3, iclass 39, count 0 2006.230.01:51:32.39#ibcon#about to read 4, iclass 39, count 0 2006.230.01:51:32.39#ibcon#read 4, iclass 39, count 0 2006.230.01:51:32.39#ibcon#about to read 5, iclass 39, count 0 2006.230.01:51:32.39#ibcon#read 5, iclass 39, count 0 2006.230.01:51:32.39#ibcon#about to read 6, iclass 39, count 0 2006.230.01:51:32.39#ibcon#read 6, iclass 39, count 0 2006.230.01:51:32.39#ibcon#end of sib2, iclass 39, count 0 2006.230.01:51:32.39#ibcon#*after write, iclass 39, count 0 2006.230.01:51:32.39#ibcon#*before return 0, iclass 39, count 0 2006.230.01:51:32.39#ibcon#after mode 2 write, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:32.39#ibcon#end of loop, iclass 39 iclrec 1 cls_cnt 0 2006.230.01:51:32.39#ibcon#about to clear, iclass 39 cls_cnt 0 2006.230.01:51:32.39#ibcon#cleared, iclass 39 cls_cnt 0 2006.230.01:51:32.39$vck44/vbbw=wide 2006.230.01:51:32.39#ibcon#iclass 3 nclrec 1 cls_cnt 2 2006.230.01:51:32.39#ibcon#iclass 3 iclrec 1 cls_cnt 2 2006.230.01:51:32.39#ibcon#ireg 8 cls_cnt 0 2006.230.01:51:32.39#ibcon#before find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:51:32.46#ibcon#after find_delay mode 2, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:51:32.46#ibcon#before mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:51:32.46#ibcon#enter wrdev, iclass 3, count 0 2006.230.01:51:32.46#ibcon#first serial, iclass 3, count 0 2006.230.01:51:32.46#ibcon#enter sib2, iclass 3, count 0 2006.230.01:51:32.46#ibcon#flushed, iclass 3, count 0 2006.230.01:51:32.46#ibcon#about to write, iclass 3, count 0 2006.230.01:51:32.46#ibcon#wrote, iclass 3, count 0 2006.230.01:51:32.46#ibcon#about to read 3, iclass 3, count 0 2006.230.01:51:32.48#ibcon#read 3, iclass 3, count 0 2006.230.01:51:32.48#ibcon#about to read 4, iclass 3, count 0 2006.230.01:51:32.48#ibcon#read 4, iclass 3, count 0 2006.230.01:51:32.48#ibcon#about to read 5, iclass 3, count 0 2006.230.01:51:32.48#ibcon#read 5, iclass 3, count 0 2006.230.01:51:32.48#ibcon#about to read 6, iclass 3, count 0 2006.230.01:51:32.48#ibcon#read 6, iclass 3, count 0 2006.230.01:51:32.48#ibcon#end of sib2, iclass 3, count 0 2006.230.01:51:32.48#ibcon#*mode == 0, iclass 3, count 0 2006.230.01:51:32.48#ibcon#*mode == 0 && serial, iclass 3, count 0 2006.230.01:51:32.48#ibcon#[27=BW32\r\n] 2006.230.01:51:32.48#ibcon#*before write, iclass 3, count 0 2006.230.01:51:32.48#ibcon#enter sib2, iclass 3, count 0 2006.230.01:51:32.48#ibcon#flushed, iclass 3, count 0 2006.230.01:51:32.48#ibcon#about to write, iclass 3, count 0 2006.230.01:51:32.48#ibcon#wrote, iclass 3, count 0 2006.230.01:51:32.48#ibcon#about to read 3, iclass 3, count 0 2006.230.01:51:32.51#ibcon#read 3, iclass 3, count 0 2006.230.01:51:32.51#ibcon#about to read 4, iclass 3, count 0 2006.230.01:51:32.51#ibcon#read 4, iclass 3, count 0 2006.230.01:51:32.51#ibcon#about to read 5, iclass 3, count 0 2006.230.01:51:32.51#ibcon#read 5, iclass 3, count 0 2006.230.01:51:32.51#ibcon#about to read 6, iclass 3, count 0 2006.230.01:51:32.51#ibcon#read 6, iclass 3, count 0 2006.230.01:51:32.51#ibcon#end of sib2, iclass 3, count 0 2006.230.01:51:32.51#ibcon#*after write, iclass 3, count 0 2006.230.01:51:32.51#ibcon#*before return 0, iclass 3, count 0 2006.230.01:51:32.51#ibcon#after mode 2 write, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:51:32.51#ibcon#end of loop, iclass 3 iclrec 1 cls_cnt 0 2006.230.01:51:32.51#ibcon#about to clear, iclass 3 cls_cnt 0 2006.230.01:51:32.51#ibcon#cleared, iclass 3 cls_cnt 0 2006.230.01:51:32.51$setupk4/ifdk4 2006.230.01:51:32.51$ifdk4/lo= 2006.230.01:51:32.51$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:51:32.51$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:51:32.51$ifdk4/patch= 2006.230.01:51:32.51$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:51:32.51$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:51:32.51$setupk4/!*+20s 2006.230.01:51:37.47#abcon#<5=/08 2.0 6.8 33.05 651002.6\r\n> 2006.230.01:51:37.49#abcon#{5=INTERFACE CLEAR} 2006.230.01:51:37.55#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:51:46.99$setupk4/"tpicd 2006.230.01:51:46.99$setupk4/echo=off 2006.230.01:51:46.99$setupk4/xlog=off 2006.230.01:51:46.99:!2006.230.01:52:08 2006.230.01:51:51.13#trakl#Source acquired 2006.230.01:51:52.13#flagr#flagr/antenna,acquired 2006.230.01:52:08.00:preob 2006.230.01:52:08.13/onsource/TRACKING 2006.230.01:52:08.13:!2006.230.01:52:18 2006.230.01:52:18.00:"tape 2006.230.01:52:18.00:"st=record 2006.230.01:52:18.00:data_valid=on 2006.230.01:52:18.00:midob 2006.230.01:52:19.13/onsource/TRACKING 2006.230.01:52:19.13/wx/33.05,1002.6,67 2006.230.01:52:19.22/cable/+6.3914E-03 2006.230.01:52:20.31/va/01,08,usb,yes,35,38 2006.230.01:52:20.31/va/02,07,usb,yes,38,39 2006.230.01:52:20.31/va/03,06,usb,yes,47,50 2006.230.01:52:20.31/va/04,07,usb,yes,40,42 2006.230.01:52:20.31/va/05,04,usb,yes,35,36 2006.230.01:52:20.31/va/06,04,usb,yes,40,39 2006.230.01:52:20.31/va/07,05,usb,yes,35,36 2006.230.01:52:20.31/va/08,06,usb,yes,26,32 2006.230.01:52:20.54/valo/01,524.99,yes,locked 2006.230.01:52:20.54/valo/02,534.99,yes,locked 2006.230.01:52:20.54/valo/03,564.99,yes,locked 2006.230.01:52:20.54/valo/04,624.99,yes,locked 2006.230.01:52:20.54/valo/05,734.99,yes,locked 2006.230.01:52:20.54/valo/06,814.99,yes,locked 2006.230.01:52:20.54/valo/07,864.99,yes,locked 2006.230.01:52:20.54/valo/08,884.99,yes,locked 2006.230.01:52:21.63/vb/01,04,usb,yes,35,32 2006.230.01:52:21.63/vb/02,04,usb,yes,37,37 2006.230.01:52:21.63/vb/03,04,usb,yes,34,37 2006.230.01:52:21.63/vb/04,04,usb,yes,39,38 2006.230.01:52:21.63/vb/05,04,usb,yes,30,33 2006.230.01:52:21.63/vb/06,04,usb,yes,36,31 2006.230.01:52:21.63/vb/07,04,usb,yes,35,35 2006.230.01:52:21.63/vb/08,04,usb,yes,32,36 2006.230.01:52:21.87/vblo/01,629.99,yes,locked 2006.230.01:52:21.87/vblo/02,634.99,yes,locked 2006.230.01:52:21.87/vblo/03,649.99,yes,locked 2006.230.01:52:21.87/vblo/04,679.99,yes,locked 2006.230.01:52:21.87/vblo/05,709.99,yes,locked 2006.230.01:52:21.87/vblo/06,719.99,yes,locked 2006.230.01:52:21.87/vblo/07,734.99,yes,locked 2006.230.01:52:21.87/vblo/08,744.99,yes,locked 2006.230.01:52:22.02/vabw/8 2006.230.01:52:22.17/vbbw/8 2006.230.01:52:22.26/xfe/off,on,12.2 2006.230.01:52:22.63/ifatt/23,28,28,28 2006.230.01:52:23.08/fmout-gps/S +4.42E-07 2006.230.01:52:23.12:!2006.230.01:52:58 2006.230.01:52:58.00:data_valid=off 2006.230.01:52:58.00:"et 2006.230.01:52:58.00:!+3s 2006.230.01:53:01.01:"tape 2006.230.01:53:01.01:postob 2006.230.01:53:01.10/cable/+6.3899E-03 2006.230.01:53:01.10/wx/33.05,1002.6,65 2006.230.01:53:02.07/fmout-gps/S +4.43E-07 2006.230.01:53:02.08:scan_name=230-0154,jd0608,70 2006.230.01:53:02.08:source=0727-115,073019.11,-114112.6,2000.0,cw 2006.230.01:53:03.12#flagr#flagr/antenna,new-source 2006.230.01:53:03.12:checkk5 2006.230.01:53:03.75/chk_autoobs//k5ts1/ autoobs is running! 2006.230.01:53:04.18/chk_autoobs//k5ts2/ autoobs is running! 2006.230.01:53:04.87/chk_autoobs//k5ts3/ autoobs is running! 2006.230.01:53:05.28/chk_autoobs//k5ts4/ autoobs is running! 2006.230.01:53:05.69/chk_obsdata//k5ts1/T2300152??a.dat file size is correct (nominal:160MB, actual:160MB). 2006.230.01:53:06.37/chk_obsdata//k5ts2/T2300152??b.dat file size is correct (nominal:160MB, actual:160MB). 2006.230.01:53:06.78/chk_obsdata//k5ts3/T2300152??c.dat file size is correct (nominal:160MB, actual:160MB). 2006.230.01:53:07.60/chk_obsdata//k5ts4/T2300152??d.dat file size is correct (nominal:160MB, actual:160MB). 2006.230.01:53:08.64/k5log//k5ts1_log_newline 2006.230.01:53:09.47/k5log//k5ts2_log_newline 2006.230.01:53:10.49/k5log//k5ts3_log_newline 2006.230.01:53:11.31/k5log//k5ts4_log_newline 2006.230.01:53:11.34/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:53:11.34:setupk4=1 2006.230.01:53:11.34$setupk4/echo=on 2006.230.01:53:11.34$setupk4/pcalon 2006.230.01:53:11.34$pcalon/"no phase cal control is implemented here 2006.230.01:53:11.34$setupk4/"tpicd=stop 2006.230.01:53:11.34$setupk4/"rec=synch_on 2006.230.01:53:11.34$setupk4/"rec_mode=128 2006.230.01:53:11.34$setupk4/!* 2006.230.01:53:11.34$setupk4/recpk4 2006.230.01:53:11.34$recpk4/recpatch= 2006.230.01:53:11.34$recpk4/recpatch=1,a1u,2,a2u,3,a3u,4,a4u,5,a5u,6,a6u,7,a7u,8,a8u,9,b1u 2006.230.01:53:11.34$recpk4/recpatch=10,b2u,11,b3u,12,b4u,13,b5u,14,b6u,15,b7u,16,b8u 2006.230.01:53:11.34$setupk4/vck44 2006.230.01:53:11.34$vck44/valo=1,524.99 2006.230.01:53:11.34#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:53:11.34#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:53:11.34#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:11.34#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:11.34#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:11.34#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:11.34#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:53:11.34#ibcon#first serial, iclass 14, count 0 2006.230.01:53:11.34#ibcon#enter sib2, iclass 14, count 0 2006.230.01:53:11.34#ibcon#flushed, iclass 14, count 0 2006.230.01:53:11.34#ibcon#about to write, iclass 14, count 0 2006.230.01:53:11.35#ibcon#wrote, iclass 14, count 0 2006.230.01:53:11.35#ibcon#about to read 3, iclass 14, count 0 2006.230.01:53:11.38#ibcon#read 3, iclass 14, count 0 2006.230.01:53:11.38#ibcon#about to read 4, iclass 14, count 0 2006.230.01:53:11.38#ibcon#read 4, iclass 14, count 0 2006.230.01:53:11.38#ibcon#about to read 5, iclass 14, count 0 2006.230.01:53:11.38#ibcon#read 5, iclass 14, count 0 2006.230.01:53:11.38#ibcon#about to read 6, iclass 14, count 0 2006.230.01:53:11.38#ibcon#read 6, iclass 14, count 0 2006.230.01:53:11.38#ibcon#end of sib2, iclass 14, count 0 2006.230.01:53:11.38#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:53:11.38#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:53:11.38#ibcon#[26=FRQ=01,524.99\r\n] 2006.230.01:53:11.38#ibcon#*before write, iclass 14, count 0 2006.230.01:53:11.38#ibcon#enter sib2, iclass 14, count 0 2006.230.01:53:11.38#ibcon#flushed, iclass 14, count 0 2006.230.01:53:11.38#ibcon#about to write, iclass 14, count 0 2006.230.01:53:11.38#ibcon#wrote, iclass 14, count 0 2006.230.01:53:11.38#ibcon#about to read 3, iclass 14, count 0 2006.230.01:53:11.42#ibcon#read 3, iclass 14, count 0 2006.230.01:53:11.42#ibcon#about to read 4, iclass 14, count 0 2006.230.01:53:11.42#ibcon#read 4, iclass 14, count 0 2006.230.01:53:11.42#ibcon#about to read 5, iclass 14, count 0 2006.230.01:53:11.42#ibcon#read 5, iclass 14, count 0 2006.230.01:53:11.42#ibcon#about to read 6, iclass 14, count 0 2006.230.01:53:11.42#ibcon#read 6, iclass 14, count 0 2006.230.01:53:11.42#ibcon#end of sib2, iclass 14, count 0 2006.230.01:53:11.42#ibcon#*after write, iclass 14, count 0 2006.230.01:53:11.42#ibcon#*before return 0, iclass 14, count 0 2006.230.01:53:11.42#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:11.42#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:11.42#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:53:11.42#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:53:11.42$vck44/va=1,8 2006.230.01:53:11.42#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.01:53:11.42#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.01:53:11.42#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:11.42#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:11.42#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:11.42#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:11.42#ibcon#enter wrdev, iclass 16, count 2 2006.230.01:53:11.42#ibcon#first serial, iclass 16, count 2 2006.230.01:53:11.42#ibcon#enter sib2, iclass 16, count 2 2006.230.01:53:11.42#ibcon#flushed, iclass 16, count 2 2006.230.01:53:11.42#ibcon#about to write, iclass 16, count 2 2006.230.01:53:11.42#ibcon#wrote, iclass 16, count 2 2006.230.01:53:11.42#ibcon#about to read 3, iclass 16, count 2 2006.230.01:53:11.44#ibcon#read 3, iclass 16, count 2 2006.230.01:53:11.44#ibcon#about to read 4, iclass 16, count 2 2006.230.01:53:11.44#ibcon#read 4, iclass 16, count 2 2006.230.01:53:11.44#ibcon#about to read 5, iclass 16, count 2 2006.230.01:53:11.44#ibcon#read 5, iclass 16, count 2 2006.230.01:53:11.44#ibcon#about to read 6, iclass 16, count 2 2006.230.01:53:11.44#ibcon#read 6, iclass 16, count 2 2006.230.01:53:11.44#ibcon#end of sib2, iclass 16, count 2 2006.230.01:53:11.44#ibcon#*mode == 0, iclass 16, count 2 2006.230.01:53:11.44#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.01:53:11.44#ibcon#[25=AT01-08\r\n] 2006.230.01:53:11.44#ibcon#*before write, iclass 16, count 2 2006.230.01:53:11.44#ibcon#enter sib2, iclass 16, count 2 2006.230.01:53:11.44#ibcon#flushed, iclass 16, count 2 2006.230.01:53:11.44#ibcon#about to write, iclass 16, count 2 2006.230.01:53:11.44#ibcon#wrote, iclass 16, count 2 2006.230.01:53:11.44#ibcon#about to read 3, iclass 16, count 2 2006.230.01:53:11.47#ibcon#read 3, iclass 16, count 2 2006.230.01:53:11.47#ibcon#about to read 4, iclass 16, count 2 2006.230.01:53:11.47#ibcon#read 4, iclass 16, count 2 2006.230.01:53:11.47#ibcon#about to read 5, iclass 16, count 2 2006.230.01:53:11.47#ibcon#read 5, iclass 16, count 2 2006.230.01:53:11.47#ibcon#about to read 6, iclass 16, count 2 2006.230.01:53:11.47#ibcon#read 6, iclass 16, count 2 2006.230.01:53:11.47#ibcon#end of sib2, iclass 16, count 2 2006.230.01:53:11.47#ibcon#*after write, iclass 16, count 2 2006.230.01:53:11.47#ibcon#*before return 0, iclass 16, count 2 2006.230.01:53:11.47#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:11.47#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:11.47#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.01:53:11.47#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:11.47#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:11.59#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:11.59#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:11.59#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:53:11.59#ibcon#first serial, iclass 16, count 0 2006.230.01:53:11.59#ibcon#enter sib2, iclass 16, count 0 2006.230.01:53:11.59#ibcon#flushed, iclass 16, count 0 2006.230.01:53:11.59#ibcon#about to write, iclass 16, count 0 2006.230.01:53:11.59#ibcon#wrote, iclass 16, count 0 2006.230.01:53:11.59#ibcon#about to read 3, iclass 16, count 0 2006.230.01:53:11.61#ibcon#read 3, iclass 16, count 0 2006.230.01:53:11.61#ibcon#about to read 4, iclass 16, count 0 2006.230.01:53:11.61#ibcon#read 4, iclass 16, count 0 2006.230.01:53:11.61#ibcon#about to read 5, iclass 16, count 0 2006.230.01:53:11.61#ibcon#read 5, iclass 16, count 0 2006.230.01:53:11.61#ibcon#about to read 6, iclass 16, count 0 2006.230.01:53:11.61#ibcon#read 6, iclass 16, count 0 2006.230.01:53:11.61#ibcon#end of sib2, iclass 16, count 0 2006.230.01:53:11.61#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:53:11.61#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:53:11.61#ibcon#[25=USB\r\n] 2006.230.01:53:11.61#ibcon#*before write, iclass 16, count 0 2006.230.01:53:11.61#ibcon#enter sib2, iclass 16, count 0 2006.230.01:53:11.61#ibcon#flushed, iclass 16, count 0 2006.230.01:53:11.61#ibcon#about to write, iclass 16, count 0 2006.230.01:53:11.61#ibcon#wrote, iclass 16, count 0 2006.230.01:53:11.61#ibcon#about to read 3, iclass 16, count 0 2006.230.01:53:11.64#ibcon#read 3, iclass 16, count 0 2006.230.01:53:11.64#ibcon#about to read 4, iclass 16, count 0 2006.230.01:53:11.64#ibcon#read 4, iclass 16, count 0 2006.230.01:53:11.64#ibcon#about to read 5, iclass 16, count 0 2006.230.01:53:11.64#ibcon#read 5, iclass 16, count 0 2006.230.01:53:11.64#ibcon#about to read 6, iclass 16, count 0 2006.230.01:53:11.64#ibcon#read 6, iclass 16, count 0 2006.230.01:53:11.64#ibcon#end of sib2, iclass 16, count 0 2006.230.01:53:11.64#ibcon#*after write, iclass 16, count 0 2006.230.01:53:11.64#ibcon#*before return 0, iclass 16, count 0 2006.230.01:53:11.64#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:11.64#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:11.64#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:53:11.64#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:53:11.64$vck44/valo=2,534.99 2006.230.01:53:11.64#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:53:11.64#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:53:11.64#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:11.64#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:11.64#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:11.64#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:11.64#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:53:11.64#ibcon#first serial, iclass 18, count 0 2006.230.01:53:11.64#ibcon#enter sib2, iclass 18, count 0 2006.230.01:53:11.64#ibcon#flushed, iclass 18, count 0 2006.230.01:53:11.64#ibcon#about to write, iclass 18, count 0 2006.230.01:53:11.64#ibcon#wrote, iclass 18, count 0 2006.230.01:53:11.64#ibcon#about to read 3, iclass 18, count 0 2006.230.01:53:11.67#ibcon#read 3, iclass 18, count 0 2006.230.01:53:11.67#ibcon#about to read 4, iclass 18, count 0 2006.230.01:53:11.67#ibcon#read 4, iclass 18, count 0 2006.230.01:53:11.67#ibcon#about to read 5, iclass 18, count 0 2006.230.01:53:11.67#ibcon#read 5, iclass 18, count 0 2006.230.01:53:11.67#ibcon#about to read 6, iclass 18, count 0 2006.230.01:53:11.67#ibcon#read 6, iclass 18, count 0 2006.230.01:53:11.67#ibcon#end of sib2, iclass 18, count 0 2006.230.01:53:11.67#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:53:11.67#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:53:11.67#ibcon#[26=FRQ=02,534.99\r\n] 2006.230.01:53:11.67#ibcon#*before write, iclass 18, count 0 2006.230.01:53:11.67#ibcon#enter sib2, iclass 18, count 0 2006.230.01:53:11.67#ibcon#flushed, iclass 18, count 0 2006.230.01:53:11.67#ibcon#about to write, iclass 18, count 0 2006.230.01:53:11.67#ibcon#wrote, iclass 18, count 0 2006.230.01:53:11.67#ibcon#about to read 3, iclass 18, count 0 2006.230.01:53:11.71#ibcon#read 3, iclass 18, count 0 2006.230.01:53:11.71#ibcon#about to read 4, iclass 18, count 0 2006.230.01:53:11.71#ibcon#read 4, iclass 18, count 0 2006.230.01:53:11.71#ibcon#about to read 5, iclass 18, count 0 2006.230.01:53:11.71#ibcon#read 5, iclass 18, count 0 2006.230.01:53:11.71#ibcon#about to read 6, iclass 18, count 0 2006.230.01:53:11.71#ibcon#read 6, iclass 18, count 0 2006.230.01:53:11.71#ibcon#end of sib2, iclass 18, count 0 2006.230.01:53:11.71#ibcon#*after write, iclass 18, count 0 2006.230.01:53:11.71#ibcon#*before return 0, iclass 18, count 0 2006.230.01:53:11.71#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:11.71#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:11.71#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:53:11.71#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:53:11.71$vck44/va=2,7 2006.230.01:53:11.71#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.01:53:11.71#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.01:53:11.71#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:11.71#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:11.76#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:11.76#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:11.76#ibcon#enter wrdev, iclass 20, count 2 2006.230.01:53:11.76#ibcon#first serial, iclass 20, count 2 2006.230.01:53:11.76#ibcon#enter sib2, iclass 20, count 2 2006.230.01:53:11.76#ibcon#flushed, iclass 20, count 2 2006.230.01:53:11.76#ibcon#about to write, iclass 20, count 2 2006.230.01:53:11.76#ibcon#wrote, iclass 20, count 2 2006.230.01:53:11.76#ibcon#about to read 3, iclass 20, count 2 2006.230.01:53:11.78#ibcon#read 3, iclass 20, count 2 2006.230.01:53:11.78#ibcon#about to read 4, iclass 20, count 2 2006.230.01:53:11.78#ibcon#read 4, iclass 20, count 2 2006.230.01:53:11.78#ibcon#about to read 5, iclass 20, count 2 2006.230.01:53:11.78#ibcon#read 5, iclass 20, count 2 2006.230.01:53:11.78#ibcon#about to read 6, iclass 20, count 2 2006.230.01:53:11.78#ibcon#read 6, iclass 20, count 2 2006.230.01:53:11.78#ibcon#end of sib2, iclass 20, count 2 2006.230.01:53:11.78#ibcon#*mode == 0, iclass 20, count 2 2006.230.01:53:11.78#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.01:53:11.78#ibcon#[25=AT02-07\r\n] 2006.230.01:53:11.78#ibcon#*before write, iclass 20, count 2 2006.230.01:53:11.78#ibcon#enter sib2, iclass 20, count 2 2006.230.01:53:11.78#ibcon#flushed, iclass 20, count 2 2006.230.01:53:11.78#ibcon#about to write, iclass 20, count 2 2006.230.01:53:11.78#ibcon#wrote, iclass 20, count 2 2006.230.01:53:11.78#ibcon#about to read 3, iclass 20, count 2 2006.230.01:53:11.81#ibcon#read 3, iclass 20, count 2 2006.230.01:53:11.81#ibcon#about to read 4, iclass 20, count 2 2006.230.01:53:11.81#ibcon#read 4, iclass 20, count 2 2006.230.01:53:11.81#ibcon#about to read 5, iclass 20, count 2 2006.230.01:53:11.81#ibcon#read 5, iclass 20, count 2 2006.230.01:53:11.81#ibcon#about to read 6, iclass 20, count 2 2006.230.01:53:11.81#ibcon#read 6, iclass 20, count 2 2006.230.01:53:11.81#ibcon#end of sib2, iclass 20, count 2 2006.230.01:53:11.81#ibcon#*after write, iclass 20, count 2 2006.230.01:53:11.81#ibcon#*before return 0, iclass 20, count 2 2006.230.01:53:11.81#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:11.81#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:11.81#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.01:53:11.81#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:11.81#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:11.93#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:11.93#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:11.93#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:53:11.93#ibcon#first serial, iclass 20, count 0 2006.230.01:53:11.93#ibcon#enter sib2, iclass 20, count 0 2006.230.01:53:11.93#ibcon#flushed, iclass 20, count 0 2006.230.01:53:11.93#ibcon#about to write, iclass 20, count 0 2006.230.01:53:11.93#ibcon#wrote, iclass 20, count 0 2006.230.01:53:11.93#ibcon#about to read 3, iclass 20, count 0 2006.230.01:53:11.95#ibcon#read 3, iclass 20, count 0 2006.230.01:53:11.95#ibcon#about to read 4, iclass 20, count 0 2006.230.01:53:11.95#ibcon#read 4, iclass 20, count 0 2006.230.01:53:11.95#ibcon#about to read 5, iclass 20, count 0 2006.230.01:53:11.95#ibcon#read 5, iclass 20, count 0 2006.230.01:53:11.95#ibcon#about to read 6, iclass 20, count 0 2006.230.01:53:11.95#ibcon#read 6, iclass 20, count 0 2006.230.01:53:11.95#ibcon#end of sib2, iclass 20, count 0 2006.230.01:53:11.95#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:53:11.95#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:53:11.95#ibcon#[25=USB\r\n] 2006.230.01:53:11.95#ibcon#*before write, iclass 20, count 0 2006.230.01:53:11.95#ibcon#enter sib2, iclass 20, count 0 2006.230.01:53:11.95#ibcon#flushed, iclass 20, count 0 2006.230.01:53:11.95#ibcon#about to write, iclass 20, count 0 2006.230.01:53:11.95#ibcon#wrote, iclass 20, count 0 2006.230.01:53:11.95#ibcon#about to read 3, iclass 20, count 0 2006.230.01:53:11.98#ibcon#read 3, iclass 20, count 0 2006.230.01:53:11.98#ibcon#about to read 4, iclass 20, count 0 2006.230.01:53:11.98#ibcon#read 4, iclass 20, count 0 2006.230.01:53:11.98#ibcon#about to read 5, iclass 20, count 0 2006.230.01:53:11.98#ibcon#read 5, iclass 20, count 0 2006.230.01:53:11.98#ibcon#about to read 6, iclass 20, count 0 2006.230.01:53:11.98#ibcon#read 6, iclass 20, count 0 2006.230.01:53:11.98#ibcon#end of sib2, iclass 20, count 0 2006.230.01:53:11.98#ibcon#*after write, iclass 20, count 0 2006.230.01:53:11.98#ibcon#*before return 0, iclass 20, count 0 2006.230.01:53:11.98#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:11.98#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:11.98#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:53:11.98#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:53:11.98$vck44/valo=3,564.99 2006.230.01:53:11.98#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.01:53:11.98#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.01:53:11.98#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:11.98#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:11.98#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:11.98#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:11.98#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:53:11.98#ibcon#first serial, iclass 22, count 0 2006.230.01:53:11.98#ibcon#enter sib2, iclass 22, count 0 2006.230.01:53:11.98#ibcon#flushed, iclass 22, count 0 2006.230.01:53:11.98#ibcon#about to write, iclass 22, count 0 2006.230.01:53:11.98#ibcon#wrote, iclass 22, count 0 2006.230.01:53:11.98#ibcon#about to read 3, iclass 22, count 0 2006.230.01:53:12.01#ibcon#read 3, iclass 22, count 0 2006.230.01:53:12.01#ibcon#about to read 4, iclass 22, count 0 2006.230.01:53:12.01#ibcon#read 4, iclass 22, count 0 2006.230.01:53:12.01#ibcon#about to read 5, iclass 22, count 0 2006.230.01:53:12.01#ibcon#read 5, iclass 22, count 0 2006.230.01:53:12.01#ibcon#about to read 6, iclass 22, count 0 2006.230.01:53:12.01#ibcon#read 6, iclass 22, count 0 2006.230.01:53:12.01#ibcon#end of sib2, iclass 22, count 0 2006.230.01:53:12.01#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:53:12.01#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:53:12.01#ibcon#[26=FRQ=03,564.99\r\n] 2006.230.01:53:12.01#ibcon#*before write, iclass 22, count 0 2006.230.01:53:12.01#ibcon#enter sib2, iclass 22, count 0 2006.230.01:53:12.01#ibcon#flushed, iclass 22, count 0 2006.230.01:53:12.01#ibcon#about to write, iclass 22, count 0 2006.230.01:53:12.01#ibcon#wrote, iclass 22, count 0 2006.230.01:53:12.01#ibcon#about to read 3, iclass 22, count 0 2006.230.01:53:12.05#ibcon#read 3, iclass 22, count 0 2006.230.01:53:12.05#ibcon#about to read 4, iclass 22, count 0 2006.230.01:53:12.05#ibcon#read 4, iclass 22, count 0 2006.230.01:53:12.05#ibcon#about to read 5, iclass 22, count 0 2006.230.01:53:12.05#ibcon#read 5, iclass 22, count 0 2006.230.01:53:12.05#ibcon#about to read 6, iclass 22, count 0 2006.230.01:53:12.05#ibcon#read 6, iclass 22, count 0 2006.230.01:53:12.05#ibcon#end of sib2, iclass 22, count 0 2006.230.01:53:12.05#ibcon#*after write, iclass 22, count 0 2006.230.01:53:12.05#ibcon#*before return 0, iclass 22, count 0 2006.230.01:53:12.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:12.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:12.05#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:53:12.05#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:53:12.05$vck44/va=3,6 2006.230.01:53:12.05#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.01:53:12.05#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.01:53:12.05#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:12.05#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:12.10#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:12.10#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:12.10#ibcon#enter wrdev, iclass 24, count 2 2006.230.01:53:12.10#ibcon#first serial, iclass 24, count 2 2006.230.01:53:12.10#ibcon#enter sib2, iclass 24, count 2 2006.230.01:53:12.10#ibcon#flushed, iclass 24, count 2 2006.230.01:53:12.10#ibcon#about to write, iclass 24, count 2 2006.230.01:53:12.10#ibcon#wrote, iclass 24, count 2 2006.230.01:53:12.10#ibcon#about to read 3, iclass 24, count 2 2006.230.01:53:12.12#ibcon#read 3, iclass 24, count 2 2006.230.01:53:12.12#ibcon#about to read 4, iclass 24, count 2 2006.230.01:53:12.12#ibcon#read 4, iclass 24, count 2 2006.230.01:53:12.12#ibcon#about to read 5, iclass 24, count 2 2006.230.01:53:12.12#ibcon#read 5, iclass 24, count 2 2006.230.01:53:12.12#ibcon#about to read 6, iclass 24, count 2 2006.230.01:53:12.12#ibcon#read 6, iclass 24, count 2 2006.230.01:53:12.12#ibcon#end of sib2, iclass 24, count 2 2006.230.01:53:12.12#ibcon#*mode == 0, iclass 24, count 2 2006.230.01:53:12.12#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.01:53:12.12#ibcon#[25=AT03-06\r\n] 2006.230.01:53:12.12#ibcon#*before write, iclass 24, count 2 2006.230.01:53:12.12#ibcon#enter sib2, iclass 24, count 2 2006.230.01:53:12.12#ibcon#flushed, iclass 24, count 2 2006.230.01:53:12.12#ibcon#about to write, iclass 24, count 2 2006.230.01:53:12.12#ibcon#wrote, iclass 24, count 2 2006.230.01:53:12.12#ibcon#about to read 3, iclass 24, count 2 2006.230.01:53:12.15#ibcon#read 3, iclass 24, count 2 2006.230.01:53:12.15#ibcon#about to read 4, iclass 24, count 2 2006.230.01:53:12.15#ibcon#read 4, iclass 24, count 2 2006.230.01:53:12.15#ibcon#about to read 5, iclass 24, count 2 2006.230.01:53:12.15#ibcon#read 5, iclass 24, count 2 2006.230.01:53:12.15#ibcon#about to read 6, iclass 24, count 2 2006.230.01:53:12.15#ibcon#read 6, iclass 24, count 2 2006.230.01:53:12.15#ibcon#end of sib2, iclass 24, count 2 2006.230.01:53:12.15#ibcon#*after write, iclass 24, count 2 2006.230.01:53:12.15#ibcon#*before return 0, iclass 24, count 2 2006.230.01:53:12.15#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:12.15#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:12.15#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.01:53:12.15#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:12.15#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:12.27#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:12.27#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:12.27#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:53:12.27#ibcon#first serial, iclass 24, count 0 2006.230.01:53:12.27#ibcon#enter sib2, iclass 24, count 0 2006.230.01:53:12.27#ibcon#flushed, iclass 24, count 0 2006.230.01:53:12.27#ibcon#about to write, iclass 24, count 0 2006.230.01:53:12.27#ibcon#wrote, iclass 24, count 0 2006.230.01:53:12.27#ibcon#about to read 3, iclass 24, count 0 2006.230.01:53:12.29#ibcon#read 3, iclass 24, count 0 2006.230.01:53:12.29#ibcon#about to read 4, iclass 24, count 0 2006.230.01:53:12.29#ibcon#read 4, iclass 24, count 0 2006.230.01:53:12.29#ibcon#about to read 5, iclass 24, count 0 2006.230.01:53:12.29#ibcon#read 5, iclass 24, count 0 2006.230.01:53:12.29#ibcon#about to read 6, iclass 24, count 0 2006.230.01:53:12.29#ibcon#read 6, iclass 24, count 0 2006.230.01:53:12.29#ibcon#end of sib2, iclass 24, count 0 2006.230.01:53:12.29#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:53:12.29#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:53:12.29#ibcon#[25=USB\r\n] 2006.230.01:53:12.29#ibcon#*before write, iclass 24, count 0 2006.230.01:53:12.29#ibcon#enter sib2, iclass 24, count 0 2006.230.01:53:12.29#ibcon#flushed, iclass 24, count 0 2006.230.01:53:12.29#ibcon#about to write, iclass 24, count 0 2006.230.01:53:12.29#ibcon#wrote, iclass 24, count 0 2006.230.01:53:12.29#ibcon#about to read 3, iclass 24, count 0 2006.230.01:53:12.32#ibcon#read 3, iclass 24, count 0 2006.230.01:53:12.32#ibcon#about to read 4, iclass 24, count 0 2006.230.01:53:12.32#ibcon#read 4, iclass 24, count 0 2006.230.01:53:12.32#ibcon#about to read 5, iclass 24, count 0 2006.230.01:53:12.32#ibcon#read 5, iclass 24, count 0 2006.230.01:53:12.32#ibcon#about to read 6, iclass 24, count 0 2006.230.01:53:12.32#ibcon#read 6, iclass 24, count 0 2006.230.01:53:12.32#ibcon#end of sib2, iclass 24, count 0 2006.230.01:53:12.32#ibcon#*after write, iclass 24, count 0 2006.230.01:53:12.32#ibcon#*before return 0, iclass 24, count 0 2006.230.01:53:12.32#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:12.32#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:12.32#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:53:12.32#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:53:12.32$vck44/valo=4,624.99 2006.230.01:53:12.32#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.01:53:12.32#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.01:53:12.32#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:12.32#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:12.32#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:12.32#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:12.32#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:53:12.32#ibcon#first serial, iclass 26, count 0 2006.230.01:53:12.32#ibcon#enter sib2, iclass 26, count 0 2006.230.01:53:12.32#ibcon#flushed, iclass 26, count 0 2006.230.01:53:12.32#ibcon#about to write, iclass 26, count 0 2006.230.01:53:12.32#ibcon#wrote, iclass 26, count 0 2006.230.01:53:12.32#ibcon#about to read 3, iclass 26, count 0 2006.230.01:53:12.35#ibcon#read 3, iclass 26, count 0 2006.230.01:53:12.35#ibcon#about to read 4, iclass 26, count 0 2006.230.01:53:12.35#ibcon#read 4, iclass 26, count 0 2006.230.01:53:12.35#ibcon#about to read 5, iclass 26, count 0 2006.230.01:53:12.35#ibcon#read 5, iclass 26, count 0 2006.230.01:53:12.35#ibcon#about to read 6, iclass 26, count 0 2006.230.01:53:12.35#ibcon#read 6, iclass 26, count 0 2006.230.01:53:12.35#ibcon#end of sib2, iclass 26, count 0 2006.230.01:53:12.35#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:53:12.35#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:53:12.35#ibcon#[26=FRQ=04,624.99\r\n] 2006.230.01:53:12.35#ibcon#*before write, iclass 26, count 0 2006.230.01:53:12.35#ibcon#enter sib2, iclass 26, count 0 2006.230.01:53:12.35#ibcon#flushed, iclass 26, count 0 2006.230.01:53:12.35#ibcon#about to write, iclass 26, count 0 2006.230.01:53:12.35#ibcon#wrote, iclass 26, count 0 2006.230.01:53:12.35#ibcon#about to read 3, iclass 26, count 0 2006.230.01:53:12.39#ibcon#read 3, iclass 26, count 0 2006.230.01:53:12.39#ibcon#about to read 4, iclass 26, count 0 2006.230.01:53:12.39#ibcon#read 4, iclass 26, count 0 2006.230.01:53:12.39#ibcon#about to read 5, iclass 26, count 0 2006.230.01:53:12.39#ibcon#read 5, iclass 26, count 0 2006.230.01:53:12.39#ibcon#about to read 6, iclass 26, count 0 2006.230.01:53:12.39#ibcon#read 6, iclass 26, count 0 2006.230.01:53:12.39#ibcon#end of sib2, iclass 26, count 0 2006.230.01:53:12.39#ibcon#*after write, iclass 26, count 0 2006.230.01:53:12.39#ibcon#*before return 0, iclass 26, count 0 2006.230.01:53:12.39#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:12.39#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:12.39#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:53:12.39#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:53:12.39$vck44/va=4,7 2006.230.01:53:12.39#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.01:53:12.39#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.01:53:12.39#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:12.39#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:12.44#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:12.44#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:12.44#ibcon#enter wrdev, iclass 28, count 2 2006.230.01:53:12.44#ibcon#first serial, iclass 28, count 2 2006.230.01:53:12.44#ibcon#enter sib2, iclass 28, count 2 2006.230.01:53:12.44#ibcon#flushed, iclass 28, count 2 2006.230.01:53:12.44#ibcon#about to write, iclass 28, count 2 2006.230.01:53:12.44#ibcon#wrote, iclass 28, count 2 2006.230.01:53:12.44#ibcon#about to read 3, iclass 28, count 2 2006.230.01:53:12.46#ibcon#read 3, iclass 28, count 2 2006.230.01:53:12.46#ibcon#about to read 4, iclass 28, count 2 2006.230.01:53:12.46#ibcon#read 4, iclass 28, count 2 2006.230.01:53:12.46#ibcon#about to read 5, iclass 28, count 2 2006.230.01:53:12.46#ibcon#read 5, iclass 28, count 2 2006.230.01:53:12.46#ibcon#about to read 6, iclass 28, count 2 2006.230.01:53:12.46#ibcon#read 6, iclass 28, count 2 2006.230.01:53:12.46#ibcon#end of sib2, iclass 28, count 2 2006.230.01:53:12.46#ibcon#*mode == 0, iclass 28, count 2 2006.230.01:53:12.46#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.01:53:12.46#ibcon#[25=AT04-07\r\n] 2006.230.01:53:12.46#ibcon#*before write, iclass 28, count 2 2006.230.01:53:12.46#ibcon#enter sib2, iclass 28, count 2 2006.230.01:53:12.46#ibcon#flushed, iclass 28, count 2 2006.230.01:53:12.46#ibcon#about to write, iclass 28, count 2 2006.230.01:53:12.46#ibcon#wrote, iclass 28, count 2 2006.230.01:53:12.46#ibcon#about to read 3, iclass 28, count 2 2006.230.01:53:12.49#ibcon#read 3, iclass 28, count 2 2006.230.01:53:12.49#ibcon#about to read 4, iclass 28, count 2 2006.230.01:53:12.49#ibcon#read 4, iclass 28, count 2 2006.230.01:53:12.49#ibcon#about to read 5, iclass 28, count 2 2006.230.01:53:12.49#ibcon#read 5, iclass 28, count 2 2006.230.01:53:12.49#ibcon#about to read 6, iclass 28, count 2 2006.230.01:53:12.49#ibcon#read 6, iclass 28, count 2 2006.230.01:53:12.49#ibcon#end of sib2, iclass 28, count 2 2006.230.01:53:12.49#ibcon#*after write, iclass 28, count 2 2006.230.01:53:12.49#ibcon#*before return 0, iclass 28, count 2 2006.230.01:53:12.49#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:12.49#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:12.49#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.01:53:12.49#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:12.49#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:12.61#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:12.61#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:12.61#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:53:12.61#ibcon#first serial, iclass 28, count 0 2006.230.01:53:12.61#ibcon#enter sib2, iclass 28, count 0 2006.230.01:53:12.61#ibcon#flushed, iclass 28, count 0 2006.230.01:53:12.61#ibcon#about to write, iclass 28, count 0 2006.230.01:53:12.61#ibcon#wrote, iclass 28, count 0 2006.230.01:53:12.61#ibcon#about to read 3, iclass 28, count 0 2006.230.01:53:12.63#ibcon#read 3, iclass 28, count 0 2006.230.01:53:12.63#ibcon#about to read 4, iclass 28, count 0 2006.230.01:53:12.63#ibcon#read 4, iclass 28, count 0 2006.230.01:53:12.63#ibcon#about to read 5, iclass 28, count 0 2006.230.01:53:12.63#ibcon#read 5, iclass 28, count 0 2006.230.01:53:12.63#ibcon#about to read 6, iclass 28, count 0 2006.230.01:53:12.63#ibcon#read 6, iclass 28, count 0 2006.230.01:53:12.63#ibcon#end of sib2, iclass 28, count 0 2006.230.01:53:12.63#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:53:12.63#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:53:12.63#ibcon#[25=USB\r\n] 2006.230.01:53:12.63#ibcon#*before write, iclass 28, count 0 2006.230.01:53:12.63#ibcon#enter sib2, iclass 28, count 0 2006.230.01:53:12.63#ibcon#flushed, iclass 28, count 0 2006.230.01:53:12.63#ibcon#about to write, iclass 28, count 0 2006.230.01:53:12.63#ibcon#wrote, iclass 28, count 0 2006.230.01:53:12.63#ibcon#about to read 3, iclass 28, count 0 2006.230.01:53:12.66#ibcon#read 3, iclass 28, count 0 2006.230.01:53:12.66#ibcon#about to read 4, iclass 28, count 0 2006.230.01:53:12.66#ibcon#read 4, iclass 28, count 0 2006.230.01:53:12.66#ibcon#about to read 5, iclass 28, count 0 2006.230.01:53:12.66#ibcon#read 5, iclass 28, count 0 2006.230.01:53:12.66#ibcon#about to read 6, iclass 28, count 0 2006.230.01:53:12.66#ibcon#read 6, iclass 28, count 0 2006.230.01:53:12.66#ibcon#end of sib2, iclass 28, count 0 2006.230.01:53:12.66#ibcon#*after write, iclass 28, count 0 2006.230.01:53:12.66#ibcon#*before return 0, iclass 28, count 0 2006.230.01:53:12.66#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:12.66#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:12.66#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:53:12.66#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:53:12.66$vck44/valo=5,734.99 2006.230.01:53:12.66#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.01:53:12.66#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.01:53:12.66#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:12.66#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:12.66#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:12.66#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:12.66#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:53:12.66#ibcon#first serial, iclass 30, count 0 2006.230.01:53:12.66#ibcon#enter sib2, iclass 30, count 0 2006.230.01:53:12.66#ibcon#flushed, iclass 30, count 0 2006.230.01:53:12.66#ibcon#about to write, iclass 30, count 0 2006.230.01:53:12.66#ibcon#wrote, iclass 30, count 0 2006.230.01:53:12.66#ibcon#about to read 3, iclass 30, count 0 2006.230.01:53:12.68#ibcon#read 3, iclass 30, count 0 2006.230.01:53:12.68#ibcon#about to read 4, iclass 30, count 0 2006.230.01:53:12.68#ibcon#read 4, iclass 30, count 0 2006.230.01:53:12.68#ibcon#about to read 5, iclass 30, count 0 2006.230.01:53:12.68#ibcon#read 5, iclass 30, count 0 2006.230.01:53:12.68#ibcon#about to read 6, iclass 30, count 0 2006.230.01:53:12.68#ibcon#read 6, iclass 30, count 0 2006.230.01:53:12.68#ibcon#end of sib2, iclass 30, count 0 2006.230.01:53:12.68#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:53:12.68#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:53:12.68#ibcon#[26=FRQ=05,734.99\r\n] 2006.230.01:53:12.68#ibcon#*before write, iclass 30, count 0 2006.230.01:53:12.68#ibcon#enter sib2, iclass 30, count 0 2006.230.01:53:12.68#ibcon#flushed, iclass 30, count 0 2006.230.01:53:12.68#ibcon#about to write, iclass 30, count 0 2006.230.01:53:12.68#ibcon#wrote, iclass 30, count 0 2006.230.01:53:12.68#ibcon#about to read 3, iclass 30, count 0 2006.230.01:53:12.72#ibcon#read 3, iclass 30, count 0 2006.230.01:53:12.72#ibcon#about to read 4, iclass 30, count 0 2006.230.01:53:12.72#ibcon#read 4, iclass 30, count 0 2006.230.01:53:12.72#ibcon#about to read 5, iclass 30, count 0 2006.230.01:53:12.72#ibcon#read 5, iclass 30, count 0 2006.230.01:53:12.72#ibcon#about to read 6, iclass 30, count 0 2006.230.01:53:12.72#ibcon#read 6, iclass 30, count 0 2006.230.01:53:12.72#ibcon#end of sib2, iclass 30, count 0 2006.230.01:53:12.72#ibcon#*after write, iclass 30, count 0 2006.230.01:53:12.72#ibcon#*before return 0, iclass 30, count 0 2006.230.01:53:12.72#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:12.72#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:12.72#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:53:12.72#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:53:12.72$vck44/va=5,4 2006.230.01:53:12.72#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.01:53:12.72#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.01:53:12.72#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:12.72#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:12.78#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:12.78#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:12.78#ibcon#enter wrdev, iclass 32, count 2 2006.230.01:53:12.78#ibcon#first serial, iclass 32, count 2 2006.230.01:53:12.78#ibcon#enter sib2, iclass 32, count 2 2006.230.01:53:12.78#ibcon#flushed, iclass 32, count 2 2006.230.01:53:12.78#ibcon#about to write, iclass 32, count 2 2006.230.01:53:12.78#ibcon#wrote, iclass 32, count 2 2006.230.01:53:12.78#ibcon#about to read 3, iclass 32, count 2 2006.230.01:53:12.80#ibcon#read 3, iclass 32, count 2 2006.230.01:53:12.80#ibcon#about to read 4, iclass 32, count 2 2006.230.01:53:12.80#ibcon#read 4, iclass 32, count 2 2006.230.01:53:12.80#ibcon#about to read 5, iclass 32, count 2 2006.230.01:53:12.80#ibcon#read 5, iclass 32, count 2 2006.230.01:53:12.80#ibcon#about to read 6, iclass 32, count 2 2006.230.01:53:12.80#ibcon#read 6, iclass 32, count 2 2006.230.01:53:12.80#ibcon#end of sib2, iclass 32, count 2 2006.230.01:53:12.80#ibcon#*mode == 0, iclass 32, count 2 2006.230.01:53:12.80#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.01:53:12.80#ibcon#[25=AT05-04\r\n] 2006.230.01:53:12.80#ibcon#*before write, iclass 32, count 2 2006.230.01:53:12.80#ibcon#enter sib2, iclass 32, count 2 2006.230.01:53:12.80#ibcon#flushed, iclass 32, count 2 2006.230.01:53:12.80#ibcon#about to write, iclass 32, count 2 2006.230.01:53:12.80#ibcon#wrote, iclass 32, count 2 2006.230.01:53:12.80#ibcon#about to read 3, iclass 32, count 2 2006.230.01:53:12.83#ibcon#read 3, iclass 32, count 2 2006.230.01:53:12.83#ibcon#about to read 4, iclass 32, count 2 2006.230.01:53:12.83#ibcon#read 4, iclass 32, count 2 2006.230.01:53:12.83#ibcon#about to read 5, iclass 32, count 2 2006.230.01:53:12.83#ibcon#read 5, iclass 32, count 2 2006.230.01:53:12.83#ibcon#about to read 6, iclass 32, count 2 2006.230.01:53:12.83#ibcon#read 6, iclass 32, count 2 2006.230.01:53:12.83#ibcon#end of sib2, iclass 32, count 2 2006.230.01:53:12.83#ibcon#*after write, iclass 32, count 2 2006.230.01:53:12.83#ibcon#*before return 0, iclass 32, count 2 2006.230.01:53:12.83#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:12.83#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:12.83#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.01:53:12.83#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:12.83#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:12.95#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:12.95#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:12.95#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:53:12.95#ibcon#first serial, iclass 32, count 0 2006.230.01:53:12.95#ibcon#enter sib2, iclass 32, count 0 2006.230.01:53:12.95#ibcon#flushed, iclass 32, count 0 2006.230.01:53:12.95#ibcon#about to write, iclass 32, count 0 2006.230.01:53:12.95#ibcon#wrote, iclass 32, count 0 2006.230.01:53:12.95#ibcon#about to read 3, iclass 32, count 0 2006.230.01:53:12.97#ibcon#read 3, iclass 32, count 0 2006.230.01:53:12.97#ibcon#about to read 4, iclass 32, count 0 2006.230.01:53:12.97#ibcon#read 4, iclass 32, count 0 2006.230.01:53:12.97#ibcon#about to read 5, iclass 32, count 0 2006.230.01:53:12.97#ibcon#read 5, iclass 32, count 0 2006.230.01:53:12.97#ibcon#about to read 6, iclass 32, count 0 2006.230.01:53:12.97#ibcon#read 6, iclass 32, count 0 2006.230.01:53:12.97#ibcon#end of sib2, iclass 32, count 0 2006.230.01:53:12.97#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:53:12.97#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:53:12.97#ibcon#[25=USB\r\n] 2006.230.01:53:12.97#ibcon#*before write, iclass 32, count 0 2006.230.01:53:12.97#ibcon#enter sib2, iclass 32, count 0 2006.230.01:53:12.97#ibcon#flushed, iclass 32, count 0 2006.230.01:53:12.97#ibcon#about to write, iclass 32, count 0 2006.230.01:53:12.97#ibcon#wrote, iclass 32, count 0 2006.230.01:53:12.97#ibcon#about to read 3, iclass 32, count 0 2006.230.01:53:13.00#ibcon#read 3, iclass 32, count 0 2006.230.01:53:13.00#ibcon#about to read 4, iclass 32, count 0 2006.230.01:53:13.00#ibcon#read 4, iclass 32, count 0 2006.230.01:53:13.00#ibcon#about to read 5, iclass 32, count 0 2006.230.01:53:13.00#ibcon#read 5, iclass 32, count 0 2006.230.01:53:13.00#ibcon#about to read 6, iclass 32, count 0 2006.230.01:53:13.00#ibcon#read 6, iclass 32, count 0 2006.230.01:53:13.00#ibcon#end of sib2, iclass 32, count 0 2006.230.01:53:13.00#ibcon#*after write, iclass 32, count 0 2006.230.01:53:13.00#ibcon#*before return 0, iclass 32, count 0 2006.230.01:53:13.00#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:13.00#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:13.00#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:53:13.00#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:53:13.00$vck44/valo=6,814.99 2006.230.01:53:13.00#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:53:13.00#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:53:13.00#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:13.00#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:13.00#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:13.00#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:13.00#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:53:13.00#ibcon#first serial, iclass 34, count 0 2006.230.01:53:13.00#ibcon#enter sib2, iclass 34, count 0 2006.230.01:53:13.00#ibcon#flushed, iclass 34, count 0 2006.230.01:53:13.00#ibcon#about to write, iclass 34, count 0 2006.230.01:53:13.00#ibcon#wrote, iclass 34, count 0 2006.230.01:53:13.00#ibcon#about to read 3, iclass 34, count 0 2006.230.01:53:13.03#ibcon#read 3, iclass 34, count 0 2006.230.01:53:13.03#ibcon#about to read 4, iclass 34, count 0 2006.230.01:53:13.03#ibcon#read 4, iclass 34, count 0 2006.230.01:53:13.03#ibcon#about to read 5, iclass 34, count 0 2006.230.01:53:13.03#ibcon#read 5, iclass 34, count 0 2006.230.01:53:13.03#ibcon#about to read 6, iclass 34, count 0 2006.230.01:53:13.03#ibcon#read 6, iclass 34, count 0 2006.230.01:53:13.03#ibcon#end of sib2, iclass 34, count 0 2006.230.01:53:13.03#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:53:13.03#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:53:13.03#ibcon#[26=FRQ=06,814.99\r\n] 2006.230.01:53:13.03#ibcon#*before write, iclass 34, count 0 2006.230.01:53:13.03#ibcon#enter sib2, iclass 34, count 0 2006.230.01:53:13.03#ibcon#flushed, iclass 34, count 0 2006.230.01:53:13.03#ibcon#about to write, iclass 34, count 0 2006.230.01:53:13.03#ibcon#wrote, iclass 34, count 0 2006.230.01:53:13.03#ibcon#about to read 3, iclass 34, count 0 2006.230.01:53:13.07#ibcon#read 3, iclass 34, count 0 2006.230.01:53:13.07#ibcon#about to read 4, iclass 34, count 0 2006.230.01:53:13.07#ibcon#read 4, iclass 34, count 0 2006.230.01:53:13.07#ibcon#about to read 5, iclass 34, count 0 2006.230.01:53:13.07#ibcon#read 5, iclass 34, count 0 2006.230.01:53:13.07#ibcon#about to read 6, iclass 34, count 0 2006.230.01:53:13.07#ibcon#read 6, iclass 34, count 0 2006.230.01:53:13.07#ibcon#end of sib2, iclass 34, count 0 2006.230.01:53:13.07#ibcon#*after write, iclass 34, count 0 2006.230.01:53:13.07#ibcon#*before return 0, iclass 34, count 0 2006.230.01:53:13.07#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:13.07#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:13.07#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:53:13.07#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:53:13.07$vck44/va=6,4 2006.230.01:53:13.07#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.01:53:13.07#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.01:53:13.07#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:13.07#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:13.12#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:13.12#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:13.12#ibcon#enter wrdev, iclass 36, count 2 2006.230.01:53:13.12#ibcon#first serial, iclass 36, count 2 2006.230.01:53:13.12#ibcon#enter sib2, iclass 36, count 2 2006.230.01:53:13.12#ibcon#flushed, iclass 36, count 2 2006.230.01:53:13.12#ibcon#about to write, iclass 36, count 2 2006.230.01:53:13.12#ibcon#wrote, iclass 36, count 2 2006.230.01:53:13.12#ibcon#about to read 3, iclass 36, count 2 2006.230.01:53:13.14#ibcon#read 3, iclass 36, count 2 2006.230.01:53:13.14#ibcon#about to read 4, iclass 36, count 2 2006.230.01:53:13.14#ibcon#read 4, iclass 36, count 2 2006.230.01:53:13.14#ibcon#about to read 5, iclass 36, count 2 2006.230.01:53:13.14#ibcon#read 5, iclass 36, count 2 2006.230.01:53:13.14#ibcon#about to read 6, iclass 36, count 2 2006.230.01:53:13.14#ibcon#read 6, iclass 36, count 2 2006.230.01:53:13.14#ibcon#end of sib2, iclass 36, count 2 2006.230.01:53:13.14#ibcon#*mode == 0, iclass 36, count 2 2006.230.01:53:13.14#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.01:53:13.14#ibcon#[25=AT06-04\r\n] 2006.230.01:53:13.14#ibcon#*before write, iclass 36, count 2 2006.230.01:53:13.14#ibcon#enter sib2, iclass 36, count 2 2006.230.01:53:13.14#ibcon#flushed, iclass 36, count 2 2006.230.01:53:13.14#ibcon#about to write, iclass 36, count 2 2006.230.01:53:13.14#ibcon#wrote, iclass 36, count 2 2006.230.01:53:13.14#ibcon#about to read 3, iclass 36, count 2 2006.230.01:53:13.17#ibcon#read 3, iclass 36, count 2 2006.230.01:53:13.17#ibcon#about to read 4, iclass 36, count 2 2006.230.01:53:13.17#ibcon#read 4, iclass 36, count 2 2006.230.01:53:13.17#ibcon#about to read 5, iclass 36, count 2 2006.230.01:53:13.17#ibcon#read 5, iclass 36, count 2 2006.230.01:53:13.17#ibcon#about to read 6, iclass 36, count 2 2006.230.01:53:13.17#ibcon#read 6, iclass 36, count 2 2006.230.01:53:13.17#ibcon#end of sib2, iclass 36, count 2 2006.230.01:53:13.17#ibcon#*after write, iclass 36, count 2 2006.230.01:53:13.17#ibcon#*before return 0, iclass 36, count 2 2006.230.01:53:13.17#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:13.17#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:13.17#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.01:53:13.17#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:13.17#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:13.29#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:13.29#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:13.29#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:53:13.29#ibcon#first serial, iclass 36, count 0 2006.230.01:53:13.29#ibcon#enter sib2, iclass 36, count 0 2006.230.01:53:13.29#ibcon#flushed, iclass 36, count 0 2006.230.01:53:13.29#ibcon#about to write, iclass 36, count 0 2006.230.01:53:13.29#ibcon#wrote, iclass 36, count 0 2006.230.01:53:13.29#ibcon#about to read 3, iclass 36, count 0 2006.230.01:53:13.31#ibcon#read 3, iclass 36, count 0 2006.230.01:53:13.31#ibcon#about to read 4, iclass 36, count 0 2006.230.01:53:13.31#ibcon#read 4, iclass 36, count 0 2006.230.01:53:13.31#ibcon#about to read 5, iclass 36, count 0 2006.230.01:53:13.31#ibcon#read 5, iclass 36, count 0 2006.230.01:53:13.31#ibcon#about to read 6, iclass 36, count 0 2006.230.01:53:13.31#ibcon#read 6, iclass 36, count 0 2006.230.01:53:13.31#ibcon#end of sib2, iclass 36, count 0 2006.230.01:53:13.31#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:53:13.31#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:53:13.31#ibcon#[25=USB\r\n] 2006.230.01:53:13.31#ibcon#*before write, iclass 36, count 0 2006.230.01:53:13.31#ibcon#enter sib2, iclass 36, count 0 2006.230.01:53:13.31#ibcon#flushed, iclass 36, count 0 2006.230.01:53:13.31#ibcon#about to write, iclass 36, count 0 2006.230.01:53:13.31#ibcon#wrote, iclass 36, count 0 2006.230.01:53:13.31#ibcon#about to read 3, iclass 36, count 0 2006.230.01:53:13.34#ibcon#read 3, iclass 36, count 0 2006.230.01:53:13.34#ibcon#about to read 4, iclass 36, count 0 2006.230.01:53:13.34#ibcon#read 4, iclass 36, count 0 2006.230.01:53:13.34#ibcon#about to read 5, iclass 36, count 0 2006.230.01:53:13.34#ibcon#read 5, iclass 36, count 0 2006.230.01:53:13.34#ibcon#about to read 6, iclass 36, count 0 2006.230.01:53:13.34#ibcon#read 6, iclass 36, count 0 2006.230.01:53:13.34#ibcon#end of sib2, iclass 36, count 0 2006.230.01:53:13.34#ibcon#*after write, iclass 36, count 0 2006.230.01:53:13.34#ibcon#*before return 0, iclass 36, count 0 2006.230.01:53:13.34#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:13.34#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:13.34#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:53:13.34#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:53:13.34$vck44/valo=7,864.99 2006.230.01:53:13.34#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.01:53:13.34#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.01:53:13.34#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:13.34#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:13.34#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:13.34#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:13.34#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:53:13.34#ibcon#first serial, iclass 38, count 0 2006.230.01:53:13.34#ibcon#enter sib2, iclass 38, count 0 2006.230.01:53:13.34#ibcon#flushed, iclass 38, count 0 2006.230.01:53:13.34#ibcon#about to write, iclass 38, count 0 2006.230.01:53:13.34#ibcon#wrote, iclass 38, count 0 2006.230.01:53:13.34#ibcon#about to read 3, iclass 38, count 0 2006.230.01:53:13.36#ibcon#read 3, iclass 38, count 0 2006.230.01:53:13.36#ibcon#about to read 4, iclass 38, count 0 2006.230.01:53:13.36#ibcon#read 4, iclass 38, count 0 2006.230.01:53:13.36#ibcon#about to read 5, iclass 38, count 0 2006.230.01:53:13.36#ibcon#read 5, iclass 38, count 0 2006.230.01:53:13.36#ibcon#about to read 6, iclass 38, count 0 2006.230.01:53:13.36#ibcon#read 6, iclass 38, count 0 2006.230.01:53:13.36#ibcon#end of sib2, iclass 38, count 0 2006.230.01:53:13.36#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:53:13.36#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:53:13.36#ibcon#[26=FRQ=07,864.99\r\n] 2006.230.01:53:13.36#ibcon#*before write, iclass 38, count 0 2006.230.01:53:13.36#ibcon#enter sib2, iclass 38, count 0 2006.230.01:53:13.36#ibcon#flushed, iclass 38, count 0 2006.230.01:53:13.36#ibcon#about to write, iclass 38, count 0 2006.230.01:53:13.36#ibcon#wrote, iclass 38, count 0 2006.230.01:53:13.36#ibcon#about to read 3, iclass 38, count 0 2006.230.01:53:13.40#ibcon#read 3, iclass 38, count 0 2006.230.01:53:13.40#ibcon#about to read 4, iclass 38, count 0 2006.230.01:53:13.40#ibcon#read 4, iclass 38, count 0 2006.230.01:53:13.40#ibcon#about to read 5, iclass 38, count 0 2006.230.01:53:13.40#ibcon#read 5, iclass 38, count 0 2006.230.01:53:13.40#ibcon#about to read 6, iclass 38, count 0 2006.230.01:53:13.40#ibcon#read 6, iclass 38, count 0 2006.230.01:53:13.40#ibcon#end of sib2, iclass 38, count 0 2006.230.01:53:13.40#ibcon#*after write, iclass 38, count 0 2006.230.01:53:13.40#ibcon#*before return 0, iclass 38, count 0 2006.230.01:53:13.40#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:13.40#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:13.40#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:53:13.40#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:53:13.40$vck44/va=7,5 2006.230.01:53:13.40#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.01:53:13.40#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.01:53:13.40#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:13.40#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:13.46#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:13.46#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:13.46#ibcon#enter wrdev, iclass 40, count 2 2006.230.01:53:13.46#ibcon#first serial, iclass 40, count 2 2006.230.01:53:13.46#ibcon#enter sib2, iclass 40, count 2 2006.230.01:53:13.46#ibcon#flushed, iclass 40, count 2 2006.230.01:53:13.46#ibcon#about to write, iclass 40, count 2 2006.230.01:53:13.46#ibcon#wrote, iclass 40, count 2 2006.230.01:53:13.46#ibcon#about to read 3, iclass 40, count 2 2006.230.01:53:13.48#ibcon#read 3, iclass 40, count 2 2006.230.01:53:13.48#ibcon#about to read 4, iclass 40, count 2 2006.230.01:53:13.48#ibcon#read 4, iclass 40, count 2 2006.230.01:53:13.48#ibcon#about to read 5, iclass 40, count 2 2006.230.01:53:13.48#ibcon#read 5, iclass 40, count 2 2006.230.01:53:13.48#ibcon#about to read 6, iclass 40, count 2 2006.230.01:53:13.48#ibcon#read 6, iclass 40, count 2 2006.230.01:53:13.48#ibcon#end of sib2, iclass 40, count 2 2006.230.01:53:13.48#ibcon#*mode == 0, iclass 40, count 2 2006.230.01:53:13.48#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.01:53:13.48#ibcon#[25=AT07-05\r\n] 2006.230.01:53:13.48#ibcon#*before write, iclass 40, count 2 2006.230.01:53:13.48#ibcon#enter sib2, iclass 40, count 2 2006.230.01:53:13.48#ibcon#flushed, iclass 40, count 2 2006.230.01:53:13.48#ibcon#about to write, iclass 40, count 2 2006.230.01:53:13.48#ibcon#wrote, iclass 40, count 2 2006.230.01:53:13.48#ibcon#about to read 3, iclass 40, count 2 2006.230.01:53:13.51#ibcon#read 3, iclass 40, count 2 2006.230.01:53:13.51#ibcon#about to read 4, iclass 40, count 2 2006.230.01:53:13.51#ibcon#read 4, iclass 40, count 2 2006.230.01:53:13.51#ibcon#about to read 5, iclass 40, count 2 2006.230.01:53:13.51#ibcon#read 5, iclass 40, count 2 2006.230.01:53:13.51#ibcon#about to read 6, iclass 40, count 2 2006.230.01:53:13.51#ibcon#read 6, iclass 40, count 2 2006.230.01:53:13.51#ibcon#end of sib2, iclass 40, count 2 2006.230.01:53:13.51#ibcon#*after write, iclass 40, count 2 2006.230.01:53:13.51#ibcon#*before return 0, iclass 40, count 2 2006.230.01:53:13.51#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:13.51#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:13.51#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.01:53:13.51#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:13.51#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:13.63#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:13.63#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:13.63#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:53:13.63#ibcon#first serial, iclass 40, count 0 2006.230.01:53:13.63#ibcon#enter sib2, iclass 40, count 0 2006.230.01:53:13.63#ibcon#flushed, iclass 40, count 0 2006.230.01:53:13.63#ibcon#about to write, iclass 40, count 0 2006.230.01:53:13.63#ibcon#wrote, iclass 40, count 0 2006.230.01:53:13.63#ibcon#about to read 3, iclass 40, count 0 2006.230.01:53:13.65#ibcon#read 3, iclass 40, count 0 2006.230.01:53:13.65#ibcon#about to read 4, iclass 40, count 0 2006.230.01:53:13.65#ibcon#read 4, iclass 40, count 0 2006.230.01:53:13.65#ibcon#about to read 5, iclass 40, count 0 2006.230.01:53:13.65#ibcon#read 5, iclass 40, count 0 2006.230.01:53:13.65#ibcon#about to read 6, iclass 40, count 0 2006.230.01:53:13.65#ibcon#read 6, iclass 40, count 0 2006.230.01:53:13.65#ibcon#end of sib2, iclass 40, count 0 2006.230.01:53:13.65#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:53:13.65#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:53:13.65#ibcon#[25=USB\r\n] 2006.230.01:53:13.65#ibcon#*before write, iclass 40, count 0 2006.230.01:53:13.65#ibcon#enter sib2, iclass 40, count 0 2006.230.01:53:13.65#ibcon#flushed, iclass 40, count 0 2006.230.01:53:13.65#ibcon#about to write, iclass 40, count 0 2006.230.01:53:13.65#ibcon#wrote, iclass 40, count 0 2006.230.01:53:13.65#ibcon#about to read 3, iclass 40, count 0 2006.230.01:53:13.68#ibcon#read 3, iclass 40, count 0 2006.230.01:53:13.68#ibcon#about to read 4, iclass 40, count 0 2006.230.01:53:13.68#ibcon#read 4, iclass 40, count 0 2006.230.01:53:13.68#ibcon#about to read 5, iclass 40, count 0 2006.230.01:53:13.68#ibcon#read 5, iclass 40, count 0 2006.230.01:53:13.68#ibcon#about to read 6, iclass 40, count 0 2006.230.01:53:13.68#ibcon#read 6, iclass 40, count 0 2006.230.01:53:13.68#ibcon#end of sib2, iclass 40, count 0 2006.230.01:53:13.68#ibcon#*after write, iclass 40, count 0 2006.230.01:53:13.68#ibcon#*before return 0, iclass 40, count 0 2006.230.01:53:13.68#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:13.68#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:13.68#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:53:13.68#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:53:13.68$vck44/valo=8,884.99 2006.230.01:53:13.68#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.01:53:13.68#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.01:53:13.68#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:13.68#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:13.68#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:13.68#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:13.68#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:53:13.68#ibcon#first serial, iclass 4, count 0 2006.230.01:53:13.68#ibcon#enter sib2, iclass 4, count 0 2006.230.01:53:13.68#ibcon#flushed, iclass 4, count 0 2006.230.01:53:13.68#ibcon#about to write, iclass 4, count 0 2006.230.01:53:13.68#ibcon#wrote, iclass 4, count 0 2006.230.01:53:13.68#ibcon#about to read 3, iclass 4, count 0 2006.230.01:53:13.71#ibcon#read 3, iclass 4, count 0 2006.230.01:53:13.71#ibcon#about to read 4, iclass 4, count 0 2006.230.01:53:13.71#ibcon#read 4, iclass 4, count 0 2006.230.01:53:13.71#ibcon#about to read 5, iclass 4, count 0 2006.230.01:53:13.71#ibcon#read 5, iclass 4, count 0 2006.230.01:53:13.71#ibcon#about to read 6, iclass 4, count 0 2006.230.01:53:13.71#ibcon#read 6, iclass 4, count 0 2006.230.01:53:13.71#ibcon#end of sib2, iclass 4, count 0 2006.230.01:53:13.71#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:53:13.71#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:53:13.71#ibcon#[26=FRQ=08,884.99\r\n] 2006.230.01:53:13.71#ibcon#*before write, iclass 4, count 0 2006.230.01:53:13.71#ibcon#enter sib2, iclass 4, count 0 2006.230.01:53:13.71#ibcon#flushed, iclass 4, count 0 2006.230.01:53:13.71#ibcon#about to write, iclass 4, count 0 2006.230.01:53:13.71#ibcon#wrote, iclass 4, count 0 2006.230.01:53:13.71#ibcon#about to read 3, iclass 4, count 0 2006.230.01:53:13.75#ibcon#read 3, iclass 4, count 0 2006.230.01:53:13.75#ibcon#about to read 4, iclass 4, count 0 2006.230.01:53:13.75#ibcon#read 4, iclass 4, count 0 2006.230.01:53:13.75#ibcon#about to read 5, iclass 4, count 0 2006.230.01:53:13.75#ibcon#read 5, iclass 4, count 0 2006.230.01:53:13.75#ibcon#about to read 6, iclass 4, count 0 2006.230.01:53:13.75#ibcon#read 6, iclass 4, count 0 2006.230.01:53:13.75#ibcon#end of sib2, iclass 4, count 0 2006.230.01:53:13.75#ibcon#*after write, iclass 4, count 0 2006.230.01:53:13.75#ibcon#*before return 0, iclass 4, count 0 2006.230.01:53:13.75#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:13.75#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:13.75#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:53:13.75#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:53:13.75$vck44/va=8,6 2006.230.01:53:13.75#ibcon#iclass 6 nclrec 2 cls_cnt 3 2006.230.01:53:13.75#ibcon#iclass 6 iclrec 1 cls_cnt 3 2006.230.01:53:13.75#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:13.75#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:53:13.80#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:53:13.80#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:53:13.80#ibcon#enter wrdev, iclass 6, count 2 2006.230.01:53:13.80#ibcon#first serial, iclass 6, count 2 2006.230.01:53:13.80#ibcon#enter sib2, iclass 6, count 2 2006.230.01:53:13.80#ibcon#flushed, iclass 6, count 2 2006.230.01:53:13.80#ibcon#about to write, iclass 6, count 2 2006.230.01:53:13.80#ibcon#wrote, iclass 6, count 2 2006.230.01:53:13.80#ibcon#about to read 3, iclass 6, count 2 2006.230.01:53:13.82#ibcon#read 3, iclass 6, count 2 2006.230.01:53:13.82#ibcon#about to read 4, iclass 6, count 2 2006.230.01:53:13.82#ibcon#read 4, iclass 6, count 2 2006.230.01:53:13.82#ibcon#about to read 5, iclass 6, count 2 2006.230.01:53:13.82#ibcon#read 5, iclass 6, count 2 2006.230.01:53:13.82#ibcon#about to read 6, iclass 6, count 2 2006.230.01:53:13.82#ibcon#read 6, iclass 6, count 2 2006.230.01:53:13.82#ibcon#end of sib2, iclass 6, count 2 2006.230.01:53:13.82#ibcon#*mode == 0, iclass 6, count 2 2006.230.01:53:13.82#ibcon#*mode == 0 && serial, iclass 6, count 2 2006.230.01:53:13.82#ibcon#[25=AT08-06\r\n] 2006.230.01:53:13.82#ibcon#*before write, iclass 6, count 2 2006.230.01:53:13.82#ibcon#enter sib2, iclass 6, count 2 2006.230.01:53:13.82#ibcon#flushed, iclass 6, count 2 2006.230.01:53:13.82#ibcon#about to write, iclass 6, count 2 2006.230.01:53:13.82#ibcon#wrote, iclass 6, count 2 2006.230.01:53:13.82#ibcon#about to read 3, iclass 6, count 2 2006.230.01:53:13.85#ibcon#read 3, iclass 6, count 2 2006.230.01:53:13.85#ibcon#about to read 4, iclass 6, count 2 2006.230.01:53:13.85#ibcon#read 4, iclass 6, count 2 2006.230.01:53:13.85#ibcon#about to read 5, iclass 6, count 2 2006.230.01:53:13.85#ibcon#read 5, iclass 6, count 2 2006.230.01:53:13.85#ibcon#about to read 6, iclass 6, count 2 2006.230.01:53:13.85#ibcon#read 6, iclass 6, count 2 2006.230.01:53:13.85#ibcon#end of sib2, iclass 6, count 2 2006.230.01:53:13.85#ibcon#*after write, iclass 6, count 2 2006.230.01:53:13.85#ibcon#*before return 0, iclass 6, count 2 2006.230.01:53:13.85#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:53:13.85#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 2 2006.230.01:53:13.85#ibcon#iclass 6 iclrec 2 cls_cnt 2 2006.230.01:53:13.85#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:13.85#ibcon#before find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:53:13.97#ibcon#after find_delay mode 2, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:53:13.97#ibcon#before mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:53:13.97#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:53:13.97#ibcon#first serial, iclass 6, count 0 2006.230.01:53:13.97#ibcon#enter sib2, iclass 6, count 0 2006.230.01:53:13.97#ibcon#flushed, iclass 6, count 0 2006.230.01:53:13.97#ibcon#about to write, iclass 6, count 0 2006.230.01:53:13.97#ibcon#wrote, iclass 6, count 0 2006.230.01:53:13.97#ibcon#about to read 3, iclass 6, count 0 2006.230.01:53:13.99#ibcon#read 3, iclass 6, count 0 2006.230.01:53:13.99#ibcon#about to read 4, iclass 6, count 0 2006.230.01:53:13.99#ibcon#read 4, iclass 6, count 0 2006.230.01:53:13.99#ibcon#about to read 5, iclass 6, count 0 2006.230.01:53:13.99#ibcon#read 5, iclass 6, count 0 2006.230.01:53:13.99#ibcon#about to read 6, iclass 6, count 0 2006.230.01:53:13.99#ibcon#read 6, iclass 6, count 0 2006.230.01:53:13.99#ibcon#end of sib2, iclass 6, count 0 2006.230.01:53:13.99#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:53:13.99#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:53:13.99#ibcon#[25=USB\r\n] 2006.230.01:53:13.99#ibcon#*before write, iclass 6, count 0 2006.230.01:53:13.99#ibcon#enter sib2, iclass 6, count 0 2006.230.01:53:13.99#ibcon#flushed, iclass 6, count 0 2006.230.01:53:13.99#ibcon#about to write, iclass 6, count 0 2006.230.01:53:13.99#ibcon#wrote, iclass 6, count 0 2006.230.01:53:13.99#ibcon#about to read 3, iclass 6, count 0 2006.230.01:53:14.02#ibcon#read 3, iclass 6, count 0 2006.230.01:53:14.02#ibcon#about to read 4, iclass 6, count 0 2006.230.01:53:14.02#ibcon#read 4, iclass 6, count 0 2006.230.01:53:14.02#ibcon#about to read 5, iclass 6, count 0 2006.230.01:53:14.02#ibcon#read 5, iclass 6, count 0 2006.230.01:53:14.02#ibcon#about to read 6, iclass 6, count 0 2006.230.01:53:14.02#ibcon#read 6, iclass 6, count 0 2006.230.01:53:14.02#ibcon#end of sib2, iclass 6, count 0 2006.230.01:53:14.02#ibcon#*after write, iclass 6, count 0 2006.230.01:53:14.02#ibcon#*before return 0, iclass 6, count 0 2006.230.01:53:14.02#ibcon#after mode 2 write, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:53:14.02#ibcon#end of loop, iclass 6 iclrec 2 cls_cnt 0 2006.230.01:53:14.02#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:53:14.02#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:53:14.02$vck44/vblo=1,629.99 2006.230.01:53:14.02#ibcon#iclass 10 nclrec 1 cls_cnt 2 2006.230.01:53:14.02#ibcon#iclass 10 iclrec 1 cls_cnt 2 2006.230.01:53:14.02#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:14.02#ibcon#before find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:53:14.02#ibcon#after find_delay mode 2, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:53:14.02#ibcon#before mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:53:14.02#ibcon#enter wrdev, iclass 10, count 0 2006.230.01:53:14.02#ibcon#first serial, iclass 10, count 0 2006.230.01:53:14.02#ibcon#enter sib2, iclass 10, count 0 2006.230.01:53:14.02#ibcon#flushed, iclass 10, count 0 2006.230.01:53:14.02#ibcon#about to write, iclass 10, count 0 2006.230.01:53:14.02#ibcon#wrote, iclass 10, count 0 2006.230.01:53:14.02#ibcon#about to read 3, iclass 10, count 0 2006.230.01:53:14.04#ibcon#read 3, iclass 10, count 0 2006.230.01:53:14.04#ibcon#about to read 4, iclass 10, count 0 2006.230.01:53:14.04#ibcon#read 4, iclass 10, count 0 2006.230.01:53:14.04#ibcon#about to read 5, iclass 10, count 0 2006.230.01:53:14.04#ibcon#read 5, iclass 10, count 0 2006.230.01:53:14.04#ibcon#about to read 6, iclass 10, count 0 2006.230.01:53:14.04#ibcon#read 6, iclass 10, count 0 2006.230.01:53:14.04#ibcon#end of sib2, iclass 10, count 0 2006.230.01:53:14.04#ibcon#*mode == 0, iclass 10, count 0 2006.230.01:53:14.04#ibcon#*mode == 0 && serial, iclass 10, count 0 2006.230.01:53:14.04#ibcon#[28=FRQ=01,629.99\r\n] 2006.230.01:53:14.04#ibcon#*before write, iclass 10, count 0 2006.230.01:53:14.04#ibcon#enter sib2, iclass 10, count 0 2006.230.01:53:14.04#ibcon#flushed, iclass 10, count 0 2006.230.01:53:14.04#ibcon#about to write, iclass 10, count 0 2006.230.01:53:14.04#ibcon#wrote, iclass 10, count 0 2006.230.01:53:14.04#ibcon#about to read 3, iclass 10, count 0 2006.230.01:53:14.08#ibcon#read 3, iclass 10, count 0 2006.230.01:53:14.08#ibcon#about to read 4, iclass 10, count 0 2006.230.01:53:14.08#ibcon#read 4, iclass 10, count 0 2006.230.01:53:14.08#ibcon#about to read 5, iclass 10, count 0 2006.230.01:53:14.08#ibcon#read 5, iclass 10, count 0 2006.230.01:53:14.08#ibcon#about to read 6, iclass 10, count 0 2006.230.01:53:14.08#ibcon#read 6, iclass 10, count 0 2006.230.01:53:14.08#ibcon#end of sib2, iclass 10, count 0 2006.230.01:53:14.08#ibcon#*after write, iclass 10, count 0 2006.230.01:53:14.08#ibcon#*before return 0, iclass 10, count 0 2006.230.01:53:14.08#ibcon#after mode 2 write, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:53:14.08#ibcon#end of loop, iclass 10 iclrec 1 cls_cnt 0 2006.230.01:53:14.08#ibcon#about to clear, iclass 10 cls_cnt 0 2006.230.01:53:14.08#ibcon#cleared, iclass 10 cls_cnt 0 2006.230.01:53:14.08$vck44/vb=1,4 2006.230.01:53:14.08#ibcon#iclass 12 nclrec 2 cls_cnt 3 2006.230.01:53:14.08#ibcon#iclass 12 iclrec 1 cls_cnt 3 2006.230.01:53:14.08#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:14.08#ibcon#before find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:53:14.08#ibcon#after find_delay mode 2, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:53:14.08#ibcon#before mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:53:14.08#ibcon#enter wrdev, iclass 12, count 2 2006.230.01:53:14.08#ibcon#first serial, iclass 12, count 2 2006.230.01:53:14.08#ibcon#enter sib2, iclass 12, count 2 2006.230.01:53:14.08#ibcon#flushed, iclass 12, count 2 2006.230.01:53:14.08#ibcon#about to write, iclass 12, count 2 2006.230.01:53:14.08#ibcon#wrote, iclass 12, count 2 2006.230.01:53:14.08#ibcon#about to read 3, iclass 12, count 2 2006.230.01:53:14.10#ibcon#read 3, iclass 12, count 2 2006.230.01:53:14.10#ibcon#about to read 4, iclass 12, count 2 2006.230.01:53:14.10#ibcon#read 4, iclass 12, count 2 2006.230.01:53:14.10#ibcon#about to read 5, iclass 12, count 2 2006.230.01:53:14.10#ibcon#read 5, iclass 12, count 2 2006.230.01:53:14.10#ibcon#about to read 6, iclass 12, count 2 2006.230.01:53:14.10#ibcon#read 6, iclass 12, count 2 2006.230.01:53:14.10#ibcon#end of sib2, iclass 12, count 2 2006.230.01:53:14.10#ibcon#*mode == 0, iclass 12, count 2 2006.230.01:53:14.10#ibcon#*mode == 0 && serial, iclass 12, count 2 2006.230.01:53:14.10#ibcon#[27=AT01-04\r\n] 2006.230.01:53:14.10#ibcon#*before write, iclass 12, count 2 2006.230.01:53:14.10#ibcon#enter sib2, iclass 12, count 2 2006.230.01:53:14.10#ibcon#flushed, iclass 12, count 2 2006.230.01:53:14.10#ibcon#about to write, iclass 12, count 2 2006.230.01:53:14.10#ibcon#wrote, iclass 12, count 2 2006.230.01:53:14.10#ibcon#about to read 3, iclass 12, count 2 2006.230.01:53:14.13#ibcon#read 3, iclass 12, count 2 2006.230.01:53:14.13#ibcon#about to read 4, iclass 12, count 2 2006.230.01:53:14.13#ibcon#read 4, iclass 12, count 2 2006.230.01:53:14.13#ibcon#about to read 5, iclass 12, count 2 2006.230.01:53:14.13#ibcon#read 5, iclass 12, count 2 2006.230.01:53:14.13#ibcon#about to read 6, iclass 12, count 2 2006.230.01:53:14.13#ibcon#read 6, iclass 12, count 2 2006.230.01:53:14.13#ibcon#end of sib2, iclass 12, count 2 2006.230.01:53:14.13#ibcon#*after write, iclass 12, count 2 2006.230.01:53:14.13#ibcon#*before return 0, iclass 12, count 2 2006.230.01:53:14.13#ibcon#after mode 2 write, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:53:14.13#ibcon#end of loop, iclass 12 iclrec 1 cls_cnt 2 2006.230.01:53:14.13#ibcon#iclass 12 iclrec 2 cls_cnt 2 2006.230.01:53:14.13#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:14.13#ibcon#before find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:53:14.25#ibcon#after find_delay mode 2, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:53:14.25#ibcon#before mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:53:14.25#ibcon#enter wrdev, iclass 12, count 0 2006.230.01:53:14.25#ibcon#first serial, iclass 12, count 0 2006.230.01:53:14.25#ibcon#enter sib2, iclass 12, count 0 2006.230.01:53:14.25#ibcon#flushed, iclass 12, count 0 2006.230.01:53:14.25#ibcon#about to write, iclass 12, count 0 2006.230.01:53:14.25#ibcon#wrote, iclass 12, count 0 2006.230.01:53:14.25#ibcon#about to read 3, iclass 12, count 0 2006.230.01:53:14.27#ibcon#read 3, iclass 12, count 0 2006.230.01:53:14.27#ibcon#about to read 4, iclass 12, count 0 2006.230.01:53:14.27#ibcon#read 4, iclass 12, count 0 2006.230.01:53:14.27#ibcon#about to read 5, iclass 12, count 0 2006.230.01:53:14.27#ibcon#read 5, iclass 12, count 0 2006.230.01:53:14.27#ibcon#about to read 6, iclass 12, count 0 2006.230.01:53:14.27#ibcon#read 6, iclass 12, count 0 2006.230.01:53:14.27#ibcon#end of sib2, iclass 12, count 0 2006.230.01:53:14.27#ibcon#*mode == 0, iclass 12, count 0 2006.230.01:53:14.27#ibcon#*mode == 0 && serial, iclass 12, count 0 2006.230.01:53:14.27#ibcon#[27=USB\r\n] 2006.230.01:53:14.27#ibcon#*before write, iclass 12, count 0 2006.230.01:53:14.27#ibcon#enter sib2, iclass 12, count 0 2006.230.01:53:14.27#ibcon#flushed, iclass 12, count 0 2006.230.01:53:14.27#ibcon#about to write, iclass 12, count 0 2006.230.01:53:14.27#ibcon#wrote, iclass 12, count 0 2006.230.01:53:14.27#ibcon#about to read 3, iclass 12, count 0 2006.230.01:53:14.30#ibcon#read 3, iclass 12, count 0 2006.230.01:53:14.30#ibcon#about to read 4, iclass 12, count 0 2006.230.01:53:14.30#ibcon#read 4, iclass 12, count 0 2006.230.01:53:14.30#ibcon#about to read 5, iclass 12, count 0 2006.230.01:53:14.30#ibcon#read 5, iclass 12, count 0 2006.230.01:53:14.30#ibcon#about to read 6, iclass 12, count 0 2006.230.01:53:14.30#ibcon#read 6, iclass 12, count 0 2006.230.01:53:14.30#ibcon#end of sib2, iclass 12, count 0 2006.230.01:53:14.30#ibcon#*after write, iclass 12, count 0 2006.230.01:53:14.30#ibcon#*before return 0, iclass 12, count 0 2006.230.01:53:14.30#ibcon#after mode 2 write, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:53:14.30#ibcon#end of loop, iclass 12 iclrec 2 cls_cnt 0 2006.230.01:53:14.30#ibcon#about to clear, iclass 12 cls_cnt 0 2006.230.01:53:14.30#ibcon#cleared, iclass 12 cls_cnt 0 2006.230.01:53:14.30$vck44/vblo=2,634.99 2006.230.01:53:14.30#ibcon#iclass 14 nclrec 1 cls_cnt 2 2006.230.01:53:14.30#ibcon#iclass 14 iclrec 1 cls_cnt 2 2006.230.01:53:14.30#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:14.30#ibcon#before find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:14.30#ibcon#after find_delay mode 2, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:14.30#ibcon#before mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:14.30#ibcon#enter wrdev, iclass 14, count 0 2006.230.01:53:14.30#ibcon#first serial, iclass 14, count 0 2006.230.01:53:14.30#ibcon#enter sib2, iclass 14, count 0 2006.230.01:53:14.30#ibcon#flushed, iclass 14, count 0 2006.230.01:53:14.30#ibcon#about to write, iclass 14, count 0 2006.230.01:53:14.30#ibcon#wrote, iclass 14, count 0 2006.230.01:53:14.30#ibcon#about to read 3, iclass 14, count 0 2006.230.01:53:14.33#ibcon#read 3, iclass 14, count 0 2006.230.01:53:14.33#ibcon#about to read 4, iclass 14, count 0 2006.230.01:53:14.33#ibcon#read 4, iclass 14, count 0 2006.230.01:53:14.33#ibcon#about to read 5, iclass 14, count 0 2006.230.01:53:14.33#ibcon#read 5, iclass 14, count 0 2006.230.01:53:14.33#ibcon#about to read 6, iclass 14, count 0 2006.230.01:53:14.33#ibcon#read 6, iclass 14, count 0 2006.230.01:53:14.33#ibcon#end of sib2, iclass 14, count 0 2006.230.01:53:14.33#ibcon#*mode == 0, iclass 14, count 0 2006.230.01:53:14.33#ibcon#*mode == 0 && serial, iclass 14, count 0 2006.230.01:53:14.33#ibcon#[28=FRQ=02,634.99\r\n] 2006.230.01:53:14.33#ibcon#*before write, iclass 14, count 0 2006.230.01:53:14.33#ibcon#enter sib2, iclass 14, count 0 2006.230.01:53:14.33#ibcon#flushed, iclass 14, count 0 2006.230.01:53:14.33#ibcon#about to write, iclass 14, count 0 2006.230.01:53:14.33#ibcon#wrote, iclass 14, count 0 2006.230.01:53:14.33#ibcon#about to read 3, iclass 14, count 0 2006.230.01:53:14.37#ibcon#read 3, iclass 14, count 0 2006.230.01:53:14.37#ibcon#about to read 4, iclass 14, count 0 2006.230.01:53:14.37#ibcon#read 4, iclass 14, count 0 2006.230.01:53:14.37#ibcon#about to read 5, iclass 14, count 0 2006.230.01:53:14.37#ibcon#read 5, iclass 14, count 0 2006.230.01:53:14.37#ibcon#about to read 6, iclass 14, count 0 2006.230.01:53:14.37#ibcon#read 6, iclass 14, count 0 2006.230.01:53:14.37#ibcon#end of sib2, iclass 14, count 0 2006.230.01:53:14.37#ibcon#*after write, iclass 14, count 0 2006.230.01:53:14.37#ibcon#*before return 0, iclass 14, count 0 2006.230.01:53:14.37#ibcon#after mode 2 write, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:14.37#ibcon#end of loop, iclass 14 iclrec 1 cls_cnt 0 2006.230.01:53:14.37#ibcon#about to clear, iclass 14 cls_cnt 0 2006.230.01:53:14.37#ibcon#cleared, iclass 14 cls_cnt 0 2006.230.01:53:14.37$vck44/vb=2,4 2006.230.01:53:14.37#ibcon#iclass 16 nclrec 2 cls_cnt 3 2006.230.01:53:14.37#ibcon#iclass 16 iclrec 1 cls_cnt 3 2006.230.01:53:14.37#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:14.37#ibcon#before find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:14.42#ibcon#after find_delay mode 2, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:14.42#ibcon#before mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:14.42#ibcon#enter wrdev, iclass 16, count 2 2006.230.01:53:14.42#ibcon#first serial, iclass 16, count 2 2006.230.01:53:14.42#ibcon#enter sib2, iclass 16, count 2 2006.230.01:53:14.42#ibcon#flushed, iclass 16, count 2 2006.230.01:53:14.42#ibcon#about to write, iclass 16, count 2 2006.230.01:53:14.42#ibcon#wrote, iclass 16, count 2 2006.230.01:53:14.42#ibcon#about to read 3, iclass 16, count 2 2006.230.01:53:14.44#ibcon#read 3, iclass 16, count 2 2006.230.01:53:14.44#ibcon#about to read 4, iclass 16, count 2 2006.230.01:53:14.44#ibcon#read 4, iclass 16, count 2 2006.230.01:53:14.44#ibcon#about to read 5, iclass 16, count 2 2006.230.01:53:14.44#ibcon#read 5, iclass 16, count 2 2006.230.01:53:14.44#ibcon#about to read 6, iclass 16, count 2 2006.230.01:53:14.44#ibcon#read 6, iclass 16, count 2 2006.230.01:53:14.44#ibcon#end of sib2, iclass 16, count 2 2006.230.01:53:14.44#ibcon#*mode == 0, iclass 16, count 2 2006.230.01:53:14.44#ibcon#*mode == 0 && serial, iclass 16, count 2 2006.230.01:53:14.44#ibcon#[27=AT02-04\r\n] 2006.230.01:53:14.44#ibcon#*before write, iclass 16, count 2 2006.230.01:53:14.44#ibcon#enter sib2, iclass 16, count 2 2006.230.01:53:14.44#ibcon#flushed, iclass 16, count 2 2006.230.01:53:14.44#ibcon#about to write, iclass 16, count 2 2006.230.01:53:14.44#ibcon#wrote, iclass 16, count 2 2006.230.01:53:14.44#ibcon#about to read 3, iclass 16, count 2 2006.230.01:53:14.47#ibcon#read 3, iclass 16, count 2 2006.230.01:53:14.47#ibcon#about to read 4, iclass 16, count 2 2006.230.01:53:14.47#ibcon#read 4, iclass 16, count 2 2006.230.01:53:14.47#ibcon#about to read 5, iclass 16, count 2 2006.230.01:53:14.47#ibcon#read 5, iclass 16, count 2 2006.230.01:53:14.47#ibcon#about to read 6, iclass 16, count 2 2006.230.01:53:14.47#ibcon#read 6, iclass 16, count 2 2006.230.01:53:14.47#ibcon#end of sib2, iclass 16, count 2 2006.230.01:53:14.47#ibcon#*after write, iclass 16, count 2 2006.230.01:53:14.47#ibcon#*before return 0, iclass 16, count 2 2006.230.01:53:14.47#ibcon#after mode 2 write, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:14.47#ibcon#end of loop, iclass 16 iclrec 1 cls_cnt 2 2006.230.01:53:14.47#ibcon#iclass 16 iclrec 2 cls_cnt 2 2006.230.01:53:14.47#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:14.47#ibcon#before find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:14.59#ibcon#after find_delay mode 2, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:14.59#ibcon#before mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:14.59#ibcon#enter wrdev, iclass 16, count 0 2006.230.01:53:14.59#ibcon#first serial, iclass 16, count 0 2006.230.01:53:14.59#ibcon#enter sib2, iclass 16, count 0 2006.230.01:53:14.59#ibcon#flushed, iclass 16, count 0 2006.230.01:53:14.59#ibcon#about to write, iclass 16, count 0 2006.230.01:53:14.59#ibcon#wrote, iclass 16, count 0 2006.230.01:53:14.59#ibcon#about to read 3, iclass 16, count 0 2006.230.01:53:14.61#ibcon#read 3, iclass 16, count 0 2006.230.01:53:14.61#ibcon#about to read 4, iclass 16, count 0 2006.230.01:53:14.61#ibcon#read 4, iclass 16, count 0 2006.230.01:53:14.61#ibcon#about to read 5, iclass 16, count 0 2006.230.01:53:14.61#ibcon#read 5, iclass 16, count 0 2006.230.01:53:14.61#ibcon#about to read 6, iclass 16, count 0 2006.230.01:53:14.61#ibcon#read 6, iclass 16, count 0 2006.230.01:53:14.61#ibcon#end of sib2, iclass 16, count 0 2006.230.01:53:14.61#ibcon#*mode == 0, iclass 16, count 0 2006.230.01:53:14.61#ibcon#*mode == 0 && serial, iclass 16, count 0 2006.230.01:53:14.61#ibcon#[27=USB\r\n] 2006.230.01:53:14.61#ibcon#*before write, iclass 16, count 0 2006.230.01:53:14.61#ibcon#enter sib2, iclass 16, count 0 2006.230.01:53:14.61#ibcon#flushed, iclass 16, count 0 2006.230.01:53:14.61#ibcon#about to write, iclass 16, count 0 2006.230.01:53:14.61#ibcon#wrote, iclass 16, count 0 2006.230.01:53:14.61#ibcon#about to read 3, iclass 16, count 0 2006.230.01:53:14.64#ibcon#read 3, iclass 16, count 0 2006.230.01:53:14.64#ibcon#about to read 4, iclass 16, count 0 2006.230.01:53:14.64#ibcon#read 4, iclass 16, count 0 2006.230.01:53:14.64#ibcon#about to read 5, iclass 16, count 0 2006.230.01:53:14.64#ibcon#read 5, iclass 16, count 0 2006.230.01:53:14.64#ibcon#about to read 6, iclass 16, count 0 2006.230.01:53:14.64#ibcon#read 6, iclass 16, count 0 2006.230.01:53:14.64#ibcon#end of sib2, iclass 16, count 0 2006.230.01:53:14.64#ibcon#*after write, iclass 16, count 0 2006.230.01:53:14.64#ibcon#*before return 0, iclass 16, count 0 2006.230.01:53:14.64#ibcon#after mode 2 write, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:14.64#ibcon#end of loop, iclass 16 iclrec 2 cls_cnt 0 2006.230.01:53:14.64#ibcon#about to clear, iclass 16 cls_cnt 0 2006.230.01:53:14.64#ibcon#cleared, iclass 16 cls_cnt 0 2006.230.01:53:14.64$vck44/vblo=3,649.99 2006.230.01:53:14.64#ibcon#iclass 18 nclrec 1 cls_cnt 2 2006.230.01:53:14.64#ibcon#iclass 18 iclrec 1 cls_cnt 2 2006.230.01:53:14.64#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:14.64#ibcon#before find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:14.64#ibcon#after find_delay mode 2, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:14.64#ibcon#before mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:14.64#ibcon#enter wrdev, iclass 18, count 0 2006.230.01:53:14.64#ibcon#first serial, iclass 18, count 0 2006.230.01:53:14.64#ibcon#enter sib2, iclass 18, count 0 2006.230.01:53:14.64#ibcon#flushed, iclass 18, count 0 2006.230.01:53:14.64#ibcon#about to write, iclass 18, count 0 2006.230.01:53:14.64#ibcon#wrote, iclass 18, count 0 2006.230.01:53:14.64#ibcon#about to read 3, iclass 18, count 0 2006.230.01:53:14.66#ibcon#read 3, iclass 18, count 0 2006.230.01:53:14.66#ibcon#about to read 4, iclass 18, count 0 2006.230.01:53:14.66#ibcon#read 4, iclass 18, count 0 2006.230.01:53:14.66#ibcon#about to read 5, iclass 18, count 0 2006.230.01:53:14.66#ibcon#read 5, iclass 18, count 0 2006.230.01:53:14.66#ibcon#about to read 6, iclass 18, count 0 2006.230.01:53:14.66#ibcon#read 6, iclass 18, count 0 2006.230.01:53:14.66#ibcon#end of sib2, iclass 18, count 0 2006.230.01:53:14.66#ibcon#*mode == 0, iclass 18, count 0 2006.230.01:53:14.66#ibcon#*mode == 0 && serial, iclass 18, count 0 2006.230.01:53:14.66#ibcon#[28=FRQ=03,649.99\r\n] 2006.230.01:53:14.66#ibcon#*before write, iclass 18, count 0 2006.230.01:53:14.66#ibcon#enter sib2, iclass 18, count 0 2006.230.01:53:14.66#ibcon#flushed, iclass 18, count 0 2006.230.01:53:14.66#ibcon#about to write, iclass 18, count 0 2006.230.01:53:14.66#ibcon#wrote, iclass 18, count 0 2006.230.01:53:14.66#ibcon#about to read 3, iclass 18, count 0 2006.230.01:53:14.70#ibcon#read 3, iclass 18, count 0 2006.230.01:53:14.70#ibcon#about to read 4, iclass 18, count 0 2006.230.01:53:14.70#ibcon#read 4, iclass 18, count 0 2006.230.01:53:14.70#ibcon#about to read 5, iclass 18, count 0 2006.230.01:53:14.70#ibcon#read 5, iclass 18, count 0 2006.230.01:53:14.70#ibcon#about to read 6, iclass 18, count 0 2006.230.01:53:14.70#ibcon#read 6, iclass 18, count 0 2006.230.01:53:14.70#ibcon#end of sib2, iclass 18, count 0 2006.230.01:53:14.70#ibcon#*after write, iclass 18, count 0 2006.230.01:53:14.70#ibcon#*before return 0, iclass 18, count 0 2006.230.01:53:14.70#ibcon#after mode 2 write, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:14.70#ibcon#end of loop, iclass 18 iclrec 1 cls_cnt 0 2006.230.01:53:14.70#ibcon#about to clear, iclass 18 cls_cnt 0 2006.230.01:53:14.70#ibcon#cleared, iclass 18 cls_cnt 0 2006.230.01:53:14.70$vck44/vb=3,4 2006.230.01:53:14.70#ibcon#iclass 20 nclrec 2 cls_cnt 3 2006.230.01:53:14.70#ibcon#iclass 20 iclrec 1 cls_cnt 3 2006.230.01:53:14.70#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:14.70#ibcon#before find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:14.76#ibcon#after find_delay mode 2, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:14.76#ibcon#before mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:14.76#ibcon#enter wrdev, iclass 20, count 2 2006.230.01:53:14.76#ibcon#first serial, iclass 20, count 2 2006.230.01:53:14.76#ibcon#enter sib2, iclass 20, count 2 2006.230.01:53:14.76#ibcon#flushed, iclass 20, count 2 2006.230.01:53:14.76#ibcon#about to write, iclass 20, count 2 2006.230.01:53:14.76#ibcon#wrote, iclass 20, count 2 2006.230.01:53:14.76#ibcon#about to read 3, iclass 20, count 2 2006.230.01:53:14.78#ibcon#read 3, iclass 20, count 2 2006.230.01:53:14.78#ibcon#about to read 4, iclass 20, count 2 2006.230.01:53:14.78#ibcon#read 4, iclass 20, count 2 2006.230.01:53:14.78#ibcon#about to read 5, iclass 20, count 2 2006.230.01:53:14.78#ibcon#read 5, iclass 20, count 2 2006.230.01:53:14.78#ibcon#about to read 6, iclass 20, count 2 2006.230.01:53:14.78#ibcon#read 6, iclass 20, count 2 2006.230.01:53:14.78#ibcon#end of sib2, iclass 20, count 2 2006.230.01:53:14.78#ibcon#*mode == 0, iclass 20, count 2 2006.230.01:53:14.78#ibcon#*mode == 0 && serial, iclass 20, count 2 2006.230.01:53:14.78#ibcon#[27=AT03-04\r\n] 2006.230.01:53:14.78#ibcon#*before write, iclass 20, count 2 2006.230.01:53:14.78#ibcon#enter sib2, iclass 20, count 2 2006.230.01:53:14.78#ibcon#flushed, iclass 20, count 2 2006.230.01:53:14.78#ibcon#about to write, iclass 20, count 2 2006.230.01:53:14.78#ibcon#wrote, iclass 20, count 2 2006.230.01:53:14.78#ibcon#about to read 3, iclass 20, count 2 2006.230.01:53:14.81#ibcon#read 3, iclass 20, count 2 2006.230.01:53:14.81#ibcon#about to read 4, iclass 20, count 2 2006.230.01:53:14.81#ibcon#read 4, iclass 20, count 2 2006.230.01:53:14.81#ibcon#about to read 5, iclass 20, count 2 2006.230.01:53:14.81#ibcon#read 5, iclass 20, count 2 2006.230.01:53:14.81#ibcon#about to read 6, iclass 20, count 2 2006.230.01:53:14.81#ibcon#read 6, iclass 20, count 2 2006.230.01:53:14.81#ibcon#end of sib2, iclass 20, count 2 2006.230.01:53:14.81#ibcon#*after write, iclass 20, count 2 2006.230.01:53:14.81#ibcon#*before return 0, iclass 20, count 2 2006.230.01:53:14.81#ibcon#after mode 2 write, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:14.81#ibcon#end of loop, iclass 20 iclrec 1 cls_cnt 2 2006.230.01:53:14.81#ibcon#iclass 20 iclrec 2 cls_cnt 2 2006.230.01:53:14.81#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:14.81#ibcon#before find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:14.93#ibcon#after find_delay mode 2, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:14.93#ibcon#before mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:14.93#ibcon#enter wrdev, iclass 20, count 0 2006.230.01:53:14.93#ibcon#first serial, iclass 20, count 0 2006.230.01:53:14.93#ibcon#enter sib2, iclass 20, count 0 2006.230.01:53:14.93#ibcon#flushed, iclass 20, count 0 2006.230.01:53:14.93#ibcon#about to write, iclass 20, count 0 2006.230.01:53:14.93#ibcon#wrote, iclass 20, count 0 2006.230.01:53:14.93#ibcon#about to read 3, iclass 20, count 0 2006.230.01:53:14.95#ibcon#read 3, iclass 20, count 0 2006.230.01:53:14.95#ibcon#about to read 4, iclass 20, count 0 2006.230.01:53:14.95#ibcon#read 4, iclass 20, count 0 2006.230.01:53:14.95#ibcon#about to read 5, iclass 20, count 0 2006.230.01:53:14.95#ibcon#read 5, iclass 20, count 0 2006.230.01:53:14.95#ibcon#about to read 6, iclass 20, count 0 2006.230.01:53:14.95#ibcon#read 6, iclass 20, count 0 2006.230.01:53:14.95#ibcon#end of sib2, iclass 20, count 0 2006.230.01:53:14.95#ibcon#*mode == 0, iclass 20, count 0 2006.230.01:53:14.95#ibcon#*mode == 0 && serial, iclass 20, count 0 2006.230.01:53:14.95#ibcon#[27=USB\r\n] 2006.230.01:53:14.95#ibcon#*before write, iclass 20, count 0 2006.230.01:53:14.95#ibcon#enter sib2, iclass 20, count 0 2006.230.01:53:14.95#ibcon#flushed, iclass 20, count 0 2006.230.01:53:14.95#ibcon#about to write, iclass 20, count 0 2006.230.01:53:14.95#ibcon#wrote, iclass 20, count 0 2006.230.01:53:14.95#ibcon#about to read 3, iclass 20, count 0 2006.230.01:53:14.98#ibcon#read 3, iclass 20, count 0 2006.230.01:53:14.98#ibcon#about to read 4, iclass 20, count 0 2006.230.01:53:14.98#ibcon#read 4, iclass 20, count 0 2006.230.01:53:14.98#ibcon#about to read 5, iclass 20, count 0 2006.230.01:53:14.98#ibcon#read 5, iclass 20, count 0 2006.230.01:53:14.98#ibcon#about to read 6, iclass 20, count 0 2006.230.01:53:14.98#ibcon#read 6, iclass 20, count 0 2006.230.01:53:14.98#ibcon#end of sib2, iclass 20, count 0 2006.230.01:53:14.98#ibcon#*after write, iclass 20, count 0 2006.230.01:53:14.98#ibcon#*before return 0, iclass 20, count 0 2006.230.01:53:14.98#ibcon#after mode 2 write, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:14.98#ibcon#end of loop, iclass 20 iclrec 2 cls_cnt 0 2006.230.01:53:14.98#ibcon#about to clear, iclass 20 cls_cnt 0 2006.230.01:53:14.98#ibcon#cleared, iclass 20 cls_cnt 0 2006.230.01:53:14.98$vck44/vblo=4,679.99 2006.230.01:53:14.98#ibcon#iclass 22 nclrec 1 cls_cnt 2 2006.230.01:53:14.98#ibcon#iclass 22 iclrec 1 cls_cnt 2 2006.230.01:53:14.98#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:14.98#ibcon#before find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:14.98#ibcon#after find_delay mode 2, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:14.98#ibcon#before mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:14.98#ibcon#enter wrdev, iclass 22, count 0 2006.230.01:53:14.98#ibcon#first serial, iclass 22, count 0 2006.230.01:53:14.98#ibcon#enter sib2, iclass 22, count 0 2006.230.01:53:14.98#ibcon#flushed, iclass 22, count 0 2006.230.01:53:14.98#ibcon#about to write, iclass 22, count 0 2006.230.01:53:14.98#ibcon#wrote, iclass 22, count 0 2006.230.01:53:14.98#ibcon#about to read 3, iclass 22, count 0 2006.230.01:53:15.01#ibcon#read 3, iclass 22, count 0 2006.230.01:53:15.01#ibcon#about to read 4, iclass 22, count 0 2006.230.01:53:15.01#ibcon#read 4, iclass 22, count 0 2006.230.01:53:15.01#ibcon#about to read 5, iclass 22, count 0 2006.230.01:53:15.01#ibcon#read 5, iclass 22, count 0 2006.230.01:53:15.01#ibcon#about to read 6, iclass 22, count 0 2006.230.01:53:15.01#ibcon#read 6, iclass 22, count 0 2006.230.01:53:15.01#ibcon#end of sib2, iclass 22, count 0 2006.230.01:53:15.01#ibcon#*mode == 0, iclass 22, count 0 2006.230.01:53:15.01#ibcon#*mode == 0 && serial, iclass 22, count 0 2006.230.01:53:15.01#ibcon#[28=FRQ=04,679.99\r\n] 2006.230.01:53:15.01#ibcon#*before write, iclass 22, count 0 2006.230.01:53:15.01#ibcon#enter sib2, iclass 22, count 0 2006.230.01:53:15.01#ibcon#flushed, iclass 22, count 0 2006.230.01:53:15.01#ibcon#about to write, iclass 22, count 0 2006.230.01:53:15.01#ibcon#wrote, iclass 22, count 0 2006.230.01:53:15.01#ibcon#about to read 3, iclass 22, count 0 2006.230.01:53:15.05#ibcon#read 3, iclass 22, count 0 2006.230.01:53:15.05#ibcon#about to read 4, iclass 22, count 0 2006.230.01:53:15.05#ibcon#read 4, iclass 22, count 0 2006.230.01:53:15.05#ibcon#about to read 5, iclass 22, count 0 2006.230.01:53:15.05#ibcon#read 5, iclass 22, count 0 2006.230.01:53:15.05#ibcon#about to read 6, iclass 22, count 0 2006.230.01:53:15.05#ibcon#read 6, iclass 22, count 0 2006.230.01:53:15.05#ibcon#end of sib2, iclass 22, count 0 2006.230.01:53:15.05#ibcon#*after write, iclass 22, count 0 2006.230.01:53:15.05#ibcon#*before return 0, iclass 22, count 0 2006.230.01:53:15.05#ibcon#after mode 2 write, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:15.05#ibcon#end of loop, iclass 22 iclrec 1 cls_cnt 0 2006.230.01:53:15.05#ibcon#about to clear, iclass 22 cls_cnt 0 2006.230.01:53:15.05#ibcon#cleared, iclass 22 cls_cnt 0 2006.230.01:53:15.05$vck44/vb=4,4 2006.230.01:53:15.05#ibcon#iclass 24 nclrec 2 cls_cnt 3 2006.230.01:53:15.05#ibcon#iclass 24 iclrec 1 cls_cnt 3 2006.230.01:53:15.05#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:15.05#ibcon#before find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:15.10#ibcon#after find_delay mode 2, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:15.10#ibcon#before mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:15.10#ibcon#enter wrdev, iclass 24, count 2 2006.230.01:53:15.10#ibcon#first serial, iclass 24, count 2 2006.230.01:53:15.10#ibcon#enter sib2, iclass 24, count 2 2006.230.01:53:15.10#ibcon#flushed, iclass 24, count 2 2006.230.01:53:15.10#ibcon#about to write, iclass 24, count 2 2006.230.01:53:15.10#ibcon#wrote, iclass 24, count 2 2006.230.01:53:15.10#ibcon#about to read 3, iclass 24, count 2 2006.230.01:53:15.12#ibcon#read 3, iclass 24, count 2 2006.230.01:53:15.12#ibcon#about to read 4, iclass 24, count 2 2006.230.01:53:15.12#ibcon#read 4, iclass 24, count 2 2006.230.01:53:15.12#ibcon#about to read 5, iclass 24, count 2 2006.230.01:53:15.12#ibcon#read 5, iclass 24, count 2 2006.230.01:53:15.12#ibcon#about to read 6, iclass 24, count 2 2006.230.01:53:15.12#ibcon#read 6, iclass 24, count 2 2006.230.01:53:15.12#ibcon#end of sib2, iclass 24, count 2 2006.230.01:53:15.12#ibcon#*mode == 0, iclass 24, count 2 2006.230.01:53:15.12#ibcon#*mode == 0 && serial, iclass 24, count 2 2006.230.01:53:15.12#ibcon#[27=AT04-04\r\n] 2006.230.01:53:15.12#ibcon#*before write, iclass 24, count 2 2006.230.01:53:15.12#ibcon#enter sib2, iclass 24, count 2 2006.230.01:53:15.12#ibcon#flushed, iclass 24, count 2 2006.230.01:53:15.12#ibcon#about to write, iclass 24, count 2 2006.230.01:53:15.12#ibcon#wrote, iclass 24, count 2 2006.230.01:53:15.12#ibcon#about to read 3, iclass 24, count 2 2006.230.01:53:15.15#ibcon#read 3, iclass 24, count 2 2006.230.01:53:15.15#ibcon#about to read 4, iclass 24, count 2 2006.230.01:53:15.15#ibcon#read 4, iclass 24, count 2 2006.230.01:53:15.15#ibcon#about to read 5, iclass 24, count 2 2006.230.01:53:15.15#ibcon#read 5, iclass 24, count 2 2006.230.01:53:15.15#ibcon#about to read 6, iclass 24, count 2 2006.230.01:53:15.15#ibcon#read 6, iclass 24, count 2 2006.230.01:53:15.15#ibcon#end of sib2, iclass 24, count 2 2006.230.01:53:15.15#ibcon#*after write, iclass 24, count 2 2006.230.01:53:15.15#ibcon#*before return 0, iclass 24, count 2 2006.230.01:53:15.15#ibcon#after mode 2 write, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:15.15#ibcon#end of loop, iclass 24 iclrec 1 cls_cnt 2 2006.230.01:53:15.15#ibcon#iclass 24 iclrec 2 cls_cnt 2 2006.230.01:53:15.15#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:15.15#ibcon#before find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:15.27#ibcon#after find_delay mode 2, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:15.27#ibcon#before mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:15.27#ibcon#enter wrdev, iclass 24, count 0 2006.230.01:53:15.27#ibcon#first serial, iclass 24, count 0 2006.230.01:53:15.27#ibcon#enter sib2, iclass 24, count 0 2006.230.01:53:15.27#ibcon#flushed, iclass 24, count 0 2006.230.01:53:15.27#ibcon#about to write, iclass 24, count 0 2006.230.01:53:15.27#ibcon#wrote, iclass 24, count 0 2006.230.01:53:15.27#ibcon#about to read 3, iclass 24, count 0 2006.230.01:53:15.29#ibcon#read 3, iclass 24, count 0 2006.230.01:53:15.29#ibcon#about to read 4, iclass 24, count 0 2006.230.01:53:15.29#ibcon#read 4, iclass 24, count 0 2006.230.01:53:15.29#ibcon#about to read 5, iclass 24, count 0 2006.230.01:53:15.29#ibcon#read 5, iclass 24, count 0 2006.230.01:53:15.29#ibcon#about to read 6, iclass 24, count 0 2006.230.01:53:15.29#ibcon#read 6, iclass 24, count 0 2006.230.01:53:15.29#ibcon#end of sib2, iclass 24, count 0 2006.230.01:53:15.29#ibcon#*mode == 0, iclass 24, count 0 2006.230.01:53:15.29#ibcon#*mode == 0 && serial, iclass 24, count 0 2006.230.01:53:15.29#ibcon#[27=USB\r\n] 2006.230.01:53:15.29#ibcon#*before write, iclass 24, count 0 2006.230.01:53:15.29#ibcon#enter sib2, iclass 24, count 0 2006.230.01:53:15.29#ibcon#flushed, iclass 24, count 0 2006.230.01:53:15.29#ibcon#about to write, iclass 24, count 0 2006.230.01:53:15.29#ibcon#wrote, iclass 24, count 0 2006.230.01:53:15.29#ibcon#about to read 3, iclass 24, count 0 2006.230.01:53:15.32#ibcon#read 3, iclass 24, count 0 2006.230.01:53:15.32#ibcon#about to read 4, iclass 24, count 0 2006.230.01:53:15.32#ibcon#read 4, iclass 24, count 0 2006.230.01:53:15.32#ibcon#about to read 5, iclass 24, count 0 2006.230.01:53:15.32#ibcon#read 5, iclass 24, count 0 2006.230.01:53:15.32#ibcon#about to read 6, iclass 24, count 0 2006.230.01:53:15.32#ibcon#read 6, iclass 24, count 0 2006.230.01:53:15.32#ibcon#end of sib2, iclass 24, count 0 2006.230.01:53:15.32#ibcon#*after write, iclass 24, count 0 2006.230.01:53:15.32#ibcon#*before return 0, iclass 24, count 0 2006.230.01:53:15.32#ibcon#after mode 2 write, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:15.32#ibcon#end of loop, iclass 24 iclrec 2 cls_cnt 0 2006.230.01:53:15.32#ibcon#about to clear, iclass 24 cls_cnt 0 2006.230.01:53:15.32#ibcon#cleared, iclass 24 cls_cnt 0 2006.230.01:53:15.32$vck44/vblo=5,709.99 2006.230.01:53:15.32#ibcon#iclass 26 nclrec 1 cls_cnt 2 2006.230.01:53:15.32#ibcon#iclass 26 iclrec 1 cls_cnt 2 2006.230.01:53:15.32#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:15.32#ibcon#before find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:15.32#ibcon#after find_delay mode 2, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:15.32#ibcon#before mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:15.32#ibcon#enter wrdev, iclass 26, count 0 2006.230.01:53:15.32#ibcon#first serial, iclass 26, count 0 2006.230.01:53:15.32#ibcon#enter sib2, iclass 26, count 0 2006.230.01:53:15.32#ibcon#flushed, iclass 26, count 0 2006.230.01:53:15.32#ibcon#about to write, iclass 26, count 0 2006.230.01:53:15.32#ibcon#wrote, iclass 26, count 0 2006.230.01:53:15.32#ibcon#about to read 3, iclass 26, count 0 2006.230.01:53:15.34#ibcon#read 3, iclass 26, count 0 2006.230.01:53:15.34#ibcon#about to read 4, iclass 26, count 0 2006.230.01:53:15.34#ibcon#read 4, iclass 26, count 0 2006.230.01:53:15.34#ibcon#about to read 5, iclass 26, count 0 2006.230.01:53:15.34#ibcon#read 5, iclass 26, count 0 2006.230.01:53:15.34#ibcon#about to read 6, iclass 26, count 0 2006.230.01:53:15.34#ibcon#read 6, iclass 26, count 0 2006.230.01:53:15.34#ibcon#end of sib2, iclass 26, count 0 2006.230.01:53:15.34#ibcon#*mode == 0, iclass 26, count 0 2006.230.01:53:15.34#ibcon#*mode == 0 && serial, iclass 26, count 0 2006.230.01:53:15.34#ibcon#[28=FRQ=05,709.99\r\n] 2006.230.01:53:15.34#ibcon#*before write, iclass 26, count 0 2006.230.01:53:15.34#ibcon#enter sib2, iclass 26, count 0 2006.230.01:53:15.34#ibcon#flushed, iclass 26, count 0 2006.230.01:53:15.34#ibcon#about to write, iclass 26, count 0 2006.230.01:53:15.34#ibcon#wrote, iclass 26, count 0 2006.230.01:53:15.34#ibcon#about to read 3, iclass 26, count 0 2006.230.01:53:15.38#ibcon#read 3, iclass 26, count 0 2006.230.01:53:15.38#ibcon#about to read 4, iclass 26, count 0 2006.230.01:53:15.38#ibcon#read 4, iclass 26, count 0 2006.230.01:53:15.38#ibcon#about to read 5, iclass 26, count 0 2006.230.01:53:15.38#ibcon#read 5, iclass 26, count 0 2006.230.01:53:15.38#ibcon#about to read 6, iclass 26, count 0 2006.230.01:53:15.38#ibcon#read 6, iclass 26, count 0 2006.230.01:53:15.38#ibcon#end of sib2, iclass 26, count 0 2006.230.01:53:15.38#ibcon#*after write, iclass 26, count 0 2006.230.01:53:15.38#ibcon#*before return 0, iclass 26, count 0 2006.230.01:53:15.38#ibcon#after mode 2 write, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:15.38#ibcon#end of loop, iclass 26 iclrec 1 cls_cnt 0 2006.230.01:53:15.38#ibcon#about to clear, iclass 26 cls_cnt 0 2006.230.01:53:15.38#ibcon#cleared, iclass 26 cls_cnt 0 2006.230.01:53:15.38$vck44/vb=5,4 2006.230.01:53:15.38#ibcon#iclass 28 nclrec 2 cls_cnt 3 2006.230.01:53:15.38#ibcon#iclass 28 iclrec 1 cls_cnt 3 2006.230.01:53:15.38#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:15.38#ibcon#before find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:15.44#ibcon#after find_delay mode 2, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:15.44#ibcon#before mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:15.44#ibcon#enter wrdev, iclass 28, count 2 2006.230.01:53:15.44#ibcon#first serial, iclass 28, count 2 2006.230.01:53:15.44#ibcon#enter sib2, iclass 28, count 2 2006.230.01:53:15.44#ibcon#flushed, iclass 28, count 2 2006.230.01:53:15.44#ibcon#about to write, iclass 28, count 2 2006.230.01:53:15.44#ibcon#wrote, iclass 28, count 2 2006.230.01:53:15.44#ibcon#about to read 3, iclass 28, count 2 2006.230.01:53:15.46#ibcon#read 3, iclass 28, count 2 2006.230.01:53:15.46#ibcon#about to read 4, iclass 28, count 2 2006.230.01:53:15.46#ibcon#read 4, iclass 28, count 2 2006.230.01:53:15.46#ibcon#about to read 5, iclass 28, count 2 2006.230.01:53:15.46#ibcon#read 5, iclass 28, count 2 2006.230.01:53:15.46#ibcon#about to read 6, iclass 28, count 2 2006.230.01:53:15.46#ibcon#read 6, iclass 28, count 2 2006.230.01:53:15.46#ibcon#end of sib2, iclass 28, count 2 2006.230.01:53:15.46#ibcon#*mode == 0, iclass 28, count 2 2006.230.01:53:15.46#ibcon#*mode == 0 && serial, iclass 28, count 2 2006.230.01:53:15.46#ibcon#[27=AT05-04\r\n] 2006.230.01:53:15.46#ibcon#*before write, iclass 28, count 2 2006.230.01:53:15.46#ibcon#enter sib2, iclass 28, count 2 2006.230.01:53:15.46#ibcon#flushed, iclass 28, count 2 2006.230.01:53:15.46#ibcon#about to write, iclass 28, count 2 2006.230.01:53:15.46#ibcon#wrote, iclass 28, count 2 2006.230.01:53:15.46#ibcon#about to read 3, iclass 28, count 2 2006.230.01:53:15.49#ibcon#read 3, iclass 28, count 2 2006.230.01:53:15.49#ibcon#about to read 4, iclass 28, count 2 2006.230.01:53:15.49#ibcon#read 4, iclass 28, count 2 2006.230.01:53:15.49#ibcon#about to read 5, iclass 28, count 2 2006.230.01:53:15.49#ibcon#read 5, iclass 28, count 2 2006.230.01:53:15.49#ibcon#about to read 6, iclass 28, count 2 2006.230.01:53:15.49#ibcon#read 6, iclass 28, count 2 2006.230.01:53:15.49#ibcon#end of sib2, iclass 28, count 2 2006.230.01:53:15.49#ibcon#*after write, iclass 28, count 2 2006.230.01:53:15.49#ibcon#*before return 0, iclass 28, count 2 2006.230.01:53:15.49#ibcon#after mode 2 write, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:15.49#ibcon#end of loop, iclass 28 iclrec 1 cls_cnt 2 2006.230.01:53:15.49#ibcon#iclass 28 iclrec 2 cls_cnt 2 2006.230.01:53:15.49#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:15.49#ibcon#before find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:15.61#ibcon#after find_delay mode 2, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:15.61#ibcon#before mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:15.61#ibcon#enter wrdev, iclass 28, count 0 2006.230.01:53:15.61#ibcon#first serial, iclass 28, count 0 2006.230.01:53:15.61#ibcon#enter sib2, iclass 28, count 0 2006.230.01:53:15.61#ibcon#flushed, iclass 28, count 0 2006.230.01:53:15.61#ibcon#about to write, iclass 28, count 0 2006.230.01:53:15.61#ibcon#wrote, iclass 28, count 0 2006.230.01:53:15.61#ibcon#about to read 3, iclass 28, count 0 2006.230.01:53:15.63#ibcon#read 3, iclass 28, count 0 2006.230.01:53:15.63#ibcon#about to read 4, iclass 28, count 0 2006.230.01:53:15.63#ibcon#read 4, iclass 28, count 0 2006.230.01:53:15.63#ibcon#about to read 5, iclass 28, count 0 2006.230.01:53:15.63#ibcon#read 5, iclass 28, count 0 2006.230.01:53:15.63#ibcon#about to read 6, iclass 28, count 0 2006.230.01:53:15.63#ibcon#read 6, iclass 28, count 0 2006.230.01:53:15.63#ibcon#end of sib2, iclass 28, count 0 2006.230.01:53:15.63#ibcon#*mode == 0, iclass 28, count 0 2006.230.01:53:15.63#ibcon#*mode == 0 && serial, iclass 28, count 0 2006.230.01:53:15.63#ibcon#[27=USB\r\n] 2006.230.01:53:15.63#ibcon#*before write, iclass 28, count 0 2006.230.01:53:15.63#ibcon#enter sib2, iclass 28, count 0 2006.230.01:53:15.63#ibcon#flushed, iclass 28, count 0 2006.230.01:53:15.63#ibcon#about to write, iclass 28, count 0 2006.230.01:53:15.63#ibcon#wrote, iclass 28, count 0 2006.230.01:53:15.63#ibcon#about to read 3, iclass 28, count 0 2006.230.01:53:15.66#ibcon#read 3, iclass 28, count 0 2006.230.01:53:15.66#ibcon#about to read 4, iclass 28, count 0 2006.230.01:53:15.66#ibcon#read 4, iclass 28, count 0 2006.230.01:53:15.66#ibcon#about to read 5, iclass 28, count 0 2006.230.01:53:15.66#ibcon#read 5, iclass 28, count 0 2006.230.01:53:15.66#ibcon#about to read 6, iclass 28, count 0 2006.230.01:53:15.66#ibcon#read 6, iclass 28, count 0 2006.230.01:53:15.66#ibcon#end of sib2, iclass 28, count 0 2006.230.01:53:15.66#ibcon#*after write, iclass 28, count 0 2006.230.01:53:15.66#ibcon#*before return 0, iclass 28, count 0 2006.230.01:53:15.66#ibcon#after mode 2 write, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:15.66#ibcon#end of loop, iclass 28 iclrec 2 cls_cnt 0 2006.230.01:53:15.66#ibcon#about to clear, iclass 28 cls_cnt 0 2006.230.01:53:15.66#ibcon#cleared, iclass 28 cls_cnt 0 2006.230.01:53:15.66$vck44/vblo=6,719.99 2006.230.01:53:15.66#ibcon#iclass 30 nclrec 1 cls_cnt 2 2006.230.01:53:15.66#ibcon#iclass 30 iclrec 1 cls_cnt 2 2006.230.01:53:15.66#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:15.66#ibcon#before find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:15.66#ibcon#after find_delay mode 2, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:15.66#ibcon#before mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:15.66#ibcon#enter wrdev, iclass 30, count 0 2006.230.01:53:15.66#ibcon#first serial, iclass 30, count 0 2006.230.01:53:15.66#ibcon#enter sib2, iclass 30, count 0 2006.230.01:53:15.66#ibcon#flushed, iclass 30, count 0 2006.230.01:53:15.66#ibcon#about to write, iclass 30, count 0 2006.230.01:53:15.66#ibcon#wrote, iclass 30, count 0 2006.230.01:53:15.66#ibcon#about to read 3, iclass 30, count 0 2006.230.01:53:15.69#ibcon#read 3, iclass 30, count 0 2006.230.01:53:15.69#ibcon#about to read 4, iclass 30, count 0 2006.230.01:53:15.69#ibcon#read 4, iclass 30, count 0 2006.230.01:53:15.69#ibcon#about to read 5, iclass 30, count 0 2006.230.01:53:15.69#ibcon#read 5, iclass 30, count 0 2006.230.01:53:15.69#ibcon#about to read 6, iclass 30, count 0 2006.230.01:53:15.69#ibcon#read 6, iclass 30, count 0 2006.230.01:53:15.69#ibcon#end of sib2, iclass 30, count 0 2006.230.01:53:15.69#ibcon#*mode == 0, iclass 30, count 0 2006.230.01:53:15.69#ibcon#*mode == 0 && serial, iclass 30, count 0 2006.230.01:53:15.69#ibcon#[28=FRQ=06,719.99\r\n] 2006.230.01:53:15.69#ibcon#*before write, iclass 30, count 0 2006.230.01:53:15.69#ibcon#enter sib2, iclass 30, count 0 2006.230.01:53:15.69#ibcon#flushed, iclass 30, count 0 2006.230.01:53:15.69#ibcon#about to write, iclass 30, count 0 2006.230.01:53:15.69#ibcon#wrote, iclass 30, count 0 2006.230.01:53:15.69#ibcon#about to read 3, iclass 30, count 0 2006.230.01:53:15.73#ibcon#read 3, iclass 30, count 0 2006.230.01:53:15.73#ibcon#about to read 4, iclass 30, count 0 2006.230.01:53:15.73#ibcon#read 4, iclass 30, count 0 2006.230.01:53:15.73#ibcon#about to read 5, iclass 30, count 0 2006.230.01:53:15.73#ibcon#read 5, iclass 30, count 0 2006.230.01:53:15.73#ibcon#about to read 6, iclass 30, count 0 2006.230.01:53:15.73#ibcon#read 6, iclass 30, count 0 2006.230.01:53:15.73#ibcon#end of sib2, iclass 30, count 0 2006.230.01:53:15.73#ibcon#*after write, iclass 30, count 0 2006.230.01:53:15.73#ibcon#*before return 0, iclass 30, count 0 2006.230.01:53:15.73#ibcon#after mode 2 write, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:15.73#ibcon#end of loop, iclass 30 iclrec 1 cls_cnt 0 2006.230.01:53:15.73#ibcon#about to clear, iclass 30 cls_cnt 0 2006.230.01:53:15.73#ibcon#cleared, iclass 30 cls_cnt 0 2006.230.01:53:15.73$vck44/vb=6,4 2006.230.01:53:15.73#ibcon#iclass 32 nclrec 2 cls_cnt 3 2006.230.01:53:15.73#ibcon#iclass 32 iclrec 1 cls_cnt 3 2006.230.01:53:15.73#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:15.73#ibcon#before find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:15.78#ibcon#after find_delay mode 2, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:15.78#ibcon#before mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:15.78#ibcon#enter wrdev, iclass 32, count 2 2006.230.01:53:15.78#ibcon#first serial, iclass 32, count 2 2006.230.01:53:15.78#ibcon#enter sib2, iclass 32, count 2 2006.230.01:53:15.78#ibcon#flushed, iclass 32, count 2 2006.230.01:53:15.78#ibcon#about to write, iclass 32, count 2 2006.230.01:53:15.78#ibcon#wrote, iclass 32, count 2 2006.230.01:53:15.78#ibcon#about to read 3, iclass 32, count 2 2006.230.01:53:15.80#ibcon#read 3, iclass 32, count 2 2006.230.01:53:15.80#ibcon#about to read 4, iclass 32, count 2 2006.230.01:53:15.80#ibcon#read 4, iclass 32, count 2 2006.230.01:53:15.80#ibcon#about to read 5, iclass 32, count 2 2006.230.01:53:15.80#ibcon#read 5, iclass 32, count 2 2006.230.01:53:15.80#ibcon#about to read 6, iclass 32, count 2 2006.230.01:53:15.80#ibcon#read 6, iclass 32, count 2 2006.230.01:53:15.80#ibcon#end of sib2, iclass 32, count 2 2006.230.01:53:15.80#ibcon#*mode == 0, iclass 32, count 2 2006.230.01:53:15.80#ibcon#*mode == 0 && serial, iclass 32, count 2 2006.230.01:53:15.80#ibcon#[27=AT06-04\r\n] 2006.230.01:53:15.80#ibcon#*before write, iclass 32, count 2 2006.230.01:53:15.80#ibcon#enter sib2, iclass 32, count 2 2006.230.01:53:15.80#ibcon#flushed, iclass 32, count 2 2006.230.01:53:15.80#ibcon#about to write, iclass 32, count 2 2006.230.01:53:15.80#ibcon#wrote, iclass 32, count 2 2006.230.01:53:15.80#ibcon#about to read 3, iclass 32, count 2 2006.230.01:53:15.83#ibcon#read 3, iclass 32, count 2 2006.230.01:53:15.83#ibcon#about to read 4, iclass 32, count 2 2006.230.01:53:15.83#ibcon#read 4, iclass 32, count 2 2006.230.01:53:15.83#ibcon#about to read 5, iclass 32, count 2 2006.230.01:53:15.83#ibcon#read 5, iclass 32, count 2 2006.230.01:53:15.83#ibcon#about to read 6, iclass 32, count 2 2006.230.01:53:15.83#ibcon#read 6, iclass 32, count 2 2006.230.01:53:15.83#ibcon#end of sib2, iclass 32, count 2 2006.230.01:53:15.83#ibcon#*after write, iclass 32, count 2 2006.230.01:53:15.83#ibcon#*before return 0, iclass 32, count 2 2006.230.01:53:15.83#ibcon#after mode 2 write, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:15.83#ibcon#end of loop, iclass 32 iclrec 1 cls_cnt 2 2006.230.01:53:15.83#ibcon#iclass 32 iclrec 2 cls_cnt 2 2006.230.01:53:15.83#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:15.83#ibcon#before find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:15.95#ibcon#after find_delay mode 2, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:15.95#ibcon#before mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:15.95#ibcon#enter wrdev, iclass 32, count 0 2006.230.01:53:15.95#ibcon#first serial, iclass 32, count 0 2006.230.01:53:15.95#ibcon#enter sib2, iclass 32, count 0 2006.230.01:53:15.95#ibcon#flushed, iclass 32, count 0 2006.230.01:53:15.95#ibcon#about to write, iclass 32, count 0 2006.230.01:53:15.95#ibcon#wrote, iclass 32, count 0 2006.230.01:53:15.95#ibcon#about to read 3, iclass 32, count 0 2006.230.01:53:15.97#ibcon#read 3, iclass 32, count 0 2006.230.01:53:15.97#ibcon#about to read 4, iclass 32, count 0 2006.230.01:53:15.97#ibcon#read 4, iclass 32, count 0 2006.230.01:53:15.97#ibcon#about to read 5, iclass 32, count 0 2006.230.01:53:15.97#ibcon#read 5, iclass 32, count 0 2006.230.01:53:15.97#ibcon#about to read 6, iclass 32, count 0 2006.230.01:53:15.97#ibcon#read 6, iclass 32, count 0 2006.230.01:53:15.97#ibcon#end of sib2, iclass 32, count 0 2006.230.01:53:15.97#ibcon#*mode == 0, iclass 32, count 0 2006.230.01:53:15.97#ibcon#*mode == 0 && serial, iclass 32, count 0 2006.230.01:53:15.97#ibcon#[27=USB\r\n] 2006.230.01:53:15.97#ibcon#*before write, iclass 32, count 0 2006.230.01:53:15.97#ibcon#enter sib2, iclass 32, count 0 2006.230.01:53:15.97#ibcon#flushed, iclass 32, count 0 2006.230.01:53:15.97#ibcon#about to write, iclass 32, count 0 2006.230.01:53:15.97#ibcon#wrote, iclass 32, count 0 2006.230.01:53:15.97#ibcon#about to read 3, iclass 32, count 0 2006.230.01:53:16.00#ibcon#read 3, iclass 32, count 0 2006.230.01:53:16.00#ibcon#about to read 4, iclass 32, count 0 2006.230.01:53:16.00#ibcon#read 4, iclass 32, count 0 2006.230.01:53:16.00#ibcon#about to read 5, iclass 32, count 0 2006.230.01:53:16.00#ibcon#read 5, iclass 32, count 0 2006.230.01:53:16.00#ibcon#about to read 6, iclass 32, count 0 2006.230.01:53:16.00#ibcon#read 6, iclass 32, count 0 2006.230.01:53:16.00#ibcon#end of sib2, iclass 32, count 0 2006.230.01:53:16.00#ibcon#*after write, iclass 32, count 0 2006.230.01:53:16.00#ibcon#*before return 0, iclass 32, count 0 2006.230.01:53:16.00#ibcon#after mode 2 write, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:16.00#ibcon#end of loop, iclass 32 iclrec 2 cls_cnt 0 2006.230.01:53:16.00#ibcon#about to clear, iclass 32 cls_cnt 0 2006.230.01:53:16.00#ibcon#cleared, iclass 32 cls_cnt 0 2006.230.01:53:16.00$vck44/vblo=7,734.99 2006.230.01:53:16.00#ibcon#iclass 34 nclrec 1 cls_cnt 2 2006.230.01:53:16.00#ibcon#iclass 34 iclrec 1 cls_cnt 2 2006.230.01:53:16.00#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:16.00#ibcon#before find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:16.00#ibcon#after find_delay mode 2, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:16.00#ibcon#before mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:16.00#ibcon#enter wrdev, iclass 34, count 0 2006.230.01:53:16.00#ibcon#first serial, iclass 34, count 0 2006.230.01:53:16.00#ibcon#enter sib2, iclass 34, count 0 2006.230.01:53:16.00#ibcon#flushed, iclass 34, count 0 2006.230.01:53:16.00#ibcon#about to write, iclass 34, count 0 2006.230.01:53:16.00#ibcon#wrote, iclass 34, count 0 2006.230.01:53:16.00#ibcon#about to read 3, iclass 34, count 0 2006.230.01:53:16.02#ibcon#read 3, iclass 34, count 0 2006.230.01:53:16.02#ibcon#about to read 4, iclass 34, count 0 2006.230.01:53:16.02#ibcon#read 4, iclass 34, count 0 2006.230.01:53:16.02#ibcon#about to read 5, iclass 34, count 0 2006.230.01:53:16.02#ibcon#read 5, iclass 34, count 0 2006.230.01:53:16.02#ibcon#about to read 6, iclass 34, count 0 2006.230.01:53:16.02#ibcon#read 6, iclass 34, count 0 2006.230.01:53:16.02#ibcon#end of sib2, iclass 34, count 0 2006.230.01:53:16.02#ibcon#*mode == 0, iclass 34, count 0 2006.230.01:53:16.02#ibcon#*mode == 0 && serial, iclass 34, count 0 2006.230.01:53:16.02#ibcon#[28=FRQ=07,734.99\r\n] 2006.230.01:53:16.02#ibcon#*before write, iclass 34, count 0 2006.230.01:53:16.02#ibcon#enter sib2, iclass 34, count 0 2006.230.01:53:16.02#ibcon#flushed, iclass 34, count 0 2006.230.01:53:16.02#ibcon#about to write, iclass 34, count 0 2006.230.01:53:16.02#ibcon#wrote, iclass 34, count 0 2006.230.01:53:16.02#ibcon#about to read 3, iclass 34, count 0 2006.230.01:53:16.06#ibcon#read 3, iclass 34, count 0 2006.230.01:53:16.06#ibcon#about to read 4, iclass 34, count 0 2006.230.01:53:16.06#ibcon#read 4, iclass 34, count 0 2006.230.01:53:16.06#ibcon#about to read 5, iclass 34, count 0 2006.230.01:53:16.06#ibcon#read 5, iclass 34, count 0 2006.230.01:53:16.06#ibcon#about to read 6, iclass 34, count 0 2006.230.01:53:16.06#ibcon#read 6, iclass 34, count 0 2006.230.01:53:16.06#ibcon#end of sib2, iclass 34, count 0 2006.230.01:53:16.06#ibcon#*after write, iclass 34, count 0 2006.230.01:53:16.06#ibcon#*before return 0, iclass 34, count 0 2006.230.01:53:16.06#ibcon#after mode 2 write, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:16.06#ibcon#end of loop, iclass 34 iclrec 1 cls_cnt 0 2006.230.01:53:16.06#ibcon#about to clear, iclass 34 cls_cnt 0 2006.230.01:53:16.06#ibcon#cleared, iclass 34 cls_cnt 0 2006.230.01:53:16.06$vck44/vb=7,4 2006.230.01:53:16.06#ibcon#iclass 36 nclrec 2 cls_cnt 3 2006.230.01:53:16.06#ibcon#iclass 36 iclrec 1 cls_cnt 3 2006.230.01:53:16.06#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:16.06#ibcon#before find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:16.12#ibcon#after find_delay mode 2, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:16.12#ibcon#before mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:16.12#ibcon#enter wrdev, iclass 36, count 2 2006.230.01:53:16.12#ibcon#first serial, iclass 36, count 2 2006.230.01:53:16.12#ibcon#enter sib2, iclass 36, count 2 2006.230.01:53:16.12#ibcon#flushed, iclass 36, count 2 2006.230.01:53:16.12#ibcon#about to write, iclass 36, count 2 2006.230.01:53:16.12#ibcon#wrote, iclass 36, count 2 2006.230.01:53:16.12#ibcon#about to read 3, iclass 36, count 2 2006.230.01:53:16.14#ibcon#read 3, iclass 36, count 2 2006.230.01:53:16.14#ibcon#about to read 4, iclass 36, count 2 2006.230.01:53:16.14#ibcon#read 4, iclass 36, count 2 2006.230.01:53:16.14#ibcon#about to read 5, iclass 36, count 2 2006.230.01:53:16.14#ibcon#read 5, iclass 36, count 2 2006.230.01:53:16.14#ibcon#about to read 6, iclass 36, count 2 2006.230.01:53:16.14#ibcon#read 6, iclass 36, count 2 2006.230.01:53:16.14#ibcon#end of sib2, iclass 36, count 2 2006.230.01:53:16.14#ibcon#*mode == 0, iclass 36, count 2 2006.230.01:53:16.14#ibcon#*mode == 0 && serial, iclass 36, count 2 2006.230.01:53:16.14#ibcon#[27=AT07-04\r\n] 2006.230.01:53:16.14#ibcon#*before write, iclass 36, count 2 2006.230.01:53:16.14#ibcon#enter sib2, iclass 36, count 2 2006.230.01:53:16.14#ibcon#flushed, iclass 36, count 2 2006.230.01:53:16.14#ibcon#about to write, iclass 36, count 2 2006.230.01:53:16.14#ibcon#wrote, iclass 36, count 2 2006.230.01:53:16.14#ibcon#about to read 3, iclass 36, count 2 2006.230.01:53:16.17#ibcon#read 3, iclass 36, count 2 2006.230.01:53:16.17#ibcon#about to read 4, iclass 36, count 2 2006.230.01:53:16.17#ibcon#read 4, iclass 36, count 2 2006.230.01:53:16.17#ibcon#about to read 5, iclass 36, count 2 2006.230.01:53:16.17#ibcon#read 5, iclass 36, count 2 2006.230.01:53:16.17#ibcon#about to read 6, iclass 36, count 2 2006.230.01:53:16.17#ibcon#read 6, iclass 36, count 2 2006.230.01:53:16.17#ibcon#end of sib2, iclass 36, count 2 2006.230.01:53:16.17#ibcon#*after write, iclass 36, count 2 2006.230.01:53:16.17#ibcon#*before return 0, iclass 36, count 2 2006.230.01:53:16.17#ibcon#after mode 2 write, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:16.17#ibcon#end of loop, iclass 36 iclrec 1 cls_cnt 2 2006.230.01:53:16.17#ibcon#iclass 36 iclrec 2 cls_cnt 2 2006.230.01:53:16.17#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:16.17#ibcon#before find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:16.29#ibcon#after find_delay mode 2, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:16.29#ibcon#before mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:16.29#ibcon#enter wrdev, iclass 36, count 0 2006.230.01:53:16.29#ibcon#first serial, iclass 36, count 0 2006.230.01:53:16.29#ibcon#enter sib2, iclass 36, count 0 2006.230.01:53:16.29#ibcon#flushed, iclass 36, count 0 2006.230.01:53:16.29#ibcon#about to write, iclass 36, count 0 2006.230.01:53:16.29#ibcon#wrote, iclass 36, count 0 2006.230.01:53:16.29#ibcon#about to read 3, iclass 36, count 0 2006.230.01:53:16.31#ibcon#read 3, iclass 36, count 0 2006.230.01:53:16.31#ibcon#about to read 4, iclass 36, count 0 2006.230.01:53:16.31#ibcon#read 4, iclass 36, count 0 2006.230.01:53:16.31#ibcon#about to read 5, iclass 36, count 0 2006.230.01:53:16.31#ibcon#read 5, iclass 36, count 0 2006.230.01:53:16.31#ibcon#about to read 6, iclass 36, count 0 2006.230.01:53:16.31#ibcon#read 6, iclass 36, count 0 2006.230.01:53:16.31#ibcon#end of sib2, iclass 36, count 0 2006.230.01:53:16.31#ibcon#*mode == 0, iclass 36, count 0 2006.230.01:53:16.31#ibcon#*mode == 0 && serial, iclass 36, count 0 2006.230.01:53:16.31#ibcon#[27=USB\r\n] 2006.230.01:53:16.31#ibcon#*before write, iclass 36, count 0 2006.230.01:53:16.31#ibcon#enter sib2, iclass 36, count 0 2006.230.01:53:16.31#ibcon#flushed, iclass 36, count 0 2006.230.01:53:16.31#ibcon#about to write, iclass 36, count 0 2006.230.01:53:16.31#ibcon#wrote, iclass 36, count 0 2006.230.01:53:16.31#ibcon#about to read 3, iclass 36, count 0 2006.230.01:53:16.34#ibcon#read 3, iclass 36, count 0 2006.230.01:53:16.34#ibcon#about to read 4, iclass 36, count 0 2006.230.01:53:16.34#ibcon#read 4, iclass 36, count 0 2006.230.01:53:16.34#ibcon#about to read 5, iclass 36, count 0 2006.230.01:53:16.34#ibcon#read 5, iclass 36, count 0 2006.230.01:53:16.34#ibcon#about to read 6, iclass 36, count 0 2006.230.01:53:16.34#ibcon#read 6, iclass 36, count 0 2006.230.01:53:16.34#ibcon#end of sib2, iclass 36, count 0 2006.230.01:53:16.34#ibcon#*after write, iclass 36, count 0 2006.230.01:53:16.34#ibcon#*before return 0, iclass 36, count 0 2006.230.01:53:16.34#ibcon#after mode 2 write, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:16.34#ibcon#end of loop, iclass 36 iclrec 2 cls_cnt 0 2006.230.01:53:16.34#ibcon#about to clear, iclass 36 cls_cnt 0 2006.230.01:53:16.34#ibcon#cleared, iclass 36 cls_cnt 0 2006.230.01:53:16.34$vck44/vblo=8,744.99 2006.230.01:53:16.34#ibcon#iclass 38 nclrec 1 cls_cnt 2 2006.230.01:53:16.34#ibcon#iclass 38 iclrec 1 cls_cnt 2 2006.230.01:53:16.34#ibcon#ireg 17 cls_cnt 0 2006.230.01:53:16.34#ibcon#before find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:16.34#ibcon#after find_delay mode 2, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:16.34#ibcon#before mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:16.34#ibcon#enter wrdev, iclass 38, count 0 2006.230.01:53:16.34#ibcon#first serial, iclass 38, count 0 2006.230.01:53:16.34#ibcon#enter sib2, iclass 38, count 0 2006.230.01:53:16.34#ibcon#flushed, iclass 38, count 0 2006.230.01:53:16.34#ibcon#about to write, iclass 38, count 0 2006.230.01:53:16.34#ibcon#wrote, iclass 38, count 0 2006.230.01:53:16.34#ibcon#about to read 3, iclass 38, count 0 2006.230.01:53:16.37#ibcon#read 3, iclass 38, count 0 2006.230.01:53:16.37#ibcon#about to read 4, iclass 38, count 0 2006.230.01:53:16.37#ibcon#read 4, iclass 38, count 0 2006.230.01:53:16.37#ibcon#about to read 5, iclass 38, count 0 2006.230.01:53:16.37#ibcon#read 5, iclass 38, count 0 2006.230.01:53:16.37#ibcon#about to read 6, iclass 38, count 0 2006.230.01:53:16.37#ibcon#read 6, iclass 38, count 0 2006.230.01:53:16.37#ibcon#end of sib2, iclass 38, count 0 2006.230.01:53:16.37#ibcon#*mode == 0, iclass 38, count 0 2006.230.01:53:16.37#ibcon#*mode == 0 && serial, iclass 38, count 0 2006.230.01:53:16.37#ibcon#[28=FRQ=08,744.99\r\n] 2006.230.01:53:16.37#ibcon#*before write, iclass 38, count 0 2006.230.01:53:16.37#ibcon#enter sib2, iclass 38, count 0 2006.230.01:53:16.37#ibcon#flushed, iclass 38, count 0 2006.230.01:53:16.37#ibcon#about to write, iclass 38, count 0 2006.230.01:53:16.37#ibcon#wrote, iclass 38, count 0 2006.230.01:53:16.37#ibcon#about to read 3, iclass 38, count 0 2006.230.01:53:16.41#ibcon#read 3, iclass 38, count 0 2006.230.01:53:16.41#ibcon#about to read 4, iclass 38, count 0 2006.230.01:53:16.41#ibcon#read 4, iclass 38, count 0 2006.230.01:53:16.41#ibcon#about to read 5, iclass 38, count 0 2006.230.01:53:16.41#ibcon#read 5, iclass 38, count 0 2006.230.01:53:16.41#ibcon#about to read 6, iclass 38, count 0 2006.230.01:53:16.41#ibcon#read 6, iclass 38, count 0 2006.230.01:53:16.41#ibcon#end of sib2, iclass 38, count 0 2006.230.01:53:16.41#ibcon#*after write, iclass 38, count 0 2006.230.01:53:16.41#ibcon#*before return 0, iclass 38, count 0 2006.230.01:53:16.41#ibcon#after mode 2 write, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:16.41#ibcon#end of loop, iclass 38 iclrec 1 cls_cnt 0 2006.230.01:53:16.41#ibcon#about to clear, iclass 38 cls_cnt 0 2006.230.01:53:16.41#ibcon#cleared, iclass 38 cls_cnt 0 2006.230.01:53:16.41$vck44/vb=8,4 2006.230.01:53:16.41#ibcon#iclass 40 nclrec 2 cls_cnt 3 2006.230.01:53:16.41#ibcon#iclass 40 iclrec 1 cls_cnt 3 2006.230.01:53:16.41#ibcon#ireg 11 cls_cnt 2 2006.230.01:53:16.41#ibcon#before find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:16.46#ibcon#after find_delay mode 2, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:16.46#ibcon#before mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:16.46#ibcon#enter wrdev, iclass 40, count 2 2006.230.01:53:16.46#ibcon#first serial, iclass 40, count 2 2006.230.01:53:16.46#ibcon#enter sib2, iclass 40, count 2 2006.230.01:53:16.46#ibcon#flushed, iclass 40, count 2 2006.230.01:53:16.46#ibcon#about to write, iclass 40, count 2 2006.230.01:53:16.46#ibcon#wrote, iclass 40, count 2 2006.230.01:53:16.46#ibcon#about to read 3, iclass 40, count 2 2006.230.01:53:16.48#ibcon#read 3, iclass 40, count 2 2006.230.01:53:16.48#ibcon#about to read 4, iclass 40, count 2 2006.230.01:53:16.48#ibcon#read 4, iclass 40, count 2 2006.230.01:53:16.48#ibcon#about to read 5, iclass 40, count 2 2006.230.01:53:16.48#ibcon#read 5, iclass 40, count 2 2006.230.01:53:16.48#ibcon#about to read 6, iclass 40, count 2 2006.230.01:53:16.48#ibcon#read 6, iclass 40, count 2 2006.230.01:53:16.48#ibcon#end of sib2, iclass 40, count 2 2006.230.01:53:16.48#ibcon#*mode == 0, iclass 40, count 2 2006.230.01:53:16.48#ibcon#*mode == 0 && serial, iclass 40, count 2 2006.230.01:53:16.48#ibcon#[27=AT08-04\r\n] 2006.230.01:53:16.48#ibcon#*before write, iclass 40, count 2 2006.230.01:53:16.48#ibcon#enter sib2, iclass 40, count 2 2006.230.01:53:16.48#ibcon#flushed, iclass 40, count 2 2006.230.01:53:16.48#ibcon#about to write, iclass 40, count 2 2006.230.01:53:16.48#ibcon#wrote, iclass 40, count 2 2006.230.01:53:16.48#ibcon#about to read 3, iclass 40, count 2 2006.230.01:53:16.51#ibcon#read 3, iclass 40, count 2 2006.230.01:53:16.51#ibcon#about to read 4, iclass 40, count 2 2006.230.01:53:16.51#ibcon#read 4, iclass 40, count 2 2006.230.01:53:16.51#ibcon#about to read 5, iclass 40, count 2 2006.230.01:53:16.51#ibcon#read 5, iclass 40, count 2 2006.230.01:53:16.51#ibcon#about to read 6, iclass 40, count 2 2006.230.01:53:16.51#ibcon#read 6, iclass 40, count 2 2006.230.01:53:16.51#ibcon#end of sib2, iclass 40, count 2 2006.230.01:53:16.51#ibcon#*after write, iclass 40, count 2 2006.230.01:53:16.51#ibcon#*before return 0, iclass 40, count 2 2006.230.01:53:16.51#ibcon#after mode 2 write, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:16.51#ibcon#end of loop, iclass 40 iclrec 1 cls_cnt 2 2006.230.01:53:16.51#ibcon#iclass 40 iclrec 2 cls_cnt 2 2006.230.01:53:16.51#ibcon#ireg 7 cls_cnt 0 2006.230.01:53:16.51#ibcon#before find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:16.63#ibcon#after find_delay mode 2, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:16.63#ibcon#before mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:16.63#ibcon#enter wrdev, iclass 40, count 0 2006.230.01:53:16.63#ibcon#first serial, iclass 40, count 0 2006.230.01:53:16.63#ibcon#enter sib2, iclass 40, count 0 2006.230.01:53:16.63#ibcon#flushed, iclass 40, count 0 2006.230.01:53:16.63#ibcon#about to write, iclass 40, count 0 2006.230.01:53:16.63#ibcon#wrote, iclass 40, count 0 2006.230.01:53:16.63#ibcon#about to read 3, iclass 40, count 0 2006.230.01:53:16.65#ibcon#read 3, iclass 40, count 0 2006.230.01:53:16.65#ibcon#about to read 4, iclass 40, count 0 2006.230.01:53:16.65#ibcon#read 4, iclass 40, count 0 2006.230.01:53:16.65#ibcon#about to read 5, iclass 40, count 0 2006.230.01:53:16.65#ibcon#read 5, iclass 40, count 0 2006.230.01:53:16.65#ibcon#about to read 6, iclass 40, count 0 2006.230.01:53:16.65#ibcon#read 6, iclass 40, count 0 2006.230.01:53:16.65#ibcon#end of sib2, iclass 40, count 0 2006.230.01:53:16.65#ibcon#*mode == 0, iclass 40, count 0 2006.230.01:53:16.65#ibcon#*mode == 0 && serial, iclass 40, count 0 2006.230.01:53:16.65#ibcon#[27=USB\r\n] 2006.230.01:53:16.65#ibcon#*before write, iclass 40, count 0 2006.230.01:53:16.65#ibcon#enter sib2, iclass 40, count 0 2006.230.01:53:16.65#ibcon#flushed, iclass 40, count 0 2006.230.01:53:16.65#ibcon#about to write, iclass 40, count 0 2006.230.01:53:16.65#ibcon#wrote, iclass 40, count 0 2006.230.01:53:16.65#ibcon#about to read 3, iclass 40, count 0 2006.230.01:53:16.68#ibcon#read 3, iclass 40, count 0 2006.230.01:53:16.68#ibcon#about to read 4, iclass 40, count 0 2006.230.01:53:16.68#ibcon#read 4, iclass 40, count 0 2006.230.01:53:16.68#ibcon#about to read 5, iclass 40, count 0 2006.230.01:53:16.68#ibcon#read 5, iclass 40, count 0 2006.230.01:53:16.68#ibcon#about to read 6, iclass 40, count 0 2006.230.01:53:16.68#ibcon#read 6, iclass 40, count 0 2006.230.01:53:16.68#ibcon#end of sib2, iclass 40, count 0 2006.230.01:53:16.68#ibcon#*after write, iclass 40, count 0 2006.230.01:53:16.68#ibcon#*before return 0, iclass 40, count 0 2006.230.01:53:16.68#ibcon#after mode 2 write, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:16.68#ibcon#end of loop, iclass 40 iclrec 2 cls_cnt 0 2006.230.01:53:16.68#ibcon#about to clear, iclass 40 cls_cnt 0 2006.230.01:53:16.68#ibcon#cleared, iclass 40 cls_cnt 0 2006.230.01:53:16.68$vck44/vabw=wide 2006.230.01:53:16.68#ibcon#iclass 4 nclrec 1 cls_cnt 2 2006.230.01:53:16.68#ibcon#iclass 4 iclrec 1 cls_cnt 2 2006.230.01:53:16.68#ibcon#ireg 8 cls_cnt 0 2006.230.01:53:16.68#ibcon#before find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:16.68#ibcon#after find_delay mode 2, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:16.68#ibcon#before mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:16.68#ibcon#enter wrdev, iclass 4, count 0 2006.230.01:53:16.68#ibcon#first serial, iclass 4, count 0 2006.230.01:53:16.68#ibcon#enter sib2, iclass 4, count 0 2006.230.01:53:16.68#ibcon#flushed, iclass 4, count 0 2006.230.01:53:16.68#ibcon#about to write, iclass 4, count 0 2006.230.01:53:16.68#ibcon#wrote, iclass 4, count 0 2006.230.01:53:16.68#ibcon#about to read 3, iclass 4, count 0 2006.230.01:53:16.71#ibcon#read 3, iclass 4, count 0 2006.230.01:53:16.71#ibcon#about to read 4, iclass 4, count 0 2006.230.01:53:16.71#ibcon#read 4, iclass 4, count 0 2006.230.01:53:16.71#ibcon#about to read 5, iclass 4, count 0 2006.230.01:53:16.71#ibcon#read 5, iclass 4, count 0 2006.230.01:53:16.71#ibcon#about to read 6, iclass 4, count 0 2006.230.01:53:16.71#ibcon#read 6, iclass 4, count 0 2006.230.01:53:16.71#ibcon#end of sib2, iclass 4, count 0 2006.230.01:53:16.71#ibcon#*mode == 0, iclass 4, count 0 2006.230.01:53:16.71#ibcon#*mode == 0 && serial, iclass 4, count 0 2006.230.01:53:16.71#ibcon#[25=BW32\r\n] 2006.230.01:53:16.71#ibcon#*before write, iclass 4, count 0 2006.230.01:53:16.71#ibcon#enter sib2, iclass 4, count 0 2006.230.01:53:16.71#ibcon#flushed, iclass 4, count 0 2006.230.01:53:16.71#ibcon#about to write, iclass 4, count 0 2006.230.01:53:16.71#ibcon#wrote, iclass 4, count 0 2006.230.01:53:16.71#ibcon#about to read 3, iclass 4, count 0 2006.230.01:53:16.74#ibcon#read 3, iclass 4, count 0 2006.230.01:53:16.74#ibcon#about to read 4, iclass 4, count 0 2006.230.01:53:16.74#ibcon#read 4, iclass 4, count 0 2006.230.01:53:16.74#ibcon#about to read 5, iclass 4, count 0 2006.230.01:53:16.74#ibcon#read 5, iclass 4, count 0 2006.230.01:53:16.74#ibcon#about to read 6, iclass 4, count 0 2006.230.01:53:16.74#ibcon#read 6, iclass 4, count 0 2006.230.01:53:16.74#ibcon#end of sib2, iclass 4, count 0 2006.230.01:53:16.74#ibcon#*after write, iclass 4, count 0 2006.230.01:53:16.74#ibcon#*before return 0, iclass 4, count 0 2006.230.01:53:16.74#ibcon#after mode 2 write, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:16.74#ibcon#end of loop, iclass 4 iclrec 1 cls_cnt 0 2006.230.01:53:16.74#ibcon#about to clear, iclass 4 cls_cnt 0 2006.230.01:53:16.74#ibcon#cleared, iclass 4 cls_cnt 0 2006.230.01:53:16.74$vck44/vbbw=wide 2006.230.01:53:16.74#ibcon#iclass 6 nclrec 1 cls_cnt 2 2006.230.01:53:16.74#ibcon#iclass 6 iclrec 1 cls_cnt 2 2006.230.01:53:16.74#ibcon#ireg 8 cls_cnt 0 2006.230.01:53:16.74#ibcon#before find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:53:16.80#ibcon#after find_delay mode 2, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:53:16.80#ibcon#before mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:53:16.80#ibcon#enter wrdev, iclass 6, count 0 2006.230.01:53:16.80#ibcon#first serial, iclass 6, count 0 2006.230.01:53:16.80#ibcon#enter sib2, iclass 6, count 0 2006.230.01:53:16.80#ibcon#flushed, iclass 6, count 0 2006.230.01:53:16.80#ibcon#about to write, iclass 6, count 0 2006.230.01:53:16.80#ibcon#wrote, iclass 6, count 0 2006.230.01:53:16.80#ibcon#about to read 3, iclass 6, count 0 2006.230.01:53:16.82#ibcon#read 3, iclass 6, count 0 2006.230.01:53:16.82#ibcon#about to read 4, iclass 6, count 0 2006.230.01:53:16.82#ibcon#read 4, iclass 6, count 0 2006.230.01:53:16.82#ibcon#about to read 5, iclass 6, count 0 2006.230.01:53:16.82#ibcon#read 5, iclass 6, count 0 2006.230.01:53:16.82#ibcon#about to read 6, iclass 6, count 0 2006.230.01:53:16.82#ibcon#read 6, iclass 6, count 0 2006.230.01:53:16.82#ibcon#end of sib2, iclass 6, count 0 2006.230.01:53:16.82#ibcon#*mode == 0, iclass 6, count 0 2006.230.01:53:16.82#ibcon#*mode == 0 && serial, iclass 6, count 0 2006.230.01:53:16.82#ibcon#[27=BW32\r\n] 2006.230.01:53:16.82#ibcon#*before write, iclass 6, count 0 2006.230.01:53:16.82#ibcon#enter sib2, iclass 6, count 0 2006.230.01:53:16.82#ibcon#flushed, iclass 6, count 0 2006.230.01:53:16.82#ibcon#about to write, iclass 6, count 0 2006.230.01:53:16.82#ibcon#wrote, iclass 6, count 0 2006.230.01:53:16.82#ibcon#about to read 3, iclass 6, count 0 2006.230.01:53:16.85#ibcon#read 3, iclass 6, count 0 2006.230.01:53:16.85#ibcon#about to read 4, iclass 6, count 0 2006.230.01:53:16.85#ibcon#read 4, iclass 6, count 0 2006.230.01:53:16.85#ibcon#about to read 5, iclass 6, count 0 2006.230.01:53:16.85#ibcon#read 5, iclass 6, count 0 2006.230.01:53:16.85#ibcon#about to read 6, iclass 6, count 0 2006.230.01:53:16.85#ibcon#read 6, iclass 6, count 0 2006.230.01:53:16.85#ibcon#end of sib2, iclass 6, count 0 2006.230.01:53:16.85#ibcon#*after write, iclass 6, count 0 2006.230.01:53:16.85#ibcon#*before return 0, iclass 6, count 0 2006.230.01:53:16.85#ibcon#after mode 2 write, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:53:16.85#ibcon#end of loop, iclass 6 iclrec 1 cls_cnt 0 2006.230.01:53:16.85#ibcon#about to clear, iclass 6 cls_cnt 0 2006.230.01:53:16.85#ibcon#cleared, iclass 6 cls_cnt 0 2006.230.01:53:16.85$setupk4/ifdk4 2006.230.01:53:16.85$ifdk4/lo= 2006.230.01:53:16.85$ifdk4/lo=lo1,7680.00,usb,rcp,1 2006.230.01:53:16.85$ifdk4/lo=lo2,1600.00,usb,rcp,1 2006.230.01:53:16.85$ifdk4/patch= 2006.230.01:53:16.85$ifdk4/patch=lo1,a1,a2,a3,a4,a5,a6,a7,a8 2006.230.01:53:16.85$ifdk4/patch=lo2,b1,b2,b3,b4,b5,b6,b7,b8 2006.230.01:53:16.85$setupk4/!*+20s 2006.230.01:53:19.17#abcon#<5=/08 2.0 6.9 33.05 651002.7\r\n> 2006.230.01:53:19.19#abcon#{5=INTERFACE CLEAR} 2006.230.01:53:19.25#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:53:29.34#abcon#<5=/08 2.0 6.8 33.05 671002.6\r\n> 2006.230.01:53:29.36#abcon#{5=INTERFACE CLEAR} 2006.230.01:53:29.42#abcon#[5=S1D000X0/0*\r\n] 2006.230.01:53:31.35$setupk4/"tpicd 2006.230.01:53:31.35$setupk4/echo=off 2006.230.01:53:31.35$setupk4/xlog=off 2006.230.01:53:31.35:!2006.230.01:54:14 2006.230.01:53:42.14#trakl#Source acquired 2006.230.01:53:43.14#flagr#flagr/antenna,acquired 2006.230.01:54:14.00:preob 2006.230.01:54:14.14/onsource/TRACKING 2006.230.01:54:14.14:!2006.230.01:54:24 2006.230.01:54:24.00:"tape 2006.230.01:54:24.00:"st=record 2006.230.01:54:24.00:data_valid=on 2006.230.01:54:24.00:midob 2006.230.01:54:25.14/onsource/TRACKING 2006.230.01:54:25.14/wx/33.04,1002.6,71 2006.230.01:54:25.29/cable/+6.3924E-03 2006.230.01:54:26.38/va/01,08,usb,yes,29,32 2006.230.01:54:26.38/va/02,07,usb,yes,32,32 2006.230.01:54:26.38/va/03,06,usb,yes,39,42 2006.230.01:54:26.38/va/04,07,usb,yes,33,34 2006.230.01:54:26.38/va/05,04,usb,yes,29,30 2006.230.01:54:26.38/va/06,04,usb,yes,33,32 2006.230.01:54:26.38/va/07,05,usb,yes,29,30 2006.230.01:54:26.38/va/08,06,usb,yes,21,26 2006.230.01:54:26.61/valo/01,524.99,yes,locked 2006.230.01:54:26.61/valo/02,534.99,yes,locked 2006.230.01:54:26.61/valo/03,564.99,yes,locked 2006.230.01:54:26.61/valo/04,624.99,yes,locked 2006.230.01:54:26.61/valo/05,734.99,yes,locked 2006.230.01:54:26.61/valo/06,814.99,yes,locked 2006.230.01:54:26.61/valo/07,864.99,yes,locked 2006.230.01:54:26.61/valo/08,884.99,yes,locked 2006.230.01:54:27.70/vb/01,04,usb,yes,31,29 2006.230.01:54:27.70/vb/02,04,usb,yes,33,33 2006.230.01:54:27.70/vb/03,04,usb,yes,30,33 2006.230.01:54:27.70/vb/04,04,usb,yes,35,34 2006.230.01:54:27.70/vb/05,04,usb,yes,27,29 2006.230.01:54:27.70/vb/06,04,usb,yes,32,28 2006.230.01:54:27.70/vb/07,04,usb,yes,31,31 2006.230.01:54:27.70/vb/08,04,usb,yes,29,32 2006.230.01:54:27.93/vblo/01,629.99,yes,locked 2006.230.01:54:27.93/vblo/02,634.99,yes,locked 2006.230.01:54:27.93/vblo/03,649.99,yes,locked 2006.230.01:54:27.93/vblo/04,679.99,yes,locked 2006.230.01:54:27.93/vblo/05,709.99,yes,locked 2006.230.01:54:27.93/vblo/06,719.99,yes,locked 2006.230.01:54:27.93/vblo/07,734.99,yes,locked 2006.230.01:54:27.93/vblo/08,744.99,yes,locked 2006.230.01:54:28.08/vabw/8 2006.230.01:54:28.23/vbbw/8 2006.230.01:54:28.32/xfe/off,on,12.2 2006.230.01:54:28.71/ifatt/23,28,28,28 2006.230.01:54:29.07/fmout-gps/S +4.43E-07 2006.230.01:54:29.11:!2006.230.01:55:34 2006.230.01:55:34.01:data_valid=off 2006.230.01:55:34.02:"et 2006.230.01:55:34.02:!+3s 2006.230.01:55:37.03:"tape 2006.230.01:55:37.03:postob 2006.230.01:55:37.25/cable/+6.3932E-03 2006.230.01:55:37.25/wx/33.06,1002.6,73 2006.230.01:55:37.33/fmout-gps/S +4.44E-07 2006.230.01:55:37.34:"unlod=1 2006.230.01:55:37.34:sched_end 2006.230.01:55:37.34&sched_end/stopcheck 2006.230.01:55:37.35&stopcheck/sy=killall check_fsrun.pl 2006.230.01:55:37.35&stopcheck/" sy=killall chmem.sh 2006.230.01:55:37.42:checkk5last 2006.230.01:55:37.42&checkk5last/chk_obsdata=1 2006.230.01:55:37.43&checkk5last/chk_obsdata=2 2006.230.01:55:37.43&checkk5last/chk_obsdata=3 2006.230.01:55:37.43&checkk5last/chk_obsdata=4 2006.230.01:55:37.44&checkk5last/k5log=1 2006.230.01:55:37.44&checkk5last/k5log=2 2006.230.01:55:37.44&checkk5last/k5log=3 2006.230.01:55:37.45&checkk5last/k5log=4 2006.230.01:55:37.45&checkk5last/obsinfo 2006.230.01:55:37.90/chk_obsdata//k5ts1/T2300154??a.dat file size is correct (nominal:280MB, actual:276MB). 2006.230.01:55:38.32/chk_obsdata//k5ts2/T2300154??b.dat file size is correct (nominal:280MB, actual:276MB). 2006.230.01:55:38.77/chk_obsdata//k5ts3/T2300154??c.dat file size is correct (nominal:280MB, actual:276MB). 2006.230.01:55:39.21/chk_obsdata//k5ts4/T2300154??d.dat file size is correct (nominal:280MB, actual:276MB). 2006.230.01:55:39.87/k5log//k5ts1_log_newline 2006.230.01:55:40.68/k5log//k5ts2_log_newline 2006.230.01:55:41.49/k5log//k5ts3_log_newline 2006.230.01:55:42.31/k5log//k5ts4_log_newline 2006.230.01:55:42.34/obsinfo/Obs information was written on file(obsinfo.tmp). 2006.230.01:55:42.34:checkk5hdd 2006.230.01:55:42.34&checkk5hdd/chk_hdd=1 2006.230.01:55:42.34&checkk5hdd/chk_hdd=2 2006.230.01:55:42.34&checkk5hdd/chk_hdd=3 2006.230.01:55:42.34&checkk5hdd/chk_hdd=4 2006.230.01:55:46.24/chk_hdd//k5ts1/GSI00275:T229020000a.dat~T230015424a.dat[131419799552Byte] 2006.230.01:55:49.99/chk_hdd//k5ts2/GSI00163:T229020000b.dat~T230015424b.dat[131419799552Byte] 2006.230.01:55:53.30/chk_hdd//k5ts3/GSI00278:T229020000c.dat~T230015424c.dat[131419799552Byte] 2006.230.01:55:56.90/chk_hdd//k5ts4/GSI00141:T229020000d.dat~T230015424d.dat[131419799552Byte] 2006.230.01:55:56.90:sy=cp /usr2/log/jd0608ts.log /usr2/log_backup/ 2006.230.01:55:57.13:*end of schedule 2006.230.01:59:24.71;cable 2006.230.01:59:24.82/cable/+6.3896E-03 2006.230.02:02:19.65;cablelong 2006.230.02:02:19.74/cablelong/+6.9521E-03 2006.230.02:03:51.15;cablediff 2006.230.02:03:51.16/cablediff/562.5e-6,+ 2006.230.02:03:52.77;cable 2006.230.02:03:52.86/cable/+6.3936E-03 2006.230.02:04:16.85;wx 2006.230.02:04:16.85/wx/33.17,1002.6,76 2006.230.02:04:23.10;"Sky is fine. 2006.230.02:04:34.69;clockoff 2006.230.02:04:35.08/fmout-gps/S +4.42E-07 2006.230.02:04:37.13;xfe 2006.230.02:04:37.22/xfe/off,on,12.2 2006.230.02:07:51.15;proc=point 2006.230.02:07:52.96;initp 2006.230.02:07:52.96&initp/"setup 2006.230.02:07:52.96&initp/abib=p2,pr 2006.230.02:07:52.96&initp/abib=p1,pr 2006.230.02:07:52.96&initp/!+1s 2006.230.02:07:52.96&initp/abib=p2,ln 2006.230.02:07:52.96&initp/abib=p2,rm3en 2006.230.02:07:52.96&initp/abib=p2,fm2en 2006.230.02:07:52.96&initp/abib=p2,ap 2006.230.02:07:52.96&initp/abib=p2 2006.230.02:07:52.96&initp/abib=p1,ln 2006.230.02:07:52.96&initp/abib=p1,rm3en 2006.230.02:07:52.96&initp/abib=p1,fm2en 2006.230.02:07:52.96&initp/"meter 1 (u6) has s band 2006.230.02:07:52.96&initp/abib=p1,ap 2006.230.02:07:52.96&initp/abib=p1 2006.230.02:07:52.96&initp/caloff 2006.230.02:07:52.96&initp/user_device=u5,7680,usb,rcp,750 2006.230.02:07:52.96&initp/user_device=u6,1600,usb,rcp,750 2006.230.02:07:52.96&initp/sigon 2006.230.02:07:52.96&initp/"sample fivept set-up for azel antenna with mark iii/iv rack 2006.230.02:07:52.96&initp/"fivept=azel,-2,9,.4,1,i1,120 2006.230.02:07:52.96&initp/"sample fivept set-up for xyns antenna with vlba/4 rack 2006.230.02:07:52.96&initp/"fivept=xyns,-2,9,.4,1,ia,120 2006.230.02:07:52.96&initp/" for tsukuba 2006.230.02:07:52.96&initp/"fivept=azel,-2,9,.4,1,u5,120 2006.230.02:07:52.96&initp/fivept=azel,-2,7,.3,1,u5,120 2006.230.02:07:52.96&initp/" sample onoff set-up for mark iii/iv 2006.230.02:07:52.96&initp/"onoff=2,1,75,3,120,all 2006.230.02:07:52.96&initp/" sample onoff set-up for vlba/4 2006.230.02:07:52.96&initp/"onoff=2,1,75,3,120,allu,ia,ib,ic 2006.230.02:07:52.96&initp/" for tsukuba 2006.230.02:07:52.96&initp/"onoff=2,1,75,3,120,u5,u6 2006.230.02:07:52.96&initp/" changed wait time into 60 sec (04-jun-2004 -sk-) 2006.230.02:07:52.96&initp/onoff=2,1,75,3,60,u5,u6 2006.230.02:07:52.96&initp/check= 2006.230.02:07:52.96&initp/sy=go aquir & 2006.230.02:07:55.03/abib/+0.0650E-03 2006.230.02:07:55.93/abib/+0.0500E-03 2006.230.02:07:55.93&caloff/"rx=*,*,*,*,*,*,off 2006.230.02:07:55.93&sigon/ifatt=23,28,28,28 2006.230.02:07:55.93&sigon/!+2s 2006.230.02:08:14.73;taurusa 2006.230.02:08:14.73&taurusa/source=taurusa,053432.,+220058,2000. 2006.230.02:08:15.13#flagr#flagr/antenna,new-source 2006.230.02:08:42.13#trakl#Source acquired 2006.230.02:08:43.13#flagr#flagr/antenna,acquired 2006.230.02:08:53.89;onoff 2006.230.02:08:53.89?ERROR q1 -307 WARNING: Source structure correction greater than 20% for detector u5. 2006.230.02:08:53.89#onoff# De Center TCal Flux DPFU Gain Product LO T FWHM 2006.230.02:08:53.89#onoff#APR u5 8430.00 -100. 357.5 0.167000 1.00000 0.167000 7680.00 c 0.07768 2006.230.02:08:53.89#onoff#APR u6 2350.00 -100. 773.7 0.209000 1.00000 0.209000 1600.00 c 0.27867 2006.230.02:08:54.13#onoff#ORIG 7734.1 0.00000 0.00000 0.00000 0.00000 0.00000 0.00000 2006.230.02:08:55.41#onoff#ONSO 1.3 0.00000 0.00000 u5 129 u6 143 2006.230.02:09:04.41#onoff#OFFS 10.3 1.15047 0.00000 u5 63 u6 47 2006.230.02:09:04.41;sigoffnf 2006.230.02:09:04.41&sigoffnf/sigoff 2006.230.02:09:04.41&sigoffnf/sy=go onoff & 2006.230.02:09:04.41&sigoff/ifatt=81,81,81,81 2006.230.02:09:04.41&sigoff/!+2s 2006.230.02:09:07.79;sigonnf 2006.230.02:09:07.79&sigonnf/sigon 2006.230.02:09:07.80&sigonnf/sy=go onoff & 2006.230.02:09:09.99#onoff#ZERO 13.7 1.15047 0.00000 u5 0 u6 0 2006.230.02:09:21.36#onoff#ONSO 27.2 0.00000 0.00000 u5 128 u6 140 2006.230.02:09:31.36#onoff#OFFS 37.2 -1.15047 -0.00000 u5 63 u6 48 2006.230.02:09:40.41#onoff#ONSO 46.3 0.00000 0.00000 u5 130 u6 142 2006.230.02:09:40.41#onoff#SIG u5 0.00 0.00 4.1 0.000 0.000 0.00 2006.230.02:09:40.41#onoff#SIG u6 0.00 0.00 10.2 0.000 0.000 0.00 2006.230.02:09:40.41#onoff# source Az El De I P Center Comp Tsys SEFD Tcal(j) Tcal(r) 2006.230.02:09:40.41#onoff#VAL taurusa 269.2 40.7 u5 5 r 8430.00 1.0000 -100. 341.2 0.000 0.0000 2006.230.02:09:40.41?ERROR nf -7 WARNING: Source structure correction greater than 20% for detector u5. 2006.230.02:09:40.41#onoff#VAL taurusa 269.2 40.7 u6 6 r 2350.00 1.0000 -100. 390.3 0.000 0.0000 2006.230.02:09:40.41#onoff# source Az El De I P Center Comp Tsys SEFD Tcal(j) Tcal(r) 2006.230.02:10:23.96;virgoa 2006.230.02:10:23.96&virgoa/source=virgoa,123049.42,+122328.0,2000. 2006.230.02:10:24.14#flagr#flagr/antenna,new-source 2006.230.02:11:26.14#trakl#Source acquired 2006.230.02:11:26.14#flagr#flagr/antenna,acquired 2006.230.02:11:28.98;onoff 2006.230.02:11:28.98#onoff# De Center TCal Flux DPFU Gain Product LO T FWHM 2006.230.02:11:28.98#onoff#APR u5 8430.00 -100. 42.6 0.167000 1.00000 0.167000 7680.00 c 0.07768 2006.230.02:11:28.98#onoff#APR u6 2350.00 -100. 127.0 0.209000 1.00000 0.209000 1600.00 c 0.27867 2006.230.02:11:30.14#onoff#ORIG 7890.1 0.00000 0.00000 0.00000 0.00000 0.00000 0.00000 2006.230.02:11:31.37#onoff#ONSO 1.2 0.00000 0.00000 u5 72 u6 65 2006.230.02:11:43.42#onoff#OFFS 13.3 1.12036 0.00000 u5 63 u6 47 2006.230.02:11:43.42;sigoffnf 2006.230.02:11:46.80;sigonnf 2006.230.02:11:48.99#onoff#ZERO 16.7 1.12036 0.00000 u5 0 u6 0 2006.230.02:12:02.37#onoff#ONSO 32.2 0.00000 0.00000 u5 72 u6 65 2006.230.02:12:13.37#onoff#OFFS 43.2 -1.12036 -0.00000 u5 63 u6 48 2006.230.02:12:14.14#trakl#Off source 2006.230.02:12:14.14?ERROR st -7 Antenna off-source! 2006.230.02:12:14.14#trakl#az 104.898 el 40.577 azerr*cos(el) -0.0013 elerr -0.0087 2006.230.02:12:25.42#onoff#ONSO 55.3 0.00000 0.00000 u5 70 u6 65 2006.230.02:12:25.42#onoff#SIG u5 0.00 0.00 31.6 0.000 0.000 0.00 2006.230.02:12:25.42#onoff#SIG u6 0.00 0.00 19.2 0.000 0.000 0.00 2006.230.02:12:25.42#onoff# source Az El De I P Center Comp Tsys SEFD Tcal(j) Tcal(r) 2006.230.02:12:25.42#onoff#VAL virgoa 105.9 40.5 u5 5 r 8430.00 1.0000 -100. 322.2 0.000 0.0000 2006.230.02:12:25.42#onoff#VAL virgoa 105.9 40.5 u6 6 r 2350.00 1.0000 -100. 344.8 0.000 0.0000 2006.230.02:12:25.42#onoff# source Az El De I P Center Comp Tsys SEFD Tcal(j) Tcal(r) 2006.230.02:12:28.74;source=azel,0d,89d 2006.230.02:12:29.14#flagr#flagr/antenna,new-source 2006.230.02:13:11.14#trakl#Waiting at limit 2006.230.02:13:26.14#trakl#Waiting at limit 2006.230.02:13:40.41;caltsys 2006.230.02:13:40.42&caltsys/xfe=on,off 2006.230.02:13:40.42&caltsys/fe=off,,,,noise 2006.230.02:13:40.42&caltsys/tpi=u5,u6 2006.230.02:13:40.43&caltsys/ifatt=max,max,max,max 2006.230.02:13:40.43&caltsys/tpzero=u5,u6 2006.230.02:13:40.43&caltsys/ifatt=old,old,old,old 2006.230.02:13:40.44&caltsys/xfe=on,on 2006.230.02:13:40.44&caltsys/fe=on,,,,noise 2006.230.02:13:40.45&caltsys/tpical=u5,u6 2006.230.02:13:40.45&caltsys/tpdiff=u5,u6 2006.230.02:13:40.46&caltsys/xfe=off,off 2006.230.02:13:40.46&caltsys/fe=on,,,,pcal 2006.230.02:13:40.46&caltsys/user_device=u5,7681,usb,rcp,750 2006.230.02:13:40.46&caltsys/user_device=u6,1601,usb,rcp,750 2006.230.02:13:40.46&caltsys/caltemp=u5,u6 2006.230.02:13:40.46&caltsys/tsys=u5,u6 2006.230.02:13:41.14#trakl#Waiting at limit 2006.230.02:13:42.16/tpi/u5,61 2006.230.02:13:42.16/tpi/u6,46 2006.230.02:13:44.37/tpzero/u5,0 2006.230.02:13:44.37/tpzero/u6,0 2006.230.02:13:46.22/tpical/u5,134 2006.230.02:13:46.22/tpical/u6,93 2006.230.02:13:46.22/tpdiff/u5,73 2006.230.02:13:46.23/tpdiff/u6,47 2006.230.02:13:46.68/caltemp/u5,69.580 2006.230.02:13:46.68/caltemp/u6,70.400 2006.230.02:13:46.68/tsys/u5,58.1 2006.230.02:13:46.69/tsys/u6,68.9 2006.230.02:13:56.14#trakl#Waiting at limit 2006.230.02:14:08.46;stow 2006.230.02:14:08.46&stow/source=idle 2006.230.02:14:08.46&stow/"this is stow command. 2006.230.02:14:08.46&stow/antenna=m3 2006.230.02:14:09.14#flagr#flagr/antenna,new-source 2006.230.02:14:37.53;terminate 2006.230.02:14:37.53:*boss terminated